From f873945344d848b7dca5b3d3a9c465a6a91d5706 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 7 Feb 2018 16:32:43 -0600 Subject: [PATCH 001/488] Add USBPhy, USB HAL and Utility class Add the USBPhy and USBPhyEvents abstract classes, the HAL header using this class and the EndpointResolver utility class. --- hal/mbed_usb_phy.cpp | 29 +++ hal/usb_phy_api.h | 36 +++ platform/USBPhy.h | 302 ++++++++++++++++++++++ platform/USBPhyEvents.h | 107 ++++++++ platform/USBPhyTypes.h | 58 +++++ usb/device/USBDevice/EndpointResolver.cpp | 136 ++++++++++ usb/device/USBDevice/EndpointResolver.h | 89 +++++++ 7 files changed, 757 insertions(+) create mode 100644 hal/mbed_usb_phy.cpp create mode 100644 hal/usb_phy_api.h create mode 100644 platform/USBPhy.h create mode 100644 platform/USBPhyEvents.h create mode 100644 platform/USBPhyTypes.h create mode 100644 usb/device/USBDevice/EndpointResolver.cpp create mode 100644 usb/device/USBDevice/EndpointResolver.h diff --git a/hal/mbed_usb_phy.cpp b/hal/mbed_usb_phy.cpp new file mode 100644 index 00000000000..c1f589c5590 --- /dev/null +++ b/hal/mbed_usb_phy.cpp @@ -0,0 +1,29 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include "usb_phy_api.h" +#include "mbed_error.h" + +#if !defined(DEVICE_USBDEVICE) || !DEVICE_USBDEVICE + +USBPhy *get_usb_phy() +{ + error("This board does not have a hardware USB driver"); + return NULL; +} + +#endif diff --git a/hal/usb_phy_api.h b/hal/usb_phy_api.h new file mode 100644 index 00000000000..a46346ae314 --- /dev/null +++ b/hal/usb_phy_api.h @@ -0,0 +1,36 @@ + +/** \addtogroup hal */ +/** @{*/ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef MBED_USB_PHY_API_H +#define MBED_USB_PHY_API_H + +#include "USBPhy.h" + +/** Return a the USBPhy instance for this hardware + * + * For details on adding support for a USBPhy see the specification in USBPhy.h. + * + * @return A pointer to a USBPhy instance + * @note Calling this function on platforms without a USBPhy will result in an + * error + */ +USBPhy *get_usb_phy(); + +#endif + +/** @}*/ diff --git a/platform/USBPhy.h b/platform/USBPhy.h new file mode 100644 index 00000000000..33f5870e1a6 --- /dev/null +++ b/platform/USBPhy.h @@ -0,0 +1,302 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBPHY_H +#define USBPHY_H + +#include "USBPhyTypes.h" +#include "USBPhyEvents.h" + +/** Abstract interface to physical USB hardware + * + * # Defined behavior + * * Any endpoint configurations which fit in the parameters of the table returned + * by USBPhy::endpoint_table can be used. + * * All endpoints in any valid endpoint configuration can be used concurrently + * * Device supports use of at least one control, bulk, interrupt and + * isochronous in each direction at the same time - at least 8 endpoints. + * * Device supports all standard endpoint sizes (wMaxPacketSize) + * * Device can handle an interrupt latency of at least 100ms if reset is not being performed and address is not being set + * * USBPhyEvents events are only sent when USBPhy is in the initialized state + * * When unpowered only the USBPhyEvents::power event can be sent + * * On USB reset all endpoints are removed except for endpoint 0 + * * USBPhyEvents::out and USBPhyEvents::in events only occur for endpoints which have been added + * * A call to USBPhy::ep0_write results in USBPhyEvents::in getting called if not + * interrupted by a power loss or reset + * * A call to endpoint_read followed by endpoint_read_result results in USBPhyEvents::out getting called if not + * interrupted by a power loss or reset + * * Endpoint 0 naks all transactions aside from setup packets until one + * of ep0_read, ep0_write or ep0_stall has been called + * * Endpoint 0 stall is automatically cleared on reception of a setup packet + * + * # Undefined behavior + * * Calling USBPhy::endpoint_add or USBPhy::endpoint_remove outside of the control requests SetInterface or SetConfiguration + * * Devices behavior is undefined if latency is greater than 2ms when address is being set - see USB spec 9.2.6.3 + * * Devices behavior is undefined if latency is greater than 10ms when a reset occurs - see USB spec 7.1.7.5 + * * Calling any of the USBPhy::endpoint_* functions on endpoint 0 + * + * # Notes + * * Make sure USB packets are processed in the correct order when multiple packets are present. + * Typically IN endpoints should be handled before OUT endpoints if both are pending. + * * Setup packets may be resent if there is noise on the USB line. The USBPhy should be able + * to gracefully handle this scenario and respond to the setup packet with an ACK. + * * Bi-directional protocols making use of alternating IN and OUT phases should not rely + * on the last ACK an IN transfer to indicate that the OUT phase should start. Instead, + * the OUT phase should be started at the same time the last IN transfer is started. This + * is because the ACK to the last in transfer may be dropped if there is noise on the USB + * line. If dropped it will only get re-sent on the next IN phase. More info on this can be + * found in section 8.5.3.3 of the USB spec. + * + * @ingroup usb_device_core + */ +class USBPhy { +public: + USBPhy() {}; + virtual ~USBPhy() {}; + + /** + * Initialize this USBPhy instance + * + * This function must be called before calling + * any other functions of this class, unless specifically + * noted. + * + * @param events Callback class to handle USB events + */ + virtual void init(USBPhyEvents *events) = 0; + + /** + * Power down this USBPhy instance + * + * Disable interrupts and stop sending events. + */ + virtual void deinit() = 0; + + /** + * Check if USB power is present + * + * Devices which don't support checking the USB power state + * must always return true. + * + * @return true if USB power is present, false otherwise + */ + virtual bool powered() = 0; + + /** + * Make the USB phy visible to the USB host + * + * Enable either the D+ or D- pullup so the host can detect + * the presence of this device. + */ + virtual void connect() = 0; + + /** + * Detach the USB phy + * + * Disable the D+ and D- pullup and stop responding to + * USB traffic. + */ + virtual void disconnect() = 0; + + /** + * Set this device to the configured state + * + * Enable added endpoints if they are not enabled + * already. + */ + virtual void configure() = 0; + + /** + * Leave the configured state + * + * This is a notification to the USBPhy indicating that the device + * is leaving the configured state. The USBPhy can disable all + * endpoints other than endpoint 0. + * + */ + virtual void unconfigure() = 0; + + /** + * Enable the start of frame interrupt + * + * Call USBPhyEvents::sof on every frame. + */ + virtual void sof_enable() = 0; + + /** + * Disable the start of frame interrupt + * + * Stop calling USBPhyEvents::sof. + */ + virtual void sof_disable() = 0; + + /** + * Set the USBPhy's address + * + * @param address This device's USB address + */ + virtual void set_address(uint8_t address) = 0; + + /** + * Wake upstream devices + */ + virtual void remote_wakeup() = 0; + + /** + * Get the endpoint table + * + * This function returns a table which describes the endpoints + * can be used, the functionality of those endpoints and the + * resource cost. + */ + virtual const usb_ep_table_t* endpoint_table() = 0; + + /** + * Set wMaxPacketSize of endpoint 0 + * + * @param max_packet The wMaxPacketSize value for endpoint 0 + * @return The actual size of endpoint 0 + */ + virtual uint32_t ep0_set_max_packet(uint32_t max_packet) = 0; + + /** + * Read the contents of the SETUP packet + * + * @param buffer Buffer to fill with data + * @param size Size of buffer passed in + */ + virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size) = 0; + + /** + * Start receiving a packet of up to wMaxPacketSize on endpoint 0 + */ + virtual void ep0_read() = 0; + + /** + * Read the contents of a received packet + * + * @param buffer Buffer to fill with the data read + * @param size Size of buffer + */ + virtual uint32_t ep0_read_result(uint8_t *buffer, uint32_t size) = 0; + + /** + * Write a packet on endpoint 0 + * + * @param buffer Buffer fill with data to send + * @param size Size of data to send + */ + virtual void ep0_write(uint8_t *buffer, uint32_t size) = 0; + + /** + * Protocol stall on endpoint 0 + * + * Stall all IN and OUT packets on endpoint 0 until a setup packet + * is received. + * @note The stall is cleared automatically when a setup packet is received + */ + virtual void ep0_stall() = 0; + + /** + * Configure and enable an endpoint + * + * @param endpoint Endpoint to configure and enable + * @param max_packet The maximum packet size that can be sent or received + * @param type The type of endpoint this should be configured as - + * USB_EP_TYPE_BULK, USB_EP_TYPE_INT or USB_EP_TYPE_ISO + * @note This function cannot be used to configure endpoint 0. That must be done + * with ep0_set_max_packet + */ + virtual bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type) = 0; + + /** + * Disable an endpoint + * + * @param endpoint Endpoint to disable + */ + virtual void endpoint_remove(usb_ep_t endpoint) = 0; + + /** + * Perform a functional stall on the given endpoint + * + * Set the HALT feature for this endpoint so that all further + * communication is aborted. + * + * @param endpoint Endpoint to stall + */ + virtual void endpoint_stall(usb_ep_t endpoint) = 0; + + /** + * Unstall the endpoint + * + * Clear the HALT feature on this endpoint so communication can + * resume. + * + * @param endpoint Endpoint to stall + */ + virtual void endpoint_unstall(usb_ep_t endpoint) = 0; + + /** + * Start a read on the given endpoint + * + * @param endpoint Endpoint to start the read on + * @param max_packet A hint as to the wMaxPacketSize of this endpoint. + * This must match the size in endpoint_add. + * @return true if the read was successfully started, false otherwise + */ + virtual bool endpoint_read(usb_ep_t endpoint, uint32_t max_packet) = 0; + + /** + * Finish a read on the given endpoint + * + * @param endpoint Endpoint to read data from + * @param data Buffer to fill with data + * @param size Size of buffer + * @param bytes_read The number of bytes in the current packet. This can be larger than + * the size parameter if the buffer passed in was too small. + * @return true if data was read false otherwise + */ + virtual bool endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytes_read) = 0; + + /** + * Start a write on the given endpoint + * + * @param endpoint Endpoint to write to + * @param data Buffer to write + * @param size Size of data to write + * @return true if the data was prepared for transmit, false otherwise + */ + virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) = 0; + + /** + * Abort the current transfer if it has not yet been sent + * + * @param endpoint Endpoint to abort the transfer on. It is implementation defined + * if this function has an effect on receive endpoints. + */ + virtual void endpoint_abort(usb_ep_t endpoint) = 0; + + /** + * Callback used for performing USB processing + * + * USBPhy processing should be triggered by calling USBPhyEvents::start_process + * and done inside process. All USBPhyEvents callbacks aside from + * USBPhyEvents::start_process must be called in the context of process + */ + virtual void process() = 0; +}; + +#endif diff --git a/platform/USBPhyEvents.h b/platform/USBPhyEvents.h new file mode 100644 index 00000000000..a6cb0e43f2b --- /dev/null +++ b/platform/USBPhyEvents.h @@ -0,0 +1,107 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBPHY_EVENTS_H +#define USBPHY_EVENTS_H + +#include "USBPhyTypes.h" + +/** Event handler for USBPhy + * + * This class is the event handler for the USBPhy class. Any events generated + * by USBPhy are passed to this class via the virtual functions. + * + * @ingroup usb_device_core + * + */ +class USBPhyEvents { +public: + USBPhyEvents() {}; + virtual ~USBPhyEvents() {}; + + /** + * Callback called when a bus reset occurs + * @note called in the contex of USBPhy::process + */ + virtual void reset() = 0; + + /** + * Callback called when an endpoint 0 setup packet is received + * @note called in the contex of USBPhy::process + */ + virtual void ep0_setup() = 0; + + /** + * Callback called when an endpoint 0 out packet is received + * @note called in the contex of USBPhy::process + */ + virtual void ep0_out() = 0; + + /** + * Callback called when an endpoint 0 in packet is received + * @note called in the contex of USBPhy::process + */ + virtual void ep0_in() = 0; + + /** + * Callback called USB power is applied or removed + * + * @param powered true if USB power is present, false otherwise + * @note called in the contex of USBPhy::process + */ + virtual void power(bool powered) = 0; + + /** + * Callback called when entering or leaving suspend mode + * + * @param suspended true if entering suspend mode false otherwise + * @note called in the contex of USBPhy::process + */ + virtual void suspend(bool suspended) = 0; + + /** + * Callback called on start of frame + * + * @param frame_number The current frame number + * @note This callback is enabled/disabled by + * calling USBPhy::sof_enable / USBPhy::sof_disable + * @note called in the contex of USBPhy::process + */ + virtual void sof(int frame_number) = 0; + + /** + * Callback called on the reception of an OUT packet + * + * @param endpoint Endpoint which received the OUT packet + * @note called in the contex of USBPhy::process + */ + virtual void out(usb_ep_t endpoint) = 0; + + /** + * Callback called on the transmission of an IN packet + * + * @param endpoint Endpoint which sent the IN packet + * @note called in the contex of USBPhy::process + */ + virtual void in(usb_ep_t endpoint) = 0; + + /** + * Callback called to indicate the USB processing needs to be done + */ + virtual void start_process() = 0; +}; + +#endif diff --git a/platform/USBPhyTypes.h b/platform/USBPhyTypes.h new file mode 100644 index 00000000000..7e69b5b339d --- /dev/null +++ b/platform/USBPhyTypes.h @@ -0,0 +1,58 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBPHY_TYPES_H +#define USBPHY_TYPES_H + +#include + +typedef uint8_t usb_ep_t; + +typedef enum { + USB_EP_TYPE_CTRL = 0, + USB_EP_TYPE_ISO = 1, + USB_EP_TYPE_BULK = 2, + USB_EP_TYPE_INT = 3 +} usb_ep_type_t; + +enum { + USB_EP_ATTR_ALLOW_CTRL = 1 << USB_EP_TYPE_CTRL, + USB_EP_ATTR_ALLOW_BULK = 1 << USB_EP_TYPE_BULK, + USB_EP_ATTR_ALLOW_INT = 1 << USB_EP_TYPE_INT, + USB_EP_ATTR_ALLOW_ISO = 1 << USB_EP_TYPE_ISO, + USB_EP_ATTR_ALLOW_ALL = USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_ALLOW_BULK | + USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_ALLOW_ISO, + + USB_EP_ATTR_DIR_IN = 0 << 4, + USB_EP_ATTR_DIR_OUT = 1 << 4, + USB_EP_ATTR_DIR_IN_OR_OUT = 2 << 4, + USB_EP_ATTR_DIR_IN_AND_OUT = 3 << 4, + USB_EP_ATTR_DIR_MASK = 3 << 4 +}; +typedef uint8_t usb_ep_attr_t; + +struct usb_ep_entry_t { + usb_ep_attr_t attributes; + uint8_t byte_cost; + uint16_t base_cost; +}; + +struct usb_ep_table_t { + uint32_t resources; + usb_ep_entry_t table[16]; +}; + +#endif diff --git a/usb/device/USBDevice/EndpointResolver.cpp b/usb/device/USBDevice/EndpointResolver.cpp new file mode 100644 index 00000000000..ad45006bb2e --- /dev/null +++ b/usb/device/USBDevice/EndpointResolver.cpp @@ -0,0 +1,136 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "mbed.h" +#include "EndpointResolver.h" + +static uint32_t logical_to_index(uint32_t logical, bool in_not_out) +{ + return (logical << 1) | (in_not_out ? 1 : 0); +} + +static uint32_t index_to_logical(uint32_t index) +{ + return index >> 1; +} + + +EndpointResolver::EndpointResolver(const usb_ep_table_t *table) : _table(table), _cost(0), _used(0), _valid(true) +{ + // Do nothing +} + +EndpointResolver::~EndpointResolver() +{ + // Do nothing +} + +void EndpointResolver::endpoint_ctrl(uint32_t size) +{ + endpoint_in(USB_EP_TYPE_CTRL, size); + endpoint_out(USB_EP_TYPE_CTRL, size); +} + +usb_ep_t EndpointResolver::endpoint_in(usb_ep_type_t type, uint32_t size) +{ + int index = next_index(type, true); + if (index < 0) { + _valid = false; + return 0; + } + + const usb_ep_entry_t &entry = _table->table[index_to_logical(index)]; + _cost += entry.base_cost + entry.byte_cost * size; + _used |= 1 << index; + + return index_to_endpoint(index); +} + +usb_ep_t EndpointResolver::endpoint_out(usb_ep_type_t type, uint32_t size) +{ + int index = next_index(type, false); + if (index < 0) { + _valid = false; + return 0; + } + + const usb_ep_entry_t &entry = _table->table[index_to_logical(index)]; + _cost += entry.base_cost + entry.byte_cost * size; + _used |= 1 << index; + + return index_to_endpoint(index); +} + +bool EndpointResolver::valid() +{ + return _valid && (_cost <= _table->resources); +} + +void EndpointResolver::reset() { + _cost = 0; + _used = 0; + _valid = true; +} + +usb_ep_t EndpointResolver::index_to_endpoint(int index) +{ + return index_to_logical(index) | ((index & 1) ? 0x80 : 0); +} + +int EndpointResolver::next_index(usb_ep_type_t type, bool in_not_out) +{ + for (int logical = 0; logical < (int)(sizeof(_table->table) / sizeof(_table->table[0])); logical++) { + uint32_t index = logical_to_index(logical, in_not_out); + uint32_t other = logical_to_index(logical, !in_not_out); + const usb_ep_entry_t &entry = _table->table[logical]; + + usb_ep_attr_t dir = entry.attributes & USB_EP_ATTR_DIR_MASK; + bool in_allowed = dir != USB_EP_ATTR_DIR_OUT; + bool out_allowed = dir != USB_EP_ATTR_DIR_IN; + bool shared = dir == USB_EP_ATTR_DIR_IN_OR_OUT; + + if (!(entry.attributes & (1 << type))) { + // This type is not supported + continue; + } + + if (in_not_out && !in_allowed) { + // In endpoint not supported + continue; + } + + if (!in_not_out && !out_allowed) { + // Out endpoint not supported + continue; + } + + if (_used & (1 << index)) { + // This endpoint is in use + continue; + } + + if (shared && (1 << other)) { + // This endpoint can only be one direction at a time and is in + // use by the other direction + continue; + } + + return index; + } + + // Not found + return -1; +} diff --git a/usb/device/USBDevice/EndpointResolver.h b/usb/device/USBDevice/EndpointResolver.h new file mode 100644 index 00000000000..04f7d188f8e --- /dev/null +++ b/usb/device/USBDevice/EndpointResolver.h @@ -0,0 +1,89 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef ENDPOINT_RESOLVER_H +#define ENDPOINT_RESOLVER_H + +#include "mbed.h" + +#include "USBPhy.h" + +/** + * Utility class for resolving endpoints + * + * This class is intended to make the process of + * selecting the correct endpoint from a device endpoint + * table easier. It also provides a verification function + * to check if the device has enough resources for the + * given configuration. + * + * @ingroup usb_device_core + */ +class EndpointResolver { +public: + EndpointResolver(const usb_ep_table_t *table); + ~EndpointResolver(); + + /** + * Add control endpoint size + * + * @param size Space reserved for control in and control out + */ + void endpoint_ctrl(uint32_t size); + + /** + * Return a free IN endpoint of the given size + * + * @param type Desired endpoint type + * @param size Space to reserve for this endpoint + * @return Endpoint index or 0 if there are not enough resources + */ + usb_ep_t endpoint_in(usb_ep_type_t type, uint32_t size); + + /** + * Return a free OUT endpoint of the given size + * + * @param type Desired endpoint type + * @param size Space to reserve for this endpoint + * @return Endpoint index or 0 if there are not enough resources + */ + usb_ep_t endpoint_out(usb_ep_type_t type, uint32_t size); + + /** + * Check if the endpoint configuration created so far is valid + * + * @return true if all endpoint sizes are available and fit, false otherwise + */ + bool valid(); + + /** + * Reset this class's state to when it was constructed + */ + void reset(); + +private: + + usb_ep_t index_to_endpoint(int index); + int next_index(usb_ep_type_t type, bool in_not_out); + + const usb_ep_table_t *_table; + uint32_t _cost; + uint32_t _used; + bool _valid; +}; + + +#endif From b30dac27b5b604b6ba1514ac6e04907f72df25b1 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 7 Feb 2018 16:29:16 -0600 Subject: [PATCH 002/488] Copy USBDevice from unsupported Copy the USBDevice code out of unsupported and into a top level USB folder in preparation for development. squash --- usb/device/USBDevice/USBDescriptor.h | 74 ++ usb/device/USBDevice/USBDevice.cpp | 988 +++++++++++++++++++++++++ usb/device/USBDevice/USBDevice.h | 272 +++++++ usb/device/USBDevice/USBDevice_Types.h | 83 +++ 4 files changed, 1417 insertions(+) create mode 100644 usb/device/USBDevice/USBDescriptor.h create mode 100644 usb/device/USBDevice/USBDevice.cpp create mode 100644 usb/device/USBDevice/USBDevice.h create mode 100644 usb/device/USBDevice/USBDevice_Types.h diff --git a/usb/device/USBDevice/USBDescriptor.h b/usb/device/USBDevice/USBDescriptor.h new file mode 100644 index 00000000000..9d4ce849f09 --- /dev/null +++ b/usb/device/USBDevice/USBDescriptor.h @@ -0,0 +1,74 @@ +/* Copyright (c) 2010-2011 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +/* Standard descriptor types */ +#define DEVICE_DESCRIPTOR (1) +#define CONFIGURATION_DESCRIPTOR (2) +#define STRING_DESCRIPTOR (3) +#define INTERFACE_DESCRIPTOR (4) +#define ENDPOINT_DESCRIPTOR (5) +#define QUALIFIER_DESCRIPTOR (6) + +/* Standard descriptor lengths */ +#define DEVICE_DESCRIPTOR_LENGTH (0x12) +#define CONFIGURATION_DESCRIPTOR_LENGTH (0x09) +#define INTERFACE_DESCRIPTOR_LENGTH (0x09) +#define ENDPOINT_DESCRIPTOR_LENGTH (0x07) + + +/*string offset*/ +#define STRING_OFFSET_LANGID (0) +#define STRING_OFFSET_IMANUFACTURER (1) +#define STRING_OFFSET_IPRODUCT (2) +#define STRING_OFFSET_ISERIAL (3) +#define STRING_OFFSET_ICONFIGURATION (4) +#define STRING_OFFSET_IINTERFACE (5) + +/* USB Specification Release Number */ +#define USB_VERSION_2_0 (0x0200) + +/* Least/Most significant byte of short integer */ +#define LSB(n) ((n)&0xff) +#define MSB(n) (((n)&0xff00)>>8) + +/* Convert physical endpoint number to descriptor endpoint number */ +#define PHY_TO_DESC(endpoint) (((endpoint)>>1) | (((endpoint) & 1) ? 0x80:0)) + +/* bmAttributes in configuration descriptor */ +/* C_RESERVED must always be set */ +#define C_RESERVED (1U<<7) +#define C_SELF_POWERED (1U<<6) +#define C_REMOTE_WAKEUP (1U<<5) + +/* bMaxPower in configuration descriptor */ +#define C_POWER(mA) ((mA)/2) + +/* bmAttributes in endpoint descriptor */ +#define E_CONTROL (0x00) +#define E_ISOCHRONOUS (0x01) +#define E_BULK (0x02) +#define E_INTERRUPT (0x03) + +/* For isochronous endpoints only: */ +#define E_NO_SYNCHRONIZATION (0x00) +#define E_ASYNCHRONOUS (0x04) +#define E_ADAPTIVE (0x08) +#define E_SYNCHRONOUS (0x0C) +#define E_DATA (0x00) +#define E_FEEDBACK (0x10) +#define E_IMPLICIT_FEEDBACK (0x20) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp new file mode 100644 index 00000000000..438174fe2a9 --- /dev/null +++ b/usb/device/USBDevice/USBDevice.cpp @@ -0,0 +1,988 @@ +/* Copyright (c) 2010-2011 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#include "stdint.h" + +#include "USBEndpoints.h" +#include "USBDevice.h" +#include "USBDescriptor.h" + +//#define DEBUG + +/* Device status */ +#define DEVICE_STATUS_SELF_POWERED (1U<<0) +#define DEVICE_STATUS_REMOTE_WAKEUP (1U<<1) + +/* Endpoint status */ +#define ENDPOINT_STATUS_HALT (1U<<0) + +/* Standard feature selectors */ +#define DEVICE_REMOTE_WAKEUP (1) +#define ENDPOINT_HALT (0) + +/* Macro to convert wIndex endpoint number to physical endpoint number */ +#define WINDEX_TO_PHYSICAL(endpoint) (((endpoint & 0x0f) << 1) + \ + ((endpoint & 0x80) ? 1 : 0)) + + +bool USBDevice::requestGetDescriptor(void) +{ + bool success = false; +#ifdef DEBUG + printf("get descr: type: %d\r\n", DESCRIPTOR_TYPE(transfer.setup.wValue)); +#endif + switch (DESCRIPTOR_TYPE(transfer.setup.wValue)) + { + case DEVICE_DESCRIPTOR: + if (deviceDesc() != NULL) + { + if ((deviceDesc()[0] == DEVICE_DESCRIPTOR_LENGTH) \ + && (deviceDesc()[1] == DEVICE_DESCRIPTOR)) + { +#ifdef DEBUG + printf("device descr\r\n"); +#endif + transfer.remaining = DEVICE_DESCRIPTOR_LENGTH; + transfer.ptr = (uint8_t*)deviceDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + } + } + break; + case CONFIGURATION_DESCRIPTOR: + if (configurationDesc() != NULL) + { + if ((configurationDesc()[0] == CONFIGURATION_DESCRIPTOR_LENGTH) \ + && (configurationDesc()[1] == CONFIGURATION_DESCRIPTOR)) + { +#ifdef DEBUG + printf("conf descr request\r\n"); +#endif + /* Get wTotalLength */ + transfer.remaining = configurationDesc()[2] \ + | (configurationDesc()[3] << 8); + + transfer.ptr = (uint8_t*)configurationDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + } + } + break; + case STRING_DESCRIPTOR: +#ifdef DEBUG + printf("str descriptor\r\n"); +#endif + switch (DESCRIPTOR_INDEX(transfer.setup.wValue)) + { + case STRING_OFFSET_LANGID: +#ifdef DEBUG + printf("1\r\n"); +#endif + transfer.remaining = stringLangidDesc()[0]; + transfer.ptr = (uint8_t*)stringLangidDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_IMANUFACTURER: +#ifdef DEBUG + printf("2\r\n"); +#endif + transfer.remaining = stringImanufacturerDesc()[0]; + transfer.ptr = (uint8_t*)stringImanufacturerDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_IPRODUCT: +#ifdef DEBUG + printf("3\r\n"); +#endif + transfer.remaining = stringIproductDesc()[0]; + transfer.ptr = (uint8_t*)stringIproductDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_ISERIAL: +#ifdef DEBUG + printf("4\r\n"); +#endif + transfer.remaining = stringIserialDesc()[0]; + transfer.ptr = (uint8_t*)stringIserialDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_ICONFIGURATION: +#ifdef DEBUG + printf("5\r\n"); +#endif + transfer.remaining = stringIConfigurationDesc()[0]; + transfer.ptr = (uint8_t*)stringIConfigurationDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_IINTERFACE: +#ifdef DEBUG + printf("6\r\n"); +#endif + transfer.remaining = stringIinterfaceDesc()[0]; + transfer.ptr = (uint8_t*)stringIinterfaceDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + } + break; + case INTERFACE_DESCRIPTOR: +#ifdef DEBUG + printf("interface descr\r\n"); +#endif + case ENDPOINT_DESCRIPTOR: +#ifdef DEBUG + printf("endpoint descr\r\n"); +#endif + /* TODO: Support is optional, not implemented here */ + break; + default: +#ifdef DEBUG + printf("ERROR\r\n"); +#endif + break; + } + + return success; +} + +void USBDevice::decodeSetupPacket(uint8_t *data, SETUP_PACKET *packet) +{ + /* Fill in the elements of a SETUP_PACKET structure from raw data */ + packet->bmRequestType.dataTransferDirection = (data[0] & 0x80) >> 7; + packet->bmRequestType.Type = (data[0] & 0x60) >> 5; + packet->bmRequestType.Recipient = data[0] & 0x1f; + packet->bRequest = data[1]; + packet->wValue = (data[2] | (uint16_t)data[3] << 8); + packet->wIndex = (data[4] | (uint16_t)data[5] << 8); + packet->wLength = (data[6] | (uint16_t)data[7] << 8); +} + + +bool USBDevice::controlOut(void) +{ + /* Control transfer data OUT stage */ + uint8_t buffer[MAX_PACKET_SIZE_EP0]; + uint32_t packetSize; + + /* Check we should be transferring data OUT */ + if (transfer.direction != HOST_TO_DEVICE) + { + /* for other platforms, count on the HAL to handle this case */ + return false; + } + + /* Read from endpoint */ + packetSize = EP0getReadResult(buffer); + + /* Check if transfer size is valid */ + if (packetSize > transfer.remaining) + { + /* Too big */ + return false; + } + + /* Update transfer */ + transfer.ptr += packetSize; + transfer.remaining -= packetSize; + + /* Check if transfer has completed */ + if (transfer.remaining == 0) + { + /* Transfer completed */ + if (transfer.notify) + { + /* Notify class layer. */ + USBCallback_requestCompleted(buffer, packetSize); + transfer.notify = false; + } + /* Status stage */ + EP0write(NULL, 0); + } + else + { + EP0read(); + } + + return true; +} + +bool USBDevice::controlIn(void) +{ + /* Control transfer data IN stage */ + uint32_t packetSize; + + /* Check if transfer has completed (status stage transactions */ + /* also have transfer.remaining == 0) */ + if (transfer.remaining == 0) + { + if (transfer.zlp) + { + /* Send zero length packet */ + EP0write(NULL, 0); + transfer.zlp = false; + } + + /* Transfer completed */ + if (transfer.notify) + { + /* Notify class layer. */ + USBCallback_requestCompleted(NULL, 0); + transfer.notify = false; + } + + EP0read(); + EP0readStage(); + + /* Completed */ + return true; + } + + /* Check we should be transferring data IN */ + if (transfer.direction != DEVICE_TO_HOST) + { + return false; + } + + packetSize = transfer.remaining; + + if (packetSize > MAX_PACKET_SIZE_EP0) + { + packetSize = MAX_PACKET_SIZE_EP0; + } + + /* Write to endpoint */ + EP0write(transfer.ptr, packetSize); + + /* Update transfer */ + transfer.ptr += packetSize; + transfer.remaining -= packetSize; + + return true; +} + +bool USBDevice::requestSetAddress(void) +{ + /* Set the device address */ + setAddress(transfer.setup.wValue); + + if (transfer.setup.wValue == 0) + { + device.state = DEFAULT; + } + else + { + device.state = ADDRESS; + } + + return true; +} + +bool USBDevice::requestSetConfiguration(void) +{ + + device.configuration = transfer.setup.wValue; + /* Set the device configuration */ + if (device.configuration == 0) + { + /* Not configured */ + unconfigureDevice(); + device.state = ADDRESS; + } + else + { + if (USBCallback_setConfiguration(device.configuration)) + { + /* Valid configuration */ + configureDevice(); + device.state = CONFIGURED; + } + else + { + return false; + } + } + + return true; +} + +bool USBDevice::requestGetConfiguration(void) +{ + /* Send the device configuration */ + transfer.ptr = &device.configuration; + transfer.remaining = sizeof(device.configuration); + transfer.direction = DEVICE_TO_HOST; + return true; +} + +bool USBDevice::requestGetInterface(void) +{ + /* Return the selected alternate setting for an interface */ + + if (device.state != CONFIGURED) + { + return false; + } + + /* Send the alternate setting */ + transfer.setup.wIndex = currentInterface; + transfer.ptr = ¤tAlternate; + transfer.remaining = sizeof(currentAlternate); + transfer.direction = DEVICE_TO_HOST; + return true; +} + +bool USBDevice::requestSetInterface(void) +{ + bool success = false; + if(USBCallback_setInterface(transfer.setup.wIndex, transfer.setup.wValue)) + { + success = true; + currentInterface = transfer.setup.wIndex; + currentAlternate = transfer.setup.wValue; + } + return success; +} + +bool USBDevice::requestSetFeature() +{ + bool success = false; + + if (device.state != CONFIGURED) + { + /* Endpoint or interface must be zero */ + if (transfer.setup.wIndex != 0) + { + return false; + } + } + + switch (transfer.setup.bmRequestType.Recipient) + { + case DEVICE_RECIPIENT: + /* TODO: Remote wakeup feature not supported */ + break; + case ENDPOINT_RECIPIENT: + if (transfer.setup.wValue == ENDPOINT_HALT) + { + /* TODO: We should check that the endpoint number is valid */ + stallEndpoint( + WINDEX_TO_PHYSICAL(transfer.setup.wIndex)); + success = true; + } + break; + default: + break; + } + + return success; +} + +bool USBDevice::requestClearFeature() +{ + bool success = false; + + if (device.state != CONFIGURED) + { + /* Endpoint or interface must be zero */ + if (transfer.setup.wIndex != 0) + { + return false; + } + } + + switch (transfer.setup.bmRequestType.Recipient) + { + case DEVICE_RECIPIENT: + /* TODO: Remote wakeup feature not supported */ + break; + case ENDPOINT_RECIPIENT: + /* TODO: We should check that the endpoint number is valid */ + if (transfer.setup.wValue == ENDPOINT_HALT) + { + unstallEndpoint( WINDEX_TO_PHYSICAL(transfer.setup.wIndex)); + success = true; + } + break; + default: + break; + } + + return success; +} + +bool USBDevice::requestGetStatus(void) +{ + static uint16_t status; + bool success = false; + + if (device.state != CONFIGURED) + { + /* Endpoint or interface must be zero */ + if (transfer.setup.wIndex != 0) + { + return false; + } + } + + switch (transfer.setup.bmRequestType.Recipient) + { + case DEVICE_RECIPIENT: + /* TODO: Currently only supports self powered devices */ + status = DEVICE_STATUS_SELF_POWERED; + success = true; + break; + case INTERFACE_RECIPIENT: + status = 0; + success = true; + break; + case ENDPOINT_RECIPIENT: + /* TODO: We should check that the endpoint number is valid */ + if (getEndpointStallState( + WINDEX_TO_PHYSICAL(transfer.setup.wIndex))) + { + status = ENDPOINT_STATUS_HALT; + } + else + { + status = 0; + } + success = true; + break; + default: + break; + } + + if (success) + { + /* Send the status */ + transfer.ptr = (uint8_t *)&status; /* Assumes little endian */ + transfer.remaining = sizeof(status); + transfer.direction = DEVICE_TO_HOST; + } + + return success; +} + +bool USBDevice::requestSetup(void) +{ + bool success = false; + + /* Process standard requests */ + if ((transfer.setup.bmRequestType.Type == STANDARD_TYPE)) + { + switch (transfer.setup.bRequest) + { + case GET_STATUS: + success = requestGetStatus(); + break; + case CLEAR_FEATURE: + success = requestClearFeature(); + break; + case SET_FEATURE: + success = requestSetFeature(); + break; + case SET_ADDRESS: + success = requestSetAddress(); + break; + case GET_DESCRIPTOR: + success = requestGetDescriptor(); + break; + case SET_DESCRIPTOR: + /* TODO: Support is optional, not implemented here */ + success = false; + break; + case GET_CONFIGURATION: + success = requestGetConfiguration(); + break; + case SET_CONFIGURATION: + success = requestSetConfiguration(); + break; + case GET_INTERFACE: + success = requestGetInterface(); + break; + case SET_INTERFACE: + success = requestSetInterface(); + break; + default: + break; + } + } + + return success; +} + +bool USBDevice::controlSetup(void) +{ + bool success = false; + + /* Control transfer setup stage */ + uint8_t buffer[MAX_PACKET_SIZE_EP0]; + + EP0setup(buffer); + + /* Initialise control transfer state */ + decodeSetupPacket(buffer, &transfer.setup); + transfer.ptr = NULL; + transfer.remaining = 0; + transfer.direction = 0; + transfer.zlp = false; + transfer.notify = false; + +#ifdef DEBUG + printf("dataTransferDirection: %d\r\nType: %d\r\nRecipient: %d\r\nbRequest: %d\r\nwValue: %d\r\nwIndex: %d\r\nwLength: %d\r\n",transfer.setup.bmRequestType.dataTransferDirection, + transfer.setup.bmRequestType.Type, + transfer.setup.bmRequestType.Recipient, + transfer.setup.bRequest, + transfer.setup.wValue, + transfer.setup.wIndex, + transfer.setup.wLength); +#endif + + /* Class / vendor specific */ + success = USBCallback_request(); + + if (!success) + { + /* Standard requests */ + if (!requestSetup()) + { +#ifdef DEBUG + printf("fail!!!!\r\n"); +#endif + return false; + } + } + + /* Check transfer size and direction */ + if (transfer.setup.wLength>0) + { + if (transfer.setup.bmRequestType.dataTransferDirection \ + == DEVICE_TO_HOST) + { + /* IN data stage is required */ + if (transfer.direction != DEVICE_TO_HOST) + { + return false; + } + + /* Transfer must be less than or equal to the size */ + /* requested by the host */ + if (transfer.remaining > transfer.setup.wLength) + { + transfer.remaining = transfer.setup.wLength; + } + } + else + { + + /* OUT data stage is required */ + if (transfer.direction != HOST_TO_DEVICE) + { + return false; + } + + /* Transfer must be equal to the size requested by the host */ + if (transfer.remaining != transfer.setup.wLength) + { + return false; + } + } + } + else + { + /* No data stage; transfer size must be zero */ + if (transfer.remaining != 0) + { + return false; + } + } + + /* Data or status stage if applicable */ + if (transfer.setup.wLength>0) + { + if (transfer.setup.bmRequestType.dataTransferDirection \ + == DEVICE_TO_HOST) + { + /* Check if we'll need to send a zero length packet at */ + /* the end of this transfer */ + if (transfer.setup.wLength > transfer.remaining) + { + /* Device wishes to transfer less than host requested */ + if ((transfer.remaining % MAX_PACKET_SIZE_EP0) == 0) + { + /* Transfer is a multiple of EP0 max packet size */ + transfer.zlp = true; + } + } + + /* IN stage */ + controlIn(); + } + else + { + /* OUT stage */ + EP0read(); + } + } + else + { + /* Status stage */ + EP0write(NULL, 0); + } + + return true; +} + +void USBDevice::busReset(void) +{ + device.state = DEFAULT; + device.configuration = 0; + device.suspended = false; + + /* Call class / vendor specific busReset function */ + USBCallback_busReset(); +} + +void USBDevice::EP0setupCallback(void) +{ + /* Endpoint 0 setup event */ + if (!controlSetup()) + { + /* Protocol stall */ + EP0stall(); + } + + /* Return true if an OUT data stage is expected */ +} + +void USBDevice::EP0out(void) +{ + /* Endpoint 0 OUT data event */ + if (!controlOut()) + { + /* Protocol stall; this will stall both endpoints */ + EP0stall(); + } +} + +void USBDevice::EP0in(void) +{ +#ifdef DEBUG + printf("EP0IN\r\n"); +#endif + /* Endpoint 0 IN data event */ + if (!controlIn()) + { + /* Protocol stall; this will stall both endpoints */ + EP0stall(); + } +} + +bool USBDevice::configured(void) +{ + /* Returns true if device is in the CONFIGURED state */ + return (device.state == CONFIGURED); +} + +void USBDevice::connect(bool blocking) +{ + /* Connect device */ + USBHAL::connect(); + + if (blocking) { + /* Block if not configured */ + while (!configured()); + } +} + +void USBDevice::disconnect(void) +{ + /* Disconnect device */ + USBHAL::disconnect(); + + /* Set initial device state */ + device.state = POWERED; + device.configuration = 0; + device.suspended = false; +} + +CONTROL_TRANSFER * USBDevice::getTransferPtr(void) +{ + return &transfer; +} + +bool USBDevice::addEndpoint(uint8_t endpoint, uint32_t maxPacket) +{ + return realiseEndpoint(endpoint, maxPacket, 0); +} + +bool USBDevice::addRateFeedbackEndpoint(uint8_t endpoint, uint32_t maxPacket) +{ + /* For interrupt endpoints only */ + return realiseEndpoint(endpoint, maxPacket, RATE_FEEDBACK_MODE); +} + +uint8_t * USBDevice::findDescriptor(uint8_t descriptorType) +{ + /* Find a descriptor within the list of descriptors */ + /* following a configuration descriptor. */ + uint16_t wTotalLength; + uint8_t *ptr; + + if (configurationDesc() == NULL) + { + return NULL; + } + + /* Check this is a configuration descriptor */ + if ((configurationDesc()[0] != CONFIGURATION_DESCRIPTOR_LENGTH) \ + || (configurationDesc()[1] != CONFIGURATION_DESCRIPTOR)) + { + return NULL; + } + + wTotalLength = configurationDesc()[2] | (configurationDesc()[3] << 8); + + /* Check there are some more descriptors to follow */ + if (wTotalLength <= (CONFIGURATION_DESCRIPTOR_LENGTH+2)) + /* +2 is for bLength and bDescriptorType of next descriptor */ + { + return NULL; + } + + /* Start at first descriptor after the configuration descriptor */ + ptr = &(((uint8_t*)configurationDesc())[CONFIGURATION_DESCRIPTOR_LENGTH]); + + do { + if (ptr[1] /* bDescriptorType */ == descriptorType) + { + /* Found */ + return ptr; + } + + /* Skip to next descriptor */ + ptr += ptr[0]; /* bLength */ + } while (ptr < (configurationDesc() + wTotalLength)); + + /* Reached end of the descriptors - not found */ + return NULL; +} + + +void USBDevice::connectStateChanged(unsigned int connected) +{ +} + +void USBDevice::suspendStateChanged(unsigned int suspended) +{ +} + + +USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release){ + VENDOR_ID = vendor_id; + PRODUCT_ID = product_id; + PRODUCT_RELEASE = product_release; + + /* Set initial device state */ + device.state = POWERED; + device.configuration = 0; + device.suspended = false; +}; + + +bool USBDevice::readStart(uint8_t endpoint, uint32_t maxSize) +{ + return endpointRead(endpoint, maxSize) == EP_PENDING; +} + + +bool USBDevice::write(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_t maxSize) +{ + EP_STATUS result; + + if (size > maxSize) + { + return false; + } + + + if(!configured()) { + return false; + } + + /* Send report */ + result = endpointWrite(endpoint, buffer, size); + + if (result != EP_PENDING) + { + return false; + } + + /* Wait for completion */ + do { + result = endpointWriteResult(endpoint); + } while ((result == EP_PENDING) && configured()); + + return (result == EP_COMPLETED); +} + + +bool USBDevice::writeNB(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_t maxSize) +{ + EP_STATUS result; + + if (size > maxSize) + { + return false; + } + + if(!configured()) { + return false; + } + + /* Send report */ + result = endpointWrite(endpoint, buffer, size); + + if (result != EP_PENDING) + { + return false; + } + + result = endpointWriteResult(endpoint); + + return (result == EP_COMPLETED); +} + + + +bool USBDevice::readEP(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint32_t maxSize) +{ + EP_STATUS result; + + if(!configured()) { + return false; + } + + /* Wait for completion */ + do { + result = endpointReadResult(endpoint, buffer, size); + } while ((result == EP_PENDING) && configured()); + + return (result == EP_COMPLETED); +} + + +bool USBDevice::readEP_NB(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint32_t maxSize) +{ + EP_STATUS result; + + if(!configured()) { + return false; + } + + result = endpointReadResult(endpoint, buffer, size); + + return (result == EP_COMPLETED); +} + + + +const uint8_t * USBDevice::deviceDesc() { + uint8_t deviceDescriptorTemp[] = { + DEVICE_DESCRIPTOR_LENGTH, /* bLength */ + DEVICE_DESCRIPTOR, /* bDescriptorType */ + LSB(USB_VERSION_2_0), /* bcdUSB (LSB) */ + MSB(USB_VERSION_2_0), /* bcdUSB (MSB) */ + 0x00, /* bDeviceClass */ + 0x00, /* bDeviceSubClass */ + 0x00, /* bDeviceprotocol */ + MAX_PACKET_SIZE_EP0, /* bMaxPacketSize0 */ + (uint8_t)(LSB(VENDOR_ID)), /* idVendor (LSB) */ + (uint8_t)(MSB(VENDOR_ID)), /* idVendor (MSB) */ + (uint8_t)(LSB(PRODUCT_ID)), /* idProduct (LSB) */ + (uint8_t)(MSB(PRODUCT_ID)), /* idProduct (MSB) */ + (uint8_t)(LSB(PRODUCT_RELEASE)), /* bcdDevice (LSB) */ + (uint8_t)(MSB(PRODUCT_RELEASE)), /* bcdDevice (MSB) */ + STRING_OFFSET_IMANUFACTURER, /* iManufacturer */ + STRING_OFFSET_IPRODUCT, /* iProduct */ + STRING_OFFSET_ISERIAL, /* iSerialNumber */ + 0x01 /* bNumConfigurations */ + }; + MBED_ASSERT(sizeof(deviceDescriptorTemp) == sizeof(deviceDescriptor)); + memcpy(deviceDescriptor, deviceDescriptorTemp, sizeof(deviceDescriptor)); + return deviceDescriptor; +} + +const uint8_t * USBDevice::stringLangidDesc() { + static const uint8_t stringLangidDescriptor[] = { + 0x04, /*bLength*/ + STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ + 0x09,0x04, /*bString Lang ID - 0x0409 - English*/ + }; + return (uint8_t *)stringLangidDescriptor; +} + +const uint8_t * USBDevice::stringImanufacturerDesc() { + static const uint8_t stringImanufacturerDescriptor[] = { + 0x12, /*bLength*/ + STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ + 'm',0,'b',0,'e',0,'d',0,'.',0,'o',0,'r',0,'g',0, /*bString iManufacturer - mbed.org*/ + }; + return stringImanufacturerDescriptor; +} + +const uint8_t * USBDevice::stringIserialDesc() { + static const uint8_t stringIserialDescriptor[] = { + 0x16, /*bLength*/ + STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ + '0',0,'1',0,'2',0,'3',0,'4',0,'5',0,'6',0,'7',0,'8',0,'9',0, /*bString iSerial - 0123456789*/ + }; + return stringIserialDescriptor; +} + +const uint8_t * USBDevice::stringIConfigurationDesc() { + static const uint8_t stringIconfigurationDescriptor[] = { + 0x06, /*bLength*/ + STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ + '0',0,'1',0, /*bString iConfiguration - 01*/ + }; + return stringIconfigurationDescriptor; +} + +const uint8_t * USBDevice::stringIinterfaceDesc() { + static const uint8_t stringIinterfaceDescriptor[] = { + 0x08, /*bLength*/ + STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ + 'U',0,'S',0,'B',0, /*bString iInterface - USB*/ + }; + return stringIinterfaceDescriptor; +} + +const uint8_t * USBDevice::stringIproductDesc() { + static const uint8_t stringIproductDescriptor[] = { + 0x16, /*bLength*/ + STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ + 'U',0,'S',0,'B',0,' ',0,'D',0,'E',0,'V',0,'I',0,'C',0,'E',0 /*bString iProduct - USB DEVICE*/ + }; + return stringIproductDescriptor; +} diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h new file mode 100644 index 00000000000..60a280ed658 --- /dev/null +++ b/usb/device/USBDevice/USBDevice.h @@ -0,0 +1,272 @@ +/* Copyright (c) 2010-2011 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#ifndef USBDEVICE_H +#define USBDEVICE_H + +#include "mbed.h" +#include "USBDevice_Types.h" +#include "USBHAL.h" + +class USBDevice: public USBHAL +{ +public: + USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release); + + /* + * Check if the device is configured + * + * @returns true if configured, false otherwise + */ + bool configured(void); + + /* + * Connect a device + * + * @param blocking: block if not configured + */ + void connect(bool blocking = true); + + /* + * Disconnect a device + */ + void disconnect(void); + + /* + * Add an endpoint + * + * @param endpoint endpoint which will be added + * @param maxPacket Maximum size of a packet which can be sent for this endpoint + * @returns true if successful, false otherwise + */ + bool addEndpoint(uint8_t endpoint, uint32_t maxPacket); + + /* + * Start a reading on a certain endpoint. + * You can access the result of the reading by USBDevice_read + * + * @param endpoint endpoint which will be read + * @param maxSize the maximum length that can be read + * @return true if successful + */ + bool readStart(uint8_t endpoint, uint32_t maxSize); + + /* + * Read a certain endpoint. Before calling this function, USBUSBDevice_readStart + * must be called. + * + * Warning: blocking + * + * @param endpoint endpoint which will be read + * @param buffer buffer will be filled with the data received + * @param size the number of bytes read will be stored in *size + * @param maxSize the maximum length that can be read + * @returns true if successful + */ + bool readEP(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint32_t maxSize); + + /* + * Read a certain endpoint. + * + * Warning: non blocking + * + * @param endpoint endpoint which will be read + * @param buffer buffer will be filled with the data received (if data are available) + * @param size the number of bytes read will be stored in *size + * @param maxSize the maximum length that can be read + * @returns true if successful + */ + bool readEP_NB(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint32_t maxSize); + + /* + * Write a certain endpoint. + * + * Warning: blocking + * + * @param endpoint endpoint to write + * @param buffer data contained in buffer will be write + * @param size the number of bytes to write + * @param maxSize the maximum length that can be written on this endpoint + */ + bool write(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_t maxSize); + + + /* + * Write a certain endpoint. + * + * Warning: non blocking + * + * @param endpoint endpoint to write + * @param buffer data contained in buffer will be write + * @param size the number of bytes to write + * @param maxSize the maximum length that can be written on this endpoint + */ + bool writeNB(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_t maxSize); + + + /* + * Called by USBDevice layer on bus reset. Warning: Called in ISR context + * + * May be used to reset state + */ + virtual void USBCallback_busReset(void) {}; + + /* + * Called by USBDevice on Endpoint0 request. Warning: Called in ISR context + * This is used to handle extensions to standard requests + * and class specific requests + * + * @returns true if class handles this request + */ + virtual bool USBCallback_request() { return false; }; + + /* + * Called by USBDevice on Endpoint0 request completion + * if the 'notify' flag has been set to true. Warning: Called in ISR context + * + * In this case it is used to indicate that a HID report has + * been received from the host on endpoint 0 + * + * @param buf buffer received on endpoint 0 + * @param length length of this buffer + */ + virtual void USBCallback_requestCompleted(uint8_t * buf, uint32_t length) {}; + + /* + * Called by USBDevice layer. Set configuration of the device. + * For instance, you can add all endpoints that you need on this function. + * + * @param configuration Number of the configuration + */ + virtual bool USBCallback_setConfiguration(uint8_t configuration) { return false; }; + + /* + * Called by USBDevice layer. Set interface/alternate of the device. + * + * @param interface Number of the interface to be configured + * @param alternate Number of the alternate to be configured + * @returns true if class handles this request + */ + virtual bool USBCallback_setInterface(uint16_t interface, uint8_t alternate) { return false; }; + + /* + * Get device descriptor. + * + * @returns pointer to the device descriptor + */ + virtual const uint8_t * deviceDesc(); + + /* + * Get configuration descriptor + * + * @returns pointer to the configuration descriptor + */ + virtual const uint8_t * configurationDesc(){return NULL;}; + + /* + * Get string lang id descriptor + * + * @return pointer to the string lang id descriptor + */ + virtual const uint8_t * stringLangidDesc(); + + /* + * Get string manufacturer descriptor + * + * @returns pointer to the string manufacturer descriptor + */ + virtual const uint8_t * stringImanufacturerDesc(); + + /* + * Get string product descriptor + * + * @returns pointer to the string product descriptor + */ + virtual const uint8_t * stringIproductDesc(); + + /* + * Get string serial descriptor + * + * @returns pointer to the string serial descriptor + */ + virtual const uint8_t * stringIserialDesc(); + + /* + * Get string configuration descriptor + * + * @returns pointer to the string configuration descriptor + */ + virtual const uint8_t * stringIConfigurationDesc(); + + /* + * Get string interface descriptor + * + * @returns pointer to the string interface descriptor + */ + virtual const uint8_t * stringIinterfaceDesc(); + + /* + * Get the length of the report descriptor + * + * @returns length of the report descriptor + */ + virtual uint16_t reportDescLength() { return 0; }; + + + +protected: + virtual void busReset(void); + virtual void EP0setupCallback(void); + virtual void EP0out(void); + virtual void EP0in(void); + virtual void connectStateChanged(unsigned int connected); + virtual void suspendStateChanged(unsigned int suspended); + uint8_t * findDescriptor(uint8_t descriptorType); + CONTROL_TRANSFER * getTransferPtr(void); + + uint16_t VENDOR_ID; + uint16_t PRODUCT_ID; + uint16_t PRODUCT_RELEASE; + uint8_t deviceDescriptor[18]; + +private: + bool addRateFeedbackEndpoint(uint8_t endpoint, uint32_t maxPacket); + bool requestGetDescriptor(void); + bool controlOut(void); + bool controlIn(void); + bool requestSetAddress(void); + bool requestSetConfiguration(void); + bool requestSetFeature(void); + bool requestClearFeature(void); + bool requestGetStatus(void); + bool requestSetup(void); + bool controlSetup(void); + void decodeSetupPacket(uint8_t *data, SETUP_PACKET *packet); + bool requestGetConfiguration(void); + bool requestGetInterface(void); + bool requestSetInterface(void); + + CONTROL_TRANSFER transfer; + USB_DEVICE device; + + uint16_t currentInterface; + uint8_t currentAlternate; +}; + + +#endif diff --git a/usb/device/USBDevice/USBDevice_Types.h b/usb/device/USBDevice/USBDevice_Types.h new file mode 100644 index 00000000000..19bc1c2f348 --- /dev/null +++ b/usb/device/USBDevice/USBDevice_Types.h @@ -0,0 +1,83 @@ +/* Copyright (c) 2010-2011 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#ifndef USBDEVICE_TYPES_H +#define USBDEVICE_TYPES_H + +/* Standard requests */ +#define GET_STATUS (0) +#define CLEAR_FEATURE (1) +#define SET_FEATURE (3) +#define SET_ADDRESS (5) +#define GET_DESCRIPTOR (6) +#define SET_DESCRIPTOR (7) +#define GET_CONFIGURATION (8) +#define SET_CONFIGURATION (9) +#define GET_INTERFACE (10) +#define SET_INTERFACE (11) + +/* bmRequestType.dataTransferDirection */ +#define HOST_TO_DEVICE (0) +#define DEVICE_TO_HOST (1) + +/* bmRequestType.Type*/ +#define STANDARD_TYPE (0) +#define CLASS_TYPE (1) +#define VENDOR_TYPE (2) +#define RESERVED_TYPE (3) + +/* bmRequestType.Recipient */ +#define DEVICE_RECIPIENT (0) +#define INTERFACE_RECIPIENT (1) +#define ENDPOINT_RECIPIENT (2) +#define OTHER_RECIPIENT (3) + +/* Descriptors */ +#define DESCRIPTOR_TYPE(wValue) (wValue >> 8) +#define DESCRIPTOR_INDEX(wValue) (wValue & 0xff) + +typedef struct { + struct { + uint8_t dataTransferDirection; + uint8_t Type; + uint8_t Recipient; + } bmRequestType; + uint8_t bRequest; + uint16_t wValue; + uint16_t wIndex; + uint16_t wLength; +} SETUP_PACKET; + +typedef struct { + SETUP_PACKET setup; + uint8_t *ptr; + uint32_t remaining; + uint8_t direction; + bool zlp; + bool notify; +} CONTROL_TRANSFER; + +typedef enum {ATTACHED, POWERED, DEFAULT, ADDRESS, CONFIGURED} DEVICE_STATE; + +typedef struct { + volatile DEVICE_STATE state; + uint8_t configuration; + bool suspended; +} USB_DEVICE; + +#endif From a51cc24fe0acdad82c14fa1a074ae11a1b6049a9 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 26 Feb 2018 09:32:14 -0600 Subject: [PATCH 003/488] Update USB licenses and format code Update USB licenses from MIT to Apache 2 and run astyle on the code. --- usb/device/USBDevice/USBDescriptor.h | 32 +- usb/device/USBDevice/USBDevice.cpp | 480 +++++++++++-------------- usb/device/USBDevice/USBDevice.h | 88 +++-- usb/device/USBDevice/USBDevice_Types.h | 32 +- 4 files changed, 285 insertions(+), 347 deletions(-) diff --git a/usb/device/USBDevice/USBDescriptor.h b/usb/device/USBDevice/USBDescriptor.h index 9d4ce849f09..afc9684086a 100644 --- a/usb/device/USBDevice/USBDescriptor.h +++ b/usb/device/USBDevice/USBDescriptor.h @@ -1,20 +1,18 @@ -/* Copyright (c) 2010-2011 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ /* Standard descriptor types */ #define DEVICE_DESCRIPTOR (1) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 438174fe2a9..32a03422f37 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -1,20 +1,18 @@ -/* Copyright (c) 2010-2011 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include "stdint.h" @@ -46,38 +44,33 @@ bool USBDevice::requestGetDescriptor(void) #ifdef DEBUG printf("get descr: type: %d\r\n", DESCRIPTOR_TYPE(transfer.setup.wValue)); #endif - switch (DESCRIPTOR_TYPE(transfer.setup.wValue)) - { + switch (DESCRIPTOR_TYPE(transfer.setup.wValue)) { case DEVICE_DESCRIPTOR: - if (deviceDesc() != NULL) - { + if (deviceDesc() != NULL) { if ((deviceDesc()[0] == DEVICE_DESCRIPTOR_LENGTH) \ - && (deviceDesc()[1] == DEVICE_DESCRIPTOR)) - { + && (deviceDesc()[1] == DEVICE_DESCRIPTOR)) { #ifdef DEBUG printf("device descr\r\n"); #endif transfer.remaining = DEVICE_DESCRIPTOR_LENGTH; - transfer.ptr = (uint8_t*)deviceDesc(); + transfer.ptr = (uint8_t *)deviceDesc(); transfer.direction = DEVICE_TO_HOST; success = true; } } break; case CONFIGURATION_DESCRIPTOR: - if (configurationDesc() != NULL) - { + if (configurationDesc() != NULL) { if ((configurationDesc()[0] == CONFIGURATION_DESCRIPTOR_LENGTH) \ - && (configurationDesc()[1] == CONFIGURATION_DESCRIPTOR)) - { + && (configurationDesc()[1] == CONFIGURATION_DESCRIPTOR)) { #ifdef DEBUG printf("conf descr request\r\n"); #endif /* Get wTotalLength */ transfer.remaining = configurationDesc()[2] \ - | (configurationDesc()[3] << 8); + | (configurationDesc()[3] << 8); - transfer.ptr = (uint8_t*)configurationDesc(); + transfer.ptr = (uint8_t *)configurationDesc(); transfer.direction = DEVICE_TO_HOST; success = true; } @@ -87,62 +80,61 @@ bool USBDevice::requestGetDescriptor(void) #ifdef DEBUG printf("str descriptor\r\n"); #endif - switch (DESCRIPTOR_INDEX(transfer.setup.wValue)) - { - case STRING_OFFSET_LANGID: + switch (DESCRIPTOR_INDEX(transfer.setup.wValue)) { + case STRING_OFFSET_LANGID: #ifdef DEBUG - printf("1\r\n"); + printf("1\r\n"); #endif - transfer.remaining = stringLangidDesc()[0]; - transfer.ptr = (uint8_t*)stringLangidDesc(); - transfer.direction = DEVICE_TO_HOST; - success = true; - break; - case STRING_OFFSET_IMANUFACTURER: + transfer.remaining = stringLangidDesc()[0]; + transfer.ptr = (uint8_t *)stringLangidDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_IMANUFACTURER: #ifdef DEBUG - printf("2\r\n"); + printf("2\r\n"); #endif - transfer.remaining = stringImanufacturerDesc()[0]; - transfer.ptr = (uint8_t*)stringImanufacturerDesc(); - transfer.direction = DEVICE_TO_HOST; - success = true; - break; - case STRING_OFFSET_IPRODUCT: + transfer.remaining = stringImanufacturerDesc()[0]; + transfer.ptr = (uint8_t *)stringImanufacturerDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_IPRODUCT: #ifdef DEBUG - printf("3\r\n"); + printf("3\r\n"); #endif - transfer.remaining = stringIproductDesc()[0]; - transfer.ptr = (uint8_t*)stringIproductDesc(); - transfer.direction = DEVICE_TO_HOST; - success = true; - break; - case STRING_OFFSET_ISERIAL: + transfer.remaining = stringIproductDesc()[0]; + transfer.ptr = (uint8_t *)stringIproductDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_ISERIAL: #ifdef DEBUG - printf("4\r\n"); + printf("4\r\n"); #endif - transfer.remaining = stringIserialDesc()[0]; - transfer.ptr = (uint8_t*)stringIserialDesc(); - transfer.direction = DEVICE_TO_HOST; - success = true; - break; - case STRING_OFFSET_ICONFIGURATION: + transfer.remaining = stringIserialDesc()[0]; + transfer.ptr = (uint8_t *)stringIserialDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_ICONFIGURATION: #ifdef DEBUG - printf("5\r\n"); + printf("5\r\n"); #endif - transfer.remaining = stringIConfigurationDesc()[0]; - transfer.ptr = (uint8_t*)stringIConfigurationDesc(); - transfer.direction = DEVICE_TO_HOST; - success = true; - break; - case STRING_OFFSET_IINTERFACE: + transfer.remaining = stringIConfigurationDesc()[0]; + transfer.ptr = (uint8_t *)stringIConfigurationDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_IINTERFACE: #ifdef DEBUG - printf("6\r\n"); + printf("6\r\n"); #endif - transfer.remaining = stringIinterfaceDesc()[0]; - transfer.ptr = (uint8_t*)stringIinterfaceDesc(); - transfer.direction = DEVICE_TO_HOST; - success = true; - break; + transfer.remaining = stringIinterfaceDesc()[0]; + transfer.ptr = (uint8_t *)stringIinterfaceDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; } break; case INTERFACE_DESCRIPTOR: @@ -185,18 +177,16 @@ bool USBDevice::controlOut(void) uint32_t packetSize; /* Check we should be transferring data OUT */ - if (transfer.direction != HOST_TO_DEVICE) - { - /* for other platforms, count on the HAL to handle this case */ - return false; + if (transfer.direction != HOST_TO_DEVICE) { + /* for other platforms, count on the HAL to handle this case */ + return false; } /* Read from endpoint */ packetSize = EP0getReadResult(buffer); /* Check if transfer size is valid */ - if (packetSize > transfer.remaining) - { + if (packetSize > transfer.remaining) { /* Too big */ return false; } @@ -206,20 +196,16 @@ bool USBDevice::controlOut(void) transfer.remaining -= packetSize; /* Check if transfer has completed */ - if (transfer.remaining == 0) - { + if (transfer.remaining == 0) { /* Transfer completed */ - if (transfer.notify) - { + if (transfer.notify) { /* Notify class layer. */ USBCallback_requestCompleted(buffer, packetSize); transfer.notify = false; } /* Status stage */ EP0write(NULL, 0); - } - else - { + } else { EP0read(); } @@ -233,18 +219,15 @@ bool USBDevice::controlIn(void) /* Check if transfer has completed (status stage transactions */ /* also have transfer.remaining == 0) */ - if (transfer.remaining == 0) - { - if (transfer.zlp) - { + if (transfer.remaining == 0) { + if (transfer.zlp) { /* Send zero length packet */ EP0write(NULL, 0); transfer.zlp = false; } /* Transfer completed */ - if (transfer.notify) - { + if (transfer.notify) { /* Notify class layer. */ USBCallback_requestCompleted(NULL, 0); transfer.notify = false; @@ -258,15 +241,13 @@ bool USBDevice::controlIn(void) } /* Check we should be transferring data IN */ - if (transfer.direction != DEVICE_TO_HOST) - { + if (transfer.direction != DEVICE_TO_HOST) { return false; } packetSize = transfer.remaining; - if (packetSize > MAX_PACKET_SIZE_EP0) - { + if (packetSize > MAX_PACKET_SIZE_EP0) { packetSize = MAX_PACKET_SIZE_EP0; } @@ -285,12 +266,9 @@ bool USBDevice::requestSetAddress(void) /* Set the device address */ setAddress(transfer.setup.wValue); - if (transfer.setup.wValue == 0) - { + if (transfer.setup.wValue == 0) { device.state = DEFAULT; - } - else - { + } else { device.state = ADDRESS; } @@ -302,22 +280,16 @@ bool USBDevice::requestSetConfiguration(void) device.configuration = transfer.setup.wValue; /* Set the device configuration */ - if (device.configuration == 0) - { + if (device.configuration == 0) { /* Not configured */ unconfigureDevice(); device.state = ADDRESS; - } - else - { - if (USBCallback_setConfiguration(device.configuration)) - { + } else { + if (USBCallback_setConfiguration(device.configuration)) { /* Valid configuration */ configureDevice(); device.state = CONFIGURED; - } - else - { + } else { return false; } } @@ -338,8 +310,7 @@ bool USBDevice::requestGetInterface(void) { /* Return the selected alternate setting for an interface */ - if (device.state != CONFIGURED) - { + if (device.state != CONFIGURED) { return false; } @@ -354,8 +325,7 @@ bool USBDevice::requestGetInterface(void) bool USBDevice::requestSetInterface(void) { bool success = false; - if(USBCallback_setInterface(transfer.setup.wIndex, transfer.setup.wValue)) - { + if (USBCallback_setInterface(transfer.setup.wIndex, transfer.setup.wValue)) { success = true; currentInterface = transfer.setup.wIndex; currentAlternate = transfer.setup.wValue; @@ -367,23 +337,19 @@ bool USBDevice::requestSetFeature() { bool success = false; - if (device.state != CONFIGURED) - { + if (device.state != CONFIGURED) { /* Endpoint or interface must be zero */ - if (transfer.setup.wIndex != 0) - { + if (transfer.setup.wIndex != 0) { return false; } } - switch (transfer.setup.bmRequestType.Recipient) - { + switch (transfer.setup.bmRequestType.Recipient) { case DEVICE_RECIPIENT: /* TODO: Remote wakeup feature not supported */ break; case ENDPOINT_RECIPIENT: - if (transfer.setup.wValue == ENDPOINT_HALT) - { + if (transfer.setup.wValue == ENDPOINT_HALT) { /* TODO: We should check that the endpoint number is valid */ stallEndpoint( WINDEX_TO_PHYSICAL(transfer.setup.wIndex)); @@ -401,25 +367,21 @@ bool USBDevice::requestClearFeature() { bool success = false; - if (device.state != CONFIGURED) - { + if (device.state != CONFIGURED) { /* Endpoint or interface must be zero */ - if (transfer.setup.wIndex != 0) - { + if (transfer.setup.wIndex != 0) { return false; } } - switch (transfer.setup.bmRequestType.Recipient) - { + switch (transfer.setup.bmRequestType.Recipient) { case DEVICE_RECIPIENT: /* TODO: Remote wakeup feature not supported */ break; case ENDPOINT_RECIPIENT: /* TODO: We should check that the endpoint number is valid */ - if (transfer.setup.wValue == ENDPOINT_HALT) - { - unstallEndpoint( WINDEX_TO_PHYSICAL(transfer.setup.wIndex)); + if (transfer.setup.wValue == ENDPOINT_HALT) { + unstallEndpoint(WINDEX_TO_PHYSICAL(transfer.setup.wIndex)); success = true; } break; @@ -435,17 +397,14 @@ bool USBDevice::requestGetStatus(void) static uint16_t status; bool success = false; - if (device.state != CONFIGURED) - { + if (device.state != CONFIGURED) { /* Endpoint or interface must be zero */ - if (transfer.setup.wIndex != 0) - { + if (transfer.setup.wIndex != 0) { return false; } } - switch (transfer.setup.bmRequestType.Recipient) - { + switch (transfer.setup.bmRequestType.Recipient) { case DEVICE_RECIPIENT: /* TODO: Currently only supports self powered devices */ status = DEVICE_STATUS_SELF_POWERED; @@ -458,12 +417,9 @@ bool USBDevice::requestGetStatus(void) case ENDPOINT_RECIPIENT: /* TODO: We should check that the endpoint number is valid */ if (getEndpointStallState( - WINDEX_TO_PHYSICAL(transfer.setup.wIndex))) - { + WINDEX_TO_PHYSICAL(transfer.setup.wIndex))) { status = ENDPOINT_STATUS_HALT; - } - else - { + } else { status = 0; } success = true; @@ -472,8 +428,7 @@ bool USBDevice::requestGetStatus(void) break; } - if (success) - { + if (success) { /* Send the status */ transfer.ptr = (uint8_t *)&status; /* Assumes little endian */ transfer.remaining = sizeof(status); @@ -488,43 +443,41 @@ bool USBDevice::requestSetup(void) bool success = false; /* Process standard requests */ - if ((transfer.setup.bmRequestType.Type == STANDARD_TYPE)) - { - switch (transfer.setup.bRequest) - { - case GET_STATUS: - success = requestGetStatus(); - break; - case CLEAR_FEATURE: - success = requestClearFeature(); - break; - case SET_FEATURE: - success = requestSetFeature(); - break; - case SET_ADDRESS: + if ((transfer.setup.bmRequestType.Type == STANDARD_TYPE)) { + switch (transfer.setup.bRequest) { + case GET_STATUS: + success = requestGetStatus(); + break; + case CLEAR_FEATURE: + success = requestClearFeature(); + break; + case SET_FEATURE: + success = requestSetFeature(); + break; + case SET_ADDRESS: success = requestSetAddress(); - break; - case GET_DESCRIPTOR: - success = requestGetDescriptor(); - break; - case SET_DESCRIPTOR: - /* TODO: Support is optional, not implemented here */ - success = false; - break; - case GET_CONFIGURATION: - success = requestGetConfiguration(); - break; - case SET_CONFIGURATION: - success = requestSetConfiguration(); - break; - case GET_INTERFACE: - success = requestGetInterface(); - break; - case SET_INTERFACE: - success = requestSetInterface(); - break; - default: - break; + break; + case GET_DESCRIPTOR: + success = requestGetDescriptor(); + break; + case SET_DESCRIPTOR: + /* TODO: Support is optional, not implemented here */ + success = false; + break; + case GET_CONFIGURATION: + success = requestGetConfiguration(); + break; + case SET_CONFIGURATION: + success = requestSetConfiguration(); + break; + case GET_INTERFACE: + success = requestGetInterface(); + break; + case SET_INTERFACE: + success = requestSetInterface(); + break; + default: + break; } } @@ -549,23 +502,21 @@ bool USBDevice::controlSetup(void) transfer.notify = false; #ifdef DEBUG - printf("dataTransferDirection: %d\r\nType: %d\r\nRecipient: %d\r\nbRequest: %d\r\nwValue: %d\r\nwIndex: %d\r\nwLength: %d\r\n",transfer.setup.bmRequestType.dataTransferDirection, - transfer.setup.bmRequestType.Type, - transfer.setup.bmRequestType.Recipient, - transfer.setup.bRequest, - transfer.setup.wValue, - transfer.setup.wIndex, - transfer.setup.wLength); + printf("dataTransferDirection: %d\r\nType: %d\r\nRecipient: %d\r\nbRequest: %d\r\nwValue: %d\r\nwIndex: %d\r\nwLength: %d\r\n", transfer.setup.bmRequestType.dataTransferDirection, + transfer.setup.bmRequestType.Type, + transfer.setup.bmRequestType.Recipient, + transfer.setup.bRequest, + transfer.setup.wValue, + transfer.setup.wIndex, + transfer.setup.wLength); #endif /* Class / vendor specific */ success = USBCallback_request(); - if (!success) - { + if (!success) { /* Standard requests */ - if (!requestSetup()) - { + if (!requestSetup()) { #ifdef DEBUG printf("fail!!!!\r\n"); #endif @@ -574,62 +525,47 @@ bool USBDevice::controlSetup(void) } /* Check transfer size and direction */ - if (transfer.setup.wLength>0) - { + if (transfer.setup.wLength > 0) { if (transfer.setup.bmRequestType.dataTransferDirection \ - == DEVICE_TO_HOST) - { + == DEVICE_TO_HOST) { /* IN data stage is required */ - if (transfer.direction != DEVICE_TO_HOST) - { + if (transfer.direction != DEVICE_TO_HOST) { return false; } /* Transfer must be less than or equal to the size */ /* requested by the host */ - if (transfer.remaining > transfer.setup.wLength) - { + if (transfer.remaining > transfer.setup.wLength) { transfer.remaining = transfer.setup.wLength; } - } - else - { + } else { /* OUT data stage is required */ - if (transfer.direction != HOST_TO_DEVICE) - { + if (transfer.direction != HOST_TO_DEVICE) { return false; } /* Transfer must be equal to the size requested by the host */ - if (transfer.remaining != transfer.setup.wLength) - { + if (transfer.remaining != transfer.setup.wLength) { return false; } } - } - else - { + } else { /* No data stage; transfer size must be zero */ - if (transfer.remaining != 0) - { + if (transfer.remaining != 0) { return false; } } /* Data or status stage if applicable */ - if (transfer.setup.wLength>0) - { + if (transfer.setup.wLength > 0) { if (transfer.setup.bmRequestType.dataTransferDirection \ - == DEVICE_TO_HOST) - { + == DEVICE_TO_HOST) { /* Check if we'll need to send a zero length packet at */ /* the end of this transfer */ - if (transfer.setup.wLength > transfer.remaining) - { + if (transfer.setup.wLength > transfer.remaining) { /* Device wishes to transfer less than host requested */ - if ((transfer.remaining % MAX_PACKET_SIZE_EP0) == 0) - { + if ((transfer.remaining % MAX_PACKET_SIZE_EP0) == 0) { /* Transfer is a multiple of EP0 max packet size */ transfer.zlp = true; } @@ -637,15 +573,11 @@ bool USBDevice::controlSetup(void) /* IN stage */ controlIn(); - } - else - { + } else { /* OUT stage */ EP0read(); } - } - else - { + } else { /* Status stage */ EP0write(NULL, 0); } @@ -666,8 +598,7 @@ void USBDevice::busReset(void) void USBDevice::EP0setupCallback(void) { /* Endpoint 0 setup event */ - if (!controlSetup()) - { + if (!controlSetup()) { /* Protocol stall */ EP0stall(); } @@ -678,8 +609,7 @@ void USBDevice::EP0setupCallback(void) void USBDevice::EP0out(void) { /* Endpoint 0 OUT data event */ - if (!controlOut()) - { + if (!controlOut()) { /* Protocol stall; this will stall both endpoints */ EP0stall(); } @@ -691,8 +621,7 @@ void USBDevice::EP0in(void) printf("EP0IN\r\n"); #endif /* Endpoint 0 IN data event */ - if (!controlIn()) - { + if (!controlIn()) { /* Protocol stall; this will stall both endpoints */ EP0stall(); } @@ -719,14 +648,14 @@ void USBDevice::disconnect(void) { /* Disconnect device */ USBHAL::disconnect(); - + /* Set initial device state */ device.state = POWERED; device.configuration = 0; device.suspended = false; } -CONTROL_TRANSFER * USBDevice::getTransferPtr(void) +CONTROL_TRANSFER *USBDevice::getTransferPtr(void) { return &transfer; } @@ -742,40 +671,37 @@ bool USBDevice::addRateFeedbackEndpoint(uint8_t endpoint, uint32_t maxPacket) return realiseEndpoint(endpoint, maxPacket, RATE_FEEDBACK_MODE); } -uint8_t * USBDevice::findDescriptor(uint8_t descriptorType) +uint8_t *USBDevice::findDescriptor(uint8_t descriptorType) { /* Find a descriptor within the list of descriptors */ /* following a configuration descriptor. */ uint16_t wTotalLength; uint8_t *ptr; - if (configurationDesc() == NULL) - { + if (configurationDesc() == NULL) { return NULL; } /* Check this is a configuration descriptor */ if ((configurationDesc()[0] != CONFIGURATION_DESCRIPTOR_LENGTH) \ - || (configurationDesc()[1] != CONFIGURATION_DESCRIPTOR)) - { + || (configurationDesc()[1] != CONFIGURATION_DESCRIPTOR)) { return NULL; } wTotalLength = configurationDesc()[2] | (configurationDesc()[3] << 8); /* Check there are some more descriptors to follow */ - if (wTotalLength <= (CONFIGURATION_DESCRIPTOR_LENGTH+2)) - /* +2 is for bLength and bDescriptorType of next descriptor */ + if (wTotalLength <= (CONFIGURATION_DESCRIPTOR_LENGTH + 2)) + /* +2 is for bLength and bDescriptorType of next descriptor */ { return NULL; } /* Start at first descriptor after the configuration descriptor */ - ptr = &(((uint8_t*)configurationDesc())[CONFIGURATION_DESCRIPTOR_LENGTH]); + ptr = &(((uint8_t *)configurationDesc())[CONFIGURATION_DESCRIPTOR_LENGTH]); do { - if (ptr[1] /* bDescriptorType */ == descriptorType) - { + if (ptr[1] /* bDescriptorType */ == descriptorType) { /* Found */ return ptr; } @@ -798,7 +724,8 @@ void USBDevice::suspendStateChanged(unsigned int suspended) } -USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release){ +USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release) +{ VENDOR_ID = vendor_id; PRODUCT_ID = product_id; PRODUCT_RELEASE = product_release; @@ -816,25 +743,23 @@ bool USBDevice::readStart(uint8_t endpoint, uint32_t maxSize) } -bool USBDevice::write(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_t maxSize) +bool USBDevice::write(uint8_t endpoint, uint8_t *buffer, uint32_t size, uint32_t maxSize) { EP_STATUS result; - if (size > maxSize) - { + if (size > maxSize) { return false; } - if(!configured()) { + if (!configured()) { return false; } /* Send report */ result = endpointWrite(endpoint, buffer, size); - if (result != EP_PENDING) - { + if (result != EP_PENDING) { return false; } @@ -847,24 +772,22 @@ bool USBDevice::write(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_ } -bool USBDevice::writeNB(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_t maxSize) +bool USBDevice::writeNB(uint8_t endpoint, uint8_t *buffer, uint32_t size, uint32_t maxSize) { EP_STATUS result; - if (size > maxSize) - { + if (size > maxSize) { return false; } - if(!configured()) { + if (!configured()) { return false; } /* Send report */ result = endpointWrite(endpoint, buffer, size); - if (result != EP_PENDING) - { + if (result != EP_PENDING) { return false; } @@ -875,11 +798,11 @@ bool USBDevice::writeNB(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint3 -bool USBDevice::readEP(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint32_t maxSize) +bool USBDevice::readEP(uint8_t endpoint, uint8_t *buffer, uint32_t *size, uint32_t maxSize) { EP_STATUS result; - if(!configured()) { + if (!configured()) { return false; } @@ -892,11 +815,11 @@ bool USBDevice::readEP(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint } -bool USBDevice::readEP_NB(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint32_t maxSize) +bool USBDevice::readEP_NB(uint8_t endpoint, uint8_t *buffer, uint32_t *size, uint32_t maxSize) { EP_STATUS result; - if(!configured()) { + if (!configured()) { return false; } @@ -907,7 +830,8 @@ bool USBDevice::readEP_NB(uint8_t endpoint, uint8_t * buffer, uint32_t * size, u -const uint8_t * USBDevice::deviceDesc() { +const uint8_t *USBDevice::deviceDesc() +{ uint8_t deviceDescriptorTemp[] = { DEVICE_DESCRIPTOR_LENGTH, /* bLength */ DEVICE_DESCRIPTOR, /* bDescriptorType */ @@ -933,56 +857,62 @@ const uint8_t * USBDevice::deviceDesc() { return deviceDescriptor; } -const uint8_t * USBDevice::stringLangidDesc() { +const uint8_t *USBDevice::stringLangidDesc() +{ static const uint8_t stringLangidDescriptor[] = { 0x04, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ - 0x09,0x04, /*bString Lang ID - 0x0409 - English*/ + 0x09, 0x04, /*bString Lang ID - 0x0409 - English*/ }; return (uint8_t *)stringLangidDescriptor; } -const uint8_t * USBDevice::stringImanufacturerDesc() { +const uint8_t *USBDevice::stringImanufacturerDesc() +{ static const uint8_t stringImanufacturerDescriptor[] = { 0x12, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ - 'm',0,'b',0,'e',0,'d',0,'.',0,'o',0,'r',0,'g',0, /*bString iManufacturer - mbed.org*/ + 'm', 0, 'b', 0, 'e', 0, 'd', 0, '.', 0, 'o', 0, 'r', 0, 'g', 0, /*bString iManufacturer - mbed.org*/ }; return stringImanufacturerDescriptor; } -const uint8_t * USBDevice::stringIserialDesc() { +const uint8_t *USBDevice::stringIserialDesc() +{ static const uint8_t stringIserialDescriptor[] = { 0x16, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ - '0',0,'1',0,'2',0,'3',0,'4',0,'5',0,'6',0,'7',0,'8',0,'9',0, /*bString iSerial - 0123456789*/ + '0', 0, '1', 0, '2', 0, '3', 0, '4', 0, '5', 0, '6', 0, '7', 0, '8', 0, '9', 0, /*bString iSerial - 0123456789*/ }; return stringIserialDescriptor; } -const uint8_t * USBDevice::stringIConfigurationDesc() { +const uint8_t *USBDevice::stringIConfigurationDesc() +{ static const uint8_t stringIconfigurationDescriptor[] = { 0x06, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ - '0',0,'1',0, /*bString iConfiguration - 01*/ + '0', 0, '1', 0, /*bString iConfiguration - 01*/ }; return stringIconfigurationDescriptor; } -const uint8_t * USBDevice::stringIinterfaceDesc() { +const uint8_t *USBDevice::stringIinterfaceDesc() +{ static const uint8_t stringIinterfaceDescriptor[] = { 0x08, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ - 'U',0,'S',0,'B',0, /*bString iInterface - USB*/ + 'U', 0, 'S', 0, 'B', 0, /*bString iInterface - USB*/ }; return stringIinterfaceDescriptor; } -const uint8_t * USBDevice::stringIproductDesc() { +const uint8_t *USBDevice::stringIproductDesc() +{ static const uint8_t stringIproductDescriptor[] = { 0x16, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ - 'U',0,'S',0,'B',0,' ',0,'D',0,'E',0,'V',0,'I',0,'C',0,'E',0 /*bString iProduct - USB DEVICE*/ + 'U', 0, 'S', 0, 'B', 0, ' ', 0, 'D', 0, 'E', 0, 'V', 0, 'I', 0, 'C', 0, 'E', 0 /*bString iProduct - USB DEVICE*/ }; return stringIproductDescriptor; } diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 60a280ed658..9ee962841de 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -1,20 +1,18 @@ -/* Copyright (c) 2010-2011 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #ifndef USBDEVICE_H #define USBDEVICE_H @@ -23,8 +21,7 @@ #include "USBDevice_Types.h" #include "USBHAL.h" -class USBDevice: public USBHAL -{ +class USBDevice: public USBHAL { public: USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release); @@ -78,7 +75,7 @@ class USBDevice: public USBHAL * @param maxSize the maximum length that can be read * @returns true if successful */ - bool readEP(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint32_t maxSize); + bool readEP(uint8_t endpoint, uint8_t *buffer, uint32_t *size, uint32_t maxSize); /* * Read a certain endpoint. @@ -91,7 +88,7 @@ class USBDevice: public USBHAL * @param maxSize the maximum length that can be read * @returns true if successful */ - bool readEP_NB(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint32_t maxSize); + bool readEP_NB(uint8_t endpoint, uint8_t *buffer, uint32_t *size, uint32_t maxSize); /* * Write a certain endpoint. @@ -103,7 +100,7 @@ class USBDevice: public USBHAL * @param size the number of bytes to write * @param maxSize the maximum length that can be written on this endpoint */ - bool write(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_t maxSize); + bool write(uint8_t endpoint, uint8_t *buffer, uint32_t size, uint32_t maxSize); /* @@ -116,7 +113,7 @@ class USBDevice: public USBHAL * @param size the number of bytes to write * @param maxSize the maximum length that can be written on this endpoint */ - bool writeNB(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_t maxSize); + bool writeNB(uint8_t endpoint, uint8_t *buffer, uint32_t size, uint32_t maxSize); /* @@ -133,7 +130,10 @@ class USBDevice: public USBHAL * * @returns true if class handles this request */ - virtual bool USBCallback_request() { return false; }; + virtual bool USBCallback_request() + { + return false; + }; /* * Called by USBDevice on Endpoint0 request completion @@ -145,7 +145,7 @@ class USBDevice: public USBHAL * @param buf buffer received on endpoint 0 * @param length length of this buffer */ - virtual void USBCallback_requestCompleted(uint8_t * buf, uint32_t length) {}; + virtual void USBCallback_requestCompleted(uint8_t *buf, uint32_t length) {}; /* * Called by USBDevice layer. Set configuration of the device. @@ -153,7 +153,10 @@ class USBDevice: public USBHAL * * @param configuration Number of the configuration */ - virtual bool USBCallback_setConfiguration(uint8_t configuration) { return false; }; + virtual bool USBCallback_setConfiguration(uint8_t configuration) + { + return false; + }; /* * Called by USBDevice layer. Set interface/alternate of the device. @@ -162,70 +165,79 @@ class USBDevice: public USBHAL * @param alternate Number of the alternate to be configured * @returns true if class handles this request */ - virtual bool USBCallback_setInterface(uint16_t interface, uint8_t alternate) { return false; }; + virtual bool USBCallback_setInterface(uint16_t interface, uint8_t alternate) + { + return false; + }; /* * Get device descriptor. * * @returns pointer to the device descriptor */ - virtual const uint8_t * deviceDesc(); + virtual const uint8_t *deviceDesc(); /* * Get configuration descriptor * * @returns pointer to the configuration descriptor */ - virtual const uint8_t * configurationDesc(){return NULL;}; + virtual const uint8_t *configurationDesc() + { + return NULL; + }; /* * Get string lang id descriptor * * @return pointer to the string lang id descriptor */ - virtual const uint8_t * stringLangidDesc(); + virtual const uint8_t *stringLangidDesc(); /* * Get string manufacturer descriptor * * @returns pointer to the string manufacturer descriptor */ - virtual const uint8_t * stringImanufacturerDesc(); + virtual const uint8_t *stringImanufacturerDesc(); /* * Get string product descriptor * * @returns pointer to the string product descriptor */ - virtual const uint8_t * stringIproductDesc(); + virtual const uint8_t *stringIproductDesc(); /* * Get string serial descriptor * * @returns pointer to the string serial descriptor */ - virtual const uint8_t * stringIserialDesc(); + virtual const uint8_t *stringIserialDesc(); /* * Get string configuration descriptor * * @returns pointer to the string configuration descriptor */ - virtual const uint8_t * stringIConfigurationDesc(); + virtual const uint8_t *stringIConfigurationDesc(); /* * Get string interface descriptor * * @returns pointer to the string interface descriptor */ - virtual const uint8_t * stringIinterfaceDesc(); + virtual const uint8_t *stringIinterfaceDesc(); /* * Get the length of the report descriptor * * @returns length of the report descriptor */ - virtual uint16_t reportDescLength() { return 0; }; + virtual uint16_t reportDescLength() + { + return 0; + }; @@ -236,8 +248,8 @@ class USBDevice: public USBHAL virtual void EP0in(void); virtual void connectStateChanged(unsigned int connected); virtual void suspendStateChanged(unsigned int suspended); - uint8_t * findDescriptor(uint8_t descriptorType); - CONTROL_TRANSFER * getTransferPtr(void); + uint8_t *findDescriptor(uint8_t descriptorType); + CONTROL_TRANSFER *getTransferPtr(void); uint16_t VENDOR_ID; uint16_t PRODUCT_ID; diff --git a/usb/device/USBDevice/USBDevice_Types.h b/usb/device/USBDevice/USBDevice_Types.h index 19bc1c2f348..543e8a678f8 100644 --- a/usb/device/USBDevice/USBDevice_Types.h +++ b/usb/device/USBDevice/USBDevice_Types.h @@ -1,20 +1,18 @@ -/* Copyright (c) 2010-2011 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #ifndef USBDEVICE_TYPES_H #define USBDEVICE_TYPES_H From a332b99b1bde10a1a7f3b3e14925e4e915b64985 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 27 Feb 2018 10:23:14 -0600 Subject: [PATCH 004/488] Update USBDevice and configure to use a USBPhy Update the USBDevice class API so it matches mbed-os's naming conventions, has a more robust API and uses USBPhy as its backend. --- usb/device/USBDevice/USBDescriptor.h | 8 +- usb/device/USBDevice/USBDevice.cpp | 1169 +++++++++++++++++------- usb/device/USBDevice/USBDevice.h | 596 ++++++++---- usb/device/USBDevice/USBDevice_Types.h | 29 - 4 files changed, 1292 insertions(+), 510 deletions(-) diff --git a/usb/device/USBDevice/USBDescriptor.h b/usb/device/USBDevice/USBDescriptor.h index afc9684086a..730327972d6 100644 --- a/usb/device/USBDevice/USBDescriptor.h +++ b/usb/device/USBDevice/USBDescriptor.h @@ -14,6 +14,9 @@ * limitations under the License. */ +#ifndef USBDESCRIPTOR_H +#define USBDESCRIPTOR_H + /* Standard descriptor types */ #define DEVICE_DESCRIPTOR (1) #define CONFIGURATION_DESCRIPTOR (2) @@ -44,9 +47,6 @@ #define LSB(n) ((n)&0xff) #define MSB(n) (((n)&0xff00)>>8) -/* Convert physical endpoint number to descriptor endpoint number */ -#define PHY_TO_DESC(endpoint) (((endpoint)>>1) | (((endpoint) & 1) ? 0x80:0)) - /* bmAttributes in configuration descriptor */ /* C_RESERVED must always be set */ #define C_RESERVED (1U<<7) @@ -70,3 +70,5 @@ #define E_DATA (0x00) #define E_FEEDBACK (0x10) #define E_IMPLICIT_FEEDBACK (0x20) + +#endif diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 32a03422f37..828ec145717 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -16,9 +16,9 @@ #include "stdint.h" -#include "USBEndpoints.h" #include "USBDevice.h" #include "USBDescriptor.h" +#include "usb_phy_api.h" //#define DEBUG @@ -33,45 +33,59 @@ #define DEVICE_REMOTE_WAKEUP (1) #define ENDPOINT_HALT (0) -/* Macro to convert wIndex endpoint number to physical endpoint number */ -#define WINDEX_TO_PHYSICAL(endpoint) (((endpoint & 0x0f) << 1) + \ - ((endpoint & 0x80) ? 1 : 0)) +/* Endpoint macros */ +#define EP_INDEXABLE(endpoint) (EP_VALID(endpoint) && !EP_CONTROL(endpoint)) +#define EP_TO_INDEX(endpoint) ((((endpoint & 0xf) << 1) | (endpoint & 0x80 ? 1 : 0)) - 2) +#define EP_VALID(endpoint) (((endpoint) & ~0x8F) == 0) +#define EP_CONTROL(endpoint) (((endpoint) & 0xF) == 0) +#define EP_RX(endpoint) ((endpoint) & 0x80) +/* Other defines */ +#define ENDPOINT_ENABLED (1 << 0) +#define ENDPOINT_STALLED (1 << 1) -bool USBDevice::requestGetDescriptor(void) +#if defined(MAX_PACKET_SIZE_EP0) +#undef MAX_PACKET_SIZE_EP0 +#endif +#define MAX_PACKET_SIZE_EP0 64 + + +bool USBDevice::_request_get_descriptor() { + assert_locked(); + bool success = false; #ifdef DEBUG - printf("get descr: type: %d\r\n", DESCRIPTOR_TYPE(transfer.setup.wValue)); + printf("get descr: type: %d\r\n", DESCRIPTOR_TYPE(_transfer.setup.wValue)); #endif - switch (DESCRIPTOR_TYPE(transfer.setup.wValue)) { + switch (DESCRIPTOR_TYPE(_transfer.setup.wValue)) { case DEVICE_DESCRIPTOR: - if (deviceDesc() != NULL) { - if ((deviceDesc()[0] == DEVICE_DESCRIPTOR_LENGTH) \ - && (deviceDesc()[1] == DEVICE_DESCRIPTOR)) { + if (device_desc() != NULL) { + if ((device_desc()[0] == DEVICE_DESCRIPTOR_LENGTH) \ + && (device_desc()[1] == DEVICE_DESCRIPTOR)) { #ifdef DEBUG printf("device descr\r\n"); #endif - transfer.remaining = DEVICE_DESCRIPTOR_LENGTH; - transfer.ptr = (uint8_t *)deviceDesc(); - transfer.direction = DEVICE_TO_HOST; + _transfer.remaining = DEVICE_DESCRIPTOR_LENGTH; + _transfer.ptr = (uint8_t *)device_desc(); + _transfer.direction = Send; success = true; } } break; case CONFIGURATION_DESCRIPTOR: - if (configurationDesc() != NULL) { - if ((configurationDesc()[0] == CONFIGURATION_DESCRIPTOR_LENGTH) \ - && (configurationDesc()[1] == CONFIGURATION_DESCRIPTOR)) { + if (configuration_desc() != NULL) { + if ((configuration_desc()[0] == CONFIGURATION_DESCRIPTOR_LENGTH) \ + && (configuration_desc()[1] == CONFIGURATION_DESCRIPTOR)) { #ifdef DEBUG printf("conf descr request\r\n"); #endif /* Get wTotalLength */ - transfer.remaining = configurationDesc()[2] \ - | (configurationDesc()[3] << 8); + _transfer.remaining = configuration_desc()[2] \ + | (configuration_desc()[3] << 8); - transfer.ptr = (uint8_t *)configurationDesc(); - transfer.direction = DEVICE_TO_HOST; + _transfer.ptr = (uint8_t *)configuration_desc(); + _transfer.direction = Send; success = true; } } @@ -80,59 +94,59 @@ bool USBDevice::requestGetDescriptor(void) #ifdef DEBUG printf("str descriptor\r\n"); #endif - switch (DESCRIPTOR_INDEX(transfer.setup.wValue)) { + switch (DESCRIPTOR_INDEX(_transfer.setup.wValue)) { case STRING_OFFSET_LANGID: #ifdef DEBUG printf("1\r\n"); #endif - transfer.remaining = stringLangidDesc()[0]; - transfer.ptr = (uint8_t *)stringLangidDesc(); - transfer.direction = DEVICE_TO_HOST; + _transfer.remaining = string_langid_desc()[0]; + _transfer.ptr = (uint8_t *)string_langid_desc(); + _transfer.direction = Send; success = true; break; case STRING_OFFSET_IMANUFACTURER: #ifdef DEBUG printf("2\r\n"); #endif - transfer.remaining = stringImanufacturerDesc()[0]; - transfer.ptr = (uint8_t *)stringImanufacturerDesc(); - transfer.direction = DEVICE_TO_HOST; + _transfer.remaining = string_imanufacturer_desc()[0]; + _transfer.ptr = (uint8_t *)string_imanufacturer_desc(); + _transfer.direction = Send; success = true; break; case STRING_OFFSET_IPRODUCT: #ifdef DEBUG printf("3\r\n"); #endif - transfer.remaining = stringIproductDesc()[0]; - transfer.ptr = (uint8_t *)stringIproductDesc(); - transfer.direction = DEVICE_TO_HOST; + _transfer.remaining = string_iproduct_desc()[0]; + _transfer.ptr = (uint8_t *)string_iproduct_desc(); + _transfer.direction = Send; success = true; break; case STRING_OFFSET_ISERIAL: #ifdef DEBUG printf("4\r\n"); #endif - transfer.remaining = stringIserialDesc()[0]; - transfer.ptr = (uint8_t *)stringIserialDesc(); - transfer.direction = DEVICE_TO_HOST; + _transfer.remaining = string_iserial_desc()[0]; + _transfer.ptr = (uint8_t *)string_iserial_desc(); + _transfer.direction = Send; success = true; break; case STRING_OFFSET_ICONFIGURATION: #ifdef DEBUG printf("5\r\n"); #endif - transfer.remaining = stringIConfigurationDesc()[0]; - transfer.ptr = (uint8_t *)stringIConfigurationDesc(); - transfer.direction = DEVICE_TO_HOST; + _transfer.remaining = string_iconfiguration_desc()[0]; + _transfer.ptr = (uint8_t *)string_iconfiguration_desc(); + _transfer.direction = Send; success = true; break; case STRING_OFFSET_IINTERFACE: #ifdef DEBUG printf("6\r\n"); #endif - transfer.remaining = stringIinterfaceDesc()[0]; - transfer.ptr = (uint8_t *)stringIinterfaceDesc(); - transfer.direction = DEVICE_TO_HOST; + _transfer.remaining = string_iinterface_desc()[0]; + _transfer.ptr = (uint8_t *)string_iinterface_desc(); + _transfer.direction = Send; success = true; break; } @@ -157,9 +171,11 @@ bool USBDevice::requestGetDescriptor(void) return success; } -void USBDevice::decodeSetupPacket(uint8_t *data, SETUP_PACKET *packet) +void USBDevice::_decode_setup_packet(uint8_t *data, setup_packet_t *packet) { - /* Fill in the elements of a SETUP_PACKET structure from raw data */ + // No lock needed - stateless function + + /* Fill in the elements of a setup_packet_t structure from raw data */ packet->bmRequestType.dataTransferDirection = (data[0] & 0x80) >> 7; packet->bmRequestType.Type = (data[0] & 0x60) >> 5; packet->bmRequestType.Recipient = data[0] & 0x1f; @@ -170,189 +186,281 @@ void USBDevice::decodeSetupPacket(uint8_t *data, SETUP_PACKET *packet) } -bool USBDevice::controlOut(void) +bool USBDevice::_control_out() { + assert_locked(); + /* Control transfer data OUT stage */ - uint8_t buffer[MAX_PACKET_SIZE_EP0]; uint32_t packetSize; /* Check we should be transferring data OUT */ - if (transfer.direction != HOST_TO_DEVICE) { + if (_transfer.direction != Receive) { /* for other platforms, count on the HAL to handle this case */ return false; } /* Read from endpoint */ - packetSize = EP0getReadResult(buffer); + packetSize = _phy->ep0_read_result(_transfer.ptr, _transfer.remaining); /* Check if transfer size is valid */ - if (packetSize > transfer.remaining) { + if (packetSize > _transfer.remaining) { /* Too big */ return false; } /* Update transfer */ - transfer.ptr += packetSize; - transfer.remaining -= packetSize; + _transfer.ptr += packetSize; + _transfer.remaining -= packetSize; /* Check if transfer has completed */ - if (transfer.remaining == 0) { + if (_transfer.remaining == 0) { /* Transfer completed */ - if (transfer.notify) { + if (_transfer.notify) { /* Notify class layer. */ - USBCallback_requestCompleted(buffer, packetSize); - transfer.notify = false; + _transfer.notify = false; + _transfer.user_callback = true; + callback_request_xfer_done(&_transfer.setup, false); + } else { + complete_request_xfer_done(true); } - /* Status stage */ - EP0write(NULL, 0); } else { - EP0read(); + _phy->ep0_read(); } return true; } -bool USBDevice::controlIn(void) +bool USBDevice::_control_in() { + assert_locked(); + /* Control transfer data IN stage */ uint32_t packetSize; - /* Check if transfer has completed (status stage transactions */ - /* also have transfer.remaining == 0) */ - if (transfer.remaining == 0) { - if (transfer.zlp) { - /* Send zero length packet */ - EP0write(NULL, 0); - transfer.zlp = false; + + /* Check we should be transferring data IN */ + if (_transfer.direction != Send) { + return false; + } + + if (_transfer.remaining == 0) { + if (!_transfer.zlp) { + /* Status as already been sent so ignore this IN. */ + return true; } + /* ZLP will be sent below */ + _transfer.zlp = false; + } + + packetSize = _transfer.remaining; + if (packetSize > _max_packet_size_ep0) { + packetSize = _max_packet_size_ep0; + } + + /* Write to endpoint */ + _phy->ep0_write(_transfer.ptr, packetSize); + + /* Update transfer */ + _transfer.ptr += packetSize; + _transfer.remaining -= packetSize; + + /* Send status if all the data has been sent + * NOTE - Start the status stage immediately + * after writing the last packet. Do not wait + * for the next IN event, as this can be dropped + * if the ACK by the host is corrupted. + * + * For more info on this see section + * 8.5.3.2 of the USB2.0 specification. + */ + if ((_transfer.remaining == 0) && !_transfer.zlp) { /* Transfer completed */ - if (transfer.notify) { + if (_transfer.notify) { /* Notify class layer. */ - USBCallback_requestCompleted(NULL, 0); - transfer.notify = false; + _transfer.notify = false; + _transfer.user_callback = true; + callback_request_xfer_done(&_transfer.setup, false); + } else { + complete_request_xfer_done(true); } - EP0read(); - EP0readStage(); /* Completed */ return true; } - /* Check we should be transferring data IN */ - if (transfer.direction != DEVICE_TO_HOST) { - return false; - } - packetSize = transfer.remaining; + return true; +} + +void USBDevice::complete_request_xfer_done(bool success) +{ + lock(); - if (packetSize > MAX_PACKET_SIZE_EP0) { - packetSize = MAX_PACKET_SIZE_EP0; + _transfer.user_callback = false; + if (_abort_control) { + _control_abort(); + unlock(); + return; } - /* Write to endpoint */ - EP0write(transfer.ptr, packetSize); + if (!success) { + _phy->ep0_stall(); + unlock(); + return; + } - /* Update transfer */ - transfer.ptr += packetSize; - transfer.remaining -= packetSize; + /* Status stage */ + if (_transfer.stage == DataOut) { + _transfer.stage = Status; + _phy->ep0_write(NULL, 0); + } else if (_transfer.stage == DataIn) { + _transfer.stage = Status; + _phy->ep0_read(); + } - return true; + unlock(); } -bool USBDevice::requestSetAddress(void) +bool USBDevice::_request_set_address() { + assert_locked(); + /* Set the device address */ - setAddress(transfer.setup.wValue); + _phy->set_address(_transfer.setup.wValue); - if (transfer.setup.wValue == 0) { - device.state = DEFAULT; + if (_transfer.setup.wValue == 0) { + _change_state(Default); } else { - device.state = ADDRESS; + _change_state(Address); } return true; } -bool USBDevice::requestSetConfiguration(void) +bool USBDevice::_request_set_configuration() { + assert_locked(); - device.configuration = transfer.setup.wValue; + _device.configuration = _transfer.setup.wValue; /* Set the device configuration */ - if (device.configuration == 0) { + if (_device.configuration == 0) { /* Not configured */ - unconfigureDevice(); - device.state = ADDRESS; + _phy->unconfigure(); + _change_state(Address); } else { - if (USBCallback_setConfiguration(device.configuration)) { - /* Valid configuration */ - configureDevice(); - device.state = CONFIGURED; - } else { - return false; - } + _transfer.user_callback = true; + callback_set_configuration(_device.configuration); } return true; } -bool USBDevice::requestGetConfiguration(void) +void USBDevice::complete_set_configuration(bool success) { + lock(); + + _transfer.user_callback = false; + if (_abort_control) { + _control_abort(); + unlock(); + return; + } + + if (success) { + /* Valid configuration */ + _phy->configure(); + _change_state(Configured); + _control_setup_continue(); + } else { + _phy->ep0_stall(); + } + + unlock(); +} + +bool USBDevice::_request_get_configuration() +{ + assert_locked(); + /* Send the device configuration */ - transfer.ptr = &device.configuration; - transfer.remaining = sizeof(device.configuration); - transfer.direction = DEVICE_TO_HOST; + _transfer.ptr = &_device.configuration; + _transfer.remaining = sizeof(_device.configuration); + _transfer.direction = Send; return true; } -bool USBDevice::requestGetInterface(void) +bool USBDevice::_request_get_interface() { + assert_locked(); + /* Return the selected alternate setting for an interface */ - if (device.state != CONFIGURED) { + if (_device.state != Configured) { return false; } /* Send the alternate setting */ - transfer.setup.wIndex = currentInterface; - transfer.ptr = ¤tAlternate; - transfer.remaining = sizeof(currentAlternate); - transfer.direction = DEVICE_TO_HOST; + _transfer.setup.wIndex = _current_interface; + _transfer.ptr = &_current_alternate; + _transfer.remaining = sizeof(_current_alternate); + _transfer.direction = Send; return true; } -bool USBDevice::requestSetInterface(void) +bool USBDevice::_request_set_interface() { - bool success = false; - if (USBCallback_setInterface(transfer.setup.wIndex, transfer.setup.wValue)) { - success = true; - currentInterface = transfer.setup.wIndex; - currentAlternate = transfer.setup.wValue; + assert_locked(); + + _transfer.user_callback = true; + callback_set_interface(_transfer.setup.wIndex, _transfer.setup.wValue); + return true; +} + +void USBDevice::complete_set_interface(bool success) +{ + lock(); + + _transfer.user_callback = false; + if (_abort_control) { + _control_abort(); + unlock(); + return; } - return success; + + if (success) { + _current_interface = _transfer.setup.wIndex; + _current_alternate = _transfer.setup.wValue; + _control_setup_continue(); + } else { + _phy->ep0_stall(); + } + + unlock(); } -bool USBDevice::requestSetFeature() +bool USBDevice::_request_set_feature() { + assert_locked(); bool success = false; - if (device.state != CONFIGURED) { + if (_device.state != Configured) { /* Endpoint or interface must be zero */ - if (transfer.setup.wIndex != 0) { + if (_transfer.setup.wIndex != 0) { return false; } } - switch (transfer.setup.bmRequestType.Recipient) { + switch (_transfer.setup.bmRequestType.Recipient) { case DEVICE_RECIPIENT: /* TODO: Remote wakeup feature not supported */ break; case ENDPOINT_RECIPIENT: - if (transfer.setup.wValue == ENDPOINT_HALT) { - /* TODO: We should check that the endpoint number is valid */ - stallEndpoint( - WINDEX_TO_PHYSICAL(transfer.setup.wIndex)); + if (!EP_VALID(_transfer.setup.wIndex)) { + break; + } else if (_transfer.setup.wValue == ENDPOINT_HALT) { + _phy->endpoint_stall(_transfer.setup.wIndex); success = true; } break; @@ -363,25 +471,28 @@ bool USBDevice::requestSetFeature() return success; } -bool USBDevice::requestClearFeature() +bool USBDevice::_request_clear_feature() { + assert_locked(); + bool success = false; - if (device.state != CONFIGURED) { + if (_device.state != Configured) { /* Endpoint or interface must be zero */ - if (transfer.setup.wIndex != 0) { + if (_transfer.setup.wIndex != 0) { return false; } } - switch (transfer.setup.bmRequestType.Recipient) { + switch (_transfer.setup.bmRequestType.Recipient) { case DEVICE_RECIPIENT: /* TODO: Remote wakeup feature not supported */ break; case ENDPOINT_RECIPIENT: - /* TODO: We should check that the endpoint number is valid */ - if (transfer.setup.wValue == ENDPOINT_HALT) { - unstallEndpoint(WINDEX_TO_PHYSICAL(transfer.setup.wIndex)); + if (!EP_VALID(_transfer.setup.wIndex)) { + break; + } else if (_transfer.setup.wValue == ENDPOINT_HALT) { + _phy->endpoint_unstall(_transfer.setup.wIndex); success = true; } break; @@ -392,19 +503,21 @@ bool USBDevice::requestClearFeature() return success; } -bool USBDevice::requestGetStatus(void) +bool USBDevice::_request_get_status() { + assert_locked(); + static uint16_t status; bool success = false; - if (device.state != CONFIGURED) { + if (_device.state != Configured) { /* Endpoint or interface must be zero */ - if (transfer.setup.wIndex != 0) { + if (_transfer.setup.wIndex != 0) { return false; } } - switch (transfer.setup.bmRequestType.Recipient) { + switch (_transfer.setup.bmRequestType.Recipient) { case DEVICE_RECIPIENT: /* TODO: Currently only supports self powered devices */ status = DEVICE_STATUS_SELF_POWERED; @@ -415,9 +528,12 @@ bool USBDevice::requestGetStatus(void) success = true; break; case ENDPOINT_RECIPIENT: - /* TODO: We should check that the endpoint number is valid */ - if (getEndpointStallState( - WINDEX_TO_PHYSICAL(transfer.setup.wIndex))) { + if (!EP_VALID(_transfer.setup.wIndex)) { + break; + } else if (EP_CONTROL(_transfer.setup.wIndex)) { + /* Control endpoint can't be halted */ + status = 0; + } else if (_endpoint_info[EP_TO_INDEX(_transfer.setup.wIndex & 0xFF)].flags & ENDPOINT_STALLED) { status = ENDPOINT_STATUS_HALT; } else { status = 0; @@ -430,51 +546,53 @@ bool USBDevice::requestGetStatus(void) if (success) { /* Send the status */ - transfer.ptr = (uint8_t *)&status; /* Assumes little endian */ - transfer.remaining = sizeof(status); - transfer.direction = DEVICE_TO_HOST; + _transfer.ptr = (uint8_t *)&status; /* Assumes little endian */ + _transfer.remaining = sizeof(status); + _transfer.direction = Send; } return success; } -bool USBDevice::requestSetup(void) +bool USBDevice::_request_setup() { + assert_locked(); + bool success = false; /* Process standard requests */ - if ((transfer.setup.bmRequestType.Type == STANDARD_TYPE)) { - switch (transfer.setup.bRequest) { + if ((_transfer.setup.bmRequestType.Type == STANDARD_TYPE)) { + switch (_transfer.setup.bRequest) { case GET_STATUS: - success = requestGetStatus(); + success = _request_get_status(); break; case CLEAR_FEATURE: - success = requestClearFeature(); + success = _request_clear_feature(); break; case SET_FEATURE: - success = requestSetFeature(); + success = _request_set_feature(); break; case SET_ADDRESS: - success = requestSetAddress(); + success = _request_set_address(); break; case GET_DESCRIPTOR: - success = requestGetDescriptor(); + success = _request_get_descriptor(); break; case SET_DESCRIPTOR: /* TODO: Support is optional, not implemented here */ success = false; break; case GET_CONFIGURATION: - success = requestGetConfiguration(); + success = _request_get_configuration(); break; case SET_CONFIGURATION: - success = requestSetConfiguration(); + success = _request_set_configuration(); break; case GET_INTERFACE: - success = requestGetInterface(); + success = _request_get_interface(); break; case SET_INTERFACE: - success = requestSetInterface(); + success = _request_set_interface(); break; default: break; @@ -484,159 +602,330 @@ bool USBDevice::requestSetup(void) return success; } -bool USBDevice::controlSetup(void) +void USBDevice::_control_setup() { - bool success = false; + assert_locked(); /* Control transfer setup stage */ uint8_t buffer[MAX_PACKET_SIZE_EP0]; - EP0setup(buffer); + _phy->ep0_setup_read_result(buffer, MAX_PACKET_SIZE_EP0); /* Initialise control transfer state */ - decodeSetupPacket(buffer, &transfer.setup); - transfer.ptr = NULL; - transfer.remaining = 0; - transfer.direction = 0; - transfer.zlp = false; - transfer.notify = false; + _decode_setup_packet(buffer, &_transfer.setup); + _transfer.ptr = NULL; + _transfer.remaining = 0; + _transfer.direction = 0; + _transfer.zlp = false; + _transfer.notify = false; + _transfer.stage = Setup; #ifdef DEBUG - printf("dataTransferDirection: %d\r\nType: %d\r\nRecipient: %d\r\nbRequest: %d\r\nwValue: %d\r\nwIndex: %d\r\nwLength: %d\r\n", transfer.setup.bmRequestType.dataTransferDirection, - transfer.setup.bmRequestType.Type, - transfer.setup.bmRequestType.Recipient, - transfer.setup.bRequest, - transfer.setup.wValue, - transfer.setup.wIndex, - transfer.setup.wLength); + printf("dataTransferDirection: %d\r\nType: %d\r\nRecipient: %d\r\nbRequest: %d\r\nwValue: %d\r\nwIndex: %d\r\nwLength: %d\r\n", _transfer.setup.bmRequestType.dataTransferDirection, + _transfer.setup.bmRequestType.Type, + _transfer.setup.bmRequestType.Recipient, + _transfer.setup.bRequest, + _transfer.setup.wValue, + _transfer.setup.wIndex, + _transfer.setup.wLength); #endif /* Class / vendor specific */ - success = USBCallback_request(); + callback_request(&_transfer.setup); +} - if (!success) { +void USBDevice::complete_request(RequestResult direction, uint8_t *data, uint32_t size) +{ + lock(); + + _transfer.user_callback = false; + if (_abort_control) { + if ((direction == Receive) || (direction == Send)) { + _transfer.user_callback = true; + callback_request_xfer_done(&_transfer.setup, true); + } else { + _control_abort(); + } + unlock(); + return; + } + + if (direction == PassThrough) { /* Standard requests */ - if (!requestSetup()) { -#ifdef DEBUG - printf("fail!!!!\r\n"); -#endif - return false; + if (!_request_setup()) { + _phy->ep0_stall(); } + + /* user_callback may be set by _request_setup() */ + if (!_transfer.user_callback) { + _control_setup_continue(); + } + } else if (direction == Failure) { + _phy->ep0_stall(); + } else { + _transfer.notify = true; + _transfer.remaining = size; + _transfer.ptr = data; + _transfer.direction = direction; + _control_setup_continue(); + } + + unlock(); +} + +void USBDevice::_control_abort_start() +{ + assert_locked(); + + _setup_ready = false; + if (_transfer.user_callback) { + _abort_control = true; + } else { + _control_abort(); } +} + +void USBDevice::_control_setup_continue() +{ + assert_locked(); /* Check transfer size and direction */ - if (transfer.setup.wLength > 0) { - if (transfer.setup.bmRequestType.dataTransferDirection \ - == DEVICE_TO_HOST) { + if (_transfer.setup.wLength > 0) { + if (_transfer.setup.bmRequestType.dataTransferDirection \ + == Send) { /* IN data stage is required */ - if (transfer.direction != DEVICE_TO_HOST) { - return false; + if (_transfer.direction != Send) { + _phy->ep0_stall(); + return; } /* Transfer must be less than or equal to the size */ /* requested by the host */ - if (transfer.remaining > transfer.setup.wLength) { - transfer.remaining = transfer.setup.wLength; + if (_transfer.remaining > _transfer.setup.wLength) { + _transfer.remaining = _transfer.setup.wLength; } } else { /* OUT data stage is required */ - if (transfer.direction != HOST_TO_DEVICE) { - return false; + if (_transfer.direction != Receive) { + _phy->ep0_stall(); + return; } /* Transfer must be equal to the size requested by the host */ - if (transfer.remaining != transfer.setup.wLength) { - return false; + if (_transfer.remaining != _transfer.setup.wLength) { + _phy->ep0_stall(); + return; } } } else { /* No data stage; transfer size must be zero */ - if (transfer.remaining != 0) { - return false; + if (_transfer.remaining != 0) { + _phy->ep0_stall(); + return; } } /* Data or status stage if applicable */ - if (transfer.setup.wLength > 0) { - if (transfer.setup.bmRequestType.dataTransferDirection \ - == DEVICE_TO_HOST) { + if (_transfer.setup.wLength > 0) { + if (_transfer.setup.bmRequestType.dataTransferDirection \ + == Send) { /* Check if we'll need to send a zero length packet at */ /* the end of this transfer */ - if (transfer.setup.wLength > transfer.remaining) { + if (_transfer.setup.wLength > _transfer.remaining) { /* Device wishes to transfer less than host requested */ - if ((transfer.remaining % MAX_PACKET_SIZE_EP0) == 0) { + if ((_transfer.remaining % MAX_PACKET_SIZE_EP0) == 0) { /* Transfer is a multiple of EP0 max packet size */ - transfer.zlp = true; + _transfer.zlp = true; } } /* IN stage */ - controlIn(); + _transfer.stage = DataIn; + _control_in(); } else { /* OUT stage */ - EP0read(); + _transfer.stage = DataOut; + _phy->ep0_read(); } } else { /* Status stage */ - EP0write(NULL, 0); + _transfer.stage = Status; + _phy->ep0_write(NULL, 0); } +} - return true; +void USBDevice::_control_abort() +{ + assert_locked(); + + _abort_control = false; + _transfer.stage = Status; } -void USBDevice::busReset(void) +void USBDevice::reset() { - device.state = DEFAULT; - device.configuration = 0; - device.suspended = false; + assert_locked(); + + _change_state(Default); + _device.suspended = false; + _control_abort_start(); /* Call class / vendor specific busReset function */ - USBCallback_busReset(); + callback_reset(); } -void USBDevice::EP0setupCallback(void) +void USBDevice::ep0_setup() { + assert_locked(); + + if (_device.state < Default) { + MBED_ASSERT(0); + return; + } + + _setup_ready = true; + /* Endpoint 0 setup event */ - if (!controlSetup()) { - /* Protocol stall */ - EP0stall(); + if (_transfer.user_callback) { + /* A new setup packet has arrived so abort the + current control transfer */ + _abort_control = true; + } else { + _control_setup(); } - /* Return true if an OUT data stage is expected */ } -void USBDevice::EP0out(void) +void USBDevice::ep0_out() { + assert_locked(); + + if (_device.state < Default) { + MBED_ASSERT(0); + return; + } + + if (_transfer.user_callback) { + /* EP0 OUT should not receive data if the stack is waiting + on a user callback for the buffer to fill or status */ + MBED_ASSERT(0); + return; + } + + if (_transfer.stage == Status) { + // No action needed on status stage + return; + } + /* Endpoint 0 OUT data event */ - if (!controlOut()) { + if (!_control_out()) { /* Protocol stall; this will stall both endpoints */ - EP0stall(); + _phy->ep0_stall(); } } -void USBDevice::EP0in(void) +void USBDevice::ep0_in() { + assert_locked(); + + if (_device.state < Default) { + MBED_ASSERT(0); + return; + } + #ifdef DEBUG - printf("EP0IN\r\n"); + printf("ep0_in\r\n"); #endif + if (_transfer.stage == Status) { + // No action needed on status stage + return; + } + /* Endpoint 0 IN data event */ - if (!controlIn()) { + if (!_control_in()) { /* Protocol stall; this will stall both endpoints */ - EP0stall(); + _phy->ep0_stall(); + } +} + +void USBDevice::out(usb_ep_t endpoint) +{ + assert_locked(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + return; + } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + + info->pending += 1; + if (info->callback) { + (this->*(info->callback))(endpoint); + } +} + +void USBDevice::in(usb_ep_t endpoint) +{ + assert_locked(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + return; } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + + MBED_ASSERT(info->pending >= 1); + info->pending -= 1; + if (info->callback) { + (this->*(info->callback))(endpoint); + } +} + +void USBDevice::init() +{ + lock(); + + if (!_initialized) { + this->_phy->init(this); + _max_packet_size_ep0 = this->_phy->ep0_set_max_packet(MAX_PACKET_SIZE_EP0); + _initialized = true; + } + + unlock(); } -bool USBDevice::configured(void) +void USBDevice::deinit() { - /* Returns true if device is in the CONFIGURED state */ - return (device.state == CONFIGURED); + lock(); + + if (_initialized) { + this->_phy->deinit(); + _initialized = false; + } + + unlock(); +} + +bool USBDevice::configured() +{ + lock(); + + /* Returns true if device is in the Configured state */ + bool ret = (_device.state == Configured); + + unlock(); + return ret; } void USBDevice::connect(bool blocking) { /* Connect device */ - USBHAL::connect(); + lock(); + _phy->connect(); + unlock(); if (blocking) { /* Block if not configured */ @@ -644,51 +933,148 @@ void USBDevice::connect(bool blocking) } } -void USBDevice::disconnect(void) +void USBDevice::disconnect() { + lock(); + /* Disconnect device */ - USBHAL::disconnect(); + _phy->disconnect(); /* Set initial device state */ - device.state = POWERED; - device.configuration = 0; - device.suspended = false; + if (_device.state > Powered) { + _change_state(Powered); + } + //TODO - remove these? + _device.configuration = 0; + _device.suspended = false; + + unlock(); } -CONTROL_TRANSFER *USBDevice::getTransferPtr(void) +void USBDevice::sof_enable() { - return &transfer; + lock(); + + _phy->sof_enable(); + + unlock(); } -bool USBDevice::addEndpoint(uint8_t endpoint, uint32_t maxPacket) +void USBDevice::sof_disable() { - return realiseEndpoint(endpoint, maxPacket, 0); + lock(); + + _phy->sof_disable(); + + unlock(); } -bool USBDevice::addRateFeedbackEndpoint(uint8_t endpoint, uint32_t maxPacket) +bool USBDevice::endpoint_add(usb_ep_t endpoint, uint32_t max_packet_size, usb_ep_type_t type, ep_cb_t callback) { - /* For interrupt endpoints only */ - return realiseEndpoint(endpoint, maxPacket, RATE_FEEDBACK_MODE); + lock(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); + return false; + } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + MBED_ASSERT(!(info->flags & ENDPOINT_ENABLED)); + MBED_ASSERT(max_packet_size <= 1024); + + bool ret = false; + if (_phy->endpoint_add(endpoint, max_packet_size, type)) { + info->callback = callback; + info->flags |= ENDPOINT_ENABLED; + info->pending = 0; + info->max_packet_size = max_packet_size; + ret = true; + } + + unlock(); + return ret; } -uint8_t *USBDevice::findDescriptor(uint8_t descriptorType) +void USBDevice::endpoint_remove(usb_ep_t endpoint) +{ + lock(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); + return; + } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + MBED_ASSERT(info->flags & ENDPOINT_ENABLED); + + info->callback = NULL; + info->flags = 0; + info->pending = 0; + info->max_packet_size = 0; + + _phy->endpoint_remove(endpoint); + + unlock(); +} + +void USBDevice::endpoint_stall(usb_ep_t endpoint) +{ + lock(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); + return; + } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + MBED_ASSERT(info->flags & ENDPOINT_ENABLED); + + info->flags |= ENDPOINT_STALLED; + _phy->endpoint_stall(endpoint); + + unlock(); +} + +void USBDevice::endpoint_unstall(usb_ep_t endpoint) +{ + lock(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); + return; + } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + MBED_ASSERT(info->flags & ENDPOINT_ENABLED); + + info->flags &= ~ENDPOINT_STALLED; + _phy->endpoint_unstall(endpoint); + + unlock(); +} + +uint8_t *USBDevice::find_descriptor(uint8_t descriptorType) { /* Find a descriptor within the list of descriptors */ /* following a configuration descriptor. */ uint16_t wTotalLength; uint8_t *ptr; - if (configurationDesc() == NULL) { + if (configuration_desc() == NULL) { return NULL; } /* Check this is a configuration descriptor */ - if ((configurationDesc()[0] != CONFIGURATION_DESCRIPTOR_LENGTH) \ - || (configurationDesc()[1] != CONFIGURATION_DESCRIPTOR)) { + if ((configuration_desc()[0] != CONFIGURATION_DESCRIPTOR_LENGTH) \ + || (configuration_desc()[1] != CONFIGURATION_DESCRIPTOR)) { return NULL; } - wTotalLength = configurationDesc()[2] | (configurationDesc()[3] << 8); + wTotalLength = configuration_desc()[2] | (configuration_desc()[3] << 8); /* Check there are some more descriptors to follow */ if (wTotalLength <= (CONFIGURATION_DESCRIPTOR_LENGTH + 2)) @@ -698,7 +1084,7 @@ uint8_t *USBDevice::findDescriptor(uint8_t descriptorType) } /* Start at first descriptor after the configuration descriptor */ - ptr = &(((uint8_t *)configurationDesc())[CONFIGURATION_DESCRIPTOR_LENGTH]); + ptr = &(((uint8_t *)configuration_desc())[CONFIGURATION_DESCRIPTOR_LENGTH]); do { if (ptr[1] /* bDescriptorType */ == descriptorType) { @@ -708,131 +1094,214 @@ uint8_t *USBDevice::findDescriptor(uint8_t descriptorType) /* Skip to next descriptor */ ptr += ptr[0]; /* bLength */ - } while (ptr < (configurationDesc() + wTotalLength)); + } while (ptr < (configuration_desc() + wTotalLength)); /* Reached end of the descriptors - not found */ return NULL; } +const usb_ep_table_t *USBDevice::endpoint_table() +{ + return _phy->endpoint_table(); +} + +void USBDevice::power(bool powered) +{ + assert_locked(); + + if (!powered && _device.state > Attached) { + _change_state(Attached); + } +} -void USBDevice::connectStateChanged(unsigned int connected) +void USBDevice::suspend(bool suspended) { } -void USBDevice::suspendStateChanged(unsigned int suspended) +void USBDevice::sof(int frame_number) { + callback_sof(frame_number); } -USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release) +USBDevice::USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) { - VENDOR_ID = vendor_id; - PRODUCT_ID = product_id; - PRODUCT_RELEASE = product_release; + this->vendor_id = vendor_id; + this->product_id = product_id; + this->product_release = product_release; + + memset(_endpoint_info, 0, sizeof(_endpoint_info)); + + _setup_ready = false; + _abort_control = false; + + _phy = phy; + _initialized = false; + _current_interface = 0; + _current_alternate = 0; + _locked = 0; /* Set initial device state */ - device.state = POWERED; - device.configuration = 0; - device.suspended = false; + _device.state = Powered; + _device.configuration = 0; + _device.suspended = false; }; - -bool USBDevice::readStart(uint8_t endpoint, uint32_t maxSize) +USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release) { - return endpointRead(endpoint, maxSize) == EP_PENDING; -} + this->vendor_id = vendor_id; + this->product_id = product_id; + this->product_release = product_release; + + memset(_endpoint_info, 0, sizeof(_endpoint_info)); + _setup_ready = false; + _abort_control = false; -bool USBDevice::write(uint8_t endpoint, uint8_t *buffer, uint32_t size, uint32_t maxSize) + _phy = get_usb_phy(); + _initialized = false; + _current_interface = 0; + _current_alternate = 0; + _locked = 0; + + /* Set initial device state */ + _device.state = Powered; + _device.configuration = 0; + _device.suspended = false; +}; + +uint32_t USBDevice::endpoint_max_packet_size(usb_ep_t endpoint) { - EP_STATUS result; + lock(); - if (size > maxSize) { - return false; + uint32_t size = 0; + if (EP_CONTROL(endpoint)) { + size = _max_packet_size_ep0; + } else { + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + size = info->max_packet_size; } + unlock(); + return size; +} - if (!configured()) { +bool USBDevice::read_start(usb_ep_t endpoint) +{ + lock(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); return false; } - /* Send report */ - result = endpointWrite(endpoint, buffer, size); + if(!configured()) { + unlock(); + return false; + } - if (result != EP_PENDING) { + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + if (!(info->flags & ENDPOINT_ENABLED)) { + // Invalid endpoint is being used + MBED_ASSERT(0); + unlock(); return false; } - /* Wait for completion */ - do { - result = endpointWriteResult(endpoint); - } while ((result == EP_PENDING) && configured()); + bool ret = _phy->endpoint_read(endpoint, info->max_packet_size); - return (result == EP_COMPLETED); + unlock(); + return ret; } - -bool USBDevice::writeNB(uint8_t endpoint, uint8_t *buffer, uint32_t size, uint32_t maxSize) +bool USBDevice::read_finish(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint32_t *size) { - EP_STATUS result; + lock(); - if (size > maxSize) { + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); return false; } if (!configured()) { + unlock(); return false; } - /* Send report */ - result = endpointWrite(endpoint, buffer, size); + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + if (!(info->flags & ENDPOINT_ENABLED)) { + // Invalid endpoint is being used + MBED_ASSERT(0); + unlock(); + return false; + } - if (result != EP_PENDING) { + if (max_size < info->max_packet_size) { + MBED_ASSERT(0); + unlock(); return false; } - result = endpointWriteResult(endpoint); + bool ret = _phy->endpoint_read_result(endpoint, buffer, max_size, size); + if (ret) { + info->pending -= 1; + } - return (result == EP_COMPLETED); + unlock(); + return ret; } - - -bool USBDevice::readEP(uint8_t endpoint, uint8_t *buffer, uint32_t *size, uint32_t maxSize) +bool USBDevice::write(usb_ep_t endpoint, uint8_t *buffer, uint32_t size) { - EP_STATUS result; + lock(); - if (!configured()) { + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); return false; } - /* Wait for completion */ - do { - result = endpointReadResult(endpoint, buffer, size); - } while ((result == EP_PENDING) && configured()); - - return (result == EP_COMPLETED); -} + if (!configured()) { + unlock(); + return false; + } + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + if (!(info->flags & ENDPOINT_ENABLED)) { + // Invalid endpoint is being used + MBED_ASSERT(0); + unlock(); + return false; + } -bool USBDevice::readEP_NB(uint8_t endpoint, uint8_t *buffer, uint32_t *size, uint32_t maxSize) -{ - EP_STATUS result; + if (size > info->max_packet_size) { + // Size being written is too large + MBED_ASSERT(0); + unlock(); + return false; + } - if (!configured()) { + if (info->pending) { + // Only allow 1 packet + unlock(); return false; } - result = endpointReadResult(endpoint, buffer, size); + /* Send report */ + bool ret = _phy->endpoint_write(endpoint, buffer, size); + if (ret) { + info->pending += 1; + } - return (result == EP_COMPLETED); + unlock(); + return ret; } - - -const uint8_t *USBDevice::deviceDesc() +const uint8_t *USBDevice::device_desc() { - uint8_t deviceDescriptorTemp[] = { + uint8_t device_descriptor_temp[] = { DEVICE_DESCRIPTOR_LENGTH, /* bLength */ DEVICE_DESCRIPTOR, /* bDescriptorType */ LSB(USB_VERSION_2_0), /* bcdUSB (LSB) */ @@ -840,79 +1309,133 @@ const uint8_t *USBDevice::deviceDesc() 0x00, /* bDeviceClass */ 0x00, /* bDeviceSubClass */ 0x00, /* bDeviceprotocol */ - MAX_PACKET_SIZE_EP0, /* bMaxPacketSize0 */ - (uint8_t)(LSB(VENDOR_ID)), /* idVendor (LSB) */ - (uint8_t)(MSB(VENDOR_ID)), /* idVendor (MSB) */ - (uint8_t)(LSB(PRODUCT_ID)), /* idProduct (LSB) */ - (uint8_t)(MSB(PRODUCT_ID)), /* idProduct (MSB) */ - (uint8_t)(LSB(PRODUCT_RELEASE)), /* bcdDevice (LSB) */ - (uint8_t)(MSB(PRODUCT_RELEASE)), /* bcdDevice (MSB) */ + (uint8_t)_max_packet_size_ep0, /* bMaxPacketSize0 */ + (uint8_t)(LSB(vendor_id)), /* idVendor (LSB) */ + (uint8_t)(MSB(vendor_id)), /* idVendor (MSB) */ + (uint8_t)(LSB(product_id)), /* idProduct (LSB) */ + (uint8_t)(MSB(product_id)), /* idProduct (MSB) */ + (uint8_t)(LSB(product_release)), /* bcdDevice (LSB) */ + (uint8_t)(MSB(product_release)), /* bcdDevice (MSB) */ STRING_OFFSET_IMANUFACTURER, /* iManufacturer */ STRING_OFFSET_IPRODUCT, /* iProduct */ STRING_OFFSET_ISERIAL, /* iSerialNumber */ 0x01 /* bNumConfigurations */ }; - MBED_ASSERT(sizeof(deviceDescriptorTemp) == sizeof(deviceDescriptor)); - memcpy(deviceDescriptor, deviceDescriptorTemp, sizeof(deviceDescriptor)); - return deviceDescriptor; + MBED_ASSERT(sizeof(device_descriptor_temp) == sizeof(device_descriptor)); + memcpy(device_descriptor, device_descriptor_temp, sizeof(device_descriptor)); + return device_descriptor; } -const uint8_t *USBDevice::stringLangidDesc() +const uint8_t *USBDevice::string_langid_desc() { - static const uint8_t stringLangidDescriptor[] = { + static const uint8_t string_langid_descriptor[] = { 0x04, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ 0x09, 0x04, /*bString Lang ID - 0x0409 - English*/ }; - return (uint8_t *)stringLangidDescriptor; + return string_langid_descriptor; } -const uint8_t *USBDevice::stringImanufacturerDesc() +const uint8_t *USBDevice::string_imanufacturer_desc() { - static const uint8_t stringImanufacturerDescriptor[] = { + static const uint8_t string_imanufacturer_descriptor[] = { 0x12, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ 'm', 0, 'b', 0, 'e', 0, 'd', 0, '.', 0, 'o', 0, 'r', 0, 'g', 0, /*bString iManufacturer - mbed.org*/ }; - return stringImanufacturerDescriptor; + return string_imanufacturer_descriptor; } -const uint8_t *USBDevice::stringIserialDesc() +const uint8_t *USBDevice::string_iserial_desc() { - static const uint8_t stringIserialDescriptor[] = { + static const uint8_t string_iserial_descriptor[] = { 0x16, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ '0', 0, '1', 0, '2', 0, '3', 0, '4', 0, '5', 0, '6', 0, '7', 0, '8', 0, '9', 0, /*bString iSerial - 0123456789*/ }; - return stringIserialDescriptor; + return string_iserial_descriptor; } -const uint8_t *USBDevice::stringIConfigurationDesc() +const uint8_t *USBDevice::string_iconfiguration_desc() { - static const uint8_t stringIconfigurationDescriptor[] = { + static const uint8_t string_iconfiguration_descriptor[] = { 0x06, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ '0', 0, '1', 0, /*bString iConfiguration - 01*/ }; - return stringIconfigurationDescriptor; + return string_iconfiguration_descriptor; } -const uint8_t *USBDevice::stringIinterfaceDesc() +const uint8_t *USBDevice::string_iinterface_desc() { - static const uint8_t stringIinterfaceDescriptor[] = { + static const uint8_t string_iinterface_descriptor[] = { 0x08, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ 'U', 0, 'S', 0, 'B', 0, /*bString iInterface - USB*/ }; - return stringIinterfaceDescriptor; + return string_iinterface_descriptor; } -const uint8_t *USBDevice::stringIproductDesc() +const uint8_t *USBDevice::string_iproduct_desc() { - static const uint8_t stringIproductDescriptor[] = { + static const uint8_t string_iproduct_descriptor[] = { 0x16, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ 'U', 0, 'S', 0, 'B', 0, ' ', 0, 'D', 0, 'E', 0, 'V', 0, 'I', 0, 'C', 0, 'E', 0 /*bString iProduct - USB DEVICE*/ }; - return stringIproductDescriptor; + return string_iproduct_descriptor; +} + +void USBDevice::start_process() +{ + lock(); + + _phy->process(); + + unlock(); +} + +void USBDevice::lock() +{ + core_util_critical_section_enter(); + _locked++; + MBED_ASSERT(_locked > 0); +} + +void USBDevice::unlock() +{ + MBED_ASSERT(_locked > 0); + _locked--; + core_util_critical_section_exit(); +} + +void USBDevice::assert_locked() +{ + MBED_ASSERT(_locked > 0); +} + +void USBDevice::_change_state(DeviceState new_state) { + assert_locked(); + + DeviceState old_state = _device.state; + _device.state = new_state; + + if (old_state == new_state) { + return; + } + + bool leaving_configured_state = (old_state >= Configured) && (new_state < Configured); + bool leaving_default_state = (old_state >= Default) && (new_state < Default); + + if (leaving_configured_state) { + memset(_endpoint_info, 0, sizeof(_endpoint_info)); + _device.configuration = 0; + } + + if (leaving_default_state) { + /* Abort any pending control transfers */ + _control_abort_start(); + } + + callback_state_change(new_state); } diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 9ee962841de..371359fa8b0 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -19,170 +19,241 @@ #include "mbed.h" #include "USBDevice_Types.h" -#include "USBHAL.h" +#include "USBPhy.h" +#include "mbed_critical.h" -class USBDevice: public USBHAL { +/** + * \defgroup usb_device USB Device + * + */ + +/** + * \defgroup usb_device_core Core + * + * @ingroup usb_device + */ + +/** + * Core USB Device driver + * + * USB driver which wraps and provides synchronization for a USBPhy object. + * + * @ingroup usb_device_core + */ +class USBDevice: public USBPhyEvents { public: + typedef void (USBDevice::*ep_cb_t)(usb_ep_t endpoint); + + enum RequestResult { + Receive = 0, + Send = 1, + Success = 2, + Failure = 3, + PassThrough = 4, + }; + + enum DeviceState { + Attached, + Powered, + Default, + Address, + Configured + }; + + struct setup_packet_t { + struct { + uint8_t dataTransferDirection; + uint8_t Type; + uint8_t Recipient; + } bmRequestType; + uint8_t bRequest; + uint16_t wValue; + uint16_t wIndex; + uint16_t wLength; + }; + + /** + * Instantiate a new USBDevice with the given parameters + * + * This function uses a target's built in USBPhy. + * + * @param vendor_id The USB vendor ID + * @param product_id The USB product ID + * @param product_release The device release number + */ USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release); - /* + /** + * Instantiate a new USBDevice with the given parameters + * + * @param phy The USBPhy providing physical USB access + * @param vendor_id The USB vendor ID + * @param product_id The USB product ID + * @param product_release The device release number + */ + USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); + + /** + * Initialize this instance + * + * This function must be called before calling + * any other functions of this class, unless specifically + */ + void init(); + + /** + * Power down this instance + * + * Disable interrupts and stop sending events. + */ + void deinit(); + + /** * Check if the device is configured * * @returns true if configured, false otherwise */ - bool configured(void); + bool configured(); - /* + /** * Connect a device * * @param blocking: block if not configured */ void connect(bool blocking = true); - /* + /** * Disconnect a device */ - void disconnect(void); + void disconnect(); - /* - * Add an endpoint - * - * @param endpoint endpoint which will be added - * @param maxPacket Maximum size of a packet which can be sent for this endpoint - * @returns true if successful, false otherwise - */ - bool addEndpoint(uint8_t endpoint, uint32_t maxPacket); + /** + * Enable the start of frame interrupt + * + * Call USBDevice::callback_sof on every frame. + */ + void sof_enable(); - /* - * Start a reading on a certain endpoint. - * You can access the result of the reading by USBDevice_read - * - * @param endpoint endpoint which will be read - * @param maxSize the maximum length that can be read - * @return true if successful - */ - bool readStart(uint8_t endpoint, uint32_t maxSize); + /** + * Disable the start of frame interrupt + * + * Stop calling USBDevice::callback_sof. + */ + void sof_disable(); - /* - * Read a certain endpoint. Before calling this function, USBUSBDevice_readStart - * must be called. - * - * Warning: blocking + /** + * Add an endpoint * - * @param endpoint endpoint which will be read - * @param buffer buffer will be filled with the data received - * @param size the number of bytes read will be stored in *size - * @param maxSize the maximum length that can be read - * @returns true if successful + * @param endpoint Endpoint to enable + * @param max_packet Maximum size of a packet which can be sent or received on this endpoint + * @param type Endpoint type - USB_EP_TYPE_BULK, USB_EP_TYPE_INT or USB_EP_TYPE_ISO + * @param callback Method pointer to be called when a packet is transferred + * @returns true if successful, false otherwise */ - bool readEP(uint8_t endpoint, uint8_t *buffer, uint32_t *size, uint32_t maxSize); + bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type, ep_cb_t callback = NULL); - /* - * Read a certain endpoint. - * - * Warning: non blocking + /** + * Add an endpoint * - * @param endpoint endpoint which will be read - * @param buffer buffer will be filled with the data received (if data are available) - * @param size the number of bytes read will be stored in *size - * @param maxSize the maximum length that can be read - * @returns true if successful + * @param endpoint Endpoint to enable + * @param max_packet Maximum size of a packet which can be sent or received on this endpoint + * @param type Endpoint type - USB_EP_TYPE_BULK, USB_EP_TYPE_INT or USB_EP_TYPE_ISO + * @param callback Method pointer to be called when a packet is transferred + * @returns true if successful, false otherwise */ - bool readEP_NB(uint8_t endpoint, uint8_t *buffer, uint32_t *size, uint32_t maxSize); + template + bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type, void (T::*callback)(usb_ep_t endpoint)) + { + return endpoint_add(endpoint, max_packet, type, static_cast(callback)); + } - /* - * Write a certain endpoint. - * - * Warning: blocking + /** + * Remove an endpoint * - * @param endpoint endpoint to write - * @param buffer data contained in buffer will be write - * @param size the number of bytes to write - * @param maxSize the maximum length that can be written on this endpoint + * @param endpoint Endpoint to disable + * @note This endpoint must already have been setup with endpoint_add */ - bool write(uint8_t endpoint, uint8_t *buffer, uint32_t size, uint32_t maxSize); + void endpoint_remove(usb_ep_t endpoint); - - /* - * Write a certain endpoint. + /** + * Stall an endpoint * - * Warning: non blocking - * - * @param endpoint endpoint to write - * @param buffer data contained in buffer will be write - * @param size the number of bytes to write - * @param maxSize the maximum length that can be written on this endpoint + * @param endpoint Endpoint to stall + * @note You cannot stall endpoint 0 with this function + * @note This endpoint must already have been setup with endpoint_add */ - bool writeNB(uint8_t endpoint, uint8_t *buffer, uint32_t size, uint32_t maxSize); - + void endpoint_stall(usb_ep_t endpoint); - /* - * Called by USBDevice layer on bus reset. Warning: Called in ISR context + /** + * Unstall an endpoint * - * May be used to reset state + * @param endpoint Endpoint to unstall + * @note This endpoint must already have been setup with endpoint_add */ - virtual void USBCallback_busReset(void) {}; + void endpoint_unstall(usb_ep_t endpoint); - /* - * Called by USBDevice on Endpoint0 request. Warning: Called in ISR context - * This is used to handle extensions to standard requests - * and class specific requests - * - * @returns true if class handles this request - */ - virtual bool USBCallback_request() - { - return false; - }; + /** + * Get the current maximum size for this endpoint + * + * Return the currently configured maximum packet size, wMaxPacketSize, + * for this endpoint. + * @note This endpoint must already have been setup with endpoint_add + */ + uint32_t endpoint_max_packet_size(usb_ep_t endpoint); - /* - * Called by USBDevice on Endpoint0 request completion - * if the 'notify' flag has been set to true. Warning: Called in ISR context - * - * In this case it is used to indicate that a HID report has - * been received from the host on endpoint 0 - * - * @param buf buffer received on endpoint 0 - * @param length length of this buffer - */ - virtual void USBCallback_requestCompleted(uint8_t *buf, uint32_t length) {}; + /** Start a read on the given endpoint + * + * After the read is finished call read_start to get the result. + * + * @param endpoint endpoint to perform the read on + * @return true if the read was started, false if no more reads can be started + * @note This endpoint must already have been setup with endpoint_add + */ + bool read_start(usb_ep_t endpoint); - /* - * Called by USBDevice layer. Set configuration of the device. - * For instance, you can add all endpoints that you need on this function. - * - * @param configuration Number of the configuration - */ - virtual bool USBCallback_setConfiguration(uint8_t configuration) - { - return false; - }; + /** + * Finish a read on the given endpoint + * + * Get the contents of a read started with read_start. To ensure all + * the data from this endpoint is read make sure the buffer and size + * passed is at least as big as the maximum packet for this endpoint. + * + * @param endpoint endpoint to read data from + * @param buffer buffer to fill with read data + * @param max_size the total size of the data buffer. This must be at least + * the max packet size of this endpoint + * @param size The size of data that was read + * @return true if the read was completed, otherwise false + * @note This endpoint must already have been setup with endpoint_add + */ + bool read_finish(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint32_t *size); - /* - * Called by USBDevice layer. Set interface/alternate of the device. + /** + * Write a data to the given endpoint + * + * Write data to an endpoint. * - * @param interface Number of the interface to be configured - * @param alternate Number of the alternate to be configured - * @returns true if class handles this request + * @param endpoint endpoint to write data to + * @param buffer data to write + * @param size the size of data to send. This must be less than or equal to the + * max packet size of this endpoint + * @note This endpoint must already have been setup with endpoint_add */ - virtual bool USBCallback_setInterface(uint16_t interface, uint8_t alternate) - { - return false; - }; + bool write(usb_ep_t endpoint, uint8_t *buffer, uint32_t size); /* * Get device descriptor. * * @returns pointer to the device descriptor */ - virtual const uint8_t *deviceDesc(); + virtual const uint8_t *device_desc(); /* * Get configuration descriptor * * @returns pointer to the configuration descriptor */ - virtual const uint8_t *configurationDesc() + virtual const uint8_t *configuration_desc() { return NULL; }; @@ -192,93 +263,308 @@ class USBDevice: public USBHAL { * * @return pointer to the string lang id descriptor */ - virtual const uint8_t *stringLangidDesc(); + virtual const uint8_t *string_langid_desc(); /* * Get string manufacturer descriptor * * @returns pointer to the string manufacturer descriptor */ - virtual const uint8_t *stringImanufacturerDesc(); + virtual const uint8_t *string_imanufacturer_desc(); /* * Get string product descriptor * * @returns pointer to the string product descriptor */ - virtual const uint8_t *stringIproductDesc(); + virtual const uint8_t *string_iproduct_desc(); /* * Get string serial descriptor * * @returns pointer to the string serial descriptor */ - virtual const uint8_t *stringIserialDesc(); + virtual const uint8_t *string_iserial_desc(); /* * Get string configuration descriptor * * @returns pointer to the string configuration descriptor */ - virtual const uint8_t *stringIConfigurationDesc(); + virtual const uint8_t *string_iconfiguration_desc(); /* * Get string interface descriptor * * @returns pointer to the string interface descriptor */ - virtual const uint8_t *stringIinterfaceDesc(); + virtual const uint8_t *string_iinterface_desc(); /* * Get the length of the report descriptor * * @returns length of the report descriptor */ - virtual uint16_t reportDescLength() + virtual uint16_t report_desc_dength() { return 0; }; +protected: + + /** + * Called by USBDevice layer on power state change. + * + * @param powered true if device is powered, false otherwise + * + * Warning: Called in ISR context + */ + virtual void callback_power(bool powered) + { + } -protected: - virtual void busReset(void); - virtual void EP0setupCallback(void); - virtual void EP0out(void); - virtual void EP0in(void); - virtual void connectStateChanged(unsigned int connected); - virtual void suspendStateChanged(unsigned int suspended); - uint8_t *findDescriptor(uint8_t descriptorType); - CONTROL_TRANSFER *getTransferPtr(void); - - uint16_t VENDOR_ID; - uint16_t PRODUCT_ID; - uint16_t PRODUCT_RELEASE; - uint8_t deviceDescriptor[18]; + /** + * Called by USBDevice layer on each new USB frame. + * + * Callbacks are enabled and disabled by calling sof_enable + * and sof_disable. + * + * @param frame_number The current frame number + * + * Warning: Called in ISR context + */ + virtual void callback_sof(int frame_number) + { + + } + + /** + * Called by USBDevice layer on bus reset. + * + * complete_reset must be called after + * the device is fully reset. + * + * Warning: Called in ISR context + */ + virtual void callback_reset() + { + + } + + /** + * Called when USB changes state + * + * @param new_state The new state of the USBDevice + * + * Warning: Called in ISR context + */ + virtual void callback_state_change(DeviceState new_state) = 0; + + /** + * Called by USBDevice on Endpoint0 request. + * + * This is used to handle extensions to standard requests + * and class specific requests. The function complete_request + * must be always be called in response to this callback. + * + * Warning: Called in ISR context + */ + virtual void callback_request(const setup_packet_t *setup) = 0; + + /** + * Called to complete the setup stage of a callback request + * + * Possible options that can be passed as a result are: + * - Receive - Start the data OUT phase of this control transfer + * - Send - Start the data IN phase of this control transfer + * - Success - Operation was a success so start the status phase + * - Failure - Operation failed or is unsupported so send a stall + * - PassThrough - Pass on the request for standard processing + * + * @param result The result of the setup phase. + * @param data Buffer to send or receive if the result is Send or Receive + * @param size Size to transfer if the result is Send or Receive + */ + void complete_request(RequestResult result, uint8_t *data=NULL, uint32_t size=0); + + /** + * Called by USBDevice on data stage completion + * + * The function complete_request_xfer_done must be always be called + * in response to this callback. + * + * @param setup Setup packet of the current request + * @param aborted false if the operation was aborted, true otherwise + * + * Warning: Called in ISR context + */ + virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted) = 0; + + /** + * Called to complete the data stage of a callback request + * + * @param success true if the operation was successful, false otherwise + */ + void complete_request_xfer_done(bool success); + + /* + * Called by USBDevice layer in response to set_configuration. + * + * Upon reception of this command endpoints of the previous configuration + * if any must be removed with endpoint_remove and new endpoint added with + * endpoint_add. + * + * @param configuration Number of the configuration + * + * Warning: Called in ISR context + */ + virtual void callback_set_configuration(uint8_t configuration) = 0; + + /** + * Called to complete a set configuration command + * + * @param success true if the configuration was set, false otherwise + */ + void complete_set_configuration(bool success); + + /* + * Called by USBDevice layer in response to set_interface. + * + * Upon reception of this command endpoints of any previous interface + * if any must be removed with endpoint_remove and new endpoint added with + * endpoint_add. + * + * @param configuration Number of the configuration + * + * Warning: Called in ISR context + */ + virtual void callback_set_interface(uint16_t interface, uint8_t alternate) = 0; + + /** + * Called to complete a set interface command + * + * @param success true if the interface was set, false otherwise + */ + void complete_set_interface(bool success); + + /** + * Find a descriptor type inside the configuration descriptor + * + * @param descriptor_type Type of descriptor to find + * @return A descriptor of the given type or NULL if none were found + */ + uint8_t *find_descriptor(uint8_t descriptor_type); + + /** + * Get the endpoint table of this device + * + * @return Endpoint table of the USBPhy attached to this USBDevice + */ + const usb_ep_table_t *endpoint_table(); + + /** + * Callback called to indicate the USB processing needs to be done + */ + virtual void start_process(); + + /** + * Acquire exclusive access to this instance USBDevice + */ + virtual void lock(); + + /** + * Release exclusive access to this instance USBDevice + */ + virtual void unlock(); + + /** + * Assert that the current thread of execution holds the lock + * + */ + virtual void assert_locked(); + + uint16_t vendor_id; + uint16_t product_id; + uint16_t product_release; + uint8_t device_descriptor[18]; private: - bool addRateFeedbackEndpoint(uint8_t endpoint, uint32_t maxPacket); - bool requestGetDescriptor(void); - bool controlOut(void); - bool controlIn(void); - bool requestSetAddress(void); - bool requestSetConfiguration(void); - bool requestSetFeature(void); - bool requestClearFeature(void); - bool requestGetStatus(void); - bool requestSetup(void); - bool controlSetup(void); - void decodeSetupPacket(uint8_t *data, SETUP_PACKET *packet); - bool requestGetConfiguration(void); - bool requestGetInterface(void); - bool requestSetInterface(void); - - CONTROL_TRANSFER transfer; - USB_DEVICE device; - - uint16_t currentInterface; - uint8_t currentAlternate; -}; + // USBPhyEvents + virtual void power(bool powered); + virtual void suspend(bool suspended); + virtual void sof(int frame_number); + virtual void reset(); + virtual void ep0_setup(); + virtual void ep0_out(); + virtual void ep0_in(); + virtual void out(usb_ep_t endpoint); + virtual void in(usb_ep_t endpoint); + + bool _request_get_descriptor(); + bool _control_out(); + bool _control_in(); + bool _request_set_address(); + bool _request_set_configuration(); + bool _request_set_feature(); + bool _request_clear_feature(); + bool _request_get_status(); + bool _request_setup(); + void _control_setup(); + void _control_abort(); + void _control_abort_start(); + void _control_setup_continue(); + void _decode_setup_packet(uint8_t *data, setup_packet_t *packet); + bool _request_get_configuration(); + bool _request_get_interface(); + bool _request_set_interface(); + void _change_state(DeviceState state); + + struct endpoint_info_t { + void (USBDevice::*callback)(usb_ep_t endpoint); + uint16_t max_packet_size; + uint8_t flags; + uint8_t pending; + }; + struct usb_device_t { + volatile DeviceState state; + uint8_t configuration; + bool suspended; + }; + + enum ControlState { + Setup, + DataOut, + DataIn, + Status + }; + + struct control_transfer_t { + setup_packet_t setup; + uint8_t *ptr; + uint32_t remaining; + uint8_t direction; + bool zlp; + bool notify; + ControlState stage; + bool user_callback; + }; + + endpoint_info_t _endpoint_info[32 - 2]; + + USBPhy *_phy; + bool _initialized; + control_transfer_t _transfer; + usb_device_t _device; + uint32_t _max_packet_size_ep0; + + bool _setup_ready; + bool _abort_control; + + uint16_t _current_interface; + uint8_t _current_alternate; + uint32_t _locked; +}; #endif diff --git a/usb/device/USBDevice/USBDevice_Types.h b/usb/device/USBDevice/USBDevice_Types.h index 543e8a678f8..9d61df7d329 100644 --- a/usb/device/USBDevice/USBDevice_Types.h +++ b/usb/device/USBDevice/USBDevice_Types.h @@ -49,33 +49,4 @@ #define DESCRIPTOR_TYPE(wValue) (wValue >> 8) #define DESCRIPTOR_INDEX(wValue) (wValue & 0xff) -typedef struct { - struct { - uint8_t dataTransferDirection; - uint8_t Type; - uint8_t Recipient; - } bmRequestType; - uint8_t bRequest; - uint16_t wValue; - uint16_t wIndex; - uint16_t wLength; -} SETUP_PACKET; - -typedef struct { - SETUP_PACKET setup; - uint8_t *ptr; - uint32_t remaining; - uint8_t direction; - bool zlp; - bool notify; -} CONTROL_TRANSFER; - -typedef enum {ATTACHED, POWERED, DEFAULT, ADDRESS, CONFIGURED} DEVICE_STATE; - -typedef struct { - volatile DEVICE_STATE state; - uint8_t configuration; - bool suspended; -} USB_DEVICE; - #endif From 3769a516e88f4be9d6ab2dd34637f8fcd3baa5f9 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 7 Feb 2018 16:36:35 -0600 Subject: [PATCH 005/488] Add USBDevice test code Add a USB test and the class USBTester.cpp to go along with it. --- TESTS/host_tests/pyusb_basic.py | 349 ++++++++++++++++++++++++ TESTS/usb_device/basic/USBTester.cpp | 384 +++++++++++++++++++++++++++ TESTS/usb_device/basic/USBTester.h | 91 +++++++ TESTS/usb_device/basic/main.cpp | 62 +++++ 4 files changed, 886 insertions(+) create mode 100644 TESTS/host_tests/pyusb_basic.py create mode 100644 TESTS/usb_device/basic/USBTester.cpp create mode 100644 TESTS/usb_device/basic/USBTester.h create mode 100644 TESTS/usb_device/basic/main.cpp diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py new file mode 100644 index 00000000000..24c7e951455 --- /dev/null +++ b/TESTS/host_tests/pyusb_basic.py @@ -0,0 +1,349 @@ +""" +mbed SDK +Copyright (c) 2018-2018 ARM Limited + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +""" +from __future__ import print_function + +from mbed_host_tests import BaseHostTest +from argparse import ArgumentParser +import time +import sys +from threading import Thread + +import usb.core +from usb.util import build_request_type +from usb.util import CTRL_OUT, CTRL_IN +from usb.util import CTRL_TYPE_STANDARD, CTRL_TYPE_CLASS, CTRL_TYPE_VENDOR +from usb.util import (CTRL_RECIPIENT_DEVICE, CTRL_RECIPIENT_INTERFACE, + CTRL_RECIPIENT_ENDPOINT, CTRL_RECIPIENT_OTHER) + +def get_interface(dev, interface, alternate=0): + intf = None + for active_if in dev.get_active_configuration(): + if active_if.bInterfaceNumber == interface and active_if.bAlternateSetting == alternate: + assert intf is None, "duplicate interface" + intf = active_if + return intf + +VENDOR_TEST_CTRL_IN = 1 +VENDOR_TEST_CTRL_OUT = 2 +VENDOR_TEST_CTRL_NONE = 3 +VENDOR_TEST_CTRL_IN_DELAY = 4 +VENDOR_TEST_CTRL_OUT_DELAY = 5 +VENDOR_TEST_CTRL_NONE_DELAY = 6 +VENDOR_TEST_CTRL_IN_STATUS_DELAY = 7 +VENDOR_TEST_CTRL_OUT_STATUS_DELAY = 8 +VENDOR_TEST_UNSUPPORTED_REQUEST = 32 + +class PyusbBasicTest(BaseHostTest): + """ + """ + def _callback_usb_enumeration_done(self, key, value, timestamp): + print("Received key %s = %s" % (key, value)) + self.log("Received key %s = %s" % (key, value)) + test_device(value, self.log) + passed = True + results = "pass" if passed else "fail" + self.send_kv(results, "0") + + def setup(self): + self.__result = False + self.register_callback('usb_enumeration_done', self._callback_usb_enumeration_done) + + def result(self): + return self.__result + + def teardown(self): + pass + + +class TestMatch(object): + + def __init__(self, serial): + self.serial = serial + + def __call__(self, dev): + try: + return dev.serial_number == self.serial + except ValueError: + return False + + +def test_device(serial_number, log=print): + dev = usb.core.find(custom_match=TestMatch(serial_number)) + if dev is None: + log("Device not found") + return + + ## --Control Tests-- ## + #control_basic_test(dev, log) + # Test control IN/OUT/NODATA + control_stall_test(dev, log) + # Invalid control in/out/nodata requests are stalled + # Stall during different points in the control transfer + #control_sizes_test(dev, log) + # Test control requests of various data stage sizes (1,8,16,32,64,255,256,...) + control_stress_test(dev, log) + # normal and delay mode + + ## --Endpoint test-- ## + #for each endpoint + #-test all allowed wMaxPacketSize sizes and transfer types + #-stall tests + #-set/clear stall control request + #-stall at random points of sending/receiveing data + #-test aborting an in progress transfer + #test as many endpoints at once as possible + #test biggest configuration possible + + ## --physical test-- ## + #-reset notification/handling + #-connect/disconnect tests - have device disconnect and then reconnect + #-disconnect during various phases of control transfers and endpoint transfers + #-suspend/resume tests (may not be possible to test with current framework) + #-suspend/resume notifications + + ## -- Stress tests-- ## + #-concurrent tests (all endpoints at once including control) + #-concurrent tests + reset + delay + + ## -- other tests-- ## + #-report throughput for in/out of control, bulk, interrupt and iso transfers + #-verify that construction/destruction repeatedly works gracefully + + + intf = get_interface(dev, 0, 0) + + # Find endpoints + bulk_in = None + bulk_out = None + int_in = None + int_out = None + + for endpoint in intf: + log("Processing endpoint %s" % endpoint) + ep_type = endpoint.bmAttributes & 0x3 + if ep_type == 2: + if endpoint.bEndpointAddress & 0x80: + assert bulk_in is None + bulk_in = endpoint + else: + assert bulk_out is None + bulk_out = endpoint + elif ep_type == 3: + if endpoint.bEndpointAddress & 0x80: + assert int_in is None + int_in = endpoint + else: + assert int_out is None + int_out = endpoint + assert bulk_in is not None + assert bulk_out is not None + assert int_in is not None + assert int_out is not None + bulk_out.write("hello" + "x" *256); + int_out.write("world" + "x" *256); + + dev.set_interface_altsetting(0, 1) + + intf = get_interface(dev, 0, 0) + + # Find endpoints + bulk_in = None + bulk_out = None + int_in = None + int_out = None + + for endpoint in intf: + log("Processing endpoint %s" % endpoint) + ep_type = endpoint.bmAttributes & 0x3 + if ep_type == 2: + if endpoint.bEndpointAddress & 0x80: + assert bulk_in is None + bulk_in = endpoint + else: + assert bulk_out is None + bulk_out = endpoint + elif ep_type == 3: + if endpoint.bEndpointAddress & 0x80: + assert int_in is None + int_in = endpoint + else: + assert int_out is None + int_out = endpoint + assert bulk_in is not None + assert bulk_out is not None + assert int_in is not None + assert int_out is not None + bulk_out.write("hello2" + "x" *256); + int_out.write("world2" + "x" *256); + + + t = Thread(target=write_data, args=(bulk_out,)) + t.start() + + for _ in range(10): + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_CTRL_NONE_DELAY + value = 0 # Always 0 for this request + index = 0 # Communication interface + length = 0 # No data + dev.ctrl_transfer(request_type, request, value, index, length, 5000) + + t.join() + + return True + +def write_data(pipe): + print("Write data running") + count = 0 + for _ in range(40): + pipe.write("Value is %s" % count) + count += 1 + print("Count %s" % count) + time.sleep(0.5) + + +def control_stall_test(dev, log): + + # Control OUT stall + try: + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_UNSUPPORTED_REQUEST + value = 0 # Always 0 for this request + index = 0 # Communication interface + data = bytearray(64) # Dummy data + dev.ctrl_transfer(request_type, request, value, index, data, 5000) + raise Exception("Invalid request not stalled") + except usb.core.USBError: + log("Invalid request stalled") + + # Control request with no data stage (Device-to-host) + try: + request_type = build_request_type(CTRL_IN, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_UNSUPPORTED_REQUEST + value = 0 # Always 0 for this request + index = 0 # Communication interface + length = 0 + dev.ctrl_transfer(request_type, request, value, index, length, 5000) + raise Exception("Invalid request not stalled") + except usb.core.USBError: + log("Invalid request stalled") + + # Control request with no data stage (Host-to-device) + try: + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_UNSUPPORTED_REQUEST + value = 0 # Always 0 for this request + index = 0 # Communication interface + length = 0 + dev.ctrl_transfer(request_type, request, value, index, length, 5000) + raise Exception("Invalid request not stalled") + except usb.core.USBError: + log("Invalid request stalled") + + # Control IN stall + try: + request_type = build_request_type(CTRL_IN, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_UNSUPPORTED_REQUEST + value = 0 # Always 0 for this request + index = 0 # Communication interface + length = 255 + dev.ctrl_transfer(request_type, request, value, index, length, 5000) + raise Exception("Invalid request not stalled") + except usb.core.USBError: + log("Invalid request stalled") + + for i in (6, 7, 5): + try: + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = 0x6 # GET_DESCRIPTOR + value = (0x03 << 8) | (i << 0) # String descriptor index + index = 0 # Communication interface + length = 255 + resp = dev.ctrl_transfer(request_type, request, value, index, length, 5000) + log("Requesting string %s passed" % i) + except usb.core.USBError: + log("Requesting string %s failed" % i) + + +def control_stress_test(dev, log): + + # Test various patterns of control transfers + # + # Some devices have had problems with back-to-back + # control transfers. Intentionally send these sequences + # to make sure they are properly handled. + count = 0 + for _ in range(100): + # Control transfer with a data in stage + request_type = build_request_type(CTRL_IN, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_CTRL_IN + value = 8 # Size of data the device should actually send + index = count # Unused - set for debugging only + length = 255 + dev.ctrl_transfer(request_type, request, value, index, length, 5000) + count += 1 + + for _ in range(100): + # Control transfer with a data out stage followed + # by a control transfer with a data in stage + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_CTRL_OUT + value = 8 # Size of data the device should actually read + index = count # Unused - set for debugging only + data = bytearray(8) # Dummy data + dev.ctrl_transfer(request_type, request, value, index, data, 5000) + count += 1 + + request_type = build_request_type(CTRL_IN, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_CTRL_IN + value = 8 # Size of data the device should actually send + index = count # Unused - set for debugging only + length = 255 + dev.ctrl_transfer(request_type, request, value, index, length, 5000) + count += 1 + + for _ in range(100): + # Control transfer with a data out stage + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_CTRL_OUT + value = 8 # Size of data the device should actually read + index = count # Unused - set for debugging only + data = bytearray(8) # Dummy data + dev.ctrl_transfer(request_type, request, value, index, data, 5000) + count += 1 + + +def main(): + parser = ArgumentParser(description="USB basic test") + parser.add_argument('serial', help='USB serial number of DUT') + args = parser.parse_args() + ret = test_device(args.serial) + print("Test %s" % "passed" if ret else "failed") + + +if __name__ == "__main__": + main() diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp new file mode 100644 index 00000000000..1f26fce2f1c --- /dev/null +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -0,0 +1,384 @@ +/* + * Copyright (c) 2018-2018, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBTester.h" +#include "mbed_shared_queues.h" +#include "EndpointResolver.h" + +#define DEFAULT_CONFIGURATION (1) + +#define VENDOR_TEST_CTRL_IN 1 +#define VENDOR_TEST_CTRL_OUT 2 +#define VENDOR_TEST_CTRL_NONE 3 +#define VENDOR_TEST_CTRL_IN_DELAY 4 +#define VENDOR_TEST_CTRL_OUT_DELAY 5 +#define VENDOR_TEST_CTRL_NONE_DELAY 6 +#define VENDOR_TEST_CTRL_IN_STATUS_DELAY 7 +#define VENDOR_TEST_CTRL_OUT_STATUS_DELAY 8 + +#define MAX_EP_SIZE 64 +#define MIN_EP_SIZE 8 + + +USBTester::USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): USBDevice(vendor_id, product_id, product_release) +{ + + EndpointResolver resolver(endpoint_table()); + + resolver.endpoint_ctrl(64); + bulk_in = resolver.endpoint_in(USB_EP_TYPE_BULK, 64); + bulk_out = resolver.endpoint_out(USB_EP_TYPE_BULK, 64); + int_in = resolver.endpoint_in(USB_EP_TYPE_INT, 64); + int_out = resolver.endpoint_out(USB_EP_TYPE_INT, 64); + MBED_ASSERT(resolver.valid()); + queue = mbed_highprio_event_queue(); + + configuration_desc(); + + init(); + USBDevice::connect(connect_blocking); + +} + +USBTester::~USBTester() +{ + deinit(); +} + +void USBTester::callback_state_change(DeviceState new_state) +{ + // Nothing to do +}; + +void USBTester::callback_request(const setup_packet_t *setup) +{ + /* Called in ISR context */ + RequestResult result = PassThrough; + uint8_t *data = NULL; + uint32_t size = 0; + uint32_t delay = 0; + + /* Process vendor-specific requests */ + if (setup->bmRequestType.Type == VENDOR_TYPE) { + switch (setup->bRequest) { + case VENDOR_TEST_CTRL_IN: + result = Send; + data = ctrl_buf; + size = setup->wValue < sizeof(ctrl_buf) ? setup->wValue : sizeof(ctrl_buf); + break; + case VENDOR_TEST_CTRL_OUT: + result = Receive; + data = ctrl_buf; + size = setup->wValue < 8 ? setup->wValue : 8; + break; + case VENDOR_TEST_CTRL_NONE: + result = Success; + break; + case VENDOR_TEST_CTRL_NONE_DELAY: + result = Success; + delay = 2000; + break; + default: + result = PassThrough; + break; + } + } + + if (delay) { + queue->call_in(delay, static_cast(this), &USBTester::complete_request, Success, data, size); + } else { + complete_request(result, data, size); + } + + +} + +void USBTester::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) +{ + if (aborted) { + complete_request_xfer_done(false); + return; + } + + bool result = false; + if (setup->bmRequestType.Type == VENDOR_TYPE) { + switch (setup->bRequest) { + case VENDOR_TEST_CTRL_IN: + result = true; + break; + case VENDOR_TEST_CTRL_OUT: + result = true; + break; + default: + result = false; + break; + } + } + complete_request_xfer_done(true); +} + +// Called in ISR context +// Set configuration. Return false if the +// configuration is not supported. +void USBTester::callback_set_configuration(uint8_t configuration) +{ + if (configuration != DEFAULT_CONFIGURATION) { + complete_set_configuration(false); + return; + } + + // Configure endpoints > 0 + endpoint_add(int_in, MAX_EP_SIZE, USB_EP_TYPE_INT); + endpoint_add(int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); + endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); + endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); + + read_start(int_out); + read_start(bulk_out); + + complete_set_configuration(true); +} + +void USBTester::callback_set_interface(uint16_t interface, uint8_t alternate) +{ + if (interface == 0 && alternate == 0) { + endpoint_remove(int_in); + endpoint_remove(int_out); + endpoint_remove(bulk_in); + endpoint_remove(bulk_out); + + endpoint_add(int_in, MAX_EP_SIZE, USB_EP_TYPE_INT); + endpoint_add(int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); + endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); + endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); + + read_start(int_out); + read_start(bulk_out); + + complete_set_interface(true); + return; + } + if (interface == 0 && alternate == 1) { + endpoint_remove(int_in); + endpoint_remove(int_out); + endpoint_remove(bulk_in); + endpoint_remove(bulk_out); + + endpoint_add(int_in, MIN_EP_SIZE, USB_EP_TYPE_INT); + endpoint_add(int_out, MIN_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); + endpoint_add(bulk_in, MIN_EP_SIZE, USB_EP_TYPE_BULK); + endpoint_add(bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); + + read_start(int_out); + read_start(bulk_out); + + complete_set_interface(true); + return; + } + complete_set_interface(false); +} + +const uint8_t *USBTester::device_desc() +{ + uint8_t ep0_size = endpoint_max_packet_size(0x00); + uint8_t device_descriptor_temp[] = { + 18, // bLength + 1, // bDescriptorType + 0x10, 0x01, // bcdUSB + 0, // bDeviceClass + 0, // bDeviceSubClass + 0, // bDeviceProtocol + ep0_size, // bMaxPacketSize0 + (uint8_t)(LSB(vendor_id)), (uint8_t)(MSB(vendor_id)), // idVendor + (uint8_t)(LSB(product_id)), (uint8_t)(MSB(product_id)),// idProduct + 0x00, 0x01, // bcdDevice + 1, // iManufacturer + 2, // iProduct + 3, // iSerialNumber + 1 // bNumConfigurations + }; + MBED_ASSERT(sizeof(device_descriptor_temp) == sizeof(device_descriptor)); + memcpy(device_descriptor, device_descriptor_temp, sizeof(device_descriptor)); + return device_descriptor; +} + +const uint8_t *USBTester::string_iinterface_desc() +{ + static const uint8_t string_iinterface_descriptor[] = { + 0x08, + STRING_DESCRIPTOR, + 'C', 0, 'D', 0, 'C', 0, + }; + return string_iinterface_descriptor; +} + +const uint8_t *USBTester::string_iproduct_desc() +{ + static const uint8_t string_iproduct_descriptor[] = { + 0x16, + STRING_DESCRIPTOR, + 'C', 0, 'D', 0, 'C', 0, ' ', 0, 'D', 0, 'E', 0, 'V', 0, 'I', 0, 'C', 0, 'E', 0 + }; + return string_iproduct_descriptor; +} + + +#define CONFIG1_DESC_SIZE (9+9+7+7+7+7 + 9+7+7+7+7) + +const uint8_t *USBTester::configuration_desc() +{ + static const uint8_t config_descriptor[] = { + // configuration descriptor + 9, // bLength + 2, // bDescriptorType + LSB(CONFIG1_DESC_SIZE), // wTotalLength + MSB(CONFIG1_DESC_SIZE), + 1, // bNumInterfaces + 1, // bConfigurationValue + 0, // iConfiguration + 0x80, // bmAttributes + 50, // bMaxPower + + // Interface 0 setting 0 + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + 9, // bLength + 4, // bDescriptorType + 0, // bInterfaceNumber + 0, // bAlternateSetting + 4, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_in, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MAX_EP_SIZE),// wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE),// wMaxPacketSize (MSB) + 0, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_out, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MAX_EP_SIZE),// wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE),// wMaxPacketSize (MSB) + 0, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + int_in, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=interrupt) + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + int_out, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=interrupt) + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // Interface 0 setting 1 + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + 9, // bLength + 4, // bDescriptorType + 0, // bInterfaceNumber + 1, // bAlternateSetting + 4, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_in, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) + 0, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_out, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) + 0, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + int_in, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=interrupt) + LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + int_out, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=interrupt) + LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) + 1 // bInterval + + }; + return config_descriptor; +} + + +void USBTester::epint_out_callback(usb_ep_t endpoint) +{ + uint8_t buffer[65]; + uint32_t size = 0; + + if (!read_finish(endpoint, buffer, sizeof(buffer), &size)) { + return; + } + if (!read_start(endpoint)) { + return; + } +} +void USBTester::epbulk_out_callback(usb_ep_t endpoint) +{ + uint8_t buffer[65]; + uint32_t size = 0; + + if (!read_finish(endpoint, buffer, sizeof(buffer), &size)) { + return; + } + if (!read_start(endpoint)) { + return; + } +} + diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h new file mode 100644 index 00000000000..0e527af98ab --- /dev/null +++ b/TESTS/usb_device/basic/USBTester.h @@ -0,0 +1,91 @@ +/* + * Copyright (c) 2018-2018, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USB_TESTER_H +#define USB_TESTER_H + +/* These headers are included for child class. */ +#include "USBDescriptor.h" +#include "USBDevice_Types.h" +#include "EventQueue.h" + +#include "USBDevice.h" + +class USBTester: public USBDevice { +public: + + /* + * Constructor + * + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your preoduct_release + * @param connect_blocking define if the connection must be blocked if USB not plugged in + */ + USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); + + ~USBTester(); + +protected: + + /* + * Get device descriptor. Warning: this method has to store the length of the report descriptor in reportLength. + * + * @returns pointer to the device descriptor + */ + virtual const uint8_t *device_desc(); + + /* + * Get string product descriptor + * + * @returns pointer to the string product descriptor + */ + virtual const uint8_t *string_iproduct_desc(); + + /* + * Get string interface descriptor + * + * @returns pointer to the string interface descriptor + */ + virtual const uint8_t *string_iinterface_desc(); + + /* + * Get configuration descriptor + * + * @returns pointer to the configuration descriptor + */ + virtual const uint8_t *configuration_desc(); + +protected: + uint8_t bulk_in; + uint8_t bulk_out; + uint8_t int_in; + uint8_t int_out; + EventQueue *queue; + + virtual void callback_state_change(DeviceState new_state); + virtual void callback_request(const setup_packet_t *setup); + virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); + virtual void callback_set_configuration(uint8_t configuration); + virtual void callback_set_interface(uint16_t interface, uint8_t alternate); + virtual void epbulk_out_callback(usb_ep_t endpoint); + virtual void epint_out_callback(usb_ep_t endpoint); + uint8_t ctrl_buf[2048]; + +}; + +#endif diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp new file mode 100644 index 00000000000..141bb473e2c --- /dev/null +++ b/TESTS/usb_device/basic/main.cpp @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2018-2018, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include +#include +#include "mbed.h" +#include "greentea-client/test_env.h" +#include "unity/unity.h" +#include "utest/utest.h" + +#include "USBTester.h" + +#if !defined(DEVICE_USBDEVICE) || !DEVICE_USBDEVICE +#error [NOT_SUPPORTED] USB Device not supported for this target +#endif + +using namespace utest::v1; + +// Echo server (echo payload to host) +void test_case_basic() +{ + char _key[11] = {}; + char _value[128] = {}; + + { + USBTester serial(0x0d28, 0x0205, 0x0001, true); + + greentea_send_kv("usb_enumeration_done", "0123456789"); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + } +} + +Case cases[] = { + Case("pyusb basic test", test_case_basic), +}; + +utest::v1::status_t greentea_test_setup(const size_t number_of_cases) +{ + GREENTEA_SETUP(120, "pyusb_basic"); + return greentea_test_setup_handler(number_of_cases); +} + +Specification specification(greentea_test_setup, cases, greentea_test_teardown_handler); + +int main() +{ + Harness::run(specification); +} From d503d235f0ebc3184edafdf42be249f75e0243c2 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 7 Feb 2018 16:43:26 -0600 Subject: [PATCH 006/488] Add USBPhy for the LPC17xx Move the LPC17xx USB driver files from mbed-os\features\unsupported\USBDevice\targets\TARGET_NXP and update them to match the new USBPhy API. --- .../usb/USBEndpoints_LPC17_LPC23.h | 97 +++ .../TARGET_LPC176X/usb/USBHAL_LPC17.cpp | 709 ++++++++++++++++++ .../TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h | 66 ++ targets/targets.json | 2 +- 4 files changed, 873 insertions(+), 1 deletion(-) create mode 100644 targets/TARGET_NXP/TARGET_LPC176X/usb/USBEndpoints_LPC17_LPC23.h create mode 100644 targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp create mode 100644 targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBEndpoints_LPC17_LPC23.h b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBEndpoints_LPC17_LPC23.h new file mode 100644 index 00000000000..09ab66540d6 --- /dev/null +++ b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBEndpoints_LPC17_LPC23.h @@ -0,0 +1,97 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#define NUMBER_OF_LOGICAL_ENDPOINTS (16) +#define NUMBER_OF_PHYSICAL_ENDPOINTS (NUMBER_OF_LOGICAL_ENDPOINTS * 2) + +/* Define physical endpoint numbers */ + +/* Endpoint No. Type(s) MaxPacket DoubleBuffer */ +/* ---------------- ------------ ---------- --- */ +#define EP0OUT (0x00) /* Control 64 No */ +#define EP0IN (0x80) /* Control 64 No */ +#define EP1OUT (0x01) /* Interrupt 64 No */ +#define EP1IN (0x81) /* Interrupt 64 No */ +#define EP2OUT (0x02) /* Bulk 64 Yes */ +#define EP2IN (0x82) /* Bulk 64 Yes */ +#define EP3OUT (0x03) /* Isochronous 1023 Yes */ +#define EP3IN (0x83) /* Isochronous 1023 Yes */ +#define EP4OUT (0x04) /* Interrupt 64 No */ +#define EP4IN (0x84) /* Interrupt 64 No */ +#define EP5OUT (0x05) /* Bulk 64 Yes */ +#define EP5IN (0x85) /* Bulk 64 Yes */ +#define EP6OUT (0x06) /* Isochronous 1023 Yes */ +#define EP6IN (0x86) /* Isochronous 1023 Yes */ +#define EP7OUT (0x07) /* Interrupt 64 No */ +#define EP7IN (0x87) /* Interrupt 64 No */ +#define EP8OUT (0x08) /* Bulk 64 Yes */ +#define EP8IN (0x88) /* Bulk 64 Yes */ +#define EP9OUT (0x09) /* Isochronous 1023 Yes */ +#define EP9IN (0x89) /* Isochronous 1023 Yes */ +#define EP10OUT (0x0A) /* Interrupt 64 No */ +#define EP10IN (0x8A) /* Interrupt 64 No */ +#define EP11OUT (0x0B) /* Bulk 64 Yes */ +#define EP11IN (0x8B) /* Bulk 64 Yes */ +#define EP12OUT (0x0C) /* Isochronous 1023 Yes */ +#define EP12IN (0x8C) /* Isochronous 1023 Yes */ +#define EP13OUT (0x0D) /* Interrupt 64 No */ +#define EP13IN (0x8D) /* Interrupt 64 No */ +#define EP14OUT (0x0E) /* Bulk 64 Yes */ +#define EP14IN (0x8E) /* Bulk 64 Yes */ +#define EP15OUT (0x0F) /* Bulk 64 Yes */ +#define EP15IN (0x8F) /* Bulk 64 Yes */ + +/* Maximum Packet sizes */ + +#define MAX_PACKET_SIZE_EP0 (64) +#define MAX_PACKET_SIZE_EP1 (64) +#define MAX_PACKET_SIZE_EP2 (64) +#define MAX_PACKET_SIZE_EP3 (1023) +#define MAX_PACKET_SIZE_EP4 (64) +#define MAX_PACKET_SIZE_EP5 (64) +#define MAX_PACKET_SIZE_EP6 (1023) +#define MAX_PACKET_SIZE_EP7 (64) +#define MAX_PACKET_SIZE_EP8 (64) +#define MAX_PACKET_SIZE_EP9 (1023) +#define MAX_PACKET_SIZE_EP10 (64) +#define MAX_PACKET_SIZE_EP11 (64) +#define MAX_PACKET_SIZE_EP12 (1023) +#define MAX_PACKET_SIZE_EP13 (64) +#define MAX_PACKET_SIZE_EP14 (64) +#define MAX_PACKET_SIZE_EP15 (64) + +/* Generic endpoints - intended to be portable accross devices */ +/* and be suitable for simple USB devices. */ + +/* Bulk endpoints */ +#define EPBULK_OUT (EP2OUT) +#define EPBULK_IN (EP2IN) +#define EPBULK_OUT_callback EP2_OUT_callback +#define EPBULK_IN_callback EP2_IN_callback +/* Interrupt endpoints */ +#define EPINT_OUT (EP1OUT) +#define EPINT_IN (EP1IN) +#define EPINT_OUT_callback EP1_OUT_callback +#define EPINT_IN_callback EP1_IN_callback +/* Isochronous endpoints */ +#define EPISO_OUT (EP3OUT) +#define EPISO_IN (EP3IN) +#define EPISO_OUT_callback EP3_OUT_callback +#define EPISO_IN_callback EP3_IN_callback + +#define MAX_PACKET_SIZE_EPBULK (MAX_PACKET_SIZE_EP2) +#define MAX_PACKET_SIZE_EPINT (MAX_PACKET_SIZE_EP1) +#define MAX_PACKET_SIZE_EPISO (MAX_PACKET_SIZE_EP3) diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp new file mode 100644 index 00000000000..23e8c1f87a1 --- /dev/null +++ b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp @@ -0,0 +1,709 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined(DEVICE_USBDEVICE) && DEVICE_USBDEVICE && \ + (defined(TARGET_LPC1768) || defined(TARGET_LPC2368) || defined(TARGET_LPC2460)) + +#include "USBEndpoints_LPC17_LPC23.h" +#include "USBPhyHw.h" +#include "usb_phy_api.h" + + +// Get endpoint direction +#define IN_EP(endpoint) ((endpoint) & 1U ? true : false) +#define OUT_EP(endpoint) ((endpoint) & 1U ? false : true) + +// Convert physical endpoint number to register bit +#define EP(endpoint) (1UL<>1)|(((endpoint)&1)?0x80:0)) + +// Power Control for Peripherals register +#define PCUSB (1UL<<31) + +// USB Clock Control register +#define DEV_CLK_EN (1UL<<1) +#define AHB_CLK_EN (1UL<<4) + +// USB Clock Status register +#define DEV_CLK_ON (1UL<<1) +#define AHB_CLK_ON (1UL<<4) + +// USB Device Interupt registers +#define FRAME (1UL<<0) +#define EP_FAST (1UL<<1) +#define EP_SLOW (1UL<<2) +#define DEV_STAT (1UL<<3) +#define CCEMPTY (1UL<<4) +#define CDFULL (1UL<<5) +#define RxENDPKT (1UL<<6) +#define TxENDPKT (1UL<<7) +#define EP_RLZED (1UL<<8) +#define ERR_INT (1UL<<9) + +// USB Control register +#define RD_EN (1<<0) +#define WR_EN (1<<1) +#define LOG_ENDPOINT(endpoint) ((DESC_TO_PHY(endpoint)>>1)<<2) + +// USB Receive Packet Length register +#define DV (1UL<<10) +#define PKT_RDY (1UL<<11) +#define PKT_LNGTH_MASK (0x3ff) + +// Serial Interface Engine (SIE) +#define SIE_WRITE (0x01) +#define SIE_READ (0x02) +#define SIE_COMMAND (0x05) +#define SIE_CMD_CODE(phase, data) ((phase<<8)|(data<<16)) + +// SIE Command codes +#define SIE_CMD_SET_ADDRESS (0xD0) +#define SIE_CMD_CONFIGURE_DEVICE (0xD8) +#define SIE_CMD_SET_MODE (0xF3) +#define SIE_CMD_READ_FRAME_NUMBER (0xF5) +#define SIE_CMD_READ_TEST_REGISTER (0xFD) +#define SIE_CMD_SET_DEVICE_STATUS (0xFE) +#define SIE_CMD_GET_DEVICE_STATUS (0xFE) +#define SIE_CMD_GET_ERROR_CODE (0xFF) +#define SIE_CMD_READ_ERROR_STATUS (0xFB) + +#define SIE_CMD_SELECT_ENDPOINT(endpoint) (0x00+DESC_TO_PHY(endpoint)) +#define SIE_CMD_SELECT_ENDPOINT_CLEAR_INTERRUPT(endpoint) (0x40+DESC_TO_PHY(endpoint)) +#define SIE_CMD_SET_ENDPOINT_STATUS(endpoint) (0x40+DESC_TO_PHY(endpoint)) + +#define SIE_CMD_CLEAR_BUFFER (0xF2) +#define SIE_CMD_VALIDATE_BUFFER (0xFA) + +// SIE Device Status register +#define SIE_DS_CON (1<<0) +#define SIE_DS_CON_CH (1<<1) +#define SIE_DS_SUS (1<<2) +#define SIE_DS_SUS_CH (1<<3) +#define SIE_DS_RST (1<<4) + +// SIE Device Set Address register +#define SIE_DSA_DEV_EN (1<<7) + +// SIE Configue Device register +#define SIE_CONF_DEVICE (1<<0) + +// Select Endpoint register +#define SIE_SE_FE (1<<0) +#define SIE_SE_ST (1<<1) +#define SIE_SE_STP (1<<2) +#define SIE_SE_PO (1<<3) +#define SIE_SE_EPN (1<<4) +#define SIE_SE_B_1_FULL (1<<5) +#define SIE_SE_B_2_FULL (1<<6) + +// Set Endpoint Status command +#define SIE_SES_ST (1<<0) +#define SIE_SES_DA (1<<5) +#define SIE_SES_RF_MO (1<<6) +#define SIE_SES_CND_ST (1<<7) + + +static USBPhyHw *instance; + +static volatile int epComplete; + +static void SIECommand(uint32_t command) +{ + // The command phase of a SIE transaction + LPC_USB->USBDevIntClr = CCEMPTY; + LPC_USB->USBCmdCode = SIE_CMD_CODE(SIE_COMMAND, command); + while (!(LPC_USB->USBDevIntSt & CCEMPTY)); +} + +static void SIEWriteData(uint8_t data) +{ + // The data write phase of a SIE transaction + LPC_USB->USBDevIntClr = CCEMPTY; + LPC_USB->USBCmdCode = SIE_CMD_CODE(SIE_WRITE, data); + while (!(LPC_USB->USBDevIntSt & CCEMPTY)); +} + +static uint8_t SIEReadData(uint32_t command) +{ + // The data read phase of a SIE transaction + LPC_USB->USBDevIntClr = CDFULL; + LPC_USB->USBCmdCode = SIE_CMD_CODE(SIE_READ, command); + while (!(LPC_USB->USBDevIntSt & CDFULL)); + return (uint8_t)LPC_USB->USBCmdData; +} + +static void SIEsetDeviceStatus(uint8_t status) +{ + // Write SIE device status register + SIECommand(SIE_CMD_SET_DEVICE_STATUS); + SIEWriteData(status); +} + +static uint8_t SIEgetDeviceStatus(void) +{ + // Read SIE device status register + SIECommand(SIE_CMD_GET_DEVICE_STATUS); + return SIEReadData(SIE_CMD_GET_DEVICE_STATUS); +} + +void SIEsetAddress(uint8_t address) +{ + // Write SIE device address register + SIECommand(SIE_CMD_SET_ADDRESS); + SIEWriteData((address & 0x7f) | SIE_DSA_DEV_EN); +} + +static uint8_t SIEselectEndpoint(uint8_t endpoint) +{ + // SIE select endpoint command + SIECommand(SIE_CMD_SELECT_ENDPOINT(endpoint)); + return SIEReadData(SIE_CMD_SELECT_ENDPOINT(endpoint)); +} + +static uint8_t SIEclearBuffer(void) +{ + // SIE clear buffer command + SIECommand(SIE_CMD_CLEAR_BUFFER); + return SIEReadData(SIE_CMD_CLEAR_BUFFER); +} + +static void SIEvalidateBuffer(void) +{ + // SIE validate buffer command + SIECommand(SIE_CMD_VALIDATE_BUFFER); +} + +static void SIEsetEndpointStatus(uint8_t endpoint, uint8_t status) +{ + // SIE set endpoint status command + SIECommand(SIE_CMD_SET_ENDPOINT_STATUS(endpoint)); + SIEWriteData(status); +} + +static uint16_t SIEgetFrameNumber(void) __attribute__((unused)); +static uint16_t SIEgetFrameNumber(void) +{ + // Read current frame number + uint16_t lowByte; + uint16_t highByte; + + SIECommand(SIE_CMD_READ_FRAME_NUMBER); + lowByte = SIEReadData(SIE_CMD_READ_FRAME_NUMBER); + highByte = SIEReadData(SIE_CMD_READ_FRAME_NUMBER); + + return (highByte << 8) | lowByte; +} + +static void SIEconfigureDevice(void) +{ + // SIE Configure device command + SIECommand(SIE_CMD_CONFIGURE_DEVICE); + SIEWriteData(SIE_CONF_DEVICE); +} + +static void SIEunconfigureDevice(void) +{ + // SIE Configure device command + SIECommand(SIE_CMD_CONFIGURE_DEVICE); + SIEWriteData(0); +} + +static void SIEconnect(void) +{ + // Connect USB device + uint8_t status = SIEgetDeviceStatus(); + SIEsetDeviceStatus(status | SIE_DS_CON); +} + + +static void SIEdisconnect(void) +{ + // Disconnect USB device + uint8_t status = SIEgetDeviceStatus(); + SIEsetDeviceStatus(status & ~SIE_DS_CON); +} + + +static uint8_t selectEndpointClearInterrupt(uint8_t endpoint) +{ + // Implemented using using EP_INT_CLR. + LPC_USB->USBEpIntClr = EP(endpoint); + while (!(LPC_USB->USBDevIntSt & CDFULL)); + return (uint8_t)LPC_USB->USBCmdData; +} + + +static void enableEndpointEvent(uint8_t endpoint) +{ + // Enable an endpoint interrupt + LPC_USB->USBEpIntEn |= EP(endpoint); +} + +static void disableEndpointEvent(uint8_t endpoint) __attribute__((unused)); +static void disableEndpointEvent(uint8_t endpoint) +{ + // Disable an endpoint interrupt + LPC_USB->USBEpIntEn &= ~EP(endpoint); +} + + +static uint32_t endpointReadcore(uint8_t endpoint, uint8_t *buffer, uint32_t size) +{ + // Read from an OUT endpoint + uint32_t actual_size; + uint32_t i; + uint32_t data = 0; + uint8_t offset; + + LPC_USB->USBCtrl = LOG_ENDPOINT(endpoint) | RD_EN; + while (!(LPC_USB->USBRxPLen & PKT_RDY)); + + actual_size = LPC_USB->USBRxPLen & PKT_LNGTH_MASK; + + offset = 0; + + if (actual_size > 0) { + for (i = 0; i < actual_size; i++) { + if (offset == 0) { + // Fetch up to four bytes of data as a word + data = LPC_USB->USBRxData; + } + + // extract a byte + if (size) { + *buffer = (data >> offset) & 0xff; + buffer++; + size--; + } + + // move on to the next byte + offset = (offset + 8) % 32; + } + } else { + (void)LPC_USB->USBRxData; + } + + LPC_USB->USBCtrl = 0; + + return actual_size; +} + +static void endpointWritecore(uint8_t endpoint, uint8_t *buffer, uint32_t size) +{ + // Write to an IN endpoint + uint32_t temp, data; + uint8_t offset; + + LPC_USB->USBCtrl = LOG_ENDPOINT(endpoint) | WR_EN; + + LPC_USB->USBTxPLen = size; + offset = 0; + data = 0; + + if (size > 0) { + do { + // Fetch next data byte into a word-sized temporary variable + temp = *buffer++; + + // Add to current data word + temp = temp << offset; + data = data | temp; + + // move on to the next byte + offset = (offset + 8) % 32; + size--; + + if ((offset == 0) || (size == 0)) { + // Write the word to the endpoint + LPC_USB->USBTxData = data; + data = 0; + } + } while (size > 0); + } else { + LPC_USB->USBTxData = 0; + } + + // Clear WR_EN to cover zero length packet case + LPC_USB->USBCtrl = 0; + + SIEselectEndpoint(endpoint); + SIEvalidateBuffer(); +} + +USBPhy *get_usb_phy() +{ + static USBPhyHw usbphy; + return &usbphy; +} + +USBPhyHw::USBPhyHw(void) +{ + +} + +USBPhyHw::~USBPhyHw(void) +{ + +} + +void USBPhyHw::init(USBPhyEvents *events) +{ + this->events = events; + + // Disable IRQ + NVIC_DisableIRQ(USB_IRQn); + + // Enable power to USB device controller + LPC_SC->PCONP |= PCUSB; + + // Enable USB clocks + LPC_USB->USBClkCtrl |= DEV_CLK_EN | AHB_CLK_EN; + while (LPC_USB->USBClkSt != (DEV_CLK_ON | AHB_CLK_ON)); + + // Configure pins P0.29 and P0.30 to be USB D+ and USB D- + LPC_PINCON->PINSEL1 &= 0xc3ffffff; + LPC_PINCON->PINSEL1 |= 0x14000000; + + // Disconnect USB device + SIEdisconnect(); + + // Configure pin P2.9 to be Connect + LPC_PINCON->PINSEL4 &= 0xfffcffff; + LPC_PINCON->PINSEL4 |= 0x00040000; + + // Connect must be low for at least 2.5uS + wait(0.3); + + // Set the maximum packet size for the control endpoints + endpoint_add(EP0IN, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); + endpoint_add(EP0OUT, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); + + // Attach IRQ + instance = this; + NVIC_SetVector(USB_IRQn, (uint32_t)&_usbisr); + + // Enable interrupts for device events and EP0 + LPC_USB->USBDevIntEn = EP_SLOW | DEV_STAT | FRAME; + enableEndpointEvent(EP0IN); + enableEndpointEvent(EP0OUT); +} + +void USBPhyHw::deinit() +{ + // Ensure device disconnected + SIEdisconnect(); + // Disable USB interrupts + NVIC_DisableIRQ(USB_IRQn); + events = NULL; +} + +bool USBPhyHw::powered() +{ + return true; +} + +void USBPhyHw::connect(void) +{ + NVIC_EnableIRQ(USB_IRQn); + // Connect USB device + SIEconnect(); +} + +void USBPhyHw::disconnect(void) +{ + NVIC_DisableIRQ(USB_IRQn); + // Disconnect USB device + SIEdisconnect(); +} + +void USBPhyHw::configure(void) +{ + SIEconfigureDevice(); +} + +void USBPhyHw::unconfigure(void) +{ + SIEunconfigureDevice(); +} + +void USBPhyHw::sof_enable() +{ + //TODO +} + +void USBPhyHw::sof_disable() +{ + //TODO +} + +void USBPhyHw::set_address(uint8_t address) +{ + SIEsetAddress(address); +} + +uint32_t USBPhyHw::ep0_set_max_packet(uint32_t max_packet) +{ + return MAX_PACKET_SIZE_EP0; +} + +void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) +{ + endpointReadcore(EP0OUT, buffer, size); +} + +void USBPhyHw::ep0_read(void) +{ + endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0); +} + +uint32_t USBPhyHw::ep0_read_result(uint8_t *buffer, uint32_t size) +{ + return endpointReadcore(EP0OUT, buffer, size); +} + +void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) +{ + endpointWritecore(EP0IN, buffer, size); +} + +void USBPhyHw::ep0_stall(void) +{ + // This will stall both control endpoints + endpoint_stall(EP0OUT); +} + +bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint32_t maximumSize) +{ + // Don't clear isochronous endpoints + if ((DESC_TO_PHY(endpoint) >> 1) % 3 || (DESC_TO_PHY(endpoint) >> 1) == 0) { + SIEselectEndpoint(endpoint); + SIEclearBuffer(); + } + return true; +} + +bool USBPhyHw::endpoint_read_result(usb_ep_t endpoint, uint8_t *buffer, uint32_t size, uint32_t *bytesRead) +{ + + //for isochronous endpoint, we don't wait an interrupt + if ((DESC_TO_PHY(endpoint) >> 1) % 3 || (DESC_TO_PHY(endpoint) >> 1) == 0) { + if (!(epComplete & EP(endpoint))) { + return false; + } + } + + *bytesRead = endpointReadcore(endpoint, buffer, size); + epComplete &= ~EP(endpoint); + return true; +} + +bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ + epComplete &= ~EP(endpoint); + + endpointWritecore(endpoint, data, size); + return true; +} + +void USBPhyHw::endpoint_abort(usb_ep_t endpoint) +{ + //TODO - needs to be implemented +} + +bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t maxPacket, usb_ep_type_t type) +{ + // Realise an endpoint + LPC_USB->USBDevIntClr = EP_RLZED; + LPC_USB->USBReEp |= EP(endpoint); + LPC_USB->USBEpInd = DESC_TO_PHY(endpoint); + LPC_USB->USBMaxPSize = maxPacket; + + while (!(LPC_USB->USBDevIntSt & EP_RLZED)); + LPC_USB->USBDevIntClr = EP_RLZED; + + enableEndpointEvent(endpoint); + return true; +} + +void USBPhyHw::endpoint_remove(usb_ep_t endpoint) +{ + // Unrealise an endpoint + + disableEndpointEvent(endpoint); + + LPC_USB->USBDevIntClr = EP_RLZED; + LPC_USB->USBReEp &= ~EP(endpoint); + + while (!(LPC_USB->USBDevIntSt & EP_RLZED)); + LPC_USB->USBDevIntClr = EP_RLZED; +} + +void USBPhyHw::endpoint_stall(usb_ep_t endpoint) +{ + // Stall an endpoint + if ((endpoint == EP0IN) || (endpoint == EP0OUT)) { + // Conditionally stall both control endpoints + SIEsetEndpointStatus(EP0OUT, SIE_SES_CND_ST); + } else { + SIEsetEndpointStatus(endpoint, SIE_SES_ST); + } +} + +void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) +{ + // Unstall an endpoint. The endpoint will also be reinitialised + SIEsetEndpointStatus(endpoint, 0); +} + +void USBPhyHw::remote_wakeup(void) +{ + // Remote wakeup + uint8_t status; + + // Enable USB clocks + LPC_USB->USBClkCtrl |= DEV_CLK_EN | AHB_CLK_EN; + while (LPC_USB->USBClkSt != (DEV_CLK_ON | AHB_CLK_ON)); + + status = SIEgetDeviceStatus(); + SIEsetDeviceStatus(status & ~SIE_DS_SUS); +} + +const usb_ep_table_t *USBPhyHw::endpoint_table() +{ + static const usb_ep_table_t lpc_table = { + 4096 - 32 * 4, // 32 words for endpoint buffers + // +3 based added to interrupt and isochronous to ensure enough + // space for 4 byte alignment + { + {USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 0}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0} + } + }; + return &lpc_table; +} + +void USBPhyHw::_usbisr(void) +{ + NVIC_DisableIRQ(USB_IRQn); + instance->events->start_process(); +} + +void USBPhyHw::process(void) +{ + uint8_t devStat; + + if (LPC_USB->USBDevIntSt & FRAME) { + // Start of frame event + events->sof(SIEgetFrameNumber()); + // Clear interrupt status flag + LPC_USB->USBDevIntClr = FRAME; + } + + if (LPC_USB->USBDevIntSt & DEV_STAT) { + // Device Status interrupt + // Must clear the interrupt status flag before reading the device status from the SIE + LPC_USB->USBDevIntClr = DEV_STAT; + + // Read device status from SIE + devStat = SIEgetDeviceStatus(); + //printf("devStat: %d\r\n", devStat); + + if (devStat & SIE_DS_SUS_CH) { + // Suspend status changed + if ((devStat & SIE_DS_SUS) != 0) { + events->suspend(false); + } + } + + if (devStat & SIE_DS_RST) { + // Bus reset + if ((devStat & SIE_DS_SUS) == 0) { + events->suspend(true); + } + events->reset(); + } + } + + if (LPC_USB->USBDevIntSt & EP_SLOW) { + // (Slow) Endpoint Interrupt + + // Process IN packets before SETUP packets + // Note - order of OUT and SETUP does not matter as OUT packets + // are clobbered by SETUP packets and thus ignored. + // + // A SETUP packet can arrive at any time where as an IN packet is + // only sent after calling EP0write and an OUT packet after EP0read. + // The functions EP0write and EP0read are called only in response to + // a setup packet or IN/OUT packets sent in response to that + // setup packet. Therefore, if an IN or OUT packet is pending + // at the same time as a SETUP packet, the IN or OUT packet belongs + // to the previous control transfer and should either be processed + // before the SETUP packet (in the case of IN) or dropped (in the + // case of OUT as SETUP clobbers the OUT data). + if (LPC_USB->USBEpIntSt & EP(EP0IN)) { + selectEndpointClearInterrupt(EP0IN); + LPC_USB->USBDevIntClr = EP_SLOW; + events->ep0_in(); + } + + // Process each endpoint interrupt + if (LPC_USB->USBEpIntSt & EP(EP0OUT)) { + if (selectEndpointClearInterrupt(EP0OUT) & SIE_SE_STP) { + // this is a setup packet + events->ep0_setup(); + } else { + events->ep0_out(); + } + LPC_USB->USBDevIntClr = EP_SLOW; + } + + //TODO - should probably process in the reverse order + for (uint8_t num = 2; num < 16 * 2; num++) { + uint8_t endpoint = PHY_TO_DESC(num); + if (LPC_USB->USBEpIntSt & EP(endpoint)) { + selectEndpointClearInterrupt(endpoint); + epComplete |= EP(endpoint); + LPC_USB->USBDevIntClr = EP_SLOW; + if (endpoint & 0x80) {//TODO - use macro + events->in(endpoint); + } else { + events->out(endpoint); + } + } + } + } + + NVIC_ClearPendingIRQ(USB_IRQn); + NVIC_EnableIRQ(USB_IRQn); +} + +#endif diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h new file mode 100644 index 00000000000..999991c6a66 --- /dev/null +++ b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h @@ -0,0 +1,66 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBPHYHW_H +#define USBPHYHW_H + +#include "mbed.h" +#include "USBPhy.h" + + +class USBPhyHw : public USBPhy { +public: + USBPhyHw(); + virtual ~USBPhyHw(); + virtual void init(USBPhyEvents *events); + virtual void deinit(); + virtual bool powered(); + virtual void connect(); + virtual void disconnect(); + virtual void configure(); + virtual void unconfigure(); + virtual void sof_enable(); + virtual void sof_disable(); + virtual void set_address(uint8_t address); + virtual void remote_wakeup(); + virtual const usb_ep_table_t *endpoint_table(); + + virtual uint32_t ep0_set_max_packet(uint32_t max_packet); + virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_read(void); + virtual uint32_t ep0_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_write(uint8_t *buffer, uint32_t size); + virtual void ep0_stall(void); + + virtual bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type); + virtual void endpoint_remove(usb_ep_t endpoint); + virtual void endpoint_stall(usb_ep_t endpoint); + virtual void endpoint_unstall(usb_ep_t endpoint); + + virtual bool endpoint_read(usb_ep_t endpoint, uint32_t maximumSize); + virtual bool endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytesRead); + virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual void endpoint_abort(usb_ep_t endpoint); + + virtual void process(); + +private: + USBPhyEvents *events; + + static void _usbisr(void); +}; + +#endif diff --git a/targets/targets.json b/targets/targets.json index fabe6f0dc37..fbd40a8d580 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -251,7 +251,7 @@ "extra_labels": ["NXP", "LPC176X", "MBED_LPC1768", "NXP_EMAC"], "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], "detect_code": ["1010"], - "device_has": ["RTC", "USTICKER", "ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "EMAC", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"], + "device_has": ["RTC", "USTICKER", "ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "EMAC", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH", "USBDEVICE"], "release_versions": ["2", "5"], "device_name": "LPC1768", "bootloader_supported": true, From 62d605ad87b960d36d3f77ba057c37cd2b847a35 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 15 Feb 2018 13:10:48 -0600 Subject: [PATCH 007/488] Remove mbed 2 USB tests from Travis Remove the mbed 2 USB tests since USB support will be part of mbed 5. --- tools/build_travis.py | 80 ++++++++++++++++--------------------------- 1 file changed, 30 insertions(+), 50 deletions(-) diff --git a/tools/build_travis.py b/tools/build_travis.py index c3684fe0d34..5245d7c0b5b 100644 --- a/tools/build_travis.py +++ b/tools/build_travis.py @@ -27,7 +27,7 @@ ################################################################################ # Configure builds here -# "libs" can contain "dsp", "usb" +# "libs" can contain "dsp" build_list = [ { @@ -44,29 +44,29 @@ { "target": "NUCLEO_F072RB", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_F091RC", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_F103RB", "toolchains": "GCC_ARM" }, - { "target": "NUCLEO_F207ZG", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "NUCLEO_F207ZG", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_F302R8", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_F303K8", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_F303RE", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "NUCLEO_F303ZE", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "NUCLEO_F303ZE", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_F334R8", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "NUCLEO_F401RE", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "NUCLEO_F401RE", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "STEVAL_3DP001V1", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, { "target": "NUCLEO_F410RB", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "NUCLEO_F411RE", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "NUCLEO_F411RE", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_F412ZG", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "NUCLEO_F413ZH", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "NUCLEO_F413ZH", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_L432KC", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "MTB_ADV_WISE_1510", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_L476RG", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_L011K4", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_L031K6", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_L073RZ", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "NUCLEO_F429ZI", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "NUCLEO_F446RE", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "NUCLEO_F446ZE", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "NUCLEO_F746ZG", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "NUCLEO_F767ZI", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "NUCLEO_F429ZI", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "NUCLEO_F446RE", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "NUCLEO_F446ZE", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "NUCLEO_F746ZG", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "NUCLEO_F767ZI", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_L496ZG", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "MOTE_L152RC", "toolchains": "GCC_ARM", "libs": ["dsp"] }, @@ -83,15 +83,15 @@ { "target": "DISCO_F334C8", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "DISCO_F401VC", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "DISCO_F407VG", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "DISCO_F407VG", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "DISCO_F413ZH", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "DISCO_F429ZI", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "DISCO_F469NI", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "DISCO_F746NG", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "DISCO_F769NI", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "DISCO_L475VG_IOT01A", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "DISCO_L476VG", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "DISCO_L072CZ_LRWAN1", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "DISCO_L475VG_IOT01A", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "DISCO_L476VG", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "DISCO_L072CZ_LRWAN1", "toolchains": "GCC_ARM", "libs": ["dsp"] }, # module manufacturer : muRata { "target": "MTB_MURATA_ABZ", "toolchains": "GCC_ARM", "libs": [] }, @@ -101,7 +101,7 @@ { "NXP": ( - { "target": "LPC1768", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "LPC1768", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "LPC11U24", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "OC_MBUINO", "toolchains": "GCC_ARM", "libs": [] }, @@ -114,15 +114,15 @@ { "target": "LPC11U37H_401", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "LPC1549", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "KL05Z", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "KL25Z", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "KL27Z", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "KL43Z", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "KL46Z", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "KL25Z", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "KL27Z", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "KL43Z", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "KL46Z", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "K20D50M", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "TEENSY3_1", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "K64F", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "K22F", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "LPC4088", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "K64F", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "K22F", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "LPC4088", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "ARCH_PRO", "toolchains": "GCC_ARM", "libs": ["dsp"] }, ) }, @@ -141,10 +141,10 @@ "SILICON_LABS": ( { "target": "EFM32ZG_STK3200", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "EFM32HG_STK3400", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "EFM32LG_STK3600", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "EFM32GG_STK3700", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "EFM32WG_STK3800", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "EFM32HG_STK3400", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "EFM32LG_STK3600", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "EFM32GG_STK3700", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "EFM32WG_STK3800", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "EFM32PG_STK3401", "toolchains": "GCC_ARM", "libs": ["dsp"] }, ) }, @@ -163,9 +163,9 @@ { "NUVOTON": ( - { "target": "NUMAKER_PFM_NUC472", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "NUMAKER_PFM_M453", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "NUMAKER_PFM_M487", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "NUMAKER_PFM_NUC472", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "NUMAKER_PFM_M453", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "NUMAKER_PFM_M487", "toolchains": "GCC_ARM", "libs": ["dsp"] }, ) }, @@ -188,25 +188,21 @@ {"target": "LPC1768", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_15", "MBED_16", "MBED_17"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "K64F", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "K22F", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "KL43Z", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, ) @@ -217,25 +213,21 @@ {"target": "NUCLEO_F446RE", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_F446ZE", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_F401RE", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_F411RE", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_F412ZG", @@ -246,31 +238,26 @@ {"target": "NUCLEO_F413ZH", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_F429ZI", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_F207ZG", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_F746ZG", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_F767ZI", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_L476RG", @@ -286,7 +273,6 @@ {"target": "DISCO_F407VG", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "DISCO_F413ZH", @@ -297,19 +283,16 @@ {"target": "NUCLEO_F303ZE", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "DISCO_L475VG_IOT01A", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "DISCO_L476VG", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "DISCO_L072CZ_LRWAN1", @@ -329,19 +312,16 @@ {"target": "NUMAKER_PFM_NUC472", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUMAKER_PFM_M453", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUMAKER_PFM_M487", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } } ) From 2d705e839541ad7b8b902c8b6fca6463112db3fa Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 13 Feb 2018 11:53:01 -0600 Subject: [PATCH 008/488] Add Kinetis USB files --- .../usb/USBEndpoints_Kinetis.h | 63 ++ .../TARGET_Freescale/usb/USBPhy_Kinetis.cpp | 569 ++++++++++++++++++ 2 files changed, 632 insertions(+) create mode 100644 targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h create mode 100644 targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp diff --git a/targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h b/targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h new file mode 100644 index 00000000000..59ec8dccad1 --- /dev/null +++ b/targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h @@ -0,0 +1,63 @@ +/* Copyright (c) 2010-2011 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#define NUMBER_OF_LOGICAL_ENDPOINTS (4) +#define NUMBER_OF_PHYSICAL_ENDPOINTS (NUMBER_OF_LOGICAL_ENDPOINTS * 2) + +/* Define physical endpoint numbers */ + +/* Endpoint No. */ +/* ---------------- */ +#define EP0OUT (0) +#define EP0IN (1) +#define EP1OUT (2) +#define EP1IN (3) +#define EP2OUT (4) +#define EP2IN (5) +#define EP3OUT (6) +#define EP3IN (7) + +/* Maximum Packet sizes */ + +#define MAX_PACKET_SIZE_EP0 (64) +#define MAX_PACKET_SIZE_EP1 (64) +#define MAX_PACKET_SIZE_EP2 (64) +#define MAX_PACKET_SIZE_EP3 (1023) + +/* Generic endpoints - intended to be portable accross devices */ +/* and be suitable for simple USB devices. */ + +/* Bulk endpoints */ +#define EPBULK_OUT (EP2OUT) +#define EPBULK_IN (EP2IN) +#define EPBULK_OUT_callback EP2_OUT_callback +#define EPBULK_IN_callback EP2_IN_callback +/* Interrupt endpoints */ +#define EPINT_OUT (EP1OUT) +#define EPINT_IN (EP1IN) +#define EPINT_OUT_callback EP1_OUT_callback +#define EPINT_IN_callback EP1_IN_callback +/* Isochronous endpoints */ +#define EPISO_OUT (EP3OUT) +#define EPISO_IN (EP3IN) +#define EPISO_OUT_callback EP3_OUT_callback +#define EPISO_IN_callback EP3_IN_callback + +#define MAX_PACKET_SIZE_EPBULK (MAX_PACKET_SIZE_EP2) +#define MAX_PACKET_SIZE_EPINT (MAX_PACKET_SIZE_EP1) +#define MAX_PACKET_SIZE_EPISO (MAX_PACKET_SIZE_EP3) diff --git a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp new file mode 100644 index 00000000000..69471edf702 --- /dev/null +++ b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp @@ -0,0 +1,569 @@ +/* Copyright (c) 2010-2011 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#if defined(TARGET_KL25Z) | defined(TARGET_KL43Z) | defined(TARGET_KL46Z) | defined(TARGET_K20D50M) | defined(TARGET_K64F) | defined(TARGET_K22F) | defined(TARGET_TEENSY3_1) + +#if defined(TARGET_KSDK2_MCUS) +#include "fsl_common.h" +#endif +#include "USBHAL.h" +#include "mbed_critical.h" + +USBHAL * USBHAL::instance; + +static volatile int epComplete = 0; + +// Convert physical endpoint number to register bit +#define EP(endpoint) (1<<(endpoint)) + +// Convert physical to logical +#define PHY_TO_LOG(endpoint) ((endpoint)>>1) + +// Get endpoint direction +#define IN_EP(endpoint) ((endpoint) & 1U ? true : false) +#define OUT_EP(endpoint) ((endpoint) & 1U ? false : true) + +#define BD_OWN_MASK (1<<7) +#define BD_DATA01_MASK (1<<6) +#define BD_KEEP_MASK (1<<5) +#define BD_NINC_MASK (1<<4) +#define BD_DTS_MASK (1<<3) +#define BD_STALL_MASK (1<<2) + +#define TX 1 +#define RX 0 +#define ODD 0 +#define EVEN 1 +// this macro waits a physical endpoint number +#define EP_BDT_IDX(ep, dir, odd) (((ep * 4) + (2 * dir) + (1 * odd))) + +#define SETUP_TOKEN 0x0D +#define IN_TOKEN 0x09 +#define OUT_TOKEN 0x01 +#define TOK_PID(idx) ((bdt[idx].info >> 2) & 0x0F) + +// for each endpt: 8 bytes +typedef struct BDT { + uint8_t info; // BD[0:7] + uint8_t dummy; // RSVD: BD[8:15] + uint16_t byte_count; // BD[16:32] + uint32_t address; // Addr +} BDT; + +typedef enum { + CTRL_XFER_READY, + CTRL_XFER_IN, + CTRL_XFER_NONE, + CTRL_XFER_OUT +} ctrl_xfer_t; + +// there are: +// * 4 bidirectionnal endpt -> 8 physical endpt +// * as there are ODD and EVEN buffer -> 8*2 bdt +MBED_ALIGN(512) BDT bdt[NUMBER_OF_PHYSICAL_ENDPOINTS * 2]; // 512 bytes aligned! + +uint8_t * endpoint_buffer[NUMBER_OF_PHYSICAL_ENDPOINTS * 2]; + +static uint8_t set_addr = 0; +static uint8_t addr = 0; +static ctrl_xfer_t ctrl_xfer = CTRL_XFER_READY; + +static uint32_t Data1 = 0x55555555; + +static uint32_t frameNumber() { + return((USB0->FRMNUML | (USB0->FRMNUMH << 8)) & 0x07FF); +} + +uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer) { + return 0; +} + +USBHAL::USBHAL(void) { + // Disable IRQ + NVIC_DisableIRQ(USB0_IRQn); + +#if (defined(FSL_FEATURE_SOC_MPU_COUNT) && (FSL_FEATURE_SOC_MPU_COUNT > 0U)) + MPU->CESR=0; +#endif + // fill in callback array + epCallback[0] = &USBHAL::EP1_OUT_callback; + epCallback[1] = &USBHAL::EP1_IN_callback; + epCallback[2] = &USBHAL::EP2_OUT_callback; + epCallback[3] = &USBHAL::EP2_IN_callback; + epCallback[4] = &USBHAL::EP3_OUT_callback; + epCallback[5] = &USBHAL::EP3_IN_callback; + epCallback[6] = &USBHAL::EP4_OUT_callback; + epCallback[7] = &USBHAL::EP4_IN_callback; + +#if defined(TARGET_KL43Z) || defined(TARGET_K22F) || defined(TARGET_K64F) + // enable USBFS clock + CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcIrc48M, 48000000U); +#else + // choose usb src as PLL + SIM->SOPT2 &= ~SIM_SOPT2_PLLFLLSEL_MASK; + SIM->SOPT2 |= (SIM_SOPT2_USBSRC_MASK | (1 << SIM_SOPT2_PLLFLLSEL_SHIFT)); + + // enable OTG clock + SIM->SCGC4 |= SIM_SCGC4_USBOTG_MASK; +#endif + + // Attach IRQ + instance = this; + NVIC_SetVector(USB0_IRQn, (uint32_t)&_usbisr); + NVIC_EnableIRQ(USB0_IRQn); + + // USB Module Configuration + // Set BDT Base Register + USB0->BDTPAGE1 = (uint8_t)((uint32_t)bdt>>8); + USB0->BDTPAGE2 = (uint8_t)((uint32_t)bdt>>16); + USB0->BDTPAGE3 = (uint8_t)((uint32_t)bdt>>24); + + // Clear interrupt flag + USB0->ISTAT = 0xff; + + // USB Interrupt Enablers + USB0->INTEN |= USB_INTEN_TOKDNEEN_MASK | + USB_INTEN_SOFTOKEN_MASK | + USB_INTEN_ERROREN_MASK | + USB_INTEN_USBRSTEN_MASK; + + // Disable weak pull downs + USB0->USBCTRL &= ~(USB_USBCTRL_PDE_MASK | USB_USBCTRL_SUSP_MASK); + + USB0->USBTRC0 |= 0x40; + + /* Allocate control endpoint buffers */ + endpoint_buffer[EP_BDT_IDX(0, TX, ODD)] = (uint8_t *)malloc(MAX_PACKET_SIZE_EP0); + endpoint_buffer[EP_BDT_IDX(0, RX, ODD)] = (uint8_t *)malloc(MAX_PACKET_SIZE_EP0); +} + +USBHAL::~USBHAL(void) { } + +void USBHAL::connect(void) { + // enable USB + USB0->CTL |= USB_CTL_USBENSOFEN_MASK; + // Pull up enable + USB0->CONTROL |= USB_CONTROL_DPPULLUPNONOTG_MASK; + + // Allocate endpoint buffers; do allocate control endpoint buffers + for (int i = 4; i < (NUMBER_OF_PHYSICAL_ENDPOINTS * 2); i++) { + if ((i == EPISO_OUT) || (i == EPISO_IN)) { + endpoint_buffer[i] = (uint8_t *)malloc(MAX_PACKET_SIZE_EPISO); + } else { + endpoint_buffer[i] = (uint8_t *)malloc(MAX_PACKET_SIZE_EPBULK); + } + } +} + +void USBHAL::disconnect(void) { + // disable USB + USB0->CTL &= ~USB_CTL_USBENSOFEN_MASK; + // Pull up disable + USB0->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK; + + //Free buffers if required; do not free the control endpoint buffers + for (int i = 4; i < (NUMBER_OF_PHYSICAL_ENDPOINTS * 2); i++) { + free(endpoint_buffer[i]); + endpoint_buffer[i] = NULL; + } +} + +void USBHAL::configureDevice(void) { + // not needed +} + +void USBHAL::unconfigureDevice(void) { + // not needed +} + +void USBHAL::setAddress(uint8_t address) { + // we don't set the address now otherwise the usb controller does not ack + // we set a flag instead + // see usbisr when an IN token is received + set_addr = 1; + addr = address; +} + +bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t flags) { + uint32_t handshake_flag = 0; + uint8_t * buf; + + if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { + return false; + } + + uint32_t log_endpoint = PHY_TO_LOG(endpoint); + + if ((flags & ISOCHRONOUS) == 0) { + handshake_flag = USB_ENDPT_EPHSHK_MASK; + } + + if (IN_EP(endpoint)) { + buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)][0]; + } else { + buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)][0]; + } + + // IN endpt -> device to host (TX) + if (IN_EP(endpoint)) { + USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) + USB_ENDPT_EPTXEN_MASK; // en TX (IN) tran + bdt[EP_BDT_IDX(log_endpoint, TX, ODD )].address = (uint32_t) buf; + bdt[EP_BDT_IDX(log_endpoint, TX, EVEN)].address = 0; + } + // OUT endpt -> host to device (RX) + else { + USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) + USB_ENDPT_EPRXEN_MASK; // en RX (OUT) tran. + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].byte_count = maxPacket; + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].address = (uint32_t) buf; + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info = BD_DTS_MASK; + bdt[EP_BDT_IDX(log_endpoint, RX, EVEN)].info = 0; + if (log_endpoint == 0) { + // Prepare for setup packet + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info |= BD_OWN_MASK; + } + } + + // First transfer will be a DATA0 packet + Data1 &= ~(1 << endpoint); + + return true; +} + +// read setup packet +void USBHAL::EP0setup(uint8_t *buffer) { + uint32_t sz; + endpointReadResult(EP0OUT, buffer, &sz); +} + +void USBHAL::EP0readStage(void) { + // Not needed +} + +void USBHAL::EP0read(void) { + if (ctrl_xfer == CTRL_XFER_READY) { + // Transfer is done so ignore call + return; + } + if (ctrl_xfer == CTRL_XFER_IN) { + ctrl_xfer = CTRL_XFER_READY; + // Control transfer with a data IN stage. + // The next packet received will be the status packet - an OUT packet using DATA1 + // + // PROBLEM: + // If a Setup packet is received after status packet of + // a Control In transfer has been received in the RX buffer + // but before the processor has had a chance the prepare + // this buffer for the Setup packet, the Setup packet + // will be dropped. + // + // WORKAROUND: + // Set data toggle to DATA0 so if the status stage of a + // Control In transfer arrives it will be ACKed by hardware + // but will be discarded without filling the RX buffer. + // This allows a subsequent SETUP packet to be stored + // without any processor intervention. + Data1 &= ~1UL; // set DATA0 + } + endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0); +} + +uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) { + uint32_t sz; + endpointReadResult(EP0OUT, buffer, &sz); + return sz; +} + +void USBHAL::EP0write(uint8_t *buffer, uint32_t size) { + if (ctrl_xfer == CTRL_XFER_READY) { + // Transfer is done so ignore call + return; + } + if ((ctrl_xfer == CTRL_XFER_NONE) || (ctrl_xfer == CTRL_XFER_OUT)) { + // Prepare for next setup packet + endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0); + ctrl_xfer = CTRL_XFER_READY; + } + endpointWrite(EP0IN, buffer, size); +} + +void USBHAL::EP0getWriteResult(void) { +} + +void USBHAL::EP0stall(void) { + if (ctrl_xfer == CTRL_XFER_READY) { + // Transfer is done so ignore call + return; + } + ctrl_xfer = CTRL_XFER_READY; + core_util_critical_section_enter(); + stallEndpoint(EP0OUT); + // Prepare for next setup packet + // Note - time between stalling and setting up the endpoint + // must be kept to a minimum to prevent a dropped SETUP + // packet. + endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0); + core_util_critical_section_exit(); +} + +EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) { + uint8_t log_endpoint = PHY_TO_LOG(endpoint); + + uint32_t idx = EP_BDT_IDX(log_endpoint, RX, 0); + bdt[idx].byte_count = maximumSize; + if ((Data1 >> endpoint) & 1) { + bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK | BD_DATA01_MASK; + } + else { + bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK; + } + + Data1 ^= (1 << endpoint); + return EP_PENDING; +} + +EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) { + uint32_t n, sz, idx, setup = 0; + uint8_t not_iso; + uint8_t * ep_buf; + + uint32_t log_endpoint = PHY_TO_LOG(endpoint); + + if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { + return EP_INVALID; + } + + // if read on a IN endpoint -> error + if (IN_EP(endpoint)) { + return EP_INVALID; + } + + idx = EP_BDT_IDX(log_endpoint, RX, 0); + sz = bdt[idx].byte_count; + not_iso = USB0->ENDPOINT[log_endpoint].ENDPT & USB_ENDPT_EPHSHK_MASK; + + //for isochronous endpoint, we don't wait an interrupt + if ((log_endpoint != 0) && not_iso && !(epComplete & EP(endpoint))) { + return EP_PENDING; + } + + if ((log_endpoint == 0) && (TOK_PID(idx) == SETUP_TOKEN)) { + setup = 1; + } + + ep_buf = endpoint_buffer[idx]; + + for (n = 0; n < sz; n++) { + buffer[n] = ep_buf[n]; + } + + if (setup) { + // Record the setup type + if (buffer[6] == 0) { + ctrl_xfer = CTRL_XFER_NONE; + } else { + uint8_t in_xfer = (buffer[0] >> 7) & 1; + ctrl_xfer = in_xfer ? CTRL_XFER_IN : CTRL_XFER_OUT; + } + } + + USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; + *bytesRead = sz; + + epComplete &= ~EP(endpoint); + return EP_COMPLETED; +} + +EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) { + uint32_t idx, n; + uint8_t * ep_buf; + + if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { + return EP_INVALID; + } + + // if write on a OUT endpoint -> error + if (OUT_EP(endpoint)) { + return EP_INVALID; + } + + idx = EP_BDT_IDX(PHY_TO_LOG(endpoint), TX, 0); + bdt[idx].byte_count = size; + + ep_buf = endpoint_buffer[idx]; + + for (n = 0; n < size; n++) { + ep_buf[n] = data[n]; + } + + if ((Data1 >> endpoint) & 1) { + bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK | BD_DATA01_MASK; + } else { + bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK; + } + + Data1 ^= (1 << endpoint); + + return EP_PENDING; +} + +EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) { + if (epComplete & EP(endpoint)) { + epComplete &= ~EP(endpoint); + return EP_COMPLETED; + } + + return EP_PENDING; +} + +void USBHAL::stallEndpoint(uint8_t endpoint) { + USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK; +} + +void USBHAL::unstallEndpoint(uint8_t endpoint) { + USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; +} + +bool USBHAL::getEndpointStallState(uint8_t endpoint) { + uint8_t stall = (USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT & USB_ENDPT_EPSTALL_MASK); + return (stall) ? true : false; +} + +void USBHAL::remoteWakeup(void) { + // [TODO] +} + + +void USBHAL::_usbisr(void) { + instance->usbisr(); +} + + +void USBHAL::usbisr(void) { + uint8_t i; + uint8_t istat = USB0->ISTAT; + + // reset interrupt + if (istat & USB_ISTAT_USBRST_MASK) { + // disable all endpt + for(i = 0; i < 16; i++) { + USB0->ENDPOINT[i].ENDPT = 0x00; + } + + // enable control endpoint + realiseEndpoint(EP0OUT, MAX_PACKET_SIZE_EP0, 0); + realiseEndpoint(EP0IN, MAX_PACKET_SIZE_EP0, 0); + + Data1 = 0x55555555; + USB0->CTL |= USB_CTL_ODDRST_MASK; + + USB0->ISTAT = 0xFF; // clear all interrupt status flags + USB0->ERRSTAT = 0xFF; // clear all error flags + USB0->ERREN = 0xFF; // enable error interrupt sources + USB0->ADDR = 0x00; // set default address + + // reset bus for USBDevice layer + busReset(); + + return; + } + + // resume interrupt + if (istat & USB_ISTAT_RESUME_MASK) { + USB0->ISTAT = USB_ISTAT_RESUME_MASK; + } + + // SOF interrupt + if (istat & USB_ISTAT_SOFTOK_MASK) { + USB0->ISTAT = USB_ISTAT_SOFTOK_MASK; + // SOF event, read frame number + SOF(frameNumber()); + } + + // stall interrupt + if (istat & 1<<7) { + if (USB0->ENDPOINT[0].ENDPT & USB_ENDPT_EPSTALL_MASK) + USB0->ENDPOINT[0].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; + USB0->ISTAT = USB_ISTAT_STALL_MASK; + } + + // token interrupt + if (istat & 1<<3) { + uint32_t num = (USB0->STAT >> 4) & 0x0F; + uint32_t dir = (USB0->STAT >> 3) & 0x01; + uint32_t ev_odd = (USB0->STAT >> 2) & 0x01; + int endpoint = (num << 1) | dir; + + // setup packet + if ((num == 0) && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == SETUP_TOKEN)) { + Data1 |= 0x02 | 0x01; // set DATA1 for TX and RX + bdt[EP_BDT_IDX(0, TX, EVEN)].info &= ~BD_OWN_MASK; + bdt[EP_BDT_IDX(0, TX, ODD)].info &= ~BD_OWN_MASK; + + // EP0 SETUP event (SETUP data received) + EP0setupCallback(); + + } else { + // OUT packet + if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == OUT_TOKEN) { + if (num == 0) + EP0out(); + else { + epComplete |= EP(endpoint); + if ((instance->*(epCallback[endpoint - 2]))()) { + epComplete &= ~EP(endpoint); + } + } + } + + // IN packet + if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == IN_TOKEN) { + if (num == 0) { + EP0in(); + if (set_addr == 1) { + USB0->ADDR = addr & 0x7F; + set_addr = 0; + } + } + else { + epComplete |= EP(endpoint); + if ((instance->*(epCallback[endpoint - 2]))()) { + epComplete &= ~EP(endpoint); + } + } + } + } + + USB0->ISTAT = USB_ISTAT_TOKDNE_MASK; + } + + // sleep interrupt + if (istat & 1<<4) { + USB0->ISTAT = USB_ISTAT_SLEEP_MASK; + } + + // error interrupt + if (istat & USB_ISTAT_ERROR_MASK) { + USB0->ERRSTAT = 0xFF; + USB0->ISTAT = USB_ISTAT_ERROR_MASK; + } +} + + +#endif From 62d07430b1a93e429beb32ccf147f67ad281a339 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 13 Feb 2018 18:42:37 -0600 Subject: [PATCH 009/488] Update Kinetis USB to match the USBPhy API Copy the Kinetis USB driver files from mbed-os\features\unsupported\USBDevice\targets\TARGET_Freescale and update them to match the new USBPhy API. --- .../usb/USBEndpoints_Kinetis.h | 48 +- targets/TARGET_Freescale/usb/USBPhyHw.h | 66 +++ .../TARGET_Freescale/usb/USBPhy_Kinetis.cpp | 470 ++++++++++-------- targets/targets.json | 2 +- 4 files changed, 360 insertions(+), 226 deletions(-) create mode 100644 targets/TARGET_Freescale/usb/USBPhyHw.h diff --git a/targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h b/targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h index 59ec8dccad1..8f2286a7f7e 100644 --- a/targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h +++ b/targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h @@ -1,20 +1,18 @@ -/* Copyright (c) 2010-2011 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #define NUMBER_OF_LOGICAL_ENDPOINTS (4) #define NUMBER_OF_PHYSICAL_ENDPOINTS (NUMBER_OF_LOGICAL_ENDPOINTS * 2) @@ -23,14 +21,14 @@ /* Endpoint No. */ /* ---------------- */ -#define EP0OUT (0) -#define EP0IN (1) -#define EP1OUT (2) -#define EP1IN (3) -#define EP2OUT (4) -#define EP2IN (5) -#define EP3OUT (6) -#define EP3IN (7) +#define EP0OUT (0x00) +#define EP0IN (0x80) +#define EP1OUT (0x01) +#define EP1IN (0x81) +#define EP2OUT (0x02) +#define EP2IN (0x82) +#define EP3OUT (0x03) +#define EP3IN (0x83) /* Maximum Packet sizes */ diff --git a/targets/TARGET_Freescale/usb/USBPhyHw.h b/targets/TARGET_Freescale/usb/USBPhyHw.h new file mode 100644 index 00000000000..f11c7512705 --- /dev/null +++ b/targets/TARGET_Freescale/usb/USBPhyHw.h @@ -0,0 +1,66 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBPHYHW_H +#define USBPHYHW_H + +#include "mbed.h" +#include "USBPhy.h" + + +class USBPhyHw : public USBPhy { +public: + USBPhyHw(); + virtual ~USBPhyHw(); + virtual void init(USBPhyEvents *events); + virtual void deinit(); + virtual bool powered(); + virtual void connect(); + virtual void disconnect(); + virtual void configure(); + virtual void unconfigure(); + virtual void sof_enable(); + virtual void sof_disable(); + virtual void set_address(uint8_t address); + virtual void remote_wakeup(); + virtual const usb_ep_table_t* endpoint_table(); + + virtual uint32_t ep0_set_max_packet(uint32_t max_packet); + virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_read(); + virtual uint32_t ep0_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_write(uint8_t *buffer, uint32_t size); + virtual void ep0_stall(); + + virtual bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type); + virtual void endpoint_remove(usb_ep_t endpoint); + virtual void endpoint_stall(usb_ep_t endpoint); + virtual void endpoint_unstall(usb_ep_t endpoint); + + virtual bool endpoint_read(usb_ep_t endpoint, uint32_t maximumSize); + virtual bool endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytesRead); + virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual void endpoint_abort(usb_ep_t endpoint); + + virtual void process(); + +private: + USBPhyEvents *events; + + static void _usbisr(void); +}; + +#endif diff --git a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp index 69471edf702..3ca12d37fc8 100644 --- a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp +++ b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp @@ -1,42 +1,48 @@ -/* Copyright (c) 2010-2011 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ - -#if defined(TARGET_KL25Z) | defined(TARGET_KL43Z) | defined(TARGET_KL46Z) | defined(TARGET_K20D50M) | defined(TARGET_K64F) | defined(TARGET_K22F) | defined(TARGET_TEENSY3_1) +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined(DEVICE_USBDEVICE) && DEVICE_USBDEVICE && \ + (defined(TARGET_KL25Z) | defined(TARGET_KL43Z) | \ + defined(TARGET_KL46Z) | defined(TARGET_K20D50M) | \ + defined(TARGET_K64F) | defined(TARGET_K22F) | \ + defined(TARGET_TEENSY3_1)) #if defined(TARGET_KSDK2_MCUS) #include "fsl_common.h" #endif -#include "USBHAL.h" +#include "USBPhyHw.h" +#include "USBEndpoints_Kinetis.h" #include "mbed_critical.h" -USBHAL * USBHAL::instance; +static USBPhyHw *instance; static volatile int epComplete = 0; // Convert physical endpoint number to register bit #define EP(endpoint) (1<<(endpoint)) -// Convert physical to logical +// Conversion macros #define PHY_TO_LOG(endpoint) ((endpoint)>>1) +#define DESC_TO_LOG(endpoint) ((endpoint) & 0xF) +#define DESC_TO_PHY(endpoint) ((((endpoint)&0x0F)<<1) | (((endpoint) & 0x80) ? 1:0)) +#define PHY_TO_DESC(endpoint) (((endpoint)>>1)|(((endpoint)&1)?0x80:0)) // Get endpoint direction -#define IN_EP(endpoint) ((endpoint) & 1U ? true : false) -#define OUT_EP(endpoint) ((endpoint) & 1U ? false : true) +#define DESC_EP_IN(endpoint) ((endpoint) & 0x80U ? true : false) +#define DESC_EP_OUT(endpoint) ((endpoint) & 0x80U ? false : true) #define BD_OWN_MASK (1<<7) #define BD_DATA01_MASK (1<<6) @@ -78,6 +84,10 @@ typedef enum { MBED_ALIGN(512) BDT bdt[NUMBER_OF_PHYSICAL_ENDPOINTS * 2]; // 512 bytes aligned! uint8_t * endpoint_buffer[NUMBER_OF_PHYSICAL_ENDPOINTS * 2]; +uint8_t ep0_buffer[2][MAX_PACKET_SIZE_EP0]; +uint8_t ep1_buffer[2][MAX_PACKET_SIZE_EP1]; +uint8_t ep2_buffer[2][MAX_PACKET_SIZE_EP2]; +uint8_t ep3_buffer[2][MAX_PACKET_SIZE_EP3]; static uint8_t set_addr = 0; static uint8_t addr = 0; @@ -89,26 +99,31 @@ static uint32_t frameNumber() { return((USB0->FRMNUML | (USB0->FRMNUMH << 8)) & 0x07FF); } -uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer) { - return 0; +USBPhy *get_usb_phy() +{ + static USBPhyHw usbphy; + return &usbphy; } -USBHAL::USBHAL(void) { +USBPhyHw::USBPhyHw() +{ + +} + +USBPhyHw::~USBPhyHw() +{ +} + +void USBPhyHw::init(USBPhyEvents *events) +{ + this->events = events; + // Disable IRQ NVIC_DisableIRQ(USB0_IRQn); #if (defined(FSL_FEATURE_SOC_MPU_COUNT) && (FSL_FEATURE_SOC_MPU_COUNT > 0U)) MPU->CESR=0; #endif - // fill in callback array - epCallback[0] = &USBHAL::EP1_OUT_callback; - epCallback[1] = &USBHAL::EP1_IN_callback; - epCallback[2] = &USBHAL::EP2_OUT_callback; - epCallback[3] = &USBHAL::EP2_IN_callback; - epCallback[4] = &USBHAL::EP3_OUT_callback; - epCallback[5] = &USBHAL::EP3_IN_callback; - epCallback[6] = &USBHAL::EP4_OUT_callback; - epCallback[7] = &USBHAL::EP4_IN_callback; #if defined(TARGET_KL43Z) || defined(TARGET_K22F) || defined(TARGET_K64F) // enable USBFS clock @@ -124,8 +139,6 @@ USBHAL::USBHAL(void) { // Attach IRQ instance = this; - NVIC_SetVector(USB0_IRQn, (uint32_t)&_usbisr); - NVIC_EnableIRQ(USB0_IRQn); // USB Module Configuration // Set BDT Base Register @@ -138,7 +151,6 @@ USBHAL::USBHAL(void) { // USB Interrupt Enablers USB0->INTEN |= USB_INTEN_TOKDNEEN_MASK | - USB_INTEN_SOFTOKEN_MASK | USB_INTEN_ERROREN_MASK | USB_INTEN_USBRSTEN_MASK; @@ -148,50 +160,69 @@ USBHAL::USBHAL(void) { USB0->USBTRC0 |= 0x40; /* Allocate control endpoint buffers */ - endpoint_buffer[EP_BDT_IDX(0, TX, ODD)] = (uint8_t *)malloc(MAX_PACKET_SIZE_EP0); - endpoint_buffer[EP_BDT_IDX(0, RX, ODD)] = (uint8_t *)malloc(MAX_PACKET_SIZE_EP0); + endpoint_buffer[EP_BDT_IDX(0, TX, ODD)] = ep0_buffer[TX]; + endpoint_buffer[EP_BDT_IDX(0, RX, ODD)] = ep0_buffer[RX]; + endpoint_buffer[EP_BDT_IDX(1, TX, ODD)] = ep1_buffer[TX]; + endpoint_buffer[EP_BDT_IDX(1, RX, ODD)] = ep1_buffer[RX]; + endpoint_buffer[EP_BDT_IDX(2, TX, ODD)] = ep2_buffer[TX]; + endpoint_buffer[EP_BDT_IDX(2, RX, ODD)] = ep2_buffer[RX]; + endpoint_buffer[EP_BDT_IDX(3, TX, ODD)] = ep3_buffer[TX]; + endpoint_buffer[EP_BDT_IDX(3, RX, ODD)] = ep3_buffer[RX]; + + NVIC_SetVector(USB0_IRQn, (uint32_t)&_usbisr); + NVIC_EnableIRQ(USB0_IRQn); } -USBHAL::~USBHAL(void) { } +void USBPhyHw::deinit() +{ + disconnect(); + NVIC_DisableIRQ(USB0_IRQn); + USB0->INTEN = 0; +} -void USBHAL::connect(void) { +bool USBPhyHw::powered() +{ + return true; +} + +void USBPhyHw::connect() +{ // enable USB USB0->CTL |= USB_CTL_USBENSOFEN_MASK; // Pull up enable USB0->CONTROL |= USB_CONTROL_DPPULLUPNONOTG_MASK; - - // Allocate endpoint buffers; do allocate control endpoint buffers - for (int i = 4; i < (NUMBER_OF_PHYSICAL_ENDPOINTS * 2); i++) { - if ((i == EPISO_OUT) || (i == EPISO_IN)) { - endpoint_buffer[i] = (uint8_t *)malloc(MAX_PACKET_SIZE_EPISO); - } else { - endpoint_buffer[i] = (uint8_t *)malloc(MAX_PACKET_SIZE_EPBULK); - } - } } -void USBHAL::disconnect(void) { +void USBPhyHw::disconnect() +{ // disable USB USB0->CTL &= ~USB_CTL_USBENSOFEN_MASK; // Pull up disable USB0->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK; - - //Free buffers if required; do not free the control endpoint buffers - for (int i = 4; i < (NUMBER_OF_PHYSICAL_ENDPOINTS * 2); i++) { - free(endpoint_buffer[i]); - endpoint_buffer[i] = NULL; - } } -void USBHAL::configureDevice(void) { +void USBPhyHw::configure() +{ // not needed } -void USBHAL::unconfigureDevice(void) { +void USBPhyHw::unconfigure() +{ // not needed } -void USBHAL::setAddress(uint8_t address) { +void USBPhyHw::sof_enable() +{ + USB0->INTEN |= USB_INTEN_SOFTOKEN_MASK; +} + +void USBPhyHw::sof_disable() +{ + USB0->INTEN &= ~USB_INTEN_SOFTOKEN_MASK; +} + +void USBPhyHw::set_address(uint8_t address) +{ // we don't set the address now otherwise the usb controller does not ack // we set a flag instead // see usbisr when an IN token is received @@ -199,64 +230,54 @@ void USBHAL::setAddress(uint8_t address) { addr = address; } -bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t flags) { - uint32_t handshake_flag = 0; - uint8_t * buf; - - if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { - return false; - } - - uint32_t log_endpoint = PHY_TO_LOG(endpoint); - - if ((flags & ISOCHRONOUS) == 0) { - handshake_flag = USB_ENDPT_EPHSHK_MASK; - } - - if (IN_EP(endpoint)) { - buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)][0]; - } else { - buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)][0]; - } +void USBPhyHw::remote_wakeup() +{ + // TODO +} - // IN endpt -> device to host (TX) - if (IN_EP(endpoint)) { - USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) - USB_ENDPT_EPTXEN_MASK; // en TX (IN) tran - bdt[EP_BDT_IDX(log_endpoint, TX, ODD )].address = (uint32_t) buf; - bdt[EP_BDT_IDX(log_endpoint, TX, EVEN)].address = 0; - } - // OUT endpt -> host to device (RX) - else { - USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) - USB_ENDPT_EPRXEN_MASK; // en RX (OUT) tran. - bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].byte_count = maxPacket; - bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].address = (uint32_t) buf; - bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info = BD_DTS_MASK; - bdt[EP_BDT_IDX(log_endpoint, RX, EVEN)].info = 0; - if (log_endpoint == 0) { - // Prepare for setup packet - bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info |= BD_OWN_MASK; +#define ALLOW_BULK_OR_INT_ENDPOINTS (USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_ALLOW_INT) +#define ALLOW_NO_ENDPOINTS 0 + +const usb_ep_table_t* USBPhyHw::endpoint_table() +{ + static const usb_ep_table_t endpoint_table = { + 1, // No cost per endpoint - everything allocated up front + { + {USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_BULK_OR_INT_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_BULK_OR_INT_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0} } - } - - // First transfer will be a DATA0 packet - Data1 &= ~(1 << endpoint); + }; + return &endpoint_table; +} - return true; +uint32_t USBPhyHw::ep0_set_max_packet(uint32_t max_packet) +{ + return MAX_PACKET_SIZE_EP0; } // read setup packet -void USBHAL::EP0setup(uint8_t *buffer) { +void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) +{ uint32_t sz; - endpointReadResult(EP0OUT, buffer, &sz); + endpoint_read_result(EP0OUT, buffer, size, &sz); } -void USBHAL::EP0readStage(void) { - // Not needed -} - -void USBHAL::EP0read(void) { +void USBPhyHw::ep0_read() +{ if (ctrl_xfer == CTRL_XFER_READY) { // Transfer is done so ignore call return; @@ -281,77 +302,142 @@ void USBHAL::EP0read(void) { // without any processor intervention. Data1 &= ~1UL; // set DATA0 } - endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0); + endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0); } -uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) { +uint32_t USBPhyHw::ep0_read_result(uint8_t *buffer, uint32_t size) +{ uint32_t sz; - endpointReadResult(EP0OUT, buffer, &sz); + endpoint_read_result(EP0OUT, buffer, size, &sz); return sz; } -void USBHAL::EP0write(uint8_t *buffer, uint32_t size) { +void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) +{ if (ctrl_xfer == CTRL_XFER_READY) { // Transfer is done so ignore call return; } if ((ctrl_xfer == CTRL_XFER_NONE) || (ctrl_xfer == CTRL_XFER_OUT)) { // Prepare for next setup packet - endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0); + endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0); ctrl_xfer = CTRL_XFER_READY; } - endpointWrite(EP0IN, buffer, size); -} - -void USBHAL::EP0getWriteResult(void) { + endpoint_write(EP0IN, buffer, size); } -void USBHAL::EP0stall(void) { +void USBPhyHw::ep0_stall() +{ if (ctrl_xfer == CTRL_XFER_READY) { // Transfer is done so ignore call return; } ctrl_xfer = CTRL_XFER_READY; core_util_critical_section_enter(); - stallEndpoint(EP0OUT); + endpoint_stall(EP0OUT); // Prepare for next setup packet // Note - time between stalling and setting up the endpoint // must be kept to a minimum to prevent a dropped SETUP // packet. - endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0); + endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0); core_util_critical_section_exit(); } -EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) { - uint8_t log_endpoint = PHY_TO_LOG(endpoint); +bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type) +{ + uint32_t handshake_flag = 0; + uint8_t * buf; + + if (DESC_TO_PHY(endpoint) > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { + return false; + } + + uint32_t log_endpoint = DESC_TO_LOG(endpoint); + + if (type != USB_EP_TYPE_ISO) { + handshake_flag = USB_ENDPT_EPHSHK_MASK; + } + + if (DESC_EP_IN(endpoint)) { + buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)][0]; + } else { + buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)][0]; + } + + // IN endpt -> device to host (TX) + if (DESC_EP_IN(endpoint)) { + USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) + USB_ENDPT_EPTXEN_MASK; // en TX (IN) tran + bdt[EP_BDT_IDX(log_endpoint, TX, ODD )].address = (uint32_t) buf; + bdt[EP_BDT_IDX(log_endpoint, TX, EVEN)].address = 0; + } + // OUT endpt -> host to device (RX) + else { + USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) + USB_ENDPT_EPRXEN_MASK; // en RX (OUT) tran. + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].byte_count = max_packet; + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].address = (uint32_t) buf; + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info = BD_DTS_MASK; + bdt[EP_BDT_IDX(log_endpoint, RX, EVEN)].info = 0; + if (log_endpoint == 0) { + // Prepare for setup packet + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info |= BD_OWN_MASK; + } + } + + // First transfer will be a DATA0 packet + Data1 &= ~(1 << DESC_TO_PHY(endpoint)); + + return true; +} + +void USBPhyHw::endpoint_remove(usb_ep_t endpoint) +{ + USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT = 0; +} + +void USBPhyHw::endpoint_stall(usb_ep_t endpoint) +{ + USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK; +} + +void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) +{ + USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; +} + +bool USBPhyHw:: endpoint_read(usb_ep_t endpoint, uint32_t max_packet) +{ + uint8_t log_endpoint = DESC_TO_LOG(endpoint); uint32_t idx = EP_BDT_IDX(log_endpoint, RX, 0); - bdt[idx].byte_count = maximumSize; - if ((Data1 >> endpoint) & 1) { + bdt[idx].byte_count = max_packet; + if ((Data1 >> DESC_TO_PHY(endpoint)) & 1) { bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK | BD_DATA01_MASK; } else { bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK; } - Data1 ^= (1 << endpoint); - return EP_PENDING; + Data1 ^= (1 << DESC_TO_PHY(endpoint)); + return true; } -EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) { +bool USBPhyHw::endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytes_read) +{ uint32_t n, sz, idx, setup = 0; uint8_t not_iso; uint8_t * ep_buf; - uint32_t log_endpoint = PHY_TO_LOG(endpoint); + uint32_t log_endpoint = DESC_TO_LOG(endpoint); - if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { - return EP_INVALID; + if (DESC_TO_PHY(endpoint) > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { + return false; } // if read on a IN endpoint -> error - if (IN_EP(endpoint)) { - return EP_INVALID; + if (DESC_EP_IN(endpoint)) { + return false; } idx = EP_BDT_IDX(log_endpoint, RX, 0); @@ -359,8 +445,8 @@ EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_ not_iso = USB0->ENDPOINT[log_endpoint].ENDPT & USB_ENDPT_EPHSHK_MASK; //for isochronous endpoint, we don't wait an interrupt - if ((log_endpoint != 0) && not_iso && !(epComplete & EP(endpoint))) { - return EP_PENDING; + if ((log_endpoint != 0) && not_iso && !(epComplete & EP(DESC_TO_PHY(endpoint)))) { + return false; } if ((log_endpoint == 0) && (TOK_PID(idx) == SETUP_TOKEN)) { @@ -370,40 +456,41 @@ EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_ ep_buf = endpoint_buffer[idx]; for (n = 0; n < sz; n++) { - buffer[n] = ep_buf[n]; + data[n] = ep_buf[n]; } if (setup) { // Record the setup type - if (buffer[6] == 0) { + if (data[6] == 0) { ctrl_xfer = CTRL_XFER_NONE; } else { - uint8_t in_xfer = (buffer[0] >> 7) & 1; + uint8_t in_xfer = (data[0] >> 7) & 1; ctrl_xfer = in_xfer ? CTRL_XFER_IN : CTRL_XFER_OUT; } } USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; - *bytesRead = sz; + *bytes_read = sz; - epComplete &= ~EP(endpoint); - return EP_COMPLETED; + epComplete &= ~EP(DESC_TO_PHY(endpoint)); + return true; } -EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) { +bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ uint32_t idx, n; uint8_t * ep_buf; - if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { - return EP_INVALID; + if (DESC_TO_PHY(endpoint) > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { + return false; } // if write on a OUT endpoint -> error - if (OUT_EP(endpoint)) { - return EP_INVALID; + if (DESC_EP_OUT(endpoint)) { + return false; } - idx = EP_BDT_IDX(PHY_TO_LOG(endpoint), TX, 0); + idx = EP_BDT_IDX(DESC_TO_LOG(endpoint), TX, 0); bdt[idx].byte_count = size; ep_buf = endpoint_buffer[idx]; @@ -412,52 +499,28 @@ EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) ep_buf[n] = data[n]; } - if ((Data1 >> endpoint) & 1) { + if ((Data1 >> DESC_TO_PHY(endpoint)) & 1) { bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK | BD_DATA01_MASK; } else { bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK; } - Data1 ^= (1 << endpoint); - - return EP_PENDING; -} - -EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) { - if (epComplete & EP(endpoint)) { - epComplete &= ~EP(endpoint); - return EP_COMPLETED; - } - - return EP_PENDING; -} + Data1 ^= (1 << DESC_TO_PHY(endpoint)); -void USBHAL::stallEndpoint(uint8_t endpoint) { - USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK; -} - -void USBHAL::unstallEndpoint(uint8_t endpoint) { - USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; -} - -bool USBHAL::getEndpointStallState(uint8_t endpoint) { - uint8_t stall = (USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT & USB_ENDPT_EPSTALL_MASK); - return (stall) ? true : false; + return true; } -void USBHAL::remoteWakeup(void) { - // [TODO] +void USBPhyHw::endpoint_abort(usb_ep_t endpoint) +{ + uint8_t dir = DESC_EP_IN(endpoint) ? TX : RX; + uint32_t idx = EP_BDT_IDX(DESC_TO_LOG(endpoint), dir, 0); + bdt[idx].info &= ~BD_OWN_MASK; } - -void USBHAL::_usbisr(void) { - instance->usbisr(); -} - - -void USBHAL::usbisr(void) { +void USBPhyHw::process() +{ uint8_t i; - uint8_t istat = USB0->ISTAT; + uint8_t istat = USB0->ISTAT & USB0->INTEN; // reset interrupt if (istat & USB_ISTAT_USBRST_MASK) { @@ -467,8 +530,8 @@ void USBHAL::usbisr(void) { } // enable control endpoint - realiseEndpoint(EP0OUT, MAX_PACKET_SIZE_EP0, 0); - realiseEndpoint(EP0IN, MAX_PACKET_SIZE_EP0, 0); + endpoint_add(EP0OUT, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); + endpoint_add(EP0IN, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); Data1 = 0x55555555; USB0->CTL |= USB_CTL_ODDRST_MASK; @@ -479,21 +542,24 @@ void USBHAL::usbisr(void) { USB0->ADDR = 0x00; // set default address // reset bus for USBDevice layer - busReset(); + events->reset(); + NVIC_ClearPendingIRQ(USB0_IRQn); + NVIC_EnableIRQ(USB0_IRQn); return; } // resume interrupt if (istat & USB_ISTAT_RESUME_MASK) { USB0->ISTAT = USB_ISTAT_RESUME_MASK; + events->suspend(false); } // SOF interrupt if (istat & USB_ISTAT_SOFTOK_MASK) { USB0->ISTAT = USB_ISTAT_SOFTOK_MASK; // SOF event, read frame number - SOF(frameNumber()); + events->sof(frameNumber()); } // stall interrupt @@ -508,7 +574,7 @@ void USBHAL::usbisr(void) { uint32_t num = (USB0->STAT >> 4) & 0x0F; uint32_t dir = (USB0->STAT >> 3) & 0x01; uint32_t ev_odd = (USB0->STAT >> 2) & 0x01; - int endpoint = (num << 1) | dir; + int phy_ep = (num << 1) | dir; // setup packet if ((num == 0) && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == SETUP_TOKEN)) { @@ -517,35 +583,31 @@ void USBHAL::usbisr(void) { bdt[EP_BDT_IDX(0, TX, ODD)].info &= ~BD_OWN_MASK; // EP0 SETUP event (SETUP data received) - EP0setupCallback(); + events->ep0_setup(); } else { // OUT packet if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == OUT_TOKEN) { if (num == 0) - EP0out(); + events->ep0_out(); else { - epComplete |= EP(endpoint); - if ((instance->*(epCallback[endpoint - 2]))()) { - epComplete &= ~EP(endpoint); - } + epComplete |= EP(phy_ep); + events->out(PHY_TO_DESC(phy_ep)); } } // IN packet if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == IN_TOKEN) { if (num == 0) { - EP0in(); + events->ep0_in(); if (set_addr == 1) { USB0->ADDR = addr & 0x7F; set_addr = 0; } } else { - epComplete |= EP(endpoint); - if ((instance->*(epCallback[endpoint - 2]))()) { - epComplete &= ~EP(endpoint); - } + epComplete |= EP(phy_ep); + events->in(PHY_TO_DESC(phy_ep)); } } } @@ -556,6 +618,7 @@ void USBHAL::usbisr(void) { // sleep interrupt if (istat & 1<<4) { USB0->ISTAT = USB_ISTAT_SLEEP_MASK; + events->suspend(true); } // error interrupt @@ -563,7 +626,14 @@ void USBHAL::usbisr(void) { USB0->ERRSTAT = 0xFF; USB0->ISTAT = USB_ISTAT_ERROR_MASK; } + + NVIC_ClearPendingIRQ(USB0_IRQn); + NVIC_EnableIRQ(USB0_IRQn); } +void USBPhyHw::_usbisr(void) { + NVIC_DisableIRQ(USB0_IRQn); + instance->events->start_process(); +} #endif diff --git a/targets/targets.json b/targets/targets.json index fbd40a8d580..6efc4edb5b9 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -645,7 +645,7 @@ "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED"], "inherits": ["Target"], "detect_code": ["0240"], - "device_has": ["USTICKER", "LPTICKER", "RTC", "CRC", "ANALOGIN", "ANALOGOUT", "EMAC", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "STORAGE", "TRNG", "FLASH"], + "device_has": ["USTICKER", "LPTICKER", "RTC", "CRC", "ANALOGIN", "ANALOGOUT", "EMAC", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "STORAGE", "TRNG", "FLASH", "USBDEVICE"], "features": ["STORAGE"], "release_versions": ["2", "5"], "device_name": "MK64FN1M0xxx12", From 346cd2ae3a7d048585394155f390280fdf8b7dfb Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 7 Mar 2018 18:44:15 -0600 Subject: [PATCH 010/488] Add and assert USB callback completion Assert that when a callback is completed it is the active callback. --- usb/device/USBDevice/USBDevice.cpp | 39 +++++++++++++++++------------- usb/device/USBDevice/USBDevice.h | 10 +++++++- 2 files changed, 31 insertions(+), 18 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 828ec145717..9206388d99f 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -215,10 +215,10 @@ bool USBDevice::_control_out() /* Check if transfer has completed */ if (_transfer.remaining == 0) { /* Transfer completed */ + _transfer.user_callback = RequestXferDone; if (_transfer.notify) { /* Notify class layer. */ _transfer.notify = false; - _transfer.user_callback = true; callback_request_xfer_done(&_transfer.setup, false); } else { complete_request_xfer_done(true); @@ -276,10 +276,10 @@ bool USBDevice::_control_in() */ if ((_transfer.remaining == 0) && !_transfer.zlp) { /* Transfer completed */ + _transfer.user_callback = RequestXferDone; if (_transfer.notify) { /* Notify class layer. */ _transfer.notify = false; - _transfer.user_callback = true; callback_request_xfer_done(&_transfer.setup, false); } else { complete_request_xfer_done(true); @@ -298,7 +298,8 @@ void USBDevice::complete_request_xfer_done(bool success) { lock(); - _transfer.user_callback = false; + MBED_ASSERT(_transfer.user_callback == RequestXferDone); + _transfer.user_callback = None; if (_abort_control) { _control_abort(); unlock(); @@ -350,7 +351,7 @@ bool USBDevice::_request_set_configuration() _phy->unconfigure(); _change_state(Address); } else { - _transfer.user_callback = true; + _transfer.user_callback = SetConfiguration; callback_set_configuration(_device.configuration); } @@ -361,7 +362,8 @@ void USBDevice::complete_set_configuration(bool success) { lock(); - _transfer.user_callback = false; + MBED_ASSERT(_transfer.user_callback == SetConfiguration); + _transfer.user_callback = None; if (_abort_control) { _control_abort(); unlock(); @@ -413,7 +415,7 @@ bool USBDevice::_request_set_interface() { assert_locked(); - _transfer.user_callback = true; + _transfer.user_callback = SetInterface; callback_set_interface(_transfer.setup.wIndex, _transfer.setup.wValue); return true; } @@ -422,7 +424,8 @@ void USBDevice::complete_set_interface(bool success) { lock(); - _transfer.user_callback = false; + MBED_ASSERT(_transfer.user_callback == SetInterface); + _transfer.user_callback = None; if (_abort_control) { _control_abort(); unlock(); @@ -619,6 +622,7 @@ void USBDevice::_control_setup() _transfer.zlp = false; _transfer.notify = false; _transfer.stage = Setup; + _transfer.user_callback = Request; #ifdef DEBUG printf("dataTransferDirection: %d\r\nType: %d\r\nRecipient: %d\r\nbRequest: %d\r\nwValue: %d\r\nwIndex: %d\r\nwLength: %d\r\n", _transfer.setup.bmRequestType.dataTransferDirection, @@ -638,10 +642,11 @@ void USBDevice::complete_request(RequestResult direction, uint8_t *data, uint32_ { lock(); - _transfer.user_callback = false; + MBED_ASSERT(_transfer.user_callback == Request); + _transfer.user_callback = None; if (_abort_control) { if ((direction == Receive) || (direction == Send)) { - _transfer.user_callback = true; + _transfer.user_callback = RequestXferDone; callback_request_xfer_done(&_transfer.setup, true); } else { _control_abort(); @@ -657,7 +662,7 @@ void USBDevice::complete_request(RequestResult direction, uint8_t *data, uint32_ } /* user_callback may be set by _request_setup() */ - if (!_transfer.user_callback) { + if (_transfer.user_callback == None) { _control_setup_continue(); } } else if (direction == Failure) { @@ -678,10 +683,10 @@ void USBDevice::_control_abort_start() assert_locked(); _setup_ready = false; - if (_transfer.user_callback) { - _abort_control = true; - } else { + if (_transfer.user_callback == None) { _control_abort(); + } else { + _abort_control = true; } } @@ -787,12 +792,12 @@ void USBDevice::ep0_setup() _setup_ready = true; /* Endpoint 0 setup event */ - if (_transfer.user_callback) { + if (_transfer.user_callback == None) { + _control_setup(); + } else { /* A new setup packet has arrived so abort the current control transfer */ _abort_control = true; - } else { - _control_setup(); } } @@ -806,7 +811,7 @@ void USBDevice::ep0_out() return; } - if (_transfer.user_callback) { + if (_transfer.user_callback != None) { /* EP0 OUT should not receive data if the stack is waiting on a user callback for the buffer to fill or status */ MBED_ASSERT(0); diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 371359fa8b0..5a532528d0f 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -540,6 +540,14 @@ class USBDevice: public USBPhyEvents { Status }; + enum UserCallback { + None, + Request, + RequestXferDone, + SetConfiguration, + SetInterface + }; + struct control_transfer_t { setup_packet_t setup; uint8_t *ptr; @@ -548,7 +556,7 @@ class USBDevice: public USBPhyEvents { bool zlp; bool notify; ControlState stage; - bool user_callback; + UserCallback user_callback; }; endpoint_info_t _endpoint_info[32 - 2]; From fc5f697aad4cafdc8abe5dbbaf90aa649e449fb6 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 14 Mar 2018 18:37:17 -0500 Subject: [PATCH 011/488] Change USBDevice read handling Remove the USBDevice function read_start and automatically start all reads internally in USBDevice. This patch also renames the function read_finish to read. --- usb/device/USBDevice/USBDevice.cpp | 39 ++++++------------------------ usb/device/USBDevice/USBDevice.h | 20 ++++----------- 2 files changed, 13 insertions(+), 46 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 9206388d99f..d8cf7ee729e 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -866,6 +866,8 @@ void USBDevice::out(usb_ep_t endpoint) endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; info->pending += 1; + _phy->endpoint_read(endpoint, info->max_packet_size); + if (info->callback) { (this->*(info->callback))(endpoint); } @@ -994,7 +996,11 @@ bool USBDevice::endpoint_add(usb_ep_t endpoint, uint32_t max_packet_size, usb_ep info->flags |= ENDPOINT_ENABLED; info->pending = 0; info->max_packet_size = max_packet_size; - ret = true; + ret = _phy->endpoint_read(endpoint, max_packet_size); + if (!ret) { + MBED_ASSERT(0); + endpoint_remove(endpoint); + } } unlock(); @@ -1191,36 +1197,7 @@ uint32_t USBDevice::endpoint_max_packet_size(usb_ep_t endpoint) return size; } -bool USBDevice::read_start(usb_ep_t endpoint) -{ - lock(); - - if (!EP_INDEXABLE(endpoint)) { - MBED_ASSERT(0); - unlock(); - return false; - } - - if(!configured()) { - unlock(); - return false; - } - - endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; - if (!(info->flags & ENDPOINT_ENABLED)) { - // Invalid endpoint is being used - MBED_ASSERT(0); - unlock(); - return false; - } - - bool ret = _phy->endpoint_read(endpoint, info->max_packet_size); - - unlock(); - return ret; -} - -bool USBDevice::read_finish(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint32_t *size) +bool USBDevice::read(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint32_t *size) { lock(); diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 5a532528d0f..1ede75ea10f 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -201,22 +201,12 @@ class USBDevice: public USBPhyEvents { */ uint32_t endpoint_max_packet_size(usb_ep_t endpoint); - /** Start a read on the given endpoint - * - * After the read is finished call read_start to get the result. - * - * @param endpoint endpoint to perform the read on - * @return true if the read was started, false if no more reads can be started - * @note This endpoint must already have been setup with endpoint_add - */ - bool read_start(usb_ep_t endpoint); - /** - * Finish a read on the given endpoint + * Read a packet on the given endpoint * - * Get the contents of a read started with read_start. To ensure all - * the data from this endpoint is read make sure the buffer and size - * passed is at least as big as the maximum packet for this endpoint. + * Get the contents of an IN transfer. To ensure all the data from this + * endpoint is read make sure the buffer and size passed in is at least + * as big as the maximum packet for this endpoint. * * @param endpoint endpoint to read data from * @param buffer buffer to fill with read data @@ -226,7 +216,7 @@ class USBDevice: public USBPhyEvents { * @return true if the read was completed, otherwise false * @note This endpoint must already have been setup with endpoint_add */ - bool read_finish(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint32_t *size); + bool read(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint32_t *size); /** * Write a data to the given endpoint From 2e3fa9638a94d54f29fb349bdd281e314b01dee8 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 14 Mar 2018 18:38:16 -0500 Subject: [PATCH 012/488] Update USBTester for simplified read handling Remove read_start and replace read_finish with read to match the new USBDevice API. --- TESTS/usb_device/basic/USBTester.cpp | 19 ++----------------- usb/device/USBDevice/USBDevice.cpp | 3 +-- 2 files changed, 3 insertions(+), 19 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index 1f26fce2f1c..5ccd7c68222 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -148,9 +148,6 @@ void USBTester::callback_set_configuration(uint8_t configuration) endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); - read_start(int_out); - read_start(bulk_out); - complete_set_configuration(true); } @@ -167,9 +164,6 @@ void USBTester::callback_set_interface(uint16_t interface, uint8_t alternate) endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); - read_start(int_out); - read_start(bulk_out); - complete_set_interface(true); return; } @@ -184,9 +178,6 @@ void USBTester::callback_set_interface(uint16_t interface, uint8_t alternate) endpoint_add(bulk_in, MIN_EP_SIZE, USB_EP_TYPE_BULK); endpoint_add(bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); - read_start(int_out); - read_start(bulk_out); - complete_set_interface(true); return; } @@ -362,10 +353,7 @@ void USBTester::epint_out_callback(usb_ep_t endpoint) uint8_t buffer[65]; uint32_t size = 0; - if (!read_finish(endpoint, buffer, sizeof(buffer), &size)) { - return; - } - if (!read_start(endpoint)) { + if (!read(endpoint, buffer, sizeof(buffer), &size)) { return; } } @@ -374,10 +362,7 @@ void USBTester::epbulk_out_callback(usb_ep_t endpoint) uint8_t buffer[65]; uint32_t size = 0; - if (!read_finish(endpoint, buffer, sizeof(buffer), &size)) { - return; - } - if (!read_start(endpoint)) { + if (!read(endpoint, buffer, sizeof(buffer), &size)) { return; } } diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index d8cf7ee729e..c99b9824ef9 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -866,8 +866,6 @@ void USBDevice::out(usb_ep_t endpoint) endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; info->pending += 1; - _phy->endpoint_read(endpoint, info->max_packet_size); - if (info->callback) { (this->*(info->callback))(endpoint); } @@ -1229,6 +1227,7 @@ bool USBDevice::read(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint bool ret = _phy->endpoint_read_result(endpoint, buffer, max_size, size); if (ret) { info->pending -= 1; + _phy->endpoint_read(endpoint, info->max_packet_size); } unlock(); From 3fae4b19bc251b5b6493ea217cc738bdcd6c6b47 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 15 Mar 2018 16:59:17 -0500 Subject: [PATCH 013/488] Fix USB init problems Initialize the _transfer structure so the behavior is the same regardless of prior memory contents. This fixes a hang during USB testing when CI flags are used. --- usb/device/USBDevice/USBDevice.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index c99b9824ef9..c724da23aa2 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -1140,6 +1140,8 @@ USBDevice::USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint1 this->product_release = product_release; memset(_endpoint_info, 0, sizeof(_endpoint_info)); + memset(&_transfer, 0, sizeof(_transfer)); + _transfer.user_callback = None; _setup_ready = false; _abort_control = false; @@ -1163,6 +1165,8 @@ USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_r this->product_release = product_release; memset(_endpoint_info, 0, sizeof(_endpoint_info)); + memset(&_transfer, 0, sizeof(_transfer)); + _transfer.user_callback = None; _setup_ready = false; _abort_control = false; From a60bfa63cff3413821efb6598e26bfabadceb94c Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 15 Mar 2018 20:10:36 -0500 Subject: [PATCH 014/488] Update stall state on set and clear feature Call USBDevice::endpoint_stall/unstall in the request to set/clear halt so the endpoint state is properly updated in the array _endpoint_info. --- usb/device/USBDevice/USBDevice.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index c724da23aa2..f735ec90da7 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -460,10 +460,10 @@ bool USBDevice::_request_set_feature() /* TODO: Remote wakeup feature not supported */ break; case ENDPOINT_RECIPIENT: - if (!EP_VALID(_transfer.setup.wIndex)) { + if (!EP_INDEXABLE(_transfer.setup.wIndex)) { break; } else if (_transfer.setup.wValue == ENDPOINT_HALT) { - _phy->endpoint_stall(_transfer.setup.wIndex); + endpoint_stall(_transfer.setup.wIndex); success = true; } break; @@ -492,10 +492,10 @@ bool USBDevice::_request_clear_feature() /* TODO: Remote wakeup feature not supported */ break; case ENDPOINT_RECIPIENT: - if (!EP_VALID(_transfer.setup.wIndex)) { + if (!EP_INDEXABLE(_transfer.setup.wIndex)) { break; } else if (_transfer.setup.wValue == ENDPOINT_HALT) { - _phy->endpoint_unstall(_transfer.setup.wIndex); + endpoint_unstall(_transfer.setup.wIndex); success = true; } break; From fd41d83cf4f2aa1092c79302090b8a84517d733d Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 16 Mar 2018 19:58:15 -0500 Subject: [PATCH 015/488] Move USBDevice processing out of user callbacks Perform processing triggered by user callbacks when USB is being unlocked rather than synchronously. This prevents recursive callbacks which reduces stack usage. This also prevents state change inside the user callback which makes the code easier to reason about. --- usb/device/USBDevice/USBDevice.cpp | 76 +++++++++++++++++++++++++++--- usb/device/USBDevice/USBDevice.h | 19 ++++++++ 2 files changed, 88 insertions(+), 7 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index f735ec90da7..6c5ebaa1bc9 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -299,6 +299,18 @@ void USBDevice::complete_request_xfer_done(bool success) lock(); MBED_ASSERT(_transfer.user_callback == RequestXferDone); + _transfer.args.status = success; + _run_later(&USBDevice::_complete_request_xfer_done); + + unlock(); +} + +void USBDevice::_complete_request_xfer_done() +{ + assert_locked(); + + bool success = _transfer.args.status; + _transfer.user_callback = None; if (_abort_control) { _control_abort(); @@ -320,8 +332,6 @@ void USBDevice::complete_request_xfer_done(bool success) _transfer.stage = Status; _phy->ep0_read(); } - - unlock(); } bool USBDevice::_request_set_address() @@ -363,6 +373,18 @@ void USBDevice::complete_set_configuration(bool success) lock(); MBED_ASSERT(_transfer.user_callback == SetConfiguration); + _transfer.args.status = success; + _run_later(&USBDevice::_complete_set_configuration); + + unlock(); +} + +void USBDevice::_complete_set_configuration() +{ + assert_locked(); + + bool success = _transfer.args.status; + _transfer.user_callback = None; if (_abort_control) { _control_abort(); @@ -379,7 +401,6 @@ void USBDevice::complete_set_configuration(bool success) _phy->ep0_stall(); } - unlock(); } bool USBDevice::_request_get_configuration() @@ -425,6 +446,18 @@ void USBDevice::complete_set_interface(bool success) lock(); MBED_ASSERT(_transfer.user_callback == SetInterface); + _transfer.args.status = success; + _run_later(&USBDevice::_complete_set_interface); + + unlock(); +} + +void USBDevice::_complete_set_interface() +{ + assert_locked(); + + bool success = _transfer.args.status; + _transfer.user_callback = None; if (_abort_control) { _control_abort(); @@ -439,8 +472,6 @@ void USBDevice::complete_set_interface(bool success) } else { _phy->ep0_stall(); } - - unlock(); } bool USBDevice::_request_set_feature() @@ -643,6 +674,22 @@ void USBDevice::complete_request(RequestResult direction, uint8_t *data, uint32_ lock(); MBED_ASSERT(_transfer.user_callback == Request); + _transfer.args.request.result = direction; + _transfer.args.request.data = data; + _transfer.args.request.size = size; + _run_later(&USBDevice::_complete_request); + + unlock(); +} + +void USBDevice::_complete_request() +{ + assert_locked(); + + RequestResult direction = _transfer.args.request.result; + uint8_t *data = _transfer.args.request.data; + uint32_t size = _transfer.args.request.size; + _transfer.user_callback = None; if (_abort_control) { if ((direction == Receive) || (direction == Send)) { @@ -674,8 +721,6 @@ void USBDevice::complete_request(RequestResult direction, uint8_t *data, uint32_ _transfer.direction = direction; _control_setup_continue(); } - - unlock(); } void USBDevice::_control_abort_start() @@ -1151,6 +1196,7 @@ USBDevice::USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint1 _current_interface = 0; _current_alternate = 0; _locked = 0; + _post_process = NULL; /* Set initial device state */ _device.state = Powered; @@ -1176,6 +1222,7 @@ USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_r _current_interface = 0; _current_alternate = 0; _locked = 0; + _post_process = NULL; /* Set initial device state */ _device.state = Powered; @@ -1390,6 +1437,16 @@ void USBDevice::lock() void USBDevice::unlock() { MBED_ASSERT(_locked > 0); + + if (_locked == 1) { + // Perform post processing before fully unlocking + while (_post_process != NULL) { + void (USBDevice::*call)() = _post_process; + _post_process = NULL; + (this->*call)(); + } + } + _locked--; core_util_critical_section_exit(); } @@ -1424,3 +1481,8 @@ void USBDevice::_change_state(DeviceState new_state) { callback_state_change(new_state); } + +void USBDevice::_run_later(void (USBDevice::*function)()) +{ + _post_process = function; +} diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 1ede75ea10f..2f69dfef37a 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -509,6 +509,12 @@ class USBDevice: public USBPhyEvents { bool _request_get_interface(); bool _request_set_interface(); void _change_state(DeviceState state); + void _run_later(void (USBDevice::*function)()); + + void _complete_request(); + void _complete_request_xfer_done(); + void _complete_set_configuration(); + void _complete_set_interface(); struct endpoint_info_t { void (USBDevice::*callback)(usb_ep_t endpoint); @@ -538,6 +544,17 @@ class USBDevice: public USBPhyEvents { SetInterface }; + struct complete_request_t { + RequestResult result; + uint8_t *data; + uint32_t size; + }; + + union complete_args_t { + complete_request_t request; + bool status; + }; + struct control_transfer_t { setup_packet_t setup; uint8_t *ptr; @@ -547,6 +564,7 @@ class USBDevice: public USBPhyEvents { bool notify; ControlState stage; UserCallback user_callback; + complete_args_t args; }; endpoint_info_t _endpoint_info[32 - 2]; @@ -556,6 +574,7 @@ class USBDevice: public USBPhyEvents { control_transfer_t _transfer; usb_device_t _device; uint32_t _max_packet_size_ep0; + void (USBDevice::*_post_process)(); bool _setup_ready; bool _abort_control; From 32fa27874dddc55bcb747cef38c830f48caf45b8 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 16 Mar 2018 22:56:20 -0500 Subject: [PATCH 016/488] Allow transfer to start when configuring USB Allow reads and writes to be started when entering the configured state. --- usb/device/USBDevice/USBDevice.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 6c5ebaa1bc9..c522cf3d95b 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -1256,7 +1256,8 @@ bool USBDevice::read(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint return false; } - if (!configured()) { + bool configuring = _transfer.user_callback == SetConfiguration; + if (!configured() && !configuring) { unlock(); return false; } @@ -1295,7 +1296,8 @@ bool USBDevice::write(usb_ep_t endpoint, uint8_t *buffer, uint32_t size) return false; } - if (!configured()) { + bool configuring = _transfer.user_callback == SetConfiguration; + if (!configured() && !configuring) { unlock(); return false; } From ec350dc2cb5e6956749e7906b82d45eba423fc95 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 17 Mar 2018 18:08:30 -0500 Subject: [PATCH 017/488] Explicitly return when endpoint 0 is stalled Stalling endpoint 0 indicates the end of a control transfer. Return immediately when this occurs rather than continuing processing. In particular, this patch prevents status from erroneously being sent when _request_setup returns false inside _complete_request. --- usb/device/USBDevice/USBDevice.cpp | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index c522cf3d95b..37cd9c1eb23 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -399,6 +399,7 @@ void USBDevice::_complete_set_configuration() _control_setup_continue(); } else { _phy->ep0_stall(); + return; } } @@ -471,6 +472,7 @@ void USBDevice::_complete_set_interface() _control_setup_continue(); } else { _phy->ep0_stall(); + return; } } @@ -706,6 +708,7 @@ void USBDevice::_complete_request() /* Standard requests */ if (!_request_setup()) { _phy->ep0_stall(); + return; } /* user_callback may be set by _request_setup() */ @@ -714,6 +717,7 @@ void USBDevice::_complete_request() } } else if (direction == Failure) { _phy->ep0_stall(); + return; } else { _transfer.notify = true; _transfer.remaining = size; @@ -872,6 +876,7 @@ void USBDevice::ep0_out() if (!_control_out()) { /* Protocol stall; this will stall both endpoints */ _phy->ep0_stall(); + return; } } @@ -896,6 +901,7 @@ void USBDevice::ep0_in() if (!_control_in()) { /* Protocol stall; this will stall both endpoints */ _phy->ep0_stall(); + return; } } From f29afa54eb1efb3d9645cdcfcc1ac4b2d4c2a00c Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 17 Mar 2018 21:21:13 -0500 Subject: [PATCH 018/488] Call disconnect when uninitializing USB Disconnect USB when uninitializing USB so it is in a well defined state. --- usb/device/USBDevice/USBDevice.cpp | 13 +++++++++++-- usb/device/USBDevice/USBDevice.h | 1 + 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 37cd9c1eb23..84910903e2d 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -958,6 +958,7 @@ void USBDevice::deinit() lock(); if (_initialized) { + disconnect(); this->_phy->deinit(); _initialized = false; } @@ -980,7 +981,10 @@ void USBDevice::connect(bool blocking) { /* Connect device */ lock(); - _phy->connect(); + if (!_connected) { + _phy->connect(); + _connected = true; + } unlock(); if (blocking) { @@ -994,7 +998,10 @@ void USBDevice::disconnect() lock(); /* Disconnect device */ - _phy->disconnect(); + if (_connected) { + _phy->disconnect(); + _connected = false; + } /* Set initial device state */ if (_device.state > Powered) { @@ -1199,6 +1206,7 @@ USBDevice::USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint1 _phy = phy; _initialized = false; + _connected = false; _current_interface = 0; _current_alternate = 0; _locked = 0; @@ -1225,6 +1233,7 @@ USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_r _phy = get_usb_phy(); _initialized = false; + _connected = false; _current_interface = 0; _current_alternate = 0; _locked = 0; diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 2f69dfef37a..9d3e01d4dfb 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -571,6 +571,7 @@ class USBDevice: public USBPhyEvents { USBPhy *_phy; bool _initialized; + bool _connected; control_transfer_t _transfer; usb_device_t _device; uint32_t _max_packet_size_ep0; From a7739393f69799abc75afd686b1849eb846bdf51 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sun, 18 Mar 2018 19:32:20 -0500 Subject: [PATCH 019/488] Update USBPhy to allow zero copy transfers Update the USBPhy to allow for zero copy USB transfers on devices which support it. This also aligns more closely with the CMSIS USB driver model. --- platform/USBPhy.h | 25 ++++++++++++------------- 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/platform/USBPhy.h b/platform/USBPhy.h index 33f5870e1a6..1e800e33fcb 100644 --- a/platform/USBPhy.h +++ b/platform/USBPhy.h @@ -182,16 +182,18 @@ class USBPhy { /** * Start receiving a packet of up to wMaxPacketSize on endpoint 0 + * + * @param data Buffer to fill with the data read + * @param size Size of buffer */ - virtual void ep0_read() = 0; + virtual void ep0_read(uint8_t *data, uint32_t size) = 0; /** * Read the contents of a received packet * - * @param buffer Buffer to fill with the data read - * @param size Size of buffer + * @return Size of data read */ - virtual uint32_t ep0_read_result(uint8_t *buffer, uint32_t size) = 0; + virtual uint32_t ep0_read_result() = 0; /** * Write a packet on endpoint 0 @@ -253,23 +255,20 @@ class USBPhy { * Start a read on the given endpoint * * @param endpoint Endpoint to start the read on - * @param max_packet A hint as to the wMaxPacketSize of this endpoint. - * This must match the size in endpoint_add. + * @param data Buffer to fill with data + * @param size Size of the read buffer. This must be at least + * the max packet size for this endpoint. * @return true if the read was successfully started, false otherwise */ - virtual bool endpoint_read(usb_ep_t endpoint, uint32_t max_packet) = 0; + virtual bool endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) = 0; /** * Finish a read on the given endpoint * - * @param endpoint Endpoint to read data from - * @param data Buffer to fill with data - * @param size Size of buffer - * @param bytes_read The number of bytes in the current packet. This can be larger than - * the size parameter if the buffer passed in was too small. + * @param endpoint Endpoint to check * @return true if data was read false otherwise */ - virtual bool endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytes_read) = 0; + virtual uint32_t endpoint_read_result(usb_ep_t endpoint) = 0; /** * Start a write on the given endpoint From 06cbfaddf3271cc346c1ecd5aab72605b35b45cf Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 16 Mar 2018 23:49:26 -0500 Subject: [PATCH 020/488] Update USBDevice to reflect the updated USBPhy Update USBDevice so the USB buffers are user supplied. --- usb/device/USBDevice/USBDevice.cpp | 87 ++++++++++++++++++++++++------ usb/device/USBDevice/USBDevice.h | 36 +++++++++---- 2 files changed, 97 insertions(+), 26 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 84910903e2d..808def213c0 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -200,7 +200,7 @@ bool USBDevice::_control_out() } /* Read from endpoint */ - packetSize = _phy->ep0_read_result(_transfer.ptr, _transfer.remaining); + packetSize = _phy->ep0_read_result(); /* Check if transfer size is valid */ if (packetSize > _transfer.remaining) { @@ -224,7 +224,7 @@ bool USBDevice::_control_out() complete_request_xfer_done(true); } } else { - _phy->ep0_read(); + _phy->ep0_read(_transfer.ptr, _transfer.remaining); } return true; @@ -330,7 +330,7 @@ void USBDevice::_complete_request_xfer_done() _phy->ep0_write(NULL, 0); } else if (_transfer.stage == DataIn) { _transfer.stage = Status; - _phy->ep0_read(); + _phy->ep0_read(NULL, 0); } } @@ -800,7 +800,7 @@ void USBDevice::_control_setup_continue() } else { /* OUT stage */ _transfer.stage = DataOut; - _phy->ep0_read(); + _phy->ep0_read(_transfer.ptr, _transfer.remaining); } } else { /* Status stage */ @@ -1052,11 +1052,6 @@ bool USBDevice::endpoint_add(usb_ep_t endpoint, uint32_t max_packet_size, usb_ep info->flags |= ENDPOINT_ENABLED; info->pending = 0; info->max_packet_size = max_packet_size; - ret = _phy->endpoint_read(endpoint, max_packet_size); - if (!ret) { - MBED_ASSERT(0); - endpoint_remove(endpoint); - } } unlock(); @@ -1261,7 +1256,7 @@ uint32_t USBDevice::endpoint_max_packet_size(usb_ep_t endpoint) return size; } -bool USBDevice::read(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint32_t *size) +bool USBDevice::read_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size) { lock(); @@ -1291,17 +1286,43 @@ bool USBDevice::read(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint return false; } - bool ret = _phy->endpoint_read_result(endpoint, buffer, max_size, size); - if (ret) { - info->pending -= 1; - _phy->endpoint_read(endpoint, info->max_packet_size); + _phy->endpoint_read(endpoint, buffer, info->max_packet_size); + + unlock(); + + return true; +} + +uint32_t USBDevice::read_finish(usb_ep_t endpoint) +{ + lock(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); + return 0; } + if (!configured()) { + unlock(); + return 0; + } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + if (!(info->flags & ENDPOINT_ENABLED)) { + // Invalid endpoint is being used + MBED_ASSERT(0); + unlock(); + return 0; + } + + uint32_t size = 0; + size = _phy->endpoint_read_result(endpoint); unlock(); - return ret; + return size; } -bool USBDevice::write(usb_ep_t endpoint, uint8_t *buffer, uint32_t size) +bool USBDevice::write_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t size) { lock(); @@ -1341,13 +1362,47 @@ bool USBDevice::write(usb_ep_t endpoint, uint8_t *buffer, uint32_t size) /* Send report */ bool ret = _phy->endpoint_write(endpoint, buffer, size); if (ret) { + info->transfer_size = size; info->pending += 1; + } else { + info->transfer_size = 0; } unlock(); return ret; } +uint32_t USBDevice::write_finish(usb_ep_t endpoint) +{ + uint32_t ret = 0; + + lock(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); + return false; + } + + if (!configured()) { + unlock(); + return false; + } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + if (!(info->flags & ENDPOINT_ENABLED)) { + // Invalid endpoint is being used + MBED_ASSERT(0); + unlock(); + return 0; + } + + ret = info->transfer_size; + + unlock(); + return ret; +} + const uint8_t *USBDevice::device_desc() { uint8_t device_descriptor_temp[] = { diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 9d3e01d4dfb..a61549ca68f 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -202,26 +202,33 @@ class USBDevice: public USBPhyEvents { uint32_t endpoint_max_packet_size(usb_ep_t endpoint); /** - * Read a packet on the given endpoint + * start a read on the given endpoint * - * Get the contents of an IN transfer. To ensure all the data from this - * endpoint is read make sure the buffer and size passed in is at least - * as big as the maximum packet for this endpoint. + * Start a read on the given endpoint. The data buffer must remain + * unchanged until the transfer either completes or is aborted. * * @param endpoint endpoint to read data from * @param buffer buffer to fill with read data - * @param max_size the total size of the data buffer. This must be at least - * the max packet size of this endpoint - * @param size The size of data that was read + * @param size The size of data to read. This must be greater than or equal + * to the max packet size for this endpoint * @return true if the read was completed, otherwise false * @note This endpoint must already have been setup with endpoint_add */ - bool read(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint32_t *size); + bool read_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t size); + + /** + * Get the status of a read + * + * @param endpoint endpoint to get the status of + * @return number of bytes read by this endpoint + */ + uint32_t read_finish(usb_ep_t endpoint); /** * Write a data to the given endpoint * - * Write data to an endpoint. + * Write data to an endpoint. The data sent must remain unchanged until + * the transfer either completes or is aborted. * * @param endpoint endpoint to write data to * @param buffer data to write @@ -229,7 +236,15 @@ class USBDevice: public USBPhyEvents { * max packet size of this endpoint * @note This endpoint must already have been setup with endpoint_add */ - bool write(usb_ep_t endpoint, uint8_t *buffer, uint32_t size); + bool write_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t size); + + /** + * Get the status of a write + * + * @param endpoint endpoint to get the status of + * @return number of bytes sent by this endpoint + */ + uint32_t write_finish(usb_ep_t endpoint); /* * Get device descriptor. @@ -519,6 +534,7 @@ class USBDevice: public USBPhyEvents { struct endpoint_info_t { void (USBDevice::*callback)(usb_ep_t endpoint); uint16_t max_packet_size; + uint16_t transfer_size; uint8_t flags; uint8_t pending; }; From 184dc0c19ea2f18fdfeaeee35e6df721e1710a74 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 17 Mar 2018 18:09:09 -0500 Subject: [PATCH 021/488] Add abort API to USBDevice Add the function endpoint_abort and ensure ongoing transfer are aborted when an endpoint is removed. --- usb/device/USBDevice/USBDevice.cpp | 50 ++++++++++++++++++++++++++++-- usb/device/USBDevice/USBDevice.h | 8 +++++ 2 files changed, 56 insertions(+), 2 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 808def213c0..da3617cedd4 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -916,7 +916,8 @@ void USBDevice::out(usb_ep_t endpoint) endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; - info->pending += 1; + MBED_ASSERT(info->pending >= 1); + info->pending -= 1; if (info->callback) { (this->*(info->callback))(endpoint); } @@ -1071,6 +1072,10 @@ void USBDevice::endpoint_remove(usb_ep_t endpoint) endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; MBED_ASSERT(info->flags & ENDPOINT_ENABLED); + if (info->pending) { + _phy->endpoint_abort(endpoint); + } + info->callback = NULL; info->flags = 0; info->pending = 0; @@ -1256,6 +1261,38 @@ uint32_t USBDevice::endpoint_max_packet_size(usb_ep_t endpoint) return size; } +void USBDevice::endpoint_abort(usb_ep_t endpoint) +{ + lock(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); + return; + } + + bool configuring = _transfer.user_callback == SetConfiguration; + if (!configured() && !configuring) { + unlock(); + return; + } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + if (!(info->flags & ENDPOINT_ENABLED)) { + // Invalid endpoint is being used + MBED_ASSERT(0); + unlock(); + return; + } + + if (info->pending) { + _phy->endpoint_abort(endpoint); + info->pending = 0; + } + + unlock(); +} + bool USBDevice::read_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size) { lock(); @@ -1286,7 +1323,16 @@ bool USBDevice::read_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size return false; } - _phy->endpoint_read(endpoint, buffer, info->max_packet_size); + if (info->pending) { + // Only allow 1 packet + unlock(); + return false; + } + + bool ret = _phy->endpoint_read(endpoint, buffer, info->max_packet_size); + if (ret) { + info->pending += 1; + } unlock(); diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index a61549ca68f..698591b2e66 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -201,6 +201,14 @@ class USBDevice: public USBPhyEvents { */ uint32_t endpoint_max_packet_size(usb_ep_t endpoint); + /** + * Abort the current transfer on this endpoint + * + * @param endpoint endpoint with transfer to abort + * @note This endpoint must already have been setup with endpoint_add + */ + void endpoint_abort(usb_ep_t endpoint); + /** * start a read on the given endpoint * From 9a9736edf9e96721f9706de7eaf6cab0643e2ff6 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 17 Mar 2018 20:05:12 -0500 Subject: [PATCH 022/488] Update USBTester for the new USB API Update the class USBTester so it works with the new zero-copy USBDevice API. --- TESTS/usb_device/basic/USBTester.cpp | 22 ++++++++++------------ TESTS/usb_device/basic/USBTester.h | 2 ++ 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index 5ccd7c68222..3235a3f8554 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -145,8 +145,10 @@ void USBTester::callback_set_configuration(uint8_t configuration) // Configure endpoints > 0 endpoint_add(int_in, MAX_EP_SIZE, USB_EP_TYPE_INT); endpoint_add(int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); + read_start(int_out, int_buf, sizeof(int_buf)); endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); + read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); complete_set_configuration(true); } @@ -161,8 +163,10 @@ void USBTester::callback_set_interface(uint16_t interface, uint8_t alternate) endpoint_add(int_in, MAX_EP_SIZE, USB_EP_TYPE_INT); endpoint_add(int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); + read_start(int_out, int_buf, sizeof(int_buf)); endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); + read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); complete_set_interface(true); return; @@ -175,8 +179,10 @@ void USBTester::callback_set_interface(uint16_t interface, uint8_t alternate) endpoint_add(int_in, MIN_EP_SIZE, USB_EP_TYPE_INT); endpoint_add(int_out, MIN_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); + read_start(int_out, int_buf, sizeof(int_buf)); endpoint_add(bulk_in, MIN_EP_SIZE, USB_EP_TYPE_BULK); endpoint_add(bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); + read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); complete_set_interface(true); return; @@ -350,20 +356,12 @@ const uint8_t *USBTester::configuration_desc() void USBTester::epint_out_callback(usb_ep_t endpoint) { - uint8_t buffer[65]; - uint32_t size = 0; - - if (!read(endpoint, buffer, sizeof(buffer), &size)) { - return; - } + read_finish(endpoint); + read_start(endpoint, int_buf, sizeof(int_buf)); } void USBTester::epbulk_out_callback(usb_ep_t endpoint) { - uint8_t buffer[65]; - uint32_t size = 0; - - if (!read(endpoint, buffer, sizeof(buffer), &size)) { - return; - } + read_finish(endpoint); + read_start(endpoint, bulk_buf, sizeof(bulk_buf)); } diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index 0e527af98ab..7b56d3171e5 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -73,8 +73,10 @@ class USBTester: public USBDevice { protected: uint8_t bulk_in; uint8_t bulk_out; + uint8_t bulk_buf[64]; uint8_t int_in; uint8_t int_out; + uint8_t int_buf[64]; EventQueue *queue; virtual void callback_state_change(DeviceState new_state); From 02901219324351654a8470abedf1f9f86d0be724 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 10 Mar 2018 23:13:45 -0600 Subject: [PATCH 023/488] Update the LPC17XX driver to the new API Update this driver to match the new zero-copy API. --- .../TARGET_LPC176X/usb/USBHAL_LPC17.cpp | 60 +++++++++++++------ .../TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h | 12 ++-- 2 files changed, 50 insertions(+), 22 deletions(-) diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp index 23e8c1f87a1..ef3a66ea831 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp +++ b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp @@ -23,8 +23,8 @@ // Get endpoint direction -#define IN_EP(endpoint) ((endpoint) & 1U ? true : false) -#define OUT_EP(endpoint) ((endpoint) & 1U ? false : true) +#define IN_EP(endpoint) ((endpoint) & 0x80U ? true : false) +#define OUT_EP(endpoint) ((endpoint) & 0x80U ? false : true) // Convert physical endpoint number to register bit #define EP(endpoint) (1UL<PCONP |= PCUSB; @@ -466,14 +469,20 @@ void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) endpointReadcore(EP0OUT, buffer, size); } -void USBPhyHw::ep0_read(void) +void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) { - endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0); + read_buffers[EP0OUT] = data; + read_sizes[EP0OUT] = size; + SIEselectEndpoint(EP0OUT); + SIEclearBuffer(); } -uint32_t USBPhyHw::ep0_read_result(uint8_t *buffer, uint32_t size) +uint32_t USBPhyHw::ep0_read_result() { - return endpointReadcore(EP0OUT, buffer, size); + uint32_t size = endpointReadcore(EP0OUT, read_buffers[EP0OUT], read_sizes[EP0OUT]); + read_buffers[EP0OUT] = NULL; + read_sizes[EP0OUT] = 0; + return size; } void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) @@ -487,29 +496,41 @@ void USBPhyHw::ep0_stall(void) endpoint_stall(EP0OUT); } -bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint32_t maximumSize) +bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) { - // Don't clear isochronous endpoints - if ((DESC_TO_PHY(endpoint) >> 1) % 3 || (DESC_TO_PHY(endpoint) >> 1) == 0) { - SIEselectEndpoint(endpoint); - SIEclearBuffer(); + read_buffers[endpoint] = data; + read_sizes[endpoint] = size; + enableEndpointEvent(endpoint); + uint8_t status = SIEselectEndpoint(endpoint); + if (status & ((1 << 5) | (1 << 6))) { + // If any buffer has data then set the interrupt flag + LPC_USB->USBEpIntSet = EP(endpoint); } return true; } -bool USBPhyHw::endpoint_read_result(usb_ep_t endpoint, uint8_t *buffer, uint32_t size, uint32_t *bytesRead) +uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) { //for isochronous endpoint, we don't wait an interrupt if ((DESC_TO_PHY(endpoint) >> 1) % 3 || (DESC_TO_PHY(endpoint) >> 1) == 0) { if (!(epComplete & EP(endpoint))) { - return false; + return 0; } } - *bytesRead = endpointReadcore(endpoint, buffer, size); + uint32_t bytesRead = endpointReadcore(endpoint, read_buffers[endpoint], read_sizes[endpoint]); + read_buffers[endpoint] = NULL; + read_sizes[endpoint] = 0; + + // Don't clear isochronous endpoints + if ((DESC_TO_PHY(endpoint) >> 1) % 3 || (DESC_TO_PHY(endpoint) >> 1) == 0) { + SIEselectEndpoint(endpoint); + SIEclearBuffer(); + } + epComplete &= ~EP(endpoint); - return true; + return bytesRead; } bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) @@ -536,7 +557,9 @@ bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t maxPacket, usb_ep_type_t while (!(LPC_USB->USBDevIntSt & EP_RLZED)); LPC_USB->USBDevIntClr = EP_RLZED; - enableEndpointEvent(endpoint); + if (IN_EP(endpoint)) { + enableEndpointEvent(endpoint); + } return true; } @@ -649,6 +672,8 @@ void USBPhyHw::process(void) if ((devStat & SIE_DS_SUS) == 0) { events->suspend(true); } + memset(read_buffers, 0, sizeof(read_buffers)); + memset(read_sizes, 0, sizeof(read_sizes)); events->reset(); } } @@ -693,9 +718,10 @@ void USBPhyHw::process(void) selectEndpointClearInterrupt(endpoint); epComplete |= EP(endpoint); LPC_USB->USBDevIntClr = EP_SLOW; - if (endpoint & 0x80) {//TODO - use macro + if (IN_EP(endpoint)) { events->in(endpoint); } else { + disableEndpointEvent(endpoint); events->out(endpoint); } } diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h index 999991c6a66..ad2ca502c52 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h +++ b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h @@ -40,18 +40,18 @@ class USBPhyHw : public USBPhy { virtual uint32_t ep0_set_max_packet(uint32_t max_packet); virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size); - virtual void ep0_read(void); - virtual uint32_t ep0_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_read(uint8_t *data, uint32_t size); + virtual uint32_t ep0_read_result(); virtual void ep0_write(uint8_t *buffer, uint32_t size); - virtual void ep0_stall(void); + virtual void ep0_stall(); virtual bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type); virtual void endpoint_remove(usb_ep_t endpoint); virtual void endpoint_stall(usb_ep_t endpoint); virtual void endpoint_unstall(usb_ep_t endpoint); - virtual bool endpoint_read(usb_ep_t endpoint, uint32_t maximumSize); - virtual bool endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytesRead); + virtual bool endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual uint32_t endpoint_read_result(usb_ep_t endpoint); virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size); virtual void endpoint_abort(usb_ep_t endpoint); @@ -59,6 +59,8 @@ class USBPhyHw : public USBPhy { private: USBPhyEvents *events; + uint8_t *read_buffers[16]; + uint16_t read_sizes[16]; static void _usbisr(void); }; From 6a04a0425cb31b84b0ed0d00dc5e9a6736ad0391 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sun, 18 Mar 2018 19:10:13 -0500 Subject: [PATCH 024/488] Update the Kinetis USB driver to the new API Update this driver to match the new zero-copy API. --- targets/TARGET_Freescale/usb/USBPhyHw.h | 14 ++++-- .../TARGET_Freescale/usb/USBPhy_Kinetis.cpp | 46 ++++++++++++++----- 2 files changed, 45 insertions(+), 15 deletions(-) diff --git a/targets/TARGET_Freescale/usb/USBPhyHw.h b/targets/TARGET_Freescale/usb/USBPhyHw.h index f11c7512705..7bf1fee22f0 100644 --- a/targets/TARGET_Freescale/usb/USBPhyHw.h +++ b/targets/TARGET_Freescale/usb/USBPhyHw.h @@ -40,8 +40,8 @@ class USBPhyHw : public USBPhy { virtual uint32_t ep0_set_max_packet(uint32_t max_packet); virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size); - virtual void ep0_read(); - virtual uint32_t ep0_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_read(uint8_t *data, uint32_t size); + virtual uint32_t ep0_read_result(); virtual void ep0_write(uint8_t *buffer, uint32_t size); virtual void ep0_stall(); @@ -50,8 +50,8 @@ class USBPhyHw : public USBPhy { virtual void endpoint_stall(usb_ep_t endpoint); virtual void endpoint_unstall(usb_ep_t endpoint); - virtual bool endpoint_read(usb_ep_t endpoint, uint32_t maximumSize); - virtual bool endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytesRead); + virtual bool endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual uint32_t endpoint_read_result(usb_ep_t endpoint); virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size); virtual void endpoint_abort(usb_ep_t endpoint); @@ -59,6 +59,12 @@ class USBPhyHw : public USBPhy { private: USBPhyEvents *events; + uint8_t *read_buffers[16]; + uint16_t read_sizes[16]; + + bool endpoint_read_core(usb_ep_t endpoint, uint32_t max_packet); + bool endpoint_read_result_core(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytesRead); + static void _usbisr(void); }; diff --git a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp index 3ca12d37fc8..3c98280a2c2 100644 --- a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp +++ b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp @@ -273,10 +273,10 @@ uint32_t USBPhyHw::ep0_set_max_packet(uint32_t max_packet) void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) { uint32_t sz; - endpoint_read_result(EP0OUT, buffer, size, &sz); + endpoint_read_result_core(EP0OUT, buffer, size, &sz); } -void USBPhyHw::ep0_read() +void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) { if (ctrl_xfer == CTRL_XFER_READY) { // Transfer is done so ignore call @@ -301,15 +301,15 @@ void USBPhyHw::ep0_read() // This allows a subsequent SETUP packet to be stored // without any processor intervention. Data1 &= ~1UL; // set DATA0 + endpoint_read_core(EP0OUT, MAX_PACKET_SIZE_EP0); + } else { + endpoint_read(EP0OUT, data, size); } - endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0); } -uint32_t USBPhyHw::ep0_read_result(uint8_t *buffer, uint32_t size) +uint32_t USBPhyHw::ep0_read_result() { - uint32_t sz; - endpoint_read_result(EP0OUT, buffer, size, &sz); - return sz; + return endpoint_read_result(EP0OUT); } void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) @@ -320,7 +320,7 @@ void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) } if ((ctrl_xfer == CTRL_XFER_NONE) || (ctrl_xfer == CTRL_XFER_OUT)) { // Prepare for next setup packet - endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0); + endpoint_read_core(EP0OUT, MAX_PACKET_SIZE_EP0); ctrl_xfer = CTRL_XFER_READY; } endpoint_write(EP0IN, buffer, size); @@ -339,7 +339,7 @@ void USBPhyHw::ep0_stall() // Note - time between stalling and setting up the endpoint // must be kept to a minimum to prevent a dropped SETUP // packet. - endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0); + endpoint_read_core(EP0OUT, MAX_PACKET_SIZE_EP0); core_util_critical_section_exit(); } @@ -406,7 +406,16 @@ void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; } -bool USBPhyHw:: endpoint_read(usb_ep_t endpoint, uint32_t max_packet) +bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ + uint8_t log = DESC_TO_LOG(endpoint); + + read_buffers[log] = data; + read_sizes[log] = size; + return endpoint_read_core(endpoint, size); +} + +bool USBPhyHw::endpoint_read_core(usb_ep_t endpoint, uint32_t max_packet) { uint8_t log_endpoint = DESC_TO_LOG(endpoint); @@ -423,7 +432,19 @@ bool USBPhyHw:: endpoint_read(usb_ep_t endpoint, uint32_t max_packet) return true; } -bool USBPhyHw::endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytes_read) +uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) +{ + uint8_t log = DESC_TO_LOG(endpoint); + + uint32_t bytes_read = 0; + endpoint_read_result_core(endpoint, read_buffers[log], read_sizes[log], &bytes_read); + read_buffers[log] = NULL; + read_sizes[log] = 0; + return bytes_read; +} + + +bool USBPhyHw::endpoint_read_result_core(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytes_read) { uint32_t n, sz, idx, setup = 0; uint8_t not_iso; @@ -541,6 +562,9 @@ void USBPhyHw::process() USB0->ERREN = 0xFF; // enable error interrupt sources USB0->ADDR = 0x00; // set default address + memset(read_buffers, 0, sizeof(read_buffers)); + memset(read_sizes, 0, sizeof(read_sizes)); + // reset bus for USBDevice layer events->reset(); From 9465460eab23e4b57994a6b9cb342791eb028030 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sun, 18 Mar 2018 20:20:59 -0500 Subject: [PATCH 025/488] Update USBPhy doxygen Update USBPhy doxygen to pull in handbook copyedits. Also update the docs to reflect the enhanced USBPhy API. --- platform/USBPhy.h | 78 ++++++++++++++++++++++++++++------------------- 1 file changed, 47 insertions(+), 31 deletions(-) diff --git a/platform/USBPhy.h b/platform/USBPhy.h index 1e800e33fcb..ef2c91a096f 100644 --- a/platform/USBPhy.h +++ b/platform/USBPhy.h @@ -23,42 +23,58 @@ /** Abstract interface to physical USB hardware * * # Defined behavior - * * Any endpoint configurations which fit in the parameters of the table returned - * by USBPhy::endpoint_table can be used. - * * All endpoints in any valid endpoint configuration can be used concurrently - * * Device supports use of at least one control, bulk, interrupt and + * * You can use any endpoint configurations that fit in the parameters + * of the table returned by USBPhy::endpoint_table. + * * You can use all endpoints in any valid endpoint configuration concurrently. + * * The device supports use of at least one control, bulk, interrupt and * isochronous in each direction at the same time - at least 8 endpoints. - * * Device supports all standard endpoint sizes (wMaxPacketSize) - * * Device can handle an interrupt latency of at least 100ms if reset is not being performed and address is not being set - * * USBPhyEvents events are only sent when USBPhy is in the initialized state - * * When unpowered only the USBPhyEvents::power event can be sent - * * On USB reset all endpoints are removed except for endpoint 0 - * * USBPhyEvents::out and USBPhyEvents::in events only occur for endpoints which have been added - * * A call to USBPhy::ep0_write results in USBPhyEvents::in getting called if not - * interrupted by a power loss or reset - * * A call to endpoint_read followed by endpoint_read_result results in USBPhyEvents::out getting called if not - * interrupted by a power loss or reset - * * Endpoint 0 naks all transactions aside from setup packets until one - * of ep0_read, ep0_write or ep0_stall has been called - * * Endpoint 0 stall is automatically cleared on reception of a setup packet + * * USBPhy supports all standard endpoint sizes (wMaxPacketSize). + * * USBPhy can handle an interrupt latency of at least 100ms if the host PC + * is not performing a reset or setting the device's address. + * * USBPhy only sends USBPhyEvents when it is in the initialized state. + * * When unpowered, USBPhy only sends the USBPhyEvents::power event. + * * On USB reset, all endpoints are removed except for endpoint 0. + * * A call to USBPhy::ep0_write results in the call of USBPhyEvents::in when + * the PC reads the data unless a power loss, reset, or a call to + * USBPhy::disconnect occurs first. + * * A call to USBPhy::endpoint_write results in the call of USBPhyEvents::in + * when the pc reads the data unless a power loss, reset, or a call to + * USBPhy::endpoint_abort occurs first. + * * A call to USBPhy::endpoint_read results in the call of USBPhyEvents::out + * when the pc sends data unless a power loss, reset, or a call to + * USBPhy::endpoint_abort occurs first. + * * Endpoint 0 naks all transactions aside from setup packets until + * higher-level code calls one of USBPhy::ep0_read, USBPhy::ep0_write or + * USBPhy::ep0_stall. + * * Endpoint 0 stall automatically clears on reception of a setup packet. * * # Undefined behavior - * * Calling USBPhy::endpoint_add or USBPhy::endpoint_remove outside of the control requests SetInterface or SetConfiguration - * * Devices behavior is undefined if latency is greater than 2ms when address is being set - see USB spec 9.2.6.3 - * * Devices behavior is undefined if latency is greater than 10ms when a reset occurs - see USB spec 7.1.7.5 - * * Calling any of the USBPhy::endpoint_* functions on endpoint 0 + * * Calling USBPhy::endpoint_add or USBPhy::endpoint_remove outside of the + * control requests SetInterface or SetConfiguration. + * * Calling USBPhy::endpoint_remove on an endpoint that has an ongoing read + * or write operation. To avoid undefined behavior, you must abort ongoing + * operations with USBPhy::endpoint_abort. + * * Devices behavior is undefined if latency is greater than 2ms when address + * is being set - see USB spec 9.2.6.3. + * * Devices behavior is undefined if latency is greater than 10ms when a + * reset occurs - see USB spec 7.1.7.5. + * * Calling any of the USBPhy::endpoint_* functions on endpoint 0. * * # Notes - * * Make sure USB packets are processed in the correct order when multiple packets are present. - * Typically IN endpoints should be handled before OUT endpoints if both are pending. - * * Setup packets may be resent if there is noise on the USB line. The USBPhy should be able - * to gracefully handle this scenario and respond to the setup packet with an ACK. - * * Bi-directional protocols making use of alternating IN and OUT phases should not rely - * on the last ACK an IN transfer to indicate that the OUT phase should start. Instead, - * the OUT phase should be started at the same time the last IN transfer is started. This - * is because the ACK to the last in transfer may be dropped if there is noise on the USB - * line. If dropped it will only get re-sent on the next IN phase. More info on this can be - * found in section 8.5.3.3 of the USB spec. + * * Make sure USBPhy sends USBPhyEvents in the correct order when multiple + * packets are present. USBPhy must send IN endpoint events before OUT + * endpoint events if both are pending. + * * A host PC may resend setup packets to a USB device if there is noise on + * the USB line. The USBPhy should be able to handle this scenario and + * respond to the setup packet with an ACK. + * * Bidirectional protocols making use of alternating IN and OUT phases + * should not rely on the last ACK an IN transfer to indicate that the + * OUT phase should start. Instead, the OUT phase should be started at + * the same time the last IN transfer is started. This is because the ACK + * to the last in transfer may be dropped if there is noise on the USB + * line. If dropped, it will only be resent on the next IN phase. You can + * find more information on this in section 8.5.3.3 of the USB + * specification. * * @ingroup usb_device_core */ From 537a67b9319baf209487d667ff14ca01158ffad1 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 2 Mar 2018 17:13:11 -0600 Subject: [PATCH 026/488] Add USB utility classes Add an allocation free linked list implementation. Additionally add the class AsyncOp which provides blocking and wakeup funcionality to simplify making asynchronous operations block. --- usb/device/utilities/AsyncOp.cpp | 84 +++++++++++++++++++++++++ usb/device/utilities/AsyncOp.h | 62 ++++++++++++++++++ usb/device/utilities/LinkEntry.h | 35 +++++++++++ usb/device/utilities/LinkedList.h | 60 ++++++++++++++++++ usb/device/utilities/LinkedListBase.cpp | 84 +++++++++++++++++++++++++ usb/device/utilities/LinkedListBase.h | 60 ++++++++++++++++++ 6 files changed, 385 insertions(+) create mode 100644 usb/device/utilities/AsyncOp.cpp create mode 100644 usb/device/utilities/AsyncOp.h create mode 100644 usb/device/utilities/LinkEntry.h create mode 100644 usb/device/utilities/LinkedList.h create mode 100644 usb/device/utilities/LinkedListBase.cpp create mode 100644 usb/device/utilities/LinkedListBase.h diff --git a/usb/device/utilities/AsyncOp.cpp b/usb/device/utilities/AsyncOp.cpp new file mode 100644 index 00000000000..5f6939be2c9 --- /dev/null +++ b/usb/device/utilities/AsyncOp.cpp @@ -0,0 +1,84 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "AsyncOp.h" +#include "mbed_critical.h" + +using namespace rtos; + +AsyncOp::AsyncOp(Mutex *lock): _list(NULL), _signal(NULL), _signal_lock(lock) +{ + +} + +void AsyncOp::start(LinkedListBase *list) +{ + _lock(); + _list = list; + list->enqueue(this); + _unlock(); +} + +void AsyncOp::wait() +{ + if (_list == NULL) { + // Event either hasn't start or has already occurred + return; + } + + // Construct semaphore to wait on + Semaphore sem(0); + + // Atomically set the semaphore pointer and + // check for completion + _lock(); + bool done = _list == NULL; + _signal = &sem; + _unlock(); + + if (!done) { + sem.wait(); + } +} + +void AsyncOp::complete() +{ + _lock(); + _list->remove(this); + _list = NULL; + if (_signal != NULL) { + _signal->release(); + } + _unlock(); +} + +void AsyncOp::_lock() +{ + if (_signal_lock) { + _signal_lock->lock(); + } else { + core_util_critical_section_enter(); + } +} + +void AsyncOp::_unlock() +{ + if (_signal_lock) { + _signal_lock->unlock(); + } else { + core_util_critical_section_exit(); + } +} diff --git a/usb/device/utilities/AsyncOp.h b/usb/device/utilities/AsyncOp.h new file mode 100644 index 00000000000..be28c28cde1 --- /dev/null +++ b/usb/device/utilities/AsyncOp.h @@ -0,0 +1,62 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_ASYNC_OP_H +#define MBED_ASYNC_OP_H + +#include "Mutex.h" +#include "Semaphore.h" + +#include "LinkEntry.h" +#include "LinkedListBase.h" + +class AsyncOp: public LinkEntry { +public: + /** + * Construct a new AsyncOp object + * + * @param lock Mutex used to serialize the object or code calling complete + * or NULL if a critical section is used + */ + AsyncOp(rtos::Mutex *lock); + + /** + * Add this operation to the linked list to start it + */ + void start(LinkedListBase *list); + + /** + * Wait for this asynchronous operation to complete + */ + void wait(); + + /** + * Mark this asynchronous operation as complete + * + * This wake the thread calling wait() + */ + void complete(); + +private: + void _lock(); + void _unlock(); + + LinkedListBase *_list; + rtos::Semaphore *_signal; + rtos::Mutex *const _signal_lock; +}; + +#endif diff --git a/usb/device/utilities/LinkEntry.h b/usb/device/utilities/LinkEntry.h new file mode 100644 index 00000000000..c74a7c4b76d --- /dev/null +++ b/usb/device/utilities/LinkEntry.h @@ -0,0 +1,35 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_LINKED_ENTRY_H +#define MBED_LINKED_ENTRY_H + +#include + +class LinkEntry { +public: + LinkEntry(): _next(NULL) + { + + } + +private: + friend class LinkedListBase; + LinkEntry *_next; +}; + + +#endif diff --git a/usb/device/utilities/LinkedList.h b/usb/device/utilities/LinkedList.h new file mode 100644 index 00000000000..41a6f35d7ee --- /dev/null +++ b/usb/device/utilities/LinkedList.h @@ -0,0 +1,60 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_LINKED_LIST_H +#define MBED_LINKED_LIST_H + +#include "LinkEntry.h" +#include "LinkedListBase.h" + +template +class LinkedList: public LinkedListBase { +public: + LinkedList() {} + ~LinkedList() {} + + /** + * Return the element at the head of the list + * + * @return The element at the head of the list or NULL if the list is empty + */ + T *head() + { + return static_cast(LinkedListBase::head()); + } + + /** + * Add an element to the tail of the list + * + * @param entry New element to add + */ + void enqueue(T *entry) + { + LinkedListBase::enqueue(static_cast(entry)); + } + + /** + * Remove the element at the head of the list + * + * @return The element at the head of the list or NULL if the list is empty + */ + T *dequeue() + { + return static_cast(LinkedListBase::dequeue()); + } +}; + +#endif diff --git a/usb/device/utilities/LinkedListBase.cpp b/usb/device/utilities/LinkedListBase.cpp new file mode 100644 index 00000000000..f66a27aaed7 --- /dev/null +++ b/usb/device/utilities/LinkedListBase.cpp @@ -0,0 +1,84 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "LinkedList.h" +#include "LinkEntry.h" +#include "mbed_assert.h" + +LinkedListBase::LinkedListBase(): _head(0), _tail(0) +{ + +} + +LinkedListBase::~LinkedListBase() +{ + +} + +LinkEntry *LinkedListBase::head() +{ + return _head; +} + +void LinkedListBase::enqueue(LinkEntry *entry) +{ + entry->_next = NULL; + if (_tail == NULL) { + _head = entry; + } else { + _tail->_next = entry; + } + _tail = entry; +} + +LinkEntry *LinkedListBase::dequeue() +{ + if (_head == NULL) { + return NULL; + } + if (_head->_next == NULL) { + _tail = NULL; + } + LinkEntry *entry = _head; + _head = _head->_next; + entry->_next = NULL; + return entry; +} + +void LinkedListBase::remove(LinkEntry *entry) +{ + LinkEntry *prev = NULL; + LinkEntry *cur = _head; + while (cur != entry) { + if (cur == NULL) { + // Element is not in the list + return; + } + prev = cur; + cur = cur->_next; + } + + if (prev != NULL) { + prev->_next = entry->_next; + } + if (entry == _head) { + _head = entry->_next; + } + if (entry == _tail) { + _tail = prev; + } + entry->_next = NULL; +} diff --git a/usb/device/utilities/LinkedListBase.h b/usb/device/utilities/LinkedListBase.h new file mode 100644 index 00000000000..c778f45bd6c --- /dev/null +++ b/usb/device/utilities/LinkedListBase.h @@ -0,0 +1,60 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_LINKED_LIST_BASE_H +#define MBED_LINKED_LIST_BASE_H + +#include "LinkEntry.h" + +class LinkedListBase { +public: + LinkedListBase(); + ~LinkedListBase(); + + /** + * Return the element at the head of the list + * + * @return The element at the head of the list or NULL if the list is empty + */ + LinkEntry *head(); + + /** + * Add an element to the tail of the list + * + * @param entry New element to add + */ + void enqueue(LinkEntry *entry); + + /** + * Remove the element at the head of the list + * + * @return The element at the head of the list or NULL if the list is empty + */ + LinkEntry *dequeue(); + + /** + * Remove the specified element if it is in the list + * + * @param entry Element to remove from the list + */ + void remove(LinkEntry *entry); + +private: + LinkEntry *_head; + LinkEntry *_tail; +}; + +#endif From 440ff2134dc081c8b907a788a95a2e8e684225e1 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 16 Mar 2018 23:50:03 -0500 Subject: [PATCH 027/488] Update USBCDC and USBSerial Update the USBCDC and USBSerial classes to the new API. This patch also updates the blocking behavior to unblock at the appropriate times and to let the processor sleep when blocking rather than busy waiting. --- usb/device/USBSerial/USBCDC.cpp | 641 +++++++++++++++++++++++++++++ usb/device/USBSerial/USBCDC.h | 203 +++++++++ usb/device/USBSerial/USBSerial.cpp | 61 +++ usb/device/USBSerial/USBSerial.h | 205 +++++++++ 4 files changed, 1110 insertions(+) create mode 100644 usb/device/USBSerial/USBCDC.cpp create mode 100644 usb/device/USBSerial/USBCDC.h create mode 100644 usb/device/USBSerial/USBSerial.cpp create mode 100644 usb/device/USBSerial/USBSerial.h diff --git a/usb/device/USBSerial/USBCDC.cpp b/usb/device/USBSerial/USBCDC.cpp new file mode 100644 index 00000000000..519ebe72182 --- /dev/null +++ b/usb/device/USBSerial/USBCDC.cpp @@ -0,0 +1,641 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBCDC.h" +#include "EndpointResolver.h" +#include "AsyncOp.h" + +static const uint8_t cdc_line_coding_default[7] = {0x80, 0x25, 0x00, 0x00, 0x00, 0x00, 0x08}; + +#define DEFAULT_CONFIGURATION (1) + +#define CDC_SET_LINE_CODING 0x20 +#define CDC_GET_LINE_CODING 0x21 +#define CDC_SET_CONTROL_LINE_STATE 0x22 + +// Control Line State bits +#define CLS_DTR (1 << 0) +#define CLS_RTS (1 << 1) + +#define CDC_MAX_PACKET_SIZE 64 + +class USBCDC::AsyncWrite: public AsyncOp { +public: + AsyncWrite(uint8_t *buf, uint32_t size): AsyncOp(NULL), tx_buf(buf), tx_size(size), result(false) + { + + } + uint8_t *tx_buf; + uint32_t tx_size; + bool result; +}; + +class USBCDC::AsyncRead: public AsyncOp { +public: + AsyncRead(uint8_t *buf, uint32_t size, uint32_t *size_read, bool read_all) + : AsyncOp(NULL), rx_buf(buf), rx_size(size), rx_actual(size_read), all(read_all), result(false) + { + + } + uint8_t *rx_buf; + uint32_t rx_size; + uint32_t *rx_actual; + bool all; + bool result; +}; + +USBCDC::USBCDC(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking) + : USBDevice(vendor_id, product_id, product_release) + +{ + _init(connect_blocking); +} + +USBCDC::USBCDC(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking) + : USBDevice(phy, vendor_id, product_id, product_release) +{ + _init(connect_blocking); +} + +void USBCDC::_init(bool connect_blocking) +{ + memcpy(_cdc_line_coding, cdc_line_coding_default, sizeof(_cdc_line_coding)); + + EndpointResolver resolver(endpoint_table()); + resolver.endpoint_ctrl(CDC_MAX_PACKET_SIZE); + _bulk_in = resolver.endpoint_in(USB_EP_TYPE_BULK, CDC_MAX_PACKET_SIZE); + _bulk_out = resolver.endpoint_out(USB_EP_TYPE_BULK, CDC_MAX_PACKET_SIZE); + _int_in = resolver.endpoint_in(USB_EP_TYPE_INT, CDC_MAX_PACKET_SIZE); + MBED_ASSERT(resolver.valid()); + + _terminal_connected = false; + + _tx_in_progress = false; + _tx_buf = _tx_buffer; + _tx_size = 0; + + _rx_in_progress = false; + _rx_buf = _rx_buffer; + _rx_size = 0; + + init(); + + USBDevice::connect(false); + if (connect_blocking) { + wait_connected(); + } +} + +void USBCDC::callback_reset() +{ + assert_locked(); + /* Called in ISR context */ + + _change_terminal_connected(false); +}; + +void USBCDC::callback_state_change(DeviceState new_state) +{ + assert_locked(); + /* Called in ISR context */ + + if (new_state != Configured) { + _change_terminal_connected(false); + } +} + +void USBCDC::callback_request(const setup_packet_t *setup) +{ + assert_locked(); + /* Called in ISR context */ + + RequestResult result = PassThrough; + uint8_t *data = NULL; + uint32_t size = 0; + + /* Only process class-specific requests */ + if (setup->bmRequestType.Type == CLASS_TYPE) { + switch (setup->bRequest) { + case CDC_GET_LINE_CODING: + result = Send; + data = _cdc_line_coding; + size = 7; + break; + case CDC_SET_LINE_CODING: + result = Receive; + data = _cdc_new_line_coding; + size = 7; + break; + case CDC_SET_CONTROL_LINE_STATE: + if (setup->wValue & CLS_DTR) { + _change_terminal_connected(true); + } else { + _change_terminal_connected(false); + } + result = Success; + break; + default: + result = Failure; + break; + } + } + complete_request(result, data, size); +} + + +void USBCDC::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) +{ + assert_locked(); + /* Called in ISR context */ + + if (aborted) { + complete_request_xfer_done(false); + return; + } + + bool success = false; + + /* Process class-specific requests */ + if (setup->bmRequestType.Type == CLASS_TYPE) { + if ((setup->bRequest == CDC_SET_LINE_CODING) && (setup->wLength == 7)) { + if (memcmp(_cdc_line_coding, _cdc_new_line_coding, 7)) { + memcpy(_cdc_line_coding, _cdc_new_line_coding, 7); + + const uint8_t *buf = _cdc_line_coding; + int baud = buf[0] + (buf[1] << 8) + + (buf[2] << 16) + (buf[3] << 24); + int stop = buf[4]; + int bits = buf[6]; + int parity = buf[5]; + + line_coding_changed(baud, bits, parity, stop); + } + success = true; + } + if (setup->bRequest == CDC_GET_LINE_CODING) { + success = true; + } + } + + complete_request_xfer_done(success); +} + +void USBCDC::callback_set_configuration(uint8_t configuration) +{ + assert_locked(); + /* Called in ISR context */ + + bool ret = false; + if (configuration == DEFAULT_CONFIGURATION) { + // Configure endpoints > 0 + endpoint_add(_int_in, CDC_MAX_PACKET_SIZE, USB_EP_TYPE_INT); + endpoint_add(_bulk_in, CDC_MAX_PACKET_SIZE, USB_EP_TYPE_BULK, &USBCDC::_send_isr); + endpoint_add(_bulk_out, CDC_MAX_PACKET_SIZE, USB_EP_TYPE_BULK, &USBCDC::_receive_isr); + + read_start(_bulk_out, _rx_buf, sizeof(_rx_buffer)); + _rx_in_progress = true; + + ret = true; + } + + complete_set_configuration(ret); +} + +void USBCDC::callback_set_interface(uint16_t interface, uint8_t alternate) +{ + assert_locked(); + complete_set_interface(true); +} + +void USBCDC::_change_terminal_connected(bool connected) +{ + assert_locked(); + + if (connected) { + _connect_wake_all(); + } else { + _send_abort_all(); + _receive_abort_all(); + } + _terminal_connected = connected; +} + +void USBCDC::wait_connected() +{ + lock(); + + AsyncOp wait_op(NULL); + wait_op.start(&_connected_list); + if (_terminal_connected) { + wait_op.complete(); + } + + unlock(); + + wait_op.wait(); +} + +void USBCDC::_connect_wake_all() +{ + AsyncOp *wait_op = _connected_list.head(); + while (wait_op != NULL) { + wait_op->complete(); + wait_op = _connected_list.head(); + } +} + +bool USBCDC::send(uint8_t *buffer, uint32_t size) +{ + lock(); + + if (!_terminal_connected) { + unlock(); + return false; + } + AsyncWrite write_op(buffer, size); + write_op.start(&_tx_list); + _send_next(); + + unlock(); + + write_op.wait(); + return write_op.result; +} + +void USBCDC::_send_next() +{ + assert_locked(); + + uint32_t actual_size; + do { + // Set current TX operation or return if there are none left + AsyncWrite *tx_cur = _tx_list.head(); + if (tx_cur == NULL) { + break; + } + + actual_size = 0; + send_nb(tx_cur->tx_buf, tx_cur->tx_size, &actual_size, false); + tx_cur->tx_size -= actual_size; + tx_cur->tx_buf += actual_size; + if (tx_cur->tx_size == 0) { + tx_cur->result = true; + tx_cur->complete(); + } + } while (actual_size > 0); + + // Start transfer if it hasn't been + _send_isr_start(); +} + +void USBCDC::_send_abort_all() +{ + assert_locked(); + + if (_tx_in_progress) { + endpoint_abort(_bulk_in); + _tx_in_progress = false; + } + _tx_buf = _tx_buffer; + _tx_size = 0; + + AsyncWrite *tx_cur = _tx_list.head(); + while (tx_cur != NULL) { + tx_cur->result = false; + tx_cur->complete(); + tx_cur = _tx_list.head(); + } +} + +void USBCDC::send_nb(uint8_t *buffer, uint32_t size, uint32_t *actual, bool now) +{ + lock(); + + *actual = 0; + if (_terminal_connected && !_tx_in_progress) { + uint32_t free = sizeof(_tx_buffer) - _tx_size; + uint32_t write_size = free > size ? size : free; + if (size > 0) { + memcpy(_tx_buf, buffer, write_size); + } + _tx_size += write_size; + *actual = write_size; + if (now) { + _send_isr_start(); + } + } + + unlock(); +} + + +void USBCDC::_send_isr_start() +{ + assert_locked(); + + if (!_tx_in_progress && _tx_size) { + if (USBDevice::write_start(_bulk_in, _tx_buffer, _tx_size)) { + _tx_in_progress = true; + } + } +} + +/* +* Called by when CDC data is sent +* Warning: Called in ISR +*/ +void USBCDC::_send_isr(usb_ep_t endpoint) +{ + assert_locked(); + + write_finish(endpoint); + _tx_buf = _tx_buffer; + _tx_size = 0; + _tx_in_progress = false; + + _send_next(); + if (!_tx_in_progress) { + data_tx(); + } +} + +bool USBCDC::receive(uint8_t *buffer, uint32_t size, uint32_t *size_read) +{ + lock(); + + if (!_terminal_connected) { + unlock(); + return false; + } + bool read_all = size_read == NULL; + uint32_t size_read_dummy; + uint32_t *size_read_ptr = read_all ? &size_read_dummy : size_read; + *size_read_ptr = 0; + AsyncRead read_op(buffer, size, size_read_ptr, read_all); + read_op.start(&_rx_list); + _receive_next(); + + unlock(); + + read_op.wait(); + return read_op.result; +} + +void USBCDC::_receive_next() +{ + assert_locked(); + + uint32_t actual_size; + do { + // Set current RX operation or return if there are none left + AsyncRead *rx_cur = _rx_list.head(); + if (rx_cur == NULL) { + break; + } + + actual_size = 0; + receive_nb(rx_cur->rx_buf, rx_cur->rx_size, &actual_size); + rx_cur->rx_buf += actual_size; + *rx_cur->rx_actual += actual_size; + rx_cur->rx_size -= actual_size; + if ((!rx_cur->all && *rx_cur->rx_actual > 0) || (rx_cur->rx_size == 0)) { + // Wake thread if request is done + rx_cur->result = true; + rx_cur->complete(); + rx_cur = NULL; + } + } while (actual_size > 0); + + _receive_isr_start(); + +} + +void USBCDC::_receive_abort_all() +{ + assert_locked(); + + if (_rx_in_progress) { + endpoint_abort(_bulk_in); + _rx_in_progress = false; + } + _rx_buf = _rx_buffer; + _rx_size = 0; + + AsyncRead *rx_cur = _rx_list.head(); + while (rx_cur != NULL) { + rx_cur->result = false; + rx_cur->complete(); + rx_cur = _rx_list.head(); + } +} + +void USBCDC::receive_nb(uint8_t *buffer, uint32_t size, uint32_t *size_read) +{ + + *size_read = 0; + if (_terminal_connected && !_rx_in_progress) { + // Copy data over + uint32_t copy_size = _rx_size > size ? size : _rx_size; + memcpy(buffer, _rx_buf, copy_size); + *size_read = copy_size; + _rx_buf += copy_size; + _rx_size -= copy_size; + if (_rx_size == 0) { + _receive_isr_start(); + } + } +} + +void USBCDC::_receive_isr_start() +{ + if ((_rx_size == 0) && !_rx_in_progress) { + // Refill the buffer + read_start(_bulk_out, _rx_buffer, sizeof(_rx_buffer)); + _rx_in_progress = true; + } +} + +/* +* Called by when CDC data is received +* Warning: Called in ISR +*/ +void USBCDC::_receive_isr(usb_ep_t endpoint) +{ + assert_locked(); + + MBED_ASSERT(_rx_size == 0); + _rx_buf = _rx_buffer; + _rx_size = read_finish(_bulk_out); + _rx_in_progress = false; + _receive_next(); + if (!_rx_in_progress) { + data_rx(); + } + +} + +const uint8_t *USBCDC::device_desc() +{ + uint8_t ep0_size = endpoint_max_packet_size(0x00); + uint8_t device_descriptor_temp[] = { + 18, // bLength + 1, // bDescriptorType + 0x10, 0x01, // bcdUSB + 2, // bDeviceClass + 0, // bDeviceSubClass + 0, // bDeviceProtocol + ep0_size, // bMaxPacketSize0 + (uint8_t)(LSB(vendor_id)), (uint8_t)(MSB(vendor_id)), // idVendor + (uint8_t)(LSB(product_id)), (uint8_t)(MSB(product_id)),// idProduct + 0x00, 0x01, // bcdDevice + 1, // iManufacturer + 2, // iProduct + 3, // iSerialNumber + 1 // bNumConfigurations + }; + MBED_ASSERT(sizeof(device_descriptor_temp) == sizeof(device_descriptor)); + memcpy(device_descriptor, device_descriptor_temp, sizeof(device_descriptor)); + return device_descriptor; +} + +const uint8_t *USBCDC::string_iinterface_desc() +{ + static const uint8_t stringIinterfaceDescriptor[] = { + 0x08, + STRING_DESCRIPTOR, + 'C', 0, 'D', 0, 'C', 0, + }; + return stringIinterfaceDescriptor; +} + +const uint8_t *USBCDC::string_iproduct_desc() +{ + static const uint8_t stringIproductDescriptor[] = { + 0x16, + STRING_DESCRIPTOR, + 'C', 0, 'D', 0, 'C', 0, ' ', 0, 'D', 0, 'E', 0, 'V', 0, 'I', 0, 'C', 0, 'E', 0 + }; + return stringIproductDescriptor; +} + + +#define CONFIG1_DESC_SIZE (9+8+9+5+5+4+5+7+9+7+7) + +const uint8_t *USBCDC::configuration_desc() +{ + uint8_t config_descriptor_temp[] = { + // configuration descriptor + 9, // bLength + 2, // bDescriptorType + LSB(CONFIG1_DESC_SIZE), // wTotalLength + MSB(CONFIG1_DESC_SIZE), + 2, // bNumInterfaces + 1, // bConfigurationValue + 0, // iConfiguration + 0x80, // bmAttributes + 50, // bMaxPower + + // IAD to associate the two CDC interfaces + 0x08, // bLength + 0x0b, // bDescriptorType + 0x00, // bFirstInterface + 0x02, // bInterfaceCount + 0x02, // bFunctionClass + 0x02, // bFunctionSubClass + 0, // bFunctionProtocol + 0, // iFunction + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + 9, // bLength + 4, // bDescriptorType + 0, // bInterfaceNumber + 0, // bAlternateSetting + 1, // bNumEndpoints + 0x02, // bInterfaceClass + 0x02, // bInterfaceSubClass + 0x01, // bInterfaceProtocol + 0, // iInterface + + // CDC Header Functional Descriptor, CDC Spec 5.2.3.1, Table 26 + 5, // bFunctionLength + 0x24, // bDescriptorType + 0x00, // bDescriptorSubtype + 0x10, 0x01, // bcdCDC + + // Call Management Functional Descriptor, CDC Spec 5.2.3.2, Table 27 + 5, // bFunctionLength + 0x24, // bDescriptorType + 0x01, // bDescriptorSubtype + 0x03, // bmCapabilities + 1, // bDataInterface + + // Abstract Control Management Functional Descriptor, CDC Spec 5.2.3.3, Table 28 + 4, // bFunctionLength + 0x24, // bDescriptorType + 0x02, // bDescriptorSubtype + 0x06, // bmCapabilities + + // Union Functional Descriptor, CDC Spec 5.2.3.8, Table 33 + 5, // bFunctionLength + 0x24, // bDescriptorType + 0x06, // bDescriptorSubtype + 0, // bMasterInterface + 1, // bSlaveInterface0 + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _int_in, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=intr) + LSB(CDC_MAX_PACKET_SIZE), // wMaxPacketSize (LSB) + MSB(CDC_MAX_PACKET_SIZE), // wMaxPacketSize (MSB) + 16, // bInterval + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + 9, // bLength + 4, // bDescriptorType + 1, // bInterfaceNumber + 0, // bAlternateSetting + 2, // bNumEndpoints + 0x0A, // bInterfaceClass + 0x00, // bInterfaceSubClass + 0x00, // bInterfaceProtocol + 0, // iInterface + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _bulk_in, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(CDC_MAX_PACKET_SIZE), // wMaxPacketSize (LSB) + MSB(CDC_MAX_PACKET_SIZE), // wMaxPacketSize (MSB) + 0, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _bulk_out, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(CDC_MAX_PACKET_SIZE), // wMaxPacketSize (LSB) + MSB(CDC_MAX_PACKET_SIZE), // wMaxPacketSize (MSB) + 0 // bInterval + }; + + MBED_ASSERT(sizeof(config_descriptor_temp) == sizeof(_config_descriptor)); + memcpy(_config_descriptor, config_descriptor_temp, sizeof(_config_descriptor)); + return _config_descriptor; +} diff --git a/usb/device/USBSerial/USBCDC.h b/usb/device/USBSerial/USBCDC.h new file mode 100644 index 00000000000..1c3c6dc3816 --- /dev/null +++ b/usb/device/USBSerial/USBCDC.h @@ -0,0 +1,203 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBCDC_H +#define USBCDC_H + +/* These headers are included for child class. */ +#include "USBDescriptor.h" +#include "USBDevice_Types.h" + +#include "USBDevice.h" +#include "LinkedList.h" + +class AsyncOp; + +class USBCDC: public USBDevice { +public: + + /* + * Constructor + * + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your preoduct_release + * @param connect_blocking define if the connection must be blocked if USB not plugged in + */ + USBCDC(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); + + /* + * Constructor + * + * @param phy USB phy to use + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your preoduct_release + * @param connect_blocking define if the connection must be blocked if USB not plugged in + */ + USBCDC(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); + + /** + * Block until the terminal is connected + */ + void wait_connected(); + + /* + * Send a buffer + * + * This function blocks until the full contents have been sent. + * + * @param buffer buffer to be sent + * @param size length of the buffer + * @returns true if successful false if interrupted due to a state change + */ + bool send(uint8_t *buffer, uint32_t size); + + /** + * Send what there is room for + * + * @param buffer data to send + * @param size maximum number of bytes to send + * @param actual a pointer to where to store the number of bytes sent + * @param now true to start data transmission, false to wait + */ + void send_nb(uint8_t *buffer, uint32_t size, uint32_t *actual, bool now = true); + + /* + * Read a buffer from a certain endpoint. Warning: blocking + * + * Blocks until at least one byte of data has been read (actual != NULL) or + * until the full size has been read (actual == NULL). + * + * @param buffer buffer where will be stored bytes + * @param size the maximum number of bytes to read + * @param actual A pointer to where to store the number of bytes actually read + * or NULL to read the full size + * @returns true if successful false if interrupted due to a state change + */ + bool receive(uint8_t *buffer, uint32_t size, uint32_t *actual=NULL); + + /** + * Read from the receive buffer + * + * @param buffer buffer to fill with data + * @param size maximum number of bytes read + * @param actual a pointer to where to store the number of bytes actually received + */ + void receive_nb(uint8_t *buffer, uint32_t size, uint32_t *actual); + +protected: + /* + * Get device descriptor. Warning: this method has to store the length of the report descriptor in reportLength. + * + * @returns pointer to the device descriptor + */ + virtual const uint8_t *device_desc(); + + /* + * Get string product descriptor + * + * @returns pointer to the string product descriptor + */ + virtual const uint8_t *string_iproduct_desc(); + + /* + * Get string interface descriptor + * + * @returns pointer to the string interface descriptor + */ + virtual const uint8_t *string_iinterface_desc(); + + /* + * Get configuration descriptor + * + * @returns pointer to the configuration descriptor + */ + virtual const uint8_t *configuration_desc(); + + /* + * Called by USBCallback_requestCompleted when CDC line coding is changed + * Warning: Called in ISR + * + * @param baud The baud rate + * @param bits The number of bits in a word (5-8) + * @param parity The parity + * @param stop The number of stop bits (1 or 2) + */ + virtual void line_coding_changed(int baud, int bits, int parity, int stop) {}; + + /* + * Called when there is data that can be read + */ + virtual void data_rx() {} + + /* + * Called when there is space in the TX buffer + */ + virtual void data_tx() {} + +protected: + + class AsyncWrite; + class AsyncRead; + + virtual void callback_reset(); + virtual void callback_state_change(DeviceState new_state); + virtual void callback_request(const setup_packet_t *setup); + virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); + virtual void callback_set_configuration(uint8_t configuration); + virtual void callback_set_interface(uint16_t interface, uint8_t alternate); + + void _init(bool connect_blocking); + + void _change_terminal_connected(bool connected); + void _connect_wake_all(); + + void _send_next(); + void _send_abort_all(); + void _send_isr_start(); + void _send_isr(usb_ep_t endpoint); + + void _receive_next(); + void _receive_abort_all(); + void _receive_isr_start(); + void _receive_isr(usb_ep_t endpoint); + + usb_ep_t _bulk_in; + usb_ep_t _bulk_out; + usb_ep_t _int_in; + + uint8_t _cdc_line_coding[7]; + uint8_t _cdc_new_line_coding[7]; + uint8_t _config_descriptor[75]; + + LinkedList _connected_list; + bool _terminal_connected; + + LinkedList _tx_list; + bool _tx_in_progress; + uint8_t _tx_buffer[64]; + uint8_t *_tx_buf; + uint32_t _tx_size; + + LinkedList _rx_list; + bool _rx_in_progress; + uint8_t _rx_buffer[64]; + uint8_t *_rx_buf; + uint32_t _rx_size; +}; + +#endif diff --git a/usb/device/USBSerial/USBSerial.cpp b/usb/device/USBSerial/USBSerial.cpp new file mode 100644 index 00000000000..376c8b8de24 --- /dev/null +++ b/usb/device/USBSerial/USBSerial.cpp @@ -0,0 +1,61 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBSerial.h" + +int USBSerial::_putc(int c) +{ + return send((uint8_t *)&c, 1) ? 1 : 0; +} + +int USBSerial::_getc() +{ + uint8_t c = 0; + if (receive(&c, sizeof(c))) { + return c; + } else { + return -1; + } +} + +void USBSerial::data_rx() +{ + assert_locked(); + + //call a potential handler + if (rx) { + rx.call(); + } +} + +uint8_t USBSerial::available() +{ + USBCDC::lock(); + + uint8_t size = 0; + if (!_rx_in_progress) { + size = _rx_size > 0xFF ? 0xFF : _rx_size; + } + + USBCDC::unlock(); + return size; +} + +bool USBSerial::connected() +{ + return _terminal_connected; +} diff --git a/usb/device/USBSerial/USBSerial.h b/usb/device/USBSerial/USBSerial.h new file mode 100644 index 00000000000..b3344b4a6e1 --- /dev/null +++ b/usb/device/USBSerial/USBSerial.h @@ -0,0 +1,205 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBSERIAL_H +#define USBSERIAL_H + +#include "USBCDC.h" +#include "Stream.h" +#include "Callback.h" + +/** +* USBSerial example +* +* @code +* #include "mbed.h" +* #include "USBSerial.h" +* +* //Virtual serial port over USB +* USBSerial serial; +* +* int main(void) { +* +* while(1) +* { +* serial.printf("I am a virtual serial port\n"); +* wait(1); +* } +* } +* @endcode +*/ +class USBSerial: public USBCDC, public Stream { +public: + + /** + * Constructor + * + * @param vendor_id Your vendor_id (default: 0x1f00) + * @param product_id Your product_id (default: 0x2012) + * @param product_release Your preoduct_release (default: 0x0001) + * @param connect_blocking define if the connection must be blocked if USB not plugged in + * + */ + USBSerial(uint16_t vendor_id = 0x1f00, uint16_t product_id = 0x2012, uint16_t product_release = 0x0001, bool connect_blocking = true): USBCDC(vendor_id, product_id, product_release, connect_blocking) + { + _settings_changed_callback = 0; + }; + + /** + * Constructor + * + * @param phy USB phy to use + * @param vendor_id Your vendor_id (default: 0x1f00) + * @param product_id Your product_id (default: 0x2012) + * @param product_release Your preoduct_release (default: 0x0001) + * @param connect_blocking define if the connection must be blocked if USB not plugged in + * + */ + USBSerial(USBPhy *phy, uint16_t vendor_id = 0x1f00, uint16_t product_id = 0x2012, uint16_t product_release = 0x0001, bool connect_blocking = true): USBCDC(phy, vendor_id, product_id, product_release, connect_blocking) + { + _settings_changed_callback = 0; + }; + + /** + * Send a character. You can use puts, printf. + * + * @param c character to be sent + * @returns true if there is no error, false otherwise + */ + virtual int _putc(int c); + + /** + * Read a character: blocking + * + * @returns character read + */ + virtual int _getc(); + + /** + * Check the number of bytes available. + * + * @returns the number of bytes available + */ + uint8_t available(); + + /** + * Check if the terminal is connected. + * + * @returns connection status + */ + bool connected(); + + /** Determine if there is a character available to read + * + * @returns + * 1 if there is a character available to read, + * 0 otherwise + */ + int readable() + { + return available() ? 1 : 0; + } + + /** Determine if there is space available to write a character + * + * @returns + * 1 if there is space to write a character, + * 0 otherwise + */ + int writeable() + { + return 1; // always return 1, for write operation is blocking + } + + /** + * Attach a member function to call when a packet is received. + * + * @param tptr pointer to the object to call the member function on + * @param mptr pointer to the member function to be called + */ + template + void attach(T *tptr, void (T::*mptr)(void)) + { + USBCDC::lock(); + + if ((mptr != NULL) && (tptr != NULL)) { + rx = Callback(mptr, tptr); + } + + USBCDC::unlock(); + } + + /** + * Attach a callback called when a packet is received + * + * @param fptr function pointer + */ + void attach(void (*fptr)(void)) + { + USBCDC::lock(); + + if (fptr != NULL) { + rx = Callback(fptr); + } + + USBCDC::unlock(); + } + + /** + * Attach a Callback called when a packet is received + * + * @param cb Callback to attach + */ + void attach(Callback &cb) + { + USBCDC::lock(); + + rx = cb; + + USBCDC::unlock(); + } + + /** + * Attach a callback to call when serial's settings are changed. + * + * @param fptr function pointer + */ + void attach(void (*fptr)(int baud, int bits, int parity, int stop)) + { + USBCDC::lock(); + + _settings_changed_callback = fptr; + + USBCDC::unlock(); + } + +protected: + virtual void data_rx(); + virtual void line_coding_changed(int baud, int bits, int parity, int stop) + { + assert_locked(); + + if (_settings_changed_callback) { + _settings_changed_callback(baud, bits, parity, stop); + } + } + +private: + Callback rx; + void (*_settings_changed_callback)(int baud, int bits, int parity, int stop); +}; + +#endif From fd8d07313cacc0fbc7b4eacd37935e9dbc1010d5 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 20 Mar 2018 10:29:27 -0500 Subject: [PATCH 028/488] Remove the USB directory from mbed 2 travis Don't include the USB directory when testing mbed 2 on travis. --- .travis.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.travis.yml b/.travis.yml index 66a04d825ec..8714d4a89d1 100644 --- a/.travis.yml +++ b/.travis.yml @@ -173,7 +173,7 @@ matrix: - python tools/make.py -t GCC_ARM -m K64F --source=. --build=BUILD/K64F/GCC_ARM -j0 # Check that example compiles without rtos - sed -n '/``` cpp/,/```/{/```$/Q;/```/d;p;}' $EVENTS/README.md > main.cpp - - rm -r rtos features/cellular features/netsocket features/nanostack features/lwipstack features/frameworks/greentea-client features/frameworks/utest features/frameworks/unity components BUILD + - rm -r rtos usb features/cellular features/netsocket features/nanostack features/lwipstack features/frameworks/greentea-client features/frameworks/utest features/frameworks/unity components BUILD - python tools/make.py -t GCC_ARM -m DISCO_F401VC --source=. --build=BUILD/DISCO_F401VC/GCC_ARM -j0 # Run local equeue tests - make -C $EVENTS/equeue test From 68e61f98883cba331a3e9385ebb3470c7f5e6a34 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 19 Mar 2018 17:07:42 -0500 Subject: [PATCH 029/488] Fix Kinetis endpoint initialization Fully setup endpoint before enabling it in endpoint_add. This prevents undefined behavior due to previous configuration. --- targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp index 3c98280a2c2..55599a922e7 100644 --- a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp +++ b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp @@ -366,15 +366,14 @@ bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_ // IN endpt -> device to host (TX) if (DESC_EP_IN(endpoint)) { - USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) - USB_ENDPT_EPTXEN_MASK; // en TX (IN) tran bdt[EP_BDT_IDX(log_endpoint, TX, ODD )].address = (uint32_t) buf; + bdt[EP_BDT_IDX(log_endpoint, TX, ODD )].info = 0; bdt[EP_BDT_IDX(log_endpoint, TX, EVEN)].address = 0; + USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) + USB_ENDPT_EPTXEN_MASK; // en TX (IN) tran } // OUT endpt -> host to device (RX) else { - USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) - USB_ENDPT_EPRXEN_MASK; // en RX (OUT) tran. bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].byte_count = max_packet; bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].address = (uint32_t) buf; bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info = BD_DTS_MASK; @@ -383,6 +382,8 @@ bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_ // Prepare for setup packet bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info |= BD_OWN_MASK; } + USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) + USB_ENDPT_EPRXEN_MASK; // en RX (OUT) tran. } // First transfer will be a DATA0 packet From 34ebc7968e13a653b4a9094be1369d736fe65216 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 20 Mar 2018 14:46:55 -0500 Subject: [PATCH 030/488] Correct Kinetis 256 byte ctrl transfers Correctly handle control transfers which are a multiple of 256 bytes by checking for a non-zero value in the upper byte of size. --- targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp index 55599a922e7..60ad7d7f1f2 100644 --- a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp +++ b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp @@ -483,7 +483,7 @@ bool USBPhyHw::endpoint_read_result_core(usb_ep_t endpoint, uint8_t *data, uint3 if (setup) { // Record the setup type - if (data[6] == 0) { + if ((data[6] == 0) && (data[7] == 0)) { ctrl_xfer = CTRL_XFER_NONE; } else { uint8_t in_xfer = (data[0] >> 7) & 1; From 1ec8541cfac9510e66e6ba5d86a93404dd4d9f99 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 20 Mar 2018 14:48:16 -0500 Subject: [PATCH 031/488] Limit USB control transfer size Limit the size of control reads to the max packet size of endpoint zero. This fixes the handling of large transfers. --- usb/device/USBDevice/USBDevice.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index da3617cedd4..611f91b1e1a 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -49,6 +49,8 @@ #endif #define MAX_PACKET_SIZE_EP0 64 +#define USB_MIN(a, b) ((a) > (b) ? (b) : (a)) + bool USBDevice::_request_get_descriptor() { @@ -224,7 +226,7 @@ bool USBDevice::_control_out() complete_request_xfer_done(true); } } else { - _phy->ep0_read(_transfer.ptr, _transfer.remaining); + _phy->ep0_read(_transfer.ptr, USB_MIN(_transfer.remaining, _max_packet_size_ep0)); } return true; @@ -800,7 +802,7 @@ void USBDevice::_control_setup_continue() } else { /* OUT stage */ _transfer.stage = DataOut; - _phy->ep0_read(_transfer.ptr, _transfer.remaining); + _phy->ep0_read(_transfer.ptr, USB_MIN(_transfer.remaining, _max_packet_size_ep0)); } } else { /* Status stage */ From 1346b029f835b3d7a0790ce241d482788ce0a27b Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 20 Mar 2018 16:39:12 -0500 Subject: [PATCH 032/488] Disable endpoints when disconnecting on Kinetis Even thought the USB phy is disabled during disconnect, endpoints still nack packets sent. This patch disables all endpoints so after disconnect no USB traffic will be sent. This allows brief disconnects of ~200us (or more) to be reliably detected by the host PC. --- targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp index 60ad7d7f1f2..84c50d94b6c 100644 --- a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp +++ b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp @@ -195,6 +195,10 @@ void USBPhyHw::connect() void USBPhyHw::disconnect() { + // disable all endpoints to prevent them from nacking when disconnected + for(int i = 0; i < 16; i++) { + USB0->ENDPOINT[i].ENDPT = 0x00; + } // disable USB USB0->CTL &= ~USB_CTL_USBENSOFEN_MASK; // Pull up disable From 4e5fd0ab11e5dc984838ec5230d847c60d9545ab Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 20 Mar 2018 20:49:59 -0500 Subject: [PATCH 033/488] Improve LPC1768 USB stability Make the following changes to improve stability: -When disconnecting set address to disabled to prevent nacks -Clear EP_SLOW one and only once for every interrupt where it is set_address -Disable and clear control endpoint interrupts when disconnecting --- .../TARGET_LPC176X/usb/USBHAL_LPC17.cpp | 31 +++++++++++++------ 1 file changed, 22 insertions(+), 9 deletions(-) diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp index ef3a66ea831..d962235961a 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp +++ b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp @@ -161,11 +161,11 @@ static uint8_t SIEgetDeviceStatus(void) return SIEReadData(SIE_CMD_GET_DEVICE_STATUS); } -void SIEsetAddress(uint8_t address) +void SIEsetAddress(uint8_t address, bool enable=true) { // Write SIE device address register SIECommand(SIE_CMD_SET_ADDRESS); - SIEWriteData((address & 0x7f) | SIE_DSA_DEV_EN); + SIEWriteData((address & 0x7f) | (enable ? SIE_DSA_DEV_EN : 0)); } static uint8_t SIEselectEndpoint(uint8_t endpoint) @@ -402,8 +402,8 @@ void USBPhyHw::init(USBPhyEvents *events) // Enable interrupts for device events and EP0 LPC_USB->USBDevIntEn = EP_SLOW | DEV_STAT | FRAME; - enableEndpointEvent(EP0IN); - enableEndpointEvent(EP0OUT); + + NVIC_EnableIRQ(USB_IRQn); } void USBPhyHw::deinit() @@ -422,14 +422,28 @@ bool USBPhyHw::powered() void USBPhyHw::connect(void) { - NVIC_EnableIRQ(USB_IRQn); + enableEndpointEvent(EP0IN); + enableEndpointEvent(EP0OUT); + // Connect USB device SIEconnect(); } void USBPhyHw::disconnect(void) { - NVIC_DisableIRQ(USB_IRQn); + disableEndpointEvent(EP0IN); + disableEndpointEvent(EP0OUT); + + if (LPC_USB->USBEpIntSt & EP(EP0IN)) { + selectEndpointClearInterrupt(EP0IN); + } + if (LPC_USB->USBEpIntSt & EP(EP0OUT)) { + selectEndpointClearInterrupt(EP0OUT); + } + + // Turn off USB nacking + SIEsetAddress(0, false); + // Disconnect USB device SIEdisconnect(); } @@ -696,7 +710,6 @@ void USBPhyHw::process(void) // case of OUT as SETUP clobbers the OUT data). if (LPC_USB->USBEpIntSt & EP(EP0IN)) { selectEndpointClearInterrupt(EP0IN); - LPC_USB->USBDevIntClr = EP_SLOW; events->ep0_in(); } @@ -708,7 +721,6 @@ void USBPhyHw::process(void) } else { events->ep0_out(); } - LPC_USB->USBDevIntClr = EP_SLOW; } //TODO - should probably process in the reverse order @@ -717,7 +729,6 @@ void USBPhyHw::process(void) if (LPC_USB->USBEpIntSt & EP(endpoint)) { selectEndpointClearInterrupt(endpoint); epComplete |= EP(endpoint); - LPC_USB->USBDevIntClr = EP_SLOW; if (IN_EP(endpoint)) { events->in(endpoint); } else { @@ -726,6 +737,8 @@ void USBPhyHw::process(void) } } } + + LPC_USB->USBDevIntClr = EP_SLOW; } NVIC_ClearPendingIRQ(USB_IRQn); From c86b25500467ba68b2df972ab900497a80263ebf Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Tue, 13 Mar 2018 16:18:20 +0100 Subject: [PATCH 034/488] USB generic tests --- TESTS/host_tests/pyusb_basic.py | 781 ++++++++++++++++++++++++++- TESTS/usb_device/basic/USBTester.cpp | 61 ++- TESTS/usb_device/basic/USBTester.h | 22 + TESTS/usb_device/basic/main.cpp | 250 ++++++++- 4 files changed, 1086 insertions(+), 28 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 24c7e951455..ae6c164a327 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -20,6 +20,7 @@ from argparse import ArgumentParser import time import sys +import inspect from threading import Thread import usb.core @@ -28,6 +29,11 @@ from usb.util import CTRL_TYPE_STANDARD, CTRL_TYPE_CLASS, CTRL_TYPE_VENDOR from usb.util import (CTRL_RECIPIENT_DEVICE, CTRL_RECIPIENT_INTERFACE, CTRL_RECIPIENT_ENDPOINT, CTRL_RECIPIENT_OTHER) +from usb.util import (DESC_TYPE_DEVICE, DESC_TYPE_CONFIG, DESC_TYPE_STRING, + DESC_TYPE_INTERFACE, DESC_TYPE_ENDPOINT) + +import struct +from collections import namedtuple def get_interface(dev, interface, alternate=0): intf = None @@ -45,22 +51,218 @@ def get_interface(dev, interface, alternate=0): VENDOR_TEST_CTRL_NONE_DELAY = 6 VENDOR_TEST_CTRL_IN_STATUS_DELAY = 7 VENDOR_TEST_CTRL_OUT_STATUS_DELAY = 8 +VENDOR_TEST_CTRL_IN_SIZES = 9 +VENDOR_TEST_CTRL_OUT_SIZES = 10 VENDOR_TEST_UNSUPPORTED_REQUEST = 32 +REQUEST_GET_STATUS = 0 # done +REQUEST_CLEAR_FEATURE = 1 # done +REQUEST_SET_FEATURE = 3 # done +REQUEST_SET_ADDRESS = 5 # ??? +REQUEST_GET_DESCRIPTOR = 6 +REQUEST_SET_DESCRIPTOR = 7 # done +REQUEST_GET_CONFIGURATION = 8 # done +REQUEST_SET_CONFIGURATION = 9 # done +REQUEST_GET_INTERFACE = 10 # done +REQUEST_SET_INTERFACE = 11 # done +REQUEST_SYNCH_FRAME = 12 # almost done + +FEATURE_ENDPOINT_HALT = 0 +FEATURE_DEVICE_REMOTE_WAKEUP = 1 + + + +DEVICE_QUALIFIER_DESC_SIZE = 10 + +DESC_TYPE_DEVICE_QUALIFIER = 0x06 + + +DEVICE_DESC_SIZE = 18 +device_descriptor_parser = struct.Struct('BBHBBBBHHHBBBB') +device_descriptor_keys = ['bLength', 'bDescriptorType', 'bcdUSB', 'bDeviceClass', + 'bDeviceSubClass', 'bDeviceProtocol', 'bMaxPacketSize0', + 'idVendor', 'idProduct', 'bcdDevice', 'iManufacturer', + 'iProduct', 'iSerialNumber', 'bNumConfigurations'] + +CONFIGURATION_DESC_SIZE = 9 +configuration_descriptor_parser = struct.Struct('BBHBBBBB') +configuration_descriptor_keys = ['bLength', 'bDescriptorType', 'wTotalLength', + 'bNumInterfaces', 'bConfigurationValue', + 'iConfiguration', 'bmAttributes', 'bMaxPower'] + +INTERFACE_DESC_SIZE = 9 +interface_descriptor_parser = struct.Struct('BBBBBBBBB') +interface_descriptor_keys = ['bLength', 'bDescriptorType', 'bInterfaceNumber', + 'bAlternateSetting', 'bNumEndpoints', + 'bInterfaceClass', 'bInterfaceSubClass', + 'bInterfaceProtocol', 'iInterface'] + +ENDPOINT_DESC_SIZE = 7 +interface_descriptor_parser = struct.Struct('BBBBBHB') +interface_descriptor_keys = ['bLength', 'bDescriptorType', 'bEndpointAddress', + 'bmAttributes', 'wMaxPacketSize', 'bInterval'] + class PyusbBasicTest(BaseHostTest): - """ - """ - def _callback_usb_enumeration_done(self, key, value, timestamp): - print("Received key %s = %s" % (key, value)) - self.log("Received key %s = %s" % (key, value)) - test_device(value, self.log) - passed = True - results = "pass" if passed else "fail" - self.send_kv(results, "0") + + def _callback_control_basic_test(self, key, value, timestamp): + serial_number, vendor_id, product_id = value.split(' ') + self.log("Received serial %s" % (serial_number)) + self.log("Received vendor_id %s" % (vendor_id)) + self.log("Received product_id %s" % (product_id)) + + dev = self.find_device(serial_number) + if(dev == None): + return + + try: + control_basic_test(dev, vendor_id, product_id, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + + def _callback_control_stall_test(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + control_stall_test(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + + def _callback_control_sizes_test(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + control_sizes_test(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + + def _callback_control_stress_test(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + control_stress_test(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + + def _callback_device_reset_test(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + self.device_reset_test.send(dev) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + def _callback_device_soft_reconnection_test(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + self.device_soft_reconnection_test.send(dev) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + + def _callback_device_suspend_resume_test(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + self.device_suspend_resume_test.send(dev) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + + def _callback_repeated_construction_destruction_test(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + self.repeated_construction_destruction_test.send(dev) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + + def find_device(self, serial_number): + # to make it more reliable, 20 retries in 2[s] + for _ in range(20): + dev = usb.core.find(custom_match=TestMatch(serial_number)) + if dev is not None: + break + time.sleep(0.1) + + if dev is None: + self.log("Device not found") + self.send_kv("failed", "0") + return dev + + + def report_success(self): + self.send_kv("pass", "0") + + def report_error(self, msg): + self.log('TEST FAILED: {}'.format(msg)) + self.send_kv("failed", "0") def setup(self): self.__result = False - self.register_callback('usb_enumeration_done', self._callback_usb_enumeration_done) + + self.device_reset_test = device_reset_test(log=print) + self.device_reset_test.send(None) + + self.device_soft_reconnection_test = device_soft_reconnection_test(log=print) + self.device_soft_reconnection_test.send(None) + + self.device_suspend_resume_test = device_suspend_resume_test(log=print) + self.device_suspend_resume_test.send(None) + + self.repeated_construction_destruction_test = repeated_construction_destruction_test(log=print) + self.repeated_construction_destruction_test.send(None) + + self.register_callback('control_basic_test', self._callback_control_basic_test) + self.register_callback('control_stall_test', self._callback_control_stall_test) + self.register_callback('control_sizes_test', self._callback_control_sizes_test) + self.register_callback('control_stress_test', self._callback_control_stress_test) + self.register_callback('device_reset_test', self._callback_device_reset_test) + self.register_callback('device_soft_reconnection_test', self._callback_device_soft_reconnection_test) + self.register_callback('device_suspend_resume_test', self._callback_device_suspend_resume_test) + self.register_callback('repeated_construction_destruction_test', self._callback_repeated_construction_destruction_test) + def result(self): return self.__result @@ -81,6 +283,20 @@ def __call__(self, dev): return False +def lineno(): + """Returns the current line number in our program.""" + return inspect.currentframe().f_back.f_lineno + +def raise_if_different(expected, actual, line, text=''): + """Raise a RuntimeError if actual is different than expected.""" + if expected != actual: + raise RuntimeError('[{}]:{}, {} Got {!r}, expected {!r}'.format(__file__, line, text, actual, expected)) + +def raise_unconditionally(line, text=''): + """Raise a RuntimeError unconditionally.""" + raise RuntimeError('[{}]:{}, {}'.format(__file__, line, text)) + + def test_device(serial_number, log=print): dev = usb.core.find(custom_match=TestMatch(serial_number)) if dev is None: @@ -123,7 +339,6 @@ def test_device(serial_number, log=print): #-report throughput for in/out of control, bulk, interrupt and iso transfers #-verify that construction/destruction repeatedly works gracefully - intf = get_interface(dev, 0, 0) # Find endpoints @@ -205,7 +420,6 @@ def test_device(serial_number, log=print): t.join() - return True def write_data(pipe): print("Write data running") @@ -215,8 +429,417 @@ def write_data(pipe): count += 1 print("Count %s" % count) time.sleep(0.5) - - + + +def control_basic_test(dev, vendor_id, product_id, log): + get_status_test(dev, log) + set_clear_feature_test(dev, log) + get_set_interface_test(dev, log) + get_set_configuration_test(dev, log) + get_descriptor_test(dev, vendor_id, product_id, log) + set_descriptor_test(dev, log) + #synch_frame_test(dev, log) wait for isochronous endpoint + + +def get_status_test(dev, log): + # Control IN GET_STATUS on DEVICE + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = REQUEST_GET_STATUS + value = 0 # Always 0 for this request + index = 0 # 0 if recipient is device + length = 2 # Always 2 for this request (size of return data) + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] | (ret[1] << 8) + # Status bits + # ret == 0b01 (D0)Self Powered + # ret == 0b10 (D1)Remote Wakeup + # (D2 - D15 reserved) Must be set to 0 + if(ret < 0 or ret > 3): + raise_unconditionally(lineno(), "GET_STATUS on DEVICE failed") + + # Control IN GET_STATUS on INTERFACE + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_GET_STATUS + value = 0 # Always 0 for this request + index = 0 # interface index + length = 2 # Always 2 for this request (size of return data) + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] | (ret[1] << 8) + # Status bits + # ret == 0b0 + # (D0 - D15 reserved) Must be set to 0 + if(ret != 0): + raise_unconditionally(lineno(), "GET_STATUS on INTERFACE failed") + + # Control IN GET_STATUS on ENDPOINT 0 + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_GET_STATUS + value = 0 # Always 0 for this request + index = 0 # endpoint index + length = 2 # Always 2 for this request (size of return data) + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] | (ret[1] << 8) + # Status bits + # ret == 0b1 (D0)endpoint Halt + # (D1 - D15 reserved) Must be set to 0 + # endpoint 0 can't be halted ret == 0 + if(ret != 0): + raise_unconditionally(lineno(), "GET_STATUS on ENDPOINT failed") + + +def set_clear_feature_test(dev, log): + # The state of the Direction bit is ignored if the wLength field is zero, + # signifying there is no Data stage - see USB spec 9.3.1 + # according to this SET/CLEAR_FEATURE ignores direction bits and should + # work for both CTRL_OUT and CTRL_IN + + # Control OUT SET_FEATURE on endpoint - halt + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_SET_FEATURE + value = FEATURE_ENDPOINT_HALT + index = 1 # Endpoint index + length = 0 # Always 0 for this request + try: + dev.ctrl_transfer(request_type, request, value, index, length) + except usb.core.USBError: + raise_unconditionally(lineno(), "endpoint halt failed") + + # check if endpoint was halted + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_GET_STATUS + value = 0 # Always 0 for this request + index = 1 # Endpoint index + length = 2 # Always 2 for this request (size of return data) + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] | (ret[1] << 8) + if(ret != 1): + raise_unconditionally(lineno(), "endpoint was not halted") + + # Control OUT CLEAR_FEATURE on endpoint - unhalt + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_CLEAR_FEATURE + value = FEATURE_ENDPOINT_HALT + index = 1 # Endpoint index + length = 0 # Always 0 for this request + try: + dev.ctrl_transfer(request_type, request, value, index, length) + except usb.core.USBError: + raise_unconditionally(lineno(), "endpoint was not unhalted") + + # check if endpoint was unhalted + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_GET_STATUS + value = 0 # Always 0 for this request + index = 1 # Endpoint index + length = 2 # Always 2 for this request (size of return data) + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] + if(ret != 0): + raise_unconditionally(lineno(), "endpoint unhalthalt failed") + + # retest for CTRL_IN + # Control IN SET_FEATURE on endpoint - halt + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_SET_FEATURE + value = FEATURE_ENDPOINT_HALT + index = 1 # Endpoint index + length = 0 # Always 0 for this request + try: + dev.ctrl_transfer(request_type, request, value, index, length) + except usb.core.USBError: + raise_unconditionally(lineno(), "endpoint halt failed") + + # check if endpoint was halted + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_GET_STATUS + value = 0 # Always 0 for this request + index = 1 # Endpoint index + length = 2 # Always 2 for this request (size of return data) + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] | (ret[1] << 8) + if(ret != 1): + raise_unconditionally(lineno(), "endpoint was not halted") + + # Control IN CLEAR_FEATURE on endpoint - unhalt + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_CLEAR_FEATURE + value = FEATURE_ENDPOINT_HALT + index = 1 # Endpoint index + length = 0 # Always 0 for this request + try: + dev.ctrl_transfer(request_type, request, value, index, length) + except usb.core.USBError: + raise_unconditionally(lineno(), "endpoint was not unhalted") + + # check if endpoint was unhalted + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_GET_STATUS + value = 0 # Always 0 for this request + index = 1 # Endpoint index + length = 2 # Always 2 for this request (size of return data) + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] + if(ret != 0): + raise_unconditionally(lineno(), "endpoint unhalthalt failed") + + +def get_set_interface_test(dev, log): + # Control IN GET_INTERFACE + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_GET_INTERFACE + value = 0 # Always 0 for this request + index = 0 # Interface index + length = 1 # Always 1 for this request (size of return data) + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + print("GET_INTERFACE ret: %d" % (ret[0])) + if(ret[0] != 0): + raise_unconditionally(lineno(), "Wrong interface was set expected: 0") + except usb.core.USBError: + raise_unconditionally(lineno(), "GET_INTERFACE failed") + # test control data transfer + control_data_test(dev, [64, 256], log) + + # Control IN SET_INTERFACE + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_SET_INTERFACE + value = 1 # Alternative interface setting index + index = 0 # Interface index + length = 0 # Always 0 for this request + try: + dev.ctrl_transfer(request_type, request, value, index, length) + except usb.core.USBError: + raise_unconditionally(lineno(), "SET_INTERFACE failed") + # test control data transfer after alternative interface set + control_data_test(dev, [64, 256], log) + + # Control IN GET_INTERFACE - check if alternative interface setting was set + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_GET_INTERFACE + value = 0 # Always 0 for this request + index = 0 # Interface index + length = 1 # Always 1 for this request (size of return data) + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + if(ret[0] != 1): + raise_unconditionally(lineno(), "Alternative interface setting was not set properly") + except usb.core.USBError: + raise_unconditionally(lineno(), "GET_INTERFACE failed") + + # Control IN SET_INTERFACE restore interfejs settings + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_SET_INTERFACE + value = 0 # Interface setting index + index = 0 # Interface index + length = 0 # Always 0 for this request + try: + dev.ctrl_transfer(request_type, request, value, index, length) + except usb.core.USBError: + raise_unconditionally(lineno(), "SET_INTERFACE request failed") + # test control data transfer after interface restoring + control_data_test(dev, [64, 256], log) + + # Control IN GET_INTERFACE - check if alternative interface setting was restored properly + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_GET_INTERFACE + value = 0 # Always 0 for this request + index = 0 # Interface index + length = 1 # Always 1 for this request (size of return data) + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + if(ret[0] != 0): + raise_unconditionally(lineno(), "Alternative interface setting was not restored properly") + except usb.core.USBError: + raise_unconditionally(lineno(), "GET_INTERFACE failed") + + +def get_set_configuration_test(dev, log): + # Set Configuration can also be used, with wValue set to 0, to deconfigure the device + # Control IN GET_CONFIGURATION + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_GET_CONFIGURATION + value = 0 # Always 0 for this request + index = 0 # Always 0 for this request + length = 1 # Always 1 for this request (size of return data) + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + if(ret[0] != 1): + raise_unconditionally(lineno(), "Expected first configuration set") + except usb.core.USBError: + raise_unconditionally(lineno(), "GET_CONFIGURATION failed") + # test control data transfer + control_data_test(dev, [64, 256], log) + + # Control OUT SET_CONFIGURATION 0 - deconfigure the device + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_SET_CONFIGURATION + value = 0 # Configuration Value (0 - deconfigure the device) + index = 0 # Always 0 for this request + length = 0 # Always 0 for this request + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + except usb.core.USBError: + raise_unconditionally(lineno(), "SET_CONFIGURATION failed") + + # Control IN GET_CONFIGURATION - check if deconfigured + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_GET_CONFIGURATION + value = 0 # Always 0 for this request + index = 0 # Always 0 for this request + length = 1 # Always 1 for this request (size of return data) + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + if(ret[0] != 0): + raise_unconditionally(lineno(), "Expected to be deconfigured") + except usb.core.USBError: + raise_unconditionally(lineno(), "GET_CONFIGURATION failed") + + # Control OUT SET_CONFIGURATION 1 - restore first configuration + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_SET_CONFIGURATION + value = 1 # Configuration Value + index = 0 # Always 0 for this request + length = 0 # Always 0 for this request + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + except usb.core.USBError: + raise_unconditionally(lineno(), "SET_CONFIGURATION failed") + # test control data transfer after configured back + control_data_test(dev, [64, 256], log) + + # Control IN GET_CONFIGURATION - check if configured back + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_GET_CONFIGURATION + value = 0 # Always 0 for this request + index = 0 # Always 0 for this request + length = 1 # Always 1 for this request (size of return data) + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + if(ret[0] != 1): + raise_unconditionally(lineno(), "Expected to be deconfigured: 1") + except usb.core.USBError: + raise_unconditionally(lineno(), "GET_CONFIGURATION failed") + control_data_test(dev, [64, 256], log) + + +def get_descriptor_test(dev, vendor_id, product_id, log): + # Control IN GET_DESCRIPTOR - device + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = REQUEST_GET_DESCRIPTOR + value = (DESC_TYPE_DEVICE << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) + index = 0 # 0 or Language ID for this request + length = DEVICE_DESC_SIZE # Descriptor Length + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + #print("### DEVICE_DESC ####################################################") + #dev_desc = dict(zip(device_descriptor_keys, device_descriptor_parser.unpack(ret))) + #for key in dev_desc: + # print("%s: %d" % (key, dev_desc[key])) + #assert vendor_id != dev_desc['idVendor'] + #assert product_id != dev_desc['idProduct'] + except usb.core.USBError: + raise_unconditionally(lineno(), "Requesting device descriptor failed") + + # Control IN GET_DESCRIPTOR - configuration + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = REQUEST_GET_DESCRIPTOR + value = (DESC_TYPE_CONFIG << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) + index = 0 # 0 or Language ID for this request + length = CONFIGURATION_DESC_SIZE # Descriptor Length + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + #print("### CONFIGURATION_DESC ####################################################") + #conf_desc = dict(zip(configuration_descriptor_keys, configuration_descriptor_parser.unpack(ret))) + #for key in conf_desc: + # print("%s: %d" % (key, conf_desc[key])) + #print("#######################################################") + except usb.core.USBError: + raise_unconditionally(lineno(), "Requesting configuration descriptor failed") + + # Control IN GET_DESCRIPTOR - interface + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = REQUEST_GET_DESCRIPTOR + value = (DESC_TYPE_INTERFACE << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) + index = 0 # 0 or Language ID for this request + length = INTERFACE_DESC_SIZE # Descriptor Length + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + raise_unconditionally(lineno(), "Requesting interface descriptor should fail since it is not directly accessible") + except usb.core.USBError: + log("interface descriptor is not directly accessible") + + # Control IN GET_DESCRIPTOR - interface + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = REQUEST_GET_DESCRIPTOR + value = (DESC_TYPE_ENDPOINT << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) + index = 0 # 0 or Language ID for this request + length = INTERFACE_DESC_SIZE # Descriptor Length + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + raise_unconditionally(lineno(), "Requesting endpoint descriptor should fail since it is not directly accessible") + except usb.core.USBError: + log("endpoint descriptor is not directly accessible") + + +def set_descriptor_test(dev, log): + # SET_DESCRIPTOR is optional and not implemented in Mbed + # command should fail with no action on device side + + # Control OUT SET_DESCRIPTOR + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = REQUEST_SET_DESCRIPTOR + value = (DESC_TYPE_DEVICE << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) + index = 0 # 0 or Language ID for this request + data = bytearray(DEVICE_DESC_SIZE) # Descriptor data + try: + dev.ctrl_transfer(request_type, request, value, index, data) + raise_unconditionally(lineno(), "SET_DESCRIPTOR should fail since it is not implemented") + except usb.core.USBError: + log("SET_DESCRIPTOR is unsupported") + + +def synch_frame_test(dev, log): + # only for isochronous endpoints + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_SYNCH_FRAME + value = 0 # Always 0 for this request + index = 1 # Endpoint index + length = 2 # Always 2 for this request (size of return data) + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] | (ret[1] << 8) + log("synch frame ret: %d" % (ret)) + except usb.core.USBError: + raise_unconditionally(lineno(), "SYNCH_FRAME failed") + + def control_stall_test(dev, log): # Control OUT stall @@ -228,7 +851,7 @@ def control_stall_test(dev, log): index = 0 # Communication interface data = bytearray(64) # Dummy data dev.ctrl_transfer(request_type, request, value, index, data, 5000) - raise Exception("Invalid request not stalled") + raise_unconditionally(lineno(), "Invalid request not stalled") except usb.core.USBError: log("Invalid request stalled") @@ -241,7 +864,7 @@ def control_stall_test(dev, log): index = 0 # Communication interface length = 0 dev.ctrl_transfer(request_type, request, value, index, length, 5000) - raise Exception("Invalid request not stalled") + raise_unconditionally(lineno(), "Invalid request not stalled") except usb.core.USBError: log("Invalid request stalled") @@ -254,7 +877,7 @@ def control_stall_test(dev, log): index = 0 # Communication interface length = 0 dev.ctrl_transfer(request_type, request, value, index, length, 5000) - raise Exception("Invalid request not stalled") + raise_unconditionally(lineno(), "Invalid request not stalled") except usb.core.USBError: log("Invalid request stalled") @@ -267,11 +890,23 @@ def control_stall_test(dev, log): index = 0 # Communication interface length = 255 dev.ctrl_transfer(request_type, request, value, index, length, 5000) - raise Exception("Invalid request not stalled") + raise_unconditionally(lineno(), "Invalid request not stalled") except usb.core.USBError: log("Invalid request stalled") - for i in (6, 7, 5): + for i in (3, 4, 5): + try: + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = 0x6 # GET_DESCRIPTOR + value = (0x03 << 8) | (i << 0) # String descriptor index + index = 0 # Communication interface + length = 255 + resp = dev.ctrl_transfer(request_type, request, value, index, length, 5000) + except usb.core.USBError: + raise_unconditionally(lineno(), "Requesting string failed i: " + str(i)) + + for i in (6, 7): try: request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, CTRL_RECIPIENT_DEVICE) @@ -280,11 +915,54 @@ def control_stall_test(dev, log): index = 0 # Communication interface length = 255 resp = dev.ctrl_transfer(request_type, request, value, index, length, 5000) - log("Requesting string %s passed" % i) + raise_unconditionally(lineno(), "Requesting string passed i: " + str(i)) except usb.core.USBError: log("Requesting string %s failed" % i) - - + + +def control_sizes_test(dev, log): + list = [1, 2, 3, 7, 8, 9, 15, 16, 17, 31, 32, 33, 63, 64, 65, 127, 128, 129, 255, 256, 257, 511, 512, 513, 1023, 1024, 1025, 2047, 2048] + control_data_test(dev, list, log) + + +def control_data_test(dev, sizes_list, log): + # Test control requests of various data stage sizes (1,8,16,32,64,255,256,...) + count = 1 + for i in sizes_list: + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_CTRL_OUT_SIZES + value = i # Size of data the device should actually read + index = 0 # Unused - set for debugging only + data = bytearray(i) # Dummy data + if i == 1: + data[0] = count + else: + data[0] = count - 1 + data[i - 1] = count + 1 + try: + dev.ctrl_transfer(request_type, request, value, index, data, 5000) + except usb.core.USBError: + raise_unconditionally(lineno(), "VENDOR_TEST_CTRL_OUT_SIZES failed ") + + request_type = build_request_type(CTRL_IN, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_CTRL_IN_SIZES + value = 0 # Size of data the device should actually send + index = 0 # Unused - set for debugging only + length = i + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length, 5000) + if i == 1: + raise_if_different(count, ret[0], lineno(), "send/receive data not match") + else: + raise_if_different(count - 1, ret[0], lineno(), "send/receive data not match") + raise_if_different(count + 1, ret[i - 1], lineno(), "send/receive data not match") + except usb.core.USBError: + raise_unconditionally(lineno(), "VENDOR_TEST_CTRL_IN_SIZES failed") + count += 1 + + def control_stress_test(dev, log): # Test various patterns of control transfers @@ -337,6 +1015,65 @@ def control_stress_test(dev, log): count += 1 +def device_reset_test(log): + dev = yield + dev.reset(); + dev = yield + dev.reset(); + dev = yield + dev.reset(); + dev = yield + # run other test to check if USB works fine after reset + control_data_test(dev, [64, 256], log) + yield + + +def device_soft_reconnection_test(log): + list = [64, 256] + dev = yield + # run other test to check if USB works fine before reconnection + control_data_test(dev, list, log) + dev = yield + # run other test to check if USB works fine after reconnection + control_data_test(dev, list, log) + dev = yield + # run other test to check if USB works fine after reconnection + control_data_test(dev, list, log) + dev = yield + # run other test to check if USB works fine after reconnection + control_data_test(dev, list, log) + dev = yield + # run other test to check if USB works fine after reconnection + control_data_test(dev, list, log) + yield + + +def device_suspend_resume_test(log): + dev = yield + time.sleep(0.1) + control_data_test(dev, [64, 256], log) + time.sleep(0.1) + control_data_test(dev, [64, 256], log) + time.sleep(0.1) + control_data_test(dev, [64, 256], log) + time.sleep(0.1) + control_data_test(dev, [64, 256], log) + time.sleep(0.1) + yield + + +def repeated_construction_destruction_test(log): + # run other test to check if USB works fine after repeated construction/destruction + list = [64, 256] + dev = yield + control_data_test(dev, list, log) + dev = yield + control_data_test(dev, list, log) + dev = yield + control_data_test(dev, list, log) + yield + + def main(): parser = ArgumentParser(description="USB basic test") parser.add_argument('serial', help='USB serial number of DUT') diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index 3235a3f8554..a30a819dd70 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -30,12 +30,15 @@ #define VENDOR_TEST_CTRL_NONE_DELAY 6 #define VENDOR_TEST_CTRL_IN_STATUS_DELAY 7 #define VENDOR_TEST_CTRL_OUT_STATUS_DELAY 8 +#define VENDOR_TEST_CTRL_IN_SIZES 9 +#define VENDOR_TEST_CTRL_OUT_SIZES 10 #define MAX_EP_SIZE 64 #define MIN_EP_SIZE 8 -USBTester::USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): USBDevice(vendor_id, product_id, product_release) +USBTester::USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): USBDevice(vendor_id, product_id, product_release), + reset_count(0), suspend_count(0), resume_count(0) { EndpointResolver resolver(endpoint_table()); @@ -60,6 +63,46 @@ USBTester::~USBTester() deinit(); } + +const char *USBTester::get_desc_string(const uint8_t *desc) +{ + static char ret_string[128] = {}; + const uint8_t desc_size = desc[0] - 2; + const uint8_t *desc_str = &desc[2]; + uint32_t j = 0; + for(uint32_t i = 0; i < desc_size; i+=2, j++) { + ret_string[j] = desc_str[i]; + } + ret_string[j] = '\0'; + return ret_string; +} + +void USBTester::suspend(bool suspended) +{ + if(suspended) { + ++suspend_count; + } else { + ++resume_count; + } +} + +const char *USBTester::get_serial_desc_string() +{ + return get_desc_string(string_iserial_desc()); +} + +const char *USBTester::get_iinterface_desc_string() +{ + return get_desc_string(string_iserial_desc()); +} + +const char *USBTester::get_iproduct_desc_string() +{ + return get_desc_string(string_iserial_desc()); +} + + + void USBTester::callback_state_change(DeviceState new_state) { // Nothing to do @@ -93,6 +136,16 @@ void USBTester::callback_request(const setup_packet_t *setup) result = Success; delay = 2000; break; + case VENDOR_TEST_CTRL_IN_SIZES: + result = Send; + data = ctrl_buf; + size = setup->wLength; + break; + case VENDOR_TEST_CTRL_OUT_SIZES: + result = Receive; + data = ctrl_buf; + size = setup->wValue; + break; default: result = PassThrough; break; @@ -124,6 +177,12 @@ void USBTester::callback_request_xfer_done(const setup_packet_t *setup, bool abo case VENDOR_TEST_CTRL_OUT: result = true; break; + case VENDOR_TEST_CTRL_OUT_SIZES: + result = true; + break; + case VENDOR_TEST_CTRL_IN_SIZES: + result = true; + break; default: result = false; break; diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index 7b56d3171e5..b7005c98c0d 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -40,6 +40,24 @@ class USBTester: public USBDevice { ~USBTester(); + /* + * + * @returns descriptor string in ASCII + */ + const char *get_serial_desc_string(); + const char *get_iproduct_desc_string(); + const char *get_iinterface_desc_string(); + uint32_t get_reset_count() const { return reset_count; } + uint32_t get_suspend_count() const { return suspend_count; } + uint32_t get_resume_count() const { return resume_count; } + void clear_reset_count() { reset_count = 0; } + void clear_suspend_count() { suspend_count = 0; } + void clear_resume_count() { resume_count = 0; } + +private: + const char *get_desc_string(const uint8_t *desc); + virtual void suspend(bool suspended); + protected: /* @@ -78,6 +96,9 @@ class USBTester: public USBDevice { uint8_t int_out; uint8_t int_buf[64]; EventQueue *queue; + volatile uint32_t reset_count; + volatile uint32_t suspend_count; + volatile uint32_t resume_count; virtual void callback_state_change(DeviceState new_state); virtual void callback_request(const setup_packet_t *setup); @@ -86,6 +107,7 @@ class USBTester: public USBDevice { virtual void callback_set_interface(uint16_t interface, uint8_t alternate); virtual void epbulk_out_callback(usb_ep_t endpoint); virtual void epint_out_callback(usb_ep_t endpoint); + virtual void callback_reset() { ++reset_count; } uint8_t ctrl_buf[2048]; }; diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index 141bb473e2c..1577a87148a 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -29,23 +29,263 @@ using namespace utest::v1; -// Echo server (echo payload to host) -void test_case_basic() +void control_basic_test() { + uint16_t vendor_id = 0x0d28; + uint16_t product_id = 0x0205; + uint16_t product_release = 0x0001; char _key[11] = {}; char _value[128] = {}; + char str[128] = {}; { - USBTester serial(0x0d28, 0x0205, 0x0001, true); + USBTester serial(vendor_id, product_id, product_release, true); + sprintf (str, "%s %d %d", serial.get_serial_desc_string(), vendor_id, product_id); + greentea_send_kv("control_basic_test", str); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + +void control_stall_test() +{ + uint16_t vendor_id = 0x0d28; + uint16_t product_id = 0x0205; + uint16_t product_release = 0x0001; + char _key[11] = {}; + char _value[128] = {}; + + { + USBTester serial(vendor_id, product_id, product_release, true); + greentea_send_kv("control_stall_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + +void control_sizes_test() +{ + uint16_t vendor_id = 0x0d28; + uint16_t product_id = 0x0205; + uint16_t product_release = 0x0001; + char _key[11] = {}; + char _value[128] = {}; + + { + USBTester serial(vendor_id, product_id, product_release, true); + greentea_send_kv("control_sizes_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + +void control_stress_test() +{ + uint16_t vendor_id = 0x0d28; + uint16_t product_id = 0x0205; + uint16_t product_release = 0x0001; + char _key[11] = {}; + char _value[128] = {}; + + { + USBTester serial(vendor_id, product_id, product_release, true); + greentea_send_kv("control_stress_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} - greentea_send_kv("usb_enumeration_done", "0123456789"); +void device_reset_test() +{ + uint16_t vendor_id = 0x0d28; + uint16_t product_id = 0x0205; + uint16_t product_release = 0x0001; + char _key[11] = {}; + char _value[128] = {}; + + { + USBTester serial(vendor_id, product_id, product_release, true); + + greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); + serial.clear_reset_count(); + // Wait for host before terminating + while(serial.get_reset_count() == 0); + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + + while(!serial.configured()); + + greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); + serial.clear_reset_count(); + // Wait for host before terminating + while(serial.get_reset_count() == 0); + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + + while(!serial.configured()); + + greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); + serial.clear_reset_count(); + // Wait for host before terminating + while(serial.get_reset_count() == 0); + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + + while(!serial.configured()); + + greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + + +void device_soft_reconnection_test() +{ + uint16_t vendor_id = 0x0d28; + uint16_t product_id = 0x0205; + uint16_t product_release = 0x0001; + char _key[11] = {}; + char _value[128] = {}; + const uint32_t reconnect_try_count = 3; + + { + USBTester serial(vendor_id, product_id, product_release, true); + + greentea_send_kv("device_soft_reconnection_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + + for(int i = 0; i < reconnect_try_count; i++) { + serial.disconnect(); + // If disconnect() + connect() occur too fast the reset event will be dropped. + // At a minimum there should be a 200us delay between disconnect and connect. + // To be on the safe side I would recommend a 1ms delay, so the host controller + // has an entire USB frame to detect the disconnect. + wait_ms(1); + serial.connect(); + greentea_send_kv("device_soft_reconnection_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } + + serial.disconnect(); + wait_ms(1); + serial.connect(); + serial.disconnect(); + wait_ms(1); + serial.connect(); + serial.disconnect(); + wait_ms(1); + serial.connect(); + greentea_send_kv("device_soft_reconnection_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + +void device_suspend_resume_test() +{ + uint16_t vendor_id = 0x0d28; + uint16_t product_id = 0x0205; + uint16_t product_release = 0x0001; + char _key[11] = {}; + char _value[128] = {}; + + { + USBTester serial(vendor_id, product_id, product_release, true); + greentea_send_kv("device_suspend_resume_test", serial.get_serial_desc_string()); + printf("[1] suspend_count: %d resume_count: %d\n", serial.get_suspend_count(), serial.get_resume_count()); + serial.clear_suspend_count(); + serial.clear_resume_count(); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + printf("[2] suspend_count: %d resume_count: %d\n", serial.get_suspend_count(), serial.get_resume_count()); + TEST_ASSERT_EQUAL_STRING("pass", _key); + wait_ms(5000); + printf("[3] suspend_count: %d resume_count: %d\n", serial.get_suspend_count(), serial.get_resume_count()); + } +} + +void repeated_construction_destruction_test() +{ + uint16_t vendor_id = 0x0d28; + uint16_t product_id = 0x0205; + uint16_t product_release = 0x0001; + char _key[11] = {}; + char _value[128] = {}; + + { + USBTester serial(vendor_id, product_id, product_release, true); + TEST_ASSERT_EQUAL(true, serial.configured()); + wait_ms(1); + } + + wait_ms(1); + { + USBTester serial(vendor_id, product_id, product_release, true); + TEST_ASSERT_EQUAL(true, serial.configured()); + wait_ms(1); + } + + wait_ms(1); + { + USBTester serial(vendor_id, product_id, product_release, true); + TEST_ASSERT_EQUAL(true, serial.configured()); + wait_ms(1); + } + + wait_ms(1); + { + USBTester serial(vendor_id, product_id, product_release, true); + TEST_ASSERT_EQUAL(true, serial.configured()); + wait_ms(1); + greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } + + wait_ms(1); + { + USBTester serial(vendor_id, product_id, product_release, true); + TEST_ASSERT_EQUAL(true, serial.configured()); + wait_ms(1); + greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } + + wait_ms(1); + { + USBTester serial(vendor_id, product_id, product_release, true); + TEST_ASSERT_EQUAL(true, serial.configured()); + wait_ms(1); + greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); } } Case cases[] = { - Case("pyusb basic test", test_case_basic), + Case("usb control basic test", control_basic_test), + Case("usb control stall test", control_stall_test), + Case("usb control sizes test", control_sizes_test), + Case("usb control stress test", control_stress_test), + Case("usb device reset test", device_reset_test), + Case("usb soft reconnection test", device_soft_reconnection_test), + Case("usb device suspend/resume test", device_suspend_resume_test), + Case("usb repeated construction destruction test", repeated_construction_destruction_test) }; utest::v1::status_t greentea_test_setup(const size_t number_of_cases) From 27a630566dfc230ae88bd64d5d7da4d4fb93a8d3 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 19 Mar 2018 22:03:32 -0500 Subject: [PATCH 035/488] Move USBPhy and related files to USB directory Move the USBPhy header files into usb/device/USBPhy. Also move hal and target USB files since mbed 2 does not compile when these files are present without the USBPhy headers. Directory restructure summary: platform/USBPhy* to usb/device/USBPhy/USBPhy* hal/* to usb/device/hal/* targets/TARGET_Freescale/usb/* to usb/device/targets/TARGET_Freescale/* targets/TARGET_NXP/TARGET_LPC176X/usb/* to usb/device/targets/TARGET_NXP/* --- {platform => usb/device/USBPhy}/USBPhy.h | 0 {platform => usb/device/USBPhy}/USBPhyEvents.h | 0 {platform => usb/device/USBPhy}/USBPhyTypes.h | 0 {hal => usb/device/hal}/mbed_usb_phy.cpp | 0 {hal => usb/device/hal}/usb_phy_api.h | 0 .../device/targets/TARGET_Freescale}/USBEndpoints_Kinetis.h | 0 .../usb => usb/device/targets/TARGET_Freescale}/USBPhyHw.h | 0 .../device/targets/TARGET_Freescale}/USBPhy_Kinetis.cpp | 0 .../device/targets/TARGET_NXP}/USBEndpoints_LPC17_LPC23.h | 0 .../usb => usb/device/targets/TARGET_NXP}/USBHAL_LPC17.cpp | 0 .../usb => usb/device/targets/TARGET_NXP}/USBPhyHw.h | 0 11 files changed, 0 insertions(+), 0 deletions(-) rename {platform => usb/device/USBPhy}/USBPhy.h (100%) rename {platform => usb/device/USBPhy}/USBPhyEvents.h (100%) rename {platform => usb/device/USBPhy}/USBPhyTypes.h (100%) rename {hal => usb/device/hal}/mbed_usb_phy.cpp (100%) rename {hal => usb/device/hal}/usb_phy_api.h (100%) rename {targets/TARGET_Freescale/usb => usb/device/targets/TARGET_Freescale}/USBEndpoints_Kinetis.h (100%) rename {targets/TARGET_Freescale/usb => usb/device/targets/TARGET_Freescale}/USBPhyHw.h (100%) rename {targets/TARGET_Freescale/usb => usb/device/targets/TARGET_Freescale}/USBPhy_Kinetis.cpp (100%) rename {targets/TARGET_NXP/TARGET_LPC176X/usb => usb/device/targets/TARGET_NXP}/USBEndpoints_LPC17_LPC23.h (100%) rename {targets/TARGET_NXP/TARGET_LPC176X/usb => usb/device/targets/TARGET_NXP}/USBHAL_LPC17.cpp (100%) rename {targets/TARGET_NXP/TARGET_LPC176X/usb => usb/device/targets/TARGET_NXP}/USBPhyHw.h (100%) diff --git a/platform/USBPhy.h b/usb/device/USBPhy/USBPhy.h similarity index 100% rename from platform/USBPhy.h rename to usb/device/USBPhy/USBPhy.h diff --git a/platform/USBPhyEvents.h b/usb/device/USBPhy/USBPhyEvents.h similarity index 100% rename from platform/USBPhyEvents.h rename to usb/device/USBPhy/USBPhyEvents.h diff --git a/platform/USBPhyTypes.h b/usb/device/USBPhy/USBPhyTypes.h similarity index 100% rename from platform/USBPhyTypes.h rename to usb/device/USBPhy/USBPhyTypes.h diff --git a/hal/mbed_usb_phy.cpp b/usb/device/hal/mbed_usb_phy.cpp similarity index 100% rename from hal/mbed_usb_phy.cpp rename to usb/device/hal/mbed_usb_phy.cpp diff --git a/hal/usb_phy_api.h b/usb/device/hal/usb_phy_api.h similarity index 100% rename from hal/usb_phy_api.h rename to usb/device/hal/usb_phy_api.h diff --git a/targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h b/usb/device/targets/TARGET_Freescale/USBEndpoints_Kinetis.h similarity index 100% rename from targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h rename to usb/device/targets/TARGET_Freescale/USBEndpoints_Kinetis.h diff --git a/targets/TARGET_Freescale/usb/USBPhyHw.h b/usb/device/targets/TARGET_Freescale/USBPhyHw.h similarity index 100% rename from targets/TARGET_Freescale/usb/USBPhyHw.h rename to usb/device/targets/TARGET_Freescale/USBPhyHw.h diff --git a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp similarity index 100% rename from targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp rename to usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBEndpoints_LPC17_LPC23.h b/usb/device/targets/TARGET_NXP/USBEndpoints_LPC17_LPC23.h similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/usb/USBEndpoints_LPC17_LPC23.h rename to usb/device/targets/TARGET_NXP/USBEndpoints_LPC17_LPC23.h diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp b/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp rename to usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h b/usb/device/targets/TARGET_NXP/USBPhyHw.h similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h rename to usb/device/targets/TARGET_NXP/USBPhyHw.h From 4a40335d9ade77f9d16fc86f432730b346b7e84c Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 24 Mar 2018 17:23:47 +0100 Subject: [PATCH 036/488] Add USBPhy template Add a template for implementing a USBPhy. --- usb/device/targets/TARGET_Template/USBPhyHw.h | 66 ++++ .../TARGET_Template/USBPhy_template.cpp | 309 ++++++++++++++++++ 2 files changed, 375 insertions(+) create mode 100644 usb/device/targets/TARGET_Template/USBPhyHw.h create mode 100644 usb/device/targets/TARGET_Template/USBPhy_template.cpp diff --git a/usb/device/targets/TARGET_Template/USBPhyHw.h b/usb/device/targets/TARGET_Template/USBPhyHw.h new file mode 100644 index 00000000000..ce6cc124ba6 --- /dev/null +++ b/usb/device/targets/TARGET_Template/USBPhyHw.h @@ -0,0 +1,66 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBPHYHW_H +#define USBPHYHW_H + +#include "mbed.h" +#include "USBPhy.h" + + +class USBPhyHw : public USBPhy { +public: + USBPhyHw(); + virtual ~USBPhyHw(); + virtual void init(USBPhyEvents *events); + virtual void deinit(); + virtual bool powered(); + virtual void connect(); + virtual void disconnect(); + virtual void configure(); + virtual void unconfigure(); + virtual void sof_enable(); + virtual void sof_disable(); + virtual void set_address(uint8_t address); + virtual void remote_wakeup(); + virtual const usb_ep_table_t* endpoint_table(); + + virtual uint32_t ep0_set_max_packet(uint32_t max_packet); + virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_read(uint8_t *data, uint32_t size); + virtual uint32_t ep0_read_result(); + virtual void ep0_write(uint8_t *buffer, uint32_t size); + virtual void ep0_stall(); + + virtual bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type); + virtual void endpoint_remove(usb_ep_t endpoint); + virtual void endpoint_stall(usb_ep_t endpoint); + virtual void endpoint_unstall(usb_ep_t endpoint); + + virtual bool endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual uint32_t endpoint_read_result(usb_ep_t endpoint); + virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual void endpoint_abort(usb_ep_t endpoint); + + virtual void process(); + +private: + USBPhyEvents *events; + + static void _usbisr(void); +}; + +#endif diff --git a/usb/device/targets/TARGET_Template/USBPhy_template.cpp b/usb/device/targets/TARGET_Template/USBPhy_template.cpp new file mode 100644 index 00000000000..b0c464a3bd7 --- /dev/null +++ b/usb/device/targets/TARGET_Template/USBPhy_template.cpp @@ -0,0 +1,309 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "USBPhyHw.h" + +static USBPhyHw *instance; + +USBPhy *get_usb_phy() +{ + static USBPhyHw usbphy; + return &usbphy; +} + +USBPhyHw::USBPhyHw(): events(NULL) +{ + +} + +USBPhyHw::~USBPhyHw() +{ + +} + +void USBPhyHw::init(USBPhyEvents *events) +{ + this->events = events; + + // Disable IRQ + NVIC_DisableIRQ(USB_IRQn); + + // TODO - Setup clocks + + // TODO - Enable USB module + + // Enable IRQ + NVIC_SetVector(USB_IRQn, (uint32_t)&_usbisr); + NVIC_EnableIRQ(USB_IRQn); +} + +void USBPhyHw::deinit() +{ + // Disconnect and disable interrupt + disconnect(); + NVIC_DisableIRQ(USB_IRQn); +} + +bool USBPhyHw::powered() +{ + // TODO - return true if powered false otherwise. Devices which don't support + // this should always return true + return true; +} + +void USBPhyHw::connect() +{ + // TODO - Enable endpoint interrupts + + // TODO - Enable pullup on D+ +} + +void USBPhyHw::disconnect() +{ + // TODO - Disable all endpoints + + // TODO - Clear all endpoint interrupts + + // TODO - Disable pullup on D+ +} + +void USBPhyHw::configure() +{ + // TODO - set device to configured. Most device will not need this +} + +void USBPhyHw::unconfigure() +{ + // TODO - set device to unconfigured. Most device will not need this +} + +void USBPhyHw::sof_enable() +{ + // TODO - Enable SOF interrupt +} + +void USBPhyHw::sof_disable() +{ + // TODO - Disable SOF interrupt +} + +void USBPhyHw::set_address(uint8_t address) +{ + // TODO - set the device address. Address must take effect + // after the status phase of the current transfer +} + +void USBPhyHw::remote_wakeup() +{ + // TODO - Sent remote wakeup over USB lines (if supported) +} + +const usb_ep_table_t *USBPhyHw::endpoint_table() +{ + // TODO - Update the endpoint table for what your device supports + + static const usb_ep_table_t template_table = { + 4096 - 32 * 4, // 32 words for endpoint buffers + // +3 based added to interrupt and isochronous to ensure enough + // space for 4 byte alignment + { + {USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 0}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0} + } + }; + return &lpc_table; +} + +uint32_t USBPhyHw::ep0_set_max_packet(uint32_t max_packet) +{ + // TODO - set endpoint 0 size and return this size + return 64; +} + +// read setup packet +void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) +{ + // TODO - read up to size bytes of the setup packet +} + +void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) +{ + // TODO - setup data buffer to receive next endpoint 0 OUT packet +} + +uint32_t USBPhyHw::ep0_read_result() +{ + // TODO - return the size of the last OUT packet received on endpoint 0 + return 0; +} + +void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) +{ + // TODO - start transferring buffer on endpoint 0 IN +} + +void USBPhyHw::ep0_stall() +{ + // TODO - protocol stall endpoint 0. This stall must be automatically + // cleared by the next setup packet +} + +bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type) +{ + // TODO - enable this endpoint + + return true; +} + +void USBPhyHw::endpoint_remove(usb_ep_t endpoint) +{ + // TODO - disable and remove this endpoint +} + +void USBPhyHw::endpoint_stall(usb_ep_t endpoint) +{ + // TODO - stall this endpoint until it is explicitly cleared +} + +void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) +{ + // TODO - unstall this endpoint +} + +bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ + // TODO - setup data buffer to receive next endpoint OUT packet and return true if successful + return true; +} + +uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) +{ + // TODO - return the size of the last OUT packet received on endpoint +} + +bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ + // TODO - start transferring buffer on endpoint IN + + return true; +} + +void USBPhyHw::endpoint_abort(usb_ep_t endpoint) +{ + // TODO - stop the current transfer on this endpoint and don't call the IN or OUT callback +} + +void USBPhyHw::process() +{ + // TODO - update register for your mcu + + uint8_t stat = USB0->STAT; + + USB0->STAT = stat; // Clear pending interrupts + + // reset interrupt + if (stat & USB_STAT_RESET_MASK) { + + // TODO - disable all endpoints + + // TODO - clear all endpoint interrupts + + // TODO - enable control endpoint + + // reset bus for USBDevice layer + events->reset(); + + // Re-enable interrupt + NVIC_ClearPendingIRQ(USB_IRQn); + NVIC_EnableIRQ(USB_IRQn); + return; + } + + // power applied + if (stat & USB_STAT_POWERED) { + events->powered(true); + } + + // power lost + if (stat & USB_STAT_UNPOWERED) { + events->powered(false); + } + + // sleep interrupt + if (stat & USB_STAT_SUSPEND_MASK) { + events->suspend(true); + } + + // resume interrupt + if (stat & USB_STAT_RESUME_MASK) { + events->suspend(false); + } + + // sof interrupt + if (stat & USB_STAT_SOF_MASK) { + // SOF event, read frame number + events->sof(USB0->FRAME); + } + + // endpoint interrupt + if (stat & USB_STAT_EP_MASK) { + uint32_t ep_pending = USB->EP; + + // TODO - call endpoint 0 IN callback if pending + events->ep0_in(); + + // TODO - call endpoint 0 OUT callback if pending + events->ep0_out(); + + // TODO - call endpoint 0 SETUP callback if pending + events->ep0_setup(); + + for (int i = 0; i < 16; i++) { + // TODO - call endpoint i IN callback if pending + events->in(0x80 | i); + } + + for (int i = 0; i < 16; i++) { + // TODO - call endpoint i OUT callback if pending + events->out(); + } + + USB->EP = ep_pending; // clear pending + } + + // Re-enable interrupt + NVIC_ClearPendingIRQ(USB_IRQn); + NVIC_EnableIRQ(USB_IRQn); +} + +void USBPhyHw::_usbisr(void) { + NVIC_DisableIRQ(USB_IRQn); + instance->events->start_process(); +} From 2cd4915f7b2e3cf815a342e39842e0f2183624e6 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 24 Mar 2018 11:00:26 +0100 Subject: [PATCH 037/488] Add pyusb to requirements Add pyusb to requirements so the greentea USB tests work. --- requirements.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/requirements.txt b/requirements.txt index 49d67828bf6..8fc11ebcbce 100644 --- a/requirements.txt +++ b/requirements.txt @@ -19,3 +19,4 @@ six==1.11.0 git+https://github.com/armmbed/manifest-tool.git@v1.4.6 mbed-cloud-sdk==2.0.1 icetea>=1.0.2,<1.1 +pyusb>=1.0.0 From a7f8e881fb4ee4da8d08d15710171a72102d0aad Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 23 Mar 2018 14:10:14 +0100 Subject: [PATCH 038/488] Update USBTester product name Change the name reported by USBTester from CDC DEVICE to MBED TEST DEVICE. --- TESTS/usb_device/basic/USBTester.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index a30a819dd70..8dfed5ff004 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -286,9 +286,11 @@ const uint8_t *USBTester::string_iinterface_desc() const uint8_t *USBTester::string_iproduct_desc() { static const uint8_t string_iproduct_descriptor[] = { - 0x16, + 0x22, STRING_DESCRIPTOR, - 'C', 0, 'D', 0, 'C', 0, ' ', 0, 'D', 0, 'E', 0, 'V', 0, 'I', 0, 'C', 0, 'E', 0 + 'M', 0, 'B', 0, 'E', 0, 'D', 0, ' ', 0, + 'T', 0, 'E', 0, 'S', 0, 'T', 0, ' ', 0, + 'D', 0, 'E', 0, 'V', 0, 'I', 0, 'C', 0, 'E', 0, }; return string_iproduct_descriptor; } From 9b489045b3c18e10565c636b493e186c4ecb8173 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Mon, 26 Mar 2018 12:59:49 +0200 Subject: [PATCH 039/488] Fix for USB set_clear_feature_test for OSX --- TESTS/host_tests/pyusb_basic.py | 54 --------------------------------- 1 file changed, 54 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index ae6c164a327..4b14f595368 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -491,11 +491,6 @@ def get_status_test(dev, log): def set_clear_feature_test(dev, log): - # The state of the Direction bit is ignored if the wLength field is zero, - # signifying there is no Data stage - see USB spec 9.3.1 - # according to this SET/CLEAR_FEATURE ignores direction bits and should - # work for both CTRL_OUT and CTRL_IN - # Control OUT SET_FEATURE on endpoint - halt request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, CTRL_RECIPIENT_ENDPOINT) @@ -544,55 +539,6 @@ def set_clear_feature_test(dev, log): if(ret != 0): raise_unconditionally(lineno(), "endpoint unhalthalt failed") - # retest for CTRL_IN - # Control IN SET_FEATURE on endpoint - halt - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_SET_FEATURE - value = FEATURE_ENDPOINT_HALT - index = 1 # Endpoint index - length = 0 # Always 0 for this request - try: - dev.ctrl_transfer(request_type, request, value, index, length) - except usb.core.USBError: - raise_unconditionally(lineno(), "endpoint halt failed") - - # check if endpoint was halted - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_GET_STATUS - value = 0 # Always 0 for this request - index = 1 # Endpoint index - length = 2 # Always 2 for this request (size of return data) - ret = dev.ctrl_transfer(request_type, request, value, index, length) - ret = ret[0] | (ret[1] << 8) - if(ret != 1): - raise_unconditionally(lineno(), "endpoint was not halted") - - # Control IN CLEAR_FEATURE on endpoint - unhalt - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_CLEAR_FEATURE - value = FEATURE_ENDPOINT_HALT - index = 1 # Endpoint index - length = 0 # Always 0 for this request - try: - dev.ctrl_transfer(request_type, request, value, index, length) - except usb.core.USBError: - raise_unconditionally(lineno(), "endpoint was not unhalted") - - # check if endpoint was unhalted - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_GET_STATUS - value = 0 # Always 0 for this request - index = 1 # Endpoint index - length = 2 # Always 2 for this request (size of return data) - ret = dev.ctrl_transfer(request_type, request, value, index, length) - ret = ret[0] - if(ret != 0): - raise_unconditionally(lineno(), "endpoint unhalthalt failed") - def get_set_interface_test(dev, log): # Control IN GET_INTERFACE From 358072bca972ea3544a7982b81666fc95818b129 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 24 Mar 2018 22:07:31 +0100 Subject: [PATCH 040/488] Skip USB reset tests on OSX OSX machines don't allow you to reset USB devices. Skip this test on OSX so testing can still be used. --- TESTS/host_tests/pyusb_basic.py | 5 +++++ TESTS/usb_device/basic/main.cpp | 5 ++++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 4b14f595368..640c9271f28 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -217,6 +217,10 @@ def _callback_repeated_construction_destruction_test(self, key, value, timestamp except (RuntimeError) as exc: self.report_error(exc) + def _callback_reset_support(self, key, value, timestamp): + status = "false" if sys.platform == "darwin" else "true" + self.log("Reset supported: %s" % status) + self.send_kv("placeholder", status) def find_device(self, serial_number): # to make it more reliable, 20 retries in 2[s] @@ -263,6 +267,7 @@ def setup(self): self.register_callback('device_suspend_resume_test', self._callback_device_suspend_resume_test) self.register_callback('repeated_construction_destruction_test', self._callback_repeated_construction_destruction_test) + self.register_callback('reset_support', self._callback_reset_support) def result(self): return self.__result diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index 1577a87148a..a9c08b214c7 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -107,7 +107,10 @@ void device_reset_test() char _key[11] = {}; char _value[128] = {}; - { + greentea_send_kv("reset_support", 0); + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + if (strcmp(_value, "false") != 0) { + USBTester serial(vendor_id, product_id, product_release, true); greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); From 9a4d1d962120dd45cfe92b6f6710607463663c82 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 27 Mar 2018 16:00:13 +0200 Subject: [PATCH 041/488] Fix USB tests Change the direction used in set interface to match the USB specification. This allows USB tests to pass on OSX. --- TESTS/host_tests/pyusb_basic.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 640c9271f28..c361cbee03c 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -564,7 +564,7 @@ def get_set_interface_test(dev, log): control_data_test(dev, [64, 256], log) # Control IN SET_INTERFACE - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, CTRL_RECIPIENT_INTERFACE) request = REQUEST_SET_INTERFACE value = 1 # Alternative interface setting index @@ -592,7 +592,7 @@ def get_set_interface_test(dev, log): raise_unconditionally(lineno(), "GET_INTERFACE failed") # Control IN SET_INTERFACE restore interfejs settings - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, CTRL_RECIPIENT_INTERFACE) request = REQUEST_SET_INTERFACE value = 0 # Interface setting index From 13651175192c85c61eabb7a7cb71d5bbf07d4d84 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Tue, 17 Apr 2018 13:57:05 +0200 Subject: [PATCH 042/488] target: arch_pro enable USBDEVICE support --- targets/targets.json | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/targets/targets.json b/targets/targets.json index 6efc4edb5b9..8a2d6a5870e 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -276,7 +276,7 @@ "extra_labels": ["NXP", "LPC176X", "NXP_EMAC"], "macros": ["TARGET_LPC1768"], "inherits": ["LPCTarget"], - "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "EMAC", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"], + "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "EMAC", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH", "USBDEVICE"], "release_versions": ["2", "5"], "device_name": "LPC1768", "bootloader_supported": true, From 8bef20cddfd084d78291025371c5d7e133c3cc0b Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Tue, 17 Apr 2018 12:47:27 +0200 Subject: [PATCH 043/488] USB reset test fix --- TESTS/usb_device/basic/main.cpp | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index a9c08b214c7..105913392e2 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -112,29 +112,28 @@ void device_reset_test() if (strcmp(_value, "false") != 0) { USBTester serial(vendor_id, product_id, product_release, true); - - greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); serial.clear_reset_count(); - // Wait for host before terminating + greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); while(serial.get_reset_count() == 0); + // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); TEST_ASSERT_EQUAL_STRING("pass", _key); while(!serial.configured()); - greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); serial.clear_reset_count(); - // Wait for host before terminating + greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); while(serial.get_reset_count() == 0); + // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); TEST_ASSERT_EQUAL_STRING("pass", _key); while(!serial.configured()); - greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); serial.clear_reset_count(); - // Wait for host before terminating + greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); while(serial.get_reset_count() == 0); + // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); TEST_ASSERT_EQUAL_STRING("pass", _key); From 59c112be7e8e36c7bc4781da7206507b69aaaaca Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Mon, 16 Apr 2018 09:23:21 +0200 Subject: [PATCH 044/488] USBDevice - add support for deconfiguration --- TESTS/usb_device/basic/USBTester.cpp | 109 ++++++++++++++++----------- TESTS/usb_device/basic/USBTester.h | 9 ++- 2 files changed, 74 insertions(+), 44 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index 8dfed5ff004..70b89e906b4 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -37,8 +37,9 @@ #define MIN_EP_SIZE 8 -USBTester::USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): USBDevice(vendor_id, product_id, product_release), - reset_count(0), suspend_count(0), resume_count(0) +USBTester::USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): + USBDevice(vendor_id, product_id, product_release), reset_count(0), suspend_count(0), + resume_count(0), interface_set(NONE), configuration_set(NONE) { EndpointResolver resolver(endpoint_table()); @@ -86,6 +87,16 @@ void USBTester::suspend(bool suspended) } } +void USBTester::remove_endpoints() +{ + if(configuration_set == 1) { + endpoint_remove(int_in); + endpoint_remove(int_out); + endpoint_remove(bulk_in); + endpoint_remove(bulk_out); + } +} + const char *USBTester::get_serial_desc_string() { return get_desc_string(string_iserial_desc()); @@ -105,8 +116,16 @@ const char *USBTester::get_iproduct_desc_string() void USBTester::callback_state_change(DeviceState new_state) { - // Nothing to do -}; + if (new_state != Configured) { + configuration_set = NONE; + interface_set = NONE; + } +} + +void USBTester::callback_reset() +{ + ++reset_count; +} void USBTester::callback_request(const setup_packet_t *setup) { @@ -196,57 +215,61 @@ void USBTester::callback_request_xfer_done(const setup_packet_t *setup, bool abo // configuration is not supported. void USBTester::callback_set_configuration(uint8_t configuration) { - if (configuration != DEFAULT_CONFIGURATION) { + if (configuration == DEFAULT_CONFIGURATION) { + complete_set_configuration(set_configuration(configuration)); + } else { complete_set_configuration(false); - return; } +} - // Configure endpoints > 0 - endpoint_add(int_in, MAX_EP_SIZE, USB_EP_TYPE_INT); - endpoint_add(int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); - read_start(int_out, int_buf, sizeof(int_buf)); - endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); - endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); - read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); - - complete_set_configuration(true); +bool USBTester::set_configuration(uint16_t configuration) +{ + if(set_interface(configuration, 0, 0)) { + configuration_set = configuration; + return true; + } + return false; } void USBTester::callback_set_interface(uint16_t interface, uint8_t alternate) { - if (interface == 0 && alternate == 0) { - endpoint_remove(int_in); - endpoint_remove(int_out); - endpoint_remove(bulk_in); - endpoint_remove(bulk_out); + bool success = set_interface(configuration_set, interface, alternate); + complete_set_interface(success); +} - endpoint_add(int_in, MAX_EP_SIZE, USB_EP_TYPE_INT); - endpoint_add(int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); - read_start(int_out, int_buf, sizeof(int_buf)); - endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); - endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); - read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); +bool USBTester::set_interface(uint16_t configuration, uint16_t interface, uint16_t alternate) +{ + bool success = false; - complete_set_interface(true); - return; - } - if (interface == 0 && alternate == 1) { - endpoint_remove(int_in); - endpoint_remove(int_out); - endpoint_remove(bulk_in); - endpoint_remove(bulk_out); + if (configuration == 1) { + if (interface == 0 && alternate == 0) { + remove_endpoints(); - endpoint_add(int_in, MIN_EP_SIZE, USB_EP_TYPE_INT); - endpoint_add(int_out, MIN_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); - read_start(int_out, int_buf, sizeof(int_buf)); - endpoint_add(bulk_in, MIN_EP_SIZE, USB_EP_TYPE_BULK); - endpoint_add(bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); - read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); + endpoint_add(int_in, MAX_EP_SIZE, USB_EP_TYPE_INT); + endpoint_add(int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); + read_start(int_out, int_buf, sizeof(int_buf)); + endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); + endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); + read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); - complete_set_interface(true); - return; + interface_set = interface; + success = true; + } + if (interface == 0 && alternate == 1) { + remove_endpoints(); + + endpoint_add(int_in, MIN_EP_SIZE, USB_EP_TYPE_INT); + endpoint_add(int_out, MIN_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); + read_start(int_out, int_buf, sizeof(int_buf)); + endpoint_add(bulk_in, MIN_EP_SIZE, USB_EP_TYPE_BULK); + endpoint_add(bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); + read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); + + interface_set = interface; + success = true; + } } - complete_set_interface(false); + return success; } const uint8_t *USBTester::device_desc() diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index b7005c98c0d..4b286b3e971 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -55,8 +55,15 @@ class USBTester: public USBDevice { void clear_resume_count() { resume_count = 0; } private: + + enum { NONE = -1 }; const char *get_desc_string(const uint8_t *desc); virtual void suspend(bool suspended); + void remove_endpoints(); + bool set_configuration(uint16_t configuration); + bool set_interface(uint16_t configuration, uint16_t interface, uint16_t alternate); + int16_t interface_set; + int16_t configuration_set; protected: @@ -107,7 +114,7 @@ class USBTester: public USBDevice { virtual void callback_set_interface(uint16_t interface, uint8_t alternate); virtual void epbulk_out_callback(usb_ep_t endpoint); virtual void epint_out_callback(usb_ep_t endpoint); - virtual void callback_reset() { ++reset_count; } + virtual void callback_reset(); uint8_t ctrl_buf[2048]; }; From 9907c1a3dd271e66c615c5f1c18e2c46a229897b Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Mon, 16 Apr 2018 10:30:57 +0200 Subject: [PATCH 045/488] USBDevice - add multiconfiguration support --- TESTS/usb_device/basic/USBTester.cpp | 10 +++++++--- TESTS/usb_device/basic/USBTester.h | 3 ++- usb/device/USBDevice/USBDevice.cpp | 29 +++++++++++++++------------- usb/device/USBDevice/USBDevice.h | 6 ++++-- usb/device/USBSerial/USBCDC.cpp | 12 ++++++++---- usb/device/USBSerial/USBCDC.h | 3 ++- 6 files changed, 39 insertions(+), 24 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index 70b89e906b4..a6010c7be30 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -52,7 +52,7 @@ USBTester::USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_r MBED_ASSERT(resolver.valid()); queue = mbed_highprio_event_queue(); - configuration_desc(); + configuration_desc(0); init(); USBDevice::connect(connect_blocking); @@ -321,7 +321,7 @@ const uint8_t *USBTester::string_iproduct_desc() #define CONFIG1_DESC_SIZE (9+9+7+7+7+7 + 9+7+7+7+7) -const uint8_t *USBTester::configuration_desc() +const uint8_t *USBTester::configuration_desc(uint8_t index) { static const uint8_t config_descriptor[] = { // configuration descriptor @@ -434,7 +434,11 @@ const uint8_t *USBTester::configuration_desc() 1 // bInterval }; - return config_descriptor; + if (index == 0) { + return config_descriptor; + } else { + return NULL; + } } diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index 4b286b3e971..332507882e1 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -91,9 +91,10 @@ class USBTester: public USBDevice { /* * Get configuration descriptor * + * @param index descriptor index * @returns pointer to the configuration descriptor */ - virtual const uint8_t *configuration_desc(); + virtual const uint8_t *configuration_desc(uint8_t index); protected: uint8_t bulk_in; diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 611f91b1e1a..d0a915febd0 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -76,22 +76,25 @@ bool USBDevice::_request_get_descriptor() } break; case CONFIGURATION_DESCRIPTOR: - if (configuration_desc() != NULL) { - if ((configuration_desc()[0] == CONFIGURATION_DESCRIPTOR_LENGTH) \ - && (configuration_desc()[1] == CONFIGURATION_DESCRIPTOR)) { + { + const uint8_t idx = DESCRIPTOR_INDEX(_transfer.setup.wValue); + if (configuration_desc(idx) != NULL) { + if ((configuration_desc(idx)[0] == CONFIGURATION_DESCRIPTOR_LENGTH) \ + && (configuration_desc(idx)[1] == CONFIGURATION_DESCRIPTOR)) { #ifdef DEBUG printf("conf descr request\r\n"); #endif /* Get wTotalLength */ - _transfer.remaining = configuration_desc()[2] \ - | (configuration_desc()[3] << 8); + _transfer.remaining = configuration_desc(idx)[2] \ + | (configuration_desc(idx)[3] << 8); - _transfer.ptr = (uint8_t *)configuration_desc(); + _transfer.ptr = (uint8_t *)configuration_desc(idx); _transfer.direction = Send; success = true; } } break; + } case STRING_DESCRIPTOR: #ifdef DEBUG printf("str descriptor\r\n"); @@ -1126,24 +1129,24 @@ void USBDevice::endpoint_unstall(usb_ep_t endpoint) unlock(); } -uint8_t *USBDevice::find_descriptor(uint8_t descriptorType) +uint8_t *USBDevice::find_descriptor(uint8_t descriptorType, uint8_t index) { /* Find a descriptor within the list of descriptors */ /* following a configuration descriptor. */ uint16_t wTotalLength; uint8_t *ptr; - if (configuration_desc() == NULL) { + if (configuration_desc(index) == NULL) { return NULL; } /* Check this is a configuration descriptor */ - if ((configuration_desc()[0] != CONFIGURATION_DESCRIPTOR_LENGTH) \ - || (configuration_desc()[1] != CONFIGURATION_DESCRIPTOR)) { + if ((configuration_desc(index)[0] != CONFIGURATION_DESCRIPTOR_LENGTH) \ + || (configuration_desc(index)[1] != CONFIGURATION_DESCRIPTOR)) { return NULL; } - wTotalLength = configuration_desc()[2] | (configuration_desc()[3] << 8); + wTotalLength = configuration_desc(index)[2] | (configuration_desc(index)[3] << 8); /* Check there are some more descriptors to follow */ if (wTotalLength <= (CONFIGURATION_DESCRIPTOR_LENGTH + 2)) @@ -1153,7 +1156,7 @@ uint8_t *USBDevice::find_descriptor(uint8_t descriptorType) } /* Start at first descriptor after the configuration descriptor */ - ptr = &(((uint8_t *)configuration_desc())[CONFIGURATION_DESCRIPTOR_LENGTH]); + ptr = &(((uint8_t *)configuration_desc(index))[CONFIGURATION_DESCRIPTOR_LENGTH]); do { if (ptr[1] /* bDescriptorType */ == descriptorType) { @@ -1163,7 +1166,7 @@ uint8_t *USBDevice::find_descriptor(uint8_t descriptorType) /* Skip to next descriptor */ ptr += ptr[0]; /* bLength */ - } while (ptr < (configuration_desc() + wTotalLength)); + } while (ptr < (configuration_desc(index) + wTotalLength)); /* Reached end of the descriptors - not found */ return NULL; diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 698591b2e66..5353d50d38f 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -264,9 +264,10 @@ class USBDevice: public USBPhyEvents { /* * Get configuration descriptor * + * @param index descriptor index * @returns pointer to the configuration descriptor */ - virtual const uint8_t *configuration_desc() + virtual const uint8_t *configuration_desc(uint8_t index) { return NULL; }; @@ -465,9 +466,10 @@ class USBDevice: public USBPhyEvents { * Find a descriptor type inside the configuration descriptor * * @param descriptor_type Type of descriptor to find + * @param index Configuration descriptor index ( 0 if only one configuration present ) * @return A descriptor of the given type or NULL if none were found */ - uint8_t *find_descriptor(uint8_t descriptor_type); + uint8_t *find_descriptor(uint8_t descriptor_type, uint8_t index = 0); /** * Get the endpoint table of this device diff --git a/usb/device/USBSerial/USBCDC.cpp b/usb/device/USBSerial/USBCDC.cpp index 519ebe72182..1e5993e7e5d 100644 --- a/usb/device/USBSerial/USBCDC.cpp +++ b/usb/device/USBSerial/USBCDC.cpp @@ -535,7 +535,7 @@ const uint8_t *USBCDC::string_iproduct_desc() #define CONFIG1_DESC_SIZE (9+8+9+5+5+4+5+7+9+7+7) -const uint8_t *USBCDC::configuration_desc() +const uint8_t *USBCDC::configuration_desc(uint8_t index) { uint8_t config_descriptor_temp[] = { // configuration descriptor @@ -635,7 +635,11 @@ const uint8_t *USBCDC::configuration_desc() 0 // bInterval }; - MBED_ASSERT(sizeof(config_descriptor_temp) == sizeof(_config_descriptor)); - memcpy(_config_descriptor, config_descriptor_temp, sizeof(_config_descriptor)); - return _config_descriptor; + if (index == 0) { + MBED_ASSERT(sizeof(config_descriptor_temp) == sizeof(_config_descriptor)); + memcpy(_config_descriptor, config_descriptor_temp, sizeof(_config_descriptor)); + return _config_descriptor; + } else { + return NULL; + } } diff --git a/usb/device/USBSerial/USBCDC.h b/usb/device/USBSerial/USBCDC.h index 1c3c6dc3816..15222bc91a2 100644 --- a/usb/device/USBSerial/USBCDC.h +++ b/usb/device/USBSerial/USBCDC.h @@ -124,9 +124,10 @@ class USBCDC: public USBDevice { /* * Get configuration descriptor * + * @param index descriptor index * @returns pointer to the configuration descriptor */ - virtual const uint8_t *configuration_desc(); + virtual const uint8_t *configuration_desc(uint8_t index); /* * Called by USBCallback_requestCompleted when CDC line coding is changed From ed858ffc31dd45270bcc1be81a9432d6caaf6807 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Mon, 16 Apr 2018 10:35:24 +0200 Subject: [PATCH 046/488] code formatting fixes --- TESTS/usb_device/basic/USBTester.cpp | 10 ++++------ usb/device/USBDevice/USBDevice.cpp | 12 +++++++++++- 2 files changed, 15 insertions(+), 7 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index a6010c7be30..bf700d241d6 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -67,11 +67,11 @@ USBTester::~USBTester() const char *USBTester::get_desc_string(const uint8_t *desc) { - static char ret_string[128] = {}; + static char ret_string[128] = { }; const uint8_t desc_size = desc[0] - 2; const uint8_t *desc_str = &desc[2]; uint32_t j = 0; - for(uint32_t i = 0; i < desc_size; i+=2, j++) { + for (uint32_t i = 0; i < desc_size; i += 2, j++) { ret_string[j] = desc_str[i]; } ret_string[j] = '\0'; @@ -80,7 +80,7 @@ const char *USBTester::get_desc_string(const uint8_t *desc) void USBTester::suspend(bool suspended) { - if(suspended) { + if (suspended) { ++suspend_count; } else { ++resume_count; @@ -146,7 +146,7 @@ void USBTester::callback_request(const setup_packet_t *setup) case VENDOR_TEST_CTRL_OUT: result = Receive; data = ctrl_buf; - size = setup->wValue < 8 ? setup->wValue : 8; + size = setup->wValue < 8 ? setup->wValue : 8; break; case VENDOR_TEST_CTRL_NONE: result = Success; @@ -176,8 +176,6 @@ void USBTester::callback_request(const setup_packet_t *setup) } else { complete_request(result, data, size); } - - } void USBTester::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index d0a915febd0..3b69734e847 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -62,6 +62,7 @@ bool USBDevice::_request_get_descriptor() #endif switch (DESCRIPTOR_TYPE(_transfer.setup.wValue)) { case DEVICE_DESCRIPTOR: + { if (device_desc() != NULL) { if ((device_desc()[0] == DEVICE_DESCRIPTOR_LENGTH) \ && (device_desc()[1] == DEVICE_DESCRIPTOR)) { @@ -75,6 +76,7 @@ bool USBDevice::_request_get_descriptor() } } break; + } case CONFIGURATION_DESCRIPTOR: { const uint8_t idx = DESCRIPTOR_INDEX(_transfer.setup.wValue); @@ -96,6 +98,7 @@ bool USBDevice::_request_get_descriptor() break; } case STRING_DESCRIPTOR: + { #ifdef DEBUG printf("str descriptor\r\n"); #endif @@ -156,21 +159,29 @@ bool USBDevice::_request_get_descriptor() break; } break; + } case INTERFACE_DESCRIPTOR: + { #ifdef DEBUG printf("interface descr\r\n"); #endif + break; + } case ENDPOINT_DESCRIPTOR: + { #ifdef DEBUG printf("endpoint descr\r\n"); #endif /* TODO: Support is optional, not implemented here */ break; + } default: + { #ifdef DEBUG printf("ERROR\r\n"); #endif break; + } } return success; @@ -406,7 +417,6 @@ void USBDevice::_complete_set_configuration() _phy->ep0_stall(); return; } - } bool USBDevice::_request_get_configuration() From e2c927f0e14478a704ae0bcabd4c6cfc0c27da10 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 19 Apr 2018 09:55:07 -0500 Subject: [PATCH 047/488] Add endpoint_remove_all helper function Add the helper function endpoint_remove_all which removes all added endpoints. This is useful for class drivers switching between different USB configurations. --- usb/device/USBDevice/USBDevice.cpp | 15 +++++++++++++++ usb/device/USBDevice/USBDevice.h | 5 +++++ 2 files changed, 20 insertions(+) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 3b69734e847..393c51133d3 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -36,6 +36,7 @@ /* Endpoint macros */ #define EP_INDEXABLE(endpoint) (EP_VALID(endpoint) && !EP_CONTROL(endpoint)) #define EP_TO_INDEX(endpoint) ((((endpoint & 0xf) << 1) | (endpoint & 0x80 ? 1 : 0)) - 2) +#define INDEX_TO_EP(index) ((usb_ep_t)((((index) >> 1) | (index & 1 ? 0x80 : 0)) + 1)) #define EP_VALID(endpoint) (((endpoint) & ~0x8F) == 0) #define EP_CONTROL(endpoint) (((endpoint) & 0xF) == 0) #define EP_RX(endpoint) ((endpoint) & 0x80) @@ -1101,6 +1102,20 @@ void USBDevice::endpoint_remove(usb_ep_t endpoint) unlock(); } +void USBDevice::endpoint_remove_all() +{ + lock(); + + for (uint32_t i = 0; i < sizeof(_endpoint_info) / sizeof(_endpoint_info[0]); i++) { + endpoint_info_t *info = _endpoint_info + i; + if (info->flags & ENDPOINT_ENABLED) { + endpoint_remove(INDEX_TO_EP(i)); + } + } + + unlock(); +} + void USBDevice::endpoint_stall(usb_ep_t endpoint) { lock(); diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 5353d50d38f..91bb7513363 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -175,6 +175,11 @@ class USBDevice: public USBPhyEvents { */ void endpoint_remove(usb_ep_t endpoint); + /** + * Remove all non-zero endpoints + */ + void endpoint_remove_all(); + /** * Stall an endpoint * From 74aa13a00a267ed3034ce36689924808637d9409 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Mon, 23 Apr 2018 11:54:50 +0200 Subject: [PATCH 048/488] USBDevice: endpoint_add/read_start functions return value fix --- usb/device/USBDevice/USBDevice.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 393c51133d3..fdc49a83eac 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -1063,8 +1063,8 @@ bool USBDevice::endpoint_add(usb_ep_t endpoint, uint32_t max_packet_size, usb_ep MBED_ASSERT(!(info->flags & ENDPOINT_ENABLED)); MBED_ASSERT(max_packet_size <= 1024); - bool ret = false; - if (_phy->endpoint_add(endpoint, max_packet_size, type)) { + bool ret = _phy->endpoint_add(endpoint, max_packet_size, type); + if (ret) { info->callback = callback; info->flags |= ENDPOINT_ENABLED; info->pending = 0; @@ -1366,7 +1366,7 @@ bool USBDevice::read_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size unlock(); - return true; + return ret; } uint32_t USBDevice::read_finish(usb_ep_t endpoint) From 68b82976764ac223fe94b527d748c746b70949ea Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sun, 22 Apr 2018 22:14:47 -0500 Subject: [PATCH 049/488] Prevent Kinetis USB setup packets at wrong time When disconnecting USB clear all pending interrupts. This ensures that pending setup packets are dropped rather than being triggered after disconnect. --- usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp index 84c50d94b6c..89fca0f81c4 100644 --- a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp +++ b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp @@ -203,6 +203,10 @@ void USBPhyHw::disconnect() USB0->CTL &= ~USB_CTL_USBENSOFEN_MASK; // Pull up disable USB0->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK; + + while (USB0->ISTAT) { + USB0->ISTAT = 0xFF; + } } void USBPhyHw::configure() From 50b6fe780891ff498047b892a1f9400b4abedaa8 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 23 Apr 2018 17:58:05 -0500 Subject: [PATCH 050/488] Fix Kinetis USB disconnect When disconnecting in the middle of a setup packet USB stops working even after being re-connected. This is because the setup packet suspended endpoint events but nothing resumed endpoint events. This patch adds code to resume endpoint events in the reset handler. --- usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp index 89fca0f81c4..c8a55e1a667 100644 --- a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp +++ b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp @@ -565,6 +565,7 @@ void USBPhyHw::process() Data1 = 0x55555555; USB0->CTL |= USB_CTL_ODDRST_MASK; + USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; USB0->ISTAT = 0xFF; // clear all interrupt status flags USB0->ERRSTAT = 0xFF; // clear all error flags From fbfdd09627374951806e056cf4c3da521d74b914 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 23 Apr 2018 18:03:34 -0500 Subject: [PATCH 051/488] Make USB disconnect + connect time explicit Create the define MIN_DISCONNECT_TIME_US to be used as the amount of time that must pass between connect and disconnect for the host to reliably detect reconnection. Replace the wait calls delaying for this value to wait_us to indicate the precision required. Finally, remove the unnecessary calls to wait_ms in repeated_construction_destruction_test. --- TESTS/usb_device/basic/main.cpp | 34 +++++++++++++++------------------ 1 file changed, 15 insertions(+), 19 deletions(-) diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index 105913392e2..f18168013a9 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -23,6 +23,12 @@ #include "USBTester.h" +// If disconnect() + connect() occur too fast the reset event will be dropped. +// At a minimum there should be a 200us delay between disconnect and connect. +// To be on the safe side I would recommend a 1ms delay, so the host controller +// has an entire USB frame to detect the disconnect. +#define MIN_DISCONNECT_TIME_US 1000 + #if !defined(DEVICE_USBDEVICE) || !DEVICE_USBDEVICE #error [NOT_SUPPORTED] USB Device not supported for this target #endif @@ -166,11 +172,7 @@ void device_soft_reconnection_test() for(int i = 0; i < reconnect_try_count; i++) { serial.disconnect(); - // If disconnect() + connect() occur too fast the reset event will be dropped. - // At a minimum there should be a 200us delay between disconnect and connect. - // To be on the safe side I would recommend a 1ms delay, so the host controller - // has an entire USB frame to detect the disconnect. - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); serial.connect(); greentea_send_kv("device_soft_reconnection_test", serial.get_serial_desc_string()); // Wait for host before terminating @@ -179,13 +181,13 @@ void device_soft_reconnection_test() } serial.disconnect(); - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); serial.connect(); serial.disconnect(); - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); serial.connect(); serial.disconnect(); - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); serial.connect(); greentea_send_kv("device_soft_reconnection_test", serial.get_serial_desc_string()); // Wait for host before terminating @@ -228,50 +230,44 @@ void repeated_construction_destruction_test() { USBTester serial(vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); - wait_ms(1); } - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); { USBTester serial(vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); - wait_ms(1); } - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); { USBTester serial(vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); - wait_ms(1); } - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); { USBTester serial(vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); - wait_ms(1); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); TEST_ASSERT_EQUAL_STRING("pass", _key); } - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); { USBTester serial(vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); - wait_ms(1); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); TEST_ASSERT_EQUAL_STRING("pass", _key); } - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); { USBTester serial(vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); - wait_ms(1); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); From 0d91c513ebcdb02b072116fd0c065f56459a37d2 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 23 Apr 2018 18:50:28 -0500 Subject: [PATCH 052/488] Explicitly specify USBPhy used for testing Add a parameter to the USBPhy class so mock or wrapper USBPhy classes can be used. --- TESTS/usb_device/basic/USBTester.cpp | 4 ++-- TESTS/usb_device/basic/USBTester.h | 2 +- TESTS/usb_device/basic/main.cpp | 32 +++++++++++++++++----------- 3 files changed, 22 insertions(+), 16 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index bf700d241d6..8ca9b11c248 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -37,8 +37,8 @@ #define MIN_EP_SIZE 8 -USBTester::USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): - USBDevice(vendor_id, product_id, product_release), reset_count(0), suspend_count(0), +USBTester::USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): + USBDevice(phy, vendor_id, product_id, product_release), reset_count(0), suspend_count(0), resume_count(0), interface_set(NONE), configuration_set(NONE) { diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index 332507882e1..d6c534ddc74 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -36,7 +36,7 @@ class USBTester: public USBDevice { * @param product_release Your preoduct_release * @param connect_blocking define if the connection must be blocked if USB not plugged in */ - USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); + USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); ~USBTester(); diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index f18168013a9..8ccd4c5e4e7 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -22,6 +22,7 @@ #include "utest/utest.h" #include "USBTester.h" +#include "usb_phy_api.h" // If disconnect() + connect() occur too fast the reset event will be dropped. // At a minimum there should be a 200us delay between disconnect and connect. @@ -35,6 +36,11 @@ using namespace utest::v1; +static USBPhy *get_phy() +{ + return get_usb_phy(); +} + void control_basic_test() { uint16_t vendor_id = 0x0d28; @@ -45,7 +51,7 @@ void control_basic_test() char str[128] = {}; { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); sprintf (str, "%s %d %d", serial.get_serial_desc_string(), vendor_id, product_id); greentea_send_kv("control_basic_test", str); // Wait for host before terminating @@ -63,7 +69,7 @@ void control_stall_test() char _value[128] = {}; { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); greentea_send_kv("control_stall_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); @@ -80,7 +86,7 @@ void control_sizes_test() char _value[128] = {}; { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); greentea_send_kv("control_sizes_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); @@ -97,7 +103,7 @@ void control_stress_test() char _value[128] = {}; { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); greentea_send_kv("control_stress_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); @@ -117,7 +123,7 @@ void device_reset_test() greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); if (strcmp(_value, "false") != 0) { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); serial.clear_reset_count(); greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); while(serial.get_reset_count() == 0); @@ -163,7 +169,7 @@ void device_soft_reconnection_test() const uint32_t reconnect_try_count = 3; { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); greentea_send_kv("device_soft_reconnection_test", serial.get_serial_desc_string()); // Wait for host before terminating @@ -205,7 +211,7 @@ void device_suspend_resume_test() char _value[128] = {}; { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); greentea_send_kv("device_suspend_resume_test", serial.get_serial_desc_string()); printf("[1] suspend_count: %d resume_count: %d\n", serial.get_suspend_count(), serial.get_resume_count()); serial.clear_suspend_count(); @@ -228,25 +234,25 @@ void repeated_construction_destruction_test() char _value[128] = {}; { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); } wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); } wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); } wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating @@ -256,7 +262,7 @@ void repeated_construction_destruction_test() wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating @@ -266,7 +272,7 @@ void repeated_construction_destruction_test() wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating From 4b6ea71be04e15843c494e3abb82acd62cf4dc45 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Wed, 25 Apr 2018 15:15:40 +0200 Subject: [PATCH 053/488] Extend USB test class configuration --- TESTS/usb_device/basic/USBTester.cpp | 422 +++++++++++++++++++++------ TESTS/usb_device/basic/USBTester.h | 9 +- 2 files changed, 338 insertions(+), 93 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index 8ca9b11c248..24ca3df704c 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -21,6 +21,7 @@ #include "EndpointResolver.h" #define DEFAULT_CONFIGURATION (1) +#define LAST_CONFIGURATION (2) #define VENDOR_TEST_CTRL_IN 1 #define VENDOR_TEST_CTRL_OUT 2 @@ -39,7 +40,7 @@ USBTester::USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): USBDevice(phy, vendor_id, product_id, product_release), reset_count(0), suspend_count(0), - resume_count(0), interface_set(NONE), configuration_set(NONE) + resume_count(0), interface_0_alt_set(NONE), interface_1_alt_set(NONE), configuration_set(NONE) { EndpointResolver resolver(endpoint_table()); @@ -87,16 +88,6 @@ void USBTester::suspend(bool suspended) } } -void USBTester::remove_endpoints() -{ - if(configuration_set == 1) { - endpoint_remove(int_in); - endpoint_remove(int_out); - endpoint_remove(bulk_in); - endpoint_remove(bulk_out); - } -} - const char *USBTester::get_serial_desc_string() { return get_desc_string(string_iserial_desc()); @@ -112,13 +103,12 @@ const char *USBTester::get_iproduct_desc_string() return get_desc_string(string_iserial_desc()); } - - void USBTester::callback_state_change(DeviceState new_state) { if (new_state != Configured) { configuration_set = NONE; - interface_set = NONE; + interface_0_alt_set = NONE; + interface_1_alt_set = NONE; } } @@ -205,7 +195,7 @@ void USBTester::callback_request_xfer_done(const setup_packet_t *setup, bool abo break; } } - complete_request_xfer_done(true); + complete_request_xfer_done(result); } // Called in ISR context @@ -213,58 +203,146 @@ void USBTester::callback_request_xfer_done(const setup_packet_t *setup, bool abo // configuration is not supported. void USBTester::callback_set_configuration(uint8_t configuration) { - if (configuration == DEFAULT_CONFIGURATION) { - complete_set_configuration(set_configuration(configuration)); - } else { - complete_set_configuration(false); + bool ret = false; + + if (configuration >= DEFAULT_CONFIGURATION && configuration <= LAST_CONFIGURATION) { + endpoint_remove_all(); + ret = set_configuration(configuration); + } + + complete_set_configuration(ret); +} + +bool USBTester::setup_iterface(uint8_t ep_in, uint8_t ep_out, uint32_t ep_size, usb_ep_type_t ep_type, + uint8_t *buf, uint32_t buf_size, void (USBTester::*callback)(usb_ep_t endpoint)) +{ + bool success = false; + + success = endpoint_add(ep_in, ep_size, ep_type); + success &= endpoint_add(ep_out, ep_size, ep_type, callback); + success &= read_start(ep_out, buf, buf_size); + return success; +} + +void USBTester::remove_iterface(uint16_t interface) +{ + if (configuration_set == 1) { + if (interface == 0) { + endpoint_remove(bulk_in); + endpoint_remove(bulk_out); + interface_0_alt_set = NONE; + } + if (interface == 1) { + endpoint_remove(int_in); + endpoint_remove(int_out); + interface_1_alt_set = NONE; + } + } + if (configuration_set == 2) { + if (interface == 0) { + endpoint_remove(int_in); + endpoint_remove(int_out); + interface_0_alt_set = NONE; + } + if (interface == 1) { + endpoint_remove(bulk_in); + endpoint_remove(bulk_out); + interface_1_alt_set = NONE; + } } } bool USBTester::set_configuration(uint16_t configuration) { - if(set_interface(configuration, 0, 0)) { + bool success = false; + // set 0 alt setting for each interface + if (configuration == 1) { + // interface 0 alternate 0 + success = setup_iterface(bulk_in, bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, + bulk_buf, sizeof(bulk_buf), &USBTester::epbulk_out_callback); + // interface 1 alternate 0 + success &= setup_iterface(int_in, int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, + int_buf, sizeof(int_buf), &USBTester::epint_out_callback); + } else if (configuration == 2) { + // interface 0 alternate 0 + success = setup_iterface(int_in, int_out, MIN_EP_SIZE, USB_EP_TYPE_INT, + int_buf, sizeof(int_buf), &USBTester::epint_out_callback); + // interface 1 alternate 0 + success &= setup_iterface(bulk_in, bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, + bulk_buf, sizeof(bulk_buf), &USBTester::epbulk_out_callback); + } + if (success) { configuration_set = configuration; - return true; + interface_0_alt_set = interface_1_alt_set = 0; } - return false; + return success; } void USBTester::callback_set_interface(uint16_t interface, uint8_t alternate) { - bool success = set_interface(configuration_set, interface, alternate); - complete_set_interface(success); + complete_set_interface(set_interface(interface, alternate)); } -bool USBTester::set_interface(uint16_t configuration, uint16_t interface, uint16_t alternate) +bool USBTester::set_interface(uint16_t interface, uint16_t alternate) { bool success = false; - if (configuration == 1) { - if (interface == 0 && alternate == 0) { - remove_endpoints(); - - endpoint_add(int_in, MAX_EP_SIZE, USB_EP_TYPE_INT); - endpoint_add(int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); - read_start(int_out, int_buf, sizeof(int_buf)); - endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); - endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); - read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); - - interface_set = interface; - success = true; + if (interface == 0) { + if (configuration_set == 1) { + if (alternate == 0) { + remove_iterface(interface); + success = setup_iterface(bulk_in, bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, + bulk_buf, sizeof(bulk_buf), &USBTester::epbulk_out_callback); + } + if (alternate == 1) { + remove_iterface(interface); + success = setup_iterface(bulk_in, bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, + bulk_buf, sizeof(bulk_buf), &USBTester::epbulk_out_callback); + } + } + if (configuration_set == 2) { + if (alternate == 0) { + remove_iterface(interface); + success = setup_iterface(int_in, int_out, MIN_EP_SIZE, USB_EP_TYPE_INT, + int_buf, sizeof(int_buf), &USBTester::epint_out_callback); + } + if (alternate == 1) { + remove_iterface(interface); + success = setup_iterface(int_in, int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, + int_buf, sizeof(int_buf), &USBTester::epint_out_callback); + } + } + if (success) { + interface_0_alt_set = alternate; + } + } + if (interface == 1) { + if (configuration_set == 1) { + if (alternate == 0) { + remove_iterface(interface); + success = setup_iterface(int_in, int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, + int_buf, sizeof(int_buf), &USBTester::epint_out_callback); + } + if (alternate == 1) { + remove_iterface(interface); + success = setup_iterface(int_in, int_out, MIN_EP_SIZE, USB_EP_TYPE_INT, + int_buf, sizeof(int_buf), &USBTester::epint_out_callback); + } } - if (interface == 0 && alternate == 1) { - remove_endpoints(); - - endpoint_add(int_in, MIN_EP_SIZE, USB_EP_TYPE_INT); - endpoint_add(int_out, MIN_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); - read_start(int_out, int_buf, sizeof(int_buf)); - endpoint_add(bulk_in, MIN_EP_SIZE, USB_EP_TYPE_BULK); - endpoint_add(bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); - read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); - - interface_set = interface; - success = true; + if (configuration_set == 2) { + if (alternate == 0) { + remove_iterface(interface); + success = setup_iterface(bulk_in, bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, + bulk_buf, sizeof(bulk_buf), &USBTester::epbulk_out_callback); + } + if (alternate == 1) { + remove_iterface(interface); + success = setup_iterface(bulk_in, bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, + bulk_buf, sizeof(bulk_buf), &USBTester::epbulk_out_callback); + } + } + if (success) { + interface_1_alt_set = alternate; } } return success; @@ -287,7 +365,7 @@ const uint8_t *USBTester::device_desc() 1, // iManufacturer 2, // iProduct 3, // iSerialNumber - 1 // bNumConfigurations + 2 // bNumConfigurations }; MBED_ASSERT(sizeof(device_descriptor_temp) == sizeof(device_descriptor)); memcpy(device_descriptor, device_descriptor_temp, sizeof(device_descriptor)); @@ -317,30 +395,31 @@ const uint8_t *USBTester::string_iproduct_desc() } -#define CONFIG1_DESC_SIZE (9+9+7+7+7+7 + 9+7+7+7+7) +#define CONFIG_1_DESC_SIZE (9+9+7+7 + 9+7+7 + 9+7+7 + 9+7+7) +#define CONFIG_2_DESC_SIZE (9+9+7+7 + 9+7+7 + 9+7+7 + 9+7+7) const uint8_t *USBTester::configuration_desc(uint8_t index) { - static const uint8_t config_descriptor[] = { + static const uint8_t config_1_descriptor[] = { // configuration descriptor - 9, // bLength - 2, // bDescriptorType - LSB(CONFIG1_DESC_SIZE), // wTotalLength - MSB(CONFIG1_DESC_SIZE), - 1, // bNumInterfaces - 1, // bConfigurationValue - 0, // iConfiguration - 0x80, // bmAttributes - 50, // bMaxPower + CONFIGURATION_DESCRIPTOR_LENGTH,// bLength + CONFIGURATION_DESCRIPTOR, // bDescriptorType + LSB(CONFIG_1_DESC_SIZE), // wTotalLength + MSB(CONFIG_1_DESC_SIZE), + 2, // bNumInterfaces + 1, // bConfigurationValue + 0, // iConfiguration + 0x80, // bmAttributes + 50, // bMaxPower // Interface 0 setting 0 // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 - 9, // bLength - 4, // bDescriptorType + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType 0, // bInterfaceNumber 0, // bAlternateSetting - 4, // bNumEndpoints + 2, // bNumEndpoints 0xFF, // bInterfaceClass 0xFF, // bInterfaceSubClass 0xFF, // bInterfaceProtocol @@ -351,26 +430,70 @@ const uint8_t *USBTester::configuration_desc(uint8_t index) ENDPOINT_DESCRIPTOR, // bDescriptorType bulk_in, // bEndpointAddress E_BULK, // bmAttributes (0x02=bulk) - LSB(MAX_EP_SIZE),// wMaxPacketSize (LSB) - MSB(MAX_EP_SIZE),// wMaxPacketSize (MSB) - 0, // bInterval + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType bulk_out, // bEndpointAddress E_BULK, // bmAttributes (0x02=bulk) - LSB(MAX_EP_SIZE),// wMaxPacketSize (LSB) - MSB(MAX_EP_SIZE),// wMaxPacketSize (MSB) - 0, // bInterval + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // Interface 0 setting 1 + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0, // bInterfaceNumber + 1, // bAlternateSetting + 2, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_in, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_out, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // Interface 1 setting 0 + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 1, // bInterfaceNumber + 0, // bAlternateSetting + 2, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType int_in, // bEndpointAddress E_INTERRUPT, // bmAttributes (0x03=interrupt) - LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) - MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) 1, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 @@ -378,18 +501,18 @@ const uint8_t *USBTester::configuration_desc(uint8_t index) ENDPOINT_DESCRIPTOR, // bDescriptorType int_out, // bEndpointAddress E_INTERRUPT, // bmAttributes (0x03=interrupt) - LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) - MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) 1, // bInterval - // Interface 0 setting 1 + // Interface 1 setting 1 // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 - 9, // bLength - 4, // bDescriptorType - 0, // bInterfaceNumber + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 1, // bInterfaceNumber 1, // bAlternateSetting - 4, // bNumEndpoints + 2, // bNumEndpoints 0xFF, // bInterfaceClass 0xFF, // bInterfaceSubClass 0xFF, // bInterfaceProtocol @@ -398,20 +521,46 @@ const uint8_t *USBTester::configuration_desc(uint8_t index) // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType - bulk_in, // bEndpointAddress - E_BULK, // bmAttributes (0x02=bulk) + int_in, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=interrupt) LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) - 0, // bInterval + 1, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType - bulk_out, // bEndpointAddress - E_BULK, // bmAttributes (0x02=bulk) + int_out, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=interrupt) LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) - 0, // bInterval + 1 // bInterval + }; + + static const uint8_t config_2_descriptor[] = { + // configuration descriptor + CONFIGURATION_DESCRIPTOR_LENGTH,// bLength + CONFIGURATION_DESCRIPTOR, // bDescriptorType + LSB(CONFIG_2_DESC_SIZE), // wTotalLength + MSB(CONFIG_2_DESC_SIZE), + 2, // bNumInterfaces + 2, // bConfigurationValue + 0, // iConfiguration + 0x80, // bmAttributes + 50, // bMaxPower + + // Interface 0 setting 0 + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0, // bInterfaceNumber + 0, // bAlternateSetting + 2, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength @@ -429,17 +578,111 @@ const uint8_t *USBTester::configuration_desc(uint8_t index) E_INTERRUPT, // bmAttributes (0x03=interrupt) LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) - 1 // bInterval + 1, // bInterval + + // Interface 0 setting 1 + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0, // bInterfaceNumber + 1, // bAlternateSetting + 2, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + int_in, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=interrupt) + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + int_out, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=interrupt) + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // Interface 1 setting 0 + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 1, // bInterfaceNumber + 0, // bAlternateSetting + 2, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_in, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_out, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // Interface 1 setting 1 + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 1, // bInterfaceNumber + 1, // bAlternateSetting + 2, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_in, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_out, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + 1 // bInterval }; + if (index == 0) { - return config_descriptor; + return config_1_descriptor; + } else if (index == 1) { + return config_2_descriptor; } else { return NULL; } } - void USBTester::epint_out_callback(usb_ep_t endpoint) { read_finish(endpoint); @@ -450,4 +693,3 @@ void USBTester::epbulk_out_callback(usb_ep_t endpoint) read_finish(endpoint); read_start(endpoint, bulk_buf, sizeof(bulk_buf)); } - diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index d6c534ddc74..9faca7f5677 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -59,10 +59,13 @@ class USBTester: public USBDevice { enum { NONE = -1 }; const char *get_desc_string(const uint8_t *desc); virtual void suspend(bool suspended); - void remove_endpoints(); bool set_configuration(uint16_t configuration); - bool set_interface(uint16_t configuration, uint16_t interface, uint16_t alternate); - int16_t interface_set; + bool set_interface(uint16_t interface, uint16_t alternate); + bool setup_iterface(uint8_t ep_in, uint8_t ep_out, uint32_t ep_size, usb_ep_type_t ep_type, + uint8_t *buf, uint32_t buf_size, void (USBTester::*callback)(usb_ep_t endpoint)); + void remove_iterface(uint16_t interface); + int16_t interface_0_alt_set; + int16_t interface_1_alt_set; int16_t configuration_set; protected: From 924190e7715f98d721a0f3a418aef3cf8f7c1af2 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Thu, 26 Apr 2018 15:18:57 +0200 Subject: [PATCH 054/488] pyusb_basic test formatting fixes --- TESTS/host_tests/pyusb_basic.py | 300 ++++++++++++++++---------------- 1 file changed, 154 insertions(+), 146 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index c361cbee03c..1b7b401f87b 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -55,17 +55,17 @@ def get_interface(dev, interface, alternate=0): VENDOR_TEST_CTRL_OUT_SIZES = 10 VENDOR_TEST_UNSUPPORTED_REQUEST = 32 -REQUEST_GET_STATUS = 0 # done -REQUEST_CLEAR_FEATURE = 1 # done -REQUEST_SET_FEATURE = 3 # done -REQUEST_SET_ADDRESS = 5 # ??? +REQUEST_GET_STATUS = 0 +REQUEST_CLEAR_FEATURE = 1 +REQUEST_SET_FEATURE = 3 +REQUEST_SET_ADDRESS = 5 REQUEST_GET_DESCRIPTOR = 6 -REQUEST_SET_DESCRIPTOR = 7 # done -REQUEST_GET_CONFIGURATION = 8 # done -REQUEST_SET_CONFIGURATION = 9 # done -REQUEST_GET_INTERFACE = 10 # done -REQUEST_SET_INTERFACE = 11 # done -REQUEST_SYNCH_FRAME = 12 # almost done +REQUEST_SET_DESCRIPTOR = 7 +REQUEST_GET_CONFIGURATION = 8 +REQUEST_SET_CONFIGURATION = 9 +REQUEST_GET_INTERFACE = 10 +REQUEST_SET_INTERFACE = 11 +REQUEST_SYNCH_FRAME = 12 FEATURE_ENDPOINT_HALT = 0 FEATURE_DEVICE_REMOTE_WAKEUP = 1 @@ -269,9 +269,11 @@ def setup(self): self.register_callback('reset_support', self._callback_reset_support) + def result(self): return self.__result + def teardown(self): pass @@ -292,150 +294,18 @@ def lineno(): """Returns the current line number in our program.""" return inspect.currentframe().f_back.f_lineno + def raise_if_different(expected, actual, line, text=''): """Raise a RuntimeError if actual is different than expected.""" if expected != actual: raise RuntimeError('[{}]:{}, {} Got {!r}, expected {!r}'.format(__file__, line, text, actual, expected)) + def raise_unconditionally(line, text=''): """Raise a RuntimeError unconditionally.""" raise RuntimeError('[{}]:{}, {}'.format(__file__, line, text)) -def test_device(serial_number, log=print): - dev = usb.core.find(custom_match=TestMatch(serial_number)) - if dev is None: - log("Device not found") - return - - ## --Control Tests-- ## - #control_basic_test(dev, log) - # Test control IN/OUT/NODATA - control_stall_test(dev, log) - # Invalid control in/out/nodata requests are stalled - # Stall during different points in the control transfer - #control_sizes_test(dev, log) - # Test control requests of various data stage sizes (1,8,16,32,64,255,256,...) - control_stress_test(dev, log) - # normal and delay mode - - ## --Endpoint test-- ## - #for each endpoint - #-test all allowed wMaxPacketSize sizes and transfer types - #-stall tests - #-set/clear stall control request - #-stall at random points of sending/receiveing data - #-test aborting an in progress transfer - #test as many endpoints at once as possible - #test biggest configuration possible - - ## --physical test-- ## - #-reset notification/handling - #-connect/disconnect tests - have device disconnect and then reconnect - #-disconnect during various phases of control transfers and endpoint transfers - #-suspend/resume tests (may not be possible to test with current framework) - #-suspend/resume notifications - - ## -- Stress tests-- ## - #-concurrent tests (all endpoints at once including control) - #-concurrent tests + reset + delay - - ## -- other tests-- ## - #-report throughput for in/out of control, bulk, interrupt and iso transfers - #-verify that construction/destruction repeatedly works gracefully - - intf = get_interface(dev, 0, 0) - - # Find endpoints - bulk_in = None - bulk_out = None - int_in = None - int_out = None - - for endpoint in intf: - log("Processing endpoint %s" % endpoint) - ep_type = endpoint.bmAttributes & 0x3 - if ep_type == 2: - if endpoint.bEndpointAddress & 0x80: - assert bulk_in is None - bulk_in = endpoint - else: - assert bulk_out is None - bulk_out = endpoint - elif ep_type == 3: - if endpoint.bEndpointAddress & 0x80: - assert int_in is None - int_in = endpoint - else: - assert int_out is None - int_out = endpoint - assert bulk_in is not None - assert bulk_out is not None - assert int_in is not None - assert int_out is not None - bulk_out.write("hello" + "x" *256); - int_out.write("world" + "x" *256); - - dev.set_interface_altsetting(0, 1) - - intf = get_interface(dev, 0, 0) - - # Find endpoints - bulk_in = None - bulk_out = None - int_in = None - int_out = None - - for endpoint in intf: - log("Processing endpoint %s" % endpoint) - ep_type = endpoint.bmAttributes & 0x3 - if ep_type == 2: - if endpoint.bEndpointAddress & 0x80: - assert bulk_in is None - bulk_in = endpoint - else: - assert bulk_out is None - bulk_out = endpoint - elif ep_type == 3: - if endpoint.bEndpointAddress & 0x80: - assert int_in is None - int_in = endpoint - else: - assert int_out is None - int_out = endpoint - assert bulk_in is not None - assert bulk_out is not None - assert int_in is not None - assert int_out is not None - bulk_out.write("hello2" + "x" *256); - int_out.write("world2" + "x" *256); - - - t = Thread(target=write_data, args=(bulk_out,)) - t.start() - - for _ in range(10): - request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, - CTRL_RECIPIENT_DEVICE) - request = VENDOR_TEST_CTRL_NONE_DELAY - value = 0 # Always 0 for this request - index = 0 # Communication interface - length = 0 # No data - dev.ctrl_transfer(request_type, request, value, index, length, 5000) - - t.join() - - -def write_data(pipe): - print("Write data running") - count = 0 - for _ in range(40): - pipe.write("Value is %s" % count) - count += 1 - print("Count %s" % count) - time.sleep(0.5) - - def control_basic_test(dev, vendor_id, product_id, log): get_status_test(dev, log) set_clear_feature_test(dev, log) @@ -915,7 +785,6 @@ def control_data_test(dev, sizes_list, log): def control_stress_test(dev, log): - # Test various patterns of control transfers # # Some devices have had problems with back-to-back @@ -1025,6 +894,145 @@ def repeated_construction_destruction_test(log): yield +""" +For documentation purpose until test writing finished +TODO: remove this if not needed anymore + + +def test_device(serial_number, log=print): + dev = usb.core.find(custom_match=TestMatch(serial_number)) + if dev is None: + log("Device not found") + return + + ## --Control Tests-- ## + #control_basic_test(dev, log) + # Test control IN/OUT/NODATA + control_stall_test(dev, log) + # Invalid control in/out/nodata requests are stalled + # Stall during different points in the control transfer + #control_sizes_test(dev, log) + # Test control requests of various data stage sizes (1,8,16,32,64,255,256,...) + control_stress_test(dev, log) + # normal and delay mode + + ## --Endpoint test-- ## + #for each endpoint + #-test all allowed wMaxPacketSize sizes and transfer types + #-stall tests + #-set/clear stall control request + #-stall at random points of sending/receiveing data + #-test aborting an in progress transfer + #test as many endpoints at once as possible + #test biggest configuration possible + + ## --physical test-- ## + #-reset notification/handling + #-connect/disconnect tests - have device disconnect and then reconnect + #-disconnect during various phases of control transfers and endpoint transfers + #-suspend/resume tests (may not be possible to test with current framework) + #-suspend/resume notifications + + ## -- Stress tests-- ## + #-concurrent tests (all endpoints at once including control) + #-concurrent tests + reset + delay + + ## -- other tests-- ## + #-report throughput for in/out of control, bulk, interrupt and iso transfers + #-verify that construction/destruction repeatedly works gracefully + + intf = get_interface(dev, 0, 0) + + # Find endpoints + bulk_in = None + bulk_out = None + int_in = None + int_out = None + + for endpoint in intf: + log("Processing endpoint %s" % endpoint) + ep_type = endpoint.bmAttributes & 0x3 + if ep_type == 2: + if endpoint.bEndpointAddress & 0x80: + assert bulk_in is None + bulk_in = endpoint + else: + assert bulk_out is None + bulk_out = endpoint + elif ep_type == 3: + if endpoint.bEndpointAddress & 0x80: + assert int_in is None + int_in = endpoint + else: + assert int_out is None + int_out = endpoint + assert bulk_in is not None + assert bulk_out is not None + assert int_in is not None + assert int_out is not None + bulk_out.write("hello" + "x" *256); + int_out.write("world" + "x" *256); + + dev.set_interface_altsetting(0, 1) + + intf = get_interface(dev, 0, 0) + + # Find endpoints + bulk_in = None + bulk_out = None + int_in = None + int_out = None + + for endpoint in intf: + log("Processing endpoint %s" % endpoint) + ep_type = endpoint.bmAttributes & 0x3 + if ep_type == 2: + if endpoint.bEndpointAddress & 0x80: + assert bulk_in is None + bulk_in = endpoint + else: + assert bulk_out is None + bulk_out = endpoint + elif ep_type == 3: + if endpoint.bEndpointAddress & 0x80: + assert int_in is None + int_in = endpoint + else: + assert int_out is None + int_out = endpoint + assert bulk_in is not None + assert bulk_out is not None + assert int_in is not None + assert int_out is not None + bulk_out.write("hello2" + "x" *256); + int_out.write("world2" + "x" *256); + + + t = Thread(target=write_data, args=(bulk_out,)) + t.start() + + for _ in range(10): + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_CTRL_NONE_DELAY + value = 0 # Always 0 for this request + index = 0 # Communication interface + length = 0 # No data + dev.ctrl_transfer(request_type, request, value, index, length, 5000) + + t.join() + + +def write_data(pipe): + print("Write data running") + count = 0 + for _ in range(40): + pipe.write("Value is %s" % count) + count += 1 + print("Count %s" % count) + time.sleep(0.5) + + def main(): parser = ArgumentParser(description="USB basic test") parser.add_argument('serial', help='USB serial number of DUT') @@ -1032,6 +1040,6 @@ def main(): ret = test_device(args.serial) print("Test %s" % "passed" if ret else "failed") - if __name__ == "__main__": main() +""" From 0ea49503ee7854f83f6a0c54cc58e5cfcd9c3347 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Thu, 26 Apr 2018 15:42:04 +0200 Subject: [PATCH 055/488] pyusb_basic test add helper functions --- TESTS/host_tests/pyusb_basic.py | 52 +++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 1b7b401f87b..ac3022a3bd6 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -894,6 +894,58 @@ def repeated_construction_destruction_test(log): yield +def release_interfaces(dev): + """ Releases interfaces to allow configuration switch + + Fixes error while configuration change(on Windows machines): + USBError: [Errno None] libusb0-dll:err [set_configuration] can't change configuration, an interface is still in use (claimed) + """ + cfg = dev.get_active_configuration() + for i in range(0, cfg.bNumInterfaces): + usb.util.release_interface(dev, i) + + +def restore_default_configuration(dev): + cfg = dev[1] + cfg.set() + + +def get_status(dev, recipient, index = 0): + """ Get status of the recipient + + Args: + dev - pyusb device + recipient - CTRL_RECIPIENT_DEVICE/CTRL_RECIPIENT_INTERFACE/CTRL_RECIPIENT_ENDPOINT + index - 0 if recipient is device, interface index if recipient is interface, endpoint index if recipient is endpoint + + Returns: + status flag 32b int + """ + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + recipient) + request = REQUEST_GET_STATUS + value = 0 # Always 0 for this request + index = index # recipient index + length = 2 # Always 2 for this request (size of return data) + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] | (ret[1] << 8) + + return ret + + +def get_descriptor(dev, type_index, lang_id, length): + # Control IN GET_DESCRIPTOR - device + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = REQUEST_GET_DESCRIPTOR + value = type_index # Descriptor Type (H) and Descriptor Index (L) + index = lang_id # 0 or Language ID for this request + length = length # Descriptor Length + ret = dev.ctrl_transfer(request_type, request, value, index, length) + + return ret + + """ For documentation purpose until test writing finished TODO: remove this if not needed anymore From 03ce787f03dfe1cbff0d88041bab9813b4aa4386 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Thu, 26 Apr 2018 19:10:23 +0200 Subject: [PATCH 056/488] pyusb_basic test update test code refactoring align test to use device multiconfiguration --- TESTS/host_tests/pyusb_basic.py | 471 +++++++++++++------------------- 1 file changed, 186 insertions(+), 285 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index ac3022a3bd6..109f23d7bb8 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -115,7 +115,7 @@ def _callback_control_basic_test(self, key, value, timestamp): return try: - control_basic_test(dev, vendor_id, product_id, log=print) + control_basic_test(dev, int(vendor_id), int(product_id), log=print) self.report_success() except (RuntimeError) as exc: self.report_error(exc) @@ -307,327 +307,222 @@ def raise_unconditionally(line, text=''): def control_basic_test(dev, vendor_id, product_id, log): + get_set_configuration_test(dev, log) + get_set_interface_test(dev, log) get_status_test(dev, log) set_clear_feature_test(dev, log) - get_set_interface_test(dev, log) - get_set_configuration_test(dev, log) get_descriptor_test(dev, vendor_id, product_id, log) set_descriptor_test(dev, log) #synch_frame_test(dev, log) wait for isochronous endpoint -def get_status_test(dev, log): - # Control IN GET_STATUS on DEVICE - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_DEVICE) - request = REQUEST_GET_STATUS - value = 0 # Always 0 for this request - index = 0 # 0 if recipient is device - length = 2 # Always 2 for this request (size of return data) - ret = dev.ctrl_transfer(request_type, request, value, index, length) - ret = ret[0] | (ret[1] << 8) - # Status bits - # ret == 0b01 (D0)Self Powered - # ret == 0b10 (D1)Remote Wakeup - # (D2 - D15 reserved) Must be set to 0 - if(ret < 0 or ret > 3): - raise_unconditionally(lineno(), "GET_STATUS on DEVICE failed") - - # Control IN GET_STATUS on INTERFACE - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_GET_STATUS - value = 0 # Always 0 for this request - index = 0 # interface index - length = 2 # Always 2 for this request (size of return data) - ret = dev.ctrl_transfer(request_type, request, value, index, length) - ret = ret[0] | (ret[1] << 8) - # Status bits - # ret == 0b0 - # (D0 - D15 reserved) Must be set to 0 - if(ret != 0): - raise_unconditionally(lineno(), "GET_STATUS on INTERFACE failed") - - # Control IN GET_STATUS on ENDPOINT 0 - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_GET_STATUS - value = 0 # Always 0 for this request - index = 0 # endpoint index - length = 2 # Always 2 for this request (size of return data) - ret = dev.ctrl_transfer(request_type, request, value, index, length) - ret = ret[0] | (ret[1] << 8) - # Status bits - # ret == 0b1 (D0)endpoint Halt - # (D1 - D15 reserved) Must be set to 0 - # endpoint 0 can't be halted ret == 0 - if(ret != 0): - raise_unconditionally(lineno(), "GET_STATUS on ENDPOINT failed") - - -def set_clear_feature_test(dev, log): - # Control OUT SET_FEATURE on endpoint - halt - request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_SET_FEATURE - value = FEATURE_ENDPOINT_HALT - index = 1 # Endpoint index - length = 0 # Always 0 for this request +def get_set_configuration_test(dev, log): + print("<<< get_set_configuration_test >>>") + # check if dafault(1) configuration set try: - dev.ctrl_transfer(request_type, request, value, index, length) - except usb.core.USBError: - raise_unconditionally(lineno(), "endpoint halt failed") + ret = usb.control.get_configuration(dev) + raise_if_different(1, ret, lineno(), "FAILED - expected first configuration set") + except usb.core.USBError as error: + print(error) + raise_unconditionally(lineno(), "FAILED - get_configuration !!!") - # check if endpoint was halted - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_GET_STATUS - value = 0 # Always 0 for this request - index = 1 # Endpoint index - length = 2 # Always 2 for this request (size of return data) - ret = dev.ctrl_transfer(request_type, request, value, index, length) - ret = ret[0] | (ret[1] << 8) - if(ret != 1): - raise_unconditionally(lineno(), "endpoint was not halted") + cfg = dev.get_active_configuration() + for intf in cfg: + usb.util.release_interface(dev, intf) - # Control OUT CLEAR_FEATURE on endpoint - unhalt - request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_CLEAR_FEATURE - value = FEATURE_ENDPOINT_HALT - index = 1 # Endpoint index - length = 0 # Always 0 for this request + # deconfigure the device try: - dev.ctrl_transfer(request_type, request, value, index, length) - except usb.core.USBError: - raise_unconditionally(lineno(), "endpoint was not unhalted") - - # check if endpoint was unhalted - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_GET_STATUS - value = 0 # Always 0 for this request - index = 1 # Endpoint index - length = 2 # Always 2 for this request (size of return data) - ret = dev.ctrl_transfer(request_type, request, value, index, length) - ret = ret[0] - if(ret != 0): - raise_unconditionally(lineno(), "endpoint unhalthalt failed") - + ret = dev.set_configuration(0) + except usb.core.USBError as error: + print(error) + raise_unconditionally(lineno(), "FAILED - set_configuration(0) !!!") -def get_set_interface_test(dev, log): - # Control IN GET_INTERFACE - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_GET_INTERFACE - value = 0 # Always 0 for this request - index = 0 # Interface index - length = 1 # Always 1 for this request (size of return data) + # check if deconfigured try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - print("GET_INTERFACE ret: %d" % (ret[0])) - if(ret[0] != 0): - raise_unconditionally(lineno(), "Wrong interface was set expected: 0") - except usb.core.USBError: - raise_unconditionally(lineno(), "GET_INTERFACE failed") - # test control data transfer - control_data_test(dev, [64, 256], log) + ret = usb.control.get_configuration(dev) + raise_if_different(0, ret, lineno(), "FAILED - expected to be deconfigured") + print("device deconfigured - OK") + except usb.core.USBError as error: + print(error) + raise_unconditionally(lineno(), "FAILED - get_active_configuration !!!") + + # for every configuration + for cfg in dev: + try: + # set configuration + ret = cfg.set() + except usb.core.USBError as error: + print(error) + raise_unconditionally(lineno(), "FAILED - set configuration") - # Control IN SET_INTERFACE - request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_SET_INTERFACE - value = 1 # Alternative interface setting index - index = 0 # Interface index - length = 0 # Always 0 for this request - try: - dev.ctrl_transfer(request_type, request, value, index, length) - except usb.core.USBError: - raise_unconditionally(lineno(), "SET_INTERFACE failed") - # test control data transfer after alternative interface set - control_data_test(dev, [64, 256], log) + # check if configured + try: + ret = usb.control.get_configuration(dev) + raise_if_different(cfg.bConfigurationValue, ret, lineno(), "FAILED - expected {} configuration set".format(cfg.bConfigurationValue)) + print("configuration {} set - OK ".format(cfg.bConfigurationValue)) + except usb.core.USBError as error: + print(error) + raise_unconditionally(lineno(), "FAILED - get_configuration !!!") + # test control data transfer after configuration set + control_data_test(dev, [64, 256], log) + print("") # new line - # Control IN GET_INTERFACE - check if alternative interface setting was set - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_GET_INTERFACE - value = 0 # Always 0 for this request - index = 0 # Interface index - length = 1 # Always 1 for this request (size of return data) - try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - if(ret[0] != 1): - raise_unconditionally(lineno(), "Alternative interface setting was not set properly") - except usb.core.USBError: - raise_unconditionally(lineno(), "GET_INTERFACE failed") - # Control IN SET_INTERFACE restore interfejs settings - request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_SET_INTERFACE - value = 0 # Interface setting index - index = 0 # Interface index - length = 0 # Always 0 for this request - try: - dev.ctrl_transfer(request_type, request, value, index, length) - except usb.core.USBError: - raise_unconditionally(lineno(), "SET_INTERFACE request failed") - # test control data transfer after interface restoring +def get_set_interface_test(dev, log): + print("<<< get_set_interface_test >>>") + # for every configuration + for cfg in dev: + cfg.set() + # for every interface + for intf in cfg: + intf.set_altsetting(); + altsett = usb.control.get_interface(dev, intf.bInterfaceNumber) + raise_if_different(intf.bAlternateSetting, altsett, lineno(), text='Wrong alternate setting for interface {}'.format(intf.bInterfaceNumber)) + print("cfg({}) inteface {}.{} set - OK".format(cfg.bConfigurationValue, intf.bInterfaceNumber, intf.bAlternateSetting)) + control_data_test(dev, [64, 256], log) + + release_interfaces(dev) + + restore_default_configuration(dev) + + # test control data transfer after default interface restoring control_data_test(dev, [64, 256], log) + print("") # new line - # Control IN GET_INTERFACE - check if alternative interface setting was restored properly - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_GET_INTERFACE - value = 0 # Always 0 for this request - index = 0 # Interface index - length = 1 # Always 1 for this request (size of return data) - try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - if(ret[0] != 0): - raise_unconditionally(lineno(), "Alternative interface setting was not restored properly") - except usb.core.USBError: - raise_unconditionally(lineno(), "GET_INTERFACE failed") - - -def get_set_configuration_test(dev, log): - # Set Configuration can also be used, with wValue set to 0, to deconfigure the device - # Control IN GET_CONFIGURATION - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_GET_CONFIGURATION - value = 0 # Always 0 for this request - index = 0 # Always 0 for this request - length = 1 # Always 1 for this request (size of return data) - try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - if(ret[0] != 1): - raise_unconditionally(lineno(), "Expected first configuration set") - except usb.core.USBError: - raise_unconditionally(lineno(), "GET_CONFIGURATION failed") - # test control data transfer - control_data_test(dev, [64, 256], log) - # Control OUT SET_CONFIGURATION 0 - deconfigure the device - request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_SET_CONFIGURATION - value = 0 # Configuration Value (0 - deconfigure the device) - index = 0 # Always 0 for this request - length = 0 # Always 0 for this request - try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - except usb.core.USBError: - raise_unconditionally(lineno(), "SET_CONFIGURATION failed") +def get_status_test(dev, log): + print("<<< get_status_test >>>") + # check device status + ret = get_status(dev, CTRL_RECIPIENT_DEVICE) + # Status bits + # ret == 0b01 (D0)Self Powered + # ret == 0b10 (D1)Remote Wakeup + # (D2 - D15 reserved) Must be set to 0 + if(ret < 0 or ret > 3): + raise_unconditionally(lineno(), "GET_STATUS on DEVICE failed") - # Control IN GET_CONFIGURATION - check if deconfigured - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_GET_CONFIGURATION - value = 0 # Always 0 for this request - index = 0 # Always 0 for this request - length = 1 # Always 1 for this request (size of return data) - try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - if(ret[0] != 0): - raise_unconditionally(lineno(), "Expected to be deconfigured") - except usb.core.USBError: - raise_unconditionally(lineno(), "GET_CONFIGURATION failed") + # check endpoint 0 status + ret = get_status(dev, CTRL_RECIPIENT_ENDPOINT, 0) + # Status bits + # ret == 0b1 (D0)endpoint Halt + # (D1 - D15 reserved) Must be set to 0 + # endpoint 0 can't be halted ret == 0 + raise_if_different(0, ret, lineno(), "GET_STATUS on ENDPOINT 0 should return 0") + + # for every configuration + for cfg in dev: + cfg.set() + raise_if_different(cfg.bConfigurationValue, usb.control.get_configuration(dev), lineno(), "Configuration {} set failed".format(cfg.bConfigurationValue)) + + for intf in cfg: + intf.set_altsetting() + # check interface status + ret = get_status(dev, CTRL_RECIPIENT_INTERFACE, intf.bInterfaceNumber) + # Status bits + # ret == 0b0 + # (D0 - D15 reserved) Must be set to 0 + if(ret != 0): + raise_unconditionally(lineno(), "GET_STATUS on INTERFACE ({},{}) failed".format(intf.bInterfaceNumber, intf.bAlternateSetting)) + print("cfg({}) interface {}.{} status - OK".format(cfg.bConfigurationValue, intf.bInterfaceNumber, intf.bAlternateSetting)) + + # on every ENDPOINT in this altsetting + for ep in intf: + ret = usb.control.get_status(dev, ep) + # Status bits + # ret == 0b1 (D0)endpoint Halt + # (D1 - D15 reserved) Must be set to 0 + if(ret >= 1): + raise_unconditionally(lineno(), "GET_STATUS on ENDPOINT {} failed - endpoint halted".format(ep.bEndpointAddress)) + print("cfg({}) intf({}.{}) endpoint {} status - OK".format(cfg.bConfigurationValue, intf.bInterfaceNumber, intf.bAlternateSetting, ep.bEndpointAddress)) + + release_interfaces(dev) + restore_default_configuration(dev) + print("") # new line - # Control OUT SET_CONFIGURATION 1 - restore first configuration - request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_SET_CONFIGURATION - value = 1 # Configuration Value - index = 0 # Always 0 for this request - length = 0 # Always 0 for this request - try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - except usb.core.USBError: - raise_unconditionally(lineno(), "SET_CONFIGURATION failed") - # test control data transfer after configured back - control_data_test(dev, [64, 256], log) - # Control IN GET_CONFIGURATION - check if configured back - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_GET_CONFIGURATION - value = 0 # Always 0 for this request - index = 0 # Always 0 for this request - length = 1 # Always 1 for this request (size of return data) - try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - if(ret[0] != 1): - raise_unconditionally(lineno(), "Expected to be deconfigured: 1") - except usb.core.USBError: - raise_unconditionally(lineno(), "GET_CONFIGURATION failed") - control_data_test(dev, [64, 256], log) +def set_clear_feature_test(dev, log): + print("<<< set_clear_feature_test >>>") + # for every configuration + for cfg in dev: + cfg.set() + raise_if_different(cfg.bConfigurationValue, usb.control.get_configuration(dev), lineno(), "Configuration {} set failed".format(cfg.bConfigurationValue)) + + for intf in cfg: + intf.set_altsetting() + # on every ENDPOINT + for ep in intf: + try: + usb.control.set_feature(dev, FEATURE_ENDPOINT_HALT, ep) + except usb.core.USBError as err: + print(err) + raise_unconditionally(lineno(), "endpoint {} halt failed".format(ep.bEndpointAddress)) + + # check if endpoint was halted + try: + ret = usb.control.get_status(dev, ep) + except usb.core.USBError as err: + print(err) + raise_unconditionally(lineno(), "endpoint status failed".format(ep.bEndpointAddress)) + if(ret != 1): + raise_unconditionally(lineno(), "endpoint {} was not halted".format(ep.bEndpointAddress)) + print("cfg({}) intf({}.{}) ep {} halted - OK".format(cfg.bConfigurationValue, intf.bInterfaceNumber, intf.bAlternateSetting, ep.bEndpointAddress)) + + # Control OUT CLEAR_FEATURE on endpoint - unhalt + try: + usb.control.clear_feature(dev, FEATURE_ENDPOINT_HALT, ep) + except usb.core.USBError as err: + print(err) + raise_unconditionally(lineno(), "endpoint {} unhalt failed".format(ep.bEndpointAddress)) + + # check if endpoint was unhalted + ret = usb.control.get_status(dev, ep) + if(ret != 0): + raise_unconditionally(lineno(), "endpoint {} was not unhalted".format(ep.bEndpointAddress)) + print("cfg({}) intf({}.{}) ep {} unhalted - OK".format(cfg.bConfigurationValue, intf.bInterfaceNumber, intf.bAlternateSetting, ep.bEndpointAddress)) + + release_interfaces(dev) + + restore_default_configuration(dev) + print("") # new line def get_descriptor_test(dev, vendor_id, product_id, log): + print("<<< get_descriptor_test >>>") # Control IN GET_DESCRIPTOR - device - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_DEVICE) - request = REQUEST_GET_DESCRIPTOR - value = (DESC_TYPE_DEVICE << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) - index = 0 # 0 or Language ID for this request - length = DEVICE_DESC_SIZE # Descriptor Length try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - #print("### DEVICE_DESC ####################################################") - #dev_desc = dict(zip(device_descriptor_keys, device_descriptor_parser.unpack(ret))) - #for key in dev_desc: - # print("%s: %d" % (key, dev_desc[key])) - #assert vendor_id != dev_desc['idVendor'] - #assert product_id != dev_desc['idProduct'] + ret = get_descriptor(dev, (DESC_TYPE_DEVICE << 8) | (0 << 0), 0, DEVICE_DESC_SIZE) + dev_desc = dict(zip(device_descriptor_keys, device_descriptor_parser.unpack(ret))) + raise_if_different(DEVICE_DESC_SIZE, dev_desc['bLength'], lineno(), text='Wrong device descriptor size !!!') + raise_if_different(vendor_id, dev_desc['idVendor'], lineno(), text='Wrong vendor id !!!') + raise_if_different(product_id, dev_desc['idProduct'], lineno(), text='Wrong product id !!!') except usb.core.USBError: raise_unconditionally(lineno(), "Requesting device descriptor failed") # Control IN GET_DESCRIPTOR - configuration - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_DEVICE) - request = REQUEST_GET_DESCRIPTOR - value = (DESC_TYPE_CONFIG << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) - index = 0 # 0 or Language ID for this request - length = CONFIGURATION_DESC_SIZE # Descriptor Length try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - #print("### CONFIGURATION_DESC ####################################################") - #conf_desc = dict(zip(configuration_descriptor_keys, configuration_descriptor_parser.unpack(ret))) - #for key in conf_desc: - # print("%s: %d" % (key, conf_desc[key])) - #print("#######################################################") + ret = get_descriptor(dev, (DESC_TYPE_CONFIG << 8) | (0 << 0), 0, CONFIGURATION_DESC_SIZE) + conf_desc = dict(zip(configuration_descriptor_keys, configuration_descriptor_parser.unpack(ret))) + raise_if_different(CONFIGURATION_DESC_SIZE, conf_desc['bLength'], lineno(), text='Wrong configuration descriptor size !!!') except usb.core.USBError: raise_unconditionally(lineno(), "Requesting configuration descriptor failed") # Control IN GET_DESCRIPTOR - interface - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_DEVICE) - request = REQUEST_GET_DESCRIPTOR - value = (DESC_TYPE_INTERFACE << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) - index = 0 # 0 or Language ID for this request - length = INTERFACE_DESC_SIZE # Descriptor Length try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = get_descriptor(dev, (DESC_TYPE_INTERFACE << 8) | (0 << 0), 0, INTERFACE_DESC_SIZE) raise_unconditionally(lineno(), "Requesting interface descriptor should fail since it is not directly accessible") except usb.core.USBError: - log("interface descriptor is not directly accessible") + log("interface descriptor is not directly accessible - OK") - # Control IN GET_DESCRIPTOR - interface - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_DEVICE) - request = REQUEST_GET_DESCRIPTOR - value = (DESC_TYPE_ENDPOINT << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) - index = 0 # 0 or Language ID for this request - length = INTERFACE_DESC_SIZE # Descriptor Length + # Control IN GET_DESCRIPTOR - endpoint try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = get_descriptor(dev, (DESC_TYPE_ENDPOINT << 8) | (0 << 0), 0, ENDPOINT_DESC_SIZE) raise_unconditionally(lineno(), "Requesting endpoint descriptor should fail since it is not directly accessible") except usb.core.USBError: - log("endpoint descriptor is not directly accessible") - + log("endpoint descriptor is not directly accessible - OK") + print("") # new line def set_descriptor_test(dev, log): + print("<<< set_descriptor_test >>>") # SET_DESCRIPTOR is optional and not implemented in Mbed # command should fail with no action on device side @@ -642,10 +537,12 @@ def set_descriptor_test(dev, log): dev.ctrl_transfer(request_type, request, value, index, data) raise_unconditionally(lineno(), "SET_DESCRIPTOR should fail since it is not implemented") except usb.core.USBError: - log("SET_DESCRIPTOR is unsupported") + log("SET_DESCRIPTOR is unsupported - OK") + print("") # new line def synch_frame_test(dev, log): + print("<<< synch_frame_test >>>") # only for isochronous endpoints request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, CTRL_RECIPIENT_ENDPOINT) @@ -659,10 +556,11 @@ def synch_frame_test(dev, log): log("synch frame ret: %d" % (ret)) except usb.core.USBError: raise_unconditionally(lineno(), "SYNCH_FRAME failed") + print("") # new line def control_stall_test(dev, log): - + print("<<< control_stall_test >>>") # Control OUT stall try: request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, @@ -674,7 +572,7 @@ def control_stall_test(dev, log): dev.ctrl_transfer(request_type, request, value, index, data, 5000) raise_unconditionally(lineno(), "Invalid request not stalled") except usb.core.USBError: - log("Invalid request stalled") + log("Invalid request stalled - OK") # Control request with no data stage (Device-to-host) try: @@ -687,7 +585,7 @@ def control_stall_test(dev, log): dev.ctrl_transfer(request_type, request, value, index, length, 5000) raise_unconditionally(lineno(), "Invalid request not stalled") except usb.core.USBError: - log("Invalid request stalled") + log("Invalid request stalled - OK") # Control request with no data stage (Host-to-device) try: @@ -700,7 +598,7 @@ def control_stall_test(dev, log): dev.ctrl_transfer(request_type, request, value, index, length, 5000) raise_unconditionally(lineno(), "Invalid request not stalled") except usb.core.USBError: - log("Invalid request stalled") + log("Invalid request stalled - OK") # Control IN stall try: @@ -713,7 +611,7 @@ def control_stall_test(dev, log): dev.ctrl_transfer(request_type, request, value, index, length, 5000) raise_unconditionally(lineno(), "Invalid request not stalled") except usb.core.USBError: - log("Invalid request stalled") + log("Invalid request stalled - OK") for i in (3, 4, 5): try: @@ -738,7 +636,8 @@ def control_stall_test(dev, log): resp = dev.ctrl_transfer(request_type, request, value, index, length, 5000) raise_unconditionally(lineno(), "Requesting string passed i: " + str(i)) except usb.core.USBError: - log("Requesting string %s failed" % i) + log("Requesting string %s failed - OK" % i) + print("") # new line def control_sizes_test(dev, log): @@ -883,13 +782,15 @@ def device_suspend_resume_test(log): def repeated_construction_destruction_test(log): - # run other test to check if USB works fine after repeated construction/destruction list = [64, 256] dev = yield + # run other test to check if USB works fine after repeated construction/destruction control_data_test(dev, list, log) dev = yield + # run other test to check if USB works fine after repeated construction/destruction control_data_test(dev, list, log) dev = yield + # run other test to check if USB works fine after repeated construction/destruction control_data_test(dev, list, log) yield From 0b279e2865f5a252a27bfa966141caf2bd894efe Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 30 Apr 2018 18:57:24 -0500 Subject: [PATCH 057/488] Remove blocking option from USB connect Remove the option to block in USBDevice::connect since this should be handled at a higher level. Also call init to ensure that the USBDevice has been initalized. --- usb/device/USBDevice/USBDevice.cpp | 14 +++++++------- usb/device/USBDevice/USBDevice.h | 4 +--- 2 files changed, 8 insertions(+), 10 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index fdc49a83eac..c539e5a5987 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -994,20 +994,20 @@ bool USBDevice::configured() return ret; } -void USBDevice::connect(bool blocking) +void USBDevice::connect() { - /* Connect device */ lock(); + + /* Ensure device has been initialized */ + init(); + + /* Connect device */ if (!_connected) { _phy->connect(); _connected = true; } - unlock(); - if (blocking) { - /* Block if not configured */ - while (!configured()); - } + unlock(); } void USBDevice::disconnect() diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 91bb7513363..c6056059bbb 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -117,10 +117,8 @@ class USBDevice: public USBPhyEvents { /** * Connect a device - * - * @param blocking: block if not configured */ - void connect(bool blocking = true); + void connect(); /** * Disconnect a device From c4854189dcad704aa3ee10b125efa53941b6f8e5 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 30 Apr 2018 18:58:38 -0500 Subject: [PATCH 058/488] Remove extra USBDevice constructor Remove the second USBDevice constructor since it does not provide any new functionality. --- usb/device/USBDevice/USBDevice.cpp | 29 +---------------------------- usb/device/USBDevice/USBDevice.h | 11 ----------- 2 files changed, 1 insertion(+), 39 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index c539e5a5987..0788358b210 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -1246,34 +1246,7 @@ USBDevice::USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint1 _device.state = Powered; _device.configuration = 0; _device.suspended = false; -}; - -USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release) -{ - this->vendor_id = vendor_id; - this->product_id = product_id; - this->product_release = product_release; - - memset(_endpoint_info, 0, sizeof(_endpoint_info)); - memset(&_transfer, 0, sizeof(_transfer)); - _transfer.user_callback = None; - - _setup_ready = false; - _abort_control = false; - - _phy = get_usb_phy(); - _initialized = false; - _connected = false; - _current_interface = 0; - _current_alternate = 0; - _locked = 0; - _post_process = NULL; - - /* Set initial device state */ - _device.state = Powered; - _device.configuration = 0; - _device.suspended = false; -}; +} uint32_t USBDevice::endpoint_max_packet_size(usb_ep_t endpoint) { diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index c6056059bbb..d5a91f1b26b 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -72,17 +72,6 @@ class USBDevice: public USBPhyEvents { uint16_t wLength; }; - /** - * Instantiate a new USBDevice with the given parameters - * - * This function uses a target's built in USBPhy. - * - * @param vendor_id The USB vendor ID - * @param product_id The USB product ID - * @param product_release The device release number - */ - USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release); - /** * Instantiate a new USBDevice with the given parameters * From 32a7ef8e437bf33fa821454cfc9c53f19b0719fc Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 1 May 2018 15:05:17 -0500 Subject: [PATCH 059/488] Add USBDevice destructor Add a destructor to USBDevice to ensure that resources have been properly released. Additionally add an assert in the destructor that deinit has already been called. If it has not been called then interrupts can still occur which may cause a crash. --- usb/device/USBDevice/USBDevice.cpp | 6 ++++++ usb/device/USBDevice/USBDevice.h | 8 ++++++++ 2 files changed, 14 insertions(+) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 0788358b210..3c73170c4b2 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -1248,6 +1248,12 @@ USBDevice::USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint1 _device.suspended = false; } +USBDevice::~USBDevice() +{ + MBED_ASSERT(!_initialized); + deinit(); +} + uint32_t USBDevice::endpoint_max_packet_size(usb_ep_t endpoint) { lock(); diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index d5a91f1b26b..a1b491574b3 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -82,6 +82,14 @@ class USBDevice: public USBPhyEvents { */ USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); + /** + * Cleanup this USBDevice + * + * This USBDevice must be uninitialized when the destructor is + * called or the behavior is undefined. + */ + virtual ~USBDevice(); + /** * Initialize this instance * From ae5a9649f22715787cf3ab32e64d373f79daa4d4 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 1 May 2018 15:02:36 -0500 Subject: [PATCH 060/488] Cleanup USBSerial Make the following changes -Make blocking the first parameter in the constructor -Add destructor and proper cleanup -Add ready and wait_ready functions --- usb/device/USBSerial/USBCDC.cpp | 43 ++++++++++++++++--------- usb/device/USBSerial/USBCDC.h | 50 +++++++++++++++++++++++------- usb/device/USBSerial/USBSerial.cpp | 32 ++++++++++++++++++- usb/device/USBSerial/USBSerial.h | 41 +++++++++++++++--------- 4 files changed, 125 insertions(+), 41 deletions(-) diff --git a/usb/device/USBSerial/USBCDC.cpp b/usb/device/USBSerial/USBCDC.cpp index 1e5993e7e5d..4eff925deea 100644 --- a/usb/device/USBSerial/USBCDC.cpp +++ b/usb/device/USBSerial/USBCDC.cpp @@ -18,6 +18,7 @@ #include "USBCDC.h" #include "EndpointResolver.h" #include "AsyncOp.h" +#include "usb_phy_api.h" static const uint8_t cdc_line_coding_default[7] = {0x80, 0x25, 0x00, 0x00, 0x00, 0x00, 0x08}; @@ -58,20 +59,31 @@ class USBCDC::AsyncRead: public AsyncOp { bool result; }; -USBCDC::USBCDC(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking) - : USBDevice(vendor_id, product_id, product_release) +USBCDC::USBCDC(bool connect_blocking, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) + : USBDevice(get_usb_phy(), vendor_id, product_id, product_release) { - _init(connect_blocking); + _init(); + if (connect_blocking) { + connect(); + wait_ready(); + } else { + init(); + } } -USBCDC::USBCDC(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking) +USBCDC::USBCDC(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) : USBDevice(phy, vendor_id, product_id, product_release) { - _init(connect_blocking); + _init(); } -void USBCDC::_init(bool connect_blocking) +USBCDC::~USBCDC() +{ + deinit(); +} + +void USBCDC::_init() { memcpy(_cdc_line_coding, cdc_line_coding_default, sizeof(_cdc_line_coding)); @@ -91,13 +103,6 @@ void USBCDC::_init(bool connect_blocking) _rx_in_progress = false; _rx_buf = _rx_buffer; _rx_size = 0; - - init(); - - USBDevice::connect(false); - if (connect_blocking) { - wait_connected(); - } } void USBCDC::callback_reset() @@ -234,7 +239,17 @@ void USBCDC::_change_terminal_connected(bool connected) _terminal_connected = connected; } -void USBCDC::wait_connected() +bool USBCDC::ready() +{ + lock(); + + bool ready = _terminal_connected; + + unlock(); + return ready; +} + +void USBCDC::wait_ready() { lock(); diff --git a/usb/device/USBSerial/USBCDC.h b/usb/device/USBSerial/USBCDC.h index 15222bc91a2..726ffb4419e 100644 --- a/usb/device/USBSerial/USBCDC.h +++ b/usb/device/USBSerial/USBCDC.h @@ -29,31 +29,57 @@ class AsyncOp; class USBCDC: public USBDevice { public: - /* - * Constructor + /** + * Basic constructor + * + * Construct this object optionally connecting and blocking until it is ready. + * + * @note Do not use this constructor in derived classes. * + * @param connect_blocking true to perform a blocking connect, false to start in a disconnected state * @param vendor_id Your vendor_id * @param product_id Your product_id - * @param product_release Your preoduct_release - * @param connect_blocking define if the connection must be blocked if USB not plugged in + * @param product_release Your product_release */ - USBCDC(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); + USBCDC(bool connect_blocking, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); - /* - * Constructor + /** + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. * * @param phy USB phy to use * @param vendor_id Your vendor_id * @param product_id Your product_id - * @param product_release Your preoduct_release - * @param connect_blocking define if the connection must be blocked if USB not plugged in + * @param product_release Your product_release */ - USBCDC(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); + USBCDC(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ + virtual ~USBCDC(); + + /** + * Check if this class is ready + * + * @return true if a terminal is connected, false otherwise + */ + bool ready(); /** * Block until the terminal is connected */ - void wait_connected(); + void wait_ready(); /* * Send a buffer @@ -162,7 +188,7 @@ class USBCDC: public USBDevice { virtual void callback_set_configuration(uint8_t configuration); virtual void callback_set_interface(uint16_t interface, uint8_t alternate); - void _init(bool connect_blocking); + void _init(); void _change_terminal_connected(bool connected); void _connect_wake_all(); diff --git a/usb/device/USBSerial/USBSerial.cpp b/usb/device/USBSerial/USBSerial.cpp index 376c8b8de24..b691b2f977e 100644 --- a/usb/device/USBSerial/USBSerial.cpp +++ b/usb/device/USBSerial/USBSerial.cpp @@ -16,10 +16,40 @@ #include "stdint.h" #include "USBSerial.h" +#include "usb_phy_api.h" + + +USBSerial::USBSerial(bool connect_blocking, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBCDC(get_usb_phy(), vendor_id, product_id, product_release) +{ + _settings_changed_callback = 0; + + if (connect_blocking) { + connect(); + wait_ready(); + } else { + init(); + } +} + +USBSerial::USBSerial(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBCDC(phy, vendor_id, product_id, product_release) +{ + _settings_changed_callback = 0; +} + +USBSerial::~USBSerial() +{ + deinit(); +} int USBSerial::_putc(int c) { - return send((uint8_t *)&c, 1) ? 1 : 0; + if (send((uint8_t *)&c, 1)) { + return c; + } else { + return -1; + } } int USBSerial::_getc() diff --git a/usb/device/USBSerial/USBSerial.h b/usb/device/USBSerial/USBSerial.h index b3344b4a6e1..f06eb2e8171 100644 --- a/usb/device/USBSerial/USBSerial.h +++ b/usb/device/USBSerial/USBSerial.h @@ -45,33 +45,46 @@ class USBSerial: public USBCDC, public Stream { public: /** - * Constructor + * Basic constructor * + * Construct this object optionally connecting and blocking until it is ready. + * + * @note Do not use this constructor in derived classes. + * + * @param connect_blocking true to perform a blocking connect, false to start in a disconnected state * @param vendor_id Your vendor_id (default: 0x1f00) * @param product_id Your product_id (default: 0x2012) - * @param product_release Your preoduct_release (default: 0x0001) - * @param connect_blocking define if the connection must be blocked if USB not plugged in + * @param product_release Your product_release (default: 0x0001) * */ - USBSerial(uint16_t vendor_id = 0x1f00, uint16_t product_id = 0x2012, uint16_t product_release = 0x0001, bool connect_blocking = true): USBCDC(vendor_id, product_id, product_release, connect_blocking) - { - _settings_changed_callback = 0; - }; + USBSerial(bool connect_blocking=true, uint16_t vendor_id=0x1f00, uint16_t product_id=0x2012, uint16_t product_release=0x0001); /** - * Constructor + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. * * @param phy USB phy to use * @param vendor_id Your vendor_id (default: 0x1f00) * @param product_id Your product_id (default: 0x2012) - * @param product_release Your preoduct_release (default: 0x0001) - * @param connect_blocking define if the connection must be blocked if USB not plugged in + * @param product_release Your product_release (default: 0x0001) * */ - USBSerial(USBPhy *phy, uint16_t vendor_id = 0x1f00, uint16_t product_id = 0x2012, uint16_t product_release = 0x0001, bool connect_blocking = true): USBCDC(phy, vendor_id, product_id, product_release, connect_blocking) - { - _settings_changed_callback = 0; - }; + USBSerial(USBPhy *phy, uint16_t vendor_id=0x1f00, uint16_t product_id=0x2012, uint16_t product_release=0x0001); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ + virtual ~USBSerial(); /** * Send a character. You can use puts, printf. From 13ff2851033074bdc455992ee42556eb0315cd40 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 1 May 2018 19:45:58 -0500 Subject: [PATCH 061/488] Fix typo in USBTester.h Fix the spelling of product_release. --- TESTS/usb_device/basic/USBTester.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index 9faca7f5677..dcd345b1bf9 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -33,7 +33,7 @@ class USBTester: public USBDevice { * * @param vendor_id Your vendor_id * @param product_id Your product_id - * @param product_release Your preoduct_release + * @param product_release Your product_release * @param connect_blocking define if the connection must be blocked if USB not plugged in */ USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); From 54243518e13709c66664116d1b750fc07836077b Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 24 Mar 2018 20:13:10 +0100 Subject: [PATCH 062/488] Update the USBHID classes Update the USB classes USBHID, USBKeyboard, USBMouse and USBMouseKeyboard from the unsupported folder. --- usb/device/USBHID/USBHID.cpp | 511 +++++++++++++++ usb/device/USBHID/USBHID.h | 274 ++++++++ usb/device/USBHID/USBHID_Types.h | 92 +++ usb/device/USBHID/USBKeyboard.cpp | 604 ++++++++++++++++++ usb/device/USBHID/USBKeyboard.h | 211 +++++++ usb/device/USBHID/USBMouse.cpp | 348 +++++++++++ usb/device/USBHID/USBMouse.h | 234 +++++++ usb/device/USBHID/USBMouseKeyboard.cpp | 828 +++++++++++++++++++++++++ usb/device/USBHID/USBMouseKeyboard.h | 246 ++++++++ 9 files changed, 3348 insertions(+) create mode 100644 usb/device/USBHID/USBHID.cpp create mode 100644 usb/device/USBHID/USBHID.h create mode 100644 usb/device/USBHID/USBHID_Types.h create mode 100644 usb/device/USBHID/USBKeyboard.cpp create mode 100644 usb/device/USBHID/USBKeyboard.h create mode 100644 usb/device/USBHID/USBMouse.cpp create mode 100644 usb/device/USBHID/USBMouse.h create mode 100644 usb/device/USBHID/USBMouseKeyboard.cpp create mode 100644 usb/device/USBHID/USBMouseKeyboard.h diff --git a/usb/device/USBHID/USBHID.cpp b/usb/device/USBHID/USBHID.cpp new file mode 100644 index 00000000000..c1028d78b6a --- /dev/null +++ b/usb/device/USBHID/USBHID.cpp @@ -0,0 +1,511 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBHID.h" +#include "EndpointResolver.h" +#include "usb_phy_api.h" + +class USBHID::AsyncSend: public AsyncOp { +public: + AsyncSend(const HID_REPORT *report): AsyncOp(NULL), report(report), result(false) + { + + } + const HID_REPORT *report; + bool result; +}; + +class USBHID::AsyncRead: public AsyncOp { +public: + AsyncRead(HID_REPORT *report): AsyncOp(NULL), report(report), result(false) + { + + } + HID_REPORT *report; + bool result; +}; + + +USBHID::USBHID(bool connect_blocking, uint8_t output_report_length, uint8_t input_report_length, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) + : USBDevice(get_usb_phy(), vendor_id, product_id, product_release) +{ + _init(output_report_length, input_report_length); + if (connect_blocking) { + connect(); + wait_ready(); + } else { + init(); + } + +} + +USBHID::USBHID(USBPhy *phy, uint8_t output_report_length, uint8_t input_report_length, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) + : USBDevice(phy, vendor_id, product_id, product_release) +{ + _init(output_report_length, input_report_length); +} + +USBHID::~USBHID() +{ + deinit(); +} + +void USBHID::_init(uint8_t output_report_length, uint8_t input_report_length) +{ + EndpointResolver resolver(endpoint_table()); + + resolver.endpoint_ctrl(64); + _int_in = resolver.endpoint_in(USB_EP_TYPE_INT, MAX_HID_REPORT_SIZE); + _int_out = resolver.endpoint_out(USB_EP_TYPE_INT, MAX_HID_REPORT_SIZE); + MBED_ASSERT(resolver.valid()); + + _send_idle = true; + _read_idle = true; + _output_length = output_report_length; + _input_length = input_report_length; +} + +bool USBHID::ready() +{ + return configured(); +} + +void USBHID::wait_ready() +{ + lock(); + + AsyncOp wait_op(NULL); + wait_op.start(&_connect_list); + if (configured()) { + wait_op.complete(); + } + + unlock(); + + wait_op.wait(); +} + + +bool USBHID::send(const HID_REPORT *report) +{ + lock(); + + if (!configured()) { + unlock(); + return false; + } + + if (send_nb(report)) { + unlock(); + return true; + } + + AsyncSend send_op(report); + send_op.start(&_send_list); + + unlock(); + + send_op.wait(); + + return send_op.result; +} + +bool USBHID::send_nb(const HID_REPORT *report) +{ + lock(); + + if (!configured()) { + unlock(); + return false; + } + + bool success = false; + if (_send_idle) { + memcpy(&_input_report, report, sizeof(_input_report)); + write_start(_int_in, _input_report.data, _input_report.length); + _send_idle = false; + success = true; + } + + unlock(); + return success; +} + +bool USBHID::read(HID_REPORT *report) +{ + lock(); + + if (!configured()) { + unlock(); + return false; + } + + if (read_nb(report)) { + unlock(); + return true; + } + + AsyncRead read_op(report); + read_op.start(&_read_list); + + unlock(); + + read_op.wait(); + + return read_op.result; +} + + +bool USBHID::read_nb(HID_REPORT *report) +{ + lock(); + + if (!configured()) { + unlock(); + return false; + } + + bool success = false; + if (_read_idle) { + memcpy(report, &_output_report, sizeof(_output_report)); + read_start(_int_out, _output_report.data, MAX_HID_REPORT_SIZE); + _read_idle = false; + success = true; + } + + unlock(); + return success; +} + +void USBHID::_send_isr(usb_ep_t endpoint) +{ + assert_locked(); + + write_finish(_int_in); + _send_idle = true; + + AsyncSend *send_op = _send_list.head(); + if (send_op != NULL) { + if (send_nb(send_op->report)) { + send_op->result = true; + send_op->complete(); + } + } else { + report_tx(); + } + +} + +void USBHID::_read_isr(usb_ep_t endpoint) +{ + assert_locked(); + + _output_report.length = read_finish(_int_out); + _read_idle = true; + + AsyncRead *read_op = _read_list.head(); + if (read_op != NULL) { + if (read_nb(read_op->report)) { + read_op->result = true; + read_op->complete(); + } + } else { + report_rx(); + } +} + +void USBHID::_connect_wake_all() +{ + assert_locked(); + + AsyncOp *wait_op = _connect_list.head(); + while (wait_op != NULL) { + wait_op->complete(); + wait_op = _connect_list.head(); + } +} + +void USBHID::_send_abort_all() +{ + assert_locked(); + + if (!_send_idle) { + endpoint_abort(_int_in); + _send_idle = true; + } + AsyncSend *tx_cur = _send_list.head(); + while (tx_cur != NULL) { + tx_cur->result = false; + tx_cur->complete(); + tx_cur = _send_list.head(); + } +} + +void USBHID::_read_abort_all() +{ + assert_locked(); + + if (!_read_idle) { + endpoint_abort(_int_out); + _read_idle = true; + } + AsyncRead *rx_cur = _read_list.head(); + while (rx_cur != NULL) { + rx_cur->result = false; + rx_cur->complete(); + rx_cur = _read_list.head(); + } +} + +uint16_t USBHID::report_desc_length() +{ + report_desc(); + return reportLength; +} + + +void USBHID::callback_state_change(DeviceState new_state) +{ + if (new_state == Configured) { + _connect_wake_all(); + } else { + _send_abort_all(); + _read_abort_all(); + } +} + +// +// Route callbacks from lower layers to class(es) +// + + +// Called in ISR context +// Called by USBDevice on Endpoint0 request +// This is used to handle extensions to standard requests +// and class specific requests +// Return true if class handles this request +void USBHID::callback_request(const setup_packet_t *setup) +{ + uint8_t *hidDescriptor; + RequestResult result = PassThrough; + uint8_t *data = NULL; + uint32_t size = 0; + + // Process additional standard requests + + if ((setup->bmRequestType.Type == STANDARD_TYPE)) { + switch (setup->bRequest) { + case GET_DESCRIPTOR: + switch (DESCRIPTOR_TYPE(setup->wValue)) { + case REPORT_DESCRIPTOR: + if ((report_desc() != NULL) \ + && (report_desc_length() != 0)) { + size = report_desc_length(); + data = (uint8_t *)report_desc(); + result = Send; + } + break; + case HID_DESCRIPTOR: + // Find the HID descriptor, after the configuration descriptor + hidDescriptor = find_descriptor(HID_DESCRIPTOR); + if (hidDescriptor != NULL) { + size = HID_DESCRIPTOR_LENGTH; + data = hidDescriptor; + result = Send; + } + break; + + default: + break; + } + break; + default: + break; + } + } + + // Process class-specific requests + + if (setup->bmRequestType.Type == CLASS_TYPE) { + switch (setup->bRequest) { + case SET_REPORT: + // First byte will be used for report ID + _output_report.data[0] = setup->wValue & 0xff; + _output_report.length = setup->wLength + 1; + + size = sizeof(_output_report.data) - 1; + data = &_output_report.data[1]; + result = Send; + break; + default: + break; + } + } + + complete_request(result, data, size); +} + +void USBHID::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) +{ + (void)aborted; + complete_request_xfer_done(true); +} + + +#define DEFAULT_CONFIGURATION (1) + + +// Called in ISR context +// Set configuration. Return false if the +// configuration is not supported +void USBHID::callback_set_configuration(uint8_t configuration) +{ + if (configuration == DEFAULT_CONFIGURATION) { + complete_set_configuration(false); + } + + // Configure endpoints > 0 + endpoint_add(_int_in, MAX_HID_REPORT_SIZE, USB_EP_TYPE_INT, &USBHID::_send_isr); + endpoint_add(_int_out, MAX_HID_REPORT_SIZE, USB_EP_TYPE_INT, &USBHID::_read_isr); + + // We activate the endpoint to be able to recceive data + read_start(_int_out, (uint8_t *)&_output_report, MAX_HID_REPORT_SIZE); + _read_idle = false; + + + complete_set_configuration(true); +} + +void USBHID::callback_set_interface(uint16_t interface, uint8_t alternate) +{ + assert_locked(); + complete_set_interface(true); +} + + +const uint8_t *USBHID::string_iinterface_desc() +{ + static const uint8_t stringIinterfaceDescriptor[] = { + 0x08, //bLength + STRING_DESCRIPTOR, //bDescriptorType 0x03 + 'H', 0, 'I', 0, 'D', 0, //bString iInterface - HID + }; + return stringIinterfaceDescriptor; +} + +const uint8_t *USBHID::string_iproduct_desc() +{ + static const uint8_t stringIproductDescriptor[] = { + 0x16, //bLength + STRING_DESCRIPTOR, //bDescriptorType 0x03 + 'H', 0, 'I', 0, 'D', 0, ' ', 0, 'D', 0, 'E', 0, 'V', 0, 'I', 0, 'C', 0, 'E', 0 //bString iProduct - HID device + }; + return stringIproductDescriptor; +} + + + +const uint8_t *USBHID::report_desc() +{ + uint8_t reportDescriptorTemp[] = { + USAGE_PAGE(2), LSB(0xFFAB), MSB(0xFFAB), + USAGE(2), LSB(0x0200), MSB(0x0200), + COLLECTION(1), 0x01, // Collection (Application) + + REPORT_SIZE(1), 0x08, // 8 bits + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0xFF, + + REPORT_COUNT(1), _input_length, + USAGE(1), 0x01, + INPUT(1), 0x02, // Data, Var, Abs + + REPORT_COUNT(1), _output_length, + USAGE(1), 0x02, + OUTPUT(1), 0x02, // Data, Var, Abs + + END_COLLECTION(0), + }; + reportLength = sizeof(reportDescriptor); + MBED_ASSERT(sizeof(reportDescriptorTemp) == sizeof(reportDescriptor)); + memcpy(reportDescriptor, reportDescriptorTemp, sizeof(reportDescriptor)); + return reportDescriptor; +} + +#define DEFAULT_CONFIGURATION (1) +#define TOTAL_DESCRIPTOR_LENGTH ((1 * CONFIGURATION_DESCRIPTOR_LENGTH) \ + + (1 * INTERFACE_DESCRIPTOR_LENGTH) \ + + (1 * HID_DESCRIPTOR_LENGTH) \ + + (2 * ENDPOINT_DESCRIPTOR_LENGTH)) + +const uint8_t *USBHID::configuration_desc(uint8_t index) +{ + if (index != 0) { + return NULL; + } + + uint8_t configurationDescriptorTemp[] = { + CONFIGURATION_DESCRIPTOR_LENGTH, // bLength + CONFIGURATION_DESCRIPTOR, // bDescriptorType + LSB(TOTAL_DESCRIPTOR_LENGTH), // wTotalLength (LSB) + MSB(TOTAL_DESCRIPTOR_LENGTH), // wTotalLength (MSB) + 0x01, // bNumInterfaces + DEFAULT_CONFIGURATION, // bConfigurationValue + 0x00, // iConfiguration + C_RESERVED | C_SELF_POWERED, // bmAttributes + C_POWER(0), // bMaxPower + + INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0x00, // bInterfaceNumber + 0x00, // bAlternateSetting + 0x02, // bNumEndpoints + HID_CLASS, // bInterfaceClass + HID_SUBCLASS_NONE, // bInterfaceSubClass + HID_PROTOCOL_NONE, // bInterfaceProtocol + 0x00, // iInterface + + HID_DESCRIPTOR_LENGTH, // bLength + HID_DESCRIPTOR, // bDescriptorType + LSB(HID_VERSION_1_11), // bcdHID (LSB) + MSB(HID_VERSION_1_11), // bcdHID (MSB) + 0x00, // bCountryCode + 0x01, // bNumDescriptors + REPORT_DESCRIPTOR, // bDescriptorType + (uint8_t)(LSB(report_desc_length())), // wDescriptorLength (LSB) + (uint8_t)(MSB(report_desc_length())), // wDescriptorLength (MSB) + + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _int_in, // bEndpointAddress + E_INTERRUPT, // bmAttributes + LSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval (milliseconds) + + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _int_out, // bEndpointAddress + E_INTERRUPT, // bmAttributes + LSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval (milliseconds) + }; + MBED_ASSERT(sizeof(configurationDescriptorTemp) == sizeof(_configuration_descriptor)); + memcpy(_configuration_descriptor, configurationDescriptorTemp, sizeof(_configuration_descriptor)); + return _configuration_descriptor; +} diff --git a/usb/device/USBHID/USBHID.h b/usb/device/USBHID/USBHID.h new file mode 100644 index 00000000000..015ad355063 --- /dev/null +++ b/usb/device/USBHID/USBHID.h @@ -0,0 +1,274 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USB_HID_H +#define USB_HID_H + +/* These headers are included for child class. */ +#include "USBDescriptor.h" +#include "USBDevice.h" + +#include "USBHID_Types.h" +#include "AsyncOp.h" +#include "LinkedList.h" + + + +/** + * USBHID example + * @code + * #include "mbed.h" + * #include "USBHID.h" + * + * USBHID hid; + * HID_REPORT recv; + * BusOut leds(LED1,LED2,LED3,LED4); + * + * int main(void) { + * while (1) { + * hid.read(&recv); + * leds = recv.data[0]; + * } + * } + * @endcode + */ + +class USBHID: public USBDevice { +public: + + /** + * Basic constructor + * + * Construct this object optionally connecting and blocking until it is ready. + * + * @note Do not use this constructor in derived classes. + * + * @param connect_blocking true to perform a blocking connect, false to start in a disconnected state + * @param output_report_length Maximum length of a sent report (up to 64 bytes) + * @param input_report_length Maximum length of a received report (up to 64 bytes) + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBHID(bool connect_blocking = true, uint8_t output_report_length = 64, uint8_t input_report_length = 64, uint16_t vendor_id = 0x1234, uint16_t product_id = 0x0006, uint16_t product_release = 0x0001); + + /** + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. + * + * @param phy USB phy to use + * @param output_report_length Maximum length of a sent report (up to 64 bytes) + * @param input_report_length Maximum length of a received report (up to 64 bytes) + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBHID(USBPhy *phy, uint8_t output_report_length, uint8_t input_report_length, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ + virtual ~USBHID(); + + /** + * Check if this class is ready + * + * @return true if the device is in the configured state + */ + bool ready(); + + /** + * Block until this HID device is in the configured state + */ + void wait_ready(); + + /** + * Send a Report. warning: blocking + * + * @param report Report which will be sent (a report is defined by all data and the length) + * @returns true if successful + */ + bool send(const HID_REPORT *report); + + + /** + * Send a Report. warning: non blocking + * + * @param report Report which will be sent (a report is defined by all data and the length) + * @returns true if successful + */ + bool send_nb(const HID_REPORT *report); + + /** + * Read a report: blocking + * + * @param report pointer to the report to fill + * @returns true if successful + */ + bool read(HID_REPORT *report); + + /** + * Read a report: non blocking + * + * @param report pointer to the report to fill + * @returns true if successful + */ + bool read_nb(HID_REPORT *report); + +protected: + uint16_t reportLength; + uint8_t reportDescriptor[27]; + + /* + * Get the Report descriptor + * + * @returns pointer to the report descriptor + */ + virtual const uint8_t *report_desc(); + + /* + * Get the length of the report descriptor + * + * @returns the length of the report descriptor + */ + virtual uint16_t report_desc_length(); + + /* + * Get string product descriptor + * + * @returns pointer to the string product descriptor + */ + virtual const uint8_t *string_iproduct_desc(); + + /* + * Get string interface descriptor + * + * @returns pointer to the string interface descriptor + */ + virtual const uint8_t *string_iinterface_desc(); + + /* + * Get configuration descriptor + * + * @returns pointer to the configuration descriptor + */ + virtual const uint8_t *configuration_desc(uint8_t index); + + + /* + * HID Report received by SET_REPORT request. Warning: Called in ISR context + * First byte of data will be the report ID + * + * @param report Data and length received + */ + virtual void HID_callbackSetReport(HID_REPORT *report) {}; + + /** + * Called when USB changes state + * + * @param new_state The new state of the USBDevice + * + * Warning: Called in ISR context + */ + virtual void callback_state_change(DeviceState new_state); + + /* + * This is used to handle extensions to standard requests + * and class specific requests + */ + virtual void callback_request(const setup_packet_t *setup); + + /* + * This is used to handle extensions to standard requests + * and class specific requests with a data phase + */ + virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); + + + /* + * Called by USBDevice layer. Set configuration of the device. + * For instance, you can add all endpoints that you need on this function. + * + * @param configuration Number of the configuration + * @returns true if class handles this request + */ + virtual void callback_set_configuration(uint8_t configuration); + + /* + * Called by USBDevice layer in response to set_interface. + * + * Upon reception of this command endpoints of any previous interface + * if any must be removed with endpoint_remove and new endpoint added with + * endpoint_add. + * + * @param configuration Number of the configuration + * + * Warning: Called in ISR context + */ + virtual void callback_set_interface(uint16_t interface, uint8_t alternate); + + /* + * Called when there is a hid report that can be read + */ + virtual void report_rx() {} + + /* + * Called when there is space to send a hid report + */ + virtual void report_tx() {} + +protected: + usb_ep_t _int_in; + usb_ep_t _int_out; + +private: + void _init(uint8_t output_report_length, uint8_t input_report_length); + void _send_isr(usb_ep_t endpoint); + void _read_isr(usb_ep_t endpoint); + + void _connect_wake_all(); + void _send_abort_all(); + void _read_abort_all(); + + class AsyncSend; + class AsyncRead; + + LinkedList _connect_list; + LinkedList _send_list; + bool _send_idle; + LinkedList _read_list; + bool _read_idle; + + uint8_t _configuration_descriptor[41]; + HID_REPORT _input_report; + HID_REPORT _output_report; + uint8_t _output_length; + uint8_t _input_length; + + +}; + +#endif diff --git a/usb/device/USBHID/USBHID_Types.h b/usb/device/USBHID/USBHID_Types.h new file mode 100644 index 00000000000..e2604a34a6b --- /dev/null +++ b/usb/device/USBHID/USBHID_Types.h @@ -0,0 +1,92 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBCLASS_HID_TYPES +#define USBCLASS_HID_TYPES + +#include + +/* */ +#define HID_VERSION_1_11 (0x0111) + +/* HID Class */ +#define HID_CLASS (3) +#define HID_SUBCLASS_NONE (0) +#define HID_SUBCLASS_BOOT (1) +#define HID_PROTOCOL_NONE (0) +#define HID_PROTOCOL_KEYBOARD (1) +#define HID_PROTOCOL_MOUSE (2) + +/* Descriptors */ +#define HID_DESCRIPTOR (33) +#define HID_DESCRIPTOR_LENGTH (0x09) +#define REPORT_DESCRIPTOR (34) + +/* Class requests */ +#define GET_REPORT (0x1) +#define GET_IDLE (0x2) +#define SET_REPORT (0x9) +#define SET_IDLE (0xa) + +/* HID Class Report Descriptor */ +/* Short items: size is 0, 1, 2 or 3 specifying 0, 1, 2 or 4 (four) bytes */ +/* of data as per HID Class standard */ + +/* Main items */ +#define INPUT(size) (0x80 | size) +#define OUTPUT(size) (0x90 | size) +#define FEATURE(size) (0xb0 | size) +#define COLLECTION(size) (0xa0 | size) +#define END_COLLECTION(size) (0xc0 | size) + +/* Global items */ +#define USAGE_PAGE(size) (0x04 | size) +#define LOGICAL_MINIMUM(size) (0x14 | size) +#define LOGICAL_MAXIMUM(size) (0x24 | size) +#define PHYSICAL_MINIMUM(size) (0x34 | size) +#define PHYSICAL_MAXIMUM(size) (0x44 | size) +#define UNIT_EXPONENT(size) (0x54 | size) +#define UNIT(size) (0x64 | size) +#define REPORT_SIZE(size) (0x74 | size) +#define REPORT_ID(size) (0x84 | size) +#define REPORT_COUNT(size) (0x94 | size) +#define PUSH(size) (0xa4 | size) +#define POP(size) (0xb4 | size) + +/* Local items */ +#define USAGE(size) (0x08 | size) +#define USAGE_MINIMUM(size) (0x18 | size) +#define USAGE_MAXIMUM(size) (0x28 | size) +#define DESIGNATOR_INDEX(size) (0x38 | size) +#define DESIGNATOR_MINIMUM(size) (0x48 | size) +#define DESIGNATOR_MAXIMUM(size) (0x58 | size) +#define STRING_INDEX(size) (0x78 | size) +#define STRING_MINIMUM(size) (0x88 | size) +#define STRING_MAXIMUM(size) (0x98 | size) +#define DELIMITER(size) (0xa8 | size) + +/* HID Report */ +/* Where report IDs are used the first byte of 'data' will be the */ +/* report ID and 'length' will include this report ID byte. */ + +#define MAX_HID_REPORT_SIZE (64) + +typedef struct { + uint32_t length; + uint8_t data[MAX_HID_REPORT_SIZE]; +} HID_REPORT; + +#endif diff --git a/usb/device/USBHID/USBKeyboard.cpp b/usb/device/USBHID/USBKeyboard.cpp new file mode 100644 index 00000000000..5a9cd9ce467 --- /dev/null +++ b/usb/device/USBHID/USBKeyboard.cpp @@ -0,0 +1,604 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" + +#include "USBKeyboard.h" +#include "usb_phy_api.h" + +#define REPORT_ID_KEYBOARD 1 +#define REPORT_ID_VOLUME 3 + + +typedef struct { + unsigned char usage; + unsigned char modifier; +} KEYMAP; + +#ifdef US_KEYBOARD +/* US keyboard (as HID standard) */ +#define KEYMAP_SIZE (152) +const KEYMAP keymap[KEYMAP_SIZE] = { + {0, 0}, /* NUL */ + {0, 0}, /* SOH */ + {0, 0}, /* STX */ + {0, 0}, /* ETX */ + {0, 0}, /* EOT */ + {0, 0}, /* ENQ */ + {0, 0}, /* ACK */ + {0, 0}, /* BEL */ + {0x2a, 0}, /* BS */ /* Keyboard Delete (Backspace) */ + {0x2b, 0}, /* TAB */ /* Keyboard Tab */ + {0x28, 0}, /* LF */ /* Keyboard Return (Enter) */ + {0, 0}, /* VT */ + {0, 0}, /* FF */ + {0, 0}, /* CR */ + {0, 0}, /* SO */ + {0, 0}, /* SI */ + {0, 0}, /* DEL */ + {0, 0}, /* DC1 */ + {0, 0}, /* DC2 */ + {0, 0}, /* DC3 */ + {0, 0}, /* DC4 */ + {0, 0}, /* NAK */ + {0, 0}, /* SYN */ + {0, 0}, /* ETB */ + {0, 0}, /* CAN */ + {0, 0}, /* EM */ + {0, 0}, /* SUB */ + {0, 0}, /* ESC */ + {0, 0}, /* FS */ + {0, 0}, /* GS */ + {0, 0}, /* RS */ + {0, 0}, /* US */ + {0x2c, 0}, /* */ + {0x1e, KEY_SHIFT}, /* ! */ + {0x34, KEY_SHIFT}, /* " */ + {0x20, KEY_SHIFT}, /* # */ + {0x21, KEY_SHIFT}, /* $ */ + {0x22, KEY_SHIFT}, /* % */ + {0x24, KEY_SHIFT}, /* & */ + {0x34, 0}, /* ' */ + {0x26, KEY_SHIFT}, /* ( */ + {0x27, KEY_SHIFT}, /* ) */ + {0x25, KEY_SHIFT}, /* * */ + {0x2e, KEY_SHIFT}, /* + */ + {0x36, 0}, /* , */ + {0x2d, 0}, /* - */ + {0x37, 0}, /* . */ + {0x38, 0}, /* / */ + {0x27, 0}, /* 0 */ + {0x1e, 0}, /* 1 */ + {0x1f, 0}, /* 2 */ + {0x20, 0}, /* 3 */ + {0x21, 0}, /* 4 */ + {0x22, 0}, /* 5 */ + {0x23, 0}, /* 6 */ + {0x24, 0}, /* 7 */ + {0x25, 0}, /* 8 */ + {0x26, 0}, /* 9 */ + {0x33, KEY_SHIFT}, /* : */ + {0x33, 0}, /* ; */ + {0x36, KEY_SHIFT}, /* < */ + {0x2e, 0}, /* = */ + {0x37, KEY_SHIFT}, /* > */ + {0x38, KEY_SHIFT}, /* ? */ + {0x1f, KEY_SHIFT}, /* @ */ + {0x04, KEY_SHIFT}, /* A */ + {0x05, KEY_SHIFT}, /* B */ + {0x06, KEY_SHIFT}, /* C */ + {0x07, KEY_SHIFT}, /* D */ + {0x08, KEY_SHIFT}, /* E */ + {0x09, KEY_SHIFT}, /* F */ + {0x0a, KEY_SHIFT}, /* G */ + {0x0b, KEY_SHIFT}, /* H */ + {0x0c, KEY_SHIFT}, /* I */ + {0x0d, KEY_SHIFT}, /* J */ + {0x0e, KEY_SHIFT}, /* K */ + {0x0f, KEY_SHIFT}, /* L */ + {0x10, KEY_SHIFT}, /* M */ + {0x11, KEY_SHIFT}, /* N */ + {0x12, KEY_SHIFT}, /* O */ + {0x13, KEY_SHIFT}, /* P */ + {0x14, KEY_SHIFT}, /* Q */ + {0x15, KEY_SHIFT}, /* R */ + {0x16, KEY_SHIFT}, /* S */ + {0x17, KEY_SHIFT}, /* T */ + {0x18, KEY_SHIFT}, /* U */ + {0x19, KEY_SHIFT}, /* V */ + {0x1a, KEY_SHIFT}, /* W */ + {0x1b, KEY_SHIFT}, /* X */ + {0x1c, KEY_SHIFT}, /* Y */ + {0x1d, KEY_SHIFT}, /* Z */ + {0x2f, 0}, /* [ */ + {0x31, 0}, /* \ */ + {0x30, 0}, /* ] */ + {0x23, KEY_SHIFT}, /* ^ */ + {0x2d, KEY_SHIFT}, /* _ */ + {0x35, 0}, /* ` */ + {0x04, 0}, /* a */ + {0x05, 0}, /* b */ + {0x06, 0}, /* c */ + {0x07, 0}, /* d */ + {0x08, 0}, /* e */ + {0x09, 0}, /* f */ + {0x0a, 0}, /* g */ + {0x0b, 0}, /* h */ + {0x0c, 0}, /* i */ + {0x0d, 0}, /* j */ + {0x0e, 0}, /* k */ + {0x0f, 0}, /* l */ + {0x10, 0}, /* m */ + {0x11, 0}, /* n */ + {0x12, 0}, /* o */ + {0x13, 0}, /* p */ + {0x14, 0}, /* q */ + {0x15, 0}, /* r */ + {0x16, 0}, /* s */ + {0x17, 0}, /* t */ + {0x18, 0}, /* u */ + {0x19, 0}, /* v */ + {0x1a, 0}, /* w */ + {0x1b, 0}, /* x */ + {0x1c, 0}, /* y */ + {0x1d, 0}, /* z */ + {0x2f, KEY_SHIFT}, /* { */ + {0x31, KEY_SHIFT}, /* | */ + {0x30, KEY_SHIFT}, /* } */ + {0x35, KEY_SHIFT}, /* ~ */ + {0, 0}, /* DEL */ + + {0x3a, 0}, /* F1 */ + {0x3b, 0}, /* F2 */ + {0x3c, 0}, /* F3 */ + {0x3d, 0}, /* F4 */ + {0x3e, 0}, /* F5 */ + {0x3f, 0}, /* F6 */ + {0x40, 0}, /* F7 */ + {0x41, 0}, /* F8 */ + {0x42, 0}, /* F9 */ + {0x43, 0}, /* F10 */ + {0x44, 0}, /* F11 */ + {0x45, 0}, /* F12 */ + + {0x46, 0}, /* PRINT_SCREEN */ + {0x47, 0}, /* SCROLL_LOCK */ + {0x39, 0}, /* CAPS_LOCK */ + {0x53, 0}, /* NUM_LOCK */ + {0x49, 0}, /* INSERT */ + {0x4a, 0}, /* HOME */ + {0x4b, 0}, /* PAGE_UP */ + {0x4e, 0}, /* PAGE_DOWN */ + + {0x4f, 0}, /* RIGHT_ARROW */ + {0x50, 0}, /* LEFT_ARROW */ + {0x51, 0}, /* DOWN_ARROW */ + {0x52, 0}, /* UP_ARROW */ +}; + +#else +/* UK keyboard */ +#define KEYMAP_SIZE (152) +const KEYMAP keymap[KEYMAP_SIZE] = { + {0, 0}, /* NUL */ + {0, 0}, /* SOH */ + {0, 0}, /* STX */ + {0, 0}, /* ETX */ + {0, 0}, /* EOT */ + {0, 0}, /* ENQ */ + {0, 0}, /* ACK */ + {0, 0}, /* BEL */ + {0x2a, 0}, /* BS */ /* Keyboard Delete (Backspace) */ + {0x2b, 0}, /* TAB */ /* Keyboard Tab */ + {0x28, 0}, /* LF */ /* Keyboard Return (Enter) */ + {0, 0}, /* VT */ + {0, 0}, /* FF */ + {0, 0}, /* CR */ + {0, 0}, /* SO */ + {0, 0}, /* SI */ + {0, 0}, /* DEL */ + {0, 0}, /* DC1 */ + {0, 0}, /* DC2 */ + {0, 0}, /* DC3 */ + {0, 0}, /* DC4 */ + {0, 0}, /* NAK */ + {0, 0}, /* SYN */ + {0, 0}, /* ETB */ + {0, 0}, /* CAN */ + {0, 0}, /* EM */ + {0, 0}, /* SUB */ + {0, 0}, /* ESC */ + {0, 0}, /* FS */ + {0, 0}, /* GS */ + {0, 0}, /* RS */ + {0, 0}, /* US */ + {0x2c, 0}, /* */ + {0x1e, KEY_SHIFT}, /* ! */ + {0x1f, KEY_SHIFT}, /* " */ + {0x32, 0}, /* # */ + {0x21, KEY_SHIFT}, /* $ */ + {0x22, KEY_SHIFT}, /* % */ + {0x24, KEY_SHIFT}, /* & */ + {0x34, 0}, /* ' */ + {0x26, KEY_SHIFT}, /* ( */ + {0x27, KEY_SHIFT}, /* ) */ + {0x25, KEY_SHIFT}, /* * */ + {0x2e, KEY_SHIFT}, /* + */ + {0x36, 0}, /* , */ + {0x2d, 0}, /* - */ + {0x37, 0}, /* . */ + {0x38, 0}, /* / */ + {0x27, 0}, /* 0 */ + {0x1e, 0}, /* 1 */ + {0x1f, 0}, /* 2 */ + {0x20, 0}, /* 3 */ + {0x21, 0}, /* 4 */ + {0x22, 0}, /* 5 */ + {0x23, 0}, /* 6 */ + {0x24, 0}, /* 7 */ + {0x25, 0}, /* 8 */ + {0x26, 0}, /* 9 */ + {0x33, KEY_SHIFT}, /* : */ + {0x33, 0}, /* ; */ + {0x36, KEY_SHIFT}, /* < */ + {0x2e, 0}, /* = */ + {0x37, KEY_SHIFT}, /* > */ + {0x38, KEY_SHIFT}, /* ? */ + {0x34, KEY_SHIFT}, /* @ */ + {0x04, KEY_SHIFT}, /* A */ + {0x05, KEY_SHIFT}, /* B */ + {0x06, KEY_SHIFT}, /* C */ + {0x07, KEY_SHIFT}, /* D */ + {0x08, KEY_SHIFT}, /* E */ + {0x09, KEY_SHIFT}, /* F */ + {0x0a, KEY_SHIFT}, /* G */ + {0x0b, KEY_SHIFT}, /* H */ + {0x0c, KEY_SHIFT}, /* I */ + {0x0d, KEY_SHIFT}, /* J */ + {0x0e, KEY_SHIFT}, /* K */ + {0x0f, KEY_SHIFT}, /* L */ + {0x10, KEY_SHIFT}, /* M */ + {0x11, KEY_SHIFT}, /* N */ + {0x12, KEY_SHIFT}, /* O */ + {0x13, KEY_SHIFT}, /* P */ + {0x14, KEY_SHIFT}, /* Q */ + {0x15, KEY_SHIFT}, /* R */ + {0x16, KEY_SHIFT}, /* S */ + {0x17, KEY_SHIFT}, /* T */ + {0x18, KEY_SHIFT}, /* U */ + {0x19, KEY_SHIFT}, /* V */ + {0x1a, KEY_SHIFT}, /* W */ + {0x1b, KEY_SHIFT}, /* X */ + {0x1c, KEY_SHIFT}, /* Y */ + {0x1d, KEY_SHIFT}, /* Z */ + {0x2f, 0}, /* [ */ + {0x64, 0}, /* \ */ + {0x30, 0}, /* ] */ + {0x23, KEY_SHIFT}, /* ^ */ + {0x2d, KEY_SHIFT}, /* _ */ + {0x35, 0}, /* ` */ + {0x04, 0}, /* a */ + {0x05, 0}, /* b */ + {0x06, 0}, /* c */ + {0x07, 0}, /* d */ + {0x08, 0}, /* e */ + {0x09, 0}, /* f */ + {0x0a, 0}, /* g */ + {0x0b, 0}, /* h */ + {0x0c, 0}, /* i */ + {0x0d, 0}, /* j */ + {0x0e, 0}, /* k */ + {0x0f, 0}, /* l */ + {0x10, 0}, /* m */ + {0x11, 0}, /* n */ + {0x12, 0}, /* o */ + {0x13, 0}, /* p */ + {0x14, 0}, /* q */ + {0x15, 0}, /* r */ + {0x16, 0}, /* s */ + {0x17, 0}, /* t */ + {0x18, 0}, /* u */ + {0x19, 0}, /* v */ + {0x1a, 0}, /* w */ + {0x1b, 0}, /* x */ + {0x1c, 0}, /* y */ + {0x1d, 0}, /* z */ + {0x2f, KEY_SHIFT}, /* { */ + {0x64, KEY_SHIFT}, /* | */ + {0x30, KEY_SHIFT}, /* } */ + {0x32, KEY_SHIFT}, /* ~ */ + {0, 0}, /* DEL */ + + {0x3a, 0}, /* F1 */ + {0x3b, 0}, /* F2 */ + {0x3c, 0}, /* F3 */ + {0x3d, 0}, /* F4 */ + {0x3e, 0}, /* F5 */ + {0x3f, 0}, /* F6 */ + {0x40, 0}, /* F7 */ + {0x41, 0}, /* F8 */ + {0x42, 0}, /* F9 */ + {0x43, 0}, /* F10 */ + {0x44, 0}, /* F11 */ + {0x45, 0}, /* F12 */ + + {0x46, 0}, /* PRINT_SCREEN */ + {0x47, 0}, /* SCROLL_LOCK */ + {0x39, 0}, /* CAPS_LOCK */ + {0x53, 0}, /* NUM_LOCK */ + {0x49, 0}, /* INSERT */ + {0x4a, 0}, /* HOME */ + {0x4b, 0}, /* PAGE_UP */ + {0x4e, 0}, /* PAGE_DOWN */ + + {0x4f, 0}, /* RIGHT_ARROW */ + {0x50, 0}, /* LEFT_ARROW */ + {0x51, 0}, /* DOWN_ARROW */ + {0x52, 0}, /* UP_ARROW */ +}; +#endif + + +USBKeyboard::USBKeyboard(bool connect, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBHID(get_usb_phy(), 0, 0, vendor_id, product_id, product_release) +{ + _lock_status = 0; + if (connect) { + USBDevice::connect(); + wait_ready(); + } else { + init(); + } +} + +USBKeyboard::USBKeyboard(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBHID(phy, 0, 0, vendor_id, product_id, product_release) +{ + _lock_status = 0; + + // User or child responsible for calling connect or init +} + +USBKeyboard::~USBKeyboard() +{ + deinit(); +} + +const uint8_t *USBKeyboard::report_desc() +{ + static const uint8_t reportDescriptor[] = { + USAGE_PAGE(1), 0x01, // Generic Desktop + USAGE(1), 0x06, // Keyboard + COLLECTION(1), 0x01, // Application + REPORT_ID(1), REPORT_ID_KEYBOARD, + + USAGE_PAGE(1), 0x07, // Key Codes + USAGE_MINIMUM(1), 0xE0, + USAGE_MAXIMUM(1), 0xE7, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x01, + REPORT_SIZE(1), 0x01, + REPORT_COUNT(1), 0x08, + INPUT(1), 0x02, // Data, Variable, Absolute + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x08, + INPUT(1), 0x01, // Constant + + + REPORT_COUNT(1), 0x05, + REPORT_SIZE(1), 0x01, + USAGE_PAGE(1), 0x08, // LEDs + USAGE_MINIMUM(1), 0x01, + USAGE_MAXIMUM(1), 0x05, + OUTPUT(1), 0x02, // Data, Variable, Absolute + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x03, + OUTPUT(1), 0x01, // Constant + + + REPORT_COUNT(1), 0x06, + REPORT_SIZE(1), 0x08, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x65, + USAGE_PAGE(1), 0x07, // Key Codes + USAGE_MINIMUM(1), 0x00, + USAGE_MAXIMUM(1), 0x65, + INPUT(1), 0x00, // Data, Array + END_COLLECTION(0), + + // Media Control + USAGE_PAGE(1), 0x0C, + USAGE(1), 0x01, + COLLECTION(1), 0x01, + REPORT_ID(1), REPORT_ID_VOLUME, + USAGE_PAGE(1), 0x0C, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x01, + REPORT_SIZE(1), 0x01, + REPORT_COUNT(1), 0x07, + USAGE(1), 0xB5, // Next Track + USAGE(1), 0xB6, // Previous Track + USAGE(1), 0xB7, // Stop + USAGE(1), 0xCD, // Play / Pause + USAGE(1), 0xE2, // Mute + USAGE(1), 0xE9, // Volume Up + USAGE(1), 0xEA, // Volume Down + INPUT(1), 0x02, // Input (Data, Variable, Absolute) + REPORT_COUNT(1), 0x01, + INPUT(1), 0x01, + END_COLLECTION(0), + }; + reportLength = sizeof(reportDescriptor); + return reportDescriptor; +} + + +void USBKeyboard::report_rx() +{ + assert_locked(); + + HID_REPORT report; + read_nb(&report); + + // we take [1] because [0] is the report ID + _lock_status = report.data[1] & 0x07; +} + +uint8_t USBKeyboard::lock_status() +{ + return _lock_status; +} + +int USBKeyboard::_putc(int c) +{ + return key_code(c, keymap[c].modifier); +} + +bool USBKeyboard::key_code(uint8_t key, uint8_t modifier) +{ + _mutex.lock(); + + // Send a simulated keyboard keypress. Returns true if successful. + HID_REPORT report; + + report.data[0] = REPORT_ID_KEYBOARD; + report.data[1] = modifier; + report.data[2] = 0; + report.data[3] = keymap[key].usage; + report.data[4] = 0; + report.data[5] = 0; + report.data[6] = 0; + report.data[7] = 0; + report.data[8] = 0; + + report.length = 9; + + if (!send(&report)) { + _mutex.unlock(); + return false; + } + + report.data[1] = 0; + report.data[3] = 0; + + if (!send(&report)) { + _mutex.unlock(); + return false; + } + + _mutex.unlock(); + return true; + +} + + +bool USBKeyboard::media_control(MEDIA_KEY key) +{ + _mutex.lock(); + + HID_REPORT report; + + report.data[0] = REPORT_ID_VOLUME; + report.data[1] = (1 << key) & 0x7f; + + report.length = 2; + + if (!send(&report)) { + _mutex.unlock(); + return false; + } + + report.data[0] = REPORT_ID_VOLUME; + report.data[1] = 0; + + report.length = 2; + + if (!send(&report)) { + _mutex.unlock(); + return false; + } + + _mutex.unlock(); + return true; +} + +#define DEFAULT_CONFIGURATION (1) +#define TOTAL_DESCRIPTOR_LENGTH ((1 * CONFIGURATION_DESCRIPTOR_LENGTH) \ + + (1 * INTERFACE_DESCRIPTOR_LENGTH) \ + + (1 * HID_DESCRIPTOR_LENGTH) \ + + (2 * ENDPOINT_DESCRIPTOR_LENGTH)) + +const uint8_t *USBKeyboard::configuration_desc(uint8_t index) +{ + if (index != 0) { + return NULL; + } + uint8_t configuration_descriptor_temp[] = { + CONFIGURATION_DESCRIPTOR_LENGTH, // bLength + CONFIGURATION_DESCRIPTOR, // bDescriptorType + LSB(TOTAL_DESCRIPTOR_LENGTH), // wTotalLength (LSB) + MSB(TOTAL_DESCRIPTOR_LENGTH), // wTotalLength (MSB) + 0x01, // bNumInterfaces + DEFAULT_CONFIGURATION, // bConfigurationValue + 0x00, // iConfiguration + C_RESERVED | C_SELF_POWERED, // bmAttributes + C_POWER(0), // bMaxPower + + INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0x00, // bInterfaceNumber + 0x00, // bAlternateSetting + 0x02, // bNumEndpoints + HID_CLASS, // bInterfaceClass + HID_SUBCLASS_BOOT, // bInterfaceSubClass + HID_PROTOCOL_KEYBOARD, // bInterfaceProtocol + 0x00, // iInterface + + HID_DESCRIPTOR_LENGTH, // bLength + HID_DESCRIPTOR, // bDescriptorType + LSB(HID_VERSION_1_11), // bcdHID (LSB) + MSB(HID_VERSION_1_11), // bcdHID (MSB) + 0x00, // bCountryCode + 0x01, // bNumDescriptors + REPORT_DESCRIPTOR, // bDescriptorType + (uint8_t)(LSB(report_desc_length())), // wDescriptorLength (LSB) + (uint8_t)(MSB(report_desc_length())), // wDescriptorLength (MSB) + + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _int_in, // bEndpointAddress + E_INTERRUPT, // bmAttributes + LSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval (milliseconds) + + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _int_out, // bEndpointAddress + E_INTERRUPT, // bmAttributes + LSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval (milliseconds) + }; + MBED_ASSERT(sizeof(configuration_descriptor_temp) == sizeof(_configuration_descriptor)); + memcpy(_configuration_descriptor, configuration_descriptor_temp, sizeof(_configuration_descriptor)); + return _configuration_descriptor; +} + +int USBKeyboard::_getc() +{ + return -1; +} diff --git a/usb/device/USBHID/USBKeyboard.h b/usb/device/USBHID/USBKeyboard.h new file mode 100644 index 00000000000..d2f8a765a82 --- /dev/null +++ b/usb/device/USBHID/USBKeyboard.h @@ -0,0 +1,211 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBKEYBOARD_H +#define USBKEYBOARD_H + +#include "USBHID.h" +#include "Stream.h" +#include "PlatformMutex.h" + +/* Modifiers, left keys then right keys. */ +enum MODIFIER_KEY { + KEY_CTRL = 0x01, + KEY_SHIFT = 0x02, + KEY_ALT = 0x04, + KEY_LOGO = 0x08, + KEY_RCTRL = 0x10, + KEY_RSHIFT = 0x20, + KEY_RALT = 0x40, + KEY_RLOGO = 0x80, +}; + + +enum MEDIA_KEY { + KEY_NEXT_TRACK, /*!< next Track Button */ + KEY_PREVIOUS_TRACK, /*!< Previous track Button */ + KEY_STOP, /*!< Stop Button */ + KEY_PLAY_PAUSE, /*!< Play/Pause Button */ + KEY_MUTE, /*!< Mute Button */ + KEY_VOLUME_UP, /*!< Volume Up Button */ + KEY_VOLUME_DOWN, /*!< Volume Down Button */ +}; + +enum FUNCTION_KEY { + KEY_F1 = 128, /* F1 key */ + KEY_F2, /* F2 key */ + KEY_F3, /* F3 key */ + KEY_F4, /* F4 key */ + KEY_F5, /* F5 key */ + KEY_F6, /* F6 key */ + KEY_F7, /* F7 key */ + KEY_F8, /* F8 key */ + KEY_F9, /* F9 key */ + KEY_F10, /* F10 key */ + KEY_F11, /* F11 key */ + KEY_F12, /* F12 key */ + + KEY_PRINT_SCREEN, /* Print Screen key */ + KEY_SCROLL_LOCK, /* Scroll lock */ + KEY_CAPS_LOCK, /* caps lock */ + KEY_NUM_LOCK, /* num lock */ + KEY_INSERT, /* Insert key */ + KEY_HOME, /* Home key */ + KEY_PAGE_UP, /* Page Up key */ + KEY_PAGE_DOWN, /* Page Down key */ + + RIGHT_ARROW, /* Right arrow */ + LEFT_ARROW, /* Left arrow */ + DOWN_ARROW, /* Down arrow */ + UP_ARROW, /* Up arrow */ +}; + +/** + * USBKeyboard example + * @code + * + * #include "mbed.h" + * #include "USBKeyboard.h" + * + * USBKeyboard key; + * + * int main(void) + * { + * while (1) { + * key.printf("Hello World\r\n"); + * wait(1); + * } + * } + * + * @endcode + * + * @note Synchronization level: Thread safe + */ +class USBKeyboard: public USBHID, public Stream { +public: + + /** + * Basic constructor + * + * Construct this object optionally connecting and blocking until it is ready. + * + * @note Do not use this constructor in derived classes. + * + * @param connect_blocking true to perform a blocking connect, false to start in a disconnected state + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBKeyboard(bool connect_blocking = true, uint16_t vendor_id = 0x1235, uint16_t product_id = 0x0050, uint16_t product_release = 0x0001); + + /** + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. + * + * @param phy USB phy to use + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBKeyboard(USBPhy *phy, uint16_t vendor_id = 0x1235, uint16_t product_id = 0x0050, uint16_t product_release = 0x0001); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ + virtual ~USBKeyboard(); + + /** + * To send a character defined by a modifier(CTRL, SHIFT, ALT) and the key + * + * @code + * //To send CTRL + s (save) + * keyboard.key_code('s', KEY_CTRL); + * @endcode + * + * @param modifier bit 0: KEY_CTRL, bit 1: KEY_SHIFT, bit 2: KEY_ALT (default: 0) + * @param key character to send + * @returns true if there is no error, false otherwise + */ + bool key_code(uint8_t key, uint8_t modifier = 0); + + /** + * Send a character + * + * @param c character to be sent + * @returns true if there is no error, false otherwise + */ + virtual int _putc(int c); + + /** + * Control media keys + * + * @param key media key pressed (KEY_NEXT_TRACK, KEY_PREVIOUS_TRACK, KEY_STOP, KEY_PLAY_PAUSE, KEY_MUTE, KEY_VOLUME_UP, KEY_VOLUME_DOWN) + * @returns true if there is no error, false otherwise + */ + bool media_control(MEDIA_KEY key); + + /* + * To define the report descriptor. Warning: this method has to store the length of the report descriptor in reportLength. + * + * @returns pointer to the report descriptor + */ + virtual const uint8_t *report_desc(); + + /* + * Called when a data is received on the OUT endpoint. Useful to switch on LED of LOCK keys + */ + virtual void report_rx(); + + /** + * Read status of lock keys. Useful to switch-on/off leds according to key pressed. Only the first three bits of the result is important: + * - First bit: NUM_LOCK + * - Second bit: CAPS_LOCK + * - Third bit: SCROLL_LOCK + * + * @returns status of lock keys + */ + uint8_t lock_status(); + +protected: + /* + * Get configuration descriptor + * + * @returns pointer to the configuration descriptor + */ + virtual const uint8_t *configuration_desc(uint8_t index); + +private: + + //dummy otherwise it doesn't compile (we must define all methods of an abstract class) + virtual int _getc(); + + uint8_t _configuration_descriptor[41]; + uint8_t _lock_status; + PlatformMutex _mutex; + +}; + +#endif diff --git a/usb/device/USBHID/USBMouse.cpp b/usb/device/USBHID/USBMouse.cpp new file mode 100644 index 00000000000..902e9e72f7f --- /dev/null +++ b/usb/device/USBHID/USBMouse.cpp @@ -0,0 +1,348 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBMouse.h" +#include "PlatformMutex.h" +#include "usb_phy_api.h" + + +USBMouse::USBMouse(bool connect_blocking, MOUSE_TYPE mouse_type, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBHID(get_usb_phy(), 0, 0, vendor_id, product_id, product_release) +{ + _button = 0; + _mouse_type = mouse_type; + + if (connect_blocking) { + USBDevice::connect(); + wait_ready(); + } else { + init(); + } +} + +USBMouse::USBMouse(USBPhy *phy, MOUSE_TYPE mouse_type, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBHID(get_usb_phy(), 0, 0, vendor_id, product_id, product_release) +{ + _button = 0; + _mouse_type = mouse_type; +} + +USBMouse::~USBMouse() +{ + deinit(); +} + +bool USBMouse::update(int16_t x, int16_t y, uint8_t button, int8_t z) +{ + bool ret; + switch (_mouse_type) { + case REL_MOUSE: + _mutex.lock(); + + while (x > 127) { + if (!mouse_send(127, 0, button, z)) { + _mutex.unlock(); + return false; + } + x = x - 127; + } + while (x < -128) { + if (!mouse_send(-128, 0, button, z)) { + _mutex.unlock(); + return false; + } + x = x + 128; + } + while (y > 127) { + if (!mouse_send(0, 127, button, z)) { + _mutex.unlock(); + return false; + } + y = y - 127; + } + while (y < -128) { + if (!mouse_send(0, -128, button, z)) { + _mutex.unlock(); + return false; + } + y = y + 128; + } + ret = mouse_send(x, y, button, z); + + _mutex.unlock(); + return ret; + case ABS_MOUSE: + _mutex.lock(); + + HID_REPORT report; + + report.data[0] = x & 0xff; + report.data[1] = (x >> 8) & 0xff; + report.data[2] = y & 0xff; + report.data[3] = (y >> 8) & 0xff; + report.data[4] = -z; + report.data[5] = button & 0x07; + + report.length = 6; + + ret = send(&report); + + _mutex.unlock(); + return ret; + default: + return false; + } +} + +bool USBMouse::mouse_send(int8_t x, int8_t y, uint8_t buttons, int8_t z) +{ + _mutex.lock(); + + HID_REPORT report; + report.data[0] = buttons & 0x07; + report.data[1] = x; + report.data[2] = y; + report.data[3] = -z; // >0 to scroll down, <0 to scroll up + + report.length = 4; + + bool ret = send(&report); + + _mutex.unlock(); + return ret; +} + +bool USBMouse::move(int16_t x, int16_t y) +{ + _mutex.lock(); + + bool ret = update(x, y, _button, 0); + + _mutex.unlock(); + return ret; +} + +bool USBMouse::scroll(int8_t z) +{ + _mutex.lock(); + + bool ret = update(0, 0, _button, z); + + _mutex.unlock(); + return ret; +} + + +bool USBMouse::double_click() +{ + _mutex.lock(); + + if (!click(MOUSE_LEFT)) { + _mutex.unlock(); + return false; + } + wait(0.1); + bool ret = click(MOUSE_LEFT); + + _mutex.unlock(); + return ret; +} + +bool USBMouse::click(uint8_t button) +{ + _mutex.lock(); + + if (!update(0, 0, button, 0)) { + _mutex.unlock(); + return false; + } + wait(0.01); + bool ret = update(0, 0, 0, 0); + + _mutex.unlock(); + return ret; +} + +bool USBMouse::press(uint8_t button) +{ + _mutex.lock(); + + _button = button & 0x07; + bool ret = update(0, 0, _button, 0); + + _mutex.unlock(); + return ret; +} + +bool USBMouse::release(uint8_t button) +{ + _mutex.lock(); + + _button = (_button & (~button)) & 0x07; + bool ret = update(0, 0, _button, 0); + + _mutex.unlock(); + return ret; +} + + +const uint8_t *USBMouse::report_desc() +{ + + if (_mouse_type == REL_MOUSE) { + static const uint8_t report_descriptor[] = { + USAGE_PAGE(1), 0x01, // Genric Desktop + USAGE(1), 0x02, // Mouse + COLLECTION(1), 0x01, // Application + USAGE(1), 0x01, // Pointer + COLLECTION(1), 0x00, // Physical + + REPORT_COUNT(1), 0x03, + REPORT_SIZE(1), 0x01, + USAGE_PAGE(1), 0x09, // Buttons + USAGE_MINIMUM(1), 0x1, + USAGE_MAXIMUM(1), 0x3, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x01, + INPUT(1), 0x02, + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x05, + INPUT(1), 0x01, + + REPORT_COUNT(1), 0x03, + REPORT_SIZE(1), 0x08, + USAGE_PAGE(1), 0x01, + USAGE(1), 0x30, // X + USAGE(1), 0x31, // Y + USAGE(1), 0x38, // scroll + LOGICAL_MINIMUM(1), 0x81, + LOGICAL_MAXIMUM(1), 0x7f, + INPUT(1), 0x06, // Relative data + + END_COLLECTION(0), + END_COLLECTION(0), + }; + reportLength = sizeof(report_descriptor); + return report_descriptor; + } else if (_mouse_type == ABS_MOUSE) { + static const uint8_t report_descriptor[] = { + USAGE_PAGE(1), 0x01, // Generic Desktop + USAGE(1), 0x02, // Mouse + COLLECTION(1), 0x01, // Application + USAGE(1), 0x01, // Pointer + COLLECTION(1), 0x00, // Physical + + USAGE_PAGE(1), 0x01, // Generic Desktop + USAGE(1), 0x30, // X + USAGE(1), 0x31, // Y + LOGICAL_MINIMUM(1), 0x00, // 0 + LOGICAL_MAXIMUM(2), 0xff, 0x7f, // 32767 + REPORT_SIZE(1), 0x10, + REPORT_COUNT(1), 0x02, + INPUT(1), 0x02, // Data, Variable, Absolute + + USAGE_PAGE(1), 0x01, // Generic Desktop + USAGE(1), 0x38, // scroll + LOGICAL_MINIMUM(1), 0x81, // -127 + LOGICAL_MAXIMUM(1), 0x7f, // 127 + REPORT_SIZE(1), 0x08, + REPORT_COUNT(1), 0x01, + INPUT(1), 0x06, // Data, Variable, Relative + + USAGE_PAGE(1), 0x09, // Buttons + USAGE_MINIMUM(1), 0x01, + USAGE_MAXIMUM(1), 0x03, + LOGICAL_MINIMUM(1), 0x00, // 0 + LOGICAL_MAXIMUM(1), 0x01, // 1 + REPORT_COUNT(1), 0x03, + REPORT_SIZE(1), 0x01, + INPUT(1), 0x02, // Data, Variable, Absolute + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x05, + INPUT(1), 0x01, // Constant + + END_COLLECTION(0), + END_COLLECTION(0) + }; + reportLength = sizeof(report_descriptor); + return report_descriptor; + } + return NULL; +} + +#define DEFAULT_CONFIGURATION (1) +#define TOTAL_DESCRIPTOR_LENGTH ((1 * CONFIGURATION_DESCRIPTOR_LENGTH) \ + + (1 * INTERFACE_DESCRIPTOR_LENGTH) \ + + (1 * HID_DESCRIPTOR_LENGTH) \ + + (2 * ENDPOINT_DESCRIPTOR_LENGTH)) + +const uint8_t *USBMouse::configuration_desc(uint8_t index) +{ + if (index != 0) { + return NULL; + } + uint8_t configuration_descriptor_temp[] = { + CONFIGURATION_DESCRIPTOR_LENGTH, // bLength + CONFIGURATION_DESCRIPTOR, // bDescriptorType + LSB(TOTAL_DESCRIPTOR_LENGTH), // wTotalLength (LSB) + MSB(TOTAL_DESCRIPTOR_LENGTH), // wTotalLength (MSB) + 0x01, // bNumInterfaces + DEFAULT_CONFIGURATION, // bConfigurationValue + 0x00, // iConfiguration + C_RESERVED | C_SELF_POWERED, // bmAttributes + C_POWER(0), // bMaxPower + + INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0x00, // bInterfaceNumber + 0x00, // bAlternateSetting + 0x02, // bNumEndpoints + HID_CLASS, // bInterfaceClass + HID_SUBCLASS_BOOT, // bInterfaceSubClass + HID_PROTOCOL_MOUSE, // bInterfaceProtocol + 0x00, // iInterface + + HID_DESCRIPTOR_LENGTH, // bLength + HID_DESCRIPTOR, // bDescriptorType + LSB(HID_VERSION_1_11), // bcdHID (LSB) + MSB(HID_VERSION_1_11), // bcdHID (MSB) + 0x00, // bCountryCode + 0x01, // bNumDescriptors + REPORT_DESCRIPTOR, // bDescriptorType + (uint8_t)(LSB(report_desc_length())), // wDescriptorLength (LSB) + (uint8_t)(MSB(report_desc_length())), // wDescriptorLength (MSB) + + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _int_in, // bEndpointAddress + E_INTERRUPT, // bmAttributes + LSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval (milliseconds) + + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _int_out, // bEndpointAddress + E_INTERRUPT, // bmAttributes + LSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval (milliseconds) + }; + MBED_ASSERT(sizeof(configuration_descriptor_temp) == sizeof(_configuration_descriptor)); + memcpy(_configuration_descriptor, configuration_descriptor_temp, sizeof(_configuration_descriptor)); + return _configuration_descriptor; +} diff --git a/usb/device/USBHID/USBMouse.h b/usb/device/USBHID/USBMouse.h new file mode 100644 index 00000000000..11ee34dc268 --- /dev/null +++ b/usb/device/USBHID/USBMouse.h @@ -0,0 +1,234 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBMOUSE_H +#define USBMOUSE_H + +#include "USBHID.h" +#include "PlatformMutex.h" + +#define REPORT_ID_MOUSE 2 + +/* Common usage */ + +enum MOUSE_BUTTON { + MOUSE_LEFT = 1, + MOUSE_RIGHT = 2, + MOUSE_MIDDLE = 4, +}; + +/* X and Y limits */ +/* These values do not directly map to screen pixels */ +/* Zero may be interpreted as meaning 'no movement' */ +#define X_MIN_ABS (1) /*!< Minimum value on x-axis */ +#define Y_MIN_ABS (1) /*!< Minimum value on y-axis */ +#define X_MAX_ABS (0x7fff) /*!< Maximum value on x-axis */ +#define Y_MAX_ABS (0x7fff) /*!< Maximum value on y-axis */ + +#define X_MIN_REL (-127) /*!< The maximum value that we can move to the left on the x-axis */ +#define Y_MIN_REL (-127) /*!< The maximum value that we can move up on the y-axis */ +#define X_MAX_REL (127) /*!< The maximum value that we can move to the right on the x-axis */ +#define Y_MAX_REL (127) /*!< The maximum value that we can move down on the y-axis */ + +enum MOUSE_TYPE { + ABS_MOUSE, + REL_MOUSE, +}; + +/** + * + * USBMouse example + * @code + * #include "mbed.h" + * #include "USBMouse.h" + * + * USBMouse mouse; + * + * int main(void) + * { + * while (1) + * { + * mouse.move(20, 0); + * wait(0.5); + * } + * } + * + * @endcode + * + * + * @code + * #include "mbed.h" + * #include "USBMouse.h" + * #include + * + * USBMouse mouse(true, ABS_MOUSE); + * + * int main(void) + * { + * uint16_t x_center = (X_MAX_ABS - X_MIN_ABS)/2; + * uint16_t y_center = (Y_MAX_ABS - Y_MIN_ABS)/2; + * uint16_t x_screen = 0; + * uint16_t y_screen = 0; + * + * uint32_t x_origin = x_center; + * uint32_t y_origin = y_center; + * uint32_t radius = 5000; + * uint32_t angle = 0; + * + * while (1) + * { + * x_screen = x_origin + cos((double)angle*3.14/180.0)*radius; + * y_screen = y_origin + sin((double)angle*3.14/180.0)*radius; + * + * mouse.move(x_screen, y_screen); + * angle += 3; + * wait(0.01); + * } + * } + * + * @endcode + * + * @note Synchronization level: Thread safe + */ +class USBMouse: public USBHID { +public: + + /** + * Basic constructor + * + * Construct this object optionally connecting and blocking until it is ready. + * + * @note Do not use this constructor in derived classes. + * + * @param connect_blocking true to perform a blocking connect, false to start in a disconnected state + * @param mouse_type Mouse type: ABS_MOUSE (absolute mouse) or REL_MOUSE (relative mouse) (default: REL_MOUSE) + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBMouse(bool connect_blocking = true, MOUSE_TYPE mouse_type = REL_MOUSE, uint16_t vendor_id = 0x1234, uint16_t product_id = 0x0001, uint16_t product_release = 0x0001); + + /** + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. + * + * @param phy USB phy to use + * @param mouse_type Mouse type: ABS_MOUSE (absolute mouse) or REL_MOUSE (relative mouse) (default: REL_MOUSE) + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBMouse(USBPhy *phy, MOUSE_TYPE mouse_type = REL_MOUSE, uint16_t vendor_id = 0x1234, uint16_t product_id = 0x0001, uint16_t product_release = 0x0001); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ + virtual ~USBMouse(); + + /** + * Write a state of the mouse + * + * @param x x-axis position + * @param y y-axis position + * @param buttons buttons state (first bit represents MOUSE_LEFT, second bit MOUSE_RIGHT and third bit MOUSE_MIDDLE) + * @param z wheel state (>0 to scroll down, <0 to scroll up) + * @returns true if there is no error, false otherwise + */ + bool update(int16_t x, int16_t y, uint8_t buttons, int8_t z); + + /** + * Move the cursor to (x, y) + * + * @param x x-axis position + * @param y y-axis position + * @returns true if there is no error, false otherwise + */ + bool move(int16_t x, int16_t y); + + /** + * Press one or several buttons + * + * @param button button state (ex: press(MOUSE_LEFT)) + * @returns true if there is no error, false otherwise + */ + bool press(uint8_t button); + + /** + * Release one or several buttons + * + * @param button button state (ex: release(MOUSE_LEFT)) + * @returns true if there is no error, false otherwise + */ + bool release(uint8_t button); + + /** + * Double click (MOUSE_LEFT) + * + * @returns true if there is no error, false otherwise + */ + bool double_click(); + + /** + * Click + * + * @param button state of the buttons ( ex: clic(MOUSE_LEFT)) + * @returns true if there is no error, false otherwise + */ + bool click(uint8_t button); + + /** + * Scrolling + * + * @param z value of the wheel (>0 to go down, <0 to go up) + * @returns true if there is no error, false otherwise + */ + bool scroll(int8_t z); + + /* + * To define the report descriptor. Warning: this method has to store the length of the report descriptor in reportLength. + * + * @returns pointer to the report descriptor + */ + virtual const uint8_t *report_desc(); + +protected: + /* + * Get configuration descriptor + * + * @returns pointer to the configuration descriptor + */ + virtual const uint8_t *configuration_desc(uint8_t index); + +private: + MOUSE_TYPE _mouse_type; + uint8_t _button; + uint8_t _configuration_descriptor[41]; + PlatformMutex _mutex; + + bool mouse_send(int8_t x, int8_t y, uint8_t buttons, int8_t z); +}; + +#endif diff --git a/usb/device/USBHID/USBMouseKeyboard.cpp b/usb/device/USBHID/USBMouseKeyboard.cpp new file mode 100644 index 00000000000..4d9e4b990d8 --- /dev/null +++ b/usb/device/USBHID/USBMouseKeyboard.cpp @@ -0,0 +1,828 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBMouseKeyboard.h" +#include "usb_phy_api.h" + +typedef struct { + unsigned char usage; + unsigned char modifier; +} KEYMAP; + +#ifdef US_KEYBOARD +/* US keyboard (as HID standard) */ +#define KEYMAP_SIZE (152) +const KEYMAP keymap[KEYMAP_SIZE] = { + {0, 0}, /* NUL */ + {0, 0}, /* SOH */ + {0, 0}, /* STX */ + {0, 0}, /* ETX */ + {0, 0}, /* EOT */ + {0, 0}, /* ENQ */ + {0, 0}, /* ACK */ + {0, 0}, /* BEL */ + {0x2a, 0}, /* BS */ /* Keyboard Delete (Backspace) */ + {0x2b, 0}, /* TAB */ /* Keyboard Tab */ + {0x28, 0}, /* LF */ /* Keyboard Return (Enter) */ + {0, 0}, /* VT */ + {0, 0}, /* FF */ + {0, 0}, /* CR */ + {0, 0}, /* SO */ + {0, 0}, /* SI */ + {0, 0}, /* DEL */ + {0, 0}, /* DC1 */ + {0, 0}, /* DC2 */ + {0, 0}, /* DC3 */ + {0, 0}, /* DC4 */ + {0, 0}, /* NAK */ + {0, 0}, /* SYN */ + {0, 0}, /* ETB */ + {0, 0}, /* CAN */ + {0, 0}, /* EM */ + {0, 0}, /* SUB */ + {0, 0}, /* ESC */ + {0, 0}, /* FS */ + {0, 0}, /* GS */ + {0, 0}, /* RS */ + {0, 0}, /* US */ + {0x2c, 0}, /* */ + {0x1e, KEY_SHIFT}, /* ! */ + {0x34, KEY_SHIFT}, /* " */ + {0x20, KEY_SHIFT}, /* # */ + {0x21, KEY_SHIFT}, /* $ */ + {0x22, KEY_SHIFT}, /* % */ + {0x24, KEY_SHIFT}, /* & */ + {0x34, 0}, /* ' */ + {0x26, KEY_SHIFT}, /* ( */ + {0x27, KEY_SHIFT}, /* ) */ + {0x25, KEY_SHIFT}, /* * */ + {0x2e, KEY_SHIFT}, /* + */ + {0x36, 0}, /* , */ + {0x2d, 0}, /* - */ + {0x37, 0}, /* . */ + {0x38, 0}, /* / */ + {0x27, 0}, /* 0 */ + {0x1e, 0}, /* 1 */ + {0x1f, 0}, /* 2 */ + {0x20, 0}, /* 3 */ + {0x21, 0}, /* 4 */ + {0x22, 0}, /* 5 */ + {0x23, 0}, /* 6 */ + {0x24, 0}, /* 7 */ + {0x25, 0}, /* 8 */ + {0x26, 0}, /* 9 */ + {0x33, KEY_SHIFT}, /* : */ + {0x33, 0}, /* ; */ + {0x36, KEY_SHIFT}, /* < */ + {0x2e, 0}, /* = */ + {0x37, KEY_SHIFT}, /* > */ + {0x38, KEY_SHIFT}, /* ? */ + {0x1f, KEY_SHIFT}, /* @ */ + {0x04, KEY_SHIFT}, /* A */ + {0x05, KEY_SHIFT}, /* B */ + {0x06, KEY_SHIFT}, /* C */ + {0x07, KEY_SHIFT}, /* D */ + {0x08, KEY_SHIFT}, /* E */ + {0x09, KEY_SHIFT}, /* F */ + {0x0a, KEY_SHIFT}, /* G */ + {0x0b, KEY_SHIFT}, /* H */ + {0x0c, KEY_SHIFT}, /* I */ + {0x0d, KEY_SHIFT}, /* J */ + {0x0e, KEY_SHIFT}, /* K */ + {0x0f, KEY_SHIFT}, /* L */ + {0x10, KEY_SHIFT}, /* M */ + {0x11, KEY_SHIFT}, /* N */ + {0x12, KEY_SHIFT}, /* O */ + {0x13, KEY_SHIFT}, /* P */ + {0x14, KEY_SHIFT}, /* Q */ + {0x15, KEY_SHIFT}, /* R */ + {0x16, KEY_SHIFT}, /* S */ + {0x17, KEY_SHIFT}, /* T */ + {0x18, KEY_SHIFT}, /* U */ + {0x19, KEY_SHIFT}, /* V */ + {0x1a, KEY_SHIFT}, /* W */ + {0x1b, KEY_SHIFT}, /* X */ + {0x1c, KEY_SHIFT}, /* Y */ + {0x1d, KEY_SHIFT}, /* Z */ + {0x2f, 0}, /* [ */ + {0x31, 0}, /* \ */ + {0x30, 0}, /* ] */ + {0x23, KEY_SHIFT}, /* ^ */ + {0x2d, KEY_SHIFT}, /* _ */ + {0x35, 0}, /* ` */ + {0x04, 0}, /* a */ + {0x05, 0}, /* b */ + {0x06, 0}, /* c */ + {0x07, 0}, /* d */ + {0x08, 0}, /* e */ + {0x09, 0}, /* f */ + {0x0a, 0}, /* g */ + {0x0b, 0}, /* h */ + {0x0c, 0}, /* i */ + {0x0d, 0}, /* j */ + {0x0e, 0}, /* k */ + {0x0f, 0}, /* l */ + {0x10, 0}, /* m */ + {0x11, 0}, /* n */ + {0x12, 0}, /* o */ + {0x13, 0}, /* p */ + {0x14, 0}, /* q */ + {0x15, 0}, /* r */ + {0x16, 0}, /* s */ + {0x17, 0}, /* t */ + {0x18, 0}, /* u */ + {0x19, 0}, /* v */ + {0x1a, 0}, /* w */ + {0x1b, 0}, /* x */ + {0x1c, 0}, /* y */ + {0x1d, 0}, /* z */ + {0x2f, KEY_SHIFT}, /* { */ + {0x31, KEY_SHIFT}, /* | */ + {0x30, KEY_SHIFT}, /* } */ + {0x35, KEY_SHIFT}, /* ~ */ + {0, 0}, /* DEL */ + + {0x3a, 0}, /* F1 */ + {0x3b, 0}, /* F2 */ + {0x3c, 0}, /* F3 */ + {0x3d, 0}, /* F4 */ + {0x3e, 0}, /* F5 */ + {0x3f, 0}, /* F6 */ + {0x40, 0}, /* F7 */ + {0x41, 0}, /* F8 */ + {0x42, 0}, /* F9 */ + {0x43, 0}, /* F10 */ + {0x44, 0}, /* F11 */ + {0x45, 0}, /* F12 */ + + {0x46, 0}, /* PRINT_SCREEN */ + {0x47, 0}, /* SCROLL_LOCK */ + {0x39, 0}, /* CAPS_LOCK */ + {0x53, 0}, /* NUM_LOCK */ + {0x49, 0}, /* INSERT */ + {0x4a, 0}, /* HOME */ + {0x4b, 0}, /* PAGE_UP */ + {0x4e, 0}, /* PAGE_DOWN */ + + {0x4f, 0}, /* RIGHT_ARROW */ + {0x50, 0}, /* LEFT_ARROW */ + {0x51, 0}, /* DOWN_ARROW */ + {0x52, 0}, /* UP_ARROW */ +}; + +#else +/* UK keyboard */ +#define KEYMAP_SIZE (152) +const KEYMAP keymap[KEYMAP_SIZE] = { + {0, 0}, /* NUL */ + {0, 0}, /* SOH */ + {0, 0}, /* STX */ + {0, 0}, /* ETX */ + {0, 0}, /* EOT */ + {0, 0}, /* ENQ */ + {0, 0}, /* ACK */ + {0, 0}, /* BEL */ + {0x2a, 0}, /* BS */ /* Keyboard Delete (Backspace) */ + {0x2b, 0}, /* TAB */ /* Keyboard Tab */ + {0x28, 0}, /* LF */ /* Keyboard Return (Enter) */ + {0, 0}, /* VT */ + {0, 0}, /* FF */ + {0, 0}, /* CR */ + {0, 0}, /* SO */ + {0, 0}, /* SI */ + {0, 0}, /* DEL */ + {0, 0}, /* DC1 */ + {0, 0}, /* DC2 */ + {0, 0}, /* DC3 */ + {0, 0}, /* DC4 */ + {0, 0}, /* NAK */ + {0, 0}, /* SYN */ + {0, 0}, /* ETB */ + {0, 0}, /* CAN */ + {0, 0}, /* EM */ + {0, 0}, /* SUB */ + {0, 0}, /* ESC */ + {0, 0}, /* FS */ + {0, 0}, /* GS */ + {0, 0}, /* RS */ + {0, 0}, /* US */ + {0x2c, 0}, /* */ + {0x1e, KEY_SHIFT}, /* ! */ + {0x1f, KEY_SHIFT}, /* " */ + {0x32, 0}, /* # */ + {0x21, KEY_SHIFT}, /* $ */ + {0x22, KEY_SHIFT}, /* % */ + {0x24, KEY_SHIFT}, /* & */ + {0x34, 0}, /* ' */ + {0x26, KEY_SHIFT}, /* ( */ + {0x27, KEY_SHIFT}, /* ) */ + {0x25, KEY_SHIFT}, /* * */ + {0x2e, KEY_SHIFT}, /* + */ + {0x36, 0}, /* , */ + {0x2d, 0}, /* - */ + {0x37, 0}, /* . */ + {0x38, 0}, /* / */ + {0x27, 0}, /* 0 */ + {0x1e, 0}, /* 1 */ + {0x1f, 0}, /* 2 */ + {0x20, 0}, /* 3 */ + {0x21, 0}, /* 4 */ + {0x22, 0}, /* 5 */ + {0x23, 0}, /* 6 */ + {0x24, 0}, /* 7 */ + {0x25, 0}, /* 8 */ + {0x26, 0}, /* 9 */ + {0x33, KEY_SHIFT}, /* : */ + {0x33, 0}, /* ; */ + {0x36, KEY_SHIFT}, /* < */ + {0x2e, 0}, /* = */ + {0x37, KEY_SHIFT}, /* > */ + {0x38, KEY_SHIFT}, /* ? */ + {0x34, KEY_SHIFT}, /* @ */ + {0x04, KEY_SHIFT}, /* A */ + {0x05, KEY_SHIFT}, /* B */ + {0x06, KEY_SHIFT}, /* C */ + {0x07, KEY_SHIFT}, /* D */ + {0x08, KEY_SHIFT}, /* E */ + {0x09, KEY_SHIFT}, /* F */ + {0x0a, KEY_SHIFT}, /* G */ + {0x0b, KEY_SHIFT}, /* H */ + {0x0c, KEY_SHIFT}, /* I */ + {0x0d, KEY_SHIFT}, /* J */ + {0x0e, KEY_SHIFT}, /* K */ + {0x0f, KEY_SHIFT}, /* L */ + {0x10, KEY_SHIFT}, /* M */ + {0x11, KEY_SHIFT}, /* N */ + {0x12, KEY_SHIFT}, /* O */ + {0x13, KEY_SHIFT}, /* P */ + {0x14, KEY_SHIFT}, /* Q */ + {0x15, KEY_SHIFT}, /* R */ + {0x16, KEY_SHIFT}, /* S */ + {0x17, KEY_SHIFT}, /* T */ + {0x18, KEY_SHIFT}, /* U */ + {0x19, KEY_SHIFT}, /* V */ + {0x1a, KEY_SHIFT}, /* W */ + {0x1b, KEY_SHIFT}, /* X */ + {0x1c, KEY_SHIFT}, /* Y */ + {0x1d, KEY_SHIFT}, /* Z */ + {0x2f, 0}, /* [ */ + {0x64, 0}, /* \ */ + {0x30, 0}, /* ] */ + {0x23, KEY_SHIFT}, /* ^ */ + {0x2d, KEY_SHIFT}, /* _ */ + {0x35, 0}, /* ` */ + {0x04, 0}, /* a */ + {0x05, 0}, /* b */ + {0x06, 0}, /* c */ + {0x07, 0}, /* d */ + {0x08, 0}, /* e */ + {0x09, 0}, /* f */ + {0x0a, 0}, /* g */ + {0x0b, 0}, /* h */ + {0x0c, 0}, /* i */ + {0x0d, 0}, /* j */ + {0x0e, 0}, /* k */ + {0x0f, 0}, /* l */ + {0x10, 0}, /* m */ + {0x11, 0}, /* n */ + {0x12, 0}, /* o */ + {0x13, 0}, /* p */ + {0x14, 0}, /* q */ + {0x15, 0}, /* r */ + {0x16, 0}, /* s */ + {0x17, 0}, /* t */ + {0x18, 0}, /* u */ + {0x19, 0}, /* v */ + {0x1a, 0}, /* w */ + {0x1b, 0}, /* x */ + {0x1c, 0}, /* y */ + {0x1d, 0}, /* z */ + {0x2f, KEY_SHIFT}, /* { */ + {0x64, KEY_SHIFT}, /* | */ + {0x30, KEY_SHIFT}, /* } */ + {0x32, KEY_SHIFT}, /* ~ */ + {0, 0}, /* DEL */ + + {0x3a, 0}, /* F1 */ + {0x3b, 0}, /* F2 */ + {0x3c, 0}, /* F3 */ + {0x3d, 0}, /* F4 */ + {0x3e, 0}, /* F5 */ + {0x3f, 0}, /* F6 */ + {0x40, 0}, /* F7 */ + {0x41, 0}, /* F8 */ + {0x42, 0}, /* F9 */ + {0x43, 0}, /* F10 */ + {0x44, 0}, /* F11 */ + {0x45, 0}, /* F12 */ + + {0x46, 0}, /* PRINT_SCREEN */ + {0x47, 0}, /* SCROLL_LOCK */ + {0x39, 0}, /* CAPS_LOCK */ + {0x53, 0}, /* NUM_LOCK */ + {0x49, 0}, /* INSERT */ + {0x4a, 0}, /* HOME */ + {0x4b, 0}, /* PAGE_UP */ + {0x4e, 0}, /* PAGE_DOWN */ + + {0x4f, 0}, /* RIGHT_ARROW */ + {0x50, 0}, /* LEFT_ARROW */ + {0x51, 0}, /* DOWN_ARROW */ + {0x52, 0}, /* UP_ARROW */ +}; +#endif + +USBMouseKeyboard::USBMouseKeyboard(bool connect_blocking, MOUSE_TYPE mouse_type, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBHID(get_usb_phy(), 0, 0, vendor_id, product_id, product_release) +{ + _lock_status = 0; + _button = 0; + _mouse_type = mouse_type; + + if (connect_blocking) { + USBDevice::connect(); + wait_ready(); + } else { + init(); + } +}; + +USBMouseKeyboard::USBMouseKeyboard(USBPhy *phy, MOUSE_TYPE mouse_type, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBHID(phy, 0, 0, vendor_id, product_id, product_release) +{ + _lock_status = 0; + _button = 0; + _mouse_type = mouse_type; +}; + +/** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ +USBMouseKeyboard::~USBMouseKeyboard() +{ + deinit(); +} + +const uint8_t *USBMouseKeyboard::report_desc() +{ + if (_mouse_type == REL_MOUSE) { + static const uint8_t reportDescriptor[] = { + // Keyboard + USAGE_PAGE(1), 0x01, + USAGE(1), 0x06, + COLLECTION(1), 0x01, + REPORT_ID(1), REPORT_ID_KEYBOARD, + USAGE_PAGE(1), 0x07, + USAGE_MINIMUM(1), 0xE0, + USAGE_MAXIMUM(1), 0xE7, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x01, + REPORT_SIZE(1), 0x01, + REPORT_COUNT(1), 0x08, + INPUT(1), 0x02, + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x08, + INPUT(1), 0x01, + REPORT_COUNT(1), 0x05, + REPORT_SIZE(1), 0x01, + USAGE_PAGE(1), 0x08, + USAGE_MINIMUM(1), 0x01, + USAGE_MAXIMUM(1), 0x05, + OUTPUT(1), 0x02, + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x03, + OUTPUT(1), 0x01, + REPORT_COUNT(1), 0x06, + REPORT_SIZE(1), 0x08, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(2), 0xff, 0x00, + USAGE_PAGE(1), 0x07, + USAGE_MINIMUM(1), 0x00, + USAGE_MAXIMUM(2), 0xff, 0x00, + INPUT(1), 0x00, + END_COLLECTION(0), + + // Mouse + USAGE_PAGE(1), 0x01, // Generic Desktop + USAGE(1), 0x02, // Mouse + COLLECTION(1), 0x01, // Application + USAGE(1), 0x01, // Pointer + COLLECTION(1), 0x00, // Physical + REPORT_ID(1), REPORT_ID_MOUSE, + REPORT_COUNT(1), 0x03, + REPORT_SIZE(1), 0x01, + USAGE_PAGE(1), 0x09, // Buttons + USAGE_MINIMUM(1), 0x1, + USAGE_MAXIMUM(1), 0x3, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x01, + INPUT(1), 0x02, + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x05, + INPUT(1), 0x01, + REPORT_COUNT(1), 0x03, + REPORT_SIZE(1), 0x08, + USAGE_PAGE(1), 0x01, + USAGE(1), 0x30, // X + USAGE(1), 0x31, // Y + USAGE(1), 0x38, // scroll + LOGICAL_MINIMUM(1), 0x81, + LOGICAL_MAXIMUM(1), 0x7f, + INPUT(1), 0x06, + END_COLLECTION(0), + END_COLLECTION(0), + + + // Media Control + USAGE_PAGE(1), 0x0C, + USAGE(1), 0x01, + COLLECTION(1), 0x01, + REPORT_ID(1), REPORT_ID_VOLUME, + USAGE_PAGE(1), 0x0C, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x01, + REPORT_SIZE(1), 0x01, + REPORT_COUNT(1), 0x07, + USAGE(1), 0xB5, // Next Track + USAGE(1), 0xB6, // Previous Track + USAGE(1), 0xB7, // Stop + USAGE(1), 0xCD, // Play / Pause + USAGE(1), 0xE2, // Mute + USAGE(1), 0xE9, // Volume Up + USAGE(1), 0xEA, // Volume Down + INPUT(1), 0x02, // Input (Data, Variable, Absolute) + REPORT_COUNT(1), 0x01, + INPUT(1), 0x01, + END_COLLECTION(0), + }; + reportLength = sizeof(reportDescriptor); + return reportDescriptor; + } else if (_mouse_type == ABS_MOUSE) { + static const uint8_t reportDescriptor[] = { + + // Keyboard + USAGE_PAGE(1), 0x01, + USAGE(1), 0x06, + COLLECTION(1), 0x01, + REPORT_ID(1), REPORT_ID_KEYBOARD, + USAGE_PAGE(1), 0x07, + USAGE_MINIMUM(1), 0xE0, + USAGE_MAXIMUM(1), 0xE7, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x01, + REPORT_SIZE(1), 0x01, + REPORT_COUNT(1), 0x08, + INPUT(1), 0x02, + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x08, + INPUT(1), 0x01, + REPORT_COUNT(1), 0x05, + REPORT_SIZE(1), 0x01, + USAGE_PAGE(1), 0x08, + USAGE_MINIMUM(1), 0x01, + USAGE_MAXIMUM(1), 0x05, + OUTPUT(1), 0x02, + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x03, + OUTPUT(1), 0x01, + REPORT_COUNT(1), 0x06, + REPORT_SIZE(1), 0x08, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(2), 0xff, 0x00, + USAGE_PAGE(1), 0x07, + USAGE_MINIMUM(1), 0x00, + USAGE_MAXIMUM(2), 0xff, 0x00, + INPUT(1), 0x00, + END_COLLECTION(0), + + // Mouse + USAGE_PAGE(1), 0x01, // Generic Desktop + USAGE(1), 0x02, // Mouse + COLLECTION(1), 0x01, // Application + USAGE(1), 0x01, // Pointer + COLLECTION(1), 0x00, // Physical + REPORT_ID(1), REPORT_ID_MOUSE, + + USAGE_PAGE(1), 0x01, // Generic Desktop + USAGE(1), 0x30, // X + USAGE(1), 0x31, // Y + LOGICAL_MINIMUM(1), 0x00, // 0 + LOGICAL_MAXIMUM(2), 0xff, 0x7f, // 32767 + REPORT_SIZE(1), 0x10, + REPORT_COUNT(1), 0x02, + INPUT(1), 0x02, // Data, Variable, Absolute + + USAGE_PAGE(1), 0x01, // Generic Desktop + USAGE(1), 0x38, // scroll + LOGICAL_MINIMUM(1), 0x81, // -127 + LOGICAL_MAXIMUM(1), 0x7f, // 127 + REPORT_SIZE(1), 0x08, + REPORT_COUNT(1), 0x01, + INPUT(1), 0x06, // Data, Variable, Relative + + USAGE_PAGE(1), 0x09, // Buttons + USAGE_MINIMUM(1), 0x01, + USAGE_MAXIMUM(1), 0x03, + LOGICAL_MINIMUM(1), 0x00, // 0 + LOGICAL_MAXIMUM(1), 0x01, // 1 + REPORT_COUNT(1), 0x03, + REPORT_SIZE(1), 0x01, + INPUT(1), 0x02, // Data, Variable, Absolute + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x05, + INPUT(1), 0x01, // Constant + + END_COLLECTION(0), + END_COLLECTION(0), + + // Media Control + USAGE_PAGE(1), 0x0C, + USAGE(1), 0x01, + COLLECTION(1), 0x01, + REPORT_ID(1), REPORT_ID_VOLUME, + USAGE_PAGE(1), 0x0C, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x01, + REPORT_SIZE(1), 0x01, + REPORT_COUNT(1), 0x07, + USAGE(1), 0xB5, // Next Track + USAGE(1), 0xB6, // Previous Track + USAGE(1), 0xB7, // Stop + USAGE(1), 0xCD, // Play / Pause + USAGE(1), 0xE2, // Mute + USAGE(1), 0xE9, // Volume Up + USAGE(1), 0xEA, // Volume Down + INPUT(1), 0x02, // Input (Data, Variable, Absolute) + REPORT_COUNT(1), 0x01, + INPUT(1), 0x01, + END_COLLECTION(0), + }; + reportLength = sizeof(reportDescriptor); + return reportDescriptor; + } + + return NULL; +} + +void USBMouseKeyboard::report_rx() +{ + assert_locked(); + + HID_REPORT report; + read_nb(&report); + + // we take [1] because [0] is the report ID + _lock_status = report.data[1] & 0x07; +} + +uint8_t USBMouseKeyboard::lock_status() +{ + return _lock_status; +} + +bool USBMouseKeyboard::update(int16_t x, int16_t y, uint8_t button, int8_t z) +{ + bool ret; + switch (_mouse_type) { + case REL_MOUSE: + _mutex.lock(); + + while (x > 127) { + if (!_mouse_send(127, 0, button, z)) { + _mutex.unlock(); + return false; + } + x = x - 127; + } + while (x < -128) { + if (!_mouse_send(-128, 0, button, z)) { + _mutex.unlock(); + return false; + } + x = x + 128; + } + while (y > 127) { + if (!_mouse_send(0, 127, button, z)) { + _mutex.unlock(); + return false; + } + y = y - 127; + } + while (y < -128) { + if (!_mouse_send(0, -128, button, z)) { + _mutex.unlock(); + return false; + } + y = y + 128; + } + ret = _mouse_send(x, y, button, z); + + _mutex.unlock(); + return ret; + case ABS_MOUSE: + _mutex.lock(); + + HID_REPORT report; + + report.data[0] = REPORT_ID_MOUSE; + report.data[1] = x & 0xff; + report.data[2] = (x >> 8) & 0xff; + report.data[3] = y & 0xff; + report.data[4] = (y >> 8) & 0xff; + report.data[5] = -z; + report.data[6] = button & 0x07; + + report.length = 7; + + ret = send(&report); + + _mutex.unlock(); + return ret; + default: + return false; + } +} + +bool USBMouseKeyboard::_mouse_send(int8_t x, int8_t y, uint8_t buttons, int8_t z) +{ + _mutex.lock(); + + HID_REPORT report; + report.data[0] = REPORT_ID_MOUSE; + report.data[1] = buttons & 0x07; + report.data[2] = x; + report.data[3] = y; + report.data[4] = -z; // >0 to scroll down, <0 to scroll up + + report.length = 5; + + bool ret = send(&report); + + _mutex.unlock(); + return ret; +} + +bool USBMouseKeyboard::move(int16_t x, int16_t y) +{ + _mutex.lock(); + + bool ret = update(x, y, _button, 0); + + _mutex.unlock(); + return ret; +} + +bool USBMouseKeyboard::scroll(int8_t z) +{ + _mutex.lock(); + + bool ret = update(0, 0, _button, z); + + _mutex.unlock(); + return ret; +} + +bool USBMouseKeyboard::doubleClick() +{ + _mutex.lock(); + + if (!click(MOUSE_LEFT)) { + _mutex.unlock(); + return false; + } + wait(0.1); + bool ret = click(MOUSE_LEFT); + + _mutex.unlock(); + return ret; +} + +bool USBMouseKeyboard::click(uint8_t button) +{ + _mutex.lock(); + + if (!update(0, 0, button, 0)) { + _mutex.unlock(); + return false; + } + wait(0.01); + bool ret = update(0, 0, 0, 0); + + _mutex.unlock(); + return ret; +} + +bool USBMouseKeyboard::press(uint8_t button) +{ + _mutex.lock(); + + _button = button & 0x07; + bool ret = update(0, 0, button, 0); + + _mutex.unlock(); + return ret; +} + +bool USBMouseKeyboard::release(uint8_t button) +{ + _mutex.lock(); + + _button = (_button & (~button)) & 0x07; + bool ret = update(0, 0, _button, 0); + + _mutex.unlock(); + return ret; +} + +int USBMouseKeyboard::_putc(int c) +{ + _mutex.lock(); + + bool ret = key_code(c, keymap[c].modifier); + + _mutex.unlock(); + return ret; +} + +bool USBMouseKeyboard::key_code(uint8_t key, uint8_t modifier) +{ + // Send a simulated keyboard keypress. Returns true if successful. + _mutex.lock(); + + HID_REPORT report; + + report.data[0] = REPORT_ID_KEYBOARD; + report.data[1] = modifier; + report.data[2] = 0; + report.data[3] = keymap[key].usage; + report.data[4] = 0; + report.data[5] = 0; + report.data[6] = 0; + report.data[7] = 0; + report.data[8] = 0; + + report.length = 9; + + if (!send(&report)) { + _mutex.unlock(); + return false; + } + + report.data[1] = 0; + report.data[3] = 0; + + if (!send(&report)) { + _mutex.unlock(); + return false; + } + + _mutex.unlock(); + return true; +} + + +bool USBMouseKeyboard::media_control(MEDIA_KEY key) +{ + _mutex.lock(); + + HID_REPORT report; + + report.data[0] = REPORT_ID_VOLUME; + report.data[1] = (1 << key) & 0x7f; + + report.length = 2; + + send(&report); + + report.data[0] = REPORT_ID_VOLUME; + report.data[1] = 0; + + report.length = 2; + + bool ret = send(&report); + + _mutex.unlock(); + return ret; +} + +int USBMouseKeyboard::_getc() +{ + return -1; +} diff --git a/usb/device/USBHID/USBMouseKeyboard.h b/usb/device/USBHID/USBMouseKeyboard.h new file mode 100644 index 00000000000..75595e231b6 --- /dev/null +++ b/usb/device/USBHID/USBMouseKeyboard.h @@ -0,0 +1,246 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBMOUSEKEYBOARD_H +#define USBMOUSEKEYBOARD_H + +#define REPORT_ID_KEYBOARD 1 +#define REPORT_ID_MOUSE 2 +#define REPORT_ID_VOLUME 3 + +#include "USBMouse.h" +#include "USBKeyboard.h" +#include "Stream.h" +#include "USBHID.h" +#include "PlatformMutex.h" + +/** + * USBMouseKeyboard example + * @code + * + * #include "mbed.h" + * #include "USBMouseKeyboard.h" + * + * USBMouseKeyboard key_mouse; + * + * int main(void) + * { + * while(1) + * { + * key_mouse.move(20, 0); + * key_mouse.printf("Hello From MBED\r\n"); + * wait(1); + * } + * } + * @endcode + * + * + * @code + * + * #include "mbed.h" + * #include "USBMouseKeyboard.h" + * + * USBMouseKeyboard key_mouse(ABS_MOUSE); + * + * int main(void) + * { + * while(1) + * { + * key_mouse.move(X_MAX_ABS/2, Y_MAX_ABS/2); + * key_mouse.printf("Hello from MBED\r\n"); + * wait(1); + * } + * } + * @endcode + * + * @note Synchronization level: Thread safe + */ +class USBMouseKeyboard: public USBHID, public Stream +{ +public: + + /** + * Basic constructor + * + * Construct this object optionally connecting and blocking until it is ready. + * + * @note Do not use this constructor in derived classes. + * + * @param connect_blocking true to perform a blocking connect, false to start in a disconnected state + * @param mouse_type Mouse type: ABS_MOUSE (absolute mouse) or REL_MOUSE (relative mouse) (default: REL_MOUSE) + * @param vendor_id Your vendor_id (default: 0x1234) + * @param product_id Your product_id (default: 0x0001) + * @param product_release Your preoduct_release (default: 0x0001) + * + */ + USBMouseKeyboard(bool connect_blocking=true, MOUSE_TYPE mouse_type=REL_MOUSE, uint16_t vendor_id=0x0021, uint16_t product_id=0x0011, uint16_t product_release=0x0001); + + /** + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. + * + * @param phy USB phy to use + * @param mouse_type Mouse type: ABS_MOUSE (absolute mouse) or REL_MOUSE (relative mouse) (default: REL_MOUSE) + * @param vendor_id Your vendor_id (default: 0x1234) + * @param product_id Your product_id (default: 0x0001) + * @param product_release Your preoduct_release (default: 0x0001) + * + */ + USBMouseKeyboard(USBPhy *phy, MOUSE_TYPE mouse_type=REL_MOUSE, uint16_t vendor_id=0x0021, uint16_t product_id=0x0011, uint16_t product_release=0x0001); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ + virtual ~USBMouseKeyboard(); + + /** + * Write a state of the mouse + * + * @param x x-axis position + * @param y y-axis position + * @param buttons buttons state (first bit represents MOUSE_LEFT, second bit MOUSE_RIGHT and third bit MOUSE_MIDDLE) + * @param z wheel state (>0 to scroll down, <0 to scroll up) + * @returns true if there is no error, false otherwise + */ + bool update(int16_t x, int16_t y, uint8_t buttons, int8_t z); + + + /** + * Move the cursor to (x, y) + * + * @param x x-axis position + * @param y y-axis position + * @returns true if there is no error, false otherwise + */ + bool move(int16_t x, int16_t y); + + /** + * Press one or several buttons + * + * @param button button state (ex: press(MOUSE_LEFT)) + * @returns true if there is no error, false otherwise + */ + bool press(uint8_t button); + + /** + * Release one or several buttons + * + * @param button button state (ex: release(MOUSE_LEFT)) + * @returns true if there is no error, false otherwise + */ + bool release(uint8_t button); + + /** + * Double click (MOUSE_LEFT) + * + * @returns true if there is no error, false otherwise + */ + bool doubleClick(); + + /** + * Click + * + * @param button state of the buttons ( ex: clic(MOUSE_LEFT)) + * @returns true if there is no error, false otherwise + */ + bool click(uint8_t button); + + /** + * Scrolling + * + * @param z value of the wheel (>0 to go down, <0 to go up) + * @returns true if there is no error, false otherwise + */ + bool scroll(int8_t z); + + /** + * To send a character defined by a modifier(CTRL, SHIFT, ALT) and the key + * + * @code + * //To send CTRL + s (save) + * keyboard.keyCode('s', KEY_CTRL); + * @endcode + * + * @param modifier bit 0: KEY_CTRL, bit 1: KEY_SHIFT, bit 2: KEY_ALT (default: 0) + * @param key character to send + * @returns true if there is no error, false otherwise + */ + bool key_code(uint8_t key, uint8_t modifier = 0); + + /** + * Send a character + * + * @param c character to be sent + * @returns true if there is no error, false otherwise + */ + virtual int _putc(int c); + + /** + * Control media keys + * + * @param key media key pressed (KEY_NEXT_TRACK, KEY_PREVIOUS_TRACK, KEY_STOP, KEY_PLAY_PAUSE, KEY_MUTE, KEY_VOLUME_UP, KEY_VOLUME_DOWN) + * @returns true if there is no error, false otherwise + */ + bool media_control(MEDIA_KEY key); + + /** + * Read status of lock keys. Useful to switch-on/off leds according to key pressed. Only the first three bits of the result is important: + * - First bit: NUM_LOCK + * - Second bit: CAPS_LOCK + * - Third bit: SCROLL_LOCK + * + * @returns status of lock keys + */ + uint8_t lock_status(); + + /* + * To define the report descriptor. Warning: this method has to store the length of the report descriptor in reportLength. + * + * @returns pointer to the report descriptor + */ + virtual const uint8_t * report_desc(); + + /* + * Called when a data is received on the OUT endpoint. Useful to switch on LED of LOCK keys + * + * @returns if handle by subclass, return true + */ + virtual void report_rx(); + + +private: + MOUSE_TYPE _mouse_type; + uint8_t _button; + uint8_t _lock_status; + PlatformMutex _mutex; + + bool _mouse_send(int8_t x, int8_t y, uint8_t buttons, int8_t z); + + //dummy otherwise it doesn't compile (we must define all methods of an abstract class) + virtual int _getc(); +}; + +#endif From 11aa0b0284f06802d9de5f92f42c6043473ee089 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Thu, 3 May 2018 15:01:10 +0200 Subject: [PATCH 063/488] Update usb test to connect and block itself Update the basic usb test so it does blocking itself since blocking connect was removed from USBDevice. --- TESTS/usb_device/basic/USBTester.cpp | 12 +++++++++--- TESTS/usb_device/basic/USBTester.h | 5 +++-- TESTS/usb_device/basic/main.cpp | 26 +++++++++++++------------- 3 files changed, 25 insertions(+), 18 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index 24ca3df704c..fa484115607 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -37,8 +37,10 @@ #define MAX_EP_SIZE 64 #define MIN_EP_SIZE 8 +#define EVENT_READY (1 << 0) -USBTester::USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): + +USBTester::USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): USBDevice(phy, vendor_id, product_id, product_release), reset_count(0), suspend_count(0), resume_count(0), interface_0_alt_set(NONE), interface_1_alt_set(NONE), configuration_set(NONE) { @@ -56,7 +58,8 @@ USBTester::USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint1 configuration_desc(0); init(); - USBDevice::connect(connect_blocking); + USBDevice::connect(); + flags.wait_any(EVENT_READY, osWaitForever, false); } @@ -105,7 +108,10 @@ const char *USBTester::get_iproduct_desc_string() void USBTester::callback_state_change(DeviceState new_state) { - if (new_state != Configured) { + if (new_state == Configured) { + flags.set(EVENT_READY); + } else { + flags.clear(EVENT_READY); configuration_set = NONE; interface_0_alt_set = NONE; interface_1_alt_set = NONE; diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index dcd345b1bf9..5cae22ac2b1 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -22,6 +22,7 @@ #include "USBDescriptor.h" #include "USBDevice_Types.h" #include "EventQueue.h" +#include "EventFlags.h" #include "USBDevice.h" @@ -34,9 +35,8 @@ class USBTester: public USBDevice { * @param vendor_id Your vendor_id * @param product_id Your product_id * @param product_release Your product_release - * @param connect_blocking define if the connection must be blocked if USB not plugged in */ - USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); + USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); ~USBTester(); @@ -107,6 +107,7 @@ class USBTester: public USBDevice { uint8_t int_out; uint8_t int_buf[64]; EventQueue *queue; + rtos::EventFlags flags; volatile uint32_t reset_count; volatile uint32_t suspend_count; volatile uint32_t resume_count; diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index 8ccd4c5e4e7..20834d540aa 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -51,7 +51,7 @@ void control_basic_test() char str[128] = {}; { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); sprintf (str, "%s %d %d", serial.get_serial_desc_string(), vendor_id, product_id); greentea_send_kv("control_basic_test", str); // Wait for host before terminating @@ -69,7 +69,7 @@ void control_stall_test() char _value[128] = {}; { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); greentea_send_kv("control_stall_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); @@ -86,7 +86,7 @@ void control_sizes_test() char _value[128] = {}; { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); greentea_send_kv("control_sizes_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); @@ -103,7 +103,7 @@ void control_stress_test() char _value[128] = {}; { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); greentea_send_kv("control_stress_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); @@ -123,7 +123,7 @@ void device_reset_test() greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); if (strcmp(_value, "false") != 0) { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); serial.clear_reset_count(); greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); while(serial.get_reset_count() == 0); @@ -169,7 +169,7 @@ void device_soft_reconnection_test() const uint32_t reconnect_try_count = 3; { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); greentea_send_kv("device_soft_reconnection_test", serial.get_serial_desc_string()); // Wait for host before terminating @@ -211,7 +211,7 @@ void device_suspend_resume_test() char _value[128] = {}; { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); greentea_send_kv("device_suspend_resume_test", serial.get_serial_desc_string()); printf("[1] suspend_count: %d resume_count: %d\n", serial.get_suspend_count(), serial.get_resume_count()); serial.clear_suspend_count(); @@ -234,25 +234,25 @@ void repeated_construction_destruction_test() char _value[128] = {}; { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); TEST_ASSERT_EQUAL(true, serial.configured()); } wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); TEST_ASSERT_EQUAL(true, serial.configured()); } wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); TEST_ASSERT_EQUAL(true, serial.configured()); } wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); TEST_ASSERT_EQUAL(true, serial.configured()); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating @@ -262,7 +262,7 @@ void repeated_construction_destruction_test() wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); TEST_ASSERT_EQUAL(true, serial.configured()); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating @@ -272,7 +272,7 @@ void repeated_construction_destruction_test() wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); TEST_ASSERT_EQUAL(true, serial.configured()); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating From dea5f304ba0cd0b1fd592ce17a0550aa4a155e4a Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Mon, 30 Apr 2018 15:22:09 +0200 Subject: [PATCH 064/488] NUCLEO_F103RB: replace CLOCK_SOURCE_USB by DEVICE_USBDEVICE --- .../device/system_clock.c | 28 +++++++++---------- targets/targets.json | 5 ---- 2 files changed, 13 insertions(+), 20 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/system_clock.c b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/system_clock.c index abbadf5c65e..5258fcedd35 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/system_clock.c @@ -17,9 +17,9 @@ /** * This file configures the system clock as follows: *------------------------------------------------------------------------------------------- - * System clock source | 1- PLL_HSE_EXTC / CLOCK_SOURCE_USB=1 | 3- PLL_HSI / CLOCK_SOURCE_USB=1 + * System clock source | 1- PLL_HSE_EXTC / DEVICE_USBDEVICE | 3- PLL_HSI / DEVICE_USBDEVICE * | (external 8 MHz clock) | (internal 8 MHz) - * | 2- PLL_HSE_XTAL / CLOCK_SOURCE_USB=1 | + * | 2- PLL_HSE_XTAL / DEVICE_USBDEVICE | * | (external 8 MHz xtal) | *------------------------------------------------------------------------------------------- * SYSCLK(MHz) | 72 / 72 | 64 / 48 @@ -30,8 +30,6 @@ *------------------------------------------------------------------------------------------- * APB2CLK (MHz) | 72 / 72 | 64 / 48 *------------------------------------------------------------------------------------------- - * USB capable (48 MHz precise clock) | NO / YES | NO / YES - *------------------------------------------------------------------------------------------- */ #include "stm32f1xx.h" @@ -164,9 +162,9 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) { RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInit; -#endif /* CLOCK_SOURCE_USB */ +#endif /* DEVICE_USBDEVICE */ /* Enable HSE oscillator and activate PLL with HSE as source */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; @@ -193,12 +191,12 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) return 0; // FAIL } -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) /* USB clock selection */ RCC_PeriphCLKInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphCLKInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInit); -#endif /* CLOCK_SOURCE_USB */ +#endif /* DEVICE_USBDEVICE */ /* Output clock on MCO1 pin(PA8) for debugging purpose */ //HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1); // 8 MHz @@ -215,9 +213,9 @@ uint8_t SetSysClock_PLL_HSI(void) { RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInit; -#endif /* CLOCK_SOURCE_USB */ +#endif /* DEVICE_USBDEVICE */ /* Enable HSI oscillator and activate PLL with HSI as source */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE; @@ -226,21 +224,21 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; // 48 MHz (8 MHz/2 * 12) -#else /* CLOCK_SOURCE_USB */ +#else /* DEVICE_USBDEVICE */ RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16; // 64 MHz (8 MHz/2 * 16) -#endif /* CLOCK_SOURCE_USB */ +#endif /* DEVICE_USBDEVICE */ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) /* USB clock selection */ RCC_PeriphCLKInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphCLKInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL; HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInit); -#endif /* CLOCK_SOURCE_USB */ +#endif /* DEVICE_USBDEVICE */ /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); diff --git a/targets/targets.json b/targets/targets.json index 8a2d6a5870e..6292892653b 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -984,11 +984,6 @@ "help": "Mask value : USE_PLL_HSE_EXTC (SYSCLK=72 MHz) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI (SYSCLK=64 MHz)", "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", "macro_name": "CLOCK_SOURCE" - }, - "clock_source_usb": { - "help": "In case of HSI clock source, to get 48 Mhz USB, SYSCLK has to be reduced from 64 to 48 MHz (set 0 for the max SYSCLK value)", - "value": "0", - "macro_name": "CLOCK_SOURCE_USB" } }, "detect_code": ["0700"], From 576851b57d031d3c6a462dfcdb1547e29c8b7c37 Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Mon, 30 Apr 2018 15:45:54 +0200 Subject: [PATCH 065/488] STM32F4: replace CLOCK_SOURCE_USB by DEVICE_USBDEVICE --- .../TARGET_NUCLEO_F411RE/system_clock.c | 22 +++++++++---------- .../TARGET_SAKURAIO_EVB_01/system_clock.c | 22 +++++++++---------- .../TARGET_DISCO_F429ZI/system_clock.c | 14 ++++++------ .../TARGET_NUCLEO_F429ZI/system_clock.c | 14 ++++++------ .../TARGET_NUCLEO_F439ZI/system_clock.c | 14 ++++++------ targets/targets.json | 20 ----------------- 6 files changed, 43 insertions(+), 63 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/system_clock.c index a1980f0a247..e6f08e10634 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/system_clock.c @@ -17,7 +17,7 @@ /** * This file configures the system clock as follows: *----------------------------------------------------------------------------- - * System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock) | CLOCK_SOURCE_USB=1 + * System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock) | DEVICE_USBDEVICE=1 * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal) | * | 3- USE_PLL_HSI (internal 16 MHz) | *----------------------------------------------------------------------------- @@ -147,13 +147,13 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 4; // VCO input clock = 2 MHz (8 MHz / 4) -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 192; // VCO output clock = 384 MHz (2 MHz * 192) -#else /* CLOCK_SOURCE_USB */ +#else /* DEVICE_USBDEVICE */ RCC_OscInitStruct.PLL.PLLN = 200; // VCO output clock = 400 MHz (2 MHz * 200) -#endif /* CLOCK_SOURCE_USB */ - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on CLOCK_SOURCE_USB) - RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (CLOCK_SOURCE_USB=1) +#endif /* DEVICE_USBDEVICE */ + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on DEVICE_USBDEVICE) + RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (DEVICE_USBDEVICE=1) if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } @@ -201,13 +201,13 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 2 MHz (16 MHz / 8) -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 192; // VCO output clock = 384 MHz (2 MHz * 192) -#else /* CLOCK_SOURCE_USB */ +#else /* DEVICE_USBDEVICE */ RCC_OscInitStruct.PLL.PLLN = 200; // VCO output clock = 400 MHz (2 MHz * 200) -#endif /* CLOCK_SOURCE_USB */ - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on CLOCK_SOURCE_USB) - RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (CLOCK_SOURCE_USB=1) +#endif /* DEVICE_USBDEVICE */ + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on DEVICE_USBDEVICE) + RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (DEVICE_USBDEVICE=1) if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_SAKURAIO_EVB_01/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_SAKURAIO_EVB_01/system_clock.c index d9bc626abe7..361ebf35865 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_SAKURAIO_EVB_01/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_SAKURAIO_EVB_01/system_clock.c @@ -17,7 +17,7 @@ /** * This file configures the system clock as follows: *----------------------------------------------------------------------------- - * System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock) | CLOCK_SOURCE_USB=1 + * System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock) | DEVICE_USBDEVICE=1 * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal) | * | 3- USE_PLL_HSI (internal 16 MHz) | *----------------------------------------------------------------------------- @@ -162,13 +162,13 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 4; // VCO input clock = 2 MHz (8 MHz / 4) -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 192; // VCO output clock = 384 MHz (2 MHz * 192) -#else /* CLOCK_SOURCE_USB */ +#else /* DEVICE_USBDEVICE */ RCC_OscInitStruct.PLL.PLLN = 200; // VCO output clock = 400 MHz (2 MHz * 200) -#endif /* CLOCK_SOURCE_USB */ - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on CLOCK_SOURCE_USB) - RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (CLOCK_SOURCE_USB=1) +#endif /* DEVICE_USBDEVICE */ + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on DEVICE_USBDEVICE) + RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (DEVICE_USBDEVICE=1) if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } @@ -216,13 +216,13 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 2 MHz (16 MHz / 8) -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 192; // VCO output clock = 384 MHz (2 MHz * 192) -#else /* CLOCK_SOURCE_USB */ +#else /* DEVICE_USBDEVICE */ RCC_OscInitStruct.PLL.PLLN = 200; // VCO output clock = 400 MHz (2 MHz * 200) -#endif /* CLOCK_SOURCE_USB */ - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on CLOCK_SOURCE_USB) - RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (CLOCK_SOURCE_USB=1) +#endif /* DEVICE_USBDEVICE */ + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on DEVICE_USBDEVICE) + RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (DEVICE_USBDEVICE=1) if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_DISCO_F429ZI/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_DISCO_F429ZI/system_clock.c index 02edcc0e600..4aa472486a5 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_DISCO_F429ZI/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_DISCO_F429ZI/system_clock.c @@ -18,7 +18,7 @@ * This file configures the system clock as follows: *----------------------------------------------------------------------------------- * System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock) | - * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal) | CLOCK_SOURCE_USB=1 + * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal) | DEVICE_USBDEVICE=1 * | 3- USE_PLL_HSI (internal 16 MHz clock) | *----------------------------------------------------------------------------------- * SYSCLK(MHz) | 180 | 168 @@ -141,13 +141,13 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 8; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 336; #else RCC_OscInitStruct.PLL.PLLN = 360; #endif - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if CLOCK_SOURCE_USB defined - RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if CLOCK_SOURCE_USB defined + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if DEVICE_USBDEVICE defined + RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if DEVICE_USBDEVICE defined if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } @@ -196,13 +196,13 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLM = 8; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 168; #else RCC_OscInitStruct.PLL.PLLN = 180; #endif - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if CLOCK_SOURCE_USB defined - RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if CLOCK_SOURCE_USB defined + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if DEVICE_USBDEVICE defined + RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if DEVICE_USBDEVICE defined if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/system_clock.c index 02edcc0e600..4aa472486a5 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/system_clock.c @@ -18,7 +18,7 @@ * This file configures the system clock as follows: *----------------------------------------------------------------------------------- * System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock) | - * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal) | CLOCK_SOURCE_USB=1 + * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal) | DEVICE_USBDEVICE=1 * | 3- USE_PLL_HSI (internal 16 MHz clock) | *----------------------------------------------------------------------------------- * SYSCLK(MHz) | 180 | 168 @@ -141,13 +141,13 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 8; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 336; #else RCC_OscInitStruct.PLL.PLLN = 360; #endif - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if CLOCK_SOURCE_USB defined - RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if CLOCK_SOURCE_USB defined + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if DEVICE_USBDEVICE defined + RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if DEVICE_USBDEVICE defined if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } @@ -196,13 +196,13 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLM = 8; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 168; #else RCC_OscInitStruct.PLL.PLLN = 180; #endif - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if CLOCK_SOURCE_USB defined - RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if CLOCK_SOURCE_USB defined + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if DEVICE_USBDEVICE defined + RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if DEVICE_USBDEVICE defined if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/system_clock.c index bbc9a292ed3..c74d32ca98f 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/system_clock.c @@ -17,7 +17,7 @@ /** * This file configures the system clock as follows: *----------------------------------------------------------------------------------- - * System clock source | 1- USE_PLL_HSE_EXTC (CLOCK_SOURCE_USB=1) | 3- USE_PLL_HSI (CLOCK_SOURCE_USB=1) + * System clock source | 1- USE_PLL_HSE_EXTC (DEVICE_USBDEVICE=1) | 3- USE_PLL_HSI (DEVICE_USBDEVICE=1) * | (external 8 MHz clock) | (internal 16 MHz clock) * | 2- USE_PLL_HSE_XTAL | * | (external 8 MHz xtal) | @@ -156,13 +156,13 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 8; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 336; #else RCC_OscInitStruct.PLL.PLLN = 360; #endif - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if CLOCK_SOURCE_USB defined - RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if CLOCK_SOURCE_USB defined + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if DEVICE_USBDEVICE defined + RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if DEVICE_USBDEVICE defined if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } @@ -211,13 +211,13 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLM = 8; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 168; #else RCC_OscInitStruct.PLL.PLLN = 180; #endif - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if CLOCK_SOURCE_USB defined - RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if CLOCK_SOURCE_USB defined + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if DEVICE_USBDEVICE defined + RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if DEVICE_USBDEVICE defined if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } diff --git a/targets/targets.json b/targets/targets.json index 6292892653b..280d69b8a04 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -1177,11 +1177,6 @@ "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", "macro_name": "CLOCK_SOURCE" - }, - "clock_source_usb": { - "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 100 to 96 MHz (set 0 for the max SYSCLK value)", - "value": "0", - "macro_name": "CLOCK_SOURCE_USB" } }, "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], @@ -1344,11 +1339,6 @@ "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", "macro_name": "CLOCK_SOURCE" - }, - "clock_source_usb": { - "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)", - "value": "1", - "macro_name": "CLOCK_SOURCE_USB" } }, "extra_labels_add": ["STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx", "STM32F429xI", "STM_EMAC"], @@ -1376,11 +1366,6 @@ "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", "macro_name": "CLOCK_SOURCE" - }, - "clock_source_usb": { - "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)", - "value": "1", - "macro_name": "CLOCK_SOURCE_USB" } }, "extra_labels_add": ["STM32F4", "STM32F439", "STM32F439ZI", "STM32F439xx", "STM32F439xI", "STM_EMAC"], @@ -1929,11 +1914,6 @@ "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL | USE_PLL_HSI", "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI", "macro_name": "CLOCK_SOURCE" - }, - "clock_source_usb": { - "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)", - "value": "1", - "macro_name": "CLOCK_SOURCE_USB" } }, "overrides": {"lse_available": 0}, From c152663db11757593e4d944ebdc814b4398671bd Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Thu, 10 May 2018 23:29:07 +0200 Subject: [PATCH 066/488] USB basic test update disable suspend/resume test disable sync frame test improve reset test --- TESTS/host_tests/pyusb_basic.py | 25 +++++++++++++++++++------ TESTS/usb_device/basic/main.cpp | 7 +++++++ 2 files changed, 26 insertions(+), 6 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 109f23d7bb8..2113991d704 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -313,7 +313,6 @@ def control_basic_test(dev, vendor_id, product_id, log): set_clear_feature_test(dev, log) get_descriptor_test(dev, vendor_id, product_id, log) set_descriptor_test(dev, log) - #synch_frame_test(dev, log) wait for isochronous endpoint def get_set_configuration_test(dev, log): @@ -738,8 +737,12 @@ def device_reset_test(log): dev = yield dev.reset(); dev = yield + # run other test to check if USB works fine after reset + control_data_test(dev, [64, 256], log) dev.reset(); dev = yield + # run other test to check if USB works fine after reset + control_data_test(dev, [64, 256], log) dev.reset(); dev = yield # run other test to check if USB works fine after reset @@ -769,15 +772,25 @@ def device_soft_reconnection_test(log): def device_suspend_resume_test(log): dev = yield - time.sleep(0.1) control_data_test(dev, [64, 256], log) - time.sleep(0.1) + # suspend code goes here + # ... + # resume code here + # ... + # run other test to check if USB works fine after resume control_data_test(dev, [64, 256], log) - time.sleep(0.1) + # suspend code here + # ... + # resume code here + # ... + # run other test to check if USB works fine after resume control_data_test(dev, [64, 256], log) - time.sleep(0.1) + # suspend code here + # ... + # resume code here + # ... + # run other test to check if USB works fine after resume control_data_test(dev, [64, 256], log) - time.sleep(0.1) yield diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index 20834d540aa..6c2c5af1efd 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -24,6 +24,9 @@ #include "USBTester.h" #include "usb_phy_api.h" +// Uncomment or remove this if host suspend_resume_test part will be implemented +//#define SUSPEND_RESUME_TEST_SUPPORTED + // If disconnect() + connect() occur too fast the reset event will be dropped. // At a minimum there should be a 200us delay between disconnect and connect. // To be on the safe side I would recommend a 1ms delay, so the host controller @@ -202,6 +205,7 @@ void device_soft_reconnection_test() } } +#if SUSPEND_RESUME_TEST_SUPPORTED void device_suspend_resume_test() { uint16_t vendor_id = 0x0d28; @@ -224,6 +228,7 @@ void device_suspend_resume_test() printf("[3] suspend_count: %d resume_count: %d\n", serial.get_suspend_count(), serial.get_resume_count()); } } +#endif void repeated_construction_destruction_test() { @@ -288,7 +293,9 @@ Case cases[] = { Case("usb control stress test", control_stress_test), Case("usb device reset test", device_reset_test), Case("usb soft reconnection test", device_soft_reconnection_test), +#if SUSPEND_RESUME_TEST_SUPPORTED Case("usb device suspend/resume test", device_suspend_resume_test), +#endif Case("usb repeated construction destruction test", repeated_construction_destruction_test) }; From 2509eaf3a44dd948fa668a71d39328663bf4b41c Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Thu, 10 May 2018 23:35:17 +0200 Subject: [PATCH 067/488] USB basic test documentation update --- TESTS/host_tests/pyusb_basic.py | 150 ++++++++++++++++++++++++++++++-- TESTS/usb_device/basic/main.cpp | 115 +++++++++++++++++++++++- 2 files changed, 258 insertions(+), 7 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 2113991d704..d9c9f2e0b00 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -316,6 +316,18 @@ def control_basic_test(dev, vendor_id, product_id, log): def get_set_configuration_test(dev, log): + """ + Test device configuration/deconfiguration + + Given an initialized USB (HOST <---> DUT connection established) + When device configuration is checked just after initialization + Then get_configuration returns 1 (default configuration is set) + When device is deconfigured + Then get_configuration returns 0 (no configuration is set) + When each from supported configurations is set + Then the configuration is set correctly + """ + print("<<< get_set_configuration_test >>>") # check if dafault(1) configuration set try: @@ -368,6 +380,14 @@ def get_set_configuration_test(dev, log): def get_set_interface_test(dev, log): + """ + Test device interface setting + + Given an initialized USB (HOST <---> DUT connection established) + When each altsetting from every supported configuration is set + Then the interface altsetting is set correctly + """ + print("<<< get_set_interface_test >>>") # for every configuration for cfg in dev: @@ -390,6 +410,20 @@ def get_set_interface_test(dev, log): def get_status_test(dev, log): + """ + Test device/interface/endpoint status + + Given an initialized USB (HOST <---> DUT connection established) + When device status is checked + Then status is within allowed values (see status bits description below) + When control endpoint status is checked + Then control endpoint status is 0 + When status of each interface from every supported configuration is checked + Then interface status is 0 + When status of each endpoint in every allowed device interface/configuration combination is checked + Then endpoint status is 0 (not halted) + """ + print("<<< get_status_test >>>") # check device status ret = get_status(dev, CTRL_RECIPIENT_DEVICE) @@ -440,7 +474,19 @@ def get_status_test(dev, log): def set_clear_feature_test(dev, log): + """ + Test set/clear feature on device/interface/endpoint + + Given an initialized USB (HOST <---> DUT connection established) + When for each endpoint in every allowed interface/configuration combination the feature is set and then cleared + Then selected feature is set/cleared accordingly + """ + print("<<< set_clear_feature_test >>>") + # TODO: + # test set_feature on device (Remote wakeup feature not supported on DUT side) + # test set_feature on interface (not supported at all) + # for every configuration for cfg in dev: cfg.set() @@ -450,6 +496,7 @@ def set_clear_feature_test(dev, log): intf.set_altsetting() # on every ENDPOINT for ep in intf: + # halt endpoint try: usb.control.set_feature(dev, FEATURE_ENDPOINT_HALT, ep) except usb.core.USBError as err: @@ -486,8 +533,22 @@ def set_clear_feature_test(dev, log): def get_descriptor_test(dev, vendor_id, product_id, log): + """ + Test device/configuration/interface/endpoint descriptors + + Given an initialized USB (HOST <---> DUT connection established) + When device descriptor is read + Then the descriptor content is valid + When configuration descriptor is read + Then the descriptor content is valid + When interface descriptor is read + Then the error is thrown since it is not directly accessible + When endpoint descriptor is read + Then the error is thrown since it is not directly accessible + """ + print("<<< get_descriptor_test >>>") - # Control IN GET_DESCRIPTOR - device + # device descriptor try: ret = get_descriptor(dev, (DESC_TYPE_DEVICE << 8) | (0 << 0), 0, DEVICE_DESC_SIZE) dev_desc = dict(zip(device_descriptor_keys, device_descriptor_parser.unpack(ret))) @@ -497,7 +558,7 @@ def get_descriptor_test(dev, vendor_id, product_id, log): except usb.core.USBError: raise_unconditionally(lineno(), "Requesting device descriptor failed") - # Control IN GET_DESCRIPTOR - configuration + # configuration descriptor try: ret = get_descriptor(dev, (DESC_TYPE_CONFIG << 8) | (0 << 0), 0, CONFIGURATION_DESC_SIZE) conf_desc = dict(zip(configuration_descriptor_keys, configuration_descriptor_parser.unpack(ret))) @@ -505,14 +566,14 @@ def get_descriptor_test(dev, vendor_id, product_id, log): except usb.core.USBError: raise_unconditionally(lineno(), "Requesting configuration descriptor failed") - # Control IN GET_DESCRIPTOR - interface + # interface descriptor try: ret = get_descriptor(dev, (DESC_TYPE_INTERFACE << 8) | (0 << 0), 0, INTERFACE_DESC_SIZE) raise_unconditionally(lineno(), "Requesting interface descriptor should fail since it is not directly accessible") except usb.core.USBError: log("interface descriptor is not directly accessible - OK") - # Control IN GET_DESCRIPTOR - endpoint + # endpoint descriptor try: ret = get_descriptor(dev, (DESC_TYPE_ENDPOINT << 8) | (0 << 0), 0, ENDPOINT_DESC_SIZE) raise_unconditionally(lineno(), "Requesting endpoint descriptor should fail since it is not directly accessible") @@ -520,7 +581,16 @@ def get_descriptor_test(dev, vendor_id, product_id, log): log("endpoint descriptor is not directly accessible - OK") print("") # new line + def set_descriptor_test(dev, log): + """ + Test descriptor setting + + Given an initialized USB (HOST <---> DUT connection established) + When device descriptor is to be set + Then error is thrown since descriptor setting command is not supported by Mbed + """ + print("<<< set_descriptor_test >>>") # SET_DESCRIPTOR is optional and not implemented in Mbed # command should fail with no action on device side @@ -541,6 +611,14 @@ def set_descriptor_test(dev, log): def synch_frame_test(dev, log): + """ + Test sync frame request + + Given an initialized USB (HOST <---> DUT connection established) + When ... + Then ... + """ + print("<<< synch_frame_test >>>") # only for isochronous endpoints request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, @@ -559,6 +637,14 @@ def synch_frame_test(dev, log): def control_stall_test(dev, log): + """ + Test control endpoint stall on invalid request + + Given an initialized USB (HOST <---> DUT connection established) + When unsupported request to control endpoint is to be sent + Then the endpoint is stalled and error is thrown + """ + print("<<< control_stall_test >>>") # Control OUT stall try: @@ -640,6 +726,14 @@ def control_stall_test(dev, log): def control_sizes_test(dev, log): + """ + Test various data sizes in control transfer + + Given an initialized USB (HOST <---> DUT connection established) + When control data in each tested size is sent + Then read data should match sent data + """ + list = [1, 2, 3, 7, 8, 9, 15, 16, 17, 31, 32, 33, 63, 64, 65, 127, 128, 129, 255, 256, 257, 511, 512, 513, 1023, 1024, 1025, 2047, 2048] control_data_test(dev, list, log) @@ -683,8 +777,18 @@ def control_data_test(dev, sizes_list, log): def control_stress_test(dev, log): - # Test various patterns of control transfers - # + """ + Test various patterns of control transfers + + Given an initialized USB (HOST <---> DUT connection established) + When stress control transfer with a data in stage is performed + Then transfer ends with success + When stress control transfer with a data out stage followed by a control transfer with a data in stage is performed + Then transfer ends with success + When stress control transfer with a data out stage is performed + Then transfer ends with success + """ + # Some devices have had problems with back-to-back # control transfers. Intentionally send these sequences # to make sure they are properly handled. @@ -734,6 +838,14 @@ def control_stress_test(dev, log): def device_reset_test(log): + """ + Test USB implementation against repeated reset + + Given an initialized USB (HOST <---> DUT connection established) + When USB device is reset repeatedly + Then the USB is operational with no errors + """ + dev = yield dev.reset(); dev = yield @@ -751,6 +863,14 @@ def device_reset_test(log): def device_soft_reconnection_test(log): + """ + Test USB implementation against repeated reconnection + + Given an initialized USB (HOST <---> DUT connection established) + When USB device is disconnected and then connected repeatedly + Then the USB is operational with no errors + """ + list = [64, 256] dev = yield # run other test to check if USB works fine before reconnection @@ -771,6 +891,14 @@ def device_soft_reconnection_test(log): def device_suspend_resume_test(log): + """ + Test USB implementation against repeated suspend and resume + + Given an initialized USB (HOST <---> DUT connection established) + When USB device is suspended and then resumed repeatedly + Then the USB is operational with no errors + """ + dev = yield control_data_test(dev, [64, 256], log) # suspend code goes here @@ -795,6 +923,14 @@ def device_suspend_resume_test(log): def repeated_construction_destruction_test(log): + """ + Test USB implementation against repeated initialization and deinitialization + + Given an initialized USB (HOST <---> DUT connection established) + When USB device is deinitialized and then initialized repeatedly + Then the USB is operational with no errors + """ + list = [64, 256] dev = yield # run other test to check if USB works fine after repeated construction/destruction @@ -820,6 +956,8 @@ def release_interfaces(dev): def restore_default_configuration(dev): + """ Set default configuration """ + cfg = dev[1] cfg.set() diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index 6c2c5af1efd..deb45ba6431 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -24,7 +24,11 @@ #include "USBTester.h" #include "usb_phy_api.h" -// Uncomment or remove this if host suspend_resume_test part will be implemented +// TODO +// suspend resume test: implement host side USB suspend/resume +// sync frame test: add test on isochronous endpoint + +// Uncomment/remove this when host suspend_resume_test part will be implemented //#define SUSPEND_RESUME_TEST_SUPPORTED // If disconnect() + connect() occur too fast the reset event will be dropped. @@ -37,6 +41,7 @@ #error [NOT_SUPPORTED] USB Device not supported for this target #endif + using namespace utest::v1; static USBPhy *get_phy() @@ -44,6 +49,55 @@ static USBPhy *get_phy() return get_usb_phy(); } + +/** Control basic tests + + Test device configuration/deconfiguration + Given an initialized USB (HOST <---> DUT connection established) + When device configuration is checked just after initialization + Then get_configuration returns 1 (default configuration is set) + When device is deconfigured + Then get_configuration returns 0 (no configuration is set) + When each from supported configurations is set + Then the configuration is set correctly + + Test device interface setting + Given an initialized USB (HOST <---> DUT connection established) + When each altsetting from every supported configuration is set + Then the interface altsetting is set correctly + + Test device/interface/endpoint status + Given an initialized USB (HOST <---> DUT connection established) + When device status is checked + Then status is within allowed values (see status bits description below) + When control endpoint status is checked + Then control endpoint status is 0 + When status of each interface from every supported configuration is checked + Then interface status is 0 + When status of each endpoint in every allowed device interface/configuration combination is checked + Then endpoint status is 0 (not halted) + + Test set/clear feature on device/interface/endpoint + Given an initialized USB (HOST <---> DUT connection established) + When for each endpoint in every allowed interface/configuration combination the feature is set and then cleared + Then selected feature is set/cleared accordingly + + Test device/configuration/interface/endpoint descriptors + Given an initialized USB (HOST <---> DUT connection established) + When device descriptor is read + Then the descriptor content is valid + When configuration descriptor is read + Then the descriptor content is valid + When interface descriptor is read + Then the error is thrown since it is not directly accessible + When endpoint descriptor is read + Then the error is thrown since it is not directly accessible + + Test descriptor setting + Given an initialized USB (HOST <---> DUT connection established) + When device descriptor is to be set + Then error is thrown since descriptor setting command is not supported by Mbed +*/ void control_basic_test() { uint16_t vendor_id = 0x0d28; @@ -63,6 +117,14 @@ void control_basic_test() } } + +/** Test control endpoint stall on invalid request + + Given an initialized USB (HOST <---> DUT connection established) + When unsupported request to control endpoint is to be sent + Then the endpoint is stalled and error is thrown + +*/ void control_stall_test() { uint16_t vendor_id = 0x0d28; @@ -80,6 +142,14 @@ void control_stall_test() } } + +/** Test various data sizes in control transfer + + Given an initialized USB (HOST <---> DUT connection established) + When control data in each tested size is sent + Then read data should match sent data + +*/ void control_sizes_test() { uint16_t vendor_id = 0x0d28; @@ -97,6 +167,18 @@ void control_sizes_test() } } + +/** Test various patterns of control transfers + + Given an initialized USB (HOST <---> DUT connection established) + When stress control transfer with a data in stage is performed + Then transfer ends with success + When stress control transfer with a data out stage followed by a control transfer with a data in stage is performed + Then transfer ends with success + When stress control transfer with a data out stage is performed + Then transfer ends with success + +*/ void control_stress_test() { uint16_t vendor_id = 0x0d28; @@ -114,6 +196,14 @@ void control_stress_test() } } + +/** Test USB implementation against repeated reset + + Given an initialized USB (HOST <---> DUT connection established) + When USB device is reset repeatedly + Then the USB is operational with no errors + +*/ void device_reset_test() { uint16_t vendor_id = 0x0d28; @@ -162,6 +252,13 @@ void device_reset_test() } +/** Test USB implementation against repeated reconnection + + Given an initialized USB (HOST <---> DUT connection established) + When USB device is disconnected and then connected repeatedly + Then the USB is operational with no errors + +*/ void device_soft_reconnection_test() { uint16_t vendor_id = 0x0d28; @@ -205,7 +302,15 @@ void device_soft_reconnection_test() } } + #if SUSPEND_RESUME_TEST_SUPPORTED +/** Test USB implementation against repeated suspend and resume + + Given an initialized USB (HOST <---> DUT connection established) + When USB device is suspended and then resumed repeatedly + Then the USB is operational with no errors + +*/ void device_suspend_resume_test() { uint16_t vendor_id = 0x0d28; @@ -230,6 +335,14 @@ void device_suspend_resume_test() } #endif + +/** Test USB implementation against repeated initialization and deinitialization + + Given an initialized USB (HOST <---> DUT connection established) + When USB device is deinitialized and then initialized repeatedly + Then the USB is operational with no errors + +*/ void repeated_construction_destruction_test() { uint16_t vendor_id = 0x0d28; From d11d3d7e715c1056d12a92f83b1f7ec991651ee9 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 7 May 2018 14:42:02 -0500 Subject: [PATCH 068/488] Refactor AsyncOp class Add the OperationList class to simplify managing async operations. Add a callback to the AsyncOp class so completion can be signaled with another mechanism. Finally rework the lock handling so AsyncOp::wait is passed the lock to use rather than taking it in a constructor. --- usb/device/utilities/AsyncOp.cpp | 117 ++++++++++++++++----- usb/device/utilities/AsyncOp.h | 79 +++++++++++--- usb/device/utilities/OperationList.h | 86 +++++++++++++++ usb/device/utilities/OperationListBase.cpp | 87 +++++++++++++++ usb/device/utilities/OperationListBase.h | 96 +++++++++++++++++ 5 files changed, 422 insertions(+), 43 deletions(-) create mode 100644 usb/device/utilities/OperationList.h create mode 100644 usb/device/utilities/OperationListBase.cpp create mode 100644 usb/device/utilities/OperationListBase.h diff --git a/usb/device/utilities/AsyncOp.cpp b/usb/device/utilities/AsyncOp.cpp index 5f6939be2c9..aa6557d1d75 100644 --- a/usb/device/utilities/AsyncOp.cpp +++ b/usb/device/utilities/AsyncOp.cpp @@ -16,68 +16,129 @@ #include "AsyncOp.h" #include "mbed_critical.h" +#include "mbed_assert.h" using namespace rtos; -AsyncOp::AsyncOp(Mutex *lock): _list(NULL), _signal(NULL), _signal_lock(lock) +AsyncOp::AsyncOp(): + _list(NULL), _wait(NULL), _aborted(false), _timeout(false) { } -void AsyncOp::start(LinkedListBase *list) +AsyncOp::AsyncOp(mbed::Callback &callback): + _list(NULL), _wait(NULL), _aborted(false), _timeout(false) { - _lock(); - _list = list; - list->enqueue(this); - _unlock(); + _callback = callback; } -void AsyncOp::wait() +AsyncOp::~AsyncOp() { - if (_list == NULL) { - // Event either hasn't start or has already occurred + MBED_ASSERT(_list == NULL); +} + +void AsyncOp::wait(rtos::Mutex *host_mutex, uint32_t milliseconds) +{ + // Optimization so semaphore is only created if necessary + core_util_critical_section_enter(); + bool done = _list == NULL; + core_util_critical_section_exit(); + if (done) { return; } // Construct semaphore to wait on Semaphore sem(0); - // Atomically set the semaphore pointer and - // check for completion - _lock(); - bool done = _list == NULL; - _signal = &sem; - _unlock(); + core_util_critical_section_enter(); + done = _list == NULL; + // Wait is only allowed to be called from one thread + MBED_ASSERT(_wait == NULL); + _wait = &sem; + core_util_critical_section_exit(); - if (!done) { - sem.wait(); + if (done) { + // Operation was signaled before semaphore was set + return; } + + if (sem.wait(milliseconds) == 1) { + // Operation completion signaled semaphore + return; + } + + _host_lock(host_mutex); + _abort(true); + _host_unlock(host_mutex); +} + +void AsyncOp::abort() +{ + // Host lock must be held + + _abort(false); } void AsyncOp::complete() { - _lock(); - _list->remove(this); + core_util_critical_section_enter(); + + mbed::Callback cb = _callback; + _callback = NULL; _list = NULL; - if (_signal != NULL) { - _signal->release(); + if (_wait != NULL) { + _wait->release(); + } + + core_util_critical_section_exit(); + + if (cb) { + cb(); + } +} + +bool AsyncOp::timeout() +{ + core_util_critical_section_enter(); + + bool ret = _timeout; + + core_util_critical_section_exit(); + return ret; +} + +void AsyncOp::_abort(bool timeout) +{ + // host lock must be held + + core_util_critical_section_enter(); + OperationListBase *list = _list; + if (list) { + _callback = NULL; + _aborted = true; + _wait = NULL; + _timeout = timeout; + _list = NULL; + } + core_util_critical_section_exit(); + if (list) { + list->remove(this); } - _unlock(); } -void AsyncOp::_lock() +void AsyncOp::_host_lock(rtos::Mutex *host_mutex) { - if (_signal_lock) { - _signal_lock->lock(); + if (host_mutex) { + host_mutex->lock(); } else { core_util_critical_section_enter(); } } -void AsyncOp::_unlock() +void AsyncOp::_host_unlock(rtos::Mutex *host_mutex) { - if (_signal_lock) { - _signal_lock->unlock(); + if (host_mutex) { + host_mutex->unlock(); } else { core_util_critical_section_exit(); } diff --git a/usb/device/utilities/AsyncOp.h b/usb/device/utilities/AsyncOp.h index be28c28cde1..75996b02c3e 100644 --- a/usb/device/utilities/AsyncOp.h +++ b/usb/device/utilities/AsyncOp.h @@ -19,44 +19,93 @@ #include "Mutex.h" #include "Semaphore.h" +#include "Callback.h" #include "LinkEntry.h" -#include "LinkedListBase.h" +#include "OperationListBase.h" class AsyncOp: public LinkEntry { public: + + /** + * Construct a new AsyncOp object + */ + AsyncOp(); + /** * Construct a new AsyncOp object * - * @param lock Mutex used to serialize the object or code calling complete - * or NULL if a critical section is used + * @param callback Completion callback */ - AsyncOp(rtos::Mutex *lock); + AsyncOp(mbed::Callback &callback); /** - * Add this operation to the linked list to start it + * Cleanup resources used by this AsyncOp */ - void start(LinkedListBase *list); + virtual ~AsyncOp(); /** * Wait for this asynchronous operation to complete + * + * If the timeout expires then this asynchronous operation is + * aborted and the timeout flag is set. + * + * @note - the host object's lock MUST NOT be held when this call is made */ - void wait(); + void wait(rtos::Mutex *host_mutex, uint32_t milliseconds=osWaitForever); /** - * Mark this asynchronous operation as complete + * Abort this asynchronous operation * - * This wake the thread calling wait() + * This function has no effect if the operation is complete. Otherwise + * the aborted flag is set. + * + * @note - the host object's lock MUST be held when this call is made */ - void complete(); + void abort(); + + /** + * Check if this operation timed out + * + * @return true if this operation timed out, false otherwise + */ + bool timeout(); + + /** + * Check if this operation was aborted + * + * @return true if this operation was aborted, false otherwise + */ + bool aborted(); + +protected: + + /** + * Callback indicating that something changed + * + * @return true if finished false if not + */ + virtual bool process() = 0; + + /** + * Callback indicating that this event finished + */ + virtual void complete(); private: - void _lock(); - void _unlock(); + friend class OperationListBase; + + mbed::Callback _callback; + OperationListBase *_list; + rtos::Semaphore *_wait; + bool _aborted; + bool _timeout; + + void _abort(bool timeout); + + static void _host_lock(rtos::Mutex *host_mutex); - LinkedListBase *_list; - rtos::Semaphore *_signal; - rtos::Mutex *const _signal_lock; + static void _host_unlock(rtos::Mutex *host_mutex); }; #endif diff --git a/usb/device/utilities/OperationList.h b/usb/device/utilities/OperationList.h new file mode 100644 index 00000000000..369ccc93564 --- /dev/null +++ b/usb/device/utilities/OperationList.h @@ -0,0 +1,86 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_OPERATION_LIST_H +#define MBED_OPERATION_LIST_H + +#include "OperationListBase.h" +#include "AsyncOp.h" + +template +class OperationList: public OperationListBase { +public: + + /** + * Create a new empty operation list + */ + OperationList() + { + + } + + /** + * Destroy this object and abort all operations + */ + ~OperationList() + { + + } + /** + * Add an operation to the list + * + * If the list was empty then call process on this + * operation + * + * @param op Operation to add + */ + void add(T *op) + { + OperationListBase::add(op); + } + + /** + * Remove an operation from the list + * + * If this was the head of the list then process the + * next element in the list. + * + * @param op Operation to remove + */ + void remove(T *op) + { + OperationListBase::remove(op); + } + + /** + * Dequeue the head of the list + * + * Remove the head of the operation list without completing it + * or processing the next element. The caller must call the + * AsnycOp::complete() function of the returned object. + * Additionally process() must be called on this object + * if there are still elements in the list. + * + * @return The async op at the head of the list + */ + T *dequeue_raw() + { + return static_cast(OperationListBase::dequeue_raw()); + } + +}; + +#endif diff --git a/usb/device/utilities/OperationListBase.cpp b/usb/device/utilities/OperationListBase.cpp new file mode 100644 index 00000000000..b13128093d5 --- /dev/null +++ b/usb/device/utilities/OperationListBase.cpp @@ -0,0 +1,87 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "OperationListBase.h" +#include "AsyncOp.h" +#include "mbed_assert.h" + +OperationListBase::OperationListBase() +{ + +} + +OperationListBase::~OperationListBase() +{ + remove_all(); +} + +bool OperationListBase::empty() +{ + return _list.head() == NULL; +} + +void OperationListBase::add(AsyncOp *op) +{ + bool was_empty = _list.head() == NULL; + op->_list = this; + _list.enqueue(op); + if (was_empty) { + process(); + } +} + +void OperationListBase::process() +{ + while (true) { + AsyncOp *op = static_cast(_list.head()); + if (op == NULL) { + // List empty, nothing left to do + break; + } + if (!op->process()) { + // Processing is in progress + break; + } + _list.dequeue(); + op->complete(); + } +} + +void OperationListBase::remove(AsyncOp *op) +{ + bool head = _list.head() == op; + _list.remove(op); + if (head) { + process(); + } +} + +AsyncOp *OperationListBase::dequeue_raw() +{ + return static_cast(_list.dequeue()); +} + +void OperationListBase::remove_all() +{ + while (true) { + AsyncOp *op = static_cast(_list.head()); + if (op == NULL) { + // List empty, nothing left to do + break; + } + op->complete(); + } +} diff --git a/usb/device/utilities/OperationListBase.h b/usb/device/utilities/OperationListBase.h new file mode 100644 index 00000000000..c3f903f794e --- /dev/null +++ b/usb/device/utilities/OperationListBase.h @@ -0,0 +1,96 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_OPERATION_LIST_BASE_H +#define MBED_OPERATION_LIST_BASE_H + +#include "LinkedListBase.h" +#include "Mutex.h" + +class AsyncOp; + +class OperationListBase { +public: + + /** + * Create a new empty operation list + */ + OperationListBase(); + + /** + * Destroy this object and abort all operations + */ + ~OperationListBase(); + + /** + * Check if the list is empty + * + * @return true if the list is empty false otherwise + */ + bool empty(); + + /** + * Add an operation to the list + * + * If the list was empty then call process on this + * operation + * + * @param op Operation to add + */ + void add(AsyncOp *op); + + /** + * Remove an operation from the list + * + * If this was the head of the list then process the + * next element in the list. + * + * @param op Operation to remove + */ + void remove(AsyncOp *op); + + /** + * Dequeue the head of the list + * + * Remove the head of the operation list without completing it + * or processing the next element. The caller must call the + * AsnycOp::complete() function of the returned object. + * Additionally process() must be called on this object + * if there are still elements in the list. + * + * @return The async op at the head of the list + */ + AsyncOp *dequeue_raw(); + + /** + * Abort all operations + */ + void remove_all(); + + /** + * Process the operation list + * + * This allow the operation at the head of the list to perform processing + */ + void process(); + +private: + friend class AsyncOp; + + LinkedListBase _list; +}; + +#endif From d9eb243286aa26e36cefdceb4278648cbae8910e Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 7 May 2018 14:43:35 -0500 Subject: [PATCH 069/488] Update USBHID and USBCDC for new AsyncOp Update USB classes to use the new AsyncOp API. --- usb/device/USBHID/USBHID.cpp | 192 ++++++++++++------------ usb/device/USBHID/USBHID.h | 14 +- usb/device/USBSerial/USBCDC.cpp | 256 +++++++++++++++----------------- usb/device/USBSerial/USBCDC.h | 14 +- 4 files changed, 224 insertions(+), 252 deletions(-) diff --git a/usb/device/USBHID/USBHID.cpp b/usb/device/USBHID/USBHID.cpp index c1028d78b6a..8045459f161 100644 --- a/usb/device/USBHID/USBHID.cpp +++ b/usb/device/USBHID/USBHID.cpp @@ -21,24 +21,91 @@ class USBHID::AsyncSend: public AsyncOp { public: - AsyncSend(const HID_REPORT *report): AsyncOp(NULL), report(report), result(false) + AsyncSend(USBHID *hid, const HID_REPORT *report): hid(hid), report(report), result(false) { } + + ~AsyncSend() + { + + } + + virtual bool process() + { + if (!hid->configured()) { + result = false; + return true; + } + + if (hid->send_nb(report)) { + result = true; + return true; + } + + return false; + } + + USBHID *hid; const HID_REPORT *report; bool result; }; class USBHID::AsyncRead: public AsyncOp { public: - AsyncRead(HID_REPORT *report): AsyncOp(NULL), report(report), result(false) + AsyncRead(USBHID *hid, HID_REPORT *report): hid(hid), report(report), result(false) + { + + } + + ~AsyncRead() { } + + virtual bool process() + { + if (!hid->configured()) { + result = false; + return true; + } + + if (hid->read_nb(report)) { + result = true; + return true; + } + + return false; + } + + USBHID *hid; HID_REPORT *report; bool result; }; +class USBHID::AsyncWait: public AsyncOp { +public: + AsyncWait(USBHID *hid): hid(hid) + { + + } + + ~AsyncWait() + { + + } + + virtual bool process() + { + if (hid->configured()) { + return true; + } + + return false; + } + + USBHID *hid; +}; USBHID::USBHID(bool connect_blocking, uint8_t output_report_length, uint8_t input_report_length, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) : USBDevice(get_usb_phy(), vendor_id, product_id, product_release) @@ -88,15 +155,12 @@ void USBHID::wait_ready() { lock(); - AsyncOp wait_op(NULL); - wait_op.start(&_connect_list); - if (configured()) { - wait_op.complete(); - } + AsyncWait wait_op(this); + _connect_list.add(&wait_op); unlock(); - wait_op.wait(); + wait_op.wait(NULL); } @@ -104,23 +168,12 @@ bool USBHID::send(const HID_REPORT *report) { lock(); - if (!configured()) { - unlock(); - return false; - } - - if (send_nb(report)) { - unlock(); - return true; - } - - AsyncSend send_op(report); - send_op.start(&_send_list); + AsyncSend send_op(this, report); + _send_list.add(&send_op); unlock(); - send_op.wait(); - + send_op.wait(NULL); return send_op.result; } @@ -149,23 +202,12 @@ bool USBHID::read(HID_REPORT *report) { lock(); - if (!configured()) { - unlock(); - return false; - } - - if (read_nb(report)) { - unlock(); - return true; - } - - AsyncRead read_op(report); - read_op.start(&_read_list); + AsyncRead read_op(this, report); + _read_list.add(&read_op); unlock(); - read_op.wait(); - + read_op.wait(NULL); return read_op.result; } @@ -198,13 +240,8 @@ void USBHID::_send_isr(usb_ep_t endpoint) write_finish(_int_in); _send_idle = true; - AsyncSend *send_op = _send_list.head(); - if (send_op != NULL) { - if (send_nb(send_op->report)) { - send_op->result = true; - send_op->complete(); - } - } else { + _send_list.process(); + if (_send_idle) { report_tx(); } @@ -217,60 +254,12 @@ void USBHID::_read_isr(usb_ep_t endpoint) _output_report.length = read_finish(_int_out); _read_idle = true; - AsyncRead *read_op = _read_list.head(); - if (read_op != NULL) { - if (read_nb(read_op->report)) { - read_op->result = true; - read_op->complete(); - } - } else { + _read_list.process(); + if (_read_idle) { report_rx(); } } -void USBHID::_connect_wake_all() -{ - assert_locked(); - - AsyncOp *wait_op = _connect_list.head(); - while (wait_op != NULL) { - wait_op->complete(); - wait_op = _connect_list.head(); - } -} - -void USBHID::_send_abort_all() -{ - assert_locked(); - - if (!_send_idle) { - endpoint_abort(_int_in); - _send_idle = true; - } - AsyncSend *tx_cur = _send_list.head(); - while (tx_cur != NULL) { - tx_cur->result = false; - tx_cur->complete(); - tx_cur = _send_list.head(); - } -} - -void USBHID::_read_abort_all() -{ - assert_locked(); - - if (!_read_idle) { - endpoint_abort(_int_out); - _read_idle = true; - } - AsyncRead *rx_cur = _read_list.head(); - while (rx_cur != NULL) { - rx_cur->result = false; - rx_cur->complete(); - rx_cur = _read_list.head(); - } -} - uint16_t USBHID::report_desc_length() { report_desc(); @@ -280,12 +269,19 @@ uint16_t USBHID::report_desc_length() void USBHID::callback_state_change(DeviceState new_state) { - if (new_state == Configured) { - _connect_wake_all(); - } else { - _send_abort_all(); - _read_abort_all(); + if (new_state != Configured) { + if (!_send_idle) { + endpoint_abort(_int_in); + _send_idle = true; + } + if (!_read_idle) { + endpoint_abort(_int_out); + _read_idle = true; + } } + _send_list.process(); + _read_list.process(); + _connect_list.process(); } // diff --git a/usb/device/USBHID/USBHID.h b/usb/device/USBHID/USBHID.h index 015ad355063..2cd984a6613 100644 --- a/usb/device/USBHID/USBHID.h +++ b/usb/device/USBHID/USBHID.h @@ -22,8 +22,7 @@ #include "USBDevice.h" #include "USBHID_Types.h" -#include "AsyncOp.h" -#include "LinkedList.h" +#include "OperationList.h" @@ -249,17 +248,14 @@ class USBHID: public USBDevice { void _send_isr(usb_ep_t endpoint); void _read_isr(usb_ep_t endpoint); - void _connect_wake_all(); - void _send_abort_all(); - void _read_abort_all(); - class AsyncSend; class AsyncRead; + class AsyncWait; - LinkedList _connect_list; - LinkedList _send_list; + OperationList _connect_list; + OperationList _send_list; bool _send_idle; - LinkedList _read_list; + OperationList _read_list; bool _read_idle; uint8_t _configuration_descriptor[41]; diff --git a/usb/device/USBSerial/USBCDC.cpp b/usb/device/USBSerial/USBCDC.cpp index 4eff925deea..b03ae1df3f4 100644 --- a/usb/device/USBSerial/USBCDC.cpp +++ b/usb/device/USBSerial/USBCDC.cpp @@ -36,10 +36,39 @@ static const uint8_t cdc_line_coding_default[7] = {0x80, 0x25, 0x00, 0x00, 0x00, class USBCDC::AsyncWrite: public AsyncOp { public: - AsyncWrite(uint8_t *buf, uint32_t size): AsyncOp(NULL), tx_buf(buf), tx_size(size), result(false) + AsyncWrite(USBCDC *serial, uint8_t *buf, uint32_t size): + serial(serial), tx_buf(buf), tx_size(size), result(false) { } + + virtual ~AsyncWrite() + { + + } + + virtual bool process() + { + if (!serial->_terminal_connected) { + result = false; + return true; + } + + uint32_t actual_size = 0; + serial->send_nb(tx_buf, tx_size, &actual_size, true); + tx_size -= actual_size; + tx_buf += actual_size; + if (tx_size == 0) { + result = true; + return true; + } + + // Start transfer if it hasn't been + serial->_send_isr_start(); + return false; + } + + USBCDC *serial; uint8_t *tx_buf; uint32_t tx_size; bool result; @@ -47,11 +76,40 @@ class USBCDC::AsyncWrite: public AsyncOp { class USBCDC::AsyncRead: public AsyncOp { public: - AsyncRead(uint8_t *buf, uint32_t size, uint32_t *size_read, bool read_all) - : AsyncOp(NULL), rx_buf(buf), rx_size(size), rx_actual(size_read), all(read_all), result(false) + AsyncRead(USBCDC *serial, uint8_t *buf, uint32_t size, uint32_t *size_read, bool read_all) + : serial(serial), rx_buf(buf), rx_size(size), rx_actual(size_read), all(read_all), result(false) { } + + virtual ~AsyncRead() + { + + } + + virtual bool process() + { + if (!serial->_terminal_connected) { + result = false; + return true; + } + + uint32_t actual_size = 0; + serial->receive_nb(rx_buf, rx_size, &actual_size); + rx_buf += actual_size; + *rx_actual += actual_size; + rx_size -= actual_size; + if ((!all && *rx_actual > 0) || (rx_size == 0)) { + // Wake thread if request is done + result = true; + return true; + } + + serial->_receive_isr_start(); + return false; + } + + USBCDC *serial; uint8_t *rx_buf; uint32_t rx_size; uint32_t *rx_actual; @@ -59,6 +117,31 @@ class USBCDC::AsyncRead: public AsyncOp { bool result; }; +class USBCDC::AsyncWait: public AsyncOp { +public: + AsyncWait(USBCDC *serial) + : serial(serial) + { + + } + + virtual ~AsyncWait() + { + + } + + virtual bool process() + { + if (serial->_terminal_connected) { + return true; + } + + return false; + } + + USBCDC *serial; +}; + USBCDC::USBCDC(bool connect_blocking, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) : USBDevice(get_usb_phy(), vendor_id, product_id, product_release) @@ -230,13 +313,30 @@ void USBCDC::_change_terminal_connected(bool connected) { assert_locked(); - if (connected) { - _connect_wake_all(); - } else { - _send_abort_all(); - _receive_abort_all(); - } _terminal_connected = connected; + if (!_terminal_connected) { + // Abort TX + if (_tx_in_progress) { + endpoint_abort(_bulk_in); + _tx_in_progress = false; + } + _tx_buf = _tx_buffer; + _tx_size = 0; + _tx_list.process(); + MBED_ASSERT(_tx_list.empty()); + + // Abort RX + if (_rx_in_progress) { + endpoint_abort(_bulk_in); + _rx_in_progress = false; + } + _rx_buf = _rx_buffer; + _rx_size = 0; + _rx_list.process(); + MBED_ASSERT(_rx_list.empty()); + + } + _connected_list.process(); } bool USBCDC::ready() @@ -253,89 +353,27 @@ void USBCDC::wait_ready() { lock(); - AsyncOp wait_op(NULL); - wait_op.start(&_connected_list); - if (_terminal_connected) { - wait_op.complete(); - } + AsyncWait wait_op(this); + _connected_list.add(&wait_op); unlock(); - wait_op.wait(); -} - -void USBCDC::_connect_wake_all() -{ - AsyncOp *wait_op = _connected_list.head(); - while (wait_op != NULL) { - wait_op->complete(); - wait_op = _connected_list.head(); - } + wait_op.wait(NULL); } bool USBCDC::send(uint8_t *buffer, uint32_t size) { lock(); - if (!_terminal_connected) { - unlock(); - return false; - } - AsyncWrite write_op(buffer, size); - write_op.start(&_tx_list); - _send_next(); + AsyncWrite write_op(this, buffer, size); + _tx_list.add(&write_op); unlock(); - write_op.wait(); + write_op.wait(NULL); return write_op.result; } -void USBCDC::_send_next() -{ - assert_locked(); - - uint32_t actual_size; - do { - // Set current TX operation or return if there are none left - AsyncWrite *tx_cur = _tx_list.head(); - if (tx_cur == NULL) { - break; - } - - actual_size = 0; - send_nb(tx_cur->tx_buf, tx_cur->tx_size, &actual_size, false); - tx_cur->tx_size -= actual_size; - tx_cur->tx_buf += actual_size; - if (tx_cur->tx_size == 0) { - tx_cur->result = true; - tx_cur->complete(); - } - } while (actual_size > 0); - - // Start transfer if it hasn't been - _send_isr_start(); -} - -void USBCDC::_send_abort_all() -{ - assert_locked(); - - if (_tx_in_progress) { - endpoint_abort(_bulk_in); - _tx_in_progress = false; - } - _tx_buf = _tx_buffer; - _tx_size = 0; - - AsyncWrite *tx_cur = _tx_list.head(); - while (tx_cur != NULL) { - tx_cur->result = false; - tx_cur->complete(); - tx_cur = _tx_list.head(); - } -} - void USBCDC::send_nb(uint8_t *buffer, uint32_t size, uint32_t *actual, bool now) { lock(); @@ -357,7 +395,6 @@ void USBCDC::send_nb(uint8_t *buffer, uint32_t size, uint32_t *actual, bool now) unlock(); } - void USBCDC::_send_isr_start() { assert_locked(); @@ -382,7 +419,7 @@ void USBCDC::_send_isr(usb_ep_t endpoint) _tx_size = 0; _tx_in_progress = false; - _send_next(); + _tx_list.process(); if (!_tx_in_progress) { data_tx(); } @@ -392,72 +429,19 @@ bool USBCDC::receive(uint8_t *buffer, uint32_t size, uint32_t *size_read) { lock(); - if (!_terminal_connected) { - unlock(); - return false; - } bool read_all = size_read == NULL; uint32_t size_read_dummy; uint32_t *size_read_ptr = read_all ? &size_read_dummy : size_read; *size_read_ptr = 0; - AsyncRead read_op(buffer, size, size_read_ptr, read_all); - read_op.start(&_rx_list); - _receive_next(); + AsyncRead read_op(this, buffer, size, size_read_ptr, read_all); + _rx_list.add(&read_op); unlock(); - read_op.wait(); + read_op.wait(NULL); return read_op.result; } -void USBCDC::_receive_next() -{ - assert_locked(); - - uint32_t actual_size; - do { - // Set current RX operation or return if there are none left - AsyncRead *rx_cur = _rx_list.head(); - if (rx_cur == NULL) { - break; - } - - actual_size = 0; - receive_nb(rx_cur->rx_buf, rx_cur->rx_size, &actual_size); - rx_cur->rx_buf += actual_size; - *rx_cur->rx_actual += actual_size; - rx_cur->rx_size -= actual_size; - if ((!rx_cur->all && *rx_cur->rx_actual > 0) || (rx_cur->rx_size == 0)) { - // Wake thread if request is done - rx_cur->result = true; - rx_cur->complete(); - rx_cur = NULL; - } - } while (actual_size > 0); - - _receive_isr_start(); - -} - -void USBCDC::_receive_abort_all() -{ - assert_locked(); - - if (_rx_in_progress) { - endpoint_abort(_bulk_in); - _rx_in_progress = false; - } - _rx_buf = _rx_buffer; - _rx_size = 0; - - AsyncRead *rx_cur = _rx_list.head(); - while (rx_cur != NULL) { - rx_cur->result = false; - rx_cur->complete(); - rx_cur = _rx_list.head(); - } -} - void USBCDC::receive_nb(uint8_t *buffer, uint32_t size, uint32_t *size_read) { @@ -496,7 +480,7 @@ void USBCDC::_receive_isr(usb_ep_t endpoint) _rx_buf = _rx_buffer; _rx_size = read_finish(_bulk_out); _rx_in_progress = false; - _receive_next(); + _rx_list.process(); if (!_rx_in_progress) { data_rx(); } diff --git a/usb/device/USBSerial/USBCDC.h b/usb/device/USBSerial/USBCDC.h index 726ffb4419e..fd00f227c7a 100644 --- a/usb/device/USBSerial/USBCDC.h +++ b/usb/device/USBSerial/USBCDC.h @@ -22,7 +22,7 @@ #include "USBDevice_Types.h" #include "USBDevice.h" -#include "LinkedList.h" +#include "OperationList.h" class AsyncOp; @@ -180,6 +180,7 @@ class USBCDC: public USBDevice { class AsyncWrite; class AsyncRead; + class AsyncWait; virtual void callback_reset(); virtual void callback_state_change(DeviceState new_state); @@ -191,15 +192,10 @@ class USBCDC: public USBDevice { void _init(); void _change_terminal_connected(bool connected); - void _connect_wake_all(); - void _send_next(); - void _send_abort_all(); void _send_isr_start(); void _send_isr(usb_ep_t endpoint); - void _receive_next(); - void _receive_abort_all(); void _receive_isr_start(); void _receive_isr(usb_ep_t endpoint); @@ -211,16 +207,16 @@ class USBCDC: public USBDevice { uint8_t _cdc_new_line_coding[7]; uint8_t _config_descriptor[75]; - LinkedList _connected_list; + OperationList _connected_list; bool _terminal_connected; - LinkedList _tx_list; + OperationList _tx_list; bool _tx_in_progress; uint8_t _tx_buffer[64]; uint8_t *_tx_buf; uint32_t _tx_size; - LinkedList _rx_list; + OperationList _rx_list; bool _rx_in_progress; uint8_t _rx_buffer[64]; uint8_t *_rx_buf; From b1a362ca83db833c50e70601e3499e93622ab0ab Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 10 May 2018 22:39:39 -0500 Subject: [PATCH 070/488] Require USB classes to implement descriptor Make the function configuration_desc pure virtual inside USBDevice. This should be a compile time error since no subclass will work without a configuration descriptor. --- usb/device/USBDevice/USBDevice.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index a1b491574b3..40051ce9c08 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -267,10 +267,7 @@ class USBDevice: public USBPhyEvents { * @param index descriptor index * @returns pointer to the configuration descriptor */ - virtual const uint8_t *configuration_desc(uint8_t index) - { - return NULL; - }; + virtual const uint8_t *configuration_desc(uint8_t index) = 0; /* * Get string lang id descriptor From c6895e0df618f431495ec6991da54d35b6a216be Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 10 May 2018 22:39:50 -0500 Subject: [PATCH 071/488] Update the USBMIDI class Update the USB class USBMIDI from the unsupported folder. --- usb/device/USBMIDI/MIDIMessage.h | 474 +++++++++++++++++++++++++++++++ usb/device/USBMIDI/USBMIDI.cpp | 397 ++++++++++++++++++++++++++ usb/device/USBMIDI/USBMIDI.h | 184 ++++++++++++ 3 files changed, 1055 insertions(+) create mode 100644 usb/device/USBMIDI/MIDIMessage.h create mode 100644 usb/device/USBMIDI/USBMIDI.cpp create mode 100644 usb/device/USBMIDI/USBMIDI.h diff --git a/usb/device/USBMIDI/MIDIMessage.h b/usb/device/USBMIDI/MIDIMessage.h new file mode 100644 index 00000000000..ff16226a9d6 --- /dev/null +++ b/usb/device/USBMIDI/MIDIMessage.h @@ -0,0 +1,474 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MIDIMESSAGE_H +#define MIDIMESSAGE_H + +#include "mbed.h" + +#define MAX_MIDI_MESSAGE_SIZE 256 // Max message size. SysEx can be up to 65536 but 256 should be fine for most usage + +// MIDI Message Format +// +// [ msg(4) | channel(4) ] [ 0 | n(7) ] [ 0 | m(7) ] +// +// MIDI Data Messages (Channel Specific) +// +// Message msg n m +// --------------------------------------------- +// Note Off 0x8 Key Velocity +// Note On 0x9 Key Velocity +// Polyphonic Aftertouch 0xA Key Pressure +// Control Change 0xB Controller Value +// Program Change 0xC Program - +// Channel Aftertouch 0xD Pressure - +// Pitch Wheel 0xE LSB MSB + +#define CABLE_NUM (0<<4) + +/** A MIDI message container */ +class MIDIMessage { +public: + + MIDIMessage() : data(new uint8_t[MAX_MIDI_MESSAGE_SIZE + 1]), length(0) {} + + MIDIMessage(uint8_t *buf) : data(new uint8_t[MAX_MIDI_MESSAGE_SIZE + 1]), length(0) + { + for (int i = 0; i < 4; i++) { + data[i] = buf[i]; + } + } + + /** + * Copy constructor + */ + MIDIMessage(const MIDIMessage &other) + { + *this = other; + } + + /** + * Assignment operator + */ + MIDIMessage &operator=(const MIDIMessage &other) + { + length = other.length; + for (int i = 0; i < length; i++) { + data[i] = other.data[i]; + } + + return *this; + } + + ~MIDIMessage() + { + delete[] data; + } + + /** + * Set this MIDIMessage to a raw MIDI message + * + * @param buf is a true MIDI message (not USBMidi message) + * @param buf_len size of message + */ + void from_raw(uint8_t *buf, int buf_len) + { + length = buf_len + 1; + if (length > MAX_MIDI_MESSAGE_SIZE) { + // Message is too big + length = 0; + return; + } + + // first byte keeped for retro-compatibility + data[0] = CABLE_NUM | 0x08; + + for (int i = 0; i < buf_len; i++) { + data[i + 1] = buf[i]; + } + } + + // create messages + + /** Create a NoteOff message + * @param key Key ID + * @param velocity Key velocity (0-127, default = 127) + * @param channel Key channel (0-15, default 0) + * @returns A MIDIMessage + */ + static MIDIMessage NoteOff(int key, int velocity = 127, int channel = 0) + { + MIDIMessage msg; + msg.data[0] = CABLE_NUM | 0x08; + msg.data[1] = 0x80 | (channel & 0x0F); + msg.data[2] = key & 0x7F; + msg.data[3] = velocity & 0x7F; + msg.length = 4; + return msg; + } + + /** Create a NoteOn message + * @param key Key ID + * @param velocity Key velocity (0-127, default = 127) + * @param channel Key channel (0-15, default 0) + * @returns A MIDIMessage + */ + static MIDIMessage NoteOn(int key, int velocity = 127, int channel = 0) + { + MIDIMessage msg; + msg.data[0] = CABLE_NUM | 0x09; + msg.data[1] = 0x90 | (channel & 0x0F); + msg.data[2] = key & 0x7F; + msg.data[3] = velocity & 0x7F; + msg.length = 4; + return msg; + } + + /** Create a PolyPhonic Aftertouch message + * @param key Key ID + * @param pressure Aftertouch pressure (0-127) + * @param channel Key channel (0-15, default 0) + * @returns A MIDIMessage + */ + static MIDIMessage PolyphonicAftertouch(int key, int pressure, int channel = 0) + { + MIDIMessage msg; + msg.data[0] = CABLE_NUM | 0x0A; + msg.data[1] = 0xA0 | (channel & 0x0F); + msg.data[2] = key & 0x7F; + msg.data[3] = pressure & 0x7F; + msg.length = 4; + return msg; + } + + /** Create a Control Change message + * @param control Controller ID + * @param value Controller value (0-127) + * @param channel Controller channel (0-15, default 0) + * @returns A MIDIMessage + */ + static MIDIMessage ControlChange(int control, int value, int channel = 0) + { + MIDIMessage msg; + msg.data[0] = CABLE_NUM | 0x0B; + msg.data[1] = 0xB0 | (channel & 0x0F); + msg.data[2] = control & 0x7F; + msg.data[3] = value & 0x7F; + msg.length = 4; + return msg; + } + + /** Create a Program Change message + * @param program Program ID + * @param channel Channel (0-15, default 0) + * @returns A MIDIMessage + */ + static MIDIMessage ProgramChange(int program, int channel = 0) + { + MIDIMessage msg; + msg.data[0] = CABLE_NUM | 0x0C; + msg.data[1] = 0xC0 | (channel & 0x0F); + msg.data[2] = program & 0x7F; + msg.data[3] = 0x00; + msg.length = 4; + return msg; + } + + /** Create a Channel Aftertouch message + * @param pressure Pressure + * @param channel Key channel (0-15, default 0) + * @returns A MIDIMessage + */ + static MIDIMessage ChannelAftertouch(int pressure, int channel = 0) + { + MIDIMessage msg; + msg.data[0] = CABLE_NUM | 0x0D; + msg.data[1] = 0xD0 | (channel & 0x0F); + msg.data[2] = pressure & 0x7F; + msg.data[3] = 0x00; + msg.length = 4; + return msg; + } + + /** Create a Pitch Wheel message + * @param pitch Pitch (-8192 - 8191, default = 0) + * @param channel Channel (0-15, default 0) + * @returns A MIDIMessage + */ + static MIDIMessage PitchWheel(int pitch = 0, int channel = 0) + { + MIDIMessage msg; + int p = pitch + 8192; // 0 - 16383, 8192 is center + msg.data[0] = CABLE_NUM | 0x0E; + msg.data[1] = 0xE0 | (channel & 0x0F); + msg.data[2] = p & 0x7F; + msg.data[3] = (p >> 7) & 0x7F; + msg.length = 4; + return msg; + } + + /** Create an All Notes Off message + * @param channel Channel (0-15, default 0) + * @returns A MIDIMessage + */ + static MIDIMessage AllNotesOff(int channel = 0) + { + return ControlChange(123, 0, channel); + } + + /** Create a SysEx message + * @param data SysEx data (including 0xF0 .. 0xF7) + * @param len SysEx data length + * @returns A MIDIMessage + */ + static MIDIMessage SysEx(uint8_t *data, int len) + { + MIDIMessage msg; + msg.from_raw(data, len); + return msg; + } + + // decode messages + + /** MIDI Message Types */ + enum MIDIMessageType { + ErrorType, + NoteOffType, + NoteOnType, + PolyphonicAftertouchType, + ControlChangeType, + ProgramChangeType, + ChannelAftertouchType, + PitchWheelType, + ResetAllControllersType, + AllNotesOffType, + SysExType + }; + + /** Read the message type + * + * @returns MIDIMessageType + */ + MIDIMessageType type() + { + MIDIMessageType message_type; + uint8_t min_size; + switch ((data[1] >> 4) & 0xF) { + case 0x8: + // message, channel + // key + // velocity + min_size = 3; + message_type = NoteOffType; + break; + case 0x9: + // message, channel + // key + // velocity + min_size = 3; + message_type = NoteOnType; + break; + case 0xA: + // message, channel + // key + // pressure + min_size = 3; + message_type = PolyphonicAftertouchType; + break; + case 0xB: + // message, channel + // controller + min_size = 2; + if ((data[2] & 0x7F) < 120) { // standard controllers + message_type = ControlChangeType; + } else if ((data[2] & 0x7F) == 121) { + message_type = ResetAllControllersType; + } else if ((data[2] & 0x7F) == 123) { + message_type = AllNotesOffType; + } else { + message_type = ErrorType; // unsupported atm + } + break; + case 0xC: + // message, channel + // program + min_size = 2; + message_type = ProgramChangeType; + break; + case 0xD: + // message, channel + // pressure + min_size = 2; + message_type = ChannelAftertouchType; + break; + case 0xE: + // message, channel + // pitch lsb + // pitch msb + min_size = 3; + message_type = PitchWheelType; + break; + case 0xF: + min_size = 2; + message_type = SysExType; + break; + default: + message_type = ErrorType; + break; + } + + + if (length < min_size) { + // too small to be a valid message + message_type = ErrorType; + } + return message_type; + } + + /** + * Read the channel number + * + * @return channel number or -1 on error + */ + + int channel() + { + return (data[1] & 0x0F); + } + + /** + * Read the key ID + * + * @return key ID or -1 on error + */ + int key() + { + MIDIMessageType msg_type = type(); + if ((msg_type != NoteOffType) && + (msg_type != NoteOnType) && + (msg_type != PolyphonicAftertouchType)) { + return -1; + } + + return data[2] & 0x7F; + } + + /** + * Read the velocity + * + * @return velocity or -1 on error + */ + int velocity() + { + MIDIMessageType msg_type = type(); + if ((msg_type != NoteOffType) && + (msg_type != NoteOnType)) { + return -1; + } + + return data[3] & 0x7F; + } + + /** + * Read the controller value + * + * @return controller value or -1 on error + */ + int value() + { + MIDIMessageType msg_type = type(); + if ((msg_type != ControlChangeType) && + (msg_type != ResetAllControllersType) && + (msg_type != AllNotesOffType)) { + return -1; + } + + return data[3] & 0x7F; + } + + /** + * Read the aftertouch pressure + * + * @return aftertouch pressure or -1 on error + */ + int pressure() + { + MIDIMessageType msg_type = type(); + if ((msg_type != PolyphonicAftertouchType) && + (msg_type != ChannelAftertouchType)) { + return -1; + } + + if (type() == PolyphonicAftertouchType) { + return data[3] & 0x7F; + } else { + return data[2] & 0x7F; + } + } + + /** + * Read the controller number + * + * @return controller number or -1 on error + */ + int controller() + { + MIDIMessageType msg_type = type(); + if ((msg_type != ControlChangeType) && + (msg_type != ResetAllControllersType) && + (msg_type != AllNotesOffType)) { + return -1; + } + + return data[2] & 0x7F; + } + + /** + * Read the program number + * + * @return program number or -1 on error + */ + int program() + { + MIDIMessageType msg_type = type(); + if (msg_type != ProgramChangeType) { + return -1; + } + + return data[2] & 0x7F; + } + + /** + * Read the pitch value + * + * @return pitch value or -1 on error + */ + int pitch() + { + MIDIMessageType msg_type = type(); + if (msg_type != PitchWheelType) { + return -1; + } + + int p = ((data[3] & 0x7F) << 7) | (data[2] & 0x7F); + return p - 8192; // 0 - 16383, 8192 is center + } + + uint8_t *data; + uint16_t length; +}; + +#endif diff --git a/usb/device/USBMIDI/USBMIDI.cpp b/usb/device/USBMIDI/USBMIDI.cpp new file mode 100644 index 00000000000..4fb902c5ebd --- /dev/null +++ b/usb/device/USBMIDI/USBMIDI.cpp @@ -0,0 +1,397 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBMIDI.h" +#include "EndpointResolver.h" +#include "usb_phy_api.h" + +#define FLAG_WRITE_DONE (1 << 0) +#define FLAG_DISCONNECT (1 << 1) +#define FLAG_CONNECT (1 << 2) + +USBMIDI::USBMIDI(bool connect_blocking, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) + : USBDevice(get_usb_phy(), vendor_id, product_id, product_release) +{ + _init(); + + if (connect_blocking) { + USBDevice::connect(); + wait_ready(); + } else { + init(); + } +} + +USBMIDI::USBMIDI(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) + : USBDevice(phy, vendor_id, product_id, product_release) +{ + _init(); + + // User or child responsible for calling connect or init +} + +USBMIDI::~USBMIDI() +{ + deinit(); +} + +void USBMIDI::_init() +{ + _bulk_buf_pos = 0; + _bulk_buf_size = 0; + + _data_ready = false; + _cur_data = 0; + + EndpointResolver resolver(endpoint_table()); + + resolver.endpoint_ctrl(64); + _bulk_in = resolver.endpoint_in(USB_EP_TYPE_BULK, MaxSize); + _bulk_out = resolver.endpoint_out(USB_EP_TYPE_BULK, MaxSize); + MBED_ASSERT(resolver.valid()); +} + +bool USBMIDI::ready() +{ + return _flags.get() & FLAG_CONNECT ? true : false; +} + +void USBMIDI::wait_ready() +{ + _flags.wait_any(FLAG_CONNECT, osWaitForever, false); +} + +// write plain MIDIMessage that will be converted to USBMidi event packet +bool USBMIDI::write(MIDIMessage m) +{ + _write_mutex.lock(); + + bool ret = true; + // first byte keeped for retro-compatibility + for (int p = 1; p < m.length; p += 3) { + uint8_t buf[4]; + // Midi message to USBMidi event packet + buf[0] = m.data[1] >> 4; + // SysEx + if (buf[0] == 0xF) { + if ((m.length - p) > 3) { + // SysEx start or continue + buf[0] = 0x4; + } else { + switch (m.length - p) { + case 1: + // SysEx end with one byte + buf[0] = 0x5; + break; + case 2: + // SysEx end with two bytes + buf[0] = 0x6; + break; + case 3: + // SysEx end with three bytes + buf[0] = 0x7; + break; + } + } + } + buf[1] = m.data[p]; + + if (p + 1 < m.length) { + buf[2] = m.data[p + 1]; + } else { + buf[2] = 0; + } + + if (p + 2 < m.length) { + buf[3] = m.data[p + 2]; + } else { + buf[3] = 0; + } + + _flags.clear(FLAG_WRITE_DONE); + USBDevice::write_start(_bulk_in, buf, 4); + uint32_t flags = _flags.wait_any(FLAG_WRITE_DONE | FLAG_DISCONNECT, osWaitForever, false); + if (flags & FLAG_DISCONNECT) { + ret = false; + break; + } + USBDevice::write_finish(_bulk_in); + } + + _write_mutex.unlock(); + return ret; +} + +bool USBMIDI::readable() +{ + lock(); + + bool ret = _data_ready; + + unlock(); + + return ret; +} + +bool USBMIDI::read(MIDIMessage *m) +{ + lock(); + + // Invalidate message + m->length = 0; + + if (!_data_ready) { + unlock(); + return false; + } + + m->from_raw(_data, _cur_data); + _cur_data = 0; + _next_message(); + + if (!_data_ready) { + read_start(_bulk_out, _bulk_buf, MaxSize); + } + + unlock(); + + return true; +} + +void USBMIDI::attach(Callback callback) +{ + lock(); + + _callback = callback; + + unlock(); +} + +void USBMIDI::callback_state_change(DeviceState new_state) +{ + assert_locked(); + + if (new_state == Configured) { + _flags.set(FLAG_CONNECT); + _flags.clear(FLAG_DISCONNECT); + } else { + _flags.set(FLAG_DISCONNECT); + _flags.clear(FLAG_CONNECT | FLAG_WRITE_DONE); + } +} + +void USBMIDI::callback_request(const setup_packet_t *setup) +{ + assert_locked(); + + RequestResult result = PassThrough; + uint8_t *data = NULL; + uint32_t size = 0; + + complete_request(result, data, size); +} + +void USBMIDI::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) +{ + assert_locked(); + + complete_request_xfer_done(false); +} + +void USBMIDI::callback_set_configuration(uint8_t configuration) +{ + assert_locked(); + + if (configuration == DEFAULT_CONFIGURATION) { + complete_set_configuration(false); + } + + endpoint_remove_all(); + endpoint_add(_bulk_in, MaxSize, USB_EP_TYPE_BULK, &USBMIDI::_in_callback); + endpoint_add(_bulk_out, MaxSize, USB_EP_TYPE_BULK, &USBMIDI::_out_callback); + + read_start(_bulk_out, _bulk_buf, MaxSize); + + complete_set_configuration(true); +} + +void USBMIDI::callback_set_interface(uint16_t interface, uint8_t alternate) +{ + assert_locked(); + + complete_set_interface(true); +} + +const uint8_t *USBMIDI::string_iinterface_desc() +{ + static const uint8_t string_iinterface_descriptor[] = { + 0x0c, //bLength + STRING_DESCRIPTOR, //bDescriptorType 0x03 + 'A', 0, 'u', 0, 'd', 0, 'i', 0, 'o', 0 //bString iInterface - Audio + }; + return string_iinterface_descriptor; +} + +const uint8_t *USBMIDI::string_iproduct_desc() +{ + static const uint8_t string_iproduct_descriptor[] = { + 0x16, //bLength + STRING_DESCRIPTOR, //bDescriptorType 0x03 + 'M', 0, 'b', 0, 'e', 0, 'd', 0, ' ', 0, 'A', 0, 'u', 0, 'd', 0, 'i', 0, 'o', 0 //bString iProduct - Mbed Audio + }; + return string_iproduct_descriptor; +} + +const uint8_t *USBMIDI::configuration_desc(uint8_t index) +{ + if (index != 0) { + return NULL; + } + + uint8_t config_descriptor_temp[] = { + // configuration descriptor + 0x09, 0x02, 0x65, 0x00, 0x02, 0x01, 0x00, 0xc0, 0x50, + + // The Audio Interface Collection + 0x09, 0x04, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, // Standard AC Interface Descriptor + 0x09, 0x24, 0x01, 0x00, 0x01, 0x09, 0x00, 0x01, 0x01, // Class-specific AC Interface Descriptor + 0x09, 0x04, 0x01, 0x00, 0x02, 0x01, 0x03, 0x00, 0x00, // MIDIStreaming Interface Descriptors + 0x07, 0x24, 0x01, 0x00, 0x01, 0x41, 0x00, // Class-Specific MS Interface Header Descriptor + + // MIDI IN JACKS + 0x06, 0x24, 0x02, 0x01, 0x01, 0x00, + 0x06, 0x24, 0x02, 0x02, 0x02, 0x00, + + // MIDI OUT JACKS + 0x09, 0x24, 0x03, 0x01, 0x03, 0x01, 0x02, 0x01, 0x00, + 0x09, 0x24, 0x03, 0x02, 0x06, 0x01, 0x01, 0x01, 0x00, + + // OUT endpoint - Standard MS Bulk Data Endpoint Descriptor + 0x09, // bLength + 0x05, // bDescriptorType + _bulk_out, // bEndpointAddress + 0x02, // bmAttributes + 0x40, // wMaxPacketSize (LSB) + 0x00, // wMaxPacketSize (MSB) + 0x00, // bInterval (milliseconds) + 0x00, // bRefresh + 0x00, // bSynchAddress + + 0x05, 0x25, 0x01, 0x01, 0x01, + + // IN endpoint - Standard MS Bulk Data Endpoint Descriptor + 0x09, // bLength + 0x05, // bDescriptorType + _bulk_in, // bEndpointAddress + 0x02, // bmAttributes + 0x40, // wMaxPacketSize (LSB) + 0x00, // wMaxPacketSize (MSB) + 0x00, // bInterval (milliseconds) + 0x00, // bRefresh + 0x00, // bSynchAddress + + 0x05, 0x25, 0x01, 0x01, 0x03, + }; + MBED_ASSERT(sizeof(config_descriptor_temp) == sizeof(_config_descriptor)); + memcpy(_config_descriptor, config_descriptor_temp, sizeof(config_descriptor_temp)); + return _config_descriptor; +} + +void USBMIDI::_in_callback(usb_ep_t ep) +{ + assert_locked(); + + _flags.set(FLAG_WRITE_DONE); +} + +void USBMIDI::_out_callback(usb_ep_t ep) +{ + assert_locked(); + + _bulk_buf_size = read_finish(_bulk_out); + _bulk_buf_pos = 0; + + if (_callback && _next_message()) { + _callback(); + return; + } + + read_start(_bulk_out, _bulk_buf, MaxSize); +} + +bool USBMIDI::_next_message() +{ + assert_locked(); + + bool data_ready = false; + while (_bulk_buf_pos < _bulk_buf_size) { + uint8_t data_read; + bool data_end = true; + switch (_bulk_buf[_bulk_buf_pos]) { + case 0x2: + // Two-bytes System Common Message - undefined in USBMidi 1.0 + data_read = 2; + break; + case 0x4: + // SysEx start or continue + data_end = false; + data_read = 3; + break; + case 0x5: + // Single-byte System Common Message or SysEx end with one byte + data_read = 1; + break; + case 0x6: + // SysEx end with two bytes + data_read = 2; + break; + case 0xC: + // Program change + data_read = 2; + break; + case 0xD: + // Channel pressure + data_read = 2; + break; + case 0xF: + // Single byte + data_read = 1; + break; + default: + // Others three-bytes messages + data_read = 3; + break; + } + + for (uint8_t j = 1; j < data_read + 1; j++) { + if (_cur_data < sizeof(_data)) { + _data[_cur_data] = _bulk_buf[_bulk_buf_pos + j]; + } + _cur_data++; + } + _bulk_buf_pos += 4; + + if (data_end) { + // Message is ready to be read + data_ready = true; + break; + } + } + + _data_ready = data_ready; + return data_ready; +} diff --git a/usb/device/USBMIDI/USBMIDI.h b/usb/device/USBMIDI/USBMIDI.h new file mode 100644 index 00000000000..c1d968d6192 --- /dev/null +++ b/usb/device/USBMIDI/USBMIDI.h @@ -0,0 +1,184 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBMIDI_H +#define USBMIDI_H + +/* These headers are included for child class. */ +#include "USBDescriptor.h" +#include "USBDevice_Types.h" + +#include "USBDevice.h" +#include "MIDIMessage.h" +#include "EventFlags.h" +#include "Mutex.h" +#include "Callback.h" + +#define DEFAULT_CONFIGURATION (1) + +/** +* USBMIDI example +* +* @code +* #include "mbed.h" +* #include "USBMIDI.h" +* +* USBMIDI midi; +* +* int main() { +* while (1) { +* for(int i=48; i<83; i++) { // send some messages! +* midi.write(MIDIMessage::NoteOn(i)); +* wait(0.25); +* midi.write(MIDIMessage::NoteOff(i)); +* wait(0.5); +* } +* } +* } +* @endcode +*/ +class USBMIDI: public USBDevice { +public: + + /** + * Basic constructor + * + * Construct this object optionally connecting and blocking until it is ready. + * + * @note Do not use this constructor in derived classes. + * + * @param connect_blocking true to perform a blocking connect, false to start in a disconnected state + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBMIDI(bool connect_blocking = true, uint16_t vendor_id = 0x0700, uint16_t product_id = 0x0101, uint16_t product_release = 0x0001); + + /** + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. + * + * @param phy USB phy to use + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBMIDI(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ + virtual ~USBMIDI(); + + /** + * Check if this class is ready + * + * @return true if configured, false otherwise + */ + bool ready(); + + /** + * Block until this device is configured + */ + void wait_ready(); + + /** + * Send a MIDIMessage + * + * @param m The MIDIMessage to send + * @return true if the message was sent, false otherwise + */ + bool write(MIDIMessage m); + + /** + * Check if a message can be read + * + * @return true if a packet can be read false otherwise + * @note USBMIDI::attach must be called to enable the receiver + */ + bool readable(); + + /** + * Read a message + * + * @param m The MIDIMessage to fill + * @return true if a message was read, false otherwise + */ + bool read(MIDIMessage *m); + + /** + * Attach a callback for when a MIDIEvent is received + * + * @param callback code to call when a packet is received + */ + void attach(Callback callback); + + +protected: + + virtual void callback_state_change(DeviceState new_state); + + virtual void callback_request(const setup_packet_t *setup); + + virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); + + virtual void callback_set_configuration(uint8_t configuration); + + virtual void callback_set_interface(uint16_t interface, uint8_t alternate); + + virtual const uint8_t *string_iproduct_desc(); + + virtual const uint8_t *string_iinterface_desc(); + + virtual const uint8_t *configuration_desc(uint8_t index); + +private: + static const uint32_t MaxSize = 64; + + uint8_t _bulk_buf[MaxSize]; + uint32_t _bulk_buf_pos; + uint32_t _bulk_buf_size; + + bool _data_ready; + uint8_t _data[MAX_MIDI_MESSAGE_SIZE + 1]; + uint32_t _cur_data; + + rtos::EventFlags _flags; + rtos::Mutex _write_mutex; + + usb_ep_t _bulk_in; + usb_ep_t _bulk_out; + uint8_t _config_descriptor[0x65]; + + Callback _callback; + + void _init(); + void _in_callback(usb_ep_t); + void _out_callback(usb_ep_t); + bool _next_message(); +}; + +#endif From 4fe8f9b96602b7de3acfc86177b62a3c5ccbd6a8 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sun, 27 May 2018 16:44:00 -0500 Subject: [PATCH 072/488] Add default values to USBCDC constructor Add reasonable defaults to the USBCDC constructor so it is easier to use. --- usb/device/USBSerial/USBCDC.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/usb/device/USBSerial/USBCDC.h b/usb/device/USBSerial/USBCDC.h index fd00f227c7a..bc281550e46 100644 --- a/usb/device/USBSerial/USBCDC.h +++ b/usb/device/USBSerial/USBCDC.h @@ -41,7 +41,7 @@ class USBCDC: public USBDevice { * @param product_id Your product_id * @param product_release Your product_release */ - USBCDC(bool connect_blocking, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); + USBCDC(bool connect_blocking=true, uint16_t vendor_id=0x1f00, uint16_t product_id=0x2012, uint16_t product_release=0x0001); /** * Fully featured constructor From d62b1ccbf4147fcf1d809f8a880f2f145f325cf5 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 15 May 2018 18:41:33 -0500 Subject: [PATCH 073/488] Fix LPC1768 test failures Reset endpoints when they are removed. This ensures buffers and the data toggle bit get reset back to zero. --- usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp b/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp index d962235961a..2192bec7317 100644 --- a/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp +++ b/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp @@ -583,6 +583,9 @@ void USBPhyHw::endpoint_remove(usb_ep_t endpoint) disableEndpointEvent(endpoint); + // reset this endpoint, including data toggle + SIEsetEndpointStatus(endpoint, 0); + LPC_USB->USBDevIntClr = EP_RLZED; LPC_USB->USBReEp &= ~EP(endpoint); From d610659c410a3245688e5eed88b64c88fd146fbd Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 15 May 2018 19:32:48 -0500 Subject: [PATCH 074/488] Implement LPC1768 USB abort function Implement the USB abort function so interrupts wont fire for a transfer that has been aborted. The transfer may still take place but the buffer passed into endpoint_write or endpoint_read will not be used. --- .../targets/TARGET_NXP/USBHAL_LPC17.cpp | 86 ++++++++++++------- 1 file changed, 56 insertions(+), 30 deletions(-) diff --git a/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp b/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp index 2192bec7317..58c264a5e4a 100644 --- a/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp +++ b/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp @@ -120,7 +120,7 @@ static USBPhyHw *instance; -static volatile int epComplete; +static uint32_t opStarted; static void SIECommand(uint32_t command) { @@ -250,16 +250,24 @@ static uint8_t selectEndpointClearInterrupt(uint8_t endpoint) static void enableEndpointEvent(uint8_t endpoint) { - // Enable an endpoint interrupt + // Route endpoint events to USBEpIntSt so they trigger an interrupt LPC_USB->USBEpIntEn |= EP(endpoint); } +// Do not use disableEndpointEvent. If an endpoint's event is disabled +// and a transfer occurs on that endpoint then that endpoint will enter +// a bad state. Future transfers on that endpoint will not trigger an +// interrupt even if the endpoint event is enabled again or the +// endpoint is reinitialized +/* static void disableEndpointEvent(uint8_t endpoint) __attribute__((unused)); static void disableEndpointEvent(uint8_t endpoint) { - // Disable an endpoint interrupt + // Don't set endpoint interrupt to pending in USBEpIntSt when an event occurs. + // Instead route them to USBDMARSt so they can be ignored. LPC_USB->USBEpIntEn &= ~EP(endpoint); } +*/ static uint32_t endpointReadcore(uint8_t endpoint, uint8_t *buffer, uint32_t size) @@ -392,10 +400,18 @@ void USBPhyHw::init(USBPhyEvents *events) // Connect must be low for at least 2.5uS wait(0.3); + // Disable control endpoints + SIEsetEndpointStatus(EP0IN, SIE_SES_DA); + SIEsetEndpointStatus(EP0OUT, SIE_SES_DA); + // Set the maximum packet size for the control endpoints endpoint_add(EP0IN, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); endpoint_add(EP0OUT, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); + // Map interrupts to USBEpIntSt + enableEndpointEvent(EP0IN); + enableEndpointEvent(EP0OUT); + // Attach IRQ instance = this; NVIC_SetVector(USB_IRQn, (uint32_t)&_usbisr); @@ -413,6 +429,7 @@ void USBPhyHw::deinit() // Disable USB interrupts NVIC_DisableIRQ(USB_IRQn); events = NULL; + opStarted = 0; } bool USBPhyHw::powered() @@ -422,8 +439,9 @@ bool USBPhyHw::powered() void USBPhyHw::connect(void) { - enableEndpointEvent(EP0IN); - enableEndpointEvent(EP0OUT); + // Enable control endpoints + SIEsetEndpointStatus(EP0IN, 0); + SIEsetEndpointStatus(EP0OUT, 0); // Connect USB device SIEconnect(); @@ -431,8 +449,9 @@ void USBPhyHw::connect(void) void USBPhyHw::disconnect(void) { - disableEndpointEvent(EP0IN); - disableEndpointEvent(EP0OUT); + // Disable control endpoints + SIEsetEndpointStatus(EP0IN, SIE_SES_DA); + SIEsetEndpointStatus(EP0OUT, SIE_SES_DA); if (LPC_USB->USBEpIntSt & EP(EP0IN)) { selectEndpointClearInterrupt(EP0IN); @@ -512,9 +531,9 @@ void USBPhyHw::ep0_stall(void) bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) { + opStarted |= EP(endpoint); read_buffers[endpoint] = data; read_sizes[endpoint] = size; - enableEndpointEvent(endpoint); uint8_t status = SIEselectEndpoint(endpoint); if (status & ((1 << 5) | (1 << 6))) { // If any buffer has data then set the interrupt flag @@ -525,13 +544,7 @@ bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) { - - //for isochronous endpoint, we don't wait an interrupt - if ((DESC_TO_PHY(endpoint) >> 1) % 3 || (DESC_TO_PHY(endpoint) >> 1) == 0) { - if (!(epComplete & EP(endpoint))) { - return 0; - } - } + opStarted &= ~EP(endpoint); uint32_t bytesRead = endpointReadcore(endpoint, read_buffers[endpoint], read_sizes[endpoint]); read_buffers[endpoint] = NULL; @@ -543,13 +556,12 @@ uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) SIEclearBuffer(); } - epComplete &= ~EP(endpoint); return bytesRead; } bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) { - epComplete &= ~EP(endpoint); + opStarted |= EP(endpoint); endpointWritecore(endpoint, data, size); return true; @@ -557,7 +569,13 @@ bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) void USBPhyHw::endpoint_abort(usb_ep_t endpoint) { - //TODO - needs to be implemented + opStarted &= ~EP(endpoint); + + // Clear out transfer buffers since the transfer has been aborted + if (OUT_EP(endpoint)) { + read_buffers[endpoint] = NULL; + read_sizes[endpoint] = 0; + } } bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t maxPacket, usb_ep_type_t type) @@ -571,9 +589,12 @@ bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t maxPacket, usb_ep_type_t while (!(LPC_USB->USBDevIntSt & EP_RLZED)); LPC_USB->USBDevIntClr = EP_RLZED; - if (IN_EP(endpoint)) { - enableEndpointEvent(endpoint); - } + // Map interrupts to USBEpIntSt + enableEndpointEvent(endpoint); + + // Enable this endpoint + SIEsetEndpointStatus(endpoint, 0); + return true; } @@ -581,10 +602,15 @@ void USBPhyHw::endpoint_remove(usb_ep_t endpoint) { // Unrealise an endpoint - disableEndpointEvent(endpoint); + opStarted &= ~EP(endpoint); - // reset this endpoint, including data toggle - SIEsetEndpointStatus(endpoint, 0); + // Disable this endpoint + SIEsetEndpointStatus(endpoint, SIE_SES_DA); + + // Clear the given interrupt bit in USBEpIntSt if it is set + if (LPC_USB->USBEpIntSt & EP(endpoint)) { + selectEndpointClearInterrupt(endpoint); + } LPC_USB->USBDevIntClr = EP_RLZED; LPC_USB->USBReEp &= ~EP(endpoint); @@ -731,12 +757,12 @@ void USBPhyHw::process(void) uint8_t endpoint = PHY_TO_DESC(num); if (LPC_USB->USBEpIntSt & EP(endpoint)) { selectEndpointClearInterrupt(endpoint); - epComplete |= EP(endpoint); - if (IN_EP(endpoint)) { - events->in(endpoint); - } else { - disableEndpointEvent(endpoint); - events->out(endpoint); + if (opStarted & EP(endpoint)) { + if (IN_EP(endpoint)) { + events->in(endpoint); + } else { + events->out(endpoint); + } } } } From 9ebe0b68d6e7a732bef1255a00afc12f8622f96c Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 28 Mar 2018 19:30:53 +0200 Subject: [PATCH 075/488] Update the STM32 USB driver to the new API Take the code from mbed-os\features\unsupported\USBDevice\targets\TARGET_STM as a starting point and use it to fill in the USBPhy template for STM32 devices. --- targets/targets.json | 2 +- .../targets/TARGET_STM/USBEndpoints_STM32.h | 65 +++ usb/device/targets/TARGET_STM/USBPhyHw.h | 102 ++++ .../targets/TARGET_STM/USBPhy_STM32.cpp | 522 ++++++++++++++++++ 4 files changed, 690 insertions(+), 1 deletion(-) create mode 100644 usb/device/targets/TARGET_STM/USBEndpoints_STM32.h create mode 100644 usb/device/targets/TARGET_STM/USBPhyHw.h create mode 100644 usb/device/targets/TARGET_STM/USBPhy_STM32.cpp diff --git a/targets/targets.json b/targets/targets.json index 280d69b8a04..3110700c1a2 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -1011,7 +1011,7 @@ }, "detect_code": ["0835"], "macros_add": ["USBHOST_OTHER"], - "device_has_add": ["ANALOGOUT", "CAN", "EMAC", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"], + "device_has_add": ["ANALOGOUT", "CAN", "EMAC", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH", "USBDEVICE"], "device_has_remove": ["LPTICKER"], "release_versions": ["2", "5"], "device_name": "STM32F207ZG", diff --git a/usb/device/targets/TARGET_STM/USBEndpoints_STM32.h b/usb/device/targets/TARGET_STM/USBEndpoints_STM32.h new file mode 100644 index 00000000000..a8723b2ae73 --- /dev/null +++ b/usb/device/targets/TARGET_STM/USBEndpoints_STM32.h @@ -0,0 +1,65 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#define NUMBER_OF_LOGICAL_ENDPOINTS (4) +#define NUMBER_OF_PHYSICAL_ENDPOINTS (NUMBER_OF_LOGICAL_ENDPOINTS * 2) + +/* Define physical endpoint numbers */ + +/* Endpoint No. Type(s) MaxPacket DoubleBuffer */ +/* ---------------- ------------ ---------- --- */ +#define EP0OUT (0x00) /* Control 64 No */ +#define EP0IN (0x80) /* Control 64 No */ +#define EP1OUT (0x01) /* Int/Bulk/Iso 64/64/1023 Yes */ +#define EP1IN (0x81) /* Int/Bulk/Iso 64/64/1023 Yes */ +#define EP2OUT (0x02) /* Int/Bulk/Iso 64/64/1023 Yes */ +#define EP2IN (0x82) /* Int/Bulk/Iso 64/64/1023 Yes */ +#define EP3OUT (0x03) /* Int/Bulk/Iso 64/64/1023 Yes */ +#define EP3IN (0x83) /* Int/Bulk/Iso 64/64/1023 Yes */ + +/* Maximum Packet sizes */ +#define MAX_PACKET_SIZE_SETUP (48) +#define MAX_PACKET_SIZE_EP0 (64) +#define MAX_PACKET_SIZE_EP1 (64) /* Int/Bulk */ +#define MAX_PACKET_SIZE_EP2 (64) /* Int/Bulk */ +#define MAX_PACKET_SIZE_EP3 (200) /* Int/Bulk/iso (44100 stereo 16 bits) */ + +#define MAX_PACKET_SIZE_EP1_ISO (1023) /* Isochronous */ +#define MAX_PACKET_SIZE_EP2_ISO (1023) /* Isochronous */ +#define MAX_PACKET_SIZE_EP3_ISO (1023) /* Isochronous */ + +/* Generic endpoints - intended to be portable accross devices */ +/* and be suitable for simple USB devices. */ + +/* Bulk endpoint */ +#define EPBULK_OUT (EP2OUT) +#define EPBULK_IN (EP2IN) +#define EPBULK_OUT_callback EP2_OUT_callback +#define EPBULK_IN_callback EP2_IN_callback +/* Interrupt endpoint */ +#define EPINT_OUT (EP1OUT) +#define EPINT_IN (EP1IN) +#define EPINT_OUT_callback EP1_OUT_callback +#define EPINT_IN_callback EP1_IN_callback +/* Isochronous endpoint */ +#define EPISO_OUT (EP3OUT) +#define EPISO_IN (EP3IN) +#define EPISO_OUT_callback EP3_OUT_callback +#define EPISO_IN_callback EP3_IN_callback + +#define MAX_PACKET_SIZE_EPBULK (MAX_PACKET_SIZE_EP2) +#define MAX_PACKET_SIZE_EPINT (MAX_PACKET_SIZE_EP1) +#define MAX_PACKET_SIZE_EPISO (MAX_PACKET_SIZE_EP3_ISO) diff --git a/usb/device/targets/TARGET_STM/USBPhyHw.h b/usb/device/targets/TARGET_STM/USBPhyHw.h new file mode 100644 index 00000000000..b117339c84b --- /dev/null +++ b/usb/device/targets/TARGET_STM/USBPhyHw.h @@ -0,0 +1,102 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBPHYHW_H +#define USBPHYHW_H + +#include "mbed.h" +#include "USBPhy.h" + +#if defined(TARGET_DISCO_F746NG) +#if (MBED_CONF_TARGET_USB_SPEED == 1) // Defined in json configuration file +#define TARGET_DISCO_F746NG_OTG_HS +#else +#define TARGET_DISCO_F746NG_OTG_FS +#endif +#endif + +#if defined(TARGET_DISCO_F429ZI) || \ + defined(TARGET_DISCO_F769NI) || \ + defined(TARGET_DISCO_F746NG_OTG_HS) +#define USBHAL_IRQn OTG_HS_IRQn +#else +#define USBHAL_IRQn OTG_FS_IRQn +#endif + +#include "USBEndpoints_STM32.h" + +#define NB_ENDPOINT 4 // Must be a multiple of 4 bytes + +#define MAXTRANSFER_SIZE 0x200 + +#define FIFO_USB_RAM_SIZE (MAXTRANSFER_SIZE + MAX_PACKET_SIZE_EP0 + MAX_PACKET_SIZE_EP1 + MAX_PACKET_SIZE_EP2 + MAX_PACKET_SIZE_EP3) + +#if (FIFO_USB_RAM_SIZE > 0x500) +#error "FIFO dimensioning incorrect" +#endif + +class USBPhyHw : public USBPhy { +public: + USBPhyHw(); + virtual ~USBPhyHw(); + virtual void init(USBPhyEvents *events); + virtual void deinit(); + virtual bool powered(); + virtual void connect(); + virtual void disconnect(); + virtual void configure(); + virtual void unconfigure(); + virtual void sof_enable(); + virtual void sof_disable(); + virtual void set_address(uint8_t address); + virtual void remote_wakeup(); + virtual const usb_ep_table_t* endpoint_table(); + + virtual uint32_t ep0_set_max_packet(uint32_t max_packet); + virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_read(uint8_t *data, uint32_t size); + virtual uint32_t ep0_read_result(); + virtual void ep0_write(uint8_t *buffer, uint32_t size); + virtual void ep0_stall(); + + virtual bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type); + virtual void endpoint_remove(usb_ep_t endpoint); + virtual void endpoint_stall(usb_ep_t endpoint); + virtual void endpoint_unstall(usb_ep_t endpoint); + + virtual bool endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual uint32_t endpoint_read_result(usb_ep_t endpoint); + virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual void endpoint_abort(usb_ep_t endpoint); + + virtual void process(); + + USBPhyEvents *events; + bool sof_enabled; + + uint8_t epComplete[2 * NB_ENDPOINT]; + uint32_t pBufRx[MAXTRANSFER_SIZE >> 2]; + uint32_t pBufRx0[MAX_PACKET_SIZE_EP0 >> 2]; + PCD_HandleTypeDef hpcd; + +private: + uint32_t _read_size[16]; + uint8_t *_read_buf[16]; + + static void _usbisr(void); +}; + +#endif diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp new file mode 100644 index 00000000000..09c98047264 --- /dev/null +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -0,0 +1,522 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* TARGET NOT STM does not support this HAL */ +#ifndef TARGET_STM +#define USBSTM_HAL_UNSUPPORTED +#endif + +/* STM32F4 family without USB_STM_HAL use another HAL */ +#if defined(TARGET_STM) && defined(TARGET_STM32F4) && !defined(USB_STM_HAL) +#define USBSTM_HAL_UNSUPPORTED +#endif + +#ifndef USBSTM_HAL_UNSUPPORTED +#include "USBPhyHw.h" +#include "pinmap.h" + + +/* endpoint conversion macros */ +#define EP_TO_LOG(ep) ((ep) & 0x7F) +#define EP_TO_IDX(ep) (((ep) << 1) | ((ep) & 0x80 ? 1 : 0)) +#define LOG_IN_TO_EP(ep) ((ep) | 0x80) +#define LOG_OUT_TO_EP(ep) ((ep) | 0x00) +#define IDX_TO_EP(ep) (((ep) >> 1)|((ep) & 1) << 7) + +uint32_t HAL_PCDEx_GetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo) +{ + uint32_t len; + if (fifo == 0) { + len = hpcd->Instance->DIEPTXF0_HNPTXFSIZ >> 16; + } + else { + len = hpcd->Instance->DIEPTXF[fifo - 1] >> 16; + } + return len * 4; +} + +void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) +{ + USBPhyHw *priv=((USBPhyHw *)(hpcd->pData)); + USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; + if (priv->sof_enabled) { + priv->events->sof((USBx_DEVICE->DSTS & USB_OTG_DSTS_FNSOF) >> 8); + } +} + +/* this call at device reception completion on a Out Enpoint */ +void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +{ + USBPhyHw *priv=((USBPhyHw *)(hpcd->pData)); + uint8_t endpoint = LOG_OUT_TO_EP(epnum); + priv->epComplete[EP_TO_IDX(endpoint)] = 1; + /* -2 endpoint 0 In out are not in call back list */ + if (epnum) { + priv->events->out(endpoint); + } else { + priv->events->ep0_out(); + } +} + +/* this is call at device transmission completion on In endpoint */ +void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +{ + USBPhyHw *priv=((USBPhyHw *)(hpcd->pData)); + uint8_t endpoint = LOG_IN_TO_EP(epnum); + priv->epComplete[EP_TO_IDX(endpoint)] = 1; + /* -2 endpoint 0 In out are not in call back list */ + if (epnum) { + priv->events->in(endpoint); + } else { + priv->events->ep0_in(); + } +} +/* This is call at device set up reception */ +void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) +{ + USBPhyHw *priv=((USBPhyHw *)(hpcd->pData)); + priv->events->ep0_setup(); +} + +void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) +{ + USBPhyHw *priv=((USBPhyHw *)(hpcd->pData)); + priv->events->suspend(1); +} + +void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) +{ + USBPhyHw *priv=((USBPhyHw *)(hpcd->pData)); + priv->events->suspend(0); +} + +void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd) +{ + // Nothing to do +} + +void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd) +{ + // Nothing to do +} + +void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) +{ + USBPhyHw *obj=((USBPhyHw *)(hpcd->pData)); + unsigned int i; + for(i=0;iInit.dev_endpoints;i++) { + obj->epComplete[2*i]=0; + HAL_PCD_EP_Close(hpcd,IDX_TO_EP(2*i)); + HAL_PCD_EP_Flush(hpcd,IDX_TO_EP(2*i)); + obj->epComplete[2*i+1]=0; + HAL_PCD_EP_Close(hpcd,IDX_TO_EP(2*i+1)); + HAL_PCD_EP_Flush(hpcd,IDX_TO_EP(2*i+1)); + + } + obj->endpoint_add(EP0IN, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); + obj->endpoint_add(EP0OUT, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); + obj->events->reset(); +} + + +/* hal pcd handler , used for STM32 HAL PCD Layer */ + +static USBPhyHw *instance; + +USBPhy *get_usb_phy() +{ + static USBPhyHw usbphy; + return &usbphy; +} + +USBPhyHw::USBPhyHw(): events(NULL), sof_enabled(false) +{ + +} + +USBPhyHw::~USBPhyHw() +{ + +} + +void USBPhyHw::init(USBPhyEvents *events) +{ + NVIC_DisableIRQ(USBHAL_IRQn); + + this->events = events; + sof_enabled = false; + memset(epComplete, 0, sizeof(epComplete)); + memset(pBufRx, 0, sizeof(pBufRx)); + memset(pBufRx0, 0, sizeof(pBufRx0)); + memset(&hpcd.Init, 0, sizeof(hpcd.Init)); + memset(_read_size, 0, sizeof(_read_size)); + memset(_read_buf, 0, sizeof(_read_buf)); + +#if defined(TARGET_DISCO_F769NI) || \ + defined(TARGET_DISCO_F746NG_OTG_HS) + hpcd.Instance = USB_OTG_HS; + hpcd.Init.phy_itface = PCD_PHY_ULPI; + hpcd.Init.Sof_enable = 1; + hpcd.Init.speed = PCD_SPEED_HIGH; +#elif defined(TARGET_DISCO_F429ZI) + hpcd.Instance = USB_OTG_HS; + hpcd.Init.phy_itface = PCD_PHY_EMBEDDED; + hpcd.Init.Sof_enable = 1; + hpcd.Init.speed = PCD_SPEED_HIGH; +#else + hpcd.Instance = USB_OTG_FS; + hpcd.Init.phy_itface = PCD_PHY_EMBEDDED; + hpcd.Init.Sof_enable = 1; + hpcd.Init.speed = PCD_SPEED_FULL; +#endif + hpcd.Init.dev_endpoints = NB_ENDPOINT; + hpcd.Init.ep0_mps = MAX_PACKET_SIZE_EP0; + + // Pass instance for usage inside call back + instance = this; + + // Configure USB pins and other clocks + +#if defined(TARGET_NUCLEO_F207ZG) || \ + defined(TARGET_NUCLEO_F401RE) || \ + defined(TARGET_NUCLEO_F411RE) || \ + defined(TARGET_NUCLEO_F412ZG) || \ + defined(TARGET_NUCLEO_F413ZH) || \ + defined(TARGET_NUCLEO_F429ZI) || \ + defined(TARGET_NUCLEO_F446RE) || \ + defined(TARGET_NUCLEO_F446ZE) || \ + defined(TARGET_NUCLEO_F767ZI) || \ + defined(TARGET_NUCLEO_F746ZG) || \ + defined(TARGET_DISCO_F407VG) || \ + defined(TARGET_DISCO_F413ZH) || \ + defined(TARGET_DISCO_F469NI) || \ + defined(TARGET_DISCO_F746NG_OTG_FS) + __HAL_RCC_GPIOA_CLK_ENABLE(); + pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DM + pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DP + pin_function(PA_9, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // VBUS + pin_function(PA_10, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)); // ID + pin_function(PA_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // SOF + __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); + +#elif defined(TARGET_DISCO_F429ZI) + __HAL_RCC_GPIOB_CLK_ENABLE(); + pin_function(PB_14, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_OTG_HS_FS)); // DM + pin_function(PB_15, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_OTG_HS_FS)); // DP + pin_function(PB_13, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); // VBUS + __HAL_RCC_USB_OTG_HS_CLK_ENABLE(); + +#elif defined(TARGET_DISCO_L475VG_IOT01A) || \ + defined(TARGET_DISCO_L476VG) + __HAL_RCC_GPIOA_CLK_ENABLE(); + pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DM + pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DP + __HAL_RCC_GPIOC_CLK_ENABLE(); + pin_function(PC_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // VBUS + __HAL_RCC_PWR_CLK_ENABLE(); + HAL_PWREx_EnableVddUSB(); + __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); + +#elif defined(TARGET_DISCO_F769NI) || \ + defined(TARGET_DISCO_F746NG_OTG_HS) + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); + __HAL_RCC_GPIOI_CLK_ENABLE(); + pin_function(PA_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // CLK + pin_function(PA_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D0 + pin_function(PB_0, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D1 + pin_function(PB_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D2 + pin_function(PB_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D3 + pin_function(PB_10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D4 + pin_function(PB_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D5 + pin_function(PB_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D6 + pin_function(PB_13, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D7 + pin_function(PC_0, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // STP + pin_function(PH_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // NXT +#if defined(TARGET_DISCO_F769NI) + pin_function(PI_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // DIR +#else // TARGET_DISCO_F746NG + pin_function(PC_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // DIR +#endif + __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE(); + __HAL_RCC_USB_OTG_HS_CLK_ENABLE(); + +#elif defined(TARGET_STEVAL_3DP001V1) + __HAL_RCC_GPIOB_CLK_ENABLE(); + pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DM + pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DP + __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); + +#else +#error "USB pins are not configured !" +#endif + + __HAL_RCC_SYSCFG_CLK_ENABLE(); + + // Configure PCD and FIFOs + hpcd.pData = (void*)this; + hpcd.State = HAL_PCD_STATE_RESET; + HAL_PCD_Init(&hpcd); + + /* 1.25 kbytes */ + /* min value 16 (= 16 x 4 bytes) */ + /* max value 256 (= 1K bytes ) */ + /* maximum sum is 0x140 */ + HAL_PCDEx_SetRxFiFo(&hpcd, (MAXTRANSFER_SIZE / 4)); + + // Configure interrupt vector + NVIC_SetVector(USBHAL_IRQn, (uint32_t)&_usbisr); + NVIC_SetPriority(USBHAL_IRQn, 1); + NVIC_EnableIRQ(USBHAL_IRQn); +} + +void USBPhyHw::deinit() +{ + HAL_PCD_DeInit(&hpcd); + NVIC_DisableIRQ(USBHAL_IRQn); +} + +bool USBPhyHw::powered() +{ + return true; +} + +void USBPhyHw::connect() +{ + HAL_PCD_Start(&hpcd); +} + +void USBPhyHw::disconnect() +{ + HAL_PCD_Stop(&hpcd); +} + +void USBPhyHw::configure() +{ + // Not needed +} + +void USBPhyHw::unconfigure() +{ + // Not needed +} + +void USBPhyHw::sof_enable() +{ + sof_enabled = true; +} + +void USBPhyHw::sof_disable() +{ + sof_enabled = false; +} + +void USBPhyHw::set_address(uint8_t address) +{ + HAL_PCD_SetAddress(&hpcd, address); + ep0_write(NULL, 0); +} + +void USBPhyHw::remote_wakeup() +{ + +} + +const usb_ep_table_t *USBPhyHw::endpoint_table() +{ + static const usb_ep_table_t table = { + 1280, // 1.25K for endpoint buffers + { + {USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 80}, + {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4} + } + }; + return &table; +} + +uint32_t USBPhyHw::ep0_set_max_packet(uint32_t max_packet) +{ + // FUTURE - set endpoint 0 size and return this size + return MAX_PACKET_SIZE_EP0; +} + +// read setup packet +void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) +{ + if (size > MAX_PACKET_SIZE_SETUP) { + size = MAX_PACKET_SIZE_SETUP; + } + memcpy(buffer, hpcd.Setup, size); + memset(hpcd.Setup,0,MAX_PACKET_SIZE_SETUP); +} + +void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) +{ + _read_buf[0] = data; + _read_size[0] = size; + + uint8_t *pBuf = (uint8_t *)pBufRx0; + HAL_StatusTypeDef ret; + epComplete[EP_TO_IDX(EP0OUT)] = 2; + ret = HAL_PCD_EP_Receive(&hpcd, EP0OUT, pBuf, MAX_PACKET_SIZE_EP0 ); + MBED_ASSERT(ret!=HAL_BUSY); +} + +uint32_t USBPhyHw::ep0_read_result() +{ + uint32_t length = (uint32_t) HAL_PCD_EP_GetRxCount(&hpcd, 0); + epComplete[EP_TO_IDX(EP0OUT)] = 0; + if (length) { + uint8_t *buff = (uint8_t *)pBufRx0; + memcpy(_read_buf[0], buff, _read_size[0] > length ? length : _read_size[0]); + } + _read_buf[0] = 0; + _read_size[0] = 0; + return length; +} + +void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) +{ + /* check that endpoint maximum size is not exceeding TX fifo */ + MBED_ASSERT(hpcd.IN_ep[0].maxpacket >= size); + endpoint_write(EP0IN, buffer, size); +} + +void USBPhyHw::ep0_stall() +{ + endpoint_stall(EP0IN); + endpoint_stall(EP0OUT); +} + +bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type) +{ + uint32_t len; + if (max_packet > MAXTRANSFER_SIZE) return false; + if (endpoint & 0x80) { + HAL_PCDEx_SetTxFiFo(&hpcd, endpoint & 0x7f, (max_packet / 4) + 1); + len = HAL_PCDEx_GetTxFiFo(&hpcd,endpoint & 0x7f); + MBED_ASSERT(len >= max_packet); + } + HAL_StatusTypeDef ret = HAL_PCD_EP_Open(&hpcd, endpoint, max_packet, type); + MBED_ASSERT(ret!=HAL_BUSY); + return (ret == HAL_OK) ? true:false; +} + +void USBPhyHw::endpoint_remove(usb_ep_t endpoint) +{ + HAL_StatusTypeDef ret = HAL_PCD_EP_Close(&hpcd, endpoint); + MBED_ASSERT(ret == HAL_OK); +} + +void USBPhyHw::endpoint_stall(usb_ep_t endpoint) +{ + HAL_StatusTypeDef ret; + ret = HAL_PCD_EP_SetStall(&hpcd, endpoint); + MBED_ASSERT(ret!=HAL_BUSY); +} + +void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) +{ + HAL_StatusTypeDef ret; + ret = HAL_PCD_EP_ClrStall(&hpcd, endpoint); + MBED_ASSERT(ret!=HAL_BUSY); +} + +bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ + _read_buf[EP_TO_LOG(endpoint)] = data; + _read_size[EP_TO_LOG(endpoint)] = size; + + uint8_t* pBuf = (uint8_t *)pBufRx; //TODO - this buffer shouldn't be shared for multiple endpoints + HAL_StatusTypeDef ret; + // clean reception end flag before requesting reception + ret = HAL_PCD_EP_Receive(&hpcd, endpoint, pBuf, size); + MBED_ASSERT(ret!=HAL_BUSY); + return true; +} + +uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) +{ + uint8_t *buffer =_read_buf[EP_TO_LOG(endpoint)]; + uint8_t max_size = _read_size[EP_TO_LOG(endpoint)]; + + if (epComplete[EP_TO_IDX(endpoint)]==0) { + /* no reception possible !!! */ + return 0; + } else if ((epComplete[EP_TO_IDX(endpoint)]!=1)) { + return 0; + } + uint8_t *buff = (uint8_t *)pBufRx; + uint32_t length = (uint32_t) HAL_PCD_EP_GetRxCount(&hpcd, endpoint); + memcpy(buffer, buff, length > max_size ? max_size : length); + epComplete[EP_TO_IDX(endpoint)]= 0; + return length; +} + +bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ + HAL_StatusTypeDef ret; + // clean transmission end flag before requesting transmission + epComplete[EP_TO_IDX(endpoint)] = 2; + ret = HAL_PCD_EP_Transmit(&hpcd, endpoint, data, size); + MBED_ASSERT(ret!=HAL_BUSY); + // update the status + if (ret != HAL_OK) return false; + // fix me return is too simple + return true; +} + +void USBPhyHw::endpoint_abort(usb_ep_t endpoint) +{ + // TODO - stop the current transfer on this endpoint and don't call the IN or OUT callback +} + +void USBPhyHw::process() +{ + HAL_PCD_IRQHandler(&instance->hpcd); + // Re-enable interrupt + NVIC_ClearPendingIRQ(USBHAL_IRQn); + NVIC_EnableIRQ(USBHAL_IRQn); +} + +void USBPhyHw::_usbisr(void) { + NVIC_DisableIRQ(USBHAL_IRQn); + instance->events->start_process(); +} + +//TODO - remove this hack which allows HAL_Delay to work when interrupts are disabled +extern "C" uint32_t HAL_GetTick() +{ + return ticker_read_us(get_us_ticker_data()) / 1000; +} + +#endif From db22873e13c3b04a0172d7454b5a98f51ca849bb Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 24 Apr 2018 21:40:55 -0500 Subject: [PATCH 076/488] Remove ep0_write from set_address The USBDevice stack automatically sends control endpoint status so this does not and should not be done from the call to set_address. --- usb/device/targets/TARGET_STM/USBPhy_STM32.cpp | 1 - 1 file changed, 1 deletion(-) diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 09c98047264..1e2a506b12b 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -329,7 +329,6 @@ void USBPhyHw::sof_disable() void USBPhyHw::set_address(uint8_t address) { HAL_PCD_SetAddress(&hpcd, address); - ep0_write(NULL, 0); } void USBPhyHw::remote_wakeup() From fbe98e66badb9ea98eac2b261824587a043970d9 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 3 May 2018 11:12:15 -0500 Subject: [PATCH 077/488] Remove unnecessary USB receive buffer Remove receive buffer from USBPhy_STM32 and instead passed buffers in directly. --- usb/device/targets/TARGET_STM/USBPhyHw.h | 4 --- .../targets/TARGET_STM/USBPhy_STM32.cpp | 34 +++---------------- 2 files changed, 4 insertions(+), 34 deletions(-) diff --git a/usb/device/targets/TARGET_STM/USBPhyHw.h b/usb/device/targets/TARGET_STM/USBPhyHw.h index b117339c84b..68c3ccb876d 100644 --- a/usb/device/targets/TARGET_STM/USBPhyHw.h +++ b/usb/device/targets/TARGET_STM/USBPhyHw.h @@ -88,13 +88,9 @@ class USBPhyHw : public USBPhy { bool sof_enabled; uint8_t epComplete[2 * NB_ENDPOINT]; - uint32_t pBufRx[MAXTRANSFER_SIZE >> 2]; - uint32_t pBufRx0[MAX_PACKET_SIZE_EP0 >> 2]; PCD_HandleTypeDef hpcd; private: - uint32_t _read_size[16]; - uint8_t *_read_buf[16]; static void _usbisr(void); }; diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 1e2a506b12b..4a9c0b09b87 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -159,11 +159,7 @@ void USBPhyHw::init(USBPhyEvents *events) this->events = events; sof_enabled = false; memset(epComplete, 0, sizeof(epComplete)); - memset(pBufRx, 0, sizeof(pBufRx)); - memset(pBufRx0, 0, sizeof(pBufRx0)); memset(&hpcd.Init, 0, sizeof(hpcd.Init)); - memset(_read_size, 0, sizeof(_read_size)); - memset(_read_buf, 0, sizeof(_read_buf)); #if defined(TARGET_DISCO_F769NI) || \ defined(TARGET_DISCO_F746NG_OTG_HS) @@ -380,27 +376,16 @@ void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) { - _read_buf[0] = data; - _read_size[0] = size; - - uint8_t *pBuf = (uint8_t *)pBufRx0; HAL_StatusTypeDef ret; epComplete[EP_TO_IDX(EP0OUT)] = 2; - ret = HAL_PCD_EP_Receive(&hpcd, EP0OUT, pBuf, MAX_PACKET_SIZE_EP0 ); + ret = HAL_PCD_EP_Receive(&hpcd, EP0OUT, data, size > MAX_PACKET_SIZE_EP0 ? MAX_PACKET_SIZE_EP0 : size); MBED_ASSERT(ret!=HAL_BUSY); } uint32_t USBPhyHw::ep0_read_result() { - uint32_t length = (uint32_t) HAL_PCD_EP_GetRxCount(&hpcd, 0); epComplete[EP_TO_IDX(EP0OUT)] = 0; - if (length) { - uint8_t *buff = (uint8_t *)pBufRx0; - memcpy(_read_buf[0], buff, _read_size[0] > length ? length : _read_size[0]); - } - _read_buf[0] = 0; - _read_size[0] = 0; - return length; + return HAL_PCD_EP_GetRxCount(&hpcd, 0); } void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) @@ -452,33 +437,22 @@ void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) { - _read_buf[EP_TO_LOG(endpoint)] = data; - _read_size[EP_TO_LOG(endpoint)] = size; - - uint8_t* pBuf = (uint8_t *)pBufRx; //TODO - this buffer shouldn't be shared for multiple endpoints - HAL_StatusTypeDef ret; // clean reception end flag before requesting reception - ret = HAL_PCD_EP_Receive(&hpcd, endpoint, pBuf, size); + HAL_StatusTypeDef ret = HAL_PCD_EP_Receive(&hpcd, endpoint, data, size); MBED_ASSERT(ret!=HAL_BUSY); return true; } uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) { - uint8_t *buffer =_read_buf[EP_TO_LOG(endpoint)]; - uint8_t max_size = _read_size[EP_TO_LOG(endpoint)]; - if (epComplete[EP_TO_IDX(endpoint)]==0) { /* no reception possible !!! */ return 0; } else if ((epComplete[EP_TO_IDX(endpoint)]!=1)) { return 0; } - uint8_t *buff = (uint8_t *)pBufRx; - uint32_t length = (uint32_t) HAL_PCD_EP_GetRxCount(&hpcd, endpoint); - memcpy(buffer, buff, length > max_size ? max_size : length); epComplete[EP_TO_IDX(endpoint)]= 0; - return length; + return HAL_PCD_EP_GetRxCount(&hpcd, endpoint);; } bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) From e31575a54fefa3afcbcc88433c140e24be378f70 Mon Sep 17 00:00:00 2001 From: Michel Jaouen Date: Wed, 25 Apr 2018 18:08:44 +0200 Subject: [PATCH 078/488] Create HAL_PCD_EP_Abort --- .../TARGET_STM32F2/device/stm32f2xx_hal_pcd.c | 22 ++++++++ .../TARGET_STM32F2/device/stm32f2xx_hal_pcd.h | 1 + .../TARGET_STM32F2/device/stm32f2xx_ll_usb.c | 55 +++++++++++++++++++ .../TARGET_STM32F2/device/stm32f2xx_ll_usb.h | 1 + .../targets/TARGET_STM/USBPhy_STM32.cpp | 4 ++ 5 files changed, 83 insertions(+) diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c index ee1703bbd10..8d1915a88dc 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c @@ -1042,6 +1042,28 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); return HAL_OK; } +/** + * @brief Abort a transaction. + * @param hpcd: PCD handle + * @param ep_addr: endpoint address + * @param pBuf: pointer to the transmission buffer + * @param len: amount of data to be sent + * @retval HAL status + */ +HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) +{ + HAL_StatusTypeDef ret; + USB_OTG_EPTypeDef *ep; + + ep = &hpcd->IN_ep[ep_addr & 0x7F]; + + /*setup and start the Xfer */ + __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); + ret = USB_EPStopXfer(hpcd->Instance , ep, hpcd->Init.dma_enable); + + __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); + return ret; +} /** * @brief Set a STALL condition over an endpoint. diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h index f617e6d8de6..610c8456e95 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h @@ -271,6 +271,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); +HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c index b4799572c43..02b936b5925 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c @@ -745,6 +745,61 @@ HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeD } return HAL_OK; } +/** + * @brief USB_EPStoptXfer : setup and starts a transfer over an EP + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @param dma: USB dma enabled or disabled + * This parameter can be one of these values: + * 0 : DMA feature not used + * 1 : DMA feature used + * @retval HAL status + */ +HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma) +{ + HAL_StatusTypeDef ret = HAL_OK; + /* IN endpoint */ + if (ep->is_in == 1U) + { + + /* EP enable, IN data in FIFO */ + if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) + { + volatile uint32_t loop=0; + USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_EPDIS); + while(((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) + {/* data sheet say that EPDISD: Endpoint disabled interrupt must be raised + to consider the endpoint as disable */ + /* fix me loop for test only */ + loop++; + if (loop > 10000L) { + ret =HAL_ERROR; + break; + } + } + } + } + else /* OUT endpoint */ + { + if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) + { + volatile uint32_t loop=0; + USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_EPDIS); + while(((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) + {/* data sheet say that EPDISD: Endpoint disabled interrupt must be raised + to consider the endpoint as disable */ + /* Fix me loop for test only */ + loop++; + if (loop > 10000L) { + ret =HAL_ERROR; + break; + } + } + } + } + return ret; +} + /** * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h index ebbb5987613..ac6cc496df3 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h @@ -404,6 +404,7 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EP HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); +HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma); void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len); diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 4a9c0b09b87..472b2021f51 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -471,6 +471,10 @@ bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) void USBPhyHw::endpoint_abort(usb_ep_t endpoint) { // TODO - stop the current transfer on this endpoint and don't call the IN or OUT callback + HAL_StatusTypeDef ret; + ret = HAL_PCD_EP_Abort(&hpcd, endpoint); + MBED_ASSERT(ret!=HAL_OK); + return; } void USBPhyHw::process() From 52052c876fcd601619fe8750bc980b6ca0ce4d93 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 3 May 2018 18:07:02 -0500 Subject: [PATCH 079/488] Fix return code check in endpoint abort Assert that HAL_PCD_EP_Abort returns HAL_OK rather that something else. --- usb/device/targets/TARGET_STM/USBPhy_STM32.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 472b2021f51..e8ab482f750 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -473,7 +473,7 @@ void USBPhyHw::endpoint_abort(usb_ep_t endpoint) // TODO - stop the current transfer on this endpoint and don't call the IN or OUT callback HAL_StatusTypeDef ret; ret = HAL_PCD_EP_Abort(&hpcd, endpoint); - MBED_ASSERT(ret!=HAL_OK); + MBED_ASSERT(ret==HAL_OK); return; } From 812935adc7f6d30fa5324ae5caed9b1d5a93a5e4 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 3 May 2018 18:10:34 -0500 Subject: [PATCH 080/488] Only build in USBPhy_STM32 for supported devices Define USBSTM_HAL_UNSUPPORTED if DEVICE_USBDEVICE is undefined or defined to 0. --- usb/device/targets/TARGET_STM/USBPhy_STM32.cpp | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index e8ab482f750..91facb63698 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -14,6 +14,11 @@ * limitations under the License. */ +/* This target doesn't support USB */ +#if !defined(DEVICE_USBDEVICE) || !DEVICE_USBDEVICE +#define USBSTM_HAL_UNSUPPORTED +#endif + /* TARGET NOT STM does not support this HAL */ #ifndef TARGET_STM #define USBSTM_HAL_UNSUPPORTED From 16c8e5b0bfeee51b28f7d8283f86fd51d701cb33 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 8 Jun 2018 10:53:16 -0500 Subject: [PATCH 081/488] Fix USB on Kinetis devices Set correct SYSMPU register for proper USB operation. This bug was introduced when the SYSMPU register names and defines were updated in the commit: "K64F: Updated the SYSMPU SDK driver" 93f8cfed058174b2de468353c173c0d7b9335ea4 --- usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp index c8a55e1a667..8c277cc10e9 100644 --- a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp +++ b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp @@ -125,6 +125,10 @@ void USBPhyHw::init(USBPhyEvents *events) MPU->CESR=0; #endif +#if (defined(FSL_FEATURE_SOC_SYSMPU_COUNT) && (FSL_FEATURE_SOC_SYSMPU_COUNT > 0U)) + SYSMPU->CESR=0; +#endif + #if defined(TARGET_KL43Z) || defined(TARGET_K22F) || defined(TARGET_K64F) // enable USBFS clock CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcIrc48M, 48000000U); From c7cb4452024bfe65b64db78ad3ed45c28c52d57a Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 6 Jun 2018 11:02:02 -0500 Subject: [PATCH 082/488] Fix isochronous endpoints on LPC1768 Perform isochronous endpoint processing from the frame interrupt rather than the endpoint interrupt. Isochronous endpoints to not generate interrupts normally and are intended to be handled from the start of frame interrupt. --- .../targets/TARGET_NXP/USBHAL_LPC17.cpp | 36 +++++++++++++++++-- 1 file changed, 34 insertions(+), 2 deletions(-) diff --git a/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp b/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp index 58c264a5e4a..6cfc629a51a 100644 --- a/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp +++ b/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp @@ -29,6 +29,9 @@ // Convert physical endpoint number to register bit #define EP(endpoint) (1UL<>1)|(((endpoint)&1)?0x80:0)) @@ -122,6 +125,13 @@ static USBPhyHw *instance; static uint32_t opStarted; +static const usb_ep_t ISO_EPS[] = { + 0x03, 0x83, + 0x06, 0x86, + 0x09, 0x89, + 0x0C, 0x8C +}; + static void SIECommand(uint32_t command) { // The command phase of a SIE transaction @@ -465,6 +475,9 @@ void USBPhyHw::disconnect(void) // Disconnect USB device SIEdisconnect(); + + // Reset all started operations + opStarted = 0; } void USBPhyHw::configure(void) @@ -551,7 +564,7 @@ uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) read_sizes[endpoint] = 0; // Don't clear isochronous endpoints - if ((DESC_TO_PHY(endpoint) >> 1) % 3 || (DESC_TO_PHY(endpoint) >> 1) == 0) { + if (!ISO_EP(endpoint)) { SIEselectEndpoint(endpoint); SIEclearBuffer(); } @@ -692,6 +705,20 @@ void USBPhyHw::process(void) events->sof(SIEgetFrameNumber()); // Clear interrupt status flag LPC_USB->USBDevIntClr = FRAME; + + // There is no ISO interrupt, instead a packet is transferred every SOF + for (uint32_t i = 0; i < sizeof(ISO_EPS) / sizeof(ISO_EPS[0]); i++) { + uint8_t endpoint = ISO_EPS[i]; + if (opStarted & EP(endpoint)) { + opStarted &= ~EP(endpoint); + if (IN_EP(endpoint)) { + events->in(endpoint); + } else { + events->out(endpoint); + } + } + } + } if (LPC_USB->USBDevIntSt & DEV_STAT) { @@ -717,6 +744,7 @@ void USBPhyHw::process(void) } memset(read_buffers, 0, sizeof(read_buffers)); memset(read_sizes, 0, sizeof(read_sizes)); + opStarted = 0; events->reset(); } } @@ -752,12 +780,16 @@ void USBPhyHw::process(void) } } - //TODO - should probably process in the reverse order for (uint8_t num = 2; num < 16 * 2; num++) { uint8_t endpoint = PHY_TO_DESC(num); if (LPC_USB->USBEpIntSt & EP(endpoint)) { selectEndpointClearInterrupt(endpoint); + if (ISO_EP(endpoint)) { + // Processing for ISO endpoints done in FRAME handling + continue; + } if (opStarted & EP(endpoint)) { + opStarted &= ~EP(endpoint); if (IN_EP(endpoint)) { events->in(endpoint); } else { From 4f72e061c6dea7765cdfeabe95b8d8ad6459ac23 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 13 Jun 2018 20:25:41 -0500 Subject: [PATCH 083/488] Fix Kinetis bug causing USB to get stuck sending If an IN endpoint is stalled during a transfer by writing to the USB ENDPOINT register then the data being sent will repeat and flood the USB bus. This patch prevents the register write from occurring by instead writing to the buffer descriptor in RAM and letting the USB hardware handle setting the stall bit. Note - Control requests on endpoint 0 do still set the STALL bit directly. This is not a problem since control endpoints cannot be stalled externally while a transfer is ongoing. --- .../targets/TARGET_Freescale/USBPhy_Kinetis.cpp | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp index 8c277cc10e9..763fa9cc139 100644 --- a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp +++ b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp @@ -411,11 +411,23 @@ void USBPhyHw::endpoint_remove(usb_ep_t endpoint) void USBPhyHw::endpoint_stall(usb_ep_t endpoint) { - USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK; + if (DESC_TO_LOG(endpoint) == 0) { + USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK; + } else { + uint8_t dir = DESC_EP_IN(endpoint) ? TX : RX; + uint32_t idx = EP_BDT_IDX(DESC_TO_LOG(endpoint), dir, 0); + bdt[idx].info |= BD_OWN_MASK | BD_STALL_MASK; + } } void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) { + + if (DESC_TO_LOG(endpoint) != 0) { + uint8_t dir = DESC_EP_IN(endpoint) ? TX : RX; + uint32_t idx = EP_BDT_IDX(DESC_TO_LOG(endpoint), dir, 0); + bdt[idx].info &= ~(BD_OWN_MASK | BD_STALL_MASK); + } USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; } From fa17d07deee0effba9b7d9f11618540bd5f228fb Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 4 Jun 2018 11:40:26 -0500 Subject: [PATCH 084/488] Add circular byte buffer using dynamic memory Add the ByteBuffer class which is similar to the CircularBuffer class but uses dynamic memory rather than template parameters and is optimized for byte transfers. This is required for USBAudio which needs a high performance circular buffer which can be resized at runtime. --- usb/device/utilities/ByteBuffer.cpp | 151 ++++++++++++++++++++++++++++ usb/device/utilities/ByteBuffer.h | 119 ++++++++++++++++++++++ 2 files changed, 270 insertions(+) create mode 100644 usb/device/utilities/ByteBuffer.cpp create mode 100644 usb/device/utilities/ByteBuffer.h diff --git a/usb/device/utilities/ByteBuffer.cpp b/usb/device/utilities/ByteBuffer.cpp new file mode 100644 index 00000000000..e45b8b4a826 --- /dev/null +++ b/usb/device/utilities/ByteBuffer.cpp @@ -0,0 +1,151 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "ByteBuffer.h" +#include "mbed_assert.h" +#include + +ByteBuffer::ByteBuffer(uint32_t size): _head(0), _tail(0), _size(0), _buf(NULL) +{ + resize(_size); +} + +ByteBuffer::~ByteBuffer() +{ + delete[] _buf; + _buf = 0; +} + +void ByteBuffer::resize(uint32_t size) +{ + delete[] _buf; + _head = 0; + _tail = 0; + _size = size + 1; + _buf = new uint8_t[_size](); +} + +void ByteBuffer::push(uint8_t data) +{ + _buf[_tail] = data; + _tail++; + if (_tail >= _size) { + _tail -= _size; + } + // Overflow not allowed + MBED_ASSERT(_head != _tail); +} + +void ByteBuffer::write(uint8_t *data, uint32_t size) +{ + MBED_ASSERT(size <= free()); + + if (size == 0) { + return; + } + + uint32_t new_tail = _tail + size; + if (new_tail >= _size) { + new_tail -= _size; + } + + // Perform first memcpy + uint32_t until_end = _size - _tail; + uint32_t copy_size = until_end < size ? until_end : size; + memcpy(_buf + _tail, data, copy_size); + data += copy_size; + size -= copy_size; + + // Perform second memcpy + if (size > 0) { + memcpy(_buf, data, size); + } + + // Update tail + _tail = new_tail; +} + +uint8_t ByteBuffer::pop() +{ + // Underflow not allowed + MBED_ASSERT(_head != _tail); + uint8_t val = _buf[_head]; + _head++; + if (_head >= _size) { + _head -= _size; + } + return val; +} + +void ByteBuffer::read(uint8_t *data, uint32_t size) +{ + MBED_ASSERT(size <= ByteBuffer::size()); + + if (size == 0) { + return; + } + + uint32_t new_head = _head + size; + if (new_head >= _size) { + new_head -= _size; + } + + // Perform first memcpy + uint32_t until_end = _size - _head; + uint32_t copy_size = until_end < size ? until_end : size; + memcpy(data, _buf + _head, copy_size); + data += copy_size; + size -= copy_size; + + // Perform second memcpy + if (size > 0) { + memcpy(data, _buf, size); + } + + // Update head + _head = new_head; +} + +uint32_t ByteBuffer::size() +{ + uint32_t size; + if (_tail < _head) { + size = _size + _tail - _head; + } else { + size = _tail - _head; + } + return size; +} + +uint32_t ByteBuffer::free() +{ + return _size - size() - 1; +} + +bool ByteBuffer::full() +{ + uint32_t next = _tail + 1; + if (next >= _size) { + next -= _size; + } + return next == _head; +} + +bool ByteBuffer::empty() +{ + return _head == _tail; +} + diff --git a/usb/device/utilities/ByteBuffer.h b/usb/device/utilities/ByteBuffer.h new file mode 100644 index 00000000000..8e9d40f40b2 --- /dev/null +++ b/usb/device/utilities/ByteBuffer.h @@ -0,0 +1,119 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef BYTE_BUFFER_H +#define BYTE_BUFFER_H + +#include + +class ByteBuffer { +public: + + /** + * Create a byte buffer of the given size + * + * @param size Number of bytes this buffer can hold + */ + ByteBuffer(uint32_t size=0); + + /** + * Delete this byte buffer + */ + ~ByteBuffer(); + + /** + * Set the size of the buffer + * + * Buffer contents are reset. + * + * @param size New buffer size + */ + void resize(uint32_t size); + + /** + * Add a single byte to this buffer + * + * There must be enough space in the buffer or the behavior is undefined. + * + * @param data byte to add + */ + void push(uint8_t data); + + /** + * Write a block of data to this ByteBuffer + * + * There must be enough space in the ByteBuffer or the behavior is undefined. + * + * @param data Block of data to write + * @param size Size of data to write + */ + void write(uint8_t *data, uint32_t size); + + /** + * Remove a byte from this buffer + * + * @return data byte + */ + uint8_t pop(); + + /** + * Read a block of data from this ByteBuffer into a buffer pointed by 'data' + * + * There must be enough data in the ByteBuffer or the behavior is undefined. + * + * @param data Block of data to read + * @param size Size of data to read + */ + void read(uint8_t *data, uint32_t size); + + /** + * Return the number bytes in this byte buffer + * + * @return Number of used bytes + */ + uint32_t size(); + + /** + * Return the number of additional bytes this buffer can hold + * + * @return Number of free bytes + */ + uint32_t free(); + + /** + * Check if this byte buffer is full + * + * @return true if full, false otherwise + */ + bool full(); + + /** + * Check if this byte buffer is empty + * + * @return true if empty, false otherwise + */ + bool empty(); + +private: + + uint32_t _head; + uint32_t _tail; + uint32_t _size; + uint8_t *_buf; +}; + + +#endif From aec9c5dfb00ba8e7a1b0b32909fd919fd08a4806 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 3 May 2018 20:39:44 -0500 Subject: [PATCH 085/488] Update USBAudio Update the USBAudio class to use the new USB API. This patch also adds buffering and blocking functionality so it can be used in practice from thread context. --- usb/device/USBAudio/USBAudio.cpp | 1002 ++++++++++++++++++++++++++ usb/device/USBAudio/USBAudio.h | 375 ++++++++++ usb/device/USBAudio/USBAudio_Types.h | 95 +++ 3 files changed, 1472 insertions(+) create mode 100644 usb/device/USBAudio/USBAudio.cpp create mode 100644 usb/device/USBAudio/USBAudio.h create mode 100644 usb/device/USBAudio/USBAudio_Types.h diff --git a/usb/device/USBAudio/USBAudio.cpp b/usb/device/USBAudio/USBAudio.cpp new file mode 100644 index 00000000000..dfd04ced263 --- /dev/null +++ b/usb/device/USBAudio/USBAudio.cpp @@ -0,0 +1,1002 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBAudio.h" +#include "USBAudio_Types.h" +#include "EndpointResolver.h" +#include "usb_phy_api.h" + +#define SAMPLE_SIZE 2 +#define XFER_FREQUENCY_HZ 1000 +#define WRITE_READY_UNBLOCK (1 << 0) +#define READ_READY_UNBLOCK (1 << 1) + +class USBAudio::AsyncWrite: public AsyncOp { +public: + AsyncWrite(USBAudio *audio, uint8_t *buf, uint32_t size): + audio(audio), tx_buf(buf), tx_size(size), result(false) + { + + } + + virtual ~AsyncWrite() + { + + } + + virtual bool process() + { + if (audio->_tx_state != Opened) { + result = false; + return true; + } + + uint32_t actual_size = 0; + audio->write_nb(tx_buf, tx_size, &actual_size); + tx_size -= actual_size; + tx_buf += actual_size; + if (tx_size == 0) { + result = true; + return true; + } + + return false; + } + + USBAudio *audio; + uint8_t *tx_buf; + uint32_t tx_size; + bool result; +}; + +class USBAudio::AsyncRead: public AsyncOp { +public: + AsyncRead(USBAudio *audio, uint8_t *buf, uint32_t size, uint32_t *size_read, bool read_all) + : audio(audio), rx_buf(buf), rx_size(size), rx_actual(size_read), all(read_all), result(false) + { + + } + + virtual ~AsyncRead() + { + + } + + virtual bool process() + { + if (audio->_rx_state != Opened) { + result = false; + return true; + } + + uint32_t actual_size = 0; + audio->read_nb(rx_buf, rx_size, &actual_size); + rx_buf += actual_size; + *rx_actual += actual_size; + rx_size -= actual_size; + if ((!all && *rx_actual > 0) || (rx_size == 0)) { + // Wake thread if request is done + result = true; + return true; + } + + return false; + } + + USBAudio *audio; + uint8_t *rx_buf; + uint32_t rx_size; + uint32_t *rx_actual; + bool all; + bool result; +}; + +static void stub_volume() +{ + +} + +static void stub_handler(USBAudio::AudioEvent event) +{ + (void)event; +} + +USBAudio::USBAudio(bool connect, uint32_t frequency_rx, uint8_t channel_count_rx, uint32_t frequency_tx, uint8_t channel_count_tx, uint32_t buffer_ms, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBDevice(get_usb_phy(), vendor_id, product_id, product_release) +{ + _init(frequency_rx, channel_count_rx, frequency_tx, channel_count_tx, buffer_ms); + + // connect or init device + if (connect) { + USBDevice::connect(); + } else { + USBDevice::init(); + } +} + +USBAudio::USBAudio(USBPhy *phy, uint32_t frequency_rx, uint8_t channel_count_rx, uint32_t frequency_tx, uint8_t channel_count_tx, uint32_t buffer_ms, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBDevice(phy, vendor_id, product_id, product_release) +{ + _init(frequency_rx, channel_count_rx, frequency_tx, channel_count_tx, buffer_ms); +} + +void USBAudio::_init(uint32_t frequency_rx, uint8_t channel_count_rx, uint32_t frequency_tx, uint8_t channel_count_tx, uint32_t buffer_ms) +{ + _connected = false; + + _volume = 0; + _mute = 0; + _vol_cur = 0x0080; + _vol_min = 0x0000; + _vol_max = 0x0100; + _vol_res = 0x0004; + + _update_vol = callback(stub_volume); + _tx_done = callback(stub_handler); + _rx_done = callback(stub_handler); + + _rx_overflow = 0; + _tx_underflow = 0; + + _tx_freq = frequency_tx; + _rx_freq = frequency_rx; + + _tx_channel_count = channel_count_tx; + _rx_channel_count = channel_count_rx; + + _tx_idle = true; + _tx_frame_fract = 0; + _tx_whole_frames_per_xfer = _tx_freq / XFER_FREQUENCY_HZ; + _tx_fract_frames_per_xfer = _tx_freq % XFER_FREQUENCY_HZ; + + uint32_t max_frames = _tx_whole_frames_per_xfer + (_tx_fract_frames_per_xfer ? 1 : 0); + _tx_packet_size_max = max_frames * SAMPLE_SIZE * _tx_channel_count; + _rx_packet_size_max = (_rx_freq + 1000 - 1) / 1000 * _rx_channel_count * 2; + + _tx_packet_buf = new uint8_t[_tx_packet_size_max](); + _rx_packet_buf = new uint8_t[_rx_packet_size_max](); + + _tx_queue.resize(buffer_ms * _tx_channel_count * SAMPLE_SIZE * _tx_freq / XFER_FREQUENCY_HZ); + _rx_queue.resize(buffer_ms * _rx_channel_count * SAMPLE_SIZE * _rx_freq / XFER_FREQUENCY_HZ); + + _tx_state = Closed; + _rx_state = Closed; + + EndpointResolver resolver(endpoint_table()); + resolver.endpoint_ctrl(64); + _episo_out = resolver.endpoint_out(USB_EP_TYPE_ISO, _tx_packet_size_max); + _episo_in = resolver.endpoint_in(USB_EP_TYPE_ISO, _rx_packet_size_max); + MBED_ASSERT(resolver.valid()); + + _channel_config_rx = (_rx_channel_count == 1) ? CHANNEL_M : CHANNEL_L + CHANNEL_R; + _channel_config_tx = (_tx_channel_count == 1) ? CHANNEL_M : CHANNEL_L + CHANNEL_R; + + _build_configuration_desc(); +} + +USBAudio::~USBAudio() +{ + disconnect(); + deinit(); + + delete[] _tx_packet_buf; + delete[] _rx_packet_buf; +} + +void USBAudio::connect() +{ + lock(); + + if (!_connected) { + USBDevice::connect(); + _connected = true; + _receive_change(Closed); + _send_change(Closed); + } + + unlock(); +} + +void USBAudio::disconnect() +{ + lock(); + + if (_connected) { + _connected = false; + USBDevice::disconnect(); + _receive_change(Powerdown); + _send_change(Powerdown); + } + + unlock(); +} + +bool USBAudio::read(uint8_t *buf, uint32_t size) +{ + lock(); + + uint32_t actual; + AsyncRead read(this, buf, size, &actual, true); + _read_list.add(&read); + + unlock(); + + read.wait(NULL); + return read.result; +} + +void USBAudio::read_nb(uint8_t *buf, uint32_t size, uint32_t *actual) +{ + + lock(); + + uint32_t available = _rx_queue.size(); + uint32_t copy_size = available > size ? size : available; + _rx_queue.read(buf, copy_size); + *actual = copy_size; + + unlock(); +} + +uint32_t USBAudio::read_overflows(bool clear) +{ + lock(); + + uint32_t overflows = _rx_overflow; + if (clear) { + _rx_overflow = 0; + } + + unlock(); + return overflows; +} + + +bool USBAudio::read_ready() +{ + lock(); + + bool ready = _rx_state == Opened; + + unlock(); + + return ready; +} + +void USBAudio::read_wait_ready() +{ + _flags.wait_any(READ_READY_UNBLOCK, osWaitForever, false); +} + +bool USBAudio::write(uint8_t *buf, uint32_t size) +{ + lock(); + + AsyncWrite write(this, buf, size); + _write_list.add(&write); + + unlock(); + + write.wait(NULL); + return write.result; +} + +void USBAudio::write_nb(uint8_t *buf, uint32_t size, uint32_t *actual) +{ + lock(); + + uint32_t available = _tx_queue.free(); + uint32_t copy_size = available > size ? size : available; + _tx_queue.write(buf, copy_size); + *actual = copy_size; + _send_isr_start(); + + unlock(); +} + +uint32_t USBAudio::write_underflows(bool clear) +{ + lock(); + + uint32_t underflows = _tx_underflow; + if (clear) { + _tx_underflow = 0; + } + + unlock(); + return underflows; +} + +bool USBAudio::write_ready() +{ + lock(); + + bool ready = _tx_state == Opened; + + unlock(); + + return ready; +} + +void USBAudio::write_wait_ready() +{ + _flags.wait_any(WRITE_READY_UNBLOCK, osWaitForever, false); +} + + +float USBAudio::get_volume() +{ + lock(); + + float ret = _mute ? 0.0 : _volume; + + unlock(); + return ret; +} + +void USBAudio::attach(Callback &cb) +{ + lock(); + + _update_vol = cb; + if (!_update_vol) { + _update_vol = stub_volume; + } + + unlock(); +} + +void USBAudio::attach_tx(Callback &cb) +{ + lock(); + + _tx_done = cb; + if (!_tx_done) { + _tx_done = callback(stub_handler); + } + + unlock(); +} + +void USBAudio::attach_rx(Callback &cb) +{ + lock(); + + _rx_done = cb; + if (!_rx_done) { + _rx_done = callback(stub_handler); + } + + unlock(); +} + +void USBAudio::callback_state_change(DeviceState new_state) +{ + assert_locked(); + + if (_connected && (new_state != Configured)) { + _receive_change(Closed); + _send_change(Closed); + } +} + +void USBAudio::callback_request(const setup_packet_t *setup) +{ + assert_locked(); + + RequestResult result = PassThrough; + uint8_t *data = NULL; + uint32_t size = 0; + + // Process class-specific requests + if (setup->bmRequestType.Type == CLASS_TYPE) { + + // Feature Unit: Interface = 0, ID = 2 + if (setup->wIndex == 0x0200) { + + // Master Channel + if ((setup->wValue & 0xff) == 0) { + + switch (setup->wValue >> 8) { + case MUTE_CONTROL: + switch (setup->bRequest) { + case REQUEST_GET_CUR: + size = 1; + data = &_mute; + result = Send; + break; + + case REQUEST_SET_CUR: + size = 1; + data = _control_receive; + result = Receive; + break; + default: + break; + } + break; + case VOLUME_CONTROL: + switch (setup->bRequest) { + case REQUEST_GET_CUR: + size = 2; + data = (uint8_t *)&_vol_cur; + result = Send; + break; + case REQUEST_GET_MIN: + size = 2; + data = (uint8_t *)&_vol_min; + result = Send; + break; + case REQUEST_GET_MAX: + size = 2; + data = (uint8_t *)&_vol_max; + result = Send; + break; + case REQUEST_GET_RES: + size = 2; + data = (uint8_t *)&_vol_res; + result = Send; + break; + + case REQUEST_SET_CUR: + size = 2; + data = _control_receive; + result = Receive; + break; + case REQUEST_SET_MIN: + size = 2; + data = _control_receive; + result = Receive; + break; + case REQUEST_SET_MAX: + size = 2; + data = _control_receive; + result = Receive; + break; + case REQUEST_SET_RES: + size = 2; + data = _control_receive; + result = Receive; + break; + } + break; + default: + break; + } + } + } + } + complete_request(result, data, size); +} + +void USBAudio::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) +{ + assert_locked(); + + if (aborted) { + complete_request_xfer_done(false); + return; + } + + if (setup->bmRequestType.dataTransferDirection == DEVICE_TO_HOST) { + complete_request_xfer_done(true); + return; + } + + if ((setup->wLength == 1) || (setup->wLength == 2)) { + uint16_t data = (_control_receive[0] << 0) | (_control_receive[1] << 8); + data &= ((setup->wLength == 1) ? 0xFF : 0xFFFF); + switch (setup->wValue >> 8) { + case MUTE_CONTROL: + switch (setup->bRequest) { + case REQUEST_SET_CUR: + _mute = data & 0xff; + _update_vol.call(); + break; + default: + break; + } + break; + case VOLUME_CONTROL: + switch (setup->bRequest) { + case REQUEST_SET_CUR: + _vol_cur = data; + _volume = (float)_vol_cur / (float)_vol_max; + _update_vol.call(); + break; + default: + break; + } + break; + default: + break; + } + complete_request_xfer_done(true); + return; + } + + complete_request_xfer_done(false); +} + +void USBAudio::callback_set_configuration(uint8_t configuration) +{ + assert_locked(); + + bool ret = false; + if (configuration == DEFAULT_CONFIGURATION) { + endpoint_remove_all(); + + // Configure isochronous endpoint + endpoint_add(_episo_out, _rx_packet_size_max, USB_EP_TYPE_ISO, static_cast(&USBAudio::_receive_isr)); + endpoint_add(_episo_in, _tx_packet_size_max, USB_EP_TYPE_ISO, static_cast(&USBAudio::_send_isr)); + + // activate readings on this endpoint + read_start(_episo_out, _rx_packet_buf, _rx_packet_size_max); + ret = true; + } + complete_set_configuration(ret); +} + +void USBAudio::callback_set_interface(uint16_t interface, uint8_t alternate) +{ + assert_locked(); + + bool ret = false; + if (interface == 0 && alternate == 0) { + ret = true; + } + if (interface == 1 && (alternate == 0 || alternate == 1)) { + _receive_change(alternate == 1 ? Opened : Closed); + ret = true; + } + if (interface == 2 && (alternate == 0 || alternate == 1)) { + _send_change(alternate == 1 ? Opened : Closed); + ret = true; + } + complete_set_interface(ret); +} + +const uint8_t *USBAudio::configuration_desc(uint8_t index) +{ + if (index != 0) { + return NULL; + } + return _config_descriptor; +} + +const uint8_t *USBAudio::string_iinterface_desc() +{ + static const uint8_t stringIinterfaceDescriptor[] = { + 0x0c, //bLength + STRING_DESCRIPTOR, //bDescriptorType 0x03 + 'A', 0, 'u', 0, 'd', 0, 'i', 0, 'o', 0 //bString iInterface - Audio + }; + return stringIinterfaceDescriptor; +} + +const uint8_t *USBAudio::string_iproduct_desc() +{ + static const uint8_t stringIproductDescriptor[] = { + 0x16, //bLength + STRING_DESCRIPTOR, //bDescriptorType 0x03 + 'M', 0, 'b', 0, 'e', 0, 'd', 0, ' ', 0, 'A', 0, 'u', 0, 'd', 0, 'i', 0, 'o', 0 //bString iProduct - Mbed Audio + }; + return stringIproductDescriptor; +} + +#define TOTAL_DESCRIPTOR_LENGTH ((1 * CONFIGURATION_DESCRIPTOR_LENGTH) \ + + (5 * INTERFACE_DESCRIPTOR_LENGTH) \ + + (1 * CONTROL_INTERFACE_DESCRIPTOR_LENGTH + 1) \ + + (2 * INPUT_TERMINAL_DESCRIPTOR_LENGTH) \ + + (1 * FEATURE_UNIT_DESCRIPTOR_LENGTH) \ + + (2 * OUTPUT_TERMINAL_DESCRIPTOR_LENGTH) \ + + (2 * STREAMING_INTERFACE_DESCRIPTOR_LENGTH) \ + + (2 * FORMAT_TYPE_I_DESCRIPTOR_LENGTH) \ + + (2 * (ENDPOINT_DESCRIPTOR_LENGTH + 2)) \ + + (2 * STREAMING_ENDPOINT_DESCRIPTOR_LENGTH) ) + +#define TOTAL_CONTROL_INTF_LENGTH (CONTROL_INTERFACE_DESCRIPTOR_LENGTH + 1 + \ + 2*INPUT_TERMINAL_DESCRIPTOR_LENGTH + \ + FEATURE_UNIT_DESCRIPTOR_LENGTH + \ + 2*OUTPUT_TERMINAL_DESCRIPTOR_LENGTH) + +void USBAudio::_build_configuration_desc() +{ + uint8_t config_descriptor_temp[] = { + // Configuration 1 + CONFIGURATION_DESCRIPTOR_LENGTH, // bLength + CONFIGURATION_DESCRIPTOR, // bDescriptorType + LSB(TOTAL_DESCRIPTOR_LENGTH), // wTotalLength (LSB) + MSB(TOTAL_DESCRIPTOR_LENGTH), // wTotalLength (MSB) + 0x03, // bNumInterfaces + DEFAULT_CONFIGURATION, // bConfigurationValue + 0x00, // iConfiguration + 0x80, // bmAttributes + 50, // bMaxPower + + // Interface 0, Alternate Setting 0, Audio Control + INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0x00, // bInterfaceNumber + 0x00, // bAlternateSetting + 0x00, // bNumEndpoints + AUDIO_CLASS, // bInterfaceClass + SUBCLASS_AUDIOCONTROL, // bInterfaceSubClass + 0x00, // bInterfaceProtocol + 0x00, // iInterface + + + // Audio Control Interface + CONTROL_INTERFACE_DESCRIPTOR_LENGTH + 1,// bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + CONTROL_HEADER, // bDescriptorSubtype + LSB(0x0100), // bcdADC (LSB) + MSB(0x0100), // bcdADC (MSB) + LSB(TOTAL_CONTROL_INTF_LENGTH), // wTotalLength + MSB(TOTAL_CONTROL_INTF_LENGTH), // wTotalLength + 0x02, // bInCollection + 0x01, // baInterfaceNr + 0x02, // baInterfaceNr + + // Audio Input Terminal (Speaker) + INPUT_TERMINAL_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + CONTROL_INPUT_TERMINAL, // bDescriptorSubtype + 0x01, // bTerminalID + LSB(TERMINAL_USB_STREAMING), // wTerminalType + MSB(TERMINAL_USB_STREAMING), // wTerminalType + 0x00, // bAssocTerminal + _rx_channel_count, // bNrChannels + (uint8_t)(LSB(_channel_config_rx)), // wChannelConfig + (uint8_t)(MSB(_channel_config_rx)), // wChannelConfig + 0x00, // iChannelNames + 0x00, // iTerminal + + // Audio Feature Unit (Speaker) + FEATURE_UNIT_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + CONTROL_FEATURE_UNIT, // bDescriptorSubtype + 0x02, // bUnitID + 0x01, // bSourceID + 0x01, // bControlSize + CONTROL_MUTE | + CONTROL_VOLUME, // bmaControls(0) + 0x00, // bmaControls(1) + 0x00, // iTerminal + + // Audio Output Terminal (Speaker) + OUTPUT_TERMINAL_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + CONTROL_OUTPUT_TERMINAL, // bDescriptorSubtype + 0x03, // bTerminalID + LSB(TERMINAL_SPEAKER), // wTerminalType + MSB(TERMINAL_SPEAKER), // wTerminalType + 0x00, // bAssocTerminal + 0x02, // bSourceID + 0x00, // iTerminal + + + // Audio Input Terminal (Microphone) + INPUT_TERMINAL_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + CONTROL_INPUT_TERMINAL, // bDescriptorSubtype + 0x04, // bTerminalID + LSB(TERMINAL_MICROPHONE), // wTerminalType + MSB(TERMINAL_MICROPHONE), // wTerminalType + 0x00, // bAssocTerminal + _tx_channel_count, // bNrChannels + (uint8_t)(LSB(_channel_config_tx)), // wChannelConfig + (uint8_t)(MSB(_channel_config_tx)), // wChannelConfig + 0x00, // iChannelNames + 0x00, // iTerminal + + // Audio Output Terminal (Microphone) + OUTPUT_TERMINAL_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + CONTROL_OUTPUT_TERMINAL, // bDescriptorSubtype + 0x05, // bTerminalID + LSB(TERMINAL_USB_STREAMING), // wTerminalType + MSB(TERMINAL_USB_STREAMING), // wTerminalType + 0x00, // bAssocTerminal + 0x04, // bSourceID + 0x00, // iTerminal + + + + + + + // Interface 1, Alternate Setting 0, Audio Streaming - Zero Bandwith + INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0x01, // bInterfaceNumber + 0x00, // bAlternateSetting + 0x00, // bNumEndpoints + AUDIO_CLASS, // bInterfaceClass + SUBCLASS_AUDIOSTREAMING, // bInterfaceSubClass + 0x00, // bInterfaceProtocol + 0x00, // iInterface + + // Interface 1, Alternate Setting 1, Audio Streaming - Operational + INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0x01, // bInterfaceNumber + 0x01, // bAlternateSetting + 0x01, // bNumEndpoints + AUDIO_CLASS, // bInterfaceClass + SUBCLASS_AUDIOSTREAMING, // bInterfaceSubClass + 0x00, // bInterfaceProtocol + 0x00, // iInterface + + // Audio Streaming Interface + STREAMING_INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + STREAMING_GENERAL, // bDescriptorSubtype + 0x01, // bTerminalLink + 0x00, // bDelay + LSB(FORMAT_PCM), // wFormatTag + MSB(FORMAT_PCM), // wFormatTag + + // Audio Type I Format + FORMAT_TYPE_I_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + STREAMING_FORMAT_TYPE, // bDescriptorSubtype + FORMAT_TYPE_I, // bFormatType + _rx_channel_count, // bNrChannels + 0x02, // bSubFrameSize + 16, // bBitResolution + 0x01, // bSamFreqType + (uint8_t)(LSB(_rx_freq)), // tSamFreq + (uint8_t)((_rx_freq >> 8) & 0xff), // tSamFreq + (uint8_t)((_rx_freq >> 16) & 0xff), // tSamFreq + + // Endpoint - Standard Descriptor + ENDPOINT_DESCRIPTOR_LENGTH + 2, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _episo_out, // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t)(LSB(_rx_packet_size_max)), // wMaxPacketSize + (uint8_t)(MSB(_rx_packet_size_max)), // wMaxPacketSize + 0x01, // bInterval + 0x00, // bRefresh + 0x00, // bSynchAddress + + // Endpoint - Audio Streaming + STREAMING_ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR_TYPE, // bDescriptorType + ENDPOINT_GENERAL, // bDescriptor + 0x00, // bmAttributes + 0x00, // bLockDelayUnits + LSB(0x0000), // wLockDelay + MSB(0x0000), // wLockDelay + + + // Interface 1, Alternate Setting 0, Audio Streaming - Zero Bandwith + INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0x02, // bInterfaceNumber + 0x00, // bAlternateSetting + 0x00, // bNumEndpoints + AUDIO_CLASS, // bInterfaceClass + SUBCLASS_AUDIOSTREAMING, // bInterfaceSubClass + 0x00, // bInterfaceProtocol + 0x00, // iInterface + + // Interface 1, Alternate Setting 1, Audio Streaming - Operational + INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0x02, // bInterfaceNumber + 0x01, // bAlternateSetting + 0x01, // bNumEndpoints + AUDIO_CLASS, // bInterfaceClass + SUBCLASS_AUDIOSTREAMING, // bInterfaceSubClass + 0x00, // bInterfaceProtocol + 0x00, // iInterface + + // Audio Streaming Interface + STREAMING_INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + SUBCLASS_AUDIOCONTROL, // bDescriptorSubtype + 0x05, // bTerminalLink (output terminal microphone) + 0x01, // bDelay + 0x01, // wFormatTag + 0x00, // wFormatTag + + // Audio Type I Format + FORMAT_TYPE_I_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + SUBCLASS_AUDIOSTREAMING, // bDescriptorSubtype + FORMAT_TYPE_I, // bFormatType + _tx_channel_count, // bNrChannels + 0x02, // bSubFrameSize + 0x10, // bBitResolution + 0x01, // bSamFreqType + (uint8_t)(LSB(_tx_freq)), // tSamFreq + (uint8_t)((_tx_freq >> 8) & 0xff), // tSamFreq + (uint8_t)((_tx_freq >> 16) & 0xff), // tSamFreq + + // Endpoint - Standard Descriptor + ENDPOINT_DESCRIPTOR_LENGTH + 2, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _episo_in, // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t)(LSB(_tx_packet_size_max)), // wMaxPacketSize + (uint8_t)(MSB(_tx_packet_size_max)), // wMaxPacketSize + 0x01, // bInterval + 0x00, // bRefresh + 0x00, // bSynchAddress + + // Endpoint - Audio Streaming + STREAMING_ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR_TYPE, // bDescriptorType + ENDPOINT_GENERAL, // bDescriptor + 0x00, // bmAttributes + 0x00, // bLockDelayUnits + LSB(0x0000), // wLockDelay + MSB(0x0000), // wLockDelay + }; + + MBED_ASSERT(sizeof(config_descriptor_temp) == sizeof(_config_descriptor)); + memcpy(_config_descriptor, config_descriptor_temp, sizeof(_config_descriptor)); +} + +void USBAudio::_receive_change(ChannelState new_state) +{ + assert_locked(); + + ChannelState prev_state = _rx_state; + _rx_state = new_state; + if (prev_state == new_state) { + // no change + return; + } + + if (prev_state == Opened) { + // Leaving the opened state + _read_list.process(); + _rx_done.call(End); + } + if (new_state == Opened) { + // Entering the opened state + _read_list.process(); + _rx_done.call(Start); + } + if (new_state == Closed) { + // Only block if the channel is closed + _flags.clear(READ_READY_UNBLOCK); + } else { + _flags.set(READ_READY_UNBLOCK); + } +} + +void USBAudio::_receive_isr(usb_ep_t ep) +{ + assert_locked(); + MBED_ASSERT(ep == _episo_out); + + uint32_t size = read_finish(_episo_out); + + if (size > _rx_queue.free()) { + _rx_overflow++; + } else { + + // Copy data over + _rx_queue.write(_rx_packet_buf, size); + + // Signal that there is more data available + _read_list.process(); + if (_rx_done) { + _rx_done.call(Transfer); + } + } + + read_start(_episo_out, _rx_packet_buf, _rx_packet_size_max); +} + +void USBAudio::_send_change(ChannelState new_state) +{ + assert_locked(); + + ChannelState prev_state = _tx_state; + _tx_state = new_state; + if (prev_state == new_state) { + // no change + return; + } + + if (prev_state == Opened) { + // Leaving the opened state + _write_list.process(); + _tx_done.call(End); + } + if (new_state == Opened) { + // Entering the opened state + _write_list.process(); + _tx_done.call(Start); + } + if (new_state == Closed) { + // Only block if the channel is closed + _flags.clear(WRITE_READY_UNBLOCK); + } else { + _flags.set(WRITE_READY_UNBLOCK); + } +} +void USBAudio::_send_isr_start() +{ + assert_locked(); + + if (!_tx_idle) { + return; + } + + _send_isr_next_sync(); +} + +void USBAudio::_send_isr_next_sync() +{ + // Compute size to send + uint32_t fames = _tx_whole_frames_per_xfer; + if (_tx_frame_fract >= XFER_FREQUENCY_HZ) { + _tx_frame_fract -= XFER_FREQUENCY_HZ; + fames += 1; + } + uint32_t send_size = fames * _tx_channel_count * 2; + + // Check if this is the initial TX packet + if (_tx_idle && !_tx_queue.full()) { + // Don't start until the TX buffer is full + return; + } + + // Check if this stream was closed + if (_tx_state != Opened) { + _tx_idle = true; + return; + } + + // Check for enough data to send + if (_tx_queue.size() < send_size) { + _tx_underflow++; + _tx_idle = true; + return; + } + + // Copy data over + _tx_queue.read(_tx_packet_buf, send_size); + + // Start the write + write_start(_episo_in, _tx_packet_buf, send_size); + _tx_idle = false; + _tx_frame_fract += _tx_fract_frames_per_xfer; +} + +void USBAudio::_send_isr(usb_ep_t ep) +{ + assert_locked(); + MBED_ASSERT(ep == _episo_in); + + write_finish(_episo_in); + + _send_isr_next_sync(); + + // Signal that there is space for more data + _write_list.process(); + if (_tx_done) { + _tx_done.call(Transfer); + } +} + diff --git a/usb/device/USBAudio/USBAudio.h b/usb/device/USBAudio/USBAudio.h new file mode 100644 index 00000000000..fec17615f1e --- /dev/null +++ b/usb/device/USBAudio/USBAudio.h @@ -0,0 +1,375 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBAudio_H +#define USBAudio_H + +/* These headers are included for child class. */ +#include "USBDescriptor.h" +#include "USBDevice_Types.h" + +#include "USBDevice.h" +#include "Callback.h" +#include "OperationList.h" +#include "ByteBuffer.h" +#include "rtos/EventFlags.h" + +/** +* USBAudio example +* +* @code +* #include "mbed.h" +* #include "USBAudio.h" +* +* // Audio loopback example use: +* // 1. Select "Mbed Audio" as your sound device +* // 2. Play a song or audio file +* // 3. Record the output using a program such as Audacity +* +* int main() { +* +* USBAudio audio(true, 44100, 2, 44100, 2); +* +* printf("Looping audio\r\n"); +* static uint8_t buf[128]; +* while (true) { +* if (!audio.read(buf, sizeof(buf))) { +* memset(buf, 0, sizeof(buf)); +* } +* audio.write(buf, sizeof(buf)); +* } +* } +* @endcode +*/ +class USBAudio: protected USBDevice { +public: + + enum AudioEvent { + Start, + Transfer, + End + }; + + /** + * Basic constructor + * + * Construct this object optionally connecting. + * + * @note Do not use this constructor in derived classes. + * + * @param connect Call connect on initialization + * @param frequency_rx frequency in Hz (default: 48000) + * @param channel_count_rx channel number (1 or 2) (default: 1) + * @param frequency_tx frequency in Hz (default: 8000) + * @param channel_count_tx channel number (1 or 2) (default: 1) + * @param buffer_ms time audio can be buffered without overflowing in milliseconds + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBAudio(bool connect=true, uint32_t frequency_rx = 48000, uint8_t channel_count_rx = 1, uint32_t frequency_tx = 8000, uint8_t channel_count_tx = 1, uint32_t buffer_ms=10, uint16_t vendor_id = 0x7bb8, uint16_t product_id = 0x1111, uint16_t product_release = 0x0100); + + /** + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. + * + * @param phy USB phy to use + * @param frequency_rx frequency in Hz (default: 48000) + * @param channel_count_rx channel number (1 or 2) (default: 1) + * @param frequency_tx frequency in Hz (default: 8000) + * @param channel_count_tx channel number (1 or 2) (default: 1) + * @param buffer_ms time audio can be buffered without overflowing in milliseconds + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBAudio(USBPhy *phy, uint32_t frequency_rx, uint8_t channel_count_rx, uint32_t frequency_tx, uint8_t channel_count_tx, uint32_t buffer_ms, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ + virtual ~USBAudio(); + + /** + * Connect USBAudio + */ + void connect(); + + /** + * Disconnect USBAudio + * + * This unblocks all calls to read_ready and write_ready. + */ + void disconnect(); + + /** + * Read audio data + * + * @param buf pointer on a buffer which will be filled with audio data + * @param size size to read + * + * @returns true if successful + */ + bool read(uint8_t *buf, uint32_t size); + + /** + * Nonblocking audio data read + * + * Read the available audio data. + * + * @param buf pointer on a buffer which will be filled with audio data + * @param size size to read + * @param actual size actually read + * @note This function is safe to call from USBAudio callbacks. + */ + void read_nb(uint8_t *buf, uint32_t size, uint32_t *actual); + + /** + * Return the number read packets dropped due to overflow + * + * @param clear Reset the overflow count back to 0 + * @return Number of packets dropped due to overflow + */ + uint32_t read_overflows(bool clear=false); + + /** + * Check if the audio read channel is open + * + * @return true if the audio read channel open, false otherwise + */ + bool read_ready(); + + /** + * Wait until the audio read channel is open + */ + void read_wait_ready(); + + /** + * Write audio data + * + * @param buf pointer to audio data to write + * @param size size to write + * + * @returns true if successful + */ + bool write(uint8_t *buf, uint32_t size); + + /** + * Nonblocking audio data write + * + * Write the available audio data. + * + * @param buf pointer to audio data to write + * @param size size to write + * @param actual actual size written + * @note This function is safe to call from USBAudio callbacks. + */ + void write_nb(uint8_t *buf, uint32_t size, uint32_t *actual); + + /** + * Return the number write packets not sent due to underflow + * + * @param clear Reset the underflow count back to 0 + * @return Number of packets that should have been + * sent but weren't due to overflow + */ + uint32_t write_underflows(bool clear=false); + + /** + * Check if the audio write channel is open + * + * @return true if the audio write channel open, false otherwise + */ + bool write_ready(); + + /** + * Wait until the audio write channel is open + */ + void write_wait_ready(); + + /** + * Get current volume between 0.0 and 1.0 + * + * @returns volume + */ + float get_volume(); + + /** Attach a Callback to update the volume + * + * @param cb Callback to attach + * + */ + void attach(Callback &cb); + + /** attach a Callback to Tx Done + * + * @param cb Callback to attach + * + */ + void attach_tx(Callback &cb); + + /** attach a Callback to Rx Done + * + * @param cb Callback to attach + * + */ + void attach_rx(Callback &cb); + +protected: + + virtual void callback_state_change(DeviceState new_state); + virtual void callback_request(const setup_packet_t *setup); + virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); + virtual void callback_set_configuration(uint8_t configuration); + virtual void callback_set_interface(uint16_t interface, uint8_t alternate); + + virtual const uint8_t *string_iproduct_desc(); + virtual const uint8_t *string_iinterface_desc(); + virtual const uint8_t *configuration_desc(uint8_t index); + +private: + + class AsyncWrite; + class AsyncRead; + + enum ChannelState { + Powerdown, + Closed, + Opened + }; + + void _init(uint32_t frequency_rx, uint8_t channel_count_rx, uint32_t frequency_tx, uint8_t channel_count_tx, uint32_t buffer_ms); + + /* + * Call to rebuild the configuration descriptor + * + * This function should be called on creation or when any + * value that is part of the configuration descriptor + * changes. + * @note This function uses ~200 bytes of stack so + * make sure your stack is big enough for it. + */ + void _build_configuration_desc(); + + void _receive_change(ChannelState new_state); + void _receive_isr(usb_ep_t ep); + void _send_change(ChannelState new_state); + void _send_isr_start(); + void _send_isr_next_sync(); + void _send_isr(usb_ep_t ep); + + // has connect been called + bool _connected; + + // audio volume + float _volume; + + // mute state + uint8_t _mute; + + // Volume Current Value + uint16_t _vol_cur; + + // Volume Minimum Value + uint16_t _vol_min; + + // Volume Maximum Value + uint16_t _vol_max; + + // Volume Resolution + uint16_t _vol_res; + + // callback to update volume + Callback _update_vol; + + // callback transmit Done + Callback _tx_done; + + // callback receive Done + Callback _rx_done; + + // Number of times data was dropped due to an overflow + uint32_t _rx_overflow; + + // Number of times data was not sent due to an underflow + uint32_t _tx_underflow; + + // frequency in Hz + uint32_t _tx_freq; + uint32_t _rx_freq; + + // mono, stereo,... + uint8_t _rx_channel_count; + uint8_t _tx_channel_count; + + bool _tx_idle; + uint16_t _tx_frame_fract; + uint16_t _tx_whole_frames_per_xfer; + uint16_t _tx_fract_frames_per_xfer; + + // size of the maximum packet for the isochronous endpoint + uint16_t _tx_packet_size_max; + uint16_t _rx_packet_size_max; + + // Buffer used for the isochronous transfer + uint8_t *_tx_packet_buf; + uint8_t *_rx_packet_buf; + + // Holding buffer + ByteBuffer _tx_queue; + ByteBuffer _rx_queue; + + // State of the audio channels + ChannelState _tx_state; + ChannelState _rx_state; + + + // sample - a single PCM audio sample + // frame - a group of samples from each channel + // packet - a group of frames sent over USB in one transfer + + // Blocking primitives + OperationList _write_list; + OperationList _read_list; + rtos::EventFlags _flags; + + // endpoint numbers + usb_ep_t _episo_out; // rx endpoint + usb_ep_t _episo_in; // tx endpoint + + // channel config in the configuration descriptor: master, left, right + uint8_t _channel_config_rx; + uint8_t _channel_config_tx; + + // configuration descriptor + uint8_t _config_descriptor[183]; + + // buffer for control requests + uint8_t _control_receive[2]; + +}; + +#endif diff --git a/usb/device/USBAudio/USBAudio_Types.h b/usb/device/USBAudio/USBAudio_Types.h new file mode 100644 index 00000000000..bedb0cfe428 --- /dev/null +++ b/usb/device/USBAudio/USBAudio_Types.h @@ -0,0 +1,95 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBAUDIO_TYPES_H +#define USBAUDIO_TYPES_H + + +#define DEFAULT_CONFIGURATION (1) + +// Audio Request Codes +#define REQUEST_SET_CUR 0x01 +#define REQUEST_GET_CUR 0x81 +#define REQUEST_SET_MIN 0x02 +#define REQUEST_GET_MIN 0x82 +#define REQUEST_SET_MAX 0x03 +#define REQUEST_GET_MAX 0x83 +#define REQUEST_SET_RES 0x04 +#define REQUEST_GET_RES 0x84 + +#define MUTE_CONTROL 0x01 +#define VOLUME_CONTROL 0x02 + + +// Audio Descriptor Sizes +#define CONTROL_INTERFACE_DESCRIPTOR_LENGTH 0x09 +#define STREAMING_INTERFACE_DESCRIPTOR_LENGTH 0x07 +#define INPUT_TERMINAL_DESCRIPTOR_LENGTH 0x0C +#define OUTPUT_TERMINAL_DESCRIPTOR_LENGTH 0x09 +#define FEATURE_UNIT_DESCRIPTOR_LENGTH 0x09 +#define STREAMING_ENDPOINT_DESCRIPTOR_LENGTH 0x07 + +// Audio Format Type Descriptor Sizes +#define FORMAT_TYPE_I_DESCRIPTOR_LENGTH 0x0b + +#define AUDIO_CLASS 0x01 +#define SUBCLASS_AUDIOCONTROL 0x01 +#define SUBCLASS_AUDIOSTREAMING 0x02 + +// Audio Descriptor Types +#define INTERFACE_DESCRIPTOR_TYPE 0x24 +#define ENDPOINT_DESCRIPTOR_TYPE 0x25 + +// Audio Control Interface Descriptor Subtypes +#define CONTROL_HEADER 0x01 +#define CONTROL_INPUT_TERMINAL 0x02 +#define CONTROL_OUTPUT_TERMINAL 0x03 +#define CONTROL_FEATURE_UNIT 0x06 + +// USB Terminal Types +#define TERMINAL_USB_STREAMING 0x0101 + +// Predefined Audio Channel Configuration Bits +// Mono +#define CHANNEL_M 0x0000 +#define CHANNEL_L 0x0001 /* Left Front */ +#define CHANNEL_R 0x0002 /* Right Front */ + +// Feature Unit Control Bits +#define CONTROL_MUTE 0x0001 +#define CONTROL_VOLUME 0x0002 + +// Input Terminal Types +#define TERMINAL_MICROPHONE 0x0201 + +// Output Terminal Types +#define TERMINAL_SPEAKER 0x0301 +#define TERMINAL_HEADPHONES 0x0302 + +// Audio Streaming Interface Descriptor Subtypes +#define STREAMING_GENERAL 0x01 +#define STREAMING_FORMAT_TYPE 0x02 + +// Audio Data Format Type I Codes +#define FORMAT_PCM 0x0001 + +// Audio Format Types +#define FORMAT_TYPE_I 0x01 + +// Audio Endpoint Descriptor Subtypes +#define ENDPOINT_GENERAL 0x01 + +#endif From 636477b2e94a7e01171f7b9465125997b8dc0fa5 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 15 Jun 2018 18:55:00 -0500 Subject: [PATCH 086/488] Fix various USB warnings Fix the following warnings: -[Warning] USBTester.cpp@45,0: #1299-D: members and base-classes will be initialized in declaration order, not in member initialisation list order -[Warning] USBTester.h@41,0: #1300-D: ~USBTester inherits implicit virtual -[Warning] USBAudio.cpp@345,0: #1035-D: single-precision operand implicitly converted to double-precision -[Warning] USBHID.cpp@29,0: #1300-D: ~AsyncSend inherits implicit virtual -[Warning] USBHID.cpp@61,0: #1300-D: ~AsyncRead inherits implicit virtual -[Warning] USBHID.cpp@93,0: #1300-D: ~AsyncWait inherits implicit virtual -[Warning] EndpointResolver.cpp@125,26: '<<' in boolean context, did you mean '<' ? [-Wint-in-bool-context] --- TESTS/usb_device/basic/USBTester.cpp | 5 +++-- TESTS/usb_device/basic/USBTester.h | 2 +- usb/device/USBAudio/USBAudio.cpp | 2 +- usb/device/USBDevice/EndpointResolver.cpp | 2 +- usb/device/USBHID/USBHID.cpp | 6 +++--- 5 files changed, 9 insertions(+), 8 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index fa484115607..4a62b91f0c2 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -41,8 +41,9 @@ USBTester::USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): - USBDevice(phy, vendor_id, product_id, product_release), reset_count(0), suspend_count(0), - resume_count(0), interface_0_alt_set(NONE), interface_1_alt_set(NONE), configuration_set(NONE) + USBDevice(phy, vendor_id, product_id, product_release), interface_0_alt_set(NONE), + interface_1_alt_set(NONE), configuration_set(NONE), reset_count(0), + suspend_count(0), resume_count(0) { EndpointResolver resolver(endpoint_table()); diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index 5cae22ac2b1..1f9349387eb 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -38,7 +38,7 @@ class USBTester: public USBDevice { */ USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); - ~USBTester(); + virtual ~USBTester(); /* * diff --git a/usb/device/USBAudio/USBAudio.cpp b/usb/device/USBAudio/USBAudio.cpp index dfd04ced263..abd899ab45f 100644 --- a/usb/device/USBAudio/USBAudio.cpp +++ b/usb/device/USBAudio/USBAudio.cpp @@ -342,7 +342,7 @@ float USBAudio::get_volume() { lock(); - float ret = _mute ? 0.0 : _volume; + float ret = _mute ? 0.0f : _volume; unlock(); return ret; diff --git a/usb/device/USBDevice/EndpointResolver.cpp b/usb/device/USBDevice/EndpointResolver.cpp index ad45006bb2e..e06b8929600 100644 --- a/usb/device/USBDevice/EndpointResolver.cpp +++ b/usb/device/USBDevice/EndpointResolver.cpp @@ -122,7 +122,7 @@ int EndpointResolver::next_index(usb_ep_type_t type, bool in_not_out) continue; } - if (shared && (1 << other)) { + if (shared && (_used & (1 << other))) { // This endpoint can only be one direction at a time and is in // use by the other direction continue; diff --git a/usb/device/USBHID/USBHID.cpp b/usb/device/USBHID/USBHID.cpp index 8045459f161..14bc74ee06f 100644 --- a/usb/device/USBHID/USBHID.cpp +++ b/usb/device/USBHID/USBHID.cpp @@ -26,7 +26,7 @@ class USBHID::AsyncSend: public AsyncOp { } - ~AsyncSend() + virtual ~AsyncSend() { } @@ -58,7 +58,7 @@ class USBHID::AsyncRead: public AsyncOp { } - ~AsyncRead() + virtual ~AsyncRead() { } @@ -90,7 +90,7 @@ class USBHID::AsyncWait: public AsyncOp { } - ~AsyncWait() + virtual ~AsyncWait() { } From fd910e34c33c879adbeb59781aeabf82eb660798 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 25 May 2018 11:19:34 -0500 Subject: [PATCH 087/488] Fix unbalanced USBDevice unlock Remove calls to unlock which are not preceded by calls to lock. Also move the location of the unlock underflow assert so unbalanced unlocking during post processing is caught. --- usb/device/USBDevice/USBDevice.cpp | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 3c73170c4b2..600520af4f7 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -331,13 +331,11 @@ void USBDevice::_complete_request_xfer_done() _transfer.user_callback = None; if (_abort_control) { _control_abort(); - unlock(); return; } if (!success) { _phy->ep0_stall(); - unlock(); return; } @@ -405,7 +403,6 @@ void USBDevice::_complete_set_configuration() _transfer.user_callback = None; if (_abort_control) { _control_abort(); - unlock(); return; } @@ -478,7 +475,6 @@ void USBDevice::_complete_set_interface() _transfer.user_callback = None; if (_abort_control) { _control_abort(); - unlock(); return; } @@ -716,7 +712,6 @@ void USBDevice::_complete_request() } else { _control_abort(); } - unlock(); return; } @@ -1563,8 +1558,6 @@ void USBDevice::lock() void USBDevice::unlock() { - MBED_ASSERT(_locked > 0); - if (_locked == 1) { // Perform post processing before fully unlocking while (_post_process != NULL) { @@ -1574,6 +1567,7 @@ void USBDevice::unlock() } } + MBED_ASSERT(_locked > 0); _locked--; core_util_critical_section_exit(); } From a4a7fbd9ad05c569bced1e6b0f45ee31a02e8df3 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 25 May 2018 12:00:04 -0500 Subject: [PATCH 088/488] Update USBDevice endpoint checks to fix asserts Only assert if disabled endpoints are used when USBDevice is configured. USBDevice can leave the configured state due to a reset at any time, which disables all endpoints. Because this can happen at any time, thread processing could be performing any endpoint operation. The endpoint operation should return failure and do nothing in this case, rather than asserting as this is not an application error. An assert should only be triggered when an invalid endpoint is used after the use of USBDevice acknoledges the switch to configured mode by complete_set_configuration. In specific this PR fixes the assert caused with the following sequence: -ISR: OUT event sent -ISR: USB reset event -ISR: USB configure request start -Thread: OUT event processed on thread and next read starts ***endpoint is used while disabled causing an invalid assert*** -Thread: reset event processed -Thread: configure event processed This patch fixes this problem by making the following changes: 1. Operations done on disabled endpoints only assert when in the configured state 2. Adding and removing endpoints is only allowed when the flag _endpoint_add_remove_allowed is set 3. The flag _endpoint_add_remove_allowed is set on the set configuration request and cleared if the request is aborted or fails --- usb/device/USBDevice/USBDevice.cpp | 85 ++++++++++++++++-------------- usb/device/USBDevice/USBDevice.h | 1 + 2 files changed, 45 insertions(+), 41 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 600520af4f7..c4fc4e17f67 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -376,6 +376,7 @@ bool USBDevice::_request_set_configuration() _phy->unconfigure(); _change_state(Address); } else { + _endpoint_add_remove_allowed = true; _transfer.user_callback = SetConfiguration; callback_set_configuration(_device.configuration); } @@ -399,6 +400,14 @@ void USBDevice::_complete_set_configuration() assert_locked(); bool success = _transfer.args.status; + if ((_abort_control || !success) && !configured()) { + // The set configuration request was aborted or failed so + // reset any endpoints which may have been added. + memset(_endpoint_info, 0, sizeof(_endpoint_info)); + _device.configuration = 0; + _endpoint_add_remove_allowed = false; + } + _transfer.user_callback = None; if (_abort_control) { @@ -1054,6 +1063,11 @@ bool USBDevice::endpoint_add(usb_ep_t endpoint, uint32_t max_packet_size, usb_ep return false; } + if (!_endpoint_add_remove_allowed) { + unlock(); + return false; + } + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; MBED_ASSERT(!(info->flags & ENDPOINT_ENABLED)); MBED_ASSERT(max_packet_size <= 1024); @@ -1080,6 +1094,11 @@ void USBDevice::endpoint_remove(usb_ep_t endpoint) return; } + if (!_endpoint_add_remove_allowed) { + unlock(); + return; + } + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; MBED_ASSERT(info->flags & ENDPOINT_ENABLED); @@ -1122,7 +1141,12 @@ void USBDevice::endpoint_stall(usb_ep_t endpoint) } endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; - MBED_ASSERT(info->flags & ENDPOINT_ENABLED); + if (!(info->flags & ENDPOINT_ENABLED)) { + // Invalid endpoint is being used + MBED_ASSERT(!configured()); + unlock(); + return; + } info->flags |= ENDPOINT_STALLED; _phy->endpoint_stall(endpoint); @@ -1141,7 +1165,12 @@ void USBDevice::endpoint_unstall(usb_ep_t endpoint) } endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; - MBED_ASSERT(info->flags & ENDPOINT_ENABLED); + if (!(info->flags & ENDPOINT_ENABLED)) { + // Invalid endpoint is being used + MBED_ASSERT(!configured()); + unlock(); + return; + } info->flags &= ~ENDPOINT_STALLED; _phy->endpoint_unstall(endpoint); @@ -1232,6 +1261,7 @@ USBDevice::USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint1 _phy = phy; _initialized = false; _connected = false; + _endpoint_add_remove_allowed = false; _current_interface = 0; _current_alternate = 0; _locked = 0; @@ -1275,16 +1305,10 @@ void USBDevice::endpoint_abort(usb_ep_t endpoint) return; } - bool configuring = _transfer.user_callback == SetConfiguration; - if (!configured() && !configuring) { - unlock(); - return; - } - endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; if (!(info->flags & ENDPOINT_ENABLED)) { - // Invalid endpoint is being used - MBED_ASSERT(0); + // Assert that only valid endpoints are used when in the configured state + MBED_ASSERT(!configured()); unlock(); return; } @@ -1307,16 +1331,10 @@ bool USBDevice::read_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size return false; } - bool configuring = _transfer.user_callback == SetConfiguration; - if (!configured() && !configuring) { - unlock(); - return false; - } - endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; if (!(info->flags & ENDPOINT_ENABLED)) { - // Invalid endpoint is being used - MBED_ASSERT(0); + // Assert that only valid endpoints are used when in the configured state + MBED_ASSERT(!configured()); unlock(); return false; } @@ -1353,15 +1371,10 @@ uint32_t USBDevice::read_finish(usb_ep_t endpoint) return 0; } - if (!configured()) { - unlock(); - return 0; - } - endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; if (!(info->flags & ENDPOINT_ENABLED)) { - // Invalid endpoint is being used - MBED_ASSERT(0); + // Assert that only valid endpoints are used when in the configured state + MBED_ASSERT(!configured()); unlock(); return 0; } @@ -1382,16 +1395,10 @@ bool USBDevice::write_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t size) return false; } - bool configuring = _transfer.user_callback == SetConfiguration; - if (!configured() && !configuring) { - unlock(); - return false; - } - endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; if (!(info->flags & ENDPOINT_ENABLED)) { - // Invalid endpoint is being used - MBED_ASSERT(0); + // Assert that only valid endpoints are used when in the configured state + MBED_ASSERT(!configured()); unlock(); return false; } @@ -1431,18 +1438,13 @@ uint32_t USBDevice::write_finish(usb_ep_t endpoint) if (!EP_INDEXABLE(endpoint)) { MBED_ASSERT(0); unlock(); - return false; - } - - if (!configured()) { - unlock(); - return false; + return 0; } endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; if (!(info->flags & ENDPOINT_ENABLED)) { - // Invalid endpoint is being used - MBED_ASSERT(0); + // Assert that only valid endpoints are used when in the configured state + MBED_ASSERT(!configured()); unlock(); return 0; } @@ -1593,6 +1595,7 @@ void USBDevice::_change_state(DeviceState new_state) { if (leaving_configured_state) { memset(_endpoint_info, 0, sizeof(_endpoint_info)); _device.configuration = 0; + _endpoint_add_remove_allowed = false; } if (leaving_default_state) { diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 40051ce9c08..8ef7008597f 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -595,6 +595,7 @@ class USBDevice: public USBPhyEvents { USBPhy *_phy; bool _initialized; bool _connected; + bool _endpoint_add_remove_allowed; control_transfer_t _transfer; usb_device_t _device; uint32_t _max_packet_size_ep0; From 8acc15dea0de747432694c96d4ede3d9d6901561 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 23 May 2018 15:56:10 -0500 Subject: [PATCH 089/488] Add the TaskQueue abstract interface and friends Add the classes Task, TaskBase and TaskQueue. TaskQueue queue is an interface class which can be implemented by anything which can run code. Task and TaskBase are concrete classes which allow callbacks to be posted to a TaskQueue to be run. --- usb/device/utilities/events/Task.h | 597 +++++++++++++++++++++++ usb/device/utilities/events/TaskBase.cpp | 151 ++++++ usb/device/utilities/events/TaskBase.h | 163 +++++++ usb/device/utilities/events/TaskQueue.h | 138 ++++++ 4 files changed, 1049 insertions(+) create mode 100644 usb/device/utilities/events/Task.h create mode 100644 usb/device/utilities/events/TaskBase.cpp create mode 100644 usb/device/utilities/events/TaskBase.h create mode 100644 usb/device/utilities/events/TaskQueue.h diff --git a/usb/device/utilities/events/Task.h b/usb/device/utilities/events/Task.h new file mode 100644 index 00000000000..1d51ac12e66 --- /dev/null +++ b/usb/device/utilities/events/Task.h @@ -0,0 +1,597 @@ +/* events + * Copyright (c) 2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_TASK_H +#define MBED_TASK_H + +#include "events/EventQueue.h" +#include "events/TaskBase.h" +#include "platform/mbed_assert.h" +#include "platform/Callback.h" + +namespace events { +/** \addtogroup events */ + + +template +struct AllArgs; + +template +struct AllArgs { + typedef AllArgs Self; + B0 b0; + + AllArgs(B0 b0=B0()): b0(b0) {} + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + s->b0(); + s->~Self(); + } + }; + + typedef Operations ops; +}; + +template +struct AllArgs { + typedef AllArgs Self; + B0 b0; B1 b1; + + AllArgs(B0 b0=B0(), B1 b1=B1()): b0(b0), b1(b1) {} + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + s->b0(s->b1); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(); + s->~Self(); + } + }; + + typedef Operations ops; +}; + +template +struct AllArgs { + typedef AllArgs Self; + B0 b0; B1 b1; B2 b2; + + + AllArgs(B0 b0=B0(), B1 b1=B1(), B2 b2=B2()): b0(b0), b1(b1), b2(b2) {} + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + s->b0(s->b1, s->b2); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2); + s->~Self(); + } + }; + + typedef Operations ops; +}; + +template +struct AllArgs { + typedef AllArgs Self; + B0 b0; B1 b1; B2 b2; B3 b3; + + + AllArgs(B0 b0=B0(), B1 b1=B1(), B2 b2=B2(), B3 b3=B3()): b0(b0), b1(b1), b2(b2), b3(b3) {} + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + s->b0(s->b1, s->b2, s->b3); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3); + s->~Self(); + } + }; + + typedef Operations ops; +}; + +template +struct AllArgs { + typedef AllArgs Self; + B0 b0; B1 b1; B2 b2; B3 b3; B4 b4; + + + AllArgs(B0 b0=B0(), B1 b1=B1(), B2 b2=B2(), B3 b3=B3(), B4 b4=B4()): b0(b0), b1(b1), b2(b2), b3(b3), b4(b4) {} + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + s->b0(s->b1, s->b2, s->b3, s->b4); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3, s->b4); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3, s->b4); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3, s->b4); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3, s->b4); + s->~Self(); + } + }; + + typedef Operations ops; +}; + +template +struct AllArgs { + typedef AllArgs Self; + B0 b0; B1 b1; B2 b2; B3 b3; B4 b4; B5 b5; + + + AllArgs(B0 b0=B0(), B1 b1=B1(), B2 b2=B2(), B3 b3=B3(), B4 b4=B4(), B5 b5=B5()): b0(b0), b1(b1), b2(b2), b3(b3), b4(b4), b5(b5) {} + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + s->b0(s->b1, s->b2, s->b3, s->b4, s->b5); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3, s->b4, s->b5); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3, s->b4, s->b5); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3, s->b4, s->b5); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3, s->b4, s->b5); + s->~Self(); + } + }; + + typedef Operations ops; +}; + + +template +class Task; + +template +class Task: public TaskBase { +public: + + Task(TaskQueue *q=NULL, mbed::Callback cb=mbed::Callback()) + : TaskBase(q), _args(cb) { + } + + Task& operator=( mbed::Callback cb) { + _args.b0 = cb; + return *this; + } + + void call() { + post(); + } + +protected: + + virtual uint32_t size() { + return sizeof(_args); + } + + virtual run_callback_t start(void *data, uint32_t max_size) { + All::ops::copy(data, (void*)&_args); + return &All::ops::call; + } + +private: + typedef AllArgs > All; + All _args; +}; + +template +class Task: public TaskBase { +public: + + Task(TaskQueue *q=NULL, mbed::Callback cb=mbed::Callback()) + : TaskBase(q), _args(cb) { + } + + Task& operator=( mbed::Callback cb) { + _args.b0 = cb; + return *this; + } + + void call(A0 a0) { + _args.b1 = a0; + post(); + } + +protected: + + virtual uint32_t size() { + return sizeof(_args); + } + + virtual run_callback_t start(void *data, uint32_t max_size) { + All::ops::copy(data, (void*)&_args); + return &All::ops::call; + } + +private: + typedef AllArgs, A0> All; + All _args; +}; + +/** Task + * + * Representation of a postable task + * @ingroup events + */ +template +class Task: public TaskBase { +public: + + /** + * Construct a new task + * + * @param q TaskQueue to post to + * @param cb Callback to run + */ + Task(TaskQueue *q=NULL, mbed::Callback cb=mbed::Callback()) + : TaskBase(q), _args(cb) { + } + + /** + * Set the callback of this task + * + * @param cb Callback to run + */ + Task& operator=(mbed::Callback cb) { + _args.b0 = cb; + return *this; + } + + /** + * Post this task for execution + * + * The number of arguments to call should match + * the type of the callback. For example Task + * expects two integers as arguments to call, while Task + * expects no arguments. + * + * @param a0 First callback parameter + * @param a1 Second callback parameter + */ + void call(A0 a0, A1 a1) { + _args.b1 = a0; + _args.b2 = a1; + post(); + } + +protected: + + virtual uint32_t size() { + return sizeof(_args); + } + + virtual run_callback_t start(void *data, uint32_t max_size) { + All::ops::copy(data, (void*)&_args); + return &All::ops::call; + } + +private: + typedef AllArgs, A0, A1> All; + All _args; +}; + +} + +/** @}*/ + +#endif diff --git a/usb/device/utilities/events/TaskBase.cpp b/usb/device/utilities/events/TaskBase.cpp new file mode 100644 index 00000000000..ce974f529f0 --- /dev/null +++ b/usb/device/utilities/events/TaskBase.cpp @@ -0,0 +1,151 @@ +/* events + * Copyright (c) 2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "events/TaskBase.h" +#include "events/TaskQueue.h" +#include "events/mbed_events.h" +#include "rtos/Semaphore.h" +#include "mbed.h" + +TaskBase::TaskBase(TaskQueue *q) + : _queue(q), _posted(false), _start_count(0), _flush_sem(NULL) +{ + +} + +TaskBase::~TaskBase() +{ + cancel(); + wait(); +} + +void TaskBase::set(TaskQueue *q) +{ + core_util_critical_section_enter(); + + // Cannot set the queue when it has been posted but has not been finished + MBED_ASSERT(!_posted); + _queue = q; + + core_util_critical_section_exit(); +} + +void TaskBase::cancel() +{ + core_util_critical_section_enter(); + + if (_posted) { + _queue->cancel(this); + _posted = false; + _wake_check(); + } + + core_util_critical_section_exit(); +} + +void TaskBase::wait() +{ + // Fast path check for finished + core_util_critical_section_enter(); + if (finished()) { + core_util_critical_section_exit(); + return; + } + core_util_critical_section_exit(); + + rtos::Semaphore sem; + + // If the event is in-flight then wait for it to complete + core_util_critical_section_enter(); + if (finished()) { + // This element has been flushed from the queue + core_util_critical_section_exit(); + return; + } + _flush_sem = &sem; + core_util_critical_section_exit(); + + sem.wait(); +} + +bool TaskBase::ready() +{ + core_util_critical_section_enter(); + + bool is_ready = !_posted; + + core_util_critical_section_exit(); + return is_ready; +} + +bool TaskBase::finished() +{ + core_util_critical_section_enter(); + + bool is_finished = !_posted && (_start_count == 0); + + core_util_critical_section_exit(); + return is_finished; +} + +void TaskBase::finish() +{ + // Nothing to do +} + +void TaskBase::post() +{ + core_util_critical_section_enter(); + + MBED_ASSERT(_queue); + if (_queue) { + MBED_ASSERT(!_posted); + _queue->post(this); + _posted = true; + } + + core_util_critical_section_exit(); +} + +TaskBase::run_callback_t TaskBase::_start(void *buffer, uint32_t size) +{ + // Each call to _start must result in a call to _finish + MBED_ASSERT(_start_count < 0xFFFF); + _start_count++; + _posted = false; + + return start(buffer, size); +} + +void TaskBase::_finish() +{ + // Each call to _finish must be preceded by a call to _start + MBED_ASSERT(_start_count > 0); + _start_count--; + _wake_check(); + finish(); +} + +void TaskBase::_wake_check() +{ + if (!finished()) { + return; + } + if (_flush_sem) { + _flush_sem->release(); + _flush_sem = NULL; + } +} diff --git a/usb/device/utilities/events/TaskBase.h b/usb/device/utilities/events/TaskBase.h new file mode 100644 index 00000000000..a4ce4c9cdba --- /dev/null +++ b/usb/device/utilities/events/TaskBase.h @@ -0,0 +1,163 @@ +/* events + * Copyright (c) 2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef TASK_BASE_H +#define TASK_BASE_H + +#include "platform/Callback.h" +#include "platform/mbed_assert.h" +#include "LinkEntry.h" + +namespace rtos { +class Semaphore; +} + +namespace events { +/** \addtogroup events */ + + +class TaskQueue; + +/** TaskBase + * + * Representation of a caller allocated task + * @ingroup events + */ +class TaskBase : public LinkEntry { +public: + + typedef void (*run_callback_t)(void *data); + + /** + * Construct a new TaskBase object + * + * @param q Queue for posting to + */ + TaskBase(TaskQueue *q); + + /** + * Destroy this TaskBase + */ + virtual ~TaskBase(); + + /** + * Set the queue of this task + * + * @param q TaskQueue to post to + */ + void set(TaskQueue *q); + + /** + * Cancel the execution of this task + * + * Once cancelled the task can be posted again. Previous + * calls to post may still run. If you need to ensure the + * callback has finished the function wait() can be used. + * + * @note This function is interrupt safe + */ + void cancel(); + + /** + * Return true if this task is ready to be posted + * + * Check if this task is on a queue waiting to be run. + * + * @return true if it is safe to call post + */ + bool ready(); + + /** + * Wait for this task to finish execution + * + * When this function returns then this task is in the finished state. + */ + void wait(); + + /** + * Check if the callback has run to completion or been fully canceled + * + * When an task is finished the queue is completely done with it and the + * callback is either fully complete or has been canceled and will not run. + * + * @return true if this task has been flushed from the queue, false otherwise + */ + bool finished(); + +protected: + + /** + * Size of buffer required for TaskBase::start + * + * @return requested buffer size + */ + virtual uint32_t size() = 0; + + /** + * Copy any callback data and return a callback to run + * + * @param data Buffer to copy data to. Do not copy more than TaskBase::size() data. + * @param size Maximum size to copy + */ + virtual run_callback_t start(void *data, uint32_t size) = 0; + + /** + * Inform this task that execution has finished. + * + */ + virtual void finish(); + + /** + * Post this task to the set TaskQueue for execution + */ + void post(); + +private: + + TaskQueue *_queue; + bool _posted; + uint16_t _start_count; + rtos::Semaphore *_flush_sem; + + friend class TaskQueue; + + /* + * Must be called in a critical section + * + * This function should not be called directly. Instead + * TaskQueue::task_start should be used instead. + */ + run_callback_t _start(void *buffer, uint32_t size); + + /* + * Must be called in a critical section + * + * This function should not be called directly. Instead + * TaskQueue::task_finish should be used instead. + * + */ + void _finish(); + + /* + * Unblock wait if this task is finished + */ + void _wake_check(); +}; + +} + +#endif + +/** @}*/ diff --git a/usb/device/utilities/events/TaskQueue.h b/usb/device/utilities/events/TaskQueue.h new file mode 100644 index 00000000000..521876c11e6 --- /dev/null +++ b/usb/device/utilities/events/TaskQueue.h @@ -0,0 +1,138 @@ +/* events + * Copyright (c) 2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef TASK_QUEUE_H +#define TASK_QUEUE_H + +#include "events/TaskBase.h" +#include "platform/Callback.h" +#include "mbed_critical.h" + +#define MBED_MAX_TASK_SIZE 32 + +namespace events { +/** \addtogroup events */ + + + +/** TaskQueue + * + * Flexible task queue for dispatching tasks + * @ingroup events + */ +class TaskQueue { +public: + + /** Create a TaskQueue + * + * Create an event queue. + */ + TaskQueue() + { + + } + + /** Destroy a TaskQueue + */ + virtual ~TaskQueue() + { + + } + + /** + * Add this event to the queue for execution + * + * If the event is already in the queue then it is canceled and + * added to the end of the queue. + * + * @param event Pointer to the event + */ + virtual void post(TaskBase *event) = 0; + + /** Cancel an in-flight event + * + * Cancels the given event so the event's memory can be reused. + * + * The cancel function is irq safe. + * + * If called while the event queue's dispatch loop is active, the cancel + * function does not guarantee that the event will not execute after it + * returns, as the event may have already begun executing. It does + * guarantee that the event queue is no longer using event data so + * the event can be freed or reused. + * + * @param event Pointer to the event + */ + virtual void cancel(TaskBase *event) = 0; + +protected: + + /** + * Get the size required to run this task + * + * Get the minimum size required for TaskQueue::task_start + * + * @param task The task to check size on + * @return required size + * @note This call must be made in a critical section + */ + static uint32_t task_size(TaskBase *task) + { + + return task->size(); + } + + /** + * Start processing this event by copying out its data + * + * Inform this event both that callback execution has started + * and that the event is free to be posted again. + * + * @param task The task to start processing + * @param dest The buffer to copy the callback arguments to + * @param size maximum size to copy + * @return Pointer to function run + * + * @note event_start must not be called on a canceled event as the + * memory may have been freed already + * @note Every call to event_start must be paired with event_finish + * @note This call must be made in a critical section + */ + static TaskBase::run_callback_t task_start(TaskBase *task, uint8_t *dest, uint32_t size) + { + + return task->_start(dest, size); + } + + /** + * Finish processing this event + * + * Inform this event that the callback has run to completion. + * + * @param task The task to finish processing + * + * @note Every call to event_finish must be preceded by a call to event_start + * @note This call must be made in a critical section + */ + static void task_finish(TaskBase *task) + { + task->_finish(); + } +}; + +} +#endif + From 8c34094b35212b399aaedd51007f0eba0548276d Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 23 May 2018 15:56:28 -0500 Subject: [PATCH 090/488] Add the PolledQueue implementation of TaskQueue Add the PolledQueue class which provides a TaskQueue which is run by calling PolledQueue::process. --- usb/device/utilities/events/PolledQueue.cpp | 91 +++++++++++++++++++++ usb/device/utilities/events/PolledQueue.h | 71 ++++++++++++++++ 2 files changed, 162 insertions(+) create mode 100644 usb/device/utilities/events/PolledQueue.cpp create mode 100644 usb/device/utilities/events/PolledQueue.h diff --git a/usb/device/utilities/events/PolledQueue.cpp b/usb/device/utilities/events/PolledQueue.cpp new file mode 100644 index 00000000000..562f5f345db --- /dev/null +++ b/usb/device/utilities/events/PolledQueue.cpp @@ -0,0 +1,91 @@ +/* events + * Copyright (c) 2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include "events/PolledQueue.h" + +#include "events/mbed_events.h" +#include "platform/Callback.h" + + +PolledQueue::PolledQueue(mbed::Callback cb): _cb(cb) +{ + +} + +PolledQueue::~PolledQueue() +{ + +} + +void PolledQueue::dispatch() +{ + core_util_critical_section_enter(); + uint64_t buf[MBED_MAX_TASK_SIZE / sizeof(uint64_t)]; + + while (true) { + + // Atomically dequeue the task and copy the callback + TaskBase *task = _list.dequeue(); + if (!task) { + break; + } + MBED_ASSERT(sizeof(buf) >= task_size(task)); + TaskBase::run_callback_t callback = task_start(task, (uint8_t*)buf, sizeof(buf)); + + // Run the callback outside the critical section + core_util_critical_section_exit(); + callback((uint8_t*)buf); + core_util_critical_section_enter(); + + // Finish + task_finish(task); + task = NULL; + + } + + core_util_critical_section_exit(); +} + +void PolledQueue::attach(mbed::Callback cb) +{ + core_util_critical_section_enter(); + + _cb = cb; + + core_util_critical_section_exit(); +} + +void PolledQueue::post(TaskBase *task) +{ + core_util_critical_section_enter(); + + bool empty = _list.head() == NULL; + _list.remove(task); + _list.enqueue(task); + if (empty && _cb) { + _cb(); + } + + core_util_critical_section_exit(); +} + +void PolledQueue::cancel(TaskBase *task) +{ + core_util_critical_section_enter(); + + _list.remove(task); + + core_util_critical_section_exit(); +} diff --git a/usb/device/utilities/events/PolledQueue.h b/usb/device/utilities/events/PolledQueue.h new file mode 100644 index 00000000000..89afb111b2d --- /dev/null +++ b/usb/device/utilities/events/PolledQueue.h @@ -0,0 +1,71 @@ +/* events + * Copyright (c) 2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef POLLED_QUEUE_H +#define POLLED_QUEUE_H + +#include "events/TaskQueue.h" +#include "platform/Callback.h" +#include "LinkedList.h" +namespace events { +/** \addtogroup events */ + + +/** PolledQueue + * + * This class is an implementation of TaskQueue which is + * processed synchronously by calls to dispatch. + * @ingroup events + */ +class PolledQueue: public TaskQueue { +public: + + /** Create a PolledQueue + * + * Create an event queue. + * + * @param cb Callback called when dispatch needs to be called + */ + PolledQueue(mbed::Callback cb=NULL); + + virtual ~PolledQueue(); + + virtual void post(TaskBase *event); + + virtual void cancel(TaskBase *event); + + /** + * Process all the events in this queue + */ + void dispatch(); + + /** + * Attach a callback indicating that this queue needs to be processed + * + * @param cb Callback called when dispatch needs to be called + */ + void attach(mbed::Callback cb); + +protected: + + mbed::Callback _cb; + LinkedList _list; + +}; + +} +#endif + From 27892f22ca6755726082e34d2d459c7195333b3b Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 23 May 2018 19:36:15 -0500 Subject: [PATCH 091/488] Update USBMSD Update the USBMSD class for the new API. Add support for passing in a BlockDevice directly without the need to extend USBMSD. --- usb/device/USBMSD/USBMSD.cpp | 887 +++++++++++++++++++++++++++++++++++ usb/device/USBMSD/USBMSD.h | 279 +++++++++++ 2 files changed, 1166 insertions(+) create mode 100644 usb/device/USBMSD/USBMSD.cpp create mode 100644 usb/device/USBMSD/USBMSD.h diff --git a/usb/device/USBMSD/USBMSD.cpp b/usb/device/USBMSD/USBMSD.cpp new file mode 100644 index 00000000000..a8d5991b777 --- /dev/null +++ b/usb/device/USBMSD/USBMSD.cpp @@ -0,0 +1,887 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBMSD.h" +#include "EndpointResolver.h" + +#define DISK_OK 0x00 +#define NO_INIT 0x01 +#define NO_DISK 0x02 +#define WRITE_PROTECT 0x04 + +#define CBW_Signature 0x43425355 +#define CSW_Signature 0x53425355 + +// SCSI Commands +#define TEST_UNIT_READY 0x00 +#define REQUEST_SENSE 0x03 +#define FORMAT_UNIT 0x04 +#define INQUIRY 0x12 +#define MODE_SELECT6 0x15 +#define MODE_SENSE6 0x1A +#define START_STOP_UNIT 0x1B +#define MEDIA_REMOVAL 0x1E +#define READ_FORMAT_CAPACITIES 0x23 +#define READ_CAPACITY 0x25 +#define READ10 0x28 +#define WRITE10 0x2A +#define VERIFY10 0x2F +#define READ12 0xA8 +#define WRITE12 0xAA +#define MODE_SELECT10 0x55 +#define MODE_SENSE10 0x5A + +// MSC class specific requests +#define MSC_REQUEST_RESET 0xFF +#define MSC_REQUEST_GET_MAX_LUN 0xFE + +#define DEFAULT_CONFIGURATION (1) + +// max packet size +#define MAX_PACKET 64 + +// CSW Status +enum Status { + CSW_PASSED, + CSW_FAILED, + CSW_ERROR, +}; + +USBMSD::USBMSD(BlockDevice *bd, USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) + : USBDevice(phy, vendor_id, product_id, product_release), + _in_task(&_queue), _out_task(&_queue), _reset_task(&_queue), _control_task(&_queue), _configure_task(&_queue) +{ + _bd = bd; + _bd->init(); + + _in_task = callback(this, &USBMSD::_in); + _out_task = callback(this, &USBMSD::_out); + _reset_task = callback(this, &USBMSD::_reset); + _control_task = callback(this, &USBMSD::_control); + _configure_task = callback(this, &USBMSD::_configure); + + EndpointResolver resolver(endpoint_table()); + + resolver.endpoint_ctrl(64); + _bulk_in = resolver.endpoint_in(USB_EP_TYPE_BULK, MAX_PACKET); + _bulk_out = resolver.endpoint_out(USB_EP_TYPE_BULK, MAX_PACKET); + MBED_ASSERT(resolver.valid()); + + _stage = READ_CBW; + memset((void *)&_cbw, 0, sizeof(CBW)); + memset((void *)&_csw, 0, sizeof(CSW)); + _page = NULL; +} + +USBMSD::~USBMSD() +{ + disconnect(); + _bd->deinit(); +} + +bool USBMSD::connect() +{ + _mutex.lock(); + + //disk initialization + if (disk_status() & NO_INIT) { + if (disk_initialize()) { + _mutex.unlock(); + return false; + } + } + + // get number of blocks + _block_count = disk_sectors(); + + // get memory size + _memory_size = disk_size(); + + if (_block_count > 0) { + _block_size = _memory_size / _block_count; + if (_block_size != 0) { + free(_page); + _page = (uint8_t *)malloc(_block_size * sizeof(uint8_t)); + if (_page == NULL) { + _mutex.unlock(); + return false; + } + } + } else { + _mutex.unlock(); + return false; + } + + //connect the device + USBDevice::connect(); + _mutex.unlock(); + return true; +} + +void USBMSD::disconnect() +{ + _mutex.lock(); + + USBDevice::disconnect(); + + _in_task.cancel(); + _out_task.cancel(); + _reset_task.cancel(); + _control_task.cancel(); + _configure_task.cancel(); + + _in_task.wait(); + _out_task.wait(); + _reset_task.wait(); + _control_task.wait(); + _configure_task.wait(); + + //De-allocate MSD page size: + free(_page); + _page = NULL; + + _mutex.unlock(); +} + +bool USBMSD::ready() +{ + return configured(); +} + +void USBMSD::process() +{ + _queue.dispatch(); +} + +void USBMSD::attach(mbed::Callback cb) +{ + lock(); + + _queue.attach(cb); + + unlock(); +} + +int USBMSD::disk_read(uint8_t* data, uint64_t block, uint8_t count) +{ + bd_addr_t addr = block * _bd->get_erase_size(); + bd_size_t size = count * _bd->get_erase_size(); + return _bd->read(data, addr, size); +} + +int USBMSD::disk_write(const uint8_t* data, uint64_t block, uint8_t count) +{ + bd_addr_t addr = block * _bd->get_erase_size(); + bd_size_t size = count * _bd->get_erase_size(); + int ret = _bd->erase(addr, size); + if (ret != 0) { + return ret; + } + + return _bd->program(data, addr, size); +} + +int USBMSD::disk_initialize() +{ + return 0; +} + +uint64_t USBMSD::disk_sectors() +{ + return _bd->size() / _bd->get_erase_size(); +} + +uint64_t USBMSD::disk_size() +{ + return _bd->size(); +} + + +int USBMSD::disk_status() +{ + return 0; +} + +void USBMSD::_isr_out(usb_ep_t endpoint) +{ + _out_task.call(); +} + +void USBMSD::_isr_in(usb_ep_t endpoint) +{ + _in_task.call(); +} + +void USBMSD::callback_state_change(DeviceState new_state) +{ + // called in ISR context + + if (new_state != Configured) { + _reset_task.call(); + } +} + +void USBMSD::callback_request(const setup_packet_t *setup) +{ + // called in ISR context + + if (setup->bmRequestType.Type == CLASS_TYPE) { + _control_task.call(setup); + } else { + complete_request(PassThrough, NULL, 0); + } +} + +void USBMSD::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) +{ + // called in ISR context + + bool success = setup->bRequest == MSC_REQUEST_GET_MAX_LUN; + complete_request_xfer_done(success); +} + +void USBMSD::callback_set_configuration(uint8_t configuration) +{ + // called in ISR context + + if (configuration != DEFAULT_CONFIGURATION) { + complete_set_configuration(false); + return; + } + _configure_task.call(); +} + +void USBMSD::callback_set_interface(uint16_t interface, uint8_t alternate) +{ + // called in ISR context + + bool success = (interface == 0) && (alternate == 0); + complete_set_interface(success); +} + + +const uint8_t *USBMSD::string_iinterface_desc() +{ + static const uint8_t string_iinterface_descriptor[] = { + 0x08, //bLength + STRING_DESCRIPTOR, //bDescriptorType 0x03 + 'M', 0, 'S', 0, 'D', 0 //bString iInterface - MSD + }; + return string_iinterface_descriptor; +} + +const uint8_t *USBMSD::string_iproduct_desc() +{ + static const uint8_t string_iproduct_descriptor[] = { + 0x12, //bLength + STRING_DESCRIPTOR, //bDescriptorType 0x03 + 'M', 0, 'b', 0, 'e', 0, 'd', 0, ' ', 0, 'M', 0, 'S', 0, 'D', 0 //bString iProduct - Mbed Audio + }; + return string_iproduct_descriptor; +} + + +const uint8_t *USBMSD::configuration_desc(uint8_t index) +{ + if (index != 0) { + return NULL; + } + + uint8_t config_descriptor_temp[] = { + + // Configuration 1 + 9, // bLength + 2, // bDescriptorType + LSB(9 + 9 + 7 + 7), // wTotalLength + MSB(9 + 9 + 7 + 7), + 0x01, // bNumInterfaces + 0x01, // bConfigurationValue: 0x01 is used to select this configuration + 0x00, // iConfiguration: no string to describe this configuration + 0xC0, // bmAttributes + 100, // bMaxPower, device power consumption is 100 mA + + // Interface 0, Alternate Setting 0, MSC Class + 9, // bLength + 4, // bDescriptorType + 0x00, // bInterfaceNumber + 0x00, // bAlternateSetting + 0x02, // bNumEndpoints + 0x08, // bInterfaceClass + 0x06, // bInterfaceSubClass + 0x50, // bInterfaceProtocol + 0x04, // iInterface + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + 7, // bLength + 5, // bDescriptorType + _bulk_in, // bEndpointAddress + 0x02, // bmAttributes (0x02=bulk) + LSB(MAX_PACKET), // wMaxPacketSize (LSB) + MSB(MAX_PACKET), // wMaxPacketSize (MSB) + 0, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + 7, // bLength + 5, // bDescriptorType + _bulk_out, // bEndpointAddress + 0x02, // bmAttributes (0x02=bulk) + LSB(MAX_PACKET), // wMaxPacketSize (LSB) + MSB(MAX_PACKET), // wMaxPacketSize (MSB) + 0 // bInterval + }; + MBED_ASSERT(sizeof(config_descriptor_temp) == sizeof(_configuration_descriptor)); + memcpy(_configuration_descriptor, config_descriptor_temp, sizeof(_configuration_descriptor)); + return _configuration_descriptor; +} + +void USBMSD::_out() +{ + _mutex.lock(); + + _bulk_out_size = read_finish(_bulk_out); + _out_ready = true; + _process(); + + _mutex.unlock(); +} + +void USBMSD::_in() +{ + _mutex.lock(); + + write_finish(_bulk_in); + _in_ready = true; + _process(); + + _mutex.unlock(); +} + +void USBMSD::_reset() +{ + _mutex.lock(); + + msd_reset(); + + _mutex.unlock(); +} + +void USBMSD::_control(const setup_packet_t *setup) +{ + _mutex.lock(); + + static const uint8_t maxLUN[1] = {0}; + + RequestResult result = PassThrough; + uint8_t *data = NULL; + uint32_t size = 0; + + if (setup->bmRequestType.Type == CLASS_TYPE) { + switch (setup->bRequest) { + case MSC_REQUEST_RESET: + result = Success; + msd_reset(); + break; + case MSC_REQUEST_GET_MAX_LUN: + result = Send; + data = (uint8_t*)maxLUN; + size = 1; + break; + default: + break; + } + } + + complete_request(result, data, size); + + _mutex.unlock(); +} + +void USBMSD::_configure() +{ + _mutex.lock(); + + // Configure endpoints > 0 + endpoint_add(_bulk_in, MAX_PACKET, USB_EP_TYPE_BULK, &USBMSD::_isr_in); + endpoint_add(_bulk_out, MAX_PACKET, USB_EP_TYPE_BULK, &USBMSD::_isr_out); + MBED_ASSERT(sizeof(_bulk_out_buf) == MAX_PACKET); + MBED_ASSERT(sizeof(_bulk_in_buf) == MAX_PACKET); + + _out_ready = false; + _in_ready = true; + + //activate readings + read_start(_bulk_out, _bulk_out_buf, sizeof(_bulk_out_buf)); + complete_set_configuration(true); + + _mutex.unlock(); +} + +void USBMSD::_process() +{ + // Mutex must be locked by caller + + switch (_stage) { + // the device has to decode the CBW received + case READ_CBW: + if (!_out_ready) { + break; + } + CBWDecode(_bulk_out_buf, _bulk_out_size); + _read_next(); + break; + + + case PROCESS_CBW: + switch (_cbw.CB[0]) { + // the device has to receive data from the host + case WRITE10: + case WRITE12: + if (!_out_ready) { + break; + } + memoryWrite(_bulk_out_buf, _bulk_out_size); + _read_next(); + break; + case VERIFY10: + if (!_out_ready) { + break; + } + memoryVerify(_bulk_out_buf, _bulk_out_size); + _read_next(); + break; + // the device has to send data to the host + case READ10: + case READ12: + if (!_in_ready) { + break; + } + memoryRead(); + break; + } + break; + + //the device has to send a CSW + case SEND_CSW: + if (!_in_ready) { + break; + } + sendCSW(); + break; + + // an error has occurred: stall endpoint and send CSW + default: + endpoint_stall(_bulk_out); + endpoint_stall(_bulk_in); + _csw.Status = CSW_ERROR; + sendCSW(); + break; + } +} + +void USBMSD::_write_next(uint8_t *data, uint32_t size) +{ + lock(); + + MBED_ASSERT(size <= MAX_PACKET); + MBED_ASSERT(_in_ready); + uint32_t send_size = MAX_PACKET > size ? size : MAX_PACKET; + memcpy(_bulk_in_buf, data, send_size); + write_start(_bulk_in, _bulk_in_buf, send_size); + _in_ready = false; + + unlock(); +} + +void USBMSD::_read_next() +{ + lock(); + + MBED_ASSERT(_out_ready); + read_start(_bulk_out, _bulk_out_buf, sizeof(_bulk_out_buf)); + _out_ready = false; + + unlock(); +} + +void USBMSD::memoryWrite(uint8_t *buf, uint16_t size) +{ + if ((_addr + size) > _memory_size) { + size = _memory_size - _addr; + _stage = ERROR; + endpoint_stall(_bulk_out); + } + + // we fill an array in RAM of 1 block before writing it in memory + for (int i = 0; i < size; i++) { + _page[_addr % _block_size + i] = buf[i]; + } + + // if the array is filled, write it in memory + if (!((_addr + size) % _block_size)) { + if (!(disk_status() & WRITE_PROTECT)) { + disk_write(_page, _addr / _block_size, 1); + } + } + + _addr += size; + _length -= size; + _csw.DataResidue -= size; + + if ((!_length) || (_stage != PROCESS_CBW)) { + _csw.Status = (_stage == ERROR) ? CSW_FAILED : CSW_PASSED; + sendCSW(); + } +} + +void USBMSD::memoryVerify(uint8_t *buf, uint16_t size) +{ + uint32_t n; + + if ((_addr + size) > _memory_size) { + size = _memory_size - _addr; + _stage = ERROR; + endpoint_stall(_bulk_out); + } + + // beginning of a new block -> load a whole block in RAM + if (!(_addr % _block_size)) { + disk_read(_page, _addr / _block_size, 1); + } + + // info are in RAM -> no need to re-read memory + for (n = 0; n < size; n++) { + if (_page[_addr % _block_size + n] != buf[n]) { + _mem_ok = false; + break; + } + } + + _addr += size; + _length -= size; + _csw.DataResidue -= size; + + if (!_length || (_stage != PROCESS_CBW)) { + _csw.Status = (_mem_ok && (_stage == PROCESS_CBW)) ? CSW_PASSED : CSW_FAILED; + sendCSW(); + } +} + + +bool USBMSD::inquiryRequest(void) +{ + uint8_t inquiry[] = { 0x00, 0x80, 0x00, 0x01, + 36 - 4, 0x80, 0x00, 0x00, + 'M', 'B', 'E', 'D', '.', 'O', 'R', 'G', + 'M', 'B', 'E', 'D', ' ', 'U', 'S', 'B', ' ', 'D', 'I', 'S', 'K', ' ', ' ', ' ', + '1', '.', '0', ' ', + }; + if (!write(inquiry, sizeof(inquiry))) { + return false; + } + return true; +} + + +bool USBMSD::readFormatCapacity() +{ + uint8_t capacity[] = { 0x00, 0x00, 0x00, 0x08, + (uint8_t)((_block_count >> 24) & 0xff), + (uint8_t)((_block_count >> 16) & 0xff), + (uint8_t)((_block_count >> 8) & 0xff), + (uint8_t)((_block_count >> 0) & 0xff), + + 0x02, + (uint8_t)((_block_size >> 16) & 0xff), + (uint8_t)((_block_size >> 8) & 0xff), + (uint8_t)((_block_size >> 0) & 0xff), + }; + if (!write(capacity, sizeof(capacity))) { + return false; + } + return true; +} + + +bool USBMSD::readCapacity(void) +{ + uint8_t capacity[] = { + (uint8_t)(((_block_count - 1) >> 24) & 0xff), + (uint8_t)(((_block_count - 1) >> 16) & 0xff), + (uint8_t)(((_block_count - 1) >> 8) & 0xff), + (uint8_t)(((_block_count - 1) >> 0) & 0xff), + + (uint8_t)((_block_size >> 24) & 0xff), + (uint8_t)((_block_size >> 16) & 0xff), + (uint8_t)((_block_size >> 8) & 0xff), + (uint8_t)((_block_size >> 0) & 0xff), + }; + if (!write(capacity, sizeof(capacity))) { + return false; + } + return true; +} + +bool USBMSD::write(uint8_t *buf, uint16_t size) +{ + + if (size >= _cbw.DataLength) { + size = _cbw.DataLength; + } + _stage = SEND_CSW; + + _write_next(buf, size); + + _csw.DataResidue -= size; + _csw.Status = CSW_PASSED; + return true; +} + + +bool USBMSD::modeSense6(void) +{ + uint8_t sense6[] = { 0x03, 0x00, 0x00, 0x00 }; + if (!write(sense6, sizeof(sense6))) { + return false; + } + return true; +} + +void USBMSD::sendCSW() +{ + _csw.Signature = CSW_Signature; + _write_next((uint8_t *)&_csw, sizeof(CSW)); + _stage = READ_CBW; +} + +bool USBMSD::requestSense(void) +{ + uint8_t request_sense[] = { + 0x70, + 0x00, + 0x05, // Sense Key: illegal request + 0x00, + 0x00, + 0x00, + 0x00, + 0x0A, + 0x00, + 0x00, + 0x00, + 0x00, + 0x30, + 0x01, + 0x00, + 0x00, + 0x00, + 0x00, + }; + + if (!write(request_sense, sizeof(request_sense))) { + return false; + } + + return true; +} + +void USBMSD::fail() +{ + _csw.Status = CSW_FAILED; + sendCSW(); +} + + +void USBMSD::CBWDecode(uint8_t *buf, uint16_t size) +{ + if (size == sizeof(_cbw)) { + memcpy((uint8_t *)&_cbw, buf, size); + if (_cbw.Signature == CBW_Signature) { + _csw.Tag = _cbw.Tag; + _csw.DataResidue = _cbw.DataLength; + if ((_cbw.CBLength < 1) || (_cbw.CBLength > 16)) { + fail(); + } else { + switch (_cbw.CB[0]) { + case TEST_UNIT_READY: + testUnitReady(); + break; + case REQUEST_SENSE: + requestSense(); + break; + case INQUIRY: + inquiryRequest(); + break; + case MODE_SENSE6: + modeSense6(); + break; + case READ_FORMAT_CAPACITIES: + readFormatCapacity(); + break; + case READ_CAPACITY: + readCapacity(); + break; + case READ10: + case READ12: + if (infoTransfer()) { + if ((_cbw.Flags & 0x80)) { + _stage = PROCESS_CBW; + memoryRead(); + } else { + endpoint_stall(_bulk_out); + _csw.Status = CSW_ERROR; + sendCSW(); + } + } + break; + case WRITE10: + case WRITE12: + if (infoTransfer()) { + if (!(_cbw.Flags & 0x80)) { + _stage = PROCESS_CBW; + } else { + endpoint_stall(_bulk_in); + _csw.Status = CSW_ERROR; + sendCSW(); + } + } + break; + case VERIFY10: + if (!(_cbw.CB[1] & 0x02)) { + _csw.Status = CSW_PASSED; + sendCSW(); + break; + } + if (infoTransfer()) { + if (!(_cbw.Flags & 0x80)) { + _stage = PROCESS_CBW; + _mem_ok = true; + } else { + endpoint_stall(_bulk_in); + _csw.Status = CSW_ERROR; + sendCSW(); + } + } + break; + case MEDIA_REMOVAL: + _csw.Status = CSW_PASSED; + sendCSW(); + break; + default: + fail(); + break; + } + } + } + } +} + +void USBMSD::testUnitReady(void) +{ + + if (_cbw.DataLength != 0) { + if ((_cbw.Flags & 0x80) != 0) { + endpoint_stall(_bulk_in); + } else { + endpoint_stall(_bulk_out); + } + } + + _csw.Status = CSW_PASSED; + sendCSW(); +} + + +void USBMSD::memoryRead(void) +{ + uint32_t n; + + n = (_length > MAX_PACKET) ? MAX_PACKET : _length; + + if ((_addr + n) > _memory_size) { + n = _memory_size - _addr; + _stage = ERROR; + } + + // we read an entire block + if (!(_addr % _block_size)) { + disk_read(_page, _addr / _block_size, 1); + } + + // write data which are in RAM + _write_next(&_page[_addr % _block_size], MAX_PACKET); + + _addr += n; + _length -= n; + + _csw.DataResidue -= n; + + if (!_length || (_stage != PROCESS_CBW)) { + _csw.Status = (_stage == PROCESS_CBW) ? CSW_PASSED : CSW_FAILED; + _stage = (_stage == PROCESS_CBW) ? SEND_CSW : _stage; + } +} + + +bool USBMSD::infoTransfer(void) +{ + uint32_t n; + + // Logical Block Address of First Block + n = (_cbw.CB[2] << 24) | (_cbw.CB[3] << 16) | (_cbw.CB[4] << 8) | (_cbw.CB[5] << 0); + + _addr = n * _block_size; + + // Number of Blocks to transfer + switch (_cbw.CB[0]) { + case READ10: + case WRITE10: + case VERIFY10: + n = (_cbw.CB[7] << 8) | (_cbw.CB[8] << 0); + break; + + case READ12: + case WRITE12: + n = (_cbw.CB[6] << 24) | (_cbw.CB[7] << 16) | (_cbw.CB[8] << 8) | (_cbw.CB[9] << 0); + break; + } + + _length = n * _block_size; + + if (!_cbw.DataLength) { // host requests no data + _csw.Status = CSW_FAILED; + sendCSW(); + return false; + } + + if (_cbw.DataLength != _length) { + if ((_cbw.Flags & 0x80) != 0) { + endpoint_stall(_bulk_in); + } else { + endpoint_stall(_bulk_out); + } + + _csw.Status = CSW_FAILED; + sendCSW(); + return false; + } + + return true; +} + +void USBMSD::msd_reset() +{ + _stage = READ_CBW; +} diff --git a/usb/device/USBMSD/USBMSD.h b/usb/device/USBMSD/USBMSD.h new file mode 100644 index 00000000000..3efcd5d5dd8 --- /dev/null +++ b/usb/device/USBMSD/USBMSD.h @@ -0,0 +1,279 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBMSD_H +#define USBMSD_H + +/* These headers are included for child class. */ +#include "USBDescriptor.h" +#include "USBDevice_Types.h" +#include "platform/Callback.h" +#include "events/PolledQueue.h" +#include "events/Task.h" +#include "BlockDevice.h" +#include "Mutex.h" +#include "usb_phy_api.h" + +#include "USBDevice.h" + +/** + * USBMSD class: generic class in order to use all kinds of blocks storage chip + * + * Introduction + * + * USBMSD implements the MSD protocol. It permits to access a block device (flash, sdcard,...) + * from a computer over USB. + * + * @code + * #include "mbed.h" + * #include "SDBlockDevice.h" + * #include "USBMSD.h" + * + * SDBlockDevice sd(PTE3, PTE1, PTE2, PTE4); + * USBMSD usb(&sd); + * + * int main() { + * usb.connect(); + * + * while(true) { + * usb.process(); + * } + * + * return 0; + * } + * @endcode + */ +class USBMSD: public USBDevice { +public: + + /** + * Constructor + * + * This creates a new USBMSD object with the given block device. Connect must be called + * for the block device to connect. + * + * @param bd BlockDevice to mount as a USB drive + * @param phy USB phy to use + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your preoduct_release + */ + USBMSD(BlockDevice *bd, USBPhy *phy=get_usb_phy(), uint16_t vendor_id = 0x0703, uint16_t product_id = 0x0104, uint16_t product_release = 0x0001); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call disconnect + * before this destructor runs. + */ + virtual ~USBMSD(); + + /** + * Connect the USB MSD device. Establish disk initialization before really connect the device. + * + * @returns true if successful + */ + bool connect(); + + /** + * Disconnect the USB MSD device. + */ + void disconnect(); + + /** + * Check if USB is connected + * + * @return true if a USB is connected, false otherwise + */ + bool ready(); + + /** + * Perform USB processing + */ + void process(); + + /** + * Called when USBMSD needs to perform processing + * + * @param cb Callback called when USBMSD needs process() to be called + */ + void attach(mbed::Callback cb); + +protected: + + /* + * read one or more blocks on a storage chip + * + * @param data pointer where will be stored read data + * @param block starting block number + * @param count number of blocks to read + * @returns 0 if successful + */ + virtual int disk_read(uint8_t *data, uint64_t block, uint8_t count); + + /* + * write one or more blocks on a storage chip + * + * @param data data to write + * @param block starting block number + * @param count number of blocks to write + * @returns 0 if successful + */ + virtual int disk_write(const uint8_t *data, uint64_t block, uint8_t count); + + /* + * Disk initilization + */ + virtual int disk_initialize(); + + /* + * Return the number of blocks + * + * @returns number of blocks + */ + virtual uint64_t disk_sectors(); + + /* + * Return memory size + * + * @returns memory size + */ + virtual uint64_t disk_size(); + + /* + * To check the status of the storage chip + * + * @returns status: 0: OK, 1: disk not initialized, 2: no medium in the drive, 4: write protected + */ + virtual int disk_status(); + +private: + + // MSC Bulk-only Stage + enum Stage { + READ_CBW, // wait a CBW + ERROR, // error + PROCESS_CBW, // process a CBW request + SEND_CSW, // send a CSW + }; + + // Bulk-only CBW + typedef MBED_PACKED(struct) { + uint32_t Signature; + uint32_t Tag; + uint32_t DataLength; + uint8_t Flags; + uint8_t LUN; + uint8_t CBLength; + uint8_t CB[16]; + } CBW; + + // Bulk-only CSW + typedef MBED_PACKED(struct) { + uint32_t Signature; + uint32_t Tag; + uint32_t DataResidue; + uint8_t Status; + } CSW; + + //state of the bulk-only state machine + Stage _stage; + + // current CBW + CBW _cbw; + + // CSW which will be sent + CSW _csw; + + // addr where will be read or written data + uint32_t _addr; + + // length of a reading or writing + uint32_t _length; + + // memory OK (after a memoryVerify) + bool _mem_ok; + + // cache in RAM before writing in memory. Useful also to read a block. + uint8_t *_page; + + int _block_size; + uint64_t _memory_size; + uint64_t _block_count; + + // endpoints + usb_ep_t _bulk_in; + usb_ep_t _bulk_out; + uint8_t _bulk_in_buf[64]; + uint8_t _bulk_out_buf[64]; + bool _out_ready; + bool _in_ready; + uint32_t _bulk_out_size; + + // Interrupt to thread deferral + PolledQueue _queue; + Task _in_task; + Task _out_task; + Task _reset_task; + Task _control_task; + Task _configure_task; + + BlockDevice *_bd; + rtos::Mutex _mutex; + + // space for config descriptor + uint8_t _configuration_descriptor[32]; + + virtual const uint8_t *string_iproduct_desc(); + virtual const uint8_t *string_iinterface_desc(); + virtual const uint8_t *configuration_desc(uint8_t index); + virtual void callback_set_configuration(uint8_t configuration); + virtual void callback_set_interface(uint16_t interface, uint8_t alternate); + virtual void callback_state_change(DeviceState new_state); + virtual void callback_request(const setup_packet_t *setup); + virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); + + void _isr_out(usb_ep_t endpoint); + void _isr_in(usb_ep_t endpoint); + + void _out(); + void _in(); + void _reset(); + void _control(const setup_packet_t *request); + void _configure(); + + void _process(); + void _write_next(uint8_t *data, uint32_t size); + void _read_next(); + + void CBWDecode(uint8_t *buf, uint16_t size); + void sendCSW(void); + bool inquiryRequest(void); + bool write(uint8_t *buf, uint16_t size); + bool readFormatCapacity(); + bool readCapacity(void); + bool infoTransfer(void); + void memoryRead(void); + bool modeSense6(void); + void testUnitReady(void); + bool requestSense(void); + void memoryVerify(uint8_t *buf, uint16_t size); + void memoryWrite(uint8_t *buf, uint16_t size); + void msd_reset(); + void fail(); +}; + +#endif From 5a887ed19951668d4e5877fee4a1bad1f8c79f6a Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 18 Jun 2018 11:35:22 -0500 Subject: [PATCH 092/488] USBMSD fixes Make the following fixes: -deinit in destructor to prevent race conditions -cancel the reset task before calling it since it may be in progress -wait for tasks to complete without mutex held -prevent double connect with _init flag --- usb/device/USBMSD/USBMSD.cpp | 25 ++++++++++++++++++++++++- usb/device/USBMSD/USBMSD.h | 4 ++++ 2 files changed, 28 insertions(+), 1 deletion(-) diff --git a/usb/device/USBMSD/USBMSD.cpp b/usb/device/USBMSD/USBMSD.cpp index a8d5991b777..ba81e98b68d 100644 --- a/usb/device/USBMSD/USBMSD.cpp +++ b/usb/device/USBMSD/USBMSD.cpp @@ -63,7 +63,7 @@ enum Status { USBMSD::USBMSD(BlockDevice *bd, USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) : USBDevice(phy, vendor_id, product_id, product_release), - _in_task(&_queue), _out_task(&_queue), _reset_task(&_queue), _control_task(&_queue), _configure_task(&_queue) + _init(false), _in_task(&_queue), _out_task(&_queue), _reset_task(&_queue), _control_task(&_queue), _configure_task(&_queue) { _bd = bd; _bd->init(); @@ -91,16 +91,26 @@ USBMSD::~USBMSD() { disconnect(); _bd->deinit(); + deinit(); } bool USBMSD::connect() { + _mutex_init.lock(); _mutex.lock(); + // already initialized + if (_init) { + _mutex.unlock(); + _mutex_init.unlock(); + return false; + } + //disk initialization if (disk_status() & NO_INIT) { if (disk_initialize()) { _mutex.unlock(); + _mutex_init.unlock(); return false; } } @@ -118,25 +128,31 @@ bool USBMSD::connect() _page = (uint8_t *)malloc(_block_size * sizeof(uint8_t)); if (_page == NULL) { _mutex.unlock(); + _mutex_init.unlock(); return false; } } } else { _mutex.unlock(); + _mutex_init.unlock(); return false; } //connect the device USBDevice::connect(); + _init = true; _mutex.unlock(); + _mutex_init.unlock(); return true; } void USBMSD::disconnect() { + _mutex_init.lock(); _mutex.lock(); USBDevice::disconnect(); + _init = false; _in_task.cancel(); _out_task.cancel(); @@ -144,17 +160,23 @@ void USBMSD::disconnect() _control_task.cancel(); _configure_task.cancel(); + _mutex.unlock(); + + // object mutex must be unlocked for waiting _in_task.wait(); _out_task.wait(); _reset_task.wait(); _control_task.wait(); _configure_task.wait(); + _mutex.lock(); + //De-allocate MSD page size: free(_page); _page = NULL; _mutex.unlock(); + _mutex_init.unlock(); } bool USBMSD::ready() @@ -231,6 +253,7 @@ void USBMSD::callback_state_change(DeviceState new_state) // called in ISR context if (new_state != Configured) { + _reset_task.cancel(); _reset_task.call(); } } diff --git a/usb/device/USBMSD/USBMSD.h b/usb/device/USBMSD/USBMSD.h index 3efcd5d5dd8..9e4ab48ed6a 100644 --- a/usb/device/USBMSD/USBMSD.h +++ b/usb/device/USBMSD/USBMSD.h @@ -189,6 +189,9 @@ class USBMSD: public USBDevice { uint8_t Status; } CSW; + // If this class has been initialized + bool _init; + //state of the bulk-only state machine Stage _stage; @@ -232,6 +235,7 @@ class USBMSD: public USBDevice { Task _configure_task; BlockDevice *_bd; + rtos::Mutex _mutex_init; rtos::Mutex _mutex; // space for config descriptor From 30faeac3ce7b347ab6da928cd5660cebac8207f6 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 19 Jun 2018 18:22:31 -0500 Subject: [PATCH 093/488] Remove endpoint parameter from USB callbacks Remove the endpoint parameter from endpoint callbacks. This information is redundant because endpoints are known at construction time because they must be in the configuration descriptor. --- TESTS/usb_device/basic/USBTester.cpp | 14 +++++++------- TESTS/usb_device/basic/USBTester.h | 6 +++--- usb/device/USBAudio/USBAudio.cpp | 6 ++---- usb/device/USBAudio/USBAudio.h | 4 ++-- usb/device/USBDevice/USBDevice.cpp | 4 ++-- usb/device/USBDevice/USBDevice.h | 6 +++--- usb/device/USBHID/USBHID.cpp | 4 ++-- usb/device/USBHID/USBHID.h | 4 ++-- usb/device/USBMIDI/USBMIDI.cpp | 4 ++-- usb/device/USBMIDI/USBMIDI.h | 4 ++-- usb/device/USBMSD/USBMSD.cpp | 4 ++-- usb/device/USBMSD/USBMSD.h | 4 ++-- usb/device/USBSerial/USBCDC.cpp | 6 +++--- usb/device/USBSerial/USBCDC.h | 4 ++-- 14 files changed, 36 insertions(+), 38 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index 4a62b91f0c2..36b01d9eeb0 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -221,7 +221,7 @@ void USBTester::callback_set_configuration(uint8_t configuration) } bool USBTester::setup_iterface(uint8_t ep_in, uint8_t ep_out, uint32_t ep_size, usb_ep_type_t ep_type, - uint8_t *buf, uint32_t buf_size, void (USBTester::*callback)(usb_ep_t endpoint)) + uint8_t *buf, uint32_t buf_size, void (USBTester::*callback)()) { bool success = false; @@ -690,13 +690,13 @@ const uint8_t *USBTester::configuration_desc(uint8_t index) } } -void USBTester::epint_out_callback(usb_ep_t endpoint) +void USBTester::epint_out_callback() { - read_finish(endpoint); - read_start(endpoint, int_buf, sizeof(int_buf)); + read_finish(int_out); + read_start(int_out, int_buf, sizeof(int_buf)); } -void USBTester::epbulk_out_callback(usb_ep_t endpoint) +void USBTester::epbulk_out_callback() { - read_finish(endpoint); - read_start(endpoint, bulk_buf, sizeof(bulk_buf)); + read_finish(bulk_out); + read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); } diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index 1f9349387eb..f94f771f372 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -62,7 +62,7 @@ class USBTester: public USBDevice { bool set_configuration(uint16_t configuration); bool set_interface(uint16_t interface, uint16_t alternate); bool setup_iterface(uint8_t ep_in, uint8_t ep_out, uint32_t ep_size, usb_ep_type_t ep_type, - uint8_t *buf, uint32_t buf_size, void (USBTester::*callback)(usb_ep_t endpoint)); + uint8_t *buf, uint32_t buf_size, void (USBTester::*callback)()); void remove_iterface(uint16_t interface); int16_t interface_0_alt_set; int16_t interface_1_alt_set; @@ -117,8 +117,8 @@ class USBTester: public USBDevice { virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); virtual void callback_set_configuration(uint8_t configuration); virtual void callback_set_interface(uint16_t interface, uint8_t alternate); - virtual void epbulk_out_callback(usb_ep_t endpoint); - virtual void epint_out_callback(usb_ep_t endpoint); + virtual void epbulk_out_callback(); + virtual void epint_out_callback(); virtual void callback_reset(); uint8_t ctrl_buf[2048]; diff --git a/usb/device/USBAudio/USBAudio.cpp b/usb/device/USBAudio/USBAudio.cpp index abd899ab45f..71d392e9998 100644 --- a/usb/device/USBAudio/USBAudio.cpp +++ b/usb/device/USBAudio/USBAudio.cpp @@ -883,10 +883,9 @@ void USBAudio::_receive_change(ChannelState new_state) } } -void USBAudio::_receive_isr(usb_ep_t ep) +void USBAudio::_receive_isr() { assert_locked(); - MBED_ASSERT(ep == _episo_out); uint32_t size = read_finish(_episo_out); @@ -984,10 +983,9 @@ void USBAudio::_send_isr_next_sync() _tx_frame_fract += _tx_fract_frames_per_xfer; } -void USBAudio::_send_isr(usb_ep_t ep) +void USBAudio::_send_isr() { assert_locked(); - MBED_ASSERT(ep == _episo_in); write_finish(_episo_in); diff --git a/usb/device/USBAudio/USBAudio.h b/usb/device/USBAudio/USBAudio.h index fec17615f1e..d2ed6aea68d 100644 --- a/usb/device/USBAudio/USBAudio.h +++ b/usb/device/USBAudio/USBAudio.h @@ -275,11 +275,11 @@ class USBAudio: protected USBDevice { void _build_configuration_desc(); void _receive_change(ChannelState new_state); - void _receive_isr(usb_ep_t ep); + void _receive_isr(); void _send_change(ChannelState new_state); void _send_isr_start(); void _send_isr_next_sync(); - void _send_isr(usb_ep_t ep); + void _send_isr(); // has connect been called bool _connected; diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index c4fc4e17f67..b38fd67f58a 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -939,7 +939,7 @@ void USBDevice::out(usb_ep_t endpoint) MBED_ASSERT(info->pending >= 1); info->pending -= 1; if (info->callback) { - (this->*(info->callback))(endpoint); + (this->*(info->callback))(); } } @@ -957,7 +957,7 @@ void USBDevice::in(usb_ep_t endpoint) MBED_ASSERT(info->pending >= 1); info->pending -= 1; if (info->callback) { - (this->*(info->callback))(endpoint); + (this->*(info->callback))(); } } diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 8ef7008597f..133ea245223 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -42,7 +42,7 @@ */ class USBDevice: public USBPhyEvents { public: - typedef void (USBDevice::*ep_cb_t)(usb_ep_t endpoint); + typedef void (USBDevice::*ep_cb_t)(); enum RequestResult { Receive = 0, @@ -157,7 +157,7 @@ class USBDevice: public USBPhyEvents { * @returns true if successful, false otherwise */ template - bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type, void (T::*callback)(usb_ep_t endpoint)) + bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type, void (T::*callback)()) { return endpoint_add(endpoint, max_packet, type, static_cast(callback)); } @@ -539,7 +539,7 @@ class USBDevice: public USBPhyEvents { void _complete_set_interface(); struct endpoint_info_t { - void (USBDevice::*callback)(usb_ep_t endpoint); + ep_cb_t callback; uint16_t max_packet_size; uint16_t transfer_size; uint8_t flags; diff --git a/usb/device/USBHID/USBHID.cpp b/usb/device/USBHID/USBHID.cpp index 14bc74ee06f..f2d73c3e061 100644 --- a/usb/device/USBHID/USBHID.cpp +++ b/usb/device/USBHID/USBHID.cpp @@ -233,7 +233,7 @@ bool USBHID::read_nb(HID_REPORT *report) return success; } -void USBHID::_send_isr(usb_ep_t endpoint) +void USBHID::_send_isr() { assert_locked(); @@ -247,7 +247,7 @@ void USBHID::_send_isr(usb_ep_t endpoint) } -void USBHID::_read_isr(usb_ep_t endpoint) +void USBHID::_read_isr() { assert_locked(); diff --git a/usb/device/USBHID/USBHID.h b/usb/device/USBHID/USBHID.h index 2cd984a6613..db5b4cc8c76 100644 --- a/usb/device/USBHID/USBHID.h +++ b/usb/device/USBHID/USBHID.h @@ -245,8 +245,8 @@ class USBHID: public USBDevice { private: void _init(uint8_t output_report_length, uint8_t input_report_length); - void _send_isr(usb_ep_t endpoint); - void _read_isr(usb_ep_t endpoint); + void _send_isr(); + void _read_isr(); class AsyncSend; class AsyncRead; diff --git a/usb/device/USBMIDI/USBMIDI.cpp b/usb/device/USBMIDI/USBMIDI.cpp index 4fb902c5ebd..24cceff1f49 100644 --- a/usb/device/USBMIDI/USBMIDI.cpp +++ b/usb/device/USBMIDI/USBMIDI.cpp @@ -311,14 +311,14 @@ const uint8_t *USBMIDI::configuration_desc(uint8_t index) return _config_descriptor; } -void USBMIDI::_in_callback(usb_ep_t ep) +void USBMIDI::_in_callback() { assert_locked(); _flags.set(FLAG_WRITE_DONE); } -void USBMIDI::_out_callback(usb_ep_t ep) +void USBMIDI::_out_callback() { assert_locked(); diff --git a/usb/device/USBMIDI/USBMIDI.h b/usb/device/USBMIDI/USBMIDI.h index c1d968d6192..04adfe7ad09 100644 --- a/usb/device/USBMIDI/USBMIDI.h +++ b/usb/device/USBMIDI/USBMIDI.h @@ -176,8 +176,8 @@ class USBMIDI: public USBDevice { Callback _callback; void _init(); - void _in_callback(usb_ep_t); - void _out_callback(usb_ep_t); + void _in_callback(); + void _out_callback(); bool _next_message(); }; diff --git a/usb/device/USBMSD/USBMSD.cpp b/usb/device/USBMSD/USBMSD.cpp index ba81e98b68d..01f0aa94043 100644 --- a/usb/device/USBMSD/USBMSD.cpp +++ b/usb/device/USBMSD/USBMSD.cpp @@ -238,12 +238,12 @@ int USBMSD::disk_status() return 0; } -void USBMSD::_isr_out(usb_ep_t endpoint) +void USBMSD::_isr_out() { _out_task.call(); } -void USBMSD::_isr_in(usb_ep_t endpoint) +void USBMSD::_isr_in() { _in_task.call(); } diff --git a/usb/device/USBMSD/USBMSD.h b/usb/device/USBMSD/USBMSD.h index 9e4ab48ed6a..b133f53b0e1 100644 --- a/usb/device/USBMSD/USBMSD.h +++ b/usb/device/USBMSD/USBMSD.h @@ -250,8 +250,8 @@ class USBMSD: public USBDevice { virtual void callback_request(const setup_packet_t *setup); virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); - void _isr_out(usb_ep_t endpoint); - void _isr_in(usb_ep_t endpoint); + void _isr_out(); + void _isr_in(); void _out(); void _in(); diff --git a/usb/device/USBSerial/USBCDC.cpp b/usb/device/USBSerial/USBCDC.cpp index b03ae1df3f4..7e406c419e1 100644 --- a/usb/device/USBSerial/USBCDC.cpp +++ b/usb/device/USBSerial/USBCDC.cpp @@ -410,11 +410,11 @@ void USBCDC::_send_isr_start() * Called by when CDC data is sent * Warning: Called in ISR */ -void USBCDC::_send_isr(usb_ep_t endpoint) +void USBCDC::_send_isr() { assert_locked(); - write_finish(endpoint); + write_finish(_bulk_in); _tx_buf = _tx_buffer; _tx_size = 0; _tx_in_progress = false; @@ -472,7 +472,7 @@ void USBCDC::_receive_isr_start() * Called by when CDC data is received * Warning: Called in ISR */ -void USBCDC::_receive_isr(usb_ep_t endpoint) +void USBCDC::_receive_isr() { assert_locked(); diff --git a/usb/device/USBSerial/USBCDC.h b/usb/device/USBSerial/USBCDC.h index bc281550e46..b08c9bcf0a5 100644 --- a/usb/device/USBSerial/USBCDC.h +++ b/usb/device/USBSerial/USBCDC.h @@ -194,10 +194,10 @@ class USBCDC: public USBDevice { void _change_terminal_connected(bool connected); void _send_isr_start(); - void _send_isr(usb_ep_t endpoint); + void _send_isr(); void _receive_isr_start(); - void _receive_isr(usb_ep_t endpoint); + void _receive_isr(); usb_ep_t _bulk_in; usb_ep_t _bulk_out; From e321aa2ef0d8d2d3a52c3d3ccee463e2a3f87494 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Mon, 28 May 2018 18:31:57 +0200 Subject: [PATCH 094/488] Tests: USB: Add device config files for Zadig Zadig is a tool used to install generic USB drivers on Windows machines. These drivers are necessary to run USB device test suite on Windows hosts. --- TESTS/usb_device/basic/zadig_conf/README.md | 18 ++++++++++++++++++ .../zadig_conf/mbed_os-usb_test_device1.cfg | 6 ++++++ .../zadig_conf/mbed_os-usb_test_device2.cfg | 6 ++++++ 3 files changed, 30 insertions(+) create mode 100644 TESTS/usb_device/basic/zadig_conf/README.md create mode 100644 TESTS/usb_device/basic/zadig_conf/mbed_os-usb_test_device1.cfg create mode 100644 TESTS/usb_device/basic/zadig_conf/mbed_os-usb_test_device2.cfg diff --git a/TESTS/usb_device/basic/zadig_conf/README.md b/TESTS/usb_device/basic/zadig_conf/README.md new file mode 100644 index 00000000000..f738d15c83a --- /dev/null +++ b/TESTS/usb_device/basic/zadig_conf/README.md @@ -0,0 +1,18 @@ +# Generic USB driver installation on Windows machines + +In order to run the Mbed OS USB device test suite (`tests-usb_device-*`) +on Windows hosts you need to install generic USB drivers for two test devices. + +1. Download *Zadig* application from https://zadig.akeo.ie/. +1. Unplug the Mbed device. +1. Open *Zadig*. +1. Select *Device -> Load Preset Device*. +1. Open `mbed_os-usb_test_device1.cfg`. +1. Choose `libusb-win32 (v1.2.6.0)` driver. +1. Select `Install Driver` and click it. +1. Select *Device -> Load Preset Device*. +1. Open `mbed_os-usb_test_device2.cfg`. +1. Choose `libusb-win32 (v1.2.6.0)` driver. +1. Select `Install Driver` and click it. +1. Close *Zadig*. +1. Plug both device USB interfaces (*DAPLink* and *USB device*). diff --git a/TESTS/usb_device/basic/zadig_conf/mbed_os-usb_test_device1.cfg b/TESTS/usb_device/basic/zadig_conf/mbed_os-usb_test_device1.cfg new file mode 100644 index 00000000000..71e084a130f --- /dev/null +++ b/TESTS/usb_device/basic/zadig_conf/mbed_os-usb_test_device1.cfg @@ -0,0 +1,6 @@ +# Zadig device configuration +# Mbed OS USB test device -- basic tests +[device] +Description = "MBED TEST DEVICE" +VID = 0x0D28 +PID = 0x0205 diff --git a/TESTS/usb_device/basic/zadig_conf/mbed_os-usb_test_device2.cfg b/TESTS/usb_device/basic/zadig_conf/mbed_os-usb_test_device2.cfg new file mode 100644 index 00000000000..80caf3417d4 --- /dev/null +++ b/TESTS/usb_device/basic/zadig_conf/mbed_os-usb_test_device2.cfg @@ -0,0 +1,6 @@ +# Zadig device configuration +# Mbed OS USB test device -- endpoint tests +[device] +Description = "USB DEVICE" +VID = 0x0D28 +PID = 0x0206 From 442dabf8695e849ee4ff44be0674672ac0997bd1 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 20 Jun 2018 15:55:48 -0500 Subject: [PATCH 095/488] Update USBMSD to be more consistent with others Add second constructor and reorder constructor parameters to match other USB classes. Also remove the ready() function since there are no calls that can only mbe made from a ready state. --- usb/device/USBMSD/USBMSD.cpp | 35 ++++++++++++++++++++++++----------- usb/device/USBMSD/USBMSD.h | 35 +++++++++++++++++++++++------------ 2 files changed, 47 insertions(+), 23 deletions(-) diff --git a/usb/device/USBMSD/USBMSD.cpp b/usb/device/USBMSD/USBMSD.cpp index 01f0aa94043..79020201c0e 100644 --- a/usb/device/USBMSD/USBMSD.cpp +++ b/usb/device/USBMSD/USBMSD.cpp @@ -17,6 +17,7 @@ #include "stdint.h" #include "USBMSD.h" #include "EndpointResolver.h" +#include "usb_phy_api.h" #define DISK_OK 0x00 #define NO_INIT 0x01 @@ -61,11 +62,28 @@ enum Status { CSW_ERROR, }; -USBMSD::USBMSD(BlockDevice *bd, USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) +USBMSD::USBMSD(BlockDevice *bd, bool connect_blocking, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) + : USBDevice(get_usb_phy(), vendor_id, product_id, product_release), + _initialized(false), _in_task(&_queue), _out_task(&_queue), _reset_task(&_queue), _control_task(&_queue), _configure_task(&_queue), _bd(bd) +{ + _init(); + if (connect_blocking) { + connect(); + } else { + init(); + } +} + +USBMSD::USBMSD(USBPhy *phy, BlockDevice *bd, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) : USBDevice(phy, vendor_id, product_id, product_release), - _init(false), _in_task(&_queue), _out_task(&_queue), _reset_task(&_queue), _control_task(&_queue), _configure_task(&_queue) + _initialized(false), _in_task(&_queue), _out_task(&_queue), _reset_task(&_queue), _control_task(&_queue), _configure_task(&_queue), _bd(bd) +{ + _init(); +} + + +void USBMSD::_init() { - _bd = bd; _bd->init(); _in_task = callback(this, &USBMSD::_in); @@ -100,7 +118,7 @@ bool USBMSD::connect() _mutex.lock(); // already initialized - if (_init) { + if (_initialized) { _mutex.unlock(); _mutex_init.unlock(); return false; @@ -140,7 +158,7 @@ bool USBMSD::connect() //connect the device USBDevice::connect(); - _init = true; + _initialized = true; _mutex.unlock(); _mutex_init.unlock(); return true; @@ -152,7 +170,7 @@ void USBMSD::disconnect() _mutex.lock(); USBDevice::disconnect(); - _init = false; + _initialized = false; _in_task.cancel(); _out_task.cancel(); @@ -179,11 +197,6 @@ void USBMSD::disconnect() _mutex_init.unlock(); } -bool USBMSD::ready() -{ - return configured(); -} - void USBMSD::process() { _queue.dispatch(); diff --git a/usb/device/USBMSD/USBMSD.h b/usb/device/USBMSD/USBMSD.h index b133f53b0e1..d0584156fd4 100644 --- a/usb/device/USBMSD/USBMSD.h +++ b/usb/device/USBMSD/USBMSD.h @@ -25,7 +25,6 @@ #include "events/Task.h" #include "BlockDevice.h" #include "Mutex.h" -#include "usb_phy_api.h" #include "USBDevice.h" @@ -46,7 +45,6 @@ * USBMSD usb(&sd); * * int main() { - * usb.connect(); * * while(true) { * usb.process(); @@ -66,12 +64,31 @@ class USBMSD: public USBDevice { * for the block device to connect. * * @param bd BlockDevice to mount as a USB drive + * @param connect_blocking true to perform a blocking connect, false to start in a disconnected state + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your preoduct_release + */ + USBMSD(BlockDevice *bd, bool connect_blocking = true, uint16_t vendor_id = 0x0703, uint16_t product_id = 0x0104, uint16_t product_release = 0x0001); + + /** + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. + * * @param phy USB phy to use + * @param bd BlockDevice to mount as a USB drive * @param vendor_id Your vendor_id * @param product_id Your product_id * @param product_release Your preoduct_release */ - USBMSD(BlockDevice *bd, USBPhy *phy=get_usb_phy(), uint16_t vendor_id = 0x0703, uint16_t product_id = 0x0104, uint16_t product_release = 0x0001); + USBMSD(USBPhy *phy, BlockDevice *bd, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); /** * Destroy this object @@ -82,7 +99,7 @@ class USBMSD: public USBDevice { virtual ~USBMSD(); /** - * Connect the USB MSD device. Establish disk initialization before really connect the device. + * Connect the USB MSD device. * * @returns true if successful */ @@ -93,13 +110,6 @@ class USBMSD: public USBDevice { */ void disconnect(); - /** - * Check if USB is connected - * - * @return true if a USB is connected, false otherwise - */ - bool ready(); - /** * Perform USB processing */ @@ -190,7 +200,7 @@ class USBMSD: public USBDevice { } CSW; // If this class has been initialized - bool _init; + bool _initialized; //state of the bulk-only state machine Stage _stage; @@ -259,6 +269,7 @@ class USBMSD: public USBDevice { void _control(const setup_packet_t *request); void _configure(); + void _init(); void _process(); void _write_next(uint8_t *data, uint32_t size); void _read_next(); From 32def04a90e8328b3a7117271bf3c84e4a2f33e8 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 21 Jun 2018 09:54:51 -0500 Subject: [PATCH 096/488] Revert "Fix Kinetis bug causing USB to get stuck" Revert the commit "Fix Kinetis bug causing USB to get stuck sending" since this change causes stalls to be missed sometimes. --- .../targets/TARGET_Freescale/USBPhy_Kinetis.cpp | 14 +------------- 1 file changed, 1 insertion(+), 13 deletions(-) diff --git a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp index 763fa9cc139..8c277cc10e9 100644 --- a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp +++ b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp @@ -411,23 +411,11 @@ void USBPhyHw::endpoint_remove(usb_ep_t endpoint) void USBPhyHw::endpoint_stall(usb_ep_t endpoint) { - if (DESC_TO_LOG(endpoint) == 0) { - USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK; - } else { - uint8_t dir = DESC_EP_IN(endpoint) ? TX : RX; - uint32_t idx = EP_BDT_IDX(DESC_TO_LOG(endpoint), dir, 0); - bdt[idx].info |= BD_OWN_MASK | BD_STALL_MASK; - } + USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK; } void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) { - - if (DESC_TO_LOG(endpoint) != 0) { - uint8_t dir = DESC_EP_IN(endpoint) ? TX : RX; - uint32_t idx = EP_BDT_IDX(DESC_TO_LOG(endpoint), dir, 0); - bdt[idx].info &= ~(BD_OWN_MASK | BD_STALL_MASK); - } USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; } From 47996d2deb3918f182a3e3a4656f0331eb124d53 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 13 Jun 2018 19:38:01 -0500 Subject: [PATCH 097/488] Alternate Kinetis USB stuck sending bug fix If an IN endpoint is stalled during a transfer then the data being sent will repeated and flood the USB bus. This patch prevents endpoints from being stalled in the middle of a transfer by control requests by keeping USB suspended until the setup phase of the control request is done. --- .../TARGET_Freescale/USBPhy_Kinetis.cpp | 35 +++++++++++++++++-- 1 file changed, 33 insertions(+), 2 deletions(-) diff --git a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp index 8c277cc10e9..ad2fb53907d 100644 --- a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp +++ b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp @@ -89,6 +89,7 @@ uint8_t ep1_buffer[2][MAX_PACKET_SIZE_EP1]; uint8_t ep2_buffer[2][MAX_PACKET_SIZE_EP2]; uint8_t ep3_buffer[2][MAX_PACKET_SIZE_EP3]; +static bool setup_suspend = false; static uint8_t set_addr = 0; static uint8_t addr = 0; static ctrl_xfer_t ctrl_xfer = CTRL_XFER_READY; @@ -317,6 +318,12 @@ void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) } else { endpoint_read(EP0OUT, data, size); } + + // Clear suspend after the setup stage + if (setup_suspend) { + USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; + setup_suspend = false; + } } uint32_t USBPhyHw::ep0_read_result() @@ -336,6 +343,12 @@ void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) ctrl_xfer = CTRL_XFER_READY; } endpoint_write(EP0IN, buffer, size); + + // Clear suspend after the setup stage + if (setup_suspend) { + USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; + setup_suspend = false; + } } void USBPhyHw::ep0_stall() @@ -345,6 +358,13 @@ void USBPhyHw::ep0_stall() return; } ctrl_xfer = CTRL_XFER_READY; + + // Clear suspend after the setup stage + if (setup_suspend) { + USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; + setup_suspend = false; + } + core_util_critical_section_enter(); endpoint_stall(EP0OUT); // Prepare for next setup packet @@ -503,7 +523,6 @@ bool USBPhyHw::endpoint_read_result_core(usb_ep_t endpoint, uint8_t *data, uint3 } } - USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; *bytes_read = sz; epComplete &= ~EP(DESC_TO_PHY(endpoint)); @@ -564,6 +583,7 @@ void USBPhyHw::process() } // enable control endpoint + setup_suspend = false; endpoint_add(EP0OUT, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); endpoint_add(EP0IN, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); @@ -608,7 +628,7 @@ void USBPhyHw::process() } // token interrupt - if (istat & 1<<3) { + if (istat & USB_ISTAT_TOKDNE_MASK) { uint32_t num = (USB0->STAT >> 4) & 0x0F; uint32_t dir = (USB0->STAT >> 3) & 0x01; uint32_t ev_odd = (USB0->STAT >> 2) & 0x01; @@ -616,6 +636,7 @@ void USBPhyHw::process() // setup packet if ((num == 0) && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == SETUP_TOKEN)) { + setup_suspend = true; Data1 |= 0x02 | 0x01; // set DATA1 for TX and RX bdt[EP_BDT_IDX(0, TX, EVEN)].info &= ~BD_OWN_MASK; bdt[EP_BDT_IDX(0, TX, ODD)].info &= ~BD_OWN_MASK; @@ -665,6 +686,16 @@ void USBPhyHw::process() USB0->ISTAT = USB_ISTAT_ERROR_MASK; } + // Check if the suspend condition should be removed here + // 1. Don't attempt to clear USB_CTL_TXSUSPENDTOKENBUSY_MASK if it isn't set. This + // is to avoid potential race conditions. + // 2. If a setup packet is being processed then remove suspend on the next control transfer rather than here + // 3. Process all pending packets before removing suspend + bool suspended = (USB0->CTL & USB_CTL_TXSUSPENDTOKENBUSY_MASK) != 0; + if (suspended && !setup_suspend && ((USB0->ISTAT & USB_ISTAT_TOKDNE_MASK) == 0)) { + USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; + } + NVIC_ClearPendingIRQ(USB0_IRQn); NVIC_EnableIRQ(USB0_IRQn); } From a9e94b60d6e776c3893f3b2f57460e18c9074820 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 21 Jun 2018 10:19:40 -0500 Subject: [PATCH 098/488] Abort the current USB transfer when stalling It is undefined behavior if stalling and unstalling clears an ongoing transfer. Abort any ongoing transfers explicitly when stalling and unstalling so the behavior is consistent across devices. --- usb/device/USBDevice/USBDevice.cpp | 8 ++++++++ usb/device/USBDevice/USBDevice.h | 7 +++++++ 2 files changed, 15 insertions(+) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index b38fd67f58a..d2327ba5b19 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -1151,6 +1151,10 @@ void USBDevice::endpoint_stall(usb_ep_t endpoint) info->flags |= ENDPOINT_STALLED; _phy->endpoint_stall(endpoint); + if (info->pending) { + endpoint_abort(endpoint); + } + unlock(); } @@ -1172,6 +1176,10 @@ void USBDevice::endpoint_unstall(usb_ep_t endpoint) return; } + if (info->pending) { + endpoint_abort(endpoint); + } + info->flags &= ~ENDPOINT_STALLED; _phy->endpoint_unstall(endpoint); diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 133ea245223..5831df48b79 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -178,6 +178,9 @@ class USBDevice: public USBPhyEvents { /** * Stall an endpoint * + * If there is an ongoing transfer on this endpoint then it will + * be aborted. + * * @param endpoint Endpoint to stall * @note You cannot stall endpoint 0 with this function * @note This endpoint must already have been setup with endpoint_add @@ -187,6 +190,10 @@ class USBDevice: public USBPhyEvents { /** * Unstall an endpoint * + * Unstalling an endpoint resets data toggle back to DATA0. + * Additionally, if there is an ongoing transfer on this endpoint + * it will be aborted. + * * @param endpoint Endpoint to unstall * @note This endpoint must already have been setup with endpoint_add */ From 603385a7175b8974002f204074eca26a19ee83d0 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 21 Jun 2018 11:25:01 -0500 Subject: [PATCH 099/488] Reset data toggle on Kinetis when unstalling Data toggle must be reset to DATA0 when an endpoint is unstalled. This patch makes that change. --- usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp index ad2fb53907d..16b0cd28569 100644 --- a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp +++ b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp @@ -436,6 +436,8 @@ void USBPhyHw::endpoint_stall(usb_ep_t endpoint) void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) { + // Next transfer will be a DATA0 packet + Data1 &= ~(1 << DESC_TO_PHY(endpoint)); USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; } From a4241ac128874815b6a20899a6e70e2ebec6c6ba Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 23 Jun 2018 20:30:23 -0500 Subject: [PATCH 100/488] Revert "Create HAL_PCD_EP_Abort" Revert the patch "Create HAL_PCD_EP_Abort" in preparation for an alternate fix. --- .../TARGET_STM32F2/device/stm32f2xx_hal_pcd.c | 22 -------- .../TARGET_STM32F2/device/stm32f2xx_hal_pcd.h | 1 - .../TARGET_STM32F2/device/stm32f2xx_ll_usb.c | 55 ------------------- .../TARGET_STM32F2/device/stm32f2xx_ll_usb.h | 1 - .../targets/TARGET_STM/USBPhy_STM32.cpp | 4 -- 5 files changed, 83 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c index 8d1915a88dc..ee1703bbd10 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c @@ -1042,28 +1042,6 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); return HAL_OK; } -/** - * @brief Abort a transaction. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @param pBuf: pointer to the transmission buffer - * @param len: amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - HAL_StatusTypeDef ret; - USB_OTG_EPTypeDef *ep; - - ep = &hpcd->IN_ep[ep_addr & 0x7F]; - - /*setup and start the Xfer */ - __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); - ret = USB_EPStopXfer(hpcd->Instance , ep, hpcd->Init.dma_enable); - - __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); - return ret; -} /** * @brief Set a STALL condition over an endpoint. diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h index 610c8456e95..f617e6d8de6 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h @@ -271,7 +271,6 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); -HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c index 02b936b5925..b4799572c43 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c @@ -745,61 +745,6 @@ HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeD } return HAL_OK; } -/** - * @brief USB_EPStoptXfer : setup and starts a transfer over an EP - * @param USBx : Selected device - * @param ep: pointer to endpoint structure - * @param dma: USB dma enabled or disabled - * This parameter can be one of these values: - * 0 : DMA feature not used - * 1 : DMA feature used - * @retval HAL status - */ -HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma) -{ - HAL_StatusTypeDef ret = HAL_OK; - /* IN endpoint */ - if (ep->is_in == 1U) - { - - /* EP enable, IN data in FIFO */ - if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) - { - volatile uint32_t loop=0; - USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_EPDIS); - while(((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) - {/* data sheet say that EPDISD: Endpoint disabled interrupt must be raised - to consider the endpoint as disable */ - /* fix me loop for test only */ - loop++; - if (loop > 10000L) { - ret =HAL_ERROR; - break; - } - } - } - } - else /* OUT endpoint */ - { - if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) - { - volatile uint32_t loop=0; - USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_EPDIS); - while(((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) - {/* data sheet say that EPDISD: Endpoint disabled interrupt must be raised - to consider the endpoint as disable */ - /* Fix me loop for test only */ - loop++; - if (loop > 10000L) { - ret =HAL_ERROR; - break; - } - } - } - } - return ret; -} - /** * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h index ac6cc496df3..ebbb5987613 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h @@ -404,7 +404,6 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EP HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); -HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma); void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len); diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 91facb63698..5bb99c5b017 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -476,10 +476,6 @@ bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) void USBPhyHw::endpoint_abort(usb_ep_t endpoint) { // TODO - stop the current transfer on this endpoint and don't call the IN or OUT callback - HAL_StatusTypeDef ret; - ret = HAL_PCD_EP_Abort(&hpcd, endpoint); - MBED_ASSERT(ret==HAL_OK); - return; } void USBPhyHw::process() From 79a9db3748f1ee5df5b0e79ce15713ccab5354db Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 25 Jun 2018 17:44:39 -0500 Subject: [PATCH 101/488] Alternate implementation of HAL_PCD_EP_Abort Update the patch "Create HAL_PCD_EP_Abort" to fix bugs. This patch adds the low level functions USB_EPStopXfer, USB_EPSetNak, USB_EPClearNak and the high level function HAL_PCD_EP_Abort so that transfers can be stopped. The functions USB_EPSetNak and USB_EPClearNak allow nak to be enabled or disabled for an endpoint, preventing or allowing further transfers. The function USB_EPStopXfer stops pending reads and writes started by USB_EPStartXfer along with clearing and masking any interrupts enabled by USB_EPStartXfer. The function HAL_PCD_EP_Abort aborts any transfers on the given endpoint. When this function completes the transfer interrupt is guarenteed not to fire for this endpoint. Furthermore, the size of data transferred during an aborted read can be found by calling the function HAL_PCD_EP_GetRxCount. Other notes on this Change: 1. Prior to this patch the interrupt USB_OTG_DOEPINT_EPDISD was not handled. When an OUT endpoint was disabled this interrupt occurred causing the CPU to get stuck repeatedly handling this interrupt. This is because this interrupt was unmasked but nothing cleared this interrupt. This patch also adds code to handle and clear this interrupt to prevent a lockup. 2. Stopping a transfer on an OUT endpoint requires global nak OUT to be in effect. Even with this being done, having entries in the rx fifo prevented an OUT endpoint from being disabled. This behavior is not mentioned in the Reference Manual. --- .../TARGET_STM32F2/device/stm32f2xx_hal_pcd.c | 143 ++++++++++++--- .../TARGET_STM32F2/device/stm32f2xx_hal_pcd.h | 1 + .../TARGET_STM32F2/device/stm32f2xx_ll_usb.c | 166 ++++++++++++++++++ .../TARGET_STM32F2/device/stm32f2xx_ll_usb.h | 3 + 4 files changed, 291 insertions(+), 22 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c index ee1703bbd10..415c279307d 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c @@ -104,6 +104,7 @@ * @{ */ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t epnum); +static HAL_StatusTypeDef PCD_ReadRxFifo(PCD_HandleTypeDef *hpcd); /** * @} */ @@ -314,7 +315,6 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; uint32_t i = 0U, ep_intr = 0U, epint = 0U, epnum = 0U; uint32_t fifoemptymsk = 0U, temp = 0U; - USB_OTG_EPTypeDef *ep; uint32_t hclk = 120000000U; /* ensure that we are in device mode */ @@ -366,6 +366,11 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) } } + if (( epint & USB_OTG_DOEPINT_EPDISD) == USB_OTG_DOEPINT_EPDISD) + { + CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_EPDISD); + } + if(( epint & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP) { /* Inform the upper layer that a setup packet is available */ @@ -596,27 +601,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) /* Handle RxQLevel Interrupt */ if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) { - USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); - - temp = USBx->GRXSTSP; - - ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM]; - - if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_DATA_UPDT) - { - if((temp & USB_OTG_GRXSTSP_BCNT) != 0U) - { - USB_ReadPacket(USBx, ep->xfer_buff, (temp & USB_OTG_GRXSTSP_BCNT) >> 4U); - ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; - ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; - } - } - else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_SETUP_UPDT) - { - USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U); - ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; - } - USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); + PCD_ReadRxFifo(hpcd); } /* Handle SOF Interrupt */ @@ -1043,6 +1028,84 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, return HAL_OK; } +/** + * @brief Abort a transaction. + * @param hpcd: PCD handle + * @param ep_addr: endpoint address + * @retval HAL status + */ +HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) +{ + USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; + HAL_StatusTypeDef ret = HAL_OK; + USB_OTG_EPTypeDef *ep; + + if ((0x80 & ep_addr) == 0x80) + { + ep = &hpcd->IN_ep[ep_addr & 0x7F]; + } + else + { + ep = &hpcd->OUT_ep[ep_addr]; + } + + __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); + + ep->num = ep_addr & 0x7F; + ep->is_in = ((ep_addr & 0x80) == 0x80); + + USB_EPSetNak(hpcd->Instance, ep); + + if ((0x80 & ep_addr) == 0x80) + { + ret = USB_EPStopXfer(hpcd->Instance , ep); + if (ret == HAL_OK) + { + ret = USB_FlushTxFifo(hpcd->Instance, ep_addr & 0x7F); + } + } + else + { + /* Set global NAK */ + USBx_DEVICE->DCTL |= USB_OTG_DCTL_SGONAK; + + /* Read all entries from the fifo so global NAK takes effect */ + while (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) + { + PCD_ReadRxFifo(hpcd); + } + + /* Stop the transfer */ + ret = USB_EPStopXfer(hpcd->Instance , ep); + if (ret == HAL_BUSY) + { + /* If USB_EPStopXfer returns HAL_BUSY then a setup packet + * arrived after the rx fifo was processed but before USB_EPStopXfer + * was called. Process the rx fifo one more time to read the + * setup packet. + * + * Note - after the setup packet has been received no further + * packets will be received over USB. This is because the next + * phase (data or status) of the control transfer started by + * the setup packet will be naked until global nak is cleared. + */ + while (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) + { + PCD_ReadRxFifo(hpcd); + } + + ret = USB_EPStopXfer(hpcd->Instance , ep); + } + + /* Clear global nak */ + USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGONAK; + } + + __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); + + return ret; +} + /** * @brief Set a STALL condition over an endpoint. * @param hpcd: PCD handle @@ -1256,6 +1319,42 @@ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t return HAL_OK; } +/** + * @brief Process the next RX fifo entry + * @param hpcd: PCD handle + * @retval HAL status + */ +static HAL_StatusTypeDef PCD_ReadRxFifo(PCD_HandleTypeDef *hpcd) +{ + USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; + USB_OTG_EPTypeDef *ep; + uint32_t temp = 0; + + USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); + + temp = USBx->GRXSTSP; + + ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM]; + + if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_DATA_UPDT) + { + if((temp & USB_OTG_GRXSTSP_BCNT) != 0U) + { + USB_ReadPacket(USBx, ep->xfer_buff, (temp & USB_OTG_GRXSTSP_BCNT) >> 4U); + ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; + ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; + } + } + else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_SETUP_UPDT) + { + USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U); + ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; + } + USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); + + return HAL_OK; +} + /** * @} */ diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h index f617e6d8de6..610c8456e95 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h @@ -271,6 +271,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); +HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c index b4799572c43..c15db199e7e 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c @@ -746,6 +746,96 @@ HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeD return HAL_OK; } +/** + * @brief USB_EPStoptXfer : stop transfer on this endpoint + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @retval HAL status + * @note IN endpoints must have NAK enabled before calling this function + * @note OUT endpoints must have global out NAK enabled before calling this + * function. Furthermore, the RX fifo must be empty or the status + * HAL_BUSY will be returned. + */ +HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep) +{ + HAL_StatusTypeDef ret = HAL_OK; + uint32_t count = 0U; + uint32_t epint, fifoemptymsk; + + /* IN endpoint */ + if (ep->is_in == 1U) + { + + /* EP enable, IN data in FIFO */ + if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) + { + /* Disable this endpoint */ + USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_EPDIS; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_INEP(ep->num)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA); + } + + /* Clear transfer complete interrupt */ + epint = USB_ReadDevInEPInterrupt(USBx, ep->num); + if((epint & USB_OTG_DIEPINT_XFRC) == USB_OTG_DIEPINT_XFRC) + { + CLEAR_IN_EP_INTR(ep->num, USB_OTG_DIEPINT_XFRC); + } + + /* Mask fifo empty interrupt */ + fifoemptymsk = 0x1U << ep->num; + atomic_clr_u32(&USBx_DEVICE->DIEPEMPMSK, fifoemptymsk); + } + else /* OUT endpoint */ + { + if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) + { + /* Disable this endpoint */ + USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_EPDIS; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + if ((USBx->GINTSTS & USB_OTG_GINTSTS_RXFLVL) == USB_OTG_GINTSTS_RXFLVL) + { + /* Although not mentioned in the Reference Manual, it appears that the + * rx fifo must be empty for an OUT endpoint to be disabled. Typically + * this will happen when setting the global OUT nak (required by Reference + * Manual) as this requires processing the rx fifo. This is not guaranteed + * though, as a setup packet can arrive even while global OUT nak is set. + * + * During testing this event was observed and prevented endpoint disabling + * from completing until the rx fifo was empty. To address this problem + * return HAL_BUSY if the rx fifo is not empty to give higher level code + * a chance to clear the fifo and retry the operation. + * + */ + return HAL_BUSY; + } + } + while ((USBx_OUTEP(ep->num)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA); + } + + /* Clear interrupt */ + epint = USB_ReadDevOutEPInterrupt(USBx, ep->num); + if(( epint & USB_OTG_DOEPINT_XFRC) == USB_OTG_DOEPINT_XFRC) + { + CLEAR_OUT_EP_INTR(ep->num, USB_OTG_DOEPINT_XFRC); + } + } + return ret; +} + /** * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated * with the EP/channel @@ -855,6 +945,82 @@ HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDe return HAL_OK; } +/** + * @brief USB_EPSetNak : stop transfer and nak all tokens on this endpoint + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @retval HAL status + */ +HAL_StatusTypeDef USB_EPSetNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep) +{ + uint32_t count = 0; + if (ep->is_in == 1U) + { + USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_INEP(ep->num)->DIEPCTL & USB_OTG_DIEPCTL_NAKSTS) != USB_OTG_DIEPCTL_NAKSTS); + } + else + { + USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_OUTEP(ep->num)->DOEPCTL & USB_OTG_DOEPCTL_NAKSTS) != USB_OTG_DOEPCTL_NAKSTS); + } + return HAL_OK; +} + +/** + * @brief USB_EPSetNak : resume transfer and stop naking on this endpoint + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @retval HAL status + */ +HAL_StatusTypeDef USB_EPClearNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep) +{ + uint32_t count = 0; + if (ep->is_in == 1U) + { + USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_CNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_INEP(ep->num)->DIEPCTL & USB_OTG_DIEPCTL_NAKSTS) == USB_OTG_DIEPCTL_NAKSTS); + } + else + { + USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_OUTEP(ep->num)->DOEPCTL & USB_OTG_DOEPCTL_NAKSTS) == USB_OTG_DOEPCTL_NAKSTS); + } + return HAL_OK; +} + /** * @brief USB_StopDevice : Stop the usb device mode * @param USBx : Selected device diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h index ebbb5987613..1d04629847c 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h @@ -404,11 +404,14 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EP HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); +HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma); void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len); HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); +HAL_StatusTypeDef USB_EPSetNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); +HAL_StatusTypeDef USB_EPClearNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address); HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx); HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx); From 5ec94a00ca9d1a22b469b0f962947cfa3814a976 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 25 Jun 2018 17:48:53 -0500 Subject: [PATCH 102/488] Implement endpoint_abort for STM32 Make use of the added function HAL_PCD_EP_Abort to implement endpoint_abort. --- usb/device/targets/TARGET_STM/USBPhy_STM32.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 5bb99c5b017..33a80921f20 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -475,7 +475,8 @@ bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) void USBPhyHw::endpoint_abort(usb_ep_t endpoint) { - // TODO - stop the current transfer on this endpoint and don't call the IN or OUT callback + HAL_StatusTypeDef ret = HAL_PCD_EP_Abort(&hpcd, endpoint); + MBED_ASSERT(ret==HAL_OK); } void USBPhyHw::process() From 84b449ff7dbcdc460c255dd731fbd5d94c4480a2 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 25 Jun 2018 17:55:03 -0500 Subject: [PATCH 103/488] Fix ST test failures due to endpoint reconfiguration Also always use the max endpoint size for SetTxFifo since re-configuring fifos when endpoints are added or removed causes tests to fail. --- .../targets/TARGET_STM/USBPhy_STM32.cpp | 79 +++++++++++++------ 1 file changed, 56 insertions(+), 23 deletions(-) diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 33a80921f20..7990dc02fb0 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -41,6 +41,19 @@ #define LOG_OUT_TO_EP(ep) ((ep) | 0x00) #define IDX_TO_EP(ep) (((ep) >> 1)|((ep) & 1) << 7) +/* endpoint defines */ +#define NUM_ENDPOINTS 4 +#define MAX_PACKET_NON_ISO 64 +#define MAX_PACKET_ISO (256 + 128) // Spec can go up to 1023, only ram for this though +#define ENDPOINT_NON_ISO (USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_ALLOW_INT) + +static const uint32_t tx_ep_sizes[NUM_ENDPOINTS] = { + MAX_PACKET_NON_ISO, + MAX_PACKET_NON_ISO, + MAX_PACKET_NON_ISO, + MAX_PACKET_ISO +}; + uint32_t HAL_PCDEx_GetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo) { uint32_t len; @@ -274,11 +287,28 @@ void USBPhyHw::init(USBPhyEvents *events) hpcd.State = HAL_PCD_STATE_RESET; HAL_PCD_Init(&hpcd); + + uint32_t total_bytes = 0; + + /* Reserve space in the RX buffer for: + * - 1 isochonous packet + * - 2 max sized non-isochonous packets + * - setup buffer - 10 words as specified by Reference Manual + * - global nak out - 1 words as specified by Reference Manual + */ + uint32_t fifo_size = (MAX_PACKET_ISO + 4) + (MAX_PACKET_NON_ISO + 4) * 2 + (10 * 4) + (1 * 4); + HAL_PCDEx_SetRxFiFo(&hpcd, (fifo_size / 4)); + total_bytes += fifo_size; + + /* Reserve Tx space up front */ + for (int i = 0; i < NUM_ENDPOINTS; i++) { + fifo_size = tx_ep_sizes[i] + 4; + HAL_PCDEx_SetTxFiFo(&hpcd, i, fifo_size / 4); + total_bytes += fifo_size; + } + /* 1.25 kbytes */ - /* min value 16 (= 16 x 4 bytes) */ - /* max value 256 (= 1K bytes ) */ - /* maximum sum is 0x140 */ - HAL_PCDEx_SetRxFiFo(&hpcd, (MAXTRANSFER_SIZE / 4)); + MBED_ASSERT(total_bytes <= 1280); // Configure interrupt vector NVIC_SetVector(USBHAL_IRQn, (uint32_t)&_usbisr); @@ -340,24 +370,24 @@ void USBPhyHw::remote_wakeup() const usb_ep_table_t *USBPhyHw::endpoint_table() { static const usb_ep_table_t table = { - 1280, // 1.25K for endpoint buffers + 1280, // 1.25K for endpoint buffers but space is allocated up front { - {USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 80}, - {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4} + {USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0} } }; return &table; @@ -409,9 +439,12 @@ void USBPhyHw::ep0_stall() bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type) { uint32_t len; - if (max_packet > MAXTRANSFER_SIZE) return false; + + /* + * Endpoints are configured in init since re-configuring + * fifos when endpoints are added or removed causes tests to fail. + */ if (endpoint & 0x80) { - HAL_PCDEx_SetTxFiFo(&hpcd, endpoint & 0x7f, (max_packet / 4) + 1); len = HAL_PCDEx_GetTxFiFo(&hpcd,endpoint & 0x7f); MBED_ASSERT(len >= max_packet); } From 082243d574606beb542c3fe2900489676265cd1f Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 25 Jun 2018 18:06:55 -0500 Subject: [PATCH 104/488] Remove OR from ST endpoint activation When activating an endpoint assign new data rather than ORing data to it. This ensures that values set from the previous use do not effect the current configuration. --- .../TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c index c15db199e7e..5317615b256 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c @@ -430,7 +430,7 @@ HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTy if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0U) { - USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U ) |\ + USBx_INEP(ep->num)->DIEPCTL = ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U ) |\ ((ep->num) << 22U ) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP)); } @@ -441,7 +441,7 @@ HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTy if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0U) { - USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U ) |\ + USBx_OUTEP(ep->num)->DOEPCTL = ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U ) |\ (USB_OTG_DIEPCTL_SD0PID_SEVNFRM)| (USB_OTG_DOEPCTL_USBAEP)); } } @@ -462,7 +462,7 @@ HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB { if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0U) { - USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U) |\ + USBx_INEP(ep->num)->DIEPCTL = ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U) |\ ((ep->num) << 22U) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP)); } @@ -476,7 +476,7 @@ HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB { if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0U) { - USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U) |\ + USBx_OUTEP(ep->num)->DOEPCTL = ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U) |\ ((ep->num) << 22U) | (USB_OTG_DOEPCTL_USBAEP)); debug = (uint32_t)(((uint32_t )USBx) + USB_OTG_OUT_ENDPOINT_BASE + (0U)*USB_OTG_EP_REG_SIZE); From 9473efcb716c4dda6107085f80d43dff40077816 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Mon, 19 Mar 2018 16:41:55 +0100 Subject: [PATCH 105/488] USB: EndpointResolver: Add a generic method to get a free endpoint --- usb/device/USBDevice/EndpointResolver.cpp | 21 ++++++++------------- usb/device/USBDevice/EndpointResolver.h | 5 +++++ 2 files changed, 13 insertions(+), 13 deletions(-) diff --git a/usb/device/USBDevice/EndpointResolver.cpp b/usb/device/USBDevice/EndpointResolver.cpp index e06b8929600..05ced02866a 100644 --- a/usb/device/USBDevice/EndpointResolver.cpp +++ b/usb/device/USBDevice/EndpointResolver.cpp @@ -44,9 +44,9 @@ void EndpointResolver::endpoint_ctrl(uint32_t size) endpoint_out(USB_EP_TYPE_CTRL, size); } -usb_ep_t EndpointResolver::endpoint_in(usb_ep_type_t type, uint32_t size) +usb_ep_t EndpointResolver::next_free_endpoint(bool in_not_out, usb_ep_type_t type, uint32_t size) { - int index = next_index(type, true); + int index = next_index(type, in_not_out); if (index < 0) { _valid = false; return 0; @@ -57,21 +57,16 @@ usb_ep_t EndpointResolver::endpoint_in(usb_ep_type_t type, uint32_t size) _used |= 1 << index; return index_to_endpoint(index); + +} +usb_ep_t EndpointResolver::endpoint_in(usb_ep_type_t type, uint32_t size) +{ + return next_free_endpoint(true, type, size); } usb_ep_t EndpointResolver::endpoint_out(usb_ep_type_t type, uint32_t size) { - int index = next_index(type, false); - if (index < 0) { - _valid = false; - return 0; - } - - const usb_ep_entry_t &entry = _table->table[index_to_logical(index)]; - _cost += entry.base_cost + entry.byte_cost * size; - _used |= 1 << index; - - return index_to_endpoint(index); + return next_free_endpoint(false, type, size); } bool EndpointResolver::valid() diff --git a/usb/device/USBDevice/EndpointResolver.h b/usb/device/USBDevice/EndpointResolver.h index 04f7d188f8e..a0a9a93e8fc 100644 --- a/usb/device/USBDevice/EndpointResolver.h +++ b/usb/device/USBDevice/EndpointResolver.h @@ -62,6 +62,11 @@ class EndpointResolver { */ usb_ep_t endpoint_out(usb_ep_type_t type, uint32_t size); + /** + * Get next free endpoint + */ + usb_ep_t next_free_endpoint(bool in_not_out, usb_ep_type_t type, uint32_t size); + /** * Check if the endpoint configuration created so far is valid * From 4915079d09f4809f2c178f68f7af05e88da9ad8a Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Wed, 28 Mar 2018 11:35:37 +0200 Subject: [PATCH 106/488] Tests: USB: Generic: Add basic endpoint tests --- TESTS/host_tests/pyusb_basic.py | 428 ++++++++++- TESTS/usb_device/basic/USBEndpointTester.cpp | 767 +++++++++++++++++++ TESTS/usb_device/basic/USBEndpointTester.h | 108 +++ TESTS/usb_device/basic/main.cpp | 161 +++- 4 files changed, 1459 insertions(+), 5 deletions(-) create mode 100644 TESTS/usb_device/basic/USBEndpointTester.cpp create mode 100644 TESTS/usb_device/basic/USBEndpointTester.h diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index d9c9f2e0b00..4aba71bcb4d 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -21,7 +21,9 @@ import time import sys import inspect -from threading import Thread +from threading import Thread, Event, Timer +import array +import random import usb.core from usb.util import build_request_type @@ -33,7 +35,7 @@ DESC_TYPE_INTERFACE, DESC_TYPE_ENDPOINT) import struct -from collections import namedtuple + def get_interface(dev, interface, alternate=0): intf = None @@ -102,6 +104,12 @@ def get_interface(dev, interface, alternate=0): interface_descriptor_keys = ['bLength', 'bDescriptorType', 'bEndpointAddress', 'bmAttributes', 'wMaxPacketSize', 'bInterval'] +ENDPOINT_TYPE_NAMES = { + usb.ENDPOINT_TYPE_BULK: 'BULK', + usb.ENDPOINT_TYPE_CONTROL: 'CONTROL', + usb.ENDPOINT_TYPE_INTERRUPT: 'INTERRUPT', + usb.ENDPOINT_TYPE_ISOCHRONOUS: 'ISOCHRONOUS'} + class PyusbBasicTest(BaseHostTest): def _callback_control_basic_test(self, key, value, timestamp): @@ -162,7 +170,6 @@ def _callback_control_stress_test(self, key, value, timestamp): except (RuntimeError) as exc: self.report_error(exc) - def _callback_device_reset_test(self, key, value, timestamp): self.log("Received serial %s" % (value)) @@ -217,6 +224,71 @@ def _callback_repeated_construction_destruction_test(self, key, value, timestamp except (RuntimeError) as exc: self.report_error(exc) + def _callback_ep_test_data_correctness(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + ep_test_data_correctness(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + def _callback_ep_test_halt(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + ep_test_halt(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + def _callback_ep_test_parallel_transfers(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + ep_test_parallel_transfers(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + def _callback_ep_test_parallel_transfers_ctrl(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + ep_test_parallel_transfers_ctrl(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + def _callback_ep_test_abort(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + ep_test_abort(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + def _callback_reset_support(self, key, value, timestamp): status = "false" if sys.platform == "darwin" else "true" self.log("Reset supported: %s" % status) @@ -267,6 +339,12 @@ def setup(self): self.register_callback('device_suspend_resume_test', self._callback_device_suspend_resume_test) self.register_callback('repeated_construction_destruction_test', self._callback_repeated_construction_destruction_test) + self.register_callback('ep_test_data_correctness', self._callback_ep_test_data_correctness) + self.register_callback('ep_test_halt', self._callback_ep_test_halt) + self.register_callback('ep_test_parallel_transfers', self._callback_ep_test_parallel_transfers) + self.register_callback('ep_test_parallel_transfers_ctrl', self._callback_ep_test_parallel_transfers_ctrl) + self.register_callback('ep_test_abort', self._callback_ep_test_abort) + self.register_callback('reset_support', self._callback_reset_support) @@ -837,6 +915,350 @@ def control_stress_test(dev, log): count += 1 +def find_ep_pair(intf, endpoint_type): + ep_out = usb.util.find_descriptor( + intf, custom_match=lambda e: + usb.util.endpoint_type(e.bmAttributes) == endpoint_type and + usb.util.endpoint_direction(e.bEndpointAddress) == usb.ENDPOINT_OUT) + ep_in = usb.util.find_descriptor( + intf, custom_match=lambda e: + usb.util.endpoint_type(e.bmAttributes) == endpoint_type and + usb.util.endpoint_direction(e.bEndpointAddress) == usb.ENDPOINT_IN) + if not all((ep_out, ep_in)): + raise_unconditionally(lineno(), 'Unable to find {} endpoint pair.' + .format(ENDPOINT_TYPE_NAMES[endpoint_type])) + raise_if_different(ep_out.wMaxPacketSize, ep_in.wMaxPacketSize, lineno(), + 'wMaxPacketSize not equal for OUT and IN {} endpoints.' + .format(ENDPOINT_TYPE_NAMES[endpoint_type])) + return ep_out, ep_in + + +def loopback_ep_test(ep_out, ep_in, payload_size): + payload_out = array.array('B', (random.randint(0x00, 0xff) for _ in range(payload_size))) + ep_out.write(payload_out) + payload_in = ep_in.read(ep_in.wMaxPacketSize) + raise_if_different(payload_out, payload_in, lineno(), 'Payloads mismatch.') + + +def random_size_loopback_ep_test(ep_out, ep_in, failure, error, seconds, log, min_payload_size=1): + end_ts = time.time() + seconds + while time.time() < end_ts and not failure.is_set() and not error.is_set(): + payload_size = random.randint(min_payload_size, ep_out.wMaxPacketSize) + try: + loopback_ep_test(ep_out, ep_in, payload_size) + except RuntimeError as err: + log(err) + failure.set() + return + except usb.USBError as err: + log(USB_ERROR_FMT.format(err, ep_out, ep_in, payload_size)) + error.set() + return + time.sleep(0.01) + + +def halt_ep_test(dev, ep_out, ep_in, ep_to_halt, log): + MIN_HALT_DELAY = 0.01 + MAX_HALT_DELAY = 0.1 + delay = random.uniform(MIN_HALT_DELAY, MAX_HALT_DELAY) + ctrl_kwargs = { + 'bmRequestType': build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, CTRL_RECIPIENT_ENDPOINT), + 'bRequest': REQUEST_SET_FEATURE, + 'wValue': FEATURE_ENDPOINT_HALT, + 'wIndex': ep_to_halt.bEndpointAddress} + ctrl_error = Event() + + def timer_handler(): + try: + dev.ctrl_transfer(**ctrl_kwargs) + except Exception as err: + log('Endpoint {:#04x} halt failed ({}).'.format(ctrl_kwargs['wIndex'], err)) + ctrl_error.set() + + delayed_halt = Timer(delay, timer_handler) + delayed_halt.start() + end_ts = time.time() + 1.5 * delay + try: + while time.time() < end_ts and not ctrl_error.is_set(): + loopback_ep_test(ep_out, ep_in, ep_out.wMaxPacketSize) + except usb.core.USBError as err: + if err.errno not in (32, 110): + raise_unconditionally(lineno(), 'Unexpected error ({!r}).'.format(err)) + if ctrl_error.is_set(): + raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x} failed' + .format(ep_to_halt)) + else: + raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x}' + ' during transmission did not raise USBError.' + .format(ep_to_halt)) + + +USB_ERROR_FMT = str('Got {0!r} while testing endpoints ' + '{1.bEndpointAddress:#04x}({1.wMaxPacketSize:02}) and ' + '{2.bEndpointAddress:#04x}({2.wMaxPacketSize:02}) with a random payload of {3} B.') + + +def ep_test_data_correctness(dev, log, verbose=False): + cfg = dev.get_active_configuration() + for intf in cfg: + log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') + if intf.bAlternateSetting == 0: + log('skipping the default AlternateSetting') + continue + log('running tests') + intf.set_altsetting() + + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + interrupt_out, interrupt_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_INTERRUPT) + iso_out, iso_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_ISOCHRONOUS) + + if verbose: + log('\tbulk_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_out)) + log('\tbulk_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_in)) + log('\tinterrupt_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_out)) + log('\tinterrupt_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_in)) + log('\tiso_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_out)) + log('\tiso_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_in)) + + if verbose: + log('Testing OUT/IN data correctness for bulk endpoint pair.') + for payload_size in range(1, bulk_out.wMaxPacketSize + 1): + try: + loopback_ep_test(bulk_out, bulk_in, payload_size) + except usb.USBError as err: + raise_unconditionally(lineno(), USB_ERROR_FMT.format(err, bulk_out, bulk_in, payload_size)) + + if verbose: + log('Testing OUT/IN data correctness for interrupt endpoint pair.') + for payload_size in range(interrupt_out.wMaxPacketSize + 1): + try: + loopback_ep_test(interrupt_out, interrupt_in, payload_size) + except usb.USBError as err: + raise_unconditionally(lineno(), USB_ERROR_FMT.format(err, interrupt_out, interrupt_in, payload_size)) + +# if verbose: +# log('Testing OUT/IN data correctness for isochronous endnpoint pair.') +# payload_size = 128 # range(1, iso_out.wMaxPacketSize + 1): +# try: +# loopback_ep_test(iso_out, iso_in, payload_size) +# except usb.USBError as err: +# log(err) +# raise_unconditionally(lineno(), USB_ERROR_FMT.format(err, iso_out, iso_in, payload_size)) + + +def ep_test_halt(dev, log, verbose=False): + cfg = dev.get_active_configuration() + for intf in cfg: + log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') + if intf.bAlternateSetting == 0: + log('skipping the default AlternateSetting') + continue + log('running tests') + intf.set_altsetting() + + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + interrupt_out, interrupt_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_INTERRUPT) + iso_out, iso_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_ISOCHRONOUS) + + if verbose: + log('\tbulk_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_out)) + log('\tbulk_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_in)) + log('\tinterrupt_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_out)) + log('\tinterrupt_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_in)) + log('\tiso_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_out)) + log('\tiso_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_in)) + + if verbose: + log('Testing endpoint halt at a random point of bulk transmission.') + end_ts = time.time() + 1.0 + while time.time() < end_ts: + halt_ep_test(dev, bulk_out, bulk_in, bulk_out, log) + bulk_out.clear_halt() + intf.set_altsetting() # Force the device to start reading data from all OUT endpoints again. + halt_ep_test(dev, bulk_out, bulk_in, bulk_in, log) + bulk_in.clear_halt() + intf.set_altsetting() # Force the device to start reading data from all OUT endpoints again. + + if verbose: + log('Testing endpoint halt at a random point of interrupt transmission.') + end_ts = time.time() + 1.0 + while time.time() < end_ts: + halt_ep_test(dev, interrupt_out, interrupt_in, interrupt_out, log) + interrupt_out.clear_halt() + intf.set_altsetting() # Force the device to start reading data from all OUT endpoints again. + halt_ep_test(dev, interrupt_out, interrupt_in, interrupt_in, log) + interrupt_out.clear_halt() + intf.set_altsetting() # Force the device to start reading data from all OUT endpoints again. + + +def ep_test_parallel_transfers(dev, log, verbose=False): + cfg = dev.get_active_configuration() + for intf in cfg: + log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') + if intf.bAlternateSetting == 0: + log('skipping the default AlternateSetting') + continue + log('running tests') + intf.set_altsetting() + + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + interrupt_out, interrupt_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_INTERRUPT) + iso_out, iso_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_ISOCHRONOUS) + + if verbose: + log('\tbulk_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_out)) + log('\tbulk_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_in)) + log('\tinterrupt_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_out)) + log('\tinterrupt_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_in)) + log('\tiso_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_out)) + log('\tiso_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_in)) + + if verbose: + log('Testing simultaneous transfers through bulk and interrupt endpoint pairs.') + test_error = Event() + test_failure = Event() + test_kwargs_bulk_ep = { + 'ep_out': bulk_out, + 'ep_in': bulk_in, + 'failure': test_failure, + 'error': test_error, + 'seconds': 1.0, + 'log': log} + test_kwargs_interrupt_ep = { + 'ep_out': interrupt_out, + 'ep_in': interrupt_in, + 'failure': test_failure, + 'error': test_error, + 'seconds': 1.0, + 'log': log} + ep_test_threads = [] + for kwargs in (test_kwargs_bulk_ep, test_kwargs_interrupt_ep): + ep_test_threads.append(Thread(target=random_size_loopback_ep_test, kwargs=kwargs)) + for t in ep_test_threads: + t.start() + for t in ep_test_threads: + t.join() + if test_failure.is_set(): + raise_unconditionally(lineno(), 'Payload mismatch') + if test_error.is_set(): + raise_unconditionally(lineno(), 'USBError') + + +def ep_test_parallel_transfers_ctrl(dev, log, verbose=False): + cfg = dev.get_active_configuration() + for intf in cfg: + log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') + if intf.bAlternateSetting == 0: + log('skipping the default AlternateSetting') + continue + log('running tests') + intf.set_altsetting() + + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + interrupt_out, interrupt_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_INTERRUPT) + iso_out, iso_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_ISOCHRONOUS) + + if verbose: + log('\tbulk_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_out)) + log('\tbulk_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_in)) + log('\tinterrupt_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_out)) + log('\tinterrupt_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_in)) + log('\tiso_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_out)) + log('\tiso_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_in)) + + if verbose: + log('Testing parallel data transfers through bulk, interrupt & control endpoint pairs.') + test_error = Event() + test_failure = Event() + test_kwargs_bulk_ep = { + 'ep_out': bulk_out, + 'ep_in': bulk_in, + 'failure': test_failure, + 'error': test_error, + 'seconds': 1.0, + 'log': log} + test_kwargs_interrupt_ep = { + 'ep_out': interrupt_out, + 'ep_in': interrupt_in, + 'failure': test_failure, + 'error': test_error, + 'seconds': 1.0, + 'log': log} + ep_test_threads = [] + for kwargs in (test_kwargs_bulk_ep, test_kwargs_interrupt_ep): + ep_test_threads.append(Thread(target=random_size_loopback_ep_test, kwargs=kwargs)) + for t in ep_test_threads: + t.start() + while any(t.is_alive() for t in ep_test_threads): + control_stress_test(dev, log) + control_sizes_test(dev, log) + for t in ep_test_threads: + t.join() + if test_failure.is_set(): + raise_unconditionally(lineno(), 'Payload mismatch') + if test_error.is_set(): + raise_unconditionally(lineno(), 'USBError') + + +def ep_test_abort(dev, log, verbose=False): + NUM_PACKETS_UNTIL_ABORT = 2 + NUM_PACKETS_AFTER_ABORT = 8 + cfg = dev.get_active_configuration() + for intf in cfg: + log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') + if intf.bAlternateSetting == 0: + log('skipping the default AlternateSetting') + continue + log('running tests') + intf.set_altsetting() + + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + interrupt_out, interrupt_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_INTERRUPT) + + if verbose: + log('\tbulk_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_out)) + log('\tbulk_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_in)) + log('\tinterrupt_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_out)) + log('\tinterrupt_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_in)) + + if verbose: + log('Testing aborting an in progress transfer for IN endpoints.') + for ep_in in (bulk_in, interrupt_in): + payload_size = (NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) * ep_in.wMaxPacketSize + payload_in = ep_in.read(payload_size) + if verbose: + log('The size of data successfully received from endpoint {0.bEndpointAddress:#04x}: {1} B.' + .format(ep_in, len(payload_in))) + too_little = bool(len(payload_in) < (NUM_PACKETS_UNTIL_ABORT * ep_in.wMaxPacketSize)) + too_much = bool(len(payload_in) >= payload_size) + if too_little or too_much: + raise_unconditionally( + lineno(), 'Invalid size of data successfully received from endpoint ' + '{0.bEndpointAddress:#04x} before aborting the transfer. ' + 'Value {1} B out of range [{2}, {3}).' + .format(ep_in, len(payload_in), + NUM_PACKETS_UNTIL_ABORT * ep_in.wMaxPacketSize, payload_size)) + + if verbose: + log('Testing aborting an in progress transfer for OUT endpoints.') + for ep_out in (bulk_out, interrupt_out): + payload_size = (NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) * ep_out.wMaxPacketSize + payload_out = array.array('B', (0x01 for _ in range(payload_size))) + num_bytes_written = ep_out.write(payload_out) + if verbose: + log('The size of data successfully sent to endpoint {0.bEndpointAddress:#04x}: {1} B.' + .format(ep_out, num_bytes_written)) + too_little = bool(num_bytes_written < (NUM_PACKETS_UNTIL_ABORT * ep_out.wMaxPacketSize)) + too_much = bool(num_bytes_written >= payload_size) + if too_little or too_much: + raise_unconditionally( + lineno(), 'Invalid size of data successfully sent to endpoint ' + '{0.bEndpointAddress:#04x} before aborting the transfer. ' + 'Value {1} B out of range [{2}, {3}).' + .format(ep_out, num_bytes_written, + NUM_PACKETS_UNTIL_ABORT * ep_out.wMaxPacketSize, payload_size)) + + def device_reset_test(log): """ Test USB implementation against repeated reset diff --git a/TESTS/usb_device/basic/USBEndpointTester.cpp b/TESTS/usb_device/basic/USBEndpointTester.cpp new file mode 100644 index 00000000000..c8798ee7ee2 --- /dev/null +++ b/TESTS/usb_device/basic/USBEndpointTester.cpp @@ -0,0 +1,767 @@ +/* + * Copyright (c) 2018-2018, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBEndpointTester.h" +#include "mbed_shared_queues.h" +#include "EndpointResolver.h" + +#define DEFAULT_CONFIGURATION (1) + +#define NUM_PACKETS_UNTIL_ABORT 2 +#define NUM_PACKETS_AFTER_ABORT 8 + +#define VENDOR_TEST_CTRL_IN 1 +#define VENDOR_TEST_CTRL_OUT 2 +#define VENDOR_TEST_CTRL_IN_SIZES 9 +#define VENDOR_TEST_CTRL_OUT_SIZES 10 + +#define EVENT_READY (1 << 0) + +#define TEST_SIZE_EP_BULK_MAX (64) +#define TEST_SIZE_EP_BULK_MIN (8) +#define TEST_SIZE_EP_BULK_0 (16) +#define TEST_SIZE_EP_BULK_1 TEST_SIZE_EP_BULK_MAX +#define TEST_SIZE_EP_BULK_2 (32) +#define TEST_SIZE_EP_BULK_3 (16) +#define TEST_SIZE_EP_BULK_4 TEST_SIZE_EP_BULK_MIN + +#define TEST_SIZE_EP_INT_MAX (64) +#define TEST_SIZE_EP_INT_MIN (1) +#define TEST_SIZE_EP_INT_0 (16) +#define TEST_SIZE_EP_INT_1 TEST_SIZE_EP_INT_MAX +#define TEST_SIZE_EP_INT_2 (32) +#define TEST_SIZE_EP_INT_3 (16) +#define TEST_SIZE_EP_INT_4 TEST_SIZE_EP_INT_MIN + +#define TEST_SIZE_EP_ISO_MAX (1023) +#define TEST_SIZE_EP_ISO_MIN (1) +#define TEST_SIZE_EP_ISO_0 (0) +#define TEST_SIZE_EP_ISO_1 (0) +#define TEST_SIZE_EP_ISO_2 (0) +#define TEST_SIZE_EP_ISO_3 (0) +#define TEST_SIZE_EP_ISO_4 (0) + +#define EP_BULK_OUT 0 +#define EP_BULK_IN 1 +#define EP_INT_OUT 2 +#define EP_INT_IN 3 +#define EP_ISO_OUT 4 +#define EP_ISO_IN 5 + +USBEndpointTester::ep_config_t USBEndpointTester::_intf_config_max[NUM_ENDPOINTS] = { + { false, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_MAX, static_cast(&USBEndpointTester::_cb_bulk_out) }, + { true, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_MAX, static_cast(&USBEndpointTester::_cb_bulk_in) }, + { false, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_MAX, static_cast(&USBEndpointTester::_cb_int_out) }, + { true, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_MAX, static_cast(&USBEndpointTester::_cb_int_in) }, + { false, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_MAX, static_cast(&USBEndpointTester::_cb_iso_out) }, + { true, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_MAX, static_cast(&USBEndpointTester::_cb_iso_in) }, +}; + +USBEndpointTester::ep_config_t USBEndpointTester::_intf_config0[NUM_ENDPOINTS] = { + { false, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_0, NULL }, + { true, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_0, NULL }, + { false, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_0, NULL }, + { true, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_0, NULL }, + { false, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_0, NULL }, + { true, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_0, NULL }, +}; + +USBEndpointTester::ep_config_t USBEndpointTester::_intf_config1[NUM_ENDPOINTS] = { + { false, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_1, static_cast(&USBEndpointTester::_cb_bulk_out) }, + { true, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_1, static_cast(&USBEndpointTester::_cb_bulk_in) }, + { false, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_1, static_cast(&USBEndpointTester::_cb_int_out) }, + { true, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_1, static_cast(&USBEndpointTester::_cb_int_in) }, + { false, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_1, static_cast(&USBEndpointTester::_cb_iso_out) }, + { true, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_1, static_cast(&USBEndpointTester::_cb_iso_in) }, +}; + +USBEndpointTester::ep_config_t USBEndpointTester::_intf_config2[NUM_ENDPOINTS] = { + { false, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_2, static_cast(&USBEndpointTester::_cb_bulk_out) }, + { true, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_2, static_cast(&USBEndpointTester::_cb_bulk_in) }, + { false, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_2, static_cast(&USBEndpointTester::_cb_int_out) }, + { true, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_2, static_cast(&USBEndpointTester::_cb_int_in) }, + { false, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_2, static_cast(&USBEndpointTester::_cb_iso_out) }, + { true, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_2, static_cast(&USBEndpointTester::_cb_iso_in) }, +}; + +USBEndpointTester::ep_config_t USBEndpointTester::_intf_config3[NUM_ENDPOINTS] = { + { false, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_3, static_cast(&USBEndpointTester::_cb_bulk_out) }, + { true, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_3, static_cast(&USBEndpointTester::_cb_bulk_in) }, + { false, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_3, static_cast(&USBEndpointTester::_cb_int_out) }, + { true, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_3, static_cast(&USBEndpointTester::_cb_int_in) }, + { false, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_3, static_cast(&USBEndpointTester::_cb_iso_out) }, + { true, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_3, static_cast(&USBEndpointTester::_cb_iso_in) }, +}; + +USBEndpointTester::ep_config_t USBEndpointTester::_intf_config4[NUM_ENDPOINTS] = { + { false, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_4, static_cast(&USBEndpointTester::_cb_bulk_out) }, + { true, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_4, static_cast(&USBEndpointTester::_cb_bulk_in) }, + { false, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_4, static_cast(&USBEndpointTester::_cb_int_out) }, + { true, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_4, static_cast(&USBEndpointTester::_cb_int_in) }, + { false, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_4, static_cast(&USBEndpointTester::_cb_iso_out) }, + { true, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_4, static_cast(&USBEndpointTester::_cb_iso_in) }, +}; + +USBEndpointTester::USBEndpointTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, + bool abort_transfer_test) : + USBDevice(phy, vendor_id, product_id, product_release), _abort_transfer_test(abort_transfer_test), _endpoint_configs( + &_intf_config_max) +{ + _cnt_cb_set_conf = 0; + _cnt_cb_set_intf = 0; + _cnt_cb_bulk_out = 0; + _cnt_cb_bulk_in = 0; + _cnt_cb_int_out = 0; + _cnt_cb_int_in = 0; + _cnt_cb_iso_out = 0; + _cnt_cb_iso_in = 0; + + EndpointResolver resolver(endpoint_table()); + resolver.endpoint_ctrl(64); + ep_config_t *epc = NULL; + for (size_t i = 0; i < NUM_ENDPOINTS; i++) { + epc = &((*_endpoint_configs)[i]); + _endpoints[i] = resolver.next_free_endpoint(epc->dir_in, epc->type, epc->max_packet); + _endpoint_buffs[i] = (uint8_t *) calloc(epc->max_packet, sizeof(uint8_t)); + MBED_ASSERT(_endpoint_buffs[i] != NULL); + } + MBED_ASSERT(resolver.valid()); + + queue = mbed_highprio_event_queue(); + configuration_desc(0); + init(); + USBDevice::connect(); + flags.wait_any(EVENT_READY, osWaitForever, false); + +} + +USBEndpointTester::~USBEndpointTester() +{ + for (size_t i = 0; i < NUM_ENDPOINTS; i++) { + if (_endpoint_buffs[i] != NULL) { + free(_endpoint_buffs[i]); + } + } + deinit(); +} + +const char *USBEndpointTester::get_desc_string(const uint8_t *desc) +{ + static char ret_string[128] = { }; + const uint8_t desc_size = desc[0] - 2; + const uint8_t *desc_str = &desc[2]; + uint32_t j = 0; + for (uint32_t i = 0; i < desc_size; i += 2, j++) { + ret_string[j] = desc_str[i]; + } + ret_string[j] = '\0'; + return ret_string; +} + +const char *USBEndpointTester::get_serial_desc_string() +{ + return get_desc_string(string_iserial_desc()); +} + +void USBEndpointTester::callback_state_change(DeviceState new_state) +{ + if (new_state == Configured) { + flags.set(EVENT_READY); + } else { + flags.clear(EVENT_READY); + } +} + +void USBEndpointTester::callback_request(const setup_packet_t *setup) +{ + /* Called in ISR context */ + RequestResult result = PassThrough; + uint8_t *data = NULL; + uint32_t size = 0; + + /* Process vendor-specific requests */ + if (setup->bmRequestType.Type == VENDOR_TYPE) { + switch (setup->bRequest) { + case VENDOR_TEST_CTRL_IN: + result = Send; + data = ctrl_buf; + size = setup->wValue < sizeof(ctrl_buf) ? setup->wValue : sizeof(ctrl_buf); + break; + case VENDOR_TEST_CTRL_OUT: + result = Receive; + data = ctrl_buf; + size = setup->wValue < 8 ? setup->wValue : 8; + break; + case VENDOR_TEST_CTRL_IN_SIZES: + result = Send; + data = ctrl_buf; + size = setup->wLength; + break; + case VENDOR_TEST_CTRL_OUT_SIZES: + result = Receive; + data = ctrl_buf; + size = setup->wValue; + break; + default: + result = PassThrough; + break; + } + } + complete_request(result, data, size); +} + +void USBEndpointTester::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) +{ + if (aborted) { + complete_request_xfer_done(false); + return; + } + + bool result = false; + if (setup->bmRequestType.Type == VENDOR_TYPE) { + switch (setup->bRequest) { + case VENDOR_TEST_CTRL_IN: + result = true; + break; + case VENDOR_TEST_CTRL_OUT: + result = true; + break; + case VENDOR_TEST_CTRL_OUT_SIZES: + result = true; + break; + case VENDOR_TEST_CTRL_IN_SIZES: + result = true; + break; + default: + result = false; + break; + } + } + complete_request_xfer_done(result); +} + +void USBEndpointTester::callback_set_configuration(uint8_t configuration) +{ + _cnt_cb_set_conf++; + if (configuration != DEFAULT_CONFIGURATION) { + complete_set_configuration(false); + return; + } + + // Configure endpoints > 0 + bool status = _setup_interface(0, 0); + complete_set_configuration(status); +} + +bool USBEndpointTester::_setup_interface(uint16_t interface, uint8_t alternate) +{ + if (interface != 0) { + return false; + } + + switch (alternate) { + case 0: + _endpoint_configs = &_intf_config0; + break; + case 1: + _endpoint_configs = &_intf_config1; + break; + case 2: + _endpoint_configs = &_intf_config2; + break; + case 3: + _endpoint_configs = &_intf_config3; + break; + case 4: + _endpoint_configs = &_intf_config4; + break; + default: + return false; + } + + _setup_non_zero_endpoints(); + + if (_abort_transfer_test && alternate >= 1) { + _cnt_cb_bulk_out_abort = _cnt_cb_bulk_out; + _cnt_cb_bulk_in_abort = _cnt_cb_bulk_in; + _cnt_cb_int_out_abort = _cnt_cb_int_out; + _cnt_cb_int_in_abort = _cnt_cb_int_in; + start_ep_in_abort_test(); + } + return true; +} + +void USBEndpointTester::_setup_non_zero_endpoints() +{ + ep_config_t *epc = NULL; + for (size_t i = 0; i < NUM_ENDPOINTS; i++) { + epc = &((*_endpoint_configs)[i]); + endpoint_add(_endpoints[i], epc->max_packet, epc->type, epc->callback); + if (epc->callback == NULL) { + continue; + } + if (epc->dir_in == true) { +// write_start(_endpoints[i], _endpoint_buffs[i], epc->max_packet); + } else { + read_start(_endpoints[i], _endpoint_buffs[i], epc->max_packet); + } + } +} + +void USBEndpointTester::callback_set_interface(uint16_t interface, uint8_t alternate) +{ + _cnt_cb_set_intf++; + if (interface != 0 || alternate > 4) { + complete_set_interface(false); + return; + } + for (size_t i = 0; i < NUM_ENDPOINTS; i++) { + endpoint_abort(_endpoints[i]); + endpoint_remove(_endpoints[i]); + } + bool status = _setup_interface(interface, alternate); + complete_set_interface(status); +} + +#define CONFIG1_DESC_SIZE (CONFIGURATION_DESCRIPTOR_LENGTH \ + + 5 * (INTERFACE_DESCRIPTOR_LENGTH + NUM_ENDPOINTS * ENDPOINT_DESCRIPTOR_LENGTH) ) + +const uint8_t *USBEndpointTester::configuration_desc(uint8_t index) +{ + static const uint8_t config_1_descriptor[] = { + // configuration descriptor + CONFIGURATION_DESCRIPTOR_LENGTH, // bLength + CONFIGURATION_DESCRIPTOR, // bDescriptorType + LSB(CONFIG1_DESC_SIZE), // wTotalLength (LSB) + MSB(CONFIG1_DESC_SIZE), // wTotalLength (MSB) + 1, // bNumInterfaces + 1, // bConfigurationValue + 0, // iConfiguration + 0x80, // bmAttributes + 50, // bMaxPower + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0, // bInterfaceNumber + 0, // bAlternateSetting + NUM_ENDPOINTS, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_OUT], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config0[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config0[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_IN], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config0[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config0[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_OUT], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config0[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config0[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_IN], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config0[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config0[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_OUT], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config0[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config0[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_IN], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config0[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config0[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0, // bInterfaceNumber + 1, // bAlternateSetting + NUM_ENDPOINTS, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_OUT], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config1[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config1[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_IN], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config1[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config1[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_OUT], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config1[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config1[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_IN], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config1[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config1[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_OUT], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config1[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config1[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_IN], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config1[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config1[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0, // bInterfaceNumber + 2, // bAlternateSetting + NUM_ENDPOINTS, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_OUT], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config2[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config2[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_IN], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config2[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config2[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_OUT], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config2[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config2[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_IN], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config2[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config2[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_OUT], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config2[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config2[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_IN], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config2[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config2[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0, // bInterfaceNumber + 3, // bAlternateSetting + NUM_ENDPOINTS, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_OUT], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config3[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config3[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_IN], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config3[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config3[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_OUT], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config3[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config3[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_IN], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config3[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config3[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_OUT], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config3[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config3[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_IN], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config3[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config3[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0, // bInterfaceNumber + 4, // bAlternateSetting + NUM_ENDPOINTS, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_OUT], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config4[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config4[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_IN], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config4[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config4[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_OUT], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config4[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config4[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_IN], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config4[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config4[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_OUT], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config4[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config4[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_IN], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config4[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config4[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + }; + if (index == 0) { + return config_1_descriptor; + } else { + return NULL; + } +} + +void USBEndpointTester::_cb_bulk_out(usb_ep_t endpoint) +{ + _cnt_cb_bulk_out++; + uint32_t rx_size = read_finish(endpoint); + + if (_abort_transfer_test == false) { + // Send data back to host using the IN endpoint. + memset(_endpoint_buffs[EP_BULK_IN], 0, (*_endpoint_configs)[EP_BULK_IN].max_packet); + memcpy(_endpoint_buffs[EP_BULK_IN], _endpoint_buffs[EP_BULK_OUT], rx_size); + write_start(_endpoints[EP_BULK_IN], _endpoint_buffs[EP_BULK_IN], rx_size); + } else { + // Abort the transfer if enough data was received. + uint32_t num_packets_received = _cnt_cb_bulk_out - _cnt_cb_bulk_out_abort; + read_start(_endpoints[EP_BULK_OUT], _endpoint_buffs[EP_BULK_OUT], (*_endpoint_configs)[EP_BULK_OUT].max_packet); + if (num_packets_received >= NUM_PACKETS_UNTIL_ABORT) { + endpoint_abort(endpoint); + } + } +} + +void USBEndpointTester::_cb_bulk_in(usb_ep_t endpoint) +{ + _cnt_cb_bulk_in++; + write_finish(endpoint); + + if (_abort_transfer_test == false) { + // Receive more data from the host using the OUT endpoint. + read_start(_endpoints[EP_BULK_OUT], _endpoint_buffs[EP_BULK_OUT], (*_endpoint_configs)[EP_BULK_OUT].max_packet); + } else { + uint32_t num_packets_sent = _cnt_cb_bulk_in - _cnt_cb_bulk_in_abort; + if (num_packets_sent >= NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) { + return; + } + // Abort the transfer if enough data was sent. + memset(_endpoint_buffs[EP_BULK_IN], num_packets_sent, (*_endpoint_configs)[EP_BULK_IN].max_packet); + write_start(_endpoints[EP_BULK_IN], _endpoint_buffs[EP_BULK_IN], (*_endpoint_configs)[EP_BULK_IN].max_packet); + if (num_packets_sent >= NUM_PACKETS_UNTIL_ABORT) { + endpoint_abort(endpoint); + } + } +} + +void USBEndpointTester::_cb_int_out(usb_ep_t endpoint) +{ + _cnt_cb_int_out++; + uint32_t rx_size = read_finish(endpoint); + if (_abort_transfer_test == false) { + // Send data back to host using the IN endpoint. + memset(_endpoint_buffs[EP_INT_IN], 0, (*_endpoint_configs)[EP_INT_IN].max_packet); + memcpy(_endpoint_buffs[EP_INT_IN], _endpoint_buffs[EP_INT_OUT], rx_size); + write_start(_endpoints[EP_INT_IN], _endpoint_buffs[EP_INT_IN], rx_size); + } else { + // Abort the transfer if enough data was received. + uint32_t num_packets_received = _cnt_cb_int_out - _cnt_cb_int_out_abort; + read_start(_endpoints[EP_INT_OUT], _endpoint_buffs[EP_INT_OUT], (*_endpoint_configs)[EP_INT_OUT].max_packet); + if (num_packets_received >= NUM_PACKETS_UNTIL_ABORT) { + endpoint_abort(endpoint); + } + } +} + +void USBEndpointTester::_cb_int_in(usb_ep_t endpoint) +{ + _cnt_cb_int_in++; + write_finish(endpoint); + if (_abort_transfer_test == false) { + // Receive more data from the host using the OUT endpoint. + read_start(_endpoints[EP_INT_OUT], _endpoint_buffs[EP_INT_OUT], (*_endpoint_configs)[EP_INT_OUT].max_packet); + } else { + uint32_t num_packets_sent = _cnt_cb_int_in - _cnt_cb_int_in_abort; + if (num_packets_sent >= NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) { + return; + } + // Abort the transfer if enough data was sent. + memset(_endpoint_buffs[EP_INT_IN], num_packets_sent, (*_endpoint_configs)[EP_INT_IN].max_packet); + write_start(_endpoints[EP_INT_IN], _endpoint_buffs[EP_INT_IN], (*_endpoint_configs)[EP_INT_IN].max_packet); + if (num_packets_sent >= NUM_PACKETS_UNTIL_ABORT) { + endpoint_abort(endpoint); + } + } +} + +void USBEndpointTester::_cb_iso_out(usb_ep_t endpoint) +{ + _cnt_cb_iso_out++; + uint32_t rx_size = read_finish(endpoint); + // Send data back to host using the IN endpoint. + memset(_endpoint_buffs[EP_ISO_IN], 0, (*_endpoint_configs)[EP_ISO_IN].max_packet); + memcpy(_endpoint_buffs[EP_ISO_IN], _endpoint_buffs[EP_ISO_OUT], rx_size); + write_start(_endpoints[EP_ISO_IN], _endpoint_buffs[EP_ISO_IN], rx_size); +} + +void USBEndpointTester::_cb_iso_in(usb_ep_t endpoint) +{ + _cnt_cb_iso_in++; + write_finish(endpoint); + // Receive more data from the host using the OUT endpoint. + read_start(_endpoints[EP_ISO_OUT], _endpoint_buffs[EP_ISO_OUT], (*_endpoint_configs)[EP_ISO_OUT].max_packet); +} + +void USBEndpointTester::start_ep_in_abort_test() +{ + memset(_endpoint_buffs[EP_BULK_IN], 0, (*_endpoint_configs)[EP_BULK_IN].max_packet); + memset(_endpoint_buffs[EP_INT_IN], 0, (*_endpoint_configs)[EP_INT_IN].max_packet); + + write_start(_endpoints[EP_BULK_IN], _endpoint_buffs[EP_BULK_IN], (*_endpoint_configs)[EP_BULK_IN].max_packet); + write_start(_endpoints[EP_INT_IN], _endpoint_buffs[EP_INT_IN], (*_endpoint_configs)[EP_INT_IN].max_packet); +} diff --git a/TESTS/usb_device/basic/USBEndpointTester.h b/TESTS/usb_device/basic/USBEndpointTester.h new file mode 100644 index 00000000000..a921526b49f --- /dev/null +++ b/TESTS/usb_device/basic/USBEndpointTester.h @@ -0,0 +1,108 @@ +/* + * Copyright (c) 2018-2018, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USB_ENDPOINT_TESTER_H +#define USB_ENDPOINT_TESTER_H + +/* These headers are included for child class. */ +#include "USBDescriptor.h" +#include "USBDevice_Types.h" +#include "EventQueue.h" +#include "EventFlags.h" + +#include "USBDevice.h" + +#define NUM_ENDPOINTS 6 // Not including CTRL OUT/IN + +class USBEndpointTester: public USBDevice { + +public: + USBEndpointTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, + bool abort_transfer_test); + ~USBEndpointTester(); + const char *get_serial_desc_string(); + void start_ep_in_abort_test(); + + uint32_t get_cnt_cb_set_conf() const { return _cnt_cb_set_conf; } + uint32_t get_cnt_cb_set_intf() const { return _cnt_cb_set_intf; } + uint32_t get_cnt_cb_bulk_out() const { return _cnt_cb_bulk_out; } + uint32_t get_cnt_cb_bulk_in() const { return _cnt_cb_bulk_in; } + uint32_t get_cnt_cb_int_out() const { return _cnt_cb_int_out; } + uint32_t get_cnt_cb_int_in() const { return _cnt_cb_int_in; } + uint32_t get_cnt_cb_iso_out() const { return _cnt_cb_iso_out; } + uint32_t get_cnt_cb_iso_in() const { return _cnt_cb_iso_in; } + + struct ep_config_t { + bool dir_in; + usb_ep_type_t type; + uint32_t max_packet; + ep_cb_t callback; + }; + +protected: + EventQueue *queue; + rtos::EventFlags flags; + uint8_t ctrl_buf[2048]; + + bool _abort_transfer_test; + usb_ep_t _endpoints[NUM_ENDPOINTS]; + uint8_t *_endpoint_buffs[NUM_ENDPOINTS]; + ep_config_t (*_endpoint_configs)[NUM_ENDPOINTS]; + + static ep_config_t _intf_config_max[NUM_ENDPOINTS]; + static ep_config_t _intf_config0[NUM_ENDPOINTS]; + static ep_config_t _intf_config1[NUM_ENDPOINTS]; + static ep_config_t _intf_config2[NUM_ENDPOINTS]; + static ep_config_t _intf_config3[NUM_ENDPOINTS]; + static ep_config_t _intf_config4[NUM_ENDPOINTS]; + + volatile uint32_t _cnt_cb_set_conf; + volatile uint32_t _cnt_cb_set_intf; + volatile uint32_t _cnt_cb_bulk_out; + volatile uint32_t _cnt_cb_bulk_in; + volatile uint32_t _cnt_cb_int_out; + volatile uint32_t _cnt_cb_int_in; + volatile uint32_t _cnt_cb_iso_out; + volatile uint32_t _cnt_cb_iso_in; + + volatile uint32_t _cnt_cb_bulk_out_abort; + volatile uint32_t _cnt_cb_bulk_in_abort; + volatile uint32_t _cnt_cb_int_out_abort; + volatile uint32_t _cnt_cb_int_in_abort; + + virtual const uint8_t *configuration_desc(uint8_t index); + virtual void callback_state_change(DeviceState new_state); + virtual void callback_request(const setup_packet_t *setup); + virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); + virtual void callback_set_configuration(uint8_t configuration); + virtual void callback_set_interface(uint16_t interface, uint8_t alternate); + + void _setup_non_zero_endpoints(); + bool _setup_interface(uint16_t interface, uint8_t alternate); + + virtual void _cb_bulk_out(usb_ep_t endpoint); + virtual void _cb_bulk_in(usb_ep_t endpoint); + virtual void _cb_int_out(usb_ep_t endpoint); + virtual void _cb_int_in(usb_ep_t endpoint); + virtual void _cb_iso_out(usb_ep_t endpoint); + virtual void _cb_iso_in(usb_ep_t endpoint); + +private: + const char *get_desc_string(const uint8_t *desc); +}; + +#endif diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index deb45ba6431..ae7a038bebc 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -22,6 +22,7 @@ #include "utest/utest.h" #include "USBTester.h" +#include "USBEndpointTester.h" #include "usb_phy_api.h" // TODO @@ -44,6 +45,9 @@ using namespace utest::v1; +// Print callback counters for endpoint tests +#define EP_DBG 0 + static USBPhy *get_phy() { return get_usb_phy(); @@ -196,6 +200,154 @@ void control_stress_test() } } +void ep_test_data_correctness() +{ + uint16_t vendor_id = 0x0d28; + // Use a product ID different than that used in other tests, + // to help Windows hosts use the correct configuration descriptor. + uint16_t product_id = 0x0206; + uint16_t product_release = 0x0001; + char _key[11] = { }; + char _value[128] = { }; + + { + USBEndpointTester serial(get_phy(), vendor_id, product_id, product_release, false); + greentea_send_kv("ep_test_data_correctness", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); +#if EP_DBG + wait_ms(100); + printf("cnt_cb_set_conf = %lu\r\n", serial.get_cnt_cb_set_conf()); + printf("cnt_cb_set_intf = %lu\r\n", serial.get_cnt_cb_set_intf()); + printf("cnt_cb_bulk_out = %lu\r\n", serial.get_cnt_cb_bulk_out()); + printf("cnt_cb_bulk_in = %lu\r\n", serial.get_cnt_cb_bulk_in()); + printf("cnt_cb_int_out = %lu\r\n", serial.get_cnt_cb_int_out()); + printf("cnt_cb_int_in = %lu\r\n", serial.get_cnt_cb_int_in()); + printf("cnt_cb_iso_out = %lu\r\n", serial.get_cnt_cb_iso_out()); + printf("cnt_cb_iso_in = %lu\r\n", serial.get_cnt_cb_iso_in()); +#endif + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + +void ep_test_halt() +{ + uint16_t vendor_id = 0x0d28; + // Use a product ID different than that used in other tests, + // to help Windows hosts use the correct configuration descriptor. + uint16_t product_id = 0x0206; + uint16_t product_release = 0x0001; + char _key[11] = { }; + char _value[128] = { }; + + { + USBEndpointTester serial(get_phy(), vendor_id, product_id, product_release, false); + greentea_send_kv("ep_test_halt", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); +#if EP_DBG + wait_ms(100); + printf("cnt_cb_set_conf = %lu\r\n", serial.get_cnt_cb_set_conf()); + printf("cnt_cb_set_intf = %lu\r\n", serial.get_cnt_cb_set_intf()); + printf("cnt_cb_bulk_out = %lu\r\n", serial.get_cnt_cb_bulk_out()); + printf("cnt_cb_bulk_in = %lu\r\n", serial.get_cnt_cb_bulk_in()); + printf("cnt_cb_int_out = %lu\r\n", serial.get_cnt_cb_int_out()); + printf("cnt_cb_int_in = %lu\r\n", serial.get_cnt_cb_int_in()); + printf("cnt_cb_iso_out = %lu\r\n", serial.get_cnt_cb_iso_out()); + printf("cnt_cb_iso_in = %lu\r\n", serial.get_cnt_cb_iso_in()); +#endif + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + +void ep_test_parallel_transfers() +{ + uint16_t vendor_id = 0x0d28; + // Use a product ID different than that used in other tests, + // to help Windows hosts use the correct configuration descriptor. + uint16_t product_id = 0x0206; + uint16_t product_release = 0x0001; + char _key[11] = { }; + char _value[128] = { }; + + { + USBEndpointTester serial(get_phy(), vendor_id, product_id, product_release, false); + greentea_send_kv("ep_test_parallel_transfers", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); +#if EP_DBG + wait_ms(100); + printf("cnt_cb_set_conf = %lu\r\n", serial.get_cnt_cb_set_conf()); + printf("cnt_cb_set_intf = %lu\r\n", serial.get_cnt_cb_set_intf()); + printf("cnt_cb_bulk_out = %lu\r\n", serial.get_cnt_cb_bulk_out()); + printf("cnt_cb_bulk_in = %lu\r\n", serial.get_cnt_cb_bulk_in()); + printf("cnt_cb_int_out = %lu\r\n", serial.get_cnt_cb_int_out()); + printf("cnt_cb_int_in = %lu\r\n", serial.get_cnt_cb_int_in()); + printf("cnt_cb_iso_out = %lu\r\n", serial.get_cnt_cb_iso_out()); + printf("cnt_cb_iso_in = %lu\r\n", serial.get_cnt_cb_iso_in()); +#endif + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + +void ep_test_parallel_transfers_ctrl() +{ + uint16_t vendor_id = 0x0d28; + // Use a product ID different than that used in other tests, + // to help Windows hosts use the correct configuration descriptor. + uint16_t product_id = 0x0206; + uint16_t product_release = 0x0001; + char _key[11] = { }; + char _value[128] = { }; + + { + USBEndpointTester serial(get_phy(), vendor_id, product_id, product_release, false); + greentea_send_kv("ep_test_parallel_transfers_ctrl", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); +#if EP_DBG + wait_ms(100); + printf("cnt_cb_set_conf = %lu\r\n", serial.get_cnt_cb_set_conf()); + printf("cnt_cb_set_intf = %lu\r\n", serial.get_cnt_cb_set_intf()); + printf("cnt_cb_bulk_out = %lu\r\n", serial.get_cnt_cb_bulk_out()); + printf("cnt_cb_bulk_in = %lu\r\n", serial.get_cnt_cb_bulk_in()); + printf("cnt_cb_int_out = %lu\r\n", serial.get_cnt_cb_int_out()); + printf("cnt_cb_int_in = %lu\r\n", serial.get_cnt_cb_int_in()); + printf("cnt_cb_iso_out = %lu\r\n", serial.get_cnt_cb_iso_out()); + printf("cnt_cb_iso_in = %lu\r\n", serial.get_cnt_cb_iso_in()); +#endif + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + +void ep_test_abort() +{ + uint16_t vendor_id = 0x0d28; + // Use a product ID different than that used in other tests, + // to help Windows hosts use the correct configuration descriptor. + uint16_t product_id = 0x0206; + uint16_t product_release = 0x0001; + char _key[11] = { }; + char _value[128] = { }; + + { + USBEndpointTester serial(get_phy(), vendor_id, product_id, product_release, true); + greentea_send_kv("ep_test_abort", serial.get_serial_desc_string()); + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); +#if EP_DBG + wait_ms(100); + printf("cnt_cb_set_conf = %lu\r\n", serial.get_cnt_cb_set_conf()); + printf("cnt_cb_set_intf = %lu\r\n", serial.get_cnt_cb_set_intf()); + printf("cnt_cb_bulk_out = %lu\r\n", serial.get_cnt_cb_bulk_out()); + printf("cnt_cb_bulk_in = %lu\r\n", serial.get_cnt_cb_bulk_in()); + printf("cnt_cb_int_out = %lu\r\n", serial.get_cnt_cb_int_out()); + printf("cnt_cb_int_in = %lu\r\n", serial.get_cnt_cb_int_in()); + printf("cnt_cb_iso_out = %lu\r\n", serial.get_cnt_cb_iso_out()); + printf("cnt_cb_iso_in = %lu\r\n", serial.get_cnt_cb_iso_in()); +#endif + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} /** Test USB implementation against repeated reset @@ -409,12 +561,17 @@ Case cases[] = { #if SUSPEND_RESUME_TEST_SUPPORTED Case("usb device suspend/resume test", device_suspend_resume_test), #endif - Case("usb repeated construction destruction test", repeated_construction_destruction_test) + Case("usb repeated construction destruction test", repeated_construction_destruction_test), + Case("endpoint test data correctness", ep_test_data_correctness), + Case("endpoint test halt", ep_test_halt), + Case("endpoint test parallel transfers", ep_test_parallel_transfers), + Case("endpoint test parallel transfers ctrl", ep_test_parallel_transfers_ctrl), + Case("endpoint test abort", ep_test_abort) }; utest::v1::status_t greentea_test_setup(const size_t number_of_cases) { - GREENTEA_SETUP(120, "pyusb_basic"); + GREENTEA_SETUP(180, "pyusb_basic"); return greentea_test_setup_handler(number_of_cases); } From cbf9c9ea852bedbb449649e5e714bce1112e489c Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Mon, 14 May 2018 17:22:31 +0200 Subject: [PATCH 107/488] Tests: USB: Generic: Update documentation --- TESTS/host_tests/pyusb_basic.py | 62 ++++++++++++++++++++++++++++++++- TESTS/usb_device/basic/main.cpp | 36 +++++++++++++++++++ 2 files changed, 97 insertions(+), 1 deletion(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 4aba71bcb4d..0c374f3a254 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -916,6 +916,11 @@ def control_stress_test(dev, log): def find_ep_pair(intf, endpoint_type): + """Find an OUT and IN endpoint pair. + + Raise a RuntimeError if any endpoint could not be found + or wMaxPacketSize is not equal for both endpoints. + """ ep_out = usb.util.find_descriptor( intf, custom_match=lambda e: usb.util.endpoint_type(e.bmAttributes) == endpoint_type and @@ -934,6 +939,12 @@ def find_ep_pair(intf, endpoint_type): def loopback_ep_test(ep_out, ep_in, payload_size): + """Send and receive random data using OUT/IN endpoint pair. + + Verify that data received from IN endpoint is equal to + data sent to OUT endpoint. + Raise a RuntimeError if data does not match. + """ payload_out = array.array('B', (random.randint(0x00, 0xff) for _ in range(payload_size))) ep_out.write(payload_out) payload_in = ep_in.read(ep_in.wMaxPacketSize) @@ -941,6 +952,11 @@ def loopback_ep_test(ep_out, ep_in, payload_size): def random_size_loopback_ep_test(ep_out, ep_in, failure, error, seconds, log, min_payload_size=1): + """Repeat data transfer test for OUT/IN endpoint pair for a given time. + + Set a failure Event if OUT/IN data verification fails. + Set an error Event if unexpected USB error occurs. + """ end_ts = time.time() + seconds while time.time() < end_ts and not failure.is_set() and not error.is_set(): payload_size = random.randint(min_payload_size, ep_out.wMaxPacketSize) @@ -958,6 +974,12 @@ def random_size_loopback_ep_test(ep_out, ep_in, failure, error, seconds, log, mi def halt_ep_test(dev, ep_out, ep_in, ep_to_halt, log): + """OUT/IN endpoint halt test. + + Verify that halting an endpoint at a random point of OUT or IN transfer + raises a USBError. + Raise a RuntimeError if halt fails or any unexpected error occurs. + """ MIN_HALT_DELAY = 0.01 MAX_HALT_DELAY = 0.1 delay = random.uniform(MIN_HALT_DELAY, MAX_HALT_DELAY) @@ -969,6 +991,7 @@ def halt_ep_test(dev, ep_out, ep_in, ep_to_halt, log): ctrl_error = Event() def timer_handler(): + """Halt an endpoint using a USB control request.""" try: dev.ctrl_transfer(**ctrl_kwargs) except Exception as err: @@ -995,10 +1018,19 @@ def timer_handler(): USB_ERROR_FMT = str('Got {0!r} while testing endpoints ' '{1.bEndpointAddress:#04x}({1.wMaxPacketSize:02}) and ' - '{2.bEndpointAddress:#04x}({2.wMaxPacketSize:02}) with a random payload of {3} B.') + '{2.bEndpointAddress:#04x}({2.wMaxPacketSize:02}) with ' + 'a random payload of {3} B.') def ep_test_data_correctness(dev, log, verbose=False): + """Test data correctness for every OUT/IN endpoint pair. + + Given a USB device with multiple OUT/IN endpoint pairs + When the host sends random payloads up to wMaxPacketSize in size + to an OUT endpoint of the device, + and then the device sends data back to host using an IN endpoint + Then data sent and received by host is equal for every endpoint pair + """ cfg = dev.get_active_configuration() for intf in cfg: log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') @@ -1047,6 +1079,13 @@ def ep_test_data_correctness(dev, log, verbose=False): def ep_test_halt(dev, log, verbose=False): + """Test endpoint halt for every OUT/IN endpoint pair. + + Given a USB device with multiple OUT/IN endpoint pairs + When the host issues an endpoint halt control request at a random point + of OUT or IN transfer + Then the endpoint is stalled and all further transfers fail + """ cfg = dev.get_active_configuration() for intf in cfg: log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') @@ -1092,6 +1131,13 @@ def ep_test_halt(dev, log, verbose=False): def ep_test_parallel_transfers(dev, log, verbose=False): + """Test simultaneous data transfers for multiple OUT/IN endpoint pairs. + + Given a USB device with multiple OUT/IN endpoint pairs + When multiple OUT and IN endpoints are used to transfer random test data + Then all transfers succeed + and data received equals data sent for every endpoint pair + """ cfg = dev.get_active_configuration() for intf in cfg: log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') @@ -1145,6 +1191,14 @@ def ep_test_parallel_transfers(dev, log, verbose=False): def ep_test_parallel_transfers_ctrl(dev, log, verbose=False): + """Test simultaneous data transfers in parallel with control transfers. + + Given a USB device with multiple OUT/IN endpoint pairs + When multiple OUT and IN endpoints are used to transfer random data + and control requests are processed in parallel + Then all transfers succeed + and for every endpoint pair, data received by host equals data sent by host + """ cfg = dev.get_active_configuration() for intf in cfg: log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') @@ -1201,6 +1255,12 @@ def ep_test_parallel_transfers_ctrl(dev, log, verbose=False): def ep_test_abort(dev, log, verbose=False): + """Test aborting data transfer for every OUT/IN endpoint pair. + + Given a USB device with multiple OUT/IN endpoint pairs + When a device aborts an in progress data transfer + Then no more data is transmitted + """ NUM_PACKETS_UNTIL_ABORT = 2 NUM_PACKETS_AFTER_ABORT = 8 cfg = dev.get_active_configuration() diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index ae7a038bebc..7a030473c54 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -200,6 +200,14 @@ void control_stress_test() } } +/** Test data correctness for every OUT/IN endpoint pair + * + * Given a USB device with multiple OUT/IN endpoint pairs + * When the host sends random payloads up to wMaxPacketSize in size + * to an OUT endpoint of the device, + * and then the device sends data back to host using an IN endpoint + * Then data sent and received by host is equal for every endpoint pair + */ void ep_test_data_correctness() { uint16_t vendor_id = 0x0d28; @@ -230,6 +238,13 @@ void ep_test_data_correctness() } } +/** Test endpoint halt for every OUT/IN endpoint pair + * + * Given a USB device with multiple OUT/IN endpoint pairs + * When the host issues an endpoint halt control request at a random point + * of OUT or IN transfer + * Then the endpoint is stalled and all further transfers fail + */ void ep_test_halt() { uint16_t vendor_id = 0x0d28; @@ -260,6 +275,13 @@ void ep_test_halt() } } +/** Test simultaneous data transfers for multiple OUT/IN endpoint pairs + * + * Given a USB device with multiple OUT/IN endpoint pairs + * When multiple OUT and IN endpoints are used to transfer random data in parallel + * Then all transfers succeed + * and for every endpoint pair, data received by host equals data sent by host + */ void ep_test_parallel_transfers() { uint16_t vendor_id = 0x0d28; @@ -290,6 +312,14 @@ void ep_test_parallel_transfers() } } +/** Test simultaneous data transfers in parallel with control transfers + * + * Given a USB device with multiple OUT/IN endpoint pairs + * When multiple OUT and IN endpoints are used to transfer random data + * and control requests are processed in parallel + * Then all transfers succeed + * and for every endpoint pair, data received by host equals data sent by host + */ void ep_test_parallel_transfers_ctrl() { uint16_t vendor_id = 0x0d28; @@ -320,6 +350,12 @@ void ep_test_parallel_transfers_ctrl() } } +/** Test aborting data transfer for every OUT/IN endpoint pair + * + * Given a USB device with multiple OUT/IN endpoint pairs + * When a device aborts an in progress data transfer + * Then no more data is transmitted + */ void ep_test_abort() { uint16_t vendor_id = 0x0d28; From c57073edc6d2c43ff57f63668eb2b29bea94dd78 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 17 May 2018 11:15:46 +0200 Subject: [PATCH 108/488] Tests: USB: Update endpoint tests Fix the host script issues present on Windows machines. Add 0 B payload size to bulk endpoints test. Update halt and abort tests according to PR comments. Add an explicit request to start reading on OUT endpoints. --- TESTS/host_tests/pyusb_basic.py | 91 ++++++++++++++------ TESTS/usb_device/basic/USBEndpointTester.cpp | 61 +++++++++---- TESTS/usb_device/basic/USBEndpointTester.h | 9 +- 3 files changed, 112 insertions(+), 49 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 0c374f3a254..60dcb3ec3e2 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -55,6 +55,7 @@ def get_interface(dev, interface, alternate=0): VENDOR_TEST_CTRL_OUT_STATUS_DELAY = 8 VENDOR_TEST_CTRL_IN_SIZES = 9 VENDOR_TEST_CTRL_OUT_SIZES = 10 +VENDOR_TEST_READ_START = 11 VENDOR_TEST_UNSUPPORTED_REQUEST = 32 REQUEST_GET_STATUS = 0 @@ -982,38 +983,63 @@ def halt_ep_test(dev, ep_out, ep_in, ep_to_halt, log): """ MIN_HALT_DELAY = 0.01 MAX_HALT_DELAY = 0.1 - delay = random.uniform(MIN_HALT_DELAY, MAX_HALT_DELAY) - ctrl_kwargs = { - 'bmRequestType': build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, CTRL_RECIPIENT_ENDPOINT), - 'bRequest': REQUEST_SET_FEATURE, - 'wValue': FEATURE_ENDPOINT_HALT, - 'wIndex': ep_to_halt.bEndpointAddress} + POST_HALT_DELAY = 0.1 ctrl_error = Event() + for ep in (ep_out, ep_in): + try: + if (usb.control.get_status(dev, ep) == 1): + raise_unconditionally(lineno(), 'Endpoints must NOT be halted at the start of this test') + except usb.core.USBError as err: + raise_unconditionally(lineno(), 'Unable to get endpoint status ({!r}).'.format(err)) + def timer_handler(): """Halt an endpoint using a USB control request.""" try: - dev.ctrl_transfer(**ctrl_kwargs) + usb.control.set_feature(dev, FEATURE_ENDPOINT_HALT, ep_to_halt) + if (usb.control.get_status(dev, ep_to_halt) != 1): + raise RuntimeError('Invalid endpoint status after halt operation') except Exception as err: - log('Endpoint {:#04x} halt failed ({}).'.format(ctrl_kwargs['wIndex'], err)) ctrl_error.set() + log('Endpoint {:#04x} halt failed ({}).'.format(ep_to_halt.bEndpointAddress, err)) + # Whether the halt operation was successful or not, + # wait a bit so the main thread has a chance to run into a USBError + # or report the failure of halt operation. + time.sleep(POST_HALT_DELAY) + delay = random.uniform(MIN_HALT_DELAY, MAX_HALT_DELAY) delayed_halt = Timer(delay, timer_handler) delayed_halt.start() - end_ts = time.time() + 1.5 * delay - try: - while time.time() < end_ts and not ctrl_error.is_set(): - loopback_ep_test(ep_out, ep_in, ep_out.wMaxPacketSize) - except usb.core.USBError as err: - if err.errno not in (32, 110): - raise_unconditionally(lineno(), 'Unexpected error ({!r}).'.format(err)) + # Keep transferring data to and from the device until one of the endpoints + # is halted. + while delayed_halt.is_alive(): if ctrl_error.is_set(): raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x} failed' .format(ep_to_halt)) - else: - raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x}' - ' during transmission did not raise USBError.' - .format(ep_to_halt)) + try: + loopback_ep_test(ep_out, ep_in, ep_out.wMaxPacketSize) + except usb.core.USBError as err: + try: + ep_status = usb.control.get_status(dev, ep_to_halt) + except usb.core.USBError as err: + raise_unconditionally(lineno(), 'Unable to get endpoint status ({!r}).'.format(err)) + if ep_status == 1: + # OK, got USBError because of endpoint halt + return + else: + raise_unconditionally(lineno(), 'Unexpected error ({!r}).'.format(err)) + raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x}' + ' during transmission did not raise USBError.' + .format(ep_to_halt)) + + +def request_endpoint_read_start(dev, ep): + ctrl_kwargs = { + 'bmRequestType': build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, CTRL_RECIPIENT_ENDPOINT), + 'bRequest': VENDOR_TEST_READ_START, + 'wValue': 0, + 'wIndex': ep.bEndpointAddress} + dev.ctrl_transfer(**ctrl_kwargs) USB_ERROR_FMT = str('Got {0!r} while testing endpoints ' @@ -1054,7 +1080,7 @@ def ep_test_data_correctness(dev, log, verbose=False): if verbose: log('Testing OUT/IN data correctness for bulk endpoint pair.') - for payload_size in range(1, bulk_out.wMaxPacketSize + 1): + for payload_size in range(bulk_out.wMaxPacketSize + 1): try: loopback_ep_test(bulk_out, bulk_in, payload_size) except usb.USBError as err: @@ -1113,10 +1139,9 @@ def ep_test_halt(dev, log, verbose=False): while time.time() < end_ts: halt_ep_test(dev, bulk_out, bulk_in, bulk_out, log) bulk_out.clear_halt() - intf.set_altsetting() # Force the device to start reading data from all OUT endpoints again. + request_endpoint_read_start(dev, bulk_out) halt_ep_test(dev, bulk_out, bulk_in, bulk_in, log) bulk_in.clear_halt() - intf.set_altsetting() # Force the device to start reading data from all OUT endpoints again. if verbose: log('Testing endpoint halt at a random point of interrupt transmission.') @@ -1124,10 +1149,9 @@ def ep_test_halt(dev, log, verbose=False): while time.time() < end_ts: halt_ep_test(dev, interrupt_out, interrupt_in, interrupt_out, log) interrupt_out.clear_halt() - intf.set_altsetting() # Force the device to start reading data from all OUT endpoints again. + request_endpoint_read_start(dev, interrupt_out) halt_ep_test(dev, interrupt_out, interrupt_in, interrupt_in, log) - interrupt_out.clear_halt() - intf.set_altsetting() # Force the device to start reading data from all OUT endpoints again. + interrupt_in.clear_halt() def ep_test_parallel_transfers(dev, log, verbose=False): @@ -1285,7 +1309,13 @@ def ep_test_abort(dev, log, verbose=False): log('Testing aborting an in progress transfer for IN endpoints.') for ep_in in (bulk_in, interrupt_in): payload_size = (NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) * ep_in.wMaxPacketSize - payload_in = ep_in.read(payload_size) + payload_in = array.array('B') + while len(payload_in) < payload_size: + try: + packet = ep_in.read(ep_in.wMaxPacketSize) + payload_in.extend(packet) + except usb.core.USBError as err: + break if verbose: log('The size of data successfully received from endpoint {0.bEndpointAddress:#04x}: {1} B.' .format(ep_in, len(payload_in))) @@ -1303,8 +1333,13 @@ def ep_test_abort(dev, log, verbose=False): log('Testing aborting an in progress transfer for OUT endpoints.') for ep_out in (bulk_out, interrupt_out): payload_size = (NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) * ep_out.wMaxPacketSize - payload_out = array.array('B', (0x01 for _ in range(payload_size))) - num_bytes_written = ep_out.write(payload_out) + payload_out = array.array('B', (0x01 for _ in range(ep_out.wMaxPacketSize))) + num_bytes_written = 0 + while num_bytes_written < payload_size: + try: + num_bytes_written += ep_out.write(payload_out) + except usb.core.USBError: + break if verbose: log('The size of data successfully sent to endpoint {0.bEndpointAddress:#04x}: {1} B.' .format(ep_out, num_bytes_written)) diff --git a/TESTS/usb_device/basic/USBEndpointTester.cpp b/TESTS/usb_device/basic/USBEndpointTester.cpp index c8798ee7ee2..937681b279a 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.cpp +++ b/TESTS/usb_device/basic/USBEndpointTester.cpp @@ -29,6 +29,7 @@ #define VENDOR_TEST_CTRL_OUT 2 #define VENDOR_TEST_CTRL_IN_SIZES 9 #define VENDOR_TEST_CTRL_OUT_SIZES 10 +#define VENDOR_TEST_READ_START 11 #define EVENT_READY (1 << 0) @@ -130,6 +131,10 @@ USBEndpointTester::USBEndpointTester(USBPhy *phy, uint16_t vendor_id, uint16_t p _cnt_cb_int_in = 0; _cnt_cb_iso_out = 0; _cnt_cb_iso_in = 0; + _num_packets_bulk_out_abort = 0; + _num_packets_bulk_in_abort = 0; + _num_packets_int_out_abort = 0; + _num_packets_int_in_abort = 0; EndpointResolver resolver(endpoint_table()); resolver.endpoint_ctrl(64); @@ -147,7 +152,6 @@ USBEndpointTester::USBEndpointTester(USBPhy *phy, uint16_t vendor_id, uint16_t p init(); USBDevice::connect(); flags.wait_any(EVENT_READY, osWaitForever, false); - } USBEndpointTester::~USBEndpointTester() @@ -217,6 +221,9 @@ void USBEndpointTester::callback_request(const setup_packet_t *setup) data = ctrl_buf; size = setup->wValue; break; + case VENDOR_TEST_READ_START: + result = (_request_read_start(setup)) ? Success : Failure; + break; default: result = PassThrough; break; @@ -225,6 +232,26 @@ void USBEndpointTester::callback_request(const setup_packet_t *setup) complete_request(result, data, size); } +bool USBEndpointTester::_request_read_start(const setup_packet_t *setup) +{ + assert_locked(); + if (setup->bmRequestType.Recipient != ENDPOINT_RECIPIENT) { + return false; + } + size_t ep_index = NUM_ENDPOINTS + 1; + for (size_t i = 0; i < NUM_ENDPOINTS; i++) { + if (_endpoints[i] == setup->wIndex) { + ep_index = i; + break; + } + } + if (ep_index > NUM_ENDPOINTS) { + return false; + } + endpoint_abort(_endpoints[ep_index]); + return read_start(_endpoints[ep_index], _endpoint_buffs[ep_index], (*_endpoint_configs)[ep_index].max_packet); +} + void USBEndpointTester::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) { if (aborted) { @@ -297,10 +324,10 @@ bool USBEndpointTester::_setup_interface(uint16_t interface, uint8_t alternate) _setup_non_zero_endpoints(); if (_abort_transfer_test && alternate >= 1) { - _cnt_cb_bulk_out_abort = _cnt_cb_bulk_out; - _cnt_cb_bulk_in_abort = _cnt_cb_bulk_in; - _cnt_cb_int_out_abort = _cnt_cb_int_out; - _cnt_cb_int_in_abort = _cnt_cb_int_in; + _num_packets_bulk_out_abort = 0; + _num_packets_bulk_in_abort = 0; + _num_packets_int_out_abort = 0; + _num_packets_int_in_abort = 0; start_ep_in_abort_test(); } return true; @@ -669,9 +696,9 @@ void USBEndpointTester::_cb_bulk_out(usb_ep_t endpoint) write_start(_endpoints[EP_BULK_IN], _endpoint_buffs[EP_BULK_IN], rx_size); } else { // Abort the transfer if enough data was received. - uint32_t num_packets_received = _cnt_cb_bulk_out - _cnt_cb_bulk_out_abort; + _num_packets_bulk_out_abort++; read_start(_endpoints[EP_BULK_OUT], _endpoint_buffs[EP_BULK_OUT], (*_endpoint_configs)[EP_BULK_OUT].max_packet); - if (num_packets_received >= NUM_PACKETS_UNTIL_ABORT) { + if (_num_packets_bulk_out_abort == NUM_PACKETS_UNTIL_ABORT) { endpoint_abort(endpoint); } } @@ -686,14 +713,14 @@ void USBEndpointTester::_cb_bulk_in(usb_ep_t endpoint) // Receive more data from the host using the OUT endpoint. read_start(_endpoints[EP_BULK_OUT], _endpoint_buffs[EP_BULK_OUT], (*_endpoint_configs)[EP_BULK_OUT].max_packet); } else { - uint32_t num_packets_sent = _cnt_cb_bulk_in - _cnt_cb_bulk_in_abort; - if (num_packets_sent >= NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) { + _num_packets_bulk_in_abort++; + if (_num_packets_bulk_in_abort >= NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) { return; } // Abort the transfer if enough data was sent. - memset(_endpoint_buffs[EP_BULK_IN], num_packets_sent, (*_endpoint_configs)[EP_BULK_IN].max_packet); + memset(_endpoint_buffs[EP_BULK_IN], _num_packets_bulk_in_abort, (*_endpoint_configs)[EP_BULK_IN].max_packet); write_start(_endpoints[EP_BULK_IN], _endpoint_buffs[EP_BULK_IN], (*_endpoint_configs)[EP_BULK_IN].max_packet); - if (num_packets_sent >= NUM_PACKETS_UNTIL_ABORT) { + if (_num_packets_bulk_in_abort == NUM_PACKETS_UNTIL_ABORT) { endpoint_abort(endpoint); } } @@ -710,9 +737,9 @@ void USBEndpointTester::_cb_int_out(usb_ep_t endpoint) write_start(_endpoints[EP_INT_IN], _endpoint_buffs[EP_INT_IN], rx_size); } else { // Abort the transfer if enough data was received. - uint32_t num_packets_received = _cnt_cb_int_out - _cnt_cb_int_out_abort; + _num_packets_int_out_abort++; read_start(_endpoints[EP_INT_OUT], _endpoint_buffs[EP_INT_OUT], (*_endpoint_configs)[EP_INT_OUT].max_packet); - if (num_packets_received >= NUM_PACKETS_UNTIL_ABORT) { + if (_num_packets_int_out_abort == NUM_PACKETS_UNTIL_ABORT) { endpoint_abort(endpoint); } } @@ -726,14 +753,14 @@ void USBEndpointTester::_cb_int_in(usb_ep_t endpoint) // Receive more data from the host using the OUT endpoint. read_start(_endpoints[EP_INT_OUT], _endpoint_buffs[EP_INT_OUT], (*_endpoint_configs)[EP_INT_OUT].max_packet); } else { - uint32_t num_packets_sent = _cnt_cb_int_in - _cnt_cb_int_in_abort; - if (num_packets_sent >= NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) { + _num_packets_int_in_abort++; + if (_num_packets_int_in_abort >= NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) { return; } // Abort the transfer if enough data was sent. - memset(_endpoint_buffs[EP_INT_IN], num_packets_sent, (*_endpoint_configs)[EP_INT_IN].max_packet); + memset(_endpoint_buffs[EP_INT_IN], _num_packets_int_in_abort, (*_endpoint_configs)[EP_INT_IN].max_packet); write_start(_endpoints[EP_INT_IN], _endpoint_buffs[EP_INT_IN], (*_endpoint_configs)[EP_INT_IN].max_packet); - if (num_packets_sent >= NUM_PACKETS_UNTIL_ABORT) { + if (_num_packets_int_in_abort == NUM_PACKETS_UNTIL_ABORT) { endpoint_abort(endpoint); } } diff --git a/TESTS/usb_device/basic/USBEndpointTester.h b/TESTS/usb_device/basic/USBEndpointTester.h index a921526b49f..3f7834cdc7f 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.h +++ b/TESTS/usb_device/basic/USBEndpointTester.h @@ -79,10 +79,10 @@ class USBEndpointTester: public USBDevice { volatile uint32_t _cnt_cb_iso_out; volatile uint32_t _cnt_cb_iso_in; - volatile uint32_t _cnt_cb_bulk_out_abort; - volatile uint32_t _cnt_cb_bulk_in_abort; - volatile uint32_t _cnt_cb_int_out_abort; - volatile uint32_t _cnt_cb_int_in_abort; + volatile uint32_t _num_packets_bulk_out_abort; + volatile uint32_t _num_packets_bulk_in_abort; + volatile uint32_t _num_packets_int_out_abort; + volatile uint32_t _num_packets_int_in_abort; virtual const uint8_t *configuration_desc(uint8_t index); virtual void callback_state_change(DeviceState new_state); @@ -103,6 +103,7 @@ class USBEndpointTester: public USBDevice { private: const char *get_desc_string(const uint8_t *desc); + bool _request_read_start(const setup_packet_t *setup); }; #endif From e387efd70ff031b435d8c4bc06a76d71010d920f Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 7 Jun 2018 17:19:20 +0200 Subject: [PATCH 109/488] Tests: USB: Add data toggle test --- TESTS/host_tests/pyusb_basic.py | 114 ++++++++++++++++++++++++++++++++ TESTS/usb_device/basic/main.cpp | 42 +++++++++++- 2 files changed, 155 insertions(+), 1 deletion(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 60dcb3ec3e2..e7a791a66f9 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -290,6 +290,19 @@ def _callback_ep_test_abort(self, key, value, timestamp): except (RuntimeError) as exc: self.report_error(exc) + def _callback_ep_test_data_toggle(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + ep_test_data_toggle(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + def _callback_reset_support(self, key, value, timestamp): status = "false" if sys.platform == "darwin" else "true" self.log("Reset supported: %s" % status) @@ -345,6 +358,7 @@ def setup(self): self.register_callback('ep_test_parallel_transfers', self._callback_ep_test_parallel_transfers) self.register_callback('ep_test_parallel_transfers_ctrl', self._callback_ep_test_parallel_transfers_ctrl) self.register_callback('ep_test_abort', self._callback_ep_test_abort) + self.register_callback('ep_test_data_toggle', self._callback_ep_test_data_toggle) self.register_callback('reset_support', self._callback_reset_support) @@ -1354,6 +1368,106 @@ def ep_test_abort(dev, log, verbose=False): NUM_PACKETS_UNTIL_ABORT * ep_out.wMaxPacketSize, payload_size)) +def ep_test_data_toggle(dev, log, verbose=False): + """Test data toggle reset for bulk OUT/IN endpoint pairs. + + Given a USB device + When an interface is set + Then the data toggle bits for all endpoints are reset to DATA0 + When clear feature is called for an endpoint that *IS NOT* stalled + Then the data toggle is reset to DATA0 for that endpoint + When clear halt is called for an endpoint that *IS* stalled + Then the data toggle is reset to DATA0 for that endpoint + """ + cfg = dev.get_active_configuration() + for intf in cfg: + log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') + if intf.bAlternateSetting == 0: + log('skipping the default AlternateSetting') + continue + log('running tests') + + if verbose: + log('Testing data toggle reset for bulk endpoint pair.') + + # 1.1 reset OUT and IN data toggle to DATA0 + intf.set_altsetting() + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + + # 1.2 send and receive a single data packet, + # so both OUT and IN endpoints switch to DATA1 + loopback_ep_test(bulk_out, bulk_in, bulk_out.wMaxPacketSize) + + # 1.3 reset OUT and IN data toggle to DATA0 + # USB spec, section 9.1.1.5 + # " + # Configuring a device or changing an alternate setting causes all of the status and + # configuration values associated with endpoints in the affected interfaces to be set to their default values. + # This includes setting the data toggle of any endpoint using data toggles to the value DATA0. + # " + intf.set_altsetting() + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + + # 1.4 verify that host and USB device are still in sync with respect to data toggle + try: + loopback_ep_test(bulk_out, bulk_in, bulk_out.wMaxPacketSize) + except usb.USBError as err: + if verbose: + log(USB_ERROR_FMT.format(err, bulk_out, bulk_in, bulk_out.wMaxPacketSize)) + raise_unconditionally(lineno(), 'Data toggle not reset when setting interface.') + + # 2.1 reset OUT and IN data toggle to DATA0 + intf.set_altsetting() + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + + # 2.2 send and receive a single data packet, + # so both OUT and IN endpoints switch to DATA1 + loopback_ep_test(bulk_out, bulk_in, bulk_out.wMaxPacketSize) + + # 2.3 reset OUT data toggle to DATA0 + # USB spec, section 9.4.5 + # " + # For endpoints using data toggle, regardless of whether an endpoint has the Halt feature set, a + # ClearFeature(ENDPOINT_HALT) request always results in the data toggle being reinitialized to DATA0. + # " + bulk_out.clear_halt() +# request_endpoint_read_start(dev, bulk_out) + + # 2.4 verify that host and USB device are still in sync with respect to data toggle + try: + loopback_ep_test(bulk_out, bulk_in, bulk_out.wMaxPacketSize) + except usb.USBError as err: + if verbose: + log(USB_ERROR_FMT.format(err, bulk_out, bulk_in, bulk_out.wMaxPacketSize)) + raise_unconditionally(lineno(), 'Data toggle not reset when calling ClearFeature(ENDPOINT_HALT) ' + 'on an endpoint that has not been halted.') + + # 3.1 reset OUT and IN data toggle to DATA0 + intf.set_altsetting() + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + + # 3.2 send and receive a single data packet, + # so both OUT and IN endpoints switch to DATA1 + loopback_ep_test(bulk_out, bulk_in, bulk_out.wMaxPacketSize) + + # 3.3 reset IN data toggle to DATA0 + # USB spec, section 9.4.5 + # " + # For endpoints using data toggle, regardless of whether an endpoint has the Halt feature set, a + # ClearFeature(ENDPOINT_HALT) request always results in the data toggle being reinitialized to DATA0. + # " + usb.control.set_feature(dev, FEATURE_ENDPOINT_HALT, bulk_in) + bulk_in.clear_halt() + + # 3.4 verify that host and USB device are still in sync with respect to data toggle + try: + loopback_ep_test(bulk_out, bulk_in, bulk_out.wMaxPacketSize) + except usb.USBError as err: + if verbose: + log(USB_ERROR_FMT.format(err, bulk_out, bulk_in, bulk_out.wMaxPacketSize)) + raise_unconditionally(lineno(), 'Data toggle not reset when clearing endpoint halt.') + + def device_reset_test(log): """ Test USB implementation against repeated reset diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index 7a030473c54..18d980108c1 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -385,6 +385,45 @@ void ep_test_abort() } } +/** Test data toggle reset for bulk OUT/IN endpoint pairs + * + * Given a USB device + * When an interface is set + * Then the data toggle bits for all endpoints are reset to DATA0 + * When clear feature is called for an endpoint that *IS NOT* stalled + * Then the data toggle is reset to DATA0 for that endpoint + * When clear halt is called for an endpoint that *IS* stalled + * Then the data toggle is reset to DATA0 for that endpoint + */ +void ep_test_data_toggle() +{ + uint16_t vendor_id = 0x0d28; + // Use a product ID different than that used in other tests, + // to help Windows hosts use the correct configuration descriptor. + uint16_t product_id = 0x0206; + uint16_t product_release = 0x0001; + char _key[11] = { }; + char _value[128] = { }; + + { + USBEndpointTester serial(get_phy(), vendor_id, product_id, product_release, false); + greentea_send_kv("ep_test_data_toggle", serial.get_serial_desc_string()); + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); +#if EP_DBG + wait_ms(100); + printf("cnt_cb_set_conf = %lu\r\n", serial.get_cnt_cb_set_conf()); + printf("cnt_cb_set_intf = %lu\r\n", serial.get_cnt_cb_set_intf()); + printf("cnt_cb_bulk_out = %lu\r\n", serial.get_cnt_cb_bulk_out()); + printf("cnt_cb_bulk_in = %lu\r\n", serial.get_cnt_cb_bulk_in()); + printf("cnt_cb_int_out = %lu\r\n", serial.get_cnt_cb_int_out()); + printf("cnt_cb_int_in = %lu\r\n", serial.get_cnt_cb_int_in()); + printf("cnt_cb_iso_out = %lu\r\n", serial.get_cnt_cb_iso_out()); + printf("cnt_cb_iso_in = %lu\r\n", serial.get_cnt_cb_iso_in()); +#endif + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + /** Test USB implementation against repeated reset Given an initialized USB (HOST <---> DUT connection established) @@ -602,7 +641,8 @@ Case cases[] = { Case("endpoint test halt", ep_test_halt), Case("endpoint test parallel transfers", ep_test_parallel_transfers), Case("endpoint test parallel transfers ctrl", ep_test_parallel_transfers_ctrl), - Case("endpoint test abort", ep_test_abort) + Case("endpoint test abort", ep_test_abort), + Case("endpoint test data toggle reset", ep_test_data_toggle) }; utest::v1::status_t greentea_test_setup(const size_t number_of_cases) From c32c2e299c4557ce4b4308740283ec773a3a6c61 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 21 Jun 2018 23:48:55 +0200 Subject: [PATCH 110/488] Tests: USB: Update ep callbacks Endpoint callbacks no longer have endpoint as a param. This update was introduced in #7267. --- TESTS/usb_device/basic/USBEndpointTester.cpp | 32 ++++++++++---------- TESTS/usb_device/basic/USBEndpointTester.h | 14 ++++----- 2 files changed, 23 insertions(+), 23 deletions(-) diff --git a/TESTS/usb_device/basic/USBEndpointTester.cpp b/TESTS/usb_device/basic/USBEndpointTester.cpp index 937681b279a..37cd69fcb93 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.cpp +++ b/TESTS/usb_device/basic/USBEndpointTester.cpp @@ -684,10 +684,10 @@ const uint8_t *USBEndpointTester::configuration_desc(uint8_t index) } } -void USBEndpointTester::_cb_bulk_out(usb_ep_t endpoint) +void USBEndpointTester::_cb_bulk_out() { _cnt_cb_bulk_out++; - uint32_t rx_size = read_finish(endpoint); + uint32_t rx_size = read_finish(_endpoints[EP_BULK_OUT]); if (_abort_transfer_test == false) { // Send data back to host using the IN endpoint. @@ -699,15 +699,15 @@ void USBEndpointTester::_cb_bulk_out(usb_ep_t endpoint) _num_packets_bulk_out_abort++; read_start(_endpoints[EP_BULK_OUT], _endpoint_buffs[EP_BULK_OUT], (*_endpoint_configs)[EP_BULK_OUT].max_packet); if (_num_packets_bulk_out_abort == NUM_PACKETS_UNTIL_ABORT) { - endpoint_abort(endpoint); + endpoint_abort(_endpoints[EP_BULK_OUT]); } } } -void USBEndpointTester::_cb_bulk_in(usb_ep_t endpoint) +void USBEndpointTester::_cb_bulk_in() { _cnt_cb_bulk_in++; - write_finish(endpoint); + write_finish(_endpoints[EP_BULK_IN]); if (_abort_transfer_test == false) { // Receive more data from the host using the OUT endpoint. @@ -721,15 +721,15 @@ void USBEndpointTester::_cb_bulk_in(usb_ep_t endpoint) memset(_endpoint_buffs[EP_BULK_IN], _num_packets_bulk_in_abort, (*_endpoint_configs)[EP_BULK_IN].max_packet); write_start(_endpoints[EP_BULK_IN], _endpoint_buffs[EP_BULK_IN], (*_endpoint_configs)[EP_BULK_IN].max_packet); if (_num_packets_bulk_in_abort == NUM_PACKETS_UNTIL_ABORT) { - endpoint_abort(endpoint); + endpoint_abort(_endpoints[EP_BULK_IN]); } } } -void USBEndpointTester::_cb_int_out(usb_ep_t endpoint) +void USBEndpointTester::_cb_int_out() { _cnt_cb_int_out++; - uint32_t rx_size = read_finish(endpoint); + uint32_t rx_size = read_finish(_endpoints[EP_INT_OUT]); if (_abort_transfer_test == false) { // Send data back to host using the IN endpoint. memset(_endpoint_buffs[EP_INT_IN], 0, (*_endpoint_configs)[EP_INT_IN].max_packet); @@ -740,15 +740,15 @@ void USBEndpointTester::_cb_int_out(usb_ep_t endpoint) _num_packets_int_out_abort++; read_start(_endpoints[EP_INT_OUT], _endpoint_buffs[EP_INT_OUT], (*_endpoint_configs)[EP_INT_OUT].max_packet); if (_num_packets_int_out_abort == NUM_PACKETS_UNTIL_ABORT) { - endpoint_abort(endpoint); + endpoint_abort(_endpoints[EP_INT_OUT]); } } } -void USBEndpointTester::_cb_int_in(usb_ep_t endpoint) +void USBEndpointTester::_cb_int_in() { _cnt_cb_int_in++; - write_finish(endpoint); + write_finish(_endpoints[EP_INT_IN]); if (_abort_transfer_test == false) { // Receive more data from the host using the OUT endpoint. read_start(_endpoints[EP_INT_OUT], _endpoint_buffs[EP_INT_OUT], (*_endpoint_configs)[EP_INT_OUT].max_packet); @@ -761,25 +761,25 @@ void USBEndpointTester::_cb_int_in(usb_ep_t endpoint) memset(_endpoint_buffs[EP_INT_IN], _num_packets_int_in_abort, (*_endpoint_configs)[EP_INT_IN].max_packet); write_start(_endpoints[EP_INT_IN], _endpoint_buffs[EP_INT_IN], (*_endpoint_configs)[EP_INT_IN].max_packet); if (_num_packets_int_in_abort == NUM_PACKETS_UNTIL_ABORT) { - endpoint_abort(endpoint); + endpoint_abort(_endpoints[EP_INT_IN]); } } } -void USBEndpointTester::_cb_iso_out(usb_ep_t endpoint) +void USBEndpointTester::_cb_iso_out() { _cnt_cb_iso_out++; - uint32_t rx_size = read_finish(endpoint); + uint32_t rx_size = read_finish(_endpoints[EP_ISO_OUT]); // Send data back to host using the IN endpoint. memset(_endpoint_buffs[EP_ISO_IN], 0, (*_endpoint_configs)[EP_ISO_IN].max_packet); memcpy(_endpoint_buffs[EP_ISO_IN], _endpoint_buffs[EP_ISO_OUT], rx_size); write_start(_endpoints[EP_ISO_IN], _endpoint_buffs[EP_ISO_IN], rx_size); } -void USBEndpointTester::_cb_iso_in(usb_ep_t endpoint) +void USBEndpointTester::_cb_iso_in() { _cnt_cb_iso_in++; - write_finish(endpoint); + write_finish(_endpoints[EP_ISO_IN]); // Receive more data from the host using the OUT endpoint. read_start(_endpoints[EP_ISO_OUT], _endpoint_buffs[EP_ISO_OUT], (*_endpoint_configs)[EP_ISO_OUT].max_packet); } diff --git a/TESTS/usb_device/basic/USBEndpointTester.h b/TESTS/usb_device/basic/USBEndpointTester.h index 3f7834cdc7f..ef622b2d3b0 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.h +++ b/TESTS/usb_device/basic/USBEndpointTester.h @@ -33,7 +33,7 @@ class USBEndpointTester: public USBDevice { public: USBEndpointTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool abort_transfer_test); - ~USBEndpointTester(); + virtual ~USBEndpointTester(); const char *get_serial_desc_string(); void start_ep_in_abort_test(); @@ -94,12 +94,12 @@ class USBEndpointTester: public USBDevice { void _setup_non_zero_endpoints(); bool _setup_interface(uint16_t interface, uint8_t alternate); - virtual void _cb_bulk_out(usb_ep_t endpoint); - virtual void _cb_bulk_in(usb_ep_t endpoint); - virtual void _cb_int_out(usb_ep_t endpoint); - virtual void _cb_int_in(usb_ep_t endpoint); - virtual void _cb_iso_out(usb_ep_t endpoint); - virtual void _cb_iso_in(usb_ep_t endpoint); + virtual void _cb_bulk_out(); + virtual void _cb_bulk_in(); + virtual void _cb_int_out(); + virtual void _cb_int_in(); + virtual void _cb_iso_out(); + virtual void _cb_iso_in(); private: const char *get_desc_string(const uint8_t *desc); From 7feb098300fefa94f2db66bdb4f05320aa955bc7 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 21 Jun 2018 11:27:56 -0500 Subject: [PATCH 111/488] Update test to restart reads after unstall After an endpoint is unstalled any pending transfers are terminated. This patch re-starts any reads that were ongoing. --- TESTS/usb_device/basic/USBEndpointTester.cpp | 23 ++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/TESTS/usb_device/basic/USBEndpointTester.cpp b/TESTS/usb_device/basic/USBEndpointTester.cpp index 37cd69fcb93..544464a8290 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.cpp +++ b/TESTS/usb_device/basic/USBEndpointTester.cpp @@ -228,6 +228,29 @@ void USBEndpointTester::callback_request(const setup_packet_t *setup) result = PassThrough; break; } + } else if ((setup->bmRequestType.Type == STANDARD_TYPE) && (setup->bmRequestType.Recipient == ENDPOINT_RECIPIENT)) { + if (setup->bRequest == CLEAR_FEATURE) { + usb_ep_t ep = setup->wIndex; + bool valid = false; + uint32_t ep_index = 0; + if (ep == _endpoints[EP_BULK_OUT]) { + valid = true; + ep_index = EP_BULK_OUT; + } else if (ep == _endpoints[EP_INT_OUT]) { + valid = true; + ep_index = EP_INT_OUT; + } else if (ep == _endpoints[EP_ISO_OUT]) { + valid = true; + ep_index = EP_ISO_OUT; + } + + if (valid) { + // Restart reads when an OUT endpoint is unstalled + result = Success; + endpoint_unstall(ep); + read_start(_endpoints[ep_index], _endpoint_buffs[ep_index], (*_endpoint_configs)[ep_index].max_packet); + } + } } complete_request(result, data, size); } From ae731edf228604c7388e21021741c3cc327863c7 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 28 Jun 2018 10:54:33 +0200 Subject: [PATCH 112/488] Tests: USB: Decrease the max data size for iso ep Although the USB spec sets the upper limit on FS isochronous endpoint payloads to 1023 B, this value is hard to test in practice. Moreover, not all the targets Mbed OS supports (like NUCLEO_F207ZG) are able to handle all the endpoints set to max. --- TESTS/usb_device/basic/USBEndpointTester.cpp | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/TESTS/usb_device/basic/USBEndpointTester.cpp b/TESTS/usb_device/basic/USBEndpointTester.cpp index 544464a8290..2bb914cc4e9 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.cpp +++ b/TESTS/usb_device/basic/USBEndpointTester.cpp @@ -49,7 +49,19 @@ #define TEST_SIZE_EP_INT_3 (16) #define TEST_SIZE_EP_INT_4 TEST_SIZE_EP_INT_MIN -#define TEST_SIZE_EP_ISO_MAX (1023) + +/* According to USB spec, the wMaxPacketSize for FS isochronous endpoints + * is 1023 B. There are a couple of reasons this value is not used in tests: + * - some of the boards supported by Mbed OS have too little RAM dedicated + * for USB, making EndpointResolve::valid() fail when all the endpoints (2x + * bulk, 2x interrupt, 2x isochronous, 2x control) are configured to use + * the max value of wMaxPacketSize + * (e.g. NUCLEO_F207ZG has 1.25K of endpoint RAM), + * - given a test host with other USB devices on the bus, it is unlikely + * for the test device to be able to reserve the bandwidth associated with + * high wMaxPacketSize for iso endpoints. + */ +#define TEST_SIZE_EP_ISO_MAX (256) #define TEST_SIZE_EP_ISO_MIN (1) #define TEST_SIZE_EP_ISO_0 (0) #define TEST_SIZE_EP_ISO_1 (0) From 0f10f2c5e01f3fd948305f224b228e8d63678dd1 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 28 Jun 2018 13:30:15 +0200 Subject: [PATCH 113/488] Tests: USB: Update endpoint halt test Wait for a locally created Timer thread to finish before returning. --- TESTS/host_tests/pyusb_basic.py | 34 +++++++++++++++++++-------------- 1 file changed, 20 insertions(+), 14 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index e7a791a66f9..00920338c82 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -1026,22 +1026,28 @@ def timer_handler(): delayed_halt.start() # Keep transferring data to and from the device until one of the endpoints # is halted. - while delayed_halt.is_alive(): - if ctrl_error.is_set(): - raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x} failed' - .format(ep_to_halt)) - try: - loopback_ep_test(ep_out, ep_in, ep_out.wMaxPacketSize) - except usb.core.USBError as err: + try: + while delayed_halt.is_alive(): + if ctrl_error.is_set(): + raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x} failed' + .format(ep_to_halt)) try: - ep_status = usb.control.get_status(dev, ep_to_halt) + loopback_ep_test(ep_out, ep_in, ep_out.wMaxPacketSize) except usb.core.USBError as err: - raise_unconditionally(lineno(), 'Unable to get endpoint status ({!r}).'.format(err)) - if ep_status == 1: - # OK, got USBError because of endpoint halt - return - else: - raise_unconditionally(lineno(), 'Unexpected error ({!r}).'.format(err)) + try: + ep_status = usb.control.get_status(dev, ep_to_halt) + except usb.core.USBError as err: + raise_unconditionally(lineno(), 'Unable to get endpoint status ({!r}).'.format(err)) + if ep_status == 1: + # OK, got USBError because of endpoint halt + return + else: + raise_unconditionally(lineno(), 'Unexpected error ({!r}).'.format(err)) + except: + raise + finally: + # Always wait for the Timer thread created above. + delayed_halt.join() raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x}' ' during transmission did not raise USBError.' .format(ep_to_halt)) From e1be93404b1860c2a939610add78ce6b6186bea4 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Fri, 29 Jun 2018 18:05:36 +0200 Subject: [PATCH 114/488] Tests: USB: Check ep buffer is released by abort Validate that endpoint buffer is not used after a transfer has been aborted. --- TESTS/host_tests/pyusb_basic.py | 36 ++++++++- TESTS/usb_device/basic/USBEndpointTester.cpp | 79 +++++++++++++++++--- TESTS/usb_device/basic/USBEndpointTester.h | 1 + TESTS/usb_device/basic/main.cpp | 1 + 4 files changed, 107 insertions(+), 10 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 00920338c82..f3e486bb45f 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -56,6 +56,7 @@ def get_interface(dev, interface, alternate=0): VENDOR_TEST_CTRL_IN_SIZES = 9 VENDOR_TEST_CTRL_OUT_SIZES = 10 VENDOR_TEST_READ_START = 11 +VENDOR_TEST_ABORT_BUFF_CHECK = 12 VENDOR_TEST_UNSUPPORTED_REQUEST = 32 REQUEST_GET_STATUS = 0 @@ -1062,6 +1063,16 @@ def request_endpoint_read_start(dev, ep): dev.ctrl_transfer(**ctrl_kwargs) +def request_abort_buff_check(dev, ep): + ctrl_kwargs = { + 'bmRequestType': build_request_type(CTRL_IN, CTRL_TYPE_VENDOR, CTRL_RECIPIENT_ENDPOINT), + 'bRequest': VENDOR_TEST_ABORT_BUFF_CHECK, + 'wValue': 0, + 'wIndex': ep.bEndpointAddress, + 'data_or_wLength': 1} + return bool(dev.ctrl_transfer(**ctrl_kwargs)[0]) + + USB_ERROR_FMT = str('Got {0!r} while testing endpoints ' '{1.bEndpointAddress:#04x}({1.wMaxPacketSize:02}) and ' '{2.bEndpointAddress:#04x}({2.wMaxPacketSize:02}) with ' @@ -1304,9 +1315,16 @@ def ep_test_abort(dev, log, verbose=False): Given a USB device with multiple OUT/IN endpoint pairs When a device aborts an in progress data transfer Then no more data is transmitted + and endpoint buffer is correctly released on the device end """ NUM_PACKETS_UNTIL_ABORT = 2 NUM_PACKETS_AFTER_ABORT = 8 + + # If the host ever receives a payload with any byte set to this value, + # the device does not handle abort operation correctly. The buffer + # passed to aborted operation must not be used after call to abort(). + FORBIDDEN_PAYLOAD_VALUE = NUM_PACKETS_AFTER_ABORT + 1 + cfg = dev.get_active_configuration() for intf in cfg: log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') @@ -1336,6 +1354,11 @@ def ep_test_abort(dev, log, verbose=False): payload_in.extend(packet) except usb.core.USBError as err: break + if FORBIDDEN_PAYLOAD_VALUE in payload_in: + raise_unconditionally( + lineno(), 'Endpoint buffer not released when aborting the ' + 'write operation on endpoint {0.bEndpointAddress:#04x}.' + .format(ep_in)) if verbose: log('The size of data successfully received from endpoint {0.bEndpointAddress:#04x}: {1} B.' .format(ep_in, len(payload_in))) @@ -1353,13 +1376,24 @@ def ep_test_abort(dev, log, verbose=False): log('Testing aborting an in progress transfer for OUT endpoints.') for ep_out in (bulk_out, interrupt_out): payload_size = (NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) * ep_out.wMaxPacketSize - payload_out = array.array('B', (0x01 for _ in range(ep_out.wMaxPacketSize))) num_bytes_written = 0 while num_bytes_written < payload_size: + payload_out = array.array('B', (num_bytes_written/ep_out.wMaxPacketSize + for _ in range(ep_out.wMaxPacketSize))) try: num_bytes_written += ep_out.write(payload_out) except usb.core.USBError: break + try: + ep_buff_correct = request_abort_buff_check(dev, ep_out) + except (usb.core.USBError, IndexError, TypeError) as err: + raise_unconditionally( + lineno(), 'Unable to verify endpoint buffer content ({!r}).'.format(err)) + if not ep_buff_correct: + raise_unconditionally( + lineno(), 'Endpoint buffer not released when aborting the ' + 'read operation on endpoint {0.bEndpointAddress:#04x}.' + .format(ep_out)) if verbose: log('The size of data successfully sent to endpoint {0.bEndpointAddress:#04x}: {1} B.' .format(ep_out, num_bytes_written)) diff --git a/TESTS/usb_device/basic/USBEndpointTester.cpp b/TESTS/usb_device/basic/USBEndpointTester.cpp index 2bb914cc4e9..8085dc0c1dc 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.cpp +++ b/TESTS/usb_device/basic/USBEndpointTester.cpp @@ -24,12 +24,20 @@ #define NUM_PACKETS_UNTIL_ABORT 2 #define NUM_PACKETS_AFTER_ABORT 8 +#define EP_ABORT_BUFF_VALUE 0xff -#define VENDOR_TEST_CTRL_IN 1 -#define VENDOR_TEST_CTRL_OUT 2 -#define VENDOR_TEST_CTRL_IN_SIZES 9 -#define VENDOR_TEST_CTRL_OUT_SIZES 10 -#define VENDOR_TEST_READ_START 11 +/* If the host ever receives a payload with any byte set to this value, + * the device does not handle abort operation correctly. The buffer + * passed to aborted operation must not be used after call to abort(). + */ +#define FORBIDDEN_PAYLOAD_VALUE (NUM_PACKETS_AFTER_ABORT + 1) + +#define VENDOR_TEST_CTRL_IN 1 +#define VENDOR_TEST_CTRL_OUT 2 +#define VENDOR_TEST_CTRL_IN_SIZES 9 +#define VENDOR_TEST_CTRL_OUT_SIZES 10 +#define VENDOR_TEST_READ_START 11 +#define VENDOR_TEST_ABORT_BUFF_CHECK 12 #define EVENT_READY (1 << 0) @@ -236,6 +244,12 @@ void USBEndpointTester::callback_request(const setup_packet_t *setup) case VENDOR_TEST_READ_START: result = (_request_read_start(setup)) ? Success : Failure; break; + case VENDOR_TEST_ABORT_BUFF_CHECK: + result = Send; + ctrl_buf[0] = _request_abort_buff_check(setup); + data = ctrl_buf; + size = 1; + break; default: result = PassThrough; break; @@ -273,20 +287,50 @@ bool USBEndpointTester::_request_read_start(const setup_packet_t *setup) if (setup->bmRequestType.Recipient != ENDPOINT_RECIPIENT) { return false; } - size_t ep_index = NUM_ENDPOINTS + 1; + size_t ep_index = NUM_ENDPOINTS; for (size_t i = 0; i < NUM_ENDPOINTS; i++) { if (_endpoints[i] == setup->wIndex) { ep_index = i; break; } } - if (ep_index > NUM_ENDPOINTS) { + if (ep_index == NUM_ENDPOINTS) { + return false; + } + if (_endpoint_buffs[ep_index] == NULL) { return false; } endpoint_abort(_endpoints[ep_index]); return read_start(_endpoints[ep_index], _endpoint_buffs[ep_index], (*_endpoint_configs)[ep_index].max_packet); } +bool USBEndpointTester::_request_abort_buff_check(const setup_packet_t *setup) +{ + assert_locked(); + if (setup->bmRequestType.Recipient != ENDPOINT_RECIPIENT) { + return false; + } + size_t ep_index = NUM_ENDPOINTS; + for (size_t i = 0; i < NUM_ENDPOINTS; i++) { + if (_endpoints[i] == setup->wIndex) { + ep_index = i; + break; + } + } + if (ep_index == NUM_ENDPOINTS) { + return false; + } + if (_endpoint_buffs[ep_index] == NULL) { + return false; + } + for (size_t i = 0; i < (*_endpoint_configs)[ep_index].max_packet; i++) { + if (_endpoint_buffs[ep_index][i] != EP_ABORT_BUFF_VALUE) { + return false; + } + } + return true; +} + void USBEndpointTester::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) { if (aborted) { @@ -309,6 +353,9 @@ void USBEndpointTester::callback_request_xfer_done(const setup_packet_t *setup, case VENDOR_TEST_CTRL_IN_SIZES: result = true; break; + case VENDOR_TEST_ABORT_BUFF_CHECK: + result = true; + break; default: result = false; break; @@ -723,7 +770,6 @@ void USBEndpointTester::_cb_bulk_out() { _cnt_cb_bulk_out++; uint32_t rx_size = read_finish(_endpoints[EP_BULK_OUT]); - if (_abort_transfer_test == false) { // Send data back to host using the IN endpoint. memset(_endpoint_buffs[EP_BULK_IN], 0, (*_endpoint_configs)[EP_BULK_IN].max_packet); @@ -732,6 +778,10 @@ void USBEndpointTester::_cb_bulk_out() } else { // Abort the transfer if enough data was received. _num_packets_bulk_out_abort++; + if (_num_packets_bulk_out_abort == NUM_PACKETS_UNTIL_ABORT) { + // Set every byte of the buffer to a known value. + memset(_endpoint_buffs[EP_BULK_OUT], EP_ABORT_BUFF_VALUE, (*_endpoint_configs)[EP_BULK_OUT].max_packet); + } read_start(_endpoints[EP_BULK_OUT], _endpoint_buffs[EP_BULK_OUT], (*_endpoint_configs)[EP_BULK_OUT].max_packet); if (_num_packets_bulk_out_abort == NUM_PACKETS_UNTIL_ABORT) { endpoint_abort(_endpoints[EP_BULK_OUT]); @@ -743,7 +793,6 @@ void USBEndpointTester::_cb_bulk_in() { _cnt_cb_bulk_in++; write_finish(_endpoints[EP_BULK_IN]); - if (_abort_transfer_test == false) { // Receive more data from the host using the OUT endpoint. read_start(_endpoints[EP_BULK_OUT], _endpoint_buffs[EP_BULK_OUT], (*_endpoint_configs)[EP_BULK_OUT].max_packet); @@ -757,6 +806,10 @@ void USBEndpointTester::_cb_bulk_in() write_start(_endpoints[EP_BULK_IN], _endpoint_buffs[EP_BULK_IN], (*_endpoint_configs)[EP_BULK_IN].max_packet); if (_num_packets_bulk_in_abort == NUM_PACKETS_UNTIL_ABORT) { endpoint_abort(_endpoints[EP_BULK_IN]); + // Verify that buffer given in write_start is not used after the + // call to endpoint_abort(), by changing the buffer contents. + // The test will fail if the host receives new buffer content. + memset(_endpoint_buffs[EP_BULK_IN], FORBIDDEN_PAYLOAD_VALUE, (*_endpoint_configs)[EP_BULK_IN].max_packet); } } } @@ -773,6 +826,10 @@ void USBEndpointTester::_cb_int_out() } else { // Abort the transfer if enough data was received. _num_packets_int_out_abort++; + if (_num_packets_int_out_abort == NUM_PACKETS_UNTIL_ABORT) { + // Set every byte of the buffer to a known value. + memset(_endpoint_buffs[EP_INT_OUT], EP_ABORT_BUFF_VALUE, (*_endpoint_configs)[EP_INT_OUT].max_packet); + } read_start(_endpoints[EP_INT_OUT], _endpoint_buffs[EP_INT_OUT], (*_endpoint_configs)[EP_INT_OUT].max_packet); if (_num_packets_int_out_abort == NUM_PACKETS_UNTIL_ABORT) { endpoint_abort(_endpoints[EP_INT_OUT]); @@ -797,6 +854,10 @@ void USBEndpointTester::_cb_int_in() write_start(_endpoints[EP_INT_IN], _endpoint_buffs[EP_INT_IN], (*_endpoint_configs)[EP_INT_IN].max_packet); if (_num_packets_int_in_abort == NUM_PACKETS_UNTIL_ABORT) { endpoint_abort(_endpoints[EP_INT_IN]); + // Verify that buffer given in write_start is not used after the + // call to endpoint_abort(), by changing the buffer contents. + // The test will fail if the host receives new buffer content. + memset(_endpoint_buffs[EP_INT_IN], FORBIDDEN_PAYLOAD_VALUE, (*_endpoint_configs)[EP_INT_IN].max_packet); } } } diff --git a/TESTS/usb_device/basic/USBEndpointTester.h b/TESTS/usb_device/basic/USBEndpointTester.h index ef622b2d3b0..3b0afef66c9 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.h +++ b/TESTS/usb_device/basic/USBEndpointTester.h @@ -104,6 +104,7 @@ class USBEndpointTester: public USBDevice { private: const char *get_desc_string(const uint8_t *desc); bool _request_read_start(const setup_packet_t *setup); + bool _request_abort_buff_check(const setup_packet_t *setup); }; #endif diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index 18d980108c1..ace311a06ce 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -355,6 +355,7 @@ void ep_test_parallel_transfers_ctrl() * Given a USB device with multiple OUT/IN endpoint pairs * When a device aborts an in progress data transfer * Then no more data is transmitted + * and endpoint buffer is correctly released on the device end */ void ep_test_abort() { From aa0cdea6a85a7af7a9e67d1d1cf287f76edbaaa1 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 31 Jul 2018 16:32:46 -0500 Subject: [PATCH 115/488] Remove HAL_GetTick from ST USBPhy Remove the function HAL_GetTick from the ST USBPhy driver. This is no longer needed as that change has been made on master. --- usb/device/targets/TARGET_STM/USBPhy_STM32.cpp | 6 ------ 1 file changed, 6 deletions(-) diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 7990dc02fb0..9f1c78d5419 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -525,10 +525,4 @@ void USBPhyHw::_usbisr(void) { instance->events->start_process(); } -//TODO - remove this hack which allows HAL_Delay to work when interrupts are disabled -extern "C" uint32_t HAL_GetTick() -{ - return ticker_read_us(get_us_ticker_data()) / 1000; -} - #endif From ca6b35f943bbd88ed90cbeef46a8e69daded9a6a Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 30 Oct 2018 15:36:39 -0500 Subject: [PATCH 116/488] Fix USB traceback during testing when wrong size In the pyusb_basic host test check the length of control transfers before comparing contents for equality. --- TESTS/host_tests/pyusb_basic.py | 17 ++++++----------- 1 file changed, 6 insertions(+), 11 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index f3e486bb45f..2e0f12332e5 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -24,6 +24,7 @@ from threading import Thread, Event, Timer import array import random +import os import usb.core from usb.util import build_request_type @@ -841,12 +842,8 @@ def control_data_test(dev, sizes_list, log): request = VENDOR_TEST_CTRL_OUT_SIZES value = i # Size of data the device should actually read index = 0 # Unused - set for debugging only - data = bytearray(i) # Dummy data - if i == 1: - data[0] = count - else: - data[0] = count - 1 - data[i - 1] = count + 1 + data = bytearray(os.urandom(i)) # Dummy data + try: dev.ctrl_transfer(request_type, request, value, index, data, 5000) except usb.core.USBError: @@ -860,11 +857,9 @@ def control_data_test(dev, sizes_list, log): length = i try: ret = dev.ctrl_transfer(request_type, request, value, index, length, 5000) - if i == 1: - raise_if_different(count, ret[0], lineno(), "send/receive data not match") - else: - raise_if_different(count - 1, ret[0], lineno(), "send/receive data not match") - raise_if_different(count + 1, ret[i - 1], lineno(), "send/receive data not match") + raise_if_different(i, len(ret), lineno(), "send/receive data is the wrong size") + for j in range(0, i): + raise_if_different(data[j], ret[j], lineno(), "send/receive data not match") except usb.core.USBError: raise_unconditionally(lineno(), "VENDOR_TEST_CTRL_IN_SIZES failed") count += 1 From 5cefd0d4fa4fa49ee8b58e797d53d79b504d1d9f Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 26 Oct 2018 11:11:49 -0500 Subject: [PATCH 117/488] Ignore disabled Kinetis USB endpoint interrupts Ignore interrupts on disabled USB endpoints. This prevents handling interrupts when in the wrong state. Prior to this patch when running the serial test on a K64F the assert on line 908 of USBDevice.cpp would sometimes be triggered. This assert indicates that an endpoint 0 IN interrupt occurred before the device was ready. This occurs during the test_cdc_usb_reconnect test when the host sends a "Set Control Line State" USB request and the device acknowledges it just before USB is disconnected. --- usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp index 16b0cd28569..07282bc400a 100644 --- a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp +++ b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp @@ -636,8 +636,11 @@ void USBPhyHw::process() uint32_t ev_odd = (USB0->STAT >> 2) & 0x01; int phy_ep = (num << 1) | dir; + bool tx_en = (USB0->ENDPOINT[PHY_TO_LOG(phy_ep)].ENDPT & USB_ENDPT_EPTXEN_MASK) ? true : false; + bool rx_en = (USB0->ENDPOINT[PHY_TO_LOG(phy_ep)].ENDPT & USB_ENDPT_EPRXEN_MASK) ? true : false; + // setup packet - if ((num == 0) && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == SETUP_TOKEN)) { + if (tx_en && (num == 0) && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == SETUP_TOKEN)) { setup_suspend = true; Data1 |= 0x02 | 0x01; // set DATA1 for TX and RX bdt[EP_BDT_IDX(0, TX, EVEN)].info &= ~BD_OWN_MASK; @@ -648,7 +651,7 @@ void USBPhyHw::process() } else { // OUT packet - if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == OUT_TOKEN) { + if (rx_en && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == OUT_TOKEN)) { if (num == 0) events->ep0_out(); else { @@ -658,7 +661,7 @@ void USBPhyHw::process() } // IN packet - if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == IN_TOKEN) { + if (tx_en && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == IN_TOKEN)) { if (num == 0) { events->ep0_in(); if (set_addr == 1) { From 8c2a30b9099a332258783568958e7a17e3b78d66 Mon Sep 17 00:00:00 2001 From: bcostm Date: Tue, 30 Oct 2018 09:43:15 +0100 Subject: [PATCH 118/488] STM32F4 USB: add patch in CubeF4 hal driver --- .../TARGET_STM32F4/device/stm32f4xx_hal_pcd.c | 148 ++++++++++++-- .../TARGET_STM32F4/device/stm32f4xx_hal_pcd.h | 1 + .../TARGET_STM32F4/device/stm32f4xx_ll_usb.c | 180 +++++++++++++++++- .../TARGET_STM32F4/device/stm32f4xx_ll_usb.h | 3 + 4 files changed, 307 insertions(+), 25 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.c b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.c index a6ed3193fe8..7e14649c3cd 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.c +++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.c @@ -106,6 +106,7 @@ * @{ */ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t epnum); +static HAL_StatusTypeDef PCD_ReadRxFifo(PCD_HandleTypeDef *hpcd); // MBED PATCH /** * @} */ @@ -394,6 +395,13 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) } } + // MBED PATCH + if (( epint & USB_OTG_DOEPINT_EPDISD) == USB_OTG_DOEPINT_EPDISD) + { + CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_EPDISD); + } + // MBED PATCH + if(( epint & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP) { /* Inform the upper layer that a setup packet is available */ @@ -667,27 +675,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) /* Handle RxQLevel Interrupt */ if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) { - USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); - - temp = USBx->GRXSTSP; - - ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM]; - - if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_DATA_UPDT) - { - if((temp & USB_OTG_GRXSTSP_BCNT) != 0U) - { - USB_ReadPacket(USBx, ep->xfer_buff, (temp & USB_OTG_GRXSTSP_BCNT) >> 4U); - ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; - ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; - } - } - else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_SETUP_UPDT) - { - USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U); - ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; - } - USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); + PCD_ReadRxFifo(hpcd); // MBED PATCH } /* Handle SOF Interrupt */ @@ -1131,6 +1119,86 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, return HAL_OK; } +// MBED PATCH +/** + * @brief Abort a transaction. + * @param hpcd: PCD handle + * @param ep_addr: endpoint address + * @retval HAL status + */ +HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) +{ + USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; + HAL_StatusTypeDef ret = HAL_OK; + USB_OTG_EPTypeDef *ep; + + if ((0x80 & ep_addr) == 0x80) + { + ep = &hpcd->IN_ep[ep_addr & 0x7F]; + } + else + { + ep = &hpcd->OUT_ep[ep_addr]; + } + + __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); + + ep->num = ep_addr & 0x7F; + ep->is_in = ((ep_addr & 0x80) == 0x80); + + USB_EPSetNak(hpcd->Instance, ep); + + if ((0x80 & ep_addr) == 0x80) + { + ret = USB_EPStopXfer(hpcd->Instance , ep); + if (ret == HAL_OK) + { + ret = USB_FlushTxFifo(hpcd->Instance, ep_addr & 0x7F); + } + } + else + { + /* Set global NAK */ + USBx_DEVICE->DCTL |= USB_OTG_DCTL_SGONAK; + + /* Read all entries from the fifo so global NAK takes effect */ + while (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) + { + PCD_ReadRxFifo(hpcd); + } + + /* Stop the transfer */ + ret = USB_EPStopXfer(hpcd->Instance , ep); + if (ret == HAL_BUSY) + { + /* If USB_EPStopXfer returns HAL_BUSY then a setup packet + * arrived after the rx fifo was processed but before USB_EPStopXfer + * was called. Process the rx fifo one more time to read the + * setup packet. + * + * Note - after the setup packet has been received no further + * packets will be received over USB. This is because the next + * phase (data or status) of the control transfer started by + * the setup packet will be naked until global nak is cleared. + */ + while (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) + { + PCD_ReadRxFifo(hpcd); + } + + ret = USB_EPStopXfer(hpcd->Instance , ep); + } + + /* Clear global nak */ + USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGONAK; + } + + __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); + + return ret; +} +// MBED PATCH + /** * @brief Set a STALL condition over an endpoint. * @param hpcd PCD handle @@ -1356,6 +1424,44 @@ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t return HAL_OK; } +// MBED PATCH +/** + * @brief Process the next RX fifo entry + * @param hpcd: PCD handle + * @retval HAL status + */ +static HAL_StatusTypeDef PCD_ReadRxFifo(PCD_HandleTypeDef *hpcd) +{ + USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; + USB_OTG_EPTypeDef *ep; + uint32_t temp = 0; + + USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); + + temp = USBx->GRXSTSP; + + ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM]; + + if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_DATA_UPDT) + { + if((temp & USB_OTG_GRXSTSP_BCNT) != 0U) + { + USB_ReadPacket(USBx, ep->xfer_buff, (temp & USB_OTG_GRXSTSP_BCNT) >> 4U); + ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; + ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; + } + } + else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_SETUP_UPDT) + { + USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U); + ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; + } + USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); + + return HAL_OK; +} +// MBED PATCH + /** * @} */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.h b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.h index d5b8e1605b8..eeeaccf93d3 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.h +++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.h @@ -300,6 +300,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); +HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); // MBED PATCH uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.c b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.c index c114307b947..b610d025535 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.c +++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.c @@ -450,7 +450,8 @@ HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTy if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0U) { - USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U) |\ + // MBED PATCH + USBx_INEP(ep->num)->DIEPCTL = ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U) |\ ((ep->num) << 22U) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP)); } } @@ -460,7 +461,8 @@ HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTy if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0U) { - USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U) |\ + // MBED PATCH + USBx_OUTEP(ep->num)->DOEPCTL = ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U) |\ (USB_OTG_DIEPCTL_SD0PID_SEVNFRM)| (USB_OTG_DOEPCTL_USBAEP)); } } @@ -481,7 +483,8 @@ HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB { if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0U) { - USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U) |\ + // MBED PATCH + USBx_INEP(ep->num)->DIEPCTL = ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U) |\ ((ep->num) << 22U) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP)); } @@ -495,7 +498,8 @@ HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB { if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0U) { - USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U) |\ + // MBED PATCH + USBx_OUTEP(ep->num)->DOEPCTL = ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U) |\ ((ep->num) << 22U) | (USB_OTG_DOEPCTL_USBAEP)); debug = (uint32_t)(((uint32_t )USBx) + USB_OTG_OUT_ENDPOINT_BASE + (0U)*USB_OTG_EP_REG_SIZE); @@ -865,6 +869,174 @@ HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeD return HAL_OK; } +// MBED PATCH +/** + * @brief USB_EPStoptXfer : stop transfer on this endpoint + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @retval HAL status + * @note IN endpoints must have NAK enabled before calling this function + * @note OUT endpoints must have global out NAK enabled before calling this + * function. Furthermore, the RX fifo must be empty or the status + * HAL_BUSY will be returned. + */ +HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep) +{ + HAL_StatusTypeDef ret = HAL_OK; + uint32_t count = 0U; + uint32_t epint, fifoemptymsk; + + /* IN endpoint */ + if (ep->is_in == 1U) + { + + /* EP enable, IN data in FIFO */ + if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) + { + /* Disable this endpoint */ + USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_EPDIS; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_INEP(ep->num)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA); + } + + /* Clear transfer complete interrupt */ + epint = USB_ReadDevInEPInterrupt(USBx, ep->num); + if((epint & USB_OTG_DIEPINT_XFRC) == USB_OTG_DIEPINT_XFRC) + { + CLEAR_IN_EP_INTR(ep->num, USB_OTG_DIEPINT_XFRC); + } + + /* Mask fifo empty interrupt */ + fifoemptymsk = 0x1U << ep->num; + atomic_clr_u32(&USBx_DEVICE->DIEPEMPMSK, fifoemptymsk); + } + else /* OUT endpoint */ + { + if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) + { + /* Disable this endpoint */ + USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_EPDIS; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + if ((USBx->GINTSTS & USB_OTG_GINTSTS_RXFLVL) == USB_OTG_GINTSTS_RXFLVL) + { + /* Although not mentioned in the Reference Manual, it appears that the + * rx fifo must be empty for an OUT endpoint to be disabled. Typically + * this will happen when setting the global OUT nak (required by Reference + * Manual) as this requires processing the rx fifo. This is not guaranteed + * though, as a setup packet can arrive even while global OUT nak is set. + * + * During testing this event was observed and prevented endpoint disabling + * from completing until the rx fifo was empty. To address this problem + * return HAL_BUSY if the rx fifo is not empty to give higher level code + * a chance to clear the fifo and retry the operation. + * + */ + return HAL_BUSY; + } + } + while ((USBx_OUTEP(ep->num)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA); + } + + /* Clear interrupt */ + epint = USB_ReadDevOutEPInterrupt(USBx, ep->num); + if(( epint & USB_OTG_DOEPINT_XFRC) == USB_OTG_DOEPINT_XFRC) + { + CLEAR_OUT_EP_INTR(ep->num, USB_OTG_DOEPINT_XFRC); + } + } + return ret; +} + +/** + * @brief USB_EPSetNak : stop transfer and nak all tokens on this endpoint + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @retval HAL status + */ +HAL_StatusTypeDef USB_EPSetNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep) +{ + uint32_t count = 0; + if (ep->is_in == 1U) + { + USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_INEP(ep->num)->DIEPCTL & USB_OTG_DIEPCTL_NAKSTS) != USB_OTG_DIEPCTL_NAKSTS); + } + else + { + USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_OUTEP(ep->num)->DOEPCTL & USB_OTG_DOEPCTL_NAKSTS) != USB_OTG_DOEPCTL_NAKSTS); + } + return HAL_OK; +} + +/** + * @brief USB_EPSetNak : resume transfer and stop naking on this endpoint + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @retval HAL status + */ +HAL_StatusTypeDef USB_EPClearNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep) +{ + uint32_t count = 0; + if (ep->is_in == 1U) + { + USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_CNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_INEP(ep->num)->DIEPCTL & USB_OTG_DIEPCTL_NAKSTS) == USB_OTG_DIEPCTL_NAKSTS); + } + else + { + USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_OUTEP(ep->num)->DOEPCTL & USB_OTG_DOEPCTL_NAKSTS) == USB_OTG_DOEPCTL_NAKSTS); + } + return HAL_OK; +} +// MBED PATCH + /** * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated * with the EP/channel diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.h b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.h index 1048bee537b..34de08cc1af 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.h +++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.h @@ -416,6 +416,9 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EP HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); +HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); // MBED PATCH +HAL_StatusTypeDef USB_EPSetNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); // MBED PATCH +HAL_StatusTypeDef USB_EPClearNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); // MBED PATCH HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma); void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len); From f3f7a80f2aaa3b37bfb9e6af4d728da03e2ce106 Mon Sep 17 00:00:00 2001 From: bcostm Date: Tue, 30 Oct 2018 09:44:17 +0100 Subject: [PATCH 119/488] STM32F4 USB: remove useless macro --- usb/device/targets/TARGET_STM/USBPhy_STM32.cpp | 5 ----- 1 file changed, 5 deletions(-) diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 9f1c78d5419..c37720fb96f 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -24,11 +24,6 @@ #define USBSTM_HAL_UNSUPPORTED #endif -/* STM32F4 family without USB_STM_HAL use another HAL */ -#if defined(TARGET_STM) && defined(TARGET_STM32F4) && !defined(USB_STM_HAL) -#define USBSTM_HAL_UNSUPPORTED -#endif - #ifndef USBSTM_HAL_UNSUPPORTED #include "USBPhyHw.h" #include "pinmap.h" From c6b68a635153f0ceec9d301fcb2dddd9ce8c1cb1 Mon Sep 17 00:00:00 2001 From: bcostm Date: Tue, 30 Oct 2018 09:45:13 +0100 Subject: [PATCH 120/488] STM32F4 USB: enable USB Device in targets.json tests-usb_device-basic are OK on the following platforms: NUCLEO_F412ZG NUCLEO_F413ZH NUCLEO_F429ZI NUCLEO_F446ZE DISCO_F413ZH DISCO_F469NI --- targets/targets.json | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/targets/targets.json b/targets/targets.json index 3110700c1a2..f10137e6f08 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -1198,8 +1198,8 @@ } }, "detect_code": ["0826"], - "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], - "device_has_add": ["CAN", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"], + "macros_add": ["USBHOST_OTHER"], + "device_has_add": ["CAN", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH", "USBDEVICE"], "release_versions": ["2", "5"], "device_name": "STM32F412ZG", "bootloader_supported": true @@ -1283,8 +1283,8 @@ } }, "detect_code": ["0743"], - "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], - "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH", "QSPI"], + "macros_add": ["USBHOST_OTHER"], + "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH", "QSPI", "USBDEVICE"], "bootloader_supported": true, "release_versions": ["2", "5"], "device_name": "STM32F413ZH" @@ -1306,8 +1306,8 @@ } }, "detect_code": ["0743"], - "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], - "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"], + "macros_add": ["USBHOST_OTHER"], + "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH", "USBDEVICE"], "bootloader_supported": true, "release_versions": ["2", "5"], "device_name": "STM32F413ZH" @@ -1342,8 +1342,8 @@ } }, "extra_labels_add": ["STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx", "STM32F429xI", "STM_EMAC"], - "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], - "device_has_add": ["ANALOGOUT", "CAN", "EMAC", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"], + "macros_add": ["USBHOST_OTHER"], + "device_has_add": ["ANALOGOUT", "CAN", "EMAC", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH", "USBDEVICE"], "detect_code": ["0796"], "release_versions": ["2", "5"], "device_name": "STM32F429ZI", @@ -1411,8 +1411,8 @@ } }, "detect_code": ["0778"], - "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], - "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"], + "macros_add": ["USBHOST_OTHER"], + "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH", "USBDEVICE"], "release_versions": ["2", "5"], "device_name": "STM32F446ZE" }, @@ -1937,8 +1937,8 @@ } }, "detect_code": ["0788"], - "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], - "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_FC", "TRNG", "FLASH", "QSPI"], + "macros_add": ["USBHOST_OTHER"], + "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_FC", "TRNG", "FLASH", "QSPI", "USBDEVICE"], "release_versions": ["2", "5"], "device_name": "STM32F469NI" }, From f2df72078397c8305cd57c36046237f7186ce704 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Sun, 11 Nov 2018 19:31:46 -0500 Subject: [PATCH 121/488] Configured sdk for enabling USB. Preliminary implementation of USB for nRF52840 --- .../TARGET_MCU_NRF52840/config/sdk_config.h | 9 +- targets/targets.json | 3 +- .../TARGET_MCU_NRF52840/USBPhyHw.h | 102 +++++ .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 367 ++++++++++++++++++ 4 files changed, 478 insertions(+), 3 deletions(-) create mode 100644 usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h create mode 100644 usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h index 89031fe0ab8..23b77eb1c79 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h @@ -53,6 +53,11 @@ #define DEBUG_NRF_USER #endif +// SYSTICK_ENABLED +#ifndef SYSTICK_ENABLED +#define SYSTICK_ENABLED 1 +#endif + //========================================================== // BSP_BTN_BLE_ENABLED - bsp_btn_ble - Button Control for BLE @@ -2115,7 +2120,7 @@ // POWER_ENABLED - nrf_drv_power - POWER peripheral driver //========================================================== #ifndef POWER_ENABLED -#define POWER_ENABLED 0 +#define POWER_ENABLED 1 #endif // POWER_CONFIG_IRQ_PRIORITY - Interrupt priority @@ -3246,7 +3251,7 @@ // USBD_ENABLED - nrf_drv_usbd - USB driver //========================================================== #ifndef USBD_ENABLED -#define USBD_ENABLED 0 +#define USBD_ENABLED 1 #endif // USBD_CONFIG_IRQ_PRIORITY - Interrupt priority diff --git a/targets/targets.json b/targets/targets.json index f10137e6f08..b5fd751d986 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -3961,7 +3961,8 @@ "SYSTICK_CLK_OFF_DURING_SLEEP", "TRNG", "USTICKER", - "QSPI" + "QSPI", + "USBDEVICE" ], "extra_labels": [ "NORDIC", diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h new file mode 100644 index 00000000000..712da93d7c9 --- /dev/null +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h @@ -0,0 +1,102 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBPHYHW_H +#define USBPHYHW_H + +#include "mbed.h" +#include "USBPhy.h" + +extern "C" { + #include "nrf_drv_usbd.h" + #include "nrf_drv_power.h" +} + +class USBPhyHw : public USBPhy { +public: + USBPhyHw(); + virtual ~USBPhyHw(); + virtual void init(USBPhyEvents *events); + virtual void deinit(); + virtual bool powered(); + virtual void connect(); + virtual void disconnect(); + virtual void configure(); + virtual void unconfigure(); + virtual void sof_enable(); + virtual void sof_disable(); + virtual void set_address(uint8_t address); + virtual void remote_wakeup(); + virtual const usb_ep_table_t* endpoint_table(); + + virtual uint32_t ep0_set_max_packet(uint32_t max_packet); + virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_read(uint8_t *data, uint32_t size); + virtual uint32_t ep0_read_result(); + virtual void ep0_write(uint8_t *buffer, uint32_t size); + virtual void ep0_stall(); + + virtual bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type); + virtual void endpoint_remove(usb_ep_t endpoint); + virtual void endpoint_stall(usb_ep_t endpoint); + virtual void endpoint_unstall(usb_ep_t endpoint); + + virtual bool endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual uint32_t endpoint_read_result(usb_ep_t endpoint); + virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual void endpoint_abort(usb_ep_t endpoint); + + virtual void process(); + + static void _usb_event_handler(nrf_drv_usbd_evt_t const * const p_event); + static void _usb_power_event_handler(nrf_drv_power_usb_evt_t event); + +private: + USBPhyEvents *events; + + bool sof_enabled; + bool connect_enabled; + + typedef enum usb_hw_event_type_t { + USB_HW_EVENT_NONE = 0, + USB_HW_EVENT_USBD = 1, + USB_HW_EVENT_POWER = 2 + } usb_hw_event_type_t; + + // Event type to process + usb_hw_event_type_t usb_event_type; + + // USB event buffer + nrf_drv_usbd_evt_t usb_event; + + // USB power event buffer + nrf_drv_power_usb_evt_t usb_power_event; + + // Buffer to hold setup packet + nrf_drv_usbd_setup_t setup_buf; + + // Nordic transfer structures for each in/out endpoint + nrf_drv_usbd_transfer_t transfer_buf[18]; + + // Returns the appropraite transfer structure buffer for the given endpoint + nrf_drv_usbd_transfer_t* get_transfer_buffer(usb_ep_t endpoint); + + // Returns the corresponding enumeration given an mbed endpoint number + static nrf_drv_usbd_ep_t get_nordic_endpoint(usb_ep_t endpoint); + +}; + +#endif diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp new file mode 100644 index 00000000000..6636e2a635a --- /dev/null +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -0,0 +1,367 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "USBPhyHw.h" + +#define MAX_PACKET_SIZE_SETUP NRF_DRV_USBD_EPSIZE +#define MAX_PACKET_NON_ISO NRF_DRV_USBD_EPSIZE +#define MAX_PACKET_ISO NRF_DRV_USBD_ISOSIZE +#define ENDPOINT_NON_ISO (USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_ALLOW_INT) + +#define IS_IN_EP(ep) (ep & 0x80) // Checks if the given endpoint is an IN endpoint (MSB set) +#define IS_OUT_EP(ep) (ep & ~0x80) // Checks if the given endpoint is an OUT endpoint (MSB clear) + +static USBPhyHw *instance; + +static void usbd_event_handler(nrf_drv_usbd_evt_t const * const p_event); +static void power_usb_event_handler(nrf_drv_power_usb_evt_t event); + +USBPhy *get_usb_phy() { + static USBPhyHw usbphy; + return &usbphy; +} + +USBPhyHw::USBPhyHw() : + events(NULL), sof_enabled(false), + connect_enabled(false), + usb_event_type(USB_HW_EVENT_NONE), + usb_power_event(NRF_DRV_POWER_USB_EVT_REMOVED) { + +} + +USBPhyHw::~USBPhyHw() { + +} + +void USBPhyHw::init(USBPhyEvents *events) { + // Disable IRQ + //NVIC_DisableIRQ(USBD_IRQn); + + this->events = events; + + ret_code_t ret; + + // Initialize power module to track USB Power events + ret = nrf_drv_power_init(NULL); + APP_ERROR_CHECK(ret); + + // Register callback for USB Power events + static const nrf_drv_power_usbevt_config_t config = { .handler = + power_usb_event_handler }; + ret = nrf_drv_power_usbevt_init(&config); + APP_ERROR_CHECK(ret); + + // Initialize USB Device driver + ret = nrf_drv_usbd_init(usbd_event_handler); + APP_ERROR_CHECK(ret); + + instance = this; + + // Enable IRQ + //NVIC_SetVector(USBD_IRQn, (uint32_t)&_usbisr); + //NVIC_EnableIRQ(USBD_IRQn); +} + +void USBPhyHw::deinit() { + // Disconnect and disable interrupt + disconnect(); + // Disable the USB Device driver + ret_code_t ret = nrf_drv_usbd_uninit(); + APP_ERROR_CHECK(ret); + //NVIC_DisableIRQ(USBD_IRQn); +} + +bool USBPhyHw::powered() { + if (nrf_drv_power_usbstatus_get() == NRF_DRV_POWER_USB_STATE_CONNECTED + || nrf_drv_power_usbstatus_get() == NRF_DRV_POWER_USB_STATE_READY) + return true; + else + return false; +} + +void USBPhyHw::connect() { + connect_enabled = true; + //nrf_drv_usbd_start(true); +} + +void USBPhyHw::disconnect() { + connect_enabled = false; + //nrf_drv_usbd_stop(); +} + +void USBPhyHw::configure() { + // Not needed +} + +void USBPhyHw::unconfigure() { + // Not needed +} + +void USBPhyHw::sof_enable() { + // TODO - Enable SOF interrupt + // Can this safely be done if + // nrf_drv_usbd_start is called with SoF enabled? + sof_enabled = true; +} + +void USBPhyHw::sof_disable() { + // TODO - Disable SOF interrupt + // Can this safely be done if + // nrf_drv_usbd_start is called with SoF enabled? + sof_enabled = false; +} + +void USBPhyHw::set_address(uint8_t address) { + // nothing to do, handled by hardware; but don't STALL +} + +void USBPhyHw::remote_wakeup() { + // Not supported(?) +} + +const usb_ep_table_t *USBPhyHw::endpoint_table() { + + static const usb_ep_table_t template_table = + { + 1536, // 64 bytes per bulk/int endpoint pair (8), 1023 bytes for iso endpoint pair (1) + { + { USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { 0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { 0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { 0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { 0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { 0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { 0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { 0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + } + }; + return &template_table; +} + +uint32_t USBPhyHw::ep0_set_max_packet(uint32_t max_packet) { + if (max_packet > MAX_PACKET_SIZE_SETUP) + max_packet = MAX_PACKET_SIZE_SETUP; + + nrf_drv_usbd_ep_max_packet_size_set(NRF_DRV_USBD_EPOUT0, max_packet); + nrf_drv_usbd_ep_max_packet_size_set(NRF_DRV_USBD_EPIN0, max_packet); + return max_packet; +} + +// read setup packet +void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) { + if (size > sizeof(this->setup_buf)) { + size = sizeof(this->setup_buf); + } + memcpy(buffer, &this->setup_buf, size); +} + +void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) { + nrf_drv_usbd_transfer_t* transfer = get_transfer_buffer((usb_ep_t)(NRF_DRV_USBD_EPOUT0)); + memset(transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); + transfer->p_data.rx = data; + transfer->size = size; + nrf_drv_usbd_ep_transfer(NRF_DRV_USBD_EPOUT0, transfer); +} + +uint32_t USBPhyHw::ep0_read_result() { + return nrf_drv_usbd_epout_size_get(NRF_DRV_USBD_EPOUT0); +} + +void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) { + nrf_drv_usbd_transfer_t* transfer = get_transfer_buffer((usb_ep_t)(NRF_DRV_USBD_EPIN0)); + memset(transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); + transfer->p_data.tx = buffer; + transfer->size = size; + nrf_drv_usbd_ep_transfer(NRF_DRV_USBD_EPIN0, transfer); +} + +void USBPhyHw::ep0_stall() { + // Note: This stall must be automatically cleared by the next setup packet + // TODO: Check if this is actually happening + nrf_drv_usbd_setup_stall(); +} + +bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type) { + nrf_drv_usbd_ep_t nrf_ep = get_nordic_endpoint(endpoint); + nrf_drv_usbd_ep_enable(nrf_ep); + nrf_drv_usbd_ep_max_packet_size_set(nrf_ep, max_packet); + return nrf_drv_usbd_ep_enable_check(nrf_ep); +} + +void USBPhyHw::endpoint_remove(usb_ep_t endpoint) { + nrf_drv_usbd_ep_t nrf_ep = get_nordic_endpoint(endpoint); + nrf_drv_usbd_ep_disable(nrf_ep); +} + +void USBPhyHw::endpoint_stall(usb_ep_t endpoint) { + nrf_drv_usbd_ep_stall(get_nordic_endpoint(endpoint)); +} + +void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) { + nrf_drv_usbd_ep_stall_clear(get_nordic_endpoint(endpoint)); +} + +bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) { + nrf_drv_usbd_transfer_t* transfer = get_transfer_buffer(endpoint); + memset(transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); + transfer->p_data.rx = data; + transfer->size = size; + ret_code_t ret = nrf_drv_usbd_ep_transfer(get_nordic_endpoint(endpoint), transfer); + return (ret == NRF_SUCCESS); +} + +uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) { + return nrf_drv_usbd_epout_size_get(get_nordic_endpoint(endpoint)); +} + +bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) { + nrf_drv_usbd_transfer_t* transfer = get_transfer_buffer(endpoint); + memset(transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); + transfer->p_data.tx = data; + transfer->size = size; + ret_code_t ret = nrf_drv_usbd_ep_transfer(get_nordic_endpoint(endpoint), transfer); + return (ret == NRF_SUCCESS); +} + +void USBPhyHw::endpoint_abort(usb_ep_t endpoint) { + nrf_drv_usbd_ep_abort(get_nordic_endpoint(endpoint)); +} + +void USBPhyHw::process() { + // No valid event to process + if (usb_event_type == USB_HW_EVENT_NONE) + return; + else if (usb_event_type == USB_HW_EVENT_USBD) { + // Process regular USBD events + switch (usb_event.type) { + case NRF_DRV_USBD_EVT_SUSPEND: + events->suspend(true); + break; + case NRF_DRV_USBD_EVT_RESUME: + events->suspend(false); + break; + case NRF_DRV_USBD_EVT_WUREQ: + break; + case NRF_DRV_USBD_EVT_RESET: + events->reset(); + break; + case NRF_DRV_USBD_EVT_SOF: + if(sof_enabled) + events->sof(nrf_usbd_framecntr_get()); + break; + case NRF_DRV_USBD_EVT_EPTRANSFER: + if(usb_event.data.eptransfer.status == NRF_USBD_EP_OK) + { + if(IS_IN_EP(usb_event.data.eptransfer.ep)) + { + if((usb_event.data.eptransfer.ep & 0x7F) == 0) + events->ep0_in(); + else + events->in((usb_ep_t) usb_event.data.eptransfer.ep); + } + else + { + if((usb_event.data.eptransfer.ep & 0x7F) == 0) + events->ep0_out(); + else + events->out((usb_ep_t) usb_event.data.eptransfer.ep); + } + } + break; + case NRF_DRV_USBD_EVT_SETUP: { + // Copy the setup packet into the internal buffer + nrf_drv_usbd_setup_get(&setup_buf); + events->ep0_setup(); + } + break; + default: + break; + + // Re-enable interrupt + //NVIC_ClearPendingIRQ(USB_IRQn); + //NVIC_EnableIRQ(USB_IRQn); + } + } + else if (usb_event_type == USB_HW_EVENT_POWER) + { + // Process USB power-related events + switch (usb_power_event) { + case NRF_DRV_POWER_USB_EVT_DETECTED: + events->power(true); + break; + case NRF_DRV_POWER_USB_EVT_REMOVED: + events->power(false); + break; + case NRF_DRV_POWER_USB_EVT_READY: + break; + default: + ASSERT(false) + ; + } + } + + // Unflag the event type + usb_event_type = USB_HW_EVENT_NONE; + +} + +void USBPhyHw::_usb_event_handler( + nrf_drv_usbd_evt_t const * const p_event) { + // Copy the event data into internal memory + memcpy(&instance->usb_event, p_event, sizeof(instance->usb_event)); + // Tell the upper layers of the stack to process the event + instance->usb_event_type = USB_HW_EVENT_USBD; + instance->events->start_process(); +} + +void USBPhyHw::_usb_power_event_handler(nrf_drv_power_usb_evt_t event) { + // Copy the event data into internal memory + instance->usb_power_event = event; + // Tell the upper layers of the stack to process the event + instance->usb_event_type = USB_HW_EVENT_POWER; + instance->events->start_process(); +} + +nrf_drv_usbd_transfer_t* USBPhyHw::get_transfer_buffer(usb_ep_t endpoint) { + // Index is base endpoint number * 2 (output), add 1 for input endpoints + return &transfer_buf[(((endpoint & 0x7F) << 1) + ((endpoint & 0x80) >> 7))]; +} + +nrf_drv_usbd_ep_t USBPhyHw::get_nordic_endpoint(usb_ep_t endpoint) { + // Clear the most-significant-bit (input endpoint flag) + uint8_t endpoint_num = (endpoint & ~(0x80)); + // Make sure it's within the valid endpoint range + ASSERT(((0 <= endpoint_num) && (endpoint_num <= 8))); + return (nrf_drv_usbd_ep_t) endpoint; +} + +static void power_usb_event_handler(nrf_drv_power_usb_evt_t event) { + // Pass the event on to the USBPhyHW instance + instance->_usb_power_event_handler(event); +} + +static void usbd_event_handler(nrf_drv_usbd_evt_t const * const p_event) { + // Pass the event on to the USBPhyHW instance + instance->_usb_event_handler(p_event); +} From efd611ad29b2f00c7c7f79ae1a9a979577da20e8 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Sun, 11 Nov 2018 20:00:19 -0500 Subject: [PATCH 122/488] Changed power handler to enable/start & disable/stop USBD driver in background --- .../TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index 6636e2a635a..dcf1c0d6c4e 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -308,12 +308,20 @@ void USBPhyHw::process() { // Process USB power-related events switch (usb_power_event) { case NRF_DRV_POWER_USB_EVT_DETECTED: + if(!nrf_drv_usbd_is_enabled()) + nrf_drv_usbd_enable(); events->power(true); break; case NRF_DRV_POWER_USB_EVT_REMOVED: events->power(false); + if(nrf_drv_usbd_is_started()) + nrf_drv_usbd_stop(); + if(nrf_drv_usbd_is_enabled()) + nrf_drv_usbd_disable(); break; case NRF_DRV_POWER_USB_EVT_READY: + if(!nrf_drv_usbd_is_started() && connect_enabled) + nrf_drv_usbd_start(true); break; default: ASSERT(false) From 85b536dda9e05ae35bd6bc34fe0fc2c0763f2e3c Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Sun, 11 Nov 2018 20:16:04 -0500 Subject: [PATCH 123/488] Changed driver to request hf and lf clock sources... not sure why USB Ready event isn't ever getting triggered --- .../TARGET_MCU_NRF52840/USBPhyHw.h | 1 - .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 41 ++++++++++++------- 2 files changed, 26 insertions(+), 16 deletions(-) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h index 712da93d7c9..1e62ab146e4 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h @@ -68,7 +68,6 @@ class USBPhyHw : public USBPhy { USBPhyEvents *events; bool sof_enabled; - bool connect_enabled; typedef enum usb_hw_event_type_t { USB_HW_EVENT_NONE = 0, diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index dcf1c0d6c4e..f662d3771d5 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -16,6 +16,8 @@ #include "USBPhyHw.h" +#include "nrf_drv_clock.h" + #define MAX_PACKET_SIZE_SETUP NRF_DRV_USBD_EPSIZE #define MAX_PACKET_NON_ISO NRF_DRV_USBD_EPSIZE #define MAX_PACKET_ISO NRF_DRV_USBD_ISOSIZE @@ -36,7 +38,6 @@ USBPhy *get_usb_phy() { USBPhyHw::USBPhyHw() : events(NULL), sof_enabled(false), - connect_enabled(false), usb_event_type(USB_HW_EVENT_NONE), usb_power_event(NRF_DRV_POWER_USB_EVT_REMOVED) { @@ -93,13 +94,32 @@ bool USBPhyHw::powered() { } void USBPhyHw::connect() { - connect_enabled = true; - //nrf_drv_usbd_start(true); + + nrf_drv_clock_init(); + nrf_drv_clock_hfclk_request(NULL); + nrf_drv_clock_lfclk_request(NULL); + + while (!(nrf_drv_clock_hfclk_is_running() && + nrf_drv_clock_lfclk_is_running())){ + /* Just waiting */ + } + + if(!nrf_drv_usbd_is_enabled()) + nrf_drv_usbd_enable(); + if(!nrf_drv_usbd_is_started()) + nrf_drv_usbd_start(true); } void USBPhyHw::disconnect() { - connect_enabled = false; - //nrf_drv_usbd_stop(); + + if(nrf_drv_usbd_is_started()) + nrf_drv_usbd_stop(); + if(nrf_drv_usbd_is_enabled()) + nrf_drv_usbd_disable(); + + nrf_drv_clock_hfclk_release(); + nrf_drv_clock_lfclk_release(); + //nrf_drv_clock_uninit(); // Should this be called? What if other peripherals are using it? } void USBPhyHw::configure() { @@ -308,24 +328,15 @@ void USBPhyHw::process() { // Process USB power-related events switch (usb_power_event) { case NRF_DRV_POWER_USB_EVT_DETECTED: - if(!nrf_drv_usbd_is_enabled()) - nrf_drv_usbd_enable(); events->power(true); break; case NRF_DRV_POWER_USB_EVT_REMOVED: events->power(false); - if(nrf_drv_usbd_is_started()) - nrf_drv_usbd_stop(); - if(nrf_drv_usbd_is_enabled()) - nrf_drv_usbd_disable(); break; case NRF_DRV_POWER_USB_EVT_READY: - if(!nrf_drv_usbd_is_started() && connect_enabled) - nrf_drv_usbd_start(true); break; default: - ASSERT(false) - ; + ASSERT(false); } } From 994a17e355d8d04c661ebb3d3137b4fc9a16772b Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Sun, 11 Nov 2018 23:14:25 -0500 Subject: [PATCH 124/488] Added errata fixes (171, 187) from nRF SDK 15.2 that would prevent USBD from starting up --- .../drivers_nrf/usbd/nrf_drv_usbd.c | 44 +++++++++++++++++++ .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 41 +++++++++-------- 2 files changed, 66 insertions(+), 19 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c index 3b6a151d7a1..85190c8ff57 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c @@ -1700,6 +1700,35 @@ void nrf_drv_usbd_enable(void) /* Prepare for READY event receiving */ nrf_usbd_eventcause_clear(NRF_USBD_EVENTCAUSE_READY_MASK); + + // Errata 187 + CRITICAL_REGION_ENTER(); + if (*((volatile uint32_t *)(0x4006EC00)) == 0x00000000) + { + *((volatile uint32_t *)(0x4006EC00)) = 0x00009375; + *((volatile uint32_t *)(0x4006ED14)) = 0x00000003; + *((volatile uint32_t *)(0x4006EC00)) = 0x00009375; + } + else + { + *((volatile uint32_t *)(0x4006ED14)) = 0x00000003; + } + CRITICAL_REGION_EXIT(); + + // Errata 171 + CRITICAL_REGION_ENTER(); + if (*((volatile uint32_t *)(0x4006EC00)) == 0x00000000) + { + *((volatile uint32_t *)(0x4006EC00)) = 0x00009375; + *((volatile uint32_t *)(0x4006ED14)) = 0x00000003; + *((volatile uint32_t *)(0x4006EC00)) = 0x00009375; + } + else + { + *((volatile uint32_t *)(0x4006ED14)) = 0x00000003; + } + CRITICAL_REGION_EXIT(); + /* Enable the peripheral */ nrf_usbd_enable(); /* Waiting for peripheral to enable, this should take a few us */ @@ -1709,6 +1738,21 @@ void nrf_drv_usbd_enable(void) } nrf_usbd_eventcause_clear(NRF_USBD_EVENTCAUSE_READY_MASK); + // Errata 171 + CRITICAL_REGION_ENTER(); + if (*((volatile uint32_t *)(0x4006EC00)) == 0x00000000) + { + *((volatile uint32_t *)(0x4006EC00)) = 0x00009375; + *((volatile uint32_t *)(0x4006EC14)) = 0x00000000; + *((volatile uint32_t *)(0x4006EC00)) = 0x00009375; + } + else + { + *((volatile uint32_t *)(0x4006EC14)) = 0x00000000; + } + + CRITICAL_REGION_EXIT(); + if (nrf_drv_usbd_errata_166()) { *((volatile uint32_t *)(NRF_USBD_BASE + 0x800)) = 0x7E3; diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index f662d3771d5..a383c2a209c 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -16,7 +16,7 @@ #include "USBPhyHw.h" -#include "nrf_drv_clock.h" +#include "nrf_clock.h" #define MAX_PACKET_SIZE_SETUP NRF_DRV_USBD_EPSIZE #define MAX_PACKET_NON_ISO NRF_DRV_USBD_EPSIZE @@ -26,6 +26,9 @@ #define IS_IN_EP(ep) (ep & 0x80) // Checks if the given endpoint is an IN endpoint (MSB set) #define IS_OUT_EP(ep) (ep & ~0x80) // Checks if the given endpoint is an OUT endpoint (MSB clear) +// Nordic USBD driver IRQ handler +extern "C" void USBD_IRQHandler(void); + static USBPhyHw *instance; static void usbd_event_handler(nrf_drv_usbd_evt_t const * const p_event); @@ -59,6 +62,11 @@ void USBPhyHw::init(USBPhyEvents *events) { ret = nrf_drv_power_init(NULL); APP_ERROR_CHECK(ret); + /* Configure selected size of the packed on EP0 */ + nrf_drv_usbd_ep_max_packet_size_set(NRF_DRV_USBD_EPOUT0, MAX_PACKET_SIZE_SETUP); + nrf_drv_usbd_ep_max_packet_size_set(NRF_DRV_USBD_EPIN0, MAX_PACKET_SIZE_SETUP); + + // Register callback for USB Power events static const nrf_drv_power_usbevt_config_t config = { .handler = power_usb_event_handler }; @@ -72,8 +80,9 @@ void USBPhyHw::init(USBPhyEvents *events) { instance = this; // Enable IRQ - //NVIC_SetVector(USBD_IRQn, (uint32_t)&_usbisr); - //NVIC_EnableIRQ(USBD_IRQn); + NVIC_SetVector(USBD_IRQn, (uint32_t)USBD_IRQHandler); + NVIC_SetPriority(USBD_IRQn, 6); + NVIC_EnableIRQ(USBD_IRQn); } void USBPhyHw::deinit() { @@ -95,31 +104,17 @@ bool USBPhyHw::powered() { void USBPhyHw::connect() { - nrf_drv_clock_init(); - nrf_drv_clock_hfclk_request(NULL); - nrf_drv_clock_lfclk_request(NULL); - - while (!(nrf_drv_clock_hfclk_is_running() && - nrf_drv_clock_lfclk_is_running())){ - /* Just waiting */ - } - - if(!nrf_drv_usbd_is_enabled()) + /*if(!nrf_drv_usbd_is_enabled()) nrf_drv_usbd_enable(); if(!nrf_drv_usbd_is_started()) - nrf_drv_usbd_start(true); + nrf_drv_usbd_start(true);*/ } void USBPhyHw::disconnect() { - if(nrf_drv_usbd_is_started()) nrf_drv_usbd_stop(); if(nrf_drv_usbd_is_enabled()) nrf_drv_usbd_disable(); - - nrf_drv_clock_hfclk_release(); - nrf_drv_clock_lfclk_release(); - //nrf_drv_clock_uninit(); // Should this be called? What if other peripherals are using it? } void USBPhyHw::configure() { @@ -328,12 +323,16 @@ void USBPhyHw::process() { // Process USB power-related events switch (usb_power_event) { case NRF_DRV_POWER_USB_EVT_DETECTED: + if(!nrf_drv_usbd_is_enabled()) + nrf_drv_usbd_enable(); events->power(true); break; case NRF_DRV_POWER_USB_EVT_REMOVED: events->power(false); break; case NRF_DRV_POWER_USB_EVT_READY: + if(!nrf_drv_usbd_is_started()) + nrf_drv_usbd_start(true); break; default: ASSERT(false); @@ -384,3 +383,7 @@ static void usbd_event_handler(nrf_drv_usbd_evt_t const * const p_event) { // Pass the event on to the USBPhyHW instance instance->_usb_event_handler(p_event); } + +extern "C" { +void USBD_IRQHandler_v(void) { } +} From 62cd187523aeebeb2b6ae4b29a974462d1f5fd7e Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Thu, 29 Nov 2018 00:17:05 -0500 Subject: [PATCH 125/488] working on making the mbed and nordic drivers compatible --- .../TARGET_MCU_NRF52840/USBPhyHw.h | 6 + .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 157 +++++++++++++++--- 2 files changed, 142 insertions(+), 21 deletions(-) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h index 1e62ab146e4..75e5ea6f338 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h @@ -68,6 +68,7 @@ class USBPhyHw : public USBPhy { USBPhyEvents *events; bool sof_enabled; + bool connect_enabled; typedef enum usb_hw_event_type_t { USB_HW_EVENT_NONE = 0, @@ -96,6 +97,11 @@ class USBPhyHw : public USBPhy { // Returns the corresponding enumeration given an mbed endpoint number static nrf_drv_usbd_ep_t get_nordic_endpoint(usb_ep_t endpoint); + void _reset(void); + + static void enable_usb_interrupts(void); + static void disable_usb_interrupts(void); + }; #endif diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index a383c2a209c..0d3816e9bd6 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -26,21 +26,32 @@ #define IS_IN_EP(ep) (ep & 0x80) // Checks if the given endpoint is an IN endpoint (MSB set) #define IS_OUT_EP(ep) (ep & ~0x80) // Checks if the given endpoint is an OUT endpoint (MSB clear) +// Debugging flag for tracking USB events +#define USBD_DEBUG 1 + // Nordic USBD driver IRQ handler extern "C" void USBD_IRQHandler(void); -static USBPhyHw *instance; +static USBPhyHw *instance = 0; static void usbd_event_handler(nrf_drv_usbd_evt_t const * const p_event); static void power_usb_event_handler(nrf_drv_power_usb_evt_t event); +#if USBD_DEBUG + +// Static array of saved events to track what happens +static nrf_drv_usbd_evt_t debug_events[32]; +static uint8_t debug_evt_index = 0; + +#endif + USBPhy *get_usb_phy() { static USBPhyHw usbphy; return &usbphy; } USBPhyHw::USBPhyHw() : - events(NULL), sof_enabled(false), + events(NULL), sof_enabled(false), connect_enabled(false), usb_event_type(USB_HW_EVENT_NONE), usb_power_event(NRF_DRV_POWER_USB_EVT_REMOVED) { @@ -77,11 +88,12 @@ void USBPhyHw::init(USBPhyEvents *events) { ret = nrf_drv_usbd_init(usbd_event_handler); APP_ERROR_CHECK(ret); + // Store a reference to this instance instance = this; // Enable IRQ NVIC_SetVector(USBD_IRQn, (uint32_t)USBD_IRQHandler); - NVIC_SetPriority(USBD_IRQn, 6); + NVIC_SetPriority(USBD_IRQn, 7); NVIC_EnableIRQ(USBD_IRQn); } @@ -91,7 +103,10 @@ void USBPhyHw::deinit() { // Disable the USB Device driver ret_code_t ret = nrf_drv_usbd_uninit(); APP_ERROR_CHECK(ret); - //NVIC_DisableIRQ(USBD_IRQn); + NVIC_DisableIRQ(USBD_IRQn); + + // Clear the instance pointer? + //instance = 0; } bool USBPhyHw::powered() { @@ -104,13 +119,27 @@ bool USBPhyHw::powered() { void USBPhyHw::connect() { - /*if(!nrf_drv_usbd_is_enabled()) - nrf_drv_usbd_enable(); - if(!nrf_drv_usbd_is_started()) - nrf_drv_usbd_start(true);*/ + // To save power, we only enable the USBD peripheral + // when there's actually VBUS detected + + // So flag that the USB stack is ready to connect + this->connect_enabled = true; + + // If VBUS is already available, enable immediately + if(nrf_drv_power_usbstatus_get() == NRF_DRV_POWER_USB_STATE_CONNECTED) + { + // Enabling USB will cause NRF_DRV_POWER_USB_EVT_READY + // to occur, which will start the USBD peripheral + // when the internal regulator has settled + if(!nrf_drv_usbd_is_enabled()) + nrf_drv_usbd_enable(); + } } void USBPhyHw::disconnect() { + + this->connect_enabled = false; + if(nrf_drv_usbd_is_started()) nrf_drv_usbd_stop(); if(nrf_drv_usbd_is_enabled()) @@ -268,6 +297,15 @@ void USBPhyHw::process() { if (usb_event_type == USB_HW_EVENT_NONE) return; else if (usb_event_type == USB_HW_EVENT_USBD) { + +#ifdef USBD_DEBUG + // Save this event to the static log + memcpy(&debug_events[debug_evt_index++], &usb_event, sizeof(nrf_drv_usbd_evt_t)); + // Reset index if we overflow the buffer + if(debug_evt_index >= 32) + debug_evt_index = 0; +#endif + // Process regular USBD events switch (usb_event.type) { case NRF_DRV_USBD_EVT_SUSPEND: @@ -279,6 +317,7 @@ void USBPhyHw::process() { case NRF_DRV_USBD_EVT_WUREQ: break; case NRF_DRV_USBD_EVT_RESET: + this->_reset(); events->reset(); break; case NRF_DRV_USBD_EVT_SOF: @@ -298,13 +337,29 @@ void USBPhyHw::process() { else { if((usb_event.data.eptransfer.ep & 0x7F) == 0) + { + /* NOTE: Data values or size may be tested here to decide if clear or stall. + * If errata 154 is present the data transfer is acknowledged by the hardware. */ + if (!nrf_drv_usbd_errata_154()) { + /* Transfer ok - allow status stage */ + nrf_drv_usbd_setup_clear(); + } + events->ep0_out(); + } else events->out((usb_ep_t) usb_event.data.eptransfer.ep); } } break; case NRF_DRV_USBD_EVT_SETUP: { + + // Clear endpoint 0 stalls on setup packet receive + if(nrf_drv_usbd_ep_stall_check(NRF_DRV_USBD_EPOUT0)) + nrf_drv_usbd_ep_stall_clear(NRF_DRV_USBD_EPOUT0); + if(nrf_drv_usbd_ep_stall_check(NRF_DRV_USBD_EPIN0)) + nrf_drv_usbd_ep_stall_clear(NRF_DRV_USBD_EPIN0); + // Copy the setup packet into the internal buffer nrf_drv_usbd_setup_get(&setup_buf); events->ep0_setup(); @@ -313,9 +368,6 @@ void USBPhyHw::process() { default: break; - // Re-enable interrupt - //NVIC_ClearPendingIRQ(USB_IRQn); - //NVIC_EnableIRQ(USB_IRQn); } } else if (usb_event_type == USB_HW_EVENT_POWER) @@ -323,16 +375,20 @@ void USBPhyHw::process() { // Process USB power-related events switch (usb_power_event) { case NRF_DRV_POWER_USB_EVT_DETECTED: - if(!nrf_drv_usbd_is_enabled()) - nrf_drv_usbd_enable(); - events->power(true); + if(this->connect_enabled) { + if(!nrf_drv_usbd_is_enabled()) + nrf_drv_usbd_enable(); + events->power(true); + } break; case NRF_DRV_POWER_USB_EVT_REMOVED: events->power(false); break; case NRF_DRV_POWER_USB_EVT_READY: - if(!nrf_drv_usbd_is_started()) - nrf_drv_usbd_start(true); + if(this->connect_enabled) { + if(!nrf_drv_usbd_is_started()) + nrf_drv_usbd_start(false);//nrf_drv_usbd_start(true); + } break; default: ASSERT(false); @@ -342,10 +398,14 @@ void USBPhyHw::process() { // Unflag the event type usb_event_type = USB_HW_EVENT_NONE; + // Re-enable interrupt + NVIC_ClearPendingIRQ(USBD_IRQn); + enable_usb_interrupts(); } void USBPhyHw::_usb_event_handler( nrf_drv_usbd_evt_t const * const p_event) { + disable_usb_interrupts(); // Copy the event data into internal memory memcpy(&instance->usb_event, p_event, sizeof(instance->usb_event)); // Tell the upper layers of the stack to process the event @@ -354,6 +414,7 @@ void USBPhyHw::_usb_event_handler( } void USBPhyHw::_usb_power_event_handler(nrf_drv_power_usb_evt_t event) { + disable_usb_interrupts(); // Copy the event data into internal memory instance->usb_power_event = event; // Tell the upper layers of the stack to process the event @@ -374,16 +435,70 @@ nrf_drv_usbd_ep_t USBPhyHw::get_nordic_endpoint(usb_ep_t endpoint) { return (nrf_drv_usbd_ep_t) endpoint; } +void USBPhyHw::_reset(void) +{ + // Disable all endpoints except for control endpoints + nrf_drv_usbd_ep_default_config(); + + // TODO - Clear all endpoint interrupts? +} + +void USBPhyHw::enable_usb_interrupts(void) { + // Enable USB and USB-related power interrupts + NVIC_EnableIRQ(USBD_IRQn); + nrf_power_int_enable(NRF_POWER_INT_USBDETECTED_MASK | + NRF_POWER_INT_USBREMOVED_MASK | + NRF_POWER_INT_USBPWRRDY_MASK); +} + +void USBPhyHw::disable_usb_interrupts(void) { + // Disable USB and USB-related power interrupts + NVIC_DisableIRQ(USBD_IRQn); + nrf_power_int_disable(NRF_POWER_INT_USBDETECTED_MASK | + NRF_POWER_INT_USBREMOVED_MASK | + NRF_POWER_INT_USBPWRRDY_MASK); +} + static void power_usb_event_handler(nrf_drv_power_usb_evt_t event) { - // Pass the event on to the USBPhyHW instance - instance->_usb_power_event_handler(event); + if(instance) { + // Pass the event on to the USBPhyHW instance + instance->_usb_power_event_handler(event); + } } static void usbd_event_handler(nrf_drv_usbd_evt_t const * const p_event) { - // Pass the event on to the USBPhyHW instance - instance->_usb_event_handler(p_event); + if(instance) { + NVIC_DisableIRQ(USBD_IRQn); + // Pass the event on to the USBPhyHW instance + instance->_usb_event_handler(p_event); + } } extern "C" { -void USBD_IRQHandler_v(void) { } + + /** + * @brief Feeder passing data between mbed and nordic USB stacks + * + * @param[out] p_next See @ref nrf_drv_usbd_feeder_t documentation. + * @param[in,out] p_context See @ref nrf_drv_usbd_feeder_t documentation. + * @param[in] ep_size See @ref nrf_drv_usbd_feeder_t documentation. + * + * @retval true Continue transfer. + * @retval false This was the last transfer. + */ + bool mbed_nrf_feeder(nrf_drv_usbd_ep_transfer_t * p_next, + void * p_context, + size_t ep_size) + { + + + // We don't know if this is the last transfer or not at this level -- mbed doesn't tell us... + // So just tell the nordic layer that the transfer isn't over yet (so don't NAK/STALL) + return true; + } + } + +//extern "C" { +//void USBD_IRQHandler_v(void) { } +//} From 1fb830ae019a4f84f4b8f5fc2c299db94041e7f8 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 7 Feb 2018 16:32:43 -0600 Subject: [PATCH 126/488] Add USBPhy, USB HAL and Utility class Add the USBPhy and USBPhyEvents abstract classes, the HAL header using this class and the EndpointResolver utility class. --- hal/mbed_usb_phy.cpp | 29 +++ hal/usb_phy_api.h | 36 +++ platform/USBPhy.h | 302 ++++++++++++++++++++++ platform/USBPhyEvents.h | 107 ++++++++ platform/USBPhyTypes.h | 58 +++++ usb/device/USBDevice/EndpointResolver.cpp | 136 ++++++++++ usb/device/USBDevice/EndpointResolver.h | 89 +++++++ 7 files changed, 757 insertions(+) create mode 100644 hal/mbed_usb_phy.cpp create mode 100644 hal/usb_phy_api.h create mode 100644 platform/USBPhy.h create mode 100644 platform/USBPhyEvents.h create mode 100644 platform/USBPhyTypes.h create mode 100644 usb/device/USBDevice/EndpointResolver.cpp create mode 100644 usb/device/USBDevice/EndpointResolver.h diff --git a/hal/mbed_usb_phy.cpp b/hal/mbed_usb_phy.cpp new file mode 100644 index 00000000000..c1f589c5590 --- /dev/null +++ b/hal/mbed_usb_phy.cpp @@ -0,0 +1,29 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include "usb_phy_api.h" +#include "mbed_error.h" + +#if !defined(DEVICE_USBDEVICE) || !DEVICE_USBDEVICE + +USBPhy *get_usb_phy() +{ + error("This board does not have a hardware USB driver"); + return NULL; +} + +#endif diff --git a/hal/usb_phy_api.h b/hal/usb_phy_api.h new file mode 100644 index 00000000000..a46346ae314 --- /dev/null +++ b/hal/usb_phy_api.h @@ -0,0 +1,36 @@ + +/** \addtogroup hal */ +/** @{*/ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef MBED_USB_PHY_API_H +#define MBED_USB_PHY_API_H + +#include "USBPhy.h" + +/** Return a the USBPhy instance for this hardware + * + * For details on adding support for a USBPhy see the specification in USBPhy.h. + * + * @return A pointer to a USBPhy instance + * @note Calling this function on platforms without a USBPhy will result in an + * error + */ +USBPhy *get_usb_phy(); + +#endif + +/** @}*/ diff --git a/platform/USBPhy.h b/platform/USBPhy.h new file mode 100644 index 00000000000..33f5870e1a6 --- /dev/null +++ b/platform/USBPhy.h @@ -0,0 +1,302 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBPHY_H +#define USBPHY_H + +#include "USBPhyTypes.h" +#include "USBPhyEvents.h" + +/** Abstract interface to physical USB hardware + * + * # Defined behavior + * * Any endpoint configurations which fit in the parameters of the table returned + * by USBPhy::endpoint_table can be used. + * * All endpoints in any valid endpoint configuration can be used concurrently + * * Device supports use of at least one control, bulk, interrupt and + * isochronous in each direction at the same time - at least 8 endpoints. + * * Device supports all standard endpoint sizes (wMaxPacketSize) + * * Device can handle an interrupt latency of at least 100ms if reset is not being performed and address is not being set + * * USBPhyEvents events are only sent when USBPhy is in the initialized state + * * When unpowered only the USBPhyEvents::power event can be sent + * * On USB reset all endpoints are removed except for endpoint 0 + * * USBPhyEvents::out and USBPhyEvents::in events only occur for endpoints which have been added + * * A call to USBPhy::ep0_write results in USBPhyEvents::in getting called if not + * interrupted by a power loss or reset + * * A call to endpoint_read followed by endpoint_read_result results in USBPhyEvents::out getting called if not + * interrupted by a power loss or reset + * * Endpoint 0 naks all transactions aside from setup packets until one + * of ep0_read, ep0_write or ep0_stall has been called + * * Endpoint 0 stall is automatically cleared on reception of a setup packet + * + * # Undefined behavior + * * Calling USBPhy::endpoint_add or USBPhy::endpoint_remove outside of the control requests SetInterface or SetConfiguration + * * Devices behavior is undefined if latency is greater than 2ms when address is being set - see USB spec 9.2.6.3 + * * Devices behavior is undefined if latency is greater than 10ms when a reset occurs - see USB spec 7.1.7.5 + * * Calling any of the USBPhy::endpoint_* functions on endpoint 0 + * + * # Notes + * * Make sure USB packets are processed in the correct order when multiple packets are present. + * Typically IN endpoints should be handled before OUT endpoints if both are pending. + * * Setup packets may be resent if there is noise on the USB line. The USBPhy should be able + * to gracefully handle this scenario and respond to the setup packet with an ACK. + * * Bi-directional protocols making use of alternating IN and OUT phases should not rely + * on the last ACK an IN transfer to indicate that the OUT phase should start. Instead, + * the OUT phase should be started at the same time the last IN transfer is started. This + * is because the ACK to the last in transfer may be dropped if there is noise on the USB + * line. If dropped it will only get re-sent on the next IN phase. More info on this can be + * found in section 8.5.3.3 of the USB spec. + * + * @ingroup usb_device_core + */ +class USBPhy { +public: + USBPhy() {}; + virtual ~USBPhy() {}; + + /** + * Initialize this USBPhy instance + * + * This function must be called before calling + * any other functions of this class, unless specifically + * noted. + * + * @param events Callback class to handle USB events + */ + virtual void init(USBPhyEvents *events) = 0; + + /** + * Power down this USBPhy instance + * + * Disable interrupts and stop sending events. + */ + virtual void deinit() = 0; + + /** + * Check if USB power is present + * + * Devices which don't support checking the USB power state + * must always return true. + * + * @return true if USB power is present, false otherwise + */ + virtual bool powered() = 0; + + /** + * Make the USB phy visible to the USB host + * + * Enable either the D+ or D- pullup so the host can detect + * the presence of this device. + */ + virtual void connect() = 0; + + /** + * Detach the USB phy + * + * Disable the D+ and D- pullup and stop responding to + * USB traffic. + */ + virtual void disconnect() = 0; + + /** + * Set this device to the configured state + * + * Enable added endpoints if they are not enabled + * already. + */ + virtual void configure() = 0; + + /** + * Leave the configured state + * + * This is a notification to the USBPhy indicating that the device + * is leaving the configured state. The USBPhy can disable all + * endpoints other than endpoint 0. + * + */ + virtual void unconfigure() = 0; + + /** + * Enable the start of frame interrupt + * + * Call USBPhyEvents::sof on every frame. + */ + virtual void sof_enable() = 0; + + /** + * Disable the start of frame interrupt + * + * Stop calling USBPhyEvents::sof. + */ + virtual void sof_disable() = 0; + + /** + * Set the USBPhy's address + * + * @param address This device's USB address + */ + virtual void set_address(uint8_t address) = 0; + + /** + * Wake upstream devices + */ + virtual void remote_wakeup() = 0; + + /** + * Get the endpoint table + * + * This function returns a table which describes the endpoints + * can be used, the functionality of those endpoints and the + * resource cost. + */ + virtual const usb_ep_table_t* endpoint_table() = 0; + + /** + * Set wMaxPacketSize of endpoint 0 + * + * @param max_packet The wMaxPacketSize value for endpoint 0 + * @return The actual size of endpoint 0 + */ + virtual uint32_t ep0_set_max_packet(uint32_t max_packet) = 0; + + /** + * Read the contents of the SETUP packet + * + * @param buffer Buffer to fill with data + * @param size Size of buffer passed in + */ + virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size) = 0; + + /** + * Start receiving a packet of up to wMaxPacketSize on endpoint 0 + */ + virtual void ep0_read() = 0; + + /** + * Read the contents of a received packet + * + * @param buffer Buffer to fill with the data read + * @param size Size of buffer + */ + virtual uint32_t ep0_read_result(uint8_t *buffer, uint32_t size) = 0; + + /** + * Write a packet on endpoint 0 + * + * @param buffer Buffer fill with data to send + * @param size Size of data to send + */ + virtual void ep0_write(uint8_t *buffer, uint32_t size) = 0; + + /** + * Protocol stall on endpoint 0 + * + * Stall all IN and OUT packets on endpoint 0 until a setup packet + * is received. + * @note The stall is cleared automatically when a setup packet is received + */ + virtual void ep0_stall() = 0; + + /** + * Configure and enable an endpoint + * + * @param endpoint Endpoint to configure and enable + * @param max_packet The maximum packet size that can be sent or received + * @param type The type of endpoint this should be configured as - + * USB_EP_TYPE_BULK, USB_EP_TYPE_INT or USB_EP_TYPE_ISO + * @note This function cannot be used to configure endpoint 0. That must be done + * with ep0_set_max_packet + */ + virtual bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type) = 0; + + /** + * Disable an endpoint + * + * @param endpoint Endpoint to disable + */ + virtual void endpoint_remove(usb_ep_t endpoint) = 0; + + /** + * Perform a functional stall on the given endpoint + * + * Set the HALT feature for this endpoint so that all further + * communication is aborted. + * + * @param endpoint Endpoint to stall + */ + virtual void endpoint_stall(usb_ep_t endpoint) = 0; + + /** + * Unstall the endpoint + * + * Clear the HALT feature on this endpoint so communication can + * resume. + * + * @param endpoint Endpoint to stall + */ + virtual void endpoint_unstall(usb_ep_t endpoint) = 0; + + /** + * Start a read on the given endpoint + * + * @param endpoint Endpoint to start the read on + * @param max_packet A hint as to the wMaxPacketSize of this endpoint. + * This must match the size in endpoint_add. + * @return true if the read was successfully started, false otherwise + */ + virtual bool endpoint_read(usb_ep_t endpoint, uint32_t max_packet) = 0; + + /** + * Finish a read on the given endpoint + * + * @param endpoint Endpoint to read data from + * @param data Buffer to fill with data + * @param size Size of buffer + * @param bytes_read The number of bytes in the current packet. This can be larger than + * the size parameter if the buffer passed in was too small. + * @return true if data was read false otherwise + */ + virtual bool endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytes_read) = 0; + + /** + * Start a write on the given endpoint + * + * @param endpoint Endpoint to write to + * @param data Buffer to write + * @param size Size of data to write + * @return true if the data was prepared for transmit, false otherwise + */ + virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) = 0; + + /** + * Abort the current transfer if it has not yet been sent + * + * @param endpoint Endpoint to abort the transfer on. It is implementation defined + * if this function has an effect on receive endpoints. + */ + virtual void endpoint_abort(usb_ep_t endpoint) = 0; + + /** + * Callback used for performing USB processing + * + * USBPhy processing should be triggered by calling USBPhyEvents::start_process + * and done inside process. All USBPhyEvents callbacks aside from + * USBPhyEvents::start_process must be called in the context of process + */ + virtual void process() = 0; +}; + +#endif diff --git a/platform/USBPhyEvents.h b/platform/USBPhyEvents.h new file mode 100644 index 00000000000..a6cb0e43f2b --- /dev/null +++ b/platform/USBPhyEvents.h @@ -0,0 +1,107 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBPHY_EVENTS_H +#define USBPHY_EVENTS_H + +#include "USBPhyTypes.h" + +/** Event handler for USBPhy + * + * This class is the event handler for the USBPhy class. Any events generated + * by USBPhy are passed to this class via the virtual functions. + * + * @ingroup usb_device_core + * + */ +class USBPhyEvents { +public: + USBPhyEvents() {}; + virtual ~USBPhyEvents() {}; + + /** + * Callback called when a bus reset occurs + * @note called in the contex of USBPhy::process + */ + virtual void reset() = 0; + + /** + * Callback called when an endpoint 0 setup packet is received + * @note called in the contex of USBPhy::process + */ + virtual void ep0_setup() = 0; + + /** + * Callback called when an endpoint 0 out packet is received + * @note called in the contex of USBPhy::process + */ + virtual void ep0_out() = 0; + + /** + * Callback called when an endpoint 0 in packet is received + * @note called in the contex of USBPhy::process + */ + virtual void ep0_in() = 0; + + /** + * Callback called USB power is applied or removed + * + * @param powered true if USB power is present, false otherwise + * @note called in the contex of USBPhy::process + */ + virtual void power(bool powered) = 0; + + /** + * Callback called when entering or leaving suspend mode + * + * @param suspended true if entering suspend mode false otherwise + * @note called in the contex of USBPhy::process + */ + virtual void suspend(bool suspended) = 0; + + /** + * Callback called on start of frame + * + * @param frame_number The current frame number + * @note This callback is enabled/disabled by + * calling USBPhy::sof_enable / USBPhy::sof_disable + * @note called in the contex of USBPhy::process + */ + virtual void sof(int frame_number) = 0; + + /** + * Callback called on the reception of an OUT packet + * + * @param endpoint Endpoint which received the OUT packet + * @note called in the contex of USBPhy::process + */ + virtual void out(usb_ep_t endpoint) = 0; + + /** + * Callback called on the transmission of an IN packet + * + * @param endpoint Endpoint which sent the IN packet + * @note called in the contex of USBPhy::process + */ + virtual void in(usb_ep_t endpoint) = 0; + + /** + * Callback called to indicate the USB processing needs to be done + */ + virtual void start_process() = 0; +}; + +#endif diff --git a/platform/USBPhyTypes.h b/platform/USBPhyTypes.h new file mode 100644 index 00000000000..7e69b5b339d --- /dev/null +++ b/platform/USBPhyTypes.h @@ -0,0 +1,58 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBPHY_TYPES_H +#define USBPHY_TYPES_H + +#include + +typedef uint8_t usb_ep_t; + +typedef enum { + USB_EP_TYPE_CTRL = 0, + USB_EP_TYPE_ISO = 1, + USB_EP_TYPE_BULK = 2, + USB_EP_TYPE_INT = 3 +} usb_ep_type_t; + +enum { + USB_EP_ATTR_ALLOW_CTRL = 1 << USB_EP_TYPE_CTRL, + USB_EP_ATTR_ALLOW_BULK = 1 << USB_EP_TYPE_BULK, + USB_EP_ATTR_ALLOW_INT = 1 << USB_EP_TYPE_INT, + USB_EP_ATTR_ALLOW_ISO = 1 << USB_EP_TYPE_ISO, + USB_EP_ATTR_ALLOW_ALL = USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_ALLOW_BULK | + USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_ALLOW_ISO, + + USB_EP_ATTR_DIR_IN = 0 << 4, + USB_EP_ATTR_DIR_OUT = 1 << 4, + USB_EP_ATTR_DIR_IN_OR_OUT = 2 << 4, + USB_EP_ATTR_DIR_IN_AND_OUT = 3 << 4, + USB_EP_ATTR_DIR_MASK = 3 << 4 +}; +typedef uint8_t usb_ep_attr_t; + +struct usb_ep_entry_t { + usb_ep_attr_t attributes; + uint8_t byte_cost; + uint16_t base_cost; +}; + +struct usb_ep_table_t { + uint32_t resources; + usb_ep_entry_t table[16]; +}; + +#endif diff --git a/usb/device/USBDevice/EndpointResolver.cpp b/usb/device/USBDevice/EndpointResolver.cpp new file mode 100644 index 00000000000..ad45006bb2e --- /dev/null +++ b/usb/device/USBDevice/EndpointResolver.cpp @@ -0,0 +1,136 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "mbed.h" +#include "EndpointResolver.h" + +static uint32_t logical_to_index(uint32_t logical, bool in_not_out) +{ + return (logical << 1) | (in_not_out ? 1 : 0); +} + +static uint32_t index_to_logical(uint32_t index) +{ + return index >> 1; +} + + +EndpointResolver::EndpointResolver(const usb_ep_table_t *table) : _table(table), _cost(0), _used(0), _valid(true) +{ + // Do nothing +} + +EndpointResolver::~EndpointResolver() +{ + // Do nothing +} + +void EndpointResolver::endpoint_ctrl(uint32_t size) +{ + endpoint_in(USB_EP_TYPE_CTRL, size); + endpoint_out(USB_EP_TYPE_CTRL, size); +} + +usb_ep_t EndpointResolver::endpoint_in(usb_ep_type_t type, uint32_t size) +{ + int index = next_index(type, true); + if (index < 0) { + _valid = false; + return 0; + } + + const usb_ep_entry_t &entry = _table->table[index_to_logical(index)]; + _cost += entry.base_cost + entry.byte_cost * size; + _used |= 1 << index; + + return index_to_endpoint(index); +} + +usb_ep_t EndpointResolver::endpoint_out(usb_ep_type_t type, uint32_t size) +{ + int index = next_index(type, false); + if (index < 0) { + _valid = false; + return 0; + } + + const usb_ep_entry_t &entry = _table->table[index_to_logical(index)]; + _cost += entry.base_cost + entry.byte_cost * size; + _used |= 1 << index; + + return index_to_endpoint(index); +} + +bool EndpointResolver::valid() +{ + return _valid && (_cost <= _table->resources); +} + +void EndpointResolver::reset() { + _cost = 0; + _used = 0; + _valid = true; +} + +usb_ep_t EndpointResolver::index_to_endpoint(int index) +{ + return index_to_logical(index) | ((index & 1) ? 0x80 : 0); +} + +int EndpointResolver::next_index(usb_ep_type_t type, bool in_not_out) +{ + for (int logical = 0; logical < (int)(sizeof(_table->table) / sizeof(_table->table[0])); logical++) { + uint32_t index = logical_to_index(logical, in_not_out); + uint32_t other = logical_to_index(logical, !in_not_out); + const usb_ep_entry_t &entry = _table->table[logical]; + + usb_ep_attr_t dir = entry.attributes & USB_EP_ATTR_DIR_MASK; + bool in_allowed = dir != USB_EP_ATTR_DIR_OUT; + bool out_allowed = dir != USB_EP_ATTR_DIR_IN; + bool shared = dir == USB_EP_ATTR_DIR_IN_OR_OUT; + + if (!(entry.attributes & (1 << type))) { + // This type is not supported + continue; + } + + if (in_not_out && !in_allowed) { + // In endpoint not supported + continue; + } + + if (!in_not_out && !out_allowed) { + // Out endpoint not supported + continue; + } + + if (_used & (1 << index)) { + // This endpoint is in use + continue; + } + + if (shared && (1 << other)) { + // This endpoint can only be one direction at a time and is in + // use by the other direction + continue; + } + + return index; + } + + // Not found + return -1; +} diff --git a/usb/device/USBDevice/EndpointResolver.h b/usb/device/USBDevice/EndpointResolver.h new file mode 100644 index 00000000000..04f7d188f8e --- /dev/null +++ b/usb/device/USBDevice/EndpointResolver.h @@ -0,0 +1,89 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef ENDPOINT_RESOLVER_H +#define ENDPOINT_RESOLVER_H + +#include "mbed.h" + +#include "USBPhy.h" + +/** + * Utility class for resolving endpoints + * + * This class is intended to make the process of + * selecting the correct endpoint from a device endpoint + * table easier. It also provides a verification function + * to check if the device has enough resources for the + * given configuration. + * + * @ingroup usb_device_core + */ +class EndpointResolver { +public: + EndpointResolver(const usb_ep_table_t *table); + ~EndpointResolver(); + + /** + * Add control endpoint size + * + * @param size Space reserved for control in and control out + */ + void endpoint_ctrl(uint32_t size); + + /** + * Return a free IN endpoint of the given size + * + * @param type Desired endpoint type + * @param size Space to reserve for this endpoint + * @return Endpoint index or 0 if there are not enough resources + */ + usb_ep_t endpoint_in(usb_ep_type_t type, uint32_t size); + + /** + * Return a free OUT endpoint of the given size + * + * @param type Desired endpoint type + * @param size Space to reserve for this endpoint + * @return Endpoint index or 0 if there are not enough resources + */ + usb_ep_t endpoint_out(usb_ep_type_t type, uint32_t size); + + /** + * Check if the endpoint configuration created so far is valid + * + * @return true if all endpoint sizes are available and fit, false otherwise + */ + bool valid(); + + /** + * Reset this class's state to when it was constructed + */ + void reset(); + +private: + + usb_ep_t index_to_endpoint(int index); + int next_index(usb_ep_type_t type, bool in_not_out); + + const usb_ep_table_t *_table; + uint32_t _cost; + uint32_t _used; + bool _valid; +}; + + +#endif From 15f4f40da80177592db7207e9e8ddc8c732d45c2 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 7 Feb 2018 16:29:16 -0600 Subject: [PATCH 127/488] Copy USBDevice from unsupported Copy the USBDevice code out of unsupported and into a top level USB folder in preparation for development. squash --- usb/device/USBDevice/USBDescriptor.h | 74 ++ usb/device/USBDevice/USBDevice.cpp | 988 +++++++++++++++++++++++++ usb/device/USBDevice/USBDevice.h | 272 +++++++ usb/device/USBDevice/USBDevice_Types.h | 83 +++ 4 files changed, 1417 insertions(+) create mode 100644 usb/device/USBDevice/USBDescriptor.h create mode 100644 usb/device/USBDevice/USBDevice.cpp create mode 100644 usb/device/USBDevice/USBDevice.h create mode 100644 usb/device/USBDevice/USBDevice_Types.h diff --git a/usb/device/USBDevice/USBDescriptor.h b/usb/device/USBDevice/USBDescriptor.h new file mode 100644 index 00000000000..9d4ce849f09 --- /dev/null +++ b/usb/device/USBDevice/USBDescriptor.h @@ -0,0 +1,74 @@ +/* Copyright (c) 2010-2011 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +/* Standard descriptor types */ +#define DEVICE_DESCRIPTOR (1) +#define CONFIGURATION_DESCRIPTOR (2) +#define STRING_DESCRIPTOR (3) +#define INTERFACE_DESCRIPTOR (4) +#define ENDPOINT_DESCRIPTOR (5) +#define QUALIFIER_DESCRIPTOR (6) + +/* Standard descriptor lengths */ +#define DEVICE_DESCRIPTOR_LENGTH (0x12) +#define CONFIGURATION_DESCRIPTOR_LENGTH (0x09) +#define INTERFACE_DESCRIPTOR_LENGTH (0x09) +#define ENDPOINT_DESCRIPTOR_LENGTH (0x07) + + +/*string offset*/ +#define STRING_OFFSET_LANGID (0) +#define STRING_OFFSET_IMANUFACTURER (1) +#define STRING_OFFSET_IPRODUCT (2) +#define STRING_OFFSET_ISERIAL (3) +#define STRING_OFFSET_ICONFIGURATION (4) +#define STRING_OFFSET_IINTERFACE (5) + +/* USB Specification Release Number */ +#define USB_VERSION_2_0 (0x0200) + +/* Least/Most significant byte of short integer */ +#define LSB(n) ((n)&0xff) +#define MSB(n) (((n)&0xff00)>>8) + +/* Convert physical endpoint number to descriptor endpoint number */ +#define PHY_TO_DESC(endpoint) (((endpoint)>>1) | (((endpoint) & 1) ? 0x80:0)) + +/* bmAttributes in configuration descriptor */ +/* C_RESERVED must always be set */ +#define C_RESERVED (1U<<7) +#define C_SELF_POWERED (1U<<6) +#define C_REMOTE_WAKEUP (1U<<5) + +/* bMaxPower in configuration descriptor */ +#define C_POWER(mA) ((mA)/2) + +/* bmAttributes in endpoint descriptor */ +#define E_CONTROL (0x00) +#define E_ISOCHRONOUS (0x01) +#define E_BULK (0x02) +#define E_INTERRUPT (0x03) + +/* For isochronous endpoints only: */ +#define E_NO_SYNCHRONIZATION (0x00) +#define E_ASYNCHRONOUS (0x04) +#define E_ADAPTIVE (0x08) +#define E_SYNCHRONOUS (0x0C) +#define E_DATA (0x00) +#define E_FEEDBACK (0x10) +#define E_IMPLICIT_FEEDBACK (0x20) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp new file mode 100644 index 00000000000..438174fe2a9 --- /dev/null +++ b/usb/device/USBDevice/USBDevice.cpp @@ -0,0 +1,988 @@ +/* Copyright (c) 2010-2011 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#include "stdint.h" + +#include "USBEndpoints.h" +#include "USBDevice.h" +#include "USBDescriptor.h" + +//#define DEBUG + +/* Device status */ +#define DEVICE_STATUS_SELF_POWERED (1U<<0) +#define DEVICE_STATUS_REMOTE_WAKEUP (1U<<1) + +/* Endpoint status */ +#define ENDPOINT_STATUS_HALT (1U<<0) + +/* Standard feature selectors */ +#define DEVICE_REMOTE_WAKEUP (1) +#define ENDPOINT_HALT (0) + +/* Macro to convert wIndex endpoint number to physical endpoint number */ +#define WINDEX_TO_PHYSICAL(endpoint) (((endpoint & 0x0f) << 1) + \ + ((endpoint & 0x80) ? 1 : 0)) + + +bool USBDevice::requestGetDescriptor(void) +{ + bool success = false; +#ifdef DEBUG + printf("get descr: type: %d\r\n", DESCRIPTOR_TYPE(transfer.setup.wValue)); +#endif + switch (DESCRIPTOR_TYPE(transfer.setup.wValue)) + { + case DEVICE_DESCRIPTOR: + if (deviceDesc() != NULL) + { + if ((deviceDesc()[0] == DEVICE_DESCRIPTOR_LENGTH) \ + && (deviceDesc()[1] == DEVICE_DESCRIPTOR)) + { +#ifdef DEBUG + printf("device descr\r\n"); +#endif + transfer.remaining = DEVICE_DESCRIPTOR_LENGTH; + transfer.ptr = (uint8_t*)deviceDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + } + } + break; + case CONFIGURATION_DESCRIPTOR: + if (configurationDesc() != NULL) + { + if ((configurationDesc()[0] == CONFIGURATION_DESCRIPTOR_LENGTH) \ + && (configurationDesc()[1] == CONFIGURATION_DESCRIPTOR)) + { +#ifdef DEBUG + printf("conf descr request\r\n"); +#endif + /* Get wTotalLength */ + transfer.remaining = configurationDesc()[2] \ + | (configurationDesc()[3] << 8); + + transfer.ptr = (uint8_t*)configurationDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + } + } + break; + case STRING_DESCRIPTOR: +#ifdef DEBUG + printf("str descriptor\r\n"); +#endif + switch (DESCRIPTOR_INDEX(transfer.setup.wValue)) + { + case STRING_OFFSET_LANGID: +#ifdef DEBUG + printf("1\r\n"); +#endif + transfer.remaining = stringLangidDesc()[0]; + transfer.ptr = (uint8_t*)stringLangidDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_IMANUFACTURER: +#ifdef DEBUG + printf("2\r\n"); +#endif + transfer.remaining = stringImanufacturerDesc()[0]; + transfer.ptr = (uint8_t*)stringImanufacturerDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_IPRODUCT: +#ifdef DEBUG + printf("3\r\n"); +#endif + transfer.remaining = stringIproductDesc()[0]; + transfer.ptr = (uint8_t*)stringIproductDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_ISERIAL: +#ifdef DEBUG + printf("4\r\n"); +#endif + transfer.remaining = stringIserialDesc()[0]; + transfer.ptr = (uint8_t*)stringIserialDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_ICONFIGURATION: +#ifdef DEBUG + printf("5\r\n"); +#endif + transfer.remaining = stringIConfigurationDesc()[0]; + transfer.ptr = (uint8_t*)stringIConfigurationDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_IINTERFACE: +#ifdef DEBUG + printf("6\r\n"); +#endif + transfer.remaining = stringIinterfaceDesc()[0]; + transfer.ptr = (uint8_t*)stringIinterfaceDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + } + break; + case INTERFACE_DESCRIPTOR: +#ifdef DEBUG + printf("interface descr\r\n"); +#endif + case ENDPOINT_DESCRIPTOR: +#ifdef DEBUG + printf("endpoint descr\r\n"); +#endif + /* TODO: Support is optional, not implemented here */ + break; + default: +#ifdef DEBUG + printf("ERROR\r\n"); +#endif + break; + } + + return success; +} + +void USBDevice::decodeSetupPacket(uint8_t *data, SETUP_PACKET *packet) +{ + /* Fill in the elements of a SETUP_PACKET structure from raw data */ + packet->bmRequestType.dataTransferDirection = (data[0] & 0x80) >> 7; + packet->bmRequestType.Type = (data[0] & 0x60) >> 5; + packet->bmRequestType.Recipient = data[0] & 0x1f; + packet->bRequest = data[1]; + packet->wValue = (data[2] | (uint16_t)data[3] << 8); + packet->wIndex = (data[4] | (uint16_t)data[5] << 8); + packet->wLength = (data[6] | (uint16_t)data[7] << 8); +} + + +bool USBDevice::controlOut(void) +{ + /* Control transfer data OUT stage */ + uint8_t buffer[MAX_PACKET_SIZE_EP0]; + uint32_t packetSize; + + /* Check we should be transferring data OUT */ + if (transfer.direction != HOST_TO_DEVICE) + { + /* for other platforms, count on the HAL to handle this case */ + return false; + } + + /* Read from endpoint */ + packetSize = EP0getReadResult(buffer); + + /* Check if transfer size is valid */ + if (packetSize > transfer.remaining) + { + /* Too big */ + return false; + } + + /* Update transfer */ + transfer.ptr += packetSize; + transfer.remaining -= packetSize; + + /* Check if transfer has completed */ + if (transfer.remaining == 0) + { + /* Transfer completed */ + if (transfer.notify) + { + /* Notify class layer. */ + USBCallback_requestCompleted(buffer, packetSize); + transfer.notify = false; + } + /* Status stage */ + EP0write(NULL, 0); + } + else + { + EP0read(); + } + + return true; +} + +bool USBDevice::controlIn(void) +{ + /* Control transfer data IN stage */ + uint32_t packetSize; + + /* Check if transfer has completed (status stage transactions */ + /* also have transfer.remaining == 0) */ + if (transfer.remaining == 0) + { + if (transfer.zlp) + { + /* Send zero length packet */ + EP0write(NULL, 0); + transfer.zlp = false; + } + + /* Transfer completed */ + if (transfer.notify) + { + /* Notify class layer. */ + USBCallback_requestCompleted(NULL, 0); + transfer.notify = false; + } + + EP0read(); + EP0readStage(); + + /* Completed */ + return true; + } + + /* Check we should be transferring data IN */ + if (transfer.direction != DEVICE_TO_HOST) + { + return false; + } + + packetSize = transfer.remaining; + + if (packetSize > MAX_PACKET_SIZE_EP0) + { + packetSize = MAX_PACKET_SIZE_EP0; + } + + /* Write to endpoint */ + EP0write(transfer.ptr, packetSize); + + /* Update transfer */ + transfer.ptr += packetSize; + transfer.remaining -= packetSize; + + return true; +} + +bool USBDevice::requestSetAddress(void) +{ + /* Set the device address */ + setAddress(transfer.setup.wValue); + + if (transfer.setup.wValue == 0) + { + device.state = DEFAULT; + } + else + { + device.state = ADDRESS; + } + + return true; +} + +bool USBDevice::requestSetConfiguration(void) +{ + + device.configuration = transfer.setup.wValue; + /* Set the device configuration */ + if (device.configuration == 0) + { + /* Not configured */ + unconfigureDevice(); + device.state = ADDRESS; + } + else + { + if (USBCallback_setConfiguration(device.configuration)) + { + /* Valid configuration */ + configureDevice(); + device.state = CONFIGURED; + } + else + { + return false; + } + } + + return true; +} + +bool USBDevice::requestGetConfiguration(void) +{ + /* Send the device configuration */ + transfer.ptr = &device.configuration; + transfer.remaining = sizeof(device.configuration); + transfer.direction = DEVICE_TO_HOST; + return true; +} + +bool USBDevice::requestGetInterface(void) +{ + /* Return the selected alternate setting for an interface */ + + if (device.state != CONFIGURED) + { + return false; + } + + /* Send the alternate setting */ + transfer.setup.wIndex = currentInterface; + transfer.ptr = ¤tAlternate; + transfer.remaining = sizeof(currentAlternate); + transfer.direction = DEVICE_TO_HOST; + return true; +} + +bool USBDevice::requestSetInterface(void) +{ + bool success = false; + if(USBCallback_setInterface(transfer.setup.wIndex, transfer.setup.wValue)) + { + success = true; + currentInterface = transfer.setup.wIndex; + currentAlternate = transfer.setup.wValue; + } + return success; +} + +bool USBDevice::requestSetFeature() +{ + bool success = false; + + if (device.state != CONFIGURED) + { + /* Endpoint or interface must be zero */ + if (transfer.setup.wIndex != 0) + { + return false; + } + } + + switch (transfer.setup.bmRequestType.Recipient) + { + case DEVICE_RECIPIENT: + /* TODO: Remote wakeup feature not supported */ + break; + case ENDPOINT_RECIPIENT: + if (transfer.setup.wValue == ENDPOINT_HALT) + { + /* TODO: We should check that the endpoint number is valid */ + stallEndpoint( + WINDEX_TO_PHYSICAL(transfer.setup.wIndex)); + success = true; + } + break; + default: + break; + } + + return success; +} + +bool USBDevice::requestClearFeature() +{ + bool success = false; + + if (device.state != CONFIGURED) + { + /* Endpoint or interface must be zero */ + if (transfer.setup.wIndex != 0) + { + return false; + } + } + + switch (transfer.setup.bmRequestType.Recipient) + { + case DEVICE_RECIPIENT: + /* TODO: Remote wakeup feature not supported */ + break; + case ENDPOINT_RECIPIENT: + /* TODO: We should check that the endpoint number is valid */ + if (transfer.setup.wValue == ENDPOINT_HALT) + { + unstallEndpoint( WINDEX_TO_PHYSICAL(transfer.setup.wIndex)); + success = true; + } + break; + default: + break; + } + + return success; +} + +bool USBDevice::requestGetStatus(void) +{ + static uint16_t status; + bool success = false; + + if (device.state != CONFIGURED) + { + /* Endpoint or interface must be zero */ + if (transfer.setup.wIndex != 0) + { + return false; + } + } + + switch (transfer.setup.bmRequestType.Recipient) + { + case DEVICE_RECIPIENT: + /* TODO: Currently only supports self powered devices */ + status = DEVICE_STATUS_SELF_POWERED; + success = true; + break; + case INTERFACE_RECIPIENT: + status = 0; + success = true; + break; + case ENDPOINT_RECIPIENT: + /* TODO: We should check that the endpoint number is valid */ + if (getEndpointStallState( + WINDEX_TO_PHYSICAL(transfer.setup.wIndex))) + { + status = ENDPOINT_STATUS_HALT; + } + else + { + status = 0; + } + success = true; + break; + default: + break; + } + + if (success) + { + /* Send the status */ + transfer.ptr = (uint8_t *)&status; /* Assumes little endian */ + transfer.remaining = sizeof(status); + transfer.direction = DEVICE_TO_HOST; + } + + return success; +} + +bool USBDevice::requestSetup(void) +{ + bool success = false; + + /* Process standard requests */ + if ((transfer.setup.bmRequestType.Type == STANDARD_TYPE)) + { + switch (transfer.setup.bRequest) + { + case GET_STATUS: + success = requestGetStatus(); + break; + case CLEAR_FEATURE: + success = requestClearFeature(); + break; + case SET_FEATURE: + success = requestSetFeature(); + break; + case SET_ADDRESS: + success = requestSetAddress(); + break; + case GET_DESCRIPTOR: + success = requestGetDescriptor(); + break; + case SET_DESCRIPTOR: + /* TODO: Support is optional, not implemented here */ + success = false; + break; + case GET_CONFIGURATION: + success = requestGetConfiguration(); + break; + case SET_CONFIGURATION: + success = requestSetConfiguration(); + break; + case GET_INTERFACE: + success = requestGetInterface(); + break; + case SET_INTERFACE: + success = requestSetInterface(); + break; + default: + break; + } + } + + return success; +} + +bool USBDevice::controlSetup(void) +{ + bool success = false; + + /* Control transfer setup stage */ + uint8_t buffer[MAX_PACKET_SIZE_EP0]; + + EP0setup(buffer); + + /* Initialise control transfer state */ + decodeSetupPacket(buffer, &transfer.setup); + transfer.ptr = NULL; + transfer.remaining = 0; + transfer.direction = 0; + transfer.zlp = false; + transfer.notify = false; + +#ifdef DEBUG + printf("dataTransferDirection: %d\r\nType: %d\r\nRecipient: %d\r\nbRequest: %d\r\nwValue: %d\r\nwIndex: %d\r\nwLength: %d\r\n",transfer.setup.bmRequestType.dataTransferDirection, + transfer.setup.bmRequestType.Type, + transfer.setup.bmRequestType.Recipient, + transfer.setup.bRequest, + transfer.setup.wValue, + transfer.setup.wIndex, + transfer.setup.wLength); +#endif + + /* Class / vendor specific */ + success = USBCallback_request(); + + if (!success) + { + /* Standard requests */ + if (!requestSetup()) + { +#ifdef DEBUG + printf("fail!!!!\r\n"); +#endif + return false; + } + } + + /* Check transfer size and direction */ + if (transfer.setup.wLength>0) + { + if (transfer.setup.bmRequestType.dataTransferDirection \ + == DEVICE_TO_HOST) + { + /* IN data stage is required */ + if (transfer.direction != DEVICE_TO_HOST) + { + return false; + } + + /* Transfer must be less than or equal to the size */ + /* requested by the host */ + if (transfer.remaining > transfer.setup.wLength) + { + transfer.remaining = transfer.setup.wLength; + } + } + else + { + + /* OUT data stage is required */ + if (transfer.direction != HOST_TO_DEVICE) + { + return false; + } + + /* Transfer must be equal to the size requested by the host */ + if (transfer.remaining != transfer.setup.wLength) + { + return false; + } + } + } + else + { + /* No data stage; transfer size must be zero */ + if (transfer.remaining != 0) + { + return false; + } + } + + /* Data or status stage if applicable */ + if (transfer.setup.wLength>0) + { + if (transfer.setup.bmRequestType.dataTransferDirection \ + == DEVICE_TO_HOST) + { + /* Check if we'll need to send a zero length packet at */ + /* the end of this transfer */ + if (transfer.setup.wLength > transfer.remaining) + { + /* Device wishes to transfer less than host requested */ + if ((transfer.remaining % MAX_PACKET_SIZE_EP0) == 0) + { + /* Transfer is a multiple of EP0 max packet size */ + transfer.zlp = true; + } + } + + /* IN stage */ + controlIn(); + } + else + { + /* OUT stage */ + EP0read(); + } + } + else + { + /* Status stage */ + EP0write(NULL, 0); + } + + return true; +} + +void USBDevice::busReset(void) +{ + device.state = DEFAULT; + device.configuration = 0; + device.suspended = false; + + /* Call class / vendor specific busReset function */ + USBCallback_busReset(); +} + +void USBDevice::EP0setupCallback(void) +{ + /* Endpoint 0 setup event */ + if (!controlSetup()) + { + /* Protocol stall */ + EP0stall(); + } + + /* Return true if an OUT data stage is expected */ +} + +void USBDevice::EP0out(void) +{ + /* Endpoint 0 OUT data event */ + if (!controlOut()) + { + /* Protocol stall; this will stall both endpoints */ + EP0stall(); + } +} + +void USBDevice::EP0in(void) +{ +#ifdef DEBUG + printf("EP0IN\r\n"); +#endif + /* Endpoint 0 IN data event */ + if (!controlIn()) + { + /* Protocol stall; this will stall both endpoints */ + EP0stall(); + } +} + +bool USBDevice::configured(void) +{ + /* Returns true if device is in the CONFIGURED state */ + return (device.state == CONFIGURED); +} + +void USBDevice::connect(bool blocking) +{ + /* Connect device */ + USBHAL::connect(); + + if (blocking) { + /* Block if not configured */ + while (!configured()); + } +} + +void USBDevice::disconnect(void) +{ + /* Disconnect device */ + USBHAL::disconnect(); + + /* Set initial device state */ + device.state = POWERED; + device.configuration = 0; + device.suspended = false; +} + +CONTROL_TRANSFER * USBDevice::getTransferPtr(void) +{ + return &transfer; +} + +bool USBDevice::addEndpoint(uint8_t endpoint, uint32_t maxPacket) +{ + return realiseEndpoint(endpoint, maxPacket, 0); +} + +bool USBDevice::addRateFeedbackEndpoint(uint8_t endpoint, uint32_t maxPacket) +{ + /* For interrupt endpoints only */ + return realiseEndpoint(endpoint, maxPacket, RATE_FEEDBACK_MODE); +} + +uint8_t * USBDevice::findDescriptor(uint8_t descriptorType) +{ + /* Find a descriptor within the list of descriptors */ + /* following a configuration descriptor. */ + uint16_t wTotalLength; + uint8_t *ptr; + + if (configurationDesc() == NULL) + { + return NULL; + } + + /* Check this is a configuration descriptor */ + if ((configurationDesc()[0] != CONFIGURATION_DESCRIPTOR_LENGTH) \ + || (configurationDesc()[1] != CONFIGURATION_DESCRIPTOR)) + { + return NULL; + } + + wTotalLength = configurationDesc()[2] | (configurationDesc()[3] << 8); + + /* Check there are some more descriptors to follow */ + if (wTotalLength <= (CONFIGURATION_DESCRIPTOR_LENGTH+2)) + /* +2 is for bLength and bDescriptorType of next descriptor */ + { + return NULL; + } + + /* Start at first descriptor after the configuration descriptor */ + ptr = &(((uint8_t*)configurationDesc())[CONFIGURATION_DESCRIPTOR_LENGTH]); + + do { + if (ptr[1] /* bDescriptorType */ == descriptorType) + { + /* Found */ + return ptr; + } + + /* Skip to next descriptor */ + ptr += ptr[0]; /* bLength */ + } while (ptr < (configurationDesc() + wTotalLength)); + + /* Reached end of the descriptors - not found */ + return NULL; +} + + +void USBDevice::connectStateChanged(unsigned int connected) +{ +} + +void USBDevice::suspendStateChanged(unsigned int suspended) +{ +} + + +USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release){ + VENDOR_ID = vendor_id; + PRODUCT_ID = product_id; + PRODUCT_RELEASE = product_release; + + /* Set initial device state */ + device.state = POWERED; + device.configuration = 0; + device.suspended = false; +}; + + +bool USBDevice::readStart(uint8_t endpoint, uint32_t maxSize) +{ + return endpointRead(endpoint, maxSize) == EP_PENDING; +} + + +bool USBDevice::write(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_t maxSize) +{ + EP_STATUS result; + + if (size > maxSize) + { + return false; + } + + + if(!configured()) { + return false; + } + + /* Send report */ + result = endpointWrite(endpoint, buffer, size); + + if (result != EP_PENDING) + { + return false; + } + + /* Wait for completion */ + do { + result = endpointWriteResult(endpoint); + } while ((result == EP_PENDING) && configured()); + + return (result == EP_COMPLETED); +} + + +bool USBDevice::writeNB(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_t maxSize) +{ + EP_STATUS result; + + if (size > maxSize) + { + return false; + } + + if(!configured()) { + return false; + } + + /* Send report */ + result = endpointWrite(endpoint, buffer, size); + + if (result != EP_PENDING) + { + return false; + } + + result = endpointWriteResult(endpoint); + + return (result == EP_COMPLETED); +} + + + +bool USBDevice::readEP(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint32_t maxSize) +{ + EP_STATUS result; + + if(!configured()) { + return false; + } + + /* Wait for completion */ + do { + result = endpointReadResult(endpoint, buffer, size); + } while ((result == EP_PENDING) && configured()); + + return (result == EP_COMPLETED); +} + + +bool USBDevice::readEP_NB(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint32_t maxSize) +{ + EP_STATUS result; + + if(!configured()) { + return false; + } + + result = endpointReadResult(endpoint, buffer, size); + + return (result == EP_COMPLETED); +} + + + +const uint8_t * USBDevice::deviceDesc() { + uint8_t deviceDescriptorTemp[] = { + DEVICE_DESCRIPTOR_LENGTH, /* bLength */ + DEVICE_DESCRIPTOR, /* bDescriptorType */ + LSB(USB_VERSION_2_0), /* bcdUSB (LSB) */ + MSB(USB_VERSION_2_0), /* bcdUSB (MSB) */ + 0x00, /* bDeviceClass */ + 0x00, /* bDeviceSubClass */ + 0x00, /* bDeviceprotocol */ + MAX_PACKET_SIZE_EP0, /* bMaxPacketSize0 */ + (uint8_t)(LSB(VENDOR_ID)), /* idVendor (LSB) */ + (uint8_t)(MSB(VENDOR_ID)), /* idVendor (MSB) */ + (uint8_t)(LSB(PRODUCT_ID)), /* idProduct (LSB) */ + (uint8_t)(MSB(PRODUCT_ID)), /* idProduct (MSB) */ + (uint8_t)(LSB(PRODUCT_RELEASE)), /* bcdDevice (LSB) */ + (uint8_t)(MSB(PRODUCT_RELEASE)), /* bcdDevice (MSB) */ + STRING_OFFSET_IMANUFACTURER, /* iManufacturer */ + STRING_OFFSET_IPRODUCT, /* iProduct */ + STRING_OFFSET_ISERIAL, /* iSerialNumber */ + 0x01 /* bNumConfigurations */ + }; + MBED_ASSERT(sizeof(deviceDescriptorTemp) == sizeof(deviceDescriptor)); + memcpy(deviceDescriptor, deviceDescriptorTemp, sizeof(deviceDescriptor)); + return deviceDescriptor; +} + +const uint8_t * USBDevice::stringLangidDesc() { + static const uint8_t stringLangidDescriptor[] = { + 0x04, /*bLength*/ + STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ + 0x09,0x04, /*bString Lang ID - 0x0409 - English*/ + }; + return (uint8_t *)stringLangidDescriptor; +} + +const uint8_t * USBDevice::stringImanufacturerDesc() { + static const uint8_t stringImanufacturerDescriptor[] = { + 0x12, /*bLength*/ + STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ + 'm',0,'b',0,'e',0,'d',0,'.',0,'o',0,'r',0,'g',0, /*bString iManufacturer - mbed.org*/ + }; + return stringImanufacturerDescriptor; +} + +const uint8_t * USBDevice::stringIserialDesc() { + static const uint8_t stringIserialDescriptor[] = { + 0x16, /*bLength*/ + STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ + '0',0,'1',0,'2',0,'3',0,'4',0,'5',0,'6',0,'7',0,'8',0,'9',0, /*bString iSerial - 0123456789*/ + }; + return stringIserialDescriptor; +} + +const uint8_t * USBDevice::stringIConfigurationDesc() { + static const uint8_t stringIconfigurationDescriptor[] = { + 0x06, /*bLength*/ + STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ + '0',0,'1',0, /*bString iConfiguration - 01*/ + }; + return stringIconfigurationDescriptor; +} + +const uint8_t * USBDevice::stringIinterfaceDesc() { + static const uint8_t stringIinterfaceDescriptor[] = { + 0x08, /*bLength*/ + STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ + 'U',0,'S',0,'B',0, /*bString iInterface - USB*/ + }; + return stringIinterfaceDescriptor; +} + +const uint8_t * USBDevice::stringIproductDesc() { + static const uint8_t stringIproductDescriptor[] = { + 0x16, /*bLength*/ + STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ + 'U',0,'S',0,'B',0,' ',0,'D',0,'E',0,'V',0,'I',0,'C',0,'E',0 /*bString iProduct - USB DEVICE*/ + }; + return stringIproductDescriptor; +} diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h new file mode 100644 index 00000000000..60a280ed658 --- /dev/null +++ b/usb/device/USBDevice/USBDevice.h @@ -0,0 +1,272 @@ +/* Copyright (c) 2010-2011 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#ifndef USBDEVICE_H +#define USBDEVICE_H + +#include "mbed.h" +#include "USBDevice_Types.h" +#include "USBHAL.h" + +class USBDevice: public USBHAL +{ +public: + USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release); + + /* + * Check if the device is configured + * + * @returns true if configured, false otherwise + */ + bool configured(void); + + /* + * Connect a device + * + * @param blocking: block if not configured + */ + void connect(bool blocking = true); + + /* + * Disconnect a device + */ + void disconnect(void); + + /* + * Add an endpoint + * + * @param endpoint endpoint which will be added + * @param maxPacket Maximum size of a packet which can be sent for this endpoint + * @returns true if successful, false otherwise + */ + bool addEndpoint(uint8_t endpoint, uint32_t maxPacket); + + /* + * Start a reading on a certain endpoint. + * You can access the result of the reading by USBDevice_read + * + * @param endpoint endpoint which will be read + * @param maxSize the maximum length that can be read + * @return true if successful + */ + bool readStart(uint8_t endpoint, uint32_t maxSize); + + /* + * Read a certain endpoint. Before calling this function, USBUSBDevice_readStart + * must be called. + * + * Warning: blocking + * + * @param endpoint endpoint which will be read + * @param buffer buffer will be filled with the data received + * @param size the number of bytes read will be stored in *size + * @param maxSize the maximum length that can be read + * @returns true if successful + */ + bool readEP(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint32_t maxSize); + + /* + * Read a certain endpoint. + * + * Warning: non blocking + * + * @param endpoint endpoint which will be read + * @param buffer buffer will be filled with the data received (if data are available) + * @param size the number of bytes read will be stored in *size + * @param maxSize the maximum length that can be read + * @returns true if successful + */ + bool readEP_NB(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint32_t maxSize); + + /* + * Write a certain endpoint. + * + * Warning: blocking + * + * @param endpoint endpoint to write + * @param buffer data contained in buffer will be write + * @param size the number of bytes to write + * @param maxSize the maximum length that can be written on this endpoint + */ + bool write(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_t maxSize); + + + /* + * Write a certain endpoint. + * + * Warning: non blocking + * + * @param endpoint endpoint to write + * @param buffer data contained in buffer will be write + * @param size the number of bytes to write + * @param maxSize the maximum length that can be written on this endpoint + */ + bool writeNB(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_t maxSize); + + + /* + * Called by USBDevice layer on bus reset. Warning: Called in ISR context + * + * May be used to reset state + */ + virtual void USBCallback_busReset(void) {}; + + /* + * Called by USBDevice on Endpoint0 request. Warning: Called in ISR context + * This is used to handle extensions to standard requests + * and class specific requests + * + * @returns true if class handles this request + */ + virtual bool USBCallback_request() { return false; }; + + /* + * Called by USBDevice on Endpoint0 request completion + * if the 'notify' flag has been set to true. Warning: Called in ISR context + * + * In this case it is used to indicate that a HID report has + * been received from the host on endpoint 0 + * + * @param buf buffer received on endpoint 0 + * @param length length of this buffer + */ + virtual void USBCallback_requestCompleted(uint8_t * buf, uint32_t length) {}; + + /* + * Called by USBDevice layer. Set configuration of the device. + * For instance, you can add all endpoints that you need on this function. + * + * @param configuration Number of the configuration + */ + virtual bool USBCallback_setConfiguration(uint8_t configuration) { return false; }; + + /* + * Called by USBDevice layer. Set interface/alternate of the device. + * + * @param interface Number of the interface to be configured + * @param alternate Number of the alternate to be configured + * @returns true if class handles this request + */ + virtual bool USBCallback_setInterface(uint16_t interface, uint8_t alternate) { return false; }; + + /* + * Get device descriptor. + * + * @returns pointer to the device descriptor + */ + virtual const uint8_t * deviceDesc(); + + /* + * Get configuration descriptor + * + * @returns pointer to the configuration descriptor + */ + virtual const uint8_t * configurationDesc(){return NULL;}; + + /* + * Get string lang id descriptor + * + * @return pointer to the string lang id descriptor + */ + virtual const uint8_t * stringLangidDesc(); + + /* + * Get string manufacturer descriptor + * + * @returns pointer to the string manufacturer descriptor + */ + virtual const uint8_t * stringImanufacturerDesc(); + + /* + * Get string product descriptor + * + * @returns pointer to the string product descriptor + */ + virtual const uint8_t * stringIproductDesc(); + + /* + * Get string serial descriptor + * + * @returns pointer to the string serial descriptor + */ + virtual const uint8_t * stringIserialDesc(); + + /* + * Get string configuration descriptor + * + * @returns pointer to the string configuration descriptor + */ + virtual const uint8_t * stringIConfigurationDesc(); + + /* + * Get string interface descriptor + * + * @returns pointer to the string interface descriptor + */ + virtual const uint8_t * stringIinterfaceDesc(); + + /* + * Get the length of the report descriptor + * + * @returns length of the report descriptor + */ + virtual uint16_t reportDescLength() { return 0; }; + + + +protected: + virtual void busReset(void); + virtual void EP0setupCallback(void); + virtual void EP0out(void); + virtual void EP0in(void); + virtual void connectStateChanged(unsigned int connected); + virtual void suspendStateChanged(unsigned int suspended); + uint8_t * findDescriptor(uint8_t descriptorType); + CONTROL_TRANSFER * getTransferPtr(void); + + uint16_t VENDOR_ID; + uint16_t PRODUCT_ID; + uint16_t PRODUCT_RELEASE; + uint8_t deviceDescriptor[18]; + +private: + bool addRateFeedbackEndpoint(uint8_t endpoint, uint32_t maxPacket); + bool requestGetDescriptor(void); + bool controlOut(void); + bool controlIn(void); + bool requestSetAddress(void); + bool requestSetConfiguration(void); + bool requestSetFeature(void); + bool requestClearFeature(void); + bool requestGetStatus(void); + bool requestSetup(void); + bool controlSetup(void); + void decodeSetupPacket(uint8_t *data, SETUP_PACKET *packet); + bool requestGetConfiguration(void); + bool requestGetInterface(void); + bool requestSetInterface(void); + + CONTROL_TRANSFER transfer; + USB_DEVICE device; + + uint16_t currentInterface; + uint8_t currentAlternate; +}; + + +#endif diff --git a/usb/device/USBDevice/USBDevice_Types.h b/usb/device/USBDevice/USBDevice_Types.h new file mode 100644 index 00000000000..19bc1c2f348 --- /dev/null +++ b/usb/device/USBDevice/USBDevice_Types.h @@ -0,0 +1,83 @@ +/* Copyright (c) 2010-2011 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#ifndef USBDEVICE_TYPES_H +#define USBDEVICE_TYPES_H + +/* Standard requests */ +#define GET_STATUS (0) +#define CLEAR_FEATURE (1) +#define SET_FEATURE (3) +#define SET_ADDRESS (5) +#define GET_DESCRIPTOR (6) +#define SET_DESCRIPTOR (7) +#define GET_CONFIGURATION (8) +#define SET_CONFIGURATION (9) +#define GET_INTERFACE (10) +#define SET_INTERFACE (11) + +/* bmRequestType.dataTransferDirection */ +#define HOST_TO_DEVICE (0) +#define DEVICE_TO_HOST (1) + +/* bmRequestType.Type*/ +#define STANDARD_TYPE (0) +#define CLASS_TYPE (1) +#define VENDOR_TYPE (2) +#define RESERVED_TYPE (3) + +/* bmRequestType.Recipient */ +#define DEVICE_RECIPIENT (0) +#define INTERFACE_RECIPIENT (1) +#define ENDPOINT_RECIPIENT (2) +#define OTHER_RECIPIENT (3) + +/* Descriptors */ +#define DESCRIPTOR_TYPE(wValue) (wValue >> 8) +#define DESCRIPTOR_INDEX(wValue) (wValue & 0xff) + +typedef struct { + struct { + uint8_t dataTransferDirection; + uint8_t Type; + uint8_t Recipient; + } bmRequestType; + uint8_t bRequest; + uint16_t wValue; + uint16_t wIndex; + uint16_t wLength; +} SETUP_PACKET; + +typedef struct { + SETUP_PACKET setup; + uint8_t *ptr; + uint32_t remaining; + uint8_t direction; + bool zlp; + bool notify; +} CONTROL_TRANSFER; + +typedef enum {ATTACHED, POWERED, DEFAULT, ADDRESS, CONFIGURED} DEVICE_STATE; + +typedef struct { + volatile DEVICE_STATE state; + uint8_t configuration; + bool suspended; +} USB_DEVICE; + +#endif From c91f439fd930ee933145a8ac5097f4ae4d4f82ea Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 26 Feb 2018 09:32:14 -0600 Subject: [PATCH 128/488] Update USB licenses and format code Update USB licenses from MIT to Apache 2 and run astyle on the code. --- usb/device/USBDevice/USBDescriptor.h | 32 +- usb/device/USBDevice/USBDevice.cpp | 480 +++++++++++-------------- usb/device/USBDevice/USBDevice.h | 88 +++-- usb/device/USBDevice/USBDevice_Types.h | 32 +- 4 files changed, 285 insertions(+), 347 deletions(-) diff --git a/usb/device/USBDevice/USBDescriptor.h b/usb/device/USBDevice/USBDescriptor.h index 9d4ce849f09..afc9684086a 100644 --- a/usb/device/USBDevice/USBDescriptor.h +++ b/usb/device/USBDevice/USBDescriptor.h @@ -1,20 +1,18 @@ -/* Copyright (c) 2010-2011 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ /* Standard descriptor types */ #define DEVICE_DESCRIPTOR (1) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 438174fe2a9..32a03422f37 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -1,20 +1,18 @@ -/* Copyright (c) 2010-2011 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include "stdint.h" @@ -46,38 +44,33 @@ bool USBDevice::requestGetDescriptor(void) #ifdef DEBUG printf("get descr: type: %d\r\n", DESCRIPTOR_TYPE(transfer.setup.wValue)); #endif - switch (DESCRIPTOR_TYPE(transfer.setup.wValue)) - { + switch (DESCRIPTOR_TYPE(transfer.setup.wValue)) { case DEVICE_DESCRIPTOR: - if (deviceDesc() != NULL) - { + if (deviceDesc() != NULL) { if ((deviceDesc()[0] == DEVICE_DESCRIPTOR_LENGTH) \ - && (deviceDesc()[1] == DEVICE_DESCRIPTOR)) - { + && (deviceDesc()[1] == DEVICE_DESCRIPTOR)) { #ifdef DEBUG printf("device descr\r\n"); #endif transfer.remaining = DEVICE_DESCRIPTOR_LENGTH; - transfer.ptr = (uint8_t*)deviceDesc(); + transfer.ptr = (uint8_t *)deviceDesc(); transfer.direction = DEVICE_TO_HOST; success = true; } } break; case CONFIGURATION_DESCRIPTOR: - if (configurationDesc() != NULL) - { + if (configurationDesc() != NULL) { if ((configurationDesc()[0] == CONFIGURATION_DESCRIPTOR_LENGTH) \ - && (configurationDesc()[1] == CONFIGURATION_DESCRIPTOR)) - { + && (configurationDesc()[1] == CONFIGURATION_DESCRIPTOR)) { #ifdef DEBUG printf("conf descr request\r\n"); #endif /* Get wTotalLength */ transfer.remaining = configurationDesc()[2] \ - | (configurationDesc()[3] << 8); + | (configurationDesc()[3] << 8); - transfer.ptr = (uint8_t*)configurationDesc(); + transfer.ptr = (uint8_t *)configurationDesc(); transfer.direction = DEVICE_TO_HOST; success = true; } @@ -87,62 +80,61 @@ bool USBDevice::requestGetDescriptor(void) #ifdef DEBUG printf("str descriptor\r\n"); #endif - switch (DESCRIPTOR_INDEX(transfer.setup.wValue)) - { - case STRING_OFFSET_LANGID: + switch (DESCRIPTOR_INDEX(transfer.setup.wValue)) { + case STRING_OFFSET_LANGID: #ifdef DEBUG - printf("1\r\n"); + printf("1\r\n"); #endif - transfer.remaining = stringLangidDesc()[0]; - transfer.ptr = (uint8_t*)stringLangidDesc(); - transfer.direction = DEVICE_TO_HOST; - success = true; - break; - case STRING_OFFSET_IMANUFACTURER: + transfer.remaining = stringLangidDesc()[0]; + transfer.ptr = (uint8_t *)stringLangidDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_IMANUFACTURER: #ifdef DEBUG - printf("2\r\n"); + printf("2\r\n"); #endif - transfer.remaining = stringImanufacturerDesc()[0]; - transfer.ptr = (uint8_t*)stringImanufacturerDesc(); - transfer.direction = DEVICE_TO_HOST; - success = true; - break; - case STRING_OFFSET_IPRODUCT: + transfer.remaining = stringImanufacturerDesc()[0]; + transfer.ptr = (uint8_t *)stringImanufacturerDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_IPRODUCT: #ifdef DEBUG - printf("3\r\n"); + printf("3\r\n"); #endif - transfer.remaining = stringIproductDesc()[0]; - transfer.ptr = (uint8_t*)stringIproductDesc(); - transfer.direction = DEVICE_TO_HOST; - success = true; - break; - case STRING_OFFSET_ISERIAL: + transfer.remaining = stringIproductDesc()[0]; + transfer.ptr = (uint8_t *)stringIproductDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_ISERIAL: #ifdef DEBUG - printf("4\r\n"); + printf("4\r\n"); #endif - transfer.remaining = stringIserialDesc()[0]; - transfer.ptr = (uint8_t*)stringIserialDesc(); - transfer.direction = DEVICE_TO_HOST; - success = true; - break; - case STRING_OFFSET_ICONFIGURATION: + transfer.remaining = stringIserialDesc()[0]; + transfer.ptr = (uint8_t *)stringIserialDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_ICONFIGURATION: #ifdef DEBUG - printf("5\r\n"); + printf("5\r\n"); #endif - transfer.remaining = stringIConfigurationDesc()[0]; - transfer.ptr = (uint8_t*)stringIConfigurationDesc(); - transfer.direction = DEVICE_TO_HOST; - success = true; - break; - case STRING_OFFSET_IINTERFACE: + transfer.remaining = stringIConfigurationDesc()[0]; + transfer.ptr = (uint8_t *)stringIConfigurationDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_IINTERFACE: #ifdef DEBUG - printf("6\r\n"); + printf("6\r\n"); #endif - transfer.remaining = stringIinterfaceDesc()[0]; - transfer.ptr = (uint8_t*)stringIinterfaceDesc(); - transfer.direction = DEVICE_TO_HOST; - success = true; - break; + transfer.remaining = stringIinterfaceDesc()[0]; + transfer.ptr = (uint8_t *)stringIinterfaceDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; } break; case INTERFACE_DESCRIPTOR: @@ -185,18 +177,16 @@ bool USBDevice::controlOut(void) uint32_t packetSize; /* Check we should be transferring data OUT */ - if (transfer.direction != HOST_TO_DEVICE) - { - /* for other platforms, count on the HAL to handle this case */ - return false; + if (transfer.direction != HOST_TO_DEVICE) { + /* for other platforms, count on the HAL to handle this case */ + return false; } /* Read from endpoint */ packetSize = EP0getReadResult(buffer); /* Check if transfer size is valid */ - if (packetSize > transfer.remaining) - { + if (packetSize > transfer.remaining) { /* Too big */ return false; } @@ -206,20 +196,16 @@ bool USBDevice::controlOut(void) transfer.remaining -= packetSize; /* Check if transfer has completed */ - if (transfer.remaining == 0) - { + if (transfer.remaining == 0) { /* Transfer completed */ - if (transfer.notify) - { + if (transfer.notify) { /* Notify class layer. */ USBCallback_requestCompleted(buffer, packetSize); transfer.notify = false; } /* Status stage */ EP0write(NULL, 0); - } - else - { + } else { EP0read(); } @@ -233,18 +219,15 @@ bool USBDevice::controlIn(void) /* Check if transfer has completed (status stage transactions */ /* also have transfer.remaining == 0) */ - if (transfer.remaining == 0) - { - if (transfer.zlp) - { + if (transfer.remaining == 0) { + if (transfer.zlp) { /* Send zero length packet */ EP0write(NULL, 0); transfer.zlp = false; } /* Transfer completed */ - if (transfer.notify) - { + if (transfer.notify) { /* Notify class layer. */ USBCallback_requestCompleted(NULL, 0); transfer.notify = false; @@ -258,15 +241,13 @@ bool USBDevice::controlIn(void) } /* Check we should be transferring data IN */ - if (transfer.direction != DEVICE_TO_HOST) - { + if (transfer.direction != DEVICE_TO_HOST) { return false; } packetSize = transfer.remaining; - if (packetSize > MAX_PACKET_SIZE_EP0) - { + if (packetSize > MAX_PACKET_SIZE_EP0) { packetSize = MAX_PACKET_SIZE_EP0; } @@ -285,12 +266,9 @@ bool USBDevice::requestSetAddress(void) /* Set the device address */ setAddress(transfer.setup.wValue); - if (transfer.setup.wValue == 0) - { + if (transfer.setup.wValue == 0) { device.state = DEFAULT; - } - else - { + } else { device.state = ADDRESS; } @@ -302,22 +280,16 @@ bool USBDevice::requestSetConfiguration(void) device.configuration = transfer.setup.wValue; /* Set the device configuration */ - if (device.configuration == 0) - { + if (device.configuration == 0) { /* Not configured */ unconfigureDevice(); device.state = ADDRESS; - } - else - { - if (USBCallback_setConfiguration(device.configuration)) - { + } else { + if (USBCallback_setConfiguration(device.configuration)) { /* Valid configuration */ configureDevice(); device.state = CONFIGURED; - } - else - { + } else { return false; } } @@ -338,8 +310,7 @@ bool USBDevice::requestGetInterface(void) { /* Return the selected alternate setting for an interface */ - if (device.state != CONFIGURED) - { + if (device.state != CONFIGURED) { return false; } @@ -354,8 +325,7 @@ bool USBDevice::requestGetInterface(void) bool USBDevice::requestSetInterface(void) { bool success = false; - if(USBCallback_setInterface(transfer.setup.wIndex, transfer.setup.wValue)) - { + if (USBCallback_setInterface(transfer.setup.wIndex, transfer.setup.wValue)) { success = true; currentInterface = transfer.setup.wIndex; currentAlternate = transfer.setup.wValue; @@ -367,23 +337,19 @@ bool USBDevice::requestSetFeature() { bool success = false; - if (device.state != CONFIGURED) - { + if (device.state != CONFIGURED) { /* Endpoint or interface must be zero */ - if (transfer.setup.wIndex != 0) - { + if (transfer.setup.wIndex != 0) { return false; } } - switch (transfer.setup.bmRequestType.Recipient) - { + switch (transfer.setup.bmRequestType.Recipient) { case DEVICE_RECIPIENT: /* TODO: Remote wakeup feature not supported */ break; case ENDPOINT_RECIPIENT: - if (transfer.setup.wValue == ENDPOINT_HALT) - { + if (transfer.setup.wValue == ENDPOINT_HALT) { /* TODO: We should check that the endpoint number is valid */ stallEndpoint( WINDEX_TO_PHYSICAL(transfer.setup.wIndex)); @@ -401,25 +367,21 @@ bool USBDevice::requestClearFeature() { bool success = false; - if (device.state != CONFIGURED) - { + if (device.state != CONFIGURED) { /* Endpoint or interface must be zero */ - if (transfer.setup.wIndex != 0) - { + if (transfer.setup.wIndex != 0) { return false; } } - switch (transfer.setup.bmRequestType.Recipient) - { + switch (transfer.setup.bmRequestType.Recipient) { case DEVICE_RECIPIENT: /* TODO: Remote wakeup feature not supported */ break; case ENDPOINT_RECIPIENT: /* TODO: We should check that the endpoint number is valid */ - if (transfer.setup.wValue == ENDPOINT_HALT) - { - unstallEndpoint( WINDEX_TO_PHYSICAL(transfer.setup.wIndex)); + if (transfer.setup.wValue == ENDPOINT_HALT) { + unstallEndpoint(WINDEX_TO_PHYSICAL(transfer.setup.wIndex)); success = true; } break; @@ -435,17 +397,14 @@ bool USBDevice::requestGetStatus(void) static uint16_t status; bool success = false; - if (device.state != CONFIGURED) - { + if (device.state != CONFIGURED) { /* Endpoint or interface must be zero */ - if (transfer.setup.wIndex != 0) - { + if (transfer.setup.wIndex != 0) { return false; } } - switch (transfer.setup.bmRequestType.Recipient) - { + switch (transfer.setup.bmRequestType.Recipient) { case DEVICE_RECIPIENT: /* TODO: Currently only supports self powered devices */ status = DEVICE_STATUS_SELF_POWERED; @@ -458,12 +417,9 @@ bool USBDevice::requestGetStatus(void) case ENDPOINT_RECIPIENT: /* TODO: We should check that the endpoint number is valid */ if (getEndpointStallState( - WINDEX_TO_PHYSICAL(transfer.setup.wIndex))) - { + WINDEX_TO_PHYSICAL(transfer.setup.wIndex))) { status = ENDPOINT_STATUS_HALT; - } - else - { + } else { status = 0; } success = true; @@ -472,8 +428,7 @@ bool USBDevice::requestGetStatus(void) break; } - if (success) - { + if (success) { /* Send the status */ transfer.ptr = (uint8_t *)&status; /* Assumes little endian */ transfer.remaining = sizeof(status); @@ -488,43 +443,41 @@ bool USBDevice::requestSetup(void) bool success = false; /* Process standard requests */ - if ((transfer.setup.bmRequestType.Type == STANDARD_TYPE)) - { - switch (transfer.setup.bRequest) - { - case GET_STATUS: - success = requestGetStatus(); - break; - case CLEAR_FEATURE: - success = requestClearFeature(); - break; - case SET_FEATURE: - success = requestSetFeature(); - break; - case SET_ADDRESS: + if ((transfer.setup.bmRequestType.Type == STANDARD_TYPE)) { + switch (transfer.setup.bRequest) { + case GET_STATUS: + success = requestGetStatus(); + break; + case CLEAR_FEATURE: + success = requestClearFeature(); + break; + case SET_FEATURE: + success = requestSetFeature(); + break; + case SET_ADDRESS: success = requestSetAddress(); - break; - case GET_DESCRIPTOR: - success = requestGetDescriptor(); - break; - case SET_DESCRIPTOR: - /* TODO: Support is optional, not implemented here */ - success = false; - break; - case GET_CONFIGURATION: - success = requestGetConfiguration(); - break; - case SET_CONFIGURATION: - success = requestSetConfiguration(); - break; - case GET_INTERFACE: - success = requestGetInterface(); - break; - case SET_INTERFACE: - success = requestSetInterface(); - break; - default: - break; + break; + case GET_DESCRIPTOR: + success = requestGetDescriptor(); + break; + case SET_DESCRIPTOR: + /* TODO: Support is optional, not implemented here */ + success = false; + break; + case GET_CONFIGURATION: + success = requestGetConfiguration(); + break; + case SET_CONFIGURATION: + success = requestSetConfiguration(); + break; + case GET_INTERFACE: + success = requestGetInterface(); + break; + case SET_INTERFACE: + success = requestSetInterface(); + break; + default: + break; } } @@ -549,23 +502,21 @@ bool USBDevice::controlSetup(void) transfer.notify = false; #ifdef DEBUG - printf("dataTransferDirection: %d\r\nType: %d\r\nRecipient: %d\r\nbRequest: %d\r\nwValue: %d\r\nwIndex: %d\r\nwLength: %d\r\n",transfer.setup.bmRequestType.dataTransferDirection, - transfer.setup.bmRequestType.Type, - transfer.setup.bmRequestType.Recipient, - transfer.setup.bRequest, - transfer.setup.wValue, - transfer.setup.wIndex, - transfer.setup.wLength); + printf("dataTransferDirection: %d\r\nType: %d\r\nRecipient: %d\r\nbRequest: %d\r\nwValue: %d\r\nwIndex: %d\r\nwLength: %d\r\n", transfer.setup.bmRequestType.dataTransferDirection, + transfer.setup.bmRequestType.Type, + transfer.setup.bmRequestType.Recipient, + transfer.setup.bRequest, + transfer.setup.wValue, + transfer.setup.wIndex, + transfer.setup.wLength); #endif /* Class / vendor specific */ success = USBCallback_request(); - if (!success) - { + if (!success) { /* Standard requests */ - if (!requestSetup()) - { + if (!requestSetup()) { #ifdef DEBUG printf("fail!!!!\r\n"); #endif @@ -574,62 +525,47 @@ bool USBDevice::controlSetup(void) } /* Check transfer size and direction */ - if (transfer.setup.wLength>0) - { + if (transfer.setup.wLength > 0) { if (transfer.setup.bmRequestType.dataTransferDirection \ - == DEVICE_TO_HOST) - { + == DEVICE_TO_HOST) { /* IN data stage is required */ - if (transfer.direction != DEVICE_TO_HOST) - { + if (transfer.direction != DEVICE_TO_HOST) { return false; } /* Transfer must be less than or equal to the size */ /* requested by the host */ - if (transfer.remaining > transfer.setup.wLength) - { + if (transfer.remaining > transfer.setup.wLength) { transfer.remaining = transfer.setup.wLength; } - } - else - { + } else { /* OUT data stage is required */ - if (transfer.direction != HOST_TO_DEVICE) - { + if (transfer.direction != HOST_TO_DEVICE) { return false; } /* Transfer must be equal to the size requested by the host */ - if (transfer.remaining != transfer.setup.wLength) - { + if (transfer.remaining != transfer.setup.wLength) { return false; } } - } - else - { + } else { /* No data stage; transfer size must be zero */ - if (transfer.remaining != 0) - { + if (transfer.remaining != 0) { return false; } } /* Data or status stage if applicable */ - if (transfer.setup.wLength>0) - { + if (transfer.setup.wLength > 0) { if (transfer.setup.bmRequestType.dataTransferDirection \ - == DEVICE_TO_HOST) - { + == DEVICE_TO_HOST) { /* Check if we'll need to send a zero length packet at */ /* the end of this transfer */ - if (transfer.setup.wLength > transfer.remaining) - { + if (transfer.setup.wLength > transfer.remaining) { /* Device wishes to transfer less than host requested */ - if ((transfer.remaining % MAX_PACKET_SIZE_EP0) == 0) - { + if ((transfer.remaining % MAX_PACKET_SIZE_EP0) == 0) { /* Transfer is a multiple of EP0 max packet size */ transfer.zlp = true; } @@ -637,15 +573,11 @@ bool USBDevice::controlSetup(void) /* IN stage */ controlIn(); - } - else - { + } else { /* OUT stage */ EP0read(); } - } - else - { + } else { /* Status stage */ EP0write(NULL, 0); } @@ -666,8 +598,7 @@ void USBDevice::busReset(void) void USBDevice::EP0setupCallback(void) { /* Endpoint 0 setup event */ - if (!controlSetup()) - { + if (!controlSetup()) { /* Protocol stall */ EP0stall(); } @@ -678,8 +609,7 @@ void USBDevice::EP0setupCallback(void) void USBDevice::EP0out(void) { /* Endpoint 0 OUT data event */ - if (!controlOut()) - { + if (!controlOut()) { /* Protocol stall; this will stall both endpoints */ EP0stall(); } @@ -691,8 +621,7 @@ void USBDevice::EP0in(void) printf("EP0IN\r\n"); #endif /* Endpoint 0 IN data event */ - if (!controlIn()) - { + if (!controlIn()) { /* Protocol stall; this will stall both endpoints */ EP0stall(); } @@ -719,14 +648,14 @@ void USBDevice::disconnect(void) { /* Disconnect device */ USBHAL::disconnect(); - + /* Set initial device state */ device.state = POWERED; device.configuration = 0; device.suspended = false; } -CONTROL_TRANSFER * USBDevice::getTransferPtr(void) +CONTROL_TRANSFER *USBDevice::getTransferPtr(void) { return &transfer; } @@ -742,40 +671,37 @@ bool USBDevice::addRateFeedbackEndpoint(uint8_t endpoint, uint32_t maxPacket) return realiseEndpoint(endpoint, maxPacket, RATE_FEEDBACK_MODE); } -uint8_t * USBDevice::findDescriptor(uint8_t descriptorType) +uint8_t *USBDevice::findDescriptor(uint8_t descriptorType) { /* Find a descriptor within the list of descriptors */ /* following a configuration descriptor. */ uint16_t wTotalLength; uint8_t *ptr; - if (configurationDesc() == NULL) - { + if (configurationDesc() == NULL) { return NULL; } /* Check this is a configuration descriptor */ if ((configurationDesc()[0] != CONFIGURATION_DESCRIPTOR_LENGTH) \ - || (configurationDesc()[1] != CONFIGURATION_DESCRIPTOR)) - { + || (configurationDesc()[1] != CONFIGURATION_DESCRIPTOR)) { return NULL; } wTotalLength = configurationDesc()[2] | (configurationDesc()[3] << 8); /* Check there are some more descriptors to follow */ - if (wTotalLength <= (CONFIGURATION_DESCRIPTOR_LENGTH+2)) - /* +2 is for bLength and bDescriptorType of next descriptor */ + if (wTotalLength <= (CONFIGURATION_DESCRIPTOR_LENGTH + 2)) + /* +2 is for bLength and bDescriptorType of next descriptor */ { return NULL; } /* Start at first descriptor after the configuration descriptor */ - ptr = &(((uint8_t*)configurationDesc())[CONFIGURATION_DESCRIPTOR_LENGTH]); + ptr = &(((uint8_t *)configurationDesc())[CONFIGURATION_DESCRIPTOR_LENGTH]); do { - if (ptr[1] /* bDescriptorType */ == descriptorType) - { + if (ptr[1] /* bDescriptorType */ == descriptorType) { /* Found */ return ptr; } @@ -798,7 +724,8 @@ void USBDevice::suspendStateChanged(unsigned int suspended) } -USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release){ +USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release) +{ VENDOR_ID = vendor_id; PRODUCT_ID = product_id; PRODUCT_RELEASE = product_release; @@ -816,25 +743,23 @@ bool USBDevice::readStart(uint8_t endpoint, uint32_t maxSize) } -bool USBDevice::write(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_t maxSize) +bool USBDevice::write(uint8_t endpoint, uint8_t *buffer, uint32_t size, uint32_t maxSize) { EP_STATUS result; - if (size > maxSize) - { + if (size > maxSize) { return false; } - if(!configured()) { + if (!configured()) { return false; } /* Send report */ result = endpointWrite(endpoint, buffer, size); - if (result != EP_PENDING) - { + if (result != EP_PENDING) { return false; } @@ -847,24 +772,22 @@ bool USBDevice::write(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_ } -bool USBDevice::writeNB(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_t maxSize) +bool USBDevice::writeNB(uint8_t endpoint, uint8_t *buffer, uint32_t size, uint32_t maxSize) { EP_STATUS result; - if (size > maxSize) - { + if (size > maxSize) { return false; } - if(!configured()) { + if (!configured()) { return false; } /* Send report */ result = endpointWrite(endpoint, buffer, size); - if (result != EP_PENDING) - { + if (result != EP_PENDING) { return false; } @@ -875,11 +798,11 @@ bool USBDevice::writeNB(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint3 -bool USBDevice::readEP(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint32_t maxSize) +bool USBDevice::readEP(uint8_t endpoint, uint8_t *buffer, uint32_t *size, uint32_t maxSize) { EP_STATUS result; - if(!configured()) { + if (!configured()) { return false; } @@ -892,11 +815,11 @@ bool USBDevice::readEP(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint } -bool USBDevice::readEP_NB(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint32_t maxSize) +bool USBDevice::readEP_NB(uint8_t endpoint, uint8_t *buffer, uint32_t *size, uint32_t maxSize) { EP_STATUS result; - if(!configured()) { + if (!configured()) { return false; } @@ -907,7 +830,8 @@ bool USBDevice::readEP_NB(uint8_t endpoint, uint8_t * buffer, uint32_t * size, u -const uint8_t * USBDevice::deviceDesc() { +const uint8_t *USBDevice::deviceDesc() +{ uint8_t deviceDescriptorTemp[] = { DEVICE_DESCRIPTOR_LENGTH, /* bLength */ DEVICE_DESCRIPTOR, /* bDescriptorType */ @@ -933,56 +857,62 @@ const uint8_t * USBDevice::deviceDesc() { return deviceDescriptor; } -const uint8_t * USBDevice::stringLangidDesc() { +const uint8_t *USBDevice::stringLangidDesc() +{ static const uint8_t stringLangidDescriptor[] = { 0x04, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ - 0x09,0x04, /*bString Lang ID - 0x0409 - English*/ + 0x09, 0x04, /*bString Lang ID - 0x0409 - English*/ }; return (uint8_t *)stringLangidDescriptor; } -const uint8_t * USBDevice::stringImanufacturerDesc() { +const uint8_t *USBDevice::stringImanufacturerDesc() +{ static const uint8_t stringImanufacturerDescriptor[] = { 0x12, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ - 'm',0,'b',0,'e',0,'d',0,'.',0,'o',0,'r',0,'g',0, /*bString iManufacturer - mbed.org*/ + 'm', 0, 'b', 0, 'e', 0, 'd', 0, '.', 0, 'o', 0, 'r', 0, 'g', 0, /*bString iManufacturer - mbed.org*/ }; return stringImanufacturerDescriptor; } -const uint8_t * USBDevice::stringIserialDesc() { +const uint8_t *USBDevice::stringIserialDesc() +{ static const uint8_t stringIserialDescriptor[] = { 0x16, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ - '0',0,'1',0,'2',0,'3',0,'4',0,'5',0,'6',0,'7',0,'8',0,'9',0, /*bString iSerial - 0123456789*/ + '0', 0, '1', 0, '2', 0, '3', 0, '4', 0, '5', 0, '6', 0, '7', 0, '8', 0, '9', 0, /*bString iSerial - 0123456789*/ }; return stringIserialDescriptor; } -const uint8_t * USBDevice::stringIConfigurationDesc() { +const uint8_t *USBDevice::stringIConfigurationDesc() +{ static const uint8_t stringIconfigurationDescriptor[] = { 0x06, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ - '0',0,'1',0, /*bString iConfiguration - 01*/ + '0', 0, '1', 0, /*bString iConfiguration - 01*/ }; return stringIconfigurationDescriptor; } -const uint8_t * USBDevice::stringIinterfaceDesc() { +const uint8_t *USBDevice::stringIinterfaceDesc() +{ static const uint8_t stringIinterfaceDescriptor[] = { 0x08, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ - 'U',0,'S',0,'B',0, /*bString iInterface - USB*/ + 'U', 0, 'S', 0, 'B', 0, /*bString iInterface - USB*/ }; return stringIinterfaceDescriptor; } -const uint8_t * USBDevice::stringIproductDesc() { +const uint8_t *USBDevice::stringIproductDesc() +{ static const uint8_t stringIproductDescriptor[] = { 0x16, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ - 'U',0,'S',0,'B',0,' ',0,'D',0,'E',0,'V',0,'I',0,'C',0,'E',0 /*bString iProduct - USB DEVICE*/ + 'U', 0, 'S', 0, 'B', 0, ' ', 0, 'D', 0, 'E', 0, 'V', 0, 'I', 0, 'C', 0, 'E', 0 /*bString iProduct - USB DEVICE*/ }; return stringIproductDescriptor; } diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 60a280ed658..9ee962841de 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -1,20 +1,18 @@ -/* Copyright (c) 2010-2011 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #ifndef USBDEVICE_H #define USBDEVICE_H @@ -23,8 +21,7 @@ #include "USBDevice_Types.h" #include "USBHAL.h" -class USBDevice: public USBHAL -{ +class USBDevice: public USBHAL { public: USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release); @@ -78,7 +75,7 @@ class USBDevice: public USBHAL * @param maxSize the maximum length that can be read * @returns true if successful */ - bool readEP(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint32_t maxSize); + bool readEP(uint8_t endpoint, uint8_t *buffer, uint32_t *size, uint32_t maxSize); /* * Read a certain endpoint. @@ -91,7 +88,7 @@ class USBDevice: public USBHAL * @param maxSize the maximum length that can be read * @returns true if successful */ - bool readEP_NB(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint32_t maxSize); + bool readEP_NB(uint8_t endpoint, uint8_t *buffer, uint32_t *size, uint32_t maxSize); /* * Write a certain endpoint. @@ -103,7 +100,7 @@ class USBDevice: public USBHAL * @param size the number of bytes to write * @param maxSize the maximum length that can be written on this endpoint */ - bool write(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_t maxSize); + bool write(uint8_t endpoint, uint8_t *buffer, uint32_t size, uint32_t maxSize); /* @@ -116,7 +113,7 @@ class USBDevice: public USBHAL * @param size the number of bytes to write * @param maxSize the maximum length that can be written on this endpoint */ - bool writeNB(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_t maxSize); + bool writeNB(uint8_t endpoint, uint8_t *buffer, uint32_t size, uint32_t maxSize); /* @@ -133,7 +130,10 @@ class USBDevice: public USBHAL * * @returns true if class handles this request */ - virtual bool USBCallback_request() { return false; }; + virtual bool USBCallback_request() + { + return false; + }; /* * Called by USBDevice on Endpoint0 request completion @@ -145,7 +145,7 @@ class USBDevice: public USBHAL * @param buf buffer received on endpoint 0 * @param length length of this buffer */ - virtual void USBCallback_requestCompleted(uint8_t * buf, uint32_t length) {}; + virtual void USBCallback_requestCompleted(uint8_t *buf, uint32_t length) {}; /* * Called by USBDevice layer. Set configuration of the device. @@ -153,7 +153,10 @@ class USBDevice: public USBHAL * * @param configuration Number of the configuration */ - virtual bool USBCallback_setConfiguration(uint8_t configuration) { return false; }; + virtual bool USBCallback_setConfiguration(uint8_t configuration) + { + return false; + }; /* * Called by USBDevice layer. Set interface/alternate of the device. @@ -162,70 +165,79 @@ class USBDevice: public USBHAL * @param alternate Number of the alternate to be configured * @returns true if class handles this request */ - virtual bool USBCallback_setInterface(uint16_t interface, uint8_t alternate) { return false; }; + virtual bool USBCallback_setInterface(uint16_t interface, uint8_t alternate) + { + return false; + }; /* * Get device descriptor. * * @returns pointer to the device descriptor */ - virtual const uint8_t * deviceDesc(); + virtual const uint8_t *deviceDesc(); /* * Get configuration descriptor * * @returns pointer to the configuration descriptor */ - virtual const uint8_t * configurationDesc(){return NULL;}; + virtual const uint8_t *configurationDesc() + { + return NULL; + }; /* * Get string lang id descriptor * * @return pointer to the string lang id descriptor */ - virtual const uint8_t * stringLangidDesc(); + virtual const uint8_t *stringLangidDesc(); /* * Get string manufacturer descriptor * * @returns pointer to the string manufacturer descriptor */ - virtual const uint8_t * stringImanufacturerDesc(); + virtual const uint8_t *stringImanufacturerDesc(); /* * Get string product descriptor * * @returns pointer to the string product descriptor */ - virtual const uint8_t * stringIproductDesc(); + virtual const uint8_t *stringIproductDesc(); /* * Get string serial descriptor * * @returns pointer to the string serial descriptor */ - virtual const uint8_t * stringIserialDesc(); + virtual const uint8_t *stringIserialDesc(); /* * Get string configuration descriptor * * @returns pointer to the string configuration descriptor */ - virtual const uint8_t * stringIConfigurationDesc(); + virtual const uint8_t *stringIConfigurationDesc(); /* * Get string interface descriptor * * @returns pointer to the string interface descriptor */ - virtual const uint8_t * stringIinterfaceDesc(); + virtual const uint8_t *stringIinterfaceDesc(); /* * Get the length of the report descriptor * * @returns length of the report descriptor */ - virtual uint16_t reportDescLength() { return 0; }; + virtual uint16_t reportDescLength() + { + return 0; + }; @@ -236,8 +248,8 @@ class USBDevice: public USBHAL virtual void EP0in(void); virtual void connectStateChanged(unsigned int connected); virtual void suspendStateChanged(unsigned int suspended); - uint8_t * findDescriptor(uint8_t descriptorType); - CONTROL_TRANSFER * getTransferPtr(void); + uint8_t *findDescriptor(uint8_t descriptorType); + CONTROL_TRANSFER *getTransferPtr(void); uint16_t VENDOR_ID; uint16_t PRODUCT_ID; diff --git a/usb/device/USBDevice/USBDevice_Types.h b/usb/device/USBDevice/USBDevice_Types.h index 19bc1c2f348..543e8a678f8 100644 --- a/usb/device/USBDevice/USBDevice_Types.h +++ b/usb/device/USBDevice/USBDevice_Types.h @@ -1,20 +1,18 @@ -/* Copyright (c) 2010-2011 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #ifndef USBDEVICE_TYPES_H #define USBDEVICE_TYPES_H From d1b27a63180b3b4a452f656f95abb96fcbeea76c Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 27 Feb 2018 10:23:14 -0600 Subject: [PATCH 129/488] Update USBDevice and configure to use a USBPhy Update the USBDevice class API so it matches mbed-os's naming conventions, has a more robust API and uses USBPhy as its backend. --- usb/device/USBDevice/USBDescriptor.h | 8 +- usb/device/USBDevice/USBDevice.cpp | 1169 +++++++++++++++++------- usb/device/USBDevice/USBDevice.h | 596 ++++++++---- usb/device/USBDevice/USBDevice_Types.h | 29 - 4 files changed, 1292 insertions(+), 510 deletions(-) diff --git a/usb/device/USBDevice/USBDescriptor.h b/usb/device/USBDevice/USBDescriptor.h index afc9684086a..730327972d6 100644 --- a/usb/device/USBDevice/USBDescriptor.h +++ b/usb/device/USBDevice/USBDescriptor.h @@ -14,6 +14,9 @@ * limitations under the License. */ +#ifndef USBDESCRIPTOR_H +#define USBDESCRIPTOR_H + /* Standard descriptor types */ #define DEVICE_DESCRIPTOR (1) #define CONFIGURATION_DESCRIPTOR (2) @@ -44,9 +47,6 @@ #define LSB(n) ((n)&0xff) #define MSB(n) (((n)&0xff00)>>8) -/* Convert physical endpoint number to descriptor endpoint number */ -#define PHY_TO_DESC(endpoint) (((endpoint)>>1) | (((endpoint) & 1) ? 0x80:0)) - /* bmAttributes in configuration descriptor */ /* C_RESERVED must always be set */ #define C_RESERVED (1U<<7) @@ -70,3 +70,5 @@ #define E_DATA (0x00) #define E_FEEDBACK (0x10) #define E_IMPLICIT_FEEDBACK (0x20) + +#endif diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 32a03422f37..828ec145717 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -16,9 +16,9 @@ #include "stdint.h" -#include "USBEndpoints.h" #include "USBDevice.h" #include "USBDescriptor.h" +#include "usb_phy_api.h" //#define DEBUG @@ -33,45 +33,59 @@ #define DEVICE_REMOTE_WAKEUP (1) #define ENDPOINT_HALT (0) -/* Macro to convert wIndex endpoint number to physical endpoint number */ -#define WINDEX_TO_PHYSICAL(endpoint) (((endpoint & 0x0f) << 1) + \ - ((endpoint & 0x80) ? 1 : 0)) +/* Endpoint macros */ +#define EP_INDEXABLE(endpoint) (EP_VALID(endpoint) && !EP_CONTROL(endpoint)) +#define EP_TO_INDEX(endpoint) ((((endpoint & 0xf) << 1) | (endpoint & 0x80 ? 1 : 0)) - 2) +#define EP_VALID(endpoint) (((endpoint) & ~0x8F) == 0) +#define EP_CONTROL(endpoint) (((endpoint) & 0xF) == 0) +#define EP_RX(endpoint) ((endpoint) & 0x80) +/* Other defines */ +#define ENDPOINT_ENABLED (1 << 0) +#define ENDPOINT_STALLED (1 << 1) -bool USBDevice::requestGetDescriptor(void) +#if defined(MAX_PACKET_SIZE_EP0) +#undef MAX_PACKET_SIZE_EP0 +#endif +#define MAX_PACKET_SIZE_EP0 64 + + +bool USBDevice::_request_get_descriptor() { + assert_locked(); + bool success = false; #ifdef DEBUG - printf("get descr: type: %d\r\n", DESCRIPTOR_TYPE(transfer.setup.wValue)); + printf("get descr: type: %d\r\n", DESCRIPTOR_TYPE(_transfer.setup.wValue)); #endif - switch (DESCRIPTOR_TYPE(transfer.setup.wValue)) { + switch (DESCRIPTOR_TYPE(_transfer.setup.wValue)) { case DEVICE_DESCRIPTOR: - if (deviceDesc() != NULL) { - if ((deviceDesc()[0] == DEVICE_DESCRIPTOR_LENGTH) \ - && (deviceDesc()[1] == DEVICE_DESCRIPTOR)) { + if (device_desc() != NULL) { + if ((device_desc()[0] == DEVICE_DESCRIPTOR_LENGTH) \ + && (device_desc()[1] == DEVICE_DESCRIPTOR)) { #ifdef DEBUG printf("device descr\r\n"); #endif - transfer.remaining = DEVICE_DESCRIPTOR_LENGTH; - transfer.ptr = (uint8_t *)deviceDesc(); - transfer.direction = DEVICE_TO_HOST; + _transfer.remaining = DEVICE_DESCRIPTOR_LENGTH; + _transfer.ptr = (uint8_t *)device_desc(); + _transfer.direction = Send; success = true; } } break; case CONFIGURATION_DESCRIPTOR: - if (configurationDesc() != NULL) { - if ((configurationDesc()[0] == CONFIGURATION_DESCRIPTOR_LENGTH) \ - && (configurationDesc()[1] == CONFIGURATION_DESCRIPTOR)) { + if (configuration_desc() != NULL) { + if ((configuration_desc()[0] == CONFIGURATION_DESCRIPTOR_LENGTH) \ + && (configuration_desc()[1] == CONFIGURATION_DESCRIPTOR)) { #ifdef DEBUG printf("conf descr request\r\n"); #endif /* Get wTotalLength */ - transfer.remaining = configurationDesc()[2] \ - | (configurationDesc()[3] << 8); + _transfer.remaining = configuration_desc()[2] \ + | (configuration_desc()[3] << 8); - transfer.ptr = (uint8_t *)configurationDesc(); - transfer.direction = DEVICE_TO_HOST; + _transfer.ptr = (uint8_t *)configuration_desc(); + _transfer.direction = Send; success = true; } } @@ -80,59 +94,59 @@ bool USBDevice::requestGetDescriptor(void) #ifdef DEBUG printf("str descriptor\r\n"); #endif - switch (DESCRIPTOR_INDEX(transfer.setup.wValue)) { + switch (DESCRIPTOR_INDEX(_transfer.setup.wValue)) { case STRING_OFFSET_LANGID: #ifdef DEBUG printf("1\r\n"); #endif - transfer.remaining = stringLangidDesc()[0]; - transfer.ptr = (uint8_t *)stringLangidDesc(); - transfer.direction = DEVICE_TO_HOST; + _transfer.remaining = string_langid_desc()[0]; + _transfer.ptr = (uint8_t *)string_langid_desc(); + _transfer.direction = Send; success = true; break; case STRING_OFFSET_IMANUFACTURER: #ifdef DEBUG printf("2\r\n"); #endif - transfer.remaining = stringImanufacturerDesc()[0]; - transfer.ptr = (uint8_t *)stringImanufacturerDesc(); - transfer.direction = DEVICE_TO_HOST; + _transfer.remaining = string_imanufacturer_desc()[0]; + _transfer.ptr = (uint8_t *)string_imanufacturer_desc(); + _transfer.direction = Send; success = true; break; case STRING_OFFSET_IPRODUCT: #ifdef DEBUG printf("3\r\n"); #endif - transfer.remaining = stringIproductDesc()[0]; - transfer.ptr = (uint8_t *)stringIproductDesc(); - transfer.direction = DEVICE_TO_HOST; + _transfer.remaining = string_iproduct_desc()[0]; + _transfer.ptr = (uint8_t *)string_iproduct_desc(); + _transfer.direction = Send; success = true; break; case STRING_OFFSET_ISERIAL: #ifdef DEBUG printf("4\r\n"); #endif - transfer.remaining = stringIserialDesc()[0]; - transfer.ptr = (uint8_t *)stringIserialDesc(); - transfer.direction = DEVICE_TO_HOST; + _transfer.remaining = string_iserial_desc()[0]; + _transfer.ptr = (uint8_t *)string_iserial_desc(); + _transfer.direction = Send; success = true; break; case STRING_OFFSET_ICONFIGURATION: #ifdef DEBUG printf("5\r\n"); #endif - transfer.remaining = stringIConfigurationDesc()[0]; - transfer.ptr = (uint8_t *)stringIConfigurationDesc(); - transfer.direction = DEVICE_TO_HOST; + _transfer.remaining = string_iconfiguration_desc()[0]; + _transfer.ptr = (uint8_t *)string_iconfiguration_desc(); + _transfer.direction = Send; success = true; break; case STRING_OFFSET_IINTERFACE: #ifdef DEBUG printf("6\r\n"); #endif - transfer.remaining = stringIinterfaceDesc()[0]; - transfer.ptr = (uint8_t *)stringIinterfaceDesc(); - transfer.direction = DEVICE_TO_HOST; + _transfer.remaining = string_iinterface_desc()[0]; + _transfer.ptr = (uint8_t *)string_iinterface_desc(); + _transfer.direction = Send; success = true; break; } @@ -157,9 +171,11 @@ bool USBDevice::requestGetDescriptor(void) return success; } -void USBDevice::decodeSetupPacket(uint8_t *data, SETUP_PACKET *packet) +void USBDevice::_decode_setup_packet(uint8_t *data, setup_packet_t *packet) { - /* Fill in the elements of a SETUP_PACKET structure from raw data */ + // No lock needed - stateless function + + /* Fill in the elements of a setup_packet_t structure from raw data */ packet->bmRequestType.dataTransferDirection = (data[0] & 0x80) >> 7; packet->bmRequestType.Type = (data[0] & 0x60) >> 5; packet->bmRequestType.Recipient = data[0] & 0x1f; @@ -170,189 +186,281 @@ void USBDevice::decodeSetupPacket(uint8_t *data, SETUP_PACKET *packet) } -bool USBDevice::controlOut(void) +bool USBDevice::_control_out() { + assert_locked(); + /* Control transfer data OUT stage */ - uint8_t buffer[MAX_PACKET_SIZE_EP0]; uint32_t packetSize; /* Check we should be transferring data OUT */ - if (transfer.direction != HOST_TO_DEVICE) { + if (_transfer.direction != Receive) { /* for other platforms, count on the HAL to handle this case */ return false; } /* Read from endpoint */ - packetSize = EP0getReadResult(buffer); + packetSize = _phy->ep0_read_result(_transfer.ptr, _transfer.remaining); /* Check if transfer size is valid */ - if (packetSize > transfer.remaining) { + if (packetSize > _transfer.remaining) { /* Too big */ return false; } /* Update transfer */ - transfer.ptr += packetSize; - transfer.remaining -= packetSize; + _transfer.ptr += packetSize; + _transfer.remaining -= packetSize; /* Check if transfer has completed */ - if (transfer.remaining == 0) { + if (_transfer.remaining == 0) { /* Transfer completed */ - if (transfer.notify) { + if (_transfer.notify) { /* Notify class layer. */ - USBCallback_requestCompleted(buffer, packetSize); - transfer.notify = false; + _transfer.notify = false; + _transfer.user_callback = true; + callback_request_xfer_done(&_transfer.setup, false); + } else { + complete_request_xfer_done(true); } - /* Status stage */ - EP0write(NULL, 0); } else { - EP0read(); + _phy->ep0_read(); } return true; } -bool USBDevice::controlIn(void) +bool USBDevice::_control_in() { + assert_locked(); + /* Control transfer data IN stage */ uint32_t packetSize; - /* Check if transfer has completed (status stage transactions */ - /* also have transfer.remaining == 0) */ - if (transfer.remaining == 0) { - if (transfer.zlp) { - /* Send zero length packet */ - EP0write(NULL, 0); - transfer.zlp = false; + + /* Check we should be transferring data IN */ + if (_transfer.direction != Send) { + return false; + } + + if (_transfer.remaining == 0) { + if (!_transfer.zlp) { + /* Status as already been sent so ignore this IN. */ + return true; } + /* ZLP will be sent below */ + _transfer.zlp = false; + } + + packetSize = _transfer.remaining; + if (packetSize > _max_packet_size_ep0) { + packetSize = _max_packet_size_ep0; + } + + /* Write to endpoint */ + _phy->ep0_write(_transfer.ptr, packetSize); + + /* Update transfer */ + _transfer.ptr += packetSize; + _transfer.remaining -= packetSize; + + /* Send status if all the data has been sent + * NOTE - Start the status stage immediately + * after writing the last packet. Do not wait + * for the next IN event, as this can be dropped + * if the ACK by the host is corrupted. + * + * For more info on this see section + * 8.5.3.2 of the USB2.0 specification. + */ + if ((_transfer.remaining == 0) && !_transfer.zlp) { /* Transfer completed */ - if (transfer.notify) { + if (_transfer.notify) { /* Notify class layer. */ - USBCallback_requestCompleted(NULL, 0); - transfer.notify = false; + _transfer.notify = false; + _transfer.user_callback = true; + callback_request_xfer_done(&_transfer.setup, false); + } else { + complete_request_xfer_done(true); } - EP0read(); - EP0readStage(); /* Completed */ return true; } - /* Check we should be transferring data IN */ - if (transfer.direction != DEVICE_TO_HOST) { - return false; - } - packetSize = transfer.remaining; + return true; +} + +void USBDevice::complete_request_xfer_done(bool success) +{ + lock(); - if (packetSize > MAX_PACKET_SIZE_EP0) { - packetSize = MAX_PACKET_SIZE_EP0; + _transfer.user_callback = false; + if (_abort_control) { + _control_abort(); + unlock(); + return; } - /* Write to endpoint */ - EP0write(transfer.ptr, packetSize); + if (!success) { + _phy->ep0_stall(); + unlock(); + return; + } - /* Update transfer */ - transfer.ptr += packetSize; - transfer.remaining -= packetSize; + /* Status stage */ + if (_transfer.stage == DataOut) { + _transfer.stage = Status; + _phy->ep0_write(NULL, 0); + } else if (_transfer.stage == DataIn) { + _transfer.stage = Status; + _phy->ep0_read(); + } - return true; + unlock(); } -bool USBDevice::requestSetAddress(void) +bool USBDevice::_request_set_address() { + assert_locked(); + /* Set the device address */ - setAddress(transfer.setup.wValue); + _phy->set_address(_transfer.setup.wValue); - if (transfer.setup.wValue == 0) { - device.state = DEFAULT; + if (_transfer.setup.wValue == 0) { + _change_state(Default); } else { - device.state = ADDRESS; + _change_state(Address); } return true; } -bool USBDevice::requestSetConfiguration(void) +bool USBDevice::_request_set_configuration() { + assert_locked(); - device.configuration = transfer.setup.wValue; + _device.configuration = _transfer.setup.wValue; /* Set the device configuration */ - if (device.configuration == 0) { + if (_device.configuration == 0) { /* Not configured */ - unconfigureDevice(); - device.state = ADDRESS; + _phy->unconfigure(); + _change_state(Address); } else { - if (USBCallback_setConfiguration(device.configuration)) { - /* Valid configuration */ - configureDevice(); - device.state = CONFIGURED; - } else { - return false; - } + _transfer.user_callback = true; + callback_set_configuration(_device.configuration); } return true; } -bool USBDevice::requestGetConfiguration(void) +void USBDevice::complete_set_configuration(bool success) { + lock(); + + _transfer.user_callback = false; + if (_abort_control) { + _control_abort(); + unlock(); + return; + } + + if (success) { + /* Valid configuration */ + _phy->configure(); + _change_state(Configured); + _control_setup_continue(); + } else { + _phy->ep0_stall(); + } + + unlock(); +} + +bool USBDevice::_request_get_configuration() +{ + assert_locked(); + /* Send the device configuration */ - transfer.ptr = &device.configuration; - transfer.remaining = sizeof(device.configuration); - transfer.direction = DEVICE_TO_HOST; + _transfer.ptr = &_device.configuration; + _transfer.remaining = sizeof(_device.configuration); + _transfer.direction = Send; return true; } -bool USBDevice::requestGetInterface(void) +bool USBDevice::_request_get_interface() { + assert_locked(); + /* Return the selected alternate setting for an interface */ - if (device.state != CONFIGURED) { + if (_device.state != Configured) { return false; } /* Send the alternate setting */ - transfer.setup.wIndex = currentInterface; - transfer.ptr = ¤tAlternate; - transfer.remaining = sizeof(currentAlternate); - transfer.direction = DEVICE_TO_HOST; + _transfer.setup.wIndex = _current_interface; + _transfer.ptr = &_current_alternate; + _transfer.remaining = sizeof(_current_alternate); + _transfer.direction = Send; return true; } -bool USBDevice::requestSetInterface(void) +bool USBDevice::_request_set_interface() { - bool success = false; - if (USBCallback_setInterface(transfer.setup.wIndex, transfer.setup.wValue)) { - success = true; - currentInterface = transfer.setup.wIndex; - currentAlternate = transfer.setup.wValue; + assert_locked(); + + _transfer.user_callback = true; + callback_set_interface(_transfer.setup.wIndex, _transfer.setup.wValue); + return true; +} + +void USBDevice::complete_set_interface(bool success) +{ + lock(); + + _transfer.user_callback = false; + if (_abort_control) { + _control_abort(); + unlock(); + return; } - return success; + + if (success) { + _current_interface = _transfer.setup.wIndex; + _current_alternate = _transfer.setup.wValue; + _control_setup_continue(); + } else { + _phy->ep0_stall(); + } + + unlock(); } -bool USBDevice::requestSetFeature() +bool USBDevice::_request_set_feature() { + assert_locked(); bool success = false; - if (device.state != CONFIGURED) { + if (_device.state != Configured) { /* Endpoint or interface must be zero */ - if (transfer.setup.wIndex != 0) { + if (_transfer.setup.wIndex != 0) { return false; } } - switch (transfer.setup.bmRequestType.Recipient) { + switch (_transfer.setup.bmRequestType.Recipient) { case DEVICE_RECIPIENT: /* TODO: Remote wakeup feature not supported */ break; case ENDPOINT_RECIPIENT: - if (transfer.setup.wValue == ENDPOINT_HALT) { - /* TODO: We should check that the endpoint number is valid */ - stallEndpoint( - WINDEX_TO_PHYSICAL(transfer.setup.wIndex)); + if (!EP_VALID(_transfer.setup.wIndex)) { + break; + } else if (_transfer.setup.wValue == ENDPOINT_HALT) { + _phy->endpoint_stall(_transfer.setup.wIndex); success = true; } break; @@ -363,25 +471,28 @@ bool USBDevice::requestSetFeature() return success; } -bool USBDevice::requestClearFeature() +bool USBDevice::_request_clear_feature() { + assert_locked(); + bool success = false; - if (device.state != CONFIGURED) { + if (_device.state != Configured) { /* Endpoint or interface must be zero */ - if (transfer.setup.wIndex != 0) { + if (_transfer.setup.wIndex != 0) { return false; } } - switch (transfer.setup.bmRequestType.Recipient) { + switch (_transfer.setup.bmRequestType.Recipient) { case DEVICE_RECIPIENT: /* TODO: Remote wakeup feature not supported */ break; case ENDPOINT_RECIPIENT: - /* TODO: We should check that the endpoint number is valid */ - if (transfer.setup.wValue == ENDPOINT_HALT) { - unstallEndpoint(WINDEX_TO_PHYSICAL(transfer.setup.wIndex)); + if (!EP_VALID(_transfer.setup.wIndex)) { + break; + } else if (_transfer.setup.wValue == ENDPOINT_HALT) { + _phy->endpoint_unstall(_transfer.setup.wIndex); success = true; } break; @@ -392,19 +503,21 @@ bool USBDevice::requestClearFeature() return success; } -bool USBDevice::requestGetStatus(void) +bool USBDevice::_request_get_status() { + assert_locked(); + static uint16_t status; bool success = false; - if (device.state != CONFIGURED) { + if (_device.state != Configured) { /* Endpoint or interface must be zero */ - if (transfer.setup.wIndex != 0) { + if (_transfer.setup.wIndex != 0) { return false; } } - switch (transfer.setup.bmRequestType.Recipient) { + switch (_transfer.setup.bmRequestType.Recipient) { case DEVICE_RECIPIENT: /* TODO: Currently only supports self powered devices */ status = DEVICE_STATUS_SELF_POWERED; @@ -415,9 +528,12 @@ bool USBDevice::requestGetStatus(void) success = true; break; case ENDPOINT_RECIPIENT: - /* TODO: We should check that the endpoint number is valid */ - if (getEndpointStallState( - WINDEX_TO_PHYSICAL(transfer.setup.wIndex))) { + if (!EP_VALID(_transfer.setup.wIndex)) { + break; + } else if (EP_CONTROL(_transfer.setup.wIndex)) { + /* Control endpoint can't be halted */ + status = 0; + } else if (_endpoint_info[EP_TO_INDEX(_transfer.setup.wIndex & 0xFF)].flags & ENDPOINT_STALLED) { status = ENDPOINT_STATUS_HALT; } else { status = 0; @@ -430,51 +546,53 @@ bool USBDevice::requestGetStatus(void) if (success) { /* Send the status */ - transfer.ptr = (uint8_t *)&status; /* Assumes little endian */ - transfer.remaining = sizeof(status); - transfer.direction = DEVICE_TO_HOST; + _transfer.ptr = (uint8_t *)&status; /* Assumes little endian */ + _transfer.remaining = sizeof(status); + _transfer.direction = Send; } return success; } -bool USBDevice::requestSetup(void) +bool USBDevice::_request_setup() { + assert_locked(); + bool success = false; /* Process standard requests */ - if ((transfer.setup.bmRequestType.Type == STANDARD_TYPE)) { - switch (transfer.setup.bRequest) { + if ((_transfer.setup.bmRequestType.Type == STANDARD_TYPE)) { + switch (_transfer.setup.bRequest) { case GET_STATUS: - success = requestGetStatus(); + success = _request_get_status(); break; case CLEAR_FEATURE: - success = requestClearFeature(); + success = _request_clear_feature(); break; case SET_FEATURE: - success = requestSetFeature(); + success = _request_set_feature(); break; case SET_ADDRESS: - success = requestSetAddress(); + success = _request_set_address(); break; case GET_DESCRIPTOR: - success = requestGetDescriptor(); + success = _request_get_descriptor(); break; case SET_DESCRIPTOR: /* TODO: Support is optional, not implemented here */ success = false; break; case GET_CONFIGURATION: - success = requestGetConfiguration(); + success = _request_get_configuration(); break; case SET_CONFIGURATION: - success = requestSetConfiguration(); + success = _request_set_configuration(); break; case GET_INTERFACE: - success = requestGetInterface(); + success = _request_get_interface(); break; case SET_INTERFACE: - success = requestSetInterface(); + success = _request_set_interface(); break; default: break; @@ -484,159 +602,330 @@ bool USBDevice::requestSetup(void) return success; } -bool USBDevice::controlSetup(void) +void USBDevice::_control_setup() { - bool success = false; + assert_locked(); /* Control transfer setup stage */ uint8_t buffer[MAX_PACKET_SIZE_EP0]; - EP0setup(buffer); + _phy->ep0_setup_read_result(buffer, MAX_PACKET_SIZE_EP0); /* Initialise control transfer state */ - decodeSetupPacket(buffer, &transfer.setup); - transfer.ptr = NULL; - transfer.remaining = 0; - transfer.direction = 0; - transfer.zlp = false; - transfer.notify = false; + _decode_setup_packet(buffer, &_transfer.setup); + _transfer.ptr = NULL; + _transfer.remaining = 0; + _transfer.direction = 0; + _transfer.zlp = false; + _transfer.notify = false; + _transfer.stage = Setup; #ifdef DEBUG - printf("dataTransferDirection: %d\r\nType: %d\r\nRecipient: %d\r\nbRequest: %d\r\nwValue: %d\r\nwIndex: %d\r\nwLength: %d\r\n", transfer.setup.bmRequestType.dataTransferDirection, - transfer.setup.bmRequestType.Type, - transfer.setup.bmRequestType.Recipient, - transfer.setup.bRequest, - transfer.setup.wValue, - transfer.setup.wIndex, - transfer.setup.wLength); + printf("dataTransferDirection: %d\r\nType: %d\r\nRecipient: %d\r\nbRequest: %d\r\nwValue: %d\r\nwIndex: %d\r\nwLength: %d\r\n", _transfer.setup.bmRequestType.dataTransferDirection, + _transfer.setup.bmRequestType.Type, + _transfer.setup.bmRequestType.Recipient, + _transfer.setup.bRequest, + _transfer.setup.wValue, + _transfer.setup.wIndex, + _transfer.setup.wLength); #endif /* Class / vendor specific */ - success = USBCallback_request(); + callback_request(&_transfer.setup); +} - if (!success) { +void USBDevice::complete_request(RequestResult direction, uint8_t *data, uint32_t size) +{ + lock(); + + _transfer.user_callback = false; + if (_abort_control) { + if ((direction == Receive) || (direction == Send)) { + _transfer.user_callback = true; + callback_request_xfer_done(&_transfer.setup, true); + } else { + _control_abort(); + } + unlock(); + return; + } + + if (direction == PassThrough) { /* Standard requests */ - if (!requestSetup()) { -#ifdef DEBUG - printf("fail!!!!\r\n"); -#endif - return false; + if (!_request_setup()) { + _phy->ep0_stall(); } + + /* user_callback may be set by _request_setup() */ + if (!_transfer.user_callback) { + _control_setup_continue(); + } + } else if (direction == Failure) { + _phy->ep0_stall(); + } else { + _transfer.notify = true; + _transfer.remaining = size; + _transfer.ptr = data; + _transfer.direction = direction; + _control_setup_continue(); + } + + unlock(); +} + +void USBDevice::_control_abort_start() +{ + assert_locked(); + + _setup_ready = false; + if (_transfer.user_callback) { + _abort_control = true; + } else { + _control_abort(); } +} + +void USBDevice::_control_setup_continue() +{ + assert_locked(); /* Check transfer size and direction */ - if (transfer.setup.wLength > 0) { - if (transfer.setup.bmRequestType.dataTransferDirection \ - == DEVICE_TO_HOST) { + if (_transfer.setup.wLength > 0) { + if (_transfer.setup.bmRequestType.dataTransferDirection \ + == Send) { /* IN data stage is required */ - if (transfer.direction != DEVICE_TO_HOST) { - return false; + if (_transfer.direction != Send) { + _phy->ep0_stall(); + return; } /* Transfer must be less than or equal to the size */ /* requested by the host */ - if (transfer.remaining > transfer.setup.wLength) { - transfer.remaining = transfer.setup.wLength; + if (_transfer.remaining > _transfer.setup.wLength) { + _transfer.remaining = _transfer.setup.wLength; } } else { /* OUT data stage is required */ - if (transfer.direction != HOST_TO_DEVICE) { - return false; + if (_transfer.direction != Receive) { + _phy->ep0_stall(); + return; } /* Transfer must be equal to the size requested by the host */ - if (transfer.remaining != transfer.setup.wLength) { - return false; + if (_transfer.remaining != _transfer.setup.wLength) { + _phy->ep0_stall(); + return; } } } else { /* No data stage; transfer size must be zero */ - if (transfer.remaining != 0) { - return false; + if (_transfer.remaining != 0) { + _phy->ep0_stall(); + return; } } /* Data or status stage if applicable */ - if (transfer.setup.wLength > 0) { - if (transfer.setup.bmRequestType.dataTransferDirection \ - == DEVICE_TO_HOST) { + if (_transfer.setup.wLength > 0) { + if (_transfer.setup.bmRequestType.dataTransferDirection \ + == Send) { /* Check if we'll need to send a zero length packet at */ /* the end of this transfer */ - if (transfer.setup.wLength > transfer.remaining) { + if (_transfer.setup.wLength > _transfer.remaining) { /* Device wishes to transfer less than host requested */ - if ((transfer.remaining % MAX_PACKET_SIZE_EP0) == 0) { + if ((_transfer.remaining % MAX_PACKET_SIZE_EP0) == 0) { /* Transfer is a multiple of EP0 max packet size */ - transfer.zlp = true; + _transfer.zlp = true; } } /* IN stage */ - controlIn(); + _transfer.stage = DataIn; + _control_in(); } else { /* OUT stage */ - EP0read(); + _transfer.stage = DataOut; + _phy->ep0_read(); } } else { /* Status stage */ - EP0write(NULL, 0); + _transfer.stage = Status; + _phy->ep0_write(NULL, 0); } +} - return true; +void USBDevice::_control_abort() +{ + assert_locked(); + + _abort_control = false; + _transfer.stage = Status; } -void USBDevice::busReset(void) +void USBDevice::reset() { - device.state = DEFAULT; - device.configuration = 0; - device.suspended = false; + assert_locked(); + + _change_state(Default); + _device.suspended = false; + _control_abort_start(); /* Call class / vendor specific busReset function */ - USBCallback_busReset(); + callback_reset(); } -void USBDevice::EP0setupCallback(void) +void USBDevice::ep0_setup() { + assert_locked(); + + if (_device.state < Default) { + MBED_ASSERT(0); + return; + } + + _setup_ready = true; + /* Endpoint 0 setup event */ - if (!controlSetup()) { - /* Protocol stall */ - EP0stall(); + if (_transfer.user_callback) { + /* A new setup packet has arrived so abort the + current control transfer */ + _abort_control = true; + } else { + _control_setup(); } - /* Return true if an OUT data stage is expected */ } -void USBDevice::EP0out(void) +void USBDevice::ep0_out() { + assert_locked(); + + if (_device.state < Default) { + MBED_ASSERT(0); + return; + } + + if (_transfer.user_callback) { + /* EP0 OUT should not receive data if the stack is waiting + on a user callback for the buffer to fill or status */ + MBED_ASSERT(0); + return; + } + + if (_transfer.stage == Status) { + // No action needed on status stage + return; + } + /* Endpoint 0 OUT data event */ - if (!controlOut()) { + if (!_control_out()) { /* Protocol stall; this will stall both endpoints */ - EP0stall(); + _phy->ep0_stall(); } } -void USBDevice::EP0in(void) +void USBDevice::ep0_in() { + assert_locked(); + + if (_device.state < Default) { + MBED_ASSERT(0); + return; + } + #ifdef DEBUG - printf("EP0IN\r\n"); + printf("ep0_in\r\n"); #endif + if (_transfer.stage == Status) { + // No action needed on status stage + return; + } + /* Endpoint 0 IN data event */ - if (!controlIn()) { + if (!_control_in()) { /* Protocol stall; this will stall both endpoints */ - EP0stall(); + _phy->ep0_stall(); + } +} + +void USBDevice::out(usb_ep_t endpoint) +{ + assert_locked(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + return; + } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + + info->pending += 1; + if (info->callback) { + (this->*(info->callback))(endpoint); + } +} + +void USBDevice::in(usb_ep_t endpoint) +{ + assert_locked(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + return; } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + + MBED_ASSERT(info->pending >= 1); + info->pending -= 1; + if (info->callback) { + (this->*(info->callback))(endpoint); + } +} + +void USBDevice::init() +{ + lock(); + + if (!_initialized) { + this->_phy->init(this); + _max_packet_size_ep0 = this->_phy->ep0_set_max_packet(MAX_PACKET_SIZE_EP0); + _initialized = true; + } + + unlock(); } -bool USBDevice::configured(void) +void USBDevice::deinit() { - /* Returns true if device is in the CONFIGURED state */ - return (device.state == CONFIGURED); + lock(); + + if (_initialized) { + this->_phy->deinit(); + _initialized = false; + } + + unlock(); +} + +bool USBDevice::configured() +{ + lock(); + + /* Returns true if device is in the Configured state */ + bool ret = (_device.state == Configured); + + unlock(); + return ret; } void USBDevice::connect(bool blocking) { /* Connect device */ - USBHAL::connect(); + lock(); + _phy->connect(); + unlock(); if (blocking) { /* Block if not configured */ @@ -644,51 +933,148 @@ void USBDevice::connect(bool blocking) } } -void USBDevice::disconnect(void) +void USBDevice::disconnect() { + lock(); + /* Disconnect device */ - USBHAL::disconnect(); + _phy->disconnect(); /* Set initial device state */ - device.state = POWERED; - device.configuration = 0; - device.suspended = false; + if (_device.state > Powered) { + _change_state(Powered); + } + //TODO - remove these? + _device.configuration = 0; + _device.suspended = false; + + unlock(); } -CONTROL_TRANSFER *USBDevice::getTransferPtr(void) +void USBDevice::sof_enable() { - return &transfer; + lock(); + + _phy->sof_enable(); + + unlock(); } -bool USBDevice::addEndpoint(uint8_t endpoint, uint32_t maxPacket) +void USBDevice::sof_disable() { - return realiseEndpoint(endpoint, maxPacket, 0); + lock(); + + _phy->sof_disable(); + + unlock(); } -bool USBDevice::addRateFeedbackEndpoint(uint8_t endpoint, uint32_t maxPacket) +bool USBDevice::endpoint_add(usb_ep_t endpoint, uint32_t max_packet_size, usb_ep_type_t type, ep_cb_t callback) { - /* For interrupt endpoints only */ - return realiseEndpoint(endpoint, maxPacket, RATE_FEEDBACK_MODE); + lock(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); + return false; + } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + MBED_ASSERT(!(info->flags & ENDPOINT_ENABLED)); + MBED_ASSERT(max_packet_size <= 1024); + + bool ret = false; + if (_phy->endpoint_add(endpoint, max_packet_size, type)) { + info->callback = callback; + info->flags |= ENDPOINT_ENABLED; + info->pending = 0; + info->max_packet_size = max_packet_size; + ret = true; + } + + unlock(); + return ret; } -uint8_t *USBDevice::findDescriptor(uint8_t descriptorType) +void USBDevice::endpoint_remove(usb_ep_t endpoint) +{ + lock(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); + return; + } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + MBED_ASSERT(info->flags & ENDPOINT_ENABLED); + + info->callback = NULL; + info->flags = 0; + info->pending = 0; + info->max_packet_size = 0; + + _phy->endpoint_remove(endpoint); + + unlock(); +} + +void USBDevice::endpoint_stall(usb_ep_t endpoint) +{ + lock(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); + return; + } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + MBED_ASSERT(info->flags & ENDPOINT_ENABLED); + + info->flags |= ENDPOINT_STALLED; + _phy->endpoint_stall(endpoint); + + unlock(); +} + +void USBDevice::endpoint_unstall(usb_ep_t endpoint) +{ + lock(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); + return; + } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + MBED_ASSERT(info->flags & ENDPOINT_ENABLED); + + info->flags &= ~ENDPOINT_STALLED; + _phy->endpoint_unstall(endpoint); + + unlock(); +} + +uint8_t *USBDevice::find_descriptor(uint8_t descriptorType) { /* Find a descriptor within the list of descriptors */ /* following a configuration descriptor. */ uint16_t wTotalLength; uint8_t *ptr; - if (configurationDesc() == NULL) { + if (configuration_desc() == NULL) { return NULL; } /* Check this is a configuration descriptor */ - if ((configurationDesc()[0] != CONFIGURATION_DESCRIPTOR_LENGTH) \ - || (configurationDesc()[1] != CONFIGURATION_DESCRIPTOR)) { + if ((configuration_desc()[0] != CONFIGURATION_DESCRIPTOR_LENGTH) \ + || (configuration_desc()[1] != CONFIGURATION_DESCRIPTOR)) { return NULL; } - wTotalLength = configurationDesc()[2] | (configurationDesc()[3] << 8); + wTotalLength = configuration_desc()[2] | (configuration_desc()[3] << 8); /* Check there are some more descriptors to follow */ if (wTotalLength <= (CONFIGURATION_DESCRIPTOR_LENGTH + 2)) @@ -698,7 +1084,7 @@ uint8_t *USBDevice::findDescriptor(uint8_t descriptorType) } /* Start at first descriptor after the configuration descriptor */ - ptr = &(((uint8_t *)configurationDesc())[CONFIGURATION_DESCRIPTOR_LENGTH]); + ptr = &(((uint8_t *)configuration_desc())[CONFIGURATION_DESCRIPTOR_LENGTH]); do { if (ptr[1] /* bDescriptorType */ == descriptorType) { @@ -708,131 +1094,214 @@ uint8_t *USBDevice::findDescriptor(uint8_t descriptorType) /* Skip to next descriptor */ ptr += ptr[0]; /* bLength */ - } while (ptr < (configurationDesc() + wTotalLength)); + } while (ptr < (configuration_desc() + wTotalLength)); /* Reached end of the descriptors - not found */ return NULL; } +const usb_ep_table_t *USBDevice::endpoint_table() +{ + return _phy->endpoint_table(); +} + +void USBDevice::power(bool powered) +{ + assert_locked(); + + if (!powered && _device.state > Attached) { + _change_state(Attached); + } +} -void USBDevice::connectStateChanged(unsigned int connected) +void USBDevice::suspend(bool suspended) { } -void USBDevice::suspendStateChanged(unsigned int suspended) +void USBDevice::sof(int frame_number) { + callback_sof(frame_number); } -USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release) +USBDevice::USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) { - VENDOR_ID = vendor_id; - PRODUCT_ID = product_id; - PRODUCT_RELEASE = product_release; + this->vendor_id = vendor_id; + this->product_id = product_id; + this->product_release = product_release; + + memset(_endpoint_info, 0, sizeof(_endpoint_info)); + + _setup_ready = false; + _abort_control = false; + + _phy = phy; + _initialized = false; + _current_interface = 0; + _current_alternate = 0; + _locked = 0; /* Set initial device state */ - device.state = POWERED; - device.configuration = 0; - device.suspended = false; + _device.state = Powered; + _device.configuration = 0; + _device.suspended = false; }; - -bool USBDevice::readStart(uint8_t endpoint, uint32_t maxSize) +USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release) { - return endpointRead(endpoint, maxSize) == EP_PENDING; -} + this->vendor_id = vendor_id; + this->product_id = product_id; + this->product_release = product_release; + + memset(_endpoint_info, 0, sizeof(_endpoint_info)); + _setup_ready = false; + _abort_control = false; -bool USBDevice::write(uint8_t endpoint, uint8_t *buffer, uint32_t size, uint32_t maxSize) + _phy = get_usb_phy(); + _initialized = false; + _current_interface = 0; + _current_alternate = 0; + _locked = 0; + + /* Set initial device state */ + _device.state = Powered; + _device.configuration = 0; + _device.suspended = false; +}; + +uint32_t USBDevice::endpoint_max_packet_size(usb_ep_t endpoint) { - EP_STATUS result; + lock(); - if (size > maxSize) { - return false; + uint32_t size = 0; + if (EP_CONTROL(endpoint)) { + size = _max_packet_size_ep0; + } else { + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + size = info->max_packet_size; } + unlock(); + return size; +} - if (!configured()) { +bool USBDevice::read_start(usb_ep_t endpoint) +{ + lock(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); return false; } - /* Send report */ - result = endpointWrite(endpoint, buffer, size); + if(!configured()) { + unlock(); + return false; + } - if (result != EP_PENDING) { + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + if (!(info->flags & ENDPOINT_ENABLED)) { + // Invalid endpoint is being used + MBED_ASSERT(0); + unlock(); return false; } - /* Wait for completion */ - do { - result = endpointWriteResult(endpoint); - } while ((result == EP_PENDING) && configured()); + bool ret = _phy->endpoint_read(endpoint, info->max_packet_size); - return (result == EP_COMPLETED); + unlock(); + return ret; } - -bool USBDevice::writeNB(uint8_t endpoint, uint8_t *buffer, uint32_t size, uint32_t maxSize) +bool USBDevice::read_finish(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint32_t *size) { - EP_STATUS result; + lock(); - if (size > maxSize) { + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); return false; } if (!configured()) { + unlock(); return false; } - /* Send report */ - result = endpointWrite(endpoint, buffer, size); + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + if (!(info->flags & ENDPOINT_ENABLED)) { + // Invalid endpoint is being used + MBED_ASSERT(0); + unlock(); + return false; + } - if (result != EP_PENDING) { + if (max_size < info->max_packet_size) { + MBED_ASSERT(0); + unlock(); return false; } - result = endpointWriteResult(endpoint); + bool ret = _phy->endpoint_read_result(endpoint, buffer, max_size, size); + if (ret) { + info->pending -= 1; + } - return (result == EP_COMPLETED); + unlock(); + return ret; } - - -bool USBDevice::readEP(uint8_t endpoint, uint8_t *buffer, uint32_t *size, uint32_t maxSize) +bool USBDevice::write(usb_ep_t endpoint, uint8_t *buffer, uint32_t size) { - EP_STATUS result; + lock(); - if (!configured()) { + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); return false; } - /* Wait for completion */ - do { - result = endpointReadResult(endpoint, buffer, size); - } while ((result == EP_PENDING) && configured()); - - return (result == EP_COMPLETED); -} + if (!configured()) { + unlock(); + return false; + } + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + if (!(info->flags & ENDPOINT_ENABLED)) { + // Invalid endpoint is being used + MBED_ASSERT(0); + unlock(); + return false; + } -bool USBDevice::readEP_NB(uint8_t endpoint, uint8_t *buffer, uint32_t *size, uint32_t maxSize) -{ - EP_STATUS result; + if (size > info->max_packet_size) { + // Size being written is too large + MBED_ASSERT(0); + unlock(); + return false; + } - if (!configured()) { + if (info->pending) { + // Only allow 1 packet + unlock(); return false; } - result = endpointReadResult(endpoint, buffer, size); + /* Send report */ + bool ret = _phy->endpoint_write(endpoint, buffer, size); + if (ret) { + info->pending += 1; + } - return (result == EP_COMPLETED); + unlock(); + return ret; } - - -const uint8_t *USBDevice::deviceDesc() +const uint8_t *USBDevice::device_desc() { - uint8_t deviceDescriptorTemp[] = { + uint8_t device_descriptor_temp[] = { DEVICE_DESCRIPTOR_LENGTH, /* bLength */ DEVICE_DESCRIPTOR, /* bDescriptorType */ LSB(USB_VERSION_2_0), /* bcdUSB (LSB) */ @@ -840,79 +1309,133 @@ const uint8_t *USBDevice::deviceDesc() 0x00, /* bDeviceClass */ 0x00, /* bDeviceSubClass */ 0x00, /* bDeviceprotocol */ - MAX_PACKET_SIZE_EP0, /* bMaxPacketSize0 */ - (uint8_t)(LSB(VENDOR_ID)), /* idVendor (LSB) */ - (uint8_t)(MSB(VENDOR_ID)), /* idVendor (MSB) */ - (uint8_t)(LSB(PRODUCT_ID)), /* idProduct (LSB) */ - (uint8_t)(MSB(PRODUCT_ID)), /* idProduct (MSB) */ - (uint8_t)(LSB(PRODUCT_RELEASE)), /* bcdDevice (LSB) */ - (uint8_t)(MSB(PRODUCT_RELEASE)), /* bcdDevice (MSB) */ + (uint8_t)_max_packet_size_ep0, /* bMaxPacketSize0 */ + (uint8_t)(LSB(vendor_id)), /* idVendor (LSB) */ + (uint8_t)(MSB(vendor_id)), /* idVendor (MSB) */ + (uint8_t)(LSB(product_id)), /* idProduct (LSB) */ + (uint8_t)(MSB(product_id)), /* idProduct (MSB) */ + (uint8_t)(LSB(product_release)), /* bcdDevice (LSB) */ + (uint8_t)(MSB(product_release)), /* bcdDevice (MSB) */ STRING_OFFSET_IMANUFACTURER, /* iManufacturer */ STRING_OFFSET_IPRODUCT, /* iProduct */ STRING_OFFSET_ISERIAL, /* iSerialNumber */ 0x01 /* bNumConfigurations */ }; - MBED_ASSERT(sizeof(deviceDescriptorTemp) == sizeof(deviceDescriptor)); - memcpy(deviceDescriptor, deviceDescriptorTemp, sizeof(deviceDescriptor)); - return deviceDescriptor; + MBED_ASSERT(sizeof(device_descriptor_temp) == sizeof(device_descriptor)); + memcpy(device_descriptor, device_descriptor_temp, sizeof(device_descriptor)); + return device_descriptor; } -const uint8_t *USBDevice::stringLangidDesc() +const uint8_t *USBDevice::string_langid_desc() { - static const uint8_t stringLangidDescriptor[] = { + static const uint8_t string_langid_descriptor[] = { 0x04, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ 0x09, 0x04, /*bString Lang ID - 0x0409 - English*/ }; - return (uint8_t *)stringLangidDescriptor; + return string_langid_descriptor; } -const uint8_t *USBDevice::stringImanufacturerDesc() +const uint8_t *USBDevice::string_imanufacturer_desc() { - static const uint8_t stringImanufacturerDescriptor[] = { + static const uint8_t string_imanufacturer_descriptor[] = { 0x12, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ 'm', 0, 'b', 0, 'e', 0, 'd', 0, '.', 0, 'o', 0, 'r', 0, 'g', 0, /*bString iManufacturer - mbed.org*/ }; - return stringImanufacturerDescriptor; + return string_imanufacturer_descriptor; } -const uint8_t *USBDevice::stringIserialDesc() +const uint8_t *USBDevice::string_iserial_desc() { - static const uint8_t stringIserialDescriptor[] = { + static const uint8_t string_iserial_descriptor[] = { 0x16, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ '0', 0, '1', 0, '2', 0, '3', 0, '4', 0, '5', 0, '6', 0, '7', 0, '8', 0, '9', 0, /*bString iSerial - 0123456789*/ }; - return stringIserialDescriptor; + return string_iserial_descriptor; } -const uint8_t *USBDevice::stringIConfigurationDesc() +const uint8_t *USBDevice::string_iconfiguration_desc() { - static const uint8_t stringIconfigurationDescriptor[] = { + static const uint8_t string_iconfiguration_descriptor[] = { 0x06, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ '0', 0, '1', 0, /*bString iConfiguration - 01*/ }; - return stringIconfigurationDescriptor; + return string_iconfiguration_descriptor; } -const uint8_t *USBDevice::stringIinterfaceDesc() +const uint8_t *USBDevice::string_iinterface_desc() { - static const uint8_t stringIinterfaceDescriptor[] = { + static const uint8_t string_iinterface_descriptor[] = { 0x08, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ 'U', 0, 'S', 0, 'B', 0, /*bString iInterface - USB*/ }; - return stringIinterfaceDescriptor; + return string_iinterface_descriptor; } -const uint8_t *USBDevice::stringIproductDesc() +const uint8_t *USBDevice::string_iproduct_desc() { - static const uint8_t stringIproductDescriptor[] = { + static const uint8_t string_iproduct_descriptor[] = { 0x16, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ 'U', 0, 'S', 0, 'B', 0, ' ', 0, 'D', 0, 'E', 0, 'V', 0, 'I', 0, 'C', 0, 'E', 0 /*bString iProduct - USB DEVICE*/ }; - return stringIproductDescriptor; + return string_iproduct_descriptor; +} + +void USBDevice::start_process() +{ + lock(); + + _phy->process(); + + unlock(); +} + +void USBDevice::lock() +{ + core_util_critical_section_enter(); + _locked++; + MBED_ASSERT(_locked > 0); +} + +void USBDevice::unlock() +{ + MBED_ASSERT(_locked > 0); + _locked--; + core_util_critical_section_exit(); +} + +void USBDevice::assert_locked() +{ + MBED_ASSERT(_locked > 0); +} + +void USBDevice::_change_state(DeviceState new_state) { + assert_locked(); + + DeviceState old_state = _device.state; + _device.state = new_state; + + if (old_state == new_state) { + return; + } + + bool leaving_configured_state = (old_state >= Configured) && (new_state < Configured); + bool leaving_default_state = (old_state >= Default) && (new_state < Default); + + if (leaving_configured_state) { + memset(_endpoint_info, 0, sizeof(_endpoint_info)); + _device.configuration = 0; + } + + if (leaving_default_state) { + /* Abort any pending control transfers */ + _control_abort_start(); + } + + callback_state_change(new_state); } diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 9ee962841de..371359fa8b0 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -19,170 +19,241 @@ #include "mbed.h" #include "USBDevice_Types.h" -#include "USBHAL.h" +#include "USBPhy.h" +#include "mbed_critical.h" -class USBDevice: public USBHAL { +/** + * \defgroup usb_device USB Device + * + */ + +/** + * \defgroup usb_device_core Core + * + * @ingroup usb_device + */ + +/** + * Core USB Device driver + * + * USB driver which wraps and provides synchronization for a USBPhy object. + * + * @ingroup usb_device_core + */ +class USBDevice: public USBPhyEvents { public: + typedef void (USBDevice::*ep_cb_t)(usb_ep_t endpoint); + + enum RequestResult { + Receive = 0, + Send = 1, + Success = 2, + Failure = 3, + PassThrough = 4, + }; + + enum DeviceState { + Attached, + Powered, + Default, + Address, + Configured + }; + + struct setup_packet_t { + struct { + uint8_t dataTransferDirection; + uint8_t Type; + uint8_t Recipient; + } bmRequestType; + uint8_t bRequest; + uint16_t wValue; + uint16_t wIndex; + uint16_t wLength; + }; + + /** + * Instantiate a new USBDevice with the given parameters + * + * This function uses a target's built in USBPhy. + * + * @param vendor_id The USB vendor ID + * @param product_id The USB product ID + * @param product_release The device release number + */ USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release); - /* + /** + * Instantiate a new USBDevice with the given parameters + * + * @param phy The USBPhy providing physical USB access + * @param vendor_id The USB vendor ID + * @param product_id The USB product ID + * @param product_release The device release number + */ + USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); + + /** + * Initialize this instance + * + * This function must be called before calling + * any other functions of this class, unless specifically + */ + void init(); + + /** + * Power down this instance + * + * Disable interrupts and stop sending events. + */ + void deinit(); + + /** * Check if the device is configured * * @returns true if configured, false otherwise */ - bool configured(void); + bool configured(); - /* + /** * Connect a device * * @param blocking: block if not configured */ void connect(bool blocking = true); - /* + /** * Disconnect a device */ - void disconnect(void); + void disconnect(); - /* - * Add an endpoint - * - * @param endpoint endpoint which will be added - * @param maxPacket Maximum size of a packet which can be sent for this endpoint - * @returns true if successful, false otherwise - */ - bool addEndpoint(uint8_t endpoint, uint32_t maxPacket); + /** + * Enable the start of frame interrupt + * + * Call USBDevice::callback_sof on every frame. + */ + void sof_enable(); - /* - * Start a reading on a certain endpoint. - * You can access the result of the reading by USBDevice_read - * - * @param endpoint endpoint which will be read - * @param maxSize the maximum length that can be read - * @return true if successful - */ - bool readStart(uint8_t endpoint, uint32_t maxSize); + /** + * Disable the start of frame interrupt + * + * Stop calling USBDevice::callback_sof. + */ + void sof_disable(); - /* - * Read a certain endpoint. Before calling this function, USBUSBDevice_readStart - * must be called. - * - * Warning: blocking + /** + * Add an endpoint * - * @param endpoint endpoint which will be read - * @param buffer buffer will be filled with the data received - * @param size the number of bytes read will be stored in *size - * @param maxSize the maximum length that can be read - * @returns true if successful + * @param endpoint Endpoint to enable + * @param max_packet Maximum size of a packet which can be sent or received on this endpoint + * @param type Endpoint type - USB_EP_TYPE_BULK, USB_EP_TYPE_INT or USB_EP_TYPE_ISO + * @param callback Method pointer to be called when a packet is transferred + * @returns true if successful, false otherwise */ - bool readEP(uint8_t endpoint, uint8_t *buffer, uint32_t *size, uint32_t maxSize); + bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type, ep_cb_t callback = NULL); - /* - * Read a certain endpoint. - * - * Warning: non blocking + /** + * Add an endpoint * - * @param endpoint endpoint which will be read - * @param buffer buffer will be filled with the data received (if data are available) - * @param size the number of bytes read will be stored in *size - * @param maxSize the maximum length that can be read - * @returns true if successful + * @param endpoint Endpoint to enable + * @param max_packet Maximum size of a packet which can be sent or received on this endpoint + * @param type Endpoint type - USB_EP_TYPE_BULK, USB_EP_TYPE_INT or USB_EP_TYPE_ISO + * @param callback Method pointer to be called when a packet is transferred + * @returns true if successful, false otherwise */ - bool readEP_NB(uint8_t endpoint, uint8_t *buffer, uint32_t *size, uint32_t maxSize); + template + bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type, void (T::*callback)(usb_ep_t endpoint)) + { + return endpoint_add(endpoint, max_packet, type, static_cast(callback)); + } - /* - * Write a certain endpoint. - * - * Warning: blocking + /** + * Remove an endpoint * - * @param endpoint endpoint to write - * @param buffer data contained in buffer will be write - * @param size the number of bytes to write - * @param maxSize the maximum length that can be written on this endpoint + * @param endpoint Endpoint to disable + * @note This endpoint must already have been setup with endpoint_add */ - bool write(uint8_t endpoint, uint8_t *buffer, uint32_t size, uint32_t maxSize); + void endpoint_remove(usb_ep_t endpoint); - - /* - * Write a certain endpoint. + /** + * Stall an endpoint * - * Warning: non blocking - * - * @param endpoint endpoint to write - * @param buffer data contained in buffer will be write - * @param size the number of bytes to write - * @param maxSize the maximum length that can be written on this endpoint + * @param endpoint Endpoint to stall + * @note You cannot stall endpoint 0 with this function + * @note This endpoint must already have been setup with endpoint_add */ - bool writeNB(uint8_t endpoint, uint8_t *buffer, uint32_t size, uint32_t maxSize); - + void endpoint_stall(usb_ep_t endpoint); - /* - * Called by USBDevice layer on bus reset. Warning: Called in ISR context + /** + * Unstall an endpoint * - * May be used to reset state + * @param endpoint Endpoint to unstall + * @note This endpoint must already have been setup with endpoint_add */ - virtual void USBCallback_busReset(void) {}; + void endpoint_unstall(usb_ep_t endpoint); - /* - * Called by USBDevice on Endpoint0 request. Warning: Called in ISR context - * This is used to handle extensions to standard requests - * and class specific requests - * - * @returns true if class handles this request - */ - virtual bool USBCallback_request() - { - return false; - }; + /** + * Get the current maximum size for this endpoint + * + * Return the currently configured maximum packet size, wMaxPacketSize, + * for this endpoint. + * @note This endpoint must already have been setup with endpoint_add + */ + uint32_t endpoint_max_packet_size(usb_ep_t endpoint); - /* - * Called by USBDevice on Endpoint0 request completion - * if the 'notify' flag has been set to true. Warning: Called in ISR context - * - * In this case it is used to indicate that a HID report has - * been received from the host on endpoint 0 - * - * @param buf buffer received on endpoint 0 - * @param length length of this buffer - */ - virtual void USBCallback_requestCompleted(uint8_t *buf, uint32_t length) {}; + /** Start a read on the given endpoint + * + * After the read is finished call read_start to get the result. + * + * @param endpoint endpoint to perform the read on + * @return true if the read was started, false if no more reads can be started + * @note This endpoint must already have been setup with endpoint_add + */ + bool read_start(usb_ep_t endpoint); - /* - * Called by USBDevice layer. Set configuration of the device. - * For instance, you can add all endpoints that you need on this function. - * - * @param configuration Number of the configuration - */ - virtual bool USBCallback_setConfiguration(uint8_t configuration) - { - return false; - }; + /** + * Finish a read on the given endpoint + * + * Get the contents of a read started with read_start. To ensure all + * the data from this endpoint is read make sure the buffer and size + * passed is at least as big as the maximum packet for this endpoint. + * + * @param endpoint endpoint to read data from + * @param buffer buffer to fill with read data + * @param max_size the total size of the data buffer. This must be at least + * the max packet size of this endpoint + * @param size The size of data that was read + * @return true if the read was completed, otherwise false + * @note This endpoint must already have been setup with endpoint_add + */ + bool read_finish(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint32_t *size); - /* - * Called by USBDevice layer. Set interface/alternate of the device. + /** + * Write a data to the given endpoint + * + * Write data to an endpoint. * - * @param interface Number of the interface to be configured - * @param alternate Number of the alternate to be configured - * @returns true if class handles this request + * @param endpoint endpoint to write data to + * @param buffer data to write + * @param size the size of data to send. This must be less than or equal to the + * max packet size of this endpoint + * @note This endpoint must already have been setup with endpoint_add */ - virtual bool USBCallback_setInterface(uint16_t interface, uint8_t alternate) - { - return false; - }; + bool write(usb_ep_t endpoint, uint8_t *buffer, uint32_t size); /* * Get device descriptor. * * @returns pointer to the device descriptor */ - virtual const uint8_t *deviceDesc(); + virtual const uint8_t *device_desc(); /* * Get configuration descriptor * * @returns pointer to the configuration descriptor */ - virtual const uint8_t *configurationDesc() + virtual const uint8_t *configuration_desc() { return NULL; }; @@ -192,93 +263,308 @@ class USBDevice: public USBHAL { * * @return pointer to the string lang id descriptor */ - virtual const uint8_t *stringLangidDesc(); + virtual const uint8_t *string_langid_desc(); /* * Get string manufacturer descriptor * * @returns pointer to the string manufacturer descriptor */ - virtual const uint8_t *stringImanufacturerDesc(); + virtual const uint8_t *string_imanufacturer_desc(); /* * Get string product descriptor * * @returns pointer to the string product descriptor */ - virtual const uint8_t *stringIproductDesc(); + virtual const uint8_t *string_iproduct_desc(); /* * Get string serial descriptor * * @returns pointer to the string serial descriptor */ - virtual const uint8_t *stringIserialDesc(); + virtual const uint8_t *string_iserial_desc(); /* * Get string configuration descriptor * * @returns pointer to the string configuration descriptor */ - virtual const uint8_t *stringIConfigurationDesc(); + virtual const uint8_t *string_iconfiguration_desc(); /* * Get string interface descriptor * * @returns pointer to the string interface descriptor */ - virtual const uint8_t *stringIinterfaceDesc(); + virtual const uint8_t *string_iinterface_desc(); /* * Get the length of the report descriptor * * @returns length of the report descriptor */ - virtual uint16_t reportDescLength() + virtual uint16_t report_desc_dength() { return 0; }; +protected: + + /** + * Called by USBDevice layer on power state change. + * + * @param powered true if device is powered, false otherwise + * + * Warning: Called in ISR context + */ + virtual void callback_power(bool powered) + { + } -protected: - virtual void busReset(void); - virtual void EP0setupCallback(void); - virtual void EP0out(void); - virtual void EP0in(void); - virtual void connectStateChanged(unsigned int connected); - virtual void suspendStateChanged(unsigned int suspended); - uint8_t *findDescriptor(uint8_t descriptorType); - CONTROL_TRANSFER *getTransferPtr(void); - - uint16_t VENDOR_ID; - uint16_t PRODUCT_ID; - uint16_t PRODUCT_RELEASE; - uint8_t deviceDescriptor[18]; + /** + * Called by USBDevice layer on each new USB frame. + * + * Callbacks are enabled and disabled by calling sof_enable + * and sof_disable. + * + * @param frame_number The current frame number + * + * Warning: Called in ISR context + */ + virtual void callback_sof(int frame_number) + { + + } + + /** + * Called by USBDevice layer on bus reset. + * + * complete_reset must be called after + * the device is fully reset. + * + * Warning: Called in ISR context + */ + virtual void callback_reset() + { + + } + + /** + * Called when USB changes state + * + * @param new_state The new state of the USBDevice + * + * Warning: Called in ISR context + */ + virtual void callback_state_change(DeviceState new_state) = 0; + + /** + * Called by USBDevice on Endpoint0 request. + * + * This is used to handle extensions to standard requests + * and class specific requests. The function complete_request + * must be always be called in response to this callback. + * + * Warning: Called in ISR context + */ + virtual void callback_request(const setup_packet_t *setup) = 0; + + /** + * Called to complete the setup stage of a callback request + * + * Possible options that can be passed as a result are: + * - Receive - Start the data OUT phase of this control transfer + * - Send - Start the data IN phase of this control transfer + * - Success - Operation was a success so start the status phase + * - Failure - Operation failed or is unsupported so send a stall + * - PassThrough - Pass on the request for standard processing + * + * @param result The result of the setup phase. + * @param data Buffer to send or receive if the result is Send or Receive + * @param size Size to transfer if the result is Send or Receive + */ + void complete_request(RequestResult result, uint8_t *data=NULL, uint32_t size=0); + + /** + * Called by USBDevice on data stage completion + * + * The function complete_request_xfer_done must be always be called + * in response to this callback. + * + * @param setup Setup packet of the current request + * @param aborted false if the operation was aborted, true otherwise + * + * Warning: Called in ISR context + */ + virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted) = 0; + + /** + * Called to complete the data stage of a callback request + * + * @param success true if the operation was successful, false otherwise + */ + void complete_request_xfer_done(bool success); + + /* + * Called by USBDevice layer in response to set_configuration. + * + * Upon reception of this command endpoints of the previous configuration + * if any must be removed with endpoint_remove and new endpoint added with + * endpoint_add. + * + * @param configuration Number of the configuration + * + * Warning: Called in ISR context + */ + virtual void callback_set_configuration(uint8_t configuration) = 0; + + /** + * Called to complete a set configuration command + * + * @param success true if the configuration was set, false otherwise + */ + void complete_set_configuration(bool success); + + /* + * Called by USBDevice layer in response to set_interface. + * + * Upon reception of this command endpoints of any previous interface + * if any must be removed with endpoint_remove and new endpoint added with + * endpoint_add. + * + * @param configuration Number of the configuration + * + * Warning: Called in ISR context + */ + virtual void callback_set_interface(uint16_t interface, uint8_t alternate) = 0; + + /** + * Called to complete a set interface command + * + * @param success true if the interface was set, false otherwise + */ + void complete_set_interface(bool success); + + /** + * Find a descriptor type inside the configuration descriptor + * + * @param descriptor_type Type of descriptor to find + * @return A descriptor of the given type or NULL if none were found + */ + uint8_t *find_descriptor(uint8_t descriptor_type); + + /** + * Get the endpoint table of this device + * + * @return Endpoint table of the USBPhy attached to this USBDevice + */ + const usb_ep_table_t *endpoint_table(); + + /** + * Callback called to indicate the USB processing needs to be done + */ + virtual void start_process(); + + /** + * Acquire exclusive access to this instance USBDevice + */ + virtual void lock(); + + /** + * Release exclusive access to this instance USBDevice + */ + virtual void unlock(); + + /** + * Assert that the current thread of execution holds the lock + * + */ + virtual void assert_locked(); + + uint16_t vendor_id; + uint16_t product_id; + uint16_t product_release; + uint8_t device_descriptor[18]; private: - bool addRateFeedbackEndpoint(uint8_t endpoint, uint32_t maxPacket); - bool requestGetDescriptor(void); - bool controlOut(void); - bool controlIn(void); - bool requestSetAddress(void); - bool requestSetConfiguration(void); - bool requestSetFeature(void); - bool requestClearFeature(void); - bool requestGetStatus(void); - bool requestSetup(void); - bool controlSetup(void); - void decodeSetupPacket(uint8_t *data, SETUP_PACKET *packet); - bool requestGetConfiguration(void); - bool requestGetInterface(void); - bool requestSetInterface(void); - - CONTROL_TRANSFER transfer; - USB_DEVICE device; - - uint16_t currentInterface; - uint8_t currentAlternate; -}; + // USBPhyEvents + virtual void power(bool powered); + virtual void suspend(bool suspended); + virtual void sof(int frame_number); + virtual void reset(); + virtual void ep0_setup(); + virtual void ep0_out(); + virtual void ep0_in(); + virtual void out(usb_ep_t endpoint); + virtual void in(usb_ep_t endpoint); + + bool _request_get_descriptor(); + bool _control_out(); + bool _control_in(); + bool _request_set_address(); + bool _request_set_configuration(); + bool _request_set_feature(); + bool _request_clear_feature(); + bool _request_get_status(); + bool _request_setup(); + void _control_setup(); + void _control_abort(); + void _control_abort_start(); + void _control_setup_continue(); + void _decode_setup_packet(uint8_t *data, setup_packet_t *packet); + bool _request_get_configuration(); + bool _request_get_interface(); + bool _request_set_interface(); + void _change_state(DeviceState state); + + struct endpoint_info_t { + void (USBDevice::*callback)(usb_ep_t endpoint); + uint16_t max_packet_size; + uint8_t flags; + uint8_t pending; + }; + struct usb_device_t { + volatile DeviceState state; + uint8_t configuration; + bool suspended; + }; + + enum ControlState { + Setup, + DataOut, + DataIn, + Status + }; + + struct control_transfer_t { + setup_packet_t setup; + uint8_t *ptr; + uint32_t remaining; + uint8_t direction; + bool zlp; + bool notify; + ControlState stage; + bool user_callback; + }; + + endpoint_info_t _endpoint_info[32 - 2]; + + USBPhy *_phy; + bool _initialized; + control_transfer_t _transfer; + usb_device_t _device; + uint32_t _max_packet_size_ep0; + + bool _setup_ready; + bool _abort_control; + + uint16_t _current_interface; + uint8_t _current_alternate; + uint32_t _locked; +}; #endif diff --git a/usb/device/USBDevice/USBDevice_Types.h b/usb/device/USBDevice/USBDevice_Types.h index 543e8a678f8..9d61df7d329 100644 --- a/usb/device/USBDevice/USBDevice_Types.h +++ b/usb/device/USBDevice/USBDevice_Types.h @@ -49,33 +49,4 @@ #define DESCRIPTOR_TYPE(wValue) (wValue >> 8) #define DESCRIPTOR_INDEX(wValue) (wValue & 0xff) -typedef struct { - struct { - uint8_t dataTransferDirection; - uint8_t Type; - uint8_t Recipient; - } bmRequestType; - uint8_t bRequest; - uint16_t wValue; - uint16_t wIndex; - uint16_t wLength; -} SETUP_PACKET; - -typedef struct { - SETUP_PACKET setup; - uint8_t *ptr; - uint32_t remaining; - uint8_t direction; - bool zlp; - bool notify; -} CONTROL_TRANSFER; - -typedef enum {ATTACHED, POWERED, DEFAULT, ADDRESS, CONFIGURED} DEVICE_STATE; - -typedef struct { - volatile DEVICE_STATE state; - uint8_t configuration; - bool suspended; -} USB_DEVICE; - #endif From 1ac1e168160684e632cce61a9451a93b2d0e85c4 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 7 Feb 2018 16:36:35 -0600 Subject: [PATCH 130/488] Add USBDevice test code Add a USB test and the class USBTester.cpp to go along with it. --- TESTS/host_tests/pyusb_basic.py | 349 ++++++++++++++++++++++++ TESTS/usb_device/basic/USBTester.cpp | 384 +++++++++++++++++++++++++++ TESTS/usb_device/basic/USBTester.h | 91 +++++++ TESTS/usb_device/basic/main.cpp | 62 +++++ 4 files changed, 886 insertions(+) create mode 100644 TESTS/host_tests/pyusb_basic.py create mode 100644 TESTS/usb_device/basic/USBTester.cpp create mode 100644 TESTS/usb_device/basic/USBTester.h create mode 100644 TESTS/usb_device/basic/main.cpp diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py new file mode 100644 index 00000000000..24c7e951455 --- /dev/null +++ b/TESTS/host_tests/pyusb_basic.py @@ -0,0 +1,349 @@ +""" +mbed SDK +Copyright (c) 2018-2018 ARM Limited + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +""" +from __future__ import print_function + +from mbed_host_tests import BaseHostTest +from argparse import ArgumentParser +import time +import sys +from threading import Thread + +import usb.core +from usb.util import build_request_type +from usb.util import CTRL_OUT, CTRL_IN +from usb.util import CTRL_TYPE_STANDARD, CTRL_TYPE_CLASS, CTRL_TYPE_VENDOR +from usb.util import (CTRL_RECIPIENT_DEVICE, CTRL_RECIPIENT_INTERFACE, + CTRL_RECIPIENT_ENDPOINT, CTRL_RECIPIENT_OTHER) + +def get_interface(dev, interface, alternate=0): + intf = None + for active_if in dev.get_active_configuration(): + if active_if.bInterfaceNumber == interface and active_if.bAlternateSetting == alternate: + assert intf is None, "duplicate interface" + intf = active_if + return intf + +VENDOR_TEST_CTRL_IN = 1 +VENDOR_TEST_CTRL_OUT = 2 +VENDOR_TEST_CTRL_NONE = 3 +VENDOR_TEST_CTRL_IN_DELAY = 4 +VENDOR_TEST_CTRL_OUT_DELAY = 5 +VENDOR_TEST_CTRL_NONE_DELAY = 6 +VENDOR_TEST_CTRL_IN_STATUS_DELAY = 7 +VENDOR_TEST_CTRL_OUT_STATUS_DELAY = 8 +VENDOR_TEST_UNSUPPORTED_REQUEST = 32 + +class PyusbBasicTest(BaseHostTest): + """ + """ + def _callback_usb_enumeration_done(self, key, value, timestamp): + print("Received key %s = %s" % (key, value)) + self.log("Received key %s = %s" % (key, value)) + test_device(value, self.log) + passed = True + results = "pass" if passed else "fail" + self.send_kv(results, "0") + + def setup(self): + self.__result = False + self.register_callback('usb_enumeration_done', self._callback_usb_enumeration_done) + + def result(self): + return self.__result + + def teardown(self): + pass + + +class TestMatch(object): + + def __init__(self, serial): + self.serial = serial + + def __call__(self, dev): + try: + return dev.serial_number == self.serial + except ValueError: + return False + + +def test_device(serial_number, log=print): + dev = usb.core.find(custom_match=TestMatch(serial_number)) + if dev is None: + log("Device not found") + return + + ## --Control Tests-- ## + #control_basic_test(dev, log) + # Test control IN/OUT/NODATA + control_stall_test(dev, log) + # Invalid control in/out/nodata requests are stalled + # Stall during different points in the control transfer + #control_sizes_test(dev, log) + # Test control requests of various data stage sizes (1,8,16,32,64,255,256,...) + control_stress_test(dev, log) + # normal and delay mode + + ## --Endpoint test-- ## + #for each endpoint + #-test all allowed wMaxPacketSize sizes and transfer types + #-stall tests + #-set/clear stall control request + #-stall at random points of sending/receiveing data + #-test aborting an in progress transfer + #test as many endpoints at once as possible + #test biggest configuration possible + + ## --physical test-- ## + #-reset notification/handling + #-connect/disconnect tests - have device disconnect and then reconnect + #-disconnect during various phases of control transfers and endpoint transfers + #-suspend/resume tests (may not be possible to test with current framework) + #-suspend/resume notifications + + ## -- Stress tests-- ## + #-concurrent tests (all endpoints at once including control) + #-concurrent tests + reset + delay + + ## -- other tests-- ## + #-report throughput for in/out of control, bulk, interrupt and iso transfers + #-verify that construction/destruction repeatedly works gracefully + + + intf = get_interface(dev, 0, 0) + + # Find endpoints + bulk_in = None + bulk_out = None + int_in = None + int_out = None + + for endpoint in intf: + log("Processing endpoint %s" % endpoint) + ep_type = endpoint.bmAttributes & 0x3 + if ep_type == 2: + if endpoint.bEndpointAddress & 0x80: + assert bulk_in is None + bulk_in = endpoint + else: + assert bulk_out is None + bulk_out = endpoint + elif ep_type == 3: + if endpoint.bEndpointAddress & 0x80: + assert int_in is None + int_in = endpoint + else: + assert int_out is None + int_out = endpoint + assert bulk_in is not None + assert bulk_out is not None + assert int_in is not None + assert int_out is not None + bulk_out.write("hello" + "x" *256); + int_out.write("world" + "x" *256); + + dev.set_interface_altsetting(0, 1) + + intf = get_interface(dev, 0, 0) + + # Find endpoints + bulk_in = None + bulk_out = None + int_in = None + int_out = None + + for endpoint in intf: + log("Processing endpoint %s" % endpoint) + ep_type = endpoint.bmAttributes & 0x3 + if ep_type == 2: + if endpoint.bEndpointAddress & 0x80: + assert bulk_in is None + bulk_in = endpoint + else: + assert bulk_out is None + bulk_out = endpoint + elif ep_type == 3: + if endpoint.bEndpointAddress & 0x80: + assert int_in is None + int_in = endpoint + else: + assert int_out is None + int_out = endpoint + assert bulk_in is not None + assert bulk_out is not None + assert int_in is not None + assert int_out is not None + bulk_out.write("hello2" + "x" *256); + int_out.write("world2" + "x" *256); + + + t = Thread(target=write_data, args=(bulk_out,)) + t.start() + + for _ in range(10): + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_CTRL_NONE_DELAY + value = 0 # Always 0 for this request + index = 0 # Communication interface + length = 0 # No data + dev.ctrl_transfer(request_type, request, value, index, length, 5000) + + t.join() + + return True + +def write_data(pipe): + print("Write data running") + count = 0 + for _ in range(40): + pipe.write("Value is %s" % count) + count += 1 + print("Count %s" % count) + time.sleep(0.5) + + +def control_stall_test(dev, log): + + # Control OUT stall + try: + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_UNSUPPORTED_REQUEST + value = 0 # Always 0 for this request + index = 0 # Communication interface + data = bytearray(64) # Dummy data + dev.ctrl_transfer(request_type, request, value, index, data, 5000) + raise Exception("Invalid request not stalled") + except usb.core.USBError: + log("Invalid request stalled") + + # Control request with no data stage (Device-to-host) + try: + request_type = build_request_type(CTRL_IN, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_UNSUPPORTED_REQUEST + value = 0 # Always 0 for this request + index = 0 # Communication interface + length = 0 + dev.ctrl_transfer(request_type, request, value, index, length, 5000) + raise Exception("Invalid request not stalled") + except usb.core.USBError: + log("Invalid request stalled") + + # Control request with no data stage (Host-to-device) + try: + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_UNSUPPORTED_REQUEST + value = 0 # Always 0 for this request + index = 0 # Communication interface + length = 0 + dev.ctrl_transfer(request_type, request, value, index, length, 5000) + raise Exception("Invalid request not stalled") + except usb.core.USBError: + log("Invalid request stalled") + + # Control IN stall + try: + request_type = build_request_type(CTRL_IN, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_UNSUPPORTED_REQUEST + value = 0 # Always 0 for this request + index = 0 # Communication interface + length = 255 + dev.ctrl_transfer(request_type, request, value, index, length, 5000) + raise Exception("Invalid request not stalled") + except usb.core.USBError: + log("Invalid request stalled") + + for i in (6, 7, 5): + try: + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = 0x6 # GET_DESCRIPTOR + value = (0x03 << 8) | (i << 0) # String descriptor index + index = 0 # Communication interface + length = 255 + resp = dev.ctrl_transfer(request_type, request, value, index, length, 5000) + log("Requesting string %s passed" % i) + except usb.core.USBError: + log("Requesting string %s failed" % i) + + +def control_stress_test(dev, log): + + # Test various patterns of control transfers + # + # Some devices have had problems with back-to-back + # control transfers. Intentionally send these sequences + # to make sure they are properly handled. + count = 0 + for _ in range(100): + # Control transfer with a data in stage + request_type = build_request_type(CTRL_IN, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_CTRL_IN + value = 8 # Size of data the device should actually send + index = count # Unused - set for debugging only + length = 255 + dev.ctrl_transfer(request_type, request, value, index, length, 5000) + count += 1 + + for _ in range(100): + # Control transfer with a data out stage followed + # by a control transfer with a data in stage + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_CTRL_OUT + value = 8 # Size of data the device should actually read + index = count # Unused - set for debugging only + data = bytearray(8) # Dummy data + dev.ctrl_transfer(request_type, request, value, index, data, 5000) + count += 1 + + request_type = build_request_type(CTRL_IN, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_CTRL_IN + value = 8 # Size of data the device should actually send + index = count # Unused - set for debugging only + length = 255 + dev.ctrl_transfer(request_type, request, value, index, length, 5000) + count += 1 + + for _ in range(100): + # Control transfer with a data out stage + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_CTRL_OUT + value = 8 # Size of data the device should actually read + index = count # Unused - set for debugging only + data = bytearray(8) # Dummy data + dev.ctrl_transfer(request_type, request, value, index, data, 5000) + count += 1 + + +def main(): + parser = ArgumentParser(description="USB basic test") + parser.add_argument('serial', help='USB serial number of DUT') + args = parser.parse_args() + ret = test_device(args.serial) + print("Test %s" % "passed" if ret else "failed") + + +if __name__ == "__main__": + main() diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp new file mode 100644 index 00000000000..1f26fce2f1c --- /dev/null +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -0,0 +1,384 @@ +/* + * Copyright (c) 2018-2018, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBTester.h" +#include "mbed_shared_queues.h" +#include "EndpointResolver.h" + +#define DEFAULT_CONFIGURATION (1) + +#define VENDOR_TEST_CTRL_IN 1 +#define VENDOR_TEST_CTRL_OUT 2 +#define VENDOR_TEST_CTRL_NONE 3 +#define VENDOR_TEST_CTRL_IN_DELAY 4 +#define VENDOR_TEST_CTRL_OUT_DELAY 5 +#define VENDOR_TEST_CTRL_NONE_DELAY 6 +#define VENDOR_TEST_CTRL_IN_STATUS_DELAY 7 +#define VENDOR_TEST_CTRL_OUT_STATUS_DELAY 8 + +#define MAX_EP_SIZE 64 +#define MIN_EP_SIZE 8 + + +USBTester::USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): USBDevice(vendor_id, product_id, product_release) +{ + + EndpointResolver resolver(endpoint_table()); + + resolver.endpoint_ctrl(64); + bulk_in = resolver.endpoint_in(USB_EP_TYPE_BULK, 64); + bulk_out = resolver.endpoint_out(USB_EP_TYPE_BULK, 64); + int_in = resolver.endpoint_in(USB_EP_TYPE_INT, 64); + int_out = resolver.endpoint_out(USB_EP_TYPE_INT, 64); + MBED_ASSERT(resolver.valid()); + queue = mbed_highprio_event_queue(); + + configuration_desc(); + + init(); + USBDevice::connect(connect_blocking); + +} + +USBTester::~USBTester() +{ + deinit(); +} + +void USBTester::callback_state_change(DeviceState new_state) +{ + // Nothing to do +}; + +void USBTester::callback_request(const setup_packet_t *setup) +{ + /* Called in ISR context */ + RequestResult result = PassThrough; + uint8_t *data = NULL; + uint32_t size = 0; + uint32_t delay = 0; + + /* Process vendor-specific requests */ + if (setup->bmRequestType.Type == VENDOR_TYPE) { + switch (setup->bRequest) { + case VENDOR_TEST_CTRL_IN: + result = Send; + data = ctrl_buf; + size = setup->wValue < sizeof(ctrl_buf) ? setup->wValue : sizeof(ctrl_buf); + break; + case VENDOR_TEST_CTRL_OUT: + result = Receive; + data = ctrl_buf; + size = setup->wValue < 8 ? setup->wValue : 8; + break; + case VENDOR_TEST_CTRL_NONE: + result = Success; + break; + case VENDOR_TEST_CTRL_NONE_DELAY: + result = Success; + delay = 2000; + break; + default: + result = PassThrough; + break; + } + } + + if (delay) { + queue->call_in(delay, static_cast(this), &USBTester::complete_request, Success, data, size); + } else { + complete_request(result, data, size); + } + + +} + +void USBTester::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) +{ + if (aborted) { + complete_request_xfer_done(false); + return; + } + + bool result = false; + if (setup->bmRequestType.Type == VENDOR_TYPE) { + switch (setup->bRequest) { + case VENDOR_TEST_CTRL_IN: + result = true; + break; + case VENDOR_TEST_CTRL_OUT: + result = true; + break; + default: + result = false; + break; + } + } + complete_request_xfer_done(true); +} + +// Called in ISR context +// Set configuration. Return false if the +// configuration is not supported. +void USBTester::callback_set_configuration(uint8_t configuration) +{ + if (configuration != DEFAULT_CONFIGURATION) { + complete_set_configuration(false); + return; + } + + // Configure endpoints > 0 + endpoint_add(int_in, MAX_EP_SIZE, USB_EP_TYPE_INT); + endpoint_add(int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); + endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); + endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); + + read_start(int_out); + read_start(bulk_out); + + complete_set_configuration(true); +} + +void USBTester::callback_set_interface(uint16_t interface, uint8_t alternate) +{ + if (interface == 0 && alternate == 0) { + endpoint_remove(int_in); + endpoint_remove(int_out); + endpoint_remove(bulk_in); + endpoint_remove(bulk_out); + + endpoint_add(int_in, MAX_EP_SIZE, USB_EP_TYPE_INT); + endpoint_add(int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); + endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); + endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); + + read_start(int_out); + read_start(bulk_out); + + complete_set_interface(true); + return; + } + if (interface == 0 && alternate == 1) { + endpoint_remove(int_in); + endpoint_remove(int_out); + endpoint_remove(bulk_in); + endpoint_remove(bulk_out); + + endpoint_add(int_in, MIN_EP_SIZE, USB_EP_TYPE_INT); + endpoint_add(int_out, MIN_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); + endpoint_add(bulk_in, MIN_EP_SIZE, USB_EP_TYPE_BULK); + endpoint_add(bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); + + read_start(int_out); + read_start(bulk_out); + + complete_set_interface(true); + return; + } + complete_set_interface(false); +} + +const uint8_t *USBTester::device_desc() +{ + uint8_t ep0_size = endpoint_max_packet_size(0x00); + uint8_t device_descriptor_temp[] = { + 18, // bLength + 1, // bDescriptorType + 0x10, 0x01, // bcdUSB + 0, // bDeviceClass + 0, // bDeviceSubClass + 0, // bDeviceProtocol + ep0_size, // bMaxPacketSize0 + (uint8_t)(LSB(vendor_id)), (uint8_t)(MSB(vendor_id)), // idVendor + (uint8_t)(LSB(product_id)), (uint8_t)(MSB(product_id)),// idProduct + 0x00, 0x01, // bcdDevice + 1, // iManufacturer + 2, // iProduct + 3, // iSerialNumber + 1 // bNumConfigurations + }; + MBED_ASSERT(sizeof(device_descriptor_temp) == sizeof(device_descriptor)); + memcpy(device_descriptor, device_descriptor_temp, sizeof(device_descriptor)); + return device_descriptor; +} + +const uint8_t *USBTester::string_iinterface_desc() +{ + static const uint8_t string_iinterface_descriptor[] = { + 0x08, + STRING_DESCRIPTOR, + 'C', 0, 'D', 0, 'C', 0, + }; + return string_iinterface_descriptor; +} + +const uint8_t *USBTester::string_iproduct_desc() +{ + static const uint8_t string_iproduct_descriptor[] = { + 0x16, + STRING_DESCRIPTOR, + 'C', 0, 'D', 0, 'C', 0, ' ', 0, 'D', 0, 'E', 0, 'V', 0, 'I', 0, 'C', 0, 'E', 0 + }; + return string_iproduct_descriptor; +} + + +#define CONFIG1_DESC_SIZE (9+9+7+7+7+7 + 9+7+7+7+7) + +const uint8_t *USBTester::configuration_desc() +{ + static const uint8_t config_descriptor[] = { + // configuration descriptor + 9, // bLength + 2, // bDescriptorType + LSB(CONFIG1_DESC_SIZE), // wTotalLength + MSB(CONFIG1_DESC_SIZE), + 1, // bNumInterfaces + 1, // bConfigurationValue + 0, // iConfiguration + 0x80, // bmAttributes + 50, // bMaxPower + + // Interface 0 setting 0 + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + 9, // bLength + 4, // bDescriptorType + 0, // bInterfaceNumber + 0, // bAlternateSetting + 4, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_in, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MAX_EP_SIZE),// wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE),// wMaxPacketSize (MSB) + 0, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_out, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MAX_EP_SIZE),// wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE),// wMaxPacketSize (MSB) + 0, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + int_in, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=interrupt) + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + int_out, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=interrupt) + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // Interface 0 setting 1 + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + 9, // bLength + 4, // bDescriptorType + 0, // bInterfaceNumber + 1, // bAlternateSetting + 4, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_in, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) + 0, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_out, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) + 0, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + int_in, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=interrupt) + LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + int_out, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=interrupt) + LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) + 1 // bInterval + + }; + return config_descriptor; +} + + +void USBTester::epint_out_callback(usb_ep_t endpoint) +{ + uint8_t buffer[65]; + uint32_t size = 0; + + if (!read_finish(endpoint, buffer, sizeof(buffer), &size)) { + return; + } + if (!read_start(endpoint)) { + return; + } +} +void USBTester::epbulk_out_callback(usb_ep_t endpoint) +{ + uint8_t buffer[65]; + uint32_t size = 0; + + if (!read_finish(endpoint, buffer, sizeof(buffer), &size)) { + return; + } + if (!read_start(endpoint)) { + return; + } +} + diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h new file mode 100644 index 00000000000..0e527af98ab --- /dev/null +++ b/TESTS/usb_device/basic/USBTester.h @@ -0,0 +1,91 @@ +/* + * Copyright (c) 2018-2018, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USB_TESTER_H +#define USB_TESTER_H + +/* These headers are included for child class. */ +#include "USBDescriptor.h" +#include "USBDevice_Types.h" +#include "EventQueue.h" + +#include "USBDevice.h" + +class USBTester: public USBDevice { +public: + + /* + * Constructor + * + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your preoduct_release + * @param connect_blocking define if the connection must be blocked if USB not plugged in + */ + USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); + + ~USBTester(); + +protected: + + /* + * Get device descriptor. Warning: this method has to store the length of the report descriptor in reportLength. + * + * @returns pointer to the device descriptor + */ + virtual const uint8_t *device_desc(); + + /* + * Get string product descriptor + * + * @returns pointer to the string product descriptor + */ + virtual const uint8_t *string_iproduct_desc(); + + /* + * Get string interface descriptor + * + * @returns pointer to the string interface descriptor + */ + virtual const uint8_t *string_iinterface_desc(); + + /* + * Get configuration descriptor + * + * @returns pointer to the configuration descriptor + */ + virtual const uint8_t *configuration_desc(); + +protected: + uint8_t bulk_in; + uint8_t bulk_out; + uint8_t int_in; + uint8_t int_out; + EventQueue *queue; + + virtual void callback_state_change(DeviceState new_state); + virtual void callback_request(const setup_packet_t *setup); + virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); + virtual void callback_set_configuration(uint8_t configuration); + virtual void callback_set_interface(uint16_t interface, uint8_t alternate); + virtual void epbulk_out_callback(usb_ep_t endpoint); + virtual void epint_out_callback(usb_ep_t endpoint); + uint8_t ctrl_buf[2048]; + +}; + +#endif diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp new file mode 100644 index 00000000000..141bb473e2c --- /dev/null +++ b/TESTS/usb_device/basic/main.cpp @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2018-2018, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include +#include +#include "mbed.h" +#include "greentea-client/test_env.h" +#include "unity/unity.h" +#include "utest/utest.h" + +#include "USBTester.h" + +#if !defined(DEVICE_USBDEVICE) || !DEVICE_USBDEVICE +#error [NOT_SUPPORTED] USB Device not supported for this target +#endif + +using namespace utest::v1; + +// Echo server (echo payload to host) +void test_case_basic() +{ + char _key[11] = {}; + char _value[128] = {}; + + { + USBTester serial(0x0d28, 0x0205, 0x0001, true); + + greentea_send_kv("usb_enumeration_done", "0123456789"); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + } +} + +Case cases[] = { + Case("pyusb basic test", test_case_basic), +}; + +utest::v1::status_t greentea_test_setup(const size_t number_of_cases) +{ + GREENTEA_SETUP(120, "pyusb_basic"); + return greentea_test_setup_handler(number_of_cases); +} + +Specification specification(greentea_test_setup, cases, greentea_test_teardown_handler); + +int main() +{ + Harness::run(specification); +} From e6ee2494e9efd7a7f57d012c80f1761af99e0b12 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 7 Feb 2018 16:43:26 -0600 Subject: [PATCH 131/488] Add USBPhy for the LPC17xx Move the LPC17xx USB driver files from mbed-os\features\unsupported\USBDevice\targets\TARGET_NXP and update them to match the new USBPhy API. --- .../usb/USBEndpoints_LPC17_LPC23.h | 97 +++ .../TARGET_LPC176X/usb/USBHAL_LPC17.cpp | 709 ++++++++++++++++++ .../TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h | 66 ++ targets/targets.json | 3 +- 4 files changed, 874 insertions(+), 1 deletion(-) create mode 100644 targets/TARGET_NXP/TARGET_LPC176X/usb/USBEndpoints_LPC17_LPC23.h create mode 100644 targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp create mode 100644 targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBEndpoints_LPC17_LPC23.h b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBEndpoints_LPC17_LPC23.h new file mode 100644 index 00000000000..09ab66540d6 --- /dev/null +++ b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBEndpoints_LPC17_LPC23.h @@ -0,0 +1,97 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#define NUMBER_OF_LOGICAL_ENDPOINTS (16) +#define NUMBER_OF_PHYSICAL_ENDPOINTS (NUMBER_OF_LOGICAL_ENDPOINTS * 2) + +/* Define physical endpoint numbers */ + +/* Endpoint No. Type(s) MaxPacket DoubleBuffer */ +/* ---------------- ------------ ---------- --- */ +#define EP0OUT (0x00) /* Control 64 No */ +#define EP0IN (0x80) /* Control 64 No */ +#define EP1OUT (0x01) /* Interrupt 64 No */ +#define EP1IN (0x81) /* Interrupt 64 No */ +#define EP2OUT (0x02) /* Bulk 64 Yes */ +#define EP2IN (0x82) /* Bulk 64 Yes */ +#define EP3OUT (0x03) /* Isochronous 1023 Yes */ +#define EP3IN (0x83) /* Isochronous 1023 Yes */ +#define EP4OUT (0x04) /* Interrupt 64 No */ +#define EP4IN (0x84) /* Interrupt 64 No */ +#define EP5OUT (0x05) /* Bulk 64 Yes */ +#define EP5IN (0x85) /* Bulk 64 Yes */ +#define EP6OUT (0x06) /* Isochronous 1023 Yes */ +#define EP6IN (0x86) /* Isochronous 1023 Yes */ +#define EP7OUT (0x07) /* Interrupt 64 No */ +#define EP7IN (0x87) /* Interrupt 64 No */ +#define EP8OUT (0x08) /* Bulk 64 Yes */ +#define EP8IN (0x88) /* Bulk 64 Yes */ +#define EP9OUT (0x09) /* Isochronous 1023 Yes */ +#define EP9IN (0x89) /* Isochronous 1023 Yes */ +#define EP10OUT (0x0A) /* Interrupt 64 No */ +#define EP10IN (0x8A) /* Interrupt 64 No */ +#define EP11OUT (0x0B) /* Bulk 64 Yes */ +#define EP11IN (0x8B) /* Bulk 64 Yes */ +#define EP12OUT (0x0C) /* Isochronous 1023 Yes */ +#define EP12IN (0x8C) /* Isochronous 1023 Yes */ +#define EP13OUT (0x0D) /* Interrupt 64 No */ +#define EP13IN (0x8D) /* Interrupt 64 No */ +#define EP14OUT (0x0E) /* Bulk 64 Yes */ +#define EP14IN (0x8E) /* Bulk 64 Yes */ +#define EP15OUT (0x0F) /* Bulk 64 Yes */ +#define EP15IN (0x8F) /* Bulk 64 Yes */ + +/* Maximum Packet sizes */ + +#define MAX_PACKET_SIZE_EP0 (64) +#define MAX_PACKET_SIZE_EP1 (64) +#define MAX_PACKET_SIZE_EP2 (64) +#define MAX_PACKET_SIZE_EP3 (1023) +#define MAX_PACKET_SIZE_EP4 (64) +#define MAX_PACKET_SIZE_EP5 (64) +#define MAX_PACKET_SIZE_EP6 (1023) +#define MAX_PACKET_SIZE_EP7 (64) +#define MAX_PACKET_SIZE_EP8 (64) +#define MAX_PACKET_SIZE_EP9 (1023) +#define MAX_PACKET_SIZE_EP10 (64) +#define MAX_PACKET_SIZE_EP11 (64) +#define MAX_PACKET_SIZE_EP12 (1023) +#define MAX_PACKET_SIZE_EP13 (64) +#define MAX_PACKET_SIZE_EP14 (64) +#define MAX_PACKET_SIZE_EP15 (64) + +/* Generic endpoints - intended to be portable accross devices */ +/* and be suitable for simple USB devices. */ + +/* Bulk endpoints */ +#define EPBULK_OUT (EP2OUT) +#define EPBULK_IN (EP2IN) +#define EPBULK_OUT_callback EP2_OUT_callback +#define EPBULK_IN_callback EP2_IN_callback +/* Interrupt endpoints */ +#define EPINT_OUT (EP1OUT) +#define EPINT_IN (EP1IN) +#define EPINT_OUT_callback EP1_OUT_callback +#define EPINT_IN_callback EP1_IN_callback +/* Isochronous endpoints */ +#define EPISO_OUT (EP3OUT) +#define EPISO_IN (EP3IN) +#define EPISO_OUT_callback EP3_OUT_callback +#define EPISO_IN_callback EP3_IN_callback + +#define MAX_PACKET_SIZE_EPBULK (MAX_PACKET_SIZE_EP2) +#define MAX_PACKET_SIZE_EPINT (MAX_PACKET_SIZE_EP1) +#define MAX_PACKET_SIZE_EPISO (MAX_PACKET_SIZE_EP3) diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp new file mode 100644 index 00000000000..23e8c1f87a1 --- /dev/null +++ b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp @@ -0,0 +1,709 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined(DEVICE_USBDEVICE) && DEVICE_USBDEVICE && \ + (defined(TARGET_LPC1768) || defined(TARGET_LPC2368) || defined(TARGET_LPC2460)) + +#include "USBEndpoints_LPC17_LPC23.h" +#include "USBPhyHw.h" +#include "usb_phy_api.h" + + +// Get endpoint direction +#define IN_EP(endpoint) ((endpoint) & 1U ? true : false) +#define OUT_EP(endpoint) ((endpoint) & 1U ? false : true) + +// Convert physical endpoint number to register bit +#define EP(endpoint) (1UL<>1)|(((endpoint)&1)?0x80:0)) + +// Power Control for Peripherals register +#define PCUSB (1UL<<31) + +// USB Clock Control register +#define DEV_CLK_EN (1UL<<1) +#define AHB_CLK_EN (1UL<<4) + +// USB Clock Status register +#define DEV_CLK_ON (1UL<<1) +#define AHB_CLK_ON (1UL<<4) + +// USB Device Interupt registers +#define FRAME (1UL<<0) +#define EP_FAST (1UL<<1) +#define EP_SLOW (1UL<<2) +#define DEV_STAT (1UL<<3) +#define CCEMPTY (1UL<<4) +#define CDFULL (1UL<<5) +#define RxENDPKT (1UL<<6) +#define TxENDPKT (1UL<<7) +#define EP_RLZED (1UL<<8) +#define ERR_INT (1UL<<9) + +// USB Control register +#define RD_EN (1<<0) +#define WR_EN (1<<1) +#define LOG_ENDPOINT(endpoint) ((DESC_TO_PHY(endpoint)>>1)<<2) + +// USB Receive Packet Length register +#define DV (1UL<<10) +#define PKT_RDY (1UL<<11) +#define PKT_LNGTH_MASK (0x3ff) + +// Serial Interface Engine (SIE) +#define SIE_WRITE (0x01) +#define SIE_READ (0x02) +#define SIE_COMMAND (0x05) +#define SIE_CMD_CODE(phase, data) ((phase<<8)|(data<<16)) + +// SIE Command codes +#define SIE_CMD_SET_ADDRESS (0xD0) +#define SIE_CMD_CONFIGURE_DEVICE (0xD8) +#define SIE_CMD_SET_MODE (0xF3) +#define SIE_CMD_READ_FRAME_NUMBER (0xF5) +#define SIE_CMD_READ_TEST_REGISTER (0xFD) +#define SIE_CMD_SET_DEVICE_STATUS (0xFE) +#define SIE_CMD_GET_DEVICE_STATUS (0xFE) +#define SIE_CMD_GET_ERROR_CODE (0xFF) +#define SIE_CMD_READ_ERROR_STATUS (0xFB) + +#define SIE_CMD_SELECT_ENDPOINT(endpoint) (0x00+DESC_TO_PHY(endpoint)) +#define SIE_CMD_SELECT_ENDPOINT_CLEAR_INTERRUPT(endpoint) (0x40+DESC_TO_PHY(endpoint)) +#define SIE_CMD_SET_ENDPOINT_STATUS(endpoint) (0x40+DESC_TO_PHY(endpoint)) + +#define SIE_CMD_CLEAR_BUFFER (0xF2) +#define SIE_CMD_VALIDATE_BUFFER (0xFA) + +// SIE Device Status register +#define SIE_DS_CON (1<<0) +#define SIE_DS_CON_CH (1<<1) +#define SIE_DS_SUS (1<<2) +#define SIE_DS_SUS_CH (1<<3) +#define SIE_DS_RST (1<<4) + +// SIE Device Set Address register +#define SIE_DSA_DEV_EN (1<<7) + +// SIE Configue Device register +#define SIE_CONF_DEVICE (1<<0) + +// Select Endpoint register +#define SIE_SE_FE (1<<0) +#define SIE_SE_ST (1<<1) +#define SIE_SE_STP (1<<2) +#define SIE_SE_PO (1<<3) +#define SIE_SE_EPN (1<<4) +#define SIE_SE_B_1_FULL (1<<5) +#define SIE_SE_B_2_FULL (1<<6) + +// Set Endpoint Status command +#define SIE_SES_ST (1<<0) +#define SIE_SES_DA (1<<5) +#define SIE_SES_RF_MO (1<<6) +#define SIE_SES_CND_ST (1<<7) + + +static USBPhyHw *instance; + +static volatile int epComplete; + +static void SIECommand(uint32_t command) +{ + // The command phase of a SIE transaction + LPC_USB->USBDevIntClr = CCEMPTY; + LPC_USB->USBCmdCode = SIE_CMD_CODE(SIE_COMMAND, command); + while (!(LPC_USB->USBDevIntSt & CCEMPTY)); +} + +static void SIEWriteData(uint8_t data) +{ + // The data write phase of a SIE transaction + LPC_USB->USBDevIntClr = CCEMPTY; + LPC_USB->USBCmdCode = SIE_CMD_CODE(SIE_WRITE, data); + while (!(LPC_USB->USBDevIntSt & CCEMPTY)); +} + +static uint8_t SIEReadData(uint32_t command) +{ + // The data read phase of a SIE transaction + LPC_USB->USBDevIntClr = CDFULL; + LPC_USB->USBCmdCode = SIE_CMD_CODE(SIE_READ, command); + while (!(LPC_USB->USBDevIntSt & CDFULL)); + return (uint8_t)LPC_USB->USBCmdData; +} + +static void SIEsetDeviceStatus(uint8_t status) +{ + // Write SIE device status register + SIECommand(SIE_CMD_SET_DEVICE_STATUS); + SIEWriteData(status); +} + +static uint8_t SIEgetDeviceStatus(void) +{ + // Read SIE device status register + SIECommand(SIE_CMD_GET_DEVICE_STATUS); + return SIEReadData(SIE_CMD_GET_DEVICE_STATUS); +} + +void SIEsetAddress(uint8_t address) +{ + // Write SIE device address register + SIECommand(SIE_CMD_SET_ADDRESS); + SIEWriteData((address & 0x7f) | SIE_DSA_DEV_EN); +} + +static uint8_t SIEselectEndpoint(uint8_t endpoint) +{ + // SIE select endpoint command + SIECommand(SIE_CMD_SELECT_ENDPOINT(endpoint)); + return SIEReadData(SIE_CMD_SELECT_ENDPOINT(endpoint)); +} + +static uint8_t SIEclearBuffer(void) +{ + // SIE clear buffer command + SIECommand(SIE_CMD_CLEAR_BUFFER); + return SIEReadData(SIE_CMD_CLEAR_BUFFER); +} + +static void SIEvalidateBuffer(void) +{ + // SIE validate buffer command + SIECommand(SIE_CMD_VALIDATE_BUFFER); +} + +static void SIEsetEndpointStatus(uint8_t endpoint, uint8_t status) +{ + // SIE set endpoint status command + SIECommand(SIE_CMD_SET_ENDPOINT_STATUS(endpoint)); + SIEWriteData(status); +} + +static uint16_t SIEgetFrameNumber(void) __attribute__((unused)); +static uint16_t SIEgetFrameNumber(void) +{ + // Read current frame number + uint16_t lowByte; + uint16_t highByte; + + SIECommand(SIE_CMD_READ_FRAME_NUMBER); + lowByte = SIEReadData(SIE_CMD_READ_FRAME_NUMBER); + highByte = SIEReadData(SIE_CMD_READ_FRAME_NUMBER); + + return (highByte << 8) | lowByte; +} + +static void SIEconfigureDevice(void) +{ + // SIE Configure device command + SIECommand(SIE_CMD_CONFIGURE_DEVICE); + SIEWriteData(SIE_CONF_DEVICE); +} + +static void SIEunconfigureDevice(void) +{ + // SIE Configure device command + SIECommand(SIE_CMD_CONFIGURE_DEVICE); + SIEWriteData(0); +} + +static void SIEconnect(void) +{ + // Connect USB device + uint8_t status = SIEgetDeviceStatus(); + SIEsetDeviceStatus(status | SIE_DS_CON); +} + + +static void SIEdisconnect(void) +{ + // Disconnect USB device + uint8_t status = SIEgetDeviceStatus(); + SIEsetDeviceStatus(status & ~SIE_DS_CON); +} + + +static uint8_t selectEndpointClearInterrupt(uint8_t endpoint) +{ + // Implemented using using EP_INT_CLR. + LPC_USB->USBEpIntClr = EP(endpoint); + while (!(LPC_USB->USBDevIntSt & CDFULL)); + return (uint8_t)LPC_USB->USBCmdData; +} + + +static void enableEndpointEvent(uint8_t endpoint) +{ + // Enable an endpoint interrupt + LPC_USB->USBEpIntEn |= EP(endpoint); +} + +static void disableEndpointEvent(uint8_t endpoint) __attribute__((unused)); +static void disableEndpointEvent(uint8_t endpoint) +{ + // Disable an endpoint interrupt + LPC_USB->USBEpIntEn &= ~EP(endpoint); +} + + +static uint32_t endpointReadcore(uint8_t endpoint, uint8_t *buffer, uint32_t size) +{ + // Read from an OUT endpoint + uint32_t actual_size; + uint32_t i; + uint32_t data = 0; + uint8_t offset; + + LPC_USB->USBCtrl = LOG_ENDPOINT(endpoint) | RD_EN; + while (!(LPC_USB->USBRxPLen & PKT_RDY)); + + actual_size = LPC_USB->USBRxPLen & PKT_LNGTH_MASK; + + offset = 0; + + if (actual_size > 0) { + for (i = 0; i < actual_size; i++) { + if (offset == 0) { + // Fetch up to four bytes of data as a word + data = LPC_USB->USBRxData; + } + + // extract a byte + if (size) { + *buffer = (data >> offset) & 0xff; + buffer++; + size--; + } + + // move on to the next byte + offset = (offset + 8) % 32; + } + } else { + (void)LPC_USB->USBRxData; + } + + LPC_USB->USBCtrl = 0; + + return actual_size; +} + +static void endpointWritecore(uint8_t endpoint, uint8_t *buffer, uint32_t size) +{ + // Write to an IN endpoint + uint32_t temp, data; + uint8_t offset; + + LPC_USB->USBCtrl = LOG_ENDPOINT(endpoint) | WR_EN; + + LPC_USB->USBTxPLen = size; + offset = 0; + data = 0; + + if (size > 0) { + do { + // Fetch next data byte into a word-sized temporary variable + temp = *buffer++; + + // Add to current data word + temp = temp << offset; + data = data | temp; + + // move on to the next byte + offset = (offset + 8) % 32; + size--; + + if ((offset == 0) || (size == 0)) { + // Write the word to the endpoint + LPC_USB->USBTxData = data; + data = 0; + } + } while (size > 0); + } else { + LPC_USB->USBTxData = 0; + } + + // Clear WR_EN to cover zero length packet case + LPC_USB->USBCtrl = 0; + + SIEselectEndpoint(endpoint); + SIEvalidateBuffer(); +} + +USBPhy *get_usb_phy() +{ + static USBPhyHw usbphy; + return &usbphy; +} + +USBPhyHw::USBPhyHw(void) +{ + +} + +USBPhyHw::~USBPhyHw(void) +{ + +} + +void USBPhyHw::init(USBPhyEvents *events) +{ + this->events = events; + + // Disable IRQ + NVIC_DisableIRQ(USB_IRQn); + + // Enable power to USB device controller + LPC_SC->PCONP |= PCUSB; + + // Enable USB clocks + LPC_USB->USBClkCtrl |= DEV_CLK_EN | AHB_CLK_EN; + while (LPC_USB->USBClkSt != (DEV_CLK_ON | AHB_CLK_ON)); + + // Configure pins P0.29 and P0.30 to be USB D+ and USB D- + LPC_PINCON->PINSEL1 &= 0xc3ffffff; + LPC_PINCON->PINSEL1 |= 0x14000000; + + // Disconnect USB device + SIEdisconnect(); + + // Configure pin P2.9 to be Connect + LPC_PINCON->PINSEL4 &= 0xfffcffff; + LPC_PINCON->PINSEL4 |= 0x00040000; + + // Connect must be low for at least 2.5uS + wait(0.3); + + // Set the maximum packet size for the control endpoints + endpoint_add(EP0IN, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); + endpoint_add(EP0OUT, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); + + // Attach IRQ + instance = this; + NVIC_SetVector(USB_IRQn, (uint32_t)&_usbisr); + + // Enable interrupts for device events and EP0 + LPC_USB->USBDevIntEn = EP_SLOW | DEV_STAT | FRAME; + enableEndpointEvent(EP0IN); + enableEndpointEvent(EP0OUT); +} + +void USBPhyHw::deinit() +{ + // Ensure device disconnected + SIEdisconnect(); + // Disable USB interrupts + NVIC_DisableIRQ(USB_IRQn); + events = NULL; +} + +bool USBPhyHw::powered() +{ + return true; +} + +void USBPhyHw::connect(void) +{ + NVIC_EnableIRQ(USB_IRQn); + // Connect USB device + SIEconnect(); +} + +void USBPhyHw::disconnect(void) +{ + NVIC_DisableIRQ(USB_IRQn); + // Disconnect USB device + SIEdisconnect(); +} + +void USBPhyHw::configure(void) +{ + SIEconfigureDevice(); +} + +void USBPhyHw::unconfigure(void) +{ + SIEunconfigureDevice(); +} + +void USBPhyHw::sof_enable() +{ + //TODO +} + +void USBPhyHw::sof_disable() +{ + //TODO +} + +void USBPhyHw::set_address(uint8_t address) +{ + SIEsetAddress(address); +} + +uint32_t USBPhyHw::ep0_set_max_packet(uint32_t max_packet) +{ + return MAX_PACKET_SIZE_EP0; +} + +void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) +{ + endpointReadcore(EP0OUT, buffer, size); +} + +void USBPhyHw::ep0_read(void) +{ + endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0); +} + +uint32_t USBPhyHw::ep0_read_result(uint8_t *buffer, uint32_t size) +{ + return endpointReadcore(EP0OUT, buffer, size); +} + +void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) +{ + endpointWritecore(EP0IN, buffer, size); +} + +void USBPhyHw::ep0_stall(void) +{ + // This will stall both control endpoints + endpoint_stall(EP0OUT); +} + +bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint32_t maximumSize) +{ + // Don't clear isochronous endpoints + if ((DESC_TO_PHY(endpoint) >> 1) % 3 || (DESC_TO_PHY(endpoint) >> 1) == 0) { + SIEselectEndpoint(endpoint); + SIEclearBuffer(); + } + return true; +} + +bool USBPhyHw::endpoint_read_result(usb_ep_t endpoint, uint8_t *buffer, uint32_t size, uint32_t *bytesRead) +{ + + //for isochronous endpoint, we don't wait an interrupt + if ((DESC_TO_PHY(endpoint) >> 1) % 3 || (DESC_TO_PHY(endpoint) >> 1) == 0) { + if (!(epComplete & EP(endpoint))) { + return false; + } + } + + *bytesRead = endpointReadcore(endpoint, buffer, size); + epComplete &= ~EP(endpoint); + return true; +} + +bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ + epComplete &= ~EP(endpoint); + + endpointWritecore(endpoint, data, size); + return true; +} + +void USBPhyHw::endpoint_abort(usb_ep_t endpoint) +{ + //TODO - needs to be implemented +} + +bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t maxPacket, usb_ep_type_t type) +{ + // Realise an endpoint + LPC_USB->USBDevIntClr = EP_RLZED; + LPC_USB->USBReEp |= EP(endpoint); + LPC_USB->USBEpInd = DESC_TO_PHY(endpoint); + LPC_USB->USBMaxPSize = maxPacket; + + while (!(LPC_USB->USBDevIntSt & EP_RLZED)); + LPC_USB->USBDevIntClr = EP_RLZED; + + enableEndpointEvent(endpoint); + return true; +} + +void USBPhyHw::endpoint_remove(usb_ep_t endpoint) +{ + // Unrealise an endpoint + + disableEndpointEvent(endpoint); + + LPC_USB->USBDevIntClr = EP_RLZED; + LPC_USB->USBReEp &= ~EP(endpoint); + + while (!(LPC_USB->USBDevIntSt & EP_RLZED)); + LPC_USB->USBDevIntClr = EP_RLZED; +} + +void USBPhyHw::endpoint_stall(usb_ep_t endpoint) +{ + // Stall an endpoint + if ((endpoint == EP0IN) || (endpoint == EP0OUT)) { + // Conditionally stall both control endpoints + SIEsetEndpointStatus(EP0OUT, SIE_SES_CND_ST); + } else { + SIEsetEndpointStatus(endpoint, SIE_SES_ST); + } +} + +void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) +{ + // Unstall an endpoint. The endpoint will also be reinitialised + SIEsetEndpointStatus(endpoint, 0); +} + +void USBPhyHw::remote_wakeup(void) +{ + // Remote wakeup + uint8_t status; + + // Enable USB clocks + LPC_USB->USBClkCtrl |= DEV_CLK_EN | AHB_CLK_EN; + while (LPC_USB->USBClkSt != (DEV_CLK_ON | AHB_CLK_ON)); + + status = SIEgetDeviceStatus(); + SIEsetDeviceStatus(status & ~SIE_DS_SUS); +} + +const usb_ep_table_t *USBPhyHw::endpoint_table() +{ + static const usb_ep_table_t lpc_table = { + 4096 - 32 * 4, // 32 words for endpoint buffers + // +3 based added to interrupt and isochronous to ensure enough + // space for 4 byte alignment + { + {USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 0}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0} + } + }; + return &lpc_table; +} + +void USBPhyHw::_usbisr(void) +{ + NVIC_DisableIRQ(USB_IRQn); + instance->events->start_process(); +} + +void USBPhyHw::process(void) +{ + uint8_t devStat; + + if (LPC_USB->USBDevIntSt & FRAME) { + // Start of frame event + events->sof(SIEgetFrameNumber()); + // Clear interrupt status flag + LPC_USB->USBDevIntClr = FRAME; + } + + if (LPC_USB->USBDevIntSt & DEV_STAT) { + // Device Status interrupt + // Must clear the interrupt status flag before reading the device status from the SIE + LPC_USB->USBDevIntClr = DEV_STAT; + + // Read device status from SIE + devStat = SIEgetDeviceStatus(); + //printf("devStat: %d\r\n", devStat); + + if (devStat & SIE_DS_SUS_CH) { + // Suspend status changed + if ((devStat & SIE_DS_SUS) != 0) { + events->suspend(false); + } + } + + if (devStat & SIE_DS_RST) { + // Bus reset + if ((devStat & SIE_DS_SUS) == 0) { + events->suspend(true); + } + events->reset(); + } + } + + if (LPC_USB->USBDevIntSt & EP_SLOW) { + // (Slow) Endpoint Interrupt + + // Process IN packets before SETUP packets + // Note - order of OUT and SETUP does not matter as OUT packets + // are clobbered by SETUP packets and thus ignored. + // + // A SETUP packet can arrive at any time where as an IN packet is + // only sent after calling EP0write and an OUT packet after EP0read. + // The functions EP0write and EP0read are called only in response to + // a setup packet or IN/OUT packets sent in response to that + // setup packet. Therefore, if an IN or OUT packet is pending + // at the same time as a SETUP packet, the IN or OUT packet belongs + // to the previous control transfer and should either be processed + // before the SETUP packet (in the case of IN) or dropped (in the + // case of OUT as SETUP clobbers the OUT data). + if (LPC_USB->USBEpIntSt & EP(EP0IN)) { + selectEndpointClearInterrupt(EP0IN); + LPC_USB->USBDevIntClr = EP_SLOW; + events->ep0_in(); + } + + // Process each endpoint interrupt + if (LPC_USB->USBEpIntSt & EP(EP0OUT)) { + if (selectEndpointClearInterrupt(EP0OUT) & SIE_SE_STP) { + // this is a setup packet + events->ep0_setup(); + } else { + events->ep0_out(); + } + LPC_USB->USBDevIntClr = EP_SLOW; + } + + //TODO - should probably process in the reverse order + for (uint8_t num = 2; num < 16 * 2; num++) { + uint8_t endpoint = PHY_TO_DESC(num); + if (LPC_USB->USBEpIntSt & EP(endpoint)) { + selectEndpointClearInterrupt(endpoint); + epComplete |= EP(endpoint); + LPC_USB->USBDevIntClr = EP_SLOW; + if (endpoint & 0x80) {//TODO - use macro + events->in(endpoint); + } else { + events->out(endpoint); + } + } + } + } + + NVIC_ClearPendingIRQ(USB_IRQn); + NVIC_EnableIRQ(USB_IRQn); +} + +#endif diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h new file mode 100644 index 00000000000..999991c6a66 --- /dev/null +++ b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h @@ -0,0 +1,66 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBPHYHW_H +#define USBPHYHW_H + +#include "mbed.h" +#include "USBPhy.h" + + +class USBPhyHw : public USBPhy { +public: + USBPhyHw(); + virtual ~USBPhyHw(); + virtual void init(USBPhyEvents *events); + virtual void deinit(); + virtual bool powered(); + virtual void connect(); + virtual void disconnect(); + virtual void configure(); + virtual void unconfigure(); + virtual void sof_enable(); + virtual void sof_disable(); + virtual void set_address(uint8_t address); + virtual void remote_wakeup(); + virtual const usb_ep_table_t *endpoint_table(); + + virtual uint32_t ep0_set_max_packet(uint32_t max_packet); + virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_read(void); + virtual uint32_t ep0_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_write(uint8_t *buffer, uint32_t size); + virtual void ep0_stall(void); + + virtual bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type); + virtual void endpoint_remove(usb_ep_t endpoint); + virtual void endpoint_stall(usb_ep_t endpoint); + virtual void endpoint_unstall(usb_ep_t endpoint); + + virtual bool endpoint_read(usb_ep_t endpoint, uint32_t maximumSize); + virtual bool endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytesRead); + virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual void endpoint_abort(usb_ep_t endpoint); + + virtual void process(); + +private: + USBPhyEvents *events; + + static void _usbisr(void); +}; + +#endif diff --git a/targets/targets.json b/targets/targets.json index beb9db48574..1f5ddb9750c 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -593,7 +593,8 @@ "SPISLAVE", "STDIO_MESSAGES", "FLASH", - "MPU" + "MPU", + "USBDEVICE" ], "release_versions": ["2", "5"], "device_name": "LPC1768", From 1688ac22a1ff081aee3c989fbe37cf6fa5c91555 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 15 Feb 2018 13:10:48 -0600 Subject: [PATCH 132/488] Remove mbed 2 USB tests from Travis Remove the mbed 2 USB tests since USB support will be part of mbed 5. --- tools/build_travis.py | 80 ++++++++++++++++--------------------------- 1 file changed, 30 insertions(+), 50 deletions(-) diff --git a/tools/build_travis.py b/tools/build_travis.py index c3684fe0d34..5245d7c0b5b 100644 --- a/tools/build_travis.py +++ b/tools/build_travis.py @@ -27,7 +27,7 @@ ################################################################################ # Configure builds here -# "libs" can contain "dsp", "usb" +# "libs" can contain "dsp" build_list = [ { @@ -44,29 +44,29 @@ { "target": "NUCLEO_F072RB", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_F091RC", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_F103RB", "toolchains": "GCC_ARM" }, - { "target": "NUCLEO_F207ZG", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "NUCLEO_F207ZG", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_F302R8", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_F303K8", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_F303RE", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "NUCLEO_F303ZE", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "NUCLEO_F303ZE", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_F334R8", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "NUCLEO_F401RE", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "NUCLEO_F401RE", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "STEVAL_3DP001V1", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, { "target": "NUCLEO_F410RB", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "NUCLEO_F411RE", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "NUCLEO_F411RE", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_F412ZG", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "NUCLEO_F413ZH", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "NUCLEO_F413ZH", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_L432KC", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "MTB_ADV_WISE_1510", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_L476RG", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_L011K4", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_L031K6", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_L073RZ", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "NUCLEO_F429ZI", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "NUCLEO_F446RE", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "NUCLEO_F446ZE", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "NUCLEO_F746ZG", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "NUCLEO_F767ZI", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "NUCLEO_F429ZI", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "NUCLEO_F446RE", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "NUCLEO_F446ZE", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "NUCLEO_F746ZG", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "NUCLEO_F767ZI", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_L496ZG", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "MOTE_L152RC", "toolchains": "GCC_ARM", "libs": ["dsp"] }, @@ -83,15 +83,15 @@ { "target": "DISCO_F334C8", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "DISCO_F401VC", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "DISCO_F407VG", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "DISCO_F407VG", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "DISCO_F413ZH", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "DISCO_F429ZI", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "DISCO_F469NI", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "DISCO_F746NG", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "DISCO_F769NI", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "DISCO_L475VG_IOT01A", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "DISCO_L476VG", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "DISCO_L072CZ_LRWAN1", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "DISCO_L475VG_IOT01A", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "DISCO_L476VG", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "DISCO_L072CZ_LRWAN1", "toolchains": "GCC_ARM", "libs": ["dsp"] }, # module manufacturer : muRata { "target": "MTB_MURATA_ABZ", "toolchains": "GCC_ARM", "libs": [] }, @@ -101,7 +101,7 @@ { "NXP": ( - { "target": "LPC1768", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "LPC1768", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "LPC11U24", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "OC_MBUINO", "toolchains": "GCC_ARM", "libs": [] }, @@ -114,15 +114,15 @@ { "target": "LPC11U37H_401", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "LPC1549", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "KL05Z", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "KL25Z", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "KL27Z", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "KL43Z", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "KL46Z", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "KL25Z", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "KL27Z", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "KL43Z", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "KL46Z", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "K20D50M", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "TEENSY3_1", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "K64F", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "K22F", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "LPC4088", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "K64F", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "K22F", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "LPC4088", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "ARCH_PRO", "toolchains": "GCC_ARM", "libs": ["dsp"] }, ) }, @@ -141,10 +141,10 @@ "SILICON_LABS": ( { "target": "EFM32ZG_STK3200", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "EFM32HG_STK3400", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "EFM32LG_STK3600", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "EFM32GG_STK3700", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "EFM32WG_STK3800", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "EFM32HG_STK3400", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "EFM32LG_STK3600", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "EFM32GG_STK3700", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "EFM32WG_STK3800", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "EFM32PG_STK3401", "toolchains": "GCC_ARM", "libs": ["dsp"] }, ) }, @@ -163,9 +163,9 @@ { "NUVOTON": ( - { "target": "NUMAKER_PFM_NUC472", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "NUMAKER_PFM_M453", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "NUMAKER_PFM_M487", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "NUMAKER_PFM_NUC472", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "NUMAKER_PFM_M453", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "NUMAKER_PFM_M487", "toolchains": "GCC_ARM", "libs": ["dsp"] }, ) }, @@ -188,25 +188,21 @@ {"target": "LPC1768", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_15", "MBED_16", "MBED_17"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "K64F", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "K22F", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "KL43Z", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, ) @@ -217,25 +213,21 @@ {"target": "NUCLEO_F446RE", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_F446ZE", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_F401RE", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_F411RE", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_F412ZG", @@ -246,31 +238,26 @@ {"target": "NUCLEO_F413ZH", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_F429ZI", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_F207ZG", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_F746ZG", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_F767ZI", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_L476RG", @@ -286,7 +273,6 @@ {"target": "DISCO_F407VG", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "DISCO_F413ZH", @@ -297,19 +283,16 @@ {"target": "NUCLEO_F303ZE", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "DISCO_L475VG_IOT01A", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "DISCO_L476VG", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "DISCO_L072CZ_LRWAN1", @@ -329,19 +312,16 @@ {"target": "NUMAKER_PFM_NUC472", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUMAKER_PFM_M453", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUMAKER_PFM_M487", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } } ) From 7b6b914f59f1449de9a70c3549563ddceb7e4db9 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 13 Feb 2018 11:53:01 -0600 Subject: [PATCH 133/488] Add Kinetis USB files --- .../usb/USBEndpoints_Kinetis.h | 63 ++ .../TARGET_Freescale/usb/USBPhy_Kinetis.cpp | 569 ++++++++++++++++++ 2 files changed, 632 insertions(+) create mode 100644 targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h create mode 100644 targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp diff --git a/targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h b/targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h new file mode 100644 index 00000000000..59ec8dccad1 --- /dev/null +++ b/targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h @@ -0,0 +1,63 @@ +/* Copyright (c) 2010-2011 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#define NUMBER_OF_LOGICAL_ENDPOINTS (4) +#define NUMBER_OF_PHYSICAL_ENDPOINTS (NUMBER_OF_LOGICAL_ENDPOINTS * 2) + +/* Define physical endpoint numbers */ + +/* Endpoint No. */ +/* ---------------- */ +#define EP0OUT (0) +#define EP0IN (1) +#define EP1OUT (2) +#define EP1IN (3) +#define EP2OUT (4) +#define EP2IN (5) +#define EP3OUT (6) +#define EP3IN (7) + +/* Maximum Packet sizes */ + +#define MAX_PACKET_SIZE_EP0 (64) +#define MAX_PACKET_SIZE_EP1 (64) +#define MAX_PACKET_SIZE_EP2 (64) +#define MAX_PACKET_SIZE_EP3 (1023) + +/* Generic endpoints - intended to be portable accross devices */ +/* and be suitable for simple USB devices. */ + +/* Bulk endpoints */ +#define EPBULK_OUT (EP2OUT) +#define EPBULK_IN (EP2IN) +#define EPBULK_OUT_callback EP2_OUT_callback +#define EPBULK_IN_callback EP2_IN_callback +/* Interrupt endpoints */ +#define EPINT_OUT (EP1OUT) +#define EPINT_IN (EP1IN) +#define EPINT_OUT_callback EP1_OUT_callback +#define EPINT_IN_callback EP1_IN_callback +/* Isochronous endpoints */ +#define EPISO_OUT (EP3OUT) +#define EPISO_IN (EP3IN) +#define EPISO_OUT_callback EP3_OUT_callback +#define EPISO_IN_callback EP3_IN_callback + +#define MAX_PACKET_SIZE_EPBULK (MAX_PACKET_SIZE_EP2) +#define MAX_PACKET_SIZE_EPINT (MAX_PACKET_SIZE_EP1) +#define MAX_PACKET_SIZE_EPISO (MAX_PACKET_SIZE_EP3) diff --git a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp new file mode 100644 index 00000000000..69471edf702 --- /dev/null +++ b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp @@ -0,0 +1,569 @@ +/* Copyright (c) 2010-2011 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#if defined(TARGET_KL25Z) | defined(TARGET_KL43Z) | defined(TARGET_KL46Z) | defined(TARGET_K20D50M) | defined(TARGET_K64F) | defined(TARGET_K22F) | defined(TARGET_TEENSY3_1) + +#if defined(TARGET_KSDK2_MCUS) +#include "fsl_common.h" +#endif +#include "USBHAL.h" +#include "mbed_critical.h" + +USBHAL * USBHAL::instance; + +static volatile int epComplete = 0; + +// Convert physical endpoint number to register bit +#define EP(endpoint) (1<<(endpoint)) + +// Convert physical to logical +#define PHY_TO_LOG(endpoint) ((endpoint)>>1) + +// Get endpoint direction +#define IN_EP(endpoint) ((endpoint) & 1U ? true : false) +#define OUT_EP(endpoint) ((endpoint) & 1U ? false : true) + +#define BD_OWN_MASK (1<<7) +#define BD_DATA01_MASK (1<<6) +#define BD_KEEP_MASK (1<<5) +#define BD_NINC_MASK (1<<4) +#define BD_DTS_MASK (1<<3) +#define BD_STALL_MASK (1<<2) + +#define TX 1 +#define RX 0 +#define ODD 0 +#define EVEN 1 +// this macro waits a physical endpoint number +#define EP_BDT_IDX(ep, dir, odd) (((ep * 4) + (2 * dir) + (1 * odd))) + +#define SETUP_TOKEN 0x0D +#define IN_TOKEN 0x09 +#define OUT_TOKEN 0x01 +#define TOK_PID(idx) ((bdt[idx].info >> 2) & 0x0F) + +// for each endpt: 8 bytes +typedef struct BDT { + uint8_t info; // BD[0:7] + uint8_t dummy; // RSVD: BD[8:15] + uint16_t byte_count; // BD[16:32] + uint32_t address; // Addr +} BDT; + +typedef enum { + CTRL_XFER_READY, + CTRL_XFER_IN, + CTRL_XFER_NONE, + CTRL_XFER_OUT +} ctrl_xfer_t; + +// there are: +// * 4 bidirectionnal endpt -> 8 physical endpt +// * as there are ODD and EVEN buffer -> 8*2 bdt +MBED_ALIGN(512) BDT bdt[NUMBER_OF_PHYSICAL_ENDPOINTS * 2]; // 512 bytes aligned! + +uint8_t * endpoint_buffer[NUMBER_OF_PHYSICAL_ENDPOINTS * 2]; + +static uint8_t set_addr = 0; +static uint8_t addr = 0; +static ctrl_xfer_t ctrl_xfer = CTRL_XFER_READY; + +static uint32_t Data1 = 0x55555555; + +static uint32_t frameNumber() { + return((USB0->FRMNUML | (USB0->FRMNUMH << 8)) & 0x07FF); +} + +uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer) { + return 0; +} + +USBHAL::USBHAL(void) { + // Disable IRQ + NVIC_DisableIRQ(USB0_IRQn); + +#if (defined(FSL_FEATURE_SOC_MPU_COUNT) && (FSL_FEATURE_SOC_MPU_COUNT > 0U)) + MPU->CESR=0; +#endif + // fill in callback array + epCallback[0] = &USBHAL::EP1_OUT_callback; + epCallback[1] = &USBHAL::EP1_IN_callback; + epCallback[2] = &USBHAL::EP2_OUT_callback; + epCallback[3] = &USBHAL::EP2_IN_callback; + epCallback[4] = &USBHAL::EP3_OUT_callback; + epCallback[5] = &USBHAL::EP3_IN_callback; + epCallback[6] = &USBHAL::EP4_OUT_callback; + epCallback[7] = &USBHAL::EP4_IN_callback; + +#if defined(TARGET_KL43Z) || defined(TARGET_K22F) || defined(TARGET_K64F) + // enable USBFS clock + CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcIrc48M, 48000000U); +#else + // choose usb src as PLL + SIM->SOPT2 &= ~SIM_SOPT2_PLLFLLSEL_MASK; + SIM->SOPT2 |= (SIM_SOPT2_USBSRC_MASK | (1 << SIM_SOPT2_PLLFLLSEL_SHIFT)); + + // enable OTG clock + SIM->SCGC4 |= SIM_SCGC4_USBOTG_MASK; +#endif + + // Attach IRQ + instance = this; + NVIC_SetVector(USB0_IRQn, (uint32_t)&_usbisr); + NVIC_EnableIRQ(USB0_IRQn); + + // USB Module Configuration + // Set BDT Base Register + USB0->BDTPAGE1 = (uint8_t)((uint32_t)bdt>>8); + USB0->BDTPAGE2 = (uint8_t)((uint32_t)bdt>>16); + USB0->BDTPAGE3 = (uint8_t)((uint32_t)bdt>>24); + + // Clear interrupt flag + USB0->ISTAT = 0xff; + + // USB Interrupt Enablers + USB0->INTEN |= USB_INTEN_TOKDNEEN_MASK | + USB_INTEN_SOFTOKEN_MASK | + USB_INTEN_ERROREN_MASK | + USB_INTEN_USBRSTEN_MASK; + + // Disable weak pull downs + USB0->USBCTRL &= ~(USB_USBCTRL_PDE_MASK | USB_USBCTRL_SUSP_MASK); + + USB0->USBTRC0 |= 0x40; + + /* Allocate control endpoint buffers */ + endpoint_buffer[EP_BDT_IDX(0, TX, ODD)] = (uint8_t *)malloc(MAX_PACKET_SIZE_EP0); + endpoint_buffer[EP_BDT_IDX(0, RX, ODD)] = (uint8_t *)malloc(MAX_PACKET_SIZE_EP0); +} + +USBHAL::~USBHAL(void) { } + +void USBHAL::connect(void) { + // enable USB + USB0->CTL |= USB_CTL_USBENSOFEN_MASK; + // Pull up enable + USB0->CONTROL |= USB_CONTROL_DPPULLUPNONOTG_MASK; + + // Allocate endpoint buffers; do allocate control endpoint buffers + for (int i = 4; i < (NUMBER_OF_PHYSICAL_ENDPOINTS * 2); i++) { + if ((i == EPISO_OUT) || (i == EPISO_IN)) { + endpoint_buffer[i] = (uint8_t *)malloc(MAX_PACKET_SIZE_EPISO); + } else { + endpoint_buffer[i] = (uint8_t *)malloc(MAX_PACKET_SIZE_EPBULK); + } + } +} + +void USBHAL::disconnect(void) { + // disable USB + USB0->CTL &= ~USB_CTL_USBENSOFEN_MASK; + // Pull up disable + USB0->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK; + + //Free buffers if required; do not free the control endpoint buffers + for (int i = 4; i < (NUMBER_OF_PHYSICAL_ENDPOINTS * 2); i++) { + free(endpoint_buffer[i]); + endpoint_buffer[i] = NULL; + } +} + +void USBHAL::configureDevice(void) { + // not needed +} + +void USBHAL::unconfigureDevice(void) { + // not needed +} + +void USBHAL::setAddress(uint8_t address) { + // we don't set the address now otherwise the usb controller does not ack + // we set a flag instead + // see usbisr when an IN token is received + set_addr = 1; + addr = address; +} + +bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t flags) { + uint32_t handshake_flag = 0; + uint8_t * buf; + + if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { + return false; + } + + uint32_t log_endpoint = PHY_TO_LOG(endpoint); + + if ((flags & ISOCHRONOUS) == 0) { + handshake_flag = USB_ENDPT_EPHSHK_MASK; + } + + if (IN_EP(endpoint)) { + buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)][0]; + } else { + buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)][0]; + } + + // IN endpt -> device to host (TX) + if (IN_EP(endpoint)) { + USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) + USB_ENDPT_EPTXEN_MASK; // en TX (IN) tran + bdt[EP_BDT_IDX(log_endpoint, TX, ODD )].address = (uint32_t) buf; + bdt[EP_BDT_IDX(log_endpoint, TX, EVEN)].address = 0; + } + // OUT endpt -> host to device (RX) + else { + USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) + USB_ENDPT_EPRXEN_MASK; // en RX (OUT) tran. + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].byte_count = maxPacket; + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].address = (uint32_t) buf; + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info = BD_DTS_MASK; + bdt[EP_BDT_IDX(log_endpoint, RX, EVEN)].info = 0; + if (log_endpoint == 0) { + // Prepare for setup packet + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info |= BD_OWN_MASK; + } + } + + // First transfer will be a DATA0 packet + Data1 &= ~(1 << endpoint); + + return true; +} + +// read setup packet +void USBHAL::EP0setup(uint8_t *buffer) { + uint32_t sz; + endpointReadResult(EP0OUT, buffer, &sz); +} + +void USBHAL::EP0readStage(void) { + // Not needed +} + +void USBHAL::EP0read(void) { + if (ctrl_xfer == CTRL_XFER_READY) { + // Transfer is done so ignore call + return; + } + if (ctrl_xfer == CTRL_XFER_IN) { + ctrl_xfer = CTRL_XFER_READY; + // Control transfer with a data IN stage. + // The next packet received will be the status packet - an OUT packet using DATA1 + // + // PROBLEM: + // If a Setup packet is received after status packet of + // a Control In transfer has been received in the RX buffer + // but before the processor has had a chance the prepare + // this buffer for the Setup packet, the Setup packet + // will be dropped. + // + // WORKAROUND: + // Set data toggle to DATA0 so if the status stage of a + // Control In transfer arrives it will be ACKed by hardware + // but will be discarded without filling the RX buffer. + // This allows a subsequent SETUP packet to be stored + // without any processor intervention. + Data1 &= ~1UL; // set DATA0 + } + endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0); +} + +uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) { + uint32_t sz; + endpointReadResult(EP0OUT, buffer, &sz); + return sz; +} + +void USBHAL::EP0write(uint8_t *buffer, uint32_t size) { + if (ctrl_xfer == CTRL_XFER_READY) { + // Transfer is done so ignore call + return; + } + if ((ctrl_xfer == CTRL_XFER_NONE) || (ctrl_xfer == CTRL_XFER_OUT)) { + // Prepare for next setup packet + endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0); + ctrl_xfer = CTRL_XFER_READY; + } + endpointWrite(EP0IN, buffer, size); +} + +void USBHAL::EP0getWriteResult(void) { +} + +void USBHAL::EP0stall(void) { + if (ctrl_xfer == CTRL_XFER_READY) { + // Transfer is done so ignore call + return; + } + ctrl_xfer = CTRL_XFER_READY; + core_util_critical_section_enter(); + stallEndpoint(EP0OUT); + // Prepare for next setup packet + // Note - time between stalling and setting up the endpoint + // must be kept to a minimum to prevent a dropped SETUP + // packet. + endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0); + core_util_critical_section_exit(); +} + +EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) { + uint8_t log_endpoint = PHY_TO_LOG(endpoint); + + uint32_t idx = EP_BDT_IDX(log_endpoint, RX, 0); + bdt[idx].byte_count = maximumSize; + if ((Data1 >> endpoint) & 1) { + bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK | BD_DATA01_MASK; + } + else { + bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK; + } + + Data1 ^= (1 << endpoint); + return EP_PENDING; +} + +EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) { + uint32_t n, sz, idx, setup = 0; + uint8_t not_iso; + uint8_t * ep_buf; + + uint32_t log_endpoint = PHY_TO_LOG(endpoint); + + if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { + return EP_INVALID; + } + + // if read on a IN endpoint -> error + if (IN_EP(endpoint)) { + return EP_INVALID; + } + + idx = EP_BDT_IDX(log_endpoint, RX, 0); + sz = bdt[idx].byte_count; + not_iso = USB0->ENDPOINT[log_endpoint].ENDPT & USB_ENDPT_EPHSHK_MASK; + + //for isochronous endpoint, we don't wait an interrupt + if ((log_endpoint != 0) && not_iso && !(epComplete & EP(endpoint))) { + return EP_PENDING; + } + + if ((log_endpoint == 0) && (TOK_PID(idx) == SETUP_TOKEN)) { + setup = 1; + } + + ep_buf = endpoint_buffer[idx]; + + for (n = 0; n < sz; n++) { + buffer[n] = ep_buf[n]; + } + + if (setup) { + // Record the setup type + if (buffer[6] == 0) { + ctrl_xfer = CTRL_XFER_NONE; + } else { + uint8_t in_xfer = (buffer[0] >> 7) & 1; + ctrl_xfer = in_xfer ? CTRL_XFER_IN : CTRL_XFER_OUT; + } + } + + USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; + *bytesRead = sz; + + epComplete &= ~EP(endpoint); + return EP_COMPLETED; +} + +EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) { + uint32_t idx, n; + uint8_t * ep_buf; + + if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { + return EP_INVALID; + } + + // if write on a OUT endpoint -> error + if (OUT_EP(endpoint)) { + return EP_INVALID; + } + + idx = EP_BDT_IDX(PHY_TO_LOG(endpoint), TX, 0); + bdt[idx].byte_count = size; + + ep_buf = endpoint_buffer[idx]; + + for (n = 0; n < size; n++) { + ep_buf[n] = data[n]; + } + + if ((Data1 >> endpoint) & 1) { + bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK | BD_DATA01_MASK; + } else { + bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK; + } + + Data1 ^= (1 << endpoint); + + return EP_PENDING; +} + +EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) { + if (epComplete & EP(endpoint)) { + epComplete &= ~EP(endpoint); + return EP_COMPLETED; + } + + return EP_PENDING; +} + +void USBHAL::stallEndpoint(uint8_t endpoint) { + USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK; +} + +void USBHAL::unstallEndpoint(uint8_t endpoint) { + USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; +} + +bool USBHAL::getEndpointStallState(uint8_t endpoint) { + uint8_t stall = (USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT & USB_ENDPT_EPSTALL_MASK); + return (stall) ? true : false; +} + +void USBHAL::remoteWakeup(void) { + // [TODO] +} + + +void USBHAL::_usbisr(void) { + instance->usbisr(); +} + + +void USBHAL::usbisr(void) { + uint8_t i; + uint8_t istat = USB0->ISTAT; + + // reset interrupt + if (istat & USB_ISTAT_USBRST_MASK) { + // disable all endpt + for(i = 0; i < 16; i++) { + USB0->ENDPOINT[i].ENDPT = 0x00; + } + + // enable control endpoint + realiseEndpoint(EP0OUT, MAX_PACKET_SIZE_EP0, 0); + realiseEndpoint(EP0IN, MAX_PACKET_SIZE_EP0, 0); + + Data1 = 0x55555555; + USB0->CTL |= USB_CTL_ODDRST_MASK; + + USB0->ISTAT = 0xFF; // clear all interrupt status flags + USB0->ERRSTAT = 0xFF; // clear all error flags + USB0->ERREN = 0xFF; // enable error interrupt sources + USB0->ADDR = 0x00; // set default address + + // reset bus for USBDevice layer + busReset(); + + return; + } + + // resume interrupt + if (istat & USB_ISTAT_RESUME_MASK) { + USB0->ISTAT = USB_ISTAT_RESUME_MASK; + } + + // SOF interrupt + if (istat & USB_ISTAT_SOFTOK_MASK) { + USB0->ISTAT = USB_ISTAT_SOFTOK_MASK; + // SOF event, read frame number + SOF(frameNumber()); + } + + // stall interrupt + if (istat & 1<<7) { + if (USB0->ENDPOINT[0].ENDPT & USB_ENDPT_EPSTALL_MASK) + USB0->ENDPOINT[0].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; + USB0->ISTAT = USB_ISTAT_STALL_MASK; + } + + // token interrupt + if (istat & 1<<3) { + uint32_t num = (USB0->STAT >> 4) & 0x0F; + uint32_t dir = (USB0->STAT >> 3) & 0x01; + uint32_t ev_odd = (USB0->STAT >> 2) & 0x01; + int endpoint = (num << 1) | dir; + + // setup packet + if ((num == 0) && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == SETUP_TOKEN)) { + Data1 |= 0x02 | 0x01; // set DATA1 for TX and RX + bdt[EP_BDT_IDX(0, TX, EVEN)].info &= ~BD_OWN_MASK; + bdt[EP_BDT_IDX(0, TX, ODD)].info &= ~BD_OWN_MASK; + + // EP0 SETUP event (SETUP data received) + EP0setupCallback(); + + } else { + // OUT packet + if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == OUT_TOKEN) { + if (num == 0) + EP0out(); + else { + epComplete |= EP(endpoint); + if ((instance->*(epCallback[endpoint - 2]))()) { + epComplete &= ~EP(endpoint); + } + } + } + + // IN packet + if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == IN_TOKEN) { + if (num == 0) { + EP0in(); + if (set_addr == 1) { + USB0->ADDR = addr & 0x7F; + set_addr = 0; + } + } + else { + epComplete |= EP(endpoint); + if ((instance->*(epCallback[endpoint - 2]))()) { + epComplete &= ~EP(endpoint); + } + } + } + } + + USB0->ISTAT = USB_ISTAT_TOKDNE_MASK; + } + + // sleep interrupt + if (istat & 1<<4) { + USB0->ISTAT = USB_ISTAT_SLEEP_MASK; + } + + // error interrupt + if (istat & USB_ISTAT_ERROR_MASK) { + USB0->ERRSTAT = 0xFF; + USB0->ISTAT = USB_ISTAT_ERROR_MASK; + } +} + + +#endif From c2177e9e7bf985a39aac40ac343d23fb87805d30 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 13 Feb 2018 18:42:37 -0600 Subject: [PATCH 134/488] Update Kinetis USB to match the USBPhy API Copy the Kinetis USB driver files from mbed-os\features\unsupported\USBDevice\targets\TARGET_Freescale and update them to match the new USBPhy API. --- .../usb/USBEndpoints_Kinetis.h | 48 +- targets/TARGET_Freescale/usb/USBPhyHw.h | 66 +++ .../TARGET_Freescale/usb/USBPhy_Kinetis.cpp | 470 ++++++++++-------- targets/targets.json | 3 +- 4 files changed, 361 insertions(+), 226 deletions(-) create mode 100644 targets/TARGET_Freescale/usb/USBPhyHw.h diff --git a/targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h b/targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h index 59ec8dccad1..8f2286a7f7e 100644 --- a/targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h +++ b/targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h @@ -1,20 +1,18 @@ -/* Copyright (c) 2010-2011 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #define NUMBER_OF_LOGICAL_ENDPOINTS (4) #define NUMBER_OF_PHYSICAL_ENDPOINTS (NUMBER_OF_LOGICAL_ENDPOINTS * 2) @@ -23,14 +21,14 @@ /* Endpoint No. */ /* ---------------- */ -#define EP0OUT (0) -#define EP0IN (1) -#define EP1OUT (2) -#define EP1IN (3) -#define EP2OUT (4) -#define EP2IN (5) -#define EP3OUT (6) -#define EP3IN (7) +#define EP0OUT (0x00) +#define EP0IN (0x80) +#define EP1OUT (0x01) +#define EP1IN (0x81) +#define EP2OUT (0x02) +#define EP2IN (0x82) +#define EP3OUT (0x03) +#define EP3IN (0x83) /* Maximum Packet sizes */ diff --git a/targets/TARGET_Freescale/usb/USBPhyHw.h b/targets/TARGET_Freescale/usb/USBPhyHw.h new file mode 100644 index 00000000000..f11c7512705 --- /dev/null +++ b/targets/TARGET_Freescale/usb/USBPhyHw.h @@ -0,0 +1,66 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBPHYHW_H +#define USBPHYHW_H + +#include "mbed.h" +#include "USBPhy.h" + + +class USBPhyHw : public USBPhy { +public: + USBPhyHw(); + virtual ~USBPhyHw(); + virtual void init(USBPhyEvents *events); + virtual void deinit(); + virtual bool powered(); + virtual void connect(); + virtual void disconnect(); + virtual void configure(); + virtual void unconfigure(); + virtual void sof_enable(); + virtual void sof_disable(); + virtual void set_address(uint8_t address); + virtual void remote_wakeup(); + virtual const usb_ep_table_t* endpoint_table(); + + virtual uint32_t ep0_set_max_packet(uint32_t max_packet); + virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_read(); + virtual uint32_t ep0_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_write(uint8_t *buffer, uint32_t size); + virtual void ep0_stall(); + + virtual bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type); + virtual void endpoint_remove(usb_ep_t endpoint); + virtual void endpoint_stall(usb_ep_t endpoint); + virtual void endpoint_unstall(usb_ep_t endpoint); + + virtual bool endpoint_read(usb_ep_t endpoint, uint32_t maximumSize); + virtual bool endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytesRead); + virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual void endpoint_abort(usb_ep_t endpoint); + + virtual void process(); + +private: + USBPhyEvents *events; + + static void _usbisr(void); +}; + +#endif diff --git a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp index 69471edf702..3ca12d37fc8 100644 --- a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp +++ b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp @@ -1,42 +1,48 @@ -/* Copyright (c) 2010-2011 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ - -#if defined(TARGET_KL25Z) | defined(TARGET_KL43Z) | defined(TARGET_KL46Z) | defined(TARGET_K20D50M) | defined(TARGET_K64F) | defined(TARGET_K22F) | defined(TARGET_TEENSY3_1) +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined(DEVICE_USBDEVICE) && DEVICE_USBDEVICE && \ + (defined(TARGET_KL25Z) | defined(TARGET_KL43Z) | \ + defined(TARGET_KL46Z) | defined(TARGET_K20D50M) | \ + defined(TARGET_K64F) | defined(TARGET_K22F) | \ + defined(TARGET_TEENSY3_1)) #if defined(TARGET_KSDK2_MCUS) #include "fsl_common.h" #endif -#include "USBHAL.h" +#include "USBPhyHw.h" +#include "USBEndpoints_Kinetis.h" #include "mbed_critical.h" -USBHAL * USBHAL::instance; +static USBPhyHw *instance; static volatile int epComplete = 0; // Convert physical endpoint number to register bit #define EP(endpoint) (1<<(endpoint)) -// Convert physical to logical +// Conversion macros #define PHY_TO_LOG(endpoint) ((endpoint)>>1) +#define DESC_TO_LOG(endpoint) ((endpoint) & 0xF) +#define DESC_TO_PHY(endpoint) ((((endpoint)&0x0F)<<1) | (((endpoint) & 0x80) ? 1:0)) +#define PHY_TO_DESC(endpoint) (((endpoint)>>1)|(((endpoint)&1)?0x80:0)) // Get endpoint direction -#define IN_EP(endpoint) ((endpoint) & 1U ? true : false) -#define OUT_EP(endpoint) ((endpoint) & 1U ? false : true) +#define DESC_EP_IN(endpoint) ((endpoint) & 0x80U ? true : false) +#define DESC_EP_OUT(endpoint) ((endpoint) & 0x80U ? false : true) #define BD_OWN_MASK (1<<7) #define BD_DATA01_MASK (1<<6) @@ -78,6 +84,10 @@ typedef enum { MBED_ALIGN(512) BDT bdt[NUMBER_OF_PHYSICAL_ENDPOINTS * 2]; // 512 bytes aligned! uint8_t * endpoint_buffer[NUMBER_OF_PHYSICAL_ENDPOINTS * 2]; +uint8_t ep0_buffer[2][MAX_PACKET_SIZE_EP0]; +uint8_t ep1_buffer[2][MAX_PACKET_SIZE_EP1]; +uint8_t ep2_buffer[2][MAX_PACKET_SIZE_EP2]; +uint8_t ep3_buffer[2][MAX_PACKET_SIZE_EP3]; static uint8_t set_addr = 0; static uint8_t addr = 0; @@ -89,26 +99,31 @@ static uint32_t frameNumber() { return((USB0->FRMNUML | (USB0->FRMNUMH << 8)) & 0x07FF); } -uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer) { - return 0; +USBPhy *get_usb_phy() +{ + static USBPhyHw usbphy; + return &usbphy; } -USBHAL::USBHAL(void) { +USBPhyHw::USBPhyHw() +{ + +} + +USBPhyHw::~USBPhyHw() +{ +} + +void USBPhyHw::init(USBPhyEvents *events) +{ + this->events = events; + // Disable IRQ NVIC_DisableIRQ(USB0_IRQn); #if (defined(FSL_FEATURE_SOC_MPU_COUNT) && (FSL_FEATURE_SOC_MPU_COUNT > 0U)) MPU->CESR=0; #endif - // fill in callback array - epCallback[0] = &USBHAL::EP1_OUT_callback; - epCallback[1] = &USBHAL::EP1_IN_callback; - epCallback[2] = &USBHAL::EP2_OUT_callback; - epCallback[3] = &USBHAL::EP2_IN_callback; - epCallback[4] = &USBHAL::EP3_OUT_callback; - epCallback[5] = &USBHAL::EP3_IN_callback; - epCallback[6] = &USBHAL::EP4_OUT_callback; - epCallback[7] = &USBHAL::EP4_IN_callback; #if defined(TARGET_KL43Z) || defined(TARGET_K22F) || defined(TARGET_K64F) // enable USBFS clock @@ -124,8 +139,6 @@ USBHAL::USBHAL(void) { // Attach IRQ instance = this; - NVIC_SetVector(USB0_IRQn, (uint32_t)&_usbisr); - NVIC_EnableIRQ(USB0_IRQn); // USB Module Configuration // Set BDT Base Register @@ -138,7 +151,6 @@ USBHAL::USBHAL(void) { // USB Interrupt Enablers USB0->INTEN |= USB_INTEN_TOKDNEEN_MASK | - USB_INTEN_SOFTOKEN_MASK | USB_INTEN_ERROREN_MASK | USB_INTEN_USBRSTEN_MASK; @@ -148,50 +160,69 @@ USBHAL::USBHAL(void) { USB0->USBTRC0 |= 0x40; /* Allocate control endpoint buffers */ - endpoint_buffer[EP_BDT_IDX(0, TX, ODD)] = (uint8_t *)malloc(MAX_PACKET_SIZE_EP0); - endpoint_buffer[EP_BDT_IDX(0, RX, ODD)] = (uint8_t *)malloc(MAX_PACKET_SIZE_EP0); + endpoint_buffer[EP_BDT_IDX(0, TX, ODD)] = ep0_buffer[TX]; + endpoint_buffer[EP_BDT_IDX(0, RX, ODD)] = ep0_buffer[RX]; + endpoint_buffer[EP_BDT_IDX(1, TX, ODD)] = ep1_buffer[TX]; + endpoint_buffer[EP_BDT_IDX(1, RX, ODD)] = ep1_buffer[RX]; + endpoint_buffer[EP_BDT_IDX(2, TX, ODD)] = ep2_buffer[TX]; + endpoint_buffer[EP_BDT_IDX(2, RX, ODD)] = ep2_buffer[RX]; + endpoint_buffer[EP_BDT_IDX(3, TX, ODD)] = ep3_buffer[TX]; + endpoint_buffer[EP_BDT_IDX(3, RX, ODD)] = ep3_buffer[RX]; + + NVIC_SetVector(USB0_IRQn, (uint32_t)&_usbisr); + NVIC_EnableIRQ(USB0_IRQn); } -USBHAL::~USBHAL(void) { } +void USBPhyHw::deinit() +{ + disconnect(); + NVIC_DisableIRQ(USB0_IRQn); + USB0->INTEN = 0; +} -void USBHAL::connect(void) { +bool USBPhyHw::powered() +{ + return true; +} + +void USBPhyHw::connect() +{ // enable USB USB0->CTL |= USB_CTL_USBENSOFEN_MASK; // Pull up enable USB0->CONTROL |= USB_CONTROL_DPPULLUPNONOTG_MASK; - - // Allocate endpoint buffers; do allocate control endpoint buffers - for (int i = 4; i < (NUMBER_OF_PHYSICAL_ENDPOINTS * 2); i++) { - if ((i == EPISO_OUT) || (i == EPISO_IN)) { - endpoint_buffer[i] = (uint8_t *)malloc(MAX_PACKET_SIZE_EPISO); - } else { - endpoint_buffer[i] = (uint8_t *)malloc(MAX_PACKET_SIZE_EPBULK); - } - } } -void USBHAL::disconnect(void) { +void USBPhyHw::disconnect() +{ // disable USB USB0->CTL &= ~USB_CTL_USBENSOFEN_MASK; // Pull up disable USB0->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK; - - //Free buffers if required; do not free the control endpoint buffers - for (int i = 4; i < (NUMBER_OF_PHYSICAL_ENDPOINTS * 2); i++) { - free(endpoint_buffer[i]); - endpoint_buffer[i] = NULL; - } } -void USBHAL::configureDevice(void) { +void USBPhyHw::configure() +{ // not needed } -void USBHAL::unconfigureDevice(void) { +void USBPhyHw::unconfigure() +{ // not needed } -void USBHAL::setAddress(uint8_t address) { +void USBPhyHw::sof_enable() +{ + USB0->INTEN |= USB_INTEN_SOFTOKEN_MASK; +} + +void USBPhyHw::sof_disable() +{ + USB0->INTEN &= ~USB_INTEN_SOFTOKEN_MASK; +} + +void USBPhyHw::set_address(uint8_t address) +{ // we don't set the address now otherwise the usb controller does not ack // we set a flag instead // see usbisr when an IN token is received @@ -199,64 +230,54 @@ void USBHAL::setAddress(uint8_t address) { addr = address; } -bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t flags) { - uint32_t handshake_flag = 0; - uint8_t * buf; - - if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { - return false; - } - - uint32_t log_endpoint = PHY_TO_LOG(endpoint); - - if ((flags & ISOCHRONOUS) == 0) { - handshake_flag = USB_ENDPT_EPHSHK_MASK; - } - - if (IN_EP(endpoint)) { - buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)][0]; - } else { - buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)][0]; - } +void USBPhyHw::remote_wakeup() +{ + // TODO +} - // IN endpt -> device to host (TX) - if (IN_EP(endpoint)) { - USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) - USB_ENDPT_EPTXEN_MASK; // en TX (IN) tran - bdt[EP_BDT_IDX(log_endpoint, TX, ODD )].address = (uint32_t) buf; - bdt[EP_BDT_IDX(log_endpoint, TX, EVEN)].address = 0; - } - // OUT endpt -> host to device (RX) - else { - USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) - USB_ENDPT_EPRXEN_MASK; // en RX (OUT) tran. - bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].byte_count = maxPacket; - bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].address = (uint32_t) buf; - bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info = BD_DTS_MASK; - bdt[EP_BDT_IDX(log_endpoint, RX, EVEN)].info = 0; - if (log_endpoint == 0) { - // Prepare for setup packet - bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info |= BD_OWN_MASK; +#define ALLOW_BULK_OR_INT_ENDPOINTS (USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_ALLOW_INT) +#define ALLOW_NO_ENDPOINTS 0 + +const usb_ep_table_t* USBPhyHw::endpoint_table() +{ + static const usb_ep_table_t endpoint_table = { + 1, // No cost per endpoint - everything allocated up front + { + {USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_BULK_OR_INT_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_BULK_OR_INT_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0} } - } - - // First transfer will be a DATA0 packet - Data1 &= ~(1 << endpoint); + }; + return &endpoint_table; +} - return true; +uint32_t USBPhyHw::ep0_set_max_packet(uint32_t max_packet) +{ + return MAX_PACKET_SIZE_EP0; } // read setup packet -void USBHAL::EP0setup(uint8_t *buffer) { +void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) +{ uint32_t sz; - endpointReadResult(EP0OUT, buffer, &sz); + endpoint_read_result(EP0OUT, buffer, size, &sz); } -void USBHAL::EP0readStage(void) { - // Not needed -} - -void USBHAL::EP0read(void) { +void USBPhyHw::ep0_read() +{ if (ctrl_xfer == CTRL_XFER_READY) { // Transfer is done so ignore call return; @@ -281,77 +302,142 @@ void USBHAL::EP0read(void) { // without any processor intervention. Data1 &= ~1UL; // set DATA0 } - endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0); + endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0); } -uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) { +uint32_t USBPhyHw::ep0_read_result(uint8_t *buffer, uint32_t size) +{ uint32_t sz; - endpointReadResult(EP0OUT, buffer, &sz); + endpoint_read_result(EP0OUT, buffer, size, &sz); return sz; } -void USBHAL::EP0write(uint8_t *buffer, uint32_t size) { +void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) +{ if (ctrl_xfer == CTRL_XFER_READY) { // Transfer is done so ignore call return; } if ((ctrl_xfer == CTRL_XFER_NONE) || (ctrl_xfer == CTRL_XFER_OUT)) { // Prepare for next setup packet - endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0); + endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0); ctrl_xfer = CTRL_XFER_READY; } - endpointWrite(EP0IN, buffer, size); -} - -void USBHAL::EP0getWriteResult(void) { + endpoint_write(EP0IN, buffer, size); } -void USBHAL::EP0stall(void) { +void USBPhyHw::ep0_stall() +{ if (ctrl_xfer == CTRL_XFER_READY) { // Transfer is done so ignore call return; } ctrl_xfer = CTRL_XFER_READY; core_util_critical_section_enter(); - stallEndpoint(EP0OUT); + endpoint_stall(EP0OUT); // Prepare for next setup packet // Note - time between stalling and setting up the endpoint // must be kept to a minimum to prevent a dropped SETUP // packet. - endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0); + endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0); core_util_critical_section_exit(); } -EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) { - uint8_t log_endpoint = PHY_TO_LOG(endpoint); +bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type) +{ + uint32_t handshake_flag = 0; + uint8_t * buf; + + if (DESC_TO_PHY(endpoint) > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { + return false; + } + + uint32_t log_endpoint = DESC_TO_LOG(endpoint); + + if (type != USB_EP_TYPE_ISO) { + handshake_flag = USB_ENDPT_EPHSHK_MASK; + } + + if (DESC_EP_IN(endpoint)) { + buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)][0]; + } else { + buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)][0]; + } + + // IN endpt -> device to host (TX) + if (DESC_EP_IN(endpoint)) { + USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) + USB_ENDPT_EPTXEN_MASK; // en TX (IN) tran + bdt[EP_BDT_IDX(log_endpoint, TX, ODD )].address = (uint32_t) buf; + bdt[EP_BDT_IDX(log_endpoint, TX, EVEN)].address = 0; + } + // OUT endpt -> host to device (RX) + else { + USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) + USB_ENDPT_EPRXEN_MASK; // en RX (OUT) tran. + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].byte_count = max_packet; + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].address = (uint32_t) buf; + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info = BD_DTS_MASK; + bdt[EP_BDT_IDX(log_endpoint, RX, EVEN)].info = 0; + if (log_endpoint == 0) { + // Prepare for setup packet + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info |= BD_OWN_MASK; + } + } + + // First transfer will be a DATA0 packet + Data1 &= ~(1 << DESC_TO_PHY(endpoint)); + + return true; +} + +void USBPhyHw::endpoint_remove(usb_ep_t endpoint) +{ + USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT = 0; +} + +void USBPhyHw::endpoint_stall(usb_ep_t endpoint) +{ + USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK; +} + +void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) +{ + USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; +} + +bool USBPhyHw:: endpoint_read(usb_ep_t endpoint, uint32_t max_packet) +{ + uint8_t log_endpoint = DESC_TO_LOG(endpoint); uint32_t idx = EP_BDT_IDX(log_endpoint, RX, 0); - bdt[idx].byte_count = maximumSize; - if ((Data1 >> endpoint) & 1) { + bdt[idx].byte_count = max_packet; + if ((Data1 >> DESC_TO_PHY(endpoint)) & 1) { bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK | BD_DATA01_MASK; } else { bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK; } - Data1 ^= (1 << endpoint); - return EP_PENDING; + Data1 ^= (1 << DESC_TO_PHY(endpoint)); + return true; } -EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) { +bool USBPhyHw::endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytes_read) +{ uint32_t n, sz, idx, setup = 0; uint8_t not_iso; uint8_t * ep_buf; - uint32_t log_endpoint = PHY_TO_LOG(endpoint); + uint32_t log_endpoint = DESC_TO_LOG(endpoint); - if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { - return EP_INVALID; + if (DESC_TO_PHY(endpoint) > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { + return false; } // if read on a IN endpoint -> error - if (IN_EP(endpoint)) { - return EP_INVALID; + if (DESC_EP_IN(endpoint)) { + return false; } idx = EP_BDT_IDX(log_endpoint, RX, 0); @@ -359,8 +445,8 @@ EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_ not_iso = USB0->ENDPOINT[log_endpoint].ENDPT & USB_ENDPT_EPHSHK_MASK; //for isochronous endpoint, we don't wait an interrupt - if ((log_endpoint != 0) && not_iso && !(epComplete & EP(endpoint))) { - return EP_PENDING; + if ((log_endpoint != 0) && not_iso && !(epComplete & EP(DESC_TO_PHY(endpoint)))) { + return false; } if ((log_endpoint == 0) && (TOK_PID(idx) == SETUP_TOKEN)) { @@ -370,40 +456,41 @@ EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_ ep_buf = endpoint_buffer[idx]; for (n = 0; n < sz; n++) { - buffer[n] = ep_buf[n]; + data[n] = ep_buf[n]; } if (setup) { // Record the setup type - if (buffer[6] == 0) { + if (data[6] == 0) { ctrl_xfer = CTRL_XFER_NONE; } else { - uint8_t in_xfer = (buffer[0] >> 7) & 1; + uint8_t in_xfer = (data[0] >> 7) & 1; ctrl_xfer = in_xfer ? CTRL_XFER_IN : CTRL_XFER_OUT; } } USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; - *bytesRead = sz; + *bytes_read = sz; - epComplete &= ~EP(endpoint); - return EP_COMPLETED; + epComplete &= ~EP(DESC_TO_PHY(endpoint)); + return true; } -EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) { +bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ uint32_t idx, n; uint8_t * ep_buf; - if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { - return EP_INVALID; + if (DESC_TO_PHY(endpoint) > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { + return false; } // if write on a OUT endpoint -> error - if (OUT_EP(endpoint)) { - return EP_INVALID; + if (DESC_EP_OUT(endpoint)) { + return false; } - idx = EP_BDT_IDX(PHY_TO_LOG(endpoint), TX, 0); + idx = EP_BDT_IDX(DESC_TO_LOG(endpoint), TX, 0); bdt[idx].byte_count = size; ep_buf = endpoint_buffer[idx]; @@ -412,52 +499,28 @@ EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) ep_buf[n] = data[n]; } - if ((Data1 >> endpoint) & 1) { + if ((Data1 >> DESC_TO_PHY(endpoint)) & 1) { bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK | BD_DATA01_MASK; } else { bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK; } - Data1 ^= (1 << endpoint); - - return EP_PENDING; -} - -EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) { - if (epComplete & EP(endpoint)) { - epComplete &= ~EP(endpoint); - return EP_COMPLETED; - } - - return EP_PENDING; -} + Data1 ^= (1 << DESC_TO_PHY(endpoint)); -void USBHAL::stallEndpoint(uint8_t endpoint) { - USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK; -} - -void USBHAL::unstallEndpoint(uint8_t endpoint) { - USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; -} - -bool USBHAL::getEndpointStallState(uint8_t endpoint) { - uint8_t stall = (USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT & USB_ENDPT_EPSTALL_MASK); - return (stall) ? true : false; + return true; } -void USBHAL::remoteWakeup(void) { - // [TODO] +void USBPhyHw::endpoint_abort(usb_ep_t endpoint) +{ + uint8_t dir = DESC_EP_IN(endpoint) ? TX : RX; + uint32_t idx = EP_BDT_IDX(DESC_TO_LOG(endpoint), dir, 0); + bdt[idx].info &= ~BD_OWN_MASK; } - -void USBHAL::_usbisr(void) { - instance->usbisr(); -} - - -void USBHAL::usbisr(void) { +void USBPhyHw::process() +{ uint8_t i; - uint8_t istat = USB0->ISTAT; + uint8_t istat = USB0->ISTAT & USB0->INTEN; // reset interrupt if (istat & USB_ISTAT_USBRST_MASK) { @@ -467,8 +530,8 @@ void USBHAL::usbisr(void) { } // enable control endpoint - realiseEndpoint(EP0OUT, MAX_PACKET_SIZE_EP0, 0); - realiseEndpoint(EP0IN, MAX_PACKET_SIZE_EP0, 0); + endpoint_add(EP0OUT, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); + endpoint_add(EP0IN, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); Data1 = 0x55555555; USB0->CTL |= USB_CTL_ODDRST_MASK; @@ -479,21 +542,24 @@ void USBHAL::usbisr(void) { USB0->ADDR = 0x00; // set default address // reset bus for USBDevice layer - busReset(); + events->reset(); + NVIC_ClearPendingIRQ(USB0_IRQn); + NVIC_EnableIRQ(USB0_IRQn); return; } // resume interrupt if (istat & USB_ISTAT_RESUME_MASK) { USB0->ISTAT = USB_ISTAT_RESUME_MASK; + events->suspend(false); } // SOF interrupt if (istat & USB_ISTAT_SOFTOK_MASK) { USB0->ISTAT = USB_ISTAT_SOFTOK_MASK; // SOF event, read frame number - SOF(frameNumber()); + events->sof(frameNumber()); } // stall interrupt @@ -508,7 +574,7 @@ void USBHAL::usbisr(void) { uint32_t num = (USB0->STAT >> 4) & 0x0F; uint32_t dir = (USB0->STAT >> 3) & 0x01; uint32_t ev_odd = (USB0->STAT >> 2) & 0x01; - int endpoint = (num << 1) | dir; + int phy_ep = (num << 1) | dir; // setup packet if ((num == 0) && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == SETUP_TOKEN)) { @@ -517,35 +583,31 @@ void USBHAL::usbisr(void) { bdt[EP_BDT_IDX(0, TX, ODD)].info &= ~BD_OWN_MASK; // EP0 SETUP event (SETUP data received) - EP0setupCallback(); + events->ep0_setup(); } else { // OUT packet if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == OUT_TOKEN) { if (num == 0) - EP0out(); + events->ep0_out(); else { - epComplete |= EP(endpoint); - if ((instance->*(epCallback[endpoint - 2]))()) { - epComplete &= ~EP(endpoint); - } + epComplete |= EP(phy_ep); + events->out(PHY_TO_DESC(phy_ep)); } } // IN packet if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == IN_TOKEN) { if (num == 0) { - EP0in(); + events->ep0_in(); if (set_addr == 1) { USB0->ADDR = addr & 0x7F; set_addr = 0; } } else { - epComplete |= EP(endpoint); - if ((instance->*(epCallback[endpoint - 2]))()) { - epComplete &= ~EP(endpoint); - } + epComplete |= EP(phy_ep); + events->in(PHY_TO_DESC(phy_ep)); } } } @@ -556,6 +618,7 @@ void USBHAL::usbisr(void) { // sleep interrupt if (istat & 1<<4) { USB0->ISTAT = USB_ISTAT_SLEEP_MASK; + events->suspend(true); } // error interrupt @@ -563,7 +626,14 @@ void USBHAL::usbisr(void) { USB0->ERRSTAT = 0xFF; USB0->ISTAT = USB_ISTAT_ERROR_MASK; } + + NVIC_ClearPendingIRQ(USB0_IRQn); + NVIC_EnableIRQ(USB0_IRQn); } +void USBPhyHw::_usbisr(void) { + NVIC_DisableIRQ(USB0_IRQn); + instance->events->start_process(); +} #endif diff --git a/targets/targets.json b/targets/targets.json index 1f5ddb9750c..d097b917ecd 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -1480,7 +1480,8 @@ "STDIO_MESSAGES", "STORAGE", "TRNG", - "FLASH" + "FLASH", + "USBDEVICE" ], "features": ["STORAGE"], "release_versions": ["2", "5"], From c5ddfdc89e8d9655b1ad3fcd1e6361489ca7587f Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 7 Mar 2018 18:44:15 -0600 Subject: [PATCH 135/488] Add and assert USB callback completion Assert that when a callback is completed it is the active callback. --- usb/device/USBDevice/USBDevice.cpp | 39 +++++++++++++++++------------- usb/device/USBDevice/USBDevice.h | 10 +++++++- 2 files changed, 31 insertions(+), 18 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 828ec145717..9206388d99f 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -215,10 +215,10 @@ bool USBDevice::_control_out() /* Check if transfer has completed */ if (_transfer.remaining == 0) { /* Transfer completed */ + _transfer.user_callback = RequestXferDone; if (_transfer.notify) { /* Notify class layer. */ _transfer.notify = false; - _transfer.user_callback = true; callback_request_xfer_done(&_transfer.setup, false); } else { complete_request_xfer_done(true); @@ -276,10 +276,10 @@ bool USBDevice::_control_in() */ if ((_transfer.remaining == 0) && !_transfer.zlp) { /* Transfer completed */ + _transfer.user_callback = RequestXferDone; if (_transfer.notify) { /* Notify class layer. */ _transfer.notify = false; - _transfer.user_callback = true; callback_request_xfer_done(&_transfer.setup, false); } else { complete_request_xfer_done(true); @@ -298,7 +298,8 @@ void USBDevice::complete_request_xfer_done(bool success) { lock(); - _transfer.user_callback = false; + MBED_ASSERT(_transfer.user_callback == RequestXferDone); + _transfer.user_callback = None; if (_abort_control) { _control_abort(); unlock(); @@ -350,7 +351,7 @@ bool USBDevice::_request_set_configuration() _phy->unconfigure(); _change_state(Address); } else { - _transfer.user_callback = true; + _transfer.user_callback = SetConfiguration; callback_set_configuration(_device.configuration); } @@ -361,7 +362,8 @@ void USBDevice::complete_set_configuration(bool success) { lock(); - _transfer.user_callback = false; + MBED_ASSERT(_transfer.user_callback == SetConfiguration); + _transfer.user_callback = None; if (_abort_control) { _control_abort(); unlock(); @@ -413,7 +415,7 @@ bool USBDevice::_request_set_interface() { assert_locked(); - _transfer.user_callback = true; + _transfer.user_callback = SetInterface; callback_set_interface(_transfer.setup.wIndex, _transfer.setup.wValue); return true; } @@ -422,7 +424,8 @@ void USBDevice::complete_set_interface(bool success) { lock(); - _transfer.user_callback = false; + MBED_ASSERT(_transfer.user_callback == SetInterface); + _transfer.user_callback = None; if (_abort_control) { _control_abort(); unlock(); @@ -619,6 +622,7 @@ void USBDevice::_control_setup() _transfer.zlp = false; _transfer.notify = false; _transfer.stage = Setup; + _transfer.user_callback = Request; #ifdef DEBUG printf("dataTransferDirection: %d\r\nType: %d\r\nRecipient: %d\r\nbRequest: %d\r\nwValue: %d\r\nwIndex: %d\r\nwLength: %d\r\n", _transfer.setup.bmRequestType.dataTransferDirection, @@ -638,10 +642,11 @@ void USBDevice::complete_request(RequestResult direction, uint8_t *data, uint32_ { lock(); - _transfer.user_callback = false; + MBED_ASSERT(_transfer.user_callback == Request); + _transfer.user_callback = None; if (_abort_control) { if ((direction == Receive) || (direction == Send)) { - _transfer.user_callback = true; + _transfer.user_callback = RequestXferDone; callback_request_xfer_done(&_transfer.setup, true); } else { _control_abort(); @@ -657,7 +662,7 @@ void USBDevice::complete_request(RequestResult direction, uint8_t *data, uint32_ } /* user_callback may be set by _request_setup() */ - if (!_transfer.user_callback) { + if (_transfer.user_callback == None) { _control_setup_continue(); } } else if (direction == Failure) { @@ -678,10 +683,10 @@ void USBDevice::_control_abort_start() assert_locked(); _setup_ready = false; - if (_transfer.user_callback) { - _abort_control = true; - } else { + if (_transfer.user_callback == None) { _control_abort(); + } else { + _abort_control = true; } } @@ -787,12 +792,12 @@ void USBDevice::ep0_setup() _setup_ready = true; /* Endpoint 0 setup event */ - if (_transfer.user_callback) { + if (_transfer.user_callback == None) { + _control_setup(); + } else { /* A new setup packet has arrived so abort the current control transfer */ _abort_control = true; - } else { - _control_setup(); } } @@ -806,7 +811,7 @@ void USBDevice::ep0_out() return; } - if (_transfer.user_callback) { + if (_transfer.user_callback != None) { /* EP0 OUT should not receive data if the stack is waiting on a user callback for the buffer to fill or status */ MBED_ASSERT(0); diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 371359fa8b0..5a532528d0f 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -540,6 +540,14 @@ class USBDevice: public USBPhyEvents { Status }; + enum UserCallback { + None, + Request, + RequestXferDone, + SetConfiguration, + SetInterface + }; + struct control_transfer_t { setup_packet_t setup; uint8_t *ptr; @@ -548,7 +556,7 @@ class USBDevice: public USBPhyEvents { bool zlp; bool notify; ControlState stage; - bool user_callback; + UserCallback user_callback; }; endpoint_info_t _endpoint_info[32 - 2]; From 8f50150d84d08e4bbbf442a9b080843753ff876a Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 14 Mar 2018 18:37:17 -0500 Subject: [PATCH 136/488] Change USBDevice read handling Remove the USBDevice function read_start and automatically start all reads internally in USBDevice. This patch also renames the function read_finish to read. --- usb/device/USBDevice/USBDevice.cpp | 39 ++++++------------------------ usb/device/USBDevice/USBDevice.h | 20 ++++----------- 2 files changed, 13 insertions(+), 46 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 9206388d99f..d8cf7ee729e 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -866,6 +866,8 @@ void USBDevice::out(usb_ep_t endpoint) endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; info->pending += 1; + _phy->endpoint_read(endpoint, info->max_packet_size); + if (info->callback) { (this->*(info->callback))(endpoint); } @@ -994,7 +996,11 @@ bool USBDevice::endpoint_add(usb_ep_t endpoint, uint32_t max_packet_size, usb_ep info->flags |= ENDPOINT_ENABLED; info->pending = 0; info->max_packet_size = max_packet_size; - ret = true; + ret = _phy->endpoint_read(endpoint, max_packet_size); + if (!ret) { + MBED_ASSERT(0); + endpoint_remove(endpoint); + } } unlock(); @@ -1191,36 +1197,7 @@ uint32_t USBDevice::endpoint_max_packet_size(usb_ep_t endpoint) return size; } -bool USBDevice::read_start(usb_ep_t endpoint) -{ - lock(); - - if (!EP_INDEXABLE(endpoint)) { - MBED_ASSERT(0); - unlock(); - return false; - } - - if(!configured()) { - unlock(); - return false; - } - - endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; - if (!(info->flags & ENDPOINT_ENABLED)) { - // Invalid endpoint is being used - MBED_ASSERT(0); - unlock(); - return false; - } - - bool ret = _phy->endpoint_read(endpoint, info->max_packet_size); - - unlock(); - return ret; -} - -bool USBDevice::read_finish(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint32_t *size) +bool USBDevice::read(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint32_t *size) { lock(); diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 5a532528d0f..1ede75ea10f 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -201,22 +201,12 @@ class USBDevice: public USBPhyEvents { */ uint32_t endpoint_max_packet_size(usb_ep_t endpoint); - /** Start a read on the given endpoint - * - * After the read is finished call read_start to get the result. - * - * @param endpoint endpoint to perform the read on - * @return true if the read was started, false if no more reads can be started - * @note This endpoint must already have been setup with endpoint_add - */ - bool read_start(usb_ep_t endpoint); - /** - * Finish a read on the given endpoint + * Read a packet on the given endpoint * - * Get the contents of a read started with read_start. To ensure all - * the data from this endpoint is read make sure the buffer and size - * passed is at least as big as the maximum packet for this endpoint. + * Get the contents of an IN transfer. To ensure all the data from this + * endpoint is read make sure the buffer and size passed in is at least + * as big as the maximum packet for this endpoint. * * @param endpoint endpoint to read data from * @param buffer buffer to fill with read data @@ -226,7 +216,7 @@ class USBDevice: public USBPhyEvents { * @return true if the read was completed, otherwise false * @note This endpoint must already have been setup with endpoint_add */ - bool read_finish(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint32_t *size); + bool read(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint32_t *size); /** * Write a data to the given endpoint From 1a3cad14b18c8146c4d5b142d472d27aad634cfc Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 14 Mar 2018 18:38:16 -0500 Subject: [PATCH 137/488] Update USBTester for simplified read handling Remove read_start and replace read_finish with read to match the new USBDevice API. --- TESTS/usb_device/basic/USBTester.cpp | 19 ++----------------- usb/device/USBDevice/USBDevice.cpp | 3 +-- 2 files changed, 3 insertions(+), 19 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index 1f26fce2f1c..5ccd7c68222 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -148,9 +148,6 @@ void USBTester::callback_set_configuration(uint8_t configuration) endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); - read_start(int_out); - read_start(bulk_out); - complete_set_configuration(true); } @@ -167,9 +164,6 @@ void USBTester::callback_set_interface(uint16_t interface, uint8_t alternate) endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); - read_start(int_out); - read_start(bulk_out); - complete_set_interface(true); return; } @@ -184,9 +178,6 @@ void USBTester::callback_set_interface(uint16_t interface, uint8_t alternate) endpoint_add(bulk_in, MIN_EP_SIZE, USB_EP_TYPE_BULK); endpoint_add(bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); - read_start(int_out); - read_start(bulk_out); - complete_set_interface(true); return; } @@ -362,10 +353,7 @@ void USBTester::epint_out_callback(usb_ep_t endpoint) uint8_t buffer[65]; uint32_t size = 0; - if (!read_finish(endpoint, buffer, sizeof(buffer), &size)) { - return; - } - if (!read_start(endpoint)) { + if (!read(endpoint, buffer, sizeof(buffer), &size)) { return; } } @@ -374,10 +362,7 @@ void USBTester::epbulk_out_callback(usb_ep_t endpoint) uint8_t buffer[65]; uint32_t size = 0; - if (!read_finish(endpoint, buffer, sizeof(buffer), &size)) { - return; - } - if (!read_start(endpoint)) { + if (!read(endpoint, buffer, sizeof(buffer), &size)) { return; } } diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index d8cf7ee729e..c99b9824ef9 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -866,8 +866,6 @@ void USBDevice::out(usb_ep_t endpoint) endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; info->pending += 1; - _phy->endpoint_read(endpoint, info->max_packet_size); - if (info->callback) { (this->*(info->callback))(endpoint); } @@ -1229,6 +1227,7 @@ bool USBDevice::read(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint bool ret = _phy->endpoint_read_result(endpoint, buffer, max_size, size); if (ret) { info->pending -= 1; + _phy->endpoint_read(endpoint, info->max_packet_size); } unlock(); From 76004da8ff9d0bc15d1ff6ccfd5895a2690bc8ce Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 15 Mar 2018 16:59:17 -0500 Subject: [PATCH 138/488] Fix USB init problems Initialize the _transfer structure so the behavior is the same regardless of prior memory contents. This fixes a hang during USB testing when CI flags are used. --- usb/device/USBDevice/USBDevice.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index c99b9824ef9..c724da23aa2 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -1140,6 +1140,8 @@ USBDevice::USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint1 this->product_release = product_release; memset(_endpoint_info, 0, sizeof(_endpoint_info)); + memset(&_transfer, 0, sizeof(_transfer)); + _transfer.user_callback = None; _setup_ready = false; _abort_control = false; @@ -1163,6 +1165,8 @@ USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_r this->product_release = product_release; memset(_endpoint_info, 0, sizeof(_endpoint_info)); + memset(&_transfer, 0, sizeof(_transfer)); + _transfer.user_callback = None; _setup_ready = false; _abort_control = false; From c04d3eca4c1fde85015dcfdc85c0feba6b335f72 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 15 Mar 2018 20:10:36 -0500 Subject: [PATCH 139/488] Update stall state on set and clear feature Call USBDevice::endpoint_stall/unstall in the request to set/clear halt so the endpoint state is properly updated in the array _endpoint_info. --- usb/device/USBDevice/USBDevice.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index c724da23aa2..f735ec90da7 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -460,10 +460,10 @@ bool USBDevice::_request_set_feature() /* TODO: Remote wakeup feature not supported */ break; case ENDPOINT_RECIPIENT: - if (!EP_VALID(_transfer.setup.wIndex)) { + if (!EP_INDEXABLE(_transfer.setup.wIndex)) { break; } else if (_transfer.setup.wValue == ENDPOINT_HALT) { - _phy->endpoint_stall(_transfer.setup.wIndex); + endpoint_stall(_transfer.setup.wIndex); success = true; } break; @@ -492,10 +492,10 @@ bool USBDevice::_request_clear_feature() /* TODO: Remote wakeup feature not supported */ break; case ENDPOINT_RECIPIENT: - if (!EP_VALID(_transfer.setup.wIndex)) { + if (!EP_INDEXABLE(_transfer.setup.wIndex)) { break; } else if (_transfer.setup.wValue == ENDPOINT_HALT) { - _phy->endpoint_unstall(_transfer.setup.wIndex); + endpoint_unstall(_transfer.setup.wIndex); success = true; } break; From a802893e20cd48886f993edd8d5c55321be9fb66 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 16 Mar 2018 19:58:15 -0500 Subject: [PATCH 140/488] Move USBDevice processing out of user callbacks Perform processing triggered by user callbacks when USB is being unlocked rather than synchronously. This prevents recursive callbacks which reduces stack usage. This also prevents state change inside the user callback which makes the code easier to reason about. --- usb/device/USBDevice/USBDevice.cpp | 76 +++++++++++++++++++++++++++--- usb/device/USBDevice/USBDevice.h | 19 ++++++++ 2 files changed, 88 insertions(+), 7 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index f735ec90da7..6c5ebaa1bc9 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -299,6 +299,18 @@ void USBDevice::complete_request_xfer_done(bool success) lock(); MBED_ASSERT(_transfer.user_callback == RequestXferDone); + _transfer.args.status = success; + _run_later(&USBDevice::_complete_request_xfer_done); + + unlock(); +} + +void USBDevice::_complete_request_xfer_done() +{ + assert_locked(); + + bool success = _transfer.args.status; + _transfer.user_callback = None; if (_abort_control) { _control_abort(); @@ -320,8 +332,6 @@ void USBDevice::complete_request_xfer_done(bool success) _transfer.stage = Status; _phy->ep0_read(); } - - unlock(); } bool USBDevice::_request_set_address() @@ -363,6 +373,18 @@ void USBDevice::complete_set_configuration(bool success) lock(); MBED_ASSERT(_transfer.user_callback == SetConfiguration); + _transfer.args.status = success; + _run_later(&USBDevice::_complete_set_configuration); + + unlock(); +} + +void USBDevice::_complete_set_configuration() +{ + assert_locked(); + + bool success = _transfer.args.status; + _transfer.user_callback = None; if (_abort_control) { _control_abort(); @@ -379,7 +401,6 @@ void USBDevice::complete_set_configuration(bool success) _phy->ep0_stall(); } - unlock(); } bool USBDevice::_request_get_configuration() @@ -425,6 +446,18 @@ void USBDevice::complete_set_interface(bool success) lock(); MBED_ASSERT(_transfer.user_callback == SetInterface); + _transfer.args.status = success; + _run_later(&USBDevice::_complete_set_interface); + + unlock(); +} + +void USBDevice::_complete_set_interface() +{ + assert_locked(); + + bool success = _transfer.args.status; + _transfer.user_callback = None; if (_abort_control) { _control_abort(); @@ -439,8 +472,6 @@ void USBDevice::complete_set_interface(bool success) } else { _phy->ep0_stall(); } - - unlock(); } bool USBDevice::_request_set_feature() @@ -643,6 +674,22 @@ void USBDevice::complete_request(RequestResult direction, uint8_t *data, uint32_ lock(); MBED_ASSERT(_transfer.user_callback == Request); + _transfer.args.request.result = direction; + _transfer.args.request.data = data; + _transfer.args.request.size = size; + _run_later(&USBDevice::_complete_request); + + unlock(); +} + +void USBDevice::_complete_request() +{ + assert_locked(); + + RequestResult direction = _transfer.args.request.result; + uint8_t *data = _transfer.args.request.data; + uint32_t size = _transfer.args.request.size; + _transfer.user_callback = None; if (_abort_control) { if ((direction == Receive) || (direction == Send)) { @@ -674,8 +721,6 @@ void USBDevice::complete_request(RequestResult direction, uint8_t *data, uint32_ _transfer.direction = direction; _control_setup_continue(); } - - unlock(); } void USBDevice::_control_abort_start() @@ -1151,6 +1196,7 @@ USBDevice::USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint1 _current_interface = 0; _current_alternate = 0; _locked = 0; + _post_process = NULL; /* Set initial device state */ _device.state = Powered; @@ -1176,6 +1222,7 @@ USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_r _current_interface = 0; _current_alternate = 0; _locked = 0; + _post_process = NULL; /* Set initial device state */ _device.state = Powered; @@ -1390,6 +1437,16 @@ void USBDevice::lock() void USBDevice::unlock() { MBED_ASSERT(_locked > 0); + + if (_locked == 1) { + // Perform post processing before fully unlocking + while (_post_process != NULL) { + void (USBDevice::*call)() = _post_process; + _post_process = NULL; + (this->*call)(); + } + } + _locked--; core_util_critical_section_exit(); } @@ -1424,3 +1481,8 @@ void USBDevice::_change_state(DeviceState new_state) { callback_state_change(new_state); } + +void USBDevice::_run_later(void (USBDevice::*function)()) +{ + _post_process = function; +} diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 1ede75ea10f..2f69dfef37a 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -509,6 +509,12 @@ class USBDevice: public USBPhyEvents { bool _request_get_interface(); bool _request_set_interface(); void _change_state(DeviceState state); + void _run_later(void (USBDevice::*function)()); + + void _complete_request(); + void _complete_request_xfer_done(); + void _complete_set_configuration(); + void _complete_set_interface(); struct endpoint_info_t { void (USBDevice::*callback)(usb_ep_t endpoint); @@ -538,6 +544,17 @@ class USBDevice: public USBPhyEvents { SetInterface }; + struct complete_request_t { + RequestResult result; + uint8_t *data; + uint32_t size; + }; + + union complete_args_t { + complete_request_t request; + bool status; + }; + struct control_transfer_t { setup_packet_t setup; uint8_t *ptr; @@ -547,6 +564,7 @@ class USBDevice: public USBPhyEvents { bool notify; ControlState stage; UserCallback user_callback; + complete_args_t args; }; endpoint_info_t _endpoint_info[32 - 2]; @@ -556,6 +574,7 @@ class USBDevice: public USBPhyEvents { control_transfer_t _transfer; usb_device_t _device; uint32_t _max_packet_size_ep0; + void (USBDevice::*_post_process)(); bool _setup_ready; bool _abort_control; From 3d4f2c61fe14f43a85492d896fc79a2fd8effba1 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 16 Mar 2018 22:56:20 -0500 Subject: [PATCH 141/488] Allow transfer to start when configuring USB Allow reads and writes to be started when entering the configured state. --- usb/device/USBDevice/USBDevice.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 6c5ebaa1bc9..c522cf3d95b 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -1256,7 +1256,8 @@ bool USBDevice::read(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint return false; } - if (!configured()) { + bool configuring = _transfer.user_callback == SetConfiguration; + if (!configured() && !configuring) { unlock(); return false; } @@ -1295,7 +1296,8 @@ bool USBDevice::write(usb_ep_t endpoint, uint8_t *buffer, uint32_t size) return false; } - if (!configured()) { + bool configuring = _transfer.user_callback == SetConfiguration; + if (!configured() && !configuring) { unlock(); return false; } From 059d31d64bab650260a52c6d92e0dabcd4ee8caf Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 17 Mar 2018 18:08:30 -0500 Subject: [PATCH 142/488] Explicitly return when endpoint 0 is stalled Stalling endpoint 0 indicates the end of a control transfer. Return immediately when this occurs rather than continuing processing. In particular, this patch prevents status from erroneously being sent when _request_setup returns false inside _complete_request. --- usb/device/USBDevice/USBDevice.cpp | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index c522cf3d95b..37cd9c1eb23 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -399,6 +399,7 @@ void USBDevice::_complete_set_configuration() _control_setup_continue(); } else { _phy->ep0_stall(); + return; } } @@ -471,6 +472,7 @@ void USBDevice::_complete_set_interface() _control_setup_continue(); } else { _phy->ep0_stall(); + return; } } @@ -706,6 +708,7 @@ void USBDevice::_complete_request() /* Standard requests */ if (!_request_setup()) { _phy->ep0_stall(); + return; } /* user_callback may be set by _request_setup() */ @@ -714,6 +717,7 @@ void USBDevice::_complete_request() } } else if (direction == Failure) { _phy->ep0_stall(); + return; } else { _transfer.notify = true; _transfer.remaining = size; @@ -872,6 +876,7 @@ void USBDevice::ep0_out() if (!_control_out()) { /* Protocol stall; this will stall both endpoints */ _phy->ep0_stall(); + return; } } @@ -896,6 +901,7 @@ void USBDevice::ep0_in() if (!_control_in()) { /* Protocol stall; this will stall both endpoints */ _phy->ep0_stall(); + return; } } From 9a350ff70bf00889da4631af59dd90acbc253b8c Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 17 Mar 2018 21:21:13 -0500 Subject: [PATCH 143/488] Call disconnect when uninitializing USB Disconnect USB when uninitializing USB so it is in a well defined state. --- usb/device/USBDevice/USBDevice.cpp | 13 +++++++++++-- usb/device/USBDevice/USBDevice.h | 1 + 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 37cd9c1eb23..84910903e2d 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -958,6 +958,7 @@ void USBDevice::deinit() lock(); if (_initialized) { + disconnect(); this->_phy->deinit(); _initialized = false; } @@ -980,7 +981,10 @@ void USBDevice::connect(bool blocking) { /* Connect device */ lock(); - _phy->connect(); + if (!_connected) { + _phy->connect(); + _connected = true; + } unlock(); if (blocking) { @@ -994,7 +998,10 @@ void USBDevice::disconnect() lock(); /* Disconnect device */ - _phy->disconnect(); + if (_connected) { + _phy->disconnect(); + _connected = false; + } /* Set initial device state */ if (_device.state > Powered) { @@ -1199,6 +1206,7 @@ USBDevice::USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint1 _phy = phy; _initialized = false; + _connected = false; _current_interface = 0; _current_alternate = 0; _locked = 0; @@ -1225,6 +1233,7 @@ USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_r _phy = get_usb_phy(); _initialized = false; + _connected = false; _current_interface = 0; _current_alternate = 0; _locked = 0; diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 2f69dfef37a..9d3e01d4dfb 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -571,6 +571,7 @@ class USBDevice: public USBPhyEvents { USBPhy *_phy; bool _initialized; + bool _connected; control_transfer_t _transfer; usb_device_t _device; uint32_t _max_packet_size_ep0; From 978e5e0c7e350481d63994e681154391a15d411a Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sun, 18 Mar 2018 19:32:20 -0500 Subject: [PATCH 144/488] Update USBPhy to allow zero copy transfers Update the USBPhy to allow for zero copy USB transfers on devices which support it. This also aligns more closely with the CMSIS USB driver model. --- platform/USBPhy.h | 25 ++++++++++++------------- 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/platform/USBPhy.h b/platform/USBPhy.h index 33f5870e1a6..1e800e33fcb 100644 --- a/platform/USBPhy.h +++ b/platform/USBPhy.h @@ -182,16 +182,18 @@ class USBPhy { /** * Start receiving a packet of up to wMaxPacketSize on endpoint 0 + * + * @param data Buffer to fill with the data read + * @param size Size of buffer */ - virtual void ep0_read() = 0; + virtual void ep0_read(uint8_t *data, uint32_t size) = 0; /** * Read the contents of a received packet * - * @param buffer Buffer to fill with the data read - * @param size Size of buffer + * @return Size of data read */ - virtual uint32_t ep0_read_result(uint8_t *buffer, uint32_t size) = 0; + virtual uint32_t ep0_read_result() = 0; /** * Write a packet on endpoint 0 @@ -253,23 +255,20 @@ class USBPhy { * Start a read on the given endpoint * * @param endpoint Endpoint to start the read on - * @param max_packet A hint as to the wMaxPacketSize of this endpoint. - * This must match the size in endpoint_add. + * @param data Buffer to fill with data + * @param size Size of the read buffer. This must be at least + * the max packet size for this endpoint. * @return true if the read was successfully started, false otherwise */ - virtual bool endpoint_read(usb_ep_t endpoint, uint32_t max_packet) = 0; + virtual bool endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) = 0; /** * Finish a read on the given endpoint * - * @param endpoint Endpoint to read data from - * @param data Buffer to fill with data - * @param size Size of buffer - * @param bytes_read The number of bytes in the current packet. This can be larger than - * the size parameter if the buffer passed in was too small. + * @param endpoint Endpoint to check * @return true if data was read false otherwise */ - virtual bool endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytes_read) = 0; + virtual uint32_t endpoint_read_result(usb_ep_t endpoint) = 0; /** * Start a write on the given endpoint From b4ea39fb5eddcff2ea90a578d244e92f495c1eec Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 16 Mar 2018 23:49:26 -0500 Subject: [PATCH 145/488] Update USBDevice to reflect the updated USBPhy Update USBDevice so the USB buffers are user supplied. --- usb/device/USBDevice/USBDevice.cpp | 87 ++++++++++++++++++++++++------ usb/device/USBDevice/USBDevice.h | 36 +++++++++---- 2 files changed, 97 insertions(+), 26 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 84910903e2d..808def213c0 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -200,7 +200,7 @@ bool USBDevice::_control_out() } /* Read from endpoint */ - packetSize = _phy->ep0_read_result(_transfer.ptr, _transfer.remaining); + packetSize = _phy->ep0_read_result(); /* Check if transfer size is valid */ if (packetSize > _transfer.remaining) { @@ -224,7 +224,7 @@ bool USBDevice::_control_out() complete_request_xfer_done(true); } } else { - _phy->ep0_read(); + _phy->ep0_read(_transfer.ptr, _transfer.remaining); } return true; @@ -330,7 +330,7 @@ void USBDevice::_complete_request_xfer_done() _phy->ep0_write(NULL, 0); } else if (_transfer.stage == DataIn) { _transfer.stage = Status; - _phy->ep0_read(); + _phy->ep0_read(NULL, 0); } } @@ -800,7 +800,7 @@ void USBDevice::_control_setup_continue() } else { /* OUT stage */ _transfer.stage = DataOut; - _phy->ep0_read(); + _phy->ep0_read(_transfer.ptr, _transfer.remaining); } } else { /* Status stage */ @@ -1052,11 +1052,6 @@ bool USBDevice::endpoint_add(usb_ep_t endpoint, uint32_t max_packet_size, usb_ep info->flags |= ENDPOINT_ENABLED; info->pending = 0; info->max_packet_size = max_packet_size; - ret = _phy->endpoint_read(endpoint, max_packet_size); - if (!ret) { - MBED_ASSERT(0); - endpoint_remove(endpoint); - } } unlock(); @@ -1261,7 +1256,7 @@ uint32_t USBDevice::endpoint_max_packet_size(usb_ep_t endpoint) return size; } -bool USBDevice::read(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint32_t *size) +bool USBDevice::read_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size) { lock(); @@ -1291,17 +1286,43 @@ bool USBDevice::read(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint return false; } - bool ret = _phy->endpoint_read_result(endpoint, buffer, max_size, size); - if (ret) { - info->pending -= 1; - _phy->endpoint_read(endpoint, info->max_packet_size); + _phy->endpoint_read(endpoint, buffer, info->max_packet_size); + + unlock(); + + return true; +} + +uint32_t USBDevice::read_finish(usb_ep_t endpoint) +{ + lock(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); + return 0; } + if (!configured()) { + unlock(); + return 0; + } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + if (!(info->flags & ENDPOINT_ENABLED)) { + // Invalid endpoint is being used + MBED_ASSERT(0); + unlock(); + return 0; + } + + uint32_t size = 0; + size = _phy->endpoint_read_result(endpoint); unlock(); - return ret; + return size; } -bool USBDevice::write(usb_ep_t endpoint, uint8_t *buffer, uint32_t size) +bool USBDevice::write_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t size) { lock(); @@ -1341,13 +1362,47 @@ bool USBDevice::write(usb_ep_t endpoint, uint8_t *buffer, uint32_t size) /* Send report */ bool ret = _phy->endpoint_write(endpoint, buffer, size); if (ret) { + info->transfer_size = size; info->pending += 1; + } else { + info->transfer_size = 0; } unlock(); return ret; } +uint32_t USBDevice::write_finish(usb_ep_t endpoint) +{ + uint32_t ret = 0; + + lock(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); + return false; + } + + if (!configured()) { + unlock(); + return false; + } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + if (!(info->flags & ENDPOINT_ENABLED)) { + // Invalid endpoint is being used + MBED_ASSERT(0); + unlock(); + return 0; + } + + ret = info->transfer_size; + + unlock(); + return ret; +} + const uint8_t *USBDevice::device_desc() { uint8_t device_descriptor_temp[] = { diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 9d3e01d4dfb..a61549ca68f 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -202,26 +202,33 @@ class USBDevice: public USBPhyEvents { uint32_t endpoint_max_packet_size(usb_ep_t endpoint); /** - * Read a packet on the given endpoint + * start a read on the given endpoint * - * Get the contents of an IN transfer. To ensure all the data from this - * endpoint is read make sure the buffer and size passed in is at least - * as big as the maximum packet for this endpoint. + * Start a read on the given endpoint. The data buffer must remain + * unchanged until the transfer either completes or is aborted. * * @param endpoint endpoint to read data from * @param buffer buffer to fill with read data - * @param max_size the total size of the data buffer. This must be at least - * the max packet size of this endpoint - * @param size The size of data that was read + * @param size The size of data to read. This must be greater than or equal + * to the max packet size for this endpoint * @return true if the read was completed, otherwise false * @note This endpoint must already have been setup with endpoint_add */ - bool read(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint32_t *size); + bool read_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t size); + + /** + * Get the status of a read + * + * @param endpoint endpoint to get the status of + * @return number of bytes read by this endpoint + */ + uint32_t read_finish(usb_ep_t endpoint); /** * Write a data to the given endpoint * - * Write data to an endpoint. + * Write data to an endpoint. The data sent must remain unchanged until + * the transfer either completes or is aborted. * * @param endpoint endpoint to write data to * @param buffer data to write @@ -229,7 +236,15 @@ class USBDevice: public USBPhyEvents { * max packet size of this endpoint * @note This endpoint must already have been setup with endpoint_add */ - bool write(usb_ep_t endpoint, uint8_t *buffer, uint32_t size); + bool write_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t size); + + /** + * Get the status of a write + * + * @param endpoint endpoint to get the status of + * @return number of bytes sent by this endpoint + */ + uint32_t write_finish(usb_ep_t endpoint); /* * Get device descriptor. @@ -519,6 +534,7 @@ class USBDevice: public USBPhyEvents { struct endpoint_info_t { void (USBDevice::*callback)(usb_ep_t endpoint); uint16_t max_packet_size; + uint16_t transfer_size; uint8_t flags; uint8_t pending; }; From a410269579359f8295e94c0baa7fdbba45c5af84 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 17 Mar 2018 18:09:09 -0500 Subject: [PATCH 146/488] Add abort API to USBDevice Add the function endpoint_abort and ensure ongoing transfer are aborted when an endpoint is removed. --- usb/device/USBDevice/USBDevice.cpp | 50 ++++++++++++++++++++++++++++-- usb/device/USBDevice/USBDevice.h | 8 +++++ 2 files changed, 56 insertions(+), 2 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 808def213c0..da3617cedd4 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -916,7 +916,8 @@ void USBDevice::out(usb_ep_t endpoint) endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; - info->pending += 1; + MBED_ASSERT(info->pending >= 1); + info->pending -= 1; if (info->callback) { (this->*(info->callback))(endpoint); } @@ -1071,6 +1072,10 @@ void USBDevice::endpoint_remove(usb_ep_t endpoint) endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; MBED_ASSERT(info->flags & ENDPOINT_ENABLED); + if (info->pending) { + _phy->endpoint_abort(endpoint); + } + info->callback = NULL; info->flags = 0; info->pending = 0; @@ -1256,6 +1261,38 @@ uint32_t USBDevice::endpoint_max_packet_size(usb_ep_t endpoint) return size; } +void USBDevice::endpoint_abort(usb_ep_t endpoint) +{ + lock(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); + return; + } + + bool configuring = _transfer.user_callback == SetConfiguration; + if (!configured() && !configuring) { + unlock(); + return; + } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + if (!(info->flags & ENDPOINT_ENABLED)) { + // Invalid endpoint is being used + MBED_ASSERT(0); + unlock(); + return; + } + + if (info->pending) { + _phy->endpoint_abort(endpoint); + info->pending = 0; + } + + unlock(); +} + bool USBDevice::read_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size) { lock(); @@ -1286,7 +1323,16 @@ bool USBDevice::read_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size return false; } - _phy->endpoint_read(endpoint, buffer, info->max_packet_size); + if (info->pending) { + // Only allow 1 packet + unlock(); + return false; + } + + bool ret = _phy->endpoint_read(endpoint, buffer, info->max_packet_size); + if (ret) { + info->pending += 1; + } unlock(); diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index a61549ca68f..698591b2e66 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -201,6 +201,14 @@ class USBDevice: public USBPhyEvents { */ uint32_t endpoint_max_packet_size(usb_ep_t endpoint); + /** + * Abort the current transfer on this endpoint + * + * @param endpoint endpoint with transfer to abort + * @note This endpoint must already have been setup with endpoint_add + */ + void endpoint_abort(usb_ep_t endpoint); + /** * start a read on the given endpoint * From 434f0cb042cb0936f7019ba1de18bcc5f0ebc6f6 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 17 Mar 2018 20:05:12 -0500 Subject: [PATCH 147/488] Update USBTester for the new USB API Update the class USBTester so it works with the new zero-copy USBDevice API. --- TESTS/usb_device/basic/USBTester.cpp | 22 ++++++++++------------ TESTS/usb_device/basic/USBTester.h | 2 ++ 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index 5ccd7c68222..3235a3f8554 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -145,8 +145,10 @@ void USBTester::callback_set_configuration(uint8_t configuration) // Configure endpoints > 0 endpoint_add(int_in, MAX_EP_SIZE, USB_EP_TYPE_INT); endpoint_add(int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); + read_start(int_out, int_buf, sizeof(int_buf)); endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); + read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); complete_set_configuration(true); } @@ -161,8 +163,10 @@ void USBTester::callback_set_interface(uint16_t interface, uint8_t alternate) endpoint_add(int_in, MAX_EP_SIZE, USB_EP_TYPE_INT); endpoint_add(int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); + read_start(int_out, int_buf, sizeof(int_buf)); endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); + read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); complete_set_interface(true); return; @@ -175,8 +179,10 @@ void USBTester::callback_set_interface(uint16_t interface, uint8_t alternate) endpoint_add(int_in, MIN_EP_SIZE, USB_EP_TYPE_INT); endpoint_add(int_out, MIN_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); + read_start(int_out, int_buf, sizeof(int_buf)); endpoint_add(bulk_in, MIN_EP_SIZE, USB_EP_TYPE_BULK); endpoint_add(bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); + read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); complete_set_interface(true); return; @@ -350,20 +356,12 @@ const uint8_t *USBTester::configuration_desc() void USBTester::epint_out_callback(usb_ep_t endpoint) { - uint8_t buffer[65]; - uint32_t size = 0; - - if (!read(endpoint, buffer, sizeof(buffer), &size)) { - return; - } + read_finish(endpoint); + read_start(endpoint, int_buf, sizeof(int_buf)); } void USBTester::epbulk_out_callback(usb_ep_t endpoint) { - uint8_t buffer[65]; - uint32_t size = 0; - - if (!read(endpoint, buffer, sizeof(buffer), &size)) { - return; - } + read_finish(endpoint); + read_start(endpoint, bulk_buf, sizeof(bulk_buf)); } diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index 0e527af98ab..7b56d3171e5 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -73,8 +73,10 @@ class USBTester: public USBDevice { protected: uint8_t bulk_in; uint8_t bulk_out; + uint8_t bulk_buf[64]; uint8_t int_in; uint8_t int_out; + uint8_t int_buf[64]; EventQueue *queue; virtual void callback_state_change(DeviceState new_state); From ac4750f374137783dd9023e5216094c87b1ef0be Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 10 Mar 2018 23:13:45 -0600 Subject: [PATCH 148/488] Update the LPC17XX driver to the new API Update this driver to match the new zero-copy API. --- .../TARGET_LPC176X/usb/USBHAL_LPC17.cpp | 60 +++++++++++++------ .../TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h | 12 ++-- 2 files changed, 50 insertions(+), 22 deletions(-) diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp index 23e8c1f87a1..ef3a66ea831 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp +++ b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp @@ -23,8 +23,8 @@ // Get endpoint direction -#define IN_EP(endpoint) ((endpoint) & 1U ? true : false) -#define OUT_EP(endpoint) ((endpoint) & 1U ? false : true) +#define IN_EP(endpoint) ((endpoint) & 0x80U ? true : false) +#define OUT_EP(endpoint) ((endpoint) & 0x80U ? false : true) // Convert physical endpoint number to register bit #define EP(endpoint) (1UL<PCONP |= PCUSB; @@ -466,14 +469,20 @@ void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) endpointReadcore(EP0OUT, buffer, size); } -void USBPhyHw::ep0_read(void) +void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) { - endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0); + read_buffers[EP0OUT] = data; + read_sizes[EP0OUT] = size; + SIEselectEndpoint(EP0OUT); + SIEclearBuffer(); } -uint32_t USBPhyHw::ep0_read_result(uint8_t *buffer, uint32_t size) +uint32_t USBPhyHw::ep0_read_result() { - return endpointReadcore(EP0OUT, buffer, size); + uint32_t size = endpointReadcore(EP0OUT, read_buffers[EP0OUT], read_sizes[EP0OUT]); + read_buffers[EP0OUT] = NULL; + read_sizes[EP0OUT] = 0; + return size; } void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) @@ -487,29 +496,41 @@ void USBPhyHw::ep0_stall(void) endpoint_stall(EP0OUT); } -bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint32_t maximumSize) +bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) { - // Don't clear isochronous endpoints - if ((DESC_TO_PHY(endpoint) >> 1) % 3 || (DESC_TO_PHY(endpoint) >> 1) == 0) { - SIEselectEndpoint(endpoint); - SIEclearBuffer(); + read_buffers[endpoint] = data; + read_sizes[endpoint] = size; + enableEndpointEvent(endpoint); + uint8_t status = SIEselectEndpoint(endpoint); + if (status & ((1 << 5) | (1 << 6))) { + // If any buffer has data then set the interrupt flag + LPC_USB->USBEpIntSet = EP(endpoint); } return true; } -bool USBPhyHw::endpoint_read_result(usb_ep_t endpoint, uint8_t *buffer, uint32_t size, uint32_t *bytesRead) +uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) { //for isochronous endpoint, we don't wait an interrupt if ((DESC_TO_PHY(endpoint) >> 1) % 3 || (DESC_TO_PHY(endpoint) >> 1) == 0) { if (!(epComplete & EP(endpoint))) { - return false; + return 0; } } - *bytesRead = endpointReadcore(endpoint, buffer, size); + uint32_t bytesRead = endpointReadcore(endpoint, read_buffers[endpoint], read_sizes[endpoint]); + read_buffers[endpoint] = NULL; + read_sizes[endpoint] = 0; + + // Don't clear isochronous endpoints + if ((DESC_TO_PHY(endpoint) >> 1) % 3 || (DESC_TO_PHY(endpoint) >> 1) == 0) { + SIEselectEndpoint(endpoint); + SIEclearBuffer(); + } + epComplete &= ~EP(endpoint); - return true; + return bytesRead; } bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) @@ -536,7 +557,9 @@ bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t maxPacket, usb_ep_type_t while (!(LPC_USB->USBDevIntSt & EP_RLZED)); LPC_USB->USBDevIntClr = EP_RLZED; - enableEndpointEvent(endpoint); + if (IN_EP(endpoint)) { + enableEndpointEvent(endpoint); + } return true; } @@ -649,6 +672,8 @@ void USBPhyHw::process(void) if ((devStat & SIE_DS_SUS) == 0) { events->suspend(true); } + memset(read_buffers, 0, sizeof(read_buffers)); + memset(read_sizes, 0, sizeof(read_sizes)); events->reset(); } } @@ -693,9 +718,10 @@ void USBPhyHw::process(void) selectEndpointClearInterrupt(endpoint); epComplete |= EP(endpoint); LPC_USB->USBDevIntClr = EP_SLOW; - if (endpoint & 0x80) {//TODO - use macro + if (IN_EP(endpoint)) { events->in(endpoint); } else { + disableEndpointEvent(endpoint); events->out(endpoint); } } diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h index 999991c6a66..ad2ca502c52 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h +++ b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h @@ -40,18 +40,18 @@ class USBPhyHw : public USBPhy { virtual uint32_t ep0_set_max_packet(uint32_t max_packet); virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size); - virtual void ep0_read(void); - virtual uint32_t ep0_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_read(uint8_t *data, uint32_t size); + virtual uint32_t ep0_read_result(); virtual void ep0_write(uint8_t *buffer, uint32_t size); - virtual void ep0_stall(void); + virtual void ep0_stall(); virtual bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type); virtual void endpoint_remove(usb_ep_t endpoint); virtual void endpoint_stall(usb_ep_t endpoint); virtual void endpoint_unstall(usb_ep_t endpoint); - virtual bool endpoint_read(usb_ep_t endpoint, uint32_t maximumSize); - virtual bool endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytesRead); + virtual bool endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual uint32_t endpoint_read_result(usb_ep_t endpoint); virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size); virtual void endpoint_abort(usb_ep_t endpoint); @@ -59,6 +59,8 @@ class USBPhyHw : public USBPhy { private: USBPhyEvents *events; + uint8_t *read_buffers[16]; + uint16_t read_sizes[16]; static void _usbisr(void); }; From d8b1baf6cadc87eefec8f89cab15e28ef21f3b37 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sun, 18 Mar 2018 19:10:13 -0500 Subject: [PATCH 149/488] Update the Kinetis USB driver to the new API Update this driver to match the new zero-copy API. --- targets/TARGET_Freescale/usb/USBPhyHw.h | 14 ++++-- .../TARGET_Freescale/usb/USBPhy_Kinetis.cpp | 46 ++++++++++++++----- 2 files changed, 45 insertions(+), 15 deletions(-) diff --git a/targets/TARGET_Freescale/usb/USBPhyHw.h b/targets/TARGET_Freescale/usb/USBPhyHw.h index f11c7512705..7bf1fee22f0 100644 --- a/targets/TARGET_Freescale/usb/USBPhyHw.h +++ b/targets/TARGET_Freescale/usb/USBPhyHw.h @@ -40,8 +40,8 @@ class USBPhyHw : public USBPhy { virtual uint32_t ep0_set_max_packet(uint32_t max_packet); virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size); - virtual void ep0_read(); - virtual uint32_t ep0_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_read(uint8_t *data, uint32_t size); + virtual uint32_t ep0_read_result(); virtual void ep0_write(uint8_t *buffer, uint32_t size); virtual void ep0_stall(); @@ -50,8 +50,8 @@ class USBPhyHw : public USBPhy { virtual void endpoint_stall(usb_ep_t endpoint); virtual void endpoint_unstall(usb_ep_t endpoint); - virtual bool endpoint_read(usb_ep_t endpoint, uint32_t maximumSize); - virtual bool endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytesRead); + virtual bool endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual uint32_t endpoint_read_result(usb_ep_t endpoint); virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size); virtual void endpoint_abort(usb_ep_t endpoint); @@ -59,6 +59,12 @@ class USBPhyHw : public USBPhy { private: USBPhyEvents *events; + uint8_t *read_buffers[16]; + uint16_t read_sizes[16]; + + bool endpoint_read_core(usb_ep_t endpoint, uint32_t max_packet); + bool endpoint_read_result_core(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytesRead); + static void _usbisr(void); }; diff --git a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp index 3ca12d37fc8..3c98280a2c2 100644 --- a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp +++ b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp @@ -273,10 +273,10 @@ uint32_t USBPhyHw::ep0_set_max_packet(uint32_t max_packet) void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) { uint32_t sz; - endpoint_read_result(EP0OUT, buffer, size, &sz); + endpoint_read_result_core(EP0OUT, buffer, size, &sz); } -void USBPhyHw::ep0_read() +void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) { if (ctrl_xfer == CTRL_XFER_READY) { // Transfer is done so ignore call @@ -301,15 +301,15 @@ void USBPhyHw::ep0_read() // This allows a subsequent SETUP packet to be stored // without any processor intervention. Data1 &= ~1UL; // set DATA0 + endpoint_read_core(EP0OUT, MAX_PACKET_SIZE_EP0); + } else { + endpoint_read(EP0OUT, data, size); } - endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0); } -uint32_t USBPhyHw::ep0_read_result(uint8_t *buffer, uint32_t size) +uint32_t USBPhyHw::ep0_read_result() { - uint32_t sz; - endpoint_read_result(EP0OUT, buffer, size, &sz); - return sz; + return endpoint_read_result(EP0OUT); } void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) @@ -320,7 +320,7 @@ void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) } if ((ctrl_xfer == CTRL_XFER_NONE) || (ctrl_xfer == CTRL_XFER_OUT)) { // Prepare for next setup packet - endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0); + endpoint_read_core(EP0OUT, MAX_PACKET_SIZE_EP0); ctrl_xfer = CTRL_XFER_READY; } endpoint_write(EP0IN, buffer, size); @@ -339,7 +339,7 @@ void USBPhyHw::ep0_stall() // Note - time between stalling and setting up the endpoint // must be kept to a minimum to prevent a dropped SETUP // packet. - endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0); + endpoint_read_core(EP0OUT, MAX_PACKET_SIZE_EP0); core_util_critical_section_exit(); } @@ -406,7 +406,16 @@ void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; } -bool USBPhyHw:: endpoint_read(usb_ep_t endpoint, uint32_t max_packet) +bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ + uint8_t log = DESC_TO_LOG(endpoint); + + read_buffers[log] = data; + read_sizes[log] = size; + return endpoint_read_core(endpoint, size); +} + +bool USBPhyHw::endpoint_read_core(usb_ep_t endpoint, uint32_t max_packet) { uint8_t log_endpoint = DESC_TO_LOG(endpoint); @@ -423,7 +432,19 @@ bool USBPhyHw:: endpoint_read(usb_ep_t endpoint, uint32_t max_packet) return true; } -bool USBPhyHw::endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytes_read) +uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) +{ + uint8_t log = DESC_TO_LOG(endpoint); + + uint32_t bytes_read = 0; + endpoint_read_result_core(endpoint, read_buffers[log], read_sizes[log], &bytes_read); + read_buffers[log] = NULL; + read_sizes[log] = 0; + return bytes_read; +} + + +bool USBPhyHw::endpoint_read_result_core(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytes_read) { uint32_t n, sz, idx, setup = 0; uint8_t not_iso; @@ -541,6 +562,9 @@ void USBPhyHw::process() USB0->ERREN = 0xFF; // enable error interrupt sources USB0->ADDR = 0x00; // set default address + memset(read_buffers, 0, sizeof(read_buffers)); + memset(read_sizes, 0, sizeof(read_sizes)); + // reset bus for USBDevice layer events->reset(); From 52ffc77a6d2ee19f152dd2be8add5aa7e0662e83 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sun, 18 Mar 2018 20:20:59 -0500 Subject: [PATCH 150/488] Update USBPhy doxygen Update USBPhy doxygen to pull in handbook copyedits. Also update the docs to reflect the enhanced USBPhy API. --- platform/USBPhy.h | 78 ++++++++++++++++++++++++++++------------------- 1 file changed, 47 insertions(+), 31 deletions(-) diff --git a/platform/USBPhy.h b/platform/USBPhy.h index 1e800e33fcb..ef2c91a096f 100644 --- a/platform/USBPhy.h +++ b/platform/USBPhy.h @@ -23,42 +23,58 @@ /** Abstract interface to physical USB hardware * * # Defined behavior - * * Any endpoint configurations which fit in the parameters of the table returned - * by USBPhy::endpoint_table can be used. - * * All endpoints in any valid endpoint configuration can be used concurrently - * * Device supports use of at least one control, bulk, interrupt and + * * You can use any endpoint configurations that fit in the parameters + * of the table returned by USBPhy::endpoint_table. + * * You can use all endpoints in any valid endpoint configuration concurrently. + * * The device supports use of at least one control, bulk, interrupt and * isochronous in each direction at the same time - at least 8 endpoints. - * * Device supports all standard endpoint sizes (wMaxPacketSize) - * * Device can handle an interrupt latency of at least 100ms if reset is not being performed and address is not being set - * * USBPhyEvents events are only sent when USBPhy is in the initialized state - * * When unpowered only the USBPhyEvents::power event can be sent - * * On USB reset all endpoints are removed except for endpoint 0 - * * USBPhyEvents::out and USBPhyEvents::in events only occur for endpoints which have been added - * * A call to USBPhy::ep0_write results in USBPhyEvents::in getting called if not - * interrupted by a power loss or reset - * * A call to endpoint_read followed by endpoint_read_result results in USBPhyEvents::out getting called if not - * interrupted by a power loss or reset - * * Endpoint 0 naks all transactions aside from setup packets until one - * of ep0_read, ep0_write or ep0_stall has been called - * * Endpoint 0 stall is automatically cleared on reception of a setup packet + * * USBPhy supports all standard endpoint sizes (wMaxPacketSize). + * * USBPhy can handle an interrupt latency of at least 100ms if the host PC + * is not performing a reset or setting the device's address. + * * USBPhy only sends USBPhyEvents when it is in the initialized state. + * * When unpowered, USBPhy only sends the USBPhyEvents::power event. + * * On USB reset, all endpoints are removed except for endpoint 0. + * * A call to USBPhy::ep0_write results in the call of USBPhyEvents::in when + * the PC reads the data unless a power loss, reset, or a call to + * USBPhy::disconnect occurs first. + * * A call to USBPhy::endpoint_write results in the call of USBPhyEvents::in + * when the pc reads the data unless a power loss, reset, or a call to + * USBPhy::endpoint_abort occurs first. + * * A call to USBPhy::endpoint_read results in the call of USBPhyEvents::out + * when the pc sends data unless a power loss, reset, or a call to + * USBPhy::endpoint_abort occurs first. + * * Endpoint 0 naks all transactions aside from setup packets until + * higher-level code calls one of USBPhy::ep0_read, USBPhy::ep0_write or + * USBPhy::ep0_stall. + * * Endpoint 0 stall automatically clears on reception of a setup packet. * * # Undefined behavior - * * Calling USBPhy::endpoint_add or USBPhy::endpoint_remove outside of the control requests SetInterface or SetConfiguration - * * Devices behavior is undefined if latency is greater than 2ms when address is being set - see USB spec 9.2.6.3 - * * Devices behavior is undefined if latency is greater than 10ms when a reset occurs - see USB spec 7.1.7.5 - * * Calling any of the USBPhy::endpoint_* functions on endpoint 0 + * * Calling USBPhy::endpoint_add or USBPhy::endpoint_remove outside of the + * control requests SetInterface or SetConfiguration. + * * Calling USBPhy::endpoint_remove on an endpoint that has an ongoing read + * or write operation. To avoid undefined behavior, you must abort ongoing + * operations with USBPhy::endpoint_abort. + * * Devices behavior is undefined if latency is greater than 2ms when address + * is being set - see USB spec 9.2.6.3. + * * Devices behavior is undefined if latency is greater than 10ms when a + * reset occurs - see USB spec 7.1.7.5. + * * Calling any of the USBPhy::endpoint_* functions on endpoint 0. * * # Notes - * * Make sure USB packets are processed in the correct order when multiple packets are present. - * Typically IN endpoints should be handled before OUT endpoints if both are pending. - * * Setup packets may be resent if there is noise on the USB line. The USBPhy should be able - * to gracefully handle this scenario and respond to the setup packet with an ACK. - * * Bi-directional protocols making use of alternating IN and OUT phases should not rely - * on the last ACK an IN transfer to indicate that the OUT phase should start. Instead, - * the OUT phase should be started at the same time the last IN transfer is started. This - * is because the ACK to the last in transfer may be dropped if there is noise on the USB - * line. If dropped it will only get re-sent on the next IN phase. More info on this can be - * found in section 8.5.3.3 of the USB spec. + * * Make sure USBPhy sends USBPhyEvents in the correct order when multiple + * packets are present. USBPhy must send IN endpoint events before OUT + * endpoint events if both are pending. + * * A host PC may resend setup packets to a USB device if there is noise on + * the USB line. The USBPhy should be able to handle this scenario and + * respond to the setup packet with an ACK. + * * Bidirectional protocols making use of alternating IN and OUT phases + * should not rely on the last ACK an IN transfer to indicate that the + * OUT phase should start. Instead, the OUT phase should be started at + * the same time the last IN transfer is started. This is because the ACK + * to the last in transfer may be dropped if there is noise on the USB + * line. If dropped, it will only be resent on the next IN phase. You can + * find more information on this in section 8.5.3.3 of the USB + * specification. * * @ingroup usb_device_core */ From 20d7b374c4d64909344f0ae49aa58244b19d91cd Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 2 Mar 2018 17:13:11 -0600 Subject: [PATCH 151/488] Add USB utility classes Add an allocation free linked list implementation. Additionally add the class AsyncOp which provides blocking and wakeup funcionality to simplify making asynchronous operations block. --- usb/device/utilities/AsyncOp.cpp | 84 +++++++++++++++++++++++++ usb/device/utilities/AsyncOp.h | 62 ++++++++++++++++++ usb/device/utilities/LinkEntry.h | 35 +++++++++++ usb/device/utilities/LinkedList.h | 60 ++++++++++++++++++ usb/device/utilities/LinkedListBase.cpp | 84 +++++++++++++++++++++++++ usb/device/utilities/LinkedListBase.h | 60 ++++++++++++++++++ 6 files changed, 385 insertions(+) create mode 100644 usb/device/utilities/AsyncOp.cpp create mode 100644 usb/device/utilities/AsyncOp.h create mode 100644 usb/device/utilities/LinkEntry.h create mode 100644 usb/device/utilities/LinkedList.h create mode 100644 usb/device/utilities/LinkedListBase.cpp create mode 100644 usb/device/utilities/LinkedListBase.h diff --git a/usb/device/utilities/AsyncOp.cpp b/usb/device/utilities/AsyncOp.cpp new file mode 100644 index 00000000000..5f6939be2c9 --- /dev/null +++ b/usb/device/utilities/AsyncOp.cpp @@ -0,0 +1,84 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "AsyncOp.h" +#include "mbed_critical.h" + +using namespace rtos; + +AsyncOp::AsyncOp(Mutex *lock): _list(NULL), _signal(NULL), _signal_lock(lock) +{ + +} + +void AsyncOp::start(LinkedListBase *list) +{ + _lock(); + _list = list; + list->enqueue(this); + _unlock(); +} + +void AsyncOp::wait() +{ + if (_list == NULL) { + // Event either hasn't start or has already occurred + return; + } + + // Construct semaphore to wait on + Semaphore sem(0); + + // Atomically set the semaphore pointer and + // check for completion + _lock(); + bool done = _list == NULL; + _signal = &sem; + _unlock(); + + if (!done) { + sem.wait(); + } +} + +void AsyncOp::complete() +{ + _lock(); + _list->remove(this); + _list = NULL; + if (_signal != NULL) { + _signal->release(); + } + _unlock(); +} + +void AsyncOp::_lock() +{ + if (_signal_lock) { + _signal_lock->lock(); + } else { + core_util_critical_section_enter(); + } +} + +void AsyncOp::_unlock() +{ + if (_signal_lock) { + _signal_lock->unlock(); + } else { + core_util_critical_section_exit(); + } +} diff --git a/usb/device/utilities/AsyncOp.h b/usb/device/utilities/AsyncOp.h new file mode 100644 index 00000000000..be28c28cde1 --- /dev/null +++ b/usb/device/utilities/AsyncOp.h @@ -0,0 +1,62 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_ASYNC_OP_H +#define MBED_ASYNC_OP_H + +#include "Mutex.h" +#include "Semaphore.h" + +#include "LinkEntry.h" +#include "LinkedListBase.h" + +class AsyncOp: public LinkEntry { +public: + /** + * Construct a new AsyncOp object + * + * @param lock Mutex used to serialize the object or code calling complete + * or NULL if a critical section is used + */ + AsyncOp(rtos::Mutex *lock); + + /** + * Add this operation to the linked list to start it + */ + void start(LinkedListBase *list); + + /** + * Wait for this asynchronous operation to complete + */ + void wait(); + + /** + * Mark this asynchronous operation as complete + * + * This wake the thread calling wait() + */ + void complete(); + +private: + void _lock(); + void _unlock(); + + LinkedListBase *_list; + rtos::Semaphore *_signal; + rtos::Mutex *const _signal_lock; +}; + +#endif diff --git a/usb/device/utilities/LinkEntry.h b/usb/device/utilities/LinkEntry.h new file mode 100644 index 00000000000..c74a7c4b76d --- /dev/null +++ b/usb/device/utilities/LinkEntry.h @@ -0,0 +1,35 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_LINKED_ENTRY_H +#define MBED_LINKED_ENTRY_H + +#include + +class LinkEntry { +public: + LinkEntry(): _next(NULL) + { + + } + +private: + friend class LinkedListBase; + LinkEntry *_next; +}; + + +#endif diff --git a/usb/device/utilities/LinkedList.h b/usb/device/utilities/LinkedList.h new file mode 100644 index 00000000000..41a6f35d7ee --- /dev/null +++ b/usb/device/utilities/LinkedList.h @@ -0,0 +1,60 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_LINKED_LIST_H +#define MBED_LINKED_LIST_H + +#include "LinkEntry.h" +#include "LinkedListBase.h" + +template +class LinkedList: public LinkedListBase { +public: + LinkedList() {} + ~LinkedList() {} + + /** + * Return the element at the head of the list + * + * @return The element at the head of the list or NULL if the list is empty + */ + T *head() + { + return static_cast(LinkedListBase::head()); + } + + /** + * Add an element to the tail of the list + * + * @param entry New element to add + */ + void enqueue(T *entry) + { + LinkedListBase::enqueue(static_cast(entry)); + } + + /** + * Remove the element at the head of the list + * + * @return The element at the head of the list or NULL if the list is empty + */ + T *dequeue() + { + return static_cast(LinkedListBase::dequeue()); + } +}; + +#endif diff --git a/usb/device/utilities/LinkedListBase.cpp b/usb/device/utilities/LinkedListBase.cpp new file mode 100644 index 00000000000..f66a27aaed7 --- /dev/null +++ b/usb/device/utilities/LinkedListBase.cpp @@ -0,0 +1,84 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "LinkedList.h" +#include "LinkEntry.h" +#include "mbed_assert.h" + +LinkedListBase::LinkedListBase(): _head(0), _tail(0) +{ + +} + +LinkedListBase::~LinkedListBase() +{ + +} + +LinkEntry *LinkedListBase::head() +{ + return _head; +} + +void LinkedListBase::enqueue(LinkEntry *entry) +{ + entry->_next = NULL; + if (_tail == NULL) { + _head = entry; + } else { + _tail->_next = entry; + } + _tail = entry; +} + +LinkEntry *LinkedListBase::dequeue() +{ + if (_head == NULL) { + return NULL; + } + if (_head->_next == NULL) { + _tail = NULL; + } + LinkEntry *entry = _head; + _head = _head->_next; + entry->_next = NULL; + return entry; +} + +void LinkedListBase::remove(LinkEntry *entry) +{ + LinkEntry *prev = NULL; + LinkEntry *cur = _head; + while (cur != entry) { + if (cur == NULL) { + // Element is not in the list + return; + } + prev = cur; + cur = cur->_next; + } + + if (prev != NULL) { + prev->_next = entry->_next; + } + if (entry == _head) { + _head = entry->_next; + } + if (entry == _tail) { + _tail = prev; + } + entry->_next = NULL; +} diff --git a/usb/device/utilities/LinkedListBase.h b/usb/device/utilities/LinkedListBase.h new file mode 100644 index 00000000000..c778f45bd6c --- /dev/null +++ b/usb/device/utilities/LinkedListBase.h @@ -0,0 +1,60 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_LINKED_LIST_BASE_H +#define MBED_LINKED_LIST_BASE_H + +#include "LinkEntry.h" + +class LinkedListBase { +public: + LinkedListBase(); + ~LinkedListBase(); + + /** + * Return the element at the head of the list + * + * @return The element at the head of the list or NULL if the list is empty + */ + LinkEntry *head(); + + /** + * Add an element to the tail of the list + * + * @param entry New element to add + */ + void enqueue(LinkEntry *entry); + + /** + * Remove the element at the head of the list + * + * @return The element at the head of the list or NULL if the list is empty + */ + LinkEntry *dequeue(); + + /** + * Remove the specified element if it is in the list + * + * @param entry Element to remove from the list + */ + void remove(LinkEntry *entry); + +private: + LinkEntry *_head; + LinkEntry *_tail; +}; + +#endif From ace008a1a50d43c44bc7f10e870fe2d7e3a59549 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 16 Mar 2018 23:50:03 -0500 Subject: [PATCH 152/488] Update USBCDC and USBSerial Update the USBCDC and USBSerial classes to the new API. This patch also updates the blocking behavior to unblock at the appropriate times and to let the processor sleep when blocking rather than busy waiting. --- usb/device/USBSerial/USBCDC.cpp | 641 +++++++++++++++++++++++++++++ usb/device/USBSerial/USBCDC.h | 203 +++++++++ usb/device/USBSerial/USBSerial.cpp | 61 +++ usb/device/USBSerial/USBSerial.h | 205 +++++++++ 4 files changed, 1110 insertions(+) create mode 100644 usb/device/USBSerial/USBCDC.cpp create mode 100644 usb/device/USBSerial/USBCDC.h create mode 100644 usb/device/USBSerial/USBSerial.cpp create mode 100644 usb/device/USBSerial/USBSerial.h diff --git a/usb/device/USBSerial/USBCDC.cpp b/usb/device/USBSerial/USBCDC.cpp new file mode 100644 index 00000000000..519ebe72182 --- /dev/null +++ b/usb/device/USBSerial/USBCDC.cpp @@ -0,0 +1,641 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBCDC.h" +#include "EndpointResolver.h" +#include "AsyncOp.h" + +static const uint8_t cdc_line_coding_default[7] = {0x80, 0x25, 0x00, 0x00, 0x00, 0x00, 0x08}; + +#define DEFAULT_CONFIGURATION (1) + +#define CDC_SET_LINE_CODING 0x20 +#define CDC_GET_LINE_CODING 0x21 +#define CDC_SET_CONTROL_LINE_STATE 0x22 + +// Control Line State bits +#define CLS_DTR (1 << 0) +#define CLS_RTS (1 << 1) + +#define CDC_MAX_PACKET_SIZE 64 + +class USBCDC::AsyncWrite: public AsyncOp { +public: + AsyncWrite(uint8_t *buf, uint32_t size): AsyncOp(NULL), tx_buf(buf), tx_size(size), result(false) + { + + } + uint8_t *tx_buf; + uint32_t tx_size; + bool result; +}; + +class USBCDC::AsyncRead: public AsyncOp { +public: + AsyncRead(uint8_t *buf, uint32_t size, uint32_t *size_read, bool read_all) + : AsyncOp(NULL), rx_buf(buf), rx_size(size), rx_actual(size_read), all(read_all), result(false) + { + + } + uint8_t *rx_buf; + uint32_t rx_size; + uint32_t *rx_actual; + bool all; + bool result; +}; + +USBCDC::USBCDC(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking) + : USBDevice(vendor_id, product_id, product_release) + +{ + _init(connect_blocking); +} + +USBCDC::USBCDC(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking) + : USBDevice(phy, vendor_id, product_id, product_release) +{ + _init(connect_blocking); +} + +void USBCDC::_init(bool connect_blocking) +{ + memcpy(_cdc_line_coding, cdc_line_coding_default, sizeof(_cdc_line_coding)); + + EndpointResolver resolver(endpoint_table()); + resolver.endpoint_ctrl(CDC_MAX_PACKET_SIZE); + _bulk_in = resolver.endpoint_in(USB_EP_TYPE_BULK, CDC_MAX_PACKET_SIZE); + _bulk_out = resolver.endpoint_out(USB_EP_TYPE_BULK, CDC_MAX_PACKET_SIZE); + _int_in = resolver.endpoint_in(USB_EP_TYPE_INT, CDC_MAX_PACKET_SIZE); + MBED_ASSERT(resolver.valid()); + + _terminal_connected = false; + + _tx_in_progress = false; + _tx_buf = _tx_buffer; + _tx_size = 0; + + _rx_in_progress = false; + _rx_buf = _rx_buffer; + _rx_size = 0; + + init(); + + USBDevice::connect(false); + if (connect_blocking) { + wait_connected(); + } +} + +void USBCDC::callback_reset() +{ + assert_locked(); + /* Called in ISR context */ + + _change_terminal_connected(false); +}; + +void USBCDC::callback_state_change(DeviceState new_state) +{ + assert_locked(); + /* Called in ISR context */ + + if (new_state != Configured) { + _change_terminal_connected(false); + } +} + +void USBCDC::callback_request(const setup_packet_t *setup) +{ + assert_locked(); + /* Called in ISR context */ + + RequestResult result = PassThrough; + uint8_t *data = NULL; + uint32_t size = 0; + + /* Only process class-specific requests */ + if (setup->bmRequestType.Type == CLASS_TYPE) { + switch (setup->bRequest) { + case CDC_GET_LINE_CODING: + result = Send; + data = _cdc_line_coding; + size = 7; + break; + case CDC_SET_LINE_CODING: + result = Receive; + data = _cdc_new_line_coding; + size = 7; + break; + case CDC_SET_CONTROL_LINE_STATE: + if (setup->wValue & CLS_DTR) { + _change_terminal_connected(true); + } else { + _change_terminal_connected(false); + } + result = Success; + break; + default: + result = Failure; + break; + } + } + complete_request(result, data, size); +} + + +void USBCDC::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) +{ + assert_locked(); + /* Called in ISR context */ + + if (aborted) { + complete_request_xfer_done(false); + return; + } + + bool success = false; + + /* Process class-specific requests */ + if (setup->bmRequestType.Type == CLASS_TYPE) { + if ((setup->bRequest == CDC_SET_LINE_CODING) && (setup->wLength == 7)) { + if (memcmp(_cdc_line_coding, _cdc_new_line_coding, 7)) { + memcpy(_cdc_line_coding, _cdc_new_line_coding, 7); + + const uint8_t *buf = _cdc_line_coding; + int baud = buf[0] + (buf[1] << 8) + + (buf[2] << 16) + (buf[3] << 24); + int stop = buf[4]; + int bits = buf[6]; + int parity = buf[5]; + + line_coding_changed(baud, bits, parity, stop); + } + success = true; + } + if (setup->bRequest == CDC_GET_LINE_CODING) { + success = true; + } + } + + complete_request_xfer_done(success); +} + +void USBCDC::callback_set_configuration(uint8_t configuration) +{ + assert_locked(); + /* Called in ISR context */ + + bool ret = false; + if (configuration == DEFAULT_CONFIGURATION) { + // Configure endpoints > 0 + endpoint_add(_int_in, CDC_MAX_PACKET_SIZE, USB_EP_TYPE_INT); + endpoint_add(_bulk_in, CDC_MAX_PACKET_SIZE, USB_EP_TYPE_BULK, &USBCDC::_send_isr); + endpoint_add(_bulk_out, CDC_MAX_PACKET_SIZE, USB_EP_TYPE_BULK, &USBCDC::_receive_isr); + + read_start(_bulk_out, _rx_buf, sizeof(_rx_buffer)); + _rx_in_progress = true; + + ret = true; + } + + complete_set_configuration(ret); +} + +void USBCDC::callback_set_interface(uint16_t interface, uint8_t alternate) +{ + assert_locked(); + complete_set_interface(true); +} + +void USBCDC::_change_terminal_connected(bool connected) +{ + assert_locked(); + + if (connected) { + _connect_wake_all(); + } else { + _send_abort_all(); + _receive_abort_all(); + } + _terminal_connected = connected; +} + +void USBCDC::wait_connected() +{ + lock(); + + AsyncOp wait_op(NULL); + wait_op.start(&_connected_list); + if (_terminal_connected) { + wait_op.complete(); + } + + unlock(); + + wait_op.wait(); +} + +void USBCDC::_connect_wake_all() +{ + AsyncOp *wait_op = _connected_list.head(); + while (wait_op != NULL) { + wait_op->complete(); + wait_op = _connected_list.head(); + } +} + +bool USBCDC::send(uint8_t *buffer, uint32_t size) +{ + lock(); + + if (!_terminal_connected) { + unlock(); + return false; + } + AsyncWrite write_op(buffer, size); + write_op.start(&_tx_list); + _send_next(); + + unlock(); + + write_op.wait(); + return write_op.result; +} + +void USBCDC::_send_next() +{ + assert_locked(); + + uint32_t actual_size; + do { + // Set current TX operation or return if there are none left + AsyncWrite *tx_cur = _tx_list.head(); + if (tx_cur == NULL) { + break; + } + + actual_size = 0; + send_nb(tx_cur->tx_buf, tx_cur->tx_size, &actual_size, false); + tx_cur->tx_size -= actual_size; + tx_cur->tx_buf += actual_size; + if (tx_cur->tx_size == 0) { + tx_cur->result = true; + tx_cur->complete(); + } + } while (actual_size > 0); + + // Start transfer if it hasn't been + _send_isr_start(); +} + +void USBCDC::_send_abort_all() +{ + assert_locked(); + + if (_tx_in_progress) { + endpoint_abort(_bulk_in); + _tx_in_progress = false; + } + _tx_buf = _tx_buffer; + _tx_size = 0; + + AsyncWrite *tx_cur = _tx_list.head(); + while (tx_cur != NULL) { + tx_cur->result = false; + tx_cur->complete(); + tx_cur = _tx_list.head(); + } +} + +void USBCDC::send_nb(uint8_t *buffer, uint32_t size, uint32_t *actual, bool now) +{ + lock(); + + *actual = 0; + if (_terminal_connected && !_tx_in_progress) { + uint32_t free = sizeof(_tx_buffer) - _tx_size; + uint32_t write_size = free > size ? size : free; + if (size > 0) { + memcpy(_tx_buf, buffer, write_size); + } + _tx_size += write_size; + *actual = write_size; + if (now) { + _send_isr_start(); + } + } + + unlock(); +} + + +void USBCDC::_send_isr_start() +{ + assert_locked(); + + if (!_tx_in_progress && _tx_size) { + if (USBDevice::write_start(_bulk_in, _tx_buffer, _tx_size)) { + _tx_in_progress = true; + } + } +} + +/* +* Called by when CDC data is sent +* Warning: Called in ISR +*/ +void USBCDC::_send_isr(usb_ep_t endpoint) +{ + assert_locked(); + + write_finish(endpoint); + _tx_buf = _tx_buffer; + _tx_size = 0; + _tx_in_progress = false; + + _send_next(); + if (!_tx_in_progress) { + data_tx(); + } +} + +bool USBCDC::receive(uint8_t *buffer, uint32_t size, uint32_t *size_read) +{ + lock(); + + if (!_terminal_connected) { + unlock(); + return false; + } + bool read_all = size_read == NULL; + uint32_t size_read_dummy; + uint32_t *size_read_ptr = read_all ? &size_read_dummy : size_read; + *size_read_ptr = 0; + AsyncRead read_op(buffer, size, size_read_ptr, read_all); + read_op.start(&_rx_list); + _receive_next(); + + unlock(); + + read_op.wait(); + return read_op.result; +} + +void USBCDC::_receive_next() +{ + assert_locked(); + + uint32_t actual_size; + do { + // Set current RX operation or return if there are none left + AsyncRead *rx_cur = _rx_list.head(); + if (rx_cur == NULL) { + break; + } + + actual_size = 0; + receive_nb(rx_cur->rx_buf, rx_cur->rx_size, &actual_size); + rx_cur->rx_buf += actual_size; + *rx_cur->rx_actual += actual_size; + rx_cur->rx_size -= actual_size; + if ((!rx_cur->all && *rx_cur->rx_actual > 0) || (rx_cur->rx_size == 0)) { + // Wake thread if request is done + rx_cur->result = true; + rx_cur->complete(); + rx_cur = NULL; + } + } while (actual_size > 0); + + _receive_isr_start(); + +} + +void USBCDC::_receive_abort_all() +{ + assert_locked(); + + if (_rx_in_progress) { + endpoint_abort(_bulk_in); + _rx_in_progress = false; + } + _rx_buf = _rx_buffer; + _rx_size = 0; + + AsyncRead *rx_cur = _rx_list.head(); + while (rx_cur != NULL) { + rx_cur->result = false; + rx_cur->complete(); + rx_cur = _rx_list.head(); + } +} + +void USBCDC::receive_nb(uint8_t *buffer, uint32_t size, uint32_t *size_read) +{ + + *size_read = 0; + if (_terminal_connected && !_rx_in_progress) { + // Copy data over + uint32_t copy_size = _rx_size > size ? size : _rx_size; + memcpy(buffer, _rx_buf, copy_size); + *size_read = copy_size; + _rx_buf += copy_size; + _rx_size -= copy_size; + if (_rx_size == 0) { + _receive_isr_start(); + } + } +} + +void USBCDC::_receive_isr_start() +{ + if ((_rx_size == 0) && !_rx_in_progress) { + // Refill the buffer + read_start(_bulk_out, _rx_buffer, sizeof(_rx_buffer)); + _rx_in_progress = true; + } +} + +/* +* Called by when CDC data is received +* Warning: Called in ISR +*/ +void USBCDC::_receive_isr(usb_ep_t endpoint) +{ + assert_locked(); + + MBED_ASSERT(_rx_size == 0); + _rx_buf = _rx_buffer; + _rx_size = read_finish(_bulk_out); + _rx_in_progress = false; + _receive_next(); + if (!_rx_in_progress) { + data_rx(); + } + +} + +const uint8_t *USBCDC::device_desc() +{ + uint8_t ep0_size = endpoint_max_packet_size(0x00); + uint8_t device_descriptor_temp[] = { + 18, // bLength + 1, // bDescriptorType + 0x10, 0x01, // bcdUSB + 2, // bDeviceClass + 0, // bDeviceSubClass + 0, // bDeviceProtocol + ep0_size, // bMaxPacketSize0 + (uint8_t)(LSB(vendor_id)), (uint8_t)(MSB(vendor_id)), // idVendor + (uint8_t)(LSB(product_id)), (uint8_t)(MSB(product_id)),// idProduct + 0x00, 0x01, // bcdDevice + 1, // iManufacturer + 2, // iProduct + 3, // iSerialNumber + 1 // bNumConfigurations + }; + MBED_ASSERT(sizeof(device_descriptor_temp) == sizeof(device_descriptor)); + memcpy(device_descriptor, device_descriptor_temp, sizeof(device_descriptor)); + return device_descriptor; +} + +const uint8_t *USBCDC::string_iinterface_desc() +{ + static const uint8_t stringIinterfaceDescriptor[] = { + 0x08, + STRING_DESCRIPTOR, + 'C', 0, 'D', 0, 'C', 0, + }; + return stringIinterfaceDescriptor; +} + +const uint8_t *USBCDC::string_iproduct_desc() +{ + static const uint8_t stringIproductDescriptor[] = { + 0x16, + STRING_DESCRIPTOR, + 'C', 0, 'D', 0, 'C', 0, ' ', 0, 'D', 0, 'E', 0, 'V', 0, 'I', 0, 'C', 0, 'E', 0 + }; + return stringIproductDescriptor; +} + + +#define CONFIG1_DESC_SIZE (9+8+9+5+5+4+5+7+9+7+7) + +const uint8_t *USBCDC::configuration_desc() +{ + uint8_t config_descriptor_temp[] = { + // configuration descriptor + 9, // bLength + 2, // bDescriptorType + LSB(CONFIG1_DESC_SIZE), // wTotalLength + MSB(CONFIG1_DESC_SIZE), + 2, // bNumInterfaces + 1, // bConfigurationValue + 0, // iConfiguration + 0x80, // bmAttributes + 50, // bMaxPower + + // IAD to associate the two CDC interfaces + 0x08, // bLength + 0x0b, // bDescriptorType + 0x00, // bFirstInterface + 0x02, // bInterfaceCount + 0x02, // bFunctionClass + 0x02, // bFunctionSubClass + 0, // bFunctionProtocol + 0, // iFunction + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + 9, // bLength + 4, // bDescriptorType + 0, // bInterfaceNumber + 0, // bAlternateSetting + 1, // bNumEndpoints + 0x02, // bInterfaceClass + 0x02, // bInterfaceSubClass + 0x01, // bInterfaceProtocol + 0, // iInterface + + // CDC Header Functional Descriptor, CDC Spec 5.2.3.1, Table 26 + 5, // bFunctionLength + 0x24, // bDescriptorType + 0x00, // bDescriptorSubtype + 0x10, 0x01, // bcdCDC + + // Call Management Functional Descriptor, CDC Spec 5.2.3.2, Table 27 + 5, // bFunctionLength + 0x24, // bDescriptorType + 0x01, // bDescriptorSubtype + 0x03, // bmCapabilities + 1, // bDataInterface + + // Abstract Control Management Functional Descriptor, CDC Spec 5.2.3.3, Table 28 + 4, // bFunctionLength + 0x24, // bDescriptorType + 0x02, // bDescriptorSubtype + 0x06, // bmCapabilities + + // Union Functional Descriptor, CDC Spec 5.2.3.8, Table 33 + 5, // bFunctionLength + 0x24, // bDescriptorType + 0x06, // bDescriptorSubtype + 0, // bMasterInterface + 1, // bSlaveInterface0 + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _int_in, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=intr) + LSB(CDC_MAX_PACKET_SIZE), // wMaxPacketSize (LSB) + MSB(CDC_MAX_PACKET_SIZE), // wMaxPacketSize (MSB) + 16, // bInterval + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + 9, // bLength + 4, // bDescriptorType + 1, // bInterfaceNumber + 0, // bAlternateSetting + 2, // bNumEndpoints + 0x0A, // bInterfaceClass + 0x00, // bInterfaceSubClass + 0x00, // bInterfaceProtocol + 0, // iInterface + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _bulk_in, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(CDC_MAX_PACKET_SIZE), // wMaxPacketSize (LSB) + MSB(CDC_MAX_PACKET_SIZE), // wMaxPacketSize (MSB) + 0, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _bulk_out, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(CDC_MAX_PACKET_SIZE), // wMaxPacketSize (LSB) + MSB(CDC_MAX_PACKET_SIZE), // wMaxPacketSize (MSB) + 0 // bInterval + }; + + MBED_ASSERT(sizeof(config_descriptor_temp) == sizeof(_config_descriptor)); + memcpy(_config_descriptor, config_descriptor_temp, sizeof(_config_descriptor)); + return _config_descriptor; +} diff --git a/usb/device/USBSerial/USBCDC.h b/usb/device/USBSerial/USBCDC.h new file mode 100644 index 00000000000..1c3c6dc3816 --- /dev/null +++ b/usb/device/USBSerial/USBCDC.h @@ -0,0 +1,203 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBCDC_H +#define USBCDC_H + +/* These headers are included for child class. */ +#include "USBDescriptor.h" +#include "USBDevice_Types.h" + +#include "USBDevice.h" +#include "LinkedList.h" + +class AsyncOp; + +class USBCDC: public USBDevice { +public: + + /* + * Constructor + * + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your preoduct_release + * @param connect_blocking define if the connection must be blocked if USB not plugged in + */ + USBCDC(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); + + /* + * Constructor + * + * @param phy USB phy to use + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your preoduct_release + * @param connect_blocking define if the connection must be blocked if USB not plugged in + */ + USBCDC(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); + + /** + * Block until the terminal is connected + */ + void wait_connected(); + + /* + * Send a buffer + * + * This function blocks until the full contents have been sent. + * + * @param buffer buffer to be sent + * @param size length of the buffer + * @returns true if successful false if interrupted due to a state change + */ + bool send(uint8_t *buffer, uint32_t size); + + /** + * Send what there is room for + * + * @param buffer data to send + * @param size maximum number of bytes to send + * @param actual a pointer to where to store the number of bytes sent + * @param now true to start data transmission, false to wait + */ + void send_nb(uint8_t *buffer, uint32_t size, uint32_t *actual, bool now = true); + + /* + * Read a buffer from a certain endpoint. Warning: blocking + * + * Blocks until at least one byte of data has been read (actual != NULL) or + * until the full size has been read (actual == NULL). + * + * @param buffer buffer where will be stored bytes + * @param size the maximum number of bytes to read + * @param actual A pointer to where to store the number of bytes actually read + * or NULL to read the full size + * @returns true if successful false if interrupted due to a state change + */ + bool receive(uint8_t *buffer, uint32_t size, uint32_t *actual=NULL); + + /** + * Read from the receive buffer + * + * @param buffer buffer to fill with data + * @param size maximum number of bytes read + * @param actual a pointer to where to store the number of bytes actually received + */ + void receive_nb(uint8_t *buffer, uint32_t size, uint32_t *actual); + +protected: + /* + * Get device descriptor. Warning: this method has to store the length of the report descriptor in reportLength. + * + * @returns pointer to the device descriptor + */ + virtual const uint8_t *device_desc(); + + /* + * Get string product descriptor + * + * @returns pointer to the string product descriptor + */ + virtual const uint8_t *string_iproduct_desc(); + + /* + * Get string interface descriptor + * + * @returns pointer to the string interface descriptor + */ + virtual const uint8_t *string_iinterface_desc(); + + /* + * Get configuration descriptor + * + * @returns pointer to the configuration descriptor + */ + virtual const uint8_t *configuration_desc(); + + /* + * Called by USBCallback_requestCompleted when CDC line coding is changed + * Warning: Called in ISR + * + * @param baud The baud rate + * @param bits The number of bits in a word (5-8) + * @param parity The parity + * @param stop The number of stop bits (1 or 2) + */ + virtual void line_coding_changed(int baud, int bits, int parity, int stop) {}; + + /* + * Called when there is data that can be read + */ + virtual void data_rx() {} + + /* + * Called when there is space in the TX buffer + */ + virtual void data_tx() {} + +protected: + + class AsyncWrite; + class AsyncRead; + + virtual void callback_reset(); + virtual void callback_state_change(DeviceState new_state); + virtual void callback_request(const setup_packet_t *setup); + virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); + virtual void callback_set_configuration(uint8_t configuration); + virtual void callback_set_interface(uint16_t interface, uint8_t alternate); + + void _init(bool connect_blocking); + + void _change_terminal_connected(bool connected); + void _connect_wake_all(); + + void _send_next(); + void _send_abort_all(); + void _send_isr_start(); + void _send_isr(usb_ep_t endpoint); + + void _receive_next(); + void _receive_abort_all(); + void _receive_isr_start(); + void _receive_isr(usb_ep_t endpoint); + + usb_ep_t _bulk_in; + usb_ep_t _bulk_out; + usb_ep_t _int_in; + + uint8_t _cdc_line_coding[7]; + uint8_t _cdc_new_line_coding[7]; + uint8_t _config_descriptor[75]; + + LinkedList _connected_list; + bool _terminal_connected; + + LinkedList _tx_list; + bool _tx_in_progress; + uint8_t _tx_buffer[64]; + uint8_t *_tx_buf; + uint32_t _tx_size; + + LinkedList _rx_list; + bool _rx_in_progress; + uint8_t _rx_buffer[64]; + uint8_t *_rx_buf; + uint32_t _rx_size; +}; + +#endif diff --git a/usb/device/USBSerial/USBSerial.cpp b/usb/device/USBSerial/USBSerial.cpp new file mode 100644 index 00000000000..376c8b8de24 --- /dev/null +++ b/usb/device/USBSerial/USBSerial.cpp @@ -0,0 +1,61 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBSerial.h" + +int USBSerial::_putc(int c) +{ + return send((uint8_t *)&c, 1) ? 1 : 0; +} + +int USBSerial::_getc() +{ + uint8_t c = 0; + if (receive(&c, sizeof(c))) { + return c; + } else { + return -1; + } +} + +void USBSerial::data_rx() +{ + assert_locked(); + + //call a potential handler + if (rx) { + rx.call(); + } +} + +uint8_t USBSerial::available() +{ + USBCDC::lock(); + + uint8_t size = 0; + if (!_rx_in_progress) { + size = _rx_size > 0xFF ? 0xFF : _rx_size; + } + + USBCDC::unlock(); + return size; +} + +bool USBSerial::connected() +{ + return _terminal_connected; +} diff --git a/usb/device/USBSerial/USBSerial.h b/usb/device/USBSerial/USBSerial.h new file mode 100644 index 00000000000..b3344b4a6e1 --- /dev/null +++ b/usb/device/USBSerial/USBSerial.h @@ -0,0 +1,205 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBSERIAL_H +#define USBSERIAL_H + +#include "USBCDC.h" +#include "Stream.h" +#include "Callback.h" + +/** +* USBSerial example +* +* @code +* #include "mbed.h" +* #include "USBSerial.h" +* +* //Virtual serial port over USB +* USBSerial serial; +* +* int main(void) { +* +* while(1) +* { +* serial.printf("I am a virtual serial port\n"); +* wait(1); +* } +* } +* @endcode +*/ +class USBSerial: public USBCDC, public Stream { +public: + + /** + * Constructor + * + * @param vendor_id Your vendor_id (default: 0x1f00) + * @param product_id Your product_id (default: 0x2012) + * @param product_release Your preoduct_release (default: 0x0001) + * @param connect_blocking define if the connection must be blocked if USB not plugged in + * + */ + USBSerial(uint16_t vendor_id = 0x1f00, uint16_t product_id = 0x2012, uint16_t product_release = 0x0001, bool connect_blocking = true): USBCDC(vendor_id, product_id, product_release, connect_blocking) + { + _settings_changed_callback = 0; + }; + + /** + * Constructor + * + * @param phy USB phy to use + * @param vendor_id Your vendor_id (default: 0x1f00) + * @param product_id Your product_id (default: 0x2012) + * @param product_release Your preoduct_release (default: 0x0001) + * @param connect_blocking define if the connection must be blocked if USB not plugged in + * + */ + USBSerial(USBPhy *phy, uint16_t vendor_id = 0x1f00, uint16_t product_id = 0x2012, uint16_t product_release = 0x0001, bool connect_blocking = true): USBCDC(phy, vendor_id, product_id, product_release, connect_blocking) + { + _settings_changed_callback = 0; + }; + + /** + * Send a character. You can use puts, printf. + * + * @param c character to be sent + * @returns true if there is no error, false otherwise + */ + virtual int _putc(int c); + + /** + * Read a character: blocking + * + * @returns character read + */ + virtual int _getc(); + + /** + * Check the number of bytes available. + * + * @returns the number of bytes available + */ + uint8_t available(); + + /** + * Check if the terminal is connected. + * + * @returns connection status + */ + bool connected(); + + /** Determine if there is a character available to read + * + * @returns + * 1 if there is a character available to read, + * 0 otherwise + */ + int readable() + { + return available() ? 1 : 0; + } + + /** Determine if there is space available to write a character + * + * @returns + * 1 if there is space to write a character, + * 0 otherwise + */ + int writeable() + { + return 1; // always return 1, for write operation is blocking + } + + /** + * Attach a member function to call when a packet is received. + * + * @param tptr pointer to the object to call the member function on + * @param mptr pointer to the member function to be called + */ + template + void attach(T *tptr, void (T::*mptr)(void)) + { + USBCDC::lock(); + + if ((mptr != NULL) && (tptr != NULL)) { + rx = Callback(mptr, tptr); + } + + USBCDC::unlock(); + } + + /** + * Attach a callback called when a packet is received + * + * @param fptr function pointer + */ + void attach(void (*fptr)(void)) + { + USBCDC::lock(); + + if (fptr != NULL) { + rx = Callback(fptr); + } + + USBCDC::unlock(); + } + + /** + * Attach a Callback called when a packet is received + * + * @param cb Callback to attach + */ + void attach(Callback &cb) + { + USBCDC::lock(); + + rx = cb; + + USBCDC::unlock(); + } + + /** + * Attach a callback to call when serial's settings are changed. + * + * @param fptr function pointer + */ + void attach(void (*fptr)(int baud, int bits, int parity, int stop)) + { + USBCDC::lock(); + + _settings_changed_callback = fptr; + + USBCDC::unlock(); + } + +protected: + virtual void data_rx(); + virtual void line_coding_changed(int baud, int bits, int parity, int stop) + { + assert_locked(); + + if (_settings_changed_callback) { + _settings_changed_callback(baud, bits, parity, stop); + } + } + +private: + Callback rx; + void (*_settings_changed_callback)(int baud, int bits, int parity, int stop); +}; + +#endif From 998fc9dec23cdc9b19091d27d5778276bf2c9916 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 20 Mar 2018 10:29:27 -0500 Subject: [PATCH 153/488] Remove the USB directory from mbed 2 travis Don't include the USB directory when testing mbed 2 on travis. --- .travis.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.travis.yml b/.travis.yml index 37d7617af37..1bf884fa66d 100644 --- a/.travis.yml +++ b/.travis.yml @@ -174,7 +174,7 @@ matrix: - python tools/make.py -t GCC_ARM -m K64F --source=. --build=BUILD/K64F/GCC_ARM -j0 # Check that example compiles without rtos - sed -n '/``` cpp/,/```/{/```$/Q;/```/d;p;}' $EVENTS/README.md > main.cpp - - rm -r rtos features/cellular features/netsocket features/nanostack features/lwipstack features/frameworks/greentea-client features/frameworks/utest features/frameworks/unity components BUILD + - rm -r rtos usb features/cellular features/netsocket features/nanostack features/lwipstack features/frameworks/greentea-client features/frameworks/utest features/frameworks/unity components BUILD - python tools/make.py -t GCC_ARM -m DISCO_F401VC --source=. --build=BUILD/DISCO_F401VC/GCC_ARM -j0 # Run local equeue tests - make -C $EVENTS/equeue test From a9883621f66dc1720be82dff6c9783853ffa2a95 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 19 Mar 2018 17:07:42 -0500 Subject: [PATCH 154/488] Fix Kinetis endpoint initialization Fully setup endpoint before enabling it in endpoint_add. This prevents undefined behavior due to previous configuration. --- targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp index 3c98280a2c2..55599a922e7 100644 --- a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp +++ b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp @@ -366,15 +366,14 @@ bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_ // IN endpt -> device to host (TX) if (DESC_EP_IN(endpoint)) { - USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) - USB_ENDPT_EPTXEN_MASK; // en TX (IN) tran bdt[EP_BDT_IDX(log_endpoint, TX, ODD )].address = (uint32_t) buf; + bdt[EP_BDT_IDX(log_endpoint, TX, ODD )].info = 0; bdt[EP_BDT_IDX(log_endpoint, TX, EVEN)].address = 0; + USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) + USB_ENDPT_EPTXEN_MASK; // en TX (IN) tran } // OUT endpt -> host to device (RX) else { - USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) - USB_ENDPT_EPRXEN_MASK; // en RX (OUT) tran. bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].byte_count = max_packet; bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].address = (uint32_t) buf; bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info = BD_DTS_MASK; @@ -383,6 +382,8 @@ bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_ // Prepare for setup packet bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info |= BD_OWN_MASK; } + USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) + USB_ENDPT_EPRXEN_MASK; // en RX (OUT) tran. } // First transfer will be a DATA0 packet From f54ad1dacd33b17da842dc6870006a15834cc1f4 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 20 Mar 2018 14:46:55 -0500 Subject: [PATCH 155/488] Correct Kinetis 256 byte ctrl transfers Correctly handle control transfers which are a multiple of 256 bytes by checking for a non-zero value in the upper byte of size. --- targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp index 55599a922e7..60ad7d7f1f2 100644 --- a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp +++ b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp @@ -483,7 +483,7 @@ bool USBPhyHw::endpoint_read_result_core(usb_ep_t endpoint, uint8_t *data, uint3 if (setup) { // Record the setup type - if (data[6] == 0) { + if ((data[6] == 0) && (data[7] == 0)) { ctrl_xfer = CTRL_XFER_NONE; } else { uint8_t in_xfer = (data[0] >> 7) & 1; From 44f720d7f4e49ce8d91c51d87a568af433c51eb6 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 20 Mar 2018 14:48:16 -0500 Subject: [PATCH 156/488] Limit USB control transfer size Limit the size of control reads to the max packet size of endpoint zero. This fixes the handling of large transfers. --- usb/device/USBDevice/USBDevice.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index da3617cedd4..611f91b1e1a 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -49,6 +49,8 @@ #endif #define MAX_PACKET_SIZE_EP0 64 +#define USB_MIN(a, b) ((a) > (b) ? (b) : (a)) + bool USBDevice::_request_get_descriptor() { @@ -224,7 +226,7 @@ bool USBDevice::_control_out() complete_request_xfer_done(true); } } else { - _phy->ep0_read(_transfer.ptr, _transfer.remaining); + _phy->ep0_read(_transfer.ptr, USB_MIN(_transfer.remaining, _max_packet_size_ep0)); } return true; @@ -800,7 +802,7 @@ void USBDevice::_control_setup_continue() } else { /* OUT stage */ _transfer.stage = DataOut; - _phy->ep0_read(_transfer.ptr, _transfer.remaining); + _phy->ep0_read(_transfer.ptr, USB_MIN(_transfer.remaining, _max_packet_size_ep0)); } } else { /* Status stage */ From af17f392485e67b09f886ead09438432d2e0fe50 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 20 Mar 2018 16:39:12 -0500 Subject: [PATCH 157/488] Disable endpoints when disconnecting on Kinetis Even thought the USB phy is disabled during disconnect, endpoints still nack packets sent. This patch disables all endpoints so after disconnect no USB traffic will be sent. This allows brief disconnects of ~200us (or more) to be reliably detected by the host PC. --- targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp index 60ad7d7f1f2..84c50d94b6c 100644 --- a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp +++ b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp @@ -195,6 +195,10 @@ void USBPhyHw::connect() void USBPhyHw::disconnect() { + // disable all endpoints to prevent them from nacking when disconnected + for(int i = 0; i < 16; i++) { + USB0->ENDPOINT[i].ENDPT = 0x00; + } // disable USB USB0->CTL &= ~USB_CTL_USBENSOFEN_MASK; // Pull up disable From 03eee0622ae64dee991f82bc90d9863731e0c159 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 20 Mar 2018 20:49:59 -0500 Subject: [PATCH 158/488] Improve LPC1768 USB stability Make the following changes to improve stability: -When disconnecting set address to disabled to prevent nacks -Clear EP_SLOW one and only once for every interrupt where it is set_address -Disable and clear control endpoint interrupts when disconnecting --- .../TARGET_LPC176X/usb/USBHAL_LPC17.cpp | 31 +++++++++++++------ 1 file changed, 22 insertions(+), 9 deletions(-) diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp index ef3a66ea831..d962235961a 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp +++ b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp @@ -161,11 +161,11 @@ static uint8_t SIEgetDeviceStatus(void) return SIEReadData(SIE_CMD_GET_DEVICE_STATUS); } -void SIEsetAddress(uint8_t address) +void SIEsetAddress(uint8_t address, bool enable=true) { // Write SIE device address register SIECommand(SIE_CMD_SET_ADDRESS); - SIEWriteData((address & 0x7f) | SIE_DSA_DEV_EN); + SIEWriteData((address & 0x7f) | (enable ? SIE_DSA_DEV_EN : 0)); } static uint8_t SIEselectEndpoint(uint8_t endpoint) @@ -402,8 +402,8 @@ void USBPhyHw::init(USBPhyEvents *events) // Enable interrupts for device events and EP0 LPC_USB->USBDevIntEn = EP_SLOW | DEV_STAT | FRAME; - enableEndpointEvent(EP0IN); - enableEndpointEvent(EP0OUT); + + NVIC_EnableIRQ(USB_IRQn); } void USBPhyHw::deinit() @@ -422,14 +422,28 @@ bool USBPhyHw::powered() void USBPhyHw::connect(void) { - NVIC_EnableIRQ(USB_IRQn); + enableEndpointEvent(EP0IN); + enableEndpointEvent(EP0OUT); + // Connect USB device SIEconnect(); } void USBPhyHw::disconnect(void) { - NVIC_DisableIRQ(USB_IRQn); + disableEndpointEvent(EP0IN); + disableEndpointEvent(EP0OUT); + + if (LPC_USB->USBEpIntSt & EP(EP0IN)) { + selectEndpointClearInterrupt(EP0IN); + } + if (LPC_USB->USBEpIntSt & EP(EP0OUT)) { + selectEndpointClearInterrupt(EP0OUT); + } + + // Turn off USB nacking + SIEsetAddress(0, false); + // Disconnect USB device SIEdisconnect(); } @@ -696,7 +710,6 @@ void USBPhyHw::process(void) // case of OUT as SETUP clobbers the OUT data). if (LPC_USB->USBEpIntSt & EP(EP0IN)) { selectEndpointClearInterrupt(EP0IN); - LPC_USB->USBDevIntClr = EP_SLOW; events->ep0_in(); } @@ -708,7 +721,6 @@ void USBPhyHw::process(void) } else { events->ep0_out(); } - LPC_USB->USBDevIntClr = EP_SLOW; } //TODO - should probably process in the reverse order @@ -717,7 +729,6 @@ void USBPhyHw::process(void) if (LPC_USB->USBEpIntSt & EP(endpoint)) { selectEndpointClearInterrupt(endpoint); epComplete |= EP(endpoint); - LPC_USB->USBDevIntClr = EP_SLOW; if (IN_EP(endpoint)) { events->in(endpoint); } else { @@ -726,6 +737,8 @@ void USBPhyHw::process(void) } } } + + LPC_USB->USBDevIntClr = EP_SLOW; } NVIC_ClearPendingIRQ(USB_IRQn); From ece77c0df09a0cf5d80b7c4d5a488d5f574b807d Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Tue, 13 Mar 2018 16:18:20 +0100 Subject: [PATCH 159/488] USB generic tests --- TESTS/host_tests/pyusb_basic.py | 781 ++++++++++++++++++++++++++- TESTS/usb_device/basic/USBTester.cpp | 61 ++- TESTS/usb_device/basic/USBTester.h | 22 + TESTS/usb_device/basic/main.cpp | 250 ++++++++- 4 files changed, 1086 insertions(+), 28 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 24c7e951455..ae6c164a327 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -20,6 +20,7 @@ from argparse import ArgumentParser import time import sys +import inspect from threading import Thread import usb.core @@ -28,6 +29,11 @@ from usb.util import CTRL_TYPE_STANDARD, CTRL_TYPE_CLASS, CTRL_TYPE_VENDOR from usb.util import (CTRL_RECIPIENT_DEVICE, CTRL_RECIPIENT_INTERFACE, CTRL_RECIPIENT_ENDPOINT, CTRL_RECIPIENT_OTHER) +from usb.util import (DESC_TYPE_DEVICE, DESC_TYPE_CONFIG, DESC_TYPE_STRING, + DESC_TYPE_INTERFACE, DESC_TYPE_ENDPOINT) + +import struct +from collections import namedtuple def get_interface(dev, interface, alternate=0): intf = None @@ -45,22 +51,218 @@ def get_interface(dev, interface, alternate=0): VENDOR_TEST_CTRL_NONE_DELAY = 6 VENDOR_TEST_CTRL_IN_STATUS_DELAY = 7 VENDOR_TEST_CTRL_OUT_STATUS_DELAY = 8 +VENDOR_TEST_CTRL_IN_SIZES = 9 +VENDOR_TEST_CTRL_OUT_SIZES = 10 VENDOR_TEST_UNSUPPORTED_REQUEST = 32 +REQUEST_GET_STATUS = 0 # done +REQUEST_CLEAR_FEATURE = 1 # done +REQUEST_SET_FEATURE = 3 # done +REQUEST_SET_ADDRESS = 5 # ??? +REQUEST_GET_DESCRIPTOR = 6 +REQUEST_SET_DESCRIPTOR = 7 # done +REQUEST_GET_CONFIGURATION = 8 # done +REQUEST_SET_CONFIGURATION = 9 # done +REQUEST_GET_INTERFACE = 10 # done +REQUEST_SET_INTERFACE = 11 # done +REQUEST_SYNCH_FRAME = 12 # almost done + +FEATURE_ENDPOINT_HALT = 0 +FEATURE_DEVICE_REMOTE_WAKEUP = 1 + + + +DEVICE_QUALIFIER_DESC_SIZE = 10 + +DESC_TYPE_DEVICE_QUALIFIER = 0x06 + + +DEVICE_DESC_SIZE = 18 +device_descriptor_parser = struct.Struct('BBHBBBBHHHBBBB') +device_descriptor_keys = ['bLength', 'bDescriptorType', 'bcdUSB', 'bDeviceClass', + 'bDeviceSubClass', 'bDeviceProtocol', 'bMaxPacketSize0', + 'idVendor', 'idProduct', 'bcdDevice', 'iManufacturer', + 'iProduct', 'iSerialNumber', 'bNumConfigurations'] + +CONFIGURATION_DESC_SIZE = 9 +configuration_descriptor_parser = struct.Struct('BBHBBBBB') +configuration_descriptor_keys = ['bLength', 'bDescriptorType', 'wTotalLength', + 'bNumInterfaces', 'bConfigurationValue', + 'iConfiguration', 'bmAttributes', 'bMaxPower'] + +INTERFACE_DESC_SIZE = 9 +interface_descriptor_parser = struct.Struct('BBBBBBBBB') +interface_descriptor_keys = ['bLength', 'bDescriptorType', 'bInterfaceNumber', + 'bAlternateSetting', 'bNumEndpoints', + 'bInterfaceClass', 'bInterfaceSubClass', + 'bInterfaceProtocol', 'iInterface'] + +ENDPOINT_DESC_SIZE = 7 +interface_descriptor_parser = struct.Struct('BBBBBHB') +interface_descriptor_keys = ['bLength', 'bDescriptorType', 'bEndpointAddress', + 'bmAttributes', 'wMaxPacketSize', 'bInterval'] + class PyusbBasicTest(BaseHostTest): - """ - """ - def _callback_usb_enumeration_done(self, key, value, timestamp): - print("Received key %s = %s" % (key, value)) - self.log("Received key %s = %s" % (key, value)) - test_device(value, self.log) - passed = True - results = "pass" if passed else "fail" - self.send_kv(results, "0") + + def _callback_control_basic_test(self, key, value, timestamp): + serial_number, vendor_id, product_id = value.split(' ') + self.log("Received serial %s" % (serial_number)) + self.log("Received vendor_id %s" % (vendor_id)) + self.log("Received product_id %s" % (product_id)) + + dev = self.find_device(serial_number) + if(dev == None): + return + + try: + control_basic_test(dev, vendor_id, product_id, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + + def _callback_control_stall_test(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + control_stall_test(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + + def _callback_control_sizes_test(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + control_sizes_test(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + + def _callback_control_stress_test(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + control_stress_test(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + + def _callback_device_reset_test(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + self.device_reset_test.send(dev) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + def _callback_device_soft_reconnection_test(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + self.device_soft_reconnection_test.send(dev) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + + def _callback_device_suspend_resume_test(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + self.device_suspend_resume_test.send(dev) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + + def _callback_repeated_construction_destruction_test(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + self.repeated_construction_destruction_test.send(dev) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + + def find_device(self, serial_number): + # to make it more reliable, 20 retries in 2[s] + for _ in range(20): + dev = usb.core.find(custom_match=TestMatch(serial_number)) + if dev is not None: + break + time.sleep(0.1) + + if dev is None: + self.log("Device not found") + self.send_kv("failed", "0") + return dev + + + def report_success(self): + self.send_kv("pass", "0") + + def report_error(self, msg): + self.log('TEST FAILED: {}'.format(msg)) + self.send_kv("failed", "0") def setup(self): self.__result = False - self.register_callback('usb_enumeration_done', self._callback_usb_enumeration_done) + + self.device_reset_test = device_reset_test(log=print) + self.device_reset_test.send(None) + + self.device_soft_reconnection_test = device_soft_reconnection_test(log=print) + self.device_soft_reconnection_test.send(None) + + self.device_suspend_resume_test = device_suspend_resume_test(log=print) + self.device_suspend_resume_test.send(None) + + self.repeated_construction_destruction_test = repeated_construction_destruction_test(log=print) + self.repeated_construction_destruction_test.send(None) + + self.register_callback('control_basic_test', self._callback_control_basic_test) + self.register_callback('control_stall_test', self._callback_control_stall_test) + self.register_callback('control_sizes_test', self._callback_control_sizes_test) + self.register_callback('control_stress_test', self._callback_control_stress_test) + self.register_callback('device_reset_test', self._callback_device_reset_test) + self.register_callback('device_soft_reconnection_test', self._callback_device_soft_reconnection_test) + self.register_callback('device_suspend_resume_test', self._callback_device_suspend_resume_test) + self.register_callback('repeated_construction_destruction_test', self._callback_repeated_construction_destruction_test) + def result(self): return self.__result @@ -81,6 +283,20 @@ def __call__(self, dev): return False +def lineno(): + """Returns the current line number in our program.""" + return inspect.currentframe().f_back.f_lineno + +def raise_if_different(expected, actual, line, text=''): + """Raise a RuntimeError if actual is different than expected.""" + if expected != actual: + raise RuntimeError('[{}]:{}, {} Got {!r}, expected {!r}'.format(__file__, line, text, actual, expected)) + +def raise_unconditionally(line, text=''): + """Raise a RuntimeError unconditionally.""" + raise RuntimeError('[{}]:{}, {}'.format(__file__, line, text)) + + def test_device(serial_number, log=print): dev = usb.core.find(custom_match=TestMatch(serial_number)) if dev is None: @@ -123,7 +339,6 @@ def test_device(serial_number, log=print): #-report throughput for in/out of control, bulk, interrupt and iso transfers #-verify that construction/destruction repeatedly works gracefully - intf = get_interface(dev, 0, 0) # Find endpoints @@ -205,7 +420,6 @@ def test_device(serial_number, log=print): t.join() - return True def write_data(pipe): print("Write data running") @@ -215,8 +429,417 @@ def write_data(pipe): count += 1 print("Count %s" % count) time.sleep(0.5) - - + + +def control_basic_test(dev, vendor_id, product_id, log): + get_status_test(dev, log) + set_clear_feature_test(dev, log) + get_set_interface_test(dev, log) + get_set_configuration_test(dev, log) + get_descriptor_test(dev, vendor_id, product_id, log) + set_descriptor_test(dev, log) + #synch_frame_test(dev, log) wait for isochronous endpoint + + +def get_status_test(dev, log): + # Control IN GET_STATUS on DEVICE + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = REQUEST_GET_STATUS + value = 0 # Always 0 for this request + index = 0 # 0 if recipient is device + length = 2 # Always 2 for this request (size of return data) + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] | (ret[1] << 8) + # Status bits + # ret == 0b01 (D0)Self Powered + # ret == 0b10 (D1)Remote Wakeup + # (D2 - D15 reserved) Must be set to 0 + if(ret < 0 or ret > 3): + raise_unconditionally(lineno(), "GET_STATUS on DEVICE failed") + + # Control IN GET_STATUS on INTERFACE + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_GET_STATUS + value = 0 # Always 0 for this request + index = 0 # interface index + length = 2 # Always 2 for this request (size of return data) + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] | (ret[1] << 8) + # Status bits + # ret == 0b0 + # (D0 - D15 reserved) Must be set to 0 + if(ret != 0): + raise_unconditionally(lineno(), "GET_STATUS on INTERFACE failed") + + # Control IN GET_STATUS on ENDPOINT 0 + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_GET_STATUS + value = 0 # Always 0 for this request + index = 0 # endpoint index + length = 2 # Always 2 for this request (size of return data) + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] | (ret[1] << 8) + # Status bits + # ret == 0b1 (D0)endpoint Halt + # (D1 - D15 reserved) Must be set to 0 + # endpoint 0 can't be halted ret == 0 + if(ret != 0): + raise_unconditionally(lineno(), "GET_STATUS on ENDPOINT failed") + + +def set_clear_feature_test(dev, log): + # The state of the Direction bit is ignored if the wLength field is zero, + # signifying there is no Data stage - see USB spec 9.3.1 + # according to this SET/CLEAR_FEATURE ignores direction bits and should + # work for both CTRL_OUT and CTRL_IN + + # Control OUT SET_FEATURE on endpoint - halt + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_SET_FEATURE + value = FEATURE_ENDPOINT_HALT + index = 1 # Endpoint index + length = 0 # Always 0 for this request + try: + dev.ctrl_transfer(request_type, request, value, index, length) + except usb.core.USBError: + raise_unconditionally(lineno(), "endpoint halt failed") + + # check if endpoint was halted + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_GET_STATUS + value = 0 # Always 0 for this request + index = 1 # Endpoint index + length = 2 # Always 2 for this request (size of return data) + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] | (ret[1] << 8) + if(ret != 1): + raise_unconditionally(lineno(), "endpoint was not halted") + + # Control OUT CLEAR_FEATURE on endpoint - unhalt + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_CLEAR_FEATURE + value = FEATURE_ENDPOINT_HALT + index = 1 # Endpoint index + length = 0 # Always 0 for this request + try: + dev.ctrl_transfer(request_type, request, value, index, length) + except usb.core.USBError: + raise_unconditionally(lineno(), "endpoint was not unhalted") + + # check if endpoint was unhalted + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_GET_STATUS + value = 0 # Always 0 for this request + index = 1 # Endpoint index + length = 2 # Always 2 for this request (size of return data) + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] + if(ret != 0): + raise_unconditionally(lineno(), "endpoint unhalthalt failed") + + # retest for CTRL_IN + # Control IN SET_FEATURE on endpoint - halt + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_SET_FEATURE + value = FEATURE_ENDPOINT_HALT + index = 1 # Endpoint index + length = 0 # Always 0 for this request + try: + dev.ctrl_transfer(request_type, request, value, index, length) + except usb.core.USBError: + raise_unconditionally(lineno(), "endpoint halt failed") + + # check if endpoint was halted + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_GET_STATUS + value = 0 # Always 0 for this request + index = 1 # Endpoint index + length = 2 # Always 2 for this request (size of return data) + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] | (ret[1] << 8) + if(ret != 1): + raise_unconditionally(lineno(), "endpoint was not halted") + + # Control IN CLEAR_FEATURE on endpoint - unhalt + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_CLEAR_FEATURE + value = FEATURE_ENDPOINT_HALT + index = 1 # Endpoint index + length = 0 # Always 0 for this request + try: + dev.ctrl_transfer(request_type, request, value, index, length) + except usb.core.USBError: + raise_unconditionally(lineno(), "endpoint was not unhalted") + + # check if endpoint was unhalted + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_GET_STATUS + value = 0 # Always 0 for this request + index = 1 # Endpoint index + length = 2 # Always 2 for this request (size of return data) + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] + if(ret != 0): + raise_unconditionally(lineno(), "endpoint unhalthalt failed") + + +def get_set_interface_test(dev, log): + # Control IN GET_INTERFACE + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_GET_INTERFACE + value = 0 # Always 0 for this request + index = 0 # Interface index + length = 1 # Always 1 for this request (size of return data) + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + print("GET_INTERFACE ret: %d" % (ret[0])) + if(ret[0] != 0): + raise_unconditionally(lineno(), "Wrong interface was set expected: 0") + except usb.core.USBError: + raise_unconditionally(lineno(), "GET_INTERFACE failed") + # test control data transfer + control_data_test(dev, [64, 256], log) + + # Control IN SET_INTERFACE + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_SET_INTERFACE + value = 1 # Alternative interface setting index + index = 0 # Interface index + length = 0 # Always 0 for this request + try: + dev.ctrl_transfer(request_type, request, value, index, length) + except usb.core.USBError: + raise_unconditionally(lineno(), "SET_INTERFACE failed") + # test control data transfer after alternative interface set + control_data_test(dev, [64, 256], log) + + # Control IN GET_INTERFACE - check if alternative interface setting was set + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_GET_INTERFACE + value = 0 # Always 0 for this request + index = 0 # Interface index + length = 1 # Always 1 for this request (size of return data) + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + if(ret[0] != 1): + raise_unconditionally(lineno(), "Alternative interface setting was not set properly") + except usb.core.USBError: + raise_unconditionally(lineno(), "GET_INTERFACE failed") + + # Control IN SET_INTERFACE restore interfejs settings + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_SET_INTERFACE + value = 0 # Interface setting index + index = 0 # Interface index + length = 0 # Always 0 for this request + try: + dev.ctrl_transfer(request_type, request, value, index, length) + except usb.core.USBError: + raise_unconditionally(lineno(), "SET_INTERFACE request failed") + # test control data transfer after interface restoring + control_data_test(dev, [64, 256], log) + + # Control IN GET_INTERFACE - check if alternative interface setting was restored properly + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_GET_INTERFACE + value = 0 # Always 0 for this request + index = 0 # Interface index + length = 1 # Always 1 for this request (size of return data) + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + if(ret[0] != 0): + raise_unconditionally(lineno(), "Alternative interface setting was not restored properly") + except usb.core.USBError: + raise_unconditionally(lineno(), "GET_INTERFACE failed") + + +def get_set_configuration_test(dev, log): + # Set Configuration can also be used, with wValue set to 0, to deconfigure the device + # Control IN GET_CONFIGURATION + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_GET_CONFIGURATION + value = 0 # Always 0 for this request + index = 0 # Always 0 for this request + length = 1 # Always 1 for this request (size of return data) + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + if(ret[0] != 1): + raise_unconditionally(lineno(), "Expected first configuration set") + except usb.core.USBError: + raise_unconditionally(lineno(), "GET_CONFIGURATION failed") + # test control data transfer + control_data_test(dev, [64, 256], log) + + # Control OUT SET_CONFIGURATION 0 - deconfigure the device + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_SET_CONFIGURATION + value = 0 # Configuration Value (0 - deconfigure the device) + index = 0 # Always 0 for this request + length = 0 # Always 0 for this request + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + except usb.core.USBError: + raise_unconditionally(lineno(), "SET_CONFIGURATION failed") + + # Control IN GET_CONFIGURATION - check if deconfigured + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_GET_CONFIGURATION + value = 0 # Always 0 for this request + index = 0 # Always 0 for this request + length = 1 # Always 1 for this request (size of return data) + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + if(ret[0] != 0): + raise_unconditionally(lineno(), "Expected to be deconfigured") + except usb.core.USBError: + raise_unconditionally(lineno(), "GET_CONFIGURATION failed") + + # Control OUT SET_CONFIGURATION 1 - restore first configuration + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_SET_CONFIGURATION + value = 1 # Configuration Value + index = 0 # Always 0 for this request + length = 0 # Always 0 for this request + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + except usb.core.USBError: + raise_unconditionally(lineno(), "SET_CONFIGURATION failed") + # test control data transfer after configured back + control_data_test(dev, [64, 256], log) + + # Control IN GET_CONFIGURATION - check if configured back + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_GET_CONFIGURATION + value = 0 # Always 0 for this request + index = 0 # Always 0 for this request + length = 1 # Always 1 for this request (size of return data) + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + if(ret[0] != 1): + raise_unconditionally(lineno(), "Expected to be deconfigured: 1") + except usb.core.USBError: + raise_unconditionally(lineno(), "GET_CONFIGURATION failed") + control_data_test(dev, [64, 256], log) + + +def get_descriptor_test(dev, vendor_id, product_id, log): + # Control IN GET_DESCRIPTOR - device + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = REQUEST_GET_DESCRIPTOR + value = (DESC_TYPE_DEVICE << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) + index = 0 # 0 or Language ID for this request + length = DEVICE_DESC_SIZE # Descriptor Length + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + #print("### DEVICE_DESC ####################################################") + #dev_desc = dict(zip(device_descriptor_keys, device_descriptor_parser.unpack(ret))) + #for key in dev_desc: + # print("%s: %d" % (key, dev_desc[key])) + #assert vendor_id != dev_desc['idVendor'] + #assert product_id != dev_desc['idProduct'] + except usb.core.USBError: + raise_unconditionally(lineno(), "Requesting device descriptor failed") + + # Control IN GET_DESCRIPTOR - configuration + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = REQUEST_GET_DESCRIPTOR + value = (DESC_TYPE_CONFIG << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) + index = 0 # 0 or Language ID for this request + length = CONFIGURATION_DESC_SIZE # Descriptor Length + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + #print("### CONFIGURATION_DESC ####################################################") + #conf_desc = dict(zip(configuration_descriptor_keys, configuration_descriptor_parser.unpack(ret))) + #for key in conf_desc: + # print("%s: %d" % (key, conf_desc[key])) + #print("#######################################################") + except usb.core.USBError: + raise_unconditionally(lineno(), "Requesting configuration descriptor failed") + + # Control IN GET_DESCRIPTOR - interface + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = REQUEST_GET_DESCRIPTOR + value = (DESC_TYPE_INTERFACE << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) + index = 0 # 0 or Language ID for this request + length = INTERFACE_DESC_SIZE # Descriptor Length + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + raise_unconditionally(lineno(), "Requesting interface descriptor should fail since it is not directly accessible") + except usb.core.USBError: + log("interface descriptor is not directly accessible") + + # Control IN GET_DESCRIPTOR - interface + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = REQUEST_GET_DESCRIPTOR + value = (DESC_TYPE_ENDPOINT << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) + index = 0 # 0 or Language ID for this request + length = INTERFACE_DESC_SIZE # Descriptor Length + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + raise_unconditionally(lineno(), "Requesting endpoint descriptor should fail since it is not directly accessible") + except usb.core.USBError: + log("endpoint descriptor is not directly accessible") + + +def set_descriptor_test(dev, log): + # SET_DESCRIPTOR is optional and not implemented in Mbed + # command should fail with no action on device side + + # Control OUT SET_DESCRIPTOR + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = REQUEST_SET_DESCRIPTOR + value = (DESC_TYPE_DEVICE << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) + index = 0 # 0 or Language ID for this request + data = bytearray(DEVICE_DESC_SIZE) # Descriptor data + try: + dev.ctrl_transfer(request_type, request, value, index, data) + raise_unconditionally(lineno(), "SET_DESCRIPTOR should fail since it is not implemented") + except usb.core.USBError: + log("SET_DESCRIPTOR is unsupported") + + +def synch_frame_test(dev, log): + # only for isochronous endpoints + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_SYNCH_FRAME + value = 0 # Always 0 for this request + index = 1 # Endpoint index + length = 2 # Always 2 for this request (size of return data) + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] | (ret[1] << 8) + log("synch frame ret: %d" % (ret)) + except usb.core.USBError: + raise_unconditionally(lineno(), "SYNCH_FRAME failed") + + def control_stall_test(dev, log): # Control OUT stall @@ -228,7 +851,7 @@ def control_stall_test(dev, log): index = 0 # Communication interface data = bytearray(64) # Dummy data dev.ctrl_transfer(request_type, request, value, index, data, 5000) - raise Exception("Invalid request not stalled") + raise_unconditionally(lineno(), "Invalid request not stalled") except usb.core.USBError: log("Invalid request stalled") @@ -241,7 +864,7 @@ def control_stall_test(dev, log): index = 0 # Communication interface length = 0 dev.ctrl_transfer(request_type, request, value, index, length, 5000) - raise Exception("Invalid request not stalled") + raise_unconditionally(lineno(), "Invalid request not stalled") except usb.core.USBError: log("Invalid request stalled") @@ -254,7 +877,7 @@ def control_stall_test(dev, log): index = 0 # Communication interface length = 0 dev.ctrl_transfer(request_type, request, value, index, length, 5000) - raise Exception("Invalid request not stalled") + raise_unconditionally(lineno(), "Invalid request not stalled") except usb.core.USBError: log("Invalid request stalled") @@ -267,11 +890,23 @@ def control_stall_test(dev, log): index = 0 # Communication interface length = 255 dev.ctrl_transfer(request_type, request, value, index, length, 5000) - raise Exception("Invalid request not stalled") + raise_unconditionally(lineno(), "Invalid request not stalled") except usb.core.USBError: log("Invalid request stalled") - for i in (6, 7, 5): + for i in (3, 4, 5): + try: + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = 0x6 # GET_DESCRIPTOR + value = (0x03 << 8) | (i << 0) # String descriptor index + index = 0 # Communication interface + length = 255 + resp = dev.ctrl_transfer(request_type, request, value, index, length, 5000) + except usb.core.USBError: + raise_unconditionally(lineno(), "Requesting string failed i: " + str(i)) + + for i in (6, 7): try: request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, CTRL_RECIPIENT_DEVICE) @@ -280,11 +915,54 @@ def control_stall_test(dev, log): index = 0 # Communication interface length = 255 resp = dev.ctrl_transfer(request_type, request, value, index, length, 5000) - log("Requesting string %s passed" % i) + raise_unconditionally(lineno(), "Requesting string passed i: " + str(i)) except usb.core.USBError: log("Requesting string %s failed" % i) - - + + +def control_sizes_test(dev, log): + list = [1, 2, 3, 7, 8, 9, 15, 16, 17, 31, 32, 33, 63, 64, 65, 127, 128, 129, 255, 256, 257, 511, 512, 513, 1023, 1024, 1025, 2047, 2048] + control_data_test(dev, list, log) + + +def control_data_test(dev, sizes_list, log): + # Test control requests of various data stage sizes (1,8,16,32,64,255,256,...) + count = 1 + for i in sizes_list: + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_CTRL_OUT_SIZES + value = i # Size of data the device should actually read + index = 0 # Unused - set for debugging only + data = bytearray(i) # Dummy data + if i == 1: + data[0] = count + else: + data[0] = count - 1 + data[i - 1] = count + 1 + try: + dev.ctrl_transfer(request_type, request, value, index, data, 5000) + except usb.core.USBError: + raise_unconditionally(lineno(), "VENDOR_TEST_CTRL_OUT_SIZES failed ") + + request_type = build_request_type(CTRL_IN, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_CTRL_IN_SIZES + value = 0 # Size of data the device should actually send + index = 0 # Unused - set for debugging only + length = i + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length, 5000) + if i == 1: + raise_if_different(count, ret[0], lineno(), "send/receive data not match") + else: + raise_if_different(count - 1, ret[0], lineno(), "send/receive data not match") + raise_if_different(count + 1, ret[i - 1], lineno(), "send/receive data not match") + except usb.core.USBError: + raise_unconditionally(lineno(), "VENDOR_TEST_CTRL_IN_SIZES failed") + count += 1 + + def control_stress_test(dev, log): # Test various patterns of control transfers @@ -337,6 +1015,65 @@ def control_stress_test(dev, log): count += 1 +def device_reset_test(log): + dev = yield + dev.reset(); + dev = yield + dev.reset(); + dev = yield + dev.reset(); + dev = yield + # run other test to check if USB works fine after reset + control_data_test(dev, [64, 256], log) + yield + + +def device_soft_reconnection_test(log): + list = [64, 256] + dev = yield + # run other test to check if USB works fine before reconnection + control_data_test(dev, list, log) + dev = yield + # run other test to check if USB works fine after reconnection + control_data_test(dev, list, log) + dev = yield + # run other test to check if USB works fine after reconnection + control_data_test(dev, list, log) + dev = yield + # run other test to check if USB works fine after reconnection + control_data_test(dev, list, log) + dev = yield + # run other test to check if USB works fine after reconnection + control_data_test(dev, list, log) + yield + + +def device_suspend_resume_test(log): + dev = yield + time.sleep(0.1) + control_data_test(dev, [64, 256], log) + time.sleep(0.1) + control_data_test(dev, [64, 256], log) + time.sleep(0.1) + control_data_test(dev, [64, 256], log) + time.sleep(0.1) + control_data_test(dev, [64, 256], log) + time.sleep(0.1) + yield + + +def repeated_construction_destruction_test(log): + # run other test to check if USB works fine after repeated construction/destruction + list = [64, 256] + dev = yield + control_data_test(dev, list, log) + dev = yield + control_data_test(dev, list, log) + dev = yield + control_data_test(dev, list, log) + yield + + def main(): parser = ArgumentParser(description="USB basic test") parser.add_argument('serial', help='USB serial number of DUT') diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index 3235a3f8554..a30a819dd70 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -30,12 +30,15 @@ #define VENDOR_TEST_CTRL_NONE_DELAY 6 #define VENDOR_TEST_CTRL_IN_STATUS_DELAY 7 #define VENDOR_TEST_CTRL_OUT_STATUS_DELAY 8 +#define VENDOR_TEST_CTRL_IN_SIZES 9 +#define VENDOR_TEST_CTRL_OUT_SIZES 10 #define MAX_EP_SIZE 64 #define MIN_EP_SIZE 8 -USBTester::USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): USBDevice(vendor_id, product_id, product_release) +USBTester::USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): USBDevice(vendor_id, product_id, product_release), + reset_count(0), suspend_count(0), resume_count(0) { EndpointResolver resolver(endpoint_table()); @@ -60,6 +63,46 @@ USBTester::~USBTester() deinit(); } + +const char *USBTester::get_desc_string(const uint8_t *desc) +{ + static char ret_string[128] = {}; + const uint8_t desc_size = desc[0] - 2; + const uint8_t *desc_str = &desc[2]; + uint32_t j = 0; + for(uint32_t i = 0; i < desc_size; i+=2, j++) { + ret_string[j] = desc_str[i]; + } + ret_string[j] = '\0'; + return ret_string; +} + +void USBTester::suspend(bool suspended) +{ + if(suspended) { + ++suspend_count; + } else { + ++resume_count; + } +} + +const char *USBTester::get_serial_desc_string() +{ + return get_desc_string(string_iserial_desc()); +} + +const char *USBTester::get_iinterface_desc_string() +{ + return get_desc_string(string_iserial_desc()); +} + +const char *USBTester::get_iproduct_desc_string() +{ + return get_desc_string(string_iserial_desc()); +} + + + void USBTester::callback_state_change(DeviceState new_state) { // Nothing to do @@ -93,6 +136,16 @@ void USBTester::callback_request(const setup_packet_t *setup) result = Success; delay = 2000; break; + case VENDOR_TEST_CTRL_IN_SIZES: + result = Send; + data = ctrl_buf; + size = setup->wLength; + break; + case VENDOR_TEST_CTRL_OUT_SIZES: + result = Receive; + data = ctrl_buf; + size = setup->wValue; + break; default: result = PassThrough; break; @@ -124,6 +177,12 @@ void USBTester::callback_request_xfer_done(const setup_packet_t *setup, bool abo case VENDOR_TEST_CTRL_OUT: result = true; break; + case VENDOR_TEST_CTRL_OUT_SIZES: + result = true; + break; + case VENDOR_TEST_CTRL_IN_SIZES: + result = true; + break; default: result = false; break; diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index 7b56d3171e5..b7005c98c0d 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -40,6 +40,24 @@ class USBTester: public USBDevice { ~USBTester(); + /* + * + * @returns descriptor string in ASCII + */ + const char *get_serial_desc_string(); + const char *get_iproduct_desc_string(); + const char *get_iinterface_desc_string(); + uint32_t get_reset_count() const { return reset_count; } + uint32_t get_suspend_count() const { return suspend_count; } + uint32_t get_resume_count() const { return resume_count; } + void clear_reset_count() { reset_count = 0; } + void clear_suspend_count() { suspend_count = 0; } + void clear_resume_count() { resume_count = 0; } + +private: + const char *get_desc_string(const uint8_t *desc); + virtual void suspend(bool suspended); + protected: /* @@ -78,6 +96,9 @@ class USBTester: public USBDevice { uint8_t int_out; uint8_t int_buf[64]; EventQueue *queue; + volatile uint32_t reset_count; + volatile uint32_t suspend_count; + volatile uint32_t resume_count; virtual void callback_state_change(DeviceState new_state); virtual void callback_request(const setup_packet_t *setup); @@ -86,6 +107,7 @@ class USBTester: public USBDevice { virtual void callback_set_interface(uint16_t interface, uint8_t alternate); virtual void epbulk_out_callback(usb_ep_t endpoint); virtual void epint_out_callback(usb_ep_t endpoint); + virtual void callback_reset() { ++reset_count; } uint8_t ctrl_buf[2048]; }; diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index 141bb473e2c..1577a87148a 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -29,23 +29,263 @@ using namespace utest::v1; -// Echo server (echo payload to host) -void test_case_basic() +void control_basic_test() { + uint16_t vendor_id = 0x0d28; + uint16_t product_id = 0x0205; + uint16_t product_release = 0x0001; char _key[11] = {}; char _value[128] = {}; + char str[128] = {}; { - USBTester serial(0x0d28, 0x0205, 0x0001, true); + USBTester serial(vendor_id, product_id, product_release, true); + sprintf (str, "%s %d %d", serial.get_serial_desc_string(), vendor_id, product_id); + greentea_send_kv("control_basic_test", str); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + +void control_stall_test() +{ + uint16_t vendor_id = 0x0d28; + uint16_t product_id = 0x0205; + uint16_t product_release = 0x0001; + char _key[11] = {}; + char _value[128] = {}; + + { + USBTester serial(vendor_id, product_id, product_release, true); + greentea_send_kv("control_stall_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + +void control_sizes_test() +{ + uint16_t vendor_id = 0x0d28; + uint16_t product_id = 0x0205; + uint16_t product_release = 0x0001; + char _key[11] = {}; + char _value[128] = {}; + + { + USBTester serial(vendor_id, product_id, product_release, true); + greentea_send_kv("control_sizes_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + +void control_stress_test() +{ + uint16_t vendor_id = 0x0d28; + uint16_t product_id = 0x0205; + uint16_t product_release = 0x0001; + char _key[11] = {}; + char _value[128] = {}; + + { + USBTester serial(vendor_id, product_id, product_release, true); + greentea_send_kv("control_stress_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} - greentea_send_kv("usb_enumeration_done", "0123456789"); +void device_reset_test() +{ + uint16_t vendor_id = 0x0d28; + uint16_t product_id = 0x0205; + uint16_t product_release = 0x0001; + char _key[11] = {}; + char _value[128] = {}; + + { + USBTester serial(vendor_id, product_id, product_release, true); + + greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); + serial.clear_reset_count(); + // Wait for host before terminating + while(serial.get_reset_count() == 0); + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + + while(!serial.configured()); + + greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); + serial.clear_reset_count(); + // Wait for host before terminating + while(serial.get_reset_count() == 0); + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + + while(!serial.configured()); + + greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); + serial.clear_reset_count(); + // Wait for host before terminating + while(serial.get_reset_count() == 0); + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + + while(!serial.configured()); + + greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + + +void device_soft_reconnection_test() +{ + uint16_t vendor_id = 0x0d28; + uint16_t product_id = 0x0205; + uint16_t product_release = 0x0001; + char _key[11] = {}; + char _value[128] = {}; + const uint32_t reconnect_try_count = 3; + + { + USBTester serial(vendor_id, product_id, product_release, true); + + greentea_send_kv("device_soft_reconnection_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + + for(int i = 0; i < reconnect_try_count; i++) { + serial.disconnect(); + // If disconnect() + connect() occur too fast the reset event will be dropped. + // At a minimum there should be a 200us delay between disconnect and connect. + // To be on the safe side I would recommend a 1ms delay, so the host controller + // has an entire USB frame to detect the disconnect. + wait_ms(1); + serial.connect(); + greentea_send_kv("device_soft_reconnection_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } + + serial.disconnect(); + wait_ms(1); + serial.connect(); + serial.disconnect(); + wait_ms(1); + serial.connect(); + serial.disconnect(); + wait_ms(1); + serial.connect(); + greentea_send_kv("device_soft_reconnection_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + +void device_suspend_resume_test() +{ + uint16_t vendor_id = 0x0d28; + uint16_t product_id = 0x0205; + uint16_t product_release = 0x0001; + char _key[11] = {}; + char _value[128] = {}; + + { + USBTester serial(vendor_id, product_id, product_release, true); + greentea_send_kv("device_suspend_resume_test", serial.get_serial_desc_string()); + printf("[1] suspend_count: %d resume_count: %d\n", serial.get_suspend_count(), serial.get_resume_count()); + serial.clear_suspend_count(); + serial.clear_resume_count(); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + printf("[2] suspend_count: %d resume_count: %d\n", serial.get_suspend_count(), serial.get_resume_count()); + TEST_ASSERT_EQUAL_STRING("pass", _key); + wait_ms(5000); + printf("[3] suspend_count: %d resume_count: %d\n", serial.get_suspend_count(), serial.get_resume_count()); + } +} + +void repeated_construction_destruction_test() +{ + uint16_t vendor_id = 0x0d28; + uint16_t product_id = 0x0205; + uint16_t product_release = 0x0001; + char _key[11] = {}; + char _value[128] = {}; + + { + USBTester serial(vendor_id, product_id, product_release, true); + TEST_ASSERT_EQUAL(true, serial.configured()); + wait_ms(1); + } + + wait_ms(1); + { + USBTester serial(vendor_id, product_id, product_release, true); + TEST_ASSERT_EQUAL(true, serial.configured()); + wait_ms(1); + } + + wait_ms(1); + { + USBTester serial(vendor_id, product_id, product_release, true); + TEST_ASSERT_EQUAL(true, serial.configured()); + wait_ms(1); + } + + wait_ms(1); + { + USBTester serial(vendor_id, product_id, product_release, true); + TEST_ASSERT_EQUAL(true, serial.configured()); + wait_ms(1); + greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } + + wait_ms(1); + { + USBTester serial(vendor_id, product_id, product_release, true); + TEST_ASSERT_EQUAL(true, serial.configured()); + wait_ms(1); + greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } + + wait_ms(1); + { + USBTester serial(vendor_id, product_id, product_release, true); + TEST_ASSERT_EQUAL(true, serial.configured()); + wait_ms(1); + greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); } } Case cases[] = { - Case("pyusb basic test", test_case_basic), + Case("usb control basic test", control_basic_test), + Case("usb control stall test", control_stall_test), + Case("usb control sizes test", control_sizes_test), + Case("usb control stress test", control_stress_test), + Case("usb device reset test", device_reset_test), + Case("usb soft reconnection test", device_soft_reconnection_test), + Case("usb device suspend/resume test", device_suspend_resume_test), + Case("usb repeated construction destruction test", repeated_construction_destruction_test) }; utest::v1::status_t greentea_test_setup(const size_t number_of_cases) From 9b51767f93f4caca241d9dbee7fef7e6738bdd3f Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 19 Mar 2018 22:03:32 -0500 Subject: [PATCH 160/488] Move USBPhy and related files to USB directory Move the USBPhy header files into usb/device/USBPhy. Also move hal and target USB files since mbed 2 does not compile when these files are present without the USBPhy headers. Directory restructure summary: platform/USBPhy* to usb/device/USBPhy/USBPhy* hal/* to usb/device/hal/* targets/TARGET_Freescale/usb/* to usb/device/targets/TARGET_Freescale/* targets/TARGET_NXP/TARGET_LPC176X/usb/* to usb/device/targets/TARGET_NXP/* --- {platform => usb/device/USBPhy}/USBPhy.h | 0 {platform => usb/device/USBPhy}/USBPhyEvents.h | 0 {platform => usb/device/USBPhy}/USBPhyTypes.h | 0 {hal => usb/device/hal}/mbed_usb_phy.cpp | 0 {hal => usb/device/hal}/usb_phy_api.h | 0 .../device/targets/TARGET_Freescale}/USBEndpoints_Kinetis.h | 0 .../usb => usb/device/targets/TARGET_Freescale}/USBPhyHw.h | 0 .../device/targets/TARGET_Freescale}/USBPhy_Kinetis.cpp | 0 .../device/targets/TARGET_NXP}/USBEndpoints_LPC17_LPC23.h | 0 .../usb => usb/device/targets/TARGET_NXP}/USBHAL_LPC17.cpp | 0 .../usb => usb/device/targets/TARGET_NXP}/USBPhyHw.h | 0 11 files changed, 0 insertions(+), 0 deletions(-) rename {platform => usb/device/USBPhy}/USBPhy.h (100%) rename {platform => usb/device/USBPhy}/USBPhyEvents.h (100%) rename {platform => usb/device/USBPhy}/USBPhyTypes.h (100%) rename {hal => usb/device/hal}/mbed_usb_phy.cpp (100%) rename {hal => usb/device/hal}/usb_phy_api.h (100%) rename {targets/TARGET_Freescale/usb => usb/device/targets/TARGET_Freescale}/USBEndpoints_Kinetis.h (100%) rename {targets/TARGET_Freescale/usb => usb/device/targets/TARGET_Freescale}/USBPhyHw.h (100%) rename {targets/TARGET_Freescale/usb => usb/device/targets/TARGET_Freescale}/USBPhy_Kinetis.cpp (100%) rename {targets/TARGET_NXP/TARGET_LPC176X/usb => usb/device/targets/TARGET_NXP}/USBEndpoints_LPC17_LPC23.h (100%) rename {targets/TARGET_NXP/TARGET_LPC176X/usb => usb/device/targets/TARGET_NXP}/USBHAL_LPC17.cpp (100%) rename {targets/TARGET_NXP/TARGET_LPC176X/usb => usb/device/targets/TARGET_NXP}/USBPhyHw.h (100%) diff --git a/platform/USBPhy.h b/usb/device/USBPhy/USBPhy.h similarity index 100% rename from platform/USBPhy.h rename to usb/device/USBPhy/USBPhy.h diff --git a/platform/USBPhyEvents.h b/usb/device/USBPhy/USBPhyEvents.h similarity index 100% rename from platform/USBPhyEvents.h rename to usb/device/USBPhy/USBPhyEvents.h diff --git a/platform/USBPhyTypes.h b/usb/device/USBPhy/USBPhyTypes.h similarity index 100% rename from platform/USBPhyTypes.h rename to usb/device/USBPhy/USBPhyTypes.h diff --git a/hal/mbed_usb_phy.cpp b/usb/device/hal/mbed_usb_phy.cpp similarity index 100% rename from hal/mbed_usb_phy.cpp rename to usb/device/hal/mbed_usb_phy.cpp diff --git a/hal/usb_phy_api.h b/usb/device/hal/usb_phy_api.h similarity index 100% rename from hal/usb_phy_api.h rename to usb/device/hal/usb_phy_api.h diff --git a/targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h b/usb/device/targets/TARGET_Freescale/USBEndpoints_Kinetis.h similarity index 100% rename from targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h rename to usb/device/targets/TARGET_Freescale/USBEndpoints_Kinetis.h diff --git a/targets/TARGET_Freescale/usb/USBPhyHw.h b/usb/device/targets/TARGET_Freescale/USBPhyHw.h similarity index 100% rename from targets/TARGET_Freescale/usb/USBPhyHw.h rename to usb/device/targets/TARGET_Freescale/USBPhyHw.h diff --git a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp similarity index 100% rename from targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp rename to usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBEndpoints_LPC17_LPC23.h b/usb/device/targets/TARGET_NXP/USBEndpoints_LPC17_LPC23.h similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/usb/USBEndpoints_LPC17_LPC23.h rename to usb/device/targets/TARGET_NXP/USBEndpoints_LPC17_LPC23.h diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp b/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp rename to usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h b/usb/device/targets/TARGET_NXP/USBPhyHw.h similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h rename to usb/device/targets/TARGET_NXP/USBPhyHw.h From 9f806a393dbe6c7be778c96d8ecb7f00ef78f485 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 24 Mar 2018 17:23:47 +0100 Subject: [PATCH 161/488] Add USBPhy template Add a template for implementing a USBPhy. --- usb/device/targets/TARGET_Template/USBPhyHw.h | 66 ++++ .../TARGET_Template/USBPhy_template.cpp | 309 ++++++++++++++++++ 2 files changed, 375 insertions(+) create mode 100644 usb/device/targets/TARGET_Template/USBPhyHw.h create mode 100644 usb/device/targets/TARGET_Template/USBPhy_template.cpp diff --git a/usb/device/targets/TARGET_Template/USBPhyHw.h b/usb/device/targets/TARGET_Template/USBPhyHw.h new file mode 100644 index 00000000000..ce6cc124ba6 --- /dev/null +++ b/usb/device/targets/TARGET_Template/USBPhyHw.h @@ -0,0 +1,66 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBPHYHW_H +#define USBPHYHW_H + +#include "mbed.h" +#include "USBPhy.h" + + +class USBPhyHw : public USBPhy { +public: + USBPhyHw(); + virtual ~USBPhyHw(); + virtual void init(USBPhyEvents *events); + virtual void deinit(); + virtual bool powered(); + virtual void connect(); + virtual void disconnect(); + virtual void configure(); + virtual void unconfigure(); + virtual void sof_enable(); + virtual void sof_disable(); + virtual void set_address(uint8_t address); + virtual void remote_wakeup(); + virtual const usb_ep_table_t* endpoint_table(); + + virtual uint32_t ep0_set_max_packet(uint32_t max_packet); + virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_read(uint8_t *data, uint32_t size); + virtual uint32_t ep0_read_result(); + virtual void ep0_write(uint8_t *buffer, uint32_t size); + virtual void ep0_stall(); + + virtual bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type); + virtual void endpoint_remove(usb_ep_t endpoint); + virtual void endpoint_stall(usb_ep_t endpoint); + virtual void endpoint_unstall(usb_ep_t endpoint); + + virtual bool endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual uint32_t endpoint_read_result(usb_ep_t endpoint); + virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual void endpoint_abort(usb_ep_t endpoint); + + virtual void process(); + +private: + USBPhyEvents *events; + + static void _usbisr(void); +}; + +#endif diff --git a/usb/device/targets/TARGET_Template/USBPhy_template.cpp b/usb/device/targets/TARGET_Template/USBPhy_template.cpp new file mode 100644 index 00000000000..b0c464a3bd7 --- /dev/null +++ b/usb/device/targets/TARGET_Template/USBPhy_template.cpp @@ -0,0 +1,309 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "USBPhyHw.h" + +static USBPhyHw *instance; + +USBPhy *get_usb_phy() +{ + static USBPhyHw usbphy; + return &usbphy; +} + +USBPhyHw::USBPhyHw(): events(NULL) +{ + +} + +USBPhyHw::~USBPhyHw() +{ + +} + +void USBPhyHw::init(USBPhyEvents *events) +{ + this->events = events; + + // Disable IRQ + NVIC_DisableIRQ(USB_IRQn); + + // TODO - Setup clocks + + // TODO - Enable USB module + + // Enable IRQ + NVIC_SetVector(USB_IRQn, (uint32_t)&_usbisr); + NVIC_EnableIRQ(USB_IRQn); +} + +void USBPhyHw::deinit() +{ + // Disconnect and disable interrupt + disconnect(); + NVIC_DisableIRQ(USB_IRQn); +} + +bool USBPhyHw::powered() +{ + // TODO - return true if powered false otherwise. Devices which don't support + // this should always return true + return true; +} + +void USBPhyHw::connect() +{ + // TODO - Enable endpoint interrupts + + // TODO - Enable pullup on D+ +} + +void USBPhyHw::disconnect() +{ + // TODO - Disable all endpoints + + // TODO - Clear all endpoint interrupts + + // TODO - Disable pullup on D+ +} + +void USBPhyHw::configure() +{ + // TODO - set device to configured. Most device will not need this +} + +void USBPhyHw::unconfigure() +{ + // TODO - set device to unconfigured. Most device will not need this +} + +void USBPhyHw::sof_enable() +{ + // TODO - Enable SOF interrupt +} + +void USBPhyHw::sof_disable() +{ + // TODO - Disable SOF interrupt +} + +void USBPhyHw::set_address(uint8_t address) +{ + // TODO - set the device address. Address must take effect + // after the status phase of the current transfer +} + +void USBPhyHw::remote_wakeup() +{ + // TODO - Sent remote wakeup over USB lines (if supported) +} + +const usb_ep_table_t *USBPhyHw::endpoint_table() +{ + // TODO - Update the endpoint table for what your device supports + + static const usb_ep_table_t template_table = { + 4096 - 32 * 4, // 32 words for endpoint buffers + // +3 based added to interrupt and isochronous to ensure enough + // space for 4 byte alignment + { + {USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 0}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0} + } + }; + return &lpc_table; +} + +uint32_t USBPhyHw::ep0_set_max_packet(uint32_t max_packet) +{ + // TODO - set endpoint 0 size and return this size + return 64; +} + +// read setup packet +void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) +{ + // TODO - read up to size bytes of the setup packet +} + +void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) +{ + // TODO - setup data buffer to receive next endpoint 0 OUT packet +} + +uint32_t USBPhyHw::ep0_read_result() +{ + // TODO - return the size of the last OUT packet received on endpoint 0 + return 0; +} + +void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) +{ + // TODO - start transferring buffer on endpoint 0 IN +} + +void USBPhyHw::ep0_stall() +{ + // TODO - protocol stall endpoint 0. This stall must be automatically + // cleared by the next setup packet +} + +bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type) +{ + // TODO - enable this endpoint + + return true; +} + +void USBPhyHw::endpoint_remove(usb_ep_t endpoint) +{ + // TODO - disable and remove this endpoint +} + +void USBPhyHw::endpoint_stall(usb_ep_t endpoint) +{ + // TODO - stall this endpoint until it is explicitly cleared +} + +void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) +{ + // TODO - unstall this endpoint +} + +bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ + // TODO - setup data buffer to receive next endpoint OUT packet and return true if successful + return true; +} + +uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) +{ + // TODO - return the size of the last OUT packet received on endpoint +} + +bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ + // TODO - start transferring buffer on endpoint IN + + return true; +} + +void USBPhyHw::endpoint_abort(usb_ep_t endpoint) +{ + // TODO - stop the current transfer on this endpoint and don't call the IN or OUT callback +} + +void USBPhyHw::process() +{ + // TODO - update register for your mcu + + uint8_t stat = USB0->STAT; + + USB0->STAT = stat; // Clear pending interrupts + + // reset interrupt + if (stat & USB_STAT_RESET_MASK) { + + // TODO - disable all endpoints + + // TODO - clear all endpoint interrupts + + // TODO - enable control endpoint + + // reset bus for USBDevice layer + events->reset(); + + // Re-enable interrupt + NVIC_ClearPendingIRQ(USB_IRQn); + NVIC_EnableIRQ(USB_IRQn); + return; + } + + // power applied + if (stat & USB_STAT_POWERED) { + events->powered(true); + } + + // power lost + if (stat & USB_STAT_UNPOWERED) { + events->powered(false); + } + + // sleep interrupt + if (stat & USB_STAT_SUSPEND_MASK) { + events->suspend(true); + } + + // resume interrupt + if (stat & USB_STAT_RESUME_MASK) { + events->suspend(false); + } + + // sof interrupt + if (stat & USB_STAT_SOF_MASK) { + // SOF event, read frame number + events->sof(USB0->FRAME); + } + + // endpoint interrupt + if (stat & USB_STAT_EP_MASK) { + uint32_t ep_pending = USB->EP; + + // TODO - call endpoint 0 IN callback if pending + events->ep0_in(); + + // TODO - call endpoint 0 OUT callback if pending + events->ep0_out(); + + // TODO - call endpoint 0 SETUP callback if pending + events->ep0_setup(); + + for (int i = 0; i < 16; i++) { + // TODO - call endpoint i IN callback if pending + events->in(0x80 | i); + } + + for (int i = 0; i < 16; i++) { + // TODO - call endpoint i OUT callback if pending + events->out(); + } + + USB->EP = ep_pending; // clear pending + } + + // Re-enable interrupt + NVIC_ClearPendingIRQ(USB_IRQn); + NVIC_EnableIRQ(USB_IRQn); +} + +void USBPhyHw::_usbisr(void) { + NVIC_DisableIRQ(USB_IRQn); + instance->events->start_process(); +} From dd9537c50ceef64dcf4546c78373510fd73b1ae5 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 24 Mar 2018 11:00:26 +0100 Subject: [PATCH 162/488] Add pyusb to requirements Add pyusb to requirements so the greentea USB tests work. --- requirements.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/requirements.txt b/requirements.txt index 49d67828bf6..8fc11ebcbce 100644 --- a/requirements.txt +++ b/requirements.txt @@ -19,3 +19,4 @@ six==1.11.0 git+https://github.com/armmbed/manifest-tool.git@v1.4.6 mbed-cloud-sdk==2.0.1 icetea>=1.0.2,<1.1 +pyusb>=1.0.0 From a311d04d2aa4f2652af4b2ea742ee127c9e019bd Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 23 Mar 2018 14:10:14 +0100 Subject: [PATCH 163/488] Update USBTester product name Change the name reported by USBTester from CDC DEVICE to MBED TEST DEVICE. --- TESTS/usb_device/basic/USBTester.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index a30a819dd70..8dfed5ff004 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -286,9 +286,11 @@ const uint8_t *USBTester::string_iinterface_desc() const uint8_t *USBTester::string_iproduct_desc() { static const uint8_t string_iproduct_descriptor[] = { - 0x16, + 0x22, STRING_DESCRIPTOR, - 'C', 0, 'D', 0, 'C', 0, ' ', 0, 'D', 0, 'E', 0, 'V', 0, 'I', 0, 'C', 0, 'E', 0 + 'M', 0, 'B', 0, 'E', 0, 'D', 0, ' ', 0, + 'T', 0, 'E', 0, 'S', 0, 'T', 0, ' ', 0, + 'D', 0, 'E', 0, 'V', 0, 'I', 0, 'C', 0, 'E', 0, }; return string_iproduct_descriptor; } From 513ec667e1db18c69ccdea53b5666b66cb0fbb70 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Mon, 26 Mar 2018 12:59:49 +0200 Subject: [PATCH 164/488] Fix for USB set_clear_feature_test for OSX --- TESTS/host_tests/pyusb_basic.py | 54 --------------------------------- 1 file changed, 54 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index ae6c164a327..4b14f595368 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -491,11 +491,6 @@ def get_status_test(dev, log): def set_clear_feature_test(dev, log): - # The state of the Direction bit is ignored if the wLength field is zero, - # signifying there is no Data stage - see USB spec 9.3.1 - # according to this SET/CLEAR_FEATURE ignores direction bits and should - # work for both CTRL_OUT and CTRL_IN - # Control OUT SET_FEATURE on endpoint - halt request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, CTRL_RECIPIENT_ENDPOINT) @@ -544,55 +539,6 @@ def set_clear_feature_test(dev, log): if(ret != 0): raise_unconditionally(lineno(), "endpoint unhalthalt failed") - # retest for CTRL_IN - # Control IN SET_FEATURE on endpoint - halt - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_SET_FEATURE - value = FEATURE_ENDPOINT_HALT - index = 1 # Endpoint index - length = 0 # Always 0 for this request - try: - dev.ctrl_transfer(request_type, request, value, index, length) - except usb.core.USBError: - raise_unconditionally(lineno(), "endpoint halt failed") - - # check if endpoint was halted - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_GET_STATUS - value = 0 # Always 0 for this request - index = 1 # Endpoint index - length = 2 # Always 2 for this request (size of return data) - ret = dev.ctrl_transfer(request_type, request, value, index, length) - ret = ret[0] | (ret[1] << 8) - if(ret != 1): - raise_unconditionally(lineno(), "endpoint was not halted") - - # Control IN CLEAR_FEATURE on endpoint - unhalt - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_CLEAR_FEATURE - value = FEATURE_ENDPOINT_HALT - index = 1 # Endpoint index - length = 0 # Always 0 for this request - try: - dev.ctrl_transfer(request_type, request, value, index, length) - except usb.core.USBError: - raise_unconditionally(lineno(), "endpoint was not unhalted") - - # check if endpoint was unhalted - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_GET_STATUS - value = 0 # Always 0 for this request - index = 1 # Endpoint index - length = 2 # Always 2 for this request (size of return data) - ret = dev.ctrl_transfer(request_type, request, value, index, length) - ret = ret[0] - if(ret != 0): - raise_unconditionally(lineno(), "endpoint unhalthalt failed") - def get_set_interface_test(dev, log): # Control IN GET_INTERFACE From 8d029ee60b65f0fc0e114111f48ee68dd01f593a Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 24 Mar 2018 22:07:31 +0100 Subject: [PATCH 165/488] Skip USB reset tests on OSX OSX machines don't allow you to reset USB devices. Skip this test on OSX so testing can still be used. --- TESTS/host_tests/pyusb_basic.py | 5 +++++ TESTS/usb_device/basic/main.cpp | 5 ++++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 4b14f595368..640c9271f28 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -217,6 +217,10 @@ def _callback_repeated_construction_destruction_test(self, key, value, timestamp except (RuntimeError) as exc: self.report_error(exc) + def _callback_reset_support(self, key, value, timestamp): + status = "false" if sys.platform == "darwin" else "true" + self.log("Reset supported: %s" % status) + self.send_kv("placeholder", status) def find_device(self, serial_number): # to make it more reliable, 20 retries in 2[s] @@ -263,6 +267,7 @@ def setup(self): self.register_callback('device_suspend_resume_test', self._callback_device_suspend_resume_test) self.register_callback('repeated_construction_destruction_test', self._callback_repeated_construction_destruction_test) + self.register_callback('reset_support', self._callback_reset_support) def result(self): return self.__result diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index 1577a87148a..a9c08b214c7 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -107,7 +107,10 @@ void device_reset_test() char _key[11] = {}; char _value[128] = {}; - { + greentea_send_kv("reset_support", 0); + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + if (strcmp(_value, "false") != 0) { + USBTester serial(vendor_id, product_id, product_release, true); greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); From 1ae44cfe552c70303e14d86ce3587e65f33656b2 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 27 Mar 2018 16:00:13 +0200 Subject: [PATCH 166/488] Fix USB tests Change the direction used in set interface to match the USB specification. This allows USB tests to pass on OSX. --- TESTS/host_tests/pyusb_basic.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 640c9271f28..c361cbee03c 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -564,7 +564,7 @@ def get_set_interface_test(dev, log): control_data_test(dev, [64, 256], log) # Control IN SET_INTERFACE - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, CTRL_RECIPIENT_INTERFACE) request = REQUEST_SET_INTERFACE value = 1 # Alternative interface setting index @@ -592,7 +592,7 @@ def get_set_interface_test(dev, log): raise_unconditionally(lineno(), "GET_INTERFACE failed") # Control IN SET_INTERFACE restore interfejs settings - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, CTRL_RECIPIENT_INTERFACE) request = REQUEST_SET_INTERFACE value = 0 # Interface setting index From 58a4e118566a130b71a11da797cfaaafe86cefda Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Tue, 17 Apr 2018 13:57:05 +0200 Subject: [PATCH 167/488] target: arch_pro enable USBDEVICE support --- targets/targets.json | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/targets/targets.json b/targets/targets.json index d097b917ecd..b643d0d0360 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -641,7 +641,8 @@ "SPISLAVE", "STDIO_MESSAGES", "FLASH", - "MPU" + "MPU", + "USBDEVICE" ], "release_versions": ["2", "5"], "device_name": "LPC1768", From 9b52f6033bd186e668716069263e4481eea47e95 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Tue, 17 Apr 2018 12:47:27 +0200 Subject: [PATCH 168/488] USB reset test fix --- TESTS/usb_device/basic/main.cpp | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index a9c08b214c7..105913392e2 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -112,29 +112,28 @@ void device_reset_test() if (strcmp(_value, "false") != 0) { USBTester serial(vendor_id, product_id, product_release, true); - - greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); serial.clear_reset_count(); - // Wait for host before terminating + greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); while(serial.get_reset_count() == 0); + // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); TEST_ASSERT_EQUAL_STRING("pass", _key); while(!serial.configured()); - greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); serial.clear_reset_count(); - // Wait for host before terminating + greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); while(serial.get_reset_count() == 0); + // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); TEST_ASSERT_EQUAL_STRING("pass", _key); while(!serial.configured()); - greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); serial.clear_reset_count(); - // Wait for host before terminating + greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); while(serial.get_reset_count() == 0); + // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); TEST_ASSERT_EQUAL_STRING("pass", _key); From 0f7937ad3b26728da758648dcbd0a492fe86b05a Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Mon, 16 Apr 2018 09:23:21 +0200 Subject: [PATCH 169/488] USBDevice - add support for deconfiguration --- TESTS/usb_device/basic/USBTester.cpp | 109 ++++++++++++++++----------- TESTS/usb_device/basic/USBTester.h | 9 ++- 2 files changed, 74 insertions(+), 44 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index 8dfed5ff004..70b89e906b4 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -37,8 +37,9 @@ #define MIN_EP_SIZE 8 -USBTester::USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): USBDevice(vendor_id, product_id, product_release), - reset_count(0), suspend_count(0), resume_count(0) +USBTester::USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): + USBDevice(vendor_id, product_id, product_release), reset_count(0), suspend_count(0), + resume_count(0), interface_set(NONE), configuration_set(NONE) { EndpointResolver resolver(endpoint_table()); @@ -86,6 +87,16 @@ void USBTester::suspend(bool suspended) } } +void USBTester::remove_endpoints() +{ + if(configuration_set == 1) { + endpoint_remove(int_in); + endpoint_remove(int_out); + endpoint_remove(bulk_in); + endpoint_remove(bulk_out); + } +} + const char *USBTester::get_serial_desc_string() { return get_desc_string(string_iserial_desc()); @@ -105,8 +116,16 @@ const char *USBTester::get_iproduct_desc_string() void USBTester::callback_state_change(DeviceState new_state) { - // Nothing to do -}; + if (new_state != Configured) { + configuration_set = NONE; + interface_set = NONE; + } +} + +void USBTester::callback_reset() +{ + ++reset_count; +} void USBTester::callback_request(const setup_packet_t *setup) { @@ -196,57 +215,61 @@ void USBTester::callback_request_xfer_done(const setup_packet_t *setup, bool abo // configuration is not supported. void USBTester::callback_set_configuration(uint8_t configuration) { - if (configuration != DEFAULT_CONFIGURATION) { + if (configuration == DEFAULT_CONFIGURATION) { + complete_set_configuration(set_configuration(configuration)); + } else { complete_set_configuration(false); - return; } +} - // Configure endpoints > 0 - endpoint_add(int_in, MAX_EP_SIZE, USB_EP_TYPE_INT); - endpoint_add(int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); - read_start(int_out, int_buf, sizeof(int_buf)); - endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); - endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); - read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); - - complete_set_configuration(true); +bool USBTester::set_configuration(uint16_t configuration) +{ + if(set_interface(configuration, 0, 0)) { + configuration_set = configuration; + return true; + } + return false; } void USBTester::callback_set_interface(uint16_t interface, uint8_t alternate) { - if (interface == 0 && alternate == 0) { - endpoint_remove(int_in); - endpoint_remove(int_out); - endpoint_remove(bulk_in); - endpoint_remove(bulk_out); + bool success = set_interface(configuration_set, interface, alternate); + complete_set_interface(success); +} - endpoint_add(int_in, MAX_EP_SIZE, USB_EP_TYPE_INT); - endpoint_add(int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); - read_start(int_out, int_buf, sizeof(int_buf)); - endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); - endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); - read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); +bool USBTester::set_interface(uint16_t configuration, uint16_t interface, uint16_t alternate) +{ + bool success = false; - complete_set_interface(true); - return; - } - if (interface == 0 && alternate == 1) { - endpoint_remove(int_in); - endpoint_remove(int_out); - endpoint_remove(bulk_in); - endpoint_remove(bulk_out); + if (configuration == 1) { + if (interface == 0 && alternate == 0) { + remove_endpoints(); - endpoint_add(int_in, MIN_EP_SIZE, USB_EP_TYPE_INT); - endpoint_add(int_out, MIN_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); - read_start(int_out, int_buf, sizeof(int_buf)); - endpoint_add(bulk_in, MIN_EP_SIZE, USB_EP_TYPE_BULK); - endpoint_add(bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); - read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); + endpoint_add(int_in, MAX_EP_SIZE, USB_EP_TYPE_INT); + endpoint_add(int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); + read_start(int_out, int_buf, sizeof(int_buf)); + endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); + endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); + read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); - complete_set_interface(true); - return; + interface_set = interface; + success = true; + } + if (interface == 0 && alternate == 1) { + remove_endpoints(); + + endpoint_add(int_in, MIN_EP_SIZE, USB_EP_TYPE_INT); + endpoint_add(int_out, MIN_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); + read_start(int_out, int_buf, sizeof(int_buf)); + endpoint_add(bulk_in, MIN_EP_SIZE, USB_EP_TYPE_BULK); + endpoint_add(bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); + read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); + + interface_set = interface; + success = true; + } } - complete_set_interface(false); + return success; } const uint8_t *USBTester::device_desc() diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index b7005c98c0d..4b286b3e971 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -55,8 +55,15 @@ class USBTester: public USBDevice { void clear_resume_count() { resume_count = 0; } private: + + enum { NONE = -1 }; const char *get_desc_string(const uint8_t *desc); virtual void suspend(bool suspended); + void remove_endpoints(); + bool set_configuration(uint16_t configuration); + bool set_interface(uint16_t configuration, uint16_t interface, uint16_t alternate); + int16_t interface_set; + int16_t configuration_set; protected: @@ -107,7 +114,7 @@ class USBTester: public USBDevice { virtual void callback_set_interface(uint16_t interface, uint8_t alternate); virtual void epbulk_out_callback(usb_ep_t endpoint); virtual void epint_out_callback(usb_ep_t endpoint); - virtual void callback_reset() { ++reset_count; } + virtual void callback_reset(); uint8_t ctrl_buf[2048]; }; From 198364759a2ed4838c409d68d185d96c1f5f1e9f Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Mon, 16 Apr 2018 10:30:57 +0200 Subject: [PATCH 170/488] USBDevice - add multiconfiguration support --- TESTS/usb_device/basic/USBTester.cpp | 10 +++++++--- TESTS/usb_device/basic/USBTester.h | 3 ++- usb/device/USBDevice/USBDevice.cpp | 29 +++++++++++++++------------- usb/device/USBDevice/USBDevice.h | 6 ++++-- usb/device/USBSerial/USBCDC.cpp | 12 ++++++++---- usb/device/USBSerial/USBCDC.h | 3 ++- 6 files changed, 39 insertions(+), 24 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index 70b89e906b4..a6010c7be30 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -52,7 +52,7 @@ USBTester::USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_r MBED_ASSERT(resolver.valid()); queue = mbed_highprio_event_queue(); - configuration_desc(); + configuration_desc(0); init(); USBDevice::connect(connect_blocking); @@ -321,7 +321,7 @@ const uint8_t *USBTester::string_iproduct_desc() #define CONFIG1_DESC_SIZE (9+9+7+7+7+7 + 9+7+7+7+7) -const uint8_t *USBTester::configuration_desc() +const uint8_t *USBTester::configuration_desc(uint8_t index) { static const uint8_t config_descriptor[] = { // configuration descriptor @@ -434,7 +434,11 @@ const uint8_t *USBTester::configuration_desc() 1 // bInterval }; - return config_descriptor; + if (index == 0) { + return config_descriptor; + } else { + return NULL; + } } diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index 4b286b3e971..332507882e1 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -91,9 +91,10 @@ class USBTester: public USBDevice { /* * Get configuration descriptor * + * @param index descriptor index * @returns pointer to the configuration descriptor */ - virtual const uint8_t *configuration_desc(); + virtual const uint8_t *configuration_desc(uint8_t index); protected: uint8_t bulk_in; diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 611f91b1e1a..d0a915febd0 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -76,22 +76,25 @@ bool USBDevice::_request_get_descriptor() } break; case CONFIGURATION_DESCRIPTOR: - if (configuration_desc() != NULL) { - if ((configuration_desc()[0] == CONFIGURATION_DESCRIPTOR_LENGTH) \ - && (configuration_desc()[1] == CONFIGURATION_DESCRIPTOR)) { + { + const uint8_t idx = DESCRIPTOR_INDEX(_transfer.setup.wValue); + if (configuration_desc(idx) != NULL) { + if ((configuration_desc(idx)[0] == CONFIGURATION_DESCRIPTOR_LENGTH) \ + && (configuration_desc(idx)[1] == CONFIGURATION_DESCRIPTOR)) { #ifdef DEBUG printf("conf descr request\r\n"); #endif /* Get wTotalLength */ - _transfer.remaining = configuration_desc()[2] \ - | (configuration_desc()[3] << 8); + _transfer.remaining = configuration_desc(idx)[2] \ + | (configuration_desc(idx)[3] << 8); - _transfer.ptr = (uint8_t *)configuration_desc(); + _transfer.ptr = (uint8_t *)configuration_desc(idx); _transfer.direction = Send; success = true; } } break; + } case STRING_DESCRIPTOR: #ifdef DEBUG printf("str descriptor\r\n"); @@ -1126,24 +1129,24 @@ void USBDevice::endpoint_unstall(usb_ep_t endpoint) unlock(); } -uint8_t *USBDevice::find_descriptor(uint8_t descriptorType) +uint8_t *USBDevice::find_descriptor(uint8_t descriptorType, uint8_t index) { /* Find a descriptor within the list of descriptors */ /* following a configuration descriptor. */ uint16_t wTotalLength; uint8_t *ptr; - if (configuration_desc() == NULL) { + if (configuration_desc(index) == NULL) { return NULL; } /* Check this is a configuration descriptor */ - if ((configuration_desc()[0] != CONFIGURATION_DESCRIPTOR_LENGTH) \ - || (configuration_desc()[1] != CONFIGURATION_DESCRIPTOR)) { + if ((configuration_desc(index)[0] != CONFIGURATION_DESCRIPTOR_LENGTH) \ + || (configuration_desc(index)[1] != CONFIGURATION_DESCRIPTOR)) { return NULL; } - wTotalLength = configuration_desc()[2] | (configuration_desc()[3] << 8); + wTotalLength = configuration_desc(index)[2] | (configuration_desc(index)[3] << 8); /* Check there are some more descriptors to follow */ if (wTotalLength <= (CONFIGURATION_DESCRIPTOR_LENGTH + 2)) @@ -1153,7 +1156,7 @@ uint8_t *USBDevice::find_descriptor(uint8_t descriptorType) } /* Start at first descriptor after the configuration descriptor */ - ptr = &(((uint8_t *)configuration_desc())[CONFIGURATION_DESCRIPTOR_LENGTH]); + ptr = &(((uint8_t *)configuration_desc(index))[CONFIGURATION_DESCRIPTOR_LENGTH]); do { if (ptr[1] /* bDescriptorType */ == descriptorType) { @@ -1163,7 +1166,7 @@ uint8_t *USBDevice::find_descriptor(uint8_t descriptorType) /* Skip to next descriptor */ ptr += ptr[0]; /* bLength */ - } while (ptr < (configuration_desc() + wTotalLength)); + } while (ptr < (configuration_desc(index) + wTotalLength)); /* Reached end of the descriptors - not found */ return NULL; diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 698591b2e66..5353d50d38f 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -264,9 +264,10 @@ class USBDevice: public USBPhyEvents { /* * Get configuration descriptor * + * @param index descriptor index * @returns pointer to the configuration descriptor */ - virtual const uint8_t *configuration_desc() + virtual const uint8_t *configuration_desc(uint8_t index) { return NULL; }; @@ -465,9 +466,10 @@ class USBDevice: public USBPhyEvents { * Find a descriptor type inside the configuration descriptor * * @param descriptor_type Type of descriptor to find + * @param index Configuration descriptor index ( 0 if only one configuration present ) * @return A descriptor of the given type or NULL if none were found */ - uint8_t *find_descriptor(uint8_t descriptor_type); + uint8_t *find_descriptor(uint8_t descriptor_type, uint8_t index = 0); /** * Get the endpoint table of this device diff --git a/usb/device/USBSerial/USBCDC.cpp b/usb/device/USBSerial/USBCDC.cpp index 519ebe72182..1e5993e7e5d 100644 --- a/usb/device/USBSerial/USBCDC.cpp +++ b/usb/device/USBSerial/USBCDC.cpp @@ -535,7 +535,7 @@ const uint8_t *USBCDC::string_iproduct_desc() #define CONFIG1_DESC_SIZE (9+8+9+5+5+4+5+7+9+7+7) -const uint8_t *USBCDC::configuration_desc() +const uint8_t *USBCDC::configuration_desc(uint8_t index) { uint8_t config_descriptor_temp[] = { // configuration descriptor @@ -635,7 +635,11 @@ const uint8_t *USBCDC::configuration_desc() 0 // bInterval }; - MBED_ASSERT(sizeof(config_descriptor_temp) == sizeof(_config_descriptor)); - memcpy(_config_descriptor, config_descriptor_temp, sizeof(_config_descriptor)); - return _config_descriptor; + if (index == 0) { + MBED_ASSERT(sizeof(config_descriptor_temp) == sizeof(_config_descriptor)); + memcpy(_config_descriptor, config_descriptor_temp, sizeof(_config_descriptor)); + return _config_descriptor; + } else { + return NULL; + } } diff --git a/usb/device/USBSerial/USBCDC.h b/usb/device/USBSerial/USBCDC.h index 1c3c6dc3816..15222bc91a2 100644 --- a/usb/device/USBSerial/USBCDC.h +++ b/usb/device/USBSerial/USBCDC.h @@ -124,9 +124,10 @@ class USBCDC: public USBDevice { /* * Get configuration descriptor * + * @param index descriptor index * @returns pointer to the configuration descriptor */ - virtual const uint8_t *configuration_desc(); + virtual const uint8_t *configuration_desc(uint8_t index); /* * Called by USBCallback_requestCompleted when CDC line coding is changed From 7d11de6cc415394d6b69e4e2566ef9aef9a69b4d Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Mon, 16 Apr 2018 10:35:24 +0200 Subject: [PATCH 171/488] code formatting fixes --- TESTS/usb_device/basic/USBTester.cpp | 10 ++++------ usb/device/USBDevice/USBDevice.cpp | 12 +++++++++++- 2 files changed, 15 insertions(+), 7 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index a6010c7be30..bf700d241d6 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -67,11 +67,11 @@ USBTester::~USBTester() const char *USBTester::get_desc_string(const uint8_t *desc) { - static char ret_string[128] = {}; + static char ret_string[128] = { }; const uint8_t desc_size = desc[0] - 2; const uint8_t *desc_str = &desc[2]; uint32_t j = 0; - for(uint32_t i = 0; i < desc_size; i+=2, j++) { + for (uint32_t i = 0; i < desc_size; i += 2, j++) { ret_string[j] = desc_str[i]; } ret_string[j] = '\0'; @@ -80,7 +80,7 @@ const char *USBTester::get_desc_string(const uint8_t *desc) void USBTester::suspend(bool suspended) { - if(suspended) { + if (suspended) { ++suspend_count; } else { ++resume_count; @@ -146,7 +146,7 @@ void USBTester::callback_request(const setup_packet_t *setup) case VENDOR_TEST_CTRL_OUT: result = Receive; data = ctrl_buf; - size = setup->wValue < 8 ? setup->wValue : 8; + size = setup->wValue < 8 ? setup->wValue : 8; break; case VENDOR_TEST_CTRL_NONE: result = Success; @@ -176,8 +176,6 @@ void USBTester::callback_request(const setup_packet_t *setup) } else { complete_request(result, data, size); } - - } void USBTester::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index d0a915febd0..3b69734e847 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -62,6 +62,7 @@ bool USBDevice::_request_get_descriptor() #endif switch (DESCRIPTOR_TYPE(_transfer.setup.wValue)) { case DEVICE_DESCRIPTOR: + { if (device_desc() != NULL) { if ((device_desc()[0] == DEVICE_DESCRIPTOR_LENGTH) \ && (device_desc()[1] == DEVICE_DESCRIPTOR)) { @@ -75,6 +76,7 @@ bool USBDevice::_request_get_descriptor() } } break; + } case CONFIGURATION_DESCRIPTOR: { const uint8_t idx = DESCRIPTOR_INDEX(_transfer.setup.wValue); @@ -96,6 +98,7 @@ bool USBDevice::_request_get_descriptor() break; } case STRING_DESCRIPTOR: + { #ifdef DEBUG printf("str descriptor\r\n"); #endif @@ -156,21 +159,29 @@ bool USBDevice::_request_get_descriptor() break; } break; + } case INTERFACE_DESCRIPTOR: + { #ifdef DEBUG printf("interface descr\r\n"); #endif + break; + } case ENDPOINT_DESCRIPTOR: + { #ifdef DEBUG printf("endpoint descr\r\n"); #endif /* TODO: Support is optional, not implemented here */ break; + } default: + { #ifdef DEBUG printf("ERROR\r\n"); #endif break; + } } return success; @@ -406,7 +417,6 @@ void USBDevice::_complete_set_configuration() _phy->ep0_stall(); return; } - } bool USBDevice::_request_get_configuration() From 178ece956e652daf5d51d88d460c71ceab0a3f30 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 19 Apr 2018 09:55:07 -0500 Subject: [PATCH 172/488] Add endpoint_remove_all helper function Add the helper function endpoint_remove_all which removes all added endpoints. This is useful for class drivers switching between different USB configurations. --- usb/device/USBDevice/USBDevice.cpp | 15 +++++++++++++++ usb/device/USBDevice/USBDevice.h | 5 +++++ 2 files changed, 20 insertions(+) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 3b69734e847..393c51133d3 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -36,6 +36,7 @@ /* Endpoint macros */ #define EP_INDEXABLE(endpoint) (EP_VALID(endpoint) && !EP_CONTROL(endpoint)) #define EP_TO_INDEX(endpoint) ((((endpoint & 0xf) << 1) | (endpoint & 0x80 ? 1 : 0)) - 2) +#define INDEX_TO_EP(index) ((usb_ep_t)((((index) >> 1) | (index & 1 ? 0x80 : 0)) + 1)) #define EP_VALID(endpoint) (((endpoint) & ~0x8F) == 0) #define EP_CONTROL(endpoint) (((endpoint) & 0xF) == 0) #define EP_RX(endpoint) ((endpoint) & 0x80) @@ -1101,6 +1102,20 @@ void USBDevice::endpoint_remove(usb_ep_t endpoint) unlock(); } +void USBDevice::endpoint_remove_all() +{ + lock(); + + for (uint32_t i = 0; i < sizeof(_endpoint_info) / sizeof(_endpoint_info[0]); i++) { + endpoint_info_t *info = _endpoint_info + i; + if (info->flags & ENDPOINT_ENABLED) { + endpoint_remove(INDEX_TO_EP(i)); + } + } + + unlock(); +} + void USBDevice::endpoint_stall(usb_ep_t endpoint) { lock(); diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 5353d50d38f..91bb7513363 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -175,6 +175,11 @@ class USBDevice: public USBPhyEvents { */ void endpoint_remove(usb_ep_t endpoint); + /** + * Remove all non-zero endpoints + */ + void endpoint_remove_all(); + /** * Stall an endpoint * From 3dcd5cd2e2763f3aff16ee9b7249b21afeb91265 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Mon, 23 Apr 2018 11:54:50 +0200 Subject: [PATCH 173/488] USBDevice: endpoint_add/read_start functions return value fix --- usb/device/USBDevice/USBDevice.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 393c51133d3..fdc49a83eac 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -1063,8 +1063,8 @@ bool USBDevice::endpoint_add(usb_ep_t endpoint, uint32_t max_packet_size, usb_ep MBED_ASSERT(!(info->flags & ENDPOINT_ENABLED)); MBED_ASSERT(max_packet_size <= 1024); - bool ret = false; - if (_phy->endpoint_add(endpoint, max_packet_size, type)) { + bool ret = _phy->endpoint_add(endpoint, max_packet_size, type); + if (ret) { info->callback = callback; info->flags |= ENDPOINT_ENABLED; info->pending = 0; @@ -1366,7 +1366,7 @@ bool USBDevice::read_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size unlock(); - return true; + return ret; } uint32_t USBDevice::read_finish(usb_ep_t endpoint) From 48c71d448dcc18e0e088a751472e6ecf82cfd969 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sun, 22 Apr 2018 22:14:47 -0500 Subject: [PATCH 174/488] Prevent Kinetis USB setup packets at wrong time When disconnecting USB clear all pending interrupts. This ensures that pending setup packets are dropped rather than being triggered after disconnect. --- usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp index 84c50d94b6c..89fca0f81c4 100644 --- a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp +++ b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp @@ -203,6 +203,10 @@ void USBPhyHw::disconnect() USB0->CTL &= ~USB_CTL_USBENSOFEN_MASK; // Pull up disable USB0->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK; + + while (USB0->ISTAT) { + USB0->ISTAT = 0xFF; + } } void USBPhyHw::configure() From ecacbb74def345d9fb4a1eb0c7b7075f5f8f80b6 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 23 Apr 2018 17:58:05 -0500 Subject: [PATCH 175/488] Fix Kinetis USB disconnect When disconnecting in the middle of a setup packet USB stops working even after being re-connected. This is because the setup packet suspended endpoint events but nothing resumed endpoint events. This patch adds code to resume endpoint events in the reset handler. --- usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp index 89fca0f81c4..c8a55e1a667 100644 --- a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp +++ b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp @@ -565,6 +565,7 @@ void USBPhyHw::process() Data1 = 0x55555555; USB0->CTL |= USB_CTL_ODDRST_MASK; + USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; USB0->ISTAT = 0xFF; // clear all interrupt status flags USB0->ERRSTAT = 0xFF; // clear all error flags From 9328d639d6ff7f30bb9a9230bcae38aae0c1b01b Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 23 Apr 2018 18:03:34 -0500 Subject: [PATCH 176/488] Make USB disconnect + connect time explicit Create the define MIN_DISCONNECT_TIME_US to be used as the amount of time that must pass between connect and disconnect for the host to reliably detect reconnection. Replace the wait calls delaying for this value to wait_us to indicate the precision required. Finally, remove the unnecessary calls to wait_ms in repeated_construction_destruction_test. --- TESTS/usb_device/basic/main.cpp | 34 +++++++++++++++------------------ 1 file changed, 15 insertions(+), 19 deletions(-) diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index 105913392e2..f18168013a9 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -23,6 +23,12 @@ #include "USBTester.h" +// If disconnect() + connect() occur too fast the reset event will be dropped. +// At a minimum there should be a 200us delay between disconnect and connect. +// To be on the safe side I would recommend a 1ms delay, so the host controller +// has an entire USB frame to detect the disconnect. +#define MIN_DISCONNECT_TIME_US 1000 + #if !defined(DEVICE_USBDEVICE) || !DEVICE_USBDEVICE #error [NOT_SUPPORTED] USB Device not supported for this target #endif @@ -166,11 +172,7 @@ void device_soft_reconnection_test() for(int i = 0; i < reconnect_try_count; i++) { serial.disconnect(); - // If disconnect() + connect() occur too fast the reset event will be dropped. - // At a minimum there should be a 200us delay between disconnect and connect. - // To be on the safe side I would recommend a 1ms delay, so the host controller - // has an entire USB frame to detect the disconnect. - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); serial.connect(); greentea_send_kv("device_soft_reconnection_test", serial.get_serial_desc_string()); // Wait for host before terminating @@ -179,13 +181,13 @@ void device_soft_reconnection_test() } serial.disconnect(); - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); serial.connect(); serial.disconnect(); - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); serial.connect(); serial.disconnect(); - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); serial.connect(); greentea_send_kv("device_soft_reconnection_test", serial.get_serial_desc_string()); // Wait for host before terminating @@ -228,50 +230,44 @@ void repeated_construction_destruction_test() { USBTester serial(vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); - wait_ms(1); } - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); { USBTester serial(vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); - wait_ms(1); } - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); { USBTester serial(vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); - wait_ms(1); } - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); { USBTester serial(vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); - wait_ms(1); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); TEST_ASSERT_EQUAL_STRING("pass", _key); } - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); { USBTester serial(vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); - wait_ms(1); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); TEST_ASSERT_EQUAL_STRING("pass", _key); } - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); { USBTester serial(vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); - wait_ms(1); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); From 8c84e1631551d061ec2e2d5f21216d9ea3d23098 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 23 Apr 2018 18:50:28 -0500 Subject: [PATCH 177/488] Explicitly specify USBPhy used for testing Add a parameter to the USBPhy class so mock or wrapper USBPhy classes can be used. --- TESTS/usb_device/basic/USBTester.cpp | 4 ++-- TESTS/usb_device/basic/USBTester.h | 2 +- TESTS/usb_device/basic/main.cpp | 32 +++++++++++++++++----------- 3 files changed, 22 insertions(+), 16 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index bf700d241d6..8ca9b11c248 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -37,8 +37,8 @@ #define MIN_EP_SIZE 8 -USBTester::USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): - USBDevice(vendor_id, product_id, product_release), reset_count(0), suspend_count(0), +USBTester::USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): + USBDevice(phy, vendor_id, product_id, product_release), reset_count(0), suspend_count(0), resume_count(0), interface_set(NONE), configuration_set(NONE) { diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index 332507882e1..d6c534ddc74 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -36,7 +36,7 @@ class USBTester: public USBDevice { * @param product_release Your preoduct_release * @param connect_blocking define if the connection must be blocked if USB not plugged in */ - USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); + USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); ~USBTester(); diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index f18168013a9..8ccd4c5e4e7 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -22,6 +22,7 @@ #include "utest/utest.h" #include "USBTester.h" +#include "usb_phy_api.h" // If disconnect() + connect() occur too fast the reset event will be dropped. // At a minimum there should be a 200us delay between disconnect and connect. @@ -35,6 +36,11 @@ using namespace utest::v1; +static USBPhy *get_phy() +{ + return get_usb_phy(); +} + void control_basic_test() { uint16_t vendor_id = 0x0d28; @@ -45,7 +51,7 @@ void control_basic_test() char str[128] = {}; { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); sprintf (str, "%s %d %d", serial.get_serial_desc_string(), vendor_id, product_id); greentea_send_kv("control_basic_test", str); // Wait for host before terminating @@ -63,7 +69,7 @@ void control_stall_test() char _value[128] = {}; { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); greentea_send_kv("control_stall_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); @@ -80,7 +86,7 @@ void control_sizes_test() char _value[128] = {}; { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); greentea_send_kv("control_sizes_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); @@ -97,7 +103,7 @@ void control_stress_test() char _value[128] = {}; { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); greentea_send_kv("control_stress_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); @@ -117,7 +123,7 @@ void device_reset_test() greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); if (strcmp(_value, "false") != 0) { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); serial.clear_reset_count(); greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); while(serial.get_reset_count() == 0); @@ -163,7 +169,7 @@ void device_soft_reconnection_test() const uint32_t reconnect_try_count = 3; { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); greentea_send_kv("device_soft_reconnection_test", serial.get_serial_desc_string()); // Wait for host before terminating @@ -205,7 +211,7 @@ void device_suspend_resume_test() char _value[128] = {}; { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); greentea_send_kv("device_suspend_resume_test", serial.get_serial_desc_string()); printf("[1] suspend_count: %d resume_count: %d\n", serial.get_suspend_count(), serial.get_resume_count()); serial.clear_suspend_count(); @@ -228,25 +234,25 @@ void repeated_construction_destruction_test() char _value[128] = {}; { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); } wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); } wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); } wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating @@ -256,7 +262,7 @@ void repeated_construction_destruction_test() wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating @@ -266,7 +272,7 @@ void repeated_construction_destruction_test() wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating From 8313ad00ba2191c5959b98380f762b9584cbbfc5 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Wed, 25 Apr 2018 15:15:40 +0200 Subject: [PATCH 178/488] Extend USB test class configuration --- TESTS/usb_device/basic/USBTester.cpp | 422 +++++++++++++++++++++------ TESTS/usb_device/basic/USBTester.h | 9 +- 2 files changed, 338 insertions(+), 93 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index 8ca9b11c248..24ca3df704c 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -21,6 +21,7 @@ #include "EndpointResolver.h" #define DEFAULT_CONFIGURATION (1) +#define LAST_CONFIGURATION (2) #define VENDOR_TEST_CTRL_IN 1 #define VENDOR_TEST_CTRL_OUT 2 @@ -39,7 +40,7 @@ USBTester::USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): USBDevice(phy, vendor_id, product_id, product_release), reset_count(0), suspend_count(0), - resume_count(0), interface_set(NONE), configuration_set(NONE) + resume_count(0), interface_0_alt_set(NONE), interface_1_alt_set(NONE), configuration_set(NONE) { EndpointResolver resolver(endpoint_table()); @@ -87,16 +88,6 @@ void USBTester::suspend(bool suspended) } } -void USBTester::remove_endpoints() -{ - if(configuration_set == 1) { - endpoint_remove(int_in); - endpoint_remove(int_out); - endpoint_remove(bulk_in); - endpoint_remove(bulk_out); - } -} - const char *USBTester::get_serial_desc_string() { return get_desc_string(string_iserial_desc()); @@ -112,13 +103,12 @@ const char *USBTester::get_iproduct_desc_string() return get_desc_string(string_iserial_desc()); } - - void USBTester::callback_state_change(DeviceState new_state) { if (new_state != Configured) { configuration_set = NONE; - interface_set = NONE; + interface_0_alt_set = NONE; + interface_1_alt_set = NONE; } } @@ -205,7 +195,7 @@ void USBTester::callback_request_xfer_done(const setup_packet_t *setup, bool abo break; } } - complete_request_xfer_done(true); + complete_request_xfer_done(result); } // Called in ISR context @@ -213,58 +203,146 @@ void USBTester::callback_request_xfer_done(const setup_packet_t *setup, bool abo // configuration is not supported. void USBTester::callback_set_configuration(uint8_t configuration) { - if (configuration == DEFAULT_CONFIGURATION) { - complete_set_configuration(set_configuration(configuration)); - } else { - complete_set_configuration(false); + bool ret = false; + + if (configuration >= DEFAULT_CONFIGURATION && configuration <= LAST_CONFIGURATION) { + endpoint_remove_all(); + ret = set_configuration(configuration); + } + + complete_set_configuration(ret); +} + +bool USBTester::setup_iterface(uint8_t ep_in, uint8_t ep_out, uint32_t ep_size, usb_ep_type_t ep_type, + uint8_t *buf, uint32_t buf_size, void (USBTester::*callback)(usb_ep_t endpoint)) +{ + bool success = false; + + success = endpoint_add(ep_in, ep_size, ep_type); + success &= endpoint_add(ep_out, ep_size, ep_type, callback); + success &= read_start(ep_out, buf, buf_size); + return success; +} + +void USBTester::remove_iterface(uint16_t interface) +{ + if (configuration_set == 1) { + if (interface == 0) { + endpoint_remove(bulk_in); + endpoint_remove(bulk_out); + interface_0_alt_set = NONE; + } + if (interface == 1) { + endpoint_remove(int_in); + endpoint_remove(int_out); + interface_1_alt_set = NONE; + } + } + if (configuration_set == 2) { + if (interface == 0) { + endpoint_remove(int_in); + endpoint_remove(int_out); + interface_0_alt_set = NONE; + } + if (interface == 1) { + endpoint_remove(bulk_in); + endpoint_remove(bulk_out); + interface_1_alt_set = NONE; + } } } bool USBTester::set_configuration(uint16_t configuration) { - if(set_interface(configuration, 0, 0)) { + bool success = false; + // set 0 alt setting for each interface + if (configuration == 1) { + // interface 0 alternate 0 + success = setup_iterface(bulk_in, bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, + bulk_buf, sizeof(bulk_buf), &USBTester::epbulk_out_callback); + // interface 1 alternate 0 + success &= setup_iterface(int_in, int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, + int_buf, sizeof(int_buf), &USBTester::epint_out_callback); + } else if (configuration == 2) { + // interface 0 alternate 0 + success = setup_iterface(int_in, int_out, MIN_EP_SIZE, USB_EP_TYPE_INT, + int_buf, sizeof(int_buf), &USBTester::epint_out_callback); + // interface 1 alternate 0 + success &= setup_iterface(bulk_in, bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, + bulk_buf, sizeof(bulk_buf), &USBTester::epbulk_out_callback); + } + if (success) { configuration_set = configuration; - return true; + interface_0_alt_set = interface_1_alt_set = 0; } - return false; + return success; } void USBTester::callback_set_interface(uint16_t interface, uint8_t alternate) { - bool success = set_interface(configuration_set, interface, alternate); - complete_set_interface(success); + complete_set_interface(set_interface(interface, alternate)); } -bool USBTester::set_interface(uint16_t configuration, uint16_t interface, uint16_t alternate) +bool USBTester::set_interface(uint16_t interface, uint16_t alternate) { bool success = false; - if (configuration == 1) { - if (interface == 0 && alternate == 0) { - remove_endpoints(); - - endpoint_add(int_in, MAX_EP_SIZE, USB_EP_TYPE_INT); - endpoint_add(int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); - read_start(int_out, int_buf, sizeof(int_buf)); - endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); - endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); - read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); - - interface_set = interface; - success = true; + if (interface == 0) { + if (configuration_set == 1) { + if (alternate == 0) { + remove_iterface(interface); + success = setup_iterface(bulk_in, bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, + bulk_buf, sizeof(bulk_buf), &USBTester::epbulk_out_callback); + } + if (alternate == 1) { + remove_iterface(interface); + success = setup_iterface(bulk_in, bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, + bulk_buf, sizeof(bulk_buf), &USBTester::epbulk_out_callback); + } + } + if (configuration_set == 2) { + if (alternate == 0) { + remove_iterface(interface); + success = setup_iterface(int_in, int_out, MIN_EP_SIZE, USB_EP_TYPE_INT, + int_buf, sizeof(int_buf), &USBTester::epint_out_callback); + } + if (alternate == 1) { + remove_iterface(interface); + success = setup_iterface(int_in, int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, + int_buf, sizeof(int_buf), &USBTester::epint_out_callback); + } + } + if (success) { + interface_0_alt_set = alternate; + } + } + if (interface == 1) { + if (configuration_set == 1) { + if (alternate == 0) { + remove_iterface(interface); + success = setup_iterface(int_in, int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, + int_buf, sizeof(int_buf), &USBTester::epint_out_callback); + } + if (alternate == 1) { + remove_iterface(interface); + success = setup_iterface(int_in, int_out, MIN_EP_SIZE, USB_EP_TYPE_INT, + int_buf, sizeof(int_buf), &USBTester::epint_out_callback); + } } - if (interface == 0 && alternate == 1) { - remove_endpoints(); - - endpoint_add(int_in, MIN_EP_SIZE, USB_EP_TYPE_INT); - endpoint_add(int_out, MIN_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); - read_start(int_out, int_buf, sizeof(int_buf)); - endpoint_add(bulk_in, MIN_EP_SIZE, USB_EP_TYPE_BULK); - endpoint_add(bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); - read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); - - interface_set = interface; - success = true; + if (configuration_set == 2) { + if (alternate == 0) { + remove_iterface(interface); + success = setup_iterface(bulk_in, bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, + bulk_buf, sizeof(bulk_buf), &USBTester::epbulk_out_callback); + } + if (alternate == 1) { + remove_iterface(interface); + success = setup_iterface(bulk_in, bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, + bulk_buf, sizeof(bulk_buf), &USBTester::epbulk_out_callback); + } + } + if (success) { + interface_1_alt_set = alternate; } } return success; @@ -287,7 +365,7 @@ const uint8_t *USBTester::device_desc() 1, // iManufacturer 2, // iProduct 3, // iSerialNumber - 1 // bNumConfigurations + 2 // bNumConfigurations }; MBED_ASSERT(sizeof(device_descriptor_temp) == sizeof(device_descriptor)); memcpy(device_descriptor, device_descriptor_temp, sizeof(device_descriptor)); @@ -317,30 +395,31 @@ const uint8_t *USBTester::string_iproduct_desc() } -#define CONFIG1_DESC_SIZE (9+9+7+7+7+7 + 9+7+7+7+7) +#define CONFIG_1_DESC_SIZE (9+9+7+7 + 9+7+7 + 9+7+7 + 9+7+7) +#define CONFIG_2_DESC_SIZE (9+9+7+7 + 9+7+7 + 9+7+7 + 9+7+7) const uint8_t *USBTester::configuration_desc(uint8_t index) { - static const uint8_t config_descriptor[] = { + static const uint8_t config_1_descriptor[] = { // configuration descriptor - 9, // bLength - 2, // bDescriptorType - LSB(CONFIG1_DESC_SIZE), // wTotalLength - MSB(CONFIG1_DESC_SIZE), - 1, // bNumInterfaces - 1, // bConfigurationValue - 0, // iConfiguration - 0x80, // bmAttributes - 50, // bMaxPower + CONFIGURATION_DESCRIPTOR_LENGTH,// bLength + CONFIGURATION_DESCRIPTOR, // bDescriptorType + LSB(CONFIG_1_DESC_SIZE), // wTotalLength + MSB(CONFIG_1_DESC_SIZE), + 2, // bNumInterfaces + 1, // bConfigurationValue + 0, // iConfiguration + 0x80, // bmAttributes + 50, // bMaxPower // Interface 0 setting 0 // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 - 9, // bLength - 4, // bDescriptorType + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType 0, // bInterfaceNumber 0, // bAlternateSetting - 4, // bNumEndpoints + 2, // bNumEndpoints 0xFF, // bInterfaceClass 0xFF, // bInterfaceSubClass 0xFF, // bInterfaceProtocol @@ -351,26 +430,70 @@ const uint8_t *USBTester::configuration_desc(uint8_t index) ENDPOINT_DESCRIPTOR, // bDescriptorType bulk_in, // bEndpointAddress E_BULK, // bmAttributes (0x02=bulk) - LSB(MAX_EP_SIZE),// wMaxPacketSize (LSB) - MSB(MAX_EP_SIZE),// wMaxPacketSize (MSB) - 0, // bInterval + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType bulk_out, // bEndpointAddress E_BULK, // bmAttributes (0x02=bulk) - LSB(MAX_EP_SIZE),// wMaxPacketSize (LSB) - MSB(MAX_EP_SIZE),// wMaxPacketSize (MSB) - 0, // bInterval + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // Interface 0 setting 1 + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0, // bInterfaceNumber + 1, // bAlternateSetting + 2, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_in, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_out, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // Interface 1 setting 0 + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 1, // bInterfaceNumber + 0, // bAlternateSetting + 2, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType int_in, // bEndpointAddress E_INTERRUPT, // bmAttributes (0x03=interrupt) - LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) - MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) 1, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 @@ -378,18 +501,18 @@ const uint8_t *USBTester::configuration_desc(uint8_t index) ENDPOINT_DESCRIPTOR, // bDescriptorType int_out, // bEndpointAddress E_INTERRUPT, // bmAttributes (0x03=interrupt) - LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) - MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) 1, // bInterval - // Interface 0 setting 1 + // Interface 1 setting 1 // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 - 9, // bLength - 4, // bDescriptorType - 0, // bInterfaceNumber + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 1, // bInterfaceNumber 1, // bAlternateSetting - 4, // bNumEndpoints + 2, // bNumEndpoints 0xFF, // bInterfaceClass 0xFF, // bInterfaceSubClass 0xFF, // bInterfaceProtocol @@ -398,20 +521,46 @@ const uint8_t *USBTester::configuration_desc(uint8_t index) // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType - bulk_in, // bEndpointAddress - E_BULK, // bmAttributes (0x02=bulk) + int_in, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=interrupt) LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) - 0, // bInterval + 1, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType - bulk_out, // bEndpointAddress - E_BULK, // bmAttributes (0x02=bulk) + int_out, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=interrupt) LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) - 0, // bInterval + 1 // bInterval + }; + + static const uint8_t config_2_descriptor[] = { + // configuration descriptor + CONFIGURATION_DESCRIPTOR_LENGTH,// bLength + CONFIGURATION_DESCRIPTOR, // bDescriptorType + LSB(CONFIG_2_DESC_SIZE), // wTotalLength + MSB(CONFIG_2_DESC_SIZE), + 2, // bNumInterfaces + 2, // bConfigurationValue + 0, // iConfiguration + 0x80, // bmAttributes + 50, // bMaxPower + + // Interface 0 setting 0 + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0, // bInterfaceNumber + 0, // bAlternateSetting + 2, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength @@ -429,17 +578,111 @@ const uint8_t *USBTester::configuration_desc(uint8_t index) E_INTERRUPT, // bmAttributes (0x03=interrupt) LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) - 1 // bInterval + 1, // bInterval + + // Interface 0 setting 1 + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0, // bInterfaceNumber + 1, // bAlternateSetting + 2, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + int_in, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=interrupt) + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + int_out, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=interrupt) + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // Interface 1 setting 0 + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 1, // bInterfaceNumber + 0, // bAlternateSetting + 2, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_in, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_out, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // Interface 1 setting 1 + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 1, // bInterfaceNumber + 1, // bAlternateSetting + 2, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_in, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_out, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + 1 // bInterval }; + if (index == 0) { - return config_descriptor; + return config_1_descriptor; + } else if (index == 1) { + return config_2_descriptor; } else { return NULL; } } - void USBTester::epint_out_callback(usb_ep_t endpoint) { read_finish(endpoint); @@ -450,4 +693,3 @@ void USBTester::epbulk_out_callback(usb_ep_t endpoint) read_finish(endpoint); read_start(endpoint, bulk_buf, sizeof(bulk_buf)); } - diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index d6c534ddc74..9faca7f5677 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -59,10 +59,13 @@ class USBTester: public USBDevice { enum { NONE = -1 }; const char *get_desc_string(const uint8_t *desc); virtual void suspend(bool suspended); - void remove_endpoints(); bool set_configuration(uint16_t configuration); - bool set_interface(uint16_t configuration, uint16_t interface, uint16_t alternate); - int16_t interface_set; + bool set_interface(uint16_t interface, uint16_t alternate); + bool setup_iterface(uint8_t ep_in, uint8_t ep_out, uint32_t ep_size, usb_ep_type_t ep_type, + uint8_t *buf, uint32_t buf_size, void (USBTester::*callback)(usb_ep_t endpoint)); + void remove_iterface(uint16_t interface); + int16_t interface_0_alt_set; + int16_t interface_1_alt_set; int16_t configuration_set; protected: From f1e70e1bf175c01491ad216f9f10e3bcf0b4acb3 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Thu, 26 Apr 2018 15:18:57 +0200 Subject: [PATCH 179/488] pyusb_basic test formatting fixes --- TESTS/host_tests/pyusb_basic.py | 300 ++++++++++++++++---------------- 1 file changed, 154 insertions(+), 146 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index c361cbee03c..1b7b401f87b 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -55,17 +55,17 @@ def get_interface(dev, interface, alternate=0): VENDOR_TEST_CTRL_OUT_SIZES = 10 VENDOR_TEST_UNSUPPORTED_REQUEST = 32 -REQUEST_GET_STATUS = 0 # done -REQUEST_CLEAR_FEATURE = 1 # done -REQUEST_SET_FEATURE = 3 # done -REQUEST_SET_ADDRESS = 5 # ??? +REQUEST_GET_STATUS = 0 +REQUEST_CLEAR_FEATURE = 1 +REQUEST_SET_FEATURE = 3 +REQUEST_SET_ADDRESS = 5 REQUEST_GET_DESCRIPTOR = 6 -REQUEST_SET_DESCRIPTOR = 7 # done -REQUEST_GET_CONFIGURATION = 8 # done -REQUEST_SET_CONFIGURATION = 9 # done -REQUEST_GET_INTERFACE = 10 # done -REQUEST_SET_INTERFACE = 11 # done -REQUEST_SYNCH_FRAME = 12 # almost done +REQUEST_SET_DESCRIPTOR = 7 +REQUEST_GET_CONFIGURATION = 8 +REQUEST_SET_CONFIGURATION = 9 +REQUEST_GET_INTERFACE = 10 +REQUEST_SET_INTERFACE = 11 +REQUEST_SYNCH_FRAME = 12 FEATURE_ENDPOINT_HALT = 0 FEATURE_DEVICE_REMOTE_WAKEUP = 1 @@ -269,9 +269,11 @@ def setup(self): self.register_callback('reset_support', self._callback_reset_support) + def result(self): return self.__result + def teardown(self): pass @@ -292,150 +294,18 @@ def lineno(): """Returns the current line number in our program.""" return inspect.currentframe().f_back.f_lineno + def raise_if_different(expected, actual, line, text=''): """Raise a RuntimeError if actual is different than expected.""" if expected != actual: raise RuntimeError('[{}]:{}, {} Got {!r}, expected {!r}'.format(__file__, line, text, actual, expected)) + def raise_unconditionally(line, text=''): """Raise a RuntimeError unconditionally.""" raise RuntimeError('[{}]:{}, {}'.format(__file__, line, text)) -def test_device(serial_number, log=print): - dev = usb.core.find(custom_match=TestMatch(serial_number)) - if dev is None: - log("Device not found") - return - - ## --Control Tests-- ## - #control_basic_test(dev, log) - # Test control IN/OUT/NODATA - control_stall_test(dev, log) - # Invalid control in/out/nodata requests are stalled - # Stall during different points in the control transfer - #control_sizes_test(dev, log) - # Test control requests of various data stage sizes (1,8,16,32,64,255,256,...) - control_stress_test(dev, log) - # normal and delay mode - - ## --Endpoint test-- ## - #for each endpoint - #-test all allowed wMaxPacketSize sizes and transfer types - #-stall tests - #-set/clear stall control request - #-stall at random points of sending/receiveing data - #-test aborting an in progress transfer - #test as many endpoints at once as possible - #test biggest configuration possible - - ## --physical test-- ## - #-reset notification/handling - #-connect/disconnect tests - have device disconnect and then reconnect - #-disconnect during various phases of control transfers and endpoint transfers - #-suspend/resume tests (may not be possible to test with current framework) - #-suspend/resume notifications - - ## -- Stress tests-- ## - #-concurrent tests (all endpoints at once including control) - #-concurrent tests + reset + delay - - ## -- other tests-- ## - #-report throughput for in/out of control, bulk, interrupt and iso transfers - #-verify that construction/destruction repeatedly works gracefully - - intf = get_interface(dev, 0, 0) - - # Find endpoints - bulk_in = None - bulk_out = None - int_in = None - int_out = None - - for endpoint in intf: - log("Processing endpoint %s" % endpoint) - ep_type = endpoint.bmAttributes & 0x3 - if ep_type == 2: - if endpoint.bEndpointAddress & 0x80: - assert bulk_in is None - bulk_in = endpoint - else: - assert bulk_out is None - bulk_out = endpoint - elif ep_type == 3: - if endpoint.bEndpointAddress & 0x80: - assert int_in is None - int_in = endpoint - else: - assert int_out is None - int_out = endpoint - assert bulk_in is not None - assert bulk_out is not None - assert int_in is not None - assert int_out is not None - bulk_out.write("hello" + "x" *256); - int_out.write("world" + "x" *256); - - dev.set_interface_altsetting(0, 1) - - intf = get_interface(dev, 0, 0) - - # Find endpoints - bulk_in = None - bulk_out = None - int_in = None - int_out = None - - for endpoint in intf: - log("Processing endpoint %s" % endpoint) - ep_type = endpoint.bmAttributes & 0x3 - if ep_type == 2: - if endpoint.bEndpointAddress & 0x80: - assert bulk_in is None - bulk_in = endpoint - else: - assert bulk_out is None - bulk_out = endpoint - elif ep_type == 3: - if endpoint.bEndpointAddress & 0x80: - assert int_in is None - int_in = endpoint - else: - assert int_out is None - int_out = endpoint - assert bulk_in is not None - assert bulk_out is not None - assert int_in is not None - assert int_out is not None - bulk_out.write("hello2" + "x" *256); - int_out.write("world2" + "x" *256); - - - t = Thread(target=write_data, args=(bulk_out,)) - t.start() - - for _ in range(10): - request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, - CTRL_RECIPIENT_DEVICE) - request = VENDOR_TEST_CTRL_NONE_DELAY - value = 0 # Always 0 for this request - index = 0 # Communication interface - length = 0 # No data - dev.ctrl_transfer(request_type, request, value, index, length, 5000) - - t.join() - - -def write_data(pipe): - print("Write data running") - count = 0 - for _ in range(40): - pipe.write("Value is %s" % count) - count += 1 - print("Count %s" % count) - time.sleep(0.5) - - def control_basic_test(dev, vendor_id, product_id, log): get_status_test(dev, log) set_clear_feature_test(dev, log) @@ -915,7 +785,6 @@ def control_data_test(dev, sizes_list, log): def control_stress_test(dev, log): - # Test various patterns of control transfers # # Some devices have had problems with back-to-back @@ -1025,6 +894,145 @@ def repeated_construction_destruction_test(log): yield +""" +For documentation purpose until test writing finished +TODO: remove this if not needed anymore + + +def test_device(serial_number, log=print): + dev = usb.core.find(custom_match=TestMatch(serial_number)) + if dev is None: + log("Device not found") + return + + ## --Control Tests-- ## + #control_basic_test(dev, log) + # Test control IN/OUT/NODATA + control_stall_test(dev, log) + # Invalid control in/out/nodata requests are stalled + # Stall during different points in the control transfer + #control_sizes_test(dev, log) + # Test control requests of various data stage sizes (1,8,16,32,64,255,256,...) + control_stress_test(dev, log) + # normal and delay mode + + ## --Endpoint test-- ## + #for each endpoint + #-test all allowed wMaxPacketSize sizes and transfer types + #-stall tests + #-set/clear stall control request + #-stall at random points of sending/receiveing data + #-test aborting an in progress transfer + #test as many endpoints at once as possible + #test biggest configuration possible + + ## --physical test-- ## + #-reset notification/handling + #-connect/disconnect tests - have device disconnect and then reconnect + #-disconnect during various phases of control transfers and endpoint transfers + #-suspend/resume tests (may not be possible to test with current framework) + #-suspend/resume notifications + + ## -- Stress tests-- ## + #-concurrent tests (all endpoints at once including control) + #-concurrent tests + reset + delay + + ## -- other tests-- ## + #-report throughput for in/out of control, bulk, interrupt and iso transfers + #-verify that construction/destruction repeatedly works gracefully + + intf = get_interface(dev, 0, 0) + + # Find endpoints + bulk_in = None + bulk_out = None + int_in = None + int_out = None + + for endpoint in intf: + log("Processing endpoint %s" % endpoint) + ep_type = endpoint.bmAttributes & 0x3 + if ep_type == 2: + if endpoint.bEndpointAddress & 0x80: + assert bulk_in is None + bulk_in = endpoint + else: + assert bulk_out is None + bulk_out = endpoint + elif ep_type == 3: + if endpoint.bEndpointAddress & 0x80: + assert int_in is None + int_in = endpoint + else: + assert int_out is None + int_out = endpoint + assert bulk_in is not None + assert bulk_out is not None + assert int_in is not None + assert int_out is not None + bulk_out.write("hello" + "x" *256); + int_out.write("world" + "x" *256); + + dev.set_interface_altsetting(0, 1) + + intf = get_interface(dev, 0, 0) + + # Find endpoints + bulk_in = None + bulk_out = None + int_in = None + int_out = None + + for endpoint in intf: + log("Processing endpoint %s" % endpoint) + ep_type = endpoint.bmAttributes & 0x3 + if ep_type == 2: + if endpoint.bEndpointAddress & 0x80: + assert bulk_in is None + bulk_in = endpoint + else: + assert bulk_out is None + bulk_out = endpoint + elif ep_type == 3: + if endpoint.bEndpointAddress & 0x80: + assert int_in is None + int_in = endpoint + else: + assert int_out is None + int_out = endpoint + assert bulk_in is not None + assert bulk_out is not None + assert int_in is not None + assert int_out is not None + bulk_out.write("hello2" + "x" *256); + int_out.write("world2" + "x" *256); + + + t = Thread(target=write_data, args=(bulk_out,)) + t.start() + + for _ in range(10): + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_CTRL_NONE_DELAY + value = 0 # Always 0 for this request + index = 0 # Communication interface + length = 0 # No data + dev.ctrl_transfer(request_type, request, value, index, length, 5000) + + t.join() + + +def write_data(pipe): + print("Write data running") + count = 0 + for _ in range(40): + pipe.write("Value is %s" % count) + count += 1 + print("Count %s" % count) + time.sleep(0.5) + + def main(): parser = ArgumentParser(description="USB basic test") parser.add_argument('serial', help='USB serial number of DUT') @@ -1032,6 +1040,6 @@ def main(): ret = test_device(args.serial) print("Test %s" % "passed" if ret else "failed") - if __name__ == "__main__": main() +""" From 612bc822ac2e5880b6234c0b9273d23c00be8ffd Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Thu, 26 Apr 2018 15:42:04 +0200 Subject: [PATCH 180/488] pyusb_basic test add helper functions --- TESTS/host_tests/pyusb_basic.py | 52 +++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 1b7b401f87b..ac3022a3bd6 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -894,6 +894,58 @@ def repeated_construction_destruction_test(log): yield +def release_interfaces(dev): + """ Releases interfaces to allow configuration switch + + Fixes error while configuration change(on Windows machines): + USBError: [Errno None] libusb0-dll:err [set_configuration] can't change configuration, an interface is still in use (claimed) + """ + cfg = dev.get_active_configuration() + for i in range(0, cfg.bNumInterfaces): + usb.util.release_interface(dev, i) + + +def restore_default_configuration(dev): + cfg = dev[1] + cfg.set() + + +def get_status(dev, recipient, index = 0): + """ Get status of the recipient + + Args: + dev - pyusb device + recipient - CTRL_RECIPIENT_DEVICE/CTRL_RECIPIENT_INTERFACE/CTRL_RECIPIENT_ENDPOINT + index - 0 if recipient is device, interface index if recipient is interface, endpoint index if recipient is endpoint + + Returns: + status flag 32b int + """ + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + recipient) + request = REQUEST_GET_STATUS + value = 0 # Always 0 for this request + index = index # recipient index + length = 2 # Always 2 for this request (size of return data) + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] | (ret[1] << 8) + + return ret + + +def get_descriptor(dev, type_index, lang_id, length): + # Control IN GET_DESCRIPTOR - device + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = REQUEST_GET_DESCRIPTOR + value = type_index # Descriptor Type (H) and Descriptor Index (L) + index = lang_id # 0 or Language ID for this request + length = length # Descriptor Length + ret = dev.ctrl_transfer(request_type, request, value, index, length) + + return ret + + """ For documentation purpose until test writing finished TODO: remove this if not needed anymore From dd75d51af16d18bdfb5f6bfe9c759830dae3d5ff Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Thu, 26 Apr 2018 19:10:23 +0200 Subject: [PATCH 181/488] pyusb_basic test update test code refactoring align test to use device multiconfiguration --- TESTS/host_tests/pyusb_basic.py | 471 +++++++++++++------------------- 1 file changed, 186 insertions(+), 285 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index ac3022a3bd6..109f23d7bb8 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -115,7 +115,7 @@ def _callback_control_basic_test(self, key, value, timestamp): return try: - control_basic_test(dev, vendor_id, product_id, log=print) + control_basic_test(dev, int(vendor_id), int(product_id), log=print) self.report_success() except (RuntimeError) as exc: self.report_error(exc) @@ -307,327 +307,222 @@ def raise_unconditionally(line, text=''): def control_basic_test(dev, vendor_id, product_id, log): + get_set_configuration_test(dev, log) + get_set_interface_test(dev, log) get_status_test(dev, log) set_clear_feature_test(dev, log) - get_set_interface_test(dev, log) - get_set_configuration_test(dev, log) get_descriptor_test(dev, vendor_id, product_id, log) set_descriptor_test(dev, log) #synch_frame_test(dev, log) wait for isochronous endpoint -def get_status_test(dev, log): - # Control IN GET_STATUS on DEVICE - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_DEVICE) - request = REQUEST_GET_STATUS - value = 0 # Always 0 for this request - index = 0 # 0 if recipient is device - length = 2 # Always 2 for this request (size of return data) - ret = dev.ctrl_transfer(request_type, request, value, index, length) - ret = ret[0] | (ret[1] << 8) - # Status bits - # ret == 0b01 (D0)Self Powered - # ret == 0b10 (D1)Remote Wakeup - # (D2 - D15 reserved) Must be set to 0 - if(ret < 0 or ret > 3): - raise_unconditionally(lineno(), "GET_STATUS on DEVICE failed") - - # Control IN GET_STATUS on INTERFACE - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_GET_STATUS - value = 0 # Always 0 for this request - index = 0 # interface index - length = 2 # Always 2 for this request (size of return data) - ret = dev.ctrl_transfer(request_type, request, value, index, length) - ret = ret[0] | (ret[1] << 8) - # Status bits - # ret == 0b0 - # (D0 - D15 reserved) Must be set to 0 - if(ret != 0): - raise_unconditionally(lineno(), "GET_STATUS on INTERFACE failed") - - # Control IN GET_STATUS on ENDPOINT 0 - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_GET_STATUS - value = 0 # Always 0 for this request - index = 0 # endpoint index - length = 2 # Always 2 for this request (size of return data) - ret = dev.ctrl_transfer(request_type, request, value, index, length) - ret = ret[0] | (ret[1] << 8) - # Status bits - # ret == 0b1 (D0)endpoint Halt - # (D1 - D15 reserved) Must be set to 0 - # endpoint 0 can't be halted ret == 0 - if(ret != 0): - raise_unconditionally(lineno(), "GET_STATUS on ENDPOINT failed") - - -def set_clear_feature_test(dev, log): - # Control OUT SET_FEATURE on endpoint - halt - request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_SET_FEATURE - value = FEATURE_ENDPOINT_HALT - index = 1 # Endpoint index - length = 0 # Always 0 for this request +def get_set_configuration_test(dev, log): + print("<<< get_set_configuration_test >>>") + # check if dafault(1) configuration set try: - dev.ctrl_transfer(request_type, request, value, index, length) - except usb.core.USBError: - raise_unconditionally(lineno(), "endpoint halt failed") + ret = usb.control.get_configuration(dev) + raise_if_different(1, ret, lineno(), "FAILED - expected first configuration set") + except usb.core.USBError as error: + print(error) + raise_unconditionally(lineno(), "FAILED - get_configuration !!!") - # check if endpoint was halted - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_GET_STATUS - value = 0 # Always 0 for this request - index = 1 # Endpoint index - length = 2 # Always 2 for this request (size of return data) - ret = dev.ctrl_transfer(request_type, request, value, index, length) - ret = ret[0] | (ret[1] << 8) - if(ret != 1): - raise_unconditionally(lineno(), "endpoint was not halted") + cfg = dev.get_active_configuration() + for intf in cfg: + usb.util.release_interface(dev, intf) - # Control OUT CLEAR_FEATURE on endpoint - unhalt - request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_CLEAR_FEATURE - value = FEATURE_ENDPOINT_HALT - index = 1 # Endpoint index - length = 0 # Always 0 for this request + # deconfigure the device try: - dev.ctrl_transfer(request_type, request, value, index, length) - except usb.core.USBError: - raise_unconditionally(lineno(), "endpoint was not unhalted") - - # check if endpoint was unhalted - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_GET_STATUS - value = 0 # Always 0 for this request - index = 1 # Endpoint index - length = 2 # Always 2 for this request (size of return data) - ret = dev.ctrl_transfer(request_type, request, value, index, length) - ret = ret[0] - if(ret != 0): - raise_unconditionally(lineno(), "endpoint unhalthalt failed") - + ret = dev.set_configuration(0) + except usb.core.USBError as error: + print(error) + raise_unconditionally(lineno(), "FAILED - set_configuration(0) !!!") -def get_set_interface_test(dev, log): - # Control IN GET_INTERFACE - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_GET_INTERFACE - value = 0 # Always 0 for this request - index = 0 # Interface index - length = 1 # Always 1 for this request (size of return data) + # check if deconfigured try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - print("GET_INTERFACE ret: %d" % (ret[0])) - if(ret[0] != 0): - raise_unconditionally(lineno(), "Wrong interface was set expected: 0") - except usb.core.USBError: - raise_unconditionally(lineno(), "GET_INTERFACE failed") - # test control data transfer - control_data_test(dev, [64, 256], log) + ret = usb.control.get_configuration(dev) + raise_if_different(0, ret, lineno(), "FAILED - expected to be deconfigured") + print("device deconfigured - OK") + except usb.core.USBError as error: + print(error) + raise_unconditionally(lineno(), "FAILED - get_active_configuration !!!") + + # for every configuration + for cfg in dev: + try: + # set configuration + ret = cfg.set() + except usb.core.USBError as error: + print(error) + raise_unconditionally(lineno(), "FAILED - set configuration") - # Control IN SET_INTERFACE - request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_SET_INTERFACE - value = 1 # Alternative interface setting index - index = 0 # Interface index - length = 0 # Always 0 for this request - try: - dev.ctrl_transfer(request_type, request, value, index, length) - except usb.core.USBError: - raise_unconditionally(lineno(), "SET_INTERFACE failed") - # test control data transfer after alternative interface set - control_data_test(dev, [64, 256], log) + # check if configured + try: + ret = usb.control.get_configuration(dev) + raise_if_different(cfg.bConfigurationValue, ret, lineno(), "FAILED - expected {} configuration set".format(cfg.bConfigurationValue)) + print("configuration {} set - OK ".format(cfg.bConfigurationValue)) + except usb.core.USBError as error: + print(error) + raise_unconditionally(lineno(), "FAILED - get_configuration !!!") + # test control data transfer after configuration set + control_data_test(dev, [64, 256], log) + print("") # new line - # Control IN GET_INTERFACE - check if alternative interface setting was set - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_GET_INTERFACE - value = 0 # Always 0 for this request - index = 0 # Interface index - length = 1 # Always 1 for this request (size of return data) - try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - if(ret[0] != 1): - raise_unconditionally(lineno(), "Alternative interface setting was not set properly") - except usb.core.USBError: - raise_unconditionally(lineno(), "GET_INTERFACE failed") - # Control IN SET_INTERFACE restore interfejs settings - request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_SET_INTERFACE - value = 0 # Interface setting index - index = 0 # Interface index - length = 0 # Always 0 for this request - try: - dev.ctrl_transfer(request_type, request, value, index, length) - except usb.core.USBError: - raise_unconditionally(lineno(), "SET_INTERFACE request failed") - # test control data transfer after interface restoring +def get_set_interface_test(dev, log): + print("<<< get_set_interface_test >>>") + # for every configuration + for cfg in dev: + cfg.set() + # for every interface + for intf in cfg: + intf.set_altsetting(); + altsett = usb.control.get_interface(dev, intf.bInterfaceNumber) + raise_if_different(intf.bAlternateSetting, altsett, lineno(), text='Wrong alternate setting for interface {}'.format(intf.bInterfaceNumber)) + print("cfg({}) inteface {}.{} set - OK".format(cfg.bConfigurationValue, intf.bInterfaceNumber, intf.bAlternateSetting)) + control_data_test(dev, [64, 256], log) + + release_interfaces(dev) + + restore_default_configuration(dev) + + # test control data transfer after default interface restoring control_data_test(dev, [64, 256], log) + print("") # new line - # Control IN GET_INTERFACE - check if alternative interface setting was restored properly - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_GET_INTERFACE - value = 0 # Always 0 for this request - index = 0 # Interface index - length = 1 # Always 1 for this request (size of return data) - try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - if(ret[0] != 0): - raise_unconditionally(lineno(), "Alternative interface setting was not restored properly") - except usb.core.USBError: - raise_unconditionally(lineno(), "GET_INTERFACE failed") - - -def get_set_configuration_test(dev, log): - # Set Configuration can also be used, with wValue set to 0, to deconfigure the device - # Control IN GET_CONFIGURATION - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_GET_CONFIGURATION - value = 0 # Always 0 for this request - index = 0 # Always 0 for this request - length = 1 # Always 1 for this request (size of return data) - try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - if(ret[0] != 1): - raise_unconditionally(lineno(), "Expected first configuration set") - except usb.core.USBError: - raise_unconditionally(lineno(), "GET_CONFIGURATION failed") - # test control data transfer - control_data_test(dev, [64, 256], log) - # Control OUT SET_CONFIGURATION 0 - deconfigure the device - request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_SET_CONFIGURATION - value = 0 # Configuration Value (0 - deconfigure the device) - index = 0 # Always 0 for this request - length = 0 # Always 0 for this request - try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - except usb.core.USBError: - raise_unconditionally(lineno(), "SET_CONFIGURATION failed") +def get_status_test(dev, log): + print("<<< get_status_test >>>") + # check device status + ret = get_status(dev, CTRL_RECIPIENT_DEVICE) + # Status bits + # ret == 0b01 (D0)Self Powered + # ret == 0b10 (D1)Remote Wakeup + # (D2 - D15 reserved) Must be set to 0 + if(ret < 0 or ret > 3): + raise_unconditionally(lineno(), "GET_STATUS on DEVICE failed") - # Control IN GET_CONFIGURATION - check if deconfigured - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_GET_CONFIGURATION - value = 0 # Always 0 for this request - index = 0 # Always 0 for this request - length = 1 # Always 1 for this request (size of return data) - try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - if(ret[0] != 0): - raise_unconditionally(lineno(), "Expected to be deconfigured") - except usb.core.USBError: - raise_unconditionally(lineno(), "GET_CONFIGURATION failed") + # check endpoint 0 status + ret = get_status(dev, CTRL_RECIPIENT_ENDPOINT, 0) + # Status bits + # ret == 0b1 (D0)endpoint Halt + # (D1 - D15 reserved) Must be set to 0 + # endpoint 0 can't be halted ret == 0 + raise_if_different(0, ret, lineno(), "GET_STATUS on ENDPOINT 0 should return 0") + + # for every configuration + for cfg in dev: + cfg.set() + raise_if_different(cfg.bConfigurationValue, usb.control.get_configuration(dev), lineno(), "Configuration {} set failed".format(cfg.bConfigurationValue)) + + for intf in cfg: + intf.set_altsetting() + # check interface status + ret = get_status(dev, CTRL_RECIPIENT_INTERFACE, intf.bInterfaceNumber) + # Status bits + # ret == 0b0 + # (D0 - D15 reserved) Must be set to 0 + if(ret != 0): + raise_unconditionally(lineno(), "GET_STATUS on INTERFACE ({},{}) failed".format(intf.bInterfaceNumber, intf.bAlternateSetting)) + print("cfg({}) interface {}.{} status - OK".format(cfg.bConfigurationValue, intf.bInterfaceNumber, intf.bAlternateSetting)) + + # on every ENDPOINT in this altsetting + for ep in intf: + ret = usb.control.get_status(dev, ep) + # Status bits + # ret == 0b1 (D0)endpoint Halt + # (D1 - D15 reserved) Must be set to 0 + if(ret >= 1): + raise_unconditionally(lineno(), "GET_STATUS on ENDPOINT {} failed - endpoint halted".format(ep.bEndpointAddress)) + print("cfg({}) intf({}.{}) endpoint {} status - OK".format(cfg.bConfigurationValue, intf.bInterfaceNumber, intf.bAlternateSetting, ep.bEndpointAddress)) + + release_interfaces(dev) + restore_default_configuration(dev) + print("") # new line - # Control OUT SET_CONFIGURATION 1 - restore first configuration - request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_SET_CONFIGURATION - value = 1 # Configuration Value - index = 0 # Always 0 for this request - length = 0 # Always 0 for this request - try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - except usb.core.USBError: - raise_unconditionally(lineno(), "SET_CONFIGURATION failed") - # test control data transfer after configured back - control_data_test(dev, [64, 256], log) - # Control IN GET_CONFIGURATION - check if configured back - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_GET_CONFIGURATION - value = 0 # Always 0 for this request - index = 0 # Always 0 for this request - length = 1 # Always 1 for this request (size of return data) - try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - if(ret[0] != 1): - raise_unconditionally(lineno(), "Expected to be deconfigured: 1") - except usb.core.USBError: - raise_unconditionally(lineno(), "GET_CONFIGURATION failed") - control_data_test(dev, [64, 256], log) +def set_clear_feature_test(dev, log): + print("<<< set_clear_feature_test >>>") + # for every configuration + for cfg in dev: + cfg.set() + raise_if_different(cfg.bConfigurationValue, usb.control.get_configuration(dev), lineno(), "Configuration {} set failed".format(cfg.bConfigurationValue)) + + for intf in cfg: + intf.set_altsetting() + # on every ENDPOINT + for ep in intf: + try: + usb.control.set_feature(dev, FEATURE_ENDPOINT_HALT, ep) + except usb.core.USBError as err: + print(err) + raise_unconditionally(lineno(), "endpoint {} halt failed".format(ep.bEndpointAddress)) + + # check if endpoint was halted + try: + ret = usb.control.get_status(dev, ep) + except usb.core.USBError as err: + print(err) + raise_unconditionally(lineno(), "endpoint status failed".format(ep.bEndpointAddress)) + if(ret != 1): + raise_unconditionally(lineno(), "endpoint {} was not halted".format(ep.bEndpointAddress)) + print("cfg({}) intf({}.{}) ep {} halted - OK".format(cfg.bConfigurationValue, intf.bInterfaceNumber, intf.bAlternateSetting, ep.bEndpointAddress)) + + # Control OUT CLEAR_FEATURE on endpoint - unhalt + try: + usb.control.clear_feature(dev, FEATURE_ENDPOINT_HALT, ep) + except usb.core.USBError as err: + print(err) + raise_unconditionally(lineno(), "endpoint {} unhalt failed".format(ep.bEndpointAddress)) + + # check if endpoint was unhalted + ret = usb.control.get_status(dev, ep) + if(ret != 0): + raise_unconditionally(lineno(), "endpoint {} was not unhalted".format(ep.bEndpointAddress)) + print("cfg({}) intf({}.{}) ep {} unhalted - OK".format(cfg.bConfigurationValue, intf.bInterfaceNumber, intf.bAlternateSetting, ep.bEndpointAddress)) + + release_interfaces(dev) + + restore_default_configuration(dev) + print("") # new line def get_descriptor_test(dev, vendor_id, product_id, log): + print("<<< get_descriptor_test >>>") # Control IN GET_DESCRIPTOR - device - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_DEVICE) - request = REQUEST_GET_DESCRIPTOR - value = (DESC_TYPE_DEVICE << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) - index = 0 # 0 or Language ID for this request - length = DEVICE_DESC_SIZE # Descriptor Length try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - #print("### DEVICE_DESC ####################################################") - #dev_desc = dict(zip(device_descriptor_keys, device_descriptor_parser.unpack(ret))) - #for key in dev_desc: - # print("%s: %d" % (key, dev_desc[key])) - #assert vendor_id != dev_desc['idVendor'] - #assert product_id != dev_desc['idProduct'] + ret = get_descriptor(dev, (DESC_TYPE_DEVICE << 8) | (0 << 0), 0, DEVICE_DESC_SIZE) + dev_desc = dict(zip(device_descriptor_keys, device_descriptor_parser.unpack(ret))) + raise_if_different(DEVICE_DESC_SIZE, dev_desc['bLength'], lineno(), text='Wrong device descriptor size !!!') + raise_if_different(vendor_id, dev_desc['idVendor'], lineno(), text='Wrong vendor id !!!') + raise_if_different(product_id, dev_desc['idProduct'], lineno(), text='Wrong product id !!!') except usb.core.USBError: raise_unconditionally(lineno(), "Requesting device descriptor failed") # Control IN GET_DESCRIPTOR - configuration - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_DEVICE) - request = REQUEST_GET_DESCRIPTOR - value = (DESC_TYPE_CONFIG << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) - index = 0 # 0 or Language ID for this request - length = CONFIGURATION_DESC_SIZE # Descriptor Length try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - #print("### CONFIGURATION_DESC ####################################################") - #conf_desc = dict(zip(configuration_descriptor_keys, configuration_descriptor_parser.unpack(ret))) - #for key in conf_desc: - # print("%s: %d" % (key, conf_desc[key])) - #print("#######################################################") + ret = get_descriptor(dev, (DESC_TYPE_CONFIG << 8) | (0 << 0), 0, CONFIGURATION_DESC_SIZE) + conf_desc = dict(zip(configuration_descriptor_keys, configuration_descriptor_parser.unpack(ret))) + raise_if_different(CONFIGURATION_DESC_SIZE, conf_desc['bLength'], lineno(), text='Wrong configuration descriptor size !!!') except usb.core.USBError: raise_unconditionally(lineno(), "Requesting configuration descriptor failed") # Control IN GET_DESCRIPTOR - interface - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_DEVICE) - request = REQUEST_GET_DESCRIPTOR - value = (DESC_TYPE_INTERFACE << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) - index = 0 # 0 or Language ID for this request - length = INTERFACE_DESC_SIZE # Descriptor Length try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = get_descriptor(dev, (DESC_TYPE_INTERFACE << 8) | (0 << 0), 0, INTERFACE_DESC_SIZE) raise_unconditionally(lineno(), "Requesting interface descriptor should fail since it is not directly accessible") except usb.core.USBError: - log("interface descriptor is not directly accessible") + log("interface descriptor is not directly accessible - OK") - # Control IN GET_DESCRIPTOR - interface - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_DEVICE) - request = REQUEST_GET_DESCRIPTOR - value = (DESC_TYPE_ENDPOINT << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) - index = 0 # 0 or Language ID for this request - length = INTERFACE_DESC_SIZE # Descriptor Length + # Control IN GET_DESCRIPTOR - endpoint try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = get_descriptor(dev, (DESC_TYPE_ENDPOINT << 8) | (0 << 0), 0, ENDPOINT_DESC_SIZE) raise_unconditionally(lineno(), "Requesting endpoint descriptor should fail since it is not directly accessible") except usb.core.USBError: - log("endpoint descriptor is not directly accessible") - + log("endpoint descriptor is not directly accessible - OK") + print("") # new line def set_descriptor_test(dev, log): + print("<<< set_descriptor_test >>>") # SET_DESCRIPTOR is optional and not implemented in Mbed # command should fail with no action on device side @@ -642,10 +537,12 @@ def set_descriptor_test(dev, log): dev.ctrl_transfer(request_type, request, value, index, data) raise_unconditionally(lineno(), "SET_DESCRIPTOR should fail since it is not implemented") except usb.core.USBError: - log("SET_DESCRIPTOR is unsupported") + log("SET_DESCRIPTOR is unsupported - OK") + print("") # new line def synch_frame_test(dev, log): + print("<<< synch_frame_test >>>") # only for isochronous endpoints request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, CTRL_RECIPIENT_ENDPOINT) @@ -659,10 +556,11 @@ def synch_frame_test(dev, log): log("synch frame ret: %d" % (ret)) except usb.core.USBError: raise_unconditionally(lineno(), "SYNCH_FRAME failed") + print("") # new line def control_stall_test(dev, log): - + print("<<< control_stall_test >>>") # Control OUT stall try: request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, @@ -674,7 +572,7 @@ def control_stall_test(dev, log): dev.ctrl_transfer(request_type, request, value, index, data, 5000) raise_unconditionally(lineno(), "Invalid request not stalled") except usb.core.USBError: - log("Invalid request stalled") + log("Invalid request stalled - OK") # Control request with no data stage (Device-to-host) try: @@ -687,7 +585,7 @@ def control_stall_test(dev, log): dev.ctrl_transfer(request_type, request, value, index, length, 5000) raise_unconditionally(lineno(), "Invalid request not stalled") except usb.core.USBError: - log("Invalid request stalled") + log("Invalid request stalled - OK") # Control request with no data stage (Host-to-device) try: @@ -700,7 +598,7 @@ def control_stall_test(dev, log): dev.ctrl_transfer(request_type, request, value, index, length, 5000) raise_unconditionally(lineno(), "Invalid request not stalled") except usb.core.USBError: - log("Invalid request stalled") + log("Invalid request stalled - OK") # Control IN stall try: @@ -713,7 +611,7 @@ def control_stall_test(dev, log): dev.ctrl_transfer(request_type, request, value, index, length, 5000) raise_unconditionally(lineno(), "Invalid request not stalled") except usb.core.USBError: - log("Invalid request stalled") + log("Invalid request stalled - OK") for i in (3, 4, 5): try: @@ -738,7 +636,8 @@ def control_stall_test(dev, log): resp = dev.ctrl_transfer(request_type, request, value, index, length, 5000) raise_unconditionally(lineno(), "Requesting string passed i: " + str(i)) except usb.core.USBError: - log("Requesting string %s failed" % i) + log("Requesting string %s failed - OK" % i) + print("") # new line def control_sizes_test(dev, log): @@ -883,13 +782,15 @@ def device_suspend_resume_test(log): def repeated_construction_destruction_test(log): - # run other test to check if USB works fine after repeated construction/destruction list = [64, 256] dev = yield + # run other test to check if USB works fine after repeated construction/destruction control_data_test(dev, list, log) dev = yield + # run other test to check if USB works fine after repeated construction/destruction control_data_test(dev, list, log) dev = yield + # run other test to check if USB works fine after repeated construction/destruction control_data_test(dev, list, log) yield From db3acbe4ccbdbca387528c354ff4fdddf967162b Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 30 Apr 2018 18:57:24 -0500 Subject: [PATCH 182/488] Remove blocking option from USB connect Remove the option to block in USBDevice::connect since this should be handled at a higher level. Also call init to ensure that the USBDevice has been initalized. --- usb/device/USBDevice/USBDevice.cpp | 14 +++++++------- usb/device/USBDevice/USBDevice.h | 4 +--- 2 files changed, 8 insertions(+), 10 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index fdc49a83eac..c539e5a5987 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -994,20 +994,20 @@ bool USBDevice::configured() return ret; } -void USBDevice::connect(bool blocking) +void USBDevice::connect() { - /* Connect device */ lock(); + + /* Ensure device has been initialized */ + init(); + + /* Connect device */ if (!_connected) { _phy->connect(); _connected = true; } - unlock(); - if (blocking) { - /* Block if not configured */ - while (!configured()); - } + unlock(); } void USBDevice::disconnect() diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 91bb7513363..c6056059bbb 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -117,10 +117,8 @@ class USBDevice: public USBPhyEvents { /** * Connect a device - * - * @param blocking: block if not configured */ - void connect(bool blocking = true); + void connect(); /** * Disconnect a device From 7c636eae43553f0c649c71d6225044a4bf8650b7 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 30 Apr 2018 18:58:38 -0500 Subject: [PATCH 183/488] Remove extra USBDevice constructor Remove the second USBDevice constructor since it does not provide any new functionality. --- usb/device/USBDevice/USBDevice.cpp | 29 +---------------------------- usb/device/USBDevice/USBDevice.h | 11 ----------- 2 files changed, 1 insertion(+), 39 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index c539e5a5987..0788358b210 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -1246,34 +1246,7 @@ USBDevice::USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint1 _device.state = Powered; _device.configuration = 0; _device.suspended = false; -}; - -USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release) -{ - this->vendor_id = vendor_id; - this->product_id = product_id; - this->product_release = product_release; - - memset(_endpoint_info, 0, sizeof(_endpoint_info)); - memset(&_transfer, 0, sizeof(_transfer)); - _transfer.user_callback = None; - - _setup_ready = false; - _abort_control = false; - - _phy = get_usb_phy(); - _initialized = false; - _connected = false; - _current_interface = 0; - _current_alternate = 0; - _locked = 0; - _post_process = NULL; - - /* Set initial device state */ - _device.state = Powered; - _device.configuration = 0; - _device.suspended = false; -}; +} uint32_t USBDevice::endpoint_max_packet_size(usb_ep_t endpoint) { diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index c6056059bbb..d5a91f1b26b 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -72,17 +72,6 @@ class USBDevice: public USBPhyEvents { uint16_t wLength; }; - /** - * Instantiate a new USBDevice with the given parameters - * - * This function uses a target's built in USBPhy. - * - * @param vendor_id The USB vendor ID - * @param product_id The USB product ID - * @param product_release The device release number - */ - USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release); - /** * Instantiate a new USBDevice with the given parameters * From 62c18989163d0c8b3a49dec923b8dc5d9e291464 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 1 May 2018 15:05:17 -0500 Subject: [PATCH 184/488] Add USBDevice destructor Add a destructor to USBDevice to ensure that resources have been properly released. Additionally add an assert in the destructor that deinit has already been called. If it has not been called then interrupts can still occur which may cause a crash. --- usb/device/USBDevice/USBDevice.cpp | 6 ++++++ usb/device/USBDevice/USBDevice.h | 8 ++++++++ 2 files changed, 14 insertions(+) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 0788358b210..3c73170c4b2 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -1248,6 +1248,12 @@ USBDevice::USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint1 _device.suspended = false; } +USBDevice::~USBDevice() +{ + MBED_ASSERT(!_initialized); + deinit(); +} + uint32_t USBDevice::endpoint_max_packet_size(usb_ep_t endpoint) { lock(); diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index d5a91f1b26b..a1b491574b3 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -82,6 +82,14 @@ class USBDevice: public USBPhyEvents { */ USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); + /** + * Cleanup this USBDevice + * + * This USBDevice must be uninitialized when the destructor is + * called or the behavior is undefined. + */ + virtual ~USBDevice(); + /** * Initialize this instance * From 8436533bf3b9d0e7b8f307a1e02475067cd7a22b Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 1 May 2018 15:02:36 -0500 Subject: [PATCH 185/488] Cleanup USBSerial Make the following changes -Make blocking the first parameter in the constructor -Add destructor and proper cleanup -Add ready and wait_ready functions --- usb/device/USBSerial/USBCDC.cpp | 43 ++++++++++++++++--------- usb/device/USBSerial/USBCDC.h | 50 +++++++++++++++++++++++------- usb/device/USBSerial/USBSerial.cpp | 32 ++++++++++++++++++- usb/device/USBSerial/USBSerial.h | 41 +++++++++++++++--------- 4 files changed, 125 insertions(+), 41 deletions(-) diff --git a/usb/device/USBSerial/USBCDC.cpp b/usb/device/USBSerial/USBCDC.cpp index 1e5993e7e5d..4eff925deea 100644 --- a/usb/device/USBSerial/USBCDC.cpp +++ b/usb/device/USBSerial/USBCDC.cpp @@ -18,6 +18,7 @@ #include "USBCDC.h" #include "EndpointResolver.h" #include "AsyncOp.h" +#include "usb_phy_api.h" static const uint8_t cdc_line_coding_default[7] = {0x80, 0x25, 0x00, 0x00, 0x00, 0x00, 0x08}; @@ -58,20 +59,31 @@ class USBCDC::AsyncRead: public AsyncOp { bool result; }; -USBCDC::USBCDC(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking) - : USBDevice(vendor_id, product_id, product_release) +USBCDC::USBCDC(bool connect_blocking, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) + : USBDevice(get_usb_phy(), vendor_id, product_id, product_release) { - _init(connect_blocking); + _init(); + if (connect_blocking) { + connect(); + wait_ready(); + } else { + init(); + } } -USBCDC::USBCDC(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking) +USBCDC::USBCDC(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) : USBDevice(phy, vendor_id, product_id, product_release) { - _init(connect_blocking); + _init(); } -void USBCDC::_init(bool connect_blocking) +USBCDC::~USBCDC() +{ + deinit(); +} + +void USBCDC::_init() { memcpy(_cdc_line_coding, cdc_line_coding_default, sizeof(_cdc_line_coding)); @@ -91,13 +103,6 @@ void USBCDC::_init(bool connect_blocking) _rx_in_progress = false; _rx_buf = _rx_buffer; _rx_size = 0; - - init(); - - USBDevice::connect(false); - if (connect_blocking) { - wait_connected(); - } } void USBCDC::callback_reset() @@ -234,7 +239,17 @@ void USBCDC::_change_terminal_connected(bool connected) _terminal_connected = connected; } -void USBCDC::wait_connected() +bool USBCDC::ready() +{ + lock(); + + bool ready = _terminal_connected; + + unlock(); + return ready; +} + +void USBCDC::wait_ready() { lock(); diff --git a/usb/device/USBSerial/USBCDC.h b/usb/device/USBSerial/USBCDC.h index 15222bc91a2..726ffb4419e 100644 --- a/usb/device/USBSerial/USBCDC.h +++ b/usb/device/USBSerial/USBCDC.h @@ -29,31 +29,57 @@ class AsyncOp; class USBCDC: public USBDevice { public: - /* - * Constructor + /** + * Basic constructor + * + * Construct this object optionally connecting and blocking until it is ready. + * + * @note Do not use this constructor in derived classes. * + * @param connect_blocking true to perform a blocking connect, false to start in a disconnected state * @param vendor_id Your vendor_id * @param product_id Your product_id - * @param product_release Your preoduct_release - * @param connect_blocking define if the connection must be blocked if USB not plugged in + * @param product_release Your product_release */ - USBCDC(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); + USBCDC(bool connect_blocking, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); - /* - * Constructor + /** + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. * * @param phy USB phy to use * @param vendor_id Your vendor_id * @param product_id Your product_id - * @param product_release Your preoduct_release - * @param connect_blocking define if the connection must be blocked if USB not plugged in + * @param product_release Your product_release */ - USBCDC(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); + USBCDC(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ + virtual ~USBCDC(); + + /** + * Check if this class is ready + * + * @return true if a terminal is connected, false otherwise + */ + bool ready(); /** * Block until the terminal is connected */ - void wait_connected(); + void wait_ready(); /* * Send a buffer @@ -162,7 +188,7 @@ class USBCDC: public USBDevice { virtual void callback_set_configuration(uint8_t configuration); virtual void callback_set_interface(uint16_t interface, uint8_t alternate); - void _init(bool connect_blocking); + void _init(); void _change_terminal_connected(bool connected); void _connect_wake_all(); diff --git a/usb/device/USBSerial/USBSerial.cpp b/usb/device/USBSerial/USBSerial.cpp index 376c8b8de24..b691b2f977e 100644 --- a/usb/device/USBSerial/USBSerial.cpp +++ b/usb/device/USBSerial/USBSerial.cpp @@ -16,10 +16,40 @@ #include "stdint.h" #include "USBSerial.h" +#include "usb_phy_api.h" + + +USBSerial::USBSerial(bool connect_blocking, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBCDC(get_usb_phy(), vendor_id, product_id, product_release) +{ + _settings_changed_callback = 0; + + if (connect_blocking) { + connect(); + wait_ready(); + } else { + init(); + } +} + +USBSerial::USBSerial(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBCDC(phy, vendor_id, product_id, product_release) +{ + _settings_changed_callback = 0; +} + +USBSerial::~USBSerial() +{ + deinit(); +} int USBSerial::_putc(int c) { - return send((uint8_t *)&c, 1) ? 1 : 0; + if (send((uint8_t *)&c, 1)) { + return c; + } else { + return -1; + } } int USBSerial::_getc() diff --git a/usb/device/USBSerial/USBSerial.h b/usb/device/USBSerial/USBSerial.h index b3344b4a6e1..f06eb2e8171 100644 --- a/usb/device/USBSerial/USBSerial.h +++ b/usb/device/USBSerial/USBSerial.h @@ -45,33 +45,46 @@ class USBSerial: public USBCDC, public Stream { public: /** - * Constructor + * Basic constructor * + * Construct this object optionally connecting and blocking until it is ready. + * + * @note Do not use this constructor in derived classes. + * + * @param connect_blocking true to perform a blocking connect, false to start in a disconnected state * @param vendor_id Your vendor_id (default: 0x1f00) * @param product_id Your product_id (default: 0x2012) - * @param product_release Your preoduct_release (default: 0x0001) - * @param connect_blocking define if the connection must be blocked if USB not plugged in + * @param product_release Your product_release (default: 0x0001) * */ - USBSerial(uint16_t vendor_id = 0x1f00, uint16_t product_id = 0x2012, uint16_t product_release = 0x0001, bool connect_blocking = true): USBCDC(vendor_id, product_id, product_release, connect_blocking) - { - _settings_changed_callback = 0; - }; + USBSerial(bool connect_blocking=true, uint16_t vendor_id=0x1f00, uint16_t product_id=0x2012, uint16_t product_release=0x0001); /** - * Constructor + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. * * @param phy USB phy to use * @param vendor_id Your vendor_id (default: 0x1f00) * @param product_id Your product_id (default: 0x2012) - * @param product_release Your preoduct_release (default: 0x0001) - * @param connect_blocking define if the connection must be blocked if USB not plugged in + * @param product_release Your product_release (default: 0x0001) * */ - USBSerial(USBPhy *phy, uint16_t vendor_id = 0x1f00, uint16_t product_id = 0x2012, uint16_t product_release = 0x0001, bool connect_blocking = true): USBCDC(phy, vendor_id, product_id, product_release, connect_blocking) - { - _settings_changed_callback = 0; - }; + USBSerial(USBPhy *phy, uint16_t vendor_id=0x1f00, uint16_t product_id=0x2012, uint16_t product_release=0x0001); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ + virtual ~USBSerial(); /** * Send a character. You can use puts, printf. From 8d8baf41154a09ffa623c5c6b02da178e6170dad Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 1 May 2018 19:45:58 -0500 Subject: [PATCH 186/488] Fix typo in USBTester.h Fix the spelling of product_release. --- TESTS/usb_device/basic/USBTester.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index 9faca7f5677..dcd345b1bf9 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -33,7 +33,7 @@ class USBTester: public USBDevice { * * @param vendor_id Your vendor_id * @param product_id Your product_id - * @param product_release Your preoduct_release + * @param product_release Your product_release * @param connect_blocking define if the connection must be blocked if USB not plugged in */ USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); From 59adf903cd549a3acd2c647159da4534ff50c5a1 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 24 Mar 2018 20:13:10 +0100 Subject: [PATCH 187/488] Update the USBHID classes Update the USB classes USBHID, USBKeyboard, USBMouse and USBMouseKeyboard from the unsupported folder. --- usb/device/USBHID/USBHID.cpp | 511 +++++++++++++++ usb/device/USBHID/USBHID.h | 274 ++++++++ usb/device/USBHID/USBHID_Types.h | 92 +++ usb/device/USBHID/USBKeyboard.cpp | 604 ++++++++++++++++++ usb/device/USBHID/USBKeyboard.h | 211 +++++++ usb/device/USBHID/USBMouse.cpp | 348 +++++++++++ usb/device/USBHID/USBMouse.h | 234 +++++++ usb/device/USBHID/USBMouseKeyboard.cpp | 828 +++++++++++++++++++++++++ usb/device/USBHID/USBMouseKeyboard.h | 246 ++++++++ 9 files changed, 3348 insertions(+) create mode 100644 usb/device/USBHID/USBHID.cpp create mode 100644 usb/device/USBHID/USBHID.h create mode 100644 usb/device/USBHID/USBHID_Types.h create mode 100644 usb/device/USBHID/USBKeyboard.cpp create mode 100644 usb/device/USBHID/USBKeyboard.h create mode 100644 usb/device/USBHID/USBMouse.cpp create mode 100644 usb/device/USBHID/USBMouse.h create mode 100644 usb/device/USBHID/USBMouseKeyboard.cpp create mode 100644 usb/device/USBHID/USBMouseKeyboard.h diff --git a/usb/device/USBHID/USBHID.cpp b/usb/device/USBHID/USBHID.cpp new file mode 100644 index 00000000000..c1028d78b6a --- /dev/null +++ b/usb/device/USBHID/USBHID.cpp @@ -0,0 +1,511 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBHID.h" +#include "EndpointResolver.h" +#include "usb_phy_api.h" + +class USBHID::AsyncSend: public AsyncOp { +public: + AsyncSend(const HID_REPORT *report): AsyncOp(NULL), report(report), result(false) + { + + } + const HID_REPORT *report; + bool result; +}; + +class USBHID::AsyncRead: public AsyncOp { +public: + AsyncRead(HID_REPORT *report): AsyncOp(NULL), report(report), result(false) + { + + } + HID_REPORT *report; + bool result; +}; + + +USBHID::USBHID(bool connect_blocking, uint8_t output_report_length, uint8_t input_report_length, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) + : USBDevice(get_usb_phy(), vendor_id, product_id, product_release) +{ + _init(output_report_length, input_report_length); + if (connect_blocking) { + connect(); + wait_ready(); + } else { + init(); + } + +} + +USBHID::USBHID(USBPhy *phy, uint8_t output_report_length, uint8_t input_report_length, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) + : USBDevice(phy, vendor_id, product_id, product_release) +{ + _init(output_report_length, input_report_length); +} + +USBHID::~USBHID() +{ + deinit(); +} + +void USBHID::_init(uint8_t output_report_length, uint8_t input_report_length) +{ + EndpointResolver resolver(endpoint_table()); + + resolver.endpoint_ctrl(64); + _int_in = resolver.endpoint_in(USB_EP_TYPE_INT, MAX_HID_REPORT_SIZE); + _int_out = resolver.endpoint_out(USB_EP_TYPE_INT, MAX_HID_REPORT_SIZE); + MBED_ASSERT(resolver.valid()); + + _send_idle = true; + _read_idle = true; + _output_length = output_report_length; + _input_length = input_report_length; +} + +bool USBHID::ready() +{ + return configured(); +} + +void USBHID::wait_ready() +{ + lock(); + + AsyncOp wait_op(NULL); + wait_op.start(&_connect_list); + if (configured()) { + wait_op.complete(); + } + + unlock(); + + wait_op.wait(); +} + + +bool USBHID::send(const HID_REPORT *report) +{ + lock(); + + if (!configured()) { + unlock(); + return false; + } + + if (send_nb(report)) { + unlock(); + return true; + } + + AsyncSend send_op(report); + send_op.start(&_send_list); + + unlock(); + + send_op.wait(); + + return send_op.result; +} + +bool USBHID::send_nb(const HID_REPORT *report) +{ + lock(); + + if (!configured()) { + unlock(); + return false; + } + + bool success = false; + if (_send_idle) { + memcpy(&_input_report, report, sizeof(_input_report)); + write_start(_int_in, _input_report.data, _input_report.length); + _send_idle = false; + success = true; + } + + unlock(); + return success; +} + +bool USBHID::read(HID_REPORT *report) +{ + lock(); + + if (!configured()) { + unlock(); + return false; + } + + if (read_nb(report)) { + unlock(); + return true; + } + + AsyncRead read_op(report); + read_op.start(&_read_list); + + unlock(); + + read_op.wait(); + + return read_op.result; +} + + +bool USBHID::read_nb(HID_REPORT *report) +{ + lock(); + + if (!configured()) { + unlock(); + return false; + } + + bool success = false; + if (_read_idle) { + memcpy(report, &_output_report, sizeof(_output_report)); + read_start(_int_out, _output_report.data, MAX_HID_REPORT_SIZE); + _read_idle = false; + success = true; + } + + unlock(); + return success; +} + +void USBHID::_send_isr(usb_ep_t endpoint) +{ + assert_locked(); + + write_finish(_int_in); + _send_idle = true; + + AsyncSend *send_op = _send_list.head(); + if (send_op != NULL) { + if (send_nb(send_op->report)) { + send_op->result = true; + send_op->complete(); + } + } else { + report_tx(); + } + +} + +void USBHID::_read_isr(usb_ep_t endpoint) +{ + assert_locked(); + + _output_report.length = read_finish(_int_out); + _read_idle = true; + + AsyncRead *read_op = _read_list.head(); + if (read_op != NULL) { + if (read_nb(read_op->report)) { + read_op->result = true; + read_op->complete(); + } + } else { + report_rx(); + } +} + +void USBHID::_connect_wake_all() +{ + assert_locked(); + + AsyncOp *wait_op = _connect_list.head(); + while (wait_op != NULL) { + wait_op->complete(); + wait_op = _connect_list.head(); + } +} + +void USBHID::_send_abort_all() +{ + assert_locked(); + + if (!_send_idle) { + endpoint_abort(_int_in); + _send_idle = true; + } + AsyncSend *tx_cur = _send_list.head(); + while (tx_cur != NULL) { + tx_cur->result = false; + tx_cur->complete(); + tx_cur = _send_list.head(); + } +} + +void USBHID::_read_abort_all() +{ + assert_locked(); + + if (!_read_idle) { + endpoint_abort(_int_out); + _read_idle = true; + } + AsyncRead *rx_cur = _read_list.head(); + while (rx_cur != NULL) { + rx_cur->result = false; + rx_cur->complete(); + rx_cur = _read_list.head(); + } +} + +uint16_t USBHID::report_desc_length() +{ + report_desc(); + return reportLength; +} + + +void USBHID::callback_state_change(DeviceState new_state) +{ + if (new_state == Configured) { + _connect_wake_all(); + } else { + _send_abort_all(); + _read_abort_all(); + } +} + +// +// Route callbacks from lower layers to class(es) +// + + +// Called in ISR context +// Called by USBDevice on Endpoint0 request +// This is used to handle extensions to standard requests +// and class specific requests +// Return true if class handles this request +void USBHID::callback_request(const setup_packet_t *setup) +{ + uint8_t *hidDescriptor; + RequestResult result = PassThrough; + uint8_t *data = NULL; + uint32_t size = 0; + + // Process additional standard requests + + if ((setup->bmRequestType.Type == STANDARD_TYPE)) { + switch (setup->bRequest) { + case GET_DESCRIPTOR: + switch (DESCRIPTOR_TYPE(setup->wValue)) { + case REPORT_DESCRIPTOR: + if ((report_desc() != NULL) \ + && (report_desc_length() != 0)) { + size = report_desc_length(); + data = (uint8_t *)report_desc(); + result = Send; + } + break; + case HID_DESCRIPTOR: + // Find the HID descriptor, after the configuration descriptor + hidDescriptor = find_descriptor(HID_DESCRIPTOR); + if (hidDescriptor != NULL) { + size = HID_DESCRIPTOR_LENGTH; + data = hidDescriptor; + result = Send; + } + break; + + default: + break; + } + break; + default: + break; + } + } + + // Process class-specific requests + + if (setup->bmRequestType.Type == CLASS_TYPE) { + switch (setup->bRequest) { + case SET_REPORT: + // First byte will be used for report ID + _output_report.data[0] = setup->wValue & 0xff; + _output_report.length = setup->wLength + 1; + + size = sizeof(_output_report.data) - 1; + data = &_output_report.data[1]; + result = Send; + break; + default: + break; + } + } + + complete_request(result, data, size); +} + +void USBHID::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) +{ + (void)aborted; + complete_request_xfer_done(true); +} + + +#define DEFAULT_CONFIGURATION (1) + + +// Called in ISR context +// Set configuration. Return false if the +// configuration is not supported +void USBHID::callback_set_configuration(uint8_t configuration) +{ + if (configuration == DEFAULT_CONFIGURATION) { + complete_set_configuration(false); + } + + // Configure endpoints > 0 + endpoint_add(_int_in, MAX_HID_REPORT_SIZE, USB_EP_TYPE_INT, &USBHID::_send_isr); + endpoint_add(_int_out, MAX_HID_REPORT_SIZE, USB_EP_TYPE_INT, &USBHID::_read_isr); + + // We activate the endpoint to be able to recceive data + read_start(_int_out, (uint8_t *)&_output_report, MAX_HID_REPORT_SIZE); + _read_idle = false; + + + complete_set_configuration(true); +} + +void USBHID::callback_set_interface(uint16_t interface, uint8_t alternate) +{ + assert_locked(); + complete_set_interface(true); +} + + +const uint8_t *USBHID::string_iinterface_desc() +{ + static const uint8_t stringIinterfaceDescriptor[] = { + 0x08, //bLength + STRING_DESCRIPTOR, //bDescriptorType 0x03 + 'H', 0, 'I', 0, 'D', 0, //bString iInterface - HID + }; + return stringIinterfaceDescriptor; +} + +const uint8_t *USBHID::string_iproduct_desc() +{ + static const uint8_t stringIproductDescriptor[] = { + 0x16, //bLength + STRING_DESCRIPTOR, //bDescriptorType 0x03 + 'H', 0, 'I', 0, 'D', 0, ' ', 0, 'D', 0, 'E', 0, 'V', 0, 'I', 0, 'C', 0, 'E', 0 //bString iProduct - HID device + }; + return stringIproductDescriptor; +} + + + +const uint8_t *USBHID::report_desc() +{ + uint8_t reportDescriptorTemp[] = { + USAGE_PAGE(2), LSB(0xFFAB), MSB(0xFFAB), + USAGE(2), LSB(0x0200), MSB(0x0200), + COLLECTION(1), 0x01, // Collection (Application) + + REPORT_SIZE(1), 0x08, // 8 bits + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0xFF, + + REPORT_COUNT(1), _input_length, + USAGE(1), 0x01, + INPUT(1), 0x02, // Data, Var, Abs + + REPORT_COUNT(1), _output_length, + USAGE(1), 0x02, + OUTPUT(1), 0x02, // Data, Var, Abs + + END_COLLECTION(0), + }; + reportLength = sizeof(reportDescriptor); + MBED_ASSERT(sizeof(reportDescriptorTemp) == sizeof(reportDescriptor)); + memcpy(reportDescriptor, reportDescriptorTemp, sizeof(reportDescriptor)); + return reportDescriptor; +} + +#define DEFAULT_CONFIGURATION (1) +#define TOTAL_DESCRIPTOR_LENGTH ((1 * CONFIGURATION_DESCRIPTOR_LENGTH) \ + + (1 * INTERFACE_DESCRIPTOR_LENGTH) \ + + (1 * HID_DESCRIPTOR_LENGTH) \ + + (2 * ENDPOINT_DESCRIPTOR_LENGTH)) + +const uint8_t *USBHID::configuration_desc(uint8_t index) +{ + if (index != 0) { + return NULL; + } + + uint8_t configurationDescriptorTemp[] = { + CONFIGURATION_DESCRIPTOR_LENGTH, // bLength + CONFIGURATION_DESCRIPTOR, // bDescriptorType + LSB(TOTAL_DESCRIPTOR_LENGTH), // wTotalLength (LSB) + MSB(TOTAL_DESCRIPTOR_LENGTH), // wTotalLength (MSB) + 0x01, // bNumInterfaces + DEFAULT_CONFIGURATION, // bConfigurationValue + 0x00, // iConfiguration + C_RESERVED | C_SELF_POWERED, // bmAttributes + C_POWER(0), // bMaxPower + + INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0x00, // bInterfaceNumber + 0x00, // bAlternateSetting + 0x02, // bNumEndpoints + HID_CLASS, // bInterfaceClass + HID_SUBCLASS_NONE, // bInterfaceSubClass + HID_PROTOCOL_NONE, // bInterfaceProtocol + 0x00, // iInterface + + HID_DESCRIPTOR_LENGTH, // bLength + HID_DESCRIPTOR, // bDescriptorType + LSB(HID_VERSION_1_11), // bcdHID (LSB) + MSB(HID_VERSION_1_11), // bcdHID (MSB) + 0x00, // bCountryCode + 0x01, // bNumDescriptors + REPORT_DESCRIPTOR, // bDescriptorType + (uint8_t)(LSB(report_desc_length())), // wDescriptorLength (LSB) + (uint8_t)(MSB(report_desc_length())), // wDescriptorLength (MSB) + + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _int_in, // bEndpointAddress + E_INTERRUPT, // bmAttributes + LSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval (milliseconds) + + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _int_out, // bEndpointAddress + E_INTERRUPT, // bmAttributes + LSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval (milliseconds) + }; + MBED_ASSERT(sizeof(configurationDescriptorTemp) == sizeof(_configuration_descriptor)); + memcpy(_configuration_descriptor, configurationDescriptorTemp, sizeof(_configuration_descriptor)); + return _configuration_descriptor; +} diff --git a/usb/device/USBHID/USBHID.h b/usb/device/USBHID/USBHID.h new file mode 100644 index 00000000000..015ad355063 --- /dev/null +++ b/usb/device/USBHID/USBHID.h @@ -0,0 +1,274 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USB_HID_H +#define USB_HID_H + +/* These headers are included for child class. */ +#include "USBDescriptor.h" +#include "USBDevice.h" + +#include "USBHID_Types.h" +#include "AsyncOp.h" +#include "LinkedList.h" + + + +/** + * USBHID example + * @code + * #include "mbed.h" + * #include "USBHID.h" + * + * USBHID hid; + * HID_REPORT recv; + * BusOut leds(LED1,LED2,LED3,LED4); + * + * int main(void) { + * while (1) { + * hid.read(&recv); + * leds = recv.data[0]; + * } + * } + * @endcode + */ + +class USBHID: public USBDevice { +public: + + /** + * Basic constructor + * + * Construct this object optionally connecting and blocking until it is ready. + * + * @note Do not use this constructor in derived classes. + * + * @param connect_blocking true to perform a blocking connect, false to start in a disconnected state + * @param output_report_length Maximum length of a sent report (up to 64 bytes) + * @param input_report_length Maximum length of a received report (up to 64 bytes) + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBHID(bool connect_blocking = true, uint8_t output_report_length = 64, uint8_t input_report_length = 64, uint16_t vendor_id = 0x1234, uint16_t product_id = 0x0006, uint16_t product_release = 0x0001); + + /** + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. + * + * @param phy USB phy to use + * @param output_report_length Maximum length of a sent report (up to 64 bytes) + * @param input_report_length Maximum length of a received report (up to 64 bytes) + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBHID(USBPhy *phy, uint8_t output_report_length, uint8_t input_report_length, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ + virtual ~USBHID(); + + /** + * Check if this class is ready + * + * @return true if the device is in the configured state + */ + bool ready(); + + /** + * Block until this HID device is in the configured state + */ + void wait_ready(); + + /** + * Send a Report. warning: blocking + * + * @param report Report which will be sent (a report is defined by all data and the length) + * @returns true if successful + */ + bool send(const HID_REPORT *report); + + + /** + * Send a Report. warning: non blocking + * + * @param report Report which will be sent (a report is defined by all data and the length) + * @returns true if successful + */ + bool send_nb(const HID_REPORT *report); + + /** + * Read a report: blocking + * + * @param report pointer to the report to fill + * @returns true if successful + */ + bool read(HID_REPORT *report); + + /** + * Read a report: non blocking + * + * @param report pointer to the report to fill + * @returns true if successful + */ + bool read_nb(HID_REPORT *report); + +protected: + uint16_t reportLength; + uint8_t reportDescriptor[27]; + + /* + * Get the Report descriptor + * + * @returns pointer to the report descriptor + */ + virtual const uint8_t *report_desc(); + + /* + * Get the length of the report descriptor + * + * @returns the length of the report descriptor + */ + virtual uint16_t report_desc_length(); + + /* + * Get string product descriptor + * + * @returns pointer to the string product descriptor + */ + virtual const uint8_t *string_iproduct_desc(); + + /* + * Get string interface descriptor + * + * @returns pointer to the string interface descriptor + */ + virtual const uint8_t *string_iinterface_desc(); + + /* + * Get configuration descriptor + * + * @returns pointer to the configuration descriptor + */ + virtual const uint8_t *configuration_desc(uint8_t index); + + + /* + * HID Report received by SET_REPORT request. Warning: Called in ISR context + * First byte of data will be the report ID + * + * @param report Data and length received + */ + virtual void HID_callbackSetReport(HID_REPORT *report) {}; + + /** + * Called when USB changes state + * + * @param new_state The new state of the USBDevice + * + * Warning: Called in ISR context + */ + virtual void callback_state_change(DeviceState new_state); + + /* + * This is used to handle extensions to standard requests + * and class specific requests + */ + virtual void callback_request(const setup_packet_t *setup); + + /* + * This is used to handle extensions to standard requests + * and class specific requests with a data phase + */ + virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); + + + /* + * Called by USBDevice layer. Set configuration of the device. + * For instance, you can add all endpoints that you need on this function. + * + * @param configuration Number of the configuration + * @returns true if class handles this request + */ + virtual void callback_set_configuration(uint8_t configuration); + + /* + * Called by USBDevice layer in response to set_interface. + * + * Upon reception of this command endpoints of any previous interface + * if any must be removed with endpoint_remove and new endpoint added with + * endpoint_add. + * + * @param configuration Number of the configuration + * + * Warning: Called in ISR context + */ + virtual void callback_set_interface(uint16_t interface, uint8_t alternate); + + /* + * Called when there is a hid report that can be read + */ + virtual void report_rx() {} + + /* + * Called when there is space to send a hid report + */ + virtual void report_tx() {} + +protected: + usb_ep_t _int_in; + usb_ep_t _int_out; + +private: + void _init(uint8_t output_report_length, uint8_t input_report_length); + void _send_isr(usb_ep_t endpoint); + void _read_isr(usb_ep_t endpoint); + + void _connect_wake_all(); + void _send_abort_all(); + void _read_abort_all(); + + class AsyncSend; + class AsyncRead; + + LinkedList _connect_list; + LinkedList _send_list; + bool _send_idle; + LinkedList _read_list; + bool _read_idle; + + uint8_t _configuration_descriptor[41]; + HID_REPORT _input_report; + HID_REPORT _output_report; + uint8_t _output_length; + uint8_t _input_length; + + +}; + +#endif diff --git a/usb/device/USBHID/USBHID_Types.h b/usb/device/USBHID/USBHID_Types.h new file mode 100644 index 00000000000..e2604a34a6b --- /dev/null +++ b/usb/device/USBHID/USBHID_Types.h @@ -0,0 +1,92 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBCLASS_HID_TYPES +#define USBCLASS_HID_TYPES + +#include + +/* */ +#define HID_VERSION_1_11 (0x0111) + +/* HID Class */ +#define HID_CLASS (3) +#define HID_SUBCLASS_NONE (0) +#define HID_SUBCLASS_BOOT (1) +#define HID_PROTOCOL_NONE (0) +#define HID_PROTOCOL_KEYBOARD (1) +#define HID_PROTOCOL_MOUSE (2) + +/* Descriptors */ +#define HID_DESCRIPTOR (33) +#define HID_DESCRIPTOR_LENGTH (0x09) +#define REPORT_DESCRIPTOR (34) + +/* Class requests */ +#define GET_REPORT (0x1) +#define GET_IDLE (0x2) +#define SET_REPORT (0x9) +#define SET_IDLE (0xa) + +/* HID Class Report Descriptor */ +/* Short items: size is 0, 1, 2 or 3 specifying 0, 1, 2 or 4 (four) bytes */ +/* of data as per HID Class standard */ + +/* Main items */ +#define INPUT(size) (0x80 | size) +#define OUTPUT(size) (0x90 | size) +#define FEATURE(size) (0xb0 | size) +#define COLLECTION(size) (0xa0 | size) +#define END_COLLECTION(size) (0xc0 | size) + +/* Global items */ +#define USAGE_PAGE(size) (0x04 | size) +#define LOGICAL_MINIMUM(size) (0x14 | size) +#define LOGICAL_MAXIMUM(size) (0x24 | size) +#define PHYSICAL_MINIMUM(size) (0x34 | size) +#define PHYSICAL_MAXIMUM(size) (0x44 | size) +#define UNIT_EXPONENT(size) (0x54 | size) +#define UNIT(size) (0x64 | size) +#define REPORT_SIZE(size) (0x74 | size) +#define REPORT_ID(size) (0x84 | size) +#define REPORT_COUNT(size) (0x94 | size) +#define PUSH(size) (0xa4 | size) +#define POP(size) (0xb4 | size) + +/* Local items */ +#define USAGE(size) (0x08 | size) +#define USAGE_MINIMUM(size) (0x18 | size) +#define USAGE_MAXIMUM(size) (0x28 | size) +#define DESIGNATOR_INDEX(size) (0x38 | size) +#define DESIGNATOR_MINIMUM(size) (0x48 | size) +#define DESIGNATOR_MAXIMUM(size) (0x58 | size) +#define STRING_INDEX(size) (0x78 | size) +#define STRING_MINIMUM(size) (0x88 | size) +#define STRING_MAXIMUM(size) (0x98 | size) +#define DELIMITER(size) (0xa8 | size) + +/* HID Report */ +/* Where report IDs are used the first byte of 'data' will be the */ +/* report ID and 'length' will include this report ID byte. */ + +#define MAX_HID_REPORT_SIZE (64) + +typedef struct { + uint32_t length; + uint8_t data[MAX_HID_REPORT_SIZE]; +} HID_REPORT; + +#endif diff --git a/usb/device/USBHID/USBKeyboard.cpp b/usb/device/USBHID/USBKeyboard.cpp new file mode 100644 index 00000000000..5a9cd9ce467 --- /dev/null +++ b/usb/device/USBHID/USBKeyboard.cpp @@ -0,0 +1,604 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" + +#include "USBKeyboard.h" +#include "usb_phy_api.h" + +#define REPORT_ID_KEYBOARD 1 +#define REPORT_ID_VOLUME 3 + + +typedef struct { + unsigned char usage; + unsigned char modifier; +} KEYMAP; + +#ifdef US_KEYBOARD +/* US keyboard (as HID standard) */ +#define KEYMAP_SIZE (152) +const KEYMAP keymap[KEYMAP_SIZE] = { + {0, 0}, /* NUL */ + {0, 0}, /* SOH */ + {0, 0}, /* STX */ + {0, 0}, /* ETX */ + {0, 0}, /* EOT */ + {0, 0}, /* ENQ */ + {0, 0}, /* ACK */ + {0, 0}, /* BEL */ + {0x2a, 0}, /* BS */ /* Keyboard Delete (Backspace) */ + {0x2b, 0}, /* TAB */ /* Keyboard Tab */ + {0x28, 0}, /* LF */ /* Keyboard Return (Enter) */ + {0, 0}, /* VT */ + {0, 0}, /* FF */ + {0, 0}, /* CR */ + {0, 0}, /* SO */ + {0, 0}, /* SI */ + {0, 0}, /* DEL */ + {0, 0}, /* DC1 */ + {0, 0}, /* DC2 */ + {0, 0}, /* DC3 */ + {0, 0}, /* DC4 */ + {0, 0}, /* NAK */ + {0, 0}, /* SYN */ + {0, 0}, /* ETB */ + {0, 0}, /* CAN */ + {0, 0}, /* EM */ + {0, 0}, /* SUB */ + {0, 0}, /* ESC */ + {0, 0}, /* FS */ + {0, 0}, /* GS */ + {0, 0}, /* RS */ + {0, 0}, /* US */ + {0x2c, 0}, /* */ + {0x1e, KEY_SHIFT}, /* ! */ + {0x34, KEY_SHIFT}, /* " */ + {0x20, KEY_SHIFT}, /* # */ + {0x21, KEY_SHIFT}, /* $ */ + {0x22, KEY_SHIFT}, /* % */ + {0x24, KEY_SHIFT}, /* & */ + {0x34, 0}, /* ' */ + {0x26, KEY_SHIFT}, /* ( */ + {0x27, KEY_SHIFT}, /* ) */ + {0x25, KEY_SHIFT}, /* * */ + {0x2e, KEY_SHIFT}, /* + */ + {0x36, 0}, /* , */ + {0x2d, 0}, /* - */ + {0x37, 0}, /* . */ + {0x38, 0}, /* / */ + {0x27, 0}, /* 0 */ + {0x1e, 0}, /* 1 */ + {0x1f, 0}, /* 2 */ + {0x20, 0}, /* 3 */ + {0x21, 0}, /* 4 */ + {0x22, 0}, /* 5 */ + {0x23, 0}, /* 6 */ + {0x24, 0}, /* 7 */ + {0x25, 0}, /* 8 */ + {0x26, 0}, /* 9 */ + {0x33, KEY_SHIFT}, /* : */ + {0x33, 0}, /* ; */ + {0x36, KEY_SHIFT}, /* < */ + {0x2e, 0}, /* = */ + {0x37, KEY_SHIFT}, /* > */ + {0x38, KEY_SHIFT}, /* ? */ + {0x1f, KEY_SHIFT}, /* @ */ + {0x04, KEY_SHIFT}, /* A */ + {0x05, KEY_SHIFT}, /* B */ + {0x06, KEY_SHIFT}, /* C */ + {0x07, KEY_SHIFT}, /* D */ + {0x08, KEY_SHIFT}, /* E */ + {0x09, KEY_SHIFT}, /* F */ + {0x0a, KEY_SHIFT}, /* G */ + {0x0b, KEY_SHIFT}, /* H */ + {0x0c, KEY_SHIFT}, /* I */ + {0x0d, KEY_SHIFT}, /* J */ + {0x0e, KEY_SHIFT}, /* K */ + {0x0f, KEY_SHIFT}, /* L */ + {0x10, KEY_SHIFT}, /* M */ + {0x11, KEY_SHIFT}, /* N */ + {0x12, KEY_SHIFT}, /* O */ + {0x13, KEY_SHIFT}, /* P */ + {0x14, KEY_SHIFT}, /* Q */ + {0x15, KEY_SHIFT}, /* R */ + {0x16, KEY_SHIFT}, /* S */ + {0x17, KEY_SHIFT}, /* T */ + {0x18, KEY_SHIFT}, /* U */ + {0x19, KEY_SHIFT}, /* V */ + {0x1a, KEY_SHIFT}, /* W */ + {0x1b, KEY_SHIFT}, /* X */ + {0x1c, KEY_SHIFT}, /* Y */ + {0x1d, KEY_SHIFT}, /* Z */ + {0x2f, 0}, /* [ */ + {0x31, 0}, /* \ */ + {0x30, 0}, /* ] */ + {0x23, KEY_SHIFT}, /* ^ */ + {0x2d, KEY_SHIFT}, /* _ */ + {0x35, 0}, /* ` */ + {0x04, 0}, /* a */ + {0x05, 0}, /* b */ + {0x06, 0}, /* c */ + {0x07, 0}, /* d */ + {0x08, 0}, /* e */ + {0x09, 0}, /* f */ + {0x0a, 0}, /* g */ + {0x0b, 0}, /* h */ + {0x0c, 0}, /* i */ + {0x0d, 0}, /* j */ + {0x0e, 0}, /* k */ + {0x0f, 0}, /* l */ + {0x10, 0}, /* m */ + {0x11, 0}, /* n */ + {0x12, 0}, /* o */ + {0x13, 0}, /* p */ + {0x14, 0}, /* q */ + {0x15, 0}, /* r */ + {0x16, 0}, /* s */ + {0x17, 0}, /* t */ + {0x18, 0}, /* u */ + {0x19, 0}, /* v */ + {0x1a, 0}, /* w */ + {0x1b, 0}, /* x */ + {0x1c, 0}, /* y */ + {0x1d, 0}, /* z */ + {0x2f, KEY_SHIFT}, /* { */ + {0x31, KEY_SHIFT}, /* | */ + {0x30, KEY_SHIFT}, /* } */ + {0x35, KEY_SHIFT}, /* ~ */ + {0, 0}, /* DEL */ + + {0x3a, 0}, /* F1 */ + {0x3b, 0}, /* F2 */ + {0x3c, 0}, /* F3 */ + {0x3d, 0}, /* F4 */ + {0x3e, 0}, /* F5 */ + {0x3f, 0}, /* F6 */ + {0x40, 0}, /* F7 */ + {0x41, 0}, /* F8 */ + {0x42, 0}, /* F9 */ + {0x43, 0}, /* F10 */ + {0x44, 0}, /* F11 */ + {0x45, 0}, /* F12 */ + + {0x46, 0}, /* PRINT_SCREEN */ + {0x47, 0}, /* SCROLL_LOCK */ + {0x39, 0}, /* CAPS_LOCK */ + {0x53, 0}, /* NUM_LOCK */ + {0x49, 0}, /* INSERT */ + {0x4a, 0}, /* HOME */ + {0x4b, 0}, /* PAGE_UP */ + {0x4e, 0}, /* PAGE_DOWN */ + + {0x4f, 0}, /* RIGHT_ARROW */ + {0x50, 0}, /* LEFT_ARROW */ + {0x51, 0}, /* DOWN_ARROW */ + {0x52, 0}, /* UP_ARROW */ +}; + +#else +/* UK keyboard */ +#define KEYMAP_SIZE (152) +const KEYMAP keymap[KEYMAP_SIZE] = { + {0, 0}, /* NUL */ + {0, 0}, /* SOH */ + {0, 0}, /* STX */ + {0, 0}, /* ETX */ + {0, 0}, /* EOT */ + {0, 0}, /* ENQ */ + {0, 0}, /* ACK */ + {0, 0}, /* BEL */ + {0x2a, 0}, /* BS */ /* Keyboard Delete (Backspace) */ + {0x2b, 0}, /* TAB */ /* Keyboard Tab */ + {0x28, 0}, /* LF */ /* Keyboard Return (Enter) */ + {0, 0}, /* VT */ + {0, 0}, /* FF */ + {0, 0}, /* CR */ + {0, 0}, /* SO */ + {0, 0}, /* SI */ + {0, 0}, /* DEL */ + {0, 0}, /* DC1 */ + {0, 0}, /* DC2 */ + {0, 0}, /* DC3 */ + {0, 0}, /* DC4 */ + {0, 0}, /* NAK */ + {0, 0}, /* SYN */ + {0, 0}, /* ETB */ + {0, 0}, /* CAN */ + {0, 0}, /* EM */ + {0, 0}, /* SUB */ + {0, 0}, /* ESC */ + {0, 0}, /* FS */ + {0, 0}, /* GS */ + {0, 0}, /* RS */ + {0, 0}, /* US */ + {0x2c, 0}, /* */ + {0x1e, KEY_SHIFT}, /* ! */ + {0x1f, KEY_SHIFT}, /* " */ + {0x32, 0}, /* # */ + {0x21, KEY_SHIFT}, /* $ */ + {0x22, KEY_SHIFT}, /* % */ + {0x24, KEY_SHIFT}, /* & */ + {0x34, 0}, /* ' */ + {0x26, KEY_SHIFT}, /* ( */ + {0x27, KEY_SHIFT}, /* ) */ + {0x25, KEY_SHIFT}, /* * */ + {0x2e, KEY_SHIFT}, /* + */ + {0x36, 0}, /* , */ + {0x2d, 0}, /* - */ + {0x37, 0}, /* . */ + {0x38, 0}, /* / */ + {0x27, 0}, /* 0 */ + {0x1e, 0}, /* 1 */ + {0x1f, 0}, /* 2 */ + {0x20, 0}, /* 3 */ + {0x21, 0}, /* 4 */ + {0x22, 0}, /* 5 */ + {0x23, 0}, /* 6 */ + {0x24, 0}, /* 7 */ + {0x25, 0}, /* 8 */ + {0x26, 0}, /* 9 */ + {0x33, KEY_SHIFT}, /* : */ + {0x33, 0}, /* ; */ + {0x36, KEY_SHIFT}, /* < */ + {0x2e, 0}, /* = */ + {0x37, KEY_SHIFT}, /* > */ + {0x38, KEY_SHIFT}, /* ? */ + {0x34, KEY_SHIFT}, /* @ */ + {0x04, KEY_SHIFT}, /* A */ + {0x05, KEY_SHIFT}, /* B */ + {0x06, KEY_SHIFT}, /* C */ + {0x07, KEY_SHIFT}, /* D */ + {0x08, KEY_SHIFT}, /* E */ + {0x09, KEY_SHIFT}, /* F */ + {0x0a, KEY_SHIFT}, /* G */ + {0x0b, KEY_SHIFT}, /* H */ + {0x0c, KEY_SHIFT}, /* I */ + {0x0d, KEY_SHIFT}, /* J */ + {0x0e, KEY_SHIFT}, /* K */ + {0x0f, KEY_SHIFT}, /* L */ + {0x10, KEY_SHIFT}, /* M */ + {0x11, KEY_SHIFT}, /* N */ + {0x12, KEY_SHIFT}, /* O */ + {0x13, KEY_SHIFT}, /* P */ + {0x14, KEY_SHIFT}, /* Q */ + {0x15, KEY_SHIFT}, /* R */ + {0x16, KEY_SHIFT}, /* S */ + {0x17, KEY_SHIFT}, /* T */ + {0x18, KEY_SHIFT}, /* U */ + {0x19, KEY_SHIFT}, /* V */ + {0x1a, KEY_SHIFT}, /* W */ + {0x1b, KEY_SHIFT}, /* X */ + {0x1c, KEY_SHIFT}, /* Y */ + {0x1d, KEY_SHIFT}, /* Z */ + {0x2f, 0}, /* [ */ + {0x64, 0}, /* \ */ + {0x30, 0}, /* ] */ + {0x23, KEY_SHIFT}, /* ^ */ + {0x2d, KEY_SHIFT}, /* _ */ + {0x35, 0}, /* ` */ + {0x04, 0}, /* a */ + {0x05, 0}, /* b */ + {0x06, 0}, /* c */ + {0x07, 0}, /* d */ + {0x08, 0}, /* e */ + {0x09, 0}, /* f */ + {0x0a, 0}, /* g */ + {0x0b, 0}, /* h */ + {0x0c, 0}, /* i */ + {0x0d, 0}, /* j */ + {0x0e, 0}, /* k */ + {0x0f, 0}, /* l */ + {0x10, 0}, /* m */ + {0x11, 0}, /* n */ + {0x12, 0}, /* o */ + {0x13, 0}, /* p */ + {0x14, 0}, /* q */ + {0x15, 0}, /* r */ + {0x16, 0}, /* s */ + {0x17, 0}, /* t */ + {0x18, 0}, /* u */ + {0x19, 0}, /* v */ + {0x1a, 0}, /* w */ + {0x1b, 0}, /* x */ + {0x1c, 0}, /* y */ + {0x1d, 0}, /* z */ + {0x2f, KEY_SHIFT}, /* { */ + {0x64, KEY_SHIFT}, /* | */ + {0x30, KEY_SHIFT}, /* } */ + {0x32, KEY_SHIFT}, /* ~ */ + {0, 0}, /* DEL */ + + {0x3a, 0}, /* F1 */ + {0x3b, 0}, /* F2 */ + {0x3c, 0}, /* F3 */ + {0x3d, 0}, /* F4 */ + {0x3e, 0}, /* F5 */ + {0x3f, 0}, /* F6 */ + {0x40, 0}, /* F7 */ + {0x41, 0}, /* F8 */ + {0x42, 0}, /* F9 */ + {0x43, 0}, /* F10 */ + {0x44, 0}, /* F11 */ + {0x45, 0}, /* F12 */ + + {0x46, 0}, /* PRINT_SCREEN */ + {0x47, 0}, /* SCROLL_LOCK */ + {0x39, 0}, /* CAPS_LOCK */ + {0x53, 0}, /* NUM_LOCK */ + {0x49, 0}, /* INSERT */ + {0x4a, 0}, /* HOME */ + {0x4b, 0}, /* PAGE_UP */ + {0x4e, 0}, /* PAGE_DOWN */ + + {0x4f, 0}, /* RIGHT_ARROW */ + {0x50, 0}, /* LEFT_ARROW */ + {0x51, 0}, /* DOWN_ARROW */ + {0x52, 0}, /* UP_ARROW */ +}; +#endif + + +USBKeyboard::USBKeyboard(bool connect, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBHID(get_usb_phy(), 0, 0, vendor_id, product_id, product_release) +{ + _lock_status = 0; + if (connect) { + USBDevice::connect(); + wait_ready(); + } else { + init(); + } +} + +USBKeyboard::USBKeyboard(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBHID(phy, 0, 0, vendor_id, product_id, product_release) +{ + _lock_status = 0; + + // User or child responsible for calling connect or init +} + +USBKeyboard::~USBKeyboard() +{ + deinit(); +} + +const uint8_t *USBKeyboard::report_desc() +{ + static const uint8_t reportDescriptor[] = { + USAGE_PAGE(1), 0x01, // Generic Desktop + USAGE(1), 0x06, // Keyboard + COLLECTION(1), 0x01, // Application + REPORT_ID(1), REPORT_ID_KEYBOARD, + + USAGE_PAGE(1), 0x07, // Key Codes + USAGE_MINIMUM(1), 0xE0, + USAGE_MAXIMUM(1), 0xE7, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x01, + REPORT_SIZE(1), 0x01, + REPORT_COUNT(1), 0x08, + INPUT(1), 0x02, // Data, Variable, Absolute + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x08, + INPUT(1), 0x01, // Constant + + + REPORT_COUNT(1), 0x05, + REPORT_SIZE(1), 0x01, + USAGE_PAGE(1), 0x08, // LEDs + USAGE_MINIMUM(1), 0x01, + USAGE_MAXIMUM(1), 0x05, + OUTPUT(1), 0x02, // Data, Variable, Absolute + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x03, + OUTPUT(1), 0x01, // Constant + + + REPORT_COUNT(1), 0x06, + REPORT_SIZE(1), 0x08, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x65, + USAGE_PAGE(1), 0x07, // Key Codes + USAGE_MINIMUM(1), 0x00, + USAGE_MAXIMUM(1), 0x65, + INPUT(1), 0x00, // Data, Array + END_COLLECTION(0), + + // Media Control + USAGE_PAGE(1), 0x0C, + USAGE(1), 0x01, + COLLECTION(1), 0x01, + REPORT_ID(1), REPORT_ID_VOLUME, + USAGE_PAGE(1), 0x0C, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x01, + REPORT_SIZE(1), 0x01, + REPORT_COUNT(1), 0x07, + USAGE(1), 0xB5, // Next Track + USAGE(1), 0xB6, // Previous Track + USAGE(1), 0xB7, // Stop + USAGE(1), 0xCD, // Play / Pause + USAGE(1), 0xE2, // Mute + USAGE(1), 0xE9, // Volume Up + USAGE(1), 0xEA, // Volume Down + INPUT(1), 0x02, // Input (Data, Variable, Absolute) + REPORT_COUNT(1), 0x01, + INPUT(1), 0x01, + END_COLLECTION(0), + }; + reportLength = sizeof(reportDescriptor); + return reportDescriptor; +} + + +void USBKeyboard::report_rx() +{ + assert_locked(); + + HID_REPORT report; + read_nb(&report); + + // we take [1] because [0] is the report ID + _lock_status = report.data[1] & 0x07; +} + +uint8_t USBKeyboard::lock_status() +{ + return _lock_status; +} + +int USBKeyboard::_putc(int c) +{ + return key_code(c, keymap[c].modifier); +} + +bool USBKeyboard::key_code(uint8_t key, uint8_t modifier) +{ + _mutex.lock(); + + // Send a simulated keyboard keypress. Returns true if successful. + HID_REPORT report; + + report.data[0] = REPORT_ID_KEYBOARD; + report.data[1] = modifier; + report.data[2] = 0; + report.data[3] = keymap[key].usage; + report.data[4] = 0; + report.data[5] = 0; + report.data[6] = 0; + report.data[7] = 0; + report.data[8] = 0; + + report.length = 9; + + if (!send(&report)) { + _mutex.unlock(); + return false; + } + + report.data[1] = 0; + report.data[3] = 0; + + if (!send(&report)) { + _mutex.unlock(); + return false; + } + + _mutex.unlock(); + return true; + +} + + +bool USBKeyboard::media_control(MEDIA_KEY key) +{ + _mutex.lock(); + + HID_REPORT report; + + report.data[0] = REPORT_ID_VOLUME; + report.data[1] = (1 << key) & 0x7f; + + report.length = 2; + + if (!send(&report)) { + _mutex.unlock(); + return false; + } + + report.data[0] = REPORT_ID_VOLUME; + report.data[1] = 0; + + report.length = 2; + + if (!send(&report)) { + _mutex.unlock(); + return false; + } + + _mutex.unlock(); + return true; +} + +#define DEFAULT_CONFIGURATION (1) +#define TOTAL_DESCRIPTOR_LENGTH ((1 * CONFIGURATION_DESCRIPTOR_LENGTH) \ + + (1 * INTERFACE_DESCRIPTOR_LENGTH) \ + + (1 * HID_DESCRIPTOR_LENGTH) \ + + (2 * ENDPOINT_DESCRIPTOR_LENGTH)) + +const uint8_t *USBKeyboard::configuration_desc(uint8_t index) +{ + if (index != 0) { + return NULL; + } + uint8_t configuration_descriptor_temp[] = { + CONFIGURATION_DESCRIPTOR_LENGTH, // bLength + CONFIGURATION_DESCRIPTOR, // bDescriptorType + LSB(TOTAL_DESCRIPTOR_LENGTH), // wTotalLength (LSB) + MSB(TOTAL_DESCRIPTOR_LENGTH), // wTotalLength (MSB) + 0x01, // bNumInterfaces + DEFAULT_CONFIGURATION, // bConfigurationValue + 0x00, // iConfiguration + C_RESERVED | C_SELF_POWERED, // bmAttributes + C_POWER(0), // bMaxPower + + INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0x00, // bInterfaceNumber + 0x00, // bAlternateSetting + 0x02, // bNumEndpoints + HID_CLASS, // bInterfaceClass + HID_SUBCLASS_BOOT, // bInterfaceSubClass + HID_PROTOCOL_KEYBOARD, // bInterfaceProtocol + 0x00, // iInterface + + HID_DESCRIPTOR_LENGTH, // bLength + HID_DESCRIPTOR, // bDescriptorType + LSB(HID_VERSION_1_11), // bcdHID (LSB) + MSB(HID_VERSION_1_11), // bcdHID (MSB) + 0x00, // bCountryCode + 0x01, // bNumDescriptors + REPORT_DESCRIPTOR, // bDescriptorType + (uint8_t)(LSB(report_desc_length())), // wDescriptorLength (LSB) + (uint8_t)(MSB(report_desc_length())), // wDescriptorLength (MSB) + + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _int_in, // bEndpointAddress + E_INTERRUPT, // bmAttributes + LSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval (milliseconds) + + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _int_out, // bEndpointAddress + E_INTERRUPT, // bmAttributes + LSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval (milliseconds) + }; + MBED_ASSERT(sizeof(configuration_descriptor_temp) == sizeof(_configuration_descriptor)); + memcpy(_configuration_descriptor, configuration_descriptor_temp, sizeof(_configuration_descriptor)); + return _configuration_descriptor; +} + +int USBKeyboard::_getc() +{ + return -1; +} diff --git a/usb/device/USBHID/USBKeyboard.h b/usb/device/USBHID/USBKeyboard.h new file mode 100644 index 00000000000..d2f8a765a82 --- /dev/null +++ b/usb/device/USBHID/USBKeyboard.h @@ -0,0 +1,211 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBKEYBOARD_H +#define USBKEYBOARD_H + +#include "USBHID.h" +#include "Stream.h" +#include "PlatformMutex.h" + +/* Modifiers, left keys then right keys. */ +enum MODIFIER_KEY { + KEY_CTRL = 0x01, + KEY_SHIFT = 0x02, + KEY_ALT = 0x04, + KEY_LOGO = 0x08, + KEY_RCTRL = 0x10, + KEY_RSHIFT = 0x20, + KEY_RALT = 0x40, + KEY_RLOGO = 0x80, +}; + + +enum MEDIA_KEY { + KEY_NEXT_TRACK, /*!< next Track Button */ + KEY_PREVIOUS_TRACK, /*!< Previous track Button */ + KEY_STOP, /*!< Stop Button */ + KEY_PLAY_PAUSE, /*!< Play/Pause Button */ + KEY_MUTE, /*!< Mute Button */ + KEY_VOLUME_UP, /*!< Volume Up Button */ + KEY_VOLUME_DOWN, /*!< Volume Down Button */ +}; + +enum FUNCTION_KEY { + KEY_F1 = 128, /* F1 key */ + KEY_F2, /* F2 key */ + KEY_F3, /* F3 key */ + KEY_F4, /* F4 key */ + KEY_F5, /* F5 key */ + KEY_F6, /* F6 key */ + KEY_F7, /* F7 key */ + KEY_F8, /* F8 key */ + KEY_F9, /* F9 key */ + KEY_F10, /* F10 key */ + KEY_F11, /* F11 key */ + KEY_F12, /* F12 key */ + + KEY_PRINT_SCREEN, /* Print Screen key */ + KEY_SCROLL_LOCK, /* Scroll lock */ + KEY_CAPS_LOCK, /* caps lock */ + KEY_NUM_LOCK, /* num lock */ + KEY_INSERT, /* Insert key */ + KEY_HOME, /* Home key */ + KEY_PAGE_UP, /* Page Up key */ + KEY_PAGE_DOWN, /* Page Down key */ + + RIGHT_ARROW, /* Right arrow */ + LEFT_ARROW, /* Left arrow */ + DOWN_ARROW, /* Down arrow */ + UP_ARROW, /* Up arrow */ +}; + +/** + * USBKeyboard example + * @code + * + * #include "mbed.h" + * #include "USBKeyboard.h" + * + * USBKeyboard key; + * + * int main(void) + * { + * while (1) { + * key.printf("Hello World\r\n"); + * wait(1); + * } + * } + * + * @endcode + * + * @note Synchronization level: Thread safe + */ +class USBKeyboard: public USBHID, public Stream { +public: + + /** + * Basic constructor + * + * Construct this object optionally connecting and blocking until it is ready. + * + * @note Do not use this constructor in derived classes. + * + * @param connect_blocking true to perform a blocking connect, false to start in a disconnected state + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBKeyboard(bool connect_blocking = true, uint16_t vendor_id = 0x1235, uint16_t product_id = 0x0050, uint16_t product_release = 0x0001); + + /** + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. + * + * @param phy USB phy to use + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBKeyboard(USBPhy *phy, uint16_t vendor_id = 0x1235, uint16_t product_id = 0x0050, uint16_t product_release = 0x0001); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ + virtual ~USBKeyboard(); + + /** + * To send a character defined by a modifier(CTRL, SHIFT, ALT) and the key + * + * @code + * //To send CTRL + s (save) + * keyboard.key_code('s', KEY_CTRL); + * @endcode + * + * @param modifier bit 0: KEY_CTRL, bit 1: KEY_SHIFT, bit 2: KEY_ALT (default: 0) + * @param key character to send + * @returns true if there is no error, false otherwise + */ + bool key_code(uint8_t key, uint8_t modifier = 0); + + /** + * Send a character + * + * @param c character to be sent + * @returns true if there is no error, false otherwise + */ + virtual int _putc(int c); + + /** + * Control media keys + * + * @param key media key pressed (KEY_NEXT_TRACK, KEY_PREVIOUS_TRACK, KEY_STOP, KEY_PLAY_PAUSE, KEY_MUTE, KEY_VOLUME_UP, KEY_VOLUME_DOWN) + * @returns true if there is no error, false otherwise + */ + bool media_control(MEDIA_KEY key); + + /* + * To define the report descriptor. Warning: this method has to store the length of the report descriptor in reportLength. + * + * @returns pointer to the report descriptor + */ + virtual const uint8_t *report_desc(); + + /* + * Called when a data is received on the OUT endpoint. Useful to switch on LED of LOCK keys + */ + virtual void report_rx(); + + /** + * Read status of lock keys. Useful to switch-on/off leds according to key pressed. Only the first three bits of the result is important: + * - First bit: NUM_LOCK + * - Second bit: CAPS_LOCK + * - Third bit: SCROLL_LOCK + * + * @returns status of lock keys + */ + uint8_t lock_status(); + +protected: + /* + * Get configuration descriptor + * + * @returns pointer to the configuration descriptor + */ + virtual const uint8_t *configuration_desc(uint8_t index); + +private: + + //dummy otherwise it doesn't compile (we must define all methods of an abstract class) + virtual int _getc(); + + uint8_t _configuration_descriptor[41]; + uint8_t _lock_status; + PlatformMutex _mutex; + +}; + +#endif diff --git a/usb/device/USBHID/USBMouse.cpp b/usb/device/USBHID/USBMouse.cpp new file mode 100644 index 00000000000..902e9e72f7f --- /dev/null +++ b/usb/device/USBHID/USBMouse.cpp @@ -0,0 +1,348 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBMouse.h" +#include "PlatformMutex.h" +#include "usb_phy_api.h" + + +USBMouse::USBMouse(bool connect_blocking, MOUSE_TYPE mouse_type, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBHID(get_usb_phy(), 0, 0, vendor_id, product_id, product_release) +{ + _button = 0; + _mouse_type = mouse_type; + + if (connect_blocking) { + USBDevice::connect(); + wait_ready(); + } else { + init(); + } +} + +USBMouse::USBMouse(USBPhy *phy, MOUSE_TYPE mouse_type, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBHID(get_usb_phy(), 0, 0, vendor_id, product_id, product_release) +{ + _button = 0; + _mouse_type = mouse_type; +} + +USBMouse::~USBMouse() +{ + deinit(); +} + +bool USBMouse::update(int16_t x, int16_t y, uint8_t button, int8_t z) +{ + bool ret; + switch (_mouse_type) { + case REL_MOUSE: + _mutex.lock(); + + while (x > 127) { + if (!mouse_send(127, 0, button, z)) { + _mutex.unlock(); + return false; + } + x = x - 127; + } + while (x < -128) { + if (!mouse_send(-128, 0, button, z)) { + _mutex.unlock(); + return false; + } + x = x + 128; + } + while (y > 127) { + if (!mouse_send(0, 127, button, z)) { + _mutex.unlock(); + return false; + } + y = y - 127; + } + while (y < -128) { + if (!mouse_send(0, -128, button, z)) { + _mutex.unlock(); + return false; + } + y = y + 128; + } + ret = mouse_send(x, y, button, z); + + _mutex.unlock(); + return ret; + case ABS_MOUSE: + _mutex.lock(); + + HID_REPORT report; + + report.data[0] = x & 0xff; + report.data[1] = (x >> 8) & 0xff; + report.data[2] = y & 0xff; + report.data[3] = (y >> 8) & 0xff; + report.data[4] = -z; + report.data[5] = button & 0x07; + + report.length = 6; + + ret = send(&report); + + _mutex.unlock(); + return ret; + default: + return false; + } +} + +bool USBMouse::mouse_send(int8_t x, int8_t y, uint8_t buttons, int8_t z) +{ + _mutex.lock(); + + HID_REPORT report; + report.data[0] = buttons & 0x07; + report.data[1] = x; + report.data[2] = y; + report.data[3] = -z; // >0 to scroll down, <0 to scroll up + + report.length = 4; + + bool ret = send(&report); + + _mutex.unlock(); + return ret; +} + +bool USBMouse::move(int16_t x, int16_t y) +{ + _mutex.lock(); + + bool ret = update(x, y, _button, 0); + + _mutex.unlock(); + return ret; +} + +bool USBMouse::scroll(int8_t z) +{ + _mutex.lock(); + + bool ret = update(0, 0, _button, z); + + _mutex.unlock(); + return ret; +} + + +bool USBMouse::double_click() +{ + _mutex.lock(); + + if (!click(MOUSE_LEFT)) { + _mutex.unlock(); + return false; + } + wait(0.1); + bool ret = click(MOUSE_LEFT); + + _mutex.unlock(); + return ret; +} + +bool USBMouse::click(uint8_t button) +{ + _mutex.lock(); + + if (!update(0, 0, button, 0)) { + _mutex.unlock(); + return false; + } + wait(0.01); + bool ret = update(0, 0, 0, 0); + + _mutex.unlock(); + return ret; +} + +bool USBMouse::press(uint8_t button) +{ + _mutex.lock(); + + _button = button & 0x07; + bool ret = update(0, 0, _button, 0); + + _mutex.unlock(); + return ret; +} + +bool USBMouse::release(uint8_t button) +{ + _mutex.lock(); + + _button = (_button & (~button)) & 0x07; + bool ret = update(0, 0, _button, 0); + + _mutex.unlock(); + return ret; +} + + +const uint8_t *USBMouse::report_desc() +{ + + if (_mouse_type == REL_MOUSE) { + static const uint8_t report_descriptor[] = { + USAGE_PAGE(1), 0x01, // Genric Desktop + USAGE(1), 0x02, // Mouse + COLLECTION(1), 0x01, // Application + USAGE(1), 0x01, // Pointer + COLLECTION(1), 0x00, // Physical + + REPORT_COUNT(1), 0x03, + REPORT_SIZE(1), 0x01, + USAGE_PAGE(1), 0x09, // Buttons + USAGE_MINIMUM(1), 0x1, + USAGE_MAXIMUM(1), 0x3, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x01, + INPUT(1), 0x02, + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x05, + INPUT(1), 0x01, + + REPORT_COUNT(1), 0x03, + REPORT_SIZE(1), 0x08, + USAGE_PAGE(1), 0x01, + USAGE(1), 0x30, // X + USAGE(1), 0x31, // Y + USAGE(1), 0x38, // scroll + LOGICAL_MINIMUM(1), 0x81, + LOGICAL_MAXIMUM(1), 0x7f, + INPUT(1), 0x06, // Relative data + + END_COLLECTION(0), + END_COLLECTION(0), + }; + reportLength = sizeof(report_descriptor); + return report_descriptor; + } else if (_mouse_type == ABS_MOUSE) { + static const uint8_t report_descriptor[] = { + USAGE_PAGE(1), 0x01, // Generic Desktop + USAGE(1), 0x02, // Mouse + COLLECTION(1), 0x01, // Application + USAGE(1), 0x01, // Pointer + COLLECTION(1), 0x00, // Physical + + USAGE_PAGE(1), 0x01, // Generic Desktop + USAGE(1), 0x30, // X + USAGE(1), 0x31, // Y + LOGICAL_MINIMUM(1), 0x00, // 0 + LOGICAL_MAXIMUM(2), 0xff, 0x7f, // 32767 + REPORT_SIZE(1), 0x10, + REPORT_COUNT(1), 0x02, + INPUT(1), 0x02, // Data, Variable, Absolute + + USAGE_PAGE(1), 0x01, // Generic Desktop + USAGE(1), 0x38, // scroll + LOGICAL_MINIMUM(1), 0x81, // -127 + LOGICAL_MAXIMUM(1), 0x7f, // 127 + REPORT_SIZE(1), 0x08, + REPORT_COUNT(1), 0x01, + INPUT(1), 0x06, // Data, Variable, Relative + + USAGE_PAGE(1), 0x09, // Buttons + USAGE_MINIMUM(1), 0x01, + USAGE_MAXIMUM(1), 0x03, + LOGICAL_MINIMUM(1), 0x00, // 0 + LOGICAL_MAXIMUM(1), 0x01, // 1 + REPORT_COUNT(1), 0x03, + REPORT_SIZE(1), 0x01, + INPUT(1), 0x02, // Data, Variable, Absolute + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x05, + INPUT(1), 0x01, // Constant + + END_COLLECTION(0), + END_COLLECTION(0) + }; + reportLength = sizeof(report_descriptor); + return report_descriptor; + } + return NULL; +} + +#define DEFAULT_CONFIGURATION (1) +#define TOTAL_DESCRIPTOR_LENGTH ((1 * CONFIGURATION_DESCRIPTOR_LENGTH) \ + + (1 * INTERFACE_DESCRIPTOR_LENGTH) \ + + (1 * HID_DESCRIPTOR_LENGTH) \ + + (2 * ENDPOINT_DESCRIPTOR_LENGTH)) + +const uint8_t *USBMouse::configuration_desc(uint8_t index) +{ + if (index != 0) { + return NULL; + } + uint8_t configuration_descriptor_temp[] = { + CONFIGURATION_DESCRIPTOR_LENGTH, // bLength + CONFIGURATION_DESCRIPTOR, // bDescriptorType + LSB(TOTAL_DESCRIPTOR_LENGTH), // wTotalLength (LSB) + MSB(TOTAL_DESCRIPTOR_LENGTH), // wTotalLength (MSB) + 0x01, // bNumInterfaces + DEFAULT_CONFIGURATION, // bConfigurationValue + 0x00, // iConfiguration + C_RESERVED | C_SELF_POWERED, // bmAttributes + C_POWER(0), // bMaxPower + + INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0x00, // bInterfaceNumber + 0x00, // bAlternateSetting + 0x02, // bNumEndpoints + HID_CLASS, // bInterfaceClass + HID_SUBCLASS_BOOT, // bInterfaceSubClass + HID_PROTOCOL_MOUSE, // bInterfaceProtocol + 0x00, // iInterface + + HID_DESCRIPTOR_LENGTH, // bLength + HID_DESCRIPTOR, // bDescriptorType + LSB(HID_VERSION_1_11), // bcdHID (LSB) + MSB(HID_VERSION_1_11), // bcdHID (MSB) + 0x00, // bCountryCode + 0x01, // bNumDescriptors + REPORT_DESCRIPTOR, // bDescriptorType + (uint8_t)(LSB(report_desc_length())), // wDescriptorLength (LSB) + (uint8_t)(MSB(report_desc_length())), // wDescriptorLength (MSB) + + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _int_in, // bEndpointAddress + E_INTERRUPT, // bmAttributes + LSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval (milliseconds) + + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _int_out, // bEndpointAddress + E_INTERRUPT, // bmAttributes + LSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval (milliseconds) + }; + MBED_ASSERT(sizeof(configuration_descriptor_temp) == sizeof(_configuration_descriptor)); + memcpy(_configuration_descriptor, configuration_descriptor_temp, sizeof(_configuration_descriptor)); + return _configuration_descriptor; +} diff --git a/usb/device/USBHID/USBMouse.h b/usb/device/USBHID/USBMouse.h new file mode 100644 index 00000000000..11ee34dc268 --- /dev/null +++ b/usb/device/USBHID/USBMouse.h @@ -0,0 +1,234 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBMOUSE_H +#define USBMOUSE_H + +#include "USBHID.h" +#include "PlatformMutex.h" + +#define REPORT_ID_MOUSE 2 + +/* Common usage */ + +enum MOUSE_BUTTON { + MOUSE_LEFT = 1, + MOUSE_RIGHT = 2, + MOUSE_MIDDLE = 4, +}; + +/* X and Y limits */ +/* These values do not directly map to screen pixels */ +/* Zero may be interpreted as meaning 'no movement' */ +#define X_MIN_ABS (1) /*!< Minimum value on x-axis */ +#define Y_MIN_ABS (1) /*!< Minimum value on y-axis */ +#define X_MAX_ABS (0x7fff) /*!< Maximum value on x-axis */ +#define Y_MAX_ABS (0x7fff) /*!< Maximum value on y-axis */ + +#define X_MIN_REL (-127) /*!< The maximum value that we can move to the left on the x-axis */ +#define Y_MIN_REL (-127) /*!< The maximum value that we can move up on the y-axis */ +#define X_MAX_REL (127) /*!< The maximum value that we can move to the right on the x-axis */ +#define Y_MAX_REL (127) /*!< The maximum value that we can move down on the y-axis */ + +enum MOUSE_TYPE { + ABS_MOUSE, + REL_MOUSE, +}; + +/** + * + * USBMouse example + * @code + * #include "mbed.h" + * #include "USBMouse.h" + * + * USBMouse mouse; + * + * int main(void) + * { + * while (1) + * { + * mouse.move(20, 0); + * wait(0.5); + * } + * } + * + * @endcode + * + * + * @code + * #include "mbed.h" + * #include "USBMouse.h" + * #include + * + * USBMouse mouse(true, ABS_MOUSE); + * + * int main(void) + * { + * uint16_t x_center = (X_MAX_ABS - X_MIN_ABS)/2; + * uint16_t y_center = (Y_MAX_ABS - Y_MIN_ABS)/2; + * uint16_t x_screen = 0; + * uint16_t y_screen = 0; + * + * uint32_t x_origin = x_center; + * uint32_t y_origin = y_center; + * uint32_t radius = 5000; + * uint32_t angle = 0; + * + * while (1) + * { + * x_screen = x_origin + cos((double)angle*3.14/180.0)*radius; + * y_screen = y_origin + sin((double)angle*3.14/180.0)*radius; + * + * mouse.move(x_screen, y_screen); + * angle += 3; + * wait(0.01); + * } + * } + * + * @endcode + * + * @note Synchronization level: Thread safe + */ +class USBMouse: public USBHID { +public: + + /** + * Basic constructor + * + * Construct this object optionally connecting and blocking until it is ready. + * + * @note Do not use this constructor in derived classes. + * + * @param connect_blocking true to perform a blocking connect, false to start in a disconnected state + * @param mouse_type Mouse type: ABS_MOUSE (absolute mouse) or REL_MOUSE (relative mouse) (default: REL_MOUSE) + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBMouse(bool connect_blocking = true, MOUSE_TYPE mouse_type = REL_MOUSE, uint16_t vendor_id = 0x1234, uint16_t product_id = 0x0001, uint16_t product_release = 0x0001); + + /** + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. + * + * @param phy USB phy to use + * @param mouse_type Mouse type: ABS_MOUSE (absolute mouse) or REL_MOUSE (relative mouse) (default: REL_MOUSE) + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBMouse(USBPhy *phy, MOUSE_TYPE mouse_type = REL_MOUSE, uint16_t vendor_id = 0x1234, uint16_t product_id = 0x0001, uint16_t product_release = 0x0001); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ + virtual ~USBMouse(); + + /** + * Write a state of the mouse + * + * @param x x-axis position + * @param y y-axis position + * @param buttons buttons state (first bit represents MOUSE_LEFT, second bit MOUSE_RIGHT and third bit MOUSE_MIDDLE) + * @param z wheel state (>0 to scroll down, <0 to scroll up) + * @returns true if there is no error, false otherwise + */ + bool update(int16_t x, int16_t y, uint8_t buttons, int8_t z); + + /** + * Move the cursor to (x, y) + * + * @param x x-axis position + * @param y y-axis position + * @returns true if there is no error, false otherwise + */ + bool move(int16_t x, int16_t y); + + /** + * Press one or several buttons + * + * @param button button state (ex: press(MOUSE_LEFT)) + * @returns true if there is no error, false otherwise + */ + bool press(uint8_t button); + + /** + * Release one or several buttons + * + * @param button button state (ex: release(MOUSE_LEFT)) + * @returns true if there is no error, false otherwise + */ + bool release(uint8_t button); + + /** + * Double click (MOUSE_LEFT) + * + * @returns true if there is no error, false otherwise + */ + bool double_click(); + + /** + * Click + * + * @param button state of the buttons ( ex: clic(MOUSE_LEFT)) + * @returns true if there is no error, false otherwise + */ + bool click(uint8_t button); + + /** + * Scrolling + * + * @param z value of the wheel (>0 to go down, <0 to go up) + * @returns true if there is no error, false otherwise + */ + bool scroll(int8_t z); + + /* + * To define the report descriptor. Warning: this method has to store the length of the report descriptor in reportLength. + * + * @returns pointer to the report descriptor + */ + virtual const uint8_t *report_desc(); + +protected: + /* + * Get configuration descriptor + * + * @returns pointer to the configuration descriptor + */ + virtual const uint8_t *configuration_desc(uint8_t index); + +private: + MOUSE_TYPE _mouse_type; + uint8_t _button; + uint8_t _configuration_descriptor[41]; + PlatformMutex _mutex; + + bool mouse_send(int8_t x, int8_t y, uint8_t buttons, int8_t z); +}; + +#endif diff --git a/usb/device/USBHID/USBMouseKeyboard.cpp b/usb/device/USBHID/USBMouseKeyboard.cpp new file mode 100644 index 00000000000..4d9e4b990d8 --- /dev/null +++ b/usb/device/USBHID/USBMouseKeyboard.cpp @@ -0,0 +1,828 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBMouseKeyboard.h" +#include "usb_phy_api.h" + +typedef struct { + unsigned char usage; + unsigned char modifier; +} KEYMAP; + +#ifdef US_KEYBOARD +/* US keyboard (as HID standard) */ +#define KEYMAP_SIZE (152) +const KEYMAP keymap[KEYMAP_SIZE] = { + {0, 0}, /* NUL */ + {0, 0}, /* SOH */ + {0, 0}, /* STX */ + {0, 0}, /* ETX */ + {0, 0}, /* EOT */ + {0, 0}, /* ENQ */ + {0, 0}, /* ACK */ + {0, 0}, /* BEL */ + {0x2a, 0}, /* BS */ /* Keyboard Delete (Backspace) */ + {0x2b, 0}, /* TAB */ /* Keyboard Tab */ + {0x28, 0}, /* LF */ /* Keyboard Return (Enter) */ + {0, 0}, /* VT */ + {0, 0}, /* FF */ + {0, 0}, /* CR */ + {0, 0}, /* SO */ + {0, 0}, /* SI */ + {0, 0}, /* DEL */ + {0, 0}, /* DC1 */ + {0, 0}, /* DC2 */ + {0, 0}, /* DC3 */ + {0, 0}, /* DC4 */ + {0, 0}, /* NAK */ + {0, 0}, /* SYN */ + {0, 0}, /* ETB */ + {0, 0}, /* CAN */ + {0, 0}, /* EM */ + {0, 0}, /* SUB */ + {0, 0}, /* ESC */ + {0, 0}, /* FS */ + {0, 0}, /* GS */ + {0, 0}, /* RS */ + {0, 0}, /* US */ + {0x2c, 0}, /* */ + {0x1e, KEY_SHIFT}, /* ! */ + {0x34, KEY_SHIFT}, /* " */ + {0x20, KEY_SHIFT}, /* # */ + {0x21, KEY_SHIFT}, /* $ */ + {0x22, KEY_SHIFT}, /* % */ + {0x24, KEY_SHIFT}, /* & */ + {0x34, 0}, /* ' */ + {0x26, KEY_SHIFT}, /* ( */ + {0x27, KEY_SHIFT}, /* ) */ + {0x25, KEY_SHIFT}, /* * */ + {0x2e, KEY_SHIFT}, /* + */ + {0x36, 0}, /* , */ + {0x2d, 0}, /* - */ + {0x37, 0}, /* . */ + {0x38, 0}, /* / */ + {0x27, 0}, /* 0 */ + {0x1e, 0}, /* 1 */ + {0x1f, 0}, /* 2 */ + {0x20, 0}, /* 3 */ + {0x21, 0}, /* 4 */ + {0x22, 0}, /* 5 */ + {0x23, 0}, /* 6 */ + {0x24, 0}, /* 7 */ + {0x25, 0}, /* 8 */ + {0x26, 0}, /* 9 */ + {0x33, KEY_SHIFT}, /* : */ + {0x33, 0}, /* ; */ + {0x36, KEY_SHIFT}, /* < */ + {0x2e, 0}, /* = */ + {0x37, KEY_SHIFT}, /* > */ + {0x38, KEY_SHIFT}, /* ? */ + {0x1f, KEY_SHIFT}, /* @ */ + {0x04, KEY_SHIFT}, /* A */ + {0x05, KEY_SHIFT}, /* B */ + {0x06, KEY_SHIFT}, /* C */ + {0x07, KEY_SHIFT}, /* D */ + {0x08, KEY_SHIFT}, /* E */ + {0x09, KEY_SHIFT}, /* F */ + {0x0a, KEY_SHIFT}, /* G */ + {0x0b, KEY_SHIFT}, /* H */ + {0x0c, KEY_SHIFT}, /* I */ + {0x0d, KEY_SHIFT}, /* J */ + {0x0e, KEY_SHIFT}, /* K */ + {0x0f, KEY_SHIFT}, /* L */ + {0x10, KEY_SHIFT}, /* M */ + {0x11, KEY_SHIFT}, /* N */ + {0x12, KEY_SHIFT}, /* O */ + {0x13, KEY_SHIFT}, /* P */ + {0x14, KEY_SHIFT}, /* Q */ + {0x15, KEY_SHIFT}, /* R */ + {0x16, KEY_SHIFT}, /* S */ + {0x17, KEY_SHIFT}, /* T */ + {0x18, KEY_SHIFT}, /* U */ + {0x19, KEY_SHIFT}, /* V */ + {0x1a, KEY_SHIFT}, /* W */ + {0x1b, KEY_SHIFT}, /* X */ + {0x1c, KEY_SHIFT}, /* Y */ + {0x1d, KEY_SHIFT}, /* Z */ + {0x2f, 0}, /* [ */ + {0x31, 0}, /* \ */ + {0x30, 0}, /* ] */ + {0x23, KEY_SHIFT}, /* ^ */ + {0x2d, KEY_SHIFT}, /* _ */ + {0x35, 0}, /* ` */ + {0x04, 0}, /* a */ + {0x05, 0}, /* b */ + {0x06, 0}, /* c */ + {0x07, 0}, /* d */ + {0x08, 0}, /* e */ + {0x09, 0}, /* f */ + {0x0a, 0}, /* g */ + {0x0b, 0}, /* h */ + {0x0c, 0}, /* i */ + {0x0d, 0}, /* j */ + {0x0e, 0}, /* k */ + {0x0f, 0}, /* l */ + {0x10, 0}, /* m */ + {0x11, 0}, /* n */ + {0x12, 0}, /* o */ + {0x13, 0}, /* p */ + {0x14, 0}, /* q */ + {0x15, 0}, /* r */ + {0x16, 0}, /* s */ + {0x17, 0}, /* t */ + {0x18, 0}, /* u */ + {0x19, 0}, /* v */ + {0x1a, 0}, /* w */ + {0x1b, 0}, /* x */ + {0x1c, 0}, /* y */ + {0x1d, 0}, /* z */ + {0x2f, KEY_SHIFT}, /* { */ + {0x31, KEY_SHIFT}, /* | */ + {0x30, KEY_SHIFT}, /* } */ + {0x35, KEY_SHIFT}, /* ~ */ + {0, 0}, /* DEL */ + + {0x3a, 0}, /* F1 */ + {0x3b, 0}, /* F2 */ + {0x3c, 0}, /* F3 */ + {0x3d, 0}, /* F4 */ + {0x3e, 0}, /* F5 */ + {0x3f, 0}, /* F6 */ + {0x40, 0}, /* F7 */ + {0x41, 0}, /* F8 */ + {0x42, 0}, /* F9 */ + {0x43, 0}, /* F10 */ + {0x44, 0}, /* F11 */ + {0x45, 0}, /* F12 */ + + {0x46, 0}, /* PRINT_SCREEN */ + {0x47, 0}, /* SCROLL_LOCK */ + {0x39, 0}, /* CAPS_LOCK */ + {0x53, 0}, /* NUM_LOCK */ + {0x49, 0}, /* INSERT */ + {0x4a, 0}, /* HOME */ + {0x4b, 0}, /* PAGE_UP */ + {0x4e, 0}, /* PAGE_DOWN */ + + {0x4f, 0}, /* RIGHT_ARROW */ + {0x50, 0}, /* LEFT_ARROW */ + {0x51, 0}, /* DOWN_ARROW */ + {0x52, 0}, /* UP_ARROW */ +}; + +#else +/* UK keyboard */ +#define KEYMAP_SIZE (152) +const KEYMAP keymap[KEYMAP_SIZE] = { + {0, 0}, /* NUL */ + {0, 0}, /* SOH */ + {0, 0}, /* STX */ + {0, 0}, /* ETX */ + {0, 0}, /* EOT */ + {0, 0}, /* ENQ */ + {0, 0}, /* ACK */ + {0, 0}, /* BEL */ + {0x2a, 0}, /* BS */ /* Keyboard Delete (Backspace) */ + {0x2b, 0}, /* TAB */ /* Keyboard Tab */ + {0x28, 0}, /* LF */ /* Keyboard Return (Enter) */ + {0, 0}, /* VT */ + {0, 0}, /* FF */ + {0, 0}, /* CR */ + {0, 0}, /* SO */ + {0, 0}, /* SI */ + {0, 0}, /* DEL */ + {0, 0}, /* DC1 */ + {0, 0}, /* DC2 */ + {0, 0}, /* DC3 */ + {0, 0}, /* DC4 */ + {0, 0}, /* NAK */ + {0, 0}, /* SYN */ + {0, 0}, /* ETB */ + {0, 0}, /* CAN */ + {0, 0}, /* EM */ + {0, 0}, /* SUB */ + {0, 0}, /* ESC */ + {0, 0}, /* FS */ + {0, 0}, /* GS */ + {0, 0}, /* RS */ + {0, 0}, /* US */ + {0x2c, 0}, /* */ + {0x1e, KEY_SHIFT}, /* ! */ + {0x1f, KEY_SHIFT}, /* " */ + {0x32, 0}, /* # */ + {0x21, KEY_SHIFT}, /* $ */ + {0x22, KEY_SHIFT}, /* % */ + {0x24, KEY_SHIFT}, /* & */ + {0x34, 0}, /* ' */ + {0x26, KEY_SHIFT}, /* ( */ + {0x27, KEY_SHIFT}, /* ) */ + {0x25, KEY_SHIFT}, /* * */ + {0x2e, KEY_SHIFT}, /* + */ + {0x36, 0}, /* , */ + {0x2d, 0}, /* - */ + {0x37, 0}, /* . */ + {0x38, 0}, /* / */ + {0x27, 0}, /* 0 */ + {0x1e, 0}, /* 1 */ + {0x1f, 0}, /* 2 */ + {0x20, 0}, /* 3 */ + {0x21, 0}, /* 4 */ + {0x22, 0}, /* 5 */ + {0x23, 0}, /* 6 */ + {0x24, 0}, /* 7 */ + {0x25, 0}, /* 8 */ + {0x26, 0}, /* 9 */ + {0x33, KEY_SHIFT}, /* : */ + {0x33, 0}, /* ; */ + {0x36, KEY_SHIFT}, /* < */ + {0x2e, 0}, /* = */ + {0x37, KEY_SHIFT}, /* > */ + {0x38, KEY_SHIFT}, /* ? */ + {0x34, KEY_SHIFT}, /* @ */ + {0x04, KEY_SHIFT}, /* A */ + {0x05, KEY_SHIFT}, /* B */ + {0x06, KEY_SHIFT}, /* C */ + {0x07, KEY_SHIFT}, /* D */ + {0x08, KEY_SHIFT}, /* E */ + {0x09, KEY_SHIFT}, /* F */ + {0x0a, KEY_SHIFT}, /* G */ + {0x0b, KEY_SHIFT}, /* H */ + {0x0c, KEY_SHIFT}, /* I */ + {0x0d, KEY_SHIFT}, /* J */ + {0x0e, KEY_SHIFT}, /* K */ + {0x0f, KEY_SHIFT}, /* L */ + {0x10, KEY_SHIFT}, /* M */ + {0x11, KEY_SHIFT}, /* N */ + {0x12, KEY_SHIFT}, /* O */ + {0x13, KEY_SHIFT}, /* P */ + {0x14, KEY_SHIFT}, /* Q */ + {0x15, KEY_SHIFT}, /* R */ + {0x16, KEY_SHIFT}, /* S */ + {0x17, KEY_SHIFT}, /* T */ + {0x18, KEY_SHIFT}, /* U */ + {0x19, KEY_SHIFT}, /* V */ + {0x1a, KEY_SHIFT}, /* W */ + {0x1b, KEY_SHIFT}, /* X */ + {0x1c, KEY_SHIFT}, /* Y */ + {0x1d, KEY_SHIFT}, /* Z */ + {0x2f, 0}, /* [ */ + {0x64, 0}, /* \ */ + {0x30, 0}, /* ] */ + {0x23, KEY_SHIFT}, /* ^ */ + {0x2d, KEY_SHIFT}, /* _ */ + {0x35, 0}, /* ` */ + {0x04, 0}, /* a */ + {0x05, 0}, /* b */ + {0x06, 0}, /* c */ + {0x07, 0}, /* d */ + {0x08, 0}, /* e */ + {0x09, 0}, /* f */ + {0x0a, 0}, /* g */ + {0x0b, 0}, /* h */ + {0x0c, 0}, /* i */ + {0x0d, 0}, /* j */ + {0x0e, 0}, /* k */ + {0x0f, 0}, /* l */ + {0x10, 0}, /* m */ + {0x11, 0}, /* n */ + {0x12, 0}, /* o */ + {0x13, 0}, /* p */ + {0x14, 0}, /* q */ + {0x15, 0}, /* r */ + {0x16, 0}, /* s */ + {0x17, 0}, /* t */ + {0x18, 0}, /* u */ + {0x19, 0}, /* v */ + {0x1a, 0}, /* w */ + {0x1b, 0}, /* x */ + {0x1c, 0}, /* y */ + {0x1d, 0}, /* z */ + {0x2f, KEY_SHIFT}, /* { */ + {0x64, KEY_SHIFT}, /* | */ + {0x30, KEY_SHIFT}, /* } */ + {0x32, KEY_SHIFT}, /* ~ */ + {0, 0}, /* DEL */ + + {0x3a, 0}, /* F1 */ + {0x3b, 0}, /* F2 */ + {0x3c, 0}, /* F3 */ + {0x3d, 0}, /* F4 */ + {0x3e, 0}, /* F5 */ + {0x3f, 0}, /* F6 */ + {0x40, 0}, /* F7 */ + {0x41, 0}, /* F8 */ + {0x42, 0}, /* F9 */ + {0x43, 0}, /* F10 */ + {0x44, 0}, /* F11 */ + {0x45, 0}, /* F12 */ + + {0x46, 0}, /* PRINT_SCREEN */ + {0x47, 0}, /* SCROLL_LOCK */ + {0x39, 0}, /* CAPS_LOCK */ + {0x53, 0}, /* NUM_LOCK */ + {0x49, 0}, /* INSERT */ + {0x4a, 0}, /* HOME */ + {0x4b, 0}, /* PAGE_UP */ + {0x4e, 0}, /* PAGE_DOWN */ + + {0x4f, 0}, /* RIGHT_ARROW */ + {0x50, 0}, /* LEFT_ARROW */ + {0x51, 0}, /* DOWN_ARROW */ + {0x52, 0}, /* UP_ARROW */ +}; +#endif + +USBMouseKeyboard::USBMouseKeyboard(bool connect_blocking, MOUSE_TYPE mouse_type, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBHID(get_usb_phy(), 0, 0, vendor_id, product_id, product_release) +{ + _lock_status = 0; + _button = 0; + _mouse_type = mouse_type; + + if (connect_blocking) { + USBDevice::connect(); + wait_ready(); + } else { + init(); + } +}; + +USBMouseKeyboard::USBMouseKeyboard(USBPhy *phy, MOUSE_TYPE mouse_type, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBHID(phy, 0, 0, vendor_id, product_id, product_release) +{ + _lock_status = 0; + _button = 0; + _mouse_type = mouse_type; +}; + +/** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ +USBMouseKeyboard::~USBMouseKeyboard() +{ + deinit(); +} + +const uint8_t *USBMouseKeyboard::report_desc() +{ + if (_mouse_type == REL_MOUSE) { + static const uint8_t reportDescriptor[] = { + // Keyboard + USAGE_PAGE(1), 0x01, + USAGE(1), 0x06, + COLLECTION(1), 0x01, + REPORT_ID(1), REPORT_ID_KEYBOARD, + USAGE_PAGE(1), 0x07, + USAGE_MINIMUM(1), 0xE0, + USAGE_MAXIMUM(1), 0xE7, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x01, + REPORT_SIZE(1), 0x01, + REPORT_COUNT(1), 0x08, + INPUT(1), 0x02, + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x08, + INPUT(1), 0x01, + REPORT_COUNT(1), 0x05, + REPORT_SIZE(1), 0x01, + USAGE_PAGE(1), 0x08, + USAGE_MINIMUM(1), 0x01, + USAGE_MAXIMUM(1), 0x05, + OUTPUT(1), 0x02, + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x03, + OUTPUT(1), 0x01, + REPORT_COUNT(1), 0x06, + REPORT_SIZE(1), 0x08, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(2), 0xff, 0x00, + USAGE_PAGE(1), 0x07, + USAGE_MINIMUM(1), 0x00, + USAGE_MAXIMUM(2), 0xff, 0x00, + INPUT(1), 0x00, + END_COLLECTION(0), + + // Mouse + USAGE_PAGE(1), 0x01, // Generic Desktop + USAGE(1), 0x02, // Mouse + COLLECTION(1), 0x01, // Application + USAGE(1), 0x01, // Pointer + COLLECTION(1), 0x00, // Physical + REPORT_ID(1), REPORT_ID_MOUSE, + REPORT_COUNT(1), 0x03, + REPORT_SIZE(1), 0x01, + USAGE_PAGE(1), 0x09, // Buttons + USAGE_MINIMUM(1), 0x1, + USAGE_MAXIMUM(1), 0x3, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x01, + INPUT(1), 0x02, + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x05, + INPUT(1), 0x01, + REPORT_COUNT(1), 0x03, + REPORT_SIZE(1), 0x08, + USAGE_PAGE(1), 0x01, + USAGE(1), 0x30, // X + USAGE(1), 0x31, // Y + USAGE(1), 0x38, // scroll + LOGICAL_MINIMUM(1), 0x81, + LOGICAL_MAXIMUM(1), 0x7f, + INPUT(1), 0x06, + END_COLLECTION(0), + END_COLLECTION(0), + + + // Media Control + USAGE_PAGE(1), 0x0C, + USAGE(1), 0x01, + COLLECTION(1), 0x01, + REPORT_ID(1), REPORT_ID_VOLUME, + USAGE_PAGE(1), 0x0C, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x01, + REPORT_SIZE(1), 0x01, + REPORT_COUNT(1), 0x07, + USAGE(1), 0xB5, // Next Track + USAGE(1), 0xB6, // Previous Track + USAGE(1), 0xB7, // Stop + USAGE(1), 0xCD, // Play / Pause + USAGE(1), 0xE2, // Mute + USAGE(1), 0xE9, // Volume Up + USAGE(1), 0xEA, // Volume Down + INPUT(1), 0x02, // Input (Data, Variable, Absolute) + REPORT_COUNT(1), 0x01, + INPUT(1), 0x01, + END_COLLECTION(0), + }; + reportLength = sizeof(reportDescriptor); + return reportDescriptor; + } else if (_mouse_type == ABS_MOUSE) { + static const uint8_t reportDescriptor[] = { + + // Keyboard + USAGE_PAGE(1), 0x01, + USAGE(1), 0x06, + COLLECTION(1), 0x01, + REPORT_ID(1), REPORT_ID_KEYBOARD, + USAGE_PAGE(1), 0x07, + USAGE_MINIMUM(1), 0xE0, + USAGE_MAXIMUM(1), 0xE7, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x01, + REPORT_SIZE(1), 0x01, + REPORT_COUNT(1), 0x08, + INPUT(1), 0x02, + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x08, + INPUT(1), 0x01, + REPORT_COUNT(1), 0x05, + REPORT_SIZE(1), 0x01, + USAGE_PAGE(1), 0x08, + USAGE_MINIMUM(1), 0x01, + USAGE_MAXIMUM(1), 0x05, + OUTPUT(1), 0x02, + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x03, + OUTPUT(1), 0x01, + REPORT_COUNT(1), 0x06, + REPORT_SIZE(1), 0x08, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(2), 0xff, 0x00, + USAGE_PAGE(1), 0x07, + USAGE_MINIMUM(1), 0x00, + USAGE_MAXIMUM(2), 0xff, 0x00, + INPUT(1), 0x00, + END_COLLECTION(0), + + // Mouse + USAGE_PAGE(1), 0x01, // Generic Desktop + USAGE(1), 0x02, // Mouse + COLLECTION(1), 0x01, // Application + USAGE(1), 0x01, // Pointer + COLLECTION(1), 0x00, // Physical + REPORT_ID(1), REPORT_ID_MOUSE, + + USAGE_PAGE(1), 0x01, // Generic Desktop + USAGE(1), 0x30, // X + USAGE(1), 0x31, // Y + LOGICAL_MINIMUM(1), 0x00, // 0 + LOGICAL_MAXIMUM(2), 0xff, 0x7f, // 32767 + REPORT_SIZE(1), 0x10, + REPORT_COUNT(1), 0x02, + INPUT(1), 0x02, // Data, Variable, Absolute + + USAGE_PAGE(1), 0x01, // Generic Desktop + USAGE(1), 0x38, // scroll + LOGICAL_MINIMUM(1), 0x81, // -127 + LOGICAL_MAXIMUM(1), 0x7f, // 127 + REPORT_SIZE(1), 0x08, + REPORT_COUNT(1), 0x01, + INPUT(1), 0x06, // Data, Variable, Relative + + USAGE_PAGE(1), 0x09, // Buttons + USAGE_MINIMUM(1), 0x01, + USAGE_MAXIMUM(1), 0x03, + LOGICAL_MINIMUM(1), 0x00, // 0 + LOGICAL_MAXIMUM(1), 0x01, // 1 + REPORT_COUNT(1), 0x03, + REPORT_SIZE(1), 0x01, + INPUT(1), 0x02, // Data, Variable, Absolute + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x05, + INPUT(1), 0x01, // Constant + + END_COLLECTION(0), + END_COLLECTION(0), + + // Media Control + USAGE_PAGE(1), 0x0C, + USAGE(1), 0x01, + COLLECTION(1), 0x01, + REPORT_ID(1), REPORT_ID_VOLUME, + USAGE_PAGE(1), 0x0C, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x01, + REPORT_SIZE(1), 0x01, + REPORT_COUNT(1), 0x07, + USAGE(1), 0xB5, // Next Track + USAGE(1), 0xB6, // Previous Track + USAGE(1), 0xB7, // Stop + USAGE(1), 0xCD, // Play / Pause + USAGE(1), 0xE2, // Mute + USAGE(1), 0xE9, // Volume Up + USAGE(1), 0xEA, // Volume Down + INPUT(1), 0x02, // Input (Data, Variable, Absolute) + REPORT_COUNT(1), 0x01, + INPUT(1), 0x01, + END_COLLECTION(0), + }; + reportLength = sizeof(reportDescriptor); + return reportDescriptor; + } + + return NULL; +} + +void USBMouseKeyboard::report_rx() +{ + assert_locked(); + + HID_REPORT report; + read_nb(&report); + + // we take [1] because [0] is the report ID + _lock_status = report.data[1] & 0x07; +} + +uint8_t USBMouseKeyboard::lock_status() +{ + return _lock_status; +} + +bool USBMouseKeyboard::update(int16_t x, int16_t y, uint8_t button, int8_t z) +{ + bool ret; + switch (_mouse_type) { + case REL_MOUSE: + _mutex.lock(); + + while (x > 127) { + if (!_mouse_send(127, 0, button, z)) { + _mutex.unlock(); + return false; + } + x = x - 127; + } + while (x < -128) { + if (!_mouse_send(-128, 0, button, z)) { + _mutex.unlock(); + return false; + } + x = x + 128; + } + while (y > 127) { + if (!_mouse_send(0, 127, button, z)) { + _mutex.unlock(); + return false; + } + y = y - 127; + } + while (y < -128) { + if (!_mouse_send(0, -128, button, z)) { + _mutex.unlock(); + return false; + } + y = y + 128; + } + ret = _mouse_send(x, y, button, z); + + _mutex.unlock(); + return ret; + case ABS_MOUSE: + _mutex.lock(); + + HID_REPORT report; + + report.data[0] = REPORT_ID_MOUSE; + report.data[1] = x & 0xff; + report.data[2] = (x >> 8) & 0xff; + report.data[3] = y & 0xff; + report.data[4] = (y >> 8) & 0xff; + report.data[5] = -z; + report.data[6] = button & 0x07; + + report.length = 7; + + ret = send(&report); + + _mutex.unlock(); + return ret; + default: + return false; + } +} + +bool USBMouseKeyboard::_mouse_send(int8_t x, int8_t y, uint8_t buttons, int8_t z) +{ + _mutex.lock(); + + HID_REPORT report; + report.data[0] = REPORT_ID_MOUSE; + report.data[1] = buttons & 0x07; + report.data[2] = x; + report.data[3] = y; + report.data[4] = -z; // >0 to scroll down, <0 to scroll up + + report.length = 5; + + bool ret = send(&report); + + _mutex.unlock(); + return ret; +} + +bool USBMouseKeyboard::move(int16_t x, int16_t y) +{ + _mutex.lock(); + + bool ret = update(x, y, _button, 0); + + _mutex.unlock(); + return ret; +} + +bool USBMouseKeyboard::scroll(int8_t z) +{ + _mutex.lock(); + + bool ret = update(0, 0, _button, z); + + _mutex.unlock(); + return ret; +} + +bool USBMouseKeyboard::doubleClick() +{ + _mutex.lock(); + + if (!click(MOUSE_LEFT)) { + _mutex.unlock(); + return false; + } + wait(0.1); + bool ret = click(MOUSE_LEFT); + + _mutex.unlock(); + return ret; +} + +bool USBMouseKeyboard::click(uint8_t button) +{ + _mutex.lock(); + + if (!update(0, 0, button, 0)) { + _mutex.unlock(); + return false; + } + wait(0.01); + bool ret = update(0, 0, 0, 0); + + _mutex.unlock(); + return ret; +} + +bool USBMouseKeyboard::press(uint8_t button) +{ + _mutex.lock(); + + _button = button & 0x07; + bool ret = update(0, 0, button, 0); + + _mutex.unlock(); + return ret; +} + +bool USBMouseKeyboard::release(uint8_t button) +{ + _mutex.lock(); + + _button = (_button & (~button)) & 0x07; + bool ret = update(0, 0, _button, 0); + + _mutex.unlock(); + return ret; +} + +int USBMouseKeyboard::_putc(int c) +{ + _mutex.lock(); + + bool ret = key_code(c, keymap[c].modifier); + + _mutex.unlock(); + return ret; +} + +bool USBMouseKeyboard::key_code(uint8_t key, uint8_t modifier) +{ + // Send a simulated keyboard keypress. Returns true if successful. + _mutex.lock(); + + HID_REPORT report; + + report.data[0] = REPORT_ID_KEYBOARD; + report.data[1] = modifier; + report.data[2] = 0; + report.data[3] = keymap[key].usage; + report.data[4] = 0; + report.data[5] = 0; + report.data[6] = 0; + report.data[7] = 0; + report.data[8] = 0; + + report.length = 9; + + if (!send(&report)) { + _mutex.unlock(); + return false; + } + + report.data[1] = 0; + report.data[3] = 0; + + if (!send(&report)) { + _mutex.unlock(); + return false; + } + + _mutex.unlock(); + return true; +} + + +bool USBMouseKeyboard::media_control(MEDIA_KEY key) +{ + _mutex.lock(); + + HID_REPORT report; + + report.data[0] = REPORT_ID_VOLUME; + report.data[1] = (1 << key) & 0x7f; + + report.length = 2; + + send(&report); + + report.data[0] = REPORT_ID_VOLUME; + report.data[1] = 0; + + report.length = 2; + + bool ret = send(&report); + + _mutex.unlock(); + return ret; +} + +int USBMouseKeyboard::_getc() +{ + return -1; +} diff --git a/usb/device/USBHID/USBMouseKeyboard.h b/usb/device/USBHID/USBMouseKeyboard.h new file mode 100644 index 00000000000..75595e231b6 --- /dev/null +++ b/usb/device/USBHID/USBMouseKeyboard.h @@ -0,0 +1,246 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBMOUSEKEYBOARD_H +#define USBMOUSEKEYBOARD_H + +#define REPORT_ID_KEYBOARD 1 +#define REPORT_ID_MOUSE 2 +#define REPORT_ID_VOLUME 3 + +#include "USBMouse.h" +#include "USBKeyboard.h" +#include "Stream.h" +#include "USBHID.h" +#include "PlatformMutex.h" + +/** + * USBMouseKeyboard example + * @code + * + * #include "mbed.h" + * #include "USBMouseKeyboard.h" + * + * USBMouseKeyboard key_mouse; + * + * int main(void) + * { + * while(1) + * { + * key_mouse.move(20, 0); + * key_mouse.printf("Hello From MBED\r\n"); + * wait(1); + * } + * } + * @endcode + * + * + * @code + * + * #include "mbed.h" + * #include "USBMouseKeyboard.h" + * + * USBMouseKeyboard key_mouse(ABS_MOUSE); + * + * int main(void) + * { + * while(1) + * { + * key_mouse.move(X_MAX_ABS/2, Y_MAX_ABS/2); + * key_mouse.printf("Hello from MBED\r\n"); + * wait(1); + * } + * } + * @endcode + * + * @note Synchronization level: Thread safe + */ +class USBMouseKeyboard: public USBHID, public Stream +{ +public: + + /** + * Basic constructor + * + * Construct this object optionally connecting and blocking until it is ready. + * + * @note Do not use this constructor in derived classes. + * + * @param connect_blocking true to perform a blocking connect, false to start in a disconnected state + * @param mouse_type Mouse type: ABS_MOUSE (absolute mouse) or REL_MOUSE (relative mouse) (default: REL_MOUSE) + * @param vendor_id Your vendor_id (default: 0x1234) + * @param product_id Your product_id (default: 0x0001) + * @param product_release Your preoduct_release (default: 0x0001) + * + */ + USBMouseKeyboard(bool connect_blocking=true, MOUSE_TYPE mouse_type=REL_MOUSE, uint16_t vendor_id=0x0021, uint16_t product_id=0x0011, uint16_t product_release=0x0001); + + /** + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. + * + * @param phy USB phy to use + * @param mouse_type Mouse type: ABS_MOUSE (absolute mouse) or REL_MOUSE (relative mouse) (default: REL_MOUSE) + * @param vendor_id Your vendor_id (default: 0x1234) + * @param product_id Your product_id (default: 0x0001) + * @param product_release Your preoduct_release (default: 0x0001) + * + */ + USBMouseKeyboard(USBPhy *phy, MOUSE_TYPE mouse_type=REL_MOUSE, uint16_t vendor_id=0x0021, uint16_t product_id=0x0011, uint16_t product_release=0x0001); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ + virtual ~USBMouseKeyboard(); + + /** + * Write a state of the mouse + * + * @param x x-axis position + * @param y y-axis position + * @param buttons buttons state (first bit represents MOUSE_LEFT, second bit MOUSE_RIGHT and third bit MOUSE_MIDDLE) + * @param z wheel state (>0 to scroll down, <0 to scroll up) + * @returns true if there is no error, false otherwise + */ + bool update(int16_t x, int16_t y, uint8_t buttons, int8_t z); + + + /** + * Move the cursor to (x, y) + * + * @param x x-axis position + * @param y y-axis position + * @returns true if there is no error, false otherwise + */ + bool move(int16_t x, int16_t y); + + /** + * Press one or several buttons + * + * @param button button state (ex: press(MOUSE_LEFT)) + * @returns true if there is no error, false otherwise + */ + bool press(uint8_t button); + + /** + * Release one or several buttons + * + * @param button button state (ex: release(MOUSE_LEFT)) + * @returns true if there is no error, false otherwise + */ + bool release(uint8_t button); + + /** + * Double click (MOUSE_LEFT) + * + * @returns true if there is no error, false otherwise + */ + bool doubleClick(); + + /** + * Click + * + * @param button state of the buttons ( ex: clic(MOUSE_LEFT)) + * @returns true if there is no error, false otherwise + */ + bool click(uint8_t button); + + /** + * Scrolling + * + * @param z value of the wheel (>0 to go down, <0 to go up) + * @returns true if there is no error, false otherwise + */ + bool scroll(int8_t z); + + /** + * To send a character defined by a modifier(CTRL, SHIFT, ALT) and the key + * + * @code + * //To send CTRL + s (save) + * keyboard.keyCode('s', KEY_CTRL); + * @endcode + * + * @param modifier bit 0: KEY_CTRL, bit 1: KEY_SHIFT, bit 2: KEY_ALT (default: 0) + * @param key character to send + * @returns true if there is no error, false otherwise + */ + bool key_code(uint8_t key, uint8_t modifier = 0); + + /** + * Send a character + * + * @param c character to be sent + * @returns true if there is no error, false otherwise + */ + virtual int _putc(int c); + + /** + * Control media keys + * + * @param key media key pressed (KEY_NEXT_TRACK, KEY_PREVIOUS_TRACK, KEY_STOP, KEY_PLAY_PAUSE, KEY_MUTE, KEY_VOLUME_UP, KEY_VOLUME_DOWN) + * @returns true if there is no error, false otherwise + */ + bool media_control(MEDIA_KEY key); + + /** + * Read status of lock keys. Useful to switch-on/off leds according to key pressed. Only the first three bits of the result is important: + * - First bit: NUM_LOCK + * - Second bit: CAPS_LOCK + * - Third bit: SCROLL_LOCK + * + * @returns status of lock keys + */ + uint8_t lock_status(); + + /* + * To define the report descriptor. Warning: this method has to store the length of the report descriptor in reportLength. + * + * @returns pointer to the report descriptor + */ + virtual const uint8_t * report_desc(); + + /* + * Called when a data is received on the OUT endpoint. Useful to switch on LED of LOCK keys + * + * @returns if handle by subclass, return true + */ + virtual void report_rx(); + + +private: + MOUSE_TYPE _mouse_type; + uint8_t _button; + uint8_t _lock_status; + PlatformMutex _mutex; + + bool _mouse_send(int8_t x, int8_t y, uint8_t buttons, int8_t z); + + //dummy otherwise it doesn't compile (we must define all methods of an abstract class) + virtual int _getc(); +}; + +#endif From dcd1a9a49b0b0ca6bd01b4636e56b0a2150db270 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Thu, 3 May 2018 15:01:10 +0200 Subject: [PATCH 188/488] Update usb test to connect and block itself Update the basic usb test so it does blocking itself since blocking connect was removed from USBDevice. --- TESTS/usb_device/basic/USBTester.cpp | 12 +++++++++--- TESTS/usb_device/basic/USBTester.h | 5 +++-- TESTS/usb_device/basic/main.cpp | 26 +++++++++++++------------- 3 files changed, 25 insertions(+), 18 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index 24ca3df704c..fa484115607 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -37,8 +37,10 @@ #define MAX_EP_SIZE 64 #define MIN_EP_SIZE 8 +#define EVENT_READY (1 << 0) -USBTester::USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): + +USBTester::USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): USBDevice(phy, vendor_id, product_id, product_release), reset_count(0), suspend_count(0), resume_count(0), interface_0_alt_set(NONE), interface_1_alt_set(NONE), configuration_set(NONE) { @@ -56,7 +58,8 @@ USBTester::USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint1 configuration_desc(0); init(); - USBDevice::connect(connect_blocking); + USBDevice::connect(); + flags.wait_any(EVENT_READY, osWaitForever, false); } @@ -105,7 +108,10 @@ const char *USBTester::get_iproduct_desc_string() void USBTester::callback_state_change(DeviceState new_state) { - if (new_state != Configured) { + if (new_state == Configured) { + flags.set(EVENT_READY); + } else { + flags.clear(EVENT_READY); configuration_set = NONE; interface_0_alt_set = NONE; interface_1_alt_set = NONE; diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index dcd345b1bf9..5cae22ac2b1 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -22,6 +22,7 @@ #include "USBDescriptor.h" #include "USBDevice_Types.h" #include "EventQueue.h" +#include "EventFlags.h" #include "USBDevice.h" @@ -34,9 +35,8 @@ class USBTester: public USBDevice { * @param vendor_id Your vendor_id * @param product_id Your product_id * @param product_release Your product_release - * @param connect_blocking define if the connection must be blocked if USB not plugged in */ - USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); + USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); ~USBTester(); @@ -107,6 +107,7 @@ class USBTester: public USBDevice { uint8_t int_out; uint8_t int_buf[64]; EventQueue *queue; + rtos::EventFlags flags; volatile uint32_t reset_count; volatile uint32_t suspend_count; volatile uint32_t resume_count; diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index 8ccd4c5e4e7..20834d540aa 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -51,7 +51,7 @@ void control_basic_test() char str[128] = {}; { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); sprintf (str, "%s %d %d", serial.get_serial_desc_string(), vendor_id, product_id); greentea_send_kv("control_basic_test", str); // Wait for host before terminating @@ -69,7 +69,7 @@ void control_stall_test() char _value[128] = {}; { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); greentea_send_kv("control_stall_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); @@ -86,7 +86,7 @@ void control_sizes_test() char _value[128] = {}; { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); greentea_send_kv("control_sizes_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); @@ -103,7 +103,7 @@ void control_stress_test() char _value[128] = {}; { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); greentea_send_kv("control_stress_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); @@ -123,7 +123,7 @@ void device_reset_test() greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); if (strcmp(_value, "false") != 0) { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); serial.clear_reset_count(); greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); while(serial.get_reset_count() == 0); @@ -169,7 +169,7 @@ void device_soft_reconnection_test() const uint32_t reconnect_try_count = 3; { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); greentea_send_kv("device_soft_reconnection_test", serial.get_serial_desc_string()); // Wait for host before terminating @@ -211,7 +211,7 @@ void device_suspend_resume_test() char _value[128] = {}; { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); greentea_send_kv("device_suspend_resume_test", serial.get_serial_desc_string()); printf("[1] suspend_count: %d resume_count: %d\n", serial.get_suspend_count(), serial.get_resume_count()); serial.clear_suspend_count(); @@ -234,25 +234,25 @@ void repeated_construction_destruction_test() char _value[128] = {}; { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); TEST_ASSERT_EQUAL(true, serial.configured()); } wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); TEST_ASSERT_EQUAL(true, serial.configured()); } wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); TEST_ASSERT_EQUAL(true, serial.configured()); } wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); TEST_ASSERT_EQUAL(true, serial.configured()); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating @@ -262,7 +262,7 @@ void repeated_construction_destruction_test() wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); TEST_ASSERT_EQUAL(true, serial.configured()); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating @@ -272,7 +272,7 @@ void repeated_construction_destruction_test() wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); TEST_ASSERT_EQUAL(true, serial.configured()); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating From a7c2ffc5df651534bad27870ed12b62bf0481036 Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Mon, 30 Apr 2018 15:22:09 +0200 Subject: [PATCH 189/488] NUCLEO_F103RB: replace CLOCK_SOURCE_USB by DEVICE_USBDEVICE --- .../device/system_clock.c | 28 +++++++++---------- targets/targets.json | 5 ---- 2 files changed, 13 insertions(+), 20 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/system_clock.c b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/system_clock.c index abbadf5c65e..5258fcedd35 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/system_clock.c @@ -17,9 +17,9 @@ /** * This file configures the system clock as follows: *------------------------------------------------------------------------------------------- - * System clock source | 1- PLL_HSE_EXTC / CLOCK_SOURCE_USB=1 | 3- PLL_HSI / CLOCK_SOURCE_USB=1 + * System clock source | 1- PLL_HSE_EXTC / DEVICE_USBDEVICE | 3- PLL_HSI / DEVICE_USBDEVICE * | (external 8 MHz clock) | (internal 8 MHz) - * | 2- PLL_HSE_XTAL / CLOCK_SOURCE_USB=1 | + * | 2- PLL_HSE_XTAL / DEVICE_USBDEVICE | * | (external 8 MHz xtal) | *------------------------------------------------------------------------------------------- * SYSCLK(MHz) | 72 / 72 | 64 / 48 @@ -30,8 +30,6 @@ *------------------------------------------------------------------------------------------- * APB2CLK (MHz) | 72 / 72 | 64 / 48 *------------------------------------------------------------------------------------------- - * USB capable (48 MHz precise clock) | NO / YES | NO / YES - *------------------------------------------------------------------------------------------- */ #include "stm32f1xx.h" @@ -164,9 +162,9 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) { RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInit; -#endif /* CLOCK_SOURCE_USB */ +#endif /* DEVICE_USBDEVICE */ /* Enable HSE oscillator and activate PLL with HSE as source */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; @@ -193,12 +191,12 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) return 0; // FAIL } -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) /* USB clock selection */ RCC_PeriphCLKInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphCLKInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInit); -#endif /* CLOCK_SOURCE_USB */ +#endif /* DEVICE_USBDEVICE */ /* Output clock on MCO1 pin(PA8) for debugging purpose */ //HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1); // 8 MHz @@ -215,9 +213,9 @@ uint8_t SetSysClock_PLL_HSI(void) { RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInit; -#endif /* CLOCK_SOURCE_USB */ +#endif /* DEVICE_USBDEVICE */ /* Enable HSI oscillator and activate PLL with HSI as source */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE; @@ -226,21 +224,21 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; // 48 MHz (8 MHz/2 * 12) -#else /* CLOCK_SOURCE_USB */ +#else /* DEVICE_USBDEVICE */ RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16; // 64 MHz (8 MHz/2 * 16) -#endif /* CLOCK_SOURCE_USB */ +#endif /* DEVICE_USBDEVICE */ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) /* USB clock selection */ RCC_PeriphCLKInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphCLKInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL; HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInit); -#endif /* CLOCK_SOURCE_USB */ +#endif /* DEVICE_USBDEVICE */ /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); diff --git a/targets/targets.json b/targets/targets.json index b643d0d0360..0110b950bdd 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -2129,11 +2129,6 @@ "help": "Mask value : USE_PLL_HSE_EXTC (SYSCLK=72 MHz) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI (SYSCLK=64 MHz)", "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", "macro_name": "CLOCK_SOURCE" - }, - "clock_source_usb": { - "help": "In case of HSI clock source, to get 48 Mhz USB, SYSCLK has to be reduced from 64 to 48 MHz (set 0 for the max SYSCLK value)", - "value": "0", - "macro_name": "CLOCK_SOURCE_USB" } }, "detect_code": ["0700"], From 9bf5874f504a432856296eaa61891cd29582ebe5 Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Mon, 30 Apr 2018 15:45:54 +0200 Subject: [PATCH 190/488] STM32F4: replace CLOCK_SOURCE_USB by DEVICE_USBDEVICE --- .../TARGET_NUCLEO_F411RE/system_clock.c | 22 +++++++++---------- .../TARGET_SAKURAIO_EVB_01/system_clock.c | 22 +++++++++---------- .../TARGET_DISCO_F429ZI/system_clock.c | 14 ++++++------ .../TARGET_NUCLEO_F429ZI/system_clock.c | 14 ++++++------ .../TARGET_NUCLEO_F439ZI/system_clock.c | 14 ++++++------ targets/targets.json | 20 ----------------- 6 files changed, 43 insertions(+), 63 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/system_clock.c index a1980f0a247..e6f08e10634 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/system_clock.c @@ -17,7 +17,7 @@ /** * This file configures the system clock as follows: *----------------------------------------------------------------------------- - * System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock) | CLOCK_SOURCE_USB=1 + * System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock) | DEVICE_USBDEVICE=1 * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal) | * | 3- USE_PLL_HSI (internal 16 MHz) | *----------------------------------------------------------------------------- @@ -147,13 +147,13 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 4; // VCO input clock = 2 MHz (8 MHz / 4) -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 192; // VCO output clock = 384 MHz (2 MHz * 192) -#else /* CLOCK_SOURCE_USB */ +#else /* DEVICE_USBDEVICE */ RCC_OscInitStruct.PLL.PLLN = 200; // VCO output clock = 400 MHz (2 MHz * 200) -#endif /* CLOCK_SOURCE_USB */ - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on CLOCK_SOURCE_USB) - RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (CLOCK_SOURCE_USB=1) +#endif /* DEVICE_USBDEVICE */ + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on DEVICE_USBDEVICE) + RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (DEVICE_USBDEVICE=1) if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } @@ -201,13 +201,13 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 2 MHz (16 MHz / 8) -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 192; // VCO output clock = 384 MHz (2 MHz * 192) -#else /* CLOCK_SOURCE_USB */ +#else /* DEVICE_USBDEVICE */ RCC_OscInitStruct.PLL.PLLN = 200; // VCO output clock = 400 MHz (2 MHz * 200) -#endif /* CLOCK_SOURCE_USB */ - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on CLOCK_SOURCE_USB) - RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (CLOCK_SOURCE_USB=1) +#endif /* DEVICE_USBDEVICE */ + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on DEVICE_USBDEVICE) + RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (DEVICE_USBDEVICE=1) if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_SAKURAIO_EVB_01/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_SAKURAIO_EVB_01/system_clock.c index d9bc626abe7..361ebf35865 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_SAKURAIO_EVB_01/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_SAKURAIO_EVB_01/system_clock.c @@ -17,7 +17,7 @@ /** * This file configures the system clock as follows: *----------------------------------------------------------------------------- - * System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock) | CLOCK_SOURCE_USB=1 + * System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock) | DEVICE_USBDEVICE=1 * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal) | * | 3- USE_PLL_HSI (internal 16 MHz) | *----------------------------------------------------------------------------- @@ -162,13 +162,13 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 4; // VCO input clock = 2 MHz (8 MHz / 4) -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 192; // VCO output clock = 384 MHz (2 MHz * 192) -#else /* CLOCK_SOURCE_USB */ +#else /* DEVICE_USBDEVICE */ RCC_OscInitStruct.PLL.PLLN = 200; // VCO output clock = 400 MHz (2 MHz * 200) -#endif /* CLOCK_SOURCE_USB */ - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on CLOCK_SOURCE_USB) - RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (CLOCK_SOURCE_USB=1) +#endif /* DEVICE_USBDEVICE */ + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on DEVICE_USBDEVICE) + RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (DEVICE_USBDEVICE=1) if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } @@ -216,13 +216,13 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 2 MHz (16 MHz / 8) -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 192; // VCO output clock = 384 MHz (2 MHz * 192) -#else /* CLOCK_SOURCE_USB */ +#else /* DEVICE_USBDEVICE */ RCC_OscInitStruct.PLL.PLLN = 200; // VCO output clock = 400 MHz (2 MHz * 200) -#endif /* CLOCK_SOURCE_USB */ - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on CLOCK_SOURCE_USB) - RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (CLOCK_SOURCE_USB=1) +#endif /* DEVICE_USBDEVICE */ + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on DEVICE_USBDEVICE) + RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (DEVICE_USBDEVICE=1) if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_DISCO_F429ZI/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_DISCO_F429ZI/system_clock.c index 02edcc0e600..4aa472486a5 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_DISCO_F429ZI/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_DISCO_F429ZI/system_clock.c @@ -18,7 +18,7 @@ * This file configures the system clock as follows: *----------------------------------------------------------------------------------- * System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock) | - * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal) | CLOCK_SOURCE_USB=1 + * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal) | DEVICE_USBDEVICE=1 * | 3- USE_PLL_HSI (internal 16 MHz clock) | *----------------------------------------------------------------------------------- * SYSCLK(MHz) | 180 | 168 @@ -141,13 +141,13 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 8; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 336; #else RCC_OscInitStruct.PLL.PLLN = 360; #endif - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if CLOCK_SOURCE_USB defined - RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if CLOCK_SOURCE_USB defined + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if DEVICE_USBDEVICE defined + RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if DEVICE_USBDEVICE defined if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } @@ -196,13 +196,13 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLM = 8; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 168; #else RCC_OscInitStruct.PLL.PLLN = 180; #endif - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if CLOCK_SOURCE_USB defined - RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if CLOCK_SOURCE_USB defined + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if DEVICE_USBDEVICE defined + RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if DEVICE_USBDEVICE defined if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/system_clock.c index 02edcc0e600..4aa472486a5 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/system_clock.c @@ -18,7 +18,7 @@ * This file configures the system clock as follows: *----------------------------------------------------------------------------------- * System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock) | - * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal) | CLOCK_SOURCE_USB=1 + * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal) | DEVICE_USBDEVICE=1 * | 3- USE_PLL_HSI (internal 16 MHz clock) | *----------------------------------------------------------------------------------- * SYSCLK(MHz) | 180 | 168 @@ -141,13 +141,13 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 8; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 336; #else RCC_OscInitStruct.PLL.PLLN = 360; #endif - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if CLOCK_SOURCE_USB defined - RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if CLOCK_SOURCE_USB defined + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if DEVICE_USBDEVICE defined + RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if DEVICE_USBDEVICE defined if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } @@ -196,13 +196,13 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLM = 8; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 168; #else RCC_OscInitStruct.PLL.PLLN = 180; #endif - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if CLOCK_SOURCE_USB defined - RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if CLOCK_SOURCE_USB defined + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if DEVICE_USBDEVICE defined + RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if DEVICE_USBDEVICE defined if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/system_clock.c index bbc9a292ed3..c74d32ca98f 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/system_clock.c @@ -17,7 +17,7 @@ /** * This file configures the system clock as follows: *----------------------------------------------------------------------------------- - * System clock source | 1- USE_PLL_HSE_EXTC (CLOCK_SOURCE_USB=1) | 3- USE_PLL_HSI (CLOCK_SOURCE_USB=1) + * System clock source | 1- USE_PLL_HSE_EXTC (DEVICE_USBDEVICE=1) | 3- USE_PLL_HSI (DEVICE_USBDEVICE=1) * | (external 8 MHz clock) | (internal 16 MHz clock) * | 2- USE_PLL_HSE_XTAL | * | (external 8 MHz xtal) | @@ -156,13 +156,13 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 8; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 336; #else RCC_OscInitStruct.PLL.PLLN = 360; #endif - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if CLOCK_SOURCE_USB defined - RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if CLOCK_SOURCE_USB defined + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if DEVICE_USBDEVICE defined + RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if DEVICE_USBDEVICE defined if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } @@ -211,13 +211,13 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLM = 8; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 168; #else RCC_OscInitStruct.PLL.PLLN = 180; #endif - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if CLOCK_SOURCE_USB defined - RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if CLOCK_SOURCE_USB defined + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if DEVICE_USBDEVICE defined + RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if DEVICE_USBDEVICE defined if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } diff --git a/targets/targets.json b/targets/targets.json index 0110b950bdd..4f23455be29 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -2363,11 +2363,6 @@ "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", "macro_name": "CLOCK_SOURCE" - }, - "clock_source_usb": { - "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 100 to 96 MHz (set 0 for the max SYSCLK value)", - "value": "0", - "macro_name": "CLOCK_SOURCE_USB" } }, "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], @@ -2592,11 +2587,6 @@ "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", "macro_name": "CLOCK_SOURCE" - }, - "clock_source_usb": { - "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)", - "value": "1", - "macro_name": "CLOCK_SOURCE_USB" } }, "extra_labels_add": [ @@ -2640,11 +2630,6 @@ "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", "macro_name": "CLOCK_SOURCE" - }, - "clock_source_usb": { - "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)", - "value": "1", - "macro_name": "CLOCK_SOURCE_USB" } }, "extra_labels_add": [ @@ -3467,11 +3452,6 @@ "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL | USE_PLL_HSI", "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI", "macro_name": "CLOCK_SOURCE" - }, - "clock_source_usb": { - "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)", - "value": "1", - "macro_name": "CLOCK_SOURCE_USB" } }, "overrides": { "lse_available": 0 }, From f90ed75e15f3460dc6740cb5ebf26b4d09097ba7 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Thu, 10 May 2018 23:29:07 +0200 Subject: [PATCH 191/488] USB basic test update disable suspend/resume test disable sync frame test improve reset test --- TESTS/host_tests/pyusb_basic.py | 25 +++++++++++++++++++------ TESTS/usb_device/basic/main.cpp | 7 +++++++ 2 files changed, 26 insertions(+), 6 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 109f23d7bb8..2113991d704 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -313,7 +313,6 @@ def control_basic_test(dev, vendor_id, product_id, log): set_clear_feature_test(dev, log) get_descriptor_test(dev, vendor_id, product_id, log) set_descriptor_test(dev, log) - #synch_frame_test(dev, log) wait for isochronous endpoint def get_set_configuration_test(dev, log): @@ -738,8 +737,12 @@ def device_reset_test(log): dev = yield dev.reset(); dev = yield + # run other test to check if USB works fine after reset + control_data_test(dev, [64, 256], log) dev.reset(); dev = yield + # run other test to check if USB works fine after reset + control_data_test(dev, [64, 256], log) dev.reset(); dev = yield # run other test to check if USB works fine after reset @@ -769,15 +772,25 @@ def device_soft_reconnection_test(log): def device_suspend_resume_test(log): dev = yield - time.sleep(0.1) control_data_test(dev, [64, 256], log) - time.sleep(0.1) + # suspend code goes here + # ... + # resume code here + # ... + # run other test to check if USB works fine after resume control_data_test(dev, [64, 256], log) - time.sleep(0.1) + # suspend code here + # ... + # resume code here + # ... + # run other test to check if USB works fine after resume control_data_test(dev, [64, 256], log) - time.sleep(0.1) + # suspend code here + # ... + # resume code here + # ... + # run other test to check if USB works fine after resume control_data_test(dev, [64, 256], log) - time.sleep(0.1) yield diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index 20834d540aa..6c2c5af1efd 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -24,6 +24,9 @@ #include "USBTester.h" #include "usb_phy_api.h" +// Uncomment or remove this if host suspend_resume_test part will be implemented +//#define SUSPEND_RESUME_TEST_SUPPORTED + // If disconnect() + connect() occur too fast the reset event will be dropped. // At a minimum there should be a 200us delay between disconnect and connect. // To be on the safe side I would recommend a 1ms delay, so the host controller @@ -202,6 +205,7 @@ void device_soft_reconnection_test() } } +#if SUSPEND_RESUME_TEST_SUPPORTED void device_suspend_resume_test() { uint16_t vendor_id = 0x0d28; @@ -224,6 +228,7 @@ void device_suspend_resume_test() printf("[3] suspend_count: %d resume_count: %d\n", serial.get_suspend_count(), serial.get_resume_count()); } } +#endif void repeated_construction_destruction_test() { @@ -288,7 +293,9 @@ Case cases[] = { Case("usb control stress test", control_stress_test), Case("usb device reset test", device_reset_test), Case("usb soft reconnection test", device_soft_reconnection_test), +#if SUSPEND_RESUME_TEST_SUPPORTED Case("usb device suspend/resume test", device_suspend_resume_test), +#endif Case("usb repeated construction destruction test", repeated_construction_destruction_test) }; From 8bc07e74382f5e1dfa46568649c12b351262d5a1 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Thu, 10 May 2018 23:35:17 +0200 Subject: [PATCH 192/488] USB basic test documentation update --- TESTS/host_tests/pyusb_basic.py | 150 ++++++++++++++++++++++++++++++-- TESTS/usb_device/basic/main.cpp | 115 +++++++++++++++++++++++- 2 files changed, 258 insertions(+), 7 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 2113991d704..d9c9f2e0b00 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -316,6 +316,18 @@ def control_basic_test(dev, vendor_id, product_id, log): def get_set_configuration_test(dev, log): + """ + Test device configuration/deconfiguration + + Given an initialized USB (HOST <---> DUT connection established) + When device configuration is checked just after initialization + Then get_configuration returns 1 (default configuration is set) + When device is deconfigured + Then get_configuration returns 0 (no configuration is set) + When each from supported configurations is set + Then the configuration is set correctly + """ + print("<<< get_set_configuration_test >>>") # check if dafault(1) configuration set try: @@ -368,6 +380,14 @@ def get_set_configuration_test(dev, log): def get_set_interface_test(dev, log): + """ + Test device interface setting + + Given an initialized USB (HOST <---> DUT connection established) + When each altsetting from every supported configuration is set + Then the interface altsetting is set correctly + """ + print("<<< get_set_interface_test >>>") # for every configuration for cfg in dev: @@ -390,6 +410,20 @@ def get_set_interface_test(dev, log): def get_status_test(dev, log): + """ + Test device/interface/endpoint status + + Given an initialized USB (HOST <---> DUT connection established) + When device status is checked + Then status is within allowed values (see status bits description below) + When control endpoint status is checked + Then control endpoint status is 0 + When status of each interface from every supported configuration is checked + Then interface status is 0 + When status of each endpoint in every allowed device interface/configuration combination is checked + Then endpoint status is 0 (not halted) + """ + print("<<< get_status_test >>>") # check device status ret = get_status(dev, CTRL_RECIPIENT_DEVICE) @@ -440,7 +474,19 @@ def get_status_test(dev, log): def set_clear_feature_test(dev, log): + """ + Test set/clear feature on device/interface/endpoint + + Given an initialized USB (HOST <---> DUT connection established) + When for each endpoint in every allowed interface/configuration combination the feature is set and then cleared + Then selected feature is set/cleared accordingly + """ + print("<<< set_clear_feature_test >>>") + # TODO: + # test set_feature on device (Remote wakeup feature not supported on DUT side) + # test set_feature on interface (not supported at all) + # for every configuration for cfg in dev: cfg.set() @@ -450,6 +496,7 @@ def set_clear_feature_test(dev, log): intf.set_altsetting() # on every ENDPOINT for ep in intf: + # halt endpoint try: usb.control.set_feature(dev, FEATURE_ENDPOINT_HALT, ep) except usb.core.USBError as err: @@ -486,8 +533,22 @@ def set_clear_feature_test(dev, log): def get_descriptor_test(dev, vendor_id, product_id, log): + """ + Test device/configuration/interface/endpoint descriptors + + Given an initialized USB (HOST <---> DUT connection established) + When device descriptor is read + Then the descriptor content is valid + When configuration descriptor is read + Then the descriptor content is valid + When interface descriptor is read + Then the error is thrown since it is not directly accessible + When endpoint descriptor is read + Then the error is thrown since it is not directly accessible + """ + print("<<< get_descriptor_test >>>") - # Control IN GET_DESCRIPTOR - device + # device descriptor try: ret = get_descriptor(dev, (DESC_TYPE_DEVICE << 8) | (0 << 0), 0, DEVICE_DESC_SIZE) dev_desc = dict(zip(device_descriptor_keys, device_descriptor_parser.unpack(ret))) @@ -497,7 +558,7 @@ def get_descriptor_test(dev, vendor_id, product_id, log): except usb.core.USBError: raise_unconditionally(lineno(), "Requesting device descriptor failed") - # Control IN GET_DESCRIPTOR - configuration + # configuration descriptor try: ret = get_descriptor(dev, (DESC_TYPE_CONFIG << 8) | (0 << 0), 0, CONFIGURATION_DESC_SIZE) conf_desc = dict(zip(configuration_descriptor_keys, configuration_descriptor_parser.unpack(ret))) @@ -505,14 +566,14 @@ def get_descriptor_test(dev, vendor_id, product_id, log): except usb.core.USBError: raise_unconditionally(lineno(), "Requesting configuration descriptor failed") - # Control IN GET_DESCRIPTOR - interface + # interface descriptor try: ret = get_descriptor(dev, (DESC_TYPE_INTERFACE << 8) | (0 << 0), 0, INTERFACE_DESC_SIZE) raise_unconditionally(lineno(), "Requesting interface descriptor should fail since it is not directly accessible") except usb.core.USBError: log("interface descriptor is not directly accessible - OK") - # Control IN GET_DESCRIPTOR - endpoint + # endpoint descriptor try: ret = get_descriptor(dev, (DESC_TYPE_ENDPOINT << 8) | (0 << 0), 0, ENDPOINT_DESC_SIZE) raise_unconditionally(lineno(), "Requesting endpoint descriptor should fail since it is not directly accessible") @@ -520,7 +581,16 @@ def get_descriptor_test(dev, vendor_id, product_id, log): log("endpoint descriptor is not directly accessible - OK") print("") # new line + def set_descriptor_test(dev, log): + """ + Test descriptor setting + + Given an initialized USB (HOST <---> DUT connection established) + When device descriptor is to be set + Then error is thrown since descriptor setting command is not supported by Mbed + """ + print("<<< set_descriptor_test >>>") # SET_DESCRIPTOR is optional and not implemented in Mbed # command should fail with no action on device side @@ -541,6 +611,14 @@ def set_descriptor_test(dev, log): def synch_frame_test(dev, log): + """ + Test sync frame request + + Given an initialized USB (HOST <---> DUT connection established) + When ... + Then ... + """ + print("<<< synch_frame_test >>>") # only for isochronous endpoints request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, @@ -559,6 +637,14 @@ def synch_frame_test(dev, log): def control_stall_test(dev, log): + """ + Test control endpoint stall on invalid request + + Given an initialized USB (HOST <---> DUT connection established) + When unsupported request to control endpoint is to be sent + Then the endpoint is stalled and error is thrown + """ + print("<<< control_stall_test >>>") # Control OUT stall try: @@ -640,6 +726,14 @@ def control_stall_test(dev, log): def control_sizes_test(dev, log): + """ + Test various data sizes in control transfer + + Given an initialized USB (HOST <---> DUT connection established) + When control data in each tested size is sent + Then read data should match sent data + """ + list = [1, 2, 3, 7, 8, 9, 15, 16, 17, 31, 32, 33, 63, 64, 65, 127, 128, 129, 255, 256, 257, 511, 512, 513, 1023, 1024, 1025, 2047, 2048] control_data_test(dev, list, log) @@ -683,8 +777,18 @@ def control_data_test(dev, sizes_list, log): def control_stress_test(dev, log): - # Test various patterns of control transfers - # + """ + Test various patterns of control transfers + + Given an initialized USB (HOST <---> DUT connection established) + When stress control transfer with a data in stage is performed + Then transfer ends with success + When stress control transfer with a data out stage followed by a control transfer with a data in stage is performed + Then transfer ends with success + When stress control transfer with a data out stage is performed + Then transfer ends with success + """ + # Some devices have had problems with back-to-back # control transfers. Intentionally send these sequences # to make sure they are properly handled. @@ -734,6 +838,14 @@ def control_stress_test(dev, log): def device_reset_test(log): + """ + Test USB implementation against repeated reset + + Given an initialized USB (HOST <---> DUT connection established) + When USB device is reset repeatedly + Then the USB is operational with no errors + """ + dev = yield dev.reset(); dev = yield @@ -751,6 +863,14 @@ def device_reset_test(log): def device_soft_reconnection_test(log): + """ + Test USB implementation against repeated reconnection + + Given an initialized USB (HOST <---> DUT connection established) + When USB device is disconnected and then connected repeatedly + Then the USB is operational with no errors + """ + list = [64, 256] dev = yield # run other test to check if USB works fine before reconnection @@ -771,6 +891,14 @@ def device_soft_reconnection_test(log): def device_suspend_resume_test(log): + """ + Test USB implementation against repeated suspend and resume + + Given an initialized USB (HOST <---> DUT connection established) + When USB device is suspended and then resumed repeatedly + Then the USB is operational with no errors + """ + dev = yield control_data_test(dev, [64, 256], log) # suspend code goes here @@ -795,6 +923,14 @@ def device_suspend_resume_test(log): def repeated_construction_destruction_test(log): + """ + Test USB implementation against repeated initialization and deinitialization + + Given an initialized USB (HOST <---> DUT connection established) + When USB device is deinitialized and then initialized repeatedly + Then the USB is operational with no errors + """ + list = [64, 256] dev = yield # run other test to check if USB works fine after repeated construction/destruction @@ -820,6 +956,8 @@ def release_interfaces(dev): def restore_default_configuration(dev): + """ Set default configuration """ + cfg = dev[1] cfg.set() diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index 6c2c5af1efd..deb45ba6431 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -24,7 +24,11 @@ #include "USBTester.h" #include "usb_phy_api.h" -// Uncomment or remove this if host suspend_resume_test part will be implemented +// TODO +// suspend resume test: implement host side USB suspend/resume +// sync frame test: add test on isochronous endpoint + +// Uncomment/remove this when host suspend_resume_test part will be implemented //#define SUSPEND_RESUME_TEST_SUPPORTED // If disconnect() + connect() occur too fast the reset event will be dropped. @@ -37,6 +41,7 @@ #error [NOT_SUPPORTED] USB Device not supported for this target #endif + using namespace utest::v1; static USBPhy *get_phy() @@ -44,6 +49,55 @@ static USBPhy *get_phy() return get_usb_phy(); } + +/** Control basic tests + + Test device configuration/deconfiguration + Given an initialized USB (HOST <---> DUT connection established) + When device configuration is checked just after initialization + Then get_configuration returns 1 (default configuration is set) + When device is deconfigured + Then get_configuration returns 0 (no configuration is set) + When each from supported configurations is set + Then the configuration is set correctly + + Test device interface setting + Given an initialized USB (HOST <---> DUT connection established) + When each altsetting from every supported configuration is set + Then the interface altsetting is set correctly + + Test device/interface/endpoint status + Given an initialized USB (HOST <---> DUT connection established) + When device status is checked + Then status is within allowed values (see status bits description below) + When control endpoint status is checked + Then control endpoint status is 0 + When status of each interface from every supported configuration is checked + Then interface status is 0 + When status of each endpoint in every allowed device interface/configuration combination is checked + Then endpoint status is 0 (not halted) + + Test set/clear feature on device/interface/endpoint + Given an initialized USB (HOST <---> DUT connection established) + When for each endpoint in every allowed interface/configuration combination the feature is set and then cleared + Then selected feature is set/cleared accordingly + + Test device/configuration/interface/endpoint descriptors + Given an initialized USB (HOST <---> DUT connection established) + When device descriptor is read + Then the descriptor content is valid + When configuration descriptor is read + Then the descriptor content is valid + When interface descriptor is read + Then the error is thrown since it is not directly accessible + When endpoint descriptor is read + Then the error is thrown since it is not directly accessible + + Test descriptor setting + Given an initialized USB (HOST <---> DUT connection established) + When device descriptor is to be set + Then error is thrown since descriptor setting command is not supported by Mbed +*/ void control_basic_test() { uint16_t vendor_id = 0x0d28; @@ -63,6 +117,14 @@ void control_basic_test() } } + +/** Test control endpoint stall on invalid request + + Given an initialized USB (HOST <---> DUT connection established) + When unsupported request to control endpoint is to be sent + Then the endpoint is stalled and error is thrown + +*/ void control_stall_test() { uint16_t vendor_id = 0x0d28; @@ -80,6 +142,14 @@ void control_stall_test() } } + +/** Test various data sizes in control transfer + + Given an initialized USB (HOST <---> DUT connection established) + When control data in each tested size is sent + Then read data should match sent data + +*/ void control_sizes_test() { uint16_t vendor_id = 0x0d28; @@ -97,6 +167,18 @@ void control_sizes_test() } } + +/** Test various patterns of control transfers + + Given an initialized USB (HOST <---> DUT connection established) + When stress control transfer with a data in stage is performed + Then transfer ends with success + When stress control transfer with a data out stage followed by a control transfer with a data in stage is performed + Then transfer ends with success + When stress control transfer with a data out stage is performed + Then transfer ends with success + +*/ void control_stress_test() { uint16_t vendor_id = 0x0d28; @@ -114,6 +196,14 @@ void control_stress_test() } } + +/** Test USB implementation against repeated reset + + Given an initialized USB (HOST <---> DUT connection established) + When USB device is reset repeatedly + Then the USB is operational with no errors + +*/ void device_reset_test() { uint16_t vendor_id = 0x0d28; @@ -162,6 +252,13 @@ void device_reset_test() } +/** Test USB implementation against repeated reconnection + + Given an initialized USB (HOST <---> DUT connection established) + When USB device is disconnected and then connected repeatedly + Then the USB is operational with no errors + +*/ void device_soft_reconnection_test() { uint16_t vendor_id = 0x0d28; @@ -205,7 +302,15 @@ void device_soft_reconnection_test() } } + #if SUSPEND_RESUME_TEST_SUPPORTED +/** Test USB implementation against repeated suspend and resume + + Given an initialized USB (HOST <---> DUT connection established) + When USB device is suspended and then resumed repeatedly + Then the USB is operational with no errors + +*/ void device_suspend_resume_test() { uint16_t vendor_id = 0x0d28; @@ -230,6 +335,14 @@ void device_suspend_resume_test() } #endif + +/** Test USB implementation against repeated initialization and deinitialization + + Given an initialized USB (HOST <---> DUT connection established) + When USB device is deinitialized and then initialized repeatedly + Then the USB is operational with no errors + +*/ void repeated_construction_destruction_test() { uint16_t vendor_id = 0x0d28; From c17f3da35ca2fe8a80115be6ebbadfb388ebc436 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 7 May 2018 14:42:02 -0500 Subject: [PATCH 193/488] Refactor AsyncOp class Add the OperationList class to simplify managing async operations. Add a callback to the AsyncOp class so completion can be signaled with another mechanism. Finally rework the lock handling so AsyncOp::wait is passed the lock to use rather than taking it in a constructor. --- usb/device/utilities/AsyncOp.cpp | 117 ++++++++++++++++----- usb/device/utilities/AsyncOp.h | 79 +++++++++++--- usb/device/utilities/OperationList.h | 86 +++++++++++++++ usb/device/utilities/OperationListBase.cpp | 87 +++++++++++++++ usb/device/utilities/OperationListBase.h | 96 +++++++++++++++++ 5 files changed, 422 insertions(+), 43 deletions(-) create mode 100644 usb/device/utilities/OperationList.h create mode 100644 usb/device/utilities/OperationListBase.cpp create mode 100644 usb/device/utilities/OperationListBase.h diff --git a/usb/device/utilities/AsyncOp.cpp b/usb/device/utilities/AsyncOp.cpp index 5f6939be2c9..aa6557d1d75 100644 --- a/usb/device/utilities/AsyncOp.cpp +++ b/usb/device/utilities/AsyncOp.cpp @@ -16,68 +16,129 @@ #include "AsyncOp.h" #include "mbed_critical.h" +#include "mbed_assert.h" using namespace rtos; -AsyncOp::AsyncOp(Mutex *lock): _list(NULL), _signal(NULL), _signal_lock(lock) +AsyncOp::AsyncOp(): + _list(NULL), _wait(NULL), _aborted(false), _timeout(false) { } -void AsyncOp::start(LinkedListBase *list) +AsyncOp::AsyncOp(mbed::Callback &callback): + _list(NULL), _wait(NULL), _aborted(false), _timeout(false) { - _lock(); - _list = list; - list->enqueue(this); - _unlock(); + _callback = callback; } -void AsyncOp::wait() +AsyncOp::~AsyncOp() { - if (_list == NULL) { - // Event either hasn't start or has already occurred + MBED_ASSERT(_list == NULL); +} + +void AsyncOp::wait(rtos::Mutex *host_mutex, uint32_t milliseconds) +{ + // Optimization so semaphore is only created if necessary + core_util_critical_section_enter(); + bool done = _list == NULL; + core_util_critical_section_exit(); + if (done) { return; } // Construct semaphore to wait on Semaphore sem(0); - // Atomically set the semaphore pointer and - // check for completion - _lock(); - bool done = _list == NULL; - _signal = &sem; - _unlock(); + core_util_critical_section_enter(); + done = _list == NULL; + // Wait is only allowed to be called from one thread + MBED_ASSERT(_wait == NULL); + _wait = &sem; + core_util_critical_section_exit(); - if (!done) { - sem.wait(); + if (done) { + // Operation was signaled before semaphore was set + return; } + + if (sem.wait(milliseconds) == 1) { + // Operation completion signaled semaphore + return; + } + + _host_lock(host_mutex); + _abort(true); + _host_unlock(host_mutex); +} + +void AsyncOp::abort() +{ + // Host lock must be held + + _abort(false); } void AsyncOp::complete() { - _lock(); - _list->remove(this); + core_util_critical_section_enter(); + + mbed::Callback cb = _callback; + _callback = NULL; _list = NULL; - if (_signal != NULL) { - _signal->release(); + if (_wait != NULL) { + _wait->release(); + } + + core_util_critical_section_exit(); + + if (cb) { + cb(); + } +} + +bool AsyncOp::timeout() +{ + core_util_critical_section_enter(); + + bool ret = _timeout; + + core_util_critical_section_exit(); + return ret; +} + +void AsyncOp::_abort(bool timeout) +{ + // host lock must be held + + core_util_critical_section_enter(); + OperationListBase *list = _list; + if (list) { + _callback = NULL; + _aborted = true; + _wait = NULL; + _timeout = timeout; + _list = NULL; + } + core_util_critical_section_exit(); + if (list) { + list->remove(this); } - _unlock(); } -void AsyncOp::_lock() +void AsyncOp::_host_lock(rtos::Mutex *host_mutex) { - if (_signal_lock) { - _signal_lock->lock(); + if (host_mutex) { + host_mutex->lock(); } else { core_util_critical_section_enter(); } } -void AsyncOp::_unlock() +void AsyncOp::_host_unlock(rtos::Mutex *host_mutex) { - if (_signal_lock) { - _signal_lock->unlock(); + if (host_mutex) { + host_mutex->unlock(); } else { core_util_critical_section_exit(); } diff --git a/usb/device/utilities/AsyncOp.h b/usb/device/utilities/AsyncOp.h index be28c28cde1..75996b02c3e 100644 --- a/usb/device/utilities/AsyncOp.h +++ b/usb/device/utilities/AsyncOp.h @@ -19,44 +19,93 @@ #include "Mutex.h" #include "Semaphore.h" +#include "Callback.h" #include "LinkEntry.h" -#include "LinkedListBase.h" +#include "OperationListBase.h" class AsyncOp: public LinkEntry { public: + + /** + * Construct a new AsyncOp object + */ + AsyncOp(); + /** * Construct a new AsyncOp object * - * @param lock Mutex used to serialize the object or code calling complete - * or NULL if a critical section is used + * @param callback Completion callback */ - AsyncOp(rtos::Mutex *lock); + AsyncOp(mbed::Callback &callback); /** - * Add this operation to the linked list to start it + * Cleanup resources used by this AsyncOp */ - void start(LinkedListBase *list); + virtual ~AsyncOp(); /** * Wait for this asynchronous operation to complete + * + * If the timeout expires then this asynchronous operation is + * aborted and the timeout flag is set. + * + * @note - the host object's lock MUST NOT be held when this call is made */ - void wait(); + void wait(rtos::Mutex *host_mutex, uint32_t milliseconds=osWaitForever); /** - * Mark this asynchronous operation as complete + * Abort this asynchronous operation * - * This wake the thread calling wait() + * This function has no effect if the operation is complete. Otherwise + * the aborted flag is set. + * + * @note - the host object's lock MUST be held when this call is made */ - void complete(); + void abort(); + + /** + * Check if this operation timed out + * + * @return true if this operation timed out, false otherwise + */ + bool timeout(); + + /** + * Check if this operation was aborted + * + * @return true if this operation was aborted, false otherwise + */ + bool aborted(); + +protected: + + /** + * Callback indicating that something changed + * + * @return true if finished false if not + */ + virtual bool process() = 0; + + /** + * Callback indicating that this event finished + */ + virtual void complete(); private: - void _lock(); - void _unlock(); + friend class OperationListBase; + + mbed::Callback _callback; + OperationListBase *_list; + rtos::Semaphore *_wait; + bool _aborted; + bool _timeout; + + void _abort(bool timeout); + + static void _host_lock(rtos::Mutex *host_mutex); - LinkedListBase *_list; - rtos::Semaphore *_signal; - rtos::Mutex *const _signal_lock; + static void _host_unlock(rtos::Mutex *host_mutex); }; #endif diff --git a/usb/device/utilities/OperationList.h b/usb/device/utilities/OperationList.h new file mode 100644 index 00000000000..369ccc93564 --- /dev/null +++ b/usb/device/utilities/OperationList.h @@ -0,0 +1,86 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_OPERATION_LIST_H +#define MBED_OPERATION_LIST_H + +#include "OperationListBase.h" +#include "AsyncOp.h" + +template +class OperationList: public OperationListBase { +public: + + /** + * Create a new empty operation list + */ + OperationList() + { + + } + + /** + * Destroy this object and abort all operations + */ + ~OperationList() + { + + } + /** + * Add an operation to the list + * + * If the list was empty then call process on this + * operation + * + * @param op Operation to add + */ + void add(T *op) + { + OperationListBase::add(op); + } + + /** + * Remove an operation from the list + * + * If this was the head of the list then process the + * next element in the list. + * + * @param op Operation to remove + */ + void remove(T *op) + { + OperationListBase::remove(op); + } + + /** + * Dequeue the head of the list + * + * Remove the head of the operation list without completing it + * or processing the next element. The caller must call the + * AsnycOp::complete() function of the returned object. + * Additionally process() must be called on this object + * if there are still elements in the list. + * + * @return The async op at the head of the list + */ + T *dequeue_raw() + { + return static_cast(OperationListBase::dequeue_raw()); + } + +}; + +#endif diff --git a/usb/device/utilities/OperationListBase.cpp b/usb/device/utilities/OperationListBase.cpp new file mode 100644 index 00000000000..b13128093d5 --- /dev/null +++ b/usb/device/utilities/OperationListBase.cpp @@ -0,0 +1,87 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "OperationListBase.h" +#include "AsyncOp.h" +#include "mbed_assert.h" + +OperationListBase::OperationListBase() +{ + +} + +OperationListBase::~OperationListBase() +{ + remove_all(); +} + +bool OperationListBase::empty() +{ + return _list.head() == NULL; +} + +void OperationListBase::add(AsyncOp *op) +{ + bool was_empty = _list.head() == NULL; + op->_list = this; + _list.enqueue(op); + if (was_empty) { + process(); + } +} + +void OperationListBase::process() +{ + while (true) { + AsyncOp *op = static_cast(_list.head()); + if (op == NULL) { + // List empty, nothing left to do + break; + } + if (!op->process()) { + // Processing is in progress + break; + } + _list.dequeue(); + op->complete(); + } +} + +void OperationListBase::remove(AsyncOp *op) +{ + bool head = _list.head() == op; + _list.remove(op); + if (head) { + process(); + } +} + +AsyncOp *OperationListBase::dequeue_raw() +{ + return static_cast(_list.dequeue()); +} + +void OperationListBase::remove_all() +{ + while (true) { + AsyncOp *op = static_cast(_list.head()); + if (op == NULL) { + // List empty, nothing left to do + break; + } + op->complete(); + } +} diff --git a/usb/device/utilities/OperationListBase.h b/usb/device/utilities/OperationListBase.h new file mode 100644 index 00000000000..c3f903f794e --- /dev/null +++ b/usb/device/utilities/OperationListBase.h @@ -0,0 +1,96 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_OPERATION_LIST_BASE_H +#define MBED_OPERATION_LIST_BASE_H + +#include "LinkedListBase.h" +#include "Mutex.h" + +class AsyncOp; + +class OperationListBase { +public: + + /** + * Create a new empty operation list + */ + OperationListBase(); + + /** + * Destroy this object and abort all operations + */ + ~OperationListBase(); + + /** + * Check if the list is empty + * + * @return true if the list is empty false otherwise + */ + bool empty(); + + /** + * Add an operation to the list + * + * If the list was empty then call process on this + * operation + * + * @param op Operation to add + */ + void add(AsyncOp *op); + + /** + * Remove an operation from the list + * + * If this was the head of the list then process the + * next element in the list. + * + * @param op Operation to remove + */ + void remove(AsyncOp *op); + + /** + * Dequeue the head of the list + * + * Remove the head of the operation list without completing it + * or processing the next element. The caller must call the + * AsnycOp::complete() function of the returned object. + * Additionally process() must be called on this object + * if there are still elements in the list. + * + * @return The async op at the head of the list + */ + AsyncOp *dequeue_raw(); + + /** + * Abort all operations + */ + void remove_all(); + + /** + * Process the operation list + * + * This allow the operation at the head of the list to perform processing + */ + void process(); + +private: + friend class AsyncOp; + + LinkedListBase _list; +}; + +#endif From 6829edc190f7d78221933dbc46525f742b93f14d Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 7 May 2018 14:43:35 -0500 Subject: [PATCH 194/488] Update USBHID and USBCDC for new AsyncOp Update USB classes to use the new AsyncOp API. --- usb/device/USBHID/USBHID.cpp | 192 ++++++++++++------------ usb/device/USBHID/USBHID.h | 14 +- usb/device/USBSerial/USBCDC.cpp | 256 +++++++++++++++----------------- usb/device/USBSerial/USBCDC.h | 14 +- 4 files changed, 224 insertions(+), 252 deletions(-) diff --git a/usb/device/USBHID/USBHID.cpp b/usb/device/USBHID/USBHID.cpp index c1028d78b6a..8045459f161 100644 --- a/usb/device/USBHID/USBHID.cpp +++ b/usb/device/USBHID/USBHID.cpp @@ -21,24 +21,91 @@ class USBHID::AsyncSend: public AsyncOp { public: - AsyncSend(const HID_REPORT *report): AsyncOp(NULL), report(report), result(false) + AsyncSend(USBHID *hid, const HID_REPORT *report): hid(hid), report(report), result(false) { } + + ~AsyncSend() + { + + } + + virtual bool process() + { + if (!hid->configured()) { + result = false; + return true; + } + + if (hid->send_nb(report)) { + result = true; + return true; + } + + return false; + } + + USBHID *hid; const HID_REPORT *report; bool result; }; class USBHID::AsyncRead: public AsyncOp { public: - AsyncRead(HID_REPORT *report): AsyncOp(NULL), report(report), result(false) + AsyncRead(USBHID *hid, HID_REPORT *report): hid(hid), report(report), result(false) + { + + } + + ~AsyncRead() { } + + virtual bool process() + { + if (!hid->configured()) { + result = false; + return true; + } + + if (hid->read_nb(report)) { + result = true; + return true; + } + + return false; + } + + USBHID *hid; HID_REPORT *report; bool result; }; +class USBHID::AsyncWait: public AsyncOp { +public: + AsyncWait(USBHID *hid): hid(hid) + { + + } + + ~AsyncWait() + { + + } + + virtual bool process() + { + if (hid->configured()) { + return true; + } + + return false; + } + + USBHID *hid; +}; USBHID::USBHID(bool connect_blocking, uint8_t output_report_length, uint8_t input_report_length, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) : USBDevice(get_usb_phy(), vendor_id, product_id, product_release) @@ -88,15 +155,12 @@ void USBHID::wait_ready() { lock(); - AsyncOp wait_op(NULL); - wait_op.start(&_connect_list); - if (configured()) { - wait_op.complete(); - } + AsyncWait wait_op(this); + _connect_list.add(&wait_op); unlock(); - wait_op.wait(); + wait_op.wait(NULL); } @@ -104,23 +168,12 @@ bool USBHID::send(const HID_REPORT *report) { lock(); - if (!configured()) { - unlock(); - return false; - } - - if (send_nb(report)) { - unlock(); - return true; - } - - AsyncSend send_op(report); - send_op.start(&_send_list); + AsyncSend send_op(this, report); + _send_list.add(&send_op); unlock(); - send_op.wait(); - + send_op.wait(NULL); return send_op.result; } @@ -149,23 +202,12 @@ bool USBHID::read(HID_REPORT *report) { lock(); - if (!configured()) { - unlock(); - return false; - } - - if (read_nb(report)) { - unlock(); - return true; - } - - AsyncRead read_op(report); - read_op.start(&_read_list); + AsyncRead read_op(this, report); + _read_list.add(&read_op); unlock(); - read_op.wait(); - + read_op.wait(NULL); return read_op.result; } @@ -198,13 +240,8 @@ void USBHID::_send_isr(usb_ep_t endpoint) write_finish(_int_in); _send_idle = true; - AsyncSend *send_op = _send_list.head(); - if (send_op != NULL) { - if (send_nb(send_op->report)) { - send_op->result = true; - send_op->complete(); - } - } else { + _send_list.process(); + if (_send_idle) { report_tx(); } @@ -217,60 +254,12 @@ void USBHID::_read_isr(usb_ep_t endpoint) _output_report.length = read_finish(_int_out); _read_idle = true; - AsyncRead *read_op = _read_list.head(); - if (read_op != NULL) { - if (read_nb(read_op->report)) { - read_op->result = true; - read_op->complete(); - } - } else { + _read_list.process(); + if (_read_idle) { report_rx(); } } -void USBHID::_connect_wake_all() -{ - assert_locked(); - - AsyncOp *wait_op = _connect_list.head(); - while (wait_op != NULL) { - wait_op->complete(); - wait_op = _connect_list.head(); - } -} - -void USBHID::_send_abort_all() -{ - assert_locked(); - - if (!_send_idle) { - endpoint_abort(_int_in); - _send_idle = true; - } - AsyncSend *tx_cur = _send_list.head(); - while (tx_cur != NULL) { - tx_cur->result = false; - tx_cur->complete(); - tx_cur = _send_list.head(); - } -} - -void USBHID::_read_abort_all() -{ - assert_locked(); - - if (!_read_idle) { - endpoint_abort(_int_out); - _read_idle = true; - } - AsyncRead *rx_cur = _read_list.head(); - while (rx_cur != NULL) { - rx_cur->result = false; - rx_cur->complete(); - rx_cur = _read_list.head(); - } -} - uint16_t USBHID::report_desc_length() { report_desc(); @@ -280,12 +269,19 @@ uint16_t USBHID::report_desc_length() void USBHID::callback_state_change(DeviceState new_state) { - if (new_state == Configured) { - _connect_wake_all(); - } else { - _send_abort_all(); - _read_abort_all(); + if (new_state != Configured) { + if (!_send_idle) { + endpoint_abort(_int_in); + _send_idle = true; + } + if (!_read_idle) { + endpoint_abort(_int_out); + _read_idle = true; + } } + _send_list.process(); + _read_list.process(); + _connect_list.process(); } // diff --git a/usb/device/USBHID/USBHID.h b/usb/device/USBHID/USBHID.h index 015ad355063..2cd984a6613 100644 --- a/usb/device/USBHID/USBHID.h +++ b/usb/device/USBHID/USBHID.h @@ -22,8 +22,7 @@ #include "USBDevice.h" #include "USBHID_Types.h" -#include "AsyncOp.h" -#include "LinkedList.h" +#include "OperationList.h" @@ -249,17 +248,14 @@ class USBHID: public USBDevice { void _send_isr(usb_ep_t endpoint); void _read_isr(usb_ep_t endpoint); - void _connect_wake_all(); - void _send_abort_all(); - void _read_abort_all(); - class AsyncSend; class AsyncRead; + class AsyncWait; - LinkedList _connect_list; - LinkedList _send_list; + OperationList _connect_list; + OperationList _send_list; bool _send_idle; - LinkedList _read_list; + OperationList _read_list; bool _read_idle; uint8_t _configuration_descriptor[41]; diff --git a/usb/device/USBSerial/USBCDC.cpp b/usb/device/USBSerial/USBCDC.cpp index 4eff925deea..b03ae1df3f4 100644 --- a/usb/device/USBSerial/USBCDC.cpp +++ b/usb/device/USBSerial/USBCDC.cpp @@ -36,10 +36,39 @@ static const uint8_t cdc_line_coding_default[7] = {0x80, 0x25, 0x00, 0x00, 0x00, class USBCDC::AsyncWrite: public AsyncOp { public: - AsyncWrite(uint8_t *buf, uint32_t size): AsyncOp(NULL), tx_buf(buf), tx_size(size), result(false) + AsyncWrite(USBCDC *serial, uint8_t *buf, uint32_t size): + serial(serial), tx_buf(buf), tx_size(size), result(false) { } + + virtual ~AsyncWrite() + { + + } + + virtual bool process() + { + if (!serial->_terminal_connected) { + result = false; + return true; + } + + uint32_t actual_size = 0; + serial->send_nb(tx_buf, tx_size, &actual_size, true); + tx_size -= actual_size; + tx_buf += actual_size; + if (tx_size == 0) { + result = true; + return true; + } + + // Start transfer if it hasn't been + serial->_send_isr_start(); + return false; + } + + USBCDC *serial; uint8_t *tx_buf; uint32_t tx_size; bool result; @@ -47,11 +76,40 @@ class USBCDC::AsyncWrite: public AsyncOp { class USBCDC::AsyncRead: public AsyncOp { public: - AsyncRead(uint8_t *buf, uint32_t size, uint32_t *size_read, bool read_all) - : AsyncOp(NULL), rx_buf(buf), rx_size(size), rx_actual(size_read), all(read_all), result(false) + AsyncRead(USBCDC *serial, uint8_t *buf, uint32_t size, uint32_t *size_read, bool read_all) + : serial(serial), rx_buf(buf), rx_size(size), rx_actual(size_read), all(read_all), result(false) { } + + virtual ~AsyncRead() + { + + } + + virtual bool process() + { + if (!serial->_terminal_connected) { + result = false; + return true; + } + + uint32_t actual_size = 0; + serial->receive_nb(rx_buf, rx_size, &actual_size); + rx_buf += actual_size; + *rx_actual += actual_size; + rx_size -= actual_size; + if ((!all && *rx_actual > 0) || (rx_size == 0)) { + // Wake thread if request is done + result = true; + return true; + } + + serial->_receive_isr_start(); + return false; + } + + USBCDC *serial; uint8_t *rx_buf; uint32_t rx_size; uint32_t *rx_actual; @@ -59,6 +117,31 @@ class USBCDC::AsyncRead: public AsyncOp { bool result; }; +class USBCDC::AsyncWait: public AsyncOp { +public: + AsyncWait(USBCDC *serial) + : serial(serial) + { + + } + + virtual ~AsyncWait() + { + + } + + virtual bool process() + { + if (serial->_terminal_connected) { + return true; + } + + return false; + } + + USBCDC *serial; +}; + USBCDC::USBCDC(bool connect_blocking, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) : USBDevice(get_usb_phy(), vendor_id, product_id, product_release) @@ -230,13 +313,30 @@ void USBCDC::_change_terminal_connected(bool connected) { assert_locked(); - if (connected) { - _connect_wake_all(); - } else { - _send_abort_all(); - _receive_abort_all(); - } _terminal_connected = connected; + if (!_terminal_connected) { + // Abort TX + if (_tx_in_progress) { + endpoint_abort(_bulk_in); + _tx_in_progress = false; + } + _tx_buf = _tx_buffer; + _tx_size = 0; + _tx_list.process(); + MBED_ASSERT(_tx_list.empty()); + + // Abort RX + if (_rx_in_progress) { + endpoint_abort(_bulk_in); + _rx_in_progress = false; + } + _rx_buf = _rx_buffer; + _rx_size = 0; + _rx_list.process(); + MBED_ASSERT(_rx_list.empty()); + + } + _connected_list.process(); } bool USBCDC::ready() @@ -253,89 +353,27 @@ void USBCDC::wait_ready() { lock(); - AsyncOp wait_op(NULL); - wait_op.start(&_connected_list); - if (_terminal_connected) { - wait_op.complete(); - } + AsyncWait wait_op(this); + _connected_list.add(&wait_op); unlock(); - wait_op.wait(); -} - -void USBCDC::_connect_wake_all() -{ - AsyncOp *wait_op = _connected_list.head(); - while (wait_op != NULL) { - wait_op->complete(); - wait_op = _connected_list.head(); - } + wait_op.wait(NULL); } bool USBCDC::send(uint8_t *buffer, uint32_t size) { lock(); - if (!_terminal_connected) { - unlock(); - return false; - } - AsyncWrite write_op(buffer, size); - write_op.start(&_tx_list); - _send_next(); + AsyncWrite write_op(this, buffer, size); + _tx_list.add(&write_op); unlock(); - write_op.wait(); + write_op.wait(NULL); return write_op.result; } -void USBCDC::_send_next() -{ - assert_locked(); - - uint32_t actual_size; - do { - // Set current TX operation or return if there are none left - AsyncWrite *tx_cur = _tx_list.head(); - if (tx_cur == NULL) { - break; - } - - actual_size = 0; - send_nb(tx_cur->tx_buf, tx_cur->tx_size, &actual_size, false); - tx_cur->tx_size -= actual_size; - tx_cur->tx_buf += actual_size; - if (tx_cur->tx_size == 0) { - tx_cur->result = true; - tx_cur->complete(); - } - } while (actual_size > 0); - - // Start transfer if it hasn't been - _send_isr_start(); -} - -void USBCDC::_send_abort_all() -{ - assert_locked(); - - if (_tx_in_progress) { - endpoint_abort(_bulk_in); - _tx_in_progress = false; - } - _tx_buf = _tx_buffer; - _tx_size = 0; - - AsyncWrite *tx_cur = _tx_list.head(); - while (tx_cur != NULL) { - tx_cur->result = false; - tx_cur->complete(); - tx_cur = _tx_list.head(); - } -} - void USBCDC::send_nb(uint8_t *buffer, uint32_t size, uint32_t *actual, bool now) { lock(); @@ -357,7 +395,6 @@ void USBCDC::send_nb(uint8_t *buffer, uint32_t size, uint32_t *actual, bool now) unlock(); } - void USBCDC::_send_isr_start() { assert_locked(); @@ -382,7 +419,7 @@ void USBCDC::_send_isr(usb_ep_t endpoint) _tx_size = 0; _tx_in_progress = false; - _send_next(); + _tx_list.process(); if (!_tx_in_progress) { data_tx(); } @@ -392,72 +429,19 @@ bool USBCDC::receive(uint8_t *buffer, uint32_t size, uint32_t *size_read) { lock(); - if (!_terminal_connected) { - unlock(); - return false; - } bool read_all = size_read == NULL; uint32_t size_read_dummy; uint32_t *size_read_ptr = read_all ? &size_read_dummy : size_read; *size_read_ptr = 0; - AsyncRead read_op(buffer, size, size_read_ptr, read_all); - read_op.start(&_rx_list); - _receive_next(); + AsyncRead read_op(this, buffer, size, size_read_ptr, read_all); + _rx_list.add(&read_op); unlock(); - read_op.wait(); + read_op.wait(NULL); return read_op.result; } -void USBCDC::_receive_next() -{ - assert_locked(); - - uint32_t actual_size; - do { - // Set current RX operation or return if there are none left - AsyncRead *rx_cur = _rx_list.head(); - if (rx_cur == NULL) { - break; - } - - actual_size = 0; - receive_nb(rx_cur->rx_buf, rx_cur->rx_size, &actual_size); - rx_cur->rx_buf += actual_size; - *rx_cur->rx_actual += actual_size; - rx_cur->rx_size -= actual_size; - if ((!rx_cur->all && *rx_cur->rx_actual > 0) || (rx_cur->rx_size == 0)) { - // Wake thread if request is done - rx_cur->result = true; - rx_cur->complete(); - rx_cur = NULL; - } - } while (actual_size > 0); - - _receive_isr_start(); - -} - -void USBCDC::_receive_abort_all() -{ - assert_locked(); - - if (_rx_in_progress) { - endpoint_abort(_bulk_in); - _rx_in_progress = false; - } - _rx_buf = _rx_buffer; - _rx_size = 0; - - AsyncRead *rx_cur = _rx_list.head(); - while (rx_cur != NULL) { - rx_cur->result = false; - rx_cur->complete(); - rx_cur = _rx_list.head(); - } -} - void USBCDC::receive_nb(uint8_t *buffer, uint32_t size, uint32_t *size_read) { @@ -496,7 +480,7 @@ void USBCDC::_receive_isr(usb_ep_t endpoint) _rx_buf = _rx_buffer; _rx_size = read_finish(_bulk_out); _rx_in_progress = false; - _receive_next(); + _rx_list.process(); if (!_rx_in_progress) { data_rx(); } diff --git a/usb/device/USBSerial/USBCDC.h b/usb/device/USBSerial/USBCDC.h index 726ffb4419e..fd00f227c7a 100644 --- a/usb/device/USBSerial/USBCDC.h +++ b/usb/device/USBSerial/USBCDC.h @@ -22,7 +22,7 @@ #include "USBDevice_Types.h" #include "USBDevice.h" -#include "LinkedList.h" +#include "OperationList.h" class AsyncOp; @@ -180,6 +180,7 @@ class USBCDC: public USBDevice { class AsyncWrite; class AsyncRead; + class AsyncWait; virtual void callback_reset(); virtual void callback_state_change(DeviceState new_state); @@ -191,15 +192,10 @@ class USBCDC: public USBDevice { void _init(); void _change_terminal_connected(bool connected); - void _connect_wake_all(); - void _send_next(); - void _send_abort_all(); void _send_isr_start(); void _send_isr(usb_ep_t endpoint); - void _receive_next(); - void _receive_abort_all(); void _receive_isr_start(); void _receive_isr(usb_ep_t endpoint); @@ -211,16 +207,16 @@ class USBCDC: public USBDevice { uint8_t _cdc_new_line_coding[7]; uint8_t _config_descriptor[75]; - LinkedList _connected_list; + OperationList _connected_list; bool _terminal_connected; - LinkedList _tx_list; + OperationList _tx_list; bool _tx_in_progress; uint8_t _tx_buffer[64]; uint8_t *_tx_buf; uint32_t _tx_size; - LinkedList _rx_list; + OperationList _rx_list; bool _rx_in_progress; uint8_t _rx_buffer[64]; uint8_t *_rx_buf; From c4bef008c0d4d7e8ef9e51c9365f0f40c0c0dccd Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 10 May 2018 22:39:39 -0500 Subject: [PATCH 195/488] Require USB classes to implement descriptor Make the function configuration_desc pure virtual inside USBDevice. This should be a compile time error since no subclass will work without a configuration descriptor. --- usb/device/USBDevice/USBDevice.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index a1b491574b3..40051ce9c08 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -267,10 +267,7 @@ class USBDevice: public USBPhyEvents { * @param index descriptor index * @returns pointer to the configuration descriptor */ - virtual const uint8_t *configuration_desc(uint8_t index) - { - return NULL; - }; + virtual const uint8_t *configuration_desc(uint8_t index) = 0; /* * Get string lang id descriptor From 7ab3e9c23501b269d853595c1eeb8b794fd876f1 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 10 May 2018 22:39:50 -0500 Subject: [PATCH 196/488] Update the USBMIDI class Update the USB class USBMIDI from the unsupported folder. --- usb/device/USBMIDI/MIDIMessage.h | 474 +++++++++++++++++++++++++++++++ usb/device/USBMIDI/USBMIDI.cpp | 397 ++++++++++++++++++++++++++ usb/device/USBMIDI/USBMIDI.h | 184 ++++++++++++ 3 files changed, 1055 insertions(+) create mode 100644 usb/device/USBMIDI/MIDIMessage.h create mode 100644 usb/device/USBMIDI/USBMIDI.cpp create mode 100644 usb/device/USBMIDI/USBMIDI.h diff --git a/usb/device/USBMIDI/MIDIMessage.h b/usb/device/USBMIDI/MIDIMessage.h new file mode 100644 index 00000000000..ff16226a9d6 --- /dev/null +++ b/usb/device/USBMIDI/MIDIMessage.h @@ -0,0 +1,474 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MIDIMESSAGE_H +#define MIDIMESSAGE_H + +#include "mbed.h" + +#define MAX_MIDI_MESSAGE_SIZE 256 // Max message size. SysEx can be up to 65536 but 256 should be fine for most usage + +// MIDI Message Format +// +// [ msg(4) | channel(4) ] [ 0 | n(7) ] [ 0 | m(7) ] +// +// MIDI Data Messages (Channel Specific) +// +// Message msg n m +// --------------------------------------------- +// Note Off 0x8 Key Velocity +// Note On 0x9 Key Velocity +// Polyphonic Aftertouch 0xA Key Pressure +// Control Change 0xB Controller Value +// Program Change 0xC Program - +// Channel Aftertouch 0xD Pressure - +// Pitch Wheel 0xE LSB MSB + +#define CABLE_NUM (0<<4) + +/** A MIDI message container */ +class MIDIMessage { +public: + + MIDIMessage() : data(new uint8_t[MAX_MIDI_MESSAGE_SIZE + 1]), length(0) {} + + MIDIMessage(uint8_t *buf) : data(new uint8_t[MAX_MIDI_MESSAGE_SIZE + 1]), length(0) + { + for (int i = 0; i < 4; i++) { + data[i] = buf[i]; + } + } + + /** + * Copy constructor + */ + MIDIMessage(const MIDIMessage &other) + { + *this = other; + } + + /** + * Assignment operator + */ + MIDIMessage &operator=(const MIDIMessage &other) + { + length = other.length; + for (int i = 0; i < length; i++) { + data[i] = other.data[i]; + } + + return *this; + } + + ~MIDIMessage() + { + delete[] data; + } + + /** + * Set this MIDIMessage to a raw MIDI message + * + * @param buf is a true MIDI message (not USBMidi message) + * @param buf_len size of message + */ + void from_raw(uint8_t *buf, int buf_len) + { + length = buf_len + 1; + if (length > MAX_MIDI_MESSAGE_SIZE) { + // Message is too big + length = 0; + return; + } + + // first byte keeped for retro-compatibility + data[0] = CABLE_NUM | 0x08; + + for (int i = 0; i < buf_len; i++) { + data[i + 1] = buf[i]; + } + } + + // create messages + + /** Create a NoteOff message + * @param key Key ID + * @param velocity Key velocity (0-127, default = 127) + * @param channel Key channel (0-15, default 0) + * @returns A MIDIMessage + */ + static MIDIMessage NoteOff(int key, int velocity = 127, int channel = 0) + { + MIDIMessage msg; + msg.data[0] = CABLE_NUM | 0x08; + msg.data[1] = 0x80 | (channel & 0x0F); + msg.data[2] = key & 0x7F; + msg.data[3] = velocity & 0x7F; + msg.length = 4; + return msg; + } + + /** Create a NoteOn message + * @param key Key ID + * @param velocity Key velocity (0-127, default = 127) + * @param channel Key channel (0-15, default 0) + * @returns A MIDIMessage + */ + static MIDIMessage NoteOn(int key, int velocity = 127, int channel = 0) + { + MIDIMessage msg; + msg.data[0] = CABLE_NUM | 0x09; + msg.data[1] = 0x90 | (channel & 0x0F); + msg.data[2] = key & 0x7F; + msg.data[3] = velocity & 0x7F; + msg.length = 4; + return msg; + } + + /** Create a PolyPhonic Aftertouch message + * @param key Key ID + * @param pressure Aftertouch pressure (0-127) + * @param channel Key channel (0-15, default 0) + * @returns A MIDIMessage + */ + static MIDIMessage PolyphonicAftertouch(int key, int pressure, int channel = 0) + { + MIDIMessage msg; + msg.data[0] = CABLE_NUM | 0x0A; + msg.data[1] = 0xA0 | (channel & 0x0F); + msg.data[2] = key & 0x7F; + msg.data[3] = pressure & 0x7F; + msg.length = 4; + return msg; + } + + /** Create a Control Change message + * @param control Controller ID + * @param value Controller value (0-127) + * @param channel Controller channel (0-15, default 0) + * @returns A MIDIMessage + */ + static MIDIMessage ControlChange(int control, int value, int channel = 0) + { + MIDIMessage msg; + msg.data[0] = CABLE_NUM | 0x0B; + msg.data[1] = 0xB0 | (channel & 0x0F); + msg.data[2] = control & 0x7F; + msg.data[3] = value & 0x7F; + msg.length = 4; + return msg; + } + + /** Create a Program Change message + * @param program Program ID + * @param channel Channel (0-15, default 0) + * @returns A MIDIMessage + */ + static MIDIMessage ProgramChange(int program, int channel = 0) + { + MIDIMessage msg; + msg.data[0] = CABLE_NUM | 0x0C; + msg.data[1] = 0xC0 | (channel & 0x0F); + msg.data[2] = program & 0x7F; + msg.data[3] = 0x00; + msg.length = 4; + return msg; + } + + /** Create a Channel Aftertouch message + * @param pressure Pressure + * @param channel Key channel (0-15, default 0) + * @returns A MIDIMessage + */ + static MIDIMessage ChannelAftertouch(int pressure, int channel = 0) + { + MIDIMessage msg; + msg.data[0] = CABLE_NUM | 0x0D; + msg.data[1] = 0xD0 | (channel & 0x0F); + msg.data[2] = pressure & 0x7F; + msg.data[3] = 0x00; + msg.length = 4; + return msg; + } + + /** Create a Pitch Wheel message + * @param pitch Pitch (-8192 - 8191, default = 0) + * @param channel Channel (0-15, default 0) + * @returns A MIDIMessage + */ + static MIDIMessage PitchWheel(int pitch = 0, int channel = 0) + { + MIDIMessage msg; + int p = pitch + 8192; // 0 - 16383, 8192 is center + msg.data[0] = CABLE_NUM | 0x0E; + msg.data[1] = 0xE0 | (channel & 0x0F); + msg.data[2] = p & 0x7F; + msg.data[3] = (p >> 7) & 0x7F; + msg.length = 4; + return msg; + } + + /** Create an All Notes Off message + * @param channel Channel (0-15, default 0) + * @returns A MIDIMessage + */ + static MIDIMessage AllNotesOff(int channel = 0) + { + return ControlChange(123, 0, channel); + } + + /** Create a SysEx message + * @param data SysEx data (including 0xF0 .. 0xF7) + * @param len SysEx data length + * @returns A MIDIMessage + */ + static MIDIMessage SysEx(uint8_t *data, int len) + { + MIDIMessage msg; + msg.from_raw(data, len); + return msg; + } + + // decode messages + + /** MIDI Message Types */ + enum MIDIMessageType { + ErrorType, + NoteOffType, + NoteOnType, + PolyphonicAftertouchType, + ControlChangeType, + ProgramChangeType, + ChannelAftertouchType, + PitchWheelType, + ResetAllControllersType, + AllNotesOffType, + SysExType + }; + + /** Read the message type + * + * @returns MIDIMessageType + */ + MIDIMessageType type() + { + MIDIMessageType message_type; + uint8_t min_size; + switch ((data[1] >> 4) & 0xF) { + case 0x8: + // message, channel + // key + // velocity + min_size = 3; + message_type = NoteOffType; + break; + case 0x9: + // message, channel + // key + // velocity + min_size = 3; + message_type = NoteOnType; + break; + case 0xA: + // message, channel + // key + // pressure + min_size = 3; + message_type = PolyphonicAftertouchType; + break; + case 0xB: + // message, channel + // controller + min_size = 2; + if ((data[2] & 0x7F) < 120) { // standard controllers + message_type = ControlChangeType; + } else if ((data[2] & 0x7F) == 121) { + message_type = ResetAllControllersType; + } else if ((data[2] & 0x7F) == 123) { + message_type = AllNotesOffType; + } else { + message_type = ErrorType; // unsupported atm + } + break; + case 0xC: + // message, channel + // program + min_size = 2; + message_type = ProgramChangeType; + break; + case 0xD: + // message, channel + // pressure + min_size = 2; + message_type = ChannelAftertouchType; + break; + case 0xE: + // message, channel + // pitch lsb + // pitch msb + min_size = 3; + message_type = PitchWheelType; + break; + case 0xF: + min_size = 2; + message_type = SysExType; + break; + default: + message_type = ErrorType; + break; + } + + + if (length < min_size) { + // too small to be a valid message + message_type = ErrorType; + } + return message_type; + } + + /** + * Read the channel number + * + * @return channel number or -1 on error + */ + + int channel() + { + return (data[1] & 0x0F); + } + + /** + * Read the key ID + * + * @return key ID or -1 on error + */ + int key() + { + MIDIMessageType msg_type = type(); + if ((msg_type != NoteOffType) && + (msg_type != NoteOnType) && + (msg_type != PolyphonicAftertouchType)) { + return -1; + } + + return data[2] & 0x7F; + } + + /** + * Read the velocity + * + * @return velocity or -1 on error + */ + int velocity() + { + MIDIMessageType msg_type = type(); + if ((msg_type != NoteOffType) && + (msg_type != NoteOnType)) { + return -1; + } + + return data[3] & 0x7F; + } + + /** + * Read the controller value + * + * @return controller value or -1 on error + */ + int value() + { + MIDIMessageType msg_type = type(); + if ((msg_type != ControlChangeType) && + (msg_type != ResetAllControllersType) && + (msg_type != AllNotesOffType)) { + return -1; + } + + return data[3] & 0x7F; + } + + /** + * Read the aftertouch pressure + * + * @return aftertouch pressure or -1 on error + */ + int pressure() + { + MIDIMessageType msg_type = type(); + if ((msg_type != PolyphonicAftertouchType) && + (msg_type != ChannelAftertouchType)) { + return -1; + } + + if (type() == PolyphonicAftertouchType) { + return data[3] & 0x7F; + } else { + return data[2] & 0x7F; + } + } + + /** + * Read the controller number + * + * @return controller number or -1 on error + */ + int controller() + { + MIDIMessageType msg_type = type(); + if ((msg_type != ControlChangeType) && + (msg_type != ResetAllControllersType) && + (msg_type != AllNotesOffType)) { + return -1; + } + + return data[2] & 0x7F; + } + + /** + * Read the program number + * + * @return program number or -1 on error + */ + int program() + { + MIDIMessageType msg_type = type(); + if (msg_type != ProgramChangeType) { + return -1; + } + + return data[2] & 0x7F; + } + + /** + * Read the pitch value + * + * @return pitch value or -1 on error + */ + int pitch() + { + MIDIMessageType msg_type = type(); + if (msg_type != PitchWheelType) { + return -1; + } + + int p = ((data[3] & 0x7F) << 7) | (data[2] & 0x7F); + return p - 8192; // 0 - 16383, 8192 is center + } + + uint8_t *data; + uint16_t length; +}; + +#endif diff --git a/usb/device/USBMIDI/USBMIDI.cpp b/usb/device/USBMIDI/USBMIDI.cpp new file mode 100644 index 00000000000..4fb902c5ebd --- /dev/null +++ b/usb/device/USBMIDI/USBMIDI.cpp @@ -0,0 +1,397 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBMIDI.h" +#include "EndpointResolver.h" +#include "usb_phy_api.h" + +#define FLAG_WRITE_DONE (1 << 0) +#define FLAG_DISCONNECT (1 << 1) +#define FLAG_CONNECT (1 << 2) + +USBMIDI::USBMIDI(bool connect_blocking, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) + : USBDevice(get_usb_phy(), vendor_id, product_id, product_release) +{ + _init(); + + if (connect_blocking) { + USBDevice::connect(); + wait_ready(); + } else { + init(); + } +} + +USBMIDI::USBMIDI(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) + : USBDevice(phy, vendor_id, product_id, product_release) +{ + _init(); + + // User or child responsible for calling connect or init +} + +USBMIDI::~USBMIDI() +{ + deinit(); +} + +void USBMIDI::_init() +{ + _bulk_buf_pos = 0; + _bulk_buf_size = 0; + + _data_ready = false; + _cur_data = 0; + + EndpointResolver resolver(endpoint_table()); + + resolver.endpoint_ctrl(64); + _bulk_in = resolver.endpoint_in(USB_EP_TYPE_BULK, MaxSize); + _bulk_out = resolver.endpoint_out(USB_EP_TYPE_BULK, MaxSize); + MBED_ASSERT(resolver.valid()); +} + +bool USBMIDI::ready() +{ + return _flags.get() & FLAG_CONNECT ? true : false; +} + +void USBMIDI::wait_ready() +{ + _flags.wait_any(FLAG_CONNECT, osWaitForever, false); +} + +// write plain MIDIMessage that will be converted to USBMidi event packet +bool USBMIDI::write(MIDIMessage m) +{ + _write_mutex.lock(); + + bool ret = true; + // first byte keeped for retro-compatibility + for (int p = 1; p < m.length; p += 3) { + uint8_t buf[4]; + // Midi message to USBMidi event packet + buf[0] = m.data[1] >> 4; + // SysEx + if (buf[0] == 0xF) { + if ((m.length - p) > 3) { + // SysEx start or continue + buf[0] = 0x4; + } else { + switch (m.length - p) { + case 1: + // SysEx end with one byte + buf[0] = 0x5; + break; + case 2: + // SysEx end with two bytes + buf[0] = 0x6; + break; + case 3: + // SysEx end with three bytes + buf[0] = 0x7; + break; + } + } + } + buf[1] = m.data[p]; + + if (p + 1 < m.length) { + buf[2] = m.data[p + 1]; + } else { + buf[2] = 0; + } + + if (p + 2 < m.length) { + buf[3] = m.data[p + 2]; + } else { + buf[3] = 0; + } + + _flags.clear(FLAG_WRITE_DONE); + USBDevice::write_start(_bulk_in, buf, 4); + uint32_t flags = _flags.wait_any(FLAG_WRITE_DONE | FLAG_DISCONNECT, osWaitForever, false); + if (flags & FLAG_DISCONNECT) { + ret = false; + break; + } + USBDevice::write_finish(_bulk_in); + } + + _write_mutex.unlock(); + return ret; +} + +bool USBMIDI::readable() +{ + lock(); + + bool ret = _data_ready; + + unlock(); + + return ret; +} + +bool USBMIDI::read(MIDIMessage *m) +{ + lock(); + + // Invalidate message + m->length = 0; + + if (!_data_ready) { + unlock(); + return false; + } + + m->from_raw(_data, _cur_data); + _cur_data = 0; + _next_message(); + + if (!_data_ready) { + read_start(_bulk_out, _bulk_buf, MaxSize); + } + + unlock(); + + return true; +} + +void USBMIDI::attach(Callback callback) +{ + lock(); + + _callback = callback; + + unlock(); +} + +void USBMIDI::callback_state_change(DeviceState new_state) +{ + assert_locked(); + + if (new_state == Configured) { + _flags.set(FLAG_CONNECT); + _flags.clear(FLAG_DISCONNECT); + } else { + _flags.set(FLAG_DISCONNECT); + _flags.clear(FLAG_CONNECT | FLAG_WRITE_DONE); + } +} + +void USBMIDI::callback_request(const setup_packet_t *setup) +{ + assert_locked(); + + RequestResult result = PassThrough; + uint8_t *data = NULL; + uint32_t size = 0; + + complete_request(result, data, size); +} + +void USBMIDI::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) +{ + assert_locked(); + + complete_request_xfer_done(false); +} + +void USBMIDI::callback_set_configuration(uint8_t configuration) +{ + assert_locked(); + + if (configuration == DEFAULT_CONFIGURATION) { + complete_set_configuration(false); + } + + endpoint_remove_all(); + endpoint_add(_bulk_in, MaxSize, USB_EP_TYPE_BULK, &USBMIDI::_in_callback); + endpoint_add(_bulk_out, MaxSize, USB_EP_TYPE_BULK, &USBMIDI::_out_callback); + + read_start(_bulk_out, _bulk_buf, MaxSize); + + complete_set_configuration(true); +} + +void USBMIDI::callback_set_interface(uint16_t interface, uint8_t alternate) +{ + assert_locked(); + + complete_set_interface(true); +} + +const uint8_t *USBMIDI::string_iinterface_desc() +{ + static const uint8_t string_iinterface_descriptor[] = { + 0x0c, //bLength + STRING_DESCRIPTOR, //bDescriptorType 0x03 + 'A', 0, 'u', 0, 'd', 0, 'i', 0, 'o', 0 //bString iInterface - Audio + }; + return string_iinterface_descriptor; +} + +const uint8_t *USBMIDI::string_iproduct_desc() +{ + static const uint8_t string_iproduct_descriptor[] = { + 0x16, //bLength + STRING_DESCRIPTOR, //bDescriptorType 0x03 + 'M', 0, 'b', 0, 'e', 0, 'd', 0, ' ', 0, 'A', 0, 'u', 0, 'd', 0, 'i', 0, 'o', 0 //bString iProduct - Mbed Audio + }; + return string_iproduct_descriptor; +} + +const uint8_t *USBMIDI::configuration_desc(uint8_t index) +{ + if (index != 0) { + return NULL; + } + + uint8_t config_descriptor_temp[] = { + // configuration descriptor + 0x09, 0x02, 0x65, 0x00, 0x02, 0x01, 0x00, 0xc0, 0x50, + + // The Audio Interface Collection + 0x09, 0x04, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, // Standard AC Interface Descriptor + 0x09, 0x24, 0x01, 0x00, 0x01, 0x09, 0x00, 0x01, 0x01, // Class-specific AC Interface Descriptor + 0x09, 0x04, 0x01, 0x00, 0x02, 0x01, 0x03, 0x00, 0x00, // MIDIStreaming Interface Descriptors + 0x07, 0x24, 0x01, 0x00, 0x01, 0x41, 0x00, // Class-Specific MS Interface Header Descriptor + + // MIDI IN JACKS + 0x06, 0x24, 0x02, 0x01, 0x01, 0x00, + 0x06, 0x24, 0x02, 0x02, 0x02, 0x00, + + // MIDI OUT JACKS + 0x09, 0x24, 0x03, 0x01, 0x03, 0x01, 0x02, 0x01, 0x00, + 0x09, 0x24, 0x03, 0x02, 0x06, 0x01, 0x01, 0x01, 0x00, + + // OUT endpoint - Standard MS Bulk Data Endpoint Descriptor + 0x09, // bLength + 0x05, // bDescriptorType + _bulk_out, // bEndpointAddress + 0x02, // bmAttributes + 0x40, // wMaxPacketSize (LSB) + 0x00, // wMaxPacketSize (MSB) + 0x00, // bInterval (milliseconds) + 0x00, // bRefresh + 0x00, // bSynchAddress + + 0x05, 0x25, 0x01, 0x01, 0x01, + + // IN endpoint - Standard MS Bulk Data Endpoint Descriptor + 0x09, // bLength + 0x05, // bDescriptorType + _bulk_in, // bEndpointAddress + 0x02, // bmAttributes + 0x40, // wMaxPacketSize (LSB) + 0x00, // wMaxPacketSize (MSB) + 0x00, // bInterval (milliseconds) + 0x00, // bRefresh + 0x00, // bSynchAddress + + 0x05, 0x25, 0x01, 0x01, 0x03, + }; + MBED_ASSERT(sizeof(config_descriptor_temp) == sizeof(_config_descriptor)); + memcpy(_config_descriptor, config_descriptor_temp, sizeof(config_descriptor_temp)); + return _config_descriptor; +} + +void USBMIDI::_in_callback(usb_ep_t ep) +{ + assert_locked(); + + _flags.set(FLAG_WRITE_DONE); +} + +void USBMIDI::_out_callback(usb_ep_t ep) +{ + assert_locked(); + + _bulk_buf_size = read_finish(_bulk_out); + _bulk_buf_pos = 0; + + if (_callback && _next_message()) { + _callback(); + return; + } + + read_start(_bulk_out, _bulk_buf, MaxSize); +} + +bool USBMIDI::_next_message() +{ + assert_locked(); + + bool data_ready = false; + while (_bulk_buf_pos < _bulk_buf_size) { + uint8_t data_read; + bool data_end = true; + switch (_bulk_buf[_bulk_buf_pos]) { + case 0x2: + // Two-bytes System Common Message - undefined in USBMidi 1.0 + data_read = 2; + break; + case 0x4: + // SysEx start or continue + data_end = false; + data_read = 3; + break; + case 0x5: + // Single-byte System Common Message or SysEx end with one byte + data_read = 1; + break; + case 0x6: + // SysEx end with two bytes + data_read = 2; + break; + case 0xC: + // Program change + data_read = 2; + break; + case 0xD: + // Channel pressure + data_read = 2; + break; + case 0xF: + // Single byte + data_read = 1; + break; + default: + // Others three-bytes messages + data_read = 3; + break; + } + + for (uint8_t j = 1; j < data_read + 1; j++) { + if (_cur_data < sizeof(_data)) { + _data[_cur_data] = _bulk_buf[_bulk_buf_pos + j]; + } + _cur_data++; + } + _bulk_buf_pos += 4; + + if (data_end) { + // Message is ready to be read + data_ready = true; + break; + } + } + + _data_ready = data_ready; + return data_ready; +} diff --git a/usb/device/USBMIDI/USBMIDI.h b/usb/device/USBMIDI/USBMIDI.h new file mode 100644 index 00000000000..c1d968d6192 --- /dev/null +++ b/usb/device/USBMIDI/USBMIDI.h @@ -0,0 +1,184 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBMIDI_H +#define USBMIDI_H + +/* These headers are included for child class. */ +#include "USBDescriptor.h" +#include "USBDevice_Types.h" + +#include "USBDevice.h" +#include "MIDIMessage.h" +#include "EventFlags.h" +#include "Mutex.h" +#include "Callback.h" + +#define DEFAULT_CONFIGURATION (1) + +/** +* USBMIDI example +* +* @code +* #include "mbed.h" +* #include "USBMIDI.h" +* +* USBMIDI midi; +* +* int main() { +* while (1) { +* for(int i=48; i<83; i++) { // send some messages! +* midi.write(MIDIMessage::NoteOn(i)); +* wait(0.25); +* midi.write(MIDIMessage::NoteOff(i)); +* wait(0.5); +* } +* } +* } +* @endcode +*/ +class USBMIDI: public USBDevice { +public: + + /** + * Basic constructor + * + * Construct this object optionally connecting and blocking until it is ready. + * + * @note Do not use this constructor in derived classes. + * + * @param connect_blocking true to perform a blocking connect, false to start in a disconnected state + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBMIDI(bool connect_blocking = true, uint16_t vendor_id = 0x0700, uint16_t product_id = 0x0101, uint16_t product_release = 0x0001); + + /** + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. + * + * @param phy USB phy to use + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBMIDI(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ + virtual ~USBMIDI(); + + /** + * Check if this class is ready + * + * @return true if configured, false otherwise + */ + bool ready(); + + /** + * Block until this device is configured + */ + void wait_ready(); + + /** + * Send a MIDIMessage + * + * @param m The MIDIMessage to send + * @return true if the message was sent, false otherwise + */ + bool write(MIDIMessage m); + + /** + * Check if a message can be read + * + * @return true if a packet can be read false otherwise + * @note USBMIDI::attach must be called to enable the receiver + */ + bool readable(); + + /** + * Read a message + * + * @param m The MIDIMessage to fill + * @return true if a message was read, false otherwise + */ + bool read(MIDIMessage *m); + + /** + * Attach a callback for when a MIDIEvent is received + * + * @param callback code to call when a packet is received + */ + void attach(Callback callback); + + +protected: + + virtual void callback_state_change(DeviceState new_state); + + virtual void callback_request(const setup_packet_t *setup); + + virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); + + virtual void callback_set_configuration(uint8_t configuration); + + virtual void callback_set_interface(uint16_t interface, uint8_t alternate); + + virtual const uint8_t *string_iproduct_desc(); + + virtual const uint8_t *string_iinterface_desc(); + + virtual const uint8_t *configuration_desc(uint8_t index); + +private: + static const uint32_t MaxSize = 64; + + uint8_t _bulk_buf[MaxSize]; + uint32_t _bulk_buf_pos; + uint32_t _bulk_buf_size; + + bool _data_ready; + uint8_t _data[MAX_MIDI_MESSAGE_SIZE + 1]; + uint32_t _cur_data; + + rtos::EventFlags _flags; + rtos::Mutex _write_mutex; + + usb_ep_t _bulk_in; + usb_ep_t _bulk_out; + uint8_t _config_descriptor[0x65]; + + Callback _callback; + + void _init(); + void _in_callback(usb_ep_t); + void _out_callback(usb_ep_t); + bool _next_message(); +}; + +#endif From 799940a3589c7eb05e10748a1e47c35c1489ea66 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sun, 27 May 2018 16:44:00 -0500 Subject: [PATCH 197/488] Add default values to USBCDC constructor Add reasonable defaults to the USBCDC constructor so it is easier to use. --- usb/device/USBSerial/USBCDC.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/usb/device/USBSerial/USBCDC.h b/usb/device/USBSerial/USBCDC.h index fd00f227c7a..bc281550e46 100644 --- a/usb/device/USBSerial/USBCDC.h +++ b/usb/device/USBSerial/USBCDC.h @@ -41,7 +41,7 @@ class USBCDC: public USBDevice { * @param product_id Your product_id * @param product_release Your product_release */ - USBCDC(bool connect_blocking, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); + USBCDC(bool connect_blocking=true, uint16_t vendor_id=0x1f00, uint16_t product_id=0x2012, uint16_t product_release=0x0001); /** * Fully featured constructor From 84862123da7fdc6e5d6f28d83716345e037f56f6 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 15 May 2018 18:41:33 -0500 Subject: [PATCH 198/488] Fix LPC1768 test failures Reset endpoints when they are removed. This ensures buffers and the data toggle bit get reset back to zero. --- usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp b/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp index d962235961a..2192bec7317 100644 --- a/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp +++ b/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp @@ -583,6 +583,9 @@ void USBPhyHw::endpoint_remove(usb_ep_t endpoint) disableEndpointEvent(endpoint); + // reset this endpoint, including data toggle + SIEsetEndpointStatus(endpoint, 0); + LPC_USB->USBDevIntClr = EP_RLZED; LPC_USB->USBReEp &= ~EP(endpoint); From 6186c67ae3ad5f7aae1e6d9fc857e0121cf2079f Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 15 May 2018 19:32:48 -0500 Subject: [PATCH 199/488] Implement LPC1768 USB abort function Implement the USB abort function so interrupts wont fire for a transfer that has been aborted. The transfer may still take place but the buffer passed into endpoint_write or endpoint_read will not be used. --- .../targets/TARGET_NXP/USBHAL_LPC17.cpp | 86 ++++++++++++------- 1 file changed, 56 insertions(+), 30 deletions(-) diff --git a/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp b/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp index 2192bec7317..58c264a5e4a 100644 --- a/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp +++ b/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp @@ -120,7 +120,7 @@ static USBPhyHw *instance; -static volatile int epComplete; +static uint32_t opStarted; static void SIECommand(uint32_t command) { @@ -250,16 +250,24 @@ static uint8_t selectEndpointClearInterrupt(uint8_t endpoint) static void enableEndpointEvent(uint8_t endpoint) { - // Enable an endpoint interrupt + // Route endpoint events to USBEpIntSt so they trigger an interrupt LPC_USB->USBEpIntEn |= EP(endpoint); } +// Do not use disableEndpointEvent. If an endpoint's event is disabled +// and a transfer occurs on that endpoint then that endpoint will enter +// a bad state. Future transfers on that endpoint will not trigger an +// interrupt even if the endpoint event is enabled again or the +// endpoint is reinitialized +/* static void disableEndpointEvent(uint8_t endpoint) __attribute__((unused)); static void disableEndpointEvent(uint8_t endpoint) { - // Disable an endpoint interrupt + // Don't set endpoint interrupt to pending in USBEpIntSt when an event occurs. + // Instead route them to USBDMARSt so they can be ignored. LPC_USB->USBEpIntEn &= ~EP(endpoint); } +*/ static uint32_t endpointReadcore(uint8_t endpoint, uint8_t *buffer, uint32_t size) @@ -392,10 +400,18 @@ void USBPhyHw::init(USBPhyEvents *events) // Connect must be low for at least 2.5uS wait(0.3); + // Disable control endpoints + SIEsetEndpointStatus(EP0IN, SIE_SES_DA); + SIEsetEndpointStatus(EP0OUT, SIE_SES_DA); + // Set the maximum packet size for the control endpoints endpoint_add(EP0IN, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); endpoint_add(EP0OUT, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); + // Map interrupts to USBEpIntSt + enableEndpointEvent(EP0IN); + enableEndpointEvent(EP0OUT); + // Attach IRQ instance = this; NVIC_SetVector(USB_IRQn, (uint32_t)&_usbisr); @@ -413,6 +429,7 @@ void USBPhyHw::deinit() // Disable USB interrupts NVIC_DisableIRQ(USB_IRQn); events = NULL; + opStarted = 0; } bool USBPhyHw::powered() @@ -422,8 +439,9 @@ bool USBPhyHw::powered() void USBPhyHw::connect(void) { - enableEndpointEvent(EP0IN); - enableEndpointEvent(EP0OUT); + // Enable control endpoints + SIEsetEndpointStatus(EP0IN, 0); + SIEsetEndpointStatus(EP0OUT, 0); // Connect USB device SIEconnect(); @@ -431,8 +449,9 @@ void USBPhyHw::connect(void) void USBPhyHw::disconnect(void) { - disableEndpointEvent(EP0IN); - disableEndpointEvent(EP0OUT); + // Disable control endpoints + SIEsetEndpointStatus(EP0IN, SIE_SES_DA); + SIEsetEndpointStatus(EP0OUT, SIE_SES_DA); if (LPC_USB->USBEpIntSt & EP(EP0IN)) { selectEndpointClearInterrupt(EP0IN); @@ -512,9 +531,9 @@ void USBPhyHw::ep0_stall(void) bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) { + opStarted |= EP(endpoint); read_buffers[endpoint] = data; read_sizes[endpoint] = size; - enableEndpointEvent(endpoint); uint8_t status = SIEselectEndpoint(endpoint); if (status & ((1 << 5) | (1 << 6))) { // If any buffer has data then set the interrupt flag @@ -525,13 +544,7 @@ bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) { - - //for isochronous endpoint, we don't wait an interrupt - if ((DESC_TO_PHY(endpoint) >> 1) % 3 || (DESC_TO_PHY(endpoint) >> 1) == 0) { - if (!(epComplete & EP(endpoint))) { - return 0; - } - } + opStarted &= ~EP(endpoint); uint32_t bytesRead = endpointReadcore(endpoint, read_buffers[endpoint], read_sizes[endpoint]); read_buffers[endpoint] = NULL; @@ -543,13 +556,12 @@ uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) SIEclearBuffer(); } - epComplete &= ~EP(endpoint); return bytesRead; } bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) { - epComplete &= ~EP(endpoint); + opStarted |= EP(endpoint); endpointWritecore(endpoint, data, size); return true; @@ -557,7 +569,13 @@ bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) void USBPhyHw::endpoint_abort(usb_ep_t endpoint) { - //TODO - needs to be implemented + opStarted &= ~EP(endpoint); + + // Clear out transfer buffers since the transfer has been aborted + if (OUT_EP(endpoint)) { + read_buffers[endpoint] = NULL; + read_sizes[endpoint] = 0; + } } bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t maxPacket, usb_ep_type_t type) @@ -571,9 +589,12 @@ bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t maxPacket, usb_ep_type_t while (!(LPC_USB->USBDevIntSt & EP_RLZED)); LPC_USB->USBDevIntClr = EP_RLZED; - if (IN_EP(endpoint)) { - enableEndpointEvent(endpoint); - } + // Map interrupts to USBEpIntSt + enableEndpointEvent(endpoint); + + // Enable this endpoint + SIEsetEndpointStatus(endpoint, 0); + return true; } @@ -581,10 +602,15 @@ void USBPhyHw::endpoint_remove(usb_ep_t endpoint) { // Unrealise an endpoint - disableEndpointEvent(endpoint); + opStarted &= ~EP(endpoint); - // reset this endpoint, including data toggle - SIEsetEndpointStatus(endpoint, 0); + // Disable this endpoint + SIEsetEndpointStatus(endpoint, SIE_SES_DA); + + // Clear the given interrupt bit in USBEpIntSt if it is set + if (LPC_USB->USBEpIntSt & EP(endpoint)) { + selectEndpointClearInterrupt(endpoint); + } LPC_USB->USBDevIntClr = EP_RLZED; LPC_USB->USBReEp &= ~EP(endpoint); @@ -731,12 +757,12 @@ void USBPhyHw::process(void) uint8_t endpoint = PHY_TO_DESC(num); if (LPC_USB->USBEpIntSt & EP(endpoint)) { selectEndpointClearInterrupt(endpoint); - epComplete |= EP(endpoint); - if (IN_EP(endpoint)) { - events->in(endpoint); - } else { - disableEndpointEvent(endpoint); - events->out(endpoint); + if (opStarted & EP(endpoint)) { + if (IN_EP(endpoint)) { + events->in(endpoint); + } else { + events->out(endpoint); + } } } } From 392cbf81974f2790fad7ded356d8275a4911d01f Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 28 Mar 2018 19:30:53 +0200 Subject: [PATCH 200/488] Update the STM32 USB driver to the new API Take the code from mbed-os\features\unsupported\USBDevice\targets\TARGET_STM as a starting point and use it to fill in the USBPhy template for STM32 devices. --- targets/targets.json | 3 +- .../targets/TARGET_STM/USBEndpoints_STM32.h | 65 +++ usb/device/targets/TARGET_STM/USBPhyHw.h | 102 ++++ .../targets/TARGET_STM/USBPhy_STM32.cpp | 522 ++++++++++++++++++ 4 files changed, 691 insertions(+), 1 deletion(-) create mode 100644 usb/device/targets/TARGET_STM/USBEndpoints_STM32.h create mode 100644 usb/device/targets/TARGET_STM/USBPhyHw.h create mode 100644 usb/device/targets/TARGET_STM/USBPhy_STM32.cpp diff --git a/targets/targets.json b/targets/targets.json index 4f23455be29..476f4ebb742 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -2163,7 +2163,8 @@ "SERIAL_ASYNCH", "SERIAL_FC", "FLASH", - "MPU" + "MPU", + "USBDEVICE" ], "device_has_remove": ["LPTICKER"], "release_versions": ["2", "5"], diff --git a/usb/device/targets/TARGET_STM/USBEndpoints_STM32.h b/usb/device/targets/TARGET_STM/USBEndpoints_STM32.h new file mode 100644 index 00000000000..a8723b2ae73 --- /dev/null +++ b/usb/device/targets/TARGET_STM/USBEndpoints_STM32.h @@ -0,0 +1,65 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#define NUMBER_OF_LOGICAL_ENDPOINTS (4) +#define NUMBER_OF_PHYSICAL_ENDPOINTS (NUMBER_OF_LOGICAL_ENDPOINTS * 2) + +/* Define physical endpoint numbers */ + +/* Endpoint No. Type(s) MaxPacket DoubleBuffer */ +/* ---------------- ------------ ---------- --- */ +#define EP0OUT (0x00) /* Control 64 No */ +#define EP0IN (0x80) /* Control 64 No */ +#define EP1OUT (0x01) /* Int/Bulk/Iso 64/64/1023 Yes */ +#define EP1IN (0x81) /* Int/Bulk/Iso 64/64/1023 Yes */ +#define EP2OUT (0x02) /* Int/Bulk/Iso 64/64/1023 Yes */ +#define EP2IN (0x82) /* Int/Bulk/Iso 64/64/1023 Yes */ +#define EP3OUT (0x03) /* Int/Bulk/Iso 64/64/1023 Yes */ +#define EP3IN (0x83) /* Int/Bulk/Iso 64/64/1023 Yes */ + +/* Maximum Packet sizes */ +#define MAX_PACKET_SIZE_SETUP (48) +#define MAX_PACKET_SIZE_EP0 (64) +#define MAX_PACKET_SIZE_EP1 (64) /* Int/Bulk */ +#define MAX_PACKET_SIZE_EP2 (64) /* Int/Bulk */ +#define MAX_PACKET_SIZE_EP3 (200) /* Int/Bulk/iso (44100 stereo 16 bits) */ + +#define MAX_PACKET_SIZE_EP1_ISO (1023) /* Isochronous */ +#define MAX_PACKET_SIZE_EP2_ISO (1023) /* Isochronous */ +#define MAX_PACKET_SIZE_EP3_ISO (1023) /* Isochronous */ + +/* Generic endpoints - intended to be portable accross devices */ +/* and be suitable for simple USB devices. */ + +/* Bulk endpoint */ +#define EPBULK_OUT (EP2OUT) +#define EPBULK_IN (EP2IN) +#define EPBULK_OUT_callback EP2_OUT_callback +#define EPBULK_IN_callback EP2_IN_callback +/* Interrupt endpoint */ +#define EPINT_OUT (EP1OUT) +#define EPINT_IN (EP1IN) +#define EPINT_OUT_callback EP1_OUT_callback +#define EPINT_IN_callback EP1_IN_callback +/* Isochronous endpoint */ +#define EPISO_OUT (EP3OUT) +#define EPISO_IN (EP3IN) +#define EPISO_OUT_callback EP3_OUT_callback +#define EPISO_IN_callback EP3_IN_callback + +#define MAX_PACKET_SIZE_EPBULK (MAX_PACKET_SIZE_EP2) +#define MAX_PACKET_SIZE_EPINT (MAX_PACKET_SIZE_EP1) +#define MAX_PACKET_SIZE_EPISO (MAX_PACKET_SIZE_EP3_ISO) diff --git a/usb/device/targets/TARGET_STM/USBPhyHw.h b/usb/device/targets/TARGET_STM/USBPhyHw.h new file mode 100644 index 00000000000..b117339c84b --- /dev/null +++ b/usb/device/targets/TARGET_STM/USBPhyHw.h @@ -0,0 +1,102 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBPHYHW_H +#define USBPHYHW_H + +#include "mbed.h" +#include "USBPhy.h" + +#if defined(TARGET_DISCO_F746NG) +#if (MBED_CONF_TARGET_USB_SPEED == 1) // Defined in json configuration file +#define TARGET_DISCO_F746NG_OTG_HS +#else +#define TARGET_DISCO_F746NG_OTG_FS +#endif +#endif + +#if defined(TARGET_DISCO_F429ZI) || \ + defined(TARGET_DISCO_F769NI) || \ + defined(TARGET_DISCO_F746NG_OTG_HS) +#define USBHAL_IRQn OTG_HS_IRQn +#else +#define USBHAL_IRQn OTG_FS_IRQn +#endif + +#include "USBEndpoints_STM32.h" + +#define NB_ENDPOINT 4 // Must be a multiple of 4 bytes + +#define MAXTRANSFER_SIZE 0x200 + +#define FIFO_USB_RAM_SIZE (MAXTRANSFER_SIZE + MAX_PACKET_SIZE_EP0 + MAX_PACKET_SIZE_EP1 + MAX_PACKET_SIZE_EP2 + MAX_PACKET_SIZE_EP3) + +#if (FIFO_USB_RAM_SIZE > 0x500) +#error "FIFO dimensioning incorrect" +#endif + +class USBPhyHw : public USBPhy { +public: + USBPhyHw(); + virtual ~USBPhyHw(); + virtual void init(USBPhyEvents *events); + virtual void deinit(); + virtual bool powered(); + virtual void connect(); + virtual void disconnect(); + virtual void configure(); + virtual void unconfigure(); + virtual void sof_enable(); + virtual void sof_disable(); + virtual void set_address(uint8_t address); + virtual void remote_wakeup(); + virtual const usb_ep_table_t* endpoint_table(); + + virtual uint32_t ep0_set_max_packet(uint32_t max_packet); + virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_read(uint8_t *data, uint32_t size); + virtual uint32_t ep0_read_result(); + virtual void ep0_write(uint8_t *buffer, uint32_t size); + virtual void ep0_stall(); + + virtual bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type); + virtual void endpoint_remove(usb_ep_t endpoint); + virtual void endpoint_stall(usb_ep_t endpoint); + virtual void endpoint_unstall(usb_ep_t endpoint); + + virtual bool endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual uint32_t endpoint_read_result(usb_ep_t endpoint); + virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual void endpoint_abort(usb_ep_t endpoint); + + virtual void process(); + + USBPhyEvents *events; + bool sof_enabled; + + uint8_t epComplete[2 * NB_ENDPOINT]; + uint32_t pBufRx[MAXTRANSFER_SIZE >> 2]; + uint32_t pBufRx0[MAX_PACKET_SIZE_EP0 >> 2]; + PCD_HandleTypeDef hpcd; + +private: + uint32_t _read_size[16]; + uint8_t *_read_buf[16]; + + static void _usbisr(void); +}; + +#endif diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp new file mode 100644 index 00000000000..09c98047264 --- /dev/null +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -0,0 +1,522 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* TARGET NOT STM does not support this HAL */ +#ifndef TARGET_STM +#define USBSTM_HAL_UNSUPPORTED +#endif + +/* STM32F4 family without USB_STM_HAL use another HAL */ +#if defined(TARGET_STM) && defined(TARGET_STM32F4) && !defined(USB_STM_HAL) +#define USBSTM_HAL_UNSUPPORTED +#endif + +#ifndef USBSTM_HAL_UNSUPPORTED +#include "USBPhyHw.h" +#include "pinmap.h" + + +/* endpoint conversion macros */ +#define EP_TO_LOG(ep) ((ep) & 0x7F) +#define EP_TO_IDX(ep) (((ep) << 1) | ((ep) & 0x80 ? 1 : 0)) +#define LOG_IN_TO_EP(ep) ((ep) | 0x80) +#define LOG_OUT_TO_EP(ep) ((ep) | 0x00) +#define IDX_TO_EP(ep) (((ep) >> 1)|((ep) & 1) << 7) + +uint32_t HAL_PCDEx_GetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo) +{ + uint32_t len; + if (fifo == 0) { + len = hpcd->Instance->DIEPTXF0_HNPTXFSIZ >> 16; + } + else { + len = hpcd->Instance->DIEPTXF[fifo - 1] >> 16; + } + return len * 4; +} + +void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) +{ + USBPhyHw *priv=((USBPhyHw *)(hpcd->pData)); + USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; + if (priv->sof_enabled) { + priv->events->sof((USBx_DEVICE->DSTS & USB_OTG_DSTS_FNSOF) >> 8); + } +} + +/* this call at device reception completion on a Out Enpoint */ +void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +{ + USBPhyHw *priv=((USBPhyHw *)(hpcd->pData)); + uint8_t endpoint = LOG_OUT_TO_EP(epnum); + priv->epComplete[EP_TO_IDX(endpoint)] = 1; + /* -2 endpoint 0 In out are not in call back list */ + if (epnum) { + priv->events->out(endpoint); + } else { + priv->events->ep0_out(); + } +} + +/* this is call at device transmission completion on In endpoint */ +void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +{ + USBPhyHw *priv=((USBPhyHw *)(hpcd->pData)); + uint8_t endpoint = LOG_IN_TO_EP(epnum); + priv->epComplete[EP_TO_IDX(endpoint)] = 1; + /* -2 endpoint 0 In out are not in call back list */ + if (epnum) { + priv->events->in(endpoint); + } else { + priv->events->ep0_in(); + } +} +/* This is call at device set up reception */ +void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) +{ + USBPhyHw *priv=((USBPhyHw *)(hpcd->pData)); + priv->events->ep0_setup(); +} + +void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) +{ + USBPhyHw *priv=((USBPhyHw *)(hpcd->pData)); + priv->events->suspend(1); +} + +void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) +{ + USBPhyHw *priv=((USBPhyHw *)(hpcd->pData)); + priv->events->suspend(0); +} + +void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd) +{ + // Nothing to do +} + +void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd) +{ + // Nothing to do +} + +void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) +{ + USBPhyHw *obj=((USBPhyHw *)(hpcd->pData)); + unsigned int i; + for(i=0;iInit.dev_endpoints;i++) { + obj->epComplete[2*i]=0; + HAL_PCD_EP_Close(hpcd,IDX_TO_EP(2*i)); + HAL_PCD_EP_Flush(hpcd,IDX_TO_EP(2*i)); + obj->epComplete[2*i+1]=0; + HAL_PCD_EP_Close(hpcd,IDX_TO_EP(2*i+1)); + HAL_PCD_EP_Flush(hpcd,IDX_TO_EP(2*i+1)); + + } + obj->endpoint_add(EP0IN, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); + obj->endpoint_add(EP0OUT, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); + obj->events->reset(); +} + + +/* hal pcd handler , used for STM32 HAL PCD Layer */ + +static USBPhyHw *instance; + +USBPhy *get_usb_phy() +{ + static USBPhyHw usbphy; + return &usbphy; +} + +USBPhyHw::USBPhyHw(): events(NULL), sof_enabled(false) +{ + +} + +USBPhyHw::~USBPhyHw() +{ + +} + +void USBPhyHw::init(USBPhyEvents *events) +{ + NVIC_DisableIRQ(USBHAL_IRQn); + + this->events = events; + sof_enabled = false; + memset(epComplete, 0, sizeof(epComplete)); + memset(pBufRx, 0, sizeof(pBufRx)); + memset(pBufRx0, 0, sizeof(pBufRx0)); + memset(&hpcd.Init, 0, sizeof(hpcd.Init)); + memset(_read_size, 0, sizeof(_read_size)); + memset(_read_buf, 0, sizeof(_read_buf)); + +#if defined(TARGET_DISCO_F769NI) || \ + defined(TARGET_DISCO_F746NG_OTG_HS) + hpcd.Instance = USB_OTG_HS; + hpcd.Init.phy_itface = PCD_PHY_ULPI; + hpcd.Init.Sof_enable = 1; + hpcd.Init.speed = PCD_SPEED_HIGH; +#elif defined(TARGET_DISCO_F429ZI) + hpcd.Instance = USB_OTG_HS; + hpcd.Init.phy_itface = PCD_PHY_EMBEDDED; + hpcd.Init.Sof_enable = 1; + hpcd.Init.speed = PCD_SPEED_HIGH; +#else + hpcd.Instance = USB_OTG_FS; + hpcd.Init.phy_itface = PCD_PHY_EMBEDDED; + hpcd.Init.Sof_enable = 1; + hpcd.Init.speed = PCD_SPEED_FULL; +#endif + hpcd.Init.dev_endpoints = NB_ENDPOINT; + hpcd.Init.ep0_mps = MAX_PACKET_SIZE_EP0; + + // Pass instance for usage inside call back + instance = this; + + // Configure USB pins and other clocks + +#if defined(TARGET_NUCLEO_F207ZG) || \ + defined(TARGET_NUCLEO_F401RE) || \ + defined(TARGET_NUCLEO_F411RE) || \ + defined(TARGET_NUCLEO_F412ZG) || \ + defined(TARGET_NUCLEO_F413ZH) || \ + defined(TARGET_NUCLEO_F429ZI) || \ + defined(TARGET_NUCLEO_F446RE) || \ + defined(TARGET_NUCLEO_F446ZE) || \ + defined(TARGET_NUCLEO_F767ZI) || \ + defined(TARGET_NUCLEO_F746ZG) || \ + defined(TARGET_DISCO_F407VG) || \ + defined(TARGET_DISCO_F413ZH) || \ + defined(TARGET_DISCO_F469NI) || \ + defined(TARGET_DISCO_F746NG_OTG_FS) + __HAL_RCC_GPIOA_CLK_ENABLE(); + pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DM + pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DP + pin_function(PA_9, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // VBUS + pin_function(PA_10, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)); // ID + pin_function(PA_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // SOF + __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); + +#elif defined(TARGET_DISCO_F429ZI) + __HAL_RCC_GPIOB_CLK_ENABLE(); + pin_function(PB_14, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_OTG_HS_FS)); // DM + pin_function(PB_15, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_OTG_HS_FS)); // DP + pin_function(PB_13, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); // VBUS + __HAL_RCC_USB_OTG_HS_CLK_ENABLE(); + +#elif defined(TARGET_DISCO_L475VG_IOT01A) || \ + defined(TARGET_DISCO_L476VG) + __HAL_RCC_GPIOA_CLK_ENABLE(); + pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DM + pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DP + __HAL_RCC_GPIOC_CLK_ENABLE(); + pin_function(PC_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // VBUS + __HAL_RCC_PWR_CLK_ENABLE(); + HAL_PWREx_EnableVddUSB(); + __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); + +#elif defined(TARGET_DISCO_F769NI) || \ + defined(TARGET_DISCO_F746NG_OTG_HS) + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); + __HAL_RCC_GPIOI_CLK_ENABLE(); + pin_function(PA_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // CLK + pin_function(PA_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D0 + pin_function(PB_0, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D1 + pin_function(PB_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D2 + pin_function(PB_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D3 + pin_function(PB_10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D4 + pin_function(PB_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D5 + pin_function(PB_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D6 + pin_function(PB_13, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D7 + pin_function(PC_0, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // STP + pin_function(PH_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // NXT +#if defined(TARGET_DISCO_F769NI) + pin_function(PI_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // DIR +#else // TARGET_DISCO_F746NG + pin_function(PC_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // DIR +#endif + __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE(); + __HAL_RCC_USB_OTG_HS_CLK_ENABLE(); + +#elif defined(TARGET_STEVAL_3DP001V1) + __HAL_RCC_GPIOB_CLK_ENABLE(); + pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DM + pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DP + __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); + +#else +#error "USB pins are not configured !" +#endif + + __HAL_RCC_SYSCFG_CLK_ENABLE(); + + // Configure PCD and FIFOs + hpcd.pData = (void*)this; + hpcd.State = HAL_PCD_STATE_RESET; + HAL_PCD_Init(&hpcd); + + /* 1.25 kbytes */ + /* min value 16 (= 16 x 4 bytes) */ + /* max value 256 (= 1K bytes ) */ + /* maximum sum is 0x140 */ + HAL_PCDEx_SetRxFiFo(&hpcd, (MAXTRANSFER_SIZE / 4)); + + // Configure interrupt vector + NVIC_SetVector(USBHAL_IRQn, (uint32_t)&_usbisr); + NVIC_SetPriority(USBHAL_IRQn, 1); + NVIC_EnableIRQ(USBHAL_IRQn); +} + +void USBPhyHw::deinit() +{ + HAL_PCD_DeInit(&hpcd); + NVIC_DisableIRQ(USBHAL_IRQn); +} + +bool USBPhyHw::powered() +{ + return true; +} + +void USBPhyHw::connect() +{ + HAL_PCD_Start(&hpcd); +} + +void USBPhyHw::disconnect() +{ + HAL_PCD_Stop(&hpcd); +} + +void USBPhyHw::configure() +{ + // Not needed +} + +void USBPhyHw::unconfigure() +{ + // Not needed +} + +void USBPhyHw::sof_enable() +{ + sof_enabled = true; +} + +void USBPhyHw::sof_disable() +{ + sof_enabled = false; +} + +void USBPhyHw::set_address(uint8_t address) +{ + HAL_PCD_SetAddress(&hpcd, address); + ep0_write(NULL, 0); +} + +void USBPhyHw::remote_wakeup() +{ + +} + +const usb_ep_table_t *USBPhyHw::endpoint_table() +{ + static const usb_ep_table_t table = { + 1280, // 1.25K for endpoint buffers + { + {USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 80}, + {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4} + } + }; + return &table; +} + +uint32_t USBPhyHw::ep0_set_max_packet(uint32_t max_packet) +{ + // FUTURE - set endpoint 0 size and return this size + return MAX_PACKET_SIZE_EP0; +} + +// read setup packet +void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) +{ + if (size > MAX_PACKET_SIZE_SETUP) { + size = MAX_PACKET_SIZE_SETUP; + } + memcpy(buffer, hpcd.Setup, size); + memset(hpcd.Setup,0,MAX_PACKET_SIZE_SETUP); +} + +void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) +{ + _read_buf[0] = data; + _read_size[0] = size; + + uint8_t *pBuf = (uint8_t *)pBufRx0; + HAL_StatusTypeDef ret; + epComplete[EP_TO_IDX(EP0OUT)] = 2; + ret = HAL_PCD_EP_Receive(&hpcd, EP0OUT, pBuf, MAX_PACKET_SIZE_EP0 ); + MBED_ASSERT(ret!=HAL_BUSY); +} + +uint32_t USBPhyHw::ep0_read_result() +{ + uint32_t length = (uint32_t) HAL_PCD_EP_GetRxCount(&hpcd, 0); + epComplete[EP_TO_IDX(EP0OUT)] = 0; + if (length) { + uint8_t *buff = (uint8_t *)pBufRx0; + memcpy(_read_buf[0], buff, _read_size[0] > length ? length : _read_size[0]); + } + _read_buf[0] = 0; + _read_size[0] = 0; + return length; +} + +void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) +{ + /* check that endpoint maximum size is not exceeding TX fifo */ + MBED_ASSERT(hpcd.IN_ep[0].maxpacket >= size); + endpoint_write(EP0IN, buffer, size); +} + +void USBPhyHw::ep0_stall() +{ + endpoint_stall(EP0IN); + endpoint_stall(EP0OUT); +} + +bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type) +{ + uint32_t len; + if (max_packet > MAXTRANSFER_SIZE) return false; + if (endpoint & 0x80) { + HAL_PCDEx_SetTxFiFo(&hpcd, endpoint & 0x7f, (max_packet / 4) + 1); + len = HAL_PCDEx_GetTxFiFo(&hpcd,endpoint & 0x7f); + MBED_ASSERT(len >= max_packet); + } + HAL_StatusTypeDef ret = HAL_PCD_EP_Open(&hpcd, endpoint, max_packet, type); + MBED_ASSERT(ret!=HAL_BUSY); + return (ret == HAL_OK) ? true:false; +} + +void USBPhyHw::endpoint_remove(usb_ep_t endpoint) +{ + HAL_StatusTypeDef ret = HAL_PCD_EP_Close(&hpcd, endpoint); + MBED_ASSERT(ret == HAL_OK); +} + +void USBPhyHw::endpoint_stall(usb_ep_t endpoint) +{ + HAL_StatusTypeDef ret; + ret = HAL_PCD_EP_SetStall(&hpcd, endpoint); + MBED_ASSERT(ret!=HAL_BUSY); +} + +void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) +{ + HAL_StatusTypeDef ret; + ret = HAL_PCD_EP_ClrStall(&hpcd, endpoint); + MBED_ASSERT(ret!=HAL_BUSY); +} + +bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ + _read_buf[EP_TO_LOG(endpoint)] = data; + _read_size[EP_TO_LOG(endpoint)] = size; + + uint8_t* pBuf = (uint8_t *)pBufRx; //TODO - this buffer shouldn't be shared for multiple endpoints + HAL_StatusTypeDef ret; + // clean reception end flag before requesting reception + ret = HAL_PCD_EP_Receive(&hpcd, endpoint, pBuf, size); + MBED_ASSERT(ret!=HAL_BUSY); + return true; +} + +uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) +{ + uint8_t *buffer =_read_buf[EP_TO_LOG(endpoint)]; + uint8_t max_size = _read_size[EP_TO_LOG(endpoint)]; + + if (epComplete[EP_TO_IDX(endpoint)]==0) { + /* no reception possible !!! */ + return 0; + } else if ((epComplete[EP_TO_IDX(endpoint)]!=1)) { + return 0; + } + uint8_t *buff = (uint8_t *)pBufRx; + uint32_t length = (uint32_t) HAL_PCD_EP_GetRxCount(&hpcd, endpoint); + memcpy(buffer, buff, length > max_size ? max_size : length); + epComplete[EP_TO_IDX(endpoint)]= 0; + return length; +} + +bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ + HAL_StatusTypeDef ret; + // clean transmission end flag before requesting transmission + epComplete[EP_TO_IDX(endpoint)] = 2; + ret = HAL_PCD_EP_Transmit(&hpcd, endpoint, data, size); + MBED_ASSERT(ret!=HAL_BUSY); + // update the status + if (ret != HAL_OK) return false; + // fix me return is too simple + return true; +} + +void USBPhyHw::endpoint_abort(usb_ep_t endpoint) +{ + // TODO - stop the current transfer on this endpoint and don't call the IN or OUT callback +} + +void USBPhyHw::process() +{ + HAL_PCD_IRQHandler(&instance->hpcd); + // Re-enable interrupt + NVIC_ClearPendingIRQ(USBHAL_IRQn); + NVIC_EnableIRQ(USBHAL_IRQn); +} + +void USBPhyHw::_usbisr(void) { + NVIC_DisableIRQ(USBHAL_IRQn); + instance->events->start_process(); +} + +//TODO - remove this hack which allows HAL_Delay to work when interrupts are disabled +extern "C" uint32_t HAL_GetTick() +{ + return ticker_read_us(get_us_ticker_data()) / 1000; +} + +#endif From d28edc6409ee2362acbe46890bdef244b35b5f00 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 24 Apr 2018 21:40:55 -0500 Subject: [PATCH 201/488] Remove ep0_write from set_address The USBDevice stack automatically sends control endpoint status so this does not and should not be done from the call to set_address. --- usb/device/targets/TARGET_STM/USBPhy_STM32.cpp | 1 - 1 file changed, 1 deletion(-) diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 09c98047264..1e2a506b12b 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -329,7 +329,6 @@ void USBPhyHw::sof_disable() void USBPhyHw::set_address(uint8_t address) { HAL_PCD_SetAddress(&hpcd, address); - ep0_write(NULL, 0); } void USBPhyHw::remote_wakeup() From ffd8c9cf2c2ebb5cc9f09c9bd764fdc657f7b431 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 3 May 2018 11:12:15 -0500 Subject: [PATCH 202/488] Remove unnecessary USB receive buffer Remove receive buffer from USBPhy_STM32 and instead passed buffers in directly. --- usb/device/targets/TARGET_STM/USBPhyHw.h | 4 --- .../targets/TARGET_STM/USBPhy_STM32.cpp | 34 +++---------------- 2 files changed, 4 insertions(+), 34 deletions(-) diff --git a/usb/device/targets/TARGET_STM/USBPhyHw.h b/usb/device/targets/TARGET_STM/USBPhyHw.h index b117339c84b..68c3ccb876d 100644 --- a/usb/device/targets/TARGET_STM/USBPhyHw.h +++ b/usb/device/targets/TARGET_STM/USBPhyHw.h @@ -88,13 +88,9 @@ class USBPhyHw : public USBPhy { bool sof_enabled; uint8_t epComplete[2 * NB_ENDPOINT]; - uint32_t pBufRx[MAXTRANSFER_SIZE >> 2]; - uint32_t pBufRx0[MAX_PACKET_SIZE_EP0 >> 2]; PCD_HandleTypeDef hpcd; private: - uint32_t _read_size[16]; - uint8_t *_read_buf[16]; static void _usbisr(void); }; diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 1e2a506b12b..4a9c0b09b87 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -159,11 +159,7 @@ void USBPhyHw::init(USBPhyEvents *events) this->events = events; sof_enabled = false; memset(epComplete, 0, sizeof(epComplete)); - memset(pBufRx, 0, sizeof(pBufRx)); - memset(pBufRx0, 0, sizeof(pBufRx0)); memset(&hpcd.Init, 0, sizeof(hpcd.Init)); - memset(_read_size, 0, sizeof(_read_size)); - memset(_read_buf, 0, sizeof(_read_buf)); #if defined(TARGET_DISCO_F769NI) || \ defined(TARGET_DISCO_F746NG_OTG_HS) @@ -380,27 +376,16 @@ void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) { - _read_buf[0] = data; - _read_size[0] = size; - - uint8_t *pBuf = (uint8_t *)pBufRx0; HAL_StatusTypeDef ret; epComplete[EP_TO_IDX(EP0OUT)] = 2; - ret = HAL_PCD_EP_Receive(&hpcd, EP0OUT, pBuf, MAX_PACKET_SIZE_EP0 ); + ret = HAL_PCD_EP_Receive(&hpcd, EP0OUT, data, size > MAX_PACKET_SIZE_EP0 ? MAX_PACKET_SIZE_EP0 : size); MBED_ASSERT(ret!=HAL_BUSY); } uint32_t USBPhyHw::ep0_read_result() { - uint32_t length = (uint32_t) HAL_PCD_EP_GetRxCount(&hpcd, 0); epComplete[EP_TO_IDX(EP0OUT)] = 0; - if (length) { - uint8_t *buff = (uint8_t *)pBufRx0; - memcpy(_read_buf[0], buff, _read_size[0] > length ? length : _read_size[0]); - } - _read_buf[0] = 0; - _read_size[0] = 0; - return length; + return HAL_PCD_EP_GetRxCount(&hpcd, 0); } void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) @@ -452,33 +437,22 @@ void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) { - _read_buf[EP_TO_LOG(endpoint)] = data; - _read_size[EP_TO_LOG(endpoint)] = size; - - uint8_t* pBuf = (uint8_t *)pBufRx; //TODO - this buffer shouldn't be shared for multiple endpoints - HAL_StatusTypeDef ret; // clean reception end flag before requesting reception - ret = HAL_PCD_EP_Receive(&hpcd, endpoint, pBuf, size); + HAL_StatusTypeDef ret = HAL_PCD_EP_Receive(&hpcd, endpoint, data, size); MBED_ASSERT(ret!=HAL_BUSY); return true; } uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) { - uint8_t *buffer =_read_buf[EP_TO_LOG(endpoint)]; - uint8_t max_size = _read_size[EP_TO_LOG(endpoint)]; - if (epComplete[EP_TO_IDX(endpoint)]==0) { /* no reception possible !!! */ return 0; } else if ((epComplete[EP_TO_IDX(endpoint)]!=1)) { return 0; } - uint8_t *buff = (uint8_t *)pBufRx; - uint32_t length = (uint32_t) HAL_PCD_EP_GetRxCount(&hpcd, endpoint); - memcpy(buffer, buff, length > max_size ? max_size : length); epComplete[EP_TO_IDX(endpoint)]= 0; - return length; + return HAL_PCD_EP_GetRxCount(&hpcd, endpoint);; } bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) From 6abcab120487483b2a4b9f003838e6cf9775fcf0 Mon Sep 17 00:00:00 2001 From: Michel Jaouen Date: Wed, 25 Apr 2018 18:08:44 +0200 Subject: [PATCH 203/488] Create HAL_PCD_EP_Abort --- .../TARGET_STM32F2/device/stm32f2xx_hal_pcd.c | 22 ++++++++ .../TARGET_STM32F2/device/stm32f2xx_hal_pcd.h | 1 + .../TARGET_STM32F2/device/stm32f2xx_ll_usb.c | 55 +++++++++++++++++++ .../TARGET_STM32F2/device/stm32f2xx_ll_usb.h | 1 + .../targets/TARGET_STM/USBPhy_STM32.cpp | 4 ++ 5 files changed, 83 insertions(+) diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c index ee1703bbd10..8d1915a88dc 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c @@ -1042,6 +1042,28 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); return HAL_OK; } +/** + * @brief Abort a transaction. + * @param hpcd: PCD handle + * @param ep_addr: endpoint address + * @param pBuf: pointer to the transmission buffer + * @param len: amount of data to be sent + * @retval HAL status + */ +HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) +{ + HAL_StatusTypeDef ret; + USB_OTG_EPTypeDef *ep; + + ep = &hpcd->IN_ep[ep_addr & 0x7F]; + + /*setup and start the Xfer */ + __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); + ret = USB_EPStopXfer(hpcd->Instance , ep, hpcd->Init.dma_enable); + + __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); + return ret; +} /** * @brief Set a STALL condition over an endpoint. diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h index f617e6d8de6..610c8456e95 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h @@ -271,6 +271,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); +HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c index b4799572c43..02b936b5925 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c @@ -745,6 +745,61 @@ HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeD } return HAL_OK; } +/** + * @brief USB_EPStoptXfer : setup and starts a transfer over an EP + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @param dma: USB dma enabled or disabled + * This parameter can be one of these values: + * 0 : DMA feature not used + * 1 : DMA feature used + * @retval HAL status + */ +HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma) +{ + HAL_StatusTypeDef ret = HAL_OK; + /* IN endpoint */ + if (ep->is_in == 1U) + { + + /* EP enable, IN data in FIFO */ + if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) + { + volatile uint32_t loop=0; + USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_EPDIS); + while(((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) + {/* data sheet say that EPDISD: Endpoint disabled interrupt must be raised + to consider the endpoint as disable */ + /* fix me loop for test only */ + loop++; + if (loop > 10000L) { + ret =HAL_ERROR; + break; + } + } + } + } + else /* OUT endpoint */ + { + if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) + { + volatile uint32_t loop=0; + USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_EPDIS); + while(((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) + {/* data sheet say that EPDISD: Endpoint disabled interrupt must be raised + to consider the endpoint as disable */ + /* Fix me loop for test only */ + loop++; + if (loop > 10000L) { + ret =HAL_ERROR; + break; + } + } + } + } + return ret; +} + /** * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h index ebbb5987613..ac6cc496df3 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h @@ -404,6 +404,7 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EP HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); +HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma); void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len); diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 4a9c0b09b87..472b2021f51 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -471,6 +471,10 @@ bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) void USBPhyHw::endpoint_abort(usb_ep_t endpoint) { // TODO - stop the current transfer on this endpoint and don't call the IN or OUT callback + HAL_StatusTypeDef ret; + ret = HAL_PCD_EP_Abort(&hpcd, endpoint); + MBED_ASSERT(ret!=HAL_OK); + return; } void USBPhyHw::process() From ec93df2d2483225e0d7c1c2a36ced0d7439d9b13 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 3 May 2018 18:07:02 -0500 Subject: [PATCH 204/488] Fix return code check in endpoint abort Assert that HAL_PCD_EP_Abort returns HAL_OK rather that something else. --- usb/device/targets/TARGET_STM/USBPhy_STM32.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 472b2021f51..e8ab482f750 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -473,7 +473,7 @@ void USBPhyHw::endpoint_abort(usb_ep_t endpoint) // TODO - stop the current transfer on this endpoint and don't call the IN or OUT callback HAL_StatusTypeDef ret; ret = HAL_PCD_EP_Abort(&hpcd, endpoint); - MBED_ASSERT(ret!=HAL_OK); + MBED_ASSERT(ret==HAL_OK); return; } From a46d83a4070f1fadb54dfd41bd50b891e7f1ea78 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 3 May 2018 18:10:34 -0500 Subject: [PATCH 205/488] Only build in USBPhy_STM32 for supported devices Define USBSTM_HAL_UNSUPPORTED if DEVICE_USBDEVICE is undefined or defined to 0. --- usb/device/targets/TARGET_STM/USBPhy_STM32.cpp | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index e8ab482f750..91facb63698 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -14,6 +14,11 @@ * limitations under the License. */ +/* This target doesn't support USB */ +#if !defined(DEVICE_USBDEVICE) || !DEVICE_USBDEVICE +#define USBSTM_HAL_UNSUPPORTED +#endif + /* TARGET NOT STM does not support this HAL */ #ifndef TARGET_STM #define USBSTM_HAL_UNSUPPORTED From 5a952b35a19b61bf66b82c380a48a73563503912 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 8 Jun 2018 10:53:16 -0500 Subject: [PATCH 206/488] Fix USB on Kinetis devices Set correct SYSMPU register for proper USB operation. This bug was introduced when the SYSMPU register names and defines were updated in the commit: "K64F: Updated the SYSMPU SDK driver" 93f8cfed058174b2de468353c173c0d7b9335ea4 --- usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp index c8a55e1a667..8c277cc10e9 100644 --- a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp +++ b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp @@ -125,6 +125,10 @@ void USBPhyHw::init(USBPhyEvents *events) MPU->CESR=0; #endif +#if (defined(FSL_FEATURE_SOC_SYSMPU_COUNT) && (FSL_FEATURE_SOC_SYSMPU_COUNT > 0U)) + SYSMPU->CESR=0; +#endif + #if defined(TARGET_KL43Z) || defined(TARGET_K22F) || defined(TARGET_K64F) // enable USBFS clock CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcIrc48M, 48000000U); From 8b897315bab8fef16cbbc9d60417aa0235301701 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 6 Jun 2018 11:02:02 -0500 Subject: [PATCH 207/488] Fix isochronous endpoints on LPC1768 Perform isochronous endpoint processing from the frame interrupt rather than the endpoint interrupt. Isochronous endpoints to not generate interrupts normally and are intended to be handled from the start of frame interrupt. --- .../targets/TARGET_NXP/USBHAL_LPC17.cpp | 36 +++++++++++++++++-- 1 file changed, 34 insertions(+), 2 deletions(-) diff --git a/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp b/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp index 58c264a5e4a..6cfc629a51a 100644 --- a/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp +++ b/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp @@ -29,6 +29,9 @@ // Convert physical endpoint number to register bit #define EP(endpoint) (1UL<>1)|(((endpoint)&1)?0x80:0)) @@ -122,6 +125,13 @@ static USBPhyHw *instance; static uint32_t opStarted; +static const usb_ep_t ISO_EPS[] = { + 0x03, 0x83, + 0x06, 0x86, + 0x09, 0x89, + 0x0C, 0x8C +}; + static void SIECommand(uint32_t command) { // The command phase of a SIE transaction @@ -465,6 +475,9 @@ void USBPhyHw::disconnect(void) // Disconnect USB device SIEdisconnect(); + + // Reset all started operations + opStarted = 0; } void USBPhyHw::configure(void) @@ -551,7 +564,7 @@ uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) read_sizes[endpoint] = 0; // Don't clear isochronous endpoints - if ((DESC_TO_PHY(endpoint) >> 1) % 3 || (DESC_TO_PHY(endpoint) >> 1) == 0) { + if (!ISO_EP(endpoint)) { SIEselectEndpoint(endpoint); SIEclearBuffer(); } @@ -692,6 +705,20 @@ void USBPhyHw::process(void) events->sof(SIEgetFrameNumber()); // Clear interrupt status flag LPC_USB->USBDevIntClr = FRAME; + + // There is no ISO interrupt, instead a packet is transferred every SOF + for (uint32_t i = 0; i < sizeof(ISO_EPS) / sizeof(ISO_EPS[0]); i++) { + uint8_t endpoint = ISO_EPS[i]; + if (opStarted & EP(endpoint)) { + opStarted &= ~EP(endpoint); + if (IN_EP(endpoint)) { + events->in(endpoint); + } else { + events->out(endpoint); + } + } + } + } if (LPC_USB->USBDevIntSt & DEV_STAT) { @@ -717,6 +744,7 @@ void USBPhyHw::process(void) } memset(read_buffers, 0, sizeof(read_buffers)); memset(read_sizes, 0, sizeof(read_sizes)); + opStarted = 0; events->reset(); } } @@ -752,12 +780,16 @@ void USBPhyHw::process(void) } } - //TODO - should probably process in the reverse order for (uint8_t num = 2; num < 16 * 2; num++) { uint8_t endpoint = PHY_TO_DESC(num); if (LPC_USB->USBEpIntSt & EP(endpoint)) { selectEndpointClearInterrupt(endpoint); + if (ISO_EP(endpoint)) { + // Processing for ISO endpoints done in FRAME handling + continue; + } if (opStarted & EP(endpoint)) { + opStarted &= ~EP(endpoint); if (IN_EP(endpoint)) { events->in(endpoint); } else { From c969fd21336dcf960ca8010b5f0d6fb3c1ad3499 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 13 Jun 2018 20:25:41 -0500 Subject: [PATCH 208/488] Fix Kinetis bug causing USB to get stuck sending If an IN endpoint is stalled during a transfer by writing to the USB ENDPOINT register then the data being sent will repeat and flood the USB bus. This patch prevents the register write from occurring by instead writing to the buffer descriptor in RAM and letting the USB hardware handle setting the stall bit. Note - Control requests on endpoint 0 do still set the STALL bit directly. This is not a problem since control endpoints cannot be stalled externally while a transfer is ongoing. --- .../targets/TARGET_Freescale/USBPhy_Kinetis.cpp | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp index 8c277cc10e9..763fa9cc139 100644 --- a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp +++ b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp @@ -411,11 +411,23 @@ void USBPhyHw::endpoint_remove(usb_ep_t endpoint) void USBPhyHw::endpoint_stall(usb_ep_t endpoint) { - USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK; + if (DESC_TO_LOG(endpoint) == 0) { + USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK; + } else { + uint8_t dir = DESC_EP_IN(endpoint) ? TX : RX; + uint32_t idx = EP_BDT_IDX(DESC_TO_LOG(endpoint), dir, 0); + bdt[idx].info |= BD_OWN_MASK | BD_STALL_MASK; + } } void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) { + + if (DESC_TO_LOG(endpoint) != 0) { + uint8_t dir = DESC_EP_IN(endpoint) ? TX : RX; + uint32_t idx = EP_BDT_IDX(DESC_TO_LOG(endpoint), dir, 0); + bdt[idx].info &= ~(BD_OWN_MASK | BD_STALL_MASK); + } USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; } From f4de4ab9f1c99609690c52cd782a9bb55eeb9089 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 4 Jun 2018 11:40:26 -0500 Subject: [PATCH 209/488] Add circular byte buffer using dynamic memory Add the ByteBuffer class which is similar to the CircularBuffer class but uses dynamic memory rather than template parameters and is optimized for byte transfers. This is required for USBAudio which needs a high performance circular buffer which can be resized at runtime. --- usb/device/utilities/ByteBuffer.cpp | 151 ++++++++++++++++++++++++++++ usb/device/utilities/ByteBuffer.h | 119 ++++++++++++++++++++++ 2 files changed, 270 insertions(+) create mode 100644 usb/device/utilities/ByteBuffer.cpp create mode 100644 usb/device/utilities/ByteBuffer.h diff --git a/usb/device/utilities/ByteBuffer.cpp b/usb/device/utilities/ByteBuffer.cpp new file mode 100644 index 00000000000..e45b8b4a826 --- /dev/null +++ b/usb/device/utilities/ByteBuffer.cpp @@ -0,0 +1,151 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "ByteBuffer.h" +#include "mbed_assert.h" +#include + +ByteBuffer::ByteBuffer(uint32_t size): _head(0), _tail(0), _size(0), _buf(NULL) +{ + resize(_size); +} + +ByteBuffer::~ByteBuffer() +{ + delete[] _buf; + _buf = 0; +} + +void ByteBuffer::resize(uint32_t size) +{ + delete[] _buf; + _head = 0; + _tail = 0; + _size = size + 1; + _buf = new uint8_t[_size](); +} + +void ByteBuffer::push(uint8_t data) +{ + _buf[_tail] = data; + _tail++; + if (_tail >= _size) { + _tail -= _size; + } + // Overflow not allowed + MBED_ASSERT(_head != _tail); +} + +void ByteBuffer::write(uint8_t *data, uint32_t size) +{ + MBED_ASSERT(size <= free()); + + if (size == 0) { + return; + } + + uint32_t new_tail = _tail + size; + if (new_tail >= _size) { + new_tail -= _size; + } + + // Perform first memcpy + uint32_t until_end = _size - _tail; + uint32_t copy_size = until_end < size ? until_end : size; + memcpy(_buf + _tail, data, copy_size); + data += copy_size; + size -= copy_size; + + // Perform second memcpy + if (size > 0) { + memcpy(_buf, data, size); + } + + // Update tail + _tail = new_tail; +} + +uint8_t ByteBuffer::pop() +{ + // Underflow not allowed + MBED_ASSERT(_head != _tail); + uint8_t val = _buf[_head]; + _head++; + if (_head >= _size) { + _head -= _size; + } + return val; +} + +void ByteBuffer::read(uint8_t *data, uint32_t size) +{ + MBED_ASSERT(size <= ByteBuffer::size()); + + if (size == 0) { + return; + } + + uint32_t new_head = _head + size; + if (new_head >= _size) { + new_head -= _size; + } + + // Perform first memcpy + uint32_t until_end = _size - _head; + uint32_t copy_size = until_end < size ? until_end : size; + memcpy(data, _buf + _head, copy_size); + data += copy_size; + size -= copy_size; + + // Perform second memcpy + if (size > 0) { + memcpy(data, _buf, size); + } + + // Update head + _head = new_head; +} + +uint32_t ByteBuffer::size() +{ + uint32_t size; + if (_tail < _head) { + size = _size + _tail - _head; + } else { + size = _tail - _head; + } + return size; +} + +uint32_t ByteBuffer::free() +{ + return _size - size() - 1; +} + +bool ByteBuffer::full() +{ + uint32_t next = _tail + 1; + if (next >= _size) { + next -= _size; + } + return next == _head; +} + +bool ByteBuffer::empty() +{ + return _head == _tail; +} + diff --git a/usb/device/utilities/ByteBuffer.h b/usb/device/utilities/ByteBuffer.h new file mode 100644 index 00000000000..8e9d40f40b2 --- /dev/null +++ b/usb/device/utilities/ByteBuffer.h @@ -0,0 +1,119 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef BYTE_BUFFER_H +#define BYTE_BUFFER_H + +#include + +class ByteBuffer { +public: + + /** + * Create a byte buffer of the given size + * + * @param size Number of bytes this buffer can hold + */ + ByteBuffer(uint32_t size=0); + + /** + * Delete this byte buffer + */ + ~ByteBuffer(); + + /** + * Set the size of the buffer + * + * Buffer contents are reset. + * + * @param size New buffer size + */ + void resize(uint32_t size); + + /** + * Add a single byte to this buffer + * + * There must be enough space in the buffer or the behavior is undefined. + * + * @param data byte to add + */ + void push(uint8_t data); + + /** + * Write a block of data to this ByteBuffer + * + * There must be enough space in the ByteBuffer or the behavior is undefined. + * + * @param data Block of data to write + * @param size Size of data to write + */ + void write(uint8_t *data, uint32_t size); + + /** + * Remove a byte from this buffer + * + * @return data byte + */ + uint8_t pop(); + + /** + * Read a block of data from this ByteBuffer into a buffer pointed by 'data' + * + * There must be enough data in the ByteBuffer or the behavior is undefined. + * + * @param data Block of data to read + * @param size Size of data to read + */ + void read(uint8_t *data, uint32_t size); + + /** + * Return the number bytes in this byte buffer + * + * @return Number of used bytes + */ + uint32_t size(); + + /** + * Return the number of additional bytes this buffer can hold + * + * @return Number of free bytes + */ + uint32_t free(); + + /** + * Check if this byte buffer is full + * + * @return true if full, false otherwise + */ + bool full(); + + /** + * Check if this byte buffer is empty + * + * @return true if empty, false otherwise + */ + bool empty(); + +private: + + uint32_t _head; + uint32_t _tail; + uint32_t _size; + uint8_t *_buf; +}; + + +#endif From 6dde62d43781c4bb374ee41cadf67fb714490b90 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 3 May 2018 20:39:44 -0500 Subject: [PATCH 210/488] Update USBAudio Update the USBAudio class to use the new USB API. This patch also adds buffering and blocking functionality so it can be used in practice from thread context. --- usb/device/USBAudio/USBAudio.cpp | 1002 ++++++++++++++++++++++++++ usb/device/USBAudio/USBAudio.h | 375 ++++++++++ usb/device/USBAudio/USBAudio_Types.h | 95 +++ 3 files changed, 1472 insertions(+) create mode 100644 usb/device/USBAudio/USBAudio.cpp create mode 100644 usb/device/USBAudio/USBAudio.h create mode 100644 usb/device/USBAudio/USBAudio_Types.h diff --git a/usb/device/USBAudio/USBAudio.cpp b/usb/device/USBAudio/USBAudio.cpp new file mode 100644 index 00000000000..dfd04ced263 --- /dev/null +++ b/usb/device/USBAudio/USBAudio.cpp @@ -0,0 +1,1002 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBAudio.h" +#include "USBAudio_Types.h" +#include "EndpointResolver.h" +#include "usb_phy_api.h" + +#define SAMPLE_SIZE 2 +#define XFER_FREQUENCY_HZ 1000 +#define WRITE_READY_UNBLOCK (1 << 0) +#define READ_READY_UNBLOCK (1 << 1) + +class USBAudio::AsyncWrite: public AsyncOp { +public: + AsyncWrite(USBAudio *audio, uint8_t *buf, uint32_t size): + audio(audio), tx_buf(buf), tx_size(size), result(false) + { + + } + + virtual ~AsyncWrite() + { + + } + + virtual bool process() + { + if (audio->_tx_state != Opened) { + result = false; + return true; + } + + uint32_t actual_size = 0; + audio->write_nb(tx_buf, tx_size, &actual_size); + tx_size -= actual_size; + tx_buf += actual_size; + if (tx_size == 0) { + result = true; + return true; + } + + return false; + } + + USBAudio *audio; + uint8_t *tx_buf; + uint32_t tx_size; + bool result; +}; + +class USBAudio::AsyncRead: public AsyncOp { +public: + AsyncRead(USBAudio *audio, uint8_t *buf, uint32_t size, uint32_t *size_read, bool read_all) + : audio(audio), rx_buf(buf), rx_size(size), rx_actual(size_read), all(read_all), result(false) + { + + } + + virtual ~AsyncRead() + { + + } + + virtual bool process() + { + if (audio->_rx_state != Opened) { + result = false; + return true; + } + + uint32_t actual_size = 0; + audio->read_nb(rx_buf, rx_size, &actual_size); + rx_buf += actual_size; + *rx_actual += actual_size; + rx_size -= actual_size; + if ((!all && *rx_actual > 0) || (rx_size == 0)) { + // Wake thread if request is done + result = true; + return true; + } + + return false; + } + + USBAudio *audio; + uint8_t *rx_buf; + uint32_t rx_size; + uint32_t *rx_actual; + bool all; + bool result; +}; + +static void stub_volume() +{ + +} + +static void stub_handler(USBAudio::AudioEvent event) +{ + (void)event; +} + +USBAudio::USBAudio(bool connect, uint32_t frequency_rx, uint8_t channel_count_rx, uint32_t frequency_tx, uint8_t channel_count_tx, uint32_t buffer_ms, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBDevice(get_usb_phy(), vendor_id, product_id, product_release) +{ + _init(frequency_rx, channel_count_rx, frequency_tx, channel_count_tx, buffer_ms); + + // connect or init device + if (connect) { + USBDevice::connect(); + } else { + USBDevice::init(); + } +} + +USBAudio::USBAudio(USBPhy *phy, uint32_t frequency_rx, uint8_t channel_count_rx, uint32_t frequency_tx, uint8_t channel_count_tx, uint32_t buffer_ms, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBDevice(phy, vendor_id, product_id, product_release) +{ + _init(frequency_rx, channel_count_rx, frequency_tx, channel_count_tx, buffer_ms); +} + +void USBAudio::_init(uint32_t frequency_rx, uint8_t channel_count_rx, uint32_t frequency_tx, uint8_t channel_count_tx, uint32_t buffer_ms) +{ + _connected = false; + + _volume = 0; + _mute = 0; + _vol_cur = 0x0080; + _vol_min = 0x0000; + _vol_max = 0x0100; + _vol_res = 0x0004; + + _update_vol = callback(stub_volume); + _tx_done = callback(stub_handler); + _rx_done = callback(stub_handler); + + _rx_overflow = 0; + _tx_underflow = 0; + + _tx_freq = frequency_tx; + _rx_freq = frequency_rx; + + _tx_channel_count = channel_count_tx; + _rx_channel_count = channel_count_rx; + + _tx_idle = true; + _tx_frame_fract = 0; + _tx_whole_frames_per_xfer = _tx_freq / XFER_FREQUENCY_HZ; + _tx_fract_frames_per_xfer = _tx_freq % XFER_FREQUENCY_HZ; + + uint32_t max_frames = _tx_whole_frames_per_xfer + (_tx_fract_frames_per_xfer ? 1 : 0); + _tx_packet_size_max = max_frames * SAMPLE_SIZE * _tx_channel_count; + _rx_packet_size_max = (_rx_freq + 1000 - 1) / 1000 * _rx_channel_count * 2; + + _tx_packet_buf = new uint8_t[_tx_packet_size_max](); + _rx_packet_buf = new uint8_t[_rx_packet_size_max](); + + _tx_queue.resize(buffer_ms * _tx_channel_count * SAMPLE_SIZE * _tx_freq / XFER_FREQUENCY_HZ); + _rx_queue.resize(buffer_ms * _rx_channel_count * SAMPLE_SIZE * _rx_freq / XFER_FREQUENCY_HZ); + + _tx_state = Closed; + _rx_state = Closed; + + EndpointResolver resolver(endpoint_table()); + resolver.endpoint_ctrl(64); + _episo_out = resolver.endpoint_out(USB_EP_TYPE_ISO, _tx_packet_size_max); + _episo_in = resolver.endpoint_in(USB_EP_TYPE_ISO, _rx_packet_size_max); + MBED_ASSERT(resolver.valid()); + + _channel_config_rx = (_rx_channel_count == 1) ? CHANNEL_M : CHANNEL_L + CHANNEL_R; + _channel_config_tx = (_tx_channel_count == 1) ? CHANNEL_M : CHANNEL_L + CHANNEL_R; + + _build_configuration_desc(); +} + +USBAudio::~USBAudio() +{ + disconnect(); + deinit(); + + delete[] _tx_packet_buf; + delete[] _rx_packet_buf; +} + +void USBAudio::connect() +{ + lock(); + + if (!_connected) { + USBDevice::connect(); + _connected = true; + _receive_change(Closed); + _send_change(Closed); + } + + unlock(); +} + +void USBAudio::disconnect() +{ + lock(); + + if (_connected) { + _connected = false; + USBDevice::disconnect(); + _receive_change(Powerdown); + _send_change(Powerdown); + } + + unlock(); +} + +bool USBAudio::read(uint8_t *buf, uint32_t size) +{ + lock(); + + uint32_t actual; + AsyncRead read(this, buf, size, &actual, true); + _read_list.add(&read); + + unlock(); + + read.wait(NULL); + return read.result; +} + +void USBAudio::read_nb(uint8_t *buf, uint32_t size, uint32_t *actual) +{ + + lock(); + + uint32_t available = _rx_queue.size(); + uint32_t copy_size = available > size ? size : available; + _rx_queue.read(buf, copy_size); + *actual = copy_size; + + unlock(); +} + +uint32_t USBAudio::read_overflows(bool clear) +{ + lock(); + + uint32_t overflows = _rx_overflow; + if (clear) { + _rx_overflow = 0; + } + + unlock(); + return overflows; +} + + +bool USBAudio::read_ready() +{ + lock(); + + bool ready = _rx_state == Opened; + + unlock(); + + return ready; +} + +void USBAudio::read_wait_ready() +{ + _flags.wait_any(READ_READY_UNBLOCK, osWaitForever, false); +} + +bool USBAudio::write(uint8_t *buf, uint32_t size) +{ + lock(); + + AsyncWrite write(this, buf, size); + _write_list.add(&write); + + unlock(); + + write.wait(NULL); + return write.result; +} + +void USBAudio::write_nb(uint8_t *buf, uint32_t size, uint32_t *actual) +{ + lock(); + + uint32_t available = _tx_queue.free(); + uint32_t copy_size = available > size ? size : available; + _tx_queue.write(buf, copy_size); + *actual = copy_size; + _send_isr_start(); + + unlock(); +} + +uint32_t USBAudio::write_underflows(bool clear) +{ + lock(); + + uint32_t underflows = _tx_underflow; + if (clear) { + _tx_underflow = 0; + } + + unlock(); + return underflows; +} + +bool USBAudio::write_ready() +{ + lock(); + + bool ready = _tx_state == Opened; + + unlock(); + + return ready; +} + +void USBAudio::write_wait_ready() +{ + _flags.wait_any(WRITE_READY_UNBLOCK, osWaitForever, false); +} + + +float USBAudio::get_volume() +{ + lock(); + + float ret = _mute ? 0.0 : _volume; + + unlock(); + return ret; +} + +void USBAudio::attach(Callback &cb) +{ + lock(); + + _update_vol = cb; + if (!_update_vol) { + _update_vol = stub_volume; + } + + unlock(); +} + +void USBAudio::attach_tx(Callback &cb) +{ + lock(); + + _tx_done = cb; + if (!_tx_done) { + _tx_done = callback(stub_handler); + } + + unlock(); +} + +void USBAudio::attach_rx(Callback &cb) +{ + lock(); + + _rx_done = cb; + if (!_rx_done) { + _rx_done = callback(stub_handler); + } + + unlock(); +} + +void USBAudio::callback_state_change(DeviceState new_state) +{ + assert_locked(); + + if (_connected && (new_state != Configured)) { + _receive_change(Closed); + _send_change(Closed); + } +} + +void USBAudio::callback_request(const setup_packet_t *setup) +{ + assert_locked(); + + RequestResult result = PassThrough; + uint8_t *data = NULL; + uint32_t size = 0; + + // Process class-specific requests + if (setup->bmRequestType.Type == CLASS_TYPE) { + + // Feature Unit: Interface = 0, ID = 2 + if (setup->wIndex == 0x0200) { + + // Master Channel + if ((setup->wValue & 0xff) == 0) { + + switch (setup->wValue >> 8) { + case MUTE_CONTROL: + switch (setup->bRequest) { + case REQUEST_GET_CUR: + size = 1; + data = &_mute; + result = Send; + break; + + case REQUEST_SET_CUR: + size = 1; + data = _control_receive; + result = Receive; + break; + default: + break; + } + break; + case VOLUME_CONTROL: + switch (setup->bRequest) { + case REQUEST_GET_CUR: + size = 2; + data = (uint8_t *)&_vol_cur; + result = Send; + break; + case REQUEST_GET_MIN: + size = 2; + data = (uint8_t *)&_vol_min; + result = Send; + break; + case REQUEST_GET_MAX: + size = 2; + data = (uint8_t *)&_vol_max; + result = Send; + break; + case REQUEST_GET_RES: + size = 2; + data = (uint8_t *)&_vol_res; + result = Send; + break; + + case REQUEST_SET_CUR: + size = 2; + data = _control_receive; + result = Receive; + break; + case REQUEST_SET_MIN: + size = 2; + data = _control_receive; + result = Receive; + break; + case REQUEST_SET_MAX: + size = 2; + data = _control_receive; + result = Receive; + break; + case REQUEST_SET_RES: + size = 2; + data = _control_receive; + result = Receive; + break; + } + break; + default: + break; + } + } + } + } + complete_request(result, data, size); +} + +void USBAudio::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) +{ + assert_locked(); + + if (aborted) { + complete_request_xfer_done(false); + return; + } + + if (setup->bmRequestType.dataTransferDirection == DEVICE_TO_HOST) { + complete_request_xfer_done(true); + return; + } + + if ((setup->wLength == 1) || (setup->wLength == 2)) { + uint16_t data = (_control_receive[0] << 0) | (_control_receive[1] << 8); + data &= ((setup->wLength == 1) ? 0xFF : 0xFFFF); + switch (setup->wValue >> 8) { + case MUTE_CONTROL: + switch (setup->bRequest) { + case REQUEST_SET_CUR: + _mute = data & 0xff; + _update_vol.call(); + break; + default: + break; + } + break; + case VOLUME_CONTROL: + switch (setup->bRequest) { + case REQUEST_SET_CUR: + _vol_cur = data; + _volume = (float)_vol_cur / (float)_vol_max; + _update_vol.call(); + break; + default: + break; + } + break; + default: + break; + } + complete_request_xfer_done(true); + return; + } + + complete_request_xfer_done(false); +} + +void USBAudio::callback_set_configuration(uint8_t configuration) +{ + assert_locked(); + + bool ret = false; + if (configuration == DEFAULT_CONFIGURATION) { + endpoint_remove_all(); + + // Configure isochronous endpoint + endpoint_add(_episo_out, _rx_packet_size_max, USB_EP_TYPE_ISO, static_cast(&USBAudio::_receive_isr)); + endpoint_add(_episo_in, _tx_packet_size_max, USB_EP_TYPE_ISO, static_cast(&USBAudio::_send_isr)); + + // activate readings on this endpoint + read_start(_episo_out, _rx_packet_buf, _rx_packet_size_max); + ret = true; + } + complete_set_configuration(ret); +} + +void USBAudio::callback_set_interface(uint16_t interface, uint8_t alternate) +{ + assert_locked(); + + bool ret = false; + if (interface == 0 && alternate == 0) { + ret = true; + } + if (interface == 1 && (alternate == 0 || alternate == 1)) { + _receive_change(alternate == 1 ? Opened : Closed); + ret = true; + } + if (interface == 2 && (alternate == 0 || alternate == 1)) { + _send_change(alternate == 1 ? Opened : Closed); + ret = true; + } + complete_set_interface(ret); +} + +const uint8_t *USBAudio::configuration_desc(uint8_t index) +{ + if (index != 0) { + return NULL; + } + return _config_descriptor; +} + +const uint8_t *USBAudio::string_iinterface_desc() +{ + static const uint8_t stringIinterfaceDescriptor[] = { + 0x0c, //bLength + STRING_DESCRIPTOR, //bDescriptorType 0x03 + 'A', 0, 'u', 0, 'd', 0, 'i', 0, 'o', 0 //bString iInterface - Audio + }; + return stringIinterfaceDescriptor; +} + +const uint8_t *USBAudio::string_iproduct_desc() +{ + static const uint8_t stringIproductDescriptor[] = { + 0x16, //bLength + STRING_DESCRIPTOR, //bDescriptorType 0x03 + 'M', 0, 'b', 0, 'e', 0, 'd', 0, ' ', 0, 'A', 0, 'u', 0, 'd', 0, 'i', 0, 'o', 0 //bString iProduct - Mbed Audio + }; + return stringIproductDescriptor; +} + +#define TOTAL_DESCRIPTOR_LENGTH ((1 * CONFIGURATION_DESCRIPTOR_LENGTH) \ + + (5 * INTERFACE_DESCRIPTOR_LENGTH) \ + + (1 * CONTROL_INTERFACE_DESCRIPTOR_LENGTH + 1) \ + + (2 * INPUT_TERMINAL_DESCRIPTOR_LENGTH) \ + + (1 * FEATURE_UNIT_DESCRIPTOR_LENGTH) \ + + (2 * OUTPUT_TERMINAL_DESCRIPTOR_LENGTH) \ + + (2 * STREAMING_INTERFACE_DESCRIPTOR_LENGTH) \ + + (2 * FORMAT_TYPE_I_DESCRIPTOR_LENGTH) \ + + (2 * (ENDPOINT_DESCRIPTOR_LENGTH + 2)) \ + + (2 * STREAMING_ENDPOINT_DESCRIPTOR_LENGTH) ) + +#define TOTAL_CONTROL_INTF_LENGTH (CONTROL_INTERFACE_DESCRIPTOR_LENGTH + 1 + \ + 2*INPUT_TERMINAL_DESCRIPTOR_LENGTH + \ + FEATURE_UNIT_DESCRIPTOR_LENGTH + \ + 2*OUTPUT_TERMINAL_DESCRIPTOR_LENGTH) + +void USBAudio::_build_configuration_desc() +{ + uint8_t config_descriptor_temp[] = { + // Configuration 1 + CONFIGURATION_DESCRIPTOR_LENGTH, // bLength + CONFIGURATION_DESCRIPTOR, // bDescriptorType + LSB(TOTAL_DESCRIPTOR_LENGTH), // wTotalLength (LSB) + MSB(TOTAL_DESCRIPTOR_LENGTH), // wTotalLength (MSB) + 0x03, // bNumInterfaces + DEFAULT_CONFIGURATION, // bConfigurationValue + 0x00, // iConfiguration + 0x80, // bmAttributes + 50, // bMaxPower + + // Interface 0, Alternate Setting 0, Audio Control + INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0x00, // bInterfaceNumber + 0x00, // bAlternateSetting + 0x00, // bNumEndpoints + AUDIO_CLASS, // bInterfaceClass + SUBCLASS_AUDIOCONTROL, // bInterfaceSubClass + 0x00, // bInterfaceProtocol + 0x00, // iInterface + + + // Audio Control Interface + CONTROL_INTERFACE_DESCRIPTOR_LENGTH + 1,// bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + CONTROL_HEADER, // bDescriptorSubtype + LSB(0x0100), // bcdADC (LSB) + MSB(0x0100), // bcdADC (MSB) + LSB(TOTAL_CONTROL_INTF_LENGTH), // wTotalLength + MSB(TOTAL_CONTROL_INTF_LENGTH), // wTotalLength + 0x02, // bInCollection + 0x01, // baInterfaceNr + 0x02, // baInterfaceNr + + // Audio Input Terminal (Speaker) + INPUT_TERMINAL_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + CONTROL_INPUT_TERMINAL, // bDescriptorSubtype + 0x01, // bTerminalID + LSB(TERMINAL_USB_STREAMING), // wTerminalType + MSB(TERMINAL_USB_STREAMING), // wTerminalType + 0x00, // bAssocTerminal + _rx_channel_count, // bNrChannels + (uint8_t)(LSB(_channel_config_rx)), // wChannelConfig + (uint8_t)(MSB(_channel_config_rx)), // wChannelConfig + 0x00, // iChannelNames + 0x00, // iTerminal + + // Audio Feature Unit (Speaker) + FEATURE_UNIT_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + CONTROL_FEATURE_UNIT, // bDescriptorSubtype + 0x02, // bUnitID + 0x01, // bSourceID + 0x01, // bControlSize + CONTROL_MUTE | + CONTROL_VOLUME, // bmaControls(0) + 0x00, // bmaControls(1) + 0x00, // iTerminal + + // Audio Output Terminal (Speaker) + OUTPUT_TERMINAL_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + CONTROL_OUTPUT_TERMINAL, // bDescriptorSubtype + 0x03, // bTerminalID + LSB(TERMINAL_SPEAKER), // wTerminalType + MSB(TERMINAL_SPEAKER), // wTerminalType + 0x00, // bAssocTerminal + 0x02, // bSourceID + 0x00, // iTerminal + + + // Audio Input Terminal (Microphone) + INPUT_TERMINAL_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + CONTROL_INPUT_TERMINAL, // bDescriptorSubtype + 0x04, // bTerminalID + LSB(TERMINAL_MICROPHONE), // wTerminalType + MSB(TERMINAL_MICROPHONE), // wTerminalType + 0x00, // bAssocTerminal + _tx_channel_count, // bNrChannels + (uint8_t)(LSB(_channel_config_tx)), // wChannelConfig + (uint8_t)(MSB(_channel_config_tx)), // wChannelConfig + 0x00, // iChannelNames + 0x00, // iTerminal + + // Audio Output Terminal (Microphone) + OUTPUT_TERMINAL_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + CONTROL_OUTPUT_TERMINAL, // bDescriptorSubtype + 0x05, // bTerminalID + LSB(TERMINAL_USB_STREAMING), // wTerminalType + MSB(TERMINAL_USB_STREAMING), // wTerminalType + 0x00, // bAssocTerminal + 0x04, // bSourceID + 0x00, // iTerminal + + + + + + + // Interface 1, Alternate Setting 0, Audio Streaming - Zero Bandwith + INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0x01, // bInterfaceNumber + 0x00, // bAlternateSetting + 0x00, // bNumEndpoints + AUDIO_CLASS, // bInterfaceClass + SUBCLASS_AUDIOSTREAMING, // bInterfaceSubClass + 0x00, // bInterfaceProtocol + 0x00, // iInterface + + // Interface 1, Alternate Setting 1, Audio Streaming - Operational + INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0x01, // bInterfaceNumber + 0x01, // bAlternateSetting + 0x01, // bNumEndpoints + AUDIO_CLASS, // bInterfaceClass + SUBCLASS_AUDIOSTREAMING, // bInterfaceSubClass + 0x00, // bInterfaceProtocol + 0x00, // iInterface + + // Audio Streaming Interface + STREAMING_INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + STREAMING_GENERAL, // bDescriptorSubtype + 0x01, // bTerminalLink + 0x00, // bDelay + LSB(FORMAT_PCM), // wFormatTag + MSB(FORMAT_PCM), // wFormatTag + + // Audio Type I Format + FORMAT_TYPE_I_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + STREAMING_FORMAT_TYPE, // bDescriptorSubtype + FORMAT_TYPE_I, // bFormatType + _rx_channel_count, // bNrChannels + 0x02, // bSubFrameSize + 16, // bBitResolution + 0x01, // bSamFreqType + (uint8_t)(LSB(_rx_freq)), // tSamFreq + (uint8_t)((_rx_freq >> 8) & 0xff), // tSamFreq + (uint8_t)((_rx_freq >> 16) & 0xff), // tSamFreq + + // Endpoint - Standard Descriptor + ENDPOINT_DESCRIPTOR_LENGTH + 2, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _episo_out, // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t)(LSB(_rx_packet_size_max)), // wMaxPacketSize + (uint8_t)(MSB(_rx_packet_size_max)), // wMaxPacketSize + 0x01, // bInterval + 0x00, // bRefresh + 0x00, // bSynchAddress + + // Endpoint - Audio Streaming + STREAMING_ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR_TYPE, // bDescriptorType + ENDPOINT_GENERAL, // bDescriptor + 0x00, // bmAttributes + 0x00, // bLockDelayUnits + LSB(0x0000), // wLockDelay + MSB(0x0000), // wLockDelay + + + // Interface 1, Alternate Setting 0, Audio Streaming - Zero Bandwith + INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0x02, // bInterfaceNumber + 0x00, // bAlternateSetting + 0x00, // bNumEndpoints + AUDIO_CLASS, // bInterfaceClass + SUBCLASS_AUDIOSTREAMING, // bInterfaceSubClass + 0x00, // bInterfaceProtocol + 0x00, // iInterface + + // Interface 1, Alternate Setting 1, Audio Streaming - Operational + INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0x02, // bInterfaceNumber + 0x01, // bAlternateSetting + 0x01, // bNumEndpoints + AUDIO_CLASS, // bInterfaceClass + SUBCLASS_AUDIOSTREAMING, // bInterfaceSubClass + 0x00, // bInterfaceProtocol + 0x00, // iInterface + + // Audio Streaming Interface + STREAMING_INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + SUBCLASS_AUDIOCONTROL, // bDescriptorSubtype + 0x05, // bTerminalLink (output terminal microphone) + 0x01, // bDelay + 0x01, // wFormatTag + 0x00, // wFormatTag + + // Audio Type I Format + FORMAT_TYPE_I_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + SUBCLASS_AUDIOSTREAMING, // bDescriptorSubtype + FORMAT_TYPE_I, // bFormatType + _tx_channel_count, // bNrChannels + 0x02, // bSubFrameSize + 0x10, // bBitResolution + 0x01, // bSamFreqType + (uint8_t)(LSB(_tx_freq)), // tSamFreq + (uint8_t)((_tx_freq >> 8) & 0xff), // tSamFreq + (uint8_t)((_tx_freq >> 16) & 0xff), // tSamFreq + + // Endpoint - Standard Descriptor + ENDPOINT_DESCRIPTOR_LENGTH + 2, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _episo_in, // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t)(LSB(_tx_packet_size_max)), // wMaxPacketSize + (uint8_t)(MSB(_tx_packet_size_max)), // wMaxPacketSize + 0x01, // bInterval + 0x00, // bRefresh + 0x00, // bSynchAddress + + // Endpoint - Audio Streaming + STREAMING_ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR_TYPE, // bDescriptorType + ENDPOINT_GENERAL, // bDescriptor + 0x00, // bmAttributes + 0x00, // bLockDelayUnits + LSB(0x0000), // wLockDelay + MSB(0x0000), // wLockDelay + }; + + MBED_ASSERT(sizeof(config_descriptor_temp) == sizeof(_config_descriptor)); + memcpy(_config_descriptor, config_descriptor_temp, sizeof(_config_descriptor)); +} + +void USBAudio::_receive_change(ChannelState new_state) +{ + assert_locked(); + + ChannelState prev_state = _rx_state; + _rx_state = new_state; + if (prev_state == new_state) { + // no change + return; + } + + if (prev_state == Opened) { + // Leaving the opened state + _read_list.process(); + _rx_done.call(End); + } + if (new_state == Opened) { + // Entering the opened state + _read_list.process(); + _rx_done.call(Start); + } + if (new_state == Closed) { + // Only block if the channel is closed + _flags.clear(READ_READY_UNBLOCK); + } else { + _flags.set(READ_READY_UNBLOCK); + } +} + +void USBAudio::_receive_isr(usb_ep_t ep) +{ + assert_locked(); + MBED_ASSERT(ep == _episo_out); + + uint32_t size = read_finish(_episo_out); + + if (size > _rx_queue.free()) { + _rx_overflow++; + } else { + + // Copy data over + _rx_queue.write(_rx_packet_buf, size); + + // Signal that there is more data available + _read_list.process(); + if (_rx_done) { + _rx_done.call(Transfer); + } + } + + read_start(_episo_out, _rx_packet_buf, _rx_packet_size_max); +} + +void USBAudio::_send_change(ChannelState new_state) +{ + assert_locked(); + + ChannelState prev_state = _tx_state; + _tx_state = new_state; + if (prev_state == new_state) { + // no change + return; + } + + if (prev_state == Opened) { + // Leaving the opened state + _write_list.process(); + _tx_done.call(End); + } + if (new_state == Opened) { + // Entering the opened state + _write_list.process(); + _tx_done.call(Start); + } + if (new_state == Closed) { + // Only block if the channel is closed + _flags.clear(WRITE_READY_UNBLOCK); + } else { + _flags.set(WRITE_READY_UNBLOCK); + } +} +void USBAudio::_send_isr_start() +{ + assert_locked(); + + if (!_tx_idle) { + return; + } + + _send_isr_next_sync(); +} + +void USBAudio::_send_isr_next_sync() +{ + // Compute size to send + uint32_t fames = _tx_whole_frames_per_xfer; + if (_tx_frame_fract >= XFER_FREQUENCY_HZ) { + _tx_frame_fract -= XFER_FREQUENCY_HZ; + fames += 1; + } + uint32_t send_size = fames * _tx_channel_count * 2; + + // Check if this is the initial TX packet + if (_tx_idle && !_tx_queue.full()) { + // Don't start until the TX buffer is full + return; + } + + // Check if this stream was closed + if (_tx_state != Opened) { + _tx_idle = true; + return; + } + + // Check for enough data to send + if (_tx_queue.size() < send_size) { + _tx_underflow++; + _tx_idle = true; + return; + } + + // Copy data over + _tx_queue.read(_tx_packet_buf, send_size); + + // Start the write + write_start(_episo_in, _tx_packet_buf, send_size); + _tx_idle = false; + _tx_frame_fract += _tx_fract_frames_per_xfer; +} + +void USBAudio::_send_isr(usb_ep_t ep) +{ + assert_locked(); + MBED_ASSERT(ep == _episo_in); + + write_finish(_episo_in); + + _send_isr_next_sync(); + + // Signal that there is space for more data + _write_list.process(); + if (_tx_done) { + _tx_done.call(Transfer); + } +} + diff --git a/usb/device/USBAudio/USBAudio.h b/usb/device/USBAudio/USBAudio.h new file mode 100644 index 00000000000..fec17615f1e --- /dev/null +++ b/usb/device/USBAudio/USBAudio.h @@ -0,0 +1,375 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBAudio_H +#define USBAudio_H + +/* These headers are included for child class. */ +#include "USBDescriptor.h" +#include "USBDevice_Types.h" + +#include "USBDevice.h" +#include "Callback.h" +#include "OperationList.h" +#include "ByteBuffer.h" +#include "rtos/EventFlags.h" + +/** +* USBAudio example +* +* @code +* #include "mbed.h" +* #include "USBAudio.h" +* +* // Audio loopback example use: +* // 1. Select "Mbed Audio" as your sound device +* // 2. Play a song or audio file +* // 3. Record the output using a program such as Audacity +* +* int main() { +* +* USBAudio audio(true, 44100, 2, 44100, 2); +* +* printf("Looping audio\r\n"); +* static uint8_t buf[128]; +* while (true) { +* if (!audio.read(buf, sizeof(buf))) { +* memset(buf, 0, sizeof(buf)); +* } +* audio.write(buf, sizeof(buf)); +* } +* } +* @endcode +*/ +class USBAudio: protected USBDevice { +public: + + enum AudioEvent { + Start, + Transfer, + End + }; + + /** + * Basic constructor + * + * Construct this object optionally connecting. + * + * @note Do not use this constructor in derived classes. + * + * @param connect Call connect on initialization + * @param frequency_rx frequency in Hz (default: 48000) + * @param channel_count_rx channel number (1 or 2) (default: 1) + * @param frequency_tx frequency in Hz (default: 8000) + * @param channel_count_tx channel number (1 or 2) (default: 1) + * @param buffer_ms time audio can be buffered without overflowing in milliseconds + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBAudio(bool connect=true, uint32_t frequency_rx = 48000, uint8_t channel_count_rx = 1, uint32_t frequency_tx = 8000, uint8_t channel_count_tx = 1, uint32_t buffer_ms=10, uint16_t vendor_id = 0x7bb8, uint16_t product_id = 0x1111, uint16_t product_release = 0x0100); + + /** + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. + * + * @param phy USB phy to use + * @param frequency_rx frequency in Hz (default: 48000) + * @param channel_count_rx channel number (1 or 2) (default: 1) + * @param frequency_tx frequency in Hz (default: 8000) + * @param channel_count_tx channel number (1 or 2) (default: 1) + * @param buffer_ms time audio can be buffered without overflowing in milliseconds + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBAudio(USBPhy *phy, uint32_t frequency_rx, uint8_t channel_count_rx, uint32_t frequency_tx, uint8_t channel_count_tx, uint32_t buffer_ms, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ + virtual ~USBAudio(); + + /** + * Connect USBAudio + */ + void connect(); + + /** + * Disconnect USBAudio + * + * This unblocks all calls to read_ready and write_ready. + */ + void disconnect(); + + /** + * Read audio data + * + * @param buf pointer on a buffer which will be filled with audio data + * @param size size to read + * + * @returns true if successful + */ + bool read(uint8_t *buf, uint32_t size); + + /** + * Nonblocking audio data read + * + * Read the available audio data. + * + * @param buf pointer on a buffer which will be filled with audio data + * @param size size to read + * @param actual size actually read + * @note This function is safe to call from USBAudio callbacks. + */ + void read_nb(uint8_t *buf, uint32_t size, uint32_t *actual); + + /** + * Return the number read packets dropped due to overflow + * + * @param clear Reset the overflow count back to 0 + * @return Number of packets dropped due to overflow + */ + uint32_t read_overflows(bool clear=false); + + /** + * Check if the audio read channel is open + * + * @return true if the audio read channel open, false otherwise + */ + bool read_ready(); + + /** + * Wait until the audio read channel is open + */ + void read_wait_ready(); + + /** + * Write audio data + * + * @param buf pointer to audio data to write + * @param size size to write + * + * @returns true if successful + */ + bool write(uint8_t *buf, uint32_t size); + + /** + * Nonblocking audio data write + * + * Write the available audio data. + * + * @param buf pointer to audio data to write + * @param size size to write + * @param actual actual size written + * @note This function is safe to call from USBAudio callbacks. + */ + void write_nb(uint8_t *buf, uint32_t size, uint32_t *actual); + + /** + * Return the number write packets not sent due to underflow + * + * @param clear Reset the underflow count back to 0 + * @return Number of packets that should have been + * sent but weren't due to overflow + */ + uint32_t write_underflows(bool clear=false); + + /** + * Check if the audio write channel is open + * + * @return true if the audio write channel open, false otherwise + */ + bool write_ready(); + + /** + * Wait until the audio write channel is open + */ + void write_wait_ready(); + + /** + * Get current volume between 0.0 and 1.0 + * + * @returns volume + */ + float get_volume(); + + /** Attach a Callback to update the volume + * + * @param cb Callback to attach + * + */ + void attach(Callback &cb); + + /** attach a Callback to Tx Done + * + * @param cb Callback to attach + * + */ + void attach_tx(Callback &cb); + + /** attach a Callback to Rx Done + * + * @param cb Callback to attach + * + */ + void attach_rx(Callback &cb); + +protected: + + virtual void callback_state_change(DeviceState new_state); + virtual void callback_request(const setup_packet_t *setup); + virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); + virtual void callback_set_configuration(uint8_t configuration); + virtual void callback_set_interface(uint16_t interface, uint8_t alternate); + + virtual const uint8_t *string_iproduct_desc(); + virtual const uint8_t *string_iinterface_desc(); + virtual const uint8_t *configuration_desc(uint8_t index); + +private: + + class AsyncWrite; + class AsyncRead; + + enum ChannelState { + Powerdown, + Closed, + Opened + }; + + void _init(uint32_t frequency_rx, uint8_t channel_count_rx, uint32_t frequency_tx, uint8_t channel_count_tx, uint32_t buffer_ms); + + /* + * Call to rebuild the configuration descriptor + * + * This function should be called on creation or when any + * value that is part of the configuration descriptor + * changes. + * @note This function uses ~200 bytes of stack so + * make sure your stack is big enough for it. + */ + void _build_configuration_desc(); + + void _receive_change(ChannelState new_state); + void _receive_isr(usb_ep_t ep); + void _send_change(ChannelState new_state); + void _send_isr_start(); + void _send_isr_next_sync(); + void _send_isr(usb_ep_t ep); + + // has connect been called + bool _connected; + + // audio volume + float _volume; + + // mute state + uint8_t _mute; + + // Volume Current Value + uint16_t _vol_cur; + + // Volume Minimum Value + uint16_t _vol_min; + + // Volume Maximum Value + uint16_t _vol_max; + + // Volume Resolution + uint16_t _vol_res; + + // callback to update volume + Callback _update_vol; + + // callback transmit Done + Callback _tx_done; + + // callback receive Done + Callback _rx_done; + + // Number of times data was dropped due to an overflow + uint32_t _rx_overflow; + + // Number of times data was not sent due to an underflow + uint32_t _tx_underflow; + + // frequency in Hz + uint32_t _tx_freq; + uint32_t _rx_freq; + + // mono, stereo,... + uint8_t _rx_channel_count; + uint8_t _tx_channel_count; + + bool _tx_idle; + uint16_t _tx_frame_fract; + uint16_t _tx_whole_frames_per_xfer; + uint16_t _tx_fract_frames_per_xfer; + + // size of the maximum packet for the isochronous endpoint + uint16_t _tx_packet_size_max; + uint16_t _rx_packet_size_max; + + // Buffer used for the isochronous transfer + uint8_t *_tx_packet_buf; + uint8_t *_rx_packet_buf; + + // Holding buffer + ByteBuffer _tx_queue; + ByteBuffer _rx_queue; + + // State of the audio channels + ChannelState _tx_state; + ChannelState _rx_state; + + + // sample - a single PCM audio sample + // frame - a group of samples from each channel + // packet - a group of frames sent over USB in one transfer + + // Blocking primitives + OperationList _write_list; + OperationList _read_list; + rtos::EventFlags _flags; + + // endpoint numbers + usb_ep_t _episo_out; // rx endpoint + usb_ep_t _episo_in; // tx endpoint + + // channel config in the configuration descriptor: master, left, right + uint8_t _channel_config_rx; + uint8_t _channel_config_tx; + + // configuration descriptor + uint8_t _config_descriptor[183]; + + // buffer for control requests + uint8_t _control_receive[2]; + +}; + +#endif diff --git a/usb/device/USBAudio/USBAudio_Types.h b/usb/device/USBAudio/USBAudio_Types.h new file mode 100644 index 00000000000..bedb0cfe428 --- /dev/null +++ b/usb/device/USBAudio/USBAudio_Types.h @@ -0,0 +1,95 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBAUDIO_TYPES_H +#define USBAUDIO_TYPES_H + + +#define DEFAULT_CONFIGURATION (1) + +// Audio Request Codes +#define REQUEST_SET_CUR 0x01 +#define REQUEST_GET_CUR 0x81 +#define REQUEST_SET_MIN 0x02 +#define REQUEST_GET_MIN 0x82 +#define REQUEST_SET_MAX 0x03 +#define REQUEST_GET_MAX 0x83 +#define REQUEST_SET_RES 0x04 +#define REQUEST_GET_RES 0x84 + +#define MUTE_CONTROL 0x01 +#define VOLUME_CONTROL 0x02 + + +// Audio Descriptor Sizes +#define CONTROL_INTERFACE_DESCRIPTOR_LENGTH 0x09 +#define STREAMING_INTERFACE_DESCRIPTOR_LENGTH 0x07 +#define INPUT_TERMINAL_DESCRIPTOR_LENGTH 0x0C +#define OUTPUT_TERMINAL_DESCRIPTOR_LENGTH 0x09 +#define FEATURE_UNIT_DESCRIPTOR_LENGTH 0x09 +#define STREAMING_ENDPOINT_DESCRIPTOR_LENGTH 0x07 + +// Audio Format Type Descriptor Sizes +#define FORMAT_TYPE_I_DESCRIPTOR_LENGTH 0x0b + +#define AUDIO_CLASS 0x01 +#define SUBCLASS_AUDIOCONTROL 0x01 +#define SUBCLASS_AUDIOSTREAMING 0x02 + +// Audio Descriptor Types +#define INTERFACE_DESCRIPTOR_TYPE 0x24 +#define ENDPOINT_DESCRIPTOR_TYPE 0x25 + +// Audio Control Interface Descriptor Subtypes +#define CONTROL_HEADER 0x01 +#define CONTROL_INPUT_TERMINAL 0x02 +#define CONTROL_OUTPUT_TERMINAL 0x03 +#define CONTROL_FEATURE_UNIT 0x06 + +// USB Terminal Types +#define TERMINAL_USB_STREAMING 0x0101 + +// Predefined Audio Channel Configuration Bits +// Mono +#define CHANNEL_M 0x0000 +#define CHANNEL_L 0x0001 /* Left Front */ +#define CHANNEL_R 0x0002 /* Right Front */ + +// Feature Unit Control Bits +#define CONTROL_MUTE 0x0001 +#define CONTROL_VOLUME 0x0002 + +// Input Terminal Types +#define TERMINAL_MICROPHONE 0x0201 + +// Output Terminal Types +#define TERMINAL_SPEAKER 0x0301 +#define TERMINAL_HEADPHONES 0x0302 + +// Audio Streaming Interface Descriptor Subtypes +#define STREAMING_GENERAL 0x01 +#define STREAMING_FORMAT_TYPE 0x02 + +// Audio Data Format Type I Codes +#define FORMAT_PCM 0x0001 + +// Audio Format Types +#define FORMAT_TYPE_I 0x01 + +// Audio Endpoint Descriptor Subtypes +#define ENDPOINT_GENERAL 0x01 + +#endif From 30eb2ffecc7bf4614f814af2760188601fbfc1b3 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 15 Jun 2018 18:55:00 -0500 Subject: [PATCH 211/488] Fix various USB warnings Fix the following warnings: -[Warning] USBTester.cpp@45,0: #1299-D: members and base-classes will be initialized in declaration order, not in member initialisation list order -[Warning] USBTester.h@41,0: #1300-D: ~USBTester inherits implicit virtual -[Warning] USBAudio.cpp@345,0: #1035-D: single-precision operand implicitly converted to double-precision -[Warning] USBHID.cpp@29,0: #1300-D: ~AsyncSend inherits implicit virtual -[Warning] USBHID.cpp@61,0: #1300-D: ~AsyncRead inherits implicit virtual -[Warning] USBHID.cpp@93,0: #1300-D: ~AsyncWait inherits implicit virtual -[Warning] EndpointResolver.cpp@125,26: '<<' in boolean context, did you mean '<' ? [-Wint-in-bool-context] --- TESTS/usb_device/basic/USBTester.cpp | 5 +++-- TESTS/usb_device/basic/USBTester.h | 2 +- usb/device/USBAudio/USBAudio.cpp | 2 +- usb/device/USBDevice/EndpointResolver.cpp | 2 +- usb/device/USBHID/USBHID.cpp | 6 +++--- 5 files changed, 9 insertions(+), 8 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index fa484115607..4a62b91f0c2 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -41,8 +41,9 @@ USBTester::USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): - USBDevice(phy, vendor_id, product_id, product_release), reset_count(0), suspend_count(0), - resume_count(0), interface_0_alt_set(NONE), interface_1_alt_set(NONE), configuration_set(NONE) + USBDevice(phy, vendor_id, product_id, product_release), interface_0_alt_set(NONE), + interface_1_alt_set(NONE), configuration_set(NONE), reset_count(0), + suspend_count(0), resume_count(0) { EndpointResolver resolver(endpoint_table()); diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index 5cae22ac2b1..1f9349387eb 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -38,7 +38,7 @@ class USBTester: public USBDevice { */ USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); - ~USBTester(); + virtual ~USBTester(); /* * diff --git a/usb/device/USBAudio/USBAudio.cpp b/usb/device/USBAudio/USBAudio.cpp index dfd04ced263..abd899ab45f 100644 --- a/usb/device/USBAudio/USBAudio.cpp +++ b/usb/device/USBAudio/USBAudio.cpp @@ -342,7 +342,7 @@ float USBAudio::get_volume() { lock(); - float ret = _mute ? 0.0 : _volume; + float ret = _mute ? 0.0f : _volume; unlock(); return ret; diff --git a/usb/device/USBDevice/EndpointResolver.cpp b/usb/device/USBDevice/EndpointResolver.cpp index ad45006bb2e..e06b8929600 100644 --- a/usb/device/USBDevice/EndpointResolver.cpp +++ b/usb/device/USBDevice/EndpointResolver.cpp @@ -122,7 +122,7 @@ int EndpointResolver::next_index(usb_ep_type_t type, bool in_not_out) continue; } - if (shared && (1 << other)) { + if (shared && (_used & (1 << other))) { // This endpoint can only be one direction at a time and is in // use by the other direction continue; diff --git a/usb/device/USBHID/USBHID.cpp b/usb/device/USBHID/USBHID.cpp index 8045459f161..14bc74ee06f 100644 --- a/usb/device/USBHID/USBHID.cpp +++ b/usb/device/USBHID/USBHID.cpp @@ -26,7 +26,7 @@ class USBHID::AsyncSend: public AsyncOp { } - ~AsyncSend() + virtual ~AsyncSend() { } @@ -58,7 +58,7 @@ class USBHID::AsyncRead: public AsyncOp { } - ~AsyncRead() + virtual ~AsyncRead() { } @@ -90,7 +90,7 @@ class USBHID::AsyncWait: public AsyncOp { } - ~AsyncWait() + virtual ~AsyncWait() { } From 970dbf5fd6d667680995b4be367fe4e20224013b Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 25 May 2018 11:19:34 -0500 Subject: [PATCH 212/488] Fix unbalanced USBDevice unlock Remove calls to unlock which are not preceded by calls to lock. Also move the location of the unlock underflow assert so unbalanced unlocking during post processing is caught. --- usb/device/USBDevice/USBDevice.cpp | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 3c73170c4b2..600520af4f7 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -331,13 +331,11 @@ void USBDevice::_complete_request_xfer_done() _transfer.user_callback = None; if (_abort_control) { _control_abort(); - unlock(); return; } if (!success) { _phy->ep0_stall(); - unlock(); return; } @@ -405,7 +403,6 @@ void USBDevice::_complete_set_configuration() _transfer.user_callback = None; if (_abort_control) { _control_abort(); - unlock(); return; } @@ -478,7 +475,6 @@ void USBDevice::_complete_set_interface() _transfer.user_callback = None; if (_abort_control) { _control_abort(); - unlock(); return; } @@ -716,7 +712,6 @@ void USBDevice::_complete_request() } else { _control_abort(); } - unlock(); return; } @@ -1563,8 +1558,6 @@ void USBDevice::lock() void USBDevice::unlock() { - MBED_ASSERT(_locked > 0); - if (_locked == 1) { // Perform post processing before fully unlocking while (_post_process != NULL) { @@ -1574,6 +1567,7 @@ void USBDevice::unlock() } } + MBED_ASSERT(_locked > 0); _locked--; core_util_critical_section_exit(); } From c91243dda1e578cd20f5b07fe409f30c59c2b074 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 25 May 2018 12:00:04 -0500 Subject: [PATCH 213/488] Update USBDevice endpoint checks to fix asserts Only assert if disabled endpoints are used when USBDevice is configured. USBDevice can leave the configured state due to a reset at any time, which disables all endpoints. Because this can happen at any time, thread processing could be performing any endpoint operation. The endpoint operation should return failure and do nothing in this case, rather than asserting as this is not an application error. An assert should only be triggered when an invalid endpoint is used after the use of USBDevice acknoledges the switch to configured mode by complete_set_configuration. In specific this PR fixes the assert caused with the following sequence: -ISR: OUT event sent -ISR: USB reset event -ISR: USB configure request start -Thread: OUT event processed on thread and next read starts ***endpoint is used while disabled causing an invalid assert*** -Thread: reset event processed -Thread: configure event processed This patch fixes this problem by making the following changes: 1. Operations done on disabled endpoints only assert when in the configured state 2. Adding and removing endpoints is only allowed when the flag _endpoint_add_remove_allowed is set 3. The flag _endpoint_add_remove_allowed is set on the set configuration request and cleared if the request is aborted or fails --- usb/device/USBDevice/USBDevice.cpp | 85 ++++++++++++++++-------------- usb/device/USBDevice/USBDevice.h | 1 + 2 files changed, 45 insertions(+), 41 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 600520af4f7..c4fc4e17f67 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -376,6 +376,7 @@ bool USBDevice::_request_set_configuration() _phy->unconfigure(); _change_state(Address); } else { + _endpoint_add_remove_allowed = true; _transfer.user_callback = SetConfiguration; callback_set_configuration(_device.configuration); } @@ -399,6 +400,14 @@ void USBDevice::_complete_set_configuration() assert_locked(); bool success = _transfer.args.status; + if ((_abort_control || !success) && !configured()) { + // The set configuration request was aborted or failed so + // reset any endpoints which may have been added. + memset(_endpoint_info, 0, sizeof(_endpoint_info)); + _device.configuration = 0; + _endpoint_add_remove_allowed = false; + } + _transfer.user_callback = None; if (_abort_control) { @@ -1054,6 +1063,11 @@ bool USBDevice::endpoint_add(usb_ep_t endpoint, uint32_t max_packet_size, usb_ep return false; } + if (!_endpoint_add_remove_allowed) { + unlock(); + return false; + } + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; MBED_ASSERT(!(info->flags & ENDPOINT_ENABLED)); MBED_ASSERT(max_packet_size <= 1024); @@ -1080,6 +1094,11 @@ void USBDevice::endpoint_remove(usb_ep_t endpoint) return; } + if (!_endpoint_add_remove_allowed) { + unlock(); + return; + } + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; MBED_ASSERT(info->flags & ENDPOINT_ENABLED); @@ -1122,7 +1141,12 @@ void USBDevice::endpoint_stall(usb_ep_t endpoint) } endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; - MBED_ASSERT(info->flags & ENDPOINT_ENABLED); + if (!(info->flags & ENDPOINT_ENABLED)) { + // Invalid endpoint is being used + MBED_ASSERT(!configured()); + unlock(); + return; + } info->flags |= ENDPOINT_STALLED; _phy->endpoint_stall(endpoint); @@ -1141,7 +1165,12 @@ void USBDevice::endpoint_unstall(usb_ep_t endpoint) } endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; - MBED_ASSERT(info->flags & ENDPOINT_ENABLED); + if (!(info->flags & ENDPOINT_ENABLED)) { + // Invalid endpoint is being used + MBED_ASSERT(!configured()); + unlock(); + return; + } info->flags &= ~ENDPOINT_STALLED; _phy->endpoint_unstall(endpoint); @@ -1232,6 +1261,7 @@ USBDevice::USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint1 _phy = phy; _initialized = false; _connected = false; + _endpoint_add_remove_allowed = false; _current_interface = 0; _current_alternate = 0; _locked = 0; @@ -1275,16 +1305,10 @@ void USBDevice::endpoint_abort(usb_ep_t endpoint) return; } - bool configuring = _transfer.user_callback == SetConfiguration; - if (!configured() && !configuring) { - unlock(); - return; - } - endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; if (!(info->flags & ENDPOINT_ENABLED)) { - // Invalid endpoint is being used - MBED_ASSERT(0); + // Assert that only valid endpoints are used when in the configured state + MBED_ASSERT(!configured()); unlock(); return; } @@ -1307,16 +1331,10 @@ bool USBDevice::read_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size return false; } - bool configuring = _transfer.user_callback == SetConfiguration; - if (!configured() && !configuring) { - unlock(); - return false; - } - endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; if (!(info->flags & ENDPOINT_ENABLED)) { - // Invalid endpoint is being used - MBED_ASSERT(0); + // Assert that only valid endpoints are used when in the configured state + MBED_ASSERT(!configured()); unlock(); return false; } @@ -1353,15 +1371,10 @@ uint32_t USBDevice::read_finish(usb_ep_t endpoint) return 0; } - if (!configured()) { - unlock(); - return 0; - } - endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; if (!(info->flags & ENDPOINT_ENABLED)) { - // Invalid endpoint is being used - MBED_ASSERT(0); + // Assert that only valid endpoints are used when in the configured state + MBED_ASSERT(!configured()); unlock(); return 0; } @@ -1382,16 +1395,10 @@ bool USBDevice::write_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t size) return false; } - bool configuring = _transfer.user_callback == SetConfiguration; - if (!configured() && !configuring) { - unlock(); - return false; - } - endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; if (!(info->flags & ENDPOINT_ENABLED)) { - // Invalid endpoint is being used - MBED_ASSERT(0); + // Assert that only valid endpoints are used when in the configured state + MBED_ASSERT(!configured()); unlock(); return false; } @@ -1431,18 +1438,13 @@ uint32_t USBDevice::write_finish(usb_ep_t endpoint) if (!EP_INDEXABLE(endpoint)) { MBED_ASSERT(0); unlock(); - return false; - } - - if (!configured()) { - unlock(); - return false; + return 0; } endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; if (!(info->flags & ENDPOINT_ENABLED)) { - // Invalid endpoint is being used - MBED_ASSERT(0); + // Assert that only valid endpoints are used when in the configured state + MBED_ASSERT(!configured()); unlock(); return 0; } @@ -1593,6 +1595,7 @@ void USBDevice::_change_state(DeviceState new_state) { if (leaving_configured_state) { memset(_endpoint_info, 0, sizeof(_endpoint_info)); _device.configuration = 0; + _endpoint_add_remove_allowed = false; } if (leaving_default_state) { diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 40051ce9c08..8ef7008597f 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -595,6 +595,7 @@ class USBDevice: public USBPhyEvents { USBPhy *_phy; bool _initialized; bool _connected; + bool _endpoint_add_remove_allowed; control_transfer_t _transfer; usb_device_t _device; uint32_t _max_packet_size_ep0; From 92c07ac1323b193cf47f9a773c1df55909a32112 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 23 May 2018 15:56:10 -0500 Subject: [PATCH 214/488] Add the TaskQueue abstract interface and friends Add the classes Task, TaskBase and TaskQueue. TaskQueue queue is an interface class which can be implemented by anything which can run code. Task and TaskBase are concrete classes which allow callbacks to be posted to a TaskQueue to be run. --- usb/device/utilities/events/Task.h | 597 +++++++++++++++++++++++ usb/device/utilities/events/TaskBase.cpp | 151 ++++++ usb/device/utilities/events/TaskBase.h | 163 +++++++ usb/device/utilities/events/TaskQueue.h | 138 ++++++ 4 files changed, 1049 insertions(+) create mode 100644 usb/device/utilities/events/Task.h create mode 100644 usb/device/utilities/events/TaskBase.cpp create mode 100644 usb/device/utilities/events/TaskBase.h create mode 100644 usb/device/utilities/events/TaskQueue.h diff --git a/usb/device/utilities/events/Task.h b/usb/device/utilities/events/Task.h new file mode 100644 index 00000000000..1d51ac12e66 --- /dev/null +++ b/usb/device/utilities/events/Task.h @@ -0,0 +1,597 @@ +/* events + * Copyright (c) 2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_TASK_H +#define MBED_TASK_H + +#include "events/EventQueue.h" +#include "events/TaskBase.h" +#include "platform/mbed_assert.h" +#include "platform/Callback.h" + +namespace events { +/** \addtogroup events */ + + +template +struct AllArgs; + +template +struct AllArgs { + typedef AllArgs Self; + B0 b0; + + AllArgs(B0 b0=B0()): b0(b0) {} + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + s->b0(); + s->~Self(); + } + }; + + typedef Operations ops; +}; + +template +struct AllArgs { + typedef AllArgs Self; + B0 b0; B1 b1; + + AllArgs(B0 b0=B0(), B1 b1=B1()): b0(b0), b1(b1) {} + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + s->b0(s->b1); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(); + s->~Self(); + } + }; + + typedef Operations ops; +}; + +template +struct AllArgs { + typedef AllArgs Self; + B0 b0; B1 b1; B2 b2; + + + AllArgs(B0 b0=B0(), B1 b1=B1(), B2 b2=B2()): b0(b0), b1(b1), b2(b2) {} + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + s->b0(s->b1, s->b2); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2); + s->~Self(); + } + }; + + typedef Operations ops; +}; + +template +struct AllArgs { + typedef AllArgs Self; + B0 b0; B1 b1; B2 b2; B3 b3; + + + AllArgs(B0 b0=B0(), B1 b1=B1(), B2 b2=B2(), B3 b3=B3()): b0(b0), b1(b1), b2(b2), b3(b3) {} + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + s->b0(s->b1, s->b2, s->b3); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3); + s->~Self(); + } + }; + + typedef Operations ops; +}; + +template +struct AllArgs { + typedef AllArgs Self; + B0 b0; B1 b1; B2 b2; B3 b3; B4 b4; + + + AllArgs(B0 b0=B0(), B1 b1=B1(), B2 b2=B2(), B3 b3=B3(), B4 b4=B4()): b0(b0), b1(b1), b2(b2), b3(b3), b4(b4) {} + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + s->b0(s->b1, s->b2, s->b3, s->b4); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3, s->b4); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3, s->b4); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3, s->b4); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3, s->b4); + s->~Self(); + } + }; + + typedef Operations ops; +}; + +template +struct AllArgs { + typedef AllArgs Self; + B0 b0; B1 b1; B2 b2; B3 b3; B4 b4; B5 b5; + + + AllArgs(B0 b0=B0(), B1 b1=B1(), B2 b2=B2(), B3 b3=B3(), B4 b4=B4(), B5 b5=B5()): b0(b0), b1(b1), b2(b2), b3(b3), b4(b4), b5(b5) {} + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + s->b0(s->b1, s->b2, s->b3, s->b4, s->b5); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3, s->b4, s->b5); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3, s->b4, s->b5); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3, s->b4, s->b5); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3, s->b4, s->b5); + s->~Self(); + } + }; + + typedef Operations ops; +}; + + +template +class Task; + +template +class Task: public TaskBase { +public: + + Task(TaskQueue *q=NULL, mbed::Callback cb=mbed::Callback()) + : TaskBase(q), _args(cb) { + } + + Task& operator=( mbed::Callback cb) { + _args.b0 = cb; + return *this; + } + + void call() { + post(); + } + +protected: + + virtual uint32_t size() { + return sizeof(_args); + } + + virtual run_callback_t start(void *data, uint32_t max_size) { + All::ops::copy(data, (void*)&_args); + return &All::ops::call; + } + +private: + typedef AllArgs > All; + All _args; +}; + +template +class Task: public TaskBase { +public: + + Task(TaskQueue *q=NULL, mbed::Callback cb=mbed::Callback()) + : TaskBase(q), _args(cb) { + } + + Task& operator=( mbed::Callback cb) { + _args.b0 = cb; + return *this; + } + + void call(A0 a0) { + _args.b1 = a0; + post(); + } + +protected: + + virtual uint32_t size() { + return sizeof(_args); + } + + virtual run_callback_t start(void *data, uint32_t max_size) { + All::ops::copy(data, (void*)&_args); + return &All::ops::call; + } + +private: + typedef AllArgs, A0> All; + All _args; +}; + +/** Task + * + * Representation of a postable task + * @ingroup events + */ +template +class Task: public TaskBase { +public: + + /** + * Construct a new task + * + * @param q TaskQueue to post to + * @param cb Callback to run + */ + Task(TaskQueue *q=NULL, mbed::Callback cb=mbed::Callback()) + : TaskBase(q), _args(cb) { + } + + /** + * Set the callback of this task + * + * @param cb Callback to run + */ + Task& operator=(mbed::Callback cb) { + _args.b0 = cb; + return *this; + } + + /** + * Post this task for execution + * + * The number of arguments to call should match + * the type of the callback. For example Task + * expects two integers as arguments to call, while Task + * expects no arguments. + * + * @param a0 First callback parameter + * @param a1 Second callback parameter + */ + void call(A0 a0, A1 a1) { + _args.b1 = a0; + _args.b2 = a1; + post(); + } + +protected: + + virtual uint32_t size() { + return sizeof(_args); + } + + virtual run_callback_t start(void *data, uint32_t max_size) { + All::ops::copy(data, (void*)&_args); + return &All::ops::call; + } + +private: + typedef AllArgs, A0, A1> All; + All _args; +}; + +} + +/** @}*/ + +#endif diff --git a/usb/device/utilities/events/TaskBase.cpp b/usb/device/utilities/events/TaskBase.cpp new file mode 100644 index 00000000000..ce974f529f0 --- /dev/null +++ b/usb/device/utilities/events/TaskBase.cpp @@ -0,0 +1,151 @@ +/* events + * Copyright (c) 2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "events/TaskBase.h" +#include "events/TaskQueue.h" +#include "events/mbed_events.h" +#include "rtos/Semaphore.h" +#include "mbed.h" + +TaskBase::TaskBase(TaskQueue *q) + : _queue(q), _posted(false), _start_count(0), _flush_sem(NULL) +{ + +} + +TaskBase::~TaskBase() +{ + cancel(); + wait(); +} + +void TaskBase::set(TaskQueue *q) +{ + core_util_critical_section_enter(); + + // Cannot set the queue when it has been posted but has not been finished + MBED_ASSERT(!_posted); + _queue = q; + + core_util_critical_section_exit(); +} + +void TaskBase::cancel() +{ + core_util_critical_section_enter(); + + if (_posted) { + _queue->cancel(this); + _posted = false; + _wake_check(); + } + + core_util_critical_section_exit(); +} + +void TaskBase::wait() +{ + // Fast path check for finished + core_util_critical_section_enter(); + if (finished()) { + core_util_critical_section_exit(); + return; + } + core_util_critical_section_exit(); + + rtos::Semaphore sem; + + // If the event is in-flight then wait for it to complete + core_util_critical_section_enter(); + if (finished()) { + // This element has been flushed from the queue + core_util_critical_section_exit(); + return; + } + _flush_sem = &sem; + core_util_critical_section_exit(); + + sem.wait(); +} + +bool TaskBase::ready() +{ + core_util_critical_section_enter(); + + bool is_ready = !_posted; + + core_util_critical_section_exit(); + return is_ready; +} + +bool TaskBase::finished() +{ + core_util_critical_section_enter(); + + bool is_finished = !_posted && (_start_count == 0); + + core_util_critical_section_exit(); + return is_finished; +} + +void TaskBase::finish() +{ + // Nothing to do +} + +void TaskBase::post() +{ + core_util_critical_section_enter(); + + MBED_ASSERT(_queue); + if (_queue) { + MBED_ASSERT(!_posted); + _queue->post(this); + _posted = true; + } + + core_util_critical_section_exit(); +} + +TaskBase::run_callback_t TaskBase::_start(void *buffer, uint32_t size) +{ + // Each call to _start must result in a call to _finish + MBED_ASSERT(_start_count < 0xFFFF); + _start_count++; + _posted = false; + + return start(buffer, size); +} + +void TaskBase::_finish() +{ + // Each call to _finish must be preceded by a call to _start + MBED_ASSERT(_start_count > 0); + _start_count--; + _wake_check(); + finish(); +} + +void TaskBase::_wake_check() +{ + if (!finished()) { + return; + } + if (_flush_sem) { + _flush_sem->release(); + _flush_sem = NULL; + } +} diff --git a/usb/device/utilities/events/TaskBase.h b/usb/device/utilities/events/TaskBase.h new file mode 100644 index 00000000000..a4ce4c9cdba --- /dev/null +++ b/usb/device/utilities/events/TaskBase.h @@ -0,0 +1,163 @@ +/* events + * Copyright (c) 2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef TASK_BASE_H +#define TASK_BASE_H + +#include "platform/Callback.h" +#include "platform/mbed_assert.h" +#include "LinkEntry.h" + +namespace rtos { +class Semaphore; +} + +namespace events { +/** \addtogroup events */ + + +class TaskQueue; + +/** TaskBase + * + * Representation of a caller allocated task + * @ingroup events + */ +class TaskBase : public LinkEntry { +public: + + typedef void (*run_callback_t)(void *data); + + /** + * Construct a new TaskBase object + * + * @param q Queue for posting to + */ + TaskBase(TaskQueue *q); + + /** + * Destroy this TaskBase + */ + virtual ~TaskBase(); + + /** + * Set the queue of this task + * + * @param q TaskQueue to post to + */ + void set(TaskQueue *q); + + /** + * Cancel the execution of this task + * + * Once cancelled the task can be posted again. Previous + * calls to post may still run. If you need to ensure the + * callback has finished the function wait() can be used. + * + * @note This function is interrupt safe + */ + void cancel(); + + /** + * Return true if this task is ready to be posted + * + * Check if this task is on a queue waiting to be run. + * + * @return true if it is safe to call post + */ + bool ready(); + + /** + * Wait for this task to finish execution + * + * When this function returns then this task is in the finished state. + */ + void wait(); + + /** + * Check if the callback has run to completion or been fully canceled + * + * When an task is finished the queue is completely done with it and the + * callback is either fully complete or has been canceled and will not run. + * + * @return true if this task has been flushed from the queue, false otherwise + */ + bool finished(); + +protected: + + /** + * Size of buffer required for TaskBase::start + * + * @return requested buffer size + */ + virtual uint32_t size() = 0; + + /** + * Copy any callback data and return a callback to run + * + * @param data Buffer to copy data to. Do not copy more than TaskBase::size() data. + * @param size Maximum size to copy + */ + virtual run_callback_t start(void *data, uint32_t size) = 0; + + /** + * Inform this task that execution has finished. + * + */ + virtual void finish(); + + /** + * Post this task to the set TaskQueue for execution + */ + void post(); + +private: + + TaskQueue *_queue; + bool _posted; + uint16_t _start_count; + rtos::Semaphore *_flush_sem; + + friend class TaskQueue; + + /* + * Must be called in a critical section + * + * This function should not be called directly. Instead + * TaskQueue::task_start should be used instead. + */ + run_callback_t _start(void *buffer, uint32_t size); + + /* + * Must be called in a critical section + * + * This function should not be called directly. Instead + * TaskQueue::task_finish should be used instead. + * + */ + void _finish(); + + /* + * Unblock wait if this task is finished + */ + void _wake_check(); +}; + +} + +#endif + +/** @}*/ diff --git a/usb/device/utilities/events/TaskQueue.h b/usb/device/utilities/events/TaskQueue.h new file mode 100644 index 00000000000..521876c11e6 --- /dev/null +++ b/usb/device/utilities/events/TaskQueue.h @@ -0,0 +1,138 @@ +/* events + * Copyright (c) 2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef TASK_QUEUE_H +#define TASK_QUEUE_H + +#include "events/TaskBase.h" +#include "platform/Callback.h" +#include "mbed_critical.h" + +#define MBED_MAX_TASK_SIZE 32 + +namespace events { +/** \addtogroup events */ + + + +/** TaskQueue + * + * Flexible task queue for dispatching tasks + * @ingroup events + */ +class TaskQueue { +public: + + /** Create a TaskQueue + * + * Create an event queue. + */ + TaskQueue() + { + + } + + /** Destroy a TaskQueue + */ + virtual ~TaskQueue() + { + + } + + /** + * Add this event to the queue for execution + * + * If the event is already in the queue then it is canceled and + * added to the end of the queue. + * + * @param event Pointer to the event + */ + virtual void post(TaskBase *event) = 0; + + /** Cancel an in-flight event + * + * Cancels the given event so the event's memory can be reused. + * + * The cancel function is irq safe. + * + * If called while the event queue's dispatch loop is active, the cancel + * function does not guarantee that the event will not execute after it + * returns, as the event may have already begun executing. It does + * guarantee that the event queue is no longer using event data so + * the event can be freed or reused. + * + * @param event Pointer to the event + */ + virtual void cancel(TaskBase *event) = 0; + +protected: + + /** + * Get the size required to run this task + * + * Get the minimum size required for TaskQueue::task_start + * + * @param task The task to check size on + * @return required size + * @note This call must be made in a critical section + */ + static uint32_t task_size(TaskBase *task) + { + + return task->size(); + } + + /** + * Start processing this event by copying out its data + * + * Inform this event both that callback execution has started + * and that the event is free to be posted again. + * + * @param task The task to start processing + * @param dest The buffer to copy the callback arguments to + * @param size maximum size to copy + * @return Pointer to function run + * + * @note event_start must not be called on a canceled event as the + * memory may have been freed already + * @note Every call to event_start must be paired with event_finish + * @note This call must be made in a critical section + */ + static TaskBase::run_callback_t task_start(TaskBase *task, uint8_t *dest, uint32_t size) + { + + return task->_start(dest, size); + } + + /** + * Finish processing this event + * + * Inform this event that the callback has run to completion. + * + * @param task The task to finish processing + * + * @note Every call to event_finish must be preceded by a call to event_start + * @note This call must be made in a critical section + */ + static void task_finish(TaskBase *task) + { + task->_finish(); + } +}; + +} +#endif + From 9ea5f5be83c5d2f8557b24beee141f75c02edb3d Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 23 May 2018 15:56:28 -0500 Subject: [PATCH 215/488] Add the PolledQueue implementation of TaskQueue Add the PolledQueue class which provides a TaskQueue which is run by calling PolledQueue::process. --- usb/device/utilities/events/PolledQueue.cpp | 91 +++++++++++++++++++++ usb/device/utilities/events/PolledQueue.h | 71 ++++++++++++++++ 2 files changed, 162 insertions(+) create mode 100644 usb/device/utilities/events/PolledQueue.cpp create mode 100644 usb/device/utilities/events/PolledQueue.h diff --git a/usb/device/utilities/events/PolledQueue.cpp b/usb/device/utilities/events/PolledQueue.cpp new file mode 100644 index 00000000000..562f5f345db --- /dev/null +++ b/usb/device/utilities/events/PolledQueue.cpp @@ -0,0 +1,91 @@ +/* events + * Copyright (c) 2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include "events/PolledQueue.h" + +#include "events/mbed_events.h" +#include "platform/Callback.h" + + +PolledQueue::PolledQueue(mbed::Callback cb): _cb(cb) +{ + +} + +PolledQueue::~PolledQueue() +{ + +} + +void PolledQueue::dispatch() +{ + core_util_critical_section_enter(); + uint64_t buf[MBED_MAX_TASK_SIZE / sizeof(uint64_t)]; + + while (true) { + + // Atomically dequeue the task and copy the callback + TaskBase *task = _list.dequeue(); + if (!task) { + break; + } + MBED_ASSERT(sizeof(buf) >= task_size(task)); + TaskBase::run_callback_t callback = task_start(task, (uint8_t*)buf, sizeof(buf)); + + // Run the callback outside the critical section + core_util_critical_section_exit(); + callback((uint8_t*)buf); + core_util_critical_section_enter(); + + // Finish + task_finish(task); + task = NULL; + + } + + core_util_critical_section_exit(); +} + +void PolledQueue::attach(mbed::Callback cb) +{ + core_util_critical_section_enter(); + + _cb = cb; + + core_util_critical_section_exit(); +} + +void PolledQueue::post(TaskBase *task) +{ + core_util_critical_section_enter(); + + bool empty = _list.head() == NULL; + _list.remove(task); + _list.enqueue(task); + if (empty && _cb) { + _cb(); + } + + core_util_critical_section_exit(); +} + +void PolledQueue::cancel(TaskBase *task) +{ + core_util_critical_section_enter(); + + _list.remove(task); + + core_util_critical_section_exit(); +} diff --git a/usb/device/utilities/events/PolledQueue.h b/usb/device/utilities/events/PolledQueue.h new file mode 100644 index 00000000000..89afb111b2d --- /dev/null +++ b/usb/device/utilities/events/PolledQueue.h @@ -0,0 +1,71 @@ +/* events + * Copyright (c) 2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef POLLED_QUEUE_H +#define POLLED_QUEUE_H + +#include "events/TaskQueue.h" +#include "platform/Callback.h" +#include "LinkedList.h" +namespace events { +/** \addtogroup events */ + + +/** PolledQueue + * + * This class is an implementation of TaskQueue which is + * processed synchronously by calls to dispatch. + * @ingroup events + */ +class PolledQueue: public TaskQueue { +public: + + /** Create a PolledQueue + * + * Create an event queue. + * + * @param cb Callback called when dispatch needs to be called + */ + PolledQueue(mbed::Callback cb=NULL); + + virtual ~PolledQueue(); + + virtual void post(TaskBase *event); + + virtual void cancel(TaskBase *event); + + /** + * Process all the events in this queue + */ + void dispatch(); + + /** + * Attach a callback indicating that this queue needs to be processed + * + * @param cb Callback called when dispatch needs to be called + */ + void attach(mbed::Callback cb); + +protected: + + mbed::Callback _cb; + LinkedList _list; + +}; + +} +#endif + From 1b213a6f91074037599ccaaa9693212cbd47f274 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 23 May 2018 19:36:15 -0500 Subject: [PATCH 216/488] Update USBMSD Update the USBMSD class for the new API. Add support for passing in a BlockDevice directly without the need to extend USBMSD. --- usb/device/USBMSD/USBMSD.cpp | 887 +++++++++++++++++++++++++++++++++++ usb/device/USBMSD/USBMSD.h | 279 +++++++++++ 2 files changed, 1166 insertions(+) create mode 100644 usb/device/USBMSD/USBMSD.cpp create mode 100644 usb/device/USBMSD/USBMSD.h diff --git a/usb/device/USBMSD/USBMSD.cpp b/usb/device/USBMSD/USBMSD.cpp new file mode 100644 index 00000000000..a8d5991b777 --- /dev/null +++ b/usb/device/USBMSD/USBMSD.cpp @@ -0,0 +1,887 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBMSD.h" +#include "EndpointResolver.h" + +#define DISK_OK 0x00 +#define NO_INIT 0x01 +#define NO_DISK 0x02 +#define WRITE_PROTECT 0x04 + +#define CBW_Signature 0x43425355 +#define CSW_Signature 0x53425355 + +// SCSI Commands +#define TEST_UNIT_READY 0x00 +#define REQUEST_SENSE 0x03 +#define FORMAT_UNIT 0x04 +#define INQUIRY 0x12 +#define MODE_SELECT6 0x15 +#define MODE_SENSE6 0x1A +#define START_STOP_UNIT 0x1B +#define MEDIA_REMOVAL 0x1E +#define READ_FORMAT_CAPACITIES 0x23 +#define READ_CAPACITY 0x25 +#define READ10 0x28 +#define WRITE10 0x2A +#define VERIFY10 0x2F +#define READ12 0xA8 +#define WRITE12 0xAA +#define MODE_SELECT10 0x55 +#define MODE_SENSE10 0x5A + +// MSC class specific requests +#define MSC_REQUEST_RESET 0xFF +#define MSC_REQUEST_GET_MAX_LUN 0xFE + +#define DEFAULT_CONFIGURATION (1) + +// max packet size +#define MAX_PACKET 64 + +// CSW Status +enum Status { + CSW_PASSED, + CSW_FAILED, + CSW_ERROR, +}; + +USBMSD::USBMSD(BlockDevice *bd, USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) + : USBDevice(phy, vendor_id, product_id, product_release), + _in_task(&_queue), _out_task(&_queue), _reset_task(&_queue), _control_task(&_queue), _configure_task(&_queue) +{ + _bd = bd; + _bd->init(); + + _in_task = callback(this, &USBMSD::_in); + _out_task = callback(this, &USBMSD::_out); + _reset_task = callback(this, &USBMSD::_reset); + _control_task = callback(this, &USBMSD::_control); + _configure_task = callback(this, &USBMSD::_configure); + + EndpointResolver resolver(endpoint_table()); + + resolver.endpoint_ctrl(64); + _bulk_in = resolver.endpoint_in(USB_EP_TYPE_BULK, MAX_PACKET); + _bulk_out = resolver.endpoint_out(USB_EP_TYPE_BULK, MAX_PACKET); + MBED_ASSERT(resolver.valid()); + + _stage = READ_CBW; + memset((void *)&_cbw, 0, sizeof(CBW)); + memset((void *)&_csw, 0, sizeof(CSW)); + _page = NULL; +} + +USBMSD::~USBMSD() +{ + disconnect(); + _bd->deinit(); +} + +bool USBMSD::connect() +{ + _mutex.lock(); + + //disk initialization + if (disk_status() & NO_INIT) { + if (disk_initialize()) { + _mutex.unlock(); + return false; + } + } + + // get number of blocks + _block_count = disk_sectors(); + + // get memory size + _memory_size = disk_size(); + + if (_block_count > 0) { + _block_size = _memory_size / _block_count; + if (_block_size != 0) { + free(_page); + _page = (uint8_t *)malloc(_block_size * sizeof(uint8_t)); + if (_page == NULL) { + _mutex.unlock(); + return false; + } + } + } else { + _mutex.unlock(); + return false; + } + + //connect the device + USBDevice::connect(); + _mutex.unlock(); + return true; +} + +void USBMSD::disconnect() +{ + _mutex.lock(); + + USBDevice::disconnect(); + + _in_task.cancel(); + _out_task.cancel(); + _reset_task.cancel(); + _control_task.cancel(); + _configure_task.cancel(); + + _in_task.wait(); + _out_task.wait(); + _reset_task.wait(); + _control_task.wait(); + _configure_task.wait(); + + //De-allocate MSD page size: + free(_page); + _page = NULL; + + _mutex.unlock(); +} + +bool USBMSD::ready() +{ + return configured(); +} + +void USBMSD::process() +{ + _queue.dispatch(); +} + +void USBMSD::attach(mbed::Callback cb) +{ + lock(); + + _queue.attach(cb); + + unlock(); +} + +int USBMSD::disk_read(uint8_t* data, uint64_t block, uint8_t count) +{ + bd_addr_t addr = block * _bd->get_erase_size(); + bd_size_t size = count * _bd->get_erase_size(); + return _bd->read(data, addr, size); +} + +int USBMSD::disk_write(const uint8_t* data, uint64_t block, uint8_t count) +{ + bd_addr_t addr = block * _bd->get_erase_size(); + bd_size_t size = count * _bd->get_erase_size(); + int ret = _bd->erase(addr, size); + if (ret != 0) { + return ret; + } + + return _bd->program(data, addr, size); +} + +int USBMSD::disk_initialize() +{ + return 0; +} + +uint64_t USBMSD::disk_sectors() +{ + return _bd->size() / _bd->get_erase_size(); +} + +uint64_t USBMSD::disk_size() +{ + return _bd->size(); +} + + +int USBMSD::disk_status() +{ + return 0; +} + +void USBMSD::_isr_out(usb_ep_t endpoint) +{ + _out_task.call(); +} + +void USBMSD::_isr_in(usb_ep_t endpoint) +{ + _in_task.call(); +} + +void USBMSD::callback_state_change(DeviceState new_state) +{ + // called in ISR context + + if (new_state != Configured) { + _reset_task.call(); + } +} + +void USBMSD::callback_request(const setup_packet_t *setup) +{ + // called in ISR context + + if (setup->bmRequestType.Type == CLASS_TYPE) { + _control_task.call(setup); + } else { + complete_request(PassThrough, NULL, 0); + } +} + +void USBMSD::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) +{ + // called in ISR context + + bool success = setup->bRequest == MSC_REQUEST_GET_MAX_LUN; + complete_request_xfer_done(success); +} + +void USBMSD::callback_set_configuration(uint8_t configuration) +{ + // called in ISR context + + if (configuration != DEFAULT_CONFIGURATION) { + complete_set_configuration(false); + return; + } + _configure_task.call(); +} + +void USBMSD::callback_set_interface(uint16_t interface, uint8_t alternate) +{ + // called in ISR context + + bool success = (interface == 0) && (alternate == 0); + complete_set_interface(success); +} + + +const uint8_t *USBMSD::string_iinterface_desc() +{ + static const uint8_t string_iinterface_descriptor[] = { + 0x08, //bLength + STRING_DESCRIPTOR, //bDescriptorType 0x03 + 'M', 0, 'S', 0, 'D', 0 //bString iInterface - MSD + }; + return string_iinterface_descriptor; +} + +const uint8_t *USBMSD::string_iproduct_desc() +{ + static const uint8_t string_iproduct_descriptor[] = { + 0x12, //bLength + STRING_DESCRIPTOR, //bDescriptorType 0x03 + 'M', 0, 'b', 0, 'e', 0, 'd', 0, ' ', 0, 'M', 0, 'S', 0, 'D', 0 //bString iProduct - Mbed Audio + }; + return string_iproduct_descriptor; +} + + +const uint8_t *USBMSD::configuration_desc(uint8_t index) +{ + if (index != 0) { + return NULL; + } + + uint8_t config_descriptor_temp[] = { + + // Configuration 1 + 9, // bLength + 2, // bDescriptorType + LSB(9 + 9 + 7 + 7), // wTotalLength + MSB(9 + 9 + 7 + 7), + 0x01, // bNumInterfaces + 0x01, // bConfigurationValue: 0x01 is used to select this configuration + 0x00, // iConfiguration: no string to describe this configuration + 0xC0, // bmAttributes + 100, // bMaxPower, device power consumption is 100 mA + + // Interface 0, Alternate Setting 0, MSC Class + 9, // bLength + 4, // bDescriptorType + 0x00, // bInterfaceNumber + 0x00, // bAlternateSetting + 0x02, // bNumEndpoints + 0x08, // bInterfaceClass + 0x06, // bInterfaceSubClass + 0x50, // bInterfaceProtocol + 0x04, // iInterface + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + 7, // bLength + 5, // bDescriptorType + _bulk_in, // bEndpointAddress + 0x02, // bmAttributes (0x02=bulk) + LSB(MAX_PACKET), // wMaxPacketSize (LSB) + MSB(MAX_PACKET), // wMaxPacketSize (MSB) + 0, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + 7, // bLength + 5, // bDescriptorType + _bulk_out, // bEndpointAddress + 0x02, // bmAttributes (0x02=bulk) + LSB(MAX_PACKET), // wMaxPacketSize (LSB) + MSB(MAX_PACKET), // wMaxPacketSize (MSB) + 0 // bInterval + }; + MBED_ASSERT(sizeof(config_descriptor_temp) == sizeof(_configuration_descriptor)); + memcpy(_configuration_descriptor, config_descriptor_temp, sizeof(_configuration_descriptor)); + return _configuration_descriptor; +} + +void USBMSD::_out() +{ + _mutex.lock(); + + _bulk_out_size = read_finish(_bulk_out); + _out_ready = true; + _process(); + + _mutex.unlock(); +} + +void USBMSD::_in() +{ + _mutex.lock(); + + write_finish(_bulk_in); + _in_ready = true; + _process(); + + _mutex.unlock(); +} + +void USBMSD::_reset() +{ + _mutex.lock(); + + msd_reset(); + + _mutex.unlock(); +} + +void USBMSD::_control(const setup_packet_t *setup) +{ + _mutex.lock(); + + static const uint8_t maxLUN[1] = {0}; + + RequestResult result = PassThrough; + uint8_t *data = NULL; + uint32_t size = 0; + + if (setup->bmRequestType.Type == CLASS_TYPE) { + switch (setup->bRequest) { + case MSC_REQUEST_RESET: + result = Success; + msd_reset(); + break; + case MSC_REQUEST_GET_MAX_LUN: + result = Send; + data = (uint8_t*)maxLUN; + size = 1; + break; + default: + break; + } + } + + complete_request(result, data, size); + + _mutex.unlock(); +} + +void USBMSD::_configure() +{ + _mutex.lock(); + + // Configure endpoints > 0 + endpoint_add(_bulk_in, MAX_PACKET, USB_EP_TYPE_BULK, &USBMSD::_isr_in); + endpoint_add(_bulk_out, MAX_PACKET, USB_EP_TYPE_BULK, &USBMSD::_isr_out); + MBED_ASSERT(sizeof(_bulk_out_buf) == MAX_PACKET); + MBED_ASSERT(sizeof(_bulk_in_buf) == MAX_PACKET); + + _out_ready = false; + _in_ready = true; + + //activate readings + read_start(_bulk_out, _bulk_out_buf, sizeof(_bulk_out_buf)); + complete_set_configuration(true); + + _mutex.unlock(); +} + +void USBMSD::_process() +{ + // Mutex must be locked by caller + + switch (_stage) { + // the device has to decode the CBW received + case READ_CBW: + if (!_out_ready) { + break; + } + CBWDecode(_bulk_out_buf, _bulk_out_size); + _read_next(); + break; + + + case PROCESS_CBW: + switch (_cbw.CB[0]) { + // the device has to receive data from the host + case WRITE10: + case WRITE12: + if (!_out_ready) { + break; + } + memoryWrite(_bulk_out_buf, _bulk_out_size); + _read_next(); + break; + case VERIFY10: + if (!_out_ready) { + break; + } + memoryVerify(_bulk_out_buf, _bulk_out_size); + _read_next(); + break; + // the device has to send data to the host + case READ10: + case READ12: + if (!_in_ready) { + break; + } + memoryRead(); + break; + } + break; + + //the device has to send a CSW + case SEND_CSW: + if (!_in_ready) { + break; + } + sendCSW(); + break; + + // an error has occurred: stall endpoint and send CSW + default: + endpoint_stall(_bulk_out); + endpoint_stall(_bulk_in); + _csw.Status = CSW_ERROR; + sendCSW(); + break; + } +} + +void USBMSD::_write_next(uint8_t *data, uint32_t size) +{ + lock(); + + MBED_ASSERT(size <= MAX_PACKET); + MBED_ASSERT(_in_ready); + uint32_t send_size = MAX_PACKET > size ? size : MAX_PACKET; + memcpy(_bulk_in_buf, data, send_size); + write_start(_bulk_in, _bulk_in_buf, send_size); + _in_ready = false; + + unlock(); +} + +void USBMSD::_read_next() +{ + lock(); + + MBED_ASSERT(_out_ready); + read_start(_bulk_out, _bulk_out_buf, sizeof(_bulk_out_buf)); + _out_ready = false; + + unlock(); +} + +void USBMSD::memoryWrite(uint8_t *buf, uint16_t size) +{ + if ((_addr + size) > _memory_size) { + size = _memory_size - _addr; + _stage = ERROR; + endpoint_stall(_bulk_out); + } + + // we fill an array in RAM of 1 block before writing it in memory + for (int i = 0; i < size; i++) { + _page[_addr % _block_size + i] = buf[i]; + } + + // if the array is filled, write it in memory + if (!((_addr + size) % _block_size)) { + if (!(disk_status() & WRITE_PROTECT)) { + disk_write(_page, _addr / _block_size, 1); + } + } + + _addr += size; + _length -= size; + _csw.DataResidue -= size; + + if ((!_length) || (_stage != PROCESS_CBW)) { + _csw.Status = (_stage == ERROR) ? CSW_FAILED : CSW_PASSED; + sendCSW(); + } +} + +void USBMSD::memoryVerify(uint8_t *buf, uint16_t size) +{ + uint32_t n; + + if ((_addr + size) > _memory_size) { + size = _memory_size - _addr; + _stage = ERROR; + endpoint_stall(_bulk_out); + } + + // beginning of a new block -> load a whole block in RAM + if (!(_addr % _block_size)) { + disk_read(_page, _addr / _block_size, 1); + } + + // info are in RAM -> no need to re-read memory + for (n = 0; n < size; n++) { + if (_page[_addr % _block_size + n] != buf[n]) { + _mem_ok = false; + break; + } + } + + _addr += size; + _length -= size; + _csw.DataResidue -= size; + + if (!_length || (_stage != PROCESS_CBW)) { + _csw.Status = (_mem_ok && (_stage == PROCESS_CBW)) ? CSW_PASSED : CSW_FAILED; + sendCSW(); + } +} + + +bool USBMSD::inquiryRequest(void) +{ + uint8_t inquiry[] = { 0x00, 0x80, 0x00, 0x01, + 36 - 4, 0x80, 0x00, 0x00, + 'M', 'B', 'E', 'D', '.', 'O', 'R', 'G', + 'M', 'B', 'E', 'D', ' ', 'U', 'S', 'B', ' ', 'D', 'I', 'S', 'K', ' ', ' ', ' ', + '1', '.', '0', ' ', + }; + if (!write(inquiry, sizeof(inquiry))) { + return false; + } + return true; +} + + +bool USBMSD::readFormatCapacity() +{ + uint8_t capacity[] = { 0x00, 0x00, 0x00, 0x08, + (uint8_t)((_block_count >> 24) & 0xff), + (uint8_t)((_block_count >> 16) & 0xff), + (uint8_t)((_block_count >> 8) & 0xff), + (uint8_t)((_block_count >> 0) & 0xff), + + 0x02, + (uint8_t)((_block_size >> 16) & 0xff), + (uint8_t)((_block_size >> 8) & 0xff), + (uint8_t)((_block_size >> 0) & 0xff), + }; + if (!write(capacity, sizeof(capacity))) { + return false; + } + return true; +} + + +bool USBMSD::readCapacity(void) +{ + uint8_t capacity[] = { + (uint8_t)(((_block_count - 1) >> 24) & 0xff), + (uint8_t)(((_block_count - 1) >> 16) & 0xff), + (uint8_t)(((_block_count - 1) >> 8) & 0xff), + (uint8_t)(((_block_count - 1) >> 0) & 0xff), + + (uint8_t)((_block_size >> 24) & 0xff), + (uint8_t)((_block_size >> 16) & 0xff), + (uint8_t)((_block_size >> 8) & 0xff), + (uint8_t)((_block_size >> 0) & 0xff), + }; + if (!write(capacity, sizeof(capacity))) { + return false; + } + return true; +} + +bool USBMSD::write(uint8_t *buf, uint16_t size) +{ + + if (size >= _cbw.DataLength) { + size = _cbw.DataLength; + } + _stage = SEND_CSW; + + _write_next(buf, size); + + _csw.DataResidue -= size; + _csw.Status = CSW_PASSED; + return true; +} + + +bool USBMSD::modeSense6(void) +{ + uint8_t sense6[] = { 0x03, 0x00, 0x00, 0x00 }; + if (!write(sense6, sizeof(sense6))) { + return false; + } + return true; +} + +void USBMSD::sendCSW() +{ + _csw.Signature = CSW_Signature; + _write_next((uint8_t *)&_csw, sizeof(CSW)); + _stage = READ_CBW; +} + +bool USBMSD::requestSense(void) +{ + uint8_t request_sense[] = { + 0x70, + 0x00, + 0x05, // Sense Key: illegal request + 0x00, + 0x00, + 0x00, + 0x00, + 0x0A, + 0x00, + 0x00, + 0x00, + 0x00, + 0x30, + 0x01, + 0x00, + 0x00, + 0x00, + 0x00, + }; + + if (!write(request_sense, sizeof(request_sense))) { + return false; + } + + return true; +} + +void USBMSD::fail() +{ + _csw.Status = CSW_FAILED; + sendCSW(); +} + + +void USBMSD::CBWDecode(uint8_t *buf, uint16_t size) +{ + if (size == sizeof(_cbw)) { + memcpy((uint8_t *)&_cbw, buf, size); + if (_cbw.Signature == CBW_Signature) { + _csw.Tag = _cbw.Tag; + _csw.DataResidue = _cbw.DataLength; + if ((_cbw.CBLength < 1) || (_cbw.CBLength > 16)) { + fail(); + } else { + switch (_cbw.CB[0]) { + case TEST_UNIT_READY: + testUnitReady(); + break; + case REQUEST_SENSE: + requestSense(); + break; + case INQUIRY: + inquiryRequest(); + break; + case MODE_SENSE6: + modeSense6(); + break; + case READ_FORMAT_CAPACITIES: + readFormatCapacity(); + break; + case READ_CAPACITY: + readCapacity(); + break; + case READ10: + case READ12: + if (infoTransfer()) { + if ((_cbw.Flags & 0x80)) { + _stage = PROCESS_CBW; + memoryRead(); + } else { + endpoint_stall(_bulk_out); + _csw.Status = CSW_ERROR; + sendCSW(); + } + } + break; + case WRITE10: + case WRITE12: + if (infoTransfer()) { + if (!(_cbw.Flags & 0x80)) { + _stage = PROCESS_CBW; + } else { + endpoint_stall(_bulk_in); + _csw.Status = CSW_ERROR; + sendCSW(); + } + } + break; + case VERIFY10: + if (!(_cbw.CB[1] & 0x02)) { + _csw.Status = CSW_PASSED; + sendCSW(); + break; + } + if (infoTransfer()) { + if (!(_cbw.Flags & 0x80)) { + _stage = PROCESS_CBW; + _mem_ok = true; + } else { + endpoint_stall(_bulk_in); + _csw.Status = CSW_ERROR; + sendCSW(); + } + } + break; + case MEDIA_REMOVAL: + _csw.Status = CSW_PASSED; + sendCSW(); + break; + default: + fail(); + break; + } + } + } + } +} + +void USBMSD::testUnitReady(void) +{ + + if (_cbw.DataLength != 0) { + if ((_cbw.Flags & 0x80) != 0) { + endpoint_stall(_bulk_in); + } else { + endpoint_stall(_bulk_out); + } + } + + _csw.Status = CSW_PASSED; + sendCSW(); +} + + +void USBMSD::memoryRead(void) +{ + uint32_t n; + + n = (_length > MAX_PACKET) ? MAX_PACKET : _length; + + if ((_addr + n) > _memory_size) { + n = _memory_size - _addr; + _stage = ERROR; + } + + // we read an entire block + if (!(_addr % _block_size)) { + disk_read(_page, _addr / _block_size, 1); + } + + // write data which are in RAM + _write_next(&_page[_addr % _block_size], MAX_PACKET); + + _addr += n; + _length -= n; + + _csw.DataResidue -= n; + + if (!_length || (_stage != PROCESS_CBW)) { + _csw.Status = (_stage == PROCESS_CBW) ? CSW_PASSED : CSW_FAILED; + _stage = (_stage == PROCESS_CBW) ? SEND_CSW : _stage; + } +} + + +bool USBMSD::infoTransfer(void) +{ + uint32_t n; + + // Logical Block Address of First Block + n = (_cbw.CB[2] << 24) | (_cbw.CB[3] << 16) | (_cbw.CB[4] << 8) | (_cbw.CB[5] << 0); + + _addr = n * _block_size; + + // Number of Blocks to transfer + switch (_cbw.CB[0]) { + case READ10: + case WRITE10: + case VERIFY10: + n = (_cbw.CB[7] << 8) | (_cbw.CB[8] << 0); + break; + + case READ12: + case WRITE12: + n = (_cbw.CB[6] << 24) | (_cbw.CB[7] << 16) | (_cbw.CB[8] << 8) | (_cbw.CB[9] << 0); + break; + } + + _length = n * _block_size; + + if (!_cbw.DataLength) { // host requests no data + _csw.Status = CSW_FAILED; + sendCSW(); + return false; + } + + if (_cbw.DataLength != _length) { + if ((_cbw.Flags & 0x80) != 0) { + endpoint_stall(_bulk_in); + } else { + endpoint_stall(_bulk_out); + } + + _csw.Status = CSW_FAILED; + sendCSW(); + return false; + } + + return true; +} + +void USBMSD::msd_reset() +{ + _stage = READ_CBW; +} diff --git a/usb/device/USBMSD/USBMSD.h b/usb/device/USBMSD/USBMSD.h new file mode 100644 index 00000000000..3efcd5d5dd8 --- /dev/null +++ b/usb/device/USBMSD/USBMSD.h @@ -0,0 +1,279 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBMSD_H +#define USBMSD_H + +/* These headers are included for child class. */ +#include "USBDescriptor.h" +#include "USBDevice_Types.h" +#include "platform/Callback.h" +#include "events/PolledQueue.h" +#include "events/Task.h" +#include "BlockDevice.h" +#include "Mutex.h" +#include "usb_phy_api.h" + +#include "USBDevice.h" + +/** + * USBMSD class: generic class in order to use all kinds of blocks storage chip + * + * Introduction + * + * USBMSD implements the MSD protocol. It permits to access a block device (flash, sdcard,...) + * from a computer over USB. + * + * @code + * #include "mbed.h" + * #include "SDBlockDevice.h" + * #include "USBMSD.h" + * + * SDBlockDevice sd(PTE3, PTE1, PTE2, PTE4); + * USBMSD usb(&sd); + * + * int main() { + * usb.connect(); + * + * while(true) { + * usb.process(); + * } + * + * return 0; + * } + * @endcode + */ +class USBMSD: public USBDevice { +public: + + /** + * Constructor + * + * This creates a new USBMSD object with the given block device. Connect must be called + * for the block device to connect. + * + * @param bd BlockDevice to mount as a USB drive + * @param phy USB phy to use + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your preoduct_release + */ + USBMSD(BlockDevice *bd, USBPhy *phy=get_usb_phy(), uint16_t vendor_id = 0x0703, uint16_t product_id = 0x0104, uint16_t product_release = 0x0001); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call disconnect + * before this destructor runs. + */ + virtual ~USBMSD(); + + /** + * Connect the USB MSD device. Establish disk initialization before really connect the device. + * + * @returns true if successful + */ + bool connect(); + + /** + * Disconnect the USB MSD device. + */ + void disconnect(); + + /** + * Check if USB is connected + * + * @return true if a USB is connected, false otherwise + */ + bool ready(); + + /** + * Perform USB processing + */ + void process(); + + /** + * Called when USBMSD needs to perform processing + * + * @param cb Callback called when USBMSD needs process() to be called + */ + void attach(mbed::Callback cb); + +protected: + + /* + * read one or more blocks on a storage chip + * + * @param data pointer where will be stored read data + * @param block starting block number + * @param count number of blocks to read + * @returns 0 if successful + */ + virtual int disk_read(uint8_t *data, uint64_t block, uint8_t count); + + /* + * write one or more blocks on a storage chip + * + * @param data data to write + * @param block starting block number + * @param count number of blocks to write + * @returns 0 if successful + */ + virtual int disk_write(const uint8_t *data, uint64_t block, uint8_t count); + + /* + * Disk initilization + */ + virtual int disk_initialize(); + + /* + * Return the number of blocks + * + * @returns number of blocks + */ + virtual uint64_t disk_sectors(); + + /* + * Return memory size + * + * @returns memory size + */ + virtual uint64_t disk_size(); + + /* + * To check the status of the storage chip + * + * @returns status: 0: OK, 1: disk not initialized, 2: no medium in the drive, 4: write protected + */ + virtual int disk_status(); + +private: + + // MSC Bulk-only Stage + enum Stage { + READ_CBW, // wait a CBW + ERROR, // error + PROCESS_CBW, // process a CBW request + SEND_CSW, // send a CSW + }; + + // Bulk-only CBW + typedef MBED_PACKED(struct) { + uint32_t Signature; + uint32_t Tag; + uint32_t DataLength; + uint8_t Flags; + uint8_t LUN; + uint8_t CBLength; + uint8_t CB[16]; + } CBW; + + // Bulk-only CSW + typedef MBED_PACKED(struct) { + uint32_t Signature; + uint32_t Tag; + uint32_t DataResidue; + uint8_t Status; + } CSW; + + //state of the bulk-only state machine + Stage _stage; + + // current CBW + CBW _cbw; + + // CSW which will be sent + CSW _csw; + + // addr where will be read or written data + uint32_t _addr; + + // length of a reading or writing + uint32_t _length; + + // memory OK (after a memoryVerify) + bool _mem_ok; + + // cache in RAM before writing in memory. Useful also to read a block. + uint8_t *_page; + + int _block_size; + uint64_t _memory_size; + uint64_t _block_count; + + // endpoints + usb_ep_t _bulk_in; + usb_ep_t _bulk_out; + uint8_t _bulk_in_buf[64]; + uint8_t _bulk_out_buf[64]; + bool _out_ready; + bool _in_ready; + uint32_t _bulk_out_size; + + // Interrupt to thread deferral + PolledQueue _queue; + Task _in_task; + Task _out_task; + Task _reset_task; + Task _control_task; + Task _configure_task; + + BlockDevice *_bd; + rtos::Mutex _mutex; + + // space for config descriptor + uint8_t _configuration_descriptor[32]; + + virtual const uint8_t *string_iproduct_desc(); + virtual const uint8_t *string_iinterface_desc(); + virtual const uint8_t *configuration_desc(uint8_t index); + virtual void callback_set_configuration(uint8_t configuration); + virtual void callback_set_interface(uint16_t interface, uint8_t alternate); + virtual void callback_state_change(DeviceState new_state); + virtual void callback_request(const setup_packet_t *setup); + virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); + + void _isr_out(usb_ep_t endpoint); + void _isr_in(usb_ep_t endpoint); + + void _out(); + void _in(); + void _reset(); + void _control(const setup_packet_t *request); + void _configure(); + + void _process(); + void _write_next(uint8_t *data, uint32_t size); + void _read_next(); + + void CBWDecode(uint8_t *buf, uint16_t size); + void sendCSW(void); + bool inquiryRequest(void); + bool write(uint8_t *buf, uint16_t size); + bool readFormatCapacity(); + bool readCapacity(void); + bool infoTransfer(void); + void memoryRead(void); + bool modeSense6(void); + void testUnitReady(void); + bool requestSense(void); + void memoryVerify(uint8_t *buf, uint16_t size); + void memoryWrite(uint8_t *buf, uint16_t size); + void msd_reset(); + void fail(); +}; + +#endif From d5da15dbc565264d07e32261ced464f984c84345 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 18 Jun 2018 11:35:22 -0500 Subject: [PATCH 217/488] USBMSD fixes Make the following fixes: -deinit in destructor to prevent race conditions -cancel the reset task before calling it since it may be in progress -wait for tasks to complete without mutex held -prevent double connect with _init flag --- usb/device/USBMSD/USBMSD.cpp | 25 ++++++++++++++++++++++++- usb/device/USBMSD/USBMSD.h | 4 ++++ 2 files changed, 28 insertions(+), 1 deletion(-) diff --git a/usb/device/USBMSD/USBMSD.cpp b/usb/device/USBMSD/USBMSD.cpp index a8d5991b777..ba81e98b68d 100644 --- a/usb/device/USBMSD/USBMSD.cpp +++ b/usb/device/USBMSD/USBMSD.cpp @@ -63,7 +63,7 @@ enum Status { USBMSD::USBMSD(BlockDevice *bd, USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) : USBDevice(phy, vendor_id, product_id, product_release), - _in_task(&_queue), _out_task(&_queue), _reset_task(&_queue), _control_task(&_queue), _configure_task(&_queue) + _init(false), _in_task(&_queue), _out_task(&_queue), _reset_task(&_queue), _control_task(&_queue), _configure_task(&_queue) { _bd = bd; _bd->init(); @@ -91,16 +91,26 @@ USBMSD::~USBMSD() { disconnect(); _bd->deinit(); + deinit(); } bool USBMSD::connect() { + _mutex_init.lock(); _mutex.lock(); + // already initialized + if (_init) { + _mutex.unlock(); + _mutex_init.unlock(); + return false; + } + //disk initialization if (disk_status() & NO_INIT) { if (disk_initialize()) { _mutex.unlock(); + _mutex_init.unlock(); return false; } } @@ -118,25 +128,31 @@ bool USBMSD::connect() _page = (uint8_t *)malloc(_block_size * sizeof(uint8_t)); if (_page == NULL) { _mutex.unlock(); + _mutex_init.unlock(); return false; } } } else { _mutex.unlock(); + _mutex_init.unlock(); return false; } //connect the device USBDevice::connect(); + _init = true; _mutex.unlock(); + _mutex_init.unlock(); return true; } void USBMSD::disconnect() { + _mutex_init.lock(); _mutex.lock(); USBDevice::disconnect(); + _init = false; _in_task.cancel(); _out_task.cancel(); @@ -144,17 +160,23 @@ void USBMSD::disconnect() _control_task.cancel(); _configure_task.cancel(); + _mutex.unlock(); + + // object mutex must be unlocked for waiting _in_task.wait(); _out_task.wait(); _reset_task.wait(); _control_task.wait(); _configure_task.wait(); + _mutex.lock(); + //De-allocate MSD page size: free(_page); _page = NULL; _mutex.unlock(); + _mutex_init.unlock(); } bool USBMSD::ready() @@ -231,6 +253,7 @@ void USBMSD::callback_state_change(DeviceState new_state) // called in ISR context if (new_state != Configured) { + _reset_task.cancel(); _reset_task.call(); } } diff --git a/usb/device/USBMSD/USBMSD.h b/usb/device/USBMSD/USBMSD.h index 3efcd5d5dd8..9e4ab48ed6a 100644 --- a/usb/device/USBMSD/USBMSD.h +++ b/usb/device/USBMSD/USBMSD.h @@ -189,6 +189,9 @@ class USBMSD: public USBDevice { uint8_t Status; } CSW; + // If this class has been initialized + bool _init; + //state of the bulk-only state machine Stage _stage; @@ -232,6 +235,7 @@ class USBMSD: public USBDevice { Task _configure_task; BlockDevice *_bd; + rtos::Mutex _mutex_init; rtos::Mutex _mutex; // space for config descriptor From 1986f8add68934d570da615361a040f64915cafe Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 19 Jun 2018 18:22:31 -0500 Subject: [PATCH 218/488] Remove endpoint parameter from USB callbacks Remove the endpoint parameter from endpoint callbacks. This information is redundant because endpoints are known at construction time because they must be in the configuration descriptor. --- TESTS/usb_device/basic/USBTester.cpp | 14 +++++++------- TESTS/usb_device/basic/USBTester.h | 6 +++--- usb/device/USBAudio/USBAudio.cpp | 6 ++---- usb/device/USBAudio/USBAudio.h | 4 ++-- usb/device/USBDevice/USBDevice.cpp | 4 ++-- usb/device/USBDevice/USBDevice.h | 6 +++--- usb/device/USBHID/USBHID.cpp | 4 ++-- usb/device/USBHID/USBHID.h | 4 ++-- usb/device/USBMIDI/USBMIDI.cpp | 4 ++-- usb/device/USBMIDI/USBMIDI.h | 4 ++-- usb/device/USBMSD/USBMSD.cpp | 4 ++-- usb/device/USBMSD/USBMSD.h | 4 ++-- usb/device/USBSerial/USBCDC.cpp | 6 +++--- usb/device/USBSerial/USBCDC.h | 4 ++-- 14 files changed, 36 insertions(+), 38 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index 4a62b91f0c2..36b01d9eeb0 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -221,7 +221,7 @@ void USBTester::callback_set_configuration(uint8_t configuration) } bool USBTester::setup_iterface(uint8_t ep_in, uint8_t ep_out, uint32_t ep_size, usb_ep_type_t ep_type, - uint8_t *buf, uint32_t buf_size, void (USBTester::*callback)(usb_ep_t endpoint)) + uint8_t *buf, uint32_t buf_size, void (USBTester::*callback)()) { bool success = false; @@ -690,13 +690,13 @@ const uint8_t *USBTester::configuration_desc(uint8_t index) } } -void USBTester::epint_out_callback(usb_ep_t endpoint) +void USBTester::epint_out_callback() { - read_finish(endpoint); - read_start(endpoint, int_buf, sizeof(int_buf)); + read_finish(int_out); + read_start(int_out, int_buf, sizeof(int_buf)); } -void USBTester::epbulk_out_callback(usb_ep_t endpoint) +void USBTester::epbulk_out_callback() { - read_finish(endpoint); - read_start(endpoint, bulk_buf, sizeof(bulk_buf)); + read_finish(bulk_out); + read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); } diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index 1f9349387eb..f94f771f372 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -62,7 +62,7 @@ class USBTester: public USBDevice { bool set_configuration(uint16_t configuration); bool set_interface(uint16_t interface, uint16_t alternate); bool setup_iterface(uint8_t ep_in, uint8_t ep_out, uint32_t ep_size, usb_ep_type_t ep_type, - uint8_t *buf, uint32_t buf_size, void (USBTester::*callback)(usb_ep_t endpoint)); + uint8_t *buf, uint32_t buf_size, void (USBTester::*callback)()); void remove_iterface(uint16_t interface); int16_t interface_0_alt_set; int16_t interface_1_alt_set; @@ -117,8 +117,8 @@ class USBTester: public USBDevice { virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); virtual void callback_set_configuration(uint8_t configuration); virtual void callback_set_interface(uint16_t interface, uint8_t alternate); - virtual void epbulk_out_callback(usb_ep_t endpoint); - virtual void epint_out_callback(usb_ep_t endpoint); + virtual void epbulk_out_callback(); + virtual void epint_out_callback(); virtual void callback_reset(); uint8_t ctrl_buf[2048]; diff --git a/usb/device/USBAudio/USBAudio.cpp b/usb/device/USBAudio/USBAudio.cpp index abd899ab45f..71d392e9998 100644 --- a/usb/device/USBAudio/USBAudio.cpp +++ b/usb/device/USBAudio/USBAudio.cpp @@ -883,10 +883,9 @@ void USBAudio::_receive_change(ChannelState new_state) } } -void USBAudio::_receive_isr(usb_ep_t ep) +void USBAudio::_receive_isr() { assert_locked(); - MBED_ASSERT(ep == _episo_out); uint32_t size = read_finish(_episo_out); @@ -984,10 +983,9 @@ void USBAudio::_send_isr_next_sync() _tx_frame_fract += _tx_fract_frames_per_xfer; } -void USBAudio::_send_isr(usb_ep_t ep) +void USBAudio::_send_isr() { assert_locked(); - MBED_ASSERT(ep == _episo_in); write_finish(_episo_in); diff --git a/usb/device/USBAudio/USBAudio.h b/usb/device/USBAudio/USBAudio.h index fec17615f1e..d2ed6aea68d 100644 --- a/usb/device/USBAudio/USBAudio.h +++ b/usb/device/USBAudio/USBAudio.h @@ -275,11 +275,11 @@ class USBAudio: protected USBDevice { void _build_configuration_desc(); void _receive_change(ChannelState new_state); - void _receive_isr(usb_ep_t ep); + void _receive_isr(); void _send_change(ChannelState new_state); void _send_isr_start(); void _send_isr_next_sync(); - void _send_isr(usb_ep_t ep); + void _send_isr(); // has connect been called bool _connected; diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index c4fc4e17f67..b38fd67f58a 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -939,7 +939,7 @@ void USBDevice::out(usb_ep_t endpoint) MBED_ASSERT(info->pending >= 1); info->pending -= 1; if (info->callback) { - (this->*(info->callback))(endpoint); + (this->*(info->callback))(); } } @@ -957,7 +957,7 @@ void USBDevice::in(usb_ep_t endpoint) MBED_ASSERT(info->pending >= 1); info->pending -= 1; if (info->callback) { - (this->*(info->callback))(endpoint); + (this->*(info->callback))(); } } diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 8ef7008597f..133ea245223 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -42,7 +42,7 @@ */ class USBDevice: public USBPhyEvents { public: - typedef void (USBDevice::*ep_cb_t)(usb_ep_t endpoint); + typedef void (USBDevice::*ep_cb_t)(); enum RequestResult { Receive = 0, @@ -157,7 +157,7 @@ class USBDevice: public USBPhyEvents { * @returns true if successful, false otherwise */ template - bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type, void (T::*callback)(usb_ep_t endpoint)) + bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type, void (T::*callback)()) { return endpoint_add(endpoint, max_packet, type, static_cast(callback)); } @@ -539,7 +539,7 @@ class USBDevice: public USBPhyEvents { void _complete_set_interface(); struct endpoint_info_t { - void (USBDevice::*callback)(usb_ep_t endpoint); + ep_cb_t callback; uint16_t max_packet_size; uint16_t transfer_size; uint8_t flags; diff --git a/usb/device/USBHID/USBHID.cpp b/usb/device/USBHID/USBHID.cpp index 14bc74ee06f..f2d73c3e061 100644 --- a/usb/device/USBHID/USBHID.cpp +++ b/usb/device/USBHID/USBHID.cpp @@ -233,7 +233,7 @@ bool USBHID::read_nb(HID_REPORT *report) return success; } -void USBHID::_send_isr(usb_ep_t endpoint) +void USBHID::_send_isr() { assert_locked(); @@ -247,7 +247,7 @@ void USBHID::_send_isr(usb_ep_t endpoint) } -void USBHID::_read_isr(usb_ep_t endpoint) +void USBHID::_read_isr() { assert_locked(); diff --git a/usb/device/USBHID/USBHID.h b/usb/device/USBHID/USBHID.h index 2cd984a6613..db5b4cc8c76 100644 --- a/usb/device/USBHID/USBHID.h +++ b/usb/device/USBHID/USBHID.h @@ -245,8 +245,8 @@ class USBHID: public USBDevice { private: void _init(uint8_t output_report_length, uint8_t input_report_length); - void _send_isr(usb_ep_t endpoint); - void _read_isr(usb_ep_t endpoint); + void _send_isr(); + void _read_isr(); class AsyncSend; class AsyncRead; diff --git a/usb/device/USBMIDI/USBMIDI.cpp b/usb/device/USBMIDI/USBMIDI.cpp index 4fb902c5ebd..24cceff1f49 100644 --- a/usb/device/USBMIDI/USBMIDI.cpp +++ b/usb/device/USBMIDI/USBMIDI.cpp @@ -311,14 +311,14 @@ const uint8_t *USBMIDI::configuration_desc(uint8_t index) return _config_descriptor; } -void USBMIDI::_in_callback(usb_ep_t ep) +void USBMIDI::_in_callback() { assert_locked(); _flags.set(FLAG_WRITE_DONE); } -void USBMIDI::_out_callback(usb_ep_t ep) +void USBMIDI::_out_callback() { assert_locked(); diff --git a/usb/device/USBMIDI/USBMIDI.h b/usb/device/USBMIDI/USBMIDI.h index c1d968d6192..04adfe7ad09 100644 --- a/usb/device/USBMIDI/USBMIDI.h +++ b/usb/device/USBMIDI/USBMIDI.h @@ -176,8 +176,8 @@ class USBMIDI: public USBDevice { Callback _callback; void _init(); - void _in_callback(usb_ep_t); - void _out_callback(usb_ep_t); + void _in_callback(); + void _out_callback(); bool _next_message(); }; diff --git a/usb/device/USBMSD/USBMSD.cpp b/usb/device/USBMSD/USBMSD.cpp index ba81e98b68d..01f0aa94043 100644 --- a/usb/device/USBMSD/USBMSD.cpp +++ b/usb/device/USBMSD/USBMSD.cpp @@ -238,12 +238,12 @@ int USBMSD::disk_status() return 0; } -void USBMSD::_isr_out(usb_ep_t endpoint) +void USBMSD::_isr_out() { _out_task.call(); } -void USBMSD::_isr_in(usb_ep_t endpoint) +void USBMSD::_isr_in() { _in_task.call(); } diff --git a/usb/device/USBMSD/USBMSD.h b/usb/device/USBMSD/USBMSD.h index 9e4ab48ed6a..b133f53b0e1 100644 --- a/usb/device/USBMSD/USBMSD.h +++ b/usb/device/USBMSD/USBMSD.h @@ -250,8 +250,8 @@ class USBMSD: public USBDevice { virtual void callback_request(const setup_packet_t *setup); virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); - void _isr_out(usb_ep_t endpoint); - void _isr_in(usb_ep_t endpoint); + void _isr_out(); + void _isr_in(); void _out(); void _in(); diff --git a/usb/device/USBSerial/USBCDC.cpp b/usb/device/USBSerial/USBCDC.cpp index b03ae1df3f4..7e406c419e1 100644 --- a/usb/device/USBSerial/USBCDC.cpp +++ b/usb/device/USBSerial/USBCDC.cpp @@ -410,11 +410,11 @@ void USBCDC::_send_isr_start() * Called by when CDC data is sent * Warning: Called in ISR */ -void USBCDC::_send_isr(usb_ep_t endpoint) +void USBCDC::_send_isr() { assert_locked(); - write_finish(endpoint); + write_finish(_bulk_in); _tx_buf = _tx_buffer; _tx_size = 0; _tx_in_progress = false; @@ -472,7 +472,7 @@ void USBCDC::_receive_isr_start() * Called by when CDC data is received * Warning: Called in ISR */ -void USBCDC::_receive_isr(usb_ep_t endpoint) +void USBCDC::_receive_isr() { assert_locked(); diff --git a/usb/device/USBSerial/USBCDC.h b/usb/device/USBSerial/USBCDC.h index bc281550e46..b08c9bcf0a5 100644 --- a/usb/device/USBSerial/USBCDC.h +++ b/usb/device/USBSerial/USBCDC.h @@ -194,10 +194,10 @@ class USBCDC: public USBDevice { void _change_terminal_connected(bool connected); void _send_isr_start(); - void _send_isr(usb_ep_t endpoint); + void _send_isr(); void _receive_isr_start(); - void _receive_isr(usb_ep_t endpoint); + void _receive_isr(); usb_ep_t _bulk_in; usb_ep_t _bulk_out; From b6bf72fd109b01d62ecea013757926a2aae56496 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Mon, 28 May 2018 18:31:57 +0200 Subject: [PATCH 219/488] Tests: USB: Add device config files for Zadig Zadig is a tool used to install generic USB drivers on Windows machines. These drivers are necessary to run USB device test suite on Windows hosts. --- TESTS/usb_device/basic/zadig_conf/README.md | 18 ++++++++++++++++++ .../zadig_conf/mbed_os-usb_test_device1.cfg | 6 ++++++ .../zadig_conf/mbed_os-usb_test_device2.cfg | 6 ++++++ 3 files changed, 30 insertions(+) create mode 100644 TESTS/usb_device/basic/zadig_conf/README.md create mode 100644 TESTS/usb_device/basic/zadig_conf/mbed_os-usb_test_device1.cfg create mode 100644 TESTS/usb_device/basic/zadig_conf/mbed_os-usb_test_device2.cfg diff --git a/TESTS/usb_device/basic/zadig_conf/README.md b/TESTS/usb_device/basic/zadig_conf/README.md new file mode 100644 index 00000000000..f738d15c83a --- /dev/null +++ b/TESTS/usb_device/basic/zadig_conf/README.md @@ -0,0 +1,18 @@ +# Generic USB driver installation on Windows machines + +In order to run the Mbed OS USB device test suite (`tests-usb_device-*`) +on Windows hosts you need to install generic USB drivers for two test devices. + +1. Download *Zadig* application from https://zadig.akeo.ie/. +1. Unplug the Mbed device. +1. Open *Zadig*. +1. Select *Device -> Load Preset Device*. +1. Open `mbed_os-usb_test_device1.cfg`. +1. Choose `libusb-win32 (v1.2.6.0)` driver. +1. Select `Install Driver` and click it. +1. Select *Device -> Load Preset Device*. +1. Open `mbed_os-usb_test_device2.cfg`. +1. Choose `libusb-win32 (v1.2.6.0)` driver. +1. Select `Install Driver` and click it. +1. Close *Zadig*. +1. Plug both device USB interfaces (*DAPLink* and *USB device*). diff --git a/TESTS/usb_device/basic/zadig_conf/mbed_os-usb_test_device1.cfg b/TESTS/usb_device/basic/zadig_conf/mbed_os-usb_test_device1.cfg new file mode 100644 index 00000000000..71e084a130f --- /dev/null +++ b/TESTS/usb_device/basic/zadig_conf/mbed_os-usb_test_device1.cfg @@ -0,0 +1,6 @@ +# Zadig device configuration +# Mbed OS USB test device -- basic tests +[device] +Description = "MBED TEST DEVICE" +VID = 0x0D28 +PID = 0x0205 diff --git a/TESTS/usb_device/basic/zadig_conf/mbed_os-usb_test_device2.cfg b/TESTS/usb_device/basic/zadig_conf/mbed_os-usb_test_device2.cfg new file mode 100644 index 00000000000..80caf3417d4 --- /dev/null +++ b/TESTS/usb_device/basic/zadig_conf/mbed_os-usb_test_device2.cfg @@ -0,0 +1,6 @@ +# Zadig device configuration +# Mbed OS USB test device -- endpoint tests +[device] +Description = "USB DEVICE" +VID = 0x0D28 +PID = 0x0206 From 5cd9dd1bda45adf99dfab4113fd99823fafdf385 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 20 Jun 2018 15:55:48 -0500 Subject: [PATCH 220/488] Update USBMSD to be more consistent with others Add second constructor and reorder constructor parameters to match other USB classes. Also remove the ready() function since there are no calls that can only mbe made from a ready state. --- usb/device/USBMSD/USBMSD.cpp | 35 ++++++++++++++++++++++++----------- usb/device/USBMSD/USBMSD.h | 35 +++++++++++++++++++++++------------ 2 files changed, 47 insertions(+), 23 deletions(-) diff --git a/usb/device/USBMSD/USBMSD.cpp b/usb/device/USBMSD/USBMSD.cpp index 01f0aa94043..79020201c0e 100644 --- a/usb/device/USBMSD/USBMSD.cpp +++ b/usb/device/USBMSD/USBMSD.cpp @@ -17,6 +17,7 @@ #include "stdint.h" #include "USBMSD.h" #include "EndpointResolver.h" +#include "usb_phy_api.h" #define DISK_OK 0x00 #define NO_INIT 0x01 @@ -61,11 +62,28 @@ enum Status { CSW_ERROR, }; -USBMSD::USBMSD(BlockDevice *bd, USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) +USBMSD::USBMSD(BlockDevice *bd, bool connect_blocking, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) + : USBDevice(get_usb_phy(), vendor_id, product_id, product_release), + _initialized(false), _in_task(&_queue), _out_task(&_queue), _reset_task(&_queue), _control_task(&_queue), _configure_task(&_queue), _bd(bd) +{ + _init(); + if (connect_blocking) { + connect(); + } else { + init(); + } +} + +USBMSD::USBMSD(USBPhy *phy, BlockDevice *bd, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) : USBDevice(phy, vendor_id, product_id, product_release), - _init(false), _in_task(&_queue), _out_task(&_queue), _reset_task(&_queue), _control_task(&_queue), _configure_task(&_queue) + _initialized(false), _in_task(&_queue), _out_task(&_queue), _reset_task(&_queue), _control_task(&_queue), _configure_task(&_queue), _bd(bd) +{ + _init(); +} + + +void USBMSD::_init() { - _bd = bd; _bd->init(); _in_task = callback(this, &USBMSD::_in); @@ -100,7 +118,7 @@ bool USBMSD::connect() _mutex.lock(); // already initialized - if (_init) { + if (_initialized) { _mutex.unlock(); _mutex_init.unlock(); return false; @@ -140,7 +158,7 @@ bool USBMSD::connect() //connect the device USBDevice::connect(); - _init = true; + _initialized = true; _mutex.unlock(); _mutex_init.unlock(); return true; @@ -152,7 +170,7 @@ void USBMSD::disconnect() _mutex.lock(); USBDevice::disconnect(); - _init = false; + _initialized = false; _in_task.cancel(); _out_task.cancel(); @@ -179,11 +197,6 @@ void USBMSD::disconnect() _mutex_init.unlock(); } -bool USBMSD::ready() -{ - return configured(); -} - void USBMSD::process() { _queue.dispatch(); diff --git a/usb/device/USBMSD/USBMSD.h b/usb/device/USBMSD/USBMSD.h index b133f53b0e1..d0584156fd4 100644 --- a/usb/device/USBMSD/USBMSD.h +++ b/usb/device/USBMSD/USBMSD.h @@ -25,7 +25,6 @@ #include "events/Task.h" #include "BlockDevice.h" #include "Mutex.h" -#include "usb_phy_api.h" #include "USBDevice.h" @@ -46,7 +45,6 @@ * USBMSD usb(&sd); * * int main() { - * usb.connect(); * * while(true) { * usb.process(); @@ -66,12 +64,31 @@ class USBMSD: public USBDevice { * for the block device to connect. * * @param bd BlockDevice to mount as a USB drive + * @param connect_blocking true to perform a blocking connect, false to start in a disconnected state + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your preoduct_release + */ + USBMSD(BlockDevice *bd, bool connect_blocking = true, uint16_t vendor_id = 0x0703, uint16_t product_id = 0x0104, uint16_t product_release = 0x0001); + + /** + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. + * * @param phy USB phy to use + * @param bd BlockDevice to mount as a USB drive * @param vendor_id Your vendor_id * @param product_id Your product_id * @param product_release Your preoduct_release */ - USBMSD(BlockDevice *bd, USBPhy *phy=get_usb_phy(), uint16_t vendor_id = 0x0703, uint16_t product_id = 0x0104, uint16_t product_release = 0x0001); + USBMSD(USBPhy *phy, BlockDevice *bd, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); /** * Destroy this object @@ -82,7 +99,7 @@ class USBMSD: public USBDevice { virtual ~USBMSD(); /** - * Connect the USB MSD device. Establish disk initialization before really connect the device. + * Connect the USB MSD device. * * @returns true if successful */ @@ -93,13 +110,6 @@ class USBMSD: public USBDevice { */ void disconnect(); - /** - * Check if USB is connected - * - * @return true if a USB is connected, false otherwise - */ - bool ready(); - /** * Perform USB processing */ @@ -190,7 +200,7 @@ class USBMSD: public USBDevice { } CSW; // If this class has been initialized - bool _init; + bool _initialized; //state of the bulk-only state machine Stage _stage; @@ -259,6 +269,7 @@ class USBMSD: public USBDevice { void _control(const setup_packet_t *request); void _configure(); + void _init(); void _process(); void _write_next(uint8_t *data, uint32_t size); void _read_next(); From a9bc48c9cd1dc03985ac4a076fa7f174e17f1b25 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 21 Jun 2018 09:54:51 -0500 Subject: [PATCH 221/488] Revert "Fix Kinetis bug causing USB to get stuck" Revert the commit "Fix Kinetis bug causing USB to get stuck sending" since this change causes stalls to be missed sometimes. --- .../targets/TARGET_Freescale/USBPhy_Kinetis.cpp | 14 +------------- 1 file changed, 1 insertion(+), 13 deletions(-) diff --git a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp index 763fa9cc139..8c277cc10e9 100644 --- a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp +++ b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp @@ -411,23 +411,11 @@ void USBPhyHw::endpoint_remove(usb_ep_t endpoint) void USBPhyHw::endpoint_stall(usb_ep_t endpoint) { - if (DESC_TO_LOG(endpoint) == 0) { - USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK; - } else { - uint8_t dir = DESC_EP_IN(endpoint) ? TX : RX; - uint32_t idx = EP_BDT_IDX(DESC_TO_LOG(endpoint), dir, 0); - bdt[idx].info |= BD_OWN_MASK | BD_STALL_MASK; - } + USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK; } void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) { - - if (DESC_TO_LOG(endpoint) != 0) { - uint8_t dir = DESC_EP_IN(endpoint) ? TX : RX; - uint32_t idx = EP_BDT_IDX(DESC_TO_LOG(endpoint), dir, 0); - bdt[idx].info &= ~(BD_OWN_MASK | BD_STALL_MASK); - } USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; } From 216031189890cc2705d25e7dc341c8160676fb05 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 13 Jun 2018 19:38:01 -0500 Subject: [PATCH 222/488] Alternate Kinetis USB stuck sending bug fix If an IN endpoint is stalled during a transfer then the data being sent will repeated and flood the USB bus. This patch prevents endpoints from being stalled in the middle of a transfer by control requests by keeping USB suspended until the setup phase of the control request is done. --- .../TARGET_Freescale/USBPhy_Kinetis.cpp | 35 +++++++++++++++++-- 1 file changed, 33 insertions(+), 2 deletions(-) diff --git a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp index 8c277cc10e9..ad2fb53907d 100644 --- a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp +++ b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp @@ -89,6 +89,7 @@ uint8_t ep1_buffer[2][MAX_PACKET_SIZE_EP1]; uint8_t ep2_buffer[2][MAX_PACKET_SIZE_EP2]; uint8_t ep3_buffer[2][MAX_PACKET_SIZE_EP3]; +static bool setup_suspend = false; static uint8_t set_addr = 0; static uint8_t addr = 0; static ctrl_xfer_t ctrl_xfer = CTRL_XFER_READY; @@ -317,6 +318,12 @@ void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) } else { endpoint_read(EP0OUT, data, size); } + + // Clear suspend after the setup stage + if (setup_suspend) { + USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; + setup_suspend = false; + } } uint32_t USBPhyHw::ep0_read_result() @@ -336,6 +343,12 @@ void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) ctrl_xfer = CTRL_XFER_READY; } endpoint_write(EP0IN, buffer, size); + + // Clear suspend after the setup stage + if (setup_suspend) { + USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; + setup_suspend = false; + } } void USBPhyHw::ep0_stall() @@ -345,6 +358,13 @@ void USBPhyHw::ep0_stall() return; } ctrl_xfer = CTRL_XFER_READY; + + // Clear suspend after the setup stage + if (setup_suspend) { + USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; + setup_suspend = false; + } + core_util_critical_section_enter(); endpoint_stall(EP0OUT); // Prepare for next setup packet @@ -503,7 +523,6 @@ bool USBPhyHw::endpoint_read_result_core(usb_ep_t endpoint, uint8_t *data, uint3 } } - USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; *bytes_read = sz; epComplete &= ~EP(DESC_TO_PHY(endpoint)); @@ -564,6 +583,7 @@ void USBPhyHw::process() } // enable control endpoint + setup_suspend = false; endpoint_add(EP0OUT, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); endpoint_add(EP0IN, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); @@ -608,7 +628,7 @@ void USBPhyHw::process() } // token interrupt - if (istat & 1<<3) { + if (istat & USB_ISTAT_TOKDNE_MASK) { uint32_t num = (USB0->STAT >> 4) & 0x0F; uint32_t dir = (USB0->STAT >> 3) & 0x01; uint32_t ev_odd = (USB0->STAT >> 2) & 0x01; @@ -616,6 +636,7 @@ void USBPhyHw::process() // setup packet if ((num == 0) && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == SETUP_TOKEN)) { + setup_suspend = true; Data1 |= 0x02 | 0x01; // set DATA1 for TX and RX bdt[EP_BDT_IDX(0, TX, EVEN)].info &= ~BD_OWN_MASK; bdt[EP_BDT_IDX(0, TX, ODD)].info &= ~BD_OWN_MASK; @@ -665,6 +686,16 @@ void USBPhyHw::process() USB0->ISTAT = USB_ISTAT_ERROR_MASK; } + // Check if the suspend condition should be removed here + // 1. Don't attempt to clear USB_CTL_TXSUSPENDTOKENBUSY_MASK if it isn't set. This + // is to avoid potential race conditions. + // 2. If a setup packet is being processed then remove suspend on the next control transfer rather than here + // 3. Process all pending packets before removing suspend + bool suspended = (USB0->CTL & USB_CTL_TXSUSPENDTOKENBUSY_MASK) != 0; + if (suspended && !setup_suspend && ((USB0->ISTAT & USB_ISTAT_TOKDNE_MASK) == 0)) { + USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; + } + NVIC_ClearPendingIRQ(USB0_IRQn); NVIC_EnableIRQ(USB0_IRQn); } From 61179752cf93a1d9edddc6395a0b9cf0c7e1fbfd Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 21 Jun 2018 10:19:40 -0500 Subject: [PATCH 223/488] Abort the current USB transfer when stalling It is undefined behavior if stalling and unstalling clears an ongoing transfer. Abort any ongoing transfers explicitly when stalling and unstalling so the behavior is consistent across devices. --- usb/device/USBDevice/USBDevice.cpp | 8 ++++++++ usb/device/USBDevice/USBDevice.h | 7 +++++++ 2 files changed, 15 insertions(+) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index b38fd67f58a..d2327ba5b19 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -1151,6 +1151,10 @@ void USBDevice::endpoint_stall(usb_ep_t endpoint) info->flags |= ENDPOINT_STALLED; _phy->endpoint_stall(endpoint); + if (info->pending) { + endpoint_abort(endpoint); + } + unlock(); } @@ -1172,6 +1176,10 @@ void USBDevice::endpoint_unstall(usb_ep_t endpoint) return; } + if (info->pending) { + endpoint_abort(endpoint); + } + info->flags &= ~ENDPOINT_STALLED; _phy->endpoint_unstall(endpoint); diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 133ea245223..5831df48b79 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -178,6 +178,9 @@ class USBDevice: public USBPhyEvents { /** * Stall an endpoint * + * If there is an ongoing transfer on this endpoint then it will + * be aborted. + * * @param endpoint Endpoint to stall * @note You cannot stall endpoint 0 with this function * @note This endpoint must already have been setup with endpoint_add @@ -187,6 +190,10 @@ class USBDevice: public USBPhyEvents { /** * Unstall an endpoint * + * Unstalling an endpoint resets data toggle back to DATA0. + * Additionally, if there is an ongoing transfer on this endpoint + * it will be aborted. + * * @param endpoint Endpoint to unstall * @note This endpoint must already have been setup with endpoint_add */ From 9138f1cd2e1eaedb9e26e9bd275d22a125ebeb9a Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 21 Jun 2018 11:25:01 -0500 Subject: [PATCH 224/488] Reset data toggle on Kinetis when unstalling Data toggle must be reset to DATA0 when an endpoint is unstalled. This patch makes that change. --- usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp index ad2fb53907d..16b0cd28569 100644 --- a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp +++ b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp @@ -436,6 +436,8 @@ void USBPhyHw::endpoint_stall(usb_ep_t endpoint) void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) { + // Next transfer will be a DATA0 packet + Data1 &= ~(1 << DESC_TO_PHY(endpoint)); USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; } From 59049b1226ed42fa512fb5f763e79566c9d82033 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 23 Jun 2018 20:30:23 -0500 Subject: [PATCH 225/488] Revert "Create HAL_PCD_EP_Abort" Revert the patch "Create HAL_PCD_EP_Abort" in preparation for an alternate fix. --- .../TARGET_STM32F2/device/stm32f2xx_hal_pcd.c | 22 -------- .../TARGET_STM32F2/device/stm32f2xx_hal_pcd.h | 1 - .../TARGET_STM32F2/device/stm32f2xx_ll_usb.c | 55 ------------------- .../TARGET_STM32F2/device/stm32f2xx_ll_usb.h | 1 - .../targets/TARGET_STM/USBPhy_STM32.cpp | 4 -- 5 files changed, 83 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c index 8d1915a88dc..ee1703bbd10 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c @@ -1042,28 +1042,6 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); return HAL_OK; } -/** - * @brief Abort a transaction. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @param pBuf: pointer to the transmission buffer - * @param len: amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - HAL_StatusTypeDef ret; - USB_OTG_EPTypeDef *ep; - - ep = &hpcd->IN_ep[ep_addr & 0x7F]; - - /*setup and start the Xfer */ - __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); - ret = USB_EPStopXfer(hpcd->Instance , ep, hpcd->Init.dma_enable); - - __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); - return ret; -} /** * @brief Set a STALL condition over an endpoint. diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h index 610c8456e95..f617e6d8de6 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h @@ -271,7 +271,6 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); -HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c index 02b936b5925..b4799572c43 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c @@ -745,61 +745,6 @@ HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeD } return HAL_OK; } -/** - * @brief USB_EPStoptXfer : setup and starts a transfer over an EP - * @param USBx : Selected device - * @param ep: pointer to endpoint structure - * @param dma: USB dma enabled or disabled - * This parameter can be one of these values: - * 0 : DMA feature not used - * 1 : DMA feature used - * @retval HAL status - */ -HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma) -{ - HAL_StatusTypeDef ret = HAL_OK; - /* IN endpoint */ - if (ep->is_in == 1U) - { - - /* EP enable, IN data in FIFO */ - if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) - { - volatile uint32_t loop=0; - USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_EPDIS); - while(((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) - {/* data sheet say that EPDISD: Endpoint disabled interrupt must be raised - to consider the endpoint as disable */ - /* fix me loop for test only */ - loop++; - if (loop > 10000L) { - ret =HAL_ERROR; - break; - } - } - } - } - else /* OUT endpoint */ - { - if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) - { - volatile uint32_t loop=0; - USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_EPDIS); - while(((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) - {/* data sheet say that EPDISD: Endpoint disabled interrupt must be raised - to consider the endpoint as disable */ - /* Fix me loop for test only */ - loop++; - if (loop > 10000L) { - ret =HAL_ERROR; - break; - } - } - } - } - return ret; -} - /** * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h index ac6cc496df3..ebbb5987613 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h @@ -404,7 +404,6 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EP HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); -HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma); void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len); diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 91facb63698..5bb99c5b017 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -476,10 +476,6 @@ bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) void USBPhyHw::endpoint_abort(usb_ep_t endpoint) { // TODO - stop the current transfer on this endpoint and don't call the IN or OUT callback - HAL_StatusTypeDef ret; - ret = HAL_PCD_EP_Abort(&hpcd, endpoint); - MBED_ASSERT(ret==HAL_OK); - return; } void USBPhyHw::process() From 79533272af4c5a85ac1f3b4959946d376edc7c8b Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 25 Jun 2018 17:44:39 -0500 Subject: [PATCH 226/488] Alternate implementation of HAL_PCD_EP_Abort Update the patch "Create HAL_PCD_EP_Abort" to fix bugs. This patch adds the low level functions USB_EPStopXfer, USB_EPSetNak, USB_EPClearNak and the high level function HAL_PCD_EP_Abort so that transfers can be stopped. The functions USB_EPSetNak and USB_EPClearNak allow nak to be enabled or disabled for an endpoint, preventing or allowing further transfers. The function USB_EPStopXfer stops pending reads and writes started by USB_EPStartXfer along with clearing and masking any interrupts enabled by USB_EPStartXfer. The function HAL_PCD_EP_Abort aborts any transfers on the given endpoint. When this function completes the transfer interrupt is guarenteed not to fire for this endpoint. Furthermore, the size of data transferred during an aborted read can be found by calling the function HAL_PCD_EP_GetRxCount. Other notes on this Change: 1. Prior to this patch the interrupt USB_OTG_DOEPINT_EPDISD was not handled. When an OUT endpoint was disabled this interrupt occurred causing the CPU to get stuck repeatedly handling this interrupt. This is because this interrupt was unmasked but nothing cleared this interrupt. This patch also adds code to handle and clear this interrupt to prevent a lockup. 2. Stopping a transfer on an OUT endpoint requires global nak OUT to be in effect. Even with this being done, having entries in the rx fifo prevented an OUT endpoint from being disabled. This behavior is not mentioned in the Reference Manual. --- .../TARGET_STM32F2/device/stm32f2xx_hal_pcd.c | 143 ++++++++++++--- .../TARGET_STM32F2/device/stm32f2xx_hal_pcd.h | 1 + .../TARGET_STM32F2/device/stm32f2xx_ll_usb.c | 166 ++++++++++++++++++ .../TARGET_STM32F2/device/stm32f2xx_ll_usb.h | 3 + 4 files changed, 291 insertions(+), 22 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c index ee1703bbd10..415c279307d 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c @@ -104,6 +104,7 @@ * @{ */ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t epnum); +static HAL_StatusTypeDef PCD_ReadRxFifo(PCD_HandleTypeDef *hpcd); /** * @} */ @@ -314,7 +315,6 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; uint32_t i = 0U, ep_intr = 0U, epint = 0U, epnum = 0U; uint32_t fifoemptymsk = 0U, temp = 0U; - USB_OTG_EPTypeDef *ep; uint32_t hclk = 120000000U; /* ensure that we are in device mode */ @@ -366,6 +366,11 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) } } + if (( epint & USB_OTG_DOEPINT_EPDISD) == USB_OTG_DOEPINT_EPDISD) + { + CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_EPDISD); + } + if(( epint & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP) { /* Inform the upper layer that a setup packet is available */ @@ -596,27 +601,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) /* Handle RxQLevel Interrupt */ if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) { - USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); - - temp = USBx->GRXSTSP; - - ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM]; - - if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_DATA_UPDT) - { - if((temp & USB_OTG_GRXSTSP_BCNT) != 0U) - { - USB_ReadPacket(USBx, ep->xfer_buff, (temp & USB_OTG_GRXSTSP_BCNT) >> 4U); - ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; - ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; - } - } - else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_SETUP_UPDT) - { - USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U); - ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; - } - USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); + PCD_ReadRxFifo(hpcd); } /* Handle SOF Interrupt */ @@ -1043,6 +1028,84 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, return HAL_OK; } +/** + * @brief Abort a transaction. + * @param hpcd: PCD handle + * @param ep_addr: endpoint address + * @retval HAL status + */ +HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) +{ + USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; + HAL_StatusTypeDef ret = HAL_OK; + USB_OTG_EPTypeDef *ep; + + if ((0x80 & ep_addr) == 0x80) + { + ep = &hpcd->IN_ep[ep_addr & 0x7F]; + } + else + { + ep = &hpcd->OUT_ep[ep_addr]; + } + + __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); + + ep->num = ep_addr & 0x7F; + ep->is_in = ((ep_addr & 0x80) == 0x80); + + USB_EPSetNak(hpcd->Instance, ep); + + if ((0x80 & ep_addr) == 0x80) + { + ret = USB_EPStopXfer(hpcd->Instance , ep); + if (ret == HAL_OK) + { + ret = USB_FlushTxFifo(hpcd->Instance, ep_addr & 0x7F); + } + } + else + { + /* Set global NAK */ + USBx_DEVICE->DCTL |= USB_OTG_DCTL_SGONAK; + + /* Read all entries from the fifo so global NAK takes effect */ + while (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) + { + PCD_ReadRxFifo(hpcd); + } + + /* Stop the transfer */ + ret = USB_EPStopXfer(hpcd->Instance , ep); + if (ret == HAL_BUSY) + { + /* If USB_EPStopXfer returns HAL_BUSY then a setup packet + * arrived after the rx fifo was processed but before USB_EPStopXfer + * was called. Process the rx fifo one more time to read the + * setup packet. + * + * Note - after the setup packet has been received no further + * packets will be received over USB. This is because the next + * phase (data or status) of the control transfer started by + * the setup packet will be naked until global nak is cleared. + */ + while (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) + { + PCD_ReadRxFifo(hpcd); + } + + ret = USB_EPStopXfer(hpcd->Instance , ep); + } + + /* Clear global nak */ + USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGONAK; + } + + __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); + + return ret; +} + /** * @brief Set a STALL condition over an endpoint. * @param hpcd: PCD handle @@ -1256,6 +1319,42 @@ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t return HAL_OK; } +/** + * @brief Process the next RX fifo entry + * @param hpcd: PCD handle + * @retval HAL status + */ +static HAL_StatusTypeDef PCD_ReadRxFifo(PCD_HandleTypeDef *hpcd) +{ + USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; + USB_OTG_EPTypeDef *ep; + uint32_t temp = 0; + + USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); + + temp = USBx->GRXSTSP; + + ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM]; + + if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_DATA_UPDT) + { + if((temp & USB_OTG_GRXSTSP_BCNT) != 0U) + { + USB_ReadPacket(USBx, ep->xfer_buff, (temp & USB_OTG_GRXSTSP_BCNT) >> 4U); + ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; + ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; + } + } + else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_SETUP_UPDT) + { + USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U); + ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; + } + USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); + + return HAL_OK; +} + /** * @} */ diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h index f617e6d8de6..610c8456e95 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h @@ -271,6 +271,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); +HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c index b4799572c43..c15db199e7e 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c @@ -746,6 +746,96 @@ HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeD return HAL_OK; } +/** + * @brief USB_EPStoptXfer : stop transfer on this endpoint + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @retval HAL status + * @note IN endpoints must have NAK enabled before calling this function + * @note OUT endpoints must have global out NAK enabled before calling this + * function. Furthermore, the RX fifo must be empty or the status + * HAL_BUSY will be returned. + */ +HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep) +{ + HAL_StatusTypeDef ret = HAL_OK; + uint32_t count = 0U; + uint32_t epint, fifoemptymsk; + + /* IN endpoint */ + if (ep->is_in == 1U) + { + + /* EP enable, IN data in FIFO */ + if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) + { + /* Disable this endpoint */ + USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_EPDIS; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_INEP(ep->num)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA); + } + + /* Clear transfer complete interrupt */ + epint = USB_ReadDevInEPInterrupt(USBx, ep->num); + if((epint & USB_OTG_DIEPINT_XFRC) == USB_OTG_DIEPINT_XFRC) + { + CLEAR_IN_EP_INTR(ep->num, USB_OTG_DIEPINT_XFRC); + } + + /* Mask fifo empty interrupt */ + fifoemptymsk = 0x1U << ep->num; + atomic_clr_u32(&USBx_DEVICE->DIEPEMPMSK, fifoemptymsk); + } + else /* OUT endpoint */ + { + if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) + { + /* Disable this endpoint */ + USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_EPDIS; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + if ((USBx->GINTSTS & USB_OTG_GINTSTS_RXFLVL) == USB_OTG_GINTSTS_RXFLVL) + { + /* Although not mentioned in the Reference Manual, it appears that the + * rx fifo must be empty for an OUT endpoint to be disabled. Typically + * this will happen when setting the global OUT nak (required by Reference + * Manual) as this requires processing the rx fifo. This is not guaranteed + * though, as a setup packet can arrive even while global OUT nak is set. + * + * During testing this event was observed and prevented endpoint disabling + * from completing until the rx fifo was empty. To address this problem + * return HAL_BUSY if the rx fifo is not empty to give higher level code + * a chance to clear the fifo and retry the operation. + * + */ + return HAL_BUSY; + } + } + while ((USBx_OUTEP(ep->num)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA); + } + + /* Clear interrupt */ + epint = USB_ReadDevOutEPInterrupt(USBx, ep->num); + if(( epint & USB_OTG_DOEPINT_XFRC) == USB_OTG_DOEPINT_XFRC) + { + CLEAR_OUT_EP_INTR(ep->num, USB_OTG_DOEPINT_XFRC); + } + } + return ret; +} + /** * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated * with the EP/channel @@ -855,6 +945,82 @@ HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDe return HAL_OK; } +/** + * @brief USB_EPSetNak : stop transfer and nak all tokens on this endpoint + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @retval HAL status + */ +HAL_StatusTypeDef USB_EPSetNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep) +{ + uint32_t count = 0; + if (ep->is_in == 1U) + { + USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_INEP(ep->num)->DIEPCTL & USB_OTG_DIEPCTL_NAKSTS) != USB_OTG_DIEPCTL_NAKSTS); + } + else + { + USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_OUTEP(ep->num)->DOEPCTL & USB_OTG_DOEPCTL_NAKSTS) != USB_OTG_DOEPCTL_NAKSTS); + } + return HAL_OK; +} + +/** + * @brief USB_EPSetNak : resume transfer and stop naking on this endpoint + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @retval HAL status + */ +HAL_StatusTypeDef USB_EPClearNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep) +{ + uint32_t count = 0; + if (ep->is_in == 1U) + { + USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_CNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_INEP(ep->num)->DIEPCTL & USB_OTG_DIEPCTL_NAKSTS) == USB_OTG_DIEPCTL_NAKSTS); + } + else + { + USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_OUTEP(ep->num)->DOEPCTL & USB_OTG_DOEPCTL_NAKSTS) == USB_OTG_DOEPCTL_NAKSTS); + } + return HAL_OK; +} + /** * @brief USB_StopDevice : Stop the usb device mode * @param USBx : Selected device diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h index ebbb5987613..1d04629847c 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h @@ -404,11 +404,14 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EP HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); +HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma); void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len); HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); +HAL_StatusTypeDef USB_EPSetNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); +HAL_StatusTypeDef USB_EPClearNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address); HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx); HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx); From cb7a6fd5cad02bb03bdae39b36a950c096ae687a Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 25 Jun 2018 17:48:53 -0500 Subject: [PATCH 227/488] Implement endpoint_abort for STM32 Make use of the added function HAL_PCD_EP_Abort to implement endpoint_abort. --- usb/device/targets/TARGET_STM/USBPhy_STM32.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 5bb99c5b017..33a80921f20 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -475,7 +475,8 @@ bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) void USBPhyHw::endpoint_abort(usb_ep_t endpoint) { - // TODO - stop the current transfer on this endpoint and don't call the IN or OUT callback + HAL_StatusTypeDef ret = HAL_PCD_EP_Abort(&hpcd, endpoint); + MBED_ASSERT(ret==HAL_OK); } void USBPhyHw::process() From 7754706477ed31a2ad83876c5fa99006ea337258 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 25 Jun 2018 17:55:03 -0500 Subject: [PATCH 228/488] Fix ST test failures due to endpoint reconfiguration Also always use the max endpoint size for SetTxFifo since re-configuring fifos when endpoints are added or removed causes tests to fail. --- .../targets/TARGET_STM/USBPhy_STM32.cpp | 79 +++++++++++++------ 1 file changed, 56 insertions(+), 23 deletions(-) diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 33a80921f20..7990dc02fb0 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -41,6 +41,19 @@ #define LOG_OUT_TO_EP(ep) ((ep) | 0x00) #define IDX_TO_EP(ep) (((ep) >> 1)|((ep) & 1) << 7) +/* endpoint defines */ +#define NUM_ENDPOINTS 4 +#define MAX_PACKET_NON_ISO 64 +#define MAX_PACKET_ISO (256 + 128) // Spec can go up to 1023, only ram for this though +#define ENDPOINT_NON_ISO (USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_ALLOW_INT) + +static const uint32_t tx_ep_sizes[NUM_ENDPOINTS] = { + MAX_PACKET_NON_ISO, + MAX_PACKET_NON_ISO, + MAX_PACKET_NON_ISO, + MAX_PACKET_ISO +}; + uint32_t HAL_PCDEx_GetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo) { uint32_t len; @@ -274,11 +287,28 @@ void USBPhyHw::init(USBPhyEvents *events) hpcd.State = HAL_PCD_STATE_RESET; HAL_PCD_Init(&hpcd); + + uint32_t total_bytes = 0; + + /* Reserve space in the RX buffer for: + * - 1 isochonous packet + * - 2 max sized non-isochonous packets + * - setup buffer - 10 words as specified by Reference Manual + * - global nak out - 1 words as specified by Reference Manual + */ + uint32_t fifo_size = (MAX_PACKET_ISO + 4) + (MAX_PACKET_NON_ISO + 4) * 2 + (10 * 4) + (1 * 4); + HAL_PCDEx_SetRxFiFo(&hpcd, (fifo_size / 4)); + total_bytes += fifo_size; + + /* Reserve Tx space up front */ + for (int i = 0; i < NUM_ENDPOINTS; i++) { + fifo_size = tx_ep_sizes[i] + 4; + HAL_PCDEx_SetTxFiFo(&hpcd, i, fifo_size / 4); + total_bytes += fifo_size; + } + /* 1.25 kbytes */ - /* min value 16 (= 16 x 4 bytes) */ - /* max value 256 (= 1K bytes ) */ - /* maximum sum is 0x140 */ - HAL_PCDEx_SetRxFiFo(&hpcd, (MAXTRANSFER_SIZE / 4)); + MBED_ASSERT(total_bytes <= 1280); // Configure interrupt vector NVIC_SetVector(USBHAL_IRQn, (uint32_t)&_usbisr); @@ -340,24 +370,24 @@ void USBPhyHw::remote_wakeup() const usb_ep_table_t *USBPhyHw::endpoint_table() { static const usb_ep_table_t table = { - 1280, // 1.25K for endpoint buffers + 1280, // 1.25K for endpoint buffers but space is allocated up front { - {USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 80}, - {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4} + {USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0} } }; return &table; @@ -409,9 +439,12 @@ void USBPhyHw::ep0_stall() bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type) { uint32_t len; - if (max_packet > MAXTRANSFER_SIZE) return false; + + /* + * Endpoints are configured in init since re-configuring + * fifos when endpoints are added or removed causes tests to fail. + */ if (endpoint & 0x80) { - HAL_PCDEx_SetTxFiFo(&hpcd, endpoint & 0x7f, (max_packet / 4) + 1); len = HAL_PCDEx_GetTxFiFo(&hpcd,endpoint & 0x7f); MBED_ASSERT(len >= max_packet); } From 9635f02e6a696e82281c7870e517659cce1e7485 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 25 Jun 2018 18:06:55 -0500 Subject: [PATCH 229/488] Remove OR from ST endpoint activation When activating an endpoint assign new data rather than ORing data to it. This ensures that values set from the previous use do not effect the current configuration. --- .../TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c index c15db199e7e..5317615b256 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c @@ -430,7 +430,7 @@ HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTy if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0U) { - USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U ) |\ + USBx_INEP(ep->num)->DIEPCTL = ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U ) |\ ((ep->num) << 22U ) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP)); } @@ -441,7 +441,7 @@ HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTy if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0U) { - USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U ) |\ + USBx_OUTEP(ep->num)->DOEPCTL = ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U ) |\ (USB_OTG_DIEPCTL_SD0PID_SEVNFRM)| (USB_OTG_DOEPCTL_USBAEP)); } } @@ -462,7 +462,7 @@ HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB { if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0U) { - USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U) |\ + USBx_INEP(ep->num)->DIEPCTL = ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U) |\ ((ep->num) << 22U) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP)); } @@ -476,7 +476,7 @@ HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB { if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0U) { - USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U) |\ + USBx_OUTEP(ep->num)->DOEPCTL = ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U) |\ ((ep->num) << 22U) | (USB_OTG_DOEPCTL_USBAEP)); debug = (uint32_t)(((uint32_t )USBx) + USB_OTG_OUT_ENDPOINT_BASE + (0U)*USB_OTG_EP_REG_SIZE); From 9bbd26847343a3e7ff4580198111cdf2d26ab75d Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Mon, 19 Mar 2018 16:41:55 +0100 Subject: [PATCH 230/488] USB: EndpointResolver: Add a generic method to get a free endpoint --- usb/device/USBDevice/EndpointResolver.cpp | 21 ++++++++------------- usb/device/USBDevice/EndpointResolver.h | 5 +++++ 2 files changed, 13 insertions(+), 13 deletions(-) diff --git a/usb/device/USBDevice/EndpointResolver.cpp b/usb/device/USBDevice/EndpointResolver.cpp index e06b8929600..05ced02866a 100644 --- a/usb/device/USBDevice/EndpointResolver.cpp +++ b/usb/device/USBDevice/EndpointResolver.cpp @@ -44,9 +44,9 @@ void EndpointResolver::endpoint_ctrl(uint32_t size) endpoint_out(USB_EP_TYPE_CTRL, size); } -usb_ep_t EndpointResolver::endpoint_in(usb_ep_type_t type, uint32_t size) +usb_ep_t EndpointResolver::next_free_endpoint(bool in_not_out, usb_ep_type_t type, uint32_t size) { - int index = next_index(type, true); + int index = next_index(type, in_not_out); if (index < 0) { _valid = false; return 0; @@ -57,21 +57,16 @@ usb_ep_t EndpointResolver::endpoint_in(usb_ep_type_t type, uint32_t size) _used |= 1 << index; return index_to_endpoint(index); + +} +usb_ep_t EndpointResolver::endpoint_in(usb_ep_type_t type, uint32_t size) +{ + return next_free_endpoint(true, type, size); } usb_ep_t EndpointResolver::endpoint_out(usb_ep_type_t type, uint32_t size) { - int index = next_index(type, false); - if (index < 0) { - _valid = false; - return 0; - } - - const usb_ep_entry_t &entry = _table->table[index_to_logical(index)]; - _cost += entry.base_cost + entry.byte_cost * size; - _used |= 1 << index; - - return index_to_endpoint(index); + return next_free_endpoint(false, type, size); } bool EndpointResolver::valid() diff --git a/usb/device/USBDevice/EndpointResolver.h b/usb/device/USBDevice/EndpointResolver.h index 04f7d188f8e..a0a9a93e8fc 100644 --- a/usb/device/USBDevice/EndpointResolver.h +++ b/usb/device/USBDevice/EndpointResolver.h @@ -62,6 +62,11 @@ class EndpointResolver { */ usb_ep_t endpoint_out(usb_ep_type_t type, uint32_t size); + /** + * Get next free endpoint + */ + usb_ep_t next_free_endpoint(bool in_not_out, usb_ep_type_t type, uint32_t size); + /** * Check if the endpoint configuration created so far is valid * From 1aa5b616a67a99813e34acf96b9cb2b827a7ebe6 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Wed, 28 Mar 2018 11:35:37 +0200 Subject: [PATCH 231/488] Tests: USB: Generic: Add basic endpoint tests --- TESTS/host_tests/pyusb_basic.py | 428 ++++++++++- TESTS/usb_device/basic/USBEndpointTester.cpp | 767 +++++++++++++++++++ TESTS/usb_device/basic/USBEndpointTester.h | 108 +++ TESTS/usb_device/basic/main.cpp | 161 +++- 4 files changed, 1459 insertions(+), 5 deletions(-) create mode 100644 TESTS/usb_device/basic/USBEndpointTester.cpp create mode 100644 TESTS/usb_device/basic/USBEndpointTester.h diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index d9c9f2e0b00..4aba71bcb4d 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -21,7 +21,9 @@ import time import sys import inspect -from threading import Thread +from threading import Thread, Event, Timer +import array +import random import usb.core from usb.util import build_request_type @@ -33,7 +35,7 @@ DESC_TYPE_INTERFACE, DESC_TYPE_ENDPOINT) import struct -from collections import namedtuple + def get_interface(dev, interface, alternate=0): intf = None @@ -102,6 +104,12 @@ def get_interface(dev, interface, alternate=0): interface_descriptor_keys = ['bLength', 'bDescriptorType', 'bEndpointAddress', 'bmAttributes', 'wMaxPacketSize', 'bInterval'] +ENDPOINT_TYPE_NAMES = { + usb.ENDPOINT_TYPE_BULK: 'BULK', + usb.ENDPOINT_TYPE_CONTROL: 'CONTROL', + usb.ENDPOINT_TYPE_INTERRUPT: 'INTERRUPT', + usb.ENDPOINT_TYPE_ISOCHRONOUS: 'ISOCHRONOUS'} + class PyusbBasicTest(BaseHostTest): def _callback_control_basic_test(self, key, value, timestamp): @@ -162,7 +170,6 @@ def _callback_control_stress_test(self, key, value, timestamp): except (RuntimeError) as exc: self.report_error(exc) - def _callback_device_reset_test(self, key, value, timestamp): self.log("Received serial %s" % (value)) @@ -217,6 +224,71 @@ def _callback_repeated_construction_destruction_test(self, key, value, timestamp except (RuntimeError) as exc: self.report_error(exc) + def _callback_ep_test_data_correctness(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + ep_test_data_correctness(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + def _callback_ep_test_halt(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + ep_test_halt(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + def _callback_ep_test_parallel_transfers(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + ep_test_parallel_transfers(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + def _callback_ep_test_parallel_transfers_ctrl(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + ep_test_parallel_transfers_ctrl(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + def _callback_ep_test_abort(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + ep_test_abort(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + def _callback_reset_support(self, key, value, timestamp): status = "false" if sys.platform == "darwin" else "true" self.log("Reset supported: %s" % status) @@ -267,6 +339,12 @@ def setup(self): self.register_callback('device_suspend_resume_test', self._callback_device_suspend_resume_test) self.register_callback('repeated_construction_destruction_test', self._callback_repeated_construction_destruction_test) + self.register_callback('ep_test_data_correctness', self._callback_ep_test_data_correctness) + self.register_callback('ep_test_halt', self._callback_ep_test_halt) + self.register_callback('ep_test_parallel_transfers', self._callback_ep_test_parallel_transfers) + self.register_callback('ep_test_parallel_transfers_ctrl', self._callback_ep_test_parallel_transfers_ctrl) + self.register_callback('ep_test_abort', self._callback_ep_test_abort) + self.register_callback('reset_support', self._callback_reset_support) @@ -837,6 +915,350 @@ def control_stress_test(dev, log): count += 1 +def find_ep_pair(intf, endpoint_type): + ep_out = usb.util.find_descriptor( + intf, custom_match=lambda e: + usb.util.endpoint_type(e.bmAttributes) == endpoint_type and + usb.util.endpoint_direction(e.bEndpointAddress) == usb.ENDPOINT_OUT) + ep_in = usb.util.find_descriptor( + intf, custom_match=lambda e: + usb.util.endpoint_type(e.bmAttributes) == endpoint_type and + usb.util.endpoint_direction(e.bEndpointAddress) == usb.ENDPOINT_IN) + if not all((ep_out, ep_in)): + raise_unconditionally(lineno(), 'Unable to find {} endpoint pair.' + .format(ENDPOINT_TYPE_NAMES[endpoint_type])) + raise_if_different(ep_out.wMaxPacketSize, ep_in.wMaxPacketSize, lineno(), + 'wMaxPacketSize not equal for OUT and IN {} endpoints.' + .format(ENDPOINT_TYPE_NAMES[endpoint_type])) + return ep_out, ep_in + + +def loopback_ep_test(ep_out, ep_in, payload_size): + payload_out = array.array('B', (random.randint(0x00, 0xff) for _ in range(payload_size))) + ep_out.write(payload_out) + payload_in = ep_in.read(ep_in.wMaxPacketSize) + raise_if_different(payload_out, payload_in, lineno(), 'Payloads mismatch.') + + +def random_size_loopback_ep_test(ep_out, ep_in, failure, error, seconds, log, min_payload_size=1): + end_ts = time.time() + seconds + while time.time() < end_ts and not failure.is_set() and not error.is_set(): + payload_size = random.randint(min_payload_size, ep_out.wMaxPacketSize) + try: + loopback_ep_test(ep_out, ep_in, payload_size) + except RuntimeError as err: + log(err) + failure.set() + return + except usb.USBError as err: + log(USB_ERROR_FMT.format(err, ep_out, ep_in, payload_size)) + error.set() + return + time.sleep(0.01) + + +def halt_ep_test(dev, ep_out, ep_in, ep_to_halt, log): + MIN_HALT_DELAY = 0.01 + MAX_HALT_DELAY = 0.1 + delay = random.uniform(MIN_HALT_DELAY, MAX_HALT_DELAY) + ctrl_kwargs = { + 'bmRequestType': build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, CTRL_RECIPIENT_ENDPOINT), + 'bRequest': REQUEST_SET_FEATURE, + 'wValue': FEATURE_ENDPOINT_HALT, + 'wIndex': ep_to_halt.bEndpointAddress} + ctrl_error = Event() + + def timer_handler(): + try: + dev.ctrl_transfer(**ctrl_kwargs) + except Exception as err: + log('Endpoint {:#04x} halt failed ({}).'.format(ctrl_kwargs['wIndex'], err)) + ctrl_error.set() + + delayed_halt = Timer(delay, timer_handler) + delayed_halt.start() + end_ts = time.time() + 1.5 * delay + try: + while time.time() < end_ts and not ctrl_error.is_set(): + loopback_ep_test(ep_out, ep_in, ep_out.wMaxPacketSize) + except usb.core.USBError as err: + if err.errno not in (32, 110): + raise_unconditionally(lineno(), 'Unexpected error ({!r}).'.format(err)) + if ctrl_error.is_set(): + raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x} failed' + .format(ep_to_halt)) + else: + raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x}' + ' during transmission did not raise USBError.' + .format(ep_to_halt)) + + +USB_ERROR_FMT = str('Got {0!r} while testing endpoints ' + '{1.bEndpointAddress:#04x}({1.wMaxPacketSize:02}) and ' + '{2.bEndpointAddress:#04x}({2.wMaxPacketSize:02}) with a random payload of {3} B.') + + +def ep_test_data_correctness(dev, log, verbose=False): + cfg = dev.get_active_configuration() + for intf in cfg: + log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') + if intf.bAlternateSetting == 0: + log('skipping the default AlternateSetting') + continue + log('running tests') + intf.set_altsetting() + + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + interrupt_out, interrupt_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_INTERRUPT) + iso_out, iso_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_ISOCHRONOUS) + + if verbose: + log('\tbulk_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_out)) + log('\tbulk_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_in)) + log('\tinterrupt_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_out)) + log('\tinterrupt_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_in)) + log('\tiso_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_out)) + log('\tiso_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_in)) + + if verbose: + log('Testing OUT/IN data correctness for bulk endpoint pair.') + for payload_size in range(1, bulk_out.wMaxPacketSize + 1): + try: + loopback_ep_test(bulk_out, bulk_in, payload_size) + except usb.USBError as err: + raise_unconditionally(lineno(), USB_ERROR_FMT.format(err, bulk_out, bulk_in, payload_size)) + + if verbose: + log('Testing OUT/IN data correctness for interrupt endpoint pair.') + for payload_size in range(interrupt_out.wMaxPacketSize + 1): + try: + loopback_ep_test(interrupt_out, interrupt_in, payload_size) + except usb.USBError as err: + raise_unconditionally(lineno(), USB_ERROR_FMT.format(err, interrupt_out, interrupt_in, payload_size)) + +# if verbose: +# log('Testing OUT/IN data correctness for isochronous endnpoint pair.') +# payload_size = 128 # range(1, iso_out.wMaxPacketSize + 1): +# try: +# loopback_ep_test(iso_out, iso_in, payload_size) +# except usb.USBError as err: +# log(err) +# raise_unconditionally(lineno(), USB_ERROR_FMT.format(err, iso_out, iso_in, payload_size)) + + +def ep_test_halt(dev, log, verbose=False): + cfg = dev.get_active_configuration() + for intf in cfg: + log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') + if intf.bAlternateSetting == 0: + log('skipping the default AlternateSetting') + continue + log('running tests') + intf.set_altsetting() + + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + interrupt_out, interrupt_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_INTERRUPT) + iso_out, iso_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_ISOCHRONOUS) + + if verbose: + log('\tbulk_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_out)) + log('\tbulk_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_in)) + log('\tinterrupt_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_out)) + log('\tinterrupt_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_in)) + log('\tiso_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_out)) + log('\tiso_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_in)) + + if verbose: + log('Testing endpoint halt at a random point of bulk transmission.') + end_ts = time.time() + 1.0 + while time.time() < end_ts: + halt_ep_test(dev, bulk_out, bulk_in, bulk_out, log) + bulk_out.clear_halt() + intf.set_altsetting() # Force the device to start reading data from all OUT endpoints again. + halt_ep_test(dev, bulk_out, bulk_in, bulk_in, log) + bulk_in.clear_halt() + intf.set_altsetting() # Force the device to start reading data from all OUT endpoints again. + + if verbose: + log('Testing endpoint halt at a random point of interrupt transmission.') + end_ts = time.time() + 1.0 + while time.time() < end_ts: + halt_ep_test(dev, interrupt_out, interrupt_in, interrupt_out, log) + interrupt_out.clear_halt() + intf.set_altsetting() # Force the device to start reading data from all OUT endpoints again. + halt_ep_test(dev, interrupt_out, interrupt_in, interrupt_in, log) + interrupt_out.clear_halt() + intf.set_altsetting() # Force the device to start reading data from all OUT endpoints again. + + +def ep_test_parallel_transfers(dev, log, verbose=False): + cfg = dev.get_active_configuration() + for intf in cfg: + log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') + if intf.bAlternateSetting == 0: + log('skipping the default AlternateSetting') + continue + log('running tests') + intf.set_altsetting() + + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + interrupt_out, interrupt_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_INTERRUPT) + iso_out, iso_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_ISOCHRONOUS) + + if verbose: + log('\tbulk_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_out)) + log('\tbulk_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_in)) + log('\tinterrupt_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_out)) + log('\tinterrupt_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_in)) + log('\tiso_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_out)) + log('\tiso_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_in)) + + if verbose: + log('Testing simultaneous transfers through bulk and interrupt endpoint pairs.') + test_error = Event() + test_failure = Event() + test_kwargs_bulk_ep = { + 'ep_out': bulk_out, + 'ep_in': bulk_in, + 'failure': test_failure, + 'error': test_error, + 'seconds': 1.0, + 'log': log} + test_kwargs_interrupt_ep = { + 'ep_out': interrupt_out, + 'ep_in': interrupt_in, + 'failure': test_failure, + 'error': test_error, + 'seconds': 1.0, + 'log': log} + ep_test_threads = [] + for kwargs in (test_kwargs_bulk_ep, test_kwargs_interrupt_ep): + ep_test_threads.append(Thread(target=random_size_loopback_ep_test, kwargs=kwargs)) + for t in ep_test_threads: + t.start() + for t in ep_test_threads: + t.join() + if test_failure.is_set(): + raise_unconditionally(lineno(), 'Payload mismatch') + if test_error.is_set(): + raise_unconditionally(lineno(), 'USBError') + + +def ep_test_parallel_transfers_ctrl(dev, log, verbose=False): + cfg = dev.get_active_configuration() + for intf in cfg: + log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') + if intf.bAlternateSetting == 0: + log('skipping the default AlternateSetting') + continue + log('running tests') + intf.set_altsetting() + + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + interrupt_out, interrupt_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_INTERRUPT) + iso_out, iso_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_ISOCHRONOUS) + + if verbose: + log('\tbulk_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_out)) + log('\tbulk_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_in)) + log('\tinterrupt_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_out)) + log('\tinterrupt_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_in)) + log('\tiso_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_out)) + log('\tiso_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_in)) + + if verbose: + log('Testing parallel data transfers through bulk, interrupt & control endpoint pairs.') + test_error = Event() + test_failure = Event() + test_kwargs_bulk_ep = { + 'ep_out': bulk_out, + 'ep_in': bulk_in, + 'failure': test_failure, + 'error': test_error, + 'seconds': 1.0, + 'log': log} + test_kwargs_interrupt_ep = { + 'ep_out': interrupt_out, + 'ep_in': interrupt_in, + 'failure': test_failure, + 'error': test_error, + 'seconds': 1.0, + 'log': log} + ep_test_threads = [] + for kwargs in (test_kwargs_bulk_ep, test_kwargs_interrupt_ep): + ep_test_threads.append(Thread(target=random_size_loopback_ep_test, kwargs=kwargs)) + for t in ep_test_threads: + t.start() + while any(t.is_alive() for t in ep_test_threads): + control_stress_test(dev, log) + control_sizes_test(dev, log) + for t in ep_test_threads: + t.join() + if test_failure.is_set(): + raise_unconditionally(lineno(), 'Payload mismatch') + if test_error.is_set(): + raise_unconditionally(lineno(), 'USBError') + + +def ep_test_abort(dev, log, verbose=False): + NUM_PACKETS_UNTIL_ABORT = 2 + NUM_PACKETS_AFTER_ABORT = 8 + cfg = dev.get_active_configuration() + for intf in cfg: + log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') + if intf.bAlternateSetting == 0: + log('skipping the default AlternateSetting') + continue + log('running tests') + intf.set_altsetting() + + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + interrupt_out, interrupt_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_INTERRUPT) + + if verbose: + log('\tbulk_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_out)) + log('\tbulk_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_in)) + log('\tinterrupt_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_out)) + log('\tinterrupt_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_in)) + + if verbose: + log('Testing aborting an in progress transfer for IN endpoints.') + for ep_in in (bulk_in, interrupt_in): + payload_size = (NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) * ep_in.wMaxPacketSize + payload_in = ep_in.read(payload_size) + if verbose: + log('The size of data successfully received from endpoint {0.bEndpointAddress:#04x}: {1} B.' + .format(ep_in, len(payload_in))) + too_little = bool(len(payload_in) < (NUM_PACKETS_UNTIL_ABORT * ep_in.wMaxPacketSize)) + too_much = bool(len(payload_in) >= payload_size) + if too_little or too_much: + raise_unconditionally( + lineno(), 'Invalid size of data successfully received from endpoint ' + '{0.bEndpointAddress:#04x} before aborting the transfer. ' + 'Value {1} B out of range [{2}, {3}).' + .format(ep_in, len(payload_in), + NUM_PACKETS_UNTIL_ABORT * ep_in.wMaxPacketSize, payload_size)) + + if verbose: + log('Testing aborting an in progress transfer for OUT endpoints.') + for ep_out in (bulk_out, interrupt_out): + payload_size = (NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) * ep_out.wMaxPacketSize + payload_out = array.array('B', (0x01 for _ in range(payload_size))) + num_bytes_written = ep_out.write(payload_out) + if verbose: + log('The size of data successfully sent to endpoint {0.bEndpointAddress:#04x}: {1} B.' + .format(ep_out, num_bytes_written)) + too_little = bool(num_bytes_written < (NUM_PACKETS_UNTIL_ABORT * ep_out.wMaxPacketSize)) + too_much = bool(num_bytes_written >= payload_size) + if too_little or too_much: + raise_unconditionally( + lineno(), 'Invalid size of data successfully sent to endpoint ' + '{0.bEndpointAddress:#04x} before aborting the transfer. ' + 'Value {1} B out of range [{2}, {3}).' + .format(ep_out, num_bytes_written, + NUM_PACKETS_UNTIL_ABORT * ep_out.wMaxPacketSize, payload_size)) + + def device_reset_test(log): """ Test USB implementation against repeated reset diff --git a/TESTS/usb_device/basic/USBEndpointTester.cpp b/TESTS/usb_device/basic/USBEndpointTester.cpp new file mode 100644 index 00000000000..c8798ee7ee2 --- /dev/null +++ b/TESTS/usb_device/basic/USBEndpointTester.cpp @@ -0,0 +1,767 @@ +/* + * Copyright (c) 2018-2018, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBEndpointTester.h" +#include "mbed_shared_queues.h" +#include "EndpointResolver.h" + +#define DEFAULT_CONFIGURATION (1) + +#define NUM_PACKETS_UNTIL_ABORT 2 +#define NUM_PACKETS_AFTER_ABORT 8 + +#define VENDOR_TEST_CTRL_IN 1 +#define VENDOR_TEST_CTRL_OUT 2 +#define VENDOR_TEST_CTRL_IN_SIZES 9 +#define VENDOR_TEST_CTRL_OUT_SIZES 10 + +#define EVENT_READY (1 << 0) + +#define TEST_SIZE_EP_BULK_MAX (64) +#define TEST_SIZE_EP_BULK_MIN (8) +#define TEST_SIZE_EP_BULK_0 (16) +#define TEST_SIZE_EP_BULK_1 TEST_SIZE_EP_BULK_MAX +#define TEST_SIZE_EP_BULK_2 (32) +#define TEST_SIZE_EP_BULK_3 (16) +#define TEST_SIZE_EP_BULK_4 TEST_SIZE_EP_BULK_MIN + +#define TEST_SIZE_EP_INT_MAX (64) +#define TEST_SIZE_EP_INT_MIN (1) +#define TEST_SIZE_EP_INT_0 (16) +#define TEST_SIZE_EP_INT_1 TEST_SIZE_EP_INT_MAX +#define TEST_SIZE_EP_INT_2 (32) +#define TEST_SIZE_EP_INT_3 (16) +#define TEST_SIZE_EP_INT_4 TEST_SIZE_EP_INT_MIN + +#define TEST_SIZE_EP_ISO_MAX (1023) +#define TEST_SIZE_EP_ISO_MIN (1) +#define TEST_SIZE_EP_ISO_0 (0) +#define TEST_SIZE_EP_ISO_1 (0) +#define TEST_SIZE_EP_ISO_2 (0) +#define TEST_SIZE_EP_ISO_3 (0) +#define TEST_SIZE_EP_ISO_4 (0) + +#define EP_BULK_OUT 0 +#define EP_BULK_IN 1 +#define EP_INT_OUT 2 +#define EP_INT_IN 3 +#define EP_ISO_OUT 4 +#define EP_ISO_IN 5 + +USBEndpointTester::ep_config_t USBEndpointTester::_intf_config_max[NUM_ENDPOINTS] = { + { false, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_MAX, static_cast(&USBEndpointTester::_cb_bulk_out) }, + { true, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_MAX, static_cast(&USBEndpointTester::_cb_bulk_in) }, + { false, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_MAX, static_cast(&USBEndpointTester::_cb_int_out) }, + { true, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_MAX, static_cast(&USBEndpointTester::_cb_int_in) }, + { false, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_MAX, static_cast(&USBEndpointTester::_cb_iso_out) }, + { true, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_MAX, static_cast(&USBEndpointTester::_cb_iso_in) }, +}; + +USBEndpointTester::ep_config_t USBEndpointTester::_intf_config0[NUM_ENDPOINTS] = { + { false, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_0, NULL }, + { true, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_0, NULL }, + { false, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_0, NULL }, + { true, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_0, NULL }, + { false, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_0, NULL }, + { true, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_0, NULL }, +}; + +USBEndpointTester::ep_config_t USBEndpointTester::_intf_config1[NUM_ENDPOINTS] = { + { false, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_1, static_cast(&USBEndpointTester::_cb_bulk_out) }, + { true, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_1, static_cast(&USBEndpointTester::_cb_bulk_in) }, + { false, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_1, static_cast(&USBEndpointTester::_cb_int_out) }, + { true, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_1, static_cast(&USBEndpointTester::_cb_int_in) }, + { false, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_1, static_cast(&USBEndpointTester::_cb_iso_out) }, + { true, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_1, static_cast(&USBEndpointTester::_cb_iso_in) }, +}; + +USBEndpointTester::ep_config_t USBEndpointTester::_intf_config2[NUM_ENDPOINTS] = { + { false, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_2, static_cast(&USBEndpointTester::_cb_bulk_out) }, + { true, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_2, static_cast(&USBEndpointTester::_cb_bulk_in) }, + { false, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_2, static_cast(&USBEndpointTester::_cb_int_out) }, + { true, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_2, static_cast(&USBEndpointTester::_cb_int_in) }, + { false, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_2, static_cast(&USBEndpointTester::_cb_iso_out) }, + { true, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_2, static_cast(&USBEndpointTester::_cb_iso_in) }, +}; + +USBEndpointTester::ep_config_t USBEndpointTester::_intf_config3[NUM_ENDPOINTS] = { + { false, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_3, static_cast(&USBEndpointTester::_cb_bulk_out) }, + { true, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_3, static_cast(&USBEndpointTester::_cb_bulk_in) }, + { false, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_3, static_cast(&USBEndpointTester::_cb_int_out) }, + { true, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_3, static_cast(&USBEndpointTester::_cb_int_in) }, + { false, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_3, static_cast(&USBEndpointTester::_cb_iso_out) }, + { true, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_3, static_cast(&USBEndpointTester::_cb_iso_in) }, +}; + +USBEndpointTester::ep_config_t USBEndpointTester::_intf_config4[NUM_ENDPOINTS] = { + { false, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_4, static_cast(&USBEndpointTester::_cb_bulk_out) }, + { true, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_4, static_cast(&USBEndpointTester::_cb_bulk_in) }, + { false, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_4, static_cast(&USBEndpointTester::_cb_int_out) }, + { true, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_4, static_cast(&USBEndpointTester::_cb_int_in) }, + { false, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_4, static_cast(&USBEndpointTester::_cb_iso_out) }, + { true, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_4, static_cast(&USBEndpointTester::_cb_iso_in) }, +}; + +USBEndpointTester::USBEndpointTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, + bool abort_transfer_test) : + USBDevice(phy, vendor_id, product_id, product_release), _abort_transfer_test(abort_transfer_test), _endpoint_configs( + &_intf_config_max) +{ + _cnt_cb_set_conf = 0; + _cnt_cb_set_intf = 0; + _cnt_cb_bulk_out = 0; + _cnt_cb_bulk_in = 0; + _cnt_cb_int_out = 0; + _cnt_cb_int_in = 0; + _cnt_cb_iso_out = 0; + _cnt_cb_iso_in = 0; + + EndpointResolver resolver(endpoint_table()); + resolver.endpoint_ctrl(64); + ep_config_t *epc = NULL; + for (size_t i = 0; i < NUM_ENDPOINTS; i++) { + epc = &((*_endpoint_configs)[i]); + _endpoints[i] = resolver.next_free_endpoint(epc->dir_in, epc->type, epc->max_packet); + _endpoint_buffs[i] = (uint8_t *) calloc(epc->max_packet, sizeof(uint8_t)); + MBED_ASSERT(_endpoint_buffs[i] != NULL); + } + MBED_ASSERT(resolver.valid()); + + queue = mbed_highprio_event_queue(); + configuration_desc(0); + init(); + USBDevice::connect(); + flags.wait_any(EVENT_READY, osWaitForever, false); + +} + +USBEndpointTester::~USBEndpointTester() +{ + for (size_t i = 0; i < NUM_ENDPOINTS; i++) { + if (_endpoint_buffs[i] != NULL) { + free(_endpoint_buffs[i]); + } + } + deinit(); +} + +const char *USBEndpointTester::get_desc_string(const uint8_t *desc) +{ + static char ret_string[128] = { }; + const uint8_t desc_size = desc[0] - 2; + const uint8_t *desc_str = &desc[2]; + uint32_t j = 0; + for (uint32_t i = 0; i < desc_size; i += 2, j++) { + ret_string[j] = desc_str[i]; + } + ret_string[j] = '\0'; + return ret_string; +} + +const char *USBEndpointTester::get_serial_desc_string() +{ + return get_desc_string(string_iserial_desc()); +} + +void USBEndpointTester::callback_state_change(DeviceState new_state) +{ + if (new_state == Configured) { + flags.set(EVENT_READY); + } else { + flags.clear(EVENT_READY); + } +} + +void USBEndpointTester::callback_request(const setup_packet_t *setup) +{ + /* Called in ISR context */ + RequestResult result = PassThrough; + uint8_t *data = NULL; + uint32_t size = 0; + + /* Process vendor-specific requests */ + if (setup->bmRequestType.Type == VENDOR_TYPE) { + switch (setup->bRequest) { + case VENDOR_TEST_CTRL_IN: + result = Send; + data = ctrl_buf; + size = setup->wValue < sizeof(ctrl_buf) ? setup->wValue : sizeof(ctrl_buf); + break; + case VENDOR_TEST_CTRL_OUT: + result = Receive; + data = ctrl_buf; + size = setup->wValue < 8 ? setup->wValue : 8; + break; + case VENDOR_TEST_CTRL_IN_SIZES: + result = Send; + data = ctrl_buf; + size = setup->wLength; + break; + case VENDOR_TEST_CTRL_OUT_SIZES: + result = Receive; + data = ctrl_buf; + size = setup->wValue; + break; + default: + result = PassThrough; + break; + } + } + complete_request(result, data, size); +} + +void USBEndpointTester::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) +{ + if (aborted) { + complete_request_xfer_done(false); + return; + } + + bool result = false; + if (setup->bmRequestType.Type == VENDOR_TYPE) { + switch (setup->bRequest) { + case VENDOR_TEST_CTRL_IN: + result = true; + break; + case VENDOR_TEST_CTRL_OUT: + result = true; + break; + case VENDOR_TEST_CTRL_OUT_SIZES: + result = true; + break; + case VENDOR_TEST_CTRL_IN_SIZES: + result = true; + break; + default: + result = false; + break; + } + } + complete_request_xfer_done(result); +} + +void USBEndpointTester::callback_set_configuration(uint8_t configuration) +{ + _cnt_cb_set_conf++; + if (configuration != DEFAULT_CONFIGURATION) { + complete_set_configuration(false); + return; + } + + // Configure endpoints > 0 + bool status = _setup_interface(0, 0); + complete_set_configuration(status); +} + +bool USBEndpointTester::_setup_interface(uint16_t interface, uint8_t alternate) +{ + if (interface != 0) { + return false; + } + + switch (alternate) { + case 0: + _endpoint_configs = &_intf_config0; + break; + case 1: + _endpoint_configs = &_intf_config1; + break; + case 2: + _endpoint_configs = &_intf_config2; + break; + case 3: + _endpoint_configs = &_intf_config3; + break; + case 4: + _endpoint_configs = &_intf_config4; + break; + default: + return false; + } + + _setup_non_zero_endpoints(); + + if (_abort_transfer_test && alternate >= 1) { + _cnt_cb_bulk_out_abort = _cnt_cb_bulk_out; + _cnt_cb_bulk_in_abort = _cnt_cb_bulk_in; + _cnt_cb_int_out_abort = _cnt_cb_int_out; + _cnt_cb_int_in_abort = _cnt_cb_int_in; + start_ep_in_abort_test(); + } + return true; +} + +void USBEndpointTester::_setup_non_zero_endpoints() +{ + ep_config_t *epc = NULL; + for (size_t i = 0; i < NUM_ENDPOINTS; i++) { + epc = &((*_endpoint_configs)[i]); + endpoint_add(_endpoints[i], epc->max_packet, epc->type, epc->callback); + if (epc->callback == NULL) { + continue; + } + if (epc->dir_in == true) { +// write_start(_endpoints[i], _endpoint_buffs[i], epc->max_packet); + } else { + read_start(_endpoints[i], _endpoint_buffs[i], epc->max_packet); + } + } +} + +void USBEndpointTester::callback_set_interface(uint16_t interface, uint8_t alternate) +{ + _cnt_cb_set_intf++; + if (interface != 0 || alternate > 4) { + complete_set_interface(false); + return; + } + for (size_t i = 0; i < NUM_ENDPOINTS; i++) { + endpoint_abort(_endpoints[i]); + endpoint_remove(_endpoints[i]); + } + bool status = _setup_interface(interface, alternate); + complete_set_interface(status); +} + +#define CONFIG1_DESC_SIZE (CONFIGURATION_DESCRIPTOR_LENGTH \ + + 5 * (INTERFACE_DESCRIPTOR_LENGTH + NUM_ENDPOINTS * ENDPOINT_DESCRIPTOR_LENGTH) ) + +const uint8_t *USBEndpointTester::configuration_desc(uint8_t index) +{ + static const uint8_t config_1_descriptor[] = { + // configuration descriptor + CONFIGURATION_DESCRIPTOR_LENGTH, // bLength + CONFIGURATION_DESCRIPTOR, // bDescriptorType + LSB(CONFIG1_DESC_SIZE), // wTotalLength (LSB) + MSB(CONFIG1_DESC_SIZE), // wTotalLength (MSB) + 1, // bNumInterfaces + 1, // bConfigurationValue + 0, // iConfiguration + 0x80, // bmAttributes + 50, // bMaxPower + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0, // bInterfaceNumber + 0, // bAlternateSetting + NUM_ENDPOINTS, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_OUT], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config0[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config0[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_IN], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config0[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config0[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_OUT], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config0[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config0[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_IN], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config0[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config0[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_OUT], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config0[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config0[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_IN], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config0[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config0[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0, // bInterfaceNumber + 1, // bAlternateSetting + NUM_ENDPOINTS, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_OUT], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config1[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config1[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_IN], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config1[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config1[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_OUT], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config1[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config1[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_IN], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config1[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config1[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_OUT], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config1[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config1[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_IN], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config1[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config1[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0, // bInterfaceNumber + 2, // bAlternateSetting + NUM_ENDPOINTS, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_OUT], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config2[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config2[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_IN], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config2[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config2[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_OUT], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config2[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config2[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_IN], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config2[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config2[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_OUT], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config2[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config2[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_IN], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config2[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config2[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0, // bInterfaceNumber + 3, // bAlternateSetting + NUM_ENDPOINTS, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_OUT], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config3[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config3[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_IN], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config3[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config3[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_OUT], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config3[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config3[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_IN], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config3[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config3[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_OUT], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config3[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config3[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_IN], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config3[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config3[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0, // bInterfaceNumber + 4, // bAlternateSetting + NUM_ENDPOINTS, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_OUT], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config4[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config4[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_IN], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config4[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config4[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_OUT], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config4[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config4[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_IN], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config4[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config4[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_OUT], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config4[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config4[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_IN], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config4[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config4[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + }; + if (index == 0) { + return config_1_descriptor; + } else { + return NULL; + } +} + +void USBEndpointTester::_cb_bulk_out(usb_ep_t endpoint) +{ + _cnt_cb_bulk_out++; + uint32_t rx_size = read_finish(endpoint); + + if (_abort_transfer_test == false) { + // Send data back to host using the IN endpoint. + memset(_endpoint_buffs[EP_BULK_IN], 0, (*_endpoint_configs)[EP_BULK_IN].max_packet); + memcpy(_endpoint_buffs[EP_BULK_IN], _endpoint_buffs[EP_BULK_OUT], rx_size); + write_start(_endpoints[EP_BULK_IN], _endpoint_buffs[EP_BULK_IN], rx_size); + } else { + // Abort the transfer if enough data was received. + uint32_t num_packets_received = _cnt_cb_bulk_out - _cnt_cb_bulk_out_abort; + read_start(_endpoints[EP_BULK_OUT], _endpoint_buffs[EP_BULK_OUT], (*_endpoint_configs)[EP_BULK_OUT].max_packet); + if (num_packets_received >= NUM_PACKETS_UNTIL_ABORT) { + endpoint_abort(endpoint); + } + } +} + +void USBEndpointTester::_cb_bulk_in(usb_ep_t endpoint) +{ + _cnt_cb_bulk_in++; + write_finish(endpoint); + + if (_abort_transfer_test == false) { + // Receive more data from the host using the OUT endpoint. + read_start(_endpoints[EP_BULK_OUT], _endpoint_buffs[EP_BULK_OUT], (*_endpoint_configs)[EP_BULK_OUT].max_packet); + } else { + uint32_t num_packets_sent = _cnt_cb_bulk_in - _cnt_cb_bulk_in_abort; + if (num_packets_sent >= NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) { + return; + } + // Abort the transfer if enough data was sent. + memset(_endpoint_buffs[EP_BULK_IN], num_packets_sent, (*_endpoint_configs)[EP_BULK_IN].max_packet); + write_start(_endpoints[EP_BULK_IN], _endpoint_buffs[EP_BULK_IN], (*_endpoint_configs)[EP_BULK_IN].max_packet); + if (num_packets_sent >= NUM_PACKETS_UNTIL_ABORT) { + endpoint_abort(endpoint); + } + } +} + +void USBEndpointTester::_cb_int_out(usb_ep_t endpoint) +{ + _cnt_cb_int_out++; + uint32_t rx_size = read_finish(endpoint); + if (_abort_transfer_test == false) { + // Send data back to host using the IN endpoint. + memset(_endpoint_buffs[EP_INT_IN], 0, (*_endpoint_configs)[EP_INT_IN].max_packet); + memcpy(_endpoint_buffs[EP_INT_IN], _endpoint_buffs[EP_INT_OUT], rx_size); + write_start(_endpoints[EP_INT_IN], _endpoint_buffs[EP_INT_IN], rx_size); + } else { + // Abort the transfer if enough data was received. + uint32_t num_packets_received = _cnt_cb_int_out - _cnt_cb_int_out_abort; + read_start(_endpoints[EP_INT_OUT], _endpoint_buffs[EP_INT_OUT], (*_endpoint_configs)[EP_INT_OUT].max_packet); + if (num_packets_received >= NUM_PACKETS_UNTIL_ABORT) { + endpoint_abort(endpoint); + } + } +} + +void USBEndpointTester::_cb_int_in(usb_ep_t endpoint) +{ + _cnt_cb_int_in++; + write_finish(endpoint); + if (_abort_transfer_test == false) { + // Receive more data from the host using the OUT endpoint. + read_start(_endpoints[EP_INT_OUT], _endpoint_buffs[EP_INT_OUT], (*_endpoint_configs)[EP_INT_OUT].max_packet); + } else { + uint32_t num_packets_sent = _cnt_cb_int_in - _cnt_cb_int_in_abort; + if (num_packets_sent >= NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) { + return; + } + // Abort the transfer if enough data was sent. + memset(_endpoint_buffs[EP_INT_IN], num_packets_sent, (*_endpoint_configs)[EP_INT_IN].max_packet); + write_start(_endpoints[EP_INT_IN], _endpoint_buffs[EP_INT_IN], (*_endpoint_configs)[EP_INT_IN].max_packet); + if (num_packets_sent >= NUM_PACKETS_UNTIL_ABORT) { + endpoint_abort(endpoint); + } + } +} + +void USBEndpointTester::_cb_iso_out(usb_ep_t endpoint) +{ + _cnt_cb_iso_out++; + uint32_t rx_size = read_finish(endpoint); + // Send data back to host using the IN endpoint. + memset(_endpoint_buffs[EP_ISO_IN], 0, (*_endpoint_configs)[EP_ISO_IN].max_packet); + memcpy(_endpoint_buffs[EP_ISO_IN], _endpoint_buffs[EP_ISO_OUT], rx_size); + write_start(_endpoints[EP_ISO_IN], _endpoint_buffs[EP_ISO_IN], rx_size); +} + +void USBEndpointTester::_cb_iso_in(usb_ep_t endpoint) +{ + _cnt_cb_iso_in++; + write_finish(endpoint); + // Receive more data from the host using the OUT endpoint. + read_start(_endpoints[EP_ISO_OUT], _endpoint_buffs[EP_ISO_OUT], (*_endpoint_configs)[EP_ISO_OUT].max_packet); +} + +void USBEndpointTester::start_ep_in_abort_test() +{ + memset(_endpoint_buffs[EP_BULK_IN], 0, (*_endpoint_configs)[EP_BULK_IN].max_packet); + memset(_endpoint_buffs[EP_INT_IN], 0, (*_endpoint_configs)[EP_INT_IN].max_packet); + + write_start(_endpoints[EP_BULK_IN], _endpoint_buffs[EP_BULK_IN], (*_endpoint_configs)[EP_BULK_IN].max_packet); + write_start(_endpoints[EP_INT_IN], _endpoint_buffs[EP_INT_IN], (*_endpoint_configs)[EP_INT_IN].max_packet); +} diff --git a/TESTS/usb_device/basic/USBEndpointTester.h b/TESTS/usb_device/basic/USBEndpointTester.h new file mode 100644 index 00000000000..a921526b49f --- /dev/null +++ b/TESTS/usb_device/basic/USBEndpointTester.h @@ -0,0 +1,108 @@ +/* + * Copyright (c) 2018-2018, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USB_ENDPOINT_TESTER_H +#define USB_ENDPOINT_TESTER_H + +/* These headers are included for child class. */ +#include "USBDescriptor.h" +#include "USBDevice_Types.h" +#include "EventQueue.h" +#include "EventFlags.h" + +#include "USBDevice.h" + +#define NUM_ENDPOINTS 6 // Not including CTRL OUT/IN + +class USBEndpointTester: public USBDevice { + +public: + USBEndpointTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, + bool abort_transfer_test); + ~USBEndpointTester(); + const char *get_serial_desc_string(); + void start_ep_in_abort_test(); + + uint32_t get_cnt_cb_set_conf() const { return _cnt_cb_set_conf; } + uint32_t get_cnt_cb_set_intf() const { return _cnt_cb_set_intf; } + uint32_t get_cnt_cb_bulk_out() const { return _cnt_cb_bulk_out; } + uint32_t get_cnt_cb_bulk_in() const { return _cnt_cb_bulk_in; } + uint32_t get_cnt_cb_int_out() const { return _cnt_cb_int_out; } + uint32_t get_cnt_cb_int_in() const { return _cnt_cb_int_in; } + uint32_t get_cnt_cb_iso_out() const { return _cnt_cb_iso_out; } + uint32_t get_cnt_cb_iso_in() const { return _cnt_cb_iso_in; } + + struct ep_config_t { + bool dir_in; + usb_ep_type_t type; + uint32_t max_packet; + ep_cb_t callback; + }; + +protected: + EventQueue *queue; + rtos::EventFlags flags; + uint8_t ctrl_buf[2048]; + + bool _abort_transfer_test; + usb_ep_t _endpoints[NUM_ENDPOINTS]; + uint8_t *_endpoint_buffs[NUM_ENDPOINTS]; + ep_config_t (*_endpoint_configs)[NUM_ENDPOINTS]; + + static ep_config_t _intf_config_max[NUM_ENDPOINTS]; + static ep_config_t _intf_config0[NUM_ENDPOINTS]; + static ep_config_t _intf_config1[NUM_ENDPOINTS]; + static ep_config_t _intf_config2[NUM_ENDPOINTS]; + static ep_config_t _intf_config3[NUM_ENDPOINTS]; + static ep_config_t _intf_config4[NUM_ENDPOINTS]; + + volatile uint32_t _cnt_cb_set_conf; + volatile uint32_t _cnt_cb_set_intf; + volatile uint32_t _cnt_cb_bulk_out; + volatile uint32_t _cnt_cb_bulk_in; + volatile uint32_t _cnt_cb_int_out; + volatile uint32_t _cnt_cb_int_in; + volatile uint32_t _cnt_cb_iso_out; + volatile uint32_t _cnt_cb_iso_in; + + volatile uint32_t _cnt_cb_bulk_out_abort; + volatile uint32_t _cnt_cb_bulk_in_abort; + volatile uint32_t _cnt_cb_int_out_abort; + volatile uint32_t _cnt_cb_int_in_abort; + + virtual const uint8_t *configuration_desc(uint8_t index); + virtual void callback_state_change(DeviceState new_state); + virtual void callback_request(const setup_packet_t *setup); + virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); + virtual void callback_set_configuration(uint8_t configuration); + virtual void callback_set_interface(uint16_t interface, uint8_t alternate); + + void _setup_non_zero_endpoints(); + bool _setup_interface(uint16_t interface, uint8_t alternate); + + virtual void _cb_bulk_out(usb_ep_t endpoint); + virtual void _cb_bulk_in(usb_ep_t endpoint); + virtual void _cb_int_out(usb_ep_t endpoint); + virtual void _cb_int_in(usb_ep_t endpoint); + virtual void _cb_iso_out(usb_ep_t endpoint); + virtual void _cb_iso_in(usb_ep_t endpoint); + +private: + const char *get_desc_string(const uint8_t *desc); +}; + +#endif diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index deb45ba6431..ae7a038bebc 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -22,6 +22,7 @@ #include "utest/utest.h" #include "USBTester.h" +#include "USBEndpointTester.h" #include "usb_phy_api.h" // TODO @@ -44,6 +45,9 @@ using namespace utest::v1; +// Print callback counters for endpoint tests +#define EP_DBG 0 + static USBPhy *get_phy() { return get_usb_phy(); @@ -196,6 +200,154 @@ void control_stress_test() } } +void ep_test_data_correctness() +{ + uint16_t vendor_id = 0x0d28; + // Use a product ID different than that used in other tests, + // to help Windows hosts use the correct configuration descriptor. + uint16_t product_id = 0x0206; + uint16_t product_release = 0x0001; + char _key[11] = { }; + char _value[128] = { }; + + { + USBEndpointTester serial(get_phy(), vendor_id, product_id, product_release, false); + greentea_send_kv("ep_test_data_correctness", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); +#if EP_DBG + wait_ms(100); + printf("cnt_cb_set_conf = %lu\r\n", serial.get_cnt_cb_set_conf()); + printf("cnt_cb_set_intf = %lu\r\n", serial.get_cnt_cb_set_intf()); + printf("cnt_cb_bulk_out = %lu\r\n", serial.get_cnt_cb_bulk_out()); + printf("cnt_cb_bulk_in = %lu\r\n", serial.get_cnt_cb_bulk_in()); + printf("cnt_cb_int_out = %lu\r\n", serial.get_cnt_cb_int_out()); + printf("cnt_cb_int_in = %lu\r\n", serial.get_cnt_cb_int_in()); + printf("cnt_cb_iso_out = %lu\r\n", serial.get_cnt_cb_iso_out()); + printf("cnt_cb_iso_in = %lu\r\n", serial.get_cnt_cb_iso_in()); +#endif + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + +void ep_test_halt() +{ + uint16_t vendor_id = 0x0d28; + // Use a product ID different than that used in other tests, + // to help Windows hosts use the correct configuration descriptor. + uint16_t product_id = 0x0206; + uint16_t product_release = 0x0001; + char _key[11] = { }; + char _value[128] = { }; + + { + USBEndpointTester serial(get_phy(), vendor_id, product_id, product_release, false); + greentea_send_kv("ep_test_halt", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); +#if EP_DBG + wait_ms(100); + printf("cnt_cb_set_conf = %lu\r\n", serial.get_cnt_cb_set_conf()); + printf("cnt_cb_set_intf = %lu\r\n", serial.get_cnt_cb_set_intf()); + printf("cnt_cb_bulk_out = %lu\r\n", serial.get_cnt_cb_bulk_out()); + printf("cnt_cb_bulk_in = %lu\r\n", serial.get_cnt_cb_bulk_in()); + printf("cnt_cb_int_out = %lu\r\n", serial.get_cnt_cb_int_out()); + printf("cnt_cb_int_in = %lu\r\n", serial.get_cnt_cb_int_in()); + printf("cnt_cb_iso_out = %lu\r\n", serial.get_cnt_cb_iso_out()); + printf("cnt_cb_iso_in = %lu\r\n", serial.get_cnt_cb_iso_in()); +#endif + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + +void ep_test_parallel_transfers() +{ + uint16_t vendor_id = 0x0d28; + // Use a product ID different than that used in other tests, + // to help Windows hosts use the correct configuration descriptor. + uint16_t product_id = 0x0206; + uint16_t product_release = 0x0001; + char _key[11] = { }; + char _value[128] = { }; + + { + USBEndpointTester serial(get_phy(), vendor_id, product_id, product_release, false); + greentea_send_kv("ep_test_parallel_transfers", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); +#if EP_DBG + wait_ms(100); + printf("cnt_cb_set_conf = %lu\r\n", serial.get_cnt_cb_set_conf()); + printf("cnt_cb_set_intf = %lu\r\n", serial.get_cnt_cb_set_intf()); + printf("cnt_cb_bulk_out = %lu\r\n", serial.get_cnt_cb_bulk_out()); + printf("cnt_cb_bulk_in = %lu\r\n", serial.get_cnt_cb_bulk_in()); + printf("cnt_cb_int_out = %lu\r\n", serial.get_cnt_cb_int_out()); + printf("cnt_cb_int_in = %lu\r\n", serial.get_cnt_cb_int_in()); + printf("cnt_cb_iso_out = %lu\r\n", serial.get_cnt_cb_iso_out()); + printf("cnt_cb_iso_in = %lu\r\n", serial.get_cnt_cb_iso_in()); +#endif + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + +void ep_test_parallel_transfers_ctrl() +{ + uint16_t vendor_id = 0x0d28; + // Use a product ID different than that used in other tests, + // to help Windows hosts use the correct configuration descriptor. + uint16_t product_id = 0x0206; + uint16_t product_release = 0x0001; + char _key[11] = { }; + char _value[128] = { }; + + { + USBEndpointTester serial(get_phy(), vendor_id, product_id, product_release, false); + greentea_send_kv("ep_test_parallel_transfers_ctrl", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); +#if EP_DBG + wait_ms(100); + printf("cnt_cb_set_conf = %lu\r\n", serial.get_cnt_cb_set_conf()); + printf("cnt_cb_set_intf = %lu\r\n", serial.get_cnt_cb_set_intf()); + printf("cnt_cb_bulk_out = %lu\r\n", serial.get_cnt_cb_bulk_out()); + printf("cnt_cb_bulk_in = %lu\r\n", serial.get_cnt_cb_bulk_in()); + printf("cnt_cb_int_out = %lu\r\n", serial.get_cnt_cb_int_out()); + printf("cnt_cb_int_in = %lu\r\n", serial.get_cnt_cb_int_in()); + printf("cnt_cb_iso_out = %lu\r\n", serial.get_cnt_cb_iso_out()); + printf("cnt_cb_iso_in = %lu\r\n", serial.get_cnt_cb_iso_in()); +#endif + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + +void ep_test_abort() +{ + uint16_t vendor_id = 0x0d28; + // Use a product ID different than that used in other tests, + // to help Windows hosts use the correct configuration descriptor. + uint16_t product_id = 0x0206; + uint16_t product_release = 0x0001; + char _key[11] = { }; + char _value[128] = { }; + + { + USBEndpointTester serial(get_phy(), vendor_id, product_id, product_release, true); + greentea_send_kv("ep_test_abort", serial.get_serial_desc_string()); + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); +#if EP_DBG + wait_ms(100); + printf("cnt_cb_set_conf = %lu\r\n", serial.get_cnt_cb_set_conf()); + printf("cnt_cb_set_intf = %lu\r\n", serial.get_cnt_cb_set_intf()); + printf("cnt_cb_bulk_out = %lu\r\n", serial.get_cnt_cb_bulk_out()); + printf("cnt_cb_bulk_in = %lu\r\n", serial.get_cnt_cb_bulk_in()); + printf("cnt_cb_int_out = %lu\r\n", serial.get_cnt_cb_int_out()); + printf("cnt_cb_int_in = %lu\r\n", serial.get_cnt_cb_int_in()); + printf("cnt_cb_iso_out = %lu\r\n", serial.get_cnt_cb_iso_out()); + printf("cnt_cb_iso_in = %lu\r\n", serial.get_cnt_cb_iso_in()); +#endif + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} /** Test USB implementation against repeated reset @@ -409,12 +561,17 @@ Case cases[] = { #if SUSPEND_RESUME_TEST_SUPPORTED Case("usb device suspend/resume test", device_suspend_resume_test), #endif - Case("usb repeated construction destruction test", repeated_construction_destruction_test) + Case("usb repeated construction destruction test", repeated_construction_destruction_test), + Case("endpoint test data correctness", ep_test_data_correctness), + Case("endpoint test halt", ep_test_halt), + Case("endpoint test parallel transfers", ep_test_parallel_transfers), + Case("endpoint test parallel transfers ctrl", ep_test_parallel_transfers_ctrl), + Case("endpoint test abort", ep_test_abort) }; utest::v1::status_t greentea_test_setup(const size_t number_of_cases) { - GREENTEA_SETUP(120, "pyusb_basic"); + GREENTEA_SETUP(180, "pyusb_basic"); return greentea_test_setup_handler(number_of_cases); } From 128ea510aaf5adc321fa7713e86bfe68a0489ee4 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Mon, 14 May 2018 17:22:31 +0200 Subject: [PATCH 232/488] Tests: USB: Generic: Update documentation --- TESTS/host_tests/pyusb_basic.py | 62 ++++++++++++++++++++++++++++++++- TESTS/usb_device/basic/main.cpp | 36 +++++++++++++++++++ 2 files changed, 97 insertions(+), 1 deletion(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 4aba71bcb4d..0c374f3a254 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -916,6 +916,11 @@ def control_stress_test(dev, log): def find_ep_pair(intf, endpoint_type): + """Find an OUT and IN endpoint pair. + + Raise a RuntimeError if any endpoint could not be found + or wMaxPacketSize is not equal for both endpoints. + """ ep_out = usb.util.find_descriptor( intf, custom_match=lambda e: usb.util.endpoint_type(e.bmAttributes) == endpoint_type and @@ -934,6 +939,12 @@ def find_ep_pair(intf, endpoint_type): def loopback_ep_test(ep_out, ep_in, payload_size): + """Send and receive random data using OUT/IN endpoint pair. + + Verify that data received from IN endpoint is equal to + data sent to OUT endpoint. + Raise a RuntimeError if data does not match. + """ payload_out = array.array('B', (random.randint(0x00, 0xff) for _ in range(payload_size))) ep_out.write(payload_out) payload_in = ep_in.read(ep_in.wMaxPacketSize) @@ -941,6 +952,11 @@ def loopback_ep_test(ep_out, ep_in, payload_size): def random_size_loopback_ep_test(ep_out, ep_in, failure, error, seconds, log, min_payload_size=1): + """Repeat data transfer test for OUT/IN endpoint pair for a given time. + + Set a failure Event if OUT/IN data verification fails. + Set an error Event if unexpected USB error occurs. + """ end_ts = time.time() + seconds while time.time() < end_ts and not failure.is_set() and not error.is_set(): payload_size = random.randint(min_payload_size, ep_out.wMaxPacketSize) @@ -958,6 +974,12 @@ def random_size_loopback_ep_test(ep_out, ep_in, failure, error, seconds, log, mi def halt_ep_test(dev, ep_out, ep_in, ep_to_halt, log): + """OUT/IN endpoint halt test. + + Verify that halting an endpoint at a random point of OUT or IN transfer + raises a USBError. + Raise a RuntimeError if halt fails or any unexpected error occurs. + """ MIN_HALT_DELAY = 0.01 MAX_HALT_DELAY = 0.1 delay = random.uniform(MIN_HALT_DELAY, MAX_HALT_DELAY) @@ -969,6 +991,7 @@ def halt_ep_test(dev, ep_out, ep_in, ep_to_halt, log): ctrl_error = Event() def timer_handler(): + """Halt an endpoint using a USB control request.""" try: dev.ctrl_transfer(**ctrl_kwargs) except Exception as err: @@ -995,10 +1018,19 @@ def timer_handler(): USB_ERROR_FMT = str('Got {0!r} while testing endpoints ' '{1.bEndpointAddress:#04x}({1.wMaxPacketSize:02}) and ' - '{2.bEndpointAddress:#04x}({2.wMaxPacketSize:02}) with a random payload of {3} B.') + '{2.bEndpointAddress:#04x}({2.wMaxPacketSize:02}) with ' + 'a random payload of {3} B.') def ep_test_data_correctness(dev, log, verbose=False): + """Test data correctness for every OUT/IN endpoint pair. + + Given a USB device with multiple OUT/IN endpoint pairs + When the host sends random payloads up to wMaxPacketSize in size + to an OUT endpoint of the device, + and then the device sends data back to host using an IN endpoint + Then data sent and received by host is equal for every endpoint pair + """ cfg = dev.get_active_configuration() for intf in cfg: log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') @@ -1047,6 +1079,13 @@ def ep_test_data_correctness(dev, log, verbose=False): def ep_test_halt(dev, log, verbose=False): + """Test endpoint halt for every OUT/IN endpoint pair. + + Given a USB device with multiple OUT/IN endpoint pairs + When the host issues an endpoint halt control request at a random point + of OUT or IN transfer + Then the endpoint is stalled and all further transfers fail + """ cfg = dev.get_active_configuration() for intf in cfg: log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') @@ -1092,6 +1131,13 @@ def ep_test_halt(dev, log, verbose=False): def ep_test_parallel_transfers(dev, log, verbose=False): + """Test simultaneous data transfers for multiple OUT/IN endpoint pairs. + + Given a USB device with multiple OUT/IN endpoint pairs + When multiple OUT and IN endpoints are used to transfer random test data + Then all transfers succeed + and data received equals data sent for every endpoint pair + """ cfg = dev.get_active_configuration() for intf in cfg: log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') @@ -1145,6 +1191,14 @@ def ep_test_parallel_transfers(dev, log, verbose=False): def ep_test_parallel_transfers_ctrl(dev, log, verbose=False): + """Test simultaneous data transfers in parallel with control transfers. + + Given a USB device with multiple OUT/IN endpoint pairs + When multiple OUT and IN endpoints are used to transfer random data + and control requests are processed in parallel + Then all transfers succeed + and for every endpoint pair, data received by host equals data sent by host + """ cfg = dev.get_active_configuration() for intf in cfg: log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') @@ -1201,6 +1255,12 @@ def ep_test_parallel_transfers_ctrl(dev, log, verbose=False): def ep_test_abort(dev, log, verbose=False): + """Test aborting data transfer for every OUT/IN endpoint pair. + + Given a USB device with multiple OUT/IN endpoint pairs + When a device aborts an in progress data transfer + Then no more data is transmitted + """ NUM_PACKETS_UNTIL_ABORT = 2 NUM_PACKETS_AFTER_ABORT = 8 cfg = dev.get_active_configuration() diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index ae7a038bebc..7a030473c54 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -200,6 +200,14 @@ void control_stress_test() } } +/** Test data correctness for every OUT/IN endpoint pair + * + * Given a USB device with multiple OUT/IN endpoint pairs + * When the host sends random payloads up to wMaxPacketSize in size + * to an OUT endpoint of the device, + * and then the device sends data back to host using an IN endpoint + * Then data sent and received by host is equal for every endpoint pair + */ void ep_test_data_correctness() { uint16_t vendor_id = 0x0d28; @@ -230,6 +238,13 @@ void ep_test_data_correctness() } } +/** Test endpoint halt for every OUT/IN endpoint pair + * + * Given a USB device with multiple OUT/IN endpoint pairs + * When the host issues an endpoint halt control request at a random point + * of OUT or IN transfer + * Then the endpoint is stalled and all further transfers fail + */ void ep_test_halt() { uint16_t vendor_id = 0x0d28; @@ -260,6 +275,13 @@ void ep_test_halt() } } +/** Test simultaneous data transfers for multiple OUT/IN endpoint pairs + * + * Given a USB device with multiple OUT/IN endpoint pairs + * When multiple OUT and IN endpoints are used to transfer random data in parallel + * Then all transfers succeed + * and for every endpoint pair, data received by host equals data sent by host + */ void ep_test_parallel_transfers() { uint16_t vendor_id = 0x0d28; @@ -290,6 +312,14 @@ void ep_test_parallel_transfers() } } +/** Test simultaneous data transfers in parallel with control transfers + * + * Given a USB device with multiple OUT/IN endpoint pairs + * When multiple OUT and IN endpoints are used to transfer random data + * and control requests are processed in parallel + * Then all transfers succeed + * and for every endpoint pair, data received by host equals data sent by host + */ void ep_test_parallel_transfers_ctrl() { uint16_t vendor_id = 0x0d28; @@ -320,6 +350,12 @@ void ep_test_parallel_transfers_ctrl() } } +/** Test aborting data transfer for every OUT/IN endpoint pair + * + * Given a USB device with multiple OUT/IN endpoint pairs + * When a device aborts an in progress data transfer + * Then no more data is transmitted + */ void ep_test_abort() { uint16_t vendor_id = 0x0d28; From c263f6b47abbee6b823f456189152768add5b2f2 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 17 May 2018 11:15:46 +0200 Subject: [PATCH 233/488] Tests: USB: Update endpoint tests Fix the host script issues present on Windows machines. Add 0 B payload size to bulk endpoints test. Update halt and abort tests according to PR comments. Add an explicit request to start reading on OUT endpoints. --- TESTS/host_tests/pyusb_basic.py | 91 ++++++++++++++------ TESTS/usb_device/basic/USBEndpointTester.cpp | 61 +++++++++---- TESTS/usb_device/basic/USBEndpointTester.h | 9 +- 3 files changed, 112 insertions(+), 49 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 0c374f3a254..60dcb3ec3e2 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -55,6 +55,7 @@ def get_interface(dev, interface, alternate=0): VENDOR_TEST_CTRL_OUT_STATUS_DELAY = 8 VENDOR_TEST_CTRL_IN_SIZES = 9 VENDOR_TEST_CTRL_OUT_SIZES = 10 +VENDOR_TEST_READ_START = 11 VENDOR_TEST_UNSUPPORTED_REQUEST = 32 REQUEST_GET_STATUS = 0 @@ -982,38 +983,63 @@ def halt_ep_test(dev, ep_out, ep_in, ep_to_halt, log): """ MIN_HALT_DELAY = 0.01 MAX_HALT_DELAY = 0.1 - delay = random.uniform(MIN_HALT_DELAY, MAX_HALT_DELAY) - ctrl_kwargs = { - 'bmRequestType': build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, CTRL_RECIPIENT_ENDPOINT), - 'bRequest': REQUEST_SET_FEATURE, - 'wValue': FEATURE_ENDPOINT_HALT, - 'wIndex': ep_to_halt.bEndpointAddress} + POST_HALT_DELAY = 0.1 ctrl_error = Event() + for ep in (ep_out, ep_in): + try: + if (usb.control.get_status(dev, ep) == 1): + raise_unconditionally(lineno(), 'Endpoints must NOT be halted at the start of this test') + except usb.core.USBError as err: + raise_unconditionally(lineno(), 'Unable to get endpoint status ({!r}).'.format(err)) + def timer_handler(): """Halt an endpoint using a USB control request.""" try: - dev.ctrl_transfer(**ctrl_kwargs) + usb.control.set_feature(dev, FEATURE_ENDPOINT_HALT, ep_to_halt) + if (usb.control.get_status(dev, ep_to_halt) != 1): + raise RuntimeError('Invalid endpoint status after halt operation') except Exception as err: - log('Endpoint {:#04x} halt failed ({}).'.format(ctrl_kwargs['wIndex'], err)) ctrl_error.set() + log('Endpoint {:#04x} halt failed ({}).'.format(ep_to_halt.bEndpointAddress, err)) + # Whether the halt operation was successful or not, + # wait a bit so the main thread has a chance to run into a USBError + # or report the failure of halt operation. + time.sleep(POST_HALT_DELAY) + delay = random.uniform(MIN_HALT_DELAY, MAX_HALT_DELAY) delayed_halt = Timer(delay, timer_handler) delayed_halt.start() - end_ts = time.time() + 1.5 * delay - try: - while time.time() < end_ts and not ctrl_error.is_set(): - loopback_ep_test(ep_out, ep_in, ep_out.wMaxPacketSize) - except usb.core.USBError as err: - if err.errno not in (32, 110): - raise_unconditionally(lineno(), 'Unexpected error ({!r}).'.format(err)) + # Keep transferring data to and from the device until one of the endpoints + # is halted. + while delayed_halt.is_alive(): if ctrl_error.is_set(): raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x} failed' .format(ep_to_halt)) - else: - raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x}' - ' during transmission did not raise USBError.' - .format(ep_to_halt)) + try: + loopback_ep_test(ep_out, ep_in, ep_out.wMaxPacketSize) + except usb.core.USBError as err: + try: + ep_status = usb.control.get_status(dev, ep_to_halt) + except usb.core.USBError as err: + raise_unconditionally(lineno(), 'Unable to get endpoint status ({!r}).'.format(err)) + if ep_status == 1: + # OK, got USBError because of endpoint halt + return + else: + raise_unconditionally(lineno(), 'Unexpected error ({!r}).'.format(err)) + raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x}' + ' during transmission did not raise USBError.' + .format(ep_to_halt)) + + +def request_endpoint_read_start(dev, ep): + ctrl_kwargs = { + 'bmRequestType': build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, CTRL_RECIPIENT_ENDPOINT), + 'bRequest': VENDOR_TEST_READ_START, + 'wValue': 0, + 'wIndex': ep.bEndpointAddress} + dev.ctrl_transfer(**ctrl_kwargs) USB_ERROR_FMT = str('Got {0!r} while testing endpoints ' @@ -1054,7 +1080,7 @@ def ep_test_data_correctness(dev, log, verbose=False): if verbose: log('Testing OUT/IN data correctness for bulk endpoint pair.') - for payload_size in range(1, bulk_out.wMaxPacketSize + 1): + for payload_size in range(bulk_out.wMaxPacketSize + 1): try: loopback_ep_test(bulk_out, bulk_in, payload_size) except usb.USBError as err: @@ -1113,10 +1139,9 @@ def ep_test_halt(dev, log, verbose=False): while time.time() < end_ts: halt_ep_test(dev, bulk_out, bulk_in, bulk_out, log) bulk_out.clear_halt() - intf.set_altsetting() # Force the device to start reading data from all OUT endpoints again. + request_endpoint_read_start(dev, bulk_out) halt_ep_test(dev, bulk_out, bulk_in, bulk_in, log) bulk_in.clear_halt() - intf.set_altsetting() # Force the device to start reading data from all OUT endpoints again. if verbose: log('Testing endpoint halt at a random point of interrupt transmission.') @@ -1124,10 +1149,9 @@ def ep_test_halt(dev, log, verbose=False): while time.time() < end_ts: halt_ep_test(dev, interrupt_out, interrupt_in, interrupt_out, log) interrupt_out.clear_halt() - intf.set_altsetting() # Force the device to start reading data from all OUT endpoints again. + request_endpoint_read_start(dev, interrupt_out) halt_ep_test(dev, interrupt_out, interrupt_in, interrupt_in, log) - interrupt_out.clear_halt() - intf.set_altsetting() # Force the device to start reading data from all OUT endpoints again. + interrupt_in.clear_halt() def ep_test_parallel_transfers(dev, log, verbose=False): @@ -1285,7 +1309,13 @@ def ep_test_abort(dev, log, verbose=False): log('Testing aborting an in progress transfer for IN endpoints.') for ep_in in (bulk_in, interrupt_in): payload_size = (NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) * ep_in.wMaxPacketSize - payload_in = ep_in.read(payload_size) + payload_in = array.array('B') + while len(payload_in) < payload_size: + try: + packet = ep_in.read(ep_in.wMaxPacketSize) + payload_in.extend(packet) + except usb.core.USBError as err: + break if verbose: log('The size of data successfully received from endpoint {0.bEndpointAddress:#04x}: {1} B.' .format(ep_in, len(payload_in))) @@ -1303,8 +1333,13 @@ def ep_test_abort(dev, log, verbose=False): log('Testing aborting an in progress transfer for OUT endpoints.') for ep_out in (bulk_out, interrupt_out): payload_size = (NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) * ep_out.wMaxPacketSize - payload_out = array.array('B', (0x01 for _ in range(payload_size))) - num_bytes_written = ep_out.write(payload_out) + payload_out = array.array('B', (0x01 for _ in range(ep_out.wMaxPacketSize))) + num_bytes_written = 0 + while num_bytes_written < payload_size: + try: + num_bytes_written += ep_out.write(payload_out) + except usb.core.USBError: + break if verbose: log('The size of data successfully sent to endpoint {0.bEndpointAddress:#04x}: {1} B.' .format(ep_out, num_bytes_written)) diff --git a/TESTS/usb_device/basic/USBEndpointTester.cpp b/TESTS/usb_device/basic/USBEndpointTester.cpp index c8798ee7ee2..937681b279a 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.cpp +++ b/TESTS/usb_device/basic/USBEndpointTester.cpp @@ -29,6 +29,7 @@ #define VENDOR_TEST_CTRL_OUT 2 #define VENDOR_TEST_CTRL_IN_SIZES 9 #define VENDOR_TEST_CTRL_OUT_SIZES 10 +#define VENDOR_TEST_READ_START 11 #define EVENT_READY (1 << 0) @@ -130,6 +131,10 @@ USBEndpointTester::USBEndpointTester(USBPhy *phy, uint16_t vendor_id, uint16_t p _cnt_cb_int_in = 0; _cnt_cb_iso_out = 0; _cnt_cb_iso_in = 0; + _num_packets_bulk_out_abort = 0; + _num_packets_bulk_in_abort = 0; + _num_packets_int_out_abort = 0; + _num_packets_int_in_abort = 0; EndpointResolver resolver(endpoint_table()); resolver.endpoint_ctrl(64); @@ -147,7 +152,6 @@ USBEndpointTester::USBEndpointTester(USBPhy *phy, uint16_t vendor_id, uint16_t p init(); USBDevice::connect(); flags.wait_any(EVENT_READY, osWaitForever, false); - } USBEndpointTester::~USBEndpointTester() @@ -217,6 +221,9 @@ void USBEndpointTester::callback_request(const setup_packet_t *setup) data = ctrl_buf; size = setup->wValue; break; + case VENDOR_TEST_READ_START: + result = (_request_read_start(setup)) ? Success : Failure; + break; default: result = PassThrough; break; @@ -225,6 +232,26 @@ void USBEndpointTester::callback_request(const setup_packet_t *setup) complete_request(result, data, size); } +bool USBEndpointTester::_request_read_start(const setup_packet_t *setup) +{ + assert_locked(); + if (setup->bmRequestType.Recipient != ENDPOINT_RECIPIENT) { + return false; + } + size_t ep_index = NUM_ENDPOINTS + 1; + for (size_t i = 0; i < NUM_ENDPOINTS; i++) { + if (_endpoints[i] == setup->wIndex) { + ep_index = i; + break; + } + } + if (ep_index > NUM_ENDPOINTS) { + return false; + } + endpoint_abort(_endpoints[ep_index]); + return read_start(_endpoints[ep_index], _endpoint_buffs[ep_index], (*_endpoint_configs)[ep_index].max_packet); +} + void USBEndpointTester::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) { if (aborted) { @@ -297,10 +324,10 @@ bool USBEndpointTester::_setup_interface(uint16_t interface, uint8_t alternate) _setup_non_zero_endpoints(); if (_abort_transfer_test && alternate >= 1) { - _cnt_cb_bulk_out_abort = _cnt_cb_bulk_out; - _cnt_cb_bulk_in_abort = _cnt_cb_bulk_in; - _cnt_cb_int_out_abort = _cnt_cb_int_out; - _cnt_cb_int_in_abort = _cnt_cb_int_in; + _num_packets_bulk_out_abort = 0; + _num_packets_bulk_in_abort = 0; + _num_packets_int_out_abort = 0; + _num_packets_int_in_abort = 0; start_ep_in_abort_test(); } return true; @@ -669,9 +696,9 @@ void USBEndpointTester::_cb_bulk_out(usb_ep_t endpoint) write_start(_endpoints[EP_BULK_IN], _endpoint_buffs[EP_BULK_IN], rx_size); } else { // Abort the transfer if enough data was received. - uint32_t num_packets_received = _cnt_cb_bulk_out - _cnt_cb_bulk_out_abort; + _num_packets_bulk_out_abort++; read_start(_endpoints[EP_BULK_OUT], _endpoint_buffs[EP_BULK_OUT], (*_endpoint_configs)[EP_BULK_OUT].max_packet); - if (num_packets_received >= NUM_PACKETS_UNTIL_ABORT) { + if (_num_packets_bulk_out_abort == NUM_PACKETS_UNTIL_ABORT) { endpoint_abort(endpoint); } } @@ -686,14 +713,14 @@ void USBEndpointTester::_cb_bulk_in(usb_ep_t endpoint) // Receive more data from the host using the OUT endpoint. read_start(_endpoints[EP_BULK_OUT], _endpoint_buffs[EP_BULK_OUT], (*_endpoint_configs)[EP_BULK_OUT].max_packet); } else { - uint32_t num_packets_sent = _cnt_cb_bulk_in - _cnt_cb_bulk_in_abort; - if (num_packets_sent >= NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) { + _num_packets_bulk_in_abort++; + if (_num_packets_bulk_in_abort >= NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) { return; } // Abort the transfer if enough data was sent. - memset(_endpoint_buffs[EP_BULK_IN], num_packets_sent, (*_endpoint_configs)[EP_BULK_IN].max_packet); + memset(_endpoint_buffs[EP_BULK_IN], _num_packets_bulk_in_abort, (*_endpoint_configs)[EP_BULK_IN].max_packet); write_start(_endpoints[EP_BULK_IN], _endpoint_buffs[EP_BULK_IN], (*_endpoint_configs)[EP_BULK_IN].max_packet); - if (num_packets_sent >= NUM_PACKETS_UNTIL_ABORT) { + if (_num_packets_bulk_in_abort == NUM_PACKETS_UNTIL_ABORT) { endpoint_abort(endpoint); } } @@ -710,9 +737,9 @@ void USBEndpointTester::_cb_int_out(usb_ep_t endpoint) write_start(_endpoints[EP_INT_IN], _endpoint_buffs[EP_INT_IN], rx_size); } else { // Abort the transfer if enough data was received. - uint32_t num_packets_received = _cnt_cb_int_out - _cnt_cb_int_out_abort; + _num_packets_int_out_abort++; read_start(_endpoints[EP_INT_OUT], _endpoint_buffs[EP_INT_OUT], (*_endpoint_configs)[EP_INT_OUT].max_packet); - if (num_packets_received >= NUM_PACKETS_UNTIL_ABORT) { + if (_num_packets_int_out_abort == NUM_PACKETS_UNTIL_ABORT) { endpoint_abort(endpoint); } } @@ -726,14 +753,14 @@ void USBEndpointTester::_cb_int_in(usb_ep_t endpoint) // Receive more data from the host using the OUT endpoint. read_start(_endpoints[EP_INT_OUT], _endpoint_buffs[EP_INT_OUT], (*_endpoint_configs)[EP_INT_OUT].max_packet); } else { - uint32_t num_packets_sent = _cnt_cb_int_in - _cnt_cb_int_in_abort; - if (num_packets_sent >= NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) { + _num_packets_int_in_abort++; + if (_num_packets_int_in_abort >= NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) { return; } // Abort the transfer if enough data was sent. - memset(_endpoint_buffs[EP_INT_IN], num_packets_sent, (*_endpoint_configs)[EP_INT_IN].max_packet); + memset(_endpoint_buffs[EP_INT_IN], _num_packets_int_in_abort, (*_endpoint_configs)[EP_INT_IN].max_packet); write_start(_endpoints[EP_INT_IN], _endpoint_buffs[EP_INT_IN], (*_endpoint_configs)[EP_INT_IN].max_packet); - if (num_packets_sent >= NUM_PACKETS_UNTIL_ABORT) { + if (_num_packets_int_in_abort == NUM_PACKETS_UNTIL_ABORT) { endpoint_abort(endpoint); } } diff --git a/TESTS/usb_device/basic/USBEndpointTester.h b/TESTS/usb_device/basic/USBEndpointTester.h index a921526b49f..3f7834cdc7f 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.h +++ b/TESTS/usb_device/basic/USBEndpointTester.h @@ -79,10 +79,10 @@ class USBEndpointTester: public USBDevice { volatile uint32_t _cnt_cb_iso_out; volatile uint32_t _cnt_cb_iso_in; - volatile uint32_t _cnt_cb_bulk_out_abort; - volatile uint32_t _cnt_cb_bulk_in_abort; - volatile uint32_t _cnt_cb_int_out_abort; - volatile uint32_t _cnt_cb_int_in_abort; + volatile uint32_t _num_packets_bulk_out_abort; + volatile uint32_t _num_packets_bulk_in_abort; + volatile uint32_t _num_packets_int_out_abort; + volatile uint32_t _num_packets_int_in_abort; virtual const uint8_t *configuration_desc(uint8_t index); virtual void callback_state_change(DeviceState new_state); @@ -103,6 +103,7 @@ class USBEndpointTester: public USBDevice { private: const char *get_desc_string(const uint8_t *desc); + bool _request_read_start(const setup_packet_t *setup); }; #endif From b630424ad2a7842880f31dfa617412e98dc4055f Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 7 Jun 2018 17:19:20 +0200 Subject: [PATCH 234/488] Tests: USB: Add data toggle test --- TESTS/host_tests/pyusb_basic.py | 114 ++++++++++++++++++++++++++++++++ TESTS/usb_device/basic/main.cpp | 42 +++++++++++- 2 files changed, 155 insertions(+), 1 deletion(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 60dcb3ec3e2..e7a791a66f9 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -290,6 +290,19 @@ def _callback_ep_test_abort(self, key, value, timestamp): except (RuntimeError) as exc: self.report_error(exc) + def _callback_ep_test_data_toggle(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + ep_test_data_toggle(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + def _callback_reset_support(self, key, value, timestamp): status = "false" if sys.platform == "darwin" else "true" self.log("Reset supported: %s" % status) @@ -345,6 +358,7 @@ def setup(self): self.register_callback('ep_test_parallel_transfers', self._callback_ep_test_parallel_transfers) self.register_callback('ep_test_parallel_transfers_ctrl', self._callback_ep_test_parallel_transfers_ctrl) self.register_callback('ep_test_abort', self._callback_ep_test_abort) + self.register_callback('ep_test_data_toggle', self._callback_ep_test_data_toggle) self.register_callback('reset_support', self._callback_reset_support) @@ -1354,6 +1368,106 @@ def ep_test_abort(dev, log, verbose=False): NUM_PACKETS_UNTIL_ABORT * ep_out.wMaxPacketSize, payload_size)) +def ep_test_data_toggle(dev, log, verbose=False): + """Test data toggle reset for bulk OUT/IN endpoint pairs. + + Given a USB device + When an interface is set + Then the data toggle bits for all endpoints are reset to DATA0 + When clear feature is called for an endpoint that *IS NOT* stalled + Then the data toggle is reset to DATA0 for that endpoint + When clear halt is called for an endpoint that *IS* stalled + Then the data toggle is reset to DATA0 for that endpoint + """ + cfg = dev.get_active_configuration() + for intf in cfg: + log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') + if intf.bAlternateSetting == 0: + log('skipping the default AlternateSetting') + continue + log('running tests') + + if verbose: + log('Testing data toggle reset for bulk endpoint pair.') + + # 1.1 reset OUT and IN data toggle to DATA0 + intf.set_altsetting() + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + + # 1.2 send and receive a single data packet, + # so both OUT and IN endpoints switch to DATA1 + loopback_ep_test(bulk_out, bulk_in, bulk_out.wMaxPacketSize) + + # 1.3 reset OUT and IN data toggle to DATA0 + # USB spec, section 9.1.1.5 + # " + # Configuring a device or changing an alternate setting causes all of the status and + # configuration values associated with endpoints in the affected interfaces to be set to their default values. + # This includes setting the data toggle of any endpoint using data toggles to the value DATA0. + # " + intf.set_altsetting() + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + + # 1.4 verify that host and USB device are still in sync with respect to data toggle + try: + loopback_ep_test(bulk_out, bulk_in, bulk_out.wMaxPacketSize) + except usb.USBError as err: + if verbose: + log(USB_ERROR_FMT.format(err, bulk_out, bulk_in, bulk_out.wMaxPacketSize)) + raise_unconditionally(lineno(), 'Data toggle not reset when setting interface.') + + # 2.1 reset OUT and IN data toggle to DATA0 + intf.set_altsetting() + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + + # 2.2 send and receive a single data packet, + # so both OUT and IN endpoints switch to DATA1 + loopback_ep_test(bulk_out, bulk_in, bulk_out.wMaxPacketSize) + + # 2.3 reset OUT data toggle to DATA0 + # USB spec, section 9.4.5 + # " + # For endpoints using data toggle, regardless of whether an endpoint has the Halt feature set, a + # ClearFeature(ENDPOINT_HALT) request always results in the data toggle being reinitialized to DATA0. + # " + bulk_out.clear_halt() +# request_endpoint_read_start(dev, bulk_out) + + # 2.4 verify that host and USB device are still in sync with respect to data toggle + try: + loopback_ep_test(bulk_out, bulk_in, bulk_out.wMaxPacketSize) + except usb.USBError as err: + if verbose: + log(USB_ERROR_FMT.format(err, bulk_out, bulk_in, bulk_out.wMaxPacketSize)) + raise_unconditionally(lineno(), 'Data toggle not reset when calling ClearFeature(ENDPOINT_HALT) ' + 'on an endpoint that has not been halted.') + + # 3.1 reset OUT and IN data toggle to DATA0 + intf.set_altsetting() + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + + # 3.2 send and receive a single data packet, + # so both OUT and IN endpoints switch to DATA1 + loopback_ep_test(bulk_out, bulk_in, bulk_out.wMaxPacketSize) + + # 3.3 reset IN data toggle to DATA0 + # USB spec, section 9.4.5 + # " + # For endpoints using data toggle, regardless of whether an endpoint has the Halt feature set, a + # ClearFeature(ENDPOINT_HALT) request always results in the data toggle being reinitialized to DATA0. + # " + usb.control.set_feature(dev, FEATURE_ENDPOINT_HALT, bulk_in) + bulk_in.clear_halt() + + # 3.4 verify that host and USB device are still in sync with respect to data toggle + try: + loopback_ep_test(bulk_out, bulk_in, bulk_out.wMaxPacketSize) + except usb.USBError as err: + if verbose: + log(USB_ERROR_FMT.format(err, bulk_out, bulk_in, bulk_out.wMaxPacketSize)) + raise_unconditionally(lineno(), 'Data toggle not reset when clearing endpoint halt.') + + def device_reset_test(log): """ Test USB implementation against repeated reset diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index 7a030473c54..18d980108c1 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -385,6 +385,45 @@ void ep_test_abort() } } +/** Test data toggle reset for bulk OUT/IN endpoint pairs + * + * Given a USB device + * When an interface is set + * Then the data toggle bits for all endpoints are reset to DATA0 + * When clear feature is called for an endpoint that *IS NOT* stalled + * Then the data toggle is reset to DATA0 for that endpoint + * When clear halt is called for an endpoint that *IS* stalled + * Then the data toggle is reset to DATA0 for that endpoint + */ +void ep_test_data_toggle() +{ + uint16_t vendor_id = 0x0d28; + // Use a product ID different than that used in other tests, + // to help Windows hosts use the correct configuration descriptor. + uint16_t product_id = 0x0206; + uint16_t product_release = 0x0001; + char _key[11] = { }; + char _value[128] = { }; + + { + USBEndpointTester serial(get_phy(), vendor_id, product_id, product_release, false); + greentea_send_kv("ep_test_data_toggle", serial.get_serial_desc_string()); + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); +#if EP_DBG + wait_ms(100); + printf("cnt_cb_set_conf = %lu\r\n", serial.get_cnt_cb_set_conf()); + printf("cnt_cb_set_intf = %lu\r\n", serial.get_cnt_cb_set_intf()); + printf("cnt_cb_bulk_out = %lu\r\n", serial.get_cnt_cb_bulk_out()); + printf("cnt_cb_bulk_in = %lu\r\n", serial.get_cnt_cb_bulk_in()); + printf("cnt_cb_int_out = %lu\r\n", serial.get_cnt_cb_int_out()); + printf("cnt_cb_int_in = %lu\r\n", serial.get_cnt_cb_int_in()); + printf("cnt_cb_iso_out = %lu\r\n", serial.get_cnt_cb_iso_out()); + printf("cnt_cb_iso_in = %lu\r\n", serial.get_cnt_cb_iso_in()); +#endif + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + /** Test USB implementation against repeated reset Given an initialized USB (HOST <---> DUT connection established) @@ -602,7 +641,8 @@ Case cases[] = { Case("endpoint test halt", ep_test_halt), Case("endpoint test parallel transfers", ep_test_parallel_transfers), Case("endpoint test parallel transfers ctrl", ep_test_parallel_transfers_ctrl), - Case("endpoint test abort", ep_test_abort) + Case("endpoint test abort", ep_test_abort), + Case("endpoint test data toggle reset", ep_test_data_toggle) }; utest::v1::status_t greentea_test_setup(const size_t number_of_cases) From 82d2bfe99590e1e05f5c999f26bcd10ff5fea247 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 21 Jun 2018 23:48:55 +0200 Subject: [PATCH 235/488] Tests: USB: Update ep callbacks Endpoint callbacks no longer have endpoint as a param. This update was introduced in #7267. --- TESTS/usb_device/basic/USBEndpointTester.cpp | 32 ++++++++++---------- TESTS/usb_device/basic/USBEndpointTester.h | 14 ++++----- 2 files changed, 23 insertions(+), 23 deletions(-) diff --git a/TESTS/usb_device/basic/USBEndpointTester.cpp b/TESTS/usb_device/basic/USBEndpointTester.cpp index 937681b279a..37cd69fcb93 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.cpp +++ b/TESTS/usb_device/basic/USBEndpointTester.cpp @@ -684,10 +684,10 @@ const uint8_t *USBEndpointTester::configuration_desc(uint8_t index) } } -void USBEndpointTester::_cb_bulk_out(usb_ep_t endpoint) +void USBEndpointTester::_cb_bulk_out() { _cnt_cb_bulk_out++; - uint32_t rx_size = read_finish(endpoint); + uint32_t rx_size = read_finish(_endpoints[EP_BULK_OUT]); if (_abort_transfer_test == false) { // Send data back to host using the IN endpoint. @@ -699,15 +699,15 @@ void USBEndpointTester::_cb_bulk_out(usb_ep_t endpoint) _num_packets_bulk_out_abort++; read_start(_endpoints[EP_BULK_OUT], _endpoint_buffs[EP_BULK_OUT], (*_endpoint_configs)[EP_BULK_OUT].max_packet); if (_num_packets_bulk_out_abort == NUM_PACKETS_UNTIL_ABORT) { - endpoint_abort(endpoint); + endpoint_abort(_endpoints[EP_BULK_OUT]); } } } -void USBEndpointTester::_cb_bulk_in(usb_ep_t endpoint) +void USBEndpointTester::_cb_bulk_in() { _cnt_cb_bulk_in++; - write_finish(endpoint); + write_finish(_endpoints[EP_BULK_IN]); if (_abort_transfer_test == false) { // Receive more data from the host using the OUT endpoint. @@ -721,15 +721,15 @@ void USBEndpointTester::_cb_bulk_in(usb_ep_t endpoint) memset(_endpoint_buffs[EP_BULK_IN], _num_packets_bulk_in_abort, (*_endpoint_configs)[EP_BULK_IN].max_packet); write_start(_endpoints[EP_BULK_IN], _endpoint_buffs[EP_BULK_IN], (*_endpoint_configs)[EP_BULK_IN].max_packet); if (_num_packets_bulk_in_abort == NUM_PACKETS_UNTIL_ABORT) { - endpoint_abort(endpoint); + endpoint_abort(_endpoints[EP_BULK_IN]); } } } -void USBEndpointTester::_cb_int_out(usb_ep_t endpoint) +void USBEndpointTester::_cb_int_out() { _cnt_cb_int_out++; - uint32_t rx_size = read_finish(endpoint); + uint32_t rx_size = read_finish(_endpoints[EP_INT_OUT]); if (_abort_transfer_test == false) { // Send data back to host using the IN endpoint. memset(_endpoint_buffs[EP_INT_IN], 0, (*_endpoint_configs)[EP_INT_IN].max_packet); @@ -740,15 +740,15 @@ void USBEndpointTester::_cb_int_out(usb_ep_t endpoint) _num_packets_int_out_abort++; read_start(_endpoints[EP_INT_OUT], _endpoint_buffs[EP_INT_OUT], (*_endpoint_configs)[EP_INT_OUT].max_packet); if (_num_packets_int_out_abort == NUM_PACKETS_UNTIL_ABORT) { - endpoint_abort(endpoint); + endpoint_abort(_endpoints[EP_INT_OUT]); } } } -void USBEndpointTester::_cb_int_in(usb_ep_t endpoint) +void USBEndpointTester::_cb_int_in() { _cnt_cb_int_in++; - write_finish(endpoint); + write_finish(_endpoints[EP_INT_IN]); if (_abort_transfer_test == false) { // Receive more data from the host using the OUT endpoint. read_start(_endpoints[EP_INT_OUT], _endpoint_buffs[EP_INT_OUT], (*_endpoint_configs)[EP_INT_OUT].max_packet); @@ -761,25 +761,25 @@ void USBEndpointTester::_cb_int_in(usb_ep_t endpoint) memset(_endpoint_buffs[EP_INT_IN], _num_packets_int_in_abort, (*_endpoint_configs)[EP_INT_IN].max_packet); write_start(_endpoints[EP_INT_IN], _endpoint_buffs[EP_INT_IN], (*_endpoint_configs)[EP_INT_IN].max_packet); if (_num_packets_int_in_abort == NUM_PACKETS_UNTIL_ABORT) { - endpoint_abort(endpoint); + endpoint_abort(_endpoints[EP_INT_IN]); } } } -void USBEndpointTester::_cb_iso_out(usb_ep_t endpoint) +void USBEndpointTester::_cb_iso_out() { _cnt_cb_iso_out++; - uint32_t rx_size = read_finish(endpoint); + uint32_t rx_size = read_finish(_endpoints[EP_ISO_OUT]); // Send data back to host using the IN endpoint. memset(_endpoint_buffs[EP_ISO_IN], 0, (*_endpoint_configs)[EP_ISO_IN].max_packet); memcpy(_endpoint_buffs[EP_ISO_IN], _endpoint_buffs[EP_ISO_OUT], rx_size); write_start(_endpoints[EP_ISO_IN], _endpoint_buffs[EP_ISO_IN], rx_size); } -void USBEndpointTester::_cb_iso_in(usb_ep_t endpoint) +void USBEndpointTester::_cb_iso_in() { _cnt_cb_iso_in++; - write_finish(endpoint); + write_finish(_endpoints[EP_ISO_IN]); // Receive more data from the host using the OUT endpoint. read_start(_endpoints[EP_ISO_OUT], _endpoint_buffs[EP_ISO_OUT], (*_endpoint_configs)[EP_ISO_OUT].max_packet); } diff --git a/TESTS/usb_device/basic/USBEndpointTester.h b/TESTS/usb_device/basic/USBEndpointTester.h index 3f7834cdc7f..ef622b2d3b0 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.h +++ b/TESTS/usb_device/basic/USBEndpointTester.h @@ -33,7 +33,7 @@ class USBEndpointTester: public USBDevice { public: USBEndpointTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool abort_transfer_test); - ~USBEndpointTester(); + virtual ~USBEndpointTester(); const char *get_serial_desc_string(); void start_ep_in_abort_test(); @@ -94,12 +94,12 @@ class USBEndpointTester: public USBDevice { void _setup_non_zero_endpoints(); bool _setup_interface(uint16_t interface, uint8_t alternate); - virtual void _cb_bulk_out(usb_ep_t endpoint); - virtual void _cb_bulk_in(usb_ep_t endpoint); - virtual void _cb_int_out(usb_ep_t endpoint); - virtual void _cb_int_in(usb_ep_t endpoint); - virtual void _cb_iso_out(usb_ep_t endpoint); - virtual void _cb_iso_in(usb_ep_t endpoint); + virtual void _cb_bulk_out(); + virtual void _cb_bulk_in(); + virtual void _cb_int_out(); + virtual void _cb_int_in(); + virtual void _cb_iso_out(); + virtual void _cb_iso_in(); private: const char *get_desc_string(const uint8_t *desc); From b161844524d9c83554d24c353a2f782b8c546725 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 21 Jun 2018 11:27:56 -0500 Subject: [PATCH 236/488] Update test to restart reads after unstall After an endpoint is unstalled any pending transfers are terminated. This patch re-starts any reads that were ongoing. --- TESTS/usb_device/basic/USBEndpointTester.cpp | 23 ++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/TESTS/usb_device/basic/USBEndpointTester.cpp b/TESTS/usb_device/basic/USBEndpointTester.cpp index 37cd69fcb93..544464a8290 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.cpp +++ b/TESTS/usb_device/basic/USBEndpointTester.cpp @@ -228,6 +228,29 @@ void USBEndpointTester::callback_request(const setup_packet_t *setup) result = PassThrough; break; } + } else if ((setup->bmRequestType.Type == STANDARD_TYPE) && (setup->bmRequestType.Recipient == ENDPOINT_RECIPIENT)) { + if (setup->bRequest == CLEAR_FEATURE) { + usb_ep_t ep = setup->wIndex; + bool valid = false; + uint32_t ep_index = 0; + if (ep == _endpoints[EP_BULK_OUT]) { + valid = true; + ep_index = EP_BULK_OUT; + } else if (ep == _endpoints[EP_INT_OUT]) { + valid = true; + ep_index = EP_INT_OUT; + } else if (ep == _endpoints[EP_ISO_OUT]) { + valid = true; + ep_index = EP_ISO_OUT; + } + + if (valid) { + // Restart reads when an OUT endpoint is unstalled + result = Success; + endpoint_unstall(ep); + read_start(_endpoints[ep_index], _endpoint_buffs[ep_index], (*_endpoint_configs)[ep_index].max_packet); + } + } } complete_request(result, data, size); } From 9c3c459ee5f2db491c6d60ae22fcd42a604e2baa Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 28 Jun 2018 10:54:33 +0200 Subject: [PATCH 237/488] Tests: USB: Decrease the max data size for iso ep Although the USB spec sets the upper limit on FS isochronous endpoint payloads to 1023 B, this value is hard to test in practice. Moreover, not all the targets Mbed OS supports (like NUCLEO_F207ZG) are able to handle all the endpoints set to max. --- TESTS/usb_device/basic/USBEndpointTester.cpp | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/TESTS/usb_device/basic/USBEndpointTester.cpp b/TESTS/usb_device/basic/USBEndpointTester.cpp index 544464a8290..2bb914cc4e9 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.cpp +++ b/TESTS/usb_device/basic/USBEndpointTester.cpp @@ -49,7 +49,19 @@ #define TEST_SIZE_EP_INT_3 (16) #define TEST_SIZE_EP_INT_4 TEST_SIZE_EP_INT_MIN -#define TEST_SIZE_EP_ISO_MAX (1023) + +/* According to USB spec, the wMaxPacketSize for FS isochronous endpoints + * is 1023 B. There are a couple of reasons this value is not used in tests: + * - some of the boards supported by Mbed OS have too little RAM dedicated + * for USB, making EndpointResolve::valid() fail when all the endpoints (2x + * bulk, 2x interrupt, 2x isochronous, 2x control) are configured to use + * the max value of wMaxPacketSize + * (e.g. NUCLEO_F207ZG has 1.25K of endpoint RAM), + * - given a test host with other USB devices on the bus, it is unlikely + * for the test device to be able to reserve the bandwidth associated with + * high wMaxPacketSize for iso endpoints. + */ +#define TEST_SIZE_EP_ISO_MAX (256) #define TEST_SIZE_EP_ISO_MIN (1) #define TEST_SIZE_EP_ISO_0 (0) #define TEST_SIZE_EP_ISO_1 (0) From 4d3b89caeccb804ee59d8fd9fb544be04ec02df8 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 28 Jun 2018 13:30:15 +0200 Subject: [PATCH 238/488] Tests: USB: Update endpoint halt test Wait for a locally created Timer thread to finish before returning. --- TESTS/host_tests/pyusb_basic.py | 34 +++++++++++++++++++-------------- 1 file changed, 20 insertions(+), 14 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index e7a791a66f9..00920338c82 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -1026,22 +1026,28 @@ def timer_handler(): delayed_halt.start() # Keep transferring data to and from the device until one of the endpoints # is halted. - while delayed_halt.is_alive(): - if ctrl_error.is_set(): - raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x} failed' - .format(ep_to_halt)) - try: - loopback_ep_test(ep_out, ep_in, ep_out.wMaxPacketSize) - except usb.core.USBError as err: + try: + while delayed_halt.is_alive(): + if ctrl_error.is_set(): + raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x} failed' + .format(ep_to_halt)) try: - ep_status = usb.control.get_status(dev, ep_to_halt) + loopback_ep_test(ep_out, ep_in, ep_out.wMaxPacketSize) except usb.core.USBError as err: - raise_unconditionally(lineno(), 'Unable to get endpoint status ({!r}).'.format(err)) - if ep_status == 1: - # OK, got USBError because of endpoint halt - return - else: - raise_unconditionally(lineno(), 'Unexpected error ({!r}).'.format(err)) + try: + ep_status = usb.control.get_status(dev, ep_to_halt) + except usb.core.USBError as err: + raise_unconditionally(lineno(), 'Unable to get endpoint status ({!r}).'.format(err)) + if ep_status == 1: + # OK, got USBError because of endpoint halt + return + else: + raise_unconditionally(lineno(), 'Unexpected error ({!r}).'.format(err)) + except: + raise + finally: + # Always wait for the Timer thread created above. + delayed_halt.join() raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x}' ' during transmission did not raise USBError.' .format(ep_to_halt)) From 0c56064d23503ce99abca3fef5f8bd1113a27ad4 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Fri, 29 Jun 2018 18:05:36 +0200 Subject: [PATCH 239/488] Tests: USB: Check ep buffer is released by abort Validate that endpoint buffer is not used after a transfer has been aborted. --- TESTS/host_tests/pyusb_basic.py | 36 ++++++++- TESTS/usb_device/basic/USBEndpointTester.cpp | 79 +++++++++++++++++--- TESTS/usb_device/basic/USBEndpointTester.h | 1 + TESTS/usb_device/basic/main.cpp | 1 + 4 files changed, 107 insertions(+), 10 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 00920338c82..f3e486bb45f 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -56,6 +56,7 @@ def get_interface(dev, interface, alternate=0): VENDOR_TEST_CTRL_IN_SIZES = 9 VENDOR_TEST_CTRL_OUT_SIZES = 10 VENDOR_TEST_READ_START = 11 +VENDOR_TEST_ABORT_BUFF_CHECK = 12 VENDOR_TEST_UNSUPPORTED_REQUEST = 32 REQUEST_GET_STATUS = 0 @@ -1062,6 +1063,16 @@ def request_endpoint_read_start(dev, ep): dev.ctrl_transfer(**ctrl_kwargs) +def request_abort_buff_check(dev, ep): + ctrl_kwargs = { + 'bmRequestType': build_request_type(CTRL_IN, CTRL_TYPE_VENDOR, CTRL_RECIPIENT_ENDPOINT), + 'bRequest': VENDOR_TEST_ABORT_BUFF_CHECK, + 'wValue': 0, + 'wIndex': ep.bEndpointAddress, + 'data_or_wLength': 1} + return bool(dev.ctrl_transfer(**ctrl_kwargs)[0]) + + USB_ERROR_FMT = str('Got {0!r} while testing endpoints ' '{1.bEndpointAddress:#04x}({1.wMaxPacketSize:02}) and ' '{2.bEndpointAddress:#04x}({2.wMaxPacketSize:02}) with ' @@ -1304,9 +1315,16 @@ def ep_test_abort(dev, log, verbose=False): Given a USB device with multiple OUT/IN endpoint pairs When a device aborts an in progress data transfer Then no more data is transmitted + and endpoint buffer is correctly released on the device end """ NUM_PACKETS_UNTIL_ABORT = 2 NUM_PACKETS_AFTER_ABORT = 8 + + # If the host ever receives a payload with any byte set to this value, + # the device does not handle abort operation correctly. The buffer + # passed to aborted operation must not be used after call to abort(). + FORBIDDEN_PAYLOAD_VALUE = NUM_PACKETS_AFTER_ABORT + 1 + cfg = dev.get_active_configuration() for intf in cfg: log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') @@ -1336,6 +1354,11 @@ def ep_test_abort(dev, log, verbose=False): payload_in.extend(packet) except usb.core.USBError as err: break + if FORBIDDEN_PAYLOAD_VALUE in payload_in: + raise_unconditionally( + lineno(), 'Endpoint buffer not released when aborting the ' + 'write operation on endpoint {0.bEndpointAddress:#04x}.' + .format(ep_in)) if verbose: log('The size of data successfully received from endpoint {0.bEndpointAddress:#04x}: {1} B.' .format(ep_in, len(payload_in))) @@ -1353,13 +1376,24 @@ def ep_test_abort(dev, log, verbose=False): log('Testing aborting an in progress transfer for OUT endpoints.') for ep_out in (bulk_out, interrupt_out): payload_size = (NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) * ep_out.wMaxPacketSize - payload_out = array.array('B', (0x01 for _ in range(ep_out.wMaxPacketSize))) num_bytes_written = 0 while num_bytes_written < payload_size: + payload_out = array.array('B', (num_bytes_written/ep_out.wMaxPacketSize + for _ in range(ep_out.wMaxPacketSize))) try: num_bytes_written += ep_out.write(payload_out) except usb.core.USBError: break + try: + ep_buff_correct = request_abort_buff_check(dev, ep_out) + except (usb.core.USBError, IndexError, TypeError) as err: + raise_unconditionally( + lineno(), 'Unable to verify endpoint buffer content ({!r}).'.format(err)) + if not ep_buff_correct: + raise_unconditionally( + lineno(), 'Endpoint buffer not released when aborting the ' + 'read operation on endpoint {0.bEndpointAddress:#04x}.' + .format(ep_out)) if verbose: log('The size of data successfully sent to endpoint {0.bEndpointAddress:#04x}: {1} B.' .format(ep_out, num_bytes_written)) diff --git a/TESTS/usb_device/basic/USBEndpointTester.cpp b/TESTS/usb_device/basic/USBEndpointTester.cpp index 2bb914cc4e9..8085dc0c1dc 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.cpp +++ b/TESTS/usb_device/basic/USBEndpointTester.cpp @@ -24,12 +24,20 @@ #define NUM_PACKETS_UNTIL_ABORT 2 #define NUM_PACKETS_AFTER_ABORT 8 +#define EP_ABORT_BUFF_VALUE 0xff -#define VENDOR_TEST_CTRL_IN 1 -#define VENDOR_TEST_CTRL_OUT 2 -#define VENDOR_TEST_CTRL_IN_SIZES 9 -#define VENDOR_TEST_CTRL_OUT_SIZES 10 -#define VENDOR_TEST_READ_START 11 +/* If the host ever receives a payload with any byte set to this value, + * the device does not handle abort operation correctly. The buffer + * passed to aborted operation must not be used after call to abort(). + */ +#define FORBIDDEN_PAYLOAD_VALUE (NUM_PACKETS_AFTER_ABORT + 1) + +#define VENDOR_TEST_CTRL_IN 1 +#define VENDOR_TEST_CTRL_OUT 2 +#define VENDOR_TEST_CTRL_IN_SIZES 9 +#define VENDOR_TEST_CTRL_OUT_SIZES 10 +#define VENDOR_TEST_READ_START 11 +#define VENDOR_TEST_ABORT_BUFF_CHECK 12 #define EVENT_READY (1 << 0) @@ -236,6 +244,12 @@ void USBEndpointTester::callback_request(const setup_packet_t *setup) case VENDOR_TEST_READ_START: result = (_request_read_start(setup)) ? Success : Failure; break; + case VENDOR_TEST_ABORT_BUFF_CHECK: + result = Send; + ctrl_buf[0] = _request_abort_buff_check(setup); + data = ctrl_buf; + size = 1; + break; default: result = PassThrough; break; @@ -273,20 +287,50 @@ bool USBEndpointTester::_request_read_start(const setup_packet_t *setup) if (setup->bmRequestType.Recipient != ENDPOINT_RECIPIENT) { return false; } - size_t ep_index = NUM_ENDPOINTS + 1; + size_t ep_index = NUM_ENDPOINTS; for (size_t i = 0; i < NUM_ENDPOINTS; i++) { if (_endpoints[i] == setup->wIndex) { ep_index = i; break; } } - if (ep_index > NUM_ENDPOINTS) { + if (ep_index == NUM_ENDPOINTS) { + return false; + } + if (_endpoint_buffs[ep_index] == NULL) { return false; } endpoint_abort(_endpoints[ep_index]); return read_start(_endpoints[ep_index], _endpoint_buffs[ep_index], (*_endpoint_configs)[ep_index].max_packet); } +bool USBEndpointTester::_request_abort_buff_check(const setup_packet_t *setup) +{ + assert_locked(); + if (setup->bmRequestType.Recipient != ENDPOINT_RECIPIENT) { + return false; + } + size_t ep_index = NUM_ENDPOINTS; + for (size_t i = 0; i < NUM_ENDPOINTS; i++) { + if (_endpoints[i] == setup->wIndex) { + ep_index = i; + break; + } + } + if (ep_index == NUM_ENDPOINTS) { + return false; + } + if (_endpoint_buffs[ep_index] == NULL) { + return false; + } + for (size_t i = 0; i < (*_endpoint_configs)[ep_index].max_packet; i++) { + if (_endpoint_buffs[ep_index][i] != EP_ABORT_BUFF_VALUE) { + return false; + } + } + return true; +} + void USBEndpointTester::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) { if (aborted) { @@ -309,6 +353,9 @@ void USBEndpointTester::callback_request_xfer_done(const setup_packet_t *setup, case VENDOR_TEST_CTRL_IN_SIZES: result = true; break; + case VENDOR_TEST_ABORT_BUFF_CHECK: + result = true; + break; default: result = false; break; @@ -723,7 +770,6 @@ void USBEndpointTester::_cb_bulk_out() { _cnt_cb_bulk_out++; uint32_t rx_size = read_finish(_endpoints[EP_BULK_OUT]); - if (_abort_transfer_test == false) { // Send data back to host using the IN endpoint. memset(_endpoint_buffs[EP_BULK_IN], 0, (*_endpoint_configs)[EP_BULK_IN].max_packet); @@ -732,6 +778,10 @@ void USBEndpointTester::_cb_bulk_out() } else { // Abort the transfer if enough data was received. _num_packets_bulk_out_abort++; + if (_num_packets_bulk_out_abort == NUM_PACKETS_UNTIL_ABORT) { + // Set every byte of the buffer to a known value. + memset(_endpoint_buffs[EP_BULK_OUT], EP_ABORT_BUFF_VALUE, (*_endpoint_configs)[EP_BULK_OUT].max_packet); + } read_start(_endpoints[EP_BULK_OUT], _endpoint_buffs[EP_BULK_OUT], (*_endpoint_configs)[EP_BULK_OUT].max_packet); if (_num_packets_bulk_out_abort == NUM_PACKETS_UNTIL_ABORT) { endpoint_abort(_endpoints[EP_BULK_OUT]); @@ -743,7 +793,6 @@ void USBEndpointTester::_cb_bulk_in() { _cnt_cb_bulk_in++; write_finish(_endpoints[EP_BULK_IN]); - if (_abort_transfer_test == false) { // Receive more data from the host using the OUT endpoint. read_start(_endpoints[EP_BULK_OUT], _endpoint_buffs[EP_BULK_OUT], (*_endpoint_configs)[EP_BULK_OUT].max_packet); @@ -757,6 +806,10 @@ void USBEndpointTester::_cb_bulk_in() write_start(_endpoints[EP_BULK_IN], _endpoint_buffs[EP_BULK_IN], (*_endpoint_configs)[EP_BULK_IN].max_packet); if (_num_packets_bulk_in_abort == NUM_PACKETS_UNTIL_ABORT) { endpoint_abort(_endpoints[EP_BULK_IN]); + // Verify that buffer given in write_start is not used after the + // call to endpoint_abort(), by changing the buffer contents. + // The test will fail if the host receives new buffer content. + memset(_endpoint_buffs[EP_BULK_IN], FORBIDDEN_PAYLOAD_VALUE, (*_endpoint_configs)[EP_BULK_IN].max_packet); } } } @@ -773,6 +826,10 @@ void USBEndpointTester::_cb_int_out() } else { // Abort the transfer if enough data was received. _num_packets_int_out_abort++; + if (_num_packets_int_out_abort == NUM_PACKETS_UNTIL_ABORT) { + // Set every byte of the buffer to a known value. + memset(_endpoint_buffs[EP_INT_OUT], EP_ABORT_BUFF_VALUE, (*_endpoint_configs)[EP_INT_OUT].max_packet); + } read_start(_endpoints[EP_INT_OUT], _endpoint_buffs[EP_INT_OUT], (*_endpoint_configs)[EP_INT_OUT].max_packet); if (_num_packets_int_out_abort == NUM_PACKETS_UNTIL_ABORT) { endpoint_abort(_endpoints[EP_INT_OUT]); @@ -797,6 +854,10 @@ void USBEndpointTester::_cb_int_in() write_start(_endpoints[EP_INT_IN], _endpoint_buffs[EP_INT_IN], (*_endpoint_configs)[EP_INT_IN].max_packet); if (_num_packets_int_in_abort == NUM_PACKETS_UNTIL_ABORT) { endpoint_abort(_endpoints[EP_INT_IN]); + // Verify that buffer given in write_start is not used after the + // call to endpoint_abort(), by changing the buffer contents. + // The test will fail if the host receives new buffer content. + memset(_endpoint_buffs[EP_INT_IN], FORBIDDEN_PAYLOAD_VALUE, (*_endpoint_configs)[EP_INT_IN].max_packet); } } } diff --git a/TESTS/usb_device/basic/USBEndpointTester.h b/TESTS/usb_device/basic/USBEndpointTester.h index ef622b2d3b0..3b0afef66c9 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.h +++ b/TESTS/usb_device/basic/USBEndpointTester.h @@ -104,6 +104,7 @@ class USBEndpointTester: public USBDevice { private: const char *get_desc_string(const uint8_t *desc); bool _request_read_start(const setup_packet_t *setup); + bool _request_abort_buff_check(const setup_packet_t *setup); }; #endif diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index 18d980108c1..ace311a06ce 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -355,6 +355,7 @@ void ep_test_parallel_transfers_ctrl() * Given a USB device with multiple OUT/IN endpoint pairs * When a device aborts an in progress data transfer * Then no more data is transmitted + * and endpoint buffer is correctly released on the device end */ void ep_test_abort() { From dfe612d177d6309b180fca96f6b51e49e0123869 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 31 Jul 2018 16:32:46 -0500 Subject: [PATCH 240/488] Remove HAL_GetTick from ST USBPhy Remove the function HAL_GetTick from the ST USBPhy driver. This is no longer needed as that change has been made on master. --- usb/device/targets/TARGET_STM/USBPhy_STM32.cpp | 6 ------ 1 file changed, 6 deletions(-) diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 7990dc02fb0..9f1c78d5419 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -525,10 +525,4 @@ void USBPhyHw::_usbisr(void) { instance->events->start_process(); } -//TODO - remove this hack which allows HAL_Delay to work when interrupts are disabled -extern "C" uint32_t HAL_GetTick() -{ - return ticker_read_us(get_us_ticker_data()) / 1000; -} - #endif From 039b99df85f05647f91fb17b85e9de85f16f7708 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 30 Oct 2018 15:36:39 -0500 Subject: [PATCH 241/488] Fix USB traceback during testing when wrong size In the pyusb_basic host test check the length of control transfers before comparing contents for equality. --- TESTS/host_tests/pyusb_basic.py | 17 ++++++----------- 1 file changed, 6 insertions(+), 11 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index f3e486bb45f..2e0f12332e5 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -24,6 +24,7 @@ from threading import Thread, Event, Timer import array import random +import os import usb.core from usb.util import build_request_type @@ -841,12 +842,8 @@ def control_data_test(dev, sizes_list, log): request = VENDOR_TEST_CTRL_OUT_SIZES value = i # Size of data the device should actually read index = 0 # Unused - set for debugging only - data = bytearray(i) # Dummy data - if i == 1: - data[0] = count - else: - data[0] = count - 1 - data[i - 1] = count + 1 + data = bytearray(os.urandom(i)) # Dummy data + try: dev.ctrl_transfer(request_type, request, value, index, data, 5000) except usb.core.USBError: @@ -860,11 +857,9 @@ def control_data_test(dev, sizes_list, log): length = i try: ret = dev.ctrl_transfer(request_type, request, value, index, length, 5000) - if i == 1: - raise_if_different(count, ret[0], lineno(), "send/receive data not match") - else: - raise_if_different(count - 1, ret[0], lineno(), "send/receive data not match") - raise_if_different(count + 1, ret[i - 1], lineno(), "send/receive data not match") + raise_if_different(i, len(ret), lineno(), "send/receive data is the wrong size") + for j in range(0, i): + raise_if_different(data[j], ret[j], lineno(), "send/receive data not match") except usb.core.USBError: raise_unconditionally(lineno(), "VENDOR_TEST_CTRL_IN_SIZES failed") count += 1 From 3481e2f6b973cc1f5b6f8aaf5cec069950f2960f Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 26 Oct 2018 11:11:49 -0500 Subject: [PATCH 242/488] Ignore disabled Kinetis USB endpoint interrupts Ignore interrupts on disabled USB endpoints. This prevents handling interrupts when in the wrong state. Prior to this patch when running the serial test on a K64F the assert on line 908 of USBDevice.cpp would sometimes be triggered. This assert indicates that an endpoint 0 IN interrupt occurred before the device was ready. This occurs during the test_cdc_usb_reconnect test when the host sends a "Set Control Line State" USB request and the device acknowledges it just before USB is disconnected. --- usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp index 16b0cd28569..07282bc400a 100644 --- a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp +++ b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp @@ -636,8 +636,11 @@ void USBPhyHw::process() uint32_t ev_odd = (USB0->STAT >> 2) & 0x01; int phy_ep = (num << 1) | dir; + bool tx_en = (USB0->ENDPOINT[PHY_TO_LOG(phy_ep)].ENDPT & USB_ENDPT_EPTXEN_MASK) ? true : false; + bool rx_en = (USB0->ENDPOINT[PHY_TO_LOG(phy_ep)].ENDPT & USB_ENDPT_EPRXEN_MASK) ? true : false; + // setup packet - if ((num == 0) && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == SETUP_TOKEN)) { + if (tx_en && (num == 0) && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == SETUP_TOKEN)) { setup_suspend = true; Data1 |= 0x02 | 0x01; // set DATA1 for TX and RX bdt[EP_BDT_IDX(0, TX, EVEN)].info &= ~BD_OWN_MASK; @@ -648,7 +651,7 @@ void USBPhyHw::process() } else { // OUT packet - if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == OUT_TOKEN) { + if (rx_en && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == OUT_TOKEN)) { if (num == 0) events->ep0_out(); else { @@ -658,7 +661,7 @@ void USBPhyHw::process() } // IN packet - if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == IN_TOKEN) { + if (tx_en && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == IN_TOKEN)) { if (num == 0) { events->ep0_in(); if (set_addr == 1) { From e3d77627e10d7fa4567731442c273d7b8819cbfd Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 9 Aug 2018 15:28:58 +0200 Subject: [PATCH 243/488] Tests: USB: Add tests for CDC class. --- TESTS/host_tests/usb_device_serial.py | 242 +++++++++++++++++++ TESTS/usb_device/serial/README.md | 18 ++ TESTS/usb_device/serial/main.cpp | 328 ++++++++++++++++++++++++++ 3 files changed, 588 insertions(+) create mode 100644 TESTS/host_tests/usb_device_serial.py create mode 100644 TESTS/usb_device/serial/README.md create mode 100644 TESTS/usb_device/serial/main.cpp diff --git a/TESTS/host_tests/usb_device_serial.py b/TESTS/host_tests/usb_device_serial.py new file mode 100644 index 00000000000..82875bb9559 --- /dev/null +++ b/TESTS/host_tests/usb_device_serial.py @@ -0,0 +1,242 @@ +""" +mbed SDK +Copyright (c) 2018 ARM Limited + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +""" +from __future__ import print_function +import functools +import itertools +import time +import threading +import serial +import serial.tools.list_ports as stlp +import mbed_host_tests + + +MSG_KEY_PORT_OPEN_WAIT = 'port_open_wait' +MSG_KEY_SEND_BYTES_SINGLE = 'send_single' +MSG_KEY_SEND_BYTES_MULTIPLE = 'send_multiple' +MSG_KEY_LOOPBACK = 'loopback' + +RX_BUFF_SIZE = 32 +TERM_REOPEN_DELAY = 0.1 + + +def usb_serial_name(vid, pid): + """Get USB serial device name based on vid and pid.""" + for port_info in stlp.comports(): + if port_info.vid == vid and port_info.pid == pid: + return port_info.device + return None + + +class RetryError(Exception): + """Exception raised by retry_fun_call().""" + + +def retry_fun_call(fun, num_retries=3, retry_delay=0.0): + """Call fun and retry if any exception was raised. + + fun is called at most num_retries with a retry_dalay in between calls. + Raises RetryError if the retry limit is exhausted. + """ + verbose = False + final_err = None + for retry in range(1, num_retries + 1): + try: + return fun() # pylint: disable=not-callable + except Exception as exc: # pylint: disable=broad-except + final_err = exc + if verbose: + print('Retry {}/{} failed ({})' + .format(retry, num_retries, str(fun))) + time.sleep(retry_delay) + err_msg = 'Failed with "{}". Tried {} times.' + raise RetryError(err_msg.format(final_err, num_retries)) + + +class USBSerialTest(mbed_host_tests.BaseHostTest): + """Host side test for USB CDC & Serial classes.""" + + @staticmethod + def get_usb_serial_name(usb_id_str): + """Get USB serial device name as registered in the system. + + Search is based on the id received from the device itself. + Raises RuntimeError if the device is not found. + """ + vid, pid = (int(i, base=16) for i in str(usb_id_str).split(',')) + port_name = usb_serial_name(vid, pid) + if port_name is None: + err_msg = 'USB serial device (vid={:#04x}, pid={:#04x}) not found.' + raise RuntimeError(err_msg.format(vid, pid)) + return port_name + + def __init__(self): + super(USBSerialTest, self).__init__() + self.__bg_task = None + + def port_open_wait(self, usb_id_str): + """Open the serial and wait until it's closed by the device.""" + mbed_serial = serial.Serial() + try: + mbed_serial.port = retry_fun_call( + fun=functools.partial(self.get_usb_serial_name, usb_id_str), # pylint: disable=not-callable + num_retries=20, + retry_delay=0.05) + retry_fun_call( + fun=mbed_serial.open, + num_retries=10, + retry_delay=0.05) + try: + mbed_serial.read() # wait until closed + except (serial.portNotOpenError, serial.SerialException): + pass + except RetryError as exc: + self.log('TEST ERROR: {}'.format(exc)) + self.notify_complete(False) + return + + def port_open_close(self, usb_id_str): + mbed_serial = serial.Serial(timeout=0.5, write_timeout=0.1) + try: + mbed_serial.port = retry_fun_call( + fun=functools.partial(self.get_usb_serial_name, usb_id_str), # pylint: disable=not-callable + num_retries=20, + retry_delay=0.05) + retry_fun_call( + fun=mbed_serial.open, + num_retries=10, + retry_delay=0.05) + mbed_serial.reset_output_buffer() + time.sleep(TERM_REOPEN_DELAY) + mbed_serial.close() + except RetryError as exc: + self.log('TEST ERROR: {}'.format(exc)) + self.notify_complete(False) + return + + def send_data_sequence(self, usb_id_str, chunk_size=1): + """Open the serial and send a sequence of values. + + chunk_size defines the size of data sent in each write operation. + The input buffer content is discarded. + """ + mbed_serial = serial.Serial(write_timeout=0.1) + try: + mbed_serial.port = retry_fun_call( + fun=functools.partial(self.get_usb_serial_name, usb_id_str), # pylint: disable=not-callable + num_retries=20, + retry_delay=0.05) + retry_fun_call( + fun=mbed_serial.open, + num_retries=10, + retry_delay=0.05) + except RetryError as exc: + self.log('TEST ERROR: {}'.format(exc)) + self.notify_complete(False) + return + mbed_serial.reset_output_buffer() + for byteval in itertools.chain(reversed(range(0x100)), range(0x100)): + try: + payload = bytearray(chunk_size * (byteval,)) + mbed_serial.write(payload) +# self.log('SENT: {!r}'.format(payload)) + # Discard input buffer content. The data received from the + # device during the concurrent rx/tx test is irrelevant. + mbed_serial.reset_input_buffer() + except serial.SerialException as exc: + self.log('TEST ERROR: {}'.format(exc)) + self.notify_complete(False) + return + while mbed_serial.out_waiting > 0: + time.sleep(0.001) + mbed_serial.close() + + def loopback(self, usb_id_str): + """Open the serial and send back every byte received.""" + mbed_serial = serial.Serial(timeout=0.5, write_timeout=0.1) + try: + mbed_serial.port = retry_fun_call( + fun=functools.partial(self.get_usb_serial_name, usb_id_str), # pylint: disable=not-callable + num_retries=20, + retry_delay=0.05) + retry_fun_call( + fun=mbed_serial.open, + num_retries=10, + retry_delay=0.05) + except RetryError as exc: + self.log('TEST ERROR: {}'.format(exc)) + self.notify_complete(False) + return + mbed_serial.reset_output_buffer() + try: + payload = mbed_serial.read(1) + while len(payload) == 1: + mbed_serial.write(payload) +# self.log('SENT: {!r}'.format(payload)) + payload = mbed_serial.read(1) + except serial.SerialException as exc: + self.log('TEST ERROR: {}'.format(exc)) + self.notify_complete(False) + return + while mbed_serial.out_waiting > 0: + time.sleep(0.001) + mbed_serial.close() + + def setup(self): + self.register_callback(MSG_KEY_PORT_OPEN_WAIT, self.cb_port_open_wait) + self.register_callback(MSG_KEY_SEND_BYTES_SINGLE, self.cb_send_bytes_single) + self.register_callback(MSG_KEY_SEND_BYTES_MULTIPLE, self.cb_send_bytes_multiple) + self.register_callback(MSG_KEY_LOOPBACK, self.cb_loopback) + + def start_bg_task(self, **thread_kwargs): + """Start a new daemon thread. + + The callbacks delegate serial handling to a background task to + prevent any delays in the device side assert handling. Only one + background task is kept running to prevent multiple access + to serial. + """ + try: + self.__bg_task.join() + except (AttributeError, RuntimeError): + pass + self.__bg_task = threading.Thread(**thread_kwargs) + self.__bg_task.daemon = True + self.__bg_task.start() + + def cb_port_open_wait(self, key, value, timestamp): + """Open the serial and wait until it's closed by the device.""" + self.start_bg_task( + target=self.port_open_wait, + args=(value, )) + + def cb_send_bytes_single(self, key, value, timestamp): + """Open the serial and send a sequence of values.""" + self.start_bg_task( + target=self.send_data_sequence, + args=(value, 1)) + + def cb_send_bytes_multiple(self, key, value, timestamp): + """Open the serial and send a sequence of one byte values.""" + self.start_bg_task( + target=self.send_data_sequence, + args=(value, RX_BUFF_SIZE)) + + def cb_loopback(self, key, value, timestamp): + """Open the serial and send a sequence of multibyte values.""" + self.start_bg_task( + target=self.loopback, + args=(value, )) diff --git a/TESTS/usb_device/serial/README.md b/TESTS/usb_device/serial/README.md new file mode 100644 index 00000000000..f2c788eb3ff --- /dev/null +++ b/TESTS/usb_device/serial/README.md @@ -0,0 +1,18 @@ +# `udev` rules for Mbed USB CDC device + +Before running `tests-usb_device-serial` test suite on Debian-based Linux +distros, make sure to [update the `udev` rules][1] as follows: + +```bash +sudo tee /etc/udev/rules.d/99-ttyacms.rules >/dev/null < +#include "USBCDC.h" + +#define USB_CDC_VID 0x1f00 +#define USB_CDC_PID 0x2013 + +#define MSG_KEY_PORT_OPEN_WAIT "port_open_wait" +#define MSG_KEY_SEND_BYTES_SINGLE "send_single" +#define MSG_KEY_SEND_BYTES_MULTIPLE "send_multiple" +#define MSG_KEY_LOOPBACK "loopback" + +#define TX_BUFF_SIZE 32 +#define RX_BUFF_SIZE 32 +#define CDC_LOOPBACK_REPS 1200 +#define USB_RECONNECT_DELAY_MS 200 + +using utest::v1::Case; +using utest::v1::Specification; +using utest::v1::Harness; + +#define EF_SEND (1ul << 0) +EventFlags event_flags; + +bool send_testcase_data(const char *msg_key, uint16_t usb_vid, uint16_t usb_pid) +{ + char msg_value[10]; + int str_len = snprintf(msg_value, sizeof msg_value, "%04x,%04x", usb_vid, usb_pid); + if (str_len != (sizeof msg_value) - 1) { + utest_printf("Failed to compose a value string to be sent to host."); + return false; + } + greentea_send_kv(msg_key, msg_value); + return true; +} + +/** Test CDC USB reconnect + * + * Given the host has successfully opened the port of a USB CDC device + * When the USB device disconnects and connects again + * Then the host is able to successfully open the port again + */ +void test_cdc_usb_reconnect() +{ + USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); + TEST_ASSERT_FALSE(usb_cdc.configured()); + TEST_ASSERT_FALSE(usb_cdc.ready()); + + // Connect the USB device. + usb_cdc.connect(); + // Wait for the USB enumeration to complete. + while (!usb_cdc.configured()) { + wait_ms(1); + } + TEST_ASSERT_TRUE(usb_cdc.configured()); + TEST_ASSERT_FALSE(usb_cdc.ready()); + + if (!send_testcase_data(MSG_KEY_PORT_OPEN_WAIT, USB_CDC_VID, USB_CDC_PID)) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + // Wait for the host to open the port. + usb_cdc.wait_ready(); + TEST_ASSERT_TRUE(usb_cdc.configured()); + TEST_ASSERT_TRUE(usb_cdc.ready()); + + // Disconnect the USB device. + usb_cdc.disconnect(); + TEST_ASSERT_FALSE(usb_cdc.configured()); + TEST_ASSERT_FALSE(usb_cdc.ready()); + + wait_ms(USB_RECONNECT_DELAY_MS); + // Connect the USB device again. + usb_cdc.connect(); + // Wait for the USB enumeration to complete. + while (!usb_cdc.configured()) { + wait_ms(1); + } + TEST_ASSERT_TRUE(usb_cdc.configured()); + TEST_ASSERT_FALSE(usb_cdc.ready()); + + if (!send_testcase_data(MSG_KEY_PORT_OPEN_WAIT, USB_CDC_VID, USB_CDC_PID)) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + // Wait for the host to open the port again. + usb_cdc.wait_ready(); + TEST_ASSERT_TRUE(usb_cdc.configured()); + TEST_ASSERT_TRUE(usb_cdc.ready()); + + // Disconnect the USB device again. + usb_cdc.disconnect(); + TEST_ASSERT_FALSE(usb_cdc.configured()); + TEST_ASSERT_FALSE(usb_cdc.ready()); +} + +/** Test CDC receive single bytes + * + * Given the USB CDC device connected to a host + * When the host transmits a known sequence one byte at a time + * Then every byte received by the device matches the sequence + */ +void test_cdc_rx_single_bytes() +{ + USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); + usb_cdc.connect(); + if (send_testcase_data(MSG_KEY_SEND_BYTES_SINGLE, USB_CDC_VID, USB_CDC_PID) == false) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + usb_cdc.wait_ready(); + uint8_t buff = 0x01; + for (int expected = 0xff; expected >= 0; expected--) { + TEST_ASSERT(usb_cdc.receive(&buff, 1, NULL)); + TEST_ASSERT_EQUAL_UINT8(expected, buff); + } + for (int expected = 0; expected <= 0xff; expected++) { + TEST_ASSERT(usb_cdc.receive(&buff, 1, NULL)); + TEST_ASSERT_EQUAL_UINT8(expected, buff); + } + // Wait for the host to close its port. + while (usb_cdc.ready()) { + wait_ms(1); + } + usb_cdc.disconnect(); +} + +void tx_thread_fun(USBCDC *usb_cdc) +{ + uint8_t buff_val = 0; + uint8_t buff[TX_BUFF_SIZE] = { 0 }; + while (event_flags.get() & EF_SEND) { + if (!usb_cdc->send(buff, TX_BUFF_SIZE)) { + wait_ms(1); + continue; + } + buff_val++; + memset(buff, buff_val, TX_BUFF_SIZE); + } +} + +/** Test CDC receive single bytes concurrently + * + * Given the USB CDC device connected to a host + * When the host transmits a known sequence one byte at a time + * and at the same time the device transmits data to host + * Then every byte received by the device matches the sequence + */ +void test_cdc_rx_single_bytes_concurrent() +{ + USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); + usb_cdc.connect(); + if (send_testcase_data(MSG_KEY_SEND_BYTES_SINGLE, USB_CDC_VID, USB_CDC_PID) == false) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + usb_cdc.wait_ready(); + Thread tx_thread; + event_flags.set(EF_SEND); + tx_thread.start(mbed::callback(tx_thread_fun, &usb_cdc)); + uint8_t buff = 0x01; + for (int expected = 0xff; expected >= 0; expected--) { + TEST_ASSERT(usb_cdc.receive(&buff, 1, NULL)); + TEST_ASSERT_EQUAL_UINT8(expected, buff); + } + for (int expected = 0; expected <= 0xff; expected++) { + TEST_ASSERT(usb_cdc.receive(&buff, 1, NULL)); + TEST_ASSERT_EQUAL_UINT8(expected, buff); + } + event_flags.clear(EF_SEND); + tx_thread.join(); + // Wait for the host to close its port. + while (usb_cdc.ready()) { + wait_ms(1); + } + usb_cdc.disconnect(); +} + +/** Test CDC receive multiple bytes + * + * Given the USB CDC device connected to a host + * When the host transmits chunks of data following a known sequence + * Then every chunk received by the device matches the sequence + */ +void test_cdc_rx_multiple_bytes() +{ + USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); + usb_cdc.connect(); + if (send_testcase_data(MSG_KEY_SEND_BYTES_MULTIPLE, USB_CDC_VID, USB_CDC_PID) == false) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + usb_cdc.wait_ready(); + uint8_t buff[RX_BUFF_SIZE] = { 0 }; + uint8_t expected_buff[RX_BUFF_SIZE] = { 0 }; + for (int expected = 0xff; expected >= 0; expected--) { + memset(expected_buff, expected, RX_BUFF_SIZE); + TEST_ASSERT(usb_cdc.receive(buff, RX_BUFF_SIZE, NULL)); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_buff, buff, RX_BUFF_SIZE); + } + for (int expected = 0; expected <= 0xff; expected++) { + memset(expected_buff, expected, RX_BUFF_SIZE); + TEST_ASSERT(usb_cdc.receive(buff, RX_BUFF_SIZE, NULL)); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_buff, buff, RX_BUFF_SIZE); + } + // Wait for the host to close its port. + while (usb_cdc.ready()) { + wait_ms(1); + } + usb_cdc.disconnect(); +} + +/** Test CDC receive multiple bytes concurrently + * + * Given the USB CDC device connected to a host + * When the host transmits chunks of data following a known sequence + * and at the same time the device transmits data to host + * Then every chunk received by the device matches the sequence + */ +void test_cdc_rx_multiple_bytes_concurrent() +{ + USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); + usb_cdc.connect(); + if (send_testcase_data(MSG_KEY_SEND_BYTES_MULTIPLE, USB_CDC_VID, USB_CDC_PID) == false) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + usb_cdc.wait_ready(); + Thread tx_thread; + event_flags.set(EF_SEND); + tx_thread.start(mbed::callback(tx_thread_fun, &usb_cdc)); + uint8_t buff[RX_BUFF_SIZE] = { 0 }; + uint8_t expected_buff[RX_BUFF_SIZE] = { 0 }; + for (int expected = 0xff; expected >= 0; expected--) { + memset(expected_buff, expected, RX_BUFF_SIZE); + TEST_ASSERT(usb_cdc.receive(buff, RX_BUFF_SIZE, NULL)); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_buff, buff, RX_BUFF_SIZE); + } + for (int expected = 0; expected <= 0xff; expected++) { + memset(expected_buff, expected, RX_BUFF_SIZE); + TEST_ASSERT(usb_cdc.receive(buff, RX_BUFF_SIZE, NULL)); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_buff, buff, RX_BUFF_SIZE); + } + event_flags.clear(EF_SEND); + tx_thread.join(); + // Wait for the host to close its port. + while (usb_cdc.ready()) { + wait_ms(1); + } + usb_cdc.disconnect(); +} + +/** Test CDC loopback + * + * Given the USB CDC device connected to a host + * When the device transmits random bytes to host + * and the host transmits them back to the device + * Then every byte received by the device is equal to byte preciously sent + */ +void test_cdc_loopback() +{ + USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); + usb_cdc.connect(); + if (send_testcase_data(MSG_KEY_LOOPBACK, USB_CDC_VID, USB_CDC_PID) == false) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + usb_cdc.wait_ready(); + uint8_t rx_buff, tx_buff; + for (int i = 0; i < CDC_LOOPBACK_REPS; i++) { + tx_buff = (uint8_t)(rand() % 0x100); + rx_buff = (uint8_t)(tx_buff + 1); + TEST_ASSERT(usb_cdc.send(&tx_buff, 1)); + TEST_ASSERT(usb_cdc.receive(&rx_buff, 1, NULL)); + TEST_ASSERT_EQUAL_UINT8(tx_buff, rx_buff); + } + // Wait for the host to close its port. + while (usb_cdc.ready()) { + wait_ms(1); + } + usb_cdc.disconnect(); +} + +utest::v1::status_t testsuite_setup(const size_t number_of_cases) +{ + GREENTEA_SETUP(25, "usb_device_serial"); + srand((unsigned) ticker_read_us(get_us_ticker_data())); + return utest::v1::greentea_test_setup_handler(number_of_cases); +} + +Case cases[] = { + Case("CDC USB reconnect", test_cdc_usb_reconnect), + Case("CDC RX single bytes", test_cdc_rx_single_bytes), + Case("CDC RX single bytes concurrent", test_cdc_rx_single_bytes_concurrent), + Case("CDC RX multiple bytes", test_cdc_rx_multiple_bytes), + Case("CDC RX multiple bytes concurrent", test_cdc_rx_multiple_bytes_concurrent), + Case("CDC loopback", test_cdc_loopback), +}; + +Specification specification(testsuite_setup, cases); + +int main() +{ + return !Harness::run(specification); +} From bcf18903c6d0047268cbdd3e5e1548e42ce4c358 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 9 Aug 2018 15:46:05 +0200 Subject: [PATCH 244/488] Tests: USB: Add tests for Serial class. --- TESTS/host_tests/usb_device_serial.py | 9 ++ TESTS/usb_device/serial/main.cpp | 205 ++++++++++++++++++++++++++ 2 files changed, 214 insertions(+) diff --git a/TESTS/host_tests/usb_device_serial.py b/TESTS/host_tests/usb_device_serial.py index 82875bb9559..741fc60b7c8 100644 --- a/TESTS/host_tests/usb_device_serial.py +++ b/TESTS/host_tests/usb_device_serial.py @@ -25,6 +25,7 @@ MSG_KEY_PORT_OPEN_WAIT = 'port_open_wait' +MSG_KEY_PORT_OPEN_CLOSE = 'port_open_close' MSG_KEY_SEND_BYTES_SINGLE = 'send_single' MSG_KEY_SEND_BYTES_MULTIPLE = 'send_multiple' MSG_KEY_LOOPBACK = 'loopback' @@ -109,6 +110,7 @@ def port_open_wait(self, usb_id_str): return def port_open_close(self, usb_id_str): + """Open the serial and close it with a delay.""" mbed_serial = serial.Serial(timeout=0.5, write_timeout=0.1) try: mbed_serial.port = retry_fun_call( @@ -197,6 +199,7 @@ def loopback(self, usb_id_str): def setup(self): self.register_callback(MSG_KEY_PORT_OPEN_WAIT, self.cb_port_open_wait) + self.register_callback(MSG_KEY_PORT_OPEN_CLOSE, self.cb_port_open_close) self.register_callback(MSG_KEY_SEND_BYTES_SINGLE, self.cb_send_bytes_single) self.register_callback(MSG_KEY_SEND_BYTES_MULTIPLE, self.cb_send_bytes_multiple) self.register_callback(MSG_KEY_LOOPBACK, self.cb_loopback) @@ -223,6 +226,12 @@ def cb_port_open_wait(self, key, value, timestamp): target=self.port_open_wait, args=(value, )) + def cb_port_open_close(self, key, value, timestamp): + """Open the serial and close it with a delay.""" + self.start_bg_task( + target=self.port_open_close, + args=(value, )) + def cb_send_bytes_single(self, key, value, timestamp): """Open the serial and send a sequence of values.""" self.start_bg_task( diff --git a/TESTS/usb_device/serial/main.cpp b/TESTS/usb_device/serial/main.cpp index 177ccc86b08..683501e58a9 100644 --- a/TESTS/usb_device/serial/main.cpp +++ b/TESTS/usb_device/serial/main.cpp @@ -24,11 +24,15 @@ #include "mbed.h" #include #include "USBCDC.h" +#include "USBSerial.h" #define USB_CDC_VID 0x1f00 #define USB_CDC_PID 0x2013 +#define USB_SERIAL_VID 0x1f00 +#define USB_SERIAL_PID 0x2012 #define MSG_KEY_PORT_OPEN_WAIT "port_open_wait" +#define MSG_KEY_PORT_OPEN_CLOSE "port_open_close" #define MSG_KEY_SEND_BYTES_SINGLE "send_single" #define MSG_KEY_SEND_BYTES_MULTIPLE "send_multiple" #define MSG_KEY_LOOPBACK "loopback" @@ -36,6 +40,7 @@ #define TX_BUFF_SIZE 32 #define RX_BUFF_SIZE 32 #define CDC_LOOPBACK_REPS 1200 +#define SERIAL_LOOPBACK_REPS 100 #define USB_RECONNECT_DELAY_MS 200 using utest::v1::Case; @@ -304,6 +309,202 @@ void test_cdc_loopback() usb_cdc.disconnect(); } +/** Test Serial USB reconnect + * + * Given the host has successfully opened the port of a USB Serial device + * When the USB device disconnects and connects again + * Then the host is able to successfully open the port again + */ +void test_serial_usb_reconnect() +{ + USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); + TEST_ASSERT_FALSE(usb_serial.configured()); + TEST_ASSERT_FALSE(usb_serial.connected()); + TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); + + // Connect the USB device. + usb_serial.connect(); + // Wait for the USB enumeration to complete. + while (!usb_serial.configured()) { + wait_ms(1); + } + TEST_ASSERT_TRUE(usb_serial.configured()); + TEST_ASSERT_FALSE(usb_serial.connected()); + TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); + + if (!send_testcase_data(MSG_KEY_PORT_OPEN_WAIT, USB_SERIAL_VID, USB_SERIAL_PID)) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + // Wait for the host to open the port. + while (!usb_serial.connected()) { + wait_ms(1); + } + TEST_ASSERT_TRUE(usb_serial.configured()); + TEST_ASSERT_TRUE(usb_serial.connected()); + TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); + + // Disconnect the USB device. + usb_serial.disconnect(); + TEST_ASSERT_FALSE(usb_serial.configured()); + TEST_ASSERT_FALSE(usb_serial.connected()); + TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); + + wait_ms(USB_RECONNECT_DELAY_MS); + // Connect the USB device again. + usb_serial.connect(); + // Wait for the USB enumeration to complete. + while (!usb_serial.configured()) { + wait_ms(1); + } + TEST_ASSERT_TRUE(usb_serial.configured()); + TEST_ASSERT_FALSE(usb_serial.connected()); + TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); + + if (!send_testcase_data(MSG_KEY_PORT_OPEN_WAIT, USB_SERIAL_VID, USB_SERIAL_PID)) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + // Wait for the host to open the port again. + while (!usb_serial.connected()) { + wait_ms(1); + } + TEST_ASSERT_TRUE(usb_serial.configured()); + TEST_ASSERT_TRUE(usb_serial.connected()); + TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); + + // Disconnect the USB device again. + usb_serial.disconnect(); + TEST_ASSERT_FALSE(usb_serial.configured()); + TEST_ASSERT_FALSE(usb_serial.connected()); + TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); +} + +/** Test Serial terminal reopen + * + * Given the host has successfully opened the port of a USB Serial device + * When the host closes its port + * Then the host is able to successfully open the port again + */ +void test_serial_term_reopen() +{ + USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); + usb_serial.connect(); + if (!send_testcase_data(MSG_KEY_PORT_OPEN_CLOSE, USB_SERIAL_VID, USB_SERIAL_PID)) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + // Wait for the host to open the terminal. + while (!usb_serial.connected()) { + wait_ms(1); + } + TEST_ASSERT_TRUE(usb_serial.configured()); + TEST_ASSERT_TRUE(usb_serial.ready()); + TEST_ASSERT_TRUE(usb_serial.connected()); + TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); + + // Wait for the host to close the terminal. + while (usb_serial.ready()) { + wait_ms(1); + } + TEST_ASSERT_TRUE(usb_serial.configured()); + TEST_ASSERT_FALSE(usb_serial.ready()); + TEST_ASSERT_FALSE(usb_serial.connected()); + TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); + + if (!send_testcase_data(MSG_KEY_PORT_OPEN_CLOSE, USB_SERIAL_VID, USB_SERIAL_PID)) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + // Wait for the host to open the terminal again. + while (!usb_serial.connected()) { + wait_ms(1); + } + TEST_ASSERT_TRUE(usb_serial.configured()); + TEST_ASSERT_TRUE(usb_serial.ready()); + TEST_ASSERT_TRUE(usb_serial.connected()); + TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); + + // Wait for the host to close the terminal again. + while (usb_serial.ready()) { + wait_ms(1); + } + TEST_ASSERT_TRUE(usb_serial.configured()); + TEST_ASSERT_FALSE(usb_serial.ready()); + TEST_ASSERT_FALSE(usb_serial.connected()); + TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); + + usb_serial.disconnect(); +} + +/** Test Serial getc + * + * Given the USB Serial device connected to a host + * When the host transmits a known sequence one byte at a time + * Then every byte received by the device matches the sequence + */ +void test_serial_getc() +{ + USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); + usb_serial.connect(); + if (send_testcase_data(MSG_KEY_SEND_BYTES_SINGLE, USB_SERIAL_VID, USB_SERIAL_PID) == false) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + while (!usb_serial.connected()) { + wait_ms(1); + } + for (int expected = 0xff; expected >= 0; expected--) { + TEST_ASSERT_EQUAL_INT(expected, usb_serial.getc()); + } + for (int expected = 0; expected <= 0xff; expected++) { + TEST_ASSERT_EQUAL_INT(expected, usb_serial.getc()); + } + // Wait for the host to close its port. + while (usb_serial.ready()) { + wait_ms(1); + } + usb_serial.disconnect(); +} + +/** Test Serial printf & scanf + * + * Given the USB Serial device connected to a host + * When the device trensmits a formatted string with a random value + * using the printf method + * and the host sends it back to the device + * Then the device can successfully read the value using scanf method + * and the value received is equal value sent + */ +void test_serial_printf_scanf() +{ + USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); + usb_serial.connect(); + if (!send_testcase_data(MSG_KEY_LOOPBACK, USB_SERIAL_VID, USB_SERIAL_PID)) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + while (!usb_serial.connected()) { + wait_ms(1); + } + static const char fmt[] = "Formatted\nstring %i."; + int tx_val, rx_val, rc; + for (int i = 0; i < SERIAL_LOOPBACK_REPS; i++) { + tx_val = rand(); + rx_val = tx_val + 1; + rc = usb_serial.printf(fmt, tx_val); + TEST_ASSERT(rc > 0); + rc = usb_serial.scanf(fmt, &rx_val); + TEST_ASSERT(rc == 1); + TEST_ASSERT_EQUAL_INT(tx_val, rx_val); + } + // Wait for the host to close its port. + while (usb_serial.ready()) { + wait_ms(1); + } + usb_serial.disconnect(); +} + utest::v1::status_t testsuite_setup(const size_t number_of_cases) { GREENTEA_SETUP(25, "usb_device_serial"); @@ -318,6 +519,10 @@ Case cases[] = { Case("CDC RX multiple bytes", test_cdc_rx_multiple_bytes), Case("CDC RX multiple bytes concurrent", test_cdc_rx_multiple_bytes_concurrent), Case("CDC loopback", test_cdc_loopback), + Case("Serial USB reconnect", test_serial_usb_reconnect), + Case("Serial terminal reopen", test_serial_term_reopen), + Case("Serial getc", test_serial_getc), + Case("Serial printf/scanf", test_serial_printf_scanf), }; Specification specification(testsuite_setup, cases); From 31be28afc0728bdf0d5115e6c25194bf8cd74584 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Fri, 10 Aug 2018 15:30:46 +0200 Subject: [PATCH 245/488] Tests: USB: Fix USB reconnect tests for Win hosts --- TESTS/usb_device/serial/main.cpp | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/TESTS/usb_device/serial/main.cpp b/TESTS/usb_device/serial/main.cpp index 683501e58a9..e0052e34d32 100644 --- a/TESTS/usb_device/serial/main.cpp +++ b/TESTS/usb_device/serial/main.cpp @@ -43,6 +43,10 @@ #define SERIAL_LOOPBACK_REPS 100 #define USB_RECONNECT_DELAY_MS 200 +// Additional delay necessary for Windows hosts +// to handle the reconnect operation correctly. +#define USB_DISCONNECT_DELAY_MS 1 + using utest::v1::Case; using utest::v1::Specification; using utest::v1::Harness; @@ -92,6 +96,7 @@ void test_cdc_usb_reconnect() TEST_ASSERT_TRUE(usb_cdc.configured()); TEST_ASSERT_TRUE(usb_cdc.ready()); + wait_ms(USB_DISCONNECT_DELAY_MS); // Disconnect the USB device. usb_cdc.disconnect(); TEST_ASSERT_FALSE(usb_cdc.configured()); @@ -116,6 +121,7 @@ void test_cdc_usb_reconnect() TEST_ASSERT_TRUE(usb_cdc.configured()); TEST_ASSERT_TRUE(usb_cdc.ready()); + wait_ms(USB_DISCONNECT_DELAY_MS); // Disconnect the USB device again. usb_cdc.disconnect(); TEST_ASSERT_FALSE(usb_cdc.configured()); @@ -345,6 +351,7 @@ void test_serial_usb_reconnect() TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); // Disconnect the USB device. + wait_ms(USB_DISCONNECT_DELAY_MS); usb_serial.disconnect(); TEST_ASSERT_FALSE(usb_serial.configured()); TEST_ASSERT_FALSE(usb_serial.connected()); @@ -374,6 +381,7 @@ void test_serial_usb_reconnect() TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); // Disconnect the USB device again. + wait_ms(USB_DISCONNECT_DELAY_MS); usb_serial.disconnect(); TEST_ASSERT_FALSE(usb_serial.configured()); TEST_ASSERT_FALSE(usb_serial.connected()); From ac89eb21053f0a5968ab29f62f84c2cacf160fe3 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Mon, 3 Sep 2018 11:01:09 +0200 Subject: [PATCH 246/488] Tests: USB: Use the serial number to find device Use the USB device SN instead of VID & PID to find the device port name on the host system. --- TESTS/host_tests/usb_device_serial.py | 13 ++-- TESTS/usb_device/serial/main.cpp | 106 +++++++++++--------------- 2 files changed, 51 insertions(+), 68 deletions(-) diff --git a/TESTS/host_tests/usb_device_serial.py b/TESTS/host_tests/usb_device_serial.py index 741fc60b7c8..d5abf1669e7 100644 --- a/TESTS/host_tests/usb_device_serial.py +++ b/TESTS/host_tests/usb_device_serial.py @@ -34,10 +34,10 @@ TERM_REOPEN_DELAY = 0.1 -def usb_serial_name(vid, pid): - """Get USB serial device name based on vid and pid.""" +def usb_serial_name(serial_number): + """Get USB serial device name based on the device serial number.""" for port_info in stlp.comports(): - if port_info.vid == vid and port_info.pid == pid: + if port_info.serial_number == serial_number: return port_info.device return None @@ -77,11 +77,10 @@ def get_usb_serial_name(usb_id_str): Search is based on the id received from the device itself. Raises RuntimeError if the device is not found. """ - vid, pid = (int(i, base=16) for i in str(usb_id_str).split(',')) - port_name = usb_serial_name(vid, pid) + port_name = usb_serial_name(usb_id_str) if port_name is None: - err_msg = 'USB serial device (vid={:#04x}, pid={:#04x}) not found.' - raise RuntimeError(err_msg.format(vid, pid)) + err_msg = 'USB serial device (SN={}) not found.' + raise RuntimeError(err_msg.format(usb_id_str)) return port_name def __init__(self): diff --git a/TESTS/usb_device/serial/main.cpp b/TESTS/usb_device/serial/main.cpp index e0052e34d32..0f754ca3c58 100644 --- a/TESTS/usb_device/serial/main.cpp +++ b/TESTS/usb_device/serial/main.cpp @@ -30,6 +30,7 @@ #define USB_CDC_PID 0x2013 #define USB_SERIAL_VID 0x1f00 #define USB_SERIAL_PID 0x2012 +#define USB_SN_MAX_LEN 128 #define MSG_KEY_PORT_OPEN_WAIT "port_open_wait" #define MSG_KEY_PORT_OPEN_CLOSE "port_open_close" @@ -54,16 +55,18 @@ using utest::v1::Harness; #define EF_SEND (1ul << 0) EventFlags event_flags; -bool send_testcase_data(const char *msg_key, uint16_t usb_vid, uint16_t usb_pid) +char *usb_desc2str(const uint8_t *usb_desc, char *str, size_t n) { - char msg_value[10]; - int str_len = snprintf(msg_value, sizeof msg_value, "%04x,%04x", usb_vid, usb_pid); - if (str_len != (sizeof msg_value) - 1) { - utest_printf("Failed to compose a value string to be sent to host."); - return false; - } - greentea_send_kv(msg_key, msg_value); - return true; + const size_t desc_size = usb_desc[0] - 2; + const uint8_t *src = &usb_desc[2]; + size_t i, j; + for (i = 0, j = 0; i < n && j < desc_size; i++, j += 2) { + str[i] = src[j]; + } + for (; i < n; i++) { + str[i] = '\0'; + } + return str; } /** Test CDC USB reconnect @@ -75,6 +78,8 @@ bool send_testcase_data(const char *msg_key, uint16_t usb_vid, uint16_t usb_pid) void test_cdc_usb_reconnect() { USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); + char usb_cdc_sn[USB_SN_MAX_LEN] = { }; + usb_desc2str(usb_cdc.string_iserial_desc(), usb_cdc_sn, USB_SN_MAX_LEN); TEST_ASSERT_FALSE(usb_cdc.configured()); TEST_ASSERT_FALSE(usb_cdc.ready()); @@ -87,10 +92,7 @@ void test_cdc_usb_reconnect() TEST_ASSERT_TRUE(usb_cdc.configured()); TEST_ASSERT_FALSE(usb_cdc.ready()); - if (!send_testcase_data(MSG_KEY_PORT_OPEN_WAIT, USB_CDC_VID, USB_CDC_PID)) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, usb_cdc_sn); // Wait for the host to open the port. usb_cdc.wait_ready(); TEST_ASSERT_TRUE(usb_cdc.configured()); @@ -112,10 +114,7 @@ void test_cdc_usb_reconnect() TEST_ASSERT_TRUE(usb_cdc.configured()); TEST_ASSERT_FALSE(usb_cdc.ready()); - if (!send_testcase_data(MSG_KEY_PORT_OPEN_WAIT, USB_CDC_VID, USB_CDC_PID)) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, usb_cdc_sn); // Wait for the host to open the port again. usb_cdc.wait_ready(); TEST_ASSERT_TRUE(usb_cdc.configured()); @@ -137,11 +136,10 @@ void test_cdc_usb_reconnect() void test_cdc_rx_single_bytes() { USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); + char usb_cdc_sn[USB_SN_MAX_LEN] = { }; + usb_desc2str(usb_cdc.string_iserial_desc(), usb_cdc_sn, USB_SN_MAX_LEN); usb_cdc.connect(); - if (send_testcase_data(MSG_KEY_SEND_BYTES_SINGLE, USB_CDC_VID, USB_CDC_PID) == false) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, usb_cdc_sn); usb_cdc.wait_ready(); uint8_t buff = 0x01; for (int expected = 0xff; expected >= 0; expected--) { @@ -183,11 +181,10 @@ void tx_thread_fun(USBCDC *usb_cdc) void test_cdc_rx_single_bytes_concurrent() { USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); + char usb_cdc_sn[USB_SN_MAX_LEN] = { }; + usb_desc2str(usb_cdc.string_iserial_desc(), usb_cdc_sn, USB_SN_MAX_LEN); usb_cdc.connect(); - if (send_testcase_data(MSG_KEY_SEND_BYTES_SINGLE, USB_CDC_VID, USB_CDC_PID) == false) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, usb_cdc_sn); usb_cdc.wait_ready(); Thread tx_thread; event_flags.set(EF_SEND); @@ -219,11 +216,10 @@ void test_cdc_rx_single_bytes_concurrent() void test_cdc_rx_multiple_bytes() { USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); + char usb_cdc_sn[USB_SN_MAX_LEN] = { }; + usb_desc2str(usb_cdc.string_iserial_desc(), usb_cdc_sn, USB_SN_MAX_LEN); usb_cdc.connect(); - if (send_testcase_data(MSG_KEY_SEND_BYTES_MULTIPLE, USB_CDC_VID, USB_CDC_PID) == false) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, usb_cdc_sn); usb_cdc.wait_ready(); uint8_t buff[RX_BUFF_SIZE] = { 0 }; uint8_t expected_buff[RX_BUFF_SIZE] = { 0 }; @@ -254,11 +250,10 @@ void test_cdc_rx_multiple_bytes() void test_cdc_rx_multiple_bytes_concurrent() { USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); + char usb_cdc_sn[USB_SN_MAX_LEN] = { }; + usb_desc2str(usb_cdc.string_iserial_desc(), usb_cdc_sn, USB_SN_MAX_LEN); usb_cdc.connect(); - if (send_testcase_data(MSG_KEY_SEND_BYTES_MULTIPLE, USB_CDC_VID, USB_CDC_PID) == false) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, usb_cdc_sn); usb_cdc.wait_ready(); Thread tx_thread; event_flags.set(EF_SEND); @@ -294,11 +289,10 @@ void test_cdc_rx_multiple_bytes_concurrent() void test_cdc_loopback() { USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); + char usb_cdc_sn[USB_SN_MAX_LEN] = { }; + usb_desc2str(usb_cdc.string_iserial_desc(), usb_cdc_sn, USB_SN_MAX_LEN); usb_cdc.connect(); - if (send_testcase_data(MSG_KEY_LOOPBACK, USB_CDC_VID, USB_CDC_PID) == false) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_LOOPBACK, usb_cdc_sn); usb_cdc.wait_ready(); uint8_t rx_buff, tx_buff; for (int i = 0; i < CDC_LOOPBACK_REPS; i++) { @@ -324,6 +318,8 @@ void test_cdc_loopback() void test_serial_usb_reconnect() { USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); + char usb_serial_sn[USB_SN_MAX_LEN] = { }; + usb_desc2str(usb_serial.string_iserial_desc(), usb_serial_sn, USB_SN_MAX_LEN); TEST_ASSERT_FALSE(usb_serial.configured()); TEST_ASSERT_FALSE(usb_serial.connected()); TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); @@ -338,10 +334,7 @@ void test_serial_usb_reconnect() TEST_ASSERT_FALSE(usb_serial.connected()); TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); - if (!send_testcase_data(MSG_KEY_PORT_OPEN_WAIT, USB_SERIAL_VID, USB_SERIAL_PID)) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, usb_serial_sn); // Wait for the host to open the port. while (!usb_serial.connected()) { wait_ms(1); @@ -368,10 +361,7 @@ void test_serial_usb_reconnect() TEST_ASSERT_FALSE(usb_serial.connected()); TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); - if (!send_testcase_data(MSG_KEY_PORT_OPEN_WAIT, USB_SERIAL_VID, USB_SERIAL_PID)) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, usb_serial_sn); // Wait for the host to open the port again. while (!usb_serial.connected()) { wait_ms(1); @@ -397,11 +387,10 @@ void test_serial_usb_reconnect() void test_serial_term_reopen() { USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); + char usb_serial_sn[USB_SN_MAX_LEN] = { }; + usb_desc2str(usb_serial.string_iserial_desc(), usb_serial_sn, USB_SN_MAX_LEN); usb_serial.connect(); - if (!send_testcase_data(MSG_KEY_PORT_OPEN_CLOSE, USB_SERIAL_VID, USB_SERIAL_PID)) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_PORT_OPEN_CLOSE, usb_serial_sn); // Wait for the host to open the terminal. while (!usb_serial.connected()) { wait_ms(1); @@ -420,10 +409,7 @@ void test_serial_term_reopen() TEST_ASSERT_FALSE(usb_serial.connected()); TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); - if (!send_testcase_data(MSG_KEY_PORT_OPEN_CLOSE, USB_SERIAL_VID, USB_SERIAL_PID)) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_PORT_OPEN_CLOSE, usb_serial_sn); // Wait for the host to open the terminal again. while (!usb_serial.connected()) { wait_ms(1); @@ -454,11 +440,10 @@ void test_serial_term_reopen() void test_serial_getc() { USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); + char usb_serial_sn[USB_SN_MAX_LEN] = { }; + usb_desc2str(usb_serial.string_iserial_desc(), usb_serial_sn, USB_SN_MAX_LEN); usb_serial.connect(); - if (send_testcase_data(MSG_KEY_SEND_BYTES_SINGLE, USB_SERIAL_VID, USB_SERIAL_PID) == false) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, usb_serial_sn); while (!usb_serial.connected()) { wait_ms(1); } @@ -487,11 +472,10 @@ void test_serial_getc() void test_serial_printf_scanf() { USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); + char usb_serial_sn[USB_SN_MAX_LEN] = { }; + usb_desc2str(usb_serial.string_iserial_desc(), usb_serial_sn, USB_SN_MAX_LEN); usb_serial.connect(); - if (!send_testcase_data(MSG_KEY_LOOPBACK, USB_SERIAL_VID, USB_SERIAL_PID)) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_LOOPBACK, usb_serial_sn); while (!usb_serial.connected()) { wait_ms(1); } From 2b186f4719e656a6b724d3058035226e8ded48a2 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Wed, 5 Sep 2018 11:06:03 +0200 Subject: [PATCH 247/488] Tests: USB: Add Serial test for line coding change --- TESTS/host_tests/usb_device_serial.py | 62 ++++++++++++ TESTS/usb_device/serial/main.cpp | 136 +++++++++++++++++++++++++- 2 files changed, 196 insertions(+), 2 deletions(-) diff --git a/TESTS/host_tests/usb_device_serial.py b/TESTS/host_tests/usb_device_serial.py index d5abf1669e7..9394811bf9d 100644 --- a/TESTS/host_tests/usb_device_serial.py +++ b/TESTS/host_tests/usb_device_serial.py @@ -29,9 +29,11 @@ MSG_KEY_SEND_BYTES_SINGLE = 'send_single' MSG_KEY_SEND_BYTES_MULTIPLE = 'send_multiple' MSG_KEY_LOOPBACK = 'loopback' +MSG_KEY_CHANGE_LINE_CODING = 'change_lc' RX_BUFF_SIZE = 32 TERM_REOPEN_DELAY = 0.1 +LINE_CODING_STRLEN = 13 def usb_serial_name(serial_number): @@ -70,6 +72,22 @@ def retry_fun_call(fun, num_retries=3, retry_delay=0.0): class USBSerialTest(mbed_host_tests.BaseHostTest): """Host side test for USB CDC & Serial classes.""" + _BYTESIZES = { + 5: serial.FIVEBITS, + 6: serial.SIXBITS, + 7: serial.SEVENBITS, + 8: serial.EIGHTBITS} + _PARITIES = { + 0: serial.PARITY_NONE, + 1: serial.PARITY_ODD, + 2: serial.PARITY_EVEN, + 3: serial.PARITY_MARK, + 4: serial.PARITY_SPACE} + _STOPBITS = { + 0: serial.STOPBITS_ONE, + 1: serial.STOPBITS_ONE_POINT_FIVE, + 2: serial.STOPBITS_TWO} + @staticmethod def get_usb_serial_name(usb_id_str): """Get USB serial device name as registered in the system. @@ -196,12 +214,50 @@ def loopback(self, usb_id_str): time.sleep(0.001) mbed_serial.close() + def change_line_coding(self, usb_id_str): + """Open the serial and change serial params according to device request. + + New line coding params are read from the device serial data. + """ + mbed_serial = serial.Serial(timeout=0.5) + try: + mbed_serial.port = retry_fun_call( + fun=functools.partial(self.get_usb_serial_name, usb_id_str), # pylint: disable=not-callable + num_retries=20, + retry_delay=0.05) + retry_fun_call( + fun=mbed_serial.open, + num_retries=10, + retry_delay=0.05) + except RetryError as exc: + self.log('TEST ERROR: {}'.format(exc)) + self.notify_complete(False) + return + mbed_serial.reset_output_buffer() + try: + payload = mbed_serial.read(LINE_CODING_STRLEN) + while len(payload) == LINE_CODING_STRLEN: + baud, bits, parity, stop = (int(i) for i in payload.split(',')) + new_line_coding = { + 'baudrate': baud, + 'bytesize': self._BYTESIZES[bits], + 'parity': self._PARITIES[parity], + 'stopbits': self._STOPBITS[stop]} + mbed_serial.apply_settings(new_line_coding) + payload = mbed_serial.read(LINE_CODING_STRLEN) + except serial.SerialException as exc: + self.log('TEST ERROR: {}'.format(exc)) + self.notify_complete(False) + return + mbed_serial.close() + def setup(self): self.register_callback(MSG_KEY_PORT_OPEN_WAIT, self.cb_port_open_wait) self.register_callback(MSG_KEY_PORT_OPEN_CLOSE, self.cb_port_open_close) self.register_callback(MSG_KEY_SEND_BYTES_SINGLE, self.cb_send_bytes_single) self.register_callback(MSG_KEY_SEND_BYTES_MULTIPLE, self.cb_send_bytes_multiple) self.register_callback(MSG_KEY_LOOPBACK, self.cb_loopback) + self.register_callback(MSG_KEY_CHANGE_LINE_CODING, self.cb_change_line_coding) def start_bg_task(self, **thread_kwargs): """Start a new daemon thread. @@ -248,3 +304,9 @@ def cb_loopback(self, key, value, timestamp): self.start_bg_task( target=self.loopback, args=(value, )) + + def cb_change_line_coding(self, key, value, timestamp): + """Open the serial and change the line coding.""" + self.start_bg_task( + target=self.change_line_coding, + args=(value, )) diff --git a/TESTS/usb_device/serial/main.cpp b/TESTS/usb_device/serial/main.cpp index 0f754ca3c58..5c86c40a79f 100644 --- a/TESTS/usb_device/serial/main.cpp +++ b/TESTS/usb_device/serial/main.cpp @@ -37,6 +37,7 @@ #define MSG_KEY_SEND_BYTES_SINGLE "send_single" #define MSG_KEY_SEND_BYTES_MULTIPLE "send_multiple" #define MSG_KEY_LOOPBACK "loopback" +#define MSG_KEY_CHANGE_LINE_CODING "change_lc" #define TX_BUFF_SIZE 32 #define RX_BUFF_SIZE 32 @@ -48,10 +49,70 @@ // to handle the reconnect operation correctly. #define USB_DISCONNECT_DELAY_MS 1 +#define LINE_CODING_STRLEN 13 // 6 + 2 + 1 + 1 + 3 * comma + using utest::v1::Case; using utest::v1::Specification; using utest::v1::Harness; +typedef struct LineCoding { + // bits per second + int baud; + + // 5, 6, 7, 8 or 16 + int bits; + + // 0 -- None, + // 1 -- Odd, + // 2 -- Even, + // 3 -- Mark, + // 4 -- Space + int parity; + + // 0 -- 1 Stop bit, + // 1 -- 1.5 Stop bits, + // 2 -- 2 Stop bits + int stop; + + int get_num_diffs(LineCoding const &other) const + { + int diffs = 0; + if (baud != other.baud) { + diffs++; + } + if (bits != other.bits) { + diffs++; + } + if (parity != other.parity) { + diffs++; + } + if (stop != other.stop) { + diffs++; + } + return diffs; + } +} line_coding_t; + +line_coding_t default_lc = { 9600, 8, 0, 0 }; + +// There is no POSIX support for 1.5 stop bits. +// Do not set stop bits to 1.5 to keep tests compatible with all supported +// host systems. +line_coding_t test_codings[] = { + { 9600, 5, 0, 2 }, + { 4800, 7, 2, 0 }, + { 19200, 8, 0, 2 }, + { 115200, 8, 0, 0 }, + { 38400, 8, 1, 0 }, + { 1200, 8, 0, 0 }, + { 19200, 8, 0, 0 }, + { 2400, 7, 2, 0 }, + { 9600, 8, 0, 0 }, + { 57600, 8, 0, 0 }, +}; + +Mail lc_mail; + #define EF_SEND (1ul << 0) EventFlags event_flags; @@ -463,7 +524,7 @@ void test_serial_getc() /** Test Serial printf & scanf * * Given the USB Serial device connected to a host - * When the device trensmits a formatted string with a random value + * When the device transmits a formatted string with a random value * using the printf method * and the host sends it back to the device * Then the device can successfully read the value using scanf method @@ -497,9 +558,79 @@ void test_serial_printf_scanf() usb_serial.disconnect(); } +void line_coding_changed_cb(int baud, int bits, int parity, int stop) +{ + line_coding_t *lc = lc_mail.alloc(); + lc->baud = baud; + lc->bits = bits; + lc->parity = parity; + lc->stop = stop; + lc_mail.put(lc); +} + +/** Test Serial / CDC line coding change + * + * Given the device transmits a set of line coding params to host + * When the host updates serial port settings + * Then line_coding_changed() callback is called + * and the line coding is set as expected + */ +void test_serial_line_coding_change() +{ + USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); + char usb_serial_sn[USB_SN_MAX_LEN] = { }; + usb_desc2str(usb_serial.string_iserial_desc(), usb_serial_sn, USB_SN_MAX_LEN); + usb_serial.connect(); + greentea_send_kv(MSG_KEY_CHANGE_LINE_CODING, usb_serial_sn); + while (!usb_serial.connected()) { + wait_ms(1); + } + usb_serial.attach(line_coding_changed_cb); + size_t num_line_codings = sizeof test_codings / sizeof test_codings[0]; + line_coding_t *lc_prev = &default_lc; + line_coding_t *lc_expected = NULL; + line_coding_t *lc_actual = NULL; + int num_expected_callbacks, rc; + for (size_t i = 0; i < num_line_codings; i++) { + lc_expected = &(test_codings[i]); + num_expected_callbacks = lc_prev->get_num_diffs(*lc_expected); + rc = usb_serial.printf("%06i,%02i,%01i,%01i", lc_expected->baud, lc_expected->bits, lc_expected->parity, + lc_expected->stop); + TEST_ASSERT_EQUAL_INT(LINE_CODING_STRLEN, rc); + // The pyserial Python module does not update all line coding params + // at once. It updates params one by one instead, and since every + // update is followed by port reconfiguration we get multiple + // calls to line_coding_changed callback on the device. + while (num_expected_callbacks > 0) { + num_expected_callbacks--; + osEvent event = lc_mail.get(); + TEST_ASSERT_EQUAL_UINT32(osEventMail, event.status); + lc_actual = (line_coding_t *) event.value.p; + if (lc_expected->get_num_diffs(*lc_actual) == 0) { + break; + } else if (num_expected_callbacks > 0) { + // Discard lc_actual only if there is still a chance to get new + // set of params. + lc_mail.free(lc_actual); + } + } + TEST_ASSERT_EQUAL_INT(lc_expected->baud, lc_actual->baud); + TEST_ASSERT_EQUAL_INT(lc_expected->bits, lc_actual->bits); + TEST_ASSERT_EQUAL_INT(lc_expected->parity, lc_actual->parity); + TEST_ASSERT_EQUAL_INT(lc_expected->stop, lc_actual->stop); + lc_mail.free(lc_actual); + lc_prev = lc_expected; + } + // Wait for the host to close its port. + while (usb_serial.ready()) { + wait_ms(1); + } + usb_serial.disconnect(); +} + utest::v1::status_t testsuite_setup(const size_t number_of_cases) { - GREENTEA_SETUP(25, "usb_device_serial"); + GREENTEA_SETUP(35, "usb_device_serial"); srand((unsigned) ticker_read_us(get_us_ticker_data())); return utest::v1::greentea_test_setup_handler(number_of_cases); } @@ -515,6 +646,7 @@ Case cases[] = { Case("Serial terminal reopen", test_serial_term_reopen), Case("Serial getc", test_serial_getc), Case("Serial printf/scanf", test_serial_printf_scanf), + Case("Serial line coding change", test_serial_line_coding_change), }; Specification specification(testsuite_setup, cases); From fb926e5862f62653a4aa7057fcc848355a7ccdc1 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 20 Sep 2018 11:37:54 +0200 Subject: [PATCH 248/488] Tests: USB: Wait before closing host's port This delay eliminates the possibility of the device detecting the port being closed when still waiting for data. --- TESTS/host_tests/usb_device_serial.py | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/TESTS/host_tests/usb_device_serial.py b/TESTS/host_tests/usb_device_serial.py index 9394811bf9d..7574ee92cb0 100644 --- a/TESTS/host_tests/usb_device_serial.py +++ b/TESTS/host_tests/usb_device_serial.py @@ -32,6 +32,7 @@ MSG_KEY_CHANGE_LINE_CODING = 'change_lc' RX_BUFF_SIZE = 32 +TERM_CLOSE_DELAY = 0.01 TERM_REOPEN_DELAY = 0.1 LINE_CODING_STRLEN = 13 @@ -181,6 +182,7 @@ def send_data_sequence(self, usb_id_str, chunk_size=1): return while mbed_serial.out_waiting > 0: time.sleep(0.001) + time.sleep(TERM_CLOSE_DELAY) mbed_serial.close() def loopback(self, usb_id_str): @@ -212,6 +214,7 @@ def loopback(self, usb_id_str): return while mbed_serial.out_waiting > 0: time.sleep(0.001) + time.sleep(TERM_CLOSE_DELAY) mbed_serial.close() def change_line_coding(self, usb_id_str): @@ -249,6 +252,7 @@ def change_line_coding(self, usb_id_str): self.log('TEST ERROR: {}'.format(exc)) self.notify_complete(False) return + time.sleep(TERM_CLOSE_DELAY) mbed_serial.close() def setup(self): From a5cc1d9dee2bd397b9ed4faec470f16dba4ec068 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 20 Sep 2018 11:44:03 +0200 Subject: [PATCH 249/488] Tests: USB: Wait before transmitting data to host Despite having ECHO and ECHOCTL POSIX lflags disabled by default by pyserial, a delay is needed for host to properly handle data received from USB serial/CDC device. With no delay host would echo 0x00-0x31 characters prefixed with '^'. --- TESTS/usb_device/serial/main.cpp | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/TESTS/usb_device/serial/main.cpp b/TESTS/usb_device/serial/main.cpp index 5c86c40a79f..562b390a9bc 100644 --- a/TESTS/usb_device/serial/main.cpp +++ b/TESTS/usb_device/serial/main.cpp @@ -49,6 +49,12 @@ // to handle the reconnect operation correctly. #define USB_DISCONNECT_DELAY_MS 1 +// Despite having ECHO and ECHOCTL POSIX lflags disabled by default by +// pyserial, a delay is needed for host to properly handle data received +// from USB serial/CDC device. +// With no delay host would echo 0x00-0x31 characters prefixed with '^'. +#define TX_DELAY_MS 10 + #define LINE_CODING_STRLEN 13 // 6 + 2 + 1 + 1 + 3 * comma using utest::v1::Case; @@ -247,6 +253,7 @@ void test_cdc_rx_single_bytes_concurrent() usb_cdc.connect(); greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, usb_cdc_sn); usb_cdc.wait_ready(); + wait_ms(TX_DELAY_MS); Thread tx_thread; event_flags.set(EF_SEND); tx_thread.start(mbed::callback(tx_thread_fun, &usb_cdc)); @@ -316,6 +323,7 @@ void test_cdc_rx_multiple_bytes_concurrent() usb_cdc.connect(); greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, usb_cdc_sn); usb_cdc.wait_ready(); + wait_ms(TX_DELAY_MS); Thread tx_thread; event_flags.set(EF_SEND); tx_thread.start(mbed::callback(tx_thread_fun, &usb_cdc)); @@ -355,6 +363,7 @@ void test_cdc_loopback() usb_cdc.connect(); greentea_send_kv(MSG_KEY_LOOPBACK, usb_cdc_sn); usb_cdc.wait_ready(); + wait_ms(TX_DELAY_MS); uint8_t rx_buff, tx_buff; for (int i = 0; i < CDC_LOOPBACK_REPS; i++) { tx_buff = (uint8_t)(rand() % 0x100); @@ -540,6 +549,7 @@ void test_serial_printf_scanf() while (!usb_serial.connected()) { wait_ms(1); } + wait_ms(TX_DELAY_MS); static const char fmt[] = "Formatted\nstring %i."; int tx_val, rx_val, rc; for (int i = 0; i < SERIAL_LOOPBACK_REPS; i++) { @@ -585,6 +595,7 @@ void test_serial_line_coding_change() while (!usb_serial.connected()) { wait_ms(1); } + wait_ms(TX_DELAY_MS); usb_serial.attach(line_coding_changed_cb); size_t num_line_codings = sizeof test_codings / sizeof test_codings[0]; line_coding_t *lc_prev = &default_lc; From d6f051f27b748122cc5d7eeb9548de326132bf9e Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 11 Oct 2018 14:29:19 +0200 Subject: [PATCH 250/488] Tests: USB: Correct reconnect delay Setting to 1 ms to be on the safe side. The USB spec defines this delay to be at least 200 us. --- TESTS/usb_device/serial/main.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/TESTS/usb_device/serial/main.cpp b/TESTS/usb_device/serial/main.cpp index 562b390a9bc..2f55df43fbb 100644 --- a/TESTS/usb_device/serial/main.cpp +++ b/TESTS/usb_device/serial/main.cpp @@ -43,7 +43,7 @@ #define RX_BUFF_SIZE 32 #define CDC_LOOPBACK_REPS 1200 #define SERIAL_LOOPBACK_REPS 100 -#define USB_RECONNECT_DELAY_MS 200 +#define USB_RECONNECT_DELAY_MS 1 // Additional delay necessary for Windows hosts // to handle the reconnect operation correctly. From c8d078daf6a80320f91d2c813451a3e243633a85 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Tue, 16 Oct 2018 09:18:30 +0200 Subject: [PATCH 251/488] Tests: USB: Use SN generated by the host machine --- TESTS/host_tests/usb_device_serial.py | 55 +++--- TESTS/usb_device/serial/main.cpp | 235 +++++++++++++++++++------- 2 files changed, 206 insertions(+), 84 deletions(-) diff --git a/TESTS/host_tests/usb_device_serial.py b/TESTS/host_tests/usb_device_serial.py index 7574ee92cb0..5ecba8b93c3 100644 --- a/TESTS/host_tests/usb_device_serial.py +++ b/TESTS/host_tests/usb_device_serial.py @@ -19,11 +19,14 @@ import itertools import time import threading +import uuid import serial import serial.tools.list_ports as stlp import mbed_host_tests +MSG_KEY_DEVICE_READY = 'ready' +MSG_KEY_SERIAL_NUMBER = 'usb_dev_sn' MSG_KEY_PORT_OPEN_WAIT = 'port_open_wait' MSG_KEY_PORT_OPEN_CLOSE = 'port_open_close' MSG_KEY_SEND_BYTES_SINGLE = 'send_single' @@ -93,7 +96,8 @@ class USBSerialTest(mbed_host_tests.BaseHostTest): def get_usb_serial_name(usb_id_str): """Get USB serial device name as registered in the system. - Search is based on the id received from the device itself. + Search is based on the unique USB SN generated by the host + during test suite setup. Raises RuntimeError if the device is not found. """ port_name = usb_serial_name(usb_id_str) @@ -105,13 +109,14 @@ def get_usb_serial_name(usb_id_str): def __init__(self): super(USBSerialTest, self).__init__() self.__bg_task = None + self.dut_usb_dev_sn = uuid.uuid4().hex # 32 hex digit string - def port_open_wait(self, usb_id_str): + def port_open_wait(self): """Open the serial and wait until it's closed by the device.""" mbed_serial = serial.Serial() try: mbed_serial.port = retry_fun_call( - fun=functools.partial(self.get_usb_serial_name, usb_id_str), # pylint: disable=not-callable + fun=functools.partial(self.get_usb_serial_name, self.dut_usb_dev_sn), # pylint: disable=not-callable num_retries=20, retry_delay=0.05) retry_fun_call( @@ -127,12 +132,12 @@ def port_open_wait(self, usb_id_str): self.notify_complete(False) return - def port_open_close(self, usb_id_str): + def port_open_close(self): """Open the serial and close it with a delay.""" mbed_serial = serial.Serial(timeout=0.5, write_timeout=0.1) try: mbed_serial.port = retry_fun_call( - fun=functools.partial(self.get_usb_serial_name, usb_id_str), # pylint: disable=not-callable + fun=functools.partial(self.get_usb_serial_name, self.dut_usb_dev_sn), # pylint: disable=not-callable num_retries=20, retry_delay=0.05) retry_fun_call( @@ -147,7 +152,7 @@ def port_open_close(self, usb_id_str): self.notify_complete(False) return - def send_data_sequence(self, usb_id_str, chunk_size=1): + def send_data_sequence(self, chunk_size=1): """Open the serial and send a sequence of values. chunk_size defines the size of data sent in each write operation. @@ -156,7 +161,7 @@ def send_data_sequence(self, usb_id_str, chunk_size=1): mbed_serial = serial.Serial(write_timeout=0.1) try: mbed_serial.port = retry_fun_call( - fun=functools.partial(self.get_usb_serial_name, usb_id_str), # pylint: disable=not-callable + fun=functools.partial(self.get_usb_serial_name, self.dut_usb_dev_sn), # pylint: disable=not-callable num_retries=20, retry_delay=0.05) retry_fun_call( @@ -185,12 +190,12 @@ def send_data_sequence(self, usb_id_str, chunk_size=1): time.sleep(TERM_CLOSE_DELAY) mbed_serial.close() - def loopback(self, usb_id_str): + def loopback(self): """Open the serial and send back every byte received.""" mbed_serial = serial.Serial(timeout=0.5, write_timeout=0.1) try: mbed_serial.port = retry_fun_call( - fun=functools.partial(self.get_usb_serial_name, usb_id_str), # pylint: disable=not-callable + fun=functools.partial(self.get_usb_serial_name, self.dut_usb_dev_sn), # pylint: disable=not-callable num_retries=20, retry_delay=0.05) retry_fun_call( @@ -217,7 +222,7 @@ def loopback(self, usb_id_str): time.sleep(TERM_CLOSE_DELAY) mbed_serial.close() - def change_line_coding(self, usb_id_str): + def change_line_coding(self): """Open the serial and change serial params according to device request. New line coding params are read from the device serial data. @@ -225,7 +230,7 @@ def change_line_coding(self, usb_id_str): mbed_serial = serial.Serial(timeout=0.5) try: mbed_serial.port = retry_fun_call( - fun=functools.partial(self.get_usb_serial_name, usb_id_str), # pylint: disable=not-callable + fun=functools.partial(self.get_usb_serial_name, self.dut_usb_dev_sn), # pylint: disable=not-callable num_retries=20, retry_delay=0.05) retry_fun_call( @@ -256,6 +261,7 @@ def change_line_coding(self, usb_id_str): mbed_serial.close() def setup(self): + self.register_callback(MSG_KEY_DEVICE_READY, self.cb_device_ready) self.register_callback(MSG_KEY_PORT_OPEN_WAIT, self.cb_port_open_wait) self.register_callback(MSG_KEY_PORT_OPEN_CLOSE, self.cb_port_open_close) self.register_callback(MSG_KEY_SEND_BYTES_SINGLE, self.cb_send_bytes_single) @@ -263,6 +269,13 @@ def setup(self): self.register_callback(MSG_KEY_LOOPBACK, self.cb_loopback) self.register_callback(MSG_KEY_CHANGE_LINE_CODING, self.cb_change_line_coding) + def cb_device_ready(self, key, value, timestamp): + """Send a unique USB SN to the device. + + DUT uses this SN every time it connects to host as a USB device. + """ + self.send_kv(MSG_KEY_SERIAL_NUMBER, self.dut_usb_dev_sn) + def start_bg_task(self, **thread_kwargs): """Start a new daemon thread. @@ -281,36 +294,28 @@ def start_bg_task(self, **thread_kwargs): def cb_port_open_wait(self, key, value, timestamp): """Open the serial and wait until it's closed by the device.""" - self.start_bg_task( - target=self.port_open_wait, - args=(value, )) + self.start_bg_task(target=self.port_open_wait) def cb_port_open_close(self, key, value, timestamp): """Open the serial and close it with a delay.""" - self.start_bg_task( - target=self.port_open_close, - args=(value, )) + self.start_bg_task(target=self.port_open_close) def cb_send_bytes_single(self, key, value, timestamp): """Open the serial and send a sequence of values.""" self.start_bg_task( target=self.send_data_sequence, - args=(value, 1)) + args=(1, )) def cb_send_bytes_multiple(self, key, value, timestamp): """Open the serial and send a sequence of one byte values.""" self.start_bg_task( target=self.send_data_sequence, - args=(value, RX_BUFF_SIZE)) + args=(RX_BUFF_SIZE, )) def cb_loopback(self, key, value, timestamp): """Open the serial and send a sequence of multibyte values.""" - self.start_bg_task( - target=self.loopback, - args=(value, )) + self.start_bg_task(target=self.loopback) def cb_change_line_coding(self, key, value, timestamp): """Open the serial and change the line coding.""" - self.start_bg_task( - target=self.change_line_coding, - args=(value, )) + self.start_bg_task(target=self.change_line_coding) diff --git a/TESTS/usb_device/serial/main.cpp b/TESTS/usb_device/serial/main.cpp index 2f55df43fbb..8c4a6433ab2 100644 --- a/TESTS/usb_device/serial/main.cpp +++ b/TESTS/usb_device/serial/main.cpp @@ -23,6 +23,7 @@ #include "unity/unity.h" #include "mbed.h" #include +#include "usb_phy_api.h" #include "USBCDC.h" #include "USBSerial.h" @@ -30,8 +31,13 @@ #define USB_CDC_PID 0x2013 #define USB_SERIAL_VID 0x1f00 #define USB_SERIAL_PID 0x2012 -#define USB_SN_MAX_LEN 128 +#define MSG_KEY_LEN 24 + +#define MSG_VALUE_DUMMY "0" + +#define MSG_KEY_DEVICE_READY "ready" +#define MSG_KEY_SERIAL_NUMBER "usb_dev_sn" #define MSG_KEY_PORT_OPEN_WAIT "port_open_wait" #define MSG_KEY_PORT_OPEN_CLOSE "port_open_close" #define MSG_KEY_SEND_BYTES_SINGLE "send_single" @@ -57,6 +63,13 @@ #define LINE_CODING_STRLEN 13 // 6 + 2 + 1 + 1 + 3 * comma +#define USB_DEV_SN_LEN (32) // 32 hex digit UUID +#define NONASCII_CHAR ('?') +#define USB_DEV_SN_DESC_SIZE (USB_DEV_SN_LEN * 2 + 2) + +const char *default_serial_num = "0123456789"; +char usb_dev_sn[USB_DEV_SN_LEN + 1]; + using utest::v1::Case; using utest::v1::Specification; using utest::v1::Harness; @@ -122,20 +135,128 @@ Mail lc_mail; #define EF_SEND (1ul << 0) EventFlags event_flags; -char *usb_desc2str(const uint8_t *usb_desc, char *str, size_t n) +/** + * Convert a USB string descriptor to C style ASCII + * + * The string placed in str is always null-terminated which may cause the + * loss of data if n is to small. If the length of descriptor string is less + * than n, additional null bytes are written to str. + * + * @param str output buffer for the ASCII string + * @param usb_desc USB string descriptor + * @param n size of str buffer + * @returns number of non-null bytes returned in str or -1 on failure + */ +int usb_string_desc2ascii(char *str, const uint8_t *usb_desc, size_t n) { - const size_t desc_size = usb_desc[0] - 2; - const uint8_t *src = &usb_desc[2]; - size_t i, j; - for (i = 0, j = 0; i < n && j < desc_size; i++, j += 2) { - str[i] = src[j]; + if (str == NULL || usb_desc == NULL || n < 1) { + return -1; + } + // bDescriptorType @ offset 1 + if (usb_desc[1] != STRING_DESCRIPTOR) { + return -1; + } + // bLength @ offset 0 + const size_t bLength = usb_desc[0]; + if (bLength % 2 != 0) { + return -1; + } + size_t s, d; + for (s = 0, d = 2; s < n - 1 && d < bLength; s++, d += 2) { + // handle non-ASCII characters + if (usb_desc[d] > 0x7f || usb_desc[d + 1] != 0) { + str[s] = NONASCII_CHAR; + } else { + str[s] = usb_desc[d]; + } } - for (; i < n; i++) { - str[i] = '\0'; + int str_len = s; + for (; s < n; s++) { + str[s] = '\0'; } - return str; + return str_len; } +/** + * Convert a C style ASCII to a USB string descriptor + * + * @param usb_desc output buffer for the USB string descriptor + * @param str ASCII string + * @param n size of usb_desc buffer, even number + * @returns number of bytes returned in usb_desc or -1 on failure + */ +int ascii2usb_string_desc(uint8_t *usb_desc, const char *str, size_t n) +{ + if (str == NULL || usb_desc == NULL || n < 4) { + return -1; + } + if (n % 2 != 0) { + return -1; + } + size_t s, d; + // set bString (@ offset 2 onwards) as a UNICODE UTF-16LE string + memset(usb_desc, 0, n); + for (s = 0, d = 2; str[s] != '\0' && d < n; s++, d += 2) { + usb_desc[d] = str[s]; + } + // set bLength @ offset 0 + usb_desc[0] = d; + // set bDescriptorType @ offset 1 + usb_desc[1] = STRING_DESCRIPTOR; + return d; +} + +class TestUSBCDC: public USBCDC { +private: + uint8_t _serial_num_descriptor[USB_DEV_SN_DESC_SIZE]; +public: + TestUSBCDC(uint16_t vendor_id = 0x1f00, uint16_t product_id = 0x2012, uint16_t product_release = 0x0001, + const char *serial_number = default_serial_num) : + USBCDC(get_usb_phy(), vendor_id, product_id, product_release) + { + init(); + int rc = ascii2usb_string_desc(_serial_num_descriptor, serial_number, USB_DEV_SN_DESC_SIZE); + if (rc < 0) { + ascii2usb_string_desc(_serial_num_descriptor, default_serial_num, USB_DEV_SN_DESC_SIZE); + } + } + + virtual ~TestUSBCDC() + { + deinit(); + } + + virtual const uint8_t *string_iserial_desc() + { + return (const uint8_t *) _serial_num_descriptor; + } +}; + +class TestUSBSerial: public USBSerial { +private: + uint8_t _serial_num_descriptor[USB_DEV_SN_DESC_SIZE]; +public: + TestUSBSerial(uint16_t vendor_id = 0x1f00, uint16_t product_id = 0x2012, uint16_t product_release = 0x0001, + const char *serial_number = default_serial_num) : + USBSerial(get_usb_phy(), vendor_id, product_id, product_release) + { + int rc = ascii2usb_string_desc(_serial_num_descriptor, serial_number, USB_DEV_SN_DESC_SIZE); + if (rc < 0) { + ascii2usb_string_desc(_serial_num_descriptor, default_serial_num, USB_DEV_SN_DESC_SIZE); + } + } + + virtual ~TestUSBSerial() + { + deinit(); + } + + virtual const uint8_t *string_iserial_desc() + { + return (const uint8_t *) _serial_num_descriptor; + } +}; + /** Test CDC USB reconnect * * Given the host has successfully opened the port of a USB CDC device @@ -144,9 +265,7 @@ char *usb_desc2str(const uint8_t *usb_desc, char *str, size_t n) */ void test_cdc_usb_reconnect() { - USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); - char usb_cdc_sn[USB_SN_MAX_LEN] = { }; - usb_desc2str(usb_cdc.string_iserial_desc(), usb_cdc_sn, USB_SN_MAX_LEN); + TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); TEST_ASSERT_FALSE(usb_cdc.configured()); TEST_ASSERT_FALSE(usb_cdc.ready()); @@ -159,7 +278,7 @@ void test_cdc_usb_reconnect() TEST_ASSERT_TRUE(usb_cdc.configured()); TEST_ASSERT_FALSE(usb_cdc.ready()); - greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, usb_cdc_sn); + greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, MSG_VALUE_DUMMY); // Wait for the host to open the port. usb_cdc.wait_ready(); TEST_ASSERT_TRUE(usb_cdc.configured()); @@ -181,7 +300,7 @@ void test_cdc_usb_reconnect() TEST_ASSERT_TRUE(usb_cdc.configured()); TEST_ASSERT_FALSE(usb_cdc.ready()); - greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, usb_cdc_sn); + greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, MSG_VALUE_DUMMY); // Wait for the host to open the port again. usb_cdc.wait_ready(); TEST_ASSERT_TRUE(usb_cdc.configured()); @@ -202,11 +321,9 @@ void test_cdc_usb_reconnect() */ void test_cdc_rx_single_bytes() { - USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); - char usb_cdc_sn[USB_SN_MAX_LEN] = { }; - usb_desc2str(usb_cdc.string_iserial_desc(), usb_cdc_sn, USB_SN_MAX_LEN); + TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); usb_cdc.connect(); - greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, usb_cdc_sn); + greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, MSG_VALUE_DUMMY); usb_cdc.wait_ready(); uint8_t buff = 0x01; for (int expected = 0xff; expected >= 0; expected--) { @@ -247,11 +364,9 @@ void tx_thread_fun(USBCDC *usb_cdc) */ void test_cdc_rx_single_bytes_concurrent() { - USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); - char usb_cdc_sn[USB_SN_MAX_LEN] = { }; - usb_desc2str(usb_cdc.string_iserial_desc(), usb_cdc_sn, USB_SN_MAX_LEN); + TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); usb_cdc.connect(); - greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, usb_cdc_sn); + greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, MSG_VALUE_DUMMY); usb_cdc.wait_ready(); wait_ms(TX_DELAY_MS); Thread tx_thread; @@ -283,11 +398,9 @@ void test_cdc_rx_single_bytes_concurrent() */ void test_cdc_rx_multiple_bytes() { - USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); - char usb_cdc_sn[USB_SN_MAX_LEN] = { }; - usb_desc2str(usb_cdc.string_iserial_desc(), usb_cdc_sn, USB_SN_MAX_LEN); + TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); usb_cdc.connect(); - greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, usb_cdc_sn); + greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, MSG_VALUE_DUMMY); usb_cdc.wait_ready(); uint8_t buff[RX_BUFF_SIZE] = { 0 }; uint8_t expected_buff[RX_BUFF_SIZE] = { 0 }; @@ -317,11 +430,9 @@ void test_cdc_rx_multiple_bytes() */ void test_cdc_rx_multiple_bytes_concurrent() { - USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); - char usb_cdc_sn[USB_SN_MAX_LEN] = { }; - usb_desc2str(usb_cdc.string_iserial_desc(), usb_cdc_sn, USB_SN_MAX_LEN); + TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); usb_cdc.connect(); - greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, usb_cdc_sn); + greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, MSG_VALUE_DUMMY); usb_cdc.wait_ready(); wait_ms(TX_DELAY_MS); Thread tx_thread; @@ -357,11 +468,9 @@ void test_cdc_rx_multiple_bytes_concurrent() */ void test_cdc_loopback() { - USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); - char usb_cdc_sn[USB_SN_MAX_LEN] = { }; - usb_desc2str(usb_cdc.string_iserial_desc(), usb_cdc_sn, USB_SN_MAX_LEN); + TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); usb_cdc.connect(); - greentea_send_kv(MSG_KEY_LOOPBACK, usb_cdc_sn); + greentea_send_kv(MSG_KEY_LOOPBACK, MSG_VALUE_DUMMY); usb_cdc.wait_ready(); wait_ms(TX_DELAY_MS); uint8_t rx_buff, tx_buff; @@ -387,9 +496,7 @@ void test_cdc_loopback() */ void test_serial_usb_reconnect() { - USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); - char usb_serial_sn[USB_SN_MAX_LEN] = { }; - usb_desc2str(usb_serial.string_iserial_desc(), usb_serial_sn, USB_SN_MAX_LEN); + TestUSBSerial usb_serial(USB_SERIAL_VID, USB_SERIAL_PID, 1, usb_dev_sn); TEST_ASSERT_FALSE(usb_serial.configured()); TEST_ASSERT_FALSE(usb_serial.connected()); TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); @@ -404,7 +511,7 @@ void test_serial_usb_reconnect() TEST_ASSERT_FALSE(usb_serial.connected()); TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); - greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, usb_serial_sn); + greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, MSG_VALUE_DUMMY); // Wait for the host to open the port. while (!usb_serial.connected()) { wait_ms(1); @@ -431,7 +538,7 @@ void test_serial_usb_reconnect() TEST_ASSERT_FALSE(usb_serial.connected()); TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); - greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, usb_serial_sn); + greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, MSG_VALUE_DUMMY); // Wait for the host to open the port again. while (!usb_serial.connected()) { wait_ms(1); @@ -456,11 +563,9 @@ void test_serial_usb_reconnect() */ void test_serial_term_reopen() { - USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); - char usb_serial_sn[USB_SN_MAX_LEN] = { }; - usb_desc2str(usb_serial.string_iserial_desc(), usb_serial_sn, USB_SN_MAX_LEN); + TestUSBSerial usb_serial(USB_SERIAL_VID, USB_SERIAL_PID, 1, usb_dev_sn); usb_serial.connect(); - greentea_send_kv(MSG_KEY_PORT_OPEN_CLOSE, usb_serial_sn); + greentea_send_kv(MSG_KEY_PORT_OPEN_CLOSE, MSG_VALUE_DUMMY); // Wait for the host to open the terminal. while (!usb_serial.connected()) { wait_ms(1); @@ -479,7 +584,7 @@ void test_serial_term_reopen() TEST_ASSERT_FALSE(usb_serial.connected()); TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); - greentea_send_kv(MSG_KEY_PORT_OPEN_CLOSE, usb_serial_sn); + greentea_send_kv(MSG_KEY_PORT_OPEN_CLOSE, MSG_VALUE_DUMMY); // Wait for the host to open the terminal again. while (!usb_serial.connected()) { wait_ms(1); @@ -509,11 +614,9 @@ void test_serial_term_reopen() */ void test_serial_getc() { - USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); - char usb_serial_sn[USB_SN_MAX_LEN] = { }; - usb_desc2str(usb_serial.string_iserial_desc(), usb_serial_sn, USB_SN_MAX_LEN); + TestUSBSerial usb_serial(USB_SERIAL_VID, USB_SERIAL_PID, 1, usb_dev_sn); usb_serial.connect(); - greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, usb_serial_sn); + greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, MSG_VALUE_DUMMY); while (!usb_serial.connected()) { wait_ms(1); } @@ -541,11 +644,9 @@ void test_serial_getc() */ void test_serial_printf_scanf() { - USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); - char usb_serial_sn[USB_SN_MAX_LEN] = { }; - usb_desc2str(usb_serial.string_iserial_desc(), usb_serial_sn, USB_SN_MAX_LEN); + TestUSBSerial usb_serial(USB_SERIAL_VID, USB_SERIAL_PID, 1, usb_dev_sn); usb_serial.connect(); - greentea_send_kv(MSG_KEY_LOOPBACK, usb_serial_sn); + greentea_send_kv(MSG_KEY_LOOPBACK, MSG_VALUE_DUMMY); while (!usb_serial.connected()) { wait_ms(1); } @@ -587,11 +688,9 @@ void line_coding_changed_cb(int baud, int bits, int parity, int stop) */ void test_serial_line_coding_change() { - USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); - char usb_serial_sn[USB_SN_MAX_LEN] = { }; - usb_desc2str(usb_serial.string_iserial_desc(), usb_serial_sn, USB_SN_MAX_LEN); + TestUSBSerial usb_serial(USB_SERIAL_VID, USB_SERIAL_PID, 1, usb_dev_sn); usb_serial.connect(); - greentea_send_kv(MSG_KEY_CHANGE_LINE_CODING, usb_serial_sn); + greentea_send_kv(MSG_KEY_CHANGE_LINE_CODING, MSG_VALUE_DUMMY); while (!usb_serial.connected()) { wait_ms(1); } @@ -643,7 +742,25 @@ utest::v1::status_t testsuite_setup(const size_t number_of_cases) { GREENTEA_SETUP(35, "usb_device_serial"); srand((unsigned) ticker_read_us(get_us_ticker_data())); - return utest::v1::greentea_test_setup_handler(number_of_cases); + + utest::v1::status_t status = utest::v1::greentea_test_setup_handler(number_of_cases); + if (status != utest::v1::STATUS_CONTINUE) { + return status; + } + + char key[MSG_KEY_LEN + 1] = { }; + char usb_dev_uuid[USB_DEV_SN_LEN + 1] = { }; + + greentea_send_kv(MSG_KEY_DEVICE_READY, MSG_VALUE_DUMMY); + greentea_parse_kv(key, usb_dev_uuid, MSG_KEY_LEN, USB_DEV_SN_LEN + 1); + + if (strcmp(key, MSG_KEY_SERIAL_NUMBER) != 0) { + utest_printf("Invalid message key.\n"); + return utest::v1::STATUS_ABORT; + } + + strncpy(usb_dev_sn, usb_dev_uuid, USB_DEV_SN_LEN + 1); + return status; } Case cases[] = { @@ -660,7 +777,7 @@ Case cases[] = { Case("Serial line coding change", test_serial_line_coding_change), }; -Specification specification(testsuite_setup, cases); +Specification specification((utest::v1::test_setup_handler_t) testsuite_setup, cases); int main() { From f456525d1eb4de01c38da6e9bc75159382af6ede Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Wed, 17 Oct 2018 14:40:41 +0200 Subject: [PATCH 252/488] Tests: USB: Update code comments --- TESTS/host_tests/usb_device_serial.py | 8 ++++++++ TESTS/usb_device/serial/main.cpp | 2 -- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/TESTS/host_tests/usb_device_serial.py b/TESTS/host_tests/usb_device_serial.py index 5ecba8b93c3..2c795155b70 100644 --- a/TESTS/host_tests/usb_device_serial.py +++ b/TESTS/host_tests/usb_device_serial.py @@ -35,8 +35,16 @@ MSG_KEY_CHANGE_LINE_CODING = 'change_lc' RX_BUFF_SIZE = 32 + +# This delay eliminates the possibility of the device detecting +# the port being closed when still waiting for data. TERM_CLOSE_DELAY = 0.01 + +# A duration the serial terminal is open on the host side +# during terminal reopen test. TERM_REOPEN_DELAY = 0.1 + +# 6 (baud) + 2 (bits) + 1 (parity) + 1 (stop) + 3 * comma LINE_CODING_STRLEN = 13 diff --git a/TESTS/usb_device/serial/main.cpp b/TESTS/usb_device/serial/main.cpp index 8c4a6433ab2..2bcbeea61fc 100644 --- a/TESTS/usb_device/serial/main.cpp +++ b/TESTS/usb_device/serial/main.cpp @@ -33,9 +33,7 @@ #define USB_SERIAL_PID 0x2012 #define MSG_KEY_LEN 24 - #define MSG_VALUE_DUMMY "0" - #define MSG_KEY_DEVICE_READY "ready" #define MSG_KEY_SERIAL_NUMBER "usb_dev_sn" #define MSG_KEY_PORT_OPEN_WAIT "port_open_wait" From 4d4af338ce84c3159fcb549a21b8d47865ae05bb Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Wed, 17 Oct 2018 17:33:06 +0200 Subject: [PATCH 253/488] Tests: USB: Fix Windows USB SN handling --- TESTS/host_tests/usb_device_serial.py | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/TESTS/host_tests/usb_device_serial.py b/TESTS/host_tests/usb_device_serial.py index 2c795155b70..927a052c7bf 100644 --- a/TESTS/host_tests/usb_device_serial.py +++ b/TESTS/host_tests/usb_device_serial.py @@ -20,6 +20,7 @@ import time import threading import uuid +import sys import serial import serial.tools.list_ports as stlp import mbed_host_tests @@ -50,6 +51,12 @@ def usb_serial_name(serial_number): """Get USB serial device name based on the device serial number.""" + if sys.platform.startswith('win'): + # The USB spec defines all USB string descriptors to be + # UNICODE UTF-16LE. Windows however, decodes the USB serial + # number string descriptor as uppercase characters only. + # To solve this issue, convert the pattern to uppercase. + serial_number = str(serial_number).upper() for port_info in stlp.comports(): if port_info.serial_number == serial_number: return port_info.device From 482935d5216aff63411431694c0a8992bd14f5c5 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 18 Oct 2018 15:19:03 +0200 Subject: [PATCH 254/488] Tests: USB: Increas the size of RX CDC test data This ensures the flow control is tested. --- TESTS/host_tests/usb_device_serial.py | 3 +- TESTS/usb_device/serial/main.cpp | 45 ++++++++++++++++++--------- 2 files changed, 32 insertions(+), 16 deletions(-) diff --git a/TESTS/host_tests/usb_device_serial.py b/TESTS/host_tests/usb_device_serial.py index 927a052c7bf..c3bededa10f 100644 --- a/TESTS/host_tests/usb_device_serial.py +++ b/TESTS/host_tests/usb_device_serial.py @@ -323,9 +323,10 @@ def cb_send_bytes_single(self, key, value, timestamp): def cb_send_bytes_multiple(self, key, value, timestamp): """Open the serial and send a sequence of one byte values.""" + chunk_size = RX_BUFF_SIZE * int(value) self.start_bg_task( target=self.send_data_sequence, - args=(RX_BUFF_SIZE, )) + args=(chunk_size, )) def cb_loopback(self, key, value, timestamp): """Open the serial and send a sequence of multibyte values.""" diff --git a/TESTS/usb_device/serial/main.cpp b/TESTS/usb_device/serial/main.cpp index 2bcbeea61fc..616b498f617 100644 --- a/TESTS/usb_device/serial/main.cpp +++ b/TESTS/usb_device/serial/main.cpp @@ -45,6 +45,13 @@ #define TX_BUFF_SIZE 32 #define RX_BUFF_SIZE 32 + +// The size of every data chunk the host sends (for each value from a +// known sequence) during 'CDC RX multiple' test cases is +// HOST_RX_BUFF_SIZE_RATIO times the size of RX_BUFF_SIZE input buffer. +// This way the device has to correctly handle data bigger that its buffer. +#define HOST_RX_BUFF_SIZE_RATIO 64 + #define CDC_LOOPBACK_REPS 1200 #define SERIAL_LOOPBACK_REPS 100 #define USB_RECONNECT_DELAY_MS 1 @@ -398,19 +405,23 @@ void test_cdc_rx_multiple_bytes() { TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); usb_cdc.connect(); - greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, MSG_VALUE_DUMMY); + greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, HOST_RX_BUFF_SIZE_RATIO); usb_cdc.wait_ready(); uint8_t buff[RX_BUFF_SIZE] = { 0 }; uint8_t expected_buff[RX_BUFF_SIZE] = { 0 }; for (int expected = 0xff; expected >= 0; expected--) { - memset(expected_buff, expected, RX_BUFF_SIZE); - TEST_ASSERT(usb_cdc.receive(buff, RX_BUFF_SIZE, NULL)); - TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_buff, buff, RX_BUFF_SIZE); + for (int chunk = 0; chunk < HOST_RX_BUFF_SIZE_RATIO; chunk++) { + memset(expected_buff, expected, RX_BUFF_SIZE); + TEST_ASSERT(usb_cdc.receive(buff, RX_BUFF_SIZE, NULL)); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_buff, buff, RX_BUFF_SIZE); + } } for (int expected = 0; expected <= 0xff; expected++) { - memset(expected_buff, expected, RX_BUFF_SIZE); - TEST_ASSERT(usb_cdc.receive(buff, RX_BUFF_SIZE, NULL)); - TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_buff, buff, RX_BUFF_SIZE); + for (int chunk = 0; chunk < HOST_RX_BUFF_SIZE_RATIO; chunk++) { + memset(expected_buff, expected, RX_BUFF_SIZE); + TEST_ASSERT(usb_cdc.receive(buff, RX_BUFF_SIZE, NULL)); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_buff, buff, RX_BUFF_SIZE); + } } // Wait for the host to close its port. while (usb_cdc.ready()) { @@ -430,7 +441,7 @@ void test_cdc_rx_multiple_bytes_concurrent() { TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); usb_cdc.connect(); - greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, MSG_VALUE_DUMMY); + greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, HOST_RX_BUFF_SIZE_RATIO); usb_cdc.wait_ready(); wait_ms(TX_DELAY_MS); Thread tx_thread; @@ -439,14 +450,18 @@ void test_cdc_rx_multiple_bytes_concurrent() uint8_t buff[RX_BUFF_SIZE] = { 0 }; uint8_t expected_buff[RX_BUFF_SIZE] = { 0 }; for (int expected = 0xff; expected >= 0; expected--) { - memset(expected_buff, expected, RX_BUFF_SIZE); - TEST_ASSERT(usb_cdc.receive(buff, RX_BUFF_SIZE, NULL)); - TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_buff, buff, RX_BUFF_SIZE); + for (int chunk = 0; chunk < HOST_RX_BUFF_SIZE_RATIO; chunk++) { + memset(expected_buff, expected, RX_BUFF_SIZE); + TEST_ASSERT(usb_cdc.receive(buff, RX_BUFF_SIZE, NULL)); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_buff, buff, RX_BUFF_SIZE); + } } for (int expected = 0; expected <= 0xff; expected++) { - memset(expected_buff, expected, RX_BUFF_SIZE); - TEST_ASSERT(usb_cdc.receive(buff, RX_BUFF_SIZE, NULL)); - TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_buff, buff, RX_BUFF_SIZE); + for (int chunk = 0; chunk < HOST_RX_BUFF_SIZE_RATIO; chunk++) { + memset(expected_buff, expected, RX_BUFF_SIZE); + TEST_ASSERT(usb_cdc.receive(buff, RX_BUFF_SIZE, NULL)); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_buff, buff, RX_BUFF_SIZE); + } } event_flags.clear(EF_SEND); tx_thread.join(); @@ -738,7 +753,7 @@ void test_serial_line_coding_change() utest::v1::status_t testsuite_setup(const size_t number_of_cases) { - GREENTEA_SETUP(35, "usb_device_serial"); + GREENTEA_SETUP(45, "usb_device_serial"); srand((unsigned) ticker_read_us(get_us_ticker_data())); utest::v1::status_t status = utest::v1::greentea_test_setup_handler(number_of_cases); From 7f597883a974bb3303e39735400a7af6f8883388 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 25 Oct 2018 19:22:03 -0500 Subject: [PATCH 255/488] Tests: USB: Use DTR to make Serial tests reliable Update the serial host test to set DTR low before opening a serial port. Set DTR high once the serial object is ready. This ensures that no data is sent by the device until the host is ready. --- TESTS/host_tests/usb_device_serial.py | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/TESTS/host_tests/usb_device_serial.py b/TESTS/host_tests/usb_device_serial.py index c3bededa10f..7ba0d77ae05 100644 --- a/TESTS/host_tests/usb_device_serial.py +++ b/TESTS/host_tests/usb_device_serial.py @@ -129,6 +129,7 @@ def __init__(self): def port_open_wait(self): """Open the serial and wait until it's closed by the device.""" mbed_serial = serial.Serial() + mbed_serial.dtr = False try: mbed_serial.port = retry_fun_call( fun=functools.partial(self.get_usb_serial_name, self.dut_usb_dev_sn), # pylint: disable=not-callable @@ -138,6 +139,7 @@ def port_open_wait(self): fun=mbed_serial.open, num_retries=10, retry_delay=0.05) + mbed_serial.dtr = True try: mbed_serial.read() # wait until closed except (serial.portNotOpenError, serial.SerialException): @@ -160,6 +162,7 @@ def port_open_close(self): num_retries=10, retry_delay=0.05) mbed_serial.reset_output_buffer() + mbed_serial.dtr = True time.sleep(TERM_REOPEN_DELAY) mbed_serial.close() except RetryError as exc: @@ -188,6 +191,7 @@ def send_data_sequence(self, chunk_size=1): self.notify_complete(False) return mbed_serial.reset_output_buffer() + mbed_serial.dtr = True for byteval in itertools.chain(reversed(range(0x100)), range(0x100)): try: payload = bytearray(chunk_size * (byteval,)) @@ -208,6 +212,7 @@ def send_data_sequence(self, chunk_size=1): def loopback(self): """Open the serial and send back every byte received.""" mbed_serial = serial.Serial(timeout=0.5, write_timeout=0.1) + mbed_serial.dtr = False try: mbed_serial.port = retry_fun_call( fun=functools.partial(self.get_usb_serial_name, self.dut_usb_dev_sn), # pylint: disable=not-callable @@ -222,6 +227,7 @@ def loopback(self): self.notify_complete(False) return mbed_serial.reset_output_buffer() + mbed_serial.dtr = True try: payload = mbed_serial.read(1) while len(payload) == 1: @@ -243,6 +249,7 @@ def change_line_coding(self): New line coding params are read from the device serial data. """ mbed_serial = serial.Serial(timeout=0.5) + mbed_serial.dtr = False try: mbed_serial.port = retry_fun_call( fun=functools.partial(self.get_usb_serial_name, self.dut_usb_dev_sn), # pylint: disable=not-callable @@ -257,6 +264,7 @@ def change_line_coding(self): self.notify_complete(False) return mbed_serial.reset_output_buffer() + mbed_serial.dtr = True try: payload = mbed_serial.read(LINE_CODING_STRLEN) while len(payload) == LINE_CODING_STRLEN: From 26ab6bbf8ecfc3c32fa3935c5d5b7e9f48cac615 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 25 Oct 2018 19:25:27 -0500 Subject: [PATCH 256/488] Tests: USB: Remove TX_DELAY_MS from serial test Remove TX_DELAY_MS and all the places it was called since it is not needed when DTR flow control is used. --- TESTS/usb_device/serial/main.cpp | 19 ++----------------- 1 file changed, 2 insertions(+), 17 deletions(-) diff --git a/TESTS/usb_device/serial/main.cpp b/TESTS/usb_device/serial/main.cpp index 616b498f617..20f9c3f1614 100644 --- a/TESTS/usb_device/serial/main.cpp +++ b/TESTS/usb_device/serial/main.cpp @@ -60,12 +60,6 @@ // to handle the reconnect operation correctly. #define USB_DISCONNECT_DELAY_MS 1 -// Despite having ECHO and ECHOCTL POSIX lflags disabled by default by -// pyserial, a delay is needed for host to properly handle data received -// from USB serial/CDC device. -// With no delay host would echo 0x00-0x31 characters prefixed with '^'. -#define TX_DELAY_MS 10 - #define LINE_CODING_STRLEN 13 // 6 + 2 + 1 + 1 + 3 * comma #define USB_DEV_SN_LEN (32) // 32 hex digit UUID @@ -373,7 +367,6 @@ void test_cdc_rx_single_bytes_concurrent() usb_cdc.connect(); greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, MSG_VALUE_DUMMY); usb_cdc.wait_ready(); - wait_ms(TX_DELAY_MS); Thread tx_thread; event_flags.set(EF_SEND); tx_thread.start(mbed::callback(tx_thread_fun, &usb_cdc)); @@ -443,7 +436,6 @@ void test_cdc_rx_multiple_bytes_concurrent() usb_cdc.connect(); greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, HOST_RX_BUFF_SIZE_RATIO); usb_cdc.wait_ready(); - wait_ms(TX_DELAY_MS); Thread tx_thread; event_flags.set(EF_SEND); tx_thread.start(mbed::callback(tx_thread_fun, &usb_cdc)); @@ -485,7 +477,6 @@ void test_cdc_loopback() usb_cdc.connect(); greentea_send_kv(MSG_KEY_LOOPBACK, MSG_VALUE_DUMMY); usb_cdc.wait_ready(); - wait_ms(TX_DELAY_MS); uint8_t rx_buff, tx_buff; for (int i = 0; i < CDC_LOOPBACK_REPS; i++) { tx_buff = (uint8_t)(rand() % 0x100); @@ -660,10 +651,7 @@ void test_serial_printf_scanf() TestUSBSerial usb_serial(USB_SERIAL_VID, USB_SERIAL_PID, 1, usb_dev_sn); usb_serial.connect(); greentea_send_kv(MSG_KEY_LOOPBACK, MSG_VALUE_DUMMY); - while (!usb_serial.connected()) { - wait_ms(1); - } - wait_ms(TX_DELAY_MS); + usb_serial.wait_ready(); static const char fmt[] = "Formatted\nstring %i."; int tx_val, rx_val, rc; for (int i = 0; i < SERIAL_LOOPBACK_REPS; i++) { @@ -704,10 +692,7 @@ void test_serial_line_coding_change() TestUSBSerial usb_serial(USB_SERIAL_VID, USB_SERIAL_PID, 1, usb_dev_sn); usb_serial.connect(); greentea_send_kv(MSG_KEY_CHANGE_LINE_CODING, MSG_VALUE_DUMMY); - while (!usb_serial.connected()) { - wait_ms(1); - } - wait_ms(TX_DELAY_MS); + usb_serial.wait_ready(); usb_serial.attach(line_coding_changed_cb); size_t num_line_codings = sizeof test_codings / sizeof test_codings[0]; line_coding_t *lc_prev = &default_lc; From a7c2d94a9a506014871308628def2ed4f9f2ef20 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 25 Oct 2018 19:35:39 -0500 Subject: [PATCH 257/488] Tests: USB: Increase serial open retries Double the number of attempts that are made to open a serial port. This makes tests run more reliably on Windows. --- TESTS/host_tests/usb_device_serial.py | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/TESTS/host_tests/usb_device_serial.py b/TESTS/host_tests/usb_device_serial.py index 7ba0d77ae05..2280b6db8e9 100644 --- a/TESTS/host_tests/usb_device_serial.py +++ b/TESTS/host_tests/usb_device_serial.py @@ -137,7 +137,7 @@ def port_open_wait(self): retry_delay=0.05) retry_fun_call( fun=mbed_serial.open, - num_retries=10, + num_retries=20, retry_delay=0.05) mbed_serial.dtr = True try: @@ -159,7 +159,7 @@ def port_open_close(self): retry_delay=0.05) retry_fun_call( fun=mbed_serial.open, - num_retries=10, + num_retries=20, retry_delay=0.05) mbed_serial.reset_output_buffer() mbed_serial.dtr = True @@ -184,7 +184,7 @@ def send_data_sequence(self, chunk_size=1): retry_delay=0.05) retry_fun_call( fun=mbed_serial.open, - num_retries=10, + num_retries=20, retry_delay=0.05) except RetryError as exc: self.log('TEST ERROR: {}'.format(exc)) @@ -220,7 +220,7 @@ def loopback(self): retry_delay=0.05) retry_fun_call( fun=mbed_serial.open, - num_retries=10, + num_retries=20, retry_delay=0.05) except RetryError as exc: self.log('TEST ERROR: {}'.format(exc)) @@ -257,7 +257,7 @@ def change_line_coding(self): retry_delay=0.05) retry_fun_call( fun=mbed_serial.open, - num_retries=10, + num_retries=20, retry_delay=0.05) except RetryError as exc: self.log('TEST ERROR: {}'.format(exc)) From 90232e447411764379986995cec156211b3b2209 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 26 Oct 2018 11:12:55 -0500 Subject: [PATCH 258/488] Remove USB disconnect delay from Serial test Remove the USB disconnect delay since there is no reason this is needed. Failures which occur without this indicate a device or host problem. --- TESTS/usb_device/serial/main.cpp | 8 -------- 1 file changed, 8 deletions(-) diff --git a/TESTS/usb_device/serial/main.cpp b/TESTS/usb_device/serial/main.cpp index 20f9c3f1614..a356595003e 100644 --- a/TESTS/usb_device/serial/main.cpp +++ b/TESTS/usb_device/serial/main.cpp @@ -56,10 +56,6 @@ #define SERIAL_LOOPBACK_REPS 100 #define USB_RECONNECT_DELAY_MS 1 -// Additional delay necessary for Windows hosts -// to handle the reconnect operation correctly. -#define USB_DISCONNECT_DELAY_MS 1 - #define LINE_CODING_STRLEN 13 // 6 + 2 + 1 + 1 + 3 * comma #define USB_DEV_SN_LEN (32) // 32 hex digit UUID @@ -283,7 +279,6 @@ void test_cdc_usb_reconnect() TEST_ASSERT_TRUE(usb_cdc.configured()); TEST_ASSERT_TRUE(usb_cdc.ready()); - wait_ms(USB_DISCONNECT_DELAY_MS); // Disconnect the USB device. usb_cdc.disconnect(); TEST_ASSERT_FALSE(usb_cdc.configured()); @@ -305,7 +300,6 @@ void test_cdc_usb_reconnect() TEST_ASSERT_TRUE(usb_cdc.configured()); TEST_ASSERT_TRUE(usb_cdc.ready()); - wait_ms(USB_DISCONNECT_DELAY_MS); // Disconnect the USB device again. usb_cdc.disconnect(); TEST_ASSERT_FALSE(usb_cdc.configured()); @@ -525,7 +519,6 @@ void test_serial_usb_reconnect() TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); // Disconnect the USB device. - wait_ms(USB_DISCONNECT_DELAY_MS); usb_serial.disconnect(); TEST_ASSERT_FALSE(usb_serial.configured()); TEST_ASSERT_FALSE(usb_serial.connected()); @@ -552,7 +545,6 @@ void test_serial_usb_reconnect() TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); // Disconnect the USB device again. - wait_ms(USB_DISCONNECT_DELAY_MS); usb_serial.disconnect(); TEST_ASSERT_FALSE(usb_serial.configured()); TEST_ASSERT_FALSE(usb_serial.connected()); From 3c73e87bcaf8dd19ca0d3a548af8652f89fd7a5f Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Fri, 2 Nov 2018 12:47:55 +0100 Subject: [PATCH 259/488] Tests: USB: DTR fix for Linux hosts A DTR line is used to signal that the host has configured a terminal and is ready to transmit and receive data from the USB CDC/Serial device. When this test suite is run with the use of a Linux host, a workaround has to be used to overcome some platform specific DTR line behavior. Every time the serial port file descriptor is opened, the DTR line is asserted until the terminal attributes are set. As a consequence, the device receives a premature DTR signal with a duration of 200-500 us before the correct, long-lasting DTR signal set by the host-side test script. (tested on the Linux kernel 4.15.0) The solution is to wait for the first DTR spike, ignore it, and wait for the correct DTR signal again. --- TESTS/host_tests/usb_device_serial.py | 29 +++++----- TESTS/usb_device/serial/main.cpp | 78 +++++++++++++++++++++++++-- 2 files changed, 90 insertions(+), 17 deletions(-) diff --git a/TESTS/host_tests/usb_device_serial.py b/TESTS/host_tests/usb_device_serial.py index 2280b6db8e9..00fdc095d24 100644 --- a/TESTS/host_tests/usb_device_serial.py +++ b/TESTS/host_tests/usb_device_serial.py @@ -128,7 +128,7 @@ def __init__(self): def port_open_wait(self): """Open the serial and wait until it's closed by the device.""" - mbed_serial = serial.Serial() + mbed_serial = serial.Serial(dsrdtr=False) mbed_serial.dtr = False try: mbed_serial.port = retry_fun_call( @@ -139,19 +139,20 @@ def port_open_wait(self): fun=mbed_serial.open, num_retries=20, retry_delay=0.05) - mbed_serial.dtr = True - try: - mbed_serial.read() # wait until closed - except (serial.portNotOpenError, serial.SerialException): - pass except RetryError as exc: self.log('TEST ERROR: {}'.format(exc)) self.notify_complete(False) return + mbed_serial.dtr = True + try: + mbed_serial.read() # wait until closed + except (serial.portNotOpenError, serial.SerialException): + pass def port_open_close(self): """Open the serial and close it with a delay.""" - mbed_serial = serial.Serial(timeout=0.5, write_timeout=0.1) + mbed_serial = serial.Serial(timeout=0.5, write_timeout=0.1, dsrdtr=False) + mbed_serial.dtr = False try: mbed_serial.port = retry_fun_call( fun=functools.partial(self.get_usb_serial_name, self.dut_usb_dev_sn), # pylint: disable=not-callable @@ -161,14 +162,14 @@ def port_open_close(self): fun=mbed_serial.open, num_retries=20, retry_delay=0.05) - mbed_serial.reset_output_buffer() - mbed_serial.dtr = True - time.sleep(TERM_REOPEN_DELAY) - mbed_serial.close() except RetryError as exc: self.log('TEST ERROR: {}'.format(exc)) self.notify_complete(False) return + mbed_serial.reset_output_buffer() + mbed_serial.dtr = True + time.sleep(TERM_REOPEN_DELAY) + mbed_serial.close() def send_data_sequence(self, chunk_size=1): """Open the serial and send a sequence of values. @@ -176,7 +177,7 @@ def send_data_sequence(self, chunk_size=1): chunk_size defines the size of data sent in each write operation. The input buffer content is discarded. """ - mbed_serial = serial.Serial(write_timeout=0.1) + mbed_serial = serial.Serial(write_timeout=0.1, dsrdtr=False) try: mbed_serial.port = retry_fun_call( fun=functools.partial(self.get_usb_serial_name, self.dut_usb_dev_sn), # pylint: disable=not-callable @@ -211,7 +212,7 @@ def send_data_sequence(self, chunk_size=1): def loopback(self): """Open the serial and send back every byte received.""" - mbed_serial = serial.Serial(timeout=0.5, write_timeout=0.1) + mbed_serial = serial.Serial(timeout=0.5, write_timeout=0.1, dsrdtr=False) mbed_serial.dtr = False try: mbed_serial.port = retry_fun_call( @@ -248,7 +249,7 @@ def change_line_coding(self): New line coding params are read from the device serial data. """ - mbed_serial = serial.Serial(timeout=0.5) + mbed_serial = serial.Serial(timeout=0.5, dsrdtr=False) mbed_serial.dtr = False try: mbed_serial.port = retry_fun_call( diff --git a/TESTS/usb_device/serial/main.cpp b/TESTS/usb_device/serial/main.cpp index a356595003e..c6c804a1912 100644 --- a/TESTS/usb_device/serial/main.cpp +++ b/TESTS/usb_device/serial/main.cpp @@ -52,6 +52,24 @@ // This way the device has to correctly handle data bigger that its buffer. #define HOST_RX_BUFF_SIZE_RATIO 64 +// A DTR line is used to signal that the host has configured a terminal and +// is ready to transmit and receive data from the USB CDC/Serial device. +// When this test suite is run with the use of a Linux host, a workaround has +// to be used to overcome some platform specific DTR line behavior. +// Every time the serial port file descriptor is opened, the DTR line is +// asserted until the terminal attributes are set. +// As a consequence, the device receives a premature DTR signal with a +// duration of 200-500 us before the correct, long-lasting DTR signal set by +// the host-side test script. (tested on the Linux kernel 4.15.0) +// +// Online references: +// https://github.com/pyserial/pyserial/issues/124#issuecomment-227235402 +// +// The solution is to wait for the first DTR spike, ignore it, and wait for +// the correct DTR signal again. +#define LINUX_HOST_DTR_FIX 1 +#define LINUX_HOST_DTR_FIX_DELAY_MS 1 + #define CDC_LOOPBACK_REPS 1200 #define SERIAL_LOOPBACK_REPS 100 #define USB_RECONNECT_DELAY_MS 1 @@ -275,6 +293,10 @@ void test_cdc_usb_reconnect() greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, MSG_VALUE_DUMMY); // Wait for the host to open the port. +#if LINUX_HOST_DTR_FIX + usb_cdc.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif usb_cdc.wait_ready(); TEST_ASSERT_TRUE(usb_cdc.configured()); TEST_ASSERT_TRUE(usb_cdc.ready()); @@ -296,6 +318,10 @@ void test_cdc_usb_reconnect() greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, MSG_VALUE_DUMMY); // Wait for the host to open the port again. +#if LINUX_HOST_DTR_FIX + usb_cdc.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif usb_cdc.wait_ready(); TEST_ASSERT_TRUE(usb_cdc.configured()); TEST_ASSERT_TRUE(usb_cdc.ready()); @@ -317,6 +343,10 @@ void test_cdc_rx_single_bytes() TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); usb_cdc.connect(); greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, MSG_VALUE_DUMMY); +#if LINUX_HOST_DTR_FIX + usb_cdc.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif usb_cdc.wait_ready(); uint8_t buff = 0x01; for (int expected = 0xff; expected >= 0; expected--) { @@ -360,6 +390,10 @@ void test_cdc_rx_single_bytes_concurrent() TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); usb_cdc.connect(); greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, MSG_VALUE_DUMMY); +#if LINUX_HOST_DTR_FIX + usb_cdc.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif usb_cdc.wait_ready(); Thread tx_thread; event_flags.set(EF_SEND); @@ -393,6 +427,10 @@ void test_cdc_rx_multiple_bytes() TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); usb_cdc.connect(); greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, HOST_RX_BUFF_SIZE_RATIO); +#if LINUX_HOST_DTR_FIX + usb_cdc.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif usb_cdc.wait_ready(); uint8_t buff[RX_BUFF_SIZE] = { 0 }; uint8_t expected_buff[RX_BUFF_SIZE] = { 0 }; @@ -429,6 +467,10 @@ void test_cdc_rx_multiple_bytes_concurrent() TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); usb_cdc.connect(); greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, HOST_RX_BUFF_SIZE_RATIO); +#if LINUX_HOST_DTR_FIX + usb_cdc.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif usb_cdc.wait_ready(); Thread tx_thread; event_flags.set(EF_SEND); @@ -470,6 +512,10 @@ void test_cdc_loopback() TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); usb_cdc.connect(); greentea_send_kv(MSG_KEY_LOOPBACK, MSG_VALUE_DUMMY); +#if LINUX_HOST_DTR_FIX + usb_cdc.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif usb_cdc.wait_ready(); uint8_t rx_buff, tx_buff; for (int i = 0; i < CDC_LOOPBACK_REPS; i++) { @@ -511,6 +557,10 @@ void test_serial_usb_reconnect() greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, MSG_VALUE_DUMMY); // Wait for the host to open the port. +#if LINUX_HOST_DTR_FIX + usb_serial.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif while (!usb_serial.connected()) { wait_ms(1); } @@ -537,6 +587,10 @@ void test_serial_usb_reconnect() greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, MSG_VALUE_DUMMY); // Wait for the host to open the port again. +#if LINUX_HOST_DTR_FIX + usb_serial.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif while (!usb_serial.connected()) { wait_ms(1); } @@ -563,6 +617,10 @@ void test_serial_term_reopen() usb_serial.connect(); greentea_send_kv(MSG_KEY_PORT_OPEN_CLOSE, MSG_VALUE_DUMMY); // Wait for the host to open the terminal. +#if LINUX_HOST_DTR_FIX + usb_serial.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif while (!usb_serial.connected()) { wait_ms(1); } @@ -582,6 +640,10 @@ void test_serial_term_reopen() greentea_send_kv(MSG_KEY_PORT_OPEN_CLOSE, MSG_VALUE_DUMMY); // Wait for the host to open the terminal again. +#if LINUX_HOST_DTR_FIX + usb_serial.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif while (!usb_serial.connected()) { wait_ms(1); } @@ -613,9 +675,11 @@ void test_serial_getc() TestUSBSerial usb_serial(USB_SERIAL_VID, USB_SERIAL_PID, 1, usb_dev_sn); usb_serial.connect(); greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, MSG_VALUE_DUMMY); - while (!usb_serial.connected()) { - wait_ms(1); - } +#if LINUX_HOST_DTR_FIX + usb_serial.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif + usb_serial.wait_ready(); for (int expected = 0xff; expected >= 0; expected--) { TEST_ASSERT_EQUAL_INT(expected, usb_serial.getc()); } @@ -643,6 +707,10 @@ void test_serial_printf_scanf() TestUSBSerial usb_serial(USB_SERIAL_VID, USB_SERIAL_PID, 1, usb_dev_sn); usb_serial.connect(); greentea_send_kv(MSG_KEY_LOOPBACK, MSG_VALUE_DUMMY); +#if LINUX_HOST_DTR_FIX + usb_serial.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif usb_serial.wait_ready(); static const char fmt[] = "Formatted\nstring %i."; int tx_val, rx_val, rc; @@ -684,6 +752,10 @@ void test_serial_line_coding_change() TestUSBSerial usb_serial(USB_SERIAL_VID, USB_SERIAL_PID, 1, usb_dev_sn); usb_serial.connect(); greentea_send_kv(MSG_KEY_CHANGE_LINE_CODING, MSG_VALUE_DUMMY); +#if LINUX_HOST_DTR_FIX + usb_serial.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif usb_serial.wait_ready(); usb_serial.attach(line_coding_changed_cb); size_t num_line_codings = sizeof test_codings / sizeof test_codings[0]; From cbfb9ea37c2754cf0c8cea1aade03eb39bed15d1 Mon Sep 17 00:00:00 2001 From: bcostm Date: Tue, 30 Oct 2018 09:43:15 +0100 Subject: [PATCH 260/488] STM32F4 USB: add patch in CubeF4 hal driver --- .../TARGET_STM32F4/device/stm32f4xx_hal_pcd.c | 148 ++++++++++++-- .../TARGET_STM32F4/device/stm32f4xx_hal_pcd.h | 1 + .../TARGET_STM32F4/device/stm32f4xx_ll_usb.c | 180 +++++++++++++++++- .../TARGET_STM32F4/device/stm32f4xx_ll_usb.h | 3 + 4 files changed, 307 insertions(+), 25 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.c b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.c index a6ed3193fe8..7e14649c3cd 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.c +++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.c @@ -106,6 +106,7 @@ * @{ */ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t epnum); +static HAL_StatusTypeDef PCD_ReadRxFifo(PCD_HandleTypeDef *hpcd); // MBED PATCH /** * @} */ @@ -394,6 +395,13 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) } } + // MBED PATCH + if (( epint & USB_OTG_DOEPINT_EPDISD) == USB_OTG_DOEPINT_EPDISD) + { + CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_EPDISD); + } + // MBED PATCH + if(( epint & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP) { /* Inform the upper layer that a setup packet is available */ @@ -667,27 +675,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) /* Handle RxQLevel Interrupt */ if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) { - USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); - - temp = USBx->GRXSTSP; - - ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM]; - - if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_DATA_UPDT) - { - if((temp & USB_OTG_GRXSTSP_BCNT) != 0U) - { - USB_ReadPacket(USBx, ep->xfer_buff, (temp & USB_OTG_GRXSTSP_BCNT) >> 4U); - ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; - ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; - } - } - else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_SETUP_UPDT) - { - USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U); - ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; - } - USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); + PCD_ReadRxFifo(hpcd); // MBED PATCH } /* Handle SOF Interrupt */ @@ -1131,6 +1119,86 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, return HAL_OK; } +// MBED PATCH +/** + * @brief Abort a transaction. + * @param hpcd: PCD handle + * @param ep_addr: endpoint address + * @retval HAL status + */ +HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) +{ + USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; + HAL_StatusTypeDef ret = HAL_OK; + USB_OTG_EPTypeDef *ep; + + if ((0x80 & ep_addr) == 0x80) + { + ep = &hpcd->IN_ep[ep_addr & 0x7F]; + } + else + { + ep = &hpcd->OUT_ep[ep_addr]; + } + + __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); + + ep->num = ep_addr & 0x7F; + ep->is_in = ((ep_addr & 0x80) == 0x80); + + USB_EPSetNak(hpcd->Instance, ep); + + if ((0x80 & ep_addr) == 0x80) + { + ret = USB_EPStopXfer(hpcd->Instance , ep); + if (ret == HAL_OK) + { + ret = USB_FlushTxFifo(hpcd->Instance, ep_addr & 0x7F); + } + } + else + { + /* Set global NAK */ + USBx_DEVICE->DCTL |= USB_OTG_DCTL_SGONAK; + + /* Read all entries from the fifo so global NAK takes effect */ + while (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) + { + PCD_ReadRxFifo(hpcd); + } + + /* Stop the transfer */ + ret = USB_EPStopXfer(hpcd->Instance , ep); + if (ret == HAL_BUSY) + { + /* If USB_EPStopXfer returns HAL_BUSY then a setup packet + * arrived after the rx fifo was processed but before USB_EPStopXfer + * was called. Process the rx fifo one more time to read the + * setup packet. + * + * Note - after the setup packet has been received no further + * packets will be received over USB. This is because the next + * phase (data or status) of the control transfer started by + * the setup packet will be naked until global nak is cleared. + */ + while (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) + { + PCD_ReadRxFifo(hpcd); + } + + ret = USB_EPStopXfer(hpcd->Instance , ep); + } + + /* Clear global nak */ + USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGONAK; + } + + __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); + + return ret; +} +// MBED PATCH + /** * @brief Set a STALL condition over an endpoint. * @param hpcd PCD handle @@ -1356,6 +1424,44 @@ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t return HAL_OK; } +// MBED PATCH +/** + * @brief Process the next RX fifo entry + * @param hpcd: PCD handle + * @retval HAL status + */ +static HAL_StatusTypeDef PCD_ReadRxFifo(PCD_HandleTypeDef *hpcd) +{ + USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; + USB_OTG_EPTypeDef *ep; + uint32_t temp = 0; + + USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); + + temp = USBx->GRXSTSP; + + ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM]; + + if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_DATA_UPDT) + { + if((temp & USB_OTG_GRXSTSP_BCNT) != 0U) + { + USB_ReadPacket(USBx, ep->xfer_buff, (temp & USB_OTG_GRXSTSP_BCNT) >> 4U); + ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; + ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; + } + } + else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_SETUP_UPDT) + { + USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U); + ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; + } + USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); + + return HAL_OK; +} +// MBED PATCH + /** * @} */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.h b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.h index d5b8e1605b8..eeeaccf93d3 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.h +++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.h @@ -300,6 +300,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); +HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); // MBED PATCH uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.c b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.c index c114307b947..b610d025535 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.c +++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.c @@ -450,7 +450,8 @@ HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTy if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0U) { - USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U) |\ + // MBED PATCH + USBx_INEP(ep->num)->DIEPCTL = ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U) |\ ((ep->num) << 22U) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP)); } } @@ -460,7 +461,8 @@ HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTy if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0U) { - USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U) |\ + // MBED PATCH + USBx_OUTEP(ep->num)->DOEPCTL = ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U) |\ (USB_OTG_DIEPCTL_SD0PID_SEVNFRM)| (USB_OTG_DOEPCTL_USBAEP)); } } @@ -481,7 +483,8 @@ HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB { if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0U) { - USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U) |\ + // MBED PATCH + USBx_INEP(ep->num)->DIEPCTL = ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U) |\ ((ep->num) << 22U) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP)); } @@ -495,7 +498,8 @@ HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB { if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0U) { - USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U) |\ + // MBED PATCH + USBx_OUTEP(ep->num)->DOEPCTL = ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U) |\ ((ep->num) << 22U) | (USB_OTG_DOEPCTL_USBAEP)); debug = (uint32_t)(((uint32_t )USBx) + USB_OTG_OUT_ENDPOINT_BASE + (0U)*USB_OTG_EP_REG_SIZE); @@ -865,6 +869,174 @@ HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeD return HAL_OK; } +// MBED PATCH +/** + * @brief USB_EPStoptXfer : stop transfer on this endpoint + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @retval HAL status + * @note IN endpoints must have NAK enabled before calling this function + * @note OUT endpoints must have global out NAK enabled before calling this + * function. Furthermore, the RX fifo must be empty or the status + * HAL_BUSY will be returned. + */ +HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep) +{ + HAL_StatusTypeDef ret = HAL_OK; + uint32_t count = 0U; + uint32_t epint, fifoemptymsk; + + /* IN endpoint */ + if (ep->is_in == 1U) + { + + /* EP enable, IN data in FIFO */ + if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) + { + /* Disable this endpoint */ + USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_EPDIS; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_INEP(ep->num)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA); + } + + /* Clear transfer complete interrupt */ + epint = USB_ReadDevInEPInterrupt(USBx, ep->num); + if((epint & USB_OTG_DIEPINT_XFRC) == USB_OTG_DIEPINT_XFRC) + { + CLEAR_IN_EP_INTR(ep->num, USB_OTG_DIEPINT_XFRC); + } + + /* Mask fifo empty interrupt */ + fifoemptymsk = 0x1U << ep->num; + atomic_clr_u32(&USBx_DEVICE->DIEPEMPMSK, fifoemptymsk); + } + else /* OUT endpoint */ + { + if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) + { + /* Disable this endpoint */ + USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_EPDIS; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + if ((USBx->GINTSTS & USB_OTG_GINTSTS_RXFLVL) == USB_OTG_GINTSTS_RXFLVL) + { + /* Although not mentioned in the Reference Manual, it appears that the + * rx fifo must be empty for an OUT endpoint to be disabled. Typically + * this will happen when setting the global OUT nak (required by Reference + * Manual) as this requires processing the rx fifo. This is not guaranteed + * though, as a setup packet can arrive even while global OUT nak is set. + * + * During testing this event was observed and prevented endpoint disabling + * from completing until the rx fifo was empty. To address this problem + * return HAL_BUSY if the rx fifo is not empty to give higher level code + * a chance to clear the fifo and retry the operation. + * + */ + return HAL_BUSY; + } + } + while ((USBx_OUTEP(ep->num)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA); + } + + /* Clear interrupt */ + epint = USB_ReadDevOutEPInterrupt(USBx, ep->num); + if(( epint & USB_OTG_DOEPINT_XFRC) == USB_OTG_DOEPINT_XFRC) + { + CLEAR_OUT_EP_INTR(ep->num, USB_OTG_DOEPINT_XFRC); + } + } + return ret; +} + +/** + * @brief USB_EPSetNak : stop transfer and nak all tokens on this endpoint + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @retval HAL status + */ +HAL_StatusTypeDef USB_EPSetNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep) +{ + uint32_t count = 0; + if (ep->is_in == 1U) + { + USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_INEP(ep->num)->DIEPCTL & USB_OTG_DIEPCTL_NAKSTS) != USB_OTG_DIEPCTL_NAKSTS); + } + else + { + USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_OUTEP(ep->num)->DOEPCTL & USB_OTG_DOEPCTL_NAKSTS) != USB_OTG_DOEPCTL_NAKSTS); + } + return HAL_OK; +} + +/** + * @brief USB_EPSetNak : resume transfer and stop naking on this endpoint + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @retval HAL status + */ +HAL_StatusTypeDef USB_EPClearNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep) +{ + uint32_t count = 0; + if (ep->is_in == 1U) + { + USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_CNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_INEP(ep->num)->DIEPCTL & USB_OTG_DIEPCTL_NAKSTS) == USB_OTG_DIEPCTL_NAKSTS); + } + else + { + USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_OUTEP(ep->num)->DOEPCTL & USB_OTG_DOEPCTL_NAKSTS) == USB_OTG_DOEPCTL_NAKSTS); + } + return HAL_OK; +} +// MBED PATCH + /** * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated * with the EP/channel diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.h b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.h index 1048bee537b..34de08cc1af 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.h +++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.h @@ -416,6 +416,9 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EP HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); +HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); // MBED PATCH +HAL_StatusTypeDef USB_EPSetNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); // MBED PATCH +HAL_StatusTypeDef USB_EPClearNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); // MBED PATCH HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma); void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len); From 0fccce3d862f0b4e5b1cfbadd9a35000da9d0e89 Mon Sep 17 00:00:00 2001 From: bcostm Date: Tue, 30 Oct 2018 09:44:17 +0100 Subject: [PATCH 261/488] STM32F4 USB: remove useless macro --- usb/device/targets/TARGET_STM/USBPhy_STM32.cpp | 5 ----- 1 file changed, 5 deletions(-) diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 9f1c78d5419..c37720fb96f 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -24,11 +24,6 @@ #define USBSTM_HAL_UNSUPPORTED #endif -/* STM32F4 family without USB_STM_HAL use another HAL */ -#if defined(TARGET_STM) && defined(TARGET_STM32F4) && !defined(USB_STM_HAL) -#define USBSTM_HAL_UNSUPPORTED -#endif - #ifndef USBSTM_HAL_UNSUPPORTED #include "USBPhyHw.h" #include "pinmap.h" From 8517deedcf827dd71b0bda36d19aa42ceb8688cd Mon Sep 17 00:00:00 2001 From: bcostm Date: Tue, 30 Oct 2018 09:45:13 +0100 Subject: [PATCH 262/488] STM32F4 USB: enable USB Device in targets.json tests-usb_device-basic are OK on the following platforms: NUCLEO_F412ZG NUCLEO_F413ZH NUCLEO_F429ZI NUCLEO_F446ZE DISCO_F413ZH DISCO_F469NI --- targets/targets.json | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/targets/targets.json b/targets/targets.json index 476f4ebb742..ff5d38ac702 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -2392,7 +2392,8 @@ "SERIAL_FC", "TRNG", "FLASH", - "MPU" + "MPU", + "USBDEVICE" ], "release_versions": ["2", "5"], "device_name": "STM32F412ZG", @@ -2518,7 +2519,8 @@ "TRNG", "FLASH", "QSPI", - "MPU" + "MPU", + "USBDEVICE" ], "bootloader_supported": true, "release_versions": ["2", "5"], @@ -2555,7 +2557,8 @@ "SERIAL_FC", "TRNG", "FLASH", - "MPU" + "MPU", + "USBDEVICE" ], "bootloader_supported": true, "release_versions": ["2", "5"], @@ -2607,7 +2610,8 @@ "SERIAL_FC", "TRNG", "FLASH", - "MPU" + "MPU", + "USBDEVICE" ], "detect_code": ["0796"], "release_versions": ["2", "5"], @@ -2709,7 +2713,8 @@ "SERIAL_ASYNCH", "SERIAL_FC", "FLASH", - "MPU" + "MPU", + "USBDEVICE" ], "release_versions": ["2", "5"], "device_name": "STM32F446ZE" @@ -3498,7 +3503,8 @@ "TRNG", "FLASH", "QSPI", - "MPU" + "MPU", + "USBDEVICE" ], "release_versions": ["2", "5"], "device_name": "STM32F469NI" From 1e81d215301e727a6158e7eb3946279a91b219f1 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Wed, 5 Dec 2018 15:49:09 -0500 Subject: [PATCH 263/488] Non-working custom feeder. Modified nordic driver to disable automatic EP0STATUS task triggering at end of DMA transfer --- .../drivers_nrf/usbd/nrf_drv_usbd.c | 16 ++- .../TARGET_MCU_NRF52840/USBPhyHw.h | 23 ++++ .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 120 ++++++++++++------ 3 files changed, 110 insertions(+), 49 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c index 85190c8ff57..db316672b75 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c @@ -1357,13 +1357,15 @@ static void usbd_dmareq_process(void) if (!continue_transfer) { p_state->handler.feeder = NULL; - if (ep == NRF_DRV_USBD_EPIN0) - { - /** Configure short right now - now if the last data is transferred, - * when host tries another data transfer, the endpoint will stall. */ - NRF_LOG_DEBUG("USB DMA process: Enable status short"); - nrf_usbd_shorts_enable(NRF_USBD_SHORT_EP0DATADONE_EP0STATUS_MASK); - } + // Mbed modification, the USBPhy_Nordic layer takes care of + // triggering the EP0STATUS task +// if (ep == NRF_DRV_USBD_EPIN0) +// { +// /** Configure short right now - now if the last data is transferred, +// * when host tries another data transfer, the endpoint will stall. */ +// NRF_LOG_DEBUG("USB DMA process: Enable status short"); +// nrf_usbd_shorts_enable(NRF_USBD_SHORT_EP0DATADONE_EP0STATUS_MASK); +// } } } else diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h index 75e5ea6f338..cbaf0b068e0 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h @@ -26,6 +26,16 @@ extern "C" { } class USBPhyHw : public USBPhy { + +public: + + // Keep track of setup transaction stages + typedef enum transaction_state_t { + SetupStage, + DataStage, + StatusStage + } transaction_state_t; + public: USBPhyHw(); virtual ~USBPhyHw(); @@ -64,6 +74,10 @@ class USBPhyHw : public USBPhy { static void _usb_event_handler(nrf_drv_usbd_evt_t const * const p_event); static void _usb_power_event_handler(nrf_drv_power_usb_evt_t event); + bool setup_feeder(nrf_drv_usbd_ep_transfer_t * p_next, + void * p_context, + size_t ep_size); + private: USBPhyEvents *events; @@ -88,6 +102,15 @@ class USBPhyHw : public USBPhy { // Buffer to hold setup packet nrf_drv_usbd_setup_t setup_buf; + // State of the setup transaction + transaction_state_t setup_state; + + // Setup bytes remaining + uint32_t setup_remaining; + + // EP0 IN feeder + nrf_drv_usbd_handler_desc_t ep0_in_handler; + // Nordic transfer structures for each in/out endpoint nrf_drv_usbd_transfer_t transfer_buf[18]; diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index 0d3816e9bd6..45a07fcd6a7 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -27,7 +27,7 @@ #define IS_OUT_EP(ep) (ep & ~0x80) // Checks if the given endpoint is an OUT endpoint (MSB clear) // Debugging flag for tracking USB events -#define USBD_DEBUG 1 +#define USBD_DEBUG 0 // Nordic USBD driver IRQ handler extern "C" void USBD_IRQHandler(void); @@ -36,6 +36,7 @@ static USBPhyHw *instance = 0; static void usbd_event_handler(nrf_drv_usbd_evt_t const * const p_event); static void power_usb_event_handler(nrf_drv_power_usb_evt_t event); +bool mbed_nrf_feeder_ep0(nrf_drv_usbd_ep_transfer_t * p_next, void * p_context, size_t ep_size); #if USBD_DEBUG @@ -233,16 +234,42 @@ uint32_t USBPhyHw::ep0_read_result() { } void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) { - nrf_drv_usbd_transfer_t* transfer = get_transfer_buffer((usb_ep_t)(NRF_DRV_USBD_EPIN0)); - memset(transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); - transfer->p_data.tx = buffer; - transfer->size = size; - nrf_drv_usbd_ep_transfer(NRF_DRV_USBD_EPIN0, transfer); + + // First transaction chunk, transition to data stage + if(setup_state == USBPhyHw::SetupStage) + { + setup_state = USBPhyHw::DataStage; + + // Give the feeder function information to pass on thru DMA + setup_remaining = setup_buf.wLength; + nrf_drv_usbd_transfer_t* transfer = get_transfer_buffer((usb_ep_t)(NRF_DRV_USBD_EPIN0)); + memset(transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); + transfer->p_data.tx = buffer; + transfer->size = size; + + // Setup the handler + ep0_in_handler.handler.feeder = mbed_nrf_feeder_ep0; + ep0_in_handler.p_context = NULL; + + // Initiate the transfer + nrf_drv_usbd_ep_handled_transfer(NRF_DRV_USBD_EPIN0, + &ep0_in_handler); + } + else if(setup_state == USBPhyHw::DataStage) + { + // Just subtract from the remaining and setup the transfer + //setup_remaining -= size; + nrf_drv_usbd_transfer_t* transfer = get_transfer_buffer((usb_ep_t)(NRF_DRV_USBD_EPIN0)); + memset(transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); + transfer->p_data.tx = buffer; + transfer->size = size; + } } void USBPhyHw::ep0_stall() { // Note: This stall must be automatically cleared by the next setup packet - // TODO: Check if this is actually happening + // Hardware appears to take care of this + // See nRF52840 product specification section 6.35.8 nrf_drv_usbd_setup_stall(); } @@ -284,6 +311,12 @@ bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) { memset(transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); transfer->p_data.tx = data; transfer->size = size; + + // If this is a zero-length-packet (ZLP) + // Set the ZLP flag + if(size == 0) + transfer->flags |= NRF_DRV_USBD_TRANSFER_ZLP_FLAG; + ret_code_t ret = nrf_drv_usbd_ep_transfer(get_nordic_endpoint(endpoint), transfer); return (ret == NRF_SUCCESS); } @@ -298,7 +331,7 @@ void USBPhyHw::process() { return; else if (usb_event_type == USB_HW_EVENT_USBD) { -#ifdef USBD_DEBUG +#if USBD_DEBUG // Save this event to the static log memcpy(&debug_events[debug_evt_index++], &usb_event, sizeof(nrf_drv_usbd_evt_t)); // Reset index if we overflow the buffer @@ -353,15 +386,13 @@ void USBPhyHw::process() { } break; case NRF_DRV_USBD_EVT_SETUP: { - - // Clear endpoint 0 stalls on setup packet receive - if(nrf_drv_usbd_ep_stall_check(NRF_DRV_USBD_EPOUT0)) - nrf_drv_usbd_ep_stall_clear(NRF_DRV_USBD_EPOUT0); - if(nrf_drv_usbd_ep_stall_check(NRF_DRV_USBD_EPIN0)) - nrf_drv_usbd_ep_stall_clear(NRF_DRV_USBD_EPIN0); - // Copy the setup packet into the internal buffer nrf_drv_usbd_setup_get(&setup_buf); + + // Prepare the transfer context for the data stage + setup_state = USBPhyHw::SetupStage; + + // Notify the Mbed stack events->ep0_setup(); } break; @@ -459,6 +490,22 @@ void USBPhyHw::disable_usb_interrupts(void) { NRF_POWER_INT_USBPWRRDY_MASK); } +bool USBPhyHw::setup_feeder(nrf_drv_usbd_ep_transfer_t* p_next, void* p_context, size_t ep_size) +{ + // Set up the next DMA transfer + nrf_drv_usbd_transfer_t* transfer = get_transfer_buffer((usb_ep_t)(NRF_DRV_USBD_EPIN0)); + p_next->p_data.tx = transfer->p_data.tx; + p_next->size = transfer->size; + + setup_remaining -= p_next->size; + + // Check if transfer should continue after this, false if: + // 1: the remaining bytes will be 0 + // OR 2: the transfer size is < ep max size (including 0) + return !((setup_remaining == 0) || + (p_next->size < ep_size)); +} + static void power_usb_event_handler(nrf_drv_power_usb_evt_t event) { if(instance) { // Pass the event on to the USBPhyHW instance @@ -474,31 +521,20 @@ static void usbd_event_handler(nrf_drv_usbd_evt_t const * const p_event) { } } -extern "C" { - - /** - * @brief Feeder passing data between mbed and nordic USB stacks - * - * @param[out] p_next See @ref nrf_drv_usbd_feeder_t documentation. - * @param[in,out] p_context See @ref nrf_drv_usbd_feeder_t documentation. - * @param[in] ep_size See @ref nrf_drv_usbd_feeder_t documentation. - * - * @retval true Continue transfer. - * @retval false This was the last transfer. - */ - bool mbed_nrf_feeder(nrf_drv_usbd_ep_transfer_t * p_next, - void * p_context, - size_t ep_size) - { - - - // We don't know if this is the last transfer or not at this level -- mbed doesn't tell us... - // So just tell the nordic layer that the transfer isn't over yet (so don't NAK/STALL) - return true; - } - +/** + * @brief Feeder passing data between mbed and nordic USB stacks + * + * @param[out] p_next See @ref nrf_drv_usbd_feeder_t documentation. + * @param[in,out] p_context See @ref nrf_drv_usbd_feeder_t documentation. + * @param[in] ep_size See @ref nrf_drv_usbd_feeder_t documentation. + * + * @retval true Continue transfer. + * @retval false This was the last transfer. + */ +bool mbed_nrf_feeder_ep0(nrf_drv_usbd_ep_transfer_t * p_next, + void * p_context, + size_t ep_size) +{ + MBED_ASSERT(instance != NULL); + return instance->setup_feeder(p_next, p_context, ep_size); } - -//extern "C" { -//void USBD_IRQHandler_v(void) { } -//} From f6bf31a2cd9a8b52735dfeb077b36af8f1f04401 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Wed, 5 Dec 2018 20:59:28 -0500 Subject: [PATCH 264/488] Added in triggers to synchronize control transfer stages with what the hardware expects. First working example! --- .../TARGET_MCU_NRF52840/USBPhyHw.h | 19 ---- .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 101 +++++++----------- 2 files changed, 38 insertions(+), 82 deletions(-) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h index cbaf0b068e0..c9e58e95919 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h @@ -27,15 +27,6 @@ extern "C" { class USBPhyHw : public USBPhy { -public: - - // Keep track of setup transaction stages - typedef enum transaction_state_t { - SetupStage, - DataStage, - StatusStage - } transaction_state_t; - public: USBPhyHw(); virtual ~USBPhyHw(); @@ -74,10 +65,6 @@ class USBPhyHw : public USBPhy { static void _usb_event_handler(nrf_drv_usbd_evt_t const * const p_event); static void _usb_power_event_handler(nrf_drv_power_usb_evt_t event); - bool setup_feeder(nrf_drv_usbd_ep_transfer_t * p_next, - void * p_context, - size_t ep_size); - private: USBPhyEvents *events; @@ -102,15 +89,9 @@ class USBPhyHw : public USBPhy { // Buffer to hold setup packet nrf_drv_usbd_setup_t setup_buf; - // State of the setup transaction - transaction_state_t setup_state; - // Setup bytes remaining uint32_t setup_remaining; - // EP0 IN feeder - nrf_drv_usbd_handler_desc_t ep0_in_handler; - // Nordic transfer structures for each in/out endpoint nrf_drv_usbd_transfer_t transfer_buf[18]; diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index 45a07fcd6a7..ad8cdd31b4c 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -26,6 +26,11 @@ #define IS_IN_EP(ep) (ep & 0x80) // Checks if the given endpoint is an IN endpoint (MSB set) #define IS_OUT_EP(ep) (ep & ~0x80) // Checks if the given endpoint is an OUT endpoint (MSB clear) +// If this bit is set in setup.bmRequestType, the setup transfer +// is DEVICE->HOST (IN transfer) +// if it is clear, the transfer is HOST->DEVICE (OUT transfer) +#define SETUP_TRANSFER_DIR_MASK 0x80 + // Debugging flag for tracking USB events #define USBD_DEBUG 0 @@ -235,35 +240,30 @@ uint32_t USBPhyHw::ep0_read_result() { void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) { - // First transaction chunk, transition to data stage - if(setup_state == USBPhyHw::SetupStage) - { - setup_state = USBPhyHw::DataStage; - - // Give the feeder function information to pass on thru DMA - setup_remaining = setup_buf.wLength; - nrf_drv_usbd_transfer_t* transfer = get_transfer_buffer((usb_ep_t)(NRF_DRV_USBD_EPIN0)); - memset(transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); - transfer->p_data.tx = buffer; - transfer->size = size; - - // Setup the handler - ep0_in_handler.handler.feeder = mbed_nrf_feeder_ep0; - ep0_in_handler.p_context = NULL; - - // Initiate the transfer - nrf_drv_usbd_ep_handled_transfer(NRF_DRV_USBD_EPIN0, - &ep0_in_handler); - } - else if(setup_state == USBPhyHw::DataStage) + nrf_drv_usbd_transfer_t* transfer = get_transfer_buffer(NRF_DRV_USBD_EPIN0); + memset(transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); + transfer->p_data.tx = buffer; + transfer->size = size; + + // If this is a zero-length-packet (ZLP) + // Set the ZLP flag + if(size == 0) + transfer->flags |= NRF_DRV_USBD_TRANSFER_ZLP_FLAG; + + // Update the number of bytes remaining in the setup data stage + setup_remaining -= size; + + // Check if this is the last chunk, conditions: + // 1: the remaining bytes will be 0 + // OR 2: the transfer size is < ep max size (including 0, short packet) + size_t ep_size = nrf_drv_usbd_ep_max_packet_size_get(NRF_DRV_USBD_EPIN0); + if((setup_remaining == 0) || (size < ep_size)) { - // Just subtract from the remaining and setup the transfer - //setup_remaining -= size; - nrf_drv_usbd_transfer_t* transfer = get_transfer_buffer((usb_ep_t)(NRF_DRV_USBD_EPIN0)); - memset(transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); - transfer->p_data.tx = buffer; - transfer->size = size; + // Enter status stage after next DMA transfer completes + nrf_usbd_shorts_enable(NRF_USBD_SHORT_EP0DATADONE_EP0STATUS_MASK); } + + nrf_drv_usbd_ep_transfer(NRF_DRV_USBD_EPIN0, transfer); } void USBPhyHw::ep0_stall() { @@ -389,8 +389,17 @@ void USBPhyHw::process() { // Copy the setup packet into the internal buffer nrf_drv_usbd_setup_get(&setup_buf); - // Prepare the transfer context for the data stage - setup_state = USBPhyHw::SetupStage; + // Reset the remaining setup data length + setup_remaining = setup_buf.wLength; + + // Skip data stage, go straight to status stage + if(setup_buf.wLength == 0) { + nrf_drv_usbd_setup_clear(); + } + else if((setup_buf.bmRequestType & SETUP_TRANSFER_DIR_MASK) == 0) { + // HOST->DEVICE transfer, need to notify hardware of Data OUT stage + nrf_usbd_task_trigger(NRF_USBD_TASK_EP0RCVOUT); + } // Notify the Mbed stack events->ep0_setup(); @@ -490,22 +499,6 @@ void USBPhyHw::disable_usb_interrupts(void) { NRF_POWER_INT_USBPWRRDY_MASK); } -bool USBPhyHw::setup_feeder(nrf_drv_usbd_ep_transfer_t* p_next, void* p_context, size_t ep_size) -{ - // Set up the next DMA transfer - nrf_drv_usbd_transfer_t* transfer = get_transfer_buffer((usb_ep_t)(NRF_DRV_USBD_EPIN0)); - p_next->p_data.tx = transfer->p_data.tx; - p_next->size = transfer->size; - - setup_remaining -= p_next->size; - - // Check if transfer should continue after this, false if: - // 1: the remaining bytes will be 0 - // OR 2: the transfer size is < ep max size (including 0) - return !((setup_remaining == 0) || - (p_next->size < ep_size)); -} - static void power_usb_event_handler(nrf_drv_power_usb_evt_t event) { if(instance) { // Pass the event on to the USBPhyHW instance @@ -520,21 +513,3 @@ static void usbd_event_handler(nrf_drv_usbd_evt_t const * const p_event) { instance->_usb_event_handler(p_event); } } - -/** - * @brief Feeder passing data between mbed and nordic USB stacks - * - * @param[out] p_next See @ref nrf_drv_usbd_feeder_t documentation. - * @param[in,out] p_context See @ref nrf_drv_usbd_feeder_t documentation. - * @param[in] ep_size See @ref nrf_drv_usbd_feeder_t documentation. - * - * @retval true Continue transfer. - * @retval false This was the last transfer. - */ -bool mbed_nrf_feeder_ep0(nrf_drv_usbd_ep_transfer_t * p_next, - void * p_context, - size_t ep_size) -{ - MBED_ASSERT(instance != NULL); - return instance->setup_feeder(p_next, p_context, ep_size); -} From b86c1926a9feb5f32cfd8afd980b1214e7c669dd Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Sat, 22 Dec 2018 20:52:49 -0500 Subject: [PATCH 265/488] Added EP0 stalls to setup event handler --- targets/targets.json | 2 +- .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 26 +++++++++++++++---- 2 files changed, 22 insertions(+), 6 deletions(-) diff --git a/targets/targets.json b/targets/targets.json index 2a40d51de09..09b4ed11185 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -3439,7 +3439,7 @@ }, "macros_add": ["USB_STM_HAL"], "overrides": { "lse_available": 0 }, - "device_has_add": ["ANALOGOUT", "TRNG", "FLASH", "MPU"], + "device_has_add": ["ANALOGOUT", "TRNG", "FLASH", "MPU", "USBDEVICE"], "release_versions": ["2", "5"], "device_name": "STM32F407VG" }, diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index ad8cdd31b4c..666a15df059 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -231,6 +231,16 @@ void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) { memset(transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); transfer->p_data.rx = data; transfer->size = size; + + // Update the number of bytes remaining in the setup data stage + setup_remaining -= size; + + nrf_drv_usbd_setup_data_clear(); // tell the hardware to receive another OUT packet + + // Check if this is the last chunk + if(setup_remaining == 0) + nrf_usbd_shorts_enable(NRF_USBD_SHORT_EP0DATADONE_EP0STATUS_MASK); // if it is, go to status stage next + nrf_drv_usbd_ep_transfer(NRF_DRV_USBD_EPOUT0, transfer); } @@ -270,6 +280,9 @@ void USBPhyHw::ep0_stall() { // Note: This stall must be automatically cleared by the next setup packet // Hardware appears to take care of this // See nRF52840 product specification section 6.35.8 + + // Update: Above assumption seems incorrect + // Added in EP0 stall clears in the setup packet event handler nrf_drv_usbd_setup_stall(); } @@ -373,10 +386,10 @@ void USBPhyHw::process() { { /* NOTE: Data values or size may be tested here to decide if clear or stall. * If errata 154 is present the data transfer is acknowledged by the hardware. */ - if (!nrf_drv_usbd_errata_154()) { - /* Transfer ok - allow status stage */ - nrf_drv_usbd_setup_clear(); - } +// if (!nrf_drv_usbd_errata_154()) { +// /* Transfer ok - allow status stage */ +// nrf_drv_usbd_setup_clear(); +// } events->ep0_out(); } @@ -386,6 +399,9 @@ void USBPhyHw::process() { } break; case NRF_DRV_USBD_EVT_SETUP: { + nrf_drv_usbd_ep_stall_clear(NRF_DRV_USBD_EPIN0); + nrf_drv_usbd_ep_stall_clear(NRF_DRV_USBD_EPOUT0); + // Copy the setup packet into the internal buffer nrf_drv_usbd_setup_get(&setup_buf); @@ -398,7 +414,7 @@ void USBPhyHw::process() { } else if((setup_buf.bmRequestType & SETUP_TRANSFER_DIR_MASK) == 0) { // HOST->DEVICE transfer, need to notify hardware of Data OUT stage - nrf_usbd_task_trigger(NRF_USBD_TASK_EP0RCVOUT); + nrf_drv_usbd_setup_data_clear(); } // Notify the Mbed stack From ceb2bc064ee74e1345fc090b426293705419f423 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Wed, 26 Dec 2018 19:15:28 -0500 Subject: [PATCH 266/488] Removed disable from disconnect to see if it affects the success of the soft reset test. --- .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 31 ++++++++++++++----- 1 file changed, 24 insertions(+), 7 deletions(-) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index 666a15df059..10313bcc245 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -139,6 +139,10 @@ void USBPhyHw::connect() { // when the internal regulator has settled if(!nrf_drv_usbd_is_enabled()) nrf_drv_usbd_enable(); + + if(nrf_drv_power_usbstatus_get() == NRF_DRV_POWER_USB_STATE_READY + && !nrf_drv_usbd_is_started()) + nrf_drv_usbd_start(false);//nrf_drv_usbd_start(true); } } @@ -148,8 +152,8 @@ void USBPhyHw::disconnect() { if(nrf_drv_usbd_is_started()) nrf_drv_usbd_stop(); - if(nrf_drv_usbd_is_enabled()) - nrf_drv_usbd_disable(); +// if(nrf_drv_usbd_is_enabled()) +// nrf_drv_usbd_disable(); } void USBPhyHw::configure() { @@ -232,7 +236,16 @@ void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) { transfer->p_data.rx = data; transfer->size = size; - // Update the number of bytes remaining in the setup data stage +// if((setup_total == 1) && ((setup_buf.bmRequestType & SETUP_TRANSFER_DIR_MASK) == 0)) +// { +// setup_remaining -= size; +// } +// else +// { +// // Update the number of bytes remaining in the setup data stage +// setup_remaining -= size; +// } + setup_remaining -= size; nrf_drv_usbd_setup_data_clear(); // tell the hardware to receive another OUT packet @@ -412,10 +425,10 @@ void USBPhyHw::process() { if(setup_buf.wLength == 0) { nrf_drv_usbd_setup_clear(); } - else if((setup_buf.bmRequestType & SETUP_TRANSFER_DIR_MASK) == 0) { - // HOST->DEVICE transfer, need to notify hardware of Data OUT stage - nrf_drv_usbd_setup_data_clear(); - } +// else if((setup_buf.bmRequestType & SETUP_TRANSFER_DIR_MASK) == 0) { +// // HOST->DEVICE transfer, need to notify hardware of Data OUT stage +// nrf_drv_usbd_setup_data_clear(); +// } // Notify the Mbed stack events->ep0_setup(); @@ -496,6 +509,10 @@ void USBPhyHw::_reset(void) // Disable all endpoints except for control endpoints nrf_drv_usbd_ep_default_config(); + nrf_drv_usbd_setup_clear(); + + usb_event_type = USB_HW_EVENT_NONE; + // TODO - Clear all endpoint interrupts? } From 6405d8ff11520d71e43baf493539bff22ac1f392 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Wed, 9 Jan 2019 23:29:35 -0500 Subject: [PATCH 267/488] Reviewing functions. Added critical sections to some functions that access state information. --- .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 70 ++++++++++++++----- 1 file changed, 52 insertions(+), 18 deletions(-) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index 10313bcc245..13f46aa6940 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -16,8 +16,31 @@ #include "USBPhyHw.h" +#include "platform/mbed_critical.h" + #include "nrf_clock.h" +/* + * TODO list for nRF52840 USBD driver + * + * 1.) Properly enable/disable start-of-frame interrupt. + * + * Description: Currently, start-of-frame interrupts are masked by a flag at this layer + * but still cause the processor to be interrupted for no purpose. + * + * The Nordic driver requires you to call nrf_drv_start(bool) + * with a boolean flag indicating whether it should enable start-of-frame + * interrupts or not. From the datasheet it seems to be possible to + * enable/disable SoF interrupts on the fly, but the fact that they + * force you to make the SoF decision during "start" makes me suspicious + * the underlying driver may manage/use the SoF flag in other ways. + * + * Next steps: Investigate how the SoF flag is used during "nrf_drv_start" and + * determine if enabling/disabling this interrupt would cause internal problems + * with the Nordic USBD driver + * + * + */ #define MAX_PACKET_SIZE_SETUP NRF_DRV_USBD_EPSIZE #define MAX_PACKET_NON_ISO NRF_DRV_USBD_EPSIZE #define MAX_PACKET_ISO NRF_DRV_USBD_ISOSIZE @@ -79,11 +102,6 @@ void USBPhyHw::init(USBPhyEvents *events) { ret = nrf_drv_power_init(NULL); APP_ERROR_CHECK(ret); - /* Configure selected size of the packed on EP0 */ - nrf_drv_usbd_ep_max_packet_size_set(NRF_DRV_USBD_EPOUT0, MAX_PACKET_SIZE_SETUP); - nrf_drv_usbd_ep_max_packet_size_set(NRF_DRV_USBD_EPIN0, MAX_PACKET_SIZE_SETUP); - - // Register callback for USB Power events static const nrf_drv_power_usbevt_config_t config = { .handler = power_usb_event_handler }; @@ -94,13 +112,17 @@ void USBPhyHw::init(USBPhyEvents *events) { ret = nrf_drv_usbd_init(usbd_event_handler); APP_ERROR_CHECK(ret); + /* Configure selected size of the packed on EP0 */ + nrf_drv_usbd_ep_max_packet_size_set(NRF_DRV_USBD_EPOUT0, MAX_PACKET_SIZE_SETUP); + nrf_drv_usbd_ep_max_packet_size_set(NRF_DRV_USBD_EPIN0, MAX_PACKET_SIZE_SETUP); + // Store a reference to this instance instance = this; // Enable IRQ NVIC_SetVector(USBD_IRQn, (uint32_t)USBD_IRQHandler); - NVIC_SetPriority(USBD_IRQn, 7); - NVIC_EnableIRQ(USBD_IRQn); + //NVIC_SetPriority(USBD_IRQn, 7); + //NVIC_EnableIRQ(USBD_IRQn); // This is handled by the Nordic driver } void USBPhyHw::deinit() { @@ -109,10 +131,13 @@ void USBPhyHw::deinit() { // Disable the USB Device driver ret_code_t ret = nrf_drv_usbd_uninit(); APP_ERROR_CHECK(ret); - NVIC_DisableIRQ(USBD_IRQn); + //NVIC_DisableIRQ(USBD_IRQn); // This is handled by the Nordic driver + + // Disable the power peripheral driver + nrf_drv_power_uninit(); - // Clear the instance pointer? - //instance = 0; + // Clear the instance pointer + instance = 0; } bool USBPhyHw::powered() { @@ -142,7 +167,7 @@ void USBPhyHw::connect() { if(nrf_drv_power_usbstatus_get() == NRF_DRV_POWER_USB_STATE_READY && !nrf_drv_usbd_is_started()) - nrf_drv_usbd_start(false);//nrf_drv_usbd_start(true); + nrf_drv_usbd_start(true); } } @@ -152,8 +177,8 @@ void USBPhyHw::disconnect() { if(nrf_drv_usbd_is_started()) nrf_drv_usbd_stop(); -// if(nrf_drv_usbd_is_enabled()) -// nrf_drv_usbd_disable(); + if(nrf_drv_usbd_is_enabled()) + nrf_drv_usbd_disable(); } void USBPhyHw::configure() { @@ -214,20 +239,30 @@ const usb_ep_table_t *USBPhyHw::endpoint_table() { } uint32_t USBPhyHw::ep0_set_max_packet(uint32_t max_packet) { + disable_usb_interrupts(); + if (max_packet > MAX_PACKET_SIZE_SETUP) max_packet = MAX_PACKET_SIZE_SETUP; nrf_drv_usbd_ep_max_packet_size_set(NRF_DRV_USBD_EPOUT0, max_packet); nrf_drv_usbd_ep_max_packet_size_set(NRF_DRV_USBD_EPIN0, max_packet); + + enable_usb_interrupts(); + return max_packet; } // read setup packet void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) { + + disable_usb_interrupts(); + if (size > sizeof(this->setup_buf)) { size = sizeof(this->setup_buf); } memcpy(buffer, &this->setup_buf, size); + + enable_usb_interrupts(); } void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) { @@ -454,10 +489,10 @@ void USBPhyHw::process() { events->power(false); break; case NRF_DRV_POWER_USB_EVT_READY: - if(this->connect_enabled) { + //if(this->connect_enabled) { // Not really necessary (only happens after enabled) if(!nrf_drv_usbd_is_started()) - nrf_drv_usbd_start(false);//nrf_drv_usbd_start(true); - } + nrf_drv_usbd_start(true); + //} break; default: ASSERT(false); @@ -468,7 +503,7 @@ void USBPhyHw::process() { usb_event_type = USB_HW_EVENT_NONE; // Re-enable interrupt - NVIC_ClearPendingIRQ(USBD_IRQn); + //NVIC_ClearPendingIRQ(USBD_IRQn); enable_usb_interrupts(); } @@ -541,7 +576,6 @@ static void power_usb_event_handler(nrf_drv_power_usb_evt_t event) { static void usbd_event_handler(nrf_drv_usbd_evt_t const * const p_event) { if(instance) { - NVIC_DisableIRQ(USBD_IRQn); // Pass the event on to the USBPhyHW instance instance->_usb_event_handler(p_event); } From b57a4ec82bb25cb8941648cd895ecbfb8b3f2b2e Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Tue, 15 Jan 2019 01:16:08 -0500 Subject: [PATCH 268/488] Added a few comments to make some process flow more apparent --- usb/device/USBDevice/USBDevice.cpp | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index d2327ba5b19..8c968a541f5 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -714,6 +714,10 @@ void USBDevice::_complete_request() uint32_t size = _transfer.args.request.size; _transfer.user_callback = None; + + /* If the transfer was aborted and the user application is attempting + * to transfer data, notify the user application. + */ if (_abort_control) { if ((direction == Receive) || (direction == Send)) { _transfer.user_callback = RequestXferDone; @@ -739,6 +743,10 @@ void USBDevice::_complete_request() _phy->ep0_stall(); return; } else { + /* If the control transfer didn't fail, wasn't aborted, + * and wasn't handled internally (standard request), + * initiate user application transfer + */ _transfer.notify = true; _transfer.remaining = size; _transfer.ptr = data; From 41874b1f75027fc1f61c5e7760980a63412be1a1 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Tue, 15 Jan 2019 01:17:36 -0500 Subject: [PATCH 269/488] Fixed bug causing usb_control_stall_test to fail intermittently. Preparing the Nordic HW for the status stage of a control transfer would sometimes cause the HW to automatically ACK an "invalid" command during the control stall test. This would cause the test to fail (because an invalid request was not stalled). --- .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index 13f46aa6940..e50fec1147b 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -298,6 +298,19 @@ uint32_t USBPhyHw::ep0_read_result() { void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) { + // If the transfer size is 0 and + // the setup packet request size was 0, + // enter the status stage immediately + if(size == 0 && setup_buf.wLength == 0) + { + nrf_drv_usbd_setup_clear(); + } + + // TODO - this function should check what stage the control transfer + // is in before enabling shorts or triggering events. + // During the status stage ep0_write is called with size=0 + // ZLP arguments. See note below: + nrf_drv_usbd_transfer_t* transfer = get_transfer_buffer(NRF_DRV_USBD_EPIN0); memset(transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); transfer->p_data.tx = buffer; @@ -457,9 +470,9 @@ void USBPhyHw::process() { setup_remaining = setup_buf.wLength; // Skip data stage, go straight to status stage - if(setup_buf.wLength == 0) { - nrf_drv_usbd_setup_clear(); - } +// if(setup_buf.wLength == 0) { +// nrf_drv_usbd_setup_clear(); +// } // else if((setup_buf.bmRequestType & SETUP_TRANSFER_DIR_MASK) == 0) { // // HOST->DEVICE transfer, need to notify hardware of Data OUT stage // nrf_drv_usbd_setup_data_clear(); From 39d7e56ea93181b355f4c27d891a3d57975b329f Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 7 Feb 2018 16:32:43 -0600 Subject: [PATCH 270/488] Add USBPhy, USB HAL and Utility class Add the USBPhy and USBPhyEvents abstract classes, the HAL header using this class and the EndpointResolver utility class. --- hal/mbed_usb_phy.cpp | 29 +++ hal/usb_phy_api.h | 36 +++ platform/USBPhy.h | 302 ++++++++++++++++++++++ platform/USBPhyEvents.h | 107 ++++++++ platform/USBPhyTypes.h | 58 +++++ usb/device/USBDevice/EndpointResolver.cpp | 136 ++++++++++ usb/device/USBDevice/EndpointResolver.h | 89 +++++++ 7 files changed, 757 insertions(+) create mode 100644 hal/mbed_usb_phy.cpp create mode 100644 hal/usb_phy_api.h create mode 100644 platform/USBPhy.h create mode 100644 platform/USBPhyEvents.h create mode 100644 platform/USBPhyTypes.h create mode 100644 usb/device/USBDevice/EndpointResolver.cpp create mode 100644 usb/device/USBDevice/EndpointResolver.h diff --git a/hal/mbed_usb_phy.cpp b/hal/mbed_usb_phy.cpp new file mode 100644 index 00000000000..c1f589c5590 --- /dev/null +++ b/hal/mbed_usb_phy.cpp @@ -0,0 +1,29 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include "usb_phy_api.h" +#include "mbed_error.h" + +#if !defined(DEVICE_USBDEVICE) || !DEVICE_USBDEVICE + +USBPhy *get_usb_phy() +{ + error("This board does not have a hardware USB driver"); + return NULL; +} + +#endif diff --git a/hal/usb_phy_api.h b/hal/usb_phy_api.h new file mode 100644 index 00000000000..a46346ae314 --- /dev/null +++ b/hal/usb_phy_api.h @@ -0,0 +1,36 @@ + +/** \addtogroup hal */ +/** @{*/ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef MBED_USB_PHY_API_H +#define MBED_USB_PHY_API_H + +#include "USBPhy.h" + +/** Return a the USBPhy instance for this hardware + * + * For details on adding support for a USBPhy see the specification in USBPhy.h. + * + * @return A pointer to a USBPhy instance + * @note Calling this function on platforms without a USBPhy will result in an + * error + */ +USBPhy *get_usb_phy(); + +#endif + +/** @}*/ diff --git a/platform/USBPhy.h b/platform/USBPhy.h new file mode 100644 index 00000000000..33f5870e1a6 --- /dev/null +++ b/platform/USBPhy.h @@ -0,0 +1,302 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBPHY_H +#define USBPHY_H + +#include "USBPhyTypes.h" +#include "USBPhyEvents.h" + +/** Abstract interface to physical USB hardware + * + * # Defined behavior + * * Any endpoint configurations which fit in the parameters of the table returned + * by USBPhy::endpoint_table can be used. + * * All endpoints in any valid endpoint configuration can be used concurrently + * * Device supports use of at least one control, bulk, interrupt and + * isochronous in each direction at the same time - at least 8 endpoints. + * * Device supports all standard endpoint sizes (wMaxPacketSize) + * * Device can handle an interrupt latency of at least 100ms if reset is not being performed and address is not being set + * * USBPhyEvents events are only sent when USBPhy is in the initialized state + * * When unpowered only the USBPhyEvents::power event can be sent + * * On USB reset all endpoints are removed except for endpoint 0 + * * USBPhyEvents::out and USBPhyEvents::in events only occur for endpoints which have been added + * * A call to USBPhy::ep0_write results in USBPhyEvents::in getting called if not + * interrupted by a power loss or reset + * * A call to endpoint_read followed by endpoint_read_result results in USBPhyEvents::out getting called if not + * interrupted by a power loss or reset + * * Endpoint 0 naks all transactions aside from setup packets until one + * of ep0_read, ep0_write or ep0_stall has been called + * * Endpoint 0 stall is automatically cleared on reception of a setup packet + * + * # Undefined behavior + * * Calling USBPhy::endpoint_add or USBPhy::endpoint_remove outside of the control requests SetInterface or SetConfiguration + * * Devices behavior is undefined if latency is greater than 2ms when address is being set - see USB spec 9.2.6.3 + * * Devices behavior is undefined if latency is greater than 10ms when a reset occurs - see USB spec 7.1.7.5 + * * Calling any of the USBPhy::endpoint_* functions on endpoint 0 + * + * # Notes + * * Make sure USB packets are processed in the correct order when multiple packets are present. + * Typically IN endpoints should be handled before OUT endpoints if both are pending. + * * Setup packets may be resent if there is noise on the USB line. The USBPhy should be able + * to gracefully handle this scenario and respond to the setup packet with an ACK. + * * Bi-directional protocols making use of alternating IN and OUT phases should not rely + * on the last ACK an IN transfer to indicate that the OUT phase should start. Instead, + * the OUT phase should be started at the same time the last IN transfer is started. This + * is because the ACK to the last in transfer may be dropped if there is noise on the USB + * line. If dropped it will only get re-sent on the next IN phase. More info on this can be + * found in section 8.5.3.3 of the USB spec. + * + * @ingroup usb_device_core + */ +class USBPhy { +public: + USBPhy() {}; + virtual ~USBPhy() {}; + + /** + * Initialize this USBPhy instance + * + * This function must be called before calling + * any other functions of this class, unless specifically + * noted. + * + * @param events Callback class to handle USB events + */ + virtual void init(USBPhyEvents *events) = 0; + + /** + * Power down this USBPhy instance + * + * Disable interrupts and stop sending events. + */ + virtual void deinit() = 0; + + /** + * Check if USB power is present + * + * Devices which don't support checking the USB power state + * must always return true. + * + * @return true if USB power is present, false otherwise + */ + virtual bool powered() = 0; + + /** + * Make the USB phy visible to the USB host + * + * Enable either the D+ or D- pullup so the host can detect + * the presence of this device. + */ + virtual void connect() = 0; + + /** + * Detach the USB phy + * + * Disable the D+ and D- pullup and stop responding to + * USB traffic. + */ + virtual void disconnect() = 0; + + /** + * Set this device to the configured state + * + * Enable added endpoints if they are not enabled + * already. + */ + virtual void configure() = 0; + + /** + * Leave the configured state + * + * This is a notification to the USBPhy indicating that the device + * is leaving the configured state. The USBPhy can disable all + * endpoints other than endpoint 0. + * + */ + virtual void unconfigure() = 0; + + /** + * Enable the start of frame interrupt + * + * Call USBPhyEvents::sof on every frame. + */ + virtual void sof_enable() = 0; + + /** + * Disable the start of frame interrupt + * + * Stop calling USBPhyEvents::sof. + */ + virtual void sof_disable() = 0; + + /** + * Set the USBPhy's address + * + * @param address This device's USB address + */ + virtual void set_address(uint8_t address) = 0; + + /** + * Wake upstream devices + */ + virtual void remote_wakeup() = 0; + + /** + * Get the endpoint table + * + * This function returns a table which describes the endpoints + * can be used, the functionality of those endpoints and the + * resource cost. + */ + virtual const usb_ep_table_t* endpoint_table() = 0; + + /** + * Set wMaxPacketSize of endpoint 0 + * + * @param max_packet The wMaxPacketSize value for endpoint 0 + * @return The actual size of endpoint 0 + */ + virtual uint32_t ep0_set_max_packet(uint32_t max_packet) = 0; + + /** + * Read the contents of the SETUP packet + * + * @param buffer Buffer to fill with data + * @param size Size of buffer passed in + */ + virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size) = 0; + + /** + * Start receiving a packet of up to wMaxPacketSize on endpoint 0 + */ + virtual void ep0_read() = 0; + + /** + * Read the contents of a received packet + * + * @param buffer Buffer to fill with the data read + * @param size Size of buffer + */ + virtual uint32_t ep0_read_result(uint8_t *buffer, uint32_t size) = 0; + + /** + * Write a packet on endpoint 0 + * + * @param buffer Buffer fill with data to send + * @param size Size of data to send + */ + virtual void ep0_write(uint8_t *buffer, uint32_t size) = 0; + + /** + * Protocol stall on endpoint 0 + * + * Stall all IN and OUT packets on endpoint 0 until a setup packet + * is received. + * @note The stall is cleared automatically when a setup packet is received + */ + virtual void ep0_stall() = 0; + + /** + * Configure and enable an endpoint + * + * @param endpoint Endpoint to configure and enable + * @param max_packet The maximum packet size that can be sent or received + * @param type The type of endpoint this should be configured as - + * USB_EP_TYPE_BULK, USB_EP_TYPE_INT or USB_EP_TYPE_ISO + * @note This function cannot be used to configure endpoint 0. That must be done + * with ep0_set_max_packet + */ + virtual bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type) = 0; + + /** + * Disable an endpoint + * + * @param endpoint Endpoint to disable + */ + virtual void endpoint_remove(usb_ep_t endpoint) = 0; + + /** + * Perform a functional stall on the given endpoint + * + * Set the HALT feature for this endpoint so that all further + * communication is aborted. + * + * @param endpoint Endpoint to stall + */ + virtual void endpoint_stall(usb_ep_t endpoint) = 0; + + /** + * Unstall the endpoint + * + * Clear the HALT feature on this endpoint so communication can + * resume. + * + * @param endpoint Endpoint to stall + */ + virtual void endpoint_unstall(usb_ep_t endpoint) = 0; + + /** + * Start a read on the given endpoint + * + * @param endpoint Endpoint to start the read on + * @param max_packet A hint as to the wMaxPacketSize of this endpoint. + * This must match the size in endpoint_add. + * @return true if the read was successfully started, false otherwise + */ + virtual bool endpoint_read(usb_ep_t endpoint, uint32_t max_packet) = 0; + + /** + * Finish a read on the given endpoint + * + * @param endpoint Endpoint to read data from + * @param data Buffer to fill with data + * @param size Size of buffer + * @param bytes_read The number of bytes in the current packet. This can be larger than + * the size parameter if the buffer passed in was too small. + * @return true if data was read false otherwise + */ + virtual bool endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytes_read) = 0; + + /** + * Start a write on the given endpoint + * + * @param endpoint Endpoint to write to + * @param data Buffer to write + * @param size Size of data to write + * @return true if the data was prepared for transmit, false otherwise + */ + virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) = 0; + + /** + * Abort the current transfer if it has not yet been sent + * + * @param endpoint Endpoint to abort the transfer on. It is implementation defined + * if this function has an effect on receive endpoints. + */ + virtual void endpoint_abort(usb_ep_t endpoint) = 0; + + /** + * Callback used for performing USB processing + * + * USBPhy processing should be triggered by calling USBPhyEvents::start_process + * and done inside process. All USBPhyEvents callbacks aside from + * USBPhyEvents::start_process must be called in the context of process + */ + virtual void process() = 0; +}; + +#endif diff --git a/platform/USBPhyEvents.h b/platform/USBPhyEvents.h new file mode 100644 index 00000000000..a6cb0e43f2b --- /dev/null +++ b/platform/USBPhyEvents.h @@ -0,0 +1,107 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBPHY_EVENTS_H +#define USBPHY_EVENTS_H + +#include "USBPhyTypes.h" + +/** Event handler for USBPhy + * + * This class is the event handler for the USBPhy class. Any events generated + * by USBPhy are passed to this class via the virtual functions. + * + * @ingroup usb_device_core + * + */ +class USBPhyEvents { +public: + USBPhyEvents() {}; + virtual ~USBPhyEvents() {}; + + /** + * Callback called when a bus reset occurs + * @note called in the contex of USBPhy::process + */ + virtual void reset() = 0; + + /** + * Callback called when an endpoint 0 setup packet is received + * @note called in the contex of USBPhy::process + */ + virtual void ep0_setup() = 0; + + /** + * Callback called when an endpoint 0 out packet is received + * @note called in the contex of USBPhy::process + */ + virtual void ep0_out() = 0; + + /** + * Callback called when an endpoint 0 in packet is received + * @note called in the contex of USBPhy::process + */ + virtual void ep0_in() = 0; + + /** + * Callback called USB power is applied or removed + * + * @param powered true if USB power is present, false otherwise + * @note called in the contex of USBPhy::process + */ + virtual void power(bool powered) = 0; + + /** + * Callback called when entering or leaving suspend mode + * + * @param suspended true if entering suspend mode false otherwise + * @note called in the contex of USBPhy::process + */ + virtual void suspend(bool suspended) = 0; + + /** + * Callback called on start of frame + * + * @param frame_number The current frame number + * @note This callback is enabled/disabled by + * calling USBPhy::sof_enable / USBPhy::sof_disable + * @note called in the contex of USBPhy::process + */ + virtual void sof(int frame_number) = 0; + + /** + * Callback called on the reception of an OUT packet + * + * @param endpoint Endpoint which received the OUT packet + * @note called in the contex of USBPhy::process + */ + virtual void out(usb_ep_t endpoint) = 0; + + /** + * Callback called on the transmission of an IN packet + * + * @param endpoint Endpoint which sent the IN packet + * @note called in the contex of USBPhy::process + */ + virtual void in(usb_ep_t endpoint) = 0; + + /** + * Callback called to indicate the USB processing needs to be done + */ + virtual void start_process() = 0; +}; + +#endif diff --git a/platform/USBPhyTypes.h b/platform/USBPhyTypes.h new file mode 100644 index 00000000000..7e69b5b339d --- /dev/null +++ b/platform/USBPhyTypes.h @@ -0,0 +1,58 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBPHY_TYPES_H +#define USBPHY_TYPES_H + +#include + +typedef uint8_t usb_ep_t; + +typedef enum { + USB_EP_TYPE_CTRL = 0, + USB_EP_TYPE_ISO = 1, + USB_EP_TYPE_BULK = 2, + USB_EP_TYPE_INT = 3 +} usb_ep_type_t; + +enum { + USB_EP_ATTR_ALLOW_CTRL = 1 << USB_EP_TYPE_CTRL, + USB_EP_ATTR_ALLOW_BULK = 1 << USB_EP_TYPE_BULK, + USB_EP_ATTR_ALLOW_INT = 1 << USB_EP_TYPE_INT, + USB_EP_ATTR_ALLOW_ISO = 1 << USB_EP_TYPE_ISO, + USB_EP_ATTR_ALLOW_ALL = USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_ALLOW_BULK | + USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_ALLOW_ISO, + + USB_EP_ATTR_DIR_IN = 0 << 4, + USB_EP_ATTR_DIR_OUT = 1 << 4, + USB_EP_ATTR_DIR_IN_OR_OUT = 2 << 4, + USB_EP_ATTR_DIR_IN_AND_OUT = 3 << 4, + USB_EP_ATTR_DIR_MASK = 3 << 4 +}; +typedef uint8_t usb_ep_attr_t; + +struct usb_ep_entry_t { + usb_ep_attr_t attributes; + uint8_t byte_cost; + uint16_t base_cost; +}; + +struct usb_ep_table_t { + uint32_t resources; + usb_ep_entry_t table[16]; +}; + +#endif diff --git a/usb/device/USBDevice/EndpointResolver.cpp b/usb/device/USBDevice/EndpointResolver.cpp new file mode 100644 index 00000000000..ad45006bb2e --- /dev/null +++ b/usb/device/USBDevice/EndpointResolver.cpp @@ -0,0 +1,136 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "mbed.h" +#include "EndpointResolver.h" + +static uint32_t logical_to_index(uint32_t logical, bool in_not_out) +{ + return (logical << 1) | (in_not_out ? 1 : 0); +} + +static uint32_t index_to_logical(uint32_t index) +{ + return index >> 1; +} + + +EndpointResolver::EndpointResolver(const usb_ep_table_t *table) : _table(table), _cost(0), _used(0), _valid(true) +{ + // Do nothing +} + +EndpointResolver::~EndpointResolver() +{ + // Do nothing +} + +void EndpointResolver::endpoint_ctrl(uint32_t size) +{ + endpoint_in(USB_EP_TYPE_CTRL, size); + endpoint_out(USB_EP_TYPE_CTRL, size); +} + +usb_ep_t EndpointResolver::endpoint_in(usb_ep_type_t type, uint32_t size) +{ + int index = next_index(type, true); + if (index < 0) { + _valid = false; + return 0; + } + + const usb_ep_entry_t &entry = _table->table[index_to_logical(index)]; + _cost += entry.base_cost + entry.byte_cost * size; + _used |= 1 << index; + + return index_to_endpoint(index); +} + +usb_ep_t EndpointResolver::endpoint_out(usb_ep_type_t type, uint32_t size) +{ + int index = next_index(type, false); + if (index < 0) { + _valid = false; + return 0; + } + + const usb_ep_entry_t &entry = _table->table[index_to_logical(index)]; + _cost += entry.base_cost + entry.byte_cost * size; + _used |= 1 << index; + + return index_to_endpoint(index); +} + +bool EndpointResolver::valid() +{ + return _valid && (_cost <= _table->resources); +} + +void EndpointResolver::reset() { + _cost = 0; + _used = 0; + _valid = true; +} + +usb_ep_t EndpointResolver::index_to_endpoint(int index) +{ + return index_to_logical(index) | ((index & 1) ? 0x80 : 0); +} + +int EndpointResolver::next_index(usb_ep_type_t type, bool in_not_out) +{ + for (int logical = 0; logical < (int)(sizeof(_table->table) / sizeof(_table->table[0])); logical++) { + uint32_t index = logical_to_index(logical, in_not_out); + uint32_t other = logical_to_index(logical, !in_not_out); + const usb_ep_entry_t &entry = _table->table[logical]; + + usb_ep_attr_t dir = entry.attributes & USB_EP_ATTR_DIR_MASK; + bool in_allowed = dir != USB_EP_ATTR_DIR_OUT; + bool out_allowed = dir != USB_EP_ATTR_DIR_IN; + bool shared = dir == USB_EP_ATTR_DIR_IN_OR_OUT; + + if (!(entry.attributes & (1 << type))) { + // This type is not supported + continue; + } + + if (in_not_out && !in_allowed) { + // In endpoint not supported + continue; + } + + if (!in_not_out && !out_allowed) { + // Out endpoint not supported + continue; + } + + if (_used & (1 << index)) { + // This endpoint is in use + continue; + } + + if (shared && (1 << other)) { + // This endpoint can only be one direction at a time and is in + // use by the other direction + continue; + } + + return index; + } + + // Not found + return -1; +} diff --git a/usb/device/USBDevice/EndpointResolver.h b/usb/device/USBDevice/EndpointResolver.h new file mode 100644 index 00000000000..04f7d188f8e --- /dev/null +++ b/usb/device/USBDevice/EndpointResolver.h @@ -0,0 +1,89 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef ENDPOINT_RESOLVER_H +#define ENDPOINT_RESOLVER_H + +#include "mbed.h" + +#include "USBPhy.h" + +/** + * Utility class for resolving endpoints + * + * This class is intended to make the process of + * selecting the correct endpoint from a device endpoint + * table easier. It also provides a verification function + * to check if the device has enough resources for the + * given configuration. + * + * @ingroup usb_device_core + */ +class EndpointResolver { +public: + EndpointResolver(const usb_ep_table_t *table); + ~EndpointResolver(); + + /** + * Add control endpoint size + * + * @param size Space reserved for control in and control out + */ + void endpoint_ctrl(uint32_t size); + + /** + * Return a free IN endpoint of the given size + * + * @param type Desired endpoint type + * @param size Space to reserve for this endpoint + * @return Endpoint index or 0 if there are not enough resources + */ + usb_ep_t endpoint_in(usb_ep_type_t type, uint32_t size); + + /** + * Return a free OUT endpoint of the given size + * + * @param type Desired endpoint type + * @param size Space to reserve for this endpoint + * @return Endpoint index or 0 if there are not enough resources + */ + usb_ep_t endpoint_out(usb_ep_type_t type, uint32_t size); + + /** + * Check if the endpoint configuration created so far is valid + * + * @return true if all endpoint sizes are available and fit, false otherwise + */ + bool valid(); + + /** + * Reset this class's state to when it was constructed + */ + void reset(); + +private: + + usb_ep_t index_to_endpoint(int index); + int next_index(usb_ep_type_t type, bool in_not_out); + + const usb_ep_table_t *_table; + uint32_t _cost; + uint32_t _used; + bool _valid; +}; + + +#endif From bf55426f938f86cbe58fea6493ce7d50cef8edf4 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 7 Feb 2018 16:29:16 -0600 Subject: [PATCH 271/488] Copy USBDevice from unsupported Copy the USBDevice code out of unsupported and into a top level USB folder in preparation for development. squash --- usb/device/USBDevice/USBDescriptor.h | 74 ++ usb/device/USBDevice/USBDevice.cpp | 988 +++++++++++++++++++++++++ usb/device/USBDevice/USBDevice.h | 272 +++++++ usb/device/USBDevice/USBDevice_Types.h | 83 +++ 4 files changed, 1417 insertions(+) create mode 100644 usb/device/USBDevice/USBDescriptor.h create mode 100644 usb/device/USBDevice/USBDevice.cpp create mode 100644 usb/device/USBDevice/USBDevice.h create mode 100644 usb/device/USBDevice/USBDevice_Types.h diff --git a/usb/device/USBDevice/USBDescriptor.h b/usb/device/USBDevice/USBDescriptor.h new file mode 100644 index 00000000000..9d4ce849f09 --- /dev/null +++ b/usb/device/USBDevice/USBDescriptor.h @@ -0,0 +1,74 @@ +/* Copyright (c) 2010-2011 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +/* Standard descriptor types */ +#define DEVICE_DESCRIPTOR (1) +#define CONFIGURATION_DESCRIPTOR (2) +#define STRING_DESCRIPTOR (3) +#define INTERFACE_DESCRIPTOR (4) +#define ENDPOINT_DESCRIPTOR (5) +#define QUALIFIER_DESCRIPTOR (6) + +/* Standard descriptor lengths */ +#define DEVICE_DESCRIPTOR_LENGTH (0x12) +#define CONFIGURATION_DESCRIPTOR_LENGTH (0x09) +#define INTERFACE_DESCRIPTOR_LENGTH (0x09) +#define ENDPOINT_DESCRIPTOR_LENGTH (0x07) + + +/*string offset*/ +#define STRING_OFFSET_LANGID (0) +#define STRING_OFFSET_IMANUFACTURER (1) +#define STRING_OFFSET_IPRODUCT (2) +#define STRING_OFFSET_ISERIAL (3) +#define STRING_OFFSET_ICONFIGURATION (4) +#define STRING_OFFSET_IINTERFACE (5) + +/* USB Specification Release Number */ +#define USB_VERSION_2_0 (0x0200) + +/* Least/Most significant byte of short integer */ +#define LSB(n) ((n)&0xff) +#define MSB(n) (((n)&0xff00)>>8) + +/* Convert physical endpoint number to descriptor endpoint number */ +#define PHY_TO_DESC(endpoint) (((endpoint)>>1) | (((endpoint) & 1) ? 0x80:0)) + +/* bmAttributes in configuration descriptor */ +/* C_RESERVED must always be set */ +#define C_RESERVED (1U<<7) +#define C_SELF_POWERED (1U<<6) +#define C_REMOTE_WAKEUP (1U<<5) + +/* bMaxPower in configuration descriptor */ +#define C_POWER(mA) ((mA)/2) + +/* bmAttributes in endpoint descriptor */ +#define E_CONTROL (0x00) +#define E_ISOCHRONOUS (0x01) +#define E_BULK (0x02) +#define E_INTERRUPT (0x03) + +/* For isochronous endpoints only: */ +#define E_NO_SYNCHRONIZATION (0x00) +#define E_ASYNCHRONOUS (0x04) +#define E_ADAPTIVE (0x08) +#define E_SYNCHRONOUS (0x0C) +#define E_DATA (0x00) +#define E_FEEDBACK (0x10) +#define E_IMPLICIT_FEEDBACK (0x20) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp new file mode 100644 index 00000000000..438174fe2a9 --- /dev/null +++ b/usb/device/USBDevice/USBDevice.cpp @@ -0,0 +1,988 @@ +/* Copyright (c) 2010-2011 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#include "stdint.h" + +#include "USBEndpoints.h" +#include "USBDevice.h" +#include "USBDescriptor.h" + +//#define DEBUG + +/* Device status */ +#define DEVICE_STATUS_SELF_POWERED (1U<<0) +#define DEVICE_STATUS_REMOTE_WAKEUP (1U<<1) + +/* Endpoint status */ +#define ENDPOINT_STATUS_HALT (1U<<0) + +/* Standard feature selectors */ +#define DEVICE_REMOTE_WAKEUP (1) +#define ENDPOINT_HALT (0) + +/* Macro to convert wIndex endpoint number to physical endpoint number */ +#define WINDEX_TO_PHYSICAL(endpoint) (((endpoint & 0x0f) << 1) + \ + ((endpoint & 0x80) ? 1 : 0)) + + +bool USBDevice::requestGetDescriptor(void) +{ + bool success = false; +#ifdef DEBUG + printf("get descr: type: %d\r\n", DESCRIPTOR_TYPE(transfer.setup.wValue)); +#endif + switch (DESCRIPTOR_TYPE(transfer.setup.wValue)) + { + case DEVICE_DESCRIPTOR: + if (deviceDesc() != NULL) + { + if ((deviceDesc()[0] == DEVICE_DESCRIPTOR_LENGTH) \ + && (deviceDesc()[1] == DEVICE_DESCRIPTOR)) + { +#ifdef DEBUG + printf("device descr\r\n"); +#endif + transfer.remaining = DEVICE_DESCRIPTOR_LENGTH; + transfer.ptr = (uint8_t*)deviceDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + } + } + break; + case CONFIGURATION_DESCRIPTOR: + if (configurationDesc() != NULL) + { + if ((configurationDesc()[0] == CONFIGURATION_DESCRIPTOR_LENGTH) \ + && (configurationDesc()[1] == CONFIGURATION_DESCRIPTOR)) + { +#ifdef DEBUG + printf("conf descr request\r\n"); +#endif + /* Get wTotalLength */ + transfer.remaining = configurationDesc()[2] \ + | (configurationDesc()[3] << 8); + + transfer.ptr = (uint8_t*)configurationDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + } + } + break; + case STRING_DESCRIPTOR: +#ifdef DEBUG + printf("str descriptor\r\n"); +#endif + switch (DESCRIPTOR_INDEX(transfer.setup.wValue)) + { + case STRING_OFFSET_LANGID: +#ifdef DEBUG + printf("1\r\n"); +#endif + transfer.remaining = stringLangidDesc()[0]; + transfer.ptr = (uint8_t*)stringLangidDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_IMANUFACTURER: +#ifdef DEBUG + printf("2\r\n"); +#endif + transfer.remaining = stringImanufacturerDesc()[0]; + transfer.ptr = (uint8_t*)stringImanufacturerDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_IPRODUCT: +#ifdef DEBUG + printf("3\r\n"); +#endif + transfer.remaining = stringIproductDesc()[0]; + transfer.ptr = (uint8_t*)stringIproductDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_ISERIAL: +#ifdef DEBUG + printf("4\r\n"); +#endif + transfer.remaining = stringIserialDesc()[0]; + transfer.ptr = (uint8_t*)stringIserialDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_ICONFIGURATION: +#ifdef DEBUG + printf("5\r\n"); +#endif + transfer.remaining = stringIConfigurationDesc()[0]; + transfer.ptr = (uint8_t*)stringIConfigurationDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_IINTERFACE: +#ifdef DEBUG + printf("6\r\n"); +#endif + transfer.remaining = stringIinterfaceDesc()[0]; + transfer.ptr = (uint8_t*)stringIinterfaceDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + } + break; + case INTERFACE_DESCRIPTOR: +#ifdef DEBUG + printf("interface descr\r\n"); +#endif + case ENDPOINT_DESCRIPTOR: +#ifdef DEBUG + printf("endpoint descr\r\n"); +#endif + /* TODO: Support is optional, not implemented here */ + break; + default: +#ifdef DEBUG + printf("ERROR\r\n"); +#endif + break; + } + + return success; +} + +void USBDevice::decodeSetupPacket(uint8_t *data, SETUP_PACKET *packet) +{ + /* Fill in the elements of a SETUP_PACKET structure from raw data */ + packet->bmRequestType.dataTransferDirection = (data[0] & 0x80) >> 7; + packet->bmRequestType.Type = (data[0] & 0x60) >> 5; + packet->bmRequestType.Recipient = data[0] & 0x1f; + packet->bRequest = data[1]; + packet->wValue = (data[2] | (uint16_t)data[3] << 8); + packet->wIndex = (data[4] | (uint16_t)data[5] << 8); + packet->wLength = (data[6] | (uint16_t)data[7] << 8); +} + + +bool USBDevice::controlOut(void) +{ + /* Control transfer data OUT stage */ + uint8_t buffer[MAX_PACKET_SIZE_EP0]; + uint32_t packetSize; + + /* Check we should be transferring data OUT */ + if (transfer.direction != HOST_TO_DEVICE) + { + /* for other platforms, count on the HAL to handle this case */ + return false; + } + + /* Read from endpoint */ + packetSize = EP0getReadResult(buffer); + + /* Check if transfer size is valid */ + if (packetSize > transfer.remaining) + { + /* Too big */ + return false; + } + + /* Update transfer */ + transfer.ptr += packetSize; + transfer.remaining -= packetSize; + + /* Check if transfer has completed */ + if (transfer.remaining == 0) + { + /* Transfer completed */ + if (transfer.notify) + { + /* Notify class layer. */ + USBCallback_requestCompleted(buffer, packetSize); + transfer.notify = false; + } + /* Status stage */ + EP0write(NULL, 0); + } + else + { + EP0read(); + } + + return true; +} + +bool USBDevice::controlIn(void) +{ + /* Control transfer data IN stage */ + uint32_t packetSize; + + /* Check if transfer has completed (status stage transactions */ + /* also have transfer.remaining == 0) */ + if (transfer.remaining == 0) + { + if (transfer.zlp) + { + /* Send zero length packet */ + EP0write(NULL, 0); + transfer.zlp = false; + } + + /* Transfer completed */ + if (transfer.notify) + { + /* Notify class layer. */ + USBCallback_requestCompleted(NULL, 0); + transfer.notify = false; + } + + EP0read(); + EP0readStage(); + + /* Completed */ + return true; + } + + /* Check we should be transferring data IN */ + if (transfer.direction != DEVICE_TO_HOST) + { + return false; + } + + packetSize = transfer.remaining; + + if (packetSize > MAX_PACKET_SIZE_EP0) + { + packetSize = MAX_PACKET_SIZE_EP0; + } + + /* Write to endpoint */ + EP0write(transfer.ptr, packetSize); + + /* Update transfer */ + transfer.ptr += packetSize; + transfer.remaining -= packetSize; + + return true; +} + +bool USBDevice::requestSetAddress(void) +{ + /* Set the device address */ + setAddress(transfer.setup.wValue); + + if (transfer.setup.wValue == 0) + { + device.state = DEFAULT; + } + else + { + device.state = ADDRESS; + } + + return true; +} + +bool USBDevice::requestSetConfiguration(void) +{ + + device.configuration = transfer.setup.wValue; + /* Set the device configuration */ + if (device.configuration == 0) + { + /* Not configured */ + unconfigureDevice(); + device.state = ADDRESS; + } + else + { + if (USBCallback_setConfiguration(device.configuration)) + { + /* Valid configuration */ + configureDevice(); + device.state = CONFIGURED; + } + else + { + return false; + } + } + + return true; +} + +bool USBDevice::requestGetConfiguration(void) +{ + /* Send the device configuration */ + transfer.ptr = &device.configuration; + transfer.remaining = sizeof(device.configuration); + transfer.direction = DEVICE_TO_HOST; + return true; +} + +bool USBDevice::requestGetInterface(void) +{ + /* Return the selected alternate setting for an interface */ + + if (device.state != CONFIGURED) + { + return false; + } + + /* Send the alternate setting */ + transfer.setup.wIndex = currentInterface; + transfer.ptr = ¤tAlternate; + transfer.remaining = sizeof(currentAlternate); + transfer.direction = DEVICE_TO_HOST; + return true; +} + +bool USBDevice::requestSetInterface(void) +{ + bool success = false; + if(USBCallback_setInterface(transfer.setup.wIndex, transfer.setup.wValue)) + { + success = true; + currentInterface = transfer.setup.wIndex; + currentAlternate = transfer.setup.wValue; + } + return success; +} + +bool USBDevice::requestSetFeature() +{ + bool success = false; + + if (device.state != CONFIGURED) + { + /* Endpoint or interface must be zero */ + if (transfer.setup.wIndex != 0) + { + return false; + } + } + + switch (transfer.setup.bmRequestType.Recipient) + { + case DEVICE_RECIPIENT: + /* TODO: Remote wakeup feature not supported */ + break; + case ENDPOINT_RECIPIENT: + if (transfer.setup.wValue == ENDPOINT_HALT) + { + /* TODO: We should check that the endpoint number is valid */ + stallEndpoint( + WINDEX_TO_PHYSICAL(transfer.setup.wIndex)); + success = true; + } + break; + default: + break; + } + + return success; +} + +bool USBDevice::requestClearFeature() +{ + bool success = false; + + if (device.state != CONFIGURED) + { + /* Endpoint or interface must be zero */ + if (transfer.setup.wIndex != 0) + { + return false; + } + } + + switch (transfer.setup.bmRequestType.Recipient) + { + case DEVICE_RECIPIENT: + /* TODO: Remote wakeup feature not supported */ + break; + case ENDPOINT_RECIPIENT: + /* TODO: We should check that the endpoint number is valid */ + if (transfer.setup.wValue == ENDPOINT_HALT) + { + unstallEndpoint( WINDEX_TO_PHYSICAL(transfer.setup.wIndex)); + success = true; + } + break; + default: + break; + } + + return success; +} + +bool USBDevice::requestGetStatus(void) +{ + static uint16_t status; + bool success = false; + + if (device.state != CONFIGURED) + { + /* Endpoint or interface must be zero */ + if (transfer.setup.wIndex != 0) + { + return false; + } + } + + switch (transfer.setup.bmRequestType.Recipient) + { + case DEVICE_RECIPIENT: + /* TODO: Currently only supports self powered devices */ + status = DEVICE_STATUS_SELF_POWERED; + success = true; + break; + case INTERFACE_RECIPIENT: + status = 0; + success = true; + break; + case ENDPOINT_RECIPIENT: + /* TODO: We should check that the endpoint number is valid */ + if (getEndpointStallState( + WINDEX_TO_PHYSICAL(transfer.setup.wIndex))) + { + status = ENDPOINT_STATUS_HALT; + } + else + { + status = 0; + } + success = true; + break; + default: + break; + } + + if (success) + { + /* Send the status */ + transfer.ptr = (uint8_t *)&status; /* Assumes little endian */ + transfer.remaining = sizeof(status); + transfer.direction = DEVICE_TO_HOST; + } + + return success; +} + +bool USBDevice::requestSetup(void) +{ + bool success = false; + + /* Process standard requests */ + if ((transfer.setup.bmRequestType.Type == STANDARD_TYPE)) + { + switch (transfer.setup.bRequest) + { + case GET_STATUS: + success = requestGetStatus(); + break; + case CLEAR_FEATURE: + success = requestClearFeature(); + break; + case SET_FEATURE: + success = requestSetFeature(); + break; + case SET_ADDRESS: + success = requestSetAddress(); + break; + case GET_DESCRIPTOR: + success = requestGetDescriptor(); + break; + case SET_DESCRIPTOR: + /* TODO: Support is optional, not implemented here */ + success = false; + break; + case GET_CONFIGURATION: + success = requestGetConfiguration(); + break; + case SET_CONFIGURATION: + success = requestSetConfiguration(); + break; + case GET_INTERFACE: + success = requestGetInterface(); + break; + case SET_INTERFACE: + success = requestSetInterface(); + break; + default: + break; + } + } + + return success; +} + +bool USBDevice::controlSetup(void) +{ + bool success = false; + + /* Control transfer setup stage */ + uint8_t buffer[MAX_PACKET_SIZE_EP0]; + + EP0setup(buffer); + + /* Initialise control transfer state */ + decodeSetupPacket(buffer, &transfer.setup); + transfer.ptr = NULL; + transfer.remaining = 0; + transfer.direction = 0; + transfer.zlp = false; + transfer.notify = false; + +#ifdef DEBUG + printf("dataTransferDirection: %d\r\nType: %d\r\nRecipient: %d\r\nbRequest: %d\r\nwValue: %d\r\nwIndex: %d\r\nwLength: %d\r\n",transfer.setup.bmRequestType.dataTransferDirection, + transfer.setup.bmRequestType.Type, + transfer.setup.bmRequestType.Recipient, + transfer.setup.bRequest, + transfer.setup.wValue, + transfer.setup.wIndex, + transfer.setup.wLength); +#endif + + /* Class / vendor specific */ + success = USBCallback_request(); + + if (!success) + { + /* Standard requests */ + if (!requestSetup()) + { +#ifdef DEBUG + printf("fail!!!!\r\n"); +#endif + return false; + } + } + + /* Check transfer size and direction */ + if (transfer.setup.wLength>0) + { + if (transfer.setup.bmRequestType.dataTransferDirection \ + == DEVICE_TO_HOST) + { + /* IN data stage is required */ + if (transfer.direction != DEVICE_TO_HOST) + { + return false; + } + + /* Transfer must be less than or equal to the size */ + /* requested by the host */ + if (transfer.remaining > transfer.setup.wLength) + { + transfer.remaining = transfer.setup.wLength; + } + } + else + { + + /* OUT data stage is required */ + if (transfer.direction != HOST_TO_DEVICE) + { + return false; + } + + /* Transfer must be equal to the size requested by the host */ + if (transfer.remaining != transfer.setup.wLength) + { + return false; + } + } + } + else + { + /* No data stage; transfer size must be zero */ + if (transfer.remaining != 0) + { + return false; + } + } + + /* Data or status stage if applicable */ + if (transfer.setup.wLength>0) + { + if (transfer.setup.bmRequestType.dataTransferDirection \ + == DEVICE_TO_HOST) + { + /* Check if we'll need to send a zero length packet at */ + /* the end of this transfer */ + if (transfer.setup.wLength > transfer.remaining) + { + /* Device wishes to transfer less than host requested */ + if ((transfer.remaining % MAX_PACKET_SIZE_EP0) == 0) + { + /* Transfer is a multiple of EP0 max packet size */ + transfer.zlp = true; + } + } + + /* IN stage */ + controlIn(); + } + else + { + /* OUT stage */ + EP0read(); + } + } + else + { + /* Status stage */ + EP0write(NULL, 0); + } + + return true; +} + +void USBDevice::busReset(void) +{ + device.state = DEFAULT; + device.configuration = 0; + device.suspended = false; + + /* Call class / vendor specific busReset function */ + USBCallback_busReset(); +} + +void USBDevice::EP0setupCallback(void) +{ + /* Endpoint 0 setup event */ + if (!controlSetup()) + { + /* Protocol stall */ + EP0stall(); + } + + /* Return true if an OUT data stage is expected */ +} + +void USBDevice::EP0out(void) +{ + /* Endpoint 0 OUT data event */ + if (!controlOut()) + { + /* Protocol stall; this will stall both endpoints */ + EP0stall(); + } +} + +void USBDevice::EP0in(void) +{ +#ifdef DEBUG + printf("EP0IN\r\n"); +#endif + /* Endpoint 0 IN data event */ + if (!controlIn()) + { + /* Protocol stall; this will stall both endpoints */ + EP0stall(); + } +} + +bool USBDevice::configured(void) +{ + /* Returns true if device is in the CONFIGURED state */ + return (device.state == CONFIGURED); +} + +void USBDevice::connect(bool blocking) +{ + /* Connect device */ + USBHAL::connect(); + + if (blocking) { + /* Block if not configured */ + while (!configured()); + } +} + +void USBDevice::disconnect(void) +{ + /* Disconnect device */ + USBHAL::disconnect(); + + /* Set initial device state */ + device.state = POWERED; + device.configuration = 0; + device.suspended = false; +} + +CONTROL_TRANSFER * USBDevice::getTransferPtr(void) +{ + return &transfer; +} + +bool USBDevice::addEndpoint(uint8_t endpoint, uint32_t maxPacket) +{ + return realiseEndpoint(endpoint, maxPacket, 0); +} + +bool USBDevice::addRateFeedbackEndpoint(uint8_t endpoint, uint32_t maxPacket) +{ + /* For interrupt endpoints only */ + return realiseEndpoint(endpoint, maxPacket, RATE_FEEDBACK_MODE); +} + +uint8_t * USBDevice::findDescriptor(uint8_t descriptorType) +{ + /* Find a descriptor within the list of descriptors */ + /* following a configuration descriptor. */ + uint16_t wTotalLength; + uint8_t *ptr; + + if (configurationDesc() == NULL) + { + return NULL; + } + + /* Check this is a configuration descriptor */ + if ((configurationDesc()[0] != CONFIGURATION_DESCRIPTOR_LENGTH) \ + || (configurationDesc()[1] != CONFIGURATION_DESCRIPTOR)) + { + return NULL; + } + + wTotalLength = configurationDesc()[2] | (configurationDesc()[3] << 8); + + /* Check there are some more descriptors to follow */ + if (wTotalLength <= (CONFIGURATION_DESCRIPTOR_LENGTH+2)) + /* +2 is for bLength and bDescriptorType of next descriptor */ + { + return NULL; + } + + /* Start at first descriptor after the configuration descriptor */ + ptr = &(((uint8_t*)configurationDesc())[CONFIGURATION_DESCRIPTOR_LENGTH]); + + do { + if (ptr[1] /* bDescriptorType */ == descriptorType) + { + /* Found */ + return ptr; + } + + /* Skip to next descriptor */ + ptr += ptr[0]; /* bLength */ + } while (ptr < (configurationDesc() + wTotalLength)); + + /* Reached end of the descriptors - not found */ + return NULL; +} + + +void USBDevice::connectStateChanged(unsigned int connected) +{ +} + +void USBDevice::suspendStateChanged(unsigned int suspended) +{ +} + + +USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release){ + VENDOR_ID = vendor_id; + PRODUCT_ID = product_id; + PRODUCT_RELEASE = product_release; + + /* Set initial device state */ + device.state = POWERED; + device.configuration = 0; + device.suspended = false; +}; + + +bool USBDevice::readStart(uint8_t endpoint, uint32_t maxSize) +{ + return endpointRead(endpoint, maxSize) == EP_PENDING; +} + + +bool USBDevice::write(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_t maxSize) +{ + EP_STATUS result; + + if (size > maxSize) + { + return false; + } + + + if(!configured()) { + return false; + } + + /* Send report */ + result = endpointWrite(endpoint, buffer, size); + + if (result != EP_PENDING) + { + return false; + } + + /* Wait for completion */ + do { + result = endpointWriteResult(endpoint); + } while ((result == EP_PENDING) && configured()); + + return (result == EP_COMPLETED); +} + + +bool USBDevice::writeNB(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_t maxSize) +{ + EP_STATUS result; + + if (size > maxSize) + { + return false; + } + + if(!configured()) { + return false; + } + + /* Send report */ + result = endpointWrite(endpoint, buffer, size); + + if (result != EP_PENDING) + { + return false; + } + + result = endpointWriteResult(endpoint); + + return (result == EP_COMPLETED); +} + + + +bool USBDevice::readEP(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint32_t maxSize) +{ + EP_STATUS result; + + if(!configured()) { + return false; + } + + /* Wait for completion */ + do { + result = endpointReadResult(endpoint, buffer, size); + } while ((result == EP_PENDING) && configured()); + + return (result == EP_COMPLETED); +} + + +bool USBDevice::readEP_NB(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint32_t maxSize) +{ + EP_STATUS result; + + if(!configured()) { + return false; + } + + result = endpointReadResult(endpoint, buffer, size); + + return (result == EP_COMPLETED); +} + + + +const uint8_t * USBDevice::deviceDesc() { + uint8_t deviceDescriptorTemp[] = { + DEVICE_DESCRIPTOR_LENGTH, /* bLength */ + DEVICE_DESCRIPTOR, /* bDescriptorType */ + LSB(USB_VERSION_2_0), /* bcdUSB (LSB) */ + MSB(USB_VERSION_2_0), /* bcdUSB (MSB) */ + 0x00, /* bDeviceClass */ + 0x00, /* bDeviceSubClass */ + 0x00, /* bDeviceprotocol */ + MAX_PACKET_SIZE_EP0, /* bMaxPacketSize0 */ + (uint8_t)(LSB(VENDOR_ID)), /* idVendor (LSB) */ + (uint8_t)(MSB(VENDOR_ID)), /* idVendor (MSB) */ + (uint8_t)(LSB(PRODUCT_ID)), /* idProduct (LSB) */ + (uint8_t)(MSB(PRODUCT_ID)), /* idProduct (MSB) */ + (uint8_t)(LSB(PRODUCT_RELEASE)), /* bcdDevice (LSB) */ + (uint8_t)(MSB(PRODUCT_RELEASE)), /* bcdDevice (MSB) */ + STRING_OFFSET_IMANUFACTURER, /* iManufacturer */ + STRING_OFFSET_IPRODUCT, /* iProduct */ + STRING_OFFSET_ISERIAL, /* iSerialNumber */ + 0x01 /* bNumConfigurations */ + }; + MBED_ASSERT(sizeof(deviceDescriptorTemp) == sizeof(deviceDescriptor)); + memcpy(deviceDescriptor, deviceDescriptorTemp, sizeof(deviceDescriptor)); + return deviceDescriptor; +} + +const uint8_t * USBDevice::stringLangidDesc() { + static const uint8_t stringLangidDescriptor[] = { + 0x04, /*bLength*/ + STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ + 0x09,0x04, /*bString Lang ID - 0x0409 - English*/ + }; + return (uint8_t *)stringLangidDescriptor; +} + +const uint8_t * USBDevice::stringImanufacturerDesc() { + static const uint8_t stringImanufacturerDescriptor[] = { + 0x12, /*bLength*/ + STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ + 'm',0,'b',0,'e',0,'d',0,'.',0,'o',0,'r',0,'g',0, /*bString iManufacturer - mbed.org*/ + }; + return stringImanufacturerDescriptor; +} + +const uint8_t * USBDevice::stringIserialDesc() { + static const uint8_t stringIserialDescriptor[] = { + 0x16, /*bLength*/ + STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ + '0',0,'1',0,'2',0,'3',0,'4',0,'5',0,'6',0,'7',0,'8',0,'9',0, /*bString iSerial - 0123456789*/ + }; + return stringIserialDescriptor; +} + +const uint8_t * USBDevice::stringIConfigurationDesc() { + static const uint8_t stringIconfigurationDescriptor[] = { + 0x06, /*bLength*/ + STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ + '0',0,'1',0, /*bString iConfiguration - 01*/ + }; + return stringIconfigurationDescriptor; +} + +const uint8_t * USBDevice::stringIinterfaceDesc() { + static const uint8_t stringIinterfaceDescriptor[] = { + 0x08, /*bLength*/ + STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ + 'U',0,'S',0,'B',0, /*bString iInterface - USB*/ + }; + return stringIinterfaceDescriptor; +} + +const uint8_t * USBDevice::stringIproductDesc() { + static const uint8_t stringIproductDescriptor[] = { + 0x16, /*bLength*/ + STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ + 'U',0,'S',0,'B',0,' ',0,'D',0,'E',0,'V',0,'I',0,'C',0,'E',0 /*bString iProduct - USB DEVICE*/ + }; + return stringIproductDescriptor; +} diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h new file mode 100644 index 00000000000..60a280ed658 --- /dev/null +++ b/usb/device/USBDevice/USBDevice.h @@ -0,0 +1,272 @@ +/* Copyright (c) 2010-2011 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#ifndef USBDEVICE_H +#define USBDEVICE_H + +#include "mbed.h" +#include "USBDevice_Types.h" +#include "USBHAL.h" + +class USBDevice: public USBHAL +{ +public: + USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release); + + /* + * Check if the device is configured + * + * @returns true if configured, false otherwise + */ + bool configured(void); + + /* + * Connect a device + * + * @param blocking: block if not configured + */ + void connect(bool blocking = true); + + /* + * Disconnect a device + */ + void disconnect(void); + + /* + * Add an endpoint + * + * @param endpoint endpoint which will be added + * @param maxPacket Maximum size of a packet which can be sent for this endpoint + * @returns true if successful, false otherwise + */ + bool addEndpoint(uint8_t endpoint, uint32_t maxPacket); + + /* + * Start a reading on a certain endpoint. + * You can access the result of the reading by USBDevice_read + * + * @param endpoint endpoint which will be read + * @param maxSize the maximum length that can be read + * @return true if successful + */ + bool readStart(uint8_t endpoint, uint32_t maxSize); + + /* + * Read a certain endpoint. Before calling this function, USBUSBDevice_readStart + * must be called. + * + * Warning: blocking + * + * @param endpoint endpoint which will be read + * @param buffer buffer will be filled with the data received + * @param size the number of bytes read will be stored in *size + * @param maxSize the maximum length that can be read + * @returns true if successful + */ + bool readEP(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint32_t maxSize); + + /* + * Read a certain endpoint. + * + * Warning: non blocking + * + * @param endpoint endpoint which will be read + * @param buffer buffer will be filled with the data received (if data are available) + * @param size the number of bytes read will be stored in *size + * @param maxSize the maximum length that can be read + * @returns true if successful + */ + bool readEP_NB(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint32_t maxSize); + + /* + * Write a certain endpoint. + * + * Warning: blocking + * + * @param endpoint endpoint to write + * @param buffer data contained in buffer will be write + * @param size the number of bytes to write + * @param maxSize the maximum length that can be written on this endpoint + */ + bool write(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_t maxSize); + + + /* + * Write a certain endpoint. + * + * Warning: non blocking + * + * @param endpoint endpoint to write + * @param buffer data contained in buffer will be write + * @param size the number of bytes to write + * @param maxSize the maximum length that can be written on this endpoint + */ + bool writeNB(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_t maxSize); + + + /* + * Called by USBDevice layer on bus reset. Warning: Called in ISR context + * + * May be used to reset state + */ + virtual void USBCallback_busReset(void) {}; + + /* + * Called by USBDevice on Endpoint0 request. Warning: Called in ISR context + * This is used to handle extensions to standard requests + * and class specific requests + * + * @returns true if class handles this request + */ + virtual bool USBCallback_request() { return false; }; + + /* + * Called by USBDevice on Endpoint0 request completion + * if the 'notify' flag has been set to true. Warning: Called in ISR context + * + * In this case it is used to indicate that a HID report has + * been received from the host on endpoint 0 + * + * @param buf buffer received on endpoint 0 + * @param length length of this buffer + */ + virtual void USBCallback_requestCompleted(uint8_t * buf, uint32_t length) {}; + + /* + * Called by USBDevice layer. Set configuration of the device. + * For instance, you can add all endpoints that you need on this function. + * + * @param configuration Number of the configuration + */ + virtual bool USBCallback_setConfiguration(uint8_t configuration) { return false; }; + + /* + * Called by USBDevice layer. Set interface/alternate of the device. + * + * @param interface Number of the interface to be configured + * @param alternate Number of the alternate to be configured + * @returns true if class handles this request + */ + virtual bool USBCallback_setInterface(uint16_t interface, uint8_t alternate) { return false; }; + + /* + * Get device descriptor. + * + * @returns pointer to the device descriptor + */ + virtual const uint8_t * deviceDesc(); + + /* + * Get configuration descriptor + * + * @returns pointer to the configuration descriptor + */ + virtual const uint8_t * configurationDesc(){return NULL;}; + + /* + * Get string lang id descriptor + * + * @return pointer to the string lang id descriptor + */ + virtual const uint8_t * stringLangidDesc(); + + /* + * Get string manufacturer descriptor + * + * @returns pointer to the string manufacturer descriptor + */ + virtual const uint8_t * stringImanufacturerDesc(); + + /* + * Get string product descriptor + * + * @returns pointer to the string product descriptor + */ + virtual const uint8_t * stringIproductDesc(); + + /* + * Get string serial descriptor + * + * @returns pointer to the string serial descriptor + */ + virtual const uint8_t * stringIserialDesc(); + + /* + * Get string configuration descriptor + * + * @returns pointer to the string configuration descriptor + */ + virtual const uint8_t * stringIConfigurationDesc(); + + /* + * Get string interface descriptor + * + * @returns pointer to the string interface descriptor + */ + virtual const uint8_t * stringIinterfaceDesc(); + + /* + * Get the length of the report descriptor + * + * @returns length of the report descriptor + */ + virtual uint16_t reportDescLength() { return 0; }; + + + +protected: + virtual void busReset(void); + virtual void EP0setupCallback(void); + virtual void EP0out(void); + virtual void EP0in(void); + virtual void connectStateChanged(unsigned int connected); + virtual void suspendStateChanged(unsigned int suspended); + uint8_t * findDescriptor(uint8_t descriptorType); + CONTROL_TRANSFER * getTransferPtr(void); + + uint16_t VENDOR_ID; + uint16_t PRODUCT_ID; + uint16_t PRODUCT_RELEASE; + uint8_t deviceDescriptor[18]; + +private: + bool addRateFeedbackEndpoint(uint8_t endpoint, uint32_t maxPacket); + bool requestGetDescriptor(void); + bool controlOut(void); + bool controlIn(void); + bool requestSetAddress(void); + bool requestSetConfiguration(void); + bool requestSetFeature(void); + bool requestClearFeature(void); + bool requestGetStatus(void); + bool requestSetup(void); + bool controlSetup(void); + void decodeSetupPacket(uint8_t *data, SETUP_PACKET *packet); + bool requestGetConfiguration(void); + bool requestGetInterface(void); + bool requestSetInterface(void); + + CONTROL_TRANSFER transfer; + USB_DEVICE device; + + uint16_t currentInterface; + uint8_t currentAlternate; +}; + + +#endif diff --git a/usb/device/USBDevice/USBDevice_Types.h b/usb/device/USBDevice/USBDevice_Types.h new file mode 100644 index 00000000000..19bc1c2f348 --- /dev/null +++ b/usb/device/USBDevice/USBDevice_Types.h @@ -0,0 +1,83 @@ +/* Copyright (c) 2010-2011 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#ifndef USBDEVICE_TYPES_H +#define USBDEVICE_TYPES_H + +/* Standard requests */ +#define GET_STATUS (0) +#define CLEAR_FEATURE (1) +#define SET_FEATURE (3) +#define SET_ADDRESS (5) +#define GET_DESCRIPTOR (6) +#define SET_DESCRIPTOR (7) +#define GET_CONFIGURATION (8) +#define SET_CONFIGURATION (9) +#define GET_INTERFACE (10) +#define SET_INTERFACE (11) + +/* bmRequestType.dataTransferDirection */ +#define HOST_TO_DEVICE (0) +#define DEVICE_TO_HOST (1) + +/* bmRequestType.Type*/ +#define STANDARD_TYPE (0) +#define CLASS_TYPE (1) +#define VENDOR_TYPE (2) +#define RESERVED_TYPE (3) + +/* bmRequestType.Recipient */ +#define DEVICE_RECIPIENT (0) +#define INTERFACE_RECIPIENT (1) +#define ENDPOINT_RECIPIENT (2) +#define OTHER_RECIPIENT (3) + +/* Descriptors */ +#define DESCRIPTOR_TYPE(wValue) (wValue >> 8) +#define DESCRIPTOR_INDEX(wValue) (wValue & 0xff) + +typedef struct { + struct { + uint8_t dataTransferDirection; + uint8_t Type; + uint8_t Recipient; + } bmRequestType; + uint8_t bRequest; + uint16_t wValue; + uint16_t wIndex; + uint16_t wLength; +} SETUP_PACKET; + +typedef struct { + SETUP_PACKET setup; + uint8_t *ptr; + uint32_t remaining; + uint8_t direction; + bool zlp; + bool notify; +} CONTROL_TRANSFER; + +typedef enum {ATTACHED, POWERED, DEFAULT, ADDRESS, CONFIGURED} DEVICE_STATE; + +typedef struct { + volatile DEVICE_STATE state; + uint8_t configuration; + bool suspended; +} USB_DEVICE; + +#endif From fecddeb1ae61b83721cd750dba05cb70e67b4ee2 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 26 Feb 2018 09:32:14 -0600 Subject: [PATCH 272/488] Update USB licenses and format code Update USB licenses from MIT to Apache 2 and run astyle on the code. --- usb/device/USBDevice/USBDescriptor.h | 32 +- usb/device/USBDevice/USBDevice.cpp | 480 +++++++++++-------------- usb/device/USBDevice/USBDevice.h | 88 +++-- usb/device/USBDevice/USBDevice_Types.h | 32 +- 4 files changed, 285 insertions(+), 347 deletions(-) diff --git a/usb/device/USBDevice/USBDescriptor.h b/usb/device/USBDevice/USBDescriptor.h index 9d4ce849f09..afc9684086a 100644 --- a/usb/device/USBDevice/USBDescriptor.h +++ b/usb/device/USBDevice/USBDescriptor.h @@ -1,20 +1,18 @@ -/* Copyright (c) 2010-2011 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ /* Standard descriptor types */ #define DEVICE_DESCRIPTOR (1) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 438174fe2a9..32a03422f37 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -1,20 +1,18 @@ -/* Copyright (c) 2010-2011 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include "stdint.h" @@ -46,38 +44,33 @@ bool USBDevice::requestGetDescriptor(void) #ifdef DEBUG printf("get descr: type: %d\r\n", DESCRIPTOR_TYPE(transfer.setup.wValue)); #endif - switch (DESCRIPTOR_TYPE(transfer.setup.wValue)) - { + switch (DESCRIPTOR_TYPE(transfer.setup.wValue)) { case DEVICE_DESCRIPTOR: - if (deviceDesc() != NULL) - { + if (deviceDesc() != NULL) { if ((deviceDesc()[0] == DEVICE_DESCRIPTOR_LENGTH) \ - && (deviceDesc()[1] == DEVICE_DESCRIPTOR)) - { + && (deviceDesc()[1] == DEVICE_DESCRIPTOR)) { #ifdef DEBUG printf("device descr\r\n"); #endif transfer.remaining = DEVICE_DESCRIPTOR_LENGTH; - transfer.ptr = (uint8_t*)deviceDesc(); + transfer.ptr = (uint8_t *)deviceDesc(); transfer.direction = DEVICE_TO_HOST; success = true; } } break; case CONFIGURATION_DESCRIPTOR: - if (configurationDesc() != NULL) - { + if (configurationDesc() != NULL) { if ((configurationDesc()[0] == CONFIGURATION_DESCRIPTOR_LENGTH) \ - && (configurationDesc()[1] == CONFIGURATION_DESCRIPTOR)) - { + && (configurationDesc()[1] == CONFIGURATION_DESCRIPTOR)) { #ifdef DEBUG printf("conf descr request\r\n"); #endif /* Get wTotalLength */ transfer.remaining = configurationDesc()[2] \ - | (configurationDesc()[3] << 8); + | (configurationDesc()[3] << 8); - transfer.ptr = (uint8_t*)configurationDesc(); + transfer.ptr = (uint8_t *)configurationDesc(); transfer.direction = DEVICE_TO_HOST; success = true; } @@ -87,62 +80,61 @@ bool USBDevice::requestGetDescriptor(void) #ifdef DEBUG printf("str descriptor\r\n"); #endif - switch (DESCRIPTOR_INDEX(transfer.setup.wValue)) - { - case STRING_OFFSET_LANGID: + switch (DESCRIPTOR_INDEX(transfer.setup.wValue)) { + case STRING_OFFSET_LANGID: #ifdef DEBUG - printf("1\r\n"); + printf("1\r\n"); #endif - transfer.remaining = stringLangidDesc()[0]; - transfer.ptr = (uint8_t*)stringLangidDesc(); - transfer.direction = DEVICE_TO_HOST; - success = true; - break; - case STRING_OFFSET_IMANUFACTURER: + transfer.remaining = stringLangidDesc()[0]; + transfer.ptr = (uint8_t *)stringLangidDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_IMANUFACTURER: #ifdef DEBUG - printf("2\r\n"); + printf("2\r\n"); #endif - transfer.remaining = stringImanufacturerDesc()[0]; - transfer.ptr = (uint8_t*)stringImanufacturerDesc(); - transfer.direction = DEVICE_TO_HOST; - success = true; - break; - case STRING_OFFSET_IPRODUCT: + transfer.remaining = stringImanufacturerDesc()[0]; + transfer.ptr = (uint8_t *)stringImanufacturerDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_IPRODUCT: #ifdef DEBUG - printf("3\r\n"); + printf("3\r\n"); #endif - transfer.remaining = stringIproductDesc()[0]; - transfer.ptr = (uint8_t*)stringIproductDesc(); - transfer.direction = DEVICE_TO_HOST; - success = true; - break; - case STRING_OFFSET_ISERIAL: + transfer.remaining = stringIproductDesc()[0]; + transfer.ptr = (uint8_t *)stringIproductDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_ISERIAL: #ifdef DEBUG - printf("4\r\n"); + printf("4\r\n"); #endif - transfer.remaining = stringIserialDesc()[0]; - transfer.ptr = (uint8_t*)stringIserialDesc(); - transfer.direction = DEVICE_TO_HOST; - success = true; - break; - case STRING_OFFSET_ICONFIGURATION: + transfer.remaining = stringIserialDesc()[0]; + transfer.ptr = (uint8_t *)stringIserialDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_ICONFIGURATION: #ifdef DEBUG - printf("5\r\n"); + printf("5\r\n"); #endif - transfer.remaining = stringIConfigurationDesc()[0]; - transfer.ptr = (uint8_t*)stringIConfigurationDesc(); - transfer.direction = DEVICE_TO_HOST; - success = true; - break; - case STRING_OFFSET_IINTERFACE: + transfer.remaining = stringIConfigurationDesc()[0]; + transfer.ptr = (uint8_t *)stringIConfigurationDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; + case STRING_OFFSET_IINTERFACE: #ifdef DEBUG - printf("6\r\n"); + printf("6\r\n"); #endif - transfer.remaining = stringIinterfaceDesc()[0]; - transfer.ptr = (uint8_t*)stringIinterfaceDesc(); - transfer.direction = DEVICE_TO_HOST; - success = true; - break; + transfer.remaining = stringIinterfaceDesc()[0]; + transfer.ptr = (uint8_t *)stringIinterfaceDesc(); + transfer.direction = DEVICE_TO_HOST; + success = true; + break; } break; case INTERFACE_DESCRIPTOR: @@ -185,18 +177,16 @@ bool USBDevice::controlOut(void) uint32_t packetSize; /* Check we should be transferring data OUT */ - if (transfer.direction != HOST_TO_DEVICE) - { - /* for other platforms, count on the HAL to handle this case */ - return false; + if (transfer.direction != HOST_TO_DEVICE) { + /* for other platforms, count on the HAL to handle this case */ + return false; } /* Read from endpoint */ packetSize = EP0getReadResult(buffer); /* Check if transfer size is valid */ - if (packetSize > transfer.remaining) - { + if (packetSize > transfer.remaining) { /* Too big */ return false; } @@ -206,20 +196,16 @@ bool USBDevice::controlOut(void) transfer.remaining -= packetSize; /* Check if transfer has completed */ - if (transfer.remaining == 0) - { + if (transfer.remaining == 0) { /* Transfer completed */ - if (transfer.notify) - { + if (transfer.notify) { /* Notify class layer. */ USBCallback_requestCompleted(buffer, packetSize); transfer.notify = false; } /* Status stage */ EP0write(NULL, 0); - } - else - { + } else { EP0read(); } @@ -233,18 +219,15 @@ bool USBDevice::controlIn(void) /* Check if transfer has completed (status stage transactions */ /* also have transfer.remaining == 0) */ - if (transfer.remaining == 0) - { - if (transfer.zlp) - { + if (transfer.remaining == 0) { + if (transfer.zlp) { /* Send zero length packet */ EP0write(NULL, 0); transfer.zlp = false; } /* Transfer completed */ - if (transfer.notify) - { + if (transfer.notify) { /* Notify class layer. */ USBCallback_requestCompleted(NULL, 0); transfer.notify = false; @@ -258,15 +241,13 @@ bool USBDevice::controlIn(void) } /* Check we should be transferring data IN */ - if (transfer.direction != DEVICE_TO_HOST) - { + if (transfer.direction != DEVICE_TO_HOST) { return false; } packetSize = transfer.remaining; - if (packetSize > MAX_PACKET_SIZE_EP0) - { + if (packetSize > MAX_PACKET_SIZE_EP0) { packetSize = MAX_PACKET_SIZE_EP0; } @@ -285,12 +266,9 @@ bool USBDevice::requestSetAddress(void) /* Set the device address */ setAddress(transfer.setup.wValue); - if (transfer.setup.wValue == 0) - { + if (transfer.setup.wValue == 0) { device.state = DEFAULT; - } - else - { + } else { device.state = ADDRESS; } @@ -302,22 +280,16 @@ bool USBDevice::requestSetConfiguration(void) device.configuration = transfer.setup.wValue; /* Set the device configuration */ - if (device.configuration == 0) - { + if (device.configuration == 0) { /* Not configured */ unconfigureDevice(); device.state = ADDRESS; - } - else - { - if (USBCallback_setConfiguration(device.configuration)) - { + } else { + if (USBCallback_setConfiguration(device.configuration)) { /* Valid configuration */ configureDevice(); device.state = CONFIGURED; - } - else - { + } else { return false; } } @@ -338,8 +310,7 @@ bool USBDevice::requestGetInterface(void) { /* Return the selected alternate setting for an interface */ - if (device.state != CONFIGURED) - { + if (device.state != CONFIGURED) { return false; } @@ -354,8 +325,7 @@ bool USBDevice::requestGetInterface(void) bool USBDevice::requestSetInterface(void) { bool success = false; - if(USBCallback_setInterface(transfer.setup.wIndex, transfer.setup.wValue)) - { + if (USBCallback_setInterface(transfer.setup.wIndex, transfer.setup.wValue)) { success = true; currentInterface = transfer.setup.wIndex; currentAlternate = transfer.setup.wValue; @@ -367,23 +337,19 @@ bool USBDevice::requestSetFeature() { bool success = false; - if (device.state != CONFIGURED) - { + if (device.state != CONFIGURED) { /* Endpoint or interface must be zero */ - if (transfer.setup.wIndex != 0) - { + if (transfer.setup.wIndex != 0) { return false; } } - switch (transfer.setup.bmRequestType.Recipient) - { + switch (transfer.setup.bmRequestType.Recipient) { case DEVICE_RECIPIENT: /* TODO: Remote wakeup feature not supported */ break; case ENDPOINT_RECIPIENT: - if (transfer.setup.wValue == ENDPOINT_HALT) - { + if (transfer.setup.wValue == ENDPOINT_HALT) { /* TODO: We should check that the endpoint number is valid */ stallEndpoint( WINDEX_TO_PHYSICAL(transfer.setup.wIndex)); @@ -401,25 +367,21 @@ bool USBDevice::requestClearFeature() { bool success = false; - if (device.state != CONFIGURED) - { + if (device.state != CONFIGURED) { /* Endpoint or interface must be zero */ - if (transfer.setup.wIndex != 0) - { + if (transfer.setup.wIndex != 0) { return false; } } - switch (transfer.setup.bmRequestType.Recipient) - { + switch (transfer.setup.bmRequestType.Recipient) { case DEVICE_RECIPIENT: /* TODO: Remote wakeup feature not supported */ break; case ENDPOINT_RECIPIENT: /* TODO: We should check that the endpoint number is valid */ - if (transfer.setup.wValue == ENDPOINT_HALT) - { - unstallEndpoint( WINDEX_TO_PHYSICAL(transfer.setup.wIndex)); + if (transfer.setup.wValue == ENDPOINT_HALT) { + unstallEndpoint(WINDEX_TO_PHYSICAL(transfer.setup.wIndex)); success = true; } break; @@ -435,17 +397,14 @@ bool USBDevice::requestGetStatus(void) static uint16_t status; bool success = false; - if (device.state != CONFIGURED) - { + if (device.state != CONFIGURED) { /* Endpoint or interface must be zero */ - if (transfer.setup.wIndex != 0) - { + if (transfer.setup.wIndex != 0) { return false; } } - switch (transfer.setup.bmRequestType.Recipient) - { + switch (transfer.setup.bmRequestType.Recipient) { case DEVICE_RECIPIENT: /* TODO: Currently only supports self powered devices */ status = DEVICE_STATUS_SELF_POWERED; @@ -458,12 +417,9 @@ bool USBDevice::requestGetStatus(void) case ENDPOINT_RECIPIENT: /* TODO: We should check that the endpoint number is valid */ if (getEndpointStallState( - WINDEX_TO_PHYSICAL(transfer.setup.wIndex))) - { + WINDEX_TO_PHYSICAL(transfer.setup.wIndex))) { status = ENDPOINT_STATUS_HALT; - } - else - { + } else { status = 0; } success = true; @@ -472,8 +428,7 @@ bool USBDevice::requestGetStatus(void) break; } - if (success) - { + if (success) { /* Send the status */ transfer.ptr = (uint8_t *)&status; /* Assumes little endian */ transfer.remaining = sizeof(status); @@ -488,43 +443,41 @@ bool USBDevice::requestSetup(void) bool success = false; /* Process standard requests */ - if ((transfer.setup.bmRequestType.Type == STANDARD_TYPE)) - { - switch (transfer.setup.bRequest) - { - case GET_STATUS: - success = requestGetStatus(); - break; - case CLEAR_FEATURE: - success = requestClearFeature(); - break; - case SET_FEATURE: - success = requestSetFeature(); - break; - case SET_ADDRESS: + if ((transfer.setup.bmRequestType.Type == STANDARD_TYPE)) { + switch (transfer.setup.bRequest) { + case GET_STATUS: + success = requestGetStatus(); + break; + case CLEAR_FEATURE: + success = requestClearFeature(); + break; + case SET_FEATURE: + success = requestSetFeature(); + break; + case SET_ADDRESS: success = requestSetAddress(); - break; - case GET_DESCRIPTOR: - success = requestGetDescriptor(); - break; - case SET_DESCRIPTOR: - /* TODO: Support is optional, not implemented here */ - success = false; - break; - case GET_CONFIGURATION: - success = requestGetConfiguration(); - break; - case SET_CONFIGURATION: - success = requestSetConfiguration(); - break; - case GET_INTERFACE: - success = requestGetInterface(); - break; - case SET_INTERFACE: - success = requestSetInterface(); - break; - default: - break; + break; + case GET_DESCRIPTOR: + success = requestGetDescriptor(); + break; + case SET_DESCRIPTOR: + /* TODO: Support is optional, not implemented here */ + success = false; + break; + case GET_CONFIGURATION: + success = requestGetConfiguration(); + break; + case SET_CONFIGURATION: + success = requestSetConfiguration(); + break; + case GET_INTERFACE: + success = requestGetInterface(); + break; + case SET_INTERFACE: + success = requestSetInterface(); + break; + default: + break; } } @@ -549,23 +502,21 @@ bool USBDevice::controlSetup(void) transfer.notify = false; #ifdef DEBUG - printf("dataTransferDirection: %d\r\nType: %d\r\nRecipient: %d\r\nbRequest: %d\r\nwValue: %d\r\nwIndex: %d\r\nwLength: %d\r\n",transfer.setup.bmRequestType.dataTransferDirection, - transfer.setup.bmRequestType.Type, - transfer.setup.bmRequestType.Recipient, - transfer.setup.bRequest, - transfer.setup.wValue, - transfer.setup.wIndex, - transfer.setup.wLength); + printf("dataTransferDirection: %d\r\nType: %d\r\nRecipient: %d\r\nbRequest: %d\r\nwValue: %d\r\nwIndex: %d\r\nwLength: %d\r\n", transfer.setup.bmRequestType.dataTransferDirection, + transfer.setup.bmRequestType.Type, + transfer.setup.bmRequestType.Recipient, + transfer.setup.bRequest, + transfer.setup.wValue, + transfer.setup.wIndex, + transfer.setup.wLength); #endif /* Class / vendor specific */ success = USBCallback_request(); - if (!success) - { + if (!success) { /* Standard requests */ - if (!requestSetup()) - { + if (!requestSetup()) { #ifdef DEBUG printf("fail!!!!\r\n"); #endif @@ -574,62 +525,47 @@ bool USBDevice::controlSetup(void) } /* Check transfer size and direction */ - if (transfer.setup.wLength>0) - { + if (transfer.setup.wLength > 0) { if (transfer.setup.bmRequestType.dataTransferDirection \ - == DEVICE_TO_HOST) - { + == DEVICE_TO_HOST) { /* IN data stage is required */ - if (transfer.direction != DEVICE_TO_HOST) - { + if (transfer.direction != DEVICE_TO_HOST) { return false; } /* Transfer must be less than or equal to the size */ /* requested by the host */ - if (transfer.remaining > transfer.setup.wLength) - { + if (transfer.remaining > transfer.setup.wLength) { transfer.remaining = transfer.setup.wLength; } - } - else - { + } else { /* OUT data stage is required */ - if (transfer.direction != HOST_TO_DEVICE) - { + if (transfer.direction != HOST_TO_DEVICE) { return false; } /* Transfer must be equal to the size requested by the host */ - if (transfer.remaining != transfer.setup.wLength) - { + if (transfer.remaining != transfer.setup.wLength) { return false; } } - } - else - { + } else { /* No data stage; transfer size must be zero */ - if (transfer.remaining != 0) - { + if (transfer.remaining != 0) { return false; } } /* Data or status stage if applicable */ - if (transfer.setup.wLength>0) - { + if (transfer.setup.wLength > 0) { if (transfer.setup.bmRequestType.dataTransferDirection \ - == DEVICE_TO_HOST) - { + == DEVICE_TO_HOST) { /* Check if we'll need to send a zero length packet at */ /* the end of this transfer */ - if (transfer.setup.wLength > transfer.remaining) - { + if (transfer.setup.wLength > transfer.remaining) { /* Device wishes to transfer less than host requested */ - if ((transfer.remaining % MAX_PACKET_SIZE_EP0) == 0) - { + if ((transfer.remaining % MAX_PACKET_SIZE_EP0) == 0) { /* Transfer is a multiple of EP0 max packet size */ transfer.zlp = true; } @@ -637,15 +573,11 @@ bool USBDevice::controlSetup(void) /* IN stage */ controlIn(); - } - else - { + } else { /* OUT stage */ EP0read(); } - } - else - { + } else { /* Status stage */ EP0write(NULL, 0); } @@ -666,8 +598,7 @@ void USBDevice::busReset(void) void USBDevice::EP0setupCallback(void) { /* Endpoint 0 setup event */ - if (!controlSetup()) - { + if (!controlSetup()) { /* Protocol stall */ EP0stall(); } @@ -678,8 +609,7 @@ void USBDevice::EP0setupCallback(void) void USBDevice::EP0out(void) { /* Endpoint 0 OUT data event */ - if (!controlOut()) - { + if (!controlOut()) { /* Protocol stall; this will stall both endpoints */ EP0stall(); } @@ -691,8 +621,7 @@ void USBDevice::EP0in(void) printf("EP0IN\r\n"); #endif /* Endpoint 0 IN data event */ - if (!controlIn()) - { + if (!controlIn()) { /* Protocol stall; this will stall both endpoints */ EP0stall(); } @@ -719,14 +648,14 @@ void USBDevice::disconnect(void) { /* Disconnect device */ USBHAL::disconnect(); - + /* Set initial device state */ device.state = POWERED; device.configuration = 0; device.suspended = false; } -CONTROL_TRANSFER * USBDevice::getTransferPtr(void) +CONTROL_TRANSFER *USBDevice::getTransferPtr(void) { return &transfer; } @@ -742,40 +671,37 @@ bool USBDevice::addRateFeedbackEndpoint(uint8_t endpoint, uint32_t maxPacket) return realiseEndpoint(endpoint, maxPacket, RATE_FEEDBACK_MODE); } -uint8_t * USBDevice::findDescriptor(uint8_t descriptorType) +uint8_t *USBDevice::findDescriptor(uint8_t descriptorType) { /* Find a descriptor within the list of descriptors */ /* following a configuration descriptor. */ uint16_t wTotalLength; uint8_t *ptr; - if (configurationDesc() == NULL) - { + if (configurationDesc() == NULL) { return NULL; } /* Check this is a configuration descriptor */ if ((configurationDesc()[0] != CONFIGURATION_DESCRIPTOR_LENGTH) \ - || (configurationDesc()[1] != CONFIGURATION_DESCRIPTOR)) - { + || (configurationDesc()[1] != CONFIGURATION_DESCRIPTOR)) { return NULL; } wTotalLength = configurationDesc()[2] | (configurationDesc()[3] << 8); /* Check there are some more descriptors to follow */ - if (wTotalLength <= (CONFIGURATION_DESCRIPTOR_LENGTH+2)) - /* +2 is for bLength and bDescriptorType of next descriptor */ + if (wTotalLength <= (CONFIGURATION_DESCRIPTOR_LENGTH + 2)) + /* +2 is for bLength and bDescriptorType of next descriptor */ { return NULL; } /* Start at first descriptor after the configuration descriptor */ - ptr = &(((uint8_t*)configurationDesc())[CONFIGURATION_DESCRIPTOR_LENGTH]); + ptr = &(((uint8_t *)configurationDesc())[CONFIGURATION_DESCRIPTOR_LENGTH]); do { - if (ptr[1] /* bDescriptorType */ == descriptorType) - { + if (ptr[1] /* bDescriptorType */ == descriptorType) { /* Found */ return ptr; } @@ -798,7 +724,8 @@ void USBDevice::suspendStateChanged(unsigned int suspended) } -USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release){ +USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release) +{ VENDOR_ID = vendor_id; PRODUCT_ID = product_id; PRODUCT_RELEASE = product_release; @@ -816,25 +743,23 @@ bool USBDevice::readStart(uint8_t endpoint, uint32_t maxSize) } -bool USBDevice::write(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_t maxSize) +bool USBDevice::write(uint8_t endpoint, uint8_t *buffer, uint32_t size, uint32_t maxSize) { EP_STATUS result; - if (size > maxSize) - { + if (size > maxSize) { return false; } - if(!configured()) { + if (!configured()) { return false; } /* Send report */ result = endpointWrite(endpoint, buffer, size); - if (result != EP_PENDING) - { + if (result != EP_PENDING) { return false; } @@ -847,24 +772,22 @@ bool USBDevice::write(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_ } -bool USBDevice::writeNB(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_t maxSize) +bool USBDevice::writeNB(uint8_t endpoint, uint8_t *buffer, uint32_t size, uint32_t maxSize) { EP_STATUS result; - if (size > maxSize) - { + if (size > maxSize) { return false; } - if(!configured()) { + if (!configured()) { return false; } /* Send report */ result = endpointWrite(endpoint, buffer, size); - if (result != EP_PENDING) - { + if (result != EP_PENDING) { return false; } @@ -875,11 +798,11 @@ bool USBDevice::writeNB(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint3 -bool USBDevice::readEP(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint32_t maxSize) +bool USBDevice::readEP(uint8_t endpoint, uint8_t *buffer, uint32_t *size, uint32_t maxSize) { EP_STATUS result; - if(!configured()) { + if (!configured()) { return false; } @@ -892,11 +815,11 @@ bool USBDevice::readEP(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint } -bool USBDevice::readEP_NB(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint32_t maxSize) +bool USBDevice::readEP_NB(uint8_t endpoint, uint8_t *buffer, uint32_t *size, uint32_t maxSize) { EP_STATUS result; - if(!configured()) { + if (!configured()) { return false; } @@ -907,7 +830,8 @@ bool USBDevice::readEP_NB(uint8_t endpoint, uint8_t * buffer, uint32_t * size, u -const uint8_t * USBDevice::deviceDesc() { +const uint8_t *USBDevice::deviceDesc() +{ uint8_t deviceDescriptorTemp[] = { DEVICE_DESCRIPTOR_LENGTH, /* bLength */ DEVICE_DESCRIPTOR, /* bDescriptorType */ @@ -933,56 +857,62 @@ const uint8_t * USBDevice::deviceDesc() { return deviceDescriptor; } -const uint8_t * USBDevice::stringLangidDesc() { +const uint8_t *USBDevice::stringLangidDesc() +{ static const uint8_t stringLangidDescriptor[] = { 0x04, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ - 0x09,0x04, /*bString Lang ID - 0x0409 - English*/ + 0x09, 0x04, /*bString Lang ID - 0x0409 - English*/ }; return (uint8_t *)stringLangidDescriptor; } -const uint8_t * USBDevice::stringImanufacturerDesc() { +const uint8_t *USBDevice::stringImanufacturerDesc() +{ static const uint8_t stringImanufacturerDescriptor[] = { 0x12, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ - 'm',0,'b',0,'e',0,'d',0,'.',0,'o',0,'r',0,'g',0, /*bString iManufacturer - mbed.org*/ + 'm', 0, 'b', 0, 'e', 0, 'd', 0, '.', 0, 'o', 0, 'r', 0, 'g', 0, /*bString iManufacturer - mbed.org*/ }; return stringImanufacturerDescriptor; } -const uint8_t * USBDevice::stringIserialDesc() { +const uint8_t *USBDevice::stringIserialDesc() +{ static const uint8_t stringIserialDescriptor[] = { 0x16, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ - '0',0,'1',0,'2',0,'3',0,'4',0,'5',0,'6',0,'7',0,'8',0,'9',0, /*bString iSerial - 0123456789*/ + '0', 0, '1', 0, '2', 0, '3', 0, '4', 0, '5', 0, '6', 0, '7', 0, '8', 0, '9', 0, /*bString iSerial - 0123456789*/ }; return stringIserialDescriptor; } -const uint8_t * USBDevice::stringIConfigurationDesc() { +const uint8_t *USBDevice::stringIConfigurationDesc() +{ static const uint8_t stringIconfigurationDescriptor[] = { 0x06, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ - '0',0,'1',0, /*bString iConfiguration - 01*/ + '0', 0, '1', 0, /*bString iConfiguration - 01*/ }; return stringIconfigurationDescriptor; } -const uint8_t * USBDevice::stringIinterfaceDesc() { +const uint8_t *USBDevice::stringIinterfaceDesc() +{ static const uint8_t stringIinterfaceDescriptor[] = { 0x08, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ - 'U',0,'S',0,'B',0, /*bString iInterface - USB*/ + 'U', 0, 'S', 0, 'B', 0, /*bString iInterface - USB*/ }; return stringIinterfaceDescriptor; } -const uint8_t * USBDevice::stringIproductDesc() { +const uint8_t *USBDevice::stringIproductDesc() +{ static const uint8_t stringIproductDescriptor[] = { 0x16, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ - 'U',0,'S',0,'B',0,' ',0,'D',0,'E',0,'V',0,'I',0,'C',0,'E',0 /*bString iProduct - USB DEVICE*/ + 'U', 0, 'S', 0, 'B', 0, ' ', 0, 'D', 0, 'E', 0, 'V', 0, 'I', 0, 'C', 0, 'E', 0 /*bString iProduct - USB DEVICE*/ }; return stringIproductDescriptor; } diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 60a280ed658..9ee962841de 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -1,20 +1,18 @@ -/* Copyright (c) 2010-2011 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #ifndef USBDEVICE_H #define USBDEVICE_H @@ -23,8 +21,7 @@ #include "USBDevice_Types.h" #include "USBHAL.h" -class USBDevice: public USBHAL -{ +class USBDevice: public USBHAL { public: USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release); @@ -78,7 +75,7 @@ class USBDevice: public USBHAL * @param maxSize the maximum length that can be read * @returns true if successful */ - bool readEP(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint32_t maxSize); + bool readEP(uint8_t endpoint, uint8_t *buffer, uint32_t *size, uint32_t maxSize); /* * Read a certain endpoint. @@ -91,7 +88,7 @@ class USBDevice: public USBHAL * @param maxSize the maximum length that can be read * @returns true if successful */ - bool readEP_NB(uint8_t endpoint, uint8_t * buffer, uint32_t * size, uint32_t maxSize); + bool readEP_NB(uint8_t endpoint, uint8_t *buffer, uint32_t *size, uint32_t maxSize); /* * Write a certain endpoint. @@ -103,7 +100,7 @@ class USBDevice: public USBHAL * @param size the number of bytes to write * @param maxSize the maximum length that can be written on this endpoint */ - bool write(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_t maxSize); + bool write(uint8_t endpoint, uint8_t *buffer, uint32_t size, uint32_t maxSize); /* @@ -116,7 +113,7 @@ class USBDevice: public USBHAL * @param size the number of bytes to write * @param maxSize the maximum length that can be written on this endpoint */ - bool writeNB(uint8_t endpoint, uint8_t * buffer, uint32_t size, uint32_t maxSize); + bool writeNB(uint8_t endpoint, uint8_t *buffer, uint32_t size, uint32_t maxSize); /* @@ -133,7 +130,10 @@ class USBDevice: public USBHAL * * @returns true if class handles this request */ - virtual bool USBCallback_request() { return false; }; + virtual bool USBCallback_request() + { + return false; + }; /* * Called by USBDevice on Endpoint0 request completion @@ -145,7 +145,7 @@ class USBDevice: public USBHAL * @param buf buffer received on endpoint 0 * @param length length of this buffer */ - virtual void USBCallback_requestCompleted(uint8_t * buf, uint32_t length) {}; + virtual void USBCallback_requestCompleted(uint8_t *buf, uint32_t length) {}; /* * Called by USBDevice layer. Set configuration of the device. @@ -153,7 +153,10 @@ class USBDevice: public USBHAL * * @param configuration Number of the configuration */ - virtual bool USBCallback_setConfiguration(uint8_t configuration) { return false; }; + virtual bool USBCallback_setConfiguration(uint8_t configuration) + { + return false; + }; /* * Called by USBDevice layer. Set interface/alternate of the device. @@ -162,70 +165,79 @@ class USBDevice: public USBHAL * @param alternate Number of the alternate to be configured * @returns true if class handles this request */ - virtual bool USBCallback_setInterface(uint16_t interface, uint8_t alternate) { return false; }; + virtual bool USBCallback_setInterface(uint16_t interface, uint8_t alternate) + { + return false; + }; /* * Get device descriptor. * * @returns pointer to the device descriptor */ - virtual const uint8_t * deviceDesc(); + virtual const uint8_t *deviceDesc(); /* * Get configuration descriptor * * @returns pointer to the configuration descriptor */ - virtual const uint8_t * configurationDesc(){return NULL;}; + virtual const uint8_t *configurationDesc() + { + return NULL; + }; /* * Get string lang id descriptor * * @return pointer to the string lang id descriptor */ - virtual const uint8_t * stringLangidDesc(); + virtual const uint8_t *stringLangidDesc(); /* * Get string manufacturer descriptor * * @returns pointer to the string manufacturer descriptor */ - virtual const uint8_t * stringImanufacturerDesc(); + virtual const uint8_t *stringImanufacturerDesc(); /* * Get string product descriptor * * @returns pointer to the string product descriptor */ - virtual const uint8_t * stringIproductDesc(); + virtual const uint8_t *stringIproductDesc(); /* * Get string serial descriptor * * @returns pointer to the string serial descriptor */ - virtual const uint8_t * stringIserialDesc(); + virtual const uint8_t *stringIserialDesc(); /* * Get string configuration descriptor * * @returns pointer to the string configuration descriptor */ - virtual const uint8_t * stringIConfigurationDesc(); + virtual const uint8_t *stringIConfigurationDesc(); /* * Get string interface descriptor * * @returns pointer to the string interface descriptor */ - virtual const uint8_t * stringIinterfaceDesc(); + virtual const uint8_t *stringIinterfaceDesc(); /* * Get the length of the report descriptor * * @returns length of the report descriptor */ - virtual uint16_t reportDescLength() { return 0; }; + virtual uint16_t reportDescLength() + { + return 0; + }; @@ -236,8 +248,8 @@ class USBDevice: public USBHAL virtual void EP0in(void); virtual void connectStateChanged(unsigned int connected); virtual void suspendStateChanged(unsigned int suspended); - uint8_t * findDescriptor(uint8_t descriptorType); - CONTROL_TRANSFER * getTransferPtr(void); + uint8_t *findDescriptor(uint8_t descriptorType); + CONTROL_TRANSFER *getTransferPtr(void); uint16_t VENDOR_ID; uint16_t PRODUCT_ID; diff --git a/usb/device/USBDevice/USBDevice_Types.h b/usb/device/USBDevice/USBDevice_Types.h index 19bc1c2f348..543e8a678f8 100644 --- a/usb/device/USBDevice/USBDevice_Types.h +++ b/usb/device/USBDevice/USBDevice_Types.h @@ -1,20 +1,18 @@ -/* Copyright (c) 2010-2011 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #ifndef USBDEVICE_TYPES_H #define USBDEVICE_TYPES_H From 2137890c4f49b657a827a226337a4b87fffd18be Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 27 Feb 2018 10:23:14 -0600 Subject: [PATCH 273/488] Update USBDevice and configure to use a USBPhy Update the USBDevice class API so it matches mbed-os's naming conventions, has a more robust API and uses USBPhy as its backend. --- usb/device/USBDevice/USBDescriptor.h | 8 +- usb/device/USBDevice/USBDevice.cpp | 1169 +++++++++++++++++------- usb/device/USBDevice/USBDevice.h | 596 ++++++++---- usb/device/USBDevice/USBDevice_Types.h | 29 - 4 files changed, 1292 insertions(+), 510 deletions(-) diff --git a/usb/device/USBDevice/USBDescriptor.h b/usb/device/USBDevice/USBDescriptor.h index afc9684086a..730327972d6 100644 --- a/usb/device/USBDevice/USBDescriptor.h +++ b/usb/device/USBDevice/USBDescriptor.h @@ -14,6 +14,9 @@ * limitations under the License. */ +#ifndef USBDESCRIPTOR_H +#define USBDESCRIPTOR_H + /* Standard descriptor types */ #define DEVICE_DESCRIPTOR (1) #define CONFIGURATION_DESCRIPTOR (2) @@ -44,9 +47,6 @@ #define LSB(n) ((n)&0xff) #define MSB(n) (((n)&0xff00)>>8) -/* Convert physical endpoint number to descriptor endpoint number */ -#define PHY_TO_DESC(endpoint) (((endpoint)>>1) | (((endpoint) & 1) ? 0x80:0)) - /* bmAttributes in configuration descriptor */ /* C_RESERVED must always be set */ #define C_RESERVED (1U<<7) @@ -70,3 +70,5 @@ #define E_DATA (0x00) #define E_FEEDBACK (0x10) #define E_IMPLICIT_FEEDBACK (0x20) + +#endif diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 32a03422f37..828ec145717 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -16,9 +16,9 @@ #include "stdint.h" -#include "USBEndpoints.h" #include "USBDevice.h" #include "USBDescriptor.h" +#include "usb_phy_api.h" //#define DEBUG @@ -33,45 +33,59 @@ #define DEVICE_REMOTE_WAKEUP (1) #define ENDPOINT_HALT (0) -/* Macro to convert wIndex endpoint number to physical endpoint number */ -#define WINDEX_TO_PHYSICAL(endpoint) (((endpoint & 0x0f) << 1) + \ - ((endpoint & 0x80) ? 1 : 0)) +/* Endpoint macros */ +#define EP_INDEXABLE(endpoint) (EP_VALID(endpoint) && !EP_CONTROL(endpoint)) +#define EP_TO_INDEX(endpoint) ((((endpoint & 0xf) << 1) | (endpoint & 0x80 ? 1 : 0)) - 2) +#define EP_VALID(endpoint) (((endpoint) & ~0x8F) == 0) +#define EP_CONTROL(endpoint) (((endpoint) & 0xF) == 0) +#define EP_RX(endpoint) ((endpoint) & 0x80) +/* Other defines */ +#define ENDPOINT_ENABLED (1 << 0) +#define ENDPOINT_STALLED (1 << 1) -bool USBDevice::requestGetDescriptor(void) +#if defined(MAX_PACKET_SIZE_EP0) +#undef MAX_PACKET_SIZE_EP0 +#endif +#define MAX_PACKET_SIZE_EP0 64 + + +bool USBDevice::_request_get_descriptor() { + assert_locked(); + bool success = false; #ifdef DEBUG - printf("get descr: type: %d\r\n", DESCRIPTOR_TYPE(transfer.setup.wValue)); + printf("get descr: type: %d\r\n", DESCRIPTOR_TYPE(_transfer.setup.wValue)); #endif - switch (DESCRIPTOR_TYPE(transfer.setup.wValue)) { + switch (DESCRIPTOR_TYPE(_transfer.setup.wValue)) { case DEVICE_DESCRIPTOR: - if (deviceDesc() != NULL) { - if ((deviceDesc()[0] == DEVICE_DESCRIPTOR_LENGTH) \ - && (deviceDesc()[1] == DEVICE_DESCRIPTOR)) { + if (device_desc() != NULL) { + if ((device_desc()[0] == DEVICE_DESCRIPTOR_LENGTH) \ + && (device_desc()[1] == DEVICE_DESCRIPTOR)) { #ifdef DEBUG printf("device descr\r\n"); #endif - transfer.remaining = DEVICE_DESCRIPTOR_LENGTH; - transfer.ptr = (uint8_t *)deviceDesc(); - transfer.direction = DEVICE_TO_HOST; + _transfer.remaining = DEVICE_DESCRIPTOR_LENGTH; + _transfer.ptr = (uint8_t *)device_desc(); + _transfer.direction = Send; success = true; } } break; case CONFIGURATION_DESCRIPTOR: - if (configurationDesc() != NULL) { - if ((configurationDesc()[0] == CONFIGURATION_DESCRIPTOR_LENGTH) \ - && (configurationDesc()[1] == CONFIGURATION_DESCRIPTOR)) { + if (configuration_desc() != NULL) { + if ((configuration_desc()[0] == CONFIGURATION_DESCRIPTOR_LENGTH) \ + && (configuration_desc()[1] == CONFIGURATION_DESCRIPTOR)) { #ifdef DEBUG printf("conf descr request\r\n"); #endif /* Get wTotalLength */ - transfer.remaining = configurationDesc()[2] \ - | (configurationDesc()[3] << 8); + _transfer.remaining = configuration_desc()[2] \ + | (configuration_desc()[3] << 8); - transfer.ptr = (uint8_t *)configurationDesc(); - transfer.direction = DEVICE_TO_HOST; + _transfer.ptr = (uint8_t *)configuration_desc(); + _transfer.direction = Send; success = true; } } @@ -80,59 +94,59 @@ bool USBDevice::requestGetDescriptor(void) #ifdef DEBUG printf("str descriptor\r\n"); #endif - switch (DESCRIPTOR_INDEX(transfer.setup.wValue)) { + switch (DESCRIPTOR_INDEX(_transfer.setup.wValue)) { case STRING_OFFSET_LANGID: #ifdef DEBUG printf("1\r\n"); #endif - transfer.remaining = stringLangidDesc()[0]; - transfer.ptr = (uint8_t *)stringLangidDesc(); - transfer.direction = DEVICE_TO_HOST; + _transfer.remaining = string_langid_desc()[0]; + _transfer.ptr = (uint8_t *)string_langid_desc(); + _transfer.direction = Send; success = true; break; case STRING_OFFSET_IMANUFACTURER: #ifdef DEBUG printf("2\r\n"); #endif - transfer.remaining = stringImanufacturerDesc()[0]; - transfer.ptr = (uint8_t *)stringImanufacturerDesc(); - transfer.direction = DEVICE_TO_HOST; + _transfer.remaining = string_imanufacturer_desc()[0]; + _transfer.ptr = (uint8_t *)string_imanufacturer_desc(); + _transfer.direction = Send; success = true; break; case STRING_OFFSET_IPRODUCT: #ifdef DEBUG printf("3\r\n"); #endif - transfer.remaining = stringIproductDesc()[0]; - transfer.ptr = (uint8_t *)stringIproductDesc(); - transfer.direction = DEVICE_TO_HOST; + _transfer.remaining = string_iproduct_desc()[0]; + _transfer.ptr = (uint8_t *)string_iproduct_desc(); + _transfer.direction = Send; success = true; break; case STRING_OFFSET_ISERIAL: #ifdef DEBUG printf("4\r\n"); #endif - transfer.remaining = stringIserialDesc()[0]; - transfer.ptr = (uint8_t *)stringIserialDesc(); - transfer.direction = DEVICE_TO_HOST; + _transfer.remaining = string_iserial_desc()[0]; + _transfer.ptr = (uint8_t *)string_iserial_desc(); + _transfer.direction = Send; success = true; break; case STRING_OFFSET_ICONFIGURATION: #ifdef DEBUG printf("5\r\n"); #endif - transfer.remaining = stringIConfigurationDesc()[0]; - transfer.ptr = (uint8_t *)stringIConfigurationDesc(); - transfer.direction = DEVICE_TO_HOST; + _transfer.remaining = string_iconfiguration_desc()[0]; + _transfer.ptr = (uint8_t *)string_iconfiguration_desc(); + _transfer.direction = Send; success = true; break; case STRING_OFFSET_IINTERFACE: #ifdef DEBUG printf("6\r\n"); #endif - transfer.remaining = stringIinterfaceDesc()[0]; - transfer.ptr = (uint8_t *)stringIinterfaceDesc(); - transfer.direction = DEVICE_TO_HOST; + _transfer.remaining = string_iinterface_desc()[0]; + _transfer.ptr = (uint8_t *)string_iinterface_desc(); + _transfer.direction = Send; success = true; break; } @@ -157,9 +171,11 @@ bool USBDevice::requestGetDescriptor(void) return success; } -void USBDevice::decodeSetupPacket(uint8_t *data, SETUP_PACKET *packet) +void USBDevice::_decode_setup_packet(uint8_t *data, setup_packet_t *packet) { - /* Fill in the elements of a SETUP_PACKET structure from raw data */ + // No lock needed - stateless function + + /* Fill in the elements of a setup_packet_t structure from raw data */ packet->bmRequestType.dataTransferDirection = (data[0] & 0x80) >> 7; packet->bmRequestType.Type = (data[0] & 0x60) >> 5; packet->bmRequestType.Recipient = data[0] & 0x1f; @@ -170,189 +186,281 @@ void USBDevice::decodeSetupPacket(uint8_t *data, SETUP_PACKET *packet) } -bool USBDevice::controlOut(void) +bool USBDevice::_control_out() { + assert_locked(); + /* Control transfer data OUT stage */ - uint8_t buffer[MAX_PACKET_SIZE_EP0]; uint32_t packetSize; /* Check we should be transferring data OUT */ - if (transfer.direction != HOST_TO_DEVICE) { + if (_transfer.direction != Receive) { /* for other platforms, count on the HAL to handle this case */ return false; } /* Read from endpoint */ - packetSize = EP0getReadResult(buffer); + packetSize = _phy->ep0_read_result(_transfer.ptr, _transfer.remaining); /* Check if transfer size is valid */ - if (packetSize > transfer.remaining) { + if (packetSize > _transfer.remaining) { /* Too big */ return false; } /* Update transfer */ - transfer.ptr += packetSize; - transfer.remaining -= packetSize; + _transfer.ptr += packetSize; + _transfer.remaining -= packetSize; /* Check if transfer has completed */ - if (transfer.remaining == 0) { + if (_transfer.remaining == 0) { /* Transfer completed */ - if (transfer.notify) { + if (_transfer.notify) { /* Notify class layer. */ - USBCallback_requestCompleted(buffer, packetSize); - transfer.notify = false; + _transfer.notify = false; + _transfer.user_callback = true; + callback_request_xfer_done(&_transfer.setup, false); + } else { + complete_request_xfer_done(true); } - /* Status stage */ - EP0write(NULL, 0); } else { - EP0read(); + _phy->ep0_read(); } return true; } -bool USBDevice::controlIn(void) +bool USBDevice::_control_in() { + assert_locked(); + /* Control transfer data IN stage */ uint32_t packetSize; - /* Check if transfer has completed (status stage transactions */ - /* also have transfer.remaining == 0) */ - if (transfer.remaining == 0) { - if (transfer.zlp) { - /* Send zero length packet */ - EP0write(NULL, 0); - transfer.zlp = false; + + /* Check we should be transferring data IN */ + if (_transfer.direction != Send) { + return false; + } + + if (_transfer.remaining == 0) { + if (!_transfer.zlp) { + /* Status as already been sent so ignore this IN. */ + return true; } + /* ZLP will be sent below */ + _transfer.zlp = false; + } + + packetSize = _transfer.remaining; + if (packetSize > _max_packet_size_ep0) { + packetSize = _max_packet_size_ep0; + } + + /* Write to endpoint */ + _phy->ep0_write(_transfer.ptr, packetSize); + + /* Update transfer */ + _transfer.ptr += packetSize; + _transfer.remaining -= packetSize; + + /* Send status if all the data has been sent + * NOTE - Start the status stage immediately + * after writing the last packet. Do not wait + * for the next IN event, as this can be dropped + * if the ACK by the host is corrupted. + * + * For more info on this see section + * 8.5.3.2 of the USB2.0 specification. + */ + if ((_transfer.remaining == 0) && !_transfer.zlp) { /* Transfer completed */ - if (transfer.notify) { + if (_transfer.notify) { /* Notify class layer. */ - USBCallback_requestCompleted(NULL, 0); - transfer.notify = false; + _transfer.notify = false; + _transfer.user_callback = true; + callback_request_xfer_done(&_transfer.setup, false); + } else { + complete_request_xfer_done(true); } - EP0read(); - EP0readStage(); /* Completed */ return true; } - /* Check we should be transferring data IN */ - if (transfer.direction != DEVICE_TO_HOST) { - return false; - } - packetSize = transfer.remaining; + return true; +} + +void USBDevice::complete_request_xfer_done(bool success) +{ + lock(); - if (packetSize > MAX_PACKET_SIZE_EP0) { - packetSize = MAX_PACKET_SIZE_EP0; + _transfer.user_callback = false; + if (_abort_control) { + _control_abort(); + unlock(); + return; } - /* Write to endpoint */ - EP0write(transfer.ptr, packetSize); + if (!success) { + _phy->ep0_stall(); + unlock(); + return; + } - /* Update transfer */ - transfer.ptr += packetSize; - transfer.remaining -= packetSize; + /* Status stage */ + if (_transfer.stage == DataOut) { + _transfer.stage = Status; + _phy->ep0_write(NULL, 0); + } else if (_transfer.stage == DataIn) { + _transfer.stage = Status; + _phy->ep0_read(); + } - return true; + unlock(); } -bool USBDevice::requestSetAddress(void) +bool USBDevice::_request_set_address() { + assert_locked(); + /* Set the device address */ - setAddress(transfer.setup.wValue); + _phy->set_address(_transfer.setup.wValue); - if (transfer.setup.wValue == 0) { - device.state = DEFAULT; + if (_transfer.setup.wValue == 0) { + _change_state(Default); } else { - device.state = ADDRESS; + _change_state(Address); } return true; } -bool USBDevice::requestSetConfiguration(void) +bool USBDevice::_request_set_configuration() { + assert_locked(); - device.configuration = transfer.setup.wValue; + _device.configuration = _transfer.setup.wValue; /* Set the device configuration */ - if (device.configuration == 0) { + if (_device.configuration == 0) { /* Not configured */ - unconfigureDevice(); - device.state = ADDRESS; + _phy->unconfigure(); + _change_state(Address); } else { - if (USBCallback_setConfiguration(device.configuration)) { - /* Valid configuration */ - configureDevice(); - device.state = CONFIGURED; - } else { - return false; - } + _transfer.user_callback = true; + callback_set_configuration(_device.configuration); } return true; } -bool USBDevice::requestGetConfiguration(void) +void USBDevice::complete_set_configuration(bool success) { + lock(); + + _transfer.user_callback = false; + if (_abort_control) { + _control_abort(); + unlock(); + return; + } + + if (success) { + /* Valid configuration */ + _phy->configure(); + _change_state(Configured); + _control_setup_continue(); + } else { + _phy->ep0_stall(); + } + + unlock(); +} + +bool USBDevice::_request_get_configuration() +{ + assert_locked(); + /* Send the device configuration */ - transfer.ptr = &device.configuration; - transfer.remaining = sizeof(device.configuration); - transfer.direction = DEVICE_TO_HOST; + _transfer.ptr = &_device.configuration; + _transfer.remaining = sizeof(_device.configuration); + _transfer.direction = Send; return true; } -bool USBDevice::requestGetInterface(void) +bool USBDevice::_request_get_interface() { + assert_locked(); + /* Return the selected alternate setting for an interface */ - if (device.state != CONFIGURED) { + if (_device.state != Configured) { return false; } /* Send the alternate setting */ - transfer.setup.wIndex = currentInterface; - transfer.ptr = ¤tAlternate; - transfer.remaining = sizeof(currentAlternate); - transfer.direction = DEVICE_TO_HOST; + _transfer.setup.wIndex = _current_interface; + _transfer.ptr = &_current_alternate; + _transfer.remaining = sizeof(_current_alternate); + _transfer.direction = Send; return true; } -bool USBDevice::requestSetInterface(void) +bool USBDevice::_request_set_interface() { - bool success = false; - if (USBCallback_setInterface(transfer.setup.wIndex, transfer.setup.wValue)) { - success = true; - currentInterface = transfer.setup.wIndex; - currentAlternate = transfer.setup.wValue; + assert_locked(); + + _transfer.user_callback = true; + callback_set_interface(_transfer.setup.wIndex, _transfer.setup.wValue); + return true; +} + +void USBDevice::complete_set_interface(bool success) +{ + lock(); + + _transfer.user_callback = false; + if (_abort_control) { + _control_abort(); + unlock(); + return; } - return success; + + if (success) { + _current_interface = _transfer.setup.wIndex; + _current_alternate = _transfer.setup.wValue; + _control_setup_continue(); + } else { + _phy->ep0_stall(); + } + + unlock(); } -bool USBDevice::requestSetFeature() +bool USBDevice::_request_set_feature() { + assert_locked(); bool success = false; - if (device.state != CONFIGURED) { + if (_device.state != Configured) { /* Endpoint or interface must be zero */ - if (transfer.setup.wIndex != 0) { + if (_transfer.setup.wIndex != 0) { return false; } } - switch (transfer.setup.bmRequestType.Recipient) { + switch (_transfer.setup.bmRequestType.Recipient) { case DEVICE_RECIPIENT: /* TODO: Remote wakeup feature not supported */ break; case ENDPOINT_RECIPIENT: - if (transfer.setup.wValue == ENDPOINT_HALT) { - /* TODO: We should check that the endpoint number is valid */ - stallEndpoint( - WINDEX_TO_PHYSICAL(transfer.setup.wIndex)); + if (!EP_VALID(_transfer.setup.wIndex)) { + break; + } else if (_transfer.setup.wValue == ENDPOINT_HALT) { + _phy->endpoint_stall(_transfer.setup.wIndex); success = true; } break; @@ -363,25 +471,28 @@ bool USBDevice::requestSetFeature() return success; } -bool USBDevice::requestClearFeature() +bool USBDevice::_request_clear_feature() { + assert_locked(); + bool success = false; - if (device.state != CONFIGURED) { + if (_device.state != Configured) { /* Endpoint or interface must be zero */ - if (transfer.setup.wIndex != 0) { + if (_transfer.setup.wIndex != 0) { return false; } } - switch (transfer.setup.bmRequestType.Recipient) { + switch (_transfer.setup.bmRequestType.Recipient) { case DEVICE_RECIPIENT: /* TODO: Remote wakeup feature not supported */ break; case ENDPOINT_RECIPIENT: - /* TODO: We should check that the endpoint number is valid */ - if (transfer.setup.wValue == ENDPOINT_HALT) { - unstallEndpoint(WINDEX_TO_PHYSICAL(transfer.setup.wIndex)); + if (!EP_VALID(_transfer.setup.wIndex)) { + break; + } else if (_transfer.setup.wValue == ENDPOINT_HALT) { + _phy->endpoint_unstall(_transfer.setup.wIndex); success = true; } break; @@ -392,19 +503,21 @@ bool USBDevice::requestClearFeature() return success; } -bool USBDevice::requestGetStatus(void) +bool USBDevice::_request_get_status() { + assert_locked(); + static uint16_t status; bool success = false; - if (device.state != CONFIGURED) { + if (_device.state != Configured) { /* Endpoint or interface must be zero */ - if (transfer.setup.wIndex != 0) { + if (_transfer.setup.wIndex != 0) { return false; } } - switch (transfer.setup.bmRequestType.Recipient) { + switch (_transfer.setup.bmRequestType.Recipient) { case DEVICE_RECIPIENT: /* TODO: Currently only supports self powered devices */ status = DEVICE_STATUS_SELF_POWERED; @@ -415,9 +528,12 @@ bool USBDevice::requestGetStatus(void) success = true; break; case ENDPOINT_RECIPIENT: - /* TODO: We should check that the endpoint number is valid */ - if (getEndpointStallState( - WINDEX_TO_PHYSICAL(transfer.setup.wIndex))) { + if (!EP_VALID(_transfer.setup.wIndex)) { + break; + } else if (EP_CONTROL(_transfer.setup.wIndex)) { + /* Control endpoint can't be halted */ + status = 0; + } else if (_endpoint_info[EP_TO_INDEX(_transfer.setup.wIndex & 0xFF)].flags & ENDPOINT_STALLED) { status = ENDPOINT_STATUS_HALT; } else { status = 0; @@ -430,51 +546,53 @@ bool USBDevice::requestGetStatus(void) if (success) { /* Send the status */ - transfer.ptr = (uint8_t *)&status; /* Assumes little endian */ - transfer.remaining = sizeof(status); - transfer.direction = DEVICE_TO_HOST; + _transfer.ptr = (uint8_t *)&status; /* Assumes little endian */ + _transfer.remaining = sizeof(status); + _transfer.direction = Send; } return success; } -bool USBDevice::requestSetup(void) +bool USBDevice::_request_setup() { + assert_locked(); + bool success = false; /* Process standard requests */ - if ((transfer.setup.bmRequestType.Type == STANDARD_TYPE)) { - switch (transfer.setup.bRequest) { + if ((_transfer.setup.bmRequestType.Type == STANDARD_TYPE)) { + switch (_transfer.setup.bRequest) { case GET_STATUS: - success = requestGetStatus(); + success = _request_get_status(); break; case CLEAR_FEATURE: - success = requestClearFeature(); + success = _request_clear_feature(); break; case SET_FEATURE: - success = requestSetFeature(); + success = _request_set_feature(); break; case SET_ADDRESS: - success = requestSetAddress(); + success = _request_set_address(); break; case GET_DESCRIPTOR: - success = requestGetDescriptor(); + success = _request_get_descriptor(); break; case SET_DESCRIPTOR: /* TODO: Support is optional, not implemented here */ success = false; break; case GET_CONFIGURATION: - success = requestGetConfiguration(); + success = _request_get_configuration(); break; case SET_CONFIGURATION: - success = requestSetConfiguration(); + success = _request_set_configuration(); break; case GET_INTERFACE: - success = requestGetInterface(); + success = _request_get_interface(); break; case SET_INTERFACE: - success = requestSetInterface(); + success = _request_set_interface(); break; default: break; @@ -484,159 +602,330 @@ bool USBDevice::requestSetup(void) return success; } -bool USBDevice::controlSetup(void) +void USBDevice::_control_setup() { - bool success = false; + assert_locked(); /* Control transfer setup stage */ uint8_t buffer[MAX_PACKET_SIZE_EP0]; - EP0setup(buffer); + _phy->ep0_setup_read_result(buffer, MAX_PACKET_SIZE_EP0); /* Initialise control transfer state */ - decodeSetupPacket(buffer, &transfer.setup); - transfer.ptr = NULL; - transfer.remaining = 0; - transfer.direction = 0; - transfer.zlp = false; - transfer.notify = false; + _decode_setup_packet(buffer, &_transfer.setup); + _transfer.ptr = NULL; + _transfer.remaining = 0; + _transfer.direction = 0; + _transfer.zlp = false; + _transfer.notify = false; + _transfer.stage = Setup; #ifdef DEBUG - printf("dataTransferDirection: %d\r\nType: %d\r\nRecipient: %d\r\nbRequest: %d\r\nwValue: %d\r\nwIndex: %d\r\nwLength: %d\r\n", transfer.setup.bmRequestType.dataTransferDirection, - transfer.setup.bmRequestType.Type, - transfer.setup.bmRequestType.Recipient, - transfer.setup.bRequest, - transfer.setup.wValue, - transfer.setup.wIndex, - transfer.setup.wLength); + printf("dataTransferDirection: %d\r\nType: %d\r\nRecipient: %d\r\nbRequest: %d\r\nwValue: %d\r\nwIndex: %d\r\nwLength: %d\r\n", _transfer.setup.bmRequestType.dataTransferDirection, + _transfer.setup.bmRequestType.Type, + _transfer.setup.bmRequestType.Recipient, + _transfer.setup.bRequest, + _transfer.setup.wValue, + _transfer.setup.wIndex, + _transfer.setup.wLength); #endif /* Class / vendor specific */ - success = USBCallback_request(); + callback_request(&_transfer.setup); +} - if (!success) { +void USBDevice::complete_request(RequestResult direction, uint8_t *data, uint32_t size) +{ + lock(); + + _transfer.user_callback = false; + if (_abort_control) { + if ((direction == Receive) || (direction == Send)) { + _transfer.user_callback = true; + callback_request_xfer_done(&_transfer.setup, true); + } else { + _control_abort(); + } + unlock(); + return; + } + + if (direction == PassThrough) { /* Standard requests */ - if (!requestSetup()) { -#ifdef DEBUG - printf("fail!!!!\r\n"); -#endif - return false; + if (!_request_setup()) { + _phy->ep0_stall(); } + + /* user_callback may be set by _request_setup() */ + if (!_transfer.user_callback) { + _control_setup_continue(); + } + } else if (direction == Failure) { + _phy->ep0_stall(); + } else { + _transfer.notify = true; + _transfer.remaining = size; + _transfer.ptr = data; + _transfer.direction = direction; + _control_setup_continue(); + } + + unlock(); +} + +void USBDevice::_control_abort_start() +{ + assert_locked(); + + _setup_ready = false; + if (_transfer.user_callback) { + _abort_control = true; + } else { + _control_abort(); } +} + +void USBDevice::_control_setup_continue() +{ + assert_locked(); /* Check transfer size and direction */ - if (transfer.setup.wLength > 0) { - if (transfer.setup.bmRequestType.dataTransferDirection \ - == DEVICE_TO_HOST) { + if (_transfer.setup.wLength > 0) { + if (_transfer.setup.bmRequestType.dataTransferDirection \ + == Send) { /* IN data stage is required */ - if (transfer.direction != DEVICE_TO_HOST) { - return false; + if (_transfer.direction != Send) { + _phy->ep0_stall(); + return; } /* Transfer must be less than or equal to the size */ /* requested by the host */ - if (transfer.remaining > transfer.setup.wLength) { - transfer.remaining = transfer.setup.wLength; + if (_transfer.remaining > _transfer.setup.wLength) { + _transfer.remaining = _transfer.setup.wLength; } } else { /* OUT data stage is required */ - if (transfer.direction != HOST_TO_DEVICE) { - return false; + if (_transfer.direction != Receive) { + _phy->ep0_stall(); + return; } /* Transfer must be equal to the size requested by the host */ - if (transfer.remaining != transfer.setup.wLength) { - return false; + if (_transfer.remaining != _transfer.setup.wLength) { + _phy->ep0_stall(); + return; } } } else { /* No data stage; transfer size must be zero */ - if (transfer.remaining != 0) { - return false; + if (_transfer.remaining != 0) { + _phy->ep0_stall(); + return; } } /* Data or status stage if applicable */ - if (transfer.setup.wLength > 0) { - if (transfer.setup.bmRequestType.dataTransferDirection \ - == DEVICE_TO_HOST) { + if (_transfer.setup.wLength > 0) { + if (_transfer.setup.bmRequestType.dataTransferDirection \ + == Send) { /* Check if we'll need to send a zero length packet at */ /* the end of this transfer */ - if (transfer.setup.wLength > transfer.remaining) { + if (_transfer.setup.wLength > _transfer.remaining) { /* Device wishes to transfer less than host requested */ - if ((transfer.remaining % MAX_PACKET_SIZE_EP0) == 0) { + if ((_transfer.remaining % MAX_PACKET_SIZE_EP0) == 0) { /* Transfer is a multiple of EP0 max packet size */ - transfer.zlp = true; + _transfer.zlp = true; } } /* IN stage */ - controlIn(); + _transfer.stage = DataIn; + _control_in(); } else { /* OUT stage */ - EP0read(); + _transfer.stage = DataOut; + _phy->ep0_read(); } } else { /* Status stage */ - EP0write(NULL, 0); + _transfer.stage = Status; + _phy->ep0_write(NULL, 0); } +} - return true; +void USBDevice::_control_abort() +{ + assert_locked(); + + _abort_control = false; + _transfer.stage = Status; } -void USBDevice::busReset(void) +void USBDevice::reset() { - device.state = DEFAULT; - device.configuration = 0; - device.suspended = false; + assert_locked(); + + _change_state(Default); + _device.suspended = false; + _control_abort_start(); /* Call class / vendor specific busReset function */ - USBCallback_busReset(); + callback_reset(); } -void USBDevice::EP0setupCallback(void) +void USBDevice::ep0_setup() { + assert_locked(); + + if (_device.state < Default) { + MBED_ASSERT(0); + return; + } + + _setup_ready = true; + /* Endpoint 0 setup event */ - if (!controlSetup()) { - /* Protocol stall */ - EP0stall(); + if (_transfer.user_callback) { + /* A new setup packet has arrived so abort the + current control transfer */ + _abort_control = true; + } else { + _control_setup(); } - /* Return true if an OUT data stage is expected */ } -void USBDevice::EP0out(void) +void USBDevice::ep0_out() { + assert_locked(); + + if (_device.state < Default) { + MBED_ASSERT(0); + return; + } + + if (_transfer.user_callback) { + /* EP0 OUT should not receive data if the stack is waiting + on a user callback for the buffer to fill or status */ + MBED_ASSERT(0); + return; + } + + if (_transfer.stage == Status) { + // No action needed on status stage + return; + } + /* Endpoint 0 OUT data event */ - if (!controlOut()) { + if (!_control_out()) { /* Protocol stall; this will stall both endpoints */ - EP0stall(); + _phy->ep0_stall(); } } -void USBDevice::EP0in(void) +void USBDevice::ep0_in() { + assert_locked(); + + if (_device.state < Default) { + MBED_ASSERT(0); + return; + } + #ifdef DEBUG - printf("EP0IN\r\n"); + printf("ep0_in\r\n"); #endif + if (_transfer.stage == Status) { + // No action needed on status stage + return; + } + /* Endpoint 0 IN data event */ - if (!controlIn()) { + if (!_control_in()) { /* Protocol stall; this will stall both endpoints */ - EP0stall(); + _phy->ep0_stall(); + } +} + +void USBDevice::out(usb_ep_t endpoint) +{ + assert_locked(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + return; + } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + + info->pending += 1; + if (info->callback) { + (this->*(info->callback))(endpoint); + } +} + +void USBDevice::in(usb_ep_t endpoint) +{ + assert_locked(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + return; } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + + MBED_ASSERT(info->pending >= 1); + info->pending -= 1; + if (info->callback) { + (this->*(info->callback))(endpoint); + } +} + +void USBDevice::init() +{ + lock(); + + if (!_initialized) { + this->_phy->init(this); + _max_packet_size_ep0 = this->_phy->ep0_set_max_packet(MAX_PACKET_SIZE_EP0); + _initialized = true; + } + + unlock(); } -bool USBDevice::configured(void) +void USBDevice::deinit() { - /* Returns true if device is in the CONFIGURED state */ - return (device.state == CONFIGURED); + lock(); + + if (_initialized) { + this->_phy->deinit(); + _initialized = false; + } + + unlock(); +} + +bool USBDevice::configured() +{ + lock(); + + /* Returns true if device is in the Configured state */ + bool ret = (_device.state == Configured); + + unlock(); + return ret; } void USBDevice::connect(bool blocking) { /* Connect device */ - USBHAL::connect(); + lock(); + _phy->connect(); + unlock(); if (blocking) { /* Block if not configured */ @@ -644,51 +933,148 @@ void USBDevice::connect(bool blocking) } } -void USBDevice::disconnect(void) +void USBDevice::disconnect() { + lock(); + /* Disconnect device */ - USBHAL::disconnect(); + _phy->disconnect(); /* Set initial device state */ - device.state = POWERED; - device.configuration = 0; - device.suspended = false; + if (_device.state > Powered) { + _change_state(Powered); + } + //TODO - remove these? + _device.configuration = 0; + _device.suspended = false; + + unlock(); } -CONTROL_TRANSFER *USBDevice::getTransferPtr(void) +void USBDevice::sof_enable() { - return &transfer; + lock(); + + _phy->sof_enable(); + + unlock(); } -bool USBDevice::addEndpoint(uint8_t endpoint, uint32_t maxPacket) +void USBDevice::sof_disable() { - return realiseEndpoint(endpoint, maxPacket, 0); + lock(); + + _phy->sof_disable(); + + unlock(); } -bool USBDevice::addRateFeedbackEndpoint(uint8_t endpoint, uint32_t maxPacket) +bool USBDevice::endpoint_add(usb_ep_t endpoint, uint32_t max_packet_size, usb_ep_type_t type, ep_cb_t callback) { - /* For interrupt endpoints only */ - return realiseEndpoint(endpoint, maxPacket, RATE_FEEDBACK_MODE); + lock(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); + return false; + } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + MBED_ASSERT(!(info->flags & ENDPOINT_ENABLED)); + MBED_ASSERT(max_packet_size <= 1024); + + bool ret = false; + if (_phy->endpoint_add(endpoint, max_packet_size, type)) { + info->callback = callback; + info->flags |= ENDPOINT_ENABLED; + info->pending = 0; + info->max_packet_size = max_packet_size; + ret = true; + } + + unlock(); + return ret; } -uint8_t *USBDevice::findDescriptor(uint8_t descriptorType) +void USBDevice::endpoint_remove(usb_ep_t endpoint) +{ + lock(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); + return; + } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + MBED_ASSERT(info->flags & ENDPOINT_ENABLED); + + info->callback = NULL; + info->flags = 0; + info->pending = 0; + info->max_packet_size = 0; + + _phy->endpoint_remove(endpoint); + + unlock(); +} + +void USBDevice::endpoint_stall(usb_ep_t endpoint) +{ + lock(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); + return; + } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + MBED_ASSERT(info->flags & ENDPOINT_ENABLED); + + info->flags |= ENDPOINT_STALLED; + _phy->endpoint_stall(endpoint); + + unlock(); +} + +void USBDevice::endpoint_unstall(usb_ep_t endpoint) +{ + lock(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); + return; + } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + MBED_ASSERT(info->flags & ENDPOINT_ENABLED); + + info->flags &= ~ENDPOINT_STALLED; + _phy->endpoint_unstall(endpoint); + + unlock(); +} + +uint8_t *USBDevice::find_descriptor(uint8_t descriptorType) { /* Find a descriptor within the list of descriptors */ /* following a configuration descriptor. */ uint16_t wTotalLength; uint8_t *ptr; - if (configurationDesc() == NULL) { + if (configuration_desc() == NULL) { return NULL; } /* Check this is a configuration descriptor */ - if ((configurationDesc()[0] != CONFIGURATION_DESCRIPTOR_LENGTH) \ - || (configurationDesc()[1] != CONFIGURATION_DESCRIPTOR)) { + if ((configuration_desc()[0] != CONFIGURATION_DESCRIPTOR_LENGTH) \ + || (configuration_desc()[1] != CONFIGURATION_DESCRIPTOR)) { return NULL; } - wTotalLength = configurationDesc()[2] | (configurationDesc()[3] << 8); + wTotalLength = configuration_desc()[2] | (configuration_desc()[3] << 8); /* Check there are some more descriptors to follow */ if (wTotalLength <= (CONFIGURATION_DESCRIPTOR_LENGTH + 2)) @@ -698,7 +1084,7 @@ uint8_t *USBDevice::findDescriptor(uint8_t descriptorType) } /* Start at first descriptor after the configuration descriptor */ - ptr = &(((uint8_t *)configurationDesc())[CONFIGURATION_DESCRIPTOR_LENGTH]); + ptr = &(((uint8_t *)configuration_desc())[CONFIGURATION_DESCRIPTOR_LENGTH]); do { if (ptr[1] /* bDescriptorType */ == descriptorType) { @@ -708,131 +1094,214 @@ uint8_t *USBDevice::findDescriptor(uint8_t descriptorType) /* Skip to next descriptor */ ptr += ptr[0]; /* bLength */ - } while (ptr < (configurationDesc() + wTotalLength)); + } while (ptr < (configuration_desc() + wTotalLength)); /* Reached end of the descriptors - not found */ return NULL; } +const usb_ep_table_t *USBDevice::endpoint_table() +{ + return _phy->endpoint_table(); +} + +void USBDevice::power(bool powered) +{ + assert_locked(); + + if (!powered && _device.state > Attached) { + _change_state(Attached); + } +} -void USBDevice::connectStateChanged(unsigned int connected) +void USBDevice::suspend(bool suspended) { } -void USBDevice::suspendStateChanged(unsigned int suspended) +void USBDevice::sof(int frame_number) { + callback_sof(frame_number); } -USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release) +USBDevice::USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) { - VENDOR_ID = vendor_id; - PRODUCT_ID = product_id; - PRODUCT_RELEASE = product_release; + this->vendor_id = vendor_id; + this->product_id = product_id; + this->product_release = product_release; + + memset(_endpoint_info, 0, sizeof(_endpoint_info)); + + _setup_ready = false; + _abort_control = false; + + _phy = phy; + _initialized = false; + _current_interface = 0; + _current_alternate = 0; + _locked = 0; /* Set initial device state */ - device.state = POWERED; - device.configuration = 0; - device.suspended = false; + _device.state = Powered; + _device.configuration = 0; + _device.suspended = false; }; - -bool USBDevice::readStart(uint8_t endpoint, uint32_t maxSize) +USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release) { - return endpointRead(endpoint, maxSize) == EP_PENDING; -} + this->vendor_id = vendor_id; + this->product_id = product_id; + this->product_release = product_release; + + memset(_endpoint_info, 0, sizeof(_endpoint_info)); + _setup_ready = false; + _abort_control = false; -bool USBDevice::write(uint8_t endpoint, uint8_t *buffer, uint32_t size, uint32_t maxSize) + _phy = get_usb_phy(); + _initialized = false; + _current_interface = 0; + _current_alternate = 0; + _locked = 0; + + /* Set initial device state */ + _device.state = Powered; + _device.configuration = 0; + _device.suspended = false; +}; + +uint32_t USBDevice::endpoint_max_packet_size(usb_ep_t endpoint) { - EP_STATUS result; + lock(); - if (size > maxSize) { - return false; + uint32_t size = 0; + if (EP_CONTROL(endpoint)) { + size = _max_packet_size_ep0; + } else { + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + size = info->max_packet_size; } + unlock(); + return size; +} - if (!configured()) { +bool USBDevice::read_start(usb_ep_t endpoint) +{ + lock(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); return false; } - /* Send report */ - result = endpointWrite(endpoint, buffer, size); + if(!configured()) { + unlock(); + return false; + } - if (result != EP_PENDING) { + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + if (!(info->flags & ENDPOINT_ENABLED)) { + // Invalid endpoint is being used + MBED_ASSERT(0); + unlock(); return false; } - /* Wait for completion */ - do { - result = endpointWriteResult(endpoint); - } while ((result == EP_PENDING) && configured()); + bool ret = _phy->endpoint_read(endpoint, info->max_packet_size); - return (result == EP_COMPLETED); + unlock(); + return ret; } - -bool USBDevice::writeNB(uint8_t endpoint, uint8_t *buffer, uint32_t size, uint32_t maxSize) +bool USBDevice::read_finish(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint32_t *size) { - EP_STATUS result; + lock(); - if (size > maxSize) { + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); return false; } if (!configured()) { + unlock(); return false; } - /* Send report */ - result = endpointWrite(endpoint, buffer, size); + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + if (!(info->flags & ENDPOINT_ENABLED)) { + // Invalid endpoint is being used + MBED_ASSERT(0); + unlock(); + return false; + } - if (result != EP_PENDING) { + if (max_size < info->max_packet_size) { + MBED_ASSERT(0); + unlock(); return false; } - result = endpointWriteResult(endpoint); + bool ret = _phy->endpoint_read_result(endpoint, buffer, max_size, size); + if (ret) { + info->pending -= 1; + } - return (result == EP_COMPLETED); + unlock(); + return ret; } - - -bool USBDevice::readEP(uint8_t endpoint, uint8_t *buffer, uint32_t *size, uint32_t maxSize) +bool USBDevice::write(usb_ep_t endpoint, uint8_t *buffer, uint32_t size) { - EP_STATUS result; + lock(); - if (!configured()) { + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); return false; } - /* Wait for completion */ - do { - result = endpointReadResult(endpoint, buffer, size); - } while ((result == EP_PENDING) && configured()); - - return (result == EP_COMPLETED); -} + if (!configured()) { + unlock(); + return false; + } + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + if (!(info->flags & ENDPOINT_ENABLED)) { + // Invalid endpoint is being used + MBED_ASSERT(0); + unlock(); + return false; + } -bool USBDevice::readEP_NB(uint8_t endpoint, uint8_t *buffer, uint32_t *size, uint32_t maxSize) -{ - EP_STATUS result; + if (size > info->max_packet_size) { + // Size being written is too large + MBED_ASSERT(0); + unlock(); + return false; + } - if (!configured()) { + if (info->pending) { + // Only allow 1 packet + unlock(); return false; } - result = endpointReadResult(endpoint, buffer, size); + /* Send report */ + bool ret = _phy->endpoint_write(endpoint, buffer, size); + if (ret) { + info->pending += 1; + } - return (result == EP_COMPLETED); + unlock(); + return ret; } - - -const uint8_t *USBDevice::deviceDesc() +const uint8_t *USBDevice::device_desc() { - uint8_t deviceDescriptorTemp[] = { + uint8_t device_descriptor_temp[] = { DEVICE_DESCRIPTOR_LENGTH, /* bLength */ DEVICE_DESCRIPTOR, /* bDescriptorType */ LSB(USB_VERSION_2_0), /* bcdUSB (LSB) */ @@ -840,79 +1309,133 @@ const uint8_t *USBDevice::deviceDesc() 0x00, /* bDeviceClass */ 0x00, /* bDeviceSubClass */ 0x00, /* bDeviceprotocol */ - MAX_PACKET_SIZE_EP0, /* bMaxPacketSize0 */ - (uint8_t)(LSB(VENDOR_ID)), /* idVendor (LSB) */ - (uint8_t)(MSB(VENDOR_ID)), /* idVendor (MSB) */ - (uint8_t)(LSB(PRODUCT_ID)), /* idProduct (LSB) */ - (uint8_t)(MSB(PRODUCT_ID)), /* idProduct (MSB) */ - (uint8_t)(LSB(PRODUCT_RELEASE)), /* bcdDevice (LSB) */ - (uint8_t)(MSB(PRODUCT_RELEASE)), /* bcdDevice (MSB) */ + (uint8_t)_max_packet_size_ep0, /* bMaxPacketSize0 */ + (uint8_t)(LSB(vendor_id)), /* idVendor (LSB) */ + (uint8_t)(MSB(vendor_id)), /* idVendor (MSB) */ + (uint8_t)(LSB(product_id)), /* idProduct (LSB) */ + (uint8_t)(MSB(product_id)), /* idProduct (MSB) */ + (uint8_t)(LSB(product_release)), /* bcdDevice (LSB) */ + (uint8_t)(MSB(product_release)), /* bcdDevice (MSB) */ STRING_OFFSET_IMANUFACTURER, /* iManufacturer */ STRING_OFFSET_IPRODUCT, /* iProduct */ STRING_OFFSET_ISERIAL, /* iSerialNumber */ 0x01 /* bNumConfigurations */ }; - MBED_ASSERT(sizeof(deviceDescriptorTemp) == sizeof(deviceDescriptor)); - memcpy(deviceDescriptor, deviceDescriptorTemp, sizeof(deviceDescriptor)); - return deviceDescriptor; + MBED_ASSERT(sizeof(device_descriptor_temp) == sizeof(device_descriptor)); + memcpy(device_descriptor, device_descriptor_temp, sizeof(device_descriptor)); + return device_descriptor; } -const uint8_t *USBDevice::stringLangidDesc() +const uint8_t *USBDevice::string_langid_desc() { - static const uint8_t stringLangidDescriptor[] = { + static const uint8_t string_langid_descriptor[] = { 0x04, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ 0x09, 0x04, /*bString Lang ID - 0x0409 - English*/ }; - return (uint8_t *)stringLangidDescriptor; + return string_langid_descriptor; } -const uint8_t *USBDevice::stringImanufacturerDesc() +const uint8_t *USBDevice::string_imanufacturer_desc() { - static const uint8_t stringImanufacturerDescriptor[] = { + static const uint8_t string_imanufacturer_descriptor[] = { 0x12, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ 'm', 0, 'b', 0, 'e', 0, 'd', 0, '.', 0, 'o', 0, 'r', 0, 'g', 0, /*bString iManufacturer - mbed.org*/ }; - return stringImanufacturerDescriptor; + return string_imanufacturer_descriptor; } -const uint8_t *USBDevice::stringIserialDesc() +const uint8_t *USBDevice::string_iserial_desc() { - static const uint8_t stringIserialDescriptor[] = { + static const uint8_t string_iserial_descriptor[] = { 0x16, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ '0', 0, '1', 0, '2', 0, '3', 0, '4', 0, '5', 0, '6', 0, '7', 0, '8', 0, '9', 0, /*bString iSerial - 0123456789*/ }; - return stringIserialDescriptor; + return string_iserial_descriptor; } -const uint8_t *USBDevice::stringIConfigurationDesc() +const uint8_t *USBDevice::string_iconfiguration_desc() { - static const uint8_t stringIconfigurationDescriptor[] = { + static const uint8_t string_iconfiguration_descriptor[] = { 0x06, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ '0', 0, '1', 0, /*bString iConfiguration - 01*/ }; - return stringIconfigurationDescriptor; + return string_iconfiguration_descriptor; } -const uint8_t *USBDevice::stringIinterfaceDesc() +const uint8_t *USBDevice::string_iinterface_desc() { - static const uint8_t stringIinterfaceDescriptor[] = { + static const uint8_t string_iinterface_descriptor[] = { 0x08, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ 'U', 0, 'S', 0, 'B', 0, /*bString iInterface - USB*/ }; - return stringIinterfaceDescriptor; + return string_iinterface_descriptor; } -const uint8_t *USBDevice::stringIproductDesc() +const uint8_t *USBDevice::string_iproduct_desc() { - static const uint8_t stringIproductDescriptor[] = { + static const uint8_t string_iproduct_descriptor[] = { 0x16, /*bLength*/ STRING_DESCRIPTOR, /*bDescriptorType 0x03*/ 'U', 0, 'S', 0, 'B', 0, ' ', 0, 'D', 0, 'E', 0, 'V', 0, 'I', 0, 'C', 0, 'E', 0 /*bString iProduct - USB DEVICE*/ }; - return stringIproductDescriptor; + return string_iproduct_descriptor; +} + +void USBDevice::start_process() +{ + lock(); + + _phy->process(); + + unlock(); +} + +void USBDevice::lock() +{ + core_util_critical_section_enter(); + _locked++; + MBED_ASSERT(_locked > 0); +} + +void USBDevice::unlock() +{ + MBED_ASSERT(_locked > 0); + _locked--; + core_util_critical_section_exit(); +} + +void USBDevice::assert_locked() +{ + MBED_ASSERT(_locked > 0); +} + +void USBDevice::_change_state(DeviceState new_state) { + assert_locked(); + + DeviceState old_state = _device.state; + _device.state = new_state; + + if (old_state == new_state) { + return; + } + + bool leaving_configured_state = (old_state >= Configured) && (new_state < Configured); + bool leaving_default_state = (old_state >= Default) && (new_state < Default); + + if (leaving_configured_state) { + memset(_endpoint_info, 0, sizeof(_endpoint_info)); + _device.configuration = 0; + } + + if (leaving_default_state) { + /* Abort any pending control transfers */ + _control_abort_start(); + } + + callback_state_change(new_state); } diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 9ee962841de..371359fa8b0 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -19,170 +19,241 @@ #include "mbed.h" #include "USBDevice_Types.h" -#include "USBHAL.h" +#include "USBPhy.h" +#include "mbed_critical.h" -class USBDevice: public USBHAL { +/** + * \defgroup usb_device USB Device + * + */ + +/** + * \defgroup usb_device_core Core + * + * @ingroup usb_device + */ + +/** + * Core USB Device driver + * + * USB driver which wraps and provides synchronization for a USBPhy object. + * + * @ingroup usb_device_core + */ +class USBDevice: public USBPhyEvents { public: + typedef void (USBDevice::*ep_cb_t)(usb_ep_t endpoint); + + enum RequestResult { + Receive = 0, + Send = 1, + Success = 2, + Failure = 3, + PassThrough = 4, + }; + + enum DeviceState { + Attached, + Powered, + Default, + Address, + Configured + }; + + struct setup_packet_t { + struct { + uint8_t dataTransferDirection; + uint8_t Type; + uint8_t Recipient; + } bmRequestType; + uint8_t bRequest; + uint16_t wValue; + uint16_t wIndex; + uint16_t wLength; + }; + + /** + * Instantiate a new USBDevice with the given parameters + * + * This function uses a target's built in USBPhy. + * + * @param vendor_id The USB vendor ID + * @param product_id The USB product ID + * @param product_release The device release number + */ USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release); - /* + /** + * Instantiate a new USBDevice with the given parameters + * + * @param phy The USBPhy providing physical USB access + * @param vendor_id The USB vendor ID + * @param product_id The USB product ID + * @param product_release The device release number + */ + USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); + + /** + * Initialize this instance + * + * This function must be called before calling + * any other functions of this class, unless specifically + */ + void init(); + + /** + * Power down this instance + * + * Disable interrupts and stop sending events. + */ + void deinit(); + + /** * Check if the device is configured * * @returns true if configured, false otherwise */ - bool configured(void); + bool configured(); - /* + /** * Connect a device * * @param blocking: block if not configured */ void connect(bool blocking = true); - /* + /** * Disconnect a device */ - void disconnect(void); + void disconnect(); - /* - * Add an endpoint - * - * @param endpoint endpoint which will be added - * @param maxPacket Maximum size of a packet which can be sent for this endpoint - * @returns true if successful, false otherwise - */ - bool addEndpoint(uint8_t endpoint, uint32_t maxPacket); + /** + * Enable the start of frame interrupt + * + * Call USBDevice::callback_sof on every frame. + */ + void sof_enable(); - /* - * Start a reading on a certain endpoint. - * You can access the result of the reading by USBDevice_read - * - * @param endpoint endpoint which will be read - * @param maxSize the maximum length that can be read - * @return true if successful - */ - bool readStart(uint8_t endpoint, uint32_t maxSize); + /** + * Disable the start of frame interrupt + * + * Stop calling USBDevice::callback_sof. + */ + void sof_disable(); - /* - * Read a certain endpoint. Before calling this function, USBUSBDevice_readStart - * must be called. - * - * Warning: blocking + /** + * Add an endpoint * - * @param endpoint endpoint which will be read - * @param buffer buffer will be filled with the data received - * @param size the number of bytes read will be stored in *size - * @param maxSize the maximum length that can be read - * @returns true if successful + * @param endpoint Endpoint to enable + * @param max_packet Maximum size of a packet which can be sent or received on this endpoint + * @param type Endpoint type - USB_EP_TYPE_BULK, USB_EP_TYPE_INT or USB_EP_TYPE_ISO + * @param callback Method pointer to be called when a packet is transferred + * @returns true if successful, false otherwise */ - bool readEP(uint8_t endpoint, uint8_t *buffer, uint32_t *size, uint32_t maxSize); + bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type, ep_cb_t callback = NULL); - /* - * Read a certain endpoint. - * - * Warning: non blocking + /** + * Add an endpoint * - * @param endpoint endpoint which will be read - * @param buffer buffer will be filled with the data received (if data are available) - * @param size the number of bytes read will be stored in *size - * @param maxSize the maximum length that can be read - * @returns true if successful + * @param endpoint Endpoint to enable + * @param max_packet Maximum size of a packet which can be sent or received on this endpoint + * @param type Endpoint type - USB_EP_TYPE_BULK, USB_EP_TYPE_INT or USB_EP_TYPE_ISO + * @param callback Method pointer to be called when a packet is transferred + * @returns true if successful, false otherwise */ - bool readEP_NB(uint8_t endpoint, uint8_t *buffer, uint32_t *size, uint32_t maxSize); + template + bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type, void (T::*callback)(usb_ep_t endpoint)) + { + return endpoint_add(endpoint, max_packet, type, static_cast(callback)); + } - /* - * Write a certain endpoint. - * - * Warning: blocking + /** + * Remove an endpoint * - * @param endpoint endpoint to write - * @param buffer data contained in buffer will be write - * @param size the number of bytes to write - * @param maxSize the maximum length that can be written on this endpoint + * @param endpoint Endpoint to disable + * @note This endpoint must already have been setup with endpoint_add */ - bool write(uint8_t endpoint, uint8_t *buffer, uint32_t size, uint32_t maxSize); + void endpoint_remove(usb_ep_t endpoint); - - /* - * Write a certain endpoint. + /** + * Stall an endpoint * - * Warning: non blocking - * - * @param endpoint endpoint to write - * @param buffer data contained in buffer will be write - * @param size the number of bytes to write - * @param maxSize the maximum length that can be written on this endpoint + * @param endpoint Endpoint to stall + * @note You cannot stall endpoint 0 with this function + * @note This endpoint must already have been setup with endpoint_add */ - bool writeNB(uint8_t endpoint, uint8_t *buffer, uint32_t size, uint32_t maxSize); - + void endpoint_stall(usb_ep_t endpoint); - /* - * Called by USBDevice layer on bus reset. Warning: Called in ISR context + /** + * Unstall an endpoint * - * May be used to reset state + * @param endpoint Endpoint to unstall + * @note This endpoint must already have been setup with endpoint_add */ - virtual void USBCallback_busReset(void) {}; + void endpoint_unstall(usb_ep_t endpoint); - /* - * Called by USBDevice on Endpoint0 request. Warning: Called in ISR context - * This is used to handle extensions to standard requests - * and class specific requests - * - * @returns true if class handles this request - */ - virtual bool USBCallback_request() - { - return false; - }; + /** + * Get the current maximum size for this endpoint + * + * Return the currently configured maximum packet size, wMaxPacketSize, + * for this endpoint. + * @note This endpoint must already have been setup with endpoint_add + */ + uint32_t endpoint_max_packet_size(usb_ep_t endpoint); - /* - * Called by USBDevice on Endpoint0 request completion - * if the 'notify' flag has been set to true. Warning: Called in ISR context - * - * In this case it is used to indicate that a HID report has - * been received from the host on endpoint 0 - * - * @param buf buffer received on endpoint 0 - * @param length length of this buffer - */ - virtual void USBCallback_requestCompleted(uint8_t *buf, uint32_t length) {}; + /** Start a read on the given endpoint + * + * After the read is finished call read_start to get the result. + * + * @param endpoint endpoint to perform the read on + * @return true if the read was started, false if no more reads can be started + * @note This endpoint must already have been setup with endpoint_add + */ + bool read_start(usb_ep_t endpoint); - /* - * Called by USBDevice layer. Set configuration of the device. - * For instance, you can add all endpoints that you need on this function. - * - * @param configuration Number of the configuration - */ - virtual bool USBCallback_setConfiguration(uint8_t configuration) - { - return false; - }; + /** + * Finish a read on the given endpoint + * + * Get the contents of a read started with read_start. To ensure all + * the data from this endpoint is read make sure the buffer and size + * passed is at least as big as the maximum packet for this endpoint. + * + * @param endpoint endpoint to read data from + * @param buffer buffer to fill with read data + * @param max_size the total size of the data buffer. This must be at least + * the max packet size of this endpoint + * @param size The size of data that was read + * @return true if the read was completed, otherwise false + * @note This endpoint must already have been setup with endpoint_add + */ + bool read_finish(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint32_t *size); - /* - * Called by USBDevice layer. Set interface/alternate of the device. + /** + * Write a data to the given endpoint + * + * Write data to an endpoint. * - * @param interface Number of the interface to be configured - * @param alternate Number of the alternate to be configured - * @returns true if class handles this request + * @param endpoint endpoint to write data to + * @param buffer data to write + * @param size the size of data to send. This must be less than or equal to the + * max packet size of this endpoint + * @note This endpoint must already have been setup with endpoint_add */ - virtual bool USBCallback_setInterface(uint16_t interface, uint8_t alternate) - { - return false; - }; + bool write(usb_ep_t endpoint, uint8_t *buffer, uint32_t size); /* * Get device descriptor. * * @returns pointer to the device descriptor */ - virtual const uint8_t *deviceDesc(); + virtual const uint8_t *device_desc(); /* * Get configuration descriptor * * @returns pointer to the configuration descriptor */ - virtual const uint8_t *configurationDesc() + virtual const uint8_t *configuration_desc() { return NULL; }; @@ -192,93 +263,308 @@ class USBDevice: public USBHAL { * * @return pointer to the string lang id descriptor */ - virtual const uint8_t *stringLangidDesc(); + virtual const uint8_t *string_langid_desc(); /* * Get string manufacturer descriptor * * @returns pointer to the string manufacturer descriptor */ - virtual const uint8_t *stringImanufacturerDesc(); + virtual const uint8_t *string_imanufacturer_desc(); /* * Get string product descriptor * * @returns pointer to the string product descriptor */ - virtual const uint8_t *stringIproductDesc(); + virtual const uint8_t *string_iproduct_desc(); /* * Get string serial descriptor * * @returns pointer to the string serial descriptor */ - virtual const uint8_t *stringIserialDesc(); + virtual const uint8_t *string_iserial_desc(); /* * Get string configuration descriptor * * @returns pointer to the string configuration descriptor */ - virtual const uint8_t *stringIConfigurationDesc(); + virtual const uint8_t *string_iconfiguration_desc(); /* * Get string interface descriptor * * @returns pointer to the string interface descriptor */ - virtual const uint8_t *stringIinterfaceDesc(); + virtual const uint8_t *string_iinterface_desc(); /* * Get the length of the report descriptor * * @returns length of the report descriptor */ - virtual uint16_t reportDescLength() + virtual uint16_t report_desc_dength() { return 0; }; +protected: + + /** + * Called by USBDevice layer on power state change. + * + * @param powered true if device is powered, false otherwise + * + * Warning: Called in ISR context + */ + virtual void callback_power(bool powered) + { + } -protected: - virtual void busReset(void); - virtual void EP0setupCallback(void); - virtual void EP0out(void); - virtual void EP0in(void); - virtual void connectStateChanged(unsigned int connected); - virtual void suspendStateChanged(unsigned int suspended); - uint8_t *findDescriptor(uint8_t descriptorType); - CONTROL_TRANSFER *getTransferPtr(void); - - uint16_t VENDOR_ID; - uint16_t PRODUCT_ID; - uint16_t PRODUCT_RELEASE; - uint8_t deviceDescriptor[18]; + /** + * Called by USBDevice layer on each new USB frame. + * + * Callbacks are enabled and disabled by calling sof_enable + * and sof_disable. + * + * @param frame_number The current frame number + * + * Warning: Called in ISR context + */ + virtual void callback_sof(int frame_number) + { + + } + + /** + * Called by USBDevice layer on bus reset. + * + * complete_reset must be called after + * the device is fully reset. + * + * Warning: Called in ISR context + */ + virtual void callback_reset() + { + + } + + /** + * Called when USB changes state + * + * @param new_state The new state of the USBDevice + * + * Warning: Called in ISR context + */ + virtual void callback_state_change(DeviceState new_state) = 0; + + /** + * Called by USBDevice on Endpoint0 request. + * + * This is used to handle extensions to standard requests + * and class specific requests. The function complete_request + * must be always be called in response to this callback. + * + * Warning: Called in ISR context + */ + virtual void callback_request(const setup_packet_t *setup) = 0; + + /** + * Called to complete the setup stage of a callback request + * + * Possible options that can be passed as a result are: + * - Receive - Start the data OUT phase of this control transfer + * - Send - Start the data IN phase of this control transfer + * - Success - Operation was a success so start the status phase + * - Failure - Operation failed or is unsupported so send a stall + * - PassThrough - Pass on the request for standard processing + * + * @param result The result of the setup phase. + * @param data Buffer to send or receive if the result is Send or Receive + * @param size Size to transfer if the result is Send or Receive + */ + void complete_request(RequestResult result, uint8_t *data=NULL, uint32_t size=0); + + /** + * Called by USBDevice on data stage completion + * + * The function complete_request_xfer_done must be always be called + * in response to this callback. + * + * @param setup Setup packet of the current request + * @param aborted false if the operation was aborted, true otherwise + * + * Warning: Called in ISR context + */ + virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted) = 0; + + /** + * Called to complete the data stage of a callback request + * + * @param success true if the operation was successful, false otherwise + */ + void complete_request_xfer_done(bool success); + + /* + * Called by USBDevice layer in response to set_configuration. + * + * Upon reception of this command endpoints of the previous configuration + * if any must be removed with endpoint_remove and new endpoint added with + * endpoint_add. + * + * @param configuration Number of the configuration + * + * Warning: Called in ISR context + */ + virtual void callback_set_configuration(uint8_t configuration) = 0; + + /** + * Called to complete a set configuration command + * + * @param success true if the configuration was set, false otherwise + */ + void complete_set_configuration(bool success); + + /* + * Called by USBDevice layer in response to set_interface. + * + * Upon reception of this command endpoints of any previous interface + * if any must be removed with endpoint_remove and new endpoint added with + * endpoint_add. + * + * @param configuration Number of the configuration + * + * Warning: Called in ISR context + */ + virtual void callback_set_interface(uint16_t interface, uint8_t alternate) = 0; + + /** + * Called to complete a set interface command + * + * @param success true if the interface was set, false otherwise + */ + void complete_set_interface(bool success); + + /** + * Find a descriptor type inside the configuration descriptor + * + * @param descriptor_type Type of descriptor to find + * @return A descriptor of the given type or NULL if none were found + */ + uint8_t *find_descriptor(uint8_t descriptor_type); + + /** + * Get the endpoint table of this device + * + * @return Endpoint table of the USBPhy attached to this USBDevice + */ + const usb_ep_table_t *endpoint_table(); + + /** + * Callback called to indicate the USB processing needs to be done + */ + virtual void start_process(); + + /** + * Acquire exclusive access to this instance USBDevice + */ + virtual void lock(); + + /** + * Release exclusive access to this instance USBDevice + */ + virtual void unlock(); + + /** + * Assert that the current thread of execution holds the lock + * + */ + virtual void assert_locked(); + + uint16_t vendor_id; + uint16_t product_id; + uint16_t product_release; + uint8_t device_descriptor[18]; private: - bool addRateFeedbackEndpoint(uint8_t endpoint, uint32_t maxPacket); - bool requestGetDescriptor(void); - bool controlOut(void); - bool controlIn(void); - bool requestSetAddress(void); - bool requestSetConfiguration(void); - bool requestSetFeature(void); - bool requestClearFeature(void); - bool requestGetStatus(void); - bool requestSetup(void); - bool controlSetup(void); - void decodeSetupPacket(uint8_t *data, SETUP_PACKET *packet); - bool requestGetConfiguration(void); - bool requestGetInterface(void); - bool requestSetInterface(void); - - CONTROL_TRANSFER transfer; - USB_DEVICE device; - - uint16_t currentInterface; - uint8_t currentAlternate; -}; + // USBPhyEvents + virtual void power(bool powered); + virtual void suspend(bool suspended); + virtual void sof(int frame_number); + virtual void reset(); + virtual void ep0_setup(); + virtual void ep0_out(); + virtual void ep0_in(); + virtual void out(usb_ep_t endpoint); + virtual void in(usb_ep_t endpoint); + + bool _request_get_descriptor(); + bool _control_out(); + bool _control_in(); + bool _request_set_address(); + bool _request_set_configuration(); + bool _request_set_feature(); + bool _request_clear_feature(); + bool _request_get_status(); + bool _request_setup(); + void _control_setup(); + void _control_abort(); + void _control_abort_start(); + void _control_setup_continue(); + void _decode_setup_packet(uint8_t *data, setup_packet_t *packet); + bool _request_get_configuration(); + bool _request_get_interface(); + bool _request_set_interface(); + void _change_state(DeviceState state); + + struct endpoint_info_t { + void (USBDevice::*callback)(usb_ep_t endpoint); + uint16_t max_packet_size; + uint8_t flags; + uint8_t pending; + }; + struct usb_device_t { + volatile DeviceState state; + uint8_t configuration; + bool suspended; + }; + + enum ControlState { + Setup, + DataOut, + DataIn, + Status + }; + + struct control_transfer_t { + setup_packet_t setup; + uint8_t *ptr; + uint32_t remaining; + uint8_t direction; + bool zlp; + bool notify; + ControlState stage; + bool user_callback; + }; + + endpoint_info_t _endpoint_info[32 - 2]; + + USBPhy *_phy; + bool _initialized; + control_transfer_t _transfer; + usb_device_t _device; + uint32_t _max_packet_size_ep0; + + bool _setup_ready; + bool _abort_control; + + uint16_t _current_interface; + uint8_t _current_alternate; + uint32_t _locked; +}; #endif diff --git a/usb/device/USBDevice/USBDevice_Types.h b/usb/device/USBDevice/USBDevice_Types.h index 543e8a678f8..9d61df7d329 100644 --- a/usb/device/USBDevice/USBDevice_Types.h +++ b/usb/device/USBDevice/USBDevice_Types.h @@ -49,33 +49,4 @@ #define DESCRIPTOR_TYPE(wValue) (wValue >> 8) #define DESCRIPTOR_INDEX(wValue) (wValue & 0xff) -typedef struct { - struct { - uint8_t dataTransferDirection; - uint8_t Type; - uint8_t Recipient; - } bmRequestType; - uint8_t bRequest; - uint16_t wValue; - uint16_t wIndex; - uint16_t wLength; -} SETUP_PACKET; - -typedef struct { - SETUP_PACKET setup; - uint8_t *ptr; - uint32_t remaining; - uint8_t direction; - bool zlp; - bool notify; -} CONTROL_TRANSFER; - -typedef enum {ATTACHED, POWERED, DEFAULT, ADDRESS, CONFIGURED} DEVICE_STATE; - -typedef struct { - volatile DEVICE_STATE state; - uint8_t configuration; - bool suspended; -} USB_DEVICE; - #endif From 4bcf6748f6cecf2561cac44beefdc6faa1f51eeb Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 7 Feb 2018 16:36:35 -0600 Subject: [PATCH 274/488] Add USBDevice test code Add a USB test and the class USBTester.cpp to go along with it. --- TESTS/host_tests/pyusb_basic.py | 349 ++++++++++++++++++++++++ TESTS/usb_device/basic/USBTester.cpp | 384 +++++++++++++++++++++++++++ TESTS/usb_device/basic/USBTester.h | 91 +++++++ TESTS/usb_device/basic/main.cpp | 62 +++++ 4 files changed, 886 insertions(+) create mode 100644 TESTS/host_tests/pyusb_basic.py create mode 100644 TESTS/usb_device/basic/USBTester.cpp create mode 100644 TESTS/usb_device/basic/USBTester.h create mode 100644 TESTS/usb_device/basic/main.cpp diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py new file mode 100644 index 00000000000..24c7e951455 --- /dev/null +++ b/TESTS/host_tests/pyusb_basic.py @@ -0,0 +1,349 @@ +""" +mbed SDK +Copyright (c) 2018-2018 ARM Limited + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +""" +from __future__ import print_function + +from mbed_host_tests import BaseHostTest +from argparse import ArgumentParser +import time +import sys +from threading import Thread + +import usb.core +from usb.util import build_request_type +from usb.util import CTRL_OUT, CTRL_IN +from usb.util import CTRL_TYPE_STANDARD, CTRL_TYPE_CLASS, CTRL_TYPE_VENDOR +from usb.util import (CTRL_RECIPIENT_DEVICE, CTRL_RECIPIENT_INTERFACE, + CTRL_RECIPIENT_ENDPOINT, CTRL_RECIPIENT_OTHER) + +def get_interface(dev, interface, alternate=0): + intf = None + for active_if in dev.get_active_configuration(): + if active_if.bInterfaceNumber == interface and active_if.bAlternateSetting == alternate: + assert intf is None, "duplicate interface" + intf = active_if + return intf + +VENDOR_TEST_CTRL_IN = 1 +VENDOR_TEST_CTRL_OUT = 2 +VENDOR_TEST_CTRL_NONE = 3 +VENDOR_TEST_CTRL_IN_DELAY = 4 +VENDOR_TEST_CTRL_OUT_DELAY = 5 +VENDOR_TEST_CTRL_NONE_DELAY = 6 +VENDOR_TEST_CTRL_IN_STATUS_DELAY = 7 +VENDOR_TEST_CTRL_OUT_STATUS_DELAY = 8 +VENDOR_TEST_UNSUPPORTED_REQUEST = 32 + +class PyusbBasicTest(BaseHostTest): + """ + """ + def _callback_usb_enumeration_done(self, key, value, timestamp): + print("Received key %s = %s" % (key, value)) + self.log("Received key %s = %s" % (key, value)) + test_device(value, self.log) + passed = True + results = "pass" if passed else "fail" + self.send_kv(results, "0") + + def setup(self): + self.__result = False + self.register_callback('usb_enumeration_done', self._callback_usb_enumeration_done) + + def result(self): + return self.__result + + def teardown(self): + pass + + +class TestMatch(object): + + def __init__(self, serial): + self.serial = serial + + def __call__(self, dev): + try: + return dev.serial_number == self.serial + except ValueError: + return False + + +def test_device(serial_number, log=print): + dev = usb.core.find(custom_match=TestMatch(serial_number)) + if dev is None: + log("Device not found") + return + + ## --Control Tests-- ## + #control_basic_test(dev, log) + # Test control IN/OUT/NODATA + control_stall_test(dev, log) + # Invalid control in/out/nodata requests are stalled + # Stall during different points in the control transfer + #control_sizes_test(dev, log) + # Test control requests of various data stage sizes (1,8,16,32,64,255,256,...) + control_stress_test(dev, log) + # normal and delay mode + + ## --Endpoint test-- ## + #for each endpoint + #-test all allowed wMaxPacketSize sizes and transfer types + #-stall tests + #-set/clear stall control request + #-stall at random points of sending/receiveing data + #-test aborting an in progress transfer + #test as many endpoints at once as possible + #test biggest configuration possible + + ## --physical test-- ## + #-reset notification/handling + #-connect/disconnect tests - have device disconnect and then reconnect + #-disconnect during various phases of control transfers and endpoint transfers + #-suspend/resume tests (may not be possible to test with current framework) + #-suspend/resume notifications + + ## -- Stress tests-- ## + #-concurrent tests (all endpoints at once including control) + #-concurrent tests + reset + delay + + ## -- other tests-- ## + #-report throughput for in/out of control, bulk, interrupt and iso transfers + #-verify that construction/destruction repeatedly works gracefully + + + intf = get_interface(dev, 0, 0) + + # Find endpoints + bulk_in = None + bulk_out = None + int_in = None + int_out = None + + for endpoint in intf: + log("Processing endpoint %s" % endpoint) + ep_type = endpoint.bmAttributes & 0x3 + if ep_type == 2: + if endpoint.bEndpointAddress & 0x80: + assert bulk_in is None + bulk_in = endpoint + else: + assert bulk_out is None + bulk_out = endpoint + elif ep_type == 3: + if endpoint.bEndpointAddress & 0x80: + assert int_in is None + int_in = endpoint + else: + assert int_out is None + int_out = endpoint + assert bulk_in is not None + assert bulk_out is not None + assert int_in is not None + assert int_out is not None + bulk_out.write("hello" + "x" *256); + int_out.write("world" + "x" *256); + + dev.set_interface_altsetting(0, 1) + + intf = get_interface(dev, 0, 0) + + # Find endpoints + bulk_in = None + bulk_out = None + int_in = None + int_out = None + + for endpoint in intf: + log("Processing endpoint %s" % endpoint) + ep_type = endpoint.bmAttributes & 0x3 + if ep_type == 2: + if endpoint.bEndpointAddress & 0x80: + assert bulk_in is None + bulk_in = endpoint + else: + assert bulk_out is None + bulk_out = endpoint + elif ep_type == 3: + if endpoint.bEndpointAddress & 0x80: + assert int_in is None + int_in = endpoint + else: + assert int_out is None + int_out = endpoint + assert bulk_in is not None + assert bulk_out is not None + assert int_in is not None + assert int_out is not None + bulk_out.write("hello2" + "x" *256); + int_out.write("world2" + "x" *256); + + + t = Thread(target=write_data, args=(bulk_out,)) + t.start() + + for _ in range(10): + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_CTRL_NONE_DELAY + value = 0 # Always 0 for this request + index = 0 # Communication interface + length = 0 # No data + dev.ctrl_transfer(request_type, request, value, index, length, 5000) + + t.join() + + return True + +def write_data(pipe): + print("Write data running") + count = 0 + for _ in range(40): + pipe.write("Value is %s" % count) + count += 1 + print("Count %s" % count) + time.sleep(0.5) + + +def control_stall_test(dev, log): + + # Control OUT stall + try: + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_UNSUPPORTED_REQUEST + value = 0 # Always 0 for this request + index = 0 # Communication interface + data = bytearray(64) # Dummy data + dev.ctrl_transfer(request_type, request, value, index, data, 5000) + raise Exception("Invalid request not stalled") + except usb.core.USBError: + log("Invalid request stalled") + + # Control request with no data stage (Device-to-host) + try: + request_type = build_request_type(CTRL_IN, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_UNSUPPORTED_REQUEST + value = 0 # Always 0 for this request + index = 0 # Communication interface + length = 0 + dev.ctrl_transfer(request_type, request, value, index, length, 5000) + raise Exception("Invalid request not stalled") + except usb.core.USBError: + log("Invalid request stalled") + + # Control request with no data stage (Host-to-device) + try: + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_UNSUPPORTED_REQUEST + value = 0 # Always 0 for this request + index = 0 # Communication interface + length = 0 + dev.ctrl_transfer(request_type, request, value, index, length, 5000) + raise Exception("Invalid request not stalled") + except usb.core.USBError: + log("Invalid request stalled") + + # Control IN stall + try: + request_type = build_request_type(CTRL_IN, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_UNSUPPORTED_REQUEST + value = 0 # Always 0 for this request + index = 0 # Communication interface + length = 255 + dev.ctrl_transfer(request_type, request, value, index, length, 5000) + raise Exception("Invalid request not stalled") + except usb.core.USBError: + log("Invalid request stalled") + + for i in (6, 7, 5): + try: + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = 0x6 # GET_DESCRIPTOR + value = (0x03 << 8) | (i << 0) # String descriptor index + index = 0 # Communication interface + length = 255 + resp = dev.ctrl_transfer(request_type, request, value, index, length, 5000) + log("Requesting string %s passed" % i) + except usb.core.USBError: + log("Requesting string %s failed" % i) + + +def control_stress_test(dev, log): + + # Test various patterns of control transfers + # + # Some devices have had problems with back-to-back + # control transfers. Intentionally send these sequences + # to make sure they are properly handled. + count = 0 + for _ in range(100): + # Control transfer with a data in stage + request_type = build_request_type(CTRL_IN, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_CTRL_IN + value = 8 # Size of data the device should actually send + index = count # Unused - set for debugging only + length = 255 + dev.ctrl_transfer(request_type, request, value, index, length, 5000) + count += 1 + + for _ in range(100): + # Control transfer with a data out stage followed + # by a control transfer with a data in stage + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_CTRL_OUT + value = 8 # Size of data the device should actually read + index = count # Unused - set for debugging only + data = bytearray(8) # Dummy data + dev.ctrl_transfer(request_type, request, value, index, data, 5000) + count += 1 + + request_type = build_request_type(CTRL_IN, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_CTRL_IN + value = 8 # Size of data the device should actually send + index = count # Unused - set for debugging only + length = 255 + dev.ctrl_transfer(request_type, request, value, index, length, 5000) + count += 1 + + for _ in range(100): + # Control transfer with a data out stage + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_CTRL_OUT + value = 8 # Size of data the device should actually read + index = count # Unused - set for debugging only + data = bytearray(8) # Dummy data + dev.ctrl_transfer(request_type, request, value, index, data, 5000) + count += 1 + + +def main(): + parser = ArgumentParser(description="USB basic test") + parser.add_argument('serial', help='USB serial number of DUT') + args = parser.parse_args() + ret = test_device(args.serial) + print("Test %s" % "passed" if ret else "failed") + + +if __name__ == "__main__": + main() diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp new file mode 100644 index 00000000000..1f26fce2f1c --- /dev/null +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -0,0 +1,384 @@ +/* + * Copyright (c) 2018-2018, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBTester.h" +#include "mbed_shared_queues.h" +#include "EndpointResolver.h" + +#define DEFAULT_CONFIGURATION (1) + +#define VENDOR_TEST_CTRL_IN 1 +#define VENDOR_TEST_CTRL_OUT 2 +#define VENDOR_TEST_CTRL_NONE 3 +#define VENDOR_TEST_CTRL_IN_DELAY 4 +#define VENDOR_TEST_CTRL_OUT_DELAY 5 +#define VENDOR_TEST_CTRL_NONE_DELAY 6 +#define VENDOR_TEST_CTRL_IN_STATUS_DELAY 7 +#define VENDOR_TEST_CTRL_OUT_STATUS_DELAY 8 + +#define MAX_EP_SIZE 64 +#define MIN_EP_SIZE 8 + + +USBTester::USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): USBDevice(vendor_id, product_id, product_release) +{ + + EndpointResolver resolver(endpoint_table()); + + resolver.endpoint_ctrl(64); + bulk_in = resolver.endpoint_in(USB_EP_TYPE_BULK, 64); + bulk_out = resolver.endpoint_out(USB_EP_TYPE_BULK, 64); + int_in = resolver.endpoint_in(USB_EP_TYPE_INT, 64); + int_out = resolver.endpoint_out(USB_EP_TYPE_INT, 64); + MBED_ASSERT(resolver.valid()); + queue = mbed_highprio_event_queue(); + + configuration_desc(); + + init(); + USBDevice::connect(connect_blocking); + +} + +USBTester::~USBTester() +{ + deinit(); +} + +void USBTester::callback_state_change(DeviceState new_state) +{ + // Nothing to do +}; + +void USBTester::callback_request(const setup_packet_t *setup) +{ + /* Called in ISR context */ + RequestResult result = PassThrough; + uint8_t *data = NULL; + uint32_t size = 0; + uint32_t delay = 0; + + /* Process vendor-specific requests */ + if (setup->bmRequestType.Type == VENDOR_TYPE) { + switch (setup->bRequest) { + case VENDOR_TEST_CTRL_IN: + result = Send; + data = ctrl_buf; + size = setup->wValue < sizeof(ctrl_buf) ? setup->wValue : sizeof(ctrl_buf); + break; + case VENDOR_TEST_CTRL_OUT: + result = Receive; + data = ctrl_buf; + size = setup->wValue < 8 ? setup->wValue : 8; + break; + case VENDOR_TEST_CTRL_NONE: + result = Success; + break; + case VENDOR_TEST_CTRL_NONE_DELAY: + result = Success; + delay = 2000; + break; + default: + result = PassThrough; + break; + } + } + + if (delay) { + queue->call_in(delay, static_cast(this), &USBTester::complete_request, Success, data, size); + } else { + complete_request(result, data, size); + } + + +} + +void USBTester::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) +{ + if (aborted) { + complete_request_xfer_done(false); + return; + } + + bool result = false; + if (setup->bmRequestType.Type == VENDOR_TYPE) { + switch (setup->bRequest) { + case VENDOR_TEST_CTRL_IN: + result = true; + break; + case VENDOR_TEST_CTRL_OUT: + result = true; + break; + default: + result = false; + break; + } + } + complete_request_xfer_done(true); +} + +// Called in ISR context +// Set configuration. Return false if the +// configuration is not supported. +void USBTester::callback_set_configuration(uint8_t configuration) +{ + if (configuration != DEFAULT_CONFIGURATION) { + complete_set_configuration(false); + return; + } + + // Configure endpoints > 0 + endpoint_add(int_in, MAX_EP_SIZE, USB_EP_TYPE_INT); + endpoint_add(int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); + endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); + endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); + + read_start(int_out); + read_start(bulk_out); + + complete_set_configuration(true); +} + +void USBTester::callback_set_interface(uint16_t interface, uint8_t alternate) +{ + if (interface == 0 && alternate == 0) { + endpoint_remove(int_in); + endpoint_remove(int_out); + endpoint_remove(bulk_in); + endpoint_remove(bulk_out); + + endpoint_add(int_in, MAX_EP_SIZE, USB_EP_TYPE_INT); + endpoint_add(int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); + endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); + endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); + + read_start(int_out); + read_start(bulk_out); + + complete_set_interface(true); + return; + } + if (interface == 0 && alternate == 1) { + endpoint_remove(int_in); + endpoint_remove(int_out); + endpoint_remove(bulk_in); + endpoint_remove(bulk_out); + + endpoint_add(int_in, MIN_EP_SIZE, USB_EP_TYPE_INT); + endpoint_add(int_out, MIN_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); + endpoint_add(bulk_in, MIN_EP_SIZE, USB_EP_TYPE_BULK); + endpoint_add(bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); + + read_start(int_out); + read_start(bulk_out); + + complete_set_interface(true); + return; + } + complete_set_interface(false); +} + +const uint8_t *USBTester::device_desc() +{ + uint8_t ep0_size = endpoint_max_packet_size(0x00); + uint8_t device_descriptor_temp[] = { + 18, // bLength + 1, // bDescriptorType + 0x10, 0x01, // bcdUSB + 0, // bDeviceClass + 0, // bDeviceSubClass + 0, // bDeviceProtocol + ep0_size, // bMaxPacketSize0 + (uint8_t)(LSB(vendor_id)), (uint8_t)(MSB(vendor_id)), // idVendor + (uint8_t)(LSB(product_id)), (uint8_t)(MSB(product_id)),// idProduct + 0x00, 0x01, // bcdDevice + 1, // iManufacturer + 2, // iProduct + 3, // iSerialNumber + 1 // bNumConfigurations + }; + MBED_ASSERT(sizeof(device_descriptor_temp) == sizeof(device_descriptor)); + memcpy(device_descriptor, device_descriptor_temp, sizeof(device_descriptor)); + return device_descriptor; +} + +const uint8_t *USBTester::string_iinterface_desc() +{ + static const uint8_t string_iinterface_descriptor[] = { + 0x08, + STRING_DESCRIPTOR, + 'C', 0, 'D', 0, 'C', 0, + }; + return string_iinterface_descriptor; +} + +const uint8_t *USBTester::string_iproduct_desc() +{ + static const uint8_t string_iproduct_descriptor[] = { + 0x16, + STRING_DESCRIPTOR, + 'C', 0, 'D', 0, 'C', 0, ' ', 0, 'D', 0, 'E', 0, 'V', 0, 'I', 0, 'C', 0, 'E', 0 + }; + return string_iproduct_descriptor; +} + + +#define CONFIG1_DESC_SIZE (9+9+7+7+7+7 + 9+7+7+7+7) + +const uint8_t *USBTester::configuration_desc() +{ + static const uint8_t config_descriptor[] = { + // configuration descriptor + 9, // bLength + 2, // bDescriptorType + LSB(CONFIG1_DESC_SIZE), // wTotalLength + MSB(CONFIG1_DESC_SIZE), + 1, // bNumInterfaces + 1, // bConfigurationValue + 0, // iConfiguration + 0x80, // bmAttributes + 50, // bMaxPower + + // Interface 0 setting 0 + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + 9, // bLength + 4, // bDescriptorType + 0, // bInterfaceNumber + 0, // bAlternateSetting + 4, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_in, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MAX_EP_SIZE),// wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE),// wMaxPacketSize (MSB) + 0, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_out, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MAX_EP_SIZE),// wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE),// wMaxPacketSize (MSB) + 0, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + int_in, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=interrupt) + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + int_out, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=interrupt) + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // Interface 0 setting 1 + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + 9, // bLength + 4, // bDescriptorType + 0, // bInterfaceNumber + 1, // bAlternateSetting + 4, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_in, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) + 0, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_out, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) + 0, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + int_in, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=interrupt) + LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + int_out, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=interrupt) + LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) + 1 // bInterval + + }; + return config_descriptor; +} + + +void USBTester::epint_out_callback(usb_ep_t endpoint) +{ + uint8_t buffer[65]; + uint32_t size = 0; + + if (!read_finish(endpoint, buffer, sizeof(buffer), &size)) { + return; + } + if (!read_start(endpoint)) { + return; + } +} +void USBTester::epbulk_out_callback(usb_ep_t endpoint) +{ + uint8_t buffer[65]; + uint32_t size = 0; + + if (!read_finish(endpoint, buffer, sizeof(buffer), &size)) { + return; + } + if (!read_start(endpoint)) { + return; + } +} + diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h new file mode 100644 index 00000000000..0e527af98ab --- /dev/null +++ b/TESTS/usb_device/basic/USBTester.h @@ -0,0 +1,91 @@ +/* + * Copyright (c) 2018-2018, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USB_TESTER_H +#define USB_TESTER_H + +/* These headers are included for child class. */ +#include "USBDescriptor.h" +#include "USBDevice_Types.h" +#include "EventQueue.h" + +#include "USBDevice.h" + +class USBTester: public USBDevice { +public: + + /* + * Constructor + * + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your preoduct_release + * @param connect_blocking define if the connection must be blocked if USB not plugged in + */ + USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); + + ~USBTester(); + +protected: + + /* + * Get device descriptor. Warning: this method has to store the length of the report descriptor in reportLength. + * + * @returns pointer to the device descriptor + */ + virtual const uint8_t *device_desc(); + + /* + * Get string product descriptor + * + * @returns pointer to the string product descriptor + */ + virtual const uint8_t *string_iproduct_desc(); + + /* + * Get string interface descriptor + * + * @returns pointer to the string interface descriptor + */ + virtual const uint8_t *string_iinterface_desc(); + + /* + * Get configuration descriptor + * + * @returns pointer to the configuration descriptor + */ + virtual const uint8_t *configuration_desc(); + +protected: + uint8_t bulk_in; + uint8_t bulk_out; + uint8_t int_in; + uint8_t int_out; + EventQueue *queue; + + virtual void callback_state_change(DeviceState new_state); + virtual void callback_request(const setup_packet_t *setup); + virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); + virtual void callback_set_configuration(uint8_t configuration); + virtual void callback_set_interface(uint16_t interface, uint8_t alternate); + virtual void epbulk_out_callback(usb_ep_t endpoint); + virtual void epint_out_callback(usb_ep_t endpoint); + uint8_t ctrl_buf[2048]; + +}; + +#endif diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp new file mode 100644 index 00000000000..141bb473e2c --- /dev/null +++ b/TESTS/usb_device/basic/main.cpp @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2018-2018, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include +#include +#include "mbed.h" +#include "greentea-client/test_env.h" +#include "unity/unity.h" +#include "utest/utest.h" + +#include "USBTester.h" + +#if !defined(DEVICE_USBDEVICE) || !DEVICE_USBDEVICE +#error [NOT_SUPPORTED] USB Device not supported for this target +#endif + +using namespace utest::v1; + +// Echo server (echo payload to host) +void test_case_basic() +{ + char _key[11] = {}; + char _value[128] = {}; + + { + USBTester serial(0x0d28, 0x0205, 0x0001, true); + + greentea_send_kv("usb_enumeration_done", "0123456789"); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + } +} + +Case cases[] = { + Case("pyusb basic test", test_case_basic), +}; + +utest::v1::status_t greentea_test_setup(const size_t number_of_cases) +{ + GREENTEA_SETUP(120, "pyusb_basic"); + return greentea_test_setup_handler(number_of_cases); +} + +Specification specification(greentea_test_setup, cases, greentea_test_teardown_handler); + +int main() +{ + Harness::run(specification); +} From 594203061a87818c829649e3fd71a41d27dd0b3b Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 7 Feb 2018 16:43:26 -0600 Subject: [PATCH 275/488] Add USBPhy for the LPC17xx Move the LPC17xx USB driver files from mbed-os\features\unsupported\USBDevice\targets\TARGET_NXP and update them to match the new USBPhy API. --- .../usb/USBEndpoints_LPC17_LPC23.h | 97 +++ .../TARGET_LPC176X/usb/USBHAL_LPC17.cpp | 709 ++++++++++++++++++ .../TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h | 66 ++ targets/targets.json | 3 +- 4 files changed, 874 insertions(+), 1 deletion(-) create mode 100644 targets/TARGET_NXP/TARGET_LPC176X/usb/USBEndpoints_LPC17_LPC23.h create mode 100644 targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp create mode 100644 targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBEndpoints_LPC17_LPC23.h b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBEndpoints_LPC17_LPC23.h new file mode 100644 index 00000000000..09ab66540d6 --- /dev/null +++ b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBEndpoints_LPC17_LPC23.h @@ -0,0 +1,97 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#define NUMBER_OF_LOGICAL_ENDPOINTS (16) +#define NUMBER_OF_PHYSICAL_ENDPOINTS (NUMBER_OF_LOGICAL_ENDPOINTS * 2) + +/* Define physical endpoint numbers */ + +/* Endpoint No. Type(s) MaxPacket DoubleBuffer */ +/* ---------------- ------------ ---------- --- */ +#define EP0OUT (0x00) /* Control 64 No */ +#define EP0IN (0x80) /* Control 64 No */ +#define EP1OUT (0x01) /* Interrupt 64 No */ +#define EP1IN (0x81) /* Interrupt 64 No */ +#define EP2OUT (0x02) /* Bulk 64 Yes */ +#define EP2IN (0x82) /* Bulk 64 Yes */ +#define EP3OUT (0x03) /* Isochronous 1023 Yes */ +#define EP3IN (0x83) /* Isochronous 1023 Yes */ +#define EP4OUT (0x04) /* Interrupt 64 No */ +#define EP4IN (0x84) /* Interrupt 64 No */ +#define EP5OUT (0x05) /* Bulk 64 Yes */ +#define EP5IN (0x85) /* Bulk 64 Yes */ +#define EP6OUT (0x06) /* Isochronous 1023 Yes */ +#define EP6IN (0x86) /* Isochronous 1023 Yes */ +#define EP7OUT (0x07) /* Interrupt 64 No */ +#define EP7IN (0x87) /* Interrupt 64 No */ +#define EP8OUT (0x08) /* Bulk 64 Yes */ +#define EP8IN (0x88) /* Bulk 64 Yes */ +#define EP9OUT (0x09) /* Isochronous 1023 Yes */ +#define EP9IN (0x89) /* Isochronous 1023 Yes */ +#define EP10OUT (0x0A) /* Interrupt 64 No */ +#define EP10IN (0x8A) /* Interrupt 64 No */ +#define EP11OUT (0x0B) /* Bulk 64 Yes */ +#define EP11IN (0x8B) /* Bulk 64 Yes */ +#define EP12OUT (0x0C) /* Isochronous 1023 Yes */ +#define EP12IN (0x8C) /* Isochronous 1023 Yes */ +#define EP13OUT (0x0D) /* Interrupt 64 No */ +#define EP13IN (0x8D) /* Interrupt 64 No */ +#define EP14OUT (0x0E) /* Bulk 64 Yes */ +#define EP14IN (0x8E) /* Bulk 64 Yes */ +#define EP15OUT (0x0F) /* Bulk 64 Yes */ +#define EP15IN (0x8F) /* Bulk 64 Yes */ + +/* Maximum Packet sizes */ + +#define MAX_PACKET_SIZE_EP0 (64) +#define MAX_PACKET_SIZE_EP1 (64) +#define MAX_PACKET_SIZE_EP2 (64) +#define MAX_PACKET_SIZE_EP3 (1023) +#define MAX_PACKET_SIZE_EP4 (64) +#define MAX_PACKET_SIZE_EP5 (64) +#define MAX_PACKET_SIZE_EP6 (1023) +#define MAX_PACKET_SIZE_EP7 (64) +#define MAX_PACKET_SIZE_EP8 (64) +#define MAX_PACKET_SIZE_EP9 (1023) +#define MAX_PACKET_SIZE_EP10 (64) +#define MAX_PACKET_SIZE_EP11 (64) +#define MAX_PACKET_SIZE_EP12 (1023) +#define MAX_PACKET_SIZE_EP13 (64) +#define MAX_PACKET_SIZE_EP14 (64) +#define MAX_PACKET_SIZE_EP15 (64) + +/* Generic endpoints - intended to be portable accross devices */ +/* and be suitable for simple USB devices. */ + +/* Bulk endpoints */ +#define EPBULK_OUT (EP2OUT) +#define EPBULK_IN (EP2IN) +#define EPBULK_OUT_callback EP2_OUT_callback +#define EPBULK_IN_callback EP2_IN_callback +/* Interrupt endpoints */ +#define EPINT_OUT (EP1OUT) +#define EPINT_IN (EP1IN) +#define EPINT_OUT_callback EP1_OUT_callback +#define EPINT_IN_callback EP1_IN_callback +/* Isochronous endpoints */ +#define EPISO_OUT (EP3OUT) +#define EPISO_IN (EP3IN) +#define EPISO_OUT_callback EP3_OUT_callback +#define EPISO_IN_callback EP3_IN_callback + +#define MAX_PACKET_SIZE_EPBULK (MAX_PACKET_SIZE_EP2) +#define MAX_PACKET_SIZE_EPINT (MAX_PACKET_SIZE_EP1) +#define MAX_PACKET_SIZE_EPISO (MAX_PACKET_SIZE_EP3) diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp new file mode 100644 index 00000000000..23e8c1f87a1 --- /dev/null +++ b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp @@ -0,0 +1,709 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined(DEVICE_USBDEVICE) && DEVICE_USBDEVICE && \ + (defined(TARGET_LPC1768) || defined(TARGET_LPC2368) || defined(TARGET_LPC2460)) + +#include "USBEndpoints_LPC17_LPC23.h" +#include "USBPhyHw.h" +#include "usb_phy_api.h" + + +// Get endpoint direction +#define IN_EP(endpoint) ((endpoint) & 1U ? true : false) +#define OUT_EP(endpoint) ((endpoint) & 1U ? false : true) + +// Convert physical endpoint number to register bit +#define EP(endpoint) (1UL<>1)|(((endpoint)&1)?0x80:0)) + +// Power Control for Peripherals register +#define PCUSB (1UL<<31) + +// USB Clock Control register +#define DEV_CLK_EN (1UL<<1) +#define AHB_CLK_EN (1UL<<4) + +// USB Clock Status register +#define DEV_CLK_ON (1UL<<1) +#define AHB_CLK_ON (1UL<<4) + +// USB Device Interupt registers +#define FRAME (1UL<<0) +#define EP_FAST (1UL<<1) +#define EP_SLOW (1UL<<2) +#define DEV_STAT (1UL<<3) +#define CCEMPTY (1UL<<4) +#define CDFULL (1UL<<5) +#define RxENDPKT (1UL<<6) +#define TxENDPKT (1UL<<7) +#define EP_RLZED (1UL<<8) +#define ERR_INT (1UL<<9) + +// USB Control register +#define RD_EN (1<<0) +#define WR_EN (1<<1) +#define LOG_ENDPOINT(endpoint) ((DESC_TO_PHY(endpoint)>>1)<<2) + +// USB Receive Packet Length register +#define DV (1UL<<10) +#define PKT_RDY (1UL<<11) +#define PKT_LNGTH_MASK (0x3ff) + +// Serial Interface Engine (SIE) +#define SIE_WRITE (0x01) +#define SIE_READ (0x02) +#define SIE_COMMAND (0x05) +#define SIE_CMD_CODE(phase, data) ((phase<<8)|(data<<16)) + +// SIE Command codes +#define SIE_CMD_SET_ADDRESS (0xD0) +#define SIE_CMD_CONFIGURE_DEVICE (0xD8) +#define SIE_CMD_SET_MODE (0xF3) +#define SIE_CMD_READ_FRAME_NUMBER (0xF5) +#define SIE_CMD_READ_TEST_REGISTER (0xFD) +#define SIE_CMD_SET_DEVICE_STATUS (0xFE) +#define SIE_CMD_GET_DEVICE_STATUS (0xFE) +#define SIE_CMD_GET_ERROR_CODE (0xFF) +#define SIE_CMD_READ_ERROR_STATUS (0xFB) + +#define SIE_CMD_SELECT_ENDPOINT(endpoint) (0x00+DESC_TO_PHY(endpoint)) +#define SIE_CMD_SELECT_ENDPOINT_CLEAR_INTERRUPT(endpoint) (0x40+DESC_TO_PHY(endpoint)) +#define SIE_CMD_SET_ENDPOINT_STATUS(endpoint) (0x40+DESC_TO_PHY(endpoint)) + +#define SIE_CMD_CLEAR_BUFFER (0xF2) +#define SIE_CMD_VALIDATE_BUFFER (0xFA) + +// SIE Device Status register +#define SIE_DS_CON (1<<0) +#define SIE_DS_CON_CH (1<<1) +#define SIE_DS_SUS (1<<2) +#define SIE_DS_SUS_CH (1<<3) +#define SIE_DS_RST (1<<4) + +// SIE Device Set Address register +#define SIE_DSA_DEV_EN (1<<7) + +// SIE Configue Device register +#define SIE_CONF_DEVICE (1<<0) + +// Select Endpoint register +#define SIE_SE_FE (1<<0) +#define SIE_SE_ST (1<<1) +#define SIE_SE_STP (1<<2) +#define SIE_SE_PO (1<<3) +#define SIE_SE_EPN (1<<4) +#define SIE_SE_B_1_FULL (1<<5) +#define SIE_SE_B_2_FULL (1<<6) + +// Set Endpoint Status command +#define SIE_SES_ST (1<<0) +#define SIE_SES_DA (1<<5) +#define SIE_SES_RF_MO (1<<6) +#define SIE_SES_CND_ST (1<<7) + + +static USBPhyHw *instance; + +static volatile int epComplete; + +static void SIECommand(uint32_t command) +{ + // The command phase of a SIE transaction + LPC_USB->USBDevIntClr = CCEMPTY; + LPC_USB->USBCmdCode = SIE_CMD_CODE(SIE_COMMAND, command); + while (!(LPC_USB->USBDevIntSt & CCEMPTY)); +} + +static void SIEWriteData(uint8_t data) +{ + // The data write phase of a SIE transaction + LPC_USB->USBDevIntClr = CCEMPTY; + LPC_USB->USBCmdCode = SIE_CMD_CODE(SIE_WRITE, data); + while (!(LPC_USB->USBDevIntSt & CCEMPTY)); +} + +static uint8_t SIEReadData(uint32_t command) +{ + // The data read phase of a SIE transaction + LPC_USB->USBDevIntClr = CDFULL; + LPC_USB->USBCmdCode = SIE_CMD_CODE(SIE_READ, command); + while (!(LPC_USB->USBDevIntSt & CDFULL)); + return (uint8_t)LPC_USB->USBCmdData; +} + +static void SIEsetDeviceStatus(uint8_t status) +{ + // Write SIE device status register + SIECommand(SIE_CMD_SET_DEVICE_STATUS); + SIEWriteData(status); +} + +static uint8_t SIEgetDeviceStatus(void) +{ + // Read SIE device status register + SIECommand(SIE_CMD_GET_DEVICE_STATUS); + return SIEReadData(SIE_CMD_GET_DEVICE_STATUS); +} + +void SIEsetAddress(uint8_t address) +{ + // Write SIE device address register + SIECommand(SIE_CMD_SET_ADDRESS); + SIEWriteData((address & 0x7f) | SIE_DSA_DEV_EN); +} + +static uint8_t SIEselectEndpoint(uint8_t endpoint) +{ + // SIE select endpoint command + SIECommand(SIE_CMD_SELECT_ENDPOINT(endpoint)); + return SIEReadData(SIE_CMD_SELECT_ENDPOINT(endpoint)); +} + +static uint8_t SIEclearBuffer(void) +{ + // SIE clear buffer command + SIECommand(SIE_CMD_CLEAR_BUFFER); + return SIEReadData(SIE_CMD_CLEAR_BUFFER); +} + +static void SIEvalidateBuffer(void) +{ + // SIE validate buffer command + SIECommand(SIE_CMD_VALIDATE_BUFFER); +} + +static void SIEsetEndpointStatus(uint8_t endpoint, uint8_t status) +{ + // SIE set endpoint status command + SIECommand(SIE_CMD_SET_ENDPOINT_STATUS(endpoint)); + SIEWriteData(status); +} + +static uint16_t SIEgetFrameNumber(void) __attribute__((unused)); +static uint16_t SIEgetFrameNumber(void) +{ + // Read current frame number + uint16_t lowByte; + uint16_t highByte; + + SIECommand(SIE_CMD_READ_FRAME_NUMBER); + lowByte = SIEReadData(SIE_CMD_READ_FRAME_NUMBER); + highByte = SIEReadData(SIE_CMD_READ_FRAME_NUMBER); + + return (highByte << 8) | lowByte; +} + +static void SIEconfigureDevice(void) +{ + // SIE Configure device command + SIECommand(SIE_CMD_CONFIGURE_DEVICE); + SIEWriteData(SIE_CONF_DEVICE); +} + +static void SIEunconfigureDevice(void) +{ + // SIE Configure device command + SIECommand(SIE_CMD_CONFIGURE_DEVICE); + SIEWriteData(0); +} + +static void SIEconnect(void) +{ + // Connect USB device + uint8_t status = SIEgetDeviceStatus(); + SIEsetDeviceStatus(status | SIE_DS_CON); +} + + +static void SIEdisconnect(void) +{ + // Disconnect USB device + uint8_t status = SIEgetDeviceStatus(); + SIEsetDeviceStatus(status & ~SIE_DS_CON); +} + + +static uint8_t selectEndpointClearInterrupt(uint8_t endpoint) +{ + // Implemented using using EP_INT_CLR. + LPC_USB->USBEpIntClr = EP(endpoint); + while (!(LPC_USB->USBDevIntSt & CDFULL)); + return (uint8_t)LPC_USB->USBCmdData; +} + + +static void enableEndpointEvent(uint8_t endpoint) +{ + // Enable an endpoint interrupt + LPC_USB->USBEpIntEn |= EP(endpoint); +} + +static void disableEndpointEvent(uint8_t endpoint) __attribute__((unused)); +static void disableEndpointEvent(uint8_t endpoint) +{ + // Disable an endpoint interrupt + LPC_USB->USBEpIntEn &= ~EP(endpoint); +} + + +static uint32_t endpointReadcore(uint8_t endpoint, uint8_t *buffer, uint32_t size) +{ + // Read from an OUT endpoint + uint32_t actual_size; + uint32_t i; + uint32_t data = 0; + uint8_t offset; + + LPC_USB->USBCtrl = LOG_ENDPOINT(endpoint) | RD_EN; + while (!(LPC_USB->USBRxPLen & PKT_RDY)); + + actual_size = LPC_USB->USBRxPLen & PKT_LNGTH_MASK; + + offset = 0; + + if (actual_size > 0) { + for (i = 0; i < actual_size; i++) { + if (offset == 0) { + // Fetch up to four bytes of data as a word + data = LPC_USB->USBRxData; + } + + // extract a byte + if (size) { + *buffer = (data >> offset) & 0xff; + buffer++; + size--; + } + + // move on to the next byte + offset = (offset + 8) % 32; + } + } else { + (void)LPC_USB->USBRxData; + } + + LPC_USB->USBCtrl = 0; + + return actual_size; +} + +static void endpointWritecore(uint8_t endpoint, uint8_t *buffer, uint32_t size) +{ + // Write to an IN endpoint + uint32_t temp, data; + uint8_t offset; + + LPC_USB->USBCtrl = LOG_ENDPOINT(endpoint) | WR_EN; + + LPC_USB->USBTxPLen = size; + offset = 0; + data = 0; + + if (size > 0) { + do { + // Fetch next data byte into a word-sized temporary variable + temp = *buffer++; + + // Add to current data word + temp = temp << offset; + data = data | temp; + + // move on to the next byte + offset = (offset + 8) % 32; + size--; + + if ((offset == 0) || (size == 0)) { + // Write the word to the endpoint + LPC_USB->USBTxData = data; + data = 0; + } + } while (size > 0); + } else { + LPC_USB->USBTxData = 0; + } + + // Clear WR_EN to cover zero length packet case + LPC_USB->USBCtrl = 0; + + SIEselectEndpoint(endpoint); + SIEvalidateBuffer(); +} + +USBPhy *get_usb_phy() +{ + static USBPhyHw usbphy; + return &usbphy; +} + +USBPhyHw::USBPhyHw(void) +{ + +} + +USBPhyHw::~USBPhyHw(void) +{ + +} + +void USBPhyHw::init(USBPhyEvents *events) +{ + this->events = events; + + // Disable IRQ + NVIC_DisableIRQ(USB_IRQn); + + // Enable power to USB device controller + LPC_SC->PCONP |= PCUSB; + + // Enable USB clocks + LPC_USB->USBClkCtrl |= DEV_CLK_EN | AHB_CLK_EN; + while (LPC_USB->USBClkSt != (DEV_CLK_ON | AHB_CLK_ON)); + + // Configure pins P0.29 and P0.30 to be USB D+ and USB D- + LPC_PINCON->PINSEL1 &= 0xc3ffffff; + LPC_PINCON->PINSEL1 |= 0x14000000; + + // Disconnect USB device + SIEdisconnect(); + + // Configure pin P2.9 to be Connect + LPC_PINCON->PINSEL4 &= 0xfffcffff; + LPC_PINCON->PINSEL4 |= 0x00040000; + + // Connect must be low for at least 2.5uS + wait(0.3); + + // Set the maximum packet size for the control endpoints + endpoint_add(EP0IN, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); + endpoint_add(EP0OUT, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); + + // Attach IRQ + instance = this; + NVIC_SetVector(USB_IRQn, (uint32_t)&_usbisr); + + // Enable interrupts for device events and EP0 + LPC_USB->USBDevIntEn = EP_SLOW | DEV_STAT | FRAME; + enableEndpointEvent(EP0IN); + enableEndpointEvent(EP0OUT); +} + +void USBPhyHw::deinit() +{ + // Ensure device disconnected + SIEdisconnect(); + // Disable USB interrupts + NVIC_DisableIRQ(USB_IRQn); + events = NULL; +} + +bool USBPhyHw::powered() +{ + return true; +} + +void USBPhyHw::connect(void) +{ + NVIC_EnableIRQ(USB_IRQn); + // Connect USB device + SIEconnect(); +} + +void USBPhyHw::disconnect(void) +{ + NVIC_DisableIRQ(USB_IRQn); + // Disconnect USB device + SIEdisconnect(); +} + +void USBPhyHw::configure(void) +{ + SIEconfigureDevice(); +} + +void USBPhyHw::unconfigure(void) +{ + SIEunconfigureDevice(); +} + +void USBPhyHw::sof_enable() +{ + //TODO +} + +void USBPhyHw::sof_disable() +{ + //TODO +} + +void USBPhyHw::set_address(uint8_t address) +{ + SIEsetAddress(address); +} + +uint32_t USBPhyHw::ep0_set_max_packet(uint32_t max_packet) +{ + return MAX_PACKET_SIZE_EP0; +} + +void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) +{ + endpointReadcore(EP0OUT, buffer, size); +} + +void USBPhyHw::ep0_read(void) +{ + endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0); +} + +uint32_t USBPhyHw::ep0_read_result(uint8_t *buffer, uint32_t size) +{ + return endpointReadcore(EP0OUT, buffer, size); +} + +void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) +{ + endpointWritecore(EP0IN, buffer, size); +} + +void USBPhyHw::ep0_stall(void) +{ + // This will stall both control endpoints + endpoint_stall(EP0OUT); +} + +bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint32_t maximumSize) +{ + // Don't clear isochronous endpoints + if ((DESC_TO_PHY(endpoint) >> 1) % 3 || (DESC_TO_PHY(endpoint) >> 1) == 0) { + SIEselectEndpoint(endpoint); + SIEclearBuffer(); + } + return true; +} + +bool USBPhyHw::endpoint_read_result(usb_ep_t endpoint, uint8_t *buffer, uint32_t size, uint32_t *bytesRead) +{ + + //for isochronous endpoint, we don't wait an interrupt + if ((DESC_TO_PHY(endpoint) >> 1) % 3 || (DESC_TO_PHY(endpoint) >> 1) == 0) { + if (!(epComplete & EP(endpoint))) { + return false; + } + } + + *bytesRead = endpointReadcore(endpoint, buffer, size); + epComplete &= ~EP(endpoint); + return true; +} + +bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ + epComplete &= ~EP(endpoint); + + endpointWritecore(endpoint, data, size); + return true; +} + +void USBPhyHw::endpoint_abort(usb_ep_t endpoint) +{ + //TODO - needs to be implemented +} + +bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t maxPacket, usb_ep_type_t type) +{ + // Realise an endpoint + LPC_USB->USBDevIntClr = EP_RLZED; + LPC_USB->USBReEp |= EP(endpoint); + LPC_USB->USBEpInd = DESC_TO_PHY(endpoint); + LPC_USB->USBMaxPSize = maxPacket; + + while (!(LPC_USB->USBDevIntSt & EP_RLZED)); + LPC_USB->USBDevIntClr = EP_RLZED; + + enableEndpointEvent(endpoint); + return true; +} + +void USBPhyHw::endpoint_remove(usb_ep_t endpoint) +{ + // Unrealise an endpoint + + disableEndpointEvent(endpoint); + + LPC_USB->USBDevIntClr = EP_RLZED; + LPC_USB->USBReEp &= ~EP(endpoint); + + while (!(LPC_USB->USBDevIntSt & EP_RLZED)); + LPC_USB->USBDevIntClr = EP_RLZED; +} + +void USBPhyHw::endpoint_stall(usb_ep_t endpoint) +{ + // Stall an endpoint + if ((endpoint == EP0IN) || (endpoint == EP0OUT)) { + // Conditionally stall both control endpoints + SIEsetEndpointStatus(EP0OUT, SIE_SES_CND_ST); + } else { + SIEsetEndpointStatus(endpoint, SIE_SES_ST); + } +} + +void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) +{ + // Unstall an endpoint. The endpoint will also be reinitialised + SIEsetEndpointStatus(endpoint, 0); +} + +void USBPhyHw::remote_wakeup(void) +{ + // Remote wakeup + uint8_t status; + + // Enable USB clocks + LPC_USB->USBClkCtrl |= DEV_CLK_EN | AHB_CLK_EN; + while (LPC_USB->USBClkSt != (DEV_CLK_ON | AHB_CLK_ON)); + + status = SIEgetDeviceStatus(); + SIEsetDeviceStatus(status & ~SIE_DS_SUS); +} + +const usb_ep_table_t *USBPhyHw::endpoint_table() +{ + static const usb_ep_table_t lpc_table = { + 4096 - 32 * 4, // 32 words for endpoint buffers + // +3 based added to interrupt and isochronous to ensure enough + // space for 4 byte alignment + { + {USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 0}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0} + } + }; + return &lpc_table; +} + +void USBPhyHw::_usbisr(void) +{ + NVIC_DisableIRQ(USB_IRQn); + instance->events->start_process(); +} + +void USBPhyHw::process(void) +{ + uint8_t devStat; + + if (LPC_USB->USBDevIntSt & FRAME) { + // Start of frame event + events->sof(SIEgetFrameNumber()); + // Clear interrupt status flag + LPC_USB->USBDevIntClr = FRAME; + } + + if (LPC_USB->USBDevIntSt & DEV_STAT) { + // Device Status interrupt + // Must clear the interrupt status flag before reading the device status from the SIE + LPC_USB->USBDevIntClr = DEV_STAT; + + // Read device status from SIE + devStat = SIEgetDeviceStatus(); + //printf("devStat: %d\r\n", devStat); + + if (devStat & SIE_DS_SUS_CH) { + // Suspend status changed + if ((devStat & SIE_DS_SUS) != 0) { + events->suspend(false); + } + } + + if (devStat & SIE_DS_RST) { + // Bus reset + if ((devStat & SIE_DS_SUS) == 0) { + events->suspend(true); + } + events->reset(); + } + } + + if (LPC_USB->USBDevIntSt & EP_SLOW) { + // (Slow) Endpoint Interrupt + + // Process IN packets before SETUP packets + // Note - order of OUT and SETUP does not matter as OUT packets + // are clobbered by SETUP packets and thus ignored. + // + // A SETUP packet can arrive at any time where as an IN packet is + // only sent after calling EP0write and an OUT packet after EP0read. + // The functions EP0write and EP0read are called only in response to + // a setup packet or IN/OUT packets sent in response to that + // setup packet. Therefore, if an IN or OUT packet is pending + // at the same time as a SETUP packet, the IN or OUT packet belongs + // to the previous control transfer and should either be processed + // before the SETUP packet (in the case of IN) or dropped (in the + // case of OUT as SETUP clobbers the OUT data). + if (LPC_USB->USBEpIntSt & EP(EP0IN)) { + selectEndpointClearInterrupt(EP0IN); + LPC_USB->USBDevIntClr = EP_SLOW; + events->ep0_in(); + } + + // Process each endpoint interrupt + if (LPC_USB->USBEpIntSt & EP(EP0OUT)) { + if (selectEndpointClearInterrupt(EP0OUT) & SIE_SE_STP) { + // this is a setup packet + events->ep0_setup(); + } else { + events->ep0_out(); + } + LPC_USB->USBDevIntClr = EP_SLOW; + } + + //TODO - should probably process in the reverse order + for (uint8_t num = 2; num < 16 * 2; num++) { + uint8_t endpoint = PHY_TO_DESC(num); + if (LPC_USB->USBEpIntSt & EP(endpoint)) { + selectEndpointClearInterrupt(endpoint); + epComplete |= EP(endpoint); + LPC_USB->USBDevIntClr = EP_SLOW; + if (endpoint & 0x80) {//TODO - use macro + events->in(endpoint); + } else { + events->out(endpoint); + } + } + } + } + + NVIC_ClearPendingIRQ(USB_IRQn); + NVIC_EnableIRQ(USB_IRQn); +} + +#endif diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h new file mode 100644 index 00000000000..999991c6a66 --- /dev/null +++ b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h @@ -0,0 +1,66 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBPHYHW_H +#define USBPHYHW_H + +#include "mbed.h" +#include "USBPhy.h" + + +class USBPhyHw : public USBPhy { +public: + USBPhyHw(); + virtual ~USBPhyHw(); + virtual void init(USBPhyEvents *events); + virtual void deinit(); + virtual bool powered(); + virtual void connect(); + virtual void disconnect(); + virtual void configure(); + virtual void unconfigure(); + virtual void sof_enable(); + virtual void sof_disable(); + virtual void set_address(uint8_t address); + virtual void remote_wakeup(); + virtual const usb_ep_table_t *endpoint_table(); + + virtual uint32_t ep0_set_max_packet(uint32_t max_packet); + virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_read(void); + virtual uint32_t ep0_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_write(uint8_t *buffer, uint32_t size); + virtual void ep0_stall(void); + + virtual bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type); + virtual void endpoint_remove(usb_ep_t endpoint); + virtual void endpoint_stall(usb_ep_t endpoint); + virtual void endpoint_unstall(usb_ep_t endpoint); + + virtual bool endpoint_read(usb_ep_t endpoint, uint32_t maximumSize); + virtual bool endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytesRead); + virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual void endpoint_abort(usb_ep_t endpoint); + + virtual void process(); + +private: + USBPhyEvents *events; + + static void _usbisr(void); +}; + +#endif diff --git a/targets/targets.json b/targets/targets.json index 50df37975ee..f2e5d0680e3 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -593,7 +593,8 @@ "SPISLAVE", "STDIO_MESSAGES", "FLASH", - "MPU" + "MPU", + "USBDEVICE" ], "release_versions": ["2", "5"], "device_name": "LPC1768", From 87d93b54006382deb9b4dec4ade53c77d38a7892 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 15 Feb 2018 13:10:48 -0600 Subject: [PATCH 276/488] Remove mbed 2 USB tests from Travis Remove the mbed 2 USB tests since USB support will be part of mbed 5. --- tools/build_travis.py | 80 ++++++++++++++++--------------------------- 1 file changed, 30 insertions(+), 50 deletions(-) diff --git a/tools/build_travis.py b/tools/build_travis.py index c3684fe0d34..5245d7c0b5b 100644 --- a/tools/build_travis.py +++ b/tools/build_travis.py @@ -27,7 +27,7 @@ ################################################################################ # Configure builds here -# "libs" can contain "dsp", "usb" +# "libs" can contain "dsp" build_list = [ { @@ -44,29 +44,29 @@ { "target": "NUCLEO_F072RB", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_F091RC", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_F103RB", "toolchains": "GCC_ARM" }, - { "target": "NUCLEO_F207ZG", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "NUCLEO_F207ZG", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_F302R8", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_F303K8", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_F303RE", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "NUCLEO_F303ZE", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "NUCLEO_F303ZE", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_F334R8", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "NUCLEO_F401RE", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "NUCLEO_F401RE", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "STEVAL_3DP001V1", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, { "target": "NUCLEO_F410RB", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "NUCLEO_F411RE", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "NUCLEO_F411RE", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_F412ZG", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "NUCLEO_F413ZH", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "NUCLEO_F413ZH", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_L432KC", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "MTB_ADV_WISE_1510", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_L476RG", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_L011K4", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_L031K6", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_L073RZ", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "NUCLEO_F429ZI", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "NUCLEO_F446RE", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "NUCLEO_F446ZE", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "NUCLEO_F746ZG", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "NUCLEO_F767ZI", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "NUCLEO_F429ZI", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "NUCLEO_F446RE", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "NUCLEO_F446ZE", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "NUCLEO_F746ZG", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "NUCLEO_F767ZI", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "NUCLEO_L496ZG", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "MOTE_L152RC", "toolchains": "GCC_ARM", "libs": ["dsp"] }, @@ -83,15 +83,15 @@ { "target": "DISCO_F334C8", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "DISCO_F401VC", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "DISCO_F407VG", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "DISCO_F407VG", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "DISCO_F413ZH", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "DISCO_F429ZI", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "DISCO_F469NI", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "DISCO_F746NG", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "DISCO_F769NI", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "DISCO_L475VG_IOT01A", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "DISCO_L476VG", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "DISCO_L072CZ_LRWAN1", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "DISCO_L475VG_IOT01A", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "DISCO_L476VG", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "DISCO_L072CZ_LRWAN1", "toolchains": "GCC_ARM", "libs": ["dsp"] }, # module manufacturer : muRata { "target": "MTB_MURATA_ABZ", "toolchains": "GCC_ARM", "libs": [] }, @@ -101,7 +101,7 @@ { "NXP": ( - { "target": "LPC1768", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "LPC1768", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "LPC11U24", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "OC_MBUINO", "toolchains": "GCC_ARM", "libs": [] }, @@ -114,15 +114,15 @@ { "target": "LPC11U37H_401", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "LPC1549", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "KL05Z", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "KL25Z", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "KL27Z", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "KL43Z", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "KL46Z", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "KL25Z", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "KL27Z", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "KL43Z", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "KL46Z", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "K20D50M", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "TEENSY3_1", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "K64F", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "K22F", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "LPC4088", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "K64F", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "K22F", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "LPC4088", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "ARCH_PRO", "toolchains": "GCC_ARM", "libs": ["dsp"] }, ) }, @@ -141,10 +141,10 @@ "SILICON_LABS": ( { "target": "EFM32ZG_STK3200", "toolchains": "GCC_ARM", "libs": ["dsp"] }, - { "target": "EFM32HG_STK3400", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "EFM32LG_STK3600", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "EFM32GG_STK3700", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "EFM32WG_STK3800", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "EFM32HG_STK3400", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "EFM32LG_STK3600", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "EFM32GG_STK3700", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "EFM32WG_STK3800", "toolchains": "GCC_ARM", "libs": ["dsp"] }, { "target": "EFM32PG_STK3401", "toolchains": "GCC_ARM", "libs": ["dsp"] }, ) }, @@ -163,9 +163,9 @@ { "NUVOTON": ( - { "target": "NUMAKER_PFM_NUC472", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "NUMAKER_PFM_M453", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, - { "target": "NUMAKER_PFM_M487", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] }, + { "target": "NUMAKER_PFM_NUC472", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "NUMAKER_PFM_M453", "toolchains": "GCC_ARM", "libs": ["dsp"] }, + { "target": "NUMAKER_PFM_M487", "toolchains": "GCC_ARM", "libs": ["dsp"] }, ) }, @@ -188,25 +188,21 @@ {"target": "LPC1768", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_15", "MBED_16", "MBED_17"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "K64F", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "K22F", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "KL43Z", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, ) @@ -217,25 +213,21 @@ {"target": "NUCLEO_F446RE", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_F446ZE", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_F401RE", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_F411RE", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_F412ZG", @@ -246,31 +238,26 @@ {"target": "NUCLEO_F413ZH", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_F429ZI", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_F207ZG", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_F746ZG", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_F767ZI", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUCLEO_L476RG", @@ -286,7 +273,6 @@ {"target": "DISCO_F407VG", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "DISCO_F413ZH", @@ -297,19 +283,16 @@ {"target": "NUCLEO_F303ZE", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "DISCO_L475VG_IOT01A", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "DISCO_L476VG", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "DISCO_L072CZ_LRWAN1", @@ -329,19 +312,16 @@ {"target": "NUMAKER_PFM_NUC472", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUMAKER_PFM_M453", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } }, {"target": "NUMAKER_PFM_M487", "toolchains": "GCC_ARM", "tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"], - "usb" : ["USB_1", "USB_2" ,"USB_3"], } } ) From c5579c8125cbffe15620ab4eb4e62b3e2cf07904 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 13 Feb 2018 11:53:01 -0600 Subject: [PATCH 277/488] Add Kinetis USB files --- .../usb/USBEndpoints_Kinetis.h | 63 ++ .../TARGET_Freescale/usb/USBPhy_Kinetis.cpp | 569 ++++++++++++++++++ 2 files changed, 632 insertions(+) create mode 100644 targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h create mode 100644 targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp diff --git a/targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h b/targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h new file mode 100644 index 00000000000..59ec8dccad1 --- /dev/null +++ b/targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h @@ -0,0 +1,63 @@ +/* Copyright (c) 2010-2011 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#define NUMBER_OF_LOGICAL_ENDPOINTS (4) +#define NUMBER_OF_PHYSICAL_ENDPOINTS (NUMBER_OF_LOGICAL_ENDPOINTS * 2) + +/* Define physical endpoint numbers */ + +/* Endpoint No. */ +/* ---------------- */ +#define EP0OUT (0) +#define EP0IN (1) +#define EP1OUT (2) +#define EP1IN (3) +#define EP2OUT (4) +#define EP2IN (5) +#define EP3OUT (6) +#define EP3IN (7) + +/* Maximum Packet sizes */ + +#define MAX_PACKET_SIZE_EP0 (64) +#define MAX_PACKET_SIZE_EP1 (64) +#define MAX_PACKET_SIZE_EP2 (64) +#define MAX_PACKET_SIZE_EP3 (1023) + +/* Generic endpoints - intended to be portable accross devices */ +/* and be suitable for simple USB devices. */ + +/* Bulk endpoints */ +#define EPBULK_OUT (EP2OUT) +#define EPBULK_IN (EP2IN) +#define EPBULK_OUT_callback EP2_OUT_callback +#define EPBULK_IN_callback EP2_IN_callback +/* Interrupt endpoints */ +#define EPINT_OUT (EP1OUT) +#define EPINT_IN (EP1IN) +#define EPINT_OUT_callback EP1_OUT_callback +#define EPINT_IN_callback EP1_IN_callback +/* Isochronous endpoints */ +#define EPISO_OUT (EP3OUT) +#define EPISO_IN (EP3IN) +#define EPISO_OUT_callback EP3_OUT_callback +#define EPISO_IN_callback EP3_IN_callback + +#define MAX_PACKET_SIZE_EPBULK (MAX_PACKET_SIZE_EP2) +#define MAX_PACKET_SIZE_EPINT (MAX_PACKET_SIZE_EP1) +#define MAX_PACKET_SIZE_EPISO (MAX_PACKET_SIZE_EP3) diff --git a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp new file mode 100644 index 00000000000..69471edf702 --- /dev/null +++ b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp @@ -0,0 +1,569 @@ +/* Copyright (c) 2010-2011 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#if defined(TARGET_KL25Z) | defined(TARGET_KL43Z) | defined(TARGET_KL46Z) | defined(TARGET_K20D50M) | defined(TARGET_K64F) | defined(TARGET_K22F) | defined(TARGET_TEENSY3_1) + +#if defined(TARGET_KSDK2_MCUS) +#include "fsl_common.h" +#endif +#include "USBHAL.h" +#include "mbed_critical.h" + +USBHAL * USBHAL::instance; + +static volatile int epComplete = 0; + +// Convert physical endpoint number to register bit +#define EP(endpoint) (1<<(endpoint)) + +// Convert physical to logical +#define PHY_TO_LOG(endpoint) ((endpoint)>>1) + +// Get endpoint direction +#define IN_EP(endpoint) ((endpoint) & 1U ? true : false) +#define OUT_EP(endpoint) ((endpoint) & 1U ? false : true) + +#define BD_OWN_MASK (1<<7) +#define BD_DATA01_MASK (1<<6) +#define BD_KEEP_MASK (1<<5) +#define BD_NINC_MASK (1<<4) +#define BD_DTS_MASK (1<<3) +#define BD_STALL_MASK (1<<2) + +#define TX 1 +#define RX 0 +#define ODD 0 +#define EVEN 1 +// this macro waits a physical endpoint number +#define EP_BDT_IDX(ep, dir, odd) (((ep * 4) + (2 * dir) + (1 * odd))) + +#define SETUP_TOKEN 0x0D +#define IN_TOKEN 0x09 +#define OUT_TOKEN 0x01 +#define TOK_PID(idx) ((bdt[idx].info >> 2) & 0x0F) + +// for each endpt: 8 bytes +typedef struct BDT { + uint8_t info; // BD[0:7] + uint8_t dummy; // RSVD: BD[8:15] + uint16_t byte_count; // BD[16:32] + uint32_t address; // Addr +} BDT; + +typedef enum { + CTRL_XFER_READY, + CTRL_XFER_IN, + CTRL_XFER_NONE, + CTRL_XFER_OUT +} ctrl_xfer_t; + +// there are: +// * 4 bidirectionnal endpt -> 8 physical endpt +// * as there are ODD and EVEN buffer -> 8*2 bdt +MBED_ALIGN(512) BDT bdt[NUMBER_OF_PHYSICAL_ENDPOINTS * 2]; // 512 bytes aligned! + +uint8_t * endpoint_buffer[NUMBER_OF_PHYSICAL_ENDPOINTS * 2]; + +static uint8_t set_addr = 0; +static uint8_t addr = 0; +static ctrl_xfer_t ctrl_xfer = CTRL_XFER_READY; + +static uint32_t Data1 = 0x55555555; + +static uint32_t frameNumber() { + return((USB0->FRMNUML | (USB0->FRMNUMH << 8)) & 0x07FF); +} + +uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer) { + return 0; +} + +USBHAL::USBHAL(void) { + // Disable IRQ + NVIC_DisableIRQ(USB0_IRQn); + +#if (defined(FSL_FEATURE_SOC_MPU_COUNT) && (FSL_FEATURE_SOC_MPU_COUNT > 0U)) + MPU->CESR=0; +#endif + // fill in callback array + epCallback[0] = &USBHAL::EP1_OUT_callback; + epCallback[1] = &USBHAL::EP1_IN_callback; + epCallback[2] = &USBHAL::EP2_OUT_callback; + epCallback[3] = &USBHAL::EP2_IN_callback; + epCallback[4] = &USBHAL::EP3_OUT_callback; + epCallback[5] = &USBHAL::EP3_IN_callback; + epCallback[6] = &USBHAL::EP4_OUT_callback; + epCallback[7] = &USBHAL::EP4_IN_callback; + +#if defined(TARGET_KL43Z) || defined(TARGET_K22F) || defined(TARGET_K64F) + // enable USBFS clock + CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcIrc48M, 48000000U); +#else + // choose usb src as PLL + SIM->SOPT2 &= ~SIM_SOPT2_PLLFLLSEL_MASK; + SIM->SOPT2 |= (SIM_SOPT2_USBSRC_MASK | (1 << SIM_SOPT2_PLLFLLSEL_SHIFT)); + + // enable OTG clock + SIM->SCGC4 |= SIM_SCGC4_USBOTG_MASK; +#endif + + // Attach IRQ + instance = this; + NVIC_SetVector(USB0_IRQn, (uint32_t)&_usbisr); + NVIC_EnableIRQ(USB0_IRQn); + + // USB Module Configuration + // Set BDT Base Register + USB0->BDTPAGE1 = (uint8_t)((uint32_t)bdt>>8); + USB0->BDTPAGE2 = (uint8_t)((uint32_t)bdt>>16); + USB0->BDTPAGE3 = (uint8_t)((uint32_t)bdt>>24); + + // Clear interrupt flag + USB0->ISTAT = 0xff; + + // USB Interrupt Enablers + USB0->INTEN |= USB_INTEN_TOKDNEEN_MASK | + USB_INTEN_SOFTOKEN_MASK | + USB_INTEN_ERROREN_MASK | + USB_INTEN_USBRSTEN_MASK; + + // Disable weak pull downs + USB0->USBCTRL &= ~(USB_USBCTRL_PDE_MASK | USB_USBCTRL_SUSP_MASK); + + USB0->USBTRC0 |= 0x40; + + /* Allocate control endpoint buffers */ + endpoint_buffer[EP_BDT_IDX(0, TX, ODD)] = (uint8_t *)malloc(MAX_PACKET_SIZE_EP0); + endpoint_buffer[EP_BDT_IDX(0, RX, ODD)] = (uint8_t *)malloc(MAX_PACKET_SIZE_EP0); +} + +USBHAL::~USBHAL(void) { } + +void USBHAL::connect(void) { + // enable USB + USB0->CTL |= USB_CTL_USBENSOFEN_MASK; + // Pull up enable + USB0->CONTROL |= USB_CONTROL_DPPULLUPNONOTG_MASK; + + // Allocate endpoint buffers; do allocate control endpoint buffers + for (int i = 4; i < (NUMBER_OF_PHYSICAL_ENDPOINTS * 2); i++) { + if ((i == EPISO_OUT) || (i == EPISO_IN)) { + endpoint_buffer[i] = (uint8_t *)malloc(MAX_PACKET_SIZE_EPISO); + } else { + endpoint_buffer[i] = (uint8_t *)malloc(MAX_PACKET_SIZE_EPBULK); + } + } +} + +void USBHAL::disconnect(void) { + // disable USB + USB0->CTL &= ~USB_CTL_USBENSOFEN_MASK; + // Pull up disable + USB0->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK; + + //Free buffers if required; do not free the control endpoint buffers + for (int i = 4; i < (NUMBER_OF_PHYSICAL_ENDPOINTS * 2); i++) { + free(endpoint_buffer[i]); + endpoint_buffer[i] = NULL; + } +} + +void USBHAL::configureDevice(void) { + // not needed +} + +void USBHAL::unconfigureDevice(void) { + // not needed +} + +void USBHAL::setAddress(uint8_t address) { + // we don't set the address now otherwise the usb controller does not ack + // we set a flag instead + // see usbisr when an IN token is received + set_addr = 1; + addr = address; +} + +bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t flags) { + uint32_t handshake_flag = 0; + uint8_t * buf; + + if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { + return false; + } + + uint32_t log_endpoint = PHY_TO_LOG(endpoint); + + if ((flags & ISOCHRONOUS) == 0) { + handshake_flag = USB_ENDPT_EPHSHK_MASK; + } + + if (IN_EP(endpoint)) { + buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)][0]; + } else { + buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)][0]; + } + + // IN endpt -> device to host (TX) + if (IN_EP(endpoint)) { + USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) + USB_ENDPT_EPTXEN_MASK; // en TX (IN) tran + bdt[EP_BDT_IDX(log_endpoint, TX, ODD )].address = (uint32_t) buf; + bdt[EP_BDT_IDX(log_endpoint, TX, EVEN)].address = 0; + } + // OUT endpt -> host to device (RX) + else { + USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) + USB_ENDPT_EPRXEN_MASK; // en RX (OUT) tran. + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].byte_count = maxPacket; + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].address = (uint32_t) buf; + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info = BD_DTS_MASK; + bdt[EP_BDT_IDX(log_endpoint, RX, EVEN)].info = 0; + if (log_endpoint == 0) { + // Prepare for setup packet + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info |= BD_OWN_MASK; + } + } + + // First transfer will be a DATA0 packet + Data1 &= ~(1 << endpoint); + + return true; +} + +// read setup packet +void USBHAL::EP0setup(uint8_t *buffer) { + uint32_t sz; + endpointReadResult(EP0OUT, buffer, &sz); +} + +void USBHAL::EP0readStage(void) { + // Not needed +} + +void USBHAL::EP0read(void) { + if (ctrl_xfer == CTRL_XFER_READY) { + // Transfer is done so ignore call + return; + } + if (ctrl_xfer == CTRL_XFER_IN) { + ctrl_xfer = CTRL_XFER_READY; + // Control transfer with a data IN stage. + // The next packet received will be the status packet - an OUT packet using DATA1 + // + // PROBLEM: + // If a Setup packet is received after status packet of + // a Control In transfer has been received in the RX buffer + // but before the processor has had a chance the prepare + // this buffer for the Setup packet, the Setup packet + // will be dropped. + // + // WORKAROUND: + // Set data toggle to DATA0 so if the status stage of a + // Control In transfer arrives it will be ACKed by hardware + // but will be discarded without filling the RX buffer. + // This allows a subsequent SETUP packet to be stored + // without any processor intervention. + Data1 &= ~1UL; // set DATA0 + } + endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0); +} + +uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) { + uint32_t sz; + endpointReadResult(EP0OUT, buffer, &sz); + return sz; +} + +void USBHAL::EP0write(uint8_t *buffer, uint32_t size) { + if (ctrl_xfer == CTRL_XFER_READY) { + // Transfer is done so ignore call + return; + } + if ((ctrl_xfer == CTRL_XFER_NONE) || (ctrl_xfer == CTRL_XFER_OUT)) { + // Prepare for next setup packet + endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0); + ctrl_xfer = CTRL_XFER_READY; + } + endpointWrite(EP0IN, buffer, size); +} + +void USBHAL::EP0getWriteResult(void) { +} + +void USBHAL::EP0stall(void) { + if (ctrl_xfer == CTRL_XFER_READY) { + // Transfer is done so ignore call + return; + } + ctrl_xfer = CTRL_XFER_READY; + core_util_critical_section_enter(); + stallEndpoint(EP0OUT); + // Prepare for next setup packet + // Note - time between stalling and setting up the endpoint + // must be kept to a minimum to prevent a dropped SETUP + // packet. + endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0); + core_util_critical_section_exit(); +} + +EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) { + uint8_t log_endpoint = PHY_TO_LOG(endpoint); + + uint32_t idx = EP_BDT_IDX(log_endpoint, RX, 0); + bdt[idx].byte_count = maximumSize; + if ((Data1 >> endpoint) & 1) { + bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK | BD_DATA01_MASK; + } + else { + bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK; + } + + Data1 ^= (1 << endpoint); + return EP_PENDING; +} + +EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) { + uint32_t n, sz, idx, setup = 0; + uint8_t not_iso; + uint8_t * ep_buf; + + uint32_t log_endpoint = PHY_TO_LOG(endpoint); + + if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { + return EP_INVALID; + } + + // if read on a IN endpoint -> error + if (IN_EP(endpoint)) { + return EP_INVALID; + } + + idx = EP_BDT_IDX(log_endpoint, RX, 0); + sz = bdt[idx].byte_count; + not_iso = USB0->ENDPOINT[log_endpoint].ENDPT & USB_ENDPT_EPHSHK_MASK; + + //for isochronous endpoint, we don't wait an interrupt + if ((log_endpoint != 0) && not_iso && !(epComplete & EP(endpoint))) { + return EP_PENDING; + } + + if ((log_endpoint == 0) && (TOK_PID(idx) == SETUP_TOKEN)) { + setup = 1; + } + + ep_buf = endpoint_buffer[idx]; + + for (n = 0; n < sz; n++) { + buffer[n] = ep_buf[n]; + } + + if (setup) { + // Record the setup type + if (buffer[6] == 0) { + ctrl_xfer = CTRL_XFER_NONE; + } else { + uint8_t in_xfer = (buffer[0] >> 7) & 1; + ctrl_xfer = in_xfer ? CTRL_XFER_IN : CTRL_XFER_OUT; + } + } + + USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; + *bytesRead = sz; + + epComplete &= ~EP(endpoint); + return EP_COMPLETED; +} + +EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) { + uint32_t idx, n; + uint8_t * ep_buf; + + if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { + return EP_INVALID; + } + + // if write on a OUT endpoint -> error + if (OUT_EP(endpoint)) { + return EP_INVALID; + } + + idx = EP_BDT_IDX(PHY_TO_LOG(endpoint), TX, 0); + bdt[idx].byte_count = size; + + ep_buf = endpoint_buffer[idx]; + + for (n = 0; n < size; n++) { + ep_buf[n] = data[n]; + } + + if ((Data1 >> endpoint) & 1) { + bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK | BD_DATA01_MASK; + } else { + bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK; + } + + Data1 ^= (1 << endpoint); + + return EP_PENDING; +} + +EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) { + if (epComplete & EP(endpoint)) { + epComplete &= ~EP(endpoint); + return EP_COMPLETED; + } + + return EP_PENDING; +} + +void USBHAL::stallEndpoint(uint8_t endpoint) { + USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK; +} + +void USBHAL::unstallEndpoint(uint8_t endpoint) { + USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; +} + +bool USBHAL::getEndpointStallState(uint8_t endpoint) { + uint8_t stall = (USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT & USB_ENDPT_EPSTALL_MASK); + return (stall) ? true : false; +} + +void USBHAL::remoteWakeup(void) { + // [TODO] +} + + +void USBHAL::_usbisr(void) { + instance->usbisr(); +} + + +void USBHAL::usbisr(void) { + uint8_t i; + uint8_t istat = USB0->ISTAT; + + // reset interrupt + if (istat & USB_ISTAT_USBRST_MASK) { + // disable all endpt + for(i = 0; i < 16; i++) { + USB0->ENDPOINT[i].ENDPT = 0x00; + } + + // enable control endpoint + realiseEndpoint(EP0OUT, MAX_PACKET_SIZE_EP0, 0); + realiseEndpoint(EP0IN, MAX_PACKET_SIZE_EP0, 0); + + Data1 = 0x55555555; + USB0->CTL |= USB_CTL_ODDRST_MASK; + + USB0->ISTAT = 0xFF; // clear all interrupt status flags + USB0->ERRSTAT = 0xFF; // clear all error flags + USB0->ERREN = 0xFF; // enable error interrupt sources + USB0->ADDR = 0x00; // set default address + + // reset bus for USBDevice layer + busReset(); + + return; + } + + // resume interrupt + if (istat & USB_ISTAT_RESUME_MASK) { + USB0->ISTAT = USB_ISTAT_RESUME_MASK; + } + + // SOF interrupt + if (istat & USB_ISTAT_SOFTOK_MASK) { + USB0->ISTAT = USB_ISTAT_SOFTOK_MASK; + // SOF event, read frame number + SOF(frameNumber()); + } + + // stall interrupt + if (istat & 1<<7) { + if (USB0->ENDPOINT[0].ENDPT & USB_ENDPT_EPSTALL_MASK) + USB0->ENDPOINT[0].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; + USB0->ISTAT = USB_ISTAT_STALL_MASK; + } + + // token interrupt + if (istat & 1<<3) { + uint32_t num = (USB0->STAT >> 4) & 0x0F; + uint32_t dir = (USB0->STAT >> 3) & 0x01; + uint32_t ev_odd = (USB0->STAT >> 2) & 0x01; + int endpoint = (num << 1) | dir; + + // setup packet + if ((num == 0) && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == SETUP_TOKEN)) { + Data1 |= 0x02 | 0x01; // set DATA1 for TX and RX + bdt[EP_BDT_IDX(0, TX, EVEN)].info &= ~BD_OWN_MASK; + bdt[EP_BDT_IDX(0, TX, ODD)].info &= ~BD_OWN_MASK; + + // EP0 SETUP event (SETUP data received) + EP0setupCallback(); + + } else { + // OUT packet + if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == OUT_TOKEN) { + if (num == 0) + EP0out(); + else { + epComplete |= EP(endpoint); + if ((instance->*(epCallback[endpoint - 2]))()) { + epComplete &= ~EP(endpoint); + } + } + } + + // IN packet + if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == IN_TOKEN) { + if (num == 0) { + EP0in(); + if (set_addr == 1) { + USB0->ADDR = addr & 0x7F; + set_addr = 0; + } + } + else { + epComplete |= EP(endpoint); + if ((instance->*(epCallback[endpoint - 2]))()) { + epComplete &= ~EP(endpoint); + } + } + } + } + + USB0->ISTAT = USB_ISTAT_TOKDNE_MASK; + } + + // sleep interrupt + if (istat & 1<<4) { + USB0->ISTAT = USB_ISTAT_SLEEP_MASK; + } + + // error interrupt + if (istat & USB_ISTAT_ERROR_MASK) { + USB0->ERRSTAT = 0xFF; + USB0->ISTAT = USB_ISTAT_ERROR_MASK; + } +} + + +#endif From fdab1f1b7d80d2c120908d1365f2fee5f6f5c652 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 13 Feb 2018 18:42:37 -0600 Subject: [PATCH 278/488] Update Kinetis USB to match the USBPhy API Copy the Kinetis USB driver files from mbed-os\features\unsupported\USBDevice\targets\TARGET_Freescale and update them to match the new USBPhy API. --- .../usb/USBEndpoints_Kinetis.h | 48 +- targets/TARGET_Freescale/usb/USBPhyHw.h | 66 +++ .../TARGET_Freescale/usb/USBPhy_Kinetis.cpp | 470 ++++++++++-------- targets/targets.json | 3 +- 4 files changed, 361 insertions(+), 226 deletions(-) create mode 100644 targets/TARGET_Freescale/usb/USBPhyHw.h diff --git a/targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h b/targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h index 59ec8dccad1..8f2286a7f7e 100644 --- a/targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h +++ b/targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h @@ -1,20 +1,18 @@ -/* Copyright (c) 2010-2011 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #define NUMBER_OF_LOGICAL_ENDPOINTS (4) #define NUMBER_OF_PHYSICAL_ENDPOINTS (NUMBER_OF_LOGICAL_ENDPOINTS * 2) @@ -23,14 +21,14 @@ /* Endpoint No. */ /* ---------------- */ -#define EP0OUT (0) -#define EP0IN (1) -#define EP1OUT (2) -#define EP1IN (3) -#define EP2OUT (4) -#define EP2IN (5) -#define EP3OUT (6) -#define EP3IN (7) +#define EP0OUT (0x00) +#define EP0IN (0x80) +#define EP1OUT (0x01) +#define EP1IN (0x81) +#define EP2OUT (0x02) +#define EP2IN (0x82) +#define EP3OUT (0x03) +#define EP3IN (0x83) /* Maximum Packet sizes */ diff --git a/targets/TARGET_Freescale/usb/USBPhyHw.h b/targets/TARGET_Freescale/usb/USBPhyHw.h new file mode 100644 index 00000000000..f11c7512705 --- /dev/null +++ b/targets/TARGET_Freescale/usb/USBPhyHw.h @@ -0,0 +1,66 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBPHYHW_H +#define USBPHYHW_H + +#include "mbed.h" +#include "USBPhy.h" + + +class USBPhyHw : public USBPhy { +public: + USBPhyHw(); + virtual ~USBPhyHw(); + virtual void init(USBPhyEvents *events); + virtual void deinit(); + virtual bool powered(); + virtual void connect(); + virtual void disconnect(); + virtual void configure(); + virtual void unconfigure(); + virtual void sof_enable(); + virtual void sof_disable(); + virtual void set_address(uint8_t address); + virtual void remote_wakeup(); + virtual const usb_ep_table_t* endpoint_table(); + + virtual uint32_t ep0_set_max_packet(uint32_t max_packet); + virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_read(); + virtual uint32_t ep0_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_write(uint8_t *buffer, uint32_t size); + virtual void ep0_stall(); + + virtual bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type); + virtual void endpoint_remove(usb_ep_t endpoint); + virtual void endpoint_stall(usb_ep_t endpoint); + virtual void endpoint_unstall(usb_ep_t endpoint); + + virtual bool endpoint_read(usb_ep_t endpoint, uint32_t maximumSize); + virtual bool endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytesRead); + virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual void endpoint_abort(usb_ep_t endpoint); + + virtual void process(); + +private: + USBPhyEvents *events; + + static void _usbisr(void); +}; + +#endif diff --git a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp index 69471edf702..3ca12d37fc8 100644 --- a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp +++ b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp @@ -1,42 +1,48 @@ -/* Copyright (c) 2010-2011 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ - -#if defined(TARGET_KL25Z) | defined(TARGET_KL43Z) | defined(TARGET_KL46Z) | defined(TARGET_K20D50M) | defined(TARGET_K64F) | defined(TARGET_K22F) | defined(TARGET_TEENSY3_1) +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined(DEVICE_USBDEVICE) && DEVICE_USBDEVICE && \ + (defined(TARGET_KL25Z) | defined(TARGET_KL43Z) | \ + defined(TARGET_KL46Z) | defined(TARGET_K20D50M) | \ + defined(TARGET_K64F) | defined(TARGET_K22F) | \ + defined(TARGET_TEENSY3_1)) #if defined(TARGET_KSDK2_MCUS) #include "fsl_common.h" #endif -#include "USBHAL.h" +#include "USBPhyHw.h" +#include "USBEndpoints_Kinetis.h" #include "mbed_critical.h" -USBHAL * USBHAL::instance; +static USBPhyHw *instance; static volatile int epComplete = 0; // Convert physical endpoint number to register bit #define EP(endpoint) (1<<(endpoint)) -// Convert physical to logical +// Conversion macros #define PHY_TO_LOG(endpoint) ((endpoint)>>1) +#define DESC_TO_LOG(endpoint) ((endpoint) & 0xF) +#define DESC_TO_PHY(endpoint) ((((endpoint)&0x0F)<<1) | (((endpoint) & 0x80) ? 1:0)) +#define PHY_TO_DESC(endpoint) (((endpoint)>>1)|(((endpoint)&1)?0x80:0)) // Get endpoint direction -#define IN_EP(endpoint) ((endpoint) & 1U ? true : false) -#define OUT_EP(endpoint) ((endpoint) & 1U ? false : true) +#define DESC_EP_IN(endpoint) ((endpoint) & 0x80U ? true : false) +#define DESC_EP_OUT(endpoint) ((endpoint) & 0x80U ? false : true) #define BD_OWN_MASK (1<<7) #define BD_DATA01_MASK (1<<6) @@ -78,6 +84,10 @@ typedef enum { MBED_ALIGN(512) BDT bdt[NUMBER_OF_PHYSICAL_ENDPOINTS * 2]; // 512 bytes aligned! uint8_t * endpoint_buffer[NUMBER_OF_PHYSICAL_ENDPOINTS * 2]; +uint8_t ep0_buffer[2][MAX_PACKET_SIZE_EP0]; +uint8_t ep1_buffer[2][MAX_PACKET_SIZE_EP1]; +uint8_t ep2_buffer[2][MAX_PACKET_SIZE_EP2]; +uint8_t ep3_buffer[2][MAX_PACKET_SIZE_EP3]; static uint8_t set_addr = 0; static uint8_t addr = 0; @@ -89,26 +99,31 @@ static uint32_t frameNumber() { return((USB0->FRMNUML | (USB0->FRMNUMH << 8)) & 0x07FF); } -uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer) { - return 0; +USBPhy *get_usb_phy() +{ + static USBPhyHw usbphy; + return &usbphy; } -USBHAL::USBHAL(void) { +USBPhyHw::USBPhyHw() +{ + +} + +USBPhyHw::~USBPhyHw() +{ +} + +void USBPhyHw::init(USBPhyEvents *events) +{ + this->events = events; + // Disable IRQ NVIC_DisableIRQ(USB0_IRQn); #if (defined(FSL_FEATURE_SOC_MPU_COUNT) && (FSL_FEATURE_SOC_MPU_COUNT > 0U)) MPU->CESR=0; #endif - // fill in callback array - epCallback[0] = &USBHAL::EP1_OUT_callback; - epCallback[1] = &USBHAL::EP1_IN_callback; - epCallback[2] = &USBHAL::EP2_OUT_callback; - epCallback[3] = &USBHAL::EP2_IN_callback; - epCallback[4] = &USBHAL::EP3_OUT_callback; - epCallback[5] = &USBHAL::EP3_IN_callback; - epCallback[6] = &USBHAL::EP4_OUT_callback; - epCallback[7] = &USBHAL::EP4_IN_callback; #if defined(TARGET_KL43Z) || defined(TARGET_K22F) || defined(TARGET_K64F) // enable USBFS clock @@ -124,8 +139,6 @@ USBHAL::USBHAL(void) { // Attach IRQ instance = this; - NVIC_SetVector(USB0_IRQn, (uint32_t)&_usbisr); - NVIC_EnableIRQ(USB0_IRQn); // USB Module Configuration // Set BDT Base Register @@ -138,7 +151,6 @@ USBHAL::USBHAL(void) { // USB Interrupt Enablers USB0->INTEN |= USB_INTEN_TOKDNEEN_MASK | - USB_INTEN_SOFTOKEN_MASK | USB_INTEN_ERROREN_MASK | USB_INTEN_USBRSTEN_MASK; @@ -148,50 +160,69 @@ USBHAL::USBHAL(void) { USB0->USBTRC0 |= 0x40; /* Allocate control endpoint buffers */ - endpoint_buffer[EP_BDT_IDX(0, TX, ODD)] = (uint8_t *)malloc(MAX_PACKET_SIZE_EP0); - endpoint_buffer[EP_BDT_IDX(0, RX, ODD)] = (uint8_t *)malloc(MAX_PACKET_SIZE_EP0); + endpoint_buffer[EP_BDT_IDX(0, TX, ODD)] = ep0_buffer[TX]; + endpoint_buffer[EP_BDT_IDX(0, RX, ODD)] = ep0_buffer[RX]; + endpoint_buffer[EP_BDT_IDX(1, TX, ODD)] = ep1_buffer[TX]; + endpoint_buffer[EP_BDT_IDX(1, RX, ODD)] = ep1_buffer[RX]; + endpoint_buffer[EP_BDT_IDX(2, TX, ODD)] = ep2_buffer[TX]; + endpoint_buffer[EP_BDT_IDX(2, RX, ODD)] = ep2_buffer[RX]; + endpoint_buffer[EP_BDT_IDX(3, TX, ODD)] = ep3_buffer[TX]; + endpoint_buffer[EP_BDT_IDX(3, RX, ODD)] = ep3_buffer[RX]; + + NVIC_SetVector(USB0_IRQn, (uint32_t)&_usbisr); + NVIC_EnableIRQ(USB0_IRQn); } -USBHAL::~USBHAL(void) { } +void USBPhyHw::deinit() +{ + disconnect(); + NVIC_DisableIRQ(USB0_IRQn); + USB0->INTEN = 0; +} -void USBHAL::connect(void) { +bool USBPhyHw::powered() +{ + return true; +} + +void USBPhyHw::connect() +{ // enable USB USB0->CTL |= USB_CTL_USBENSOFEN_MASK; // Pull up enable USB0->CONTROL |= USB_CONTROL_DPPULLUPNONOTG_MASK; - - // Allocate endpoint buffers; do allocate control endpoint buffers - for (int i = 4; i < (NUMBER_OF_PHYSICAL_ENDPOINTS * 2); i++) { - if ((i == EPISO_OUT) || (i == EPISO_IN)) { - endpoint_buffer[i] = (uint8_t *)malloc(MAX_PACKET_SIZE_EPISO); - } else { - endpoint_buffer[i] = (uint8_t *)malloc(MAX_PACKET_SIZE_EPBULK); - } - } } -void USBHAL::disconnect(void) { +void USBPhyHw::disconnect() +{ // disable USB USB0->CTL &= ~USB_CTL_USBENSOFEN_MASK; // Pull up disable USB0->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK; - - //Free buffers if required; do not free the control endpoint buffers - for (int i = 4; i < (NUMBER_OF_PHYSICAL_ENDPOINTS * 2); i++) { - free(endpoint_buffer[i]); - endpoint_buffer[i] = NULL; - } } -void USBHAL::configureDevice(void) { +void USBPhyHw::configure() +{ // not needed } -void USBHAL::unconfigureDevice(void) { +void USBPhyHw::unconfigure() +{ // not needed } -void USBHAL::setAddress(uint8_t address) { +void USBPhyHw::sof_enable() +{ + USB0->INTEN |= USB_INTEN_SOFTOKEN_MASK; +} + +void USBPhyHw::sof_disable() +{ + USB0->INTEN &= ~USB_INTEN_SOFTOKEN_MASK; +} + +void USBPhyHw::set_address(uint8_t address) +{ // we don't set the address now otherwise the usb controller does not ack // we set a flag instead // see usbisr when an IN token is received @@ -199,64 +230,54 @@ void USBHAL::setAddress(uint8_t address) { addr = address; } -bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t flags) { - uint32_t handshake_flag = 0; - uint8_t * buf; - - if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { - return false; - } - - uint32_t log_endpoint = PHY_TO_LOG(endpoint); - - if ((flags & ISOCHRONOUS) == 0) { - handshake_flag = USB_ENDPT_EPHSHK_MASK; - } - - if (IN_EP(endpoint)) { - buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)][0]; - } else { - buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)][0]; - } +void USBPhyHw::remote_wakeup() +{ + // TODO +} - // IN endpt -> device to host (TX) - if (IN_EP(endpoint)) { - USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) - USB_ENDPT_EPTXEN_MASK; // en TX (IN) tran - bdt[EP_BDT_IDX(log_endpoint, TX, ODD )].address = (uint32_t) buf; - bdt[EP_BDT_IDX(log_endpoint, TX, EVEN)].address = 0; - } - // OUT endpt -> host to device (RX) - else { - USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) - USB_ENDPT_EPRXEN_MASK; // en RX (OUT) tran. - bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].byte_count = maxPacket; - bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].address = (uint32_t) buf; - bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info = BD_DTS_MASK; - bdt[EP_BDT_IDX(log_endpoint, RX, EVEN)].info = 0; - if (log_endpoint == 0) { - // Prepare for setup packet - bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info |= BD_OWN_MASK; +#define ALLOW_BULK_OR_INT_ENDPOINTS (USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_ALLOW_INT) +#define ALLOW_NO_ENDPOINTS 0 + +const usb_ep_table_t* USBPhyHw::endpoint_table() +{ + static const usb_ep_table_t endpoint_table = { + 1, // No cost per endpoint - everything allocated up front + { + {USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_BULK_OR_INT_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_BULK_OR_INT_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0} } - } - - // First transfer will be a DATA0 packet - Data1 &= ~(1 << endpoint); + }; + return &endpoint_table; +} - return true; +uint32_t USBPhyHw::ep0_set_max_packet(uint32_t max_packet) +{ + return MAX_PACKET_SIZE_EP0; } // read setup packet -void USBHAL::EP0setup(uint8_t *buffer) { +void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) +{ uint32_t sz; - endpointReadResult(EP0OUT, buffer, &sz); + endpoint_read_result(EP0OUT, buffer, size, &sz); } -void USBHAL::EP0readStage(void) { - // Not needed -} - -void USBHAL::EP0read(void) { +void USBPhyHw::ep0_read() +{ if (ctrl_xfer == CTRL_XFER_READY) { // Transfer is done so ignore call return; @@ -281,77 +302,142 @@ void USBHAL::EP0read(void) { // without any processor intervention. Data1 &= ~1UL; // set DATA0 } - endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0); + endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0); } -uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) { +uint32_t USBPhyHw::ep0_read_result(uint8_t *buffer, uint32_t size) +{ uint32_t sz; - endpointReadResult(EP0OUT, buffer, &sz); + endpoint_read_result(EP0OUT, buffer, size, &sz); return sz; } -void USBHAL::EP0write(uint8_t *buffer, uint32_t size) { +void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) +{ if (ctrl_xfer == CTRL_XFER_READY) { // Transfer is done so ignore call return; } if ((ctrl_xfer == CTRL_XFER_NONE) || (ctrl_xfer == CTRL_XFER_OUT)) { // Prepare for next setup packet - endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0); + endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0); ctrl_xfer = CTRL_XFER_READY; } - endpointWrite(EP0IN, buffer, size); -} - -void USBHAL::EP0getWriteResult(void) { + endpoint_write(EP0IN, buffer, size); } -void USBHAL::EP0stall(void) { +void USBPhyHw::ep0_stall() +{ if (ctrl_xfer == CTRL_XFER_READY) { // Transfer is done so ignore call return; } ctrl_xfer = CTRL_XFER_READY; core_util_critical_section_enter(); - stallEndpoint(EP0OUT); + endpoint_stall(EP0OUT); // Prepare for next setup packet // Note - time between stalling and setting up the endpoint // must be kept to a minimum to prevent a dropped SETUP // packet. - endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0); + endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0); core_util_critical_section_exit(); } -EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) { - uint8_t log_endpoint = PHY_TO_LOG(endpoint); +bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type) +{ + uint32_t handshake_flag = 0; + uint8_t * buf; + + if (DESC_TO_PHY(endpoint) > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { + return false; + } + + uint32_t log_endpoint = DESC_TO_LOG(endpoint); + + if (type != USB_EP_TYPE_ISO) { + handshake_flag = USB_ENDPT_EPHSHK_MASK; + } + + if (DESC_EP_IN(endpoint)) { + buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)][0]; + } else { + buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)][0]; + } + + // IN endpt -> device to host (TX) + if (DESC_EP_IN(endpoint)) { + USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) + USB_ENDPT_EPTXEN_MASK; // en TX (IN) tran + bdt[EP_BDT_IDX(log_endpoint, TX, ODD )].address = (uint32_t) buf; + bdt[EP_BDT_IDX(log_endpoint, TX, EVEN)].address = 0; + } + // OUT endpt -> host to device (RX) + else { + USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) + USB_ENDPT_EPRXEN_MASK; // en RX (OUT) tran. + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].byte_count = max_packet; + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].address = (uint32_t) buf; + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info = BD_DTS_MASK; + bdt[EP_BDT_IDX(log_endpoint, RX, EVEN)].info = 0; + if (log_endpoint == 0) { + // Prepare for setup packet + bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info |= BD_OWN_MASK; + } + } + + // First transfer will be a DATA0 packet + Data1 &= ~(1 << DESC_TO_PHY(endpoint)); + + return true; +} + +void USBPhyHw::endpoint_remove(usb_ep_t endpoint) +{ + USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT = 0; +} + +void USBPhyHw::endpoint_stall(usb_ep_t endpoint) +{ + USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK; +} + +void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) +{ + USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; +} + +bool USBPhyHw:: endpoint_read(usb_ep_t endpoint, uint32_t max_packet) +{ + uint8_t log_endpoint = DESC_TO_LOG(endpoint); uint32_t idx = EP_BDT_IDX(log_endpoint, RX, 0); - bdt[idx].byte_count = maximumSize; - if ((Data1 >> endpoint) & 1) { + bdt[idx].byte_count = max_packet; + if ((Data1 >> DESC_TO_PHY(endpoint)) & 1) { bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK | BD_DATA01_MASK; } else { bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK; } - Data1 ^= (1 << endpoint); - return EP_PENDING; + Data1 ^= (1 << DESC_TO_PHY(endpoint)); + return true; } -EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) { +bool USBPhyHw::endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytes_read) +{ uint32_t n, sz, idx, setup = 0; uint8_t not_iso; uint8_t * ep_buf; - uint32_t log_endpoint = PHY_TO_LOG(endpoint); + uint32_t log_endpoint = DESC_TO_LOG(endpoint); - if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { - return EP_INVALID; + if (DESC_TO_PHY(endpoint) > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { + return false; } // if read on a IN endpoint -> error - if (IN_EP(endpoint)) { - return EP_INVALID; + if (DESC_EP_IN(endpoint)) { + return false; } idx = EP_BDT_IDX(log_endpoint, RX, 0); @@ -359,8 +445,8 @@ EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_ not_iso = USB0->ENDPOINT[log_endpoint].ENDPT & USB_ENDPT_EPHSHK_MASK; //for isochronous endpoint, we don't wait an interrupt - if ((log_endpoint != 0) && not_iso && !(epComplete & EP(endpoint))) { - return EP_PENDING; + if ((log_endpoint != 0) && not_iso && !(epComplete & EP(DESC_TO_PHY(endpoint)))) { + return false; } if ((log_endpoint == 0) && (TOK_PID(idx) == SETUP_TOKEN)) { @@ -370,40 +456,41 @@ EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_ ep_buf = endpoint_buffer[idx]; for (n = 0; n < sz; n++) { - buffer[n] = ep_buf[n]; + data[n] = ep_buf[n]; } if (setup) { // Record the setup type - if (buffer[6] == 0) { + if (data[6] == 0) { ctrl_xfer = CTRL_XFER_NONE; } else { - uint8_t in_xfer = (buffer[0] >> 7) & 1; + uint8_t in_xfer = (data[0] >> 7) & 1; ctrl_xfer = in_xfer ? CTRL_XFER_IN : CTRL_XFER_OUT; } } USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; - *bytesRead = sz; + *bytes_read = sz; - epComplete &= ~EP(endpoint); - return EP_COMPLETED; + epComplete &= ~EP(DESC_TO_PHY(endpoint)); + return true; } -EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) { +bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ uint32_t idx, n; uint8_t * ep_buf; - if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { - return EP_INVALID; + if (DESC_TO_PHY(endpoint) > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) { + return false; } // if write on a OUT endpoint -> error - if (OUT_EP(endpoint)) { - return EP_INVALID; + if (DESC_EP_OUT(endpoint)) { + return false; } - idx = EP_BDT_IDX(PHY_TO_LOG(endpoint), TX, 0); + idx = EP_BDT_IDX(DESC_TO_LOG(endpoint), TX, 0); bdt[idx].byte_count = size; ep_buf = endpoint_buffer[idx]; @@ -412,52 +499,28 @@ EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) ep_buf[n] = data[n]; } - if ((Data1 >> endpoint) & 1) { + if ((Data1 >> DESC_TO_PHY(endpoint)) & 1) { bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK | BD_DATA01_MASK; } else { bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK; } - Data1 ^= (1 << endpoint); - - return EP_PENDING; -} - -EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) { - if (epComplete & EP(endpoint)) { - epComplete &= ~EP(endpoint); - return EP_COMPLETED; - } - - return EP_PENDING; -} + Data1 ^= (1 << DESC_TO_PHY(endpoint)); -void USBHAL::stallEndpoint(uint8_t endpoint) { - USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK; -} - -void USBHAL::unstallEndpoint(uint8_t endpoint) { - USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; -} - -bool USBHAL::getEndpointStallState(uint8_t endpoint) { - uint8_t stall = (USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT & USB_ENDPT_EPSTALL_MASK); - return (stall) ? true : false; + return true; } -void USBHAL::remoteWakeup(void) { - // [TODO] +void USBPhyHw::endpoint_abort(usb_ep_t endpoint) +{ + uint8_t dir = DESC_EP_IN(endpoint) ? TX : RX; + uint32_t idx = EP_BDT_IDX(DESC_TO_LOG(endpoint), dir, 0); + bdt[idx].info &= ~BD_OWN_MASK; } - -void USBHAL::_usbisr(void) { - instance->usbisr(); -} - - -void USBHAL::usbisr(void) { +void USBPhyHw::process() +{ uint8_t i; - uint8_t istat = USB0->ISTAT; + uint8_t istat = USB0->ISTAT & USB0->INTEN; // reset interrupt if (istat & USB_ISTAT_USBRST_MASK) { @@ -467,8 +530,8 @@ void USBHAL::usbisr(void) { } // enable control endpoint - realiseEndpoint(EP0OUT, MAX_PACKET_SIZE_EP0, 0); - realiseEndpoint(EP0IN, MAX_PACKET_SIZE_EP0, 0); + endpoint_add(EP0OUT, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); + endpoint_add(EP0IN, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); Data1 = 0x55555555; USB0->CTL |= USB_CTL_ODDRST_MASK; @@ -479,21 +542,24 @@ void USBHAL::usbisr(void) { USB0->ADDR = 0x00; // set default address // reset bus for USBDevice layer - busReset(); + events->reset(); + NVIC_ClearPendingIRQ(USB0_IRQn); + NVIC_EnableIRQ(USB0_IRQn); return; } // resume interrupt if (istat & USB_ISTAT_RESUME_MASK) { USB0->ISTAT = USB_ISTAT_RESUME_MASK; + events->suspend(false); } // SOF interrupt if (istat & USB_ISTAT_SOFTOK_MASK) { USB0->ISTAT = USB_ISTAT_SOFTOK_MASK; // SOF event, read frame number - SOF(frameNumber()); + events->sof(frameNumber()); } // stall interrupt @@ -508,7 +574,7 @@ void USBHAL::usbisr(void) { uint32_t num = (USB0->STAT >> 4) & 0x0F; uint32_t dir = (USB0->STAT >> 3) & 0x01; uint32_t ev_odd = (USB0->STAT >> 2) & 0x01; - int endpoint = (num << 1) | dir; + int phy_ep = (num << 1) | dir; // setup packet if ((num == 0) && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == SETUP_TOKEN)) { @@ -517,35 +583,31 @@ void USBHAL::usbisr(void) { bdt[EP_BDT_IDX(0, TX, ODD)].info &= ~BD_OWN_MASK; // EP0 SETUP event (SETUP data received) - EP0setupCallback(); + events->ep0_setup(); } else { // OUT packet if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == OUT_TOKEN) { if (num == 0) - EP0out(); + events->ep0_out(); else { - epComplete |= EP(endpoint); - if ((instance->*(epCallback[endpoint - 2]))()) { - epComplete &= ~EP(endpoint); - } + epComplete |= EP(phy_ep); + events->out(PHY_TO_DESC(phy_ep)); } } // IN packet if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == IN_TOKEN) { if (num == 0) { - EP0in(); + events->ep0_in(); if (set_addr == 1) { USB0->ADDR = addr & 0x7F; set_addr = 0; } } else { - epComplete |= EP(endpoint); - if ((instance->*(epCallback[endpoint - 2]))()) { - epComplete &= ~EP(endpoint); - } + epComplete |= EP(phy_ep); + events->in(PHY_TO_DESC(phy_ep)); } } } @@ -556,6 +618,7 @@ void USBHAL::usbisr(void) { // sleep interrupt if (istat & 1<<4) { USB0->ISTAT = USB_ISTAT_SLEEP_MASK; + events->suspend(true); } // error interrupt @@ -563,7 +626,14 @@ void USBHAL::usbisr(void) { USB0->ERRSTAT = 0xFF; USB0->ISTAT = USB_ISTAT_ERROR_MASK; } + + NVIC_ClearPendingIRQ(USB0_IRQn); + NVIC_EnableIRQ(USB0_IRQn); } +void USBPhyHw::_usbisr(void) { + NVIC_DisableIRQ(USB0_IRQn); + instance->events->start_process(); +} #endif diff --git a/targets/targets.json b/targets/targets.json index f2e5d0680e3..fc0a4ddcf59 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -1484,7 +1484,8 @@ "STDIO_MESSAGES", "STORAGE", "TRNG", - "FLASH" + "FLASH", + "USBDEVICE" ], "features": ["STORAGE"], "release_versions": ["2", "5"], From e499396d8f245796dbe375f98b4a801d7c75301a Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 7 Mar 2018 18:44:15 -0600 Subject: [PATCH 279/488] Add and assert USB callback completion Assert that when a callback is completed it is the active callback. --- usb/device/USBDevice/USBDevice.cpp | 39 +++++++++++++++++------------- usb/device/USBDevice/USBDevice.h | 10 +++++++- 2 files changed, 31 insertions(+), 18 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 828ec145717..9206388d99f 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -215,10 +215,10 @@ bool USBDevice::_control_out() /* Check if transfer has completed */ if (_transfer.remaining == 0) { /* Transfer completed */ + _transfer.user_callback = RequestXferDone; if (_transfer.notify) { /* Notify class layer. */ _transfer.notify = false; - _transfer.user_callback = true; callback_request_xfer_done(&_transfer.setup, false); } else { complete_request_xfer_done(true); @@ -276,10 +276,10 @@ bool USBDevice::_control_in() */ if ((_transfer.remaining == 0) && !_transfer.zlp) { /* Transfer completed */ + _transfer.user_callback = RequestXferDone; if (_transfer.notify) { /* Notify class layer. */ _transfer.notify = false; - _transfer.user_callback = true; callback_request_xfer_done(&_transfer.setup, false); } else { complete_request_xfer_done(true); @@ -298,7 +298,8 @@ void USBDevice::complete_request_xfer_done(bool success) { lock(); - _transfer.user_callback = false; + MBED_ASSERT(_transfer.user_callback == RequestXferDone); + _transfer.user_callback = None; if (_abort_control) { _control_abort(); unlock(); @@ -350,7 +351,7 @@ bool USBDevice::_request_set_configuration() _phy->unconfigure(); _change_state(Address); } else { - _transfer.user_callback = true; + _transfer.user_callback = SetConfiguration; callback_set_configuration(_device.configuration); } @@ -361,7 +362,8 @@ void USBDevice::complete_set_configuration(bool success) { lock(); - _transfer.user_callback = false; + MBED_ASSERT(_transfer.user_callback == SetConfiguration); + _transfer.user_callback = None; if (_abort_control) { _control_abort(); unlock(); @@ -413,7 +415,7 @@ bool USBDevice::_request_set_interface() { assert_locked(); - _transfer.user_callback = true; + _transfer.user_callback = SetInterface; callback_set_interface(_transfer.setup.wIndex, _transfer.setup.wValue); return true; } @@ -422,7 +424,8 @@ void USBDevice::complete_set_interface(bool success) { lock(); - _transfer.user_callback = false; + MBED_ASSERT(_transfer.user_callback == SetInterface); + _transfer.user_callback = None; if (_abort_control) { _control_abort(); unlock(); @@ -619,6 +622,7 @@ void USBDevice::_control_setup() _transfer.zlp = false; _transfer.notify = false; _transfer.stage = Setup; + _transfer.user_callback = Request; #ifdef DEBUG printf("dataTransferDirection: %d\r\nType: %d\r\nRecipient: %d\r\nbRequest: %d\r\nwValue: %d\r\nwIndex: %d\r\nwLength: %d\r\n", _transfer.setup.bmRequestType.dataTransferDirection, @@ -638,10 +642,11 @@ void USBDevice::complete_request(RequestResult direction, uint8_t *data, uint32_ { lock(); - _transfer.user_callback = false; + MBED_ASSERT(_transfer.user_callback == Request); + _transfer.user_callback = None; if (_abort_control) { if ((direction == Receive) || (direction == Send)) { - _transfer.user_callback = true; + _transfer.user_callback = RequestXferDone; callback_request_xfer_done(&_transfer.setup, true); } else { _control_abort(); @@ -657,7 +662,7 @@ void USBDevice::complete_request(RequestResult direction, uint8_t *data, uint32_ } /* user_callback may be set by _request_setup() */ - if (!_transfer.user_callback) { + if (_transfer.user_callback == None) { _control_setup_continue(); } } else if (direction == Failure) { @@ -678,10 +683,10 @@ void USBDevice::_control_abort_start() assert_locked(); _setup_ready = false; - if (_transfer.user_callback) { - _abort_control = true; - } else { + if (_transfer.user_callback == None) { _control_abort(); + } else { + _abort_control = true; } } @@ -787,12 +792,12 @@ void USBDevice::ep0_setup() _setup_ready = true; /* Endpoint 0 setup event */ - if (_transfer.user_callback) { + if (_transfer.user_callback == None) { + _control_setup(); + } else { /* A new setup packet has arrived so abort the current control transfer */ _abort_control = true; - } else { - _control_setup(); } } @@ -806,7 +811,7 @@ void USBDevice::ep0_out() return; } - if (_transfer.user_callback) { + if (_transfer.user_callback != None) { /* EP0 OUT should not receive data if the stack is waiting on a user callback for the buffer to fill or status */ MBED_ASSERT(0); diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 371359fa8b0..5a532528d0f 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -540,6 +540,14 @@ class USBDevice: public USBPhyEvents { Status }; + enum UserCallback { + None, + Request, + RequestXferDone, + SetConfiguration, + SetInterface + }; + struct control_transfer_t { setup_packet_t setup; uint8_t *ptr; @@ -548,7 +556,7 @@ class USBDevice: public USBPhyEvents { bool zlp; bool notify; ControlState stage; - bool user_callback; + UserCallback user_callback; }; endpoint_info_t _endpoint_info[32 - 2]; From ff902b95e90ff7a97f2d20928b87d1e8b30979aa Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 14 Mar 2018 18:37:17 -0500 Subject: [PATCH 280/488] Change USBDevice read handling Remove the USBDevice function read_start and automatically start all reads internally in USBDevice. This patch also renames the function read_finish to read. --- usb/device/USBDevice/USBDevice.cpp | 39 ++++++------------------------ usb/device/USBDevice/USBDevice.h | 20 ++++----------- 2 files changed, 13 insertions(+), 46 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 9206388d99f..d8cf7ee729e 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -866,6 +866,8 @@ void USBDevice::out(usb_ep_t endpoint) endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; info->pending += 1; + _phy->endpoint_read(endpoint, info->max_packet_size); + if (info->callback) { (this->*(info->callback))(endpoint); } @@ -994,7 +996,11 @@ bool USBDevice::endpoint_add(usb_ep_t endpoint, uint32_t max_packet_size, usb_ep info->flags |= ENDPOINT_ENABLED; info->pending = 0; info->max_packet_size = max_packet_size; - ret = true; + ret = _phy->endpoint_read(endpoint, max_packet_size); + if (!ret) { + MBED_ASSERT(0); + endpoint_remove(endpoint); + } } unlock(); @@ -1191,36 +1197,7 @@ uint32_t USBDevice::endpoint_max_packet_size(usb_ep_t endpoint) return size; } -bool USBDevice::read_start(usb_ep_t endpoint) -{ - lock(); - - if (!EP_INDEXABLE(endpoint)) { - MBED_ASSERT(0); - unlock(); - return false; - } - - if(!configured()) { - unlock(); - return false; - } - - endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; - if (!(info->flags & ENDPOINT_ENABLED)) { - // Invalid endpoint is being used - MBED_ASSERT(0); - unlock(); - return false; - } - - bool ret = _phy->endpoint_read(endpoint, info->max_packet_size); - - unlock(); - return ret; -} - -bool USBDevice::read_finish(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint32_t *size) +bool USBDevice::read(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint32_t *size) { lock(); diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 5a532528d0f..1ede75ea10f 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -201,22 +201,12 @@ class USBDevice: public USBPhyEvents { */ uint32_t endpoint_max_packet_size(usb_ep_t endpoint); - /** Start a read on the given endpoint - * - * After the read is finished call read_start to get the result. - * - * @param endpoint endpoint to perform the read on - * @return true if the read was started, false if no more reads can be started - * @note This endpoint must already have been setup with endpoint_add - */ - bool read_start(usb_ep_t endpoint); - /** - * Finish a read on the given endpoint + * Read a packet on the given endpoint * - * Get the contents of a read started with read_start. To ensure all - * the data from this endpoint is read make sure the buffer and size - * passed is at least as big as the maximum packet for this endpoint. + * Get the contents of an IN transfer. To ensure all the data from this + * endpoint is read make sure the buffer and size passed in is at least + * as big as the maximum packet for this endpoint. * * @param endpoint endpoint to read data from * @param buffer buffer to fill with read data @@ -226,7 +216,7 @@ class USBDevice: public USBPhyEvents { * @return true if the read was completed, otherwise false * @note This endpoint must already have been setup with endpoint_add */ - bool read_finish(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint32_t *size); + bool read(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint32_t *size); /** * Write a data to the given endpoint From a733986d4a48b38bdf99adb63648704fb3820250 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 14 Mar 2018 18:38:16 -0500 Subject: [PATCH 281/488] Update USBTester for simplified read handling Remove read_start and replace read_finish with read to match the new USBDevice API. --- TESTS/usb_device/basic/USBTester.cpp | 19 ++----------------- usb/device/USBDevice/USBDevice.cpp | 3 +-- 2 files changed, 3 insertions(+), 19 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index 1f26fce2f1c..5ccd7c68222 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -148,9 +148,6 @@ void USBTester::callback_set_configuration(uint8_t configuration) endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); - read_start(int_out); - read_start(bulk_out); - complete_set_configuration(true); } @@ -167,9 +164,6 @@ void USBTester::callback_set_interface(uint16_t interface, uint8_t alternate) endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); - read_start(int_out); - read_start(bulk_out); - complete_set_interface(true); return; } @@ -184,9 +178,6 @@ void USBTester::callback_set_interface(uint16_t interface, uint8_t alternate) endpoint_add(bulk_in, MIN_EP_SIZE, USB_EP_TYPE_BULK); endpoint_add(bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); - read_start(int_out); - read_start(bulk_out); - complete_set_interface(true); return; } @@ -362,10 +353,7 @@ void USBTester::epint_out_callback(usb_ep_t endpoint) uint8_t buffer[65]; uint32_t size = 0; - if (!read_finish(endpoint, buffer, sizeof(buffer), &size)) { - return; - } - if (!read_start(endpoint)) { + if (!read(endpoint, buffer, sizeof(buffer), &size)) { return; } } @@ -374,10 +362,7 @@ void USBTester::epbulk_out_callback(usb_ep_t endpoint) uint8_t buffer[65]; uint32_t size = 0; - if (!read_finish(endpoint, buffer, sizeof(buffer), &size)) { - return; - } - if (!read_start(endpoint)) { + if (!read(endpoint, buffer, sizeof(buffer), &size)) { return; } } diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index d8cf7ee729e..c99b9824ef9 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -866,8 +866,6 @@ void USBDevice::out(usb_ep_t endpoint) endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; info->pending += 1; - _phy->endpoint_read(endpoint, info->max_packet_size); - if (info->callback) { (this->*(info->callback))(endpoint); } @@ -1229,6 +1227,7 @@ bool USBDevice::read(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint bool ret = _phy->endpoint_read_result(endpoint, buffer, max_size, size); if (ret) { info->pending -= 1; + _phy->endpoint_read(endpoint, info->max_packet_size); } unlock(); From 05b4189a60b59c4d1091ae4925d68b7c96d069a8 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 15 Mar 2018 16:59:17 -0500 Subject: [PATCH 282/488] Fix USB init problems Initialize the _transfer structure so the behavior is the same regardless of prior memory contents. This fixes a hang during USB testing when CI flags are used. --- usb/device/USBDevice/USBDevice.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index c99b9824ef9..c724da23aa2 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -1140,6 +1140,8 @@ USBDevice::USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint1 this->product_release = product_release; memset(_endpoint_info, 0, sizeof(_endpoint_info)); + memset(&_transfer, 0, sizeof(_transfer)); + _transfer.user_callback = None; _setup_ready = false; _abort_control = false; @@ -1163,6 +1165,8 @@ USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_r this->product_release = product_release; memset(_endpoint_info, 0, sizeof(_endpoint_info)); + memset(&_transfer, 0, sizeof(_transfer)); + _transfer.user_callback = None; _setup_ready = false; _abort_control = false; From b67ef8f39201b651cbbf29a6ab008d4b63f07974 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 15 Mar 2018 20:10:36 -0500 Subject: [PATCH 283/488] Update stall state on set and clear feature Call USBDevice::endpoint_stall/unstall in the request to set/clear halt so the endpoint state is properly updated in the array _endpoint_info. --- usb/device/USBDevice/USBDevice.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index c724da23aa2..f735ec90da7 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -460,10 +460,10 @@ bool USBDevice::_request_set_feature() /* TODO: Remote wakeup feature not supported */ break; case ENDPOINT_RECIPIENT: - if (!EP_VALID(_transfer.setup.wIndex)) { + if (!EP_INDEXABLE(_transfer.setup.wIndex)) { break; } else if (_transfer.setup.wValue == ENDPOINT_HALT) { - _phy->endpoint_stall(_transfer.setup.wIndex); + endpoint_stall(_transfer.setup.wIndex); success = true; } break; @@ -492,10 +492,10 @@ bool USBDevice::_request_clear_feature() /* TODO: Remote wakeup feature not supported */ break; case ENDPOINT_RECIPIENT: - if (!EP_VALID(_transfer.setup.wIndex)) { + if (!EP_INDEXABLE(_transfer.setup.wIndex)) { break; } else if (_transfer.setup.wValue == ENDPOINT_HALT) { - _phy->endpoint_unstall(_transfer.setup.wIndex); + endpoint_unstall(_transfer.setup.wIndex); success = true; } break; From 60a89743b8c4d227407b619b1b6bc61972ae6edf Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 16 Mar 2018 19:58:15 -0500 Subject: [PATCH 284/488] Move USBDevice processing out of user callbacks Perform processing triggered by user callbacks when USB is being unlocked rather than synchronously. This prevents recursive callbacks which reduces stack usage. This also prevents state change inside the user callback which makes the code easier to reason about. --- usb/device/USBDevice/USBDevice.cpp | 76 +++++++++++++++++++++++++++--- usb/device/USBDevice/USBDevice.h | 19 ++++++++ 2 files changed, 88 insertions(+), 7 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index f735ec90da7..6c5ebaa1bc9 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -299,6 +299,18 @@ void USBDevice::complete_request_xfer_done(bool success) lock(); MBED_ASSERT(_transfer.user_callback == RequestXferDone); + _transfer.args.status = success; + _run_later(&USBDevice::_complete_request_xfer_done); + + unlock(); +} + +void USBDevice::_complete_request_xfer_done() +{ + assert_locked(); + + bool success = _transfer.args.status; + _transfer.user_callback = None; if (_abort_control) { _control_abort(); @@ -320,8 +332,6 @@ void USBDevice::complete_request_xfer_done(bool success) _transfer.stage = Status; _phy->ep0_read(); } - - unlock(); } bool USBDevice::_request_set_address() @@ -363,6 +373,18 @@ void USBDevice::complete_set_configuration(bool success) lock(); MBED_ASSERT(_transfer.user_callback == SetConfiguration); + _transfer.args.status = success; + _run_later(&USBDevice::_complete_set_configuration); + + unlock(); +} + +void USBDevice::_complete_set_configuration() +{ + assert_locked(); + + bool success = _transfer.args.status; + _transfer.user_callback = None; if (_abort_control) { _control_abort(); @@ -379,7 +401,6 @@ void USBDevice::complete_set_configuration(bool success) _phy->ep0_stall(); } - unlock(); } bool USBDevice::_request_get_configuration() @@ -425,6 +446,18 @@ void USBDevice::complete_set_interface(bool success) lock(); MBED_ASSERT(_transfer.user_callback == SetInterface); + _transfer.args.status = success; + _run_later(&USBDevice::_complete_set_interface); + + unlock(); +} + +void USBDevice::_complete_set_interface() +{ + assert_locked(); + + bool success = _transfer.args.status; + _transfer.user_callback = None; if (_abort_control) { _control_abort(); @@ -439,8 +472,6 @@ void USBDevice::complete_set_interface(bool success) } else { _phy->ep0_stall(); } - - unlock(); } bool USBDevice::_request_set_feature() @@ -643,6 +674,22 @@ void USBDevice::complete_request(RequestResult direction, uint8_t *data, uint32_ lock(); MBED_ASSERT(_transfer.user_callback == Request); + _transfer.args.request.result = direction; + _transfer.args.request.data = data; + _transfer.args.request.size = size; + _run_later(&USBDevice::_complete_request); + + unlock(); +} + +void USBDevice::_complete_request() +{ + assert_locked(); + + RequestResult direction = _transfer.args.request.result; + uint8_t *data = _transfer.args.request.data; + uint32_t size = _transfer.args.request.size; + _transfer.user_callback = None; if (_abort_control) { if ((direction == Receive) || (direction == Send)) { @@ -674,8 +721,6 @@ void USBDevice::complete_request(RequestResult direction, uint8_t *data, uint32_ _transfer.direction = direction; _control_setup_continue(); } - - unlock(); } void USBDevice::_control_abort_start() @@ -1151,6 +1196,7 @@ USBDevice::USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint1 _current_interface = 0; _current_alternate = 0; _locked = 0; + _post_process = NULL; /* Set initial device state */ _device.state = Powered; @@ -1176,6 +1222,7 @@ USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_r _current_interface = 0; _current_alternate = 0; _locked = 0; + _post_process = NULL; /* Set initial device state */ _device.state = Powered; @@ -1390,6 +1437,16 @@ void USBDevice::lock() void USBDevice::unlock() { MBED_ASSERT(_locked > 0); + + if (_locked == 1) { + // Perform post processing before fully unlocking + while (_post_process != NULL) { + void (USBDevice::*call)() = _post_process; + _post_process = NULL; + (this->*call)(); + } + } + _locked--; core_util_critical_section_exit(); } @@ -1424,3 +1481,8 @@ void USBDevice::_change_state(DeviceState new_state) { callback_state_change(new_state); } + +void USBDevice::_run_later(void (USBDevice::*function)()) +{ + _post_process = function; +} diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 1ede75ea10f..2f69dfef37a 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -509,6 +509,12 @@ class USBDevice: public USBPhyEvents { bool _request_get_interface(); bool _request_set_interface(); void _change_state(DeviceState state); + void _run_later(void (USBDevice::*function)()); + + void _complete_request(); + void _complete_request_xfer_done(); + void _complete_set_configuration(); + void _complete_set_interface(); struct endpoint_info_t { void (USBDevice::*callback)(usb_ep_t endpoint); @@ -538,6 +544,17 @@ class USBDevice: public USBPhyEvents { SetInterface }; + struct complete_request_t { + RequestResult result; + uint8_t *data; + uint32_t size; + }; + + union complete_args_t { + complete_request_t request; + bool status; + }; + struct control_transfer_t { setup_packet_t setup; uint8_t *ptr; @@ -547,6 +564,7 @@ class USBDevice: public USBPhyEvents { bool notify; ControlState stage; UserCallback user_callback; + complete_args_t args; }; endpoint_info_t _endpoint_info[32 - 2]; @@ -556,6 +574,7 @@ class USBDevice: public USBPhyEvents { control_transfer_t _transfer; usb_device_t _device; uint32_t _max_packet_size_ep0; + void (USBDevice::*_post_process)(); bool _setup_ready; bool _abort_control; From 35dc641da90b11e2ad5a403b8300fe3cf6c8d83c Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 16 Mar 2018 22:56:20 -0500 Subject: [PATCH 285/488] Allow transfer to start when configuring USB Allow reads and writes to be started when entering the configured state. --- usb/device/USBDevice/USBDevice.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 6c5ebaa1bc9..c522cf3d95b 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -1256,7 +1256,8 @@ bool USBDevice::read(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint return false; } - if (!configured()) { + bool configuring = _transfer.user_callback == SetConfiguration; + if (!configured() && !configuring) { unlock(); return false; } @@ -1295,7 +1296,8 @@ bool USBDevice::write(usb_ep_t endpoint, uint8_t *buffer, uint32_t size) return false; } - if (!configured()) { + bool configuring = _transfer.user_callback == SetConfiguration; + if (!configured() && !configuring) { unlock(); return false; } From 304e4007cc8ee606dc396a91aae5294e401363b8 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 17 Mar 2018 18:08:30 -0500 Subject: [PATCH 286/488] Explicitly return when endpoint 0 is stalled Stalling endpoint 0 indicates the end of a control transfer. Return immediately when this occurs rather than continuing processing. In particular, this patch prevents status from erroneously being sent when _request_setup returns false inside _complete_request. --- usb/device/USBDevice/USBDevice.cpp | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index c522cf3d95b..37cd9c1eb23 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -399,6 +399,7 @@ void USBDevice::_complete_set_configuration() _control_setup_continue(); } else { _phy->ep0_stall(); + return; } } @@ -471,6 +472,7 @@ void USBDevice::_complete_set_interface() _control_setup_continue(); } else { _phy->ep0_stall(); + return; } } @@ -706,6 +708,7 @@ void USBDevice::_complete_request() /* Standard requests */ if (!_request_setup()) { _phy->ep0_stall(); + return; } /* user_callback may be set by _request_setup() */ @@ -714,6 +717,7 @@ void USBDevice::_complete_request() } } else if (direction == Failure) { _phy->ep0_stall(); + return; } else { _transfer.notify = true; _transfer.remaining = size; @@ -872,6 +876,7 @@ void USBDevice::ep0_out() if (!_control_out()) { /* Protocol stall; this will stall both endpoints */ _phy->ep0_stall(); + return; } } @@ -896,6 +901,7 @@ void USBDevice::ep0_in() if (!_control_in()) { /* Protocol stall; this will stall both endpoints */ _phy->ep0_stall(); + return; } } From 2a8efdcacf69b9f8eb2594d2a0b833cf730a892e Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 17 Mar 2018 21:21:13 -0500 Subject: [PATCH 287/488] Call disconnect when uninitializing USB Disconnect USB when uninitializing USB so it is in a well defined state. --- usb/device/USBDevice/USBDevice.cpp | 13 +++++++++++-- usb/device/USBDevice/USBDevice.h | 1 + 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 37cd9c1eb23..84910903e2d 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -958,6 +958,7 @@ void USBDevice::deinit() lock(); if (_initialized) { + disconnect(); this->_phy->deinit(); _initialized = false; } @@ -980,7 +981,10 @@ void USBDevice::connect(bool blocking) { /* Connect device */ lock(); - _phy->connect(); + if (!_connected) { + _phy->connect(); + _connected = true; + } unlock(); if (blocking) { @@ -994,7 +998,10 @@ void USBDevice::disconnect() lock(); /* Disconnect device */ - _phy->disconnect(); + if (_connected) { + _phy->disconnect(); + _connected = false; + } /* Set initial device state */ if (_device.state > Powered) { @@ -1199,6 +1206,7 @@ USBDevice::USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint1 _phy = phy; _initialized = false; + _connected = false; _current_interface = 0; _current_alternate = 0; _locked = 0; @@ -1225,6 +1233,7 @@ USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_r _phy = get_usb_phy(); _initialized = false; + _connected = false; _current_interface = 0; _current_alternate = 0; _locked = 0; diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 2f69dfef37a..9d3e01d4dfb 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -571,6 +571,7 @@ class USBDevice: public USBPhyEvents { USBPhy *_phy; bool _initialized; + bool _connected; control_transfer_t _transfer; usb_device_t _device; uint32_t _max_packet_size_ep0; From 195e1602cfe380ee3a5a4d76372e087c66759f60 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sun, 18 Mar 2018 19:32:20 -0500 Subject: [PATCH 288/488] Update USBPhy to allow zero copy transfers Update the USBPhy to allow for zero copy USB transfers on devices which support it. This also aligns more closely with the CMSIS USB driver model. --- platform/USBPhy.h | 25 ++++++++++++------------- 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/platform/USBPhy.h b/platform/USBPhy.h index 33f5870e1a6..1e800e33fcb 100644 --- a/platform/USBPhy.h +++ b/platform/USBPhy.h @@ -182,16 +182,18 @@ class USBPhy { /** * Start receiving a packet of up to wMaxPacketSize on endpoint 0 + * + * @param data Buffer to fill with the data read + * @param size Size of buffer */ - virtual void ep0_read() = 0; + virtual void ep0_read(uint8_t *data, uint32_t size) = 0; /** * Read the contents of a received packet * - * @param buffer Buffer to fill with the data read - * @param size Size of buffer + * @return Size of data read */ - virtual uint32_t ep0_read_result(uint8_t *buffer, uint32_t size) = 0; + virtual uint32_t ep0_read_result() = 0; /** * Write a packet on endpoint 0 @@ -253,23 +255,20 @@ class USBPhy { * Start a read on the given endpoint * * @param endpoint Endpoint to start the read on - * @param max_packet A hint as to the wMaxPacketSize of this endpoint. - * This must match the size in endpoint_add. + * @param data Buffer to fill with data + * @param size Size of the read buffer. This must be at least + * the max packet size for this endpoint. * @return true if the read was successfully started, false otherwise */ - virtual bool endpoint_read(usb_ep_t endpoint, uint32_t max_packet) = 0; + virtual bool endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) = 0; /** * Finish a read on the given endpoint * - * @param endpoint Endpoint to read data from - * @param data Buffer to fill with data - * @param size Size of buffer - * @param bytes_read The number of bytes in the current packet. This can be larger than - * the size parameter if the buffer passed in was too small. + * @param endpoint Endpoint to check * @return true if data was read false otherwise */ - virtual bool endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytes_read) = 0; + virtual uint32_t endpoint_read_result(usb_ep_t endpoint) = 0; /** * Start a write on the given endpoint From 3ced159df9a47f424fa570648d4ea251debf6ebd Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 16 Mar 2018 23:49:26 -0500 Subject: [PATCH 289/488] Update USBDevice to reflect the updated USBPhy Update USBDevice so the USB buffers are user supplied. --- usb/device/USBDevice/USBDevice.cpp | 87 ++++++++++++++++++++++++------ usb/device/USBDevice/USBDevice.h | 36 +++++++++---- 2 files changed, 97 insertions(+), 26 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 84910903e2d..808def213c0 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -200,7 +200,7 @@ bool USBDevice::_control_out() } /* Read from endpoint */ - packetSize = _phy->ep0_read_result(_transfer.ptr, _transfer.remaining); + packetSize = _phy->ep0_read_result(); /* Check if transfer size is valid */ if (packetSize > _transfer.remaining) { @@ -224,7 +224,7 @@ bool USBDevice::_control_out() complete_request_xfer_done(true); } } else { - _phy->ep0_read(); + _phy->ep0_read(_transfer.ptr, _transfer.remaining); } return true; @@ -330,7 +330,7 @@ void USBDevice::_complete_request_xfer_done() _phy->ep0_write(NULL, 0); } else if (_transfer.stage == DataIn) { _transfer.stage = Status; - _phy->ep0_read(); + _phy->ep0_read(NULL, 0); } } @@ -800,7 +800,7 @@ void USBDevice::_control_setup_continue() } else { /* OUT stage */ _transfer.stage = DataOut; - _phy->ep0_read(); + _phy->ep0_read(_transfer.ptr, _transfer.remaining); } } else { /* Status stage */ @@ -1052,11 +1052,6 @@ bool USBDevice::endpoint_add(usb_ep_t endpoint, uint32_t max_packet_size, usb_ep info->flags |= ENDPOINT_ENABLED; info->pending = 0; info->max_packet_size = max_packet_size; - ret = _phy->endpoint_read(endpoint, max_packet_size); - if (!ret) { - MBED_ASSERT(0); - endpoint_remove(endpoint); - } } unlock(); @@ -1261,7 +1256,7 @@ uint32_t USBDevice::endpoint_max_packet_size(usb_ep_t endpoint) return size; } -bool USBDevice::read(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint32_t *size) +bool USBDevice::read_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size) { lock(); @@ -1291,17 +1286,43 @@ bool USBDevice::read(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint return false; } - bool ret = _phy->endpoint_read_result(endpoint, buffer, max_size, size); - if (ret) { - info->pending -= 1; - _phy->endpoint_read(endpoint, info->max_packet_size); + _phy->endpoint_read(endpoint, buffer, info->max_packet_size); + + unlock(); + + return true; +} + +uint32_t USBDevice::read_finish(usb_ep_t endpoint) +{ + lock(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); + return 0; } + if (!configured()) { + unlock(); + return 0; + } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + if (!(info->flags & ENDPOINT_ENABLED)) { + // Invalid endpoint is being used + MBED_ASSERT(0); + unlock(); + return 0; + } + + uint32_t size = 0; + size = _phy->endpoint_read_result(endpoint); unlock(); - return ret; + return size; } -bool USBDevice::write(usb_ep_t endpoint, uint8_t *buffer, uint32_t size) +bool USBDevice::write_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t size) { lock(); @@ -1341,13 +1362,47 @@ bool USBDevice::write(usb_ep_t endpoint, uint8_t *buffer, uint32_t size) /* Send report */ bool ret = _phy->endpoint_write(endpoint, buffer, size); if (ret) { + info->transfer_size = size; info->pending += 1; + } else { + info->transfer_size = 0; } unlock(); return ret; } +uint32_t USBDevice::write_finish(usb_ep_t endpoint) +{ + uint32_t ret = 0; + + lock(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); + return false; + } + + if (!configured()) { + unlock(); + return false; + } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + if (!(info->flags & ENDPOINT_ENABLED)) { + // Invalid endpoint is being used + MBED_ASSERT(0); + unlock(); + return 0; + } + + ret = info->transfer_size; + + unlock(); + return ret; +} + const uint8_t *USBDevice::device_desc() { uint8_t device_descriptor_temp[] = { diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 9d3e01d4dfb..a61549ca68f 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -202,26 +202,33 @@ class USBDevice: public USBPhyEvents { uint32_t endpoint_max_packet_size(usb_ep_t endpoint); /** - * Read a packet on the given endpoint + * start a read on the given endpoint * - * Get the contents of an IN transfer. To ensure all the data from this - * endpoint is read make sure the buffer and size passed in is at least - * as big as the maximum packet for this endpoint. + * Start a read on the given endpoint. The data buffer must remain + * unchanged until the transfer either completes or is aborted. * * @param endpoint endpoint to read data from * @param buffer buffer to fill with read data - * @param max_size the total size of the data buffer. This must be at least - * the max packet size of this endpoint - * @param size The size of data that was read + * @param size The size of data to read. This must be greater than or equal + * to the max packet size for this endpoint * @return true if the read was completed, otherwise false * @note This endpoint must already have been setup with endpoint_add */ - bool read(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size, uint32_t *size); + bool read_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t size); + + /** + * Get the status of a read + * + * @param endpoint endpoint to get the status of + * @return number of bytes read by this endpoint + */ + uint32_t read_finish(usb_ep_t endpoint); /** * Write a data to the given endpoint * - * Write data to an endpoint. + * Write data to an endpoint. The data sent must remain unchanged until + * the transfer either completes or is aborted. * * @param endpoint endpoint to write data to * @param buffer data to write @@ -229,7 +236,15 @@ class USBDevice: public USBPhyEvents { * max packet size of this endpoint * @note This endpoint must already have been setup with endpoint_add */ - bool write(usb_ep_t endpoint, uint8_t *buffer, uint32_t size); + bool write_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t size); + + /** + * Get the status of a write + * + * @param endpoint endpoint to get the status of + * @return number of bytes sent by this endpoint + */ + uint32_t write_finish(usb_ep_t endpoint); /* * Get device descriptor. @@ -519,6 +534,7 @@ class USBDevice: public USBPhyEvents { struct endpoint_info_t { void (USBDevice::*callback)(usb_ep_t endpoint); uint16_t max_packet_size; + uint16_t transfer_size; uint8_t flags; uint8_t pending; }; From d37bd6882d6b24d242b2386c639596ec0823f867 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 17 Mar 2018 18:09:09 -0500 Subject: [PATCH 290/488] Add abort API to USBDevice Add the function endpoint_abort and ensure ongoing transfer are aborted when an endpoint is removed. --- usb/device/USBDevice/USBDevice.cpp | 50 ++++++++++++++++++++++++++++-- usb/device/USBDevice/USBDevice.h | 8 +++++ 2 files changed, 56 insertions(+), 2 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 808def213c0..da3617cedd4 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -916,7 +916,8 @@ void USBDevice::out(usb_ep_t endpoint) endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; - info->pending += 1; + MBED_ASSERT(info->pending >= 1); + info->pending -= 1; if (info->callback) { (this->*(info->callback))(endpoint); } @@ -1071,6 +1072,10 @@ void USBDevice::endpoint_remove(usb_ep_t endpoint) endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; MBED_ASSERT(info->flags & ENDPOINT_ENABLED); + if (info->pending) { + _phy->endpoint_abort(endpoint); + } + info->callback = NULL; info->flags = 0; info->pending = 0; @@ -1256,6 +1261,38 @@ uint32_t USBDevice::endpoint_max_packet_size(usb_ep_t endpoint) return size; } +void USBDevice::endpoint_abort(usb_ep_t endpoint) +{ + lock(); + + if (!EP_INDEXABLE(endpoint)) { + MBED_ASSERT(0); + unlock(); + return; + } + + bool configuring = _transfer.user_callback == SetConfiguration; + if (!configured() && !configuring) { + unlock(); + return; + } + + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; + if (!(info->flags & ENDPOINT_ENABLED)) { + // Invalid endpoint is being used + MBED_ASSERT(0); + unlock(); + return; + } + + if (info->pending) { + _phy->endpoint_abort(endpoint); + info->pending = 0; + } + + unlock(); +} + bool USBDevice::read_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size) { lock(); @@ -1286,7 +1323,16 @@ bool USBDevice::read_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size return false; } - _phy->endpoint_read(endpoint, buffer, info->max_packet_size); + if (info->pending) { + // Only allow 1 packet + unlock(); + return false; + } + + bool ret = _phy->endpoint_read(endpoint, buffer, info->max_packet_size); + if (ret) { + info->pending += 1; + } unlock(); diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index a61549ca68f..698591b2e66 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -201,6 +201,14 @@ class USBDevice: public USBPhyEvents { */ uint32_t endpoint_max_packet_size(usb_ep_t endpoint); + /** + * Abort the current transfer on this endpoint + * + * @param endpoint endpoint with transfer to abort + * @note This endpoint must already have been setup with endpoint_add + */ + void endpoint_abort(usb_ep_t endpoint); + /** * start a read on the given endpoint * From 514b5091e9b564fcbbbb41766a1f29036ed66a7b Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 17 Mar 2018 20:05:12 -0500 Subject: [PATCH 291/488] Update USBTester for the new USB API Update the class USBTester so it works with the new zero-copy USBDevice API. --- TESTS/usb_device/basic/USBTester.cpp | 22 ++++++++++------------ TESTS/usb_device/basic/USBTester.h | 2 ++ 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index 5ccd7c68222..3235a3f8554 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -145,8 +145,10 @@ void USBTester::callback_set_configuration(uint8_t configuration) // Configure endpoints > 0 endpoint_add(int_in, MAX_EP_SIZE, USB_EP_TYPE_INT); endpoint_add(int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); + read_start(int_out, int_buf, sizeof(int_buf)); endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); + read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); complete_set_configuration(true); } @@ -161,8 +163,10 @@ void USBTester::callback_set_interface(uint16_t interface, uint8_t alternate) endpoint_add(int_in, MAX_EP_SIZE, USB_EP_TYPE_INT); endpoint_add(int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); + read_start(int_out, int_buf, sizeof(int_buf)); endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); + read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); complete_set_interface(true); return; @@ -175,8 +179,10 @@ void USBTester::callback_set_interface(uint16_t interface, uint8_t alternate) endpoint_add(int_in, MIN_EP_SIZE, USB_EP_TYPE_INT); endpoint_add(int_out, MIN_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); + read_start(int_out, int_buf, sizeof(int_buf)); endpoint_add(bulk_in, MIN_EP_SIZE, USB_EP_TYPE_BULK); endpoint_add(bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); + read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); complete_set_interface(true); return; @@ -350,20 +356,12 @@ const uint8_t *USBTester::configuration_desc() void USBTester::epint_out_callback(usb_ep_t endpoint) { - uint8_t buffer[65]; - uint32_t size = 0; - - if (!read(endpoint, buffer, sizeof(buffer), &size)) { - return; - } + read_finish(endpoint); + read_start(endpoint, int_buf, sizeof(int_buf)); } void USBTester::epbulk_out_callback(usb_ep_t endpoint) { - uint8_t buffer[65]; - uint32_t size = 0; - - if (!read(endpoint, buffer, sizeof(buffer), &size)) { - return; - } + read_finish(endpoint); + read_start(endpoint, bulk_buf, sizeof(bulk_buf)); } diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index 0e527af98ab..7b56d3171e5 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -73,8 +73,10 @@ class USBTester: public USBDevice { protected: uint8_t bulk_in; uint8_t bulk_out; + uint8_t bulk_buf[64]; uint8_t int_in; uint8_t int_out; + uint8_t int_buf[64]; EventQueue *queue; virtual void callback_state_change(DeviceState new_state); From c61550cec677b101baec0193a9faf0aba6237f8b Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 10 Mar 2018 23:13:45 -0600 Subject: [PATCH 292/488] Update the LPC17XX driver to the new API Update this driver to match the new zero-copy API. --- .../TARGET_LPC176X/usb/USBHAL_LPC17.cpp | 60 +++++++++++++------ .../TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h | 12 ++-- 2 files changed, 50 insertions(+), 22 deletions(-) diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp index 23e8c1f87a1..ef3a66ea831 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp +++ b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp @@ -23,8 +23,8 @@ // Get endpoint direction -#define IN_EP(endpoint) ((endpoint) & 1U ? true : false) -#define OUT_EP(endpoint) ((endpoint) & 1U ? false : true) +#define IN_EP(endpoint) ((endpoint) & 0x80U ? true : false) +#define OUT_EP(endpoint) ((endpoint) & 0x80U ? false : true) // Convert physical endpoint number to register bit #define EP(endpoint) (1UL<PCONP |= PCUSB; @@ -466,14 +469,20 @@ void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) endpointReadcore(EP0OUT, buffer, size); } -void USBPhyHw::ep0_read(void) +void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) { - endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0); + read_buffers[EP0OUT] = data; + read_sizes[EP0OUT] = size; + SIEselectEndpoint(EP0OUT); + SIEclearBuffer(); } -uint32_t USBPhyHw::ep0_read_result(uint8_t *buffer, uint32_t size) +uint32_t USBPhyHw::ep0_read_result() { - return endpointReadcore(EP0OUT, buffer, size); + uint32_t size = endpointReadcore(EP0OUT, read_buffers[EP0OUT], read_sizes[EP0OUT]); + read_buffers[EP0OUT] = NULL; + read_sizes[EP0OUT] = 0; + return size; } void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) @@ -487,29 +496,41 @@ void USBPhyHw::ep0_stall(void) endpoint_stall(EP0OUT); } -bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint32_t maximumSize) +bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) { - // Don't clear isochronous endpoints - if ((DESC_TO_PHY(endpoint) >> 1) % 3 || (DESC_TO_PHY(endpoint) >> 1) == 0) { - SIEselectEndpoint(endpoint); - SIEclearBuffer(); + read_buffers[endpoint] = data; + read_sizes[endpoint] = size; + enableEndpointEvent(endpoint); + uint8_t status = SIEselectEndpoint(endpoint); + if (status & ((1 << 5) | (1 << 6))) { + // If any buffer has data then set the interrupt flag + LPC_USB->USBEpIntSet = EP(endpoint); } return true; } -bool USBPhyHw::endpoint_read_result(usb_ep_t endpoint, uint8_t *buffer, uint32_t size, uint32_t *bytesRead) +uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) { //for isochronous endpoint, we don't wait an interrupt if ((DESC_TO_PHY(endpoint) >> 1) % 3 || (DESC_TO_PHY(endpoint) >> 1) == 0) { if (!(epComplete & EP(endpoint))) { - return false; + return 0; } } - *bytesRead = endpointReadcore(endpoint, buffer, size); + uint32_t bytesRead = endpointReadcore(endpoint, read_buffers[endpoint], read_sizes[endpoint]); + read_buffers[endpoint] = NULL; + read_sizes[endpoint] = 0; + + // Don't clear isochronous endpoints + if ((DESC_TO_PHY(endpoint) >> 1) % 3 || (DESC_TO_PHY(endpoint) >> 1) == 0) { + SIEselectEndpoint(endpoint); + SIEclearBuffer(); + } + epComplete &= ~EP(endpoint); - return true; + return bytesRead; } bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) @@ -536,7 +557,9 @@ bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t maxPacket, usb_ep_type_t while (!(LPC_USB->USBDevIntSt & EP_RLZED)); LPC_USB->USBDevIntClr = EP_RLZED; - enableEndpointEvent(endpoint); + if (IN_EP(endpoint)) { + enableEndpointEvent(endpoint); + } return true; } @@ -649,6 +672,8 @@ void USBPhyHw::process(void) if ((devStat & SIE_DS_SUS) == 0) { events->suspend(true); } + memset(read_buffers, 0, sizeof(read_buffers)); + memset(read_sizes, 0, sizeof(read_sizes)); events->reset(); } } @@ -693,9 +718,10 @@ void USBPhyHw::process(void) selectEndpointClearInterrupt(endpoint); epComplete |= EP(endpoint); LPC_USB->USBDevIntClr = EP_SLOW; - if (endpoint & 0x80) {//TODO - use macro + if (IN_EP(endpoint)) { events->in(endpoint); } else { + disableEndpointEvent(endpoint); events->out(endpoint); } } diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h index 999991c6a66..ad2ca502c52 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h +++ b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h @@ -40,18 +40,18 @@ class USBPhyHw : public USBPhy { virtual uint32_t ep0_set_max_packet(uint32_t max_packet); virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size); - virtual void ep0_read(void); - virtual uint32_t ep0_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_read(uint8_t *data, uint32_t size); + virtual uint32_t ep0_read_result(); virtual void ep0_write(uint8_t *buffer, uint32_t size); - virtual void ep0_stall(void); + virtual void ep0_stall(); virtual bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type); virtual void endpoint_remove(usb_ep_t endpoint); virtual void endpoint_stall(usb_ep_t endpoint); virtual void endpoint_unstall(usb_ep_t endpoint); - virtual bool endpoint_read(usb_ep_t endpoint, uint32_t maximumSize); - virtual bool endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytesRead); + virtual bool endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual uint32_t endpoint_read_result(usb_ep_t endpoint); virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size); virtual void endpoint_abort(usb_ep_t endpoint); @@ -59,6 +59,8 @@ class USBPhyHw : public USBPhy { private: USBPhyEvents *events; + uint8_t *read_buffers[16]; + uint16_t read_sizes[16]; static void _usbisr(void); }; From 7a1fb18b274ea785d5d4c8d32c2ef5ead361de30 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sun, 18 Mar 2018 19:10:13 -0500 Subject: [PATCH 293/488] Update the Kinetis USB driver to the new API Update this driver to match the new zero-copy API. --- targets/TARGET_Freescale/usb/USBPhyHw.h | 14 ++++-- .../TARGET_Freescale/usb/USBPhy_Kinetis.cpp | 46 ++++++++++++++----- 2 files changed, 45 insertions(+), 15 deletions(-) diff --git a/targets/TARGET_Freescale/usb/USBPhyHw.h b/targets/TARGET_Freescale/usb/USBPhyHw.h index f11c7512705..7bf1fee22f0 100644 --- a/targets/TARGET_Freescale/usb/USBPhyHw.h +++ b/targets/TARGET_Freescale/usb/USBPhyHw.h @@ -40,8 +40,8 @@ class USBPhyHw : public USBPhy { virtual uint32_t ep0_set_max_packet(uint32_t max_packet); virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size); - virtual void ep0_read(); - virtual uint32_t ep0_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_read(uint8_t *data, uint32_t size); + virtual uint32_t ep0_read_result(); virtual void ep0_write(uint8_t *buffer, uint32_t size); virtual void ep0_stall(); @@ -50,8 +50,8 @@ class USBPhyHw : public USBPhy { virtual void endpoint_stall(usb_ep_t endpoint); virtual void endpoint_unstall(usb_ep_t endpoint); - virtual bool endpoint_read(usb_ep_t endpoint, uint32_t maximumSize); - virtual bool endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytesRead); + virtual bool endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual uint32_t endpoint_read_result(usb_ep_t endpoint); virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size); virtual void endpoint_abort(usb_ep_t endpoint); @@ -59,6 +59,12 @@ class USBPhyHw : public USBPhy { private: USBPhyEvents *events; + uint8_t *read_buffers[16]; + uint16_t read_sizes[16]; + + bool endpoint_read_core(usb_ep_t endpoint, uint32_t max_packet); + bool endpoint_read_result_core(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytesRead); + static void _usbisr(void); }; diff --git a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp index 3ca12d37fc8..3c98280a2c2 100644 --- a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp +++ b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp @@ -273,10 +273,10 @@ uint32_t USBPhyHw::ep0_set_max_packet(uint32_t max_packet) void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) { uint32_t sz; - endpoint_read_result(EP0OUT, buffer, size, &sz); + endpoint_read_result_core(EP0OUT, buffer, size, &sz); } -void USBPhyHw::ep0_read() +void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) { if (ctrl_xfer == CTRL_XFER_READY) { // Transfer is done so ignore call @@ -301,15 +301,15 @@ void USBPhyHw::ep0_read() // This allows a subsequent SETUP packet to be stored // without any processor intervention. Data1 &= ~1UL; // set DATA0 + endpoint_read_core(EP0OUT, MAX_PACKET_SIZE_EP0); + } else { + endpoint_read(EP0OUT, data, size); } - endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0); } -uint32_t USBPhyHw::ep0_read_result(uint8_t *buffer, uint32_t size) +uint32_t USBPhyHw::ep0_read_result() { - uint32_t sz; - endpoint_read_result(EP0OUT, buffer, size, &sz); - return sz; + return endpoint_read_result(EP0OUT); } void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) @@ -320,7 +320,7 @@ void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) } if ((ctrl_xfer == CTRL_XFER_NONE) || (ctrl_xfer == CTRL_XFER_OUT)) { // Prepare for next setup packet - endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0); + endpoint_read_core(EP0OUT, MAX_PACKET_SIZE_EP0); ctrl_xfer = CTRL_XFER_READY; } endpoint_write(EP0IN, buffer, size); @@ -339,7 +339,7 @@ void USBPhyHw::ep0_stall() // Note - time between stalling and setting up the endpoint // must be kept to a minimum to prevent a dropped SETUP // packet. - endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0); + endpoint_read_core(EP0OUT, MAX_PACKET_SIZE_EP0); core_util_critical_section_exit(); } @@ -406,7 +406,16 @@ void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; } -bool USBPhyHw:: endpoint_read(usb_ep_t endpoint, uint32_t max_packet) +bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ + uint8_t log = DESC_TO_LOG(endpoint); + + read_buffers[log] = data; + read_sizes[log] = size; + return endpoint_read_core(endpoint, size); +} + +bool USBPhyHw::endpoint_read_core(usb_ep_t endpoint, uint32_t max_packet) { uint8_t log_endpoint = DESC_TO_LOG(endpoint); @@ -423,7 +432,19 @@ bool USBPhyHw:: endpoint_read(usb_ep_t endpoint, uint32_t max_packet) return true; } -bool USBPhyHw::endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytes_read) +uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) +{ + uint8_t log = DESC_TO_LOG(endpoint); + + uint32_t bytes_read = 0; + endpoint_read_result_core(endpoint, read_buffers[log], read_sizes[log], &bytes_read); + read_buffers[log] = NULL; + read_sizes[log] = 0; + return bytes_read; +} + + +bool USBPhyHw::endpoint_read_result_core(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytes_read) { uint32_t n, sz, idx, setup = 0; uint8_t not_iso; @@ -541,6 +562,9 @@ void USBPhyHw::process() USB0->ERREN = 0xFF; // enable error interrupt sources USB0->ADDR = 0x00; // set default address + memset(read_buffers, 0, sizeof(read_buffers)); + memset(read_sizes, 0, sizeof(read_sizes)); + // reset bus for USBDevice layer events->reset(); From 077ba938c0998145191d6863982ba5251612a4ce Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sun, 18 Mar 2018 20:20:59 -0500 Subject: [PATCH 294/488] Update USBPhy doxygen Update USBPhy doxygen to pull in handbook copyedits. Also update the docs to reflect the enhanced USBPhy API. --- platform/USBPhy.h | 78 ++++++++++++++++++++++++++++------------------- 1 file changed, 47 insertions(+), 31 deletions(-) diff --git a/platform/USBPhy.h b/platform/USBPhy.h index 1e800e33fcb..ef2c91a096f 100644 --- a/platform/USBPhy.h +++ b/platform/USBPhy.h @@ -23,42 +23,58 @@ /** Abstract interface to physical USB hardware * * # Defined behavior - * * Any endpoint configurations which fit in the parameters of the table returned - * by USBPhy::endpoint_table can be used. - * * All endpoints in any valid endpoint configuration can be used concurrently - * * Device supports use of at least one control, bulk, interrupt and + * * You can use any endpoint configurations that fit in the parameters + * of the table returned by USBPhy::endpoint_table. + * * You can use all endpoints in any valid endpoint configuration concurrently. + * * The device supports use of at least one control, bulk, interrupt and * isochronous in each direction at the same time - at least 8 endpoints. - * * Device supports all standard endpoint sizes (wMaxPacketSize) - * * Device can handle an interrupt latency of at least 100ms if reset is not being performed and address is not being set - * * USBPhyEvents events are only sent when USBPhy is in the initialized state - * * When unpowered only the USBPhyEvents::power event can be sent - * * On USB reset all endpoints are removed except for endpoint 0 - * * USBPhyEvents::out and USBPhyEvents::in events only occur for endpoints which have been added - * * A call to USBPhy::ep0_write results in USBPhyEvents::in getting called if not - * interrupted by a power loss or reset - * * A call to endpoint_read followed by endpoint_read_result results in USBPhyEvents::out getting called if not - * interrupted by a power loss or reset - * * Endpoint 0 naks all transactions aside from setup packets until one - * of ep0_read, ep0_write or ep0_stall has been called - * * Endpoint 0 stall is automatically cleared on reception of a setup packet + * * USBPhy supports all standard endpoint sizes (wMaxPacketSize). + * * USBPhy can handle an interrupt latency of at least 100ms if the host PC + * is not performing a reset or setting the device's address. + * * USBPhy only sends USBPhyEvents when it is in the initialized state. + * * When unpowered, USBPhy only sends the USBPhyEvents::power event. + * * On USB reset, all endpoints are removed except for endpoint 0. + * * A call to USBPhy::ep0_write results in the call of USBPhyEvents::in when + * the PC reads the data unless a power loss, reset, or a call to + * USBPhy::disconnect occurs first. + * * A call to USBPhy::endpoint_write results in the call of USBPhyEvents::in + * when the pc reads the data unless a power loss, reset, or a call to + * USBPhy::endpoint_abort occurs first. + * * A call to USBPhy::endpoint_read results in the call of USBPhyEvents::out + * when the pc sends data unless a power loss, reset, or a call to + * USBPhy::endpoint_abort occurs first. + * * Endpoint 0 naks all transactions aside from setup packets until + * higher-level code calls one of USBPhy::ep0_read, USBPhy::ep0_write or + * USBPhy::ep0_stall. + * * Endpoint 0 stall automatically clears on reception of a setup packet. * * # Undefined behavior - * * Calling USBPhy::endpoint_add or USBPhy::endpoint_remove outside of the control requests SetInterface or SetConfiguration - * * Devices behavior is undefined if latency is greater than 2ms when address is being set - see USB spec 9.2.6.3 - * * Devices behavior is undefined if latency is greater than 10ms when a reset occurs - see USB spec 7.1.7.5 - * * Calling any of the USBPhy::endpoint_* functions on endpoint 0 + * * Calling USBPhy::endpoint_add or USBPhy::endpoint_remove outside of the + * control requests SetInterface or SetConfiguration. + * * Calling USBPhy::endpoint_remove on an endpoint that has an ongoing read + * or write operation. To avoid undefined behavior, you must abort ongoing + * operations with USBPhy::endpoint_abort. + * * Devices behavior is undefined if latency is greater than 2ms when address + * is being set - see USB spec 9.2.6.3. + * * Devices behavior is undefined if latency is greater than 10ms when a + * reset occurs - see USB spec 7.1.7.5. + * * Calling any of the USBPhy::endpoint_* functions on endpoint 0. * * # Notes - * * Make sure USB packets are processed in the correct order when multiple packets are present. - * Typically IN endpoints should be handled before OUT endpoints if both are pending. - * * Setup packets may be resent if there is noise on the USB line. The USBPhy should be able - * to gracefully handle this scenario and respond to the setup packet with an ACK. - * * Bi-directional protocols making use of alternating IN and OUT phases should not rely - * on the last ACK an IN transfer to indicate that the OUT phase should start. Instead, - * the OUT phase should be started at the same time the last IN transfer is started. This - * is because the ACK to the last in transfer may be dropped if there is noise on the USB - * line. If dropped it will only get re-sent on the next IN phase. More info on this can be - * found in section 8.5.3.3 of the USB spec. + * * Make sure USBPhy sends USBPhyEvents in the correct order when multiple + * packets are present. USBPhy must send IN endpoint events before OUT + * endpoint events if both are pending. + * * A host PC may resend setup packets to a USB device if there is noise on + * the USB line. The USBPhy should be able to handle this scenario and + * respond to the setup packet with an ACK. + * * Bidirectional protocols making use of alternating IN and OUT phases + * should not rely on the last ACK an IN transfer to indicate that the + * OUT phase should start. Instead, the OUT phase should be started at + * the same time the last IN transfer is started. This is because the ACK + * to the last in transfer may be dropped if there is noise on the USB + * line. If dropped, it will only be resent on the next IN phase. You can + * find more information on this in section 8.5.3.3 of the USB + * specification. * * @ingroup usb_device_core */ From 4740a517c2eb8b9d153e09af5116108bef605d4a Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 2 Mar 2018 17:13:11 -0600 Subject: [PATCH 295/488] Add USB utility classes Add an allocation free linked list implementation. Additionally add the class AsyncOp which provides blocking and wakeup funcionality to simplify making asynchronous operations block. --- usb/device/utilities/AsyncOp.cpp | 84 +++++++++++++++++++++++++ usb/device/utilities/AsyncOp.h | 62 ++++++++++++++++++ usb/device/utilities/LinkEntry.h | 35 +++++++++++ usb/device/utilities/LinkedList.h | 60 ++++++++++++++++++ usb/device/utilities/LinkedListBase.cpp | 84 +++++++++++++++++++++++++ usb/device/utilities/LinkedListBase.h | 60 ++++++++++++++++++ 6 files changed, 385 insertions(+) create mode 100644 usb/device/utilities/AsyncOp.cpp create mode 100644 usb/device/utilities/AsyncOp.h create mode 100644 usb/device/utilities/LinkEntry.h create mode 100644 usb/device/utilities/LinkedList.h create mode 100644 usb/device/utilities/LinkedListBase.cpp create mode 100644 usb/device/utilities/LinkedListBase.h diff --git a/usb/device/utilities/AsyncOp.cpp b/usb/device/utilities/AsyncOp.cpp new file mode 100644 index 00000000000..5f6939be2c9 --- /dev/null +++ b/usb/device/utilities/AsyncOp.cpp @@ -0,0 +1,84 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "AsyncOp.h" +#include "mbed_critical.h" + +using namespace rtos; + +AsyncOp::AsyncOp(Mutex *lock): _list(NULL), _signal(NULL), _signal_lock(lock) +{ + +} + +void AsyncOp::start(LinkedListBase *list) +{ + _lock(); + _list = list; + list->enqueue(this); + _unlock(); +} + +void AsyncOp::wait() +{ + if (_list == NULL) { + // Event either hasn't start or has already occurred + return; + } + + // Construct semaphore to wait on + Semaphore sem(0); + + // Atomically set the semaphore pointer and + // check for completion + _lock(); + bool done = _list == NULL; + _signal = &sem; + _unlock(); + + if (!done) { + sem.wait(); + } +} + +void AsyncOp::complete() +{ + _lock(); + _list->remove(this); + _list = NULL; + if (_signal != NULL) { + _signal->release(); + } + _unlock(); +} + +void AsyncOp::_lock() +{ + if (_signal_lock) { + _signal_lock->lock(); + } else { + core_util_critical_section_enter(); + } +} + +void AsyncOp::_unlock() +{ + if (_signal_lock) { + _signal_lock->unlock(); + } else { + core_util_critical_section_exit(); + } +} diff --git a/usb/device/utilities/AsyncOp.h b/usb/device/utilities/AsyncOp.h new file mode 100644 index 00000000000..be28c28cde1 --- /dev/null +++ b/usb/device/utilities/AsyncOp.h @@ -0,0 +1,62 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_ASYNC_OP_H +#define MBED_ASYNC_OP_H + +#include "Mutex.h" +#include "Semaphore.h" + +#include "LinkEntry.h" +#include "LinkedListBase.h" + +class AsyncOp: public LinkEntry { +public: + /** + * Construct a new AsyncOp object + * + * @param lock Mutex used to serialize the object or code calling complete + * or NULL if a critical section is used + */ + AsyncOp(rtos::Mutex *lock); + + /** + * Add this operation to the linked list to start it + */ + void start(LinkedListBase *list); + + /** + * Wait for this asynchronous operation to complete + */ + void wait(); + + /** + * Mark this asynchronous operation as complete + * + * This wake the thread calling wait() + */ + void complete(); + +private: + void _lock(); + void _unlock(); + + LinkedListBase *_list; + rtos::Semaphore *_signal; + rtos::Mutex *const _signal_lock; +}; + +#endif diff --git a/usb/device/utilities/LinkEntry.h b/usb/device/utilities/LinkEntry.h new file mode 100644 index 00000000000..c74a7c4b76d --- /dev/null +++ b/usb/device/utilities/LinkEntry.h @@ -0,0 +1,35 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_LINKED_ENTRY_H +#define MBED_LINKED_ENTRY_H + +#include + +class LinkEntry { +public: + LinkEntry(): _next(NULL) + { + + } + +private: + friend class LinkedListBase; + LinkEntry *_next; +}; + + +#endif diff --git a/usb/device/utilities/LinkedList.h b/usb/device/utilities/LinkedList.h new file mode 100644 index 00000000000..41a6f35d7ee --- /dev/null +++ b/usb/device/utilities/LinkedList.h @@ -0,0 +1,60 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_LINKED_LIST_H +#define MBED_LINKED_LIST_H + +#include "LinkEntry.h" +#include "LinkedListBase.h" + +template +class LinkedList: public LinkedListBase { +public: + LinkedList() {} + ~LinkedList() {} + + /** + * Return the element at the head of the list + * + * @return The element at the head of the list or NULL if the list is empty + */ + T *head() + { + return static_cast(LinkedListBase::head()); + } + + /** + * Add an element to the tail of the list + * + * @param entry New element to add + */ + void enqueue(T *entry) + { + LinkedListBase::enqueue(static_cast(entry)); + } + + /** + * Remove the element at the head of the list + * + * @return The element at the head of the list or NULL if the list is empty + */ + T *dequeue() + { + return static_cast(LinkedListBase::dequeue()); + } +}; + +#endif diff --git a/usb/device/utilities/LinkedListBase.cpp b/usb/device/utilities/LinkedListBase.cpp new file mode 100644 index 00000000000..f66a27aaed7 --- /dev/null +++ b/usb/device/utilities/LinkedListBase.cpp @@ -0,0 +1,84 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "LinkedList.h" +#include "LinkEntry.h" +#include "mbed_assert.h" + +LinkedListBase::LinkedListBase(): _head(0), _tail(0) +{ + +} + +LinkedListBase::~LinkedListBase() +{ + +} + +LinkEntry *LinkedListBase::head() +{ + return _head; +} + +void LinkedListBase::enqueue(LinkEntry *entry) +{ + entry->_next = NULL; + if (_tail == NULL) { + _head = entry; + } else { + _tail->_next = entry; + } + _tail = entry; +} + +LinkEntry *LinkedListBase::dequeue() +{ + if (_head == NULL) { + return NULL; + } + if (_head->_next == NULL) { + _tail = NULL; + } + LinkEntry *entry = _head; + _head = _head->_next; + entry->_next = NULL; + return entry; +} + +void LinkedListBase::remove(LinkEntry *entry) +{ + LinkEntry *prev = NULL; + LinkEntry *cur = _head; + while (cur != entry) { + if (cur == NULL) { + // Element is not in the list + return; + } + prev = cur; + cur = cur->_next; + } + + if (prev != NULL) { + prev->_next = entry->_next; + } + if (entry == _head) { + _head = entry->_next; + } + if (entry == _tail) { + _tail = prev; + } + entry->_next = NULL; +} diff --git a/usb/device/utilities/LinkedListBase.h b/usb/device/utilities/LinkedListBase.h new file mode 100644 index 00000000000..c778f45bd6c --- /dev/null +++ b/usb/device/utilities/LinkedListBase.h @@ -0,0 +1,60 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_LINKED_LIST_BASE_H +#define MBED_LINKED_LIST_BASE_H + +#include "LinkEntry.h" + +class LinkedListBase { +public: + LinkedListBase(); + ~LinkedListBase(); + + /** + * Return the element at the head of the list + * + * @return The element at the head of the list or NULL if the list is empty + */ + LinkEntry *head(); + + /** + * Add an element to the tail of the list + * + * @param entry New element to add + */ + void enqueue(LinkEntry *entry); + + /** + * Remove the element at the head of the list + * + * @return The element at the head of the list or NULL if the list is empty + */ + LinkEntry *dequeue(); + + /** + * Remove the specified element if it is in the list + * + * @param entry Element to remove from the list + */ + void remove(LinkEntry *entry); + +private: + LinkEntry *_head; + LinkEntry *_tail; +}; + +#endif From 57c6f1c7ba55d627926d62aa57b45a9d52194c87 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 16 Mar 2018 23:50:03 -0500 Subject: [PATCH 296/488] Update USBCDC and USBSerial Update the USBCDC and USBSerial classes to the new API. This patch also updates the blocking behavior to unblock at the appropriate times and to let the processor sleep when blocking rather than busy waiting. --- usb/device/USBSerial/USBCDC.cpp | 641 +++++++++++++++++++++++++++++ usb/device/USBSerial/USBCDC.h | 203 +++++++++ usb/device/USBSerial/USBSerial.cpp | 61 +++ usb/device/USBSerial/USBSerial.h | 205 +++++++++ 4 files changed, 1110 insertions(+) create mode 100644 usb/device/USBSerial/USBCDC.cpp create mode 100644 usb/device/USBSerial/USBCDC.h create mode 100644 usb/device/USBSerial/USBSerial.cpp create mode 100644 usb/device/USBSerial/USBSerial.h diff --git a/usb/device/USBSerial/USBCDC.cpp b/usb/device/USBSerial/USBCDC.cpp new file mode 100644 index 00000000000..519ebe72182 --- /dev/null +++ b/usb/device/USBSerial/USBCDC.cpp @@ -0,0 +1,641 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBCDC.h" +#include "EndpointResolver.h" +#include "AsyncOp.h" + +static const uint8_t cdc_line_coding_default[7] = {0x80, 0x25, 0x00, 0x00, 0x00, 0x00, 0x08}; + +#define DEFAULT_CONFIGURATION (1) + +#define CDC_SET_LINE_CODING 0x20 +#define CDC_GET_LINE_CODING 0x21 +#define CDC_SET_CONTROL_LINE_STATE 0x22 + +// Control Line State bits +#define CLS_DTR (1 << 0) +#define CLS_RTS (1 << 1) + +#define CDC_MAX_PACKET_SIZE 64 + +class USBCDC::AsyncWrite: public AsyncOp { +public: + AsyncWrite(uint8_t *buf, uint32_t size): AsyncOp(NULL), tx_buf(buf), tx_size(size), result(false) + { + + } + uint8_t *tx_buf; + uint32_t tx_size; + bool result; +}; + +class USBCDC::AsyncRead: public AsyncOp { +public: + AsyncRead(uint8_t *buf, uint32_t size, uint32_t *size_read, bool read_all) + : AsyncOp(NULL), rx_buf(buf), rx_size(size), rx_actual(size_read), all(read_all), result(false) + { + + } + uint8_t *rx_buf; + uint32_t rx_size; + uint32_t *rx_actual; + bool all; + bool result; +}; + +USBCDC::USBCDC(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking) + : USBDevice(vendor_id, product_id, product_release) + +{ + _init(connect_blocking); +} + +USBCDC::USBCDC(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking) + : USBDevice(phy, vendor_id, product_id, product_release) +{ + _init(connect_blocking); +} + +void USBCDC::_init(bool connect_blocking) +{ + memcpy(_cdc_line_coding, cdc_line_coding_default, sizeof(_cdc_line_coding)); + + EndpointResolver resolver(endpoint_table()); + resolver.endpoint_ctrl(CDC_MAX_PACKET_SIZE); + _bulk_in = resolver.endpoint_in(USB_EP_TYPE_BULK, CDC_MAX_PACKET_SIZE); + _bulk_out = resolver.endpoint_out(USB_EP_TYPE_BULK, CDC_MAX_PACKET_SIZE); + _int_in = resolver.endpoint_in(USB_EP_TYPE_INT, CDC_MAX_PACKET_SIZE); + MBED_ASSERT(resolver.valid()); + + _terminal_connected = false; + + _tx_in_progress = false; + _tx_buf = _tx_buffer; + _tx_size = 0; + + _rx_in_progress = false; + _rx_buf = _rx_buffer; + _rx_size = 0; + + init(); + + USBDevice::connect(false); + if (connect_blocking) { + wait_connected(); + } +} + +void USBCDC::callback_reset() +{ + assert_locked(); + /* Called in ISR context */ + + _change_terminal_connected(false); +}; + +void USBCDC::callback_state_change(DeviceState new_state) +{ + assert_locked(); + /* Called in ISR context */ + + if (new_state != Configured) { + _change_terminal_connected(false); + } +} + +void USBCDC::callback_request(const setup_packet_t *setup) +{ + assert_locked(); + /* Called in ISR context */ + + RequestResult result = PassThrough; + uint8_t *data = NULL; + uint32_t size = 0; + + /* Only process class-specific requests */ + if (setup->bmRequestType.Type == CLASS_TYPE) { + switch (setup->bRequest) { + case CDC_GET_LINE_CODING: + result = Send; + data = _cdc_line_coding; + size = 7; + break; + case CDC_SET_LINE_CODING: + result = Receive; + data = _cdc_new_line_coding; + size = 7; + break; + case CDC_SET_CONTROL_LINE_STATE: + if (setup->wValue & CLS_DTR) { + _change_terminal_connected(true); + } else { + _change_terminal_connected(false); + } + result = Success; + break; + default: + result = Failure; + break; + } + } + complete_request(result, data, size); +} + + +void USBCDC::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) +{ + assert_locked(); + /* Called in ISR context */ + + if (aborted) { + complete_request_xfer_done(false); + return; + } + + bool success = false; + + /* Process class-specific requests */ + if (setup->bmRequestType.Type == CLASS_TYPE) { + if ((setup->bRequest == CDC_SET_LINE_CODING) && (setup->wLength == 7)) { + if (memcmp(_cdc_line_coding, _cdc_new_line_coding, 7)) { + memcpy(_cdc_line_coding, _cdc_new_line_coding, 7); + + const uint8_t *buf = _cdc_line_coding; + int baud = buf[0] + (buf[1] << 8) + + (buf[2] << 16) + (buf[3] << 24); + int stop = buf[4]; + int bits = buf[6]; + int parity = buf[5]; + + line_coding_changed(baud, bits, parity, stop); + } + success = true; + } + if (setup->bRequest == CDC_GET_LINE_CODING) { + success = true; + } + } + + complete_request_xfer_done(success); +} + +void USBCDC::callback_set_configuration(uint8_t configuration) +{ + assert_locked(); + /* Called in ISR context */ + + bool ret = false; + if (configuration == DEFAULT_CONFIGURATION) { + // Configure endpoints > 0 + endpoint_add(_int_in, CDC_MAX_PACKET_SIZE, USB_EP_TYPE_INT); + endpoint_add(_bulk_in, CDC_MAX_PACKET_SIZE, USB_EP_TYPE_BULK, &USBCDC::_send_isr); + endpoint_add(_bulk_out, CDC_MAX_PACKET_SIZE, USB_EP_TYPE_BULK, &USBCDC::_receive_isr); + + read_start(_bulk_out, _rx_buf, sizeof(_rx_buffer)); + _rx_in_progress = true; + + ret = true; + } + + complete_set_configuration(ret); +} + +void USBCDC::callback_set_interface(uint16_t interface, uint8_t alternate) +{ + assert_locked(); + complete_set_interface(true); +} + +void USBCDC::_change_terminal_connected(bool connected) +{ + assert_locked(); + + if (connected) { + _connect_wake_all(); + } else { + _send_abort_all(); + _receive_abort_all(); + } + _terminal_connected = connected; +} + +void USBCDC::wait_connected() +{ + lock(); + + AsyncOp wait_op(NULL); + wait_op.start(&_connected_list); + if (_terminal_connected) { + wait_op.complete(); + } + + unlock(); + + wait_op.wait(); +} + +void USBCDC::_connect_wake_all() +{ + AsyncOp *wait_op = _connected_list.head(); + while (wait_op != NULL) { + wait_op->complete(); + wait_op = _connected_list.head(); + } +} + +bool USBCDC::send(uint8_t *buffer, uint32_t size) +{ + lock(); + + if (!_terminal_connected) { + unlock(); + return false; + } + AsyncWrite write_op(buffer, size); + write_op.start(&_tx_list); + _send_next(); + + unlock(); + + write_op.wait(); + return write_op.result; +} + +void USBCDC::_send_next() +{ + assert_locked(); + + uint32_t actual_size; + do { + // Set current TX operation or return if there are none left + AsyncWrite *tx_cur = _tx_list.head(); + if (tx_cur == NULL) { + break; + } + + actual_size = 0; + send_nb(tx_cur->tx_buf, tx_cur->tx_size, &actual_size, false); + tx_cur->tx_size -= actual_size; + tx_cur->tx_buf += actual_size; + if (tx_cur->tx_size == 0) { + tx_cur->result = true; + tx_cur->complete(); + } + } while (actual_size > 0); + + // Start transfer if it hasn't been + _send_isr_start(); +} + +void USBCDC::_send_abort_all() +{ + assert_locked(); + + if (_tx_in_progress) { + endpoint_abort(_bulk_in); + _tx_in_progress = false; + } + _tx_buf = _tx_buffer; + _tx_size = 0; + + AsyncWrite *tx_cur = _tx_list.head(); + while (tx_cur != NULL) { + tx_cur->result = false; + tx_cur->complete(); + tx_cur = _tx_list.head(); + } +} + +void USBCDC::send_nb(uint8_t *buffer, uint32_t size, uint32_t *actual, bool now) +{ + lock(); + + *actual = 0; + if (_terminal_connected && !_tx_in_progress) { + uint32_t free = sizeof(_tx_buffer) - _tx_size; + uint32_t write_size = free > size ? size : free; + if (size > 0) { + memcpy(_tx_buf, buffer, write_size); + } + _tx_size += write_size; + *actual = write_size; + if (now) { + _send_isr_start(); + } + } + + unlock(); +} + + +void USBCDC::_send_isr_start() +{ + assert_locked(); + + if (!_tx_in_progress && _tx_size) { + if (USBDevice::write_start(_bulk_in, _tx_buffer, _tx_size)) { + _tx_in_progress = true; + } + } +} + +/* +* Called by when CDC data is sent +* Warning: Called in ISR +*/ +void USBCDC::_send_isr(usb_ep_t endpoint) +{ + assert_locked(); + + write_finish(endpoint); + _tx_buf = _tx_buffer; + _tx_size = 0; + _tx_in_progress = false; + + _send_next(); + if (!_tx_in_progress) { + data_tx(); + } +} + +bool USBCDC::receive(uint8_t *buffer, uint32_t size, uint32_t *size_read) +{ + lock(); + + if (!_terminal_connected) { + unlock(); + return false; + } + bool read_all = size_read == NULL; + uint32_t size_read_dummy; + uint32_t *size_read_ptr = read_all ? &size_read_dummy : size_read; + *size_read_ptr = 0; + AsyncRead read_op(buffer, size, size_read_ptr, read_all); + read_op.start(&_rx_list); + _receive_next(); + + unlock(); + + read_op.wait(); + return read_op.result; +} + +void USBCDC::_receive_next() +{ + assert_locked(); + + uint32_t actual_size; + do { + // Set current RX operation or return if there are none left + AsyncRead *rx_cur = _rx_list.head(); + if (rx_cur == NULL) { + break; + } + + actual_size = 0; + receive_nb(rx_cur->rx_buf, rx_cur->rx_size, &actual_size); + rx_cur->rx_buf += actual_size; + *rx_cur->rx_actual += actual_size; + rx_cur->rx_size -= actual_size; + if ((!rx_cur->all && *rx_cur->rx_actual > 0) || (rx_cur->rx_size == 0)) { + // Wake thread if request is done + rx_cur->result = true; + rx_cur->complete(); + rx_cur = NULL; + } + } while (actual_size > 0); + + _receive_isr_start(); + +} + +void USBCDC::_receive_abort_all() +{ + assert_locked(); + + if (_rx_in_progress) { + endpoint_abort(_bulk_in); + _rx_in_progress = false; + } + _rx_buf = _rx_buffer; + _rx_size = 0; + + AsyncRead *rx_cur = _rx_list.head(); + while (rx_cur != NULL) { + rx_cur->result = false; + rx_cur->complete(); + rx_cur = _rx_list.head(); + } +} + +void USBCDC::receive_nb(uint8_t *buffer, uint32_t size, uint32_t *size_read) +{ + + *size_read = 0; + if (_terminal_connected && !_rx_in_progress) { + // Copy data over + uint32_t copy_size = _rx_size > size ? size : _rx_size; + memcpy(buffer, _rx_buf, copy_size); + *size_read = copy_size; + _rx_buf += copy_size; + _rx_size -= copy_size; + if (_rx_size == 0) { + _receive_isr_start(); + } + } +} + +void USBCDC::_receive_isr_start() +{ + if ((_rx_size == 0) && !_rx_in_progress) { + // Refill the buffer + read_start(_bulk_out, _rx_buffer, sizeof(_rx_buffer)); + _rx_in_progress = true; + } +} + +/* +* Called by when CDC data is received +* Warning: Called in ISR +*/ +void USBCDC::_receive_isr(usb_ep_t endpoint) +{ + assert_locked(); + + MBED_ASSERT(_rx_size == 0); + _rx_buf = _rx_buffer; + _rx_size = read_finish(_bulk_out); + _rx_in_progress = false; + _receive_next(); + if (!_rx_in_progress) { + data_rx(); + } + +} + +const uint8_t *USBCDC::device_desc() +{ + uint8_t ep0_size = endpoint_max_packet_size(0x00); + uint8_t device_descriptor_temp[] = { + 18, // bLength + 1, // bDescriptorType + 0x10, 0x01, // bcdUSB + 2, // bDeviceClass + 0, // bDeviceSubClass + 0, // bDeviceProtocol + ep0_size, // bMaxPacketSize0 + (uint8_t)(LSB(vendor_id)), (uint8_t)(MSB(vendor_id)), // idVendor + (uint8_t)(LSB(product_id)), (uint8_t)(MSB(product_id)),// idProduct + 0x00, 0x01, // bcdDevice + 1, // iManufacturer + 2, // iProduct + 3, // iSerialNumber + 1 // bNumConfigurations + }; + MBED_ASSERT(sizeof(device_descriptor_temp) == sizeof(device_descriptor)); + memcpy(device_descriptor, device_descriptor_temp, sizeof(device_descriptor)); + return device_descriptor; +} + +const uint8_t *USBCDC::string_iinterface_desc() +{ + static const uint8_t stringIinterfaceDescriptor[] = { + 0x08, + STRING_DESCRIPTOR, + 'C', 0, 'D', 0, 'C', 0, + }; + return stringIinterfaceDescriptor; +} + +const uint8_t *USBCDC::string_iproduct_desc() +{ + static const uint8_t stringIproductDescriptor[] = { + 0x16, + STRING_DESCRIPTOR, + 'C', 0, 'D', 0, 'C', 0, ' ', 0, 'D', 0, 'E', 0, 'V', 0, 'I', 0, 'C', 0, 'E', 0 + }; + return stringIproductDescriptor; +} + + +#define CONFIG1_DESC_SIZE (9+8+9+5+5+4+5+7+9+7+7) + +const uint8_t *USBCDC::configuration_desc() +{ + uint8_t config_descriptor_temp[] = { + // configuration descriptor + 9, // bLength + 2, // bDescriptorType + LSB(CONFIG1_DESC_SIZE), // wTotalLength + MSB(CONFIG1_DESC_SIZE), + 2, // bNumInterfaces + 1, // bConfigurationValue + 0, // iConfiguration + 0x80, // bmAttributes + 50, // bMaxPower + + // IAD to associate the two CDC interfaces + 0x08, // bLength + 0x0b, // bDescriptorType + 0x00, // bFirstInterface + 0x02, // bInterfaceCount + 0x02, // bFunctionClass + 0x02, // bFunctionSubClass + 0, // bFunctionProtocol + 0, // iFunction + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + 9, // bLength + 4, // bDescriptorType + 0, // bInterfaceNumber + 0, // bAlternateSetting + 1, // bNumEndpoints + 0x02, // bInterfaceClass + 0x02, // bInterfaceSubClass + 0x01, // bInterfaceProtocol + 0, // iInterface + + // CDC Header Functional Descriptor, CDC Spec 5.2.3.1, Table 26 + 5, // bFunctionLength + 0x24, // bDescriptorType + 0x00, // bDescriptorSubtype + 0x10, 0x01, // bcdCDC + + // Call Management Functional Descriptor, CDC Spec 5.2.3.2, Table 27 + 5, // bFunctionLength + 0x24, // bDescriptorType + 0x01, // bDescriptorSubtype + 0x03, // bmCapabilities + 1, // bDataInterface + + // Abstract Control Management Functional Descriptor, CDC Spec 5.2.3.3, Table 28 + 4, // bFunctionLength + 0x24, // bDescriptorType + 0x02, // bDescriptorSubtype + 0x06, // bmCapabilities + + // Union Functional Descriptor, CDC Spec 5.2.3.8, Table 33 + 5, // bFunctionLength + 0x24, // bDescriptorType + 0x06, // bDescriptorSubtype + 0, // bMasterInterface + 1, // bSlaveInterface0 + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _int_in, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=intr) + LSB(CDC_MAX_PACKET_SIZE), // wMaxPacketSize (LSB) + MSB(CDC_MAX_PACKET_SIZE), // wMaxPacketSize (MSB) + 16, // bInterval + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + 9, // bLength + 4, // bDescriptorType + 1, // bInterfaceNumber + 0, // bAlternateSetting + 2, // bNumEndpoints + 0x0A, // bInterfaceClass + 0x00, // bInterfaceSubClass + 0x00, // bInterfaceProtocol + 0, // iInterface + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _bulk_in, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(CDC_MAX_PACKET_SIZE), // wMaxPacketSize (LSB) + MSB(CDC_MAX_PACKET_SIZE), // wMaxPacketSize (MSB) + 0, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _bulk_out, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(CDC_MAX_PACKET_SIZE), // wMaxPacketSize (LSB) + MSB(CDC_MAX_PACKET_SIZE), // wMaxPacketSize (MSB) + 0 // bInterval + }; + + MBED_ASSERT(sizeof(config_descriptor_temp) == sizeof(_config_descriptor)); + memcpy(_config_descriptor, config_descriptor_temp, sizeof(_config_descriptor)); + return _config_descriptor; +} diff --git a/usb/device/USBSerial/USBCDC.h b/usb/device/USBSerial/USBCDC.h new file mode 100644 index 00000000000..1c3c6dc3816 --- /dev/null +++ b/usb/device/USBSerial/USBCDC.h @@ -0,0 +1,203 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBCDC_H +#define USBCDC_H + +/* These headers are included for child class. */ +#include "USBDescriptor.h" +#include "USBDevice_Types.h" + +#include "USBDevice.h" +#include "LinkedList.h" + +class AsyncOp; + +class USBCDC: public USBDevice { +public: + + /* + * Constructor + * + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your preoduct_release + * @param connect_blocking define if the connection must be blocked if USB not plugged in + */ + USBCDC(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); + + /* + * Constructor + * + * @param phy USB phy to use + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your preoduct_release + * @param connect_blocking define if the connection must be blocked if USB not plugged in + */ + USBCDC(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); + + /** + * Block until the terminal is connected + */ + void wait_connected(); + + /* + * Send a buffer + * + * This function blocks until the full contents have been sent. + * + * @param buffer buffer to be sent + * @param size length of the buffer + * @returns true if successful false if interrupted due to a state change + */ + bool send(uint8_t *buffer, uint32_t size); + + /** + * Send what there is room for + * + * @param buffer data to send + * @param size maximum number of bytes to send + * @param actual a pointer to where to store the number of bytes sent + * @param now true to start data transmission, false to wait + */ + void send_nb(uint8_t *buffer, uint32_t size, uint32_t *actual, bool now = true); + + /* + * Read a buffer from a certain endpoint. Warning: blocking + * + * Blocks until at least one byte of data has been read (actual != NULL) or + * until the full size has been read (actual == NULL). + * + * @param buffer buffer where will be stored bytes + * @param size the maximum number of bytes to read + * @param actual A pointer to where to store the number of bytes actually read + * or NULL to read the full size + * @returns true if successful false if interrupted due to a state change + */ + bool receive(uint8_t *buffer, uint32_t size, uint32_t *actual=NULL); + + /** + * Read from the receive buffer + * + * @param buffer buffer to fill with data + * @param size maximum number of bytes read + * @param actual a pointer to where to store the number of bytes actually received + */ + void receive_nb(uint8_t *buffer, uint32_t size, uint32_t *actual); + +protected: + /* + * Get device descriptor. Warning: this method has to store the length of the report descriptor in reportLength. + * + * @returns pointer to the device descriptor + */ + virtual const uint8_t *device_desc(); + + /* + * Get string product descriptor + * + * @returns pointer to the string product descriptor + */ + virtual const uint8_t *string_iproduct_desc(); + + /* + * Get string interface descriptor + * + * @returns pointer to the string interface descriptor + */ + virtual const uint8_t *string_iinterface_desc(); + + /* + * Get configuration descriptor + * + * @returns pointer to the configuration descriptor + */ + virtual const uint8_t *configuration_desc(); + + /* + * Called by USBCallback_requestCompleted when CDC line coding is changed + * Warning: Called in ISR + * + * @param baud The baud rate + * @param bits The number of bits in a word (5-8) + * @param parity The parity + * @param stop The number of stop bits (1 or 2) + */ + virtual void line_coding_changed(int baud, int bits, int parity, int stop) {}; + + /* + * Called when there is data that can be read + */ + virtual void data_rx() {} + + /* + * Called when there is space in the TX buffer + */ + virtual void data_tx() {} + +protected: + + class AsyncWrite; + class AsyncRead; + + virtual void callback_reset(); + virtual void callback_state_change(DeviceState new_state); + virtual void callback_request(const setup_packet_t *setup); + virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); + virtual void callback_set_configuration(uint8_t configuration); + virtual void callback_set_interface(uint16_t interface, uint8_t alternate); + + void _init(bool connect_blocking); + + void _change_terminal_connected(bool connected); + void _connect_wake_all(); + + void _send_next(); + void _send_abort_all(); + void _send_isr_start(); + void _send_isr(usb_ep_t endpoint); + + void _receive_next(); + void _receive_abort_all(); + void _receive_isr_start(); + void _receive_isr(usb_ep_t endpoint); + + usb_ep_t _bulk_in; + usb_ep_t _bulk_out; + usb_ep_t _int_in; + + uint8_t _cdc_line_coding[7]; + uint8_t _cdc_new_line_coding[7]; + uint8_t _config_descriptor[75]; + + LinkedList _connected_list; + bool _terminal_connected; + + LinkedList _tx_list; + bool _tx_in_progress; + uint8_t _tx_buffer[64]; + uint8_t *_tx_buf; + uint32_t _tx_size; + + LinkedList _rx_list; + bool _rx_in_progress; + uint8_t _rx_buffer[64]; + uint8_t *_rx_buf; + uint32_t _rx_size; +}; + +#endif diff --git a/usb/device/USBSerial/USBSerial.cpp b/usb/device/USBSerial/USBSerial.cpp new file mode 100644 index 00000000000..376c8b8de24 --- /dev/null +++ b/usb/device/USBSerial/USBSerial.cpp @@ -0,0 +1,61 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBSerial.h" + +int USBSerial::_putc(int c) +{ + return send((uint8_t *)&c, 1) ? 1 : 0; +} + +int USBSerial::_getc() +{ + uint8_t c = 0; + if (receive(&c, sizeof(c))) { + return c; + } else { + return -1; + } +} + +void USBSerial::data_rx() +{ + assert_locked(); + + //call a potential handler + if (rx) { + rx.call(); + } +} + +uint8_t USBSerial::available() +{ + USBCDC::lock(); + + uint8_t size = 0; + if (!_rx_in_progress) { + size = _rx_size > 0xFF ? 0xFF : _rx_size; + } + + USBCDC::unlock(); + return size; +} + +bool USBSerial::connected() +{ + return _terminal_connected; +} diff --git a/usb/device/USBSerial/USBSerial.h b/usb/device/USBSerial/USBSerial.h new file mode 100644 index 00000000000..b3344b4a6e1 --- /dev/null +++ b/usb/device/USBSerial/USBSerial.h @@ -0,0 +1,205 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBSERIAL_H +#define USBSERIAL_H + +#include "USBCDC.h" +#include "Stream.h" +#include "Callback.h" + +/** +* USBSerial example +* +* @code +* #include "mbed.h" +* #include "USBSerial.h" +* +* //Virtual serial port over USB +* USBSerial serial; +* +* int main(void) { +* +* while(1) +* { +* serial.printf("I am a virtual serial port\n"); +* wait(1); +* } +* } +* @endcode +*/ +class USBSerial: public USBCDC, public Stream { +public: + + /** + * Constructor + * + * @param vendor_id Your vendor_id (default: 0x1f00) + * @param product_id Your product_id (default: 0x2012) + * @param product_release Your preoduct_release (default: 0x0001) + * @param connect_blocking define if the connection must be blocked if USB not plugged in + * + */ + USBSerial(uint16_t vendor_id = 0x1f00, uint16_t product_id = 0x2012, uint16_t product_release = 0x0001, bool connect_blocking = true): USBCDC(vendor_id, product_id, product_release, connect_blocking) + { + _settings_changed_callback = 0; + }; + + /** + * Constructor + * + * @param phy USB phy to use + * @param vendor_id Your vendor_id (default: 0x1f00) + * @param product_id Your product_id (default: 0x2012) + * @param product_release Your preoduct_release (default: 0x0001) + * @param connect_blocking define if the connection must be blocked if USB not plugged in + * + */ + USBSerial(USBPhy *phy, uint16_t vendor_id = 0x1f00, uint16_t product_id = 0x2012, uint16_t product_release = 0x0001, bool connect_blocking = true): USBCDC(phy, vendor_id, product_id, product_release, connect_blocking) + { + _settings_changed_callback = 0; + }; + + /** + * Send a character. You can use puts, printf. + * + * @param c character to be sent + * @returns true if there is no error, false otherwise + */ + virtual int _putc(int c); + + /** + * Read a character: blocking + * + * @returns character read + */ + virtual int _getc(); + + /** + * Check the number of bytes available. + * + * @returns the number of bytes available + */ + uint8_t available(); + + /** + * Check if the terminal is connected. + * + * @returns connection status + */ + bool connected(); + + /** Determine if there is a character available to read + * + * @returns + * 1 if there is a character available to read, + * 0 otherwise + */ + int readable() + { + return available() ? 1 : 0; + } + + /** Determine if there is space available to write a character + * + * @returns + * 1 if there is space to write a character, + * 0 otherwise + */ + int writeable() + { + return 1; // always return 1, for write operation is blocking + } + + /** + * Attach a member function to call when a packet is received. + * + * @param tptr pointer to the object to call the member function on + * @param mptr pointer to the member function to be called + */ + template + void attach(T *tptr, void (T::*mptr)(void)) + { + USBCDC::lock(); + + if ((mptr != NULL) && (tptr != NULL)) { + rx = Callback(mptr, tptr); + } + + USBCDC::unlock(); + } + + /** + * Attach a callback called when a packet is received + * + * @param fptr function pointer + */ + void attach(void (*fptr)(void)) + { + USBCDC::lock(); + + if (fptr != NULL) { + rx = Callback(fptr); + } + + USBCDC::unlock(); + } + + /** + * Attach a Callback called when a packet is received + * + * @param cb Callback to attach + */ + void attach(Callback &cb) + { + USBCDC::lock(); + + rx = cb; + + USBCDC::unlock(); + } + + /** + * Attach a callback to call when serial's settings are changed. + * + * @param fptr function pointer + */ + void attach(void (*fptr)(int baud, int bits, int parity, int stop)) + { + USBCDC::lock(); + + _settings_changed_callback = fptr; + + USBCDC::unlock(); + } + +protected: + virtual void data_rx(); + virtual void line_coding_changed(int baud, int bits, int parity, int stop) + { + assert_locked(); + + if (_settings_changed_callback) { + _settings_changed_callback(baud, bits, parity, stop); + } + } + +private: + Callback rx; + void (*_settings_changed_callback)(int baud, int bits, int parity, int stop); +}; + +#endif From 69e30a933b60effadd0cf9c2497241e4f81218d5 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 20 Mar 2018 10:29:27 -0500 Subject: [PATCH 297/488] Remove the USB directory from mbed 2 travis Don't include the USB directory when testing mbed 2 on travis. --- .travis.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.travis.yml b/.travis.yml index e9a7df73f7e..db54f8db6a3 100644 --- a/.travis.yml +++ b/.travis.yml @@ -192,7 +192,7 @@ matrix: - python tools/make.py -t GCC_ARM -m K64F --source=. --build=BUILD/K64F/GCC_ARM -j0 # Check that example compiles without rtos - sed -n '/``` cpp/,/```/{/```$/Q;/```/d;p;}' $EVENTS/README.md > main.cpp - - rm -r rtos features/cellular features/netsocket features/nanostack features/lwipstack features/frameworks/greentea-client features/frameworks/utest features/frameworks/unity components BUILD + - rm -r rtos usb features/cellular features/netsocket features/nanostack features/lwipstack features/frameworks/greentea-client features/frameworks/utest features/frameworks/unity components BUILD - python tools/make.py -t GCC_ARM -m DISCO_F401VC --source=. --build=BUILD/DISCO_F401VC/GCC_ARM -j0 # Run local equeue tests - make -C $EVENTS/equeue test From ad7ab8fb537c80a00b538dde382b6ef3d7639486 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 19 Mar 2018 17:07:42 -0500 Subject: [PATCH 298/488] Fix Kinetis endpoint initialization Fully setup endpoint before enabling it in endpoint_add. This prevents undefined behavior due to previous configuration. --- targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp index 3c98280a2c2..55599a922e7 100644 --- a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp +++ b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp @@ -366,15 +366,14 @@ bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_ // IN endpt -> device to host (TX) if (DESC_EP_IN(endpoint)) { - USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) - USB_ENDPT_EPTXEN_MASK; // en TX (IN) tran bdt[EP_BDT_IDX(log_endpoint, TX, ODD )].address = (uint32_t) buf; + bdt[EP_BDT_IDX(log_endpoint, TX, ODD )].info = 0; bdt[EP_BDT_IDX(log_endpoint, TX, EVEN)].address = 0; + USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) + USB_ENDPT_EPTXEN_MASK; // en TX (IN) tran } // OUT endpt -> host to device (RX) else { - USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) - USB_ENDPT_EPRXEN_MASK; // en RX (OUT) tran. bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].byte_count = max_packet; bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].address = (uint32_t) buf; bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info = BD_DTS_MASK; @@ -383,6 +382,8 @@ bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_ // Prepare for setup packet bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info |= BD_OWN_MASK; } + USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint) + USB_ENDPT_EPRXEN_MASK; // en RX (OUT) tran. } // First transfer will be a DATA0 packet From ec2259e6a67bef8a8cf94b800d0a222f81076ba1 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 20 Mar 2018 14:46:55 -0500 Subject: [PATCH 299/488] Correct Kinetis 256 byte ctrl transfers Correctly handle control transfers which are a multiple of 256 bytes by checking for a non-zero value in the upper byte of size. --- targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp index 55599a922e7..60ad7d7f1f2 100644 --- a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp +++ b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp @@ -483,7 +483,7 @@ bool USBPhyHw::endpoint_read_result_core(usb_ep_t endpoint, uint8_t *data, uint3 if (setup) { // Record the setup type - if (data[6] == 0) { + if ((data[6] == 0) && (data[7] == 0)) { ctrl_xfer = CTRL_XFER_NONE; } else { uint8_t in_xfer = (data[0] >> 7) & 1; From 47b9634d581e3bc0db8cfeab81ccd683af4184a0 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 20 Mar 2018 14:48:16 -0500 Subject: [PATCH 300/488] Limit USB control transfer size Limit the size of control reads to the max packet size of endpoint zero. This fixes the handling of large transfers. --- usb/device/USBDevice/USBDevice.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index da3617cedd4..611f91b1e1a 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -49,6 +49,8 @@ #endif #define MAX_PACKET_SIZE_EP0 64 +#define USB_MIN(a, b) ((a) > (b) ? (b) : (a)) + bool USBDevice::_request_get_descriptor() { @@ -224,7 +226,7 @@ bool USBDevice::_control_out() complete_request_xfer_done(true); } } else { - _phy->ep0_read(_transfer.ptr, _transfer.remaining); + _phy->ep0_read(_transfer.ptr, USB_MIN(_transfer.remaining, _max_packet_size_ep0)); } return true; @@ -800,7 +802,7 @@ void USBDevice::_control_setup_continue() } else { /* OUT stage */ _transfer.stage = DataOut; - _phy->ep0_read(_transfer.ptr, _transfer.remaining); + _phy->ep0_read(_transfer.ptr, USB_MIN(_transfer.remaining, _max_packet_size_ep0)); } } else { /* Status stage */ From ca40505581ec9f068bada113253ed6cad98c06d6 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 20 Mar 2018 16:39:12 -0500 Subject: [PATCH 301/488] Disable endpoints when disconnecting on Kinetis Even thought the USB phy is disabled during disconnect, endpoints still nack packets sent. This patch disables all endpoints so after disconnect no USB traffic will be sent. This allows brief disconnects of ~200us (or more) to be reliably detected by the host PC. --- targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp index 60ad7d7f1f2..84c50d94b6c 100644 --- a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp +++ b/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp @@ -195,6 +195,10 @@ void USBPhyHw::connect() void USBPhyHw::disconnect() { + // disable all endpoints to prevent them from nacking when disconnected + for(int i = 0; i < 16; i++) { + USB0->ENDPOINT[i].ENDPT = 0x00; + } // disable USB USB0->CTL &= ~USB_CTL_USBENSOFEN_MASK; // Pull up disable From e3d3de60fd5bae6a8bf6a6a7d26fe28635d1fe09 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 20 Mar 2018 20:49:59 -0500 Subject: [PATCH 302/488] Improve LPC1768 USB stability Make the following changes to improve stability: -When disconnecting set address to disabled to prevent nacks -Clear EP_SLOW one and only once for every interrupt where it is set_address -Disable and clear control endpoint interrupts when disconnecting --- .../TARGET_LPC176X/usb/USBHAL_LPC17.cpp | 31 +++++++++++++------ 1 file changed, 22 insertions(+), 9 deletions(-) diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp index ef3a66ea831..d962235961a 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp +++ b/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp @@ -161,11 +161,11 @@ static uint8_t SIEgetDeviceStatus(void) return SIEReadData(SIE_CMD_GET_DEVICE_STATUS); } -void SIEsetAddress(uint8_t address) +void SIEsetAddress(uint8_t address, bool enable=true) { // Write SIE device address register SIECommand(SIE_CMD_SET_ADDRESS); - SIEWriteData((address & 0x7f) | SIE_DSA_DEV_EN); + SIEWriteData((address & 0x7f) | (enable ? SIE_DSA_DEV_EN : 0)); } static uint8_t SIEselectEndpoint(uint8_t endpoint) @@ -402,8 +402,8 @@ void USBPhyHw::init(USBPhyEvents *events) // Enable interrupts for device events and EP0 LPC_USB->USBDevIntEn = EP_SLOW | DEV_STAT | FRAME; - enableEndpointEvent(EP0IN); - enableEndpointEvent(EP0OUT); + + NVIC_EnableIRQ(USB_IRQn); } void USBPhyHw::deinit() @@ -422,14 +422,28 @@ bool USBPhyHw::powered() void USBPhyHw::connect(void) { - NVIC_EnableIRQ(USB_IRQn); + enableEndpointEvent(EP0IN); + enableEndpointEvent(EP0OUT); + // Connect USB device SIEconnect(); } void USBPhyHw::disconnect(void) { - NVIC_DisableIRQ(USB_IRQn); + disableEndpointEvent(EP0IN); + disableEndpointEvent(EP0OUT); + + if (LPC_USB->USBEpIntSt & EP(EP0IN)) { + selectEndpointClearInterrupt(EP0IN); + } + if (LPC_USB->USBEpIntSt & EP(EP0OUT)) { + selectEndpointClearInterrupt(EP0OUT); + } + + // Turn off USB nacking + SIEsetAddress(0, false); + // Disconnect USB device SIEdisconnect(); } @@ -696,7 +710,6 @@ void USBPhyHw::process(void) // case of OUT as SETUP clobbers the OUT data). if (LPC_USB->USBEpIntSt & EP(EP0IN)) { selectEndpointClearInterrupt(EP0IN); - LPC_USB->USBDevIntClr = EP_SLOW; events->ep0_in(); } @@ -708,7 +721,6 @@ void USBPhyHw::process(void) } else { events->ep0_out(); } - LPC_USB->USBDevIntClr = EP_SLOW; } //TODO - should probably process in the reverse order @@ -717,7 +729,6 @@ void USBPhyHw::process(void) if (LPC_USB->USBEpIntSt & EP(endpoint)) { selectEndpointClearInterrupt(endpoint); epComplete |= EP(endpoint); - LPC_USB->USBDevIntClr = EP_SLOW; if (IN_EP(endpoint)) { events->in(endpoint); } else { @@ -726,6 +737,8 @@ void USBPhyHw::process(void) } } } + + LPC_USB->USBDevIntClr = EP_SLOW; } NVIC_ClearPendingIRQ(USB_IRQn); From 437e2b957db65bb350cc0facff45d7418466bba5 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Tue, 13 Mar 2018 16:18:20 +0100 Subject: [PATCH 303/488] USB generic tests --- TESTS/host_tests/pyusb_basic.py | 781 ++++++++++++++++++++++++++- TESTS/usb_device/basic/USBTester.cpp | 61 ++- TESTS/usb_device/basic/USBTester.h | 22 + TESTS/usb_device/basic/main.cpp | 250 ++++++++- 4 files changed, 1086 insertions(+), 28 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 24c7e951455..ae6c164a327 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -20,6 +20,7 @@ from argparse import ArgumentParser import time import sys +import inspect from threading import Thread import usb.core @@ -28,6 +29,11 @@ from usb.util import CTRL_TYPE_STANDARD, CTRL_TYPE_CLASS, CTRL_TYPE_VENDOR from usb.util import (CTRL_RECIPIENT_DEVICE, CTRL_RECIPIENT_INTERFACE, CTRL_RECIPIENT_ENDPOINT, CTRL_RECIPIENT_OTHER) +from usb.util import (DESC_TYPE_DEVICE, DESC_TYPE_CONFIG, DESC_TYPE_STRING, + DESC_TYPE_INTERFACE, DESC_TYPE_ENDPOINT) + +import struct +from collections import namedtuple def get_interface(dev, interface, alternate=0): intf = None @@ -45,22 +51,218 @@ def get_interface(dev, interface, alternate=0): VENDOR_TEST_CTRL_NONE_DELAY = 6 VENDOR_TEST_CTRL_IN_STATUS_DELAY = 7 VENDOR_TEST_CTRL_OUT_STATUS_DELAY = 8 +VENDOR_TEST_CTRL_IN_SIZES = 9 +VENDOR_TEST_CTRL_OUT_SIZES = 10 VENDOR_TEST_UNSUPPORTED_REQUEST = 32 +REQUEST_GET_STATUS = 0 # done +REQUEST_CLEAR_FEATURE = 1 # done +REQUEST_SET_FEATURE = 3 # done +REQUEST_SET_ADDRESS = 5 # ??? +REQUEST_GET_DESCRIPTOR = 6 +REQUEST_SET_DESCRIPTOR = 7 # done +REQUEST_GET_CONFIGURATION = 8 # done +REQUEST_SET_CONFIGURATION = 9 # done +REQUEST_GET_INTERFACE = 10 # done +REQUEST_SET_INTERFACE = 11 # done +REQUEST_SYNCH_FRAME = 12 # almost done + +FEATURE_ENDPOINT_HALT = 0 +FEATURE_DEVICE_REMOTE_WAKEUP = 1 + + + +DEVICE_QUALIFIER_DESC_SIZE = 10 + +DESC_TYPE_DEVICE_QUALIFIER = 0x06 + + +DEVICE_DESC_SIZE = 18 +device_descriptor_parser = struct.Struct('BBHBBBBHHHBBBB') +device_descriptor_keys = ['bLength', 'bDescriptorType', 'bcdUSB', 'bDeviceClass', + 'bDeviceSubClass', 'bDeviceProtocol', 'bMaxPacketSize0', + 'idVendor', 'idProduct', 'bcdDevice', 'iManufacturer', + 'iProduct', 'iSerialNumber', 'bNumConfigurations'] + +CONFIGURATION_DESC_SIZE = 9 +configuration_descriptor_parser = struct.Struct('BBHBBBBB') +configuration_descriptor_keys = ['bLength', 'bDescriptorType', 'wTotalLength', + 'bNumInterfaces', 'bConfigurationValue', + 'iConfiguration', 'bmAttributes', 'bMaxPower'] + +INTERFACE_DESC_SIZE = 9 +interface_descriptor_parser = struct.Struct('BBBBBBBBB') +interface_descriptor_keys = ['bLength', 'bDescriptorType', 'bInterfaceNumber', + 'bAlternateSetting', 'bNumEndpoints', + 'bInterfaceClass', 'bInterfaceSubClass', + 'bInterfaceProtocol', 'iInterface'] + +ENDPOINT_DESC_SIZE = 7 +interface_descriptor_parser = struct.Struct('BBBBBHB') +interface_descriptor_keys = ['bLength', 'bDescriptorType', 'bEndpointAddress', + 'bmAttributes', 'wMaxPacketSize', 'bInterval'] + class PyusbBasicTest(BaseHostTest): - """ - """ - def _callback_usb_enumeration_done(self, key, value, timestamp): - print("Received key %s = %s" % (key, value)) - self.log("Received key %s = %s" % (key, value)) - test_device(value, self.log) - passed = True - results = "pass" if passed else "fail" - self.send_kv(results, "0") + + def _callback_control_basic_test(self, key, value, timestamp): + serial_number, vendor_id, product_id = value.split(' ') + self.log("Received serial %s" % (serial_number)) + self.log("Received vendor_id %s" % (vendor_id)) + self.log("Received product_id %s" % (product_id)) + + dev = self.find_device(serial_number) + if(dev == None): + return + + try: + control_basic_test(dev, vendor_id, product_id, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + + def _callback_control_stall_test(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + control_stall_test(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + + def _callback_control_sizes_test(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + control_sizes_test(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + + def _callback_control_stress_test(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + control_stress_test(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + + def _callback_device_reset_test(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + self.device_reset_test.send(dev) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + def _callback_device_soft_reconnection_test(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + self.device_soft_reconnection_test.send(dev) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + + def _callback_device_suspend_resume_test(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + self.device_suspend_resume_test.send(dev) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + + def _callback_repeated_construction_destruction_test(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + self.repeated_construction_destruction_test.send(dev) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + + def find_device(self, serial_number): + # to make it more reliable, 20 retries in 2[s] + for _ in range(20): + dev = usb.core.find(custom_match=TestMatch(serial_number)) + if dev is not None: + break + time.sleep(0.1) + + if dev is None: + self.log("Device not found") + self.send_kv("failed", "0") + return dev + + + def report_success(self): + self.send_kv("pass", "0") + + def report_error(self, msg): + self.log('TEST FAILED: {}'.format(msg)) + self.send_kv("failed", "0") def setup(self): self.__result = False - self.register_callback('usb_enumeration_done', self._callback_usb_enumeration_done) + + self.device_reset_test = device_reset_test(log=print) + self.device_reset_test.send(None) + + self.device_soft_reconnection_test = device_soft_reconnection_test(log=print) + self.device_soft_reconnection_test.send(None) + + self.device_suspend_resume_test = device_suspend_resume_test(log=print) + self.device_suspend_resume_test.send(None) + + self.repeated_construction_destruction_test = repeated_construction_destruction_test(log=print) + self.repeated_construction_destruction_test.send(None) + + self.register_callback('control_basic_test', self._callback_control_basic_test) + self.register_callback('control_stall_test', self._callback_control_stall_test) + self.register_callback('control_sizes_test', self._callback_control_sizes_test) + self.register_callback('control_stress_test', self._callback_control_stress_test) + self.register_callback('device_reset_test', self._callback_device_reset_test) + self.register_callback('device_soft_reconnection_test', self._callback_device_soft_reconnection_test) + self.register_callback('device_suspend_resume_test', self._callback_device_suspend_resume_test) + self.register_callback('repeated_construction_destruction_test', self._callback_repeated_construction_destruction_test) + def result(self): return self.__result @@ -81,6 +283,20 @@ def __call__(self, dev): return False +def lineno(): + """Returns the current line number in our program.""" + return inspect.currentframe().f_back.f_lineno + +def raise_if_different(expected, actual, line, text=''): + """Raise a RuntimeError if actual is different than expected.""" + if expected != actual: + raise RuntimeError('[{}]:{}, {} Got {!r}, expected {!r}'.format(__file__, line, text, actual, expected)) + +def raise_unconditionally(line, text=''): + """Raise a RuntimeError unconditionally.""" + raise RuntimeError('[{}]:{}, {}'.format(__file__, line, text)) + + def test_device(serial_number, log=print): dev = usb.core.find(custom_match=TestMatch(serial_number)) if dev is None: @@ -123,7 +339,6 @@ def test_device(serial_number, log=print): #-report throughput for in/out of control, bulk, interrupt and iso transfers #-verify that construction/destruction repeatedly works gracefully - intf = get_interface(dev, 0, 0) # Find endpoints @@ -205,7 +420,6 @@ def test_device(serial_number, log=print): t.join() - return True def write_data(pipe): print("Write data running") @@ -215,8 +429,417 @@ def write_data(pipe): count += 1 print("Count %s" % count) time.sleep(0.5) - - + + +def control_basic_test(dev, vendor_id, product_id, log): + get_status_test(dev, log) + set_clear_feature_test(dev, log) + get_set_interface_test(dev, log) + get_set_configuration_test(dev, log) + get_descriptor_test(dev, vendor_id, product_id, log) + set_descriptor_test(dev, log) + #synch_frame_test(dev, log) wait for isochronous endpoint + + +def get_status_test(dev, log): + # Control IN GET_STATUS on DEVICE + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = REQUEST_GET_STATUS + value = 0 # Always 0 for this request + index = 0 # 0 if recipient is device + length = 2 # Always 2 for this request (size of return data) + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] | (ret[1] << 8) + # Status bits + # ret == 0b01 (D0)Self Powered + # ret == 0b10 (D1)Remote Wakeup + # (D2 - D15 reserved) Must be set to 0 + if(ret < 0 or ret > 3): + raise_unconditionally(lineno(), "GET_STATUS on DEVICE failed") + + # Control IN GET_STATUS on INTERFACE + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_GET_STATUS + value = 0 # Always 0 for this request + index = 0 # interface index + length = 2 # Always 2 for this request (size of return data) + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] | (ret[1] << 8) + # Status bits + # ret == 0b0 + # (D0 - D15 reserved) Must be set to 0 + if(ret != 0): + raise_unconditionally(lineno(), "GET_STATUS on INTERFACE failed") + + # Control IN GET_STATUS on ENDPOINT 0 + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_GET_STATUS + value = 0 # Always 0 for this request + index = 0 # endpoint index + length = 2 # Always 2 for this request (size of return data) + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] | (ret[1] << 8) + # Status bits + # ret == 0b1 (D0)endpoint Halt + # (D1 - D15 reserved) Must be set to 0 + # endpoint 0 can't be halted ret == 0 + if(ret != 0): + raise_unconditionally(lineno(), "GET_STATUS on ENDPOINT failed") + + +def set_clear_feature_test(dev, log): + # The state of the Direction bit is ignored if the wLength field is zero, + # signifying there is no Data stage - see USB spec 9.3.1 + # according to this SET/CLEAR_FEATURE ignores direction bits and should + # work for both CTRL_OUT and CTRL_IN + + # Control OUT SET_FEATURE on endpoint - halt + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_SET_FEATURE + value = FEATURE_ENDPOINT_HALT + index = 1 # Endpoint index + length = 0 # Always 0 for this request + try: + dev.ctrl_transfer(request_type, request, value, index, length) + except usb.core.USBError: + raise_unconditionally(lineno(), "endpoint halt failed") + + # check if endpoint was halted + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_GET_STATUS + value = 0 # Always 0 for this request + index = 1 # Endpoint index + length = 2 # Always 2 for this request (size of return data) + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] | (ret[1] << 8) + if(ret != 1): + raise_unconditionally(lineno(), "endpoint was not halted") + + # Control OUT CLEAR_FEATURE on endpoint - unhalt + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_CLEAR_FEATURE + value = FEATURE_ENDPOINT_HALT + index = 1 # Endpoint index + length = 0 # Always 0 for this request + try: + dev.ctrl_transfer(request_type, request, value, index, length) + except usb.core.USBError: + raise_unconditionally(lineno(), "endpoint was not unhalted") + + # check if endpoint was unhalted + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_GET_STATUS + value = 0 # Always 0 for this request + index = 1 # Endpoint index + length = 2 # Always 2 for this request (size of return data) + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] + if(ret != 0): + raise_unconditionally(lineno(), "endpoint unhalthalt failed") + + # retest for CTRL_IN + # Control IN SET_FEATURE on endpoint - halt + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_SET_FEATURE + value = FEATURE_ENDPOINT_HALT + index = 1 # Endpoint index + length = 0 # Always 0 for this request + try: + dev.ctrl_transfer(request_type, request, value, index, length) + except usb.core.USBError: + raise_unconditionally(lineno(), "endpoint halt failed") + + # check if endpoint was halted + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_GET_STATUS + value = 0 # Always 0 for this request + index = 1 # Endpoint index + length = 2 # Always 2 for this request (size of return data) + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] | (ret[1] << 8) + if(ret != 1): + raise_unconditionally(lineno(), "endpoint was not halted") + + # Control IN CLEAR_FEATURE on endpoint - unhalt + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_CLEAR_FEATURE + value = FEATURE_ENDPOINT_HALT + index = 1 # Endpoint index + length = 0 # Always 0 for this request + try: + dev.ctrl_transfer(request_type, request, value, index, length) + except usb.core.USBError: + raise_unconditionally(lineno(), "endpoint was not unhalted") + + # check if endpoint was unhalted + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_GET_STATUS + value = 0 # Always 0 for this request + index = 1 # Endpoint index + length = 2 # Always 2 for this request (size of return data) + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] + if(ret != 0): + raise_unconditionally(lineno(), "endpoint unhalthalt failed") + + +def get_set_interface_test(dev, log): + # Control IN GET_INTERFACE + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_GET_INTERFACE + value = 0 # Always 0 for this request + index = 0 # Interface index + length = 1 # Always 1 for this request (size of return data) + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + print("GET_INTERFACE ret: %d" % (ret[0])) + if(ret[0] != 0): + raise_unconditionally(lineno(), "Wrong interface was set expected: 0") + except usb.core.USBError: + raise_unconditionally(lineno(), "GET_INTERFACE failed") + # test control data transfer + control_data_test(dev, [64, 256], log) + + # Control IN SET_INTERFACE + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_SET_INTERFACE + value = 1 # Alternative interface setting index + index = 0 # Interface index + length = 0 # Always 0 for this request + try: + dev.ctrl_transfer(request_type, request, value, index, length) + except usb.core.USBError: + raise_unconditionally(lineno(), "SET_INTERFACE failed") + # test control data transfer after alternative interface set + control_data_test(dev, [64, 256], log) + + # Control IN GET_INTERFACE - check if alternative interface setting was set + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_GET_INTERFACE + value = 0 # Always 0 for this request + index = 0 # Interface index + length = 1 # Always 1 for this request (size of return data) + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + if(ret[0] != 1): + raise_unconditionally(lineno(), "Alternative interface setting was not set properly") + except usb.core.USBError: + raise_unconditionally(lineno(), "GET_INTERFACE failed") + + # Control IN SET_INTERFACE restore interfejs settings + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_SET_INTERFACE + value = 0 # Interface setting index + index = 0 # Interface index + length = 0 # Always 0 for this request + try: + dev.ctrl_transfer(request_type, request, value, index, length) + except usb.core.USBError: + raise_unconditionally(lineno(), "SET_INTERFACE request failed") + # test control data transfer after interface restoring + control_data_test(dev, [64, 256], log) + + # Control IN GET_INTERFACE - check if alternative interface setting was restored properly + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_GET_INTERFACE + value = 0 # Always 0 for this request + index = 0 # Interface index + length = 1 # Always 1 for this request (size of return data) + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + if(ret[0] != 0): + raise_unconditionally(lineno(), "Alternative interface setting was not restored properly") + except usb.core.USBError: + raise_unconditionally(lineno(), "GET_INTERFACE failed") + + +def get_set_configuration_test(dev, log): + # Set Configuration can also be used, with wValue set to 0, to deconfigure the device + # Control IN GET_CONFIGURATION + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_GET_CONFIGURATION + value = 0 # Always 0 for this request + index = 0 # Always 0 for this request + length = 1 # Always 1 for this request (size of return data) + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + if(ret[0] != 1): + raise_unconditionally(lineno(), "Expected first configuration set") + except usb.core.USBError: + raise_unconditionally(lineno(), "GET_CONFIGURATION failed") + # test control data transfer + control_data_test(dev, [64, 256], log) + + # Control OUT SET_CONFIGURATION 0 - deconfigure the device + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_SET_CONFIGURATION + value = 0 # Configuration Value (0 - deconfigure the device) + index = 0 # Always 0 for this request + length = 0 # Always 0 for this request + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + except usb.core.USBError: + raise_unconditionally(lineno(), "SET_CONFIGURATION failed") + + # Control IN GET_CONFIGURATION - check if deconfigured + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_GET_CONFIGURATION + value = 0 # Always 0 for this request + index = 0 # Always 0 for this request + length = 1 # Always 1 for this request (size of return data) + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + if(ret[0] != 0): + raise_unconditionally(lineno(), "Expected to be deconfigured") + except usb.core.USBError: + raise_unconditionally(lineno(), "GET_CONFIGURATION failed") + + # Control OUT SET_CONFIGURATION 1 - restore first configuration + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_SET_CONFIGURATION + value = 1 # Configuration Value + index = 0 # Always 0 for this request + length = 0 # Always 0 for this request + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + except usb.core.USBError: + raise_unconditionally(lineno(), "SET_CONFIGURATION failed") + # test control data transfer after configured back + control_data_test(dev, [64, 256], log) + + # Control IN GET_CONFIGURATION - check if configured back + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_INTERFACE) + request = REQUEST_GET_CONFIGURATION + value = 0 # Always 0 for this request + index = 0 # Always 0 for this request + length = 1 # Always 1 for this request (size of return data) + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + if(ret[0] != 1): + raise_unconditionally(lineno(), "Expected to be deconfigured: 1") + except usb.core.USBError: + raise_unconditionally(lineno(), "GET_CONFIGURATION failed") + control_data_test(dev, [64, 256], log) + + +def get_descriptor_test(dev, vendor_id, product_id, log): + # Control IN GET_DESCRIPTOR - device + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = REQUEST_GET_DESCRIPTOR + value = (DESC_TYPE_DEVICE << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) + index = 0 # 0 or Language ID for this request + length = DEVICE_DESC_SIZE # Descriptor Length + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + #print("### DEVICE_DESC ####################################################") + #dev_desc = dict(zip(device_descriptor_keys, device_descriptor_parser.unpack(ret))) + #for key in dev_desc: + # print("%s: %d" % (key, dev_desc[key])) + #assert vendor_id != dev_desc['idVendor'] + #assert product_id != dev_desc['idProduct'] + except usb.core.USBError: + raise_unconditionally(lineno(), "Requesting device descriptor failed") + + # Control IN GET_DESCRIPTOR - configuration + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = REQUEST_GET_DESCRIPTOR + value = (DESC_TYPE_CONFIG << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) + index = 0 # 0 or Language ID for this request + length = CONFIGURATION_DESC_SIZE # Descriptor Length + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + #print("### CONFIGURATION_DESC ####################################################") + #conf_desc = dict(zip(configuration_descriptor_keys, configuration_descriptor_parser.unpack(ret))) + #for key in conf_desc: + # print("%s: %d" % (key, conf_desc[key])) + #print("#######################################################") + except usb.core.USBError: + raise_unconditionally(lineno(), "Requesting configuration descriptor failed") + + # Control IN GET_DESCRIPTOR - interface + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = REQUEST_GET_DESCRIPTOR + value = (DESC_TYPE_INTERFACE << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) + index = 0 # 0 or Language ID for this request + length = INTERFACE_DESC_SIZE # Descriptor Length + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + raise_unconditionally(lineno(), "Requesting interface descriptor should fail since it is not directly accessible") + except usb.core.USBError: + log("interface descriptor is not directly accessible") + + # Control IN GET_DESCRIPTOR - interface + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = REQUEST_GET_DESCRIPTOR + value = (DESC_TYPE_ENDPOINT << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) + index = 0 # 0 or Language ID for this request + length = INTERFACE_DESC_SIZE # Descriptor Length + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + raise_unconditionally(lineno(), "Requesting endpoint descriptor should fail since it is not directly accessible") + except usb.core.USBError: + log("endpoint descriptor is not directly accessible") + + +def set_descriptor_test(dev, log): + # SET_DESCRIPTOR is optional and not implemented in Mbed + # command should fail with no action on device side + + # Control OUT SET_DESCRIPTOR + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = REQUEST_SET_DESCRIPTOR + value = (DESC_TYPE_DEVICE << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) + index = 0 # 0 or Language ID for this request + data = bytearray(DEVICE_DESC_SIZE) # Descriptor data + try: + dev.ctrl_transfer(request_type, request, value, index, data) + raise_unconditionally(lineno(), "SET_DESCRIPTOR should fail since it is not implemented") + except usb.core.USBError: + log("SET_DESCRIPTOR is unsupported") + + +def synch_frame_test(dev, log): + # only for isochronous endpoints + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_ENDPOINT) + request = REQUEST_SYNCH_FRAME + value = 0 # Always 0 for this request + index = 1 # Endpoint index + length = 2 # Always 2 for this request (size of return data) + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] | (ret[1] << 8) + log("synch frame ret: %d" % (ret)) + except usb.core.USBError: + raise_unconditionally(lineno(), "SYNCH_FRAME failed") + + def control_stall_test(dev, log): # Control OUT stall @@ -228,7 +851,7 @@ def control_stall_test(dev, log): index = 0 # Communication interface data = bytearray(64) # Dummy data dev.ctrl_transfer(request_type, request, value, index, data, 5000) - raise Exception("Invalid request not stalled") + raise_unconditionally(lineno(), "Invalid request not stalled") except usb.core.USBError: log("Invalid request stalled") @@ -241,7 +864,7 @@ def control_stall_test(dev, log): index = 0 # Communication interface length = 0 dev.ctrl_transfer(request_type, request, value, index, length, 5000) - raise Exception("Invalid request not stalled") + raise_unconditionally(lineno(), "Invalid request not stalled") except usb.core.USBError: log("Invalid request stalled") @@ -254,7 +877,7 @@ def control_stall_test(dev, log): index = 0 # Communication interface length = 0 dev.ctrl_transfer(request_type, request, value, index, length, 5000) - raise Exception("Invalid request not stalled") + raise_unconditionally(lineno(), "Invalid request not stalled") except usb.core.USBError: log("Invalid request stalled") @@ -267,11 +890,23 @@ def control_stall_test(dev, log): index = 0 # Communication interface length = 255 dev.ctrl_transfer(request_type, request, value, index, length, 5000) - raise Exception("Invalid request not stalled") + raise_unconditionally(lineno(), "Invalid request not stalled") except usb.core.USBError: log("Invalid request stalled") - for i in (6, 7, 5): + for i in (3, 4, 5): + try: + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = 0x6 # GET_DESCRIPTOR + value = (0x03 << 8) | (i << 0) # String descriptor index + index = 0 # Communication interface + length = 255 + resp = dev.ctrl_transfer(request_type, request, value, index, length, 5000) + except usb.core.USBError: + raise_unconditionally(lineno(), "Requesting string failed i: " + str(i)) + + for i in (6, 7): try: request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, CTRL_RECIPIENT_DEVICE) @@ -280,11 +915,54 @@ def control_stall_test(dev, log): index = 0 # Communication interface length = 255 resp = dev.ctrl_transfer(request_type, request, value, index, length, 5000) - log("Requesting string %s passed" % i) + raise_unconditionally(lineno(), "Requesting string passed i: " + str(i)) except usb.core.USBError: log("Requesting string %s failed" % i) - - + + +def control_sizes_test(dev, log): + list = [1, 2, 3, 7, 8, 9, 15, 16, 17, 31, 32, 33, 63, 64, 65, 127, 128, 129, 255, 256, 257, 511, 512, 513, 1023, 1024, 1025, 2047, 2048] + control_data_test(dev, list, log) + + +def control_data_test(dev, sizes_list, log): + # Test control requests of various data stage sizes (1,8,16,32,64,255,256,...) + count = 1 + for i in sizes_list: + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_CTRL_OUT_SIZES + value = i # Size of data the device should actually read + index = 0 # Unused - set for debugging only + data = bytearray(i) # Dummy data + if i == 1: + data[0] = count + else: + data[0] = count - 1 + data[i - 1] = count + 1 + try: + dev.ctrl_transfer(request_type, request, value, index, data, 5000) + except usb.core.USBError: + raise_unconditionally(lineno(), "VENDOR_TEST_CTRL_OUT_SIZES failed ") + + request_type = build_request_type(CTRL_IN, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_CTRL_IN_SIZES + value = 0 # Size of data the device should actually send + index = 0 # Unused - set for debugging only + length = i + try: + ret = dev.ctrl_transfer(request_type, request, value, index, length, 5000) + if i == 1: + raise_if_different(count, ret[0], lineno(), "send/receive data not match") + else: + raise_if_different(count - 1, ret[0], lineno(), "send/receive data not match") + raise_if_different(count + 1, ret[i - 1], lineno(), "send/receive data not match") + except usb.core.USBError: + raise_unconditionally(lineno(), "VENDOR_TEST_CTRL_IN_SIZES failed") + count += 1 + + def control_stress_test(dev, log): # Test various patterns of control transfers @@ -337,6 +1015,65 @@ def control_stress_test(dev, log): count += 1 +def device_reset_test(log): + dev = yield + dev.reset(); + dev = yield + dev.reset(); + dev = yield + dev.reset(); + dev = yield + # run other test to check if USB works fine after reset + control_data_test(dev, [64, 256], log) + yield + + +def device_soft_reconnection_test(log): + list = [64, 256] + dev = yield + # run other test to check if USB works fine before reconnection + control_data_test(dev, list, log) + dev = yield + # run other test to check if USB works fine after reconnection + control_data_test(dev, list, log) + dev = yield + # run other test to check if USB works fine after reconnection + control_data_test(dev, list, log) + dev = yield + # run other test to check if USB works fine after reconnection + control_data_test(dev, list, log) + dev = yield + # run other test to check if USB works fine after reconnection + control_data_test(dev, list, log) + yield + + +def device_suspend_resume_test(log): + dev = yield + time.sleep(0.1) + control_data_test(dev, [64, 256], log) + time.sleep(0.1) + control_data_test(dev, [64, 256], log) + time.sleep(0.1) + control_data_test(dev, [64, 256], log) + time.sleep(0.1) + control_data_test(dev, [64, 256], log) + time.sleep(0.1) + yield + + +def repeated_construction_destruction_test(log): + # run other test to check if USB works fine after repeated construction/destruction + list = [64, 256] + dev = yield + control_data_test(dev, list, log) + dev = yield + control_data_test(dev, list, log) + dev = yield + control_data_test(dev, list, log) + yield + + def main(): parser = ArgumentParser(description="USB basic test") parser.add_argument('serial', help='USB serial number of DUT') diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index 3235a3f8554..a30a819dd70 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -30,12 +30,15 @@ #define VENDOR_TEST_CTRL_NONE_DELAY 6 #define VENDOR_TEST_CTRL_IN_STATUS_DELAY 7 #define VENDOR_TEST_CTRL_OUT_STATUS_DELAY 8 +#define VENDOR_TEST_CTRL_IN_SIZES 9 +#define VENDOR_TEST_CTRL_OUT_SIZES 10 #define MAX_EP_SIZE 64 #define MIN_EP_SIZE 8 -USBTester::USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): USBDevice(vendor_id, product_id, product_release) +USBTester::USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): USBDevice(vendor_id, product_id, product_release), + reset_count(0), suspend_count(0), resume_count(0) { EndpointResolver resolver(endpoint_table()); @@ -60,6 +63,46 @@ USBTester::~USBTester() deinit(); } + +const char *USBTester::get_desc_string(const uint8_t *desc) +{ + static char ret_string[128] = {}; + const uint8_t desc_size = desc[0] - 2; + const uint8_t *desc_str = &desc[2]; + uint32_t j = 0; + for(uint32_t i = 0; i < desc_size; i+=2, j++) { + ret_string[j] = desc_str[i]; + } + ret_string[j] = '\0'; + return ret_string; +} + +void USBTester::suspend(bool suspended) +{ + if(suspended) { + ++suspend_count; + } else { + ++resume_count; + } +} + +const char *USBTester::get_serial_desc_string() +{ + return get_desc_string(string_iserial_desc()); +} + +const char *USBTester::get_iinterface_desc_string() +{ + return get_desc_string(string_iserial_desc()); +} + +const char *USBTester::get_iproduct_desc_string() +{ + return get_desc_string(string_iserial_desc()); +} + + + void USBTester::callback_state_change(DeviceState new_state) { // Nothing to do @@ -93,6 +136,16 @@ void USBTester::callback_request(const setup_packet_t *setup) result = Success; delay = 2000; break; + case VENDOR_TEST_CTRL_IN_SIZES: + result = Send; + data = ctrl_buf; + size = setup->wLength; + break; + case VENDOR_TEST_CTRL_OUT_SIZES: + result = Receive; + data = ctrl_buf; + size = setup->wValue; + break; default: result = PassThrough; break; @@ -124,6 +177,12 @@ void USBTester::callback_request_xfer_done(const setup_packet_t *setup, bool abo case VENDOR_TEST_CTRL_OUT: result = true; break; + case VENDOR_TEST_CTRL_OUT_SIZES: + result = true; + break; + case VENDOR_TEST_CTRL_IN_SIZES: + result = true; + break; default: result = false; break; diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index 7b56d3171e5..b7005c98c0d 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -40,6 +40,24 @@ class USBTester: public USBDevice { ~USBTester(); + /* + * + * @returns descriptor string in ASCII + */ + const char *get_serial_desc_string(); + const char *get_iproduct_desc_string(); + const char *get_iinterface_desc_string(); + uint32_t get_reset_count() const { return reset_count; } + uint32_t get_suspend_count() const { return suspend_count; } + uint32_t get_resume_count() const { return resume_count; } + void clear_reset_count() { reset_count = 0; } + void clear_suspend_count() { suspend_count = 0; } + void clear_resume_count() { resume_count = 0; } + +private: + const char *get_desc_string(const uint8_t *desc); + virtual void suspend(bool suspended); + protected: /* @@ -78,6 +96,9 @@ class USBTester: public USBDevice { uint8_t int_out; uint8_t int_buf[64]; EventQueue *queue; + volatile uint32_t reset_count; + volatile uint32_t suspend_count; + volatile uint32_t resume_count; virtual void callback_state_change(DeviceState new_state); virtual void callback_request(const setup_packet_t *setup); @@ -86,6 +107,7 @@ class USBTester: public USBDevice { virtual void callback_set_interface(uint16_t interface, uint8_t alternate); virtual void epbulk_out_callback(usb_ep_t endpoint); virtual void epint_out_callback(usb_ep_t endpoint); + virtual void callback_reset() { ++reset_count; } uint8_t ctrl_buf[2048]; }; diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index 141bb473e2c..1577a87148a 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -29,23 +29,263 @@ using namespace utest::v1; -// Echo server (echo payload to host) -void test_case_basic() +void control_basic_test() { + uint16_t vendor_id = 0x0d28; + uint16_t product_id = 0x0205; + uint16_t product_release = 0x0001; char _key[11] = {}; char _value[128] = {}; + char str[128] = {}; { - USBTester serial(0x0d28, 0x0205, 0x0001, true); + USBTester serial(vendor_id, product_id, product_release, true); + sprintf (str, "%s %d %d", serial.get_serial_desc_string(), vendor_id, product_id); + greentea_send_kv("control_basic_test", str); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + +void control_stall_test() +{ + uint16_t vendor_id = 0x0d28; + uint16_t product_id = 0x0205; + uint16_t product_release = 0x0001; + char _key[11] = {}; + char _value[128] = {}; + + { + USBTester serial(vendor_id, product_id, product_release, true); + greentea_send_kv("control_stall_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + +void control_sizes_test() +{ + uint16_t vendor_id = 0x0d28; + uint16_t product_id = 0x0205; + uint16_t product_release = 0x0001; + char _key[11] = {}; + char _value[128] = {}; + + { + USBTester serial(vendor_id, product_id, product_release, true); + greentea_send_kv("control_sizes_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + +void control_stress_test() +{ + uint16_t vendor_id = 0x0d28; + uint16_t product_id = 0x0205; + uint16_t product_release = 0x0001; + char _key[11] = {}; + char _value[128] = {}; + + { + USBTester serial(vendor_id, product_id, product_release, true); + greentea_send_kv("control_stress_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} - greentea_send_kv("usb_enumeration_done", "0123456789"); +void device_reset_test() +{ + uint16_t vendor_id = 0x0d28; + uint16_t product_id = 0x0205; + uint16_t product_release = 0x0001; + char _key[11] = {}; + char _value[128] = {}; + + { + USBTester serial(vendor_id, product_id, product_release, true); + + greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); + serial.clear_reset_count(); + // Wait for host before terminating + while(serial.get_reset_count() == 0); + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + + while(!serial.configured()); + + greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); + serial.clear_reset_count(); + // Wait for host before terminating + while(serial.get_reset_count() == 0); + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + + while(!serial.configured()); + + greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); + serial.clear_reset_count(); + // Wait for host before terminating + while(serial.get_reset_count() == 0); + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + + while(!serial.configured()); + + greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + + +void device_soft_reconnection_test() +{ + uint16_t vendor_id = 0x0d28; + uint16_t product_id = 0x0205; + uint16_t product_release = 0x0001; + char _key[11] = {}; + char _value[128] = {}; + const uint32_t reconnect_try_count = 3; + + { + USBTester serial(vendor_id, product_id, product_release, true); + + greentea_send_kv("device_soft_reconnection_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + + for(int i = 0; i < reconnect_try_count; i++) { + serial.disconnect(); + // If disconnect() + connect() occur too fast the reset event will be dropped. + // At a minimum there should be a 200us delay between disconnect and connect. + // To be on the safe side I would recommend a 1ms delay, so the host controller + // has an entire USB frame to detect the disconnect. + wait_ms(1); + serial.connect(); + greentea_send_kv("device_soft_reconnection_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } + + serial.disconnect(); + wait_ms(1); + serial.connect(); + serial.disconnect(); + wait_ms(1); + serial.connect(); + serial.disconnect(); + wait_ms(1); + serial.connect(); + greentea_send_kv("device_soft_reconnection_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + +void device_suspend_resume_test() +{ + uint16_t vendor_id = 0x0d28; + uint16_t product_id = 0x0205; + uint16_t product_release = 0x0001; + char _key[11] = {}; + char _value[128] = {}; + + { + USBTester serial(vendor_id, product_id, product_release, true); + greentea_send_kv("device_suspend_resume_test", serial.get_serial_desc_string()); + printf("[1] suspend_count: %d resume_count: %d\n", serial.get_suspend_count(), serial.get_resume_count()); + serial.clear_suspend_count(); + serial.clear_resume_count(); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + printf("[2] suspend_count: %d resume_count: %d\n", serial.get_suspend_count(), serial.get_resume_count()); + TEST_ASSERT_EQUAL_STRING("pass", _key); + wait_ms(5000); + printf("[3] suspend_count: %d resume_count: %d\n", serial.get_suspend_count(), serial.get_resume_count()); + } +} + +void repeated_construction_destruction_test() +{ + uint16_t vendor_id = 0x0d28; + uint16_t product_id = 0x0205; + uint16_t product_release = 0x0001; + char _key[11] = {}; + char _value[128] = {}; + + { + USBTester serial(vendor_id, product_id, product_release, true); + TEST_ASSERT_EQUAL(true, serial.configured()); + wait_ms(1); + } + + wait_ms(1); + { + USBTester serial(vendor_id, product_id, product_release, true); + TEST_ASSERT_EQUAL(true, serial.configured()); + wait_ms(1); + } + + wait_ms(1); + { + USBTester serial(vendor_id, product_id, product_release, true); + TEST_ASSERT_EQUAL(true, serial.configured()); + wait_ms(1); + } + + wait_ms(1); + { + USBTester serial(vendor_id, product_id, product_release, true); + TEST_ASSERT_EQUAL(true, serial.configured()); + wait_ms(1); + greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } + + wait_ms(1); + { + USBTester serial(vendor_id, product_id, product_release, true); + TEST_ASSERT_EQUAL(true, serial.configured()); + wait_ms(1); + greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); + } + + wait_ms(1); + { + USBTester serial(vendor_id, product_id, product_release, true); + TEST_ASSERT_EQUAL(true, serial.configured()); + wait_ms(1); + greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + TEST_ASSERT_EQUAL_STRING("pass", _key); } } Case cases[] = { - Case("pyusb basic test", test_case_basic), + Case("usb control basic test", control_basic_test), + Case("usb control stall test", control_stall_test), + Case("usb control sizes test", control_sizes_test), + Case("usb control stress test", control_stress_test), + Case("usb device reset test", device_reset_test), + Case("usb soft reconnection test", device_soft_reconnection_test), + Case("usb device suspend/resume test", device_suspend_resume_test), + Case("usb repeated construction destruction test", repeated_construction_destruction_test) }; utest::v1::status_t greentea_test_setup(const size_t number_of_cases) From 45a02bec63fe9bb9e1d553d3c6f352cfc98f2fc7 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 19 Mar 2018 22:03:32 -0500 Subject: [PATCH 304/488] Move USBPhy and related files to USB directory Move the USBPhy header files into usb/device/USBPhy. Also move hal and target USB files since mbed 2 does not compile when these files are present without the USBPhy headers. Directory restructure summary: platform/USBPhy* to usb/device/USBPhy/USBPhy* hal/* to usb/device/hal/* targets/TARGET_Freescale/usb/* to usb/device/targets/TARGET_Freescale/* targets/TARGET_NXP/TARGET_LPC176X/usb/* to usb/device/targets/TARGET_NXP/* --- {platform => usb/device/USBPhy}/USBPhy.h | 0 {platform => usb/device/USBPhy}/USBPhyEvents.h | 0 {platform => usb/device/USBPhy}/USBPhyTypes.h | 0 {hal => usb/device/hal}/mbed_usb_phy.cpp | 0 {hal => usb/device/hal}/usb_phy_api.h | 0 .../device/targets/TARGET_Freescale}/USBEndpoints_Kinetis.h | 0 .../usb => usb/device/targets/TARGET_Freescale}/USBPhyHw.h | 0 .../device/targets/TARGET_Freescale}/USBPhy_Kinetis.cpp | 0 .../device/targets/TARGET_NXP}/USBEndpoints_LPC17_LPC23.h | 0 .../usb => usb/device/targets/TARGET_NXP}/USBHAL_LPC17.cpp | 0 .../usb => usb/device/targets/TARGET_NXP}/USBPhyHw.h | 0 11 files changed, 0 insertions(+), 0 deletions(-) rename {platform => usb/device/USBPhy}/USBPhy.h (100%) rename {platform => usb/device/USBPhy}/USBPhyEvents.h (100%) rename {platform => usb/device/USBPhy}/USBPhyTypes.h (100%) rename {hal => usb/device/hal}/mbed_usb_phy.cpp (100%) rename {hal => usb/device/hal}/usb_phy_api.h (100%) rename {targets/TARGET_Freescale/usb => usb/device/targets/TARGET_Freescale}/USBEndpoints_Kinetis.h (100%) rename {targets/TARGET_Freescale/usb => usb/device/targets/TARGET_Freescale}/USBPhyHw.h (100%) rename {targets/TARGET_Freescale/usb => usb/device/targets/TARGET_Freescale}/USBPhy_Kinetis.cpp (100%) rename {targets/TARGET_NXP/TARGET_LPC176X/usb => usb/device/targets/TARGET_NXP}/USBEndpoints_LPC17_LPC23.h (100%) rename {targets/TARGET_NXP/TARGET_LPC176X/usb => usb/device/targets/TARGET_NXP}/USBHAL_LPC17.cpp (100%) rename {targets/TARGET_NXP/TARGET_LPC176X/usb => usb/device/targets/TARGET_NXP}/USBPhyHw.h (100%) diff --git a/platform/USBPhy.h b/usb/device/USBPhy/USBPhy.h similarity index 100% rename from platform/USBPhy.h rename to usb/device/USBPhy/USBPhy.h diff --git a/platform/USBPhyEvents.h b/usb/device/USBPhy/USBPhyEvents.h similarity index 100% rename from platform/USBPhyEvents.h rename to usb/device/USBPhy/USBPhyEvents.h diff --git a/platform/USBPhyTypes.h b/usb/device/USBPhy/USBPhyTypes.h similarity index 100% rename from platform/USBPhyTypes.h rename to usb/device/USBPhy/USBPhyTypes.h diff --git a/hal/mbed_usb_phy.cpp b/usb/device/hal/mbed_usb_phy.cpp similarity index 100% rename from hal/mbed_usb_phy.cpp rename to usb/device/hal/mbed_usb_phy.cpp diff --git a/hal/usb_phy_api.h b/usb/device/hal/usb_phy_api.h similarity index 100% rename from hal/usb_phy_api.h rename to usb/device/hal/usb_phy_api.h diff --git a/targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h b/usb/device/targets/TARGET_Freescale/USBEndpoints_Kinetis.h similarity index 100% rename from targets/TARGET_Freescale/usb/USBEndpoints_Kinetis.h rename to usb/device/targets/TARGET_Freescale/USBEndpoints_Kinetis.h diff --git a/targets/TARGET_Freescale/usb/USBPhyHw.h b/usb/device/targets/TARGET_Freescale/USBPhyHw.h similarity index 100% rename from targets/TARGET_Freescale/usb/USBPhyHw.h rename to usb/device/targets/TARGET_Freescale/USBPhyHw.h diff --git a/targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp similarity index 100% rename from targets/TARGET_Freescale/usb/USBPhy_Kinetis.cpp rename to usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBEndpoints_LPC17_LPC23.h b/usb/device/targets/TARGET_NXP/USBEndpoints_LPC17_LPC23.h similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/usb/USBEndpoints_LPC17_LPC23.h rename to usb/device/targets/TARGET_NXP/USBEndpoints_LPC17_LPC23.h diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp b/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/usb/USBHAL_LPC17.cpp rename to usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp diff --git a/targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h b/usb/device/targets/TARGET_NXP/USBPhyHw.h similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/usb/USBPhyHw.h rename to usb/device/targets/TARGET_NXP/USBPhyHw.h From 9fe0f40bbdef06c17fef656658d59bf9fcda61ce Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 24 Mar 2018 17:23:47 +0100 Subject: [PATCH 305/488] Add USBPhy template Add a template for implementing a USBPhy. --- usb/device/targets/TARGET_Template/USBPhyHw.h | 66 ++++ .../TARGET_Template/USBPhy_template.cpp | 309 ++++++++++++++++++ 2 files changed, 375 insertions(+) create mode 100644 usb/device/targets/TARGET_Template/USBPhyHw.h create mode 100644 usb/device/targets/TARGET_Template/USBPhy_template.cpp diff --git a/usb/device/targets/TARGET_Template/USBPhyHw.h b/usb/device/targets/TARGET_Template/USBPhyHw.h new file mode 100644 index 00000000000..ce6cc124ba6 --- /dev/null +++ b/usb/device/targets/TARGET_Template/USBPhyHw.h @@ -0,0 +1,66 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBPHYHW_H +#define USBPHYHW_H + +#include "mbed.h" +#include "USBPhy.h" + + +class USBPhyHw : public USBPhy { +public: + USBPhyHw(); + virtual ~USBPhyHw(); + virtual void init(USBPhyEvents *events); + virtual void deinit(); + virtual bool powered(); + virtual void connect(); + virtual void disconnect(); + virtual void configure(); + virtual void unconfigure(); + virtual void sof_enable(); + virtual void sof_disable(); + virtual void set_address(uint8_t address); + virtual void remote_wakeup(); + virtual const usb_ep_table_t* endpoint_table(); + + virtual uint32_t ep0_set_max_packet(uint32_t max_packet); + virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_read(uint8_t *data, uint32_t size); + virtual uint32_t ep0_read_result(); + virtual void ep0_write(uint8_t *buffer, uint32_t size); + virtual void ep0_stall(); + + virtual bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type); + virtual void endpoint_remove(usb_ep_t endpoint); + virtual void endpoint_stall(usb_ep_t endpoint); + virtual void endpoint_unstall(usb_ep_t endpoint); + + virtual bool endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual uint32_t endpoint_read_result(usb_ep_t endpoint); + virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual void endpoint_abort(usb_ep_t endpoint); + + virtual void process(); + +private: + USBPhyEvents *events; + + static void _usbisr(void); +}; + +#endif diff --git a/usb/device/targets/TARGET_Template/USBPhy_template.cpp b/usb/device/targets/TARGET_Template/USBPhy_template.cpp new file mode 100644 index 00000000000..b0c464a3bd7 --- /dev/null +++ b/usb/device/targets/TARGET_Template/USBPhy_template.cpp @@ -0,0 +1,309 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "USBPhyHw.h" + +static USBPhyHw *instance; + +USBPhy *get_usb_phy() +{ + static USBPhyHw usbphy; + return &usbphy; +} + +USBPhyHw::USBPhyHw(): events(NULL) +{ + +} + +USBPhyHw::~USBPhyHw() +{ + +} + +void USBPhyHw::init(USBPhyEvents *events) +{ + this->events = events; + + // Disable IRQ + NVIC_DisableIRQ(USB_IRQn); + + // TODO - Setup clocks + + // TODO - Enable USB module + + // Enable IRQ + NVIC_SetVector(USB_IRQn, (uint32_t)&_usbisr); + NVIC_EnableIRQ(USB_IRQn); +} + +void USBPhyHw::deinit() +{ + // Disconnect and disable interrupt + disconnect(); + NVIC_DisableIRQ(USB_IRQn); +} + +bool USBPhyHw::powered() +{ + // TODO - return true if powered false otherwise. Devices which don't support + // this should always return true + return true; +} + +void USBPhyHw::connect() +{ + // TODO - Enable endpoint interrupts + + // TODO - Enable pullup on D+ +} + +void USBPhyHw::disconnect() +{ + // TODO - Disable all endpoints + + // TODO - Clear all endpoint interrupts + + // TODO - Disable pullup on D+ +} + +void USBPhyHw::configure() +{ + // TODO - set device to configured. Most device will not need this +} + +void USBPhyHw::unconfigure() +{ + // TODO - set device to unconfigured. Most device will not need this +} + +void USBPhyHw::sof_enable() +{ + // TODO - Enable SOF interrupt +} + +void USBPhyHw::sof_disable() +{ + // TODO - Disable SOF interrupt +} + +void USBPhyHw::set_address(uint8_t address) +{ + // TODO - set the device address. Address must take effect + // after the status phase of the current transfer +} + +void USBPhyHw::remote_wakeup() +{ + // TODO - Sent remote wakeup over USB lines (if supported) +} + +const usb_ep_table_t *USBPhyHw::endpoint_table() +{ + // TODO - Update the endpoint table for what your device supports + + static const usb_ep_table_t template_table = { + 4096 - 32 * 4, // 32 words for endpoint buffers + // +3 based added to interrupt and isochronous to ensure enough + // space for 4 byte alignment + { + {USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 0}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 3}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 2, 0} + } + }; + return &lpc_table; +} + +uint32_t USBPhyHw::ep0_set_max_packet(uint32_t max_packet) +{ + // TODO - set endpoint 0 size and return this size + return 64; +} + +// read setup packet +void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) +{ + // TODO - read up to size bytes of the setup packet +} + +void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) +{ + // TODO - setup data buffer to receive next endpoint 0 OUT packet +} + +uint32_t USBPhyHw::ep0_read_result() +{ + // TODO - return the size of the last OUT packet received on endpoint 0 + return 0; +} + +void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) +{ + // TODO - start transferring buffer on endpoint 0 IN +} + +void USBPhyHw::ep0_stall() +{ + // TODO - protocol stall endpoint 0. This stall must be automatically + // cleared by the next setup packet +} + +bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type) +{ + // TODO - enable this endpoint + + return true; +} + +void USBPhyHw::endpoint_remove(usb_ep_t endpoint) +{ + // TODO - disable and remove this endpoint +} + +void USBPhyHw::endpoint_stall(usb_ep_t endpoint) +{ + // TODO - stall this endpoint until it is explicitly cleared +} + +void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) +{ + // TODO - unstall this endpoint +} + +bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ + // TODO - setup data buffer to receive next endpoint OUT packet and return true if successful + return true; +} + +uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) +{ + // TODO - return the size of the last OUT packet received on endpoint +} + +bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ + // TODO - start transferring buffer on endpoint IN + + return true; +} + +void USBPhyHw::endpoint_abort(usb_ep_t endpoint) +{ + // TODO - stop the current transfer on this endpoint and don't call the IN or OUT callback +} + +void USBPhyHw::process() +{ + // TODO - update register for your mcu + + uint8_t stat = USB0->STAT; + + USB0->STAT = stat; // Clear pending interrupts + + // reset interrupt + if (stat & USB_STAT_RESET_MASK) { + + // TODO - disable all endpoints + + // TODO - clear all endpoint interrupts + + // TODO - enable control endpoint + + // reset bus for USBDevice layer + events->reset(); + + // Re-enable interrupt + NVIC_ClearPendingIRQ(USB_IRQn); + NVIC_EnableIRQ(USB_IRQn); + return; + } + + // power applied + if (stat & USB_STAT_POWERED) { + events->powered(true); + } + + // power lost + if (stat & USB_STAT_UNPOWERED) { + events->powered(false); + } + + // sleep interrupt + if (stat & USB_STAT_SUSPEND_MASK) { + events->suspend(true); + } + + // resume interrupt + if (stat & USB_STAT_RESUME_MASK) { + events->suspend(false); + } + + // sof interrupt + if (stat & USB_STAT_SOF_MASK) { + // SOF event, read frame number + events->sof(USB0->FRAME); + } + + // endpoint interrupt + if (stat & USB_STAT_EP_MASK) { + uint32_t ep_pending = USB->EP; + + // TODO - call endpoint 0 IN callback if pending + events->ep0_in(); + + // TODO - call endpoint 0 OUT callback if pending + events->ep0_out(); + + // TODO - call endpoint 0 SETUP callback if pending + events->ep0_setup(); + + for (int i = 0; i < 16; i++) { + // TODO - call endpoint i IN callback if pending + events->in(0x80 | i); + } + + for (int i = 0; i < 16; i++) { + // TODO - call endpoint i OUT callback if pending + events->out(); + } + + USB->EP = ep_pending; // clear pending + } + + // Re-enable interrupt + NVIC_ClearPendingIRQ(USB_IRQn); + NVIC_EnableIRQ(USB_IRQn); +} + +void USBPhyHw::_usbisr(void) { + NVIC_DisableIRQ(USB_IRQn); + instance->events->start_process(); +} From c36d609603554e7409a7b64b1f226c6d833a04e2 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 24 Mar 2018 11:00:26 +0100 Subject: [PATCH 306/488] Add pyusb to requirements Add pyusb to requirements so the greentea USB tests work. --- requirements.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/requirements.txt b/requirements.txt index e7f6071e59c..1f34955c5de 100644 --- a/requirements.txt +++ b/requirements.txt @@ -21,3 +21,4 @@ git+https://github.com/armmbed/manifest-tool.git@v1.4.6 mbed-cloud-sdk==2.0.1 pyocd>=0.14,<0.15 icetea>=1.0.2,<1.1 +pyusb>=1.0.0 From dc0883028583dd3e1f015d5c1056163308829449 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 23 Mar 2018 14:10:14 +0100 Subject: [PATCH 307/488] Update USBTester product name Change the name reported by USBTester from CDC DEVICE to MBED TEST DEVICE. --- TESTS/usb_device/basic/USBTester.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index a30a819dd70..8dfed5ff004 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -286,9 +286,11 @@ const uint8_t *USBTester::string_iinterface_desc() const uint8_t *USBTester::string_iproduct_desc() { static const uint8_t string_iproduct_descriptor[] = { - 0x16, + 0x22, STRING_DESCRIPTOR, - 'C', 0, 'D', 0, 'C', 0, ' ', 0, 'D', 0, 'E', 0, 'V', 0, 'I', 0, 'C', 0, 'E', 0 + 'M', 0, 'B', 0, 'E', 0, 'D', 0, ' ', 0, + 'T', 0, 'E', 0, 'S', 0, 'T', 0, ' ', 0, + 'D', 0, 'E', 0, 'V', 0, 'I', 0, 'C', 0, 'E', 0, }; return string_iproduct_descriptor; } From 09a035995e034f3da0bb61f2a9319928efc7cf2c Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Mon, 26 Mar 2018 12:59:49 +0200 Subject: [PATCH 308/488] Fix for USB set_clear_feature_test for OSX --- TESTS/host_tests/pyusb_basic.py | 54 --------------------------------- 1 file changed, 54 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index ae6c164a327..4b14f595368 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -491,11 +491,6 @@ def get_status_test(dev, log): def set_clear_feature_test(dev, log): - # The state of the Direction bit is ignored if the wLength field is zero, - # signifying there is no Data stage - see USB spec 9.3.1 - # according to this SET/CLEAR_FEATURE ignores direction bits and should - # work for both CTRL_OUT and CTRL_IN - # Control OUT SET_FEATURE on endpoint - halt request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, CTRL_RECIPIENT_ENDPOINT) @@ -544,55 +539,6 @@ def set_clear_feature_test(dev, log): if(ret != 0): raise_unconditionally(lineno(), "endpoint unhalthalt failed") - # retest for CTRL_IN - # Control IN SET_FEATURE on endpoint - halt - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_SET_FEATURE - value = FEATURE_ENDPOINT_HALT - index = 1 # Endpoint index - length = 0 # Always 0 for this request - try: - dev.ctrl_transfer(request_type, request, value, index, length) - except usb.core.USBError: - raise_unconditionally(lineno(), "endpoint halt failed") - - # check if endpoint was halted - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_GET_STATUS - value = 0 # Always 0 for this request - index = 1 # Endpoint index - length = 2 # Always 2 for this request (size of return data) - ret = dev.ctrl_transfer(request_type, request, value, index, length) - ret = ret[0] | (ret[1] << 8) - if(ret != 1): - raise_unconditionally(lineno(), "endpoint was not halted") - - # Control IN CLEAR_FEATURE on endpoint - unhalt - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_CLEAR_FEATURE - value = FEATURE_ENDPOINT_HALT - index = 1 # Endpoint index - length = 0 # Always 0 for this request - try: - dev.ctrl_transfer(request_type, request, value, index, length) - except usb.core.USBError: - raise_unconditionally(lineno(), "endpoint was not unhalted") - - # check if endpoint was unhalted - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_GET_STATUS - value = 0 # Always 0 for this request - index = 1 # Endpoint index - length = 2 # Always 2 for this request (size of return data) - ret = dev.ctrl_transfer(request_type, request, value, index, length) - ret = ret[0] - if(ret != 0): - raise_unconditionally(lineno(), "endpoint unhalthalt failed") - def get_set_interface_test(dev, log): # Control IN GET_INTERFACE From 6f94452bd8d12bbaf1669fec16058190c651212a Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 24 Mar 2018 22:07:31 +0100 Subject: [PATCH 309/488] Skip USB reset tests on OSX OSX machines don't allow you to reset USB devices. Skip this test on OSX so testing can still be used. --- TESTS/host_tests/pyusb_basic.py | 5 +++++ TESTS/usb_device/basic/main.cpp | 5 ++++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 4b14f595368..640c9271f28 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -217,6 +217,10 @@ def _callback_repeated_construction_destruction_test(self, key, value, timestamp except (RuntimeError) as exc: self.report_error(exc) + def _callback_reset_support(self, key, value, timestamp): + status = "false" if sys.platform == "darwin" else "true" + self.log("Reset supported: %s" % status) + self.send_kv("placeholder", status) def find_device(self, serial_number): # to make it more reliable, 20 retries in 2[s] @@ -263,6 +267,7 @@ def setup(self): self.register_callback('device_suspend_resume_test', self._callback_device_suspend_resume_test) self.register_callback('repeated_construction_destruction_test', self._callback_repeated_construction_destruction_test) + self.register_callback('reset_support', self._callback_reset_support) def result(self): return self.__result diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index 1577a87148a..a9c08b214c7 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -107,7 +107,10 @@ void device_reset_test() char _key[11] = {}; char _value[128] = {}; - { + greentea_send_kv("reset_support", 0); + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); + if (strcmp(_value, "false") != 0) { + USBTester serial(vendor_id, product_id, product_release, true); greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); From 4f6be16213bdfdcf1372695e61ced7f3c8933a43 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 27 Mar 2018 16:00:13 +0200 Subject: [PATCH 310/488] Fix USB tests Change the direction used in set interface to match the USB specification. This allows USB tests to pass on OSX. --- TESTS/host_tests/pyusb_basic.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 640c9271f28..c361cbee03c 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -564,7 +564,7 @@ def get_set_interface_test(dev, log): control_data_test(dev, [64, 256], log) # Control IN SET_INTERFACE - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, CTRL_RECIPIENT_INTERFACE) request = REQUEST_SET_INTERFACE value = 1 # Alternative interface setting index @@ -592,7 +592,7 @@ def get_set_interface_test(dev, log): raise_unconditionally(lineno(), "GET_INTERFACE failed") # Control IN SET_INTERFACE restore interfejs settings - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, CTRL_RECIPIENT_INTERFACE) request = REQUEST_SET_INTERFACE value = 0 # Interface setting index From 08227dfcb78609436241446f7ac3338816499948 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Tue, 17 Apr 2018 13:57:05 +0200 Subject: [PATCH 311/488] target: arch_pro enable USBDEVICE support --- targets/targets.json | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/targets/targets.json b/targets/targets.json index fc0a4ddcf59..c0a9f12efd4 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -641,7 +641,8 @@ "SPISLAVE", "STDIO_MESSAGES", "FLASH", - "MPU" + "MPU", + "USBDEVICE" ], "release_versions": ["2", "5"], "device_name": "LPC1768", From 7f9b6599b935ea3c386aa3da1fa9902ec1c3253f Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Tue, 17 Apr 2018 12:47:27 +0200 Subject: [PATCH 312/488] USB reset test fix --- TESTS/usb_device/basic/main.cpp | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index a9c08b214c7..105913392e2 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -112,29 +112,28 @@ void device_reset_test() if (strcmp(_value, "false") != 0) { USBTester serial(vendor_id, product_id, product_release, true); - - greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); serial.clear_reset_count(); - // Wait for host before terminating + greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); while(serial.get_reset_count() == 0); + // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); TEST_ASSERT_EQUAL_STRING("pass", _key); while(!serial.configured()); - greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); serial.clear_reset_count(); - // Wait for host before terminating + greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); while(serial.get_reset_count() == 0); + // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); TEST_ASSERT_EQUAL_STRING("pass", _key); while(!serial.configured()); - greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); serial.clear_reset_count(); - // Wait for host before terminating + greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); while(serial.get_reset_count() == 0); + // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); TEST_ASSERT_EQUAL_STRING("pass", _key); From 847d8f7865e2efea2fa732881e9c78f39d05a138 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Mon, 16 Apr 2018 09:23:21 +0200 Subject: [PATCH 313/488] USBDevice - add support for deconfiguration --- TESTS/usb_device/basic/USBTester.cpp | 109 ++++++++++++++++----------- TESTS/usb_device/basic/USBTester.h | 9 ++- 2 files changed, 74 insertions(+), 44 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index 8dfed5ff004..70b89e906b4 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -37,8 +37,9 @@ #define MIN_EP_SIZE 8 -USBTester::USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): USBDevice(vendor_id, product_id, product_release), - reset_count(0), suspend_count(0), resume_count(0) +USBTester::USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): + USBDevice(vendor_id, product_id, product_release), reset_count(0), suspend_count(0), + resume_count(0), interface_set(NONE), configuration_set(NONE) { EndpointResolver resolver(endpoint_table()); @@ -86,6 +87,16 @@ void USBTester::suspend(bool suspended) } } +void USBTester::remove_endpoints() +{ + if(configuration_set == 1) { + endpoint_remove(int_in); + endpoint_remove(int_out); + endpoint_remove(bulk_in); + endpoint_remove(bulk_out); + } +} + const char *USBTester::get_serial_desc_string() { return get_desc_string(string_iserial_desc()); @@ -105,8 +116,16 @@ const char *USBTester::get_iproduct_desc_string() void USBTester::callback_state_change(DeviceState new_state) { - // Nothing to do -}; + if (new_state != Configured) { + configuration_set = NONE; + interface_set = NONE; + } +} + +void USBTester::callback_reset() +{ + ++reset_count; +} void USBTester::callback_request(const setup_packet_t *setup) { @@ -196,57 +215,61 @@ void USBTester::callback_request_xfer_done(const setup_packet_t *setup, bool abo // configuration is not supported. void USBTester::callback_set_configuration(uint8_t configuration) { - if (configuration != DEFAULT_CONFIGURATION) { + if (configuration == DEFAULT_CONFIGURATION) { + complete_set_configuration(set_configuration(configuration)); + } else { complete_set_configuration(false); - return; } +} - // Configure endpoints > 0 - endpoint_add(int_in, MAX_EP_SIZE, USB_EP_TYPE_INT); - endpoint_add(int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); - read_start(int_out, int_buf, sizeof(int_buf)); - endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); - endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); - read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); - - complete_set_configuration(true); +bool USBTester::set_configuration(uint16_t configuration) +{ + if(set_interface(configuration, 0, 0)) { + configuration_set = configuration; + return true; + } + return false; } void USBTester::callback_set_interface(uint16_t interface, uint8_t alternate) { - if (interface == 0 && alternate == 0) { - endpoint_remove(int_in); - endpoint_remove(int_out); - endpoint_remove(bulk_in); - endpoint_remove(bulk_out); + bool success = set_interface(configuration_set, interface, alternate); + complete_set_interface(success); +} - endpoint_add(int_in, MAX_EP_SIZE, USB_EP_TYPE_INT); - endpoint_add(int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); - read_start(int_out, int_buf, sizeof(int_buf)); - endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); - endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); - read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); +bool USBTester::set_interface(uint16_t configuration, uint16_t interface, uint16_t alternate) +{ + bool success = false; - complete_set_interface(true); - return; - } - if (interface == 0 && alternate == 1) { - endpoint_remove(int_in); - endpoint_remove(int_out); - endpoint_remove(bulk_in); - endpoint_remove(bulk_out); + if (configuration == 1) { + if (interface == 0 && alternate == 0) { + remove_endpoints(); - endpoint_add(int_in, MIN_EP_SIZE, USB_EP_TYPE_INT); - endpoint_add(int_out, MIN_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); - read_start(int_out, int_buf, sizeof(int_buf)); - endpoint_add(bulk_in, MIN_EP_SIZE, USB_EP_TYPE_BULK); - endpoint_add(bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); - read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); + endpoint_add(int_in, MAX_EP_SIZE, USB_EP_TYPE_INT); + endpoint_add(int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); + read_start(int_out, int_buf, sizeof(int_buf)); + endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); + endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); + read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); - complete_set_interface(true); - return; + interface_set = interface; + success = true; + } + if (interface == 0 && alternate == 1) { + remove_endpoints(); + + endpoint_add(int_in, MIN_EP_SIZE, USB_EP_TYPE_INT); + endpoint_add(int_out, MIN_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); + read_start(int_out, int_buf, sizeof(int_buf)); + endpoint_add(bulk_in, MIN_EP_SIZE, USB_EP_TYPE_BULK); + endpoint_add(bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); + read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); + + interface_set = interface; + success = true; + } } - complete_set_interface(false); + return success; } const uint8_t *USBTester::device_desc() diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index b7005c98c0d..4b286b3e971 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -55,8 +55,15 @@ class USBTester: public USBDevice { void clear_resume_count() { resume_count = 0; } private: + + enum { NONE = -1 }; const char *get_desc_string(const uint8_t *desc); virtual void suspend(bool suspended); + void remove_endpoints(); + bool set_configuration(uint16_t configuration); + bool set_interface(uint16_t configuration, uint16_t interface, uint16_t alternate); + int16_t interface_set; + int16_t configuration_set; protected: @@ -107,7 +114,7 @@ class USBTester: public USBDevice { virtual void callback_set_interface(uint16_t interface, uint8_t alternate); virtual void epbulk_out_callback(usb_ep_t endpoint); virtual void epint_out_callback(usb_ep_t endpoint); - virtual void callback_reset() { ++reset_count; } + virtual void callback_reset(); uint8_t ctrl_buf[2048]; }; From 6e340dda84bf81dc1967bd658d2d5737917298ce Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Mon, 16 Apr 2018 10:30:57 +0200 Subject: [PATCH 314/488] USBDevice - add multiconfiguration support --- TESTS/usb_device/basic/USBTester.cpp | 10 +++++++--- TESTS/usb_device/basic/USBTester.h | 3 ++- usb/device/USBDevice/USBDevice.cpp | 29 +++++++++++++++------------- usb/device/USBDevice/USBDevice.h | 6 ++++-- usb/device/USBSerial/USBCDC.cpp | 12 ++++++++---- usb/device/USBSerial/USBCDC.h | 3 ++- 6 files changed, 39 insertions(+), 24 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index 70b89e906b4..a6010c7be30 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -52,7 +52,7 @@ USBTester::USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_r MBED_ASSERT(resolver.valid()); queue = mbed_highprio_event_queue(); - configuration_desc(); + configuration_desc(0); init(); USBDevice::connect(connect_blocking); @@ -321,7 +321,7 @@ const uint8_t *USBTester::string_iproduct_desc() #define CONFIG1_DESC_SIZE (9+9+7+7+7+7 + 9+7+7+7+7) -const uint8_t *USBTester::configuration_desc() +const uint8_t *USBTester::configuration_desc(uint8_t index) { static const uint8_t config_descriptor[] = { // configuration descriptor @@ -434,7 +434,11 @@ const uint8_t *USBTester::configuration_desc() 1 // bInterval }; - return config_descriptor; + if (index == 0) { + return config_descriptor; + } else { + return NULL; + } } diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index 4b286b3e971..332507882e1 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -91,9 +91,10 @@ class USBTester: public USBDevice { /* * Get configuration descriptor * + * @param index descriptor index * @returns pointer to the configuration descriptor */ - virtual const uint8_t *configuration_desc(); + virtual const uint8_t *configuration_desc(uint8_t index); protected: uint8_t bulk_in; diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 611f91b1e1a..d0a915febd0 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -76,22 +76,25 @@ bool USBDevice::_request_get_descriptor() } break; case CONFIGURATION_DESCRIPTOR: - if (configuration_desc() != NULL) { - if ((configuration_desc()[0] == CONFIGURATION_DESCRIPTOR_LENGTH) \ - && (configuration_desc()[1] == CONFIGURATION_DESCRIPTOR)) { + { + const uint8_t idx = DESCRIPTOR_INDEX(_transfer.setup.wValue); + if (configuration_desc(idx) != NULL) { + if ((configuration_desc(idx)[0] == CONFIGURATION_DESCRIPTOR_LENGTH) \ + && (configuration_desc(idx)[1] == CONFIGURATION_DESCRIPTOR)) { #ifdef DEBUG printf("conf descr request\r\n"); #endif /* Get wTotalLength */ - _transfer.remaining = configuration_desc()[2] \ - | (configuration_desc()[3] << 8); + _transfer.remaining = configuration_desc(idx)[2] \ + | (configuration_desc(idx)[3] << 8); - _transfer.ptr = (uint8_t *)configuration_desc(); + _transfer.ptr = (uint8_t *)configuration_desc(idx); _transfer.direction = Send; success = true; } } break; + } case STRING_DESCRIPTOR: #ifdef DEBUG printf("str descriptor\r\n"); @@ -1126,24 +1129,24 @@ void USBDevice::endpoint_unstall(usb_ep_t endpoint) unlock(); } -uint8_t *USBDevice::find_descriptor(uint8_t descriptorType) +uint8_t *USBDevice::find_descriptor(uint8_t descriptorType, uint8_t index) { /* Find a descriptor within the list of descriptors */ /* following a configuration descriptor. */ uint16_t wTotalLength; uint8_t *ptr; - if (configuration_desc() == NULL) { + if (configuration_desc(index) == NULL) { return NULL; } /* Check this is a configuration descriptor */ - if ((configuration_desc()[0] != CONFIGURATION_DESCRIPTOR_LENGTH) \ - || (configuration_desc()[1] != CONFIGURATION_DESCRIPTOR)) { + if ((configuration_desc(index)[0] != CONFIGURATION_DESCRIPTOR_LENGTH) \ + || (configuration_desc(index)[1] != CONFIGURATION_DESCRIPTOR)) { return NULL; } - wTotalLength = configuration_desc()[2] | (configuration_desc()[3] << 8); + wTotalLength = configuration_desc(index)[2] | (configuration_desc(index)[3] << 8); /* Check there are some more descriptors to follow */ if (wTotalLength <= (CONFIGURATION_DESCRIPTOR_LENGTH + 2)) @@ -1153,7 +1156,7 @@ uint8_t *USBDevice::find_descriptor(uint8_t descriptorType) } /* Start at first descriptor after the configuration descriptor */ - ptr = &(((uint8_t *)configuration_desc())[CONFIGURATION_DESCRIPTOR_LENGTH]); + ptr = &(((uint8_t *)configuration_desc(index))[CONFIGURATION_DESCRIPTOR_LENGTH]); do { if (ptr[1] /* bDescriptorType */ == descriptorType) { @@ -1163,7 +1166,7 @@ uint8_t *USBDevice::find_descriptor(uint8_t descriptorType) /* Skip to next descriptor */ ptr += ptr[0]; /* bLength */ - } while (ptr < (configuration_desc() + wTotalLength)); + } while (ptr < (configuration_desc(index) + wTotalLength)); /* Reached end of the descriptors - not found */ return NULL; diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 698591b2e66..5353d50d38f 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -264,9 +264,10 @@ class USBDevice: public USBPhyEvents { /* * Get configuration descriptor * + * @param index descriptor index * @returns pointer to the configuration descriptor */ - virtual const uint8_t *configuration_desc() + virtual const uint8_t *configuration_desc(uint8_t index) { return NULL; }; @@ -465,9 +466,10 @@ class USBDevice: public USBPhyEvents { * Find a descriptor type inside the configuration descriptor * * @param descriptor_type Type of descriptor to find + * @param index Configuration descriptor index ( 0 if only one configuration present ) * @return A descriptor of the given type or NULL if none were found */ - uint8_t *find_descriptor(uint8_t descriptor_type); + uint8_t *find_descriptor(uint8_t descriptor_type, uint8_t index = 0); /** * Get the endpoint table of this device diff --git a/usb/device/USBSerial/USBCDC.cpp b/usb/device/USBSerial/USBCDC.cpp index 519ebe72182..1e5993e7e5d 100644 --- a/usb/device/USBSerial/USBCDC.cpp +++ b/usb/device/USBSerial/USBCDC.cpp @@ -535,7 +535,7 @@ const uint8_t *USBCDC::string_iproduct_desc() #define CONFIG1_DESC_SIZE (9+8+9+5+5+4+5+7+9+7+7) -const uint8_t *USBCDC::configuration_desc() +const uint8_t *USBCDC::configuration_desc(uint8_t index) { uint8_t config_descriptor_temp[] = { // configuration descriptor @@ -635,7 +635,11 @@ const uint8_t *USBCDC::configuration_desc() 0 // bInterval }; - MBED_ASSERT(sizeof(config_descriptor_temp) == sizeof(_config_descriptor)); - memcpy(_config_descriptor, config_descriptor_temp, sizeof(_config_descriptor)); - return _config_descriptor; + if (index == 0) { + MBED_ASSERT(sizeof(config_descriptor_temp) == sizeof(_config_descriptor)); + memcpy(_config_descriptor, config_descriptor_temp, sizeof(_config_descriptor)); + return _config_descriptor; + } else { + return NULL; + } } diff --git a/usb/device/USBSerial/USBCDC.h b/usb/device/USBSerial/USBCDC.h index 1c3c6dc3816..15222bc91a2 100644 --- a/usb/device/USBSerial/USBCDC.h +++ b/usb/device/USBSerial/USBCDC.h @@ -124,9 +124,10 @@ class USBCDC: public USBDevice { /* * Get configuration descriptor * + * @param index descriptor index * @returns pointer to the configuration descriptor */ - virtual const uint8_t *configuration_desc(); + virtual const uint8_t *configuration_desc(uint8_t index); /* * Called by USBCallback_requestCompleted when CDC line coding is changed From 70793d8ebf9dd3828e6b5649e79e41196a00b244 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Mon, 16 Apr 2018 10:35:24 +0200 Subject: [PATCH 315/488] code formatting fixes --- TESTS/usb_device/basic/USBTester.cpp | 10 ++++------ usb/device/USBDevice/USBDevice.cpp | 12 +++++++++++- 2 files changed, 15 insertions(+), 7 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index a6010c7be30..bf700d241d6 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -67,11 +67,11 @@ USBTester::~USBTester() const char *USBTester::get_desc_string(const uint8_t *desc) { - static char ret_string[128] = {}; + static char ret_string[128] = { }; const uint8_t desc_size = desc[0] - 2; const uint8_t *desc_str = &desc[2]; uint32_t j = 0; - for(uint32_t i = 0; i < desc_size; i+=2, j++) { + for (uint32_t i = 0; i < desc_size; i += 2, j++) { ret_string[j] = desc_str[i]; } ret_string[j] = '\0'; @@ -80,7 +80,7 @@ const char *USBTester::get_desc_string(const uint8_t *desc) void USBTester::suspend(bool suspended) { - if(suspended) { + if (suspended) { ++suspend_count; } else { ++resume_count; @@ -146,7 +146,7 @@ void USBTester::callback_request(const setup_packet_t *setup) case VENDOR_TEST_CTRL_OUT: result = Receive; data = ctrl_buf; - size = setup->wValue < 8 ? setup->wValue : 8; + size = setup->wValue < 8 ? setup->wValue : 8; break; case VENDOR_TEST_CTRL_NONE: result = Success; @@ -176,8 +176,6 @@ void USBTester::callback_request(const setup_packet_t *setup) } else { complete_request(result, data, size); } - - } void USBTester::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index d0a915febd0..3b69734e847 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -62,6 +62,7 @@ bool USBDevice::_request_get_descriptor() #endif switch (DESCRIPTOR_TYPE(_transfer.setup.wValue)) { case DEVICE_DESCRIPTOR: + { if (device_desc() != NULL) { if ((device_desc()[0] == DEVICE_DESCRIPTOR_LENGTH) \ && (device_desc()[1] == DEVICE_DESCRIPTOR)) { @@ -75,6 +76,7 @@ bool USBDevice::_request_get_descriptor() } } break; + } case CONFIGURATION_DESCRIPTOR: { const uint8_t idx = DESCRIPTOR_INDEX(_transfer.setup.wValue); @@ -96,6 +98,7 @@ bool USBDevice::_request_get_descriptor() break; } case STRING_DESCRIPTOR: + { #ifdef DEBUG printf("str descriptor\r\n"); #endif @@ -156,21 +159,29 @@ bool USBDevice::_request_get_descriptor() break; } break; + } case INTERFACE_DESCRIPTOR: + { #ifdef DEBUG printf("interface descr\r\n"); #endif + break; + } case ENDPOINT_DESCRIPTOR: + { #ifdef DEBUG printf("endpoint descr\r\n"); #endif /* TODO: Support is optional, not implemented here */ break; + } default: + { #ifdef DEBUG printf("ERROR\r\n"); #endif break; + } } return success; @@ -406,7 +417,6 @@ void USBDevice::_complete_set_configuration() _phy->ep0_stall(); return; } - } bool USBDevice::_request_get_configuration() From 564a33149bd35648a7fe89a37d5cc4022b46e408 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 19 Apr 2018 09:55:07 -0500 Subject: [PATCH 316/488] Add endpoint_remove_all helper function Add the helper function endpoint_remove_all which removes all added endpoints. This is useful for class drivers switching between different USB configurations. --- usb/device/USBDevice/USBDevice.cpp | 15 +++++++++++++++ usb/device/USBDevice/USBDevice.h | 5 +++++ 2 files changed, 20 insertions(+) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 3b69734e847..393c51133d3 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -36,6 +36,7 @@ /* Endpoint macros */ #define EP_INDEXABLE(endpoint) (EP_VALID(endpoint) && !EP_CONTROL(endpoint)) #define EP_TO_INDEX(endpoint) ((((endpoint & 0xf) << 1) | (endpoint & 0x80 ? 1 : 0)) - 2) +#define INDEX_TO_EP(index) ((usb_ep_t)((((index) >> 1) | (index & 1 ? 0x80 : 0)) + 1)) #define EP_VALID(endpoint) (((endpoint) & ~0x8F) == 0) #define EP_CONTROL(endpoint) (((endpoint) & 0xF) == 0) #define EP_RX(endpoint) ((endpoint) & 0x80) @@ -1101,6 +1102,20 @@ void USBDevice::endpoint_remove(usb_ep_t endpoint) unlock(); } +void USBDevice::endpoint_remove_all() +{ + lock(); + + for (uint32_t i = 0; i < sizeof(_endpoint_info) / sizeof(_endpoint_info[0]); i++) { + endpoint_info_t *info = _endpoint_info + i; + if (info->flags & ENDPOINT_ENABLED) { + endpoint_remove(INDEX_TO_EP(i)); + } + } + + unlock(); +} + void USBDevice::endpoint_stall(usb_ep_t endpoint) { lock(); diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 5353d50d38f..91bb7513363 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -175,6 +175,11 @@ class USBDevice: public USBPhyEvents { */ void endpoint_remove(usb_ep_t endpoint); + /** + * Remove all non-zero endpoints + */ + void endpoint_remove_all(); + /** * Stall an endpoint * From 2cae132127dea4215e72fffa4d1d974a5baac177 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Mon, 23 Apr 2018 11:54:50 +0200 Subject: [PATCH 317/488] USBDevice: endpoint_add/read_start functions return value fix --- usb/device/USBDevice/USBDevice.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 393c51133d3..fdc49a83eac 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -1063,8 +1063,8 @@ bool USBDevice::endpoint_add(usb_ep_t endpoint, uint32_t max_packet_size, usb_ep MBED_ASSERT(!(info->flags & ENDPOINT_ENABLED)); MBED_ASSERT(max_packet_size <= 1024); - bool ret = false; - if (_phy->endpoint_add(endpoint, max_packet_size, type)) { + bool ret = _phy->endpoint_add(endpoint, max_packet_size, type); + if (ret) { info->callback = callback; info->flags |= ENDPOINT_ENABLED; info->pending = 0; @@ -1366,7 +1366,7 @@ bool USBDevice::read_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size unlock(); - return true; + return ret; } uint32_t USBDevice::read_finish(usb_ep_t endpoint) From 71b72e4b73876d144a68148d08d344be03350790 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sun, 22 Apr 2018 22:14:47 -0500 Subject: [PATCH 318/488] Prevent Kinetis USB setup packets at wrong time When disconnecting USB clear all pending interrupts. This ensures that pending setup packets are dropped rather than being triggered after disconnect. --- usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp index 84c50d94b6c..89fca0f81c4 100644 --- a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp +++ b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp @@ -203,6 +203,10 @@ void USBPhyHw::disconnect() USB0->CTL &= ~USB_CTL_USBENSOFEN_MASK; // Pull up disable USB0->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK; + + while (USB0->ISTAT) { + USB0->ISTAT = 0xFF; + } } void USBPhyHw::configure() From 9f79e889a38b1480bfda0cf33d6d6050d2ee1052 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 23 Apr 2018 17:58:05 -0500 Subject: [PATCH 319/488] Fix Kinetis USB disconnect When disconnecting in the middle of a setup packet USB stops working even after being re-connected. This is because the setup packet suspended endpoint events but nothing resumed endpoint events. This patch adds code to resume endpoint events in the reset handler. --- usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp index 89fca0f81c4..c8a55e1a667 100644 --- a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp +++ b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp @@ -565,6 +565,7 @@ void USBPhyHw::process() Data1 = 0x55555555; USB0->CTL |= USB_CTL_ODDRST_MASK; + USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; USB0->ISTAT = 0xFF; // clear all interrupt status flags USB0->ERRSTAT = 0xFF; // clear all error flags From ccf3f45fd8329b0e5190d828e8537272a4f86328 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 23 Apr 2018 18:03:34 -0500 Subject: [PATCH 320/488] Make USB disconnect + connect time explicit Create the define MIN_DISCONNECT_TIME_US to be used as the amount of time that must pass between connect and disconnect for the host to reliably detect reconnection. Replace the wait calls delaying for this value to wait_us to indicate the precision required. Finally, remove the unnecessary calls to wait_ms in repeated_construction_destruction_test. --- TESTS/usb_device/basic/main.cpp | 34 +++++++++++++++------------------ 1 file changed, 15 insertions(+), 19 deletions(-) diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index 105913392e2..f18168013a9 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -23,6 +23,12 @@ #include "USBTester.h" +// If disconnect() + connect() occur too fast the reset event will be dropped. +// At a minimum there should be a 200us delay between disconnect and connect. +// To be on the safe side I would recommend a 1ms delay, so the host controller +// has an entire USB frame to detect the disconnect. +#define MIN_DISCONNECT_TIME_US 1000 + #if !defined(DEVICE_USBDEVICE) || !DEVICE_USBDEVICE #error [NOT_SUPPORTED] USB Device not supported for this target #endif @@ -166,11 +172,7 @@ void device_soft_reconnection_test() for(int i = 0; i < reconnect_try_count; i++) { serial.disconnect(); - // If disconnect() + connect() occur too fast the reset event will be dropped. - // At a minimum there should be a 200us delay between disconnect and connect. - // To be on the safe side I would recommend a 1ms delay, so the host controller - // has an entire USB frame to detect the disconnect. - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); serial.connect(); greentea_send_kv("device_soft_reconnection_test", serial.get_serial_desc_string()); // Wait for host before terminating @@ -179,13 +181,13 @@ void device_soft_reconnection_test() } serial.disconnect(); - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); serial.connect(); serial.disconnect(); - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); serial.connect(); serial.disconnect(); - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); serial.connect(); greentea_send_kv("device_soft_reconnection_test", serial.get_serial_desc_string()); // Wait for host before terminating @@ -228,50 +230,44 @@ void repeated_construction_destruction_test() { USBTester serial(vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); - wait_ms(1); } - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); { USBTester serial(vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); - wait_ms(1); } - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); { USBTester serial(vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); - wait_ms(1); } - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); { USBTester serial(vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); - wait_ms(1); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); TEST_ASSERT_EQUAL_STRING("pass", _key); } - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); { USBTester serial(vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); - wait_ms(1); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); TEST_ASSERT_EQUAL_STRING("pass", _key); } - wait_ms(1); + wait_us(MIN_DISCONNECT_TIME_US); { USBTester serial(vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); - wait_ms(1); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); From b90f1f161cf078ffdc646153df6b260a99cefc7c Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 23 Apr 2018 18:50:28 -0500 Subject: [PATCH 321/488] Explicitly specify USBPhy used for testing Add a parameter to the USBPhy class so mock or wrapper USBPhy classes can be used. --- TESTS/usb_device/basic/USBTester.cpp | 4 ++-- TESTS/usb_device/basic/USBTester.h | 2 +- TESTS/usb_device/basic/main.cpp | 32 +++++++++++++++++----------- 3 files changed, 22 insertions(+), 16 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index bf700d241d6..8ca9b11c248 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -37,8 +37,8 @@ #define MIN_EP_SIZE 8 -USBTester::USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): - USBDevice(vendor_id, product_id, product_release), reset_count(0), suspend_count(0), +USBTester::USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): + USBDevice(phy, vendor_id, product_id, product_release), reset_count(0), suspend_count(0), resume_count(0), interface_set(NONE), configuration_set(NONE) { diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index 332507882e1..d6c534ddc74 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -36,7 +36,7 @@ class USBTester: public USBDevice { * @param product_release Your preoduct_release * @param connect_blocking define if the connection must be blocked if USB not plugged in */ - USBTester(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); + USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); ~USBTester(); diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index f18168013a9..8ccd4c5e4e7 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -22,6 +22,7 @@ #include "utest/utest.h" #include "USBTester.h" +#include "usb_phy_api.h" // If disconnect() + connect() occur too fast the reset event will be dropped. // At a minimum there should be a 200us delay between disconnect and connect. @@ -35,6 +36,11 @@ using namespace utest::v1; +static USBPhy *get_phy() +{ + return get_usb_phy(); +} + void control_basic_test() { uint16_t vendor_id = 0x0d28; @@ -45,7 +51,7 @@ void control_basic_test() char str[128] = {}; { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); sprintf (str, "%s %d %d", serial.get_serial_desc_string(), vendor_id, product_id); greentea_send_kv("control_basic_test", str); // Wait for host before terminating @@ -63,7 +69,7 @@ void control_stall_test() char _value[128] = {}; { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); greentea_send_kv("control_stall_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); @@ -80,7 +86,7 @@ void control_sizes_test() char _value[128] = {}; { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); greentea_send_kv("control_sizes_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); @@ -97,7 +103,7 @@ void control_stress_test() char _value[128] = {}; { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); greentea_send_kv("control_stress_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); @@ -117,7 +123,7 @@ void device_reset_test() greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); if (strcmp(_value, "false") != 0) { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); serial.clear_reset_count(); greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); while(serial.get_reset_count() == 0); @@ -163,7 +169,7 @@ void device_soft_reconnection_test() const uint32_t reconnect_try_count = 3; { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); greentea_send_kv("device_soft_reconnection_test", serial.get_serial_desc_string()); // Wait for host before terminating @@ -205,7 +211,7 @@ void device_suspend_resume_test() char _value[128] = {}; { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); greentea_send_kv("device_suspend_resume_test", serial.get_serial_desc_string()); printf("[1] suspend_count: %d resume_count: %d\n", serial.get_suspend_count(), serial.get_resume_count()); serial.clear_suspend_count(); @@ -228,25 +234,25 @@ void repeated_construction_destruction_test() char _value[128] = {}; { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); } wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); } wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); } wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating @@ -256,7 +262,7 @@ void repeated_construction_destruction_test() wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating @@ -266,7 +272,7 @@ void repeated_construction_destruction_test() wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release, true); TEST_ASSERT_EQUAL(true, serial.configured()); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating From 02c441e33919d9abd36fb8221ec2a3e5da3aac9b Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Wed, 25 Apr 2018 15:15:40 +0200 Subject: [PATCH 322/488] Extend USB test class configuration --- TESTS/usb_device/basic/USBTester.cpp | 422 +++++++++++++++++++++------ TESTS/usb_device/basic/USBTester.h | 9 +- 2 files changed, 338 insertions(+), 93 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index 8ca9b11c248..24ca3df704c 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -21,6 +21,7 @@ #include "EndpointResolver.h" #define DEFAULT_CONFIGURATION (1) +#define LAST_CONFIGURATION (2) #define VENDOR_TEST_CTRL_IN 1 #define VENDOR_TEST_CTRL_OUT 2 @@ -39,7 +40,7 @@ USBTester::USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): USBDevice(phy, vendor_id, product_id, product_release), reset_count(0), suspend_count(0), - resume_count(0), interface_set(NONE), configuration_set(NONE) + resume_count(0), interface_0_alt_set(NONE), interface_1_alt_set(NONE), configuration_set(NONE) { EndpointResolver resolver(endpoint_table()); @@ -87,16 +88,6 @@ void USBTester::suspend(bool suspended) } } -void USBTester::remove_endpoints() -{ - if(configuration_set == 1) { - endpoint_remove(int_in); - endpoint_remove(int_out); - endpoint_remove(bulk_in); - endpoint_remove(bulk_out); - } -} - const char *USBTester::get_serial_desc_string() { return get_desc_string(string_iserial_desc()); @@ -112,13 +103,12 @@ const char *USBTester::get_iproduct_desc_string() return get_desc_string(string_iserial_desc()); } - - void USBTester::callback_state_change(DeviceState new_state) { if (new_state != Configured) { configuration_set = NONE; - interface_set = NONE; + interface_0_alt_set = NONE; + interface_1_alt_set = NONE; } } @@ -205,7 +195,7 @@ void USBTester::callback_request_xfer_done(const setup_packet_t *setup, bool abo break; } } - complete_request_xfer_done(true); + complete_request_xfer_done(result); } // Called in ISR context @@ -213,58 +203,146 @@ void USBTester::callback_request_xfer_done(const setup_packet_t *setup, bool abo // configuration is not supported. void USBTester::callback_set_configuration(uint8_t configuration) { - if (configuration == DEFAULT_CONFIGURATION) { - complete_set_configuration(set_configuration(configuration)); - } else { - complete_set_configuration(false); + bool ret = false; + + if (configuration >= DEFAULT_CONFIGURATION && configuration <= LAST_CONFIGURATION) { + endpoint_remove_all(); + ret = set_configuration(configuration); + } + + complete_set_configuration(ret); +} + +bool USBTester::setup_iterface(uint8_t ep_in, uint8_t ep_out, uint32_t ep_size, usb_ep_type_t ep_type, + uint8_t *buf, uint32_t buf_size, void (USBTester::*callback)(usb_ep_t endpoint)) +{ + bool success = false; + + success = endpoint_add(ep_in, ep_size, ep_type); + success &= endpoint_add(ep_out, ep_size, ep_type, callback); + success &= read_start(ep_out, buf, buf_size); + return success; +} + +void USBTester::remove_iterface(uint16_t interface) +{ + if (configuration_set == 1) { + if (interface == 0) { + endpoint_remove(bulk_in); + endpoint_remove(bulk_out); + interface_0_alt_set = NONE; + } + if (interface == 1) { + endpoint_remove(int_in); + endpoint_remove(int_out); + interface_1_alt_set = NONE; + } + } + if (configuration_set == 2) { + if (interface == 0) { + endpoint_remove(int_in); + endpoint_remove(int_out); + interface_0_alt_set = NONE; + } + if (interface == 1) { + endpoint_remove(bulk_in); + endpoint_remove(bulk_out); + interface_1_alt_set = NONE; + } } } bool USBTester::set_configuration(uint16_t configuration) { - if(set_interface(configuration, 0, 0)) { + bool success = false; + // set 0 alt setting for each interface + if (configuration == 1) { + // interface 0 alternate 0 + success = setup_iterface(bulk_in, bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, + bulk_buf, sizeof(bulk_buf), &USBTester::epbulk_out_callback); + // interface 1 alternate 0 + success &= setup_iterface(int_in, int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, + int_buf, sizeof(int_buf), &USBTester::epint_out_callback); + } else if (configuration == 2) { + // interface 0 alternate 0 + success = setup_iterface(int_in, int_out, MIN_EP_SIZE, USB_EP_TYPE_INT, + int_buf, sizeof(int_buf), &USBTester::epint_out_callback); + // interface 1 alternate 0 + success &= setup_iterface(bulk_in, bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, + bulk_buf, sizeof(bulk_buf), &USBTester::epbulk_out_callback); + } + if (success) { configuration_set = configuration; - return true; + interface_0_alt_set = interface_1_alt_set = 0; } - return false; + return success; } void USBTester::callback_set_interface(uint16_t interface, uint8_t alternate) { - bool success = set_interface(configuration_set, interface, alternate); - complete_set_interface(success); + complete_set_interface(set_interface(interface, alternate)); } -bool USBTester::set_interface(uint16_t configuration, uint16_t interface, uint16_t alternate) +bool USBTester::set_interface(uint16_t interface, uint16_t alternate) { bool success = false; - if (configuration == 1) { - if (interface == 0 && alternate == 0) { - remove_endpoints(); - - endpoint_add(int_in, MAX_EP_SIZE, USB_EP_TYPE_INT); - endpoint_add(int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); - read_start(int_out, int_buf, sizeof(int_buf)); - endpoint_add(bulk_in, MAX_EP_SIZE, USB_EP_TYPE_BULK); - endpoint_add(bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); - read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); - - interface_set = interface; - success = true; + if (interface == 0) { + if (configuration_set == 1) { + if (alternate == 0) { + remove_iterface(interface); + success = setup_iterface(bulk_in, bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, + bulk_buf, sizeof(bulk_buf), &USBTester::epbulk_out_callback); + } + if (alternate == 1) { + remove_iterface(interface); + success = setup_iterface(bulk_in, bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, + bulk_buf, sizeof(bulk_buf), &USBTester::epbulk_out_callback); + } + } + if (configuration_set == 2) { + if (alternate == 0) { + remove_iterface(interface); + success = setup_iterface(int_in, int_out, MIN_EP_SIZE, USB_EP_TYPE_INT, + int_buf, sizeof(int_buf), &USBTester::epint_out_callback); + } + if (alternate == 1) { + remove_iterface(interface); + success = setup_iterface(int_in, int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, + int_buf, sizeof(int_buf), &USBTester::epint_out_callback); + } + } + if (success) { + interface_0_alt_set = alternate; + } + } + if (interface == 1) { + if (configuration_set == 1) { + if (alternate == 0) { + remove_iterface(interface); + success = setup_iterface(int_in, int_out, MAX_EP_SIZE, USB_EP_TYPE_INT, + int_buf, sizeof(int_buf), &USBTester::epint_out_callback); + } + if (alternate == 1) { + remove_iterface(interface); + success = setup_iterface(int_in, int_out, MIN_EP_SIZE, USB_EP_TYPE_INT, + int_buf, sizeof(int_buf), &USBTester::epint_out_callback); + } } - if (interface == 0 && alternate == 1) { - remove_endpoints(); - - endpoint_add(int_in, MIN_EP_SIZE, USB_EP_TYPE_INT); - endpoint_add(int_out, MIN_EP_SIZE, USB_EP_TYPE_INT, &USBTester::epint_out_callback); - read_start(int_out, int_buf, sizeof(int_buf)); - endpoint_add(bulk_in, MIN_EP_SIZE, USB_EP_TYPE_BULK); - endpoint_add(bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, &USBTester::epbulk_out_callback); - read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); - - interface_set = interface; - success = true; + if (configuration_set == 2) { + if (alternate == 0) { + remove_iterface(interface); + success = setup_iterface(bulk_in, bulk_out, MIN_EP_SIZE, USB_EP_TYPE_BULK, + bulk_buf, sizeof(bulk_buf), &USBTester::epbulk_out_callback); + } + if (alternate == 1) { + remove_iterface(interface); + success = setup_iterface(bulk_in, bulk_out, MAX_EP_SIZE, USB_EP_TYPE_BULK, + bulk_buf, sizeof(bulk_buf), &USBTester::epbulk_out_callback); + } + } + if (success) { + interface_1_alt_set = alternate; } } return success; @@ -287,7 +365,7 @@ const uint8_t *USBTester::device_desc() 1, // iManufacturer 2, // iProduct 3, // iSerialNumber - 1 // bNumConfigurations + 2 // bNumConfigurations }; MBED_ASSERT(sizeof(device_descriptor_temp) == sizeof(device_descriptor)); memcpy(device_descriptor, device_descriptor_temp, sizeof(device_descriptor)); @@ -317,30 +395,31 @@ const uint8_t *USBTester::string_iproduct_desc() } -#define CONFIG1_DESC_SIZE (9+9+7+7+7+7 + 9+7+7+7+7) +#define CONFIG_1_DESC_SIZE (9+9+7+7 + 9+7+7 + 9+7+7 + 9+7+7) +#define CONFIG_2_DESC_SIZE (9+9+7+7 + 9+7+7 + 9+7+7 + 9+7+7) const uint8_t *USBTester::configuration_desc(uint8_t index) { - static const uint8_t config_descriptor[] = { + static const uint8_t config_1_descriptor[] = { // configuration descriptor - 9, // bLength - 2, // bDescriptorType - LSB(CONFIG1_DESC_SIZE), // wTotalLength - MSB(CONFIG1_DESC_SIZE), - 1, // bNumInterfaces - 1, // bConfigurationValue - 0, // iConfiguration - 0x80, // bmAttributes - 50, // bMaxPower + CONFIGURATION_DESCRIPTOR_LENGTH,// bLength + CONFIGURATION_DESCRIPTOR, // bDescriptorType + LSB(CONFIG_1_DESC_SIZE), // wTotalLength + MSB(CONFIG_1_DESC_SIZE), + 2, // bNumInterfaces + 1, // bConfigurationValue + 0, // iConfiguration + 0x80, // bmAttributes + 50, // bMaxPower // Interface 0 setting 0 // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 - 9, // bLength - 4, // bDescriptorType + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType 0, // bInterfaceNumber 0, // bAlternateSetting - 4, // bNumEndpoints + 2, // bNumEndpoints 0xFF, // bInterfaceClass 0xFF, // bInterfaceSubClass 0xFF, // bInterfaceProtocol @@ -351,26 +430,70 @@ const uint8_t *USBTester::configuration_desc(uint8_t index) ENDPOINT_DESCRIPTOR, // bDescriptorType bulk_in, // bEndpointAddress E_BULK, // bmAttributes (0x02=bulk) - LSB(MAX_EP_SIZE),// wMaxPacketSize (LSB) - MSB(MAX_EP_SIZE),// wMaxPacketSize (MSB) - 0, // bInterval + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType bulk_out, // bEndpointAddress E_BULK, // bmAttributes (0x02=bulk) - LSB(MAX_EP_SIZE),// wMaxPacketSize (LSB) - MSB(MAX_EP_SIZE),// wMaxPacketSize (MSB) - 0, // bInterval + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // Interface 0 setting 1 + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0, // bInterfaceNumber + 1, // bAlternateSetting + 2, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_in, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_out, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // Interface 1 setting 0 + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 1, // bInterfaceNumber + 0, // bAlternateSetting + 2, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType int_in, // bEndpointAddress E_INTERRUPT, // bmAttributes (0x03=interrupt) - LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) - MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) 1, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 @@ -378,18 +501,18 @@ const uint8_t *USBTester::configuration_desc(uint8_t index) ENDPOINT_DESCRIPTOR, // bDescriptorType int_out, // bEndpointAddress E_INTERRUPT, // bmAttributes (0x03=interrupt) - LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) - MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) 1, // bInterval - // Interface 0 setting 1 + // Interface 1 setting 1 // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 - 9, // bLength - 4, // bDescriptorType - 0, // bInterfaceNumber + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 1, // bInterfaceNumber 1, // bAlternateSetting - 4, // bNumEndpoints + 2, // bNumEndpoints 0xFF, // bInterfaceClass 0xFF, // bInterfaceSubClass 0xFF, // bInterfaceProtocol @@ -398,20 +521,46 @@ const uint8_t *USBTester::configuration_desc(uint8_t index) // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType - bulk_in, // bEndpointAddress - E_BULK, // bmAttributes (0x02=bulk) + int_in, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=interrupt) LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) - 0, // bInterval + 1, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType - bulk_out, // bEndpointAddress - E_BULK, // bmAttributes (0x02=bulk) + int_out, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=interrupt) LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) - 0, // bInterval + 1 // bInterval + }; + + static const uint8_t config_2_descriptor[] = { + // configuration descriptor + CONFIGURATION_DESCRIPTOR_LENGTH,// bLength + CONFIGURATION_DESCRIPTOR, // bDescriptorType + LSB(CONFIG_2_DESC_SIZE), // wTotalLength + MSB(CONFIG_2_DESC_SIZE), + 2, // bNumInterfaces + 2, // bConfigurationValue + 0, // iConfiguration + 0x80, // bmAttributes + 50, // bMaxPower + + // Interface 0 setting 0 + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0, // bInterfaceNumber + 0, // bAlternateSetting + 2, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength @@ -429,17 +578,111 @@ const uint8_t *USBTester::configuration_desc(uint8_t index) E_INTERRUPT, // bmAttributes (0x03=interrupt) LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) - 1 // bInterval + 1, // bInterval + + // Interface 0 setting 1 + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0, // bInterfaceNumber + 1, // bAlternateSetting + 2, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + int_in, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=interrupt) + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + int_out, // bEndpointAddress + E_INTERRUPT, // bmAttributes (0x03=interrupt) + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // Interface 1 setting 0 + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 1, // bInterfaceNumber + 0, // bAlternateSetting + 2, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_in, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_out, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MIN_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MIN_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // Interface 1 setting 1 + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 1, // bInterfaceNumber + 1, // bAlternateSetting + 2, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_in, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + bulk_out, // bEndpointAddress + E_BULK, // bmAttributes (0x02=bulk) + LSB(MAX_EP_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_EP_SIZE), // wMaxPacketSize (MSB) + 1 // bInterval }; + if (index == 0) { - return config_descriptor; + return config_1_descriptor; + } else if (index == 1) { + return config_2_descriptor; } else { return NULL; } } - void USBTester::epint_out_callback(usb_ep_t endpoint) { read_finish(endpoint); @@ -450,4 +693,3 @@ void USBTester::epbulk_out_callback(usb_ep_t endpoint) read_finish(endpoint); read_start(endpoint, bulk_buf, sizeof(bulk_buf)); } - diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index d6c534ddc74..9faca7f5677 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -59,10 +59,13 @@ class USBTester: public USBDevice { enum { NONE = -1 }; const char *get_desc_string(const uint8_t *desc); virtual void suspend(bool suspended); - void remove_endpoints(); bool set_configuration(uint16_t configuration); - bool set_interface(uint16_t configuration, uint16_t interface, uint16_t alternate); - int16_t interface_set; + bool set_interface(uint16_t interface, uint16_t alternate); + bool setup_iterface(uint8_t ep_in, uint8_t ep_out, uint32_t ep_size, usb_ep_type_t ep_type, + uint8_t *buf, uint32_t buf_size, void (USBTester::*callback)(usb_ep_t endpoint)); + void remove_iterface(uint16_t interface); + int16_t interface_0_alt_set; + int16_t interface_1_alt_set; int16_t configuration_set; protected: From 56f384562a2950f43d2f581ccb5a34425676fd75 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Thu, 26 Apr 2018 15:18:57 +0200 Subject: [PATCH 323/488] pyusb_basic test formatting fixes --- TESTS/host_tests/pyusb_basic.py | 300 ++++++++++++++++---------------- 1 file changed, 154 insertions(+), 146 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index c361cbee03c..1b7b401f87b 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -55,17 +55,17 @@ def get_interface(dev, interface, alternate=0): VENDOR_TEST_CTRL_OUT_SIZES = 10 VENDOR_TEST_UNSUPPORTED_REQUEST = 32 -REQUEST_GET_STATUS = 0 # done -REQUEST_CLEAR_FEATURE = 1 # done -REQUEST_SET_FEATURE = 3 # done -REQUEST_SET_ADDRESS = 5 # ??? +REQUEST_GET_STATUS = 0 +REQUEST_CLEAR_FEATURE = 1 +REQUEST_SET_FEATURE = 3 +REQUEST_SET_ADDRESS = 5 REQUEST_GET_DESCRIPTOR = 6 -REQUEST_SET_DESCRIPTOR = 7 # done -REQUEST_GET_CONFIGURATION = 8 # done -REQUEST_SET_CONFIGURATION = 9 # done -REQUEST_GET_INTERFACE = 10 # done -REQUEST_SET_INTERFACE = 11 # done -REQUEST_SYNCH_FRAME = 12 # almost done +REQUEST_SET_DESCRIPTOR = 7 +REQUEST_GET_CONFIGURATION = 8 +REQUEST_SET_CONFIGURATION = 9 +REQUEST_GET_INTERFACE = 10 +REQUEST_SET_INTERFACE = 11 +REQUEST_SYNCH_FRAME = 12 FEATURE_ENDPOINT_HALT = 0 FEATURE_DEVICE_REMOTE_WAKEUP = 1 @@ -269,9 +269,11 @@ def setup(self): self.register_callback('reset_support', self._callback_reset_support) + def result(self): return self.__result + def teardown(self): pass @@ -292,150 +294,18 @@ def lineno(): """Returns the current line number in our program.""" return inspect.currentframe().f_back.f_lineno + def raise_if_different(expected, actual, line, text=''): """Raise a RuntimeError if actual is different than expected.""" if expected != actual: raise RuntimeError('[{}]:{}, {} Got {!r}, expected {!r}'.format(__file__, line, text, actual, expected)) + def raise_unconditionally(line, text=''): """Raise a RuntimeError unconditionally.""" raise RuntimeError('[{}]:{}, {}'.format(__file__, line, text)) -def test_device(serial_number, log=print): - dev = usb.core.find(custom_match=TestMatch(serial_number)) - if dev is None: - log("Device not found") - return - - ## --Control Tests-- ## - #control_basic_test(dev, log) - # Test control IN/OUT/NODATA - control_stall_test(dev, log) - # Invalid control in/out/nodata requests are stalled - # Stall during different points in the control transfer - #control_sizes_test(dev, log) - # Test control requests of various data stage sizes (1,8,16,32,64,255,256,...) - control_stress_test(dev, log) - # normal and delay mode - - ## --Endpoint test-- ## - #for each endpoint - #-test all allowed wMaxPacketSize sizes and transfer types - #-stall tests - #-set/clear stall control request - #-stall at random points of sending/receiveing data - #-test aborting an in progress transfer - #test as many endpoints at once as possible - #test biggest configuration possible - - ## --physical test-- ## - #-reset notification/handling - #-connect/disconnect tests - have device disconnect and then reconnect - #-disconnect during various phases of control transfers and endpoint transfers - #-suspend/resume tests (may not be possible to test with current framework) - #-suspend/resume notifications - - ## -- Stress tests-- ## - #-concurrent tests (all endpoints at once including control) - #-concurrent tests + reset + delay - - ## -- other tests-- ## - #-report throughput for in/out of control, bulk, interrupt and iso transfers - #-verify that construction/destruction repeatedly works gracefully - - intf = get_interface(dev, 0, 0) - - # Find endpoints - bulk_in = None - bulk_out = None - int_in = None - int_out = None - - for endpoint in intf: - log("Processing endpoint %s" % endpoint) - ep_type = endpoint.bmAttributes & 0x3 - if ep_type == 2: - if endpoint.bEndpointAddress & 0x80: - assert bulk_in is None - bulk_in = endpoint - else: - assert bulk_out is None - bulk_out = endpoint - elif ep_type == 3: - if endpoint.bEndpointAddress & 0x80: - assert int_in is None - int_in = endpoint - else: - assert int_out is None - int_out = endpoint - assert bulk_in is not None - assert bulk_out is not None - assert int_in is not None - assert int_out is not None - bulk_out.write("hello" + "x" *256); - int_out.write("world" + "x" *256); - - dev.set_interface_altsetting(0, 1) - - intf = get_interface(dev, 0, 0) - - # Find endpoints - bulk_in = None - bulk_out = None - int_in = None - int_out = None - - for endpoint in intf: - log("Processing endpoint %s" % endpoint) - ep_type = endpoint.bmAttributes & 0x3 - if ep_type == 2: - if endpoint.bEndpointAddress & 0x80: - assert bulk_in is None - bulk_in = endpoint - else: - assert bulk_out is None - bulk_out = endpoint - elif ep_type == 3: - if endpoint.bEndpointAddress & 0x80: - assert int_in is None - int_in = endpoint - else: - assert int_out is None - int_out = endpoint - assert bulk_in is not None - assert bulk_out is not None - assert int_in is not None - assert int_out is not None - bulk_out.write("hello2" + "x" *256); - int_out.write("world2" + "x" *256); - - - t = Thread(target=write_data, args=(bulk_out,)) - t.start() - - for _ in range(10): - request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, - CTRL_RECIPIENT_DEVICE) - request = VENDOR_TEST_CTRL_NONE_DELAY - value = 0 # Always 0 for this request - index = 0 # Communication interface - length = 0 # No data - dev.ctrl_transfer(request_type, request, value, index, length, 5000) - - t.join() - - -def write_data(pipe): - print("Write data running") - count = 0 - for _ in range(40): - pipe.write("Value is %s" % count) - count += 1 - print("Count %s" % count) - time.sleep(0.5) - - def control_basic_test(dev, vendor_id, product_id, log): get_status_test(dev, log) set_clear_feature_test(dev, log) @@ -915,7 +785,6 @@ def control_data_test(dev, sizes_list, log): def control_stress_test(dev, log): - # Test various patterns of control transfers # # Some devices have had problems with back-to-back @@ -1025,6 +894,145 @@ def repeated_construction_destruction_test(log): yield +""" +For documentation purpose until test writing finished +TODO: remove this if not needed anymore + + +def test_device(serial_number, log=print): + dev = usb.core.find(custom_match=TestMatch(serial_number)) + if dev is None: + log("Device not found") + return + + ## --Control Tests-- ## + #control_basic_test(dev, log) + # Test control IN/OUT/NODATA + control_stall_test(dev, log) + # Invalid control in/out/nodata requests are stalled + # Stall during different points in the control transfer + #control_sizes_test(dev, log) + # Test control requests of various data stage sizes (1,8,16,32,64,255,256,...) + control_stress_test(dev, log) + # normal and delay mode + + ## --Endpoint test-- ## + #for each endpoint + #-test all allowed wMaxPacketSize sizes and transfer types + #-stall tests + #-set/clear stall control request + #-stall at random points of sending/receiveing data + #-test aborting an in progress transfer + #test as many endpoints at once as possible + #test biggest configuration possible + + ## --physical test-- ## + #-reset notification/handling + #-connect/disconnect tests - have device disconnect and then reconnect + #-disconnect during various phases of control transfers and endpoint transfers + #-suspend/resume tests (may not be possible to test with current framework) + #-suspend/resume notifications + + ## -- Stress tests-- ## + #-concurrent tests (all endpoints at once including control) + #-concurrent tests + reset + delay + + ## -- other tests-- ## + #-report throughput for in/out of control, bulk, interrupt and iso transfers + #-verify that construction/destruction repeatedly works gracefully + + intf = get_interface(dev, 0, 0) + + # Find endpoints + bulk_in = None + bulk_out = None + int_in = None + int_out = None + + for endpoint in intf: + log("Processing endpoint %s" % endpoint) + ep_type = endpoint.bmAttributes & 0x3 + if ep_type == 2: + if endpoint.bEndpointAddress & 0x80: + assert bulk_in is None + bulk_in = endpoint + else: + assert bulk_out is None + bulk_out = endpoint + elif ep_type == 3: + if endpoint.bEndpointAddress & 0x80: + assert int_in is None + int_in = endpoint + else: + assert int_out is None + int_out = endpoint + assert bulk_in is not None + assert bulk_out is not None + assert int_in is not None + assert int_out is not None + bulk_out.write("hello" + "x" *256); + int_out.write("world" + "x" *256); + + dev.set_interface_altsetting(0, 1) + + intf = get_interface(dev, 0, 0) + + # Find endpoints + bulk_in = None + bulk_out = None + int_in = None + int_out = None + + for endpoint in intf: + log("Processing endpoint %s" % endpoint) + ep_type = endpoint.bmAttributes & 0x3 + if ep_type == 2: + if endpoint.bEndpointAddress & 0x80: + assert bulk_in is None + bulk_in = endpoint + else: + assert bulk_out is None + bulk_out = endpoint + elif ep_type == 3: + if endpoint.bEndpointAddress & 0x80: + assert int_in is None + int_in = endpoint + else: + assert int_out is None + int_out = endpoint + assert bulk_in is not None + assert bulk_out is not None + assert int_in is not None + assert int_out is not None + bulk_out.write("hello2" + "x" *256); + int_out.write("world2" + "x" *256); + + + t = Thread(target=write_data, args=(bulk_out,)) + t.start() + + for _ in range(10): + request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, + CTRL_RECIPIENT_DEVICE) + request = VENDOR_TEST_CTRL_NONE_DELAY + value = 0 # Always 0 for this request + index = 0 # Communication interface + length = 0 # No data + dev.ctrl_transfer(request_type, request, value, index, length, 5000) + + t.join() + + +def write_data(pipe): + print("Write data running") + count = 0 + for _ in range(40): + pipe.write("Value is %s" % count) + count += 1 + print("Count %s" % count) + time.sleep(0.5) + + def main(): parser = ArgumentParser(description="USB basic test") parser.add_argument('serial', help='USB serial number of DUT') @@ -1032,6 +1040,6 @@ def main(): ret = test_device(args.serial) print("Test %s" % "passed" if ret else "failed") - if __name__ == "__main__": main() +""" From 89f4bc7d0e572713c056d96c1d92bd208b631aaf Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Thu, 26 Apr 2018 15:42:04 +0200 Subject: [PATCH 324/488] pyusb_basic test add helper functions --- TESTS/host_tests/pyusb_basic.py | 52 +++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 1b7b401f87b..ac3022a3bd6 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -894,6 +894,58 @@ def repeated_construction_destruction_test(log): yield +def release_interfaces(dev): + """ Releases interfaces to allow configuration switch + + Fixes error while configuration change(on Windows machines): + USBError: [Errno None] libusb0-dll:err [set_configuration] can't change configuration, an interface is still in use (claimed) + """ + cfg = dev.get_active_configuration() + for i in range(0, cfg.bNumInterfaces): + usb.util.release_interface(dev, i) + + +def restore_default_configuration(dev): + cfg = dev[1] + cfg.set() + + +def get_status(dev, recipient, index = 0): + """ Get status of the recipient + + Args: + dev - pyusb device + recipient - CTRL_RECIPIENT_DEVICE/CTRL_RECIPIENT_INTERFACE/CTRL_RECIPIENT_ENDPOINT + index - 0 if recipient is device, interface index if recipient is interface, endpoint index if recipient is endpoint + + Returns: + status flag 32b int + """ + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + recipient) + request = REQUEST_GET_STATUS + value = 0 # Always 0 for this request + index = index # recipient index + length = 2 # Always 2 for this request (size of return data) + ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = ret[0] | (ret[1] << 8) + + return ret + + +def get_descriptor(dev, type_index, lang_id, length): + # Control IN GET_DESCRIPTOR - device + request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, + CTRL_RECIPIENT_DEVICE) + request = REQUEST_GET_DESCRIPTOR + value = type_index # Descriptor Type (H) and Descriptor Index (L) + index = lang_id # 0 or Language ID for this request + length = length # Descriptor Length + ret = dev.ctrl_transfer(request_type, request, value, index, length) + + return ret + + """ For documentation purpose until test writing finished TODO: remove this if not needed anymore From 2aa05b6cc35cedb2552174bf436b29780d3a599f Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Thu, 26 Apr 2018 19:10:23 +0200 Subject: [PATCH 325/488] pyusb_basic test update test code refactoring align test to use device multiconfiguration --- TESTS/host_tests/pyusb_basic.py | 471 +++++++++++++------------------- 1 file changed, 186 insertions(+), 285 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index ac3022a3bd6..109f23d7bb8 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -115,7 +115,7 @@ def _callback_control_basic_test(self, key, value, timestamp): return try: - control_basic_test(dev, vendor_id, product_id, log=print) + control_basic_test(dev, int(vendor_id), int(product_id), log=print) self.report_success() except (RuntimeError) as exc: self.report_error(exc) @@ -307,327 +307,222 @@ def raise_unconditionally(line, text=''): def control_basic_test(dev, vendor_id, product_id, log): + get_set_configuration_test(dev, log) + get_set_interface_test(dev, log) get_status_test(dev, log) set_clear_feature_test(dev, log) - get_set_interface_test(dev, log) - get_set_configuration_test(dev, log) get_descriptor_test(dev, vendor_id, product_id, log) set_descriptor_test(dev, log) #synch_frame_test(dev, log) wait for isochronous endpoint -def get_status_test(dev, log): - # Control IN GET_STATUS on DEVICE - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_DEVICE) - request = REQUEST_GET_STATUS - value = 0 # Always 0 for this request - index = 0 # 0 if recipient is device - length = 2 # Always 2 for this request (size of return data) - ret = dev.ctrl_transfer(request_type, request, value, index, length) - ret = ret[0] | (ret[1] << 8) - # Status bits - # ret == 0b01 (D0)Self Powered - # ret == 0b10 (D1)Remote Wakeup - # (D2 - D15 reserved) Must be set to 0 - if(ret < 0 or ret > 3): - raise_unconditionally(lineno(), "GET_STATUS on DEVICE failed") - - # Control IN GET_STATUS on INTERFACE - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_GET_STATUS - value = 0 # Always 0 for this request - index = 0 # interface index - length = 2 # Always 2 for this request (size of return data) - ret = dev.ctrl_transfer(request_type, request, value, index, length) - ret = ret[0] | (ret[1] << 8) - # Status bits - # ret == 0b0 - # (D0 - D15 reserved) Must be set to 0 - if(ret != 0): - raise_unconditionally(lineno(), "GET_STATUS on INTERFACE failed") - - # Control IN GET_STATUS on ENDPOINT 0 - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_GET_STATUS - value = 0 # Always 0 for this request - index = 0 # endpoint index - length = 2 # Always 2 for this request (size of return data) - ret = dev.ctrl_transfer(request_type, request, value, index, length) - ret = ret[0] | (ret[1] << 8) - # Status bits - # ret == 0b1 (D0)endpoint Halt - # (D1 - D15 reserved) Must be set to 0 - # endpoint 0 can't be halted ret == 0 - if(ret != 0): - raise_unconditionally(lineno(), "GET_STATUS on ENDPOINT failed") - - -def set_clear_feature_test(dev, log): - # Control OUT SET_FEATURE on endpoint - halt - request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_SET_FEATURE - value = FEATURE_ENDPOINT_HALT - index = 1 # Endpoint index - length = 0 # Always 0 for this request +def get_set_configuration_test(dev, log): + print("<<< get_set_configuration_test >>>") + # check if dafault(1) configuration set try: - dev.ctrl_transfer(request_type, request, value, index, length) - except usb.core.USBError: - raise_unconditionally(lineno(), "endpoint halt failed") + ret = usb.control.get_configuration(dev) + raise_if_different(1, ret, lineno(), "FAILED - expected first configuration set") + except usb.core.USBError as error: + print(error) + raise_unconditionally(lineno(), "FAILED - get_configuration !!!") - # check if endpoint was halted - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_GET_STATUS - value = 0 # Always 0 for this request - index = 1 # Endpoint index - length = 2 # Always 2 for this request (size of return data) - ret = dev.ctrl_transfer(request_type, request, value, index, length) - ret = ret[0] | (ret[1] << 8) - if(ret != 1): - raise_unconditionally(lineno(), "endpoint was not halted") + cfg = dev.get_active_configuration() + for intf in cfg: + usb.util.release_interface(dev, intf) - # Control OUT CLEAR_FEATURE on endpoint - unhalt - request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_CLEAR_FEATURE - value = FEATURE_ENDPOINT_HALT - index = 1 # Endpoint index - length = 0 # Always 0 for this request + # deconfigure the device try: - dev.ctrl_transfer(request_type, request, value, index, length) - except usb.core.USBError: - raise_unconditionally(lineno(), "endpoint was not unhalted") - - # check if endpoint was unhalted - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_ENDPOINT) - request = REQUEST_GET_STATUS - value = 0 # Always 0 for this request - index = 1 # Endpoint index - length = 2 # Always 2 for this request (size of return data) - ret = dev.ctrl_transfer(request_type, request, value, index, length) - ret = ret[0] - if(ret != 0): - raise_unconditionally(lineno(), "endpoint unhalthalt failed") - + ret = dev.set_configuration(0) + except usb.core.USBError as error: + print(error) + raise_unconditionally(lineno(), "FAILED - set_configuration(0) !!!") -def get_set_interface_test(dev, log): - # Control IN GET_INTERFACE - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_GET_INTERFACE - value = 0 # Always 0 for this request - index = 0 # Interface index - length = 1 # Always 1 for this request (size of return data) + # check if deconfigured try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - print("GET_INTERFACE ret: %d" % (ret[0])) - if(ret[0] != 0): - raise_unconditionally(lineno(), "Wrong interface was set expected: 0") - except usb.core.USBError: - raise_unconditionally(lineno(), "GET_INTERFACE failed") - # test control data transfer - control_data_test(dev, [64, 256], log) + ret = usb.control.get_configuration(dev) + raise_if_different(0, ret, lineno(), "FAILED - expected to be deconfigured") + print("device deconfigured - OK") + except usb.core.USBError as error: + print(error) + raise_unconditionally(lineno(), "FAILED - get_active_configuration !!!") + + # for every configuration + for cfg in dev: + try: + # set configuration + ret = cfg.set() + except usb.core.USBError as error: + print(error) + raise_unconditionally(lineno(), "FAILED - set configuration") - # Control IN SET_INTERFACE - request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_SET_INTERFACE - value = 1 # Alternative interface setting index - index = 0 # Interface index - length = 0 # Always 0 for this request - try: - dev.ctrl_transfer(request_type, request, value, index, length) - except usb.core.USBError: - raise_unconditionally(lineno(), "SET_INTERFACE failed") - # test control data transfer after alternative interface set - control_data_test(dev, [64, 256], log) + # check if configured + try: + ret = usb.control.get_configuration(dev) + raise_if_different(cfg.bConfigurationValue, ret, lineno(), "FAILED - expected {} configuration set".format(cfg.bConfigurationValue)) + print("configuration {} set - OK ".format(cfg.bConfigurationValue)) + except usb.core.USBError as error: + print(error) + raise_unconditionally(lineno(), "FAILED - get_configuration !!!") + # test control data transfer after configuration set + control_data_test(dev, [64, 256], log) + print("") # new line - # Control IN GET_INTERFACE - check if alternative interface setting was set - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_GET_INTERFACE - value = 0 # Always 0 for this request - index = 0 # Interface index - length = 1 # Always 1 for this request (size of return data) - try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - if(ret[0] != 1): - raise_unconditionally(lineno(), "Alternative interface setting was not set properly") - except usb.core.USBError: - raise_unconditionally(lineno(), "GET_INTERFACE failed") - # Control IN SET_INTERFACE restore interfejs settings - request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_SET_INTERFACE - value = 0 # Interface setting index - index = 0 # Interface index - length = 0 # Always 0 for this request - try: - dev.ctrl_transfer(request_type, request, value, index, length) - except usb.core.USBError: - raise_unconditionally(lineno(), "SET_INTERFACE request failed") - # test control data transfer after interface restoring +def get_set_interface_test(dev, log): + print("<<< get_set_interface_test >>>") + # for every configuration + for cfg in dev: + cfg.set() + # for every interface + for intf in cfg: + intf.set_altsetting(); + altsett = usb.control.get_interface(dev, intf.bInterfaceNumber) + raise_if_different(intf.bAlternateSetting, altsett, lineno(), text='Wrong alternate setting for interface {}'.format(intf.bInterfaceNumber)) + print("cfg({}) inteface {}.{} set - OK".format(cfg.bConfigurationValue, intf.bInterfaceNumber, intf.bAlternateSetting)) + control_data_test(dev, [64, 256], log) + + release_interfaces(dev) + + restore_default_configuration(dev) + + # test control data transfer after default interface restoring control_data_test(dev, [64, 256], log) + print("") # new line - # Control IN GET_INTERFACE - check if alternative interface setting was restored properly - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_GET_INTERFACE - value = 0 # Always 0 for this request - index = 0 # Interface index - length = 1 # Always 1 for this request (size of return data) - try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - if(ret[0] != 0): - raise_unconditionally(lineno(), "Alternative interface setting was not restored properly") - except usb.core.USBError: - raise_unconditionally(lineno(), "GET_INTERFACE failed") - - -def get_set_configuration_test(dev, log): - # Set Configuration can also be used, with wValue set to 0, to deconfigure the device - # Control IN GET_CONFIGURATION - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_GET_CONFIGURATION - value = 0 # Always 0 for this request - index = 0 # Always 0 for this request - length = 1 # Always 1 for this request (size of return data) - try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - if(ret[0] != 1): - raise_unconditionally(lineno(), "Expected first configuration set") - except usb.core.USBError: - raise_unconditionally(lineno(), "GET_CONFIGURATION failed") - # test control data transfer - control_data_test(dev, [64, 256], log) - # Control OUT SET_CONFIGURATION 0 - deconfigure the device - request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_SET_CONFIGURATION - value = 0 # Configuration Value (0 - deconfigure the device) - index = 0 # Always 0 for this request - length = 0 # Always 0 for this request - try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - except usb.core.USBError: - raise_unconditionally(lineno(), "SET_CONFIGURATION failed") +def get_status_test(dev, log): + print("<<< get_status_test >>>") + # check device status + ret = get_status(dev, CTRL_RECIPIENT_DEVICE) + # Status bits + # ret == 0b01 (D0)Self Powered + # ret == 0b10 (D1)Remote Wakeup + # (D2 - D15 reserved) Must be set to 0 + if(ret < 0 or ret > 3): + raise_unconditionally(lineno(), "GET_STATUS on DEVICE failed") - # Control IN GET_CONFIGURATION - check if deconfigured - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_GET_CONFIGURATION - value = 0 # Always 0 for this request - index = 0 # Always 0 for this request - length = 1 # Always 1 for this request (size of return data) - try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - if(ret[0] != 0): - raise_unconditionally(lineno(), "Expected to be deconfigured") - except usb.core.USBError: - raise_unconditionally(lineno(), "GET_CONFIGURATION failed") + # check endpoint 0 status + ret = get_status(dev, CTRL_RECIPIENT_ENDPOINT, 0) + # Status bits + # ret == 0b1 (D0)endpoint Halt + # (D1 - D15 reserved) Must be set to 0 + # endpoint 0 can't be halted ret == 0 + raise_if_different(0, ret, lineno(), "GET_STATUS on ENDPOINT 0 should return 0") + + # for every configuration + for cfg in dev: + cfg.set() + raise_if_different(cfg.bConfigurationValue, usb.control.get_configuration(dev), lineno(), "Configuration {} set failed".format(cfg.bConfigurationValue)) + + for intf in cfg: + intf.set_altsetting() + # check interface status + ret = get_status(dev, CTRL_RECIPIENT_INTERFACE, intf.bInterfaceNumber) + # Status bits + # ret == 0b0 + # (D0 - D15 reserved) Must be set to 0 + if(ret != 0): + raise_unconditionally(lineno(), "GET_STATUS on INTERFACE ({},{}) failed".format(intf.bInterfaceNumber, intf.bAlternateSetting)) + print("cfg({}) interface {}.{} status - OK".format(cfg.bConfigurationValue, intf.bInterfaceNumber, intf.bAlternateSetting)) + + # on every ENDPOINT in this altsetting + for ep in intf: + ret = usb.control.get_status(dev, ep) + # Status bits + # ret == 0b1 (D0)endpoint Halt + # (D1 - D15 reserved) Must be set to 0 + if(ret >= 1): + raise_unconditionally(lineno(), "GET_STATUS on ENDPOINT {} failed - endpoint halted".format(ep.bEndpointAddress)) + print("cfg({}) intf({}.{}) endpoint {} status - OK".format(cfg.bConfigurationValue, intf.bInterfaceNumber, intf.bAlternateSetting, ep.bEndpointAddress)) + + release_interfaces(dev) + restore_default_configuration(dev) + print("") # new line - # Control OUT SET_CONFIGURATION 1 - restore first configuration - request_type = build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_SET_CONFIGURATION - value = 1 # Configuration Value - index = 0 # Always 0 for this request - length = 0 # Always 0 for this request - try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - except usb.core.USBError: - raise_unconditionally(lineno(), "SET_CONFIGURATION failed") - # test control data transfer after configured back - control_data_test(dev, [64, 256], log) - # Control IN GET_CONFIGURATION - check if configured back - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_INTERFACE) - request = REQUEST_GET_CONFIGURATION - value = 0 # Always 0 for this request - index = 0 # Always 0 for this request - length = 1 # Always 1 for this request (size of return data) - try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - if(ret[0] != 1): - raise_unconditionally(lineno(), "Expected to be deconfigured: 1") - except usb.core.USBError: - raise_unconditionally(lineno(), "GET_CONFIGURATION failed") - control_data_test(dev, [64, 256], log) +def set_clear_feature_test(dev, log): + print("<<< set_clear_feature_test >>>") + # for every configuration + for cfg in dev: + cfg.set() + raise_if_different(cfg.bConfigurationValue, usb.control.get_configuration(dev), lineno(), "Configuration {} set failed".format(cfg.bConfigurationValue)) + + for intf in cfg: + intf.set_altsetting() + # on every ENDPOINT + for ep in intf: + try: + usb.control.set_feature(dev, FEATURE_ENDPOINT_HALT, ep) + except usb.core.USBError as err: + print(err) + raise_unconditionally(lineno(), "endpoint {} halt failed".format(ep.bEndpointAddress)) + + # check if endpoint was halted + try: + ret = usb.control.get_status(dev, ep) + except usb.core.USBError as err: + print(err) + raise_unconditionally(lineno(), "endpoint status failed".format(ep.bEndpointAddress)) + if(ret != 1): + raise_unconditionally(lineno(), "endpoint {} was not halted".format(ep.bEndpointAddress)) + print("cfg({}) intf({}.{}) ep {} halted - OK".format(cfg.bConfigurationValue, intf.bInterfaceNumber, intf.bAlternateSetting, ep.bEndpointAddress)) + + # Control OUT CLEAR_FEATURE on endpoint - unhalt + try: + usb.control.clear_feature(dev, FEATURE_ENDPOINT_HALT, ep) + except usb.core.USBError as err: + print(err) + raise_unconditionally(lineno(), "endpoint {} unhalt failed".format(ep.bEndpointAddress)) + + # check if endpoint was unhalted + ret = usb.control.get_status(dev, ep) + if(ret != 0): + raise_unconditionally(lineno(), "endpoint {} was not unhalted".format(ep.bEndpointAddress)) + print("cfg({}) intf({}.{}) ep {} unhalted - OK".format(cfg.bConfigurationValue, intf.bInterfaceNumber, intf.bAlternateSetting, ep.bEndpointAddress)) + + release_interfaces(dev) + + restore_default_configuration(dev) + print("") # new line def get_descriptor_test(dev, vendor_id, product_id, log): + print("<<< get_descriptor_test >>>") # Control IN GET_DESCRIPTOR - device - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_DEVICE) - request = REQUEST_GET_DESCRIPTOR - value = (DESC_TYPE_DEVICE << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) - index = 0 # 0 or Language ID for this request - length = DEVICE_DESC_SIZE # Descriptor Length try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - #print("### DEVICE_DESC ####################################################") - #dev_desc = dict(zip(device_descriptor_keys, device_descriptor_parser.unpack(ret))) - #for key in dev_desc: - # print("%s: %d" % (key, dev_desc[key])) - #assert vendor_id != dev_desc['idVendor'] - #assert product_id != dev_desc['idProduct'] + ret = get_descriptor(dev, (DESC_TYPE_DEVICE << 8) | (0 << 0), 0, DEVICE_DESC_SIZE) + dev_desc = dict(zip(device_descriptor_keys, device_descriptor_parser.unpack(ret))) + raise_if_different(DEVICE_DESC_SIZE, dev_desc['bLength'], lineno(), text='Wrong device descriptor size !!!') + raise_if_different(vendor_id, dev_desc['idVendor'], lineno(), text='Wrong vendor id !!!') + raise_if_different(product_id, dev_desc['idProduct'], lineno(), text='Wrong product id !!!') except usb.core.USBError: raise_unconditionally(lineno(), "Requesting device descriptor failed") # Control IN GET_DESCRIPTOR - configuration - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_DEVICE) - request = REQUEST_GET_DESCRIPTOR - value = (DESC_TYPE_CONFIG << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) - index = 0 # 0 or Language ID for this request - length = CONFIGURATION_DESC_SIZE # Descriptor Length try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) - #print("### CONFIGURATION_DESC ####################################################") - #conf_desc = dict(zip(configuration_descriptor_keys, configuration_descriptor_parser.unpack(ret))) - #for key in conf_desc: - # print("%s: %d" % (key, conf_desc[key])) - #print("#######################################################") + ret = get_descriptor(dev, (DESC_TYPE_CONFIG << 8) | (0 << 0), 0, CONFIGURATION_DESC_SIZE) + conf_desc = dict(zip(configuration_descriptor_keys, configuration_descriptor_parser.unpack(ret))) + raise_if_different(CONFIGURATION_DESC_SIZE, conf_desc['bLength'], lineno(), text='Wrong configuration descriptor size !!!') except usb.core.USBError: raise_unconditionally(lineno(), "Requesting configuration descriptor failed") # Control IN GET_DESCRIPTOR - interface - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_DEVICE) - request = REQUEST_GET_DESCRIPTOR - value = (DESC_TYPE_INTERFACE << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) - index = 0 # 0 or Language ID for this request - length = INTERFACE_DESC_SIZE # Descriptor Length try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = get_descriptor(dev, (DESC_TYPE_INTERFACE << 8) | (0 << 0), 0, INTERFACE_DESC_SIZE) raise_unconditionally(lineno(), "Requesting interface descriptor should fail since it is not directly accessible") except usb.core.USBError: - log("interface descriptor is not directly accessible") + log("interface descriptor is not directly accessible - OK") - # Control IN GET_DESCRIPTOR - interface - request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, - CTRL_RECIPIENT_DEVICE) - request = REQUEST_GET_DESCRIPTOR - value = (DESC_TYPE_ENDPOINT << 8) | (0 << 0) # Descriptor Type (H) and Descriptor Index (L) - index = 0 # 0 or Language ID for this request - length = INTERFACE_DESC_SIZE # Descriptor Length + # Control IN GET_DESCRIPTOR - endpoint try: - ret = dev.ctrl_transfer(request_type, request, value, index, length) + ret = get_descriptor(dev, (DESC_TYPE_ENDPOINT << 8) | (0 << 0), 0, ENDPOINT_DESC_SIZE) raise_unconditionally(lineno(), "Requesting endpoint descriptor should fail since it is not directly accessible") except usb.core.USBError: - log("endpoint descriptor is not directly accessible") - + log("endpoint descriptor is not directly accessible - OK") + print("") # new line def set_descriptor_test(dev, log): + print("<<< set_descriptor_test >>>") # SET_DESCRIPTOR is optional and not implemented in Mbed # command should fail with no action on device side @@ -642,10 +537,12 @@ def set_descriptor_test(dev, log): dev.ctrl_transfer(request_type, request, value, index, data) raise_unconditionally(lineno(), "SET_DESCRIPTOR should fail since it is not implemented") except usb.core.USBError: - log("SET_DESCRIPTOR is unsupported") + log("SET_DESCRIPTOR is unsupported - OK") + print("") # new line def synch_frame_test(dev, log): + print("<<< synch_frame_test >>>") # only for isochronous endpoints request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, CTRL_RECIPIENT_ENDPOINT) @@ -659,10 +556,11 @@ def synch_frame_test(dev, log): log("synch frame ret: %d" % (ret)) except usb.core.USBError: raise_unconditionally(lineno(), "SYNCH_FRAME failed") + print("") # new line def control_stall_test(dev, log): - + print("<<< control_stall_test >>>") # Control OUT stall try: request_type = build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, @@ -674,7 +572,7 @@ def control_stall_test(dev, log): dev.ctrl_transfer(request_type, request, value, index, data, 5000) raise_unconditionally(lineno(), "Invalid request not stalled") except usb.core.USBError: - log("Invalid request stalled") + log("Invalid request stalled - OK") # Control request with no data stage (Device-to-host) try: @@ -687,7 +585,7 @@ def control_stall_test(dev, log): dev.ctrl_transfer(request_type, request, value, index, length, 5000) raise_unconditionally(lineno(), "Invalid request not stalled") except usb.core.USBError: - log("Invalid request stalled") + log("Invalid request stalled - OK") # Control request with no data stage (Host-to-device) try: @@ -700,7 +598,7 @@ def control_stall_test(dev, log): dev.ctrl_transfer(request_type, request, value, index, length, 5000) raise_unconditionally(lineno(), "Invalid request not stalled") except usb.core.USBError: - log("Invalid request stalled") + log("Invalid request stalled - OK") # Control IN stall try: @@ -713,7 +611,7 @@ def control_stall_test(dev, log): dev.ctrl_transfer(request_type, request, value, index, length, 5000) raise_unconditionally(lineno(), "Invalid request not stalled") except usb.core.USBError: - log("Invalid request stalled") + log("Invalid request stalled - OK") for i in (3, 4, 5): try: @@ -738,7 +636,8 @@ def control_stall_test(dev, log): resp = dev.ctrl_transfer(request_type, request, value, index, length, 5000) raise_unconditionally(lineno(), "Requesting string passed i: " + str(i)) except usb.core.USBError: - log("Requesting string %s failed" % i) + log("Requesting string %s failed - OK" % i) + print("") # new line def control_sizes_test(dev, log): @@ -883,13 +782,15 @@ def device_suspend_resume_test(log): def repeated_construction_destruction_test(log): - # run other test to check if USB works fine after repeated construction/destruction list = [64, 256] dev = yield + # run other test to check if USB works fine after repeated construction/destruction control_data_test(dev, list, log) dev = yield + # run other test to check if USB works fine after repeated construction/destruction control_data_test(dev, list, log) dev = yield + # run other test to check if USB works fine after repeated construction/destruction control_data_test(dev, list, log) yield From 26a4fa1d831a1ce4e18e61e6e49416999616ea9d Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 30 Apr 2018 18:57:24 -0500 Subject: [PATCH 326/488] Remove blocking option from USB connect Remove the option to block in USBDevice::connect since this should be handled at a higher level. Also call init to ensure that the USBDevice has been initalized. --- usb/device/USBDevice/USBDevice.cpp | 14 +++++++------- usb/device/USBDevice/USBDevice.h | 4 +--- 2 files changed, 8 insertions(+), 10 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index fdc49a83eac..c539e5a5987 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -994,20 +994,20 @@ bool USBDevice::configured() return ret; } -void USBDevice::connect(bool blocking) +void USBDevice::connect() { - /* Connect device */ lock(); + + /* Ensure device has been initialized */ + init(); + + /* Connect device */ if (!_connected) { _phy->connect(); _connected = true; } - unlock(); - if (blocking) { - /* Block if not configured */ - while (!configured()); - } + unlock(); } void USBDevice::disconnect() diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 91bb7513363..c6056059bbb 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -117,10 +117,8 @@ class USBDevice: public USBPhyEvents { /** * Connect a device - * - * @param blocking: block if not configured */ - void connect(bool blocking = true); + void connect(); /** * Disconnect a device From 4208eb001899ef6301e2ce022bd58fcbc5facf76 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 30 Apr 2018 18:58:38 -0500 Subject: [PATCH 327/488] Remove extra USBDevice constructor Remove the second USBDevice constructor since it does not provide any new functionality. --- usb/device/USBDevice/USBDevice.cpp | 29 +---------------------------- usb/device/USBDevice/USBDevice.h | 11 ----------- 2 files changed, 1 insertion(+), 39 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index c539e5a5987..0788358b210 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -1246,34 +1246,7 @@ USBDevice::USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint1 _device.state = Powered; _device.configuration = 0; _device.suspended = false; -}; - -USBDevice::USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release) -{ - this->vendor_id = vendor_id; - this->product_id = product_id; - this->product_release = product_release; - - memset(_endpoint_info, 0, sizeof(_endpoint_info)); - memset(&_transfer, 0, sizeof(_transfer)); - _transfer.user_callback = None; - - _setup_ready = false; - _abort_control = false; - - _phy = get_usb_phy(); - _initialized = false; - _connected = false; - _current_interface = 0; - _current_alternate = 0; - _locked = 0; - _post_process = NULL; - - /* Set initial device state */ - _device.state = Powered; - _device.configuration = 0; - _device.suspended = false; -}; +} uint32_t USBDevice::endpoint_max_packet_size(usb_ep_t endpoint) { diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index c6056059bbb..d5a91f1b26b 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -72,17 +72,6 @@ class USBDevice: public USBPhyEvents { uint16_t wLength; }; - /** - * Instantiate a new USBDevice with the given parameters - * - * This function uses a target's built in USBPhy. - * - * @param vendor_id The USB vendor ID - * @param product_id The USB product ID - * @param product_release The device release number - */ - USBDevice(uint16_t vendor_id, uint16_t product_id, uint16_t product_release); - /** * Instantiate a new USBDevice with the given parameters * From 5351eac17d77119c66fd212657a1fadcfa5d7bf6 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 1 May 2018 15:05:17 -0500 Subject: [PATCH 328/488] Add USBDevice destructor Add a destructor to USBDevice to ensure that resources have been properly released. Additionally add an assert in the destructor that deinit has already been called. If it has not been called then interrupts can still occur which may cause a crash. --- usb/device/USBDevice/USBDevice.cpp | 6 ++++++ usb/device/USBDevice/USBDevice.h | 8 ++++++++ 2 files changed, 14 insertions(+) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 0788358b210..3c73170c4b2 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -1248,6 +1248,12 @@ USBDevice::USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint1 _device.suspended = false; } +USBDevice::~USBDevice() +{ + MBED_ASSERT(!_initialized); + deinit(); +} + uint32_t USBDevice::endpoint_max_packet_size(usb_ep_t endpoint) { lock(); diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index d5a91f1b26b..a1b491574b3 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -82,6 +82,14 @@ class USBDevice: public USBPhyEvents { */ USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); + /** + * Cleanup this USBDevice + * + * This USBDevice must be uninitialized when the destructor is + * called or the behavior is undefined. + */ + virtual ~USBDevice(); + /** * Initialize this instance * From 4cfca0100e158f99736ca1266c6de4b24fe76b14 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 1 May 2018 15:02:36 -0500 Subject: [PATCH 329/488] Cleanup USBSerial Make the following changes -Make blocking the first parameter in the constructor -Add destructor and proper cleanup -Add ready and wait_ready functions --- usb/device/USBSerial/USBCDC.cpp | 43 ++++++++++++++++--------- usb/device/USBSerial/USBCDC.h | 50 +++++++++++++++++++++++------- usb/device/USBSerial/USBSerial.cpp | 32 ++++++++++++++++++- usb/device/USBSerial/USBSerial.h | 41 +++++++++++++++--------- 4 files changed, 125 insertions(+), 41 deletions(-) diff --git a/usb/device/USBSerial/USBCDC.cpp b/usb/device/USBSerial/USBCDC.cpp index 1e5993e7e5d..4eff925deea 100644 --- a/usb/device/USBSerial/USBCDC.cpp +++ b/usb/device/USBSerial/USBCDC.cpp @@ -18,6 +18,7 @@ #include "USBCDC.h" #include "EndpointResolver.h" #include "AsyncOp.h" +#include "usb_phy_api.h" static const uint8_t cdc_line_coding_default[7] = {0x80, 0x25, 0x00, 0x00, 0x00, 0x00, 0x08}; @@ -58,20 +59,31 @@ class USBCDC::AsyncRead: public AsyncOp { bool result; }; -USBCDC::USBCDC(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking) - : USBDevice(vendor_id, product_id, product_release) +USBCDC::USBCDC(bool connect_blocking, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) + : USBDevice(get_usb_phy(), vendor_id, product_id, product_release) { - _init(connect_blocking); + _init(); + if (connect_blocking) { + connect(); + wait_ready(); + } else { + init(); + } } -USBCDC::USBCDC(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking) +USBCDC::USBCDC(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) : USBDevice(phy, vendor_id, product_id, product_release) { - _init(connect_blocking); + _init(); } -void USBCDC::_init(bool connect_blocking) +USBCDC::~USBCDC() +{ + deinit(); +} + +void USBCDC::_init() { memcpy(_cdc_line_coding, cdc_line_coding_default, sizeof(_cdc_line_coding)); @@ -91,13 +103,6 @@ void USBCDC::_init(bool connect_blocking) _rx_in_progress = false; _rx_buf = _rx_buffer; _rx_size = 0; - - init(); - - USBDevice::connect(false); - if (connect_blocking) { - wait_connected(); - } } void USBCDC::callback_reset() @@ -234,7 +239,17 @@ void USBCDC::_change_terminal_connected(bool connected) _terminal_connected = connected; } -void USBCDC::wait_connected() +bool USBCDC::ready() +{ + lock(); + + bool ready = _terminal_connected; + + unlock(); + return ready; +} + +void USBCDC::wait_ready() { lock(); diff --git a/usb/device/USBSerial/USBCDC.h b/usb/device/USBSerial/USBCDC.h index 15222bc91a2..726ffb4419e 100644 --- a/usb/device/USBSerial/USBCDC.h +++ b/usb/device/USBSerial/USBCDC.h @@ -29,31 +29,57 @@ class AsyncOp; class USBCDC: public USBDevice { public: - /* - * Constructor + /** + * Basic constructor + * + * Construct this object optionally connecting and blocking until it is ready. + * + * @note Do not use this constructor in derived classes. * + * @param connect_blocking true to perform a blocking connect, false to start in a disconnected state * @param vendor_id Your vendor_id * @param product_id Your product_id - * @param product_release Your preoduct_release - * @param connect_blocking define if the connection must be blocked if USB not plugged in + * @param product_release Your product_release */ - USBCDC(uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); + USBCDC(bool connect_blocking, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); - /* - * Constructor + /** + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. * * @param phy USB phy to use * @param vendor_id Your vendor_id * @param product_id Your product_id - * @param product_release Your preoduct_release - * @param connect_blocking define if the connection must be blocked if USB not plugged in + * @param product_release Your product_release */ - USBCDC(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); + USBCDC(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ + virtual ~USBCDC(); + + /** + * Check if this class is ready + * + * @return true if a terminal is connected, false otherwise + */ + bool ready(); /** * Block until the terminal is connected */ - void wait_connected(); + void wait_ready(); /* * Send a buffer @@ -162,7 +188,7 @@ class USBCDC: public USBDevice { virtual void callback_set_configuration(uint8_t configuration); virtual void callback_set_interface(uint16_t interface, uint8_t alternate); - void _init(bool connect_blocking); + void _init(); void _change_terminal_connected(bool connected); void _connect_wake_all(); diff --git a/usb/device/USBSerial/USBSerial.cpp b/usb/device/USBSerial/USBSerial.cpp index 376c8b8de24..b691b2f977e 100644 --- a/usb/device/USBSerial/USBSerial.cpp +++ b/usb/device/USBSerial/USBSerial.cpp @@ -16,10 +16,40 @@ #include "stdint.h" #include "USBSerial.h" +#include "usb_phy_api.h" + + +USBSerial::USBSerial(bool connect_blocking, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBCDC(get_usb_phy(), vendor_id, product_id, product_release) +{ + _settings_changed_callback = 0; + + if (connect_blocking) { + connect(); + wait_ready(); + } else { + init(); + } +} + +USBSerial::USBSerial(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBCDC(phy, vendor_id, product_id, product_release) +{ + _settings_changed_callback = 0; +} + +USBSerial::~USBSerial() +{ + deinit(); +} int USBSerial::_putc(int c) { - return send((uint8_t *)&c, 1) ? 1 : 0; + if (send((uint8_t *)&c, 1)) { + return c; + } else { + return -1; + } } int USBSerial::_getc() diff --git a/usb/device/USBSerial/USBSerial.h b/usb/device/USBSerial/USBSerial.h index b3344b4a6e1..f06eb2e8171 100644 --- a/usb/device/USBSerial/USBSerial.h +++ b/usb/device/USBSerial/USBSerial.h @@ -45,33 +45,46 @@ class USBSerial: public USBCDC, public Stream { public: /** - * Constructor + * Basic constructor * + * Construct this object optionally connecting and blocking until it is ready. + * + * @note Do not use this constructor in derived classes. + * + * @param connect_blocking true to perform a blocking connect, false to start in a disconnected state * @param vendor_id Your vendor_id (default: 0x1f00) * @param product_id Your product_id (default: 0x2012) - * @param product_release Your preoduct_release (default: 0x0001) - * @param connect_blocking define if the connection must be blocked if USB not plugged in + * @param product_release Your product_release (default: 0x0001) * */ - USBSerial(uint16_t vendor_id = 0x1f00, uint16_t product_id = 0x2012, uint16_t product_release = 0x0001, bool connect_blocking = true): USBCDC(vendor_id, product_id, product_release, connect_blocking) - { - _settings_changed_callback = 0; - }; + USBSerial(bool connect_blocking=true, uint16_t vendor_id=0x1f00, uint16_t product_id=0x2012, uint16_t product_release=0x0001); /** - * Constructor + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. * * @param phy USB phy to use * @param vendor_id Your vendor_id (default: 0x1f00) * @param product_id Your product_id (default: 0x2012) - * @param product_release Your preoduct_release (default: 0x0001) - * @param connect_blocking define if the connection must be blocked if USB not plugged in + * @param product_release Your product_release (default: 0x0001) * */ - USBSerial(USBPhy *phy, uint16_t vendor_id = 0x1f00, uint16_t product_id = 0x2012, uint16_t product_release = 0x0001, bool connect_blocking = true): USBCDC(phy, vendor_id, product_id, product_release, connect_blocking) - { - _settings_changed_callback = 0; - }; + USBSerial(USBPhy *phy, uint16_t vendor_id=0x1f00, uint16_t product_id=0x2012, uint16_t product_release=0x0001); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ + virtual ~USBSerial(); /** * Send a character. You can use puts, printf. From 757d119c5127152bdf8ddea7aad17a0c09dfe373 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 1 May 2018 19:45:58 -0500 Subject: [PATCH 330/488] Fix typo in USBTester.h Fix the spelling of product_release. --- TESTS/usb_device/basic/USBTester.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index 9faca7f5677..dcd345b1bf9 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -33,7 +33,7 @@ class USBTester: public USBDevice { * * @param vendor_id Your vendor_id * @param product_id Your product_id - * @param product_release Your preoduct_release + * @param product_release Your product_release * @param connect_blocking define if the connection must be blocked if USB not plugged in */ USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); From 40d157c61f655c859907c5c060f81e22b037aead Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 24 Mar 2018 20:13:10 +0100 Subject: [PATCH 331/488] Update the USBHID classes Update the USB classes USBHID, USBKeyboard, USBMouse and USBMouseKeyboard from the unsupported folder. --- usb/device/USBHID/USBHID.cpp | 511 +++++++++++++++ usb/device/USBHID/USBHID.h | 274 ++++++++ usb/device/USBHID/USBHID_Types.h | 92 +++ usb/device/USBHID/USBKeyboard.cpp | 604 ++++++++++++++++++ usb/device/USBHID/USBKeyboard.h | 211 +++++++ usb/device/USBHID/USBMouse.cpp | 348 +++++++++++ usb/device/USBHID/USBMouse.h | 234 +++++++ usb/device/USBHID/USBMouseKeyboard.cpp | 828 +++++++++++++++++++++++++ usb/device/USBHID/USBMouseKeyboard.h | 246 ++++++++ 9 files changed, 3348 insertions(+) create mode 100644 usb/device/USBHID/USBHID.cpp create mode 100644 usb/device/USBHID/USBHID.h create mode 100644 usb/device/USBHID/USBHID_Types.h create mode 100644 usb/device/USBHID/USBKeyboard.cpp create mode 100644 usb/device/USBHID/USBKeyboard.h create mode 100644 usb/device/USBHID/USBMouse.cpp create mode 100644 usb/device/USBHID/USBMouse.h create mode 100644 usb/device/USBHID/USBMouseKeyboard.cpp create mode 100644 usb/device/USBHID/USBMouseKeyboard.h diff --git a/usb/device/USBHID/USBHID.cpp b/usb/device/USBHID/USBHID.cpp new file mode 100644 index 00000000000..c1028d78b6a --- /dev/null +++ b/usb/device/USBHID/USBHID.cpp @@ -0,0 +1,511 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBHID.h" +#include "EndpointResolver.h" +#include "usb_phy_api.h" + +class USBHID::AsyncSend: public AsyncOp { +public: + AsyncSend(const HID_REPORT *report): AsyncOp(NULL), report(report), result(false) + { + + } + const HID_REPORT *report; + bool result; +}; + +class USBHID::AsyncRead: public AsyncOp { +public: + AsyncRead(HID_REPORT *report): AsyncOp(NULL), report(report), result(false) + { + + } + HID_REPORT *report; + bool result; +}; + + +USBHID::USBHID(bool connect_blocking, uint8_t output_report_length, uint8_t input_report_length, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) + : USBDevice(get_usb_phy(), vendor_id, product_id, product_release) +{ + _init(output_report_length, input_report_length); + if (connect_blocking) { + connect(); + wait_ready(); + } else { + init(); + } + +} + +USBHID::USBHID(USBPhy *phy, uint8_t output_report_length, uint8_t input_report_length, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) + : USBDevice(phy, vendor_id, product_id, product_release) +{ + _init(output_report_length, input_report_length); +} + +USBHID::~USBHID() +{ + deinit(); +} + +void USBHID::_init(uint8_t output_report_length, uint8_t input_report_length) +{ + EndpointResolver resolver(endpoint_table()); + + resolver.endpoint_ctrl(64); + _int_in = resolver.endpoint_in(USB_EP_TYPE_INT, MAX_HID_REPORT_SIZE); + _int_out = resolver.endpoint_out(USB_EP_TYPE_INT, MAX_HID_REPORT_SIZE); + MBED_ASSERT(resolver.valid()); + + _send_idle = true; + _read_idle = true; + _output_length = output_report_length; + _input_length = input_report_length; +} + +bool USBHID::ready() +{ + return configured(); +} + +void USBHID::wait_ready() +{ + lock(); + + AsyncOp wait_op(NULL); + wait_op.start(&_connect_list); + if (configured()) { + wait_op.complete(); + } + + unlock(); + + wait_op.wait(); +} + + +bool USBHID::send(const HID_REPORT *report) +{ + lock(); + + if (!configured()) { + unlock(); + return false; + } + + if (send_nb(report)) { + unlock(); + return true; + } + + AsyncSend send_op(report); + send_op.start(&_send_list); + + unlock(); + + send_op.wait(); + + return send_op.result; +} + +bool USBHID::send_nb(const HID_REPORT *report) +{ + lock(); + + if (!configured()) { + unlock(); + return false; + } + + bool success = false; + if (_send_idle) { + memcpy(&_input_report, report, sizeof(_input_report)); + write_start(_int_in, _input_report.data, _input_report.length); + _send_idle = false; + success = true; + } + + unlock(); + return success; +} + +bool USBHID::read(HID_REPORT *report) +{ + lock(); + + if (!configured()) { + unlock(); + return false; + } + + if (read_nb(report)) { + unlock(); + return true; + } + + AsyncRead read_op(report); + read_op.start(&_read_list); + + unlock(); + + read_op.wait(); + + return read_op.result; +} + + +bool USBHID::read_nb(HID_REPORT *report) +{ + lock(); + + if (!configured()) { + unlock(); + return false; + } + + bool success = false; + if (_read_idle) { + memcpy(report, &_output_report, sizeof(_output_report)); + read_start(_int_out, _output_report.data, MAX_HID_REPORT_SIZE); + _read_idle = false; + success = true; + } + + unlock(); + return success; +} + +void USBHID::_send_isr(usb_ep_t endpoint) +{ + assert_locked(); + + write_finish(_int_in); + _send_idle = true; + + AsyncSend *send_op = _send_list.head(); + if (send_op != NULL) { + if (send_nb(send_op->report)) { + send_op->result = true; + send_op->complete(); + } + } else { + report_tx(); + } + +} + +void USBHID::_read_isr(usb_ep_t endpoint) +{ + assert_locked(); + + _output_report.length = read_finish(_int_out); + _read_idle = true; + + AsyncRead *read_op = _read_list.head(); + if (read_op != NULL) { + if (read_nb(read_op->report)) { + read_op->result = true; + read_op->complete(); + } + } else { + report_rx(); + } +} + +void USBHID::_connect_wake_all() +{ + assert_locked(); + + AsyncOp *wait_op = _connect_list.head(); + while (wait_op != NULL) { + wait_op->complete(); + wait_op = _connect_list.head(); + } +} + +void USBHID::_send_abort_all() +{ + assert_locked(); + + if (!_send_idle) { + endpoint_abort(_int_in); + _send_idle = true; + } + AsyncSend *tx_cur = _send_list.head(); + while (tx_cur != NULL) { + tx_cur->result = false; + tx_cur->complete(); + tx_cur = _send_list.head(); + } +} + +void USBHID::_read_abort_all() +{ + assert_locked(); + + if (!_read_idle) { + endpoint_abort(_int_out); + _read_idle = true; + } + AsyncRead *rx_cur = _read_list.head(); + while (rx_cur != NULL) { + rx_cur->result = false; + rx_cur->complete(); + rx_cur = _read_list.head(); + } +} + +uint16_t USBHID::report_desc_length() +{ + report_desc(); + return reportLength; +} + + +void USBHID::callback_state_change(DeviceState new_state) +{ + if (new_state == Configured) { + _connect_wake_all(); + } else { + _send_abort_all(); + _read_abort_all(); + } +} + +// +// Route callbacks from lower layers to class(es) +// + + +// Called in ISR context +// Called by USBDevice on Endpoint0 request +// This is used to handle extensions to standard requests +// and class specific requests +// Return true if class handles this request +void USBHID::callback_request(const setup_packet_t *setup) +{ + uint8_t *hidDescriptor; + RequestResult result = PassThrough; + uint8_t *data = NULL; + uint32_t size = 0; + + // Process additional standard requests + + if ((setup->bmRequestType.Type == STANDARD_TYPE)) { + switch (setup->bRequest) { + case GET_DESCRIPTOR: + switch (DESCRIPTOR_TYPE(setup->wValue)) { + case REPORT_DESCRIPTOR: + if ((report_desc() != NULL) \ + && (report_desc_length() != 0)) { + size = report_desc_length(); + data = (uint8_t *)report_desc(); + result = Send; + } + break; + case HID_DESCRIPTOR: + // Find the HID descriptor, after the configuration descriptor + hidDescriptor = find_descriptor(HID_DESCRIPTOR); + if (hidDescriptor != NULL) { + size = HID_DESCRIPTOR_LENGTH; + data = hidDescriptor; + result = Send; + } + break; + + default: + break; + } + break; + default: + break; + } + } + + // Process class-specific requests + + if (setup->bmRequestType.Type == CLASS_TYPE) { + switch (setup->bRequest) { + case SET_REPORT: + // First byte will be used for report ID + _output_report.data[0] = setup->wValue & 0xff; + _output_report.length = setup->wLength + 1; + + size = sizeof(_output_report.data) - 1; + data = &_output_report.data[1]; + result = Send; + break; + default: + break; + } + } + + complete_request(result, data, size); +} + +void USBHID::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) +{ + (void)aborted; + complete_request_xfer_done(true); +} + + +#define DEFAULT_CONFIGURATION (1) + + +// Called in ISR context +// Set configuration. Return false if the +// configuration is not supported +void USBHID::callback_set_configuration(uint8_t configuration) +{ + if (configuration == DEFAULT_CONFIGURATION) { + complete_set_configuration(false); + } + + // Configure endpoints > 0 + endpoint_add(_int_in, MAX_HID_REPORT_SIZE, USB_EP_TYPE_INT, &USBHID::_send_isr); + endpoint_add(_int_out, MAX_HID_REPORT_SIZE, USB_EP_TYPE_INT, &USBHID::_read_isr); + + // We activate the endpoint to be able to recceive data + read_start(_int_out, (uint8_t *)&_output_report, MAX_HID_REPORT_SIZE); + _read_idle = false; + + + complete_set_configuration(true); +} + +void USBHID::callback_set_interface(uint16_t interface, uint8_t alternate) +{ + assert_locked(); + complete_set_interface(true); +} + + +const uint8_t *USBHID::string_iinterface_desc() +{ + static const uint8_t stringIinterfaceDescriptor[] = { + 0x08, //bLength + STRING_DESCRIPTOR, //bDescriptorType 0x03 + 'H', 0, 'I', 0, 'D', 0, //bString iInterface - HID + }; + return stringIinterfaceDescriptor; +} + +const uint8_t *USBHID::string_iproduct_desc() +{ + static const uint8_t stringIproductDescriptor[] = { + 0x16, //bLength + STRING_DESCRIPTOR, //bDescriptorType 0x03 + 'H', 0, 'I', 0, 'D', 0, ' ', 0, 'D', 0, 'E', 0, 'V', 0, 'I', 0, 'C', 0, 'E', 0 //bString iProduct - HID device + }; + return stringIproductDescriptor; +} + + + +const uint8_t *USBHID::report_desc() +{ + uint8_t reportDescriptorTemp[] = { + USAGE_PAGE(2), LSB(0xFFAB), MSB(0xFFAB), + USAGE(2), LSB(0x0200), MSB(0x0200), + COLLECTION(1), 0x01, // Collection (Application) + + REPORT_SIZE(1), 0x08, // 8 bits + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0xFF, + + REPORT_COUNT(1), _input_length, + USAGE(1), 0x01, + INPUT(1), 0x02, // Data, Var, Abs + + REPORT_COUNT(1), _output_length, + USAGE(1), 0x02, + OUTPUT(1), 0x02, // Data, Var, Abs + + END_COLLECTION(0), + }; + reportLength = sizeof(reportDescriptor); + MBED_ASSERT(sizeof(reportDescriptorTemp) == sizeof(reportDescriptor)); + memcpy(reportDescriptor, reportDescriptorTemp, sizeof(reportDescriptor)); + return reportDescriptor; +} + +#define DEFAULT_CONFIGURATION (1) +#define TOTAL_DESCRIPTOR_LENGTH ((1 * CONFIGURATION_DESCRIPTOR_LENGTH) \ + + (1 * INTERFACE_DESCRIPTOR_LENGTH) \ + + (1 * HID_DESCRIPTOR_LENGTH) \ + + (2 * ENDPOINT_DESCRIPTOR_LENGTH)) + +const uint8_t *USBHID::configuration_desc(uint8_t index) +{ + if (index != 0) { + return NULL; + } + + uint8_t configurationDescriptorTemp[] = { + CONFIGURATION_DESCRIPTOR_LENGTH, // bLength + CONFIGURATION_DESCRIPTOR, // bDescriptorType + LSB(TOTAL_DESCRIPTOR_LENGTH), // wTotalLength (LSB) + MSB(TOTAL_DESCRIPTOR_LENGTH), // wTotalLength (MSB) + 0x01, // bNumInterfaces + DEFAULT_CONFIGURATION, // bConfigurationValue + 0x00, // iConfiguration + C_RESERVED | C_SELF_POWERED, // bmAttributes + C_POWER(0), // bMaxPower + + INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0x00, // bInterfaceNumber + 0x00, // bAlternateSetting + 0x02, // bNumEndpoints + HID_CLASS, // bInterfaceClass + HID_SUBCLASS_NONE, // bInterfaceSubClass + HID_PROTOCOL_NONE, // bInterfaceProtocol + 0x00, // iInterface + + HID_DESCRIPTOR_LENGTH, // bLength + HID_DESCRIPTOR, // bDescriptorType + LSB(HID_VERSION_1_11), // bcdHID (LSB) + MSB(HID_VERSION_1_11), // bcdHID (MSB) + 0x00, // bCountryCode + 0x01, // bNumDescriptors + REPORT_DESCRIPTOR, // bDescriptorType + (uint8_t)(LSB(report_desc_length())), // wDescriptorLength (LSB) + (uint8_t)(MSB(report_desc_length())), // wDescriptorLength (MSB) + + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _int_in, // bEndpointAddress + E_INTERRUPT, // bmAttributes + LSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval (milliseconds) + + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _int_out, // bEndpointAddress + E_INTERRUPT, // bmAttributes + LSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval (milliseconds) + }; + MBED_ASSERT(sizeof(configurationDescriptorTemp) == sizeof(_configuration_descriptor)); + memcpy(_configuration_descriptor, configurationDescriptorTemp, sizeof(_configuration_descriptor)); + return _configuration_descriptor; +} diff --git a/usb/device/USBHID/USBHID.h b/usb/device/USBHID/USBHID.h new file mode 100644 index 00000000000..015ad355063 --- /dev/null +++ b/usb/device/USBHID/USBHID.h @@ -0,0 +1,274 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USB_HID_H +#define USB_HID_H + +/* These headers are included for child class. */ +#include "USBDescriptor.h" +#include "USBDevice.h" + +#include "USBHID_Types.h" +#include "AsyncOp.h" +#include "LinkedList.h" + + + +/** + * USBHID example + * @code + * #include "mbed.h" + * #include "USBHID.h" + * + * USBHID hid; + * HID_REPORT recv; + * BusOut leds(LED1,LED2,LED3,LED4); + * + * int main(void) { + * while (1) { + * hid.read(&recv); + * leds = recv.data[0]; + * } + * } + * @endcode + */ + +class USBHID: public USBDevice { +public: + + /** + * Basic constructor + * + * Construct this object optionally connecting and blocking until it is ready. + * + * @note Do not use this constructor in derived classes. + * + * @param connect_blocking true to perform a blocking connect, false to start in a disconnected state + * @param output_report_length Maximum length of a sent report (up to 64 bytes) + * @param input_report_length Maximum length of a received report (up to 64 bytes) + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBHID(bool connect_blocking = true, uint8_t output_report_length = 64, uint8_t input_report_length = 64, uint16_t vendor_id = 0x1234, uint16_t product_id = 0x0006, uint16_t product_release = 0x0001); + + /** + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. + * + * @param phy USB phy to use + * @param output_report_length Maximum length of a sent report (up to 64 bytes) + * @param input_report_length Maximum length of a received report (up to 64 bytes) + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBHID(USBPhy *phy, uint8_t output_report_length, uint8_t input_report_length, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ + virtual ~USBHID(); + + /** + * Check if this class is ready + * + * @return true if the device is in the configured state + */ + bool ready(); + + /** + * Block until this HID device is in the configured state + */ + void wait_ready(); + + /** + * Send a Report. warning: blocking + * + * @param report Report which will be sent (a report is defined by all data and the length) + * @returns true if successful + */ + bool send(const HID_REPORT *report); + + + /** + * Send a Report. warning: non blocking + * + * @param report Report which will be sent (a report is defined by all data and the length) + * @returns true if successful + */ + bool send_nb(const HID_REPORT *report); + + /** + * Read a report: blocking + * + * @param report pointer to the report to fill + * @returns true if successful + */ + bool read(HID_REPORT *report); + + /** + * Read a report: non blocking + * + * @param report pointer to the report to fill + * @returns true if successful + */ + bool read_nb(HID_REPORT *report); + +protected: + uint16_t reportLength; + uint8_t reportDescriptor[27]; + + /* + * Get the Report descriptor + * + * @returns pointer to the report descriptor + */ + virtual const uint8_t *report_desc(); + + /* + * Get the length of the report descriptor + * + * @returns the length of the report descriptor + */ + virtual uint16_t report_desc_length(); + + /* + * Get string product descriptor + * + * @returns pointer to the string product descriptor + */ + virtual const uint8_t *string_iproduct_desc(); + + /* + * Get string interface descriptor + * + * @returns pointer to the string interface descriptor + */ + virtual const uint8_t *string_iinterface_desc(); + + /* + * Get configuration descriptor + * + * @returns pointer to the configuration descriptor + */ + virtual const uint8_t *configuration_desc(uint8_t index); + + + /* + * HID Report received by SET_REPORT request. Warning: Called in ISR context + * First byte of data will be the report ID + * + * @param report Data and length received + */ + virtual void HID_callbackSetReport(HID_REPORT *report) {}; + + /** + * Called when USB changes state + * + * @param new_state The new state of the USBDevice + * + * Warning: Called in ISR context + */ + virtual void callback_state_change(DeviceState new_state); + + /* + * This is used to handle extensions to standard requests + * and class specific requests + */ + virtual void callback_request(const setup_packet_t *setup); + + /* + * This is used to handle extensions to standard requests + * and class specific requests with a data phase + */ + virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); + + + /* + * Called by USBDevice layer. Set configuration of the device. + * For instance, you can add all endpoints that you need on this function. + * + * @param configuration Number of the configuration + * @returns true if class handles this request + */ + virtual void callback_set_configuration(uint8_t configuration); + + /* + * Called by USBDevice layer in response to set_interface. + * + * Upon reception of this command endpoints of any previous interface + * if any must be removed with endpoint_remove and new endpoint added with + * endpoint_add. + * + * @param configuration Number of the configuration + * + * Warning: Called in ISR context + */ + virtual void callback_set_interface(uint16_t interface, uint8_t alternate); + + /* + * Called when there is a hid report that can be read + */ + virtual void report_rx() {} + + /* + * Called when there is space to send a hid report + */ + virtual void report_tx() {} + +protected: + usb_ep_t _int_in; + usb_ep_t _int_out; + +private: + void _init(uint8_t output_report_length, uint8_t input_report_length); + void _send_isr(usb_ep_t endpoint); + void _read_isr(usb_ep_t endpoint); + + void _connect_wake_all(); + void _send_abort_all(); + void _read_abort_all(); + + class AsyncSend; + class AsyncRead; + + LinkedList _connect_list; + LinkedList _send_list; + bool _send_idle; + LinkedList _read_list; + bool _read_idle; + + uint8_t _configuration_descriptor[41]; + HID_REPORT _input_report; + HID_REPORT _output_report; + uint8_t _output_length; + uint8_t _input_length; + + +}; + +#endif diff --git a/usb/device/USBHID/USBHID_Types.h b/usb/device/USBHID/USBHID_Types.h new file mode 100644 index 00000000000..e2604a34a6b --- /dev/null +++ b/usb/device/USBHID/USBHID_Types.h @@ -0,0 +1,92 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBCLASS_HID_TYPES +#define USBCLASS_HID_TYPES + +#include + +/* */ +#define HID_VERSION_1_11 (0x0111) + +/* HID Class */ +#define HID_CLASS (3) +#define HID_SUBCLASS_NONE (0) +#define HID_SUBCLASS_BOOT (1) +#define HID_PROTOCOL_NONE (0) +#define HID_PROTOCOL_KEYBOARD (1) +#define HID_PROTOCOL_MOUSE (2) + +/* Descriptors */ +#define HID_DESCRIPTOR (33) +#define HID_DESCRIPTOR_LENGTH (0x09) +#define REPORT_DESCRIPTOR (34) + +/* Class requests */ +#define GET_REPORT (0x1) +#define GET_IDLE (0x2) +#define SET_REPORT (0x9) +#define SET_IDLE (0xa) + +/* HID Class Report Descriptor */ +/* Short items: size is 0, 1, 2 or 3 specifying 0, 1, 2 or 4 (four) bytes */ +/* of data as per HID Class standard */ + +/* Main items */ +#define INPUT(size) (0x80 | size) +#define OUTPUT(size) (0x90 | size) +#define FEATURE(size) (0xb0 | size) +#define COLLECTION(size) (0xa0 | size) +#define END_COLLECTION(size) (0xc0 | size) + +/* Global items */ +#define USAGE_PAGE(size) (0x04 | size) +#define LOGICAL_MINIMUM(size) (0x14 | size) +#define LOGICAL_MAXIMUM(size) (0x24 | size) +#define PHYSICAL_MINIMUM(size) (0x34 | size) +#define PHYSICAL_MAXIMUM(size) (0x44 | size) +#define UNIT_EXPONENT(size) (0x54 | size) +#define UNIT(size) (0x64 | size) +#define REPORT_SIZE(size) (0x74 | size) +#define REPORT_ID(size) (0x84 | size) +#define REPORT_COUNT(size) (0x94 | size) +#define PUSH(size) (0xa4 | size) +#define POP(size) (0xb4 | size) + +/* Local items */ +#define USAGE(size) (0x08 | size) +#define USAGE_MINIMUM(size) (0x18 | size) +#define USAGE_MAXIMUM(size) (0x28 | size) +#define DESIGNATOR_INDEX(size) (0x38 | size) +#define DESIGNATOR_MINIMUM(size) (0x48 | size) +#define DESIGNATOR_MAXIMUM(size) (0x58 | size) +#define STRING_INDEX(size) (0x78 | size) +#define STRING_MINIMUM(size) (0x88 | size) +#define STRING_MAXIMUM(size) (0x98 | size) +#define DELIMITER(size) (0xa8 | size) + +/* HID Report */ +/* Where report IDs are used the first byte of 'data' will be the */ +/* report ID and 'length' will include this report ID byte. */ + +#define MAX_HID_REPORT_SIZE (64) + +typedef struct { + uint32_t length; + uint8_t data[MAX_HID_REPORT_SIZE]; +} HID_REPORT; + +#endif diff --git a/usb/device/USBHID/USBKeyboard.cpp b/usb/device/USBHID/USBKeyboard.cpp new file mode 100644 index 00000000000..5a9cd9ce467 --- /dev/null +++ b/usb/device/USBHID/USBKeyboard.cpp @@ -0,0 +1,604 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" + +#include "USBKeyboard.h" +#include "usb_phy_api.h" + +#define REPORT_ID_KEYBOARD 1 +#define REPORT_ID_VOLUME 3 + + +typedef struct { + unsigned char usage; + unsigned char modifier; +} KEYMAP; + +#ifdef US_KEYBOARD +/* US keyboard (as HID standard) */ +#define KEYMAP_SIZE (152) +const KEYMAP keymap[KEYMAP_SIZE] = { + {0, 0}, /* NUL */ + {0, 0}, /* SOH */ + {0, 0}, /* STX */ + {0, 0}, /* ETX */ + {0, 0}, /* EOT */ + {0, 0}, /* ENQ */ + {0, 0}, /* ACK */ + {0, 0}, /* BEL */ + {0x2a, 0}, /* BS */ /* Keyboard Delete (Backspace) */ + {0x2b, 0}, /* TAB */ /* Keyboard Tab */ + {0x28, 0}, /* LF */ /* Keyboard Return (Enter) */ + {0, 0}, /* VT */ + {0, 0}, /* FF */ + {0, 0}, /* CR */ + {0, 0}, /* SO */ + {0, 0}, /* SI */ + {0, 0}, /* DEL */ + {0, 0}, /* DC1 */ + {0, 0}, /* DC2 */ + {0, 0}, /* DC3 */ + {0, 0}, /* DC4 */ + {0, 0}, /* NAK */ + {0, 0}, /* SYN */ + {0, 0}, /* ETB */ + {0, 0}, /* CAN */ + {0, 0}, /* EM */ + {0, 0}, /* SUB */ + {0, 0}, /* ESC */ + {0, 0}, /* FS */ + {0, 0}, /* GS */ + {0, 0}, /* RS */ + {0, 0}, /* US */ + {0x2c, 0}, /* */ + {0x1e, KEY_SHIFT}, /* ! */ + {0x34, KEY_SHIFT}, /* " */ + {0x20, KEY_SHIFT}, /* # */ + {0x21, KEY_SHIFT}, /* $ */ + {0x22, KEY_SHIFT}, /* % */ + {0x24, KEY_SHIFT}, /* & */ + {0x34, 0}, /* ' */ + {0x26, KEY_SHIFT}, /* ( */ + {0x27, KEY_SHIFT}, /* ) */ + {0x25, KEY_SHIFT}, /* * */ + {0x2e, KEY_SHIFT}, /* + */ + {0x36, 0}, /* , */ + {0x2d, 0}, /* - */ + {0x37, 0}, /* . */ + {0x38, 0}, /* / */ + {0x27, 0}, /* 0 */ + {0x1e, 0}, /* 1 */ + {0x1f, 0}, /* 2 */ + {0x20, 0}, /* 3 */ + {0x21, 0}, /* 4 */ + {0x22, 0}, /* 5 */ + {0x23, 0}, /* 6 */ + {0x24, 0}, /* 7 */ + {0x25, 0}, /* 8 */ + {0x26, 0}, /* 9 */ + {0x33, KEY_SHIFT}, /* : */ + {0x33, 0}, /* ; */ + {0x36, KEY_SHIFT}, /* < */ + {0x2e, 0}, /* = */ + {0x37, KEY_SHIFT}, /* > */ + {0x38, KEY_SHIFT}, /* ? */ + {0x1f, KEY_SHIFT}, /* @ */ + {0x04, KEY_SHIFT}, /* A */ + {0x05, KEY_SHIFT}, /* B */ + {0x06, KEY_SHIFT}, /* C */ + {0x07, KEY_SHIFT}, /* D */ + {0x08, KEY_SHIFT}, /* E */ + {0x09, KEY_SHIFT}, /* F */ + {0x0a, KEY_SHIFT}, /* G */ + {0x0b, KEY_SHIFT}, /* H */ + {0x0c, KEY_SHIFT}, /* I */ + {0x0d, KEY_SHIFT}, /* J */ + {0x0e, KEY_SHIFT}, /* K */ + {0x0f, KEY_SHIFT}, /* L */ + {0x10, KEY_SHIFT}, /* M */ + {0x11, KEY_SHIFT}, /* N */ + {0x12, KEY_SHIFT}, /* O */ + {0x13, KEY_SHIFT}, /* P */ + {0x14, KEY_SHIFT}, /* Q */ + {0x15, KEY_SHIFT}, /* R */ + {0x16, KEY_SHIFT}, /* S */ + {0x17, KEY_SHIFT}, /* T */ + {0x18, KEY_SHIFT}, /* U */ + {0x19, KEY_SHIFT}, /* V */ + {0x1a, KEY_SHIFT}, /* W */ + {0x1b, KEY_SHIFT}, /* X */ + {0x1c, KEY_SHIFT}, /* Y */ + {0x1d, KEY_SHIFT}, /* Z */ + {0x2f, 0}, /* [ */ + {0x31, 0}, /* \ */ + {0x30, 0}, /* ] */ + {0x23, KEY_SHIFT}, /* ^ */ + {0x2d, KEY_SHIFT}, /* _ */ + {0x35, 0}, /* ` */ + {0x04, 0}, /* a */ + {0x05, 0}, /* b */ + {0x06, 0}, /* c */ + {0x07, 0}, /* d */ + {0x08, 0}, /* e */ + {0x09, 0}, /* f */ + {0x0a, 0}, /* g */ + {0x0b, 0}, /* h */ + {0x0c, 0}, /* i */ + {0x0d, 0}, /* j */ + {0x0e, 0}, /* k */ + {0x0f, 0}, /* l */ + {0x10, 0}, /* m */ + {0x11, 0}, /* n */ + {0x12, 0}, /* o */ + {0x13, 0}, /* p */ + {0x14, 0}, /* q */ + {0x15, 0}, /* r */ + {0x16, 0}, /* s */ + {0x17, 0}, /* t */ + {0x18, 0}, /* u */ + {0x19, 0}, /* v */ + {0x1a, 0}, /* w */ + {0x1b, 0}, /* x */ + {0x1c, 0}, /* y */ + {0x1d, 0}, /* z */ + {0x2f, KEY_SHIFT}, /* { */ + {0x31, KEY_SHIFT}, /* | */ + {0x30, KEY_SHIFT}, /* } */ + {0x35, KEY_SHIFT}, /* ~ */ + {0, 0}, /* DEL */ + + {0x3a, 0}, /* F1 */ + {0x3b, 0}, /* F2 */ + {0x3c, 0}, /* F3 */ + {0x3d, 0}, /* F4 */ + {0x3e, 0}, /* F5 */ + {0x3f, 0}, /* F6 */ + {0x40, 0}, /* F7 */ + {0x41, 0}, /* F8 */ + {0x42, 0}, /* F9 */ + {0x43, 0}, /* F10 */ + {0x44, 0}, /* F11 */ + {0x45, 0}, /* F12 */ + + {0x46, 0}, /* PRINT_SCREEN */ + {0x47, 0}, /* SCROLL_LOCK */ + {0x39, 0}, /* CAPS_LOCK */ + {0x53, 0}, /* NUM_LOCK */ + {0x49, 0}, /* INSERT */ + {0x4a, 0}, /* HOME */ + {0x4b, 0}, /* PAGE_UP */ + {0x4e, 0}, /* PAGE_DOWN */ + + {0x4f, 0}, /* RIGHT_ARROW */ + {0x50, 0}, /* LEFT_ARROW */ + {0x51, 0}, /* DOWN_ARROW */ + {0x52, 0}, /* UP_ARROW */ +}; + +#else +/* UK keyboard */ +#define KEYMAP_SIZE (152) +const KEYMAP keymap[KEYMAP_SIZE] = { + {0, 0}, /* NUL */ + {0, 0}, /* SOH */ + {0, 0}, /* STX */ + {0, 0}, /* ETX */ + {0, 0}, /* EOT */ + {0, 0}, /* ENQ */ + {0, 0}, /* ACK */ + {0, 0}, /* BEL */ + {0x2a, 0}, /* BS */ /* Keyboard Delete (Backspace) */ + {0x2b, 0}, /* TAB */ /* Keyboard Tab */ + {0x28, 0}, /* LF */ /* Keyboard Return (Enter) */ + {0, 0}, /* VT */ + {0, 0}, /* FF */ + {0, 0}, /* CR */ + {0, 0}, /* SO */ + {0, 0}, /* SI */ + {0, 0}, /* DEL */ + {0, 0}, /* DC1 */ + {0, 0}, /* DC2 */ + {0, 0}, /* DC3 */ + {0, 0}, /* DC4 */ + {0, 0}, /* NAK */ + {0, 0}, /* SYN */ + {0, 0}, /* ETB */ + {0, 0}, /* CAN */ + {0, 0}, /* EM */ + {0, 0}, /* SUB */ + {0, 0}, /* ESC */ + {0, 0}, /* FS */ + {0, 0}, /* GS */ + {0, 0}, /* RS */ + {0, 0}, /* US */ + {0x2c, 0}, /* */ + {0x1e, KEY_SHIFT}, /* ! */ + {0x1f, KEY_SHIFT}, /* " */ + {0x32, 0}, /* # */ + {0x21, KEY_SHIFT}, /* $ */ + {0x22, KEY_SHIFT}, /* % */ + {0x24, KEY_SHIFT}, /* & */ + {0x34, 0}, /* ' */ + {0x26, KEY_SHIFT}, /* ( */ + {0x27, KEY_SHIFT}, /* ) */ + {0x25, KEY_SHIFT}, /* * */ + {0x2e, KEY_SHIFT}, /* + */ + {0x36, 0}, /* , */ + {0x2d, 0}, /* - */ + {0x37, 0}, /* . */ + {0x38, 0}, /* / */ + {0x27, 0}, /* 0 */ + {0x1e, 0}, /* 1 */ + {0x1f, 0}, /* 2 */ + {0x20, 0}, /* 3 */ + {0x21, 0}, /* 4 */ + {0x22, 0}, /* 5 */ + {0x23, 0}, /* 6 */ + {0x24, 0}, /* 7 */ + {0x25, 0}, /* 8 */ + {0x26, 0}, /* 9 */ + {0x33, KEY_SHIFT}, /* : */ + {0x33, 0}, /* ; */ + {0x36, KEY_SHIFT}, /* < */ + {0x2e, 0}, /* = */ + {0x37, KEY_SHIFT}, /* > */ + {0x38, KEY_SHIFT}, /* ? */ + {0x34, KEY_SHIFT}, /* @ */ + {0x04, KEY_SHIFT}, /* A */ + {0x05, KEY_SHIFT}, /* B */ + {0x06, KEY_SHIFT}, /* C */ + {0x07, KEY_SHIFT}, /* D */ + {0x08, KEY_SHIFT}, /* E */ + {0x09, KEY_SHIFT}, /* F */ + {0x0a, KEY_SHIFT}, /* G */ + {0x0b, KEY_SHIFT}, /* H */ + {0x0c, KEY_SHIFT}, /* I */ + {0x0d, KEY_SHIFT}, /* J */ + {0x0e, KEY_SHIFT}, /* K */ + {0x0f, KEY_SHIFT}, /* L */ + {0x10, KEY_SHIFT}, /* M */ + {0x11, KEY_SHIFT}, /* N */ + {0x12, KEY_SHIFT}, /* O */ + {0x13, KEY_SHIFT}, /* P */ + {0x14, KEY_SHIFT}, /* Q */ + {0x15, KEY_SHIFT}, /* R */ + {0x16, KEY_SHIFT}, /* S */ + {0x17, KEY_SHIFT}, /* T */ + {0x18, KEY_SHIFT}, /* U */ + {0x19, KEY_SHIFT}, /* V */ + {0x1a, KEY_SHIFT}, /* W */ + {0x1b, KEY_SHIFT}, /* X */ + {0x1c, KEY_SHIFT}, /* Y */ + {0x1d, KEY_SHIFT}, /* Z */ + {0x2f, 0}, /* [ */ + {0x64, 0}, /* \ */ + {0x30, 0}, /* ] */ + {0x23, KEY_SHIFT}, /* ^ */ + {0x2d, KEY_SHIFT}, /* _ */ + {0x35, 0}, /* ` */ + {0x04, 0}, /* a */ + {0x05, 0}, /* b */ + {0x06, 0}, /* c */ + {0x07, 0}, /* d */ + {0x08, 0}, /* e */ + {0x09, 0}, /* f */ + {0x0a, 0}, /* g */ + {0x0b, 0}, /* h */ + {0x0c, 0}, /* i */ + {0x0d, 0}, /* j */ + {0x0e, 0}, /* k */ + {0x0f, 0}, /* l */ + {0x10, 0}, /* m */ + {0x11, 0}, /* n */ + {0x12, 0}, /* o */ + {0x13, 0}, /* p */ + {0x14, 0}, /* q */ + {0x15, 0}, /* r */ + {0x16, 0}, /* s */ + {0x17, 0}, /* t */ + {0x18, 0}, /* u */ + {0x19, 0}, /* v */ + {0x1a, 0}, /* w */ + {0x1b, 0}, /* x */ + {0x1c, 0}, /* y */ + {0x1d, 0}, /* z */ + {0x2f, KEY_SHIFT}, /* { */ + {0x64, KEY_SHIFT}, /* | */ + {0x30, KEY_SHIFT}, /* } */ + {0x32, KEY_SHIFT}, /* ~ */ + {0, 0}, /* DEL */ + + {0x3a, 0}, /* F1 */ + {0x3b, 0}, /* F2 */ + {0x3c, 0}, /* F3 */ + {0x3d, 0}, /* F4 */ + {0x3e, 0}, /* F5 */ + {0x3f, 0}, /* F6 */ + {0x40, 0}, /* F7 */ + {0x41, 0}, /* F8 */ + {0x42, 0}, /* F9 */ + {0x43, 0}, /* F10 */ + {0x44, 0}, /* F11 */ + {0x45, 0}, /* F12 */ + + {0x46, 0}, /* PRINT_SCREEN */ + {0x47, 0}, /* SCROLL_LOCK */ + {0x39, 0}, /* CAPS_LOCK */ + {0x53, 0}, /* NUM_LOCK */ + {0x49, 0}, /* INSERT */ + {0x4a, 0}, /* HOME */ + {0x4b, 0}, /* PAGE_UP */ + {0x4e, 0}, /* PAGE_DOWN */ + + {0x4f, 0}, /* RIGHT_ARROW */ + {0x50, 0}, /* LEFT_ARROW */ + {0x51, 0}, /* DOWN_ARROW */ + {0x52, 0}, /* UP_ARROW */ +}; +#endif + + +USBKeyboard::USBKeyboard(bool connect, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBHID(get_usb_phy(), 0, 0, vendor_id, product_id, product_release) +{ + _lock_status = 0; + if (connect) { + USBDevice::connect(); + wait_ready(); + } else { + init(); + } +} + +USBKeyboard::USBKeyboard(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBHID(phy, 0, 0, vendor_id, product_id, product_release) +{ + _lock_status = 0; + + // User or child responsible for calling connect or init +} + +USBKeyboard::~USBKeyboard() +{ + deinit(); +} + +const uint8_t *USBKeyboard::report_desc() +{ + static const uint8_t reportDescriptor[] = { + USAGE_PAGE(1), 0x01, // Generic Desktop + USAGE(1), 0x06, // Keyboard + COLLECTION(1), 0x01, // Application + REPORT_ID(1), REPORT_ID_KEYBOARD, + + USAGE_PAGE(1), 0x07, // Key Codes + USAGE_MINIMUM(1), 0xE0, + USAGE_MAXIMUM(1), 0xE7, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x01, + REPORT_SIZE(1), 0x01, + REPORT_COUNT(1), 0x08, + INPUT(1), 0x02, // Data, Variable, Absolute + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x08, + INPUT(1), 0x01, // Constant + + + REPORT_COUNT(1), 0x05, + REPORT_SIZE(1), 0x01, + USAGE_PAGE(1), 0x08, // LEDs + USAGE_MINIMUM(1), 0x01, + USAGE_MAXIMUM(1), 0x05, + OUTPUT(1), 0x02, // Data, Variable, Absolute + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x03, + OUTPUT(1), 0x01, // Constant + + + REPORT_COUNT(1), 0x06, + REPORT_SIZE(1), 0x08, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x65, + USAGE_PAGE(1), 0x07, // Key Codes + USAGE_MINIMUM(1), 0x00, + USAGE_MAXIMUM(1), 0x65, + INPUT(1), 0x00, // Data, Array + END_COLLECTION(0), + + // Media Control + USAGE_PAGE(1), 0x0C, + USAGE(1), 0x01, + COLLECTION(1), 0x01, + REPORT_ID(1), REPORT_ID_VOLUME, + USAGE_PAGE(1), 0x0C, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x01, + REPORT_SIZE(1), 0x01, + REPORT_COUNT(1), 0x07, + USAGE(1), 0xB5, // Next Track + USAGE(1), 0xB6, // Previous Track + USAGE(1), 0xB7, // Stop + USAGE(1), 0xCD, // Play / Pause + USAGE(1), 0xE2, // Mute + USAGE(1), 0xE9, // Volume Up + USAGE(1), 0xEA, // Volume Down + INPUT(1), 0x02, // Input (Data, Variable, Absolute) + REPORT_COUNT(1), 0x01, + INPUT(1), 0x01, + END_COLLECTION(0), + }; + reportLength = sizeof(reportDescriptor); + return reportDescriptor; +} + + +void USBKeyboard::report_rx() +{ + assert_locked(); + + HID_REPORT report; + read_nb(&report); + + // we take [1] because [0] is the report ID + _lock_status = report.data[1] & 0x07; +} + +uint8_t USBKeyboard::lock_status() +{ + return _lock_status; +} + +int USBKeyboard::_putc(int c) +{ + return key_code(c, keymap[c].modifier); +} + +bool USBKeyboard::key_code(uint8_t key, uint8_t modifier) +{ + _mutex.lock(); + + // Send a simulated keyboard keypress. Returns true if successful. + HID_REPORT report; + + report.data[0] = REPORT_ID_KEYBOARD; + report.data[1] = modifier; + report.data[2] = 0; + report.data[3] = keymap[key].usage; + report.data[4] = 0; + report.data[5] = 0; + report.data[6] = 0; + report.data[7] = 0; + report.data[8] = 0; + + report.length = 9; + + if (!send(&report)) { + _mutex.unlock(); + return false; + } + + report.data[1] = 0; + report.data[3] = 0; + + if (!send(&report)) { + _mutex.unlock(); + return false; + } + + _mutex.unlock(); + return true; + +} + + +bool USBKeyboard::media_control(MEDIA_KEY key) +{ + _mutex.lock(); + + HID_REPORT report; + + report.data[0] = REPORT_ID_VOLUME; + report.data[1] = (1 << key) & 0x7f; + + report.length = 2; + + if (!send(&report)) { + _mutex.unlock(); + return false; + } + + report.data[0] = REPORT_ID_VOLUME; + report.data[1] = 0; + + report.length = 2; + + if (!send(&report)) { + _mutex.unlock(); + return false; + } + + _mutex.unlock(); + return true; +} + +#define DEFAULT_CONFIGURATION (1) +#define TOTAL_DESCRIPTOR_LENGTH ((1 * CONFIGURATION_DESCRIPTOR_LENGTH) \ + + (1 * INTERFACE_DESCRIPTOR_LENGTH) \ + + (1 * HID_DESCRIPTOR_LENGTH) \ + + (2 * ENDPOINT_DESCRIPTOR_LENGTH)) + +const uint8_t *USBKeyboard::configuration_desc(uint8_t index) +{ + if (index != 0) { + return NULL; + } + uint8_t configuration_descriptor_temp[] = { + CONFIGURATION_DESCRIPTOR_LENGTH, // bLength + CONFIGURATION_DESCRIPTOR, // bDescriptorType + LSB(TOTAL_DESCRIPTOR_LENGTH), // wTotalLength (LSB) + MSB(TOTAL_DESCRIPTOR_LENGTH), // wTotalLength (MSB) + 0x01, // bNumInterfaces + DEFAULT_CONFIGURATION, // bConfigurationValue + 0x00, // iConfiguration + C_RESERVED | C_SELF_POWERED, // bmAttributes + C_POWER(0), // bMaxPower + + INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0x00, // bInterfaceNumber + 0x00, // bAlternateSetting + 0x02, // bNumEndpoints + HID_CLASS, // bInterfaceClass + HID_SUBCLASS_BOOT, // bInterfaceSubClass + HID_PROTOCOL_KEYBOARD, // bInterfaceProtocol + 0x00, // iInterface + + HID_DESCRIPTOR_LENGTH, // bLength + HID_DESCRIPTOR, // bDescriptorType + LSB(HID_VERSION_1_11), // bcdHID (LSB) + MSB(HID_VERSION_1_11), // bcdHID (MSB) + 0x00, // bCountryCode + 0x01, // bNumDescriptors + REPORT_DESCRIPTOR, // bDescriptorType + (uint8_t)(LSB(report_desc_length())), // wDescriptorLength (LSB) + (uint8_t)(MSB(report_desc_length())), // wDescriptorLength (MSB) + + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _int_in, // bEndpointAddress + E_INTERRUPT, // bmAttributes + LSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval (milliseconds) + + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _int_out, // bEndpointAddress + E_INTERRUPT, // bmAttributes + LSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval (milliseconds) + }; + MBED_ASSERT(sizeof(configuration_descriptor_temp) == sizeof(_configuration_descriptor)); + memcpy(_configuration_descriptor, configuration_descriptor_temp, sizeof(_configuration_descriptor)); + return _configuration_descriptor; +} + +int USBKeyboard::_getc() +{ + return -1; +} diff --git a/usb/device/USBHID/USBKeyboard.h b/usb/device/USBHID/USBKeyboard.h new file mode 100644 index 00000000000..d2f8a765a82 --- /dev/null +++ b/usb/device/USBHID/USBKeyboard.h @@ -0,0 +1,211 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBKEYBOARD_H +#define USBKEYBOARD_H + +#include "USBHID.h" +#include "Stream.h" +#include "PlatformMutex.h" + +/* Modifiers, left keys then right keys. */ +enum MODIFIER_KEY { + KEY_CTRL = 0x01, + KEY_SHIFT = 0x02, + KEY_ALT = 0x04, + KEY_LOGO = 0x08, + KEY_RCTRL = 0x10, + KEY_RSHIFT = 0x20, + KEY_RALT = 0x40, + KEY_RLOGO = 0x80, +}; + + +enum MEDIA_KEY { + KEY_NEXT_TRACK, /*!< next Track Button */ + KEY_PREVIOUS_TRACK, /*!< Previous track Button */ + KEY_STOP, /*!< Stop Button */ + KEY_PLAY_PAUSE, /*!< Play/Pause Button */ + KEY_MUTE, /*!< Mute Button */ + KEY_VOLUME_UP, /*!< Volume Up Button */ + KEY_VOLUME_DOWN, /*!< Volume Down Button */ +}; + +enum FUNCTION_KEY { + KEY_F1 = 128, /* F1 key */ + KEY_F2, /* F2 key */ + KEY_F3, /* F3 key */ + KEY_F4, /* F4 key */ + KEY_F5, /* F5 key */ + KEY_F6, /* F6 key */ + KEY_F7, /* F7 key */ + KEY_F8, /* F8 key */ + KEY_F9, /* F9 key */ + KEY_F10, /* F10 key */ + KEY_F11, /* F11 key */ + KEY_F12, /* F12 key */ + + KEY_PRINT_SCREEN, /* Print Screen key */ + KEY_SCROLL_LOCK, /* Scroll lock */ + KEY_CAPS_LOCK, /* caps lock */ + KEY_NUM_LOCK, /* num lock */ + KEY_INSERT, /* Insert key */ + KEY_HOME, /* Home key */ + KEY_PAGE_UP, /* Page Up key */ + KEY_PAGE_DOWN, /* Page Down key */ + + RIGHT_ARROW, /* Right arrow */ + LEFT_ARROW, /* Left arrow */ + DOWN_ARROW, /* Down arrow */ + UP_ARROW, /* Up arrow */ +}; + +/** + * USBKeyboard example + * @code + * + * #include "mbed.h" + * #include "USBKeyboard.h" + * + * USBKeyboard key; + * + * int main(void) + * { + * while (1) { + * key.printf("Hello World\r\n"); + * wait(1); + * } + * } + * + * @endcode + * + * @note Synchronization level: Thread safe + */ +class USBKeyboard: public USBHID, public Stream { +public: + + /** + * Basic constructor + * + * Construct this object optionally connecting and blocking until it is ready. + * + * @note Do not use this constructor in derived classes. + * + * @param connect_blocking true to perform a blocking connect, false to start in a disconnected state + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBKeyboard(bool connect_blocking = true, uint16_t vendor_id = 0x1235, uint16_t product_id = 0x0050, uint16_t product_release = 0x0001); + + /** + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. + * + * @param phy USB phy to use + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBKeyboard(USBPhy *phy, uint16_t vendor_id = 0x1235, uint16_t product_id = 0x0050, uint16_t product_release = 0x0001); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ + virtual ~USBKeyboard(); + + /** + * To send a character defined by a modifier(CTRL, SHIFT, ALT) and the key + * + * @code + * //To send CTRL + s (save) + * keyboard.key_code('s', KEY_CTRL); + * @endcode + * + * @param modifier bit 0: KEY_CTRL, bit 1: KEY_SHIFT, bit 2: KEY_ALT (default: 0) + * @param key character to send + * @returns true if there is no error, false otherwise + */ + bool key_code(uint8_t key, uint8_t modifier = 0); + + /** + * Send a character + * + * @param c character to be sent + * @returns true if there is no error, false otherwise + */ + virtual int _putc(int c); + + /** + * Control media keys + * + * @param key media key pressed (KEY_NEXT_TRACK, KEY_PREVIOUS_TRACK, KEY_STOP, KEY_PLAY_PAUSE, KEY_MUTE, KEY_VOLUME_UP, KEY_VOLUME_DOWN) + * @returns true if there is no error, false otherwise + */ + bool media_control(MEDIA_KEY key); + + /* + * To define the report descriptor. Warning: this method has to store the length of the report descriptor in reportLength. + * + * @returns pointer to the report descriptor + */ + virtual const uint8_t *report_desc(); + + /* + * Called when a data is received on the OUT endpoint. Useful to switch on LED of LOCK keys + */ + virtual void report_rx(); + + /** + * Read status of lock keys. Useful to switch-on/off leds according to key pressed. Only the first three bits of the result is important: + * - First bit: NUM_LOCK + * - Second bit: CAPS_LOCK + * - Third bit: SCROLL_LOCK + * + * @returns status of lock keys + */ + uint8_t lock_status(); + +protected: + /* + * Get configuration descriptor + * + * @returns pointer to the configuration descriptor + */ + virtual const uint8_t *configuration_desc(uint8_t index); + +private: + + //dummy otherwise it doesn't compile (we must define all methods of an abstract class) + virtual int _getc(); + + uint8_t _configuration_descriptor[41]; + uint8_t _lock_status; + PlatformMutex _mutex; + +}; + +#endif diff --git a/usb/device/USBHID/USBMouse.cpp b/usb/device/USBHID/USBMouse.cpp new file mode 100644 index 00000000000..902e9e72f7f --- /dev/null +++ b/usb/device/USBHID/USBMouse.cpp @@ -0,0 +1,348 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBMouse.h" +#include "PlatformMutex.h" +#include "usb_phy_api.h" + + +USBMouse::USBMouse(bool connect_blocking, MOUSE_TYPE mouse_type, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBHID(get_usb_phy(), 0, 0, vendor_id, product_id, product_release) +{ + _button = 0; + _mouse_type = mouse_type; + + if (connect_blocking) { + USBDevice::connect(); + wait_ready(); + } else { + init(); + } +} + +USBMouse::USBMouse(USBPhy *phy, MOUSE_TYPE mouse_type, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBHID(get_usb_phy(), 0, 0, vendor_id, product_id, product_release) +{ + _button = 0; + _mouse_type = mouse_type; +} + +USBMouse::~USBMouse() +{ + deinit(); +} + +bool USBMouse::update(int16_t x, int16_t y, uint8_t button, int8_t z) +{ + bool ret; + switch (_mouse_type) { + case REL_MOUSE: + _mutex.lock(); + + while (x > 127) { + if (!mouse_send(127, 0, button, z)) { + _mutex.unlock(); + return false; + } + x = x - 127; + } + while (x < -128) { + if (!mouse_send(-128, 0, button, z)) { + _mutex.unlock(); + return false; + } + x = x + 128; + } + while (y > 127) { + if (!mouse_send(0, 127, button, z)) { + _mutex.unlock(); + return false; + } + y = y - 127; + } + while (y < -128) { + if (!mouse_send(0, -128, button, z)) { + _mutex.unlock(); + return false; + } + y = y + 128; + } + ret = mouse_send(x, y, button, z); + + _mutex.unlock(); + return ret; + case ABS_MOUSE: + _mutex.lock(); + + HID_REPORT report; + + report.data[0] = x & 0xff; + report.data[1] = (x >> 8) & 0xff; + report.data[2] = y & 0xff; + report.data[3] = (y >> 8) & 0xff; + report.data[4] = -z; + report.data[5] = button & 0x07; + + report.length = 6; + + ret = send(&report); + + _mutex.unlock(); + return ret; + default: + return false; + } +} + +bool USBMouse::mouse_send(int8_t x, int8_t y, uint8_t buttons, int8_t z) +{ + _mutex.lock(); + + HID_REPORT report; + report.data[0] = buttons & 0x07; + report.data[1] = x; + report.data[2] = y; + report.data[3] = -z; // >0 to scroll down, <0 to scroll up + + report.length = 4; + + bool ret = send(&report); + + _mutex.unlock(); + return ret; +} + +bool USBMouse::move(int16_t x, int16_t y) +{ + _mutex.lock(); + + bool ret = update(x, y, _button, 0); + + _mutex.unlock(); + return ret; +} + +bool USBMouse::scroll(int8_t z) +{ + _mutex.lock(); + + bool ret = update(0, 0, _button, z); + + _mutex.unlock(); + return ret; +} + + +bool USBMouse::double_click() +{ + _mutex.lock(); + + if (!click(MOUSE_LEFT)) { + _mutex.unlock(); + return false; + } + wait(0.1); + bool ret = click(MOUSE_LEFT); + + _mutex.unlock(); + return ret; +} + +bool USBMouse::click(uint8_t button) +{ + _mutex.lock(); + + if (!update(0, 0, button, 0)) { + _mutex.unlock(); + return false; + } + wait(0.01); + bool ret = update(0, 0, 0, 0); + + _mutex.unlock(); + return ret; +} + +bool USBMouse::press(uint8_t button) +{ + _mutex.lock(); + + _button = button & 0x07; + bool ret = update(0, 0, _button, 0); + + _mutex.unlock(); + return ret; +} + +bool USBMouse::release(uint8_t button) +{ + _mutex.lock(); + + _button = (_button & (~button)) & 0x07; + bool ret = update(0, 0, _button, 0); + + _mutex.unlock(); + return ret; +} + + +const uint8_t *USBMouse::report_desc() +{ + + if (_mouse_type == REL_MOUSE) { + static const uint8_t report_descriptor[] = { + USAGE_PAGE(1), 0x01, // Genric Desktop + USAGE(1), 0x02, // Mouse + COLLECTION(1), 0x01, // Application + USAGE(1), 0x01, // Pointer + COLLECTION(1), 0x00, // Physical + + REPORT_COUNT(1), 0x03, + REPORT_SIZE(1), 0x01, + USAGE_PAGE(1), 0x09, // Buttons + USAGE_MINIMUM(1), 0x1, + USAGE_MAXIMUM(1), 0x3, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x01, + INPUT(1), 0x02, + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x05, + INPUT(1), 0x01, + + REPORT_COUNT(1), 0x03, + REPORT_SIZE(1), 0x08, + USAGE_PAGE(1), 0x01, + USAGE(1), 0x30, // X + USAGE(1), 0x31, // Y + USAGE(1), 0x38, // scroll + LOGICAL_MINIMUM(1), 0x81, + LOGICAL_MAXIMUM(1), 0x7f, + INPUT(1), 0x06, // Relative data + + END_COLLECTION(0), + END_COLLECTION(0), + }; + reportLength = sizeof(report_descriptor); + return report_descriptor; + } else if (_mouse_type == ABS_MOUSE) { + static const uint8_t report_descriptor[] = { + USAGE_PAGE(1), 0x01, // Generic Desktop + USAGE(1), 0x02, // Mouse + COLLECTION(1), 0x01, // Application + USAGE(1), 0x01, // Pointer + COLLECTION(1), 0x00, // Physical + + USAGE_PAGE(1), 0x01, // Generic Desktop + USAGE(1), 0x30, // X + USAGE(1), 0x31, // Y + LOGICAL_MINIMUM(1), 0x00, // 0 + LOGICAL_MAXIMUM(2), 0xff, 0x7f, // 32767 + REPORT_SIZE(1), 0x10, + REPORT_COUNT(1), 0x02, + INPUT(1), 0x02, // Data, Variable, Absolute + + USAGE_PAGE(1), 0x01, // Generic Desktop + USAGE(1), 0x38, // scroll + LOGICAL_MINIMUM(1), 0x81, // -127 + LOGICAL_MAXIMUM(1), 0x7f, // 127 + REPORT_SIZE(1), 0x08, + REPORT_COUNT(1), 0x01, + INPUT(1), 0x06, // Data, Variable, Relative + + USAGE_PAGE(1), 0x09, // Buttons + USAGE_MINIMUM(1), 0x01, + USAGE_MAXIMUM(1), 0x03, + LOGICAL_MINIMUM(1), 0x00, // 0 + LOGICAL_MAXIMUM(1), 0x01, // 1 + REPORT_COUNT(1), 0x03, + REPORT_SIZE(1), 0x01, + INPUT(1), 0x02, // Data, Variable, Absolute + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x05, + INPUT(1), 0x01, // Constant + + END_COLLECTION(0), + END_COLLECTION(0) + }; + reportLength = sizeof(report_descriptor); + return report_descriptor; + } + return NULL; +} + +#define DEFAULT_CONFIGURATION (1) +#define TOTAL_DESCRIPTOR_LENGTH ((1 * CONFIGURATION_DESCRIPTOR_LENGTH) \ + + (1 * INTERFACE_DESCRIPTOR_LENGTH) \ + + (1 * HID_DESCRIPTOR_LENGTH) \ + + (2 * ENDPOINT_DESCRIPTOR_LENGTH)) + +const uint8_t *USBMouse::configuration_desc(uint8_t index) +{ + if (index != 0) { + return NULL; + } + uint8_t configuration_descriptor_temp[] = { + CONFIGURATION_DESCRIPTOR_LENGTH, // bLength + CONFIGURATION_DESCRIPTOR, // bDescriptorType + LSB(TOTAL_DESCRIPTOR_LENGTH), // wTotalLength (LSB) + MSB(TOTAL_DESCRIPTOR_LENGTH), // wTotalLength (MSB) + 0x01, // bNumInterfaces + DEFAULT_CONFIGURATION, // bConfigurationValue + 0x00, // iConfiguration + C_RESERVED | C_SELF_POWERED, // bmAttributes + C_POWER(0), // bMaxPower + + INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0x00, // bInterfaceNumber + 0x00, // bAlternateSetting + 0x02, // bNumEndpoints + HID_CLASS, // bInterfaceClass + HID_SUBCLASS_BOOT, // bInterfaceSubClass + HID_PROTOCOL_MOUSE, // bInterfaceProtocol + 0x00, // iInterface + + HID_DESCRIPTOR_LENGTH, // bLength + HID_DESCRIPTOR, // bDescriptorType + LSB(HID_VERSION_1_11), // bcdHID (LSB) + MSB(HID_VERSION_1_11), // bcdHID (MSB) + 0x00, // bCountryCode + 0x01, // bNumDescriptors + REPORT_DESCRIPTOR, // bDescriptorType + (uint8_t)(LSB(report_desc_length())), // wDescriptorLength (LSB) + (uint8_t)(MSB(report_desc_length())), // wDescriptorLength (MSB) + + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _int_in, // bEndpointAddress + E_INTERRUPT, // bmAttributes + LSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval (milliseconds) + + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _int_out, // bEndpointAddress + E_INTERRUPT, // bmAttributes + LSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (LSB) + MSB(MAX_HID_REPORT_SIZE), // wMaxPacketSize (MSB) + 1, // bInterval (milliseconds) + }; + MBED_ASSERT(sizeof(configuration_descriptor_temp) == sizeof(_configuration_descriptor)); + memcpy(_configuration_descriptor, configuration_descriptor_temp, sizeof(_configuration_descriptor)); + return _configuration_descriptor; +} diff --git a/usb/device/USBHID/USBMouse.h b/usb/device/USBHID/USBMouse.h new file mode 100644 index 00000000000..11ee34dc268 --- /dev/null +++ b/usb/device/USBHID/USBMouse.h @@ -0,0 +1,234 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBMOUSE_H +#define USBMOUSE_H + +#include "USBHID.h" +#include "PlatformMutex.h" + +#define REPORT_ID_MOUSE 2 + +/* Common usage */ + +enum MOUSE_BUTTON { + MOUSE_LEFT = 1, + MOUSE_RIGHT = 2, + MOUSE_MIDDLE = 4, +}; + +/* X and Y limits */ +/* These values do not directly map to screen pixels */ +/* Zero may be interpreted as meaning 'no movement' */ +#define X_MIN_ABS (1) /*!< Minimum value on x-axis */ +#define Y_MIN_ABS (1) /*!< Minimum value on y-axis */ +#define X_MAX_ABS (0x7fff) /*!< Maximum value on x-axis */ +#define Y_MAX_ABS (0x7fff) /*!< Maximum value on y-axis */ + +#define X_MIN_REL (-127) /*!< The maximum value that we can move to the left on the x-axis */ +#define Y_MIN_REL (-127) /*!< The maximum value that we can move up on the y-axis */ +#define X_MAX_REL (127) /*!< The maximum value that we can move to the right on the x-axis */ +#define Y_MAX_REL (127) /*!< The maximum value that we can move down on the y-axis */ + +enum MOUSE_TYPE { + ABS_MOUSE, + REL_MOUSE, +}; + +/** + * + * USBMouse example + * @code + * #include "mbed.h" + * #include "USBMouse.h" + * + * USBMouse mouse; + * + * int main(void) + * { + * while (1) + * { + * mouse.move(20, 0); + * wait(0.5); + * } + * } + * + * @endcode + * + * + * @code + * #include "mbed.h" + * #include "USBMouse.h" + * #include + * + * USBMouse mouse(true, ABS_MOUSE); + * + * int main(void) + * { + * uint16_t x_center = (X_MAX_ABS - X_MIN_ABS)/2; + * uint16_t y_center = (Y_MAX_ABS - Y_MIN_ABS)/2; + * uint16_t x_screen = 0; + * uint16_t y_screen = 0; + * + * uint32_t x_origin = x_center; + * uint32_t y_origin = y_center; + * uint32_t radius = 5000; + * uint32_t angle = 0; + * + * while (1) + * { + * x_screen = x_origin + cos((double)angle*3.14/180.0)*radius; + * y_screen = y_origin + sin((double)angle*3.14/180.0)*radius; + * + * mouse.move(x_screen, y_screen); + * angle += 3; + * wait(0.01); + * } + * } + * + * @endcode + * + * @note Synchronization level: Thread safe + */ +class USBMouse: public USBHID { +public: + + /** + * Basic constructor + * + * Construct this object optionally connecting and blocking until it is ready. + * + * @note Do not use this constructor in derived classes. + * + * @param connect_blocking true to perform a blocking connect, false to start in a disconnected state + * @param mouse_type Mouse type: ABS_MOUSE (absolute mouse) or REL_MOUSE (relative mouse) (default: REL_MOUSE) + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBMouse(bool connect_blocking = true, MOUSE_TYPE mouse_type = REL_MOUSE, uint16_t vendor_id = 0x1234, uint16_t product_id = 0x0001, uint16_t product_release = 0x0001); + + /** + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. + * + * @param phy USB phy to use + * @param mouse_type Mouse type: ABS_MOUSE (absolute mouse) or REL_MOUSE (relative mouse) (default: REL_MOUSE) + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBMouse(USBPhy *phy, MOUSE_TYPE mouse_type = REL_MOUSE, uint16_t vendor_id = 0x1234, uint16_t product_id = 0x0001, uint16_t product_release = 0x0001); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ + virtual ~USBMouse(); + + /** + * Write a state of the mouse + * + * @param x x-axis position + * @param y y-axis position + * @param buttons buttons state (first bit represents MOUSE_LEFT, second bit MOUSE_RIGHT and third bit MOUSE_MIDDLE) + * @param z wheel state (>0 to scroll down, <0 to scroll up) + * @returns true if there is no error, false otherwise + */ + bool update(int16_t x, int16_t y, uint8_t buttons, int8_t z); + + /** + * Move the cursor to (x, y) + * + * @param x x-axis position + * @param y y-axis position + * @returns true if there is no error, false otherwise + */ + bool move(int16_t x, int16_t y); + + /** + * Press one or several buttons + * + * @param button button state (ex: press(MOUSE_LEFT)) + * @returns true if there is no error, false otherwise + */ + bool press(uint8_t button); + + /** + * Release one or several buttons + * + * @param button button state (ex: release(MOUSE_LEFT)) + * @returns true if there is no error, false otherwise + */ + bool release(uint8_t button); + + /** + * Double click (MOUSE_LEFT) + * + * @returns true if there is no error, false otherwise + */ + bool double_click(); + + /** + * Click + * + * @param button state of the buttons ( ex: clic(MOUSE_LEFT)) + * @returns true if there is no error, false otherwise + */ + bool click(uint8_t button); + + /** + * Scrolling + * + * @param z value of the wheel (>0 to go down, <0 to go up) + * @returns true if there is no error, false otherwise + */ + bool scroll(int8_t z); + + /* + * To define the report descriptor. Warning: this method has to store the length of the report descriptor in reportLength. + * + * @returns pointer to the report descriptor + */ + virtual const uint8_t *report_desc(); + +protected: + /* + * Get configuration descriptor + * + * @returns pointer to the configuration descriptor + */ + virtual const uint8_t *configuration_desc(uint8_t index); + +private: + MOUSE_TYPE _mouse_type; + uint8_t _button; + uint8_t _configuration_descriptor[41]; + PlatformMutex _mutex; + + bool mouse_send(int8_t x, int8_t y, uint8_t buttons, int8_t z); +}; + +#endif diff --git a/usb/device/USBHID/USBMouseKeyboard.cpp b/usb/device/USBHID/USBMouseKeyboard.cpp new file mode 100644 index 00000000000..4d9e4b990d8 --- /dev/null +++ b/usb/device/USBHID/USBMouseKeyboard.cpp @@ -0,0 +1,828 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBMouseKeyboard.h" +#include "usb_phy_api.h" + +typedef struct { + unsigned char usage; + unsigned char modifier; +} KEYMAP; + +#ifdef US_KEYBOARD +/* US keyboard (as HID standard) */ +#define KEYMAP_SIZE (152) +const KEYMAP keymap[KEYMAP_SIZE] = { + {0, 0}, /* NUL */ + {0, 0}, /* SOH */ + {0, 0}, /* STX */ + {0, 0}, /* ETX */ + {0, 0}, /* EOT */ + {0, 0}, /* ENQ */ + {0, 0}, /* ACK */ + {0, 0}, /* BEL */ + {0x2a, 0}, /* BS */ /* Keyboard Delete (Backspace) */ + {0x2b, 0}, /* TAB */ /* Keyboard Tab */ + {0x28, 0}, /* LF */ /* Keyboard Return (Enter) */ + {0, 0}, /* VT */ + {0, 0}, /* FF */ + {0, 0}, /* CR */ + {0, 0}, /* SO */ + {0, 0}, /* SI */ + {0, 0}, /* DEL */ + {0, 0}, /* DC1 */ + {0, 0}, /* DC2 */ + {0, 0}, /* DC3 */ + {0, 0}, /* DC4 */ + {0, 0}, /* NAK */ + {0, 0}, /* SYN */ + {0, 0}, /* ETB */ + {0, 0}, /* CAN */ + {0, 0}, /* EM */ + {0, 0}, /* SUB */ + {0, 0}, /* ESC */ + {0, 0}, /* FS */ + {0, 0}, /* GS */ + {0, 0}, /* RS */ + {0, 0}, /* US */ + {0x2c, 0}, /* */ + {0x1e, KEY_SHIFT}, /* ! */ + {0x34, KEY_SHIFT}, /* " */ + {0x20, KEY_SHIFT}, /* # */ + {0x21, KEY_SHIFT}, /* $ */ + {0x22, KEY_SHIFT}, /* % */ + {0x24, KEY_SHIFT}, /* & */ + {0x34, 0}, /* ' */ + {0x26, KEY_SHIFT}, /* ( */ + {0x27, KEY_SHIFT}, /* ) */ + {0x25, KEY_SHIFT}, /* * */ + {0x2e, KEY_SHIFT}, /* + */ + {0x36, 0}, /* , */ + {0x2d, 0}, /* - */ + {0x37, 0}, /* . */ + {0x38, 0}, /* / */ + {0x27, 0}, /* 0 */ + {0x1e, 0}, /* 1 */ + {0x1f, 0}, /* 2 */ + {0x20, 0}, /* 3 */ + {0x21, 0}, /* 4 */ + {0x22, 0}, /* 5 */ + {0x23, 0}, /* 6 */ + {0x24, 0}, /* 7 */ + {0x25, 0}, /* 8 */ + {0x26, 0}, /* 9 */ + {0x33, KEY_SHIFT}, /* : */ + {0x33, 0}, /* ; */ + {0x36, KEY_SHIFT}, /* < */ + {0x2e, 0}, /* = */ + {0x37, KEY_SHIFT}, /* > */ + {0x38, KEY_SHIFT}, /* ? */ + {0x1f, KEY_SHIFT}, /* @ */ + {0x04, KEY_SHIFT}, /* A */ + {0x05, KEY_SHIFT}, /* B */ + {0x06, KEY_SHIFT}, /* C */ + {0x07, KEY_SHIFT}, /* D */ + {0x08, KEY_SHIFT}, /* E */ + {0x09, KEY_SHIFT}, /* F */ + {0x0a, KEY_SHIFT}, /* G */ + {0x0b, KEY_SHIFT}, /* H */ + {0x0c, KEY_SHIFT}, /* I */ + {0x0d, KEY_SHIFT}, /* J */ + {0x0e, KEY_SHIFT}, /* K */ + {0x0f, KEY_SHIFT}, /* L */ + {0x10, KEY_SHIFT}, /* M */ + {0x11, KEY_SHIFT}, /* N */ + {0x12, KEY_SHIFT}, /* O */ + {0x13, KEY_SHIFT}, /* P */ + {0x14, KEY_SHIFT}, /* Q */ + {0x15, KEY_SHIFT}, /* R */ + {0x16, KEY_SHIFT}, /* S */ + {0x17, KEY_SHIFT}, /* T */ + {0x18, KEY_SHIFT}, /* U */ + {0x19, KEY_SHIFT}, /* V */ + {0x1a, KEY_SHIFT}, /* W */ + {0x1b, KEY_SHIFT}, /* X */ + {0x1c, KEY_SHIFT}, /* Y */ + {0x1d, KEY_SHIFT}, /* Z */ + {0x2f, 0}, /* [ */ + {0x31, 0}, /* \ */ + {0x30, 0}, /* ] */ + {0x23, KEY_SHIFT}, /* ^ */ + {0x2d, KEY_SHIFT}, /* _ */ + {0x35, 0}, /* ` */ + {0x04, 0}, /* a */ + {0x05, 0}, /* b */ + {0x06, 0}, /* c */ + {0x07, 0}, /* d */ + {0x08, 0}, /* e */ + {0x09, 0}, /* f */ + {0x0a, 0}, /* g */ + {0x0b, 0}, /* h */ + {0x0c, 0}, /* i */ + {0x0d, 0}, /* j */ + {0x0e, 0}, /* k */ + {0x0f, 0}, /* l */ + {0x10, 0}, /* m */ + {0x11, 0}, /* n */ + {0x12, 0}, /* o */ + {0x13, 0}, /* p */ + {0x14, 0}, /* q */ + {0x15, 0}, /* r */ + {0x16, 0}, /* s */ + {0x17, 0}, /* t */ + {0x18, 0}, /* u */ + {0x19, 0}, /* v */ + {0x1a, 0}, /* w */ + {0x1b, 0}, /* x */ + {0x1c, 0}, /* y */ + {0x1d, 0}, /* z */ + {0x2f, KEY_SHIFT}, /* { */ + {0x31, KEY_SHIFT}, /* | */ + {0x30, KEY_SHIFT}, /* } */ + {0x35, KEY_SHIFT}, /* ~ */ + {0, 0}, /* DEL */ + + {0x3a, 0}, /* F1 */ + {0x3b, 0}, /* F2 */ + {0x3c, 0}, /* F3 */ + {0x3d, 0}, /* F4 */ + {0x3e, 0}, /* F5 */ + {0x3f, 0}, /* F6 */ + {0x40, 0}, /* F7 */ + {0x41, 0}, /* F8 */ + {0x42, 0}, /* F9 */ + {0x43, 0}, /* F10 */ + {0x44, 0}, /* F11 */ + {0x45, 0}, /* F12 */ + + {0x46, 0}, /* PRINT_SCREEN */ + {0x47, 0}, /* SCROLL_LOCK */ + {0x39, 0}, /* CAPS_LOCK */ + {0x53, 0}, /* NUM_LOCK */ + {0x49, 0}, /* INSERT */ + {0x4a, 0}, /* HOME */ + {0x4b, 0}, /* PAGE_UP */ + {0x4e, 0}, /* PAGE_DOWN */ + + {0x4f, 0}, /* RIGHT_ARROW */ + {0x50, 0}, /* LEFT_ARROW */ + {0x51, 0}, /* DOWN_ARROW */ + {0x52, 0}, /* UP_ARROW */ +}; + +#else +/* UK keyboard */ +#define KEYMAP_SIZE (152) +const KEYMAP keymap[KEYMAP_SIZE] = { + {0, 0}, /* NUL */ + {0, 0}, /* SOH */ + {0, 0}, /* STX */ + {0, 0}, /* ETX */ + {0, 0}, /* EOT */ + {0, 0}, /* ENQ */ + {0, 0}, /* ACK */ + {0, 0}, /* BEL */ + {0x2a, 0}, /* BS */ /* Keyboard Delete (Backspace) */ + {0x2b, 0}, /* TAB */ /* Keyboard Tab */ + {0x28, 0}, /* LF */ /* Keyboard Return (Enter) */ + {0, 0}, /* VT */ + {0, 0}, /* FF */ + {0, 0}, /* CR */ + {0, 0}, /* SO */ + {0, 0}, /* SI */ + {0, 0}, /* DEL */ + {0, 0}, /* DC1 */ + {0, 0}, /* DC2 */ + {0, 0}, /* DC3 */ + {0, 0}, /* DC4 */ + {0, 0}, /* NAK */ + {0, 0}, /* SYN */ + {0, 0}, /* ETB */ + {0, 0}, /* CAN */ + {0, 0}, /* EM */ + {0, 0}, /* SUB */ + {0, 0}, /* ESC */ + {0, 0}, /* FS */ + {0, 0}, /* GS */ + {0, 0}, /* RS */ + {0, 0}, /* US */ + {0x2c, 0}, /* */ + {0x1e, KEY_SHIFT}, /* ! */ + {0x1f, KEY_SHIFT}, /* " */ + {0x32, 0}, /* # */ + {0x21, KEY_SHIFT}, /* $ */ + {0x22, KEY_SHIFT}, /* % */ + {0x24, KEY_SHIFT}, /* & */ + {0x34, 0}, /* ' */ + {0x26, KEY_SHIFT}, /* ( */ + {0x27, KEY_SHIFT}, /* ) */ + {0x25, KEY_SHIFT}, /* * */ + {0x2e, KEY_SHIFT}, /* + */ + {0x36, 0}, /* , */ + {0x2d, 0}, /* - */ + {0x37, 0}, /* . */ + {0x38, 0}, /* / */ + {0x27, 0}, /* 0 */ + {0x1e, 0}, /* 1 */ + {0x1f, 0}, /* 2 */ + {0x20, 0}, /* 3 */ + {0x21, 0}, /* 4 */ + {0x22, 0}, /* 5 */ + {0x23, 0}, /* 6 */ + {0x24, 0}, /* 7 */ + {0x25, 0}, /* 8 */ + {0x26, 0}, /* 9 */ + {0x33, KEY_SHIFT}, /* : */ + {0x33, 0}, /* ; */ + {0x36, KEY_SHIFT}, /* < */ + {0x2e, 0}, /* = */ + {0x37, KEY_SHIFT}, /* > */ + {0x38, KEY_SHIFT}, /* ? */ + {0x34, KEY_SHIFT}, /* @ */ + {0x04, KEY_SHIFT}, /* A */ + {0x05, KEY_SHIFT}, /* B */ + {0x06, KEY_SHIFT}, /* C */ + {0x07, KEY_SHIFT}, /* D */ + {0x08, KEY_SHIFT}, /* E */ + {0x09, KEY_SHIFT}, /* F */ + {0x0a, KEY_SHIFT}, /* G */ + {0x0b, KEY_SHIFT}, /* H */ + {0x0c, KEY_SHIFT}, /* I */ + {0x0d, KEY_SHIFT}, /* J */ + {0x0e, KEY_SHIFT}, /* K */ + {0x0f, KEY_SHIFT}, /* L */ + {0x10, KEY_SHIFT}, /* M */ + {0x11, KEY_SHIFT}, /* N */ + {0x12, KEY_SHIFT}, /* O */ + {0x13, KEY_SHIFT}, /* P */ + {0x14, KEY_SHIFT}, /* Q */ + {0x15, KEY_SHIFT}, /* R */ + {0x16, KEY_SHIFT}, /* S */ + {0x17, KEY_SHIFT}, /* T */ + {0x18, KEY_SHIFT}, /* U */ + {0x19, KEY_SHIFT}, /* V */ + {0x1a, KEY_SHIFT}, /* W */ + {0x1b, KEY_SHIFT}, /* X */ + {0x1c, KEY_SHIFT}, /* Y */ + {0x1d, KEY_SHIFT}, /* Z */ + {0x2f, 0}, /* [ */ + {0x64, 0}, /* \ */ + {0x30, 0}, /* ] */ + {0x23, KEY_SHIFT}, /* ^ */ + {0x2d, KEY_SHIFT}, /* _ */ + {0x35, 0}, /* ` */ + {0x04, 0}, /* a */ + {0x05, 0}, /* b */ + {0x06, 0}, /* c */ + {0x07, 0}, /* d */ + {0x08, 0}, /* e */ + {0x09, 0}, /* f */ + {0x0a, 0}, /* g */ + {0x0b, 0}, /* h */ + {0x0c, 0}, /* i */ + {0x0d, 0}, /* j */ + {0x0e, 0}, /* k */ + {0x0f, 0}, /* l */ + {0x10, 0}, /* m */ + {0x11, 0}, /* n */ + {0x12, 0}, /* o */ + {0x13, 0}, /* p */ + {0x14, 0}, /* q */ + {0x15, 0}, /* r */ + {0x16, 0}, /* s */ + {0x17, 0}, /* t */ + {0x18, 0}, /* u */ + {0x19, 0}, /* v */ + {0x1a, 0}, /* w */ + {0x1b, 0}, /* x */ + {0x1c, 0}, /* y */ + {0x1d, 0}, /* z */ + {0x2f, KEY_SHIFT}, /* { */ + {0x64, KEY_SHIFT}, /* | */ + {0x30, KEY_SHIFT}, /* } */ + {0x32, KEY_SHIFT}, /* ~ */ + {0, 0}, /* DEL */ + + {0x3a, 0}, /* F1 */ + {0x3b, 0}, /* F2 */ + {0x3c, 0}, /* F3 */ + {0x3d, 0}, /* F4 */ + {0x3e, 0}, /* F5 */ + {0x3f, 0}, /* F6 */ + {0x40, 0}, /* F7 */ + {0x41, 0}, /* F8 */ + {0x42, 0}, /* F9 */ + {0x43, 0}, /* F10 */ + {0x44, 0}, /* F11 */ + {0x45, 0}, /* F12 */ + + {0x46, 0}, /* PRINT_SCREEN */ + {0x47, 0}, /* SCROLL_LOCK */ + {0x39, 0}, /* CAPS_LOCK */ + {0x53, 0}, /* NUM_LOCK */ + {0x49, 0}, /* INSERT */ + {0x4a, 0}, /* HOME */ + {0x4b, 0}, /* PAGE_UP */ + {0x4e, 0}, /* PAGE_DOWN */ + + {0x4f, 0}, /* RIGHT_ARROW */ + {0x50, 0}, /* LEFT_ARROW */ + {0x51, 0}, /* DOWN_ARROW */ + {0x52, 0}, /* UP_ARROW */ +}; +#endif + +USBMouseKeyboard::USBMouseKeyboard(bool connect_blocking, MOUSE_TYPE mouse_type, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBHID(get_usb_phy(), 0, 0, vendor_id, product_id, product_release) +{ + _lock_status = 0; + _button = 0; + _mouse_type = mouse_type; + + if (connect_blocking) { + USBDevice::connect(); + wait_ready(); + } else { + init(); + } +}; + +USBMouseKeyboard::USBMouseKeyboard(USBPhy *phy, MOUSE_TYPE mouse_type, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBHID(phy, 0, 0, vendor_id, product_id, product_release) +{ + _lock_status = 0; + _button = 0; + _mouse_type = mouse_type; +}; + +/** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ +USBMouseKeyboard::~USBMouseKeyboard() +{ + deinit(); +} + +const uint8_t *USBMouseKeyboard::report_desc() +{ + if (_mouse_type == REL_MOUSE) { + static const uint8_t reportDescriptor[] = { + // Keyboard + USAGE_PAGE(1), 0x01, + USAGE(1), 0x06, + COLLECTION(1), 0x01, + REPORT_ID(1), REPORT_ID_KEYBOARD, + USAGE_PAGE(1), 0x07, + USAGE_MINIMUM(1), 0xE0, + USAGE_MAXIMUM(1), 0xE7, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x01, + REPORT_SIZE(1), 0x01, + REPORT_COUNT(1), 0x08, + INPUT(1), 0x02, + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x08, + INPUT(1), 0x01, + REPORT_COUNT(1), 0x05, + REPORT_SIZE(1), 0x01, + USAGE_PAGE(1), 0x08, + USAGE_MINIMUM(1), 0x01, + USAGE_MAXIMUM(1), 0x05, + OUTPUT(1), 0x02, + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x03, + OUTPUT(1), 0x01, + REPORT_COUNT(1), 0x06, + REPORT_SIZE(1), 0x08, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(2), 0xff, 0x00, + USAGE_PAGE(1), 0x07, + USAGE_MINIMUM(1), 0x00, + USAGE_MAXIMUM(2), 0xff, 0x00, + INPUT(1), 0x00, + END_COLLECTION(0), + + // Mouse + USAGE_PAGE(1), 0x01, // Generic Desktop + USAGE(1), 0x02, // Mouse + COLLECTION(1), 0x01, // Application + USAGE(1), 0x01, // Pointer + COLLECTION(1), 0x00, // Physical + REPORT_ID(1), REPORT_ID_MOUSE, + REPORT_COUNT(1), 0x03, + REPORT_SIZE(1), 0x01, + USAGE_PAGE(1), 0x09, // Buttons + USAGE_MINIMUM(1), 0x1, + USAGE_MAXIMUM(1), 0x3, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x01, + INPUT(1), 0x02, + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x05, + INPUT(1), 0x01, + REPORT_COUNT(1), 0x03, + REPORT_SIZE(1), 0x08, + USAGE_PAGE(1), 0x01, + USAGE(1), 0x30, // X + USAGE(1), 0x31, // Y + USAGE(1), 0x38, // scroll + LOGICAL_MINIMUM(1), 0x81, + LOGICAL_MAXIMUM(1), 0x7f, + INPUT(1), 0x06, + END_COLLECTION(0), + END_COLLECTION(0), + + + // Media Control + USAGE_PAGE(1), 0x0C, + USAGE(1), 0x01, + COLLECTION(1), 0x01, + REPORT_ID(1), REPORT_ID_VOLUME, + USAGE_PAGE(1), 0x0C, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x01, + REPORT_SIZE(1), 0x01, + REPORT_COUNT(1), 0x07, + USAGE(1), 0xB5, // Next Track + USAGE(1), 0xB6, // Previous Track + USAGE(1), 0xB7, // Stop + USAGE(1), 0xCD, // Play / Pause + USAGE(1), 0xE2, // Mute + USAGE(1), 0xE9, // Volume Up + USAGE(1), 0xEA, // Volume Down + INPUT(1), 0x02, // Input (Data, Variable, Absolute) + REPORT_COUNT(1), 0x01, + INPUT(1), 0x01, + END_COLLECTION(0), + }; + reportLength = sizeof(reportDescriptor); + return reportDescriptor; + } else if (_mouse_type == ABS_MOUSE) { + static const uint8_t reportDescriptor[] = { + + // Keyboard + USAGE_PAGE(1), 0x01, + USAGE(1), 0x06, + COLLECTION(1), 0x01, + REPORT_ID(1), REPORT_ID_KEYBOARD, + USAGE_PAGE(1), 0x07, + USAGE_MINIMUM(1), 0xE0, + USAGE_MAXIMUM(1), 0xE7, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x01, + REPORT_SIZE(1), 0x01, + REPORT_COUNT(1), 0x08, + INPUT(1), 0x02, + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x08, + INPUT(1), 0x01, + REPORT_COUNT(1), 0x05, + REPORT_SIZE(1), 0x01, + USAGE_PAGE(1), 0x08, + USAGE_MINIMUM(1), 0x01, + USAGE_MAXIMUM(1), 0x05, + OUTPUT(1), 0x02, + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x03, + OUTPUT(1), 0x01, + REPORT_COUNT(1), 0x06, + REPORT_SIZE(1), 0x08, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(2), 0xff, 0x00, + USAGE_PAGE(1), 0x07, + USAGE_MINIMUM(1), 0x00, + USAGE_MAXIMUM(2), 0xff, 0x00, + INPUT(1), 0x00, + END_COLLECTION(0), + + // Mouse + USAGE_PAGE(1), 0x01, // Generic Desktop + USAGE(1), 0x02, // Mouse + COLLECTION(1), 0x01, // Application + USAGE(1), 0x01, // Pointer + COLLECTION(1), 0x00, // Physical + REPORT_ID(1), REPORT_ID_MOUSE, + + USAGE_PAGE(1), 0x01, // Generic Desktop + USAGE(1), 0x30, // X + USAGE(1), 0x31, // Y + LOGICAL_MINIMUM(1), 0x00, // 0 + LOGICAL_MAXIMUM(2), 0xff, 0x7f, // 32767 + REPORT_SIZE(1), 0x10, + REPORT_COUNT(1), 0x02, + INPUT(1), 0x02, // Data, Variable, Absolute + + USAGE_PAGE(1), 0x01, // Generic Desktop + USAGE(1), 0x38, // scroll + LOGICAL_MINIMUM(1), 0x81, // -127 + LOGICAL_MAXIMUM(1), 0x7f, // 127 + REPORT_SIZE(1), 0x08, + REPORT_COUNT(1), 0x01, + INPUT(1), 0x06, // Data, Variable, Relative + + USAGE_PAGE(1), 0x09, // Buttons + USAGE_MINIMUM(1), 0x01, + USAGE_MAXIMUM(1), 0x03, + LOGICAL_MINIMUM(1), 0x00, // 0 + LOGICAL_MAXIMUM(1), 0x01, // 1 + REPORT_COUNT(1), 0x03, + REPORT_SIZE(1), 0x01, + INPUT(1), 0x02, // Data, Variable, Absolute + REPORT_COUNT(1), 0x01, + REPORT_SIZE(1), 0x05, + INPUT(1), 0x01, // Constant + + END_COLLECTION(0), + END_COLLECTION(0), + + // Media Control + USAGE_PAGE(1), 0x0C, + USAGE(1), 0x01, + COLLECTION(1), 0x01, + REPORT_ID(1), REPORT_ID_VOLUME, + USAGE_PAGE(1), 0x0C, + LOGICAL_MINIMUM(1), 0x00, + LOGICAL_MAXIMUM(1), 0x01, + REPORT_SIZE(1), 0x01, + REPORT_COUNT(1), 0x07, + USAGE(1), 0xB5, // Next Track + USAGE(1), 0xB6, // Previous Track + USAGE(1), 0xB7, // Stop + USAGE(1), 0xCD, // Play / Pause + USAGE(1), 0xE2, // Mute + USAGE(1), 0xE9, // Volume Up + USAGE(1), 0xEA, // Volume Down + INPUT(1), 0x02, // Input (Data, Variable, Absolute) + REPORT_COUNT(1), 0x01, + INPUT(1), 0x01, + END_COLLECTION(0), + }; + reportLength = sizeof(reportDescriptor); + return reportDescriptor; + } + + return NULL; +} + +void USBMouseKeyboard::report_rx() +{ + assert_locked(); + + HID_REPORT report; + read_nb(&report); + + // we take [1] because [0] is the report ID + _lock_status = report.data[1] & 0x07; +} + +uint8_t USBMouseKeyboard::lock_status() +{ + return _lock_status; +} + +bool USBMouseKeyboard::update(int16_t x, int16_t y, uint8_t button, int8_t z) +{ + bool ret; + switch (_mouse_type) { + case REL_MOUSE: + _mutex.lock(); + + while (x > 127) { + if (!_mouse_send(127, 0, button, z)) { + _mutex.unlock(); + return false; + } + x = x - 127; + } + while (x < -128) { + if (!_mouse_send(-128, 0, button, z)) { + _mutex.unlock(); + return false; + } + x = x + 128; + } + while (y > 127) { + if (!_mouse_send(0, 127, button, z)) { + _mutex.unlock(); + return false; + } + y = y - 127; + } + while (y < -128) { + if (!_mouse_send(0, -128, button, z)) { + _mutex.unlock(); + return false; + } + y = y + 128; + } + ret = _mouse_send(x, y, button, z); + + _mutex.unlock(); + return ret; + case ABS_MOUSE: + _mutex.lock(); + + HID_REPORT report; + + report.data[0] = REPORT_ID_MOUSE; + report.data[1] = x & 0xff; + report.data[2] = (x >> 8) & 0xff; + report.data[3] = y & 0xff; + report.data[4] = (y >> 8) & 0xff; + report.data[5] = -z; + report.data[6] = button & 0x07; + + report.length = 7; + + ret = send(&report); + + _mutex.unlock(); + return ret; + default: + return false; + } +} + +bool USBMouseKeyboard::_mouse_send(int8_t x, int8_t y, uint8_t buttons, int8_t z) +{ + _mutex.lock(); + + HID_REPORT report; + report.data[0] = REPORT_ID_MOUSE; + report.data[1] = buttons & 0x07; + report.data[2] = x; + report.data[3] = y; + report.data[4] = -z; // >0 to scroll down, <0 to scroll up + + report.length = 5; + + bool ret = send(&report); + + _mutex.unlock(); + return ret; +} + +bool USBMouseKeyboard::move(int16_t x, int16_t y) +{ + _mutex.lock(); + + bool ret = update(x, y, _button, 0); + + _mutex.unlock(); + return ret; +} + +bool USBMouseKeyboard::scroll(int8_t z) +{ + _mutex.lock(); + + bool ret = update(0, 0, _button, z); + + _mutex.unlock(); + return ret; +} + +bool USBMouseKeyboard::doubleClick() +{ + _mutex.lock(); + + if (!click(MOUSE_LEFT)) { + _mutex.unlock(); + return false; + } + wait(0.1); + bool ret = click(MOUSE_LEFT); + + _mutex.unlock(); + return ret; +} + +bool USBMouseKeyboard::click(uint8_t button) +{ + _mutex.lock(); + + if (!update(0, 0, button, 0)) { + _mutex.unlock(); + return false; + } + wait(0.01); + bool ret = update(0, 0, 0, 0); + + _mutex.unlock(); + return ret; +} + +bool USBMouseKeyboard::press(uint8_t button) +{ + _mutex.lock(); + + _button = button & 0x07; + bool ret = update(0, 0, button, 0); + + _mutex.unlock(); + return ret; +} + +bool USBMouseKeyboard::release(uint8_t button) +{ + _mutex.lock(); + + _button = (_button & (~button)) & 0x07; + bool ret = update(0, 0, _button, 0); + + _mutex.unlock(); + return ret; +} + +int USBMouseKeyboard::_putc(int c) +{ + _mutex.lock(); + + bool ret = key_code(c, keymap[c].modifier); + + _mutex.unlock(); + return ret; +} + +bool USBMouseKeyboard::key_code(uint8_t key, uint8_t modifier) +{ + // Send a simulated keyboard keypress. Returns true if successful. + _mutex.lock(); + + HID_REPORT report; + + report.data[0] = REPORT_ID_KEYBOARD; + report.data[1] = modifier; + report.data[2] = 0; + report.data[3] = keymap[key].usage; + report.data[4] = 0; + report.data[5] = 0; + report.data[6] = 0; + report.data[7] = 0; + report.data[8] = 0; + + report.length = 9; + + if (!send(&report)) { + _mutex.unlock(); + return false; + } + + report.data[1] = 0; + report.data[3] = 0; + + if (!send(&report)) { + _mutex.unlock(); + return false; + } + + _mutex.unlock(); + return true; +} + + +bool USBMouseKeyboard::media_control(MEDIA_KEY key) +{ + _mutex.lock(); + + HID_REPORT report; + + report.data[0] = REPORT_ID_VOLUME; + report.data[1] = (1 << key) & 0x7f; + + report.length = 2; + + send(&report); + + report.data[0] = REPORT_ID_VOLUME; + report.data[1] = 0; + + report.length = 2; + + bool ret = send(&report); + + _mutex.unlock(); + return ret; +} + +int USBMouseKeyboard::_getc() +{ + return -1; +} diff --git a/usb/device/USBHID/USBMouseKeyboard.h b/usb/device/USBHID/USBMouseKeyboard.h new file mode 100644 index 00000000000..75595e231b6 --- /dev/null +++ b/usb/device/USBHID/USBMouseKeyboard.h @@ -0,0 +1,246 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBMOUSEKEYBOARD_H +#define USBMOUSEKEYBOARD_H + +#define REPORT_ID_KEYBOARD 1 +#define REPORT_ID_MOUSE 2 +#define REPORT_ID_VOLUME 3 + +#include "USBMouse.h" +#include "USBKeyboard.h" +#include "Stream.h" +#include "USBHID.h" +#include "PlatformMutex.h" + +/** + * USBMouseKeyboard example + * @code + * + * #include "mbed.h" + * #include "USBMouseKeyboard.h" + * + * USBMouseKeyboard key_mouse; + * + * int main(void) + * { + * while(1) + * { + * key_mouse.move(20, 0); + * key_mouse.printf("Hello From MBED\r\n"); + * wait(1); + * } + * } + * @endcode + * + * + * @code + * + * #include "mbed.h" + * #include "USBMouseKeyboard.h" + * + * USBMouseKeyboard key_mouse(ABS_MOUSE); + * + * int main(void) + * { + * while(1) + * { + * key_mouse.move(X_MAX_ABS/2, Y_MAX_ABS/2); + * key_mouse.printf("Hello from MBED\r\n"); + * wait(1); + * } + * } + * @endcode + * + * @note Synchronization level: Thread safe + */ +class USBMouseKeyboard: public USBHID, public Stream +{ +public: + + /** + * Basic constructor + * + * Construct this object optionally connecting and blocking until it is ready. + * + * @note Do not use this constructor in derived classes. + * + * @param connect_blocking true to perform a blocking connect, false to start in a disconnected state + * @param mouse_type Mouse type: ABS_MOUSE (absolute mouse) or REL_MOUSE (relative mouse) (default: REL_MOUSE) + * @param vendor_id Your vendor_id (default: 0x1234) + * @param product_id Your product_id (default: 0x0001) + * @param product_release Your preoduct_release (default: 0x0001) + * + */ + USBMouseKeyboard(bool connect_blocking=true, MOUSE_TYPE mouse_type=REL_MOUSE, uint16_t vendor_id=0x0021, uint16_t product_id=0x0011, uint16_t product_release=0x0001); + + /** + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. + * + * @param phy USB phy to use + * @param mouse_type Mouse type: ABS_MOUSE (absolute mouse) or REL_MOUSE (relative mouse) (default: REL_MOUSE) + * @param vendor_id Your vendor_id (default: 0x1234) + * @param product_id Your product_id (default: 0x0001) + * @param product_release Your preoduct_release (default: 0x0001) + * + */ + USBMouseKeyboard(USBPhy *phy, MOUSE_TYPE mouse_type=REL_MOUSE, uint16_t vendor_id=0x0021, uint16_t product_id=0x0011, uint16_t product_release=0x0001); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ + virtual ~USBMouseKeyboard(); + + /** + * Write a state of the mouse + * + * @param x x-axis position + * @param y y-axis position + * @param buttons buttons state (first bit represents MOUSE_LEFT, second bit MOUSE_RIGHT and third bit MOUSE_MIDDLE) + * @param z wheel state (>0 to scroll down, <0 to scroll up) + * @returns true if there is no error, false otherwise + */ + bool update(int16_t x, int16_t y, uint8_t buttons, int8_t z); + + + /** + * Move the cursor to (x, y) + * + * @param x x-axis position + * @param y y-axis position + * @returns true if there is no error, false otherwise + */ + bool move(int16_t x, int16_t y); + + /** + * Press one or several buttons + * + * @param button button state (ex: press(MOUSE_LEFT)) + * @returns true if there is no error, false otherwise + */ + bool press(uint8_t button); + + /** + * Release one or several buttons + * + * @param button button state (ex: release(MOUSE_LEFT)) + * @returns true if there is no error, false otherwise + */ + bool release(uint8_t button); + + /** + * Double click (MOUSE_LEFT) + * + * @returns true if there is no error, false otherwise + */ + bool doubleClick(); + + /** + * Click + * + * @param button state of the buttons ( ex: clic(MOUSE_LEFT)) + * @returns true if there is no error, false otherwise + */ + bool click(uint8_t button); + + /** + * Scrolling + * + * @param z value of the wheel (>0 to go down, <0 to go up) + * @returns true if there is no error, false otherwise + */ + bool scroll(int8_t z); + + /** + * To send a character defined by a modifier(CTRL, SHIFT, ALT) and the key + * + * @code + * //To send CTRL + s (save) + * keyboard.keyCode('s', KEY_CTRL); + * @endcode + * + * @param modifier bit 0: KEY_CTRL, bit 1: KEY_SHIFT, bit 2: KEY_ALT (default: 0) + * @param key character to send + * @returns true if there is no error, false otherwise + */ + bool key_code(uint8_t key, uint8_t modifier = 0); + + /** + * Send a character + * + * @param c character to be sent + * @returns true if there is no error, false otherwise + */ + virtual int _putc(int c); + + /** + * Control media keys + * + * @param key media key pressed (KEY_NEXT_TRACK, KEY_PREVIOUS_TRACK, KEY_STOP, KEY_PLAY_PAUSE, KEY_MUTE, KEY_VOLUME_UP, KEY_VOLUME_DOWN) + * @returns true if there is no error, false otherwise + */ + bool media_control(MEDIA_KEY key); + + /** + * Read status of lock keys. Useful to switch-on/off leds according to key pressed. Only the first three bits of the result is important: + * - First bit: NUM_LOCK + * - Second bit: CAPS_LOCK + * - Third bit: SCROLL_LOCK + * + * @returns status of lock keys + */ + uint8_t lock_status(); + + /* + * To define the report descriptor. Warning: this method has to store the length of the report descriptor in reportLength. + * + * @returns pointer to the report descriptor + */ + virtual const uint8_t * report_desc(); + + /* + * Called when a data is received on the OUT endpoint. Useful to switch on LED of LOCK keys + * + * @returns if handle by subclass, return true + */ + virtual void report_rx(); + + +private: + MOUSE_TYPE _mouse_type; + uint8_t _button; + uint8_t _lock_status; + PlatformMutex _mutex; + + bool _mouse_send(int8_t x, int8_t y, uint8_t buttons, int8_t z); + + //dummy otherwise it doesn't compile (we must define all methods of an abstract class) + virtual int _getc(); +}; + +#endif From ea5e557b1c0715e9e385eaf4d31f39823c6c34da Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Thu, 3 May 2018 15:01:10 +0200 Subject: [PATCH 332/488] Update usb test to connect and block itself Update the basic usb test so it does blocking itself since blocking connect was removed from USBDevice. --- TESTS/usb_device/basic/USBTester.cpp | 12 +++++++++--- TESTS/usb_device/basic/USBTester.h | 5 +++-- TESTS/usb_device/basic/main.cpp | 26 +++++++++++++------------- 3 files changed, 25 insertions(+), 18 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index 24ca3df704c..fa484115607 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -37,8 +37,10 @@ #define MAX_EP_SIZE 64 #define MIN_EP_SIZE 8 +#define EVENT_READY (1 << 0) -USBTester::USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking): + +USBTester::USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): USBDevice(phy, vendor_id, product_id, product_release), reset_count(0), suspend_count(0), resume_count(0), interface_0_alt_set(NONE), interface_1_alt_set(NONE), configuration_set(NONE) { @@ -56,7 +58,8 @@ USBTester::USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint1 configuration_desc(0); init(); - USBDevice::connect(connect_blocking); + USBDevice::connect(); + flags.wait_any(EVENT_READY, osWaitForever, false); } @@ -105,7 +108,10 @@ const char *USBTester::get_iproduct_desc_string() void USBTester::callback_state_change(DeviceState new_state) { - if (new_state != Configured) { + if (new_state == Configured) { + flags.set(EVENT_READY); + } else { + flags.clear(EVENT_READY); configuration_set = NONE; interface_0_alt_set = NONE; interface_1_alt_set = NONE; diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index dcd345b1bf9..5cae22ac2b1 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -22,6 +22,7 @@ #include "USBDescriptor.h" #include "USBDevice_Types.h" #include "EventQueue.h" +#include "EventFlags.h" #include "USBDevice.h" @@ -34,9 +35,8 @@ class USBTester: public USBDevice { * @param vendor_id Your vendor_id * @param product_id Your product_id * @param product_release Your product_release - * @param connect_blocking define if the connection must be blocked if USB not plugged in */ - USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool connect_blocking); + USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); ~USBTester(); @@ -107,6 +107,7 @@ class USBTester: public USBDevice { uint8_t int_out; uint8_t int_buf[64]; EventQueue *queue; + rtos::EventFlags flags; volatile uint32_t reset_count; volatile uint32_t suspend_count; volatile uint32_t resume_count; diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index 8ccd4c5e4e7..20834d540aa 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -51,7 +51,7 @@ void control_basic_test() char str[128] = {}; { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); sprintf (str, "%s %d %d", serial.get_serial_desc_string(), vendor_id, product_id); greentea_send_kv("control_basic_test", str); // Wait for host before terminating @@ -69,7 +69,7 @@ void control_stall_test() char _value[128] = {}; { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); greentea_send_kv("control_stall_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); @@ -86,7 +86,7 @@ void control_sizes_test() char _value[128] = {}; { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); greentea_send_kv("control_sizes_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); @@ -103,7 +103,7 @@ void control_stress_test() char _value[128] = {}; { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); greentea_send_kv("control_stress_test", serial.get_serial_desc_string()); // Wait for host before terminating greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); @@ -123,7 +123,7 @@ void device_reset_test() greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); if (strcmp(_value, "false") != 0) { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); serial.clear_reset_count(); greentea_send_kv("device_reset_test", serial.get_serial_desc_string()); while(serial.get_reset_count() == 0); @@ -169,7 +169,7 @@ void device_soft_reconnection_test() const uint32_t reconnect_try_count = 3; { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); greentea_send_kv("device_soft_reconnection_test", serial.get_serial_desc_string()); // Wait for host before terminating @@ -211,7 +211,7 @@ void device_suspend_resume_test() char _value[128] = {}; { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); greentea_send_kv("device_suspend_resume_test", serial.get_serial_desc_string()); printf("[1] suspend_count: %d resume_count: %d\n", serial.get_suspend_count(), serial.get_resume_count()); serial.clear_suspend_count(); @@ -234,25 +234,25 @@ void repeated_construction_destruction_test() char _value[128] = {}; { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); TEST_ASSERT_EQUAL(true, serial.configured()); } wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); TEST_ASSERT_EQUAL(true, serial.configured()); } wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); TEST_ASSERT_EQUAL(true, serial.configured()); } wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); TEST_ASSERT_EQUAL(true, serial.configured()); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating @@ -262,7 +262,7 @@ void repeated_construction_destruction_test() wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); TEST_ASSERT_EQUAL(true, serial.configured()); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating @@ -272,7 +272,7 @@ void repeated_construction_destruction_test() wait_us(MIN_DISCONNECT_TIME_US); { - USBTester serial(get_phy(), vendor_id, product_id, product_release, true); + USBTester serial(get_phy(), vendor_id, product_id, product_release); TEST_ASSERT_EQUAL(true, serial.configured()); greentea_send_kv("repeated_construction_destruction_test", serial.get_serial_desc_string()); // Wait for host before terminating From 9a1498c98252b8c2892b299fed15bd4873daf525 Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Mon, 30 Apr 2018 15:22:09 +0200 Subject: [PATCH 333/488] NUCLEO_F103RB: replace CLOCK_SOURCE_USB by DEVICE_USBDEVICE --- .../device/system_clock.c | 28 +++++++++---------- targets/targets.json | 5 ---- 2 files changed, 13 insertions(+), 20 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/system_clock.c b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/system_clock.c index abbadf5c65e..5258fcedd35 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/system_clock.c @@ -17,9 +17,9 @@ /** * This file configures the system clock as follows: *------------------------------------------------------------------------------------------- - * System clock source | 1- PLL_HSE_EXTC / CLOCK_SOURCE_USB=1 | 3- PLL_HSI / CLOCK_SOURCE_USB=1 + * System clock source | 1- PLL_HSE_EXTC / DEVICE_USBDEVICE | 3- PLL_HSI / DEVICE_USBDEVICE * | (external 8 MHz clock) | (internal 8 MHz) - * | 2- PLL_HSE_XTAL / CLOCK_SOURCE_USB=1 | + * | 2- PLL_HSE_XTAL / DEVICE_USBDEVICE | * | (external 8 MHz xtal) | *------------------------------------------------------------------------------------------- * SYSCLK(MHz) | 72 / 72 | 64 / 48 @@ -30,8 +30,6 @@ *------------------------------------------------------------------------------------------- * APB2CLK (MHz) | 72 / 72 | 64 / 48 *------------------------------------------------------------------------------------------- - * USB capable (48 MHz precise clock) | NO / YES | NO / YES - *------------------------------------------------------------------------------------------- */ #include "stm32f1xx.h" @@ -164,9 +162,9 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) { RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInit; -#endif /* CLOCK_SOURCE_USB */ +#endif /* DEVICE_USBDEVICE */ /* Enable HSE oscillator and activate PLL with HSE as source */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; @@ -193,12 +191,12 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) return 0; // FAIL } -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) /* USB clock selection */ RCC_PeriphCLKInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphCLKInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInit); -#endif /* CLOCK_SOURCE_USB */ +#endif /* DEVICE_USBDEVICE */ /* Output clock on MCO1 pin(PA8) for debugging purpose */ //HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1); // 8 MHz @@ -215,9 +213,9 @@ uint8_t SetSysClock_PLL_HSI(void) { RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInit; -#endif /* CLOCK_SOURCE_USB */ +#endif /* DEVICE_USBDEVICE */ /* Enable HSI oscillator and activate PLL with HSI as source */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE; @@ -226,21 +224,21 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; // 48 MHz (8 MHz/2 * 12) -#else /* CLOCK_SOURCE_USB */ +#else /* DEVICE_USBDEVICE */ RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16; // 64 MHz (8 MHz/2 * 16) -#endif /* CLOCK_SOURCE_USB */ +#endif /* DEVICE_USBDEVICE */ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) /* USB clock selection */ RCC_PeriphCLKInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphCLKInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL; HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInit); -#endif /* CLOCK_SOURCE_USB */ +#endif /* DEVICE_USBDEVICE */ /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); diff --git a/targets/targets.json b/targets/targets.json index c0a9f12efd4..2c00dc5c7d4 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -2173,11 +2173,6 @@ "help": "Mask value : USE_PLL_HSE_EXTC (SYSCLK=72 MHz) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI (SYSCLK=64 MHz)", "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", "macro_name": "CLOCK_SOURCE" - }, - "clock_source_usb": { - "help": "In case of HSI clock source, to get 48 Mhz USB, SYSCLK has to be reduced from 64 to 48 MHz (set 0 for the max SYSCLK value)", - "value": "0", - "macro_name": "CLOCK_SOURCE_USB" } }, "detect_code": ["0700"], From b7940089eccd5c0d1cc375c14749940eb531a670 Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Mon, 30 Apr 2018 15:45:54 +0200 Subject: [PATCH 334/488] STM32F4: replace CLOCK_SOURCE_USB by DEVICE_USBDEVICE --- .../TARGET_NUCLEO_F411RE/system_clock.c | 22 +++++++++---------- .../TARGET_SAKURAIO_EVB_01/system_clock.c | 22 +++++++++---------- .../TARGET_DISCO_F429ZI/system_clock.c | 14 ++++++------ .../TARGET_NUCLEO_F429ZI/system_clock.c | 14 ++++++------ .../TARGET_NUCLEO_F439ZI/system_clock.c | 14 ++++++------ targets/targets.json | 20 ----------------- 6 files changed, 43 insertions(+), 63 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/system_clock.c index a1980f0a247..e6f08e10634 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/system_clock.c @@ -17,7 +17,7 @@ /** * This file configures the system clock as follows: *----------------------------------------------------------------------------- - * System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock) | CLOCK_SOURCE_USB=1 + * System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock) | DEVICE_USBDEVICE=1 * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal) | * | 3- USE_PLL_HSI (internal 16 MHz) | *----------------------------------------------------------------------------- @@ -147,13 +147,13 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 4; // VCO input clock = 2 MHz (8 MHz / 4) -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 192; // VCO output clock = 384 MHz (2 MHz * 192) -#else /* CLOCK_SOURCE_USB */ +#else /* DEVICE_USBDEVICE */ RCC_OscInitStruct.PLL.PLLN = 200; // VCO output clock = 400 MHz (2 MHz * 200) -#endif /* CLOCK_SOURCE_USB */ - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on CLOCK_SOURCE_USB) - RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (CLOCK_SOURCE_USB=1) +#endif /* DEVICE_USBDEVICE */ + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on DEVICE_USBDEVICE) + RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (DEVICE_USBDEVICE=1) if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } @@ -201,13 +201,13 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 2 MHz (16 MHz / 8) -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 192; // VCO output clock = 384 MHz (2 MHz * 192) -#else /* CLOCK_SOURCE_USB */ +#else /* DEVICE_USBDEVICE */ RCC_OscInitStruct.PLL.PLLN = 200; // VCO output clock = 400 MHz (2 MHz * 200) -#endif /* CLOCK_SOURCE_USB */ - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on CLOCK_SOURCE_USB) - RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (CLOCK_SOURCE_USB=1) +#endif /* DEVICE_USBDEVICE */ + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on DEVICE_USBDEVICE) + RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (DEVICE_USBDEVICE=1) if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_SAKURAIO_EVB_01/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_SAKURAIO_EVB_01/system_clock.c index d9bc626abe7..361ebf35865 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_SAKURAIO_EVB_01/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_SAKURAIO_EVB_01/system_clock.c @@ -17,7 +17,7 @@ /** * This file configures the system clock as follows: *----------------------------------------------------------------------------- - * System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock) | CLOCK_SOURCE_USB=1 + * System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock) | DEVICE_USBDEVICE=1 * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal) | * | 3- USE_PLL_HSI (internal 16 MHz) | *----------------------------------------------------------------------------- @@ -162,13 +162,13 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 4; // VCO input clock = 2 MHz (8 MHz / 4) -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 192; // VCO output clock = 384 MHz (2 MHz * 192) -#else /* CLOCK_SOURCE_USB */ +#else /* DEVICE_USBDEVICE */ RCC_OscInitStruct.PLL.PLLN = 200; // VCO output clock = 400 MHz (2 MHz * 200) -#endif /* CLOCK_SOURCE_USB */ - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on CLOCK_SOURCE_USB) - RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (CLOCK_SOURCE_USB=1) +#endif /* DEVICE_USBDEVICE */ + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on DEVICE_USBDEVICE) + RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (DEVICE_USBDEVICE=1) if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } @@ -216,13 +216,13 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 2 MHz (16 MHz / 8) -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 192; // VCO output clock = 384 MHz (2 MHz * 192) -#else /* CLOCK_SOURCE_USB */ +#else /* DEVICE_USBDEVICE */ RCC_OscInitStruct.PLL.PLLN = 200; // VCO output clock = 400 MHz (2 MHz * 200) -#endif /* CLOCK_SOURCE_USB */ - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on CLOCK_SOURCE_USB) - RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (CLOCK_SOURCE_USB=1) +#endif /* DEVICE_USBDEVICE */ + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on DEVICE_USBDEVICE) + RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (DEVICE_USBDEVICE=1) if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_DISCO_F429ZI/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_DISCO_F429ZI/system_clock.c index 88481e47e42..a0e5f99197f 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_DISCO_F429ZI/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_DISCO_F429ZI/system_clock.c @@ -18,7 +18,7 @@ * This file configures the system clock as follows: *----------------------------------------------------------------------------------- * System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock) | - * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal) | CLOCK_SOURCE_USB=1 + * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal) | DEVICE_USBDEVICE=1 * | 3- USE_PLL_HSI (internal 16 MHz clock) | *----------------------------------------------------------------------------------- * SYSCLK(MHz) | 180 | 168 @@ -152,13 +152,13 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 8; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 336; #else RCC_OscInitStruct.PLL.PLLN = 360; #endif - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if CLOCK_SOURCE_USB defined - RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if CLOCK_SOURCE_USB defined + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if DEVICE_USBDEVICE defined + RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if DEVICE_USBDEVICE defined if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } @@ -207,13 +207,13 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLM = 8; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 168; #else RCC_OscInitStruct.PLL.PLLN = 180; #endif - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if CLOCK_SOURCE_USB defined - RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if CLOCK_SOURCE_USB defined + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if DEVICE_USBDEVICE defined + RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if DEVICE_USBDEVICE defined if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/system_clock.c index 88481e47e42..a0e5f99197f 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/system_clock.c @@ -18,7 +18,7 @@ * This file configures the system clock as follows: *----------------------------------------------------------------------------------- * System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock) | - * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal) | CLOCK_SOURCE_USB=1 + * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal) | DEVICE_USBDEVICE=1 * | 3- USE_PLL_HSI (internal 16 MHz clock) | *----------------------------------------------------------------------------------- * SYSCLK(MHz) | 180 | 168 @@ -152,13 +152,13 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 8; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 336; #else RCC_OscInitStruct.PLL.PLLN = 360; #endif - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if CLOCK_SOURCE_USB defined - RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if CLOCK_SOURCE_USB defined + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if DEVICE_USBDEVICE defined + RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if DEVICE_USBDEVICE defined if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } @@ -207,13 +207,13 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLM = 8; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 168; #else RCC_OscInitStruct.PLL.PLLN = 180; #endif - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if CLOCK_SOURCE_USB defined - RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if CLOCK_SOURCE_USB defined + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if DEVICE_USBDEVICE defined + RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if DEVICE_USBDEVICE defined if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/system_clock.c index 88481e47e42..a0e5f99197f 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/system_clock.c @@ -18,7 +18,7 @@ * This file configures the system clock as follows: *----------------------------------------------------------------------------------- * System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock) | - * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal) | CLOCK_SOURCE_USB=1 + * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal) | DEVICE_USBDEVICE=1 * | 3- USE_PLL_HSI (internal 16 MHz clock) | *----------------------------------------------------------------------------------- * SYSCLK(MHz) | 180 | 168 @@ -152,13 +152,13 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 8; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 336; #else RCC_OscInitStruct.PLL.PLLN = 360; #endif - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if CLOCK_SOURCE_USB defined - RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if CLOCK_SOURCE_USB defined + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if DEVICE_USBDEVICE defined + RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if DEVICE_USBDEVICE defined if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } @@ -207,13 +207,13 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLM = 8; -#if (CLOCK_SOURCE_USB) +#if (DEVICE_USBDEVICE) RCC_OscInitStruct.PLL.PLLN = 168; #else RCC_OscInitStruct.PLL.PLLN = 180; #endif - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if CLOCK_SOURCE_USB defined - RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if CLOCK_SOURCE_USB defined + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if DEVICE_USBDEVICE defined + RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if DEVICE_USBDEVICE defined if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return 0; // FAIL } diff --git a/targets/targets.json b/targets/targets.json index 2c00dc5c7d4..98b1e89e321 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -2411,11 +2411,6 @@ "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", "macro_name": "CLOCK_SOURCE" - }, - "clock_source_usb": { - "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 100 to 96 MHz (set 0 for the max SYSCLK value)", - "value": "0", - "macro_name": "CLOCK_SOURCE_USB" } }, "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], @@ -2648,11 +2643,6 @@ "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", "macro_name": "CLOCK_SOURCE" - }, - "clock_source_usb": { - "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)", - "value": "1", - "macro_name": "CLOCK_SOURCE_USB" } }, "extra_labels_add": [ @@ -2701,11 +2691,6 @@ "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", "macro_name": "CLOCK_SOURCE" - }, - "clock_source_usb": { - "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)", - "value": "1", - "macro_name": "CLOCK_SOURCE_USB" } }, "extra_labels_add": [ @@ -3610,11 +3595,6 @@ "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL | USE_PLL_HSI", "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI", "macro_name": "CLOCK_SOURCE" - }, - "clock_source_usb": { - "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)", - "value": "1", - "macro_name": "CLOCK_SOURCE_USB" } }, "overrides": { "lse_available": 0 }, From 435fdbddee83504c1bac5df30868c1b2a9e24531 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Thu, 10 May 2018 23:29:07 +0200 Subject: [PATCH 335/488] USB basic test update disable suspend/resume test disable sync frame test improve reset test --- TESTS/host_tests/pyusb_basic.py | 25 +++++++++++++++++++------ TESTS/usb_device/basic/main.cpp | 7 +++++++ 2 files changed, 26 insertions(+), 6 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 109f23d7bb8..2113991d704 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -313,7 +313,6 @@ def control_basic_test(dev, vendor_id, product_id, log): set_clear_feature_test(dev, log) get_descriptor_test(dev, vendor_id, product_id, log) set_descriptor_test(dev, log) - #synch_frame_test(dev, log) wait for isochronous endpoint def get_set_configuration_test(dev, log): @@ -738,8 +737,12 @@ def device_reset_test(log): dev = yield dev.reset(); dev = yield + # run other test to check if USB works fine after reset + control_data_test(dev, [64, 256], log) dev.reset(); dev = yield + # run other test to check if USB works fine after reset + control_data_test(dev, [64, 256], log) dev.reset(); dev = yield # run other test to check if USB works fine after reset @@ -769,15 +772,25 @@ def device_soft_reconnection_test(log): def device_suspend_resume_test(log): dev = yield - time.sleep(0.1) control_data_test(dev, [64, 256], log) - time.sleep(0.1) + # suspend code goes here + # ... + # resume code here + # ... + # run other test to check if USB works fine after resume control_data_test(dev, [64, 256], log) - time.sleep(0.1) + # suspend code here + # ... + # resume code here + # ... + # run other test to check if USB works fine after resume control_data_test(dev, [64, 256], log) - time.sleep(0.1) + # suspend code here + # ... + # resume code here + # ... + # run other test to check if USB works fine after resume control_data_test(dev, [64, 256], log) - time.sleep(0.1) yield diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index 20834d540aa..6c2c5af1efd 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -24,6 +24,9 @@ #include "USBTester.h" #include "usb_phy_api.h" +// Uncomment or remove this if host suspend_resume_test part will be implemented +//#define SUSPEND_RESUME_TEST_SUPPORTED + // If disconnect() + connect() occur too fast the reset event will be dropped. // At a minimum there should be a 200us delay between disconnect and connect. // To be on the safe side I would recommend a 1ms delay, so the host controller @@ -202,6 +205,7 @@ void device_soft_reconnection_test() } } +#if SUSPEND_RESUME_TEST_SUPPORTED void device_suspend_resume_test() { uint16_t vendor_id = 0x0d28; @@ -224,6 +228,7 @@ void device_suspend_resume_test() printf("[3] suspend_count: %d resume_count: %d\n", serial.get_suspend_count(), serial.get_resume_count()); } } +#endif void repeated_construction_destruction_test() { @@ -288,7 +293,9 @@ Case cases[] = { Case("usb control stress test", control_stress_test), Case("usb device reset test", device_reset_test), Case("usb soft reconnection test", device_soft_reconnection_test), +#if SUSPEND_RESUME_TEST_SUPPORTED Case("usb device suspend/resume test", device_suspend_resume_test), +#endif Case("usb repeated construction destruction test", repeated_construction_destruction_test) }; From 2ac8cd0b4fe7126c4d919bd37b1a328b2e0a92ea Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Thu, 10 May 2018 23:35:17 +0200 Subject: [PATCH 336/488] USB basic test documentation update --- TESTS/host_tests/pyusb_basic.py | 150 ++++++++++++++++++++++++++++++-- TESTS/usb_device/basic/main.cpp | 115 +++++++++++++++++++++++- 2 files changed, 258 insertions(+), 7 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 2113991d704..d9c9f2e0b00 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -316,6 +316,18 @@ def control_basic_test(dev, vendor_id, product_id, log): def get_set_configuration_test(dev, log): + """ + Test device configuration/deconfiguration + + Given an initialized USB (HOST <---> DUT connection established) + When device configuration is checked just after initialization + Then get_configuration returns 1 (default configuration is set) + When device is deconfigured + Then get_configuration returns 0 (no configuration is set) + When each from supported configurations is set + Then the configuration is set correctly + """ + print("<<< get_set_configuration_test >>>") # check if dafault(1) configuration set try: @@ -368,6 +380,14 @@ def get_set_configuration_test(dev, log): def get_set_interface_test(dev, log): + """ + Test device interface setting + + Given an initialized USB (HOST <---> DUT connection established) + When each altsetting from every supported configuration is set + Then the interface altsetting is set correctly + """ + print("<<< get_set_interface_test >>>") # for every configuration for cfg in dev: @@ -390,6 +410,20 @@ def get_set_interface_test(dev, log): def get_status_test(dev, log): + """ + Test device/interface/endpoint status + + Given an initialized USB (HOST <---> DUT connection established) + When device status is checked + Then status is within allowed values (see status bits description below) + When control endpoint status is checked + Then control endpoint status is 0 + When status of each interface from every supported configuration is checked + Then interface status is 0 + When status of each endpoint in every allowed device interface/configuration combination is checked + Then endpoint status is 0 (not halted) + """ + print("<<< get_status_test >>>") # check device status ret = get_status(dev, CTRL_RECIPIENT_DEVICE) @@ -440,7 +474,19 @@ def get_status_test(dev, log): def set_clear_feature_test(dev, log): + """ + Test set/clear feature on device/interface/endpoint + + Given an initialized USB (HOST <---> DUT connection established) + When for each endpoint in every allowed interface/configuration combination the feature is set and then cleared + Then selected feature is set/cleared accordingly + """ + print("<<< set_clear_feature_test >>>") + # TODO: + # test set_feature on device (Remote wakeup feature not supported on DUT side) + # test set_feature on interface (not supported at all) + # for every configuration for cfg in dev: cfg.set() @@ -450,6 +496,7 @@ def set_clear_feature_test(dev, log): intf.set_altsetting() # on every ENDPOINT for ep in intf: + # halt endpoint try: usb.control.set_feature(dev, FEATURE_ENDPOINT_HALT, ep) except usb.core.USBError as err: @@ -486,8 +533,22 @@ def set_clear_feature_test(dev, log): def get_descriptor_test(dev, vendor_id, product_id, log): + """ + Test device/configuration/interface/endpoint descriptors + + Given an initialized USB (HOST <---> DUT connection established) + When device descriptor is read + Then the descriptor content is valid + When configuration descriptor is read + Then the descriptor content is valid + When interface descriptor is read + Then the error is thrown since it is not directly accessible + When endpoint descriptor is read + Then the error is thrown since it is not directly accessible + """ + print("<<< get_descriptor_test >>>") - # Control IN GET_DESCRIPTOR - device + # device descriptor try: ret = get_descriptor(dev, (DESC_TYPE_DEVICE << 8) | (0 << 0), 0, DEVICE_DESC_SIZE) dev_desc = dict(zip(device_descriptor_keys, device_descriptor_parser.unpack(ret))) @@ -497,7 +558,7 @@ def get_descriptor_test(dev, vendor_id, product_id, log): except usb.core.USBError: raise_unconditionally(lineno(), "Requesting device descriptor failed") - # Control IN GET_DESCRIPTOR - configuration + # configuration descriptor try: ret = get_descriptor(dev, (DESC_TYPE_CONFIG << 8) | (0 << 0), 0, CONFIGURATION_DESC_SIZE) conf_desc = dict(zip(configuration_descriptor_keys, configuration_descriptor_parser.unpack(ret))) @@ -505,14 +566,14 @@ def get_descriptor_test(dev, vendor_id, product_id, log): except usb.core.USBError: raise_unconditionally(lineno(), "Requesting configuration descriptor failed") - # Control IN GET_DESCRIPTOR - interface + # interface descriptor try: ret = get_descriptor(dev, (DESC_TYPE_INTERFACE << 8) | (0 << 0), 0, INTERFACE_DESC_SIZE) raise_unconditionally(lineno(), "Requesting interface descriptor should fail since it is not directly accessible") except usb.core.USBError: log("interface descriptor is not directly accessible - OK") - # Control IN GET_DESCRIPTOR - endpoint + # endpoint descriptor try: ret = get_descriptor(dev, (DESC_TYPE_ENDPOINT << 8) | (0 << 0), 0, ENDPOINT_DESC_SIZE) raise_unconditionally(lineno(), "Requesting endpoint descriptor should fail since it is not directly accessible") @@ -520,7 +581,16 @@ def get_descriptor_test(dev, vendor_id, product_id, log): log("endpoint descriptor is not directly accessible - OK") print("") # new line + def set_descriptor_test(dev, log): + """ + Test descriptor setting + + Given an initialized USB (HOST <---> DUT connection established) + When device descriptor is to be set + Then error is thrown since descriptor setting command is not supported by Mbed + """ + print("<<< set_descriptor_test >>>") # SET_DESCRIPTOR is optional and not implemented in Mbed # command should fail with no action on device side @@ -541,6 +611,14 @@ def set_descriptor_test(dev, log): def synch_frame_test(dev, log): + """ + Test sync frame request + + Given an initialized USB (HOST <---> DUT connection established) + When ... + Then ... + """ + print("<<< synch_frame_test >>>") # only for isochronous endpoints request_type = build_request_type(CTRL_IN, CTRL_TYPE_STANDARD, @@ -559,6 +637,14 @@ def synch_frame_test(dev, log): def control_stall_test(dev, log): + """ + Test control endpoint stall on invalid request + + Given an initialized USB (HOST <---> DUT connection established) + When unsupported request to control endpoint is to be sent + Then the endpoint is stalled and error is thrown + """ + print("<<< control_stall_test >>>") # Control OUT stall try: @@ -640,6 +726,14 @@ def control_stall_test(dev, log): def control_sizes_test(dev, log): + """ + Test various data sizes in control transfer + + Given an initialized USB (HOST <---> DUT connection established) + When control data in each tested size is sent + Then read data should match sent data + """ + list = [1, 2, 3, 7, 8, 9, 15, 16, 17, 31, 32, 33, 63, 64, 65, 127, 128, 129, 255, 256, 257, 511, 512, 513, 1023, 1024, 1025, 2047, 2048] control_data_test(dev, list, log) @@ -683,8 +777,18 @@ def control_data_test(dev, sizes_list, log): def control_stress_test(dev, log): - # Test various patterns of control transfers - # + """ + Test various patterns of control transfers + + Given an initialized USB (HOST <---> DUT connection established) + When stress control transfer with a data in stage is performed + Then transfer ends with success + When stress control transfer with a data out stage followed by a control transfer with a data in stage is performed + Then transfer ends with success + When stress control transfer with a data out stage is performed + Then transfer ends with success + """ + # Some devices have had problems with back-to-back # control transfers. Intentionally send these sequences # to make sure they are properly handled. @@ -734,6 +838,14 @@ def control_stress_test(dev, log): def device_reset_test(log): + """ + Test USB implementation against repeated reset + + Given an initialized USB (HOST <---> DUT connection established) + When USB device is reset repeatedly + Then the USB is operational with no errors + """ + dev = yield dev.reset(); dev = yield @@ -751,6 +863,14 @@ def device_reset_test(log): def device_soft_reconnection_test(log): + """ + Test USB implementation against repeated reconnection + + Given an initialized USB (HOST <---> DUT connection established) + When USB device is disconnected and then connected repeatedly + Then the USB is operational with no errors + """ + list = [64, 256] dev = yield # run other test to check if USB works fine before reconnection @@ -771,6 +891,14 @@ def device_soft_reconnection_test(log): def device_suspend_resume_test(log): + """ + Test USB implementation against repeated suspend and resume + + Given an initialized USB (HOST <---> DUT connection established) + When USB device is suspended and then resumed repeatedly + Then the USB is operational with no errors + """ + dev = yield control_data_test(dev, [64, 256], log) # suspend code goes here @@ -795,6 +923,14 @@ def device_suspend_resume_test(log): def repeated_construction_destruction_test(log): + """ + Test USB implementation against repeated initialization and deinitialization + + Given an initialized USB (HOST <---> DUT connection established) + When USB device is deinitialized and then initialized repeatedly + Then the USB is operational with no errors + """ + list = [64, 256] dev = yield # run other test to check if USB works fine after repeated construction/destruction @@ -820,6 +956,8 @@ def release_interfaces(dev): def restore_default_configuration(dev): + """ Set default configuration """ + cfg = dev[1] cfg.set() diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index 6c2c5af1efd..deb45ba6431 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -24,7 +24,11 @@ #include "USBTester.h" #include "usb_phy_api.h" -// Uncomment or remove this if host suspend_resume_test part will be implemented +// TODO +// suspend resume test: implement host side USB suspend/resume +// sync frame test: add test on isochronous endpoint + +// Uncomment/remove this when host suspend_resume_test part will be implemented //#define SUSPEND_RESUME_TEST_SUPPORTED // If disconnect() + connect() occur too fast the reset event will be dropped. @@ -37,6 +41,7 @@ #error [NOT_SUPPORTED] USB Device not supported for this target #endif + using namespace utest::v1; static USBPhy *get_phy() @@ -44,6 +49,55 @@ static USBPhy *get_phy() return get_usb_phy(); } + +/** Control basic tests + + Test device configuration/deconfiguration + Given an initialized USB (HOST <---> DUT connection established) + When device configuration is checked just after initialization + Then get_configuration returns 1 (default configuration is set) + When device is deconfigured + Then get_configuration returns 0 (no configuration is set) + When each from supported configurations is set + Then the configuration is set correctly + + Test device interface setting + Given an initialized USB (HOST <---> DUT connection established) + When each altsetting from every supported configuration is set + Then the interface altsetting is set correctly + + Test device/interface/endpoint status + Given an initialized USB (HOST <---> DUT connection established) + When device status is checked + Then status is within allowed values (see status bits description below) + When control endpoint status is checked + Then control endpoint status is 0 + When status of each interface from every supported configuration is checked + Then interface status is 0 + When status of each endpoint in every allowed device interface/configuration combination is checked + Then endpoint status is 0 (not halted) + + Test set/clear feature on device/interface/endpoint + Given an initialized USB (HOST <---> DUT connection established) + When for each endpoint in every allowed interface/configuration combination the feature is set and then cleared + Then selected feature is set/cleared accordingly + + Test device/configuration/interface/endpoint descriptors + Given an initialized USB (HOST <---> DUT connection established) + When device descriptor is read + Then the descriptor content is valid + When configuration descriptor is read + Then the descriptor content is valid + When interface descriptor is read + Then the error is thrown since it is not directly accessible + When endpoint descriptor is read + Then the error is thrown since it is not directly accessible + + Test descriptor setting + Given an initialized USB (HOST <---> DUT connection established) + When device descriptor is to be set + Then error is thrown since descriptor setting command is not supported by Mbed +*/ void control_basic_test() { uint16_t vendor_id = 0x0d28; @@ -63,6 +117,14 @@ void control_basic_test() } } + +/** Test control endpoint stall on invalid request + + Given an initialized USB (HOST <---> DUT connection established) + When unsupported request to control endpoint is to be sent + Then the endpoint is stalled and error is thrown + +*/ void control_stall_test() { uint16_t vendor_id = 0x0d28; @@ -80,6 +142,14 @@ void control_stall_test() } } + +/** Test various data sizes in control transfer + + Given an initialized USB (HOST <---> DUT connection established) + When control data in each tested size is sent + Then read data should match sent data + +*/ void control_sizes_test() { uint16_t vendor_id = 0x0d28; @@ -97,6 +167,18 @@ void control_sizes_test() } } + +/** Test various patterns of control transfers + + Given an initialized USB (HOST <---> DUT connection established) + When stress control transfer with a data in stage is performed + Then transfer ends with success + When stress control transfer with a data out stage followed by a control transfer with a data in stage is performed + Then transfer ends with success + When stress control transfer with a data out stage is performed + Then transfer ends with success + +*/ void control_stress_test() { uint16_t vendor_id = 0x0d28; @@ -114,6 +196,14 @@ void control_stress_test() } } + +/** Test USB implementation against repeated reset + + Given an initialized USB (HOST <---> DUT connection established) + When USB device is reset repeatedly + Then the USB is operational with no errors + +*/ void device_reset_test() { uint16_t vendor_id = 0x0d28; @@ -162,6 +252,13 @@ void device_reset_test() } +/** Test USB implementation against repeated reconnection + + Given an initialized USB (HOST <---> DUT connection established) + When USB device is disconnected and then connected repeatedly + Then the USB is operational with no errors + +*/ void device_soft_reconnection_test() { uint16_t vendor_id = 0x0d28; @@ -205,7 +302,15 @@ void device_soft_reconnection_test() } } + #if SUSPEND_RESUME_TEST_SUPPORTED +/** Test USB implementation against repeated suspend and resume + + Given an initialized USB (HOST <---> DUT connection established) + When USB device is suspended and then resumed repeatedly + Then the USB is operational with no errors + +*/ void device_suspend_resume_test() { uint16_t vendor_id = 0x0d28; @@ -230,6 +335,14 @@ void device_suspend_resume_test() } #endif + +/** Test USB implementation against repeated initialization and deinitialization + + Given an initialized USB (HOST <---> DUT connection established) + When USB device is deinitialized and then initialized repeatedly + Then the USB is operational with no errors + +*/ void repeated_construction_destruction_test() { uint16_t vendor_id = 0x0d28; From 84770f2af6b9175f348559160a1c77004263e155 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 7 May 2018 14:42:02 -0500 Subject: [PATCH 337/488] Refactor AsyncOp class Add the OperationList class to simplify managing async operations. Add a callback to the AsyncOp class so completion can be signaled with another mechanism. Finally rework the lock handling so AsyncOp::wait is passed the lock to use rather than taking it in a constructor. --- usb/device/utilities/AsyncOp.cpp | 117 ++++++++++++++++----- usb/device/utilities/AsyncOp.h | 79 +++++++++++--- usb/device/utilities/OperationList.h | 86 +++++++++++++++ usb/device/utilities/OperationListBase.cpp | 87 +++++++++++++++ usb/device/utilities/OperationListBase.h | 96 +++++++++++++++++ 5 files changed, 422 insertions(+), 43 deletions(-) create mode 100644 usb/device/utilities/OperationList.h create mode 100644 usb/device/utilities/OperationListBase.cpp create mode 100644 usb/device/utilities/OperationListBase.h diff --git a/usb/device/utilities/AsyncOp.cpp b/usb/device/utilities/AsyncOp.cpp index 5f6939be2c9..aa6557d1d75 100644 --- a/usb/device/utilities/AsyncOp.cpp +++ b/usb/device/utilities/AsyncOp.cpp @@ -16,68 +16,129 @@ #include "AsyncOp.h" #include "mbed_critical.h" +#include "mbed_assert.h" using namespace rtos; -AsyncOp::AsyncOp(Mutex *lock): _list(NULL), _signal(NULL), _signal_lock(lock) +AsyncOp::AsyncOp(): + _list(NULL), _wait(NULL), _aborted(false), _timeout(false) { } -void AsyncOp::start(LinkedListBase *list) +AsyncOp::AsyncOp(mbed::Callback &callback): + _list(NULL), _wait(NULL), _aborted(false), _timeout(false) { - _lock(); - _list = list; - list->enqueue(this); - _unlock(); + _callback = callback; } -void AsyncOp::wait() +AsyncOp::~AsyncOp() { - if (_list == NULL) { - // Event either hasn't start or has already occurred + MBED_ASSERT(_list == NULL); +} + +void AsyncOp::wait(rtos::Mutex *host_mutex, uint32_t milliseconds) +{ + // Optimization so semaphore is only created if necessary + core_util_critical_section_enter(); + bool done = _list == NULL; + core_util_critical_section_exit(); + if (done) { return; } // Construct semaphore to wait on Semaphore sem(0); - // Atomically set the semaphore pointer and - // check for completion - _lock(); - bool done = _list == NULL; - _signal = &sem; - _unlock(); + core_util_critical_section_enter(); + done = _list == NULL; + // Wait is only allowed to be called from one thread + MBED_ASSERT(_wait == NULL); + _wait = &sem; + core_util_critical_section_exit(); - if (!done) { - sem.wait(); + if (done) { + // Operation was signaled before semaphore was set + return; } + + if (sem.wait(milliseconds) == 1) { + // Operation completion signaled semaphore + return; + } + + _host_lock(host_mutex); + _abort(true); + _host_unlock(host_mutex); +} + +void AsyncOp::abort() +{ + // Host lock must be held + + _abort(false); } void AsyncOp::complete() { - _lock(); - _list->remove(this); + core_util_critical_section_enter(); + + mbed::Callback cb = _callback; + _callback = NULL; _list = NULL; - if (_signal != NULL) { - _signal->release(); + if (_wait != NULL) { + _wait->release(); + } + + core_util_critical_section_exit(); + + if (cb) { + cb(); + } +} + +bool AsyncOp::timeout() +{ + core_util_critical_section_enter(); + + bool ret = _timeout; + + core_util_critical_section_exit(); + return ret; +} + +void AsyncOp::_abort(bool timeout) +{ + // host lock must be held + + core_util_critical_section_enter(); + OperationListBase *list = _list; + if (list) { + _callback = NULL; + _aborted = true; + _wait = NULL; + _timeout = timeout; + _list = NULL; + } + core_util_critical_section_exit(); + if (list) { + list->remove(this); } - _unlock(); } -void AsyncOp::_lock() +void AsyncOp::_host_lock(rtos::Mutex *host_mutex) { - if (_signal_lock) { - _signal_lock->lock(); + if (host_mutex) { + host_mutex->lock(); } else { core_util_critical_section_enter(); } } -void AsyncOp::_unlock() +void AsyncOp::_host_unlock(rtos::Mutex *host_mutex) { - if (_signal_lock) { - _signal_lock->unlock(); + if (host_mutex) { + host_mutex->unlock(); } else { core_util_critical_section_exit(); } diff --git a/usb/device/utilities/AsyncOp.h b/usb/device/utilities/AsyncOp.h index be28c28cde1..75996b02c3e 100644 --- a/usb/device/utilities/AsyncOp.h +++ b/usb/device/utilities/AsyncOp.h @@ -19,44 +19,93 @@ #include "Mutex.h" #include "Semaphore.h" +#include "Callback.h" #include "LinkEntry.h" -#include "LinkedListBase.h" +#include "OperationListBase.h" class AsyncOp: public LinkEntry { public: + + /** + * Construct a new AsyncOp object + */ + AsyncOp(); + /** * Construct a new AsyncOp object * - * @param lock Mutex used to serialize the object or code calling complete - * or NULL if a critical section is used + * @param callback Completion callback */ - AsyncOp(rtos::Mutex *lock); + AsyncOp(mbed::Callback &callback); /** - * Add this operation to the linked list to start it + * Cleanup resources used by this AsyncOp */ - void start(LinkedListBase *list); + virtual ~AsyncOp(); /** * Wait for this asynchronous operation to complete + * + * If the timeout expires then this asynchronous operation is + * aborted and the timeout flag is set. + * + * @note - the host object's lock MUST NOT be held when this call is made */ - void wait(); + void wait(rtos::Mutex *host_mutex, uint32_t milliseconds=osWaitForever); /** - * Mark this asynchronous operation as complete + * Abort this asynchronous operation * - * This wake the thread calling wait() + * This function has no effect if the operation is complete. Otherwise + * the aborted flag is set. + * + * @note - the host object's lock MUST be held when this call is made */ - void complete(); + void abort(); + + /** + * Check if this operation timed out + * + * @return true if this operation timed out, false otherwise + */ + bool timeout(); + + /** + * Check if this operation was aborted + * + * @return true if this operation was aborted, false otherwise + */ + bool aborted(); + +protected: + + /** + * Callback indicating that something changed + * + * @return true if finished false if not + */ + virtual bool process() = 0; + + /** + * Callback indicating that this event finished + */ + virtual void complete(); private: - void _lock(); - void _unlock(); + friend class OperationListBase; + + mbed::Callback _callback; + OperationListBase *_list; + rtos::Semaphore *_wait; + bool _aborted; + bool _timeout; + + void _abort(bool timeout); + + static void _host_lock(rtos::Mutex *host_mutex); - LinkedListBase *_list; - rtos::Semaphore *_signal; - rtos::Mutex *const _signal_lock; + static void _host_unlock(rtos::Mutex *host_mutex); }; #endif diff --git a/usb/device/utilities/OperationList.h b/usb/device/utilities/OperationList.h new file mode 100644 index 00000000000..369ccc93564 --- /dev/null +++ b/usb/device/utilities/OperationList.h @@ -0,0 +1,86 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_OPERATION_LIST_H +#define MBED_OPERATION_LIST_H + +#include "OperationListBase.h" +#include "AsyncOp.h" + +template +class OperationList: public OperationListBase { +public: + + /** + * Create a new empty operation list + */ + OperationList() + { + + } + + /** + * Destroy this object and abort all operations + */ + ~OperationList() + { + + } + /** + * Add an operation to the list + * + * If the list was empty then call process on this + * operation + * + * @param op Operation to add + */ + void add(T *op) + { + OperationListBase::add(op); + } + + /** + * Remove an operation from the list + * + * If this was the head of the list then process the + * next element in the list. + * + * @param op Operation to remove + */ + void remove(T *op) + { + OperationListBase::remove(op); + } + + /** + * Dequeue the head of the list + * + * Remove the head of the operation list without completing it + * or processing the next element. The caller must call the + * AsnycOp::complete() function of the returned object. + * Additionally process() must be called on this object + * if there are still elements in the list. + * + * @return The async op at the head of the list + */ + T *dequeue_raw() + { + return static_cast(OperationListBase::dequeue_raw()); + } + +}; + +#endif diff --git a/usb/device/utilities/OperationListBase.cpp b/usb/device/utilities/OperationListBase.cpp new file mode 100644 index 00000000000..b13128093d5 --- /dev/null +++ b/usb/device/utilities/OperationListBase.cpp @@ -0,0 +1,87 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "OperationListBase.h" +#include "AsyncOp.h" +#include "mbed_assert.h" + +OperationListBase::OperationListBase() +{ + +} + +OperationListBase::~OperationListBase() +{ + remove_all(); +} + +bool OperationListBase::empty() +{ + return _list.head() == NULL; +} + +void OperationListBase::add(AsyncOp *op) +{ + bool was_empty = _list.head() == NULL; + op->_list = this; + _list.enqueue(op); + if (was_empty) { + process(); + } +} + +void OperationListBase::process() +{ + while (true) { + AsyncOp *op = static_cast(_list.head()); + if (op == NULL) { + // List empty, nothing left to do + break; + } + if (!op->process()) { + // Processing is in progress + break; + } + _list.dequeue(); + op->complete(); + } +} + +void OperationListBase::remove(AsyncOp *op) +{ + bool head = _list.head() == op; + _list.remove(op); + if (head) { + process(); + } +} + +AsyncOp *OperationListBase::dequeue_raw() +{ + return static_cast(_list.dequeue()); +} + +void OperationListBase::remove_all() +{ + while (true) { + AsyncOp *op = static_cast(_list.head()); + if (op == NULL) { + // List empty, nothing left to do + break; + } + op->complete(); + } +} diff --git a/usb/device/utilities/OperationListBase.h b/usb/device/utilities/OperationListBase.h new file mode 100644 index 00000000000..c3f903f794e --- /dev/null +++ b/usb/device/utilities/OperationListBase.h @@ -0,0 +1,96 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_OPERATION_LIST_BASE_H +#define MBED_OPERATION_LIST_BASE_H + +#include "LinkedListBase.h" +#include "Mutex.h" + +class AsyncOp; + +class OperationListBase { +public: + + /** + * Create a new empty operation list + */ + OperationListBase(); + + /** + * Destroy this object and abort all operations + */ + ~OperationListBase(); + + /** + * Check if the list is empty + * + * @return true if the list is empty false otherwise + */ + bool empty(); + + /** + * Add an operation to the list + * + * If the list was empty then call process on this + * operation + * + * @param op Operation to add + */ + void add(AsyncOp *op); + + /** + * Remove an operation from the list + * + * If this was the head of the list then process the + * next element in the list. + * + * @param op Operation to remove + */ + void remove(AsyncOp *op); + + /** + * Dequeue the head of the list + * + * Remove the head of the operation list without completing it + * or processing the next element. The caller must call the + * AsnycOp::complete() function of the returned object. + * Additionally process() must be called on this object + * if there are still elements in the list. + * + * @return The async op at the head of the list + */ + AsyncOp *dequeue_raw(); + + /** + * Abort all operations + */ + void remove_all(); + + /** + * Process the operation list + * + * This allow the operation at the head of the list to perform processing + */ + void process(); + +private: + friend class AsyncOp; + + LinkedListBase _list; +}; + +#endif From b4baff7f8340d6f124b33ead774e8bd7ab694674 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 7 May 2018 14:43:35 -0500 Subject: [PATCH 338/488] Update USBHID and USBCDC for new AsyncOp Update USB classes to use the new AsyncOp API. --- usb/device/USBHID/USBHID.cpp | 192 ++++++++++++------------ usb/device/USBHID/USBHID.h | 14 +- usb/device/USBSerial/USBCDC.cpp | 256 +++++++++++++++----------------- usb/device/USBSerial/USBCDC.h | 14 +- 4 files changed, 224 insertions(+), 252 deletions(-) diff --git a/usb/device/USBHID/USBHID.cpp b/usb/device/USBHID/USBHID.cpp index c1028d78b6a..8045459f161 100644 --- a/usb/device/USBHID/USBHID.cpp +++ b/usb/device/USBHID/USBHID.cpp @@ -21,24 +21,91 @@ class USBHID::AsyncSend: public AsyncOp { public: - AsyncSend(const HID_REPORT *report): AsyncOp(NULL), report(report), result(false) + AsyncSend(USBHID *hid, const HID_REPORT *report): hid(hid), report(report), result(false) { } + + ~AsyncSend() + { + + } + + virtual bool process() + { + if (!hid->configured()) { + result = false; + return true; + } + + if (hid->send_nb(report)) { + result = true; + return true; + } + + return false; + } + + USBHID *hid; const HID_REPORT *report; bool result; }; class USBHID::AsyncRead: public AsyncOp { public: - AsyncRead(HID_REPORT *report): AsyncOp(NULL), report(report), result(false) + AsyncRead(USBHID *hid, HID_REPORT *report): hid(hid), report(report), result(false) + { + + } + + ~AsyncRead() { } + + virtual bool process() + { + if (!hid->configured()) { + result = false; + return true; + } + + if (hid->read_nb(report)) { + result = true; + return true; + } + + return false; + } + + USBHID *hid; HID_REPORT *report; bool result; }; +class USBHID::AsyncWait: public AsyncOp { +public: + AsyncWait(USBHID *hid): hid(hid) + { + + } + + ~AsyncWait() + { + + } + + virtual bool process() + { + if (hid->configured()) { + return true; + } + + return false; + } + + USBHID *hid; +}; USBHID::USBHID(bool connect_blocking, uint8_t output_report_length, uint8_t input_report_length, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) : USBDevice(get_usb_phy(), vendor_id, product_id, product_release) @@ -88,15 +155,12 @@ void USBHID::wait_ready() { lock(); - AsyncOp wait_op(NULL); - wait_op.start(&_connect_list); - if (configured()) { - wait_op.complete(); - } + AsyncWait wait_op(this); + _connect_list.add(&wait_op); unlock(); - wait_op.wait(); + wait_op.wait(NULL); } @@ -104,23 +168,12 @@ bool USBHID::send(const HID_REPORT *report) { lock(); - if (!configured()) { - unlock(); - return false; - } - - if (send_nb(report)) { - unlock(); - return true; - } - - AsyncSend send_op(report); - send_op.start(&_send_list); + AsyncSend send_op(this, report); + _send_list.add(&send_op); unlock(); - send_op.wait(); - + send_op.wait(NULL); return send_op.result; } @@ -149,23 +202,12 @@ bool USBHID::read(HID_REPORT *report) { lock(); - if (!configured()) { - unlock(); - return false; - } - - if (read_nb(report)) { - unlock(); - return true; - } - - AsyncRead read_op(report); - read_op.start(&_read_list); + AsyncRead read_op(this, report); + _read_list.add(&read_op); unlock(); - read_op.wait(); - + read_op.wait(NULL); return read_op.result; } @@ -198,13 +240,8 @@ void USBHID::_send_isr(usb_ep_t endpoint) write_finish(_int_in); _send_idle = true; - AsyncSend *send_op = _send_list.head(); - if (send_op != NULL) { - if (send_nb(send_op->report)) { - send_op->result = true; - send_op->complete(); - } - } else { + _send_list.process(); + if (_send_idle) { report_tx(); } @@ -217,60 +254,12 @@ void USBHID::_read_isr(usb_ep_t endpoint) _output_report.length = read_finish(_int_out); _read_idle = true; - AsyncRead *read_op = _read_list.head(); - if (read_op != NULL) { - if (read_nb(read_op->report)) { - read_op->result = true; - read_op->complete(); - } - } else { + _read_list.process(); + if (_read_idle) { report_rx(); } } -void USBHID::_connect_wake_all() -{ - assert_locked(); - - AsyncOp *wait_op = _connect_list.head(); - while (wait_op != NULL) { - wait_op->complete(); - wait_op = _connect_list.head(); - } -} - -void USBHID::_send_abort_all() -{ - assert_locked(); - - if (!_send_idle) { - endpoint_abort(_int_in); - _send_idle = true; - } - AsyncSend *tx_cur = _send_list.head(); - while (tx_cur != NULL) { - tx_cur->result = false; - tx_cur->complete(); - tx_cur = _send_list.head(); - } -} - -void USBHID::_read_abort_all() -{ - assert_locked(); - - if (!_read_idle) { - endpoint_abort(_int_out); - _read_idle = true; - } - AsyncRead *rx_cur = _read_list.head(); - while (rx_cur != NULL) { - rx_cur->result = false; - rx_cur->complete(); - rx_cur = _read_list.head(); - } -} - uint16_t USBHID::report_desc_length() { report_desc(); @@ -280,12 +269,19 @@ uint16_t USBHID::report_desc_length() void USBHID::callback_state_change(DeviceState new_state) { - if (new_state == Configured) { - _connect_wake_all(); - } else { - _send_abort_all(); - _read_abort_all(); + if (new_state != Configured) { + if (!_send_idle) { + endpoint_abort(_int_in); + _send_idle = true; + } + if (!_read_idle) { + endpoint_abort(_int_out); + _read_idle = true; + } } + _send_list.process(); + _read_list.process(); + _connect_list.process(); } // diff --git a/usb/device/USBHID/USBHID.h b/usb/device/USBHID/USBHID.h index 015ad355063..2cd984a6613 100644 --- a/usb/device/USBHID/USBHID.h +++ b/usb/device/USBHID/USBHID.h @@ -22,8 +22,7 @@ #include "USBDevice.h" #include "USBHID_Types.h" -#include "AsyncOp.h" -#include "LinkedList.h" +#include "OperationList.h" @@ -249,17 +248,14 @@ class USBHID: public USBDevice { void _send_isr(usb_ep_t endpoint); void _read_isr(usb_ep_t endpoint); - void _connect_wake_all(); - void _send_abort_all(); - void _read_abort_all(); - class AsyncSend; class AsyncRead; + class AsyncWait; - LinkedList _connect_list; - LinkedList _send_list; + OperationList _connect_list; + OperationList _send_list; bool _send_idle; - LinkedList _read_list; + OperationList _read_list; bool _read_idle; uint8_t _configuration_descriptor[41]; diff --git a/usb/device/USBSerial/USBCDC.cpp b/usb/device/USBSerial/USBCDC.cpp index 4eff925deea..b03ae1df3f4 100644 --- a/usb/device/USBSerial/USBCDC.cpp +++ b/usb/device/USBSerial/USBCDC.cpp @@ -36,10 +36,39 @@ static const uint8_t cdc_line_coding_default[7] = {0x80, 0x25, 0x00, 0x00, 0x00, class USBCDC::AsyncWrite: public AsyncOp { public: - AsyncWrite(uint8_t *buf, uint32_t size): AsyncOp(NULL), tx_buf(buf), tx_size(size), result(false) + AsyncWrite(USBCDC *serial, uint8_t *buf, uint32_t size): + serial(serial), tx_buf(buf), tx_size(size), result(false) { } + + virtual ~AsyncWrite() + { + + } + + virtual bool process() + { + if (!serial->_terminal_connected) { + result = false; + return true; + } + + uint32_t actual_size = 0; + serial->send_nb(tx_buf, tx_size, &actual_size, true); + tx_size -= actual_size; + tx_buf += actual_size; + if (tx_size == 0) { + result = true; + return true; + } + + // Start transfer if it hasn't been + serial->_send_isr_start(); + return false; + } + + USBCDC *serial; uint8_t *tx_buf; uint32_t tx_size; bool result; @@ -47,11 +76,40 @@ class USBCDC::AsyncWrite: public AsyncOp { class USBCDC::AsyncRead: public AsyncOp { public: - AsyncRead(uint8_t *buf, uint32_t size, uint32_t *size_read, bool read_all) - : AsyncOp(NULL), rx_buf(buf), rx_size(size), rx_actual(size_read), all(read_all), result(false) + AsyncRead(USBCDC *serial, uint8_t *buf, uint32_t size, uint32_t *size_read, bool read_all) + : serial(serial), rx_buf(buf), rx_size(size), rx_actual(size_read), all(read_all), result(false) { } + + virtual ~AsyncRead() + { + + } + + virtual bool process() + { + if (!serial->_terminal_connected) { + result = false; + return true; + } + + uint32_t actual_size = 0; + serial->receive_nb(rx_buf, rx_size, &actual_size); + rx_buf += actual_size; + *rx_actual += actual_size; + rx_size -= actual_size; + if ((!all && *rx_actual > 0) || (rx_size == 0)) { + // Wake thread if request is done + result = true; + return true; + } + + serial->_receive_isr_start(); + return false; + } + + USBCDC *serial; uint8_t *rx_buf; uint32_t rx_size; uint32_t *rx_actual; @@ -59,6 +117,31 @@ class USBCDC::AsyncRead: public AsyncOp { bool result; }; +class USBCDC::AsyncWait: public AsyncOp { +public: + AsyncWait(USBCDC *serial) + : serial(serial) + { + + } + + virtual ~AsyncWait() + { + + } + + virtual bool process() + { + if (serial->_terminal_connected) { + return true; + } + + return false; + } + + USBCDC *serial; +}; + USBCDC::USBCDC(bool connect_blocking, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) : USBDevice(get_usb_phy(), vendor_id, product_id, product_release) @@ -230,13 +313,30 @@ void USBCDC::_change_terminal_connected(bool connected) { assert_locked(); - if (connected) { - _connect_wake_all(); - } else { - _send_abort_all(); - _receive_abort_all(); - } _terminal_connected = connected; + if (!_terminal_connected) { + // Abort TX + if (_tx_in_progress) { + endpoint_abort(_bulk_in); + _tx_in_progress = false; + } + _tx_buf = _tx_buffer; + _tx_size = 0; + _tx_list.process(); + MBED_ASSERT(_tx_list.empty()); + + // Abort RX + if (_rx_in_progress) { + endpoint_abort(_bulk_in); + _rx_in_progress = false; + } + _rx_buf = _rx_buffer; + _rx_size = 0; + _rx_list.process(); + MBED_ASSERT(_rx_list.empty()); + + } + _connected_list.process(); } bool USBCDC::ready() @@ -253,89 +353,27 @@ void USBCDC::wait_ready() { lock(); - AsyncOp wait_op(NULL); - wait_op.start(&_connected_list); - if (_terminal_connected) { - wait_op.complete(); - } + AsyncWait wait_op(this); + _connected_list.add(&wait_op); unlock(); - wait_op.wait(); -} - -void USBCDC::_connect_wake_all() -{ - AsyncOp *wait_op = _connected_list.head(); - while (wait_op != NULL) { - wait_op->complete(); - wait_op = _connected_list.head(); - } + wait_op.wait(NULL); } bool USBCDC::send(uint8_t *buffer, uint32_t size) { lock(); - if (!_terminal_connected) { - unlock(); - return false; - } - AsyncWrite write_op(buffer, size); - write_op.start(&_tx_list); - _send_next(); + AsyncWrite write_op(this, buffer, size); + _tx_list.add(&write_op); unlock(); - write_op.wait(); + write_op.wait(NULL); return write_op.result; } -void USBCDC::_send_next() -{ - assert_locked(); - - uint32_t actual_size; - do { - // Set current TX operation or return if there are none left - AsyncWrite *tx_cur = _tx_list.head(); - if (tx_cur == NULL) { - break; - } - - actual_size = 0; - send_nb(tx_cur->tx_buf, tx_cur->tx_size, &actual_size, false); - tx_cur->tx_size -= actual_size; - tx_cur->tx_buf += actual_size; - if (tx_cur->tx_size == 0) { - tx_cur->result = true; - tx_cur->complete(); - } - } while (actual_size > 0); - - // Start transfer if it hasn't been - _send_isr_start(); -} - -void USBCDC::_send_abort_all() -{ - assert_locked(); - - if (_tx_in_progress) { - endpoint_abort(_bulk_in); - _tx_in_progress = false; - } - _tx_buf = _tx_buffer; - _tx_size = 0; - - AsyncWrite *tx_cur = _tx_list.head(); - while (tx_cur != NULL) { - tx_cur->result = false; - tx_cur->complete(); - tx_cur = _tx_list.head(); - } -} - void USBCDC::send_nb(uint8_t *buffer, uint32_t size, uint32_t *actual, bool now) { lock(); @@ -357,7 +395,6 @@ void USBCDC::send_nb(uint8_t *buffer, uint32_t size, uint32_t *actual, bool now) unlock(); } - void USBCDC::_send_isr_start() { assert_locked(); @@ -382,7 +419,7 @@ void USBCDC::_send_isr(usb_ep_t endpoint) _tx_size = 0; _tx_in_progress = false; - _send_next(); + _tx_list.process(); if (!_tx_in_progress) { data_tx(); } @@ -392,72 +429,19 @@ bool USBCDC::receive(uint8_t *buffer, uint32_t size, uint32_t *size_read) { lock(); - if (!_terminal_connected) { - unlock(); - return false; - } bool read_all = size_read == NULL; uint32_t size_read_dummy; uint32_t *size_read_ptr = read_all ? &size_read_dummy : size_read; *size_read_ptr = 0; - AsyncRead read_op(buffer, size, size_read_ptr, read_all); - read_op.start(&_rx_list); - _receive_next(); + AsyncRead read_op(this, buffer, size, size_read_ptr, read_all); + _rx_list.add(&read_op); unlock(); - read_op.wait(); + read_op.wait(NULL); return read_op.result; } -void USBCDC::_receive_next() -{ - assert_locked(); - - uint32_t actual_size; - do { - // Set current RX operation or return if there are none left - AsyncRead *rx_cur = _rx_list.head(); - if (rx_cur == NULL) { - break; - } - - actual_size = 0; - receive_nb(rx_cur->rx_buf, rx_cur->rx_size, &actual_size); - rx_cur->rx_buf += actual_size; - *rx_cur->rx_actual += actual_size; - rx_cur->rx_size -= actual_size; - if ((!rx_cur->all && *rx_cur->rx_actual > 0) || (rx_cur->rx_size == 0)) { - // Wake thread if request is done - rx_cur->result = true; - rx_cur->complete(); - rx_cur = NULL; - } - } while (actual_size > 0); - - _receive_isr_start(); - -} - -void USBCDC::_receive_abort_all() -{ - assert_locked(); - - if (_rx_in_progress) { - endpoint_abort(_bulk_in); - _rx_in_progress = false; - } - _rx_buf = _rx_buffer; - _rx_size = 0; - - AsyncRead *rx_cur = _rx_list.head(); - while (rx_cur != NULL) { - rx_cur->result = false; - rx_cur->complete(); - rx_cur = _rx_list.head(); - } -} - void USBCDC::receive_nb(uint8_t *buffer, uint32_t size, uint32_t *size_read) { @@ -496,7 +480,7 @@ void USBCDC::_receive_isr(usb_ep_t endpoint) _rx_buf = _rx_buffer; _rx_size = read_finish(_bulk_out); _rx_in_progress = false; - _receive_next(); + _rx_list.process(); if (!_rx_in_progress) { data_rx(); } diff --git a/usb/device/USBSerial/USBCDC.h b/usb/device/USBSerial/USBCDC.h index 726ffb4419e..fd00f227c7a 100644 --- a/usb/device/USBSerial/USBCDC.h +++ b/usb/device/USBSerial/USBCDC.h @@ -22,7 +22,7 @@ #include "USBDevice_Types.h" #include "USBDevice.h" -#include "LinkedList.h" +#include "OperationList.h" class AsyncOp; @@ -180,6 +180,7 @@ class USBCDC: public USBDevice { class AsyncWrite; class AsyncRead; + class AsyncWait; virtual void callback_reset(); virtual void callback_state_change(DeviceState new_state); @@ -191,15 +192,10 @@ class USBCDC: public USBDevice { void _init(); void _change_terminal_connected(bool connected); - void _connect_wake_all(); - void _send_next(); - void _send_abort_all(); void _send_isr_start(); void _send_isr(usb_ep_t endpoint); - void _receive_next(); - void _receive_abort_all(); void _receive_isr_start(); void _receive_isr(usb_ep_t endpoint); @@ -211,16 +207,16 @@ class USBCDC: public USBDevice { uint8_t _cdc_new_line_coding[7]; uint8_t _config_descriptor[75]; - LinkedList _connected_list; + OperationList _connected_list; bool _terminal_connected; - LinkedList _tx_list; + OperationList _tx_list; bool _tx_in_progress; uint8_t _tx_buffer[64]; uint8_t *_tx_buf; uint32_t _tx_size; - LinkedList _rx_list; + OperationList _rx_list; bool _rx_in_progress; uint8_t _rx_buffer[64]; uint8_t *_rx_buf; From b67d4238f6ff8b59d0e1a0ae50f687319d531532 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 10 May 2018 22:39:39 -0500 Subject: [PATCH 339/488] Require USB classes to implement descriptor Make the function configuration_desc pure virtual inside USBDevice. This should be a compile time error since no subclass will work without a configuration descriptor. --- usb/device/USBDevice/USBDevice.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index a1b491574b3..40051ce9c08 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -267,10 +267,7 @@ class USBDevice: public USBPhyEvents { * @param index descriptor index * @returns pointer to the configuration descriptor */ - virtual const uint8_t *configuration_desc(uint8_t index) - { - return NULL; - }; + virtual const uint8_t *configuration_desc(uint8_t index) = 0; /* * Get string lang id descriptor From eaab2d14f74265dc95a2c7f26e6fde716784e686 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 10 May 2018 22:39:50 -0500 Subject: [PATCH 340/488] Update the USBMIDI class Update the USB class USBMIDI from the unsupported folder. --- usb/device/USBMIDI/MIDIMessage.h | 474 +++++++++++++++++++++++++++++++ usb/device/USBMIDI/USBMIDI.cpp | 397 ++++++++++++++++++++++++++ usb/device/USBMIDI/USBMIDI.h | 184 ++++++++++++ 3 files changed, 1055 insertions(+) create mode 100644 usb/device/USBMIDI/MIDIMessage.h create mode 100644 usb/device/USBMIDI/USBMIDI.cpp create mode 100644 usb/device/USBMIDI/USBMIDI.h diff --git a/usb/device/USBMIDI/MIDIMessage.h b/usb/device/USBMIDI/MIDIMessage.h new file mode 100644 index 00000000000..ff16226a9d6 --- /dev/null +++ b/usb/device/USBMIDI/MIDIMessage.h @@ -0,0 +1,474 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MIDIMESSAGE_H +#define MIDIMESSAGE_H + +#include "mbed.h" + +#define MAX_MIDI_MESSAGE_SIZE 256 // Max message size. SysEx can be up to 65536 but 256 should be fine for most usage + +// MIDI Message Format +// +// [ msg(4) | channel(4) ] [ 0 | n(7) ] [ 0 | m(7) ] +// +// MIDI Data Messages (Channel Specific) +// +// Message msg n m +// --------------------------------------------- +// Note Off 0x8 Key Velocity +// Note On 0x9 Key Velocity +// Polyphonic Aftertouch 0xA Key Pressure +// Control Change 0xB Controller Value +// Program Change 0xC Program - +// Channel Aftertouch 0xD Pressure - +// Pitch Wheel 0xE LSB MSB + +#define CABLE_NUM (0<<4) + +/** A MIDI message container */ +class MIDIMessage { +public: + + MIDIMessage() : data(new uint8_t[MAX_MIDI_MESSAGE_SIZE + 1]), length(0) {} + + MIDIMessage(uint8_t *buf) : data(new uint8_t[MAX_MIDI_MESSAGE_SIZE + 1]), length(0) + { + for (int i = 0; i < 4; i++) { + data[i] = buf[i]; + } + } + + /** + * Copy constructor + */ + MIDIMessage(const MIDIMessage &other) + { + *this = other; + } + + /** + * Assignment operator + */ + MIDIMessage &operator=(const MIDIMessage &other) + { + length = other.length; + for (int i = 0; i < length; i++) { + data[i] = other.data[i]; + } + + return *this; + } + + ~MIDIMessage() + { + delete[] data; + } + + /** + * Set this MIDIMessage to a raw MIDI message + * + * @param buf is a true MIDI message (not USBMidi message) + * @param buf_len size of message + */ + void from_raw(uint8_t *buf, int buf_len) + { + length = buf_len + 1; + if (length > MAX_MIDI_MESSAGE_SIZE) { + // Message is too big + length = 0; + return; + } + + // first byte keeped for retro-compatibility + data[0] = CABLE_NUM | 0x08; + + for (int i = 0; i < buf_len; i++) { + data[i + 1] = buf[i]; + } + } + + // create messages + + /** Create a NoteOff message + * @param key Key ID + * @param velocity Key velocity (0-127, default = 127) + * @param channel Key channel (0-15, default 0) + * @returns A MIDIMessage + */ + static MIDIMessage NoteOff(int key, int velocity = 127, int channel = 0) + { + MIDIMessage msg; + msg.data[0] = CABLE_NUM | 0x08; + msg.data[1] = 0x80 | (channel & 0x0F); + msg.data[2] = key & 0x7F; + msg.data[3] = velocity & 0x7F; + msg.length = 4; + return msg; + } + + /** Create a NoteOn message + * @param key Key ID + * @param velocity Key velocity (0-127, default = 127) + * @param channel Key channel (0-15, default 0) + * @returns A MIDIMessage + */ + static MIDIMessage NoteOn(int key, int velocity = 127, int channel = 0) + { + MIDIMessage msg; + msg.data[0] = CABLE_NUM | 0x09; + msg.data[1] = 0x90 | (channel & 0x0F); + msg.data[2] = key & 0x7F; + msg.data[3] = velocity & 0x7F; + msg.length = 4; + return msg; + } + + /** Create a PolyPhonic Aftertouch message + * @param key Key ID + * @param pressure Aftertouch pressure (0-127) + * @param channel Key channel (0-15, default 0) + * @returns A MIDIMessage + */ + static MIDIMessage PolyphonicAftertouch(int key, int pressure, int channel = 0) + { + MIDIMessage msg; + msg.data[0] = CABLE_NUM | 0x0A; + msg.data[1] = 0xA0 | (channel & 0x0F); + msg.data[2] = key & 0x7F; + msg.data[3] = pressure & 0x7F; + msg.length = 4; + return msg; + } + + /** Create a Control Change message + * @param control Controller ID + * @param value Controller value (0-127) + * @param channel Controller channel (0-15, default 0) + * @returns A MIDIMessage + */ + static MIDIMessage ControlChange(int control, int value, int channel = 0) + { + MIDIMessage msg; + msg.data[0] = CABLE_NUM | 0x0B; + msg.data[1] = 0xB0 | (channel & 0x0F); + msg.data[2] = control & 0x7F; + msg.data[3] = value & 0x7F; + msg.length = 4; + return msg; + } + + /** Create a Program Change message + * @param program Program ID + * @param channel Channel (0-15, default 0) + * @returns A MIDIMessage + */ + static MIDIMessage ProgramChange(int program, int channel = 0) + { + MIDIMessage msg; + msg.data[0] = CABLE_NUM | 0x0C; + msg.data[1] = 0xC0 | (channel & 0x0F); + msg.data[2] = program & 0x7F; + msg.data[3] = 0x00; + msg.length = 4; + return msg; + } + + /** Create a Channel Aftertouch message + * @param pressure Pressure + * @param channel Key channel (0-15, default 0) + * @returns A MIDIMessage + */ + static MIDIMessage ChannelAftertouch(int pressure, int channel = 0) + { + MIDIMessage msg; + msg.data[0] = CABLE_NUM | 0x0D; + msg.data[1] = 0xD0 | (channel & 0x0F); + msg.data[2] = pressure & 0x7F; + msg.data[3] = 0x00; + msg.length = 4; + return msg; + } + + /** Create a Pitch Wheel message + * @param pitch Pitch (-8192 - 8191, default = 0) + * @param channel Channel (0-15, default 0) + * @returns A MIDIMessage + */ + static MIDIMessage PitchWheel(int pitch = 0, int channel = 0) + { + MIDIMessage msg; + int p = pitch + 8192; // 0 - 16383, 8192 is center + msg.data[0] = CABLE_NUM | 0x0E; + msg.data[1] = 0xE0 | (channel & 0x0F); + msg.data[2] = p & 0x7F; + msg.data[3] = (p >> 7) & 0x7F; + msg.length = 4; + return msg; + } + + /** Create an All Notes Off message + * @param channel Channel (0-15, default 0) + * @returns A MIDIMessage + */ + static MIDIMessage AllNotesOff(int channel = 0) + { + return ControlChange(123, 0, channel); + } + + /** Create a SysEx message + * @param data SysEx data (including 0xF0 .. 0xF7) + * @param len SysEx data length + * @returns A MIDIMessage + */ + static MIDIMessage SysEx(uint8_t *data, int len) + { + MIDIMessage msg; + msg.from_raw(data, len); + return msg; + } + + // decode messages + + /** MIDI Message Types */ + enum MIDIMessageType { + ErrorType, + NoteOffType, + NoteOnType, + PolyphonicAftertouchType, + ControlChangeType, + ProgramChangeType, + ChannelAftertouchType, + PitchWheelType, + ResetAllControllersType, + AllNotesOffType, + SysExType + }; + + /** Read the message type + * + * @returns MIDIMessageType + */ + MIDIMessageType type() + { + MIDIMessageType message_type; + uint8_t min_size; + switch ((data[1] >> 4) & 0xF) { + case 0x8: + // message, channel + // key + // velocity + min_size = 3; + message_type = NoteOffType; + break; + case 0x9: + // message, channel + // key + // velocity + min_size = 3; + message_type = NoteOnType; + break; + case 0xA: + // message, channel + // key + // pressure + min_size = 3; + message_type = PolyphonicAftertouchType; + break; + case 0xB: + // message, channel + // controller + min_size = 2; + if ((data[2] & 0x7F) < 120) { // standard controllers + message_type = ControlChangeType; + } else if ((data[2] & 0x7F) == 121) { + message_type = ResetAllControllersType; + } else if ((data[2] & 0x7F) == 123) { + message_type = AllNotesOffType; + } else { + message_type = ErrorType; // unsupported atm + } + break; + case 0xC: + // message, channel + // program + min_size = 2; + message_type = ProgramChangeType; + break; + case 0xD: + // message, channel + // pressure + min_size = 2; + message_type = ChannelAftertouchType; + break; + case 0xE: + // message, channel + // pitch lsb + // pitch msb + min_size = 3; + message_type = PitchWheelType; + break; + case 0xF: + min_size = 2; + message_type = SysExType; + break; + default: + message_type = ErrorType; + break; + } + + + if (length < min_size) { + // too small to be a valid message + message_type = ErrorType; + } + return message_type; + } + + /** + * Read the channel number + * + * @return channel number or -1 on error + */ + + int channel() + { + return (data[1] & 0x0F); + } + + /** + * Read the key ID + * + * @return key ID or -1 on error + */ + int key() + { + MIDIMessageType msg_type = type(); + if ((msg_type != NoteOffType) && + (msg_type != NoteOnType) && + (msg_type != PolyphonicAftertouchType)) { + return -1; + } + + return data[2] & 0x7F; + } + + /** + * Read the velocity + * + * @return velocity or -1 on error + */ + int velocity() + { + MIDIMessageType msg_type = type(); + if ((msg_type != NoteOffType) && + (msg_type != NoteOnType)) { + return -1; + } + + return data[3] & 0x7F; + } + + /** + * Read the controller value + * + * @return controller value or -1 on error + */ + int value() + { + MIDIMessageType msg_type = type(); + if ((msg_type != ControlChangeType) && + (msg_type != ResetAllControllersType) && + (msg_type != AllNotesOffType)) { + return -1; + } + + return data[3] & 0x7F; + } + + /** + * Read the aftertouch pressure + * + * @return aftertouch pressure or -1 on error + */ + int pressure() + { + MIDIMessageType msg_type = type(); + if ((msg_type != PolyphonicAftertouchType) && + (msg_type != ChannelAftertouchType)) { + return -1; + } + + if (type() == PolyphonicAftertouchType) { + return data[3] & 0x7F; + } else { + return data[2] & 0x7F; + } + } + + /** + * Read the controller number + * + * @return controller number or -1 on error + */ + int controller() + { + MIDIMessageType msg_type = type(); + if ((msg_type != ControlChangeType) && + (msg_type != ResetAllControllersType) && + (msg_type != AllNotesOffType)) { + return -1; + } + + return data[2] & 0x7F; + } + + /** + * Read the program number + * + * @return program number or -1 on error + */ + int program() + { + MIDIMessageType msg_type = type(); + if (msg_type != ProgramChangeType) { + return -1; + } + + return data[2] & 0x7F; + } + + /** + * Read the pitch value + * + * @return pitch value or -1 on error + */ + int pitch() + { + MIDIMessageType msg_type = type(); + if (msg_type != PitchWheelType) { + return -1; + } + + int p = ((data[3] & 0x7F) << 7) | (data[2] & 0x7F); + return p - 8192; // 0 - 16383, 8192 is center + } + + uint8_t *data; + uint16_t length; +}; + +#endif diff --git a/usb/device/USBMIDI/USBMIDI.cpp b/usb/device/USBMIDI/USBMIDI.cpp new file mode 100644 index 00000000000..4fb902c5ebd --- /dev/null +++ b/usb/device/USBMIDI/USBMIDI.cpp @@ -0,0 +1,397 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBMIDI.h" +#include "EndpointResolver.h" +#include "usb_phy_api.h" + +#define FLAG_WRITE_DONE (1 << 0) +#define FLAG_DISCONNECT (1 << 1) +#define FLAG_CONNECT (1 << 2) + +USBMIDI::USBMIDI(bool connect_blocking, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) + : USBDevice(get_usb_phy(), vendor_id, product_id, product_release) +{ + _init(); + + if (connect_blocking) { + USBDevice::connect(); + wait_ready(); + } else { + init(); + } +} + +USBMIDI::USBMIDI(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) + : USBDevice(phy, vendor_id, product_id, product_release) +{ + _init(); + + // User or child responsible for calling connect or init +} + +USBMIDI::~USBMIDI() +{ + deinit(); +} + +void USBMIDI::_init() +{ + _bulk_buf_pos = 0; + _bulk_buf_size = 0; + + _data_ready = false; + _cur_data = 0; + + EndpointResolver resolver(endpoint_table()); + + resolver.endpoint_ctrl(64); + _bulk_in = resolver.endpoint_in(USB_EP_TYPE_BULK, MaxSize); + _bulk_out = resolver.endpoint_out(USB_EP_TYPE_BULK, MaxSize); + MBED_ASSERT(resolver.valid()); +} + +bool USBMIDI::ready() +{ + return _flags.get() & FLAG_CONNECT ? true : false; +} + +void USBMIDI::wait_ready() +{ + _flags.wait_any(FLAG_CONNECT, osWaitForever, false); +} + +// write plain MIDIMessage that will be converted to USBMidi event packet +bool USBMIDI::write(MIDIMessage m) +{ + _write_mutex.lock(); + + bool ret = true; + // first byte keeped for retro-compatibility + for (int p = 1; p < m.length; p += 3) { + uint8_t buf[4]; + // Midi message to USBMidi event packet + buf[0] = m.data[1] >> 4; + // SysEx + if (buf[0] == 0xF) { + if ((m.length - p) > 3) { + // SysEx start or continue + buf[0] = 0x4; + } else { + switch (m.length - p) { + case 1: + // SysEx end with one byte + buf[0] = 0x5; + break; + case 2: + // SysEx end with two bytes + buf[0] = 0x6; + break; + case 3: + // SysEx end with three bytes + buf[0] = 0x7; + break; + } + } + } + buf[1] = m.data[p]; + + if (p + 1 < m.length) { + buf[2] = m.data[p + 1]; + } else { + buf[2] = 0; + } + + if (p + 2 < m.length) { + buf[3] = m.data[p + 2]; + } else { + buf[3] = 0; + } + + _flags.clear(FLAG_WRITE_DONE); + USBDevice::write_start(_bulk_in, buf, 4); + uint32_t flags = _flags.wait_any(FLAG_WRITE_DONE | FLAG_DISCONNECT, osWaitForever, false); + if (flags & FLAG_DISCONNECT) { + ret = false; + break; + } + USBDevice::write_finish(_bulk_in); + } + + _write_mutex.unlock(); + return ret; +} + +bool USBMIDI::readable() +{ + lock(); + + bool ret = _data_ready; + + unlock(); + + return ret; +} + +bool USBMIDI::read(MIDIMessage *m) +{ + lock(); + + // Invalidate message + m->length = 0; + + if (!_data_ready) { + unlock(); + return false; + } + + m->from_raw(_data, _cur_data); + _cur_data = 0; + _next_message(); + + if (!_data_ready) { + read_start(_bulk_out, _bulk_buf, MaxSize); + } + + unlock(); + + return true; +} + +void USBMIDI::attach(Callback callback) +{ + lock(); + + _callback = callback; + + unlock(); +} + +void USBMIDI::callback_state_change(DeviceState new_state) +{ + assert_locked(); + + if (new_state == Configured) { + _flags.set(FLAG_CONNECT); + _flags.clear(FLAG_DISCONNECT); + } else { + _flags.set(FLAG_DISCONNECT); + _flags.clear(FLAG_CONNECT | FLAG_WRITE_DONE); + } +} + +void USBMIDI::callback_request(const setup_packet_t *setup) +{ + assert_locked(); + + RequestResult result = PassThrough; + uint8_t *data = NULL; + uint32_t size = 0; + + complete_request(result, data, size); +} + +void USBMIDI::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) +{ + assert_locked(); + + complete_request_xfer_done(false); +} + +void USBMIDI::callback_set_configuration(uint8_t configuration) +{ + assert_locked(); + + if (configuration == DEFAULT_CONFIGURATION) { + complete_set_configuration(false); + } + + endpoint_remove_all(); + endpoint_add(_bulk_in, MaxSize, USB_EP_TYPE_BULK, &USBMIDI::_in_callback); + endpoint_add(_bulk_out, MaxSize, USB_EP_TYPE_BULK, &USBMIDI::_out_callback); + + read_start(_bulk_out, _bulk_buf, MaxSize); + + complete_set_configuration(true); +} + +void USBMIDI::callback_set_interface(uint16_t interface, uint8_t alternate) +{ + assert_locked(); + + complete_set_interface(true); +} + +const uint8_t *USBMIDI::string_iinterface_desc() +{ + static const uint8_t string_iinterface_descriptor[] = { + 0x0c, //bLength + STRING_DESCRIPTOR, //bDescriptorType 0x03 + 'A', 0, 'u', 0, 'd', 0, 'i', 0, 'o', 0 //bString iInterface - Audio + }; + return string_iinterface_descriptor; +} + +const uint8_t *USBMIDI::string_iproduct_desc() +{ + static const uint8_t string_iproduct_descriptor[] = { + 0x16, //bLength + STRING_DESCRIPTOR, //bDescriptorType 0x03 + 'M', 0, 'b', 0, 'e', 0, 'd', 0, ' ', 0, 'A', 0, 'u', 0, 'd', 0, 'i', 0, 'o', 0 //bString iProduct - Mbed Audio + }; + return string_iproduct_descriptor; +} + +const uint8_t *USBMIDI::configuration_desc(uint8_t index) +{ + if (index != 0) { + return NULL; + } + + uint8_t config_descriptor_temp[] = { + // configuration descriptor + 0x09, 0x02, 0x65, 0x00, 0x02, 0x01, 0x00, 0xc0, 0x50, + + // The Audio Interface Collection + 0x09, 0x04, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, // Standard AC Interface Descriptor + 0x09, 0x24, 0x01, 0x00, 0x01, 0x09, 0x00, 0x01, 0x01, // Class-specific AC Interface Descriptor + 0x09, 0x04, 0x01, 0x00, 0x02, 0x01, 0x03, 0x00, 0x00, // MIDIStreaming Interface Descriptors + 0x07, 0x24, 0x01, 0x00, 0x01, 0x41, 0x00, // Class-Specific MS Interface Header Descriptor + + // MIDI IN JACKS + 0x06, 0x24, 0x02, 0x01, 0x01, 0x00, + 0x06, 0x24, 0x02, 0x02, 0x02, 0x00, + + // MIDI OUT JACKS + 0x09, 0x24, 0x03, 0x01, 0x03, 0x01, 0x02, 0x01, 0x00, + 0x09, 0x24, 0x03, 0x02, 0x06, 0x01, 0x01, 0x01, 0x00, + + // OUT endpoint - Standard MS Bulk Data Endpoint Descriptor + 0x09, // bLength + 0x05, // bDescriptorType + _bulk_out, // bEndpointAddress + 0x02, // bmAttributes + 0x40, // wMaxPacketSize (LSB) + 0x00, // wMaxPacketSize (MSB) + 0x00, // bInterval (milliseconds) + 0x00, // bRefresh + 0x00, // bSynchAddress + + 0x05, 0x25, 0x01, 0x01, 0x01, + + // IN endpoint - Standard MS Bulk Data Endpoint Descriptor + 0x09, // bLength + 0x05, // bDescriptorType + _bulk_in, // bEndpointAddress + 0x02, // bmAttributes + 0x40, // wMaxPacketSize (LSB) + 0x00, // wMaxPacketSize (MSB) + 0x00, // bInterval (milliseconds) + 0x00, // bRefresh + 0x00, // bSynchAddress + + 0x05, 0x25, 0x01, 0x01, 0x03, + }; + MBED_ASSERT(sizeof(config_descriptor_temp) == sizeof(_config_descriptor)); + memcpy(_config_descriptor, config_descriptor_temp, sizeof(config_descriptor_temp)); + return _config_descriptor; +} + +void USBMIDI::_in_callback(usb_ep_t ep) +{ + assert_locked(); + + _flags.set(FLAG_WRITE_DONE); +} + +void USBMIDI::_out_callback(usb_ep_t ep) +{ + assert_locked(); + + _bulk_buf_size = read_finish(_bulk_out); + _bulk_buf_pos = 0; + + if (_callback && _next_message()) { + _callback(); + return; + } + + read_start(_bulk_out, _bulk_buf, MaxSize); +} + +bool USBMIDI::_next_message() +{ + assert_locked(); + + bool data_ready = false; + while (_bulk_buf_pos < _bulk_buf_size) { + uint8_t data_read; + bool data_end = true; + switch (_bulk_buf[_bulk_buf_pos]) { + case 0x2: + // Two-bytes System Common Message - undefined in USBMidi 1.0 + data_read = 2; + break; + case 0x4: + // SysEx start or continue + data_end = false; + data_read = 3; + break; + case 0x5: + // Single-byte System Common Message or SysEx end with one byte + data_read = 1; + break; + case 0x6: + // SysEx end with two bytes + data_read = 2; + break; + case 0xC: + // Program change + data_read = 2; + break; + case 0xD: + // Channel pressure + data_read = 2; + break; + case 0xF: + // Single byte + data_read = 1; + break; + default: + // Others three-bytes messages + data_read = 3; + break; + } + + for (uint8_t j = 1; j < data_read + 1; j++) { + if (_cur_data < sizeof(_data)) { + _data[_cur_data] = _bulk_buf[_bulk_buf_pos + j]; + } + _cur_data++; + } + _bulk_buf_pos += 4; + + if (data_end) { + // Message is ready to be read + data_ready = true; + break; + } + } + + _data_ready = data_ready; + return data_ready; +} diff --git a/usb/device/USBMIDI/USBMIDI.h b/usb/device/USBMIDI/USBMIDI.h new file mode 100644 index 00000000000..c1d968d6192 --- /dev/null +++ b/usb/device/USBMIDI/USBMIDI.h @@ -0,0 +1,184 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBMIDI_H +#define USBMIDI_H + +/* These headers are included for child class. */ +#include "USBDescriptor.h" +#include "USBDevice_Types.h" + +#include "USBDevice.h" +#include "MIDIMessage.h" +#include "EventFlags.h" +#include "Mutex.h" +#include "Callback.h" + +#define DEFAULT_CONFIGURATION (1) + +/** +* USBMIDI example +* +* @code +* #include "mbed.h" +* #include "USBMIDI.h" +* +* USBMIDI midi; +* +* int main() { +* while (1) { +* for(int i=48; i<83; i++) { // send some messages! +* midi.write(MIDIMessage::NoteOn(i)); +* wait(0.25); +* midi.write(MIDIMessage::NoteOff(i)); +* wait(0.5); +* } +* } +* } +* @endcode +*/ +class USBMIDI: public USBDevice { +public: + + /** + * Basic constructor + * + * Construct this object optionally connecting and blocking until it is ready. + * + * @note Do not use this constructor in derived classes. + * + * @param connect_blocking true to perform a blocking connect, false to start in a disconnected state + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBMIDI(bool connect_blocking = true, uint16_t vendor_id = 0x0700, uint16_t product_id = 0x0101, uint16_t product_release = 0x0001); + + /** + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. + * + * @param phy USB phy to use + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBMIDI(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ + virtual ~USBMIDI(); + + /** + * Check if this class is ready + * + * @return true if configured, false otherwise + */ + bool ready(); + + /** + * Block until this device is configured + */ + void wait_ready(); + + /** + * Send a MIDIMessage + * + * @param m The MIDIMessage to send + * @return true if the message was sent, false otherwise + */ + bool write(MIDIMessage m); + + /** + * Check if a message can be read + * + * @return true if a packet can be read false otherwise + * @note USBMIDI::attach must be called to enable the receiver + */ + bool readable(); + + /** + * Read a message + * + * @param m The MIDIMessage to fill + * @return true if a message was read, false otherwise + */ + bool read(MIDIMessage *m); + + /** + * Attach a callback for when a MIDIEvent is received + * + * @param callback code to call when a packet is received + */ + void attach(Callback callback); + + +protected: + + virtual void callback_state_change(DeviceState new_state); + + virtual void callback_request(const setup_packet_t *setup); + + virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); + + virtual void callback_set_configuration(uint8_t configuration); + + virtual void callback_set_interface(uint16_t interface, uint8_t alternate); + + virtual const uint8_t *string_iproduct_desc(); + + virtual const uint8_t *string_iinterface_desc(); + + virtual const uint8_t *configuration_desc(uint8_t index); + +private: + static const uint32_t MaxSize = 64; + + uint8_t _bulk_buf[MaxSize]; + uint32_t _bulk_buf_pos; + uint32_t _bulk_buf_size; + + bool _data_ready; + uint8_t _data[MAX_MIDI_MESSAGE_SIZE + 1]; + uint32_t _cur_data; + + rtos::EventFlags _flags; + rtos::Mutex _write_mutex; + + usb_ep_t _bulk_in; + usb_ep_t _bulk_out; + uint8_t _config_descriptor[0x65]; + + Callback _callback; + + void _init(); + void _in_callback(usb_ep_t); + void _out_callback(usb_ep_t); + bool _next_message(); +}; + +#endif From f6a21c6c723d9e54a1f1840ffebc331a32d63dad Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sun, 27 May 2018 16:44:00 -0500 Subject: [PATCH 341/488] Add default values to USBCDC constructor Add reasonable defaults to the USBCDC constructor so it is easier to use. --- usb/device/USBSerial/USBCDC.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/usb/device/USBSerial/USBCDC.h b/usb/device/USBSerial/USBCDC.h index fd00f227c7a..bc281550e46 100644 --- a/usb/device/USBSerial/USBCDC.h +++ b/usb/device/USBSerial/USBCDC.h @@ -41,7 +41,7 @@ class USBCDC: public USBDevice { * @param product_id Your product_id * @param product_release Your product_release */ - USBCDC(bool connect_blocking, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); + USBCDC(bool connect_blocking=true, uint16_t vendor_id=0x1f00, uint16_t product_id=0x2012, uint16_t product_release=0x0001); /** * Fully featured constructor From f4740107cc1f94c80dea4cd8377d0c8c11fab761 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 15 May 2018 18:41:33 -0500 Subject: [PATCH 342/488] Fix LPC1768 test failures Reset endpoints when they are removed. This ensures buffers and the data toggle bit get reset back to zero. --- usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp b/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp index d962235961a..2192bec7317 100644 --- a/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp +++ b/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp @@ -583,6 +583,9 @@ void USBPhyHw::endpoint_remove(usb_ep_t endpoint) disableEndpointEvent(endpoint); + // reset this endpoint, including data toggle + SIEsetEndpointStatus(endpoint, 0); + LPC_USB->USBDevIntClr = EP_RLZED; LPC_USB->USBReEp &= ~EP(endpoint); From 7a2be8266cfa37a071deff7e7d19149ba2829052 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 15 May 2018 19:32:48 -0500 Subject: [PATCH 343/488] Implement LPC1768 USB abort function Implement the USB abort function so interrupts wont fire for a transfer that has been aborted. The transfer may still take place but the buffer passed into endpoint_write or endpoint_read will not be used. --- .../targets/TARGET_NXP/USBHAL_LPC17.cpp | 86 ++++++++++++------- 1 file changed, 56 insertions(+), 30 deletions(-) diff --git a/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp b/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp index 2192bec7317..58c264a5e4a 100644 --- a/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp +++ b/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp @@ -120,7 +120,7 @@ static USBPhyHw *instance; -static volatile int epComplete; +static uint32_t opStarted; static void SIECommand(uint32_t command) { @@ -250,16 +250,24 @@ static uint8_t selectEndpointClearInterrupt(uint8_t endpoint) static void enableEndpointEvent(uint8_t endpoint) { - // Enable an endpoint interrupt + // Route endpoint events to USBEpIntSt so they trigger an interrupt LPC_USB->USBEpIntEn |= EP(endpoint); } +// Do not use disableEndpointEvent. If an endpoint's event is disabled +// and a transfer occurs on that endpoint then that endpoint will enter +// a bad state. Future transfers on that endpoint will not trigger an +// interrupt even if the endpoint event is enabled again or the +// endpoint is reinitialized +/* static void disableEndpointEvent(uint8_t endpoint) __attribute__((unused)); static void disableEndpointEvent(uint8_t endpoint) { - // Disable an endpoint interrupt + // Don't set endpoint interrupt to pending in USBEpIntSt when an event occurs. + // Instead route them to USBDMARSt so they can be ignored. LPC_USB->USBEpIntEn &= ~EP(endpoint); } +*/ static uint32_t endpointReadcore(uint8_t endpoint, uint8_t *buffer, uint32_t size) @@ -392,10 +400,18 @@ void USBPhyHw::init(USBPhyEvents *events) // Connect must be low for at least 2.5uS wait(0.3); + // Disable control endpoints + SIEsetEndpointStatus(EP0IN, SIE_SES_DA); + SIEsetEndpointStatus(EP0OUT, SIE_SES_DA); + // Set the maximum packet size for the control endpoints endpoint_add(EP0IN, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); endpoint_add(EP0OUT, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); + // Map interrupts to USBEpIntSt + enableEndpointEvent(EP0IN); + enableEndpointEvent(EP0OUT); + // Attach IRQ instance = this; NVIC_SetVector(USB_IRQn, (uint32_t)&_usbisr); @@ -413,6 +429,7 @@ void USBPhyHw::deinit() // Disable USB interrupts NVIC_DisableIRQ(USB_IRQn); events = NULL; + opStarted = 0; } bool USBPhyHw::powered() @@ -422,8 +439,9 @@ bool USBPhyHw::powered() void USBPhyHw::connect(void) { - enableEndpointEvent(EP0IN); - enableEndpointEvent(EP0OUT); + // Enable control endpoints + SIEsetEndpointStatus(EP0IN, 0); + SIEsetEndpointStatus(EP0OUT, 0); // Connect USB device SIEconnect(); @@ -431,8 +449,9 @@ void USBPhyHw::connect(void) void USBPhyHw::disconnect(void) { - disableEndpointEvent(EP0IN); - disableEndpointEvent(EP0OUT); + // Disable control endpoints + SIEsetEndpointStatus(EP0IN, SIE_SES_DA); + SIEsetEndpointStatus(EP0OUT, SIE_SES_DA); if (LPC_USB->USBEpIntSt & EP(EP0IN)) { selectEndpointClearInterrupt(EP0IN); @@ -512,9 +531,9 @@ void USBPhyHw::ep0_stall(void) bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) { + opStarted |= EP(endpoint); read_buffers[endpoint] = data; read_sizes[endpoint] = size; - enableEndpointEvent(endpoint); uint8_t status = SIEselectEndpoint(endpoint); if (status & ((1 << 5) | (1 << 6))) { // If any buffer has data then set the interrupt flag @@ -525,13 +544,7 @@ bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) { - - //for isochronous endpoint, we don't wait an interrupt - if ((DESC_TO_PHY(endpoint) >> 1) % 3 || (DESC_TO_PHY(endpoint) >> 1) == 0) { - if (!(epComplete & EP(endpoint))) { - return 0; - } - } + opStarted &= ~EP(endpoint); uint32_t bytesRead = endpointReadcore(endpoint, read_buffers[endpoint], read_sizes[endpoint]); read_buffers[endpoint] = NULL; @@ -543,13 +556,12 @@ uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) SIEclearBuffer(); } - epComplete &= ~EP(endpoint); return bytesRead; } bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) { - epComplete &= ~EP(endpoint); + opStarted |= EP(endpoint); endpointWritecore(endpoint, data, size); return true; @@ -557,7 +569,13 @@ bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) void USBPhyHw::endpoint_abort(usb_ep_t endpoint) { - //TODO - needs to be implemented + opStarted &= ~EP(endpoint); + + // Clear out transfer buffers since the transfer has been aborted + if (OUT_EP(endpoint)) { + read_buffers[endpoint] = NULL; + read_sizes[endpoint] = 0; + } } bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t maxPacket, usb_ep_type_t type) @@ -571,9 +589,12 @@ bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t maxPacket, usb_ep_type_t while (!(LPC_USB->USBDevIntSt & EP_RLZED)); LPC_USB->USBDevIntClr = EP_RLZED; - if (IN_EP(endpoint)) { - enableEndpointEvent(endpoint); - } + // Map interrupts to USBEpIntSt + enableEndpointEvent(endpoint); + + // Enable this endpoint + SIEsetEndpointStatus(endpoint, 0); + return true; } @@ -581,10 +602,15 @@ void USBPhyHw::endpoint_remove(usb_ep_t endpoint) { // Unrealise an endpoint - disableEndpointEvent(endpoint); + opStarted &= ~EP(endpoint); - // reset this endpoint, including data toggle - SIEsetEndpointStatus(endpoint, 0); + // Disable this endpoint + SIEsetEndpointStatus(endpoint, SIE_SES_DA); + + // Clear the given interrupt bit in USBEpIntSt if it is set + if (LPC_USB->USBEpIntSt & EP(endpoint)) { + selectEndpointClearInterrupt(endpoint); + } LPC_USB->USBDevIntClr = EP_RLZED; LPC_USB->USBReEp &= ~EP(endpoint); @@ -731,12 +757,12 @@ void USBPhyHw::process(void) uint8_t endpoint = PHY_TO_DESC(num); if (LPC_USB->USBEpIntSt & EP(endpoint)) { selectEndpointClearInterrupt(endpoint); - epComplete |= EP(endpoint); - if (IN_EP(endpoint)) { - events->in(endpoint); - } else { - disableEndpointEvent(endpoint); - events->out(endpoint); + if (opStarted & EP(endpoint)) { + if (IN_EP(endpoint)) { + events->in(endpoint); + } else { + events->out(endpoint); + } } } } From 601868b9e9ba7dff0162e1485c9197fba87d0c21 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 28 Mar 2018 19:30:53 +0200 Subject: [PATCH 344/488] Update the STM32 USB driver to the new API Take the code from mbed-os\features\unsupported\USBDevice\targets\TARGET_STM as a starting point and use it to fill in the USBPhy template for STM32 devices. --- targets/targets.json | 3 +- .../targets/TARGET_STM/USBEndpoints_STM32.h | 65 +++ usb/device/targets/TARGET_STM/USBPhyHw.h | 102 ++++ .../targets/TARGET_STM/USBPhy_STM32.cpp | 522 ++++++++++++++++++ 4 files changed, 691 insertions(+), 1 deletion(-) create mode 100644 usb/device/targets/TARGET_STM/USBEndpoints_STM32.h create mode 100644 usb/device/targets/TARGET_STM/USBPhyHw.h create mode 100644 usb/device/targets/TARGET_STM/USBPhy_STM32.cpp diff --git a/targets/targets.json b/targets/targets.json index 98b1e89e321..d22539e31e4 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -2207,7 +2207,8 @@ "SERIAL_ASYNCH", "SERIAL_FC", "FLASH", - "MPU" + "MPU", + "USBDEVICE" ], "device_has_remove": ["LPTICKER"], "release_versions": ["2", "5"], diff --git a/usb/device/targets/TARGET_STM/USBEndpoints_STM32.h b/usb/device/targets/TARGET_STM/USBEndpoints_STM32.h new file mode 100644 index 00000000000..a8723b2ae73 --- /dev/null +++ b/usb/device/targets/TARGET_STM/USBEndpoints_STM32.h @@ -0,0 +1,65 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#define NUMBER_OF_LOGICAL_ENDPOINTS (4) +#define NUMBER_OF_PHYSICAL_ENDPOINTS (NUMBER_OF_LOGICAL_ENDPOINTS * 2) + +/* Define physical endpoint numbers */ + +/* Endpoint No. Type(s) MaxPacket DoubleBuffer */ +/* ---------------- ------------ ---------- --- */ +#define EP0OUT (0x00) /* Control 64 No */ +#define EP0IN (0x80) /* Control 64 No */ +#define EP1OUT (0x01) /* Int/Bulk/Iso 64/64/1023 Yes */ +#define EP1IN (0x81) /* Int/Bulk/Iso 64/64/1023 Yes */ +#define EP2OUT (0x02) /* Int/Bulk/Iso 64/64/1023 Yes */ +#define EP2IN (0x82) /* Int/Bulk/Iso 64/64/1023 Yes */ +#define EP3OUT (0x03) /* Int/Bulk/Iso 64/64/1023 Yes */ +#define EP3IN (0x83) /* Int/Bulk/Iso 64/64/1023 Yes */ + +/* Maximum Packet sizes */ +#define MAX_PACKET_SIZE_SETUP (48) +#define MAX_PACKET_SIZE_EP0 (64) +#define MAX_PACKET_SIZE_EP1 (64) /* Int/Bulk */ +#define MAX_PACKET_SIZE_EP2 (64) /* Int/Bulk */ +#define MAX_PACKET_SIZE_EP3 (200) /* Int/Bulk/iso (44100 stereo 16 bits) */ + +#define MAX_PACKET_SIZE_EP1_ISO (1023) /* Isochronous */ +#define MAX_PACKET_SIZE_EP2_ISO (1023) /* Isochronous */ +#define MAX_PACKET_SIZE_EP3_ISO (1023) /* Isochronous */ + +/* Generic endpoints - intended to be portable accross devices */ +/* and be suitable for simple USB devices. */ + +/* Bulk endpoint */ +#define EPBULK_OUT (EP2OUT) +#define EPBULK_IN (EP2IN) +#define EPBULK_OUT_callback EP2_OUT_callback +#define EPBULK_IN_callback EP2_IN_callback +/* Interrupt endpoint */ +#define EPINT_OUT (EP1OUT) +#define EPINT_IN (EP1IN) +#define EPINT_OUT_callback EP1_OUT_callback +#define EPINT_IN_callback EP1_IN_callback +/* Isochronous endpoint */ +#define EPISO_OUT (EP3OUT) +#define EPISO_IN (EP3IN) +#define EPISO_OUT_callback EP3_OUT_callback +#define EPISO_IN_callback EP3_IN_callback + +#define MAX_PACKET_SIZE_EPBULK (MAX_PACKET_SIZE_EP2) +#define MAX_PACKET_SIZE_EPINT (MAX_PACKET_SIZE_EP1) +#define MAX_PACKET_SIZE_EPISO (MAX_PACKET_SIZE_EP3_ISO) diff --git a/usb/device/targets/TARGET_STM/USBPhyHw.h b/usb/device/targets/TARGET_STM/USBPhyHw.h new file mode 100644 index 00000000000..b117339c84b --- /dev/null +++ b/usb/device/targets/TARGET_STM/USBPhyHw.h @@ -0,0 +1,102 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBPHYHW_H +#define USBPHYHW_H + +#include "mbed.h" +#include "USBPhy.h" + +#if defined(TARGET_DISCO_F746NG) +#if (MBED_CONF_TARGET_USB_SPEED == 1) // Defined in json configuration file +#define TARGET_DISCO_F746NG_OTG_HS +#else +#define TARGET_DISCO_F746NG_OTG_FS +#endif +#endif + +#if defined(TARGET_DISCO_F429ZI) || \ + defined(TARGET_DISCO_F769NI) || \ + defined(TARGET_DISCO_F746NG_OTG_HS) +#define USBHAL_IRQn OTG_HS_IRQn +#else +#define USBHAL_IRQn OTG_FS_IRQn +#endif + +#include "USBEndpoints_STM32.h" + +#define NB_ENDPOINT 4 // Must be a multiple of 4 bytes + +#define MAXTRANSFER_SIZE 0x200 + +#define FIFO_USB_RAM_SIZE (MAXTRANSFER_SIZE + MAX_PACKET_SIZE_EP0 + MAX_PACKET_SIZE_EP1 + MAX_PACKET_SIZE_EP2 + MAX_PACKET_SIZE_EP3) + +#if (FIFO_USB_RAM_SIZE > 0x500) +#error "FIFO dimensioning incorrect" +#endif + +class USBPhyHw : public USBPhy { +public: + USBPhyHw(); + virtual ~USBPhyHw(); + virtual void init(USBPhyEvents *events); + virtual void deinit(); + virtual bool powered(); + virtual void connect(); + virtual void disconnect(); + virtual void configure(); + virtual void unconfigure(); + virtual void sof_enable(); + virtual void sof_disable(); + virtual void set_address(uint8_t address); + virtual void remote_wakeup(); + virtual const usb_ep_table_t* endpoint_table(); + + virtual uint32_t ep0_set_max_packet(uint32_t max_packet); + virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_read(uint8_t *data, uint32_t size); + virtual uint32_t ep0_read_result(); + virtual void ep0_write(uint8_t *buffer, uint32_t size); + virtual void ep0_stall(); + + virtual bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type); + virtual void endpoint_remove(usb_ep_t endpoint); + virtual void endpoint_stall(usb_ep_t endpoint); + virtual void endpoint_unstall(usb_ep_t endpoint); + + virtual bool endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual uint32_t endpoint_read_result(usb_ep_t endpoint); + virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual void endpoint_abort(usb_ep_t endpoint); + + virtual void process(); + + USBPhyEvents *events; + bool sof_enabled; + + uint8_t epComplete[2 * NB_ENDPOINT]; + uint32_t pBufRx[MAXTRANSFER_SIZE >> 2]; + uint32_t pBufRx0[MAX_PACKET_SIZE_EP0 >> 2]; + PCD_HandleTypeDef hpcd; + +private: + uint32_t _read_size[16]; + uint8_t *_read_buf[16]; + + static void _usbisr(void); +}; + +#endif diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp new file mode 100644 index 00000000000..09c98047264 --- /dev/null +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -0,0 +1,522 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* TARGET NOT STM does not support this HAL */ +#ifndef TARGET_STM +#define USBSTM_HAL_UNSUPPORTED +#endif + +/* STM32F4 family without USB_STM_HAL use another HAL */ +#if defined(TARGET_STM) && defined(TARGET_STM32F4) && !defined(USB_STM_HAL) +#define USBSTM_HAL_UNSUPPORTED +#endif + +#ifndef USBSTM_HAL_UNSUPPORTED +#include "USBPhyHw.h" +#include "pinmap.h" + + +/* endpoint conversion macros */ +#define EP_TO_LOG(ep) ((ep) & 0x7F) +#define EP_TO_IDX(ep) (((ep) << 1) | ((ep) & 0x80 ? 1 : 0)) +#define LOG_IN_TO_EP(ep) ((ep) | 0x80) +#define LOG_OUT_TO_EP(ep) ((ep) | 0x00) +#define IDX_TO_EP(ep) (((ep) >> 1)|((ep) & 1) << 7) + +uint32_t HAL_PCDEx_GetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo) +{ + uint32_t len; + if (fifo == 0) { + len = hpcd->Instance->DIEPTXF0_HNPTXFSIZ >> 16; + } + else { + len = hpcd->Instance->DIEPTXF[fifo - 1] >> 16; + } + return len * 4; +} + +void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) +{ + USBPhyHw *priv=((USBPhyHw *)(hpcd->pData)); + USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; + if (priv->sof_enabled) { + priv->events->sof((USBx_DEVICE->DSTS & USB_OTG_DSTS_FNSOF) >> 8); + } +} + +/* this call at device reception completion on a Out Enpoint */ +void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +{ + USBPhyHw *priv=((USBPhyHw *)(hpcd->pData)); + uint8_t endpoint = LOG_OUT_TO_EP(epnum); + priv->epComplete[EP_TO_IDX(endpoint)] = 1; + /* -2 endpoint 0 In out are not in call back list */ + if (epnum) { + priv->events->out(endpoint); + } else { + priv->events->ep0_out(); + } +} + +/* this is call at device transmission completion on In endpoint */ +void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +{ + USBPhyHw *priv=((USBPhyHw *)(hpcd->pData)); + uint8_t endpoint = LOG_IN_TO_EP(epnum); + priv->epComplete[EP_TO_IDX(endpoint)] = 1; + /* -2 endpoint 0 In out are not in call back list */ + if (epnum) { + priv->events->in(endpoint); + } else { + priv->events->ep0_in(); + } +} +/* This is call at device set up reception */ +void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) +{ + USBPhyHw *priv=((USBPhyHw *)(hpcd->pData)); + priv->events->ep0_setup(); +} + +void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) +{ + USBPhyHw *priv=((USBPhyHw *)(hpcd->pData)); + priv->events->suspend(1); +} + +void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) +{ + USBPhyHw *priv=((USBPhyHw *)(hpcd->pData)); + priv->events->suspend(0); +} + +void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd) +{ + // Nothing to do +} + +void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd) +{ + // Nothing to do +} + +void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) +{ + USBPhyHw *obj=((USBPhyHw *)(hpcd->pData)); + unsigned int i; + for(i=0;iInit.dev_endpoints;i++) { + obj->epComplete[2*i]=0; + HAL_PCD_EP_Close(hpcd,IDX_TO_EP(2*i)); + HAL_PCD_EP_Flush(hpcd,IDX_TO_EP(2*i)); + obj->epComplete[2*i+1]=0; + HAL_PCD_EP_Close(hpcd,IDX_TO_EP(2*i+1)); + HAL_PCD_EP_Flush(hpcd,IDX_TO_EP(2*i+1)); + + } + obj->endpoint_add(EP0IN, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); + obj->endpoint_add(EP0OUT, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); + obj->events->reset(); +} + + +/* hal pcd handler , used for STM32 HAL PCD Layer */ + +static USBPhyHw *instance; + +USBPhy *get_usb_phy() +{ + static USBPhyHw usbphy; + return &usbphy; +} + +USBPhyHw::USBPhyHw(): events(NULL), sof_enabled(false) +{ + +} + +USBPhyHw::~USBPhyHw() +{ + +} + +void USBPhyHw::init(USBPhyEvents *events) +{ + NVIC_DisableIRQ(USBHAL_IRQn); + + this->events = events; + sof_enabled = false; + memset(epComplete, 0, sizeof(epComplete)); + memset(pBufRx, 0, sizeof(pBufRx)); + memset(pBufRx0, 0, sizeof(pBufRx0)); + memset(&hpcd.Init, 0, sizeof(hpcd.Init)); + memset(_read_size, 0, sizeof(_read_size)); + memset(_read_buf, 0, sizeof(_read_buf)); + +#if defined(TARGET_DISCO_F769NI) || \ + defined(TARGET_DISCO_F746NG_OTG_HS) + hpcd.Instance = USB_OTG_HS; + hpcd.Init.phy_itface = PCD_PHY_ULPI; + hpcd.Init.Sof_enable = 1; + hpcd.Init.speed = PCD_SPEED_HIGH; +#elif defined(TARGET_DISCO_F429ZI) + hpcd.Instance = USB_OTG_HS; + hpcd.Init.phy_itface = PCD_PHY_EMBEDDED; + hpcd.Init.Sof_enable = 1; + hpcd.Init.speed = PCD_SPEED_HIGH; +#else + hpcd.Instance = USB_OTG_FS; + hpcd.Init.phy_itface = PCD_PHY_EMBEDDED; + hpcd.Init.Sof_enable = 1; + hpcd.Init.speed = PCD_SPEED_FULL; +#endif + hpcd.Init.dev_endpoints = NB_ENDPOINT; + hpcd.Init.ep0_mps = MAX_PACKET_SIZE_EP0; + + // Pass instance for usage inside call back + instance = this; + + // Configure USB pins and other clocks + +#if defined(TARGET_NUCLEO_F207ZG) || \ + defined(TARGET_NUCLEO_F401RE) || \ + defined(TARGET_NUCLEO_F411RE) || \ + defined(TARGET_NUCLEO_F412ZG) || \ + defined(TARGET_NUCLEO_F413ZH) || \ + defined(TARGET_NUCLEO_F429ZI) || \ + defined(TARGET_NUCLEO_F446RE) || \ + defined(TARGET_NUCLEO_F446ZE) || \ + defined(TARGET_NUCLEO_F767ZI) || \ + defined(TARGET_NUCLEO_F746ZG) || \ + defined(TARGET_DISCO_F407VG) || \ + defined(TARGET_DISCO_F413ZH) || \ + defined(TARGET_DISCO_F469NI) || \ + defined(TARGET_DISCO_F746NG_OTG_FS) + __HAL_RCC_GPIOA_CLK_ENABLE(); + pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DM + pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DP + pin_function(PA_9, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // VBUS + pin_function(PA_10, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)); // ID + pin_function(PA_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // SOF + __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); + +#elif defined(TARGET_DISCO_F429ZI) + __HAL_RCC_GPIOB_CLK_ENABLE(); + pin_function(PB_14, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_OTG_HS_FS)); // DM + pin_function(PB_15, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_OTG_HS_FS)); // DP + pin_function(PB_13, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); // VBUS + __HAL_RCC_USB_OTG_HS_CLK_ENABLE(); + +#elif defined(TARGET_DISCO_L475VG_IOT01A) || \ + defined(TARGET_DISCO_L476VG) + __HAL_RCC_GPIOA_CLK_ENABLE(); + pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DM + pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DP + __HAL_RCC_GPIOC_CLK_ENABLE(); + pin_function(PC_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // VBUS + __HAL_RCC_PWR_CLK_ENABLE(); + HAL_PWREx_EnableVddUSB(); + __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); + +#elif defined(TARGET_DISCO_F769NI) || \ + defined(TARGET_DISCO_F746NG_OTG_HS) + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); + __HAL_RCC_GPIOI_CLK_ENABLE(); + pin_function(PA_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // CLK + pin_function(PA_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D0 + pin_function(PB_0, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D1 + pin_function(PB_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D2 + pin_function(PB_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D3 + pin_function(PB_10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D4 + pin_function(PB_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D5 + pin_function(PB_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D6 + pin_function(PB_13, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D7 + pin_function(PC_0, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // STP + pin_function(PH_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // NXT +#if defined(TARGET_DISCO_F769NI) + pin_function(PI_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // DIR +#else // TARGET_DISCO_F746NG + pin_function(PC_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // DIR +#endif + __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE(); + __HAL_RCC_USB_OTG_HS_CLK_ENABLE(); + +#elif defined(TARGET_STEVAL_3DP001V1) + __HAL_RCC_GPIOB_CLK_ENABLE(); + pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DM + pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DP + __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); + +#else +#error "USB pins are not configured !" +#endif + + __HAL_RCC_SYSCFG_CLK_ENABLE(); + + // Configure PCD and FIFOs + hpcd.pData = (void*)this; + hpcd.State = HAL_PCD_STATE_RESET; + HAL_PCD_Init(&hpcd); + + /* 1.25 kbytes */ + /* min value 16 (= 16 x 4 bytes) */ + /* max value 256 (= 1K bytes ) */ + /* maximum sum is 0x140 */ + HAL_PCDEx_SetRxFiFo(&hpcd, (MAXTRANSFER_SIZE / 4)); + + // Configure interrupt vector + NVIC_SetVector(USBHAL_IRQn, (uint32_t)&_usbisr); + NVIC_SetPriority(USBHAL_IRQn, 1); + NVIC_EnableIRQ(USBHAL_IRQn); +} + +void USBPhyHw::deinit() +{ + HAL_PCD_DeInit(&hpcd); + NVIC_DisableIRQ(USBHAL_IRQn); +} + +bool USBPhyHw::powered() +{ + return true; +} + +void USBPhyHw::connect() +{ + HAL_PCD_Start(&hpcd); +} + +void USBPhyHw::disconnect() +{ + HAL_PCD_Stop(&hpcd); +} + +void USBPhyHw::configure() +{ + // Not needed +} + +void USBPhyHw::unconfigure() +{ + // Not needed +} + +void USBPhyHw::sof_enable() +{ + sof_enabled = true; +} + +void USBPhyHw::sof_disable() +{ + sof_enabled = false; +} + +void USBPhyHw::set_address(uint8_t address) +{ + HAL_PCD_SetAddress(&hpcd, address); + ep0_write(NULL, 0); +} + +void USBPhyHw::remote_wakeup() +{ + +} + +const usb_ep_table_t *USBPhyHw::endpoint_table() +{ + static const usb_ep_table_t table = { + 1280, // 1.25K for endpoint buffers + { + {USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 80}, + {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4} + } + }; + return &table; +} + +uint32_t USBPhyHw::ep0_set_max_packet(uint32_t max_packet) +{ + // FUTURE - set endpoint 0 size and return this size + return MAX_PACKET_SIZE_EP0; +} + +// read setup packet +void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) +{ + if (size > MAX_PACKET_SIZE_SETUP) { + size = MAX_PACKET_SIZE_SETUP; + } + memcpy(buffer, hpcd.Setup, size); + memset(hpcd.Setup,0,MAX_PACKET_SIZE_SETUP); +} + +void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) +{ + _read_buf[0] = data; + _read_size[0] = size; + + uint8_t *pBuf = (uint8_t *)pBufRx0; + HAL_StatusTypeDef ret; + epComplete[EP_TO_IDX(EP0OUT)] = 2; + ret = HAL_PCD_EP_Receive(&hpcd, EP0OUT, pBuf, MAX_PACKET_SIZE_EP0 ); + MBED_ASSERT(ret!=HAL_BUSY); +} + +uint32_t USBPhyHw::ep0_read_result() +{ + uint32_t length = (uint32_t) HAL_PCD_EP_GetRxCount(&hpcd, 0); + epComplete[EP_TO_IDX(EP0OUT)] = 0; + if (length) { + uint8_t *buff = (uint8_t *)pBufRx0; + memcpy(_read_buf[0], buff, _read_size[0] > length ? length : _read_size[0]); + } + _read_buf[0] = 0; + _read_size[0] = 0; + return length; +} + +void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) +{ + /* check that endpoint maximum size is not exceeding TX fifo */ + MBED_ASSERT(hpcd.IN_ep[0].maxpacket >= size); + endpoint_write(EP0IN, buffer, size); +} + +void USBPhyHw::ep0_stall() +{ + endpoint_stall(EP0IN); + endpoint_stall(EP0OUT); +} + +bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type) +{ + uint32_t len; + if (max_packet > MAXTRANSFER_SIZE) return false; + if (endpoint & 0x80) { + HAL_PCDEx_SetTxFiFo(&hpcd, endpoint & 0x7f, (max_packet / 4) + 1); + len = HAL_PCDEx_GetTxFiFo(&hpcd,endpoint & 0x7f); + MBED_ASSERT(len >= max_packet); + } + HAL_StatusTypeDef ret = HAL_PCD_EP_Open(&hpcd, endpoint, max_packet, type); + MBED_ASSERT(ret!=HAL_BUSY); + return (ret == HAL_OK) ? true:false; +} + +void USBPhyHw::endpoint_remove(usb_ep_t endpoint) +{ + HAL_StatusTypeDef ret = HAL_PCD_EP_Close(&hpcd, endpoint); + MBED_ASSERT(ret == HAL_OK); +} + +void USBPhyHw::endpoint_stall(usb_ep_t endpoint) +{ + HAL_StatusTypeDef ret; + ret = HAL_PCD_EP_SetStall(&hpcd, endpoint); + MBED_ASSERT(ret!=HAL_BUSY); +} + +void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) +{ + HAL_StatusTypeDef ret; + ret = HAL_PCD_EP_ClrStall(&hpcd, endpoint); + MBED_ASSERT(ret!=HAL_BUSY); +} + +bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ + _read_buf[EP_TO_LOG(endpoint)] = data; + _read_size[EP_TO_LOG(endpoint)] = size; + + uint8_t* pBuf = (uint8_t *)pBufRx; //TODO - this buffer shouldn't be shared for multiple endpoints + HAL_StatusTypeDef ret; + // clean reception end flag before requesting reception + ret = HAL_PCD_EP_Receive(&hpcd, endpoint, pBuf, size); + MBED_ASSERT(ret!=HAL_BUSY); + return true; +} + +uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) +{ + uint8_t *buffer =_read_buf[EP_TO_LOG(endpoint)]; + uint8_t max_size = _read_size[EP_TO_LOG(endpoint)]; + + if (epComplete[EP_TO_IDX(endpoint)]==0) { + /* no reception possible !!! */ + return 0; + } else if ((epComplete[EP_TO_IDX(endpoint)]!=1)) { + return 0; + } + uint8_t *buff = (uint8_t *)pBufRx; + uint32_t length = (uint32_t) HAL_PCD_EP_GetRxCount(&hpcd, endpoint); + memcpy(buffer, buff, length > max_size ? max_size : length); + epComplete[EP_TO_IDX(endpoint)]= 0; + return length; +} + +bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ + HAL_StatusTypeDef ret; + // clean transmission end flag before requesting transmission + epComplete[EP_TO_IDX(endpoint)] = 2; + ret = HAL_PCD_EP_Transmit(&hpcd, endpoint, data, size); + MBED_ASSERT(ret!=HAL_BUSY); + // update the status + if (ret != HAL_OK) return false; + // fix me return is too simple + return true; +} + +void USBPhyHw::endpoint_abort(usb_ep_t endpoint) +{ + // TODO - stop the current transfer on this endpoint and don't call the IN or OUT callback +} + +void USBPhyHw::process() +{ + HAL_PCD_IRQHandler(&instance->hpcd); + // Re-enable interrupt + NVIC_ClearPendingIRQ(USBHAL_IRQn); + NVIC_EnableIRQ(USBHAL_IRQn); +} + +void USBPhyHw::_usbisr(void) { + NVIC_DisableIRQ(USBHAL_IRQn); + instance->events->start_process(); +} + +//TODO - remove this hack which allows HAL_Delay to work when interrupts are disabled +extern "C" uint32_t HAL_GetTick() +{ + return ticker_read_us(get_us_ticker_data()) / 1000; +} + +#endif From bb8df4dacabec1df058f85b98c3748549abf62fc Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 24 Apr 2018 21:40:55 -0500 Subject: [PATCH 345/488] Remove ep0_write from set_address The USBDevice stack automatically sends control endpoint status so this does not and should not be done from the call to set_address. --- usb/device/targets/TARGET_STM/USBPhy_STM32.cpp | 1 - 1 file changed, 1 deletion(-) diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 09c98047264..1e2a506b12b 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -329,7 +329,6 @@ void USBPhyHw::sof_disable() void USBPhyHw::set_address(uint8_t address) { HAL_PCD_SetAddress(&hpcd, address); - ep0_write(NULL, 0); } void USBPhyHw::remote_wakeup() From db29703b40e751dc3c13f70be3c485c88186e9ca Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 3 May 2018 11:12:15 -0500 Subject: [PATCH 346/488] Remove unnecessary USB receive buffer Remove receive buffer from USBPhy_STM32 and instead passed buffers in directly. --- usb/device/targets/TARGET_STM/USBPhyHw.h | 4 --- .../targets/TARGET_STM/USBPhy_STM32.cpp | 34 +++---------------- 2 files changed, 4 insertions(+), 34 deletions(-) diff --git a/usb/device/targets/TARGET_STM/USBPhyHw.h b/usb/device/targets/TARGET_STM/USBPhyHw.h index b117339c84b..68c3ccb876d 100644 --- a/usb/device/targets/TARGET_STM/USBPhyHw.h +++ b/usb/device/targets/TARGET_STM/USBPhyHw.h @@ -88,13 +88,9 @@ class USBPhyHw : public USBPhy { bool sof_enabled; uint8_t epComplete[2 * NB_ENDPOINT]; - uint32_t pBufRx[MAXTRANSFER_SIZE >> 2]; - uint32_t pBufRx0[MAX_PACKET_SIZE_EP0 >> 2]; PCD_HandleTypeDef hpcd; private: - uint32_t _read_size[16]; - uint8_t *_read_buf[16]; static void _usbisr(void); }; diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 1e2a506b12b..4a9c0b09b87 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -159,11 +159,7 @@ void USBPhyHw::init(USBPhyEvents *events) this->events = events; sof_enabled = false; memset(epComplete, 0, sizeof(epComplete)); - memset(pBufRx, 0, sizeof(pBufRx)); - memset(pBufRx0, 0, sizeof(pBufRx0)); memset(&hpcd.Init, 0, sizeof(hpcd.Init)); - memset(_read_size, 0, sizeof(_read_size)); - memset(_read_buf, 0, sizeof(_read_buf)); #if defined(TARGET_DISCO_F769NI) || \ defined(TARGET_DISCO_F746NG_OTG_HS) @@ -380,27 +376,16 @@ void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) { - _read_buf[0] = data; - _read_size[0] = size; - - uint8_t *pBuf = (uint8_t *)pBufRx0; HAL_StatusTypeDef ret; epComplete[EP_TO_IDX(EP0OUT)] = 2; - ret = HAL_PCD_EP_Receive(&hpcd, EP0OUT, pBuf, MAX_PACKET_SIZE_EP0 ); + ret = HAL_PCD_EP_Receive(&hpcd, EP0OUT, data, size > MAX_PACKET_SIZE_EP0 ? MAX_PACKET_SIZE_EP0 : size); MBED_ASSERT(ret!=HAL_BUSY); } uint32_t USBPhyHw::ep0_read_result() { - uint32_t length = (uint32_t) HAL_PCD_EP_GetRxCount(&hpcd, 0); epComplete[EP_TO_IDX(EP0OUT)] = 0; - if (length) { - uint8_t *buff = (uint8_t *)pBufRx0; - memcpy(_read_buf[0], buff, _read_size[0] > length ? length : _read_size[0]); - } - _read_buf[0] = 0; - _read_size[0] = 0; - return length; + return HAL_PCD_EP_GetRxCount(&hpcd, 0); } void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) @@ -452,33 +437,22 @@ void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) { - _read_buf[EP_TO_LOG(endpoint)] = data; - _read_size[EP_TO_LOG(endpoint)] = size; - - uint8_t* pBuf = (uint8_t *)pBufRx; //TODO - this buffer shouldn't be shared for multiple endpoints - HAL_StatusTypeDef ret; // clean reception end flag before requesting reception - ret = HAL_PCD_EP_Receive(&hpcd, endpoint, pBuf, size); + HAL_StatusTypeDef ret = HAL_PCD_EP_Receive(&hpcd, endpoint, data, size); MBED_ASSERT(ret!=HAL_BUSY); return true; } uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) { - uint8_t *buffer =_read_buf[EP_TO_LOG(endpoint)]; - uint8_t max_size = _read_size[EP_TO_LOG(endpoint)]; - if (epComplete[EP_TO_IDX(endpoint)]==0) { /* no reception possible !!! */ return 0; } else if ((epComplete[EP_TO_IDX(endpoint)]!=1)) { return 0; } - uint8_t *buff = (uint8_t *)pBufRx; - uint32_t length = (uint32_t) HAL_PCD_EP_GetRxCount(&hpcd, endpoint); - memcpy(buffer, buff, length > max_size ? max_size : length); epComplete[EP_TO_IDX(endpoint)]= 0; - return length; + return HAL_PCD_EP_GetRxCount(&hpcd, endpoint);; } bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) From 9f5b3a5c7b1a5114bd90497bbb2026be04e91414 Mon Sep 17 00:00:00 2001 From: Michel Jaouen Date: Wed, 25 Apr 2018 18:08:44 +0200 Subject: [PATCH 347/488] Create HAL_PCD_EP_Abort --- .../TARGET_STM32F2/device/stm32f2xx_hal_pcd.c | 22 ++++++++ .../TARGET_STM32F2/device/stm32f2xx_hal_pcd.h | 1 + .../TARGET_STM32F2/device/stm32f2xx_ll_usb.c | 55 +++++++++++++++++++ .../TARGET_STM32F2/device/stm32f2xx_ll_usb.h | 1 + .../targets/TARGET_STM/USBPhy_STM32.cpp | 4 ++ 5 files changed, 83 insertions(+) diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c index ee1703bbd10..8d1915a88dc 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c @@ -1042,6 +1042,28 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); return HAL_OK; } +/** + * @brief Abort a transaction. + * @param hpcd: PCD handle + * @param ep_addr: endpoint address + * @param pBuf: pointer to the transmission buffer + * @param len: amount of data to be sent + * @retval HAL status + */ +HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) +{ + HAL_StatusTypeDef ret; + USB_OTG_EPTypeDef *ep; + + ep = &hpcd->IN_ep[ep_addr & 0x7F]; + + /*setup and start the Xfer */ + __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); + ret = USB_EPStopXfer(hpcd->Instance , ep, hpcd->Init.dma_enable); + + __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); + return ret; +} /** * @brief Set a STALL condition over an endpoint. diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h index f617e6d8de6..610c8456e95 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h @@ -271,6 +271,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); +HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c index b4799572c43..02b936b5925 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c @@ -745,6 +745,61 @@ HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeD } return HAL_OK; } +/** + * @brief USB_EPStoptXfer : setup and starts a transfer over an EP + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @param dma: USB dma enabled or disabled + * This parameter can be one of these values: + * 0 : DMA feature not used + * 1 : DMA feature used + * @retval HAL status + */ +HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma) +{ + HAL_StatusTypeDef ret = HAL_OK; + /* IN endpoint */ + if (ep->is_in == 1U) + { + + /* EP enable, IN data in FIFO */ + if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) + { + volatile uint32_t loop=0; + USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_EPDIS); + while(((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) + {/* data sheet say that EPDISD: Endpoint disabled interrupt must be raised + to consider the endpoint as disable */ + /* fix me loop for test only */ + loop++; + if (loop > 10000L) { + ret =HAL_ERROR; + break; + } + } + } + } + else /* OUT endpoint */ + { + if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) + { + volatile uint32_t loop=0; + USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_EPDIS); + while(((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) + {/* data sheet say that EPDISD: Endpoint disabled interrupt must be raised + to consider the endpoint as disable */ + /* Fix me loop for test only */ + loop++; + if (loop > 10000L) { + ret =HAL_ERROR; + break; + } + } + } + } + return ret; +} + /** * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h index ebbb5987613..ac6cc496df3 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h @@ -404,6 +404,7 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EP HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); +HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma); void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len); diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 4a9c0b09b87..472b2021f51 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -471,6 +471,10 @@ bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) void USBPhyHw::endpoint_abort(usb_ep_t endpoint) { // TODO - stop the current transfer on this endpoint and don't call the IN or OUT callback + HAL_StatusTypeDef ret; + ret = HAL_PCD_EP_Abort(&hpcd, endpoint); + MBED_ASSERT(ret!=HAL_OK); + return; } void USBPhyHw::process() From e4a1d3332305019d5fe377fa354bcdcfb6555c23 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 3 May 2018 18:07:02 -0500 Subject: [PATCH 348/488] Fix return code check in endpoint abort Assert that HAL_PCD_EP_Abort returns HAL_OK rather that something else. --- usb/device/targets/TARGET_STM/USBPhy_STM32.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 472b2021f51..e8ab482f750 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -473,7 +473,7 @@ void USBPhyHw::endpoint_abort(usb_ep_t endpoint) // TODO - stop the current transfer on this endpoint and don't call the IN or OUT callback HAL_StatusTypeDef ret; ret = HAL_PCD_EP_Abort(&hpcd, endpoint); - MBED_ASSERT(ret!=HAL_OK); + MBED_ASSERT(ret==HAL_OK); return; } From 5e4b542fff921d0f4449943908c43fa53d76d578 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 3 May 2018 18:10:34 -0500 Subject: [PATCH 349/488] Only build in USBPhy_STM32 for supported devices Define USBSTM_HAL_UNSUPPORTED if DEVICE_USBDEVICE is undefined or defined to 0. --- usb/device/targets/TARGET_STM/USBPhy_STM32.cpp | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index e8ab482f750..91facb63698 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -14,6 +14,11 @@ * limitations under the License. */ +/* This target doesn't support USB */ +#if !defined(DEVICE_USBDEVICE) || !DEVICE_USBDEVICE +#define USBSTM_HAL_UNSUPPORTED +#endif + /* TARGET NOT STM does not support this HAL */ #ifndef TARGET_STM #define USBSTM_HAL_UNSUPPORTED From 4c7cd682d3c87538130832fa36407bed6888267d Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 8 Jun 2018 10:53:16 -0500 Subject: [PATCH 350/488] Fix USB on Kinetis devices Set correct SYSMPU register for proper USB operation. This bug was introduced when the SYSMPU register names and defines were updated in the commit: "K64F: Updated the SYSMPU SDK driver" 93f8cfed058174b2de468353c173c0d7b9335ea4 --- usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp index c8a55e1a667..8c277cc10e9 100644 --- a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp +++ b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp @@ -125,6 +125,10 @@ void USBPhyHw::init(USBPhyEvents *events) MPU->CESR=0; #endif +#if (defined(FSL_FEATURE_SOC_SYSMPU_COUNT) && (FSL_FEATURE_SOC_SYSMPU_COUNT > 0U)) + SYSMPU->CESR=0; +#endif + #if defined(TARGET_KL43Z) || defined(TARGET_K22F) || defined(TARGET_K64F) // enable USBFS clock CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcIrc48M, 48000000U); From 5643c9a9fa7116a7a3a949b1141a56964415d97f Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 6 Jun 2018 11:02:02 -0500 Subject: [PATCH 351/488] Fix isochronous endpoints on LPC1768 Perform isochronous endpoint processing from the frame interrupt rather than the endpoint interrupt. Isochronous endpoints to not generate interrupts normally and are intended to be handled from the start of frame interrupt. --- .../targets/TARGET_NXP/USBHAL_LPC17.cpp | 36 +++++++++++++++++-- 1 file changed, 34 insertions(+), 2 deletions(-) diff --git a/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp b/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp index 58c264a5e4a..6cfc629a51a 100644 --- a/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp +++ b/usb/device/targets/TARGET_NXP/USBHAL_LPC17.cpp @@ -29,6 +29,9 @@ // Convert physical endpoint number to register bit #define EP(endpoint) (1UL<>1)|(((endpoint)&1)?0x80:0)) @@ -122,6 +125,13 @@ static USBPhyHw *instance; static uint32_t opStarted; +static const usb_ep_t ISO_EPS[] = { + 0x03, 0x83, + 0x06, 0x86, + 0x09, 0x89, + 0x0C, 0x8C +}; + static void SIECommand(uint32_t command) { // The command phase of a SIE transaction @@ -465,6 +475,9 @@ void USBPhyHw::disconnect(void) // Disconnect USB device SIEdisconnect(); + + // Reset all started operations + opStarted = 0; } void USBPhyHw::configure(void) @@ -551,7 +564,7 @@ uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) read_sizes[endpoint] = 0; // Don't clear isochronous endpoints - if ((DESC_TO_PHY(endpoint) >> 1) % 3 || (DESC_TO_PHY(endpoint) >> 1) == 0) { + if (!ISO_EP(endpoint)) { SIEselectEndpoint(endpoint); SIEclearBuffer(); } @@ -692,6 +705,20 @@ void USBPhyHw::process(void) events->sof(SIEgetFrameNumber()); // Clear interrupt status flag LPC_USB->USBDevIntClr = FRAME; + + // There is no ISO interrupt, instead a packet is transferred every SOF + for (uint32_t i = 0; i < sizeof(ISO_EPS) / sizeof(ISO_EPS[0]); i++) { + uint8_t endpoint = ISO_EPS[i]; + if (opStarted & EP(endpoint)) { + opStarted &= ~EP(endpoint); + if (IN_EP(endpoint)) { + events->in(endpoint); + } else { + events->out(endpoint); + } + } + } + } if (LPC_USB->USBDevIntSt & DEV_STAT) { @@ -717,6 +744,7 @@ void USBPhyHw::process(void) } memset(read_buffers, 0, sizeof(read_buffers)); memset(read_sizes, 0, sizeof(read_sizes)); + opStarted = 0; events->reset(); } } @@ -752,12 +780,16 @@ void USBPhyHw::process(void) } } - //TODO - should probably process in the reverse order for (uint8_t num = 2; num < 16 * 2; num++) { uint8_t endpoint = PHY_TO_DESC(num); if (LPC_USB->USBEpIntSt & EP(endpoint)) { selectEndpointClearInterrupt(endpoint); + if (ISO_EP(endpoint)) { + // Processing for ISO endpoints done in FRAME handling + continue; + } if (opStarted & EP(endpoint)) { + opStarted &= ~EP(endpoint); if (IN_EP(endpoint)) { events->in(endpoint); } else { From beb92db0bf2d7ca0b5480ec28dfa72be73066153 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 13 Jun 2018 20:25:41 -0500 Subject: [PATCH 352/488] Fix Kinetis bug causing USB to get stuck sending If an IN endpoint is stalled during a transfer by writing to the USB ENDPOINT register then the data being sent will repeat and flood the USB bus. This patch prevents the register write from occurring by instead writing to the buffer descriptor in RAM and letting the USB hardware handle setting the stall bit. Note - Control requests on endpoint 0 do still set the STALL bit directly. This is not a problem since control endpoints cannot be stalled externally while a transfer is ongoing. --- .../targets/TARGET_Freescale/USBPhy_Kinetis.cpp | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp index 8c277cc10e9..763fa9cc139 100644 --- a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp +++ b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp @@ -411,11 +411,23 @@ void USBPhyHw::endpoint_remove(usb_ep_t endpoint) void USBPhyHw::endpoint_stall(usb_ep_t endpoint) { - USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK; + if (DESC_TO_LOG(endpoint) == 0) { + USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK; + } else { + uint8_t dir = DESC_EP_IN(endpoint) ? TX : RX; + uint32_t idx = EP_BDT_IDX(DESC_TO_LOG(endpoint), dir, 0); + bdt[idx].info |= BD_OWN_MASK | BD_STALL_MASK; + } } void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) { + + if (DESC_TO_LOG(endpoint) != 0) { + uint8_t dir = DESC_EP_IN(endpoint) ? TX : RX; + uint32_t idx = EP_BDT_IDX(DESC_TO_LOG(endpoint), dir, 0); + bdt[idx].info &= ~(BD_OWN_MASK | BD_STALL_MASK); + } USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; } From f9f272ea45fe678d221389be5ecb59ac6609be03 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 4 Jun 2018 11:40:26 -0500 Subject: [PATCH 353/488] Add circular byte buffer using dynamic memory Add the ByteBuffer class which is similar to the CircularBuffer class but uses dynamic memory rather than template parameters and is optimized for byte transfers. This is required for USBAudio which needs a high performance circular buffer which can be resized at runtime. --- usb/device/utilities/ByteBuffer.cpp | 151 ++++++++++++++++++++++++++++ usb/device/utilities/ByteBuffer.h | 119 ++++++++++++++++++++++ 2 files changed, 270 insertions(+) create mode 100644 usb/device/utilities/ByteBuffer.cpp create mode 100644 usb/device/utilities/ByteBuffer.h diff --git a/usb/device/utilities/ByteBuffer.cpp b/usb/device/utilities/ByteBuffer.cpp new file mode 100644 index 00000000000..e45b8b4a826 --- /dev/null +++ b/usb/device/utilities/ByteBuffer.cpp @@ -0,0 +1,151 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "ByteBuffer.h" +#include "mbed_assert.h" +#include + +ByteBuffer::ByteBuffer(uint32_t size): _head(0), _tail(0), _size(0), _buf(NULL) +{ + resize(_size); +} + +ByteBuffer::~ByteBuffer() +{ + delete[] _buf; + _buf = 0; +} + +void ByteBuffer::resize(uint32_t size) +{ + delete[] _buf; + _head = 0; + _tail = 0; + _size = size + 1; + _buf = new uint8_t[_size](); +} + +void ByteBuffer::push(uint8_t data) +{ + _buf[_tail] = data; + _tail++; + if (_tail >= _size) { + _tail -= _size; + } + // Overflow not allowed + MBED_ASSERT(_head != _tail); +} + +void ByteBuffer::write(uint8_t *data, uint32_t size) +{ + MBED_ASSERT(size <= free()); + + if (size == 0) { + return; + } + + uint32_t new_tail = _tail + size; + if (new_tail >= _size) { + new_tail -= _size; + } + + // Perform first memcpy + uint32_t until_end = _size - _tail; + uint32_t copy_size = until_end < size ? until_end : size; + memcpy(_buf + _tail, data, copy_size); + data += copy_size; + size -= copy_size; + + // Perform second memcpy + if (size > 0) { + memcpy(_buf, data, size); + } + + // Update tail + _tail = new_tail; +} + +uint8_t ByteBuffer::pop() +{ + // Underflow not allowed + MBED_ASSERT(_head != _tail); + uint8_t val = _buf[_head]; + _head++; + if (_head >= _size) { + _head -= _size; + } + return val; +} + +void ByteBuffer::read(uint8_t *data, uint32_t size) +{ + MBED_ASSERT(size <= ByteBuffer::size()); + + if (size == 0) { + return; + } + + uint32_t new_head = _head + size; + if (new_head >= _size) { + new_head -= _size; + } + + // Perform first memcpy + uint32_t until_end = _size - _head; + uint32_t copy_size = until_end < size ? until_end : size; + memcpy(data, _buf + _head, copy_size); + data += copy_size; + size -= copy_size; + + // Perform second memcpy + if (size > 0) { + memcpy(data, _buf, size); + } + + // Update head + _head = new_head; +} + +uint32_t ByteBuffer::size() +{ + uint32_t size; + if (_tail < _head) { + size = _size + _tail - _head; + } else { + size = _tail - _head; + } + return size; +} + +uint32_t ByteBuffer::free() +{ + return _size - size() - 1; +} + +bool ByteBuffer::full() +{ + uint32_t next = _tail + 1; + if (next >= _size) { + next -= _size; + } + return next == _head; +} + +bool ByteBuffer::empty() +{ + return _head == _tail; +} + diff --git a/usb/device/utilities/ByteBuffer.h b/usb/device/utilities/ByteBuffer.h new file mode 100644 index 00000000000..8e9d40f40b2 --- /dev/null +++ b/usb/device/utilities/ByteBuffer.h @@ -0,0 +1,119 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef BYTE_BUFFER_H +#define BYTE_BUFFER_H + +#include + +class ByteBuffer { +public: + + /** + * Create a byte buffer of the given size + * + * @param size Number of bytes this buffer can hold + */ + ByteBuffer(uint32_t size=0); + + /** + * Delete this byte buffer + */ + ~ByteBuffer(); + + /** + * Set the size of the buffer + * + * Buffer contents are reset. + * + * @param size New buffer size + */ + void resize(uint32_t size); + + /** + * Add a single byte to this buffer + * + * There must be enough space in the buffer or the behavior is undefined. + * + * @param data byte to add + */ + void push(uint8_t data); + + /** + * Write a block of data to this ByteBuffer + * + * There must be enough space in the ByteBuffer or the behavior is undefined. + * + * @param data Block of data to write + * @param size Size of data to write + */ + void write(uint8_t *data, uint32_t size); + + /** + * Remove a byte from this buffer + * + * @return data byte + */ + uint8_t pop(); + + /** + * Read a block of data from this ByteBuffer into a buffer pointed by 'data' + * + * There must be enough data in the ByteBuffer or the behavior is undefined. + * + * @param data Block of data to read + * @param size Size of data to read + */ + void read(uint8_t *data, uint32_t size); + + /** + * Return the number bytes in this byte buffer + * + * @return Number of used bytes + */ + uint32_t size(); + + /** + * Return the number of additional bytes this buffer can hold + * + * @return Number of free bytes + */ + uint32_t free(); + + /** + * Check if this byte buffer is full + * + * @return true if full, false otherwise + */ + bool full(); + + /** + * Check if this byte buffer is empty + * + * @return true if empty, false otherwise + */ + bool empty(); + +private: + + uint32_t _head; + uint32_t _tail; + uint32_t _size; + uint8_t *_buf; +}; + + +#endif From bc2e82058f4289a5df57c2dd220b5912e69ecb37 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 3 May 2018 20:39:44 -0500 Subject: [PATCH 354/488] Update USBAudio Update the USBAudio class to use the new USB API. This patch also adds buffering and blocking functionality so it can be used in practice from thread context. --- usb/device/USBAudio/USBAudio.cpp | 1002 ++++++++++++++++++++++++++ usb/device/USBAudio/USBAudio.h | 375 ++++++++++ usb/device/USBAudio/USBAudio_Types.h | 95 +++ 3 files changed, 1472 insertions(+) create mode 100644 usb/device/USBAudio/USBAudio.cpp create mode 100644 usb/device/USBAudio/USBAudio.h create mode 100644 usb/device/USBAudio/USBAudio_Types.h diff --git a/usb/device/USBAudio/USBAudio.cpp b/usb/device/USBAudio/USBAudio.cpp new file mode 100644 index 00000000000..dfd04ced263 --- /dev/null +++ b/usb/device/USBAudio/USBAudio.cpp @@ -0,0 +1,1002 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBAudio.h" +#include "USBAudio_Types.h" +#include "EndpointResolver.h" +#include "usb_phy_api.h" + +#define SAMPLE_SIZE 2 +#define XFER_FREQUENCY_HZ 1000 +#define WRITE_READY_UNBLOCK (1 << 0) +#define READ_READY_UNBLOCK (1 << 1) + +class USBAudio::AsyncWrite: public AsyncOp { +public: + AsyncWrite(USBAudio *audio, uint8_t *buf, uint32_t size): + audio(audio), tx_buf(buf), tx_size(size), result(false) + { + + } + + virtual ~AsyncWrite() + { + + } + + virtual bool process() + { + if (audio->_tx_state != Opened) { + result = false; + return true; + } + + uint32_t actual_size = 0; + audio->write_nb(tx_buf, tx_size, &actual_size); + tx_size -= actual_size; + tx_buf += actual_size; + if (tx_size == 0) { + result = true; + return true; + } + + return false; + } + + USBAudio *audio; + uint8_t *tx_buf; + uint32_t tx_size; + bool result; +}; + +class USBAudio::AsyncRead: public AsyncOp { +public: + AsyncRead(USBAudio *audio, uint8_t *buf, uint32_t size, uint32_t *size_read, bool read_all) + : audio(audio), rx_buf(buf), rx_size(size), rx_actual(size_read), all(read_all), result(false) + { + + } + + virtual ~AsyncRead() + { + + } + + virtual bool process() + { + if (audio->_rx_state != Opened) { + result = false; + return true; + } + + uint32_t actual_size = 0; + audio->read_nb(rx_buf, rx_size, &actual_size); + rx_buf += actual_size; + *rx_actual += actual_size; + rx_size -= actual_size; + if ((!all && *rx_actual > 0) || (rx_size == 0)) { + // Wake thread if request is done + result = true; + return true; + } + + return false; + } + + USBAudio *audio; + uint8_t *rx_buf; + uint32_t rx_size; + uint32_t *rx_actual; + bool all; + bool result; +}; + +static void stub_volume() +{ + +} + +static void stub_handler(USBAudio::AudioEvent event) +{ + (void)event; +} + +USBAudio::USBAudio(bool connect, uint32_t frequency_rx, uint8_t channel_count_rx, uint32_t frequency_tx, uint8_t channel_count_tx, uint32_t buffer_ms, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBDevice(get_usb_phy(), vendor_id, product_id, product_release) +{ + _init(frequency_rx, channel_count_rx, frequency_tx, channel_count_tx, buffer_ms); + + // connect or init device + if (connect) { + USBDevice::connect(); + } else { + USBDevice::init(); + } +} + +USBAudio::USBAudio(USBPhy *phy, uint32_t frequency_rx, uint8_t channel_count_rx, uint32_t frequency_tx, uint8_t channel_count_tx, uint32_t buffer_ms, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): + USBDevice(phy, vendor_id, product_id, product_release) +{ + _init(frequency_rx, channel_count_rx, frequency_tx, channel_count_tx, buffer_ms); +} + +void USBAudio::_init(uint32_t frequency_rx, uint8_t channel_count_rx, uint32_t frequency_tx, uint8_t channel_count_tx, uint32_t buffer_ms) +{ + _connected = false; + + _volume = 0; + _mute = 0; + _vol_cur = 0x0080; + _vol_min = 0x0000; + _vol_max = 0x0100; + _vol_res = 0x0004; + + _update_vol = callback(stub_volume); + _tx_done = callback(stub_handler); + _rx_done = callback(stub_handler); + + _rx_overflow = 0; + _tx_underflow = 0; + + _tx_freq = frequency_tx; + _rx_freq = frequency_rx; + + _tx_channel_count = channel_count_tx; + _rx_channel_count = channel_count_rx; + + _tx_idle = true; + _tx_frame_fract = 0; + _tx_whole_frames_per_xfer = _tx_freq / XFER_FREQUENCY_HZ; + _tx_fract_frames_per_xfer = _tx_freq % XFER_FREQUENCY_HZ; + + uint32_t max_frames = _tx_whole_frames_per_xfer + (_tx_fract_frames_per_xfer ? 1 : 0); + _tx_packet_size_max = max_frames * SAMPLE_SIZE * _tx_channel_count; + _rx_packet_size_max = (_rx_freq + 1000 - 1) / 1000 * _rx_channel_count * 2; + + _tx_packet_buf = new uint8_t[_tx_packet_size_max](); + _rx_packet_buf = new uint8_t[_rx_packet_size_max](); + + _tx_queue.resize(buffer_ms * _tx_channel_count * SAMPLE_SIZE * _tx_freq / XFER_FREQUENCY_HZ); + _rx_queue.resize(buffer_ms * _rx_channel_count * SAMPLE_SIZE * _rx_freq / XFER_FREQUENCY_HZ); + + _tx_state = Closed; + _rx_state = Closed; + + EndpointResolver resolver(endpoint_table()); + resolver.endpoint_ctrl(64); + _episo_out = resolver.endpoint_out(USB_EP_TYPE_ISO, _tx_packet_size_max); + _episo_in = resolver.endpoint_in(USB_EP_TYPE_ISO, _rx_packet_size_max); + MBED_ASSERT(resolver.valid()); + + _channel_config_rx = (_rx_channel_count == 1) ? CHANNEL_M : CHANNEL_L + CHANNEL_R; + _channel_config_tx = (_tx_channel_count == 1) ? CHANNEL_M : CHANNEL_L + CHANNEL_R; + + _build_configuration_desc(); +} + +USBAudio::~USBAudio() +{ + disconnect(); + deinit(); + + delete[] _tx_packet_buf; + delete[] _rx_packet_buf; +} + +void USBAudio::connect() +{ + lock(); + + if (!_connected) { + USBDevice::connect(); + _connected = true; + _receive_change(Closed); + _send_change(Closed); + } + + unlock(); +} + +void USBAudio::disconnect() +{ + lock(); + + if (_connected) { + _connected = false; + USBDevice::disconnect(); + _receive_change(Powerdown); + _send_change(Powerdown); + } + + unlock(); +} + +bool USBAudio::read(uint8_t *buf, uint32_t size) +{ + lock(); + + uint32_t actual; + AsyncRead read(this, buf, size, &actual, true); + _read_list.add(&read); + + unlock(); + + read.wait(NULL); + return read.result; +} + +void USBAudio::read_nb(uint8_t *buf, uint32_t size, uint32_t *actual) +{ + + lock(); + + uint32_t available = _rx_queue.size(); + uint32_t copy_size = available > size ? size : available; + _rx_queue.read(buf, copy_size); + *actual = copy_size; + + unlock(); +} + +uint32_t USBAudio::read_overflows(bool clear) +{ + lock(); + + uint32_t overflows = _rx_overflow; + if (clear) { + _rx_overflow = 0; + } + + unlock(); + return overflows; +} + + +bool USBAudio::read_ready() +{ + lock(); + + bool ready = _rx_state == Opened; + + unlock(); + + return ready; +} + +void USBAudio::read_wait_ready() +{ + _flags.wait_any(READ_READY_UNBLOCK, osWaitForever, false); +} + +bool USBAudio::write(uint8_t *buf, uint32_t size) +{ + lock(); + + AsyncWrite write(this, buf, size); + _write_list.add(&write); + + unlock(); + + write.wait(NULL); + return write.result; +} + +void USBAudio::write_nb(uint8_t *buf, uint32_t size, uint32_t *actual) +{ + lock(); + + uint32_t available = _tx_queue.free(); + uint32_t copy_size = available > size ? size : available; + _tx_queue.write(buf, copy_size); + *actual = copy_size; + _send_isr_start(); + + unlock(); +} + +uint32_t USBAudio::write_underflows(bool clear) +{ + lock(); + + uint32_t underflows = _tx_underflow; + if (clear) { + _tx_underflow = 0; + } + + unlock(); + return underflows; +} + +bool USBAudio::write_ready() +{ + lock(); + + bool ready = _tx_state == Opened; + + unlock(); + + return ready; +} + +void USBAudio::write_wait_ready() +{ + _flags.wait_any(WRITE_READY_UNBLOCK, osWaitForever, false); +} + + +float USBAudio::get_volume() +{ + lock(); + + float ret = _mute ? 0.0 : _volume; + + unlock(); + return ret; +} + +void USBAudio::attach(Callback &cb) +{ + lock(); + + _update_vol = cb; + if (!_update_vol) { + _update_vol = stub_volume; + } + + unlock(); +} + +void USBAudio::attach_tx(Callback &cb) +{ + lock(); + + _tx_done = cb; + if (!_tx_done) { + _tx_done = callback(stub_handler); + } + + unlock(); +} + +void USBAudio::attach_rx(Callback &cb) +{ + lock(); + + _rx_done = cb; + if (!_rx_done) { + _rx_done = callback(stub_handler); + } + + unlock(); +} + +void USBAudio::callback_state_change(DeviceState new_state) +{ + assert_locked(); + + if (_connected && (new_state != Configured)) { + _receive_change(Closed); + _send_change(Closed); + } +} + +void USBAudio::callback_request(const setup_packet_t *setup) +{ + assert_locked(); + + RequestResult result = PassThrough; + uint8_t *data = NULL; + uint32_t size = 0; + + // Process class-specific requests + if (setup->bmRequestType.Type == CLASS_TYPE) { + + // Feature Unit: Interface = 0, ID = 2 + if (setup->wIndex == 0x0200) { + + // Master Channel + if ((setup->wValue & 0xff) == 0) { + + switch (setup->wValue >> 8) { + case MUTE_CONTROL: + switch (setup->bRequest) { + case REQUEST_GET_CUR: + size = 1; + data = &_mute; + result = Send; + break; + + case REQUEST_SET_CUR: + size = 1; + data = _control_receive; + result = Receive; + break; + default: + break; + } + break; + case VOLUME_CONTROL: + switch (setup->bRequest) { + case REQUEST_GET_CUR: + size = 2; + data = (uint8_t *)&_vol_cur; + result = Send; + break; + case REQUEST_GET_MIN: + size = 2; + data = (uint8_t *)&_vol_min; + result = Send; + break; + case REQUEST_GET_MAX: + size = 2; + data = (uint8_t *)&_vol_max; + result = Send; + break; + case REQUEST_GET_RES: + size = 2; + data = (uint8_t *)&_vol_res; + result = Send; + break; + + case REQUEST_SET_CUR: + size = 2; + data = _control_receive; + result = Receive; + break; + case REQUEST_SET_MIN: + size = 2; + data = _control_receive; + result = Receive; + break; + case REQUEST_SET_MAX: + size = 2; + data = _control_receive; + result = Receive; + break; + case REQUEST_SET_RES: + size = 2; + data = _control_receive; + result = Receive; + break; + } + break; + default: + break; + } + } + } + } + complete_request(result, data, size); +} + +void USBAudio::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) +{ + assert_locked(); + + if (aborted) { + complete_request_xfer_done(false); + return; + } + + if (setup->bmRequestType.dataTransferDirection == DEVICE_TO_HOST) { + complete_request_xfer_done(true); + return; + } + + if ((setup->wLength == 1) || (setup->wLength == 2)) { + uint16_t data = (_control_receive[0] << 0) | (_control_receive[1] << 8); + data &= ((setup->wLength == 1) ? 0xFF : 0xFFFF); + switch (setup->wValue >> 8) { + case MUTE_CONTROL: + switch (setup->bRequest) { + case REQUEST_SET_CUR: + _mute = data & 0xff; + _update_vol.call(); + break; + default: + break; + } + break; + case VOLUME_CONTROL: + switch (setup->bRequest) { + case REQUEST_SET_CUR: + _vol_cur = data; + _volume = (float)_vol_cur / (float)_vol_max; + _update_vol.call(); + break; + default: + break; + } + break; + default: + break; + } + complete_request_xfer_done(true); + return; + } + + complete_request_xfer_done(false); +} + +void USBAudio::callback_set_configuration(uint8_t configuration) +{ + assert_locked(); + + bool ret = false; + if (configuration == DEFAULT_CONFIGURATION) { + endpoint_remove_all(); + + // Configure isochronous endpoint + endpoint_add(_episo_out, _rx_packet_size_max, USB_EP_TYPE_ISO, static_cast(&USBAudio::_receive_isr)); + endpoint_add(_episo_in, _tx_packet_size_max, USB_EP_TYPE_ISO, static_cast(&USBAudio::_send_isr)); + + // activate readings on this endpoint + read_start(_episo_out, _rx_packet_buf, _rx_packet_size_max); + ret = true; + } + complete_set_configuration(ret); +} + +void USBAudio::callback_set_interface(uint16_t interface, uint8_t alternate) +{ + assert_locked(); + + bool ret = false; + if (interface == 0 && alternate == 0) { + ret = true; + } + if (interface == 1 && (alternate == 0 || alternate == 1)) { + _receive_change(alternate == 1 ? Opened : Closed); + ret = true; + } + if (interface == 2 && (alternate == 0 || alternate == 1)) { + _send_change(alternate == 1 ? Opened : Closed); + ret = true; + } + complete_set_interface(ret); +} + +const uint8_t *USBAudio::configuration_desc(uint8_t index) +{ + if (index != 0) { + return NULL; + } + return _config_descriptor; +} + +const uint8_t *USBAudio::string_iinterface_desc() +{ + static const uint8_t stringIinterfaceDescriptor[] = { + 0x0c, //bLength + STRING_DESCRIPTOR, //bDescriptorType 0x03 + 'A', 0, 'u', 0, 'd', 0, 'i', 0, 'o', 0 //bString iInterface - Audio + }; + return stringIinterfaceDescriptor; +} + +const uint8_t *USBAudio::string_iproduct_desc() +{ + static const uint8_t stringIproductDescriptor[] = { + 0x16, //bLength + STRING_DESCRIPTOR, //bDescriptorType 0x03 + 'M', 0, 'b', 0, 'e', 0, 'd', 0, ' ', 0, 'A', 0, 'u', 0, 'd', 0, 'i', 0, 'o', 0 //bString iProduct - Mbed Audio + }; + return stringIproductDescriptor; +} + +#define TOTAL_DESCRIPTOR_LENGTH ((1 * CONFIGURATION_DESCRIPTOR_LENGTH) \ + + (5 * INTERFACE_DESCRIPTOR_LENGTH) \ + + (1 * CONTROL_INTERFACE_DESCRIPTOR_LENGTH + 1) \ + + (2 * INPUT_TERMINAL_DESCRIPTOR_LENGTH) \ + + (1 * FEATURE_UNIT_DESCRIPTOR_LENGTH) \ + + (2 * OUTPUT_TERMINAL_DESCRIPTOR_LENGTH) \ + + (2 * STREAMING_INTERFACE_DESCRIPTOR_LENGTH) \ + + (2 * FORMAT_TYPE_I_DESCRIPTOR_LENGTH) \ + + (2 * (ENDPOINT_DESCRIPTOR_LENGTH + 2)) \ + + (2 * STREAMING_ENDPOINT_DESCRIPTOR_LENGTH) ) + +#define TOTAL_CONTROL_INTF_LENGTH (CONTROL_INTERFACE_DESCRIPTOR_LENGTH + 1 + \ + 2*INPUT_TERMINAL_DESCRIPTOR_LENGTH + \ + FEATURE_UNIT_DESCRIPTOR_LENGTH + \ + 2*OUTPUT_TERMINAL_DESCRIPTOR_LENGTH) + +void USBAudio::_build_configuration_desc() +{ + uint8_t config_descriptor_temp[] = { + // Configuration 1 + CONFIGURATION_DESCRIPTOR_LENGTH, // bLength + CONFIGURATION_DESCRIPTOR, // bDescriptorType + LSB(TOTAL_DESCRIPTOR_LENGTH), // wTotalLength (LSB) + MSB(TOTAL_DESCRIPTOR_LENGTH), // wTotalLength (MSB) + 0x03, // bNumInterfaces + DEFAULT_CONFIGURATION, // bConfigurationValue + 0x00, // iConfiguration + 0x80, // bmAttributes + 50, // bMaxPower + + // Interface 0, Alternate Setting 0, Audio Control + INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0x00, // bInterfaceNumber + 0x00, // bAlternateSetting + 0x00, // bNumEndpoints + AUDIO_CLASS, // bInterfaceClass + SUBCLASS_AUDIOCONTROL, // bInterfaceSubClass + 0x00, // bInterfaceProtocol + 0x00, // iInterface + + + // Audio Control Interface + CONTROL_INTERFACE_DESCRIPTOR_LENGTH + 1,// bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + CONTROL_HEADER, // bDescriptorSubtype + LSB(0x0100), // bcdADC (LSB) + MSB(0x0100), // bcdADC (MSB) + LSB(TOTAL_CONTROL_INTF_LENGTH), // wTotalLength + MSB(TOTAL_CONTROL_INTF_LENGTH), // wTotalLength + 0x02, // bInCollection + 0x01, // baInterfaceNr + 0x02, // baInterfaceNr + + // Audio Input Terminal (Speaker) + INPUT_TERMINAL_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + CONTROL_INPUT_TERMINAL, // bDescriptorSubtype + 0x01, // bTerminalID + LSB(TERMINAL_USB_STREAMING), // wTerminalType + MSB(TERMINAL_USB_STREAMING), // wTerminalType + 0x00, // bAssocTerminal + _rx_channel_count, // bNrChannels + (uint8_t)(LSB(_channel_config_rx)), // wChannelConfig + (uint8_t)(MSB(_channel_config_rx)), // wChannelConfig + 0x00, // iChannelNames + 0x00, // iTerminal + + // Audio Feature Unit (Speaker) + FEATURE_UNIT_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + CONTROL_FEATURE_UNIT, // bDescriptorSubtype + 0x02, // bUnitID + 0x01, // bSourceID + 0x01, // bControlSize + CONTROL_MUTE | + CONTROL_VOLUME, // bmaControls(0) + 0x00, // bmaControls(1) + 0x00, // iTerminal + + // Audio Output Terminal (Speaker) + OUTPUT_TERMINAL_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + CONTROL_OUTPUT_TERMINAL, // bDescriptorSubtype + 0x03, // bTerminalID + LSB(TERMINAL_SPEAKER), // wTerminalType + MSB(TERMINAL_SPEAKER), // wTerminalType + 0x00, // bAssocTerminal + 0x02, // bSourceID + 0x00, // iTerminal + + + // Audio Input Terminal (Microphone) + INPUT_TERMINAL_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + CONTROL_INPUT_TERMINAL, // bDescriptorSubtype + 0x04, // bTerminalID + LSB(TERMINAL_MICROPHONE), // wTerminalType + MSB(TERMINAL_MICROPHONE), // wTerminalType + 0x00, // bAssocTerminal + _tx_channel_count, // bNrChannels + (uint8_t)(LSB(_channel_config_tx)), // wChannelConfig + (uint8_t)(MSB(_channel_config_tx)), // wChannelConfig + 0x00, // iChannelNames + 0x00, // iTerminal + + // Audio Output Terminal (Microphone) + OUTPUT_TERMINAL_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + CONTROL_OUTPUT_TERMINAL, // bDescriptorSubtype + 0x05, // bTerminalID + LSB(TERMINAL_USB_STREAMING), // wTerminalType + MSB(TERMINAL_USB_STREAMING), // wTerminalType + 0x00, // bAssocTerminal + 0x04, // bSourceID + 0x00, // iTerminal + + + + + + + // Interface 1, Alternate Setting 0, Audio Streaming - Zero Bandwith + INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0x01, // bInterfaceNumber + 0x00, // bAlternateSetting + 0x00, // bNumEndpoints + AUDIO_CLASS, // bInterfaceClass + SUBCLASS_AUDIOSTREAMING, // bInterfaceSubClass + 0x00, // bInterfaceProtocol + 0x00, // iInterface + + // Interface 1, Alternate Setting 1, Audio Streaming - Operational + INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0x01, // bInterfaceNumber + 0x01, // bAlternateSetting + 0x01, // bNumEndpoints + AUDIO_CLASS, // bInterfaceClass + SUBCLASS_AUDIOSTREAMING, // bInterfaceSubClass + 0x00, // bInterfaceProtocol + 0x00, // iInterface + + // Audio Streaming Interface + STREAMING_INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + STREAMING_GENERAL, // bDescriptorSubtype + 0x01, // bTerminalLink + 0x00, // bDelay + LSB(FORMAT_PCM), // wFormatTag + MSB(FORMAT_PCM), // wFormatTag + + // Audio Type I Format + FORMAT_TYPE_I_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + STREAMING_FORMAT_TYPE, // bDescriptorSubtype + FORMAT_TYPE_I, // bFormatType + _rx_channel_count, // bNrChannels + 0x02, // bSubFrameSize + 16, // bBitResolution + 0x01, // bSamFreqType + (uint8_t)(LSB(_rx_freq)), // tSamFreq + (uint8_t)((_rx_freq >> 8) & 0xff), // tSamFreq + (uint8_t)((_rx_freq >> 16) & 0xff), // tSamFreq + + // Endpoint - Standard Descriptor + ENDPOINT_DESCRIPTOR_LENGTH + 2, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _episo_out, // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t)(LSB(_rx_packet_size_max)), // wMaxPacketSize + (uint8_t)(MSB(_rx_packet_size_max)), // wMaxPacketSize + 0x01, // bInterval + 0x00, // bRefresh + 0x00, // bSynchAddress + + // Endpoint - Audio Streaming + STREAMING_ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR_TYPE, // bDescriptorType + ENDPOINT_GENERAL, // bDescriptor + 0x00, // bmAttributes + 0x00, // bLockDelayUnits + LSB(0x0000), // wLockDelay + MSB(0x0000), // wLockDelay + + + // Interface 1, Alternate Setting 0, Audio Streaming - Zero Bandwith + INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0x02, // bInterfaceNumber + 0x00, // bAlternateSetting + 0x00, // bNumEndpoints + AUDIO_CLASS, // bInterfaceClass + SUBCLASS_AUDIOSTREAMING, // bInterfaceSubClass + 0x00, // bInterfaceProtocol + 0x00, // iInterface + + // Interface 1, Alternate Setting 1, Audio Streaming - Operational + INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0x02, // bInterfaceNumber + 0x01, // bAlternateSetting + 0x01, // bNumEndpoints + AUDIO_CLASS, // bInterfaceClass + SUBCLASS_AUDIOSTREAMING, // bInterfaceSubClass + 0x00, // bInterfaceProtocol + 0x00, // iInterface + + // Audio Streaming Interface + STREAMING_INTERFACE_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + SUBCLASS_AUDIOCONTROL, // bDescriptorSubtype + 0x05, // bTerminalLink (output terminal microphone) + 0x01, // bDelay + 0x01, // wFormatTag + 0x00, // wFormatTag + + // Audio Type I Format + FORMAT_TYPE_I_DESCRIPTOR_LENGTH, // bLength + INTERFACE_DESCRIPTOR_TYPE, // bDescriptorType + SUBCLASS_AUDIOSTREAMING, // bDescriptorSubtype + FORMAT_TYPE_I, // bFormatType + _tx_channel_count, // bNrChannels + 0x02, // bSubFrameSize + 0x10, // bBitResolution + 0x01, // bSamFreqType + (uint8_t)(LSB(_tx_freq)), // tSamFreq + (uint8_t)((_tx_freq >> 8) & 0xff), // tSamFreq + (uint8_t)((_tx_freq >> 16) & 0xff), // tSamFreq + + // Endpoint - Standard Descriptor + ENDPOINT_DESCRIPTOR_LENGTH + 2, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _episo_in, // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t)(LSB(_tx_packet_size_max)), // wMaxPacketSize + (uint8_t)(MSB(_tx_packet_size_max)), // wMaxPacketSize + 0x01, // bInterval + 0x00, // bRefresh + 0x00, // bSynchAddress + + // Endpoint - Audio Streaming + STREAMING_ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR_TYPE, // bDescriptorType + ENDPOINT_GENERAL, // bDescriptor + 0x00, // bmAttributes + 0x00, // bLockDelayUnits + LSB(0x0000), // wLockDelay + MSB(0x0000), // wLockDelay + }; + + MBED_ASSERT(sizeof(config_descriptor_temp) == sizeof(_config_descriptor)); + memcpy(_config_descriptor, config_descriptor_temp, sizeof(_config_descriptor)); +} + +void USBAudio::_receive_change(ChannelState new_state) +{ + assert_locked(); + + ChannelState prev_state = _rx_state; + _rx_state = new_state; + if (prev_state == new_state) { + // no change + return; + } + + if (prev_state == Opened) { + // Leaving the opened state + _read_list.process(); + _rx_done.call(End); + } + if (new_state == Opened) { + // Entering the opened state + _read_list.process(); + _rx_done.call(Start); + } + if (new_state == Closed) { + // Only block if the channel is closed + _flags.clear(READ_READY_UNBLOCK); + } else { + _flags.set(READ_READY_UNBLOCK); + } +} + +void USBAudio::_receive_isr(usb_ep_t ep) +{ + assert_locked(); + MBED_ASSERT(ep == _episo_out); + + uint32_t size = read_finish(_episo_out); + + if (size > _rx_queue.free()) { + _rx_overflow++; + } else { + + // Copy data over + _rx_queue.write(_rx_packet_buf, size); + + // Signal that there is more data available + _read_list.process(); + if (_rx_done) { + _rx_done.call(Transfer); + } + } + + read_start(_episo_out, _rx_packet_buf, _rx_packet_size_max); +} + +void USBAudio::_send_change(ChannelState new_state) +{ + assert_locked(); + + ChannelState prev_state = _tx_state; + _tx_state = new_state; + if (prev_state == new_state) { + // no change + return; + } + + if (prev_state == Opened) { + // Leaving the opened state + _write_list.process(); + _tx_done.call(End); + } + if (new_state == Opened) { + // Entering the opened state + _write_list.process(); + _tx_done.call(Start); + } + if (new_state == Closed) { + // Only block if the channel is closed + _flags.clear(WRITE_READY_UNBLOCK); + } else { + _flags.set(WRITE_READY_UNBLOCK); + } +} +void USBAudio::_send_isr_start() +{ + assert_locked(); + + if (!_tx_idle) { + return; + } + + _send_isr_next_sync(); +} + +void USBAudio::_send_isr_next_sync() +{ + // Compute size to send + uint32_t fames = _tx_whole_frames_per_xfer; + if (_tx_frame_fract >= XFER_FREQUENCY_HZ) { + _tx_frame_fract -= XFER_FREQUENCY_HZ; + fames += 1; + } + uint32_t send_size = fames * _tx_channel_count * 2; + + // Check if this is the initial TX packet + if (_tx_idle && !_tx_queue.full()) { + // Don't start until the TX buffer is full + return; + } + + // Check if this stream was closed + if (_tx_state != Opened) { + _tx_idle = true; + return; + } + + // Check for enough data to send + if (_tx_queue.size() < send_size) { + _tx_underflow++; + _tx_idle = true; + return; + } + + // Copy data over + _tx_queue.read(_tx_packet_buf, send_size); + + // Start the write + write_start(_episo_in, _tx_packet_buf, send_size); + _tx_idle = false; + _tx_frame_fract += _tx_fract_frames_per_xfer; +} + +void USBAudio::_send_isr(usb_ep_t ep) +{ + assert_locked(); + MBED_ASSERT(ep == _episo_in); + + write_finish(_episo_in); + + _send_isr_next_sync(); + + // Signal that there is space for more data + _write_list.process(); + if (_tx_done) { + _tx_done.call(Transfer); + } +} + diff --git a/usb/device/USBAudio/USBAudio.h b/usb/device/USBAudio/USBAudio.h new file mode 100644 index 00000000000..fec17615f1e --- /dev/null +++ b/usb/device/USBAudio/USBAudio.h @@ -0,0 +1,375 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBAudio_H +#define USBAudio_H + +/* These headers are included for child class. */ +#include "USBDescriptor.h" +#include "USBDevice_Types.h" + +#include "USBDevice.h" +#include "Callback.h" +#include "OperationList.h" +#include "ByteBuffer.h" +#include "rtos/EventFlags.h" + +/** +* USBAudio example +* +* @code +* #include "mbed.h" +* #include "USBAudio.h" +* +* // Audio loopback example use: +* // 1. Select "Mbed Audio" as your sound device +* // 2. Play a song or audio file +* // 3. Record the output using a program such as Audacity +* +* int main() { +* +* USBAudio audio(true, 44100, 2, 44100, 2); +* +* printf("Looping audio\r\n"); +* static uint8_t buf[128]; +* while (true) { +* if (!audio.read(buf, sizeof(buf))) { +* memset(buf, 0, sizeof(buf)); +* } +* audio.write(buf, sizeof(buf)); +* } +* } +* @endcode +*/ +class USBAudio: protected USBDevice { +public: + + enum AudioEvent { + Start, + Transfer, + End + }; + + /** + * Basic constructor + * + * Construct this object optionally connecting. + * + * @note Do not use this constructor in derived classes. + * + * @param connect Call connect on initialization + * @param frequency_rx frequency in Hz (default: 48000) + * @param channel_count_rx channel number (1 or 2) (default: 1) + * @param frequency_tx frequency in Hz (default: 8000) + * @param channel_count_tx channel number (1 or 2) (default: 1) + * @param buffer_ms time audio can be buffered without overflowing in milliseconds + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBAudio(bool connect=true, uint32_t frequency_rx = 48000, uint8_t channel_count_rx = 1, uint32_t frequency_tx = 8000, uint8_t channel_count_tx = 1, uint32_t buffer_ms=10, uint16_t vendor_id = 0x7bb8, uint16_t product_id = 0x1111, uint16_t product_release = 0x0100); + + /** + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. + * + * @param phy USB phy to use + * @param frequency_rx frequency in Hz (default: 48000) + * @param channel_count_rx channel number (1 or 2) (default: 1) + * @param frequency_tx frequency in Hz (default: 8000) + * @param channel_count_tx channel number (1 or 2) (default: 1) + * @param buffer_ms time audio can be buffered without overflowing in milliseconds + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your product_release + */ + USBAudio(USBPhy *phy, uint32_t frequency_rx, uint8_t channel_count_rx, uint32_t frequency_tx, uint8_t channel_count_tx, uint32_t buffer_ms, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call deinit + * before this destructor runs. + */ + virtual ~USBAudio(); + + /** + * Connect USBAudio + */ + void connect(); + + /** + * Disconnect USBAudio + * + * This unblocks all calls to read_ready and write_ready. + */ + void disconnect(); + + /** + * Read audio data + * + * @param buf pointer on a buffer which will be filled with audio data + * @param size size to read + * + * @returns true if successful + */ + bool read(uint8_t *buf, uint32_t size); + + /** + * Nonblocking audio data read + * + * Read the available audio data. + * + * @param buf pointer on a buffer which will be filled with audio data + * @param size size to read + * @param actual size actually read + * @note This function is safe to call from USBAudio callbacks. + */ + void read_nb(uint8_t *buf, uint32_t size, uint32_t *actual); + + /** + * Return the number read packets dropped due to overflow + * + * @param clear Reset the overflow count back to 0 + * @return Number of packets dropped due to overflow + */ + uint32_t read_overflows(bool clear=false); + + /** + * Check if the audio read channel is open + * + * @return true if the audio read channel open, false otherwise + */ + bool read_ready(); + + /** + * Wait until the audio read channel is open + */ + void read_wait_ready(); + + /** + * Write audio data + * + * @param buf pointer to audio data to write + * @param size size to write + * + * @returns true if successful + */ + bool write(uint8_t *buf, uint32_t size); + + /** + * Nonblocking audio data write + * + * Write the available audio data. + * + * @param buf pointer to audio data to write + * @param size size to write + * @param actual actual size written + * @note This function is safe to call from USBAudio callbacks. + */ + void write_nb(uint8_t *buf, uint32_t size, uint32_t *actual); + + /** + * Return the number write packets not sent due to underflow + * + * @param clear Reset the underflow count back to 0 + * @return Number of packets that should have been + * sent but weren't due to overflow + */ + uint32_t write_underflows(bool clear=false); + + /** + * Check if the audio write channel is open + * + * @return true if the audio write channel open, false otherwise + */ + bool write_ready(); + + /** + * Wait until the audio write channel is open + */ + void write_wait_ready(); + + /** + * Get current volume between 0.0 and 1.0 + * + * @returns volume + */ + float get_volume(); + + /** Attach a Callback to update the volume + * + * @param cb Callback to attach + * + */ + void attach(Callback &cb); + + /** attach a Callback to Tx Done + * + * @param cb Callback to attach + * + */ + void attach_tx(Callback &cb); + + /** attach a Callback to Rx Done + * + * @param cb Callback to attach + * + */ + void attach_rx(Callback &cb); + +protected: + + virtual void callback_state_change(DeviceState new_state); + virtual void callback_request(const setup_packet_t *setup); + virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); + virtual void callback_set_configuration(uint8_t configuration); + virtual void callback_set_interface(uint16_t interface, uint8_t alternate); + + virtual const uint8_t *string_iproduct_desc(); + virtual const uint8_t *string_iinterface_desc(); + virtual const uint8_t *configuration_desc(uint8_t index); + +private: + + class AsyncWrite; + class AsyncRead; + + enum ChannelState { + Powerdown, + Closed, + Opened + }; + + void _init(uint32_t frequency_rx, uint8_t channel_count_rx, uint32_t frequency_tx, uint8_t channel_count_tx, uint32_t buffer_ms); + + /* + * Call to rebuild the configuration descriptor + * + * This function should be called on creation or when any + * value that is part of the configuration descriptor + * changes. + * @note This function uses ~200 bytes of stack so + * make sure your stack is big enough for it. + */ + void _build_configuration_desc(); + + void _receive_change(ChannelState new_state); + void _receive_isr(usb_ep_t ep); + void _send_change(ChannelState new_state); + void _send_isr_start(); + void _send_isr_next_sync(); + void _send_isr(usb_ep_t ep); + + // has connect been called + bool _connected; + + // audio volume + float _volume; + + // mute state + uint8_t _mute; + + // Volume Current Value + uint16_t _vol_cur; + + // Volume Minimum Value + uint16_t _vol_min; + + // Volume Maximum Value + uint16_t _vol_max; + + // Volume Resolution + uint16_t _vol_res; + + // callback to update volume + Callback _update_vol; + + // callback transmit Done + Callback _tx_done; + + // callback receive Done + Callback _rx_done; + + // Number of times data was dropped due to an overflow + uint32_t _rx_overflow; + + // Number of times data was not sent due to an underflow + uint32_t _tx_underflow; + + // frequency in Hz + uint32_t _tx_freq; + uint32_t _rx_freq; + + // mono, stereo,... + uint8_t _rx_channel_count; + uint8_t _tx_channel_count; + + bool _tx_idle; + uint16_t _tx_frame_fract; + uint16_t _tx_whole_frames_per_xfer; + uint16_t _tx_fract_frames_per_xfer; + + // size of the maximum packet for the isochronous endpoint + uint16_t _tx_packet_size_max; + uint16_t _rx_packet_size_max; + + // Buffer used for the isochronous transfer + uint8_t *_tx_packet_buf; + uint8_t *_rx_packet_buf; + + // Holding buffer + ByteBuffer _tx_queue; + ByteBuffer _rx_queue; + + // State of the audio channels + ChannelState _tx_state; + ChannelState _rx_state; + + + // sample - a single PCM audio sample + // frame - a group of samples from each channel + // packet - a group of frames sent over USB in one transfer + + // Blocking primitives + OperationList _write_list; + OperationList _read_list; + rtos::EventFlags _flags; + + // endpoint numbers + usb_ep_t _episo_out; // rx endpoint + usb_ep_t _episo_in; // tx endpoint + + // channel config in the configuration descriptor: master, left, right + uint8_t _channel_config_rx; + uint8_t _channel_config_tx; + + // configuration descriptor + uint8_t _config_descriptor[183]; + + // buffer for control requests + uint8_t _control_receive[2]; + +}; + +#endif diff --git a/usb/device/USBAudio/USBAudio_Types.h b/usb/device/USBAudio/USBAudio_Types.h new file mode 100644 index 00000000000..bedb0cfe428 --- /dev/null +++ b/usb/device/USBAudio/USBAudio_Types.h @@ -0,0 +1,95 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBAUDIO_TYPES_H +#define USBAUDIO_TYPES_H + + +#define DEFAULT_CONFIGURATION (1) + +// Audio Request Codes +#define REQUEST_SET_CUR 0x01 +#define REQUEST_GET_CUR 0x81 +#define REQUEST_SET_MIN 0x02 +#define REQUEST_GET_MIN 0x82 +#define REQUEST_SET_MAX 0x03 +#define REQUEST_GET_MAX 0x83 +#define REQUEST_SET_RES 0x04 +#define REQUEST_GET_RES 0x84 + +#define MUTE_CONTROL 0x01 +#define VOLUME_CONTROL 0x02 + + +// Audio Descriptor Sizes +#define CONTROL_INTERFACE_DESCRIPTOR_LENGTH 0x09 +#define STREAMING_INTERFACE_DESCRIPTOR_LENGTH 0x07 +#define INPUT_TERMINAL_DESCRIPTOR_LENGTH 0x0C +#define OUTPUT_TERMINAL_DESCRIPTOR_LENGTH 0x09 +#define FEATURE_UNIT_DESCRIPTOR_LENGTH 0x09 +#define STREAMING_ENDPOINT_DESCRIPTOR_LENGTH 0x07 + +// Audio Format Type Descriptor Sizes +#define FORMAT_TYPE_I_DESCRIPTOR_LENGTH 0x0b + +#define AUDIO_CLASS 0x01 +#define SUBCLASS_AUDIOCONTROL 0x01 +#define SUBCLASS_AUDIOSTREAMING 0x02 + +// Audio Descriptor Types +#define INTERFACE_DESCRIPTOR_TYPE 0x24 +#define ENDPOINT_DESCRIPTOR_TYPE 0x25 + +// Audio Control Interface Descriptor Subtypes +#define CONTROL_HEADER 0x01 +#define CONTROL_INPUT_TERMINAL 0x02 +#define CONTROL_OUTPUT_TERMINAL 0x03 +#define CONTROL_FEATURE_UNIT 0x06 + +// USB Terminal Types +#define TERMINAL_USB_STREAMING 0x0101 + +// Predefined Audio Channel Configuration Bits +// Mono +#define CHANNEL_M 0x0000 +#define CHANNEL_L 0x0001 /* Left Front */ +#define CHANNEL_R 0x0002 /* Right Front */ + +// Feature Unit Control Bits +#define CONTROL_MUTE 0x0001 +#define CONTROL_VOLUME 0x0002 + +// Input Terminal Types +#define TERMINAL_MICROPHONE 0x0201 + +// Output Terminal Types +#define TERMINAL_SPEAKER 0x0301 +#define TERMINAL_HEADPHONES 0x0302 + +// Audio Streaming Interface Descriptor Subtypes +#define STREAMING_GENERAL 0x01 +#define STREAMING_FORMAT_TYPE 0x02 + +// Audio Data Format Type I Codes +#define FORMAT_PCM 0x0001 + +// Audio Format Types +#define FORMAT_TYPE_I 0x01 + +// Audio Endpoint Descriptor Subtypes +#define ENDPOINT_GENERAL 0x01 + +#endif From 8a5bd12a443125fbc65c4cdb5250d4486deccb0a Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 15 Jun 2018 18:55:00 -0500 Subject: [PATCH 355/488] Fix various USB warnings Fix the following warnings: -[Warning] USBTester.cpp@45,0: #1299-D: members and base-classes will be initialized in declaration order, not in member initialisation list order -[Warning] USBTester.h@41,0: #1300-D: ~USBTester inherits implicit virtual -[Warning] USBAudio.cpp@345,0: #1035-D: single-precision operand implicitly converted to double-precision -[Warning] USBHID.cpp@29,0: #1300-D: ~AsyncSend inherits implicit virtual -[Warning] USBHID.cpp@61,0: #1300-D: ~AsyncRead inherits implicit virtual -[Warning] USBHID.cpp@93,0: #1300-D: ~AsyncWait inherits implicit virtual -[Warning] EndpointResolver.cpp@125,26: '<<' in boolean context, did you mean '<' ? [-Wint-in-bool-context] --- TESTS/usb_device/basic/USBTester.cpp | 5 +++-- TESTS/usb_device/basic/USBTester.h | 2 +- usb/device/USBAudio/USBAudio.cpp | 2 +- usb/device/USBDevice/EndpointResolver.cpp | 2 +- usb/device/USBHID/USBHID.cpp | 6 +++--- 5 files changed, 9 insertions(+), 8 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index fa484115607..4a62b91f0c2 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -41,8 +41,9 @@ USBTester::USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release): - USBDevice(phy, vendor_id, product_id, product_release), reset_count(0), suspend_count(0), - resume_count(0), interface_0_alt_set(NONE), interface_1_alt_set(NONE), configuration_set(NONE) + USBDevice(phy, vendor_id, product_id, product_release), interface_0_alt_set(NONE), + interface_1_alt_set(NONE), configuration_set(NONE), reset_count(0), + suspend_count(0), resume_count(0) { EndpointResolver resolver(endpoint_table()); diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index 5cae22ac2b1..1f9349387eb 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -38,7 +38,7 @@ class USBTester: public USBDevice { */ USBTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); - ~USBTester(); + virtual ~USBTester(); /* * diff --git a/usb/device/USBAudio/USBAudio.cpp b/usb/device/USBAudio/USBAudio.cpp index dfd04ced263..abd899ab45f 100644 --- a/usb/device/USBAudio/USBAudio.cpp +++ b/usb/device/USBAudio/USBAudio.cpp @@ -342,7 +342,7 @@ float USBAudio::get_volume() { lock(); - float ret = _mute ? 0.0 : _volume; + float ret = _mute ? 0.0f : _volume; unlock(); return ret; diff --git a/usb/device/USBDevice/EndpointResolver.cpp b/usb/device/USBDevice/EndpointResolver.cpp index ad45006bb2e..e06b8929600 100644 --- a/usb/device/USBDevice/EndpointResolver.cpp +++ b/usb/device/USBDevice/EndpointResolver.cpp @@ -122,7 +122,7 @@ int EndpointResolver::next_index(usb_ep_type_t type, bool in_not_out) continue; } - if (shared && (1 << other)) { + if (shared && (_used & (1 << other))) { // This endpoint can only be one direction at a time and is in // use by the other direction continue; diff --git a/usb/device/USBHID/USBHID.cpp b/usb/device/USBHID/USBHID.cpp index 8045459f161..14bc74ee06f 100644 --- a/usb/device/USBHID/USBHID.cpp +++ b/usb/device/USBHID/USBHID.cpp @@ -26,7 +26,7 @@ class USBHID::AsyncSend: public AsyncOp { } - ~AsyncSend() + virtual ~AsyncSend() { } @@ -58,7 +58,7 @@ class USBHID::AsyncRead: public AsyncOp { } - ~AsyncRead() + virtual ~AsyncRead() { } @@ -90,7 +90,7 @@ class USBHID::AsyncWait: public AsyncOp { } - ~AsyncWait() + virtual ~AsyncWait() { } From 60219c6f43bec65e3c1ba75ef77e7f293ae02025 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 25 May 2018 11:19:34 -0500 Subject: [PATCH 356/488] Fix unbalanced USBDevice unlock Remove calls to unlock which are not preceded by calls to lock. Also move the location of the unlock underflow assert so unbalanced unlocking during post processing is caught. --- usb/device/USBDevice/USBDevice.cpp | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 3c73170c4b2..600520af4f7 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -331,13 +331,11 @@ void USBDevice::_complete_request_xfer_done() _transfer.user_callback = None; if (_abort_control) { _control_abort(); - unlock(); return; } if (!success) { _phy->ep0_stall(); - unlock(); return; } @@ -405,7 +403,6 @@ void USBDevice::_complete_set_configuration() _transfer.user_callback = None; if (_abort_control) { _control_abort(); - unlock(); return; } @@ -478,7 +475,6 @@ void USBDevice::_complete_set_interface() _transfer.user_callback = None; if (_abort_control) { _control_abort(); - unlock(); return; } @@ -716,7 +712,6 @@ void USBDevice::_complete_request() } else { _control_abort(); } - unlock(); return; } @@ -1563,8 +1558,6 @@ void USBDevice::lock() void USBDevice::unlock() { - MBED_ASSERT(_locked > 0); - if (_locked == 1) { // Perform post processing before fully unlocking while (_post_process != NULL) { @@ -1574,6 +1567,7 @@ void USBDevice::unlock() } } + MBED_ASSERT(_locked > 0); _locked--; core_util_critical_section_exit(); } From 07d2e54d6b3d8e324c089606656d502bce81d6f3 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 25 May 2018 12:00:04 -0500 Subject: [PATCH 357/488] Update USBDevice endpoint checks to fix asserts Only assert if disabled endpoints are used when USBDevice is configured. USBDevice can leave the configured state due to a reset at any time, which disables all endpoints. Because this can happen at any time, thread processing could be performing any endpoint operation. The endpoint operation should return failure and do nothing in this case, rather than asserting as this is not an application error. An assert should only be triggered when an invalid endpoint is used after the use of USBDevice acknoledges the switch to configured mode by complete_set_configuration. In specific this PR fixes the assert caused with the following sequence: -ISR: OUT event sent -ISR: USB reset event -ISR: USB configure request start -Thread: OUT event processed on thread and next read starts ***endpoint is used while disabled causing an invalid assert*** -Thread: reset event processed -Thread: configure event processed This patch fixes this problem by making the following changes: 1. Operations done on disabled endpoints only assert when in the configured state 2. Adding and removing endpoints is only allowed when the flag _endpoint_add_remove_allowed is set 3. The flag _endpoint_add_remove_allowed is set on the set configuration request and cleared if the request is aborted or fails --- usb/device/USBDevice/USBDevice.cpp | 85 ++++++++++++++++-------------- usb/device/USBDevice/USBDevice.h | 1 + 2 files changed, 45 insertions(+), 41 deletions(-) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index 600520af4f7..c4fc4e17f67 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -376,6 +376,7 @@ bool USBDevice::_request_set_configuration() _phy->unconfigure(); _change_state(Address); } else { + _endpoint_add_remove_allowed = true; _transfer.user_callback = SetConfiguration; callback_set_configuration(_device.configuration); } @@ -399,6 +400,14 @@ void USBDevice::_complete_set_configuration() assert_locked(); bool success = _transfer.args.status; + if ((_abort_control || !success) && !configured()) { + // The set configuration request was aborted or failed so + // reset any endpoints which may have been added. + memset(_endpoint_info, 0, sizeof(_endpoint_info)); + _device.configuration = 0; + _endpoint_add_remove_allowed = false; + } + _transfer.user_callback = None; if (_abort_control) { @@ -1054,6 +1063,11 @@ bool USBDevice::endpoint_add(usb_ep_t endpoint, uint32_t max_packet_size, usb_ep return false; } + if (!_endpoint_add_remove_allowed) { + unlock(); + return false; + } + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; MBED_ASSERT(!(info->flags & ENDPOINT_ENABLED)); MBED_ASSERT(max_packet_size <= 1024); @@ -1080,6 +1094,11 @@ void USBDevice::endpoint_remove(usb_ep_t endpoint) return; } + if (!_endpoint_add_remove_allowed) { + unlock(); + return; + } + endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; MBED_ASSERT(info->flags & ENDPOINT_ENABLED); @@ -1122,7 +1141,12 @@ void USBDevice::endpoint_stall(usb_ep_t endpoint) } endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; - MBED_ASSERT(info->flags & ENDPOINT_ENABLED); + if (!(info->flags & ENDPOINT_ENABLED)) { + // Invalid endpoint is being used + MBED_ASSERT(!configured()); + unlock(); + return; + } info->flags |= ENDPOINT_STALLED; _phy->endpoint_stall(endpoint); @@ -1141,7 +1165,12 @@ void USBDevice::endpoint_unstall(usb_ep_t endpoint) } endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; - MBED_ASSERT(info->flags & ENDPOINT_ENABLED); + if (!(info->flags & ENDPOINT_ENABLED)) { + // Invalid endpoint is being used + MBED_ASSERT(!configured()); + unlock(); + return; + } info->flags &= ~ENDPOINT_STALLED; _phy->endpoint_unstall(endpoint); @@ -1232,6 +1261,7 @@ USBDevice::USBDevice(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint1 _phy = phy; _initialized = false; _connected = false; + _endpoint_add_remove_allowed = false; _current_interface = 0; _current_alternate = 0; _locked = 0; @@ -1275,16 +1305,10 @@ void USBDevice::endpoint_abort(usb_ep_t endpoint) return; } - bool configuring = _transfer.user_callback == SetConfiguration; - if (!configured() && !configuring) { - unlock(); - return; - } - endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; if (!(info->flags & ENDPOINT_ENABLED)) { - // Invalid endpoint is being used - MBED_ASSERT(0); + // Assert that only valid endpoints are used when in the configured state + MBED_ASSERT(!configured()); unlock(); return; } @@ -1307,16 +1331,10 @@ bool USBDevice::read_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t max_size return false; } - bool configuring = _transfer.user_callback == SetConfiguration; - if (!configured() && !configuring) { - unlock(); - return false; - } - endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; if (!(info->flags & ENDPOINT_ENABLED)) { - // Invalid endpoint is being used - MBED_ASSERT(0); + // Assert that only valid endpoints are used when in the configured state + MBED_ASSERT(!configured()); unlock(); return false; } @@ -1353,15 +1371,10 @@ uint32_t USBDevice::read_finish(usb_ep_t endpoint) return 0; } - if (!configured()) { - unlock(); - return 0; - } - endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; if (!(info->flags & ENDPOINT_ENABLED)) { - // Invalid endpoint is being used - MBED_ASSERT(0); + // Assert that only valid endpoints are used when in the configured state + MBED_ASSERT(!configured()); unlock(); return 0; } @@ -1382,16 +1395,10 @@ bool USBDevice::write_start(usb_ep_t endpoint, uint8_t *buffer, uint32_t size) return false; } - bool configuring = _transfer.user_callback == SetConfiguration; - if (!configured() && !configuring) { - unlock(); - return false; - } - endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; if (!(info->flags & ENDPOINT_ENABLED)) { - // Invalid endpoint is being used - MBED_ASSERT(0); + // Assert that only valid endpoints are used when in the configured state + MBED_ASSERT(!configured()); unlock(); return false; } @@ -1431,18 +1438,13 @@ uint32_t USBDevice::write_finish(usb_ep_t endpoint) if (!EP_INDEXABLE(endpoint)) { MBED_ASSERT(0); unlock(); - return false; - } - - if (!configured()) { - unlock(); - return false; + return 0; } endpoint_info_t *info = &_endpoint_info[EP_TO_INDEX(endpoint)]; if (!(info->flags & ENDPOINT_ENABLED)) { - // Invalid endpoint is being used - MBED_ASSERT(0); + // Assert that only valid endpoints are used when in the configured state + MBED_ASSERT(!configured()); unlock(); return 0; } @@ -1593,6 +1595,7 @@ void USBDevice::_change_state(DeviceState new_state) { if (leaving_configured_state) { memset(_endpoint_info, 0, sizeof(_endpoint_info)); _device.configuration = 0; + _endpoint_add_remove_allowed = false; } if (leaving_default_state) { diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 40051ce9c08..8ef7008597f 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -595,6 +595,7 @@ class USBDevice: public USBPhyEvents { USBPhy *_phy; bool _initialized; bool _connected; + bool _endpoint_add_remove_allowed; control_transfer_t _transfer; usb_device_t _device; uint32_t _max_packet_size_ep0; From 164ed21a5568bc630e6e2d1bcb9530f93a656a1c Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 23 May 2018 15:56:10 -0500 Subject: [PATCH 358/488] Add the TaskQueue abstract interface and friends Add the classes Task, TaskBase and TaskQueue. TaskQueue queue is an interface class which can be implemented by anything which can run code. Task and TaskBase are concrete classes which allow callbacks to be posted to a TaskQueue to be run. --- usb/device/utilities/events/Task.h | 597 +++++++++++++++++++++++ usb/device/utilities/events/TaskBase.cpp | 151 ++++++ usb/device/utilities/events/TaskBase.h | 163 +++++++ usb/device/utilities/events/TaskQueue.h | 138 ++++++ 4 files changed, 1049 insertions(+) create mode 100644 usb/device/utilities/events/Task.h create mode 100644 usb/device/utilities/events/TaskBase.cpp create mode 100644 usb/device/utilities/events/TaskBase.h create mode 100644 usb/device/utilities/events/TaskQueue.h diff --git a/usb/device/utilities/events/Task.h b/usb/device/utilities/events/Task.h new file mode 100644 index 00000000000..1d51ac12e66 --- /dev/null +++ b/usb/device/utilities/events/Task.h @@ -0,0 +1,597 @@ +/* events + * Copyright (c) 2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef MBED_TASK_H +#define MBED_TASK_H + +#include "events/EventQueue.h" +#include "events/TaskBase.h" +#include "platform/mbed_assert.h" +#include "platform/Callback.h" + +namespace events { +/** \addtogroup events */ + + +template +struct AllArgs; + +template +struct AllArgs { + typedef AllArgs Self; + B0 b0; + + AllArgs(B0 b0=B0()): b0(b0) {} + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + s->b0(); + s->~Self(); + } + }; + + typedef Operations ops; +}; + +template +struct AllArgs { + typedef AllArgs Self; + B0 b0; B1 b1; + + AllArgs(B0 b0=B0(), B1 b1=B1()): b0(b0), b1(b1) {} + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + s->b0(s->b1); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(); + s->~Self(); + } + }; + + typedef Operations ops; +}; + +template +struct AllArgs { + typedef AllArgs Self; + B0 b0; B1 b1; B2 b2; + + + AllArgs(B0 b0=B0(), B1 b1=B1(), B2 b2=B2()): b0(b0), b1(b1), b2(b2) {} + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + s->b0(s->b1, s->b2); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2); + s->~Self(); + } + }; + + typedef Operations ops; +}; + +template +struct AllArgs { + typedef AllArgs Self; + B0 b0; B1 b1; B2 b2; B3 b3; + + + AllArgs(B0 b0=B0(), B1 b1=B1(), B2 b2=B2(), B3 b3=B3()): b0(b0), b1(b1), b2(b2), b3(b3) {} + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + s->b0(s->b1, s->b2, s->b3); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3); + s->~Self(); + } + }; + + typedef Operations ops; +}; + +template +struct AllArgs { + typedef AllArgs Self; + B0 b0; B1 b1; B2 b2; B3 b3; B4 b4; + + + AllArgs(B0 b0=B0(), B1 b1=B1(), B2 b2=B2(), B3 b3=B3(), B4 b4=B4()): b0(b0), b1(b1), b2(b2), b3(b3), b4(b4) {} + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + s->b0(s->b1, s->b2, s->b3, s->b4); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3, s->b4); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3, s->b4); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3, s->b4); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3, s->b4); + s->~Self(); + } + }; + + typedef Operations ops; +}; + +template +struct AllArgs { + typedef AllArgs Self; + B0 b0; B1 b1; B2 b2; B3 b3; B4 b4; B5 b5; + + + AllArgs(B0 b0=B0(), B1 b1=B1(), B2 b2=B2(), B3 b3=B3(), B4 b4=B4(), B5 b5=B5()): b0(b0), b1(b1), b2(b2), b3(b3), b4(b4), b5(b5) {} + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + s->b0(s->b1, s->b2, s->b3, s->b4, s->b5); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3, s->b4, s->b5); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3, s->b4, s->b5); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3, s->b4, s->b5); + s->~Self(); + } + }; + + template + struct Operations { + static void copy(void *_dest, void *_src) + { + new (_dest) Self(*(Self*)_src); + } + + static void call(void *data) { + Self *s = static_cast(data); + ((s->b0)->*(s->b1))(s->b2, s->b3, s->b4, s->b5); + s->~Self(); + } + }; + + typedef Operations ops; +}; + + +template +class Task; + +template +class Task: public TaskBase { +public: + + Task(TaskQueue *q=NULL, mbed::Callback cb=mbed::Callback()) + : TaskBase(q), _args(cb) { + } + + Task& operator=( mbed::Callback cb) { + _args.b0 = cb; + return *this; + } + + void call() { + post(); + } + +protected: + + virtual uint32_t size() { + return sizeof(_args); + } + + virtual run_callback_t start(void *data, uint32_t max_size) { + All::ops::copy(data, (void*)&_args); + return &All::ops::call; + } + +private: + typedef AllArgs > All; + All _args; +}; + +template +class Task: public TaskBase { +public: + + Task(TaskQueue *q=NULL, mbed::Callback cb=mbed::Callback()) + : TaskBase(q), _args(cb) { + } + + Task& operator=( mbed::Callback cb) { + _args.b0 = cb; + return *this; + } + + void call(A0 a0) { + _args.b1 = a0; + post(); + } + +protected: + + virtual uint32_t size() { + return sizeof(_args); + } + + virtual run_callback_t start(void *data, uint32_t max_size) { + All::ops::copy(data, (void*)&_args); + return &All::ops::call; + } + +private: + typedef AllArgs, A0> All; + All _args; +}; + +/** Task + * + * Representation of a postable task + * @ingroup events + */ +template +class Task: public TaskBase { +public: + + /** + * Construct a new task + * + * @param q TaskQueue to post to + * @param cb Callback to run + */ + Task(TaskQueue *q=NULL, mbed::Callback cb=mbed::Callback()) + : TaskBase(q), _args(cb) { + } + + /** + * Set the callback of this task + * + * @param cb Callback to run + */ + Task& operator=(mbed::Callback cb) { + _args.b0 = cb; + return *this; + } + + /** + * Post this task for execution + * + * The number of arguments to call should match + * the type of the callback. For example Task + * expects two integers as arguments to call, while Task + * expects no arguments. + * + * @param a0 First callback parameter + * @param a1 Second callback parameter + */ + void call(A0 a0, A1 a1) { + _args.b1 = a0; + _args.b2 = a1; + post(); + } + +protected: + + virtual uint32_t size() { + return sizeof(_args); + } + + virtual run_callback_t start(void *data, uint32_t max_size) { + All::ops::copy(data, (void*)&_args); + return &All::ops::call; + } + +private: + typedef AllArgs, A0, A1> All; + All _args; +}; + +} + +/** @}*/ + +#endif diff --git a/usb/device/utilities/events/TaskBase.cpp b/usb/device/utilities/events/TaskBase.cpp new file mode 100644 index 00000000000..ce974f529f0 --- /dev/null +++ b/usb/device/utilities/events/TaskBase.cpp @@ -0,0 +1,151 @@ +/* events + * Copyright (c) 2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "events/TaskBase.h" +#include "events/TaskQueue.h" +#include "events/mbed_events.h" +#include "rtos/Semaphore.h" +#include "mbed.h" + +TaskBase::TaskBase(TaskQueue *q) + : _queue(q), _posted(false), _start_count(0), _flush_sem(NULL) +{ + +} + +TaskBase::~TaskBase() +{ + cancel(); + wait(); +} + +void TaskBase::set(TaskQueue *q) +{ + core_util_critical_section_enter(); + + // Cannot set the queue when it has been posted but has not been finished + MBED_ASSERT(!_posted); + _queue = q; + + core_util_critical_section_exit(); +} + +void TaskBase::cancel() +{ + core_util_critical_section_enter(); + + if (_posted) { + _queue->cancel(this); + _posted = false; + _wake_check(); + } + + core_util_critical_section_exit(); +} + +void TaskBase::wait() +{ + // Fast path check for finished + core_util_critical_section_enter(); + if (finished()) { + core_util_critical_section_exit(); + return; + } + core_util_critical_section_exit(); + + rtos::Semaphore sem; + + // If the event is in-flight then wait for it to complete + core_util_critical_section_enter(); + if (finished()) { + // This element has been flushed from the queue + core_util_critical_section_exit(); + return; + } + _flush_sem = &sem; + core_util_critical_section_exit(); + + sem.wait(); +} + +bool TaskBase::ready() +{ + core_util_critical_section_enter(); + + bool is_ready = !_posted; + + core_util_critical_section_exit(); + return is_ready; +} + +bool TaskBase::finished() +{ + core_util_critical_section_enter(); + + bool is_finished = !_posted && (_start_count == 0); + + core_util_critical_section_exit(); + return is_finished; +} + +void TaskBase::finish() +{ + // Nothing to do +} + +void TaskBase::post() +{ + core_util_critical_section_enter(); + + MBED_ASSERT(_queue); + if (_queue) { + MBED_ASSERT(!_posted); + _queue->post(this); + _posted = true; + } + + core_util_critical_section_exit(); +} + +TaskBase::run_callback_t TaskBase::_start(void *buffer, uint32_t size) +{ + // Each call to _start must result in a call to _finish + MBED_ASSERT(_start_count < 0xFFFF); + _start_count++; + _posted = false; + + return start(buffer, size); +} + +void TaskBase::_finish() +{ + // Each call to _finish must be preceded by a call to _start + MBED_ASSERT(_start_count > 0); + _start_count--; + _wake_check(); + finish(); +} + +void TaskBase::_wake_check() +{ + if (!finished()) { + return; + } + if (_flush_sem) { + _flush_sem->release(); + _flush_sem = NULL; + } +} diff --git a/usb/device/utilities/events/TaskBase.h b/usb/device/utilities/events/TaskBase.h new file mode 100644 index 00000000000..a4ce4c9cdba --- /dev/null +++ b/usb/device/utilities/events/TaskBase.h @@ -0,0 +1,163 @@ +/* events + * Copyright (c) 2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef TASK_BASE_H +#define TASK_BASE_H + +#include "platform/Callback.h" +#include "platform/mbed_assert.h" +#include "LinkEntry.h" + +namespace rtos { +class Semaphore; +} + +namespace events { +/** \addtogroup events */ + + +class TaskQueue; + +/** TaskBase + * + * Representation of a caller allocated task + * @ingroup events + */ +class TaskBase : public LinkEntry { +public: + + typedef void (*run_callback_t)(void *data); + + /** + * Construct a new TaskBase object + * + * @param q Queue for posting to + */ + TaskBase(TaskQueue *q); + + /** + * Destroy this TaskBase + */ + virtual ~TaskBase(); + + /** + * Set the queue of this task + * + * @param q TaskQueue to post to + */ + void set(TaskQueue *q); + + /** + * Cancel the execution of this task + * + * Once cancelled the task can be posted again. Previous + * calls to post may still run. If you need to ensure the + * callback has finished the function wait() can be used. + * + * @note This function is interrupt safe + */ + void cancel(); + + /** + * Return true if this task is ready to be posted + * + * Check if this task is on a queue waiting to be run. + * + * @return true if it is safe to call post + */ + bool ready(); + + /** + * Wait for this task to finish execution + * + * When this function returns then this task is in the finished state. + */ + void wait(); + + /** + * Check if the callback has run to completion or been fully canceled + * + * When an task is finished the queue is completely done with it and the + * callback is either fully complete or has been canceled and will not run. + * + * @return true if this task has been flushed from the queue, false otherwise + */ + bool finished(); + +protected: + + /** + * Size of buffer required for TaskBase::start + * + * @return requested buffer size + */ + virtual uint32_t size() = 0; + + /** + * Copy any callback data and return a callback to run + * + * @param data Buffer to copy data to. Do not copy more than TaskBase::size() data. + * @param size Maximum size to copy + */ + virtual run_callback_t start(void *data, uint32_t size) = 0; + + /** + * Inform this task that execution has finished. + * + */ + virtual void finish(); + + /** + * Post this task to the set TaskQueue for execution + */ + void post(); + +private: + + TaskQueue *_queue; + bool _posted; + uint16_t _start_count; + rtos::Semaphore *_flush_sem; + + friend class TaskQueue; + + /* + * Must be called in a critical section + * + * This function should not be called directly. Instead + * TaskQueue::task_start should be used instead. + */ + run_callback_t _start(void *buffer, uint32_t size); + + /* + * Must be called in a critical section + * + * This function should not be called directly. Instead + * TaskQueue::task_finish should be used instead. + * + */ + void _finish(); + + /* + * Unblock wait if this task is finished + */ + void _wake_check(); +}; + +} + +#endif + +/** @}*/ diff --git a/usb/device/utilities/events/TaskQueue.h b/usb/device/utilities/events/TaskQueue.h new file mode 100644 index 00000000000..521876c11e6 --- /dev/null +++ b/usb/device/utilities/events/TaskQueue.h @@ -0,0 +1,138 @@ +/* events + * Copyright (c) 2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef TASK_QUEUE_H +#define TASK_QUEUE_H + +#include "events/TaskBase.h" +#include "platform/Callback.h" +#include "mbed_critical.h" + +#define MBED_MAX_TASK_SIZE 32 + +namespace events { +/** \addtogroup events */ + + + +/** TaskQueue + * + * Flexible task queue for dispatching tasks + * @ingroup events + */ +class TaskQueue { +public: + + /** Create a TaskQueue + * + * Create an event queue. + */ + TaskQueue() + { + + } + + /** Destroy a TaskQueue + */ + virtual ~TaskQueue() + { + + } + + /** + * Add this event to the queue for execution + * + * If the event is already in the queue then it is canceled and + * added to the end of the queue. + * + * @param event Pointer to the event + */ + virtual void post(TaskBase *event) = 0; + + /** Cancel an in-flight event + * + * Cancels the given event so the event's memory can be reused. + * + * The cancel function is irq safe. + * + * If called while the event queue's dispatch loop is active, the cancel + * function does not guarantee that the event will not execute after it + * returns, as the event may have already begun executing. It does + * guarantee that the event queue is no longer using event data so + * the event can be freed or reused. + * + * @param event Pointer to the event + */ + virtual void cancel(TaskBase *event) = 0; + +protected: + + /** + * Get the size required to run this task + * + * Get the minimum size required for TaskQueue::task_start + * + * @param task The task to check size on + * @return required size + * @note This call must be made in a critical section + */ + static uint32_t task_size(TaskBase *task) + { + + return task->size(); + } + + /** + * Start processing this event by copying out its data + * + * Inform this event both that callback execution has started + * and that the event is free to be posted again. + * + * @param task The task to start processing + * @param dest The buffer to copy the callback arguments to + * @param size maximum size to copy + * @return Pointer to function run + * + * @note event_start must not be called on a canceled event as the + * memory may have been freed already + * @note Every call to event_start must be paired with event_finish + * @note This call must be made in a critical section + */ + static TaskBase::run_callback_t task_start(TaskBase *task, uint8_t *dest, uint32_t size) + { + + return task->_start(dest, size); + } + + /** + * Finish processing this event + * + * Inform this event that the callback has run to completion. + * + * @param task The task to finish processing + * + * @note Every call to event_finish must be preceded by a call to event_start + * @note This call must be made in a critical section + */ + static void task_finish(TaskBase *task) + { + task->_finish(); + } +}; + +} +#endif + From c396e7da7d487c9444f9627fc762d04348cc883b Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 23 May 2018 15:56:28 -0500 Subject: [PATCH 359/488] Add the PolledQueue implementation of TaskQueue Add the PolledQueue class which provides a TaskQueue which is run by calling PolledQueue::process. --- usb/device/utilities/events/PolledQueue.cpp | 91 +++++++++++++++++++++ usb/device/utilities/events/PolledQueue.h | 71 ++++++++++++++++ 2 files changed, 162 insertions(+) create mode 100644 usb/device/utilities/events/PolledQueue.cpp create mode 100644 usb/device/utilities/events/PolledQueue.h diff --git a/usb/device/utilities/events/PolledQueue.cpp b/usb/device/utilities/events/PolledQueue.cpp new file mode 100644 index 00000000000..562f5f345db --- /dev/null +++ b/usb/device/utilities/events/PolledQueue.cpp @@ -0,0 +1,91 @@ +/* events + * Copyright (c) 2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include "events/PolledQueue.h" + +#include "events/mbed_events.h" +#include "platform/Callback.h" + + +PolledQueue::PolledQueue(mbed::Callback cb): _cb(cb) +{ + +} + +PolledQueue::~PolledQueue() +{ + +} + +void PolledQueue::dispatch() +{ + core_util_critical_section_enter(); + uint64_t buf[MBED_MAX_TASK_SIZE / sizeof(uint64_t)]; + + while (true) { + + // Atomically dequeue the task and copy the callback + TaskBase *task = _list.dequeue(); + if (!task) { + break; + } + MBED_ASSERT(sizeof(buf) >= task_size(task)); + TaskBase::run_callback_t callback = task_start(task, (uint8_t*)buf, sizeof(buf)); + + // Run the callback outside the critical section + core_util_critical_section_exit(); + callback((uint8_t*)buf); + core_util_critical_section_enter(); + + // Finish + task_finish(task); + task = NULL; + + } + + core_util_critical_section_exit(); +} + +void PolledQueue::attach(mbed::Callback cb) +{ + core_util_critical_section_enter(); + + _cb = cb; + + core_util_critical_section_exit(); +} + +void PolledQueue::post(TaskBase *task) +{ + core_util_critical_section_enter(); + + bool empty = _list.head() == NULL; + _list.remove(task); + _list.enqueue(task); + if (empty && _cb) { + _cb(); + } + + core_util_critical_section_exit(); +} + +void PolledQueue::cancel(TaskBase *task) +{ + core_util_critical_section_enter(); + + _list.remove(task); + + core_util_critical_section_exit(); +} diff --git a/usb/device/utilities/events/PolledQueue.h b/usb/device/utilities/events/PolledQueue.h new file mode 100644 index 00000000000..89afb111b2d --- /dev/null +++ b/usb/device/utilities/events/PolledQueue.h @@ -0,0 +1,71 @@ +/* events + * Copyright (c) 2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef POLLED_QUEUE_H +#define POLLED_QUEUE_H + +#include "events/TaskQueue.h" +#include "platform/Callback.h" +#include "LinkedList.h" +namespace events { +/** \addtogroup events */ + + +/** PolledQueue + * + * This class is an implementation of TaskQueue which is + * processed synchronously by calls to dispatch. + * @ingroup events + */ +class PolledQueue: public TaskQueue { +public: + + /** Create a PolledQueue + * + * Create an event queue. + * + * @param cb Callback called when dispatch needs to be called + */ + PolledQueue(mbed::Callback cb=NULL); + + virtual ~PolledQueue(); + + virtual void post(TaskBase *event); + + virtual void cancel(TaskBase *event); + + /** + * Process all the events in this queue + */ + void dispatch(); + + /** + * Attach a callback indicating that this queue needs to be processed + * + * @param cb Callback called when dispatch needs to be called + */ + void attach(mbed::Callback cb); + +protected: + + mbed::Callback _cb; + LinkedList _list; + +}; + +} +#endif + From f79cba5a58933c514d01fccc32ea04acff93a946 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 23 May 2018 19:36:15 -0500 Subject: [PATCH 360/488] Update USBMSD Update the USBMSD class for the new API. Add support for passing in a BlockDevice directly without the need to extend USBMSD. --- usb/device/USBMSD/USBMSD.cpp | 887 +++++++++++++++++++++++++++++++++++ usb/device/USBMSD/USBMSD.h | 279 +++++++++++ 2 files changed, 1166 insertions(+) create mode 100644 usb/device/USBMSD/USBMSD.cpp create mode 100644 usb/device/USBMSD/USBMSD.h diff --git a/usb/device/USBMSD/USBMSD.cpp b/usb/device/USBMSD/USBMSD.cpp new file mode 100644 index 00000000000..a8d5991b777 --- /dev/null +++ b/usb/device/USBMSD/USBMSD.cpp @@ -0,0 +1,887 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBMSD.h" +#include "EndpointResolver.h" + +#define DISK_OK 0x00 +#define NO_INIT 0x01 +#define NO_DISK 0x02 +#define WRITE_PROTECT 0x04 + +#define CBW_Signature 0x43425355 +#define CSW_Signature 0x53425355 + +// SCSI Commands +#define TEST_UNIT_READY 0x00 +#define REQUEST_SENSE 0x03 +#define FORMAT_UNIT 0x04 +#define INQUIRY 0x12 +#define MODE_SELECT6 0x15 +#define MODE_SENSE6 0x1A +#define START_STOP_UNIT 0x1B +#define MEDIA_REMOVAL 0x1E +#define READ_FORMAT_CAPACITIES 0x23 +#define READ_CAPACITY 0x25 +#define READ10 0x28 +#define WRITE10 0x2A +#define VERIFY10 0x2F +#define READ12 0xA8 +#define WRITE12 0xAA +#define MODE_SELECT10 0x55 +#define MODE_SENSE10 0x5A + +// MSC class specific requests +#define MSC_REQUEST_RESET 0xFF +#define MSC_REQUEST_GET_MAX_LUN 0xFE + +#define DEFAULT_CONFIGURATION (1) + +// max packet size +#define MAX_PACKET 64 + +// CSW Status +enum Status { + CSW_PASSED, + CSW_FAILED, + CSW_ERROR, +}; + +USBMSD::USBMSD(BlockDevice *bd, USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) + : USBDevice(phy, vendor_id, product_id, product_release), + _in_task(&_queue), _out_task(&_queue), _reset_task(&_queue), _control_task(&_queue), _configure_task(&_queue) +{ + _bd = bd; + _bd->init(); + + _in_task = callback(this, &USBMSD::_in); + _out_task = callback(this, &USBMSD::_out); + _reset_task = callback(this, &USBMSD::_reset); + _control_task = callback(this, &USBMSD::_control); + _configure_task = callback(this, &USBMSD::_configure); + + EndpointResolver resolver(endpoint_table()); + + resolver.endpoint_ctrl(64); + _bulk_in = resolver.endpoint_in(USB_EP_TYPE_BULK, MAX_PACKET); + _bulk_out = resolver.endpoint_out(USB_EP_TYPE_BULK, MAX_PACKET); + MBED_ASSERT(resolver.valid()); + + _stage = READ_CBW; + memset((void *)&_cbw, 0, sizeof(CBW)); + memset((void *)&_csw, 0, sizeof(CSW)); + _page = NULL; +} + +USBMSD::~USBMSD() +{ + disconnect(); + _bd->deinit(); +} + +bool USBMSD::connect() +{ + _mutex.lock(); + + //disk initialization + if (disk_status() & NO_INIT) { + if (disk_initialize()) { + _mutex.unlock(); + return false; + } + } + + // get number of blocks + _block_count = disk_sectors(); + + // get memory size + _memory_size = disk_size(); + + if (_block_count > 0) { + _block_size = _memory_size / _block_count; + if (_block_size != 0) { + free(_page); + _page = (uint8_t *)malloc(_block_size * sizeof(uint8_t)); + if (_page == NULL) { + _mutex.unlock(); + return false; + } + } + } else { + _mutex.unlock(); + return false; + } + + //connect the device + USBDevice::connect(); + _mutex.unlock(); + return true; +} + +void USBMSD::disconnect() +{ + _mutex.lock(); + + USBDevice::disconnect(); + + _in_task.cancel(); + _out_task.cancel(); + _reset_task.cancel(); + _control_task.cancel(); + _configure_task.cancel(); + + _in_task.wait(); + _out_task.wait(); + _reset_task.wait(); + _control_task.wait(); + _configure_task.wait(); + + //De-allocate MSD page size: + free(_page); + _page = NULL; + + _mutex.unlock(); +} + +bool USBMSD::ready() +{ + return configured(); +} + +void USBMSD::process() +{ + _queue.dispatch(); +} + +void USBMSD::attach(mbed::Callback cb) +{ + lock(); + + _queue.attach(cb); + + unlock(); +} + +int USBMSD::disk_read(uint8_t* data, uint64_t block, uint8_t count) +{ + bd_addr_t addr = block * _bd->get_erase_size(); + bd_size_t size = count * _bd->get_erase_size(); + return _bd->read(data, addr, size); +} + +int USBMSD::disk_write(const uint8_t* data, uint64_t block, uint8_t count) +{ + bd_addr_t addr = block * _bd->get_erase_size(); + bd_size_t size = count * _bd->get_erase_size(); + int ret = _bd->erase(addr, size); + if (ret != 0) { + return ret; + } + + return _bd->program(data, addr, size); +} + +int USBMSD::disk_initialize() +{ + return 0; +} + +uint64_t USBMSD::disk_sectors() +{ + return _bd->size() / _bd->get_erase_size(); +} + +uint64_t USBMSD::disk_size() +{ + return _bd->size(); +} + + +int USBMSD::disk_status() +{ + return 0; +} + +void USBMSD::_isr_out(usb_ep_t endpoint) +{ + _out_task.call(); +} + +void USBMSD::_isr_in(usb_ep_t endpoint) +{ + _in_task.call(); +} + +void USBMSD::callback_state_change(DeviceState new_state) +{ + // called in ISR context + + if (new_state != Configured) { + _reset_task.call(); + } +} + +void USBMSD::callback_request(const setup_packet_t *setup) +{ + // called in ISR context + + if (setup->bmRequestType.Type == CLASS_TYPE) { + _control_task.call(setup); + } else { + complete_request(PassThrough, NULL, 0); + } +} + +void USBMSD::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) +{ + // called in ISR context + + bool success = setup->bRequest == MSC_REQUEST_GET_MAX_LUN; + complete_request_xfer_done(success); +} + +void USBMSD::callback_set_configuration(uint8_t configuration) +{ + // called in ISR context + + if (configuration != DEFAULT_CONFIGURATION) { + complete_set_configuration(false); + return; + } + _configure_task.call(); +} + +void USBMSD::callback_set_interface(uint16_t interface, uint8_t alternate) +{ + // called in ISR context + + bool success = (interface == 0) && (alternate == 0); + complete_set_interface(success); +} + + +const uint8_t *USBMSD::string_iinterface_desc() +{ + static const uint8_t string_iinterface_descriptor[] = { + 0x08, //bLength + STRING_DESCRIPTOR, //bDescriptorType 0x03 + 'M', 0, 'S', 0, 'D', 0 //bString iInterface - MSD + }; + return string_iinterface_descriptor; +} + +const uint8_t *USBMSD::string_iproduct_desc() +{ + static const uint8_t string_iproduct_descriptor[] = { + 0x12, //bLength + STRING_DESCRIPTOR, //bDescriptorType 0x03 + 'M', 0, 'b', 0, 'e', 0, 'd', 0, ' ', 0, 'M', 0, 'S', 0, 'D', 0 //bString iProduct - Mbed Audio + }; + return string_iproduct_descriptor; +} + + +const uint8_t *USBMSD::configuration_desc(uint8_t index) +{ + if (index != 0) { + return NULL; + } + + uint8_t config_descriptor_temp[] = { + + // Configuration 1 + 9, // bLength + 2, // bDescriptorType + LSB(9 + 9 + 7 + 7), // wTotalLength + MSB(9 + 9 + 7 + 7), + 0x01, // bNumInterfaces + 0x01, // bConfigurationValue: 0x01 is used to select this configuration + 0x00, // iConfiguration: no string to describe this configuration + 0xC0, // bmAttributes + 100, // bMaxPower, device power consumption is 100 mA + + // Interface 0, Alternate Setting 0, MSC Class + 9, // bLength + 4, // bDescriptorType + 0x00, // bInterfaceNumber + 0x00, // bAlternateSetting + 0x02, // bNumEndpoints + 0x08, // bInterfaceClass + 0x06, // bInterfaceSubClass + 0x50, // bInterfaceProtocol + 0x04, // iInterface + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + 7, // bLength + 5, // bDescriptorType + _bulk_in, // bEndpointAddress + 0x02, // bmAttributes (0x02=bulk) + LSB(MAX_PACKET), // wMaxPacketSize (LSB) + MSB(MAX_PACKET), // wMaxPacketSize (MSB) + 0, // bInterval + + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + 7, // bLength + 5, // bDescriptorType + _bulk_out, // bEndpointAddress + 0x02, // bmAttributes (0x02=bulk) + LSB(MAX_PACKET), // wMaxPacketSize (LSB) + MSB(MAX_PACKET), // wMaxPacketSize (MSB) + 0 // bInterval + }; + MBED_ASSERT(sizeof(config_descriptor_temp) == sizeof(_configuration_descriptor)); + memcpy(_configuration_descriptor, config_descriptor_temp, sizeof(_configuration_descriptor)); + return _configuration_descriptor; +} + +void USBMSD::_out() +{ + _mutex.lock(); + + _bulk_out_size = read_finish(_bulk_out); + _out_ready = true; + _process(); + + _mutex.unlock(); +} + +void USBMSD::_in() +{ + _mutex.lock(); + + write_finish(_bulk_in); + _in_ready = true; + _process(); + + _mutex.unlock(); +} + +void USBMSD::_reset() +{ + _mutex.lock(); + + msd_reset(); + + _mutex.unlock(); +} + +void USBMSD::_control(const setup_packet_t *setup) +{ + _mutex.lock(); + + static const uint8_t maxLUN[1] = {0}; + + RequestResult result = PassThrough; + uint8_t *data = NULL; + uint32_t size = 0; + + if (setup->bmRequestType.Type == CLASS_TYPE) { + switch (setup->bRequest) { + case MSC_REQUEST_RESET: + result = Success; + msd_reset(); + break; + case MSC_REQUEST_GET_MAX_LUN: + result = Send; + data = (uint8_t*)maxLUN; + size = 1; + break; + default: + break; + } + } + + complete_request(result, data, size); + + _mutex.unlock(); +} + +void USBMSD::_configure() +{ + _mutex.lock(); + + // Configure endpoints > 0 + endpoint_add(_bulk_in, MAX_PACKET, USB_EP_TYPE_BULK, &USBMSD::_isr_in); + endpoint_add(_bulk_out, MAX_PACKET, USB_EP_TYPE_BULK, &USBMSD::_isr_out); + MBED_ASSERT(sizeof(_bulk_out_buf) == MAX_PACKET); + MBED_ASSERT(sizeof(_bulk_in_buf) == MAX_PACKET); + + _out_ready = false; + _in_ready = true; + + //activate readings + read_start(_bulk_out, _bulk_out_buf, sizeof(_bulk_out_buf)); + complete_set_configuration(true); + + _mutex.unlock(); +} + +void USBMSD::_process() +{ + // Mutex must be locked by caller + + switch (_stage) { + // the device has to decode the CBW received + case READ_CBW: + if (!_out_ready) { + break; + } + CBWDecode(_bulk_out_buf, _bulk_out_size); + _read_next(); + break; + + + case PROCESS_CBW: + switch (_cbw.CB[0]) { + // the device has to receive data from the host + case WRITE10: + case WRITE12: + if (!_out_ready) { + break; + } + memoryWrite(_bulk_out_buf, _bulk_out_size); + _read_next(); + break; + case VERIFY10: + if (!_out_ready) { + break; + } + memoryVerify(_bulk_out_buf, _bulk_out_size); + _read_next(); + break; + // the device has to send data to the host + case READ10: + case READ12: + if (!_in_ready) { + break; + } + memoryRead(); + break; + } + break; + + //the device has to send a CSW + case SEND_CSW: + if (!_in_ready) { + break; + } + sendCSW(); + break; + + // an error has occurred: stall endpoint and send CSW + default: + endpoint_stall(_bulk_out); + endpoint_stall(_bulk_in); + _csw.Status = CSW_ERROR; + sendCSW(); + break; + } +} + +void USBMSD::_write_next(uint8_t *data, uint32_t size) +{ + lock(); + + MBED_ASSERT(size <= MAX_PACKET); + MBED_ASSERT(_in_ready); + uint32_t send_size = MAX_PACKET > size ? size : MAX_PACKET; + memcpy(_bulk_in_buf, data, send_size); + write_start(_bulk_in, _bulk_in_buf, send_size); + _in_ready = false; + + unlock(); +} + +void USBMSD::_read_next() +{ + lock(); + + MBED_ASSERT(_out_ready); + read_start(_bulk_out, _bulk_out_buf, sizeof(_bulk_out_buf)); + _out_ready = false; + + unlock(); +} + +void USBMSD::memoryWrite(uint8_t *buf, uint16_t size) +{ + if ((_addr + size) > _memory_size) { + size = _memory_size - _addr; + _stage = ERROR; + endpoint_stall(_bulk_out); + } + + // we fill an array in RAM of 1 block before writing it in memory + for (int i = 0; i < size; i++) { + _page[_addr % _block_size + i] = buf[i]; + } + + // if the array is filled, write it in memory + if (!((_addr + size) % _block_size)) { + if (!(disk_status() & WRITE_PROTECT)) { + disk_write(_page, _addr / _block_size, 1); + } + } + + _addr += size; + _length -= size; + _csw.DataResidue -= size; + + if ((!_length) || (_stage != PROCESS_CBW)) { + _csw.Status = (_stage == ERROR) ? CSW_FAILED : CSW_PASSED; + sendCSW(); + } +} + +void USBMSD::memoryVerify(uint8_t *buf, uint16_t size) +{ + uint32_t n; + + if ((_addr + size) > _memory_size) { + size = _memory_size - _addr; + _stage = ERROR; + endpoint_stall(_bulk_out); + } + + // beginning of a new block -> load a whole block in RAM + if (!(_addr % _block_size)) { + disk_read(_page, _addr / _block_size, 1); + } + + // info are in RAM -> no need to re-read memory + for (n = 0; n < size; n++) { + if (_page[_addr % _block_size + n] != buf[n]) { + _mem_ok = false; + break; + } + } + + _addr += size; + _length -= size; + _csw.DataResidue -= size; + + if (!_length || (_stage != PROCESS_CBW)) { + _csw.Status = (_mem_ok && (_stage == PROCESS_CBW)) ? CSW_PASSED : CSW_FAILED; + sendCSW(); + } +} + + +bool USBMSD::inquiryRequest(void) +{ + uint8_t inquiry[] = { 0x00, 0x80, 0x00, 0x01, + 36 - 4, 0x80, 0x00, 0x00, + 'M', 'B', 'E', 'D', '.', 'O', 'R', 'G', + 'M', 'B', 'E', 'D', ' ', 'U', 'S', 'B', ' ', 'D', 'I', 'S', 'K', ' ', ' ', ' ', + '1', '.', '0', ' ', + }; + if (!write(inquiry, sizeof(inquiry))) { + return false; + } + return true; +} + + +bool USBMSD::readFormatCapacity() +{ + uint8_t capacity[] = { 0x00, 0x00, 0x00, 0x08, + (uint8_t)((_block_count >> 24) & 0xff), + (uint8_t)((_block_count >> 16) & 0xff), + (uint8_t)((_block_count >> 8) & 0xff), + (uint8_t)((_block_count >> 0) & 0xff), + + 0x02, + (uint8_t)((_block_size >> 16) & 0xff), + (uint8_t)((_block_size >> 8) & 0xff), + (uint8_t)((_block_size >> 0) & 0xff), + }; + if (!write(capacity, sizeof(capacity))) { + return false; + } + return true; +} + + +bool USBMSD::readCapacity(void) +{ + uint8_t capacity[] = { + (uint8_t)(((_block_count - 1) >> 24) & 0xff), + (uint8_t)(((_block_count - 1) >> 16) & 0xff), + (uint8_t)(((_block_count - 1) >> 8) & 0xff), + (uint8_t)(((_block_count - 1) >> 0) & 0xff), + + (uint8_t)((_block_size >> 24) & 0xff), + (uint8_t)((_block_size >> 16) & 0xff), + (uint8_t)((_block_size >> 8) & 0xff), + (uint8_t)((_block_size >> 0) & 0xff), + }; + if (!write(capacity, sizeof(capacity))) { + return false; + } + return true; +} + +bool USBMSD::write(uint8_t *buf, uint16_t size) +{ + + if (size >= _cbw.DataLength) { + size = _cbw.DataLength; + } + _stage = SEND_CSW; + + _write_next(buf, size); + + _csw.DataResidue -= size; + _csw.Status = CSW_PASSED; + return true; +} + + +bool USBMSD::modeSense6(void) +{ + uint8_t sense6[] = { 0x03, 0x00, 0x00, 0x00 }; + if (!write(sense6, sizeof(sense6))) { + return false; + } + return true; +} + +void USBMSD::sendCSW() +{ + _csw.Signature = CSW_Signature; + _write_next((uint8_t *)&_csw, sizeof(CSW)); + _stage = READ_CBW; +} + +bool USBMSD::requestSense(void) +{ + uint8_t request_sense[] = { + 0x70, + 0x00, + 0x05, // Sense Key: illegal request + 0x00, + 0x00, + 0x00, + 0x00, + 0x0A, + 0x00, + 0x00, + 0x00, + 0x00, + 0x30, + 0x01, + 0x00, + 0x00, + 0x00, + 0x00, + }; + + if (!write(request_sense, sizeof(request_sense))) { + return false; + } + + return true; +} + +void USBMSD::fail() +{ + _csw.Status = CSW_FAILED; + sendCSW(); +} + + +void USBMSD::CBWDecode(uint8_t *buf, uint16_t size) +{ + if (size == sizeof(_cbw)) { + memcpy((uint8_t *)&_cbw, buf, size); + if (_cbw.Signature == CBW_Signature) { + _csw.Tag = _cbw.Tag; + _csw.DataResidue = _cbw.DataLength; + if ((_cbw.CBLength < 1) || (_cbw.CBLength > 16)) { + fail(); + } else { + switch (_cbw.CB[0]) { + case TEST_UNIT_READY: + testUnitReady(); + break; + case REQUEST_SENSE: + requestSense(); + break; + case INQUIRY: + inquiryRequest(); + break; + case MODE_SENSE6: + modeSense6(); + break; + case READ_FORMAT_CAPACITIES: + readFormatCapacity(); + break; + case READ_CAPACITY: + readCapacity(); + break; + case READ10: + case READ12: + if (infoTransfer()) { + if ((_cbw.Flags & 0x80)) { + _stage = PROCESS_CBW; + memoryRead(); + } else { + endpoint_stall(_bulk_out); + _csw.Status = CSW_ERROR; + sendCSW(); + } + } + break; + case WRITE10: + case WRITE12: + if (infoTransfer()) { + if (!(_cbw.Flags & 0x80)) { + _stage = PROCESS_CBW; + } else { + endpoint_stall(_bulk_in); + _csw.Status = CSW_ERROR; + sendCSW(); + } + } + break; + case VERIFY10: + if (!(_cbw.CB[1] & 0x02)) { + _csw.Status = CSW_PASSED; + sendCSW(); + break; + } + if (infoTransfer()) { + if (!(_cbw.Flags & 0x80)) { + _stage = PROCESS_CBW; + _mem_ok = true; + } else { + endpoint_stall(_bulk_in); + _csw.Status = CSW_ERROR; + sendCSW(); + } + } + break; + case MEDIA_REMOVAL: + _csw.Status = CSW_PASSED; + sendCSW(); + break; + default: + fail(); + break; + } + } + } + } +} + +void USBMSD::testUnitReady(void) +{ + + if (_cbw.DataLength != 0) { + if ((_cbw.Flags & 0x80) != 0) { + endpoint_stall(_bulk_in); + } else { + endpoint_stall(_bulk_out); + } + } + + _csw.Status = CSW_PASSED; + sendCSW(); +} + + +void USBMSD::memoryRead(void) +{ + uint32_t n; + + n = (_length > MAX_PACKET) ? MAX_PACKET : _length; + + if ((_addr + n) > _memory_size) { + n = _memory_size - _addr; + _stage = ERROR; + } + + // we read an entire block + if (!(_addr % _block_size)) { + disk_read(_page, _addr / _block_size, 1); + } + + // write data which are in RAM + _write_next(&_page[_addr % _block_size], MAX_PACKET); + + _addr += n; + _length -= n; + + _csw.DataResidue -= n; + + if (!_length || (_stage != PROCESS_CBW)) { + _csw.Status = (_stage == PROCESS_CBW) ? CSW_PASSED : CSW_FAILED; + _stage = (_stage == PROCESS_CBW) ? SEND_CSW : _stage; + } +} + + +bool USBMSD::infoTransfer(void) +{ + uint32_t n; + + // Logical Block Address of First Block + n = (_cbw.CB[2] << 24) | (_cbw.CB[3] << 16) | (_cbw.CB[4] << 8) | (_cbw.CB[5] << 0); + + _addr = n * _block_size; + + // Number of Blocks to transfer + switch (_cbw.CB[0]) { + case READ10: + case WRITE10: + case VERIFY10: + n = (_cbw.CB[7] << 8) | (_cbw.CB[8] << 0); + break; + + case READ12: + case WRITE12: + n = (_cbw.CB[6] << 24) | (_cbw.CB[7] << 16) | (_cbw.CB[8] << 8) | (_cbw.CB[9] << 0); + break; + } + + _length = n * _block_size; + + if (!_cbw.DataLength) { // host requests no data + _csw.Status = CSW_FAILED; + sendCSW(); + return false; + } + + if (_cbw.DataLength != _length) { + if ((_cbw.Flags & 0x80) != 0) { + endpoint_stall(_bulk_in); + } else { + endpoint_stall(_bulk_out); + } + + _csw.Status = CSW_FAILED; + sendCSW(); + return false; + } + + return true; +} + +void USBMSD::msd_reset() +{ + _stage = READ_CBW; +} diff --git a/usb/device/USBMSD/USBMSD.h b/usb/device/USBMSD/USBMSD.h new file mode 100644 index 00000000000..3efcd5d5dd8 --- /dev/null +++ b/usb/device/USBMSD/USBMSD.h @@ -0,0 +1,279 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBMSD_H +#define USBMSD_H + +/* These headers are included for child class. */ +#include "USBDescriptor.h" +#include "USBDevice_Types.h" +#include "platform/Callback.h" +#include "events/PolledQueue.h" +#include "events/Task.h" +#include "BlockDevice.h" +#include "Mutex.h" +#include "usb_phy_api.h" + +#include "USBDevice.h" + +/** + * USBMSD class: generic class in order to use all kinds of blocks storage chip + * + * Introduction + * + * USBMSD implements the MSD protocol. It permits to access a block device (flash, sdcard,...) + * from a computer over USB. + * + * @code + * #include "mbed.h" + * #include "SDBlockDevice.h" + * #include "USBMSD.h" + * + * SDBlockDevice sd(PTE3, PTE1, PTE2, PTE4); + * USBMSD usb(&sd); + * + * int main() { + * usb.connect(); + * + * while(true) { + * usb.process(); + * } + * + * return 0; + * } + * @endcode + */ +class USBMSD: public USBDevice { +public: + + /** + * Constructor + * + * This creates a new USBMSD object with the given block device. Connect must be called + * for the block device to connect. + * + * @param bd BlockDevice to mount as a USB drive + * @param phy USB phy to use + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your preoduct_release + */ + USBMSD(BlockDevice *bd, USBPhy *phy=get_usb_phy(), uint16_t vendor_id = 0x0703, uint16_t product_id = 0x0104, uint16_t product_release = 0x0001); + + /** + * Destroy this object + * + * Any classes which inherit from this class must call disconnect + * before this destructor runs. + */ + virtual ~USBMSD(); + + /** + * Connect the USB MSD device. Establish disk initialization before really connect the device. + * + * @returns true if successful + */ + bool connect(); + + /** + * Disconnect the USB MSD device. + */ + void disconnect(); + + /** + * Check if USB is connected + * + * @return true if a USB is connected, false otherwise + */ + bool ready(); + + /** + * Perform USB processing + */ + void process(); + + /** + * Called when USBMSD needs to perform processing + * + * @param cb Callback called when USBMSD needs process() to be called + */ + void attach(mbed::Callback cb); + +protected: + + /* + * read one or more blocks on a storage chip + * + * @param data pointer where will be stored read data + * @param block starting block number + * @param count number of blocks to read + * @returns 0 if successful + */ + virtual int disk_read(uint8_t *data, uint64_t block, uint8_t count); + + /* + * write one or more blocks on a storage chip + * + * @param data data to write + * @param block starting block number + * @param count number of blocks to write + * @returns 0 if successful + */ + virtual int disk_write(const uint8_t *data, uint64_t block, uint8_t count); + + /* + * Disk initilization + */ + virtual int disk_initialize(); + + /* + * Return the number of blocks + * + * @returns number of blocks + */ + virtual uint64_t disk_sectors(); + + /* + * Return memory size + * + * @returns memory size + */ + virtual uint64_t disk_size(); + + /* + * To check the status of the storage chip + * + * @returns status: 0: OK, 1: disk not initialized, 2: no medium in the drive, 4: write protected + */ + virtual int disk_status(); + +private: + + // MSC Bulk-only Stage + enum Stage { + READ_CBW, // wait a CBW + ERROR, // error + PROCESS_CBW, // process a CBW request + SEND_CSW, // send a CSW + }; + + // Bulk-only CBW + typedef MBED_PACKED(struct) { + uint32_t Signature; + uint32_t Tag; + uint32_t DataLength; + uint8_t Flags; + uint8_t LUN; + uint8_t CBLength; + uint8_t CB[16]; + } CBW; + + // Bulk-only CSW + typedef MBED_PACKED(struct) { + uint32_t Signature; + uint32_t Tag; + uint32_t DataResidue; + uint8_t Status; + } CSW; + + //state of the bulk-only state machine + Stage _stage; + + // current CBW + CBW _cbw; + + // CSW which will be sent + CSW _csw; + + // addr where will be read or written data + uint32_t _addr; + + // length of a reading or writing + uint32_t _length; + + // memory OK (after a memoryVerify) + bool _mem_ok; + + // cache in RAM before writing in memory. Useful also to read a block. + uint8_t *_page; + + int _block_size; + uint64_t _memory_size; + uint64_t _block_count; + + // endpoints + usb_ep_t _bulk_in; + usb_ep_t _bulk_out; + uint8_t _bulk_in_buf[64]; + uint8_t _bulk_out_buf[64]; + bool _out_ready; + bool _in_ready; + uint32_t _bulk_out_size; + + // Interrupt to thread deferral + PolledQueue _queue; + Task _in_task; + Task _out_task; + Task _reset_task; + Task _control_task; + Task _configure_task; + + BlockDevice *_bd; + rtos::Mutex _mutex; + + // space for config descriptor + uint8_t _configuration_descriptor[32]; + + virtual const uint8_t *string_iproduct_desc(); + virtual const uint8_t *string_iinterface_desc(); + virtual const uint8_t *configuration_desc(uint8_t index); + virtual void callback_set_configuration(uint8_t configuration); + virtual void callback_set_interface(uint16_t interface, uint8_t alternate); + virtual void callback_state_change(DeviceState new_state); + virtual void callback_request(const setup_packet_t *setup); + virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); + + void _isr_out(usb_ep_t endpoint); + void _isr_in(usb_ep_t endpoint); + + void _out(); + void _in(); + void _reset(); + void _control(const setup_packet_t *request); + void _configure(); + + void _process(); + void _write_next(uint8_t *data, uint32_t size); + void _read_next(); + + void CBWDecode(uint8_t *buf, uint16_t size); + void sendCSW(void); + bool inquiryRequest(void); + bool write(uint8_t *buf, uint16_t size); + bool readFormatCapacity(); + bool readCapacity(void); + bool infoTransfer(void); + void memoryRead(void); + bool modeSense6(void); + void testUnitReady(void); + bool requestSense(void); + void memoryVerify(uint8_t *buf, uint16_t size); + void memoryWrite(uint8_t *buf, uint16_t size); + void msd_reset(); + void fail(); +}; + +#endif From 85c6211e3a712fc1f5c605a6e22c969fff24e9a4 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 18 Jun 2018 11:35:22 -0500 Subject: [PATCH 361/488] USBMSD fixes Make the following fixes: -deinit in destructor to prevent race conditions -cancel the reset task before calling it since it may be in progress -wait for tasks to complete without mutex held -prevent double connect with _init flag --- usb/device/USBMSD/USBMSD.cpp | 25 ++++++++++++++++++++++++- usb/device/USBMSD/USBMSD.h | 4 ++++ 2 files changed, 28 insertions(+), 1 deletion(-) diff --git a/usb/device/USBMSD/USBMSD.cpp b/usb/device/USBMSD/USBMSD.cpp index a8d5991b777..ba81e98b68d 100644 --- a/usb/device/USBMSD/USBMSD.cpp +++ b/usb/device/USBMSD/USBMSD.cpp @@ -63,7 +63,7 @@ enum Status { USBMSD::USBMSD(BlockDevice *bd, USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) : USBDevice(phy, vendor_id, product_id, product_release), - _in_task(&_queue), _out_task(&_queue), _reset_task(&_queue), _control_task(&_queue), _configure_task(&_queue) + _init(false), _in_task(&_queue), _out_task(&_queue), _reset_task(&_queue), _control_task(&_queue), _configure_task(&_queue) { _bd = bd; _bd->init(); @@ -91,16 +91,26 @@ USBMSD::~USBMSD() { disconnect(); _bd->deinit(); + deinit(); } bool USBMSD::connect() { + _mutex_init.lock(); _mutex.lock(); + // already initialized + if (_init) { + _mutex.unlock(); + _mutex_init.unlock(); + return false; + } + //disk initialization if (disk_status() & NO_INIT) { if (disk_initialize()) { _mutex.unlock(); + _mutex_init.unlock(); return false; } } @@ -118,25 +128,31 @@ bool USBMSD::connect() _page = (uint8_t *)malloc(_block_size * sizeof(uint8_t)); if (_page == NULL) { _mutex.unlock(); + _mutex_init.unlock(); return false; } } } else { _mutex.unlock(); + _mutex_init.unlock(); return false; } //connect the device USBDevice::connect(); + _init = true; _mutex.unlock(); + _mutex_init.unlock(); return true; } void USBMSD::disconnect() { + _mutex_init.lock(); _mutex.lock(); USBDevice::disconnect(); + _init = false; _in_task.cancel(); _out_task.cancel(); @@ -144,17 +160,23 @@ void USBMSD::disconnect() _control_task.cancel(); _configure_task.cancel(); + _mutex.unlock(); + + // object mutex must be unlocked for waiting _in_task.wait(); _out_task.wait(); _reset_task.wait(); _control_task.wait(); _configure_task.wait(); + _mutex.lock(); + //De-allocate MSD page size: free(_page); _page = NULL; _mutex.unlock(); + _mutex_init.unlock(); } bool USBMSD::ready() @@ -231,6 +253,7 @@ void USBMSD::callback_state_change(DeviceState new_state) // called in ISR context if (new_state != Configured) { + _reset_task.cancel(); _reset_task.call(); } } diff --git a/usb/device/USBMSD/USBMSD.h b/usb/device/USBMSD/USBMSD.h index 3efcd5d5dd8..9e4ab48ed6a 100644 --- a/usb/device/USBMSD/USBMSD.h +++ b/usb/device/USBMSD/USBMSD.h @@ -189,6 +189,9 @@ class USBMSD: public USBDevice { uint8_t Status; } CSW; + // If this class has been initialized + bool _init; + //state of the bulk-only state machine Stage _stage; @@ -232,6 +235,7 @@ class USBMSD: public USBDevice { Task _configure_task; BlockDevice *_bd; + rtos::Mutex _mutex_init; rtos::Mutex _mutex; // space for config descriptor From 8865851baf151b3b2c4f8336e77c7432f440c4c0 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 19 Jun 2018 18:22:31 -0500 Subject: [PATCH 362/488] Remove endpoint parameter from USB callbacks Remove the endpoint parameter from endpoint callbacks. This information is redundant because endpoints are known at construction time because they must be in the configuration descriptor. --- TESTS/usb_device/basic/USBTester.cpp | 14 +++++++------- TESTS/usb_device/basic/USBTester.h | 6 +++--- usb/device/USBAudio/USBAudio.cpp | 6 ++---- usb/device/USBAudio/USBAudio.h | 4 ++-- usb/device/USBDevice/USBDevice.cpp | 4 ++-- usb/device/USBDevice/USBDevice.h | 6 +++--- usb/device/USBHID/USBHID.cpp | 4 ++-- usb/device/USBHID/USBHID.h | 4 ++-- usb/device/USBMIDI/USBMIDI.cpp | 4 ++-- usb/device/USBMIDI/USBMIDI.h | 4 ++-- usb/device/USBMSD/USBMSD.cpp | 4 ++-- usb/device/USBMSD/USBMSD.h | 4 ++-- usb/device/USBSerial/USBCDC.cpp | 6 +++--- usb/device/USBSerial/USBCDC.h | 4 ++-- 14 files changed, 36 insertions(+), 38 deletions(-) diff --git a/TESTS/usb_device/basic/USBTester.cpp b/TESTS/usb_device/basic/USBTester.cpp index 4a62b91f0c2..36b01d9eeb0 100644 --- a/TESTS/usb_device/basic/USBTester.cpp +++ b/TESTS/usb_device/basic/USBTester.cpp @@ -221,7 +221,7 @@ void USBTester::callback_set_configuration(uint8_t configuration) } bool USBTester::setup_iterface(uint8_t ep_in, uint8_t ep_out, uint32_t ep_size, usb_ep_type_t ep_type, - uint8_t *buf, uint32_t buf_size, void (USBTester::*callback)(usb_ep_t endpoint)) + uint8_t *buf, uint32_t buf_size, void (USBTester::*callback)()) { bool success = false; @@ -690,13 +690,13 @@ const uint8_t *USBTester::configuration_desc(uint8_t index) } } -void USBTester::epint_out_callback(usb_ep_t endpoint) +void USBTester::epint_out_callback() { - read_finish(endpoint); - read_start(endpoint, int_buf, sizeof(int_buf)); + read_finish(int_out); + read_start(int_out, int_buf, sizeof(int_buf)); } -void USBTester::epbulk_out_callback(usb_ep_t endpoint) +void USBTester::epbulk_out_callback() { - read_finish(endpoint); - read_start(endpoint, bulk_buf, sizeof(bulk_buf)); + read_finish(bulk_out); + read_start(bulk_out, bulk_buf, sizeof(bulk_buf)); } diff --git a/TESTS/usb_device/basic/USBTester.h b/TESTS/usb_device/basic/USBTester.h index 1f9349387eb..f94f771f372 100644 --- a/TESTS/usb_device/basic/USBTester.h +++ b/TESTS/usb_device/basic/USBTester.h @@ -62,7 +62,7 @@ class USBTester: public USBDevice { bool set_configuration(uint16_t configuration); bool set_interface(uint16_t interface, uint16_t alternate); bool setup_iterface(uint8_t ep_in, uint8_t ep_out, uint32_t ep_size, usb_ep_type_t ep_type, - uint8_t *buf, uint32_t buf_size, void (USBTester::*callback)(usb_ep_t endpoint)); + uint8_t *buf, uint32_t buf_size, void (USBTester::*callback)()); void remove_iterface(uint16_t interface); int16_t interface_0_alt_set; int16_t interface_1_alt_set; @@ -117,8 +117,8 @@ class USBTester: public USBDevice { virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); virtual void callback_set_configuration(uint8_t configuration); virtual void callback_set_interface(uint16_t interface, uint8_t alternate); - virtual void epbulk_out_callback(usb_ep_t endpoint); - virtual void epint_out_callback(usb_ep_t endpoint); + virtual void epbulk_out_callback(); + virtual void epint_out_callback(); virtual void callback_reset(); uint8_t ctrl_buf[2048]; diff --git a/usb/device/USBAudio/USBAudio.cpp b/usb/device/USBAudio/USBAudio.cpp index abd899ab45f..71d392e9998 100644 --- a/usb/device/USBAudio/USBAudio.cpp +++ b/usb/device/USBAudio/USBAudio.cpp @@ -883,10 +883,9 @@ void USBAudio::_receive_change(ChannelState new_state) } } -void USBAudio::_receive_isr(usb_ep_t ep) +void USBAudio::_receive_isr() { assert_locked(); - MBED_ASSERT(ep == _episo_out); uint32_t size = read_finish(_episo_out); @@ -984,10 +983,9 @@ void USBAudio::_send_isr_next_sync() _tx_frame_fract += _tx_fract_frames_per_xfer; } -void USBAudio::_send_isr(usb_ep_t ep) +void USBAudio::_send_isr() { assert_locked(); - MBED_ASSERT(ep == _episo_in); write_finish(_episo_in); diff --git a/usb/device/USBAudio/USBAudio.h b/usb/device/USBAudio/USBAudio.h index fec17615f1e..d2ed6aea68d 100644 --- a/usb/device/USBAudio/USBAudio.h +++ b/usb/device/USBAudio/USBAudio.h @@ -275,11 +275,11 @@ class USBAudio: protected USBDevice { void _build_configuration_desc(); void _receive_change(ChannelState new_state); - void _receive_isr(usb_ep_t ep); + void _receive_isr(); void _send_change(ChannelState new_state); void _send_isr_start(); void _send_isr_next_sync(); - void _send_isr(usb_ep_t ep); + void _send_isr(); // has connect been called bool _connected; diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index c4fc4e17f67..b38fd67f58a 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -939,7 +939,7 @@ void USBDevice::out(usb_ep_t endpoint) MBED_ASSERT(info->pending >= 1); info->pending -= 1; if (info->callback) { - (this->*(info->callback))(endpoint); + (this->*(info->callback))(); } } @@ -957,7 +957,7 @@ void USBDevice::in(usb_ep_t endpoint) MBED_ASSERT(info->pending >= 1); info->pending -= 1; if (info->callback) { - (this->*(info->callback))(endpoint); + (this->*(info->callback))(); } } diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 8ef7008597f..133ea245223 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -42,7 +42,7 @@ */ class USBDevice: public USBPhyEvents { public: - typedef void (USBDevice::*ep_cb_t)(usb_ep_t endpoint); + typedef void (USBDevice::*ep_cb_t)(); enum RequestResult { Receive = 0, @@ -157,7 +157,7 @@ class USBDevice: public USBPhyEvents { * @returns true if successful, false otherwise */ template - bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type, void (T::*callback)(usb_ep_t endpoint)) + bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type, void (T::*callback)()) { return endpoint_add(endpoint, max_packet, type, static_cast(callback)); } @@ -539,7 +539,7 @@ class USBDevice: public USBPhyEvents { void _complete_set_interface(); struct endpoint_info_t { - void (USBDevice::*callback)(usb_ep_t endpoint); + ep_cb_t callback; uint16_t max_packet_size; uint16_t transfer_size; uint8_t flags; diff --git a/usb/device/USBHID/USBHID.cpp b/usb/device/USBHID/USBHID.cpp index 14bc74ee06f..f2d73c3e061 100644 --- a/usb/device/USBHID/USBHID.cpp +++ b/usb/device/USBHID/USBHID.cpp @@ -233,7 +233,7 @@ bool USBHID::read_nb(HID_REPORT *report) return success; } -void USBHID::_send_isr(usb_ep_t endpoint) +void USBHID::_send_isr() { assert_locked(); @@ -247,7 +247,7 @@ void USBHID::_send_isr(usb_ep_t endpoint) } -void USBHID::_read_isr(usb_ep_t endpoint) +void USBHID::_read_isr() { assert_locked(); diff --git a/usb/device/USBHID/USBHID.h b/usb/device/USBHID/USBHID.h index 2cd984a6613..db5b4cc8c76 100644 --- a/usb/device/USBHID/USBHID.h +++ b/usb/device/USBHID/USBHID.h @@ -245,8 +245,8 @@ class USBHID: public USBDevice { private: void _init(uint8_t output_report_length, uint8_t input_report_length); - void _send_isr(usb_ep_t endpoint); - void _read_isr(usb_ep_t endpoint); + void _send_isr(); + void _read_isr(); class AsyncSend; class AsyncRead; diff --git a/usb/device/USBMIDI/USBMIDI.cpp b/usb/device/USBMIDI/USBMIDI.cpp index 4fb902c5ebd..24cceff1f49 100644 --- a/usb/device/USBMIDI/USBMIDI.cpp +++ b/usb/device/USBMIDI/USBMIDI.cpp @@ -311,14 +311,14 @@ const uint8_t *USBMIDI::configuration_desc(uint8_t index) return _config_descriptor; } -void USBMIDI::_in_callback(usb_ep_t ep) +void USBMIDI::_in_callback() { assert_locked(); _flags.set(FLAG_WRITE_DONE); } -void USBMIDI::_out_callback(usb_ep_t ep) +void USBMIDI::_out_callback() { assert_locked(); diff --git a/usb/device/USBMIDI/USBMIDI.h b/usb/device/USBMIDI/USBMIDI.h index c1d968d6192..04adfe7ad09 100644 --- a/usb/device/USBMIDI/USBMIDI.h +++ b/usb/device/USBMIDI/USBMIDI.h @@ -176,8 +176,8 @@ class USBMIDI: public USBDevice { Callback _callback; void _init(); - void _in_callback(usb_ep_t); - void _out_callback(usb_ep_t); + void _in_callback(); + void _out_callback(); bool _next_message(); }; diff --git a/usb/device/USBMSD/USBMSD.cpp b/usb/device/USBMSD/USBMSD.cpp index ba81e98b68d..01f0aa94043 100644 --- a/usb/device/USBMSD/USBMSD.cpp +++ b/usb/device/USBMSD/USBMSD.cpp @@ -238,12 +238,12 @@ int USBMSD::disk_status() return 0; } -void USBMSD::_isr_out(usb_ep_t endpoint) +void USBMSD::_isr_out() { _out_task.call(); } -void USBMSD::_isr_in(usb_ep_t endpoint) +void USBMSD::_isr_in() { _in_task.call(); } diff --git a/usb/device/USBMSD/USBMSD.h b/usb/device/USBMSD/USBMSD.h index 9e4ab48ed6a..b133f53b0e1 100644 --- a/usb/device/USBMSD/USBMSD.h +++ b/usb/device/USBMSD/USBMSD.h @@ -250,8 +250,8 @@ class USBMSD: public USBDevice { virtual void callback_request(const setup_packet_t *setup); virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); - void _isr_out(usb_ep_t endpoint); - void _isr_in(usb_ep_t endpoint); + void _isr_out(); + void _isr_in(); void _out(); void _in(); diff --git a/usb/device/USBSerial/USBCDC.cpp b/usb/device/USBSerial/USBCDC.cpp index b03ae1df3f4..7e406c419e1 100644 --- a/usb/device/USBSerial/USBCDC.cpp +++ b/usb/device/USBSerial/USBCDC.cpp @@ -410,11 +410,11 @@ void USBCDC::_send_isr_start() * Called by when CDC data is sent * Warning: Called in ISR */ -void USBCDC::_send_isr(usb_ep_t endpoint) +void USBCDC::_send_isr() { assert_locked(); - write_finish(endpoint); + write_finish(_bulk_in); _tx_buf = _tx_buffer; _tx_size = 0; _tx_in_progress = false; @@ -472,7 +472,7 @@ void USBCDC::_receive_isr_start() * Called by when CDC data is received * Warning: Called in ISR */ -void USBCDC::_receive_isr(usb_ep_t endpoint) +void USBCDC::_receive_isr() { assert_locked(); diff --git a/usb/device/USBSerial/USBCDC.h b/usb/device/USBSerial/USBCDC.h index bc281550e46..b08c9bcf0a5 100644 --- a/usb/device/USBSerial/USBCDC.h +++ b/usb/device/USBSerial/USBCDC.h @@ -194,10 +194,10 @@ class USBCDC: public USBDevice { void _change_terminal_connected(bool connected); void _send_isr_start(); - void _send_isr(usb_ep_t endpoint); + void _send_isr(); void _receive_isr_start(); - void _receive_isr(usb_ep_t endpoint); + void _receive_isr(); usb_ep_t _bulk_in; usb_ep_t _bulk_out; From 957cd7eb048ec06844b12f8b3fbaf55f54d6485b Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Mon, 28 May 2018 18:31:57 +0200 Subject: [PATCH 363/488] Tests: USB: Add device config files for Zadig Zadig is a tool used to install generic USB drivers on Windows machines. These drivers are necessary to run USB device test suite on Windows hosts. --- TESTS/usb_device/basic/zadig_conf/README.md | 18 ++++++++++++++++++ .../zadig_conf/mbed_os-usb_test_device1.cfg | 6 ++++++ .../zadig_conf/mbed_os-usb_test_device2.cfg | 6 ++++++ 3 files changed, 30 insertions(+) create mode 100644 TESTS/usb_device/basic/zadig_conf/README.md create mode 100644 TESTS/usb_device/basic/zadig_conf/mbed_os-usb_test_device1.cfg create mode 100644 TESTS/usb_device/basic/zadig_conf/mbed_os-usb_test_device2.cfg diff --git a/TESTS/usb_device/basic/zadig_conf/README.md b/TESTS/usb_device/basic/zadig_conf/README.md new file mode 100644 index 00000000000..f738d15c83a --- /dev/null +++ b/TESTS/usb_device/basic/zadig_conf/README.md @@ -0,0 +1,18 @@ +# Generic USB driver installation on Windows machines + +In order to run the Mbed OS USB device test suite (`tests-usb_device-*`) +on Windows hosts you need to install generic USB drivers for two test devices. + +1. Download *Zadig* application from https://zadig.akeo.ie/. +1. Unplug the Mbed device. +1. Open *Zadig*. +1. Select *Device -> Load Preset Device*. +1. Open `mbed_os-usb_test_device1.cfg`. +1. Choose `libusb-win32 (v1.2.6.0)` driver. +1. Select `Install Driver` and click it. +1. Select *Device -> Load Preset Device*. +1. Open `mbed_os-usb_test_device2.cfg`. +1. Choose `libusb-win32 (v1.2.6.0)` driver. +1. Select `Install Driver` and click it. +1. Close *Zadig*. +1. Plug both device USB interfaces (*DAPLink* and *USB device*). diff --git a/TESTS/usb_device/basic/zadig_conf/mbed_os-usb_test_device1.cfg b/TESTS/usb_device/basic/zadig_conf/mbed_os-usb_test_device1.cfg new file mode 100644 index 00000000000..71e084a130f --- /dev/null +++ b/TESTS/usb_device/basic/zadig_conf/mbed_os-usb_test_device1.cfg @@ -0,0 +1,6 @@ +# Zadig device configuration +# Mbed OS USB test device -- basic tests +[device] +Description = "MBED TEST DEVICE" +VID = 0x0D28 +PID = 0x0205 diff --git a/TESTS/usb_device/basic/zadig_conf/mbed_os-usb_test_device2.cfg b/TESTS/usb_device/basic/zadig_conf/mbed_os-usb_test_device2.cfg new file mode 100644 index 00000000000..80caf3417d4 --- /dev/null +++ b/TESTS/usb_device/basic/zadig_conf/mbed_os-usb_test_device2.cfg @@ -0,0 +1,6 @@ +# Zadig device configuration +# Mbed OS USB test device -- endpoint tests +[device] +Description = "USB DEVICE" +VID = 0x0D28 +PID = 0x0206 From bbd2fc8e4c31509b0d09e1508bd760fd168e867e Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 20 Jun 2018 15:55:48 -0500 Subject: [PATCH 364/488] Update USBMSD to be more consistent with others Add second constructor and reorder constructor parameters to match other USB classes. Also remove the ready() function since there are no calls that can only mbe made from a ready state. --- usb/device/USBMSD/USBMSD.cpp | 35 ++++++++++++++++++++++++----------- usb/device/USBMSD/USBMSD.h | 35 +++++++++++++++++++++++------------ 2 files changed, 47 insertions(+), 23 deletions(-) diff --git a/usb/device/USBMSD/USBMSD.cpp b/usb/device/USBMSD/USBMSD.cpp index 01f0aa94043..79020201c0e 100644 --- a/usb/device/USBMSD/USBMSD.cpp +++ b/usb/device/USBMSD/USBMSD.cpp @@ -17,6 +17,7 @@ #include "stdint.h" #include "USBMSD.h" #include "EndpointResolver.h" +#include "usb_phy_api.h" #define DISK_OK 0x00 #define NO_INIT 0x01 @@ -61,11 +62,28 @@ enum Status { CSW_ERROR, }; -USBMSD::USBMSD(BlockDevice *bd, USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) +USBMSD::USBMSD(BlockDevice *bd, bool connect_blocking, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) + : USBDevice(get_usb_phy(), vendor_id, product_id, product_release), + _initialized(false), _in_task(&_queue), _out_task(&_queue), _reset_task(&_queue), _control_task(&_queue), _configure_task(&_queue), _bd(bd) +{ + _init(); + if (connect_blocking) { + connect(); + } else { + init(); + } +} + +USBMSD::USBMSD(USBPhy *phy, BlockDevice *bd, uint16_t vendor_id, uint16_t product_id, uint16_t product_release) : USBDevice(phy, vendor_id, product_id, product_release), - _init(false), _in_task(&_queue), _out_task(&_queue), _reset_task(&_queue), _control_task(&_queue), _configure_task(&_queue) + _initialized(false), _in_task(&_queue), _out_task(&_queue), _reset_task(&_queue), _control_task(&_queue), _configure_task(&_queue), _bd(bd) +{ + _init(); +} + + +void USBMSD::_init() { - _bd = bd; _bd->init(); _in_task = callback(this, &USBMSD::_in); @@ -100,7 +118,7 @@ bool USBMSD::connect() _mutex.lock(); // already initialized - if (_init) { + if (_initialized) { _mutex.unlock(); _mutex_init.unlock(); return false; @@ -140,7 +158,7 @@ bool USBMSD::connect() //connect the device USBDevice::connect(); - _init = true; + _initialized = true; _mutex.unlock(); _mutex_init.unlock(); return true; @@ -152,7 +170,7 @@ void USBMSD::disconnect() _mutex.lock(); USBDevice::disconnect(); - _init = false; + _initialized = false; _in_task.cancel(); _out_task.cancel(); @@ -179,11 +197,6 @@ void USBMSD::disconnect() _mutex_init.unlock(); } -bool USBMSD::ready() -{ - return configured(); -} - void USBMSD::process() { _queue.dispatch(); diff --git a/usb/device/USBMSD/USBMSD.h b/usb/device/USBMSD/USBMSD.h index b133f53b0e1..d0584156fd4 100644 --- a/usb/device/USBMSD/USBMSD.h +++ b/usb/device/USBMSD/USBMSD.h @@ -25,7 +25,6 @@ #include "events/Task.h" #include "BlockDevice.h" #include "Mutex.h" -#include "usb_phy_api.h" #include "USBDevice.h" @@ -46,7 +45,6 @@ * USBMSD usb(&sd); * * int main() { - * usb.connect(); * * while(true) { * usb.process(); @@ -66,12 +64,31 @@ class USBMSD: public USBDevice { * for the block device to connect. * * @param bd BlockDevice to mount as a USB drive + * @param connect_blocking true to perform a blocking connect, false to start in a disconnected state + * @param vendor_id Your vendor_id + * @param product_id Your product_id + * @param product_release Your preoduct_release + */ + USBMSD(BlockDevice *bd, bool connect_blocking = true, uint16_t vendor_id = 0x0703, uint16_t product_id = 0x0104, uint16_t product_release = 0x0001); + + /** + * Fully featured constructor + * + * Construct this object with the supplied USBPhy and parameters. The user + * this object is responsible for calling connect() or init(). + * + * @note Derived classes must use this constructor and call init() or + * connect() themselves. Derived classes should also call deinit() in + * their destructor. This ensures that no interrupts can occur when the + * object is partially constructed or destroyed. + * * @param phy USB phy to use + * @param bd BlockDevice to mount as a USB drive * @param vendor_id Your vendor_id * @param product_id Your product_id * @param product_release Your preoduct_release */ - USBMSD(BlockDevice *bd, USBPhy *phy=get_usb_phy(), uint16_t vendor_id = 0x0703, uint16_t product_id = 0x0104, uint16_t product_release = 0x0001); + USBMSD(USBPhy *phy, BlockDevice *bd, uint16_t vendor_id, uint16_t product_id, uint16_t product_release); /** * Destroy this object @@ -82,7 +99,7 @@ class USBMSD: public USBDevice { virtual ~USBMSD(); /** - * Connect the USB MSD device. Establish disk initialization before really connect the device. + * Connect the USB MSD device. * * @returns true if successful */ @@ -93,13 +110,6 @@ class USBMSD: public USBDevice { */ void disconnect(); - /** - * Check if USB is connected - * - * @return true if a USB is connected, false otherwise - */ - bool ready(); - /** * Perform USB processing */ @@ -190,7 +200,7 @@ class USBMSD: public USBDevice { } CSW; // If this class has been initialized - bool _init; + bool _initialized; //state of the bulk-only state machine Stage _stage; @@ -259,6 +269,7 @@ class USBMSD: public USBDevice { void _control(const setup_packet_t *request); void _configure(); + void _init(); void _process(); void _write_next(uint8_t *data, uint32_t size); void _read_next(); From 33bbce631d674b8aab7fc2dcaee18c48efb87498 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 21 Jun 2018 09:54:51 -0500 Subject: [PATCH 365/488] Revert "Fix Kinetis bug causing USB to get stuck" Revert the commit "Fix Kinetis bug causing USB to get stuck sending" since this change causes stalls to be missed sometimes. --- .../targets/TARGET_Freescale/USBPhy_Kinetis.cpp | 14 +------------- 1 file changed, 1 insertion(+), 13 deletions(-) diff --git a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp index 763fa9cc139..8c277cc10e9 100644 --- a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp +++ b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp @@ -411,23 +411,11 @@ void USBPhyHw::endpoint_remove(usb_ep_t endpoint) void USBPhyHw::endpoint_stall(usb_ep_t endpoint) { - if (DESC_TO_LOG(endpoint) == 0) { - USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK; - } else { - uint8_t dir = DESC_EP_IN(endpoint) ? TX : RX; - uint32_t idx = EP_BDT_IDX(DESC_TO_LOG(endpoint), dir, 0); - bdt[idx].info |= BD_OWN_MASK | BD_STALL_MASK; - } + USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK; } void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) { - - if (DESC_TO_LOG(endpoint) != 0) { - uint8_t dir = DESC_EP_IN(endpoint) ? TX : RX; - uint32_t idx = EP_BDT_IDX(DESC_TO_LOG(endpoint), dir, 0); - bdt[idx].info &= ~(BD_OWN_MASK | BD_STALL_MASK); - } USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; } From 0811908e374e31831ff7a0c02eb2c59026389dbb Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Wed, 13 Jun 2018 19:38:01 -0500 Subject: [PATCH 366/488] Alternate Kinetis USB stuck sending bug fix If an IN endpoint is stalled during a transfer then the data being sent will repeated and flood the USB bus. This patch prevents endpoints from being stalled in the middle of a transfer by control requests by keeping USB suspended until the setup phase of the control request is done. --- .../TARGET_Freescale/USBPhy_Kinetis.cpp | 35 +++++++++++++++++-- 1 file changed, 33 insertions(+), 2 deletions(-) diff --git a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp index 8c277cc10e9..ad2fb53907d 100644 --- a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp +++ b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp @@ -89,6 +89,7 @@ uint8_t ep1_buffer[2][MAX_PACKET_SIZE_EP1]; uint8_t ep2_buffer[2][MAX_PACKET_SIZE_EP2]; uint8_t ep3_buffer[2][MAX_PACKET_SIZE_EP3]; +static bool setup_suspend = false; static uint8_t set_addr = 0; static uint8_t addr = 0; static ctrl_xfer_t ctrl_xfer = CTRL_XFER_READY; @@ -317,6 +318,12 @@ void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) } else { endpoint_read(EP0OUT, data, size); } + + // Clear suspend after the setup stage + if (setup_suspend) { + USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; + setup_suspend = false; + } } uint32_t USBPhyHw::ep0_read_result() @@ -336,6 +343,12 @@ void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) ctrl_xfer = CTRL_XFER_READY; } endpoint_write(EP0IN, buffer, size); + + // Clear suspend after the setup stage + if (setup_suspend) { + USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; + setup_suspend = false; + } } void USBPhyHw::ep0_stall() @@ -345,6 +358,13 @@ void USBPhyHw::ep0_stall() return; } ctrl_xfer = CTRL_XFER_READY; + + // Clear suspend after the setup stage + if (setup_suspend) { + USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; + setup_suspend = false; + } + core_util_critical_section_enter(); endpoint_stall(EP0OUT); // Prepare for next setup packet @@ -503,7 +523,6 @@ bool USBPhyHw::endpoint_read_result_core(usb_ep_t endpoint, uint8_t *data, uint3 } } - USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; *bytes_read = sz; epComplete &= ~EP(DESC_TO_PHY(endpoint)); @@ -564,6 +583,7 @@ void USBPhyHw::process() } // enable control endpoint + setup_suspend = false; endpoint_add(EP0OUT, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); endpoint_add(EP0IN, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); @@ -608,7 +628,7 @@ void USBPhyHw::process() } // token interrupt - if (istat & 1<<3) { + if (istat & USB_ISTAT_TOKDNE_MASK) { uint32_t num = (USB0->STAT >> 4) & 0x0F; uint32_t dir = (USB0->STAT >> 3) & 0x01; uint32_t ev_odd = (USB0->STAT >> 2) & 0x01; @@ -616,6 +636,7 @@ void USBPhyHw::process() // setup packet if ((num == 0) && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == SETUP_TOKEN)) { + setup_suspend = true; Data1 |= 0x02 | 0x01; // set DATA1 for TX and RX bdt[EP_BDT_IDX(0, TX, EVEN)].info &= ~BD_OWN_MASK; bdt[EP_BDT_IDX(0, TX, ODD)].info &= ~BD_OWN_MASK; @@ -665,6 +686,16 @@ void USBPhyHw::process() USB0->ISTAT = USB_ISTAT_ERROR_MASK; } + // Check if the suspend condition should be removed here + // 1. Don't attempt to clear USB_CTL_TXSUSPENDTOKENBUSY_MASK if it isn't set. This + // is to avoid potential race conditions. + // 2. If a setup packet is being processed then remove suspend on the next control transfer rather than here + // 3. Process all pending packets before removing suspend + bool suspended = (USB0->CTL & USB_CTL_TXSUSPENDTOKENBUSY_MASK) != 0; + if (suspended && !setup_suspend && ((USB0->ISTAT & USB_ISTAT_TOKDNE_MASK) == 0)) { + USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; + } + NVIC_ClearPendingIRQ(USB0_IRQn); NVIC_EnableIRQ(USB0_IRQn); } From f5e7b4f675d9953b77981a1780580ca107db5238 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 21 Jun 2018 10:19:40 -0500 Subject: [PATCH 367/488] Abort the current USB transfer when stalling It is undefined behavior if stalling and unstalling clears an ongoing transfer. Abort any ongoing transfers explicitly when stalling and unstalling so the behavior is consistent across devices. --- usb/device/USBDevice/USBDevice.cpp | 8 ++++++++ usb/device/USBDevice/USBDevice.h | 7 +++++++ 2 files changed, 15 insertions(+) diff --git a/usb/device/USBDevice/USBDevice.cpp b/usb/device/USBDevice/USBDevice.cpp index b38fd67f58a..d2327ba5b19 100644 --- a/usb/device/USBDevice/USBDevice.cpp +++ b/usb/device/USBDevice/USBDevice.cpp @@ -1151,6 +1151,10 @@ void USBDevice::endpoint_stall(usb_ep_t endpoint) info->flags |= ENDPOINT_STALLED; _phy->endpoint_stall(endpoint); + if (info->pending) { + endpoint_abort(endpoint); + } + unlock(); } @@ -1172,6 +1176,10 @@ void USBDevice::endpoint_unstall(usb_ep_t endpoint) return; } + if (info->pending) { + endpoint_abort(endpoint); + } + info->flags &= ~ENDPOINT_STALLED; _phy->endpoint_unstall(endpoint); diff --git a/usb/device/USBDevice/USBDevice.h b/usb/device/USBDevice/USBDevice.h index 133ea245223..5831df48b79 100644 --- a/usb/device/USBDevice/USBDevice.h +++ b/usb/device/USBDevice/USBDevice.h @@ -178,6 +178,9 @@ class USBDevice: public USBPhyEvents { /** * Stall an endpoint * + * If there is an ongoing transfer on this endpoint then it will + * be aborted. + * * @param endpoint Endpoint to stall * @note You cannot stall endpoint 0 with this function * @note This endpoint must already have been setup with endpoint_add @@ -187,6 +190,10 @@ class USBDevice: public USBPhyEvents { /** * Unstall an endpoint * + * Unstalling an endpoint resets data toggle back to DATA0. + * Additionally, if there is an ongoing transfer on this endpoint + * it will be aborted. + * * @param endpoint Endpoint to unstall * @note This endpoint must already have been setup with endpoint_add */ From aa1bef0b398c826e45b7718af01d7aee0c003ef9 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 21 Jun 2018 11:25:01 -0500 Subject: [PATCH 368/488] Reset data toggle on Kinetis when unstalling Data toggle must be reset to DATA0 when an endpoint is unstalled. This patch makes that change. --- usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp index ad2fb53907d..16b0cd28569 100644 --- a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp +++ b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp @@ -436,6 +436,8 @@ void USBPhyHw::endpoint_stall(usb_ep_t endpoint) void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) { + // Next transfer will be a DATA0 packet + Data1 &= ~(1 << DESC_TO_PHY(endpoint)); USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK; } From 5599978f8cfe5d9f660acfd2b7dda1343851a465 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Sat, 23 Jun 2018 20:30:23 -0500 Subject: [PATCH 369/488] Revert "Create HAL_PCD_EP_Abort" Revert the patch "Create HAL_PCD_EP_Abort" in preparation for an alternate fix. --- .../TARGET_STM32F2/device/stm32f2xx_hal_pcd.c | 22 -------- .../TARGET_STM32F2/device/stm32f2xx_hal_pcd.h | 1 - .../TARGET_STM32F2/device/stm32f2xx_ll_usb.c | 55 ------------------- .../TARGET_STM32F2/device/stm32f2xx_ll_usb.h | 1 - .../targets/TARGET_STM/USBPhy_STM32.cpp | 4 -- 5 files changed, 83 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c index 8d1915a88dc..ee1703bbd10 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c @@ -1042,28 +1042,6 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); return HAL_OK; } -/** - * @brief Abort a transaction. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @param pBuf: pointer to the transmission buffer - * @param len: amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - HAL_StatusTypeDef ret; - USB_OTG_EPTypeDef *ep; - - ep = &hpcd->IN_ep[ep_addr & 0x7F]; - - /*setup and start the Xfer */ - __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); - ret = USB_EPStopXfer(hpcd->Instance , ep, hpcd->Init.dma_enable); - - __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); - return ret; -} /** * @brief Set a STALL condition over an endpoint. diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h index 610c8456e95..f617e6d8de6 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h @@ -271,7 +271,6 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); -HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c index 02b936b5925..b4799572c43 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c @@ -745,61 +745,6 @@ HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeD } return HAL_OK; } -/** - * @brief USB_EPStoptXfer : setup and starts a transfer over an EP - * @param USBx : Selected device - * @param ep: pointer to endpoint structure - * @param dma: USB dma enabled or disabled - * This parameter can be one of these values: - * 0 : DMA feature not used - * 1 : DMA feature used - * @retval HAL status - */ -HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma) -{ - HAL_StatusTypeDef ret = HAL_OK; - /* IN endpoint */ - if (ep->is_in == 1U) - { - - /* EP enable, IN data in FIFO */ - if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) - { - volatile uint32_t loop=0; - USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_EPDIS); - while(((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) - {/* data sheet say that EPDISD: Endpoint disabled interrupt must be raised - to consider the endpoint as disable */ - /* fix me loop for test only */ - loop++; - if (loop > 10000L) { - ret =HAL_ERROR; - break; - } - } - } - } - else /* OUT endpoint */ - { - if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) - { - volatile uint32_t loop=0; - USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_EPDIS); - while(((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) - {/* data sheet say that EPDISD: Endpoint disabled interrupt must be raised - to consider the endpoint as disable */ - /* Fix me loop for test only */ - loop++; - if (loop > 10000L) { - ret =HAL_ERROR; - break; - } - } - } - } - return ret; -} - /** * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h index ac6cc496df3..ebbb5987613 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h @@ -404,7 +404,6 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EP HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); -HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma); void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len); diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 91facb63698..5bb99c5b017 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -476,10 +476,6 @@ bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) void USBPhyHw::endpoint_abort(usb_ep_t endpoint) { // TODO - stop the current transfer on this endpoint and don't call the IN or OUT callback - HAL_StatusTypeDef ret; - ret = HAL_PCD_EP_Abort(&hpcd, endpoint); - MBED_ASSERT(ret==HAL_OK); - return; } void USBPhyHw::process() From 8312d52aecd36ed2bb3fbe85679c093f2db2bcd3 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 25 Jun 2018 17:44:39 -0500 Subject: [PATCH 370/488] Alternate implementation of HAL_PCD_EP_Abort Update the patch "Create HAL_PCD_EP_Abort" to fix bugs. This patch adds the low level functions USB_EPStopXfer, USB_EPSetNak, USB_EPClearNak and the high level function HAL_PCD_EP_Abort so that transfers can be stopped. The functions USB_EPSetNak and USB_EPClearNak allow nak to be enabled or disabled for an endpoint, preventing or allowing further transfers. The function USB_EPStopXfer stops pending reads and writes started by USB_EPStartXfer along with clearing and masking any interrupts enabled by USB_EPStartXfer. The function HAL_PCD_EP_Abort aborts any transfers on the given endpoint. When this function completes the transfer interrupt is guarenteed not to fire for this endpoint. Furthermore, the size of data transferred during an aborted read can be found by calling the function HAL_PCD_EP_GetRxCount. Other notes on this Change: 1. Prior to this patch the interrupt USB_OTG_DOEPINT_EPDISD was not handled. When an OUT endpoint was disabled this interrupt occurred causing the CPU to get stuck repeatedly handling this interrupt. This is because this interrupt was unmasked but nothing cleared this interrupt. This patch also adds code to handle and clear this interrupt to prevent a lockup. 2. Stopping a transfer on an OUT endpoint requires global nak OUT to be in effect. Even with this being done, having entries in the rx fifo prevented an OUT endpoint from being disabled. This behavior is not mentioned in the Reference Manual. --- .../TARGET_STM32F2/device/stm32f2xx_hal_pcd.c | 143 ++++++++++++--- .../TARGET_STM32F2/device/stm32f2xx_hal_pcd.h | 1 + .../TARGET_STM32F2/device/stm32f2xx_ll_usb.c | 166 ++++++++++++++++++ .../TARGET_STM32F2/device/stm32f2xx_ll_usb.h | 3 + 4 files changed, 291 insertions(+), 22 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c index ee1703bbd10..415c279307d 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c @@ -104,6 +104,7 @@ * @{ */ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t epnum); +static HAL_StatusTypeDef PCD_ReadRxFifo(PCD_HandleTypeDef *hpcd); /** * @} */ @@ -314,7 +315,6 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; uint32_t i = 0U, ep_intr = 0U, epint = 0U, epnum = 0U; uint32_t fifoemptymsk = 0U, temp = 0U; - USB_OTG_EPTypeDef *ep; uint32_t hclk = 120000000U; /* ensure that we are in device mode */ @@ -366,6 +366,11 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) } } + if (( epint & USB_OTG_DOEPINT_EPDISD) == USB_OTG_DOEPINT_EPDISD) + { + CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_EPDISD); + } + if(( epint & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP) { /* Inform the upper layer that a setup packet is available */ @@ -596,27 +601,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) /* Handle RxQLevel Interrupt */ if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) { - USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); - - temp = USBx->GRXSTSP; - - ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM]; - - if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_DATA_UPDT) - { - if((temp & USB_OTG_GRXSTSP_BCNT) != 0U) - { - USB_ReadPacket(USBx, ep->xfer_buff, (temp & USB_OTG_GRXSTSP_BCNT) >> 4U); - ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; - ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; - } - } - else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_SETUP_UPDT) - { - USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U); - ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; - } - USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); + PCD_ReadRxFifo(hpcd); } /* Handle SOF Interrupt */ @@ -1043,6 +1028,84 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, return HAL_OK; } +/** + * @brief Abort a transaction. + * @param hpcd: PCD handle + * @param ep_addr: endpoint address + * @retval HAL status + */ +HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) +{ + USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; + HAL_StatusTypeDef ret = HAL_OK; + USB_OTG_EPTypeDef *ep; + + if ((0x80 & ep_addr) == 0x80) + { + ep = &hpcd->IN_ep[ep_addr & 0x7F]; + } + else + { + ep = &hpcd->OUT_ep[ep_addr]; + } + + __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); + + ep->num = ep_addr & 0x7F; + ep->is_in = ((ep_addr & 0x80) == 0x80); + + USB_EPSetNak(hpcd->Instance, ep); + + if ((0x80 & ep_addr) == 0x80) + { + ret = USB_EPStopXfer(hpcd->Instance , ep); + if (ret == HAL_OK) + { + ret = USB_FlushTxFifo(hpcd->Instance, ep_addr & 0x7F); + } + } + else + { + /* Set global NAK */ + USBx_DEVICE->DCTL |= USB_OTG_DCTL_SGONAK; + + /* Read all entries from the fifo so global NAK takes effect */ + while (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) + { + PCD_ReadRxFifo(hpcd); + } + + /* Stop the transfer */ + ret = USB_EPStopXfer(hpcd->Instance , ep); + if (ret == HAL_BUSY) + { + /* If USB_EPStopXfer returns HAL_BUSY then a setup packet + * arrived after the rx fifo was processed but before USB_EPStopXfer + * was called. Process the rx fifo one more time to read the + * setup packet. + * + * Note - after the setup packet has been received no further + * packets will be received over USB. This is because the next + * phase (data or status) of the control transfer started by + * the setup packet will be naked until global nak is cleared. + */ + while (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) + { + PCD_ReadRxFifo(hpcd); + } + + ret = USB_EPStopXfer(hpcd->Instance , ep); + } + + /* Clear global nak */ + USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGONAK; + } + + __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); + + return ret; +} + /** * @brief Set a STALL condition over an endpoint. * @param hpcd: PCD handle @@ -1256,6 +1319,42 @@ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t return HAL_OK; } +/** + * @brief Process the next RX fifo entry + * @param hpcd: PCD handle + * @retval HAL status + */ +static HAL_StatusTypeDef PCD_ReadRxFifo(PCD_HandleTypeDef *hpcd) +{ + USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; + USB_OTG_EPTypeDef *ep; + uint32_t temp = 0; + + USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); + + temp = USBx->GRXSTSP; + + ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM]; + + if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_DATA_UPDT) + { + if((temp & USB_OTG_GRXSTSP_BCNT) != 0U) + { + USB_ReadPacket(USBx, ep->xfer_buff, (temp & USB_OTG_GRXSTSP_BCNT) >> 4U); + ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; + ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; + } + } + else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_SETUP_UPDT) + { + USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U); + ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; + } + USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); + + return HAL_OK; +} + /** * @} */ diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h index f617e6d8de6..610c8456e95 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h @@ -271,6 +271,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); +HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c index b4799572c43..c15db199e7e 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c @@ -746,6 +746,96 @@ HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeD return HAL_OK; } +/** + * @brief USB_EPStoptXfer : stop transfer on this endpoint + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @retval HAL status + * @note IN endpoints must have NAK enabled before calling this function + * @note OUT endpoints must have global out NAK enabled before calling this + * function. Furthermore, the RX fifo must be empty or the status + * HAL_BUSY will be returned. + */ +HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep) +{ + HAL_StatusTypeDef ret = HAL_OK; + uint32_t count = 0U; + uint32_t epint, fifoemptymsk; + + /* IN endpoint */ + if (ep->is_in == 1U) + { + + /* EP enable, IN data in FIFO */ + if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) + { + /* Disable this endpoint */ + USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_EPDIS; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_INEP(ep->num)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA); + } + + /* Clear transfer complete interrupt */ + epint = USB_ReadDevInEPInterrupt(USBx, ep->num); + if((epint & USB_OTG_DIEPINT_XFRC) == USB_OTG_DIEPINT_XFRC) + { + CLEAR_IN_EP_INTR(ep->num, USB_OTG_DIEPINT_XFRC); + } + + /* Mask fifo empty interrupt */ + fifoemptymsk = 0x1U << ep->num; + atomic_clr_u32(&USBx_DEVICE->DIEPEMPMSK, fifoemptymsk); + } + else /* OUT endpoint */ + { + if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) + { + /* Disable this endpoint */ + USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_EPDIS; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + if ((USBx->GINTSTS & USB_OTG_GINTSTS_RXFLVL) == USB_OTG_GINTSTS_RXFLVL) + { + /* Although not mentioned in the Reference Manual, it appears that the + * rx fifo must be empty for an OUT endpoint to be disabled. Typically + * this will happen when setting the global OUT nak (required by Reference + * Manual) as this requires processing the rx fifo. This is not guaranteed + * though, as a setup packet can arrive even while global OUT nak is set. + * + * During testing this event was observed and prevented endpoint disabling + * from completing until the rx fifo was empty. To address this problem + * return HAL_BUSY if the rx fifo is not empty to give higher level code + * a chance to clear the fifo and retry the operation. + * + */ + return HAL_BUSY; + } + } + while ((USBx_OUTEP(ep->num)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA); + } + + /* Clear interrupt */ + epint = USB_ReadDevOutEPInterrupt(USBx, ep->num); + if(( epint & USB_OTG_DOEPINT_XFRC) == USB_OTG_DOEPINT_XFRC) + { + CLEAR_OUT_EP_INTR(ep->num, USB_OTG_DOEPINT_XFRC); + } + } + return ret; +} + /** * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated * with the EP/channel @@ -855,6 +945,82 @@ HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDe return HAL_OK; } +/** + * @brief USB_EPSetNak : stop transfer and nak all tokens on this endpoint + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @retval HAL status + */ +HAL_StatusTypeDef USB_EPSetNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep) +{ + uint32_t count = 0; + if (ep->is_in == 1U) + { + USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_INEP(ep->num)->DIEPCTL & USB_OTG_DIEPCTL_NAKSTS) != USB_OTG_DIEPCTL_NAKSTS); + } + else + { + USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_OUTEP(ep->num)->DOEPCTL & USB_OTG_DOEPCTL_NAKSTS) != USB_OTG_DOEPCTL_NAKSTS); + } + return HAL_OK; +} + +/** + * @brief USB_EPSetNak : resume transfer and stop naking on this endpoint + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @retval HAL status + */ +HAL_StatusTypeDef USB_EPClearNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep) +{ + uint32_t count = 0; + if (ep->is_in == 1U) + { + USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_CNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_INEP(ep->num)->DIEPCTL & USB_OTG_DIEPCTL_NAKSTS) == USB_OTG_DIEPCTL_NAKSTS); + } + else + { + USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_OUTEP(ep->num)->DOEPCTL & USB_OTG_DOEPCTL_NAKSTS) == USB_OTG_DOEPCTL_NAKSTS); + } + return HAL_OK; +} + /** * @brief USB_StopDevice : Stop the usb device mode * @param USBx : Selected device diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h index ebbb5987613..1d04629847c 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h @@ -404,11 +404,14 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EP HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); +HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma); void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len); HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); +HAL_StatusTypeDef USB_EPSetNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); +HAL_StatusTypeDef USB_EPClearNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address); HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx); HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx); From 1db75b8296d406da76530a4fe52ed1b37ffd78ca Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 25 Jun 2018 17:48:53 -0500 Subject: [PATCH 371/488] Implement endpoint_abort for STM32 Make use of the added function HAL_PCD_EP_Abort to implement endpoint_abort. --- usb/device/targets/TARGET_STM/USBPhy_STM32.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 5bb99c5b017..33a80921f20 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -475,7 +475,8 @@ bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) void USBPhyHw::endpoint_abort(usb_ep_t endpoint) { - // TODO - stop the current transfer on this endpoint and don't call the IN or OUT callback + HAL_StatusTypeDef ret = HAL_PCD_EP_Abort(&hpcd, endpoint); + MBED_ASSERT(ret==HAL_OK); } void USBPhyHw::process() From bfaf78000cba75ca2300257f4663c2845598f7f1 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 25 Jun 2018 17:55:03 -0500 Subject: [PATCH 372/488] Fix ST test failures due to endpoint reconfiguration Also always use the max endpoint size for SetTxFifo since re-configuring fifos when endpoints are added or removed causes tests to fail. --- .../targets/TARGET_STM/USBPhy_STM32.cpp | 79 +++++++++++++------ 1 file changed, 56 insertions(+), 23 deletions(-) diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 33a80921f20..7990dc02fb0 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -41,6 +41,19 @@ #define LOG_OUT_TO_EP(ep) ((ep) | 0x00) #define IDX_TO_EP(ep) (((ep) >> 1)|((ep) & 1) << 7) +/* endpoint defines */ +#define NUM_ENDPOINTS 4 +#define MAX_PACKET_NON_ISO 64 +#define MAX_PACKET_ISO (256 + 128) // Spec can go up to 1023, only ram for this though +#define ENDPOINT_NON_ISO (USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_ALLOW_INT) + +static const uint32_t tx_ep_sizes[NUM_ENDPOINTS] = { + MAX_PACKET_NON_ISO, + MAX_PACKET_NON_ISO, + MAX_PACKET_NON_ISO, + MAX_PACKET_ISO +}; + uint32_t HAL_PCDEx_GetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo) { uint32_t len; @@ -274,11 +287,28 @@ void USBPhyHw::init(USBPhyEvents *events) hpcd.State = HAL_PCD_STATE_RESET; HAL_PCD_Init(&hpcd); + + uint32_t total_bytes = 0; + + /* Reserve space in the RX buffer for: + * - 1 isochonous packet + * - 2 max sized non-isochonous packets + * - setup buffer - 10 words as specified by Reference Manual + * - global nak out - 1 words as specified by Reference Manual + */ + uint32_t fifo_size = (MAX_PACKET_ISO + 4) + (MAX_PACKET_NON_ISO + 4) * 2 + (10 * 4) + (1 * 4); + HAL_PCDEx_SetRxFiFo(&hpcd, (fifo_size / 4)); + total_bytes += fifo_size; + + /* Reserve Tx space up front */ + for (int i = 0; i < NUM_ENDPOINTS; i++) { + fifo_size = tx_ep_sizes[i] + 4; + HAL_PCDEx_SetTxFiFo(&hpcd, i, fifo_size / 4); + total_bytes += fifo_size; + } + /* 1.25 kbytes */ - /* min value 16 (= 16 x 4 bytes) */ - /* max value 256 (= 1K bytes ) */ - /* maximum sum is 0x140 */ - HAL_PCDEx_SetRxFiFo(&hpcd, (MAXTRANSFER_SIZE / 4)); + MBED_ASSERT(total_bytes <= 1280); // Configure interrupt vector NVIC_SetVector(USBHAL_IRQn, (uint32_t)&_usbisr); @@ -340,24 +370,24 @@ void USBPhyHw::remote_wakeup() const usb_ep_table_t *USBPhyHw::endpoint_table() { static const usb_ep_table_t table = { - 1280, // 1.25K for endpoint buffers + 1280, // 1.25K for endpoint buffers but space is allocated up front { - {USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 80}, - {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4}, - {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 1, 4} + {USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0} } }; return &table; @@ -409,9 +439,12 @@ void USBPhyHw::ep0_stall() bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type) { uint32_t len; - if (max_packet > MAXTRANSFER_SIZE) return false; + + /* + * Endpoints are configured in init since re-configuring + * fifos when endpoints are added or removed causes tests to fail. + */ if (endpoint & 0x80) { - HAL_PCDEx_SetTxFiFo(&hpcd, endpoint & 0x7f, (max_packet / 4) + 1); len = HAL_PCDEx_GetTxFiFo(&hpcd,endpoint & 0x7f); MBED_ASSERT(len >= max_packet); } From ba5631a5ff2ae7056080e3f6c24cab34753ccd20 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Mon, 25 Jun 2018 18:06:55 -0500 Subject: [PATCH 373/488] Remove OR from ST endpoint activation When activating an endpoint assign new data rather than ORing data to it. This ensures that values set from the previous use do not effect the current configuration. --- .../TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c index c15db199e7e..5317615b256 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c @@ -430,7 +430,7 @@ HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTy if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0U) { - USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U ) |\ + USBx_INEP(ep->num)->DIEPCTL = ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U ) |\ ((ep->num) << 22U ) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP)); } @@ -441,7 +441,7 @@ HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTy if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0U) { - USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U ) |\ + USBx_OUTEP(ep->num)->DOEPCTL = ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U ) |\ (USB_OTG_DIEPCTL_SD0PID_SEVNFRM)| (USB_OTG_DOEPCTL_USBAEP)); } } @@ -462,7 +462,7 @@ HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB { if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0U) { - USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U) |\ + USBx_INEP(ep->num)->DIEPCTL = ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U) |\ ((ep->num) << 22U) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP)); } @@ -476,7 +476,7 @@ HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB { if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0U) { - USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U) |\ + USBx_OUTEP(ep->num)->DOEPCTL = ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U) |\ ((ep->num) << 22U) | (USB_OTG_DOEPCTL_USBAEP)); debug = (uint32_t)(((uint32_t )USBx) + USB_OTG_OUT_ENDPOINT_BASE + (0U)*USB_OTG_EP_REG_SIZE); From 77e2dae61269c31aaa561f204564c3b0d2e6f179 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Mon, 19 Mar 2018 16:41:55 +0100 Subject: [PATCH 374/488] USB: EndpointResolver: Add a generic method to get a free endpoint --- usb/device/USBDevice/EndpointResolver.cpp | 21 ++++++++------------- usb/device/USBDevice/EndpointResolver.h | 5 +++++ 2 files changed, 13 insertions(+), 13 deletions(-) diff --git a/usb/device/USBDevice/EndpointResolver.cpp b/usb/device/USBDevice/EndpointResolver.cpp index e06b8929600..05ced02866a 100644 --- a/usb/device/USBDevice/EndpointResolver.cpp +++ b/usb/device/USBDevice/EndpointResolver.cpp @@ -44,9 +44,9 @@ void EndpointResolver::endpoint_ctrl(uint32_t size) endpoint_out(USB_EP_TYPE_CTRL, size); } -usb_ep_t EndpointResolver::endpoint_in(usb_ep_type_t type, uint32_t size) +usb_ep_t EndpointResolver::next_free_endpoint(bool in_not_out, usb_ep_type_t type, uint32_t size) { - int index = next_index(type, true); + int index = next_index(type, in_not_out); if (index < 0) { _valid = false; return 0; @@ -57,21 +57,16 @@ usb_ep_t EndpointResolver::endpoint_in(usb_ep_type_t type, uint32_t size) _used |= 1 << index; return index_to_endpoint(index); + +} +usb_ep_t EndpointResolver::endpoint_in(usb_ep_type_t type, uint32_t size) +{ + return next_free_endpoint(true, type, size); } usb_ep_t EndpointResolver::endpoint_out(usb_ep_type_t type, uint32_t size) { - int index = next_index(type, false); - if (index < 0) { - _valid = false; - return 0; - } - - const usb_ep_entry_t &entry = _table->table[index_to_logical(index)]; - _cost += entry.base_cost + entry.byte_cost * size; - _used |= 1 << index; - - return index_to_endpoint(index); + return next_free_endpoint(false, type, size); } bool EndpointResolver::valid() diff --git a/usb/device/USBDevice/EndpointResolver.h b/usb/device/USBDevice/EndpointResolver.h index 04f7d188f8e..a0a9a93e8fc 100644 --- a/usb/device/USBDevice/EndpointResolver.h +++ b/usb/device/USBDevice/EndpointResolver.h @@ -62,6 +62,11 @@ class EndpointResolver { */ usb_ep_t endpoint_out(usb_ep_type_t type, uint32_t size); + /** + * Get next free endpoint + */ + usb_ep_t next_free_endpoint(bool in_not_out, usb_ep_type_t type, uint32_t size); + /** * Check if the endpoint configuration created so far is valid * From 0e228eb429510ca59942ecbb3d902d1faa0c8f8a Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Wed, 28 Mar 2018 11:35:37 +0200 Subject: [PATCH 375/488] Tests: USB: Generic: Add basic endpoint tests --- TESTS/host_tests/pyusb_basic.py | 428 ++++++++++- TESTS/usb_device/basic/USBEndpointTester.cpp | 767 +++++++++++++++++++ TESTS/usb_device/basic/USBEndpointTester.h | 108 +++ TESTS/usb_device/basic/main.cpp | 161 +++- 4 files changed, 1459 insertions(+), 5 deletions(-) create mode 100644 TESTS/usb_device/basic/USBEndpointTester.cpp create mode 100644 TESTS/usb_device/basic/USBEndpointTester.h diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index d9c9f2e0b00..4aba71bcb4d 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -21,7 +21,9 @@ import time import sys import inspect -from threading import Thread +from threading import Thread, Event, Timer +import array +import random import usb.core from usb.util import build_request_type @@ -33,7 +35,7 @@ DESC_TYPE_INTERFACE, DESC_TYPE_ENDPOINT) import struct -from collections import namedtuple + def get_interface(dev, interface, alternate=0): intf = None @@ -102,6 +104,12 @@ def get_interface(dev, interface, alternate=0): interface_descriptor_keys = ['bLength', 'bDescriptorType', 'bEndpointAddress', 'bmAttributes', 'wMaxPacketSize', 'bInterval'] +ENDPOINT_TYPE_NAMES = { + usb.ENDPOINT_TYPE_BULK: 'BULK', + usb.ENDPOINT_TYPE_CONTROL: 'CONTROL', + usb.ENDPOINT_TYPE_INTERRUPT: 'INTERRUPT', + usb.ENDPOINT_TYPE_ISOCHRONOUS: 'ISOCHRONOUS'} + class PyusbBasicTest(BaseHostTest): def _callback_control_basic_test(self, key, value, timestamp): @@ -162,7 +170,6 @@ def _callback_control_stress_test(self, key, value, timestamp): except (RuntimeError) as exc: self.report_error(exc) - def _callback_device_reset_test(self, key, value, timestamp): self.log("Received serial %s" % (value)) @@ -217,6 +224,71 @@ def _callback_repeated_construction_destruction_test(self, key, value, timestamp except (RuntimeError) as exc: self.report_error(exc) + def _callback_ep_test_data_correctness(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + ep_test_data_correctness(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + def _callback_ep_test_halt(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + ep_test_halt(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + def _callback_ep_test_parallel_transfers(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + ep_test_parallel_transfers(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + def _callback_ep_test_parallel_transfers_ctrl(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + ep_test_parallel_transfers_ctrl(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + + def _callback_ep_test_abort(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + ep_test_abort(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + def _callback_reset_support(self, key, value, timestamp): status = "false" if sys.platform == "darwin" else "true" self.log("Reset supported: %s" % status) @@ -267,6 +339,12 @@ def setup(self): self.register_callback('device_suspend_resume_test', self._callback_device_suspend_resume_test) self.register_callback('repeated_construction_destruction_test', self._callback_repeated_construction_destruction_test) + self.register_callback('ep_test_data_correctness', self._callback_ep_test_data_correctness) + self.register_callback('ep_test_halt', self._callback_ep_test_halt) + self.register_callback('ep_test_parallel_transfers', self._callback_ep_test_parallel_transfers) + self.register_callback('ep_test_parallel_transfers_ctrl', self._callback_ep_test_parallel_transfers_ctrl) + self.register_callback('ep_test_abort', self._callback_ep_test_abort) + self.register_callback('reset_support', self._callback_reset_support) @@ -837,6 +915,350 @@ def control_stress_test(dev, log): count += 1 +def find_ep_pair(intf, endpoint_type): + ep_out = usb.util.find_descriptor( + intf, custom_match=lambda e: + usb.util.endpoint_type(e.bmAttributes) == endpoint_type and + usb.util.endpoint_direction(e.bEndpointAddress) == usb.ENDPOINT_OUT) + ep_in = usb.util.find_descriptor( + intf, custom_match=lambda e: + usb.util.endpoint_type(e.bmAttributes) == endpoint_type and + usb.util.endpoint_direction(e.bEndpointAddress) == usb.ENDPOINT_IN) + if not all((ep_out, ep_in)): + raise_unconditionally(lineno(), 'Unable to find {} endpoint pair.' + .format(ENDPOINT_TYPE_NAMES[endpoint_type])) + raise_if_different(ep_out.wMaxPacketSize, ep_in.wMaxPacketSize, lineno(), + 'wMaxPacketSize not equal for OUT and IN {} endpoints.' + .format(ENDPOINT_TYPE_NAMES[endpoint_type])) + return ep_out, ep_in + + +def loopback_ep_test(ep_out, ep_in, payload_size): + payload_out = array.array('B', (random.randint(0x00, 0xff) for _ in range(payload_size))) + ep_out.write(payload_out) + payload_in = ep_in.read(ep_in.wMaxPacketSize) + raise_if_different(payload_out, payload_in, lineno(), 'Payloads mismatch.') + + +def random_size_loopback_ep_test(ep_out, ep_in, failure, error, seconds, log, min_payload_size=1): + end_ts = time.time() + seconds + while time.time() < end_ts and not failure.is_set() and not error.is_set(): + payload_size = random.randint(min_payload_size, ep_out.wMaxPacketSize) + try: + loopback_ep_test(ep_out, ep_in, payload_size) + except RuntimeError as err: + log(err) + failure.set() + return + except usb.USBError as err: + log(USB_ERROR_FMT.format(err, ep_out, ep_in, payload_size)) + error.set() + return + time.sleep(0.01) + + +def halt_ep_test(dev, ep_out, ep_in, ep_to_halt, log): + MIN_HALT_DELAY = 0.01 + MAX_HALT_DELAY = 0.1 + delay = random.uniform(MIN_HALT_DELAY, MAX_HALT_DELAY) + ctrl_kwargs = { + 'bmRequestType': build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, CTRL_RECIPIENT_ENDPOINT), + 'bRequest': REQUEST_SET_FEATURE, + 'wValue': FEATURE_ENDPOINT_HALT, + 'wIndex': ep_to_halt.bEndpointAddress} + ctrl_error = Event() + + def timer_handler(): + try: + dev.ctrl_transfer(**ctrl_kwargs) + except Exception as err: + log('Endpoint {:#04x} halt failed ({}).'.format(ctrl_kwargs['wIndex'], err)) + ctrl_error.set() + + delayed_halt = Timer(delay, timer_handler) + delayed_halt.start() + end_ts = time.time() + 1.5 * delay + try: + while time.time() < end_ts and not ctrl_error.is_set(): + loopback_ep_test(ep_out, ep_in, ep_out.wMaxPacketSize) + except usb.core.USBError as err: + if err.errno not in (32, 110): + raise_unconditionally(lineno(), 'Unexpected error ({!r}).'.format(err)) + if ctrl_error.is_set(): + raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x} failed' + .format(ep_to_halt)) + else: + raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x}' + ' during transmission did not raise USBError.' + .format(ep_to_halt)) + + +USB_ERROR_FMT = str('Got {0!r} while testing endpoints ' + '{1.bEndpointAddress:#04x}({1.wMaxPacketSize:02}) and ' + '{2.bEndpointAddress:#04x}({2.wMaxPacketSize:02}) with a random payload of {3} B.') + + +def ep_test_data_correctness(dev, log, verbose=False): + cfg = dev.get_active_configuration() + for intf in cfg: + log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') + if intf.bAlternateSetting == 0: + log('skipping the default AlternateSetting') + continue + log('running tests') + intf.set_altsetting() + + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + interrupt_out, interrupt_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_INTERRUPT) + iso_out, iso_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_ISOCHRONOUS) + + if verbose: + log('\tbulk_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_out)) + log('\tbulk_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_in)) + log('\tinterrupt_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_out)) + log('\tinterrupt_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_in)) + log('\tiso_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_out)) + log('\tiso_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_in)) + + if verbose: + log('Testing OUT/IN data correctness for bulk endpoint pair.') + for payload_size in range(1, bulk_out.wMaxPacketSize + 1): + try: + loopback_ep_test(bulk_out, bulk_in, payload_size) + except usb.USBError as err: + raise_unconditionally(lineno(), USB_ERROR_FMT.format(err, bulk_out, bulk_in, payload_size)) + + if verbose: + log('Testing OUT/IN data correctness for interrupt endpoint pair.') + for payload_size in range(interrupt_out.wMaxPacketSize + 1): + try: + loopback_ep_test(interrupt_out, interrupt_in, payload_size) + except usb.USBError as err: + raise_unconditionally(lineno(), USB_ERROR_FMT.format(err, interrupt_out, interrupt_in, payload_size)) + +# if verbose: +# log('Testing OUT/IN data correctness for isochronous endnpoint pair.') +# payload_size = 128 # range(1, iso_out.wMaxPacketSize + 1): +# try: +# loopback_ep_test(iso_out, iso_in, payload_size) +# except usb.USBError as err: +# log(err) +# raise_unconditionally(lineno(), USB_ERROR_FMT.format(err, iso_out, iso_in, payload_size)) + + +def ep_test_halt(dev, log, verbose=False): + cfg = dev.get_active_configuration() + for intf in cfg: + log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') + if intf.bAlternateSetting == 0: + log('skipping the default AlternateSetting') + continue + log('running tests') + intf.set_altsetting() + + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + interrupt_out, interrupt_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_INTERRUPT) + iso_out, iso_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_ISOCHRONOUS) + + if verbose: + log('\tbulk_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_out)) + log('\tbulk_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_in)) + log('\tinterrupt_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_out)) + log('\tinterrupt_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_in)) + log('\tiso_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_out)) + log('\tiso_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_in)) + + if verbose: + log('Testing endpoint halt at a random point of bulk transmission.') + end_ts = time.time() + 1.0 + while time.time() < end_ts: + halt_ep_test(dev, bulk_out, bulk_in, bulk_out, log) + bulk_out.clear_halt() + intf.set_altsetting() # Force the device to start reading data from all OUT endpoints again. + halt_ep_test(dev, bulk_out, bulk_in, bulk_in, log) + bulk_in.clear_halt() + intf.set_altsetting() # Force the device to start reading data from all OUT endpoints again. + + if verbose: + log('Testing endpoint halt at a random point of interrupt transmission.') + end_ts = time.time() + 1.0 + while time.time() < end_ts: + halt_ep_test(dev, interrupt_out, interrupt_in, interrupt_out, log) + interrupt_out.clear_halt() + intf.set_altsetting() # Force the device to start reading data from all OUT endpoints again. + halt_ep_test(dev, interrupt_out, interrupt_in, interrupt_in, log) + interrupt_out.clear_halt() + intf.set_altsetting() # Force the device to start reading data from all OUT endpoints again. + + +def ep_test_parallel_transfers(dev, log, verbose=False): + cfg = dev.get_active_configuration() + for intf in cfg: + log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') + if intf.bAlternateSetting == 0: + log('skipping the default AlternateSetting') + continue + log('running tests') + intf.set_altsetting() + + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + interrupt_out, interrupt_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_INTERRUPT) + iso_out, iso_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_ISOCHRONOUS) + + if verbose: + log('\tbulk_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_out)) + log('\tbulk_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_in)) + log('\tinterrupt_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_out)) + log('\tinterrupt_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_in)) + log('\tiso_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_out)) + log('\tiso_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_in)) + + if verbose: + log('Testing simultaneous transfers through bulk and interrupt endpoint pairs.') + test_error = Event() + test_failure = Event() + test_kwargs_bulk_ep = { + 'ep_out': bulk_out, + 'ep_in': bulk_in, + 'failure': test_failure, + 'error': test_error, + 'seconds': 1.0, + 'log': log} + test_kwargs_interrupt_ep = { + 'ep_out': interrupt_out, + 'ep_in': interrupt_in, + 'failure': test_failure, + 'error': test_error, + 'seconds': 1.0, + 'log': log} + ep_test_threads = [] + for kwargs in (test_kwargs_bulk_ep, test_kwargs_interrupt_ep): + ep_test_threads.append(Thread(target=random_size_loopback_ep_test, kwargs=kwargs)) + for t in ep_test_threads: + t.start() + for t in ep_test_threads: + t.join() + if test_failure.is_set(): + raise_unconditionally(lineno(), 'Payload mismatch') + if test_error.is_set(): + raise_unconditionally(lineno(), 'USBError') + + +def ep_test_parallel_transfers_ctrl(dev, log, verbose=False): + cfg = dev.get_active_configuration() + for intf in cfg: + log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') + if intf.bAlternateSetting == 0: + log('skipping the default AlternateSetting') + continue + log('running tests') + intf.set_altsetting() + + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + interrupt_out, interrupt_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_INTERRUPT) + iso_out, iso_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_ISOCHRONOUS) + + if verbose: + log('\tbulk_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_out)) + log('\tbulk_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_in)) + log('\tinterrupt_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_out)) + log('\tinterrupt_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_in)) + log('\tiso_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_out)) + log('\tiso_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_in)) + + if verbose: + log('Testing parallel data transfers through bulk, interrupt & control endpoint pairs.') + test_error = Event() + test_failure = Event() + test_kwargs_bulk_ep = { + 'ep_out': bulk_out, + 'ep_in': bulk_in, + 'failure': test_failure, + 'error': test_error, + 'seconds': 1.0, + 'log': log} + test_kwargs_interrupt_ep = { + 'ep_out': interrupt_out, + 'ep_in': interrupt_in, + 'failure': test_failure, + 'error': test_error, + 'seconds': 1.0, + 'log': log} + ep_test_threads = [] + for kwargs in (test_kwargs_bulk_ep, test_kwargs_interrupt_ep): + ep_test_threads.append(Thread(target=random_size_loopback_ep_test, kwargs=kwargs)) + for t in ep_test_threads: + t.start() + while any(t.is_alive() for t in ep_test_threads): + control_stress_test(dev, log) + control_sizes_test(dev, log) + for t in ep_test_threads: + t.join() + if test_failure.is_set(): + raise_unconditionally(lineno(), 'Payload mismatch') + if test_error.is_set(): + raise_unconditionally(lineno(), 'USBError') + + +def ep_test_abort(dev, log, verbose=False): + NUM_PACKETS_UNTIL_ABORT = 2 + NUM_PACKETS_AFTER_ABORT = 8 + cfg = dev.get_active_configuration() + for intf in cfg: + log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') + if intf.bAlternateSetting == 0: + log('skipping the default AlternateSetting') + continue + log('running tests') + intf.set_altsetting() + + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + interrupt_out, interrupt_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_INTERRUPT) + + if verbose: + log('\tbulk_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_out)) + log('\tbulk_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_in)) + log('\tinterrupt_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_out)) + log('\tinterrupt_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_in)) + + if verbose: + log('Testing aborting an in progress transfer for IN endpoints.') + for ep_in in (bulk_in, interrupt_in): + payload_size = (NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) * ep_in.wMaxPacketSize + payload_in = ep_in.read(payload_size) + if verbose: + log('The size of data successfully received from endpoint {0.bEndpointAddress:#04x}: {1} B.' + .format(ep_in, len(payload_in))) + too_little = bool(len(payload_in) < (NUM_PACKETS_UNTIL_ABORT * ep_in.wMaxPacketSize)) + too_much = bool(len(payload_in) >= payload_size) + if too_little or too_much: + raise_unconditionally( + lineno(), 'Invalid size of data successfully received from endpoint ' + '{0.bEndpointAddress:#04x} before aborting the transfer. ' + 'Value {1} B out of range [{2}, {3}).' + .format(ep_in, len(payload_in), + NUM_PACKETS_UNTIL_ABORT * ep_in.wMaxPacketSize, payload_size)) + + if verbose: + log('Testing aborting an in progress transfer for OUT endpoints.') + for ep_out in (bulk_out, interrupt_out): + payload_size = (NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) * ep_out.wMaxPacketSize + payload_out = array.array('B', (0x01 for _ in range(payload_size))) + num_bytes_written = ep_out.write(payload_out) + if verbose: + log('The size of data successfully sent to endpoint {0.bEndpointAddress:#04x}: {1} B.' + .format(ep_out, num_bytes_written)) + too_little = bool(num_bytes_written < (NUM_PACKETS_UNTIL_ABORT * ep_out.wMaxPacketSize)) + too_much = bool(num_bytes_written >= payload_size) + if too_little or too_much: + raise_unconditionally( + lineno(), 'Invalid size of data successfully sent to endpoint ' + '{0.bEndpointAddress:#04x} before aborting the transfer. ' + 'Value {1} B out of range [{2}, {3}).' + .format(ep_out, num_bytes_written, + NUM_PACKETS_UNTIL_ABORT * ep_out.wMaxPacketSize, payload_size)) + + def device_reset_test(log): """ Test USB implementation against repeated reset diff --git a/TESTS/usb_device/basic/USBEndpointTester.cpp b/TESTS/usb_device/basic/USBEndpointTester.cpp new file mode 100644 index 00000000000..c8798ee7ee2 --- /dev/null +++ b/TESTS/usb_device/basic/USBEndpointTester.cpp @@ -0,0 +1,767 @@ +/* + * Copyright (c) 2018-2018, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "stdint.h" +#include "USBEndpointTester.h" +#include "mbed_shared_queues.h" +#include "EndpointResolver.h" + +#define DEFAULT_CONFIGURATION (1) + +#define NUM_PACKETS_UNTIL_ABORT 2 +#define NUM_PACKETS_AFTER_ABORT 8 + +#define VENDOR_TEST_CTRL_IN 1 +#define VENDOR_TEST_CTRL_OUT 2 +#define VENDOR_TEST_CTRL_IN_SIZES 9 +#define VENDOR_TEST_CTRL_OUT_SIZES 10 + +#define EVENT_READY (1 << 0) + +#define TEST_SIZE_EP_BULK_MAX (64) +#define TEST_SIZE_EP_BULK_MIN (8) +#define TEST_SIZE_EP_BULK_0 (16) +#define TEST_SIZE_EP_BULK_1 TEST_SIZE_EP_BULK_MAX +#define TEST_SIZE_EP_BULK_2 (32) +#define TEST_SIZE_EP_BULK_3 (16) +#define TEST_SIZE_EP_BULK_4 TEST_SIZE_EP_BULK_MIN + +#define TEST_SIZE_EP_INT_MAX (64) +#define TEST_SIZE_EP_INT_MIN (1) +#define TEST_SIZE_EP_INT_0 (16) +#define TEST_SIZE_EP_INT_1 TEST_SIZE_EP_INT_MAX +#define TEST_SIZE_EP_INT_2 (32) +#define TEST_SIZE_EP_INT_3 (16) +#define TEST_SIZE_EP_INT_4 TEST_SIZE_EP_INT_MIN + +#define TEST_SIZE_EP_ISO_MAX (1023) +#define TEST_SIZE_EP_ISO_MIN (1) +#define TEST_SIZE_EP_ISO_0 (0) +#define TEST_SIZE_EP_ISO_1 (0) +#define TEST_SIZE_EP_ISO_2 (0) +#define TEST_SIZE_EP_ISO_3 (0) +#define TEST_SIZE_EP_ISO_4 (0) + +#define EP_BULK_OUT 0 +#define EP_BULK_IN 1 +#define EP_INT_OUT 2 +#define EP_INT_IN 3 +#define EP_ISO_OUT 4 +#define EP_ISO_IN 5 + +USBEndpointTester::ep_config_t USBEndpointTester::_intf_config_max[NUM_ENDPOINTS] = { + { false, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_MAX, static_cast(&USBEndpointTester::_cb_bulk_out) }, + { true, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_MAX, static_cast(&USBEndpointTester::_cb_bulk_in) }, + { false, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_MAX, static_cast(&USBEndpointTester::_cb_int_out) }, + { true, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_MAX, static_cast(&USBEndpointTester::_cb_int_in) }, + { false, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_MAX, static_cast(&USBEndpointTester::_cb_iso_out) }, + { true, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_MAX, static_cast(&USBEndpointTester::_cb_iso_in) }, +}; + +USBEndpointTester::ep_config_t USBEndpointTester::_intf_config0[NUM_ENDPOINTS] = { + { false, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_0, NULL }, + { true, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_0, NULL }, + { false, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_0, NULL }, + { true, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_0, NULL }, + { false, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_0, NULL }, + { true, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_0, NULL }, +}; + +USBEndpointTester::ep_config_t USBEndpointTester::_intf_config1[NUM_ENDPOINTS] = { + { false, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_1, static_cast(&USBEndpointTester::_cb_bulk_out) }, + { true, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_1, static_cast(&USBEndpointTester::_cb_bulk_in) }, + { false, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_1, static_cast(&USBEndpointTester::_cb_int_out) }, + { true, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_1, static_cast(&USBEndpointTester::_cb_int_in) }, + { false, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_1, static_cast(&USBEndpointTester::_cb_iso_out) }, + { true, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_1, static_cast(&USBEndpointTester::_cb_iso_in) }, +}; + +USBEndpointTester::ep_config_t USBEndpointTester::_intf_config2[NUM_ENDPOINTS] = { + { false, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_2, static_cast(&USBEndpointTester::_cb_bulk_out) }, + { true, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_2, static_cast(&USBEndpointTester::_cb_bulk_in) }, + { false, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_2, static_cast(&USBEndpointTester::_cb_int_out) }, + { true, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_2, static_cast(&USBEndpointTester::_cb_int_in) }, + { false, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_2, static_cast(&USBEndpointTester::_cb_iso_out) }, + { true, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_2, static_cast(&USBEndpointTester::_cb_iso_in) }, +}; + +USBEndpointTester::ep_config_t USBEndpointTester::_intf_config3[NUM_ENDPOINTS] = { + { false, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_3, static_cast(&USBEndpointTester::_cb_bulk_out) }, + { true, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_3, static_cast(&USBEndpointTester::_cb_bulk_in) }, + { false, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_3, static_cast(&USBEndpointTester::_cb_int_out) }, + { true, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_3, static_cast(&USBEndpointTester::_cb_int_in) }, + { false, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_3, static_cast(&USBEndpointTester::_cb_iso_out) }, + { true, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_3, static_cast(&USBEndpointTester::_cb_iso_in) }, +}; + +USBEndpointTester::ep_config_t USBEndpointTester::_intf_config4[NUM_ENDPOINTS] = { + { false, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_4, static_cast(&USBEndpointTester::_cb_bulk_out) }, + { true, USB_EP_TYPE_BULK, TEST_SIZE_EP_BULK_4, static_cast(&USBEndpointTester::_cb_bulk_in) }, + { false, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_4, static_cast(&USBEndpointTester::_cb_int_out) }, + { true, USB_EP_TYPE_INT, TEST_SIZE_EP_INT_4, static_cast(&USBEndpointTester::_cb_int_in) }, + { false, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_4, static_cast(&USBEndpointTester::_cb_iso_out) }, + { true, USB_EP_TYPE_ISO, TEST_SIZE_EP_ISO_4, static_cast(&USBEndpointTester::_cb_iso_in) }, +}; + +USBEndpointTester::USBEndpointTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, + bool abort_transfer_test) : + USBDevice(phy, vendor_id, product_id, product_release), _abort_transfer_test(abort_transfer_test), _endpoint_configs( + &_intf_config_max) +{ + _cnt_cb_set_conf = 0; + _cnt_cb_set_intf = 0; + _cnt_cb_bulk_out = 0; + _cnt_cb_bulk_in = 0; + _cnt_cb_int_out = 0; + _cnt_cb_int_in = 0; + _cnt_cb_iso_out = 0; + _cnt_cb_iso_in = 0; + + EndpointResolver resolver(endpoint_table()); + resolver.endpoint_ctrl(64); + ep_config_t *epc = NULL; + for (size_t i = 0; i < NUM_ENDPOINTS; i++) { + epc = &((*_endpoint_configs)[i]); + _endpoints[i] = resolver.next_free_endpoint(epc->dir_in, epc->type, epc->max_packet); + _endpoint_buffs[i] = (uint8_t *) calloc(epc->max_packet, sizeof(uint8_t)); + MBED_ASSERT(_endpoint_buffs[i] != NULL); + } + MBED_ASSERT(resolver.valid()); + + queue = mbed_highprio_event_queue(); + configuration_desc(0); + init(); + USBDevice::connect(); + flags.wait_any(EVENT_READY, osWaitForever, false); + +} + +USBEndpointTester::~USBEndpointTester() +{ + for (size_t i = 0; i < NUM_ENDPOINTS; i++) { + if (_endpoint_buffs[i] != NULL) { + free(_endpoint_buffs[i]); + } + } + deinit(); +} + +const char *USBEndpointTester::get_desc_string(const uint8_t *desc) +{ + static char ret_string[128] = { }; + const uint8_t desc_size = desc[0] - 2; + const uint8_t *desc_str = &desc[2]; + uint32_t j = 0; + for (uint32_t i = 0; i < desc_size; i += 2, j++) { + ret_string[j] = desc_str[i]; + } + ret_string[j] = '\0'; + return ret_string; +} + +const char *USBEndpointTester::get_serial_desc_string() +{ + return get_desc_string(string_iserial_desc()); +} + +void USBEndpointTester::callback_state_change(DeviceState new_state) +{ + if (new_state == Configured) { + flags.set(EVENT_READY); + } else { + flags.clear(EVENT_READY); + } +} + +void USBEndpointTester::callback_request(const setup_packet_t *setup) +{ + /* Called in ISR context */ + RequestResult result = PassThrough; + uint8_t *data = NULL; + uint32_t size = 0; + + /* Process vendor-specific requests */ + if (setup->bmRequestType.Type == VENDOR_TYPE) { + switch (setup->bRequest) { + case VENDOR_TEST_CTRL_IN: + result = Send; + data = ctrl_buf; + size = setup->wValue < sizeof(ctrl_buf) ? setup->wValue : sizeof(ctrl_buf); + break; + case VENDOR_TEST_CTRL_OUT: + result = Receive; + data = ctrl_buf; + size = setup->wValue < 8 ? setup->wValue : 8; + break; + case VENDOR_TEST_CTRL_IN_SIZES: + result = Send; + data = ctrl_buf; + size = setup->wLength; + break; + case VENDOR_TEST_CTRL_OUT_SIZES: + result = Receive; + data = ctrl_buf; + size = setup->wValue; + break; + default: + result = PassThrough; + break; + } + } + complete_request(result, data, size); +} + +void USBEndpointTester::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) +{ + if (aborted) { + complete_request_xfer_done(false); + return; + } + + bool result = false; + if (setup->bmRequestType.Type == VENDOR_TYPE) { + switch (setup->bRequest) { + case VENDOR_TEST_CTRL_IN: + result = true; + break; + case VENDOR_TEST_CTRL_OUT: + result = true; + break; + case VENDOR_TEST_CTRL_OUT_SIZES: + result = true; + break; + case VENDOR_TEST_CTRL_IN_SIZES: + result = true; + break; + default: + result = false; + break; + } + } + complete_request_xfer_done(result); +} + +void USBEndpointTester::callback_set_configuration(uint8_t configuration) +{ + _cnt_cb_set_conf++; + if (configuration != DEFAULT_CONFIGURATION) { + complete_set_configuration(false); + return; + } + + // Configure endpoints > 0 + bool status = _setup_interface(0, 0); + complete_set_configuration(status); +} + +bool USBEndpointTester::_setup_interface(uint16_t interface, uint8_t alternate) +{ + if (interface != 0) { + return false; + } + + switch (alternate) { + case 0: + _endpoint_configs = &_intf_config0; + break; + case 1: + _endpoint_configs = &_intf_config1; + break; + case 2: + _endpoint_configs = &_intf_config2; + break; + case 3: + _endpoint_configs = &_intf_config3; + break; + case 4: + _endpoint_configs = &_intf_config4; + break; + default: + return false; + } + + _setup_non_zero_endpoints(); + + if (_abort_transfer_test && alternate >= 1) { + _cnt_cb_bulk_out_abort = _cnt_cb_bulk_out; + _cnt_cb_bulk_in_abort = _cnt_cb_bulk_in; + _cnt_cb_int_out_abort = _cnt_cb_int_out; + _cnt_cb_int_in_abort = _cnt_cb_int_in; + start_ep_in_abort_test(); + } + return true; +} + +void USBEndpointTester::_setup_non_zero_endpoints() +{ + ep_config_t *epc = NULL; + for (size_t i = 0; i < NUM_ENDPOINTS; i++) { + epc = &((*_endpoint_configs)[i]); + endpoint_add(_endpoints[i], epc->max_packet, epc->type, epc->callback); + if (epc->callback == NULL) { + continue; + } + if (epc->dir_in == true) { +// write_start(_endpoints[i], _endpoint_buffs[i], epc->max_packet); + } else { + read_start(_endpoints[i], _endpoint_buffs[i], epc->max_packet); + } + } +} + +void USBEndpointTester::callback_set_interface(uint16_t interface, uint8_t alternate) +{ + _cnt_cb_set_intf++; + if (interface != 0 || alternate > 4) { + complete_set_interface(false); + return; + } + for (size_t i = 0; i < NUM_ENDPOINTS; i++) { + endpoint_abort(_endpoints[i]); + endpoint_remove(_endpoints[i]); + } + bool status = _setup_interface(interface, alternate); + complete_set_interface(status); +} + +#define CONFIG1_DESC_SIZE (CONFIGURATION_DESCRIPTOR_LENGTH \ + + 5 * (INTERFACE_DESCRIPTOR_LENGTH + NUM_ENDPOINTS * ENDPOINT_DESCRIPTOR_LENGTH) ) + +const uint8_t *USBEndpointTester::configuration_desc(uint8_t index) +{ + static const uint8_t config_1_descriptor[] = { + // configuration descriptor + CONFIGURATION_DESCRIPTOR_LENGTH, // bLength + CONFIGURATION_DESCRIPTOR, // bDescriptorType + LSB(CONFIG1_DESC_SIZE), // wTotalLength (LSB) + MSB(CONFIG1_DESC_SIZE), // wTotalLength (MSB) + 1, // bNumInterfaces + 1, // bConfigurationValue + 0, // iConfiguration + 0x80, // bmAttributes + 50, // bMaxPower + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0, // bInterfaceNumber + 0, // bAlternateSetting + NUM_ENDPOINTS, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_OUT], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config0[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config0[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_IN], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config0[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config0[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_OUT], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config0[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config0[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_IN], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config0[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config0[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_OUT], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config0[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config0[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_IN], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config0[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config0[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0, // bInterfaceNumber + 1, // bAlternateSetting + NUM_ENDPOINTS, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_OUT], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config1[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config1[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_IN], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config1[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config1[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_OUT], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config1[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config1[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_IN], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config1[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config1[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_OUT], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config1[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config1[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_IN], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config1[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config1[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0, // bInterfaceNumber + 2, // bAlternateSetting + NUM_ENDPOINTS, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_OUT], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config2[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config2[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_IN], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config2[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config2[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_OUT], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config2[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config2[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_IN], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config2[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config2[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_OUT], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config2[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config2[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_IN], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config2[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config2[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0, // bInterfaceNumber + 3, // bAlternateSetting + NUM_ENDPOINTS, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_OUT], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config3[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config3[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_IN], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config3[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config3[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_OUT], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config3[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config3[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_IN], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config3[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config3[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_OUT], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config3[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config3[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_IN], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config3[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config3[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + + // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 + INTERFACE_DESCRIPTOR_LENGTH,// bLength + INTERFACE_DESCRIPTOR, // bDescriptorType + 0, // bInterfaceNumber + 4, // bAlternateSetting + NUM_ENDPOINTS, // bNumEndpoints + 0xFF, // bInterfaceClass + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol + 0, // iInterface + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_OUT], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config4[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config4[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_BULK_IN], // bEndpointAddress + E_BULK, // bmAttributes + (uint8_t) (LSB(_intf_config4[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config4[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) + 0, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_OUT], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config4[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config4[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_INT_IN], // bEndpointAddress + E_INTERRUPT, // bmAttributes + (uint8_t) (LSB(_intf_config4[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config4[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_OUT], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config4[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config4[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 + ENDPOINT_DESCRIPTOR_LENGTH, // bLength + ENDPOINT_DESCRIPTOR, // bDescriptorType + _endpoints[EP_ISO_IN], // bEndpointAddress + E_ISOCHRONOUS, // bmAttributes + (uint8_t) (LSB(_intf_config4[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t) (MSB(_intf_config4[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) + 1, // bInterval + }; + if (index == 0) { + return config_1_descriptor; + } else { + return NULL; + } +} + +void USBEndpointTester::_cb_bulk_out(usb_ep_t endpoint) +{ + _cnt_cb_bulk_out++; + uint32_t rx_size = read_finish(endpoint); + + if (_abort_transfer_test == false) { + // Send data back to host using the IN endpoint. + memset(_endpoint_buffs[EP_BULK_IN], 0, (*_endpoint_configs)[EP_BULK_IN].max_packet); + memcpy(_endpoint_buffs[EP_BULK_IN], _endpoint_buffs[EP_BULK_OUT], rx_size); + write_start(_endpoints[EP_BULK_IN], _endpoint_buffs[EP_BULK_IN], rx_size); + } else { + // Abort the transfer if enough data was received. + uint32_t num_packets_received = _cnt_cb_bulk_out - _cnt_cb_bulk_out_abort; + read_start(_endpoints[EP_BULK_OUT], _endpoint_buffs[EP_BULK_OUT], (*_endpoint_configs)[EP_BULK_OUT].max_packet); + if (num_packets_received >= NUM_PACKETS_UNTIL_ABORT) { + endpoint_abort(endpoint); + } + } +} + +void USBEndpointTester::_cb_bulk_in(usb_ep_t endpoint) +{ + _cnt_cb_bulk_in++; + write_finish(endpoint); + + if (_abort_transfer_test == false) { + // Receive more data from the host using the OUT endpoint. + read_start(_endpoints[EP_BULK_OUT], _endpoint_buffs[EP_BULK_OUT], (*_endpoint_configs)[EP_BULK_OUT].max_packet); + } else { + uint32_t num_packets_sent = _cnt_cb_bulk_in - _cnt_cb_bulk_in_abort; + if (num_packets_sent >= NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) { + return; + } + // Abort the transfer if enough data was sent. + memset(_endpoint_buffs[EP_BULK_IN], num_packets_sent, (*_endpoint_configs)[EP_BULK_IN].max_packet); + write_start(_endpoints[EP_BULK_IN], _endpoint_buffs[EP_BULK_IN], (*_endpoint_configs)[EP_BULK_IN].max_packet); + if (num_packets_sent >= NUM_PACKETS_UNTIL_ABORT) { + endpoint_abort(endpoint); + } + } +} + +void USBEndpointTester::_cb_int_out(usb_ep_t endpoint) +{ + _cnt_cb_int_out++; + uint32_t rx_size = read_finish(endpoint); + if (_abort_transfer_test == false) { + // Send data back to host using the IN endpoint. + memset(_endpoint_buffs[EP_INT_IN], 0, (*_endpoint_configs)[EP_INT_IN].max_packet); + memcpy(_endpoint_buffs[EP_INT_IN], _endpoint_buffs[EP_INT_OUT], rx_size); + write_start(_endpoints[EP_INT_IN], _endpoint_buffs[EP_INT_IN], rx_size); + } else { + // Abort the transfer if enough data was received. + uint32_t num_packets_received = _cnt_cb_int_out - _cnt_cb_int_out_abort; + read_start(_endpoints[EP_INT_OUT], _endpoint_buffs[EP_INT_OUT], (*_endpoint_configs)[EP_INT_OUT].max_packet); + if (num_packets_received >= NUM_PACKETS_UNTIL_ABORT) { + endpoint_abort(endpoint); + } + } +} + +void USBEndpointTester::_cb_int_in(usb_ep_t endpoint) +{ + _cnt_cb_int_in++; + write_finish(endpoint); + if (_abort_transfer_test == false) { + // Receive more data from the host using the OUT endpoint. + read_start(_endpoints[EP_INT_OUT], _endpoint_buffs[EP_INT_OUT], (*_endpoint_configs)[EP_INT_OUT].max_packet); + } else { + uint32_t num_packets_sent = _cnt_cb_int_in - _cnt_cb_int_in_abort; + if (num_packets_sent >= NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) { + return; + } + // Abort the transfer if enough data was sent. + memset(_endpoint_buffs[EP_INT_IN], num_packets_sent, (*_endpoint_configs)[EP_INT_IN].max_packet); + write_start(_endpoints[EP_INT_IN], _endpoint_buffs[EP_INT_IN], (*_endpoint_configs)[EP_INT_IN].max_packet); + if (num_packets_sent >= NUM_PACKETS_UNTIL_ABORT) { + endpoint_abort(endpoint); + } + } +} + +void USBEndpointTester::_cb_iso_out(usb_ep_t endpoint) +{ + _cnt_cb_iso_out++; + uint32_t rx_size = read_finish(endpoint); + // Send data back to host using the IN endpoint. + memset(_endpoint_buffs[EP_ISO_IN], 0, (*_endpoint_configs)[EP_ISO_IN].max_packet); + memcpy(_endpoint_buffs[EP_ISO_IN], _endpoint_buffs[EP_ISO_OUT], rx_size); + write_start(_endpoints[EP_ISO_IN], _endpoint_buffs[EP_ISO_IN], rx_size); +} + +void USBEndpointTester::_cb_iso_in(usb_ep_t endpoint) +{ + _cnt_cb_iso_in++; + write_finish(endpoint); + // Receive more data from the host using the OUT endpoint. + read_start(_endpoints[EP_ISO_OUT], _endpoint_buffs[EP_ISO_OUT], (*_endpoint_configs)[EP_ISO_OUT].max_packet); +} + +void USBEndpointTester::start_ep_in_abort_test() +{ + memset(_endpoint_buffs[EP_BULK_IN], 0, (*_endpoint_configs)[EP_BULK_IN].max_packet); + memset(_endpoint_buffs[EP_INT_IN], 0, (*_endpoint_configs)[EP_INT_IN].max_packet); + + write_start(_endpoints[EP_BULK_IN], _endpoint_buffs[EP_BULK_IN], (*_endpoint_configs)[EP_BULK_IN].max_packet); + write_start(_endpoints[EP_INT_IN], _endpoint_buffs[EP_INT_IN], (*_endpoint_configs)[EP_INT_IN].max_packet); +} diff --git a/TESTS/usb_device/basic/USBEndpointTester.h b/TESTS/usb_device/basic/USBEndpointTester.h new file mode 100644 index 00000000000..a921526b49f --- /dev/null +++ b/TESTS/usb_device/basic/USBEndpointTester.h @@ -0,0 +1,108 @@ +/* + * Copyright (c) 2018-2018, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USB_ENDPOINT_TESTER_H +#define USB_ENDPOINT_TESTER_H + +/* These headers are included for child class. */ +#include "USBDescriptor.h" +#include "USBDevice_Types.h" +#include "EventQueue.h" +#include "EventFlags.h" + +#include "USBDevice.h" + +#define NUM_ENDPOINTS 6 // Not including CTRL OUT/IN + +class USBEndpointTester: public USBDevice { + +public: + USBEndpointTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, + bool abort_transfer_test); + ~USBEndpointTester(); + const char *get_serial_desc_string(); + void start_ep_in_abort_test(); + + uint32_t get_cnt_cb_set_conf() const { return _cnt_cb_set_conf; } + uint32_t get_cnt_cb_set_intf() const { return _cnt_cb_set_intf; } + uint32_t get_cnt_cb_bulk_out() const { return _cnt_cb_bulk_out; } + uint32_t get_cnt_cb_bulk_in() const { return _cnt_cb_bulk_in; } + uint32_t get_cnt_cb_int_out() const { return _cnt_cb_int_out; } + uint32_t get_cnt_cb_int_in() const { return _cnt_cb_int_in; } + uint32_t get_cnt_cb_iso_out() const { return _cnt_cb_iso_out; } + uint32_t get_cnt_cb_iso_in() const { return _cnt_cb_iso_in; } + + struct ep_config_t { + bool dir_in; + usb_ep_type_t type; + uint32_t max_packet; + ep_cb_t callback; + }; + +protected: + EventQueue *queue; + rtos::EventFlags flags; + uint8_t ctrl_buf[2048]; + + bool _abort_transfer_test; + usb_ep_t _endpoints[NUM_ENDPOINTS]; + uint8_t *_endpoint_buffs[NUM_ENDPOINTS]; + ep_config_t (*_endpoint_configs)[NUM_ENDPOINTS]; + + static ep_config_t _intf_config_max[NUM_ENDPOINTS]; + static ep_config_t _intf_config0[NUM_ENDPOINTS]; + static ep_config_t _intf_config1[NUM_ENDPOINTS]; + static ep_config_t _intf_config2[NUM_ENDPOINTS]; + static ep_config_t _intf_config3[NUM_ENDPOINTS]; + static ep_config_t _intf_config4[NUM_ENDPOINTS]; + + volatile uint32_t _cnt_cb_set_conf; + volatile uint32_t _cnt_cb_set_intf; + volatile uint32_t _cnt_cb_bulk_out; + volatile uint32_t _cnt_cb_bulk_in; + volatile uint32_t _cnt_cb_int_out; + volatile uint32_t _cnt_cb_int_in; + volatile uint32_t _cnt_cb_iso_out; + volatile uint32_t _cnt_cb_iso_in; + + volatile uint32_t _cnt_cb_bulk_out_abort; + volatile uint32_t _cnt_cb_bulk_in_abort; + volatile uint32_t _cnt_cb_int_out_abort; + volatile uint32_t _cnt_cb_int_in_abort; + + virtual const uint8_t *configuration_desc(uint8_t index); + virtual void callback_state_change(DeviceState new_state); + virtual void callback_request(const setup_packet_t *setup); + virtual void callback_request_xfer_done(const setup_packet_t *setup, bool aborted); + virtual void callback_set_configuration(uint8_t configuration); + virtual void callback_set_interface(uint16_t interface, uint8_t alternate); + + void _setup_non_zero_endpoints(); + bool _setup_interface(uint16_t interface, uint8_t alternate); + + virtual void _cb_bulk_out(usb_ep_t endpoint); + virtual void _cb_bulk_in(usb_ep_t endpoint); + virtual void _cb_int_out(usb_ep_t endpoint); + virtual void _cb_int_in(usb_ep_t endpoint); + virtual void _cb_iso_out(usb_ep_t endpoint); + virtual void _cb_iso_in(usb_ep_t endpoint); + +private: + const char *get_desc_string(const uint8_t *desc); +}; + +#endif diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index deb45ba6431..ae7a038bebc 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -22,6 +22,7 @@ #include "utest/utest.h" #include "USBTester.h" +#include "USBEndpointTester.h" #include "usb_phy_api.h" // TODO @@ -44,6 +45,9 @@ using namespace utest::v1; +// Print callback counters for endpoint tests +#define EP_DBG 0 + static USBPhy *get_phy() { return get_usb_phy(); @@ -196,6 +200,154 @@ void control_stress_test() } } +void ep_test_data_correctness() +{ + uint16_t vendor_id = 0x0d28; + // Use a product ID different than that used in other tests, + // to help Windows hosts use the correct configuration descriptor. + uint16_t product_id = 0x0206; + uint16_t product_release = 0x0001; + char _key[11] = { }; + char _value[128] = { }; + + { + USBEndpointTester serial(get_phy(), vendor_id, product_id, product_release, false); + greentea_send_kv("ep_test_data_correctness", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); +#if EP_DBG + wait_ms(100); + printf("cnt_cb_set_conf = %lu\r\n", serial.get_cnt_cb_set_conf()); + printf("cnt_cb_set_intf = %lu\r\n", serial.get_cnt_cb_set_intf()); + printf("cnt_cb_bulk_out = %lu\r\n", serial.get_cnt_cb_bulk_out()); + printf("cnt_cb_bulk_in = %lu\r\n", serial.get_cnt_cb_bulk_in()); + printf("cnt_cb_int_out = %lu\r\n", serial.get_cnt_cb_int_out()); + printf("cnt_cb_int_in = %lu\r\n", serial.get_cnt_cb_int_in()); + printf("cnt_cb_iso_out = %lu\r\n", serial.get_cnt_cb_iso_out()); + printf("cnt_cb_iso_in = %lu\r\n", serial.get_cnt_cb_iso_in()); +#endif + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + +void ep_test_halt() +{ + uint16_t vendor_id = 0x0d28; + // Use a product ID different than that used in other tests, + // to help Windows hosts use the correct configuration descriptor. + uint16_t product_id = 0x0206; + uint16_t product_release = 0x0001; + char _key[11] = { }; + char _value[128] = { }; + + { + USBEndpointTester serial(get_phy(), vendor_id, product_id, product_release, false); + greentea_send_kv("ep_test_halt", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); +#if EP_DBG + wait_ms(100); + printf("cnt_cb_set_conf = %lu\r\n", serial.get_cnt_cb_set_conf()); + printf("cnt_cb_set_intf = %lu\r\n", serial.get_cnt_cb_set_intf()); + printf("cnt_cb_bulk_out = %lu\r\n", serial.get_cnt_cb_bulk_out()); + printf("cnt_cb_bulk_in = %lu\r\n", serial.get_cnt_cb_bulk_in()); + printf("cnt_cb_int_out = %lu\r\n", serial.get_cnt_cb_int_out()); + printf("cnt_cb_int_in = %lu\r\n", serial.get_cnt_cb_int_in()); + printf("cnt_cb_iso_out = %lu\r\n", serial.get_cnt_cb_iso_out()); + printf("cnt_cb_iso_in = %lu\r\n", serial.get_cnt_cb_iso_in()); +#endif + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + +void ep_test_parallel_transfers() +{ + uint16_t vendor_id = 0x0d28; + // Use a product ID different than that used in other tests, + // to help Windows hosts use the correct configuration descriptor. + uint16_t product_id = 0x0206; + uint16_t product_release = 0x0001; + char _key[11] = { }; + char _value[128] = { }; + + { + USBEndpointTester serial(get_phy(), vendor_id, product_id, product_release, false); + greentea_send_kv("ep_test_parallel_transfers", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); +#if EP_DBG + wait_ms(100); + printf("cnt_cb_set_conf = %lu\r\n", serial.get_cnt_cb_set_conf()); + printf("cnt_cb_set_intf = %lu\r\n", serial.get_cnt_cb_set_intf()); + printf("cnt_cb_bulk_out = %lu\r\n", serial.get_cnt_cb_bulk_out()); + printf("cnt_cb_bulk_in = %lu\r\n", serial.get_cnt_cb_bulk_in()); + printf("cnt_cb_int_out = %lu\r\n", serial.get_cnt_cb_int_out()); + printf("cnt_cb_int_in = %lu\r\n", serial.get_cnt_cb_int_in()); + printf("cnt_cb_iso_out = %lu\r\n", serial.get_cnt_cb_iso_out()); + printf("cnt_cb_iso_in = %lu\r\n", serial.get_cnt_cb_iso_in()); +#endif + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + +void ep_test_parallel_transfers_ctrl() +{ + uint16_t vendor_id = 0x0d28; + // Use a product ID different than that used in other tests, + // to help Windows hosts use the correct configuration descriptor. + uint16_t product_id = 0x0206; + uint16_t product_release = 0x0001; + char _key[11] = { }; + char _value[128] = { }; + + { + USBEndpointTester serial(get_phy(), vendor_id, product_id, product_release, false); + greentea_send_kv("ep_test_parallel_transfers_ctrl", serial.get_serial_desc_string()); + // Wait for host before terminating + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); +#if EP_DBG + wait_ms(100); + printf("cnt_cb_set_conf = %lu\r\n", serial.get_cnt_cb_set_conf()); + printf("cnt_cb_set_intf = %lu\r\n", serial.get_cnt_cb_set_intf()); + printf("cnt_cb_bulk_out = %lu\r\n", serial.get_cnt_cb_bulk_out()); + printf("cnt_cb_bulk_in = %lu\r\n", serial.get_cnt_cb_bulk_in()); + printf("cnt_cb_int_out = %lu\r\n", serial.get_cnt_cb_int_out()); + printf("cnt_cb_int_in = %lu\r\n", serial.get_cnt_cb_int_in()); + printf("cnt_cb_iso_out = %lu\r\n", serial.get_cnt_cb_iso_out()); + printf("cnt_cb_iso_in = %lu\r\n", serial.get_cnt_cb_iso_in()); +#endif + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + +void ep_test_abort() +{ + uint16_t vendor_id = 0x0d28; + // Use a product ID different than that used in other tests, + // to help Windows hosts use the correct configuration descriptor. + uint16_t product_id = 0x0206; + uint16_t product_release = 0x0001; + char _key[11] = { }; + char _value[128] = { }; + + { + USBEndpointTester serial(get_phy(), vendor_id, product_id, product_release, true); + greentea_send_kv("ep_test_abort", serial.get_serial_desc_string()); + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); +#if EP_DBG + wait_ms(100); + printf("cnt_cb_set_conf = %lu\r\n", serial.get_cnt_cb_set_conf()); + printf("cnt_cb_set_intf = %lu\r\n", serial.get_cnt_cb_set_intf()); + printf("cnt_cb_bulk_out = %lu\r\n", serial.get_cnt_cb_bulk_out()); + printf("cnt_cb_bulk_in = %lu\r\n", serial.get_cnt_cb_bulk_in()); + printf("cnt_cb_int_out = %lu\r\n", serial.get_cnt_cb_int_out()); + printf("cnt_cb_int_in = %lu\r\n", serial.get_cnt_cb_int_in()); + printf("cnt_cb_iso_out = %lu\r\n", serial.get_cnt_cb_iso_out()); + printf("cnt_cb_iso_in = %lu\r\n", serial.get_cnt_cb_iso_in()); +#endif + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} /** Test USB implementation against repeated reset @@ -409,12 +561,17 @@ Case cases[] = { #if SUSPEND_RESUME_TEST_SUPPORTED Case("usb device suspend/resume test", device_suspend_resume_test), #endif - Case("usb repeated construction destruction test", repeated_construction_destruction_test) + Case("usb repeated construction destruction test", repeated_construction_destruction_test), + Case("endpoint test data correctness", ep_test_data_correctness), + Case("endpoint test halt", ep_test_halt), + Case("endpoint test parallel transfers", ep_test_parallel_transfers), + Case("endpoint test parallel transfers ctrl", ep_test_parallel_transfers_ctrl), + Case("endpoint test abort", ep_test_abort) }; utest::v1::status_t greentea_test_setup(const size_t number_of_cases) { - GREENTEA_SETUP(120, "pyusb_basic"); + GREENTEA_SETUP(180, "pyusb_basic"); return greentea_test_setup_handler(number_of_cases); } From ca04ca2144e3d8b4b1f39e6274f0caa0e978ac1d Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Mon, 14 May 2018 17:22:31 +0200 Subject: [PATCH 376/488] Tests: USB: Generic: Update documentation --- TESTS/host_tests/pyusb_basic.py | 62 ++++++++++++++++++++++++++++++++- TESTS/usb_device/basic/main.cpp | 36 +++++++++++++++++++ 2 files changed, 97 insertions(+), 1 deletion(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 4aba71bcb4d..0c374f3a254 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -916,6 +916,11 @@ def control_stress_test(dev, log): def find_ep_pair(intf, endpoint_type): + """Find an OUT and IN endpoint pair. + + Raise a RuntimeError if any endpoint could not be found + or wMaxPacketSize is not equal for both endpoints. + """ ep_out = usb.util.find_descriptor( intf, custom_match=lambda e: usb.util.endpoint_type(e.bmAttributes) == endpoint_type and @@ -934,6 +939,12 @@ def find_ep_pair(intf, endpoint_type): def loopback_ep_test(ep_out, ep_in, payload_size): + """Send and receive random data using OUT/IN endpoint pair. + + Verify that data received from IN endpoint is equal to + data sent to OUT endpoint. + Raise a RuntimeError if data does not match. + """ payload_out = array.array('B', (random.randint(0x00, 0xff) for _ in range(payload_size))) ep_out.write(payload_out) payload_in = ep_in.read(ep_in.wMaxPacketSize) @@ -941,6 +952,11 @@ def loopback_ep_test(ep_out, ep_in, payload_size): def random_size_loopback_ep_test(ep_out, ep_in, failure, error, seconds, log, min_payload_size=1): + """Repeat data transfer test for OUT/IN endpoint pair for a given time. + + Set a failure Event if OUT/IN data verification fails. + Set an error Event if unexpected USB error occurs. + """ end_ts = time.time() + seconds while time.time() < end_ts and not failure.is_set() and not error.is_set(): payload_size = random.randint(min_payload_size, ep_out.wMaxPacketSize) @@ -958,6 +974,12 @@ def random_size_loopback_ep_test(ep_out, ep_in, failure, error, seconds, log, mi def halt_ep_test(dev, ep_out, ep_in, ep_to_halt, log): + """OUT/IN endpoint halt test. + + Verify that halting an endpoint at a random point of OUT or IN transfer + raises a USBError. + Raise a RuntimeError if halt fails or any unexpected error occurs. + """ MIN_HALT_DELAY = 0.01 MAX_HALT_DELAY = 0.1 delay = random.uniform(MIN_HALT_DELAY, MAX_HALT_DELAY) @@ -969,6 +991,7 @@ def halt_ep_test(dev, ep_out, ep_in, ep_to_halt, log): ctrl_error = Event() def timer_handler(): + """Halt an endpoint using a USB control request.""" try: dev.ctrl_transfer(**ctrl_kwargs) except Exception as err: @@ -995,10 +1018,19 @@ def timer_handler(): USB_ERROR_FMT = str('Got {0!r} while testing endpoints ' '{1.bEndpointAddress:#04x}({1.wMaxPacketSize:02}) and ' - '{2.bEndpointAddress:#04x}({2.wMaxPacketSize:02}) with a random payload of {3} B.') + '{2.bEndpointAddress:#04x}({2.wMaxPacketSize:02}) with ' + 'a random payload of {3} B.') def ep_test_data_correctness(dev, log, verbose=False): + """Test data correctness for every OUT/IN endpoint pair. + + Given a USB device with multiple OUT/IN endpoint pairs + When the host sends random payloads up to wMaxPacketSize in size + to an OUT endpoint of the device, + and then the device sends data back to host using an IN endpoint + Then data sent and received by host is equal for every endpoint pair + """ cfg = dev.get_active_configuration() for intf in cfg: log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') @@ -1047,6 +1079,13 @@ def ep_test_data_correctness(dev, log, verbose=False): def ep_test_halt(dev, log, verbose=False): + """Test endpoint halt for every OUT/IN endpoint pair. + + Given a USB device with multiple OUT/IN endpoint pairs + When the host issues an endpoint halt control request at a random point + of OUT or IN transfer + Then the endpoint is stalled and all further transfers fail + """ cfg = dev.get_active_configuration() for intf in cfg: log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') @@ -1092,6 +1131,13 @@ def ep_test_halt(dev, log, verbose=False): def ep_test_parallel_transfers(dev, log, verbose=False): + """Test simultaneous data transfers for multiple OUT/IN endpoint pairs. + + Given a USB device with multiple OUT/IN endpoint pairs + When multiple OUT and IN endpoints are used to transfer random test data + Then all transfers succeed + and data received equals data sent for every endpoint pair + """ cfg = dev.get_active_configuration() for intf in cfg: log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') @@ -1145,6 +1191,14 @@ def ep_test_parallel_transfers(dev, log, verbose=False): def ep_test_parallel_transfers_ctrl(dev, log, verbose=False): + """Test simultaneous data transfers in parallel with control transfers. + + Given a USB device with multiple OUT/IN endpoint pairs + When multiple OUT and IN endpoints are used to transfer random data + and control requests are processed in parallel + Then all transfers succeed + and for every endpoint pair, data received by host equals data sent by host + """ cfg = dev.get_active_configuration() for intf in cfg: log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') @@ -1201,6 +1255,12 @@ def ep_test_parallel_transfers_ctrl(dev, log, verbose=False): def ep_test_abort(dev, log, verbose=False): + """Test aborting data transfer for every OUT/IN endpoint pair. + + Given a USB device with multiple OUT/IN endpoint pairs + When a device aborts an in progress data transfer + Then no more data is transmitted + """ NUM_PACKETS_UNTIL_ABORT = 2 NUM_PACKETS_AFTER_ABORT = 8 cfg = dev.get_active_configuration() diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index ae7a038bebc..7a030473c54 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -200,6 +200,14 @@ void control_stress_test() } } +/** Test data correctness for every OUT/IN endpoint pair + * + * Given a USB device with multiple OUT/IN endpoint pairs + * When the host sends random payloads up to wMaxPacketSize in size + * to an OUT endpoint of the device, + * and then the device sends data back to host using an IN endpoint + * Then data sent and received by host is equal for every endpoint pair + */ void ep_test_data_correctness() { uint16_t vendor_id = 0x0d28; @@ -230,6 +238,13 @@ void ep_test_data_correctness() } } +/** Test endpoint halt for every OUT/IN endpoint pair + * + * Given a USB device with multiple OUT/IN endpoint pairs + * When the host issues an endpoint halt control request at a random point + * of OUT or IN transfer + * Then the endpoint is stalled and all further transfers fail + */ void ep_test_halt() { uint16_t vendor_id = 0x0d28; @@ -260,6 +275,13 @@ void ep_test_halt() } } +/** Test simultaneous data transfers for multiple OUT/IN endpoint pairs + * + * Given a USB device with multiple OUT/IN endpoint pairs + * When multiple OUT and IN endpoints are used to transfer random data in parallel + * Then all transfers succeed + * and for every endpoint pair, data received by host equals data sent by host + */ void ep_test_parallel_transfers() { uint16_t vendor_id = 0x0d28; @@ -290,6 +312,14 @@ void ep_test_parallel_transfers() } } +/** Test simultaneous data transfers in parallel with control transfers + * + * Given a USB device with multiple OUT/IN endpoint pairs + * When multiple OUT and IN endpoints are used to transfer random data + * and control requests are processed in parallel + * Then all transfers succeed + * and for every endpoint pair, data received by host equals data sent by host + */ void ep_test_parallel_transfers_ctrl() { uint16_t vendor_id = 0x0d28; @@ -320,6 +350,12 @@ void ep_test_parallel_transfers_ctrl() } } +/** Test aborting data transfer for every OUT/IN endpoint pair + * + * Given a USB device with multiple OUT/IN endpoint pairs + * When a device aborts an in progress data transfer + * Then no more data is transmitted + */ void ep_test_abort() { uint16_t vendor_id = 0x0d28; From 42f1c24acdc6a4e22184230284fe6fd5a7b84b75 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 17 May 2018 11:15:46 +0200 Subject: [PATCH 377/488] Tests: USB: Update endpoint tests Fix the host script issues present on Windows machines. Add 0 B payload size to bulk endpoints test. Update halt and abort tests according to PR comments. Add an explicit request to start reading on OUT endpoints. --- TESTS/host_tests/pyusb_basic.py | 91 ++++++++++++++------ TESTS/usb_device/basic/USBEndpointTester.cpp | 61 +++++++++---- TESTS/usb_device/basic/USBEndpointTester.h | 9 +- 3 files changed, 112 insertions(+), 49 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 0c374f3a254..60dcb3ec3e2 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -55,6 +55,7 @@ def get_interface(dev, interface, alternate=0): VENDOR_TEST_CTRL_OUT_STATUS_DELAY = 8 VENDOR_TEST_CTRL_IN_SIZES = 9 VENDOR_TEST_CTRL_OUT_SIZES = 10 +VENDOR_TEST_READ_START = 11 VENDOR_TEST_UNSUPPORTED_REQUEST = 32 REQUEST_GET_STATUS = 0 @@ -982,38 +983,63 @@ def halt_ep_test(dev, ep_out, ep_in, ep_to_halt, log): """ MIN_HALT_DELAY = 0.01 MAX_HALT_DELAY = 0.1 - delay = random.uniform(MIN_HALT_DELAY, MAX_HALT_DELAY) - ctrl_kwargs = { - 'bmRequestType': build_request_type(CTRL_OUT, CTRL_TYPE_STANDARD, CTRL_RECIPIENT_ENDPOINT), - 'bRequest': REQUEST_SET_FEATURE, - 'wValue': FEATURE_ENDPOINT_HALT, - 'wIndex': ep_to_halt.bEndpointAddress} + POST_HALT_DELAY = 0.1 ctrl_error = Event() + for ep in (ep_out, ep_in): + try: + if (usb.control.get_status(dev, ep) == 1): + raise_unconditionally(lineno(), 'Endpoints must NOT be halted at the start of this test') + except usb.core.USBError as err: + raise_unconditionally(lineno(), 'Unable to get endpoint status ({!r}).'.format(err)) + def timer_handler(): """Halt an endpoint using a USB control request.""" try: - dev.ctrl_transfer(**ctrl_kwargs) + usb.control.set_feature(dev, FEATURE_ENDPOINT_HALT, ep_to_halt) + if (usb.control.get_status(dev, ep_to_halt) != 1): + raise RuntimeError('Invalid endpoint status after halt operation') except Exception as err: - log('Endpoint {:#04x} halt failed ({}).'.format(ctrl_kwargs['wIndex'], err)) ctrl_error.set() + log('Endpoint {:#04x} halt failed ({}).'.format(ep_to_halt.bEndpointAddress, err)) + # Whether the halt operation was successful or not, + # wait a bit so the main thread has a chance to run into a USBError + # or report the failure of halt operation. + time.sleep(POST_HALT_DELAY) + delay = random.uniform(MIN_HALT_DELAY, MAX_HALT_DELAY) delayed_halt = Timer(delay, timer_handler) delayed_halt.start() - end_ts = time.time() + 1.5 * delay - try: - while time.time() < end_ts and not ctrl_error.is_set(): - loopback_ep_test(ep_out, ep_in, ep_out.wMaxPacketSize) - except usb.core.USBError as err: - if err.errno not in (32, 110): - raise_unconditionally(lineno(), 'Unexpected error ({!r}).'.format(err)) + # Keep transferring data to and from the device until one of the endpoints + # is halted. + while delayed_halt.is_alive(): if ctrl_error.is_set(): raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x} failed' .format(ep_to_halt)) - else: - raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x}' - ' during transmission did not raise USBError.' - .format(ep_to_halt)) + try: + loopback_ep_test(ep_out, ep_in, ep_out.wMaxPacketSize) + except usb.core.USBError as err: + try: + ep_status = usb.control.get_status(dev, ep_to_halt) + except usb.core.USBError as err: + raise_unconditionally(lineno(), 'Unable to get endpoint status ({!r}).'.format(err)) + if ep_status == 1: + # OK, got USBError because of endpoint halt + return + else: + raise_unconditionally(lineno(), 'Unexpected error ({!r}).'.format(err)) + raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x}' + ' during transmission did not raise USBError.' + .format(ep_to_halt)) + + +def request_endpoint_read_start(dev, ep): + ctrl_kwargs = { + 'bmRequestType': build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, CTRL_RECIPIENT_ENDPOINT), + 'bRequest': VENDOR_TEST_READ_START, + 'wValue': 0, + 'wIndex': ep.bEndpointAddress} + dev.ctrl_transfer(**ctrl_kwargs) USB_ERROR_FMT = str('Got {0!r} while testing endpoints ' @@ -1054,7 +1080,7 @@ def ep_test_data_correctness(dev, log, verbose=False): if verbose: log('Testing OUT/IN data correctness for bulk endpoint pair.') - for payload_size in range(1, bulk_out.wMaxPacketSize + 1): + for payload_size in range(bulk_out.wMaxPacketSize + 1): try: loopback_ep_test(bulk_out, bulk_in, payload_size) except usb.USBError as err: @@ -1113,10 +1139,9 @@ def ep_test_halt(dev, log, verbose=False): while time.time() < end_ts: halt_ep_test(dev, bulk_out, bulk_in, bulk_out, log) bulk_out.clear_halt() - intf.set_altsetting() # Force the device to start reading data from all OUT endpoints again. + request_endpoint_read_start(dev, bulk_out) halt_ep_test(dev, bulk_out, bulk_in, bulk_in, log) bulk_in.clear_halt() - intf.set_altsetting() # Force the device to start reading data from all OUT endpoints again. if verbose: log('Testing endpoint halt at a random point of interrupt transmission.') @@ -1124,10 +1149,9 @@ def ep_test_halt(dev, log, verbose=False): while time.time() < end_ts: halt_ep_test(dev, interrupt_out, interrupt_in, interrupt_out, log) interrupt_out.clear_halt() - intf.set_altsetting() # Force the device to start reading data from all OUT endpoints again. + request_endpoint_read_start(dev, interrupt_out) halt_ep_test(dev, interrupt_out, interrupt_in, interrupt_in, log) - interrupt_out.clear_halt() - intf.set_altsetting() # Force the device to start reading data from all OUT endpoints again. + interrupt_in.clear_halt() def ep_test_parallel_transfers(dev, log, verbose=False): @@ -1285,7 +1309,13 @@ def ep_test_abort(dev, log, verbose=False): log('Testing aborting an in progress transfer for IN endpoints.') for ep_in in (bulk_in, interrupt_in): payload_size = (NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) * ep_in.wMaxPacketSize - payload_in = ep_in.read(payload_size) + payload_in = array.array('B') + while len(payload_in) < payload_size: + try: + packet = ep_in.read(ep_in.wMaxPacketSize) + payload_in.extend(packet) + except usb.core.USBError as err: + break if verbose: log('The size of data successfully received from endpoint {0.bEndpointAddress:#04x}: {1} B.' .format(ep_in, len(payload_in))) @@ -1303,8 +1333,13 @@ def ep_test_abort(dev, log, verbose=False): log('Testing aborting an in progress transfer for OUT endpoints.') for ep_out in (bulk_out, interrupt_out): payload_size = (NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) * ep_out.wMaxPacketSize - payload_out = array.array('B', (0x01 for _ in range(payload_size))) - num_bytes_written = ep_out.write(payload_out) + payload_out = array.array('B', (0x01 for _ in range(ep_out.wMaxPacketSize))) + num_bytes_written = 0 + while num_bytes_written < payload_size: + try: + num_bytes_written += ep_out.write(payload_out) + except usb.core.USBError: + break if verbose: log('The size of data successfully sent to endpoint {0.bEndpointAddress:#04x}: {1} B.' .format(ep_out, num_bytes_written)) diff --git a/TESTS/usb_device/basic/USBEndpointTester.cpp b/TESTS/usb_device/basic/USBEndpointTester.cpp index c8798ee7ee2..937681b279a 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.cpp +++ b/TESTS/usb_device/basic/USBEndpointTester.cpp @@ -29,6 +29,7 @@ #define VENDOR_TEST_CTRL_OUT 2 #define VENDOR_TEST_CTRL_IN_SIZES 9 #define VENDOR_TEST_CTRL_OUT_SIZES 10 +#define VENDOR_TEST_READ_START 11 #define EVENT_READY (1 << 0) @@ -130,6 +131,10 @@ USBEndpointTester::USBEndpointTester(USBPhy *phy, uint16_t vendor_id, uint16_t p _cnt_cb_int_in = 0; _cnt_cb_iso_out = 0; _cnt_cb_iso_in = 0; + _num_packets_bulk_out_abort = 0; + _num_packets_bulk_in_abort = 0; + _num_packets_int_out_abort = 0; + _num_packets_int_in_abort = 0; EndpointResolver resolver(endpoint_table()); resolver.endpoint_ctrl(64); @@ -147,7 +152,6 @@ USBEndpointTester::USBEndpointTester(USBPhy *phy, uint16_t vendor_id, uint16_t p init(); USBDevice::connect(); flags.wait_any(EVENT_READY, osWaitForever, false); - } USBEndpointTester::~USBEndpointTester() @@ -217,6 +221,9 @@ void USBEndpointTester::callback_request(const setup_packet_t *setup) data = ctrl_buf; size = setup->wValue; break; + case VENDOR_TEST_READ_START: + result = (_request_read_start(setup)) ? Success : Failure; + break; default: result = PassThrough; break; @@ -225,6 +232,26 @@ void USBEndpointTester::callback_request(const setup_packet_t *setup) complete_request(result, data, size); } +bool USBEndpointTester::_request_read_start(const setup_packet_t *setup) +{ + assert_locked(); + if (setup->bmRequestType.Recipient != ENDPOINT_RECIPIENT) { + return false; + } + size_t ep_index = NUM_ENDPOINTS + 1; + for (size_t i = 0; i < NUM_ENDPOINTS; i++) { + if (_endpoints[i] == setup->wIndex) { + ep_index = i; + break; + } + } + if (ep_index > NUM_ENDPOINTS) { + return false; + } + endpoint_abort(_endpoints[ep_index]); + return read_start(_endpoints[ep_index], _endpoint_buffs[ep_index], (*_endpoint_configs)[ep_index].max_packet); +} + void USBEndpointTester::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) { if (aborted) { @@ -297,10 +324,10 @@ bool USBEndpointTester::_setup_interface(uint16_t interface, uint8_t alternate) _setup_non_zero_endpoints(); if (_abort_transfer_test && alternate >= 1) { - _cnt_cb_bulk_out_abort = _cnt_cb_bulk_out; - _cnt_cb_bulk_in_abort = _cnt_cb_bulk_in; - _cnt_cb_int_out_abort = _cnt_cb_int_out; - _cnt_cb_int_in_abort = _cnt_cb_int_in; + _num_packets_bulk_out_abort = 0; + _num_packets_bulk_in_abort = 0; + _num_packets_int_out_abort = 0; + _num_packets_int_in_abort = 0; start_ep_in_abort_test(); } return true; @@ -669,9 +696,9 @@ void USBEndpointTester::_cb_bulk_out(usb_ep_t endpoint) write_start(_endpoints[EP_BULK_IN], _endpoint_buffs[EP_BULK_IN], rx_size); } else { // Abort the transfer if enough data was received. - uint32_t num_packets_received = _cnt_cb_bulk_out - _cnt_cb_bulk_out_abort; + _num_packets_bulk_out_abort++; read_start(_endpoints[EP_BULK_OUT], _endpoint_buffs[EP_BULK_OUT], (*_endpoint_configs)[EP_BULK_OUT].max_packet); - if (num_packets_received >= NUM_PACKETS_UNTIL_ABORT) { + if (_num_packets_bulk_out_abort == NUM_PACKETS_UNTIL_ABORT) { endpoint_abort(endpoint); } } @@ -686,14 +713,14 @@ void USBEndpointTester::_cb_bulk_in(usb_ep_t endpoint) // Receive more data from the host using the OUT endpoint. read_start(_endpoints[EP_BULK_OUT], _endpoint_buffs[EP_BULK_OUT], (*_endpoint_configs)[EP_BULK_OUT].max_packet); } else { - uint32_t num_packets_sent = _cnt_cb_bulk_in - _cnt_cb_bulk_in_abort; - if (num_packets_sent >= NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) { + _num_packets_bulk_in_abort++; + if (_num_packets_bulk_in_abort >= NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) { return; } // Abort the transfer if enough data was sent. - memset(_endpoint_buffs[EP_BULK_IN], num_packets_sent, (*_endpoint_configs)[EP_BULK_IN].max_packet); + memset(_endpoint_buffs[EP_BULK_IN], _num_packets_bulk_in_abort, (*_endpoint_configs)[EP_BULK_IN].max_packet); write_start(_endpoints[EP_BULK_IN], _endpoint_buffs[EP_BULK_IN], (*_endpoint_configs)[EP_BULK_IN].max_packet); - if (num_packets_sent >= NUM_PACKETS_UNTIL_ABORT) { + if (_num_packets_bulk_in_abort == NUM_PACKETS_UNTIL_ABORT) { endpoint_abort(endpoint); } } @@ -710,9 +737,9 @@ void USBEndpointTester::_cb_int_out(usb_ep_t endpoint) write_start(_endpoints[EP_INT_IN], _endpoint_buffs[EP_INT_IN], rx_size); } else { // Abort the transfer if enough data was received. - uint32_t num_packets_received = _cnt_cb_int_out - _cnt_cb_int_out_abort; + _num_packets_int_out_abort++; read_start(_endpoints[EP_INT_OUT], _endpoint_buffs[EP_INT_OUT], (*_endpoint_configs)[EP_INT_OUT].max_packet); - if (num_packets_received >= NUM_PACKETS_UNTIL_ABORT) { + if (_num_packets_int_out_abort == NUM_PACKETS_UNTIL_ABORT) { endpoint_abort(endpoint); } } @@ -726,14 +753,14 @@ void USBEndpointTester::_cb_int_in(usb_ep_t endpoint) // Receive more data from the host using the OUT endpoint. read_start(_endpoints[EP_INT_OUT], _endpoint_buffs[EP_INT_OUT], (*_endpoint_configs)[EP_INT_OUT].max_packet); } else { - uint32_t num_packets_sent = _cnt_cb_int_in - _cnt_cb_int_in_abort; - if (num_packets_sent >= NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) { + _num_packets_int_in_abort++; + if (_num_packets_int_in_abort >= NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) { return; } // Abort the transfer if enough data was sent. - memset(_endpoint_buffs[EP_INT_IN], num_packets_sent, (*_endpoint_configs)[EP_INT_IN].max_packet); + memset(_endpoint_buffs[EP_INT_IN], _num_packets_int_in_abort, (*_endpoint_configs)[EP_INT_IN].max_packet); write_start(_endpoints[EP_INT_IN], _endpoint_buffs[EP_INT_IN], (*_endpoint_configs)[EP_INT_IN].max_packet); - if (num_packets_sent >= NUM_PACKETS_UNTIL_ABORT) { + if (_num_packets_int_in_abort == NUM_PACKETS_UNTIL_ABORT) { endpoint_abort(endpoint); } } diff --git a/TESTS/usb_device/basic/USBEndpointTester.h b/TESTS/usb_device/basic/USBEndpointTester.h index a921526b49f..3f7834cdc7f 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.h +++ b/TESTS/usb_device/basic/USBEndpointTester.h @@ -79,10 +79,10 @@ class USBEndpointTester: public USBDevice { volatile uint32_t _cnt_cb_iso_out; volatile uint32_t _cnt_cb_iso_in; - volatile uint32_t _cnt_cb_bulk_out_abort; - volatile uint32_t _cnt_cb_bulk_in_abort; - volatile uint32_t _cnt_cb_int_out_abort; - volatile uint32_t _cnt_cb_int_in_abort; + volatile uint32_t _num_packets_bulk_out_abort; + volatile uint32_t _num_packets_bulk_in_abort; + volatile uint32_t _num_packets_int_out_abort; + volatile uint32_t _num_packets_int_in_abort; virtual const uint8_t *configuration_desc(uint8_t index); virtual void callback_state_change(DeviceState new_state); @@ -103,6 +103,7 @@ class USBEndpointTester: public USBDevice { private: const char *get_desc_string(const uint8_t *desc); + bool _request_read_start(const setup_packet_t *setup); }; #endif From c8c033c8ddd6dfea0fd7246701a9e402e42ed438 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 7 Jun 2018 17:19:20 +0200 Subject: [PATCH 378/488] Tests: USB: Add data toggle test --- TESTS/host_tests/pyusb_basic.py | 114 ++++++++++++++++++++++++++++++++ TESTS/usb_device/basic/main.cpp | 42 +++++++++++- 2 files changed, 155 insertions(+), 1 deletion(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 60dcb3ec3e2..e7a791a66f9 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -290,6 +290,19 @@ def _callback_ep_test_abort(self, key, value, timestamp): except (RuntimeError) as exc: self.report_error(exc) + def _callback_ep_test_data_toggle(self, key, value, timestamp): + self.log("Received serial %s" % (value)) + + dev = self.find_device(value) + if(dev == None): + return + + try: + ep_test_data_toggle(dev, log=print) + self.report_success() + except (RuntimeError) as exc: + self.report_error(exc) + def _callback_reset_support(self, key, value, timestamp): status = "false" if sys.platform == "darwin" else "true" self.log("Reset supported: %s" % status) @@ -345,6 +358,7 @@ def setup(self): self.register_callback('ep_test_parallel_transfers', self._callback_ep_test_parallel_transfers) self.register_callback('ep_test_parallel_transfers_ctrl', self._callback_ep_test_parallel_transfers_ctrl) self.register_callback('ep_test_abort', self._callback_ep_test_abort) + self.register_callback('ep_test_data_toggle', self._callback_ep_test_data_toggle) self.register_callback('reset_support', self._callback_reset_support) @@ -1354,6 +1368,106 @@ def ep_test_abort(dev, log, verbose=False): NUM_PACKETS_UNTIL_ABORT * ep_out.wMaxPacketSize, payload_size)) +def ep_test_data_toggle(dev, log, verbose=False): + """Test data toggle reset for bulk OUT/IN endpoint pairs. + + Given a USB device + When an interface is set + Then the data toggle bits for all endpoints are reset to DATA0 + When clear feature is called for an endpoint that *IS NOT* stalled + Then the data toggle is reset to DATA0 for that endpoint + When clear halt is called for an endpoint that *IS* stalled + Then the data toggle is reset to DATA0 for that endpoint + """ + cfg = dev.get_active_configuration() + for intf in cfg: + log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') + if intf.bAlternateSetting == 0: + log('skipping the default AlternateSetting') + continue + log('running tests') + + if verbose: + log('Testing data toggle reset for bulk endpoint pair.') + + # 1.1 reset OUT and IN data toggle to DATA0 + intf.set_altsetting() + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + + # 1.2 send and receive a single data packet, + # so both OUT and IN endpoints switch to DATA1 + loopback_ep_test(bulk_out, bulk_in, bulk_out.wMaxPacketSize) + + # 1.3 reset OUT and IN data toggle to DATA0 + # USB spec, section 9.1.1.5 + # " + # Configuring a device or changing an alternate setting causes all of the status and + # configuration values associated with endpoints in the affected interfaces to be set to their default values. + # This includes setting the data toggle of any endpoint using data toggles to the value DATA0. + # " + intf.set_altsetting() + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + + # 1.4 verify that host and USB device are still in sync with respect to data toggle + try: + loopback_ep_test(bulk_out, bulk_in, bulk_out.wMaxPacketSize) + except usb.USBError as err: + if verbose: + log(USB_ERROR_FMT.format(err, bulk_out, bulk_in, bulk_out.wMaxPacketSize)) + raise_unconditionally(lineno(), 'Data toggle not reset when setting interface.') + + # 2.1 reset OUT and IN data toggle to DATA0 + intf.set_altsetting() + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + + # 2.2 send and receive a single data packet, + # so both OUT and IN endpoints switch to DATA1 + loopback_ep_test(bulk_out, bulk_in, bulk_out.wMaxPacketSize) + + # 2.3 reset OUT data toggle to DATA0 + # USB spec, section 9.4.5 + # " + # For endpoints using data toggle, regardless of whether an endpoint has the Halt feature set, a + # ClearFeature(ENDPOINT_HALT) request always results in the data toggle being reinitialized to DATA0. + # " + bulk_out.clear_halt() +# request_endpoint_read_start(dev, bulk_out) + + # 2.4 verify that host and USB device are still in sync with respect to data toggle + try: + loopback_ep_test(bulk_out, bulk_in, bulk_out.wMaxPacketSize) + except usb.USBError as err: + if verbose: + log(USB_ERROR_FMT.format(err, bulk_out, bulk_in, bulk_out.wMaxPacketSize)) + raise_unconditionally(lineno(), 'Data toggle not reset when calling ClearFeature(ENDPOINT_HALT) ' + 'on an endpoint that has not been halted.') + + # 3.1 reset OUT and IN data toggle to DATA0 + intf.set_altsetting() + bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) + + # 3.2 send and receive a single data packet, + # so both OUT and IN endpoints switch to DATA1 + loopback_ep_test(bulk_out, bulk_in, bulk_out.wMaxPacketSize) + + # 3.3 reset IN data toggle to DATA0 + # USB spec, section 9.4.5 + # " + # For endpoints using data toggle, regardless of whether an endpoint has the Halt feature set, a + # ClearFeature(ENDPOINT_HALT) request always results in the data toggle being reinitialized to DATA0. + # " + usb.control.set_feature(dev, FEATURE_ENDPOINT_HALT, bulk_in) + bulk_in.clear_halt() + + # 3.4 verify that host and USB device are still in sync with respect to data toggle + try: + loopback_ep_test(bulk_out, bulk_in, bulk_out.wMaxPacketSize) + except usb.USBError as err: + if verbose: + log(USB_ERROR_FMT.format(err, bulk_out, bulk_in, bulk_out.wMaxPacketSize)) + raise_unconditionally(lineno(), 'Data toggle not reset when clearing endpoint halt.') + + def device_reset_test(log): """ Test USB implementation against repeated reset diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index 7a030473c54..18d980108c1 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -385,6 +385,45 @@ void ep_test_abort() } } +/** Test data toggle reset for bulk OUT/IN endpoint pairs + * + * Given a USB device + * When an interface is set + * Then the data toggle bits for all endpoints are reset to DATA0 + * When clear feature is called for an endpoint that *IS NOT* stalled + * Then the data toggle is reset to DATA0 for that endpoint + * When clear halt is called for an endpoint that *IS* stalled + * Then the data toggle is reset to DATA0 for that endpoint + */ +void ep_test_data_toggle() +{ + uint16_t vendor_id = 0x0d28; + // Use a product ID different than that used in other tests, + // to help Windows hosts use the correct configuration descriptor. + uint16_t product_id = 0x0206; + uint16_t product_release = 0x0001; + char _key[11] = { }; + char _value[128] = { }; + + { + USBEndpointTester serial(get_phy(), vendor_id, product_id, product_release, false); + greentea_send_kv("ep_test_data_toggle", serial.get_serial_desc_string()); + greentea_parse_kv(_key, _value, sizeof(_key), sizeof(_value)); +#if EP_DBG + wait_ms(100); + printf("cnt_cb_set_conf = %lu\r\n", serial.get_cnt_cb_set_conf()); + printf("cnt_cb_set_intf = %lu\r\n", serial.get_cnt_cb_set_intf()); + printf("cnt_cb_bulk_out = %lu\r\n", serial.get_cnt_cb_bulk_out()); + printf("cnt_cb_bulk_in = %lu\r\n", serial.get_cnt_cb_bulk_in()); + printf("cnt_cb_int_out = %lu\r\n", serial.get_cnt_cb_int_out()); + printf("cnt_cb_int_in = %lu\r\n", serial.get_cnt_cb_int_in()); + printf("cnt_cb_iso_out = %lu\r\n", serial.get_cnt_cb_iso_out()); + printf("cnt_cb_iso_in = %lu\r\n", serial.get_cnt_cb_iso_in()); +#endif + TEST_ASSERT_EQUAL_STRING("pass", _key); + } +} + /** Test USB implementation against repeated reset Given an initialized USB (HOST <---> DUT connection established) @@ -602,7 +641,8 @@ Case cases[] = { Case("endpoint test halt", ep_test_halt), Case("endpoint test parallel transfers", ep_test_parallel_transfers), Case("endpoint test parallel transfers ctrl", ep_test_parallel_transfers_ctrl), - Case("endpoint test abort", ep_test_abort) + Case("endpoint test abort", ep_test_abort), + Case("endpoint test data toggle reset", ep_test_data_toggle) }; utest::v1::status_t greentea_test_setup(const size_t number_of_cases) From 6c3a6f1657b5a20b531c59fefba00f9f4f49cdbc Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 21 Jun 2018 23:48:55 +0200 Subject: [PATCH 379/488] Tests: USB: Update ep callbacks Endpoint callbacks no longer have endpoint as a param. This update was introduced in #7267. --- TESTS/usb_device/basic/USBEndpointTester.cpp | 32 ++++++++++---------- TESTS/usb_device/basic/USBEndpointTester.h | 14 ++++----- 2 files changed, 23 insertions(+), 23 deletions(-) diff --git a/TESTS/usb_device/basic/USBEndpointTester.cpp b/TESTS/usb_device/basic/USBEndpointTester.cpp index 937681b279a..37cd69fcb93 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.cpp +++ b/TESTS/usb_device/basic/USBEndpointTester.cpp @@ -684,10 +684,10 @@ const uint8_t *USBEndpointTester::configuration_desc(uint8_t index) } } -void USBEndpointTester::_cb_bulk_out(usb_ep_t endpoint) +void USBEndpointTester::_cb_bulk_out() { _cnt_cb_bulk_out++; - uint32_t rx_size = read_finish(endpoint); + uint32_t rx_size = read_finish(_endpoints[EP_BULK_OUT]); if (_abort_transfer_test == false) { // Send data back to host using the IN endpoint. @@ -699,15 +699,15 @@ void USBEndpointTester::_cb_bulk_out(usb_ep_t endpoint) _num_packets_bulk_out_abort++; read_start(_endpoints[EP_BULK_OUT], _endpoint_buffs[EP_BULK_OUT], (*_endpoint_configs)[EP_BULK_OUT].max_packet); if (_num_packets_bulk_out_abort == NUM_PACKETS_UNTIL_ABORT) { - endpoint_abort(endpoint); + endpoint_abort(_endpoints[EP_BULK_OUT]); } } } -void USBEndpointTester::_cb_bulk_in(usb_ep_t endpoint) +void USBEndpointTester::_cb_bulk_in() { _cnt_cb_bulk_in++; - write_finish(endpoint); + write_finish(_endpoints[EP_BULK_IN]); if (_abort_transfer_test == false) { // Receive more data from the host using the OUT endpoint. @@ -721,15 +721,15 @@ void USBEndpointTester::_cb_bulk_in(usb_ep_t endpoint) memset(_endpoint_buffs[EP_BULK_IN], _num_packets_bulk_in_abort, (*_endpoint_configs)[EP_BULK_IN].max_packet); write_start(_endpoints[EP_BULK_IN], _endpoint_buffs[EP_BULK_IN], (*_endpoint_configs)[EP_BULK_IN].max_packet); if (_num_packets_bulk_in_abort == NUM_PACKETS_UNTIL_ABORT) { - endpoint_abort(endpoint); + endpoint_abort(_endpoints[EP_BULK_IN]); } } } -void USBEndpointTester::_cb_int_out(usb_ep_t endpoint) +void USBEndpointTester::_cb_int_out() { _cnt_cb_int_out++; - uint32_t rx_size = read_finish(endpoint); + uint32_t rx_size = read_finish(_endpoints[EP_INT_OUT]); if (_abort_transfer_test == false) { // Send data back to host using the IN endpoint. memset(_endpoint_buffs[EP_INT_IN], 0, (*_endpoint_configs)[EP_INT_IN].max_packet); @@ -740,15 +740,15 @@ void USBEndpointTester::_cb_int_out(usb_ep_t endpoint) _num_packets_int_out_abort++; read_start(_endpoints[EP_INT_OUT], _endpoint_buffs[EP_INT_OUT], (*_endpoint_configs)[EP_INT_OUT].max_packet); if (_num_packets_int_out_abort == NUM_PACKETS_UNTIL_ABORT) { - endpoint_abort(endpoint); + endpoint_abort(_endpoints[EP_INT_OUT]); } } } -void USBEndpointTester::_cb_int_in(usb_ep_t endpoint) +void USBEndpointTester::_cb_int_in() { _cnt_cb_int_in++; - write_finish(endpoint); + write_finish(_endpoints[EP_INT_IN]); if (_abort_transfer_test == false) { // Receive more data from the host using the OUT endpoint. read_start(_endpoints[EP_INT_OUT], _endpoint_buffs[EP_INT_OUT], (*_endpoint_configs)[EP_INT_OUT].max_packet); @@ -761,25 +761,25 @@ void USBEndpointTester::_cb_int_in(usb_ep_t endpoint) memset(_endpoint_buffs[EP_INT_IN], _num_packets_int_in_abort, (*_endpoint_configs)[EP_INT_IN].max_packet); write_start(_endpoints[EP_INT_IN], _endpoint_buffs[EP_INT_IN], (*_endpoint_configs)[EP_INT_IN].max_packet); if (_num_packets_int_in_abort == NUM_PACKETS_UNTIL_ABORT) { - endpoint_abort(endpoint); + endpoint_abort(_endpoints[EP_INT_IN]); } } } -void USBEndpointTester::_cb_iso_out(usb_ep_t endpoint) +void USBEndpointTester::_cb_iso_out() { _cnt_cb_iso_out++; - uint32_t rx_size = read_finish(endpoint); + uint32_t rx_size = read_finish(_endpoints[EP_ISO_OUT]); // Send data back to host using the IN endpoint. memset(_endpoint_buffs[EP_ISO_IN], 0, (*_endpoint_configs)[EP_ISO_IN].max_packet); memcpy(_endpoint_buffs[EP_ISO_IN], _endpoint_buffs[EP_ISO_OUT], rx_size); write_start(_endpoints[EP_ISO_IN], _endpoint_buffs[EP_ISO_IN], rx_size); } -void USBEndpointTester::_cb_iso_in(usb_ep_t endpoint) +void USBEndpointTester::_cb_iso_in() { _cnt_cb_iso_in++; - write_finish(endpoint); + write_finish(_endpoints[EP_ISO_IN]); // Receive more data from the host using the OUT endpoint. read_start(_endpoints[EP_ISO_OUT], _endpoint_buffs[EP_ISO_OUT], (*_endpoint_configs)[EP_ISO_OUT].max_packet); } diff --git a/TESTS/usb_device/basic/USBEndpointTester.h b/TESTS/usb_device/basic/USBEndpointTester.h index 3f7834cdc7f..ef622b2d3b0 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.h +++ b/TESTS/usb_device/basic/USBEndpointTester.h @@ -33,7 +33,7 @@ class USBEndpointTester: public USBDevice { public: USBEndpointTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, bool abort_transfer_test); - ~USBEndpointTester(); + virtual ~USBEndpointTester(); const char *get_serial_desc_string(); void start_ep_in_abort_test(); @@ -94,12 +94,12 @@ class USBEndpointTester: public USBDevice { void _setup_non_zero_endpoints(); bool _setup_interface(uint16_t interface, uint8_t alternate); - virtual void _cb_bulk_out(usb_ep_t endpoint); - virtual void _cb_bulk_in(usb_ep_t endpoint); - virtual void _cb_int_out(usb_ep_t endpoint); - virtual void _cb_int_in(usb_ep_t endpoint); - virtual void _cb_iso_out(usb_ep_t endpoint); - virtual void _cb_iso_in(usb_ep_t endpoint); + virtual void _cb_bulk_out(); + virtual void _cb_bulk_in(); + virtual void _cb_int_out(); + virtual void _cb_int_in(); + virtual void _cb_iso_out(); + virtual void _cb_iso_in(); private: const char *get_desc_string(const uint8_t *desc); From 9c86ad487f53a6d1952cae666c6118c6dc2b3232 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 21 Jun 2018 11:27:56 -0500 Subject: [PATCH 380/488] Update test to restart reads after unstall After an endpoint is unstalled any pending transfers are terminated. This patch re-starts any reads that were ongoing. --- TESTS/usb_device/basic/USBEndpointTester.cpp | 23 ++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/TESTS/usb_device/basic/USBEndpointTester.cpp b/TESTS/usb_device/basic/USBEndpointTester.cpp index 37cd69fcb93..544464a8290 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.cpp +++ b/TESTS/usb_device/basic/USBEndpointTester.cpp @@ -228,6 +228,29 @@ void USBEndpointTester::callback_request(const setup_packet_t *setup) result = PassThrough; break; } + } else if ((setup->bmRequestType.Type == STANDARD_TYPE) && (setup->bmRequestType.Recipient == ENDPOINT_RECIPIENT)) { + if (setup->bRequest == CLEAR_FEATURE) { + usb_ep_t ep = setup->wIndex; + bool valid = false; + uint32_t ep_index = 0; + if (ep == _endpoints[EP_BULK_OUT]) { + valid = true; + ep_index = EP_BULK_OUT; + } else if (ep == _endpoints[EP_INT_OUT]) { + valid = true; + ep_index = EP_INT_OUT; + } else if (ep == _endpoints[EP_ISO_OUT]) { + valid = true; + ep_index = EP_ISO_OUT; + } + + if (valid) { + // Restart reads when an OUT endpoint is unstalled + result = Success; + endpoint_unstall(ep); + read_start(_endpoints[ep_index], _endpoint_buffs[ep_index], (*_endpoint_configs)[ep_index].max_packet); + } + } } complete_request(result, data, size); } From a49650296193b10194a267b6ac23c12a63b7b471 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 28 Jun 2018 10:54:33 +0200 Subject: [PATCH 381/488] Tests: USB: Decrease the max data size for iso ep Although the USB spec sets the upper limit on FS isochronous endpoint payloads to 1023 B, this value is hard to test in practice. Moreover, not all the targets Mbed OS supports (like NUCLEO_F207ZG) are able to handle all the endpoints set to max. --- TESTS/usb_device/basic/USBEndpointTester.cpp | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/TESTS/usb_device/basic/USBEndpointTester.cpp b/TESTS/usb_device/basic/USBEndpointTester.cpp index 544464a8290..2bb914cc4e9 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.cpp +++ b/TESTS/usb_device/basic/USBEndpointTester.cpp @@ -49,7 +49,19 @@ #define TEST_SIZE_EP_INT_3 (16) #define TEST_SIZE_EP_INT_4 TEST_SIZE_EP_INT_MIN -#define TEST_SIZE_EP_ISO_MAX (1023) + +/* According to USB spec, the wMaxPacketSize for FS isochronous endpoints + * is 1023 B. There are a couple of reasons this value is not used in tests: + * - some of the boards supported by Mbed OS have too little RAM dedicated + * for USB, making EndpointResolve::valid() fail when all the endpoints (2x + * bulk, 2x interrupt, 2x isochronous, 2x control) are configured to use + * the max value of wMaxPacketSize + * (e.g. NUCLEO_F207ZG has 1.25K of endpoint RAM), + * - given a test host with other USB devices on the bus, it is unlikely + * for the test device to be able to reserve the bandwidth associated with + * high wMaxPacketSize for iso endpoints. + */ +#define TEST_SIZE_EP_ISO_MAX (256) #define TEST_SIZE_EP_ISO_MIN (1) #define TEST_SIZE_EP_ISO_0 (0) #define TEST_SIZE_EP_ISO_1 (0) From 08820638bff2373cfad60ba1c5b266ebc38d5ecc Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 28 Jun 2018 13:30:15 +0200 Subject: [PATCH 382/488] Tests: USB: Update endpoint halt test Wait for a locally created Timer thread to finish before returning. --- TESTS/host_tests/pyusb_basic.py | 34 +++++++++++++++++++-------------- 1 file changed, 20 insertions(+), 14 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index e7a791a66f9..00920338c82 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -1026,22 +1026,28 @@ def timer_handler(): delayed_halt.start() # Keep transferring data to and from the device until one of the endpoints # is halted. - while delayed_halt.is_alive(): - if ctrl_error.is_set(): - raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x} failed' - .format(ep_to_halt)) - try: - loopback_ep_test(ep_out, ep_in, ep_out.wMaxPacketSize) - except usb.core.USBError as err: + try: + while delayed_halt.is_alive(): + if ctrl_error.is_set(): + raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x} failed' + .format(ep_to_halt)) try: - ep_status = usb.control.get_status(dev, ep_to_halt) + loopback_ep_test(ep_out, ep_in, ep_out.wMaxPacketSize) except usb.core.USBError as err: - raise_unconditionally(lineno(), 'Unable to get endpoint status ({!r}).'.format(err)) - if ep_status == 1: - # OK, got USBError because of endpoint halt - return - else: - raise_unconditionally(lineno(), 'Unexpected error ({!r}).'.format(err)) + try: + ep_status = usb.control.get_status(dev, ep_to_halt) + except usb.core.USBError as err: + raise_unconditionally(lineno(), 'Unable to get endpoint status ({!r}).'.format(err)) + if ep_status == 1: + # OK, got USBError because of endpoint halt + return + else: + raise_unconditionally(lineno(), 'Unexpected error ({!r}).'.format(err)) + except: + raise + finally: + # Always wait for the Timer thread created above. + delayed_halt.join() raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x}' ' during transmission did not raise USBError.' .format(ep_to_halt)) From 3f044cc1d3cf47f979583123e89be93cd985c16e Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Fri, 29 Jun 2018 18:05:36 +0200 Subject: [PATCH 383/488] Tests: USB: Check ep buffer is released by abort Validate that endpoint buffer is not used after a transfer has been aborted. --- TESTS/host_tests/pyusb_basic.py | 36 ++++++++- TESTS/usb_device/basic/USBEndpointTester.cpp | 79 +++++++++++++++++--- TESTS/usb_device/basic/USBEndpointTester.h | 1 + TESTS/usb_device/basic/main.cpp | 1 + 4 files changed, 107 insertions(+), 10 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 00920338c82..f3e486bb45f 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -56,6 +56,7 @@ def get_interface(dev, interface, alternate=0): VENDOR_TEST_CTRL_IN_SIZES = 9 VENDOR_TEST_CTRL_OUT_SIZES = 10 VENDOR_TEST_READ_START = 11 +VENDOR_TEST_ABORT_BUFF_CHECK = 12 VENDOR_TEST_UNSUPPORTED_REQUEST = 32 REQUEST_GET_STATUS = 0 @@ -1062,6 +1063,16 @@ def request_endpoint_read_start(dev, ep): dev.ctrl_transfer(**ctrl_kwargs) +def request_abort_buff_check(dev, ep): + ctrl_kwargs = { + 'bmRequestType': build_request_type(CTRL_IN, CTRL_TYPE_VENDOR, CTRL_RECIPIENT_ENDPOINT), + 'bRequest': VENDOR_TEST_ABORT_BUFF_CHECK, + 'wValue': 0, + 'wIndex': ep.bEndpointAddress, + 'data_or_wLength': 1} + return bool(dev.ctrl_transfer(**ctrl_kwargs)[0]) + + USB_ERROR_FMT = str('Got {0!r} while testing endpoints ' '{1.bEndpointAddress:#04x}({1.wMaxPacketSize:02}) and ' '{2.bEndpointAddress:#04x}({2.wMaxPacketSize:02}) with ' @@ -1304,9 +1315,16 @@ def ep_test_abort(dev, log, verbose=False): Given a USB device with multiple OUT/IN endpoint pairs When a device aborts an in progress data transfer Then no more data is transmitted + and endpoint buffer is correctly released on the device end """ NUM_PACKETS_UNTIL_ABORT = 2 NUM_PACKETS_AFTER_ABORT = 8 + + # If the host ever receives a payload with any byte set to this value, + # the device does not handle abort operation correctly. The buffer + # passed to aborted operation must not be used after call to abort(). + FORBIDDEN_PAYLOAD_VALUE = NUM_PACKETS_AFTER_ABORT + 1 + cfg = dev.get_active_configuration() for intf in cfg: log('interface {}, alt {} -- '.format(intf.bInterfaceNumber, intf.bAlternateSetting), end='') @@ -1336,6 +1354,11 @@ def ep_test_abort(dev, log, verbose=False): payload_in.extend(packet) except usb.core.USBError as err: break + if FORBIDDEN_PAYLOAD_VALUE in payload_in: + raise_unconditionally( + lineno(), 'Endpoint buffer not released when aborting the ' + 'write operation on endpoint {0.bEndpointAddress:#04x}.' + .format(ep_in)) if verbose: log('The size of data successfully received from endpoint {0.bEndpointAddress:#04x}: {1} B.' .format(ep_in, len(payload_in))) @@ -1353,13 +1376,24 @@ def ep_test_abort(dev, log, verbose=False): log('Testing aborting an in progress transfer for OUT endpoints.') for ep_out in (bulk_out, interrupt_out): payload_size = (NUM_PACKETS_UNTIL_ABORT + NUM_PACKETS_AFTER_ABORT) * ep_out.wMaxPacketSize - payload_out = array.array('B', (0x01 for _ in range(ep_out.wMaxPacketSize))) num_bytes_written = 0 while num_bytes_written < payload_size: + payload_out = array.array('B', (num_bytes_written/ep_out.wMaxPacketSize + for _ in range(ep_out.wMaxPacketSize))) try: num_bytes_written += ep_out.write(payload_out) except usb.core.USBError: break + try: + ep_buff_correct = request_abort_buff_check(dev, ep_out) + except (usb.core.USBError, IndexError, TypeError) as err: + raise_unconditionally( + lineno(), 'Unable to verify endpoint buffer content ({!r}).'.format(err)) + if not ep_buff_correct: + raise_unconditionally( + lineno(), 'Endpoint buffer not released when aborting the ' + 'read operation on endpoint {0.bEndpointAddress:#04x}.' + .format(ep_out)) if verbose: log('The size of data successfully sent to endpoint {0.bEndpointAddress:#04x}: {1} B.' .format(ep_out, num_bytes_written)) diff --git a/TESTS/usb_device/basic/USBEndpointTester.cpp b/TESTS/usb_device/basic/USBEndpointTester.cpp index 2bb914cc4e9..8085dc0c1dc 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.cpp +++ b/TESTS/usb_device/basic/USBEndpointTester.cpp @@ -24,12 +24,20 @@ #define NUM_PACKETS_UNTIL_ABORT 2 #define NUM_PACKETS_AFTER_ABORT 8 +#define EP_ABORT_BUFF_VALUE 0xff -#define VENDOR_TEST_CTRL_IN 1 -#define VENDOR_TEST_CTRL_OUT 2 -#define VENDOR_TEST_CTRL_IN_SIZES 9 -#define VENDOR_TEST_CTRL_OUT_SIZES 10 -#define VENDOR_TEST_READ_START 11 +/* If the host ever receives a payload with any byte set to this value, + * the device does not handle abort operation correctly. The buffer + * passed to aborted operation must not be used after call to abort(). + */ +#define FORBIDDEN_PAYLOAD_VALUE (NUM_PACKETS_AFTER_ABORT + 1) + +#define VENDOR_TEST_CTRL_IN 1 +#define VENDOR_TEST_CTRL_OUT 2 +#define VENDOR_TEST_CTRL_IN_SIZES 9 +#define VENDOR_TEST_CTRL_OUT_SIZES 10 +#define VENDOR_TEST_READ_START 11 +#define VENDOR_TEST_ABORT_BUFF_CHECK 12 #define EVENT_READY (1 << 0) @@ -236,6 +244,12 @@ void USBEndpointTester::callback_request(const setup_packet_t *setup) case VENDOR_TEST_READ_START: result = (_request_read_start(setup)) ? Success : Failure; break; + case VENDOR_TEST_ABORT_BUFF_CHECK: + result = Send; + ctrl_buf[0] = _request_abort_buff_check(setup); + data = ctrl_buf; + size = 1; + break; default: result = PassThrough; break; @@ -273,20 +287,50 @@ bool USBEndpointTester::_request_read_start(const setup_packet_t *setup) if (setup->bmRequestType.Recipient != ENDPOINT_RECIPIENT) { return false; } - size_t ep_index = NUM_ENDPOINTS + 1; + size_t ep_index = NUM_ENDPOINTS; for (size_t i = 0; i < NUM_ENDPOINTS; i++) { if (_endpoints[i] == setup->wIndex) { ep_index = i; break; } } - if (ep_index > NUM_ENDPOINTS) { + if (ep_index == NUM_ENDPOINTS) { + return false; + } + if (_endpoint_buffs[ep_index] == NULL) { return false; } endpoint_abort(_endpoints[ep_index]); return read_start(_endpoints[ep_index], _endpoint_buffs[ep_index], (*_endpoint_configs)[ep_index].max_packet); } +bool USBEndpointTester::_request_abort_buff_check(const setup_packet_t *setup) +{ + assert_locked(); + if (setup->bmRequestType.Recipient != ENDPOINT_RECIPIENT) { + return false; + } + size_t ep_index = NUM_ENDPOINTS; + for (size_t i = 0; i < NUM_ENDPOINTS; i++) { + if (_endpoints[i] == setup->wIndex) { + ep_index = i; + break; + } + } + if (ep_index == NUM_ENDPOINTS) { + return false; + } + if (_endpoint_buffs[ep_index] == NULL) { + return false; + } + for (size_t i = 0; i < (*_endpoint_configs)[ep_index].max_packet; i++) { + if (_endpoint_buffs[ep_index][i] != EP_ABORT_BUFF_VALUE) { + return false; + } + } + return true; +} + void USBEndpointTester::callback_request_xfer_done(const setup_packet_t *setup, bool aborted) { if (aborted) { @@ -309,6 +353,9 @@ void USBEndpointTester::callback_request_xfer_done(const setup_packet_t *setup, case VENDOR_TEST_CTRL_IN_SIZES: result = true; break; + case VENDOR_TEST_ABORT_BUFF_CHECK: + result = true; + break; default: result = false; break; @@ -723,7 +770,6 @@ void USBEndpointTester::_cb_bulk_out() { _cnt_cb_bulk_out++; uint32_t rx_size = read_finish(_endpoints[EP_BULK_OUT]); - if (_abort_transfer_test == false) { // Send data back to host using the IN endpoint. memset(_endpoint_buffs[EP_BULK_IN], 0, (*_endpoint_configs)[EP_BULK_IN].max_packet); @@ -732,6 +778,10 @@ void USBEndpointTester::_cb_bulk_out() } else { // Abort the transfer if enough data was received. _num_packets_bulk_out_abort++; + if (_num_packets_bulk_out_abort == NUM_PACKETS_UNTIL_ABORT) { + // Set every byte of the buffer to a known value. + memset(_endpoint_buffs[EP_BULK_OUT], EP_ABORT_BUFF_VALUE, (*_endpoint_configs)[EP_BULK_OUT].max_packet); + } read_start(_endpoints[EP_BULK_OUT], _endpoint_buffs[EP_BULK_OUT], (*_endpoint_configs)[EP_BULK_OUT].max_packet); if (_num_packets_bulk_out_abort == NUM_PACKETS_UNTIL_ABORT) { endpoint_abort(_endpoints[EP_BULK_OUT]); @@ -743,7 +793,6 @@ void USBEndpointTester::_cb_bulk_in() { _cnt_cb_bulk_in++; write_finish(_endpoints[EP_BULK_IN]); - if (_abort_transfer_test == false) { // Receive more data from the host using the OUT endpoint. read_start(_endpoints[EP_BULK_OUT], _endpoint_buffs[EP_BULK_OUT], (*_endpoint_configs)[EP_BULK_OUT].max_packet); @@ -757,6 +806,10 @@ void USBEndpointTester::_cb_bulk_in() write_start(_endpoints[EP_BULK_IN], _endpoint_buffs[EP_BULK_IN], (*_endpoint_configs)[EP_BULK_IN].max_packet); if (_num_packets_bulk_in_abort == NUM_PACKETS_UNTIL_ABORT) { endpoint_abort(_endpoints[EP_BULK_IN]); + // Verify that buffer given in write_start is not used after the + // call to endpoint_abort(), by changing the buffer contents. + // The test will fail if the host receives new buffer content. + memset(_endpoint_buffs[EP_BULK_IN], FORBIDDEN_PAYLOAD_VALUE, (*_endpoint_configs)[EP_BULK_IN].max_packet); } } } @@ -773,6 +826,10 @@ void USBEndpointTester::_cb_int_out() } else { // Abort the transfer if enough data was received. _num_packets_int_out_abort++; + if (_num_packets_int_out_abort == NUM_PACKETS_UNTIL_ABORT) { + // Set every byte of the buffer to a known value. + memset(_endpoint_buffs[EP_INT_OUT], EP_ABORT_BUFF_VALUE, (*_endpoint_configs)[EP_INT_OUT].max_packet); + } read_start(_endpoints[EP_INT_OUT], _endpoint_buffs[EP_INT_OUT], (*_endpoint_configs)[EP_INT_OUT].max_packet); if (_num_packets_int_out_abort == NUM_PACKETS_UNTIL_ABORT) { endpoint_abort(_endpoints[EP_INT_OUT]); @@ -797,6 +854,10 @@ void USBEndpointTester::_cb_int_in() write_start(_endpoints[EP_INT_IN], _endpoint_buffs[EP_INT_IN], (*_endpoint_configs)[EP_INT_IN].max_packet); if (_num_packets_int_in_abort == NUM_PACKETS_UNTIL_ABORT) { endpoint_abort(_endpoints[EP_INT_IN]); + // Verify that buffer given in write_start is not used after the + // call to endpoint_abort(), by changing the buffer contents. + // The test will fail if the host receives new buffer content. + memset(_endpoint_buffs[EP_INT_IN], FORBIDDEN_PAYLOAD_VALUE, (*_endpoint_configs)[EP_INT_IN].max_packet); } } } diff --git a/TESTS/usb_device/basic/USBEndpointTester.h b/TESTS/usb_device/basic/USBEndpointTester.h index ef622b2d3b0..3b0afef66c9 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.h +++ b/TESTS/usb_device/basic/USBEndpointTester.h @@ -104,6 +104,7 @@ class USBEndpointTester: public USBDevice { private: const char *get_desc_string(const uint8_t *desc); bool _request_read_start(const setup_packet_t *setup); + bool _request_abort_buff_check(const setup_packet_t *setup); }; #endif diff --git a/TESTS/usb_device/basic/main.cpp b/TESTS/usb_device/basic/main.cpp index 18d980108c1..ace311a06ce 100644 --- a/TESTS/usb_device/basic/main.cpp +++ b/TESTS/usb_device/basic/main.cpp @@ -355,6 +355,7 @@ void ep_test_parallel_transfers_ctrl() * Given a USB device with multiple OUT/IN endpoint pairs * When a device aborts an in progress data transfer * Then no more data is transmitted + * and endpoint buffer is correctly released on the device end */ void ep_test_abort() { From fa6e452fa380b098a4a36e599e989087a7feccee Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 31 Jul 2018 16:32:46 -0500 Subject: [PATCH 384/488] Remove HAL_GetTick from ST USBPhy Remove the function HAL_GetTick from the ST USBPhy driver. This is no longer needed as that change has been made on master. --- usb/device/targets/TARGET_STM/USBPhy_STM32.cpp | 6 ------ 1 file changed, 6 deletions(-) diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 7990dc02fb0..9f1c78d5419 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -525,10 +525,4 @@ void USBPhyHw::_usbisr(void) { instance->events->start_process(); } -//TODO - remove this hack which allows HAL_Delay to work when interrupts are disabled -extern "C" uint32_t HAL_GetTick() -{ - return ticker_read_us(get_us_ticker_data()) / 1000; -} - #endif From 287504f88af8131e1cebff9c7e9c902f660da5b4 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Tue, 30 Oct 2018 15:36:39 -0500 Subject: [PATCH 385/488] Fix USB traceback during testing when wrong size In the pyusb_basic host test check the length of control transfers before comparing contents for equality. --- TESTS/host_tests/pyusb_basic.py | 17 ++++++----------- 1 file changed, 6 insertions(+), 11 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index f3e486bb45f..2e0f12332e5 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -24,6 +24,7 @@ from threading import Thread, Event, Timer import array import random +import os import usb.core from usb.util import build_request_type @@ -841,12 +842,8 @@ def control_data_test(dev, sizes_list, log): request = VENDOR_TEST_CTRL_OUT_SIZES value = i # Size of data the device should actually read index = 0 # Unused - set for debugging only - data = bytearray(i) # Dummy data - if i == 1: - data[0] = count - else: - data[0] = count - 1 - data[i - 1] = count + 1 + data = bytearray(os.urandom(i)) # Dummy data + try: dev.ctrl_transfer(request_type, request, value, index, data, 5000) except usb.core.USBError: @@ -860,11 +857,9 @@ def control_data_test(dev, sizes_list, log): length = i try: ret = dev.ctrl_transfer(request_type, request, value, index, length, 5000) - if i == 1: - raise_if_different(count, ret[0], lineno(), "send/receive data not match") - else: - raise_if_different(count - 1, ret[0], lineno(), "send/receive data not match") - raise_if_different(count + 1, ret[i - 1], lineno(), "send/receive data not match") + raise_if_different(i, len(ret), lineno(), "send/receive data is the wrong size") + for j in range(0, i): + raise_if_different(data[j], ret[j], lineno(), "send/receive data not match") except usb.core.USBError: raise_unconditionally(lineno(), "VENDOR_TEST_CTRL_IN_SIZES failed") count += 1 From 3971530d954b9fc84bd102606622b6ff2caa02b3 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 26 Oct 2018 11:11:49 -0500 Subject: [PATCH 386/488] Ignore disabled Kinetis USB endpoint interrupts Ignore interrupts on disabled USB endpoints. This prevents handling interrupts when in the wrong state. Prior to this patch when running the serial test on a K64F the assert on line 908 of USBDevice.cpp would sometimes be triggered. This assert indicates that an endpoint 0 IN interrupt occurred before the device was ready. This occurs during the test_cdc_usb_reconnect test when the host sends a "Set Control Line State" USB request and the device acknowledges it just before USB is disconnected. --- usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp index 16b0cd28569..07282bc400a 100644 --- a/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp +++ b/usb/device/targets/TARGET_Freescale/USBPhy_Kinetis.cpp @@ -636,8 +636,11 @@ void USBPhyHw::process() uint32_t ev_odd = (USB0->STAT >> 2) & 0x01; int phy_ep = (num << 1) | dir; + bool tx_en = (USB0->ENDPOINT[PHY_TO_LOG(phy_ep)].ENDPT & USB_ENDPT_EPTXEN_MASK) ? true : false; + bool rx_en = (USB0->ENDPOINT[PHY_TO_LOG(phy_ep)].ENDPT & USB_ENDPT_EPRXEN_MASK) ? true : false; + // setup packet - if ((num == 0) && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == SETUP_TOKEN)) { + if (tx_en && (num == 0) && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == SETUP_TOKEN)) { setup_suspend = true; Data1 |= 0x02 | 0x01; // set DATA1 for TX and RX bdt[EP_BDT_IDX(0, TX, EVEN)].info &= ~BD_OWN_MASK; @@ -648,7 +651,7 @@ void USBPhyHw::process() } else { // OUT packet - if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == OUT_TOKEN) { + if (rx_en && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == OUT_TOKEN)) { if (num == 0) events->ep0_out(); else { @@ -658,7 +661,7 @@ void USBPhyHw::process() } // IN packet - if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == IN_TOKEN) { + if (tx_en && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == IN_TOKEN)) { if (num == 0) { events->ep0_in(); if (set_addr == 1) { From 5d12466c88ed77364673c2eb1a8d00e2e0695a02 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 9 Aug 2018 15:28:58 +0200 Subject: [PATCH 387/488] Tests: USB: Add tests for CDC class. --- TESTS/host_tests/usb_device_serial.py | 242 +++++++++++++++++++ TESTS/usb_device/serial/README.md | 18 ++ TESTS/usb_device/serial/main.cpp | 328 ++++++++++++++++++++++++++ 3 files changed, 588 insertions(+) create mode 100644 TESTS/host_tests/usb_device_serial.py create mode 100644 TESTS/usb_device/serial/README.md create mode 100644 TESTS/usb_device/serial/main.cpp diff --git a/TESTS/host_tests/usb_device_serial.py b/TESTS/host_tests/usb_device_serial.py new file mode 100644 index 00000000000..82875bb9559 --- /dev/null +++ b/TESTS/host_tests/usb_device_serial.py @@ -0,0 +1,242 @@ +""" +mbed SDK +Copyright (c) 2018 ARM Limited + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +""" +from __future__ import print_function +import functools +import itertools +import time +import threading +import serial +import serial.tools.list_ports as stlp +import mbed_host_tests + + +MSG_KEY_PORT_OPEN_WAIT = 'port_open_wait' +MSG_KEY_SEND_BYTES_SINGLE = 'send_single' +MSG_KEY_SEND_BYTES_MULTIPLE = 'send_multiple' +MSG_KEY_LOOPBACK = 'loopback' + +RX_BUFF_SIZE = 32 +TERM_REOPEN_DELAY = 0.1 + + +def usb_serial_name(vid, pid): + """Get USB serial device name based on vid and pid.""" + for port_info in stlp.comports(): + if port_info.vid == vid and port_info.pid == pid: + return port_info.device + return None + + +class RetryError(Exception): + """Exception raised by retry_fun_call().""" + + +def retry_fun_call(fun, num_retries=3, retry_delay=0.0): + """Call fun and retry if any exception was raised. + + fun is called at most num_retries with a retry_dalay in between calls. + Raises RetryError if the retry limit is exhausted. + """ + verbose = False + final_err = None + for retry in range(1, num_retries + 1): + try: + return fun() # pylint: disable=not-callable + except Exception as exc: # pylint: disable=broad-except + final_err = exc + if verbose: + print('Retry {}/{} failed ({})' + .format(retry, num_retries, str(fun))) + time.sleep(retry_delay) + err_msg = 'Failed with "{}". Tried {} times.' + raise RetryError(err_msg.format(final_err, num_retries)) + + +class USBSerialTest(mbed_host_tests.BaseHostTest): + """Host side test for USB CDC & Serial classes.""" + + @staticmethod + def get_usb_serial_name(usb_id_str): + """Get USB serial device name as registered in the system. + + Search is based on the id received from the device itself. + Raises RuntimeError if the device is not found. + """ + vid, pid = (int(i, base=16) for i in str(usb_id_str).split(',')) + port_name = usb_serial_name(vid, pid) + if port_name is None: + err_msg = 'USB serial device (vid={:#04x}, pid={:#04x}) not found.' + raise RuntimeError(err_msg.format(vid, pid)) + return port_name + + def __init__(self): + super(USBSerialTest, self).__init__() + self.__bg_task = None + + def port_open_wait(self, usb_id_str): + """Open the serial and wait until it's closed by the device.""" + mbed_serial = serial.Serial() + try: + mbed_serial.port = retry_fun_call( + fun=functools.partial(self.get_usb_serial_name, usb_id_str), # pylint: disable=not-callable + num_retries=20, + retry_delay=0.05) + retry_fun_call( + fun=mbed_serial.open, + num_retries=10, + retry_delay=0.05) + try: + mbed_serial.read() # wait until closed + except (serial.portNotOpenError, serial.SerialException): + pass + except RetryError as exc: + self.log('TEST ERROR: {}'.format(exc)) + self.notify_complete(False) + return + + def port_open_close(self, usb_id_str): + mbed_serial = serial.Serial(timeout=0.5, write_timeout=0.1) + try: + mbed_serial.port = retry_fun_call( + fun=functools.partial(self.get_usb_serial_name, usb_id_str), # pylint: disable=not-callable + num_retries=20, + retry_delay=0.05) + retry_fun_call( + fun=mbed_serial.open, + num_retries=10, + retry_delay=0.05) + mbed_serial.reset_output_buffer() + time.sleep(TERM_REOPEN_DELAY) + mbed_serial.close() + except RetryError as exc: + self.log('TEST ERROR: {}'.format(exc)) + self.notify_complete(False) + return + + def send_data_sequence(self, usb_id_str, chunk_size=1): + """Open the serial and send a sequence of values. + + chunk_size defines the size of data sent in each write operation. + The input buffer content is discarded. + """ + mbed_serial = serial.Serial(write_timeout=0.1) + try: + mbed_serial.port = retry_fun_call( + fun=functools.partial(self.get_usb_serial_name, usb_id_str), # pylint: disable=not-callable + num_retries=20, + retry_delay=0.05) + retry_fun_call( + fun=mbed_serial.open, + num_retries=10, + retry_delay=0.05) + except RetryError as exc: + self.log('TEST ERROR: {}'.format(exc)) + self.notify_complete(False) + return + mbed_serial.reset_output_buffer() + for byteval in itertools.chain(reversed(range(0x100)), range(0x100)): + try: + payload = bytearray(chunk_size * (byteval,)) + mbed_serial.write(payload) +# self.log('SENT: {!r}'.format(payload)) + # Discard input buffer content. The data received from the + # device during the concurrent rx/tx test is irrelevant. + mbed_serial.reset_input_buffer() + except serial.SerialException as exc: + self.log('TEST ERROR: {}'.format(exc)) + self.notify_complete(False) + return + while mbed_serial.out_waiting > 0: + time.sleep(0.001) + mbed_serial.close() + + def loopback(self, usb_id_str): + """Open the serial and send back every byte received.""" + mbed_serial = serial.Serial(timeout=0.5, write_timeout=0.1) + try: + mbed_serial.port = retry_fun_call( + fun=functools.partial(self.get_usb_serial_name, usb_id_str), # pylint: disable=not-callable + num_retries=20, + retry_delay=0.05) + retry_fun_call( + fun=mbed_serial.open, + num_retries=10, + retry_delay=0.05) + except RetryError as exc: + self.log('TEST ERROR: {}'.format(exc)) + self.notify_complete(False) + return + mbed_serial.reset_output_buffer() + try: + payload = mbed_serial.read(1) + while len(payload) == 1: + mbed_serial.write(payload) +# self.log('SENT: {!r}'.format(payload)) + payload = mbed_serial.read(1) + except serial.SerialException as exc: + self.log('TEST ERROR: {}'.format(exc)) + self.notify_complete(False) + return + while mbed_serial.out_waiting > 0: + time.sleep(0.001) + mbed_serial.close() + + def setup(self): + self.register_callback(MSG_KEY_PORT_OPEN_WAIT, self.cb_port_open_wait) + self.register_callback(MSG_KEY_SEND_BYTES_SINGLE, self.cb_send_bytes_single) + self.register_callback(MSG_KEY_SEND_BYTES_MULTIPLE, self.cb_send_bytes_multiple) + self.register_callback(MSG_KEY_LOOPBACK, self.cb_loopback) + + def start_bg_task(self, **thread_kwargs): + """Start a new daemon thread. + + The callbacks delegate serial handling to a background task to + prevent any delays in the device side assert handling. Only one + background task is kept running to prevent multiple access + to serial. + """ + try: + self.__bg_task.join() + except (AttributeError, RuntimeError): + pass + self.__bg_task = threading.Thread(**thread_kwargs) + self.__bg_task.daemon = True + self.__bg_task.start() + + def cb_port_open_wait(self, key, value, timestamp): + """Open the serial and wait until it's closed by the device.""" + self.start_bg_task( + target=self.port_open_wait, + args=(value, )) + + def cb_send_bytes_single(self, key, value, timestamp): + """Open the serial and send a sequence of values.""" + self.start_bg_task( + target=self.send_data_sequence, + args=(value, 1)) + + def cb_send_bytes_multiple(self, key, value, timestamp): + """Open the serial and send a sequence of one byte values.""" + self.start_bg_task( + target=self.send_data_sequence, + args=(value, RX_BUFF_SIZE)) + + def cb_loopback(self, key, value, timestamp): + """Open the serial and send a sequence of multibyte values.""" + self.start_bg_task( + target=self.loopback, + args=(value, )) diff --git a/TESTS/usb_device/serial/README.md b/TESTS/usb_device/serial/README.md new file mode 100644 index 00000000000..f2c788eb3ff --- /dev/null +++ b/TESTS/usb_device/serial/README.md @@ -0,0 +1,18 @@ +# `udev` rules for Mbed USB CDC device + +Before running `tests-usb_device-serial` test suite on Debian-based Linux +distros, make sure to [update the `udev` rules][1] as follows: + +```bash +sudo tee /etc/udev/rules.d/99-ttyacms.rules >/dev/null < +#include "USBCDC.h" + +#define USB_CDC_VID 0x1f00 +#define USB_CDC_PID 0x2013 + +#define MSG_KEY_PORT_OPEN_WAIT "port_open_wait" +#define MSG_KEY_SEND_BYTES_SINGLE "send_single" +#define MSG_KEY_SEND_BYTES_MULTIPLE "send_multiple" +#define MSG_KEY_LOOPBACK "loopback" + +#define TX_BUFF_SIZE 32 +#define RX_BUFF_SIZE 32 +#define CDC_LOOPBACK_REPS 1200 +#define USB_RECONNECT_DELAY_MS 200 + +using utest::v1::Case; +using utest::v1::Specification; +using utest::v1::Harness; + +#define EF_SEND (1ul << 0) +EventFlags event_flags; + +bool send_testcase_data(const char *msg_key, uint16_t usb_vid, uint16_t usb_pid) +{ + char msg_value[10]; + int str_len = snprintf(msg_value, sizeof msg_value, "%04x,%04x", usb_vid, usb_pid); + if (str_len != (sizeof msg_value) - 1) { + utest_printf("Failed to compose a value string to be sent to host."); + return false; + } + greentea_send_kv(msg_key, msg_value); + return true; +} + +/** Test CDC USB reconnect + * + * Given the host has successfully opened the port of a USB CDC device + * When the USB device disconnects and connects again + * Then the host is able to successfully open the port again + */ +void test_cdc_usb_reconnect() +{ + USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); + TEST_ASSERT_FALSE(usb_cdc.configured()); + TEST_ASSERT_FALSE(usb_cdc.ready()); + + // Connect the USB device. + usb_cdc.connect(); + // Wait for the USB enumeration to complete. + while (!usb_cdc.configured()) { + wait_ms(1); + } + TEST_ASSERT_TRUE(usb_cdc.configured()); + TEST_ASSERT_FALSE(usb_cdc.ready()); + + if (!send_testcase_data(MSG_KEY_PORT_OPEN_WAIT, USB_CDC_VID, USB_CDC_PID)) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + // Wait for the host to open the port. + usb_cdc.wait_ready(); + TEST_ASSERT_TRUE(usb_cdc.configured()); + TEST_ASSERT_TRUE(usb_cdc.ready()); + + // Disconnect the USB device. + usb_cdc.disconnect(); + TEST_ASSERT_FALSE(usb_cdc.configured()); + TEST_ASSERT_FALSE(usb_cdc.ready()); + + wait_ms(USB_RECONNECT_DELAY_MS); + // Connect the USB device again. + usb_cdc.connect(); + // Wait for the USB enumeration to complete. + while (!usb_cdc.configured()) { + wait_ms(1); + } + TEST_ASSERT_TRUE(usb_cdc.configured()); + TEST_ASSERT_FALSE(usb_cdc.ready()); + + if (!send_testcase_data(MSG_KEY_PORT_OPEN_WAIT, USB_CDC_VID, USB_CDC_PID)) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + // Wait for the host to open the port again. + usb_cdc.wait_ready(); + TEST_ASSERT_TRUE(usb_cdc.configured()); + TEST_ASSERT_TRUE(usb_cdc.ready()); + + // Disconnect the USB device again. + usb_cdc.disconnect(); + TEST_ASSERT_FALSE(usb_cdc.configured()); + TEST_ASSERT_FALSE(usb_cdc.ready()); +} + +/** Test CDC receive single bytes + * + * Given the USB CDC device connected to a host + * When the host transmits a known sequence one byte at a time + * Then every byte received by the device matches the sequence + */ +void test_cdc_rx_single_bytes() +{ + USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); + usb_cdc.connect(); + if (send_testcase_data(MSG_KEY_SEND_BYTES_SINGLE, USB_CDC_VID, USB_CDC_PID) == false) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + usb_cdc.wait_ready(); + uint8_t buff = 0x01; + for (int expected = 0xff; expected >= 0; expected--) { + TEST_ASSERT(usb_cdc.receive(&buff, 1, NULL)); + TEST_ASSERT_EQUAL_UINT8(expected, buff); + } + for (int expected = 0; expected <= 0xff; expected++) { + TEST_ASSERT(usb_cdc.receive(&buff, 1, NULL)); + TEST_ASSERT_EQUAL_UINT8(expected, buff); + } + // Wait for the host to close its port. + while (usb_cdc.ready()) { + wait_ms(1); + } + usb_cdc.disconnect(); +} + +void tx_thread_fun(USBCDC *usb_cdc) +{ + uint8_t buff_val = 0; + uint8_t buff[TX_BUFF_SIZE] = { 0 }; + while (event_flags.get() & EF_SEND) { + if (!usb_cdc->send(buff, TX_BUFF_SIZE)) { + wait_ms(1); + continue; + } + buff_val++; + memset(buff, buff_val, TX_BUFF_SIZE); + } +} + +/** Test CDC receive single bytes concurrently + * + * Given the USB CDC device connected to a host + * When the host transmits a known sequence one byte at a time + * and at the same time the device transmits data to host + * Then every byte received by the device matches the sequence + */ +void test_cdc_rx_single_bytes_concurrent() +{ + USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); + usb_cdc.connect(); + if (send_testcase_data(MSG_KEY_SEND_BYTES_SINGLE, USB_CDC_VID, USB_CDC_PID) == false) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + usb_cdc.wait_ready(); + Thread tx_thread; + event_flags.set(EF_SEND); + tx_thread.start(mbed::callback(tx_thread_fun, &usb_cdc)); + uint8_t buff = 0x01; + for (int expected = 0xff; expected >= 0; expected--) { + TEST_ASSERT(usb_cdc.receive(&buff, 1, NULL)); + TEST_ASSERT_EQUAL_UINT8(expected, buff); + } + for (int expected = 0; expected <= 0xff; expected++) { + TEST_ASSERT(usb_cdc.receive(&buff, 1, NULL)); + TEST_ASSERT_EQUAL_UINT8(expected, buff); + } + event_flags.clear(EF_SEND); + tx_thread.join(); + // Wait for the host to close its port. + while (usb_cdc.ready()) { + wait_ms(1); + } + usb_cdc.disconnect(); +} + +/** Test CDC receive multiple bytes + * + * Given the USB CDC device connected to a host + * When the host transmits chunks of data following a known sequence + * Then every chunk received by the device matches the sequence + */ +void test_cdc_rx_multiple_bytes() +{ + USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); + usb_cdc.connect(); + if (send_testcase_data(MSG_KEY_SEND_BYTES_MULTIPLE, USB_CDC_VID, USB_CDC_PID) == false) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + usb_cdc.wait_ready(); + uint8_t buff[RX_BUFF_SIZE] = { 0 }; + uint8_t expected_buff[RX_BUFF_SIZE] = { 0 }; + for (int expected = 0xff; expected >= 0; expected--) { + memset(expected_buff, expected, RX_BUFF_SIZE); + TEST_ASSERT(usb_cdc.receive(buff, RX_BUFF_SIZE, NULL)); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_buff, buff, RX_BUFF_SIZE); + } + for (int expected = 0; expected <= 0xff; expected++) { + memset(expected_buff, expected, RX_BUFF_SIZE); + TEST_ASSERT(usb_cdc.receive(buff, RX_BUFF_SIZE, NULL)); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_buff, buff, RX_BUFF_SIZE); + } + // Wait for the host to close its port. + while (usb_cdc.ready()) { + wait_ms(1); + } + usb_cdc.disconnect(); +} + +/** Test CDC receive multiple bytes concurrently + * + * Given the USB CDC device connected to a host + * When the host transmits chunks of data following a known sequence + * and at the same time the device transmits data to host + * Then every chunk received by the device matches the sequence + */ +void test_cdc_rx_multiple_bytes_concurrent() +{ + USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); + usb_cdc.connect(); + if (send_testcase_data(MSG_KEY_SEND_BYTES_MULTIPLE, USB_CDC_VID, USB_CDC_PID) == false) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + usb_cdc.wait_ready(); + Thread tx_thread; + event_flags.set(EF_SEND); + tx_thread.start(mbed::callback(tx_thread_fun, &usb_cdc)); + uint8_t buff[RX_BUFF_SIZE] = { 0 }; + uint8_t expected_buff[RX_BUFF_SIZE] = { 0 }; + for (int expected = 0xff; expected >= 0; expected--) { + memset(expected_buff, expected, RX_BUFF_SIZE); + TEST_ASSERT(usb_cdc.receive(buff, RX_BUFF_SIZE, NULL)); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_buff, buff, RX_BUFF_SIZE); + } + for (int expected = 0; expected <= 0xff; expected++) { + memset(expected_buff, expected, RX_BUFF_SIZE); + TEST_ASSERT(usb_cdc.receive(buff, RX_BUFF_SIZE, NULL)); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_buff, buff, RX_BUFF_SIZE); + } + event_flags.clear(EF_SEND); + tx_thread.join(); + // Wait for the host to close its port. + while (usb_cdc.ready()) { + wait_ms(1); + } + usb_cdc.disconnect(); +} + +/** Test CDC loopback + * + * Given the USB CDC device connected to a host + * When the device transmits random bytes to host + * and the host transmits them back to the device + * Then every byte received by the device is equal to byte preciously sent + */ +void test_cdc_loopback() +{ + USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); + usb_cdc.connect(); + if (send_testcase_data(MSG_KEY_LOOPBACK, USB_CDC_VID, USB_CDC_PID) == false) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + usb_cdc.wait_ready(); + uint8_t rx_buff, tx_buff; + for (int i = 0; i < CDC_LOOPBACK_REPS; i++) { + tx_buff = (uint8_t)(rand() % 0x100); + rx_buff = (uint8_t)(tx_buff + 1); + TEST_ASSERT(usb_cdc.send(&tx_buff, 1)); + TEST_ASSERT(usb_cdc.receive(&rx_buff, 1, NULL)); + TEST_ASSERT_EQUAL_UINT8(tx_buff, rx_buff); + } + // Wait for the host to close its port. + while (usb_cdc.ready()) { + wait_ms(1); + } + usb_cdc.disconnect(); +} + +utest::v1::status_t testsuite_setup(const size_t number_of_cases) +{ + GREENTEA_SETUP(25, "usb_device_serial"); + srand((unsigned) ticker_read_us(get_us_ticker_data())); + return utest::v1::greentea_test_setup_handler(number_of_cases); +} + +Case cases[] = { + Case("CDC USB reconnect", test_cdc_usb_reconnect), + Case("CDC RX single bytes", test_cdc_rx_single_bytes), + Case("CDC RX single bytes concurrent", test_cdc_rx_single_bytes_concurrent), + Case("CDC RX multiple bytes", test_cdc_rx_multiple_bytes), + Case("CDC RX multiple bytes concurrent", test_cdc_rx_multiple_bytes_concurrent), + Case("CDC loopback", test_cdc_loopback), +}; + +Specification specification(testsuite_setup, cases); + +int main() +{ + return !Harness::run(specification); +} From 7d8b59035ad45dda7c7bce78010d02b035a6aba7 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 9 Aug 2018 15:46:05 +0200 Subject: [PATCH 388/488] Tests: USB: Add tests for Serial class. --- TESTS/host_tests/usb_device_serial.py | 9 ++ TESTS/usb_device/serial/main.cpp | 205 ++++++++++++++++++++++++++ 2 files changed, 214 insertions(+) diff --git a/TESTS/host_tests/usb_device_serial.py b/TESTS/host_tests/usb_device_serial.py index 82875bb9559..741fc60b7c8 100644 --- a/TESTS/host_tests/usb_device_serial.py +++ b/TESTS/host_tests/usb_device_serial.py @@ -25,6 +25,7 @@ MSG_KEY_PORT_OPEN_WAIT = 'port_open_wait' +MSG_KEY_PORT_OPEN_CLOSE = 'port_open_close' MSG_KEY_SEND_BYTES_SINGLE = 'send_single' MSG_KEY_SEND_BYTES_MULTIPLE = 'send_multiple' MSG_KEY_LOOPBACK = 'loopback' @@ -109,6 +110,7 @@ def port_open_wait(self, usb_id_str): return def port_open_close(self, usb_id_str): + """Open the serial and close it with a delay.""" mbed_serial = serial.Serial(timeout=0.5, write_timeout=0.1) try: mbed_serial.port = retry_fun_call( @@ -197,6 +199,7 @@ def loopback(self, usb_id_str): def setup(self): self.register_callback(MSG_KEY_PORT_OPEN_WAIT, self.cb_port_open_wait) + self.register_callback(MSG_KEY_PORT_OPEN_CLOSE, self.cb_port_open_close) self.register_callback(MSG_KEY_SEND_BYTES_SINGLE, self.cb_send_bytes_single) self.register_callback(MSG_KEY_SEND_BYTES_MULTIPLE, self.cb_send_bytes_multiple) self.register_callback(MSG_KEY_LOOPBACK, self.cb_loopback) @@ -223,6 +226,12 @@ def cb_port_open_wait(self, key, value, timestamp): target=self.port_open_wait, args=(value, )) + def cb_port_open_close(self, key, value, timestamp): + """Open the serial and close it with a delay.""" + self.start_bg_task( + target=self.port_open_close, + args=(value, )) + def cb_send_bytes_single(self, key, value, timestamp): """Open the serial and send a sequence of values.""" self.start_bg_task( diff --git a/TESTS/usb_device/serial/main.cpp b/TESTS/usb_device/serial/main.cpp index 177ccc86b08..683501e58a9 100644 --- a/TESTS/usb_device/serial/main.cpp +++ b/TESTS/usb_device/serial/main.cpp @@ -24,11 +24,15 @@ #include "mbed.h" #include #include "USBCDC.h" +#include "USBSerial.h" #define USB_CDC_VID 0x1f00 #define USB_CDC_PID 0x2013 +#define USB_SERIAL_VID 0x1f00 +#define USB_SERIAL_PID 0x2012 #define MSG_KEY_PORT_OPEN_WAIT "port_open_wait" +#define MSG_KEY_PORT_OPEN_CLOSE "port_open_close" #define MSG_KEY_SEND_BYTES_SINGLE "send_single" #define MSG_KEY_SEND_BYTES_MULTIPLE "send_multiple" #define MSG_KEY_LOOPBACK "loopback" @@ -36,6 +40,7 @@ #define TX_BUFF_SIZE 32 #define RX_BUFF_SIZE 32 #define CDC_LOOPBACK_REPS 1200 +#define SERIAL_LOOPBACK_REPS 100 #define USB_RECONNECT_DELAY_MS 200 using utest::v1::Case; @@ -304,6 +309,202 @@ void test_cdc_loopback() usb_cdc.disconnect(); } +/** Test Serial USB reconnect + * + * Given the host has successfully opened the port of a USB Serial device + * When the USB device disconnects and connects again + * Then the host is able to successfully open the port again + */ +void test_serial_usb_reconnect() +{ + USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); + TEST_ASSERT_FALSE(usb_serial.configured()); + TEST_ASSERT_FALSE(usb_serial.connected()); + TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); + + // Connect the USB device. + usb_serial.connect(); + // Wait for the USB enumeration to complete. + while (!usb_serial.configured()) { + wait_ms(1); + } + TEST_ASSERT_TRUE(usb_serial.configured()); + TEST_ASSERT_FALSE(usb_serial.connected()); + TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); + + if (!send_testcase_data(MSG_KEY_PORT_OPEN_WAIT, USB_SERIAL_VID, USB_SERIAL_PID)) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + // Wait for the host to open the port. + while (!usb_serial.connected()) { + wait_ms(1); + } + TEST_ASSERT_TRUE(usb_serial.configured()); + TEST_ASSERT_TRUE(usb_serial.connected()); + TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); + + // Disconnect the USB device. + usb_serial.disconnect(); + TEST_ASSERT_FALSE(usb_serial.configured()); + TEST_ASSERT_FALSE(usb_serial.connected()); + TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); + + wait_ms(USB_RECONNECT_DELAY_MS); + // Connect the USB device again. + usb_serial.connect(); + // Wait for the USB enumeration to complete. + while (!usb_serial.configured()) { + wait_ms(1); + } + TEST_ASSERT_TRUE(usb_serial.configured()); + TEST_ASSERT_FALSE(usb_serial.connected()); + TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); + + if (!send_testcase_data(MSG_KEY_PORT_OPEN_WAIT, USB_SERIAL_VID, USB_SERIAL_PID)) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + // Wait for the host to open the port again. + while (!usb_serial.connected()) { + wait_ms(1); + } + TEST_ASSERT_TRUE(usb_serial.configured()); + TEST_ASSERT_TRUE(usb_serial.connected()); + TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); + + // Disconnect the USB device again. + usb_serial.disconnect(); + TEST_ASSERT_FALSE(usb_serial.configured()); + TEST_ASSERT_FALSE(usb_serial.connected()); + TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); +} + +/** Test Serial terminal reopen + * + * Given the host has successfully opened the port of a USB Serial device + * When the host closes its port + * Then the host is able to successfully open the port again + */ +void test_serial_term_reopen() +{ + USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); + usb_serial.connect(); + if (!send_testcase_data(MSG_KEY_PORT_OPEN_CLOSE, USB_SERIAL_VID, USB_SERIAL_PID)) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + // Wait for the host to open the terminal. + while (!usb_serial.connected()) { + wait_ms(1); + } + TEST_ASSERT_TRUE(usb_serial.configured()); + TEST_ASSERT_TRUE(usb_serial.ready()); + TEST_ASSERT_TRUE(usb_serial.connected()); + TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); + + // Wait for the host to close the terminal. + while (usb_serial.ready()) { + wait_ms(1); + } + TEST_ASSERT_TRUE(usb_serial.configured()); + TEST_ASSERT_FALSE(usb_serial.ready()); + TEST_ASSERT_FALSE(usb_serial.connected()); + TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); + + if (!send_testcase_data(MSG_KEY_PORT_OPEN_CLOSE, USB_SERIAL_VID, USB_SERIAL_PID)) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + // Wait for the host to open the terminal again. + while (!usb_serial.connected()) { + wait_ms(1); + } + TEST_ASSERT_TRUE(usb_serial.configured()); + TEST_ASSERT_TRUE(usb_serial.ready()); + TEST_ASSERT_TRUE(usb_serial.connected()); + TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); + + // Wait for the host to close the terminal again. + while (usb_serial.ready()) { + wait_ms(1); + } + TEST_ASSERT_TRUE(usb_serial.configured()); + TEST_ASSERT_FALSE(usb_serial.ready()); + TEST_ASSERT_FALSE(usb_serial.connected()); + TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); + + usb_serial.disconnect(); +} + +/** Test Serial getc + * + * Given the USB Serial device connected to a host + * When the host transmits a known sequence one byte at a time + * Then every byte received by the device matches the sequence + */ +void test_serial_getc() +{ + USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); + usb_serial.connect(); + if (send_testcase_data(MSG_KEY_SEND_BYTES_SINGLE, USB_SERIAL_VID, USB_SERIAL_PID) == false) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + while (!usb_serial.connected()) { + wait_ms(1); + } + for (int expected = 0xff; expected >= 0; expected--) { + TEST_ASSERT_EQUAL_INT(expected, usb_serial.getc()); + } + for (int expected = 0; expected <= 0xff; expected++) { + TEST_ASSERT_EQUAL_INT(expected, usb_serial.getc()); + } + // Wait for the host to close its port. + while (usb_serial.ready()) { + wait_ms(1); + } + usb_serial.disconnect(); +} + +/** Test Serial printf & scanf + * + * Given the USB Serial device connected to a host + * When the device trensmits a formatted string with a random value + * using the printf method + * and the host sends it back to the device + * Then the device can successfully read the value using scanf method + * and the value received is equal value sent + */ +void test_serial_printf_scanf() +{ + USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); + usb_serial.connect(); + if (!send_testcase_data(MSG_KEY_LOOPBACK, USB_SERIAL_VID, USB_SERIAL_PID)) { + TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); + return; + } + while (!usb_serial.connected()) { + wait_ms(1); + } + static const char fmt[] = "Formatted\nstring %i."; + int tx_val, rx_val, rc; + for (int i = 0; i < SERIAL_LOOPBACK_REPS; i++) { + tx_val = rand(); + rx_val = tx_val + 1; + rc = usb_serial.printf(fmt, tx_val); + TEST_ASSERT(rc > 0); + rc = usb_serial.scanf(fmt, &rx_val); + TEST_ASSERT(rc == 1); + TEST_ASSERT_EQUAL_INT(tx_val, rx_val); + } + // Wait for the host to close its port. + while (usb_serial.ready()) { + wait_ms(1); + } + usb_serial.disconnect(); +} + utest::v1::status_t testsuite_setup(const size_t number_of_cases) { GREENTEA_SETUP(25, "usb_device_serial"); @@ -318,6 +519,10 @@ Case cases[] = { Case("CDC RX multiple bytes", test_cdc_rx_multiple_bytes), Case("CDC RX multiple bytes concurrent", test_cdc_rx_multiple_bytes_concurrent), Case("CDC loopback", test_cdc_loopback), + Case("Serial USB reconnect", test_serial_usb_reconnect), + Case("Serial terminal reopen", test_serial_term_reopen), + Case("Serial getc", test_serial_getc), + Case("Serial printf/scanf", test_serial_printf_scanf), }; Specification specification(testsuite_setup, cases); From 6eeabf0626b55bb607579946d529192d2104e775 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Fri, 10 Aug 2018 15:30:46 +0200 Subject: [PATCH 389/488] Tests: USB: Fix USB reconnect tests for Win hosts --- TESTS/usb_device/serial/main.cpp | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/TESTS/usb_device/serial/main.cpp b/TESTS/usb_device/serial/main.cpp index 683501e58a9..e0052e34d32 100644 --- a/TESTS/usb_device/serial/main.cpp +++ b/TESTS/usb_device/serial/main.cpp @@ -43,6 +43,10 @@ #define SERIAL_LOOPBACK_REPS 100 #define USB_RECONNECT_DELAY_MS 200 +// Additional delay necessary for Windows hosts +// to handle the reconnect operation correctly. +#define USB_DISCONNECT_DELAY_MS 1 + using utest::v1::Case; using utest::v1::Specification; using utest::v1::Harness; @@ -92,6 +96,7 @@ void test_cdc_usb_reconnect() TEST_ASSERT_TRUE(usb_cdc.configured()); TEST_ASSERT_TRUE(usb_cdc.ready()); + wait_ms(USB_DISCONNECT_DELAY_MS); // Disconnect the USB device. usb_cdc.disconnect(); TEST_ASSERT_FALSE(usb_cdc.configured()); @@ -116,6 +121,7 @@ void test_cdc_usb_reconnect() TEST_ASSERT_TRUE(usb_cdc.configured()); TEST_ASSERT_TRUE(usb_cdc.ready()); + wait_ms(USB_DISCONNECT_DELAY_MS); // Disconnect the USB device again. usb_cdc.disconnect(); TEST_ASSERT_FALSE(usb_cdc.configured()); @@ -345,6 +351,7 @@ void test_serial_usb_reconnect() TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); // Disconnect the USB device. + wait_ms(USB_DISCONNECT_DELAY_MS); usb_serial.disconnect(); TEST_ASSERT_FALSE(usb_serial.configured()); TEST_ASSERT_FALSE(usb_serial.connected()); @@ -374,6 +381,7 @@ void test_serial_usb_reconnect() TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); // Disconnect the USB device again. + wait_ms(USB_DISCONNECT_DELAY_MS); usb_serial.disconnect(); TEST_ASSERT_FALSE(usb_serial.configured()); TEST_ASSERT_FALSE(usb_serial.connected()); From a900ac0b211ef17a6f546d2121afe1d2c0105049 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Mon, 3 Sep 2018 11:01:09 +0200 Subject: [PATCH 390/488] Tests: USB: Use the serial number to find device Use the USB device SN instead of VID & PID to find the device port name on the host system. --- TESTS/host_tests/usb_device_serial.py | 13 ++-- TESTS/usb_device/serial/main.cpp | 106 +++++++++++--------------- 2 files changed, 51 insertions(+), 68 deletions(-) diff --git a/TESTS/host_tests/usb_device_serial.py b/TESTS/host_tests/usb_device_serial.py index 741fc60b7c8..d5abf1669e7 100644 --- a/TESTS/host_tests/usb_device_serial.py +++ b/TESTS/host_tests/usb_device_serial.py @@ -34,10 +34,10 @@ TERM_REOPEN_DELAY = 0.1 -def usb_serial_name(vid, pid): - """Get USB serial device name based on vid and pid.""" +def usb_serial_name(serial_number): + """Get USB serial device name based on the device serial number.""" for port_info in stlp.comports(): - if port_info.vid == vid and port_info.pid == pid: + if port_info.serial_number == serial_number: return port_info.device return None @@ -77,11 +77,10 @@ def get_usb_serial_name(usb_id_str): Search is based on the id received from the device itself. Raises RuntimeError if the device is not found. """ - vid, pid = (int(i, base=16) for i in str(usb_id_str).split(',')) - port_name = usb_serial_name(vid, pid) + port_name = usb_serial_name(usb_id_str) if port_name is None: - err_msg = 'USB serial device (vid={:#04x}, pid={:#04x}) not found.' - raise RuntimeError(err_msg.format(vid, pid)) + err_msg = 'USB serial device (SN={}) not found.' + raise RuntimeError(err_msg.format(usb_id_str)) return port_name def __init__(self): diff --git a/TESTS/usb_device/serial/main.cpp b/TESTS/usb_device/serial/main.cpp index e0052e34d32..0f754ca3c58 100644 --- a/TESTS/usb_device/serial/main.cpp +++ b/TESTS/usb_device/serial/main.cpp @@ -30,6 +30,7 @@ #define USB_CDC_PID 0x2013 #define USB_SERIAL_VID 0x1f00 #define USB_SERIAL_PID 0x2012 +#define USB_SN_MAX_LEN 128 #define MSG_KEY_PORT_OPEN_WAIT "port_open_wait" #define MSG_KEY_PORT_OPEN_CLOSE "port_open_close" @@ -54,16 +55,18 @@ using utest::v1::Harness; #define EF_SEND (1ul << 0) EventFlags event_flags; -bool send_testcase_data(const char *msg_key, uint16_t usb_vid, uint16_t usb_pid) +char *usb_desc2str(const uint8_t *usb_desc, char *str, size_t n) { - char msg_value[10]; - int str_len = snprintf(msg_value, sizeof msg_value, "%04x,%04x", usb_vid, usb_pid); - if (str_len != (sizeof msg_value) - 1) { - utest_printf("Failed to compose a value string to be sent to host."); - return false; - } - greentea_send_kv(msg_key, msg_value); - return true; + const size_t desc_size = usb_desc[0] - 2; + const uint8_t *src = &usb_desc[2]; + size_t i, j; + for (i = 0, j = 0; i < n && j < desc_size; i++, j += 2) { + str[i] = src[j]; + } + for (; i < n; i++) { + str[i] = '\0'; + } + return str; } /** Test CDC USB reconnect @@ -75,6 +78,8 @@ bool send_testcase_data(const char *msg_key, uint16_t usb_vid, uint16_t usb_pid) void test_cdc_usb_reconnect() { USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); + char usb_cdc_sn[USB_SN_MAX_LEN] = { }; + usb_desc2str(usb_cdc.string_iserial_desc(), usb_cdc_sn, USB_SN_MAX_LEN); TEST_ASSERT_FALSE(usb_cdc.configured()); TEST_ASSERT_FALSE(usb_cdc.ready()); @@ -87,10 +92,7 @@ void test_cdc_usb_reconnect() TEST_ASSERT_TRUE(usb_cdc.configured()); TEST_ASSERT_FALSE(usb_cdc.ready()); - if (!send_testcase_data(MSG_KEY_PORT_OPEN_WAIT, USB_CDC_VID, USB_CDC_PID)) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, usb_cdc_sn); // Wait for the host to open the port. usb_cdc.wait_ready(); TEST_ASSERT_TRUE(usb_cdc.configured()); @@ -112,10 +114,7 @@ void test_cdc_usb_reconnect() TEST_ASSERT_TRUE(usb_cdc.configured()); TEST_ASSERT_FALSE(usb_cdc.ready()); - if (!send_testcase_data(MSG_KEY_PORT_OPEN_WAIT, USB_CDC_VID, USB_CDC_PID)) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, usb_cdc_sn); // Wait for the host to open the port again. usb_cdc.wait_ready(); TEST_ASSERT_TRUE(usb_cdc.configured()); @@ -137,11 +136,10 @@ void test_cdc_usb_reconnect() void test_cdc_rx_single_bytes() { USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); + char usb_cdc_sn[USB_SN_MAX_LEN] = { }; + usb_desc2str(usb_cdc.string_iserial_desc(), usb_cdc_sn, USB_SN_MAX_LEN); usb_cdc.connect(); - if (send_testcase_data(MSG_KEY_SEND_BYTES_SINGLE, USB_CDC_VID, USB_CDC_PID) == false) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, usb_cdc_sn); usb_cdc.wait_ready(); uint8_t buff = 0x01; for (int expected = 0xff; expected >= 0; expected--) { @@ -183,11 +181,10 @@ void tx_thread_fun(USBCDC *usb_cdc) void test_cdc_rx_single_bytes_concurrent() { USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); + char usb_cdc_sn[USB_SN_MAX_LEN] = { }; + usb_desc2str(usb_cdc.string_iserial_desc(), usb_cdc_sn, USB_SN_MAX_LEN); usb_cdc.connect(); - if (send_testcase_data(MSG_KEY_SEND_BYTES_SINGLE, USB_CDC_VID, USB_CDC_PID) == false) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, usb_cdc_sn); usb_cdc.wait_ready(); Thread tx_thread; event_flags.set(EF_SEND); @@ -219,11 +216,10 @@ void test_cdc_rx_single_bytes_concurrent() void test_cdc_rx_multiple_bytes() { USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); + char usb_cdc_sn[USB_SN_MAX_LEN] = { }; + usb_desc2str(usb_cdc.string_iserial_desc(), usb_cdc_sn, USB_SN_MAX_LEN); usb_cdc.connect(); - if (send_testcase_data(MSG_KEY_SEND_BYTES_MULTIPLE, USB_CDC_VID, USB_CDC_PID) == false) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, usb_cdc_sn); usb_cdc.wait_ready(); uint8_t buff[RX_BUFF_SIZE] = { 0 }; uint8_t expected_buff[RX_BUFF_SIZE] = { 0 }; @@ -254,11 +250,10 @@ void test_cdc_rx_multiple_bytes() void test_cdc_rx_multiple_bytes_concurrent() { USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); + char usb_cdc_sn[USB_SN_MAX_LEN] = { }; + usb_desc2str(usb_cdc.string_iserial_desc(), usb_cdc_sn, USB_SN_MAX_LEN); usb_cdc.connect(); - if (send_testcase_data(MSG_KEY_SEND_BYTES_MULTIPLE, USB_CDC_VID, USB_CDC_PID) == false) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, usb_cdc_sn); usb_cdc.wait_ready(); Thread tx_thread; event_flags.set(EF_SEND); @@ -294,11 +289,10 @@ void test_cdc_rx_multiple_bytes_concurrent() void test_cdc_loopback() { USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); + char usb_cdc_sn[USB_SN_MAX_LEN] = { }; + usb_desc2str(usb_cdc.string_iserial_desc(), usb_cdc_sn, USB_SN_MAX_LEN); usb_cdc.connect(); - if (send_testcase_data(MSG_KEY_LOOPBACK, USB_CDC_VID, USB_CDC_PID) == false) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_LOOPBACK, usb_cdc_sn); usb_cdc.wait_ready(); uint8_t rx_buff, tx_buff; for (int i = 0; i < CDC_LOOPBACK_REPS; i++) { @@ -324,6 +318,8 @@ void test_cdc_loopback() void test_serial_usb_reconnect() { USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); + char usb_serial_sn[USB_SN_MAX_LEN] = { }; + usb_desc2str(usb_serial.string_iserial_desc(), usb_serial_sn, USB_SN_MAX_LEN); TEST_ASSERT_FALSE(usb_serial.configured()); TEST_ASSERT_FALSE(usb_serial.connected()); TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); @@ -338,10 +334,7 @@ void test_serial_usb_reconnect() TEST_ASSERT_FALSE(usb_serial.connected()); TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); - if (!send_testcase_data(MSG_KEY_PORT_OPEN_WAIT, USB_SERIAL_VID, USB_SERIAL_PID)) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, usb_serial_sn); // Wait for the host to open the port. while (!usb_serial.connected()) { wait_ms(1); @@ -368,10 +361,7 @@ void test_serial_usb_reconnect() TEST_ASSERT_FALSE(usb_serial.connected()); TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); - if (!send_testcase_data(MSG_KEY_PORT_OPEN_WAIT, USB_SERIAL_VID, USB_SERIAL_PID)) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, usb_serial_sn); // Wait for the host to open the port again. while (!usb_serial.connected()) { wait_ms(1); @@ -397,11 +387,10 @@ void test_serial_usb_reconnect() void test_serial_term_reopen() { USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); + char usb_serial_sn[USB_SN_MAX_LEN] = { }; + usb_desc2str(usb_serial.string_iserial_desc(), usb_serial_sn, USB_SN_MAX_LEN); usb_serial.connect(); - if (!send_testcase_data(MSG_KEY_PORT_OPEN_CLOSE, USB_SERIAL_VID, USB_SERIAL_PID)) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_PORT_OPEN_CLOSE, usb_serial_sn); // Wait for the host to open the terminal. while (!usb_serial.connected()) { wait_ms(1); @@ -420,10 +409,7 @@ void test_serial_term_reopen() TEST_ASSERT_FALSE(usb_serial.connected()); TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); - if (!send_testcase_data(MSG_KEY_PORT_OPEN_CLOSE, USB_SERIAL_VID, USB_SERIAL_PID)) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_PORT_OPEN_CLOSE, usb_serial_sn); // Wait for the host to open the terminal again. while (!usb_serial.connected()) { wait_ms(1); @@ -454,11 +440,10 @@ void test_serial_term_reopen() void test_serial_getc() { USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); + char usb_serial_sn[USB_SN_MAX_LEN] = { }; + usb_desc2str(usb_serial.string_iserial_desc(), usb_serial_sn, USB_SN_MAX_LEN); usb_serial.connect(); - if (send_testcase_data(MSG_KEY_SEND_BYTES_SINGLE, USB_SERIAL_VID, USB_SERIAL_PID) == false) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, usb_serial_sn); while (!usb_serial.connected()) { wait_ms(1); } @@ -487,11 +472,10 @@ void test_serial_getc() void test_serial_printf_scanf() { USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); + char usb_serial_sn[USB_SN_MAX_LEN] = { }; + usb_desc2str(usb_serial.string_iserial_desc(), usb_serial_sn, USB_SN_MAX_LEN); usb_serial.connect(); - if (!send_testcase_data(MSG_KEY_LOOPBACK, USB_SERIAL_VID, USB_SERIAL_PID)) { - TEST_ASSERT_MESSAGE(0, "Dev-host communication error."); - return; - } + greentea_send_kv(MSG_KEY_LOOPBACK, usb_serial_sn); while (!usb_serial.connected()) { wait_ms(1); } From 645e75067cf155e28767ca253e9d41b4d57b58bc Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Wed, 5 Sep 2018 11:06:03 +0200 Subject: [PATCH 391/488] Tests: USB: Add Serial test for line coding change --- TESTS/host_tests/usb_device_serial.py | 62 ++++++++++++ TESTS/usb_device/serial/main.cpp | 136 +++++++++++++++++++++++++- 2 files changed, 196 insertions(+), 2 deletions(-) diff --git a/TESTS/host_tests/usb_device_serial.py b/TESTS/host_tests/usb_device_serial.py index d5abf1669e7..9394811bf9d 100644 --- a/TESTS/host_tests/usb_device_serial.py +++ b/TESTS/host_tests/usb_device_serial.py @@ -29,9 +29,11 @@ MSG_KEY_SEND_BYTES_SINGLE = 'send_single' MSG_KEY_SEND_BYTES_MULTIPLE = 'send_multiple' MSG_KEY_LOOPBACK = 'loopback' +MSG_KEY_CHANGE_LINE_CODING = 'change_lc' RX_BUFF_SIZE = 32 TERM_REOPEN_DELAY = 0.1 +LINE_CODING_STRLEN = 13 def usb_serial_name(serial_number): @@ -70,6 +72,22 @@ def retry_fun_call(fun, num_retries=3, retry_delay=0.0): class USBSerialTest(mbed_host_tests.BaseHostTest): """Host side test for USB CDC & Serial classes.""" + _BYTESIZES = { + 5: serial.FIVEBITS, + 6: serial.SIXBITS, + 7: serial.SEVENBITS, + 8: serial.EIGHTBITS} + _PARITIES = { + 0: serial.PARITY_NONE, + 1: serial.PARITY_ODD, + 2: serial.PARITY_EVEN, + 3: serial.PARITY_MARK, + 4: serial.PARITY_SPACE} + _STOPBITS = { + 0: serial.STOPBITS_ONE, + 1: serial.STOPBITS_ONE_POINT_FIVE, + 2: serial.STOPBITS_TWO} + @staticmethod def get_usb_serial_name(usb_id_str): """Get USB serial device name as registered in the system. @@ -196,12 +214,50 @@ def loopback(self, usb_id_str): time.sleep(0.001) mbed_serial.close() + def change_line_coding(self, usb_id_str): + """Open the serial and change serial params according to device request. + + New line coding params are read from the device serial data. + """ + mbed_serial = serial.Serial(timeout=0.5) + try: + mbed_serial.port = retry_fun_call( + fun=functools.partial(self.get_usb_serial_name, usb_id_str), # pylint: disable=not-callable + num_retries=20, + retry_delay=0.05) + retry_fun_call( + fun=mbed_serial.open, + num_retries=10, + retry_delay=0.05) + except RetryError as exc: + self.log('TEST ERROR: {}'.format(exc)) + self.notify_complete(False) + return + mbed_serial.reset_output_buffer() + try: + payload = mbed_serial.read(LINE_CODING_STRLEN) + while len(payload) == LINE_CODING_STRLEN: + baud, bits, parity, stop = (int(i) for i in payload.split(',')) + new_line_coding = { + 'baudrate': baud, + 'bytesize': self._BYTESIZES[bits], + 'parity': self._PARITIES[parity], + 'stopbits': self._STOPBITS[stop]} + mbed_serial.apply_settings(new_line_coding) + payload = mbed_serial.read(LINE_CODING_STRLEN) + except serial.SerialException as exc: + self.log('TEST ERROR: {}'.format(exc)) + self.notify_complete(False) + return + mbed_serial.close() + def setup(self): self.register_callback(MSG_KEY_PORT_OPEN_WAIT, self.cb_port_open_wait) self.register_callback(MSG_KEY_PORT_OPEN_CLOSE, self.cb_port_open_close) self.register_callback(MSG_KEY_SEND_BYTES_SINGLE, self.cb_send_bytes_single) self.register_callback(MSG_KEY_SEND_BYTES_MULTIPLE, self.cb_send_bytes_multiple) self.register_callback(MSG_KEY_LOOPBACK, self.cb_loopback) + self.register_callback(MSG_KEY_CHANGE_LINE_CODING, self.cb_change_line_coding) def start_bg_task(self, **thread_kwargs): """Start a new daemon thread. @@ -248,3 +304,9 @@ def cb_loopback(self, key, value, timestamp): self.start_bg_task( target=self.loopback, args=(value, )) + + def cb_change_line_coding(self, key, value, timestamp): + """Open the serial and change the line coding.""" + self.start_bg_task( + target=self.change_line_coding, + args=(value, )) diff --git a/TESTS/usb_device/serial/main.cpp b/TESTS/usb_device/serial/main.cpp index 0f754ca3c58..5c86c40a79f 100644 --- a/TESTS/usb_device/serial/main.cpp +++ b/TESTS/usb_device/serial/main.cpp @@ -37,6 +37,7 @@ #define MSG_KEY_SEND_BYTES_SINGLE "send_single" #define MSG_KEY_SEND_BYTES_MULTIPLE "send_multiple" #define MSG_KEY_LOOPBACK "loopback" +#define MSG_KEY_CHANGE_LINE_CODING "change_lc" #define TX_BUFF_SIZE 32 #define RX_BUFF_SIZE 32 @@ -48,10 +49,70 @@ // to handle the reconnect operation correctly. #define USB_DISCONNECT_DELAY_MS 1 +#define LINE_CODING_STRLEN 13 // 6 + 2 + 1 + 1 + 3 * comma + using utest::v1::Case; using utest::v1::Specification; using utest::v1::Harness; +typedef struct LineCoding { + // bits per second + int baud; + + // 5, 6, 7, 8 or 16 + int bits; + + // 0 -- None, + // 1 -- Odd, + // 2 -- Even, + // 3 -- Mark, + // 4 -- Space + int parity; + + // 0 -- 1 Stop bit, + // 1 -- 1.5 Stop bits, + // 2 -- 2 Stop bits + int stop; + + int get_num_diffs(LineCoding const &other) const + { + int diffs = 0; + if (baud != other.baud) { + diffs++; + } + if (bits != other.bits) { + diffs++; + } + if (parity != other.parity) { + diffs++; + } + if (stop != other.stop) { + diffs++; + } + return diffs; + } +} line_coding_t; + +line_coding_t default_lc = { 9600, 8, 0, 0 }; + +// There is no POSIX support for 1.5 stop bits. +// Do not set stop bits to 1.5 to keep tests compatible with all supported +// host systems. +line_coding_t test_codings[] = { + { 9600, 5, 0, 2 }, + { 4800, 7, 2, 0 }, + { 19200, 8, 0, 2 }, + { 115200, 8, 0, 0 }, + { 38400, 8, 1, 0 }, + { 1200, 8, 0, 0 }, + { 19200, 8, 0, 0 }, + { 2400, 7, 2, 0 }, + { 9600, 8, 0, 0 }, + { 57600, 8, 0, 0 }, +}; + +Mail lc_mail; + #define EF_SEND (1ul << 0) EventFlags event_flags; @@ -463,7 +524,7 @@ void test_serial_getc() /** Test Serial printf & scanf * * Given the USB Serial device connected to a host - * When the device trensmits a formatted string with a random value + * When the device transmits a formatted string with a random value * using the printf method * and the host sends it back to the device * Then the device can successfully read the value using scanf method @@ -497,9 +558,79 @@ void test_serial_printf_scanf() usb_serial.disconnect(); } +void line_coding_changed_cb(int baud, int bits, int parity, int stop) +{ + line_coding_t *lc = lc_mail.alloc(); + lc->baud = baud; + lc->bits = bits; + lc->parity = parity; + lc->stop = stop; + lc_mail.put(lc); +} + +/** Test Serial / CDC line coding change + * + * Given the device transmits a set of line coding params to host + * When the host updates serial port settings + * Then line_coding_changed() callback is called + * and the line coding is set as expected + */ +void test_serial_line_coding_change() +{ + USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); + char usb_serial_sn[USB_SN_MAX_LEN] = { }; + usb_desc2str(usb_serial.string_iserial_desc(), usb_serial_sn, USB_SN_MAX_LEN); + usb_serial.connect(); + greentea_send_kv(MSG_KEY_CHANGE_LINE_CODING, usb_serial_sn); + while (!usb_serial.connected()) { + wait_ms(1); + } + usb_serial.attach(line_coding_changed_cb); + size_t num_line_codings = sizeof test_codings / sizeof test_codings[0]; + line_coding_t *lc_prev = &default_lc; + line_coding_t *lc_expected = NULL; + line_coding_t *lc_actual = NULL; + int num_expected_callbacks, rc; + for (size_t i = 0; i < num_line_codings; i++) { + lc_expected = &(test_codings[i]); + num_expected_callbacks = lc_prev->get_num_diffs(*lc_expected); + rc = usb_serial.printf("%06i,%02i,%01i,%01i", lc_expected->baud, lc_expected->bits, lc_expected->parity, + lc_expected->stop); + TEST_ASSERT_EQUAL_INT(LINE_CODING_STRLEN, rc); + // The pyserial Python module does not update all line coding params + // at once. It updates params one by one instead, and since every + // update is followed by port reconfiguration we get multiple + // calls to line_coding_changed callback on the device. + while (num_expected_callbacks > 0) { + num_expected_callbacks--; + osEvent event = lc_mail.get(); + TEST_ASSERT_EQUAL_UINT32(osEventMail, event.status); + lc_actual = (line_coding_t *) event.value.p; + if (lc_expected->get_num_diffs(*lc_actual) == 0) { + break; + } else if (num_expected_callbacks > 0) { + // Discard lc_actual only if there is still a chance to get new + // set of params. + lc_mail.free(lc_actual); + } + } + TEST_ASSERT_EQUAL_INT(lc_expected->baud, lc_actual->baud); + TEST_ASSERT_EQUAL_INT(lc_expected->bits, lc_actual->bits); + TEST_ASSERT_EQUAL_INT(lc_expected->parity, lc_actual->parity); + TEST_ASSERT_EQUAL_INT(lc_expected->stop, lc_actual->stop); + lc_mail.free(lc_actual); + lc_prev = lc_expected; + } + // Wait for the host to close its port. + while (usb_serial.ready()) { + wait_ms(1); + } + usb_serial.disconnect(); +} + utest::v1::status_t testsuite_setup(const size_t number_of_cases) { - GREENTEA_SETUP(25, "usb_device_serial"); + GREENTEA_SETUP(35, "usb_device_serial"); srand((unsigned) ticker_read_us(get_us_ticker_data())); return utest::v1::greentea_test_setup_handler(number_of_cases); } @@ -515,6 +646,7 @@ Case cases[] = { Case("Serial terminal reopen", test_serial_term_reopen), Case("Serial getc", test_serial_getc), Case("Serial printf/scanf", test_serial_printf_scanf), + Case("Serial line coding change", test_serial_line_coding_change), }; Specification specification(testsuite_setup, cases); From dfa85f817522c3cce4e4ea734315b2410d8f189e Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 20 Sep 2018 11:37:54 +0200 Subject: [PATCH 392/488] Tests: USB: Wait before closing host's port This delay eliminates the possibility of the device detecting the port being closed when still waiting for data. --- TESTS/host_tests/usb_device_serial.py | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/TESTS/host_tests/usb_device_serial.py b/TESTS/host_tests/usb_device_serial.py index 9394811bf9d..7574ee92cb0 100644 --- a/TESTS/host_tests/usb_device_serial.py +++ b/TESTS/host_tests/usb_device_serial.py @@ -32,6 +32,7 @@ MSG_KEY_CHANGE_LINE_CODING = 'change_lc' RX_BUFF_SIZE = 32 +TERM_CLOSE_DELAY = 0.01 TERM_REOPEN_DELAY = 0.1 LINE_CODING_STRLEN = 13 @@ -181,6 +182,7 @@ def send_data_sequence(self, usb_id_str, chunk_size=1): return while mbed_serial.out_waiting > 0: time.sleep(0.001) + time.sleep(TERM_CLOSE_DELAY) mbed_serial.close() def loopback(self, usb_id_str): @@ -212,6 +214,7 @@ def loopback(self, usb_id_str): return while mbed_serial.out_waiting > 0: time.sleep(0.001) + time.sleep(TERM_CLOSE_DELAY) mbed_serial.close() def change_line_coding(self, usb_id_str): @@ -249,6 +252,7 @@ def change_line_coding(self, usb_id_str): self.log('TEST ERROR: {}'.format(exc)) self.notify_complete(False) return + time.sleep(TERM_CLOSE_DELAY) mbed_serial.close() def setup(self): From b7eb996518d989a194a85b4894d9d5617c713608 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 20 Sep 2018 11:44:03 +0200 Subject: [PATCH 393/488] Tests: USB: Wait before transmitting data to host Despite having ECHO and ECHOCTL POSIX lflags disabled by default by pyserial, a delay is needed for host to properly handle data received from USB serial/CDC device. With no delay host would echo 0x00-0x31 characters prefixed with '^'. --- TESTS/usb_device/serial/main.cpp | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/TESTS/usb_device/serial/main.cpp b/TESTS/usb_device/serial/main.cpp index 5c86c40a79f..562b390a9bc 100644 --- a/TESTS/usb_device/serial/main.cpp +++ b/TESTS/usb_device/serial/main.cpp @@ -49,6 +49,12 @@ // to handle the reconnect operation correctly. #define USB_DISCONNECT_DELAY_MS 1 +// Despite having ECHO and ECHOCTL POSIX lflags disabled by default by +// pyserial, a delay is needed for host to properly handle data received +// from USB serial/CDC device. +// With no delay host would echo 0x00-0x31 characters prefixed with '^'. +#define TX_DELAY_MS 10 + #define LINE_CODING_STRLEN 13 // 6 + 2 + 1 + 1 + 3 * comma using utest::v1::Case; @@ -247,6 +253,7 @@ void test_cdc_rx_single_bytes_concurrent() usb_cdc.connect(); greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, usb_cdc_sn); usb_cdc.wait_ready(); + wait_ms(TX_DELAY_MS); Thread tx_thread; event_flags.set(EF_SEND); tx_thread.start(mbed::callback(tx_thread_fun, &usb_cdc)); @@ -316,6 +323,7 @@ void test_cdc_rx_multiple_bytes_concurrent() usb_cdc.connect(); greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, usb_cdc_sn); usb_cdc.wait_ready(); + wait_ms(TX_DELAY_MS); Thread tx_thread; event_flags.set(EF_SEND); tx_thread.start(mbed::callback(tx_thread_fun, &usb_cdc)); @@ -355,6 +363,7 @@ void test_cdc_loopback() usb_cdc.connect(); greentea_send_kv(MSG_KEY_LOOPBACK, usb_cdc_sn); usb_cdc.wait_ready(); + wait_ms(TX_DELAY_MS); uint8_t rx_buff, tx_buff; for (int i = 0; i < CDC_LOOPBACK_REPS; i++) { tx_buff = (uint8_t)(rand() % 0x100); @@ -540,6 +549,7 @@ void test_serial_printf_scanf() while (!usb_serial.connected()) { wait_ms(1); } + wait_ms(TX_DELAY_MS); static const char fmt[] = "Formatted\nstring %i."; int tx_val, rx_val, rc; for (int i = 0; i < SERIAL_LOOPBACK_REPS; i++) { @@ -585,6 +595,7 @@ void test_serial_line_coding_change() while (!usb_serial.connected()) { wait_ms(1); } + wait_ms(TX_DELAY_MS); usb_serial.attach(line_coding_changed_cb); size_t num_line_codings = sizeof test_codings / sizeof test_codings[0]; line_coding_t *lc_prev = &default_lc; From 4bfbe9de78c79d1830543493bd5a14cca0c1dc4b Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 11 Oct 2018 14:29:19 +0200 Subject: [PATCH 394/488] Tests: USB: Correct reconnect delay Setting to 1 ms to be on the safe side. The USB spec defines this delay to be at least 200 us. --- TESTS/usb_device/serial/main.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/TESTS/usb_device/serial/main.cpp b/TESTS/usb_device/serial/main.cpp index 562b390a9bc..2f55df43fbb 100644 --- a/TESTS/usb_device/serial/main.cpp +++ b/TESTS/usb_device/serial/main.cpp @@ -43,7 +43,7 @@ #define RX_BUFF_SIZE 32 #define CDC_LOOPBACK_REPS 1200 #define SERIAL_LOOPBACK_REPS 100 -#define USB_RECONNECT_DELAY_MS 200 +#define USB_RECONNECT_DELAY_MS 1 // Additional delay necessary for Windows hosts // to handle the reconnect operation correctly. From 2011c34d08176b1db79c0f31993afebf73a78cf8 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Tue, 16 Oct 2018 09:18:30 +0200 Subject: [PATCH 395/488] Tests: USB: Use SN generated by the host machine --- TESTS/host_tests/usb_device_serial.py | 55 +++--- TESTS/usb_device/serial/main.cpp | 235 +++++++++++++++++++------- 2 files changed, 206 insertions(+), 84 deletions(-) diff --git a/TESTS/host_tests/usb_device_serial.py b/TESTS/host_tests/usb_device_serial.py index 7574ee92cb0..5ecba8b93c3 100644 --- a/TESTS/host_tests/usb_device_serial.py +++ b/TESTS/host_tests/usb_device_serial.py @@ -19,11 +19,14 @@ import itertools import time import threading +import uuid import serial import serial.tools.list_ports as stlp import mbed_host_tests +MSG_KEY_DEVICE_READY = 'ready' +MSG_KEY_SERIAL_NUMBER = 'usb_dev_sn' MSG_KEY_PORT_OPEN_WAIT = 'port_open_wait' MSG_KEY_PORT_OPEN_CLOSE = 'port_open_close' MSG_KEY_SEND_BYTES_SINGLE = 'send_single' @@ -93,7 +96,8 @@ class USBSerialTest(mbed_host_tests.BaseHostTest): def get_usb_serial_name(usb_id_str): """Get USB serial device name as registered in the system. - Search is based on the id received from the device itself. + Search is based on the unique USB SN generated by the host + during test suite setup. Raises RuntimeError if the device is not found. """ port_name = usb_serial_name(usb_id_str) @@ -105,13 +109,14 @@ def get_usb_serial_name(usb_id_str): def __init__(self): super(USBSerialTest, self).__init__() self.__bg_task = None + self.dut_usb_dev_sn = uuid.uuid4().hex # 32 hex digit string - def port_open_wait(self, usb_id_str): + def port_open_wait(self): """Open the serial and wait until it's closed by the device.""" mbed_serial = serial.Serial() try: mbed_serial.port = retry_fun_call( - fun=functools.partial(self.get_usb_serial_name, usb_id_str), # pylint: disable=not-callable + fun=functools.partial(self.get_usb_serial_name, self.dut_usb_dev_sn), # pylint: disable=not-callable num_retries=20, retry_delay=0.05) retry_fun_call( @@ -127,12 +132,12 @@ def port_open_wait(self, usb_id_str): self.notify_complete(False) return - def port_open_close(self, usb_id_str): + def port_open_close(self): """Open the serial and close it with a delay.""" mbed_serial = serial.Serial(timeout=0.5, write_timeout=0.1) try: mbed_serial.port = retry_fun_call( - fun=functools.partial(self.get_usb_serial_name, usb_id_str), # pylint: disable=not-callable + fun=functools.partial(self.get_usb_serial_name, self.dut_usb_dev_sn), # pylint: disable=not-callable num_retries=20, retry_delay=0.05) retry_fun_call( @@ -147,7 +152,7 @@ def port_open_close(self, usb_id_str): self.notify_complete(False) return - def send_data_sequence(self, usb_id_str, chunk_size=1): + def send_data_sequence(self, chunk_size=1): """Open the serial and send a sequence of values. chunk_size defines the size of data sent in each write operation. @@ -156,7 +161,7 @@ def send_data_sequence(self, usb_id_str, chunk_size=1): mbed_serial = serial.Serial(write_timeout=0.1) try: mbed_serial.port = retry_fun_call( - fun=functools.partial(self.get_usb_serial_name, usb_id_str), # pylint: disable=not-callable + fun=functools.partial(self.get_usb_serial_name, self.dut_usb_dev_sn), # pylint: disable=not-callable num_retries=20, retry_delay=0.05) retry_fun_call( @@ -185,12 +190,12 @@ def send_data_sequence(self, usb_id_str, chunk_size=1): time.sleep(TERM_CLOSE_DELAY) mbed_serial.close() - def loopback(self, usb_id_str): + def loopback(self): """Open the serial and send back every byte received.""" mbed_serial = serial.Serial(timeout=0.5, write_timeout=0.1) try: mbed_serial.port = retry_fun_call( - fun=functools.partial(self.get_usb_serial_name, usb_id_str), # pylint: disable=not-callable + fun=functools.partial(self.get_usb_serial_name, self.dut_usb_dev_sn), # pylint: disable=not-callable num_retries=20, retry_delay=0.05) retry_fun_call( @@ -217,7 +222,7 @@ def loopback(self, usb_id_str): time.sleep(TERM_CLOSE_DELAY) mbed_serial.close() - def change_line_coding(self, usb_id_str): + def change_line_coding(self): """Open the serial and change serial params according to device request. New line coding params are read from the device serial data. @@ -225,7 +230,7 @@ def change_line_coding(self, usb_id_str): mbed_serial = serial.Serial(timeout=0.5) try: mbed_serial.port = retry_fun_call( - fun=functools.partial(self.get_usb_serial_name, usb_id_str), # pylint: disable=not-callable + fun=functools.partial(self.get_usb_serial_name, self.dut_usb_dev_sn), # pylint: disable=not-callable num_retries=20, retry_delay=0.05) retry_fun_call( @@ -256,6 +261,7 @@ def change_line_coding(self, usb_id_str): mbed_serial.close() def setup(self): + self.register_callback(MSG_KEY_DEVICE_READY, self.cb_device_ready) self.register_callback(MSG_KEY_PORT_OPEN_WAIT, self.cb_port_open_wait) self.register_callback(MSG_KEY_PORT_OPEN_CLOSE, self.cb_port_open_close) self.register_callback(MSG_KEY_SEND_BYTES_SINGLE, self.cb_send_bytes_single) @@ -263,6 +269,13 @@ def setup(self): self.register_callback(MSG_KEY_LOOPBACK, self.cb_loopback) self.register_callback(MSG_KEY_CHANGE_LINE_CODING, self.cb_change_line_coding) + def cb_device_ready(self, key, value, timestamp): + """Send a unique USB SN to the device. + + DUT uses this SN every time it connects to host as a USB device. + """ + self.send_kv(MSG_KEY_SERIAL_NUMBER, self.dut_usb_dev_sn) + def start_bg_task(self, **thread_kwargs): """Start a new daemon thread. @@ -281,36 +294,28 @@ def start_bg_task(self, **thread_kwargs): def cb_port_open_wait(self, key, value, timestamp): """Open the serial and wait until it's closed by the device.""" - self.start_bg_task( - target=self.port_open_wait, - args=(value, )) + self.start_bg_task(target=self.port_open_wait) def cb_port_open_close(self, key, value, timestamp): """Open the serial and close it with a delay.""" - self.start_bg_task( - target=self.port_open_close, - args=(value, )) + self.start_bg_task(target=self.port_open_close) def cb_send_bytes_single(self, key, value, timestamp): """Open the serial and send a sequence of values.""" self.start_bg_task( target=self.send_data_sequence, - args=(value, 1)) + args=(1, )) def cb_send_bytes_multiple(self, key, value, timestamp): """Open the serial and send a sequence of one byte values.""" self.start_bg_task( target=self.send_data_sequence, - args=(value, RX_BUFF_SIZE)) + args=(RX_BUFF_SIZE, )) def cb_loopback(self, key, value, timestamp): """Open the serial and send a sequence of multibyte values.""" - self.start_bg_task( - target=self.loopback, - args=(value, )) + self.start_bg_task(target=self.loopback) def cb_change_line_coding(self, key, value, timestamp): """Open the serial and change the line coding.""" - self.start_bg_task( - target=self.change_line_coding, - args=(value, )) + self.start_bg_task(target=self.change_line_coding) diff --git a/TESTS/usb_device/serial/main.cpp b/TESTS/usb_device/serial/main.cpp index 2f55df43fbb..8c4a6433ab2 100644 --- a/TESTS/usb_device/serial/main.cpp +++ b/TESTS/usb_device/serial/main.cpp @@ -23,6 +23,7 @@ #include "unity/unity.h" #include "mbed.h" #include +#include "usb_phy_api.h" #include "USBCDC.h" #include "USBSerial.h" @@ -30,8 +31,13 @@ #define USB_CDC_PID 0x2013 #define USB_SERIAL_VID 0x1f00 #define USB_SERIAL_PID 0x2012 -#define USB_SN_MAX_LEN 128 +#define MSG_KEY_LEN 24 + +#define MSG_VALUE_DUMMY "0" + +#define MSG_KEY_DEVICE_READY "ready" +#define MSG_KEY_SERIAL_NUMBER "usb_dev_sn" #define MSG_KEY_PORT_OPEN_WAIT "port_open_wait" #define MSG_KEY_PORT_OPEN_CLOSE "port_open_close" #define MSG_KEY_SEND_BYTES_SINGLE "send_single" @@ -57,6 +63,13 @@ #define LINE_CODING_STRLEN 13 // 6 + 2 + 1 + 1 + 3 * comma +#define USB_DEV_SN_LEN (32) // 32 hex digit UUID +#define NONASCII_CHAR ('?') +#define USB_DEV_SN_DESC_SIZE (USB_DEV_SN_LEN * 2 + 2) + +const char *default_serial_num = "0123456789"; +char usb_dev_sn[USB_DEV_SN_LEN + 1]; + using utest::v1::Case; using utest::v1::Specification; using utest::v1::Harness; @@ -122,20 +135,128 @@ Mail lc_mail; #define EF_SEND (1ul << 0) EventFlags event_flags; -char *usb_desc2str(const uint8_t *usb_desc, char *str, size_t n) +/** + * Convert a USB string descriptor to C style ASCII + * + * The string placed in str is always null-terminated which may cause the + * loss of data if n is to small. If the length of descriptor string is less + * than n, additional null bytes are written to str. + * + * @param str output buffer for the ASCII string + * @param usb_desc USB string descriptor + * @param n size of str buffer + * @returns number of non-null bytes returned in str or -1 on failure + */ +int usb_string_desc2ascii(char *str, const uint8_t *usb_desc, size_t n) { - const size_t desc_size = usb_desc[0] - 2; - const uint8_t *src = &usb_desc[2]; - size_t i, j; - for (i = 0, j = 0; i < n && j < desc_size; i++, j += 2) { - str[i] = src[j]; + if (str == NULL || usb_desc == NULL || n < 1) { + return -1; + } + // bDescriptorType @ offset 1 + if (usb_desc[1] != STRING_DESCRIPTOR) { + return -1; + } + // bLength @ offset 0 + const size_t bLength = usb_desc[0]; + if (bLength % 2 != 0) { + return -1; + } + size_t s, d; + for (s = 0, d = 2; s < n - 1 && d < bLength; s++, d += 2) { + // handle non-ASCII characters + if (usb_desc[d] > 0x7f || usb_desc[d + 1] != 0) { + str[s] = NONASCII_CHAR; + } else { + str[s] = usb_desc[d]; + } } - for (; i < n; i++) { - str[i] = '\0'; + int str_len = s; + for (; s < n; s++) { + str[s] = '\0'; } - return str; + return str_len; } +/** + * Convert a C style ASCII to a USB string descriptor + * + * @param usb_desc output buffer for the USB string descriptor + * @param str ASCII string + * @param n size of usb_desc buffer, even number + * @returns number of bytes returned in usb_desc or -1 on failure + */ +int ascii2usb_string_desc(uint8_t *usb_desc, const char *str, size_t n) +{ + if (str == NULL || usb_desc == NULL || n < 4) { + return -1; + } + if (n % 2 != 0) { + return -1; + } + size_t s, d; + // set bString (@ offset 2 onwards) as a UNICODE UTF-16LE string + memset(usb_desc, 0, n); + for (s = 0, d = 2; str[s] != '\0' && d < n; s++, d += 2) { + usb_desc[d] = str[s]; + } + // set bLength @ offset 0 + usb_desc[0] = d; + // set bDescriptorType @ offset 1 + usb_desc[1] = STRING_DESCRIPTOR; + return d; +} + +class TestUSBCDC: public USBCDC { +private: + uint8_t _serial_num_descriptor[USB_DEV_SN_DESC_SIZE]; +public: + TestUSBCDC(uint16_t vendor_id = 0x1f00, uint16_t product_id = 0x2012, uint16_t product_release = 0x0001, + const char *serial_number = default_serial_num) : + USBCDC(get_usb_phy(), vendor_id, product_id, product_release) + { + init(); + int rc = ascii2usb_string_desc(_serial_num_descriptor, serial_number, USB_DEV_SN_DESC_SIZE); + if (rc < 0) { + ascii2usb_string_desc(_serial_num_descriptor, default_serial_num, USB_DEV_SN_DESC_SIZE); + } + } + + virtual ~TestUSBCDC() + { + deinit(); + } + + virtual const uint8_t *string_iserial_desc() + { + return (const uint8_t *) _serial_num_descriptor; + } +}; + +class TestUSBSerial: public USBSerial { +private: + uint8_t _serial_num_descriptor[USB_DEV_SN_DESC_SIZE]; +public: + TestUSBSerial(uint16_t vendor_id = 0x1f00, uint16_t product_id = 0x2012, uint16_t product_release = 0x0001, + const char *serial_number = default_serial_num) : + USBSerial(get_usb_phy(), vendor_id, product_id, product_release) + { + int rc = ascii2usb_string_desc(_serial_num_descriptor, serial_number, USB_DEV_SN_DESC_SIZE); + if (rc < 0) { + ascii2usb_string_desc(_serial_num_descriptor, default_serial_num, USB_DEV_SN_DESC_SIZE); + } + } + + virtual ~TestUSBSerial() + { + deinit(); + } + + virtual const uint8_t *string_iserial_desc() + { + return (const uint8_t *) _serial_num_descriptor; + } +}; + /** Test CDC USB reconnect * * Given the host has successfully opened the port of a USB CDC device @@ -144,9 +265,7 @@ char *usb_desc2str(const uint8_t *usb_desc, char *str, size_t n) */ void test_cdc_usb_reconnect() { - USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); - char usb_cdc_sn[USB_SN_MAX_LEN] = { }; - usb_desc2str(usb_cdc.string_iserial_desc(), usb_cdc_sn, USB_SN_MAX_LEN); + TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); TEST_ASSERT_FALSE(usb_cdc.configured()); TEST_ASSERT_FALSE(usb_cdc.ready()); @@ -159,7 +278,7 @@ void test_cdc_usb_reconnect() TEST_ASSERT_TRUE(usb_cdc.configured()); TEST_ASSERT_FALSE(usb_cdc.ready()); - greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, usb_cdc_sn); + greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, MSG_VALUE_DUMMY); // Wait for the host to open the port. usb_cdc.wait_ready(); TEST_ASSERT_TRUE(usb_cdc.configured()); @@ -181,7 +300,7 @@ void test_cdc_usb_reconnect() TEST_ASSERT_TRUE(usb_cdc.configured()); TEST_ASSERT_FALSE(usb_cdc.ready()); - greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, usb_cdc_sn); + greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, MSG_VALUE_DUMMY); // Wait for the host to open the port again. usb_cdc.wait_ready(); TEST_ASSERT_TRUE(usb_cdc.configured()); @@ -202,11 +321,9 @@ void test_cdc_usb_reconnect() */ void test_cdc_rx_single_bytes() { - USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); - char usb_cdc_sn[USB_SN_MAX_LEN] = { }; - usb_desc2str(usb_cdc.string_iserial_desc(), usb_cdc_sn, USB_SN_MAX_LEN); + TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); usb_cdc.connect(); - greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, usb_cdc_sn); + greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, MSG_VALUE_DUMMY); usb_cdc.wait_ready(); uint8_t buff = 0x01; for (int expected = 0xff; expected >= 0; expected--) { @@ -247,11 +364,9 @@ void tx_thread_fun(USBCDC *usb_cdc) */ void test_cdc_rx_single_bytes_concurrent() { - USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); - char usb_cdc_sn[USB_SN_MAX_LEN] = { }; - usb_desc2str(usb_cdc.string_iserial_desc(), usb_cdc_sn, USB_SN_MAX_LEN); + TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); usb_cdc.connect(); - greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, usb_cdc_sn); + greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, MSG_VALUE_DUMMY); usb_cdc.wait_ready(); wait_ms(TX_DELAY_MS); Thread tx_thread; @@ -283,11 +398,9 @@ void test_cdc_rx_single_bytes_concurrent() */ void test_cdc_rx_multiple_bytes() { - USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); - char usb_cdc_sn[USB_SN_MAX_LEN] = { }; - usb_desc2str(usb_cdc.string_iserial_desc(), usb_cdc_sn, USB_SN_MAX_LEN); + TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); usb_cdc.connect(); - greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, usb_cdc_sn); + greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, MSG_VALUE_DUMMY); usb_cdc.wait_ready(); uint8_t buff[RX_BUFF_SIZE] = { 0 }; uint8_t expected_buff[RX_BUFF_SIZE] = { 0 }; @@ -317,11 +430,9 @@ void test_cdc_rx_multiple_bytes() */ void test_cdc_rx_multiple_bytes_concurrent() { - USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); - char usb_cdc_sn[USB_SN_MAX_LEN] = { }; - usb_desc2str(usb_cdc.string_iserial_desc(), usb_cdc_sn, USB_SN_MAX_LEN); + TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); usb_cdc.connect(); - greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, usb_cdc_sn); + greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, MSG_VALUE_DUMMY); usb_cdc.wait_ready(); wait_ms(TX_DELAY_MS); Thread tx_thread; @@ -357,11 +468,9 @@ void test_cdc_rx_multiple_bytes_concurrent() */ void test_cdc_loopback() { - USBCDC usb_cdc(false, USB_CDC_VID, USB_CDC_PID); - char usb_cdc_sn[USB_SN_MAX_LEN] = { }; - usb_desc2str(usb_cdc.string_iserial_desc(), usb_cdc_sn, USB_SN_MAX_LEN); + TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); usb_cdc.connect(); - greentea_send_kv(MSG_KEY_LOOPBACK, usb_cdc_sn); + greentea_send_kv(MSG_KEY_LOOPBACK, MSG_VALUE_DUMMY); usb_cdc.wait_ready(); wait_ms(TX_DELAY_MS); uint8_t rx_buff, tx_buff; @@ -387,9 +496,7 @@ void test_cdc_loopback() */ void test_serial_usb_reconnect() { - USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); - char usb_serial_sn[USB_SN_MAX_LEN] = { }; - usb_desc2str(usb_serial.string_iserial_desc(), usb_serial_sn, USB_SN_MAX_LEN); + TestUSBSerial usb_serial(USB_SERIAL_VID, USB_SERIAL_PID, 1, usb_dev_sn); TEST_ASSERT_FALSE(usb_serial.configured()); TEST_ASSERT_FALSE(usb_serial.connected()); TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); @@ -404,7 +511,7 @@ void test_serial_usb_reconnect() TEST_ASSERT_FALSE(usb_serial.connected()); TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); - greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, usb_serial_sn); + greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, MSG_VALUE_DUMMY); // Wait for the host to open the port. while (!usb_serial.connected()) { wait_ms(1); @@ -431,7 +538,7 @@ void test_serial_usb_reconnect() TEST_ASSERT_FALSE(usb_serial.connected()); TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); - greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, usb_serial_sn); + greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, MSG_VALUE_DUMMY); // Wait for the host to open the port again. while (!usb_serial.connected()) { wait_ms(1); @@ -456,11 +563,9 @@ void test_serial_usb_reconnect() */ void test_serial_term_reopen() { - USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); - char usb_serial_sn[USB_SN_MAX_LEN] = { }; - usb_desc2str(usb_serial.string_iserial_desc(), usb_serial_sn, USB_SN_MAX_LEN); + TestUSBSerial usb_serial(USB_SERIAL_VID, USB_SERIAL_PID, 1, usb_dev_sn); usb_serial.connect(); - greentea_send_kv(MSG_KEY_PORT_OPEN_CLOSE, usb_serial_sn); + greentea_send_kv(MSG_KEY_PORT_OPEN_CLOSE, MSG_VALUE_DUMMY); // Wait for the host to open the terminal. while (!usb_serial.connected()) { wait_ms(1); @@ -479,7 +584,7 @@ void test_serial_term_reopen() TEST_ASSERT_FALSE(usb_serial.connected()); TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); - greentea_send_kv(MSG_KEY_PORT_OPEN_CLOSE, usb_serial_sn); + greentea_send_kv(MSG_KEY_PORT_OPEN_CLOSE, MSG_VALUE_DUMMY); // Wait for the host to open the terminal again. while (!usb_serial.connected()) { wait_ms(1); @@ -509,11 +614,9 @@ void test_serial_term_reopen() */ void test_serial_getc() { - USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); - char usb_serial_sn[USB_SN_MAX_LEN] = { }; - usb_desc2str(usb_serial.string_iserial_desc(), usb_serial_sn, USB_SN_MAX_LEN); + TestUSBSerial usb_serial(USB_SERIAL_VID, USB_SERIAL_PID, 1, usb_dev_sn); usb_serial.connect(); - greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, usb_serial_sn); + greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, MSG_VALUE_DUMMY); while (!usb_serial.connected()) { wait_ms(1); } @@ -541,11 +644,9 @@ void test_serial_getc() */ void test_serial_printf_scanf() { - USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); - char usb_serial_sn[USB_SN_MAX_LEN] = { }; - usb_desc2str(usb_serial.string_iserial_desc(), usb_serial_sn, USB_SN_MAX_LEN); + TestUSBSerial usb_serial(USB_SERIAL_VID, USB_SERIAL_PID, 1, usb_dev_sn); usb_serial.connect(); - greentea_send_kv(MSG_KEY_LOOPBACK, usb_serial_sn); + greentea_send_kv(MSG_KEY_LOOPBACK, MSG_VALUE_DUMMY); while (!usb_serial.connected()) { wait_ms(1); } @@ -587,11 +688,9 @@ void line_coding_changed_cb(int baud, int bits, int parity, int stop) */ void test_serial_line_coding_change() { - USBSerial usb_serial(false, USB_SERIAL_VID, USB_SERIAL_PID); - char usb_serial_sn[USB_SN_MAX_LEN] = { }; - usb_desc2str(usb_serial.string_iserial_desc(), usb_serial_sn, USB_SN_MAX_LEN); + TestUSBSerial usb_serial(USB_SERIAL_VID, USB_SERIAL_PID, 1, usb_dev_sn); usb_serial.connect(); - greentea_send_kv(MSG_KEY_CHANGE_LINE_CODING, usb_serial_sn); + greentea_send_kv(MSG_KEY_CHANGE_LINE_CODING, MSG_VALUE_DUMMY); while (!usb_serial.connected()) { wait_ms(1); } @@ -643,7 +742,25 @@ utest::v1::status_t testsuite_setup(const size_t number_of_cases) { GREENTEA_SETUP(35, "usb_device_serial"); srand((unsigned) ticker_read_us(get_us_ticker_data())); - return utest::v1::greentea_test_setup_handler(number_of_cases); + + utest::v1::status_t status = utest::v1::greentea_test_setup_handler(number_of_cases); + if (status != utest::v1::STATUS_CONTINUE) { + return status; + } + + char key[MSG_KEY_LEN + 1] = { }; + char usb_dev_uuid[USB_DEV_SN_LEN + 1] = { }; + + greentea_send_kv(MSG_KEY_DEVICE_READY, MSG_VALUE_DUMMY); + greentea_parse_kv(key, usb_dev_uuid, MSG_KEY_LEN, USB_DEV_SN_LEN + 1); + + if (strcmp(key, MSG_KEY_SERIAL_NUMBER) != 0) { + utest_printf("Invalid message key.\n"); + return utest::v1::STATUS_ABORT; + } + + strncpy(usb_dev_sn, usb_dev_uuid, USB_DEV_SN_LEN + 1); + return status; } Case cases[] = { @@ -660,7 +777,7 @@ Case cases[] = { Case("Serial line coding change", test_serial_line_coding_change), }; -Specification specification(testsuite_setup, cases); +Specification specification((utest::v1::test_setup_handler_t) testsuite_setup, cases); int main() { From 3c2fe35b22babe52183c784597ced9c24f3b88ad Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Wed, 17 Oct 2018 14:40:41 +0200 Subject: [PATCH 396/488] Tests: USB: Update code comments --- TESTS/host_tests/usb_device_serial.py | 8 ++++++++ TESTS/usb_device/serial/main.cpp | 2 -- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/TESTS/host_tests/usb_device_serial.py b/TESTS/host_tests/usb_device_serial.py index 5ecba8b93c3..2c795155b70 100644 --- a/TESTS/host_tests/usb_device_serial.py +++ b/TESTS/host_tests/usb_device_serial.py @@ -35,8 +35,16 @@ MSG_KEY_CHANGE_LINE_CODING = 'change_lc' RX_BUFF_SIZE = 32 + +# This delay eliminates the possibility of the device detecting +# the port being closed when still waiting for data. TERM_CLOSE_DELAY = 0.01 + +# A duration the serial terminal is open on the host side +# during terminal reopen test. TERM_REOPEN_DELAY = 0.1 + +# 6 (baud) + 2 (bits) + 1 (parity) + 1 (stop) + 3 * comma LINE_CODING_STRLEN = 13 diff --git a/TESTS/usb_device/serial/main.cpp b/TESTS/usb_device/serial/main.cpp index 8c4a6433ab2..2bcbeea61fc 100644 --- a/TESTS/usb_device/serial/main.cpp +++ b/TESTS/usb_device/serial/main.cpp @@ -33,9 +33,7 @@ #define USB_SERIAL_PID 0x2012 #define MSG_KEY_LEN 24 - #define MSG_VALUE_DUMMY "0" - #define MSG_KEY_DEVICE_READY "ready" #define MSG_KEY_SERIAL_NUMBER "usb_dev_sn" #define MSG_KEY_PORT_OPEN_WAIT "port_open_wait" From a0e9f1182ebec0e93b87283eac3b0ad50a6875a7 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Wed, 17 Oct 2018 17:33:06 +0200 Subject: [PATCH 397/488] Tests: USB: Fix Windows USB SN handling --- TESTS/host_tests/usb_device_serial.py | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/TESTS/host_tests/usb_device_serial.py b/TESTS/host_tests/usb_device_serial.py index 2c795155b70..927a052c7bf 100644 --- a/TESTS/host_tests/usb_device_serial.py +++ b/TESTS/host_tests/usb_device_serial.py @@ -20,6 +20,7 @@ import time import threading import uuid +import sys import serial import serial.tools.list_ports as stlp import mbed_host_tests @@ -50,6 +51,12 @@ def usb_serial_name(serial_number): """Get USB serial device name based on the device serial number.""" + if sys.platform.startswith('win'): + # The USB spec defines all USB string descriptors to be + # UNICODE UTF-16LE. Windows however, decodes the USB serial + # number string descriptor as uppercase characters only. + # To solve this issue, convert the pattern to uppercase. + serial_number = str(serial_number).upper() for port_info in stlp.comports(): if port_info.serial_number == serial_number: return port_info.device From db6b91b80bd0782fb090c11f83451f181ebcb90a Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Thu, 18 Oct 2018 15:19:03 +0200 Subject: [PATCH 398/488] Tests: USB: Increas the size of RX CDC test data This ensures the flow control is tested. --- TESTS/host_tests/usb_device_serial.py | 3 +- TESTS/usb_device/serial/main.cpp | 45 ++++++++++++++++++--------- 2 files changed, 32 insertions(+), 16 deletions(-) diff --git a/TESTS/host_tests/usb_device_serial.py b/TESTS/host_tests/usb_device_serial.py index 927a052c7bf..c3bededa10f 100644 --- a/TESTS/host_tests/usb_device_serial.py +++ b/TESTS/host_tests/usb_device_serial.py @@ -323,9 +323,10 @@ def cb_send_bytes_single(self, key, value, timestamp): def cb_send_bytes_multiple(self, key, value, timestamp): """Open the serial and send a sequence of one byte values.""" + chunk_size = RX_BUFF_SIZE * int(value) self.start_bg_task( target=self.send_data_sequence, - args=(RX_BUFF_SIZE, )) + args=(chunk_size, )) def cb_loopback(self, key, value, timestamp): """Open the serial and send a sequence of multibyte values.""" diff --git a/TESTS/usb_device/serial/main.cpp b/TESTS/usb_device/serial/main.cpp index 2bcbeea61fc..616b498f617 100644 --- a/TESTS/usb_device/serial/main.cpp +++ b/TESTS/usb_device/serial/main.cpp @@ -45,6 +45,13 @@ #define TX_BUFF_SIZE 32 #define RX_BUFF_SIZE 32 + +// The size of every data chunk the host sends (for each value from a +// known sequence) during 'CDC RX multiple' test cases is +// HOST_RX_BUFF_SIZE_RATIO times the size of RX_BUFF_SIZE input buffer. +// This way the device has to correctly handle data bigger that its buffer. +#define HOST_RX_BUFF_SIZE_RATIO 64 + #define CDC_LOOPBACK_REPS 1200 #define SERIAL_LOOPBACK_REPS 100 #define USB_RECONNECT_DELAY_MS 1 @@ -398,19 +405,23 @@ void test_cdc_rx_multiple_bytes() { TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); usb_cdc.connect(); - greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, MSG_VALUE_DUMMY); + greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, HOST_RX_BUFF_SIZE_RATIO); usb_cdc.wait_ready(); uint8_t buff[RX_BUFF_SIZE] = { 0 }; uint8_t expected_buff[RX_BUFF_SIZE] = { 0 }; for (int expected = 0xff; expected >= 0; expected--) { - memset(expected_buff, expected, RX_BUFF_SIZE); - TEST_ASSERT(usb_cdc.receive(buff, RX_BUFF_SIZE, NULL)); - TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_buff, buff, RX_BUFF_SIZE); + for (int chunk = 0; chunk < HOST_RX_BUFF_SIZE_RATIO; chunk++) { + memset(expected_buff, expected, RX_BUFF_SIZE); + TEST_ASSERT(usb_cdc.receive(buff, RX_BUFF_SIZE, NULL)); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_buff, buff, RX_BUFF_SIZE); + } } for (int expected = 0; expected <= 0xff; expected++) { - memset(expected_buff, expected, RX_BUFF_SIZE); - TEST_ASSERT(usb_cdc.receive(buff, RX_BUFF_SIZE, NULL)); - TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_buff, buff, RX_BUFF_SIZE); + for (int chunk = 0; chunk < HOST_RX_BUFF_SIZE_RATIO; chunk++) { + memset(expected_buff, expected, RX_BUFF_SIZE); + TEST_ASSERT(usb_cdc.receive(buff, RX_BUFF_SIZE, NULL)); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_buff, buff, RX_BUFF_SIZE); + } } // Wait for the host to close its port. while (usb_cdc.ready()) { @@ -430,7 +441,7 @@ void test_cdc_rx_multiple_bytes_concurrent() { TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); usb_cdc.connect(); - greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, MSG_VALUE_DUMMY); + greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, HOST_RX_BUFF_SIZE_RATIO); usb_cdc.wait_ready(); wait_ms(TX_DELAY_MS); Thread tx_thread; @@ -439,14 +450,18 @@ void test_cdc_rx_multiple_bytes_concurrent() uint8_t buff[RX_BUFF_SIZE] = { 0 }; uint8_t expected_buff[RX_BUFF_SIZE] = { 0 }; for (int expected = 0xff; expected >= 0; expected--) { - memset(expected_buff, expected, RX_BUFF_SIZE); - TEST_ASSERT(usb_cdc.receive(buff, RX_BUFF_SIZE, NULL)); - TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_buff, buff, RX_BUFF_SIZE); + for (int chunk = 0; chunk < HOST_RX_BUFF_SIZE_RATIO; chunk++) { + memset(expected_buff, expected, RX_BUFF_SIZE); + TEST_ASSERT(usb_cdc.receive(buff, RX_BUFF_SIZE, NULL)); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_buff, buff, RX_BUFF_SIZE); + } } for (int expected = 0; expected <= 0xff; expected++) { - memset(expected_buff, expected, RX_BUFF_SIZE); - TEST_ASSERT(usb_cdc.receive(buff, RX_BUFF_SIZE, NULL)); - TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_buff, buff, RX_BUFF_SIZE); + for (int chunk = 0; chunk < HOST_RX_BUFF_SIZE_RATIO; chunk++) { + memset(expected_buff, expected, RX_BUFF_SIZE); + TEST_ASSERT(usb_cdc.receive(buff, RX_BUFF_SIZE, NULL)); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected_buff, buff, RX_BUFF_SIZE); + } } event_flags.clear(EF_SEND); tx_thread.join(); @@ -738,7 +753,7 @@ void test_serial_line_coding_change() utest::v1::status_t testsuite_setup(const size_t number_of_cases) { - GREENTEA_SETUP(35, "usb_device_serial"); + GREENTEA_SETUP(45, "usb_device_serial"); srand((unsigned) ticker_read_us(get_us_ticker_data())); utest::v1::status_t status = utest::v1::greentea_test_setup_handler(number_of_cases); From bb141e7df6561230f02fe6917eb17c2ee64bcd88 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 25 Oct 2018 19:22:03 -0500 Subject: [PATCH 399/488] Tests: USB: Use DTR to make Serial tests reliable Update the serial host test to set DTR low before opening a serial port. Set DTR high once the serial object is ready. This ensures that no data is sent by the device until the host is ready. --- TESTS/host_tests/usb_device_serial.py | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/TESTS/host_tests/usb_device_serial.py b/TESTS/host_tests/usb_device_serial.py index c3bededa10f..7ba0d77ae05 100644 --- a/TESTS/host_tests/usb_device_serial.py +++ b/TESTS/host_tests/usb_device_serial.py @@ -129,6 +129,7 @@ def __init__(self): def port_open_wait(self): """Open the serial and wait until it's closed by the device.""" mbed_serial = serial.Serial() + mbed_serial.dtr = False try: mbed_serial.port = retry_fun_call( fun=functools.partial(self.get_usb_serial_name, self.dut_usb_dev_sn), # pylint: disable=not-callable @@ -138,6 +139,7 @@ def port_open_wait(self): fun=mbed_serial.open, num_retries=10, retry_delay=0.05) + mbed_serial.dtr = True try: mbed_serial.read() # wait until closed except (serial.portNotOpenError, serial.SerialException): @@ -160,6 +162,7 @@ def port_open_close(self): num_retries=10, retry_delay=0.05) mbed_serial.reset_output_buffer() + mbed_serial.dtr = True time.sleep(TERM_REOPEN_DELAY) mbed_serial.close() except RetryError as exc: @@ -188,6 +191,7 @@ def send_data_sequence(self, chunk_size=1): self.notify_complete(False) return mbed_serial.reset_output_buffer() + mbed_serial.dtr = True for byteval in itertools.chain(reversed(range(0x100)), range(0x100)): try: payload = bytearray(chunk_size * (byteval,)) @@ -208,6 +212,7 @@ def send_data_sequence(self, chunk_size=1): def loopback(self): """Open the serial and send back every byte received.""" mbed_serial = serial.Serial(timeout=0.5, write_timeout=0.1) + mbed_serial.dtr = False try: mbed_serial.port = retry_fun_call( fun=functools.partial(self.get_usb_serial_name, self.dut_usb_dev_sn), # pylint: disable=not-callable @@ -222,6 +227,7 @@ def loopback(self): self.notify_complete(False) return mbed_serial.reset_output_buffer() + mbed_serial.dtr = True try: payload = mbed_serial.read(1) while len(payload) == 1: @@ -243,6 +249,7 @@ def change_line_coding(self): New line coding params are read from the device serial data. """ mbed_serial = serial.Serial(timeout=0.5) + mbed_serial.dtr = False try: mbed_serial.port = retry_fun_call( fun=functools.partial(self.get_usb_serial_name, self.dut_usb_dev_sn), # pylint: disable=not-callable @@ -257,6 +264,7 @@ def change_line_coding(self): self.notify_complete(False) return mbed_serial.reset_output_buffer() + mbed_serial.dtr = True try: payload = mbed_serial.read(LINE_CODING_STRLEN) while len(payload) == LINE_CODING_STRLEN: From 5e778008fb22d4942beb05420845f559d503ea8e Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 25 Oct 2018 19:25:27 -0500 Subject: [PATCH 400/488] Tests: USB: Remove TX_DELAY_MS from serial test Remove TX_DELAY_MS and all the places it was called since it is not needed when DTR flow control is used. --- TESTS/usb_device/serial/main.cpp | 19 ++----------------- 1 file changed, 2 insertions(+), 17 deletions(-) diff --git a/TESTS/usb_device/serial/main.cpp b/TESTS/usb_device/serial/main.cpp index 616b498f617..20f9c3f1614 100644 --- a/TESTS/usb_device/serial/main.cpp +++ b/TESTS/usb_device/serial/main.cpp @@ -60,12 +60,6 @@ // to handle the reconnect operation correctly. #define USB_DISCONNECT_DELAY_MS 1 -// Despite having ECHO and ECHOCTL POSIX lflags disabled by default by -// pyserial, a delay is needed for host to properly handle data received -// from USB serial/CDC device. -// With no delay host would echo 0x00-0x31 characters prefixed with '^'. -#define TX_DELAY_MS 10 - #define LINE_CODING_STRLEN 13 // 6 + 2 + 1 + 1 + 3 * comma #define USB_DEV_SN_LEN (32) // 32 hex digit UUID @@ -373,7 +367,6 @@ void test_cdc_rx_single_bytes_concurrent() usb_cdc.connect(); greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, MSG_VALUE_DUMMY); usb_cdc.wait_ready(); - wait_ms(TX_DELAY_MS); Thread tx_thread; event_flags.set(EF_SEND); tx_thread.start(mbed::callback(tx_thread_fun, &usb_cdc)); @@ -443,7 +436,6 @@ void test_cdc_rx_multiple_bytes_concurrent() usb_cdc.connect(); greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, HOST_RX_BUFF_SIZE_RATIO); usb_cdc.wait_ready(); - wait_ms(TX_DELAY_MS); Thread tx_thread; event_flags.set(EF_SEND); tx_thread.start(mbed::callback(tx_thread_fun, &usb_cdc)); @@ -485,7 +477,6 @@ void test_cdc_loopback() usb_cdc.connect(); greentea_send_kv(MSG_KEY_LOOPBACK, MSG_VALUE_DUMMY); usb_cdc.wait_ready(); - wait_ms(TX_DELAY_MS); uint8_t rx_buff, tx_buff; for (int i = 0; i < CDC_LOOPBACK_REPS; i++) { tx_buff = (uint8_t)(rand() % 0x100); @@ -660,10 +651,7 @@ void test_serial_printf_scanf() TestUSBSerial usb_serial(USB_SERIAL_VID, USB_SERIAL_PID, 1, usb_dev_sn); usb_serial.connect(); greentea_send_kv(MSG_KEY_LOOPBACK, MSG_VALUE_DUMMY); - while (!usb_serial.connected()) { - wait_ms(1); - } - wait_ms(TX_DELAY_MS); + usb_serial.wait_ready(); static const char fmt[] = "Formatted\nstring %i."; int tx_val, rx_val, rc; for (int i = 0; i < SERIAL_LOOPBACK_REPS; i++) { @@ -704,10 +692,7 @@ void test_serial_line_coding_change() TestUSBSerial usb_serial(USB_SERIAL_VID, USB_SERIAL_PID, 1, usb_dev_sn); usb_serial.connect(); greentea_send_kv(MSG_KEY_CHANGE_LINE_CODING, MSG_VALUE_DUMMY); - while (!usb_serial.connected()) { - wait_ms(1); - } - wait_ms(TX_DELAY_MS); + usb_serial.wait_ready(); usb_serial.attach(line_coding_changed_cb); size_t num_line_codings = sizeof test_codings / sizeof test_codings[0]; line_coding_t *lc_prev = &default_lc; From 7f80173f42efa7bbaf364c513d8ee6ba6ec27771 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Thu, 25 Oct 2018 19:35:39 -0500 Subject: [PATCH 401/488] Tests: USB: Increase serial open retries Double the number of attempts that are made to open a serial port. This makes tests run more reliably on Windows. --- TESTS/host_tests/usb_device_serial.py | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/TESTS/host_tests/usb_device_serial.py b/TESTS/host_tests/usb_device_serial.py index 7ba0d77ae05..2280b6db8e9 100644 --- a/TESTS/host_tests/usb_device_serial.py +++ b/TESTS/host_tests/usb_device_serial.py @@ -137,7 +137,7 @@ def port_open_wait(self): retry_delay=0.05) retry_fun_call( fun=mbed_serial.open, - num_retries=10, + num_retries=20, retry_delay=0.05) mbed_serial.dtr = True try: @@ -159,7 +159,7 @@ def port_open_close(self): retry_delay=0.05) retry_fun_call( fun=mbed_serial.open, - num_retries=10, + num_retries=20, retry_delay=0.05) mbed_serial.reset_output_buffer() mbed_serial.dtr = True @@ -184,7 +184,7 @@ def send_data_sequence(self, chunk_size=1): retry_delay=0.05) retry_fun_call( fun=mbed_serial.open, - num_retries=10, + num_retries=20, retry_delay=0.05) except RetryError as exc: self.log('TEST ERROR: {}'.format(exc)) @@ -220,7 +220,7 @@ def loopback(self): retry_delay=0.05) retry_fun_call( fun=mbed_serial.open, - num_retries=10, + num_retries=20, retry_delay=0.05) except RetryError as exc: self.log('TEST ERROR: {}'.format(exc)) @@ -257,7 +257,7 @@ def change_line_coding(self): retry_delay=0.05) retry_fun_call( fun=mbed_serial.open, - num_retries=10, + num_retries=20, retry_delay=0.05) except RetryError as exc: self.log('TEST ERROR: {}'.format(exc)) From 1469c61232af60cbd2c808559892657b37714566 Mon Sep 17 00:00:00 2001 From: Russ Butler Date: Fri, 26 Oct 2018 11:12:55 -0500 Subject: [PATCH 402/488] Remove USB disconnect delay from Serial test Remove the USB disconnect delay since there is no reason this is needed. Failures which occur without this indicate a device or host problem. --- TESTS/usb_device/serial/main.cpp | 8 -------- 1 file changed, 8 deletions(-) diff --git a/TESTS/usb_device/serial/main.cpp b/TESTS/usb_device/serial/main.cpp index 20f9c3f1614..a356595003e 100644 --- a/TESTS/usb_device/serial/main.cpp +++ b/TESTS/usb_device/serial/main.cpp @@ -56,10 +56,6 @@ #define SERIAL_LOOPBACK_REPS 100 #define USB_RECONNECT_DELAY_MS 1 -// Additional delay necessary for Windows hosts -// to handle the reconnect operation correctly. -#define USB_DISCONNECT_DELAY_MS 1 - #define LINE_CODING_STRLEN 13 // 6 + 2 + 1 + 1 + 3 * comma #define USB_DEV_SN_LEN (32) // 32 hex digit UUID @@ -283,7 +279,6 @@ void test_cdc_usb_reconnect() TEST_ASSERT_TRUE(usb_cdc.configured()); TEST_ASSERT_TRUE(usb_cdc.ready()); - wait_ms(USB_DISCONNECT_DELAY_MS); // Disconnect the USB device. usb_cdc.disconnect(); TEST_ASSERT_FALSE(usb_cdc.configured()); @@ -305,7 +300,6 @@ void test_cdc_usb_reconnect() TEST_ASSERT_TRUE(usb_cdc.configured()); TEST_ASSERT_TRUE(usb_cdc.ready()); - wait_ms(USB_DISCONNECT_DELAY_MS); // Disconnect the USB device again. usb_cdc.disconnect(); TEST_ASSERT_FALSE(usb_cdc.configured()); @@ -525,7 +519,6 @@ void test_serial_usb_reconnect() TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); // Disconnect the USB device. - wait_ms(USB_DISCONNECT_DELAY_MS); usb_serial.disconnect(); TEST_ASSERT_FALSE(usb_serial.configured()); TEST_ASSERT_FALSE(usb_serial.connected()); @@ -552,7 +545,6 @@ void test_serial_usb_reconnect() TEST_ASSERT_EQUAL_INT(0, usb_serial.readable()); // Disconnect the USB device again. - wait_ms(USB_DISCONNECT_DELAY_MS); usb_serial.disconnect(); TEST_ASSERT_FALSE(usb_serial.configured()); TEST_ASSERT_FALSE(usb_serial.connected()); From 6abdbecdaddeba9ad5e588b5a87bf6aa466cdd3d Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Fri, 2 Nov 2018 12:47:55 +0100 Subject: [PATCH 403/488] Tests: USB: DTR fix for Linux hosts A DTR line is used to signal that the host has configured a terminal and is ready to transmit and receive data from the USB CDC/Serial device. When this test suite is run with the use of a Linux host, a workaround has to be used to overcome some platform specific DTR line behavior. Every time the serial port file descriptor is opened, the DTR line is asserted until the terminal attributes are set. As a consequence, the device receives a premature DTR signal with a duration of 200-500 us before the correct, long-lasting DTR signal set by the host-side test script. (tested on the Linux kernel 4.15.0) The solution is to wait for the first DTR spike, ignore it, and wait for the correct DTR signal again. --- TESTS/host_tests/usb_device_serial.py | 29 +++++----- TESTS/usb_device/serial/main.cpp | 78 +++++++++++++++++++++++++-- 2 files changed, 90 insertions(+), 17 deletions(-) diff --git a/TESTS/host_tests/usb_device_serial.py b/TESTS/host_tests/usb_device_serial.py index 2280b6db8e9..00fdc095d24 100644 --- a/TESTS/host_tests/usb_device_serial.py +++ b/TESTS/host_tests/usb_device_serial.py @@ -128,7 +128,7 @@ def __init__(self): def port_open_wait(self): """Open the serial and wait until it's closed by the device.""" - mbed_serial = serial.Serial() + mbed_serial = serial.Serial(dsrdtr=False) mbed_serial.dtr = False try: mbed_serial.port = retry_fun_call( @@ -139,19 +139,20 @@ def port_open_wait(self): fun=mbed_serial.open, num_retries=20, retry_delay=0.05) - mbed_serial.dtr = True - try: - mbed_serial.read() # wait until closed - except (serial.portNotOpenError, serial.SerialException): - pass except RetryError as exc: self.log('TEST ERROR: {}'.format(exc)) self.notify_complete(False) return + mbed_serial.dtr = True + try: + mbed_serial.read() # wait until closed + except (serial.portNotOpenError, serial.SerialException): + pass def port_open_close(self): """Open the serial and close it with a delay.""" - mbed_serial = serial.Serial(timeout=0.5, write_timeout=0.1) + mbed_serial = serial.Serial(timeout=0.5, write_timeout=0.1, dsrdtr=False) + mbed_serial.dtr = False try: mbed_serial.port = retry_fun_call( fun=functools.partial(self.get_usb_serial_name, self.dut_usb_dev_sn), # pylint: disable=not-callable @@ -161,14 +162,14 @@ def port_open_close(self): fun=mbed_serial.open, num_retries=20, retry_delay=0.05) - mbed_serial.reset_output_buffer() - mbed_serial.dtr = True - time.sleep(TERM_REOPEN_DELAY) - mbed_serial.close() except RetryError as exc: self.log('TEST ERROR: {}'.format(exc)) self.notify_complete(False) return + mbed_serial.reset_output_buffer() + mbed_serial.dtr = True + time.sleep(TERM_REOPEN_DELAY) + mbed_serial.close() def send_data_sequence(self, chunk_size=1): """Open the serial and send a sequence of values. @@ -176,7 +177,7 @@ def send_data_sequence(self, chunk_size=1): chunk_size defines the size of data sent in each write operation. The input buffer content is discarded. """ - mbed_serial = serial.Serial(write_timeout=0.1) + mbed_serial = serial.Serial(write_timeout=0.1, dsrdtr=False) try: mbed_serial.port = retry_fun_call( fun=functools.partial(self.get_usb_serial_name, self.dut_usb_dev_sn), # pylint: disable=not-callable @@ -211,7 +212,7 @@ def send_data_sequence(self, chunk_size=1): def loopback(self): """Open the serial and send back every byte received.""" - mbed_serial = serial.Serial(timeout=0.5, write_timeout=0.1) + mbed_serial = serial.Serial(timeout=0.5, write_timeout=0.1, dsrdtr=False) mbed_serial.dtr = False try: mbed_serial.port = retry_fun_call( @@ -248,7 +249,7 @@ def change_line_coding(self): New line coding params are read from the device serial data. """ - mbed_serial = serial.Serial(timeout=0.5) + mbed_serial = serial.Serial(timeout=0.5, dsrdtr=False) mbed_serial.dtr = False try: mbed_serial.port = retry_fun_call( diff --git a/TESTS/usb_device/serial/main.cpp b/TESTS/usb_device/serial/main.cpp index a356595003e..c6c804a1912 100644 --- a/TESTS/usb_device/serial/main.cpp +++ b/TESTS/usb_device/serial/main.cpp @@ -52,6 +52,24 @@ // This way the device has to correctly handle data bigger that its buffer. #define HOST_RX_BUFF_SIZE_RATIO 64 +// A DTR line is used to signal that the host has configured a terminal and +// is ready to transmit and receive data from the USB CDC/Serial device. +// When this test suite is run with the use of a Linux host, a workaround has +// to be used to overcome some platform specific DTR line behavior. +// Every time the serial port file descriptor is opened, the DTR line is +// asserted until the terminal attributes are set. +// As a consequence, the device receives a premature DTR signal with a +// duration of 200-500 us before the correct, long-lasting DTR signal set by +// the host-side test script. (tested on the Linux kernel 4.15.0) +// +// Online references: +// https://github.com/pyserial/pyserial/issues/124#issuecomment-227235402 +// +// The solution is to wait for the first DTR spike, ignore it, and wait for +// the correct DTR signal again. +#define LINUX_HOST_DTR_FIX 1 +#define LINUX_HOST_DTR_FIX_DELAY_MS 1 + #define CDC_LOOPBACK_REPS 1200 #define SERIAL_LOOPBACK_REPS 100 #define USB_RECONNECT_DELAY_MS 1 @@ -275,6 +293,10 @@ void test_cdc_usb_reconnect() greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, MSG_VALUE_DUMMY); // Wait for the host to open the port. +#if LINUX_HOST_DTR_FIX + usb_cdc.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif usb_cdc.wait_ready(); TEST_ASSERT_TRUE(usb_cdc.configured()); TEST_ASSERT_TRUE(usb_cdc.ready()); @@ -296,6 +318,10 @@ void test_cdc_usb_reconnect() greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, MSG_VALUE_DUMMY); // Wait for the host to open the port again. +#if LINUX_HOST_DTR_FIX + usb_cdc.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif usb_cdc.wait_ready(); TEST_ASSERT_TRUE(usb_cdc.configured()); TEST_ASSERT_TRUE(usb_cdc.ready()); @@ -317,6 +343,10 @@ void test_cdc_rx_single_bytes() TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); usb_cdc.connect(); greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, MSG_VALUE_DUMMY); +#if LINUX_HOST_DTR_FIX + usb_cdc.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif usb_cdc.wait_ready(); uint8_t buff = 0x01; for (int expected = 0xff; expected >= 0; expected--) { @@ -360,6 +390,10 @@ void test_cdc_rx_single_bytes_concurrent() TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); usb_cdc.connect(); greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, MSG_VALUE_DUMMY); +#if LINUX_HOST_DTR_FIX + usb_cdc.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif usb_cdc.wait_ready(); Thread tx_thread; event_flags.set(EF_SEND); @@ -393,6 +427,10 @@ void test_cdc_rx_multiple_bytes() TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); usb_cdc.connect(); greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, HOST_RX_BUFF_SIZE_RATIO); +#if LINUX_HOST_DTR_FIX + usb_cdc.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif usb_cdc.wait_ready(); uint8_t buff[RX_BUFF_SIZE] = { 0 }; uint8_t expected_buff[RX_BUFF_SIZE] = { 0 }; @@ -429,6 +467,10 @@ void test_cdc_rx_multiple_bytes_concurrent() TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); usb_cdc.connect(); greentea_send_kv(MSG_KEY_SEND_BYTES_MULTIPLE, HOST_RX_BUFF_SIZE_RATIO); +#if LINUX_HOST_DTR_FIX + usb_cdc.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif usb_cdc.wait_ready(); Thread tx_thread; event_flags.set(EF_SEND); @@ -470,6 +512,10 @@ void test_cdc_loopback() TestUSBCDC usb_cdc(USB_CDC_VID, USB_CDC_PID, 1, usb_dev_sn); usb_cdc.connect(); greentea_send_kv(MSG_KEY_LOOPBACK, MSG_VALUE_DUMMY); +#if LINUX_HOST_DTR_FIX + usb_cdc.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif usb_cdc.wait_ready(); uint8_t rx_buff, tx_buff; for (int i = 0; i < CDC_LOOPBACK_REPS; i++) { @@ -511,6 +557,10 @@ void test_serial_usb_reconnect() greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, MSG_VALUE_DUMMY); // Wait for the host to open the port. +#if LINUX_HOST_DTR_FIX + usb_serial.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif while (!usb_serial.connected()) { wait_ms(1); } @@ -537,6 +587,10 @@ void test_serial_usb_reconnect() greentea_send_kv(MSG_KEY_PORT_OPEN_WAIT, MSG_VALUE_DUMMY); // Wait for the host to open the port again. +#if LINUX_HOST_DTR_FIX + usb_serial.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif while (!usb_serial.connected()) { wait_ms(1); } @@ -563,6 +617,10 @@ void test_serial_term_reopen() usb_serial.connect(); greentea_send_kv(MSG_KEY_PORT_OPEN_CLOSE, MSG_VALUE_DUMMY); // Wait for the host to open the terminal. +#if LINUX_HOST_DTR_FIX + usb_serial.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif while (!usb_serial.connected()) { wait_ms(1); } @@ -582,6 +640,10 @@ void test_serial_term_reopen() greentea_send_kv(MSG_KEY_PORT_OPEN_CLOSE, MSG_VALUE_DUMMY); // Wait for the host to open the terminal again. +#if LINUX_HOST_DTR_FIX + usb_serial.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif while (!usb_serial.connected()) { wait_ms(1); } @@ -613,9 +675,11 @@ void test_serial_getc() TestUSBSerial usb_serial(USB_SERIAL_VID, USB_SERIAL_PID, 1, usb_dev_sn); usb_serial.connect(); greentea_send_kv(MSG_KEY_SEND_BYTES_SINGLE, MSG_VALUE_DUMMY); - while (!usb_serial.connected()) { - wait_ms(1); - } +#if LINUX_HOST_DTR_FIX + usb_serial.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif + usb_serial.wait_ready(); for (int expected = 0xff; expected >= 0; expected--) { TEST_ASSERT_EQUAL_INT(expected, usb_serial.getc()); } @@ -643,6 +707,10 @@ void test_serial_printf_scanf() TestUSBSerial usb_serial(USB_SERIAL_VID, USB_SERIAL_PID, 1, usb_dev_sn); usb_serial.connect(); greentea_send_kv(MSG_KEY_LOOPBACK, MSG_VALUE_DUMMY); +#if LINUX_HOST_DTR_FIX + usb_serial.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif usb_serial.wait_ready(); static const char fmt[] = "Formatted\nstring %i."; int tx_val, rx_val, rc; @@ -684,6 +752,10 @@ void test_serial_line_coding_change() TestUSBSerial usb_serial(USB_SERIAL_VID, USB_SERIAL_PID, 1, usb_dev_sn); usb_serial.connect(); greentea_send_kv(MSG_KEY_CHANGE_LINE_CODING, MSG_VALUE_DUMMY); +#if LINUX_HOST_DTR_FIX + usb_serial.wait_ready(); + wait_ms(LINUX_HOST_DTR_FIX_DELAY_MS); +#endif usb_serial.wait_ready(); usb_serial.attach(line_coding_changed_cb); size_t num_line_codings = sizeof test_codings / sizeof test_codings[0]; From dba30dacd809bd391ce53adc5c073d40822b93e1 Mon Sep 17 00:00:00 2001 From: bcostm Date: Tue, 30 Oct 2018 09:43:15 +0100 Subject: [PATCH 404/488] STM32F4 USB: add patch in CubeF4 hal driver --- .../TARGET_STM32F4/device/stm32f4xx_hal_pcd.c | 148 ++++++++++++-- .../TARGET_STM32F4/device/stm32f4xx_hal_pcd.h | 1 + .../TARGET_STM32F4/device/stm32f4xx_ll_usb.c | 180 +++++++++++++++++- .../TARGET_STM32F4/device/stm32f4xx_ll_usb.h | 3 + 4 files changed, 307 insertions(+), 25 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.c b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.c index a6ed3193fe8..7e14649c3cd 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.c +++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.c @@ -106,6 +106,7 @@ * @{ */ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t epnum); +static HAL_StatusTypeDef PCD_ReadRxFifo(PCD_HandleTypeDef *hpcd); // MBED PATCH /** * @} */ @@ -394,6 +395,13 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) } } + // MBED PATCH + if (( epint & USB_OTG_DOEPINT_EPDISD) == USB_OTG_DOEPINT_EPDISD) + { + CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_EPDISD); + } + // MBED PATCH + if(( epint & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP) { /* Inform the upper layer that a setup packet is available */ @@ -667,27 +675,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) /* Handle RxQLevel Interrupt */ if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) { - USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); - - temp = USBx->GRXSTSP; - - ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM]; - - if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_DATA_UPDT) - { - if((temp & USB_OTG_GRXSTSP_BCNT) != 0U) - { - USB_ReadPacket(USBx, ep->xfer_buff, (temp & USB_OTG_GRXSTSP_BCNT) >> 4U); - ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; - ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; - } - } - else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_SETUP_UPDT) - { - USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U); - ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; - } - USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); + PCD_ReadRxFifo(hpcd); // MBED PATCH } /* Handle SOF Interrupt */ @@ -1131,6 +1119,86 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, return HAL_OK; } +// MBED PATCH +/** + * @brief Abort a transaction. + * @param hpcd: PCD handle + * @param ep_addr: endpoint address + * @retval HAL status + */ +HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) +{ + USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; + HAL_StatusTypeDef ret = HAL_OK; + USB_OTG_EPTypeDef *ep; + + if ((0x80 & ep_addr) == 0x80) + { + ep = &hpcd->IN_ep[ep_addr & 0x7F]; + } + else + { + ep = &hpcd->OUT_ep[ep_addr]; + } + + __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); + + ep->num = ep_addr & 0x7F; + ep->is_in = ((ep_addr & 0x80) == 0x80); + + USB_EPSetNak(hpcd->Instance, ep); + + if ((0x80 & ep_addr) == 0x80) + { + ret = USB_EPStopXfer(hpcd->Instance , ep); + if (ret == HAL_OK) + { + ret = USB_FlushTxFifo(hpcd->Instance, ep_addr & 0x7F); + } + } + else + { + /* Set global NAK */ + USBx_DEVICE->DCTL |= USB_OTG_DCTL_SGONAK; + + /* Read all entries from the fifo so global NAK takes effect */ + while (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) + { + PCD_ReadRxFifo(hpcd); + } + + /* Stop the transfer */ + ret = USB_EPStopXfer(hpcd->Instance , ep); + if (ret == HAL_BUSY) + { + /* If USB_EPStopXfer returns HAL_BUSY then a setup packet + * arrived after the rx fifo was processed but before USB_EPStopXfer + * was called. Process the rx fifo one more time to read the + * setup packet. + * + * Note - after the setup packet has been received no further + * packets will be received over USB. This is because the next + * phase (data or status) of the control transfer started by + * the setup packet will be naked until global nak is cleared. + */ + while (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) + { + PCD_ReadRxFifo(hpcd); + } + + ret = USB_EPStopXfer(hpcd->Instance , ep); + } + + /* Clear global nak */ + USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGONAK; + } + + __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); + + return ret; +} +// MBED PATCH + /** * @brief Set a STALL condition over an endpoint. * @param hpcd PCD handle @@ -1356,6 +1424,44 @@ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t return HAL_OK; } +// MBED PATCH +/** + * @brief Process the next RX fifo entry + * @param hpcd: PCD handle + * @retval HAL status + */ +static HAL_StatusTypeDef PCD_ReadRxFifo(PCD_HandleTypeDef *hpcd) +{ + USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; + USB_OTG_EPTypeDef *ep; + uint32_t temp = 0; + + USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); + + temp = USBx->GRXSTSP; + + ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM]; + + if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_DATA_UPDT) + { + if((temp & USB_OTG_GRXSTSP_BCNT) != 0U) + { + USB_ReadPacket(USBx, ep->xfer_buff, (temp & USB_OTG_GRXSTSP_BCNT) >> 4U); + ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; + ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; + } + } + else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_SETUP_UPDT) + { + USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U); + ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; + } + USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); + + return HAL_OK; +} +// MBED PATCH + /** * @} */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.h b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.h index d5b8e1605b8..eeeaccf93d3 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.h +++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.h @@ -300,6 +300,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); +HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); // MBED PATCH uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.c b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.c index c114307b947..b610d025535 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.c +++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.c @@ -450,7 +450,8 @@ HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTy if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0U) { - USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U) |\ + // MBED PATCH + USBx_INEP(ep->num)->DIEPCTL = ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U) |\ ((ep->num) << 22U) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP)); } } @@ -460,7 +461,8 @@ HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTy if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0U) { - USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U) |\ + // MBED PATCH + USBx_OUTEP(ep->num)->DOEPCTL = ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U) |\ (USB_OTG_DIEPCTL_SD0PID_SEVNFRM)| (USB_OTG_DOEPCTL_USBAEP)); } } @@ -481,7 +483,8 @@ HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB { if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0U) { - USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U) |\ + // MBED PATCH + USBx_INEP(ep->num)->DIEPCTL = ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18U) |\ ((ep->num) << 22U) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP)); } @@ -495,7 +498,8 @@ HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB { if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0U) { - USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U) |\ + // MBED PATCH + USBx_OUTEP(ep->num)->DOEPCTL = ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18U) |\ ((ep->num) << 22U) | (USB_OTG_DOEPCTL_USBAEP)); debug = (uint32_t)(((uint32_t )USBx) + USB_OTG_OUT_ENDPOINT_BASE + (0U)*USB_OTG_EP_REG_SIZE); @@ -865,6 +869,174 @@ HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeD return HAL_OK; } +// MBED PATCH +/** + * @brief USB_EPStoptXfer : stop transfer on this endpoint + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @retval HAL status + * @note IN endpoints must have NAK enabled before calling this function + * @note OUT endpoints must have global out NAK enabled before calling this + * function. Furthermore, the RX fifo must be empty or the status + * HAL_BUSY will be returned. + */ +HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep) +{ + HAL_StatusTypeDef ret = HAL_OK; + uint32_t count = 0U; + uint32_t epint, fifoemptymsk; + + /* IN endpoint */ + if (ep->is_in == 1U) + { + + /* EP enable, IN data in FIFO */ + if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) + { + /* Disable this endpoint */ + USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_EPDIS; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_INEP(ep->num)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA); + } + + /* Clear transfer complete interrupt */ + epint = USB_ReadDevInEPInterrupt(USBx, ep->num); + if((epint & USB_OTG_DIEPINT_XFRC) == USB_OTG_DIEPINT_XFRC) + { + CLEAR_IN_EP_INTR(ep->num, USB_OTG_DIEPINT_XFRC); + } + + /* Mask fifo empty interrupt */ + fifoemptymsk = 0x1U << ep->num; + atomic_clr_u32(&USBx_DEVICE->DIEPEMPMSK, fifoemptymsk); + } + else /* OUT endpoint */ + { + if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) + { + /* Disable this endpoint */ + USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_EPDIS; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + if ((USBx->GINTSTS & USB_OTG_GINTSTS_RXFLVL) == USB_OTG_GINTSTS_RXFLVL) + { + /* Although not mentioned in the Reference Manual, it appears that the + * rx fifo must be empty for an OUT endpoint to be disabled. Typically + * this will happen when setting the global OUT nak (required by Reference + * Manual) as this requires processing the rx fifo. This is not guaranteed + * though, as a setup packet can arrive even while global OUT nak is set. + * + * During testing this event was observed and prevented endpoint disabling + * from completing until the rx fifo was empty. To address this problem + * return HAL_BUSY if the rx fifo is not empty to give higher level code + * a chance to clear the fifo and retry the operation. + * + */ + return HAL_BUSY; + } + } + while ((USBx_OUTEP(ep->num)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA); + } + + /* Clear interrupt */ + epint = USB_ReadDevOutEPInterrupt(USBx, ep->num); + if(( epint & USB_OTG_DOEPINT_XFRC) == USB_OTG_DOEPINT_XFRC) + { + CLEAR_OUT_EP_INTR(ep->num, USB_OTG_DOEPINT_XFRC); + } + } + return ret; +} + +/** + * @brief USB_EPSetNak : stop transfer and nak all tokens on this endpoint + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @retval HAL status + */ +HAL_StatusTypeDef USB_EPSetNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep) +{ + uint32_t count = 0; + if (ep->is_in == 1U) + { + USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_INEP(ep->num)->DIEPCTL & USB_OTG_DIEPCTL_NAKSTS) != USB_OTG_DIEPCTL_NAKSTS); + } + else + { + USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_OUTEP(ep->num)->DOEPCTL & USB_OTG_DOEPCTL_NAKSTS) != USB_OTG_DOEPCTL_NAKSTS); + } + return HAL_OK; +} + +/** + * @brief USB_EPSetNak : resume transfer and stop naking on this endpoint + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @retval HAL status + */ +HAL_StatusTypeDef USB_EPClearNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep) +{ + uint32_t count = 0; + if (ep->is_in == 1U) + { + USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_CNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_INEP(ep->num)->DIEPCTL & USB_OTG_DIEPCTL_NAKSTS) == USB_OTG_DIEPCTL_NAKSTS); + } + else + { + USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_OUTEP(ep->num)->DOEPCTL & USB_OTG_DOEPCTL_NAKSTS) == USB_OTG_DOEPCTL_NAKSTS); + } + return HAL_OK; +} +// MBED PATCH + /** * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated * with the EP/channel diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.h b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.h index 1048bee537b..34de08cc1af 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.h +++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.h @@ -416,6 +416,9 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EP HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); +HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); // MBED PATCH +HAL_StatusTypeDef USB_EPSetNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); // MBED PATCH +HAL_StatusTypeDef USB_EPClearNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); // MBED PATCH HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma); void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len); From 058a0cfb785f0d4a48a744f8c4e488fc7368f635 Mon Sep 17 00:00:00 2001 From: bcostm Date: Tue, 30 Oct 2018 09:44:17 +0100 Subject: [PATCH 405/488] STM32F4 USB: remove useless macro --- usb/device/targets/TARGET_STM/USBPhy_STM32.cpp | 5 ----- 1 file changed, 5 deletions(-) diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 9f1c78d5419..c37720fb96f 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -24,11 +24,6 @@ #define USBSTM_HAL_UNSUPPORTED #endif -/* STM32F4 family without USB_STM_HAL use another HAL */ -#if defined(TARGET_STM) && defined(TARGET_STM32F4) && !defined(USB_STM_HAL) -#define USBSTM_HAL_UNSUPPORTED -#endif - #ifndef USBSTM_HAL_UNSUPPORTED #include "USBPhyHw.h" #include "pinmap.h" From b31f989efb9092e6ef4b42137e67ed61cd5b352b Mon Sep 17 00:00:00 2001 From: bcostm Date: Tue, 30 Oct 2018 09:45:13 +0100 Subject: [PATCH 406/488] STM32F4 USB: enable USB Device in targets.json tests-usb_device-basic are OK on the following platforms: NUCLEO_F412ZG NUCLEO_F413ZH NUCLEO_F429ZI NUCLEO_F446ZE DISCO_F413ZH DISCO_F469NI --- targets/targets.json | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/targets/targets.json b/targets/targets.json index d22539e31e4..7c425be66e0 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -2440,7 +2440,8 @@ "SERIAL_FC", "TRNG", "FLASH", - "MPU" + "MPU", + "USBDEVICE" ], "release_versions": ["2", "5"], "device_name": "STM32F412ZG", @@ -2570,7 +2571,8 @@ "TRNG", "FLASH", "QSPI", - "MPU" + "MPU", + "USBDEVICE" ], "bootloader_supported": true, "release_versions": ["2", "5"], @@ -2611,7 +2613,8 @@ "SERIAL_FC", "TRNG", "FLASH", - "MPU" + "MPU", + "USBDEVICE" ], "bootloader_supported": true, "release_versions": ["2", "5"], @@ -2668,7 +2671,8 @@ "SERIAL_FC", "TRNG", "FLASH", - "MPU" + "MPU", + "USBDEVICE" ], "detect_code": ["0796"], "release_versions": ["2", "5"], @@ -2771,7 +2775,8 @@ "SERIAL_ASYNCH", "SERIAL_FC", "FLASH", - "MPU" + "MPU", + "USBDEVICE" ], "release_versions": ["2", "5"], "device_name": "STM32F446ZE" @@ -3641,7 +3646,8 @@ "TRNG", "FLASH", "QSPI", - "MPU" + "MPU", + "USBDEVICE" ], "release_versions": ["2", "5"], "device_name": "STM32F469NI", From 817e339bf0bb0fde2acb05fa74c6ce8c59f0873e Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Fri, 14 Dec 2018 17:41:19 +0100 Subject: [PATCH 407/488] Tests: USB: Add a README for Linux users Explain how to overcome xHCI limitations in kernels prior to v4.17 and successfully run USB tests. --- TESTS/usb_device/basic/README.md | 15 +++++++++++++++ 1 file changed, 15 insertions(+) create mode 100644 TESTS/usb_device/basic/README.md diff --git a/TESTS/usb_device/basic/README.md b/TESTS/usb_device/basic/README.md new file mode 100644 index 00000000000..88b65e33f29 --- /dev/null +++ b/TESTS/usb_device/basic/README.md @@ -0,0 +1,15 @@ +# Testing the USB device data toggle reset with a Linux host + +When you run the `tests-usb_device-basic` test suite on a Linux machine, please make +sure that at least one of the following prerequisites are met: +* using the Linux kernel ***4.17* or newer**, +* using the ***eHCI*** USB driver instead of *xHCI*. + +Implementations of the *xHCI* driver prior to version 4.17 of the Linux kernel did +not have the functionality necessary to test `"endpoint test data toggle reset"`. +Even though the data toggle is correctly reset on the device side, the host side will +not be synchronized and the test will falsely fail. + +Further reading: +1. [the Linux kernel patch adding missing xHCI behavior](https://github.com/torvalds/linux/commit/f5249461b504d35aa1a40140983b7ec415807d9e), +1. [LKML discussion explaining the details of this issue](https://lkml.org/lkml/2016/12/15/388). \ No newline at end of file From 15f93890d3f4418c31c12fa993e418744950212d Mon Sep 17 00:00:00 2001 From: TomoYamanaka Date: Thu, 20 Dec 2018 13:32:59 +0900 Subject: [PATCH 408/488] Renesas : Implement USB Device feature I implemented USB Device feature for Renesas mbed boards. The code referenced the following code as a starting point and is implemented it by inheritting USBPhy same as other boards. (mbed-os\features\unsupported\USBDevice\targets\TARGET_RENESAS) --- targets/targets.json | 4 +- .../TARGET_RZ_A1XX/USBEndpoints_RZ_A1.h | 84 + .../TARGET_RENESAS/TARGET_RZ_A1XX/USBPhyHw.h | 106 ++ .../TARGET_RZ_A1XX/USBPhy_RZ_A1.cpp | 1507 +++++++++++++++++ .../TARGET_RZ_A1XX/USBPhy_RZ_A1_Def.h | 697 ++++++++ 5 files changed, 2396 insertions(+), 2 deletions(-) create mode 100644 usb/device/targets/TARGET_RENESAS/TARGET_RZ_A1XX/USBEndpoints_RZ_A1.h create mode 100644 usb/device/targets/TARGET_RENESAS/TARGET_RZ_A1XX/USBPhyHw.h create mode 100644 usb/device/targets/TARGET_RENESAS/TARGET_RZ_A1XX/USBPhy_RZ_A1.cpp create mode 100644 usb/device/targets/TARGET_RENESAS/TARGET_RZ_A1XX/USBPhy_RZ_A1_Def.h diff --git a/targets/targets.json b/targets/targets.json index 7c425be66e0..e7d3cf4ae7e 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -5114,7 +5114,7 @@ "supported_form_factors": ["ARDUINO"], "extra_labels_add": ["RZA1H", "MBRZA1H", "RZ_A1_EMAC"], "components_add": ["SD"], - "device_has_add": ["EMAC", "FLASH", "LPTICKER"], + "device_has_add": ["USBDEVICE", "EMAC", "FLASH", "LPTICKER"], "release_versions": ["2", "5"], "device_name": "R7S72100", "bootloader_supported": true @@ -5130,7 +5130,7 @@ "supported_form_factors": ["ARDUINO"], "extra_labels_add": ["RZA1UL", "MBRZA1LU"], "components_add": ["SD"], - "device_has_add": ["TRNG", "FLASH", "LPTICKER"], + "device_has_add": ["USBDEVICE", "TRNG", "FLASH", "LPTICKER"], "device_has_remove": ["ETHERNET"], "release_versions": ["2", "5"], "device_name": "R7S72103", diff --git a/usb/device/targets/TARGET_RENESAS/TARGET_RZ_A1XX/USBEndpoints_RZ_A1.h b/usb/device/targets/TARGET_RENESAS/TARGET_RZ_A1XX/USBEndpoints_RZ_A1.h new file mode 100644 index 00000000000..226b979687d --- /dev/null +++ b/usb/device/targets/TARGET_RENESAS/TARGET_RZ_A1XX/USBEndpoints_RZ_A1.h @@ -0,0 +1,84 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited, All rights reserved. + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#define NUMBER_OF_LOGICAL_ENDPOINTS (16) +#define NUMBER_OF_PHYSICAL_ENDPOINTS (NUMBER_OF_LOGICAL_ENDPOINTS * 2) + +/* Define physical endpoint numbers */ + +/* Endpoint No. Type(s) MaxSiz DoubleBuf pipe */ +/* ---------------- --------- ------ --------- ---- */ +#define EP0OUT (0x00) /* Control 256 No 0 */ +#define EP0IN (0x80) /* Control 256 No 0 */ +#define EP1OUT (0x01) /* Int 64 No 6 */ +#define EP1IN (0x81) /* Int 64 No 7 */ +#define EP2OUT (0x02) /* Bulk 2048 Yes 3 */ +#define EP2IN (0x82) /* Bulk 2048 Yes 4 */ +#define EP3OUT (0x03) /* Bulk/Iso 2048 Yes 1 */ +#define EP3IN (0x83) /* Bulk/Iso 2048 Yes 2 */ +/*following EP is not configured in sample program*/ +#define EP6IN (0x86) /* Bulk 2048 Yes 5 */ +#define EP8IN (0x88) /* Int 64 No 8 */ +#define EP9IN (0x89) /* Bulk 512 Bulk 9 */ +#define EP10IN (0x8A) /* Int/Bulk 2048 Bulk 10 */ +#define EP11IN (0x8B) /* Bulk 2048 Yes 11 */ +#define EP12IN (0x8C) /* Bulk 2048 Yes 12 */ +#define EP13IN (0x8D) /* Bulk 2048 Yes 13 */ +#define EP14IN (0x8E) /* Bulk 2048 Yes 14 */ +#define EP15IN (0x8F) /* Bulk 2048 Yes 15 */ + +/* Maximum Packet sizes */ +#define MAX_PACKET_SIZE_EP0 (64) /*pipe0/pipe0: control */ +#define MAX_PACKET_SIZE_EP1 (64) /*pipe6/pipe7: interrupt */ +#define MAX_PACKET_SIZE_EP2 (512) /*pipe3/pipe4: bulk */ +#define MAX_PACKET_SIZE_EP3 (512) /*pipe1/pipe2: isochronous */ +#define MAX_PACKET_SIZE_EP6 (64) /*pipe5: Note *1 */ +#define MAX_PACKET_SIZE_EP8 (64) /*pipe7: Note *1 */ +#define MAX_PACKET_SIZE_EP9 (512) /*pipe8: Note *1 */ +#define MAX_PACKET_SIZE_EP10 (512) /*pipe9: Note *1 */ +#define MAX_PACKET_SIZE_EP11 (512) /*pipe10: Note *1 */ +#define MAX_PACKET_SIZE_EP12 (512) /*pipe11: Note *1 */ +#define MAX_PACKET_SIZE_EP13 (512) /*pipe12: Note *1 */ +#define MAX_PACKET_SIZE_EP14 (512) /*pipe13: Note *1 */ +#define MAX_PACKET_SIZE_EP15 (512) /*pipe14: Note *1 */ +/* Note *1: This pipe is not configure in sample program */ + + +/* Generic endpoints - intended to be portable accross devices */ +/* and be suitable for simple USB devices. */ + +/* Bulk endpoints */ +#define EPBULK_OUT (EP2OUT) +#define EPBULK_IN (EP2IN) +#define EPBULK_OUT_callback EP2_OUT_callback +#define EPBULK_IN_callback EP2_IN_callback +/* Interrupt endpoints */ +#define EPINT_OUT (EP1OUT) +#define EPINT_IN (EP1IN) +#define EPINT_OUT_callback EP1_OUT_callback +#define EPINT_IN_callback EP1_IN_callback +/* Isochronous endpoints */ +#define EPISO_OUT (EP3OUT) +#define EPISO_IN (EP3IN) +#define EPISO_OUT_callback EP3_OUT_callback +#define EPISO_IN_callback EP3_IN_callback + +#define MAX_PACKET_SIZE_EPBULK (MAX_PACKET_SIZE_EP2) +#define MAX_PACKET_SIZE_EPINT (MAX_PACKET_SIZE_EP1) +#define MAX_PACKET_SIZE_EPISO (MAX_PACKET_SIZE_EP3) + +/*EOF*/ diff --git a/usb/device/targets/TARGET_RENESAS/TARGET_RZ_A1XX/USBPhyHw.h b/usb/device/targets/TARGET_RENESAS/TARGET_RZ_A1XX/USBPhyHw.h new file mode 100644 index 00000000000..62d05dc91b8 --- /dev/null +++ b/usb/device/targets/TARGET_RENESAS/TARGET_RZ_A1XX/USBPhyHw.h @@ -0,0 +1,106 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited, All rights reserved. + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBPHYHW_H +#define USBPHYHW_H + +#include "mbed.h" +#include "USBPhy.h" + + +class USBPhyHw : public USBPhy { +public: + USBPhyHw(); + virtual ~USBPhyHw(); + virtual void init(USBPhyEvents *events); + virtual void deinit(); + virtual bool powered(); + virtual void connect(); + virtual void disconnect(); + virtual void configure(); + virtual void unconfigure(); + virtual void sof_enable(); + virtual void sof_disable(); + virtual void set_address(uint8_t address); + virtual void remote_wakeup(); + virtual const usb_ep_table_t* endpoint_table(); + + virtual uint32_t ep0_set_max_packet(uint32_t max_packet); + virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size); + virtual void ep0_read(uint8_t *data, uint32_t size); + virtual uint32_t ep0_read_result(); + virtual void ep0_write(uint8_t *buffer, uint32_t size); + virtual void ep0_stall(); + + virtual bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type); + virtual void endpoint_remove(usb_ep_t endpoint); + virtual void endpoint_stall(usb_ep_t endpoint); + virtual void endpoint_unstall(usb_ep_t endpoint); + + virtual bool endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual uint32_t endpoint_read_result(usb_ep_t endpoint); + virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size); + virtual void endpoint_abort(usb_ep_t endpoint); + + virtual void process(); + +private: + #define PIPE_NUM (16) + + typedef struct { + bool enable; + uint16_t status; + uint32_t req_size; + uint32_t data_cnt; + uint8_t *p_data; + } pipe_ctrl_t; + + USBPhyEvents *events; + pipe_ctrl_t pipe_ctrl[PIPE_NUM]; + uint16_t setup_buffer[32]; + + static void _usbisr(void); + void chg_curpipe(uint16_t pipe, uint16_t isel); + uint16_t is_set_frdy(uint16_t pipe, uint16_t isel); + uint8_t * read_fifo(uint16_t pipe, uint16_t count, uint8_t *read_p); + uint16_t read_data(uint16_t pipe); + void fifo_to_buf(uint16_t pipe); + uint8_t * write_fifo(uint16_t pipe, uint16_t count, uint8_t *write_p); + uint16_t write_data(uint16_t pipe); + void buf_to_fifo(uint16_t pipe); + uint16_t * get_pipectr_reg(uint16_t pipe); + uint16_t * get_pipetre_reg(uint16_t pipe); + uint16_t * get_pipetrn_reg(uint16_t pipe); + uint16_t * get_fifoctr_reg(uint16_t pipe); + uint16_t * get_fifosel_reg(uint16_t pipe); + uint32_t * get_fifo_reg(uint16_t pipe); + uint16_t get_pid(uint16_t pipe); + void set_mbw(uint16_t pipe, uint16_t data); + void set_pid(uint16_t pipe, uint16_t new_pid); + void cpu_delay_1us(uint16_t time); + uint16_t EP2PIPE(uint16_t endpoint); + uint16_t PIPE2EP(uint16_t pipe); + uint16_t PIPE2FIFO(uint16_t pipe); + void reset_usb(uint16_t clockmode); + bool chk_vbsts(void); + void ctrl_end(uint16_t status); + void data_end(uint16_t pipe, uint16_t status); + void forced_termination(uint16_t pipe, uint16_t status); + +}; + +#endif diff --git a/usb/device/targets/TARGET_RENESAS/TARGET_RZ_A1XX/USBPhy_RZ_A1.cpp b/usb/device/targets/TARGET_RENESAS/TARGET_RZ_A1XX/USBPhy_RZ_A1.cpp new file mode 100644 index 00000000000..81a47a0f60b --- /dev/null +++ b/usb/device/targets/TARGET_RENESAS/TARGET_RZ_A1XX/USBPhy_RZ_A1.cpp @@ -0,0 +1,1507 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited, All rights reserved. + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + + +#if defined(DEVICE_USBDEVICE) && DEVICE_USBDEVICE + +extern "C" +{ +#include "r_typedefs.h" +#include "iodefine.h" +} +#include "USBPhyHw.h" +#include "rza_io_regrw.h" +#include "USBDevice_Types.h" +#include "USBEndpoints_RZ_A1.h" +#include "USBPhy_RZ_A1_Def.h" + + +/**** User Selection ****/ +#define USB_FUNCTION_CH 0 +#define USB_FUNCTION_HISPEED 0 // 1: High-Speed 0: Full-Speed + +#if (USB_FUNCTION_CH == 0) +#define USB_MX USB200 +#define USBIX_IRQn USBI0_IRQn +#else +#define USB_MX USB201 +#define USBIX_IRQn USBI1_IRQn +#endif + +/* There are maintenance routine of SHTNAK and BFRE bits in original sample program. +* This sample is not programmed. Do maintenance the "def_pipecfg" array if you want it. */ +const struct PIPECFGREC { + uint16_t endpoint; + uint16_t pipesel; + uint16_t pipecfg; + uint16_t pipebuf; + uint16_t pipemaxp; + uint16_t pipeperi; +} def_pipecfg[] = { + /* EP0OUT and EP0IN are configured by USB IP */ + { + EP1OUT, /* EP1: Host -> Func, INT */ + 6 | USB_FUNCTION_D0FIFO_USE, + USB_TYPFIELD_INT | USB_BFREOFF | USB_CFG_DBLBOFF | USB_CFG_CNTMDON | USB_DIR_P_OUT | 1, + USB_BUF_SIZE(64) | 0x04u, + MAX_PACKET_SIZE_EP1, + 3, + }, + { + EP1IN, /* EP1: Host <- Func, INT */ + 7 | USB_FUNCTION_D1FIFO_USE, + USB_TYPFIELD_INT | USB_BFREOFF | USB_CFG_DBLBOFF | USB_CFG_CNTMDOFF | USB_DIR_P_IN | 1, + USB_BUF_SIZE(64) | 0x05u, + MAX_PACKET_SIZE_EP1, + 3, + }, + { + EP2OUT, /* EP2: Host -> Func, BULK */ + 3 | USB_FUNCTION_D0FIFO_USE, + USB_TYPFIELD_BULK | USB_BFREOFF | USB_CFG_DBLBON | USB_CFG_CNTMDON | USB_SHTNAKFIELD | USB_DIR_P_OUT | 2, + USB_BUF_SIZE(2048) | 0x30u, + MAX_PACKET_SIZE_EP2, + 0, + }, + { + EP2IN, /* EP2: Host <- Func, BULK */ + 4 | USB_FUNCTION_D1FIFO_USE, + USB_TYPFIELD_BULK | USB_BFREOFF | USB_CFG_DBLBOFF | USB_CFG_CNTMDON | USB_DIR_P_IN | 2, + USB_BUF_SIZE(2048) | 0x50u, + MAX_PACKET_SIZE_EP2, + 0, + }, + { + EP3OUT, /* EP3: Host -> Func, ISO */ + 1 | USB_FUNCTION_D0FIFO_USE, + USB_TYPFIELD_ISO | USB_BFREOFF | USB_CFG_DBLBON | USB_CFG_CNTMDOFF | USB_SHTNAKFIELD | USB_DIR_P_OUT | 3, + USB_BUF_SIZE(512) | 0x10u, + MAX_PACKET_SIZE_EP3, + 0, + }, + { + EP3IN, /* EP3: Host <- Func, ISO */ + 2 | USB_FUNCTION_D1FIFO_USE, + USB_TYPFIELD_ISO | USB_BFREOFF | USB_CFG_DBLBON | USB_CFG_CNTMDOFF | USB_DIR_P_IN | 3, + USB_BUF_SIZE(512) | 0x20u, + MAX_PACKET_SIZE_EP3, + 0, + }, + { /* terminator */ + 0, 0, 0, 0, 0, 0 + }, +}; + +static USBPhyHw *instance; +static uint8_t _usb_speed = USB_FUNCTION_HISPEED; +static bool run_later_ctrl_comp = false; + +USBPhy *get_usb_phy() +{ + static USBPhyHw usbphy; + return &usbphy; +} + +USBPhyHw::USBPhyHw(): events(NULL) +{ +} + +USBPhyHw::~USBPhyHw() +{ +} + +void USBPhyHw::init(USBPhyEvents *events) +{ + volatile uint8_t dummy_read; + + this->events = events; + + /* registers me */ + instance = this; + + /* Disable IRQ */ + GIC_DisableIRQ(USBIX_IRQn); + +#if (USB_FUNCTION_CH == 0) + CPG.STBCR7 &= ~(CPG_STBCR7_MSTP71); +#else + CPG.STBCR7 &= ~(CPG_STBCR7_MSTP71 | CPG_STBCR7_MSTP70); +#endif + dummy_read = CPG.STBCR7; + (void)dummy_read; + + /* module reset and clock select */ + reset_usb(USB_X1_48MHZ); /* USB_X1 48MHz */ + + /* Set to USB Function and select speed */ + USB_MX.SYSCFG0 &= ~USB_DPRPU; + USB_MX.SYSCFG0 &= ~USB_DRPD; + USB_MX.SYSCFG0 &= ~USB_DCFM; /* USB Functoin */ + USB_MX.SYSCFG0 |= USB_USBE; + + if (_usb_speed == 0) { + USB_MX.SYSCFG0 &= ~USB_HSE; /* Full-Speed */ + } else { + USB_MX.SYSCFG0 |= USB_HSE; /* High-Speed */ + } + cpu_delay_1us(1500); +} + +void USBPhyHw::deinit() +{ + volatile uint8_t dummy_read; + + disconnect(); + +#if (USB_FUNCTION_CH == 0) + CPG.STBCR7 |= CPG_STBCR7_MSTP71; +#else + CPG.STBCR7 |= (CPG_STBCR7_MSTP71 | CPG_STBCR7_MSTP70); +#endif + dummy_read = CPG.STBCR7; + (void)dummy_read; +} + +bool USBPhyHw::powered() +{ + // return true if powered false otherwise. Devices which don't support + // this should always return true + return true; +} + +void USBPhyHw::connect() +{ + /* Enable pullup on D+ */ + USB_MX.INTENB0 |= (USB_VBSE | USB_SOFE | USB_DVSE | USB_CTRE | USB_BEMPE | USB_NRDYE | USB_BRDYE); + USB_MX.SYSCFG0 |= USB_DPRPU; + + /* Enable USB */ + InterruptHandlerRegister(USBIX_IRQn, &_usbisr); + GIC_SetPriority(USBIX_IRQn, 16); + GIC_SetConfiguration(USBIX_IRQn, 1); + GIC_EnableIRQ(USBIX_IRQn); +} + +void USBPhyHw::disconnect() +{ + /* Disable USB */ + GIC_DisableIRQ(USBIX_IRQn); + InterruptHandlerRegister(USBIX_IRQn, NULL); + + /* Disable pullup on D+ */ + USB_MX.SYSCFG0 &= ~USB_DPRPU; + cpu_delay_1us(1); + USB_MX.SYSCFG0 |= USB_DCFM; + cpu_delay_1us(1); + USB_MX.SYSCFG0 &= ~USB_DCFM; +} + +void USBPhyHw::configure() +{ +} + +void USBPhyHw::unconfigure() +{ +} + +void USBPhyHw::sof_enable() +{ + /* Enable SOF interrupt */ + USB_MX.INTENB0 |= USB_SOFE; +} + +void USBPhyHw::sof_disable() +{ + /* Disable SOF interrupt */ + USB_MX.INTENB0 &= ~USB_SOFE; +} + +void USBPhyHw::set_address(uint8_t address) +{ + if (address <= 127) { + set_pid(USB_PIPE0, USB_PID_BUF); /* Set BUF */ + } else { + set_pid(USB_PIPE0, USB_PID_STALL); /* Not specification */ + } +} + +void USBPhyHw::remote_wakeup() +{ +} + +const usb_ep_table_t *USBPhyHw::endpoint_table() +{ + static const usb_ep_table_t rza1_table = { + 1, // No cost per endpoint - everything allocated up front + { + {USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {0, 0, 0}, + {0, 0, 0}, + {0, 0, 0}, + {0, 0, 0}, + {0, 0, 0}, + {0, 0, 0}, + {0, 0, 0}, + {0, 0, 0}, + {0, 0, 0}, + {0, 0, 0}, + {0, 0, 0}, + {0, 0, 0}, + } + }; + return &rza1_table; +} + +uint32_t USBPhyHw::ep0_set_max_packet(uint32_t max_packet) +{ + return MAX_PACKET_SIZE_EP0; +} + +void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) +{ + memcpy(buffer, setup_buffer, size); +} + +void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) +{ + pipe_ctrl[USB_PIPE0].req_size = size; + pipe_ctrl[USB_PIPE0].data_cnt = size; + pipe_ctrl[USB_PIPE0].p_data = data; + + chg_curpipe(USB_PIPE0, USB_ISEL_READ); /* Switch FIFO and pipe number. */ + USB_MX.CFIFOCTR = USB_BCLR; /* Buffer clear */ + set_pid(USB_PIPE0, USB_PID_BUF); /* Set BUF */ + USB_MX.BRDYENB |= (1 << USB_PIPE0); /* Enable ready interrupt */ + USB_MX.NRDYENB |= (1 << USB_PIPE0); /* Enable not ready interrupt */ +} + +uint32_t USBPhyHw::ep0_read_result() +{ + return pipe_ctrl[USB_PIPE0].req_size; +} + +void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) +{ + if ((buffer == NULL) || (size == 0)) { + set_pid(USB_PIPE0, USB_PID_BUF); /* Set BUF */ + return; + } + + pipe_ctrl[USB_PIPE0].req_size = size; + pipe_ctrl[USB_PIPE0].data_cnt = size; + pipe_ctrl[USB_PIPE0].p_data = buffer; + + chg_curpipe(USB_PIPE0, USB_ISEL_WRITE); /* Switch FIFO and pipe number. */ + USB_MX.CFIFOCTR = USB_BCLR; /* Buffer clear */ + /* Clear the PIPExBEMP status bit of the specified pipe to clear */ + USB_MX.BEMPSTS = (uint16_t)((~(1 << USB_PIPE0)) & BEMPSTS_MASK); + + /* Peripheral control sequence */ + switch (write_data(USB_PIPE0)) { + case USB_WRITING : /* Continue of data write */ + USB_MX.BRDYENB |= (1 << USB_PIPE0); /* Enable Ready interrupt */ + USB_MX.NRDYENB |= (1 << USB_PIPE0); /* Enable Not Ready Interrupt */ + set_pid(USB_PIPE0, USB_PID_BUF); + break; + case USB_WRITEEND : /* End of data write */ + case USB_WRITESHRT : /* End of data write */ + USB_MX.BEMPENB |= (1 << USB_PIPE0); /* Enable Empty Interrupt */ + USB_MX.NRDYENB |= (1 << USB_PIPE0); /* Enable Not Ready Interrupt */ + set_pid(USB_PIPE0, USB_PID_BUF); + break; + case USB_FIFOERROR : /* FIFO access error */ + ctrl_end((uint16_t)USB_DATA_ERR); + break; + default : + break; + } +} + +void USBPhyHw::ep0_stall() +{ + set_pid(USB_PIPE0, USB_PID_STALL); + run_later_ctrl_comp = false; +} + +bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type) +{ + const struct PIPECFGREC *cfg; + uint16_t pipe; + volatile uint16_t *p_reg; + + if ((endpoint == EP0OUT) || (endpoint == EP0IN)) { + return true; + } + + for (cfg = &def_pipecfg[0]; cfg->pipesel != 0; cfg++) { + if (cfg->endpoint == endpoint) { + break; + } + } + if (cfg->pipesel == 0) { + return false; + } + + pipe = (cfg->pipesel & USB_CURPIPE); + + /* Interrupt Disable */ + USB_MX.BRDYENB &= (~(1 << pipe)); /* Disable Ready Interrupt */ + USB_MX.NRDYENB &= (~(1 << pipe)); /* Disable Not Ready Interrupt */ + USB_MX.BEMPENB &= (~(1 << pipe)); /* Disable Empty Interrupt */ + + set_pid(pipe, USB_PID_NAK); + + /* CurrentPIPE Clear */ + if ((USB_MX.CFIFOSEL & USB_CURPIPE) == pipe) { + USB_MX.CFIFOSEL &= ~USB_CURPIPE; + } + if ((USB_MX.D0FIFOSEL & USB_CURPIPE) == pipe) { + USB_MX.D0FIFOSEL &= ~USB_CURPIPE; + } + if ((USB_MX.D1FIFOSEL & USB_CURPIPE) == pipe) { + USB_MX.D1FIFOSEL &= ~USB_CURPIPE; + } + + /* PIPE Configuration */ + USB_MX.PIPESEL = pipe; /* Pipe select */ + USB_MX.PIPECFG = cfg->pipecfg; + USB_MX.PIPEBUF = cfg->pipebuf; + USB_MX.PIPEMAXP = cfg->pipemaxp; + USB_MX.PIPEPERI = cfg->pipeperi; + + p_reg = get_pipectr_reg(pipe); + /* Set toggle bit to DATA0 */ + *p_reg |= USB_SQCLR; + /* Buffer Clear */ + *p_reg |= USB_ACLRM; + *p_reg &= ~USB_ACLRM; + + return true; +} + +void USBPhyHw::endpoint_remove(usb_ep_t endpoint) +{ + uint16_t pipe = EP2PIPE(endpoint); + + /* Interrupt Disable */ + USB_MX.BRDYENB &= (~(1 << pipe)); /* Disable Ready Interrupt */ + USB_MX.NRDYENB &= (~(1 << pipe)); /* Disable Not Ready Interrupt */ + USB_MX.BEMPENB &= (~(1 << pipe)); /* Disable Empty Interrupt */ + + set_pid(pipe, USB_PID_NAK); + + /* CurrentPIPE Clear */ + if ((USB_MX.CFIFOSEL & USB_CURPIPE) == pipe) { + USB_MX.CFIFOSEL &= ~USB_CURPIPE; + } + if ((USB_MX.D0FIFOSEL & USB_CURPIPE) == pipe) { + USB_MX.D0FIFOSEL &= ~USB_CURPIPE; + } + if ((USB_MX.D1FIFOSEL & USB_CURPIPE) == pipe) { + USB_MX.D1FIFOSEL &= ~USB_CURPIPE; + } + + /* PIPE Configuration */ + USB_MX.PIPESEL = pipe; /* Pipe select */ + USB_MX.PIPECFG = 0; + + pipe_ctrl[pipe].enable = false; + pipe_ctrl[pipe].status = USB_DATA_NONE; +} + +void USBPhyHw::endpoint_stall(usb_ep_t endpoint) +{ + uint16_t pipe = EP2PIPE(endpoint); + + set_pid(pipe, USB_PID_STALL); + + pipe_ctrl[pipe].enable = false; + pipe_ctrl[pipe].status = USB_DATA_STALL; +} + +void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) +{ + uint16_t pipe = EP2PIPE(endpoint); + volatile uint16_t *p_reg; + + set_pid(pipe, USB_PID_NAK); + + p_reg = get_pipectr_reg(pipe); + /* Set toggle bit to DATA0 */ + *p_reg |= USB_SQCLR; + /* Buffer Clear */ + *p_reg |= USB_ACLRM; + *p_reg &= ~USB_ACLRM; + + pipe_ctrl[pipe].enable = false; + pipe_ctrl[pipe].status = USB_DATA_NONE; +} + +bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ + uint16_t mxps; + uint16_t trncnt; + volatile uint16_t *p_reg; + uint16_t pipe = EP2PIPE(endpoint); + + if (pipe_ctrl[pipe].status == USB_DATA_STALL) { + return false; + } + + pipe_ctrl[pipe].status = USB_DATA_READING; + pipe_ctrl[pipe].req_size = size; + pipe_ctrl[pipe].data_cnt = size; + pipe_ctrl[pipe].p_data = data; + pipe_ctrl[pipe].enable = true; + + set_pid(pipe, USB_PID_NAK); /* Set NAK */ + + USB_MX.BEMPSTS = (uint16_t)((~(1 << pipe)) & BEMPSTS_MASK); /* BEMP Status Clear */ + USB_MX.BRDYSTS = (uint16_t)((~(1 << pipe)) & BRDYSTS_MASK); /* BRDY Status Clear */ + USB_MX.NRDYSTS = (uint16_t)((~(1 << pipe)) & NRDYSTS_MASK); /* NRDY Status Clear */ + + chg_curpipe(pipe, USB_ISEL_READ); /* Switch FIFO and pipe number. */ + p_reg = get_fifoctr_reg(pipe); + *p_reg = USB_BCLR; /* Clear BCLR */ + + if (size != 0) { + /* Max Packet Size */ + USB_MX.PIPESEL = pipe; /* Pipe select */ + mxps = (uint16_t)(USB_MX.PIPEMAXP & USB_MXPS); + /* Data size check */ + if ((size % mxps) == (uint32_t)0u) { + trncnt = (uint16_t)(size / mxps); + } else { + trncnt = (uint16_t)((size / mxps) + (uint32_t)1u); + } + + /* Set Transaction counter */ + p_reg = get_pipetre_reg(pipe); + if (p_reg != NULL) *p_reg |= USB_TRCLR; + p_reg = get_pipetrn_reg(pipe); + if (p_reg != NULL) *p_reg = trncnt; + p_reg = get_pipetre_reg(pipe); + if (p_reg != NULL) *p_reg |= USB_TRENB; + + p_reg = get_pipectr_reg(pipe); + /* Buffer Clear */ + *p_reg |= USB_ACLRM; + *p_reg &= ~USB_ACLRM; + } + + set_pid(pipe, USB_PID_BUF); /* Set BUF */ + USB_MX.BRDYENB |= (1 << pipe); /* Enable Ready Interrupt */ + USB_MX.NRDYENB |= (1 << pipe); /* Enable Not Ready Interrupt */ + + return true; +} + +uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) +{ + uint16_t pipe = EP2PIPE(endpoint); + + return pipe_ctrl[pipe].req_size; +} + +bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ + volatile uint16_t *p_reg; + uint16_t pipe = EP2PIPE(endpoint); + + if (pipe_ctrl[pipe].status == USB_DATA_STALL) { + return false; + } + + pipe_ctrl[pipe].status = USB_DATA_WRITING; + pipe_ctrl[pipe].req_size = size; + pipe_ctrl[pipe].data_cnt = size; + pipe_ctrl[pipe].p_data = data; + pipe_ctrl[pipe].enable = true; + + set_pid(pipe, USB_PID_NAK); /* Set NAK */ + + USB_MX.BEMPSTS = (uint16_t)((~(1 << pipe)) & BEMPSTS_MASK); /* BEMP Status Clear */ + USB_MX.BRDYSTS = (uint16_t)((~(1 << pipe)) & BRDYSTS_MASK); /* BRDY Status Clear */ + USB_MX.NRDYSTS = (uint16_t)((~(1 << pipe)) & NRDYSTS_MASK); /* NRDY Status Clear */ + + p_reg = get_pipectr_reg(pipe); + /* Buffer Clear */ + *p_reg |= USB_ACLRM; + *p_reg &= ~USB_ACLRM; + + buf_to_fifo(pipe); /* Buffer to FIFO data write */ + set_pid(pipe, USB_PID_BUF); /* Set BUF */ + + return true; +} + +void USBPhyHw::endpoint_abort(usb_ep_t endpoint) +{ + forced_termination(EP2PIPE(endpoint), (uint16_t)USB_DATA_NONE); +} + +void USBPhyHw::process() +{ + /* Register Save */ + uint16_t intsts0 = USB_MX.INTSTS0; + uint16_t brdysts = USB_MX.BRDYSTS; + uint16_t nrdysts = USB_MX.NRDYSTS; + uint16_t bempsts = USB_MX.BEMPSTS; + uint16_t intenb0 = USB_MX.INTENB0; + uint16_t brdyenb = USB_MX.BRDYENB; + uint16_t nrdyenb = USB_MX.NRDYENB; + uint16_t bempenb = USB_MX.BEMPENB; + + /* Interrupt status get */ + uint16_t ists0 = (uint16_t)(intsts0 & intenb0); + uint16_t bsts = (uint16_t)(brdysts & brdyenb); + uint16_t nsts = (uint16_t)(nrdysts & nrdyenb); + uint16_t ests = (uint16_t)(bempsts & bempenb); + + uint16_t i; + + if ((intsts0 & (USB_VBINT | USB_RESM | USB_SOFR | USB_DVST | + USB_CTRT | USB_BEMP | USB_NRDY | USB_BRDY)) == 0u) { + return; + } + + /***** Processing USB bus signal *****/ + /***** Resume signal *****/ + if ((ists0 & USB_RESM) == USB_RESM) { + USB_MX.INTSTS0 = (uint16_t)~USB_RESM; + USB_MX.INTENB0 &= (~USB_RSME); /* RESM interrupt disable */ + events->suspend(true); + } + + /***** Vbus change *****/ + else if ((ists0 & USB_VBINT) == USB_VBINT) { + USB_MX.INTSTS0 = (uint16_t)~USB_VBINT; + if (chk_vbsts()) { + /* USB attach */ + /* Non processing. */ + } else { + /* USB detach */ + for (i = USB_MIN_PIPE_NO; i < PIPE_NUM; i++) { + if (pipe_ctrl[i].enable) { + forced_termination(i, (uint16_t)USB_DATA_NONE); + } + } + USB_MX.INTSTS0 = 0; + USB_MX.BRDYSTS = 0; + USB_MX.NRDYSTS = 0; + USB_MX.BEMPSTS = 0; + USB_MX.BRDYENB = 0; + USB_MX.NRDYENB = 0; + USB_MX.BEMPENB = 0; + } + } + + /***** SOFR change *****/ + else if ((ists0 & USB_SOFR) == USB_SOFR) { + USB_MX.INTSTS0 = (uint16_t)~USB_SOFR; + events->sof(USB_MX.FRMNUM & USB_FRNM); + } + + /***** Processing device state *****/ + /***** DVST change *****/ + else if ((ists0 & USB_DVST) == USB_DVST) { + USB_MX.INTSTS0 = (uint16_t)~USB_DVST; + + switch ((uint16_t)(intsts0 & USB_DVSQ)) { + case USB_DS_POWR : + break; + case USB_DS_DFLT : + USB_MX.DCPCFG = 0; /* DCP configuration register (0x5C) */ + USB_MX.DCPMAXP = MAX_PACKET_SIZE_EP0; /* DCP maxpacket size register (0x5E) */ + + events->reset(); + break; + case USB_DS_ADDS : + break; + case USB_DS_CNFG : + break; + case USB_DS_SPD_POWR : + case USB_DS_SPD_DFLT : + case USB_DS_SPD_ADDR : + case USB_DS_SPD_CNFG : + events->suspend(false); + break; + default : + break; + } + } + + /***** Processing PIPE0 data *****/ + else if (((ists0 & USB_BRDY) == USB_BRDY) && ((bsts & USB_BRDY0) == USB_BRDY0)) { + /* ==== BRDY PIPE0 ==== */ + USB_MX.BRDYSTS = (uint16_t)((~USB_BRDY0) & BRDYSTS_MASK); + + /* When operating by the peripheral function, usb_brdy_pipe() is executed with PIPEx request because */ + /* two BRDY messages are issued even when the demand of PIPE0 and PIPEx has been generated at the same time. */ + if ((USB_MX.CFIFOSEL & USB_ISEL_WRITE) == USB_ISEL_WRITE) { + switch (write_data(USB_PIPE0)) { + case USB_WRITEEND : + case USB_WRITESHRT : + USB_MX.BRDYENB &= (~(1 << USB_PIPE0)); + break; + case USB_WRITING : + set_pid(USB_PIPE0, USB_PID_BUF); + break; + case USB_FIFOERROR : + ctrl_end((uint16_t)USB_DATA_ERR); + break; + default : + break; + } + events->ep0_in(); + } else { + switch (read_data(USB_PIPE0)) { + case USB_READEND : + case USB_READSHRT : + USB_MX.BRDYENB &= (~(1 << USB_PIPE0)); + pipe_ctrl[USB_PIPE0].req_size -= pipe_ctrl[USB_PIPE0].data_cnt; + break; + case USB_READING : + set_pid(USB_PIPE0, USB_PID_BUF); + break; + case USB_READOVER : + ctrl_end((uint16_t)USB_DATA_OVR); + pipe_ctrl[USB_PIPE0].req_size -= pipe_ctrl[USB_PIPE0].data_cnt; + break; + case USB_FIFOERROR : + ctrl_end((uint16_t)USB_DATA_ERR); + break; + default : + break; + } + events->ep0_out(); + } + } + else if (((ists0 & USB_BEMP) == USB_BEMP) && ((ests & USB_BEMP0) == USB_BEMP0)) { + /* ==== BEMP PIPE0 ==== */ + USB_MX.BEMPSTS = (uint16_t)((~USB_BEMP0) & BEMPSTS_MASK); + + events->ep0_in(); + } + else if (((ists0 & USB_NRDY) == USB_NRDY) && ((nsts & USB_NRDY0) == USB_NRDY0)) { + /* ==== NRDY PIPE0 ==== */ + USB_MX.NRDYSTS = (uint16_t)((~USB_NRDY0) & NRDYSTS_MASK); + /* Non processing. */ + } + + /***** Processing setup transaction *****/ + else if ((ists0 & USB_CTRT) == USB_CTRT) { + USB_MX.INTSTS0 = (uint16_t)~USB_CTRT; + + /* CTSQ bit changes later than CTRT bit for ASSP. */ + /* CTSQ reloading */ + uint16_t stginfo = (uint16_t)(intsts0 & USB_CTSQ); + if (stginfo != USB_CS_IDST) { + if (((USB_CS_RDDS == stginfo) || (USB_CS_WRDS == stginfo)) || (USB_CS_WRND == stginfo)) { + /* Save request register */ + uint16_t *bufO = &setup_buffer[0]; + + USB_MX.INTSTS0 = (uint16_t)~USB_VALID; + *bufO++ = USB_MX.USBREQ; /* data[0] <= bmRequest, data[1] <= bmRequestType */ + *bufO++ = USB_MX.USBVAL; /* data[2] data[3] <= wValue */ + *bufO++ = USB_MX.USBINDX; /* data[4] data[5] <= wIndex */ + *bufO++ = USB_MX.USBLENG; /* data[6] data[7] <= wLength */ + } + } + + /* Switch on the control transfer stage (CTSQ). */ + switch (stginfo) { + case USB_CS_IDST : /* Idle or setup stage */ + break; + case USB_CS_RDDS : /* Control read data stage */ + events->ep0_setup(); + break; + case USB_CS_WRDS : /* Control write data stage */ + events->ep0_setup(); + break; + case USB_CS_WRND : /* Status stage of a control write where there is no data stage. */ + events->ep0_setup(); + run_later_ctrl_comp = true; + break; + case USB_CS_RDSS : /* Control read status stage */ + USB_MX.DCPCTR |= USB_CCPL; + break; + case USB_CS_WRSS : /* Control write status stage */ + USB_MX.DCPCTR |= USB_CCPL; + break; + case USB_CS_SQER : /* Control sequence error */ + default : /* Illegal */ + ctrl_end((uint16_t)USB_DATA_ERR); + break; + } + } + + /***** Processing PIPE1-MAX_PIPE_NO data *****/ + else if ((ists0 & USB_BRDY) == USB_BRDY) { + /* ==== BRDY PIPEx ==== */ + USB_MX.BRDYSTS = (uint16_t)((~bsts) & BRDYSTS_MASK); + + for (i = USB_MIN_PIPE_NO; i < PIPE_NUM; i++) { + if ((bsts & USB_BITSET(i)) != 0u) { + /* Interrupt check */ + if (pipe_ctrl[i].enable) { + USB_MX.PIPESEL = i; + if (USB_BUF2FIFO == (uint16_t)(USB_MX.PIPECFG & USB_DIRFIELD)) { + /* write */ + buf_to_fifo(i); /* Buffer to FIFO data write */ + events->in(PIPE2EP(i)); + } else { + /* read */ + fifo_to_buf(i); /* FIFO to Buffer data read */ + events->out(PIPE2EP(i)); + } + } + } + } + } + else if ((ists0 & USB_BEMP) == USB_BEMP) { + /* ==== BEMP PIPEx ==== */ + USB_MX.BEMPSTS = (uint16_t)((~ests) & BEMPSTS_MASK); + + for (i = USB_MIN_PIPE_NO; i < PIPE_NUM; i++) { + if ((ests & USB_BITSET(i)) != 0) { + /* Interrupt check */ + if (pipe_ctrl[i].enable) { + /* MAX packet size error ? */ + if (((get_pid(i) & USB_PID_STALL) == USB_PID_STALL) || ((get_pid(i) & USB_PID_STALL2) == USB_PID_STALL2)) { + forced_termination(i, (uint16_t)USB_DATA_STALL); + } else { + if ((i >= USB_PIPE6) || ((*get_pipectr_reg(i) & USB_INBUFM) != USB_INBUFM)) { + data_end(i, (uint16_t)USB_DATA_NONE); /* End of data transfer */ + } else { + USB_MX.BEMPENB |= (1 << i); + } + } + events->in(PIPE2EP(i)); + } + } + } + } + else if ((ists0 & USB_NRDY) == USB_NRDY) { + /* ==== NRDY PIPEx ==== */ + USB_MX.NRDYSTS = (uint16_t)((~nsts) & NRDYSTS_MASK); + + for (i = USB_MIN_PIPE_NO; i < PIPE_NUM; i++) { + if ((nsts & USB_BITSET(i)) != 0) { + /* Interrupt check */ + if (pipe_ctrl[i].enable) { + if (((get_pid(i) & USB_PID_STALL) != USB_PID_STALL) && ((get_pid(i) & USB_PID_STALL2) != USB_PID_STALL2)) { + set_pid(i, USB_PID_BUF); + } + } + } + } + } + else { + /* Non processing. */ + } +} + +void USBPhyHw::_usbisr(void) +{ + GIC_DisableIRQ(USBIX_IRQn); + + run_later_ctrl_comp = false; + + instance->events->start_process(); + + if (run_later_ctrl_comp) { + USB_MX.DCPCTR &= (~USB_PID); + USB_MX.DCPCTR |= USB_PID_BUF; + + USB_MX.DCPCTR |= USB_CCPL; + } + + /* Re-enable interrupt */ + GIC_ClearPendingIRQ(USBIX_IRQn); + GIC_EnableIRQ(USBIX_IRQn); +} + +void USBPhyHw::chg_curpipe(uint16_t pipe, uint16_t isel) +{ + volatile uint16_t *p_reg; + uint16_t fifo_use; + uint16_t isel_val; + uint16_t buf; + + fifo_use = PIPE2FIFO(pipe); + if ((fifo_use == USB_FUNCTION_D0FIFO_USE) || (fifo_use == USB_FUNCTION_D1FIFO_USE)) { + isel_val = 0; + } else { + isel_val = isel; + } + + p_reg = get_fifosel_reg(pipe); + buf = *p_reg; + buf &= (uint16_t)(~(USB_RCNT | USB_ISEL | USB_CURPIPE | USB_MBW)); + buf |= (uint16_t)((USB_RCNT | isel_val | pipe | USB_MBW_32) & (USB_RCNT | USB_ISEL | USB_CURPIPE | USB_MBW)); + *p_reg = buf; + + do { + cpu_delay_1us(1); + buf = *p_reg; + } while ((buf & (uint16_t)(USB_ISEL | USB_CURPIPE)) != (uint16_t)(isel_val | pipe)); +} + +uint16_t USBPhyHw::is_set_frdy(uint16_t pipe, uint16_t isel) +{ + volatile uint16_t *p_reg; + uint16_t buffer; + int retry_cnt = 0; + + chg_curpipe(pipe, isel); /* Changes the FIFO port by the pipe. */ + p_reg = get_fifoctr_reg(pipe); + for (retry_cnt = 0; retry_cnt < 10; retry_cnt++) { + buffer = *p_reg; + if ((uint16_t)(buffer & USB_FRDY) == USB_FRDY) { + return (buffer); + } + cpu_delay_1us(1); + } + + return (USB_FIFOERROR); +} + +uint8_t * USBPhyHw::read_fifo(uint16_t pipe, uint16_t count, uint8_t *read_p) +{ + iodefine_reg32_t *p_reg; + uint16_t even; + uint16_t odd; + uint32_t odd_byte_data_temp; + + p_reg = (iodefine_reg32_t *)get_fifo_reg(pipe); + for (even = (uint16_t)(count >> 2); (even != 0); --even) { + /* 32bit FIFO access */ + *((uint32_t *)read_p) = p_reg->UINT32; + read_p += sizeof(uint32_t); + } + odd = count % 4; + if (count < 4) { + odd = count; + } + if (odd != 0) { + /* 32bit FIFO access */ + odd_byte_data_temp = p_reg->UINT32; + /* Condition compilation by the difference of the endian */ + do { + *read_p = (uint8_t)(odd_byte_data_temp & 0x000000ff); + odd_byte_data_temp = odd_byte_data_temp >> 8; + /* Renewal read pointer */ + read_p += sizeof(uint8_t); + odd--; + } while (odd != 0); + } + + return read_p; +} + +uint16_t USBPhyHw::read_data(uint16_t pipe) +{ + volatile uint16_t *p_reg; + uint16_t count; + uint16_t buffer; + uint16_t mxps; + uint16_t dtln; + uint16_t end_flag; + + /* Changes FIFO port by the pipe. */ + buffer = is_set_frdy(pipe, 0); + if (buffer == USB_FIFOERROR) { + return (USB_FIFOERROR); /* FIFO access error */ + } + dtln = (uint16_t)(buffer & USB_DTLN); + + /* Max Packet Size */ + if (pipe == USB_PIPE0) { + mxps = (uint16_t)(USB_MX.DCPMAXP & USB_MAXP); + } else { + USB_MX.PIPESEL = pipe; /* Pipe select */ + mxps = (uint16_t)(USB_MX.PIPEMAXP & USB_MXPS); + } + + if (pipe_ctrl[pipe].data_cnt < dtln) { + /* Buffer Over ? */ + end_flag = USB_READOVER; + set_pid(pipe, USB_PID_NAK); /* Set NAK */ + count = (uint16_t)pipe_ctrl[pipe].data_cnt; + pipe_ctrl[pipe].data_cnt = dtln; + } else if (pipe_ctrl[pipe].data_cnt == dtln) { + /* Just Receive Size */ + count = dtln; + if ((count == 0) || ((dtln % mxps) != 0)) { + /* Just Receive Size */ + /* Peripheral Function */ + end_flag = USB_READSHRT; + } else { + end_flag = USB_READEND; + set_pid(pipe, USB_PID_NAK); /* Set NAK */ + } + } else { + /* Continuous Receive data */ + count = dtln; + end_flag = USB_READING; + if (count == 0) { + /* Null Packet receive */ + end_flag = USB_READSHRT; + set_pid(pipe, USB_PID_NAK); /* Set NAK */ + } + if ((count % mxps) != 0) { + /* Null Packet receive */ + end_flag = USB_READSHRT; + set_pid(pipe, USB_PID_NAK); /* Set NAK */ + } + } + + if (dtln == 0) { /* 0 length packet */ + p_reg = get_fifoctr_reg(pipe); + *p_reg = USB_BCLR; /* Clear BCLR */ + } else { + pipe_ctrl[pipe].p_data = read_fifo(pipe, count, pipe_ctrl[pipe].p_data); + } + pipe_ctrl[pipe].data_cnt -= count; + + return end_flag; +} + +void USBPhyHw::fifo_to_buf(uint16_t pipe) +{ + /* Check FIFO access sequence */ + switch (read_data(pipe)) { + case USB_READING : /* Continue of data read */ + break; + case USB_READEND : /* End of data read */ + data_end(pipe, (uint16_t)USB_DATA_OK); + pipe_ctrl[pipe].req_size -= pipe_ctrl[pipe].data_cnt; + break; + case USB_READSHRT : /* End of data read */ + data_end(pipe, (uint16_t)USB_DATA_SHT); + pipe_ctrl[pipe].req_size -= pipe_ctrl[pipe].data_cnt; + break; + case USB_READOVER : /* Buffer over */ + forced_termination(pipe, (uint16_t)USB_DATA_OVR); + pipe_ctrl[pipe].req_size -= pipe_ctrl[pipe].data_cnt; + break; + case USB_FIFOERROR : /* FIFO access error */ + default: + forced_termination(pipe, (uint16_t)USB_DATA_ERR); + break; + } +} + +uint8_t * USBPhyHw::write_fifo(uint16_t pipe, uint16_t count, uint8_t *write_p) +{ + iodefine_reg32_t *p_reg; + uint16_t even; + uint16_t odd; + + p_reg = (iodefine_reg32_t *)get_fifo_reg(pipe); + set_mbw(pipe, USB_MBW_32); /* 32bit access */ + for (even = (uint16_t)(count >> 2); (even != 0); --even) { + p_reg->UINT32 = *((uint32_t *)write_p); + write_p += sizeof(uint32_t); + } + odd = count % 4; + if (count < 4) { + odd = count; + } + if ((odd & (uint16_t)0x0002u) != 0u) { + set_mbw(pipe, USB_MBW_16); /* 16bit access */ + p_reg->UINT16[H] = *((uint16_t *)write_p); + write_p += sizeof(uint16_t); + } + if ((odd & (uint16_t)0x0001u) != 0u) { + set_mbw(pipe, USB_MBW_8); /* 8bit access */ + p_reg->UINT8[HH] = *write_p; + write_p++; + } + + return write_p; +} + +uint16_t USBPhyHw::write_data(uint16_t pipe) +{ + volatile uint16_t *p_reg; + uint16_t size; + uint16_t count; + uint16_t mxps; + uint16_t end_flag; + uint16_t buffer; + + /* Changes FIFO port by the pipe. */ + if (pipe == USB_PIPE0) { + buffer = is_set_frdy(pipe, USB_ISEL_WRITE); + } else { + buffer = is_set_frdy(pipe, 0); + } + + if (buffer == USB_FIFOERROR) { + return (USB_FIFOERROR); + } + + if (pipe == USB_PIPE0) { + /* Max Packet Size */ + mxps = (uint16_t)(USB_MX.DCPMAXP & USB_MAXP); + + /* Data buffer size */ + if ((USB_MX.DCPCFG & USB_CNTMDFIELD) == USB_CFG_CNTMDON) { + size = USB_PIPE0BUF; + } else { + size = mxps; + } + } else { + /* Max Packet Size */ + USB_MX.PIPESEL = pipe; /* Pipe select */ + mxps = (uint16_t)(USB_MX.PIPEMAXP & USB_MXPS); + + /* Data buffer size */ + if ((USB_MX.PIPECFG & USB_CNTMDFIELD) == USB_CFG_CNTMDON) { + size = (uint16_t)((uint16_t)((USB_MX.PIPEBUF >> USB_BUFSIZE_BIT) + 1) * USB_PIPEXBUF); + } else { + size = mxps; + } + } + + /* Data size check */ + if (pipe_ctrl[pipe].data_cnt <= (uint32_t)size) { + count = (uint16_t)pipe_ctrl[pipe].data_cnt; + if (count == 0) { + end_flag = USB_WRITESHRT; /* Null Packet is end of write */ + } else if ((count % mxps) != 0) { + end_flag = USB_WRITESHRT; /* Short Packet is end of write */ + } else { + end_flag = USB_WRITEEND; /* Just Send Size */ + } + } else { + /* Write continues */ + end_flag = USB_WRITING; + count = size; + } + + pipe_ctrl[pipe].p_data = write_fifo(pipe, count, pipe_ctrl[pipe].p_data); + + /* Check data count to remain */ + if (pipe_ctrl[pipe].data_cnt < (uint32_t)size) { + pipe_ctrl[pipe].data_cnt = 0u; /* Clear data count */ + + p_reg = get_fifoctr_reg(pipe); + if ((*p_reg & USB_BVAL) == 0u) { /* Check BVAL */ + *p_reg |= USB_BVAL; /* Short Packet */ + } + } else { + pipe_ctrl[pipe].data_cnt -= count; /* Total data count - count */ + } + + return end_flag; +} + +void USBPhyHw::buf_to_fifo(uint16_t pipe) +{ + /* Disable Ready Interrupt */ + USB_MX.BRDYENB &= (~(1 << pipe)); + + /* Peripheral control sequence */ + switch (write_data(pipe)) { + case USB_WRITING : /* Continue of data write */ + USB_MX.BRDYENB |= (1 << pipe); /* Enable Ready Interrupt */ + USB_MX.NRDYENB |= (1 << pipe); /* Enable Not Ready Interrupt */ + break; + case USB_WRITEEND : /* End of data write */ + case USB_WRITESHRT : /* End of data write */ + USB_MX.BEMPENB |= (1 << pipe); /* Enable Empty Interrupt */ + USB_MX.NRDYENB |= (1 << pipe); /* Enable Not Ready Interrupt */ + break; + case USB_FIFOERROR : /* FIFO access error */ + default: + forced_termination(pipe, (uint16_t)USB_DATA_ERR); + break; + } +} + +uint16_t * USBPhyHw::get_pipectr_reg(uint16_t pipe) +{ + if (pipe == USB_PIPE0) { + return (uint16_t *)&(USB_MX.DCPCTR); + } else { + return (uint16_t *)&(USB_MX.PIPE1CTR) + (pipe - USB_PIPE1); + } +} + +uint16_t * USBPhyHw::get_pipetre_reg(uint16_t pipe) +{ + if ((pipe >= USB_PIPE1) && (pipe <= USB_PIPE5)) { + return (uint16_t *)&(USB_MX.PIPE1TRE) + ((pipe - USB_PIPE1) * 2); + } else if ((pipe >= USB_PIPE9) && (pipe <= USB_PIPE10)) { + return (uint16_t *)&(USB_MX.PIPE9TRE) + ((pipe - USB_PIPE9) * 2); + } else if ((pipe >= USB_PIPE11) && (pipe <= USB_PIPE15)) { + return (uint16_t *)&(USB_MX.PIPEBTRE) + ((pipe - USB_PIPE11) * 2); + } else { + return NULL; + } +} + +uint16_t * USBPhyHw::get_pipetrn_reg(uint16_t pipe) +{ + if ((pipe >= USB_PIPE1) && (pipe <= USB_PIPE5)) { + return (uint16_t *)&(USB_MX.PIPE1TRN) + ((pipe - USB_PIPE1) * 2); + } else if ((pipe >= USB_PIPE9) && (pipe <= USB_PIPE10)) { + return (uint16_t *)&(USB_MX.PIPE9TRN) + ((pipe - USB_PIPE9) * 2); + } else if ((pipe >= USB_PIPE11) && (pipe <= USB_PIPE15)) { + return (uint16_t *)&(USB_MX.PIPEBTRN) + ((pipe - USB_PIPE11) * 2); + } else { + return NULL; + } +} + +uint16_t * USBPhyHw::get_fifoctr_reg(uint16_t pipe) +{ + uint16_t fifo_use = PIPE2FIFO(pipe); + + if ((fifo_use & USB_FUNCTION_D0FIFO_USE) == USB_FUNCTION_D0FIFO_USE) { + return (uint16_t *)&(USB_MX.D0FIFOCTR); + } else if ((fifo_use & USB_FUNCTION_D1FIFO_USE) == USB_FUNCTION_D1FIFO_USE) { + return (uint16_t *)&(USB_MX.D1FIFOCTR); + } else { + return (uint16_t *)&(USB_MX.CFIFOCTR); + } +} + +uint16_t * USBPhyHw::get_fifosel_reg(uint16_t pipe) +{ + uint16_t fifo_use = PIPE2FIFO(pipe); + + if ((fifo_use & USB_FUNCTION_D0FIFO_USE) == USB_FUNCTION_D0FIFO_USE) { + return (uint16_t *)&(USB_MX.D0FIFOSEL); + } else if ((fifo_use & USB_FUNCTION_D1FIFO_USE) == USB_FUNCTION_D1FIFO_USE) { + return (uint16_t *)&(USB_MX.D1FIFOSEL); + } else { + return (uint16_t *)&(USB_MX.CFIFOSEL); + } +} + +uint32_t * USBPhyHw::get_fifo_reg(uint16_t pipe) +{ + uint16_t fifo_use = PIPE2FIFO(pipe); + + if ((fifo_use & USB_FUNCTION_D0FIFO_USE) == USB_FUNCTION_D0FIFO_USE) { + return (uint32_t *)&(USB_MX.D0FIFO); + } else if ((fifo_use & USB_FUNCTION_D1FIFO_USE) == USB_FUNCTION_D1FIFO_USE) { + return (uint32_t *)&(USB_MX.D1FIFO); + } else { + return (uint32_t *)&(USB_MX.CFIFO); + } +} + +uint16_t USBPhyHw::get_pid(uint16_t pipe) +{ + volatile uint16_t *p_reg; + + p_reg = get_pipectr_reg(pipe); + return (uint16_t)(*p_reg & USB_PID); +} + +void USBPhyHw::set_mbw(uint16_t pipe, uint16_t data) +{ + volatile uint16_t *p_reg; + + p_reg = get_fifosel_reg(pipe); + *p_reg &= (~USB_MBW); + if (data != 0) { + *p_reg |= data; + } +} + +void USBPhyHw::set_pid(uint16_t pipe, uint16_t new_pid) +{ + volatile uint16_t *p_reg; + uint16_t old_pid; + + p_reg = get_pipectr_reg(pipe); + old_pid = get_pid(pipe); + + switch (new_pid) { + case USB_PID_STALL: + if ((old_pid & USB_PID_BUF) == USB_PID_BUF) { + *p_reg &= (~USB_PID); + *p_reg |= USB_PID_STALL2; + } else { + *p_reg &= (~USB_PID); + *p_reg |= new_pid; + } + break; + case USB_PID_BUF: + if (((old_pid & USB_PID_STALL) == USB_PID_STALL) || + ((old_pid & USB_PID_STALL2) == USB_PID_STALL2)) { + *p_reg &= (~USB_PID); + *p_reg |= USB_PID_NAK; + } + *p_reg &= (~USB_PID); + *p_reg |= new_pid; + break; + case USB_PID_NAK: + if ((old_pid & USB_PID_STALL2) == USB_PID_STALL2) { + *p_reg &= (~USB_PID); + *p_reg |= USB_PID_STALL; + } + *p_reg &= (~USB_PID); + *p_reg |= new_pid; + + do { + cpu_delay_1us(1); + p_reg = get_pipectr_reg(pipe); + } while ((*p_reg & USB_PBUSY) == USB_PBUSY); + break; + default: + *p_reg &= (~USB_PID); + *p_reg |= new_pid; + break; + } +} + +void USBPhyHw::cpu_delay_1us(uint16_t time) +{ + volatile uint32_t i = 38 * time; + + while (i > 0) { + i--; + } +} + +uint16_t USBPhyHw::EP2PIPE(uint16_t endpoint) +{ + const struct PIPECFGREC *cfg; + + for (cfg = &def_pipecfg[0]; cfg->pipesel != 0; cfg++) { + if (cfg->endpoint == endpoint) { + break; + } + } + return (cfg->pipesel & USB_CURPIPE); +} + +uint16_t USBPhyHw::PIPE2EP(uint16_t pipe) +{ + const struct PIPECFGREC *cfg; + + if (pipe == USB_PIPE0) { + return 0; + } + for (cfg = &def_pipecfg[0]; cfg->pipesel != 0; cfg++) { + if ((cfg->pipesel & USB_CURPIPE) == pipe) { + break; + } + } + return cfg->endpoint; +} + +uint16_t USBPhyHw::PIPE2FIFO(uint16_t pipe) +{ + const struct PIPECFGREC *cfg; + uint16_t fifo_use; + + if (pipe == USB_PIPE0) { + fifo_use = USB_FUNCTION_CFIFO_USE; + } else { + for (cfg = &def_pipecfg[0]; cfg->pipesel != 0; cfg++) { + if ((cfg->pipesel & USB_CURPIPE) == pipe) { + break; + } + } + if ((cfg->pipesel & USB_FUNCTION_D0FIFO_USE) == USB_FUNCTION_D0FIFO_USE) { + fifo_use = USB_FUNCTION_D0FIFO_USE; + } else if ((cfg->pipesel & USB_FUNCTION_D1FIFO_USE) == USB_FUNCTION_D1FIFO_USE) { + fifo_use = USB_FUNCTION_D1FIFO_USE; + } else { + fifo_use = USB_FUNCTION_CFIFO_USE; + } + } + + return fifo_use; +} + +void USBPhyHw::reset_usb(uint16_t clockmode) +{ +#if (USB_FUNCTION_CH == 0) + if ((USB200.SYSCFG0 & USB_UPLLE) == USB_UPLLE) { + if ((USB200.SYSCFG0 & USB_UCKSEL) != clockmode) { + USB200.SUSPMODE &= ~(USB_SUSPMODE_SUSPM); + USB200.SYSCFG0 = 0; + USB200.SYSCFG0 = (clockmode | USB_UPLLE); + cpu_delay_1us(1000); + USB200.SUSPMODE |= USB_SUSPMODE_SUSPM; + } else { + USB200.SUSPMODE &= ~(USB_SUSPMODE_SUSPM); + cpu_delay_1us(1000); + USB200.SUSPMODE |= USB_SUSPMODE_SUSPM; + } + } else { + USB200.SUSPMODE &= ~(USB_SUSPMODE_SUSPM); + USB200.SYSCFG0 = 0; + USB200.SYSCFG0 = (clockmode | USB_UPLLE); + cpu_delay_1us(1000); + USB200.SUSPMODE |= USB_SUSPMODE_SUSPM; + } +#else + /* UCKSEL and UPLLE bit is only USB0. If USB1, set to SYSCFG0 for USB0. */ + if ((USB200.SYSCFG0 & USB_UPLLE) == USB_UPLLE) { + if ((USB200.SYSCFG0 & USB_UCKSEL) != clockmode) { + USB201.SUSPMODE &= ~(USB_SUSPMODE_SUSPM); + USB200.SUSPMODE &= ~(USB_SUSPMODE_SUSPM); + USB201.SYSCFG0 = 0; + USB200.SYSCFG0 = 0; + USB200.SYSCFG0 = (clockmode | USB_UPLLE); + cpu_delay_1us(1000); + USB200.SUSPMODE |= USB_SUSPMODE_SUSPM; + USB201.SUSPMODE |= USB_SUSPMODE_SUSPM; + } else { + USB201.SUSPMODE &= ~(USB_SUSPMODE_SUSPM); + cpu_delay_1us(1000); + USB201.SUSPMODE |= USB_SUSPMODE_SUSPM; + } + } else { + USB201.SUSPMODE &= ~(USB_SUSPMODE_SUSPM); + USB200.SUSPMODE &= ~(USB_SUSPMODE_SUSPM); + USB201.SYSCFG0 = 0; + USB200.SYSCFG0 = 0; + USB200.SYSCFG0 = (clockmode | USB_UPLLE); + cpu_delay_1us(1000); + USB200.SUSPMODE |= USB_SUSPMODE_SUSPM; + USB201.SUSPMODE |= USB_SUSPMODE_SUSPM; + } +#endif + USB_MX.BUSWAIT = (uint16_t)(USB_BWAIT_3 & USB_BWAIT); /* 3 : 5 access cycles waits */ + USB_MX.CFIFOSEL = USB_MBW_32; + USB_MX.D0FIFOSEL = USB_MBW_32; + USB_MX.D1FIFOSEL = USB_MBW_32; +} + +bool USBPhyHw::chk_vbsts(void) +{ + uint16_t buf1; + uint16_t buf2; + uint16_t buf3; + bool connect_flg = false; + + /* VBUS chattering cut */ + do { + buf1 = USB_MX.INTSTS0; + cpu_delay_1us(10); + buf2 = USB_MX.INTSTS0; + cpu_delay_1us(10); + buf3 = USB_MX.INTSTS0; + } while (((buf1 & USB_VBSTS) != (buf2 & USB_VBSTS)) || ((buf2 & USB_VBSTS) != (buf3 & USB_VBSTS))); + + /* VBUS status judge */ + if ((buf1 & USB_VBSTS) != (uint16_t)0) { + connect_flg = true; + } + + return connect_flg; +} + +void USBPhyHw::ctrl_end(uint16_t status) +{ + /* Interrupt disable */ + USB_MX.BEMPENB &= (~(1 << USB_PIPE0)); /* Disable Empty Interrupt */ + USB_MX.BRDYENB &= (~(1 << USB_PIPE0)); /* Disable Ready Interrupt */ + USB_MX.NRDYENB &= (~(1 << USB_PIPE0)); /* Disable Not Ready Interrupt */ + + set_mbw(USB_PIPE0, USB_MBW_32); + + if ((status == USB_DATA_ERR) || (status == USB_DATA_OVR)) { + set_pid(USB_PIPE0, USB_PID_STALL); /* Request error */ + } else if (status == USB_DATA_STOP) { + set_pid(USB_PIPE0, USB_PID_NAK); /* Pipe stop */ + } else { + USB_MX.DCPCTR |= USB_CCPL; /* Set CCPL bit */ + } +} + +void USBPhyHw::data_end(uint16_t pipe, uint16_t status) +{ + volatile uint16_t *p_reg; + + /* Disable Interrupt */ + USB_MX.BRDYENB &= (~(1 << pipe)); /* Disable Ready Interrupt */ + USB_MX.NRDYENB &= (~(1 << pipe)); /* Disable Not Ready Interrupt */ + USB_MX.BEMPENB &= (~(1 << pipe)); /* Disable Empty Interrupt */ + + set_pid(pipe, USB_PID_NAK); /* Set NAK */ + + /* Disable Transaction count */ + p_reg = get_pipetre_reg(pipe); + if (p_reg != NULL) { + *p_reg &= (~USB_TRENB); + *p_reg |= USB_TRCLR; + } + + if (pipe_ctrl[pipe].enable) { + /* Check PIPE TYPE */ + USB_MX.PIPESEL = pipe; /* Pipe select */ + if ((USB_MX.PIPECFG & USB_TYPFIELD) != USB_TYPFIELD_ISO) { + /* Transfer information set */ + pipe_ctrl[pipe].enable = false; + pipe_ctrl[pipe].status = status; + } else if ((uint16_t)(USB_MX.PIPECFG & USB_DIRFIELD) == USB_BUF2FIFO) { + /* ISO OUT Transfer (restart) */ + pipe_ctrl[pipe].status = USB_DATA_WRITING; + } else { + /* ISO IN Transfer (restart) */ + pipe_ctrl[pipe].status = USB_DATA_READING; + } + } +} + +void USBPhyHw::forced_termination(uint16_t pipe, uint16_t status) +{ + volatile uint16_t *p_reg; + + /* Disable Interrupt */ + USB_MX.BRDYENB &= (~(1 << pipe)); /* Disable Ready Interrupt */ + USB_MX.NRDYENB &= (~(1 << pipe)); /* Disable Not Ready Interrupt */ + USB_MX.BEMPENB &= (~(1 << pipe)); /* Disable Empty Interrupt */ + + set_pid(pipe, USB_PID_NAK); /* Set NAK */ + + /* Disable Transaction count */ + p_reg = get_pipetre_reg(pipe); + if (p_reg != NULL) { + *p_reg &= (~USB_TRENB); + *p_reg |= USB_TRCLR; + } + + set_mbw(pipe, USB_MBW_32); + + chg_curpipe(pipe, 0); /* Changes the FIFO port by the pipe. */ + + p_reg = get_pipectr_reg(pipe); + /* Buffer Clear */ + *p_reg |= USB_ACLRM; + *p_reg &= ~USB_ACLRM; + + pipe_ctrl[pipe].enable = false; + pipe_ctrl[pipe].status = status; +} + +#endif diff --git a/usb/device/targets/TARGET_RENESAS/TARGET_RZ_A1XX/USBPhy_RZ_A1_Def.h b/usb/device/targets/TARGET_RENESAS/TARGET_RZ_A1XX/USBPhy_RZ_A1_Def.h new file mode 100644 index 00000000000..cd261801618 --- /dev/null +++ b/usb/device/targets/TARGET_RENESAS/TARGET_RZ_A1XX/USBPhy_RZ_A1_Def.h @@ -0,0 +1,697 @@ +/* mbed Microcontroller Library + * Copyright (c) 2018-2018 ARM Limited, All rights reserved. + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef USBPHY_RZ_A1_DEF +#define USBPHY_RZ_A1_DEF + +/****************************************************************************** + Macro definitions + ******************************************************************************/ + +/* H/W function type */ +#define USB_BIT0 ((uint16_t)0x0001) +#define USB_BIT1 ((uint16_t)0x0002) +#define USB_BIT2 ((uint16_t)0x0004) +#define USB_BIT3 ((uint16_t)0x0008) +#define USB_BIT4 ((uint16_t)0x0010) +#define USB_BIT5 ((uint16_t)0x0020) +#define USB_BIT6 ((uint16_t)0x0040) +#define USB_BIT7 ((uint16_t)0x0080) +#define USB_BIT8 ((uint16_t)0x0100) +#define USB_BIT9 ((uint16_t)0x0200) +#define USB_BIT10 ((uint16_t)0x0400) +#define USB_BIT11 ((uint16_t)0x0800) +#define USB_BIT12 ((uint16_t)0x1000) +#define USB_BIT13 ((uint16_t)0x2000) +#define USB_BIT14 ((uint16_t)0x4000) +#define USB_BIT15 ((uint16_t)0x8000) +#define USB_BITSET(x) ((uint16_t)((uint16_t)1 << (x))) + +/* Start Pipe No */ +#define USB_MIN_PIPE_NO (1u) + +/* Pipe configuration table define */ +#define USB_EPL (6u) /* Pipe configuration table length */ +#define USB_TYPFIELD (0xC000u) /* Transfer type */ +#define USB_PERIODIC (0x8000u) /* Periodic pipe */ +#define USB_TYPFIELD_ISO (0xC000u) /* Isochronous */ +#define USB_TYPFIELD_INT (0x8000u) /* Interrupt */ +#define USB_TYPFIELD_BULK (0x4000u) /* Bulk */ +#define USB_NOUSE (0x0000u) /* Not configuration */ +#define USB_BFREFIELD (0x0400u) /* Buffer ready interrupt mode select */ +#define USB_BFREON (0x0400u) +#define USB_BFREOFF (0x0000u) +#define USB_DBLBFIELD (0x0200u) /* Double buffer mode select */ +#define USB_CFG_DBLBON (0x0200u) +#define USB_CFG_DBLBOFF (0x0000u) +#define USB_CNTMDFIELD (0x0100u) /* Continuous transfer mode select */ +#define USB_CFG_CNTMDON (0x0100u) +#define USB_CFG_CNTMDOFF (0x0000u) +#define USB_SHTNAKFIELD (0x0080u) /* Transfer end NAK */ +#define USB_DIRFIELD (0x0010u) /* Transfer direction select */ +#define USB_DIR_H_OUT (0x0010u) /* HOST OUT */ +#define USB_DIR_P_IN (0x0010u) /* PERI IN */ +#define USB_DIR_H_IN (0x0000u) /* HOST IN */ +#define USB_DIR_P_OUT (0x0000u) /* PERI OUT */ +#define USB_BUF2FIFO (0x0010u) /* Buffer --> FIFO */ +#define USB_FIFO2BUF (0x0000u) /* FIFO --> buffer */ +#define USB_EPNUMFIELD (0x000Fu) /* Endpoint number select */ +#define USB_MAX_EP_NO (15u) /* EP0 EP1 ... EP15 */ + +#define USB_BUF_SIZE(x) ((uint16_t)(((x) / 64u) - 1u) << 10u) +#define USB_BUF_NUMB(x) (x) + +/* FIFO read / write result */ +#define USB_FIFOERROR (0x00ffu) /* FIFO not ready */ +#define USB_WRITEEND (0x0000u) /* End of write (but packet may not be outputting) */ +#define USB_WRITESHRT (0x0001u) /* End of write (send short packet) */ +#define USB_WRITING (0x0002u) /* Write continues */ +#define USB_READEND (0x0000u) /* End of read */ +#define USB_READSHRT (0x0001u) /* Insufficient (receive short packet) */ +#define USB_READING (0x0002u) /* Read continues */ +#define USB_READOVER (0x0003u) /* Buffer size over */ + +/* Transfer status Type */ +#define USB_CTRL_END (0u) +#define USB_DATA_NONE (1u) +#define USB_DATA_WAIT (2u) +#define USB_DATA_OK (3u) +#define USB_DATA_SHT (4u) +#define USB_DATA_OVR (5u) +#define USB_DATA_STALL (6u) +#define USB_DATA_ERR (7u) +#define USB_DATA_STOP (8u) +#define USB_DATA_TMO (9u) +#define USB_CTRL_READING (17u) +#define USB_CTRL_WRITING (18u) +#define USB_DATA_READING (19u) +#define USB_DATA_WRITING (20u) + + +/* System Configuration Control Register */ +#define USB_HSE (0x0080u) /* b7: Hi-speed enable */ +#define USB_DCFM (0x0040u) /* b6: Function select */ +#define USB_DRPD (0x0020u) /* b5: D+/D- pull down control */ +#define USB_DPRPU (0x0010u) /* b4: D+ pull up control */ +#define USB_DMRPU (0x0008u) /* b3: D- pull up control */ /* For low speed */ +#define USB_UCKSEL (0x0004u) /* b2: USB clock select */ +#define USB_EXTAL_12MHZ (0x0004u) /* EXTAL 12MHz */ +#define USB_X1_48MHZ (0x0000u) /* USB_X1 48MHz */ +#define USB_UPLLE (0x0002u) /* b1: USB internal PLL enable */ +#define USB_USBE (0x0001u) /* b0: USB module enable */ + +/* CPU Bus Wait Register */ +#define USB_BWAIT (0x003Fu) /* b5-0: Bus wait bit */ +#define USB_BWAIT_15 (0x000Fu) /* 15 wait (access cycle 17) */ +#define USB_BWAIT_14 (0x000Eu) /* 14 wait (access cycle 16) */ +#define USB_BWAIT_13 (0x000Du) /* 13 wait (access cycle 15) */ +#define USB_BWAIT_12 (0x000Cu) /* 12 wait (access cycle 14) */ +#define USB_BWAIT_11 (0x000Bu) /* 11 wait (access cycle 13) */ +#define USB_BWAIT_10 (0x000Au) /* 10 wait (access cycle 12) */ +#define USB_BWAIT_9 (0x0009u) /* 9 wait (access cycle 11) */ +#define USB_BWAIT_8 (0x0008u) /* 8 wait (access cycle 10) */ +#define USB_BWAIT_7 (0x0007u) /* 7 wait (access cycle 9) */ +#define USB_BWAIT_6 (0x0006u) /* 6 wait (access cycle 8) */ +#define USB_BWAIT_5 (0x0005u) /* 5 wait (access cycle 7) */ +#define USB_BWAIT_4 (0x0004u) /* 4 wait (access cycle 6) */ +#define USB_BWAIT_3 (0x0003u) /* 3 wait (access cycle 5) */ +#define USB_BWAIT_2 (0x0002u) /* 2 wait (access cycle 4) */ +#define USB_BWAIT_1 (0x0001u) /* 1 wait (access cycle 3) */ +#define USB_BWAIT_0 (0x0000u) /* 0 wait (access cycle 2) */ + +/* System Configuration Status Register */ +#define USB_OVCMON (0xC000u) /* b15-14: Over-current monitor */ +#define USB_OVCBIT (0x8000u) /* b15-14: Over-current bit */ +#define USB_HTACT (0x0040u) /* b6: USB Host Sequencer Status Monitor */ +#define USB_SOFEA (0x0020u) /* b5: SOF monitor */ +#define USB_IDMON (0x0004u) /* b2: ID-pin monitor */ +#define USB_LNST (0x0003u) /* b1-0: D+, D- line status */ +#define USB_SE1 (0x0003u) /* SE1 */ +#define USB_FS_KSTS (0x0002u) /* Full-Speed K State */ +#define USB_FS_JSTS (0x0001u) /* Full-Speed J State */ +#define USB_LS_JSTS (0x0002u) /* Low-Speed J State */ +#define USB_LS_KSTS (0x0001u) /* Low-Speed K State */ +#define USB_SE0 (0x0000u) /* SE0 */ + +/* PLL Status Register */ +#define USB_PLLLOCK (0x0001u) + +/* Device State Control Register */ +#define USB_HNPBTOA (0x0800u) /* b11: Host negotiation protocol (BtoA) */ +#define USB_EXICEN (0x0400u) /* b10: EXICEN output terminal control */ +#define USB_VBUSEN (0x0200u) /* b9: VBUS output terminal control */ +#define USB_WKUP (0x0100u) /* b8: Remote wakeup */ +#define USB_RWUPE (0x0080u) /* b7: Remote wakeup sense */ +#define USB_USBRST (0x0040u) /* b6: USB reset enable */ +#define USB_RESUME (0x0020u) /* b5: Resume enable */ +#define USB_UACT (0x0010u) /* b4: USB bus enable */ +#define USB_RHST (0x0007u) /* b2-0: Reset handshake status */ +#define USB_HSPROC (0x0004u) /* HS handshake processing */ +#define USB_HSMODE (0x0003u) /* Hi-Speed mode */ +#define USB_FSMODE (0x0002u) /* Full-Speed mode */ +#define USB_LSMODE (0x0001u) /* Low-Speed mode */ +#define USB_UNDECID (0x0000u) /* Undecided */ + +/* Test Mode Register */ +#define USB_UTST (0x000Fu) /* b3-0: Test mode */ +#define USB_H_TST_F_EN (0x000Du) /* HOST TEST FORCE ENABLE */ +#define USB_H_TST_PACKET (0x000Cu) /* HOST TEST Packet */ +#define USB_H_TST_SE0_NAK (0x000Bu) /* HOST TEST SE0 NAK */ +#define USB_H_TST_K (0x000Au) /* HOST TEST K */ +#define USB_H_TST_J (0x0009u) /* HOST TEST J */ +#define USB_H_TST_NORMAL (0x0000u) /* HOST Normal Mode */ +#define USB_P_TST_PACKET (0x0004u) /* PERI TEST Packet */ +#define USB_P_TST_SE0_NAK (0x0003u) /* PERI TEST SE0 NAK */ +#define USB_P_TST_K (0x0002u) /* PERI TEST K */ +#define USB_P_TST_J (0x0001u) /* PERI TEST J */ +#define USB_P_TST_NORMAL (0x0000u) /* PERI Normal Mode */ + +/* CFIFO/DxFIFO Port Select Register */ +#define USB_RCNT (0x8000u) /* b15: Read count mode */ +#define USB_REW (0x4000u) /* b14: Buffer rewind */ +#define USB_DCLRM (0x2000u) /* b13: Automatic buffer clear mode */ +#define USB_DREQE (0x1000u) /* b12: DREQ output enable */ +#define USB_MBW (0x0C00u) /* b10: Maximum bit width for FIFO access */ +#define USB_MBW_32 (0x0800u) /* FIFO access : 32bit */ +#define USB_MBW_16 (0x0400u) /* FIFO access : 16bit */ +#define USB_MBW_8 (0x0000u) /* FIFO access : 8bit */ +#define USB_BIGEND (0x0100u) /* b8: Big endian mode */ +#define USB_FIFO_BIG (0x0100u) /* Big endian */ +#define USB_FIFO_LITTLE (0x0000u) /* Little endian */ +#define USB_ISEL (0x0020u) /* b5: DCP FIFO port direction select */ +#define USB_ISEL_WRITE (0x0020u) /* write */ +#define USB_ISEL_READ (0x0000u) /* read */ +#define USB_CURPIPE (0x000Fu) /* b2-0: PIPE select */ + +/* CFIFO/DxFIFO Port Control Register */ +#define USB_BVAL (0x8000u) /* b15: Buffer valid flag */ +#define USB_BCLR (0x4000u) /* b14: Buffer clear */ +#define USB_FRDY (0x2000u) /* b13: FIFO ready */ +#define USB_DTLN (0x0FFFu) /* b11-0: FIFO data length */ + +/* Interrupt Enable Register 0 */ +#define USB_VBSE (0x8000u) /* b15: VBUS interrupt */ +#define USB_RSME (0x4000u) /* b14: Resume interrupt */ +#define USB_SOFE (0x2000u) /* b13: Frame update interrupt */ +#define USB_DVSE (0x1000u) /* b12: Device state transition interrupt */ +#define USB_CTRE (0x0800u) /* b11: Control transfer stage transition interrupt */ +#define USB_BEMPE (0x0400u) /* b10: Buffer empty interrupt */ +#define USB_NRDYE (0x0200u) /* b9: Buffer notready interrupt */ +#define USB_BRDYE (0x0100u) /* b8: Buffer ready interrupt */ + +/* Interrupt Enable Register 1 */ +#define USB_OVRCRE (0x8000u) /* b15: Over-current interrupt */ +#define USB_BCHGE (0x4000u) /* b14: USB bus change interrupt */ +#define USB_DTCHE (0x1000u) /* b12: Detach sense interrupt */ +#define USB_ATTCHE (0x0800u) /* b11: Attach sense interrupt */ +#define USB_L1RSMENDE (0x0200u) /* b9: L1 resume completion interrupt */ +#define USB_LPMENDE (0x0100u) /* b8: LPM transaction completion interrupt */ +#define USB_EOFERRE (0x0040u) /* b6: EOF error interrupt */ +#define USB_SIGNE (0x0020u) /* b5: SETUP IGNORE interrupt */ +#define USB_SACKE (0x0010u) /* b4: SETUP ACK interrupt */ +#define USB_PDDETINTE (0x0001u) /* b0: PDDET detection interrupt */ + +/* BRDY Interrupt Enable/Status Register */ +#define USB_BRDY9 (0x0200u) /* b9: PIPE9 */ +#define USB_BRDY8 (0x0100u) /* b8: PIPE8 */ +#define USB_BRDY7 (0x0080u) /* b7: PIPE7 */ +#define USB_BRDY6 (0x0040u) /* b6: PIPE6 */ +#define USB_BRDY5 (0x0020u) /* b5: PIPE5 */ +#define USB_BRDY4 (0x0010u) /* b4: PIPE4 */ +#define USB_BRDY3 (0x0008u) /* b3: PIPE3 */ +#define USB_BRDY2 (0x0004u) /* b2: PIPE2 */ +#define USB_BRDY1 (0x0002u) /* b1: PIPE1 */ +#define USB_BRDY0 (0x0001u) /* b1: PIPE0 */ + +/* NRDY Interrupt Enable/Status Register */ +#define USB_NRDY9 (0x0200u) /* b9: PIPE9 */ +#define USB_NRDY8 (0x0100u) /* b8: PIPE8 */ +#define USB_NRDY7 (0x0080u) /* b7: PIPE7 */ +#define USB_NRDY6 (0x0040u) /* b6: PIPE6 */ +#define USB_NRDY5 (0x0020u) /* b5: PIPE5 */ +#define USB_NRDY4 (0x0010u) /* b4: PIPE4 */ +#define USB_NRDY3 (0x0008u) /* b3: PIPE3 */ +#define USB_NRDY2 (0x0004u) /* b2: PIPE2 */ +#define USB_NRDY1 (0x0002u) /* b1: PIPE1 */ +#define USB_NRDY0 (0x0001u) /* b1: PIPE0 */ + +/* BEMP Interrupt Enable/Status Register */ +#define USB_BEMP9 (0x0200u) /* b9: PIPE9 */ +#define USB_BEMP8 (0x0100u) /* b8: PIPE8 */ +#define USB_BEMP7 (0x0080u) /* b7: PIPE7 */ +#define USB_BEMP6 (0x0040u) /* b6: PIPE6 */ +#define USB_BEMP5 (0x0020u) /* b5: PIPE5 */ +#define USB_BEMP4 (0x0010u) /* b4: PIPE4 */ +#define USB_BEMP3 (0x0008u) /* b3: PIPE3 */ +#define USB_BEMP2 (0x0004u) /* b2: PIPE2 */ +#define USB_BEMP1 (0x0002u) /* b1: PIPE1 */ +#define USB_BEMP0 (0x0001u) /* b0: PIPE0 */ + +/* SOF Pin Configuration Register */ +#define USB_TRNENSEL (0x0100u) /* b8: Select transaction enable period */ +#define USB_BRDYM (0x0040u) /* b6: BRDY clear timing */ +#define USB_INTL (0x0020u) /* b5: Interrupt sense select */ +#define USB_EDGESTS (0x0010u) /* b4: */ +#define USB_SOFMODE (0x000Cu) /* b3-2: SOF pin select */ +#define USB_SOF_125US (0x0008u) /* SOF 125us Frame Signal */ +#define USB_SOF_1MS (0x0004u) /* SOF 1ms Frame Signal */ +#define USB_SOF_DISABLE (0x0000u) /* SOF Disable */ + +#define USB_HSEB (0x8000u) /* b15: CL only mode bit */ + +#define USB_REPSTART (0x0800u) /* b11: Terminator adjustment forcible starting bit */ +#define USB_REPSEL (0x0300u) /* b9-8: Terminator adjustment cycle setting */ +#define USB_REPSEL_128 (0x0300u) /* 128 sec */ +#define USB_REPSEL_64 (0x0200u) /* 64 sec */ +#define USB_REPSEL_16 (0x0100u) /* 16 sec */ +#define USB_REPSEL_NONE (0x0000u) /* - */ +#define USB_CLKSEL (0x0030u) /* b5-4: System clock setting */ +#define USB_CLKSEL_24 (0x0030u) /* 24MHz */ +#define USB_CLKSEL_20 (0x0020u) /* 20MHz */ +#define USB_CLKSEL_48 (0x0010u) /* 48MHz */ +#define USB_CLKSEL_30 (0x0000u) /* 30MHz */ +#define USB_CDPEN (0x0008u) /* b3: Charging downstream port enable */ +#define USB_PLLRESET (0x0002u) /* b1: PLL reset control */ +#define USB_DIRPD (0x0001u) /* b0: Power down control */ + +/* Interrupt Status Register 0 */ +#define USB_VBINT (0x8000u) /* b15: VBUS interrupt */ +#define USB_RESM (0x4000u) /* b14: Resume interrupt */ +#define USB_SOFR (0x2000u) /* b13: SOF update interrupt */ +#define USB_DVST (0x1000u) /* b12: Device state transition interrupt */ +#define USB_CTRT (0x0800u) /* b11: Control transfer stage transition interrupt */ +#define USB_BEMP (0x0400u) /* b10: Buffer empty interrupt */ +#define USB_NRDY (0x0200u) /* b9: Buffer notready interrupt */ +#define USB_BRDY (0x0100u) /* b8: Buffer ready interrupt */ +#define USB_VBSTS (0x0080u) /* b7: VBUS input port */ +#define USB_DVSQ (0x0070u) /* b6-4: Device state */ +#define USB_DS_SPD_CNFG (0x0070u) /* Suspend Configured */ +#define USB_DS_SPD_ADDR (0x0060u) /* Suspend Address */ +#define USB_DS_SPD_DFLT (0x0050u) /* Suspend Default */ +#define USB_DS_SPD_POWR (0x0040u) /* Suspend Powered */ +#define USB_DS_SUSP (0x0040u) /* Suspend */ +#define USB_DS_CNFG (0x0030u) /* Configured */ +#define USB_DS_ADDS (0x0020u) /* Address */ +#define USB_DS_DFLT (0x0010u) /* Default */ +#define USB_DS_POWR (0x0000u) /* Powered */ +#define USB_DVSQS (0x0030u) /* b5-4: Device state */ +#define USB_VALID (0x0008u) /* b3: Setup packet detect flag */ +#define USB_CTSQ (0x0007u) /* b2-0: Control transfer stage */ +#define USB_CS_SQER (0x0006u) /* Sequence error */ +#define USB_CS_WRND (0x0005u) /* Ctrl write nodata status stage */ +#define USB_CS_WRSS (0x0004u) /* Ctrl write status stage */ +#define USB_CS_WRDS (0x0003u) /* Ctrl write data stage */ +#define USB_CS_RDSS (0x0002u) /* Ctrl read status stage */ +#define USB_CS_RDDS (0x0001u) /* Ctrl read data stage */ +#define USB_CS_IDST (0x0000u) /* Idle or setup stage */ + +/* Interrupt Status Register 1 */ +#define USB_OVRCR (0x8000u) /* b15: Over-current interrupt */ +#define USB_BCHG (0x4000u) /* b14: USB bus change interrupt */ +#define USB_DTCH (0x1000u) /* b12: Detach sense interrupt */ +#define USB_ATTCH (0x0800u) /* b11: Attach sense interrupt */ +#define USB_L1RSMEND (0x0200u) /* b9: L1 resume completion interrupt */ +#define USB_LPMEND (0x0100u) /* b8: LPM transaction completion interrupt */ +#define USB_EOFERR (0x0040u) /* b6: EOF-error interrupt */ +#define USB_SIGN (0x0020u) /* b5: Setup ignore interrupt */ +#define USB_SACK (0x0010u) /* b4: Setup ack interrupt */ +#define USB_PDDETINT (0x0001u) /* b0: PDDET detection interrupt */ + +/* Frame Number Register */ +#define USB_OVRN (0x8000u) /* b15: Overrun error */ +#define USB_CRCE (0x4000u) /* b14: Received data error */ +#define USB_FRNM (0x07FFu) /* b10-0: Frame number */ + +/* Device State Change Register */ /* For USB0 */ +#define USB_DVCHG (0x8000u) /* b15: Device state change */ + +/* Micro Frame Number Register */ /* For USBHS */ +#define USB_UFRNM (0x0007u) /* b2-0: Micro frame number */ + +/* USB Address / Low Power Status Recovery Register */ +#define USB_STSRECOV (0x0F00u) /* b11-8: Status Recovery */ +#define USB_USBADDR_MASK (0x007Fu) /* b6-0: USB address */ + +/* USB Request Type Register */ +#define USB_BMREQUESTTYPE (0x00FFu) /* b7-0: USB_BMREQUESTTYPE */ +#define USB_BMREQUESTTYPEDIR (0x0080u) /* b7 : Data transfer direction */ +#define USB_BMREQUESTTYPETYPE (0x0060u) /* b6-5: Type */ +#define USB_BMREQUESTTYPERECIP (0x001Fu) /* b4-0: Recipient */ + +/* USB Request Value Register */ +#define USB_WVALUE (0xFFFFu) /* b15-0: wValue */ +#define USB_DT_TYPE (0xFF00u) +#define USB_GET_DT_TYPE(v) (((v) & USB_DT_TYPE) >> 8) +#define USB_DT_INDEX (0x00FFu) +#define USB_CONF_NUM (0x00FFu) +#define USB_ALT_SET (0x00FFu) + +/* USB Request Index Register */ +#define USB_WINDEX (0xFFFFu) /* b15-0: wIndex */ +#define USB_TEST_SELECT (0xFF00u) /* b15-b8: Test Mode Selectors */ +#define USB_TEST_J (0x0100u) /* Test_J */ +#define USB_TEST_K (0x0200u) /* Test_K */ +#define USB_TEST_SE0_NAK (0x0300u) /* Test_SE0_NAK */ +#define USB_TEST_PACKET (0x0400u) /* Test_Packet */ +#define USB_TEST_FORCE_ENABLE (0x0500u) /* Test_Force_Enable */ +#define USB_TEST_STSelectors (0x0600u) /* Standard test selectors */ +#define USB_TEST_RESERVED (0x4000u) /* Reserved */ +#define USB_TEST_VSTMODES (0xC000u) /* VendorSpecific test modes */ +#define USB_EP_DIR (0x0080u) /* b7: Endpoint Direction */ +#define USB_EP_DIR_IN (0x0080u) +#define USB_EP_DIR_OUT (0x0000u) + +/* USB Request Length Register */ +#define USB_WLENGTH (0xFFFFu) /* b15-0: wLength */ + +#define USB_TYPE (0xC000u) /* b15-14: Transfer type */ +#define USB_BFRE (0x0400u) /* b10: Buffer ready interrupt mode select */ + +#define USB_DEVSEL (0xF000u) /* b15-14: Device address select */ +#define USB_MAXP (0x007Fu) /* b6-0: Maxpacket size of default control pipe */ +#define USB_MXPS (0x07FFu) /* b10-0: Maxpacket size */ + +#define USB_BSTS (0x8000u) /* b15: Buffer status */ +#define USB_SUREQ (0x4000u) /* b14: Send USB request */ +#define USB_INBUFM (0x4000u) /* b14: IN buffer monitor (Only for PIPE1 to 5) */ +#define USB_CSCLR (0x2000u) /* b13: c-split status clear */ +#define USB_CSSTS (0x1000u) /* b12: c-split status */ +#define USB_SUREQCLR (0x0800u) /* b11: stop setup request */ +#define USB_ATREPM (0x0400u) /* b10: Auto repeat mode */ +#define USB_ACLRM (0x0200u) /* b9: buffer auto clear mode */ +#define USB_SQCLR (0x0100u) /* b8: Sequence bit clear */ +#define USB_SQSET (0x0080u) /* b7: Sequence bit set */ +#define USB_SQMON (0x0040u) /* b6: Sequence bit monitor */ +#define USB_PBUSY (0x0020u) /* b5: pipe busy */ +#define USB_PINGE (0x0010u) /* b4: ping enable */ +#define USB_CCPL (0x0004u) /* b2: Enable control transfer complete */ +#define USB_PID (0x0003u) /* b1-0: Response PID */ +#define USB_PID_STALL2 (0x0003u) /* STALL2 */ +#define USB_PID_STALL (0x0002u) /* STALL */ +#define USB_PID_BUF (0x0001u) /* BUF */ +#define USB_PID_NAK (0x0000u) /* NAK */ + +#define USB_PIPENM (0x0007u) /* b2-0: Pipe select */ + +#define USB_BUFSIZE (0x7C00u) /* b14-10: Pipe buffer size */ +#define USB_BUFNMB (0x007Fu) /* b6-0: Pipe buffer number */ +#define USB_PIPE0BUF (256u) +#define USB_PIPEXBUF (64u) + +#define USB_TRENB (0x0200u) /* b9: Transaction count enable */ +#define USB_TRCLR (0x0100u) /* b8: Transaction count clear */ +#define USB_TRNCNT (0xFFFFu) /* b15-0: Transaction counter */ + +#define USB_UPPHUB (0x7800u) /* b14-11: HUB register */ +#define USB_HUBPORT (0x0700u) /* b10-8: HUB port */ +#define USB_USBSPD (0x00C0u) /* b7-6: Device speed */ + +/********* USB0 Only ******************************************************************************/ + +/* PHY Crosspoint Adjustment Register */ +/* PHYSLEW */ +#define USB_SLEWF01 (0x0008u) /* b3: Cross point adjustment bit 01 */ +#define USB_SLEWF00 (0x0004u) /* b2: Cross point adjustment bit 00 */ +#define USB_SLEWR01 (0x0002u) /* b1: Cross point adjustment bit 01 */ +#define USB_SLEWR00 (0x0001u) /* b0: Cross point adjustment bit 00 */ + +/* Deep Standby USB Transceiver Control/Terminal Monitor Register */ +/* DPUSR0R */ +#define USB_DVBSTS0 (0x00800000u) /* b23: USB0 VBUS input */ +#define USB_DOVCB0 (0x00200000u) /* b21: USB0 OVRCURB input */ +#define USB_DOVCA0 (0x00100000u) /* b20: USB0 OVRCURA input */ +#define USB_DM0 (0x00200000u) /* b17: USB0 D- input */ +#define USB_DP0 (0x00100000u) /* b16: USB0 D+ input */ +#define USB_FIXPHY0 (0x00000010u) /* b4: USB0 transceiver output fixed bit */ +#define USB_DRPD0 (0x00000008u) /* b3: D+/D- pull down resistor control bit */ +#define USB_RPUE0 (0x00000002u) /* b1: DP pull up resistor control bit */ +#define USB_SRPC0 (0x00000001u) /* b0: USB0 single end receiver control bit */ + +/* Deep Standby USB Suspend/Resume Interrupt Register */ +/* DPUSR1R */ +#define USB_DVBINT0 (0x00800000u) /* b23: USB0 VBUS monitor bit */ +#define USB_DOVRCRB0 (0x00200000u) /* b21: USB0 OVRCURB DM monitor bit */ +#define USB_DOVRCRA0 (0x00100000u) /* b20: USB0 OVRCURA DM monitor bit */ +#define USB_DMINT0 (0x00020000u) /* b17: USB0 DM monitor bit */ +#define USB_DPINT0 (0x00010000u) /* b16: USB0 DP monitor bit */ +#define USB_DVBSE0 (0x00000080u) /* b7: USB0 VBUS interrupt enable */ +#define USB_DOVRCRBE0 (0x00000020u) /* b5: USB0 OVRCURB interrupt enable */ +#define USB_DOVRCRAE0 (0x00000010u) /* b4: USB0 OVRCURA interrupt enable */ +#define USB_DMINTE0 (0x00000002u) /* b1: USB0 DM interrupt enable */ +#define USB_DPINTE0 (0x00000001u) /* b0: USB0 DP interrupt enable */ + +/**************************************************************************************************/ + +/********* USBHS Only *****************************************************************************/ + +/* Low Power Control Register */ +/* LPCTRL */ +#define USB_HWUPM (0x0080u) /* b7: */ + +/* Low Power Status Register */ +/* LPSTS */ +#define USB_SUSPENDM (0x4000u) /* b14: UTMI SuspendM control */ + +/* PHY Single Access Read Data Register */ +/* SPRDAT */ +#define USB_PHYRDAT (0x00FFu) /* PHY read data bit */ + +/* Battery Charging Control Register */ +/* BCCTRL */ +#define USB_PDDETSTS (0x0200u) /* b9: PDDET status */ +#define USB_CHGDETSTS (0x0100u) /* b8: CHGDET status */ +#define USB_DCPMODE (0x0020u) /* b5: DCP mode control */ +#define USB_VDMSRCE (0x0010u) /* b4: VDMSRC control */ +#define USB_IDPSINKE (0x0008u) /* b3: IDPSINK control */ +#define USB_VDPSRCE (0x0004u) /* b2: VDPSRC control */ +#define USB_IDMSINKE (0x0002u) /* b1: IDMSINK control */ +#define USB_IDPSRCE (0x0001u) /* b0: IDPSRC control */ + +/* Function L1 Control Register 1 */ +/* PL1CTRL1 */ +#define USB_L1EXTMD (0x4000u) /* b14: PHY control mode */ +#define USB_DVSQEX (0x0080u) /* b7: DVSQ extension bit */ +#define USB_DVSQ (0x0070u) /* b6-4: Mirror of DVSQ */ +#define USB_L1NEGOMD (0x0008u) /* b3: L1 response negotiation control */ +#define USB_L1RESPMD (0x0006u) /* b2-1: L1 response mode */ +#define USB_L1RESPEN (0x0001u) /* b0: L1 response enable */ + +/* Function L1 Control Register 2 */ +/* PL1CTRL2 */ +#define USB_HSRDMON (0x0F00u) /* b12: RWE monitor bit */ +#define USB_RWEMON (0x1000u) /* b11-8: HIRD monitor bit */ + +/* Host L1 Control Register 1 */ +/* HL1CTRL1 */ +#define USB_L1STATUS (0x0006u) /* b2-1: L1 request completion state */ +#define USB_L1REQ (0x0001u) /* b0: L1 changes request bit + */ + +/* Host L1 Control Register 2 */ +/* HL1CTRL2 */ +#define USB_BESL (0x8000u) /* b15: BESL & Alternate HIRD bit */ +#define USB_L1RWE (0x1000u) /* b12: L1 RemoteWake enable for LPM tokens */ +#define USB_HSRD (0x0F00u) /* b11-8: HIRD bit for LPM tokens */ +#define USB_L1ADDR (0x000Fu) /* b3-0: DeviceAddress for LPM tokens */ + +/* PHY Timing Register 1 */ +/* PHYTRIM1 */ +#define USB_IMPOFFSET (0x7000u) /* b14-12: Terminator adjustment */ +#define USB_HSIUP (0x0F00u) /* b11-8: Output level setup of HS */ +#define USB_PCOMPENB (0x0080u) /* b7: PVDD starting detection setup */ +#define USB_DFALL (0x000Cu) /* b3-2: FS/LS falling output waveform compensation function setting */ +#define USB_DRISE (0x0003u) /* b1-0: FS/LS standup output waveform compensation function setting */ + +/* PHY Timing Register 2 */ +/* PHYTRIM2 */ +#define USB_DIS (0x7000u) /* b14-12: Disconnect disregard level setup */ +#define USB_PDR (0x0300u) /* b9-8: HS output compensation function setting */ +#define USB_HSRXENMODE (0x0080u) /* b7: HS reception permission control mode setup */ +#define USB_SQU (0x000Fu) /* b3-0: Squelch disregard level setup */ + +/* Deep Standby USB Register */ +/* DPUSR0R */ +#define USB_DVBSTSHM (0x00800000u) /* b23: VBUS input */ +#define USB_DOVCBHM (0x00200000u) /* b21: OVRCURB input */ +#define USB_DOVCAHM (0x00100000u) /* b20: OVRCURA input */ + +/* DPUSR1R */ +#define USB_DVBSTSH (0x00800000u) /* b23: Interruption factor return display of VBUS */ +#define USB_DOVCBH (0x00200000u) /* b21: Interruption factor return display of OVRCURB */ +#define USB_DOVCAH (0x00100000u) /* b20: Interruption factor return display of OVRCURA */ +#define USB_DVBSTSHE (0x00000080u) /* b7 : VBUS interrupt enable */ +#define USB_DOVCBHE (0x00000020u) /* b5 : OVRCURB interrupt enable */ +#define USB_DOVCAHE (0x00000010u) /* b4 : OVRCURA interrupt enable */ + +/**************************************************************************************************/ + +/* DMAx Pin Configuration Register */ +#define USB_DREQA (0x4000u) /* b14: Dreq active select */ +#define USB_BURST (0x2000u) /* b13: Burst mode */ +#define USB_DACKA (0x0400u) /* b10: Dack active select */ +#define USB_DFORM (0x0380u) /* b9-7: DMA mode select */ +#define USB_CPU_ADR_RD_WR (0x0000u) /* Address + RD/WR mode (CPU bus) */ +#define USB_CPU_DACK_RD_WR (0x0100u) /* DACK + RD/WR (CPU bus) */ +#define USB_CPU_DACK_ONLY (0x0180u) /* DACK only (CPU bus) */ +#define USB_SPLIT_DACK_ONLY (0x0200u) /* DACK only (SPLIT bus) */ +#define USB_DENDA (0x0040u) /* b6: Dend active select */ +#define USB_PKTM (0x0020u) /* b5: Packet mode */ +#define USB_DENDE (0x0010u) /* b4: Dend enable */ +#define USB_OBUS (0x0004u) /* b2: OUTbus mode */ + +/* USB IO Register Reserved bit mask */ +#define INTSTS1_MASK (0x5870u) /* INTSTS1 Reserved bit mask */ +#define BRDYSTS_MASK (0xFFFFu) /* BRDYSTS Reserved bit mask */ +#define NRDYSTS_MASK (0xFFFFu) /* NRDYSTS Reserved bit mask */ +#define BEMPSTS_MASK (0xFFFFu) /* BEMPSTS Reserved bit mask */ + + + +/* USB Request Type Register */ +#define USB_BREQUEST (0xFF00u) /* b15-8 */ + +/* USB Standard request */ +#define USB_GET_STATUS (0x0000u) +#define USB_CLEAR_FEATURE (0x0100u) +#define USB_REQRESERVED (0x0200u) +#define USB_SET_FEATURE (0x0300u) +#define USB_REQRESERVED1 (0x0400u) +#define USB_SET_ADDRESS (0x0500u) +#define USB_GET_DESCRIPTOR (0x0600u) +#define USB_SET_DESCRIPTOR (0x0700u) +#define USB_GET_CONFIGURATION (0x0800u) +#define USB_SET_CONFIGURATION (0x0900u) +#define USB_GET_INTERFACE (0x0A00u) +#define USB_SET_INTERFACE (0x0B00u) +#define USB_SYNCH_FRAME (0x0C00u) + +/* USB_BMREQUESTTYPEDIR 0x0080u(b7) */ +#define USB_HOST_TO_DEV (0x0000u) +#define USB_DEV_TO_HOST (0x0080u) + +/* USB_BMREQUESTTYPETYPE 0x0060u(b6-5) */ +#define USB_STANDARD (0x0000u) +#define USB_CLASS (0x0020u) +#define USB_VENDOR (0x0040u) + +/* USB_BMREQUESTTYPERECIP 0x001Fu(b4-0) */ +#define USB_DEVICE (0x0000u) +#define USB_INTERFACE (0x0001u) +#define USB_ENDPOINT (0x0002u) +#define USB_OTHER (0x0003u) + +#define USB_NULL (0x0u) + +#define USB_IP0 (0) /* USB0 module */ +#define USB_IP1 (1) /* USB1 module */ + +/* USB pipe number */ +#define USB_PIPE0 (0x0u) +#define USB_PIPE1 (0x1u) +#define USB_PIPE2 (0x2u) +#define USB_PIPE3 (0x3u) +#define USB_PIPE4 (0x4u) +#define USB_PIPE5 (0x5u) +#define USB_PIPE6 (0x6u) +#define USB_PIPE7 (0x7u) +#define USB_PIPE8 (0x8u) +#define USB_PIPE9 (0x9u) +#define USB_PIPE10 (0xAu) +#define USB_PIPE11 (0xBu) +#define USB_PIPE12 (0xCu) +#define USB_PIPE13 (0xDu) +#define USB_PIPE14 (0xEu) +#define USB_PIPE15 (0xFu) + +#define USB_EP0 (0x0u) +#define USB_EP1 (0x1u) +#define USB_EP2 (0x2u) +#define USB_EP3 (0x3u) +#define USB_EP4 (0x4u) +#define USB_EP5 (0x5u) +#define USB_EP6 (0x6u) +#define USB_EP7 (0x7u) +#define USB_EP8 (0x8u) +#define USB_EP9 (0x9u) +#define USB_EP10 (0xAu) +#define USB_EP11 (0xBu) +#define USB_EP12 (0xCu) +#define USB_EP13 (0xDu) +#define USB_EP14 (0xEu) +#define USB_EP15 (0xFu) + +/* Descriptor type Define */ +#define USB_DT_DEVICE (0x01u) /* Configuration Descriptor */ +#define USB_DT_CONFIGURATION (0x02u) /* Configuration Descriptor */ +#define USB_DT_STRING (0x03u) /* Configuration Descriptor */ +#define USB_DT_INTERFACE (0x04u) /* Interface Descriptor */ +#define USB_DT_ENDPOINT (0x05u) /* Endpoint Descriptor */ +#define USB_DT_DEVICE_QUALIFIER (0x06u) /* Device Qualifier Descriptor */ +#define USB_DT_OTHER_SPEED_CONF (0x07u) /* Other Speed Configuration Descriptor */ +#define USB_DT_INTERFACE_POWER (0x08u) /* Interface Power Descriptor */ +#define USB_DT_OTGDESCRIPTOR (0x09u) /* OTG Descriptor */ +#define USB_DT_HUBDESCRIPTOR (0x29u) /* HUB descriptor */ + +/* Interface class Define */ +#define USB_IFCLS_NOT (0x00u) /* Un corresponding Class */ +#define USB_IFCLS_AUD (0x01u) /* Audio Class */ +#define USB_IFCLS_CDC (0x02u) /* CDC Class */ +#define USB_IFCLS_CDCC (0x02u) /* CDC-Control Class */ +#define USB_IFCLS_HID (0x03u) /* HID Class */ +#define USB_IFCLS_PHY (0x05u) /* Physical Class */ +#define USB_IFCLS_IMG (0x06u) /* Image Class */ +#define USB_IFCLS_PRN (0x07u) /* Printer Class */ +#define USB_IFCLS_MAS (0x08u) /* Mass Storage Class */ +#define USB_IFCLS_HUB (0x09u) /* HUB Class */ +#define USB_IFCLS_CDCD (0x0Au) /* CDC-Data Class */ +#define USB_IFCLS_CHIP (0x0Bu) /* Chip/Smart Card Class */ +#define USB_IFCLS_CNT (0x0Cu) /* Content-Security Class */ +#define USB_IFCLS_VID (0x0Du) /* Video Class */ +#define USB_IFCLS_DIAG (0xDCu) /* Diagnostic Device */ +#define USB_IFCLS_WIRE (0xE0u) /* Wireless Controller */ +#define USB_IFCLS_APL (0xFEu) /* Application-Specific */ +#define USB_IFCLS_VEN (0xFFu) /* Vendor-Specific Class */ + +/* Endpoint Descriptor Define */ +#define USB_EP_IN (0x80u) /* In Endpoint */ +#define USB_EP_OUT (0x00u) /* Out Endpoint */ +#define USB_EP_ISO (0x01u) /* Isochronous Transfer */ +#define USB_EP_BULK (0x02u) /* Bulk Transfer */ +#define USB_EP_INT (0x03u) /* Interrupt Transfer */ + +/* Configuration descriptor bit define */ +#define USB_CF_RESERVED (0x80u) /* Reserved(set to 1) */ +#define USB_CF_SELFP (0x40u) /* Self Powered */ +#define USB_CF_BUSP (0x00u) /* Bus Powered */ +#define USB_CF_RWUPON (0x20u) /* Remote Wake up ON */ +#define USB_CF_RWUPOFF (0x00u) /* Remote Wake up OFF */ + + /* Descriptor length Define */ +#define USB_DD_BLENGTH (18u) /* Device Descriptor Length */ +#define USB_CD_BLENGTH (9u) /* Configuration Descriptor Length */ +#define USB_ID_BLENGTH (9u) /* Interface Descriptor Length */ +#define USB_ED_BLENGTH (7u) /* Endpoint Descriptor Length */ + +#define USB_BUFSIZE_BIT (10u) + +/* other */ +#define USB_FUNCTION_CFIFO_USE (0x0000u) +#define USB_FUNCTION_D0FIFO_USE (0x1000u) +#define USB_FUNCTION_D1FIFO_USE (0x2000u) + + +#endif From e37ee0fddf79430ddd007dc0dbe7f541cefb4d30 Mon Sep 17 00:00:00 2001 From: bcostm Date: Thu, 8 Nov 2018 10:10:39 +0100 Subject: [PATCH 409/488] STM32F7 USB: add patch in CubeF7 hal driver --- .../TARGET_STM32F7/device/stm32f7xx_hal_pcd.c | 195 ++++++++++++++---- .../TARGET_STM32F7/device/stm32f7xx_hal_pcd.h | 1 + .../TARGET_STM32F7/device/stm32f7xx_ll_usb.c | 184 ++++++++++++++++- .../TARGET_STM32F7/device/stm32f7xx_ll_usb.h | 3 + 4 files changed, 335 insertions(+), 48 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c index 2785ae76bd7..5e9e291208c 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c +++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c @@ -102,6 +102,7 @@ * @{ */ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t epnum); +static HAL_StatusTypeDef PCD_ReadRxFifo(PCD_HandleTypeDef *hpcd); // MBED PATCH /** * @} */ @@ -148,8 +149,9 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd) { /* Allocate lock resource and initialize it */ hpcd->Lock = HAL_UNLOCKED; - for (i = 0; i < hpcd->Init.dev_endpoints ; i++) - hpcd->EPLock[i].Lock = HAL_UNLOCKED; + for (i = 0; i < hpcd->Init.dev_endpoints ; i++) { // MBED PATCH + hpcd->EPLock[i].Lock = HAL_UNLOCKED; + } /* Init the low level hardware : GPIO, CLOCK, NVIC... */ HAL_PCD_MspInit(hpcd); } @@ -300,10 +302,10 @@ __weak void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd) */ HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd) { - __HAL_LOCK(hpcd); + // MBED PATCH __HAL_LOCK(hpcd); USB_DevConnect (hpcd->Instance); __HAL_PCD_ENABLE(hpcd); - __HAL_UNLOCK(hpcd); + // MBED PATCH __HAL_UNLOCK(hpcd); return HAL_OK; } @@ -314,11 +316,11 @@ HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd) */ HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd) { - __HAL_LOCK(hpcd); + // MBED PATCH __HAL_LOCK(hpcd); __HAL_PCD_DISABLE(hpcd); USB_StopDevice(hpcd->Instance); USB_DevDisconnect (hpcd->Instance); - __HAL_UNLOCK(hpcd); + // MBED PATCH __HAL_UNLOCK(hpcd); return HAL_OK; } @@ -393,6 +395,13 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) } } + // MBED PATCH + if (( epint & USB_OTG_DOEPINT_EPDISD) == USB_OTG_DOEPINT_EPDISD) + { + CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_EPDISD); + } + // MBED PATCH + if(( epint & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP) { /* setup/out transaction management for Core ID >= 310A */ @@ -440,7 +449,8 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) if(( epint & USB_OTG_DIEPINT_XFRC) == USB_OTG_DIEPINT_XFRC) { fifoemptymsk = 0x1 << epnum; - atomic_clr_u32(&USBx_DEVICE->DIEPEMPMSK, fifoemptymsk); // MBED: changed + + atomic_clr_u32(&USBx_DEVICE->DIEPEMPMSK, fifoemptymsk); // MBED PATCH CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_XFRC); @@ -662,25 +672,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) /* Handle RxQLevel Interrupt */ if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) { - USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); - temp = USBx->GRXSTSP; - ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM]; - - if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_DATA_UPDT) - { - if((temp & USB_OTG_GRXSTSP_BCNT) != 0) - { - USB_ReadPacket(USBx, ep->xfer_buff, (temp & USB_OTG_GRXSTSP_BCNT) >> 4); - ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4; - ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4; - } - } - else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_SETUP_UPDT) - { - USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8); - ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4; - } - USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); + PCD_ReadRxFifo(hpcd); // MBED PATCH } /* Handle SOF Interrupt */ @@ -988,9 +980,9 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint ep->data_pid_start = 0; } - __HAL_LOCK(hpcd); + __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7FU]); // MBED PATCH USB_ActivateEndpoint(hpcd->Instance , ep); - __HAL_UNLOCK(hpcd); + __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7FU]); // MBED PATCH return ret; } @@ -1017,9 +1009,9 @@ HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) ep->is_in = (0x80 & ep_addr) != 0; - __HAL_LOCK(hpcd); + __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7FU]); // MBED PATCH USB_DeactivateEndpoint(hpcd->Instance , ep); - __HAL_UNLOCK(hpcd); + __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7FU]); // MBED PATCH return HAL_OK; } @@ -1050,7 +1042,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, u ep->dma_addr = (uint32_t)pBuf; } - __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED:added + __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH if ((ep_addr & 0x7F) == 0) { @@ -1061,7 +1053,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, u USB_EPStartXfer(hpcd->Instance, ep, hpcd->Init.dma_enable); } - __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: added + __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH return HAL_OK; } @@ -1102,7 +1094,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, ep->dma_addr = (uint32_t)pBuf; } - __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: added + __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH if ((ep_addr & 0x7F) == 0) { @@ -1113,11 +1105,91 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, USB_EPStartXfer(hpcd->Instance, ep, hpcd->Init.dma_enable); } - __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: added + __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH return HAL_OK; } +// MBED PATCH +/** + * @brief Abort a transaction. + * @param hpcd: PCD handle + * @param ep_addr: endpoint address + * @retval HAL status + */ +HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) +{ + USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; + HAL_StatusTypeDef ret = HAL_OK; + USB_OTG_EPTypeDef *ep; + + if ((0x80 & ep_addr) == 0x80) + { + ep = &hpcd->IN_ep[ep_addr & 0x7F]; + } + else + { + ep = &hpcd->OUT_ep[ep_addr]; + } + + __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); + + ep->num = ep_addr & 0x7F; + ep->is_in = ((ep_addr & 0x80) == 0x80); + + USB_EPSetNak(hpcd->Instance, ep); + + if ((0x80 & ep_addr) == 0x80) + { + ret = USB_EPStopXfer(hpcd->Instance , ep); + if (ret == HAL_OK) + { + ret = USB_FlushTxFifo(hpcd->Instance, ep_addr & 0x7F); + } + } + else + { + /* Set global NAK */ + USBx_DEVICE->DCTL |= USB_OTG_DCTL_SGONAK; + + /* Read all entries from the fifo so global NAK takes effect */ + while (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) + { + PCD_ReadRxFifo(hpcd); + } + + /* Stop the transfer */ + ret = USB_EPStopXfer(hpcd->Instance , ep); + if (ret == HAL_BUSY) + { + /* If USB_EPStopXfer returns HAL_BUSY then a setup packet + * arrived after the rx fifo was processed but before USB_EPStopXfer + * was called. Process the rx fifo one more time to read the + * setup packet. + * + * Note - after the setup packet has been received no further + * packets will be received over USB. This is because the next + * phase (data or status) of the control transfer started by + * the setup packet will be naked until global nak is cleared. + */ + while (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) + { + PCD_ReadRxFifo(hpcd); + } + + ret = USB_EPStopXfer(hpcd->Instance , ep); + } + + /* Clear global nak */ + USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGONAK; + } + + __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); + + return ret; +} +// MBED PATCH + /** * @brief Set a STALL condition over an endpoint. * @param hpcd PCD handle @@ -1146,8 +1218,7 @@ HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) ep->num = ep_addr & 0x7F; ep->is_in = ((ep_addr & 0x80) == 0x80); - - __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: changed + __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH USB_EPSetStall(hpcd->Instance , ep); if((ep_addr & 0x7F) == 0) @@ -1155,7 +1226,7 @@ HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) USB_EP0_OutStart(hpcd->Instance, hpcd->Init.dma_enable, (uint8_t *)hpcd->Setup); } - __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: changed + __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH return HAL_OK; } @@ -1188,9 +1259,11 @@ HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) ep->num = ep_addr & 0x7F; ep->is_in = ((ep_addr & 0x80) == 0x80); - __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: changed + __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH + USB_EPClearStall(hpcd->Instance , ep); - __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: changed + + __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH return HAL_OK; } @@ -1203,7 +1276,7 @@ HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) */ HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { - __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: changed + __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH if ((ep_addr & 0x80) == 0x80) { @@ -1214,7 +1287,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) USB_FlushRxFifo(hpcd->Instance); } - __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: change + __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH return HAL_OK; } @@ -1337,13 +1410,51 @@ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t if (ep->xfer_count >= ep->xfer_len) { fifoemptymsk = 0x1 << epnum; - atomic_clr_u32(&USBx_DEVICE->DIEPEMPMSK, fifoemptymsk); // MBED: changed + atomic_clr_u32(&USBx_DEVICE->DIEPEMPMSK, fifoemptymsk); // MBED PATCH } return HAL_OK; } +// MBED PATCH +/** + * @brief Process the next RX fifo entry + * @param hpcd: PCD handle + * @retval HAL status + */ +static HAL_StatusTypeDef PCD_ReadRxFifo(PCD_HandleTypeDef *hpcd) +{ + USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; + USB_OTG_EPTypeDef *ep; + uint32_t temp = 0; + + USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); + + temp = USBx->GRXSTSP; + + ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM]; + + if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_DATA_UPDT) + { + if((temp & USB_OTG_GRXSTSP_BCNT) != 0U) + { + USB_ReadPacket(USBx, ep->xfer_buff, (temp & USB_OTG_GRXSTSP_BCNT) >> 4U); + ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; + ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; + } + } + else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_SETUP_UPDT) + { + USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U); + ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U; + } + USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); + + return HAL_OK; +} +// MBED PATCH + /** * @} */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.h index 41504f5db5c..f895df94d35 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.h +++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.h @@ -286,6 +286,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); +HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); // MBED PATCH uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_usb.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_usb.c index 16c21ac3e3a..645eb10af3c 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_usb.c +++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_usb.c @@ -479,7 +479,8 @@ HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTy if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0) { - USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18 ) |\ + // MBED PATCH + USBx_INEP(ep->num)->DIEPCTL = ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18 ) |\ ((ep->num) << 22 ) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP)); } @@ -490,7 +491,8 @@ HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTy if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0) { - USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18 ) |\ + // MBED PATCH + USBx_OUTEP(ep->num)->DOEPCTL = ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18 ) |\ (USB_OTG_DIEPCTL_SD0PID_SEVNFRM)| (USB_OTG_DOEPCTL_USBAEP)); } } @@ -511,7 +513,8 @@ HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB { if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0) { - USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18 ) |\ + // MBED PATCH + USBx_INEP(ep->num)->DIEPCTL = ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18 ) |\ ((ep->num) << 22 ) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP)); } @@ -525,7 +528,8 @@ HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB { if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0) { - USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18 ) |\ + // MBED PATCH + USBx_OUTEP(ep->num)->DOEPCTL = ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18 ) |\ ((ep->num) << 22 ) | (USB_OTG_DOEPCTL_USBAEP)); debug = (uint32_t)(((uint32_t )USBx) + USB_OTG_OUT_ENDPOINT_BASE + (0)*USB_OTG_EP_REG_SIZE); @@ -639,7 +643,7 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDe /* Enable the Tx FIFO Empty Interrupt for this EP */ if (ep->xfer_len > 0) { - atomic_set_u32(&USBx_DEVICE->DIEPEMPMSK, 1 << ep->num); // MBED: changed + atomic_set_u32(&USBx_DEVICE->DIEPEMPMSK, 1 << ep->num); // MBED PATCH } } } @@ -793,6 +797,174 @@ HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeD return HAL_OK; } +// MBED PATCH +/** + * @brief USB_EPStoptXfer : stop transfer on this endpoint + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @retval HAL status + * @note IN endpoints must have NAK enabled before calling this function + * @note OUT endpoints must have global out NAK enabled before calling this + * function. Furthermore, the RX fifo must be empty or the status + * HAL_BUSY will be returned. + */ +HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep) +{ + HAL_StatusTypeDef ret = HAL_OK; + uint32_t count = 0U; + uint32_t epint, fifoemptymsk; + + /* IN endpoint */ + if (ep->is_in == 1U) + { + + /* EP enable, IN data in FIFO */ + if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) + { + /* Disable this endpoint */ + USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_EPDIS; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_INEP(ep->num)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA); + } + + /* Clear transfer complete interrupt */ + epint = USB_ReadDevInEPInterrupt(USBx, ep->num); + if((epint & USB_OTG_DIEPINT_XFRC) == USB_OTG_DIEPINT_XFRC) + { + CLEAR_IN_EP_INTR(ep->num, USB_OTG_DIEPINT_XFRC); + } + + /* Mask fifo empty interrupt */ + fifoemptymsk = 0x1U << ep->num; + atomic_clr_u32(&USBx_DEVICE->DIEPEMPMSK, fifoemptymsk); + } + else /* OUT endpoint */ + { + if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) + { + /* Disable this endpoint */ + USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_EPDIS; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + if ((USBx->GINTSTS & USB_OTG_GINTSTS_RXFLVL) == USB_OTG_GINTSTS_RXFLVL) + { + /* Although not mentioned in the Reference Manual, it appears that the + * rx fifo must be empty for an OUT endpoint to be disabled. Typically + * this will happen when setting the global OUT nak (required by Reference + * Manual) as this requires processing the rx fifo. This is not guaranteed + * though, as a setup packet can arrive even while global OUT nak is set. + * + * During testing this event was observed and prevented endpoint disabling + * from completing until the rx fifo was empty. To address this problem + * return HAL_BUSY if the rx fifo is not empty to give higher level code + * a chance to clear the fifo and retry the operation. + * + */ + return HAL_BUSY; + } + } + while ((USBx_OUTEP(ep->num)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA); + } + + /* Clear interrupt */ + epint = USB_ReadDevOutEPInterrupt(USBx, ep->num); + if(( epint & USB_OTG_DOEPINT_XFRC) == USB_OTG_DOEPINT_XFRC) + { + CLEAR_OUT_EP_INTR(ep->num, USB_OTG_DOEPINT_XFRC); + } + } + return ret; +} + +/** + * @brief USB_EPSetNak : stop transfer and nak all tokens on this endpoint + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @retval HAL status + */ +HAL_StatusTypeDef USB_EPSetNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep) +{ + uint32_t count = 0; + if (ep->is_in == 1U) + { + USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_INEP(ep->num)->DIEPCTL & USB_OTG_DIEPCTL_NAKSTS) != USB_OTG_DIEPCTL_NAKSTS); + } + else + { + USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_OUTEP(ep->num)->DOEPCTL & USB_OTG_DOEPCTL_NAKSTS) != USB_OTG_DOEPCTL_NAKSTS); + } + return HAL_OK; +} + +/** + * @brief USB_EPSetNak : resume transfer and stop naking on this endpoint + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @retval HAL status + */ +HAL_StatusTypeDef USB_EPClearNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep) +{ + uint32_t count = 0; + if (ep->is_in == 1U) + { + USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_CNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_INEP(ep->num)->DIEPCTL & USB_OTG_DIEPCTL_NAKSTS) == USB_OTG_DIEPCTL_NAKSTS); + } + else + { + USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK; + count = 0; + do + { + if (++count > 200000U) + { + return HAL_TIMEOUT; + } + } + while ((USBx_OUTEP(ep->num)->DOEPCTL & USB_OTG_DOEPCTL_NAKSTS) == USB_OTG_DOEPCTL_NAKSTS); + } + return HAL_OK; +} +// MBED PATCH + /** * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated * with the EP/channel @@ -1635,7 +1807,7 @@ HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDe /* Write packet into the Tx FIFO. */ USB_WritePacket(USBx, hc->xfer_buff, hc->ch_num, hc->xfer_len, 0); - hc->xfer_count = hc->xfer_len; // MBED: added + hc->xfer_count = hc->xfer_len; // MBED PATCH } } diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_usb.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_usb.h index b3a0cf3ea09..2d0fc740989 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_usb.h +++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_usb.h @@ -415,6 +415,9 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EP HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); +HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); // MBED PATCH +HAL_StatusTypeDef USB_EPSetNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); // MBED PATCH +HAL_StatusTypeDef USB_EPClearNak(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); // MBED PATCH HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma); void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len); From 5f8a230e39283a4926362ddd525ea23b4fdba7eb Mon Sep 17 00:00:00 2001 From: bcostm Date: Thu, 8 Nov 2018 13:06:50 +0100 Subject: [PATCH 410/488] STM32F7 USB: change VBUS pin for DISCO_F746NG FS --- usb/device/targets/TARGET_STM/USBPhy_STM32.cpp | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index c37720fb96f..70b4fc4a195 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -216,7 +216,12 @@ void USBPhyHw::init(USBPhyEvents *events) __HAL_RCC_GPIOA_CLK_ENABLE(); pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DM pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DP +#if defined(TARGET_DISCO_F746NG_OTG_FS) + __HAL_RCC_GPIOJ_CLK_ENABLE(); + pin_function(PJ_12, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // VBUS +#else pin_function(PA_9, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // VBUS +#endif pin_function(PA_10, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)); // ID pin_function(PA_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // SOF __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); @@ -259,7 +264,7 @@ void USBPhyHw::init(USBPhyEvents *events) pin_function(PH_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // NXT #if defined(TARGET_DISCO_F769NI) pin_function(PI_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // DIR -#else // TARGET_DISCO_F746NG +#else pin_function(PC_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // DIR #endif __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE(); From 6030dc7879ae7ee30b6997aaf46a5023cfa4407c Mon Sep 17 00:00:00 2001 From: bcostm Date: Tue, 20 Nov 2018 10:23:05 +0100 Subject: [PATCH 411/488] STM32F7 USB: add NUCLEO_F756ZG in pins definition --- usb/device/targets/TARGET_STM/USBPhy_STM32.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 70b4fc4a195..4689e2abeb7 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -209,6 +209,7 @@ void USBPhyHw::init(USBPhyEvents *events) defined(TARGET_NUCLEO_F446ZE) || \ defined(TARGET_NUCLEO_F767ZI) || \ defined(TARGET_NUCLEO_F746ZG) || \ + defined(TARGET_NUCLEO_F756ZG) || \ defined(TARGET_DISCO_F407VG) || \ defined(TARGET_DISCO_F413ZH) || \ defined(TARGET_DISCO_F469NI) || \ From ce6834f92d81a0959d0331bad1c4d9918936cc56 Mon Sep 17 00:00:00 2001 From: bcostm Date: Fri, 30 Nov 2018 16:10:58 +0100 Subject: [PATCH 412/488] STM32F7 USB: enable USBDEVICE in targets.json --- targets/targets.json | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/targets/targets.json b/targets/targets.json index e7d3cf4ae7e..ce04927942b 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -2838,6 +2838,7 @@ "SERIAL_ASYNCH", "TRNG", "FLASH", + "USBDEVICE", "MPU" ], "release_versions": ["2", "5"], @@ -2889,6 +2890,7 @@ "SERIAL_ASYNCH", "TRNG", "FLASH", + "USBDEVICE", "MPU" ], "release_versions": ["2", "5"], @@ -2942,6 +2944,7 @@ "SERIAL_ASYNCH", "TRNG", "FLASH", + "USBDEVICE", "MPU" ], "release_versions": ["2", "5"], @@ -3777,6 +3780,7 @@ "TRNG", "FLASH", "QSPI", + "USBDEVICE", "MPU" ], "release_versions": ["2", "5"], @@ -3827,6 +3831,7 @@ "SERIAL_ASYNCH", "TRNG", "FLASH", + "USBDEVICE", "MPU", "QSPI" ], From 84f9e538345b8c33c9a1805f5962914040f87ca5 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Mon, 14 Jan 2019 15:50:05 +0100 Subject: [PATCH 413/488] Tests: USB: Fix 'endpoint halt' test Abort all endpoint transfers before running the test again. Use an updated vendor request to explicitly restart device reads. --- TESTS/host_tests/pyusb_basic.py | 38 ++++++------- TESTS/usb_device/basic/USBEndpointTester.cpp | 58 +++++--------------- TESTS/usb_device/basic/USBEndpointTester.h | 2 +- 3 files changed, 32 insertions(+), 66 deletions(-) diff --git a/TESTS/host_tests/pyusb_basic.py b/TESTS/host_tests/pyusb_basic.py index 2e0f12332e5..eb11d31058e 100644 --- a/TESTS/host_tests/pyusb_basic.py +++ b/TESTS/host_tests/pyusb_basic.py @@ -56,7 +56,7 @@ def get_interface(dev, interface, alternate=0): VENDOR_TEST_CTRL_OUT_STATUS_DELAY = 8 VENDOR_TEST_CTRL_IN_SIZES = 9 VENDOR_TEST_CTRL_OUT_SIZES = 10 -VENDOR_TEST_READ_START = 11 +VENDOR_TEST_RW_RESTART = 11 VENDOR_TEST_ABORT_BUFF_CHECK = 12 VENDOR_TEST_UNSUPPORTED_REQUEST = 32 @@ -984,7 +984,7 @@ def random_size_loopback_ep_test(ep_out, ep_in, failure, error, seconds, log, mi time.sleep(0.01) -def halt_ep_test(dev, ep_out, ep_in, ep_to_halt, log): +def halt_ep_test(dev, ep_out, ep_in, log): """OUT/IN endpoint halt test. Verify that halting an endpoint at a random point of OUT or IN transfer @@ -1003,6 +1003,8 @@ def halt_ep_test(dev, ep_out, ep_in, ep_to_halt, log): except usb.core.USBError as err: raise_unconditionally(lineno(), 'Unable to get endpoint status ({!r}).'.format(err)) + ep_to_halt = random.choice([ep_out, ep_in]) + def timer_handler(): """Halt an endpoint using a USB control request.""" try: @@ -1044,17 +1046,19 @@ def timer_handler(): finally: # Always wait for the Timer thread created above. delayed_halt.join() + ep_out.clear_halt() + ep_in.clear_halt() raise_unconditionally(lineno(), 'Halting endpoint {0.bEndpointAddress:#04x}' ' during transmission did not raise USBError.' .format(ep_to_halt)) -def request_endpoint_read_start(dev, ep): +def request_endpoint_loops_restart(dev): ctrl_kwargs = { - 'bmRequestType': build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, CTRL_RECIPIENT_ENDPOINT), - 'bRequest': VENDOR_TEST_READ_START, + 'bmRequestType': build_request_type(CTRL_OUT, CTRL_TYPE_VENDOR, CTRL_RECIPIENT_DEVICE), + 'bRequest': VENDOR_TEST_RW_RESTART, 'wValue': 0, - 'wIndex': ep.bEndpointAddress} + 'wIndex': 0} dev.ctrl_transfer(**ctrl_kwargs) @@ -1149,35 +1153,26 @@ def ep_test_halt(dev, log, verbose=False): bulk_out, bulk_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_BULK) interrupt_out, interrupt_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_INTERRUPT) - iso_out, iso_in = find_ep_pair(intf, usb.ENDPOINT_TYPE_ISOCHRONOUS) if verbose: log('\tbulk_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_out)) log('\tbulk_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(bulk_in)) log('\tinterrupt_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_out)) log('\tinterrupt_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(interrupt_in)) - log('\tiso_out {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_out)) - log('\tiso_in {0.bEndpointAddress:#04x}, {0.wMaxPacketSize:02} B'.format(iso_in)) if verbose: log('Testing endpoint halt at a random point of bulk transmission.') end_ts = time.time() + 1.0 while time.time() < end_ts: - halt_ep_test(dev, bulk_out, bulk_in, bulk_out, log) - bulk_out.clear_halt() - request_endpoint_read_start(dev, bulk_out) - halt_ep_test(dev, bulk_out, bulk_in, bulk_in, log) - bulk_in.clear_halt() + halt_ep_test(dev, bulk_out, bulk_in, log) + request_endpoint_loops_restart(dev) if verbose: log('Testing endpoint halt at a random point of interrupt transmission.') end_ts = time.time() + 1.0 while time.time() < end_ts: - halt_ep_test(dev, interrupt_out, interrupt_in, interrupt_out, log) - interrupt_out.clear_halt() - request_endpoint_read_start(dev, interrupt_out) - halt_ep_test(dev, interrupt_out, interrupt_in, interrupt_in, log) - interrupt_in.clear_halt() + halt_ep_test(dev, interrupt_out, interrupt_in, log) + request_endpoint_loops_restart(dev) def ep_test_parallel_transfers(dev, log, verbose=False): @@ -1466,7 +1461,10 @@ def ep_test_data_toggle(dev, log, verbose=False): # ClearFeature(ENDPOINT_HALT) request always results in the data toggle being reinitialized to DATA0. # " bulk_out.clear_halt() -# request_endpoint_read_start(dev, bulk_out) + # The ClearFeature(ENDPOINT_HALT) terminates a pending read operation on the device end. + # Use a custom vendor request to restart reading on the OUT endpoint. + # This does not impact the state of the data toggle bit. + request_endpoint_loops_restart(dev) # 2.4 verify that host and USB device are still in sync with respect to data toggle try: diff --git a/TESTS/usb_device/basic/USBEndpointTester.cpp b/TESTS/usb_device/basic/USBEndpointTester.cpp index 8085dc0c1dc..d1e7e279671 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.cpp +++ b/TESTS/usb_device/basic/USBEndpointTester.cpp @@ -36,7 +36,7 @@ #define VENDOR_TEST_CTRL_OUT 2 #define VENDOR_TEST_CTRL_IN_SIZES 9 #define VENDOR_TEST_CTRL_OUT_SIZES 10 -#define VENDOR_TEST_READ_START 11 +#define VENDOR_TEST_RW_RESTART 11 #define VENDOR_TEST_ABORT_BUFF_CHECK 12 #define EVENT_READY (1 << 0) @@ -241,8 +241,8 @@ void USBEndpointTester::callback_request(const setup_packet_t *setup) data = ctrl_buf; size = setup->wValue; break; - case VENDOR_TEST_READ_START: - result = (_request_read_start(setup)) ? Success : Failure; + case VENDOR_TEST_RW_RESTART: + result = (_request_rw_restart(setup)) ? Success : Failure; break; case VENDOR_TEST_ABORT_BUFF_CHECK: result = Send; @@ -254,54 +254,23 @@ void USBEndpointTester::callback_request(const setup_packet_t *setup) result = PassThrough; break; } - } else if ((setup->bmRequestType.Type == STANDARD_TYPE) && (setup->bmRequestType.Recipient == ENDPOINT_RECIPIENT)) { - if (setup->bRequest == CLEAR_FEATURE) { - usb_ep_t ep = setup->wIndex; - bool valid = false; - uint32_t ep_index = 0; - if (ep == _endpoints[EP_BULK_OUT]) { - valid = true; - ep_index = EP_BULK_OUT; - } else if (ep == _endpoints[EP_INT_OUT]) { - valid = true; - ep_index = EP_INT_OUT; - } else if (ep == _endpoints[EP_ISO_OUT]) { - valid = true; - ep_index = EP_ISO_OUT; - } - - if (valid) { - // Restart reads when an OUT endpoint is unstalled - result = Success; - endpoint_unstall(ep); - read_start(_endpoints[ep_index], _endpoint_buffs[ep_index], (*_endpoint_configs)[ep_index].max_packet); - } - } } complete_request(result, data, size); } -bool USBEndpointTester::_request_read_start(const setup_packet_t *setup) +bool USBEndpointTester::_request_rw_restart(const setup_packet_t *setup) { assert_locked(); - if (setup->bmRequestType.Recipient != ENDPOINT_RECIPIENT) { - return false; - } - size_t ep_index = NUM_ENDPOINTS; + ep_config_t *epc = NULL; for (size_t i = 0; i < NUM_ENDPOINTS; i++) { - if (_endpoints[i] == setup->wIndex) { - ep_index = i; - break; + epc = &((*_endpoint_configs)[i]); + endpoint_abort(_endpoints[i]); + if (epc->dir_in == false) { + // Wait for data on every OUT endpoint + read_start(_endpoints[i], _endpoint_buffs[i], epc->max_packet); } } - if (ep_index == NUM_ENDPOINTS) { - return false; - } - if (_endpoint_buffs[ep_index] == NULL) { - return false; - } - endpoint_abort(_endpoints[ep_index]); - return read_start(_endpoints[ep_index], _endpoint_buffs[ep_index], (*_endpoint_configs)[ep_index].max_packet); + return true; } bool USBEndpointTester::_request_abort_buff_check(const setup_packet_t *setup) @@ -424,9 +393,8 @@ void USBEndpointTester::_setup_non_zero_endpoints() if (epc->callback == NULL) { continue; } - if (epc->dir_in == true) { -// write_start(_endpoints[i], _endpoint_buffs[i], epc->max_packet); - } else { + if (epc->dir_in == false) { + // Wait for data on every OUT endpoint read_start(_endpoints[i], _endpoint_buffs[i], epc->max_packet); } } diff --git a/TESTS/usb_device/basic/USBEndpointTester.h b/TESTS/usb_device/basic/USBEndpointTester.h index 3b0afef66c9..8666922a78b 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.h +++ b/TESTS/usb_device/basic/USBEndpointTester.h @@ -103,7 +103,7 @@ class USBEndpointTester: public USBDevice { private: const char *get_desc_string(const uint8_t *desc); - bool _request_read_start(const setup_packet_t *setup); + bool _request_rw_restart(const setup_packet_t *setup); bool _request_abort_buff_check(const setup_packet_t *setup); }; From 36eb2c7c440f7b2cdb4e3d169c5c134a7dbd4df5 Mon Sep 17 00:00:00 2001 From: Filip Jagodzinski Date: Fri, 18 Jan 2019 17:30:36 +0100 Subject: [PATCH 414/488] Tests: USB: Use astyle to format the test class --- TESTS/usb_device/basic/USBEndpointTester.cpp | 126 +++++++++---------- TESTS/usb_device/basic/USBEndpointTester.h | 42 +++++-- 2 files changed, 96 insertions(+), 72 deletions(-) diff --git a/TESTS/usb_device/basic/USBEndpointTester.cpp b/TESTS/usb_device/basic/USBEndpointTester.cpp index d1e7e279671..e8bbda66a26 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.cpp +++ b/TESTS/usb_device/basic/USBEndpointTester.cpp @@ -139,9 +139,9 @@ USBEndpointTester::ep_config_t USBEndpointTester::_intf_config4[NUM_ENDPOINTS] = }; USBEndpointTester::USBEndpointTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, - bool abort_transfer_test) : - USBDevice(phy, vendor_id, product_id, product_release), _abort_transfer_test(abort_transfer_test), _endpoint_configs( - &_intf_config_max) + bool abort_transfer_test) : + USBDevice(phy, vendor_id, product_id, product_release), _abort_transfer_test(abort_transfer_test), _endpoint_configs( + &_intf_config_max) { _cnt_cb_set_conf = 0; _cnt_cb_set_intf = 0; @@ -447,48 +447,48 @@ const uint8_t *USBEndpointTester::configuration_desc(uint8_t index) ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_BULK_OUT], // bEndpointAddress E_BULK, // bmAttributes - (uint8_t) (LSB(_intf_config0[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config0[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config0[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config0[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) 0, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_BULK_IN], // bEndpointAddress E_BULK, // bmAttributes - (uint8_t) (LSB(_intf_config0[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config0[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config0[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config0[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) 0, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_INT_OUT], // bEndpointAddress E_INTERRUPT, // bmAttributes - (uint8_t) (LSB(_intf_config0[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config0[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config0[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config0[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) 1, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_INT_IN], // bEndpointAddress E_INTERRUPT, // bmAttributes - (uint8_t) (LSB(_intf_config0[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config0[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config0[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config0[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) 1, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_ISO_OUT], // bEndpointAddress E_ISOCHRONOUS, // bmAttributes - (uint8_t) (LSB(_intf_config0[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config0[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config0[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config0[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) 1, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_ISO_IN], // bEndpointAddress E_ISOCHRONOUS, // bmAttributes - (uint8_t) (LSB(_intf_config0[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config0[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config0[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config0[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) 1, // bInterval // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 @@ -506,48 +506,48 @@ const uint8_t *USBEndpointTester::configuration_desc(uint8_t index) ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_BULK_OUT], // bEndpointAddress E_BULK, // bmAttributes - (uint8_t) (LSB(_intf_config1[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config1[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config1[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config1[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) 0, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_BULK_IN], // bEndpointAddress E_BULK, // bmAttributes - (uint8_t) (LSB(_intf_config1[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config1[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config1[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config1[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) 0, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_INT_OUT], // bEndpointAddress E_INTERRUPT, // bmAttributes - (uint8_t) (LSB(_intf_config1[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config1[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config1[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config1[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) 1, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_INT_IN], // bEndpointAddress E_INTERRUPT, // bmAttributes - (uint8_t) (LSB(_intf_config1[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config1[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config1[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config1[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) 1, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_ISO_OUT], // bEndpointAddress E_ISOCHRONOUS, // bmAttributes - (uint8_t) (LSB(_intf_config1[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config1[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config1[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config1[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) 1, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_ISO_IN], // bEndpointAddress E_ISOCHRONOUS, // bmAttributes - (uint8_t) (LSB(_intf_config1[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config1[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config1[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config1[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) 1, // bInterval // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 @@ -565,48 +565,48 @@ const uint8_t *USBEndpointTester::configuration_desc(uint8_t index) ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_BULK_OUT], // bEndpointAddress E_BULK, // bmAttributes - (uint8_t) (LSB(_intf_config2[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config2[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config2[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config2[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) 0, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_BULK_IN], // bEndpointAddress E_BULK, // bmAttributes - (uint8_t) (LSB(_intf_config2[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config2[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config2[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config2[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) 0, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_INT_OUT], // bEndpointAddress E_INTERRUPT, // bmAttributes - (uint8_t) (LSB(_intf_config2[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config2[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config2[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config2[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) 1, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_INT_IN], // bEndpointAddress E_INTERRUPT, // bmAttributes - (uint8_t) (LSB(_intf_config2[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config2[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config2[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config2[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) 1, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_ISO_OUT], // bEndpointAddress E_ISOCHRONOUS, // bmAttributes - (uint8_t) (LSB(_intf_config2[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config2[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config2[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config2[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) 1, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_ISO_IN], // bEndpointAddress E_ISOCHRONOUS, // bmAttributes - (uint8_t) (LSB(_intf_config2[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config2[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config2[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config2[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) 1, // bInterval // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 @@ -624,48 +624,48 @@ const uint8_t *USBEndpointTester::configuration_desc(uint8_t index) ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_BULK_OUT], // bEndpointAddress E_BULK, // bmAttributes - (uint8_t) (LSB(_intf_config3[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config3[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config3[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config3[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) 0, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_BULK_IN], // bEndpointAddress E_BULK, // bmAttributes - (uint8_t) (LSB(_intf_config3[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config3[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config3[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config3[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) 0, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_INT_OUT], // bEndpointAddress E_INTERRUPT, // bmAttributes - (uint8_t) (LSB(_intf_config3[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config3[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config3[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config3[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) 1, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_INT_IN], // bEndpointAddress E_INTERRUPT, // bmAttributes - (uint8_t) (LSB(_intf_config3[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config3[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config3[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config3[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) 1, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_ISO_OUT], // bEndpointAddress E_ISOCHRONOUS, // bmAttributes - (uint8_t) (LSB(_intf_config3[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config3[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config3[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config3[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) 1, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_ISO_IN], // bEndpointAddress E_ISOCHRONOUS, // bmAttributes - (uint8_t) (LSB(_intf_config3[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config3[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config3[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config3[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) 1, // bInterval // interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 @@ -683,48 +683,48 @@ const uint8_t *USBEndpointTester::configuration_desc(uint8_t index) ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_BULK_OUT], // bEndpointAddress E_BULK, // bmAttributes - (uint8_t) (LSB(_intf_config4[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config4[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config4[EP_BULK_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config4[EP_BULK_OUT].max_packet)), // wMaxPacketSize (MSB) 0, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_BULK_IN], // bEndpointAddress E_BULK, // bmAttributes - (uint8_t) (LSB(_intf_config4[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config4[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config4[EP_BULK_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config4[EP_BULK_IN].max_packet)), // wMaxPacketSize (MSB) 0, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_INT_OUT], // bEndpointAddress E_INTERRUPT, // bmAttributes - (uint8_t) (LSB(_intf_config4[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config4[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config4[EP_INT_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config4[EP_INT_OUT].max_packet)), // wMaxPacketSize (MSB) 1, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_INT_IN], // bEndpointAddress E_INTERRUPT, // bmAttributes - (uint8_t) (LSB(_intf_config4[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config4[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config4[EP_INT_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config4[EP_INT_IN].max_packet)), // wMaxPacketSize (MSB) 1, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_ISO_OUT], // bEndpointAddress E_ISOCHRONOUS, // bmAttributes - (uint8_t) (LSB(_intf_config4[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config4[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config4[EP_ISO_OUT].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config4[EP_ISO_OUT].max_packet)), // wMaxPacketSize (MSB) 1, // bInterval // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13 ENDPOINT_DESCRIPTOR_LENGTH, // bLength ENDPOINT_DESCRIPTOR, // bDescriptorType _endpoints[EP_ISO_IN], // bEndpointAddress E_ISOCHRONOUS, // bmAttributes - (uint8_t) (LSB(_intf_config4[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) - (uint8_t) (MSB(_intf_config4[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) + (uint8_t)(LSB(_intf_config4[EP_ISO_IN].max_packet)), // wMaxPacketSize (LSB) + (uint8_t)(MSB(_intf_config4[EP_ISO_IN].max_packet)), // wMaxPacketSize (MSB) 1, // bInterval }; if (index == 0) { diff --git a/TESTS/usb_device/basic/USBEndpointTester.h b/TESTS/usb_device/basic/USBEndpointTester.h index 8666922a78b..c20fc45bf5e 100644 --- a/TESTS/usb_device/basic/USBEndpointTester.h +++ b/TESTS/usb_device/basic/USBEndpointTester.h @@ -32,19 +32,43 @@ class USBEndpointTester: public USBDevice { public: USBEndpointTester(USBPhy *phy, uint16_t vendor_id, uint16_t product_id, uint16_t product_release, - bool abort_transfer_test); + bool abort_transfer_test); virtual ~USBEndpointTester(); const char *get_serial_desc_string(); void start_ep_in_abort_test(); - uint32_t get_cnt_cb_set_conf() const { return _cnt_cb_set_conf; } - uint32_t get_cnt_cb_set_intf() const { return _cnt_cb_set_intf; } - uint32_t get_cnt_cb_bulk_out() const { return _cnt_cb_bulk_out; } - uint32_t get_cnt_cb_bulk_in() const { return _cnt_cb_bulk_in; } - uint32_t get_cnt_cb_int_out() const { return _cnt_cb_int_out; } - uint32_t get_cnt_cb_int_in() const { return _cnt_cb_int_in; } - uint32_t get_cnt_cb_iso_out() const { return _cnt_cb_iso_out; } - uint32_t get_cnt_cb_iso_in() const { return _cnt_cb_iso_in; } + uint32_t get_cnt_cb_set_conf() const + { + return _cnt_cb_set_conf; + } + uint32_t get_cnt_cb_set_intf() const + { + return _cnt_cb_set_intf; + } + uint32_t get_cnt_cb_bulk_out() const + { + return _cnt_cb_bulk_out; + } + uint32_t get_cnt_cb_bulk_in() const + { + return _cnt_cb_bulk_in; + } + uint32_t get_cnt_cb_int_out() const + { + return _cnt_cb_int_out; + } + uint32_t get_cnt_cb_int_in() const + { + return _cnt_cb_int_in; + } + uint32_t get_cnt_cb_iso_out() const + { + return _cnt_cb_iso_out; + } + uint32_t get_cnt_cb_iso_in() const + { + return _cnt_cb_iso_in; + } struct ep_config_t { bool dir_in; From 161156ffacd3242e93b8838b3e0211d33007059a Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Sat, 19 Jan 2019 14:44:35 -0500 Subject: [PATCH 415/488] Removed 0 max packet size assert for ISO endpoints. Ensured usbd_ep_abort would not be called on ISO endpoints (this currently causes an ASSERT in the Nordic driver --- .../drivers_nrf/usbd/nrf_drv_usbd.c | 13 +++++++++++-- .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 14 +++++++++++++- 2 files changed, 24 insertions(+), 3 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c index db316672b75..b533195dc9f 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c @@ -1918,7 +1918,12 @@ bool nrf_drv_usbd_bus_suspend_check(void) void nrf_drv_usbd_ep_max_packet_size_set(nrf_drv_usbd_ep_t ep, uint16_t size) { /* Only power of 2 size allowed */ - ASSERT((size != 0) && (size & (size - 1)) == 0); + ASSERT((size & (size - 1)) == 0); + + /* Size of 0 not allowed for non-ISO endpoints */ + if(ep != NRF_DRV_USBD_EPOUT8 && ep != NRF_DRV_USBD_EPIN8) + ASSERT(size != 0); + /* Packet size cannot be higher than maximum buffer size */ ASSERT( ( NRF_USBD_EPISO_CHECK(ep) && (size <= usbd_ep_iso_capacity(ep))) || @@ -1959,7 +1964,11 @@ void nrf_drv_usbd_ep_enable(nrf_drv_usbd_ep_t ep) void nrf_drv_usbd_ep_disable(nrf_drv_usbd_ep_t ep) { - usbd_ep_abort(ep); + // Mbed modification -- calling usbd_ep_abort on an ISO endpoint + // causes an assert in the Nordic driver + if(ep != NRF_DRV_USBD_EPOUT8 && ep != NRF_DRV_USBD_EPIN8) + usbd_ep_abort(ep); + nrf_usbd_ep_disable(ep_to_hal(ep)); nrf_usbd_int_disable(nrf_drv_usbd_ep_to_int(ep)); } diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index e50fec1147b..acaf719ac20 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -119,6 +119,15 @@ void USBPhyHw::init(USBPhyEvents *events) { // Store a reference to this instance instance = this; + /* + * TODO - Configure ISOIN endpoint to respond with ZLP when + * no data is ready to be sent + * + * This is a feature available in the Nordic SDK15.2 + * For now we just configure the appropriate register on initialization + */ + NRF_USBD->ISOINCONFIG |= 0x01; // set RESPONSE to 1 (respond with ZLP) + // Enable IRQ NVIC_SetVector(USBD_IRQn, (uint32_t)USBD_IRQHandler); //NVIC_SetPriority(USBD_IRQn, 7); @@ -396,7 +405,10 @@ bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) { } void USBPhyHw::endpoint_abort(usb_ep_t endpoint) { - nrf_drv_usbd_ep_abort(get_nordic_endpoint(endpoint)); + nrf_drv_usbd_ep_t nrf_ep = get_nordic_endpoint(endpoint); + // Don't call abort on ISO endpoints -- this will cause an ASSERT in the Nordic driver + if(nrf_ep != NRF_DRV_USBD_EPOUT8 && nrf_ep != NRF_DRV_USBD_EPIN8) + nrf_drv_usbd_ep_abort(nrf_ep); } void USBPhyHw::process() { From 7de73010eb6c2ad8562ffcb027847353cd23de21 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Sat, 19 Jan 2019 14:45:40 -0500 Subject: [PATCH 416/488] Removed function call for SOF event -- frame counter is already included in data from usb event --- .../targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index acaf719ac20..4e1a976c9ce 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -441,7 +441,7 @@ void USBPhyHw::process() { break; case NRF_DRV_USBD_EVT_SOF: if(sof_enabled) - events->sof(nrf_usbd_framecntr_get()); + events->sof(usb_event.data.sof.framecnt); break; case NRF_DRV_USBD_EVT_EPTRANSFER: if(usb_event.data.eptransfer.status == NRF_USBD_EP_OK) From 2e8ca4a5f3d687b4ac85ea7942cfaf1a00acbe60 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Sat, 19 Jan 2019 15:09:35 -0500 Subject: [PATCH 417/488] Added code to ignore ZLP packets on the ISOOUT endpoint... not fixing issue yet --- .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index 4e1a976c9ce..0f47f6c28ed 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -467,7 +467,18 @@ void USBPhyHw::process() { events->ep0_out(); } else + { + // TODO - this may impact valid ZLP transfers + // on the ISOOUT endpoint + // If ISOOUT endpoint transaction occurred + // and the ZERO bit of SIZE.ISOOUT is set... + // ignore it for now... possible hardware bug? + if((usb_event.data.eptransfer.ep == NRF_DRV_USBD_EPOUT8) + && (NRF_USBD->SIZE.ISOOUT & (1 << 16))) + break; + events->out((usb_ep_t) usb_event.data.eptransfer.ep); + } } } break; From 88b3d73075c27fbe5e727a463640f4be78c68ac7 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Mon, 21 Jan 2019 23:00:48 -0500 Subject: [PATCH 418/488] Changed a little formatting --- .../TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index 0f47f6c28ed..6768d447649 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -473,9 +473,9 @@ void USBPhyHw::process() { // If ISOOUT endpoint transaction occurred // and the ZERO bit of SIZE.ISOOUT is set... // ignore it for now... possible hardware bug? - if((usb_event.data.eptransfer.ep == NRF_DRV_USBD_EPOUT8) - && (NRF_USBD->SIZE.ISOOUT & (1 << 16))) - break; +// if((usb_event.data.eptransfer.ep == NRF_DRV_USBD_EPOUT8) +// && (NRF_USBD->SIZE.ISOOUT & (1 << 16))) +// break; events->out((usb_ep_t) usb_event.data.eptransfer.ep); } From ffc15be1800d752725f3ef946318c97a55a63164 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Tue, 29 Jan 2019 22:14:47 -0500 Subject: [PATCH 419/488] Added data toggle clearing to removing endpoints. Reworked aborting endpoints in nordic driver to prevent an ASSERT when it is called on ISO endpoints --- .../drivers_nrf/usbd/nrf_drv_usbd.c | 31 ++++++++++++++++--- .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 18 ++++++++++- 2 files changed, 43 insertions(+), 6 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c index b533195dc9f..d8188e64110 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c @@ -226,6 +226,9 @@ STATIC_ASSERT(USBD_EP_BITPOS(NRF_DRV_USBD_EPOUT7) == USBD_EPDATASTATUS_EPOUT7_Po #define USBD_DRV_REQUESTTYPE_DIR_IN (1U << USBD_DRV_REQUESTTYPE_DIR_BITPOS) /** @} */ +// TODO remove this +extern int nrf_usb_iface; + /** * @brief Current driver state */ @@ -463,6 +466,16 @@ static inline uint32_t nrf_drv_usbd_ep_to_int(nrf_drv_usbd_ep_t ep) return 1UL << (NRF_USBD_EPIN_CHECK(ep) ? epin_bitpos : epout_bitpos)[NRF_USBD_EP_NR_GET(ep)]; } +// TODO - remove this +/*void iface_break(void) +{ + if(nrf_usb_iface == 2) + { + int i = 0; + i += 0x1F1; + } +}*/ + /** * @name Integrated feeders and consumers * @@ -1966,7 +1979,7 @@ void nrf_drv_usbd_ep_disable(nrf_drv_usbd_ep_t ep) { // Mbed modification -- calling usbd_ep_abort on an ISO endpoint // causes an assert in the Nordic driver - if(ep != NRF_DRV_USBD_EPOUT8 && ep != NRF_DRV_USBD_EPIN8) + //if(ep != NRF_DRV_USBD_EPOUT8 && ep != NRF_DRV_USBD_EPIN8) usbd_ep_abort(ep); nrf_usbd_ep_disable(ep_to_hal(ep)); @@ -2258,16 +2271,24 @@ void nrf_drv_usbd_transfer_out_drop(nrf_drv_usbd_ep_t ep) { CRITICAL_REGION_ENTER(); m_ep_ready &= ~(1U << ep2bit(ep)); - *((volatile uint32_t *)(NRF_USBD_BASE + 0x800)) = 0x7C5 + (2u * NRF_USBD_EP_NR_GET(ep)); - *((volatile uint32_t *)(NRF_USBD_BASE + 0x804)) = 0; - UNUSED_VARIABLE(((volatile uint32_t *)(NRF_USBD_BASE + 0x804))); + // Mbed modification -- calling usbd_ep_abort on an ISO endpoint + // causes an assert in the Nordic driver + if(ep != NRF_DRV_USBD_EPOUT8 && ep != NRF_DRV_USBD_EPIN8) + { + *((volatile uint32_t *)(NRF_USBD_BASE + 0x800)) = 0x7C5 + (2u * NRF_USBD_EP_NR_GET(ep)); + *((volatile uint32_t *)(NRF_USBD_BASE + 0x804)) = 0; + UNUSED_VARIABLE(((volatile uint32_t *)(NRF_USBD_BASE + 0x804))); + } CRITICAL_REGION_EXIT(); } else { CRITICAL_REGION_ENTER(); m_ep_ready &= ~(1U << ep2bit(ep)); - nrf_usbd_epout_clear(ep); + // Mbed modification -- calling nrf_usbd_epout_clear on an ISO endpoint + // causes an assert in the Nordic driver + if(ep != NRF_DRV_USBD_EPOUT8 && ep != NRF_DRV_USBD_EPIN8) + nrf_usbd_epout_clear(ep); CRITICAL_REGION_EXIT(); } } diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index 6768d447649..bd26b7b94f4 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -64,7 +64,6 @@ static USBPhyHw *instance = 0; static void usbd_event_handler(nrf_drv_usbd_evt_t const * const p_event); static void power_usb_event_handler(nrf_drv_power_usb_evt_t event); -bool mbed_nrf_feeder_ep0(nrf_drv_usbd_ep_transfer_t * p_next, void * p_context, size_t ep_size); #if USBD_DEBUG @@ -74,6 +73,11 @@ static uint8_t debug_evt_index = 0; #endif +// TODO remove this -- for debugging purposes +int nrf_usb_iface = 0; +void usb_phy_interface_was_set(int iface) { nrf_usb_iface = iface; } + + USBPhy *get_usb_phy() { static USBPhyHw usbphy; return &usbphy; @@ -365,6 +369,10 @@ bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_ void USBPhyHw::endpoint_remove(usb_ep_t endpoint) { nrf_drv_usbd_ep_t nrf_ep = get_nordic_endpoint(endpoint); + // Reset data toggle for bulk/interrupt endpoints + if(nrf_ep != NRF_DRV_USBD_EPOUT8 && nrf_ep != NRF_DRV_USBD_EPIN8) + nrf_drv_usbd_ep_dtoggle_clear(nrf_ep); + nrf_drv_usbd_ep_disable(nrf_ep); } @@ -381,6 +389,10 @@ bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) { memset(transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); transfer->p_data.rx = data; transfer->size = size; + + //if(endpoint == 8) + // return true; + ret_code_t ret = nrf_drv_usbd_ep_transfer(get_nordic_endpoint(endpoint), transfer); return (ret == NRF_SUCCESS); } @@ -444,6 +456,10 @@ void USBPhyHw::process() { events->sof(usb_event.data.sof.framecnt); break; case NRF_DRV_USBD_EVT_EPTRANSFER: + if(nrf_usb_iface == 2 && usb_event.data.eptransfer.ep == NRF_DRV_USBD_EPOUT1) + { + while(true); + } if(usb_event.data.eptransfer.status == NRF_USBD_EP_OK) { if(IS_IN_EP(usb_event.data.eptransfer.ep)) From 15aff477aa3b9b178f3a9335af51006435c4d229 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Sat, 2 Feb 2019 11:22:55 -0500 Subject: [PATCH 420/488] Implemented USBPhyHw::unconfigure() as it was causing configuration changes to fail. Endpoints were not being removed properly in the Nordic driver --- .../drivers_nrf/usbd/nrf_drv_usbd.c | 2 +- .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 19 ++++++------------- 2 files changed, 7 insertions(+), 14 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c index d8188e64110..d99625a94b4 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c @@ -1980,7 +1980,7 @@ void nrf_drv_usbd_ep_disable(nrf_drv_usbd_ep_t ep) // Mbed modification -- calling usbd_ep_abort on an ISO endpoint // causes an assert in the Nordic driver //if(ep != NRF_DRV_USBD_EPOUT8 && ep != NRF_DRV_USBD_EPIN8) - usbd_ep_abort(ep); + usbd_ep_abort(ep); nrf_usbd_ep_disable(ep_to_hal(ep)); nrf_usbd_int_disable(nrf_drv_usbd_ep_to_int(ep)); diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index bd26b7b94f4..e31ecbcc9c4 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -73,11 +73,6 @@ static uint8_t debug_evt_index = 0; #endif -// TODO remove this -- for debugging purposes -int nrf_usb_iface = 0; -void usb_phy_interface_was_set(int iface) { nrf_usb_iface = iface; } - - USBPhy *get_usb_phy() { static USBPhyHw usbphy; return &usbphy; @@ -199,7 +194,8 @@ void USBPhyHw::configure() { } void USBPhyHw::unconfigure() { - // Not needed + // Remove all endpoints (except control, obviously) + nrf_drv_usbd_ep_default_config(); } void USBPhyHw::sof_enable() { @@ -419,8 +415,8 @@ bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) { void USBPhyHw::endpoint_abort(usb_ep_t endpoint) { nrf_drv_usbd_ep_t nrf_ep = get_nordic_endpoint(endpoint); // Don't call abort on ISO endpoints -- this will cause an ASSERT in the Nordic driver - if(nrf_ep != NRF_DRV_USBD_EPOUT8 && nrf_ep != NRF_DRV_USBD_EPIN8) - nrf_drv_usbd_ep_abort(nrf_ep); + //if(nrf_ep != NRF_DRV_USBD_EPOUT8 && nrf_ep != NRF_DRV_USBD_EPIN8) + nrf_drv_usbd_ep_abort(nrf_ep); } void USBPhyHw::process() { @@ -456,11 +452,8 @@ void USBPhyHw::process() { events->sof(usb_event.data.sof.framecnt); break; case NRF_DRV_USBD_EVT_EPTRANSFER: - if(nrf_usb_iface == 2 && usb_event.data.eptransfer.ep == NRF_DRV_USBD_EPOUT1) - { - while(true); - } - if(usb_event.data.eptransfer.status == NRF_USBD_EP_OK) + if(usb_event.data.eptransfer.status == NRF_USBD_EP_OK)// || + //usb_event.data.eptransfer.status == NRF_USBD_EP_WAITING) { if(IS_IN_EP(usb_event.data.eptransfer.ep)) { From f22ecd1bec9c081e30b3879dea0c2e2a177f6c23 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Sun, 3 Feb 2019 06:53:19 -0500 Subject: [PATCH 421/488] Added setup status enum and removed some old commented out code --- .../TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h | 6 ++++++ .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 10 ---------- 2 files changed, 6 insertions(+), 10 deletions(-) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h index c9e58e95919..684b84c20cf 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h @@ -77,6 +77,12 @@ class USBPhyHw : public USBPhy { USB_HW_EVENT_POWER = 2 } usb_hw_event_type_t; + typedef enum usb_hw_ctrl_stage_t { + USB_HW_CTRL_STAGE_SETUP = 0, + USB_HW_CTRL_STAGE_DATA = 1, + USB_HW_CTRL_STAGE_STATUS = 2 + } usb_hw_ctrl_stage_t; + // Event type to process usb_hw_event_type_t usb_event_type; diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index e31ecbcc9c4..d003891e049 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -280,16 +280,6 @@ void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) { transfer->p_data.rx = data; transfer->size = size; -// if((setup_total == 1) && ((setup_buf.bmRequestType & SETUP_TRANSFER_DIR_MASK) == 0)) -// { -// setup_remaining -= size; -// } -// else -// { -// // Update the number of bytes remaining in the setup data stage -// setup_remaining -= size; -// } - setup_remaining -= size; nrf_drv_usbd_setup_data_clear(); // tell the hardware to receive another OUT packet From be41352c7e5929abde6737729d009316ad4706af Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Sun, 3 Feb 2019 07:01:46 -0500 Subject: [PATCH 422/488] Removed a commented out code change --- .../TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c index d99625a94b4..23cfa0933bc 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c @@ -1977,9 +1977,6 @@ void nrf_drv_usbd_ep_enable(nrf_drv_usbd_ep_t ep) void nrf_drv_usbd_ep_disable(nrf_drv_usbd_ep_t ep) { - // Mbed modification -- calling usbd_ep_abort on an ISO endpoint - // causes an assert in the Nordic driver - //if(ep != NRF_DRV_USBD_EPOUT8 && ep != NRF_DRV_USBD_EPIN8) usbd_ep_abort(ep); nrf_usbd_ep_disable(ep_to_hal(ep)); From 57b1e43e3411512e70e16bb78194889feaa14132 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Sat, 9 Feb 2019 07:29:49 -0500 Subject: [PATCH 423/488] Trying virtual status stage and generated interrupt --- .../TARGET_MCU_NRF52840/USBPhyHw.h | 9 - .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 157 ++++++++---------- 2 files changed, 69 insertions(+), 97 deletions(-) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h index 684b84c20cf..1417117c45c 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h @@ -77,12 +77,6 @@ class USBPhyHw : public USBPhy { USB_HW_EVENT_POWER = 2 } usb_hw_event_type_t; - typedef enum usb_hw_ctrl_stage_t { - USB_HW_CTRL_STAGE_SETUP = 0, - USB_HW_CTRL_STAGE_DATA = 1, - USB_HW_CTRL_STAGE_STATUS = 2 - } usb_hw_ctrl_stage_t; - // Event type to process usb_hw_event_type_t usb_event_type; @@ -95,9 +89,6 @@ class USBPhyHw : public USBPhy { // Buffer to hold setup packet nrf_drv_usbd_setup_t setup_buf; - // Setup bytes remaining - uint32_t setup_remaining; - // Nordic transfer structures for each in/out endpoint nrf_drv_usbd_transfer_t transfer_buf[18]; diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index d003891e049..1fec148f068 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -60,8 +60,13 @@ // Nordic USBD driver IRQ handler extern "C" void USBD_IRQHandler(void); +// Internal USBD driver IRQ handler +void USBD_HAL_IRQHandler(void); + static USBPhyHw *instance = 0; +static bool virtual_status_xfer_event; + static void usbd_event_handler(nrf_drv_usbd_evt_t const * const p_event); static void power_usb_event_handler(nrf_drv_power_usb_evt_t event); @@ -118,6 +123,8 @@ void USBPhyHw::init(USBPhyEvents *events) { // Store a reference to this instance instance = this; + virtual_status_xfer_event = false; + /* * TODO - Configure ISOIN endpoint to respond with ZLP when * no data is ready to be sent @@ -128,7 +135,8 @@ void USBPhyHw::init(USBPhyEvents *events) { NRF_USBD->ISOINCONFIG |= 0x01; // set RESPONSE to 1 (respond with ZLP) // Enable IRQ - NVIC_SetVector(USBD_IRQn, (uint32_t)USBD_IRQHandler); + //NVIC_SetVector(USBD_IRQn, (uint32_t)USBD_IRQHandler); + NVIC_SetVector(USBD_IRQn, (uint32_t)USBD_HAL_IRQHandler); //NVIC_SetPriority(USBD_IRQn, 7); //NVIC_EnableIRQ(USBD_IRQn); // This is handled by the Nordic driver } @@ -275,19 +283,32 @@ void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) { } void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) { + + // Check for status stage + if(data == NULL && size == 0) + { + // If the data stage transfer direction was OUT + if(setup_buf.bmRequestType & SETUP_TRANSFER_DIR_MASK) + { + // This is the status stage -- trigger the status task and notify the Mbed stack + nrf_usbd_task_trigger(NRF_USBD_TASK_EP0STATUS); + virtual_status_xfer_event = true; + + // The status stage flag will be handled during the next interrupt + NVIC_SetPendingIRQ(USBD_IRQn); + + //events->ep0_out(); + return; + } + } + nrf_drv_usbd_transfer_t* transfer = get_transfer_buffer((usb_ep_t)(NRF_DRV_USBD_EPOUT0)); memset(transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); transfer->p_data.rx = data; transfer->size = size; - setup_remaining -= size; - nrf_drv_usbd_setup_data_clear(); // tell the hardware to receive another OUT packet - // Check if this is the last chunk - if(setup_remaining == 0) - nrf_usbd_shorts_enable(NRF_USBD_SHORT_EP0DATADONE_EP0STATUS_MASK); // if it is, go to status stage next - nrf_drv_usbd_ep_transfer(NRF_DRV_USBD_EPOUT0, transfer); } @@ -297,52 +318,38 @@ uint32_t USBPhyHw::ep0_read_result() { void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) { - // If the transfer size is 0 and - // the setup packet request size was 0, - // enter the status stage immediately - if(size == 0 && setup_buf.wLength == 0) + // Check for status stage + if(buffer == NULL && size == 0) { - nrf_drv_usbd_setup_clear(); - } + // If the requested size was 0 OR the data stage transfer direction was OUT + if(setup_buf.wLength == 0 + || ((setup_buf.bmRequestType & SETUP_TRANSFER_DIR_MASK) == 0)) + { + // This is the status stage -- trigger the status task and notify the Mbed stack + nrf_usbd_task_trigger(NRF_USBD_TASK_EP0STATUS); + virtual_status_xfer_event = true; + + // The status stage flag will be handled during the next interrupt + //NVIC_SetPendingIRQ(USBD_IRQn); - // TODO - this function should check what stage the control transfer - // is in before enabling shorts or triggering events. - // During the status stage ep0_write is called with size=0 - // ZLP arguments. See note below: + //events->ep0_in(); + return; + } + } nrf_drv_usbd_transfer_t* transfer = get_transfer_buffer(NRF_DRV_USBD_EPIN0); memset(transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); transfer->p_data.tx = buffer; transfer->size = size; - // If this is a zero-length-packet (ZLP) - // Set the ZLP flag if(size == 0) transfer->flags |= NRF_DRV_USBD_TRANSFER_ZLP_FLAG; - // Update the number of bytes remaining in the setup data stage - setup_remaining -= size; - - // Check if this is the last chunk, conditions: - // 1: the remaining bytes will be 0 - // OR 2: the transfer size is < ep max size (including 0, short packet) - size_t ep_size = nrf_drv_usbd_ep_max_packet_size_get(NRF_DRV_USBD_EPIN0); - if((setup_remaining == 0) || (size < ep_size)) - { - // Enter status stage after next DMA transfer completes - nrf_usbd_shorts_enable(NRF_USBD_SHORT_EP0DATADONE_EP0STATUS_MASK); - } - nrf_drv_usbd_ep_transfer(NRF_DRV_USBD_EPIN0, transfer); } void USBPhyHw::ep0_stall() { // Note: This stall must be automatically cleared by the next setup packet - // Hardware appears to take care of this - // See nRF52840 product specification section 6.35.8 - - // Update: Above assumption seems incorrect - // Added in EP0 stall clears in the setup packet event handler nrf_drv_usbd_setup_stall(); } @@ -376,9 +383,6 @@ bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) { transfer->p_data.rx = data; transfer->size = size; - //if(endpoint == 8) - // return true; - ret_code_t ret = nrf_drv_usbd_ep_transfer(get_nordic_endpoint(endpoint), transfer); return (ret == NRF_SUCCESS); } @@ -410,18 +414,18 @@ void USBPhyHw::endpoint_abort(usb_ep_t endpoint) { } void USBPhyHw::process() { - // No valid event to process - if (usb_event_type == USB_HW_EVENT_NONE) - return; - else if (usb_event_type == USB_HW_EVENT_USBD) { -#if USBD_DEBUG - // Save this event to the static log - memcpy(&debug_events[debug_evt_index++], &usb_event, sizeof(nrf_drv_usbd_evt_t)); - // Reset index if we overflow the buffer - if(debug_evt_index >= 32) - debug_evt_index = 0; -#endif + // Process virtual status transfers + if(virtual_status_xfer_event) + { + virtual_status_xfer_event = false; + // Notify Mbed stack of status stage transfer completion + if(setup_buf.bmRequestType & SETUP_TRANSFER_DIR_MASK) // DATA IN transfer, Status OUT transfer + events->ep0_out(); + else // DATA OUT transfer, Status IN transfer + events->ep0_in(); + } + else if (usb_event_type == USB_HW_EVENT_USBD) { // Process regular USBD events switch (usb_event.type) { @@ -442,8 +446,7 @@ void USBPhyHw::process() { events->sof(usb_event.data.sof.framecnt); break; case NRF_DRV_USBD_EVT_EPTRANSFER: - if(usb_event.data.eptransfer.status == NRF_USBD_EP_OK)// || - //usb_event.data.eptransfer.status == NRF_USBD_EP_WAITING) + if(usb_event.data.eptransfer.status == NRF_USBD_EP_OK) { if(IS_IN_EP(usb_event.data.eptransfer.ep)) { @@ -455,29 +458,9 @@ void USBPhyHw::process() { else { if((usb_event.data.eptransfer.ep & 0x7F) == 0) - { - /* NOTE: Data values or size may be tested here to decide if clear or stall. - * If errata 154 is present the data transfer is acknowledged by the hardware. */ -// if (!nrf_drv_usbd_errata_154()) { -// /* Transfer ok - allow status stage */ -// nrf_drv_usbd_setup_clear(); -// } - events->ep0_out(); - } else - { - // TODO - this may impact valid ZLP transfers - // on the ISOOUT endpoint - // If ISOOUT endpoint transaction occurred - // and the ZERO bit of SIZE.ISOOUT is set... - // ignore it for now... possible hardware bug? -// if((usb_event.data.eptransfer.ep == NRF_DRV_USBD_EPOUT8) -// && (NRF_USBD->SIZE.ISOOUT & (1 << 16))) -// break; - events->out((usb_ep_t) usb_event.data.eptransfer.ep); - } } } break; @@ -488,18 +471,6 @@ void USBPhyHw::process() { // Copy the setup packet into the internal buffer nrf_drv_usbd_setup_get(&setup_buf); - // Reset the remaining setup data length - setup_remaining = setup_buf.wLength; - - // Skip data stage, go straight to status stage -// if(setup_buf.wLength == 0) { -// nrf_drv_usbd_setup_clear(); -// } -// else if((setup_buf.bmRequestType & SETUP_TRANSFER_DIR_MASK) == 0) { -// // HOST->DEVICE transfer, need to notify hardware of Data OUT stage -// nrf_drv_usbd_setup_data_clear(); -// } - // Notify the Mbed stack events->ep0_setup(); } @@ -524,10 +495,8 @@ void USBPhyHw::process() { events->power(false); break; case NRF_DRV_POWER_USB_EVT_READY: - //if(this->connect_enabled) { // Not really necessary (only happens after enabled) if(!nrf_drv_usbd_is_started()) nrf_drv_usbd_start(true); - //} break; default: ASSERT(false); @@ -538,7 +507,6 @@ void USBPhyHw::process() { usb_event_type = USB_HW_EVENT_NONE; // Re-enable interrupt - //NVIC_ClearPendingIRQ(USBD_IRQn); enable_usb_interrupts(); } @@ -615,3 +583,16 @@ static void usbd_event_handler(nrf_drv_usbd_evt_t const * const p_event) { instance->_usb_event_handler(p_event); } } + +void USBD_HAL_IRQHandler(void) +{ + // Process the virtual status stage transfer event + if(virtual_status_xfer_event) + { + // Trigger a dummy event handler + nrf_drv_usbd_evt_t dummy; + usbd_event_handler(&dummy); + } + // Call Nordic driver IRQ handler + USBD_IRQHandler(); +} From 429427a0cca5e368c4354c3bccd9a421c05c8559 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Thu, 21 Feb 2019 21:02:10 -0500 Subject: [PATCH 424/488] Added simulated status stage interrupt --- .../TARGET_MCU_NRF52840/USBPhyHw.h | 4 +- .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 86 ++++++++++++++----- 2 files changed, 67 insertions(+), 23 deletions(-) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h index 1417117c45c..a6d2ff9473a 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h @@ -64,6 +64,7 @@ class USBPhyHw : public USBPhy { static void _usb_event_handler(nrf_drv_usbd_evt_t const * const p_event); static void _usb_power_event_handler(nrf_drv_power_usb_evt_t event); + static void _usb_virtual_status_event_handler(void); private: USBPhyEvents *events; @@ -74,7 +75,8 @@ class USBPhyHw : public USBPhy { typedef enum usb_hw_event_type_t { USB_HW_EVENT_NONE = 0, USB_HW_EVENT_USBD = 1, - USB_HW_EVENT_POWER = 2 + USB_HW_EVENT_POWER = 2, + USB_HW_EVENT_VIRTUAL_STATUS = 3 } usb_hw_event_type_t; // Event type to process diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index 1fec148f068..90d9025f4d6 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -65,7 +65,7 @@ void USBD_HAL_IRQHandler(void); static USBPhyHw *instance = 0; -static bool virtual_status_xfer_event; +static volatile bool virtual_status_xfer_event; static void usbd_event_handler(nrf_drv_usbd_evt_t const * const p_event); static void power_usb_event_handler(nrf_drv_power_usb_evt_t event); @@ -291,13 +291,18 @@ void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) { if(setup_buf.bmRequestType & SETUP_TRANSFER_DIR_MASK) { // This is the status stage -- trigger the status task and notify the Mbed stack - nrf_usbd_task_trigger(NRF_USBD_TASK_EP0STATUS); + // Don't trigger status stage unless endpoint is not busy! + // (Causes an undocumented hardware-initiated stall on the control endpoint) + if(nrf_drv_usbd_ep_is_busy(NRF_DRV_USBD_EPIN0)) + nrf_usbd_shorts_enable(NRF_USBD_SHORT_EP0DATADONE_EP0STATUS_MASK); + else + nrf_usbd_task_trigger(NRF_USBD_TASK_EP0STATUS); + virtual_status_xfer_event = true; - // The status stage flag will be handled during the next interrupt + // Trigger an interrupt to process the virtual status event NVIC_SetPendingIRQ(USBD_IRQn); - //events->ep0_out(); return; } } @@ -325,14 +330,21 @@ void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) { if(setup_buf.wLength == 0 || ((setup_buf.bmRequestType & SETUP_TRANSFER_DIR_MASK) == 0)) { + // This is the status stage -- trigger the status task and notify the Mbed stack - nrf_usbd_task_trigger(NRF_USBD_TASK_EP0STATUS); + + // Don't trigger status stage unless endpoint is not busy! + // (Causes an undocumented hardware-initiated stall on the control endpoint) + if(nrf_drv_usbd_ep_is_busy(NRF_DRV_USBD_EPOUT0)) + nrf_usbd_shorts_enable(NRF_USBD_SHORT_EP0DATADONE_EP0STATUS_MASK); + else + nrf_usbd_task_trigger(NRF_USBD_TASK_EP0STATUS); + virtual_status_xfer_event = true; - // The status stage flag will be handled during the next interrupt - //NVIC_SetPendingIRQ(USBD_IRQn); + // Trigger an interrupt to process the virtual status event + NVIC_SetPendingIRQ(USBD_IRQn); - //events->ep0_in(); return; } } @@ -415,17 +427,7 @@ void USBPhyHw::endpoint_abort(usb_ep_t endpoint) { void USBPhyHw::process() { - // Process virtual status transfers - if(virtual_status_xfer_event) - { - virtual_status_xfer_event = false; - // Notify Mbed stack of status stage transfer completion - if(setup_buf.bmRequestType & SETUP_TRANSFER_DIR_MASK) // DATA IN transfer, Status OUT transfer - events->ep0_out(); - else // DATA OUT transfer, Status IN transfer - events->ep0_in(); - } - else if (usb_event_type == USB_HW_EVENT_USBD) { + if (usb_event_type == USB_HW_EVENT_USBD) { // Process regular USBD events switch (usb_event.type) { @@ -451,14 +453,36 @@ void USBPhyHw::process() { if(IS_IN_EP(usb_event.data.eptransfer.ep)) { if((usb_event.data.eptransfer.ep & 0x7F) == 0) + { events->ep0_in(); + // Check for pending virtual status transfer + if(virtual_status_xfer_event) + { + // Notify the upper stack that the status transfer is done + // as well at this point + virtual_status_xfer_event = false; + events->ep0_out(); + + } + } else events->in((usb_ep_t) usb_event.data.eptransfer.ep); } else { if((usb_event.data.eptransfer.ep & 0x7F) == 0) + { events->ep0_out(); + + // Check for pending virtual status transfer + if(virtual_status_xfer_event) + { + // Notify the upper stack that the status transfer is done + // as well at this point + virtual_status_xfer_event = false; + events->ep0_in(); + } + } else events->out((usb_ep_t) usb_event.data.eptransfer.ep); } @@ -502,6 +526,14 @@ void USBPhyHw::process() { ASSERT(false); } } + else if (usb_event_type == USB_HW_EVENT_VIRTUAL_STATUS) + { + // Notify Mbed stack of status stage transfer completion + if(setup_buf.bmRequestType & SETUP_TRANSFER_DIR_MASK) // DATA IN transfer, Status OUT transfer + events->ep0_out(); + else // DATA OUT transfer, Status IN transfer + events->ep0_in(); + } // Unflag the event type usb_event_type = USB_HW_EVENT_NONE; @@ -529,6 +561,14 @@ void USBPhyHw::_usb_power_event_handler(nrf_drv_power_usb_evt_t event) { instance->events->start_process(); } +void USBPhyHw::_usb_virtual_status_event_handler(void) { + disable_usb_interrupts(); + + // Tell the upper layers of the stack to process the event + instance->usb_event_type = USB_HW_EVENT_VIRTUAL_STATUS; + instance->events->start_process(); +} + nrf_drv_usbd_transfer_t* USBPhyHw::get_transfer_buffer(usb_ep_t endpoint) { // Index is base endpoint number * 2 (output), add 1 for input endpoints return &transfer_buf[(((endpoint & 0x7F) << 1) + ((endpoint & 0x80) >> 7))]; @@ -589,9 +629,11 @@ void USBD_HAL_IRQHandler(void) // Process the virtual status stage transfer event if(virtual_status_xfer_event) { - // Trigger a dummy event handler - nrf_drv_usbd_evt_t dummy; - usbd_event_handler(&dummy); + if(instance) { + instance->_usb_virtual_status_event_handler(); + } + + virtual_status_xfer_event = false; } // Call Nordic driver IRQ handler USBD_IRQHandler(); From 9589165a0f99b26ec6a04aed1187deb2eec84259 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Thu, 21 Feb 2019 21:12:19 -0500 Subject: [PATCH 425/488] Added a return from the virtual status transfer software-triggered interrupt. Not entirely sure this is appropriate. --- .../targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index 90d9025f4d6..92513240c2c 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -634,6 +634,7 @@ void USBD_HAL_IRQHandler(void) } virtual_status_xfer_event = false; + return; } // Call Nordic driver IRQ handler USBD_IRQHandler(); From 6d6324d6821526abababfb7387b55d17a1cff3de Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Thu, 21 Feb 2019 21:36:42 -0500 Subject: [PATCH 426/488] Ignore events that happen when an endpoint is stalled/halted --- .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 53 ++++++++++--------- 1 file changed, 28 insertions(+), 25 deletions(-) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index 92513240c2c..5d2301ee18d 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -450,41 +450,44 @@ void USBPhyHw::process() { case NRF_DRV_USBD_EVT_EPTRANSFER: if(usb_event.data.eptransfer.status == NRF_USBD_EP_OK) { - if(IS_IN_EP(usb_event.data.eptransfer.ep)) + if(!nrf_drv_usbd_ep_stall_check(usb_event.data.eptransfer.ep)) { - if((usb_event.data.eptransfer.ep & 0x7F) == 0) + if(IS_IN_EP(usb_event.data.eptransfer.ep)) { - events->ep0_in(); - // Check for pending virtual status transfer - if(virtual_status_xfer_event) + if((usb_event.data.eptransfer.ep & 0x7F) == 0) { - // Notify the upper stack that the status transfer is done - // as well at this point - virtual_status_xfer_event = false; - events->ep0_out(); - + events->ep0_in(); + // Check for pending virtual status transfer + if(virtual_status_xfer_event) + { + // Notify the upper stack that the status transfer is done + // as well at this point + virtual_status_xfer_event = false; + events->ep0_out(); + + } } + else + events->in((usb_ep_t) usb_event.data.eptransfer.ep); } else - events->in((usb_ep_t) usb_event.data.eptransfer.ep); - } - else - { - if((usb_event.data.eptransfer.ep & 0x7F) == 0) { - events->ep0_out(); - - // Check for pending virtual status transfer - if(virtual_status_xfer_event) + if((usb_event.data.eptransfer.ep & 0x7F) == 0) { - // Notify the upper stack that the status transfer is done - // as well at this point - virtual_status_xfer_event = false; - events->ep0_in(); + events->ep0_out(); + + // Check for pending virtual status transfer + if(virtual_status_xfer_event) + { + // Notify the upper stack that the status transfer is done + // as well at this point + virtual_status_xfer_event = false; + events->ep0_in(); + } } + else + events->out((usb_ep_t) usb_event.data.eptransfer.ep); } - else - events->out((usb_ep_t) usb_event.data.eptransfer.ep); } } break; From 828d459b48148480baf5433d8d0c08065cd6e387 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Mon, 25 Feb 2019 07:57:28 -0500 Subject: [PATCH 427/488] Added workaround in for Errata 199 --- .../drivers_nrf/usbd/nrf_drv_usbd.c | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c index 23cfa0933bc..2438d3a79a5 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c @@ -766,6 +766,9 @@ static inline nrf_drv_usbd_ep_t bit2ep(uint8_t bitpos) */ static inline void usbd_dma_start(nrf_drv_usbd_ep_t ep) { + // Workaround for errata 199 (USBD cannot receive tasks during DMA) + *(volatile uint32_t *)0x40027C1C = 0x00000082; + nrf_usbd_task_trigger(task_start_ep(ep)); } @@ -907,6 +910,9 @@ static void ev_started_handler(void) */ static inline void nrf_usbd_ep0in_dma_handler(void) { + // Workaround for errata 199 (USBD cannot receive tasks during DMA) + *(volatile uint32_t *)0x40027C1C = 0x00000000; + const nrf_drv_usbd_ep_t ep = NRF_DRV_USBD_EPIN0; NRF_LOG_DEBUG("USB event: DMA ready IN0"); m_dma_pending = 0; @@ -938,6 +944,8 @@ static inline void nrf_usbd_ep0in_dma_handler(void) */ static inline void nrf_usbd_epin_dma_handler(nrf_drv_usbd_ep_t ep) { + // Workaround for errata 199 (USBD cannot receive tasks during DMA) + *(volatile uint32_t *)0x40027C1C = 0x00000000; NRF_LOG_DEBUG("USB event: DMA ready IN: %x", ep); ASSERT(NRF_USBD_EPIN_CHECK(ep)); @@ -968,6 +976,9 @@ static inline void nrf_usbd_epin_dma_handler(nrf_drv_usbd_ep_t ep) */ static inline void nrf_usbd_epiniso_dma_handler(nrf_drv_usbd_ep_t ep) { + // Workaround for errata 199 (USBD cannot receive tasks during DMA) + *(volatile uint32_t *)0x40027C1C = 0x00000000; + if (NRF_USBD_ISO_DEBUG) { NRF_LOG_DEBUG("USB event: DMA ready ISOIN: %x", ep); @@ -1003,6 +1014,9 @@ static inline void nrf_usbd_epiniso_dma_handler(nrf_drv_usbd_ep_t ep) */ static inline void nrf_usbd_ep0out_dma_handler(void) { + // Workaround for errata 199 (USBD cannot receive tasks during DMA) + *(volatile uint32_t *)0x40027C1C = 0x00000000; + const nrf_drv_usbd_ep_t ep = NRF_DRV_USBD_EPOUT0; NRF_LOG_DEBUG("USB event: DMA ready OUT0"); m_dma_pending = 0; @@ -1039,6 +1053,9 @@ static inline void nrf_usbd_ep0out_dma_handler(void) */ static inline void nrf_usbd_epout_dma_handler(nrf_drv_usbd_ep_t ep) { + // Workaround for errata 199 (USBD cannot receive tasks during DMA) + *(volatile uint32_t *)0x40027C1C = 0x00000000; + NRF_LOG_DEBUG("USB drv: DMA ready OUT: %x", ep); ASSERT(NRF_USBD_EPOUT_CHECK(ep)); ASSERT(!NRF_USBD_EPISO_CHECK(ep)); @@ -1077,6 +1094,9 @@ static inline void nrf_usbd_epout_dma_handler(nrf_drv_usbd_ep_t ep) static inline void nrf_usbd_epoutiso_dma_handler(nrf_drv_usbd_ep_t ep) { + // Workaround for errata 199 (USBD cannot receive tasks during DMA) + *(volatile uint32_t *)0x40027C1C = 0x00000000; + if (NRF_USBD_ISO_DEBUG) { NRF_LOG_DEBUG("USB drv: DMA ready ISOOUT: %x", ep); From e36c97e0f31c36be6b21d0adce3b299509236c53 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Mon, 25 Feb 2019 07:58:04 -0500 Subject: [PATCH 428/488] Added in flag for preventing double IRQ triggering and added asserts for Nordic driver calls --- .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 28 ++++++++++++++----- 1 file changed, 21 insertions(+), 7 deletions(-) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index 5d2301ee18d..b82d2552cc7 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -17,6 +17,7 @@ #include "USBPhyHw.h" #include "platform/mbed_critical.h" +#include "platform/mbed_assert.h" #include "nrf_clock.h" @@ -66,6 +67,7 @@ void USBD_HAL_IRQHandler(void); static USBPhyHw *instance = 0; static volatile bool virtual_status_xfer_event; +static volatile bool irq_already_pending; static void usbd_event_handler(nrf_drv_usbd_evt_t const * const p_event); static void power_usb_event_handler(nrf_drv_power_usb_evt_t event); @@ -104,17 +106,18 @@ void USBPhyHw::init(USBPhyEvents *events) { // Initialize power module to track USB Power events ret = nrf_drv_power_init(NULL); - APP_ERROR_CHECK(ret); + MBED_ASSERT(ret == NRF_SUCCESS); + // Register callback for USB Power events static const nrf_drv_power_usbevt_config_t config = { .handler = power_usb_event_handler }; ret = nrf_drv_power_usbevt_init(&config); - APP_ERROR_CHECK(ret); + MBED_ASSERT(ret == NRF_SUCCESS); // Initialize USB Device driver ret = nrf_drv_usbd_init(usbd_event_handler); - APP_ERROR_CHECK(ret); + MBED_ASSERT(ret == NRF_SUCCESS); /* Configure selected size of the packed on EP0 */ nrf_drv_usbd_ep_max_packet_size_set(NRF_DRV_USBD_EPOUT0, MAX_PACKET_SIZE_SETUP); @@ -124,6 +127,7 @@ void USBPhyHw::init(USBPhyEvents *events) { instance = this; virtual_status_xfer_event = false; + irq_already_pending = false; /* * TODO - Configure ISOIN endpoint to respond with ZLP when @@ -146,7 +150,7 @@ void USBPhyHw::deinit() { disconnect(); // Disable the USB Device driver ret_code_t ret = nrf_drv_usbd_uninit(); - APP_ERROR_CHECK(ret); + MBED_ASSERT(ret == NRF_SUCCESS); //NVIC_DisableIRQ(USBD_IRQn); // This is handled by the Nordic driver // Disable the power peripheral driver @@ -300,6 +304,8 @@ void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) { virtual_status_xfer_event = true; + irq_already_pending = NVIC_GetPendingIRQ(USBD_IRQn); + // Trigger an interrupt to process the virtual status event NVIC_SetPendingIRQ(USBD_IRQn); @@ -314,7 +320,8 @@ void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) { nrf_drv_usbd_setup_data_clear(); // tell the hardware to receive another OUT packet - nrf_drv_usbd_ep_transfer(NRF_DRV_USBD_EPOUT0, transfer); + ret_code_t ret = nrf_drv_usbd_ep_transfer(NRF_DRV_USBD_EPOUT0, transfer); + MBED_ASSERT(ret == NRF_SUCCESS); } uint32_t USBPhyHw::ep0_read_result() { @@ -342,6 +349,8 @@ void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) { virtual_status_xfer_event = true; + irq_already_pending = NVIC_GetPendingIRQ(USBD_IRQn); + // Trigger an interrupt to process the virtual status event NVIC_SetPendingIRQ(USBD_IRQn); @@ -357,7 +366,8 @@ void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) { if(size == 0) transfer->flags |= NRF_DRV_USBD_TRANSFER_ZLP_FLAG; - nrf_drv_usbd_ep_transfer(NRF_DRV_USBD_EPIN0, transfer); + ret_code_t ret = nrf_drv_usbd_ep_transfer(NRF_DRV_USBD_EPIN0, transfer); + MBED_ASSERT(ret == NRF_SUCCESS); } void USBPhyHw::ep0_stall() { @@ -637,7 +647,11 @@ void USBD_HAL_IRQHandler(void) } virtual_status_xfer_event = false; - return; + + if(!irq_already_pending) + return; + + irq_already_pending = false; } // Call Nordic driver IRQ handler USBD_IRQHandler(); From c4220c9c1128342f75ae28cac00ccdb5b763e5c0 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Thu, 28 Feb 2019 08:34:02 -0500 Subject: [PATCH 429/488] -- Added fixes for errata 171, 187, 199, and 200 from SDK15.3 -- Added change that fully aborts an IN transfer that has already been loaded over EasyDMA -- Added in a few other small changes from SDK15.3 --- .../drivers_nrf/hal/nrf_usbd.h | 33 ++ .../drivers_nrf/usbd/nrf_drv_usbd.c | 303 +++++++++++------- .../drivers_nrf/usbd/nrf_drv_usbd_errata.h | 99 +++--- 3 files changed, 271 insertions(+), 164 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_usbd.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_usbd.h index 8905788db00..ee02d673a66 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_usbd.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_usbd.h @@ -658,6 +658,15 @@ typedef enum NRF_USBD_ISOSPLIT_Half = USBD_ISOSPLIT_SPLIT_HalfIN, /**< Buffer divided in half */ }nrf_usbd_isosplit_t; +/** + * @brief ISOINCONFIG configurations + */ +typedef enum +{ + NRF_USBD_ISOINCONFIG_NORESP = USBD_ISOINCONFIG_RESPONSE_NoResp, /**< Endpoint does not respond to an ISO IN token when no data is ready */ + NRF_USBD_ISOINCONFIG_ZERODATA = USBD_ISOINCONFIG_RESPONSE_ZeroData, /**< Endpoint responds with a zero-length data packet to an ISO IN token when no data is ready */ +}nrf_drv_usbd_isoinconfig_t; + /** * @brief Function for enabling USBD */ @@ -996,6 +1005,20 @@ __STATIC_INLINE void nrf_usbd_lowpower_disable(void); */ __STATIC_INLINE bool nrf_usbd_lowpower_check(void); +/** + * @brief Function for configuring ISO IN endpoint response to an IN token when no data is ready to be sent. + * + * @param config Required configuration + */ +__STATIC_INLINE void nrf_usbd_isoinconfig_set(nrf_drv_usbd_isoinconfig_t config); + +/** + * @brief Function for getting the cofiguration of ISO IN endpoint response to an IN token when no data is ready to be sent. + * + * @return Current configuration + */ +__STATIC_INLINE nrf_drv_usbd_isoinconfig_t nrf_usbd_isoinconfig_get(void); + /** * @brief Function for configuring EasyDMA channel * @@ -1355,6 +1378,16 @@ bool nrf_usbd_lowpower_check(void) return (NRF_USBD->LOWPOWER != (USBD_LOWPOWER_LOWPOWER_ForceNormal << USBD_LOWPOWER_LOWPOWER_Pos)); } +void nrf_usbd_isoinconfig_set(nrf_drv_usbd_isoinconfig_t config) +{ + NRF_USBD->ISOINCONFIG = ((uint32_t)config) << USBD_ISOINCONFIG_RESPONSE_Pos; +} + +nrf_drv_usbd_isoinconfig_t nrf_usbd_isoinconfig_get(void) +{ + return (nrf_drv_usbd_isoinconfig_t) + (((NRF_USBD->ISOINCONFIG) & USBD_ISOINCONFIG_RESPONSE_Msk) >> USBD_ISOINCONFIG_RESPONSE_Pos); +} void nrf_usbd_ep_easydma_set(uint8_t ep, uint32_t ptr, uint32_t maxcnt) { diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c index 2438d3a79a5..72cb5646f96 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c @@ -160,6 +160,13 @@ NRF_LOG_MODULE_REGISTER(); */ #define USBD_EPOUT_BIT_MASK (0xFFFFU << USBD_EPOUT_BITPOS_0) +/** + * @brief Isochronous endpoint bit mask + */ +#define USBD_EPISO_BIT_MASK \ + ((1U << NRF_USBD_EP_BITPOS(NRF_USBD_EPOUT8)) | \ + (1U << NRF_USBD_EP_BITPOS(NRF_USBD_EPIN8))) + /** * @brief Auxiliary macro to change EP number into bit position * @@ -226,9 +233,6 @@ STATIC_ASSERT(USBD_EP_BITPOS(NRF_DRV_USBD_EPOUT7) == USBD_EPDATASTATUS_EPOUT7_Po #define USBD_DRV_REQUESTTYPE_DIR_IN (1U << USBD_DRV_REQUESTTYPE_DIR_BITPOS) /** @} */ -// TODO remove this -extern int nrf_usb_iface; - /** * @brief Current driver state */ @@ -466,16 +470,6 @@ static inline uint32_t nrf_drv_usbd_ep_to_int(nrf_drv_usbd_ep_t ep) return 1UL << (NRF_USBD_EPIN_CHECK(ep) ? epin_bitpos : epout_bitpos)[NRF_USBD_EP_NR_GET(ep)]; } -// TODO - remove this -/*void iface_break(void) -{ - if(nrf_usb_iface == 2) - { - int i = 0; - i += 0x1F1; - } -}*/ - /** * @name Integrated feeders and consumers * @@ -755,7 +749,37 @@ static inline nrf_drv_usbd_ep_t bit2ep(uint8_t bitpos) } /** - * @brief Start selected EasyDMA transmission + * @brief Mark that EasyDMA is working. + * + * Internal function to set the flag informing about EasyDMA transfer pending. + * This function is called always just after the EasyDMA transfer is started. + */ +static inline void usbd_dma_pending_set(void) +{ + if (nrf_drv_usbd_errata_199()) + { + *((volatile uint32_t *)0x40027C1C) = 0x00000082; + } + m_dma_pending = true; +} + +/** + * @brief Mark that EasyDMA is free. + * + * Internal function to clear the flag informing about EasyDMA transfer pending. + * This function is called always just after the finished EasyDMA transfer is detected. + */ +static inline void usbd_dma_pending_clear(void) +{ + if (nrf_drv_usbd_errata_199()) + { + *((volatile uint32_t *)0x40027C1C) = 0x00000000; + } + m_dma_pending = false; +} + +/** + * @brief Start selected EasyDMA transmission. * * This is internal auxiliary function. * No checking is made if EasyDMA is ready for new transmission. @@ -766,12 +790,19 @@ static inline nrf_drv_usbd_ep_t bit2ep(uint8_t bitpos) */ static inline void usbd_dma_start(nrf_drv_usbd_ep_t ep) { - // Workaround for errata 199 (USBD cannot receive tasks during DMA) - *(volatile uint32_t *)0x40027C1C = 0x00000082; - nrf_usbd_task_trigger(task_start_ep(ep)); } +void nrf_drv_usbd_isoinconfig_set(nrf_drv_usbd_isoinconfig_t config) +{ + nrf_usbd_isoinconfig_set(config); +} + +nrf_drv_usbd_isoinconfig_t nrf_drv_usbd_isoinconfig_get(void) +{ + return nrf_usbd_isoinconfig_get(); +} + /** * @brief Abort pending transfer on selected endpoint * @@ -811,6 +842,26 @@ static inline void usbd_ep_abort(nrf_drv_usbd_ep_t ep) } else { + if(!NRF_USBD_EPISO_CHECK(ep)) + { + /* Workaround: Disarm the endpoint if there is any data buffered. */ + if(ep != NRF_DRV_USBD_EPIN0) + { + *((volatile uint32_t *)(NRF_USBD_BASE + 0x800)) = 0x7B6 + (2u * (NRF_USBD_EP_NR_GET(ep) - 1)); + uint8_t temp = *((volatile uint32_t *)(NRF_USBD_BASE + 0x804)); + temp |= (1U << 1); + *((volatile uint32_t *)(NRF_USBD_BASE + 0x804)) |= temp; + (void)(*((volatile uint32_t *)(NRF_USBD_BASE + 0x804))); + } + else + { + *((volatile uint32_t *)(NRF_USBD_BASE + 0x800)) = 0x7B4; + uint8_t temp = *((volatile uint32_t *)(NRF_USBD_BASE + 0x804)); + temp |= (1U << 2); + *((volatile uint32_t *)(NRF_USBD_BASE + 0x804)) |= temp; + (void)(*((volatile uint32_t *)(NRF_USBD_BASE + 0x804))); + } + } if ((m_ep_dma_waiting | (~m_ep_ready)) & (1U << ep2bit(ep))) { /* Device -> Host */ @@ -843,7 +894,10 @@ static void usbd_ep_abort_all(void) while (0 != ep_waiting) { uint8_t bitpos = __CLZ(__RBIT(ep_waiting)); - usbd_ep_abort(bit2ep(bitpos)); + if (!NRF_USBD_EPISO_CHECK(bit2ep(bitpos))) + { + usbd_ep_abort(bit2ep(bitpos)); + } ep_waiting &= ~(1U << bitpos); } @@ -910,12 +964,9 @@ static void ev_started_handler(void) */ static inline void nrf_usbd_ep0in_dma_handler(void) { - // Workaround for errata 199 (USBD cannot receive tasks during DMA) - *(volatile uint32_t *)0x40027C1C = 0x00000000; - const nrf_drv_usbd_ep_t ep = NRF_DRV_USBD_EPIN0; NRF_LOG_DEBUG("USB event: DMA ready IN0"); - m_dma_pending = 0; + usbd_dma_pending_clear(); usbd_drv_ep_state_t * p_state = ep_state_access(ep); if (NRF_USBD_EP_ABORTED == p_state->status) @@ -944,14 +995,11 @@ static inline void nrf_usbd_ep0in_dma_handler(void) */ static inline void nrf_usbd_epin_dma_handler(nrf_drv_usbd_ep_t ep) { - // Workaround for errata 199 (USBD cannot receive tasks during DMA) - *(volatile uint32_t *)0x40027C1C = 0x00000000; - NRF_LOG_DEBUG("USB event: DMA ready IN: %x", ep); ASSERT(NRF_USBD_EPIN_CHECK(ep)); ASSERT(!NRF_USBD_EPISO_CHECK(ep)); ASSERT(NRF_USBD_EP_NR_GET(ep) > 0); - m_dma_pending = 0; + usbd_dma_pending_clear(); usbd_drv_ep_state_t * p_state = ep_state_access(ep); if (NRF_USBD_EP_ABORTED == p_state->status) @@ -976,16 +1024,13 @@ static inline void nrf_usbd_epin_dma_handler(nrf_drv_usbd_ep_t ep) */ static inline void nrf_usbd_epiniso_dma_handler(nrf_drv_usbd_ep_t ep) { - // Workaround for errata 199 (USBD cannot receive tasks during DMA) - *(volatile uint32_t *)0x40027C1C = 0x00000000; - if (NRF_USBD_ISO_DEBUG) { NRF_LOG_DEBUG("USB event: DMA ready ISOIN: %x", ep); } ASSERT(NRF_USBD_EPIN_CHECK(ep)); ASSERT(NRF_USBD_EPISO_CHECK(ep)); - m_dma_pending = 0; + usbd_dma_pending_clear(); usbd_drv_ep_state_t * p_state = ep_state_access(ep); if (NRF_USBD_EP_ABORTED == p_state->status) @@ -1014,12 +1059,9 @@ static inline void nrf_usbd_epiniso_dma_handler(nrf_drv_usbd_ep_t ep) */ static inline void nrf_usbd_ep0out_dma_handler(void) { - // Workaround for errata 199 (USBD cannot receive tasks during DMA) - *(volatile uint32_t *)0x40027C1C = 0x00000000; - const nrf_drv_usbd_ep_t ep = NRF_DRV_USBD_EPOUT0; NRF_LOG_DEBUG("USB event: DMA ready OUT0"); - m_dma_pending = 0; + usbd_dma_pending_clear(); usbd_drv_ep_state_t * p_state = ep_state_access(ep); if (NRF_USBD_EP_ABORTED == p_state->status) @@ -1053,14 +1095,11 @@ static inline void nrf_usbd_ep0out_dma_handler(void) */ static inline void nrf_usbd_epout_dma_handler(nrf_drv_usbd_ep_t ep) { - // Workaround for errata 199 (USBD cannot receive tasks during DMA) - *(volatile uint32_t *)0x40027C1C = 0x00000000; - NRF_LOG_DEBUG("USB drv: DMA ready OUT: %x", ep); ASSERT(NRF_USBD_EPOUT_CHECK(ep)); ASSERT(!NRF_USBD_EPISO_CHECK(ep)); ASSERT(NRF_USBD_EP_NR_GET(ep) > 0); - m_dma_pending = 0; + usbd_dma_pending_clear(); usbd_drv_ep_state_t * p_state = ep_state_access(ep); if (NRF_USBD_EP_ABORTED == p_state->status) @@ -1091,19 +1130,14 @@ static inline void nrf_usbd_epout_dma_handler(nrf_drv_usbd_ep_t ep) * * @todo RK documentation */ - static inline void nrf_usbd_epoutiso_dma_handler(nrf_drv_usbd_ep_t ep) { - // Workaround for errata 199 (USBD cannot receive tasks during DMA) - *(volatile uint32_t *)0x40027C1C = 0x00000000; - if (NRF_USBD_ISO_DEBUG) { NRF_LOG_DEBUG("USB drv: DMA ready ISOOUT: %x", ep); } ASSERT(NRF_USBD_EPISO_CHECK(ep)); - - m_dma_pending = 0; + usbd_dma_pending_clear(); usbd_drv_ep_state_t * p_state = ep_state_access(ep); if (NRF_USBD_EP_ABORTED == p_state->status) @@ -1152,9 +1186,12 @@ static void ev_sof_handler(void) }; /* Process isochronous endpoints */ - m_ep_ready |= - (1U << ep2bit(NRF_DRV_USBD_EPIN8 )) | - (1U << ep2bit(NRF_DRV_USBD_EPOUT8)); + uint32_t iso_ready_mask = (1U << ep2bit(NRF_DRV_USBD_EPIN8)); + if (nrf_usbd_episoout_size_get(NRF_DRV_USBD_EPOUT8) != NRF_USBD_EPISOOUT_NO_DATA) + { + iso_ready_mask |= (1U << ep2bit(NRF_DRV_USBD_EPOUT8)); + } + m_ep_ready |= iso_ready_mask; m_event_handler(&evt); } @@ -1438,7 +1475,7 @@ static void usbd_dmareq_process(void) } } - m_dma_pending = 1; + usbd_dma_pending_set(); m_ep_ready &= ~(1U << pos); if (NRF_USBD_ISO_DEBUG || (!NRF_USBD_EPISO_CHECK(ep))) { @@ -1487,6 +1524,13 @@ static void usbd_dmareq_process(void) else { usbd_dma_start(ep); + /* There is a lot of USBD registers that cannot be accessed during EasyDMA transfer. + * This is quick fix to maintain stability of the stack. + * It cost some performance but makes stack stable. */ + while (!nrf_usbd_event_check(nrf_drv_usbd_ep_to_endevent(ep))) + { + /* Empty */ + } } if (NRF_USBD_DMAREQ_PROCESS_DEBUG) @@ -1693,7 +1737,7 @@ ret_code_t nrf_drv_usbd_init(nrf_drv_usbd_event_handler_t const event_handler) m_drv_state = NRF_DRV_STATE_INITIALIZED; uint8_t n; - for (n=0; nhandler.feeder = NULL; p_state->transfer_cnt = 0; } - for (n=0; n= 0x1UL)); +} + +static inline bool nrf_drv_usbd_errata_type_52840_eng_c(void) +{ + return (nrf_drv_usbd_errata_type_52840() && (*(uint32_t *)0x10000134UL >= 0x2UL)); +} + +static inline bool nrf_drv_usbd_errata_type_52840_eng_d(void) +{ + return (nrf_drv_usbd_errata_type_52840() && (*(uint32_t *)0x10000134UL >= 0x3UL)); +} + +/* Errata: USBD: EPDATA event is not always generated. */ static inline bool nrf_drv_usbd_errata_104(void) { - return NRF_DRV_USBD_ERRATA_ENABLE && nrf_drv_usbd_errata_type_52840_proto1(); + return (NRF_DRV_USBD_ERRATA_ENABLE && (!nrf_drv_usbd_errata_type_52840_eng_b())); } -/** - * @brief Function to check if chip requires errata 154 - * - * Errata: During setup read/write transfer USBD acknowledges setup stage without SETUP task. - * - * @retval true Errata should be implemented - * @retval false Errata should not be implemented - */ +/* Errata: During setup read/write transfer USBD acknowledges setup stage without SETUP task. */ static inline bool nrf_drv_usbd_errata_154(void) { - return NRF_DRV_USBD_ERRATA_ENABLE && nrf_drv_usbd_errata_type_52840_proto1(); + return (NRF_DRV_USBD_ERRATA_ENABLE && (!nrf_drv_usbd_errata_type_52840_eng_b())); } -/** - * @brief Function to check if chip requires errata 166 - * - * Errata: ISO double buffering not functional - * - * @retval true Errata should be implemented - * @retval false Errata should not be implemented - */ +/* Errata: ISO double buffering not functional. */ static inline bool nrf_drv_usbd_errata_166(void) { - return NRF_DRV_USBD_ERRATA_ENABLE && true; + return (NRF_DRV_USBD_ERRATA_ENABLE && true); } -/** - * @brief Function to check if chip requires errata ??? - * - * Errata: SIZE.EPOUT not writable - * - * @retval true Errata should be implemented - * @retval false Errata should not be implemented - */ -static inline bool nrf_drv_usbd_errata_sizeepout_rw(void) +/* Errata: USBD might not reach its active state. */ +static inline bool nrf_drv_usbd_errata_171(void) +{ + return (NRF_DRV_USBD_ERRATA_ENABLE && true); +} + +/* Errata: USB cannot be enabled. */ +static inline bool nrf_drv_usbd_errata_187(void) +{ + return (NRF_DRV_USBD_ERRATA_ENABLE && nrf_drv_usbd_errata_type_52840_eng_b()); +} + +/* Errata: USBD cannot receive tasks during DMA. */ +static inline bool nrf_drv_usbd_errata_199(void) +{ + return (NRF_DRV_USBD_ERRATA_ENABLE && true); +} + +/* Errata: SIZE.EPOUT not writable. */ +static inline bool nrf_drv_usbd_errata_200(void) { - return NRF_DRV_USBD_ERRATA_ENABLE && nrf_drv_usbd_errata_type_52840_proto1(); + return (NRF_DRV_USBD_ERRATA_ENABLE && (!nrf_drv_usbd_errata_type_52840_eng_b())); } /** @} */ From 890551a6b9179d2b24dd03c8fc72633b464c2e62 Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Tue, 26 Jun 2018 16:36:13 -0500 Subject: [PATCH 430/488] Baseline legacy build using 14.2 drivers. --- .../doc/RF-s140_nrf52_6.0.0_release-notes.pdf | Bin 0 -> 70447 bytes .../s140_nrf52_6.0.0_licence-agreement.txt | 35 + .../s140_nrf52_6.0.0_migration-document.pdf | Bin 0 -> 71009 bytes .../doc/s140_nrf52_6.0.0_release-notes.pdf | Bin 0 -> 64894 bytes .../TARGET_SOFTDEVICE_S140_FULL/headers/ble.h | 622 + .../headers/ble_err.h | 93 + .../headers/ble_gap.h | 2669 +++ .../headers/ble_gatt.h | 228 + .../headers/ble_gattc.h | 715 + .../headers/ble_gatts.h | 845 + .../headers/ble_hci.h | 135 + .../headers/ble_l2cap.h | 506 + .../headers/ble_ranges.h | 156 + .../headers/ble_types.h | 215 + .../headers/nrf52/nrf_mbr.h | 242 + .../headers/nrf_error.h | 90 + .../headers/nrf_error_sdm.h | 70 + .../headers/nrf_error_soc.h | 85 + .../headers/nrf_nvic.h | 486 + .../headers/nrf_sd_def.h | 59 + .../headers/nrf_sdm.h | 358 + .../headers/nrf_soc.h | 1036 + .../headers/nrf_svc.h | 90 + .../s140_nrf52_6.0.0_licence-agreement.txt | 35 + .../hex/s140_nrf52_6.0.0_softdevice.hex | 9443 +++++++++ .../components/libraries/atomic/nrf_atomic.c | 447 + .../components/libraries/atomic/nrf_atomic.h | 274 + .../libraries/atomic/nrf_atomic_internal.h | 343 + .../atomic/nrf_atomic_sanity_check.h | 153 + .../libraries/atomic_fifo/nrf_atfifo.c | 189 + .../libraries/atomic_fifo/nrf_atfifo.h | 424 + .../atomic_fifo/nrf_atfifo_internal.h | 578 + .../components/libraries/balloc/nrf_balloc.c | 399 + .../components/libraries/balloc/nrf_balloc.h | 351 + .../components/libraries/delay/nrf_delay.h | 80 + .../libraries/experimental_log/nrf_log.h | 291 + .../experimental_log/nrf_log_backend_flash.h | 129 + .../nrf_log_backend_interface.h | 220 + .../experimental_log/nrf_log_backend_rtt.h | 82 + .../experimental_log/nrf_log_backend_uart.h | 77 + .../libraries/experimental_log/nrf_log_ctrl.h | 226 + .../nrf_log_default_backends.h | 81 + .../experimental_log/nrf_log_instance.h | 135 + .../experimental_log/nrf_log_str_formatter.h | 86 + .../experimental_log/nrf_log_types.h | 97 + .../src/nrf_log_backend_flash.c | 739 + .../src/nrf_log_backend_rtt.c | 123 + .../src/nrf_log_backend_serial.c | 115 + .../src/nrf_log_backend_serial.h | 77 + .../src/nrf_log_backend_uart.c | 116 + .../src/nrf_log_ctrl_internal.h | 80 + .../src/nrf_log_default_backends.c | 76 + .../experimental_log/src/nrf_log_frontend.c | 1245 ++ .../experimental_log/src/nrf_log_internal.h | 529 + .../src/nrf_log_str_formatter.c | 256 + .../experimental_memobj/nrf_memobj.c | 231 + .../experimental_memobj/nrf_memobj.h | 198 + .../experimental_section_vars/nrf_section.h | 191 + .../nrf_section_iter.c | 125 + .../nrf_section_iter.h | 206 + .../libraries/fstorage/nrf_fstorage.c | 244 + .../libraries/fstorage/nrf_fstorage.h | 341 + .../libraries/fstorage/nrf_fstorage_nvmc.c | 217 + .../libraries/fstorage/nrf_fstorage_nvmc.h | 75 + .../libraries/fstorage/nrf_fstorage_sd.c | 624 + .../libraries/fstorage/nrf_fstorage_sd.h | 75 + .../libraries/spi_mngr/nrf_spi_mngr.c | 348 + .../libraries/spi_mngr/nrf_spi_mngr.h | 310 + .../libraries/strerror/nrf_strerror.c | 164 + .../libraries/strerror/nrf_strerror.h | 89 + .../libraries/twi_mngr/nrf_twi_mngr.c | 366 + .../libraries/twi_mngr/nrf_twi_mngr.h | 342 + .../components/libraries/util/app_error.c | 125 + .../components/libraries/util/app_error.h | 192 + .../libraries/util/app_error_handler_gcc.c | 105 + .../libraries/util/app_error_handler_iar.c | 105 + .../libraries/util/app_error_handler_keil.c | 96 + .../libraries/util/app_error_weak.c | 109 + .../libraries/util/app_error_weak.h | 87 + .../components/libraries/util/app_util.h | 1206 ++ .../components/libraries/util/app_util_bds.h | 449 + .../libraries/util/app_util_platform.c | 127 + .../libraries/util/app_util_platform.h | 279 + .../components/libraries/util/nordic_common.h | 215 + .../components/libraries/util/nrf_assert.c | 54 + .../components/libraries/util/nrf_assert.h | 122 + .../components/libraries/util/nrf_bitmask.h | 147 + .../components/libraries/util/sdk_alloca.h | 85 + .../components/libraries/util/sdk_common.h | 77 + .../components/libraries/util/sdk_errors.h | 167 + .../components/libraries/util/sdk_macros.h | 215 + .../libraries/util/sdk_mapped_flags.c | 220 + .../libraries/util/sdk_mapped_flags.h | 199 + .../components/libraries/util/sdk_os.h | 76 + .../components/libraries/util/sdk_resources.h | 86 + .../nrfx/legacy/apply_old_config.h | 1385 ++ .../integration/nrfx/legacy/nrf_drv_clock.h | 297 + .../integration/nrfx/legacy/nrf_drv_common.h | 63 + .../integration/nrfx/legacy/nrf_drv_gpiote.h | 139 + .../integration/nrfx/legacy/nrf_drv_pwm.h | 135 + .../integration/nrfx/legacy/nrf_drv_saadc.h | 143 + .../integration/nrfx/legacy/nrf_drv_spi.h | 644 + .../integration/nrfx/legacy/nrf_drv_twi.h | 708 + .../integration/nrfx/legacy/nrf_drv_uart.h | 671 + .../integration/nrfx/nrfx_config.h | 47 + .../integration/nrfx/nrfx_glue.h | 269 + .../integration/nrfx/nrfx_log.h | 152 + .../nrfx/drivers/include/nrf_bitmask.h | 156 + .../modules/nrfx/drivers/include/nrfx_adc.h | 281 + .../modules/nrfx/drivers/include/nrfx_clock.h | 223 + .../modules/nrfx/drivers/include/nrfx_comp.h | 247 + .../nrfx/drivers/include/nrfx_gpiote.h | 423 + .../modules/nrfx/drivers/include/nrfx_i2s.h | 254 + .../nrfx/drivers/include/nrfx_lpcomp.h | 150 + .../modules/nrfx/drivers/include/nrfx_pdm.h | 214 + .../modules/nrfx/drivers/include/nrfx_power.h | 382 + .../nrfx/drivers/include/nrfx_power_clock.h | 90 + .../modules/nrfx/drivers/include/nrfx_ppi.h | 327 + .../modules/nrfx/drivers/include/nrfx_pwm.h | 497 + .../modules/nrfx/drivers/include/nrfx_qdec.h | 186 + .../modules/nrfx/drivers/include/nrfx_qspi.h | 297 + .../modules/nrfx/drivers/include/nrfx_rng.h | 126 + .../modules/nrfx/drivers/include/nrfx_rtc.h | 369 + .../modules/nrfx/drivers/include/nrfx_saadc.h | 326 + .../modules/nrfx/drivers/include/nrfx_spi.h | 273 + .../modules/nrfx/drivers/include/nrfx_spim.h | 396 + .../modules/nrfx/drivers/include/nrfx_spis.h | 250 + .../modules/nrfx/drivers/include/nrfx_swi.h | 222 + .../nrfx/drivers/include/nrfx_systick.h | 135 + .../modules/nrfx/drivers/include/nrfx_timer.h | 413 + .../modules/nrfx/drivers/include/nrfx_twi.h | 368 + .../modules/nrfx/drivers/include/nrfx_twim.h | 408 + .../modules/nrfx/drivers/include/nrfx_twis.h | 405 + .../modules/nrfx/drivers/include/nrfx_uart.h | 365 + .../modules/nrfx/drivers/include/nrfx_uarte.h | 363 + .../modules/nrfx/drivers/include/nrfx_wdt.h | 156 + .../modules/nrfx/drivers/nrfx_common.h | 269 + .../modules/nrfx/drivers/nrfx_errors.h | 82 + .../modules/nrfx/drivers/src/nrfx_adc.c | 324 + .../modules/nrfx/drivers/src/nrfx_clock.c | 381 + .../modules/nrfx/drivers/src/nrfx_comp.c | 211 + .../modules/nrfx/drivers/src/nrfx_gpiote.c | 826 + .../modules/nrfx/drivers/src/nrfx_i2s.c | 420 + .../modules/nrfx/drivers/src/nrfx_lpcomp.c | 174 + .../modules/nrfx/drivers/src/nrfx_pdm.c | 370 + .../modules/nrfx/drivers/src/nrfx_power.c | 306 + .../nrfx/drivers/src/nrfx_power_clock.c | 52 + .../modules/nrfx/drivers/src/nrfx_ppi.c | 534 + .../modules/nrfx/drivers/src/nrfx_pwm.c | 515 + .../modules/nrfx/drivers/src/nrfx_qdec.c | 201 + .../modules/nrfx/drivers/src/nrfx_qspi.c | 337 + .../modules/nrfx/drivers/src/nrfx_rng.c | 122 + .../modules/nrfx/drivers/src/nrfx_rtc.c | 348 + .../modules/nrfx/drivers/src/nrfx_saadc.c | 639 + .../modules/nrfx/drivers/src/nrfx_spi.c | 441 + .../modules/nrfx/drivers/src/nrfx_spim.c | 688 + .../modules/nrfx/drivers/src/nrfx_spis.c | 494 + .../modules/nrfx/drivers/src/nrfx_swi.c | 412 + .../modules/nrfx/drivers/src/nrfx_systick.c | 170 + .../modules/nrfx/drivers/src/nrfx_timer.c | 330 + .../modules/nrfx/drivers/src/nrfx_twi.c | 723 + .../modules/nrfx/drivers/src/nrfx_twim.c | 664 + .../modules/nrfx/drivers/src/nrfx_twis.c | 834 + .../modules/nrfx/drivers/src/nrfx_uart.c | 649 + .../modules/nrfx/drivers/src/nrfx_uarte.c | 583 + .../modules/nrfx/drivers/src/nrfx_wdt.c | 153 + .../modules/nrfx/drivers/src/prs/nrfx_prs.c | 166 + .../modules/nrfx/drivers/src/prs/nrfx_prs.h | 140 + .../modules/nrfx/hal/nrf_adc.h | 348 + .../modules/nrfx/hal/nrf_clock.h | 400 + .../modules/nrfx/hal/nrf_comp.h | 509 + .../modules/nrfx/hal/nrf_ecb.c | 93 + .../modules/nrfx/hal/nrf_ecb.h | 97 + .../modules/nrfx/hal/nrf_egu.h | 389 + .../modules/nrfx/hal/nrf_gpio.h | 785 + .../modules/nrfx/hal/nrf_gpiote.h | 428 + .../modules/nrfx/hal/nrf_i2s.h | 557 + .../modules/nrfx/hal/nrf_lpcomp.h | 412 + .../modules/nrfx/hal/nrf_nvmc.c | 133 + .../modules/nrfx/hal/nrf_nvmc.h | 119 + .../modules/nrfx/hal/nrf_pdm.h | 387 + .../modules/nrfx/hal/nrf_power.h | 1057 + .../modules/nrfx/hal/nrf_ppi.h | 481 + .../modules/nrfx/hal/nrf_pwm.h | 694 + .../modules/nrfx/hal/nrf_qdec.h | 495 + .../modules/nrfx/hal/nrf_qspi.h | 778 + .../modules/nrfx/hal/nrf_rng.h | 274 + .../modules/nrfx/hal/nrf_rtc.h | 330 + .../modules/nrfx/hal/nrf_saadc.h | 615 + .../modules/nrfx/hal/nrf_spi.h | 369 + .../modules/nrfx/hal/nrf_spim.h | 736 + .../modules/nrfx/hal/nrf_spis.h | 571 + .../modules/nrfx/hal/nrf_systick.h | 190 + .../modules/nrfx/hal/nrf_temp.h | 88 + .../modules/nrfx/hal/nrf_timer.h | 634 + .../modules/nrfx/hal/nrf_twi.h | 451 + .../modules/nrfx/hal/nrf_twim.h | 522 + .../modules/nrfx/hal/nrf_twis.h | 702 + .../modules/nrfx/hal/nrf_uart.h | 526 + .../modules/nrfx/hal/nrf_uarte.h | 579 + .../modules/nrfx/hal/nrf_usbd.h | 1391 ++ .../modules/nrfx/hal/nrf_wdt.h | 333 + .../modules/nrfx/mdk/compiler_abstraction.h | 155 + .../TARGET_SDK_15_0/modules/nrfx/mdk/nRFxxx.h | 21 + .../TARGET_SDK_15_0/modules/nrfx/mdk/nrf.h | 102 + .../TARGET_SDK_15_0/modules/nrfx/mdk/nrf51.h | 1202 ++ .../modules/nrfx/mdk/nrf51422_peripherals.h | 165 + .../modules/nrfx/mdk/nrf51801_peripherals.h | 165 + .../modules/nrfx/mdk/nrf51802_peripherals.h | 165 + .../modules/nrfx/mdk/nrf51822_peripherals.h | 166 + .../modules/nrfx/mdk/nrf51824_peripherals.h | 166 + .../modules/nrfx/mdk/nrf51_bitfields.h | 6140 ++++++ .../modules/nrfx/mdk/nrf51_deprecated.h | 455 + .../modules/nrfx/mdk/nrf51_peripherals.h | 164 + .../modules/nrfx/mdk/nrf51_to_nrf52.h | 963 + .../modules/nrfx/mdk/nrf51_to_nrf52810.h | 532 + .../modules/nrfx/mdk/nrf51_to_nrf52840.h | 578 + .../TARGET_SDK_15_0/modules/nrfx/mdk/nrf52.h | 2100 ++ .../modules/nrfx/mdk/nrf52810.h | 1588 ++ .../modules/nrfx/mdk/nrf52810_bitfields.h | 10257 ++++++++++ .../modules/nrfx/mdk/nrf52810_peripherals.h | 218 + .../modules/nrfx/mdk/nrf52832_peripherals.h | 285 + .../modules/nrfx/mdk/nrf52840.h | 2487 +++ .../modules/nrfx/mdk/nrf52840_bitfields.h | 16915 ++++++++++++++++ .../modules/nrfx/mdk/nrf52840_peripherals.h | 310 + .../modules/nrfx/mdk/nrf52_bitfields.h | 12663 ++++++++++++ .../modules/nrfx/mdk/nrf52_name_change.h | 81 + .../modules/nrfx/mdk/nrf52_to_nrf52810.h | 105 + .../modules/nrfx/mdk/nrf52_to_nrf52840.h | 105 + .../modules/nrfx/mdk/nrf_peripherals.h | 72 + .../modules/nrfx/mdk/startup_config.h | 60 + .../modules/nrfx/mdk/system_nrf51.h | 61 + .../modules/nrfx/mdk/system_nrf52.h | 61 + .../modules/nrfx/mdk/system_nrf52810.h | 61 + .../modules/nrfx/mdk/system_nrf52840.h | 61 + .../TARGET_SDK_15_0/modules/nrfx/nrfx.h | 49 + .../modules/nrfx/soc/nrfx_coredep.h | 171 + .../modules/nrfx/soc/nrfx_irqs.h | 56 + .../modules/nrfx/soc/nrfx_irqs_nrf51.h | 136 + .../modules/nrfx/soc/nrfx_irqs_nrf52810.h | 141 + .../modules/nrfx/soc/nrfx_irqs_nrf52832.h | 192 + .../modules/nrfx/soc/nrfx_irqs_nrf52840.h | 208 + 242 files changed, 136488 insertions(+) create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/doc/RF-s140_nrf52_6.0.0_release-notes.pdf create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/doc/s140_nrf52_6.0.0_licence-agreement.txt create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/doc/s140_nrf52_6.0.0_migration-document.pdf create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/doc/s140_nrf52_6.0.0_release-notes.pdf create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble.h create mode 100644 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Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. 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b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble.h new file mode 100644 index 00000000000..9ebb41f5383 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble.h @@ -0,0 +1,622 @@ +/* + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON BLE SoftDevice Common + @{ + @defgroup ble_api Events, type definitions and API calls + @{ + + @brief Module independent events, type definitions and API calls for the BLE SoftDevice. + + */ + +#ifndef BLE_H__ +#define BLE_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_err.h" +#include "ble_gap.h" +#include "ble_l2cap.h" +#include "ble_gatt.h" +#include "ble_gattc.h" +#include "ble_gatts.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_COMMON_ENUMERATIONS Enumerations + * @{ */ + +/** + * @brief Common API SVC numbers. + */ +enum BLE_COMMON_SVCS +{ + SD_BLE_ENABLE = BLE_SVC_BASE, /**< Enable and initialize the BLE stack */ + SD_BLE_EVT_GET, /**< Get an event from the pending events queue. */ + SD_BLE_UUID_VS_ADD, /**< Add a Vendor Specific UUID. */ + SD_BLE_UUID_DECODE, /**< Decode UUID bytes. */ + SD_BLE_UUID_ENCODE, /**< Encode UUID bytes. */ + SD_BLE_VERSION_GET, /**< Get the local version information (company ID, Link Layer Version, Link Layer Subversion). */ + SD_BLE_USER_MEM_REPLY, /**< User Memory Reply. */ + SD_BLE_OPT_SET, /**< Set a BLE option. */ + SD_BLE_OPT_GET, /**< Get a BLE option. */ + SD_BLE_CFG_SET, /**< Add a configuration to the BLE stack. */ +}; + +/** + * @brief BLE Module Independent Event IDs. + */ +enum BLE_COMMON_EVTS +{ + BLE_EVT_USER_MEM_REQUEST = BLE_EVT_BASE + 0, /**< User Memory request. @ref ble_evt_user_mem_request_t */ + BLE_EVT_USER_MEM_RELEASE = BLE_EVT_BASE + 1, /**< User Memory release. @ref ble_evt_user_mem_release_t */ +}; + +/**@brief BLE Connection Configuration IDs. + * + * IDs that uniquely identify a connection configuration. + */ +enum BLE_CONN_CFGS +{ + BLE_CONN_CFG_GAP = BLE_CONN_CFG_BASE + 0, /**< BLE GAP specific connection configuration. */ + BLE_CONN_CFG_GATTC = BLE_CONN_CFG_BASE + 1, /**< BLE GATTC specific connection configuration. */ + BLE_CONN_CFG_GATTS = BLE_CONN_CFG_BASE + 2, /**< BLE GATTS specific connection configuration. */ + BLE_CONN_CFG_GATT = BLE_CONN_CFG_BASE + 3, /**< BLE GATT specific connection configuration. */ + BLE_CONN_CFG_L2CAP = BLE_CONN_CFG_BASE + 4, /**< BLE L2CAP specific connection configuration. */ +}; + +/**@brief BLE Common Configuration IDs. + * + * IDs that uniquely identify a common configuration. + */ +enum BLE_COMMON_CFGS +{ + BLE_COMMON_CFG_VS_UUID = BLE_CFG_BASE, /**< Vendor specific UUID configuration */ +}; + +/**@brief Common Option IDs. + * IDs that uniquely identify a common option. + */ +enum BLE_COMMON_OPTS +{ + BLE_COMMON_OPT_PA_LNA = BLE_OPT_BASE + 0, /**< PA and LNA options */ + BLE_COMMON_OPT_CONN_EVT_EXT = BLE_OPT_BASE + 1, /**< Extended connection events option */ +}; + +/** @} */ + +/** @addtogroup BLE_COMMON_DEFINES Defines + * @{ */ + +/** @brief Required pointer alignment for BLE Events. +*/ +#define BLE_EVT_PTR_ALIGNMENT 4 + +/** @brief Leaves the maximum of the two arguments. +*/ +#define BLE_MAX(a, b) ((a) < (b) ? (b) : (a)) + +/** @brief Maximum possible length for BLE Events. + * @note The highest value used for @ref ble_gatt_conn_cfg_t::att_mtu in any connection configuration shall be used as a parameter. + * If that value has not been configured for any connections then @ref BLE_GATT_ATT_MTU_DEFAULT must be used instead. +*/ +#define BLE_EVT_LEN_MAX(ATT_MTU) ( \ + offsetof(ble_evt_t, evt.gattc_evt.params.prim_srvc_disc_rsp.services) + ((ATT_MTU) - 1) / 4 * sizeof(ble_gattc_service_t) \ +) + +/** @defgroup BLE_USER_MEM_TYPES User Memory Types + * @{ */ +#define BLE_USER_MEM_TYPE_INVALID 0x00 /**< Invalid User Memory Types. */ +#define BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES 0x01 /**< User Memory for GATTS queued writes. */ +/** @} */ + +/** @defgroup BLE_UUID_VS_COUNTS Vendor Specific UUID counts + * @{ + */ +#define BLE_UUID_VS_COUNT_DEFAULT 10 /**< Default VS UUID count. */ +#define BLE_UUID_VS_COUNT_MAX 254 /**< Maximum VS UUID count. */ +/** @} */ + +/** @defgroup BLE_COMMON_CFG_DEFAULTS Configuration defaults. + * @{ + */ +#define BLE_CONN_CFG_TAG_DEFAULT 0 /**< Default configuration tag, SoftDevice default connection configuration. */ + +/** @} */ + +/** @} */ + +/** @addtogroup BLE_COMMON_STRUCTURES Structures + * @{ */ + +/**@brief User Memory Block. */ +typedef struct +{ + uint8_t *p_mem; /**< Pointer to the start of the user memory block. */ + uint16_t len; /**< Length in bytes of the user memory block. */ +} ble_user_mem_block_t; + +/**@brief Event structure for @ref BLE_EVT_USER_MEM_REQUEST. */ +typedef struct +{ + uint8_t type; /**< User memory type, see @ref BLE_USER_MEM_TYPES. */ +} ble_evt_user_mem_request_t; + +/**@brief Event structure for @ref BLE_EVT_USER_MEM_RELEASE. */ +typedef struct +{ + uint8_t type; /**< User memory type, see @ref BLE_USER_MEM_TYPES. */ + ble_user_mem_block_t mem_block; /**< User memory block */ +} ble_evt_user_mem_release_t; + +/**@brief Event structure for events not associated with a specific function module. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which this event occurred. */ + union + { + ble_evt_user_mem_request_t user_mem_request; /**< User Memory Request Event Parameters. */ + ble_evt_user_mem_release_t user_mem_release; /**< User Memory Release Event Parameters. */ + } params; /**< Event parameter union. */ +} ble_common_evt_t; + +/**@brief BLE Event header. */ +typedef struct +{ + uint16_t evt_id; /**< Value from a BLE__EVT series. */ + uint16_t evt_len; /**< Length in octets including this header. */ +} ble_evt_hdr_t; + +/**@brief Common BLE Event type, wrapping the module specific event reports. */ +typedef struct +{ + ble_evt_hdr_t header; /**< Event header. */ + union + { + ble_common_evt_t common_evt; /**< Common Event, evt_id in BLE_EVT_* series. */ + ble_gap_evt_t gap_evt; /**< GAP originated event, evt_id in BLE_GAP_EVT_* series. */ + ble_gattc_evt_t gattc_evt; /**< GATT client originated event, evt_id in BLE_GATTC_EVT* series. */ + ble_gatts_evt_t gatts_evt; /**< GATT server originated event, evt_id in BLE_GATTS_EVT* series. */ + ble_l2cap_evt_t l2cap_evt; /**< L2CAP originated event, evt_id in BLE_L2CAP_EVT* series. */ + } evt; /**< Event union. */ +} ble_evt_t; + + +/** + * @brief Version Information. + */ +typedef struct +{ + uint8_t version_number; /**< Link Layer Version number. See https://www.bluetooth.org/en-us/specification/assigned-numbers/link-layer for assigned values. */ + uint16_t company_id; /**< Company ID, Nordic Semiconductor's company ID is 89 (0x0059) (https://www.bluetooth.org/apps/content/Default.aspx?doc_id=49708). */ + uint16_t subversion_number; /**< Link Layer Sub Version number, corresponds to the SoftDevice Config ID or Firmware ID (FWID). */ +} ble_version_t; + +/** + * @brief Configuration parameters for the PA and LNA. + */ +typedef struct +{ + uint8_t enable :1; /**< Enable toggling for this amplifier */ + uint8_t active_high :1; /**< Set the pin to be active high */ + uint8_t gpio_pin :6; /**< The GPIO pin to toggle for this amplifier */ +} ble_pa_lna_cfg_t; + +/** + * @brief PA & LNA GPIO toggle configuration + * + * This option configures the SoftDevice to toggle pins when the radio is active for use with a power amplifier and/or + * a low noise amplifier. + * + * Toggling the pins is achieved by using two PPI channels and a GPIOTE channel. The hardware channel IDs are provided + * by the application and should be regarded as reserved as long as any PA/LNA toggling is enabled. + * + * @note @ref sd_ble_opt_get is not supported for this option. + * @note Setting this option while the radio is in use (i.e. any of the roles are active) may have undefined consequences + * and must be avoided by the application. + */ +typedef struct +{ + ble_pa_lna_cfg_t pa_cfg; /**< Power Amplifier configuration */ + ble_pa_lna_cfg_t lna_cfg; /**< Low Noise Amplifier configuration */ + + uint8_t ppi_ch_id_set; /**< PPI channel used for radio pin setting */ + uint8_t ppi_ch_id_clr; /**< PPI channel used for radio pin clearing */ + uint8_t gpiote_ch_id; /**< GPIOTE channel used for radio pin toggling */ +} ble_common_opt_pa_lna_t; + +/** + * @brief Configuration of extended BLE connection events. + * + * When enabled the SoftDevice will dynamically extend the connection event when possible. + * + * The connection event length is controlled by the connection configuration as set by @ref ble_gap_conn_cfg_t::event_length. + * The connection event can be extended if there is time to send another packet pair before the start of the next connection interval, + * and if there are no conflicts with other BLE roles requesting radio time. + * + * @note @ref sd_ble_opt_get is not supported for this option. + */ +typedef struct +{ + uint8_t enable : 1; /**< Enable extended BLE connection events, disabled by default. */ +} ble_common_opt_conn_evt_ext_t; + +/**@brief Option structure for common options. */ +typedef union +{ + ble_common_opt_pa_lna_t pa_lna; /**< Parameters for controlling PA and LNA pin toggling. */ + ble_common_opt_conn_evt_ext_t conn_evt_ext; /**< Parameters for enabling extended connection events. */ +} ble_common_opt_t; + +/**@brief Common BLE Option type, wrapping the module specific options. */ +typedef union +{ + ble_common_opt_t common_opt; /**< COMMON options, opt_id in @ref BLE_COMMON_OPTS series. */ + ble_gap_opt_t gap_opt; /**< GAP option, opt_id in @ref BLE_GAP_OPTS series. */ +} ble_opt_t; + +/**@brief BLE connection configuration type, wrapping the module specific configurations, set with + * @ref sd_ble_cfg_set. + * + * @note Connection configurations don't have to be set. + * In the case that no configurations has been set, or fewer connection configurations has been set than enabled connections, + * the default connection configuration will be automatically added for the remaining connections. + * When creating connections with the default configuration, @ref BLE_CONN_CFG_TAG_DEFAULT should be used in + * place of @ref ble_conn_cfg_t::conn_cfg_tag. + * + * @sa sd_ble_gap_adv_start() + * @sa sd_ble_gap_connect() + * + * @mscs + * @mmsc{@ref BLE_CONN_CFG} + * @endmscs + + */ +typedef struct +{ + uint8_t conn_cfg_tag; /**< The application chosen tag it can use with the + @ref sd_ble_gap_adv_start() and @ref sd_ble_gap_connect() calls + to select this configuration when creating a connection. + Must be different for all connection configurations added and not @ref BLE_CONN_CFG_TAG_DEFAULT. */ + union { + ble_gap_conn_cfg_t gap_conn_cfg; /**< GAP connection configuration, cfg_id is @ref BLE_CONN_CFG_GAP. */ + ble_gattc_conn_cfg_t gattc_conn_cfg; /**< GATTC connection configuration, cfg_id is @ref BLE_CONN_CFG_GATTC. */ + ble_gatts_conn_cfg_t gatts_conn_cfg; /**< GATTS connection configuration, cfg_id is @ref BLE_CONN_CFG_GATTS. */ + ble_gatt_conn_cfg_t gatt_conn_cfg; /**< GATT connection configuration, cfg_id is @ref BLE_CONN_CFG_GATT. */ + ble_l2cap_conn_cfg_t l2cap_conn_cfg; /**< L2CAP connection configuration, cfg_id is @ref BLE_CONN_CFG_L2CAP. */ + } params; /**< Connection configuration union. */ +} ble_conn_cfg_t; + +/** + * @brief Configuration of Vendor Specific UUIDs, set with @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_INVALID_PARAM Too many UUIDs configured. + */ +typedef struct +{ + uint8_t vs_uuid_count; /**< Number of 128-bit Vendor Specific UUID bases to allocate memory for. + Default value is @ref BLE_UUID_VS_COUNT_DEFAULT. Maximum value is + @ref BLE_UUID_VS_COUNT_MAX. */ +} ble_common_cfg_vs_uuid_t; + +/**@brief Common BLE Configuration type, wrapping the common configurations. */ +typedef union +{ + ble_common_cfg_vs_uuid_t vs_uuid_cfg; /**< Vendor specific UUID configuration, cfg_id is @ref BLE_COMMON_CFG_VS_UUID. */ +} ble_common_cfg_t; + +/**@brief BLE Configuration type, wrapping the module specific configurations. */ +typedef union +{ + ble_conn_cfg_t conn_cfg; /**< Connection specific configurations, cfg_id in @ref BLE_CONN_CFGS series. */ + ble_common_cfg_t common_cfg; /**< Global common configurations, cfg_id in @ref BLE_COMMON_CFGS series. */ + ble_gap_cfg_t gap_cfg; /**< Global GAP configurations, cfg_id in @ref BLE_GAP_CFGS series. */ + ble_gatts_cfg_t gatts_cfg; /**< Global GATTS configuration, cfg_id in @ref BLE_GATTS_CFGS series. */ +} ble_cfg_t; + +/** @} */ + +/** @addtogroup BLE_COMMON_FUNCTIONS Functions + * @{ */ + +/**@brief Enable the BLE stack + * + * @param[in, out] p_app_ram_base Pointer to a variable containing the start address of the + * application RAM region (APP_RAM_BASE). On return, this will + * contain the minimum start address of the application RAM region + * required by the SoftDevice for this configuration. + * + * @note The memory requirement for a specific configuration will not increase between SoftDevices + * with the same major version number. + * + * @note The value of *p_app_ram_base when the app has done no custom configuration of the + * SoftDevice, i.e. the app has not called @ref sd_ble_cfg_set before @ref sd_ble_enable, can + * be found in the release notes. + * + * @note At runtime the IC's RAM is split into 2 regions: The SoftDevice RAM region is located + * between 0x20000000 and APP_RAM_BASE-1 and the application's RAM region is located between + * APP_RAM_BASE and the start of the call stack. + * + * @details This call initializes the BLE stack, no BLE related function other than @ref + * sd_ble_cfg_set can be called before this one. + * + * @mscs + * @mmsc{@ref BLE_COMMON_ENABLE} + * @endmscs + * + * @retval ::NRF_SUCCESS The BLE stack has been initialized successfully. + * @retval ::NRF_ERROR_INVALID_STATE The BLE stack had already been initialized and cannot be reinitialized. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. + * @retval ::NRF_ERROR_NO_MEM The amount of memory assigned to the SoftDevice by *p_app_ram_base is not + * large enough to fit this configuration's memory requirement. Check *p_app_ram_base + * and set the start address of the application RAM region accordingly. + */ +SVCALL(SD_BLE_ENABLE, uint32_t, sd_ble_enable(uint32_t * p_app_ram_base)); + +/**@brief Add configurations for the BLE stack + * + * @param[in] cfg_id Config ID, see @ref BLE_CONN_CFGS, @ref BLE_COMMON_CFGS, @ref + * BLE_GAP_CFGS or @ref BLE_GATTS_CFGS. + * @param[in] p_cfg Pointer to a ble_cfg_t structure containing the configuration value. + * @param[in] app_ram_base The start address of the application RAM region (APP_RAM_BASE). + * See @ref sd_ble_enable for details about APP_RAM_BASE. + * + * @note The memory requirement for a specific configuration will not increase between SoftDevices + * with the same major version number. + * + * @note If a configuration is set more than once, the last one set is the one that takes effect on + * @ref sd_ble_enable. + * + * @note Any part of the BLE stack that is NOT configured with @ref sd_ble_cfg_set will have default + * configuration. + * + * @note @ref sd_ble_cfg_set may be called at any time when the SoftDevice is enabled (see @ref + * sd_softdevice_enable) while the BLE part of the SoftDevice is not enabled (see @ref + * sd_ble_enable). + * + * @note Error codes for the configurations are described in the configuration structs. + * + * @mscs + * @mmsc{@ref BLE_COMMON_ENABLE} + * @endmscs + * + * @retval ::NRF_SUCCESS The configuration has been added successfully. + * @retval ::NRF_ERROR_INVALID_STATE The BLE stack had already been initialized. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid cfg_id supplied. + * @retval ::NRF_ERROR_NO_MEM The amount of memory assigned to the SoftDevice by app_ram_base is not + * large enough to fit this configuration's memory requirement. + */ +SVCALL(SD_BLE_CFG_SET, uint32_t, sd_ble_cfg_set(uint32_t cfg_id, ble_cfg_t const * p_cfg, uint32_t app_ram_base)); + +/**@brief Get an event from the pending events queue. + * + * @param[out] p_dest Pointer to buffer to be filled in with an event, or NULL to retrieve the event length. + * This buffer must be aligned to the extend defined by @ref BLE_EVT_PTR_ALIGNMENT. + * The buffer should be interpreted as a @ref ble_evt_t struct. + * @param[in, out] p_len Pointer the length of the buffer, on return it is filled with the event length. + * + * @details This call allows the application to pull a BLE event from the BLE stack. The application is signaled that + * an event is available from the BLE stack by the triggering of the SD_EVT_IRQn interrupt. + * The application is free to choose whether to call this function from thread mode (main context) or directly from the + * Interrupt Service Routine that maps to SD_EVT_IRQn. In any case however, and because the BLE stack runs at a higher + * priority than the application, this function should be called in a loop (until @ref NRF_ERROR_NOT_FOUND is returned) + * every time SD_EVT_IRQn is raised to ensure that all available events are pulled from the BLE stack. Failure to do so + * could potentially leave events in the internal queue without the application being aware of this fact. + * + * Sizing the p_dest buffer is equally important, since the application needs to provide all the memory necessary for the event to + * be copied into application memory. If the buffer provided is not large enough to fit the entire contents of the event, + * @ref NRF_ERROR_DATA_SIZE will be returned and the application can then call again with a larger buffer size. + * The maximum possible event length is defined by @ref BLE_EVT_LEN_MAX. The application may also "peek" the event length + * by providing p_dest as a NULL pointer and inspecting the value of *p_len upon return: + * + * \code + * uint16_t len; + * errcode = sd_ble_evt_get(NULL, &len); + * \endcode + * + * @mscs + * @mmsc{@ref BLE_COMMON_IRQ_EVT_MSC} + * @mmsc{@ref BLE_COMMON_THREAD_EVT_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Event pulled and stored into the supplied buffer. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. + * @retval ::NRF_ERROR_NOT_FOUND No events ready to be pulled. + * @retval ::NRF_ERROR_DATA_SIZE Event ready but could not fit into the supplied buffer. + */ +SVCALL(SD_BLE_EVT_GET, uint32_t, sd_ble_evt_get(uint8_t *p_dest, uint16_t *p_len)); + + +/**@brief Add a Vendor Specific base UUID. + * + * @details This call enables the application to add a vendor specific base UUID to the BLE stack's table, for later + * use with all other modules and APIs. This then allows the application to use the shorter, 24-bit @ref ble_uuid_t + * format when dealing with both 16-bit and 128-bit UUIDs without having to check for lengths and having split code + * paths. This is accomplished by extending the grouping mechanism that the Bluetooth SIG standard base UUID uses + * for all other 128-bit UUIDs. The type field in the @ref ble_uuid_t structure is an index (relative to + * @ref BLE_UUID_TYPE_VENDOR_BEGIN) to the table populated by multiple calls to this function, and the UUID field + * in the same structure contains the 2 bytes at indexes 12 and 13. The number of possible 128-bit UUIDs available to + * the application is therefore the number of Vendor Specific UUIDs added with the help of this function times 65536, + * although restricted to modifying bytes 12 and 13 for each of the entries in the supplied array. + * + * @note Bytes 12 and 13 of the provided UUID will not be used internally, since those are always replaced by + * the 16-bit uuid field in @ref ble_uuid_t. + * + * @note If a UUID is already present in the BLE stack's internal table, the corresponding index will be returned in + * p_uuid_type along with an @ref NRF_SUCCESS error code. + * + * @param[in] p_vs_uuid Pointer to a 16-octet (128-bit) little endian Vendor Specific UUID disregarding + * bytes 12 and 13. + * @param[out] p_uuid_type Pointer to a uint8_t where the type field in @ref ble_uuid_t corresponding to this UUID will be stored. + * + * @retval ::NRF_SUCCESS Successfully added the Vendor Specific UUID. + * @retval ::NRF_ERROR_INVALID_ADDR If p_vs_uuid or p_uuid_type is NULL or invalid. + * @retval ::NRF_ERROR_NO_MEM If there are no more free slots for VS UUIDs. + */ +SVCALL(SD_BLE_UUID_VS_ADD, uint32_t, sd_ble_uuid_vs_add(ble_uuid128_t const *p_vs_uuid, uint8_t *p_uuid_type)); + + +/** @brief Decode little endian raw UUID bytes (16-bit or 128-bit) into a 24 bit @ref ble_uuid_t structure. + * + * @details The raw UUID bytes excluding bytes 12 and 13 (i.e. bytes 0-11 and 14-15) of p_uuid_le are compared + * to the corresponding ones in each entry of the table of vendor specific UUIDs populated with @ref sd_ble_uuid_vs_add + * to look for a match. If there is such a match, bytes 12 and 13 are returned as p_uuid->uuid and the index + * relative to @ref BLE_UUID_TYPE_VENDOR_BEGIN as p_uuid->type. + * + * @note If the UUID length supplied is 2, then the type set by this call will always be @ref BLE_UUID_TYPE_BLE. + * + * @param[in] uuid_le_len Length in bytes of the buffer pointed to by p_uuid_le (must be 2 or 16 bytes). + * @param[in] p_uuid_le Pointer pointing to little endian raw UUID bytes. + * @param[out] p_uuid Pointer to a @ref ble_uuid_t structure to be filled in. + * + * @retval ::NRF_SUCCESS Successfully decoded into the @ref ble_uuid_t structure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_LENGTH Invalid UUID length. + * @retval ::NRF_ERROR_NOT_FOUND For a 128-bit UUID, no match in the populated table of UUIDs. + */ +SVCALL(SD_BLE_UUID_DECODE, uint32_t, sd_ble_uuid_decode(uint8_t uuid_le_len, uint8_t const *p_uuid_le, ble_uuid_t *p_uuid)); + + +/** @brief Encode a @ref ble_uuid_t structure into little endian raw UUID bytes (16-bit or 128-bit). + * + * @note The pointer to the destination buffer p_uuid_le may be NULL, in which case only the validity and size of p_uuid is computed. + * + * @param[in] p_uuid Pointer to a @ref ble_uuid_t structure that will be encoded into bytes. + * @param[out] p_uuid_le_len Pointer to a uint8_t that will be filled with the encoded length (2 or 16 bytes). + * @param[out] p_uuid_le Pointer to a buffer where the little endian raw UUID bytes (2 or 16) will be stored. + * + * @retval ::NRF_SUCCESS Successfully encoded into the buffer. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid UUID type. + */ +SVCALL(SD_BLE_UUID_ENCODE, uint32_t, sd_ble_uuid_encode(ble_uuid_t const *p_uuid, uint8_t *p_uuid_le_len, uint8_t *p_uuid_le)); + + +/**@brief Get Version Information. + * + * @details This call allows the application to get the BLE stack version information. + * + * @param[out] p_version Pointer to a ble_version_t structure to be filled in. + * + * @retval ::NRF_SUCCESS Version information stored successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY The BLE stack is busy (typically doing a locally-initiated disconnection procedure). + */ +SVCALL(SD_BLE_VERSION_GET, uint32_t, sd_ble_version_get(ble_version_t *p_version)); + + +/**@brief Provide a user memory block. + * + * @note This call can only be used as a response to a @ref BLE_EVT_USER_MEM_REQUEST event issued to the application. + * + * @param[in] conn_handle Connection handle. + * @param[in] p_block Pointer to a user memory block structure or NULL if memory is managed by the application. + * + * @mscs + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_PEER_CANCEL_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_NOAUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Successfully queued a response to the peer. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_LENGTH Invalid user memory block length supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection state or no user memory request pending. + */ +SVCALL(SD_BLE_USER_MEM_REPLY, uint32_t, sd_ble_user_mem_reply(uint16_t conn_handle, ble_user_mem_block_t const *p_block)); + +/**@brief Set a BLE option. + * + * @details This call allows the application to set the value of an option. + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC} + * @endmscs + * + * @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS. + * @param[in] p_opt Pointer to a ble_opt_t structure containing the option value. + * + * @retval ::NRF_SUCCESS Option set successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. + * @retval ::NRF_ERROR_INVALID_STATE Unable to set the parameter at this time. + * @retval ::NRF_ERROR_BUSY The BLE stack is busy or the previous procedure has not completed. + */ +SVCALL(SD_BLE_OPT_SET, uint32_t, sd_ble_opt_set(uint32_t opt_id, ble_opt_t const *p_opt)); + + +/**@brief Get a BLE option. + * + * @details This call allows the application to retrieve the value of an option. + * + * @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS. + * @param[out] p_opt Pointer to a ble_opt_t structure to be filled in. + * + * @retval ::NRF_SUCCESS Option retrieved successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. + * @retval ::NRF_ERROR_INVALID_STATE Unable to retrieve the parameter at this time. + * @retval ::NRF_ERROR_BUSY The BLE stack is busy or the previous procedure has not completed. + * @retval ::NRF_ERROR_NOT_SUPPORTED This option is not supported. + * + */ +SVCALL(SD_BLE_OPT_GET, uint32_t, sd_ble_opt_get(uint32_t opt_id, ble_opt_t *p_opt)); + +/** @} */ +#ifdef __cplusplus +} +#endif +#endif /* BLE_H__ */ + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_err.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_err.h new file mode 100644 index 00000000000..1b4820dc3d6 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_err.h @@ -0,0 +1,93 @@ +/* + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON + @{ + @addtogroup nrf_error + @{ + @ingroup BLE_COMMON + @} + + @defgroup ble_err General error codes + @{ + + @brief General error code definitions for the BLE API. + + @ingroup BLE_COMMON +*/ +#ifndef NRF_BLE_ERR_H__ +#define NRF_BLE_ERR_H__ + +#include "nrf_error.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* @defgroup BLE_ERRORS Error Codes + * @{ */ +#define BLE_ERROR_NOT_ENABLED (NRF_ERROR_STK_BASE_NUM+0x001) /**< @ref sd_ble_enable has not been called. */ +#define BLE_ERROR_INVALID_CONN_HANDLE (NRF_ERROR_STK_BASE_NUM+0x002) /**< Invalid connection handle. */ +#define BLE_ERROR_INVALID_ATTR_HANDLE (NRF_ERROR_STK_BASE_NUM+0x003) /**< Invalid attribute handle. */ +#define BLE_ERROR_INVALID_ADV_HANDLE (NRF_ERROR_STK_BASE_NUM+0x004) /**< Invalid advertising handle. */ +#define BLE_ERROR_INVALID_ROLE (NRF_ERROR_STK_BASE_NUM+0x005) /**< Invalid role. */ +#define BLE_ERROR_BLOCKED_BY_OTHER_LINKS (NRF_ERROR_STK_BASE_NUM+0x006) /**< The attempt to change link settings failed due to the scheduling of other links. */ +/** @} */ + + +/** @defgroup BLE_ERROR_SUBRANGES Module specific error code subranges + * @brief Assignment of subranges for module specific error codes. + * @note For specific error codes, see ble_.h or ble_error_.h. + * @{ */ +#define NRF_L2CAP_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x100) /**< L2CAP specific errors. */ +#define NRF_GAP_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x200) /**< GAP specific errors. */ +#define NRF_GATTC_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x300) /**< GATT client specific errors. */ +#define NRF_GATTS_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x400) /**< GATT server specific errors. */ +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif + + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_gap.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_gap.h new file mode 100644 index 00000000000..6e6cae27549 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_gap.h @@ -0,0 +1,2669 @@ +/* + * Copyright (c) 2011 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_GAP Generic Access Profile (GAP) + @{ + @brief Definitions and prototypes for the GAP interface. + */ + +#ifndef BLE_GAP_H__ +#define BLE_GAP_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_hci.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@addtogroup BLE_GAP_ENUMERATIONS Enumerations + * @{ */ + +/**@brief GAP API SVC numbers. + */ +enum BLE_GAP_SVCS +{ + SD_BLE_GAP_ADDR_SET = BLE_GAP_SVC_BASE, /**< Set own Bluetooth Address. */ + SD_BLE_GAP_ADDR_GET = BLE_GAP_SVC_BASE + 1, /**< Get own Bluetooth Address. */ + SD_BLE_GAP_WHITELIST_SET = BLE_GAP_SVC_BASE + 2, /**< Set active whitelist. */ + SD_BLE_GAP_DEVICE_IDENTITIES_SET = BLE_GAP_SVC_BASE + 3, /**< Set device identity list. */ + SD_BLE_GAP_PRIVACY_SET = BLE_GAP_SVC_BASE + 4, /**< Set Privacy settings*/ + SD_BLE_GAP_PRIVACY_GET = BLE_GAP_SVC_BASE + 5, /**< Get Privacy settings*/ + SD_BLE_GAP_ADV_SET_CONFIGURE = BLE_GAP_SVC_BASE + 6, /**< Configure an advertising set. */ + SD_BLE_GAP_ADV_START = BLE_GAP_SVC_BASE + 7, /**< Start Advertising. */ + SD_BLE_GAP_ADV_STOP = BLE_GAP_SVC_BASE + 8, /**< Stop Advertising. */ + SD_BLE_GAP_CONN_PARAM_UPDATE = BLE_GAP_SVC_BASE + 9, /**< Connection Parameter Update. */ + SD_BLE_GAP_DISCONNECT = BLE_GAP_SVC_BASE + 10, /**< Disconnect. */ + SD_BLE_GAP_TX_POWER_SET = BLE_GAP_SVC_BASE + 11, /**< Set TX Power. */ + SD_BLE_GAP_APPEARANCE_SET = BLE_GAP_SVC_BASE + 12, /**< Set Appearance. */ + SD_BLE_GAP_APPEARANCE_GET = BLE_GAP_SVC_BASE + 13, /**< Get Appearance. */ + SD_BLE_GAP_PPCP_SET = BLE_GAP_SVC_BASE + 14, /**< Set PPCP. */ + SD_BLE_GAP_PPCP_GET = BLE_GAP_SVC_BASE + 15, /**< Get PPCP. */ + SD_BLE_GAP_DEVICE_NAME_SET = BLE_GAP_SVC_BASE + 16, /**< Set Device Name. */ + SD_BLE_GAP_DEVICE_NAME_GET = BLE_GAP_SVC_BASE + 17, /**< Get Device Name. */ + SD_BLE_GAP_AUTHENTICATE = BLE_GAP_SVC_BASE + 18, /**< Initiate Pairing/Bonding. */ + SD_BLE_GAP_SEC_PARAMS_REPLY = BLE_GAP_SVC_BASE + 19, /**< Reply with Security Parameters. */ + SD_BLE_GAP_AUTH_KEY_REPLY = BLE_GAP_SVC_BASE + 20, /**< Reply with an authentication key. */ + SD_BLE_GAP_LESC_DHKEY_REPLY = BLE_GAP_SVC_BASE + 21, /**< Reply with an LE Secure Connections DHKey. */ + SD_BLE_GAP_KEYPRESS_NOTIFY = BLE_GAP_SVC_BASE + 22, /**< Notify of a keypress during an authentication procedure. */ + SD_BLE_GAP_LESC_OOB_DATA_GET = BLE_GAP_SVC_BASE + 23, /**< Get the local LE Secure Connections OOB data. */ + SD_BLE_GAP_LESC_OOB_DATA_SET = BLE_GAP_SVC_BASE + 24, /**< Set the remote LE Secure Connections OOB data. */ + SD_BLE_GAP_ENCRYPT = BLE_GAP_SVC_BASE + 25, /**< Initiate encryption procedure. */ + SD_BLE_GAP_SEC_INFO_REPLY = BLE_GAP_SVC_BASE + 26, /**< Reply with Security Information. */ + SD_BLE_GAP_CONN_SEC_GET = BLE_GAP_SVC_BASE + 27, /**< Obtain connection security level. */ + SD_BLE_GAP_RSSI_START = BLE_GAP_SVC_BASE + 28, /**< Start reporting of changes in RSSI. */ + SD_BLE_GAP_RSSI_STOP = BLE_GAP_SVC_BASE + 29, /**< Stop reporting of changes in RSSI. */ + SD_BLE_GAP_SCAN_START = BLE_GAP_SVC_BASE + 30, /**< Start Scanning. */ + SD_BLE_GAP_SCAN_STOP = BLE_GAP_SVC_BASE + 31, /**< Stop Scanning. */ + SD_BLE_GAP_CONNECT = BLE_GAP_SVC_BASE + 32, /**< Connect. */ + SD_BLE_GAP_CONNECT_CANCEL = BLE_GAP_SVC_BASE + 33, /**< Cancel ongoing connection procedure. */ + SD_BLE_GAP_RSSI_GET = BLE_GAP_SVC_BASE + 34, /**< Get the last RSSI sample. */ + SD_BLE_GAP_PHY_UPDATE = BLE_GAP_SVC_BASE + 35, /**< Initiate or respond to a PHY Update Procedure. */ + SD_BLE_GAP_DATA_LENGTH_UPDATE = BLE_GAP_SVC_BASE + 36, /**< Initiate or respond to a Data Length Update Procedure. */ + SD_BLE_GAP_QOS_CHANNEL_SURVEY_START = BLE_GAP_SVC_BASE + 37, /**< Start Quality of Service (QoS) channel survey module. */ + SD_BLE_GAP_QOS_CHANNEL_SURVEY_STOP = BLE_GAP_SVC_BASE + 38, /**< Stop Quality of Service (QoS) channel survey module. */ +}; + +/**@brief GAP Event IDs. + * IDs that uniquely identify an event coming from the stack to the application. + */ +enum BLE_GAP_EVTS +{ + BLE_GAP_EVT_CONNECTED = BLE_GAP_EVT_BASE, + BLE_GAP_EVT_DISCONNECTED = BLE_GAP_EVT_BASE + 1, /**< Disconnected from peer. \n See @ref ble_gap_evt_disconnected_t. */ + BLE_GAP_EVT_CONN_PARAM_UPDATE = BLE_GAP_EVT_BASE + 2, /**< Connection Parameters updated. \n See @ref ble_gap_evt_conn_param_update_t. */ + BLE_GAP_EVT_SEC_PARAMS_REQUEST = BLE_GAP_EVT_BASE + 3, /**< Request to provide security parameters. \n Reply with @ref sd_ble_gap_sec_params_reply. \n See @ref ble_gap_evt_sec_params_request_t. */ + BLE_GAP_EVT_SEC_INFO_REQUEST = BLE_GAP_EVT_BASE + 4, /**< Request to provide security information. \n Reply with @ref sd_ble_gap_sec_info_reply. \n See @ref ble_gap_evt_sec_info_request_t. */ + BLE_GAP_EVT_PASSKEY_DISPLAY = BLE_GAP_EVT_BASE + 5, /**< Request to display a passkey to the user. \n In LESC Numeric Comparison, reply with @ref sd_ble_gap_auth_key_reply. \n See @ref ble_gap_evt_passkey_display_t. */ + BLE_GAP_EVT_KEY_PRESSED = BLE_GAP_EVT_BASE + 6, /**< Notification of a keypress on the remote device.\n See @ref ble_gap_evt_key_pressed_t */ + BLE_GAP_EVT_AUTH_KEY_REQUEST = BLE_GAP_EVT_BASE + 7, /**< Request to provide an authentication key. \n Reply with @ref sd_ble_gap_auth_key_reply. \n See @ref ble_gap_evt_auth_key_request_t. */ + BLE_GAP_EVT_LESC_DHKEY_REQUEST = BLE_GAP_EVT_BASE + 8, /**< Request to calculate an LE Secure Connections DHKey. \n Reply with @ref sd_ble_gap_lesc_dhkey_reply. \n See @ref ble_gap_evt_lesc_dhkey_request_t */ + BLE_GAP_EVT_AUTH_STATUS = BLE_GAP_EVT_BASE + 9, /**< Authentication procedure completed with status. \n See @ref ble_gap_evt_auth_status_t. */ + BLE_GAP_EVT_CONN_SEC_UPDATE = BLE_GAP_EVT_BASE + 10, /**< Connection security updated. \n See @ref ble_gap_evt_conn_sec_update_t. */ + BLE_GAP_EVT_TIMEOUT = BLE_GAP_EVT_BASE + 11, /**< Timeout expired. \n See @ref ble_gap_evt_timeout_t. */ + BLE_GAP_EVT_RSSI_CHANGED = BLE_GAP_EVT_BASE + 12, /**< RSSI report. \n See @ref ble_gap_evt_rssi_changed_t. */ + BLE_GAP_EVT_ADV_REPORT = BLE_GAP_EVT_BASE + 13, /**< Advertising report. \n See @ref ble_gap_evt_adv_report_t. */ + BLE_GAP_EVT_SEC_REQUEST = BLE_GAP_EVT_BASE + 14, /**< Security Request. \n See @ref ble_gap_evt_sec_request_t. */ + BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST = BLE_GAP_EVT_BASE + 15, /**< Connection Parameter Update Request. \n Reply with @ref sd_ble_gap_conn_param_update. \n See @ref ble_gap_evt_conn_param_update_request_t. */ + BLE_GAP_EVT_SCAN_REQ_REPORT = BLE_GAP_EVT_BASE + 16, /**< Scan request report. \n See @ref ble_gap_evt_scan_req_report_t. */ + BLE_GAP_EVT_PHY_UPDATE_REQUEST = BLE_GAP_EVT_BASE + 17, /**< PHY Update Request. \n Reply with @ref sd_ble_gap_phy_update. \n See @ref ble_gap_evt_phy_update_request_t. */ + BLE_GAP_EVT_PHY_UPDATE = BLE_GAP_EVT_BASE + 18, /**< PHY Update Procedure is complete. \n See @ref ble_gap_evt_phy_update_t. */ + BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST = BLE_GAP_EVT_BASE + 19, /**< Data Length Update Request. \n Reply with @ref sd_ble_gap_data_length_update.\n See @ref ble_gap_evt_data_length_update_request_t. */ + BLE_GAP_EVT_DATA_LENGTH_UPDATE = BLE_GAP_EVT_BASE + 20, /**< LL Data Channel PDU payload length updated. \n See @ref ble_gap_evt_data_length_update_t. */ + BLE_GAP_EVT_QOS_CHANNEL_SURVEY_REPORT = BLE_GAP_EVT_BASE + 21, /**< Channel survey report. \n See @ref ble_gap_evt_qos_channel_survey_report_t. */ + BLE_GAP_EVT_ADV_SET_TERMINATED = BLE_GAP_EVT_BASE + 22, /**< Advertising set terminated. \n See @ref ble_gap_evt_adv_set_terminated_t. */ +}; + +/**@brief GAP Option IDs. + * IDs that uniquely identify a GAP option. + */ +enum BLE_GAP_OPTS +{ + BLE_GAP_OPT_CH_MAP = BLE_GAP_OPT_BASE, /**< Channel Map. @ref ble_gap_opt_ch_map_t */ + BLE_GAP_OPT_LOCAL_CONN_LATENCY = BLE_GAP_OPT_BASE + 1, /**< Local connection latency. @ref ble_gap_opt_local_conn_latency_t */ + BLE_GAP_OPT_PASSKEY = BLE_GAP_OPT_BASE + 2, /**< Set passkey. @ref ble_gap_opt_passkey_t */ + BLE_GAP_OPT_COMPAT_MODE_1 = BLE_GAP_OPT_BASE + 3, /**< Compatibility mode. @ref ble_gap_opt_compat_mode_1_t */ + BLE_GAP_OPT_AUTH_PAYLOAD_TIMEOUT = BLE_GAP_OPT_BASE + 4, /**< Set Authenticated payload timeout. @ref ble_gap_opt_auth_payload_timeout_t */ + BLE_GAP_OPT_SLAVE_LATENCY_DISABLE = BLE_GAP_OPT_BASE + 5, /**< Disable slave latency. @ref ble_gap_opt_slave_latency_disable_t */ +}; + +/**@brief GAP Configuration IDs. + * + * IDs that uniquely identify a GAP configuration. + */ +enum BLE_GAP_CFGS +{ + BLE_GAP_CFG_ROLE_COUNT = BLE_GAP_CFG_BASE, /**< Role count configuration. */ + BLE_GAP_CFG_DEVICE_NAME = BLE_GAP_CFG_BASE + 1, /**< Device name configuration. */ +}; + +/**@brief GAP TX Power roles. + */ +enum BLE_GAP_TX_POWER_ROLES +{ + BLE_GAP_TX_POWER_ROLE_ADV = 1, /**< Advertiser role. */ + BLE_GAP_TX_POWER_ROLE_SCAN_INIT = 2, /**< Scanner and initiator role. */ + BLE_GAP_TX_POWER_ROLE_CONN = 3, /**< Connection role. */ +}; + +/** @} */ + +/**@addtogroup BLE_GAP_DEFINES Defines + * @{ */ + +/**@defgroup BLE_ERRORS_GAP SVC return values specific to GAP + * @{ */ +#define BLE_ERROR_GAP_UUID_LIST_MISMATCH (NRF_GAP_ERR_BASE + 0x000) /**< UUID list does not contain an integral number of UUIDs. */ +#define BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST (NRF_GAP_ERR_BASE + 0x001) /**< Use of Whitelist not permitted with discoverable advertising. */ +#define BLE_ERROR_GAP_INVALID_BLE_ADDR (NRF_GAP_ERR_BASE + 0x002) /**< The upper two bits of the address do not correspond to the specified address type. */ +#define BLE_ERROR_GAP_WHITELIST_IN_USE (NRF_GAP_ERR_BASE + 0x003) /**< Attempt to modify the whitelist while already in use by another operation. */ +#define BLE_ERROR_GAP_DEVICE_IDENTITIES_IN_USE (NRF_GAP_ERR_BASE + 0x004) /**< Attempt to modify the device identity list while already in use by another operation. */ +#define BLE_ERROR_GAP_DEVICE_IDENTITIES_DUPLICATE (NRF_GAP_ERR_BASE + 0x005) /**< The device identity list contains entries with duplicate identity addresses. */ +/**@} */ + + +/**@defgroup BLE_GAP_ROLES GAP Roles + * @{ */ +#define BLE_GAP_ROLE_INVALID 0x0 /**< Invalid Role. */ +#define BLE_GAP_ROLE_PERIPH 0x1 /**< Peripheral Role. */ +#define BLE_GAP_ROLE_CENTRAL 0x2 /**< Central Role. */ +/**@} */ + + +/**@defgroup BLE_GAP_TIMEOUT_SOURCES GAP Timeout sources + * @{ */ +#define BLE_GAP_TIMEOUT_SRC_SCAN 0x01 /**< Scanning timeout. */ +#define BLE_GAP_TIMEOUT_SRC_CONN 0x02 /**< Connection timeout. */ +#define BLE_GAP_TIMEOUT_SRC_AUTH_PAYLOAD 0x03 /**< Authenticated payload timeout. */ +/**@} */ + + +/**@defgroup BLE_GAP_ADDR_TYPES GAP Address types + * @{ */ +#define BLE_GAP_ADDR_TYPE_PUBLIC 0x00 /**< Public (identity) address.*/ +#define BLE_GAP_ADDR_TYPE_RANDOM_STATIC 0x01 /**< Random static (identity) address. */ +#define BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE 0x02 /**< Random private resolvable address. */ +#define BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE 0x03 /**< Random private non-resolvable address. */ +#define BLE_GAP_ADDR_TYPE_ANONYMOUS 0x7F /**< An advertiser may advertise without its address. + This type of advertising is called anonymous. */ +/**@} */ + + +/**@brief The default interval in seconds at which a private address is refreshed. */ +#define BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S (900) /* 15 minutes. */ +/**@brief The maximum interval in seconds at which a private address can be refreshed. */ +#define BLE_GAP_MAX_PRIVATE_ADDR_CYCLE_INTERVAL_S (41400) /* 11 hours 30 minutes. */ + + +/** @brief BLE address length. */ +#define BLE_GAP_ADDR_LEN (6) + +/**@defgroup BLE_GAP_PRIVACY_MODES Privacy modes + * @{ */ +#define BLE_GAP_PRIVACY_MODE_OFF 0x00 /**< Device will send and accept its identity address for its own address. */ +#define BLE_GAP_PRIVACY_MODE_DEVICE_PRIVACY 0x01 /**< Device will send and accept only private addresses for its own address. */ +#define BLE_GAP_PRIVACY_MODE_NETWORK_PRIVACY 0x02 /**< Device will send and accept only private addresses for its own address, + and will not accept a peer using identity address as sender address when + the peer IRK is exchanged, non-zero and added to the identity list. */ +/**@} */ + +/** @brief Invalid power level. */ +#define BLE_GAP_POWER_LEVEL_INVALID 127 + +/** @brief Advertising set handle not set. */ +#define BLE_GAP_ADV_SET_HANDLE_NOT_SET (0xFF) + +/** @brief The default number of advertising sets. */ +#define BLE_GAP_ADV_SET_COUNT_DEFAULT (1) + +/** @brief The maximum number of advertising sets supported by this SoftDevice. */ +#define BLE_GAP_ADV_SET_COUNT_MAX (1) + +/**@defgroup BLE_GAP_ADV_SET_DATA_SIZES Advertising data sizes. + * @{ */ +#define BLE_GAP_ADV_SET_DATA_SIZE_MAX (31) /**< Maximum data length for an advertising set. */ +/**@}. */ + +/** @brief Set ID not available in advertising report. */ +#define BLE_GAP_ADV_REPORT_SET_ID_NOT_AVAILABLE 0xFF + +/**@defgroup BLE_GAP_EVT_ADV_SET_TERMINATED_REASON GAP Advertising Set Terminated reasons + * @{ */ +#define BLE_GAP_EVT_ADV_SET_TERMINATED_REASON_TIMEOUT 0x01 /**< Timeout value reached. */ +#define BLE_GAP_EVT_ADV_SET_TERMINATED_REASON_LIMIT_REACHED 0x02 /**< @ref ble_gap_adv_params_t::max_adv_evts was reached. */ +/**@} */ + +/**@defgroup BLE_GAP_AD_TYPE_DEFINITIONS GAP Advertising and Scan Response Data format + * @note Found at https://www.bluetooth.org/Technical/AssignedNumbers/generic_access_profile.htm + * @{ */ +#define BLE_GAP_AD_TYPE_FLAGS 0x01 /**< Flags for discoverability. */ +#define BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_MORE_AVAILABLE 0x02 /**< Partial list of 16 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_COMPLETE 0x03 /**< Complete list of 16 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_MORE_AVAILABLE 0x04 /**< Partial list of 32 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_COMPLETE 0x05 /**< Complete list of 32 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_MORE_AVAILABLE 0x06 /**< Partial list of 128 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_COMPLETE 0x07 /**< Complete list of 128 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_SHORT_LOCAL_NAME 0x08 /**< Short local device name. */ +#define BLE_GAP_AD_TYPE_COMPLETE_LOCAL_NAME 0x09 /**< Complete local device name. */ +#define BLE_GAP_AD_TYPE_TX_POWER_LEVEL 0x0A /**< Transmit power level. */ +#define BLE_GAP_AD_TYPE_CLASS_OF_DEVICE 0x0D /**< Class of device. */ +#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C 0x0E /**< Simple Pairing Hash C. */ +#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R 0x0F /**< Simple Pairing Randomizer R. */ +#define BLE_GAP_AD_TYPE_SECURITY_MANAGER_TK_VALUE 0x10 /**< Security Manager TK Value. */ +#define BLE_GAP_AD_TYPE_SECURITY_MANAGER_OOB_FLAGS 0x11 /**< Security Manager Out Of Band Flags. */ +#define BLE_GAP_AD_TYPE_SLAVE_CONNECTION_INTERVAL_RANGE 0x12 /**< Slave Connection Interval Range. */ +#define BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_16BIT 0x14 /**< List of 16-bit Service Solicitation UUIDs. */ +#define BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_128BIT 0x15 /**< List of 128-bit Service Solicitation UUIDs. */ +#define BLE_GAP_AD_TYPE_SERVICE_DATA 0x16 /**< Service Data - 16-bit UUID. */ +#define BLE_GAP_AD_TYPE_PUBLIC_TARGET_ADDRESS 0x17 /**< Public Target Address. */ +#define BLE_GAP_AD_TYPE_RANDOM_TARGET_ADDRESS 0x18 /**< Random Target Address. */ +#define BLE_GAP_AD_TYPE_APPEARANCE 0x19 /**< Appearance. */ +#define BLE_GAP_AD_TYPE_ADVERTISING_INTERVAL 0x1A /**< Advertising Interval. */ +#define BLE_GAP_AD_TYPE_LE_BLUETOOTH_DEVICE_ADDRESS 0x1B /**< LE Bluetooth Device Address. */ +#define BLE_GAP_AD_TYPE_LE_ROLE 0x1C /**< LE Role. */ +#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C256 0x1D /**< Simple Pairing Hash C-256. */ +#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R256 0x1E /**< Simple Pairing Randomizer R-256. */ +#define BLE_GAP_AD_TYPE_SERVICE_DATA_32BIT_UUID 0x20 /**< Service Data - 32-bit UUID. */ +#define BLE_GAP_AD_TYPE_SERVICE_DATA_128BIT_UUID 0x21 /**< Service Data - 128-bit UUID. */ +#define BLE_GAP_AD_TYPE_LESC_CONFIRMATION_VALUE 0x22 /**< LE Secure Connections Confirmation Value */ +#define BLE_GAP_AD_TYPE_LESC_RANDOM_VALUE 0x23 /**< LE Secure Connections Random Value */ +#define BLE_GAP_AD_TYPE_URI 0x24 /**< URI */ +#define BLE_GAP_AD_TYPE_3D_INFORMATION_DATA 0x3D /**< 3D Information Data. */ +#define BLE_GAP_AD_TYPE_MANUFACTURER_SPECIFIC_DATA 0xFF /**< Manufacturer Specific Data. */ +/**@} */ + + +/**@defgroup BLE_GAP_ADV_FLAGS GAP Advertisement Flags + * @{ */ +#define BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE (0x01) /**< LE Limited Discoverable Mode. */ +#define BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE (0x02) /**< LE General Discoverable Mode. */ +#define BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED (0x04) /**< BR/EDR not supported. */ +#define BLE_GAP_ADV_FLAG_LE_BR_EDR_CONTROLLER (0x08) /**< Simultaneous LE and BR/EDR, Controller. */ +#define BLE_GAP_ADV_FLAG_LE_BR_EDR_HOST (0x10) /**< Simultaneous LE and BR/EDR, Host. */ +#define BLE_GAP_ADV_FLAGS_LE_ONLY_LIMITED_DISC_MODE (BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE | BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED) /**< LE Limited Discoverable Mode, BR/EDR not supported. */ +#define BLE_GAP_ADV_FLAGS_LE_ONLY_GENERAL_DISC_MODE (BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE | BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED) /**< LE General Discoverable Mode, BR/EDR not supported. */ +/**@} */ + + +/**@defgroup BLE_GAP_ADV_INTERVALS GAP Advertising interval max and min + * @{ */ +#define BLE_GAP_ADV_INTERVAL_MIN 0x000020 /**< Minimum Advertising interval in 625 us units, i.e. 20 ms. */ +#define BLE_GAP_ADV_INTERVAL_MAX 0x004000 /**< Maximum Advertising interval in 625 us units, i.e. 10.24 s. + @note Support for values above @ref BLE_GAP_ADV_INTERVAL_MAX + is experimental. Values above 0xFFFFFF, i.e 10,485.759375 s + are not supported. */ + /**@} */ + + +/**@defgroup BLE_GAP_SCAN_INTERVALS GAP Scan interval max and min + * @{ */ +#define BLE_GAP_SCAN_INTERVAL_MIN 0x0004 /**< Minimum Scan interval in 625 us units, i.e. 2.5 ms. */ +#define BLE_GAP_SCAN_INTERVAL_MAX 0xFFFF /**< Maximum Scan interval in 625 us units, i.e. 40,959.375 s. */ + /** @} */ + + +/**@defgroup BLE_GAP_SCAN_WINDOW GAP Scan window max and min + * @{ */ +#define BLE_GAP_SCAN_WINDOW_MIN 0x0004 /**< Minimum Scan window in 625 us units, i.e. 2.5 ms. */ +#define BLE_GAP_SCAN_WINDOW_MAX 0xFFFF /**< Maximum Scan window in 625 us units, i.e. 40,959.375 s. */ + /** @} */ + + +/**@defgroup BLE_GAP_SCAN_TIMEOUT GAP Scan timeout max and min + * @{ */ +#define BLE_GAP_SCAN_TIMEOUT_MIN 0x0001 /**< Minimum Scan timeout in 10 ms units, i.e 10 ms. */ +#define BLE_GAP_SCAN_TIMEOUT_UNLIMITED 0x0000 /**< Continue to scan forever. */ + /** @} */ + +/**@defgroup BLE_GAP_SCAN_BUFFER_SIZE GAP Minimum scanner buffer size + * + * Scan buffers are used for storing advertising data received from an advertiser. + * If ble_gap_scan_params_t::extended is set to 0, @ref BLE_GAP_SCAN_BUFFER_MIN is the minimum scan buffer length. + * else the minimum scan buffer size is @ref BLE_GAP_SCAN_BUFFER_EXTENDED_MIN. + * @{ */ +#define BLE_GAP_SCAN_BUFFER_MIN (31) /**< Minimum data length for an + advertising set. */ +#define BLE_GAP_SCAN_BUFFER_MAX (31) /**< Maximum data length for an + advertising set. */ +#define BLE_GAP_SCAN_BUFFER_EXTENDED_MIN (255) /**< Minimum data length for an + extended advertising set. */ +#define BLE_GAP_SCAN_BUFFER_EXTENDED_MAX (1650) /**< Maximum data length for an + extended advertising set. + @note Extended scanning is only + supported as an experimental + feature in this SoftDevice. + The scanner will only receive + advertising data up to 31 bytes. */ +/** @} */ + +/**@defgroup BLE_GAP_ADV_TYPES GAP Advertising types + * + * Advertising types defined in Bluetooth Core Specification v5.0, Vol 6, Part B, Section 4.4.2. + * + * The maximum advertising data length is defined by @ref BLE_GAP_ADV_SET_DATA_SIZE_MAX. + * Note that some of the advertising types do not support advertising data. Non-scannable types do not support + * scan response data. + * + * @{ */ +#define BLE_GAP_ADV_TYPE_CONNECTABLE_SCANNABLE_UNDIRECTED 0x01 /**< Connectable and scannable undirected + advertising events. */ +#define BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED_HIGH_DUTY_CYCLE 0x02 /**< Connectable non-scannable directed advertising + events. Advertising interval is less that 3.75 ms. + Use this type for fast reconnections. + @note Advertising data is not supported. */ +#define BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED 0x03 /**< Connectable non-scannable directed advertising + events. + @note Advertising data is not supported. */ +#define BLE_GAP_ADV_TYPE_NONCONNECTABLE_SCANNABLE_UNDIRECTED 0x04 /**< Non-connectable scannable undirected + advertising events. */ +#define BLE_GAP_ADV_TYPE_NONCONNECTABLE_NONSCANNABLE_UNDIRECTED 0x05 /**< Non-connectable non-scannable undirected + advertising events. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_CONNECTABLE_NONSCANNABLE_UNDIRECTED 0x06 /**< Connectable non-scannable undirected advertising + events using extended advertising PDUs. + @note Extended advertising types are only + supported as experimental features in this + SoftDevice. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_CONNECTABLE_NONSCANNABLE_DIRECTED 0x07 /**< Connectable non-scannable directed advertising + events using extended advertising PDUs. + @note Extended advertising types are only + supported as experimental features in this + SoftDevice. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_SCANNABLE_UNDIRECTED 0x08 /**< Non-connectable scannable undirected advertising + events using extended advertising PDUs. + @note Only scan response data is supported. + @note Extended advertising types are only + supported as experimental features in this + SoftDevice. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_SCANNABLE_DIRECTED 0x09 /**< Non-connectable scannable directed advertising + events using extended advertising PDUs. + @note Only scan response data is supported. + @note Extended advertising types are only + supported as experimental features in this + SoftDevice. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_NONSCANNABLE_UNDIRECTED 0x0A /**< Non-connectable non-scannable undirected advertising + events using extended advertising PDUs. + @note Extended advertising types are only + supported as experimental features in this + SoftDevice. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_NONSCANNABLE_DIRECTED 0x0B /**< Non-connectable non-scannable directed advertising + events using extended advertising PDUs. + @note Extended advertising types are only + supported as experimental features in this + SoftDevice. */ +/**@} */ + +/**@defgroup BLE_GAP_ADV_FILTER_POLICIES GAP Advertising filter policies + * @{ */ +#define BLE_GAP_ADV_FP_ANY 0x00 /**< Allow scan requests and connect requests from any device. */ +#define BLE_GAP_ADV_FP_FILTER_SCANREQ 0x01 /**< Filter scan requests with whitelist. */ +#define BLE_GAP_ADV_FP_FILTER_CONNREQ 0x02 /**< Filter connect requests with whitelist. */ +#define BLE_GAP_ADV_FP_FILTER_BOTH 0x03 /**< Filter both scan and connect requests with whitelist. */ +/**@} */ + +/**@defgroup BLE_GAP_ADV_DATA_STATUS GAP Advertising data status + * @{ */ +#define BLE_GAP_ADV_DATA_STATUS_COMPLETE 0x00 /**< All data in the advertising event have been received. */ +#define BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA 0x01 /**< More data to be received. */ +#define BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_TRUNCATED 0x02 /**< Incomplete data. Buffer size insufficient to receive more. */ +#define BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MISSED 0x03 /**< Failed to receive the remaining data. */ +/**@} */ + +/**@defgroup BLE_GAP_SCAN_FILTER_POLICIES GAP Scanner filter policies + * @{ */ +#define BLE_GAP_SCAN_FP_ACCEPT_ALL 0x00 /**< Accept all advertising packets except directed advertising packets + not addressed to this device. */ +#define BLE_GAP_SCAN_FP_WHITELIST 0x01 /**< Accept advertising packets from devices in the whitelist except directed + packets not addressed to this device. */ +#define BLE_GAP_SCAN_FP_ALL_NOT_RESOLVED_DIRECTED 0x02 /**< Accept all advertising packets specified in @ref BLE_GAP_SCAN_FP_ACCEPT_ALL. + In addition, accept directed advertising packets, where the advertiser's + address is a resolvable private address that cannot be resolved. */ +#define BLE_GAP_SCAN_FP_WHITELIST_NOT_RESOLVED_DIRECTED 0x03 /**< Accept all advertising packets specified in @ref BLE_GAP_SCAN_FP_WHITELIST. + In addition, accept directed advertising packets, where the advertiser's + address is a resolvable private address that cannot be resolved. */ +/**@} */ + +/**@defgroup BLE_GAP_ADV_TIMEOUT_VALUES GAP Advertising timeout values in 10 ms units + * @{ */ +#define BLE_GAP_ADV_TIMEOUT_HIGH_DUTY_MAX (128) /**< Maximum high duty advertising time in 10 ms units. Corresponds to 1.28 s. */ +#define BLE_GAP_ADV_TIMEOUT_LIMITED_MAX (18000) /**< Maximum advertising time in 10 ms units corresponding to TGAP(lim_adv_timeout) = 180 s in limited discoverable mode. */ +#define BLE_GAP_ADV_TIMEOUT_GENERAL_UNLIMITED (0) /**< Unlimited advertising in general discoverable mode. + For high duty cycle advertising, this corresponds to @ref BLE_GAP_ADV_TIMEOUT_HIGH_DUTY_MAX. */ +/**@} */ + + +/**@defgroup BLE_GAP_DISC_MODES GAP Discovery modes + * @{ */ +#define BLE_GAP_DISC_MODE_NOT_DISCOVERABLE 0x00 /**< Not discoverable discovery Mode. */ +#define BLE_GAP_DISC_MODE_LIMITED 0x01 /**< Limited Discovery Mode. */ +#define BLE_GAP_DISC_MODE_GENERAL 0x02 /**< General Discovery Mode. */ +/**@} */ + + +/**@defgroup BLE_GAP_IO_CAPS GAP IO Capabilities + * @{ */ +#define BLE_GAP_IO_CAPS_DISPLAY_ONLY 0x00 /**< Display Only. */ +#define BLE_GAP_IO_CAPS_DISPLAY_YESNO 0x01 /**< Display and Yes/No entry. */ +#define BLE_GAP_IO_CAPS_KEYBOARD_ONLY 0x02 /**< Keyboard Only. */ +#define BLE_GAP_IO_CAPS_NONE 0x03 /**< No I/O capabilities. */ +#define BLE_GAP_IO_CAPS_KEYBOARD_DISPLAY 0x04 /**< Keyboard and Display. */ +/**@} */ + + +/**@defgroup BLE_GAP_AUTH_KEY_TYPES GAP Authentication Key Types + * @{ */ +#define BLE_GAP_AUTH_KEY_TYPE_NONE 0x00 /**< No key (may be used to reject). */ +#define BLE_GAP_AUTH_KEY_TYPE_PASSKEY 0x01 /**< 6-digit Passkey. */ +#define BLE_GAP_AUTH_KEY_TYPE_OOB 0x02 /**< Out Of Band data. */ +/**@} */ + + +/**@defgroup BLE_GAP_KP_NOT_TYPES GAP Keypress Notification Types + * @{ */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_START 0x00 /**< Passkey entry started. */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_DIGIT_IN 0x01 /**< Passkey digit entered. */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_DIGIT_OUT 0x02 /**< Passkey digit erased. */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_CLEAR 0x03 /**< Passkey cleared. */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_END 0x04 /**< Passkey entry completed. */ +/**@} */ + + +/**@defgroup BLE_GAP_SEC_STATUS GAP Security status + * @{ */ +#define BLE_GAP_SEC_STATUS_SUCCESS 0x00 /**< Procedure completed with success. */ +#define BLE_GAP_SEC_STATUS_TIMEOUT 0x01 /**< Procedure timed out. */ +#define BLE_GAP_SEC_STATUS_PDU_INVALID 0x02 /**< Invalid PDU received. */ +#define BLE_GAP_SEC_STATUS_RFU_RANGE1_BEGIN 0x03 /**< Reserved for Future Use range #1 begin. */ +#define BLE_GAP_SEC_STATUS_RFU_RANGE1_END 0x80 /**< Reserved for Future Use range #1 end. */ +#define BLE_GAP_SEC_STATUS_PASSKEY_ENTRY_FAILED 0x81 /**< Passkey entry failed (user canceled or other). */ +#define BLE_GAP_SEC_STATUS_OOB_NOT_AVAILABLE 0x82 /**< Out of Band Key not available. */ +#define BLE_GAP_SEC_STATUS_AUTH_REQ 0x83 /**< Authentication requirements not met. */ +#define BLE_GAP_SEC_STATUS_CONFIRM_VALUE 0x84 /**< Confirm value failed. */ +#define BLE_GAP_SEC_STATUS_PAIRING_NOT_SUPP 0x85 /**< Pairing not supported. */ +#define BLE_GAP_SEC_STATUS_ENC_KEY_SIZE 0x86 /**< Encryption key size. */ +#define BLE_GAP_SEC_STATUS_SMP_CMD_UNSUPPORTED 0x87 /**< Unsupported SMP command. */ +#define BLE_GAP_SEC_STATUS_UNSPECIFIED 0x88 /**< Unspecified reason. */ +#define BLE_GAP_SEC_STATUS_REPEATED_ATTEMPTS 0x89 /**< Too little time elapsed since last attempt. */ +#define BLE_GAP_SEC_STATUS_INVALID_PARAMS 0x8A /**< Invalid parameters. */ +#define BLE_GAP_SEC_STATUS_DHKEY_FAILURE 0x8B /**< DHKey check failure. */ +#define BLE_GAP_SEC_STATUS_NUM_COMP_FAILURE 0x8C /**< Numeric Comparison failure. */ +#define BLE_GAP_SEC_STATUS_BR_EDR_IN_PROG 0x8D /**< BR/EDR pairing in progress. */ +#define BLE_GAP_SEC_STATUS_X_TRANS_KEY_DISALLOWED 0x8E /**< BR/EDR Link Key cannot be used for LE keys. */ +#define BLE_GAP_SEC_STATUS_RFU_RANGE2_BEGIN 0x8F /**< Reserved for Future Use range #2 begin. */ +#define BLE_GAP_SEC_STATUS_RFU_RANGE2_END 0xFF /**< Reserved for Future Use range #2 end. */ +/**@} */ + + +/**@defgroup BLE_GAP_SEC_STATUS_SOURCES GAP Security status sources + * @{ */ +#define BLE_GAP_SEC_STATUS_SOURCE_LOCAL 0x00 /**< Local failure. */ +#define BLE_GAP_SEC_STATUS_SOURCE_REMOTE 0x01 /**< Remote failure. */ +/**@} */ + + +/**@defgroup BLE_GAP_CP_LIMITS GAP Connection Parameters Limits + * @{ */ +#define BLE_GAP_CP_MIN_CONN_INTVL_NONE 0xFFFF /**< No new minimum connection interval specified in connect parameters. */ +#define BLE_GAP_CP_MIN_CONN_INTVL_MIN 0x0006 /**< Lowest minimum connection interval permitted, in units of 1.25 ms, i.e. 7.5 ms. */ +#define BLE_GAP_CP_MIN_CONN_INTVL_MAX 0x0C80 /**< Highest minimum connection interval permitted, in units of 1.25 ms, i.e. 4 s. */ +#define BLE_GAP_CP_MAX_CONN_INTVL_NONE 0xFFFF /**< No new maximum connection interval specified in connect parameters. */ +#define BLE_GAP_CP_MAX_CONN_INTVL_MIN 0x0006 /**< Lowest maximum connection interval permitted, in units of 1.25 ms, i.e. 7.5 ms. */ +#define BLE_GAP_CP_MAX_CONN_INTVL_MAX 0x0C80 /**< Highest maximum connection interval permitted, in units of 1.25 ms, i.e. 4 s. */ +#define BLE_GAP_CP_SLAVE_LATENCY_MAX 0x01F3 /**< Highest slave latency permitted, in connection events. */ +#define BLE_GAP_CP_CONN_SUP_TIMEOUT_NONE 0xFFFF /**< No new supervision timeout specified in connect parameters. */ +#define BLE_GAP_CP_CONN_SUP_TIMEOUT_MIN 0x000A /**< Lowest supervision timeout permitted, in units of 10 ms, i.e. 100 ms. */ +#define BLE_GAP_CP_CONN_SUP_TIMEOUT_MAX 0x0C80 /**< Highest supervision timeout permitted, in units of 10 ms, i.e. 32 s. */ +/**@} */ + + +/**@defgroup BLE_GAP_DEVNAME GAP device name defines. + * @{ */ +#define BLE_GAP_DEVNAME_DEFAULT "nRF5x" /**< Default device name value. */ +#define BLE_GAP_DEVNAME_DEFAULT_LEN 31 /**< Default number of octets in device name. */ +#define BLE_GAP_DEVNAME_MAX_LEN 248 /**< Maximum number of octets in device name. */ +/**@} */ + + +/**@brief Disable RSSI events for connections */ +#define BLE_GAP_RSSI_THRESHOLD_INVALID 0xFF + +/**@defgroup BLE_GAP_PHYS GAP PHYs + * @{ */ +#define BLE_GAP_PHY_AUTO 0x00 /**< Automatic PHY selection. Refer @ref sd_ble_gap_phy_update for more information.*/ +#define BLE_GAP_PHY_1MBPS 0x01 /**< 1 Mbps PHY. */ +#define BLE_GAP_PHY_2MBPS 0x02 /**< 2 Mbps PHY. */ +#define BLE_GAP_PHY_CODED 0x04 /**< Coded PHY. */ +#define BLE_GAP_PHY_NOT_SET 0xFF /**< PHY is not configured. */ + +/**@brief Supported PHYs in connections, for scanning, and for advertising. */ +#define BLE_GAP_PHYS_SUPPORTED (BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS | BLE_GAP_PHY_CODED) /**< All PHYs are supported. + @note Coded PHY is only supported + as an experimental feature + in this SoftDevice. */ + +/**@} */ + +/**@defgroup BLE_GAP_CONN_SEC_MODE_SET_MACROS GAP attribute security requirement setters + * + * See @ref ble_gap_conn_sec_mode_t. + * @{ */ +/**@brief Set sec_mode pointed to by ptr to have no access rights.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_NO_ACCESS(ptr) do {(ptr)->sm = 0; (ptr)->lv = 0;} while(0) +/**@brief Set sec_mode pointed to by ptr to require no protection, open link.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_OPEN(ptr) do {(ptr)->sm = 1; (ptr)->lv = 1;} while(0) +/**@brief Set sec_mode pointed to by ptr to require encryption, but no MITM protection.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_ENC_NO_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 2;} while(0) +/**@brief Set sec_mode pointed to by ptr to require encryption and MITM protection.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_ENC_WITH_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 3;} while(0) +/**@brief Set sec_mode pointed to by ptr to require LESC encryption and MITM protection.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_LESC_ENC_WITH_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 4;} while(0) +/**@brief Set sec_mode pointed to by ptr to require signing or encryption, no MITM protection needed.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_SIGNED_NO_MITM(ptr) do {(ptr)->sm = 2; (ptr)->lv = 1;} while(0) +/**@brief Set sec_mode pointed to by ptr to require signing or encryption with MITM protection.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_SIGNED_WITH_MITM(ptr) do {(ptr)->sm = 2; (ptr)->lv = 2;} while(0) +/**@} */ + + +/**@brief GAP Security Random Number Length. */ +#define BLE_GAP_SEC_RAND_LEN 8 + + +/**@brief GAP Security Key Length. */ +#define BLE_GAP_SEC_KEY_LEN 16 + + +/**@brief GAP LE Secure Connections Elliptic Curve Diffie-Hellman P-256 Public Key Length. */ +#define BLE_GAP_LESC_P256_PK_LEN 64 + + +/**@brief GAP LE Secure Connections Elliptic Curve Diffie-Hellman DHKey Length. */ +#define BLE_GAP_LESC_DHKEY_LEN 32 + + +/**@brief GAP Passkey Length. */ +#define BLE_GAP_PASSKEY_LEN 6 + + +/**@brief Maximum amount of addresses in the whitelist. */ +#define BLE_GAP_WHITELIST_ADDR_MAX_COUNT (8) + + +/**@brief Maximum amount of identities in the device identities list. */ +#define BLE_GAP_DEVICE_IDENTITIES_MAX_COUNT (8) + + +/**@brief Default connection count for a configuration. */ +#define BLE_GAP_CONN_COUNT_DEFAULT (1) + + +/**@defgroup BLE_GAP_EVENT_LENGTH GAP event length defines. + * @{ */ +#define BLE_GAP_EVENT_LENGTH_MIN (2) /**< Minimum event length, in 1.25 ms units. */ +#define BLE_GAP_EVENT_LENGTH_CODED_PHY_MIN (6) /**< The shortest event length in 1.25 ms units supporting LE Coded PHY. */ +#define BLE_GAP_EVENT_LENGTH_DEFAULT (3) /**< Default event length, in 1.25 ms units. */ +/**@} */ + + +/**@defgroup BLE_GAP_ROLE_COUNT GAP concurrent connection count defines. + * @{ */ +#define BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT (1) /**< Default maximum number of connections concurrently acting as peripherals. */ +#define BLE_GAP_ROLE_COUNT_CENTRAL_DEFAULT (3) /**< Default maximum number of connections concurrently acting as centrals. */ +#define BLE_GAP_ROLE_COUNT_CENTRAL_SEC_DEFAULT (1) /**< Default number of SMP instances shared between all connections acting as centrals. */ +#define BLE_GAP_ROLE_COUNT_COMBINED_MAX (20) /**< Maximum supported number of concurrent connections in the peripheral and central roles combined. */ + +/**@} */ + +/**@brief Automatic data length parameter. */ +#define BLE_GAP_DATA_LENGTH_AUTO 0 + +/**@defgroup BLE_GAP_AUTH_PAYLOAD_TIMEOUT Authenticated payload timeout defines. + * @{ */ +#define BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MAX (48000) /**< Maximum authenticated payload timeout in 10 ms units, i.e. 8 minutes. */ +#define BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MIN (1) /**< Minimum authenticated payload timeout in 10 ms units, i.e. 10 ms. */ +/**@} */ + +/**@defgroup GAP_SEC_MODES GAP Security Modes + * @{ */ +#define BLE_GAP_SEC_MODE 0x00 /**< No key (may be used to reject). */ +/**@} */ + +/**@brief The total number of channels in Bluetooth Low Energy. */ +#define BLE_GAP_CHANNEL_COUNT (40) + +/**@defgroup BLE_GAP_QOS_CHANNEL_SURVEY_INTERVALS Quality of Service (QoS) Channel survey interval defines + * @{ */ +#define BLE_GAP_QOS_CHANNEL_SURVEY_INTERVAL_CONTINUOUS (0) /**< Continuous channel survey. */ +#define BLE_GAP_QOS_CHANNEL_SURVEY_INTERVAL_MIN_US (7500) /**< Minimum channel survey interval in microseconds (7.5 ms). */ +#define BLE_GAP_QOS_CHANNEL_SURVEY_INTERVAL_MAX_US (4000000) /**< Maximum channel survey interval in microseconds (4 s). */ + /**@} */ + +/** @} */ + + +/**@addtogroup BLE_GAP_STRUCTURES Structures + * @{ */ + +/**@brief Advertising event properties. */ +typedef struct +{ + uint8_t type; /**< Advertising type. See @ref BLE_GAP_ADV_TYPES. */ + uint8_t anonymous : 1; /**< Omit advertiser's address from all PDUs. + @note Anonymous advertising is only available for + @ref BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_NONSCANNABLE_UNDIRECTED and + @ref BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_NONSCANNABLE_DIRECTED. */ + uint8_t include_tx_power : 1; /**< Include TxPower set by @ref sd_ble_gap_tx_power_set in the extended header + of the advertising PDU. + @note TxPower can only be added to the extended header when @ref type is an extended advertising type. */ +} ble_gap_adv_properties_t; + + +/**@brief Advertising report type. */ +typedef struct +{ + uint16_t connectable : 1; /**< Connectable advertising event type. */ + uint16_t scannable : 1; /**< Scannable advertising event type. */ + uint16_t directed : 1; /**< Directed advertising event type. */ + uint16_t scan_response : 1; /**< Received a scan response. */ + uint16_t extended_pdu : 1; /**< Received an extended advertising set. */ + uint16_t status : 2; /**< Data status. See @ref BLE_GAP_ADV_DATA_STATUS. */ + uint16_t reserved : 9; /**< Reserved for future use. */ +} ble_gap_adv_report_type_t; + +/**@brief Advertising Auxiliary Pointer. */ +typedef struct +{ + uint16_t aux_offset; /**< Time offset from the beginning of advertising packet to the auxiliary packet in 100 us units. */ + uint8_t aux_phy; /**< Indicates the PHY on which the auxiliary advertising packet is sent. See @ref BLE_GAP_PHYS. */ +} ble_gap_aux_pointer_t; + +/**@brief Bluetooth Low Energy address. */ +typedef struct +{ + uint8_t addr_id_peer : 1; /**< Only valid for peer addresses. + Reference to peer in device identities list (as set with @ref sd_ble_gap_device_identities_set) when peer is using privacy. */ + uint8_t addr_type : 7; /**< See @ref BLE_GAP_ADDR_TYPES. */ + uint8_t addr[BLE_GAP_ADDR_LEN]; /**< 48-bit address, LSB format. + addr is not used if addr_type is @ref BLE_GAP_ADDR_TYPE_ANONYMOUS. */ +} ble_gap_addr_t; + + +/**@brief GAP connection parameters. + * + * @note When ble_conn_params_t is received in an event, both min_conn_interval and + * max_conn_interval will be equal to the connection interval set by the central. + * + * @note If both conn_sup_timeout and max_conn_interval are specified, then the following constraint applies: + * conn_sup_timeout * 4 > (1 + slave_latency) * max_conn_interval + * that corresponds to the following Bluetooth Spec requirement: + * The Supervision_Timeout in milliseconds shall be larger than + * (1 + Conn_Latency) * Conn_Interval_Max * 2, where Conn_Interval_Max is given in milliseconds. + */ +typedef struct +{ + uint16_t min_conn_interval; /**< Minimum Connection Interval in 1.25 ms units, see @ref BLE_GAP_CP_LIMITS.*/ + uint16_t max_conn_interval; /**< Maximum Connection Interval in 1.25 ms units, see @ref BLE_GAP_CP_LIMITS.*/ + uint16_t slave_latency; /**< Slave Latency in number of connection events, see @ref BLE_GAP_CP_LIMITS.*/ + uint16_t conn_sup_timeout; /**< Connection Supervision Timeout in 10 ms units, see @ref BLE_GAP_CP_LIMITS.*/ +} ble_gap_conn_params_t; + + +/**@brief GAP connection security modes. + * + * Security Mode 0 Level 0: No access permissions at all (this level is not defined by the Bluetooth Core specification).\n + * Security Mode 1 Level 1: No security is needed (aka open link).\n + * Security Mode 1 Level 2: Encrypted link required, MITM protection not necessary.\n + * Security Mode 1 Level 3: MITM protected encrypted link required.\n + * Security Mode 1 Level 4: LESC MITM protected encrypted link using a 128-bit strength encryption key required.\n + * Security Mode 2 Level 1: Signing or encryption required, MITM protection not necessary.\n + * Security Mode 2 Level 2: MITM protected signing required, unless link is MITM protected encrypted.\n + */ +typedef struct +{ + uint8_t sm : 4; /**< Security Mode (1 or 2), 0 for no permissions at all. */ + uint8_t lv : 4; /**< Level (1, 2, 3 or 4), 0 for no permissions at all. */ + +} ble_gap_conn_sec_mode_t; + + +/**@brief GAP connection security status.*/ +typedef struct +{ + ble_gap_conn_sec_mode_t sec_mode; /**< Currently active security mode for this connection.*/ + uint8_t encr_key_size; /**< Length of currently active encryption key, 7 to 16 octets (only applicable for bonding procedures). */ +} ble_gap_conn_sec_t; + +/**@brief Identity Resolving Key. */ +typedef struct +{ + uint8_t irk[BLE_GAP_SEC_KEY_LEN]; /**< Array containing IRK. */ +} ble_gap_irk_t; + + +/**@brief Channel mask (40 bits). + * Every channel is represented with a bit positioned as per channel index defined in Bluetooth Core Specification v5.0, + * Vol 6, Part B, Section 1.4.1. The LSB contained in array element 0 represents channel index 0, and bit 39 represents + * channel index 39. If a bit is set to 1, the channel is not used. + */ +typedef uint8_t ble_gap_ch_mask_t[5]; + + +/**@brief GAP advertising parameters. */ +typedef struct +{ + ble_gap_adv_properties_t properties; /**< The properties of the advertising events. */ + ble_gap_addr_t const *p_peer_addr; /**< Address of a known peer. + @note ble_gap_addr_t::addr_type cannot be + @ref BLE_GAP_ADDR_TYPE_ANONYMOUS. + - When privacy is enabled and the local device uses + @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE addresses, + the device identity list is searched for a matching entry. If + the local IRK for that device identity is set, the local IRK + for that device will be used to generate the advertiser address + field in the advertising packet. + - If @ref ble_gap_adv_properties_t::type is directed, this must be + set to the targeted scanner or initiator. If the peer address is + in the device identity list, the peer IRK for that device will be + used to generate @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE + target addresses used in the advertising event PDUs. */ + uint32_t interval; /**< Advertising interval in 625 us units. @sa BLE_GAP_ADV_INTERVALS. + @note If @ref ble_gap_adv_properties_t::type is set to + @ref BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED_HIGH_DUTY_CYCLE + advertising, this parameter is ignored. */ + uint16_t duration; /**< Advertising duration in 10 ms units. When timeout is reached, + an event of type @ref BLE_GAP_EVT_ADV_SET_TERMINATED is raised. + @sa BLE_GAP_ADV_TIMEOUT_VALUES. */ + uint8_t max_adv_evts; /**< Maximum advertising events that shall be sent prior to disabling + advertising. Setting the value to 0 disables the limitation. When + the count of advertising events specified by this parameter + (if not 0) is reached, advertising will be automatically stopped + and an event of type @ref BLE_GAP_EVT_ADV_SET_TERMINATED is raised + @note If @ref ble_gap_adv_properties_t::type is set to + @ref BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED_HIGH_DUTY_CYCLE, + this parameter is ignored. + @note Setting max_adv_evts to a values not equal to 0 is only supported + as an experimental feature in this SoftDevice. */ + ble_gap_ch_mask_t channel_mask; /**< Channel mask for primary and secondary advertising channels. + At least one of the primary channels, that is channel index 37-39, must be used. + Masking away secondary advertising channels is not supported. */ + uint8_t filter_policy; /**< Filter Policy. @sa BLE_GAP_ADV_FILTER_POLICIES. */ + uint8_t primary_phy; /**< Indicates the PHY on which the primary advertising channel packets + are transmitted. If set to @ref BLE_GAP_PHY_AUTO, @ref BLE_GAP_PHY_1MBPS + will be used. + Valid values are @ref BLE_GAP_PHY_1MBPS and @ref BLE_GAP_PHY_CODED. + @note The primary_phy shall indicate @ref BLE_GAP_PHY_1MBPS if + @ref ble_gap_adv_properties_t::type is not an extended advertising type. */ + uint8_t secondary_phy; /**< Indicates the PHY on which the secondary advertising channel packets + are transmitted. + If set to @ref BLE_GAP_PHY_AUTO, @ref BLE_GAP_PHY_1MBPS will be used. + Valid values are + @ref BLE_GAP_PHY_1MBPS, @ref BLE_GAP_PHY_2MBPS, and @ref BLE_GAP_PHY_CODED. + If @ref ble_gap_adv_properties_t::type is an extended advertising type + and connectable, this is the PHY that will be used to establish a + connection and send AUX_ADV_IND packets on. + @note This parameter will be ignored when + @ref ble_gap_adv_properties_t::type is not an extended advertising type. */ + uint8_t set_id:4; /**< The advertising set identifier distinguishes this advertising set from other + advertising sets transmitted by this and other devices. + @note This parameter will be ignored when + @ref ble_gap_adv_properties_t::type is not an extended advertising type. */ + uint8_t scan_req_notification:1; /**< Enable scan request notifications for this advertising set. When a + scan request is received and the scanner address is allowed + by the filter policy, @ref BLE_GAP_EVT_SCAN_REQ_REPORT is raised. + @note This parameter will be ignored when + @ref ble_gap_adv_properties_t::type is a non-scannable + advertising type. */ +} ble_gap_adv_params_t; + + +/**@brief GAP advertising data buffers. + * + * The application must provide the buffers for advertisement. The memory shall reside in application RAM, and + * shall never be modified while advertising. The data shall be kept alive until either: + * - @ref BLE_GAP_EVT_ADV_SET_TERMINATED is raised. + * - @ref BLE_GAP_EVT_CONNECTED is raised with @ref ble_gap_evt_connected_t::adv_handle set to the corresponding + * advertising handle. + * - Advertising is stopped. + * - Advertising data is changed. + * To update advertising data while advertising, provide new buffers to @ref sd_ble_gap_adv_set_configure. */ +typedef struct +{ + ble_data_t adv_data; /**< Advertising data. + @note + Advertising data can only be specified for a @ref ble_gap_adv_properties_t::type + that is allowed to contain advertising data. */ + ble_data_t scan_rsp_data; /**< Scan response data. + @note + Scan response data can only be specified for a @ref ble_gap_adv_properties_t::type + that is scannable. */ +} ble_gap_adv_data_t; + + +/**@brief GAP scanning parameters. */ +typedef struct +{ + uint8_t extended : 1; /**< If 1, the scanner will accept extended advertising packets. + If set to 0, the scanner will not receive advertising packets + on secondary advertising channels, and will not be able + to receive long advertising PDUs. + @note Extended scanning is only supported as an experimental feature in this + SoftDevice. */ + uint8_t report_incomplete_evts : 1; /**< If 1, events of type @ref ble_gap_evt_adv_report_t may have + @ref ble_gap_adv_report_type_t::status set to + @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA. + This parameter is ignored when used with @ref sd_ble_gap_connect + @note This may be used to abort receiving more packets from an extended + advertising event, and is only available for extended + scanning, see @ref sd_ble_gap_scan_start. + @note This feature is not supported by this SoftDevice. */ + uint8_t active : 1; /**< If 1, perform active scanning by sending scan requests. + This parameter is ignored when used with @ref sd_ble_gap_connect. */ + uint8_t filter_policy : 2; /**< Scanning filter policy. @sa BLE_GAP_SCAN_FILTER_POLICIES. + @note Only @ref BLE_GAP_SCAN_FP_ACCEPT_ALL and + @ref BLE_GAP_SCAN_FP_WHITELIST are valid when used with + @ref sd_ble_gap_connect */ + uint8_t scan_phys; /**< Bitfield of PHYs to scan on. If set to @ref BLE_GAP_PHY_AUTO, + scan_phys will default to @ref BLE_GAP_PHY_1MBPS. + - If @ref ble_gap_scan_params_t::extended is set to 0, the only + supported PHY is @ref BLE_GAP_PHY_1MBPS. + - When used with @ref sd_ble_gap_scan_start, + the bitfield indicates the PHYs the scanner will use for scanning + on primary advertising channels. The scanner will accept + @ref BLE_GAP_PHYS_SUPPORTED as secondary advertising channel PHYs. + - When used with @ref sd_ble_gap_connect, the + bitfield indicates the PHYs on where a connection may be initiated. + If scan_phys contains @ref BLE_GAP_PHY_1MBPS and/or @ref BLE_GAP_PHY_2MBPS, + the primary scan PHY is @ref BLE_GAP_PHY_1MBPS. + If scan_phys also contains @ref BLE_GAP_PHY_CODED, the primary scan + PHY will also contain @ref BLE_GAP_PHY_CODED. If the only scan PHY is + @ref BLE_GAP_PHY_CODED, the primary scan PHY is + @ref BLE_GAP_PHY_CODED only. */ + uint16_t interval; /**< Scan interval in 625 us units. @sa BLE_GAP_SCAN_INTERVALS. */ + uint16_t window; /**< Scan window in 625 us units. @sa BLE_GAP_SCAN_WINDOW. */ + uint16_t timeout; /**< Scan timeout in 10 ms units. @sa BLE_GAP_SCAN_TIMEOUT. */ + ble_gap_ch_mask_t channel_mask; /**< Channel mask for primary and secondary advertising channels. + At least one of the primary channels, that is channel index 37-39, must be + set to 0. + Masking away secondary channels is not supported. */ +} ble_gap_scan_params_t; + + +/**@brief Privacy. + * + * The privacy feature provides a way for the device to avoid being tracked over a period of time. + * The privacy feature, when enabled, hides the local device identity and replaces it with a private address + * that is automatically refreshed at a specified interval. + * + * If a device still wants to be recognized by other peers, it needs to share it's Identity Resolving Key (IRK). + * With this key, a device can generate a random private address that can only be recognized by peers in possession of that key, + * and devices can establish connections without revealing their real identities. + * + * Both network privacy (@ref BLE_GAP_PRIVACY_MODE_NETWORK_PRIVACY) and device privacy (@ref BLE_GAP_PRIVACY_MODE_DEVICE_PRIVACY) + * are supported. + * + * @note If the device IRK is updated, the new IRK becomes the one to be distributed in all + * bonding procedures performed after @ref sd_ble_gap_privacy_set returns. + * The IRK distributed during bonding procedure is the device IRK that is active when @ref sd_ble_gap_sec_params_reply is called. + */ +typedef struct +{ + uint8_t privacy_mode; /**< Privacy mode, see @ref BLE_GAP_PRIVACY_MODES. Default is @ref BLE_GAP_PRIVACY_MODE_OFF. */ + uint8_t private_addr_type; /**< The private address type must be either @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE or @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE. */ + uint16_t private_addr_cycle_s; /**< Private address cycle interval in seconds. Providing an address cycle value of 0 will use the default value defined by @ref BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S. */ + ble_gap_irk_t *p_device_irk; /**< When used as input, pointer to IRK structure that will be used as the default IRK. If NULL, the device default IRK will be used. + When used as output, pointer to IRK structure where the current default IRK will be written to. If NULL, this argument is ignored. + By default, the default IRK is used to generate random private resolvable addresses for the local device unless instructed otherwise. */ +} ble_gap_privacy_params_t; + + +/**@brief PHY preferences for TX and RX + * @note tx_phys and rx_phys are bit fields. Multiple bits can be set in them to indicate multiple preferred PHYs for each direction. + * @code + * p_gap_phys->tx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; + * p_gap_phys->rx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; + * @endcode + * + */ +typedef struct +{ + uint8_t tx_phys; /**< Preferred transmit PHYs, see @ref BLE_GAP_PHYS. */ + uint8_t rx_phys; /**< Preferred receive PHYs, see @ref BLE_GAP_PHYS. */ +} ble_gap_phys_t; + +/** @brief Keys that can be exchanged during a bonding procedure. */ +typedef struct +{ + uint8_t enc : 1; /**< Long Term Key and Master Identification. */ + uint8_t id : 1; /**< Identity Resolving Key and Identity Address Information. */ + uint8_t sign : 1; /**< Connection Signature Resolving Key. */ + uint8_t link : 1; /**< Derive the Link Key from the LTK. */ +} ble_gap_sec_kdist_t; + + +/**@brief GAP security parameters. */ +typedef struct +{ + uint8_t bond : 1; /**< Perform bonding. */ + uint8_t mitm : 1; /**< Enable Man In The Middle protection. */ + uint8_t lesc : 1; /**< Enable LE Secure Connection pairing. */ + uint8_t keypress : 1; /**< Enable generation of keypress notifications. */ + uint8_t io_caps : 3; /**< IO capabilities, see @ref BLE_GAP_IO_CAPS. */ + uint8_t oob : 1; /**< The OOB data flag. + - In LE legacy pairing, this flag is set if a device has out of band authentication data. + The OOB method is used if both of the devices have out of band authentication data. + - In LE Secure Connections pairing, this flag is set if a device has the peer device's out of band authentication data. + The OOB method is used if at least one device has the peer device's OOB data available. */ + uint8_t min_key_size; /**< Minimum encryption key size in octets between 7 and 16. If 0 then not applicable in this instance. */ + uint8_t max_key_size; /**< Maximum encryption key size in octets between min_key_size and 16. */ + ble_gap_sec_kdist_t kdist_own; /**< Key distribution bitmap: keys that the local device will distribute. */ + ble_gap_sec_kdist_t kdist_peer; /**< Key distribution bitmap: keys that the remote device will distribute. */ +} ble_gap_sec_params_t; + + +/**@brief GAP Encryption Information. */ +typedef struct +{ + uint8_t ltk[BLE_GAP_SEC_KEY_LEN]; /**< Long Term Key. */ + uint8_t lesc : 1; /**< Key generated using LE Secure Connections. */ + uint8_t auth : 1; /**< Authenticated Key. */ + uint8_t ltk_len : 6; /**< LTK length in octets. */ +} ble_gap_enc_info_t; + + +/**@brief GAP Master Identification. */ +typedef struct +{ + uint16_t ediv; /**< Encrypted Diversifier. */ + uint8_t rand[BLE_GAP_SEC_RAND_LEN]; /**< Random Number. */ +} ble_gap_master_id_t; + + +/**@brief GAP Signing Information. */ +typedef struct +{ + uint8_t csrk[BLE_GAP_SEC_KEY_LEN]; /**< Connection Signature Resolving Key. */ +} ble_gap_sign_info_t; + + +/**@brief GAP LE Secure Connections P-256 Public Key. */ +typedef struct +{ + uint8_t pk[BLE_GAP_LESC_P256_PK_LEN]; /**< LE Secure Connections Elliptic Curve Diffie-Hellman P-256 Public Key. Stored in the standard SMP protocol format: {X,Y} both in little-endian. */ +} ble_gap_lesc_p256_pk_t; + + +/**@brief GAP LE Secure Connections DHKey. */ +typedef struct +{ + uint8_t key[BLE_GAP_LESC_DHKEY_LEN]; /**< LE Secure Connections Elliptic Curve Diffie-Hellman Key. Stored in little-endian. */ +} ble_gap_lesc_dhkey_t; + + +/**@brief GAP LE Secure Connections OOB data. */ +typedef struct +{ + ble_gap_addr_t addr; /**< Bluetooth address of the device. */ + uint8_t r[BLE_GAP_SEC_KEY_LEN]; /**< Random Number. */ + uint8_t c[BLE_GAP_SEC_KEY_LEN]; /**< Confirm Value. */ +} ble_gap_lesc_oob_data_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_CONNECTED. */ +typedef struct +{ + ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 + and the address is the device's identity address. */ + uint8_t role; /**< BLE role for this connection, see @ref BLE_GAP_ROLES */ + ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ + uint8_t adv_handle; /**< Advertising handle in which advertising has ended. + This variable is only set if role is set to @ref BLE_GAP_ROLE_PERIPH. */ + ble_gap_adv_data_t adv_data; /**< Advertising buffers corresponding to the terminated + advertising set. The advertising buffers provided in + @ref sd_ble_gap_adv_set_configure are now released. + This variable is only set if role is set to @ref BLE_GAP_ROLE_PERIPH. */ +} ble_gap_evt_connected_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_DISCONNECTED. */ +typedef struct +{ + uint8_t reason; /**< HCI error code, see @ref BLE_HCI_STATUS_CODES. */ +} ble_gap_evt_disconnected_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_CONN_PARAM_UPDATE. */ +typedef struct +{ + ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ +} ble_gap_evt_conn_param_update_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_PHY_UPDATE_REQUEST. */ +typedef struct +{ + ble_gap_phys_t peer_preferred_phys; /**< The PHYs the peer prefers to use. */ +} ble_gap_evt_phy_update_request_t; + +/**@brief Event Structure for @ref BLE_GAP_EVT_PHY_UPDATE. */ +typedef struct +{ + uint8_t status; /**< Status of the procedure, see @ref BLE_HCI_STATUS_CODES.*/ + uint8_t tx_phy; /**< TX PHY for this connection, see @ref BLE_GAP_PHYS. */ + uint8_t rx_phy; /**< RX PHY for this connection, see @ref BLE_GAP_PHYS. */ +} ble_gap_evt_phy_update_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST. */ +typedef struct +{ + ble_gap_sec_params_t peer_params; /**< Initiator Security Parameters. */ +} ble_gap_evt_sec_params_request_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_SEC_INFO_REQUEST. */ +typedef struct +{ + ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. */ + ble_gap_master_id_t master_id; /**< Master Identification for LTK lookup. */ + uint8_t enc_info : 1; /**< If 1, Encryption Information required. */ + uint8_t id_info : 1; /**< If 1, Identity Information required. */ + uint8_t sign_info : 1; /**< If 1, Signing Information required. */ +} ble_gap_evt_sec_info_request_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_PASSKEY_DISPLAY. */ +typedef struct +{ + uint8_t passkey[BLE_GAP_PASSKEY_LEN]; /**< 6-digit passkey in ASCII ('0'-'9' digits only). */ + uint8_t match_request : 1; /**< If 1 requires the application to report the match using @ref sd_ble_gap_auth_key_reply + with either @ref BLE_GAP_AUTH_KEY_TYPE_NONE if there is no match or + @ref BLE_GAP_AUTH_KEY_TYPE_PASSKEY if there is a match. */ +} ble_gap_evt_passkey_display_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_KEY_PRESSED. */ +typedef struct +{ + uint8_t kp_not; /**< Keypress notification type, see @ref BLE_GAP_KP_NOT_TYPES. */ +} ble_gap_evt_key_pressed_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_AUTH_KEY_REQUEST. */ +typedef struct +{ + uint8_t key_type; /**< See @ref BLE_GAP_AUTH_KEY_TYPES. */ +} ble_gap_evt_auth_key_request_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST. */ +typedef struct +{ + ble_gap_lesc_p256_pk_t *p_pk_peer; /**< LE Secure Connections remote P-256 Public Key. This will point to the application-supplied memory + inside the keyset during the call to @ref sd_ble_gap_sec_params_reply. */ + uint8_t oobd_req :1; /**< LESC OOB data required. A call to @ref sd_ble_gap_lesc_oob_data_set is required to complete the procedure. */ +} ble_gap_evt_lesc_dhkey_request_t; + + +/**@brief Security levels supported. + * @note See Bluetooth Specification Version 4.2 Volume 3, Part C, Chapter 10, Section 10.2.1. +*/ +typedef struct +{ + uint8_t lv1 : 1; /**< If 1: Level 1 is supported. */ + uint8_t lv2 : 1; /**< If 1: Level 2 is supported. */ + uint8_t lv3 : 1; /**< If 1: Level 3 is supported. */ + uint8_t lv4 : 1; /**< If 1: Level 4 is supported. */ +} ble_gap_sec_levels_t; + + +/**@brief Encryption Key. */ +typedef struct +{ + ble_gap_enc_info_t enc_info; /**< Encryption Information. */ + ble_gap_master_id_t master_id; /**< Master Identification. */ +} ble_gap_enc_key_t; + + +/**@brief Identity Key. */ +typedef struct +{ + ble_gap_irk_t id_info; /**< Identity Resolving Key. */ + ble_gap_addr_t id_addr_info; /**< Identity Address. */ +} ble_gap_id_key_t; + + +/**@brief Security Keys. */ +typedef struct +{ + ble_gap_enc_key_t *p_enc_key; /**< Encryption Key, or NULL. */ + ble_gap_id_key_t *p_id_key; /**< Identity Key, or NULL. */ + ble_gap_sign_info_t *p_sign_key; /**< Signing Key, or NULL. */ + ble_gap_lesc_p256_pk_t *p_pk; /**< LE Secure Connections P-256 Public Key. When in debug mode the application must use the value defined + in the Core Bluetooth Specification v4.2 Vol.3, Part H, Section 2.3.5.6.1 */ +} ble_gap_sec_keys_t; + + +/**@brief Security key set for both local and peer keys. */ +typedef struct +{ + ble_gap_sec_keys_t keys_own; /**< Keys distributed by the local device. For LE Secure Connections the encryption key will be generated locally and will always be stored if bonding. */ + ble_gap_sec_keys_t keys_peer; /**< Keys distributed by the remote device. For LE Secure Connections, p_enc_key must always be NULL. */ +} ble_gap_sec_keyset_t; + + +/**@brief Data Length Update Procedure parameters. */ +typedef struct +{ + uint16_t max_tx_octets; /**< Maximum number of payload octets that a Controller supports for transmission of a single Link Layer Data Channel PDU. */ + uint16_t max_rx_octets; /**< Maximum number of payload octets that a Controller supports for reception of a single Link Layer Data Channel PDU. */ + uint16_t max_tx_time_us; /**< Maximum time, in microseconds, that a Controller supports for transmission of a single Link Layer Data Channel PDU. */ + uint16_t max_rx_time_us; /**< Maximum time, in microseconds, that a Controller supports for reception of a single Link Layer Data Channel PDU. */ +} ble_gap_data_length_params_t; + + +/**@brief Data Length Update Procedure local limitation. */ +typedef struct +{ + uint16_t tx_payload_limited_octets; /**< If > 0, the requested TX packet length is too long by this many octets. */ + uint16_t rx_payload_limited_octets; /**< If > 0, the requested RX packet length is too long by this many octets. */ + uint16_t tx_rx_time_limited_us; /**< If > 0, the requested combination of TX and RX packet lengths is too long by this many microseconds. */ +} ble_gap_data_length_limitation_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_AUTH_STATUS. */ +typedef struct +{ + uint8_t auth_status; /**< Authentication status, see @ref BLE_GAP_SEC_STATUS. */ + uint8_t error_src : 2; /**< On error, source that caused the failure, see @ref BLE_GAP_SEC_STATUS_SOURCES. */ + uint8_t bonded : 1; /**< Procedure resulted in a bond. */ + uint8_t lesc : 1; /**< Procedure resulted in a LE Secure Connection. */ + ble_gap_sec_levels_t sm1_levels; /**< Levels supported in Security Mode 1. */ + ble_gap_sec_levels_t sm2_levels; /**< Levels supported in Security Mode 2. */ + ble_gap_sec_kdist_t kdist_own; /**< Bitmap stating which keys were exchanged (distributed) by the local device. If bonding with LE Secure Connections, the enc bit will be always set. */ + ble_gap_sec_kdist_t kdist_peer; /**< Bitmap stating which keys were exchanged (distributed) by the remote device. If bonding with LE Secure Connections, the enc bit will never be set. */ +} ble_gap_evt_auth_status_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_CONN_SEC_UPDATE. */ +typedef struct +{ + ble_gap_conn_sec_t conn_sec; /**< Connection security level. */ +} ble_gap_evt_conn_sec_update_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_TIMEOUT. */ +typedef struct +{ + uint8_t src; /**< Source of timeout event, see @ref BLE_GAP_TIMEOUT_SOURCES. */ + union + { + ble_data_t adv_report_buffer; /**< If source is set to @ref BLE_GAP_TIMEOUT_SRC_SCAN, the released + scan buffer is contained in this field. */ + } params; /**< Event Parameters. */ +} ble_gap_evt_timeout_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_RSSI_CHANGED. */ +typedef struct +{ + int8_t rssi; /**< Received Signal Strength Indication in dBm. + @note ERRATA-153 requires the rssi sample to be compensated based on a temperature measurement. */ + uint8_t ch_index; /**< Data Channel Index on which the Signal Strength is measured (0-36). */ +} ble_gap_evt_rssi_changed_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_ADV_SET_TERMINATED */ +typedef struct +{ + uint8_t reason; /**< Reason for why the advertising set terminated. See + @ref BLE_GAP_EVT_ADV_SET_TERMINATED_REASON. */ + uint8_t adv_handle; /**< Advertising handle in which advertising has ended. */ + uint8_t num_completed_adv_events; /**< If @ref ble_gap_adv_params_t::max_adv_evts was not set to 0, + this field indicates the number of completed advertising events. */ + ble_gap_adv_data_t adv_data; /**< Advertising buffers corresponding to the terminated + advertising set. The advertising buffers provided in + @ref sd_ble_gap_adv_set_configure are now released. */ +} ble_gap_evt_adv_set_terminated_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_ADV_REPORT. + * + * @note If @ref ble_gap_adv_report_type_t::status is set to @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA, + * not all fields in the advertising report may be available. + * + * @note When ble_gap_adv_report_type_t::status is not set to @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA, + * scanning will be paused. To continue scanning, call @ref sd_ble_gap_scan_start. + */ +typedef struct +{ + ble_gap_adv_report_type_t type; /**< Advertising report type. See @ref ble_gap_adv_report_type_t. */ + ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr is resolved: + @ref ble_gap_addr_t::addr_id_peer is set to 1 and the address is the + peer's identity address. */ + ble_gap_addr_t direct_addr; /**< Contains the target address of the advertising event if + @ref ble_gap_adv_report_type_t::directed is set to 1. If the + SoftDevice was able to resolve the address, + @ref ble_gap_addr_t::addr_id_peer is set to 1 and the direct_addr + contains the local identity address. If the target address of the + advertising event is @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE, + and the SoftDevice was unable to resolve it, the application may try + to resolve this address to find out if the advertising event was + directed to us. */ + uint8_t primary_phy; /**< Indicates the PHY on which the primary advertising packet was received on. + See @ref BLE_GAP_PHYS. */ + uint8_t secondary_phy; /**< Indicates the PHY on which the secondary advertising packet was received on. + See @ref BLE_GAP_PHYS. This field is to 0 if no packets where received on + a secondary advertising channel. */ + int8_t tx_power; /**< TX Power reported by the advertiser in the last packet header received. + This field is set to @ref BLE_GAP_POWER_LEVEL_INVALID if the + last received packet did not contain the Tx Power field. + @note TX Power is only included in extended advertising packets. */ + int8_t rssi; /**< Received Signal Strength Indication in dBm of the last packet received. + @note ERRATA-153 requires the rssi sample to be compensated based on a temperature measurement. */ + uint8_t ch_index; /**< Channel Index on which the last advertising packet is received (0-39). */ + uint8_t set_id; /**< Set ID of the received advertising data. Set ID is not present + if set to @ref BLE_GAP_ADV_REPORT_SET_ID_NOT_AVAILABLE. */ + uint16_t data_id:12; /**< The advertising data ID of the received advertising data. Data ID + is not present if @ref ble_gap_evt_adv_report_t::set_id is set to + @ref BLE_GAP_ADV_REPORT_SET_ID_NOT_AVAILABLE. */ + ble_data_t data; /**< Received advertising or scan response data. If + @ref ble_gap_adv_report_type_t::status is not set to + @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA, the data buffer provided + in @ref sd_ble_gap_scan_start is now released. */ + ble_gap_aux_pointer_t aux_pointer; /**< The offset and PHY of the next advertising packet in this extended advertising + event. @note This field is only set if @ref ble_gap_adv_report_type_t::status + is set to @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA. */ +} ble_gap_evt_adv_report_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_SEC_REQUEST. */ +typedef struct +{ + uint8_t bond : 1; /**< Perform bonding. */ + uint8_t mitm : 1; /**< Man In The Middle protection requested. */ + uint8_t lesc : 1; /**< LE Secure Connections requested. */ + uint8_t keypress : 1; /**< Generation of keypress notifications requested. */ +} ble_gap_evt_sec_request_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST. */ +typedef struct +{ + ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ +} ble_gap_evt_conn_param_update_request_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_SCAN_REQ_REPORT. */ +typedef struct +{ + uint8_t adv_handle; /**< Advertising handle for the advertising set which received the Scan Request */ + int8_t rssi; /**< Received Signal Strength Indication in dBm. + @note ERRATA-153 requires the rssi sample to be compensated based on a temperature measurement. */ + ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 + and the address is the device's identity address. */ +} ble_gap_evt_scan_req_report_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST. */ +typedef struct +{ + ble_gap_data_length_params_t peer_params; /**< Peer data length parameters. */ +} ble_gap_evt_data_length_update_request_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE. */ +typedef struct +{ + ble_gap_data_length_params_t effective_params; /**< The effective data length parameters. */ +} ble_gap_evt_data_length_update_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_QOS_CHANNEL_SURVEY_REPORT. */ +typedef struct +{ + int8_t channel_energy[BLE_GAP_CHANNEL_COUNT]; /**< The measured energy on the Bluetooth Low Energy + channels, in dBm, indexed by Channel Index. + If no measurement is available for the given channel, channel_energy is set to + @ref BLE_GAP_POWER_LEVEL_INVALID. */ +} ble_gap_evt_qos_channel_survey_report_t; + +/**@brief GAP event structure. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which event occurred. */ + union /**< union alternative identified by evt_id in enclosing struct. */ + { + ble_gap_evt_connected_t connected; /**< Connected Event Parameters. */ + ble_gap_evt_disconnected_t disconnected; /**< Disconnected Event Parameters. */ + ble_gap_evt_conn_param_update_t conn_param_update; /**< Connection Parameter Update Parameters. */ + ble_gap_evt_sec_params_request_t sec_params_request; /**< Security Parameters Request Event Parameters. */ + ble_gap_evt_sec_info_request_t sec_info_request; /**< Security Information Request Event Parameters. */ + ble_gap_evt_passkey_display_t passkey_display; /**< Passkey Display Event Parameters. */ + ble_gap_evt_key_pressed_t key_pressed; /**< Key Pressed Event Parameters. */ + ble_gap_evt_auth_key_request_t auth_key_request; /**< Authentication Key Request Event Parameters. */ + ble_gap_evt_lesc_dhkey_request_t lesc_dhkey_request; /**< LE Secure Connections DHKey calculation request. */ + ble_gap_evt_auth_status_t auth_status; /**< Authentication Status Event Parameters. */ + ble_gap_evt_conn_sec_update_t conn_sec_update; /**< Connection Security Update Event Parameters. */ + ble_gap_evt_timeout_t timeout; /**< Timeout Event Parameters. */ + ble_gap_evt_rssi_changed_t rssi_changed; /**< RSSI Event Parameters. */ + ble_gap_evt_adv_report_t adv_report; /**< Advertising Report Event Parameters. */ + ble_gap_evt_adv_set_terminated_t adv_set_terminated; /**< Advertising Set Terminated Event Parameters. */ + ble_gap_evt_sec_request_t sec_request; /**< Security Request Event Parameters. */ + ble_gap_evt_conn_param_update_request_t conn_param_update_request; /**< Connection Parameter Update Parameters. */ + ble_gap_evt_scan_req_report_t scan_req_report; /**< Scan Request Report Parameters. */ + ble_gap_evt_phy_update_request_t phy_update_request; /**< PHY Update Request Event Parameters. */ + ble_gap_evt_phy_update_t phy_update; /**< PHY Update Parameters. */ + ble_gap_evt_data_length_update_request_t data_length_update_request; /**< Data Length Update Request Event Parameters. */ + ble_gap_evt_data_length_update_t data_length_update; /**< Data Length Update Event Parameters. */ + ble_gap_evt_qos_channel_survey_report_t qos_channel_survey_report; /**< Quality of Service (QoS) Channel Survey Report Parameters. */ + } params; /**< Event Parameters. */ +} ble_gap_evt_t; + + +/** + * @brief BLE GAP connection configuration parameters, set with @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_CONN_COUNT The connection count for the connection configurations is zero. + * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: + * - The sum of conn_count for all connection configurations combined exceeds UINT8_MAX. + * - The event length is smaller than @ref BLE_GAP_EVENT_LENGTH_MIN. + */ +typedef struct +{ + uint8_t conn_count; /**< The number of concurrent connections the application can create with this configuration. + The default and minimum value is @ref BLE_GAP_CONN_COUNT_DEFAULT. */ + uint16_t event_length; /**< The time set aside for this connection on every connection interval in 1.25 ms units. + The default value is @ref BLE_GAP_EVENT_LENGTH_DEFAULT, the minimum value is @ref BLE_GAP_EVENT_LENGTH_MIN. + The event length and the connection interval are the primary parameters + for setting the throughput of a connection. + See the SoftDevice Specification for details on throughput. */ +} ble_gap_conn_cfg_t; + + +/** + * @brief Configuration of maximum concurrent connections in the different connected roles, set with + * @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_CONN_COUNT The sum of periph_role_count and central_role_count is too + * large. The maximum supported sum of concurrent connections is + * @ref BLE_GAP_ROLE_COUNT_COMBINED_MAX. + * @retval ::NRF_ERROR_INVALID_PARAM central_sec_count is larger than central_role_count. + * @retval ::NRF_ERROR_RESOURCES The adv_set_count is too large. The maximum + * supported advertising handles is + * @ref BLE_GAP_ADV_SET_COUNT_MAX. + */ +typedef struct +{ + uint8_t adv_set_count; /**< Maximum number of advertising sets. Default value is @ref BLE_GAP_ADV_SET_COUNT_DEFAULT. */ + uint8_t periph_role_count; /**< Maximum number of connections concurrently acting as a peripheral. Default value is @ref BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT. */ + uint8_t central_role_count; /**< Maximum number of connections concurrently acting as a central. Default value is @ref BLE_GAP_ROLE_COUNT_CENTRAL_DEFAULT. */ + uint8_t central_sec_count; /**< Number of SMP instances shared between all connections acting as a central. Default value is @ref BLE_GAP_ROLE_COUNT_CENTRAL_SEC_DEFAULT. */ + uint8_t qos_channel_survey_role_available:1; /**< If set, the Quality of Service (QoS) channel survey module is available to the + application using @ref sd_ble_gap_qos_channel_survey_start. */ +} ble_gap_cfg_role_count_t; + + +/** + * @brief Device name and its properties, set with @ref sd_ble_cfg_set. + * + * @note If the device name is not configured, the default device name will be + * @ref BLE_GAP_DEVNAME_DEFAULT, the maximum device name length will be + * @ref BLE_GAP_DEVNAME_DEFAULT_LEN, vloc will be set to @ref BLE_GATTS_VLOC_STACK and the device name + * will have no write access. + * + * @note If @ref max_len is more than @ref BLE_GAP_DEVNAME_DEFAULT_LEN and vloc is set to @ref BLE_GATTS_VLOC_STACK, + * the attribute table size must be increased to have room for the longer device name (see + * @ref sd_ble_cfg_set and @ref ble_gatts_cfg_attr_tab_size_t). + * + * @note If vloc is @ref BLE_GATTS_VLOC_STACK : + * - p_value must point to non-volatile memory (flash) or be NULL. + * - If p_value is NULL, the device name will initially be empty. + * + * @note If vloc is @ref BLE_GATTS_VLOC_USER : + * - p_value cannot be NULL. + * - If the device name is writable, p_value must point to volatile memory (RAM). + * + * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: + * - Invalid device name location (vloc). + * - Invalid device name security mode. + * @retval ::NRF_ERROR_INVALID_LENGTH One or more of the following is true: + * - The device name length is invalid (must be between 0 and @ref BLE_GAP_DEVNAME_MAX_LEN). + * - The device name length is too long for the given Attribute Table. + * @retval ::NRF_ERROR_NOT_SUPPORTED Device name security mode is not supported. + */ +typedef struct +{ + ble_gap_conn_sec_mode_t write_perm; /**< Write permissions. */ + uint8_t vloc:2; /**< Value location, see @ref BLE_GATTS_VLOCS.*/ + uint8_t *p_value; /**< Pointer to where the value (device name) is stored or will be stored. */ + uint16_t current_len; /**< Current length in bytes of the memory pointed to by p_value.*/ + uint16_t max_len; /**< Maximum length in bytes of the memory pointed to by p_value.*/ +} ble_gap_cfg_device_name_t; + + +/**@brief Configuration structure for GAP configurations. */ +typedef union +{ + ble_gap_cfg_role_count_t role_count_cfg; /**< Role count configuration, cfg_id is @ref BLE_GAP_CFG_ROLE_COUNT. */ + ble_gap_cfg_device_name_t device_name_cfg; /**< Device name configuration, cfg_id is @ref BLE_GAP_CFG_DEVICE_NAME. */ +} ble_gap_cfg_t; + + +/**@brief Channel Map option. + * + * @details Used with @ref sd_ble_opt_get to get the current channel map + * or @ref sd_ble_opt_set to set a new channel map. When setting the + * channel map, it applies to all current and future connections. When getting the + * current channel map, it applies to a single connection and the connection handle + * must be supplied. + * + * @note Setting the channel map may take some time, depending on connection parameters. + * The time taken may be different for each connection and the get operation will + * return the previous channel map until the new one has taken effect. + * + * @note After setting the channel map, by spec it can not be set again until at least 1 s has passed. + * See Bluetooth Specification Version 4.1 Volume 2, Part E, Section 7.3.46. + * + * @retval ::NRF_SUCCESS Get or set successful. + * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: + * - Less then two bits in @ref ch_map are set. + * - Bits for primary advertising channels (37-39) are set. + * @retval ::NRF_ERROR_BUSY Channel map was set again before enough time had passed. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied for get. + * + */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle (only applicable for get) */ + uint8_t ch_map[5]; /**< Channel Map (37-bit). */ +} ble_gap_opt_ch_map_t; + + +/**@brief Local connection latency option. + * + * @details Local connection latency is a feature which enables the slave to improve + * current consumption by ignoring the slave latency set by the peer. The + * local connection latency can only be set to a multiple of the slave latency, + * and cannot be longer than half of the supervision timeout. + * + * @details Used with @ref sd_ble_opt_set to set the local connection latency. The + * @ref sd_ble_opt_get is not supported for this option, but the actual + * local connection latency (unless set to NULL) is set as a return parameter + * when setting the option. + * + * @note The latency set will be truncated down to the closest slave latency event + * multiple, or the nearest multiple before half of the supervision timeout. + * + * @note The local connection latency is disabled by default, and needs to be enabled for new + * connections and whenever the connection is updated. + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_NOT_SUPPORTED Get is not supported. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. + */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle */ + uint16_t requested_latency; /**< Requested local connection latency. */ + uint16_t * p_actual_latency; /**< Pointer to storage for the actual local connection latency (can be set to NULL to skip return value). */ +} ble_gap_opt_local_conn_latency_t; + +/**@brief Disable slave latency + * + * @details Used with @ref sd_ble_opt_set to temporarily disable slave latency of a peripheral connection + * (see @ref ble_gap_conn_params_t::slave_latency). And to re-enable it again. When disabled, the + * peripheral will ignore the slave_latency set by the central. + * + * @note Shall only be called on peripheral links. + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_NOT_SUPPORTED Get is not supported. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. + */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle */ + uint8_t disable : 1; /**< Set to 1 to disable slave latency. Set to 0 enable it again.*/ +} ble_gap_opt_slave_latency_disable_t; + +/**@brief Passkey Option. + * + * @details Structure containing the passkey to be used during pairing. This can be used with @ref + * sd_ble_opt_set to make the SoftDevice use a preprogrammed passkey for authentication + * instead of generating a random one. + * + * @note Repeated pairing attempts using the same preprogrammed passkey makes pairing vulnerable to MITM attacks. + * + * @note @ref sd_ble_opt_get is not supported for this option. + * + */ +typedef struct +{ + uint8_t const * p_passkey; /**< Pointer to 6-digit ASCII string (digit 0..9 only, no NULL termination) passkey to be used during pairing. If this is NULL, the SoftDevice will generate a random passkey if required.*/ +} ble_gap_opt_passkey_t; + + +/**@brief Compatibility mode 1 option. + * + * @details This can be used with @ref sd_ble_opt_set to enable and disable + * compatibility mode 1. Compatibility mode 1 is disabled by default. + * + * @note Compatibility mode 1 enables interoperability with devices that do not support a value of + * 0 for the WinOffset parameter in the Link Layer CONNECT_IND packet. This applies to a + * limited set of legacy peripheral devices from another vendor. Enabling this compatibility + * mode will only have an effect if the local device will act as a central device and + * initiate a connection to a peripheral device. In that case it may lead to the connection + * creation taking up to one connection interval longer to complete for all connections. + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_INVALID_STATE When connection creation is ongoing while mode 1 is set. + */ +typedef struct +{ + uint8_t enable : 1; /**< Enable compatibility mode 1.*/ +} ble_gap_opt_compat_mode_1_t; + + +/**@brief Authenticated payload timeout option. + * + * @details This can be used with @ref sd_ble_opt_set to change the Authenticated payload timeout to a value other + * than the default of @ref BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MAX. + * + * @note The authenticated payload timeout event ::BLE_GAP_TIMEOUT_SRC_AUTH_PAYLOAD will be generated + * if auth_payload_timeout time has elapsed without receiving a packet with a valid MIC on an encrypted + * link. + * + * @note The LE ping procedure will be initiated before the timer expires to give the peer a chance + * to reset the timer. In addition the stack will try to prioritize running of LE ping over other + * activities to increase chances of finishing LE ping before timer expires. To avoid side-effects + * on other activities, it is recommended to use high timeout values. + * Recommended timeout > 2*(connInterval * (6 + connSlaveLatency)). + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. auth_payload_timeout was outside of allowed range. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. + */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle */ + uint16_t auth_payload_timeout; /**< Requested timeout in 10 ms unit, see @ref BLE_GAP_AUTH_PAYLOAD_TIMEOUT. */ +} ble_gap_opt_auth_payload_timeout_t; + +/**@brief Option structure for GAP options. */ +typedef union +{ + ble_gap_opt_ch_map_t ch_map; /**< Parameters for the Channel Map option. */ + ble_gap_opt_local_conn_latency_t local_conn_latency; /**< Parameters for the Local connection latency option */ + ble_gap_opt_passkey_t passkey; /**< Parameters for the Passkey option.*/ + ble_gap_opt_compat_mode_1_t compat_mode_1; /**< Parameters for the compatibility mode 1 option.*/ + ble_gap_opt_auth_payload_timeout_t auth_payload_timeout; /**< Parameters for the authenticated payload timeout option.*/ + ble_gap_opt_slave_latency_disable_t slave_latency_disable; /**< Parameters for the Disable slave latency option */ +} ble_gap_opt_t; +/**@} */ + + +/**@addtogroup BLE_GAP_FUNCTIONS Functions + * @{ */ + +/**@brief Set the local Bluetooth identity address. + * + * The local Bluetooth identity address is the address that identifies this device to other peers. + * The address type must be either @ref BLE_GAP_ADDR_TYPE_PUBLIC or @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC. + * + * @note The identity address cannot be changed while advertising, scanning or creating a connection. + * + * @note This address will be distributed to the peer during bonding. + * If the address changes, the address stored in the peer device will not be valid and the ability to + * reconnect using the old address will be lost. + * + * @note By default the SoftDevice will set an address of type @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC upon being + * enabled. The address is a random number populated during the IC manufacturing process and remains unchanged + * for the lifetime of each IC. + * + * @mscs + * @mmsc{@ref BLE_GAP_ADV_MSC} + * @endmscs + * + * @param[in] p_addr Pointer to address structure. + * + * @retval ::NRF_SUCCESS Address successfully set. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::NRF_ERROR_INVALID_STATE The identity address cannot be changed while advertising, + * scanning or creating a connection. + */ +SVCALL(SD_BLE_GAP_ADDR_SET, uint32_t, sd_ble_gap_addr_set(ble_gap_addr_t const *p_addr)); + + +/**@brief Get local Bluetooth identity address. + * + * @note This will always return the identity address irrespective of the privacy settings, + * i.e. the address type will always be either @ref BLE_GAP_ADDR_TYPE_PUBLIC or @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC. + * + * @param[out] p_addr Pointer to address structure to be filled in. + * + * @retval ::NRF_SUCCESS Address successfully retrieved. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. + */ +SVCALL(SD_BLE_GAP_ADDR_GET, uint32_t, sd_ble_gap_addr_get(ble_gap_addr_t *p_addr)); + + +/**@brief Set the active whitelist in the SoftDevice. + * + * @note Only one whitelist can be used at a time and the whitelist is shared between the BLE roles. + * The whitelist cannot be set if a BLE role is using the whitelist. + * + * @note If an address is resolved using the information in the device identity list, then the whitelist + * filter policy applies to the peer identity address and not the resolvable address sent on air. + * + * @mscs + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_PRIVATE_SCAN_MSC} + * @endmscs + * + * @param[in] pp_wl_addrs Pointer to a whitelist of peer addresses, if NULL the whitelist will be cleared. + * @param[in] len Length of the whitelist, maximum @ref BLE_GAP_WHITELIST_ADDR_MAX_COUNT. + * + * @retval ::NRF_SUCCESS The whitelist is successfully set/cleared. + * @retval ::NRF_ERROR_INVALID_ADDR The whitelist (or one of its entries) provided is invalid. + * @retval ::BLE_ERROR_GAP_WHITELIST_IN_USE The whitelist is in use by a BLE role and cannot be set or cleared. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. + * @retval ::NRF_ERROR_DATA_SIZE The given whitelist size is invalid (zero or too large); this can only return when + * pp_wl_addrs is not NULL. + */ +SVCALL(SD_BLE_GAP_WHITELIST_SET, uint32_t, sd_ble_gap_whitelist_set(ble_gap_addr_t const * const * pp_wl_addrs, uint8_t len)); + + +/**@brief Set device identity list. + * + * @note Only one device identity list can be used at a time and the list is shared between the BLE roles. + * The device identity list cannot be set if a BLE role is using the list. + * + * @param[in] pp_id_keys Pointer to an array of peer identity addresses and peer IRKs, if NULL the device identity list will be cleared. + * @param[in] pp_local_irks Pointer to an array of local IRKs. Each entry in the array maps to the entry in pp_id_keys at the same index. + * To fill in the list with the currently set device IRK for all peers, set to NULL. + * @param[in] len Length of the device identity list, maximum @ref BLE_GAP_DEVICE_IDENTITIES_MAX_COUNT. + * + * @mscs + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_PRIVATE_SCAN_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_CONN_PRIV_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_CONN_PRIV_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS The device identity list successfully set/cleared. + * @retval ::NRF_ERROR_INVALID_ADDR The device identity list (or one of its entries) provided is invalid. + * This code may be returned if the local IRK list also has an invalid entry. + * @retval ::BLE_ERROR_GAP_DEVICE_IDENTITIES_IN_USE The device identity list is in use and cannot be set or cleared. + * @retval ::BLE_ERROR_GAP_DEVICE_IDENTITIES_DUPLICATE The device identity list contains multiple entries with the same identity address. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. + * @retval ::NRF_ERROR_DATA_SIZE The given device identity list size invalid (zero or too large); this can + * only return when pp_id_keys is not NULL. + */ +SVCALL(SD_BLE_GAP_DEVICE_IDENTITIES_SET, uint32_t, sd_ble_gap_device_identities_set(ble_gap_id_key_t const * const * pp_id_keys, ble_gap_irk_t const * const * pp_local_irks, uint8_t len)); + + +/**@brief Set privacy settings. + * + * @note Privacy settings cannot be changed while advertising, scanning or creating a connection. + * + * @param[in] p_privacy_params Privacy settings. + * + * @mscs + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. + * @retval ::NRF_ERROR_INVALID_ADDR The pointer to privacy settings is NULL or invalid. + * Otherwise, the p_device_irk pointer in privacy parameter is an invalid pointer. + * @retval ::NRF_ERROR_INVALID_PARAM Out of range parameters are provided. + * @retval ::NRF_ERROR_INVALID_STATE Privacy settings cannot be changed while advertising, scanning + * or creating a connection. + */ +SVCALL(SD_BLE_GAP_PRIVACY_SET, uint32_t, sd_ble_gap_privacy_set(ble_gap_privacy_params_t const *p_privacy_params)); + + +/**@brief Get privacy settings. + * + * @note ::ble_gap_privacy_params_t::p_device_irk must be initialized to NULL or a valid address before this function is called. + * If it is initialized to a valid address, the address pointed to will contain the current device IRK on return. + * + * @param[in,out] p_privacy_params Privacy settings. + * + * @retval ::NRF_SUCCESS Privacy settings read. + * @retval ::NRF_ERROR_INVALID_ADDR The pointer given for returning the privacy settings may be NULL or invalid. + * Otherwise, the p_device_irk pointer in privacy parameter is an invalid pointer. + */ +SVCALL(SD_BLE_GAP_PRIVACY_GET, uint32_t, sd_ble_gap_privacy_get(ble_gap_privacy_params_t *p_privacy_params)); + + +/**@brief Configure an advertising set. Set, clear or update advertising and scan response data. + * + * @note The format of the advertising data will be checked by this call to ensure interoperability. + * Limitations imposed by this API call to the data provided include having a flags data type in the scan response data and + * duplicating the local name in the advertising data and scan response data. + * + * @note In order to update advertising data while advertising, new advertising buffers must be provided. + * + * @mscs + * @mmsc{@ref BLE_GAP_ADV_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @param[in,out] p_adv_handle Provide a pointer to a handle containing @ref BLE_GAP_ADV_SET_HANDLE_NOT_SET to configure + * a new advertising set. On success, a new handle is then returned through the pointer. + * Provide a pointer to an existing advertising handle to configure an existing advertising set. + * @param[in] p_adv_data Advertising data. If set to NULL, no advertising data will be used. See @ref ble_gap_adv_data_t. + * @param[in] p_adv_params Advertising parameters. When this function is used to update advertising data while advertising, + * this parameter must be NULL. See @ref ble_gap_adv_params_t. + * + * @retval ::NRF_SUCCESS Advertising set successfully configured. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied: + * - Invalid advertising data configuration specified. See @ref ble_gap_adv_data_t. + * - Invalid configuration of p_adv_params. See @ref ble_gap_adv_params_t. + * - Use of whitelist requested but whitelist has not been set, + * see @ref sd_ble_gap_whitelist_set. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR ble_gap_adv_params_t::p_peer_addr is invalid. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * - It is invalid to provide non-NULL advertising set parameters while advertising. + * - It is invalid to provide the same data buffers while advertising. To update + * advertising data, provide new advertising buffers. + * @retval ::BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST Discoverable mode and whitelist incompatible. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE The provided advertising handle was not found. Use @ref BLE_GAP_ADV_SET_HANDLE_NOT_SET to + * configure a new advertising handle. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_FLAGS Invalid combination of advertising flags supplied. + * @retval ::NRF_ERROR_INVALID_DATA Invalid data type(s) supplied. Check the advertising data format specification + * given in Bluetooth Specification Version 5.0, Volume 3, Part C, Chapter 11. + * @retval ::NRF_ERROR_INVALID_LENGTH Invalid data length(s) supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported data length or advertising parameter configuration. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to configure a new advertising handle. Update an + * existing advertising handle instead. + * @retval ::BLE_ERROR_GAP_UUID_LIST_MISMATCH Invalid UUID list supplied. + */ +SVCALL(SD_BLE_GAP_ADV_SET_CONFIGURE, uint32_t, sd_ble_gap_adv_set_configure(uint8_t *p_adv_handle, ble_gap_adv_data_t const *p_adv_data, ble_gap_adv_params_t const *p_adv_params)); + + +/**@brief Start advertising (GAP Discoverable, Connectable modes, Broadcast Procedure). + * + * @note Only one advertiser may be active at any time. + * + * @events + * @event{@ref BLE_GAP_EVT_CONNECTED, Generated after connection has been established through connectable advertising.} + * @event{@ref BLE_GAP_EVT_ADV_SET_TERMINATED, Advertising set has terminated.} + * @event{@ref BLE_GAP_EVT_SCAN_REQ_REPORT, A scan request was received.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_ADV_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_CONN_PRIV_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @param[in] adv_handle Advertising handle to advertise on, received from @ref sd_ble_gap_adv_set_configure. + * @param[in] conn_cfg_tag Tag identifying a configuration set by @ref sd_ble_cfg_set or + * @ref BLE_CONN_CFG_TAG_DEFAULT to use the default connection configuration. For non-connectable + * advertising, this is ignored. + * + * @retval ::NRF_SUCCESS The BLE stack has started advertising. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. adv_handle is not configured or already advertising. + * @retval ::NRF_ERROR_CONN_COUNT The limit of available connections has been reached; connectable advertiser cannot be started. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE Advertising handle not found. Configure a new adveriting handle with @ref sd_ble_gap_adv_set_configure. + * @retval ::NRF_ERROR_NOT_FOUND conn_cfg_tag not found. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied: + * - Invalid configuration of p_adv_params. See @ref ble_gap_adv_params_t. + * - Use of whitelist requested but whitelist has not been set, see @ref sd_ble_gap_whitelist_set. + * @retval ::NRF_ERROR_RESOURCES Either: + * - adv_handle is configured with connectable advertising, but the event_length parameter + * associated with conn_cfg_tag is too small to be able to establish a connection on + * the selected advertising phys. Use @ref sd_ble_cfg_set to increase the event length. + * - Not enough BLE role slots available. + Stop one or more currently active roles (Central, Peripheral, Broadcaster or Observer) and try again. + * - p_adv_params is configured with connectable advertising, but the event_length parameter + * associated with conn_cfg_tag is too small to be able to establish a connection on + * the selected advertising phys. Use @ref sd_ble_cfg_set to increase the event length. + */ +SVCALL(SD_BLE_GAP_ADV_START, uint32_t, sd_ble_gap_adv_start(uint8_t adv_handle, uint8_t conn_cfg_tag)); + + +/**@brief Stop advertising (GAP Discoverable, Connectable modes, Broadcast Procedure). + * + * @mscs + * @mmsc{@ref BLE_GAP_ADV_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @param[in] adv_handle The advertising handle that should stop advertising. + * + * @retval ::NRF_SUCCESS The BLE stack has stopped advertising. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE Invalid advertising handle. + * @retval ::NRF_ERROR_INVALID_STATE The advertising handle is not advertising. + */ +SVCALL(SD_BLE_GAP_ADV_STOP, uint32_t, sd_ble_gap_adv_stop(uint8_t adv_handle)); + + + +/**@brief Update connection parameters. + * + * @details In the central role this will initiate a Link Layer connection parameter update procedure, + * otherwise in the peripheral role, this will send the corresponding L2CAP request and wait for + * the central to perform the procedure. In both cases, and regardless of success or failure, the application + * will be informed of the result with a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE event. + * + * @details This function can be used as a central both to reply to a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST or to start the procedure unrequested. + * + * @events + * @event{@ref BLE_GAP_EVT_CONN_PARAM_UPDATE, Result of the connection parameter update procedure.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CPU_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} + * @mmsc{@ref BLE_GAP_MULTILINK_CPU_MSC} + * @mmsc{@ref BLE_GAP_MULTILINK_CTRL_PROC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_CPU_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_conn_params Pointer to desired connection parameters. If NULL is provided on a peripheral role, + * the parameters in the PPCP characteristic of the GAP service will be used instead. + * If NULL is provided on a central role and in response to a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST, the peripheral request will be rejected + * + * @retval ::NRF_SUCCESS The Connection Update procedure has been started successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::NRF_ERROR_BUSY Procedure already in progress, wait for pending procedures to complete and retry. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + */ +SVCALL(SD_BLE_GAP_CONN_PARAM_UPDATE, uint32_t, sd_ble_gap_conn_param_update(uint16_t conn_handle, ble_gap_conn_params_t const *p_conn_params)); + + +/**@brief Disconnect (GAP Link Termination). + * + * @details This call initiates the disconnection procedure, and its completion will be communicated to the application + * with a @ref BLE_GAP_EVT_DISCONNECTED event. + * + * @events + * @event{@ref BLE_GAP_EVT_DISCONNECTED, Generated when disconnection procedure is complete.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CONN_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] hci_status_code HCI status code, see @ref BLE_HCI_STATUS_CODES (accepted values are @ref BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION and @ref BLE_HCI_CONN_INTERVAL_UNACCEPTABLE). + * + * @retval ::NRF_SUCCESS The disconnection procedure has been started successfully. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation (disconnection is already in progress). + */ +SVCALL(SD_BLE_GAP_DISCONNECT, uint32_t, sd_ble_gap_disconnect(uint16_t conn_handle, uint8_t hci_status_code)); + + +/**@brief Set the radio's transmit power. + * + * @param[in] role The role to set the transmit power for, see @ref BLE_GAP_TX_POWER_ROLES for + * possible roles. + * @param[in] handle The handle parameter is interpreted depending on role: + * - If role is @ref BLE_GAP_TX_POWER_ROLE_CONN, this value is the specific connection handle. + * - If role is @ref BLE_GAP_TX_POWER_ROLE_ADV, the advertising set identified with the advertising handle, + * will use the specified transmit power, and include it in the advertising packet headers if + * @ref ble_gap_adv_properties_t::include_tx_power set. + * - For all other roles handle is ignored. + * @param[in] tx_power Radio transmit power in dBm (see note for accepted values). + * + * @note Supported tx_power values: -40dBm, -20dBm, -16dBm, -12dBm, -8dBm, -4dBm, 0dBm, +2dBm, +3dBm, +4dBm, +5dBm, +6dBm, +7dBm and +8dBm. + * @note The initiator will have the same transmit power as the scanner. + * @note When a connection is created it will inherit the transmit power from the initiator or + * advertiser leading to the connection. + * + * @retval ::NRF_SUCCESS Successfully changed the transmit power. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE Advertising handle not found. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_TX_POWER_SET, uint32_t, sd_ble_gap_tx_power_set(uint8_t role, uint16_t handle, int8_t tx_power)); + + +/**@brief Set GAP Appearance value. + * + * @param[in] appearance Appearance (16-bit), see @ref BLE_APPEARANCES. + * + * @retval ::NRF_SUCCESS Appearance value set successfully. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + */ +SVCALL(SD_BLE_GAP_APPEARANCE_SET, uint32_t, sd_ble_gap_appearance_set(uint16_t appearance)); + + +/**@brief Get GAP Appearance value. + * + * @param[out] p_appearance Pointer to appearance (16-bit) to be filled in, see @ref BLE_APPEARANCES. + * + * @retval ::NRF_SUCCESS Appearance value retrieved successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + */ +SVCALL(SD_BLE_GAP_APPEARANCE_GET, uint32_t, sd_ble_gap_appearance_get(uint16_t *p_appearance)); + + +/**@brief Set GAP Peripheral Preferred Connection Parameters. + * + * @param[in] p_conn_params Pointer to a @ref ble_gap_conn_params_t structure with the desired parameters. + * + * @retval ::NRF_SUCCESS Peripheral Preferred Connection Parameters set successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + */ +SVCALL(SD_BLE_GAP_PPCP_SET, uint32_t, sd_ble_gap_ppcp_set(ble_gap_conn_params_t const *p_conn_params)); + + +/**@brief Get GAP Peripheral Preferred Connection Parameters. + * + * @param[out] p_conn_params Pointer to a @ref ble_gap_conn_params_t structure where the parameters will be stored. + * + * @retval ::NRF_SUCCESS Peripheral Preferred Connection Parameters retrieved successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + */ +SVCALL(SD_BLE_GAP_PPCP_GET, uint32_t, sd_ble_gap_ppcp_get(ble_gap_conn_params_t *p_conn_params)); + + +/**@brief Set GAP device name. + * + * @note If the device name is located in application flash memory (see @ref ble_gap_cfg_device_name_t), + * it cannot be changed. Then @ref NRF_ERROR_FORBIDDEN will be returned. + * + * @param[in] p_write_perm Write permissions for the Device Name characteristic, see @ref ble_gap_conn_sec_mode_t. + * @param[in] p_dev_name Pointer to a UTF-8 encoded, non NULL-terminated string. + * @param[in] len Length of the UTF-8, non NULL-terminated string pointed to by p_dev_name in octets (must be smaller or equal than @ref BLE_GAP_DEVNAME_MAX_LEN). + * + * @retval ::NRF_SUCCESS GAP device name and permissions set successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. + * @retval ::NRF_ERROR_FORBIDDEN Device name is not writable. + */ +SVCALL(SD_BLE_GAP_DEVICE_NAME_SET, uint32_t, sd_ble_gap_device_name_set(ble_gap_conn_sec_mode_t const *p_write_perm, uint8_t const *p_dev_name, uint16_t len)); + + +/**@brief Get GAP device name. + * + * @note If the device name is longer than the size of the supplied buffer, + * p_len will return the complete device name length, + * and not the number of bytes actually returned in p_dev_name. + * The application may use this information to allocate a suitable buffer size. + * + * @param[out] p_dev_name Pointer to an empty buffer where the UTF-8 non NULL-terminated string will be placed. Set to NULL to obtain the complete device name length. + * @param[in,out] p_len Length of the buffer pointed by p_dev_name, complete device name length on output. + * + * @retval ::NRF_SUCCESS GAP device name retrieved successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. + */ +SVCALL(SD_BLE_GAP_DEVICE_NAME_GET, uint32_t, sd_ble_gap_device_name_get(uint8_t *p_dev_name, uint16_t *p_len)); + + +/**@brief Initiate the GAP Authentication procedure. + * + * @details In the central role, this function will send an SMP Pairing Request (or an SMP Pairing Failed if rejected), + * otherwise in the peripheral role, an SMP Security Request will be sent. + * + * @events + * @event{Depending on the security parameters set and the packet exchanges with the peer\, the following events may be generated:} + * @event{@ref BLE_GAP_EVT_SEC_PARAMS_REQUEST} + * @event{@ref BLE_GAP_EVT_SEC_INFO_REQUEST} + * @event{@ref BLE_GAP_EVT_PASSKEY_DISPLAY} + * @event{@ref BLE_GAP_EVT_KEY_PRESSED} + * @event{@ref BLE_GAP_EVT_AUTH_KEY_REQUEST} + * @event{@ref BLE_GAP_EVT_LESC_DHKEY_REQUEST} + * @event{@ref BLE_GAP_EVT_CONN_SEC_UPDATE} + * @event{@ref BLE_GAP_EVT_AUTH_STATUS} + * @event{@ref BLE_GAP_EVT_TIMEOUT} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_SEC_REQ_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_SEC_REQ_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_sec_params Pointer to the @ref ble_gap_sec_params_t structure with the security parameters to be used during the pairing or bonding procedure. + * In the peripheral role, only the bond, mitm, lesc and keypress fields of this structure are used. + * In the central role, this pointer may be NULL to reject a Security Request. + * + * @retval ::NRF_SUCCESS Successfully initiated authentication procedure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::NRF_ERROR_NO_MEM The maximum number of authentication procedures that can run in parallel for the given role is reached. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED Setting of sign or link fields in @ref ble_gap_sec_kdist_t not supported. + * @retval ::NRF_ERROR_TIMEOUT A SMP timeout has occurred, and further SMP operations on this link is prohibited. + */ +SVCALL(SD_BLE_GAP_AUTHENTICATE, uint32_t, sd_ble_gap_authenticate(uint16_t conn_handle, ble_gap_sec_params_t const *p_sec_params)); + + +/**@brief Reply with GAP security parameters. + * + * @details This function is only used to reply to a @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. + * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. + * + * @events + * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_JW_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_PERIPH_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_CENTRAL_OOB_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_CONFIRM_FAIL_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_KS_TOO_SMALL_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_APP_ERROR_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_REMOTE_PAIRING_FAIL_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_TIMEOUT_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] sec_status Security status, see @ref BLE_GAP_SEC_STATUS. + * @param[in] p_sec_params Pointer to a @ref ble_gap_sec_params_t security parameters structure. In the central role this must be set to NULL, as the parameters have + * already been provided during a previous call to @ref sd_ble_gap_authenticate. + * @param[in,out] p_sec_keyset Pointer to a @ref ble_gap_sec_keyset_t security keyset structure. Any keys generated and/or distributed as a result of the ongoing security procedure + * will be stored into the memory referenced by the pointers inside this structure. The keys will be stored and available to the application + * upon reception of a @ref BLE_GAP_EVT_AUTH_STATUS event. + * Note that the SoftDevice expects the application to provide memory for storing the + * peer's keys. So it must be ensured that the relevant pointers inside this structure are not NULL. The pointers to the local key + * can, however, be NULL, in which case, the local key data will not be available to the application upon reception of the + * @ref BLE_GAP_EVT_AUTH_STATUS event. + * + * @retval ::NRF_SUCCESS Successfully accepted security parameter from the application. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED Setting of sign or link fields in @ref ble_gap_sec_kdist_t not supported. + */ +SVCALL(SD_BLE_GAP_SEC_PARAMS_REPLY, uint32_t, sd_ble_gap_sec_params_reply(uint16_t conn_handle, uint8_t sec_status, ble_gap_sec_params_t const *p_sec_params, ble_gap_sec_keyset_t const *p_sec_keyset)); + + +/**@brief Reply with an authentication key. + * + * @details This function is only used to reply to a @ref BLE_GAP_EVT_AUTH_KEY_REQUEST or a @ref BLE_GAP_EVT_PASSKEY_DISPLAY, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. + * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. + * + * @events + * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_CENTRAL_OOB_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] key_type See @ref BLE_GAP_AUTH_KEY_TYPES. + * @param[in] p_key If key type is @ref BLE_GAP_AUTH_KEY_TYPE_NONE, then NULL. + * If key type is @ref BLE_GAP_AUTH_KEY_TYPE_PASSKEY, then a 6-byte ASCII string (digit 0..9 only, no NULL termination) + * or NULL when confirming LE Secure Connections Numeric Comparison. + * If key type is @ref BLE_GAP_AUTH_KEY_TYPE_OOB, then a 16-byte OOB key value in little-endian format. + * + * @retval ::NRF_SUCCESS Authentication key successfully set. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_AUTH_KEY_REPLY, uint32_t, sd_ble_gap_auth_key_reply(uint16_t conn_handle, uint8_t key_type, uint8_t const *p_key)); + + +/**@brief Reply with an LE Secure connections DHKey. + * + * @details This function is only used to reply to a @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. + * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. + * + * @events + * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_dhkey LE Secure Connections DHKey. + * + * @retval ::NRF_SUCCESS DHKey successfully set. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_LESC_DHKEY_REPLY, uint32_t, sd_ble_gap_lesc_dhkey_reply(uint16_t conn_handle, ble_gap_lesc_dhkey_t const *p_dhkey)); + + +/**@brief Notify the peer of a local keypress. + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] kp_not See @ref BLE_GAP_KP_NOT_TYPES. + * + * @retval ::NRF_SUCCESS Keypress notification successfully queued for transmission. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Either not entering a passkey or keypresses have not been enabled by both peers. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_BUSY The BLE stack is busy. Retry at later time. + */ +SVCALL(SD_BLE_GAP_KEYPRESS_NOTIFY, uint32_t, sd_ble_gap_keypress_notify(uint16_t conn_handle, uint8_t kp_not)); + + +/**@brief Generate a set of OOB data to send to a peer out of band. + * + * @note The @ref ble_gap_addr_t included in the OOB data returned will be the currently active one (or, if a connection has already been established, + * the one used during connection setup). The application may manually overwrite it with an updated value. + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. Can be @ref BLE_CONN_HANDLE_INVALID if a BLE connection has not been established yet. + * @param[in] p_pk_own LE Secure Connections local P-256 Public Key. + * @param[out] p_oobd_own The OOB data to be sent out of band to a peer. + * + * @retval ::NRF_SUCCESS OOB data successfully generated. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_LESC_OOB_DATA_GET, uint32_t, sd_ble_gap_lesc_oob_data_get(uint16_t conn_handle, ble_gap_lesc_p256_pk_t const *p_pk_own, ble_gap_lesc_oob_data_t *p_oobd_own)); + +/**@brief Provide the OOB data sent/received out of band. + * + * @note An authentication procedure with OOB selected as an algorithm must be in progress when calling this function. + * @note A @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST event with the oobd_req set to 1 must have been received prior to calling this function. + * + * @events + * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_oobd_own The OOB data sent out of band to a peer or NULL if the peer has not received OOB data. + * Must correspond to @ref ble_gap_sec_params_t::oob flag in @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST. + * @param[in] p_oobd_peer The OOB data received out of band from a peer or NULL if none received. + * Must correspond to @ref ble_gap_sec_params_t::oob flag in @ref sd_ble_gap_authenticate in the central role + * or @ref sd_ble_gap_sec_params_reply in the peripheral role. + * + * @retval ::NRF_SUCCESS OOB data accepted. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_LESC_OOB_DATA_SET, uint32_t, sd_ble_gap_lesc_oob_data_set(uint16_t conn_handle, ble_gap_lesc_oob_data_t const *p_oobd_own, ble_gap_lesc_oob_data_t const *p_oobd_peer)); + + +/**@brief Initiate GAP Encryption procedure. + * + * @details In the central role, this function will initiate the encryption procedure using the encryption information provided. + * + * @events + * @event{@ref BLE_GAP_EVT_CONN_SEC_UPDATE, The connection security has been updated.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_ENC_MSC} + * @mmsc{@ref BLE_GAP_MULTILINK_CTRL_PROC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_SEC_REQ_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_master_id Pointer to a @ref ble_gap_master_id_t master identification structure. + * @param[in] p_enc_info Pointer to a @ref ble_gap_enc_info_t encryption information structure. + * + * @retval ::NRF_SUCCESS Successfully initiated authentication procedure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::BLE_ERROR_INVALID_ROLE Operation is not supported in the Peripheral role. + * @retval ::NRF_ERROR_BUSY Procedure already in progress or not allowed at this time, wait for pending procedures to complete and retry. + */ +SVCALL(SD_BLE_GAP_ENCRYPT, uint32_t, sd_ble_gap_encrypt(uint16_t conn_handle, ble_gap_master_id_t const *p_master_id, ble_gap_enc_info_t const *p_enc_info)); + + +/**@brief Reply with GAP security information. + * + * @details This function is only used to reply to a @ref BLE_GAP_EVT_SEC_INFO_REQUEST, calling it at other times will result in @ref NRF_ERROR_INVALID_STATE. + * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. + * @note Data signing is not yet supported, and p_sign_info must therefore be NULL. + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_ENC_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_enc_info Pointer to a @ref ble_gap_enc_info_t encryption information structure. May be NULL to signal none is available. + * @param[in] p_id_info Pointer to a @ref ble_gap_irk_t identity information structure. May be NULL to signal none is available. + * @param[in] p_sign_info Pointer to a @ref ble_gap_sign_info_t signing information structure. May be NULL to signal none is available. + * + * @retval ::NRF_SUCCESS Successfully accepted security information. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_SEC_INFO_REPLY, uint32_t, sd_ble_gap_sec_info_reply(uint16_t conn_handle, ble_gap_enc_info_t const *p_enc_info, ble_gap_irk_t const *p_id_info, ble_gap_sign_info_t const *p_sign_info)); + + +/**@brief Get the current connection security. + * + * @param[in] conn_handle Connection handle. + * @param[out] p_conn_sec Pointer to a @ref ble_gap_conn_sec_t structure to be filled in. + * + * @retval ::NRF_SUCCESS Current connection security successfully retrieved. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_CONN_SEC_GET, uint32_t, sd_ble_gap_conn_sec_get(uint16_t conn_handle, ble_gap_conn_sec_t *p_conn_sec)); + + +/**@brief Start reporting the received signal strength to the application. + * + * A new event is reported whenever the RSSI value changes, until @ref sd_ble_gap_rssi_stop is called. + * + * @events + * @event{@ref BLE_GAP_EVT_RSSI_CHANGED, New RSSI data available. How often the event is generated is + * dependent on the settings of the threshold_dbm + * and skip_count input parameters.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} + * @mmsc{@ref BLE_GAP_RSSI_FILT_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] threshold_dbm Minimum change in dBm before triggering the @ref BLE_GAP_EVT_RSSI_CHANGED event. Events are disabled if threshold_dbm equals @ref BLE_GAP_RSSI_THRESHOLD_INVALID. + * @param[in] skip_count Number of RSSI samples with a change of threshold_dbm or more before sending a new @ref BLE_GAP_EVT_RSSI_CHANGED event. + * + * @retval ::NRF_SUCCESS Successfully activated RSSI reporting. + * @retval ::NRF_ERROR_INVALID_STATE RSSI reporting is already ongoing. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_RSSI_START, uint32_t, sd_ble_gap_rssi_start(uint16_t conn_handle, uint8_t threshold_dbm, uint8_t skip_count)); + + +/**@brief Stop reporting the received signal strength. + * + * @note An RSSI change detected before the call but not yet received by the application + * may be reported after @ref sd_ble_gap_rssi_stop has been called. + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} + * @mmsc{@ref BLE_GAP_RSSI_FILT_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * + * @retval ::NRF_SUCCESS Successfully deactivated RSSI reporting. + * @retval ::NRF_ERROR_INVALID_STATE RSSI reporting is not ongoing. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_RSSI_STOP, uint32_t, sd_ble_gap_rssi_stop(uint16_t conn_handle)); + + +/**@brief Get the received signal strength for the last connection event. + * + * @ref sd_ble_gap_rssi_start must be called to start reporting RSSI before using this function. @ref NRF_ERROR_NOT_FOUND + * will be returned until RSSI was sampled for the first time after calling @ref sd_ble_gap_rssi_start. + * @note ERRATA-153 requires the rssi sample to be compensated based on a temperature measurement. + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[out] p_rssi Pointer to the location where the RSSI measurement shall be stored. + * @param[out] p_ch_index Pointer to the location where Channel Index for the RSSI measurement shall be stored. + * + * @retval ::NRF_SUCCESS Successfully read the RSSI. + * @retval ::NRF_ERROR_NOT_FOUND No sample is available. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_INVALID_STATE RSSI reporting is not ongoing. + */ +SVCALL(SD_BLE_GAP_RSSI_GET, uint32_t, sd_ble_gap_rssi_get(uint16_t conn_handle, int8_t *p_rssi, uint8_t *p_ch_index)); + + +/**@brief Start or continue scanning (GAP Discovery procedure, Observer Procedure). + * + * @note A call to this function will require the application to keep the memory pointed by + * p_adv_report_buffer alive until the buffer is released. The buffer is released when the scanner is stopped + * or when this function is called with another buffer. + * + * @note The scanner will automatically stop in the following cases: + * - @ref sd_ble_gap_scan_stop is called. + * - @ref sd_ble_gap_connect is called. + * - A @ref BLE_GAP_EVT_TIMEOUT with source set to @ref BLE_GAP_TIMEOUT_SRC_SCAN is received. + * - When a @ref BLE_GAP_EVT_ADV_REPORT event is received and @ref ble_gap_adv_report_type_t::status is not set to + * @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA. In this case scanning is only paused to let the application + * access received data. The application must call this function to continue scanning, or call @ref sd_ble_gap_scan_stop + * to stop scanning. + * + * @note If a @ref BLE_GAP_EVT_ADV_REPORT event is received with @ref ble_gap_adv_report_type_t::status set to + * @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA, the scanner will continue scanning, and the application will + * receive more reports from this advertising event. The following reports will include the old and new received data. + * The application can stop the scanner from receiving more packets from this advertising event by calling this function. + * This might be useful when receiving data from extended advertising events where @ref ble_gap_evt_adv_report_t::aux_pointer + * is large. + * + * @events + * @event{@ref BLE_GAP_EVT_ADV_REPORT, An advertising or scan response packet has been received.} + * @event{@ref BLE_GAP_EVT_TIMEOUT, Scanner has timed out.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_SCAN_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @param[in] p_scan_params Pointer to scan parameters structure. When this function is used to continue + * scanning, this parameter must be NULL. + * @param[in] p_adv_report_buffer Pointer to buffer used to store incoming advertising data. + * The memory pointed to should be kept alive until the scanning is stopped. + * See @ref BLE_GAP_SCAN_BUFFER_SIZE for minimum and maximum buffer size. + * If the scanner receives advertising data larger than can be stored in the buffer, + * a @ref BLE_GAP_EVT_ADV_REPORT will be raised with @ref ble_gap_adv_report_type_t::status + * set to @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_TRUNCATED. + * + * @retval ::NRF_SUCCESS Successfully initiated scanning procedure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Either: + * - Scanning is already ongoing and p_scan_params was not NULL + * - Scanning is not running and p_scan_params was NULL. + * - The scanner has timed out when this function is called to continue scanning. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. See @ref ble_gap_scan_params_t. + * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported parameters supplied. See @ref ble_gap_scan_params_t. + * @retval ::NRF_ERROR_INVALID_LENGTH The provided buffer length is invalid. See @ref BLE_GAP_SCAN_BUFFER_MIN. + * @retval ::NRF_ERROR_RESOURCES Not enough BLE role slots available. + * Stop one or more currently active roles (Central, Peripheral or Broadcaster) and try again + */ +SVCALL(SD_BLE_GAP_SCAN_START, uint32_t, sd_ble_gap_scan_start(ble_gap_scan_params_t const *p_scan_params, ble_data_t const * p_adv_report_buffer)); + + +/**@brief Stop scanning (GAP Discovery procedure, Observer Procedure). + * + * @note The buffer provided in @ref sd_ble_gap_scan_start is released. + * + * @mscs + * @mmsc{@ref BLE_GAP_SCAN_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Successfully stopped scanning procedure. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Not in the scanning state. + */ +SVCALL(SD_BLE_GAP_SCAN_STOP, uint32_t, sd_ble_gap_scan_stop(void)); + + +/**@brief Create a connection (GAP Link Establishment). + * + * @note If a scanning procedure is currently in progress it will be automatically stopped when calling this function. + * The scanning procedure will be stopped even if the function returns an error. + * + * @mscs + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_CONN_PRIV_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_CONN_MSC} + * @endmscs + * + * @param[in] p_peer_addr Pointer to peer identity address. If @ref ble_gap_scan_params_t::filter_policy is set to use + * whitelist, then p_peer_addr is ignored. + * @param[in] p_scan_params Pointer to scan parameters structure. + * @param[in] p_conn_params Pointer to desired connection parameters. + * @param[in] conn_cfg_tag Tag identifying a configuration set by @ref sd_ble_cfg_set or + * @ref BLE_CONN_CFG_TAG_DEFAULT to use the default connection configuration. + * + * @retval ::NRF_SUCCESS Successfully initiated connection procedure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid parameter(s) pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * - Invalid parameter(s) in p_scan_params or p_conn_params. + * - Use of whitelist requested but whitelist has not been set, see @ref sd_ble_gap_whitelist_set. + * - Peer address was not present in the device identity list, see @ref sd_ble_gap_device_identities_set. + * @retval ::NRF_ERROR_NOT_FOUND conn_cfg_tag not found. + * @retval ::NRF_ERROR_INVALID_STATE The SoftDevice is in an invalid state to perform this operation. This may be due to an + * existing locally initiated connect procedure, which must complete before initiating again. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid Peer address. + * @retval ::NRF_ERROR_CONN_COUNT The limit of available connections has been reached. + * @retval ::NRF_ERROR_RESOURCES Either: + * - Not enough BLE role slots available. + * Stop one or more currently active roles (Central, Peripheral or Observer) and try again. + * - The event_length parameter associated with conn_cfg_tag is too small to be able to + * establish a connection on the selected @ref ble_gap_scan_params_t::scan_phys. + * Use @ref sd_ble_cfg_set to increase the event length. + */ +SVCALL(SD_BLE_GAP_CONNECT, uint32_t, sd_ble_gap_connect(ble_gap_addr_t const *p_peer_addr, ble_gap_scan_params_t const *p_scan_params, ble_gap_conn_params_t const *p_conn_params, uint8_t conn_cfg_tag)); + + +/**@brief Cancel a connection establishment. + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_CONN_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Successfully canceled an ongoing connection procedure. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + */ +SVCALL(SD_BLE_GAP_CONNECT_CANCEL, uint32_t, sd_ble_gap_connect_cancel(void)); + + +/**@brief Initiate or respond to a PHY Update Procedure + * + * @details This function is used to initiate or respond to a PHY Update Procedure. It will always + * generate a @ref BLE_GAP_EVT_PHY_UPDATE event if successfully executed. + * If this function is used to initiate a PHY Update procedure and the only option + * provided in @ref ble_gap_phys_t::tx_phys and @ref ble_gap_phys_t::rx_phys is the + * currently active PHYs in the respective directions, the SoftDevice will generate a + * @ref BLE_GAP_EVT_PHY_UPDATE with the current PHYs set and will not initiate the + * procedure in the Link Layer. + * + * If @ref ble_gap_phys_t::tx_phys or @ref ble_gap_phys_t::rx_phys is @ref BLE_GAP_PHY_AUTO, + * then the stack will select PHYs based on the peer's PHY preferences and the local link + * configuration. The PHY Update procedure will for this case result in a PHY combination + * that respects the time constraints configured with @ref sd_ble_cfg_set and the current + * link layer data length. + * + * When acting as a central, the SoftDevice will select the fastest common PHY in each direction. + * + * If the peer does not support the PHY Update Procedure, then the resulting + * @ref BLE_GAP_EVT_PHY_UPDATE event will have a status set to + * @ref BLE_HCI_UNSUPPORTED_REMOTE_FEATURE. + * + * If the PHY procedure was rejected by the peer due to a procedure collision, the status + * will be @ref BLE_HCI_STATUS_CODE_LMP_ERROR_TRANSACTION_COLLISION or + * @ref BLE_HCI_DIFFERENT_TRANSACTION_COLLISION. + * If the peer responds to the PHY Update procedure with invalid parameters, the status + * will be @ref BLE_HCI_STATUS_CODE_INVALID_LMP_PARAMETERS. + * If the PHY procedure was rejected by the peer for a different reason, the status will + * contain the reason as specified by the peer. + * + * @note @ref BLE_GAP_PHY_CODED is only supported as an experimental feature in this SoftDevice. + * When this function is used to reply to a PHY Update, depending on the peers preferences, + * @ref BLE_GAP_PHY_AUTO might result in the PHY to be changed to @ref BLE_GAP_PHY_CODED. + * + * @events + * @event{@ref BLE_GAP_EVT_PHY_UPDATE, Result of the PHY Update Procedure.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_PHY_UPDATE} + * @mmsc{@ref BLE_GAP_PERIPHERAL_PHY_UPDATE} + * @endmscs + * + * @param[in] conn_handle Connection handle to indicate the connection for which the PHY Update is requested. + * @param[in] p_gap_phys Pointer to PHY structure. + * + * @retval ::NRF_SUCCESS Successfully requested a PHY Update. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::NRF_ERROR_RESOURCES The connection event length configured for this link is not sufficient for the combination of + * @ref ble_gap_phys_t::tx_phys, @ref ble_gap_phys_t::rx_phys, and @ref ble_gap_data_length_params_t. + * The connection event length is configured with @ref BLE_CONN_CFG_GAP using @ref sd_ble_cfg_set. + * @retval ::NRF_ERROR_BUSY Procedure is already in progress or not allowed at this time. Process pending events and wait for the pending procedure to complete and retry. + * + */ +SVCALL(SD_BLE_GAP_PHY_UPDATE, uint32_t, sd_ble_gap_phy_update(uint16_t conn_handle, ble_gap_phys_t const *p_gap_phys)); + + +/**@brief Initiate or respond to a Data Length Update Procedure. + * + * @note If the application uses @ref BLE_GAP_DATA_LENGTH_AUTO for one or more members of + * p_dl_params, the SoftDevice will choose the highest value supported in current + * configuration and connection parameters. + * + * @param[in] conn_handle Connection handle. + * @param[in] p_dl_params Pointer to local parameters to be used in Data Length Update + * Procedure. Set any member to @ref BLE_GAP_DATA_LENGTH_AUTO to let + * the SoftDevice automatically decide the value for that member. + * Set to NULL to use automatic values for all members. + * @param[out] p_dl_limitation Pointer to limitation to be written when local device does not + * have enough resources or does not support the requested Data Length + * Update parameters. Ignored if NULL. + * + * @mscs + * @mmsc{@ref BLE_GAP_DATA_LENGTH_UPDATE_PROCEDURE_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Successfully set Data Length Extension initiation/response parameters. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameters supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED The requested parameters are not supported by the SoftDevice. Inspect + * p_dl_limitation to see which parameter is not supported. + * @retval ::NRF_ERROR_RESOURCES The connection event length configured for this link is not sufficient for the requested parameters. + * Use @ref sd_ble_cfg_set with @ref BLE_CONN_CFG_GAP to increase the connection event length. + * Inspect p_dl_limitation to see where the limitation is. + * @retval ::NRF_ERROR_BUSY Peer has already initiated a Data Length Update Procedure. Process the + * pending @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST event to respond. + */ +SVCALL(SD_BLE_GAP_DATA_LENGTH_UPDATE, uint32_t, sd_ble_gap_data_length_update(uint16_t conn_handle, ble_gap_data_length_params_t const *p_dl_params, ble_gap_data_length_limitation_t *p_dl_limitation)); + +/**@brief Start the Quality of Service (QoS) channel survey module. + * + * @details The channel survey module provides measurements of the energy levels on + * the Bluetooth Low Energy channels. When the module is enabled, @ref BLE_GAP_EVT_QOS_CHANNEL_SURVEY_REPORT + * events will periodically report the measured energy levels for each channel. + * + * @note The measurements are scheduled with lower priority than other Bluetooth Low Energy roles, + * Radio Timeslot API events and Flash API events. + * + * @note The channel survey module will attempt to do measurements so that the average interval + * between measurements will be interval_us. However due to the channel survey module + * having the lowest priority of all roles and modules, this may not be possible. In that + * case fewer than expected channel survey reports may be given. + * + * @note In order to use the channel survey module, @ref ble_gap_cfg_role_count_t::qos_channel_survey_role_available + * must be set. This is done using @ref sd_ble_cfg_set. + * + * @param[in] interval_us Requested average interval for the measurements and reports. See + * @ref BLE_GAP_QOS_CHANNEL_SURVEY_INTERVALS for valid ranges. If set + * to @ref BLE_GAP_QOS_CHANNEL_SURVEY_INTERVAL_CONTINUOUS, the channel + * survey role will be scheduled at every available opportunity. + * + * @retval ::NRF_SUCCESS The module is successfully started. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter supplied. interval_us is out of the + * allowed range. + * @retval ::NRF_ERROR_INVALID_STATE Trying to start the module when already running. + * @retval ::NRF_ERROR_RESOURCES The channel survey module is not available to the application. + * Set @ref ble_gap_cfg_role_count_t::qos_channel_survey_role_available using + * @ref sd_ble_cfg_set. + */ +SVCALL(SD_BLE_GAP_QOS_CHANNEL_SURVEY_START, uint32_t, sd_ble_gap_qos_channel_survey_start(uint32_t interval_us)); + +/**@brief Stop the Quality of Service (QoS) channel survey module. + * + * @retval ::NRF_SUCCESS The module is successfully stopped. + * @retval ::NRF_ERROR_INVALID_STATE Trying to stop the module when it is not running. + */ +SVCALL(SD_BLE_GAP_QOS_CHANNEL_SURVEY_STOP, uint32_t, sd_ble_gap_qos_channel_survey_stop(void)); + + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // BLE_GAP_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_gatt.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_gatt.h new file mode 100644 index 00000000000..98a7a150bfc --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_gatt.h @@ -0,0 +1,228 @@ +/* + * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_GATT Generic Attribute Profile (GATT) Common + @{ + @brief Common definitions and prototypes for the GATT interfaces. + */ + +#ifndef BLE_GATT_H__ +#define BLE_GATT_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_hci.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_GATT_DEFINES Defines + * @{ */ + +/** @brief Default ATT MTU, in bytes. */ +#define BLE_GATT_ATT_MTU_DEFAULT 23 + +/**@brief Invalid Attribute Handle. */ +#define BLE_GATT_HANDLE_INVALID 0x0000 + +/**@brief First Attribute Handle. */ +#define BLE_GATT_HANDLE_START 0x0001 + +/**@brief Last Attribute Handle. */ +#define BLE_GATT_HANDLE_END 0xFFFF + +/** @defgroup BLE_GATT_TIMEOUT_SOURCES GATT Timeout sources + * @{ */ +#define BLE_GATT_TIMEOUT_SRC_PROTOCOL 0x00 /**< ATT Protocol timeout. */ +/** @} */ + +/** @defgroup BLE_GATT_WRITE_OPS GATT Write operations + * @{ */ +#define BLE_GATT_OP_INVALID 0x00 /**< Invalid Operation. */ +#define BLE_GATT_OP_WRITE_REQ 0x01 /**< Write Request. */ +#define BLE_GATT_OP_WRITE_CMD 0x02 /**< Write Command. */ +#define BLE_GATT_OP_SIGN_WRITE_CMD 0x03 /**< Signed Write Command. */ +#define BLE_GATT_OP_PREP_WRITE_REQ 0x04 /**< Prepare Write Request. */ +#define BLE_GATT_OP_EXEC_WRITE_REQ 0x05 /**< Execute Write Request. */ +/** @} */ + +/** @defgroup BLE_GATT_EXEC_WRITE_FLAGS GATT Execute Write flags + * @{ */ +#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_CANCEL 0x00 /**< Cancel prepared write. */ +#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_WRITE 0x01 /**< Execute prepared write. */ +/** @} */ + +/** @defgroup BLE_GATT_HVX_TYPES GATT Handle Value operations + * @{ */ +#define BLE_GATT_HVX_INVALID 0x00 /**< Invalid Operation. */ +#define BLE_GATT_HVX_NOTIFICATION 0x01 /**< Handle Value Notification. */ +#define BLE_GATT_HVX_INDICATION 0x02 /**< Handle Value Indication. */ +/** @} */ + +/** @defgroup BLE_GATT_STATUS_CODES GATT Status Codes + * @{ */ +#define BLE_GATT_STATUS_SUCCESS 0x0000 /**< Success. */ +#define BLE_GATT_STATUS_UNKNOWN 0x0001 /**< Unknown or not applicable status. */ +#define BLE_GATT_STATUS_ATTERR_INVALID 0x0100 /**< ATT Error: Invalid Error Code. */ +#define BLE_GATT_STATUS_ATTERR_INVALID_HANDLE 0x0101 /**< ATT Error: Invalid Attribute Handle. */ +#define BLE_GATT_STATUS_ATTERR_READ_NOT_PERMITTED 0x0102 /**< ATT Error: Read not permitted. */ +#define BLE_GATT_STATUS_ATTERR_WRITE_NOT_PERMITTED 0x0103 /**< ATT Error: Write not permitted. */ +#define BLE_GATT_STATUS_ATTERR_INVALID_PDU 0x0104 /**< ATT Error: Used in ATT as Invalid PDU. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHENTICATION 0x0105 /**< ATT Error: Authenticated link required. */ +#define BLE_GATT_STATUS_ATTERR_REQUEST_NOT_SUPPORTED 0x0106 /**< ATT Error: Used in ATT as Request Not Supported. */ +#define BLE_GATT_STATUS_ATTERR_INVALID_OFFSET 0x0107 /**< ATT Error: Offset specified was past the end of the attribute. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHORIZATION 0x0108 /**< ATT Error: Used in ATT as Insufficient Authorization. */ +#define BLE_GATT_STATUS_ATTERR_PREPARE_QUEUE_FULL 0x0109 /**< ATT Error: Used in ATT as Prepare Queue Full. */ +#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_FOUND 0x010A /**< ATT Error: Used in ATT as Attribute not found. */ +#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_LONG 0x010B /**< ATT Error: Attribute cannot be read or written using read/write blob requests. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_ENC_KEY_SIZE 0x010C /**< ATT Error: Encryption key size used is insufficient. */ +#define BLE_GATT_STATUS_ATTERR_INVALID_ATT_VAL_LENGTH 0x010D /**< ATT Error: Invalid value size. */ +#define BLE_GATT_STATUS_ATTERR_UNLIKELY_ERROR 0x010E /**< ATT Error: Very unlikely error. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_ENCRYPTION 0x010F /**< ATT Error: Encrypted link required. */ +#define BLE_GATT_STATUS_ATTERR_UNSUPPORTED_GROUP_TYPE 0x0110 /**< ATT Error: Attribute type is not a supported grouping attribute. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_RESOURCES 0x0111 /**< ATT Error: Encrypted link required. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_BEGIN 0x0112 /**< ATT Error: Reserved for Future Use range #1 begin. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_END 0x017F /**< ATT Error: Reserved for Future Use range #1 end. */ +#define BLE_GATT_STATUS_ATTERR_APP_BEGIN 0x0180 /**< ATT Error: Application range begin. */ +#define BLE_GATT_STATUS_ATTERR_APP_END 0x019F /**< ATT Error: Application range end. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_BEGIN 0x01A0 /**< ATT Error: Reserved for Future Use range #2 begin. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_END 0x01DF /**< ATT Error: Reserved for Future Use range #2 end. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_BEGIN 0x01E0 /**< ATT Error: Reserved for Future Use range #3 begin. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_END 0x01FC /**< ATT Error: Reserved for Future Use range #3 end. */ +#define BLE_GATT_STATUS_ATTERR_CPS_CCCD_CONFIG_ERROR 0x01FD /**< ATT Common Profile and Service Error: Client Characteristic Configuration Descriptor improperly configured. */ +#define BLE_GATT_STATUS_ATTERR_CPS_PROC_ALR_IN_PROG 0x01FE /**< ATT Common Profile and Service Error: Procedure Already in Progress. */ +#define BLE_GATT_STATUS_ATTERR_CPS_OUT_OF_RANGE 0x01FF /**< ATT Common Profile and Service Error: Out Of Range. */ +/** @} */ + + +/** @defgroup BLE_GATT_CPF_FORMATS Characteristic Presentation Formats + * @note Found at http://developer.bluetooth.org/gatt/descriptors/Pages/DescriptorViewer.aspx?u=org.bluetooth.descriptor.gatt.characteristic_presentation_format.xml + * @{ */ +#define BLE_GATT_CPF_FORMAT_RFU 0x00 /**< Reserved For Future Use. */ +#define BLE_GATT_CPF_FORMAT_BOOLEAN 0x01 /**< Boolean. */ +#define BLE_GATT_CPF_FORMAT_2BIT 0x02 /**< Unsigned 2-bit integer. */ +#define BLE_GATT_CPF_FORMAT_NIBBLE 0x03 /**< Unsigned 4-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT8 0x04 /**< Unsigned 8-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT12 0x05 /**< Unsigned 12-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT16 0x06 /**< Unsigned 16-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT24 0x07 /**< Unsigned 24-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT32 0x08 /**< Unsigned 32-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT48 0x09 /**< Unsigned 48-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT64 0x0A /**< Unsigned 64-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT128 0x0B /**< Unsigned 128-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT8 0x0C /**< Signed 2-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT12 0x0D /**< Signed 12-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT16 0x0E /**< Signed 16-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT24 0x0F /**< Signed 24-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT32 0x10 /**< Signed 32-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT48 0x11 /**< Signed 48-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT64 0x12 /**< Signed 64-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT128 0x13 /**< Signed 128-bit integer. */ +#define BLE_GATT_CPF_FORMAT_FLOAT32 0x14 /**< IEEE-754 32-bit floating point. */ +#define BLE_GATT_CPF_FORMAT_FLOAT64 0x15 /**< IEEE-754 64-bit floating point. */ +#define BLE_GATT_CPF_FORMAT_SFLOAT 0x16 /**< IEEE-11073 16-bit SFLOAT. */ +#define BLE_GATT_CPF_FORMAT_FLOAT 0x17 /**< IEEE-11073 32-bit FLOAT. */ +#define BLE_GATT_CPF_FORMAT_DUINT16 0x18 /**< IEEE-20601 format. */ +#define BLE_GATT_CPF_FORMAT_UTF8S 0x19 /**< UTF-8 string. */ +#define BLE_GATT_CPF_FORMAT_UTF16S 0x1A /**< UTF-16 string. */ +#define BLE_GATT_CPF_FORMAT_STRUCT 0x1B /**< Opaque Structure. */ +/** @} */ + +/** @defgroup BLE_GATT_CPF_NAMESPACES GATT Bluetooth Namespaces + * @{ + */ +#define BLE_GATT_CPF_NAMESPACE_BTSIG 0x01 /**< Bluetooth SIG defined Namespace. */ +#define BLE_GATT_CPF_NAMESPACE_DESCRIPTION_UNKNOWN 0x0000 /**< Namespace Description Unknown. */ +/** @} */ + +/** @} */ + +/** @addtogroup BLE_GATT_STRUCTURES Structures + * @{ */ + +/** + * @brief BLE GATT connection configuration parameters, set with @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_INVALID_PARAM att_mtu is smaller than @ref BLE_GATT_ATT_MTU_DEFAULT. + */ +typedef struct +{ + uint16_t att_mtu; /**< Maximum size of ATT packet the SoftDevice can send or receive. + The default and minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. + @mscs + @mmsc{@ref BLE_GATTC_MTU_EXCHANGE} + @mmsc{@ref BLE_GATTS_MTU_EXCHANGE} + @endmscs + */ +} ble_gatt_conn_cfg_t; + +/**@brief GATT Characteristic Properties. */ +typedef struct +{ + /* Standard properties */ + uint8_t broadcast :1; /**< Broadcasting of the value permitted. */ + uint8_t read :1; /**< Reading the value permitted. */ + uint8_t write_wo_resp :1; /**< Writing the value with Write Command permitted. */ + uint8_t write :1; /**< Writing the value with Write Request permitted. */ + uint8_t notify :1; /**< Notification of the value permitted. */ + uint8_t indicate :1; /**< Indications of the value permitted. */ + uint8_t auth_signed_wr :1; /**< Writing the value with Signed Write Command permitted. */ +} ble_gatt_char_props_t; + +/**@brief GATT Characteristic Extended Properties. */ +typedef struct +{ + /* Extended properties */ + uint8_t reliable_wr :1; /**< Writing the value with Queued Write operations permitted. */ + uint8_t wr_aux :1; /**< Writing the Characteristic User Description descriptor permitted. */ +} ble_gatt_char_ext_props_t; + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // BLE_GATT_H__ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_gattc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_gattc.h new file mode 100644 index 00000000000..7fb3920244d --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_gattc.h @@ -0,0 +1,715 @@ +/* + * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_GATTC Generic Attribute Profile (GATT) Client + @{ + @brief Definitions and prototypes for the GATT Client interface. + */ + +#ifndef BLE_GATTC_H__ +#define BLE_GATTC_H__ + +#include +#include "nrf.h" +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" +#include "ble_gatt.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_GATTC_ENUMERATIONS Enumerations + * @{ */ + +/**@brief GATTC API SVC numbers. */ +enum BLE_GATTC_SVCS +{ + SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER = BLE_GATTC_SVC_BASE, /**< Primary Service Discovery. */ + SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, /**< Relationship Discovery. */ + SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, /**< Characteristic Discovery. */ + SD_BLE_GATTC_DESCRIPTORS_DISCOVER, /**< Characteristic Descriptor Discovery. */ + SD_BLE_GATTC_ATTR_INFO_DISCOVER, /**< Attribute Information Discovery. */ + SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, /**< Read Characteristic Value by UUID. */ + SD_BLE_GATTC_READ, /**< Generic read. */ + SD_BLE_GATTC_CHAR_VALUES_READ, /**< Read multiple Characteristic Values. */ + SD_BLE_GATTC_WRITE, /**< Generic write. */ + SD_BLE_GATTC_HV_CONFIRM, /**< Handle Value Confirmation. */ + SD_BLE_GATTC_EXCHANGE_MTU_REQUEST, /**< Exchange MTU Request. */ +}; + +/** + * @brief GATT Client Event IDs. + */ +enum BLE_GATTC_EVTS +{ + BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP = BLE_GATTC_EVT_BASE, /**< Primary Service Discovery Response event. \n See @ref ble_gattc_evt_prim_srvc_disc_rsp_t. */ + BLE_GATTC_EVT_REL_DISC_RSP, /**< Relationship Discovery Response event. \n See @ref ble_gattc_evt_rel_disc_rsp_t. */ + BLE_GATTC_EVT_CHAR_DISC_RSP, /**< Characteristic Discovery Response event. \n See @ref ble_gattc_evt_char_disc_rsp_t. */ + BLE_GATTC_EVT_DESC_DISC_RSP, /**< Descriptor Discovery Response event. \n See @ref ble_gattc_evt_desc_disc_rsp_t. */ + BLE_GATTC_EVT_ATTR_INFO_DISC_RSP, /**< Attribute Information Response event. \n See @ref ble_gattc_evt_attr_info_disc_rsp_t. */ + BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP, /**< Read By UUID Response event. \n See @ref ble_gattc_evt_char_val_by_uuid_read_rsp_t. */ + BLE_GATTC_EVT_READ_RSP, /**< Read Response event. \n See @ref ble_gattc_evt_read_rsp_t. */ + BLE_GATTC_EVT_CHAR_VALS_READ_RSP, /**< Read multiple Response event. \n See @ref ble_gattc_evt_char_vals_read_rsp_t. */ + BLE_GATTC_EVT_WRITE_RSP, /**< Write Response event. \n See @ref ble_gattc_evt_write_rsp_t. */ + BLE_GATTC_EVT_HVX, /**< Handle Value Notification or Indication event. \n Confirm indication with @ref sd_ble_gattc_hv_confirm. \n See @ref ble_gattc_evt_hvx_t. */ + BLE_GATTC_EVT_EXCHANGE_MTU_RSP, /**< Exchange MTU Response event. \n See @ref ble_gattc_evt_exchange_mtu_rsp_t. */ + BLE_GATTC_EVT_TIMEOUT, /**< Timeout event. \n See @ref ble_gattc_evt_timeout_t. */ + BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE /**< Write without Response transmission complete. \n See @ref ble_gattc_evt_write_cmd_tx_complete_t. */ +}; + +/** @} */ + +/** @addtogroup BLE_GATTC_DEFINES Defines + * @{ */ + +/** @defgroup BLE_ERRORS_GATTC SVC return values specific to GATTC + * @{ */ +#define BLE_ERROR_GATTC_PROC_NOT_PERMITTED (NRF_GATTC_ERR_BASE + 0x000) /**< Procedure not Permitted. */ +/** @} */ + +/** @defgroup BLE_GATTC_ATTR_INFO_FORMAT Attribute Information Formats + * @{ */ +#define BLE_GATTC_ATTR_INFO_FORMAT_16BIT 1 /**< 16-bit Attribute Information Format. */ +#define BLE_GATTC_ATTR_INFO_FORMAT_128BIT 2 /**< 128-bit Attribute Information Format. */ +/** @} */ + +/** @defgroup BLE_GATTC_DEFAULTS GATT Client defaults + * @{ */ +#define BLE_GATTC_WRITE_CMD_TX_QUEUE_SIZE_DEFAULT 1 /**< Default number of Write without Response that can be queued for transmission. */ +/** @} */ + +/** @} */ + +/** @addtogroup BLE_GATTC_STRUCTURES Structures + * @{ */ + +/** + * @brief BLE GATTC connection configuration parameters, set with @ref sd_ble_cfg_set. + */ +typedef struct +{ + uint8_t write_cmd_tx_queue_size; /**< The guaranteed minimum number of Write without Response that can be queued for transmission. + The default value is @ref BLE_GATTC_WRITE_CMD_TX_QUEUE_SIZE_DEFAULT */ +} ble_gattc_conn_cfg_t; + +/**@brief Operation Handle Range. */ +typedef struct +{ + uint16_t start_handle; /**< Start Handle. */ + uint16_t end_handle; /**< End Handle. */ +} ble_gattc_handle_range_t; + + +/**@brief GATT service. */ +typedef struct +{ + ble_uuid_t uuid; /**< Service UUID. */ + ble_gattc_handle_range_t handle_range; /**< Service Handle Range. */ +} ble_gattc_service_t; + + +/**@brief GATT include. */ +typedef struct +{ + uint16_t handle; /**< Include Handle. */ + ble_gattc_service_t included_srvc; /**< Handle of the included service. */ +} ble_gattc_include_t; + + +/**@brief GATT characteristic. */ +typedef struct +{ + ble_uuid_t uuid; /**< Characteristic UUID. */ + ble_gatt_char_props_t char_props; /**< Characteristic Properties. */ + uint8_t char_ext_props : 1; /**< Extended properties present. */ + uint16_t handle_decl; /**< Handle of the Characteristic Declaration. */ + uint16_t handle_value; /**< Handle of the Characteristic Value. */ +} ble_gattc_char_t; + + +/**@brief GATT descriptor. */ +typedef struct +{ + uint16_t handle; /**< Descriptor Handle. */ + ble_uuid_t uuid; /**< Descriptor UUID. */ +} ble_gattc_desc_t; + + +/**@brief Write Parameters. */ +typedef struct +{ + uint8_t write_op; /**< Write Operation to be performed, see @ref BLE_GATT_WRITE_OPS. */ + uint8_t flags; /**< Flags, see @ref BLE_GATT_EXEC_WRITE_FLAGS. */ + uint16_t handle; /**< Handle to the attribute to be written. */ + uint16_t offset; /**< Offset in bytes. @note For WRITE_CMD and WRITE_REQ, offset must be 0. */ + uint16_t len; /**< Length of data in bytes. */ + uint8_t const *p_value; /**< Pointer to the value data. */ +} ble_gattc_write_params_t; + +/**@brief Attribute Information for 16-bit Attribute UUID. */ +typedef struct +{ + uint16_t handle; /**< Attribute handle. */ + ble_uuid_t uuid; /**< 16-bit Attribute UUID. */ +} ble_gattc_attr_info16_t; + +/**@brief Attribute Information for 128-bit Attribute UUID. */ +typedef struct +{ + uint16_t handle; /**< Attribute handle. */ + ble_uuid128_t uuid; /**< 128-bit Attribute UUID. */ +} ble_gattc_attr_info128_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Service count. */ + ble_gattc_service_t services[1]; /**< Service data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_prim_srvc_disc_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_REL_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Include count. */ + ble_gattc_include_t includes[1]; /**< Include data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_rel_disc_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Characteristic count. */ + ble_gattc_char_t chars[1]; /**< Characteristic data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_char_disc_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_DESC_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Descriptor count. */ + ble_gattc_desc_t descs[1]; /**< Descriptor data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_desc_disc_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_ATTR_INFO_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Attribute count. */ + uint8_t format; /**< Attribute information format, see @ref BLE_GATTC_ATTR_INFO_FORMAT. */ + union { + ble_gattc_attr_info16_t attr_info16[1]; /**< Attribute information for 16-bit Attribute UUID. + @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ + ble_gattc_attr_info128_t attr_info128[1]; /**< Attribute information for 128-bit Attribute UUID. + @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ + } info; /**< Attribute information union. */ +} ble_gattc_evt_attr_info_disc_rsp_t; + +/**@brief GATT read by UUID handle value pair. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + uint8_t *p_value; /**< Pointer to the Attribute Value, length is available in @ref ble_gattc_evt_char_val_by_uuid_read_rsp_t::value_len. */ +} ble_gattc_handle_value_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP. */ +typedef struct +{ + uint16_t count; /**< Handle-Value Pair Count. */ + uint16_t value_len; /**< Length of the value in Handle-Value(s) list. */ + uint8_t handle_value[1]; /**< Handle-Value(s) list. To iterate through the list use @ref sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter. + @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_char_val_by_uuid_read_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_READ_RSP. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + uint16_t offset; /**< Offset of the attribute data. */ + uint16_t len; /**< Attribute data length. */ + uint8_t data[1]; /**< Attribute data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_read_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_VALS_READ_RSP. */ +typedef struct +{ + uint16_t len; /**< Concatenated Attribute values length. */ + uint8_t values[1]; /**< Attribute values. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_char_vals_read_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_WRITE_RSP. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + uint8_t write_op; /**< Type of write operation, see @ref BLE_GATT_WRITE_OPS. */ + uint16_t offset; /**< Data offset. */ + uint16_t len; /**< Data length. */ + uint8_t data[1]; /**< Data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_write_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_HVX. */ +typedef struct +{ + uint16_t handle; /**< Handle to which the HVx operation applies. */ + uint8_t type; /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */ + uint16_t len; /**< Attribute data length. */ + uint8_t data[1]; /**< Attribute data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_hvx_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP. */ +typedef struct +{ + uint16_t server_rx_mtu; /**< Server RX MTU size. */ +} ble_gattc_evt_exchange_mtu_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_TIMEOUT. */ +typedef struct +{ + uint8_t src; /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */ +} ble_gattc_evt_timeout_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE. */ +typedef struct +{ + uint8_t count; /**< Number of write without response transmissions completed. */ +} ble_gattc_evt_write_cmd_tx_complete_t; + +/**@brief GATTC event structure. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which event occurred. */ + uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ + uint16_t error_handle; /**< In case of error: The handle causing the error. In all other cases @ref BLE_GATT_HANDLE_INVALID. */ + union + { + ble_gattc_evt_prim_srvc_disc_rsp_t prim_srvc_disc_rsp; /**< Primary Service Discovery Response Event Parameters. */ + ble_gattc_evt_rel_disc_rsp_t rel_disc_rsp; /**< Relationship Discovery Response Event Parameters. */ + ble_gattc_evt_char_disc_rsp_t char_disc_rsp; /**< Characteristic Discovery Response Event Parameters. */ + ble_gattc_evt_desc_disc_rsp_t desc_disc_rsp; /**< Descriptor Discovery Response Event Parameters. */ + ble_gattc_evt_char_val_by_uuid_read_rsp_t char_val_by_uuid_read_rsp; /**< Characteristic Value Read by UUID Response Event Parameters. */ + ble_gattc_evt_read_rsp_t read_rsp; /**< Read Response Event Parameters. */ + ble_gattc_evt_char_vals_read_rsp_t char_vals_read_rsp; /**< Characteristic Values Read Response Event Parameters. */ + ble_gattc_evt_write_rsp_t write_rsp; /**< Write Response Event Parameters. */ + ble_gattc_evt_hvx_t hvx; /**< Handle Value Notification/Indication Event Parameters. */ + ble_gattc_evt_exchange_mtu_rsp_t exchange_mtu_rsp; /**< Exchange MTU Response Event Parameters. */ + ble_gattc_evt_timeout_t timeout; /**< Timeout Event Parameters. */ + ble_gattc_evt_attr_info_disc_rsp_t attr_info_disc_rsp; /**< Attribute Information Discovery Event Parameters. */ + ble_gattc_evt_write_cmd_tx_complete_t write_cmd_tx_complete; /**< Write without Response transmission complete Event Parameters. */ + } params; /**< Event Parameters. @note Only valid if @ref gatt_status == @ref BLE_GATT_STATUS_SUCCESS. */ +} ble_gattc_evt_t; +/** @} */ + +/** @addtogroup BLE_GATTC_FUNCTIONS Functions + * @{ */ + +/**@brief Initiate or continue a GATT Primary Service Discovery procedure. + * + * @details This function initiates or resumes a Primary Service discovery procedure, starting from the supplied handle. + * If the last service has not been reached, this function must be called again with an updated start handle value to continue the search. + * + * @note If any of the discovered services have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with + * type @ref BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event. + * + * @events + * @event{@ref BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_PRIM_SRVC_DISC_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] start_handle Handle to start searching from. + * @param[in] p_srvc_uuid Pointer to the service UUID to be found. If it is NULL, all primary services will be returned. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Primary Service Discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER, uint32_t, sd_ble_gattc_primary_services_discover(uint16_t conn_handle, uint16_t start_handle, ble_uuid_t const *p_srvc_uuid)); + + +/**@brief Initiate or continue a GATT Relationship Discovery procedure. + * + * @details This function initiates or resumes the Find Included Services sub-procedure. If the last included service has not been reached, + * this must be called again with an updated handle range to continue the search. + * + * @events + * @event{@ref BLE_GATTC_EVT_REL_DISC_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_REL_DISC_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Relationship Discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, uint32_t, sd_ble_gattc_relationships_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); + + +/**@brief Initiate or continue a GATT Characteristic Discovery procedure. + * + * @details This function initiates or resumes a Characteristic discovery procedure. If the last Characteristic has not been reached, + * this must be called again with an updated handle range to continue the discovery. + * + * @note If any of the discovered characteristics have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with + * type @ref BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event. + * + * @events + * @event{@ref BLE_GATTC_EVT_CHAR_DISC_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_CHAR_DISC_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Characteristic Discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, uint32_t, sd_ble_gattc_characteristics_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); + + +/**@brief Initiate or continue a GATT Characteristic Descriptor Discovery procedure. + * + * @details This function initiates or resumes a Characteristic Descriptor discovery procedure. If the last Descriptor has not been reached, + * this must be called again with an updated handle range to continue the discovery. + * + * @events + * @event{@ref BLE_GATTC_EVT_DESC_DISC_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_DESC_DISC_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handle_range A pointer to the range of handles of the Characteristic to perform this procedure on. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Descriptor Discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_DESCRIPTORS_DISCOVER, uint32_t, sd_ble_gattc_descriptors_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); + + +/**@brief Initiate or continue a GATT Read using Characteristic UUID procedure. + * + * @details This function initiates or resumes a Read using Characteristic UUID procedure. If the last Characteristic has not been reached, + * this must be called again with an updated handle range to continue the discovery. + * + * @events + * @event{@ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_READ_UUID_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_uuid Pointer to a Characteristic value UUID to read. + * @param[in] p_handle_range A pointer to the range of handles to perform this procedure on. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Read using Characteristic UUID procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, uint32_t, sd_ble_gattc_char_value_by_uuid_read(uint16_t conn_handle, ble_uuid_t const *p_uuid, ble_gattc_handle_range_t const *p_handle_range)); + + +/**@brief Initiate or continue a GATT Read (Long) Characteristic or Descriptor procedure. + * + * @details This function initiates or resumes a GATT Read (Long) Characteristic or Descriptor procedure. If the Characteristic or Descriptor + * to be read is longer than ATT_MTU - 1, this function must be called multiple times with appropriate offset to read the + * complete value. + * + * @events + * @event{@ref BLE_GATTC_EVT_READ_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_VALUE_READ_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] handle The handle of the attribute to be read. + * @param[in] offset Offset into the attribute value to be read. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Read (Long) procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_READ, uint32_t, sd_ble_gattc_read(uint16_t conn_handle, uint16_t handle, uint16_t offset)); + + +/**@brief Initiate a GATT Read Multiple Characteristic Values procedure. + * + * @details This function initiates a GATT Read Multiple Characteristic Values procedure. + * + * @events + * @event{@ref BLE_GATTC_EVT_CHAR_VALS_READ_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_READ_MULT_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handles A pointer to the handle(s) of the attribute(s) to be read. + * @param[in] handle_count The number of handles in p_handles. + * + * @retval ::NRF_SUCCESS Successfully started the Read Multiple Characteristic Values procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_CHAR_VALUES_READ, uint32_t, sd_ble_gattc_char_values_read(uint16_t conn_handle, uint16_t const *p_handles, uint16_t handle_count)); + + +/**@brief Perform a Write (Characteristic Value or Descriptor, with or without response, signed or not, long or reliable) procedure. + * + * @details This function can perform all write procedures described in GATT. + * + * @note Only one write with response procedure can be ongoing per connection at a time. + * If the application tries to write with response while another write with response procedure is ongoing, + * the function call will return @ref NRF_ERROR_BUSY. + * A @ref BLE_GATTC_EVT_WRITE_RSP event will be issued as soon as the write response arrives from the peer. + * + * @note The number of Write without Response that can be queued is configured by @ref ble_gattc_conn_cfg_t::write_cmd_tx_queue_size + * When the queue is full, the function call will return @ref NRF_ERROR_RESOURCES. + * A @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event will be issued as soon as the transmission of the write without response is complete. + * + * @note The application can keep track of the available queue element count for writes without responses by following the procedure below: + * - Store initial queue element count in a variable. + * - Decrement the variable, which stores the currently available queue element count, by one when a call to this function returns @ref NRF_SUCCESS. + * - Increment the variable, which stores the current available queue element count, by the count variable in @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event. + * + * @events + * @event{@ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE, Write without response transmission complete.} + * @event{@ref BLE_GATTC_EVT_WRITE_RSP, Write response received from the peer.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_VALUE_WRITE_WITHOUT_RESP_MSC} + * @mmsc{@ref BLE_GATTC_VALUE_WRITE_MSC} + * @mmsc{@ref BLE_GATTC_VALUE_LONG_WRITE_MSC} + * @mmsc{@ref BLE_GATTC_VALUE_RELIABLE_WRITE_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_write_params A pointer to a write parameters structure. + * + * @retval ::NRF_SUCCESS Successfully started the Write procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. + * @retval ::NRF_ERROR_BUSY For write with response, procedure already in progress. Wait for a @ref BLE_GATTC_EVT_WRITE_RSP event and retry. + * @retval ::NRF_ERROR_RESOURCES Too many writes without responses queued. + * Wait for a @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event and retry. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_WRITE, uint32_t, sd_ble_gattc_write(uint16_t conn_handle, ble_gattc_write_params_t const *p_write_params)); + + +/**@brief Send a Handle Value Confirmation to the GATT Server. + * + * @mscs + * @mmsc{@ref BLE_GATTC_HVI_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] handle The handle of the attribute in the indication. + * + * @retval ::NRF_SUCCESS Successfully queued the Handle Value Confirmation for transmission. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no Indication pending to be confirmed. + * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_HV_CONFIRM, uint32_t, sd_ble_gattc_hv_confirm(uint16_t conn_handle, uint16_t handle)); + +/**@brief Discovers information about a range of attributes on a GATT server. + * + * @events + * @event{@ref BLE_GATTC_EVT_ATTR_INFO_DISC_RSP, Generated when information about a range of attributes has been received.} + * @endevents + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handle_range The range of handles to request information about. + * + * @retval ::NRF_SUCCESS Successfully started an attribute information discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid connection state + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_ATTR_INFO_DISCOVER, uint32_t, sd_ble_gattc_attr_info_discover(uint16_t conn_handle, ble_gattc_handle_range_t const * p_handle_range)); + +/**@brief Start an ATT_MTU exchange by sending an Exchange MTU Request to the server. + * + * @details The SoftDevice sets ATT_MTU to the minimum of: + * - The Client RX MTU value, and + * - The Server RX MTU value from @ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP. + * + * However, the SoftDevice never sets ATT_MTU lower than @ref BLE_GATT_ATT_MTU_DEFAULT. + * + * @events + * @event{@ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_MTU_EXCHANGE} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] client_rx_mtu Client RX MTU size. + * - The minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. + * - The maximum value is @ref ble_gatt_conn_cfg_t::att_mtu in the connection configuration + used for this connection. + * - The value must be equal to Server RX MTU size given in @ref sd_ble_gatts_exchange_mtu_reply + * if an ATT_MTU exchange has already been performed in the other direction. + * + * @retval ::NRF_SUCCESS Successfully sent request to the server. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid connection state or an ATT_MTU exchange was already requested once. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid Client RX MTU size supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_EXCHANGE_MTU_REQUEST, uint32_t, sd_ble_gattc_exchange_mtu_request(uint16_t conn_handle, uint16_t client_rx_mtu)); + +/**@brief Iterate through Handle-Value(s) list in @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP event. + * + * @param[in] p_gattc_evt Pointer to event buffer containing @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP event. + * @note If the buffer contains different event, behavior is undefined. + * @param[in,out] p_iter Iterator, points to @ref ble_gattc_handle_value_t structure that will be filled in with + * the next Handle-Value pair in each iteration. If the function returns other than + * @ref NRF_SUCCESS, it will not be changed. + * - To start iteration, initialize the structure to zero. + * - To continue, pass the value from previous iteration. + * + * \code + * ble_gattc_handle_value_t iter; + * memset(&iter, 0, sizeof(ble_gattc_handle_value_t)); + * while (sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(&ble_evt.evt.gattc_evt, &iter) == NRF_SUCCESS) + * { + * app_handle = iter.handle; + * memcpy(app_value, iter.p_value, ble_evt.evt.gattc_evt.params.char_val_by_uuid_read_rsp.value_len); + * } + * \endcode + * + * @retval ::NRF_SUCCESS Successfully retrieved the next Handle-Value pair. + * @retval ::NRF_ERROR_NOT_FOUND No more Handle-Value pairs available in the list. + */ +__STATIC_INLINE uint32_t sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(ble_gattc_evt_t *p_gattc_evt, ble_gattc_handle_value_t *p_iter); + +/** @} */ + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE uint32_t sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(ble_gattc_evt_t *p_gattc_evt, ble_gattc_handle_value_t *p_iter) +{ + uint32_t value_len = p_gattc_evt->params.char_val_by_uuid_read_rsp.value_len; + uint8_t *p_first = p_gattc_evt->params.char_val_by_uuid_read_rsp.handle_value; + uint8_t *p_next = p_iter->p_value ? p_iter->p_value + value_len : p_first; + + if ((p_next - p_first) / (sizeof(uint16_t) + value_len) < p_gattc_evt->params.char_val_by_uuid_read_rsp.count) + { + p_iter->handle = (uint16_t)p_next[1] << 8 | p_next[0]; + p_iter->p_value = p_next + sizeof(uint16_t); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_NOT_FOUND; + } +} + +#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ + +#ifdef __cplusplus +} +#endif +#endif /* BLE_GATTC_H__ */ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_gatts.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_gatts.h new file mode 100644 index 00000000000..e437b6e0767 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_gatts.h @@ -0,0 +1,845 @@ +/* + * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_GATTS Generic Attribute Profile (GATT) Server + @{ + @brief Definitions and prototypes for the GATTS interface. + */ + +#ifndef BLE_GATTS_H__ +#define BLE_GATTS_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_hci.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" +#include "ble_gatt.h" +#include "ble_gap.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_GATTS_ENUMERATIONS Enumerations + * @{ */ + +/** + * @brief GATTS API SVC numbers. + */ +enum BLE_GATTS_SVCS +{ + SD_BLE_GATTS_SERVICE_ADD = BLE_GATTS_SVC_BASE, /**< Add a service. */ + SD_BLE_GATTS_INCLUDE_ADD, /**< Add an included service. */ + SD_BLE_GATTS_CHARACTERISTIC_ADD, /**< Add a characteristic. */ + SD_BLE_GATTS_DESCRIPTOR_ADD, /**< Add a generic attribute. */ + SD_BLE_GATTS_VALUE_SET, /**< Set an attribute value. */ + SD_BLE_GATTS_VALUE_GET, /**< Get an attribute value. */ + SD_BLE_GATTS_HVX, /**< Handle Value Notification or Indication. */ + SD_BLE_GATTS_SERVICE_CHANGED, /**< Perform a Service Changed Indication to one or more peers. */ + SD_BLE_GATTS_RW_AUTHORIZE_REPLY, /**< Reply to an authorization request for a read or write operation on one or more attributes. */ + SD_BLE_GATTS_SYS_ATTR_SET, /**< Set the persistent system attributes for a connection. */ + SD_BLE_GATTS_SYS_ATTR_GET, /**< Retrieve the persistent system attributes. */ + SD_BLE_GATTS_INITIAL_USER_HANDLE_GET, /**< Retrieve the first valid user handle. */ + SD_BLE_GATTS_ATTR_GET, /**< Retrieve the UUID and/or metadata of an attribute. */ + SD_BLE_GATTS_EXCHANGE_MTU_REPLY /**< Reply to Exchange MTU Request. */ +}; + +/** + * @brief GATT Server Event IDs. + */ +enum BLE_GATTS_EVTS +{ + BLE_GATTS_EVT_WRITE = BLE_GATTS_EVT_BASE, /**< Write operation performed. \n See @ref ble_gatts_evt_write_t. */ + BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST, /**< Read/Write Authorization request. \n Reply with @ref sd_ble_gatts_rw_authorize_reply. \n See @ref ble_gatts_evt_rw_authorize_request_t. */ + BLE_GATTS_EVT_SYS_ATTR_MISSING, /**< A persistent system attribute access is pending. \n Respond with @ref sd_ble_gatts_sys_attr_set. \n See @ref ble_gatts_evt_sys_attr_missing_t. */ + BLE_GATTS_EVT_HVC, /**< Handle Value Confirmation. \n See @ref ble_gatts_evt_hvc_t. */ + BLE_GATTS_EVT_SC_CONFIRM, /**< Service Changed Confirmation. \n No additional event structure applies. */ + BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST, /**< Exchange MTU Request. \n Reply with @ref sd_ble_gatts_exchange_mtu_reply. \n See @ref ble_gatts_evt_exchange_mtu_request_t. */ + BLE_GATTS_EVT_TIMEOUT, /**< Peer failed to respond to an ATT request in time. \n See @ref ble_gatts_evt_timeout_t. */ + BLE_GATTS_EVT_HVN_TX_COMPLETE /**< Handle Value Notification transmission complete. \n See @ref ble_gatts_evt_hvn_tx_complete_t. */ +}; + +/**@brief GATTS Configuration IDs. + * + * IDs that uniquely identify a GATTS configuration. + */ +enum BLE_GATTS_CFGS +{ + BLE_GATTS_CFG_SERVICE_CHANGED = BLE_GATTS_CFG_BASE, /**< Service changed configuration. */ + BLE_GATTS_CFG_ATTR_TAB_SIZE, /**< Attribute table size configuration. */ +}; + +/** @} */ + +/** @addtogroup BLE_GATTS_DEFINES Defines + * @{ */ + +/** @defgroup BLE_ERRORS_GATTS SVC return values specific to GATTS + * @{ */ +#define BLE_ERROR_GATTS_INVALID_ATTR_TYPE (NRF_GATTS_ERR_BASE + 0x000) /**< Invalid attribute type. */ +#define BLE_ERROR_GATTS_SYS_ATTR_MISSING (NRF_GATTS_ERR_BASE + 0x001) /**< System Attributes missing. */ +/** @} */ + +/** @defgroup BLE_GATTS_ATTR_LENS_MAX Maximum attribute lengths + * @{ */ +#define BLE_GATTS_FIX_ATTR_LEN_MAX (510) /**< Maximum length for fixed length Attribute Values. */ +#define BLE_GATTS_VAR_ATTR_LEN_MAX (512) /**< Maximum length for variable length Attribute Values. */ +/** @} */ + +/** @defgroup BLE_GATTS_SRVC_TYPES GATT Server Service Types + * @{ */ +#define BLE_GATTS_SRVC_TYPE_INVALID 0x00 /**< Invalid Service Type. */ +#define BLE_GATTS_SRVC_TYPE_PRIMARY 0x01 /**< Primary Service. */ +#define BLE_GATTS_SRVC_TYPE_SECONDARY 0x02 /**< Secondary Type. */ +/** @} */ + + +/** @defgroup BLE_GATTS_ATTR_TYPES GATT Server Attribute Types + * @{ */ +#define BLE_GATTS_ATTR_TYPE_INVALID 0x00 /**< Invalid Attribute Type. */ +#define BLE_GATTS_ATTR_TYPE_PRIM_SRVC_DECL 0x01 /**< Primary Service Declaration. */ +#define BLE_GATTS_ATTR_TYPE_SEC_SRVC_DECL 0x02 /**< Secondary Service Declaration. */ +#define BLE_GATTS_ATTR_TYPE_INC_DECL 0x03 /**< Include Declaration. */ +#define BLE_GATTS_ATTR_TYPE_CHAR_DECL 0x04 /**< Characteristic Declaration. */ +#define BLE_GATTS_ATTR_TYPE_CHAR_VAL 0x05 /**< Characteristic Value. */ +#define BLE_GATTS_ATTR_TYPE_DESC 0x06 /**< Descriptor. */ +#define BLE_GATTS_ATTR_TYPE_OTHER 0x07 /**< Other, non-GATT specific type. */ +/** @} */ + + +/** @defgroup BLE_GATTS_OPS GATT Server Operations + * @{ */ +#define BLE_GATTS_OP_INVALID 0x00 /**< Invalid Operation. */ +#define BLE_GATTS_OP_WRITE_REQ 0x01 /**< Write Request. */ +#define BLE_GATTS_OP_WRITE_CMD 0x02 /**< Write Command. */ +#define BLE_GATTS_OP_SIGN_WRITE_CMD 0x03 /**< Signed Write Command. */ +#define BLE_GATTS_OP_PREP_WRITE_REQ 0x04 /**< Prepare Write Request. */ +#define BLE_GATTS_OP_EXEC_WRITE_REQ_CANCEL 0x05 /**< Execute Write Request: Cancel all prepared writes. */ +#define BLE_GATTS_OP_EXEC_WRITE_REQ_NOW 0x06 /**< Execute Write Request: Immediately execute all prepared writes. */ +/** @} */ + +/** @defgroup BLE_GATTS_VLOCS GATT Value Locations + * @{ */ +#define BLE_GATTS_VLOC_INVALID 0x00 /**< Invalid Location. */ +#define BLE_GATTS_VLOC_STACK 0x01 /**< Attribute Value is located in stack memory, no user memory is required. */ +#define BLE_GATTS_VLOC_USER 0x02 /**< Attribute Value is located in user memory. This requires the user to maintain a valid buffer through the lifetime of the attribute, since the stack + will read and write directly to the memory using the pointer provided in the APIs. There are no alignment requirements for the buffer. */ +/** @} */ + +/** @defgroup BLE_GATTS_AUTHORIZE_TYPES GATT Server Authorization Types + * @{ */ +#define BLE_GATTS_AUTHORIZE_TYPE_INVALID 0x00 /**< Invalid Type. */ +#define BLE_GATTS_AUTHORIZE_TYPE_READ 0x01 /**< Authorize a Read Operation. */ +#define BLE_GATTS_AUTHORIZE_TYPE_WRITE 0x02 /**< Authorize a Write Request Operation. */ +/** @} */ + +/** @defgroup BLE_GATTS_SYS_ATTR_FLAGS System Attribute Flags + * @{ */ +#define BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS (1 << 0) /**< Restrict system attributes to system services only. */ +#define BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS (1 << 1) /**< Restrict system attributes to user services only. */ +/** @} */ + +/** @defgroup BLE_GATTS_SERVICE_CHANGED Service Changed Inclusion Values + * @{ + */ +#define BLE_GATTS_SERVICE_CHANGED_DEFAULT (1) /**< Default is to include the Service Changed characteristic in the Attribute Table. */ +/** @} */ + +/** @defgroup BLE_GATTS_ATTR_TAB_SIZE Attribute Table size + * @{ + */ +#define BLE_GATTS_ATTR_TAB_SIZE_MIN (248) /**< Minimum Attribute Table size */ +#define BLE_GATTS_ATTR_TAB_SIZE_DEFAULT (1408) /**< Default Attribute Table size. */ +/** @} */ + +/** @defgroup BLE_GATTS_DEFAULTS GATT Server defaults + * @{ + */ +#define BLE_GATTS_HVN_TX_QUEUE_SIZE_DEFAULT 1 /**< Default number of Handle Value Notifications that can be queued for transmission. */ +/** @} */ + +/** @} */ + +/** @addtogroup BLE_GATTS_STRUCTURES Structures + * @{ */ + +/** + * @brief BLE GATTS connection configuration parameters, set with @ref sd_ble_cfg_set. + */ +typedef struct +{ + uint8_t hvn_tx_queue_size; /**< Minimum guaranteed number of Handle Value Notifications that can be queued for transmission. + The default value is @ref BLE_GATTS_HVN_TX_QUEUE_SIZE_DEFAULT */ +} ble_gatts_conn_cfg_t; + +/**@brief Attribute metadata. */ +typedef struct +{ + ble_gap_conn_sec_mode_t read_perm; /**< Read permissions. */ + ble_gap_conn_sec_mode_t write_perm; /**< Write permissions. */ + uint8_t vlen :1; /**< Variable length attribute. */ + uint8_t vloc :2; /**< Value location, see @ref BLE_GATTS_VLOCS.*/ + uint8_t rd_auth :1; /**< Read authorization and value will be requested from the application on every read operation. */ + uint8_t wr_auth :1; /**< Write authorization will be requested from the application on every Write Request operation (but not Write Command). */ +} ble_gatts_attr_md_t; + + +/**@brief GATT Attribute. */ +typedef struct +{ + ble_uuid_t const *p_uuid; /**< Pointer to the attribute UUID. */ + ble_gatts_attr_md_t const *p_attr_md; /**< Pointer to the attribute metadata structure. */ + uint16_t init_len; /**< Initial attribute value length in bytes. */ + uint16_t init_offs; /**< Initial attribute value offset in bytes. If different from zero, the first init_offs bytes of the attribute value will be left uninitialized. */ + uint16_t max_len; /**< Maximum attribute value length in bytes, see @ref BLE_GATTS_ATTR_LENS_MAX for maximum values. */ + uint8_t *p_value; /**< Pointer to the attribute data. Please note that if the @ref BLE_GATTS_VLOC_USER value location is selected in the attribute metadata, this will have to point to a buffer + that remains valid through the lifetime of the attribute. This excludes usage of automatic variables that may go out of scope or any other temporary location. + The stack may access that memory directly without the application's knowledge. For writable characteristics, this value must not be a location in flash memory.*/ +} ble_gatts_attr_t; + +/**@brief GATT Attribute Value. */ +typedef struct +{ + uint16_t len; /**< Length in bytes to be written or read. Length in bytes written or read after successful return.*/ + uint16_t offset; /**< Attribute value offset. */ + uint8_t *p_value; /**< Pointer to where value is stored or will be stored. + If value is stored in user memory, only the attribute length is updated when p_value == NULL. + Set to NULL when reading to obtain the complete length of the attribute value */ +} ble_gatts_value_t; + + +/**@brief GATT Characteristic Presentation Format. */ +typedef struct +{ + uint8_t format; /**< Format of the value, see @ref BLE_GATT_CPF_FORMATS. */ + int8_t exponent; /**< Exponent for integer data types. */ + uint16_t unit; /**< Unit from Bluetooth Assigned Numbers. */ + uint8_t name_space; /**< Namespace from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */ + uint16_t desc; /**< Namespace description from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */ +} ble_gatts_char_pf_t; + + +/**@brief GATT Characteristic metadata. */ +typedef struct +{ + ble_gatt_char_props_t char_props; /**< Characteristic Properties. */ + ble_gatt_char_ext_props_t char_ext_props; /**< Characteristic Extended Properties. */ + uint8_t const *p_char_user_desc; /**< Pointer to a UTF-8 encoded string (non-NULL terminated), NULL if the descriptor is not required. */ + uint16_t char_user_desc_max_size; /**< The maximum size in bytes of the user description descriptor. */ + uint16_t char_user_desc_size; /**< The size of the user description, must be smaller or equal to char_user_desc_max_size. */ + ble_gatts_char_pf_t const *p_char_pf; /**< Pointer to a presentation format structure or NULL if the CPF descriptor is not required. */ + ble_gatts_attr_md_t const *p_user_desc_md; /**< Attribute metadata for the User Description descriptor, or NULL for default values. */ + ble_gatts_attr_md_t const *p_cccd_md; /**< Attribute metadata for the Client Characteristic Configuration Descriptor, or NULL for default values. */ + ble_gatts_attr_md_t const *p_sccd_md; /**< Attribute metadata for the Server Characteristic Configuration Descriptor, or NULL for default values. */ +} ble_gatts_char_md_t; + + +/**@brief GATT Characteristic Definition Handles. */ +typedef struct +{ + uint16_t value_handle; /**< Handle to the characteristic value. */ + uint16_t user_desc_handle; /**< Handle to the User Description descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ + uint16_t cccd_handle; /**< Handle to the Client Characteristic Configuration Descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ + uint16_t sccd_handle; /**< Handle to the Server Characteristic Configuration Descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ +} ble_gatts_char_handles_t; + + +/**@brief GATT HVx parameters. */ +typedef struct +{ + uint16_t handle; /**< Characteristic Value Handle. */ + uint8_t type; /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */ + uint16_t offset; /**< Offset within the attribute value. */ + uint16_t *p_len; /**< Length in bytes to be written, length in bytes written after return. */ + uint8_t const *p_data; /**< Actual data content, use NULL to use the current attribute value. */ +} ble_gatts_hvx_params_t; + +/**@brief GATT Authorization parameters. */ +typedef struct +{ + uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ + uint8_t update : 1; /**< If set, data supplied in p_data will be used to update the attribute value. + Please note that for @ref BLE_GATTS_AUTHORIZE_TYPE_WRITE operations this bit must always be set, + as the data to be written needs to be stored and later provided by the application. */ + uint16_t offset; /**< Offset of the attribute value being updated. */ + uint16_t len; /**< Length in bytes of the value in p_data pointer, see @ref BLE_GATTS_ATTR_LENS_MAX. */ + uint8_t const *p_data; /**< Pointer to new value used to update the attribute value. */ +} ble_gatts_authorize_params_t; + +/**@brief GATT Read or Write Authorize Reply parameters. */ +typedef struct +{ + uint8_t type; /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */ + union { + ble_gatts_authorize_params_t read; /**< Read authorization parameters. */ + ble_gatts_authorize_params_t write; /**< Write authorization parameters. */ + } params; /**< Reply Parameters. */ +} ble_gatts_rw_authorize_reply_params_t; + +/**@brief Service Changed Inclusion configuration parameters, set with @ref sd_ble_cfg_set. */ +typedef struct +{ + uint8_t service_changed : 1; /**< If 1, include the Service Changed characteristic in the Attribute Table. Default is @ref BLE_GATTS_SERVICE_CHANGED_DEFAULT. */ +} ble_gatts_cfg_service_changed_t; + +/**@brief Attribute table size configuration parameters, set with @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_INVALID_LENGTH One or more of the following is true: + * - The specified Attribute Table size is too small. + * The minimum acceptable size is defined by @ref BLE_GATTS_ATTR_TAB_SIZE_MIN. + * - The specified Attribute Table size is not a multiple of 4. + */ +typedef struct +{ + uint32_t attr_tab_size; /**< Attribute table size. Default is @ref BLE_GATTS_ATTR_TAB_SIZE_DEFAULT, minimum is @ref BLE_GATTS_ATTR_TAB_SIZE_MIN. */ +} ble_gatts_cfg_attr_tab_size_t; + +/**@brief Config structure for GATTS configurations. */ +typedef union +{ + ble_gatts_cfg_service_changed_t service_changed; /**< Include service changed characteristic, cfg_id is @ref BLE_GATTS_CFG_SERVICE_CHANGED. */ + ble_gatts_cfg_attr_tab_size_t attr_tab_size; /**< Attribute table size, cfg_id is @ref BLE_GATTS_CFG_ATTR_TAB_SIZE. */ +} ble_gatts_cfg_t; + + +/**@brief Event structure for @ref BLE_GATTS_EVT_WRITE. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + ble_uuid_t uuid; /**< Attribute UUID. */ + uint8_t op; /**< Type of write operation, see @ref BLE_GATTS_OPS. */ + uint8_t auth_required; /**< Writing operation deferred due to authorization requirement. Application may use @ref sd_ble_gatts_value_set to finalize the writing operation. */ + uint16_t offset; /**< Offset for the write operation. */ + uint16_t len; /**< Length of the received data. */ + uint8_t data[1]; /**< Received data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gatts_evt_write_t; + +/**@brief Event substructure for authorized read requests, see @ref ble_gatts_evt_rw_authorize_request_t. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + ble_uuid_t uuid; /**< Attribute UUID. */ + uint16_t offset; /**< Offset for the read operation. */ +} ble_gatts_evt_read_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST. */ +typedef struct +{ + uint8_t type; /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */ + union { + ble_gatts_evt_read_t read; /**< Attribute Read Parameters. */ + ble_gatts_evt_write_t write; /**< Attribute Write Parameters. */ + } request; /**< Request Parameters. */ +} ble_gatts_evt_rw_authorize_request_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_SYS_ATTR_MISSING. */ +typedef struct +{ + uint8_t hint; /**< Hint (currently unused). */ +} ble_gatts_evt_sys_attr_missing_t; + + +/**@brief Event structure for @ref BLE_GATTS_EVT_HVC. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ +} ble_gatts_evt_hvc_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST. */ +typedef struct +{ + uint16_t client_rx_mtu; /**< Client RX MTU size. */ +} ble_gatts_evt_exchange_mtu_request_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_TIMEOUT. */ +typedef struct +{ + uint8_t src; /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */ +} ble_gatts_evt_timeout_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_HVN_TX_COMPLETE. */ +typedef struct +{ + uint8_t count; /**< Number of notification transmissions completed. */ +} ble_gatts_evt_hvn_tx_complete_t; + +/**@brief GATTS event structure. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which the event occurred. */ + union + { + ble_gatts_evt_write_t write; /**< Write Event Parameters. */ + ble_gatts_evt_rw_authorize_request_t authorize_request; /**< Read or Write Authorize Request Parameters. */ + ble_gatts_evt_sys_attr_missing_t sys_attr_missing; /**< System attributes missing. */ + ble_gatts_evt_hvc_t hvc; /**< Handle Value Confirmation Event Parameters. */ + ble_gatts_evt_exchange_mtu_request_t exchange_mtu_request; /**< Exchange MTU Request Event Parameters. */ + ble_gatts_evt_timeout_t timeout; /**< Timeout Event. */ + ble_gatts_evt_hvn_tx_complete_t hvn_tx_complete; /**< Handle Value Notification transmission complete Event Parameters. */ + } params; /**< Event Parameters. */ +} ble_gatts_evt_t; + +/** @} */ + +/** @addtogroup BLE_GATTS_FUNCTIONS Functions + * @{ */ + +/**@brief Add a service declaration to the Attribute Table. + * + * @note Secondary Services are only relevant in the context of the entity that references them, it is therefore forbidden to + * add a secondary service declaration that is not referenced by another service later in the Attribute Table. + * + * @mscs + * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} + * @endmscs + * + * @param[in] type Toggles between primary and secondary services, see @ref BLE_GATTS_SRVC_TYPES. + * @param[in] p_uuid Pointer to service UUID. + * @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored. + * + * @retval ::NRF_SUCCESS Successfully added a service declaration. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, Vendor Specific UUIDs need to be present in the table. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + */ +SVCALL(SD_BLE_GATTS_SERVICE_ADD, uint32_t, sd_ble_gatts_service_add(uint8_t type, ble_uuid_t const *p_uuid, uint16_t *p_handle)); + + +/**@brief Add an include declaration to the Attribute Table. + * + * @note It is currently only possible to add an include declaration to the last added service (i.e. only sequential population is supported at this time). + * + * @note The included service must already be present in the Attribute Table prior to this call. + * + * @mscs + * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} + * @endmscs + * + * @param[in] service_handle Handle of the service where the included service is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. + * @param[in] inc_srvc_handle Handle of the included service. + * @param[out] p_include_handle Pointer to a 16-bit word where the assigned handle will be stored. + * + * @retval ::NRF_SUCCESS Successfully added an include declaration. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, handle values need to match previously added services. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::NRF_ERROR_NOT_SUPPORTED Feature is not supported, service_handle must be that of the last added service. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, self inclusions are not allowed. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. + */ +SVCALL(SD_BLE_GATTS_INCLUDE_ADD, uint32_t, sd_ble_gatts_include_add(uint16_t service_handle, uint16_t inc_srvc_handle, uint16_t *p_include_handle)); + + +/**@brief Add a characteristic declaration, a characteristic value declaration and optional characteristic descriptor declarations to the Attribute Table. + * + * @note It is currently only possible to add a characteristic to the last added service (i.e. only sequential population is supported at this time). + * + * @note Several restrictions apply to the parameters, such as matching permissions between the user description descriptor and the writable auxiliaries bits, + * readable (no security) and writable (selectable) CCCDs and SCCDs and valid presentation format values. + * + * @note If no metadata is provided for the optional descriptors, their permissions will be derived from the characteristic permissions. + * + * @mscs + * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} + * @endmscs + * + * @param[in] service_handle Handle of the service where the characteristic is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. + * @param[in] p_char_md Characteristic metadata. + * @param[in] p_attr_char_value Pointer to the attribute structure corresponding to the characteristic value. + * @param[out] p_handles Pointer to the structure where the assigned handles will be stored. + * + * @retval ::NRF_SUCCESS Successfully added a characteristic. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, service handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a service context is required. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. + */ +SVCALL(SD_BLE_GATTS_CHARACTERISTIC_ADD, uint32_t, sd_ble_gatts_characteristic_add(uint16_t service_handle, ble_gatts_char_md_t const *p_char_md, ble_gatts_attr_t const *p_attr_char_value, ble_gatts_char_handles_t *p_handles)); + + +/**@brief Add a descriptor to the Attribute Table. + * + * @note It is currently only possible to add a descriptor to the last added characteristic (i.e. only sequential population is supported at this time). + * + * @mscs + * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} + * @endmscs + * + * @param[in] char_handle Handle of the characteristic where the descriptor is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. + * @param[in] p_attr Pointer to the attribute structure. + * @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored. + * + * @retval ::NRF_SUCCESS Successfully added a descriptor. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, characteristic handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a characteristic context is required. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. + */ +SVCALL(SD_BLE_GATTS_DESCRIPTOR_ADD, uint32_t, sd_ble_gatts_descriptor_add(uint16_t char_handle, ble_gatts_attr_t const *p_attr, uint16_t *p_handle)); + +/**@brief Set the value of a given attribute. + * + * @note Values other than system attributes can be set at any time, regardless of whether any active connections exist. + * + * @mscs + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. Ignored if the value does not belong to a system attribute. + * @param[in] handle Attribute handle. + * @param[in,out] p_value Attribute value information. + * + * @retval ::NRF_SUCCESS Successfully set the value of the attribute. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden handle supplied, certain attributes are not modifiable by the application. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied on a system attribute. + */ +SVCALL(SD_BLE_GATTS_VALUE_SET, uint32_t, sd_ble_gatts_value_set(uint16_t conn_handle, uint16_t handle, ble_gatts_value_t *p_value)); + +/**@brief Get the value of a given attribute. + * + * @note If the attribute value is longer than the size of the supplied buffer, + * @ref ble_gatts_value_t::len will return the total attribute value length (excluding offset), + * and not the number of bytes actually returned in @ref ble_gatts_value_t::p_value. + * The application may use this information to allocate a suitable buffer size. + * + * @note When retrieving system attribute values with this function, the connection handle + * may refer to an already disconnected connection. Refer to the documentation of + * @ref sd_ble_gatts_sys_attr_get for further information. + * + * @param[in] conn_handle Connection handle. Ignored if the value does not belong to a system attribute. + * @param[in] handle Attribute handle. + * @param[in,out] p_value Attribute value information. + * + * @retval ::NRF_SUCCESS Successfully retrieved the value of the attribute. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid attribute offset supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied on a system attribute. + * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. + */ +SVCALL(SD_BLE_GATTS_VALUE_GET, uint32_t, sd_ble_gatts_value_get(uint16_t conn_handle, uint16_t handle, ble_gatts_value_t *p_value)); + +/**@brief Notify or Indicate an attribute value. + * + * @details This function checks for the relevant Client Characteristic Configuration descriptor value to verify that the relevant operation + * (notification or indication) has been enabled by the client. It is also able to update the attribute value before issuing the PDU, so that + * the application can atomically perform a value update and a server initiated transaction with a single API call. + * + * @note The local attribute value may be updated even if an outgoing packet is not sent to the peer due to an error during execution. + * The Attribute Table has been updated if one of the following error codes is returned: @ref NRF_ERROR_INVALID_STATE, @ref NRF_ERROR_BUSY, + * @ref NRF_ERROR_FORBIDDEN, @ref BLE_ERROR_GATTS_SYS_ATTR_MISSING and @ref NRF_ERROR_RESOURCES. + * The caller can check whether the value has been updated by looking at the contents of *(@ref ble_gatts_hvx_params_t::p_len). + * + * @note Only one indication procedure can be ongoing per connection at a time. + * If the application tries to indicate an attribute value while another indication procedure is ongoing, + * the function call will return @ref NRF_ERROR_BUSY. + * A @ref BLE_GATTS_EVT_HVC event will be issued as soon as the confirmation arrives from the peer. + * + * @note The number of Handle Value Notifications that can be queued is configured by @ref ble_gatts_conn_cfg_t::hvn_tx_queue_size + * When the queue is full, the function call will return @ref NRF_ERROR_RESOURCES. + * A @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event will be issued as soon as the transmission of the notification is complete. + * + * @note The application can keep track of the available queue element count for notifications by following the procedure below: + * - Store initial queue element count in a variable. + * - Decrement the variable, which stores the currently available queue element count, by one when a call to this function returns @ref NRF_SUCCESS. + * - Increment the variable, which stores the current available queue element count, by the count variable in @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event. + * + * @events + * @event{@ref BLE_GATTS_EVT_HVN_TX_COMPLETE, Notification transmission complete.} + * @event{@ref BLE_GATTS_EVT_HVC, Confirmation received from the peer.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC} + * @mmsc{@ref BLE_GATTS_HVN_MSC} + * @mmsc{@ref BLE_GATTS_HVI_MSC} + * @mmsc{@ref BLE_GATTS_HVX_DISABLED_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in,out] p_hvx_params Pointer to an HVx parameters structure. If @ref ble_gatts_hvx_params_t::p_data + * contains a non-NULL pointer the attribute value will be updated with the contents + * pointed by it before sending the notification or indication. If the attribute value + * is updated, @ref ble_gatts_hvx_params_t::p_len is updated by the SoftDevice to + * contain the number of actual bytes written, else it will be set to 0. + * + * @retval ::NRF_SUCCESS Successfully queued a notification or indication for transmission, and optionally updated the attribute value. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE One or more of the following is true: + * - Invalid Connection State + * - Notifications and/or indications not enabled in the CCCD + * - An ATT_MTU exchange is ongoing + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied. Only attributes added directly by the application are available to notify and indicate. + * @retval ::BLE_ERROR_GATTS_INVALID_ATTR_TYPE Invalid attribute type(s) supplied, only characteristic values may be notified and indicated. + * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. + * @retval ::NRF_ERROR_FORBIDDEN The connection's current security level is lower than the one required by the write permissions of the CCCD associated with this characteristic. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. + * @retval ::NRF_ERROR_BUSY For @ref BLE_GATT_HVX_INDICATION Procedure already in progress. Wait for a @ref BLE_GATTS_EVT_HVC event and retry. + * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. + * @retval ::NRF_ERROR_RESOURCES Too many notifications queued. + * Wait for a @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event and retry. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTS_HVX, uint32_t, sd_ble_gatts_hvx(uint16_t conn_handle, ble_gatts_hvx_params_t const *p_hvx_params)); + +/**@brief Indicate the Service Changed attribute value. + * + * @details This call will send a Handle Value Indication to one or more peers connected to inform them that the Attribute + * Table layout has changed. As soon as the peer has confirmed the indication, a @ref BLE_GATTS_EVT_SC_CONFIRM event will + * be issued. + * + * @note Some of the restrictions and limitations that apply to @ref sd_ble_gatts_hvx also apply here. + * + * @events + * @event{@ref BLE_GATTS_EVT_SC_CONFIRM, Confirmation of attribute table change received from peer.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTS_SC_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] start_handle Start of affected attribute handle range. + * @param[in] end_handle End of affected attribute handle range. + * + * @retval ::NRF_SUCCESS Successfully queued the Service Changed indication for transmission. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_NOT_SUPPORTED Service Changed not enabled at initialization. See @ref + * sd_ble_cfg_set and @ref ble_gatts_cfg_service_changed_t. + * @retval ::NRF_ERROR_INVALID_STATE One or more of the following is true: + * - Invalid Connection State + * - Notifications and/or indications not enabled in the CCCD + * - An ATT_MTU exchange is ongoing + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied, handles must be in the range populated by the application. + * @retval ::NRF_ERROR_BUSY Procedure already in progress. + * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTS_SERVICE_CHANGED, uint32_t, sd_ble_gatts_service_changed(uint16_t conn_handle, uint16_t start_handle, uint16_t end_handle)); + +/**@brief Respond to a Read/Write authorization request. + * + * @note This call should only be used as a response to a @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST event issued to the application. + * + * @mscs + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} + * @mmsc{@ref BLE_GATTS_READ_REQ_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_WRITE_REQ_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_PEER_CANCEL_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_rw_authorize_reply_params Pointer to a structure with the attribute provided by the application. + * + * @note @ref ble_gatts_authorize_params_t::p_data is ignored when this function is used to respond + * to a @ref BLE_GATTS_AUTHORIZE_TYPE_READ event if @ref ble_gatts_authorize_params_t::update + * is set to 0. + * + * @retval ::NRF_SUCCESS Successfully queued a response to the peer, and in the case of a write operation, Attribute Table updated. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no authorization request pending. + * @retval ::NRF_ERROR_INVALID_PARAM Authorization op invalid, + * handle supplied does not match requested handle, + * or invalid data to be written provided by the application. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTS_RW_AUTHORIZE_REPLY, uint32_t, sd_ble_gatts_rw_authorize_reply(uint16_t conn_handle, ble_gatts_rw_authorize_reply_params_t const *p_rw_authorize_reply_params)); + + +/**@brief Update persistent system attribute information. + * + * @details Supply information about persistent system attributes to the stack, + * previously obtained using @ref sd_ble_gatts_sys_attr_get. + * This call is only allowed for active connections, and is usually + * made immediately after a connection is established with an known bonded device, + * often as a response to a @ref BLE_GATTS_EVT_SYS_ATTR_MISSING. + * + * p_sysattrs may point directly to the application's stored copy of the system attributes + * obtained using @ref sd_ble_gatts_sys_attr_get. + * If the pointer is NULL, the system attribute info is initialized, assuming that + * the application does not have any previously saved system attribute data for this device. + * + * @note The state of persistent system attributes is reset upon connection establishment and then remembered for its duration. + * + * @note If this call returns with an error code different from @ref NRF_SUCCESS, the storage of persistent system attributes may have been completed only partially. + * This means that the state of the attribute table is undefined, and the application should either provide a new set of attributes using this same call or + * reset the SoftDevice to return to a known state. + * + * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS is used with this function, only the system attributes included in system services will be modified. + * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS is used with this function, only the system attributes included in user services will be modified. + * + * @mscs + * @mmsc{@ref BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC} + * @mmsc{@ref BLE_GATTS_SYS_ATTRS_UNK_PEER_MSC} + * @mmsc{@ref BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_sys_attr_data Pointer to a saved copy of system attributes supplied to the stack, or NULL. + * @param[in] len Size of data pointed by p_sys_attr_data, in octets. + * @param[in] flags Optional additional flags, see @ref BLE_GATTS_SYS_ATTR_FLAGS + * + * @retval ::NRF_SUCCESS Successfully set the system attribute information. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid flags supplied. + * @retval ::NRF_ERROR_INVALID_DATA Invalid data supplied, the data should be exactly the same as retrieved with @ref sd_ble_gatts_sys_attr_get. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + */ +SVCALL(SD_BLE_GATTS_SYS_ATTR_SET, uint32_t, sd_ble_gatts_sys_attr_set(uint16_t conn_handle, uint8_t const *p_sys_attr_data, uint16_t len, uint32_t flags)); + + +/**@brief Retrieve persistent system attribute information from the stack. + * + * @details This call is used to retrieve information about values to be stored persistently by the application + * during the lifetime of a connection or after it has been terminated. When a new connection is established with the same bonded device, + * the system attribute information retrieved with this function should be restored using using @ref sd_ble_gatts_sys_attr_set. + * If retrieved after disconnection, the data should be read before a new connection established. The connection handle for + * the previous, now disconnected, connection will remain valid until a new one is created to allow this API call to refer to it. + * Connection handles belonging to active connections can be used as well, but care should be taken since the system attributes + * may be written to at any time by the peer during a connection's lifetime. + * + * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS is used with this function, only the system attributes included in system services will be returned. + * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS is used with this function, only the system attributes included in user services will be returned. + * + * @mscs + * @mmsc{@ref BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle of the recently terminated connection. + * @param[out] p_sys_attr_data Pointer to a buffer where updated information about system attributes will be filled in. The format of the data is described + * in @ref BLE_GATTS_SYS_ATTRS_FORMAT. NULL can be provided to obtain the length of the data. + * @param[in,out] p_len Size of application buffer if p_sys_attr_data is not NULL. Unconditionally updated to actual length of system attribute data. + * @param[in] flags Optional additional flags, see @ref BLE_GATTS_SYS_ATTR_FLAGS + * + * @retval ::NRF_SUCCESS Successfully retrieved the system attribute information. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid flags supplied. + * @retval ::NRF_ERROR_DATA_SIZE The system attribute information did not fit into the provided buffer. + * @retval ::NRF_ERROR_NOT_FOUND No system attributes found. + */ +SVCALL(SD_BLE_GATTS_SYS_ATTR_GET, uint32_t, sd_ble_gatts_sys_attr_get(uint16_t conn_handle, uint8_t *p_sys_attr_data, uint16_t *p_len, uint32_t flags)); + + +/**@brief Retrieve the first valid user attribute handle. + * + * @param[out] p_handle Pointer to an integer where the handle will be stored. + * + * @retval ::NRF_SUCCESS Successfully retrieved the handle. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + */ +SVCALL(SD_BLE_GATTS_INITIAL_USER_HANDLE_GET, uint32_t, sd_ble_gatts_initial_user_handle_get(uint16_t *p_handle)); + +/**@brief Retrieve the attribute UUID and/or metadata. + * + * @param[in] handle Attribute handle + * @param[out] p_uuid UUID of the attribute. Use NULL to omit this field. + * @param[out] p_md Metadata of the attribute. Use NULL to omit this field. + * + * @retval ::NRF_SUCCESS Successfully retrieved the attribute metadata, + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameters supplied. Returned when both @c p_uuid and @c p_md are NULL. + * @retval ::NRF_ERROR_NOT_FOUND Attribute was not found. + */ +SVCALL(SD_BLE_GATTS_ATTR_GET, uint32_t, sd_ble_gatts_attr_get(uint16_t handle, ble_uuid_t * p_uuid, ble_gatts_attr_md_t * p_md)); + +/**@brief Reply to an ATT_MTU exchange request by sending an Exchange MTU Response to the client. + * + * @details This function is only used to reply to a @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST event. + * + * @details The SoftDevice sets ATT_MTU to the minimum of: + * - The Client RX MTU value from @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST, and + * - The Server RX MTU value. + * + * However, the SoftDevice never sets ATT_MTU lower than @ref BLE_GATT_ATT_MTU_DEFAULT. + * + * @mscs + * @mmsc{@ref BLE_GATTS_MTU_EXCHANGE} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] server_rx_mtu Server RX MTU size. + * - The minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. + * - The maximum value is @ref ble_gatt_conn_cfg_t::att_mtu in the connection configuration + * used for this connection. + * - The value must be equal to Client RX MTU size given in @ref sd_ble_gattc_exchange_mtu_request + * if an ATT_MTU exchange has already been performed in the other direction. + * + * @retval ::NRF_SUCCESS Successfully sent response to the client. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no ATT_MTU exchange request pending. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid Server RX MTU size supplied. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTS_EXCHANGE_MTU_REPLY, uint32_t, sd_ble_gatts_exchange_mtu_reply(uint16_t conn_handle, uint16_t server_rx_mtu)); +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // BLE_GATTS_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_hci.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_hci.h new file mode 100644 index 00000000000..f0dde9a03ad --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_hci.h @@ -0,0 +1,135 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON + @{ +*/ + + +#ifndef BLE_HCI_H__ +#define BLE_HCI_H__ +#ifdef __cplusplus +extern "C" { +#endif + +/** @defgroup BLE_HCI_STATUS_CODES Bluetooth status codes + * @{ */ + +#define BLE_HCI_STATUS_CODE_SUCCESS 0x00 /**< Success. */ +#define BLE_HCI_STATUS_CODE_UNKNOWN_BTLE_COMMAND 0x01 /**< Unknown BLE Command. */ +#define BLE_HCI_STATUS_CODE_UNKNOWN_CONNECTION_IDENTIFIER 0x02 /**< Unknown Connection Identifier. */ +/*0x03 Hardware Failure +0x04 Page Timeout +*/ +#define BLE_HCI_AUTHENTICATION_FAILURE 0x05 /**< Authentication Failure. */ +#define BLE_HCI_STATUS_CODE_PIN_OR_KEY_MISSING 0x06 /**< Pin or Key missing. */ +#define BLE_HCI_MEMORY_CAPACITY_EXCEEDED 0x07 /**< Memory Capacity Exceeded. */ +#define BLE_HCI_CONNECTION_TIMEOUT 0x08 /**< Connection Timeout. */ +/*0x09 Connection Limit Exceeded +0x0A Synchronous Connection Limit To A Device Exceeded +0x0B ACL Connection Already Exists*/ +#define BLE_HCI_STATUS_CODE_COMMAND_DISALLOWED 0x0C /**< Command Disallowed. */ +/*0x0D Connection Rejected due to Limited Resources +0x0E Connection Rejected Due To Security Reasons +0x0F Connection Rejected due to Unacceptable BD_ADDR +0x10 Connection Accept Timeout Exceeded +0x11 Unsupported Feature or Parameter Value*/ +#define BLE_HCI_STATUS_CODE_INVALID_BTLE_COMMAND_PARAMETERS 0x12 /**< Invalid BLE Command Parameters. */ +#define BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION 0x13 /**< Remote User Terminated Connection. */ +#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_LOW_RESOURCES 0x14 /**< Remote Device Terminated Connection due to low resources.*/ +#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_POWER_OFF 0x15 /**< Remote Device Terminated Connection due to power off. */ +#define BLE_HCI_LOCAL_HOST_TERMINATED_CONNECTION 0x16 /**< Local Host Terminated Connection. */ +/* +0x17 Repeated Attempts +0x18 Pairing Not Allowed +0x19 Unknown LMP PDU +*/ +#define BLE_HCI_UNSUPPORTED_REMOTE_FEATURE 0x1A /**< Unsupported Remote Feature. */ +/* +0x1B SCO Offset Rejected +0x1C SCO Interval Rejected +0x1D SCO Air Mode Rejected*/ +#define BLE_HCI_STATUS_CODE_INVALID_LMP_PARAMETERS 0x1E /**< Invalid LMP Parameters. */ +#define BLE_HCI_STATUS_CODE_UNSPECIFIED_ERROR 0x1F /**< Unspecified Error. */ +/*0x20 Unsupported LMP Parameter Value +0x21 Role Change Not Allowed +*/ +#define BLE_HCI_STATUS_CODE_LMP_RESPONSE_TIMEOUT 0x22 /**< LMP Response Timeout. */ +#define BLE_HCI_STATUS_CODE_LMP_ERROR_TRANSACTION_COLLISION 0x23 /**< LMP Error Transaction Collision/LL Procedure Collision. */ +#define BLE_HCI_STATUS_CODE_LMP_PDU_NOT_ALLOWED 0x24 /**< LMP PDU Not Allowed. */ +/*0x25 Encryption Mode Not Acceptable +0x26 Link Key Can Not be Changed +0x27 Requested QoS Not Supported +*/ +#define BLE_HCI_INSTANT_PASSED 0x28 /**< Instant Passed. */ +#define BLE_HCI_PAIRING_WITH_UNIT_KEY_UNSUPPORTED 0x29 /**< Pairing with Unit Key Unsupported. */ +#define BLE_HCI_DIFFERENT_TRANSACTION_COLLISION 0x2A /**< Different Transaction Collision. */ +/* +0x2B Reserved +0x2C QoS Unacceptable Parameter +0x2D QoS Rejected +0x2E Channel Classification Not Supported +0x2F Insufficient Security +*/ +#define BLE_HCI_PARAMETER_OUT_OF_MANDATORY_RANGE 0x30 /**< Parameter Out Of Mandatory Range. */ +/* +0x31 Reserved +0x32 Role Switch Pending +0x33 Reserved +0x34 Reserved Slot Violation +0x35 Role Switch Failed +0x36 Extended Inquiry Response Too Large +0x37 Secure Simple Pairing Not Supported By Host. +0x38 Host Busy - Pairing +0x39 Connection Rejected due to No Suitable Channel Found*/ +#define BLE_HCI_CONTROLLER_BUSY 0x3A /**< Controller Busy. */ +#define BLE_HCI_CONN_INTERVAL_UNACCEPTABLE 0x3B /**< Connection Interval Unacceptable. */ +#define BLE_HCI_DIRECTED_ADVERTISER_TIMEOUT 0x3C /**< Directed Advertisement Timeout. */ +#define BLE_HCI_CONN_TERMINATED_DUE_TO_MIC_FAILURE 0x3D /**< Connection Terminated due to MIC Failure. */ +#define BLE_HCI_CONN_FAILED_TO_BE_ESTABLISHED 0x3E /**< Connection Failed to be Established. */ + +/** @} */ + + +#ifdef __cplusplus +} +#endif +#endif // BLE_HCI_H__ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_l2cap.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_l2cap.h new file mode 100644 index 00000000000..eaeb4b7d281 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_l2cap.h @@ -0,0 +1,506 @@ +/* + * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_L2CAP Logical Link Control and Adaptation Protocol (L2CAP) + @{ + @brief Definitions and prototypes for the L2CAP interface. + */ + +#ifndef BLE_L2CAP_H__ +#define BLE_L2CAP_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@addtogroup BLE_L2CAP_TERMINOLOGY Terminology + * @{ + * @details + * + * L2CAP SDU + * - A data unit that the application can send/receive to/from a peer. + * + * L2CAP PDU + * - A data unit that is exchanged between local and remote L2CAP entities. + * It consists of L2CAP protocol control information and payload fields. + * The payload field can contain an L2CAP SDU or a part of an L2CAP SDU. + * + * L2CAP MTU + * - The maximum length of an L2CAP SDU. + * + * L2CAP MPS + * - The maximum length of an L2CAP PDU payload field. + * + * Credits + * - A value indicating the number of L2CAP PDUs that the receiver of the credit can send to the peer. + * @} */ + +/**@addtogroup BLE_L2CAP_ENUMERATIONS Enumerations + * @{ */ + +/**@brief L2CAP API SVC numbers. */ +enum BLE_L2CAP_SVCS +{ + SD_BLE_L2CAP_CH_SETUP = BLE_L2CAP_SVC_BASE + 0, /**< Set up an L2CAP channel. */ + SD_BLE_L2CAP_CH_RELEASE = BLE_L2CAP_SVC_BASE + 1, /**< Release an L2CAP channel. */ + SD_BLE_L2CAP_CH_RX = BLE_L2CAP_SVC_BASE + 2, /**< Receive an SDU on an L2CAP channel. */ + SD_BLE_L2CAP_CH_TX = BLE_L2CAP_SVC_BASE + 3, /**< Transmit an SDU on an L2CAP channel. */ + SD_BLE_L2CAP_CH_FLOW_CONTROL = BLE_L2CAP_SVC_BASE + 4, /**< Advanced SDU reception flow control. */ +}; + +/**@brief L2CAP Event IDs. */ +enum BLE_L2CAP_EVTS +{ + BLE_L2CAP_EVT_CH_SETUP_REQUEST = BLE_L2CAP_EVT_BASE + 0, /**< L2CAP Channel Setup Request event. + \n See @ref ble_l2cap_evt_ch_setup_request_t. */ + BLE_L2CAP_EVT_CH_SETUP_REFUSED = BLE_L2CAP_EVT_BASE + 1, /**< L2CAP Channel Setup Refused event. + \n See @ref ble_l2cap_evt_ch_setup_refused_t. */ + BLE_L2CAP_EVT_CH_SETUP = BLE_L2CAP_EVT_BASE + 2, /**< L2CAP Channel Setup Completed event. + \n See @ref ble_l2cap_evt_ch_setup_t. */ + BLE_L2CAP_EVT_CH_RELEASED = BLE_L2CAP_EVT_BASE + 3, /**< L2CAP Channel Released event. + \n No additional event structure applies. */ + BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED = BLE_L2CAP_EVT_BASE + 4, /**< L2CAP Channel SDU data buffer released event. + \n See @ref ble_l2cap_evt_ch_sdu_buf_released_t. */ + BLE_L2CAP_EVT_CH_CREDIT = BLE_L2CAP_EVT_BASE + 5, /**< L2CAP Channel Credit received. + \n See @ref ble_l2cap_evt_ch_credit_t. */ + BLE_L2CAP_EVT_CH_RX = BLE_L2CAP_EVT_BASE + 6, /**< L2CAP Channel SDU received. + \n See @ref ble_l2cap_evt_ch_rx_t. */ + BLE_L2CAP_EVT_CH_TX = BLE_L2CAP_EVT_BASE + 7, /**< L2CAP Channel SDU transmitted. + \n See @ref ble_l2cap_evt_ch_tx_t. */ +}; + +/** @} */ + +/**@addtogroup BLE_L2CAP_DEFINES Defines + * @{ */ + +/**@brief Maximum number of L2CAP channels per connection. */ +#define BLE_L2CAP_CH_COUNT_MAX (64) + +/**@brief Minimum L2CAP MTU, in bytes. */ +#define BLE_L2CAP_MTU_MIN (23) + +/**@brief Minimum L2CAP MPS, in bytes. */ +#define BLE_L2CAP_MPS_MIN (23) + +/**@brief Invalid CID. */ +#define BLE_L2CAP_CID_INVALID (0x0000) + +/**@brief Default number of credits for @ref sd_ble_l2cap_ch_flow_control. */ +#define BLE_L2CAP_CREDITS_DEFAULT (1) + +/**@defgroup BLE_L2CAP_CH_SETUP_REFUSED_SRCS L2CAP channel setup refused sources + * @{ */ +#define BLE_L2CAP_CH_SETUP_REFUSED_SRC_LOCAL (0x01) /**< Local. */ +#define BLE_L2CAP_CH_SETUP_REFUSED_SRC_REMOTE (0x02) /**< Remote. */ + /** @} */ + + /** @defgroup BLE_L2CAP_CH_STATUS_CODES L2CAP channel status codes + * @{ */ +#define BLE_L2CAP_CH_STATUS_CODE_SUCCESS (0x0000) /**< Success. */ +#define BLE_L2CAP_CH_STATUS_CODE_LE_PSM_NOT_SUPPORTED (0x0002) /**< LE_PSM not supported. */ +#define BLE_L2CAP_CH_STATUS_CODE_NO_RESOURCES (0x0004) /**< No resources available. */ +#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_AUTHENTICATION (0x0005) /**< Insufficient authentication. */ +#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_AUTHORIZATION (0x0006) /**< Insufficient authorization. */ +#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_ENC_KEY_SIZE (0x0007) /**< Insufficient encryption key size. */ +#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_ENC (0x0008) /**< Insufficient encryption. */ +#define BLE_L2CAP_CH_STATUS_CODE_INVALID_SCID (0x0009) /**< Invalid Source CID. */ +#define BLE_L2CAP_CH_STATUS_CODE_SCID_ALLOCATED (0x000A) /**< Source CID already allocated. */ +#define BLE_L2CAP_CH_STATUS_CODE_UNACCEPTABLE_PARAMS (0x000B) /**< Unacceptable parameters. */ +#define BLE_L2CAP_CH_STATUS_CODE_NOT_UNDERSTOOD (0x8000) /**< Command Reject received instead of LE Credit Based Connection Response. */ +#define BLE_L2CAP_CH_STATUS_CODE_TIMEOUT (0xC000) /**< Operation timed out. */ +/** @} */ + +/** @} */ + +/**@addtogroup BLE_L2CAP_STRUCTURES Structures + * @{ */ + +/** + * @brief BLE L2CAP connection configuration parameters, set with @ref sd_ble_cfg_set. + * + * @note These parameters are set per connection, so all L2CAP channels created on this connection + * will have the same parameters. + * + * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: + * - rx_mps is smaller than @ref BLE_L2CAP_MPS_MIN. + * - tx_mps is smaller than @ref BLE_L2CAP_MPS_MIN. + * - ch_count is greater than @ref BLE_L2CAP_CH_COUNT_MAX. + * @retval ::NRF_ERROR_NO_MEM rx_mps or tx_mps is set too high. + */ +typedef struct +{ + uint16_t rx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP shall + be able to receive on L2CAP channels on connections with this + configuration. The minimum value is @ref BLE_L2CAP_MPS_MIN. */ + uint16_t tx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP shall + be able to transmit on L2CAP channels on connections with this + configuration. The minimum value is @ref BLE_L2CAP_MPS_MIN. */ + uint8_t rx_queue_size; /**< Number of SDU data buffers that can be queued for reception per + L2CAP channel. The minimum value is one. */ + uint8_t tx_queue_size; /**< Number of SDU data buffers that can be queued for transmission + per L2CAP channel. The minimum value is one. */ + uint8_t ch_count; /**< Number of L2CAP channels the application can create per connection + with this configuration. The default value is zero, the maximum + value is @ref BLE_L2CAP_CH_COUNT_MAX. + @note if this parameter is set to zero, all other parameters in + @ref ble_l2cap_conn_cfg_t are ignored. */ +} ble_l2cap_conn_cfg_t; + +/**@brief L2CAP channel RX parameters. */ +typedef struct +{ + uint16_t rx_mtu; /**< The maximum L2CAP SDU size, in bytes, that L2CAP shall be able to + receive on this L2CAP channel. + - Must be equal to or greater than @ref BLE_L2CAP_MTU_MIN. */ + uint16_t rx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP shall be + able to receive on this L2CAP channel. + - Must be equal to or greater than @ref BLE_L2CAP_MPS_MIN. + - Must be equal to or less than @ref ble_l2cap_conn_cfg_t::rx_mps. */ + ble_data_t sdu_buf; /**< SDU data buffer for reception. + - If @ref ble_data_t::p_data is non-NULL, initial credits are + issued to the peer. + - If @ref ble_data_t::p_data is NULL, no initial credits are + issued to the peer. */ +} ble_l2cap_ch_rx_params_t; + +/**@brief L2CAP channel setup parameters. */ +typedef struct +{ + ble_l2cap_ch_rx_params_t rx_params; /**< L2CAP channel RX parameters. */ + uint16_t le_psm; /**< LE Protocol/Service Multiplexer. Used when requesting + setup of an L2CAP channel, ignored otherwise. */ + uint16_t status; /**< Status code, see @ref BLE_L2CAP_CH_STATUS_CODES. + Used when replying to a setup request of an L2CAP + channel, ignored otherwise. */ +} ble_l2cap_ch_setup_params_t; + +/**@brief L2CAP channel TX parameters. */ +typedef struct +{ + uint16_t tx_mtu; /**< The maximum L2CAP SDU size, in bytes, that L2CAP is able to + transmit on this L2CAP channel. */ + uint16_t peer_mps; /**< The maximum L2CAP PDU payload size, in bytes, that the peer is + able to receive on this L2CAP channel. */ + uint16_t tx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP is able + to transmit on this L2CAP channel. This is effective tx_mps, + selected by the SoftDevice as + MIN( @ref ble_l2cap_ch_tx_params_t::peer_mps, @ref ble_l2cap_conn_cfg_t::tx_mps ) */ + uint16_t credits; /**< Initial credits given by the peer. */ +} ble_l2cap_ch_tx_params_t; + +/**@brief L2CAP Channel Setup Request event. */ +typedef struct +{ + ble_l2cap_ch_tx_params_t tx_params; /**< L2CAP channel TX parameters. */ + uint16_t le_psm; /**< LE Protocol/Service Multiplexer. */ +} ble_l2cap_evt_ch_setup_request_t; + +/**@brief L2CAP Channel Setup Refused event. */ +typedef struct +{ + uint8_t source; /**< Source, see @ref BLE_L2CAP_CH_SETUP_REFUSED_SRCS */ + uint16_t status; /**< Status code, see @ref BLE_L2CAP_CH_STATUS_CODES */ +} ble_l2cap_evt_ch_setup_refused_t; + +/**@brief L2CAP Channel Setup Completed event. */ +typedef struct +{ + ble_l2cap_ch_tx_params_t tx_params; /**< L2CAP channel TX parameters. */ +} ble_l2cap_evt_ch_setup_t; + +/**@brief L2CAP Channel SDU Data Duffer Released event. */ +typedef struct +{ + ble_data_t sdu_buf; /**< Returned reception or transmission SDU data buffer. The SoftDevice + returns SDU data buffers supplied by the application, which have + not yet been returned previously via a @ref BLE_L2CAP_EVT_CH_RX or + @ref BLE_L2CAP_EVT_CH_TX event. */ +} ble_l2cap_evt_ch_sdu_buf_released_t; + +/**@brief L2CAP Channel Credit received event. */ +typedef struct +{ + uint16_t credits; /**< Additional credits given by the peer. */ +} ble_l2cap_evt_ch_credit_t; + +/**@brief L2CAP Channel received SDU event. */ +typedef struct +{ + uint16_t sdu_len; /**< Total SDU length, in bytes. */ + ble_data_t sdu_buf; /**< SDU data buffer. + @note If there is not enough space in the buffer + (sdu_buf.len < sdu_len) then the rest of the SDU will be + silently discarded by the SoftDevice. */ +} ble_l2cap_evt_ch_rx_t; + +/**@brief L2CAP Channel transmitted SDU event. */ +typedef struct +{ + ble_data_t sdu_buf; /**< SDU data buffer. */ +} ble_l2cap_evt_ch_tx_t; + +/**@brief L2CAP event structure. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which the event occured. */ + uint16_t local_cid; /**< Local Channel ID of the L2CAP channel, or + @ref BLE_L2CAP_CID_INVALID if not present. */ + union + { + ble_l2cap_evt_ch_setup_request_t ch_setup_request; /**< L2CAP Channel Setup Request Event Parameters. */ + ble_l2cap_evt_ch_setup_refused_t ch_setup_refused; /**< L2CAP Channel Setup Refused Event Parameters. */ + ble_l2cap_evt_ch_setup_t ch_setup; /**< L2CAP Channel Setup Completed Event Parameters. */ + ble_l2cap_evt_ch_sdu_buf_released_t ch_sdu_buf_released;/**< L2CAP Channel SDU Data Buffer Released Event Parameters. */ + ble_l2cap_evt_ch_credit_t credit; /**< L2CAP Channel Credit Received Event Parameters. */ + ble_l2cap_evt_ch_rx_t rx; /**< L2CAP Channel SDU Received Event Parameters. */ + ble_l2cap_evt_ch_tx_t tx; /**< L2CAP Channel SDU Transmitted Event Parameters. */ + } params; /**< Event Parameters. */ +} ble_l2cap_evt_t; + +/** @} */ + +/**@addtogroup BLE_L2CAP_FUNCTIONS Functions + * @{ */ + +/**@brief Set up an L2CAP channel. + * + * @details This function is used to: + * - Request setup of an L2CAP channel: sends an LE Credit Based Connection Request packet to a peer. + * - Reply to a setup request of an L2CAP channel (if called in response to a + * @ref BLE_L2CAP_EVT_CH_SETUP_REQUEST event): sends an LE Credit Based Connection + * Response packet to a peer. + * + * @note A call to this function will require the application to keep the SDU data buffer alive + * until the SDU data buffer is returned in @ref BLE_L2CAP_EVT_CH_RX or + * @ref BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED event. + * + * @events + * @event{@ref BLE_L2CAP_EVT_CH_SETUP, Setup successful.} + * @event{@ref BLE_L2CAP_EVT_CH_SETUP_REFUSED, Setup failed.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_SETUP_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in,out] p_local_cid Pointer to a uint16_t containing Local Channel ID of the L2CAP channel: + * - As input: @ref BLE_L2CAP_CID_INVALID when requesting setup of an L2CAP + * channel or local_cid provided in the @ref BLE_L2CAP_EVT_CH_SETUP_REQUEST + * event when replying to a setup request of an L2CAP channel. + * - As output: local_cid for this channel. + * @param[in] p_params L2CAP channel parameters. + * + * @retval ::NRF_SUCCESS Successfully queued request or response for transmission. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_LENGTH Supplied higher rx_mps than has been configured on this link. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (L2CAP channel already set up). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + * @retval ::NRF_ERROR_RESOURCES The limit has been reached for available L2CAP channels, + * see @ref ble_l2cap_conn_cfg_t::ch_count. + */ +SVCALL(SD_BLE_L2CAP_CH_SETUP, uint32_t, sd_ble_l2cap_ch_setup(uint16_t conn_handle, uint16_t *p_local_cid, ble_l2cap_ch_setup_params_t const *p_params)); + +/**@brief Release an L2CAP channel. + * + * @details This sends a Disconnection Request packet to a peer. + * + * @events + * @event{@ref BLE_L2CAP_EVT_CH_RELEASED, Release complete.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_RELEASE_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in] local_cid Local Channel ID of the L2CAP channel. + * + * @retval ::NRF_SUCCESS Successfully queued request for transmission. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is + * in progress for the L2CAP channel). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + */ +SVCALL(SD_BLE_L2CAP_CH_RELEASE, uint32_t, sd_ble_l2cap_ch_release(uint16_t conn_handle, uint16_t local_cid)); + +/**@brief Receive an SDU on an L2CAP channel. + * + * @details This may issue additional credits to the peer using an LE Flow Control Credit packet. + * + * @note A call to this function will require the application to keep the memory pointed by + * @ref ble_data_t::p_data alive until the SDU data buffer is returned in @ref BLE_L2CAP_EVT_CH_RX + * or @ref BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED event. + * + * @note The SoftDevice can queue up to @ref ble_l2cap_conn_cfg_t::rx_queue_size SDU data buffers + * for reception per L2CAP channel. + * + * @events + * @event{@ref BLE_L2CAP_EVT_CH_RX, The SDU is received.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_RX_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in] local_cid Local Channel ID of the L2CAP channel. + * @param[in] p_sdu_buf Pointer to the SDU data buffer. + * + * @retval ::NRF_SUCCESS Buffer accepted. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is + * in progress for an L2CAP channel). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + * @retval ::NRF_ERROR_RESOURCES Too many SDU data buffers supplied. Wait for a + * @ref BLE_L2CAP_EVT_CH_RX event and retry. + */ +SVCALL(SD_BLE_L2CAP_CH_RX, uint32_t, sd_ble_l2cap_ch_rx(uint16_t conn_handle, uint16_t local_cid, ble_data_t const *p_sdu_buf)); + +/**@brief Transmit an SDU on an L2CAP channel. + * + * @note A call to this function will require the application to keep the memory pointed by + * @ref ble_data_t::p_data alive until the SDU data buffer is returned in @ref BLE_L2CAP_EVT_CH_TX + * or @ref BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED event. + * + * @note The SoftDevice can queue up to @ref ble_l2cap_conn_cfg_t::tx_queue_size SDUs for + * transmission per L2CAP channel. + * + * @note The application can keep track of the available credits for transmission by following + * the procedure below: + * - Store initial credits given by the peer in a variable. + * (Initial credits are provided in a @ref BLE_L2CAP_EVT_CH_SETUP event.) + * - Decrement the variable, which stores the currently available credits, by + * ceiling((@ref ble_data_t::len + 2) / tx_mps) when a call to this function returns + * @ref NRF_SUCCESS. (tx_mps is provided in a @ref BLE_L2CAP_EVT_CH_SETUP event.) + * - Increment the variable, which stores the currently available credits, by additional + * credits given by the peer in a @ref BLE_L2CAP_EVT_CH_CREDIT event. + * + * @events + * @event{@ref BLE_L2CAP_EVT_CH_TX, The SDU is transmitted.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_TX_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in] local_cid Local Channel ID of the L2CAP channel. + * @param[in] p_sdu_buf Pointer to the SDU data buffer. + * + * @retval ::NRF_SUCCESS Successfully queued L2CAP SDU for transmission. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is + * in progress for the L2CAP channel). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + * @retval ::NRF_ERROR_DATA_SIZE Invalid SDU length supplied, must not be more than + * @ref ble_l2cap_ch_tx_params_t::tx_mtu provided in + * @ref BLE_L2CAP_EVT_CH_SETUP event. + * @retval ::NRF_ERROR_RESOURCES Too many SDUs queued for transmission. Wait for a + * @ref BLE_L2CAP_EVT_CH_TX event and retry. + */ +SVCALL(SD_BLE_L2CAP_CH_TX, uint32_t, sd_ble_l2cap_ch_tx(uint16_t conn_handle, uint16_t local_cid, ble_data_t const *p_sdu_buf)); + +/**@brief Advanced SDU reception flow control. + * + * @details Adjust the way the SoftDevice issues credits to the peer. + * This may issue additional credits to the peer using an LE Flow Control Credit packet. + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_FLOW_CONTROL_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in] local_cid Local Channel ID of the L2CAP channel or @ref BLE_L2CAP_CID_INVALID to set + * the value that will be used for newly created channels. + * @param[in] credits Number of credits that the SoftDevice will make sure the peer has every + * time it starts using a new reception buffer. + * - @ref BLE_L2CAP_CREDITS_DEFAULT is the default value the SoftDevice will + * use if this function is not called. + * - If set to zero, the SoftDevice will stop issuing credits for new reception + * buffers the application provides or has provided. SDU reception that is + * currently ongoing will be allowed to complete. + * @param[out] p_credits NULL or pointer to a uint16_t. If a valid pointer is provided, it will be + * written by the SoftDevice with the number of credits that is or will be + * available to the peer. If the value written by the SoftDevice is 0 when + * credits parameter was set to 0, the peer will not be able to send more + * data until more credits are provided by calling this function again with + * credits > 0. This parameter is ignored when local_cid is set to + * @ref BLE_L2CAP_CID_INVALID. + * + * @note Application should take care when setting number of credits higher than default value. In + * this case the application must make sure that the SoftDevice always has reception buffers + * available (see @ref sd_ble_l2cap_ch_rx) for that channel. If the SoftDevice does not have + * such buffers available, packets may be NACKed on the Link Layer and all Bluetooth traffic + * on the connection handle may be stalled until the SoftDevice again has an available + * reception buffer. This applies even if the application has used this call to set the + * credits back to default, or zero. + * + * @retval ::NRF_SUCCESS Flow control parameters accepted. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is + * in progress for an L2CAP channel). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + */ +SVCALL(SD_BLE_L2CAP_CH_FLOW_CONTROL, uint32_t, sd_ble_l2cap_ch_flow_control(uint16_t conn_handle, uint16_t local_cid, uint16_t credits, uint16_t *p_credits)); + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // BLE_L2CAP_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_ranges.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_ranges.h new file mode 100644 index 00000000000..0935bca0710 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_ranges.h @@ -0,0 +1,156 @@ +/* + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON + @{ + @defgroup ble_ranges Module specific SVC, event and option number subranges + @{ + + @brief Definition of SVC, event and option number subranges for each API module. + + @note + SVCs, event and option numbers are split into subranges for each API module. + Each module receives its entire allocated range of SVC calls, whether implemented or not, + but return BLE_ERROR_NOT_SUPPORTED for unimplemented or undefined calls in its range. + + Note that the symbols BLE__SVC_LAST is the end of the allocated SVC range, + rather than the last SVC function call actually defined and implemented. + + Specific SVC, event and option values are defined in each module's ble_.h file, + which defines names of each individual SVC code based on the range start value. +*/ + +#ifndef BLE_RANGES_H__ +#define BLE_RANGES_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#define BLE_SVC_BASE 0x60 /**< Common BLE SVC base. */ +#define BLE_SVC_LAST 0x6B /**< Common BLE SVC last. */ + +#define BLE_GAP_SVC_BASE 0x6C /**< GAP BLE SVC base. */ +#define BLE_GAP_SVC_LAST 0x9A /**< GAP BLE SVC last. */ + +#define BLE_GATTC_SVC_BASE 0x9B /**< GATTC BLE SVC base. */ +#define BLE_GATTC_SVC_LAST 0xA7 /**< GATTC BLE SVC last. */ + +#define BLE_GATTS_SVC_BASE 0xA8 /**< GATTS BLE SVC base. */ +#define BLE_GATTS_SVC_LAST 0xB7 /**< GATTS BLE SVC last. */ + +#define BLE_L2CAP_SVC_BASE 0xB8 /**< L2CAP BLE SVC base. */ +#define BLE_L2CAP_SVC_LAST 0xBF /**< L2CAP BLE SVC last. */ + + +#define BLE_EVT_INVALID 0x00 /**< Invalid BLE Event. */ + +#define BLE_EVT_BASE 0x01 /**< Common BLE Event base. */ +#define BLE_EVT_LAST 0x0F /**< Common BLE Event last. */ + +#define BLE_GAP_EVT_BASE 0x10 /**< GAP BLE Event base. */ +#define BLE_GAP_EVT_LAST 0x2F /**< GAP BLE Event last. */ + +#define BLE_GATTC_EVT_BASE 0x30 /**< GATTC BLE Event base. */ +#define BLE_GATTC_EVT_LAST 0x4F /**< GATTC BLE Event last. */ + +#define BLE_GATTS_EVT_BASE 0x50 /**< GATTS BLE Event base. */ +#define BLE_GATTS_EVT_LAST 0x6F /**< GATTS BLE Event last. */ + +#define BLE_L2CAP_EVT_BASE 0x70 /**< L2CAP BLE Event base. */ +#define BLE_L2CAP_EVT_LAST 0x8F /**< L2CAP BLE Event last. */ + + +#define BLE_OPT_INVALID 0x00 /**< Invalid BLE Option. */ + +#define BLE_OPT_BASE 0x01 /**< Common BLE Option base. */ +#define BLE_OPT_LAST 0x1F /**< Common BLE Option last. */ + +#define BLE_GAP_OPT_BASE 0x20 /**< GAP BLE Option base. */ +#define BLE_GAP_OPT_LAST 0x3F /**< GAP BLE Option last. */ + +#define BLE_GATT_OPT_BASE 0x40 /**< GATT BLE Option base. */ +#define BLE_GATT_OPT_LAST 0x5F /**< GATT BLE Option last. */ + +#define BLE_GATTC_OPT_BASE 0x60 /**< GATTC BLE Option base. */ +#define BLE_GATTC_OPT_LAST 0x7F /**< GATTC BLE Option last. */ + +#define BLE_GATTS_OPT_BASE 0x80 /**< GATTS BLE Option base. */ +#define BLE_GATTS_OPT_LAST 0x9F /**< GATTS BLE Option last. */ + +#define BLE_L2CAP_OPT_BASE 0xA0 /**< L2CAP BLE Option base. */ +#define BLE_L2CAP_OPT_LAST 0xBF /**< L2CAP BLE Option last. */ + + +#define BLE_CFG_INVALID 0x00 /**< Invalid BLE configuration. */ + +#define BLE_CFG_BASE 0x01 /**< Common BLE configuration base. */ +#define BLE_CFG_LAST 0x1F /**< Common BLE configuration last. */ + +#define BLE_CONN_CFG_BASE 0x20 /**< BLE connection configuration base. */ +#define BLE_CONN_CFG_LAST 0x3F /**< BLE connection configuration last. */ + +#define BLE_GAP_CFG_BASE 0x40 /**< GAP BLE configuration base. */ +#define BLE_GAP_CFG_LAST 0x5F /**< GAP BLE configuration last. */ + +#define BLE_GATT_CFG_BASE 0x60 /**< GATT BLE configuration base. */ +#define BLE_GATT_CFG_LAST 0x7F /**< GATT BLE configuration last. */ + +#define BLE_GATTC_CFG_BASE 0x80 /**< GATTC BLE configuration base. */ +#define BLE_GATTC_CFG_LAST 0x9F /**< GATTC BLE configuration last. */ + +#define BLE_GATTS_CFG_BASE 0xA0 /**< GATTS BLE configuration base. */ +#define BLE_GATTS_CFG_LAST 0xBF /**< GATTS BLE configuration last. */ + +#define BLE_L2CAP_CFG_BASE 0xC0 /**< L2CAP BLE configuration base. */ +#define BLE_L2CAP_CFG_LAST 0xDF /**< L2CAP BLE configuration last. */ + + + + + +#ifdef __cplusplus +} +#endif +#endif /* BLE_RANGES_H__ */ + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_types.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_types.h new file mode 100644 index 00000000000..88c93180c83 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble_types.h @@ -0,0 +1,215 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON + @{ + @defgroup ble_types Common types and macro definitions + @{ + + @brief Common types and macro definitions for the BLE SoftDevice. + */ + +#ifndef BLE_TYPES_H__ +#define BLE_TYPES_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_TYPES_DEFINES Defines + * @{ */ + +/** @defgroup BLE_CONN_HANDLES BLE Connection Handles + * @{ */ +#define BLE_CONN_HANDLE_INVALID 0xFFFF /**< Invalid Connection Handle. */ +#define BLE_CONN_HANDLE_ALL 0xFFFE /**< Applies to all Connection Handles. */ +/** @} */ + + +/** @defgroup BLE_UUID_VALUES Assigned Values for BLE UUIDs + * @{ */ +/* Generic UUIDs, applicable to all services */ +#define BLE_UUID_UNKNOWN 0x0000 /**< Reserved UUID. */ +#define BLE_UUID_SERVICE_PRIMARY 0x2800 /**< Primary Service. */ +#define BLE_UUID_SERVICE_SECONDARY 0x2801 /**< Secondary Service. */ +#define BLE_UUID_SERVICE_INCLUDE 0x2802 /**< Include. */ +#define BLE_UUID_CHARACTERISTIC 0x2803 /**< Characteristic. */ +#define BLE_UUID_DESCRIPTOR_CHAR_EXT_PROP 0x2900 /**< Characteristic Extended Properties Descriptor. */ +#define BLE_UUID_DESCRIPTOR_CHAR_USER_DESC 0x2901 /**< Characteristic User Description Descriptor. */ +#define BLE_UUID_DESCRIPTOR_CLIENT_CHAR_CONFIG 0x2902 /**< Client Characteristic Configuration Descriptor. */ +#define BLE_UUID_DESCRIPTOR_SERVER_CHAR_CONFIG 0x2903 /**< Server Characteristic Configuration Descriptor. */ +#define BLE_UUID_DESCRIPTOR_CHAR_PRESENTATION_FORMAT 0x2904 /**< Characteristic Presentation Format Descriptor. */ +#define BLE_UUID_DESCRIPTOR_CHAR_AGGREGATE_FORMAT 0x2905 /**< Characteristic Aggregate Format Descriptor. */ +/* GATT specific UUIDs */ +#define BLE_UUID_GATT 0x1801 /**< Generic Attribute Profile. */ +#define BLE_UUID_GATT_CHARACTERISTIC_SERVICE_CHANGED 0x2A05 /**< Service Changed Characteristic. */ +/* GAP specific UUIDs */ +#define BLE_UUID_GAP 0x1800 /**< Generic Access Profile. */ +#define BLE_UUID_GAP_CHARACTERISTIC_DEVICE_NAME 0x2A00 /**< Device Name Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_APPEARANCE 0x2A01 /**< Appearance Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_RECONN_ADDR 0x2A03 /**< Reconnection Address Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_PPCP 0x2A04 /**< Peripheral Preferred Connection Parameters Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_CAR 0x2AA6 /**< Central Address Resolution Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_RPA_ONLY 0x2AC9 /**< Resolvable Private Address Only Characteristic. */ +/** @} */ + + +/** @defgroup BLE_UUID_TYPES Types of UUID + * @{ */ +#define BLE_UUID_TYPE_UNKNOWN 0x00 /**< Invalid UUID type. */ +#define BLE_UUID_TYPE_BLE 0x01 /**< Bluetooth SIG UUID (16-bit). */ +#define BLE_UUID_TYPE_VENDOR_BEGIN 0x02 /**< Vendor UUID types start at this index (128-bit). */ +/** @} */ + + +/** @defgroup BLE_APPEARANCES Bluetooth Appearance values + * @note Retrieved from http://developer.bluetooth.org/gatt/characteristics/Pages/CharacteristicViewer.aspx?u=org.bluetooth.characteristic.gap.appearance.xml + * @{ */ +#define BLE_APPEARANCE_UNKNOWN 0 /**< Unknown. */ +#define BLE_APPEARANCE_GENERIC_PHONE 64 /**< Generic Phone. */ +#define BLE_APPEARANCE_GENERIC_COMPUTER 128 /**< Generic Computer. */ +#define BLE_APPEARANCE_GENERIC_WATCH 192 /**< Generic Watch. */ +#define BLE_APPEARANCE_WATCH_SPORTS_WATCH 193 /**< Watch: Sports Watch. */ +#define BLE_APPEARANCE_GENERIC_CLOCK 256 /**< Generic Clock. */ +#define BLE_APPEARANCE_GENERIC_DISPLAY 320 /**< Generic Display. */ +#define BLE_APPEARANCE_GENERIC_REMOTE_CONTROL 384 /**< Generic Remote Control. */ +#define BLE_APPEARANCE_GENERIC_EYE_GLASSES 448 /**< Generic Eye-glasses. */ +#define BLE_APPEARANCE_GENERIC_TAG 512 /**< Generic Tag. */ +#define BLE_APPEARANCE_GENERIC_KEYRING 576 /**< Generic Keyring. */ +#define BLE_APPEARANCE_GENERIC_MEDIA_PLAYER 640 /**< Generic Media Player. */ +#define BLE_APPEARANCE_GENERIC_BARCODE_SCANNER 704 /**< Generic Barcode Scanner. */ +#define BLE_APPEARANCE_GENERIC_THERMOMETER 768 /**< Generic Thermometer. */ +#define BLE_APPEARANCE_THERMOMETER_EAR 769 /**< Thermometer: Ear. */ +#define BLE_APPEARANCE_GENERIC_HEART_RATE_SENSOR 832 /**< Generic Heart rate Sensor. */ +#define BLE_APPEARANCE_HEART_RATE_SENSOR_HEART_RATE_BELT 833 /**< Heart Rate Sensor: Heart Rate Belt. */ +#define BLE_APPEARANCE_GENERIC_BLOOD_PRESSURE 896 /**< Generic Blood Pressure. */ +#define BLE_APPEARANCE_BLOOD_PRESSURE_ARM 897 /**< Blood Pressure: Arm. */ +#define BLE_APPEARANCE_BLOOD_PRESSURE_WRIST 898 /**< Blood Pressure: Wrist. */ +#define BLE_APPEARANCE_GENERIC_HID 960 /**< Human Interface Device (HID). */ +#define BLE_APPEARANCE_HID_KEYBOARD 961 /**< Keyboard (HID Subtype). */ +#define BLE_APPEARANCE_HID_MOUSE 962 /**< Mouse (HID Subtype). */ +#define BLE_APPEARANCE_HID_JOYSTICK 963 /**< Joystick (HID Subtype). */ +#define BLE_APPEARANCE_HID_GAMEPAD 964 /**< Gamepad (HID Subtype). */ +#define BLE_APPEARANCE_HID_DIGITIZERSUBTYPE 965 /**< Digitizer Tablet (HID Subtype). */ +#define BLE_APPEARANCE_HID_CARD_READER 966 /**< Card Reader (HID Subtype). */ +#define BLE_APPEARANCE_HID_DIGITAL_PEN 967 /**< Digital Pen (HID Subtype). */ +#define BLE_APPEARANCE_HID_BARCODE 968 /**< Barcode Scanner (HID Subtype). */ +#define BLE_APPEARANCE_GENERIC_GLUCOSE_METER 1024 /**< Generic Glucose Meter. */ +#define BLE_APPEARANCE_GENERIC_RUNNING_WALKING_SENSOR 1088 /**< Generic Running Walking Sensor. */ +#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_IN_SHOE 1089 /**< Running Walking Sensor: In-Shoe. */ +#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_SHOE 1090 /**< Running Walking Sensor: On-Shoe. */ +#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_HIP 1091 /**< Running Walking Sensor: On-Hip. */ +#define BLE_APPEARANCE_GENERIC_CYCLING 1152 /**< Generic Cycling. */ +#define BLE_APPEARANCE_CYCLING_CYCLING_COMPUTER 1153 /**< Cycling: Cycling Computer. */ +#define BLE_APPEARANCE_CYCLING_SPEED_SENSOR 1154 /**< Cycling: Speed Sensor. */ +#define BLE_APPEARANCE_CYCLING_CADENCE_SENSOR 1155 /**< Cycling: Cadence Sensor. */ +#define BLE_APPEARANCE_CYCLING_POWER_SENSOR 1156 /**< Cycling: Power Sensor. */ +#define BLE_APPEARANCE_CYCLING_SPEED_CADENCE_SENSOR 1157 /**< Cycling: Speed and Cadence Sensor. */ +#define BLE_APPEARANCE_GENERIC_PULSE_OXIMETER 3136 /**< Generic Pulse Oximeter. */ +#define BLE_APPEARANCE_PULSE_OXIMETER_FINGERTIP 3137 /**< Fingertip (Pulse Oximeter subtype). */ +#define BLE_APPEARANCE_PULSE_OXIMETER_WRIST_WORN 3138 /**< Wrist Worn(Pulse Oximeter subtype). */ +#define BLE_APPEARANCE_GENERIC_WEIGHT_SCALE 3200 /**< Generic Weight Scale. */ +#define BLE_APPEARANCE_GENERIC_OUTDOOR_SPORTS_ACT 5184 /**< Generic Outdoor Sports Activity. */ +#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_DISP 5185 /**< Location Display Device (Outdoor Sports Activity subtype). */ +#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_DISP 5186 /**< Location and Navigation Display Device (Outdoor Sports Activity subtype). */ +#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_POD 5187 /**< Location Pod (Outdoor Sports Activity subtype). */ +#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_POD 5188 /**< Location and Navigation Pod (Outdoor Sports Activity subtype). */ +/** @} */ + +/** @brief Set .type and .uuid fields of ble_uuid_struct to specified UUID value. */ +#define BLE_UUID_BLE_ASSIGN(instance, value) do {\ + instance.type = BLE_UUID_TYPE_BLE; \ + instance.uuid = value;} while(0) + +/** @brief Copy type and uuid members from src to dst ble_uuid_t pointer. Both pointers must be valid/non-null. */ +#define BLE_UUID_COPY_PTR(dst, src) do {\ + (dst)->type = (src)->type; \ + (dst)->uuid = (src)->uuid;} while(0) + +/** @brief Copy type and uuid members from src to dst ble_uuid_t struct. */ +#define BLE_UUID_COPY_INST(dst, src) do {\ + (dst).type = (src).type; \ + (dst).uuid = (src).uuid;} while(0) + +/** @brief Compare for equality both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */ +#define BLE_UUID_EQ(p_uuid1, p_uuid2) \ + (((p_uuid1)->type == (p_uuid2)->type) && ((p_uuid1)->uuid == (p_uuid2)->uuid)) + +/** @brief Compare for difference both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */ +#define BLE_UUID_NEQ(p_uuid1, p_uuid2) \ + (((p_uuid1)->type != (p_uuid2)->type) || ((p_uuid1)->uuid != (p_uuid2)->uuid)) + +/** @} */ + +/** @addtogroup BLE_TYPES_STRUCTURES Structures + * @{ */ + +/** @brief 128 bit UUID values. */ +typedef struct +{ + uint8_t uuid128[16]; /**< Little-Endian UUID bytes. */ +} ble_uuid128_t; + +/** @brief Bluetooth Low Energy UUID type, encapsulates both 16-bit and 128-bit UUIDs. */ +typedef struct +{ + uint16_t uuid; /**< 16-bit UUID value or octets 12-13 of 128-bit UUID. */ + uint8_t type; /**< UUID type, see @ref BLE_UUID_TYPES. If type is @ref BLE_UUID_TYPE_UNKNOWN, the value of uuid is undefined. */ +} ble_uuid_t; + +/**@brief Data structure. */ +typedef struct +{ + uint8_t *p_data; /**< Pointer to the data buffer provided to/from the application. */ + uint16_t len; /**< Length of the data buffer, in bytes. */ +} ble_data_t; + +/** @} */ +#ifdef __cplusplus +} +#endif + +#endif /* BLE_TYPES_H__ */ + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf52/nrf_mbr.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf52/nrf_mbr.h new file mode 100644 index 00000000000..e0c80e278c3 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf52/nrf_mbr.h @@ -0,0 +1,242 @@ +/* + * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @defgroup nrf_mbr_api Master Boot Record API + @{ + + @brief APIs for updating SoftDevice and BootLoader + +*/ + +#ifndef NRF_MBR_H__ +#define NRF_MBR_H__ + +#include "nrf_svc.h" +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup NRF_MBR_DEFINES Defines + * @{ */ + +/**@brief MBR SVC Base number. */ +#define MBR_SVC_BASE (0x18) + +/**@brief Page size in words. */ +#define MBR_PAGE_SIZE_IN_WORDS (1024) + +/** @brief The size that must be reserved for the MBR when a SoftDevice is written to flash. +This is the offset where the first byte of the SoftDevice hex file is written.*/ +#define MBR_SIZE (0x1000) + +/** @} */ + +/** @addtogroup NRF_MBR_ENUMS Enumerations + * @{ */ + +/**@brief nRF Master Boot Record API SVC numbers. */ +enum NRF_MBR_SVCS +{ + SD_MBR_COMMAND = MBR_SVC_BASE, /**< ::sd_mbr_command */ +}; + +/**@brief Possible values for ::sd_mbr_command_t.command */ +enum NRF_MBR_COMMANDS +{ + SD_MBR_COMMAND_COPY_BL, /**< Copy a new BootLoader. @see ::sd_mbr_command_copy_bl_t*/ + SD_MBR_COMMAND_COPY_SD, /**< Copy a new SoftDevice. @see ::sd_mbr_command_copy_sd_t*/ + SD_MBR_COMMAND_INIT_SD, /**< Initialize forwarding interrupts to SD, and run reset function in SD. Does not require any parameters in ::sd_mbr_command_t params.*/ + SD_MBR_COMMAND_COMPARE, /**< This command works like memcmp. @see ::sd_mbr_command_compare_t*/ + SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET, /**< Change the address the MBR starts after a reset. @see ::sd_mbr_command_vector_table_base_set_t*/ + SD_MBR_COMMAND_RESERVED, + SD_MBR_COMMAND_IRQ_FORWARD_ADDRESS_SET, /**< Start forwarding all interrupts to this address. @see ::sd_mbr_command_irq_forward_address_set_t*/ +}; + +/** @} */ + +/** @addtogroup NRF_MBR_TYPES Types + * @{ */ + +/**@brief This command copies part of a new SoftDevice + * + * The destination area is erased before copying. + * If dst is in the middle of a flash page, that whole flash page will be erased. + * If (dst+len) is in the middle of a flash page, that whole flash page will be erased. + * + * The user of this function is responsible for setting the BPROT registers. + * + * @retval ::NRF_SUCCESS indicates that the contents of the memory blocks where copied correctly. + * @retval ::NRF_ERROR_INTERNAL indicates that the contents of the memory blocks where not verified correctly after copying. + */ +typedef struct +{ + uint32_t *src; /**< Pointer to the source of data to be copied.*/ + uint32_t *dst; /**< Pointer to the destination where the content is to be copied.*/ + uint32_t len; /**< Number of 32 bit words to copy. Must be a multiple of @ref MBR_PAGE_SIZE_IN_WORDS words.*/ +} sd_mbr_command_copy_sd_t; + + +/**@brief This command works like memcmp, but takes the length in words. + * + * @retval ::NRF_SUCCESS indicates that the contents of both memory blocks are equal. + * @retval ::NRF_ERROR_NULL indicates that the contents of the memory blocks are not equal. + */ +typedef struct +{ + uint32_t *ptr1; /**< Pointer to block of memory. */ + uint32_t *ptr2; /**< Pointer to block of memory. */ + uint32_t len; /**< Number of 32 bit words to compare.*/ +} sd_mbr_command_compare_t; + + +/**@brief This command copies a new BootLoader. + * + * With this command, destination of BootLoader is always the address written in + * NRF_UICR->BOOTADDR. + * + * Destination is erased by this function. + * If (destination+bl_len) is in the middle of a flash page, that whole flash page will be erased. + * + * This function will use the flash protect peripheral (BPROT or ACL) to protect the flash that is + * not intended to be written. + * + * On success, this function will not return. It will start the new BootLoader from reset-vector as normal. + * + * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. + * @retval ::NRF_ERROR_FORBIDDEN if NRF_UICR->BOOTADDR is not set. + * @retval ::NRF_ERROR_INVALID_LENGTH if parameters attempts to read or write outside flash area. + * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) + */ +typedef struct +{ + uint32_t *bl_src; /**< Pointer to the source of the Bootloader to be be copied.*/ + uint32_t bl_len; /**< Number of 32 bit words to copy for BootLoader. */ +} sd_mbr_command_copy_bl_t; + +/**@brief Change the address the MBR starts after a reset + * + * Once this function has been called, this address is where the MBR will start to forward + * interrupts to after a reset. + * + * To restore default forwarding this function should be called with @ref address set to 0. The + * MBR will then start forwarding interrupts to the address in NFR_UICR->BOOTADDR or to the + * SoftDevice if the BOOTADDR is not set. + * + * On success, this function will not return. It will reset the device. + * + * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. + * @retval ::NRF_ERROR_INVALID_ADDR if parameter address is outside of the flash size. + * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) + */ +typedef struct +{ + uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ +} sd_mbr_command_vector_table_base_set_t; + +/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the MBR + * + * Unlike sd_mbr_command_vector_table_base_set_t, this function does not reset, and it does not + * change where the MBR starts after reset. + * + * @retval ::NRF_SUCCESS + */ +typedef struct +{ + uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ +} sd_mbr_command_irq_forward_address_set_t; + +/**@brief Input structure containing data used when calling ::sd_mbr_command + * + * Depending on what command value that is set, the corresponding params value type must also be + * set. See @ref NRF_MBR_COMMANDS for command types and corresponding params value type. If command + * @ref SD_MBR_COMMAND_INIT_SD is set, it is not necessary to set any values under params. + */ +typedef struct +{ + uint32_t command; /**< Type of command to be issued. See @ref NRF_MBR_COMMANDS. */ + union + { + sd_mbr_command_copy_sd_t copy_sd; /**< Parameters for copy SoftDevice.*/ + sd_mbr_command_compare_t compare; /**< Parameters for verify.*/ + sd_mbr_command_copy_bl_t copy_bl; /**< Parameters for copy BootLoader. Requires parameter page. */ + sd_mbr_command_vector_table_base_set_t base_set; /**< Parameters for vector table base set. Requires parameter page.*/ + sd_mbr_command_irq_forward_address_set_t irq_forward_address_set; /**< Parameters for irq forward address set*/ + } params; /**< Command parameters. */ +} sd_mbr_command_t; + +/** @} */ + +/** @addtogroup NRF_MBR_FUNCTIONS Functions + * @{ */ + +/**@brief Issue Master Boot Record commands + * + * Commands used when updating a SoftDevice and bootloader. + * + * The @ref SD_MBR_COMMAND_COPY_BL and @ref SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET requires + * parameters to be retained by the MBR when resetting the IC. This is done in a separate flash + * page provided by the application. The UICR register UICR.NRFFW[1] must be set to an address + * corresponding to a page in the application flash space. This page will be cleared by the MBR and + * used to store the command before reset. When the UICR.NRFFW[1] field is set the page it refers + * to must not be used by the application. If the UICR.NRFFW[1] is set to 0xFFFFFFFF (the default) + * MBR commands which use flash will be unavailable and return @ref NRF_ERROR_NO_MEM. + * + * @param[in] param Pointer to a struct describing the command. + * + * @note For return values, see ::sd_mbr_command_copy_sd_t, ::sd_mbr_command_copy_bl_t, + * ::sd_mbr_command_compare_t, ::sd_mbr_command_vector_table_base_set_t, + * ::sd_mbr_command_irq_forward_address_set_t + * + * @retval ::NRF_ERROR_NO_MEM if UICR.NRFFW[1] is not set (i.e. is 0xFFFFFFFF). + * @retval ::NRF_ERROR_INVALID_PARAM if an invalid command is given. +*/ +SVCALL(SD_MBR_COMMAND, uint32_t, sd_mbr_command(sd_mbr_command_t* param)); + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // NRF_MBR_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_error.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_error.h new file mode 100644 index 00000000000..6badee98e56 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_error.h @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** + @defgroup nrf_error SoftDevice Global Error Codes + @{ + + @brief Global Error definitions +*/ + +/* Header guard */ +#ifndef NRF_ERROR_H__ +#define NRF_ERROR_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/** @defgroup NRF_ERRORS_BASE Error Codes Base number definitions + * @{ */ +#define NRF_ERROR_BASE_NUM (0x0) ///< Global error base +#define NRF_ERROR_SDM_BASE_NUM (0x1000) ///< SDM error base +#define NRF_ERROR_SOC_BASE_NUM (0x2000) ///< SoC error base +#define NRF_ERROR_STK_BASE_NUM (0x3000) ///< STK error base +/** @} */ + +#define NRF_SUCCESS (NRF_ERROR_BASE_NUM + 0) ///< Successful command +#define NRF_ERROR_SVC_HANDLER_MISSING (NRF_ERROR_BASE_NUM + 1) ///< SVC handler is missing +#define NRF_ERROR_SOFTDEVICE_NOT_ENABLED (NRF_ERROR_BASE_NUM + 2) ///< SoftDevice has not been enabled +#define NRF_ERROR_INTERNAL (NRF_ERROR_BASE_NUM + 3) ///< Internal Error +#define NRF_ERROR_NO_MEM (NRF_ERROR_BASE_NUM + 4) ///< No Memory for operation +#define NRF_ERROR_NOT_FOUND (NRF_ERROR_BASE_NUM + 5) ///< Not found +#define NRF_ERROR_NOT_SUPPORTED (NRF_ERROR_BASE_NUM + 6) ///< Not supported +#define NRF_ERROR_INVALID_PARAM (NRF_ERROR_BASE_NUM + 7) ///< Invalid Parameter +#define NRF_ERROR_INVALID_STATE (NRF_ERROR_BASE_NUM + 8) ///< Invalid state, operation disallowed in this state +#define NRF_ERROR_INVALID_LENGTH (NRF_ERROR_BASE_NUM + 9) ///< Invalid Length +#define NRF_ERROR_INVALID_FLAGS (NRF_ERROR_BASE_NUM + 10) ///< Invalid Flags +#define NRF_ERROR_INVALID_DATA (NRF_ERROR_BASE_NUM + 11) ///< Invalid Data +#define NRF_ERROR_DATA_SIZE (NRF_ERROR_BASE_NUM + 12) ///< Invalid Data size +#define NRF_ERROR_TIMEOUT (NRF_ERROR_BASE_NUM + 13) ///< Operation timed out +#define NRF_ERROR_NULL (NRF_ERROR_BASE_NUM + 14) ///< Null Pointer +#define NRF_ERROR_FORBIDDEN (NRF_ERROR_BASE_NUM + 15) ///< Forbidden Operation +#define NRF_ERROR_INVALID_ADDR (NRF_ERROR_BASE_NUM + 16) ///< Bad Memory Address +#define NRF_ERROR_BUSY (NRF_ERROR_BASE_NUM + 17) ///< Busy +#define NRF_ERROR_CONN_COUNT (NRF_ERROR_BASE_NUM + 18) ///< Maximum connection count exceeded. +#define NRF_ERROR_RESOURCES (NRF_ERROR_BASE_NUM + 19) ///< Not enough resources for operation + +#ifdef __cplusplus +} +#endif +#endif // NRF_ERROR_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_error_sdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_error_sdm.h new file mode 100644 index 00000000000..530959b9d67 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_error_sdm.h @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** + @addtogroup nrf_sdm_api + @{ + @defgroup nrf_sdm_error SoftDevice Manager Error Codes + @{ + + @brief Error definitions for the SDM API +*/ + +/* Header guard */ +#ifndef NRF_ERROR_SDM_H__ +#define NRF_ERROR_SDM_H__ + +#include "nrf_error.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN (NRF_ERROR_SDM_BASE_NUM + 0) ///< Unknown LFCLK source. +#define NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION (NRF_ERROR_SDM_BASE_NUM + 1) ///< Incorrect interrupt configuration (can be caused by using illegal priority levels, or having enabled SoftDevice interrupts). +#define NRF_ERROR_SDM_INCORRECT_CLENR0 (NRF_ERROR_SDM_BASE_NUM + 2) ///< Incorrect CLENR0 (can be caused by erroneous SoftDevice flashing). + +#ifdef __cplusplus +} +#endif +#endif // NRF_ERROR_SDM_H__ + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_error_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_error_soc.h new file mode 100644 index 00000000000..1e784b8db38 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_error_soc.h @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup nrf_soc_api + @{ + @defgroup nrf_soc_error SoC Library Error Codes + @{ + + @brief Error definitions for the SoC library + +*/ + +/* Header guard */ +#ifndef NRF_ERROR_SOC_H__ +#define NRF_ERROR_SOC_H__ + +#include "nrf_error.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* Mutex Errors */ +#define NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN (NRF_ERROR_SOC_BASE_NUM + 0) ///< Mutex already taken + +/* NVIC errors */ +#define NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE (NRF_ERROR_SOC_BASE_NUM + 1) ///< NVIC interrupt not available +#define NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED (NRF_ERROR_SOC_BASE_NUM + 2) ///< NVIC interrupt priority not allowed +#define NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN (NRF_ERROR_SOC_BASE_NUM + 3) ///< NVIC should not return + +/* Power errors */ +#define NRF_ERROR_SOC_POWER_MODE_UNKNOWN (NRF_ERROR_SOC_BASE_NUM + 4) ///< Power mode unknown +#define NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN (NRF_ERROR_SOC_BASE_NUM + 5) ///< Power POF threshold unknown +#define NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN (NRF_ERROR_SOC_BASE_NUM + 6) ///< Power off should not return + +/* Rand errors */ +#define NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES (NRF_ERROR_SOC_BASE_NUM + 7) ///< RAND not enough values + +/* PPI errors */ +#define NRF_ERROR_SOC_PPI_INVALID_CHANNEL (NRF_ERROR_SOC_BASE_NUM + 8) ///< Invalid PPI Channel +#define NRF_ERROR_SOC_PPI_INVALID_GROUP (NRF_ERROR_SOC_BASE_NUM + 9) ///< Invalid PPI Group + +#ifdef __cplusplus +} +#endif +#endif // NRF_ERROR_SOC_H__ +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_nvic.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_nvic.h new file mode 100644 index 00000000000..f5c7e8e0286 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_nvic.h @@ -0,0 +1,486 @@ +/* + * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @defgroup nrf_nvic_api SoftDevice NVIC API + * @{ + * + * @note In order to use this module, the following code has to be added to a .c file: + * \code + * nrf_nvic_state_t nrf_nvic_state = {0}; + * \endcode + * + * @note Definitions and declarations starting with __ (double underscore) in this header file are + * not intended for direct use by the application. + * + * @brief APIs for the accessing NVIC when using a SoftDevice. + * + */ + +#ifndef NRF_NVIC_H__ +#define NRF_NVIC_H__ + +#include +#include "nrf.h" +#include "nrf_svc.h" +#include "nrf_error.h" +#include "nrf_error_soc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@addtogroup NRF_NVIC_DEFINES Defines + * @{ */ + +/**@defgroup NRF_NVIC_ISER_DEFINES SoftDevice NVIC internal definitions + * @{ */ + +#define __NRF_NVIC_NVMC_IRQn (30) /**< The peripheral ID of the NVMC. IRQ numbers are used to identify peripherals, but the NVMC doesn't have an IRQ number in the MDK. */ + +#define __NRF_NVIC_ISER_COUNT (2) /**< The number of ISER/ICER registers in the NVIC that are used. */ + +/**@brief Interrupts used by the SoftDevice, with IRQn in the range 0-31. */ +#define __NRF_NVIC_SD_IRQS_0 ((uint32_t)( \ + (1U << POWER_CLOCK_IRQn) \ + | (1U << RADIO_IRQn) \ + | (1U << RTC0_IRQn) \ + | (1U << TIMER0_IRQn) \ + | (1U << RNG_IRQn) \ + | (1U << ECB_IRQn) \ + | (1U << CCM_AAR_IRQn) \ + | (1U << TEMP_IRQn) \ + | (1U << __NRF_NVIC_NVMC_IRQn) \ + | (1U << (uint32_t)SWI5_IRQn) \ + )) + +/**@brief Interrupts used by the SoftDevice, with IRQn in the range 32-63. */ +#define __NRF_NVIC_SD_IRQS_1 ((uint32_t)0) + +/**@brief Interrupts available for to application, with IRQn in the range 0-31. */ +#define __NRF_NVIC_APP_IRQS_0 (~__NRF_NVIC_SD_IRQS_0) + +/**@brief Interrupts available for to application, with IRQn in the range 32-63. */ +#define __NRF_NVIC_APP_IRQS_1 (~__NRF_NVIC_SD_IRQS_1) + +/**@} */ + +/**@} */ + +/**@addtogroup NRF_NVIC_VARIABLES Variables + * @{ */ + +/**@brief Type representing the state struct for the SoftDevice NVIC module. */ +typedef struct +{ + uint32_t volatile __irq_masks[__NRF_NVIC_ISER_COUNT]; /**< IRQs enabled by the application in the NVIC. */ + uint32_t volatile __cr_flag; /**< Non-zero if already in a critical region */ +} nrf_nvic_state_t; + +/**@brief Variable keeping the state for the SoftDevice NVIC module. This must be declared in an + * application source file. */ +extern nrf_nvic_state_t nrf_nvic_state; + +/**@} */ + +/**@addtogroup NRF_NVIC_INTERNAL_FUNCTIONS SoftDevice NVIC internal functions + * @{ */ + +/**@brief Disables IRQ interrupts globally, including the SoftDevice's interrupts. + * + * @retval The value of PRIMASK prior to disabling the interrupts. + */ +__STATIC_INLINE int __sd_nvic_irq_disable(void); + +/**@brief Enables IRQ interrupts globally, including the SoftDevice's interrupts. + */ +__STATIC_INLINE void __sd_nvic_irq_enable(void); + +/**@brief Checks if IRQn is available to application + * @param[in] IRQn IRQ to check + * + * @retval 1 (true) if the IRQ to check is available to the application + */ +__STATIC_INLINE uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn); + +/**@brief Checks if priority is available to application + * @param[in] priority priority to check + * + * @retval 1 (true) if the priority to check is available to the application + */ +__STATIC_INLINE uint32_t __sd_nvic_is_app_accessible_priority(uint32_t priority); + +/**@} */ + +/**@addtogroup NRF_NVIC_FUNCTIONS SoftDevice NVIC public functions + * @{ */ + +/**@brief Enable External Interrupt. + * @note Corresponds to NVIC_EnableIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_EnableIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt was enabled. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt has a priority not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn); + +/**@brief Disable External Interrupt. + * @note Corresponds to NVIC_DisableIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_DisableIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt was disabled. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn); + +/**@brief Get Pending Interrupt. + * @note Corresponds to NVIC_GetPendingIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_GetPendingIRQ documentation in CMSIS. + * @param[out] p_pending_irq Return value from NVIC_GetPendingIRQ. + * + * @retval ::NRF_SUCCESS The interrupt is available for the application. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq); + +/**@brief Set Pending Interrupt. + * @note Corresponds to NVIC_SetPendingIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_SetPendingIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt is set pending. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn); + +/**@brief Clear Pending Interrupt. + * @note Corresponds to NVIC_ClearPendingIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_ClearPendingIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt pending flag is cleared. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn); + +/**@brief Set Interrupt Priority. + * @note Corresponds to NVIC_SetPriority in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * @pre Priority is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_SetPriority documentation in CMSIS. + * @param[in] priority A valid IRQ priority for use by the application. + * + * @retval ::NRF_SUCCESS The interrupt and priority level is available for the application. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt priority is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority); + +/**@brief Get Interrupt Priority. + * @note Corresponds to NVIC_GetPriority in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_GetPriority documentation in CMSIS. + * @param[out] p_priority Return value from NVIC_GetPriority. + * + * @retval ::NRF_SUCCESS The interrupt priority is returned in p_priority. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE - IRQn is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority); + +/**@brief System Reset. + * @note Corresponds to NVIC_SystemReset in CMSIS. + * + * @retval ::NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN + */ +__STATIC_INLINE uint32_t sd_nvic_SystemReset(void); + +/**@brief Enter critical region. + * + * @post Application interrupts will be disabled. + * @note sd_nvic_critical_region_enter() and ::sd_nvic_critical_region_exit() must be called in matching pairs inside each + * execution context + * @sa sd_nvic_critical_region_exit + * + * @param[out] p_is_nested_critical_region If 1, the application is now in a nested critical region. + * + * @retval ::NRF_SUCCESS + */ +__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region); + +/**@brief Exit critical region. + * + * @pre Application has entered a critical region using ::sd_nvic_critical_region_enter. + * @post If not in a nested critical region, the application interrupts will restored to the state before ::sd_nvic_critical_region_enter was called. + * + * @param[in] is_nested_critical_region If this is set to 1, the critical region won't be exited. @sa sd_nvic_critical_region_enter. + * + * @retval ::NRF_SUCCESS + */ +__STATIC_INLINE uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region); + +/**@} */ + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE int __sd_nvic_irq_disable(void) +{ + int pm = __get_PRIMASK(); + __disable_irq(); + return pm; +} + +__STATIC_INLINE void __sd_nvic_irq_enable(void) +{ + __enable_irq(); +} + +__STATIC_INLINE uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn) +{ + if (IRQn < 32) + { + return ((1UL<= (1 << __NVIC_PRIO_BITS)) + { + return 0; + } + if( priority == 0 + || priority == 1 + || priority == 4 + ) + { + return 0; + } + return 1; +} + + +__STATIC_INLINE uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn) +{ + if (!__sd_nvic_app_accessible_irq(IRQn)) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } + if (!__sd_nvic_is_app_accessible_priority(NVIC_GetPriority(IRQn))) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED; + } + + if (nrf_nvic_state.__cr_flag) + { + nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] |= (uint32_t)(1 << ((uint32_t)((int32_t)IRQn) & (uint32_t)0x1F)); + } + else + { + NVIC_EnableIRQ(IRQn); + } + return NRF_SUCCESS; +} + +__STATIC_INLINE uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn) +{ + if (!__sd_nvic_app_accessible_irq(IRQn)) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } + + if (nrf_nvic_state.__cr_flag) + { + nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] &= ~(1UL << ((uint32_t)(IRQn) & 0x1F)); + } + else + { + NVIC_DisableIRQ(IRQn); + } + + return NRF_SUCCESS; +} + +__STATIC_INLINE uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq) +{ + if (__sd_nvic_app_accessible_irq(IRQn)) + { + *p_pending_irq = NVIC_GetPendingIRQ(IRQn); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } +} + +__STATIC_INLINE uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn) +{ + if (__sd_nvic_app_accessible_irq(IRQn)) + { + NVIC_SetPendingIRQ(IRQn); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } +} + +__STATIC_INLINE uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn) +{ + if (__sd_nvic_app_accessible_irq(IRQn)) + { + NVIC_ClearPendingIRQ(IRQn); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } +} + +__STATIC_INLINE uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if (!__sd_nvic_app_accessible_irq(IRQn)) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } + + if (!__sd_nvic_is_app_accessible_priority(priority)) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED; + } + + NVIC_SetPriority(IRQn, (uint32_t)priority); + return NRF_SUCCESS; +} + +__STATIC_INLINE uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority) +{ + if (__sd_nvic_app_accessible_irq(IRQn)) + { + *p_priority = (NVIC_GetPriority(IRQn) & 0xFF); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } +} + +__STATIC_INLINE uint32_t sd_nvic_SystemReset(void) +{ + NVIC_SystemReset(); + return NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN; +} + +__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region) +{ + int was_masked = __sd_nvic_irq_disable(); + if (!nrf_nvic_state.__cr_flag) + { + nrf_nvic_state.__cr_flag = 1; + nrf_nvic_state.__irq_masks[0] = ( NVIC->ICER[0] & __NRF_NVIC_APP_IRQS_0 ); + NVIC->ICER[0] = __NRF_NVIC_APP_IRQS_0; + nrf_nvic_state.__irq_masks[1] = ( NVIC->ICER[1] & __NRF_NVIC_APP_IRQS_1 ); + NVIC->ICER[1] = __NRF_NVIC_APP_IRQS_1; + *p_is_nested_critical_region = 0; + } + else + { + *p_is_nested_critical_region = 1; + } + if (!was_masked) + { + __sd_nvic_irq_enable(); + } + return NRF_SUCCESS; +} + +__STATIC_INLINE uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region) +{ + if (nrf_nvic_state.__cr_flag && (is_nested_critical_region == 0)) + { + int was_masked = __sd_nvic_irq_disable(); + NVIC->ISER[0] = nrf_nvic_state.__irq_masks[0]; + NVIC->ISER[1] = nrf_nvic_state.__irq_masks[1]; + nrf_nvic_state.__cr_flag = 0; + if (!was_masked) + { + __sd_nvic_irq_enable(); + } + } + + return NRF_SUCCESS; +} + +#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_NVIC_H__ + +/**@} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_sd_def.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_sd_def.h new file mode 100644 index 00000000000..c9ab241872e --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_sd_def.h @@ -0,0 +1,59 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_SD_DEF_H__ +#define NRF_SD_DEF_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#define SD_PPI_CHANNELS_USED 0xFFFE0000uL /**< PPI channels utilized by SotfDevice (not available to the application). */ +#define SD_PPI_GROUPS_USED 0x0000000CuL /**< PPI groups utilized by SoftDevice (not available to the application). */ +#define SD_TIMERS_USED 0x00000001uL /**< Timers used by SoftDevice. */ +#define SD_SWI_USED 0x0000003CuL /**< Software interrupts used by SoftDevice */ + + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_SD_DEF_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_sdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_sdm.h new file mode 100644 index 00000000000..8c48d936786 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_sdm.h @@ -0,0 +1,358 @@ +/* + * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @defgroup nrf_sdm_api SoftDevice Manager API + @{ + + @brief APIs for SoftDevice management. + +*/ + +#ifndef NRF_SDM_H__ +#define NRF_SDM_H__ + +#include +#include "nrf.h" +#include "nrf_svc.h" +#include "nrf_error.h" +#include "nrf_error_sdm.h" +#include "nrf_soc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup NRF_SDM_DEFINES Defines + * @{ */ +#ifdef NRFSOC_DOXYGEN +/// Declared in nrf_mbr.h +#define MBR_SIZE 0 +#warning test +#endif + +/** @brief The major version for the SoftDevice binary distributed with this header file. */ +#define SD_MAJOR_VERSION (6) + +/** @brief The minor version for the SoftDevice binary distributed with this header file. */ +#define SD_MINOR_VERSION (0) + +/** @brief The bugfix version for the SoftDevice binary distributed with this header file. */ +#define SD_BUGFIX_VERSION (0) + +/** @brief The full version number for the SoftDevice binary this header file was distributed + * with, as a decimal number in the form Mmmmbbb, where: + * - M is major version (one or more digits) + * - mmm is minor version (three digits) + * - bbb is bugfix version (three digits). */ +#define SD_VERSION (SD_MAJOR_VERSION * 1000000 + SD_MINOR_VERSION * 1000 + SD_BUGFIX_VERSION) + +/** @brief SoftDevice Manager SVC Base number. */ +#define SDM_SVC_BASE 0x10 + +/** @brief SoftDevice unique string size in bytes. */ +#define SD_UNIQUE_STR_SIZE 20 + +/** @brief Invalid info field. Returned when an info field does not exist. */ +#define SDM_INFO_FIELD_INVALID (0) + +/** @brief Defines the SoftDevice Information Structure location (address) as an offset from +the start of the SoftDevice (without MBR)*/ +#define SOFTDEVICE_INFO_STRUCT_OFFSET (0x2000) + +/** @brief Defines the absolute SoftDevice Information Structure location (address) when the + * SoftDevice is installed just above the MBR (the usual case). */ +#define SOFTDEVICE_INFO_STRUCT_ADDRESS (SOFTDEVICE_INFO_STRUCT_OFFSET + MBR_SIZE) + +/** @brief Defines the offset for the SoftDevice Information Structure size value relative to the + * SoftDevice base address. The size value is of type uint8_t. */ +#define SD_INFO_STRUCT_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET) + +/** @brief Defines the offset for the SoftDevice size value relative to the SoftDevice base address. + * The size value is of type uint32_t. */ +#define SD_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x08) + +/** @brief Defines the offset for FWID value relative to the SoftDevice base address. The FWID value + * is of type uint16_t. */ +#define SD_FWID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x0C) + +/** @brief Defines the offset for the SoftDevice ID relative to the SoftDevice base address. The ID + * is of type uint32_t. */ +#define SD_ID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x10) + +/** @brief Defines the offset for the SoftDevice version relative to the SoftDevice base address in + * the same format as @ref SD_VERSION, stored as an uint32_t. */ +#define SD_VERSION_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x14) + +/** @brief Defines the offset for the SoftDevice unique string relative to the SoftDevice base address. + * The SD_UNIQUE_STR is stored as an array of uint8_t. The size of array is @ref SD_UNIQUE_STR_SIZE. + */ +#define SD_UNIQUE_STR_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x18) + +/** @brief Defines a macro for retrieving the actual SoftDevice Information Structure size value + * from a given base address. Use @ref MBR_SIZE as the argument when the SoftDevice is + * installed just above the MBR (the usual case). */ +#define SD_INFO_STRUCT_SIZE_GET(baseaddr) (*((uint8_t *) ((baseaddr) + SD_INFO_STRUCT_SIZE_OFFSET))) + +/** @brief Defines a macro for retrieving the actual SoftDevice size value from a given base + * address. Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above + * the MBR (the usual case). */ +#define SD_SIZE_GET(baseaddr) (*((uint32_t *) ((baseaddr) + SD_SIZE_OFFSET))) + +/** @brief Defines a macro for retrieving the actual FWID value from a given base address. Use + * @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the usual + * case). */ +#define SD_FWID_GET(baseaddr) (*((uint16_t *) ((baseaddr) + SD_FWID_OFFSET))) + +/** @brief Defines a macro for retrieving the actual SoftDevice ID from a given base address. Use + * @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the + * usual case). */ +#define SD_ID_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_ID_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ + ? (*((uint32_t *) ((baseaddr) + SD_ID_OFFSET))) : SDM_INFO_FIELD_INVALID) + +/** @brief Defines a macro for retrieving the actual SoftDevice version from a given base address. + * Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR + * (the usual case). */ +#define SD_VERSION_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_VERSION_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ + ? (*((uint32_t *) ((baseaddr) + SD_VERSION_OFFSET))) : SDM_INFO_FIELD_INVALID) + +/** @brief Defines a macro for retrieving the address of SoftDevice unique str based on a given base address. + * Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR + * (the usual case). */ +#define SD_UNIQUE_STR_ADDR_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_UNIQUE_STR_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ + ? (((uint8_t *) ((baseaddr) + SD_UNIQUE_STR_OFFSET))) : SDM_INFO_FIELD_INVALID) + +/**@defgroup NRF_FAULT_ID_RANGES Fault ID ranges + * @{ */ +#define NRF_FAULT_ID_SD_RANGE_START 0x00000000 /**< SoftDevice ID range start. */ +#define NRF_FAULT_ID_APP_RANGE_START 0x00001000 /**< Application ID range start. */ +/**@} */ + +/**@defgroup NRF_FAULT_IDS Fault ID types + * @{ */ +#define NRF_FAULT_ID_SD_ASSERT (NRF_FAULT_ID_SD_RANGE_START + 1) /**< SoftDevice assertion. The info parameter is reserved for future used. */ +#define NRF_FAULT_ID_APP_MEMACC (NRF_FAULT_ID_APP_RANGE_START + 1) /**< Application invalid memory access. The info parameter will contain 0x00000000, + in case of SoftDevice RAM access violation. In case of SoftDevice peripheral + register violation the info parameter will contain the sub-region number of + PREGION[0], on whose address range the disallowed write access caused the + memory access fault. */ +/**@} */ + +/** @} */ + +/** @addtogroup NRF_SDM_ENUMS Enumerations + * @{ */ + +/**@brief nRF SoftDevice Manager API SVC numbers. */ +enum NRF_SD_SVCS +{ + SD_SOFTDEVICE_ENABLE = SDM_SVC_BASE, /**< ::sd_softdevice_enable */ + SD_SOFTDEVICE_DISABLE, /**< ::sd_softdevice_disable */ + SD_SOFTDEVICE_IS_ENABLED, /**< ::sd_softdevice_is_enabled */ + SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, /**< ::sd_softdevice_vector_table_base_set */ + SVC_SDM_LAST /**< Placeholder for last SDM SVC */ +}; + +/** @} */ + +/** @addtogroup NRF_SDM_DEFINES Defines + * @{ */ + +/**@defgroup NRF_CLOCK_LF_ACCURACY Clock accuracy + * @{ */ + +#define NRF_CLOCK_LF_ACCURACY_250_PPM (0) /**< Default: 250 ppm */ +#define NRF_CLOCK_LF_ACCURACY_500_PPM (1) /**< 500 ppm */ +#define NRF_CLOCK_LF_ACCURACY_150_PPM (2) /**< 150 ppm */ +#define NRF_CLOCK_LF_ACCURACY_100_PPM (3) /**< 100 ppm */ +#define NRF_CLOCK_LF_ACCURACY_75_PPM (4) /**< 75 ppm */ +#define NRF_CLOCK_LF_ACCURACY_50_PPM (5) /**< 50 ppm */ +#define NRF_CLOCK_LF_ACCURACY_30_PPM (6) /**< 30 ppm */ +#define NRF_CLOCK_LF_ACCURACY_20_PPM (7) /**< 20 ppm */ +#define NRF_CLOCK_LF_ACCURACY_10_PPM (8) /**< 10 ppm */ +#define NRF_CLOCK_LF_ACCURACY_5_PPM (9) /**< 5 ppm */ +#define NRF_CLOCK_LF_ACCURACY_2_PPM (10) /**< 2 ppm */ +#define NRF_CLOCK_LF_ACCURACY_1_PPM (11) /**< 1 ppm */ + +/** @} */ + +/**@defgroup NRF_CLOCK_LF_SRC Possible LFCLK oscillator sources + * @{ */ + +#define NRF_CLOCK_LF_SRC_RC (0) /**< LFCLK RC oscillator. */ +#define NRF_CLOCK_LF_SRC_XTAL (1) /**< LFCLK crystal oscillator. */ +#define NRF_CLOCK_LF_SRC_SYNTH (2) /**< LFCLK Synthesized from HFCLK. */ + +/** @} */ + +/** @} */ + +/** @addtogroup NRF_SDM_TYPES Types + * @{ */ + +/**@brief Type representing LFCLK oscillator source. */ +typedef struct +{ + uint8_t source; /**< LF oscillator clock source, see @ref NRF_CLOCK_LF_SRC. */ + uint8_t rc_ctiv; /**< Only for ::NRF_CLOCK_LF_SRC_RC: Calibration timer interval in 1/4 second + units (nRF52: 1-32). + @note To avoid excessive clock drift, 0.5 degrees Celsius is the + maximum temperature change allowed in one calibration timer + interval. The interval should be selected to ensure this. + + @note Must be 0 if source is not ::NRF_CLOCK_LF_SRC_RC. */ + uint8_t rc_temp_ctiv; /**< Only for ::NRF_CLOCK_LF_SRC_RC: How often (in number of calibration + intervals) the RC oscillator shall be calibrated if the temperature + hasn't changed. + 0: Always calibrate even if the temperature hasn't changed. + 1: Only calibrate if the temperature has changed (legacy - nRF51 only). + 2-33: Check the temperature and only calibrate if it has changed, + however calibration will take place every rc_temp_ctiv + intervals in any case. + + @note Must be 0 if source is not ::NRF_CLOCK_LF_SRC_RC. + + @note For nRF52, the application must ensure calibration at least once + every 8 seconds to ensure +/-500 ppm clock stability. The + recommended configuration for ::NRF_CLOCK_LF_SRC_RC on nRF52 is + rc_ctiv=16 and rc_temp_ctiv=2. This will ensure calibration at + least once every 8 seconds and for temperature changes of 0.5 + degrees Celsius every 4 seconds. See the Product Specification + for the nRF52 device being used for more information.*/ + uint8_t accuracy; /**< External clock accuracy used in the LL to compute timing + windows, see @ref NRF_CLOCK_LF_ACCURACY.*/ +} nrf_clock_lf_cfg_t; + +/**@brief Fault Handler type. + * + * When certain unrecoverable errors occur within the application or SoftDevice the fault handler will be called back. + * The protocol stack will be in an undefined state when this happens and the only way to recover will be to + * perform a reset, using e.g. CMSIS NVIC_SystemReset(). + * If the application returns from the fault handler the SoftDevice will call NVIC_SystemReset(). + * + * @note This callback is executed in HardFault context, thus SVC functions cannot be called from the fault callback. + * + * @param[in] id Fault identifier. See @ref NRF_FAULT_IDS. + * @param[in] pc The program counter of the instruction that triggered the fault. + * @param[in] info Optional additional information regarding the fault. Refer to each Fault identifier for details. + * + * @note When id is set to @ref NRF_FAULT_ID_APP_MEMACC, pc will contain the address of the instruction being executed at the time when + * the fault is detected by the CPU. The CPU program counter may have advanced up to 2 instructions (no branching) after the one that triggered the fault. + */ +typedef void (*nrf_fault_handler_t)(uint32_t id, uint32_t pc, uint32_t info); + +/** @} */ + +/** @addtogroup NRF_SDM_FUNCTIONS Functions + * @{ */ + +/**@brief Enables the SoftDevice and by extension the protocol stack. + * + * @note Some care must be taken if a low frequency clock source is already running when calling this function: + * If the LF clock has a different source then the one currently running, it will be stopped. Then, the new + * clock source will be started. + * + * @note This function has no effect when returning with an error. + * + * @post If return code is ::NRF_SUCCESS + * - SoC library and protocol stack APIs are made available. + * - A portion of RAM will be unavailable (see relevant SDS documentation). + * - Some peripherals will be unavailable or available only through the SoC API (see relevant SDS documentation). + * - Interrupts will not arrive from protected peripherals or interrupts. + * - nrf_nvic_ functions must be used instead of CMSIS NVIC_ functions for reliable usage of the SoftDevice. + * - Interrupt latency may be affected by the SoftDevice (see relevant SDS documentation). + * - Chosen low frequency clock source will be running. + * + * @param p_clock_lf_cfg Low frequency clock source and accuracy. + If NULL the clock will be configured as an RC source with rc_ctiv = 16 and .rc_temp_ctiv = 2 + In the case of XTAL source, the PPM accuracy of the chosen clock source must be greater than or equal to the actual characteristics of your XTAL clock. + * @param fault_handler Callback to be invoked in case of fault, cannot be NULL. + * + * @retval ::NRF_SUCCESS + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE SoftDevice is already enabled, and the clock source and fault handler cannot be updated. + * @retval ::NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION SoftDevice interrupt is already enabled, or an enabled interrupt has an illegal priority level. + * @retval ::NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN Unknown low frequency clock source selected. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid clock source configuration supplied in p_clock_lf_cfg. + */ +SVCALL(SD_SOFTDEVICE_ENABLE, uint32_t, sd_softdevice_enable(nrf_clock_lf_cfg_t const * p_clock_lf_cfg, nrf_fault_handler_t fault_handler)); + + +/**@brief Disables the SoftDevice and by extension the protocol stack. + * + * Idempotent function to disable the SoftDevice. + * + * @post SoC library and protocol stack APIs are made unavailable. + * @post All interrupts that was protected by the SoftDevice will be disabled and initialized to priority 0 (highest). + * @post All peripherals used by the SoftDevice will be reset to default values. + * @post All of RAM become available. + * @post All interrupts are forwarded to the application. + * @post LFCLK source chosen in ::sd_softdevice_enable will be left running. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_SOFTDEVICE_DISABLE, uint32_t, sd_softdevice_disable(void)); + +/**@brief Check if the SoftDevice is enabled. + * + * @param[out] p_softdevice_enabled If the SoftDevice is enabled: 1 else 0. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_SOFTDEVICE_IS_ENABLED, uint32_t, sd_softdevice_is_enabled(uint8_t * p_softdevice_enabled)); + +/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the SoftDevice + * + * This function is only intended to be called when a bootloader is enabled. + * + * @param[in] address The base address of the interrupt vector table for forwarded interrupts. + + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, uint32_t, sd_softdevice_vector_table_base_set(uint32_t address)); + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // NRF_SDM_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_soc.h new file mode 100644 index 00000000000..3fa177281eb --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_soc.h @@ -0,0 +1,1036 @@ +/* + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @defgroup nrf_soc_api SoC Library API + * @{ + * + * @brief APIs for the SoC library. + * + */ + +#ifndef NRF_SOC_H__ +#define NRF_SOC_H__ + +#include +#include "nrf.h" +#include "nrf_svc.h" +#include "nrf_error.h" +#include "nrf_error_soc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@addtogroup NRF_SOC_DEFINES Defines + * @{ */ + +/**@brief The number of the lowest SVC number reserved for the SoC library. */ +#define SOC_SVC_BASE (0x20) /**< Base value for SVCs that are available when the SoftDevice is disabled. */ +#define SOC_SVC_BASE_NOT_AVAILABLE (0x2C) /**< Base value for SVCs that are not available when the SoftDevice is disabled. */ + +/**@brief Guaranteed time for application to process radio inactive notification. */ +#define NRF_RADIO_NOTIFICATION_INACTIVE_GUARANTEED_TIME_US (62) + +/**@brief The minimum allowed timeslot extension time. */ +#define NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US (200) + +/**@brief The maximum processing time to handle a timeslot extension. */ +#define NRF_RADIO_MAX_EXTENSION_PROCESSING_TIME_US (17) + +/**@brief The latest time before the end of a timeslot the timeslot can be extended. */ +#define NRF_RADIO_MIN_EXTENSION_MARGIN_US (79) + +#define SOC_ECB_KEY_LENGTH (16) /**< ECB key length. */ +#define SOC_ECB_CLEARTEXT_LENGTH (16) /**< ECB cleartext length. */ +#define SOC_ECB_CIPHERTEXT_LENGTH (SOC_ECB_CLEARTEXT_LENGTH) /**< ECB ciphertext length. */ + +#define SD_EVT_IRQn (SWI2_IRQn) /**< SoftDevice Event IRQ number. Used for both protocol events and SoC events. */ +#define SD_EVT_IRQHandler (SWI2_IRQHandler) /**< SoftDevice Event IRQ handler. Used for both protocol events and SoC events. + The default interrupt priority for this handler is set to 4 */ +#define RADIO_NOTIFICATION_IRQn (SWI1_IRQn) /**< The radio notification IRQ number. */ +#define RADIO_NOTIFICATION_IRQHandler (SWI1_IRQHandler) /**< The radio notification IRQ handler. + The default interrupt priority for this handler is set to 4 */ +#define NRF_RADIO_LENGTH_MIN_US (100) /**< The shortest allowed radio timeslot, in microseconds. */ +#define NRF_RADIO_LENGTH_MAX_US (100000) /**< The longest allowed radio timeslot, in microseconds. */ + +#define NRF_RADIO_DISTANCE_MAX_US (128000000UL - 1UL) /**< The longest timeslot distance, in microseconds, allowed for the distance parameter (see @ref nrf_radio_request_normal_t) in the request. */ + +#define NRF_RADIO_EARLIEST_TIMEOUT_MAX_US (128000000UL - 1UL) /**< The longest timeout, in microseconds, allowed when requesting the earliest possible timeslot. */ + +#define NRF_RADIO_START_JITTER_US (2) /**< The maximum jitter in @ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START relative to the requested start time. */ + +/**@} */ + +/**@addtogroup NRF_SOC_ENUMS Enumerations + * @{ */ + +/**@brief The SVC numbers used by the SVC functions in the SoC library. */ +enum NRF_SOC_SVCS +{ + SD_PPI_CHANNEL_ENABLE_GET = SOC_SVC_BASE, + SD_PPI_CHANNEL_ENABLE_SET = SOC_SVC_BASE + 1, + SD_PPI_CHANNEL_ENABLE_CLR = SOC_SVC_BASE + 2, + SD_PPI_CHANNEL_ASSIGN = SOC_SVC_BASE + 3, + SD_PPI_GROUP_TASK_ENABLE = SOC_SVC_BASE + 4, + SD_PPI_GROUP_TASK_DISABLE = SOC_SVC_BASE + 5, + SD_PPI_GROUP_ASSIGN = SOC_SVC_BASE + 6, + SD_PPI_GROUP_GET = SOC_SVC_BASE + 7, + SD_FLASH_PAGE_ERASE = SOC_SVC_BASE + 8, + SD_FLASH_WRITE = SOC_SVC_BASE + 9, + SD_PROTECTED_REGISTER_WRITE = SOC_SVC_BASE + 11, + SD_MUTEX_NEW = SOC_SVC_BASE_NOT_AVAILABLE, + SD_MUTEX_ACQUIRE = SOC_SVC_BASE_NOT_AVAILABLE + 1, + SD_MUTEX_RELEASE = SOC_SVC_BASE_NOT_AVAILABLE + 2, + SD_RAND_APPLICATION_POOL_CAPACITY_GET = SOC_SVC_BASE_NOT_AVAILABLE + 3, + SD_RAND_APPLICATION_BYTES_AVAILABLE_GET = SOC_SVC_BASE_NOT_AVAILABLE + 4, + SD_RAND_APPLICATION_VECTOR_GET = SOC_SVC_BASE_NOT_AVAILABLE + 5, + SD_POWER_MODE_SET = SOC_SVC_BASE_NOT_AVAILABLE + 6, + SD_POWER_SYSTEM_OFF = SOC_SVC_BASE_NOT_AVAILABLE + 7, + SD_POWER_RESET_REASON_GET = SOC_SVC_BASE_NOT_AVAILABLE + 8, + SD_POWER_RESET_REASON_CLR = SOC_SVC_BASE_NOT_AVAILABLE + 9, + SD_POWER_POF_ENABLE = SOC_SVC_BASE_NOT_AVAILABLE + 10, + SD_POWER_POF_THRESHOLD_SET = SOC_SVC_BASE_NOT_AVAILABLE + 11, + SD_POWER_POF_THRESHOLDVDDH_SET = SOC_SVC_BASE_NOT_AVAILABLE + 12, + SD_POWER_RAM_POWER_SET = SOC_SVC_BASE_NOT_AVAILABLE + 13, + SD_POWER_RAM_POWER_CLR = SOC_SVC_BASE_NOT_AVAILABLE + 14, + SD_POWER_RAM_POWER_GET = SOC_SVC_BASE_NOT_AVAILABLE + 15, + SD_POWER_GPREGRET_SET = SOC_SVC_BASE_NOT_AVAILABLE + 16, + SD_POWER_GPREGRET_CLR = SOC_SVC_BASE_NOT_AVAILABLE + 17, + SD_POWER_GPREGRET_GET = SOC_SVC_BASE_NOT_AVAILABLE + 18, + SD_POWER_DCDC_MODE_SET = SOC_SVC_BASE_NOT_AVAILABLE + 19, + SD_POWER_DCDC0_MODE_SET = SOC_SVC_BASE_NOT_AVAILABLE + 20, + SD_APP_EVT_WAIT = SOC_SVC_BASE_NOT_AVAILABLE + 21, + SD_CLOCK_HFCLK_REQUEST = SOC_SVC_BASE_NOT_AVAILABLE + 22, + SD_CLOCK_HFCLK_RELEASE = SOC_SVC_BASE_NOT_AVAILABLE + 23, + SD_CLOCK_HFCLK_IS_RUNNING = SOC_SVC_BASE_NOT_AVAILABLE + 24, + SD_RADIO_NOTIFICATION_CFG_SET = SOC_SVC_BASE_NOT_AVAILABLE + 25, + SD_ECB_BLOCK_ENCRYPT = SOC_SVC_BASE_NOT_AVAILABLE + 26, + SD_ECB_BLOCKS_ENCRYPT = SOC_SVC_BASE_NOT_AVAILABLE + 27, + SD_RADIO_SESSION_OPEN = SOC_SVC_BASE_NOT_AVAILABLE + 28, + SD_RADIO_SESSION_CLOSE = SOC_SVC_BASE_NOT_AVAILABLE + 29, + SD_RADIO_REQUEST = SOC_SVC_BASE_NOT_AVAILABLE + 30, + SD_EVT_GET = SOC_SVC_BASE_NOT_AVAILABLE + 31, + SD_TEMP_GET = SOC_SVC_BASE_NOT_AVAILABLE + 32, + SD_POWER_USBPWRRDY_ENABLE = SOC_SVC_BASE_NOT_AVAILABLE + 33, + SD_POWER_USBDETECTED_ENABLE = SOC_SVC_BASE_NOT_AVAILABLE + 34, + SD_POWER_USBREMOVED_ENABLE = SOC_SVC_BASE_NOT_AVAILABLE + 35, + SD_POWER_USBREGSTATUS_GET = SOC_SVC_BASE_NOT_AVAILABLE + 36, + SVC_SOC_LAST = SOC_SVC_BASE_NOT_AVAILABLE + 37 +}; + +/**@brief Possible values of a ::nrf_mutex_t. */ +enum NRF_MUTEX_VALUES +{ + NRF_MUTEX_FREE, + NRF_MUTEX_TAKEN +}; + +/**@brief Power modes. */ +enum NRF_POWER_MODES +{ + NRF_POWER_MODE_CONSTLAT, /**< Constant latency mode. See power management in the reference manual. */ + NRF_POWER_MODE_LOWPWR /**< Low power mode. See power management in the reference manual. */ +}; + + +/**@brief Power failure thresholds */ +enum NRF_POWER_THRESHOLDS +{ + NRF_POWER_THRESHOLD_V17 = 4UL, /**< 1.7 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V18, /**< 1.8 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V19, /**< 1.9 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V20, /**< 2.0 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V21, /**< 2.1 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V22, /**< 2.2 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V23, /**< 2.3 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V24, /**< 2.4 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V25, /**< 2.5 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V26, /**< 2.6 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V27, /**< 2.7 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V28 /**< 2.8 Volts power failure threshold. */ +}; + +/**@brief Power failure thresholds for high voltage */ +enum NRF_POWER_THRESHOLDVDDHS +{ + NRF_POWER_THRESHOLDVDDH_V27, /**< 2.7 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V28, /**< 2.8 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V29, /**< 2.9 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V30, /**< 3.0 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V31, /**< 3.1 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V32, /**< 3.2 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V33, /**< 3.3 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V34, /**< 3.4 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V35, /**< 3.5 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V36, /**< 3.6 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V37, /**< 3.7 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V38, /**< 3.8 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V39, /**< 3.9 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V40, /**< 4.0 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V41, /**< 4.1 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V42 /**< 4.2 Volts power failure threshold. */ +}; + + +/**@brief DC/DC converter modes. */ +enum NRF_POWER_DCDC_MODES +{ + NRF_POWER_DCDC_DISABLE, /**< The DCDC is disabled. */ + NRF_POWER_DCDC_ENABLE /**< The DCDC is enabled. */ +}; + +/**@brief Radio notification distances. */ +enum NRF_RADIO_NOTIFICATION_DISTANCES +{ + NRF_RADIO_NOTIFICATION_DISTANCE_NONE = 0, /**< The event does not have a notification. */ + NRF_RADIO_NOTIFICATION_DISTANCE_800US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_1740US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_2680US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_3620US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_4560US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_5500US /**< The distance from the active notification to start of radio activity. */ +}; + + +/**@brief Radio notification types. */ +enum NRF_RADIO_NOTIFICATION_TYPES +{ + NRF_RADIO_NOTIFICATION_TYPE_NONE = 0, /**< The event does not have a radio notification signal. */ + NRF_RADIO_NOTIFICATION_TYPE_INT_ON_ACTIVE, /**< Using interrupt for notification when the radio will be enabled. */ + NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE, /**< Using interrupt for notification when the radio has been disabled. */ + NRF_RADIO_NOTIFICATION_TYPE_INT_ON_BOTH, /**< Using interrupt for notification both when the radio will be enabled and disabled. */ +}; + +/**@brief The Radio signal callback types. */ +enum NRF_RADIO_CALLBACK_SIGNAL_TYPE +{ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_START, /**< This signal indicates the start of the radio timeslot. */ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_TIMER0, /**< This signal indicates the NRF_TIMER0 interrupt. */ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_RADIO, /**< This signal indicates the NRF_RADIO interrupt. */ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_EXTEND_FAILED, /**< This signal indicates extend action failed. */ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_EXTEND_SUCCEEDED /**< This signal indicates extend action succeeded. */ +}; + +/**@brief The actions requested by the signal callback. + * + * This code gives the SOC instructions about what action to take when the signal callback has + * returned. + */ +enum NRF_RADIO_SIGNAL_CALLBACK_ACTION +{ + NRF_RADIO_SIGNAL_CALLBACK_ACTION_NONE, /**< Return without action. */ + NRF_RADIO_SIGNAL_CALLBACK_ACTION_EXTEND, /**< Request an extension of the current + timeslot. Maximum execution time for this action: + @ref NRF_RADIO_MAX_EXTENSION_PROCESSING_TIME_US. + This action must be started at least + @ref NRF_RADIO_MIN_EXTENSION_MARGIN_US before + the end of the timeslot. */ + NRF_RADIO_SIGNAL_CALLBACK_ACTION_END, /**< End the current radio timeslot. */ + NRF_RADIO_SIGNAL_CALLBACK_ACTION_REQUEST_AND_END /**< Request a new radio timeslot and end the current timeslot. */ +}; + +/**@brief Radio timeslot high frequency clock source configuration. */ +enum NRF_RADIO_HFCLK_CFG +{ + NRF_RADIO_HFCLK_CFG_XTAL_GUARANTEED, /**< The SoftDevice will guarantee that the high frequency clock source is the + external crystal for the whole duration of the timeslot. This should be the + preferred option for events that use the radio or require high timing accuracy. + @note The SoftDevice will automatically turn on and off the external crystal, + at the beginning and end of the timeslot, respectively. The crystal may also + intentionally be left running after the timeslot, in cases where it is needed + by the SoftDevice shortly after the end of the timeslot. */ + NRF_RADIO_HFCLK_CFG_NO_GUARANTEE /**< This configuration allows for earlier and tighter scheduling of timeslots. + The RC oscillator may be the clock source in part or for the whole duration of the timeslot. + The RC oscillator's accuracy must therefore be taken into consideration. + @note If the application will use the radio peripheral in timeslots with this configuration, + it must make sure that the crystal is running and stable before starting the radio. */ +}; + +/**@brief Radio timeslot priorities. */ +enum NRF_RADIO_PRIORITY +{ + NRF_RADIO_PRIORITY_HIGH, /**< High (equal priority as the normal connection priority of the SoftDevice stack(s)). */ + NRF_RADIO_PRIORITY_NORMAL, /**< Normal (equal priority as the priority of secondary activities of the SoftDevice stack(s)). */ +}; + +/**@brief Radio timeslot request type. */ +enum NRF_RADIO_REQUEST_TYPE +{ + NRF_RADIO_REQ_TYPE_EARLIEST, /**< Request radio timeslot as early as possible. This should always be used for the first request in a session. */ + NRF_RADIO_REQ_TYPE_NORMAL /**< Normal radio timeslot request. */ +}; + +/**@brief SoC Events. */ +enum NRF_SOC_EVTS +{ + NRF_EVT_HFCLKSTARTED, /**< Event indicating that the HFCLK has started. */ + NRF_EVT_POWER_FAILURE_WARNING, /**< Event indicating that a power failure warning has occurred. */ + NRF_EVT_FLASH_OPERATION_SUCCESS, /**< Event indicating that the ongoing flash operation has completed successfully. */ + NRF_EVT_FLASH_OPERATION_ERROR, /**< Event indicating that the ongoing flash operation has timed out with an error. */ + NRF_EVT_RADIO_BLOCKED, /**< Event indicating that a radio timeslot was blocked. */ + NRF_EVT_RADIO_CANCELED, /**< Event indicating that a radio timeslot was canceled by SoftDevice. */ + NRF_EVT_RADIO_SIGNAL_CALLBACK_INVALID_RETURN, /**< Event indicating that a radio timeslot signal callback handler return was invalid. */ + NRF_EVT_RADIO_SESSION_IDLE, /**< Event indicating that a radio timeslot session is idle. */ + NRF_EVT_RADIO_SESSION_CLOSED, /**< Event indicating that a radio timeslot session is closed. */ + NRF_EVT_POWER_USB_POWER_READY, /**< Event indicating that a USB 3.3 V supply is ready. */ + NRF_EVT_POWER_USB_DETECTED, /**< Event indicating that voltage supply is detected on VBUS. */ + NRF_EVT_POWER_USB_REMOVED, /**< Event indicating that voltage supply is removed from VBUS. */ + NRF_EVT_NUMBER_OF_EVTS +}; + +/**@} */ + + +/**@addtogroup NRF_SOC_STRUCTURES Structures + * @{ */ + +/**@brief Represents a mutex for use with the nrf_mutex functions. + * @note Accessing the value directly is not safe, use the mutex functions! + */ +typedef volatile uint8_t nrf_mutex_t; + +/**@brief Parameters for a request for a timeslot as early as possible. */ +typedef struct +{ + uint8_t hfclk; /**< High frequency clock source, see @ref NRF_RADIO_HFCLK_CFG. */ + uint8_t priority; /**< The radio timeslot priority, see @ref NRF_RADIO_PRIORITY. */ + uint32_t length_us; /**< The radio timeslot length (in the range 100 to 100,000] microseconds). */ + uint32_t timeout_us; /**< Longest acceptable delay until the start of the requested timeslot (up to @ref NRF_RADIO_EARLIEST_TIMEOUT_MAX_US microseconds). */ +} nrf_radio_request_earliest_t; + +/**@brief Parameters for a normal radio timeslot request. */ +typedef struct +{ + uint8_t hfclk; /**< High frequency clock source, see @ref NRF_RADIO_HFCLK_CFG. */ + uint8_t priority; /**< The radio timeslot priority, see @ref NRF_RADIO_PRIORITY. */ + uint32_t distance_us; /**< Distance from the start of the previous radio timeslot (up to @ref NRF_RADIO_DISTANCE_MAX_US microseconds). */ + uint32_t length_us; /**< The radio timeslot length (in the range [100..100,000] microseconds). */ +} nrf_radio_request_normal_t; + +/**@brief Radio timeslot request parameters. */ +typedef struct +{ + uint8_t request_type; /**< Type of request, see @ref NRF_RADIO_REQUEST_TYPE. */ + union + { + nrf_radio_request_earliest_t earliest; /**< Parameters for requesting a radio timeslot as early as possible. */ + nrf_radio_request_normal_t normal; /**< Parameters for requesting a normal radio timeslot. */ + } params; /**< Parameter union. */ +} nrf_radio_request_t; + +/**@brief Return parameters of the radio timeslot signal callback. */ +typedef struct +{ + uint8_t callback_action; /**< The action requested by the application when returning from the signal callback, see @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION. */ + union + { + struct + { + nrf_radio_request_t * p_next; /**< The request parameters for the next radio timeslot. */ + } request; /**< Additional parameters for return_code @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION_REQUEST_AND_END. */ + struct + { + uint32_t length_us; /**< Requested extension of the radio timeslot duration (microseconds) (for minimum time see @ref NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US). */ + } extend; /**< Additional parameters for return_code @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION_EXTEND. */ + } params; /**< Parameter union. */ +} nrf_radio_signal_callback_return_param_t; + +/**@brief The radio timeslot signal callback type. + * + * @note In case of invalid return parameters, the radio timeslot will automatically end + * immediately after returning from the signal callback and the + * @ref NRF_EVT_RADIO_SIGNAL_CALLBACK_INVALID_RETURN event will be sent. + * @note The returned struct pointer must remain valid after the signal callback + * function returns. For instance, this means that it must not point to a stack variable. + * + * @param[in] signal_type Type of signal, see @ref NRF_RADIO_CALLBACK_SIGNAL_TYPE. + * + * @return Pointer to structure containing action requested by the application. + */ +typedef nrf_radio_signal_callback_return_param_t * (*nrf_radio_signal_callback_t) (uint8_t signal_type); + +/**@brief AES ECB parameter typedefs */ +typedef uint8_t soc_ecb_key_t[SOC_ECB_KEY_LENGTH]; /**< Encryption key type. */ +typedef uint8_t soc_ecb_cleartext_t[SOC_ECB_CLEARTEXT_LENGTH]; /**< Cleartext data type. */ +typedef uint8_t soc_ecb_ciphertext_t[SOC_ECB_CIPHERTEXT_LENGTH]; /**< Ciphertext data type. */ + +/**@brief AES ECB data structure */ +typedef struct +{ + soc_ecb_key_t key; /**< Encryption key. */ + soc_ecb_cleartext_t cleartext; /**< Cleartext data. */ + soc_ecb_ciphertext_t ciphertext; /**< Ciphertext data. */ +} nrf_ecb_hal_data_t; + +/**@brief AES ECB block. Used to provide multiple blocks in a single call + to @ref sd_ecb_blocks_encrypt.*/ +typedef struct +{ + soc_ecb_key_t const * p_key; /**< Pointer to the Encryption key. */ + soc_ecb_cleartext_t const * p_cleartext; /**< Pointer to the Cleartext data. */ + soc_ecb_ciphertext_t * p_ciphertext; /**< Pointer to the Ciphertext data. */ +} nrf_ecb_hal_data_block_t; + +/**@} */ + +/**@addtogroup NRF_SOC_FUNCTIONS Functions + * @{ */ + +/**@brief Initialize a mutex. + * + * @param[in] p_mutex Pointer to the mutex to initialize. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_MUTEX_NEW, uint32_t, sd_mutex_new(nrf_mutex_t * p_mutex)); + +/**@brief Attempt to acquire a mutex. + * + * @param[in] p_mutex Pointer to the mutex to acquire. + * + * @retval ::NRF_SUCCESS The mutex was successfully acquired. + * @retval ::NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN The mutex could not be acquired. + */ +SVCALL(SD_MUTEX_ACQUIRE, uint32_t, sd_mutex_acquire(nrf_mutex_t * p_mutex)); + +/**@brief Release a mutex. + * + * @param[in] p_mutex Pointer to the mutex to release. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_MUTEX_RELEASE, uint32_t, sd_mutex_release(nrf_mutex_t * p_mutex)); + +/**@brief Query the capacity of the application random pool. + * + * @param[out] p_pool_capacity The capacity of the pool. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_RAND_APPLICATION_POOL_CAPACITY_GET, uint32_t, sd_rand_application_pool_capacity_get(uint8_t * p_pool_capacity)); + +/**@brief Get number of random bytes available to the application. + * + * @param[out] p_bytes_available The number of bytes currently available in the pool. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_RAND_APPLICATION_BYTES_AVAILABLE_GET, uint32_t, sd_rand_application_bytes_available_get(uint8_t * p_bytes_available)); + +/**@brief Get random bytes from the application pool. + * + * @param[out] p_buff Pointer to unit8_t buffer for storing the bytes. + * @param[in] length Number of bytes to take from pool and place in p_buff. + * + * @retval ::NRF_SUCCESS The requested bytes were written to p_buff. + * @retval ::NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES No bytes were written to the buffer, because there were not enough bytes available. +*/ +SVCALL(SD_RAND_APPLICATION_VECTOR_GET, uint32_t, sd_rand_application_vector_get(uint8_t * p_buff, uint8_t length)); + +/**@brief Gets the reset reason register. + * + * @param[out] p_reset_reason Contents of the NRF_POWER->RESETREAS register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RESET_REASON_GET, uint32_t, sd_power_reset_reason_get(uint32_t * p_reset_reason)); + +/**@brief Clears the bits of the reset reason register. + * + * @param[in] reset_reason_clr_msk Contains the bits to clear from the reset reason register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RESET_REASON_CLR, uint32_t, sd_power_reset_reason_clr(uint32_t reset_reason_clr_msk)); + +/**@brief Sets the power mode when in CPU sleep. + * + * @param[in] power_mode The power mode to use when in CPU sleep, see @ref NRF_POWER_MODES. @sa sd_app_evt_wait + * + * @retval ::NRF_SUCCESS The power mode was set. + * @retval ::NRF_ERROR_SOC_POWER_MODE_UNKNOWN The power mode was unknown. + */ +SVCALL(SD_POWER_MODE_SET, uint32_t, sd_power_mode_set(uint8_t power_mode)); + +/**@brief Puts the chip in System OFF mode. + * + * @retval ::NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN + */ +SVCALL(SD_POWER_SYSTEM_OFF, uint32_t, sd_power_system_off(void)); + +/**@brief Enables or disables the power-fail comparator. + * + * Enabling this will give a SoftDevice event (NRF_EVT_POWER_FAILURE_WARNING) when the power failure warning occurs. + * The event can be retrieved with sd_evt_get(); + * + * @param[in] pof_enable True if the power-fail comparator should be enabled, false if it should be disabled. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_POF_ENABLE, uint32_t, sd_power_pof_enable(uint8_t pof_enable)); + +/**@brief Enables or disables the USB power ready event. + * + * Enabling this will give a SoftDevice event (NRF_EVT_POWER_USB_POWER_READY) when a USB 3.3 V supply is ready. + * The event can be retrieved with sd_evt_get(); + * + * @param[in] usbpwrrdy_enable True if the power ready event should be enabled, false if it should be disabled. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_USBPWRRDY_ENABLE, uint32_t, sd_power_usbpwrrdy_enable(uint8_t usbpwrrdy_enable)); + +/**@brief Enables or disables the power USB-detected event. + * + * Enabling this will give a SoftDevice event (NRF_EVT_POWER_USB_DETECTED) when a voltage supply is detected on VBUS. + * The event can be retrieved with sd_evt_get(); + * + * @param[in] usbdetected_enable True if the power ready event should be enabled, false if it should be disabled. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_USBDETECTED_ENABLE, uint32_t, sd_power_usbdetected_enable(uint8_t usbdetected_enable)); + +/**@brief Enables or disables the power USB-removed event. + * + * Enabling this will give a SoftDevice event (NRF_EVT_POWER_USB_REMOVED) when a voltage supply is removed from VBUS. + * The event can be retrieved with sd_evt_get(); + * + * @param[in] usbremoved_enable True if the power ready event should be enabled, false if it should be disabled. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_USBREMOVED_ENABLE, uint32_t, sd_power_usbremoved_enable(uint8_t usbremoved_enable)); + +/**@brief Get USB supply status register content. + * + * @param[out] usbregstatus The content of USBREGSTATUS register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_USBREGSTATUS_GET, uint32_t, sd_power_usbregstatus_get(uint32_t * usbregstatus)); + +/**@brief Sets the power failure comparator threshold value. + * + * @note: Power failure comparator threshold setting. This setting applies both for normal voltage + * mode (supply connected to both VDD and VDDH) and high voltage mode (supply connected to + * VDDH only). + * + * @param[in] threshold The power-fail threshold value to use, see @ref NRF_POWER_THRESHOLDS. + * + * @retval ::NRF_SUCCESS The power failure threshold was set. + * @retval ::NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN The power failure threshold is unknown. + */ +SVCALL(SD_POWER_POF_THRESHOLD_SET, uint32_t, sd_power_pof_threshold_set(uint8_t threshold)); + +/**@brief Sets the power failure comparator threshold value for high voltage. + * + * @note: Power failure comparator threshold setting for high voltage mode (supply connected to + * VDDH only). This setting does not apply for normal voltage mode (supply connected to both + * VDD and VDDH). + * + * @param[in] threshold The power-fail threshold value to use, see @ref NRF_POWER_THRESHOLDVDDHS. + * + * @retval ::NRF_SUCCESS The power failure threshold was set. + * @retval ::NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN The power failure threshold is unknown. + */ +SVCALL(SD_POWER_POF_THRESHOLDVDDH_SET, uint32_t, sd_power_pof_thresholdvddh_set(uint8_t threshold)); + +/**@brief Writes the NRF_POWER->RAM[index].POWERSET register. + * + * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWERSET register to write to. + * @param[in] ram_powerset Contains the word to write to the NRF_POWER->RAM[index].POWERSET register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RAM_POWER_SET, uint32_t, sd_power_ram_power_set(uint8_t index, uint32_t ram_powerset)); + +/**@brief Writes the NRF_POWER->RAM[index].POWERCLR register. + * + * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWERCLR register to write to. + * @param[in] ram_powerclr Contains the word to write to the NRF_POWER->RAM[index].POWERCLR register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RAM_POWER_CLR, uint32_t, sd_power_ram_power_clr(uint8_t index, uint32_t ram_powerclr)); + +/**@brief Get contents of NRF_POWER->RAM[index].POWER register, indicates power status of RAM[index] blocks. + * + * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWER register to read from. + * @param[out] p_ram_power Content of NRF_POWER->RAM[index].POWER register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RAM_POWER_GET, uint32_t, sd_power_ram_power_get(uint8_t index, uint32_t * p_ram_power)); + +/**@brief Set bits in the general purpose retention registers (NRF_POWER->GPREGRET*). + * + * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. + * @param[in] gpregret_msk Bits to be set in the GPREGRET register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_GPREGRET_SET, uint32_t, sd_power_gpregret_set(uint32_t gpregret_id, uint32_t gpregret_msk)); + +/**@brief Clear bits in the general purpose retention registers (NRF_POWER->GPREGRET*). + * + * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. + * @param[in] gpregret_msk Bits to be clear in the GPREGRET register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_GPREGRET_CLR, uint32_t, sd_power_gpregret_clr(uint32_t gpregret_id, uint32_t gpregret_msk)); + +/**@brief Get contents of the general purpose retention registers (NRF_POWER->GPREGRET*). + * + * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. + * @param[out] p_gpregret Contents of the GPREGRET register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_GPREGRET_GET, uint32_t, sd_power_gpregret_get(uint32_t gpregret_id, uint32_t *p_gpregret)); + +/**@brief Enable or disable the DC/DC regulator for the regulator stage 1 (REG1). + * + * @param[in] dcdc_mode The mode of the DCDC, see @ref NRF_POWER_DCDC_MODES. + * + * @retval ::NRF_SUCCESS + * @retval ::NRF_ERROR_INVALID_PARAM The DCDC mode is invalid. + */ +SVCALL(SD_POWER_DCDC_MODE_SET, uint32_t, sd_power_dcdc_mode_set(uint8_t dcdc_mode)); + +/**@brief Enable or disable the DC/DC regulator for the regulator stage 0 (REG0). + * + * For more details on the REG0 stage, please see product specification. + * + * @param[in] dcdc_mode The mode of the DCDC0, see @ref NRF_POWER_DCDC_MODES. + * + * @retval ::NRF_SUCCESS + * @retval ::NRF_ERROR_INVALID_PARAM The dcdc_mode is invalid. + */ +SVCALL(SD_POWER_DCDC0_MODE_SET, uint32_t, sd_power_dcdc0_mode_set(uint8_t dcdc_mode)); + +/**@brief Request the high frequency crystal oscillator. + * + * Will start the high frequency crystal oscillator, the startup time of the crystal varies + * and the ::sd_clock_hfclk_is_running function can be polled to check if it has started. + * + * @see sd_clock_hfclk_is_running + * @see sd_clock_hfclk_release + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_CLOCK_HFCLK_REQUEST, uint32_t, sd_clock_hfclk_request(void)); + +/**@brief Releases the high frequency crystal oscillator. + * + * Will stop the high frequency crystal oscillator, this happens immediately. + * + * @see sd_clock_hfclk_is_running + * @see sd_clock_hfclk_request + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_CLOCK_HFCLK_RELEASE, uint32_t, sd_clock_hfclk_release(void)); + +/**@brief Checks if the high frequency crystal oscillator is running. + * + * @see sd_clock_hfclk_request + * @see sd_clock_hfclk_release + * + * @param[out] p_is_running 1 if the external crystal oscillator is running, 0 if not. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_CLOCK_HFCLK_IS_RUNNING, uint32_t, sd_clock_hfclk_is_running(uint32_t * p_is_running)); + +/**@brief Waits for an application event. + * + * An application event is either an application interrupt or a pended interrupt when the interrupt + * is disabled. + * + * When the application waits for an application event by calling this function, an interrupt that + * is enabled will be taken immediately on pending since this function will wait in thread mode, + * then the execution will return in the application's main thread. + * + * In order to wake up from disabled interrupts, the SEVONPEND flag has to be set in the Cortex-M + * MCU's System Control Register (SCR), CMSIS_SCB. In that case, when a disabled interrupt gets + * pended, this function will return to the application's main thread. + * + * @note The application must ensure that the pended flag is cleared using ::sd_nvic_ClearPendingIRQ + * in order to sleep using this function. This is only necessary for disabled interrupts, as + * the interrupt handler will clear the pending flag automatically for enabled interrupts. + * + * @note If an application interrupt has happened since the last time sd_app_evt_wait was + * called this function will return immediately and not go to sleep. This is to avoid race + * conditions that can occur when a flag is updated in the interrupt handler and processed + * in the main loop. + * + * @post An application interrupt has happened or a interrupt pending flag is set. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_APP_EVT_WAIT, uint32_t, sd_app_evt_wait(void)); + +/**@brief Get PPI channel enable register contents. + * + * @param[out] p_channel_enable The contents of the PPI CHEN register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_CHANNEL_ENABLE_GET, uint32_t, sd_ppi_channel_enable_get(uint32_t * p_channel_enable)); + +/**@brief Set PPI channel enable register. + * + * @param[in] channel_enable_set_msk Mask containing the bits to set in the PPI CHEN register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_CHANNEL_ENABLE_SET, uint32_t, sd_ppi_channel_enable_set(uint32_t channel_enable_set_msk)); + +/**@brief Clear PPI channel enable register. + * + * @param[in] channel_enable_clr_msk Mask containing the bits to clear in the PPI CHEN register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_CHANNEL_ENABLE_CLR, uint32_t, sd_ppi_channel_enable_clr(uint32_t channel_enable_clr_msk)); + +/**@brief Assign endpoints to a PPI channel. + * + * @param[in] channel_num Number of the PPI channel to assign. + * @param[in] evt_endpoint Event endpoint of the PPI channel. + * @param[in] task_endpoint Task endpoint of the PPI channel. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_CHANNEL The channel number is invalid. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_CHANNEL_ASSIGN, uint32_t, sd_ppi_channel_assign(uint8_t channel_num, const volatile void * evt_endpoint, const volatile void * task_endpoint)); + +/**@brief Task to enable a channel group. + * + * @param[in] group_num Number of the channel group. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_GROUP_TASK_ENABLE, uint32_t, sd_ppi_group_task_enable(uint8_t group_num)); + +/**@brief Task to disable a channel group. + * + * @param[in] group_num Number of the PPI group. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_GROUP_TASK_DISABLE, uint32_t, sd_ppi_group_task_disable(uint8_t group_num)); + +/**@brief Assign PPI channels to a channel group. + * + * @param[in] group_num Number of the channel group. + * @param[in] channel_msk Mask of the channels to assign to the group. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_GROUP_ASSIGN, uint32_t, sd_ppi_group_assign(uint8_t group_num, uint32_t channel_msk)); + +/**@brief Gets the PPI channels of a channel group. + * + * @param[in] group_num Number of the channel group. + * @param[out] p_channel_msk Mask of the channels assigned to the group. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_GROUP_GET, uint32_t, sd_ppi_group_get(uint8_t group_num, uint32_t * p_channel_msk)); + +/**@brief Configures the Radio Notification signal. + * + * @note + * - The notification signal latency depends on the interrupt priority settings of SWI used + * for notification signal. + * - To ensure that the radio notification signal behaves in a consistent way, the radio + * notifications must be configured when there is no protocol stack or other SoftDevice + * activity in progress. It is recommended that the radio notification signal is + * configured directly after the SoftDevice has been enabled. + * - In the period between the ACTIVE signal and the start of the Radio Event, the SoftDevice + * will interrupt the application to do Radio Event preparation. + * - Using the Radio Notification feature may limit the bandwidth, as the SoftDevice may have + * to shorten the connection events to have time for the Radio Notification signals. + * + * @param[in] type Type of notification signal, see @ref NRF_RADIO_NOTIFICATION_TYPES. + * @ref NRF_RADIO_NOTIFICATION_TYPE_NONE shall be used to turn off radio + * notification. Using @ref NRF_RADIO_NOTIFICATION_DISTANCE_NONE is + * recommended (but not required) to be used with + * @ref NRF_RADIO_NOTIFICATION_TYPE_NONE. + * + * @param[in] distance Distance between the notification signal and start of radio activity, see @ref NRF_RADIO_NOTIFICATION_DISTANCES. + * This parameter is ignored when @ref NRF_RADIO_NOTIFICATION_TYPE_NONE or + * @ref NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE is used. + * + * @retval ::NRF_ERROR_INVALID_PARAM The group number is invalid. + * @retval ::NRF_ERROR_INVALID_STATE A protocol stack or other SoftDevice is running. Stop all + * running activities and retry. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_RADIO_NOTIFICATION_CFG_SET, uint32_t, sd_radio_notification_cfg_set(uint8_t type, uint8_t distance)); + +/**@brief Encrypts a block according to the specified parameters. + * + * 128-bit AES encryption. + * + * @note: + * - The application may set the SEVONPEND bit in the SCR to 1 to make the SoftDevice sleep while + * the ECB is running. The SEVONPEND bit should only be cleared (set to 0) from application + * main or low interrupt level. + * + * @param[in, out] p_ecb_data Pointer to the ECB parameters' struct (two input + * parameters and one output parameter). + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_ECB_BLOCK_ENCRYPT, uint32_t, sd_ecb_block_encrypt(nrf_ecb_hal_data_t * p_ecb_data)); + +/**@brief Encrypts multiple data blocks provided as an array of data block structures. + * + * @details: Performs 128-bit AES encryption on multiple data blocks + * + * @note: + * - The application may set the SEVONPEND bit in the SCR to 1 to make the SoftDevice sleep while + * the ECB is running. The SEVONPEND bit should only be cleared (set to 0) from application + * main or low interrupt level. + * + * @param[in] block_count Count of blocks in the p_data_blocks array. + * @param[in,out] p_data_blocks Pointer to the first entry in a contiguous array of + * @ref nrf_ecb_hal_data_block_t structures. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_ECB_BLOCKS_ENCRYPT, uint32_t, sd_ecb_blocks_encrypt(uint8_t block_count, nrf_ecb_hal_data_block_t * p_data_blocks)); + +/**@brief Gets any pending events generated by the SoC API. + * + * The application should keep calling this function to get events, until ::NRF_ERROR_NOT_FOUND is returned. + * + * @param[out] p_evt_id Set to one of the values in @ref NRF_SOC_EVTS, if any events are pending. + * + * @retval ::NRF_SUCCESS An event was pending. The event id is written in the p_evt_id parameter. + * @retval ::NRF_ERROR_NOT_FOUND No pending events. + */ +SVCALL(SD_EVT_GET, uint32_t, sd_evt_get(uint32_t * p_evt_id)); + +/**@brief Get the temperature measured on the chip + * + * This function will block until the temperature measurement is done. + * It takes around 50 us from call to return. + * + * @param[out] p_temp Result of temperature measurement. Die temperature in 0.25 degrees Celsius. + * + * @retval ::NRF_SUCCESS A temperature measurement was done, and the temperature was written to temp + */ +SVCALL(SD_TEMP_GET, uint32_t, sd_temp_get(int32_t * p_temp)); + +/**@brief Flash Write +* +* Commands to write a buffer to flash +* +* If the SoftDevice is enabled: +* This call initiates the flash access command, and its completion will be communicated to the +* application with exactly one of the following events: +* - @ref NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed. +* - @ref NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started. +* +* If the SoftDevice is not enabled no event will be generated, and this call will return @ref NRF_SUCCESS when the + * write has been completed +* +* @note +* - This call takes control over the radio and the CPU during flash erase and write to make sure that +* they will not interfere with the flash access. This means that all interrupts will be blocked +* for a predictable time (depending on the NVMC specification in the device's Product Specification +* and the command parameters). +* - The data in the p_src buffer should not be modified before the @ref NRF_EVT_FLASH_OPERATION_SUCCESS +* or the @ref NRF_EVT_FLASH_OPERATION_ERROR have been received if the SoftDevice is enabled. +* - This call will make the SoftDevice trigger a hardfault when the page is written, if it is +* protected. +* +* +* @param[in] p_dst Pointer to start of flash location to be written. +* @param[in] p_src Pointer to buffer with data to be written. +* @param[in] size Number of 32-bit words to write. Maximum size is the number of words in one +* flash page. See the device's Product Specification for details. +* +* @retval ::NRF_ERROR_INVALID_ADDR Tried to write to a non existing flash address, or p_dst or p_src was unaligned. +* @retval ::NRF_ERROR_BUSY The previous command has not yet completed. +* @retval ::NRF_ERROR_INVALID_LENGTH Size was 0, or higher than the maximum allowed size. +* @retval ::NRF_ERROR_FORBIDDEN Tried to write to an address outside the application flash area. +* @retval ::NRF_SUCCESS The command was accepted. +*/ +SVCALL(SD_FLASH_WRITE, uint32_t, sd_flash_write(uint32_t * p_dst, uint32_t const * p_src, uint32_t size)); + + +/**@brief Flash Erase page +* +* Commands to erase a flash page +* If the SoftDevice is enabled: +* This call initiates the flash access command, and its completion will be communicated to the +* application with exactly one of the following events: +* - @ref NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed. +* - @ref NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started. +* +* If the SoftDevice is not enabled no event will be generated, and this call will return @ref NRF_SUCCESS when the +* erase has been completed +* +* @note +* - This call takes control over the radio and the CPU during flash erase and write to make sure that +* they will not interfere with the flash access. This means that all interrupts will be blocked +* for a predictable time (depending on the NVMC specification in the device's Product Specification +* and the command parameters). +* - This call will make the SoftDevice trigger a hardfault when the page is erased, if it is +* protected. +* +* +* @param[in] page_number Page number of the page to erase +* +* @retval ::NRF_ERROR_INTERNAL If a new session could not be opened due to an internal error. +* @retval ::NRF_ERROR_INVALID_ADDR Tried to erase to a non existing flash page. +* @retval ::NRF_ERROR_BUSY The previous command has not yet completed. +* @retval ::NRF_ERROR_FORBIDDEN Tried to erase a page outside the application flash area. +* @retval ::NRF_SUCCESS The command was accepted. +*/ +SVCALL(SD_FLASH_PAGE_ERASE, uint32_t, sd_flash_page_erase(uint32_t page_number)); + + + +/**@brief Opens a session for radio timeslot requests. + * + * @note Only one session can be open at a time. + * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START) will be called when the radio timeslot + * starts. From this point the NRF_RADIO and NRF_TIMER0 peripherals can be freely accessed + * by the application. + * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_TIMER0) is called whenever the NRF_TIMER0 + * interrupt occurs. + * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_RADIO) is called whenever the NRF_RADIO + * interrupt occurs. + * @note p_radio_signal_callback() will be called at ARM interrupt priority level 0. This + * implies that none of the sd_* API calls can be used from p_radio_signal_callback(). + * + * @param[in] p_radio_signal_callback The signal callback. + * + * @retval ::NRF_ERROR_INVALID_ADDR p_radio_signal_callback is an invalid function pointer. + * @retval ::NRF_ERROR_BUSY If session cannot be opened. + * @retval ::NRF_ERROR_INTERNAL If a new session could not be opened due to an internal error. + * @retval ::NRF_SUCCESS Otherwise. + */ + SVCALL(SD_RADIO_SESSION_OPEN, uint32_t, sd_radio_session_open(nrf_radio_signal_callback_t p_radio_signal_callback)); + +/**@brief Closes a session for radio timeslot requests. + * + * @note Any current radio timeslot will be finished before the session is closed. + * @note If a radio timeslot is scheduled when the session is closed, it will be canceled. + * @note The application cannot consider the session closed until the @ref NRF_EVT_RADIO_SESSION_CLOSED + * event is received. + * + * @retval ::NRF_ERROR_FORBIDDEN If session not opened. + * @retval ::NRF_ERROR_BUSY If session is currently being closed. + * @retval ::NRF_SUCCESS Otherwise. + */ + SVCALL(SD_RADIO_SESSION_CLOSE, uint32_t, sd_radio_session_close(void)); + +/**@brief Requests a radio timeslot. + * + * @note The request type is determined by p_request->request_type, and can be one of @ref NRF_RADIO_REQ_TYPE_EARLIEST + * and @ref NRF_RADIO_REQ_TYPE_NORMAL. The first request in a session must always be of type @ref NRF_RADIO_REQ_TYPE_EARLIEST. + * @note For a normal request (@ref NRF_RADIO_REQ_TYPE_NORMAL), the start time of a radio timeslot is specified by + * p_request->distance_us and is given relative to the start of the previous timeslot. + * @note A too small p_request->distance_us will lead to a @ref NRF_EVT_RADIO_BLOCKED event. + * @note Timeslots scheduled too close will lead to a @ref NRF_EVT_RADIO_BLOCKED event. + * @note See the SoftDevice Specification for more on radio timeslot scheduling, distances and lengths. + * @note If an opportunity for the first radio timeslot is not found before 100 ms after the call to this + * function, it is not scheduled, and instead a @ref NRF_EVT_RADIO_BLOCKED event is sent. + * The application may then try to schedule the first radio timeslot again. + * @note Successful requests will result in nrf_radio_signal_callback_t(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START). + * Unsuccessful requests will result in a @ref NRF_EVT_RADIO_BLOCKED event, see @ref NRF_SOC_EVTS. + * @note The jitter in the start time of the radio timeslots is +/- @ref NRF_RADIO_START_JITTER_US us. + * @note The nrf_radio_signal_callback_t(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START) call has a latency relative to the + * specified radio timeslot start, but this does not affect the actual start time of the timeslot. + * @note NRF_TIMER0 is reset at the start of the radio timeslot, and is clocked at 1MHz from the high frequency + * (16 MHz) clock source. If p_request->hfclk_force_xtal is true, the high frequency clock is + * guaranteed to be clocked from the external crystal. + * @note The SoftDevice will neither access the NRF_RADIO peripheral nor the NRF_TIMER0 peripheral + * during the radio timeslot. + * + * @param[in] p_request Pointer to the request parameters. + * + * @retval ::NRF_ERROR_FORBIDDEN If session not opened or the session is not IDLE. + * @retval ::NRF_ERROR_INVALID_ADDR If the p_request pointer is invalid. + * @retval ::NRF_ERROR_INVALID_PARAM If the parameters of p_request are not valid. + * @retval ::NRF_SUCCESS Otherwise. + */ + SVCALL(SD_RADIO_REQUEST, uint32_t, sd_radio_request(nrf_radio_request_t const * p_request)); + +/**@brief Write register protected by the SoftDevice + * + * This function writes to a register that is write-protected by the SoftDevice. Please refer to your + * SoftDevice Specification for more details about which registers that are protected by SoftDevice. + * This function can write to the following protected peripheral: + * - ACL + * + * @note Protected registers may be read directly. + * @note Register that are write-once will return @ref NRF_SUCCESS on second set, even the value in + * the register has not changed. See the Product Specification for more details about register + * properties. + * + * @param[in] p_register Pointer to register to be written. + * @param[in] value Value to be written to the register. + * + * @retval ::NRF_ERROR_INVALID_ADDR This function can not write to the reguested register. + * @retval ::NRF_SUCCESS Value successfully written to register. + * + */ +SVCALL(SD_PROTECTED_REGISTER_WRITE, uint32_t, sd_protected_register_write(volatile uint32_t * p_register, uint32_t value)); + +/**@} */ + +#ifdef __cplusplus +} +#endif +#endif // NRF_SOC_H__ + +/**@} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_svc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_svc.h new file mode 100644 index 00000000000..292c6929828 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_svc.h @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef NRF_SVC__ +#define NRF_SVC__ + +#include "stdint.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef SVCALL_AS_NORMAL_FUNCTION +#define SVCALL(number, return_type, signature) return_type signature +#else + +#ifndef SVCALL +#if defined (__CC_ARM) +#define SVCALL(number, return_type, signature) return_type __svc(number) signature +#elif defined (__GNUC__) +#ifdef __cplusplus +#define GCC_CAST_CPP (uint16_t) +#else +#define GCC_CAST_CPP +#endif +#define SVCALL(number, return_type, signature) \ + _Pragma("GCC diagnostic push") \ + _Pragma("GCC diagnostic ignored \"-Wreturn-type\"") \ + __attribute__((naked)) \ + __attribute__((unused)) \ + static return_type signature \ + { \ + __asm( \ + "svc %0\n" \ + "bx r14" : : "I" (GCC_CAST_CPP number) : "r0" \ + ); \ + } \ + _Pragma("GCC diagnostic pop") + +#elif defined (__ICCARM__) +#define PRAGMA(x) _Pragma(#x) +#define SVCALL(number, return_type, signature) \ +PRAGMA(swi_number = (number)) \ + __swi return_type signature; +#else +#define SVCALL(number, return_type, signature) return_type signature +#endif +#endif // SVCALL + +#endif // SVCALL_AS_NORMAL_FUNCTION + +#ifdef __cplusplus +} +#endif +#endif // NRF_SVC__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/hex/s140_nrf52_6.0.0_licence-agreement.txt b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/hex/s140_nrf52_6.0.0_licence-agreement.txt new file mode 100644 index 00000000000..a71adee7b9b --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/hex/s140_nrf52_6.0.0_licence-agreement.txt @@ -0,0 +1,35 @@ +Copyright (c) 2007 - 2018, Nordic Semiconductor ASA +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/hex/s140_nrf52_6.0.0_softdevice.hex b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/hex/s140_nrf52_6.0.0_softdevice.hex new file mode 100644 index 00000000000..0229a599556 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/hex/s140_nrf52_6.0.0_softdevice.hex @@ -0,0 +1,9443 @@ +:020000040000FA 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+:1053A000349B5F801280021A10138B091B20480463 +:1053B0001ACE0401200B50A40AAC01300912CB63B1 +:0853C0007F010B68CC10A00076 +:00000001FF diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/atomic/nrf_atomic.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/atomic/nrf_atomic.c new file mode 100644 index 00000000000..8d1609f4eb6 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/atomic/nrf_atomic.c @@ -0,0 +1,447 @@ +/** + * Copyright (c) 2018 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "nrf_atomic.h" + +#ifndef NRF_ATOMIC_USE_BUILD_IN +#if (defined(__GNUC__) && defined(WIN32)) + #define NRF_ATOMIC_USE_BUILD_IN 1 +#else + #define NRF_ATOMIC_USE_BUILD_IN 0 +#endif +#endif // NRF_ATOMIC_USE_BUILD_IN + +#if ((__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)) +#define STREX_LDREX_PRESENT +#else +#include "app_util_platform.h" +#endif + + +#if (NRF_ATOMIC_USE_BUILD_IN == 0) && defined(STREX_LDREX_PRESENT) +#include "nrf_atomic_internal.h" +#endif + +uint32_t nrf_atomic_u32_fetch_store(nrf_atomic_u32_t * p_data, uint32_t value) +{ +#if NRF_ATOMIC_USE_BUILD_IN + return __atomic_exchange_n(p_data, value, __ATOMIC_SEQ_CST); + +#elif defined(STREX_LDREX_PRESENT) + uint32_t old_val; + uint32_t new_val; + NRF_ATOMIC_OP(mov, old_val, new_val, p_data, value); + + UNUSED_PARAMETER(old_val); + UNUSED_PARAMETER(new_val); + return old_val; +#else + CRITICAL_REGION_ENTER(); + uint32_t old_val = *p_data; + *p_data = value; + CRITICAL_REGION_EXIT(); + return old_val; +#endif //NRF_ATOMIC_USE_BUILD_IN +} + +uint32_t nrf_atomic_u32_store(nrf_atomic_u32_t * p_data, uint32_t value) +{ +#if NRF_ATOMIC_USE_BUILD_IN + __atomic_store_n(p_data, value, __ATOMIC_SEQ_CST); + return value; +#elif defined(STREX_LDREX_PRESENT) + uint32_t old_val; + uint32_t new_val; + + NRF_ATOMIC_OP(mov, old_val, new_val, p_data, value); + + UNUSED_PARAMETER(old_val); + UNUSED_PARAMETER(new_val); + return new_val; +#else + CRITICAL_REGION_ENTER(); + *p_data = value; + CRITICAL_REGION_EXIT(); + return value; +#endif //NRF_ATOMIC_USE_BUILD_IN +} + +uint32_t nrf_atomic_u32_fetch_or(nrf_atomic_u32_t * p_data, uint32_t value) +{ +#if NRF_ATOMIC_USE_BUILD_IN + return __atomic_fetch_or(p_data, value, __ATOMIC_SEQ_CST); +#elif defined(STREX_LDREX_PRESENT) + uint32_t old_val; + uint32_t new_val; + + NRF_ATOMIC_OP(orr, old_val, new_val, p_data, value); + UNUSED_PARAMETER(old_val); + UNUSED_PARAMETER(new_val); + return old_val; +#else + CRITICAL_REGION_ENTER(); + uint32_t old_val = *p_data; + *p_data |= value; + CRITICAL_REGION_EXIT(); + return old_val; +#endif //NRF_ATOMIC_USE_BUILD_IN +} + +uint32_t nrf_atomic_u32_or(nrf_atomic_u32_t * p_data, uint32_t value) +{ +#if NRF_ATOMIC_USE_BUILD_IN + return __atomic_or_fetch(p_data, value, __ATOMIC_SEQ_CST); +#elif defined(STREX_LDREX_PRESENT) + uint32_t old_val; + uint32_t new_val; + + NRF_ATOMIC_OP(orr, old_val, new_val, p_data, value); + UNUSED_PARAMETER(old_val); + UNUSED_PARAMETER(new_val); + return new_val; +#else + CRITICAL_REGION_ENTER(); + *p_data |= value; + uint32_t new_value = *p_data; + CRITICAL_REGION_EXIT(); + return new_value; +#endif //NRF_ATOMIC_USE_BUILD_IN +} + +uint32_t nrf_atomic_u32_fetch_and(nrf_atomic_u32_t * p_data, uint32_t value) +{ +#if NRF_ATOMIC_USE_BUILD_IN + return __atomic_fetch_and(p_data, value, __ATOMIC_SEQ_CST); +#elif defined(STREX_LDREX_PRESENT) + uint32_t old_val; + uint32_t new_val; + + NRF_ATOMIC_OP(and, old_val, new_val, p_data, value); + UNUSED_PARAMETER(old_val); + UNUSED_PARAMETER(new_val); + return old_val; +#else + CRITICAL_REGION_ENTER(); + uint32_t old_val = *p_data; + *p_data &= value; + CRITICAL_REGION_EXIT(); + return old_val; +#endif //NRF_ATOMIC_USE_BUILD_IN +} + +uint32_t nrf_atomic_u32_and(nrf_atomic_u32_t * p_data, uint32_t value) +{ +#if NRF_ATOMIC_USE_BUILD_IN + return __atomic_and_fetch(p_data, value, __ATOMIC_SEQ_CST); +#elif defined(STREX_LDREX_PRESENT) + uint32_t old_val; + uint32_t new_val; + + NRF_ATOMIC_OP(and, old_val, new_val, p_data, value); + UNUSED_PARAMETER(old_val); + UNUSED_PARAMETER(new_val); + return new_val; +#else + CRITICAL_REGION_ENTER(); + *p_data &= value; + uint32_t new_value = *p_data; + CRITICAL_REGION_EXIT(); + return new_value; +#endif //NRF_ATOMIC_USE_BUILD_IN +} + +uint32_t nrf_atomic_u32_fetch_xor(nrf_atomic_u32_t * p_data, uint32_t value) +{ +#if NRF_ATOMIC_USE_BUILD_IN + return __atomic_fetch_xor(p_data, value, __ATOMIC_SEQ_CST); +#elif defined(STREX_LDREX_PRESENT) + uint32_t old_val; + uint32_t new_val; + + NRF_ATOMIC_OP(eor, old_val, new_val, p_data, value); + UNUSED_PARAMETER(old_val); + UNUSED_PARAMETER(new_val); + return old_val; +#else + CRITICAL_REGION_ENTER(); + uint32_t old_val = *p_data; + *p_data ^= value; + CRITICAL_REGION_EXIT(); + return old_val; +#endif //NRF_ATOMIC_USE_BUILD_IN +} + +uint32_t nrf_atomic_u32_xor(nrf_atomic_u32_t * p_data, uint32_t value) +{ +#if NRF_ATOMIC_USE_BUILD_IN + return __atomic_xor_fetch(p_data, value, __ATOMIC_SEQ_CST); +#elif defined(STREX_LDREX_PRESENT) + uint32_t old_val; + uint32_t new_val; + + NRF_ATOMIC_OP(eor, old_val, new_val, p_data, value); + UNUSED_PARAMETER(old_val); + UNUSED_PARAMETER(new_val); + return new_val; +#else + CRITICAL_REGION_ENTER(); + *p_data ^= value; + uint32_t new_value = *p_data; + CRITICAL_REGION_EXIT(); + return new_value; +#endif //NRF_ATOMIC_USE_BUILD_IN +} + +uint32_t nrf_atomic_u32_fetch_add(nrf_atomic_u32_t * p_data, uint32_t value) +{ +#if NRF_ATOMIC_USE_BUILD_IN + return __atomic_fetch_add(p_data, value, __ATOMIC_SEQ_CST); +#elif defined(STREX_LDREX_PRESENT) + uint32_t old_val; + uint32_t new_val; + + NRF_ATOMIC_OP(add, old_val, new_val, p_data, value); + UNUSED_PARAMETER(old_val); + UNUSED_PARAMETER(new_val); + return old_val; +#else + CRITICAL_REGION_ENTER(); + uint32_t old_val = *p_data; + *p_data += value; + CRITICAL_REGION_EXIT(); + return old_val; +#endif //NRF_ATOMIC_USE_BUILD_IN +} + +uint32_t nrf_atomic_u32_add(nrf_atomic_u32_t * p_data, uint32_t value) +{ +#if NRF_ATOMIC_USE_BUILD_IN + return __atomic_add_fetch(p_data, value, __ATOMIC_SEQ_CST); +#elif defined(STREX_LDREX_PRESENT) + uint32_t old_val; + uint32_t new_val; + + NRF_ATOMIC_OP(add, old_val, new_val, p_data, value); + UNUSED_PARAMETER(old_val); + UNUSED_PARAMETER(new_val); + return new_val; +#else + CRITICAL_REGION_ENTER(); + *p_data += value; + uint32_t new_value = *p_data; + CRITICAL_REGION_EXIT(); + return new_value; +#endif //NRF_ATOMIC_USE_BUILD_IN +} + +uint32_t nrf_atomic_u32_fetch_sub(nrf_atomic_u32_t * p_data, uint32_t value) +{ +#if NRF_ATOMIC_USE_BUILD_IN + return __atomic_fetch_sub(p_data, value, __ATOMIC_SEQ_CST); +#elif defined(STREX_LDREX_PRESENT) + uint32_t old_val; + uint32_t new_val; + + NRF_ATOMIC_OP(sub, old_val, new_val, p_data, value); + UNUSED_PARAMETER(old_val); + UNUSED_PARAMETER(new_val); + return old_val; +#else + CRITICAL_REGION_ENTER(); + uint32_t old_val = *p_data; + *p_data -= value; + CRITICAL_REGION_EXIT(); + return old_val; +#endif //NRF_ATOMIC_USE_BUILD_IN +} + +uint32_t nrf_atomic_u32_sub(nrf_atomic_u32_t * p_data, uint32_t value) +{ +#if NRF_ATOMIC_USE_BUILD_IN + return __atomic_sub_fetch(p_data, value, __ATOMIC_SEQ_CST); +#elif defined(STREX_LDREX_PRESENT) + uint32_t old_val; + uint32_t new_val; + + NRF_ATOMIC_OP(sub, old_val, new_val, p_data, value); + UNUSED_PARAMETER(old_val); + UNUSED_PARAMETER(new_val); + return new_val; +#else + CRITICAL_REGION_ENTER(); + *p_data -= value; + uint32_t new_value = *p_data; + CRITICAL_REGION_EXIT(); + return new_value; +#endif //NRF_ATOMIC_USE_BUILD_IN +} + +bool nrf_atomic_u32_cmp_exch(nrf_atomic_u32_t * p_data, + uint32_t * p_expected, + uint32_t desired) +{ +#if NRF_ATOMIC_USE_BUILD_IN + return __atomic_compare_exchange(p_data, + p_expected, + &desired, + 1, + __ATOMIC_SEQ_CST, + __ATOMIC_SEQ_CST); +#elif defined(STREX_LDREX_PRESENT) + return nrf_atomic_internal_cmp_exch(p_data, p_expected, desired); +#else + CRITICAL_REGION_ENTER(); + if(*p_data == *p_expected) + { + *p_data = desired; + return true; + } + else + { + *p_expected = *p_data; + return false; + } + CRITICAL_REGION_EXIT(); +#endif +} + +uint32_t nrf_atomic_u32_fetch_sub_hs(nrf_atomic_u32_t * p_data, uint32_t value) +{ +#if NRF_ATOMIC_USE_BUILD_IN + uint32_t expected = *p_data; + uint32_t new_val; + bool success; + + do + { + if (expected >= value) + { + new_val = expected - value; + } + else + { + new_val = expected; + } + success = __atomic_compare_exchange(p_data, + &expected, + &new_val, + 1, + __ATOMIC_SEQ_CST, + __ATOMIC_SEQ_CST); + } while(!success); + return expected; +#elif defined(STREX_LDREX_PRESENT) + uint32_t old_val; + uint32_t new_val; + + NRF_ATOMIC_OP(sub_hs, old_val, new_val, p_data, value); + UNUSED_PARAMETER(old_val); + UNUSED_PARAMETER(new_val); + return old_val; +#else + CRITICAL_REGION_ENTER(); + uint32_t old_val = *p_data; + *p_data -= value; + CRITICAL_REGION_EXIT(); + return old_val; +#endif //NRF_ATOMIC_USE_BUILD_IN +} + +uint32_t nrf_atomic_u32_sub_hs(nrf_atomic_u32_t * p_data, uint32_t value) +{ +#if NRF_ATOMIC_USE_BUILD_IN + uint32_t expected = *p_data; + uint32_t new_val; + bool success; + + do + { + if (expected >= value) + { + new_val = expected - value; + } + else + { + new_val = expected; + } + success = __atomic_compare_exchange(p_data, + &expected, + &new_val, + 1, + __ATOMIC_SEQ_CST, + __ATOMIC_SEQ_CST); + } while(!success); + return new_val; +#elif defined(STREX_LDREX_PRESENT) + uint32_t old_val; + uint32_t new_val; + + NRF_ATOMIC_OP(sub_hs, old_val, new_val, p_data, value); + UNUSED_PARAMETER(old_val); + UNUSED_PARAMETER(new_val); + return new_val; +#else + CRITICAL_REGION_ENTER(); + *p_data -= value; + uint32_t new_value = *p_data; + CRITICAL_REGION_EXIT(); + return new_value; +#endif //NRF_ATOMIC_USE_BUILD_IN +} + +uint32_t nrf_atomic_flag_set_fetch(nrf_atomic_flag_t * p_data) +{ + return nrf_atomic_u32_fetch_or(p_data, 1); +} + +uint32_t nrf_atomic_flag_set(nrf_atomic_flag_t * p_data) +{ + return nrf_atomic_u32_or(p_data, 1); +} + +uint32_t nrf_atomic_flag_clear_fetch(nrf_atomic_flag_t * p_data) +{ + return nrf_atomic_u32_fetch_and(p_data, 0); +} + +uint32_t nrf_atomic_flag_clear(nrf_atomic_flag_t * p_data) +{ + return nrf_atomic_u32_and(p_data, 0); +} + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/atomic/nrf_atomic.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/atomic/nrf_atomic.h new file mode 100644 index 00000000000..6a11eee37e7 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/atomic/nrf_atomic.h @@ -0,0 +1,274 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/**@file + * + * @defgroup nrf_atomic Atomic operations API + * @ingroup app_common + * @{ + * + * @brief @tagAPI52 This module implements C11 stdatomic.h simplified API. + At this point only Cortex-M3/M4 cores are supported (LDREX/STREX instructions). + * Atomic types are limited to @ref nrf_atomic_u32_t and @ref nrf_atomic_flag_t. + */ + +#ifndef NRF_ATOMIC_H__ +#define NRF_ATOMIC_H__ + +#include "sdk_common.h" + +/** + * @brief Atomic 32 bit unsigned type + * */ +typedef volatile uint32_t nrf_atomic_u32_t; + +/** + * @brief Atomic 1 bit flag type (technically 32 bit) + * */ +typedef volatile uint32_t nrf_atomic_flag_t; + + + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Stores value to an atomic object + * + * @param[in] p_data Atomic memory pointer + * @param[in] value Value to store + * + * @return Old value stored into atomic object + * */ +uint32_t nrf_atomic_u32_fetch_store(nrf_atomic_u32_t * p_data, uint32_t value); + +/** + * @brief Stores value to an atomic object + * + * @param[in] p_data Atomic memory pointer + * @param[in] value Value to store + * + * @return New value stored into atomic object + * */ +uint32_t nrf_atomic_u32_store(nrf_atomic_u32_t * p_data, uint32_t value); + +/** + * @brief Logical OR operation on an atomic object + * + * @param[in] p_data Atomic memory pointer + * @param[in] value Value of second operand OR operation + * + * @return Old value stored into atomic object + * */ +uint32_t nrf_atomic_u32_fetch_or(nrf_atomic_u32_t * p_data, uint32_t value); + +/** + * @brief Logical OR operation on an atomic object + * + * @param[in] p_data Atomic memory pointer + * @param[in] value Value of second operand OR operation + * + * @return New value stored into atomic object + * */ +uint32_t nrf_atomic_u32_or(nrf_atomic_u32_t * p_data, uint32_t value); + +/** + * @brief Logical AND operation on an atomic object + * + * @param[in] p_data Atomic memory pointer + * @param[in] value Value of second operand AND operation + * + * @return Old value stored into atomic object + * */ +uint32_t nrf_atomic_u32_fetch_and(nrf_atomic_u32_t * p_data, uint32_t value); + +/** + * @brief Logical AND operation on an atomic object + * + * @param[in] p_data Atomic memory pointer + * @param[in] value Value of second operand AND operation + * + * @return New value stored into atomic object + * */ +uint32_t nrf_atomic_u32_and(nrf_atomic_u32_t * p_data, uint32_t value); + +/** + * @brief Logical XOR operation on an atomic object + * + * @param[in] p_data Atomic memory pointer + * @param[in] value Value of second operand XOR operation + * + * @return Old value stored into atomic object + * */ +uint32_t nrf_atomic_u32_fetch_xor(nrf_atomic_u32_t * p_data, uint32_t value); + +/** + * @brief Logical XOR operation on an atomic object + * + * @param[in] p_data Atomic memory pointer + * @param[in] value Value of second operand XOR operation + * + * @return New value stored into atomic object + * */ +uint32_t nrf_atomic_u32_xor(nrf_atomic_u32_t * p_data, uint32_t value); + +/** + * @brief Arithmetic ADD operation on an atomic object + * + * @param[in] p_data Atomic memory pointer + * @param[in] value Value of second operand ADD operation + * + * @return Old value stored into atomic object + * */ +uint32_t nrf_atomic_u32_fetch_add(nrf_atomic_u32_t * p_data, uint32_t value); + +/** + * @brief Arithmetic ADD operation on an atomic object + * + * @param[in] p_data Atomic memory pointer + * @param[in] value Value of second operand ADD operation + * + * @return New value stored into atomic object + * */ +uint32_t nrf_atomic_u32_add(nrf_atomic_u32_t * p_data, uint32_t value); + +/** + * @brief Arithmetic SUB operation on an atomic object + * + * @param[in] p_data Atomic memory pointer + * @param[in] value Value of second operand SUB operation + * + * @return Old value stored into atomic object + * */ +uint32_t nrf_atomic_u32_fetch_sub(nrf_atomic_u32_t * p_data, uint32_t value); + +/** + * @brief Arithmetic SUB operation on an atomic object + * + * @param[in] p_data Atomic memory pointer + * @param[in] value Value of second operand SUB operation + * + * @return New value stored into atomic object + * */ +uint32_t nrf_atomic_u32_sub(nrf_atomic_u32_t * p_data, uint32_t value); + +/** + * @brief If value at pointer is equal to expected value, changes value at pointer to desired + * + * Atomically compares the value pointed to by p_data with the value pointed to by p_expected, + * and if those are equal, replaces the former with desired. Otherwise, loads the actual value + * pointed to by p_data into *p_expected. + * + * @param p_data Atomic memory pointer to test and modify. + * @param p_expected Pointer to test value. + * @param desired Value to be stored to atomic memory. + * + * @retval true *p_data was equal to *p_expected + * @retval false *p_data was not equal to *p_expected + */ +bool nrf_atomic_u32_cmp_exch(nrf_atomic_u32_t * p_data, + uint32_t * p_expected, + uint32_t desired); + +/** + * @brief Arithmetic SUB operation on an atomic object performed if object >= value. + * + * @param[in] p_data Atomic memory pointer + * @param[in] value Value of second operand SUB operation + * + * @return Old value stored into atomic object + * */ +uint32_t nrf_atomic_u32_fetch_sub_hs(nrf_atomic_u32_t * p_data, uint32_t value); + +/** + * @brief Arithmetic SUB operation on an atomic object performed if object >= value. + * + * @param[in] p_data Atomic memory pointer + * @param[in] value Value of second operand SUB operation + * + * @return New value stored into atomic object + * */ +uint32_t nrf_atomic_u32_sub_hs(nrf_atomic_u32_t * p_data, uint32_t value); + +/**************************************************************************************************/ + +/** + * @brief Logic one bit flag set operation on an atomic object + * + * @param[in] p_data Atomic flag memory pointer + * + * @return Old flag value + * */ +uint32_t nrf_atomic_flag_set_fetch(nrf_atomic_flag_t * p_data); + +/** + * @brief Logic one bit flag set operation on an atomic object + * + * @param[in] p_data Atomic flag memory pointer + * + * @return New flag value + * */ +uint32_t nrf_atomic_flag_set(nrf_atomic_flag_t * p_data); + +/** + * @brief Logic one bit flag clear operation on an atomic object + * + * @param[in] p_data Atomic flag memory pointer + * + * @return Old flag value + * */ +uint32_t nrf_atomic_flag_clear_fetch(nrf_atomic_flag_t * p_data); + +/** + * @brief Logic one bit flag clear operation on an atomic object + * + * @param[in] p_data Atomic flag memory pointer + * + * @return New flag value + * */ +uint32_t nrf_atomic_flag_clear(nrf_atomic_flag_t * p_data); + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_ATOMIC_H__ */ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/atomic/nrf_atomic_internal.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/atomic/nrf_atomic_internal.h new file mode 100644 index 00000000000..534f1b74999 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/atomic/nrf_atomic_internal.h @@ -0,0 +1,343 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_ATOMIC_INTERNAL_H__ +#define NRF_ATOMIC_INTERNAL_H__ + +#include "sdk_common.h" +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * + * @defgroup nrf_atomic_internal Atomic operations internals + * @ingroup nrf_atomic + * @{ + * + */ + +/* Only Cortex M cores > 3 support LDREX/STREX instructions*/ +#if ((__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)) == 0 +#error "Unsupported core version" +#endif + +#if defined ( __CC_ARM ) +static __asm uint32_t nrf_atomic_internal_mov(nrf_atomic_u32_t * p_ptr, + uint32_t value, + uint32_t * p_new) +{ + /* The base standard provides for passing arguments in core registers (r0-r3) and on the stack. + * Registers r4 and r5 have to be saved on stack. Note that only even number of register push are + * allowed. This is a requirement of the Procedure Call Standard for the ARM Architecture [AAPCS]. + * */ + push {r4, r5} + mov r4, r0 + +loop_mov + ldrex r0, [r4] + mov r5, r1 + strex r3, r5, [r4] + cmp r3, #0 + bne loop_mov + + str r5, [r2] + pop {r4, r5} + bx lr +} + + +static __asm uint32_t nrf_atomic_internal_orr(nrf_atomic_u32_t * p_ptr, + uint32_t value, + uint32_t * p_new) +{ + push {r4, r5} + mov r4, r0 + +loop_orr + ldrex r0, [r4] + orr r5, r0, r1 + strex r3, r5, [r4] + cmp r3, #0 + bne loop_orr + + str r5, [r2] + pop {r4, r5} + bx lr +} + +static __asm uint32_t nrf_atomic_internal_and(nrf_atomic_u32_t * p_ptr, + uint32_t value, + uint32_t * p_new) +{ + push {r4, r5} + mov r4, r0 + +loop_and + ldrex r0, [r4] + and r5, r0, r1 + strex r3, r5, [r4] + cmp r3, #0 + bne loop_and + + str r5, [r2] + pop {r4, r5} + bx lr +} + +static __asm uint32_t nrf_atomic_internal_eor(nrf_atomic_u32_t * p_ptr, + uint32_t value, + uint32_t * p_new) +{ + push {r4, r5} + mov r4, r0 + +loop_eor + ldrex r0, [r4] + eor r5, r0, r1 + strex r3, r5, [r4] + cmp r3, #0 + bne loop_eor + + str r5, [r2] + pop {r4, r5} + bx lr +} + +static __asm uint32_t nrf_atomic_internal_add(nrf_atomic_u32_t * p_ptr, + uint32_t value, + uint32_t * p_new) +{ + push {r4, r5} + mov r4, r0 + +loop_add + ldrex r0, [r4] + add r5, r0, r1 + strex r3, r5, [r4] + cmp r3, #0 + bne loop_add + + str r5, [r2] + pop {r4, r5} + bx lr +} + +static __asm uint32_t nrf_atomic_internal_sub(nrf_atomic_u32_t * p_ptr, + uint32_t value, + uint32_t * p_new) +{ + push {r4, r5} + mov r4, r0 + +loop_sub + ldrex r0, [r4] + sub r5, r0, r1 + strex r3, r5, [r4] + cmp r3, #0 + bne loop_sub + + str r5, [r2] + pop {r4, r5} + bx lr +} + +static __asm bool nrf_atomic_internal_cmp_exch(nrf_atomic_u32_t * p_data, + uint32_t * p_expected, + uint32_t value) +{ +#define RET_REG r0 +#define P_EXPC r1 +#define VALUE r2 +#define STR_RES r3 +#define P_DATA r4 +#define EXPC_VAL r5 +#define ACT_VAL r6 + + push {r4-r6} + mov P_DATA, r0 + mov RET_REG, #0 + +loop_cmp_exch + ldrex ACT_VAL, [P_DATA] + ldr EXPC_VAL, [P_EXPC] + cmp ACT_VAL, EXPC_VAL + ittee eq + strexeq STR_RES, VALUE, [P_DATA] + moveq RET_REG, #1 + strexne STR_RES, ACT_VAL, [P_DATA] + strne ACT_VAL, [P_EXPC] + cmp STR_RES, #0 + itt ne + movne RET_REG, #0 + bne loop_cmp_exch + + pop {r4-r6} + bx lr + +#undef RET_REG +#undef P_EXPC +#undef VALUE +#undef STR_RES +#undef P_DATA +#undef EXPC_VAL +#undef ACT_VAL +} + +static __asm uint32_t nrf_atomic_internal_sub_hs(nrf_atomic_u32_t * p_ptr, + uint32_t value, + uint32_t * p_new) +{ + push {r4, r5} + mov r4, r0 + +loop_sub_ge + ldrex r0, [r4] + cmp r0, r1 + ite hs + subhs r5, r0, r1 + movlo r5, r0 + strex r3, r5, [r4] + cmp r3, #0 + bne loop_sub_ge + + str r5, [r2] + pop {r4, r5} + bx lr +} + + +#define NRF_ATOMIC_OP(asm_op, old_val, new_val, ptr, value) \ + old_val = nrf_atomic_internal_##asm_op(ptr, value, &new_val) + +#elif defined ( __ICCARM__ ) || defined ( __GNUC__ ) + +/** + * @brief Atomic operation generic macro + * @param[in] asm_op operation: mov, orr, and, eor, add, sub + * @param[out] old_val atomic object output (uint32_t), value before operation + * @param[out] new_val atomic object output (uint32_t), value after operation + * @param[in] value atomic operation operand + * */ +#define NRF_ATOMIC_OP(asm_op, old_val, new_val, ptr, value) \ +{ \ + uint32_t str_res; \ + __ASM volatile( \ + "1: ldrex %["#old_val"], [%["#ptr"]]\n" \ + NRF_ATOMIC_OP_##asm_op(new_val, old_val, value) \ + " strex %[str_res], %["#new_val"], [%["#ptr"]]\n" \ + " teq %[str_res], #0\n" \ + " bne.n 1b" \ + : \ + [old_val]"=&r" (old_val), \ + [new_val]"=&r" (new_val), \ + [str_res]"=&r" (str_res) \ + : \ + [ptr]"r" (ptr), \ + [value]"r" (value) \ + : "cc"); \ + UNUSED_PARAMETER(str_res); \ +} + +#define NRF_ATOMIC_OP_mov(new_val, old_val, value) "mov %["#new_val"], %["#value"]\n" +#define NRF_ATOMIC_OP_orr(new_val, old_val, value) "orr %["#new_val"], %["#old_val"], %["#value"]\n" +#define NRF_ATOMIC_OP_and(new_val, old_val, value) "and %["#new_val"], %["#old_val"], %["#value"]\n" +#define NRF_ATOMIC_OP_eor(new_val, old_val, value) "eor %["#new_val"], %["#old_val"], %["#value"]\n" +#define NRF_ATOMIC_OP_add(new_val, old_val, value) "add %["#new_val"], %["#old_val"], %["#value"]\n" +#define NRF_ATOMIC_OP_sub(new_val, old_val, value) "sub %["#new_val"], %["#old_val"], %["#value"]\n" +#define NRF_ATOMIC_OP_sub_hs(new_val, old_val, value) \ + "cmp %["#old_val"], %["#value"]\n " \ + "ite hs\n" \ + "subhs %["#new_val"], %["#old_val"], %["#value"]\n" \ + "movlo %["#new_val"], %["#old_val"]\n" + +static inline bool nrf_atomic_internal_cmp_exch(nrf_atomic_u32_t * p_data, + uint32_t * p_expected, + uint32_t value) +{ + bool res = false; + uint32_t str_res = 0; + uint32_t act_val = 0; + uint32_t exp_val = 0; + UNUSED_VARIABLE(str_res); + UNUSED_VARIABLE(act_val); + UNUSED_VARIABLE(exp_val); + __ASM volatile( + "1: ldrex %[act_val], [%[ptr]]\n" + " ldr %[exp_val], [%[expc]]\n" + " cmp %[act_val], %[exp_val]\n" + " ittee eq\n" + " strexeq %[str_res], %[value], [%[ptr]]\n" + " moveq %[res], #1\n" + " strexne %[str_res], %[act_val], [%[ptr]]\n" + " strne %[act_val], [%[expc]]\n" + " cmp %[str_res], #0\n" + " itt ne\n" + " movne %[res], #0\n" + " bne.n 1b" + : + [res] "=&r" (res), + [exp_val] "=&r" (exp_val), + [act_val] "=&r" (act_val), + [str_res] "=&r" (str_res) + : + "0" (res), + "1" (exp_val), + "2" (act_val), + [expc] "r" (p_expected), + [ptr] "r" (p_data), + [value] "r" (value) + : "cc"); + return res; +} + +#else +#error "Unsupported compiler" +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_ATOMIC_INTERNAL_H__ */ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/atomic/nrf_atomic_sanity_check.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/atomic/nrf_atomic_sanity_check.h new file mode 100644 index 00000000000..bbc302cd7ed --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/atomic/nrf_atomic_sanity_check.h @@ -0,0 +1,153 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_ATOMIC_SANITY_CHECK_H__ +#define NRF_ATOMIC_SANITY_CHECK_H__ + +#include "nrf_atomic.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Quick sanity check of nrf_atomic API + * */ +static inline void nrf_atomic_sanity_check(void) +{ +#if defined(DEBUG_NRF) || defined(DEBUG_NRF_USER) + nrf_atomic_u32_t val; + nrf_atomic_u32_t flag; + + /*Fetch version tests*/ + val = 0; + ASSERT(nrf_atomic_u32_store_fetch(&val, 10) == 0); + ASSERT(nrf_atomic_u32_store_fetch(&val, 0) == 10); + + val = 0; + ASSERT(nrf_atomic_u32_or_fetch(&val, 1 << 16) == 0); + ASSERT(nrf_atomic_u32_or_fetch(&val, 1 << 5) == ((1 << 16))); + ASSERT(nrf_atomic_u32_or_fetch(&val, 1 << 5) == ((1 << 16) | (1 << 5))); + ASSERT(nrf_atomic_u32_or_fetch(&val, 0) == ((1 << 16) | (1 << 5))); + ASSERT(nrf_atomic_u32_or_fetch(&val, 0xFFFFFFFF) == ((1 << 16) | (1 << 5))); + ASSERT(nrf_atomic_u32_or_fetch(&val, 0xFFFFFFFF) == (0xFFFFFFFF)); + + val = 0xFFFFFFFF; + ASSERT(nrf_atomic_u32_and_fetch(&val, ~(1 << 16)) == 0xFFFFFFFF); + ASSERT(nrf_atomic_u32_and_fetch(&val, ~(1 << 5)) == (0xFFFFFFFF & ~((1 << 16)))); + ASSERT(nrf_atomic_u32_and_fetch(&val, 0) == (0xFFFFFFFF & ~(((1 << 16) | (1 << 5))))); + ASSERT(nrf_atomic_u32_and_fetch(&val, 0xFFFFFFFF) == (0)); + + val = 0; + ASSERT(nrf_atomic_u32_xor_fetch(&val, (1 << 16)) == 0); + ASSERT(nrf_atomic_u32_xor_fetch(&val, (1 << 5)) == ((1 << 16))); + ASSERT(nrf_atomic_u32_xor_fetch(&val, 0) == ((1 << 16) | (1 << 5))); + ASSERT(nrf_atomic_u32_xor_fetch(&val, (1 << 16) | (1 << 5)) == ((1 << 16) | (1 << 5))); + ASSERT(nrf_atomic_u32_xor_fetch(&val, 0) == (0)); + + val = 0; + ASSERT(nrf_atomic_u32_add_fetch(&val, 100) == 0); + ASSERT(nrf_atomic_u32_add_fetch(&val, 100) == 100); + ASSERT(nrf_atomic_u32_add_fetch(&val, 1 << 24) == 200); + ASSERT(nrf_atomic_u32_add_fetch(&val, 0) == (200 + (1 << 24))); + ASSERT(nrf_atomic_u32_add_fetch(&val, 0xFFFFFFFF) == (200 + (1 << 24))); + ASSERT(nrf_atomic_u32_add_fetch(&val, 0) == (200 - 1 + (1 << 24))); + + val = 1000; + ASSERT(nrf_atomic_u32_sub_fetch(&val, 100) == 1000); + ASSERT(nrf_atomic_u32_sub_fetch(&val, 100) == 900); + ASSERT(nrf_atomic_u32_sub_fetch(&val, 0) == 800); + ASSERT(nrf_atomic_u32_sub_fetch(&val, 0xFFFFFFFF) == 800); + ASSERT(nrf_atomic_u32_sub_fetch(&val, 0) == 801); + + flag = 0; + ASSERT(nrf_atomic_flag_set_fetch(&flag) == 0); + ASSERT(nrf_atomic_flag_set_fetch(&flag) == 1); + ASSERT(nrf_atomic_flag_clear_fetch(&flag) == 1); + ASSERT(nrf_atomic_flag_clear_fetch(&flag) == 0); + + /*No fetch version tests*/ + val = 0; + ASSERT(nrf_atomic_u32_store(&val, 10) == 10); + ASSERT(nrf_atomic_u32_store(&val, 0) == 0); + + val = 0; + ASSERT(nrf_atomic_u32_or(&val, 1 << 16) == 1 << 16); + ASSERT(nrf_atomic_u32_or(&val, 1 << 5) == ((1 << 16) | (1 << 5))); + ASSERT(nrf_atomic_u32_or(&val, 1 << 5) == ((1 << 16) | (1 << 5))); + ASSERT(nrf_atomic_u32_or(&val, 0) == ((1 << 16) | (1 << 5))); + ASSERT(nrf_atomic_u32_or(&val, 0xFFFFFFFF) == 0xFFFFFFFF); + + val = 0xFFFFFFFF; + ASSERT(nrf_atomic_u32_and(&val, ~(1 << 16)) == (0xFFFFFFFF & ~((1 << 16)))); + ASSERT(nrf_atomic_u32_and(&val, ~(1 << 5)) == (0xFFFFFFFF & ~(((1 << 16) | (1 << 5))))); + ASSERT(nrf_atomic_u32_and(&val, 0) == 0); + + val = 0; + ASSERT(nrf_atomic_u32_xor(&val, (1 << 16)) == ((1 << 16))); + ASSERT(nrf_atomic_u32_xor(&val, (1 << 5)) == ((1 << 16) | (1 << 5))); + ASSERT(nrf_atomic_u32_xor(&val, 0) == ((1 << 16) | (1 << 5))); + ASSERT(nrf_atomic_u32_xor(&val, (1 << 16) | (1 << 5)) == 0); + + val = 0; + ASSERT(nrf_atomic_u32_add(&val, 100) == 100); + ASSERT(nrf_atomic_u32_add(&val, 100) == 200); + ASSERT(nrf_atomic_u32_add(&val, 1 << 24) == (200 + (1 << 24))); + ASSERT(nrf_atomic_u32_add(&val, 0) == (200 + (1 << 24))); + ASSERT(nrf_atomic_u32_add(&val, 0xFFFFFFFF) == (200 - 1 + (1 << 24))); + + val = 1000; + ASSERT(nrf_atomic_u32_sub(&val, 100) == 900); + ASSERT(nrf_atomic_u32_sub(&val, 100) == 800); + ASSERT(nrf_atomic_u32_sub(&val, 0) == 800); + ASSERT(nrf_atomic_u32_sub(&val, 0xFFFFFFFF) == 801); + + flag = 0; + ASSERT(nrf_atomic_flag_set(&flag) == 1); + ASSERT(nrf_atomic_flag_set(&flag) == 1); + ASSERT(nrf_atomic_flag_clear(&flag) == 0); + ASSERT(nrf_atomic_flag_clear(&flag) == 0); +#endif +} + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_ATOMIC_SANITY_CHECK_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/atomic_fifo/nrf_atfifo.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/atomic_fifo/nrf_atfifo.c new file mode 100644 index 00000000000..5d7a8ff278e --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/atomic_fifo/nrf_atfifo.c @@ -0,0 +1,189 @@ +/** + * Copyright (c) 2011 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include +#include +#include +#include "app_util.h" +#include "nrf_atfifo.h" +#include "nrf_atfifo_internal.h" + +#if NRF_ATFIFO_CONFIG_LOG_ENABLED + #define NRF_LOG_LEVEL NRF_ATFIFO_CONFIG_LOG_LEVEL + #define NRF_LOG_INIT_FILTER_LEVEL NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL + #define NRF_LOG_INFO_COLOR NRF_ATFIFO_CONFIG_INFO_COLOR + #define NRF_LOG_DEBUG_COLOR NRF_ATFIFO_CONFIG_DEBUG_COLOR +#else + #define NRF_LOG_LEVEL 0 +#endif // NRF_ATFIFO_CONFIG_LOG_ENABLED +#include "nrf_log.h" + +/* Unions testing */ +STATIC_ASSERT(sizeof(nrf_atfifo_postag_t) == sizeof(uint32_t)); + + +ret_code_t nrf_atfifo_init(nrf_atfifo_t * const p_fifo, void * p_buf, uint16_t buf_size, uint16_t item_size) +{ + if (NULL == p_buf) + { + NRF_LOG_INST_ERROR(p_fifo->p_log, "Initialization failed. p_buf == NULL"); + return NRF_ERROR_NULL; + } + if (0 != (buf_size % item_size)) + { + NRF_LOG_INST_ERROR(p_fifo->p_log, "Initialization failed. Buf_size not multiple of item_size"); + return NRF_ERROR_INVALID_LENGTH; + } + + p_fifo->p_buf = p_buf; + p_fifo->tail.tag = 0; + p_fifo->head.tag = 0; + p_fifo->buf_size = buf_size; + p_fifo->item_size = item_size; + + NRF_LOG_INST_INFO(p_fifo->p_log, "Initialized."); + return NRF_SUCCESS; +} + + +ret_code_t nrf_atfifo_clear(nrf_atfifo_t * const p_fifo) +{ + bool released = nrf_atfifo_space_clear(p_fifo); + NRF_LOG_INST_INFO(p_fifo->p_log, "Cleared result:%s", released ? "success" : "busy"); + return released ? NRF_SUCCESS : NRF_ERROR_BUSY; +} + + +ret_code_t nrf_atfifo_alloc_put(nrf_atfifo_t * const p_fifo, void const * p_var, size_t size, bool * const p_visible) +{ + nrf_atfifo_item_put_t context; + bool visible; + void * p_data = nrf_atfifo_item_alloc(p_fifo, &context); + if (NULL == p_data) + { + NRF_LOG_INST_WARNING(p_fifo->p_log, "Copying in element (0x%08X) failed - no space.", p_var); + return NRF_ERROR_NO_MEM; + } + + memcpy(p_data, p_var, size); + + visible = nrf_atfifo_item_put(p_fifo, &context); + if (NULL != p_visible) + { + *p_visible = visible; + } + NRF_LOG_INST_DEBUG(p_fifo->p_log, "Element (0x%08X) copied in.", p_var); + return NRF_SUCCESS; +} + + +void * nrf_atfifo_item_alloc(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_put_t * p_context) +{ + if (nrf_atfifo_wspace_req(p_fifo, &(p_context->last_tail))) + { + void * p_item = ((uint8_t*)(p_fifo->p_buf)) + p_context->last_tail.pos.wr; + NRF_LOG_INST_DEBUG(p_fifo->p_log, "Allocated element (0x%08X).", p_item); + return p_item; + } + NRF_LOG_INST_WARNING(p_fifo->p_log, "Allocation failed - no space."); + return NULL; +} + + +bool nrf_atfifo_item_put(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_put_t * p_context) +{ + if ((p_context->last_tail.pos.wr) == (p_context->last_tail.pos.rd)) + { + NRF_LOG_INST_DEBUG(p_fifo->p_log, "Put (uninterrupted)"); + nrf_atfifo_wspace_close(p_fifo); + return true; + } + NRF_LOG_INST_DEBUG(p_fifo->p_log, "Put (interrupted!)"); + return false; +} + + +ret_code_t nrf_atfifo_get_free(nrf_atfifo_t * const p_fifo, void * const p_var, size_t size, bool * p_released) +{ + nrf_atfifo_item_get_t context; + bool released; + void const * p_s = nrf_atfifo_item_get(p_fifo, &context); + if (NULL == p_s) + { + NRF_LOG_INST_WARNING(p_fifo->p_log, "Copying out failed - no item in the FIFO."); + return NRF_ERROR_NOT_FOUND; + } + + memcpy(p_var, p_s, size); + + released = nrf_atfifo_item_free(p_fifo, &context); + if (NULL != p_released) + { + *p_released = released; + } + NRF_LOG_INST_DEBUG(p_fifo->p_log, "Element (0x%08X) copied out.", p_var); + return NRF_SUCCESS; +} + + +void * nrf_atfifo_item_get(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_get_t * p_context) +{ + if (nrf_atfifo_rspace_req(p_fifo, &(p_context->last_head))) + { + void * p_item = ((uint8_t*)(p_fifo->p_buf)) + p_context->last_head.pos.rd; + NRF_LOG_INST_DEBUG(p_fifo->p_log, "Get element: 0x%08X", p_item); + return p_item; + } + NRF_LOG_INST_WARNING(p_fifo->p_log, "Get failed - no item in the FIFO."); + return NULL; +} + + +bool nrf_atfifo_item_free(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_get_t * p_context) +{ + if ((p_context->last_head.pos.wr) == (p_context->last_head.pos.rd)) + { + NRF_LOG_INST_DEBUG(p_fifo->p_log, "Free (uninterrupted)"); + nrf_atfifo_rspace_close(p_fifo); + return true; + } + NRF_LOG_INST_DEBUG(p_fifo->p_log, "Free (interrupted)"); + return false; +} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/atomic_fifo/nrf_atfifo.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/atomic_fifo/nrf_atfifo.h new file mode 100644 index 00000000000..37cfc7635ff --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/atomic_fifo/nrf_atfifo.h @@ -0,0 +1,424 @@ +/** + * Copyright (c) 2011 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_ATFIFO_H__ +#define NRF_ATFIFO_H__ + +#include +#include +#include "sdk_config.h" +#include "nordic_common.h" +#include "nrf_assert.h" +#include "sdk_errors.h" +#include "nrf_log_instance.h" +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_atfifo Atomic FIFO + * @ingroup app_common + * + * @brief @tagAPI52 FIFO implementation that allows for making atomic transactions without + * locking interrupts. + * + * @details There are two types of functions to prepare the FIFO writing: + * - Single function for simple access: + * @code + * if (NRF_SUCCESS != nrf_atfifo_simple_put(my_fifo, &data, NULL)) + * { + * // Error handling + * } + * @endcode + * - Function pair to limit data copying: + * @code + * struct point3d + * { + * int x, y, z; + * }point3d_t; + * nrf_atfifo_context_t context; + * point3d_t * point; + * + * if (NULL != (point = nrf_atfifo_item_alloc(my_fifo, &context))) + * { + * point->x = a; + * point->y = b; + * point->z = c; + * if (nrf_atfifo_item_put(my_fifo, &context)) + * { + * // Send information to the rest of the system + * // that there is new data in the FIFO available for reading. + * } + * } + * else + * { + * // Error handling + * } + * + * @endcode + * @note + * This atomic FIFO implementation requires that the operation that is + * opened last is finished (committed/flushed) first. + * This is typical for operations performed from the interrupt runtime + * when the other operation is performed from the main thread. + * + * This implementation does not support typical multithreading operating system + * access where operations can be started and finished in totally unrelated order. + * + * @{ + */ + +/** + * @brief Read and write position structure. + * + * A structure that holds the read and write position used by the FIFO head and tail. + */ +typedef struct nrf_atfifo_postag_pos_s +{ + uint16_t wr; //!< First free space to write the data + uint16_t rd; //!< A place after the last data to read +}nrf_atfifo_postag_pos_t; + +/** + * @brief End data index tag. + * + * A tag used to mark the end of data. + * To properly realize atomic data committing, the whole variable has to be + * accessed atomically. + */ +typedef union nrf_atfifo_postag_u +{ + uint32_t tag; //!< Whole tag, used for atomic, 32-bit access + nrf_atfifo_postag_pos_t pos; //!< Structure that holds reading and writing position separately +}nrf_atfifo_postag_t; + +/** + * @brief The FIFO instance. + * + * The instance of atomic FIFO. + * Used with all FIFO functions. + */ +typedef struct nrf_atfifo_s +{ + void * p_buf; //!< Pointer to the data buffer + nrf_atfifo_postag_t tail; //!< Read and write tail position tag + nrf_atfifo_postag_t head; //!< Read and write head position tag + uint16_t buf_size; //!< FIFO size in number of bytes (has to be divisible by @c item_size) + uint16_t item_size; //!< Size of a single FIFO item + NRF_LOG_INSTANCE_PTR_DECLARE(p_log) //!< Pointer to instance of the logger object (Conditionally compiled). +}nrf_atfifo_t; + +/** + * @brief FIFO write operation item context. + * + * Context structure used to mark an allocated space in FIFO that is ready for put. + * All the data required to properly put allocated and written data. + */ +typedef struct nrf_atfifo_item_put_s +{ + nrf_atfifo_postag_t last_tail; //!< Tail tag value that was here when opening the FIFO to write +}nrf_atfifo_item_put_t; + + +/** + * @brief FIFO read operation item context. + * + * Context structure used to mark an opened get operation to properly free an item after reading. + */ +typedef struct nrf_atfifo_rcontext_s +{ + nrf_atfifo_postag_t last_head; //!< Head tag value that was here when opening the FIFO to read +}nrf_atfifo_item_get_t; + + +/** @brief Name of the module used for logger messaging. + */ +#define NRF_ATFIFO_LOG_NAME atfifo + +/** + * @defgroup nrf_atfifo_instmacros FIFO instance macros + * + * A group of macros helpful for FIFO instance creation and initialization. + * They may be used to create and initialize instances for most use cases. + * + * FIFO may also be created and initialized directly using + * @ref nrf_atfifo_init function. + * @{ + */ + /** + * @brief Macro for generating the name for a data buffer. + * + * The name of the data buffer that would be created by + * @ref NRF_ATFIFO_DEF macro. + * + * @param[in] fifo_id Identifier of the FIFO object. + * + * @return Name of the buffer variable. + * + * @note This is auxiliary internal macro and in normal usage + * it should not be called. + */ + #define NRF_ATFIFO_BUF_NAME(fifo_id) CONCAT_2(fifo_id, _data) + + /** + * @brief Macro for generating the name for a FIFO instance. + * + * The name of the instance variable that will be created by the + * @ref NRF_ATFIFO_DEF macro. + * + * @param[in] fifo_id Identifier of the FIFO object. + * + * @return Name of the instance variable. + * + * @note This is auxiliary internal macro and in normal usage + * it should not be called. + */ + #define NRF_ATFIFO_INST_NAME(fifo_id) CONCAT_2(fifo_id, _inst) + + /** + * @brief Macro for creating an instance. + * + * Creates the FIFO object variable itself. + * + * Usage example: + * @code + * NRF_ATFIFO_DEF(my_fifo, uint16_t, 12); + * NRF_ATFIFO_INIT(my_fifo); + * + * uint16_t some_val = 45; + * nrf_atfifo_item_put(my_fifo, &some_val, sizeof(some_val), NULL); + * nrf_atfifo_item_get(my_fifo, &some_val, sizeof(some_val), NULL); + * @endcode + * + * @param[in] fifo_id Identifier of a FIFO object. + * This identifier will be a pointer to the instance. + * It makes it possible to use this directly for the functions + * that operate on the FIFO. + * Because it is a static const object, it should be optimized by the compiler. + * @param[in] storage_type Type of data that will be stored in the FIFO. + * @param[in] item_cnt Capacity of the created FIFO in maximum number of items that may be stored. + * The phisical size of the buffer will be 1 element bigger. + */ + #define NRF_ATFIFO_DEF(fifo_id, storage_type, item_cnt) \ + static storage_type NRF_ATFIFO_BUF_NAME(fifo_id)[(item_cnt)+1]; \ + NRF_LOG_INSTANCE_REGISTER(NRF_ATFIFO_LOG_NAME, fifo_id, \ + NRF_ATFIFO_CONFIG_INFO_COLOR, \ + NRF_ATFIFO_CONFIG_DEBUG_COLOR, \ + NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL, \ + NRF_ATFIFO_CONFIG_LOG_ENABLED ? \ + NRF_ATFIFO_CONFIG_LOG_LEVEL : NRF_LOG_SEVERITY_NONE); \ + static nrf_atfifo_t NRF_ATFIFO_INST_NAME(fifo_id) = { \ + .p_buf = NULL, \ + NRF_LOG_INSTANCE_PTR_INIT(p_log, NRF_ATFIFO_LOG_NAME, fifo_id) \ + }; \ + static nrf_atfifo_t * const fifo_id = &NRF_ATFIFO_INST_NAME(fifo_id) + + /** + * @brief Macro for initializing the FIFO that was previously declared by the macro. + * + * Use this macro to simplify FIFO initialization. + * + * @note + * This macro can be only used on a FIFO object defined by @ref NRF_ATFIFO_DEF macro. + * + * @param[in] fifo_id Identifier of the FIFO object. + * + * @return Value from the @ref nrf_atfifo_init function. + */ + #define NRF_ATFIFO_INIT(fifo_id) \ + nrf_atfifo_init( \ + fifo_id, \ + NRF_ATFIFO_BUF_NAME(fifo_id), \ + sizeof(NRF_ATFIFO_BUF_NAME(fifo_id)), \ + sizeof(NRF_ATFIFO_BUF_NAME(fifo_id)[0]) \ + ) + +/** @} */ + +/** + * @brief Function for initializing the FIFO. + * + * Preparing the FIFO instance to work. + * + * @param[out] p_fifo FIFO object to initialize. + * @param[in,out] p_buf FIFO buffer for storing data. + * @param[in] buf_size Total buffer size (has to be divisible by @c item_size). + * @param[in] item_size Size of a single item held inside the FIFO. + * + * @retval NRF_SUCCESS If initialization was successful. + * @retval NRF_ERROR_NULL If a NULL pointer is provided as the buffer. + * @retval NRF_ERROR_INVALID_LENGTH If size of the buffer provided is not divisible by @c item_size. + * + * @note + * Buffer size must be able to hold one element more than the designed FIFO capacity. + * This one, empty element is used for overflow checking. + */ +ret_code_t nrf_atfifo_init(nrf_atfifo_t * const p_fifo, void * p_buf, uint16_t buf_size, uint16_t item_size); + +/** + * @brief Function for clearing the FIFO. + * + * Function for clearing the FIFO. + * + * If this function is called during an opened and uncommitted write operation, + * the FIFO is cleared up to the currently ongoing commit. + * There is no possibility to cancel an ongoing commit. + * + * If this function is called during an opened and unflushed read operation, + * the read position in the head is set, but copying it into the write head position + * is left to read closing operation. + * + * This way, there is no more data to read, but the memory is released + * in the moment when it is safe. + * + * @param[in,out] p_fifo FIFO object. + * + * @retval NRF_SUCCESS FIFO totally cleared. + * @retval NRF_ERROR_BUSY Function called in the middle of writing or reading operation. + * If it is called in the middle of writing operation, + * FIFO was cleared up to the already started and uncommitted write. + * If it is called in the middle of reading operation, + * write head was only moved. It will be copied into read tail when the reading operation + * is flushed. + */ +ret_code_t nrf_atfifo_clear(nrf_atfifo_t * const p_fifo); + +/** + * @brief Function for atomically putting data into the FIFO. + * + * It uses memcpy function inside and in most situations, it is more suitable to + * use @ref nrf_atfifo_item_alloc, write the data, and @ref nrf_atfifo_item_put to store a new value + * in a FIFO. + * + * @param[in,out] p_fifo FIFO object. + * @param[in] p_var Variable to copy. + * @param[in] size Size of the variable to copy. + * Can be smaller or equal to the FIFO item size. + * @param[out] p_visible See value returned by @ref nrf_atfifo_item_put. + * It may be NULL if the caller does not require the current operation status. + * + * @retval NRF_SUCCESS If an element has been successfully added to the FIFO. + * @retval NRF_ERROR_NO_MEM If the FIFO is full. + * + * @note + * To avoid data copying, you can use the @ref nrf_atfifo_item_alloc and @ref nrf_atfifo_item_put + * functions pair. + */ +ret_code_t nrf_atfifo_alloc_put(nrf_atfifo_t * const p_fifo, void const * const p_var, size_t size, bool * const p_visible); + +/** + * @brief Function for opening the FIFO for writing. + * + * Function called to start the FIFO write operation and access the given FIFO buffer directly. + * + * @param[in,out] p_fifo FIFO object. + * @param[out] p_context Operation context, required by @ref nrf_atfifo_item_put. + * + * @return Pointer to the space where variable data can be stored. + * NULL if there is no space in the buffer. + */ +void * nrf_atfifo_item_alloc(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_put_t * p_context); + +/** + * @brief Function for closing the writing operation. + * + * Puts a previously allocated context into FIFO. + * This function must be called to commit an opened write operation. + * It sets all the buffers and marks the data, so that it is visible to read. + * + * @param[in,out] p_fifo FIFO object. + * @param[in] p_context Operation context, filled by the @ref nrf_atfifo_item_alloc function. + * + * @retval true Data is currently ready and will be visible to read. + * @retval false The internal commit was marked, but the writing operation interrupted another writing operation. + * The data will be available to read when the interrupted operation is committed. + */ +bool nrf_atfifo_item_put(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_put_t * p_context); + +/** + * @brief Function for getting a single value from the FIFO. + * + * This function gets the value from the top of the FIFO. + * The value is removed from the FIFO memory. + * + * @param[in,out] p_fifo FIFO object. + * @param[out] p_var Pointer to the variable to store the data. + * @param[in] size Size of the data to be loaded. + * @param[out] p_released See the values returned by @ref nrf_atfifo_item_free. + * + * @retval NRF_SUCCESS Element was successfully copied from the FIFO memory. + * @retval NRF_ERROR_NOT_FOUND No data in the FIFO. + */ +ret_code_t nrf_atfifo_get_free(nrf_atfifo_t * const p_fifo, void * const p_var, size_t size, bool * p_released); + +/** + * @brief Function for opening the FIFO for reading. + * + * Function called to start the FIFO read operation and access the given FIFO buffer directly. + * + * @param[in,out] p_fifo FIFO object. + * @param[out] p_context The operation context, required by @ref nrf_atfifo_item_free + * + * @return Pointer to data buffer or NULL if there is no data in the FIFO. + */ +void * nrf_atfifo_item_get(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_get_t * p_context); + +/** + * @brief Function for closing the reading operation. + * + * Function used to finish the reading operation. + * If this reading operation does not interrupt another reading operation, the head write buffer is moved. + * If this reading operation is placed in the middle of another reading, only the new read pointer is written. + * + * @param[in,out] p_fifo FIFO object. + * @param[in] p_context Context of the reading operation to be closed. + * + * @retval true This operation is not generated in the middle of another read operation and the write head will be updated to the read head (space is released). + * @retval false This operation was performed in the middle of another read operation and the write buffer head was not moved (no space is released). + */ +bool nrf_atfifo_item_free(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_get_t * p_context); + + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_ATFIFO_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/atomic_fifo/nrf_atfifo_internal.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/atomic_fifo/nrf_atfifo_internal.h new file mode 100644 index 00000000000..d8623521fb5 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/atomic_fifo/nrf_atfifo_internal.h @@ -0,0 +1,578 @@ +/** + * Copyright (c) 2011 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/** + * @file + * @brief Atomic FIFO internal file + * + * This file should be included only by nrf_atfifo internally. + * Needs nrf_atfifo.h included first. + */ +#ifndef NRF_ATFIFO_H__ +#error This is internal file. Do not include this file in your program. +#endif + +#ifndef NRF_ATFIFO_INTERNAL_H__ +#define NRF_ATFIFO_INTERNAL_H__ +#include +#include "nrf.h" +#include "app_util.h" +#include "nordic_common.h" + +#if ((__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)) == 0 +#error Unsupported core version +#endif + +/* + * Make sure that rd and wr pos in a tag are aligned like expected + * Changing this would require changes inside assembly code! + */ +// Mbed - saving for later... we run armcc in a gcc mode and this is causigg a problem +// STATIC_ASSERT(offsetof(nrf_atfifo_postag_pos_t, wr) == 0); +// STATIC_ASSERT(offsetof(nrf_atfifo_postag_pos_t, rd) == 2); + +/** + * @brief Atomically reserve space for a new write. + * + * @param[in,out] p_fifo FIFO object. + * @param[out] old_tail Tail position tag before new space is reserved. + * + * @retval true Space available. + * @retval false Memory full. + * + * @sa nrf_atfifo_wspace_close + */ +static bool nrf_atfifo_wspace_req(nrf_atfifo_t * const p_fifo, nrf_atfifo_postag_t * const p_old_tail); + +/** + * @brief Atomically mark all written data available. + * + * This function marks all data available for reading. + * This marking is done by copying tail.pos.wr into tail.pos.rd. + * + * It must be called only when closing the first write. + * It cannot be called if any write access was interrupted. + * See the code below: + * @code + * if (old_tail.pos.wr == old_tail.pos.rd) + * { + * nrf_atfifo_wspace_close(my_fifo); + * return true; + * } + * return false; + * @endcode + * + * @param[in,out] p_fifo FIFO object. + * + * @sa nrf_atfifo_wspace_req + */ +static void nrf_atfifo_wspace_close(nrf_atfifo_t * const p_fifo); + +/** + * @brief Atomically get a part of a buffer to read data. + * + * @param[in,out] p_fifo FIFO object. + * @param[out] old_head Head position tag before the data buffer is read. + * + * @retval true Data available for reading. + * @retval false No data in the buffer. + * + * @sa nrf_atfifo_rspace_close + */ +static bool nrf_atfifo_rspace_req(nrf_atfifo_t * const p_fifo, nrf_atfifo_postag_t * const p_old_head); + +/** + * @brief Atomically release all read data. + * + * This function marks all data that was read as free space, + * which is available for writing. + * This marking is done by copying head.pos.rd into head.pos.wr. + * + * It must be called only when closing the first read. + * It cannot be called when the current read access interrupted any other read access. + * See code below: + * @code + * if (old_head.pos.wr == old_head.pos.rd) + * { + * nrf_atfifo_rspace_close(my_fifo); + * return true; + * } + * return false; + * @endcode + * + * @param[in,out] p_fifo FIFO object. + * + * @sa nrf_atfifo_rspace_req + */ +static void nrf_atfifo_rspace_close(nrf_atfifo_t * const p_fifo); + +/** + * @brief Safely clear the FIFO, internal function. + * + * This function realizes the functionality required by @ref nrf_atfifo_clear. + * + * @param[in,out] p_fifo FIFO object. + * + * @retval true All the data was released. + * @retval false All the data available for releasing was released, but there is some pending transfer. + */ +static bool nrf_atfifo_space_clear(nrf_atfifo_t * const p_fifo); + + +/* --------------------------------------------------------------------------- + * Implementation starts here + */ + +#if defined ( __CC_ARM ) + + +__ASM bool nrf_atfifo_wspace_req(nrf_atfifo_t * const p_fifo, nrf_atfifo_postag_t * const p_old_tail) +{ + /* Registry usage: + * R0 - p_fifo + * R1 - p_old_tail + * R2 - internal variable old_tail (saved by caller) + * R3 - internal variable new_tail (saved by caller) + * R4 - internal temporary register (saved by this function) + * R5 - not used stored to keep the stack aligned to 8 bytes + * Returned value: + * R0 (bool - 32 bits) + */ + push {r4, r5} +nrf_atfifo_wspace_req_repeat + /* Load tail tag and set memory monitor !!! R2 - old tail !!! */ + ldrex r2, [r0, #__cpp(offsetof(nrf_atfifo_t, tail))] + /* Extract write position !!! R3 !!! */ + uxth r3, r2 + /* Increment address with overload support !!! R4 used temporary !!! */ + ldrh r4, [r0, #__cpp(offsetof(nrf_atfifo_t, item_size))] + add r3, r4 + ldrh r4, [r0, #__cpp(offsetof(nrf_atfifo_t, buf_size))] + cmp r3, r4 + it hs + subhs r3, r3, r4 + + /* Check if FIFO would overload after making this increment !!! R4 used temporary !!! */ + ldrh r4, [r0, #__cpp(offsetof(nrf_atfifo_t, head) + offsetof(nrf_atfifo_postag_pos_t, wr))] + cmp r3, r4 + ittt eq + clrexeq + moveq r0, #__cpp(false) + beq nrf_atfifo_wspace_req_exit + + /* Pack everything back !!! R3 - new tail !!! */ + /* Copy lower byte from new_tail, and higher byte is a value from the top of old_tail */ + pkhbt r3, r3, r2 + + /* Store new value clearing memory monitor !!! R4 used temporary !!! */ + strex r4, r3, [r0, #__cpp(offsetof(nrf_atfifo_t, tail))] + cmp r4, #0 + bne nrf_atfifo_wspace_req_repeat + + /* Return true */ + mov r0, #__cpp(true) +nrf_atfifo_wspace_req_exit + /* Save old tail */ + str r2, [r1] + pop {r4, r5} + bx lr +} + + +__ASM void nrf_atfifo_wspace_close(nrf_atfifo_t * const p_fifo) +{ + /* Registry usage: + * R0 - p_fifo + * R1 - internal temporary register + * R2 - new_tail + */ +nrf_atfifo_wspace_close_repeat + ldrex r2, [r0, #__cpp(offsetof(nrf_atfifo_t, tail))] + /* Copy from lower byte to higher */ + pkhbt r2, r2, r2, lsl #16 + + strex r1, r2, [r0, #__cpp(offsetof(nrf_atfifo_t, tail))] + cmp r1, #0 + bne nrf_atfifo_wspace_close_repeat + bx lr +} + + +__ASM bool nrf_atfifo_rspace_req(nrf_atfifo_t * const p_fifo, nrf_atfifo_postag_t * const p_old_head) +{ + /* Registry usage: + * R0 - p_fifo + * R1 - p_old_head + * R2 - internal variable old_head (saved by caller) + * R3 - internal variable new_head (saved by caller) + * R4 - internal temporary register (saved by this function) + * R5 - not used stored to keep the stack aligned to 8 bytes + * Returned value: + * R0 (bool - 32 bits) + */ + push {r4, r5} +nrf_atfifo_rspace_req_repeat + /* Load tail tag and set memory monitor !!! R2 - old tail !!! */ + ldrex r2, [r0, #__cpp(offsetof(nrf_atfifo_t, head))] + /* Extract read position !!! R3 !!! */ + uxth r3, r2, ror #16 + + /* Check if we have any data !!! R4 used temporary !!! */ + ldrh r4, [r0, #__cpp(offsetof(nrf_atfifo_t, tail) + offsetof(nrf_atfifo_postag_pos_t, rd))] + cmp r3, r4 + ittt eq + clrexeq + moveq r0, #__cpp(false) + beq nrf_atfifo_rspace_req_exit + + /* Increment address with overload support !!! R4 used temporary !!! */ + ldrh r4, [r0, #__cpp(offsetof(nrf_atfifo_t, item_size))] + add r3, r4 + ldrh r4, [r0, #__cpp(offsetof(nrf_atfifo_t, buf_size))] + cmp r3, r4 + it hs + subhs r3, r3, r4 + + /* Pack everything back !!! R3 - new tail !!! */ + /* Copy lower byte from old_head, and higher byte is a value from write_pos */ + pkhbt r3, r2, r3, lsl #16 + + /* Store new value clearing memory monitor !!! R4 used temporary !!! */ + strex r4, r3, [r0, #__cpp(offsetof(nrf_atfifo_t, head))] + cmp r4, #0 + bne nrf_atfifo_rspace_req_repeat + + /* Return true */ + mov r0, #__cpp(true) +nrf_atfifo_rspace_req_exit + /* Save old head */ + str r2, [r1] + pop {r4, r5} + bx lr +} + + +__ASM void nrf_atfifo_rspace_close(nrf_atfifo_t * const p_fifo) +{ + /* Registry usage: + * R0 - p_fifo + * R1 - internal temporary register + * R2 - new_tail + */ +nrf_atfifo_rspace_close_repeat + ldrex r2, [r0, #__cpp(offsetof(nrf_atfifo_t, head))] + /* Copy from higher byte to lower */ + pkhtb r2, r2, r2, asr #16 + + strex r1, r2, [r0, #__cpp(offsetof(nrf_atfifo_t, head))] + cmp r1, #0 + bne nrf_atfifo_rspace_close_repeat + bx lr +} + + +__ASM bool nrf_atfifo_space_clear(nrf_atfifo_t * const p_fifo) +{ + /* Registry usage: + * R0 - p_fifo as input, bool output after + * R1 - tail, rd pointer, new_head + * R2 - head_old, destroyed when creating new_head + * R3 - p_fifo - copy + */ + mov r3, r0 +nrf_atfifo_space_clear_repeat + /* Load old head in !!! R2 register !!! and read pointer of tail in !!! R1 register !!! */ + ldrex r2, [r3, #__cpp(offsetof(nrf_atfifo_t, head))] + ldrh r1, [r3, #__cpp(offsetof(nrf_atfifo_t, tail) + offsetof(nrf_atfifo_postag_pos_t, rd))] + cmp r2, r2, ror #16 + /* Return false as default */ + mov r0, #__cpp(false) + /* Create new head in !!! R1 register !!! Data in !!! R2 register broken !!! */ + itett ne + uxthne r2, r2 + orreq r1, r1, r1, lsl #16 + orrne r1, r2, r1, lsl #16 + + /* Skip header test */ + bne nrf_atfifo_space_clear_head_test_skip + + /* Load whole tail and test it !!! R2 used !!! */ + ldr r2, [r3, #__cpp(offsetof(nrf_atfifo_t, tail))] + cmp r2, r2, ror #16 + /* Return true if equal */ + it eq + moveq r0, #__cpp(true) + +nrf_atfifo_space_clear_head_test_skip + /* Store and test if success !!! R2 used temporary !!! */ + strex r2, r1, [r3, #__cpp(offsetof(nrf_atfifo_t, head))] + cmp r2, #0 + bne nrf_atfifo_space_clear_repeat + bx lr +} + +#elif defined ( __ICCARM__ ) || defined ( __GNUC__ ) + +bool nrf_atfifo_wspace_req(nrf_atfifo_t * const p_fifo, nrf_atfifo_postag_t * const p_old_tail) +{ + volatile bool ret; + volatile uint32_t old_tail; + uint32_t new_tail; + uint32_t temp; + + __ASM volatile( + /* For more comments see Keil version above */ + "1: \n" + " ldrex %[old_tail], [%[p_fifo], %[offset_tail]] \n" + " uxth %[new_tail], %[old_tail] \n" + " \n" + " ldrh %[temp], [%[p_fifo], %[offset_item_size]] \n" + " add %[new_tail], %[temp] \n" + " ldrh %[temp], [%[p_fifo], %[offset_buf_size]] \n" + " cmp %[new_tail], %[temp] \n" + " it hs \n" + " subhs %[new_tail], %[new_tail], %[temp] \n" + " \n" + " ldrh %[temp], [%[p_fifo], %[offset_head_wr]] \n" + " cmp %[new_tail], %[temp] \n" + " ittt eq \n" + " clrexeq \n" + " moveq %[ret], %[false_val] \n" + " beq.n 2f \n" + " \n" + " pkhbt %[new_tail], %[new_tail], %[old_tail] \n" + " \n" + " strex %[temp], %[new_tail], [%[p_fifo], %[offset_tail]] \n" + " cmp %[temp], #0 \n" + " bne.n 1b \n" + " \n" + " mov %[ret], %[true_val] \n" + "2: \n" + : /* Output operands */ + [ret] "=r"(ret), + [temp] "=&r"(temp), + [old_tail]"=&r"(old_tail), + [new_tail]"=&r"(new_tail) + : /* Input operands */ + [p_fifo] "r"(p_fifo), + [offset_tail] "J"(offsetof(nrf_atfifo_t, tail)), + [offset_head_wr] "J"(offsetof(nrf_atfifo_t, head) + offsetof(nrf_atfifo_postag_pos_t, wr)), + [offset_item_size]"J"(offsetof(nrf_atfifo_t, item_size)), + [offset_buf_size] "J"(offsetof(nrf_atfifo_t, buf_size)), + [true_val] "I"(true), + [false_val] "I"(false) + : /* Clobbers */ + "cc"); + + p_old_tail->tag = old_tail; + UNUSED_VARIABLE(new_tail); + UNUSED_VARIABLE(temp); + return ret; +} + + +void nrf_atfifo_wspace_close(nrf_atfifo_t * const p_fifo) +{ + uint32_t temp; + uint32_t new_tail; + + __ASM volatile( + /* For more comments see Keil version above */ + "1: \n" + " ldrex %[new_tail], [%[p_fifo], %[offset_tail]] \n" + " pkhbt %[new_tail],%[new_tail], %[new_tail], lsl #16 \n" + " \n" + " strex %[temp], %[new_tail], [%[p_fifo], %[offset_tail]] \n" + " cmp %[temp], #0 \n" + " bne.n 1b \n" + : /* Output operands */ + [temp] "=&r"(temp), + [new_tail] "=&r"(new_tail) + : /* Input operands */ + [p_fifo] "r"(p_fifo), + [offset_tail] "J"(offsetof(nrf_atfifo_t, tail)) + : /* Clobbers */ + "cc"); + + UNUSED_VARIABLE(temp); + UNUSED_VARIABLE(new_tail); +} + + +bool nrf_atfifo_rspace_req(nrf_atfifo_t * const p_fifo, nrf_atfifo_postag_t * const p_old_head) +{ + volatile bool ret; + volatile uint32_t old_head; + uint32_t new_head; + uint32_t temp; + + __ASM volatile( + /* For more comments see Keil version above */ + "1: \n" + " ldrex %[old_head], [%[p_fifo], %[offset_head]] \n" + " uxth %[new_head], %[old_head], ror #16 \n" + " \n" + " ldrh %[temp], [%[p_fifo], %[offset_tail_rd]] \n" + " cmp %[new_head], %[temp] \n" + " ittt eq \n" + " clrexeq \n" + " moveq %[ret], %[false_val] \n" + " beq.n 2f \n" + " \n" + " ldrh %[temp], [%[p_fifo], %[offset_item_size]] \n" + " add %[new_head], %[temp] \n" + " ldrh %[temp], [%[p_fifo], %[offset_buf_size]] \n" + " cmp %[new_head], %[temp] \n" + " it hs \n" + " subhs %[new_head], %[new_head], %[temp] \n" + " \n" + " pkhbt %[new_head], %[old_head], %[new_head], lsl #16 \n" + " \n" + " strex %[temp], %[new_head], [%[p_fifo], %[offset_head]] \n" + " cmp %[temp], #0 \n" + " bne.n 1b \n" + " \n" + " mov %[ret], %[true_val] \n" + "2: \n" + : /* Output operands */ + [ret] "=r"(ret), + [temp] "=&r"(temp), + [old_head]"=&r"(old_head), + [new_head]"=&r"(new_head) + : /* Input operands */ + [p_fifo] "r"(p_fifo), + [offset_head] "J"(offsetof(nrf_atfifo_t, head)), + [offset_tail_rd] "J"(offsetof(nrf_atfifo_t, tail) + offsetof(nrf_atfifo_postag_pos_t, rd)), + [offset_item_size]"J"(offsetof(nrf_atfifo_t, item_size)), + [offset_buf_size] "J"(offsetof(nrf_atfifo_t, buf_size)), + [true_val] "I"(true), + [false_val] "I"(false) + : /* Clobbers */ + "cc"); + + p_old_head->tag = old_head; + UNUSED_VARIABLE(new_head); + UNUSED_VARIABLE(temp); + return ret; +} + + +void nrf_atfifo_rspace_close(nrf_atfifo_t * const p_fifo) +{ + uint32_t temp; + uint32_t new_head; + + __ASM volatile( + /* For more comments see Keil version above */ + "1: \n" + " ldrex %[new_head], [%[p_fifo], %[offset_head]] \n" + " pkhtb %[new_head],%[new_head], %[new_head], asr #16 \n" + " \n" + " strex %[temp], %[new_head], [%[p_fifo], %[offset_head]] \n" + " cmp %[temp], #0 \n" + " bne.n 1b \n" + : /* Output operands */ + [temp] "=&r"(temp), + [new_head] "=&r"(new_head) + : /* Input operands */ + [p_fifo] "r"(p_fifo), + [offset_head] "J"(offsetof(nrf_atfifo_t, head)) + : /* Clobbers */ + "cc"); + + UNUSED_VARIABLE(temp); + UNUSED_VARIABLE(new_head); +} + + +bool nrf_atfifo_space_clear(nrf_atfifo_t * const p_fifo) +{ + volatile bool ret; + uint32_t old_head; /* This variable is left broken after assembly code finishes */ + uint32_t new_head; + + __ASM volatile( + "1: \n" + " ldrex %[old_head], [%[p_fifo], %[offset_head]] \n" + " ldrh %[new_head], [%[p_fifo], %[offset_tail_rd]] \n" + " cmp %[old_head], %[old_head], ror #16 \n" + " \n" + " mov %[ret], %[false_val] \n" + " \n" + " itett ne \n" + " uxthne %[old_head], %[old_head] \n" + " orreq %[new_head], %[new_head], %[new_head], lsl #16 \n" + " orrne %[new_head], %[old_head], %[new_head], lsl #16 \n" + " \n" + " bne.n 2f \n" + " \n" + " ldr %[old_head], [%[p_fifo], %[offset_tail]] \n" + " cmp %[old_head], %[old_head], ror #16 \n" + " it eq \n" + " moveq %[ret], %[true_val] \n" + " \n" + "2: \n" + " strex %[old_head], %[new_head], [%[p_fifo], %[offset_head]] \n" + " cmp %[old_head], #0 \n" + " bne.n 1b \n" + : /* Output operands */ + [ret] "=&r"(ret), + [old_head] "=&r"(old_head), + [new_head] "=&r"(new_head) + : /* Input operands */ + [p_fifo] "r"(p_fifo), + [offset_head] "J"(offsetof(nrf_atfifo_t, head)), + [offset_tail] "J"(offsetof(nrf_atfifo_t, tail)), + [offset_tail_rd] "J"(offsetof(nrf_atfifo_t, tail) + offsetof(nrf_atfifo_postag_pos_t, rd)), + [true_val] "I"(true), + [false_val] "I"(false) + : /* Clobbers */ + "cc"); + + UNUSED_VARIABLE(old_head); + UNUSED_VARIABLE(new_head); + return ret; +} + +#else +#error Unsupported compiler +#endif + +#endif /* NRF_ATFIFO_INTERNAL_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/balloc/nrf_balloc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/balloc/nrf_balloc.c new file mode 100644 index 00000000000..d228f32e0ee --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/balloc/nrf_balloc.c @@ -0,0 +1,399 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "sdk_common.h" + #if NRF_MODULE_ENABLED(NRF_BALLOC) + +#include "nrf_section.h" +#include "nrf_balloc.h" +#include "app_util_platform.h" + + +#if NRF_BALLOC_CONFIG_LOG_ENABLED + #define NRF_LOG_LEVEL NRF_BALLOC_CONFIG_LOG_LEVEL + #define NRF_LOG_INITIAL_LEVEL NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL + #define NRF_LOG_INFO_COLOR NRF_BALLOC_CONFIG_INFO_COLOR + #define NRF_LOG_DEBUG_COLOR NRF_BALLOC_CONFIG_DEBUG_COLOR +#else + #define NRF_LOG_LEVEL 0 +#endif // NRF_BALLOC_CONFIG_LOG_ENABLED +#include "nrf_log.h" + +#define HEAD_GUARD_FILL 0xBAADF00D /**< Magic number used to mark head guard.*/ +#define TAIL_GUARD_FILL 0xBAADCAFE /**< Magic number used to mark tail guard.*/ +#define FREE_MEM_FILL 0xBAADBAAD /**< Magic number used to mark free memory.*/ + +#if NRF_BALLOC_CONFIG_DEBUG_ENABLED +#define POOL_ID(_p_pool) _p_pool->p_name +#define POOL_MARKER "%s" +#else +#define POOL_ID(_p_pool) _p_pool +#define POOL_MARKER "0x%08X" +#endif + +NRF_SECTION_DEF(nrf_balloc, nrf_balloc_t); + +#if NRF_BALLOC_CLI_CMDS +#include "nrf_cli.h" + +static void nrf_balloc_status(nrf_cli_t const * p_cli, size_t argc, char **argv) +{ + UNUSED_PARAMETER(argv); + + if (nrf_cli_help_requested(p_cli)) + { + nrf_cli_help_print(p_cli, NULL, 0); + return; + } + + if (argc > 1) + { + nrf_cli_fprintf(p_cli, NRF_CLI_ERROR, "Bad argument count"); + return; + } + + uint32_t num_of_instances = NRF_SECTION_ITEM_COUNT(nrf_balloc, nrf_balloc_t); + uint32_t i; + + for (i = 0; i < num_of_instances; i++) + { + const nrf_balloc_t * p_instance = NRF_SECTION_ITEM_GET(nrf_balloc, nrf_balloc_t, i); + + uint32_t element_size = NRF_BALLOC_ELEMENT_SIZE(p_instance); + uint32_t dbg_addon = p_instance->block_size - element_size; + uint32_t pool_size = p_instance->p_stack_limit - p_instance->p_stack_base; + uint32_t max_util = nrf_balloc_max_utilization_get(p_instance); + uint32_t util = nrf_balloc_utilization_get(p_instance); + const char * p_name = p_instance->p_name; + nrf_cli_fprintf(p_cli, NRF_CLI_NORMAL, + "%s\r\n\t- Element size:\t%d + %d bytes of debug information\r\n" + "\t- Usage:\t%u%% (%u out of %u elements)\r\n" + "\t- Maximum:\t%u%% (%u out of %u elements)\r\n\r\n", + p_name, element_size, dbg_addon, + 100ul * util/pool_size, util,pool_size, + 100ul * max_util/pool_size, max_util,pool_size); + + } +} +// Register "balloc" command and its subcommands in CLI. +NRF_CLI_CREATE_STATIC_SUBCMD_SET(nrf_balloc_commands) +{ + NRF_CLI_CMD(status, NULL, "Print status of balloc instances.", nrf_balloc_status), + NRF_CLI_SUBCMD_SET_END +}; + +NRF_CLI_CMD_REGISTER(balloc, &nrf_balloc_commands, "Commands for BALLOC management", nrf_balloc_status); +#endif //NRF_BALLOC_CLI_CMDS + +#if NRF_BALLOC_CONFIG_DEBUG_ENABLED +/**@brief Validate block memory, prepare block guards, and calculate pointer to the element. + * + * @param[in] p_pool Pointer to the memory pool. + * @param[in] p_head Pointer to the beginning of the block. + * + * @return Pointer to the element. + */ +__STATIC_INLINE void * nrf_balloc_block_unwrap(nrf_balloc_t const * p_pool, void * p_head) +{ + ASSERT((p_pool != NULL) && ((p_pool->block_size % sizeof(uint32_t)) == 0)); + ASSERT((p_head != NULL) && (((uint32_t)(p_head) % sizeof(uint32_t)) == 0)); + + uint32_t head_words = NRF_BALLOC_DEBUG_HEAD_GUARD_WORDS_GET(p_pool->debug_flags); + uint32_t tail_words = NRF_BALLOC_DEBUG_TAIL_GUARD_WORDS_GET(p_pool->debug_flags); + + uint32_t * p_tail = (uint32_t *)((size_t)(p_head) + p_pool->block_size); + uint32_t * p_element = (uint32_t *)p_head + head_words; + + if (NRF_BALLOC_DEBUG_DATA_TRASHING_CHECK_GET(p_pool->debug_flags)) + { + for (uint32_t * ptr = p_head; ptr < p_tail; ptr++) + { + if (*ptr != FREE_MEM_FILL) + { + NRF_LOG_INST_ERROR(p_pool->p_log, + "Detected free memory corruption at 0x%08X (0x%08X != 0x%08X)", + ptr, *ptr, FREE_MEM_FILL); + APP_ERROR_CHECK_BOOL(false); + } + } + } + + for (uint32_t * ptr = p_head; ptr < p_element; ptr++) + { + *ptr = HEAD_GUARD_FILL; + } + + for (uint32_t * ptr = ( p_tail - tail_words); ptr < p_tail; ptr++) + { + *ptr = TAIL_GUARD_FILL; + } + + return p_element; +} + +/**@brief Calculate pointer to the block, validate block guards, and mark block memory as free. + * + * @param[in] p_pool Pointer to the memory pool. + * @param[in] p_element Pointer to the element. + * + * @return Pointer to the beginning of the block. + */ +__STATIC_INLINE void * nrf_balloc_element_wrap(nrf_balloc_t const * p_pool, void * p_element) +{ + ASSERT((p_pool != NULL) && ((p_pool->block_size % sizeof(uint32_t)) == 0)); + ASSERT((p_element != NULL) && (((uint32_t)(p_element) % sizeof(uint32_t)) == 0)); + + uint32_t head_words = NRF_BALLOC_DEBUG_HEAD_GUARD_WORDS_GET(p_pool->debug_flags); + uint32_t tail_words = NRF_BALLOC_DEBUG_TAIL_GUARD_WORDS_GET(p_pool->debug_flags); + + uint32_t * p_head = (uint32_t *)p_element - head_words; + uint32_t * p_tail = (uint32_t *)((size_t)(p_head) + p_pool->block_size); + + for (uint32_t * ptr = p_head; ptr < (uint32_t *)p_element; ptr++) + { + if (*ptr != HEAD_GUARD_FILL) + { + NRF_LOG_INST_ERROR(p_pool->p_log, + "Detected Head Guard corruption at 0x%08X (0x%08X != 0x%08X)", + ptr, *ptr, HEAD_GUARD_FILL); + APP_ERROR_CHECK_BOOL(false); + } + } + + for (uint32_t * ptr = ( p_tail - tail_words); ptr < p_tail; ptr++) + { + if (*ptr != TAIL_GUARD_FILL) + { + NRF_LOG_INST_ERROR(p_pool->p_log, + "Detected Tail Guard corruption at 0x%08X (0x%08X != 0x%08X)", + ptr, *ptr, TAIL_GUARD_FILL); + APP_ERROR_CHECK_BOOL(false); + } + } + + if (NRF_BALLOC_DEBUG_DATA_TRASHING_CHECK_GET(p_pool->debug_flags)) + { + for (uint32_t * ptr = p_head; ptr < p_tail; ptr++) + { + *ptr = FREE_MEM_FILL; + } + } + + return p_head; +} + +#endif // NRF_BALLOC_CONFIG_DEBUG_ENABLED + +/**@brief Convert block index to a pointer. + * + * @param[in] p_pool Pointer to the memory pool. + * @param[in] idx Index of the block. + * + * @return Pointer to the beginning of the block. + */ +static void * nrf_balloc_idx2block(nrf_balloc_t const * p_pool, uint8_t idx) +{ + ASSERT(p_pool != NULL); + return (uint8_t *)(p_pool->p_memory_begin) + ((size_t)(idx) * p_pool->block_size); +} + +/**@brief Convert block pointer to index. + * + * @param[in] p_pool Pointer to the memory pool. + * @param[in] p_block Pointer to the beginning of the block. + * + * @return Index of the block. + */ +static uint8_t nrf_balloc_block2idx(nrf_balloc_t const * p_pool, void const * p_block) +{ + ASSERT(p_pool != NULL); + return ((size_t)(p_block) - (size_t)(p_pool->p_memory_begin)) / p_pool->block_size; +} + +ret_code_t nrf_balloc_init(nrf_balloc_t const * p_pool) +{ + uint8_t pool_size; + + VERIFY_PARAM_NOT_NULL(p_pool); + + ASSERT(p_pool->p_cb); + ASSERT(p_pool->p_stack_base); + ASSERT(p_pool->p_stack_limit); + ASSERT(p_pool->p_memory_begin); + ASSERT(p_pool->block_size); + + pool_size = p_pool->p_stack_limit - p_pool->p_stack_base; + +#if NRF_BALLOC_CONFIG_DEBUG_ENABLED + void *p_memory_end = (uint8_t *)(p_pool->p_memory_begin) + (pool_size * p_pool->block_size); + if (NRF_BALLOC_DEBUG_DATA_TRASHING_CHECK_GET(p_pool->debug_flags)) + { + for (uint32_t * ptr = p_pool->p_memory_begin; ptr < (uint32_t *)(p_memory_end); ptr++) + { + *ptr = FREE_MEM_FILL; + } + } +#endif + + NRF_LOG_INST_INFO(p_pool->p_log, "Initialized (size: %u x %u = %u bytes)", + pool_size, + p_pool->block_size, + pool_size * p_pool->block_size); + + p_pool->p_cb->p_stack_pointer = p_pool->p_stack_base; + while (pool_size--) + { + *(p_pool->p_cb->p_stack_pointer)++ = pool_size; + } + + p_pool->p_cb->max_utilization = 0; + + return NRF_SUCCESS; +} + +void * nrf_balloc_alloc(nrf_balloc_t const * p_pool) +{ + ASSERT(p_pool != NULL); + + void * p_block = NULL; + + CRITICAL_REGION_ENTER(); + + if (p_pool->p_cb->p_stack_pointer > p_pool->p_stack_base) + { + // Allocate block. + p_block = nrf_balloc_idx2block(p_pool, *--(p_pool->p_cb->p_stack_pointer)); + + // Update utilization statistics. + uint8_t utilization = p_pool->p_stack_limit - p_pool->p_cb->p_stack_pointer; + if (p_pool->p_cb->max_utilization < utilization) + { + p_pool->p_cb->max_utilization = utilization; + } + } + + CRITICAL_REGION_EXIT(); + +#if NRF_BALLOC_CONFIG_DEBUG_ENABLED + if (p_block != NULL) + { + p_block = nrf_balloc_block_unwrap(p_pool, p_block); + } +#endif + + NRF_LOG_INST_DEBUG(p_pool->p_log, "Allocating element: 0x%08X", p_block); + + return p_block; +} + +void nrf_balloc_free(nrf_balloc_t const * p_pool, void * p_element) +{ + ASSERT(p_pool != NULL); + ASSERT(p_element != NULL) + + NRF_LOG_INST_DEBUG(p_pool->p_log, "Freeing element: 0x%08X", p_element); + +#if NRF_BALLOC_CONFIG_DEBUG_ENABLED + void * p_block = nrf_balloc_element_wrap(p_pool, p_element); + + // These checks could be done outside critical region as they use only pool configuration data. + if (NRF_BALLOC_DEBUG_BASIC_CHECKS_GET(p_pool->debug_flags)) + { + uint8_t pool_size = p_pool->p_stack_limit - p_pool->p_stack_base; + void *p_memory_end = (uint8_t *)(p_pool->p_memory_begin) + (pool_size * p_pool->block_size); + + // Check if the element belongs to this pool. + if ((p_block < p_pool->p_memory_begin) || (p_block >= p_memory_end)) + { + NRF_LOG_INST_ERROR(p_pool->p_log, + "Attempted to free element (0x%08X) that does not belong to the pool.", + p_element); + APP_ERROR_CHECK_BOOL(false); + } + + // Check if the pointer is valid. + if ((((size_t)(p_block) - (size_t)(p_pool->p_memory_begin)) % p_pool->block_size) != 0) + { + NRF_LOG_INST_ERROR(p_pool->p_log, + "Attempted to free corrupted element address (0x%08X).", p_element); + APP_ERROR_CHECK_BOOL(false); + } + } +#else + void * p_block = p_element; +#endif // NRF_BALLOC_CONFIG_DEBUG_ENABLED + + CRITICAL_REGION_ENTER(); + +#if NRF_BALLOC_CONFIG_DEBUG_ENABLED + // These checks have to be done in critical region as they use p_pool->p_stack_pointer. + if (NRF_BALLOC_DEBUG_BASIC_CHECKS_GET(p_pool->debug_flags)) + { + // Check for allocated/free ballance. + if (p_pool->p_cb->p_stack_pointer >= p_pool->p_stack_limit) + { + NRF_LOG_INST_ERROR(p_pool->p_log, + "Attempted to free an element (0x%08X) while the pool is full.", + p_element); + APP_ERROR_CHECK_BOOL(false); + } + } + + if (NRF_BALLOC_DEBUG_DOUBLE_FREE_CHECK_GET(p_pool->debug_flags)) + { + // Check for double free. + for (uint8_t * p_idx = p_pool->p_stack_base; p_idx < p_pool->p_cb->p_stack_pointer; p_idx++) + { + if (nrf_balloc_idx2block(p_pool, *p_idx) == p_block) + { + NRF_LOG_INST_ERROR(p_pool->p_log, "Attempted to double-free an element (0x%08X).", + p_element); + APP_ERROR_CHECK_BOOL(false); + } + } + } +#endif // NRF_BALLOC_CONFIG_DEBUG_ENABLED + + // Free the element. + *(p_pool->p_cb->p_stack_pointer)++ = nrf_balloc_block2idx(p_pool, p_block); + + CRITICAL_REGION_EXIT(); +} + +#endif // NRF_MODULE_ENABLED(NRF_BALLOC) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/balloc/nrf_balloc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/balloc/nrf_balloc.h new file mode 100644 index 00000000000..0f781a685b8 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/balloc/nrf_balloc.h @@ -0,0 +1,351 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/** + * @defgroup nrf_balloc Block memory allocator + * @{ + * @ingroup app_common + * @brief This module handles block memory allocator features. + */ + + +#ifndef NRF_BALLOC_H__ +#define NRF_BALLOC_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "sdk_errors.h" +#include "sdk_config.h" +#include "app_util_platform.h" +#include "app_util.h" +#include "nrf_log_instance.h" +#include "nrf_section.h" + +/** @brief Name of the module used for logger messaging. + */ +#define NRF_BALLOC_LOG_NAME balloc + +#if NRF_BALLOC_CONFIG_DEBUG_ENABLED || NRF_BALLOC_CLI_CMDS +#define NRF_BALLOC_HAS_NAME 1 +#else +#define NRF_BALLOC_HAS_NAME 0 +#endif + +/**@defgroup NRF_BALLOC_DEBUG Macros for preparing debug flags for block allocator module. + * @{ */ +#define NRF_BALLOC_DEBUG_HEAD_GUARD_WORDS_SET(words) (((words) & 0xFF) << 0) +#define NRF_BALLOC_DEBUG_HEAD_GUARD_WORDS_GET(flags) (((flags) >> 0) & 0xFF) +#define NRF_BALLOC_DEBUG_TAIL_GUARD_WORDS_SET(words) (((words) & 0xFF) << 8) +#define NRF_BALLOC_DEBUG_TAIL_GUARD_WORDS_GET(flags) (((flags) >> 8) & 0xFF) + +#define NRF_BALLOC_DEBUG_BASIC_CHECKS_SET(enable) (!!(enable) << 16) +#define NRF_BALLOC_DEBUG_BASIC_CHECKS_GET(flags) (flags & (1 << 16)) +#define NRF_BALLOC_DEBUG_DOUBLE_FREE_CHECK_SET(enable) (!!(enable) << 17) +#define NRF_BALLOC_DEBUG_DOUBLE_FREE_CHECK_GET(flags) (flags & (1 << 17)) +#define NRF_BALLOC_DEBUG_DATA_TRASHING_CHECK_SET(enable) (!!(enable) << 18) +#define NRF_BALLOC_DEBUG_DATA_TRASHING_CHECK_GET(flags) (flags & (1 << 18)) +/**@} */ + +/**@brief Default debug flags for @ref nrf_balloc. This is used by the @ref NRF_BALLOC_DEF macro. + * Flags can be changed in @ref sdk_config. + */ +#if NRF_BALLOC_CONFIG_DEBUG_ENABLED + #define NRF_BALLOC_DEFAULT_DEBUG_FLAGS \ + ( \ + NRF_BALLOC_DEBUG_HEAD_GUARD_WORDS_SET(NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS) | \ + NRF_BALLOC_DEBUG_TAIL_GUARD_WORDS_SET(NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS) | \ + NRF_BALLOC_DEBUG_BASIC_CHECKS_SET(NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED) | \ + NRF_BALLOC_DEBUG_DOUBLE_FREE_CHECK_SET(NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED) | \ + NRF_BALLOC_DEBUG_DATA_TRASHING_CHECK_SET(NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED) \ + ) +#else + #define NRF_BALLOC_DEFAULT_DEBUG_FLAGS 0 +#endif // NRF_BALLOC_CONFIG_DEBUG_ENABLED + +/**@brief Block memory allocator control block.*/ +typedef struct +{ + uint8_t * p_stack_pointer; //!< Current allocation stack pointer. + uint8_t max_utilization; //!< Maximum utilization of the memory pool. +} nrf_balloc_cb_t; + +/**@brief Block memory allocator pool instance. The pool is made of elements of the same size. */ +typedef struct +{ + nrf_balloc_cb_t * p_cb; //!< Pointer to the instance control block. + uint8_t * p_stack_base; //!< Base of the allocation stack. + /**< + * Stack is used to store handlers to not allocated elements. + */ + uint8_t * p_stack_limit; //!< Maximum possible value of the allocation stack pointer. + void * p_memory_begin; //!< Pointer to the start of the memory pool. + /**< + * Memory is used as a heap for blocks. + */ + NRF_LOG_INSTANCE_PTR_DECLARE(p_log) //!< Pointer to instance of the logger object (Conditionally compiled). +#if NRF_BALLOC_HAS_NAME + const char * p_name; //!< Pointer to string with pool name. +#endif +#if NRF_BALLOC_CONFIG_DEBUG_ENABLED + uint32_t debug_flags; //!< Debugging settings. + /**< + * Debug flag should be created by @ref NRF_BALLOC_DEBUG. + */ +#endif // NRF_BALLOC_CONFIG_DEBUG_ENABLED + uint16_t block_size; //!< Size of the allocated block (including debug overhead). + /**< + * Single block contains user element with header and tail + * words. + */ +} nrf_balloc_t; + +/**@brief Get total memory consumed by single block (element size with overhead caused by debug + * flags). + * + * @param[in] _element_size Size of an element. + * @param[in] _debug_flags Debug flags. + */ +#if NRF_BALLOC_CONFIG_DEBUG_ENABLED + #define NRF_BALLOC_BLOCK_SIZE(_element_size, _debug_flags) \ + ( \ + (sizeof(uint32_t) * NRF_BALLOC_DEBUG_HEAD_GUARD_WORDS_GET(_debug_flags)) + \ + ALIGN_NUM(sizeof(uint32_t), (_element_size)) + \ + (sizeof(uint32_t) * NRF_BALLOC_DEBUG_TAIL_GUARD_WORDS_GET(_debug_flags)) \ + ) +#else + #define NRF_BALLOC_BLOCK_SIZE(_element_size, _debug_flags) \ + ALIGN_NUM(sizeof(uint32_t), (_element_size)) +#endif // NRF_BALLOC_CONFIG_DEBUG_ENABLED + + +/**@brief Get element size ( excluding debugging overhead is present) + * flags). + * + * @param[in] _p_balloc Pointer to balloc instance. + */ +#if NRF_BALLOC_CONFIG_DEBUG_ENABLED +#define NRF_BALLOC_ELEMENT_SIZE(_p_balloc) \ + (ALIGN_NUM(sizeof(uint32_t), (_p_balloc)->block_size) - \ + ((sizeof(uint32_t) * NRF_BALLOC_DEBUG_HEAD_GUARD_WORDS_GET((_p_balloc)->debug_flags)) + \ + (sizeof(uint32_t) * NRF_BALLOC_DEBUG_TAIL_GUARD_WORDS_GET((_p_balloc)->debug_flags)))) +#else +#define NRF_BALLOC_ELEMENT_SIZE(_p_balloc) \ + (_p_balloc)->block_size +#endif // NRF_BALLOC_CONFIG_DEBUG_ENABLED + +#if NRF_BALLOC_CONFIG_DEBUG_ENABLED +#define __NRF_BALLOC_ASSIGN_DEBUG_FLAGS(_debug_flags) .debug_flags = (_debug_flags), +#else +#define __NRF_BALLOC_ASSIGN_DEBUG_FLAGS(_debug_flags) +#endif + +#if NRF_BALLOC_HAS_NAME +#define __NRF_BALLOC_ASSIGN_POOL_NAME(_name) .p_name = STRINGIFY(_name), +#else +#define __NRF_BALLOC_ASSIGN_POOL_NAME(_name) +#endif + + +/**@brief Create a block allocator instance with custom debug flags. + * + * @note This macro reserves memory for the given block allocator instance. + * + * @param[in] _name Name of the allocator. + * @param[in] _element_size Size of one element. + * @param[in] _pool_size Size of the pool. + * @param[in] _debug_flags Debug flags (@ref NRF_BALLOC_DEBUG). + */ +#define NRF_BALLOC_DBG_DEF(_name, _element_size, _pool_size, _debug_flags) \ + STATIC_ASSERT((_pool_size) <= UINT8_MAX); \ + static uint8_t CONCAT_2(_name, _nrf_balloc_pool_stack)[(_pool_size)]; \ + static uint32_t CONCAT_2(_name,_nrf_balloc_pool_mem) \ + [NRF_BALLOC_BLOCK_SIZE(_element_size, _debug_flags) * (_pool_size) / sizeof(uint32_t)]; \ + static nrf_balloc_cb_t CONCAT_2(_name,_nrf_balloc_cb); \ + NRF_LOG_INSTANCE_REGISTER(NRF_BALLOC_LOG_NAME, _name, \ + NRF_BALLOC_CONFIG_INFO_COLOR, \ + NRF_BALLOC_CONFIG_DEBUG_COLOR, \ + NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL, \ + NRF_BALLOC_CONFIG_LOG_ENABLED ? \ + NRF_BALLOC_CONFIG_LOG_LEVEL : NRF_LOG_SEVERITY_NONE); \ + NRF_SECTION_ITEM_REGISTER(nrf_balloc, const nrf_balloc_t _name) = \ + { \ + .p_cb = &CONCAT_2(_name,_nrf_balloc_cb), \ + .p_stack_base = CONCAT_2(_name,_nrf_balloc_pool_stack), \ + .p_stack_limit = CONCAT_2(_name,_nrf_balloc_pool_stack) + (_pool_size), \ + .p_memory_begin = CONCAT_2(_name,_nrf_balloc_pool_mem), \ + .block_size = NRF_BALLOC_BLOCK_SIZE(_element_size, _debug_flags), \ + \ + NRF_LOG_INSTANCE_PTR_INIT(p_log, NRF_BALLOC_LOG_NAME, _name) \ + __NRF_BALLOC_ASSIGN_POOL_NAME(_name) \ + __NRF_BALLOC_ASSIGN_DEBUG_FLAGS(_debug_flags) \ + } + +/**@brief Create a block allocator instance. + * + * @note This macro reserves memory for the given block allocator instance. + * + * @param[in] _name Name of the allocator. + * @param[in] _element_size Size of one element. + * @param[in] _pool_size Size of the pool. + */ +#define NRF_BALLOC_DEF(_name, _element_size, _pool_size) \ + NRF_BALLOC_DBG_DEF(_name, _element_size, _pool_size, NRF_BALLOC_DEFAULT_DEBUG_FLAGS) + +/**@brief Create a block allocator interface. + * + * @param[in] _type Type which is allocated. + * @param[in] _name Name of the allocator. + */ +#define NRF_BALLOC_INTERFACE_DEC(_type, _name) \ + _type * CONCAT_2(_name,_alloc)(void); \ + void CONCAT_2(_name,_free)(_type * p_element) + +/**@brief Define a custom block allocator interface. + * + * @param[in] _attr Function attribute that will be added to allocator function definition. + * @param[in] _type Type which is allocated. + * @param[in] _name Name of the allocator. + * @param[in] _p_pool Pool from which data will be allocated. + */ +#define NRF_BALLOC_INTERFACE_CUSTOM_DEF(_attr, _type, _name, _p_pool) \ + _attr _type * CONCAT_2(_name,_alloc)(void) \ + { \ + GCC_PRAGMA("GCC diagnostic push") \ + GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ + ASSERT((_p_pool) != NULL); \ + ASSERT((_p_pool)->block_size >= \ + NRF_BALLOC_BLOCK_SIZE(sizeof(_type), (_p_pool)->debug_flags)); \ + GCC_PRAGMA("GCC diagnostic pop") \ + return (_type *)(nrf_balloc_alloc(_p_pool)); \ + } \ + \ + _attr void CONCAT_2(_name,_free)(_type * p_element) \ + { \ + GCC_PRAGMA("GCC diagnostic push") \ + GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ + ASSERT((_p_pool) != NULL); \ + ASSERT((_p_pool)->block_size >= \ + NRF_BALLOC_BLOCK_SIZE(sizeof(_type), (_p_pool)->debug_flags)); \ + GCC_PRAGMA("GCC diagnostic pop") \ + nrf_balloc_free((_p_pool), p_element); \ + } + +/**@brief Define block allocator interface. + * + * @param[in] _type Type which is allocated. + * @param[in] _name Name of the allocator. + * @param[in] _p_pool Pool from which data will be allocated. + */ +#define NRF_BALLOC_INTERFACE_DEF(_type, _name, _p_pool) \ + NRF_BALLOC_INTERFACE_CUSTOM_DEF(/* empty */, _type, _name, _p_pool) + +/**@brief Define a local block allocator interface. + * + * @param[in] _type Type which is allocated. + * @param[in] _name Name of the allocator. + * @param[in] _p_pool Pool from which data will be allocated. + */ +#define NRF_BALLOC_INTERFACE_LOCAL_DEF(_type, _name, _p_pool) \ + NRF_BALLOC_INTERFACE_CUSTOM_DEF(static, _type, _name, _p_pool) + +/**@brief Function for initializing a block memory allocator pool. + * + * @param[out] p_pool Pointer to the pool that is to be initialized. + * + * @return NRF_SUCCESS on success, otherwise error code. + */ +ret_code_t nrf_balloc_init(nrf_balloc_t const * p_pool); + +/**@brief Function for allocating an element from the pool. + * + * @note This module guarantees that the returned memory is aligned to 4. + * + * @param[in] p_pool Pointer to the memory pool from which the element will be allocated. + * + * @return Allocated element or NULL if the specified pool is empty. + */ +void * nrf_balloc_alloc(nrf_balloc_t const * p_pool); + +/**@brief Function for freeing an element back to the pool. + * + * @param[in] p_pool Pointer to the memory pool. + * @param[in] p_element Element to be freed. + */ +void nrf_balloc_free(nrf_balloc_t const * p_pool, void * p_element); + +/**@brief Function for getting maximum memory pool utilization. + * + * @param[in] p_pool Pointer to the memory pool instance. + * + * @return Maximum number of elements allocated from the pool. + */ +__STATIC_INLINE uint8_t nrf_balloc_max_utilization_get(nrf_balloc_t const * p_pool); + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION +__STATIC_INLINE uint8_t nrf_balloc_max_utilization_get(nrf_balloc_t const * p_pool) +{ + ASSERT(p_pool != NULL); + return p_pool->p_cb->max_utilization; +} +#endif //SUPPRESS_INLINE_IMPLEMENTATION + +/**@brief Function for getting current memory pool utilization. + * + * @param[in] p_pool Pointer to the memory pool instance. + * + * @return Maximum number of elements allocated from the pool. + */ +__STATIC_INLINE uint8_t nrf_balloc_utilization_get(nrf_balloc_t const * p_pool); + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION +__STATIC_INLINE uint8_t nrf_balloc_utilization_get(nrf_balloc_t const * p_pool) +{ + ASSERT(p_pool != NULL); + return (p_pool->p_stack_limit - p_pool->p_cb->p_stack_pointer); +} +#endif //SUPPRESS_INLINE_IMPLEMENTATION + +#ifdef __cplusplus +} +#endif + +#endif // NRF_BALLOC_H__ +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/delay/nrf_delay.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/delay/nrf_delay.h new file mode 100644 index 00000000000..2a6faf2dc4d --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/delay/nrf_delay.h @@ -0,0 +1,80 @@ +/** + * Copyright (c) 2011 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef _NRF_DELAY_H +#define _NRF_DELAY_H + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Function for delaying execution for a number of microseconds. + * + * @param us_time Number of microseconds to wait. + */ +#define nrf_delay_us(us_time) NRFX_DELAY_US(us_time) + + +/** + * @brief Function for delaying execution for a number of milliseconds. + * + * @param ms_time Number of milliseconds to wait. + */ + +__STATIC_INLINE void nrf_delay_ms(uint32_t ms_time) +{ + if (ms_time == 0) + { + return; + } + + do { + nrf_delay_us(1000); + } while (--ms_time); +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log.h new file mode 100644 index 00000000000..d709d23f712 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log.h @@ -0,0 +1,291 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/**@file + * + * @defgroup nrf_log Logger module + * @{ + * @ingroup app_common + * + * @brief The nrf_log module interface. + */ + +#ifndef NRF_LOG_H_ +#define NRF_LOG_H_ + +#include "sdk_common.h" +#include "nrf_section.h" +#if NRF_MODULE_ENABLED(NRF_LOG) +#include "nrf_strerror.h" +#define NRF_LOG_ERROR_STRING_GET(code) nrf_strerror_get(code) +#else +#define NRF_LOG_ERROR_STRING_GET(code) "" +#endif + + +#ifdef __cplusplus +extern "C" { +#endif + +/** @brief Severity level for the module. + * + * The severity level can be defined in a module to override the default. + */ +#ifndef NRF_LOG_LEVEL + #define NRF_LOG_LEVEL NRF_LOG_DEFAULT_LEVEL +#endif + +/** @brief Initial severity if filtering is enabled. + */ +#ifndef NRF_LOG_INITIAL_LEVEL + #define NRF_LOG_INITIAL_LEVEL NRF_LOG_LEVEL +#endif + + +#include "nrf_log_internal.h" + +/** @def NRF_LOG_ERROR + * @brief Macro for logging error messages. It takes a printf-like, formatted + * string with up to seven arguments. + * + * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs. + */ + +/** @def NRF_LOG_WARNING + * @brief Macro for logging error messages. It takes a printf-like, formatted + * string with up to seven arguments. + * + * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes warning logs. + */ + +/** @def NRF_LOG_INFO + * @brief Macro for logging error messages. It takes a printf-like, formatted + * string with up to seven arguments. + * + * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes info logs. + */ + +/** @def NRF_LOG_DEBUG + * @brief Macro for logging error messages. It takes a printf-like, formatted + * string with up to seven arguments. + * + * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes debug logs. + */ + +#define NRF_LOG_ERROR(...) NRF_LOG_INTERNAL_ERROR(__VA_ARGS__) +#define NRF_LOG_WARNING(...) NRF_LOG_INTERNAL_WARNING( __VA_ARGS__) +#define NRF_LOG_INFO(...) NRF_LOG_INTERNAL_INFO( __VA_ARGS__) +#define NRF_LOG_DEBUG(...) NRF_LOG_INTERNAL_DEBUG( __VA_ARGS__) + +/** @def NRF_LOG_INST_ERROR + * @brief Macro for logging error messages for a given module instance. It takes a printf-like, formatted + * string with up to seven arguments. + * + * @param p_inst Pointer to the instance with logging support. + * + * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs. + */ + +/** @def NRF_LOG_INST_WARNING + * @brief Macro for logging error messages for a given module instance. It takes a printf-like, formatted + * string with up to seven arguments. + * + * @param p_inst Pointer to the instance with logging support. + * + * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs. + */ + +/** @def NRF_LOG_INST_INFO + * @brief Macro for logging error messages for a given module instance. It takes a printf-like, formatted + * string with up to seven arguments. + * + * @param p_inst Pointer to the instance with logging support. + * + * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs. + */ + +/** @def NRF_LOG_INST_DEBUG + * @brief Macro for logging error messages for given module instance. It takes a printf-like, formatted + * string with up to seven arguments. + * + * @param p_inst Pointer to the instance with logging support. + * + * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs. + */ +#define NRF_LOG_INST_ERROR(p_inst,...) NRF_LOG_INTERNAL_INST_ERROR(p_inst,__VA_ARGS__) +#define NRF_LOG_INST_WARNING(p_inst,...) NRF_LOG_INTERNAL_INST_WARNING(p_inst,__VA_ARGS__) +#define NRF_LOG_INST_INFO(p_inst,...) NRF_LOG_INTERNAL_INST_INFO(p_inst, __VA_ARGS__) +#define NRF_LOG_INST_DEBUG(p_inst,...) NRF_LOG_INTERNAL_INST_DEBUG(p_inst, __VA_ARGS__) + +/** + * @brief Macro for logging a formatted string without any prefix or timestamp. + */ +#define NRF_LOG_RAW_INFO(...) NRF_LOG_INTERNAL_RAW_INFO( __VA_ARGS__) + +/** @def NRF_LOG_HEXDUMP_ERROR + * @brief Macro for logging raw bytes. + * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs. + * + * @param p_data Pointer to data. + * @param len Data length in bytes. + */ +/** @def NRF_LOG_HEXDUMP_WARNING + * @brief Macro for logging raw bytes. + * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes warning logs. + * + * @param p_data Pointer to data. + * @param len Data length in bytes. + */ +/** @def NRF_LOG_HEXDUMP_INFO + * @brief Macro for logging raw bytes. + * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes info logs. + * + * @param p_data Pointer to data. + * @param len Data length in bytes. + */ +/** @def NRF_LOG_HEXDUMP_DEBUG + * @brief Macro for logging raw bytes. + * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes debug logs. + * + * @param p_data Pointer to data. + * @param len Data length in bytes. + */ +#define NRF_LOG_HEXDUMP_ERROR(p_data, len) NRF_LOG_INTERNAL_HEXDUMP_ERROR(p_data, len) +#define NRF_LOG_HEXDUMP_WARNING(p_data, len) NRF_LOG_INTERNAL_HEXDUMP_WARNING(p_data, len) +#define NRF_LOG_HEXDUMP_INFO(p_data, len) NRF_LOG_INTERNAL_HEXDUMP_INFO(p_data, len) +#define NRF_LOG_HEXDUMP_DEBUG(p_data, len) NRF_LOG_INTERNAL_HEXDUMP_DEBUG(p_data, len) + +/** @def NRF_LOG_HEXDUMP_INST_ERROR + * @brief Macro for logging raw bytes for a specific module instance. + * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs. + * + * @param p_inst Pointer to the instance with logging support. + * @param p_data Pointer to data. + * @param len Data length in bytes. + */ +/** @def NRF_LOG_HEXDUMP_INST_WARNING + * @brief Macro for logging raw bytes for a specific module instance. + * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs. + * + * @param p_inst Pointer to the instance with logging support. + * @param p_data Pointer to data. + * @param len Data length in bytes. + */ +/** @def NRF_LOG_HEXDUMP_INST_INFO + * @brief Macro for logging raw bytes for a specific module instance. + * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs. + * + * @param p_inst Pointer to the instance with logging support. + * @param p_data Pointer to data. + * @param len Data length in bytes. + */ +/** @def NRF_LOG_HEXDUMP_INST_DEBUG + * @brief Macro for logging raw bytes for a specific module instance. + * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs. + * + * @param p_inst Pointer to the instance with logging support. + * @param p_data Pointer to data. + * @param len Data length in bytes. + */ +#define NRF_LOG_HEXDUMP_INST_ERROR(p_inst, p_data, len) NRF_LOG_INTERNAL_HEXDUMP_INST_ERROR(p_inst, p_data, len) +#define NRF_LOG_HEXDUMP_INST_WARNING(p_inst, p_data, len) NRF_LOG_INTERNAL_HEXDUMP_INST_WARNING(p_inst, p_data, len) +#define NRF_LOG_HEXDUMP_INST_INFO(p_inst, p_data, len) NRF_LOG_INTERNAL_HEXDUMP_INST_INFO(p_inst, p_data, len) +#define NRF_LOG_HEXDUMP_INST_DEBUG(p_inst, p_data, len) NRF_LOG_INTERNAL_HEXDUMP_INST_DEBUG(p_inst, p_data, len) + +/** + * @brief Macro for logging hexdump without any prefix or timestamp. + */ +#define NRF_LOG_RAW_HEXDUMP_INFO(p_data, len) NRF_LOG_INTERNAL_RAW_HEXDUMP_INFO(p_data, len) + + +/** + * @brief Macro for copying a string to internal logger buffer if logs are deferred. + * + * @param _str String. + */ +#define NRF_LOG_PUSH(_str) NRF_LOG_INTERNAL_LOG_PUSH(_str) + +/** + * @brief Function for copying a string to the internal logger buffer if logs are deferred. + * + * Use this function to store a string that is volatile (for example allocated + * on stack) or that may change before the deferred logs are processed. Such string is copied + * into the internal logger buffer and is persistent until the log is processed. + * + * @note If the logs are not deferred, then this function returns the input parameter. + * + * @param p_str Pointer to the user string. + * + * @return Address to the location where the string is stored in the internal logger buffer. + */ +uint32_t nrf_log_push(char * const p_str); + +/** + * @brief Macro to be used in a formatted string to a pass float number to the log. + * + * Use this macro in a formatted string instead of the %f specifier together with + * @ref NRF_LOG_FLOAT macro. + * Example: NRF_LOG_INFO("My float number" NRF_LOG_FLOAT_MARKER "\r\n", NRF_LOG_FLOAT(f))) + */ +#define NRF_LOG_FLOAT_MARKER "%s%d.%02d" + +/** + * @brief Macro for dissecting a float number into two numbers (integer and residuum). + */ +#define NRF_LOG_FLOAT(val) (uint32_t)(((val) < 0 && (val) > -1.0) ? "-" : ""), \ + (int32_t)(val), \ + (int32_t)((((val) > 0) ? (val) - (int32_t)(val) \ + : (int32_t)(val) - (val))*100) + + +/** + * @brief Macro for registering an independent module. + * + * Registration creates set of dynamic (RAM) and constant variables associated with the module. + */ +#define NRF_LOG_MODULE_REGISTER() NRF_LOG_INTERNAL_MODULE_REGISTER() + + +#ifdef __cplusplus +} +#endif + +#endif // NRF_LOG_H_ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_backend_flash.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_backend_flash.h new file mode 100644 index 00000000000..c93ae354104 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_backend_flash.h @@ -0,0 +1,129 @@ +/** + * Copyright (c) 2018 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + + /**@file + * + * @defgroup nrf_log_backend_flash Flash logger backend + * @{ + * @ingroup nrf_log + * @brief Flash logger backend. + */ + +#ifndef NRF_LOG_BACKEND_FLASH_H +#define NRF_LOG_BACKEND_FLASH_H + +#include "nrf_log_backend_interface.h" +#include "nrf_fstorage.h" +#include "nrf_log_internal.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @brief Flashlog logger backend API. */ +extern const nrf_log_backend_api_t nrf_log_backend_flashlog_api; + +/** @brief Crashlog logger backend API. */ +extern const nrf_log_backend_api_t nrf_log_backend_crashlog_api; + +/** @brief Flashlog logger backend structure. */ +typedef struct { + nrf_log_backend_t backend; +} nrf_log_backend_flashlog_t; + +/** @brief Crashlog logger backend structure. */ +typedef struct { + nrf_log_backend_t backend; +} nrf_log_backend_crashlog_t; + +/** @brief Macro for creating an instance of the flashlog logger backend. */ +#define NRF_LOG_BACKEND_FLASHLOG_DEF(name) \ + static nrf_log_backend_flashlog_t name = { \ + .backend = {.p_api = &nrf_log_backend_flashlog_api}, \ + } + +/** @brief Macro for creating an instance of the crashlog logger backend. */ +#define NRF_LOG_BACKEND_CRASHLOG_DEF(name) \ + static nrf_log_backend_crashlog_t name = { \ + .backend = {.p_api = &nrf_log_backend_crashlog_api}, \ + } + +/** + * @brief Function for initializing the flash logger backend. + * + * Flash logger backend consists of two logical backends: flashlog and crashlog. Since both + * backends write to the same flash area, the initialization is common. + * + * @param p_fs_api fstorage API to be used. + * + * @return NRF_SUCCESS or error code returned by @ref nrf_fstorage_init. + */ +ret_code_t nrf_log_backend_flash_init(nrf_fstorage_api_t const * p_fs_api); + +/** + * @brief Function for getting a log entry stored in flash. + * + * Log messages stored in flash can be read one by one starting from the oldest one. + * + * @param[in, out] p_token Token reused between consecutive readings of log entries. + * Token must be set to 0 to read the first entry. + * @param[out] pp_header Pointer to the entry header. + * @param[out] pp_data Pointer to the data part of the entry (arguments or data in case of hexdump). + * + * @retval NRF_SUCCESS Entry was successfully read. + * @retval NRF_ERROR_NOT_SUPPORTED fstorage API does not support direct reading. + * @retval NRF_ERROR_NOT_FOUND Entry not found. Last entry was already reached or area is empty. + */ +ret_code_t nrf_log_backend_flash_next_entry_get(uint32_t * p_token, + nrf_log_header_t * * pp_header, + uint8_t * * pp_data); + +/** + * @brief Function for erasing flash area dedicated for the flash logger backend. + */ +ret_code_t nrf_log_backend_flash_erase(void); + +#ifdef __cplusplus +} +#endif + +#endif //NRF_LOG_BACKEND_UART_H + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_backend_interface.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_backend_interface.h new file mode 100644 index 00000000000..9d1af51f9a9 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_backend_interface.h @@ -0,0 +1,220 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_LOG_BACKEND_INTERFACE_H +#define NRF_LOG_BACKEND_INTERFACE_H + +/**@file + * @addtogroup nrf_log Logger module + * @ingroup app_common + * + * @defgroup nrf_log_backend_interface Logger backend interface + * @{ + * @ingroup nrf_log + * @brief The nrf_log backend interface. + */ + +#include "nrf_memobj.h" +#include + +#ifdef __cplusplus +extern "C" { +#endif + + +/** + * @brief nrf_log entry. + */ +typedef nrf_memobj_t nrf_log_entry_t; + +/* Forward declaration of the nrf_log_backend_t type. */ +typedef struct nrf_log_backend_s nrf_log_backend_t; + +/** + * @brief Logger backend API. + */ +typedef struct +{ + /** + * @brief @ref nrf_log_backend_put + */ + void (*put)(nrf_log_backend_t const * p_backend, nrf_log_entry_t * p_entry); + + /** + * @brief @ref nrf_log_backend_panic_set + */ + void (*panic_set)(nrf_log_backend_t const * p_backend); + + /** + * @brief @ref nrf_log_backend_flush + */ + void (*flush)(nrf_log_backend_t const * p_backend); +} nrf_log_backend_api_t; + +/** + * @brief Logger backend structure. + */ +struct nrf_log_backend_s +{ + nrf_log_backend_api_t const * p_api; //!< Pointer to interface. + nrf_log_backend_t * p_next; //!< Pointer to next backend added to the logger. + uint8_t id; //!< Backend id. + bool enabled;//!< Flag indicating backend status. +}; + +/** + * @brief Function for putting message with log entry to the backend. + * + * @param[in] p_backend Pointer to the backend instance. + * @param[in] p_msg Pointer to message with log entry. + */ +__STATIC_INLINE void nrf_log_backend_put(nrf_log_backend_t const * p_backend, + nrf_log_entry_t * p_msg); + +/** + * @brief Function for reconfiguring backend to panic mode. + * + * @param[in] p_backend Pointer to the backend instance. + */ +__STATIC_INLINE void nrf_log_backend_panic_set(nrf_log_backend_t const * p_backend); + +/** + * @brief Function for flushing backend. + * + * On flushing request backend should release log message(s). + * + * @param[in] p_backend Pointer to the backend instance. + */ +__STATIC_INLINE void nrf_log_backend_flush(nrf_log_backend_t const * p_backend); + + +/** + * @brief Function for setting backend id. + * + * @note It is used internally by the logger. + * + * @param[in] p_backend Pointer to the backend instance. + * @param[in] id Id. + */ +__STATIC_INLINE void nrf_log_backend_id_set(nrf_log_backend_t * p_backend, uint8_t id); + +/** + * @brief Function for getting backend id. + * + * @note It is used internally by the logger. + * + * @param[in] p_backend Pointer to the backend instance. + * @return Id. + */ +__STATIC_INLINE uint8_t nrf_log_backend_id_get(nrf_log_backend_t const * p_backend); + +/** + * @brief Function for enabling backend. + * + * @param[in] p_backend Pointer to the backend instance. + */ +__STATIC_INLINE void nrf_log_backend_enable(nrf_log_backend_t * p_backend); + +/** + * @brief Function for disabling backend. + * + * @param[in] p_backend Pointer to the backend instance. + */ +__STATIC_INLINE void nrf_log_backend_disable(nrf_log_backend_t * p_backend); + +/** + * @brief Function for checking state of the backend. + * + * @param[in] p_backend Pointer to the backend instance. + * + * @return True if backend is enabled, false otherwise. + */ +__STATIC_INLINE bool nrf_log_backend_is_enabled(nrf_log_backend_t const * p_backend); + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION +__STATIC_INLINE void nrf_log_backend_put(nrf_log_backend_t const * p_backend, + nrf_log_entry_t * p_msg) +{ + p_backend->p_api->put(p_backend, p_msg); +} + +__STATIC_INLINE void nrf_log_backend_panic_set(nrf_log_backend_t const * p_backend) +{ + p_backend->p_api->panic_set(p_backend); +} + +__STATIC_INLINE void nrf_log_backend_flush(nrf_log_backend_t const * p_backend) +{ + p_backend->p_api->flush(p_backend); +} + +__STATIC_INLINE void nrf_log_backend_id_set(nrf_log_backend_t * p_backend, uint8_t id) +{ + p_backend->id = id; +} + +__STATIC_INLINE uint8_t nrf_log_backend_id_get(nrf_log_backend_t const * p_backend) +{ + return p_backend->id; +} + +__STATIC_INLINE void nrf_log_backend_enable(nrf_log_backend_t * p_backend) +{ + p_backend->enabled = true; +} + +__STATIC_INLINE void nrf_log_backend_disable(nrf_log_backend_t * p_backend) +{ + p_backend->enabled = false; +} + +__STATIC_INLINE bool nrf_log_backend_is_enabled(nrf_log_backend_t const * p_backend) +{ + return p_backend->enabled; +} + +#endif // SUPPRESS_INLINE_IMPLEMENTATION + +#ifdef __cplusplus +} +#endif + +#endif //NRF_LOG_BACKEND_INTERFACE_H + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_backend_rtt.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_backend_rtt.h new file mode 100644 index 00000000000..efa1032fd69 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_backend_rtt.h @@ -0,0 +1,82 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + + /**@file + * + * @defgroup nrf_log_backend_rtt Log RTT backend + * @{ + * @ingroup nrf_log + * @brief Log RTT backend. + */ + +#ifndef NRF_LOG_BACKEND_RTT_H +#define NRF_LOG_BACKEND_RTT_H + +#include "nrf_log_backend_interface.h" + +#ifdef __cplusplus +extern "C" { +#endif + +extern const nrf_log_backend_api_t nrf_log_backend_rtt_api; + +typedef struct { + nrf_log_backend_t backend; +} nrf_log_backend_rtt_t; + +/** + * @brief RTT backend definition + * + * @param _name Name of the instance. + */ +#define NRF_LOG_BACKEND_RTT_DEF(_name) \ + static nrf_log_backend_rtt_t _name = { \ + .backend = {.p_api = &nrf_log_backend_rtt_api}, \ + } + +void nrf_log_backend_rtt_init(void); + +#ifdef __cplusplus +} +#endif + +#endif //NRF_LOG_BACKEND_RTT_H + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_backend_uart.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_backend_uart.h new file mode 100644 index 00000000000..2743e291f52 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_backend_uart.h @@ -0,0 +1,77 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + + /**@file + * + * @defgroup nrf_log_backend_uart Log UART backend + * @{ + * @ingroup nrf_log + * @brief Log UART backend. + */ + +#ifndef NRF_LOG_BACKEND_UART_H +#define NRF_LOG_BACKEND_UART_H + +#include "nrf_log_backend_interface.h" + +#ifdef __cplusplus +extern "C" { +#endif + +extern const nrf_log_backend_api_t nrf_log_backend_uart_api; + +typedef struct { + nrf_log_backend_t backend; +} nrf_log_backend_uart_t; + +#define NRF_LOG_BACKEND_UART_DEF(name) \ + static nrf_log_backend_uart_t name = { \ + .backend = {.p_api = &nrf_log_backend_uart_api}, \ + } + +void nrf_log_backend_uart_init(void); + +#ifdef __cplusplus +} +#endif + +#endif //NRF_LOG_BACKEND_UART_H + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_ctrl.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_ctrl.h new file mode 100644 index 00000000000..828f1f716df --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_ctrl.h @@ -0,0 +1,226 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_LOG_CTRL_H +#define NRF_LOG_CTRL_H + +/**@file + * @addtogroup nrf_log Logger module + * @ingroup app_common + * + * @defgroup nrf_log_ctrl Functions for controlling nrf_log + * @{ + * @ingroup nrf_log + * @brief The nrf_log control interface. + */ + +#include "sdk_config.h" +#include "sdk_errors.h" +#include +#include +#include "nrf_log_types.h" +#include "nrf_log_ctrl_internal.h" +#include "nrf_log_backend_interface.h" +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Timestamp function prototype. + * + * @return Timestamp value. + */ +typedef uint32_t (*nrf_log_timestamp_func_t)(void); + +/**@brief Macro for initializing the logs. + * + * Macro has one or two parameters. First parameter (obligatory) is the timestamp function (@ref nrf_log_timestamp_func_t). + * Additionally, as the second parameter timestamp frequency in Hz can be provided. If not provided then default + * frequency is used (@ref NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY). Frequency is used to format timestamp prefix if + * @ref NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED is set. + * + * @return NRF_SUCCESS after successful initialization, otherwise an error code. + */ +#define NRF_LOG_INIT(...) NRF_LOG_INTERNAL_INIT(__VA_ARGS__) + + +/**@brief Macro for processing a single log entry from a queue of deferred logs. + * + * You can call this macro from the main context or from the error handler to process + * log entries one by one. + * + * @note If logs are not deferred, this call has no use and is defined as 'false'. + * + * @retval true There are more logs to process in the buffer. + * @retval false No more logs in the buffer. + */ +#define NRF_LOG_PROCESS() NRF_LOG_INTERNAL_PROCESS() + +/** @brief Macro for processing all log entries from the buffer. + * It blocks until all buffered entries are processed by the backend. + * + * @note If logs are not deferred, this call has no use and is empty. + */ +#define NRF_LOG_FLUSH() NRF_LOG_INTERNAL_FLUSH() + +/** @brief Macro for flushing log data before reset. + * + * @note If logs are not deferred, this call has no use and is empty. + * + * @note If RTT is used, then a breakpoint is hit once flushed. + */ +#define NRF_LOG_FINAL_FLUSH() NRF_LOG_INTERNAL_FINAL_FLUSH() + +/** + * @brief Function for initializing the frontend and the default backend. + * + * @ref NRF_LOG_INIT calls this function to initialize the frontend and the backend. + * If custom backend is used, then @ref NRF_LOG_INIT should not be called. + * Instead, frontend and user backend should be verbosely initialized. + * + * @param timestamp_func Function for getting a 32-bit timestamp. + * @param timestamp_freq Frequency of the timestamp. + * + * @return Error status. + * + */ +ret_code_t nrf_log_init(nrf_log_timestamp_func_t timestamp_func, uint32_t timestamp_freq); + +/** + * @brief Function for adding new backend interface to the logger. + * + * @param p_backend Pointer to the backend interface. + * @param severity Initial value of severity level for each module forwarded to the backend. This + * option is only applicable if @ref NRF_LOG_FILTERS_ENABLED is set. + * @return -1 if backend cannot be added or positive number (backend ID). + */ +int32_t nrf_log_backend_add(nrf_log_backend_t * p_backend, nrf_log_severity_t severity); + +/** + * @brief Function for removing backend from the logger. + * + * @param p_backend Pointer to the backend interface. + * + */ +void nrf_log_backend_remove(nrf_log_backend_t * p_backend); + +/** + * @brief Function for setting logger backends into panic mode. + * + * When this function is called all attached backends are informed about panic state of the system. + * It is up to the backend to react properly (hold or process logs in blocking mode, etc.) + */ +void nrf_log_panic(void); + +/** + * @brief Function for handling a single log entry. + * + * Use this function only if the logs are buffered. It takes a single entry from the + * buffer and attempts to process it. + * + * @retval true If there are more entries to process. + * @retval false If there are no more entries to process. + */ +bool nrf_log_frontend_dequeue(void); + +/** + * @brief Function for getting number of independent log modules registered into the logger. + * + * @return Number of registered modules. + */ +uint32_t nrf_log_module_cnt_get(void); + +/** + * @brief Function for getting module name. + * + * @param module_id Module ID. + * @param is_ordered_idx Module ID is given is index in alphabetically sorted list of modules. + * @return Pointer to string with module name. + */ +const char * nrf_log_module_name_get(uint32_t module_id, bool is_ordered_idx); + +/** + * @brief Function for getting coloring of specific logs. + * + * @param module_id Module ID. + * @param severity Log severity. + * + * @return ID of the color. + */ +uint8_t nrf_log_color_id_get(uint32_t module_id, nrf_log_severity_t severity); + +/** + * @brief Function for configuring filtering ofs logs in the module. + * + * Filtering of logs in modules is independent for each backend. + * + * @param backend_id Backend ID which want to chenge its configuration. + * @param module_id Module ID which logs will be reconfigured. + * @param severity New severity filter. + */ +void nrf_log_module_filter_set(uint32_t backend_id, + uint32_t module_id, + nrf_log_severity_t severity); + +/** + * @brief Function for getting module severity level. + * + * @param backend_id Backend ID. + * @param module_id Module ID. + * @param is_ordered_idx Module ID is given is index in alphabetically sorted list of modules. + * @param dynamic It true current filter for given backend is returned. If false then + * compiled-in level is returned (maximum available). If this parameter is + * false then backend_id parameter is not used. + * + * @return Severity. + */ +nrf_log_severity_t nrf_log_module_filter_get(uint32_t backend_id, + uint32_t module_id, + bool is_ordered_idx, + bool dynamic); + +#ifdef __cplusplus +} +#endif + +#endif // NRF_LOG_CTRL_H + +/** + *@} + **/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_default_backends.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_default_backends.h new file mode 100644 index 00000000000..8ad3da4500e --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_default_backends.h @@ -0,0 +1,81 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_LOG_DEFAULT_BACKENDS_H__ +#define NRF_LOG_DEFAULT_BACKENDS_H__ + +/**@file + * @addtogroup nrf_log Logger module + * @ingroup app_common + * + * @defgroup nrf_log_default_backends Functions for initializing and adding default backends + * @{ + * @ingroup nrf_log + * @brief The nrf_log default backends. + */ + +#include "sdk_config.h" +#include "sdk_errors.h" +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @def NRF_LOG_DEFAULT_BACKENDS_INIT + * @brief Macro for initializing default backends. + * + * Each backend enabled in configuration is initialized and added as a backend to the logger. + */ +#if NRF_LOG_ENABLED +#define NRF_LOG_DEFAULT_BACKENDS_INIT() nrf_log_default_backends_init() +#else +#define NRF_LOG_DEFAULT_BACKENDS_INIT() +#endif + +void nrf_log_default_backends_init(void); + +#ifdef __cplusplus +} +#endif + +/** @} */ + +#endif // NRF_LOG_DEFAULT_BACKENDS_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_instance.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_instance.h new file mode 100644 index 00000000000..a4ba83da2dd --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_instance.h @@ -0,0 +1,135 @@ +/** + * Copyright (c) 2018 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_LOG_INSTANCE_H +#define NRF_LOG_INSTANCE_H + +#include "sdk_config.h" +#include "nrf_section.h" +#include "nrf_log_types.h" +#include +/* + * For GCC, sections are sorted in the group by the linker. For IAR and KEIL, it is assumed that linker will sort + * dynamic and const section in the same order (but in different locations). Proper message formatting + * is based on that assumption. + */ +#if defined(__GNUC__) +#define NRF_LOG_DYNAMIC_SECTION_NAME(_module_name) CONCAT_2(log_dynamic_data_,_module_name) +#define NRF_LOG_CONST_SECTION_NAME(_module_name) CONCAT_2(log_const_data_,_module_name) +#else +#define NRF_LOG_DYNAMIC_SECTION_NAME(_module_name) log_dynamic_data +#define NRF_LOG_CONST_SECTION_NAME(_module_name) log_const_data +#endif + +#define NRF_LOG_ITEM_DATA(_name) CONCAT_3(m_nrf_log_,_name,_logs_data) +#define NRF_LOG_ITEM_DATA_DYNAMIC(_name) CONCAT_2(NRF_LOG_ITEM_DATA(_name),_dynamic) +#define NRF_LOG_ITEM_DATA_CONST(_name) CONCAT_2(NRF_LOG_ITEM_DATA(_name),_const) + +#ifdef UNIT_TEST +#define _CONST +#else +#define _CONST const +#endif + +#if NRF_LOG_FILTERS_ENABLED +#define NRF_LOG_DYNAMIC_STRUCT_NAME nrf_log_module_dynamic_data_t +#else +#define NRF_LOG_DYNAMIC_STRUCT_NAME nrf_log_module_reduced_dynamic_data_t +#endif + +#define NRF_LOG_INTERNAL_ITEM_REGISTER( \ + _name, _str_name, _info_color, _debug_color, _initial_lvl, _compiled_lvl) \ + NRF_SECTION_ITEM_REGISTER(NRF_LOG_CONST_SECTION_NAME(_name), \ + _CONST nrf_log_module_const_data_t NRF_LOG_ITEM_DATA_CONST(_name)) = { \ + .p_module_name = _str_name, \ + .info_color_id = (_info_color), \ + .debug_color_id = (_debug_color), \ + .compiled_lvl = (nrf_log_severity_t)(_compiled_lvl), \ + .initial_lvl = (nrf_log_severity_t)(_initial_lvl), \ + }; \ + NRF_SECTION_ITEM_REGISTER(NRF_LOG_DYNAMIC_SECTION_NAME(_name), \ + NRF_LOG_DYNAMIC_STRUCT_NAME NRF_LOG_ITEM_DATA_DYNAMIC(_name)) + +/**@file + * + * @defgroup nrf_log_instance Macros for logging on instance level + * @{ + * @ingroup nrf_log + * + * @brief Macros for logging on instance level + */ + +/** @def NRF_LOG_INSTANCE_PTR_DECLARE + * @brief Macro for declaring a logger instance pointer in the module stucture. + */ + +/** @def NRF_LOG_INSTANCE_REGISTER + * @brief Macro for creating an independent module instance. + * + * Module instance provides filtering of logs on instance level instead of module level. + */ + +/** @def NRF_LOG_INSTANCE_PTR_INIT + * @brief Macro for initializing a pointer to the logger instance. + */ + + + /** @} */ +#if NRF_LOG_ENABLED +#define NRF_LOG_INSTANCE_PTR_DECLARE(_p_name) NRF_LOG_DYNAMIC_STRUCT_NAME * _p_name; + +#define NRF_LOG_INSTANCE_REGISTER( \ + _module_name, _inst_name, _info_color, _debug_color, _initial_lvl, _compiled_lvl) \ + NRF_LOG_INTERNAL_ITEM_REGISTER(CONCAT_3(_module_name,_,_inst_name), \ + STRINGIFY(_module_name._inst_name), \ + _info_color, \ + _debug_color, \ + _initial_lvl, \ + _compiled_lvl) + +#define NRF_LOG_INSTANCE_PTR_INIT(_p_name, _module_name, _inst_name) \ + ._p_name = &NRF_LOG_ITEM_DATA_DYNAMIC(CONCAT_3(_module_name,_,_inst_name)), + +#else +#define NRF_LOG_INSTANCE_PTR_DECLARE(_p_name) +#define NRF_LOG_INSTANCE_REGISTER(_module_name, _inst_name, info_color, debug_color, _initial_lvl, compiled_lvl) +#define NRF_LOG_INSTANCE_PTR_INIT(_p_name, _module_name, _inst_name) +#endif + +#endif //NRF_LOG_INSTANCE_H diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_str_formatter.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_str_formatter.h new file mode 100644 index 00000000000..b6511832898 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_str_formatter.h @@ -0,0 +1,86 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/**@file + * + * @defgroup nrf_log_str_formatter String formatter for the logger messages + * @{ + * @ingroup nrf_log + */ + +#ifndef NRF_LOG_STR_FORMATTER_H +#define NRF_LOG_STR_FORMATTER_H + +#include +#include "nrf_fprintf.h" +#include "nrf_log_ctrl.h" + +#ifdef __cplusplus +extern "C" { +#endif + +typedef struct +{ + uint32_t timestamp; + uint16_t module_id; + uint16_t dropped; + nrf_log_severity_t severity; + uint8_t use_colors; +} nrf_log_str_formatter_entry_params_t; + + +void nrf_log_std_entry_process(char const * p_str, + uint32_t const * p_args, + uint32_t nargs, + nrf_log_str_formatter_entry_params_t * p_params, + nrf_fprintf_ctx_t * p_ctx); + +void nrf_log_hexdump_entry_process(uint8_t * p_data, + uint32_t data_len, + nrf_log_str_formatter_entry_params_t * p_params, + nrf_fprintf_ctx_t * p_ctx); + +void nrf_log_str_formatter_timestamp_freq_set(uint32_t freq); +#ifdef __cplusplus +} +#endif + +#endif //NRF_LOG_STR_FORMATTER_H +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_types.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_types.h new file mode 100644 index 00000000000..2ae08d30344 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/nrf_log_types.h @@ -0,0 +1,97 @@ +/** + * Copyright (c) 2018 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_LOG_TYPES_H +#define NRF_LOG_TYPES_H + +#include + +/** + * @brief Logger severity levels. + */ +typedef enum +{ + NRF_LOG_SEVERITY_NONE, + NRF_LOG_SEVERITY_ERROR, + NRF_LOG_SEVERITY_WARNING, + NRF_LOG_SEVERITY_INFO, + NRF_LOG_SEVERITY_DEBUG, + NRF_LOG_SEVERITY_INFO_RAW, /* Artificial level to pass information about skipping string postprocessing.*/ +} nrf_log_severity_t; + +/** + * @brief Structure holding dynamic data associated with a module or instance if filtering is enabled (@ref NRF_LOG_FILTERS_ENABLED). + * + * See @ref NRF_LOG_MODULE_REGISTER and @ref NRF_LOG_INSTANCE_REGISTER. + */ +typedef struct +{ + uint16_t module_id; ///< Module ID assigned during initialization. + uint16_t order_idx; ///< Ordered index of the module (used for auto-completion). + uint32_t filter; ///< Current highest severity level accepted (redundant to @ref nrf_log_module_dynamic_data_t::filter_lvls, used for optimization) + uint32_t filter_lvls; ///< Current severity levels for each backend (3 bits per backend). +} nrf_log_module_dynamic_data_t; + +/** + * @brief Structure holding dynamic data associated with a module or instance if filtering is disabled (@ref NRF_LOG_FILTERS_ENABLED). + * + * See @ref NRF_LOG_MODULE_REGISTER and @ref NRF_LOG_INSTANCE_REGISTER. + */ +typedef struct +{ + uint16_t module_id; ///< Module ID assigned during initialization. + uint16_t padding; ///< Padding to fit in word. +} nrf_log_module_reduced_dynamic_data_t; + + +/** + * @brief Structure holding constant data associated with a module or instance. + * + * See @ref NRF_LOG_MODULE_REGISTER and @ref NRF_LOG_INSTANCE_REGISTER. + */ +typedef struct +{ + const char * p_module_name; ///< Module or instance name. + uint8_t info_color_id; ///< Color code of info messages. + uint8_t debug_color_id; ///< Color code of debug messages. + nrf_log_severity_t compiled_lvl; ///< Compiled highest severity level. + nrf_log_severity_t initial_lvl; ///< Severity level for given module or instance set on backend initialization. +} nrf_log_module_const_data_t; + +#endif //NRF_LOG_TYPES_H diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_backend_flash.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_backend_flash.c new file mode 100644 index 00000000000..0efd5d85279 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_backend_flash.c @@ -0,0 +1,739 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "sdk_common.h" +#if NRF_MODULE_ENABLED(NRF_LOG) && NRF_MODULE_ENABLED(NRF_LOG_BACKEND_FLASH) +#include "nrf_log_backend_flash.h" +#include "nrf_log_str_formatter.h" +#include "nrf_fstorage_nvmc.h" +#include "nrf_log.h" +#include "nrf_atomic.h" +#include "nrf_queue.h" +#include "app_error.h" +#include + +#if (NRF_LOG_BACKEND_FLASHLOG_ENABLED == 0) && (NRF_LOG_BACKEND_CRASHLOG_ENABLED == 0) +#error "No flash backend enabled." +#endif + +/** @brief Maximum logger message payload (arguments or data in hexdump) which can be stored. */ +#define FLASH_LOG_MAX_PAYLOAD_SIZE (NRF_LOG_BACKEND_FLASH_SER_BUFFER_SIZE - sizeof(nrf_log_header_t)) + +/** @brief Size of serialization buffer in words. */ +#define FLASH_LOG_SER_BUFFER_WORDS (NRF_LOG_BACKEND_FLASH_SER_BUFFER_SIZE/sizeof(uint32_t)) + +/** @brief Length of logger header. */ +#define LOG_HEADER_LEN (sizeof(nrf_log_header_t)) + +/** @brief Length of logger header given in 32 bit words. */ +#define LOG_HEADER_LEN_WORDS (LOG_HEADER_LEN/sizeof(uint32_t)) + +/** @brief Maximum possible length of standard log message. */ +#define STD_LOG_MSG_MAX_LEN (LOG_HEADER_LEN + NRF_LOG_MAX_NUM_OF_ARGS*sizeof(uint32_t)) + +/* Buffer must be multiple of 4. */ +STATIC_ASSERT((NRF_LOG_BACKEND_FLASH_SER_BUFFER_SIZE % sizeof(uint32_t)) == 0); + +/* Buffer must fit standard log message. */ +STATIC_ASSERT(NRF_LOG_BACKEND_FLASH_SER_BUFFER_SIZE >= STD_LOG_MSG_MAX_LEN); + +/** @brief Flash page size in bytes. */ +#define CODE_PAGE_SIZE 4096 + +/** @brief Start address of the area dedicated for flash log. */ +#define FLASH_LOG_START_ADDR (NRF_LOG_BACKEND_FLASH_START_PAGE * CODE_PAGE_SIZE) + +/** @brief End address of the area dedicated for flash log. */ +#define FLASH_LOG_END_ADDR (FLASH_LOG_START_ADDR + (NRF_LOG_BACKEND_PAGES * CODE_PAGE_SIZE) - 1) + +/** @brief Size of the area dedicated for flash log. */ +#define FLASH_LOG_SIZE (NRF_LOG_BACKEND_PAGES * CODE_PAGE_SIZE) + +/** @brief Start address determined in runtime. + * + * If configuration indicates that flash log should be placed after application. + * */ +#if defined ( __CC_ARM ) +#define RUNTIME_START_ADDR \ + _Pragma("diag_suppress 170") \ + ((NRF_LOG_BACKEND_FLASH_START_PAGE == 0) ? \ + (CODE_PAGE_SIZE*CEIL_DIV((uint32_t)CODE_END, CODE_PAGE_SIZE)) : FLASH_LOG_START_ADDR) \ + _Pragma("diag_default 170") +#else +#define RUNTIME_START_ADDR ((NRF_LOG_BACKEND_FLASH_START_PAGE == 0) ? \ + (CODE_PAGE_SIZE*CEIL_DIV((uint32_t)CODE_END, CODE_PAGE_SIZE)) : FLASH_LOG_START_ADDR) +#endif +static void fstorage_evt_handler(nrf_fstorage_evt_t * p_evt); + +/** @brief Message queue for run time flash log. */ +#if NRF_LOG_BACKEND_FLASHLOG_ENABLED +NRF_QUEUE_DEF(nrf_log_entry_t *, + m_flashlog_queue, + NRF_LOG_BACKEND_FLASHLOG_QUEUE_SIZE, + NRF_QUEUE_MODE_NO_OVERFLOW); +static const nrf_queue_t * mp_flashlog_queue = &m_flashlog_queue; +#else +static const nrf_queue_t * mp_flashlog_queue = NULL; +#endif + + +/** @brief Message FIFO for crash log. */ +#if NRF_LOG_BACKEND_CRASHLOG_ENABLED +NRF_QUEUE_DEF(nrf_log_entry_t *, + m_crashlog_queue, + NRF_LOG_BACKEND_CRASHLOG_FIFO_SIZE, + NRF_QUEUE_MODE_NO_OVERFLOW); +static const nrf_queue_t * mp_crashlog_queue = &m_crashlog_queue; +#else +static const nrf_queue_t * mp_crashlog_queue = NULL; +#endif + + +/** @brief Fstorage instance used for flash log. */ +NRF_FSTORAGE_DEF(nrf_fstorage_t m_log_flash_fstorage) = +{ + /* Set a handler for fstorage events. */ + .evt_handler = fstorage_evt_handler, + .start_addr = FLASH_LOG_START_ADDR, + .end_addr = FLASH_LOG_END_ADDR, +}; + +/** @brief Flash log state. */ +typedef enum +{ + LOG_BACKEND_FLASH_ACTIVE, /**< Flash backend is active. */ + LOG_BACKEND_FLASH_INACTIVE, /**< Flash backend is inactive. All incoming requests are skipped. */ + LOG_BACKEND_FLASH_IN_PANIC, /**< Flash backend is in panic mode. Incoming messages are written to flash in synchronous mode. */ +} log_backend_flash_state_t; + +static log_backend_flash_state_t m_state; /**< Flash logger backend state. */ +static nrf_atomic_flag_t m_busy_flag; /**< Flag indicating if module performs flash writing. */ +static uint32_t m_flash_buf[FLASH_LOG_SER_BUFFER_WORDS]; /**< Buffer used for serializing messages. */ +static uint32_t m_curr_addr; /**< Address of free spot in the storage area. */ +static size_t m_curr_len; /**< Length of current message being written. */ +static uint32_t m_dropped; /**< Number of dropped messages. */ + +/** @brief Log message string injected when entering panic mode. */ +static const char crashlog_str[] = "-----------CRASHLOG------------\r\n"; + +/** @brief Function saturates input to maximum possible length and rounds up value to be multiple + * of word size. + * + * @param length Length value. + * + * @return Modified input length. + */ +static uint32_t saturate_align_length(uint32_t length) +{ + length = (length > FLASH_LOG_MAX_PAYLOAD_SIZE) ? FLASH_LOG_MAX_PAYLOAD_SIZE : length; //saturate + length = CEIL_DIV(length, sizeof(uint32_t))*sizeof(uint32_t); + return length; +} + + +/** + * @brief Function for copying logger message to the buffer. + * + * @param[in] p_msg Logger message. + * @param[out] p_buf Output buffer where serialized message is placed. + * @param[in,out] p_len Buffer size as input, length of prepared data as output. + * + * @return True if message fits into the buffer, false otherwise + */ +static bool msg_to_buf(nrf_log_entry_t * p_msg, uint8_t * p_buf, size_t * p_len) +{ + uint32_t data_len; + nrf_log_header_t header = {0}; + uint32_t memobj_offset = HEADER_SIZE*sizeof(uint32_t); + + nrf_memobj_read(p_msg, &header, HEADER_SIZE*sizeof(uint32_t), 0); + + memcpy(p_buf, &header, sizeof(nrf_log_header_t)); + p_buf += sizeof(nrf_log_header_t); + + switch (header.base.generic.type) + { + case HEADER_TYPE_STD: + { + data_len = header.base.std.nargs * sizeof(uint32_t); + break; + } + case HEADER_TYPE_HEXDUMP: + { + data_len = saturate_align_length(header.base.hexdump.len); + break; + } + default: + *p_len = 0; + return false; + } + nrf_memobj_read(p_msg, p_buf, data_len, memobj_offset); + + if (*p_len >= sizeof(nrf_log_header_t) + data_len) + { + *p_len = sizeof(nrf_log_header_t) + data_len; + return true; + } + else + { + return false; + } +} + +/** + * @brief Function for getting logger message stored in flash. + * + * @param[in] p_buf Pointer to the location where message is stored. + * @param[out] pp_header Pointer to the log message header. + * @param[out] pp_data Pointer to the log message data (arguments or data in case of hexdump). + * + * @return True if message was successfully fetched, false otherwise. + */ +static bool msg_from_buf(uint32_t * p_buf, + nrf_log_header_t * * pp_header, + uint8_t * * pp_data, + uint32_t * p_len) +{ + *pp_header = (nrf_log_header_t *)p_buf; + *pp_data = (uint8_t *)&p_buf[LOG_HEADER_LEN_WORDS]; + + uint32_t data_len; + + switch ((*pp_header)->base.generic.type) + { + case HEADER_TYPE_STD: + { + data_len = ((*pp_header)->base.std.nargs)*sizeof(uint32_t); + break; + } + case HEADER_TYPE_HEXDUMP: + { + + data_len = saturate_align_length((*pp_header)->base.hexdump.len); + break; + } + default: + return false; + } + + *p_len = LOG_HEADER_LEN + data_len; + return true; +} + +/** + * @brief Function for processing log message queue. + * + * If writing to flash is synchronous then function drains the queue and writes all messages to flash. + * If writing to flash is asynchronous then function starts single write operation. In asynchronous mode + * function is called when new message is put into the queue from from flash operation callback. + * + * Function detects the situation that flash module reports attempt to write outside dedicated area. + * In that case flash backend stops writing any new messages. + * + * @param p_queue Queue will log messages + * @param fstorage_blocking If true it indicates that flash operations are blocking, event handler is not used. + */ +static void log_msg_queue_process(nrf_queue_t const * p_queue, bool fstorage_blocking) +{ + nrf_log_entry_t * p_msg; + bool busy = false; + while (nrf_queue_pop(p_queue, &p_msg) == NRF_SUCCESS) + { + ret_code_t err_code; + + m_curr_len = sizeof(m_flash_buf); + if (!msg_to_buf(p_msg, (uint8_t *)m_flash_buf, &m_curr_len)) + { + continue; + } + + err_code = nrf_fstorage_write(&m_log_flash_fstorage, m_curr_addr, m_flash_buf, m_curr_len, p_msg); + + if (err_code == NRF_SUCCESS) + { + if (fstorage_blocking) + { + m_curr_addr += m_curr_len; + + nrf_memobj_put(p_msg); + } + else + { + busy = true; + break; + } + } + else if (!fstorage_blocking && (err_code == NRF_ERROR_NO_MEM)) + { + // fstorage queue got full. Drop entry. + nrf_memobj_put(p_msg); + m_dropped++; + break; + } + else if (err_code == NRF_ERROR_INVALID_ADDR) + { + // Trying to write outside the area, flash log is full. Skip any new writes. + nrf_memobj_put(p_msg); + m_state = LOG_BACKEND_FLASH_INACTIVE; + } + else + { + ASSERT(false); + } + } + + if (!busy) + { + UNUSED_RETURN_VALUE(nrf_atomic_flag_clear(&m_busy_flag)); + } +} + +static void queue_element_drop(nrf_queue_t const * p_queue) +{ + nrf_log_entry_t * p_msg; + if (nrf_queue_pop(p_queue, &p_msg) == NRF_SUCCESS) + { + m_dropped++; + nrf_memobj_put(p_msg); + } +} + +static void fstorage_evt_handler(nrf_fstorage_evt_t * p_evt) +{ + if (m_state == LOG_BACKEND_FLASH_ACTIVE) + { + switch (p_evt->id) + { + case NRF_FSTORAGE_EVT_WRITE_RESULT: + { + if (p_evt->result == NRF_SUCCESS) + { + m_curr_addr += m_curr_len; + m_curr_len = 0; + log_msg_queue_process(mp_flashlog_queue, false); + } + else + { + m_dropped++; + } + + if (p_evt->p_param) + { + nrf_memobj_put((nrf_log_entry_t *)p_evt->p_param); + } + break; + } + default: + break; + } + } + else if ((m_state == LOG_BACKEND_FLASH_INACTIVE) && + (p_evt->id == NRF_FSTORAGE_EVT_ERASE_RESULT) && + (p_evt->addr == RUNTIME_START_ADDR)) + { + m_state = LOG_BACKEND_FLASH_ACTIVE; + } +} + +/** + * @brief Function for enqueueing new message. + * + * If queue is full then the oldest message is freed. + * + * @param p_queue Queue. + * @param p_msg Message. + * + * @return Number of dropped messages + */ +static uint32_t message_enqueue(nrf_queue_t const * p_queue, nrf_log_entry_t * p_msg) +{ + uint32_t dropped = 0; + + //flag was set, busy so enqueue message + while (nrf_queue_push(p_queue, &p_msg) != NRF_SUCCESS) + { + + nrf_log_entry_t * p_old_msg; + if (nrf_queue_pop(p_queue, &p_old_msg) == NRF_SUCCESS) + { + nrf_memobj_put(p_old_msg); + dropped++; + } + } + + return dropped; +} + + +void nrf_log_backend_flashlog_put(nrf_log_backend_t const * p_backend, + nrf_log_entry_t * p_msg) +{ + if (m_state == LOG_BACKEND_FLASH_ACTIVE) + { + nrf_memobj_get(p_msg); + + m_dropped += message_enqueue(mp_flashlog_queue, p_msg); + + if (nrf_atomic_flag_set_fetch(&m_busy_flag) == 0) + { + log_msg_queue_process(mp_flashlog_queue, false); + } + } +} + + +void nrf_log_backend_crashlog_put(nrf_log_backend_t const * p_backend, + nrf_log_entry_t * p_msg) +{ + if (m_state != LOG_BACKEND_FLASH_INACTIVE) + { + nrf_memobj_get(p_msg); + + UNUSED_RETURN_VALUE(message_enqueue(mp_crashlog_queue, p_msg)); + } + + if (m_state == LOG_BACKEND_FLASH_IN_PANIC) + { + log_msg_queue_process(mp_crashlog_queue, true); + } +} + +void nrf_log_backend_flashlog_flush(nrf_log_backend_t const * p_backend) +{ + queue_element_drop(mp_flashlog_queue); +} + +void nrf_log_backend_crashlog_flush(nrf_log_backend_t const * p_backend) +{ + queue_element_drop(mp_crashlog_queue); +} + +void nrf_log_backend_flashlog_panic_set(nrf_log_backend_t const * p_backend) +{ + /* Empty */ +} + +/** + * @brief Function for injecting log message which will indicate start of crash log. + */ +static void crashlog_marker_inject(void) +{ + nrf_log_header_t crashlog_marker_hdr = { + .base = { + .std = { + .type = HEADER_TYPE_STD, + .severity = NRF_LOG_SEVERITY_INFO_RAW, + .nargs = 0, + .addr = (uint32_t)crashlog_str & STD_ADDR_MASK + } + }, + .module_id = 0, + .timestamp = 0, + }; + m_flash_buf[0] = crashlog_marker_hdr.base.raw; + m_flash_buf[1] = crashlog_marker_hdr.module_id; + m_flash_buf[2] = crashlog_marker_hdr.timestamp; + (void)nrf_fstorage_write(&m_log_flash_fstorage, m_curr_addr, m_flash_buf, LOG_HEADER_LEN, NULL); + m_curr_addr += LOG_HEADER_LEN; +} + + +void nrf_log_backend_crashlog_panic_set(nrf_log_backend_t const * p_backend) +{ + if (nrf_fstorage_init(&m_log_flash_fstorage, &nrf_fstorage_nvmc, NULL) == NRF_SUCCESS) + { + m_state = LOG_BACKEND_FLASH_IN_PANIC; + + /* In case of Softdevice MWU may protect access to NVMC. */ + NVIC_DisableIRQ(MWU_IRQn); + + log_msg_queue_process(mp_flashlog_queue, true); + + crashlog_marker_inject(); + + log_msg_queue_process(mp_crashlog_queue, true); + } + else + { + m_state = LOG_BACKEND_FLASH_INACTIVE; + } +} + +/** + * @brief Function for determining first empty location in area dedicated for flash logger backend. + */ +static uint32_t empty_addr_get(void) +{ + uint32_t token = 0; + nrf_log_header_t * p_dummy_header; + uint8_t * p_dummy_data; + + while(nrf_log_backend_flash_next_entry_get(&token, &p_dummy_header, &p_dummy_data) == NRF_SUCCESS) + { + + } + + return token; +} + + +ret_code_t nrf_log_backend_flash_init(nrf_fstorage_api_t const * p_fs_api) +{ + ret_code_t err_code; + + + uint32_t start_addr = RUNTIME_START_ADDR; + uint32_t end_addr = start_addr + FLASH_LOG_SIZE - 1; + + m_log_flash_fstorage.start_addr = start_addr; + m_log_flash_fstorage.end_addr = end_addr; + + err_code = nrf_fstorage_init(&m_log_flash_fstorage, p_fs_api, NULL); + if (err_code != NRF_SUCCESS) + { + return err_code; + } + + m_curr_addr = empty_addr_get(); + m_state = LOG_BACKEND_FLASH_ACTIVE; + + return err_code; +} + + +ret_code_t nrf_log_backend_flash_next_entry_get(uint32_t * p_token, + nrf_log_header_t * * pp_header, + uint8_t * * pp_data) +{ + uint32_t * p_addr = p_token; + uint32_t len; + + *p_addr = (*p_addr == 0) ? RUNTIME_START_ADDR : *p_addr; + + if (nrf_fstorage_rmap(&m_log_flash_fstorage, *p_addr) == NULL) + { + //Supports only memories which can be mapped for reading. + return NRF_ERROR_NOT_SUPPORTED; + } + + if (msg_from_buf((uint32_t *)*p_addr, pp_header, pp_data, &len)) + { + *p_addr += len; + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_NOT_FOUND; + } +} + + +ret_code_t nrf_log_backend_flash_erase(void) +{ + ret_code_t err_code; + + m_state = LOG_BACKEND_FLASH_INACTIVE; + err_code = nrf_fstorage_erase(&m_log_flash_fstorage, RUNTIME_START_ADDR, NRF_LOG_BACKEND_PAGES, NULL); + + m_curr_addr = RUNTIME_START_ADDR; + + return err_code; +} + +#if NRF_LOG_BACKEND_FLASHLOG_ENABLED +const nrf_log_backend_api_t nrf_log_backend_flashlog_api = { + .put = nrf_log_backend_flashlog_put, + .flush = nrf_log_backend_flashlog_flush, + .panic_set = nrf_log_backend_flashlog_panic_set, +}; +#endif + +#if NRF_LOG_BACKEND_CRASHLOG_ENABLED +const nrf_log_backend_api_t nrf_log_backend_crashlog_api = { + .put = nrf_log_backend_crashlog_put, + .flush = nrf_log_backend_crashlog_flush, + .panic_set = nrf_log_backend_crashlog_panic_set, +}; +#endif + +#if NRF_LOG_BACKEND_FLASH_CLI_CMDS +#include "nrf_cli.h" + +static uint8_t m_buffer[64]; +static nrf_cli_t const * mp_cli; + +static void cli_tx(void const * p_context, char const * p_buffer, size_t len); + +static nrf_fprintf_ctx_t m_fprintf_ctx = +{ + .p_io_buffer = (char *)m_buffer, + .io_buffer_size = sizeof(m_buffer)-1, + .io_buffer_cnt = 0, + .auto_flush = true, + .p_user_ctx = &mp_cli, + .fwrite = cli_tx +}; + + +static void flashlog_clear_cmd(nrf_cli_t const * p_cli, size_t argc, char ** argv) +{ + if (nrf_cli_help_requested(p_cli)) + { + nrf_cli_help_print(p_cli, NULL, 0); + } + + UNUSED_RETURN_VALUE(nrf_log_backend_flash_erase()); +} + +#include "nrf_delay.h" +static void cli_tx(void const * p_context, char const * p_buffer, size_t len) +{ + nrf_cli_t * * pp_cli = (nrf_cli_t * *)p_context; + char * p_strbuf = (char *)&p_buffer[len]; + *p_strbuf = '\0'; + nrf_cli_fprintf((nrf_cli_t const *)*pp_cli, NRF_CLI_DEFAULT, p_buffer); + // nrf_delay_ms(10); +} + + +static void entry_process(nrf_cli_t const * p_cli, nrf_log_header_t * p_header, uint8_t * p_data) +{ + mp_cli = p_cli; + + nrf_log_str_formatter_entry_params_t params = + { + .timestamp = p_header->timestamp, + .module_id = p_header->module_id, + .use_colors = 0, + }; + + switch (p_header->base.generic.type) + { + case HEADER_TYPE_STD: + { + params.severity = (nrf_log_severity_t)p_header->base.std.severity; + nrf_log_std_entry_process((const char *)((uint32_t)p_header->base.std.addr), + (uint32_t *)p_data, + p_header->base.std.nargs, + ¶ms, + &m_fprintf_ctx); + break; + } + case HEADER_TYPE_HEXDUMP: + { + params.severity = (nrf_log_severity_t)p_header->base.hexdump.severity; + + nrf_log_hexdump_entry_process(p_data, + p_header->base.hexdump.len, + ¶ms, + &m_fprintf_ctx); + break; + } + default: + ASSERT(0); + } + +} + + +static void flashlog_read_cmd(nrf_cli_t const * p_cli, size_t argc, char ** argv) +{ + if (nrf_cli_help_requested(p_cli)) + { + nrf_cli_help_print(p_cli, NULL, 0); + } + + uint32_t token = 0; + uint8_t * p_data = NULL; + bool empty = true; + nrf_log_header_t * p_header; + + while (1) + { + if (nrf_log_backend_flash_next_entry_get(&token, &p_header, &p_data) == NRF_SUCCESS) + { + entry_process(p_cli, p_header, p_data); + empty = false; + } + else + { + break; + } + } + + if (empty) + { + nrf_cli_fprintf(p_cli, NRF_CLI_ERROR, "Flash log empty\r\n"); + } +} + + +static void flashlog_status_cmd(nrf_cli_t const * p_cli, size_t argc, char ** argv) +{ + if (nrf_cli_help_requested(p_cli)) + { + nrf_cli_help_print(p_cli, NULL, 0); + } + + nrf_cli_fprintf(p_cli, NRF_CLI_NORMAL, "Flash log status:\r\n"); + nrf_cli_fprintf(p_cli, NRF_CLI_NORMAL, "\t\t- Location (address: 0x%08X, length: %d)\r\n", + RUNTIME_START_ADDR, FLASH_LOG_SIZE); + nrf_cli_fprintf(p_cli, NRF_CLI_NORMAL, "\t\t- Current usage:%d%% (%d of %d bytes used)\r\n", + 100ul * (m_curr_addr - RUNTIME_START_ADDR)/FLASH_LOG_SIZE, + m_curr_addr - RUNTIME_START_ADDR, + FLASH_LOG_SIZE); + nrf_cli_fprintf(p_cli, NRF_CLI_NORMAL, "\t\t- Dropped logs: %d\r\n", m_dropped); + + +} + + +NRF_CLI_CREATE_STATIC_SUBCMD_SET(m_flashlog_cmd) +{ + NRF_CLI_CMD(clear, NULL, "Remove logs", flashlog_clear_cmd), + NRF_CLI_CMD(read, NULL, "Read stored logs", flashlog_read_cmd), + NRF_CLI_CMD(status, NULL, "Flash log status", flashlog_status_cmd), + NRF_CLI_SUBCMD_SET_END +}; + +NRF_CLI_CMD_REGISTER(flashlog, &m_flashlog_cmd, "Commands for reading logs stored in non-volatile memory", NULL); + +#endif //NRF_LOG_BACKEND_FLASH_CLI_CMDS + +#endif //NRF_MODULE_ENABLED(NRF_LOG) && NRF_MODULE_ENABLED(NRF_LOG_BACKEND_FLASH) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_backend_rtt.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_backend_rtt.c new file mode 100644 index 00000000000..1ff3a26f14a --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_backend_rtt.c @@ -0,0 +1,123 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "sdk_common.h" +#if NRF_MODULE_ENABLED(NRF_LOG) && NRF_MODULE_ENABLED(NRF_LOG_BACKEND_RTT) +#include "nrf_log_backend_rtt.h" +#include "nrf_log_backend_serial.h" +#include "nrf_log_str_formatter.h" +#include "nrf_log_internal.h" +#include "nrf_delay.h" +#include +#include + +static bool m_host_present; + +static uint8_t m_string_buff[NRF_LOG_BACKEND_RTT_TEMP_BUFFER_SIZE]; + +void nrf_log_backend_rtt_init(void) +{ + SEGGER_RTT_Init(); +} + +static void serial_tx(void const * p_context, char const * buffer, size_t len) +{ + if (len) + { + uint32_t idx = 0; + uint32_t processed; + uint32_t watchdog_counter = NRF_LOG_BACKEND_RTT_TX_RETRY_CNT; + do + { + processed = SEGGER_RTT_WriteNoLock(0, &buffer[idx], len); + idx += processed; + len -= processed; + if (processed == 0) + { + /* There are two possible reasons for not writing any data to RTT: + * - The host is not connected and not reading the data. + * - The buffer got full and will be read by the host. + * These two situations are distinguished using the following algorithm. + * At the begining, the module assumes that the host is active, + * so when no data is read, it busy waits and retries. + * If, after retrying, the host reads the data, the module assumes that the host is active. + * If it fails, the module assumes that the host is inactive and stores that information. On next + * call, only one attempt takes place. The host is marked as active if the attempt is successful. + */ + if (!m_host_present) + { + break; + } + else + { + nrf_delay_ms(NRF_LOG_BACKEND_RTT_TX_RETRY_DELAY_MS); + watchdog_counter--; + if (watchdog_counter == 0) + { + m_host_present = false; + break; + } + } + } + m_host_present = true; + } while (len); + } +} +static void nrf_log_backend_rtt_put(nrf_log_backend_t const * p_backend, + nrf_log_entry_t * p_msg) +{ + nrf_log_backend_serial_put(p_backend, p_msg, m_string_buff, NRF_LOG_BACKEND_RTT_TEMP_BUFFER_SIZE, serial_tx); +} + +static void nrf_log_backend_rtt_flush(nrf_log_backend_t const * p_backend) +{ + +} + +static void nrf_log_backend_rtt_panic_set(nrf_log_backend_t const * p_backend) +{ + +} + +const nrf_log_backend_api_t nrf_log_backend_rtt_api = { + .put = nrf_log_backend_rtt_put, + .flush = nrf_log_backend_rtt_flush, + .panic_set = nrf_log_backend_rtt_panic_set, +}; +#endif //NRF_MODULE_ENABLED(NRF_LOG) && NRF_MODULE_ENABLED(NRF_LOG_BACKEND_RTT) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_backend_serial.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_backend_serial.c new file mode 100644 index 00000000000..7db00744e48 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_backend_serial.c @@ -0,0 +1,115 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "sdk_common.h" +#if NRF_MODULE_ENABLED(NRF_LOG) +#include "nrf_log_backend_serial.h" +#include "nrf_log_str_formatter.h" +#include "nrf_log_internal.h" + +void nrf_log_backend_serial_put(nrf_log_backend_t const * p_backend, + nrf_log_entry_t * p_msg, + uint8_t * p_buffer, + uint32_t length, + nrf_fprintf_fwrite tx_func) +{ + nrf_memobj_get(p_msg); + + nrf_fprintf_ctx_t fprintf_ctx = { + .p_io_buffer = (char *)p_buffer, + .io_buffer_size = length, + .io_buffer_cnt = 0, + .auto_flush = false, + .p_user_ctx = NULL, + .fwrite = tx_func + }; + + nrf_log_str_formatter_entry_params_t params; + + nrf_log_header_t header; + uint32_t memobj_offset = 0; + nrf_memobj_read(p_msg, &header, HEADER_SIZE*sizeof(uint32_t), memobj_offset); + memobj_offset = HEADER_SIZE*sizeof(uint32_t); + + params.timestamp = header.timestamp; + params.module_id = header.module_id; + params.dropped = header.dropped; + params.use_colors = NRF_LOG_USES_COLORS; + + /*lint -save -e438*/ + if (header.base.generic.type == HEADER_TYPE_STD) + { + char const * p_log_str = (char const *)((uint32_t)header.base.std.addr); + params.severity = (nrf_log_severity_t)header.base.std.severity; + uint32_t nargs = header.base.std.nargs; + uint32_t args[NRF_LOG_MAX_NUM_OF_ARGS]; + + nrf_memobj_read(p_msg, args, nargs*sizeof(uint32_t), memobj_offset); + memobj_offset += (nargs*sizeof(uint32_t)); + + nrf_log_std_entry_process(p_log_str, + args, + nargs, + ¶ms, + &fprintf_ctx); + + } + else if (header.base.generic.type == HEADER_TYPE_HEXDUMP) + { + uint32_t data_len = header.base.hexdump.len; + params.severity = (nrf_log_severity_t)header.base.hexdump.severity; + uint8_t data_buf[8]; + uint32_t chunk_len; + do + { + chunk_len = sizeof(data_buf) > data_len ? data_len : sizeof(data_buf); + nrf_memobj_read(p_msg, data_buf, chunk_len, memobj_offset); + memobj_offset += chunk_len; + data_len -= chunk_len; + + nrf_log_hexdump_entry_process(data_buf, + chunk_len, + ¶ms, + &fprintf_ctx); + } while (data_len > 0); + } + nrf_memobj_put(p_msg); + /*lint -restore*/ +} +#endif //NRF_LOG_ENABLED diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_backend_serial.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_backend_serial.h new file mode 100644 index 00000000000..22d26f5fdca --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_backend_serial.h @@ -0,0 +1,77 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_LOG_BACKEND_SERIAL_H +#define NRF_LOG_BACKEND_SERIAL_H +/**@file + * @addtogroup nrf_log Logger module + * @ingroup app_common + * + * @defgroup nrf_log_backend_serial Common part of serial backends + * @{ + * @ingroup nrf_log + * @brief The nrf_log serial backend common put function. + */ + + +#include "nrf_log_backend_interface.h" +#include "nrf_fprintf.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief A function for processing logger entry with simple serial interface as output. + * + * + */ +void nrf_log_backend_serial_put(nrf_log_backend_t const * p_backend, + nrf_log_entry_t * p_msg, + uint8_t * p_buffer, + uint32_t length, + nrf_fprintf_fwrite tx_func); + +#endif //NRF_LOG_BACKEND_SERIAL_H + +#ifdef __cplusplus +} +#endif + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_backend_uart.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_backend_uart.c new file mode 100644 index 00000000000..76dad8a604d --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_backend_uart.c @@ -0,0 +1,116 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "sdk_common.h" +#if NRF_MODULE_ENABLED(NRF_LOG) && NRF_MODULE_ENABLED(NRF_LOG_BACKEND_UART) +#include "nrf_log_backend_uart.h" +#include "nrf_log_backend_serial.h" +#include "nrf_log_internal.h" +#include "nrf_drv_uart.h" +#include "app_error.h" + +nrf_drv_uart_t m_uart = NRF_DRV_UART_INSTANCE(0); + +static uint8_t m_string_buff[NRF_LOG_BACKEND_UART_TEMP_BUFFER_SIZE]; +static volatile bool m_xfer_done; +static bool m_async_mode; +static void uart_evt_handler(nrf_drv_uart_event_t * p_event, void * p_context) +{ + m_xfer_done = true; +} + +static void uart_init(bool async_mode) +{ + nrf_drv_uart_config_t config = NRF_DRV_UART_DEFAULT_CONFIG; + config.pseltxd = NRF_LOG_BACKEND_UART_TX_PIN; + config.pselrxd = NRF_UART_PSEL_DISCONNECTED; + config.pselcts = NRF_UART_PSEL_DISCONNECTED; + config.pselrts = NRF_UART_PSEL_DISCONNECTED; + config.baudrate = (nrf_uart_baudrate_t)NRF_LOG_BACKEND_UART_BAUDRATE; + ret_code_t err_code = nrf_drv_uart_init(&m_uart, &config, async_mode ? uart_evt_handler : NULL); + APP_ERROR_CHECK(err_code); + + m_async_mode = async_mode; +} + +void nrf_log_backend_uart_init(void) +{ + bool async_mode = NRF_LOG_DEFERRED ? true : false; + uart_init(async_mode); +} + +static void serial_tx(void const * p_context, char const * p_buffer, size_t len) +{ + uint8_t len8 = (uint8_t)(len & 0x000000FF); + m_xfer_done = false; + ret_code_t err_code = nrf_drv_uart_tx(&m_uart, (uint8_t *)p_buffer, len8); + APP_ERROR_CHECK(err_code); + /* wait for completion since buffer is reused*/ + while (m_async_mode && (m_xfer_done == false)) + { + + } + +} + +static void nrf_log_backend_uart_put(nrf_log_backend_t const * p_backend, + nrf_log_entry_t * p_msg) +{ + nrf_log_backend_serial_put(p_backend, p_msg, m_string_buff, + NRF_LOG_BACKEND_UART_TEMP_BUFFER_SIZE, serial_tx); +} + +static void nrf_log_backend_uart_flush(nrf_log_backend_t const * p_backend) +{ + +} + +static void nrf_log_backend_uart_panic_set(nrf_log_backend_t const * p_backend) +{ + nrf_drv_uart_uninit(&m_uart); + + uart_init(false); +} + +const nrf_log_backend_api_t nrf_log_backend_uart_api = { + .put = nrf_log_backend_uart_put, + .flush = nrf_log_backend_uart_flush, + .panic_set = nrf_log_backend_uart_panic_set, +}; +#endif //NRF_MODULE_ENABLED(NRF_LOG) && NRF_MODULE_ENABLED(NRF_LOG_BACKEND_UART) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_ctrl_internal.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_ctrl_internal.h new file mode 100644 index 00000000000..ba8a574b5b4 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_ctrl_internal.h @@ -0,0 +1,80 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_LOG_CTRL_INTERNAL_H +#define NRF_LOG_CTRL_INTERNAL_H +/** + * @cond (NODOX) + * @defgroup nrf_log_ctrl_internal Auxiliary internal types declarations + * @{ + * @internal + */ + +#include "sdk_common.h" +#if NRF_MODULE_ENABLED(NRF_LOG) +#define NRF_LOG_INTERNAL_INIT(...) \ + nrf_log_init(GET_VA_ARG_1(__VA_ARGS__), \ + GET_VA_ARG_1(GET_ARGS_AFTER_1(__VA_ARGS__, NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY))) + +#define NRF_LOG_INTERNAL_PROCESS() nrf_log_frontend_dequeue() +#define NRF_LOG_INTERNAL_FLUSH() \ + do { \ + while (NRF_LOG_INTERNAL_PROCESS()); \ + } while (0) + +#define NRF_LOG_INTERNAL_FINAL_FLUSH() \ + do { \ + nrf_log_panic(); \ + NRF_LOG_INTERNAL_FLUSH(); \ + } while (0) + + +#else // NRF_MODULE_ENABLED(NRF_LOG) +#define NRF_LOG_INTERNAL_PROCESS() false +#define NRF_LOG_INTERNAL_FLUSH() +#define NRF_LOG_INTERNAL_INIT(timestamp_func) NRF_SUCCESS +#define NRF_LOG_INTERNAL_HANDLERS_SET(default_handler, bytes_handler) \ + UNUSED_PARAMETER(default_handler); UNUSED_PARAMETER(bytes_handler) +#define NRF_LOG_INTERNAL_FINAL_FLUSH() +#endif // NRF_MODULE_ENABLED(NRF_LOG) + +/** @} + * @endcond + */ +#endif // NRF_LOG_CTRL_INTERNAL_H diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_default_backends.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_default_backends.c new file mode 100644 index 00000000000..c844f2e880c --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_default_backends.c @@ -0,0 +1,76 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "sdk_common.h" +#if NRF_MODULE_ENABLED(NRF_LOG) +#include "nrf_log_default_backends.h" +#include "nrf_log_ctrl.h" +#include "nrf_log_internal.h" +#include "nrf_assert.h" + +#if defined(NRF_LOG_BACKEND_RTT_ENABLED) && NRF_LOG_BACKEND_RTT_ENABLED +#include "nrf_log_backend_rtt.h" +NRF_LOG_BACKEND_RTT_DEF(rtt_log_backend); +#endif + +#if defined(NRF_LOG_BACKEND_UART_ENABLED) && NRF_LOG_BACKEND_UART_ENABLED +#include "nrf_log_backend_uart.h" +NRF_LOG_BACKEND_UART_DEF(uart_log_backend); +#endif + +void nrf_log_default_backends_init(void) +{ + int32_t backend_id = -1; + (void)backend_id; +#if defined(NRF_LOG_BACKEND_RTT_ENABLED) && NRF_LOG_BACKEND_RTT_ENABLED + nrf_log_backend_rtt_init(); + backend_id = nrf_log_backend_add(&rtt_log_backend.backend, NRF_LOG_SEVERITY_DEBUG); + ASSERT(backend_id >= 0); + nrf_log_backend_enable(&rtt_log_backend.backend); +#endif + +#if defined(NRF_LOG_BACKEND_UART_ENABLED) && NRF_LOG_BACKEND_UART_ENABLED + nrf_log_backend_uart_init(); + backend_id = nrf_log_backend_add(&uart_log_backend.backend, NRF_LOG_SEVERITY_DEBUG); + ASSERT(backend_id >= 0); + nrf_log_backend_enable(&uart_log_backend.backend); +#endif +} +#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_frontend.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_frontend.c new file mode 100644 index 00000000000..4e657024f4e --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_frontend.c @@ -0,0 +1,1245 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "sdk_common.h" +#if NRF_MODULE_ENABLED(NRF_LOG) +#include "app_util.h" +#include "app_util_platform.h" +#include "nrf_log.h" +#include "nrf_log_internal.h" +#include "nrf_log_ctrl.h" +#include "nrf_log_str_formatter.h" +#include "nrf_section.h" +#include "nrf_memobj.h" +#include "nrf_atomic.h" +#include + +STATIC_ASSERT((NRF_LOG_BUFSIZE % 4) == 0); +STATIC_ASSERT(IS_POWER_OF_TWO(NRF_LOG_BUFSIZE)); + +#define NRF_LOG_BUF_WORDS (NRF_LOG_BUFSIZE/4) + +#if NRF_LOG_BUF_WORDS < 32 +#warning "NRF_LOG_BUFSIZE too small, significant number of logs may be lost." +#endif + +NRF_MEMOBJ_POOL_DEF(log_mempool, NRF_LOG_MSGPOOL_ELEMENT_SIZE, NRF_LOG_MSGPOOL_ELEMENT_COUNT); + +#define NRF_LOG_BACKENDS_FULL 0xFF +#define NRF_LOG_FILTER_BITS_PER_BACKEND 3 +#define NRF_LOG_MAX_BACKENDS (32/NRF_LOG_FILTER_BITS_PER_BACKEND) +#define NRF_LOG_MAX_HEXDUMP (NRF_LOG_MSGPOOL_ELEMENT_SIZE*NRF_LOG_MSGPOOL_ELEMENT_COUNT/2) + +/** + * brief An internal control block of the logger + * + * @note Circular buffer is using never cleared indexes and a mask. It means + * that logger may break when indexes overflows. However, it is quite unlikely. + * With rate of 1000 log entries with 2 parameters per second such situation + * would happen after 12 days. + */ +typedef struct +{ + uint32_t wr_idx; // Current write index (never reset) + uint32_t rd_idx; // Current read index (never_reset) + uint32_t mask; // Size of buffer (must be power of 2) presented as mask + uint32_t buffer[NRF_LOG_BUF_WORDS]; + nrf_log_timestamp_func_t timestamp_func; // A pointer to function that returns timestamp + nrf_log_backend_t * p_backend_head; + nrf_atomic_flag_t log_skipping; + nrf_atomic_flag_t log_skipped; + nrf_atomic_u32_t log_dropped_cnt; + bool autoflush; +} log_data_t; + +static log_data_t m_log_data; + +/*lint -save -esym(526,log_const_data*) -esym(526,log_dynamic_data*)*/ +NRF_SECTION_DEF(log_dynamic_data, NRF_LOG_DYNAMIC_STRUCT_NAME); +NRF_SECTION_DEF(log_const_data, nrf_log_module_const_data_t); +/*lint -restore*/ +NRF_LOG_MODULE_REGISTER(); +// Helper macros for section variables. +#define NRF_LOG_DYNAMIC_SECTION_VARS_GET(i) NRF_SECTION_ITEM_GET(log_dynamic_data, NRF_LOG_DYNAMIC_STRUCT_NAME, (i)) + +#define NRF_LOG_CONST_SECTION_VARS_GET(i) NRF_SECTION_ITEM_GET(log_const_data, nrf_log_module_const_data_t, (i)) +#define NRF_LOG_CONST_SECTION_VARS_COUNT NRF_SECTION_ITEM_COUNT(log_const_data, nrf_log_module_const_data_t) + +#define PUSHED_HEADER_FILL(P_HDR, OFFSET, LENGTH) \ + (P_HDR)->base.raw = 0; \ + (P_HDR)->base.pushed.type = HEADER_TYPE_PUSHED; \ + (P_HDR)->base.pushed.offset = OFFSET; \ + (P_HDR)->base.pushed.len = LENGTH + + +ret_code_t nrf_log_init(nrf_log_timestamp_func_t timestamp_func, uint32_t timestamp_freq) +{ + if (NRF_LOG_USES_TIMESTAMP && (timestamp_func == NULL)) + { + return NRF_ERROR_INVALID_PARAM; + } + + m_log_data.mask = NRF_LOG_BUF_WORDS - 1; + m_log_data.wr_idx = 0; + m_log_data.rd_idx = 0; + m_log_data.log_skipped = 0; + m_log_data.log_skipping = 0; + m_log_data.autoflush = NRF_LOG_DEFERRED ? false : true; + if (NRF_LOG_USES_TIMESTAMP) + { + nrf_log_str_formatter_timestamp_freq_set(timestamp_freq); + m_log_data.timestamp_func = timestamp_func; + } + + ret_code_t err_code = nrf_memobj_pool_init(&log_mempool); + if (err_code != NRF_SUCCESS) + { + return err_code; + } + + uint32_t modules_cnt = NRF_LOG_CONST_SECTION_VARS_COUNT; + uint32_t i; + if (NRF_LOG_FILTERS_ENABLED) + { + uint32_t j; + //sort modules by name + for (i = 0; i < modules_cnt; i++) + { + uint32_t idx = 0; + + for (j = 0; j < modules_cnt; j++) + { + if (i != j) + { + char const * p_name0 = NRF_LOG_CONST_SECTION_VARS_GET(i)->p_module_name; + char const * p_name1 = NRF_LOG_CONST_SECTION_VARS_GET(j)->p_module_name; + if (strncmp(p_name0, p_name1, 20) > 0) + { + idx++; + } + } + + } + nrf_log_module_dynamic_data_t * p_module_ddata = + (nrf_log_module_dynamic_data_t *)NRF_LOG_DYNAMIC_SECTION_VARS_GET(i); + p_module_ddata->filter = 0; + p_module_ddata->module_id = i; + p_module_ddata->order_idx = idx; + } + } + else + { + for(i = 0; i < modules_cnt; i++) + { + nrf_log_module_reduced_dynamic_data_t * p_module_ddata = + (nrf_log_module_reduced_dynamic_data_t *)NRF_LOG_DYNAMIC_SECTION_VARS_GET(i); + p_module_ddata->module_id = i; + } + } + + return NRF_SUCCESS; +} + +uint32_t nrf_log_module_cnt_get(void) +{ + return NRF_LOG_CONST_SECTION_VARS_COUNT; +} + +static ret_code_t module_idx_get(uint32_t * p_idx, bool ordered_idx) +{ + if (ordered_idx) + { + uint32_t module_cnt = nrf_log_module_cnt_get(); + uint32_t i; + for (i = 0; i < module_cnt; i++) + { + nrf_log_module_dynamic_data_t * p_module_data = + (nrf_log_module_dynamic_data_t *)NRF_LOG_DYNAMIC_SECTION_VARS_GET(i); + if (p_module_data->order_idx == *p_idx) + { + *p_idx = i; + return NRF_SUCCESS; + } + } + return NRF_ERROR_NOT_FOUND; + } + else + { + return NRF_SUCCESS; + } +} +const char * nrf_log_module_name_get(uint32_t module_id, bool ordered_idx) +{ + if (module_idx_get(&module_id, ordered_idx) == NRF_SUCCESS) + { + nrf_log_module_const_data_t * p_module_data = NRF_LOG_CONST_SECTION_VARS_GET(module_id); + return p_module_data->p_module_name; + } + else + { + return NULL; + } +} + +uint8_t nrf_log_color_id_get(uint32_t module_id, nrf_log_severity_t severity) +{ + nrf_log_module_const_data_t * p_module_data = NRF_LOG_CONST_SECTION_VARS_GET(module_id); + uint8_t color_id; + switch (severity) + { + case NRF_LOG_SEVERITY_ERROR: + color_id = NRF_LOG_ERROR_COLOR; + break; + case NRF_LOG_SEVERITY_WARNING: + color_id = NRF_LOG_WARNING_COLOR; + break; + case NRF_LOG_SEVERITY_INFO: + color_id = p_module_data->info_color_id; + break; + case NRF_LOG_SEVERITY_DEBUG: + color_id = p_module_data->debug_color_id; + break; + default: + color_id = 0; + break; + } + return color_id; +} + +static uint32_t higher_lvl_get(uint32_t lvls) +{ + uint32_t top_lvl = 0; + uint32_t tmp_lvl; + uint32_t i; + + //Find highest level enabled by backends + for (i = 0; i < (32/NRF_LOG_LEVEL_BITS); i+=NRF_LOG_LEVEL_BITS) + { + tmp_lvl = BF_GET(lvls,NRF_LOG_LEVEL_BITS, i); + if (tmp_lvl > top_lvl) + { + top_lvl = tmp_lvl; + } + } + return top_lvl; +} + +void nrf_log_module_filter_set(uint32_t backend_id, uint32_t module_id, nrf_log_severity_t severity) +{ + if (NRF_LOG_FILTERS_ENABLED) + { + nrf_log_module_dynamic_data_t * p_module_filter = + (nrf_log_module_dynamic_data_t *)NRF_LOG_DYNAMIC_SECTION_VARS_GET(module_id); + p_module_filter->filter_lvls &= ~(NRF_LOG_LEVEL_MASK << (NRF_LOG_LEVEL_BITS * backend_id)); + p_module_filter->filter_lvls |= (severity & NRF_LOG_LEVEL_MASK) << (NRF_LOG_LEVEL_BITS * backend_id); + p_module_filter->filter = higher_lvl_get(p_module_filter->filter_lvls); + } +} + +static nrf_log_severity_t nrf_log_module_init_filter_get(uint32_t module_id) +{ + nrf_log_module_const_data_t * p_module_data = + NRF_LOG_CONST_SECTION_VARS_GET(module_id); + return NRF_LOG_FILTERS_ENABLED ? p_module_data->initial_lvl : p_module_data->compiled_lvl; +} + +nrf_log_severity_t nrf_log_module_filter_get(uint32_t backend_id, + uint32_t module_id, + bool ordered_idx, + bool dynamic) +{ + nrf_log_severity_t severity = NRF_LOG_SEVERITY_NONE; + if (NRF_LOG_FILTERS_ENABLED && dynamic) + { + if (module_idx_get(&module_id, ordered_idx) == NRF_SUCCESS) + { + nrf_log_module_dynamic_data_t * p_module_filter = + (nrf_log_module_dynamic_data_t *)NRF_LOG_DYNAMIC_SECTION_VARS_GET(module_id); + severity = (nrf_log_severity_t)((p_module_filter->filter_lvls >> (NRF_LOG_LEVEL_BITS * backend_id)) & + NRF_LOG_LEVEL_MASK); + } + } + else if (!dynamic) + { + if (module_idx_get(&module_id, ordered_idx) == NRF_SUCCESS) + { + nrf_log_module_const_data_t * p_module_data = + NRF_LOG_CONST_SECTION_VARS_GET(module_id); + severity = (nrf_log_severity_t)p_module_data->compiled_lvl; + } + } + return severity; +} +/** + * Function examines current header and omits pushed strings and packets which are in progress. + */ +static bool invalid_packets_pushed_str_omit(nrf_log_header_t const * p_header, uint32_t * p_rd_idx) +{ + bool ret = false; + if ((p_header->base.generic.type == HEADER_TYPE_PUSHED) || (p_header->base.generic.in_progress == 1)) + { + if (p_header->base.generic.in_progress == 1) + { + switch (p_header->base.generic.type) + { + case HEADER_TYPE_STD: + *p_rd_idx += (HEADER_SIZE + p_header->base.std.nargs); + break; + case HEADER_TYPE_HEXDUMP: + *p_rd_idx += (HEADER_SIZE + p_header->base.hexdump.len); + break; + default: + ASSERT(0); + break; + } + } + else + { + *p_rd_idx += + (PUSHED_HEADER_SIZE + p_header->base.pushed.len + p_header->base.pushed.offset); + } + ret = true; + } + return ret; +} +/** + * @brief Skips the oldest, not pushed logs to make space for new logs. + * @details This function moves forward read index to prepare space for new logs. + */ + +static uint32_t log_skip(void) +{ + uint16_t dropped = 0; + + (void)nrf_atomic_flag_set(&m_log_data.log_skipped); + (void)nrf_atomic_flag_set(&m_log_data.log_skipping); + + uint32_t rd_idx = m_log_data.rd_idx; + uint32_t mask = m_log_data.mask; + nrf_log_header_t * p_header = (nrf_log_header_t *)&m_log_data.buffer[rd_idx & mask]; + nrf_log_header_t header; + + // Skip any string that is pushed to the circular buffer. + do { + if (invalid_packets_pushed_str_omit(p_header, &rd_idx)) + { + //something was omitted. Point to new header and try again. + p_header = (nrf_log_header_t *)&m_log_data.buffer[rd_idx & mask]; + } + else + { + break; + } + } while (true); + + uint32_t i; + for (i = 0; i < HEADER_SIZE; i++) + { + ((uint32_t*)&header)[i] = m_log_data.buffer[rd_idx++ & mask]; + } + + switch (header.base.generic.type) + { + case HEADER_TYPE_HEXDUMP: + dropped = header.dropped; + rd_idx += CEIL_DIV(header.base.hexdump.len, sizeof(uint32_t)); + break; + case HEADER_TYPE_STD: + dropped = header.dropped; + rd_idx += header.base.std.nargs; + break; + default: + ASSERT(false); + break; + } + + uint32_t log_skipping_tmp = nrf_atomic_flag_clear_fetch(&m_log_data.log_skipping); + //update read index only if log_skip was not interrupted by another log skip + if (log_skipping_tmp) + { + m_log_data.rd_idx = rd_idx; + } + + return (uint32_t)dropped; +} + +/** + * @brief Function for getting number of dropped logs. Dropped counter is reset after reading. + * + * @return Number of dropped logs saturated to 16 bits. + */ +static inline uint32_t dropped_sat16_get(void) +{ + uint32_t dropped = nrf_atomic_u32_fetch_store(&m_log_data.log_dropped_cnt, 0); + return __USAT(dropped, 16); //Saturate to 16 bits +} + + +static inline void std_header_set(uint32_t severity_mid, + char const * const p_str, + uint32_t nargs, + uint32_t wr_idx, + uint32_t mask) +{ + + + //Prepare header - in reverse order to ensure that packet type is validated (set to STD as last action) + uint32_t module_id = severity_mid >> NRF_LOG_MODULE_ID_POS; + uint32_t dropped = dropped_sat16_get(); + ASSERT(module_id < nrf_log_module_cnt_get()); + m_log_data.buffer[(wr_idx + 1) & mask] = module_id | (dropped << 16); + + if (NRF_LOG_USES_TIMESTAMP) + { + m_log_data.buffer[(wr_idx + 2) & mask] = m_log_data.timestamp_func(); + } + + nrf_log_header_t * p_header = (nrf_log_header_t *)&m_log_data.buffer[wr_idx & mask]; + p_header->base.std.severity = severity_mid & NRF_LOG_LEVEL_MASK; + p_header->base.std.nargs = nargs; + p_header->base.std.addr = ((uint32_t)(p_str) & STD_ADDR_MASK); + p_header->base.std.type = HEADER_TYPE_STD; + p_header->base.std.in_progress = 0; +} + +/** + * @brief Allocates chunk in a buffer for one entry and injects overflow if + * there is no room for requested entry. + * + * @param content_len Number of 32bit arguments. In case of allocating for hex dump it + * is the size of the buffer in 32bit words (ceiled). + * @param p_wr_idx Pointer to write index. + * + * @return True if successful allocation, false otherwise. + * + */ +static inline bool buf_prealloc(uint32_t content_len, uint32_t * p_wr_idx, bool std) +{ + uint32_t req_len = content_len + HEADER_SIZE; + bool ret = true; + CRITICAL_REGION_ENTER(); + *p_wr_idx = m_log_data.wr_idx; + uint32_t available_words = (m_log_data.mask + 1) - (m_log_data.wr_idx - m_log_data.rd_idx); + while (req_len > available_words) + { + UNUSED_RETURN_VALUE(nrf_atomic_u32_add(&m_log_data.log_dropped_cnt, 1)); + if (NRF_LOG_ALLOW_OVERFLOW) + { + uint32_t dropped_in_skip = log_skip(); + UNUSED_RETURN_VALUE(nrf_atomic_u32_add(&m_log_data.log_dropped_cnt, dropped_in_skip)); + available_words = (m_log_data.mask + 1) - (m_log_data.wr_idx - m_log_data.rd_idx); + } + else + { + ret = false; + break; + } + } + + if (ret) + { + nrf_log_main_header_t invalid_header; + invalid_header.raw = 0; + + if (std) + { + invalid_header.std.type = HEADER_TYPE_STD; + invalid_header.std.in_progress = 1; + invalid_header.std.nargs = content_len; + } + else + { + invalid_header.hexdump.type = HEADER_TYPE_HEXDUMP; + invalid_header.hexdump.in_progress = 1; + invalid_header.hexdump.len = content_len; + } + + nrf_log_main_header_t * p_header = (nrf_log_main_header_t *)&m_log_data.buffer[m_log_data.wr_idx & m_log_data.mask]; + + p_header->raw = invalid_header.raw; + + m_log_data.wr_idx += req_len; + } + + CRITICAL_REGION_EXIT(); + return ret; +} + + +/** + * @brief Function for preallocating a continuous chunk of memory from circular buffer. + * + * If buffer does not fit starting from current position it will be allocated at + * the beginning of the circular buffer and offset will be returned indicating + * how much memory has been ommited at the end of the buffer. Function is + * using critical section. + * + * @param len32 Length of buffer to allocate. Given in words. + * @param p_offset Offset of the buffer. + * @param p_wr_idx Pointer to write index. + * + * @return A pointer to the allocated buffer. NULL if allocation failed. + */ +static inline uint32_t * cont_buf_prealloc(uint32_t len32, + uint32_t * p_offset, + uint32_t * p_wr_idx) +{ + //allocation algorithm relies on that assumption + STATIC_ASSERT(PUSHED_HEADER_SIZE == 1); + uint32_t * p_buf = NULL; + + len32 += PUSHED_HEADER_SIZE; // Increment because 32bit header is needed to be stored. + + CRITICAL_REGION_ENTER(); + *p_wr_idx = m_log_data.wr_idx; + uint32_t available_words = (m_log_data.mask + 1) - + (m_log_data.wr_idx - m_log_data.rd_idx); + uint32_t tail_words = (m_log_data.mask + 1) - (m_log_data.wr_idx & m_log_data.mask); + + //available space is continuous + uint32_t curr_pos_available = (available_words <= tail_words) ? available_words : tail_words; + uint32_t start_pos_available = (available_words <= tail_words) ? 0 : (available_words - tail_words); + + if ((len32 <= curr_pos_available) || + ((len32 - PUSHED_HEADER_SIZE) <= start_pos_available)) + { + // buffer will fit in the tail or in the begining + // non zero offset is set if string is put at the beginning of the buffer + *p_offset = (len32 <= curr_pos_available) ? 0 : (tail_words - PUSHED_HEADER_SIZE); + uint32_t str_start_idx = + (m_log_data.wr_idx + PUSHED_HEADER_SIZE + *p_offset) & m_log_data.mask; + p_buf = &m_log_data.buffer[str_start_idx]; + // index is incremented by payload and offset + m_log_data.wr_idx += (len32 + *p_offset); + } + + CRITICAL_REGION_EXIT(); + + return p_buf; +} + + +uint32_t nrf_log_push(char * const p_str) +{ + if ((m_log_data.autoflush) || (p_str == NULL)) + { + return (uint32_t)p_str; + } + + uint32_t mask = m_log_data.mask; + uint32_t slen = strlen(p_str) + 1; + uint32_t buflen = CEIL_DIV(slen, sizeof(uint32_t)); + uint32_t offset = 0; + uint32_t wr_idx; + char * p_dst_str = (char *)cont_buf_prealloc(buflen, &offset, &wr_idx); + if (p_dst_str) + { + nrf_log_header_t * p_header = (nrf_log_header_t *)&m_log_data.buffer[wr_idx & mask]; + PUSHED_HEADER_FILL(p_header, offset, buflen); + memcpy(p_dst_str, p_str, slen); + } + return (uint32_t)p_dst_str; +} + +static inline void std_n(uint32_t severity_mid, char const * const p_str, uint32_t const * args, uint32_t nargs) +{ + uint32_t mask = m_log_data.mask; + uint32_t wr_idx; + + if (buf_prealloc(nargs, &wr_idx, true)) + { + // Proceed only if buffer was successfully preallocated. + + uint32_t data_idx = wr_idx + HEADER_SIZE; + uint32_t i; + for (i = 0; i < nargs; i++) + { + m_log_data.buffer[data_idx++ & mask] =args[i]; + } + std_header_set(severity_mid, p_str, nargs, wr_idx, mask); + } + if (m_log_data.autoflush) + { + NRF_LOG_FLUSH(); + } + +} + +void nrf_log_frontend_std_0(uint32_t severity_mid, char const * const p_str) +{ + std_n(severity_mid, p_str, NULL, 0); +} + + +void nrf_log_frontend_std_1(uint32_t severity_mid, + char const * const p_str, + uint32_t val0) +{ + uint32_t args[] = {val0}; + std_n(severity_mid, p_str, args, ARRAY_SIZE(args)); +} + + +void nrf_log_frontend_std_2(uint32_t severity_mid, + char const * const p_str, + uint32_t val0, + uint32_t val1) +{ + uint32_t args[] = {val0, val1}; + std_n(severity_mid, p_str, args, ARRAY_SIZE(args)); +} + + +void nrf_log_frontend_std_3(uint32_t severity_mid, + char const * const p_str, + uint32_t val0, + uint32_t val1, + uint32_t val2) +{ + uint32_t args[] = {val0, val1, val2}; + std_n(severity_mid, p_str, args, ARRAY_SIZE(args)); +} + + +void nrf_log_frontend_std_4(uint32_t severity_mid, + char const * const p_str, + uint32_t val0, + uint32_t val1, + uint32_t val2, + uint32_t val3) +{ + uint32_t args[] = {val0, val1, val2, val3}; + std_n(severity_mid, p_str, args, ARRAY_SIZE(args)); +} + + +void nrf_log_frontend_std_5(uint32_t severity_mid, + char const * const p_str, + uint32_t val0, + uint32_t val1, + uint32_t val2, + uint32_t val3, + uint32_t val4) +{ + uint32_t args[] = {val0, val1, val2, val3, val4}; + std_n(severity_mid, p_str, args, ARRAY_SIZE(args)); +} + + +void nrf_log_frontend_std_6(uint32_t severity_mid, + char const * const p_str, + uint32_t val0, + uint32_t val1, + uint32_t val2, + uint32_t val3, + uint32_t val4, + uint32_t val5) +{ + uint32_t args[] = {val0, val1, val2, val3, val4, val5}; + std_n(severity_mid, p_str, args, ARRAY_SIZE(args)); +} + + +void nrf_log_frontend_hexdump(uint32_t severity_mid, + const void * const p_data, + uint16_t length) +{ + uint32_t mask = m_log_data.mask; + + uint32_t wr_idx; + if (buf_prealloc(CEIL_DIV(length, sizeof(uint32_t)), &wr_idx, false)) + { + uint32_t header_wr_idx = wr_idx; + wr_idx += HEADER_SIZE; + + uint32_t space0 = sizeof(uint32_t) * (m_log_data.mask + 1 - (wr_idx & mask)); + if (length <= space0) + { + memcpy(&m_log_data.buffer[wr_idx & mask], p_data, length); + } + else + { + memcpy(&m_log_data.buffer[wr_idx & mask], p_data, space0); + memcpy(&m_log_data.buffer[0], &((uint8_t *)p_data)[space0], length - space0); + } + + //Prepare header - in reverse order to ensure that packet type is validated (set to HEXDUMP as last action) + if (NRF_LOG_USES_TIMESTAMP) + { + m_log_data.buffer[(header_wr_idx + 2) & mask] = m_log_data.timestamp_func(); + } + + uint32_t module_id = severity_mid >> NRF_LOG_MODULE_ID_POS; + uint32_t dropped = dropped_sat16_get(); + m_log_data.buffer[(header_wr_idx + 1) & mask] = module_id | (dropped << 16); + //Header prepare + nrf_log_header_t * p_header = (nrf_log_header_t *)&m_log_data.buffer[header_wr_idx & mask]; + p_header->base.hexdump.severity = severity_mid & NRF_LOG_LEVEL_MASK; + p_header->base.hexdump.offset = 0; + p_header->base.hexdump.len = length; + p_header->base.hexdump.type = HEADER_TYPE_HEXDUMP; + p_header->base.hexdump.in_progress = 0; + + + + } + + if (m_log_data.autoflush) + { + NRF_LOG_FLUSH(); + } +} + + +bool buffer_is_empty(void) +{ + return (m_log_data.rd_idx == m_log_data.wr_idx); +} + +bool nrf_log_frontend_dequeue(void) +{ + + if (buffer_is_empty()) + { + return false; + } + m_log_data.log_skipped = 0; + //It has to be ensured that reading rd_idx occurs after skipped flag is cleared. + __DSB(); + uint32_t rd_idx = m_log_data.rd_idx; + uint32_t mask = m_log_data.mask; + nrf_log_header_t * p_header = (nrf_log_header_t *)&m_log_data.buffer[rd_idx & mask]; + nrf_log_header_t header; + nrf_memobj_t * p_msg_buf = NULL; + uint32_t memobj_offset = 0; + uint32_t severity = 0; + + // Skip any string that is pushed to the circular buffer. + do { + if (invalid_packets_pushed_str_omit(p_header, &rd_idx)) + { + //Check if end of data is not reached. + if (rd_idx >= m_log_data.wr_idx) + { + m_log_data.rd_idx = m_log_data.wr_idx; + return false; + } + //something was omitted. Point to new header and try again. + p_header = (nrf_log_header_t *)&m_log_data.buffer[rd_idx & mask]; + } + else + { + break; + } + } while (true); + + uint32_t i; + for (i = 0; i < HEADER_SIZE; i++) + { + ((uint32_t*)&header)[i] = m_log_data.buffer[rd_idx++ & mask]; + } + + if (header.base.generic.type == HEADER_TYPE_HEXDUMP) + { + uint32_t orig_data_len = header.base.hexdump.len; + uint32_t data_len = MIN(header.base.hexdump.len, NRF_LOG_MAX_HEXDUMP); //limit the data + header.base.hexdump.len = data_len; + uint32_t msg_buf_size8 = sizeof(uint32_t)*HEADER_SIZE + data_len; + severity = header.base.hexdump.severity; + p_msg_buf = nrf_memobj_alloc(&log_mempool, msg_buf_size8); + + if (p_msg_buf) + { + nrf_memobj_get(p_msg_buf); + nrf_memobj_write(p_msg_buf, &header, HEADER_SIZE*sizeof(uint32_t), memobj_offset); + memobj_offset += HEADER_SIZE*sizeof(uint32_t); + + uint32_t space0 = sizeof(uint32_t) * (mask + 1 - (rd_idx & mask)); + if (data_len > space0) + { + uint8_t * ptr0 = space0 ? + (uint8_t *)&m_log_data.buffer[rd_idx & mask] : + (uint8_t *)&m_log_data.buffer[0]; + uint8_t len0 = space0 ? space0 : data_len; + uint8_t * ptr1 = space0 ? + (uint8_t *)&m_log_data.buffer[0] : NULL; + uint8_t len1 = space0 ? data_len - space0 : 0; + + nrf_memobj_write(p_msg_buf, ptr0, len0, memobj_offset); + memobj_offset += len0; + if (ptr1) + { + nrf_memobj_write(p_msg_buf, ptr1, len1, memobj_offset); + } + } + else + { + uint8_t * p_data = (uint8_t *)&m_log_data.buffer[rd_idx & mask]; + nrf_memobj_write(p_msg_buf, p_data, data_len, memobj_offset); + } + rd_idx += CEIL_DIV(orig_data_len, 4); + } + } + else if (header.base.generic.type == HEADER_TYPE_STD) // standard entry + { + header.base.std.nargs = MIN(header.base.std.nargs, NRF_LOG_MAX_NUM_OF_ARGS); + uint32_t msg_buf_size32 = HEADER_SIZE + header.base.std.nargs; + severity = header.base.std.severity; + + p_msg_buf = nrf_memobj_alloc(&log_mempool, msg_buf_size32*sizeof(uint32_t)); + + if (p_msg_buf) + { + nrf_memobj_get(p_msg_buf); + nrf_memobj_write(p_msg_buf, &header, HEADER_SIZE*sizeof(uint32_t), memobj_offset); + memobj_offset += HEADER_SIZE*sizeof(uint32_t); + + for (i = 0; i < header.base.std.nargs; i++) + { + nrf_memobj_write(p_msg_buf, &m_log_data.buffer[rd_idx++ & mask], + sizeof(uint32_t), memobj_offset); + memobj_offset += sizeof(uint32_t); + } + } + } + else + { + //Do nothing. In case of log overflow buffer can contain corrupted data. + } + + if (p_msg_buf) + { + nrf_log_backend_t * p_backend = m_log_data.p_backend_head; + if (NRF_LOG_ALLOW_OVERFLOW && m_log_data.log_skipped) + { + // Check if any log was skipped during log processing. Do not forward log if skipping + // occured because data may be invalid. + nrf_memobj_put(p_msg_buf); + } + else + { + while (p_backend) + { + bool entry_accepted = false; + if (nrf_log_backend_is_enabled(p_backend) == true) + { + if (NRF_LOG_FILTERS_ENABLED) + { + uint8_t backend_id = nrf_log_backend_id_get(p_backend); + nrf_log_module_dynamic_data_t * p_module_filter = + (nrf_log_module_dynamic_data_t *)NRF_LOG_DYNAMIC_SECTION_VARS_GET(header.module_id); + uint32_t filter_lvls = p_module_filter->filter_lvls; + uint32_t backend_lvl = (filter_lvls >> (backend_id*NRF_LOG_LEVEL_BITS)) + & NRF_LOG_LEVEL_MASK; + //Degrade INFO_RAW level to INFO. + severity = (severity == NRF_LOG_SEVERITY_INFO_RAW) ? NRF_LOG_SEVERITY_INFO : severity; + if (backend_lvl >= severity) + { + entry_accepted = true; + } + } + else + { + (void)severity; + entry_accepted = true; + } + } + if (entry_accepted) + { + nrf_log_backend_put(p_backend, p_msg_buf); + } + p_backend = p_backend->p_next; + } + + nrf_memobj_put(p_msg_buf); + + if (NRF_LOG_ALLOW_OVERFLOW) + { + // Read index can be moved forward only if dequeueing process was not interrupt by + // skipping procedure. If NRF_LOG_ALLOW_OVERFLOW is set then in case of buffer gets full + // and new logger entry occurs, oldest entry is removed. In that case read index is + // changed and updating it here would corrupt the internal circular buffer. + CRITICAL_REGION_ENTER(); + if (m_log_data.log_skipped == 0) + { + m_log_data.rd_idx = rd_idx; + } + CRITICAL_REGION_EXIT(); + } + else + { + m_log_data.rd_idx = rd_idx; + } + } + } + else + { + //Could not allocate memobj - backends are not freeing them on time. + nrf_log_backend_t * p_backend = m_log_data.p_backend_head; + //Flush all backends + while (p_backend) + { + nrf_log_backend_flush(p_backend); + p_backend = p_backend->p_next; + } + NRF_LOG_WARNING("Backends flushed"); + } + + return buffer_is_empty() ? false : true; +} + +static int32_t backend_id_assign(void) +{ + int32_t candidate_id; + nrf_log_backend_t * p_backend; + bool id_available; + for (candidate_id = 0; candidate_id < NRF_LOG_MAX_BACKENDS; candidate_id++) + { + p_backend = m_log_data.p_backend_head; + id_available = true; + while (p_backend) + { + if (nrf_log_backend_id_get(p_backend) == candidate_id) + { + id_available = false; + break; + } + p_backend = p_backend->p_next; + } + if (id_available) + { + return candidate_id; + } + } + return -1; +} + +int32_t nrf_log_backend_add(nrf_log_backend_t * p_backend, nrf_log_severity_t severity) +{ + int32_t id = backend_id_assign(); + if (id == -1) + { + return id; + } + + nrf_log_backend_id_set(p_backend, id); + //add to list + if (m_log_data.p_backend_head == NULL) + { + m_log_data.p_backend_head = p_backend; + p_backend->p_next = NULL; + } + else + { + p_backend->p_next = m_log_data.p_backend_head->p_next; + m_log_data.p_backend_head->p_next = p_backend; + } + + if (NRF_LOG_FILTERS_ENABLED) + { + uint32_t i; + for (i = 0; i < nrf_log_module_cnt_get(); i++) + { + nrf_log_severity_t buildin_lvl = nrf_log_module_init_filter_get(i); + nrf_log_severity_t actual_severity = MIN(buildin_lvl, severity); + nrf_log_module_filter_set(nrf_log_backend_id_get(p_backend), i, actual_severity); + } + } + + return id; +} + +void nrf_log_backend_remove(nrf_log_backend_t * p_backend) +{ + nrf_log_backend_t * p_curr = m_log_data.p_backend_head; + nrf_log_backend_t * p_prev = NULL; + while (p_curr != p_backend) + { + p_prev = p_curr; + p_curr = p_curr->p_next; + } + + if (p_prev) + { + p_prev->p_next = p_backend->p_next; + } + else + { + m_log_data.p_backend_head = NULL; + } +} + +void nrf_log_panic(void) +{ + nrf_log_backend_t * p_backend = m_log_data.p_backend_head; + m_log_data.autoflush = true; + while (p_backend) + { + nrf_log_backend_enable(p_backend); + nrf_log_backend_panic_set(p_backend); + p_backend = p_backend->p_next; + } +} + +#if NRF_LOG_CLI_CMDS +#include "nrf_cli.h" + +static const char * m_severity_lvls[] = { + "none", + "error", + "warning", + "info", + "debug", +}; + +static const char * m_severity_lvls_sorted[] = { + "debug", + "error", + "info", + "none", + "warning", +}; + +static void log_status(nrf_cli_t const * p_cli, size_t argc, char **argv) +{ + uint32_t modules_cnt = nrf_log_module_cnt_get(); + uint32_t backend_id = p_cli->p_log_backend->backend.id; + uint32_t i; + + if (!nrf_log_backend_is_enabled(&p_cli->p_log_backend->backend)) + { + nrf_cli_fprintf(p_cli, NRF_CLI_ERROR, "Logs are halted!\r\n"); + } + nrf_cli_fprintf(p_cli, NRF_CLI_NORMAL, "%-40s | current | built-in \r\n", "module_name"); + nrf_cli_fprintf(p_cli, NRF_CLI_NORMAL, "----------------------------------------------------------\r\n"); + for (i = 0; i < modules_cnt; i++) + { + nrf_log_severity_t module_dynamic_lvl = nrf_log_module_filter_get(backend_id, i, true, true); + nrf_log_severity_t module_compiled_lvl = nrf_log_module_filter_get(backend_id, i, true, false); + nrf_log_severity_t actual_compiled_lvl = MIN(module_compiled_lvl, (nrf_log_severity_t)NRF_LOG_DEFAULT_LEVEL); + nrf_cli_fprintf(p_cli, NRF_CLI_NORMAL, "%-40s | %-7s | %s%s\r\n", + nrf_log_module_name_get(i, true), + m_severity_lvls[module_dynamic_lvl], + m_severity_lvls[actual_compiled_lvl], + actual_compiled_lvl < module_compiled_lvl ? "*" : ""); + } +} + +static bool module_id_get(const char * p_name, uint32_t * p_id) +{ + uint32_t modules_cnt = nrf_log_module_cnt_get(); + const char * p_tmp_name; + uint32_t j; + for (j = 0; j < modules_cnt; j++) + { + p_tmp_name = nrf_log_module_name_get(j, false); + if (strncmp(p_tmp_name, p_name, 32) == 0) + { + *p_id = j; + break; + } + } + return (j != modules_cnt); +} + +static bool module_id_filter_set(uint32_t backend_id, + uint32_t module_id, + nrf_log_severity_t lvl) +{ + nrf_log_severity_t buildin_lvl = nrf_log_module_filter_get(backend_id, module_id, false, false); + if (lvl > buildin_lvl) + { + return false; + } + else + { + nrf_log_module_filter_set(backend_id, module_id, lvl); + return true; + } +} + +static void log_ctrl(nrf_cli_t const * p_cli, size_t argc, char **argv) +{ + uint32_t backend_id = p_cli->p_log_backend->backend.id; + nrf_log_severity_t lvl; + uint32_t first_m_name_idx; + uint32_t i; + bool all_modules = false; + + if (argc > 0) + { + if (strncmp(argv[0], "enable", 7) == 0) + { + if (argc == 1) + { + nrf_cli_fprintf(p_cli, NRF_CLI_ERROR, "Bad parameter count.\r\n"); + return; + } + + if (argc == 2) + { + all_modules = true; + } + + for (i = 0; i < ARRAY_SIZE(m_severity_lvls); i++) + { + if (strncmp(argv[1], m_severity_lvls[i], 10) == 0) + { + break; + } + } + + if (i == ARRAY_SIZE(m_severity_lvls)) + { + nrf_cli_fprintf(p_cli, NRF_CLI_ERROR, "Unknown severity level: %s\r\n", argv[1]); + return; + } + + lvl = (nrf_log_severity_t)i; + first_m_name_idx = 2; + + } + else if (strncmp(argv[0], "disable", 8) == 0) + { + if (argc == 1) + { + all_modules = true; + } + lvl = NRF_LOG_SEVERITY_NONE; + first_m_name_idx = 1; + } + else + { + nrf_cli_fprintf(p_cli, NRF_CLI_ERROR, "Unknown option: %s\r\n", argv[0]); + return; + } + + if (all_modules) + { + for (i = 0; i < nrf_log_module_cnt_get(); i++) + { + if (module_id_filter_set(backend_id, i, lvl) == false) + { + nrf_cli_fprintf(p_cli, NRF_CLI_ERROR, "Level unavailable for module: %s\r\n", nrf_log_module_name_get(i, false)); + } + } + } + else + { + for (i = first_m_name_idx; i < argc; i++) + { + uint32_t module_id = 0; + if (module_id_get(argv[i], &module_id) == false) + { + nrf_cli_fprintf(p_cli, NRF_CLI_ERROR, "Unknown module:%s\r\n", argv[i]); + } + + if (module_id_filter_set(backend_id, module_id, lvl) == false) + { + nrf_cli_fprintf(p_cli, NRF_CLI_ERROR, "Level unavailable for module: %s\r\n", nrf_log_module_name_get(module_id, false)); + } + } + } + } +} +static void module_name_get(size_t idx, nrf_cli_static_entry_t * p_static); + +NRF_CLI_CREATE_DYNAMIC_CMD(m_module_name, module_name_get); + +static void module_name_get(size_t idx, nrf_cli_static_entry_t * p_static) +{ + p_static->handler = NULL; + p_static->p_help = NULL; + p_static->p_subcmd = &m_module_name; + p_static->p_syntax = nrf_log_module_name_get(idx, true); +} + +static void severity_lvl_get(size_t idx, nrf_cli_static_entry_t * p_static) +{ + p_static->handler = NULL; + p_static->p_help = NULL; + p_static->p_subcmd = &m_module_name; + p_static->p_syntax = (idx < ARRAY_SIZE(m_severity_lvls_sorted)) ? + m_severity_lvls_sorted[idx] : NULL; +} + +NRF_CLI_CREATE_DYNAMIC_CMD(m_severity_lvl, severity_lvl_get); + +static void log_halt(nrf_cli_t const * p_cli, size_t argc, char **argv) +{ + nrf_log_backend_disable(&p_cli->p_log_backend->backend); +} + +static void log_go(nrf_cli_t const * p_cli, size_t argc, char **argv) +{ + nrf_log_backend_enable(&p_cli->p_log_backend->backend); +} + +NRF_CLI_CREATE_STATIC_SUBCMD_SET(m_sub_log_stat) +{ + NRF_CLI_CMD(disable, &m_module_name, + "'log disable .. ' disables logs in specified " + "modules (all if no modules specified).", + log_ctrl), + NRF_CLI_CMD(enable, &m_severity_lvl, + "'log enable ... ' enables logs up to given level in " + "specified modules (all if no modules specified).", + log_ctrl), + NRF_CLI_CMD(go, NULL, "Resume logging", log_go), + NRF_CLI_CMD(halt, NULL, "Halt logging", log_halt), + NRF_CLI_CMD(status, NULL, "Logger status", log_status), + NRF_CLI_SUBCMD_SET_END +}; + +static void log_cmd(nrf_cli_t const * p_cli, size_t argc, char **argv) +{ + if ((argc == 1) || nrf_cli_help_requested(p_cli)) + { + nrf_cli_help_print(p_cli, NULL, 0); + return; + } + + nrf_cli_fprintf(p_cli, NRF_CLI_ERROR, "%s:%s%s\r\n", argv[0], " unknown parameter: ", argv[1]); +} + +NRF_CLI_CMD_REGISTER(log, &m_sub_log_stat, "Commands for controlling logger", log_cmd); + +#endif //NRF_LOG_CLI_CMDS + +#endif // NRF_MODULE_ENABLED(NRF_LOG) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_internal.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_internal.h new file mode 100644 index 00000000000..7c5246f9f83 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_internal.h @@ -0,0 +1,529 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_LOG_INTERNAL_H__ +#define NRF_LOG_INTERNAL_H__ +#include "sdk_common.h" +#include "nrf.h" +#include "nrf_error.h" +#include "app_util.h" +#include +#include +#include "nrf_log_instance.h" +#include "nrf_log_types.h" + +#ifndef NRF_LOG_ERROR_COLOR + #define NRF_LOG_ERROR_COLOR NRF_LOG_COLOR_DEFAULT +#endif + +#ifndef NRF_LOG_WARNING_COLOR + #define NRF_LOG_WARNING_COLOR NRF_LOG_COLOR_DEFAULT +#endif + +#ifndef NRF_LOG_INFO_COLOR + #define NRF_LOG_INFO_COLOR NRF_LOG_COLOR_DEFAULT +#endif + +#ifndef NRF_LOG_DEBUG_COLOR + #define NRF_LOG_DEBUG_COLOR NRF_LOG_COLOR_DEFAULT +#endif + + +#ifndef NRF_LOG_COLOR_DEFAULT +#define NRF_LOG_COLOR_DEFAULT 0 +#endif + +#ifndef NRF_LOG_DEFAULT_LEVEL +#define NRF_LOG_DEFAULT_LEVEL 0 +#endif + +#ifndef NRF_LOG_USES_COLORS +#define NRF_LOG_USES_COLORS 0 +#endif + +#ifndef NRF_LOG_USES_TIMESTAMP +#define NRF_LOG_USES_TIMESTAMP 0 +#endif + +#ifndef NRF_LOG_FILTERS_ENABLED +#define NRF_LOG_FILTERS_ENABLED 0 +#endif + +#ifndef NRF_LOG_MODULE_NAME + #define NRF_LOG_MODULE_NAME app +#endif + +#define NRF_LOG_LEVEL_BITS 3 +#define NRF_LOG_LEVEL_MASK ((1UL << NRF_LOG_LEVEL_BITS) - 1) +#define NRF_LOG_MODULE_ID_BITS 16 +#define NRF_LOG_MODULE_ID_POS 16 + + +#define NRF_LOG_MAX_NUM_OF_ARGS 6 + + +#if NRF_LOG_FILTERS_ENABLED && NRF_LOG_ENABLED + #define NRF_LOG_FILTER NRF_LOG_ITEM_DATA_DYNAMIC(NRF_LOG_MODULE_NAME).filter + #define NRF_LOG_INST_FILTER(p_inst) (p_inst)->filter +#else + #undef NRF_LOG_FILTER + #define NRF_LOG_FILTER NRF_LOG_SEVERITY_DEBUG + #define NRF_LOG_INST_FILTER(p_inst) NRF_LOG_SEVERITY_DEBUG +#endif + +#if NRF_LOG_ENABLED +#define NRF_LOG_MODULE_ID NRF_LOG_ITEM_DATA_DYNAMIC(NRF_LOG_MODULE_NAME).module_id +#define NRF_LOG_INST_ID(p_inst) (p_inst)->module_id +#else +#define NRF_LOG_MODULE_ID 0 +#define NRF_LOG_INST_ID(p_inst) 0 +#endif + + +#define LOG_INTERNAL_X(N, ...) CONCAT_2(LOG_INTERNAL_, N) (__VA_ARGS__) +#define LOG_INTERNAL(type, ...) LOG_INTERNAL_X(NUM_VA_ARGS_LESS_1( \ + __VA_ARGS__), type, __VA_ARGS__) +#if NRF_LOG_ENABLED +#define NRF_LOG_INTERNAL_LOG_PUSH(_str) nrf_log_push(_str) +#define LOG_INTERNAL_0(type, str) \ + nrf_log_frontend_std_0(type, str) +#define LOG_INTERNAL_1(type, str, arg0) \ + /*lint -save -e571*/nrf_log_frontend_std_1(type, str, (uint32_t)(arg0))/*lint -restore*/ +#define LOG_INTERNAL_2(type, str, arg0, arg1) \ + /*lint -save -e571*/nrf_log_frontend_std_2(type, str, (uint32_t)(arg0), \ + (uint32_t)(arg1))/*lint -restore*/ +#define LOG_INTERNAL_3(type, str, arg0, arg1, arg2) \ + /*lint -save -e571*/nrf_log_frontend_std_3(type, str, (uint32_t)(arg0), \ + (uint32_t)(arg1), (uint32_t)(arg2))/*lint -restore*/ +#define LOG_INTERNAL_4(type, str, arg0, arg1, arg2, arg3) \ + /*lint -save -e571*/nrf_log_frontend_std_4(type, str, (uint32_t)(arg0), \ + (uint32_t)(arg1), (uint32_t)(arg2), (uint32_t)(arg3))/*lint -restore*/ +#define LOG_INTERNAL_5(type, str, arg0, arg1, arg2, arg3, arg4) \ + /*lint -save -e571*/nrf_log_frontend_std_5(type, str, (uint32_t)(arg0), \ + (uint32_t)(arg1), (uint32_t)(arg2), (uint32_t)(arg3), (uint32_t)(arg4))/*lint -restore*/ +#define LOG_INTERNAL_6(type, str, arg0, arg1, arg2, arg3, arg4, arg5) \ + /*lint -save -e571*/nrf_log_frontend_std_6(type, str, (uint32_t)(arg0), \ + (uint32_t)(arg1), (uint32_t)(arg2), (uint32_t)(arg3), (uint32_t)(arg4), (uint32_t)(arg5))/*lint -restore*/ + + +#else //NRF_LOG_ENABLED +#define NRF_LOG_INTERNAL_LOG_PUSH(_str) (void)(_str) +#define LOG_INTERNAL_0(_type, _str) \ + (void)(_type); (void)(_str) +#define LOG_INTERNAL_1(_type, _str, _arg0) \ + (void)(_type); (void)(_str); (void)(_arg0) +#define LOG_INTERNAL_2(_type, _str, _arg0, _arg1) \ + (void)(_type); (void)(_str); (void)(_arg0); (void)(_arg1) +#define LOG_INTERNAL_3(_type, _str, _arg0, _arg1, _arg2) \ + (void)(_type); (void)(_str); (void)(_arg0); (void)(_arg1); (void)(_arg2) +#define LOG_INTERNAL_4(_type, _str, _arg0, _arg1, _arg2, _arg3) \ + (void)(_type); (void)(_str); (void)(_arg0); (void)(_arg1); (void)(_arg2); (void)(_arg3) +#define LOG_INTERNAL_5(_type, _str, _arg0, _arg1, _arg2, _arg3, _arg4) \ + (void)(_type); (void)(_str); (void)(_arg0); (void)(_arg1); (void)(_arg2); (void)(_arg3); (void)(_arg4) +#define LOG_INTERNAL_6(_type, _str, _arg0, _arg1, _arg2, _arg3, _arg4, _arg5) \ + (void)(_type); (void)(_str); (void)(_arg0); (void)(_arg1); (void)(_arg2); (void)(_arg3); (void)(_arg4); (void)(_arg5) +#endif //NRF_LOG_ENABLED + +#define LOG_SEVERITY_MOD_ID(severity) ((severity) | NRF_LOG_MODULE_ID << NRF_LOG_MODULE_ID_POS) +#define LOG_SEVERITY_INST_ID(severity,p_inst) ((severity) | NRF_LOG_INST_ID(p_inst) << NRF_LOG_MODULE_ID_POS) + +#if NRF_LOG_ENABLED +#define LOG_HEXDUMP(_severity, _p_data, _length) \ + nrf_log_frontend_hexdump((_severity), (_p_data), (_length)) +#else +#define LOG_HEXDUMP(_severity, _p_data, _length) \ + (void)(_severity); (void)(_p_data); (void)_length +#endif + +#define NRF_LOG_INTERNAL_INST(level, level_id, p_inst, ...) \ + if (NRF_LOG_ENABLED && (NRF_LOG_LEVEL >= level) && \ + (level <= NRF_LOG_DEFAULT_LEVEL)) \ + { \ + if (NRF_LOG_INST_FILTER(p_inst) >= level) \ + { \ + LOG_INTERNAL(LOG_SEVERITY_INST_ID(level_id, p_inst), __VA_ARGS__); \ + } \ + } + +#define NRF_LOG_INTERNAL_MODULE(level, level_id, ...) \ + if (NRF_LOG_ENABLED && (NRF_LOG_LEVEL >= level) && \ + (level <= NRF_LOG_DEFAULT_LEVEL)) \ + { \ + if (NRF_LOG_FILTER >= level) \ + { \ + LOG_INTERNAL(LOG_SEVERITY_MOD_ID(level_id), __VA_ARGS__); \ + } \ + } + +#define NRF_LOG_INTERNAL_HEXDUMP_INST(level, level_id, p_inst, p_data, len) \ + if (NRF_LOG_ENABLED && (NRF_LOG_LEVEL >= level) && \ + (level <= NRF_LOG_DEFAULT_LEVEL)) \ + { \ + if (NRF_LOG_INST_FILTER(p_inst) >= level) \ + { \ + LOG_HEXDUMP(LOG_SEVERITY_INST_ID(level_id, p_inst), \ + (p_data), (len)); \ + } \ + } + +#define NRF_LOG_INTERNAL_HEXDUMP_MODULE(level, level_id, p_data, len) \ + if (NRF_LOG_ENABLED && (NRF_LOG_LEVEL >= level) && \ + (level <= NRF_LOG_DEFAULT_LEVEL)) \ + { \ + if (NRF_LOG_FILTER >= level) \ + { \ + LOG_HEXDUMP(LOG_SEVERITY_MOD_ID(level_id), \ + (p_data), (len)); \ + } \ + } + +#define NRF_LOG_INTERNAL_INST_ERROR(p_inst, ...) \ + NRF_LOG_INTERNAL_INST(NRF_LOG_SEVERITY_ERROR, NRF_LOG_SEVERITY_ERROR, p_inst, __VA_ARGS__) + +#define NRF_LOG_INTERNAL_ERROR(...) \ + NRF_LOG_INTERNAL_MODULE(NRF_LOG_SEVERITY_ERROR, NRF_LOG_SEVERITY_ERROR,__VA_ARGS__) + +#define NRF_LOG_INTERNAL_HEXDUMP_INST_ERROR(p_inst, p_data, len) \ + NRF_LOG_INTERNAL_HEXDUMP_INST(NRF_LOG_SEVERITY_ERROR, NRF_LOG_SEVERITY_ERROR, p_inst, p_data, len) + +#define NRF_LOG_INTERNAL_HEXDUMP_ERROR(p_data, len) \ + NRF_LOG_INTERNAL_HEXDUMP_MODULE(NRF_LOG_SEVERITY_ERROR, NRF_LOG_SEVERITY_ERROR, p_data, len) + +#define NRF_LOG_INTERNAL_INST_WARNING(p_inst, ...) \ + NRF_LOG_INTERNAL_INST(NRF_LOG_SEVERITY_WARNING, NRF_LOG_SEVERITY_WARNING, p_inst, __VA_ARGS__) + +#define NRF_LOG_INTERNAL_WARNING(...) \ + NRF_LOG_INTERNAL_MODULE(NRF_LOG_SEVERITY_WARNING, NRF_LOG_SEVERITY_WARNING,__VA_ARGS__) + +#define NRF_LOG_INTERNAL_HEXDUMP_INST_WARNING(p_inst, p_data, len) \ + NRF_LOG_INTERNAL_HEXDUMP_INST(NRF_LOG_SEVERITY_WARNING, NRF_LOG_SEVERITY_WARNING, p_inst, p_data, len) + +#define NRF_LOG_INTERNAL_HEXDUMP_WARNING(p_data, len) \ + NRF_LOG_INTERNAL_HEXDUMP_(NRF_LOG_SEVERITY_WARNING, NRF_LOG_SEVERITY_WARNING, p_data, len) + +#define NRF_LOG_INTERNAL_INST_INFO(p_inst, ...) \ + NRF_LOG_INTERNAL_INST(NRF_LOG_SEVERITY_INFO, NRF_LOG_SEVERITY_INFO, p_inst, __VA_ARGS__) + +#define NRF_LOG_INTERNAL_INFO(...) \ + NRF_LOG_INTERNAL_MODULE(NRF_LOG_SEVERITY_INFO, NRF_LOG_SEVERITY_INFO, __VA_ARGS__) + +#define NRF_LOG_INTERNAL_HEXDUMP_INST_INFO(p_inst, p_data, len) \ + NRF_LOG_INTERNAL_HEXDUMP_INST(NRF_LOG_SEVERITY_INFO, NRF_LOG_SEVERITY_INFO, p_inst, p_data, len) + +#define NRF_LOG_INTERNAL_HEXDUMP_INFO(p_data, len) \ + NRF_LOG_INTERNAL_HEXDUMP_MODULE(NRF_LOG_SEVERITY_INFO, NRF_LOG_SEVERITY_INFO, p_data, len) + +#define NRF_LOG_INTERNAL_RAW_INFO(...) \ + NRF_LOG_INTERNAL_MODULE(NRF_LOG_SEVERITY_INFO, NRF_LOG_SEVERITY_INFO_RAW, __VA_ARGS__) + +#define NRF_LOG_INTERNAL_RAW_HEXDUMP_INFO(p_data, len) \ + NRF_LOG_INTERNAL_HEXDUMP_MODULE(NRF_LOG_SEVERITY_INFO, NRF_LOG_SEVERITY_INFO_RAW, p_data, len) + +#define NRF_LOG_INTERNAL_INST_DEBUG(p_inst, ...) \ + NRF_LOG_INTERNAL_INST(NRF_LOG_SEVERITY_DEBUG, NRF_LOG_SEVERITY_DEBUG, p_inst, __VA_ARGS__) + +#define NRF_LOG_INTERNAL_DEBUG(...) \ + NRF_LOG_INTERNAL_MODULE(NRF_LOG_SEVERITY_DEBUG, NRF_LOG_SEVERITY_DEBUG, __VA_ARGS__) + +#define NRF_LOG_INTERNAL_HEXDUMP_INST_DEBUG(p_inst, p_data, len) \ + NRF_LOG_INTERNAL_HEXDUMP_INST(NRF_LOG_SEVERITY_DEBUG, NRF_LOG_SEVERITY_DEBUG, p_inst, p_data, len) + +#define NRF_LOG_INTERNAL_HEXDUMP_DEBUG(p_data, len) \ + NRF_LOG_INTERNAL_HEXDUMP_MODULE(NRF_LOG_SEVERITY_DEBUG, NRF_LOG_SEVERITY_DEBUG, p_data, len) + + +#if NRF_LOG_ENABLED + +#ifdef UNIT_TEST +#define COMPILED_LOG_LEVEL 4 +#else +#define COMPILED_LOG_LEVEL NRF_LOG_LEVEL +#endif + + +#define NRF_LOG_INTERNAL_MODULE_REGISTER() \ + NRF_LOG_INTERNAL_ITEM_REGISTER(NRF_LOG_MODULE_NAME, \ + STRINGIFY(NRF_LOG_MODULE_NAME), \ + NRF_LOG_INFO_COLOR, \ + NRF_LOG_DEBUG_COLOR, \ + NRF_LOG_INITIAL_LEVEL, \ + COMPILED_LOG_LEVEL) + +#else +#define NRF_LOG_INTERNAL_MODULE_REGISTER() /*lint -save -e19*/ /*lint -restore*/ +#endif + +extern NRF_LOG_DYNAMIC_STRUCT_NAME NRF_LOG_ITEM_DATA_DYNAMIC(NRF_LOG_MODULE_NAME); + +/** + * Set of macros for encoding and decoding header for log entries. + * There are 3 types of entries: + * 1. Standard entry (STD) + * An entry consists of header, pointer to string and values. Header contains + * severity leveland determines number of arguments and thus size of the entry. + * Since flash address space starts from 0x00000000 and is limited to kB rather + * than MB 22 bits are used to store the address (4MB). It is used that way to + * save one RAM memory. + * + * -------------------------------- + * |TYPE|SEVERITY|NARGS| P_STR | + * |------------------------------| + * | Module_ID (optional) | + * |------------------------------| + * | TIMESTAMP (optional) | + * |------------------------------| + * | ARG0 | + * |------------------------------| + * | .... | + * |------------------------------| + * | ARG(nargs-1) | + * -------------------------------- + * + * 2. Hexdump entry (HEXDUMP) is used for dumping raw data. An entry consists of + * header, optional timestamp, pointer to string and data. A header contains + * length (10bit) and offset which is updated after backend processes part of + * data. + * + * -------------------------------- + * |TYPE|SEVERITY|NARGS|OFFSET|LEN| + * |------------------------------| + * | Module_ID (optional) | + * |------------------------------| + * | TIMESTAMP (optional) | + * |------------------------------| + * | P_STR | + * |------------------------------| + * | data | + * |------------------------------| + * | data | dummy | + * -------------------------------- + * + * 3. Pushed string. If string is pushed into the logger internal buffer it is + * stored as PUSHED entry. It consists of header, unused data (optional) and + * string. Unused data is present if string does not not fit into a buffer + * without wrapping (and string cannot be wrapped). In that case header + * contains information about offset. + * + * -------------------------------- + * |TYPE| OFFSET | LEN | + * |------------------------------| + * | OFFSET | + * |------------------------------| + * end| OFFSET | + * 0|------------------------------| + * | STRING | + * |------------------------------| + * | STRING | dummy | + * -------------------------------- + */ + +#define STD_ADDR_MASK ((uint32_t)(1U << 22) - 1U) +#define HEADER_TYPE_STD 1U +#define HEADER_TYPE_HEXDUMP 2U +#define HEADER_TYPE_PUSHED 0U +#define HEADER_TYPE_INVALID 3U + +typedef struct +{ + uint32_t type : 2; + uint32_t in_progress: 1; + uint32_t data : 29; +} nrf_log_generic_header_t; + +typedef struct +{ + uint32_t type : 2; + uint32_t in_progress: 1; + uint32_t severity : 3; + uint32_t nargs : 4; + uint32_t addr : 22; +} nrf_log_std_header_t; + +typedef struct +{ + uint32_t type : 2; + uint32_t in_progress: 1; + uint32_t severity : 3; + uint32_t offset : 10; + uint32_t reserved : 6; + uint32_t len : 10; +} nrf_log_hexdump_header_t; + +typedef struct +{ + uint32_t type : 2; + uint32_t reserved0 : 4; + uint32_t offset : 10; + uint32_t reserved1 : 6; + uint32_t len : 10; +} nrf_log_pushed_header_t; + +typedef union +{ + nrf_log_generic_header_t generic; + nrf_log_std_header_t std; + nrf_log_hexdump_header_t hexdump; + nrf_log_pushed_header_t pushed; + uint32_t raw; +} nrf_log_main_header_t; + +typedef struct +{ + nrf_log_main_header_t base; + uint16_t module_id; + uint16_t dropped; + uint32_t timestamp; +} nrf_log_header_t; + +#define HEADER_SIZE (sizeof(nrf_log_header_t)/sizeof(uint32_t) - \ + (NRF_LOG_USES_TIMESTAMP ? 0 : 1)) + +#define PUSHED_HEADER_SIZE (sizeof(nrf_log_pushed_header_t)/sizeof(uint32_t)) + +//Implementation assumes that pushed header has one word. +STATIC_ASSERT(PUSHED_HEADER_SIZE == 1); +/** + * @brief A function for logging raw string. + * + * @param severity_mid Severity. + * @param p_str A pointer to a string. + */ +void nrf_log_frontend_std_0(uint32_t severity_mid, char const * const p_str); + +/** + * @brief A function for logging a formatted string with one argument. + * + * @param severity_mid Severity. + * @param p_str A pointer to a formatted string. + * @param val0 An argument. + */ +void nrf_log_frontend_std_1(uint32_t severity_mid, + char const * const p_str, + uint32_t val0); + +/** + * @brief A function for logging a formatted string with 2 arguments. + * + * @param severity_mid Severity. + * @param p_str A pointer to a formatted string. + * @param val0, val1 Arguments for formatting string. + */ +void nrf_log_frontend_std_2(uint32_t severity_mid, + char const * const p_str, + uint32_t val0, + uint32_t val1); + +/** + * @brief A function for logging a formatted string with 3 arguments. + * + * @param severity_mid Severity. + * @param p_str A pointer to a formatted string. + * @param val0, val1, val2 Arguments for formatting string. + */ +void nrf_log_frontend_std_3(uint32_t severity_mid, + char const * const p_str, + uint32_t val0, + uint32_t val1, + uint32_t val2); + +/** + * @brief A function for logging a formatted string with 4 arguments. + * + * @param severity_mid Severity. + * @param p_str A pointer to a formatted string. + * @param val0, val1, val2, val3 Arguments for formatting string. + */ +void nrf_log_frontend_std_4(uint32_t severity_mid, + char const * const p_str, + uint32_t val0, + uint32_t val1, + uint32_t val2, + uint32_t val3); + +/** + * @brief A function for logging a formatted string with 5 arguments. + * + * @param severity_mid Severity. + * @param p_str A pointer to a formatted string. + * @param val0, val1, val2, val3, val4 Arguments for formatting string. + */ +void nrf_log_frontend_std_5(uint32_t severity_mid, + char const * const p_str, + uint32_t val0, + uint32_t val1, + uint32_t val2, + uint32_t val3, + uint32_t val4); + +/** + * @brief A function for logging a formatted string with 6 arguments. + * + * @param severity_mid Severity. + * @param p_str A pointer to a formatted string. + * @param val0, val1, val2, val3, val4, val5 Arguments for formatting string. + */ +void nrf_log_frontend_std_6(uint32_t severity_mid, + char const * const p_str, + uint32_t val0, + uint32_t val1, + uint32_t val2, + uint32_t val3, + uint32_t val4, + uint32_t val5); + +/** + * @brief A function for logging raw data. + * + * @param severity_mid Severity. + * @param p_str A pointer to a string which is prefixing the data. + * @param p_data A pointer to data to be dumped. + * @param length Length of data (in bytes). + * + */ +void nrf_log_frontend_hexdump(uint32_t severity_mid, + const void * const p_data, + uint16_t length); + +/** + * @brief A function for reading a byte from log backend. + * + * @return Byte. + */ +uint8_t nrf_log_getchar(void); +#endif // NRF_LOG_INTERNAL_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_str_formatter.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_str_formatter.c new file mode 100644 index 00000000000..fa548f34d79 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_log/src/nrf_log_str_formatter.c @@ -0,0 +1,256 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "sdk_common.h" +#if NRF_MODULE_ENABLED(NRF_LOG) +#include "nrf_log_str_formatter.h" +#include "nrf_log_internal.h" +#include "nrf_log_ctrl.h" +#include "nrf_fprintf.h" +#include + +#define NRF_LOG_COLOR_CODE_DEFAULT "\x1B[0m" +#define NRF_LOG_COLOR_CODE_BLACK "\x1B[1;30m" +#define NRF_LOG_COLOR_CODE_RED "\x1B[1;31m" +#define NRF_LOG_COLOR_CODE_GREEN "\x1B[1;32m" +#define NRF_LOG_COLOR_CODE_YELLOW "\x1B[1;33m" +#define NRF_LOG_COLOR_CODE_BLUE "\x1B[1;34m" +#define NRF_LOG_COLOR_CODE_MAGENTA "\x1B[1;35m" +#define NRF_LOG_COLOR_CODE_CYAN "\x1B[1;36m" +#define NRF_LOG_COLOR_CODE_WHITE "\x1B[1;37m" + +static const char * severity_names[] = { + NULL, + "error", + "warning", + "info", + "debug" +}; + +static const char * m_colors[] = { + NRF_LOG_COLOR_CODE_DEFAULT, + NRF_LOG_COLOR_CODE_BLACK, + NRF_LOG_COLOR_CODE_RED, + NRF_LOG_COLOR_CODE_GREEN, + NRF_LOG_COLOR_CODE_YELLOW, + NRF_LOG_COLOR_CODE_BLUE, + NRF_LOG_COLOR_CODE_MAGENTA, + NRF_LOG_COLOR_CODE_CYAN, + NRF_LOG_COLOR_CODE_WHITE, +}; + +static uint32_t m_freq; +static uint32_t m_timestamp_div; + +static void timestamp_print(nrf_fprintf_ctx_t * p_ctx, uint32_t timestamp) +{ + if (NRF_LOG_USES_TIMESTAMP) + { + if (NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED) + { + timestamp /= m_timestamp_div; + uint32_t seconds = timestamp/m_freq; + uint32_t hours = seconds/3600; + seconds -= hours * 3600; + uint32_t mins = seconds/60; + seconds -= mins * 60; + + uint32_t reminder = timestamp % m_freq; + uint32_t ms = (reminder * 1000)/m_freq; + uint32_t us = (1000*(1000*reminder - (ms * m_freq)))/m_freq; + + nrf_fprintf(p_ctx, "[%02d:%02d:%02d.%03d,%03d] ", hours, mins, seconds, ms, us); + } + else + { + nrf_fprintf(p_ctx, "[%08lu] ", timestamp); + } + } +} +static void prefix_process(nrf_log_str_formatter_entry_params_t * p_params, + nrf_fprintf_ctx_t * p_ctx) +{ + if (p_params->dropped) + { + nrf_fprintf(p_ctx, + "%sLogs dropped (%d)%s\r\n", + NRF_LOG_COLOR_CODE_RED, + p_params->dropped, + NRF_LOG_COLOR_CODE_DEFAULT); + } + + if (!(p_params->severity == NRF_LOG_SEVERITY_INFO_RAW)) + { + if (p_params->use_colors) + { + nrf_fprintf(p_ctx, "%s", + m_colors[nrf_log_color_id_get( p_params->module_id, p_params->severity)]); + } + timestamp_print(p_ctx, p_params->timestamp); + + nrf_fprintf(p_ctx, "<%s> %s: ", + severity_names[p_params->severity], nrf_log_module_name_get(p_params->module_id, false)); + } +} + +static void postfix_process(nrf_log_str_formatter_entry_params_t * p_params, + nrf_fprintf_ctx_t * p_ctx, + bool newline) +{ + if (!(p_params->severity == NRF_LOG_SEVERITY_INFO_RAW)) + { + if (p_params->use_colors) + { + nrf_fprintf(p_ctx, "%s", m_colors[0]); + } + nrf_fprintf(p_ctx, "\r\n"); + } + else if (newline) + { + nrf_fprintf(p_ctx, "\r\n"); + } + nrf_fprintf_buffer_flush(p_ctx); +} + +void nrf_log_std_entry_process(char const * p_str, + uint32_t const * p_args, + uint32_t nargs, + nrf_log_str_formatter_entry_params_t * p_params, + nrf_fprintf_ctx_t * p_ctx) +{ + bool auto_flush = p_ctx->auto_flush; + p_ctx->auto_flush = false; + + prefix_process(p_params, p_ctx); + + switch (nargs) + { + case 0: + nrf_fprintf(p_ctx, p_str); + break; + case 1: + nrf_fprintf(p_ctx, p_str, p_args[0]); + break; + case 2: + nrf_fprintf(p_ctx, p_str, p_args[0], p_args[1]); + break; + case 3: + nrf_fprintf(p_ctx, p_str, p_args[0], p_args[1], p_args[2]); + break; + case 4: + nrf_fprintf(p_ctx, p_str, p_args[0], p_args[1], p_args[2], p_args[3]); + break; + case 5: + nrf_fprintf(p_ctx, p_str, p_args[0], p_args[1], p_args[2], p_args[3], p_args[4]); + break; + case 6: + nrf_fprintf(p_ctx, p_str, p_args[0], p_args[1], p_args[2], p_args[3], p_args[4], p_args[5]); + break; + + default: + break; + } + + postfix_process(p_params, p_ctx, false); + p_ctx->auto_flush = auto_flush; +} + +#define HEXDUMP_BYTES_IN_LINE 8 + +void nrf_log_hexdump_entry_process(uint8_t * p_data, + uint32_t data_len, + nrf_log_str_formatter_entry_params_t * p_params, + nrf_fprintf_ctx_t * p_ctx) +{ + if (data_len > HEXDUMP_BYTES_IN_LINE) + { + return; + } + bool auto_flush = p_ctx->auto_flush; + p_ctx->auto_flush = false; + + prefix_process(p_params, p_ctx); + + uint32_t i; + + for (i = 0; i < HEXDUMP_BYTES_IN_LINE; i++) + { + if (i < data_len) + { + nrf_fprintf(p_ctx, " %02x", p_data[i]); + } + else + { + nrf_fprintf(p_ctx, " "); + } + } + nrf_fprintf(p_ctx, "|"); + + for (i = 0; i < HEXDUMP_BYTES_IN_LINE; i++) + { + if (i < data_len) + { + char c = (char)p_data[i]; + nrf_fprintf(p_ctx, "%c", isprint((int)c) ? c :'.'); + } + else + { + nrf_fprintf(p_ctx, " "); + } + } + + postfix_process(p_params, p_ctx, true); + + p_ctx->auto_flush = auto_flush; +} + +void nrf_log_str_formatter_timestamp_freq_set(uint32_t freq) +{ + m_timestamp_div = 1; + /* There is no point to have frequency higher than 1MHz (ns are not printed) and too high + * frequency leads to overflows in calculations. + */ + while (freq > 1000000) + { + freq /= 2; + m_timestamp_div *= 2; + } + m_freq = freq; +} +#endif //NRF_LOG_ENABLED diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_memobj/nrf_memobj.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_memobj/nrf_memobj.c new file mode 100644 index 00000000000..44b44fc2322 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_memobj/nrf_memobj.c @@ -0,0 +1,231 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "nrf_memobj.h" +#include "nrf_atomic.h" +#include "nrf_assert.h" + +typedef struct memobj_elem_s memobj_elem_t; + +typedef struct +{ + memobj_elem_t * p_next; +} memobj_header_t; + +typedef struct +{ + uint8_t user_cnt; + uint8_t chunk_cnt; + uint16_t chunk_size; +} memobj_head_header_fields_t; + +typedef struct +{ + union + { + nrf_atomic_u32_t atomic_user_cnt; + memobj_head_header_fields_t fields; + } data; +} memobj_head_header_t; + +typedef struct +{ + memobj_header_t header; + memobj_head_header_t head_header; + uint8_t data[1]; +} memobj_head_t; + +STATIC_ASSERT(sizeof(memobj_header_t) == NRF_MEMOBJ_STD_HEADER_SIZE); + +struct memobj_elem_s +{ + memobj_header_t header; + uint8_t data[1]; +}; + +ret_code_t nrf_memobj_pool_init(nrf_memobj_pool_t const * p_pool) +{ + return nrf_balloc_init((nrf_balloc_t const *)p_pool); +} + +nrf_memobj_t * nrf_memobj_alloc(nrf_memobj_pool_t const * p_pool, + size_t size) +{ + uint32_t bsize = (uint32_t)NRF_BALLOC_ELEMENT_SIZE((nrf_balloc_t const *)p_pool) - sizeof(memobj_header_t); + uint8_t num_of_chunks = (uint8_t)CEIL_DIV(size + sizeof(memobj_head_header_t), bsize); + + memobj_head_t * p_head = nrf_balloc_alloc((nrf_balloc_t const *)p_pool); + if (p_head == NULL) + { + return NULL; + } + p_head->head_header.data.fields.user_cnt = 0; + p_head->head_header.data.fields.chunk_cnt = 1; + p_head->head_header.data.fields.chunk_size = bsize; + + memobj_header_t * p_prev = (memobj_header_t *)p_head; + memobj_header_t * p_curr; + uint32_t i; + uint32_t chunk_less1 = (uint32_t)num_of_chunks - 1; + + p_prev->p_next = (memobj_elem_t *)p_pool; + for (i = 0; i < chunk_less1; i++) + { + p_curr = (memobj_header_t *)nrf_balloc_alloc((nrf_balloc_t const *)p_pool); + if (p_curr) + { + (p_head->head_header.data.fields.chunk_cnt)++; + p_prev->p_next = (memobj_elem_t *)p_curr; + p_curr->p_next = (memobj_elem_t *)p_pool; + p_prev = p_curr; + } + else + { + //Couldn't allocate all requested buffers + nrf_memobj_free((nrf_memobj_t *)p_head); + return NULL; + } + } + return (nrf_memobj_t *)p_head; +} + +void nrf_memobj_free(nrf_memobj_t * p_obj) +{ + memobj_head_t * p_head = (memobj_head_t *)p_obj; + uint8_t chunk_cnt = p_head->head_header.data.fields.chunk_cnt; + uint32_t i; + memobj_header_t * p_curr = (memobj_header_t *)p_obj; + memobj_header_t * p_next; + uint32_t chunk_less1 = (uint32_t)chunk_cnt - 1; + + for (i = 0; i < chunk_less1; i++) + { + p_curr = (memobj_header_t *)p_curr->p_next; + } + nrf_balloc_t const * p_pool2 = (nrf_balloc_t const *)p_curr->p_next; + + p_curr = (memobj_header_t *)p_obj; + for (i = 0; i < chunk_cnt; i++) + { + p_next = (memobj_header_t *)p_curr->p_next; + nrf_balloc_free(p_pool2, p_curr); + p_curr = p_next; + } +} + +void nrf_memobj_get(nrf_memobj_t const * p_obj) +{ + memobj_head_t * p_head = (memobj_head_t *)p_obj; + (void)nrf_atomic_u32_add(&p_head->head_header.data.atomic_user_cnt, 1); +} + +void nrf_memobj_put(nrf_memobj_t * p_obj) +{ + memobj_head_t * p_head = (memobj_head_t *)p_obj; + uint32_t user_cnt = nrf_atomic_u32_sub(&p_head->head_header.data.atomic_user_cnt, 1); + memobj_head_header_fields_t * p_fields = (memobj_head_header_fields_t *)&user_cnt; + if (p_fields->user_cnt == 0) + { + nrf_memobj_free(p_obj); + } +} + +static void memobj_op(nrf_memobj_t * p_obj, + void * p_data, + uint32_t len, + uint32_t offset, + bool read) +{ + + memobj_head_t * p_head = (memobj_head_t *)p_obj; + uint32_t space_in_chunk = p_head->head_header.data.fields.chunk_size; + memobj_elem_t * p_curr_chunk = (memobj_elem_t *)p_obj; + uint32_t chunk_idx = (offset + sizeof(memobj_head_header_fields_t))/space_in_chunk; + uint32_t chunk_offset = (offset + sizeof(memobj_head_header_fields_t)) % space_in_chunk; + + uint8_t chunks_expected = CEIL_DIV((offset + sizeof(memobj_head_header_fields_t) + len), + space_in_chunk); + UNUSED_VARIABLE(chunks_expected); + ASSERT(p_head->head_header.data.fields.chunk_cnt >= chunks_expected); + + while (chunk_idx > 0) + { + p_curr_chunk = p_curr_chunk->header.p_next; + chunk_idx--; + } + + uint32_t src_offset = 0; + uint32_t curr_cpy_size = space_in_chunk-chunk_offset; + curr_cpy_size = curr_cpy_size > len ? len : curr_cpy_size; + + while (len) + { + if (read) + { + memcpy(&((uint8_t *)p_data)[src_offset], &p_curr_chunk->data[chunk_offset], curr_cpy_size); + } + else + { + memcpy(&p_curr_chunk->data[chunk_offset], &((uint8_t *)p_data)[src_offset], curr_cpy_size); + } + chunk_offset = 0; + p_curr_chunk = p_curr_chunk->header.p_next; + len -= curr_cpy_size; + src_offset += curr_cpy_size; + curr_cpy_size = (space_in_chunk > len) ? len : space_in_chunk; + } +} + +void nrf_memobj_write(nrf_memobj_t * p_obj, + void * p_data, + uint32_t len, + uint32_t offset) +{ + + memobj_op(p_obj, p_data, len, offset, false); +} + +void nrf_memobj_read(nrf_memobj_t * p_obj, + void * p_data, + uint32_t len, + uint32_t offset) +{ + memobj_op(p_obj, p_data, len, offset, true); +} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_memobj/nrf_memobj.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_memobj/nrf_memobj.h new file mode 100644 index 00000000000..06740db103d --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_memobj/nrf_memobj.h @@ -0,0 +1,198 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_MEMOBJ_H +#define NRF_MEMOBJ_H + +/** +* @defgroup nrf_memobj Memory Object module +* @{ +* @ingroup app_common +* @brief Functions for controlling memory object +*/ +#include +#include +#include "sdk_errors.h" +#include "nrf_balloc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Memory object can consist of multiple object with the same size. Each object has header and data + * part. First element in memory object is memory object head which has special header, remaining objects + * has the same header. Model of memory object is presented below. + * + * |---------------------| |---------------------| |---------------------| + * | head header (u32): | --->| std header - p_next |------->| p_memobj_pool | + * | num_of_chunks, | | |---------------------| |---------------------| + * | ref counter | | | | | | + * |---------------------| | | | | | + * | std header - p_next |-| | | .... | | + * |---------------------| | data | | data | + * | | | | | | + * | data | | | | | + * | | | | | | + * |---------------------| |---------------------| |---------------------| + * head mid_element last_element + * + * + */ +#define NRF_MEMOBJ_STD_HEADER_SIZE sizeof(uint32_t) + +/** + * @brief Macro for creating a nrf_memobj pool. + * + * Macro declares nrf_balloc object. Element in the pool contains user defined data part and + * memobj header. + */ +#define NRF_MEMOBJ_POOL_DEF(_name, _element_size, _pool_size) \ + NRF_BALLOC_DEF(_name, ((_element_size)+NRF_MEMOBJ_STD_HEADER_SIZE), (_pool_size)) + +/** + * @brief Pool of memobj. + */ +typedef nrf_balloc_t nrf_memobj_pool_t; + +/** + * @brief Memobj handle. + */ +typedef void * nrf_memobj_t; + +/** + * @brief Function for initializing the memobj pool instance. + * + * This function initializes the pool. + * + * @param[in] p_pool Pointer to the memobj pool instance structure. + * + * @return NRF_SUCCESS on success, otherwise error code. + */ +ret_code_t nrf_memobj_pool_init(nrf_memobj_pool_t const * p_pool); + +/** + * @brief Function for allocating memobj with requested size. + * + * Fixed length elements in the pool are linked together to provide amount of memory requested by + * the user. If memory object is successfully allocated then user can use memory however it is + * fragmented into multiple object so it has to be access through the API: @ref nrf_memobj_write, + * @ref nrf_memobj_read. + * + * This function initializes the pool. + * + * @param[in] p_pool Pointer to the memobj pool instance structure. + * @param[in] size Data size of requested object. + * + * @return Pointer to memory object or NULL if requested size cannot be allocated. + */ +nrf_memobj_t * nrf_memobj_alloc(nrf_memobj_pool_t const * p_pool, + size_t size); + +/** + * @brief Function for indicating that memory object is used and cannot be freed. + * + * Memory object can be shared and reused between multiple modules and this mechanism ensures that + * object is freed when no longer used by any module. Memory object has a counter which is incremented + * whenever this function is called. @ref nrf_memobj_put function decrements the counter. + * + * @param[in] p_obj Pointer to memory object. + */ +void nrf_memobj_get(nrf_memobj_t const * p_obj); + + +/** + * @brief Function for indicated that memory object is no longer used by the module and can be freed + * if no other module is using it. + * + * Memory object is returned to the pool if internal counter reaches 0 after decrementing. It means + * that no other module is needing it anymore. + * + * @note Memory object holds pointer to the pool which was used to allocate it so it does not have + * to be provided explicitly to this function. + * + * @param[in] p_obj Pointer to memory object. + */ +void nrf_memobj_put(nrf_memobj_t * p_obj); + + +/** + * @brief Function for forcing freeing of the memory object. + * + * @note This function should be use with caution because it can lead to undefined behavior of the + * modules since modules using the memory object are not aware that it has been freed. + * + * @param[in] p_obj Pointer to memory object. + */ +void nrf_memobj_free(nrf_memobj_t * p_obj); + +/** + * @brief Function for writing data to the memory object. + * + * @param[in] p_obj Pointer to memory object. + * @param[in] p_data Pointer to data to be written to the memory object. + * @param[in] len Amount of data to be written to the memory object. + * @param[in] offset Offset. + */ +void nrf_memobj_write(nrf_memobj_t * p_obj, + void * p_data, + uint32_t len, + uint32_t offset); + +/** + * @brief Function for reading data from the memory object. + * + * @param[in] p_obj Pointer to memory object. + * @param[in] p_data Pointer to the destination buffer. + * @param[in] len Amount of data to be read from the memory object. + * @param[in] offset Offset. + */ +void nrf_memobj_read(nrf_memobj_t * p_obj, + void * p_data, + uint32_t len, + uint32_t offset); + +#ifdef __cplusplus +} +#endif + +#endif //NRF_MEMOBJ_H + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section.h new file mode 100644 index 00000000000..62eda6448f2 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section.h @@ -0,0 +1,191 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_SECTION_H__ +#define NRF_SECTION_H__ + +#include "nordic_common.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup section_vars Section variables + * @ingroup app_common + * @{ + * + * @brief Section variables. + */ + +//lint -save -e27 -esym(526,*) + +#if defined(__ICCARM__) +// Enable IAR language extensions +#pragma language=extended +#endif + +/**@brief Macro for obtaining the address of the beginning of a section. + * + * param[in] section_name Name of the section. + * @hideinitializer + */ +#if defined(__CC_ARM) +#define NRF_SECTION_START_ADDR(section_name) &CONCAT_2(section_name, $$Base) + +#elif defined(__GNUC__) +#define NRF_SECTION_START_ADDR(section_name) &CONCAT_2(__start_, section_name) + +#elif defined(__ICCARM__) +#define NRF_SECTION_START_ADDR(section_name) __section_begin(STRINGIFY(section_name)) +#endif + + +/**@brief Macro for obtaining the address of the end of a section. + * + * @param[in] section_name Name of the section. + * @hideinitializer + */ +#if defined(__CC_ARM) +#define NRF_SECTION_END_ADDR(section_name) &CONCAT_2(section_name, $$Limit) + +#elif defined(__GNUC__) +#define NRF_SECTION_END_ADDR(section_name) &CONCAT_2(__stop_, section_name) + +#elif defined(__ICCARM__) +#define NRF_SECTION_END_ADDR(section_name) __section_end(STRINGIFY(section_name)) +#endif + + +/**@brief Macro for retrieving the length of a given section, in bytes. + * + * @param[in] section_name Name of the section. + * @hideinitializer + */ +#define NRF_SECTION_LENGTH(section_name) \ + ((size_t)NRF_SECTION_END_ADDR(section_name) - \ + (size_t)NRF_SECTION_START_ADDR(section_name)) + + +/**@brief Macro for creating a section. + * + * @param[in] section_name Name of the section. + * @param[in] data_type Data type of the variables to be registered in the section. + * + * @warning Data type must be word aligned to prevent padding. + * @hideinitializer + */ +#if defined(__CC_ARM) +#define NRF_SECTION_DEF(section_name, data_type) \ + extern data_type * CONCAT_2(section_name, $$Base); \ + extern void * CONCAT_2(section_name, $$Limit) + +#elif defined(__GNUC__) +#define NRF_SECTION_DEF(section_name, data_type) \ + extern data_type * CONCAT_2(__start_, section_name); \ + extern void * CONCAT_2(__stop_, section_name) + +#elif defined(__ICCARM__) +#define NRF_SECTION_DEF(section_name, data_type) \ + _Pragma(STRINGIFY(section = STRINGIFY(section_name))); + +#endif + + +/**@brief Macro for declaring a variable and registering it in a section. + * + * @details Declares a variable and registers it in a named section. This macro ensures that the + * variable is not stripped away when using optimizations. + * + * @note The order in which variables are placed in a section is dependent on the order in + * which the linker script encounters the variables during linking. + * + * @param[in] section_name Name of the section. + * @param[in] section_var Variable to register in the given section. + * @hideinitializer + */ +#if defined(__CC_ARM) +#define NRF_SECTION_ITEM_REGISTER(section_name, section_var) \ + section_var __attribute__ ((section(STRINGIFY(section_name)))) __attribute__((used)) + +#elif defined(__GNUC__) +#define NRF_SECTION_ITEM_REGISTER(section_name, section_var) \ + section_var __attribute__ ((section("." STRINGIFY(section_name)))) __attribute__((used)) + +#elif defined(__ICCARM__) +#define NRF_SECTION_ITEM_REGISTER(section_name, section_var) \ + __root section_var @ STRINGIFY(section_name) +#endif + + +/**@brief Macro for retrieving a variable from a section. + * + * @warning The stored symbol can only be resolved using this macro if the + * type of the data is word aligned. The operation of acquiring + * the stored symbol relies on the size of the stored type. No + * padding can exist in the named section in between individual + * stored items or this macro will fail. + * + * @param[in] section_name Name of the section. + * @param[in] data_type Data type of the variable. + * @param[in] i Index of the variable in section. + * @hideinitializer + */ +#define NRF_SECTION_ITEM_GET(section_name, data_type, i) \ + ((data_type*)NRF_SECTION_START_ADDR(section_name) + (i)) + + +/**@brief Macro for getting the number of variables in a section. + * + * @param[in] section_name Name of the section. + * @param[in] data_type Data type of the variables in the section. + * @hideinitializer + */ +#define NRF_SECTION_ITEM_COUNT(section_name, data_type) \ + NRF_SECTION_LENGTH(section_name) / sizeof(data_type) + +/** @} */ + +//lint -restore + +#ifdef __cplusplus +} +#endif + +#endif // NRF_SECTION_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section_iter.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section_iter.c new file mode 100644 index 00000000000..ea8b02f7a68 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section_iter.c @@ -0,0 +1,125 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "sdk_common.h" + +#if NRF_MODULE_ENABLED(NRF_SECTION_ITER) + +#include "nrf_section_iter.h" + + +#if !defined(__GNUC__) +static void nrf_section_iter_item_set(nrf_section_iter_t * p_iter) +{ + ASSERT(p_iter != NULL); + ASSERT(p_iter->p_set != NULL); + ASSERT(p_iter->p_section != NULL); + + while (true) + { + if (p_iter->p_section == p_iter->p_set->p_last) + { + // End of the section set. + p_iter->p_item = NULL; + return; + } + + if (p_iter->p_section->p_start != p_iter->p_section->p_end) + { + // Not empty section. + p_iter->p_item = p_iter->p_section->p_start; + return; + } + + // Next section. + p_iter->p_section++; + } +} +#endif + + +void nrf_section_iter_init(nrf_section_iter_t * p_iter, nrf_section_set_t const * p_set) +{ + ASSERT(p_iter != NULL); + ASSERT(p_set != NULL); + + p_iter->p_set = p_set; + +#if defined(__GNUC__) + p_iter->p_item = p_iter->p_set->section.p_start; + if (p_iter->p_item == p_iter->p_set->section.p_end) + { + p_iter->p_item = NULL; + } +#else + p_iter->p_section = p_set->p_first; + nrf_section_iter_item_set(p_iter); +#endif +} + +void nrf_section_iter_next(nrf_section_iter_t * p_iter) +{ + ASSERT(p_iter != NULL); + ASSERT(p_iter->p_set != NULL); + + if (p_iter->p_item == NULL) + { + return; + } + + p_iter->p_item = (void *)((size_t)(p_iter->p_item) + p_iter->p_set->item_size); + +#if defined(__GNUC__) + if (p_iter->p_item == p_iter->p_set->section.p_end) + { + p_iter->p_item = NULL; + } +#else + ASSERT(p_iter->p_section != NULL); + // End of current section reached? + if (p_iter->p_item == p_iter->p_section->p_end) + { + p_iter->p_section++; + nrf_section_iter_item_set(p_iter); + } +#endif +} + +#endif // NRF_MODULE_ENABLED(NRF_SECTION_ITER) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section_iter.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section_iter.h new file mode 100644 index 00000000000..2f9be61bea5 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section_iter.h @@ -0,0 +1,206 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_SECTION_ITER_H__ +#define NRF_SECTION_ITER_H__ + +#include +#include "nrf_section.h" +#include "nrf_assert.h" +#include "app_util.h" + +#ifdef __cplusplus +extern "C" { +#endif + + +/** + * @defgroup nrf_section_iter Section variables iterator + * @ingroup app_common + * @{ + */ + +/**@brief Single section description structure. */ +typedef struct +{ + void * p_start; //!< Pointer to the start of section. + void * p_end; //!< Pointer to the end of section. +} nrf_section_t; + + +/**@brief Set of the sections description structure. */ +typedef struct +{ +#if defined(__GNUC__) + nrf_section_t section; //!< Description of the set of sections. + /**< + * In case of GCC all sections in the set are sorted and + * placed in contiguous area, because they are treated as + * one section. + */ +#else + nrf_section_t const * p_first; //!< Pointer to the first section in the set. + nrf_section_t const * p_last; //!< Pointer to the last section in the set. +#endif + size_t item_size; //!< Size of the single item in the section. +} nrf_section_set_t; + + +/**@brief Section iterator structure. */ +typedef struct +{ + nrf_section_set_t const * p_set; //!< Pointer to the appropriate section set. +#if !defined(__GNUC__) + nrf_section_t const * p_section; //!< Pointer to the selected section. + /**< + * In case of GCC all sections in the set are sorted and + * placed in contiguous area, because they are treated + * as one section. + */ +#endif + void * p_item; //!< Pointer to the selected item in the section. +} nrf_section_iter_t; + + +/**@brief Create a set of sections. + * + * @note This macro reserves memory for the given set of sections. + * + * @details A set of sections, is an ordered collections of sections. + * + * @param[in] _name Name of the set. + * @param[in] _type Type of the elements stored in the sections. + * @param[in] _count Number of the sections in the set. This parameter is ignored in case of GCC. + * @hideinitializer + */ +#if defined(__GNUC__) + +#define NRF_SECTION_SET_DEF(_name, _type, _count) \ + \ + NRF_SECTION_DEF(_name, _type); \ + static nrf_section_set_t const _name = \ + { \ + .section = \ + { \ + .p_start = NRF_SECTION_START_ADDR(_name), \ + .p_end = NRF_SECTION_END_ADDR(_name), \ + }, \ + .item_size = sizeof(_type), \ + } + +#else + +#define NRF_SECTION_SET_DEF(_name, _type, _count) \ +/*lint -save -emacro(14, MACRO_REPEAT_FOR*) */ \ +MACRO_REPEAT_FOR(_count, NRF_SECTION_DEF_, _name, _type) \ +static nrf_section_t const CONCAT_2(_name, _array)[] = \ +{ \ + MACRO_REPEAT_FOR(_count, NRF_SECTION_SET_DEF_, _name) \ +}; \ +/*lint -restore */ \ +static nrf_section_set_t const _name = \ +{ \ + .p_first = CONCAT_2(_name, _array), \ + .p_last = CONCAT_2(_name, _array) + ARRAY_SIZE(CONCAT_2(_name, _array)), \ + .item_size = sizeof(_type), \ +} + +#ifndef DOXYGEN +#define NRF_SECTION_DEF_(_priority, _name, _type) \ +NRF_SECTION_DEF(CONCAT_2(_name, _priority), _type); + +#define NRF_SECTION_SET_DEF_(_priority, _name) \ +{ \ + .p_start = NRF_SECTION_START_ADDR(CONCAT_2(_name, _priority)), \ + .p_end = NRF_SECTION_END_ADDR(CONCAT_2(_name, _priority)), \ +}, +#endif // DOXYGEN +#endif // __GNUC__ + + +/**@brief Macro to declare a variable and register it in the section set. + * + * @note The order of the section in the set is based on the priority. The order with which + * variables are placed in a section is dependant on the order with which the linker + * encouters the variables during linking. + * + * @param[in] _name Name of the section set. + * @param[in] _priority Priority of the desired section. + * @param[in] _var The variable to register in the given section. + * @hideinitializer + */ +#define NRF_SECTION_SET_ITEM_REGISTER(_name, _priority, _var) \ + NRF_SECTION_ITEM_REGISTER(CONCAT_2(_name, _priority), _var) + + +/**@brief Function for initializing the section set iterator. + * + * @param[in] p_iter Pointer to the iterator. + * @param[in] p_set Pointer to the sections set. + */ +void nrf_section_iter_init(nrf_section_iter_t * p_iter, nrf_section_set_t const * p_set); + + +/**@brief Function for incrementing iterator. + * + * @param[in] p_iter Pointer to the iterator. + */ +void nrf_section_iter_next(nrf_section_iter_t * p_iter); + + +/**@brief Function for getting the element pointed to by the iterator. + * + * @param[in] p_iter Pointer to the iterator. + * + * @retval Pointer to the element or NULL if iterator points end of the set. + */ +static inline void * nrf_section_iter_get(nrf_section_iter_t const * p_iter) +{ + ASSERT(p_iter); + return p_iter->p_item; +} + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_SECTION_ITER_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage.c new file mode 100644 index 00000000000..d96abce6c18 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage.c @@ -0,0 +1,244 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "sdk_config.h" + +#if NRF_FSTORAGE_ENABLED + +#include "nrf_fstorage.h" +#include +#include +#include "sdk_errors.h" +#include "sdk_macros.h" +#include "nrf_section.h" + +#define NRF_LOG_MODULE_NAME nrf_fstorage +#include "nrf_log.h" +NRF_LOG_MODULE_REGISTER(); + + +/* Create the section "fs_data". */ +NRF_SECTION_DEF(fs_data, nrf_fstorage_t); + + +/**@brief Macro to handle user input validation. + * + * If @p _cond evaluates to true, does nothing. Otherwise, + * if the NRF_FSTORAGE_PARAM_CHECK_DISABLED is not set, logs an error message and returns @p _err. + * If the NRF_FSTORAGE_PARAM_CHECK_DISABLED is set, behaves like the @ref ASSERT macro. + * + * Parameter checking implemented using this macro can be optionally turned off for release code. + * Only disable runtime parameter checks if size if a major concern. + * + * @param _cond The condition to be evaluated. + * @param _err The error code to be returned. + */ +#define NRF_FSTORAGE_PARAM_CHECK(_cond, _err) \ + NRF_PARAM_CHECK(NRF_FSTORAGE, _cond, _err, NRF_LOG_ERROR) + + +static bool addr_is_aligned32(uint32_t addr); +static bool addr_is_page_aligned(nrf_fstorage_t const * p_fs, uint32_t addr); +static bool addr_is_within_bounds(nrf_fstorage_t const * p_fs, uint32_t addr, uint32_t len); + + +ret_code_t nrf_fstorage_init(nrf_fstorage_t * p_fs, + nrf_fstorage_api_t * p_api, + void * p_param) +{ + NRF_FSTORAGE_PARAM_CHECK(p_fs, NRF_ERROR_NULL); + NRF_FSTORAGE_PARAM_CHECK(p_api, NRF_ERROR_NULL); + + p_fs->p_api = p_api; + + return (p_fs->p_api)->init(p_fs, p_param); +} + + +ret_code_t nrf_fstorage_uninit(nrf_fstorage_t * p_fs, + void * p_param) +{ + ret_code_t rc; + + NRF_FSTORAGE_PARAM_CHECK(p_fs, NRF_ERROR_NULL); + NRF_FSTORAGE_PARAM_CHECK(p_fs->p_api, NRF_ERROR_INVALID_STATE); + + rc = (p_fs->p_api)->uninit(p_fs, p_param); + + /* Uninitialize the API. */ + p_fs->p_api = NULL; + p_fs->p_flash_info = NULL; + + return rc; +} + + +ret_code_t nrf_fstorage_read(nrf_fstorage_t const * p_fs, + uint32_t src, + void * p_dest, + uint32_t len) +{ + NRF_FSTORAGE_PARAM_CHECK(p_fs, NRF_ERROR_NULL); + NRF_FSTORAGE_PARAM_CHECK(p_dest, NRF_ERROR_NULL); + NRF_FSTORAGE_PARAM_CHECK(p_fs->p_api, NRF_ERROR_INVALID_STATE); + NRF_FSTORAGE_PARAM_CHECK(len, NRF_ERROR_INVALID_LENGTH); + + /* Source addres must be word-aligned. */ + NRF_FSTORAGE_PARAM_CHECK(addr_is_aligned32(src), NRF_ERROR_INVALID_ADDR); + NRF_FSTORAGE_PARAM_CHECK(addr_is_within_bounds(p_fs, src, len), NRF_ERROR_INVALID_ADDR); + + return (p_fs->p_api)->read(p_fs, src, p_dest, len); +} + + +ret_code_t nrf_fstorage_write(nrf_fstorage_t const * p_fs, + uint32_t dest, + void const * p_src, + uint32_t len, + void * p_context) +{ + NRF_FSTORAGE_PARAM_CHECK(p_fs, NRF_ERROR_NULL); + NRF_FSTORAGE_PARAM_CHECK(p_src, NRF_ERROR_NULL); + NRF_FSTORAGE_PARAM_CHECK(p_fs->p_api, NRF_ERROR_INVALID_STATE); + NRF_FSTORAGE_PARAM_CHECK(len, NRF_ERROR_INVALID_LENGTH); + + /* Length must be a multiple of the program unit. */ + NRF_FSTORAGE_PARAM_CHECK(!(len % p_fs->p_flash_info->program_unit), NRF_ERROR_INVALID_LENGTH); + + /* Source and destination addresses must be word-aligned. */ + NRF_FSTORAGE_PARAM_CHECK(addr_is_aligned32(dest), NRF_ERROR_INVALID_ADDR); + NRF_FSTORAGE_PARAM_CHECK(addr_is_aligned32((uint32_t)p_src), NRF_ERROR_INVALID_ADDR); + NRF_FSTORAGE_PARAM_CHECK(addr_is_within_bounds(p_fs, dest, len), NRF_ERROR_INVALID_ADDR); + + return (p_fs->p_api)->write(p_fs, dest, p_src, len, p_context); +} + + +ret_code_t nrf_fstorage_erase(nrf_fstorage_t const * p_fs, + uint32_t page_addr, + uint32_t len, + void * p_context) +{ + NRF_FSTORAGE_PARAM_CHECK(p_fs, NRF_ERROR_NULL); + NRF_FSTORAGE_PARAM_CHECK(p_fs->p_api, NRF_ERROR_INVALID_STATE); + NRF_FSTORAGE_PARAM_CHECK(len, NRF_ERROR_INVALID_LENGTH); + + /* Address must be aligned to a page boundary. */ + NRF_FSTORAGE_PARAM_CHECK(addr_is_page_aligned(p_fs, page_addr), NRF_ERROR_INVALID_ADDR); + + NRF_FSTORAGE_PARAM_CHECK( + addr_is_within_bounds(p_fs, page_addr, (len * p_fs->p_flash_info->erase_unit)), + NRF_ERROR_INVALID_ADDR + ); + + return (p_fs->p_api)->erase(p_fs, page_addr, len, p_context); +} + + +uint8_t const * nrf_fstorage_rmap(nrf_fstorage_t const * p_fs, uint32_t addr) +{ + if ((p_fs == NULL) || (p_fs->p_api == NULL)) + { + return NULL; + } + + return (p_fs->p_api)->rmap(p_fs, addr); +} + + +uint8_t * nrf_fstorage_wmap(nrf_fstorage_t const * p_fs, uint32_t addr) +{ + if ((p_fs == NULL) || (p_fs->p_api == NULL)) + { + return NULL; + } + + return (p_fs->p_api)->wmap(p_fs, addr); +} + + +bool nrf_fstorage_is_busy(nrf_fstorage_t const * p_fs) +{ + /* If a NULL instance is provided, return true if any instance is busy. + * Uninitialized instances are considered not busy. */ + if ((p_fs == NULL) || (p_fs->p_api == NULL)) + { + for (uint32_t i = 0; i < NRF_FSTORAGE_INSTANCE_CNT; i++) + { + p_fs = NRF_FSTORAGE_INSTANCE_GET(i); /* cannot be NULL. */ + if (p_fs->p_api != NULL) + { + /* p_api->is_busy() cannot be NULL. */ + if (p_fs->p_api->is_busy(p_fs)) + { + return true; + } + } + } + + return false; + } + + return p_fs->p_api->is_busy(p_fs); +} + + +static bool addr_is_within_bounds(nrf_fstorage_t const * p_fs, + uint32_t addr, + uint32_t len) +{ + return ( (addr >= p_fs->start_addr) + && (addr + len - 1 <= p_fs->end_addr)); +} + + +static bool addr_is_aligned32(uint32_t addr) +{ + return !(addr & 0x03); +} + + +static bool addr_is_page_aligned(nrf_fstorage_t const * p_fs, + uint32_t addr) +{ + return (addr & (p_fs->p_flash_info->erase_unit - 1)) == 0; +} + + +#endif // NRF_FSTORAGE_ENABLED diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage.h new file mode 100644 index 00000000000..b67895010af --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage.h @@ -0,0 +1,341 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_FSTORAGE_H__ +#define NRF_FSTORAGE_H__ + +/** + * @file + * + * @defgroup nrf_fstorage Flash storage (fstorage) + * @ingroup app_common + * @{ + * + * @brief Flash abstraction library that provides basic read, write, and erase operations. + * + * @details The fstorage library can be implemented in different ways. Two implementations are provided: + * - The @ref nrf_fstorage_sd implements flash access through the SoftDevice. + * - The @ref nrf_fstorage_nvmc implements flash access through the non-volatile memory controller. + * + * You can select the implementation that should be used independently for each instance of fstorage. + */ + +#include +#include +#include "sdk_errors.h" +#include "nrf_section.h" + +#ifdef __cplusplus +extern "C" { +#endif + + +/**@brief Macro for defining an fstorage instance. + * + * Users of fstorage must define an instance variable by using this macro. + * Each instance is tied to an API implementation and contains information such + * as the program and erase units for the target flash peripheral. + * Instance variables are placed in the "fs_data" section of the binary. + * + * @param[in] inst A definition of an @ref nrf_fstorage_t variable. + */ +#define NRF_FSTORAGE_DEF(inst) NRF_SECTION_ITEM_REGISTER(fs_data, inst) + +/**@brief Macro for retrieving an fstorage instance. */ +#define NRF_FSTORAGE_INSTANCE_GET(i) NRF_SECTION_ITEM_GET(fs_data, nrf_fstorage_t, (i)) + +/**@brief Macro for retrieving the total number of fstorage instances. */ +#define NRF_FSTORAGE_INSTANCE_CNT NRF_SECTION_ITEM_COUNT(fs_data, nrf_fstorage_t) + + +/**@brief Event IDs. */ +typedef enum +{ + NRF_FSTORAGE_EVT_READ_RESULT, + NRF_FSTORAGE_EVT_WRITE_RESULT, //!< Event for @ref nrf_fstorage_write. + NRF_FSTORAGE_EVT_ERASE_RESULT //!< Event for @ref nrf_fstorage_erase. +} nrf_fstorage_evt_id_t; + + +/**@brief An fstorage event. */ +typedef struct +{ + nrf_fstorage_evt_id_t id; //!< The event ID. + ret_code_t result; //!< Result of the operation. + uint32_t addr; //!< Address at which the operation was performed. + void const * p_src; //!< Buffer written to flash. + uint32_t len; //!< Length of the operation. + void * p_param; //!< User-defined parameter passed to the event handler. +} nrf_fstorage_evt_t; + + +/**@brief Event handler function prototype. + * + * @param[in] p_evt The event. + */ +typedef void (*nrf_fstorage_evt_handler_t)(nrf_fstorage_evt_t * p_evt); + + +/**@brief Information about the implementation and the flash peripheral. */ +typedef struct +{ + uint32_t erase_unit; //!< Size of a flash page (in bytes). A flash page is the smallest unit that can be erased. + uint32_t program_unit; //!< Size of the smallest programmable unit (in bytes). + bool rmap; //!< The device address space is memory mapped to the MCU address space. + bool wmap; //!< The device address space is memory mapped to a writable MCU address space. +} const nrf_fstorage_info_t; + + +/* Necessary forward declaration. */ +struct nrf_fstorage_api_s; + + +/**@brief An fstorage instance. + * + * @details Use the @ref NRF_FSTORAGE_DEF macro to define an fstorage instance. + * + * An instance is tied to an API implementation and contains information about the flash device, + * such as the program and erase units as well and implementation-specific functionality. + */ +typedef struct +{ + /**@brief The API implementation used by this instance. */ + struct nrf_fstorage_api_s const * p_api; + + /**@brief Information about the implementation functionality and the flash peripheral. */ + nrf_fstorage_info_t * p_flash_info; + + /**@brief The event handler function. + * + * If set to NULL, no events will be sent. + */ + nrf_fstorage_evt_handler_t evt_handler; + + /**@brief The beginning of the flash space on which this fstorage instance should operate. + * All flash operations must be within the address specified in + * this field and @ref end_addr. + * + * This field must be set manually. + */ + uint32_t start_addr; + + /**@brief The last address (exclusive) of flash on which this fstorage instance should operate. + * All flash operations must be within the address specified in + * this field and @ref start_addr. + * + * This field must be set manually. + */ + uint32_t end_addr; +} nrf_fstorage_t; + + +/**@brief Functions provided by the API implementation. */ +typedef struct nrf_fstorage_api_s +{ + /**@brief Initialize the flash peripheral. */ + ret_code_t (*init)(nrf_fstorage_t * p_fs, void * p_param); + /**@brief Uninitialize the flash peripheral. */ + ret_code_t (*uninit)(nrf_fstorage_t * p_fs, void * p_param); + /**@brief Read data from flash. */ + ret_code_t (*read)(nrf_fstorage_t const * p_fs, uint32_t src, void * p_dest, uint32_t len); + /**@brief Write bytes to flash. */ + ret_code_t (*write)(nrf_fstorage_t const * p_fs, uint32_t dest, void const * p_src, uint32_t len, void * p_param); + /**@brief Erase flash pages. */ + ret_code_t (*erase)(nrf_fstorage_t const * p_fs, uint32_t addr, uint32_t len, void * p_param); + /**@brief Map a device address to a readable address within the MCU address space. */ + uint8_t const * (*rmap)(nrf_fstorage_t const * p_fs, uint32_t addr); + /**@brief Map a device address to a writable address within the MCU address space. */ + uint8_t * (*wmap)(nrf_fstorage_t const * p_fs, uint32_t addr); + /**@brief Check if there are any pending flash operations. */ + bool (*is_busy)(nrf_fstorage_t const * p_fs); +} const nrf_fstorage_api_t; + + +/**@brief Function for initializing fstorage. + * + * @param[in] p_fs The fstorage instance to initialize. + * @param[in] p_api The API implementation to use. + * @param[in] p_param An optional parameter to pass to the implementation-specific API call. + * + * @retval NRF_SUCCESS If initialization was successful. + * @retval NRF_ERROR_NULL If @p p_fs or @p p_api field in @p p_fs is NULL. + * @retval NRF_ERROR_INTERNAL If another error occurred. + */ +ret_code_t nrf_fstorage_init(nrf_fstorage_t * p_fs, + nrf_fstorage_api_t * p_api, + void * p_param); + + +/**@brief Function for uninitializing an fstorage instance. + * + * @param[in] p_fs The fstorage instance to uninitialize. + * @param[in] p_param An optional parameter to pass to the implementation-specific API call. + * + * @retval NRF_SUCCESS If uninitialization was successful. + * @retval NRF_ERROR_NULL If @p p_fs is NULL. + * @retval NRF_ERROR_INVALID_STATE If the module is not initialized. + * @retval NRF_ERROR_INTERNAL If another error occurred. + */ +ret_code_t nrf_fstorage_uninit(nrf_fstorage_t * p_fs, void * p_param); + + +/**@brief Function for reading data from flash. + * + * Copy @p len bytes from @p addr to @p p_dest. + * + * @param[in] p_fs The fstorage instance. + * @param[in] addr Address in flash where to read from. + * @param[in] p_dest Buffer where the data should be copied. + * @param[in] len Length of the data to be copied (in bytes). + * + * @retval NRF_SUCCESS If the operation was successful. + * @retval NRF_ERROR_NULL If @p p_fs or @p p_dest is NULL. + * @retval NRF_ERROR_INVALID_STATE If the module is not initialized. + * @retval NRF_ERROR_INVALID_LENGTH If @p len is zero or otherwise invalid. + * @retval NRF_ERROR_INVALID_ADDR If the address @p addr is outside the flash memory + * boundaries specified in @p p_fs, or if it is unaligned. + */ +ret_code_t nrf_fstorage_read(nrf_fstorage_t const * p_fs, + uint32_t addr, + void * p_dest, + uint32_t len); + + +/**@brief Function for writing data to flash. + * + * Write @p len bytes from @p p_src to @p dest. + * + * When using @ref nrf_fstorage_sd, the data is written by several calls to @ref sd_flash_write if + * the length of the data exceeds @ref NRF_FSTORAGE_SD_MAX_WRITE_SIZE bytes. + * Only one event is sent upon completion. + * + * @note The data to be written to flash must be kept in memory until the operation has + * terminated and an event is received. + * + * @param[in] p_fs The fstorage instance. + * @param[in] dest Address in flash memory where to write the data. + * @param[in] p_src Data to be written. + * @param[in] len Length of the data (in bytes). + * @param[in] p_param User-defined parameter passed to the event handler (may be NULL). + * + * @retval NRF_SUCCESS If the operation was accepted. + * @retval NRF_ERROR_NULL If @p p_fs or @p p_src is NULL. + * @retval NRF_ERROR_INVALID_STATE If the module is not initialized. + * @retval NRF_ERROR_INVALID_LENGTH If @p len is zero or not a multiple of the program unit, + * or if it is otherwise invalid. + * @retval NRF_ERROR_INVALID_ADDR If the address @p dest is outside the flash memory + * boundaries specified in @p p_fs, or if it is unaligned. + * @retval NRF_ERROR_NO_MEM If no memory is available to accept the operation. + * When using the @ref nrf_fstorage_sd, this error + * indicates that the internal queue of operations is full. + */ +ret_code_t nrf_fstorage_write(nrf_fstorage_t const * p_fs, + uint32_t dest, + void const * p_src, + uint32_t len, + void * p_param); + + +/**@brief Function for erasing flash pages. + * + * @details This function erases @p len pages starting from the page at address @p page_addr. + * The erase operation must be initiated on a page boundary. + * + * @param[in] p_fs The fstorage instance. + * @param[in] page_addr Address of the page to erase. + * @param[in] len Number of pages to erase. + * @param[in] p_param User-defined parameter passed to the event handler (may be NULL). + * + * @retval NRF_SUCCESS If the operation was accepted. + * @retval NRF_ERROR_NULL If @p p_fs is NULL. + * @retval NRF_ERROR_INVALID_STATE If the module is not initialized. + * @retval NRF_ERROR_INVALID_LENGTH If @p len is zero. + * @retval NRF_ERROR_INVALID_ADDR If the address @p page_addr is outside the flash memory + * boundaries specified in @p p_fs, or if it is unaligned. + * @retval NRF_ERROR_NO_MEM If no memory is available to accept the operation. + * When using the @ref nrf_fstorage_sd, this error + * indicates that the internal queue of operations is full. + */ +ret_code_t nrf_fstorage_erase(nrf_fstorage_t const * p_fs, + uint32_t page_addr, + uint32_t len, + void * p_param); + + +/**@brief Map a flash address to a pointer in the MCU address space that can be dereferenced. + * + * @param p_fs The fstorage instance. + * @param addr The address to map. + * + * @retval A pointer to the specified address, + * or @c NULL if the address cannot be mapped or if @p p_fs is @c NULL. + */ +uint8_t const * nrf_fstorage_rmap(nrf_fstorage_t const * p_fs, uint32_t addr); + + +/**@brief Map a flash address to a pointer in the MCU address space that can be written to. + * + * @param p_fs The fstorage instance. + * @param addr The address to map. + * + * @retval A pointer to the specified address, + * or @c NULL if the address cannot be mapped or if @p p_fs is @c NULL. + */ +uint8_t * nrf_fstorage_wmap(nrf_fstorage_t const * p_fs, uint32_t addr); + + +/**@brief Function for querying the status of fstorage. + * + * @details An uninitialized instance of fstorage is treated as not busy. + * + * @param[in] p_fs The fstorage instance. Pass NULL to query all instances. + * + * @returns If @p p_fs is @c NULL, this function returns true if any fstorage instance is busy or false otherwise. + * @returns If @p p_fs is not @c NULL, this function returns true if the fstorage instance is busy or false otherwise. + */ + bool nrf_fstorage_is_busy(nrf_fstorage_t const * p_fs); + +/** @} */ + + +#ifdef __cplusplus +} +#endif + +#endif // NRF_FSTORAGE_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage_nvmc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage_nvmc.c new file mode 100644 index 00000000000..14b1859c934 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage_nvmc.c @@ -0,0 +1,217 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "sdk_common.h" + +#if NRF_MODULE_ENABLED(NRF_FSTORAGE) + +#include "nrf_fstorage_nvmc.h" +#include +#include +#include +#include "nrf_nvmc.h" +#include "nrf_atomic.h" + + +static nrf_fstorage_info_t m_flash_info = +{ +#if defined(NRF51) + .erase_unit = 1024, +#elif defined(NRF52_SERIES) + .erase_unit = 4096, +#endif + .program_unit = 4, + .rmap = true, + .wmap = false, +}; + + + /* An operation initiated by fstorage is ongoing. */ +static nrf_atomic_flag_t m_flash_operation_ongoing; + + +/* Send event to the event handler. */ +static void event_send(nrf_fstorage_t const * p_fs, + nrf_fstorage_evt_id_t evt_id, + void const * p_src, + uint32_t addr, + uint32_t len, + void * p_param) +{ + if (p_fs->evt_handler == NULL) + { + /* Nothing to do. */ + return; + } + + nrf_fstorage_evt_t evt = + { + .result = NRF_SUCCESS, + .id = evt_id, + .addr = addr, + .p_src = p_src, + .len = len, + .p_param = p_param, + }; + + p_fs->evt_handler(&evt); +} + + +static ret_code_t init(nrf_fstorage_t * p_fs, void * p_param) +{ + UNUSED_PARAMETER(p_param); + + p_fs->p_flash_info = &m_flash_info; + + return NRF_SUCCESS; +} + + +static ret_code_t uninit(nrf_fstorage_t * p_fs, void * p_param) +{ + UNUSED_PARAMETER(p_fs); + UNUSED_PARAMETER(p_param); + + (void) nrf_atomic_flag_clear(&m_flash_operation_ongoing); + + return NRF_SUCCESS; +} + + +static ret_code_t read(nrf_fstorage_t const * p_fs, uint32_t src, void * p_dest, uint32_t len) +{ + UNUSED_PARAMETER(p_fs); + + memcpy(p_dest, (uint32_t*)src, len); + + return NRF_SUCCESS; +} + + +static ret_code_t write(nrf_fstorage_t const * p_fs, + uint32_t dest, + void const * p_src, + uint32_t len, + void * p_param) +{ + if (nrf_atomic_flag_set_fetch(&m_flash_operation_ongoing)) + { + return NRF_ERROR_BUSY; + } + + nrf_nvmc_write_words(dest, (uint32_t*)p_src, (len / m_flash_info.program_unit)); + + /* Clear the flag before sending the event, to allow API calls in the event context. */ + (void) nrf_atomic_flag_clear(&m_flash_operation_ongoing); + + event_send(p_fs, NRF_FSTORAGE_EVT_WRITE_RESULT, p_src, dest, len, p_param); + + return NRF_SUCCESS; +} + + +static ret_code_t erase(nrf_fstorage_t const * p_fs, + uint32_t page_addr, + uint32_t len, + void * p_param) +{ + uint32_t progress = 0; + + if (nrf_atomic_flag_set_fetch(&m_flash_operation_ongoing)) + { + return NRF_ERROR_BUSY; + } + + while (progress != len) + { + nrf_nvmc_page_erase(page_addr + (progress * m_flash_info.erase_unit)); + progress++; + } + + /* Clear the flag before sending the event, to allow API calls in the event context. */ + (void) nrf_atomic_flag_clear(&m_flash_operation_ongoing); + + event_send(p_fs, NRF_FSTORAGE_EVT_ERASE_RESULT, NULL, page_addr, len, p_param); + + return NRF_SUCCESS; +} + + +static uint8_t const * rmap(nrf_fstorage_t const * p_fs, uint32_t addr) +{ + UNUSED_PARAMETER(p_fs); + + return (uint8_t*)addr; +} + + +static uint8_t * wmap(nrf_fstorage_t const * p_fs, uint32_t addr) +{ + UNUSED_PARAMETER(p_fs); + UNUSED_PARAMETER(addr); + + /* Not supported. */ + return NULL; +} + + +static bool is_busy(nrf_fstorage_t const * p_fs) +{ + UNUSED_PARAMETER(p_fs); + + return m_flash_operation_ongoing; +} + + +/* The exported API. */ +nrf_fstorage_api_t nrf_fstorage_nvmc = +{ + .init = init, + .uninit = uninit, + .read = read, + .write = write, + .erase = erase, + .rmap = rmap, + .wmap = wmap, + .is_busy = is_busy +}; + + +#endif // NRF_FSTORAGE_ENABLED diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage_nvmc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage_nvmc.h new file mode 100644 index 00000000000..bacd7457e0a --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage_nvmc.h @@ -0,0 +1,75 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/** + * @file + * + * @defgroup nrf_fstorage_nvmc NVMC implementation + * @ingroup nrf_fstorage + * @{ + * + * @brief API implementation of fstorage that uses the non-volatile memory controller (NVMC). +*/ + +#ifndef NRF_FSTORAGE_NVMC_H__ +#define NRF_FSTORAGE_NVMC_H__ + +#include "nrf_fstorage.h" + +#ifdef __cplusplus +extern "C" { +#endif + + +/**@brief API implementation that uses the non-volatile memory controller. + * + * @details An fstorage instance with this API implementation can be initialized by providing + * this structure as a parameter to @ref nrf_fstorage_init. + * The structure is defined in @c nrf_fstorage_nvmc.c. + */ +extern nrf_fstorage_api_t nrf_fstorage_nvmc; + + +#ifdef __cplusplus +} +#endif + +#endif // NRF_FSTORAGE_NVMC_H__ +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage_sd.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage_sd.c new file mode 100644 index 00000000000..ef5f6b82d28 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage_sd.c @@ -0,0 +1,624 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "sdk_common.h" + +#if NRF_MODULE_ENABLED(NRF_FSTORAGE) + +#include "nrf_fstorage_sd.h" +#include +#include +#include +#include "nordic_common.h" +#include "nrf_soc.h" +#include "nrf_sdh.h" +#include "nrf_sdh_soc.h" +#include "nrf_atomic.h" +#include "nrf_atfifo.h" +#include "app_util_platform.h" + + +#if (NRF_FSTORAGE_SD_MAX_WRITE_SIZE % 4) +#error NRF_FSTORAGE_SD_MAX_WRITE_SIZE must be a multiple of the word size. +#endif + + +/**@brief fstorage operation codes. */ +typedef enum +{ + NRF_FSTORAGE_OP_WRITE, //!< Write bytes to flash. + NRF_FSTORAGE_OP_ERASE //!< Erase flash pages. +} nrf_fstorage_sd_opcode_t; + +ANON_UNIONS_ENABLE; +/**@brief fstorage operation queue element. */ +typedef struct +{ + nrf_fstorage_t const * p_fs; //!< The fstorage instance that requested the operation. + nrf_fstorage_sd_opcode_t op_code; //!< Requested operation. + void * p_param; //!< User-defined parameter passed to the event handler. + union + { + struct + { + void const * p_src; //!< Data to be written to flash. + uint32_t dest; //!< Destination of the data in flash. + uint32_t len; //!< Length of the data to be written (in bytes). + uint32_t offset; //!< Write offset. + } write; + struct + { + uint32_t page; //!< Physical page number. + uint32_t progress; //!< Number of pages erased. + uint32_t pages_to_erase; //!< Total number of pages to erase. + } erase; + }; +} nrf_fstorage_sd_op_t; +ANON_UNIONS_DISABLE; + +typedef enum +{ + NRF_FSTORAGE_STATE_IDLE, //!< No operations requested to the SoftDevice. + NRF_FSTORAGE_STATE_OP_PENDING, //!< A non-fstorage operation is pending. + NRF_FSTORAGE_STATE_OP_EXECUTING, //!< An fstorage operation is executing. +} nrf_fstorage_sd_state_t; + +/**@brief Internal state. */ +typedef struct +{ + nrf_atomic_flag_t initialized; //!< fstorage is initalized. + nrf_atomic_flag_t queue_running; //!< The queue is running. + /** Prevent API calls from entering queue_process(). */ + nrf_fstorage_sd_state_t state; //!< Internal fstorage state. + uint32_t retries; //!< Number of times an operation has been retried on timeout. + bool sd_enabled; //!< The SoftDevice is enabled. + bool paused; //!< A SoftDevice state change is impending. + /** Do not load a new operation when the last one completes. */ +} nrf_fstorage_sd_work_t; + + +void nrf_fstorage_sys_evt_handler(uint32_t, void *); +bool nrf_fstorage_sdh_req_handler(nrf_sdh_req_evt_t, void *); +void nrf_fstorage_sdh_state_handler(nrf_sdh_state_evt_t, void *); + + +/* Flash device information. */ +static nrf_fstorage_info_t m_flash_info = +{ +#if defined(NRF51) + .erase_unit = 1024, +#elif defined(NRF52_SERIES) + .erase_unit = 4096, +#endif + .program_unit = 4, + .rmap = true, + .wmap = false, +}; + +/* Queue of fstorage operations. */ +NRF_ATFIFO_DEF(m_fifo, nrf_fstorage_sd_op_t, NRF_FSTORAGE_SD_QUEUE_SIZE); + +/* Define a nrf_sdh_soc event observer to receive SoftDevice system events. */ +NRF_SDH_SOC_OBSERVER(m_sys_obs, 0, nrf_fstorage_sys_evt_handler, NULL); + +/* nrf_sdh request observer. */ +NRF_SDH_REQUEST_OBSERVER(m_req_obs, 0) = +{ + .handler = nrf_fstorage_sdh_req_handler, +}; + +/* nrf_sdh state observer. */ +NRF_SDH_STATE_OBSERVER(m_state_obs, 0) = +{ + .handler = nrf_fstorage_sdh_state_handler, +}; + +static nrf_fstorage_sd_work_t m_flags; /* Internal status. */ +static nrf_fstorage_sd_op_t * m_p_cur_op; /* The current operation being executed. */ +static nrf_atfifo_item_get_t m_iget_ctx; /* Context for nrf_atfifo_item_get() and nrf_atfifo_item_free(). */ + + +/* Send events to the application. */ +static void event_send(nrf_fstorage_sd_op_t const * p_op, ret_code_t result) +{ + if (p_op->p_fs->evt_handler == NULL) + { + /* Nothing to do. */ + return; + } + + nrf_fstorage_evt_t evt = + { + .result = result, + .p_param = p_op->p_param, + }; + + switch (p_op->op_code) + { + case NRF_FSTORAGE_OP_WRITE: + evt.id = NRF_FSTORAGE_EVT_WRITE_RESULT; + evt.addr = p_op->write.dest; + evt.p_src = p_op->write.p_src; + evt.len = p_op->write.len; + break; + + case NRF_FSTORAGE_OP_ERASE: + evt.id = NRF_FSTORAGE_EVT_ERASE_RESULT; + evt.addr = (p_op->erase.page * m_flash_info.erase_unit); + evt.len = p_op->erase.pages_to_erase; + break; + + default: + /* Should not happen. */ + break; + } + + p_op->p_fs->evt_handler(&evt); +} + + +/* Write to flash. */ +static uint32_t write_execute(nrf_fstorage_sd_op_t const * p_op) +{ + uint32_t chunk_len; + + chunk_len = MIN(p_op->write.len - p_op->write.offset, NRF_FSTORAGE_SD_MAX_WRITE_SIZE); + chunk_len = MAX(1, chunk_len / m_flash_info.program_unit); + + /* Cast to p_src to uint32_t to perform arithmetic. */ + uint32_t * p_dest = (uint32_t*)(p_op->write.dest + p_op->write.offset); + uint32_t const * p_src = (uint32_t*)((uint32_t)p_op->write.p_src + p_op->write.offset); + + return sd_flash_write(p_dest, p_src, chunk_len); +} + + +/* Erase flash page(s). */ +static uint32_t erase_execute(nrf_fstorage_sd_op_t const * p_op) +{ + return sd_flash_page_erase(p_op->erase.page + p_op->erase.progress); +} + + +/* Free the current queue element. */ +static void queue_free(void) +{ + (void) nrf_atfifo_item_free(m_fifo, &m_iget_ctx); +} + + +/* Load a new operation from the queue. */ +static bool queue_load_next(void) +{ + m_p_cur_op = nrf_atfifo_item_get(m_fifo, &m_iget_ctx); + + return (m_p_cur_op != NULL); +} + + +/* Execute an operation in the queue. */ +static void queue_process(void) +{ + uint32_t rc; + + if (m_flags.state == NRF_FSTORAGE_STATE_IDLE) + { + if (!queue_load_next()) + { + /* No more operations, nothing to do. */ + m_flags.queue_running = false; + return; + } + } + + m_flags.state = NRF_FSTORAGE_STATE_OP_EXECUTING; + + switch (m_p_cur_op->op_code) + { + case NRF_FSTORAGE_OP_WRITE: + rc = write_execute(m_p_cur_op); + break; + + case NRF_FSTORAGE_OP_ERASE: + rc = erase_execute(m_p_cur_op); + break; + + default: + rc = NRF_ERROR_INTERNAL; + break; + } + + switch (rc) + { + case NRF_SUCCESS: + { + /* The operation was accepted by the SoftDevice. + * If the SoftDevice is enabled, wait for a system event. Otherwise, + * the SoftDevice call is synchronous and will not send an event so we simulate it. */ + if (!m_flags.sd_enabled) + { + nrf_fstorage_sys_evt_handler(NRF_EVT_FLASH_OPERATION_SUCCESS, NULL); + } + } break; + + case NRF_ERROR_BUSY: + { + /* The SoftDevice is executing a flash operation that was not requested by fstorage. + * Stop processing the queue until a system event is received. */ + m_flags.state = NRF_FSTORAGE_STATE_OP_PENDING; + } break; + + default: + { + /* An error has occurred. We cannot proceed further with this operation. */ + event_send(m_p_cur_op, NRF_ERROR_INTERNAL); + /* Reset the internal state so we can accept other operations. */ + m_flags.state = NRF_FSTORAGE_STATE_IDLE; + m_flags.queue_running = false; + /* Free the current queue element. */ + queue_free(); + } break; + } +} + + +/* Start processing the queue if it is not running and fstorage is not paused. */ +static void queue_start(void) +{ + if ( (!nrf_atomic_flag_set_fetch(&m_flags.queue_running)) + && (!m_flags.paused)) + { + queue_process(); + } +} + + +/* Flash operation success callback. Keeps track of the progress of an operation. */ +static bool on_operation_success(nrf_fstorage_sd_op_t * const p_op) +{ + /* Reset the retry counter on success. */ + m_flags.retries = 0; + + switch (p_op->op_code) + { + case NRF_FSTORAGE_OP_WRITE: + { + /* Update the offset only if the operation is successful + * so that it can be retried in case it times out. */ + uint32_t const chunk_len = MIN(p_op->write.len - p_op->write.offset, + NRF_FSTORAGE_SD_MAX_WRITE_SIZE); + + p_op->write.offset += chunk_len; + + if (p_op->write.offset == p_op->write.len) + { + return true; + } + } break; + + case NRF_FSTORAGE_OP_ERASE: + { + p_op->erase.progress++; + + if (p_op->erase.progress == p_op->erase.pages_to_erase) + { + return true; + } + } break; + + default: + /* Should not happen. */ + break; + } + + return false; +} + + +/* Flash operation failure callback. */ +static bool on_operation_failure(nrf_fstorage_sd_op_t const * p_op) +{ + UNUSED_PARAMETER(p_op); + + m_flags.retries++; + + if (m_flags.retries > NRF_FSTORAGE_SD_MAX_RETRIES) + { + /* Maximum amount of retries reached. Give up. */ + m_flags.retries = 0; + return true; + } + + return false; +} + + +static ret_code_t init(nrf_fstorage_t * p_fs, void * p_param) +{ + UNUSED_PARAMETER(p_param); + + p_fs->p_flash_info = &m_flash_info; + + if (!nrf_atomic_flag_set_fetch(&m_flags.initialized)) + { +#if NRF_SDH_ENABLED + m_flags.sd_enabled = nrf_sdh_is_enabled(); +#endif + (void) NRF_ATFIFO_INIT(m_fifo); + } + + return NRF_SUCCESS; +} + + +static ret_code_t uninit(nrf_fstorage_t * p_fs, void * p_param) +{ + UNUSED_PARAMETER(p_fs); + UNUSED_PARAMETER(p_param); + + /* The state is re-initialized upon init(). + * The common uninitialization code is run by the caller. */ + + memset(&m_flags, 0x00, sizeof(m_flags)); + + (void) nrf_atfifo_clear(m_fifo); + + return NRF_SUCCESS; +} + + +static ret_code_t write(nrf_fstorage_t const * p_fs, + uint32_t dest, + void const * p_src, + uint32_t len, + void * p_param) +{ + nrf_fstorage_sd_op_t * p_op; + nrf_atfifo_item_put_t iput_ctx; + + /* Get a free queue element. */ + p_op = nrf_atfifo_item_alloc(m_fifo, &iput_ctx); + + if (p_op == NULL) + { + return NRF_ERROR_NO_MEM; + } + + /* Initialize the operation. */ + memset(p_op, 0x00, sizeof(nrf_fstorage_sd_op_t)); + + p_op->op_code = NRF_FSTORAGE_OP_WRITE; + p_op->p_fs = p_fs; + p_op->p_param = p_param; + p_op->write.dest = dest; + p_op->write.p_src = p_src; + p_op->write.len = len; + + /* Put the operation on the queue. */ + (void) nrf_atfifo_item_put(m_fifo, &iput_ctx); + + queue_start(); + + return NRF_SUCCESS; +} + + +static ret_code_t read(nrf_fstorage_t const * p_fs, uint32_t src, void * p_dest, uint32_t len) +{ + memcpy(p_dest, (uint32_t*)src, len); + + return NRF_SUCCESS; +} + + +static ret_code_t erase(nrf_fstorage_t const * p_fs, + uint32_t page_addr, + uint32_t len, + void * p_param) +{ + nrf_fstorage_sd_op_t * p_op; + nrf_atfifo_item_put_t iput_ctx; + + /* Get a free queue element. */ + p_op = nrf_atfifo_item_alloc(m_fifo, &iput_ctx); + + if (p_op == NULL) + { + return NRF_ERROR_NO_MEM; + } + + /* Initialize the operation. */ + memset(p_op, 0x00, sizeof(nrf_fstorage_sd_op_t)); + + p_op->op_code = NRF_FSTORAGE_OP_ERASE; + p_op->p_fs = p_fs; + p_op->p_param = p_param; + p_op->erase.page = (page_addr / m_flash_info.erase_unit); + p_op->erase.pages_to_erase = len; + + /* Put the operation on the queue. */ + (void) nrf_atfifo_item_put(m_fifo, &iput_ctx); + + queue_start(); + + return NRF_SUCCESS; +} + + +static uint8_t const * rmap(nrf_fstorage_t const * p_fs, uint32_t addr) +{ + UNUSED_PARAMETER(p_fs); + + return (uint8_t*)addr; +} + + +static uint8_t * wmap(nrf_fstorage_t const * p_fs, uint32_t addr) +{ + UNUSED_PARAMETER(p_fs); + UNUSED_PARAMETER(addr); + + /* Not supported. */ + return NULL; +} + + +static bool is_busy(nrf_fstorage_t const * p_fs) +{ + UNUSED_PARAMETER(p_fs); + + return (m_flags.state != NRF_FSTORAGE_STATE_IDLE); +} + + +void nrf_fstorage_sys_evt_handler(uint32_t sys_evt, void * p_context) +{ + UNUSED_PARAMETER(p_context); + + if ( (sys_evt != NRF_EVT_FLASH_OPERATION_SUCCESS) + && (sys_evt != NRF_EVT_FLASH_OPERATION_ERROR)) + { + /* Ignore any non-flash events. */ + return; + } + + switch (m_flags.state) + { + case NRF_FSTORAGE_STATE_IDLE: + /* Ignore flash events if no flash operation was requested. */ + return; + + case NRF_FSTORAGE_STATE_OP_PENDING: + /* The SoftDevice has completed a flash operation that was not requested by fstorage. + * It should be possible to request an operation now. + * Process the queue at the end of this function. */ + break; + + case NRF_FSTORAGE_STATE_OP_EXECUTING: + { + /* Handle the result of a flash operation initiated by this module. */ + bool operation_finished = false; + + switch (sys_evt) + { + case NRF_EVT_FLASH_OPERATION_SUCCESS: + operation_finished = on_operation_success(m_p_cur_op); + break; + + case NRF_EVT_FLASH_OPERATION_ERROR: + operation_finished = on_operation_failure(m_p_cur_op); + break; + + default: + break; + } + + if (operation_finished) + { + /* The operation has finished. Change state to NRF_FSTORAGE_STATE_IDLE + * so that queue_process() will fetch a new operation from the queue. */ + m_flags.state = NRF_FSTORAGE_STATE_IDLE; + + event_send(m_p_cur_op, (sys_evt == NRF_EVT_FLASH_OPERATION_SUCCESS) ? + NRF_SUCCESS : NRF_ERROR_TIMEOUT); + + /* Free the queue element after sending out the event to prevent API calls made + * in the event context to queue elements indefinitely, without this function + * ever returning in case the SoftDevice calls are synchronous. */ + queue_free(); + } + } break; + } + + if (!m_flags.paused) + { + queue_process(); + } + else + { + /* A flash operation has completed. Let the SoftDevice change state. */ + (void) nrf_sdh_request_continue(); + } +} + + +bool nrf_fstorage_sdh_req_handler(nrf_sdh_req_evt_t req, void * p_context) +{ + UNUSED_PARAMETER(req); + UNUSED_PARAMETER(p_context); + + m_flags.paused = true; + + /* If there are any operations ongoing, pause the SoftDevice state change. */ + return (m_flags.state == NRF_FSTORAGE_STATE_IDLE); +} + + +void nrf_fstorage_sdh_state_handler(nrf_sdh_state_evt_t state, void * p_context) +{ + UNUSED_PARAMETER(p_context); + + if ( (state == NRF_SDH_EVT_STATE_ENABLED) + || (state == NRF_SDH_EVT_STATE_DISABLED)) + { + m_flags.paused = false; + m_flags.sd_enabled = (state == NRF_SDH_EVT_STATE_ENABLED); + + /* Execute any operations still in the queue. */ + queue_process(); + } +} + + +/* Exported API implementation. */ +nrf_fstorage_api_t nrf_fstorage_sd = +{ + .init = init, + .uninit = uninit, + .read = read, + .write = write, + .erase = erase, + .rmap = rmap, + .wmap = wmap, + .is_busy = is_busy +}; + + +#endif // NRF_FSTORAGE_ENABLED diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage_sd.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage_sd.h new file mode 100644 index 00000000000..b35d15fe4ec --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage_sd.h @@ -0,0 +1,75 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/** + * @file + * + * @defgroup nrf_fstorage_sd SoftDevice implementation + * @ingroup nrf_fstorage + * @{ + * + * @brief API implementation of fstorage that uses the SoftDevice. +*/ + +#ifndef NRF_FSTORAGE_SD_H__ +#define NRF_FSTORAGE_SD_H__ + +#include "nrf_fstorage.h" + +#ifdef __cplusplus +extern "C" { +#endif + + +/**@brief API implementation that uses the SoftDevice. + * + * @details An fstorage instance with this API implementation can be initialized by providing + * this structure as a parameter to @ref nrf_fstorage_init. + * The structure is defined in @c nrf_fstorage_sd.c. + */ +extern nrf_fstorage_api_t nrf_fstorage_sd; + + +#ifdef __cplusplus +} +#endif + +#endif // NRF_FSTORAGE_SD_H__ +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/spi_mngr/nrf_spi_mngr.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/spi_mngr/nrf_spi_mngr.c new file mode 100644 index 00000000000..b66dfbb3d3c --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/spi_mngr/nrf_spi_mngr.c @@ -0,0 +1,348 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "sdk_common.h" + +#if NRF_MODULE_ENABLED(NRF_SPI_MNGR) +#include "nrf_spi_mngr.h" +#include "nrf_assert.h" +#include "app_util_platform.h" + +typedef volatile struct +{ + bool transaction_in_progress; + uint8_t transaction_result; +} nrf_spi_mngr_cb_data_t; + +static ret_code_t start_transfer(nrf_spi_mngr_t const * p_nrf_spi_mngr) +{ + ASSERT(p_nrf_spi_mngr != NULL); + + // use a local variable to avoid using two volatile variables in one + // expression + uint8_t curr_transfer_idx = p_nrf_spi_mngr->p_nrf_spi_mngr_cb->current_transfer_idx; + nrf_spi_mngr_transfer_t const * p_transfer = + &p_nrf_spi_mngr->p_nrf_spi_mngr_cb->p_current_transaction->p_transfers[curr_transfer_idx]; + + return nrf_drv_spi_transfer(&p_nrf_spi_mngr->spi, + p_transfer->p_tx_data, p_transfer->tx_length, + p_transfer->p_rx_data, p_transfer->rx_length); +} + + +static void transaction_begin_signal(nrf_spi_mngr_t const * p_nrf_spi_mngr) +{ + ASSERT(p_nrf_spi_mngr != NULL); + + nrf_spi_mngr_transaction_t const * p_current_transaction = + p_nrf_spi_mngr->p_nrf_spi_mngr_cb->p_current_transaction; + + + if (p_current_transaction->begin_callback != NULL) + { + void * p_user_data = p_current_transaction->p_user_data; + p_current_transaction->begin_callback(p_user_data); + } +} + + +static void transaction_end_signal(nrf_spi_mngr_t const * p_nrf_spi_mngr, + ret_code_t result) +{ + ASSERT(p_nrf_spi_mngr != NULL); + + nrf_spi_mngr_transaction_t const * p_current_transaction = + p_nrf_spi_mngr->p_nrf_spi_mngr_cb->p_current_transaction; + + if (p_current_transaction->end_callback != NULL) + { + void * p_user_data = p_current_transaction->p_user_data; + p_current_transaction->end_callback(result, p_user_data); + } +} + + +static void spi_event_handler(nrf_drv_spi_evt_t const * p_event, + void * p_context); + + +// This function starts pending transaction if there is no current one or +// when 'switch_transaction' parameter is set to true. It is important to +// switch to new transaction without setting 'p_nrf_spi_mngr->p_curr_transaction' +// to NULL in between, since this pointer is used to check idle status - see +// 'nrf_spi_mngr_is_idle()'. +static void start_pending_transaction(nrf_spi_mngr_t const * p_nrf_spi_mngr, + bool switch_transaction) +{ + ASSERT(p_nrf_spi_mngr != NULL); + + while (1) + { + bool start_transaction = false; + nrf_spi_mngr_cb_t * p_cb = p_nrf_spi_mngr->p_nrf_spi_mngr_cb; + + CRITICAL_REGION_ENTER(); + if (switch_transaction || nrf_spi_mngr_is_idle(p_nrf_spi_mngr)) + { + if (nrf_queue_pop(p_nrf_spi_mngr->p_queue, + (void *)(&p_cb->p_current_transaction)) + == NRF_SUCCESS) + { + start_transaction = true; + } + else + { + p_cb->p_current_transaction = NULL; + } + } + CRITICAL_REGION_EXIT(); + + if (!start_transaction) + { + return; + } + + nrf_drv_spi_config_t const * p_instance_cfg; + if (p_cb->p_current_transaction->p_required_spi_cfg == NULL) + { + p_instance_cfg = &p_cb->default_configuration; + } + else + { + p_instance_cfg = p_cb->p_current_transaction->p_required_spi_cfg; + } + + ret_code_t result; + + if (memcmp(p_cb->p_current_configuration, p_instance_cfg, sizeof(*p_instance_cfg)) != 0) + { + nrf_drv_spi_uninit(&p_nrf_spi_mngr->spi); + result = nrf_drv_spi_init(&p_nrf_spi_mngr->spi, + p_instance_cfg, + spi_event_handler, + (void *)p_nrf_spi_mngr); + ASSERT(result == NRF_SUCCESS); + p_cb->p_current_configuration = p_instance_cfg; + } + + // Try to start first transfer for this new transaction. + p_cb->current_transfer_idx = 0; + + // Execute user code if available before starting transaction + transaction_begin_signal(p_nrf_spi_mngr); + result = start_transfer(p_nrf_spi_mngr); + + // If transaction started successfully there is nothing more to do here now. + if (result == NRF_SUCCESS) + { + return; + } + + // Transfer failed to start - notify user that this transaction + // cannot be started and try with next one (in next iteration of + // the loop). + transaction_end_signal(p_nrf_spi_mngr, result); + + switch_transaction = true; + } +} + + +// This function shall be called to handle SPI events. It shall be mainly used by SPI IRQ for +// finished tranfer. +static void spi_event_handler(nrf_drv_spi_evt_t const * p_event, + void * p_context) +{ + ASSERT(p_event != NULL); + ASSERT(p_context != NULL); + + ret_code_t result; + nrf_spi_mngr_cb_t * p_cb = ((nrf_spi_mngr_t const *)p_context)->p_nrf_spi_mngr_cb; + + // This callback should be called only during transaction. + ASSERT(p_cb->p_current_transaction != NULL); + + if (p_event->type == NRF_DRV_SPI_EVENT_DONE) + { + result = NRF_SUCCESS; + + // Transfer finished successfully. If there is another one to be + // performed in the current transaction, start it now. + // use a local variable to avoid using two volatile variables in one + // expression + uint8_t curr_transfer_idx = p_cb->current_transfer_idx; + ++curr_transfer_idx; + if (curr_transfer_idx < p_cb->p_current_transaction->number_of_transfers) + { + p_cb->current_transfer_idx = curr_transfer_idx; + + result = start_transfer(((nrf_spi_mngr_t const *)p_context)); + + if (result == NRF_SUCCESS) + { + // The current transaction is running and its next transfer + // has been successfully started. There is nothing more to do. + return; + } + // if the next transfer could not be started due to some error + // we finish the transaction with this error code as the result + } + } + else + { + result = NRF_ERROR_INTERNAL; + } + + // The current transaction has been completed or interrupted by some error. + // Notify the user and start next one (if there is any). + transaction_end_signal(((nrf_spi_mngr_t const *)p_context), result); + // we switch transactions here ('p_nrf_spi_mngr->p_current_transaction' is set + // to NULL only if there is nothing more to do) in order to not generate + // spurious idle status (even for a moment) + start_pending_transaction(((nrf_spi_mngr_t const *)p_context), true); +} + + +ret_code_t nrf_spi_mngr_init(nrf_spi_mngr_t const * p_nrf_spi_mngr, + nrf_drv_spi_config_t const * p_default_spi_config) +{ + ASSERT(p_nrf_spi_mngr != NULL); + ASSERT(p_nrf_spi_mngr->p_queue != NULL); + ASSERT(p_nrf_spi_mngr->p_queue->size > 0); + ASSERT(p_default_spi_config != NULL); + + ret_code_t err_code; + + err_code = nrf_drv_spi_init(&p_nrf_spi_mngr->spi, + p_default_spi_config, + spi_event_handler, + (void *)p_nrf_spi_mngr); + + if (err_code == NRF_SUCCESS) + { + nrf_spi_mngr_cb_t * p_cb = p_nrf_spi_mngr->p_nrf_spi_mngr_cb; + + p_cb->p_current_transaction = NULL; + p_cb->default_configuration = *p_default_spi_config; + p_cb->p_current_configuration = &p_cb->default_configuration; + } + + return err_code; +} + + +void nrf_spi_mngr_uninit(nrf_spi_mngr_t const * p_nrf_spi_mngr) +{ + ASSERT(p_nrf_spi_mngr != NULL); + + nrf_drv_spi_uninit(&p_nrf_spi_mngr->spi); + + p_nrf_spi_mngr->p_nrf_spi_mngr_cb->p_current_transaction = NULL; +} + + +ret_code_t nrf_spi_mngr_schedule(nrf_spi_mngr_t const * p_nrf_spi_mngr, + nrf_spi_mngr_transaction_t const * p_transaction) +{ + ASSERT(p_nrf_spi_mngr != NULL); + ASSERT(p_transaction != NULL); + ASSERT(p_transaction->p_transfers != NULL); + ASSERT(p_transaction->number_of_transfers != 0); + + ret_code_t result = nrf_queue_push(p_nrf_spi_mngr->p_queue, (void *)(&p_transaction)); + if (result == NRF_SUCCESS) + { + // New transaction has been successfully added to queue, + // so if we are currently idle it's time to start the job. + start_pending_transaction(p_nrf_spi_mngr, false); + } + + return result; +} + + +static void spi_internal_transaction_cb(ret_code_t result, void * p_user_data) +{ + nrf_spi_mngr_cb_data_t * p_cb_data = (nrf_spi_mngr_cb_data_t *)p_user_data; + + p_cb_data->transaction_result = result; + p_cb_data->transaction_in_progress = false; +} + +ret_code_t nrf_spi_mngr_perform(nrf_spi_mngr_t const * p_nrf_spi_mngr, + nrf_drv_spi_config_t const * p_config, + nrf_spi_mngr_transfer_t const * p_transfers, + uint8_t number_of_transfers, + void (* user_function)(void)) +{ + ASSERT(p_nrf_spi_mngr != NULL); + ASSERT(p_transfers != NULL); + ASSERT(number_of_transfers != 0); + + nrf_spi_mngr_cb_data_t cb_data = + { + .transaction_in_progress = true + }; + + nrf_spi_mngr_transaction_t internal_transaction = + { + .begin_callback = NULL, + .end_callback = spi_internal_transaction_cb, + .p_user_data = (void *)&cb_data, + .p_transfers = p_transfers, + .number_of_transfers = number_of_transfers, + .p_required_spi_cfg = p_config + }; + + ret_code_t result = nrf_spi_mngr_schedule(p_nrf_spi_mngr, &internal_transaction); + VERIFY_SUCCESS(result); + + while (cb_data.transaction_in_progress) + { + if (user_function) + { + user_function(); + } + } + + return cb_data.transaction_result; +} + +#endif //NRF_MODULE_ENABLED(NRF_SPI_MNGR) + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/spi_mngr/nrf_spi_mngr.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/spi_mngr/nrf_spi_mngr.h new file mode 100644 index 00000000000..434c9503591 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/spi_mngr/nrf_spi_mngr.h @@ -0,0 +1,310 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_SPI_MNGR_H__ +#define NRF_SPI_MNGR_H__ + +#include +#include "nrf_drv_spi.h" +#include "sdk_errors.h" +#include "nrf_queue.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/*lint -save -e491*/ +#ifndef NRF_SPI_MNGR_BUFFERS_IN_RAM + #define NRF_SPI_MNGR_BUFFERS_IN_RAM defined(SPIM_PRESENT) +#endif + +#if NRF_SPI_MNGR_BUFFERS_IN_RAM + #define NRF_SPI_MNGR_BUFFER_LOC_IND +#else + #define NRF_SPI_MNGR_BUFFER_LOC_IND const +#endif +/*lint -restore*/ + +/** + * @defgroup nrf_spi_mngr SPI transaction manager + * @{ + * @ingroup app_common + * + * @brief Module for scheduling SPI transactions. + */ + + +/** + * @brief Macro for creating a simple SPI transfer. + * + * @param[in] _p_tx_data Pointer to the data to be sent. + * @param[in] _tx_length Number of bytes to send. + * @param[in] _p_rx_data Pointer to a buffer for received data. + * @param[in] _rx_length Number of bytes to receive. + */ +#define NRF_SPI_MNGR_TRANSFER(_p_tx_data, _tx_length, _p_rx_data, _rx_length) \ +{ \ + .p_tx_data = (uint8_t const *)_p_tx_data, \ + .tx_length = (uint8_t) _tx_length, \ + .p_rx_data = (uint8_t *) _p_rx_data, \ + .rx_length = (uint8_t) _rx_length, \ +} + + +/** + * @brief SPI transaction end callback prototype. + * + * @param result Result of operation (NRF_SUCCESS on success, + * otherwise a relevant error code). + * @param[in] p_user_data Pointer to user data defined in transaction + * descriptor. + */ +typedef void (* nrf_spi_mngr_callback_end_t)(ret_code_t result, void * p_user_data); + +/** + * @brief SPI transaction begin callback prototype. + * + * @param[in] p_user_data Pointer to user data defined in transaction + * descriptor. + */ +typedef void (* nrf_spi_mngr_callback_begin_t)(void * p_user_data); + + +/** + * @brief SPI transfer descriptor. + */ +typedef struct +{ + uint8_t const * p_tx_data; ///< Pointer to the data to be sent. + uint8_t tx_length; ///< Number of bytes to send. + uint8_t * p_rx_data; ///< Pointer to a buffer for received data. + uint8_t rx_length; ///< Number of bytes to receive. +} nrf_spi_mngr_transfer_t; + + +/** + * @brief SPI transaction descriptor. + */ +typedef struct +{ + nrf_spi_mngr_callback_begin_t begin_callback; + ///< User-specified function to be called before the transaction is started. + + nrf_spi_mngr_callback_end_t end_callback; + ///< User-specified function to be called after the transaction is finished. + + void * p_user_data; + ///< Pointer to user data to be passed to the end_callback. + + nrf_spi_mngr_transfer_t const * p_transfers; + ///< Pointer to the array of transfers that make up the transaction. + + uint8_t number_of_transfers; + ///< Number of transfers that make up the transaction. + + nrf_drv_spi_config_t const * p_required_spi_cfg; + ///< Pointer to instance hardware configuration. +} nrf_spi_mngr_transaction_t; + + +/** + * @brief SPI instance control block. + */ +typedef struct +{ + nrf_spi_mngr_transaction_t const * volatile p_current_transaction; + ///< Currently realized transaction. + + nrf_drv_spi_config_t default_configuration; + ///< Default hardware configuration. + + nrf_drv_spi_config_t const * p_current_configuration; + ///< Pointer to current hardware configuration. + + uint8_t volatile current_transfer_idx; + ///< Index of currently performed transfer (within current transaction). +} nrf_spi_mngr_cb_t; + + +/** + * @brief SPI transaction manager instance. + */ +typedef struct +{ + nrf_spi_mngr_cb_t * p_nrf_spi_mngr_cb; + ///< Control block of instance. + + nrf_queue_t const * p_queue; + ///< Transaction queue. + + nrf_drv_spi_t spi; + ///< Pointer to SPI master driver instance. +} nrf_spi_mngr_t; + + +/** + * @brief Macro for simplifying the defining of an SPI transaction manager + * instance. + * + * This macro allocates a static buffer for the transaction queue. + * Therefore, it should be used in only one place in the code for a given + * instance. + * + * @note The queue size is the maximum number of pending transactions + * not counting the one that is currently realized. This means that + * for an empty queue with size of for example 4 elements, it is + * possible to schedule up to 5 transactions. + * + * @param[in] _nrf_spi_mngr_name Name of instance to be created. + * @param[in] _queue_size Size of the transaction queue (maximum number + * of pending transactions). + * @param[in] _spi_idx Index of hardware SPI instance to be used. + */ +#define NRF_SPI_MNGR_DEF(_nrf_spi_mngr_name, _queue_size, _spi_idx) \ + NRF_QUEUE_DEF(nrf_spi_mngr_transaction_t const *, \ + _nrf_spi_mngr_name##_queue, \ + (_queue_size), \ + NRF_QUEUE_MODE_NO_OVERFLOW); \ + static nrf_spi_mngr_cb_t CONCAT_2(_nrf_spi_mngr_name, _cb); \ + static const nrf_spi_mngr_t _nrf_spi_mngr_name = \ + { \ + .p_nrf_spi_mngr_cb = &CONCAT_2(_nrf_spi_mngr_name, _cb), \ + .p_queue = &_nrf_spi_mngr_name##_queue, \ + .spi = NRF_DRV_SPI_INSTANCE(_spi_idx) \ + } + + + /** + * @brief Function for initializing an SPI transaction manager instance. + * + * @param[in] p_nrf_spi_mngr Pointer to the instance to be initialized. + * @param[in] p_default_spi_config Pointer to the SPI driver configuration. This configuration + * will be used whenever the scheduled transaction will have + * p_spi_config set to NULL value. + * + * @return Values returned by the @ref nrf_drv_spi_init function. + */ +ret_code_t nrf_spi_mngr_init(nrf_spi_mngr_t const * p_nrf_spi_mngr, + nrf_drv_spi_config_t const * p_default_spi_config); + + +/** + * @brief Function for uninitializing an SPI transaction manager instance. + * + * @param[in] p_nrf_spi_mngr Pointer to the instance to be uninitialized. + */ +void nrf_spi_mngr_uninit(nrf_spi_mngr_t const * p_nrf_spi_mngr); + + +/** + * @brief Function for scheduling an SPI transaction. + * + * The transaction is enqueued and started as soon as the SPI bus is + * available, thus when all previously scheduled transactions have been + * finished (possibly immediately). + * + * @note If @ref nrf_spi_mngr_transaction_t::p_required_spi_cfg + * is set to a non-NULL value the module will compare it with + * @ref nrf_spi_mngr_cb_t::p_current_configuration and reinitialize hardware + * SPI instance with new parameters if any differences are found. + * If @ref nrf_spi_mngr_transaction_t::p_required_spi_cfg is set to NULL then + * it will treat it as it would be set to @ref nrf_spi_mngr_cb_t::default_configuration. + * + * @param[in] p_nrf_spi_mngr Pointer to the SPI transaction manager instance. + * @param[in] p_transaction Pointer to the descriptor of the transaction to be + * scheduled. + * + * @retval NRF_SUCCESS If the transaction has been successfully scheduled. + * @retval NRF_ERROR_NO_MEM If the queue is full (Only if queue in + * @ref NRF_QUEUE_MODE_NO_OVERFLOW). + */ +ret_code_t nrf_spi_mngr_schedule(nrf_spi_mngr_t const * p_nrf_spi_mngr, + nrf_spi_mngr_transaction_t const * p_transaction); + + +/** + * @brief Function for scheduling a transaction and waiting until it is finished. + * + * This function schedules a transaction that consists of one or more transfers + * and waits until it is finished. + * + * @param[in] p_nrf_spi_mngr Pointer to the SPI transaction manager instance. + * @param[in] p_config Required SPI configuration. + * @param[in] p_transfers Pointer to an array of transfers to be performed. + * @param number_of_transfers Number of transfers to be performed. + * @param user_function User-specified function to be called while + * waiting. NULL if such functionality + * is not needed. + * + * @retval NRF_SUCCESS If the transfers have been successfully realized. + * @retval NRF_ERROR_BUSY If some transfers are already being performed. + * @retval - Other error codes mean that the transaction has failed + * with the error reported by @ref nrf_drv_spi_transfer(). + */ +ret_code_t nrf_spi_mngr_perform(nrf_spi_mngr_t const * p_nrf_spi_mngr, + nrf_drv_spi_config_t const * p_config, + nrf_spi_mngr_transfer_t const * p_transfers, + uint8_t number_of_transfers, + void (* user_function)(void)); + + +/** + * @brief Function for getting the current state of an SPI transaction manager + * instance. + * + * @param[in] p_nrf_spi_mngr Pointer to the SPI transaction manager instance. + * + * @retval true If all scheduled transactions have been finished. + * @retval false Otherwise. + */ +__STATIC_INLINE bool nrf_spi_mngr_is_idle(nrf_spi_mngr_t const * p_nrf_spi_mngr) +{ + return (p_nrf_spi_mngr->p_nrf_spi_mngr_cb->p_current_transaction == NULL); +} + +/** + *@} + **/ +//typedef int p_current_transaction; + +#ifdef __cplusplus +} +#endif + +#endif // NRF_SPI_MNGR_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/strerror/nrf_strerror.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/strerror/nrf_strerror.c new file mode 100644 index 00000000000..81a514dce7c --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/strerror/nrf_strerror.c @@ -0,0 +1,164 @@ +/** + * Copyright (c) 2011 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "sdk_common.h" +#if NRF_MODULE_ENABLED(NRF_STRERROR) +#include "nrf_strerror.h" +#include "sdk_errors.h" + +// #define NRF_ERROR_MODULE_NOT_INITIALZED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0000) + +/** + * @brief Macro for adding an entity to the description array. + * + * Macro that helps to create a single entity in the description array. + */ +#define NRF_STRERROR_ENTITY(mnemonic) {.code = mnemonic, .name = #mnemonic} + +/** + * @brief Array entity element that describes an error. + */ +typedef struct +{ + ret_code_t code; /**< Error code. */ + char const * name; /**< Descriptive name (the same as the internal error mnemonic). */ +}nrf_strerror_desc_t; + +/** + * @brief Unknown error code. + * + * The constant string used by @ref nrf_strerror_get when the error description was not found. + */ +static char const m_unknown_str[] = "Unknown error code"; + +/** + * @brief Array with error codes. + * + * Array that describes error codes. + * + * @note It is required for this array to have error codes placed in ascending order. + * This condition is checked in automatic unit test before the release. + */ +static nrf_strerror_desc_t const nrf_strerror_array[] = +{ + NRF_STRERROR_ENTITY(NRF_SUCCESS), + NRF_STRERROR_ENTITY(NRF_ERROR_SVC_HANDLER_MISSING), + NRF_STRERROR_ENTITY(NRF_ERROR_SOFTDEVICE_NOT_ENABLED), + NRF_STRERROR_ENTITY(NRF_ERROR_INTERNAL), + NRF_STRERROR_ENTITY(NRF_ERROR_NO_MEM), + NRF_STRERROR_ENTITY(NRF_ERROR_NOT_FOUND), + NRF_STRERROR_ENTITY(NRF_ERROR_NOT_SUPPORTED), + NRF_STRERROR_ENTITY(NRF_ERROR_INVALID_PARAM), + NRF_STRERROR_ENTITY(NRF_ERROR_INVALID_STATE), + NRF_STRERROR_ENTITY(NRF_ERROR_INVALID_LENGTH), + NRF_STRERROR_ENTITY(NRF_ERROR_INVALID_FLAGS), + NRF_STRERROR_ENTITY(NRF_ERROR_INVALID_DATA), + NRF_STRERROR_ENTITY(NRF_ERROR_DATA_SIZE), + NRF_STRERROR_ENTITY(NRF_ERROR_TIMEOUT), + NRF_STRERROR_ENTITY(NRF_ERROR_NULL), + NRF_STRERROR_ENTITY(NRF_ERROR_FORBIDDEN), + NRF_STRERROR_ENTITY(NRF_ERROR_INVALID_ADDR), + NRF_STRERROR_ENTITY(NRF_ERROR_BUSY), +#ifdef NRF_ERROR_CONN_COUNT + NRF_STRERROR_ENTITY(NRF_ERROR_CONN_COUNT), +#endif +#ifdef NRF_ERROR_RESOURCES + NRF_STRERROR_ENTITY(NRF_ERROR_RESOURCES), +#endif + + /* SDK Common errors */ + NRF_STRERROR_ENTITY(NRF_ERROR_MODULE_NOT_INITIALIZED), + NRF_STRERROR_ENTITY(NRF_ERROR_MUTEX_INIT_FAILED), + NRF_STRERROR_ENTITY(NRF_ERROR_MUTEX_LOCK_FAILED), + NRF_STRERROR_ENTITY(NRF_ERROR_MUTEX_UNLOCK_FAILED), + NRF_STRERROR_ENTITY(NRF_ERROR_MUTEX_COND_INIT_FAILED), + NRF_STRERROR_ENTITY(NRF_ERROR_MODULE_ALREADY_INITIALIZED), + NRF_STRERROR_ENTITY(NRF_ERROR_STORAGE_FULL), + NRF_STRERROR_ENTITY(NRF_ERROR_API_NOT_IMPLEMENTED), + NRF_STRERROR_ENTITY(NRF_ERROR_FEATURE_NOT_ENABLED), + NRF_STRERROR_ENTITY(NRF_ERROR_IO_PENDING), + + /* TWI error codes */ + NRF_STRERROR_ENTITY(NRF_ERROR_DRV_TWI_ERR_OVERRUN), + NRF_STRERROR_ENTITY(NRF_ERROR_DRV_TWI_ERR_ANACK), + NRF_STRERROR_ENTITY(NRF_ERROR_DRV_TWI_ERR_DNACK), + + /* IPSP error codes */ + NRF_STRERROR_ENTITY(NRF_ERROR_BLE_IPSP_RX_PKT_TRUNCATED), + NRF_STRERROR_ENTITY(NRF_ERROR_BLE_IPSP_CHANNEL_ALREADY_EXISTS), + NRF_STRERROR_ENTITY(NRF_ERROR_BLE_IPSP_LINK_DISCONNECTED), + NRF_STRERROR_ENTITY(NRF_ERROR_BLE_IPSP_PEER_REJECTED) +}; + + +char const * nrf_strerror_get(ret_code_t code) +{ + char const * p_ret = nrf_strerror_find(code); + return (p_ret == NULL) ? m_unknown_str : p_ret; +} + +char const * nrf_strerror_find(ret_code_t code) +{ + nrf_strerror_desc_t const * p_start; + nrf_strerror_desc_t const * p_end; + p_start = nrf_strerror_array; + p_end = nrf_strerror_array + ARRAY_SIZE(nrf_strerror_array); + + while (p_start < p_end) + { + nrf_strerror_desc_t const * p_mid = p_start + ((p_end - p_start) / 2); + ret_code_t mid_c = p_mid->code; + if (mid_c > code) + { + p_end = p_mid; + } + else if (mid_c < code) + { + p_start = p_mid + 1; + } + else + { + return p_mid->name; + } + } + return NULL; +} + +#endif /* NRF_STRERROR enabled */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/strerror/nrf_strerror.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/strerror/nrf_strerror.h new file mode 100644 index 00000000000..1a6542bcbf5 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/strerror/nrf_strerror.h @@ -0,0 +1,89 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/** + * @defgroup nrf_strerror Error code to string converter + * @ingroup app_common + * + * @brief Module for converting error code into a printable string. + * @{ + */ +#ifndef NRF_STRERROR_H__ +#define NRF_STRERROR_H__ + +#include "sdk_errors.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Function for getting a printable error string. + * + * @param code Error code to convert. + * + * @note This function cannot fail. + * For the function that may fail with error translation, see @ref nrf_strerror_find. + * + * @return Pointer to the printable string. + * If the string is not found, + * it returns a simple string that says that the error is unknown. + */ +char const * nrf_strerror_get(ret_code_t code); + +/** + * @brief Function for finding a printable error string. + * + * This function gets the error string in the same way as @ref nrf_strerror_get, + * but if the string is not found, it returns NULL. + * + * @param code Error code to convert. + * @return Pointer to the printable string. + * If the string is not found, NULL is returned. + */ +char const * nrf_strerror_find(ret_code_t code); + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_STRERROR_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/twi_mngr/nrf_twi_mngr.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/twi_mngr/nrf_twi_mngr.c new file mode 100644 index 00000000000..56a14e5fc00 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/twi_mngr/nrf_twi_mngr.c @@ -0,0 +1,366 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "sdk_common.h" +#if NRF_MODULE_ENABLED(NRF_TWI_MNGR) +#include "nrf_twi_mngr.h" +#include "nrf_assert.h" +#include "app_util_platform.h" + +typedef volatile struct +{ + bool transaction_in_progress; + uint8_t transaction_result; +} nrf_twi_mngr_cb_data_t; + + +static ret_code_t start_transfer(nrf_twi_mngr_t const * p_nrf_twi_mngr) +{ + ASSERT(p_nrf_twi_mngr != NULL); + + // Pointer for cleaner code. + nrf_twi_mngr_cb_t * p_cb = p_nrf_twi_mngr->p_nrf_twi_mngr_cb; + + // [use a local variable to avoid using two volatile variables in one + // expression] + uint8_t current_transfer_idx = p_cb->current_transfer_idx; + nrf_twi_mngr_transfer_t const * p_transfer = + &p_cb->p_current_transaction->p_transfers[current_transfer_idx]; + uint8_t address = NRF_TWI_MNGR_OP_ADDRESS(p_transfer->operation); + + nrf_drv_twi_xfer_desc_t xfer_desc; + uint32_t flags; + + xfer_desc.address = address; + xfer_desc.p_primary_buf = p_transfer->p_data; + xfer_desc.primary_length = p_transfer->length; + + /* If it is possible try to bind two transfers together. They can be combined if: + * - there is no stop condition after current transfer. + * - current transfer is TX. + * - there is at least one more transfer in the transaction. + * - address of next transfer is the same as current transfer. + */ + if ((p_transfer->flags & NRF_TWI_MNGR_NO_STOP) && + !NRF_TWI_MNGR_IS_READ_OP(p_transfer->operation) && + // Adding 1 to check if next transfer is from the same transaction. + ((current_transfer_idx + 1) < p_cb->p_current_transaction->number_of_transfers) && + (NRF_TWI_MNGR_OP_ADDRESS(p_transfer->operation) == + NRF_TWI_MNGR_OP_ADDRESS(p_cb->p_current_transaction-> + p_transfers[current_transfer_idx + 1].operation))) + { + nrf_twi_mngr_transfer_t const * p_second_transfer = + &p_cb->p_current_transaction->p_transfers[current_transfer_idx + 1]; + xfer_desc.p_secondary_buf = p_second_transfer->p_data; + xfer_desc.secondary_length = p_second_transfer->length; + xfer_desc.type = NRF_TWI_MNGR_IS_READ_OP(p_second_transfer->operation) ? + NRF_DRV_TWI_XFER_TXRX : NRF_DRV_TWI_XFER_TXTX; + flags = (p_second_transfer->flags & NRF_TWI_MNGR_NO_STOP) ? NRF_DRV_TWI_FLAG_TX_NO_STOP : 0; + p_cb->current_transfer_idx++; + } + else + { + xfer_desc.type = NRF_TWI_MNGR_IS_READ_OP(p_transfer->operation) ? NRF_DRV_TWI_XFER_RX : + NRF_DRV_TWI_XFER_TX; + xfer_desc.p_secondary_buf = NULL; + xfer_desc.secondary_length = 0; + flags = (p_transfer->flags & NRF_TWI_MNGR_NO_STOP) ? NRF_DRV_TWI_FLAG_TX_NO_STOP : 0; + } + + return nrf_drv_twi_xfer(&p_nrf_twi_mngr->twi, &xfer_desc, flags); +} + + +static void transaction_end_signal(nrf_twi_mngr_t const * p_nrf_twi_mngr, + ret_code_t result) +{ + ASSERT(p_nrf_twi_mngr != NULL); + + if (p_nrf_twi_mngr->p_nrf_twi_mngr_cb->p_current_transaction->callback) + { + // [use a local variable to avoid using two volatile variables in one + // expression] + void * p_user_data = p_nrf_twi_mngr->p_nrf_twi_mngr_cb->p_current_transaction->p_user_data; + p_nrf_twi_mngr->p_nrf_twi_mngr_cb->p_current_transaction->callback(result, p_user_data); + } +} + +static void twi_event_handler(nrf_drv_twi_evt_t const * p_event, + void * p_context); + +// This function starts pending transaction if there is no current one or +// when 'switch_transaction' parameter is set to true. It is important to +// switch to new transaction without setting 'p_nrf_twi_mngr->p_current_transaction' +// to NULL in between, since this pointer is used to check idle status - see +// 'nrf_twi_mngr_is_idle()'. +static void start_pending_transaction(nrf_twi_mngr_t const * p_nrf_twi_mngr, + bool switch_transaction) +{ + ASSERT(p_nrf_twi_mngr != NULL); + + // Pointer for cleaner code. + nrf_twi_mngr_cb_t * p_cb = p_nrf_twi_mngr->p_nrf_twi_mngr_cb; + + for (;;) + { + bool start_transaction = false; + + CRITICAL_REGION_ENTER(); + if (switch_transaction || nrf_twi_mngr_is_idle(p_nrf_twi_mngr)) + { + if (nrf_queue_pop(p_nrf_twi_mngr->p_queue, (void *)(&p_cb->p_current_transaction)) + == NRF_SUCCESS) + { + start_transaction = true; + } + else + { + p_cb->p_current_transaction = NULL; + } + } + CRITICAL_REGION_EXIT(); + + if (!start_transaction) + { + return; + } + else + { + ret_code_t result; + + nrf_drv_twi_config_t const * p_instance_cfg = + p_cb->p_current_transaction->p_required_twi_cfg == NULL ? + &p_cb->default_configuration : + p_cb->p_current_transaction->p_required_twi_cfg; + + if (memcmp(p_cb->p_current_configuration, p_instance_cfg, sizeof(*p_instance_cfg)) != 0) + { + ret_code_t err_code; + nrf_drv_twi_uninit(&p_nrf_twi_mngr->twi); + err_code = nrf_drv_twi_init(&p_nrf_twi_mngr->twi, + p_instance_cfg, + twi_event_handler, + (void *)p_nrf_twi_mngr); + ASSERT(err_code == NRF_SUCCESS); + nrf_drv_twi_enable(&p_nrf_twi_mngr->twi); + UNUSED_VARIABLE(err_code); + p_cb->p_current_configuration = p_instance_cfg; + } + + // Try to start first transfer for this new transaction. + p_cb->current_transfer_idx = 0; + result = start_transfer(p_nrf_twi_mngr); + + // If transaction started successfully there is nothing more to do here now. + if (result == NRF_SUCCESS) + { + return; + } + + // Transfer failed to start - notify user that this transaction + // cannot be started and try with next one (in next iteration of + // the loop). + transaction_end_signal(p_nrf_twi_mngr, result); + + switch_transaction = true; + } + } +} + + +static void twi_event_handler(nrf_drv_twi_evt_t const * p_event, + void * p_context) +{ + ASSERT(p_event != NULL); + + nrf_twi_mngr_t * p_nrf_twi_mngr = (nrf_twi_mngr_t *)p_context; + ret_code_t result; + + // This callback should be called only during transaction. + ASSERT(p_nrf_twi_mngr->p_nrf_twi_mngr_cb->p_current_transaction != NULL); + + if (p_event->type == NRF_DRV_TWI_EVT_DONE) + { + result = NRF_SUCCESS; + + // Transfer finished successfully. If there is another one to be + // performed in the current transaction, start it now. + // [use a local variable to avoid using two volatile variables in one + // expression] + uint8_t current_transfer_idx = p_nrf_twi_mngr->p_nrf_twi_mngr_cb->current_transfer_idx; + ++current_transfer_idx; + if (current_transfer_idx < + p_nrf_twi_mngr->p_nrf_twi_mngr_cb->p_current_transaction->number_of_transfers) + { + p_nrf_twi_mngr->p_nrf_twi_mngr_cb->current_transfer_idx = current_transfer_idx; + + result = start_transfer(p_nrf_twi_mngr); + + if (result == NRF_SUCCESS) + { + // The current transaction goes on and we've successfully + // started its next transfer -> there is nothing more to do. + return; + } + + // [if the next transfer could not be started due to some error + // we finish the transaction with this error code as the result] + } + } + else + { + result = NRF_ERROR_INTERNAL; + } + + // The current transaction has been completed or interrupted by some error. + // Notify the user and start next one (if there is any). + transaction_end_signal(p_nrf_twi_mngr, result); + // [we switch transactions here ('p_nrf_twi_mngr->p_current_transaction' is set + // to NULL only if there is nothing more to do) in order to not generate + // spurious idle status (even for a moment)] + start_pending_transaction(p_nrf_twi_mngr, true); +} + + +ret_code_t nrf_twi_mngr_init(nrf_twi_mngr_t const * p_nrf_twi_mngr, + nrf_drv_twi_config_t const * p_default_twi_config) +{ + ASSERT(p_nrf_twi_mngr != NULL); + ASSERT(p_nrf_twi_mngr->p_queue != NULL); + ASSERT(p_nrf_twi_mngr->p_queue->size > 0); + ASSERT(p_default_twi_config != NULL); + + ret_code_t err_code; + + err_code = nrf_drv_twi_init(&p_nrf_twi_mngr->twi, + p_default_twi_config, + twi_event_handler, + (void *)p_nrf_twi_mngr); + VERIFY_SUCCESS(err_code); + + nrf_drv_twi_enable(&p_nrf_twi_mngr->twi); + + p_nrf_twi_mngr->p_nrf_twi_mngr_cb->p_current_transaction = NULL; + p_nrf_twi_mngr->p_nrf_twi_mngr_cb->default_configuration = *p_default_twi_config; + p_nrf_twi_mngr->p_nrf_twi_mngr_cb->p_current_configuration = + &p_nrf_twi_mngr->p_nrf_twi_mngr_cb->default_configuration; + + return NRF_SUCCESS; +} + + +void nrf_twi_mngr_uninit(nrf_twi_mngr_t const * p_nrf_twi_mngr) +{ + ASSERT(p_nrf_twi_mngr != NULL); + + nrf_drv_twi_uninit(&p_nrf_twi_mngr->twi); + + p_nrf_twi_mngr->p_nrf_twi_mngr_cb->p_current_transaction = NULL; +} + + +ret_code_t nrf_twi_mngr_schedule(nrf_twi_mngr_t const * p_nrf_twi_mngr, + nrf_twi_mngr_transaction_t const * p_transaction) +{ + ASSERT(p_nrf_twi_mngr != NULL); + ASSERT(p_transaction != NULL); + ASSERT(p_transaction->p_transfers != NULL); + ASSERT(p_transaction->number_of_transfers != 0); + + ret_code_t result = NRF_SUCCESS; + + result = nrf_queue_push(p_nrf_twi_mngr->p_queue, (void *)(&p_transaction)); + if (result == NRF_SUCCESS) + { + // New transaction has been successfully added to queue, + // so if we are currently idle it's time to start the job. + start_pending_transaction(p_nrf_twi_mngr, false); + } + + return result; +} + + +static void internal_transaction_cb(ret_code_t result, void * p_user_data) +{ + nrf_twi_mngr_cb_data_t *p_cb_data = (nrf_twi_mngr_cb_data_t *)p_user_data; + + p_cb_data->transaction_result = result; + p_cb_data->transaction_in_progress = false; +} + + +ret_code_t nrf_twi_mngr_perform(nrf_twi_mngr_t const * p_nrf_twi_mngr, + nrf_drv_twi_config_t const * p_config, + nrf_twi_mngr_transfer_t const * p_transfers, + uint8_t number_of_transfers, + void (* user_function)(void)) +{ + ASSERT(p_nrf_twi_mngr != NULL); + ASSERT(p_transfers != NULL); + ASSERT(number_of_transfers != 0); + + nrf_twi_mngr_cb_data_t cb_data = + { + .transaction_in_progress = true + }; + + nrf_twi_mngr_transaction_t internal_transaction = + { + .callback = internal_transaction_cb, + .p_user_data = (void *)&cb_data, + .p_transfers = p_transfers, + .number_of_transfers = number_of_transfers, + .p_required_twi_cfg = p_config + }; + + ret_code_t result = nrf_twi_mngr_schedule(p_nrf_twi_mngr, &internal_transaction); + VERIFY_SUCCESS(result); + + while (cb_data.transaction_in_progress) + { + if (user_function) + { + user_function(); + } + } + + return cb_data.transaction_result; +} +#endif //NRF_MODULE_ENABLED(NRF_TWI_MNGR) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/twi_mngr/nrf_twi_mngr.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/twi_mngr/nrf_twi_mngr.h new file mode 100644 index 00000000000..a63803a7f7e --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/twi_mngr/nrf_twi_mngr.h @@ -0,0 +1,342 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_TWI_MNGR_H__ +#define NRF_TWI_MNGR_H__ + +#include +#include "nrf_drv_twi.h" +#include "sdk_errors.h" +#include "nrf_queue.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_twi_mngr TWI transaction manager + * @{ + * @ingroup app_common + * + * @brief Module for scheduling TWI transactions. + */ + +//If TWIM is present buffers can only be in RAM +/*lint -save -e491*/ + +/** + * @brief Macro checking if buffers should be stored in RAM. + */ +#ifndef NRF_TWI_MNGR_BUFFERS_IN_RAM + #define NRF_TWI_MNGR_BUFFERS_IN_RAM defined(TWIM_PRESENT) +#endif + +/** + * @brief Modifier used in array declaration for TWI Manager. + * + * @note For TWI peripheral array can be const, for TWIM array has to be located in RAM. + */ +#if NRF_TWI_MNGR_BUFFERS_IN_RAM + #define NRF_TWI_MNGR_BUFFER_LOC_IND +#else + #define NRF_TWI_MNGR_BUFFER_LOC_IND const +#endif +/*lint -restore*/ + +/** + * @brief Flag indicating that a given transfer should not be ended + * with a stop condition. + * + * Use this flag when a stop condition is undesirable between two transfers, + * for example, when the first transfer is a write that sets an address in the slave + * device and the second one is a read that fetches certain data using this + * address. In this case, the second transfer should follow directly after the + * first transfer, with a repeated start condition instead of a stop and then + * a new start condition. + */ +#define NRF_TWI_MNGR_NO_STOP 0x01 + +/** + * @brief Macro for creating a write transfer. + * + * @param[in] address Slave address. + * @param[in] p_data Pointer to the data to be sent. + * @param[in] length Number of bytes to transfer. + * @param[in] flags Transfer flags (see @ref NRF_TWI_MNGR_NO_STOP). + */ +#define NRF_TWI_MNGR_WRITE(address, p_data, length, flags) \ + NRF_TWI_MNGR_TRANSFER(NRF_TWI_MNGR_WRITE_OP(address), p_data, length, flags) + +/** + * @brief Macro for creating a read transfer. + * + * @param address Slave address. + * @param[in] p_data Pointer to the buffer where received data should be placed. + * @param length Number of bytes to transfer. + * @param flags Transfer flags (see @ref NRF_TWI_MNGR_NO_STOP). + */ +#define NRF_TWI_MNGR_READ(address, p_data, length, flags) \ + NRF_TWI_MNGR_TRANSFER(NRF_TWI_MNGR_READ_OP(address), p_data, length, flags) + +/** + * @brief Helper macro, should not be used directly. + */ +#define NRF_TWI_MNGR_TRANSFER(_operation, _p_data, _length, _flags) \ +{ \ + .p_data = (uint8_t *)(_p_data), \ + .length = _length, \ + .operation = _operation, \ + .flags = _flags \ +} +/** + * @brief Helper macro, should not be used directly. + */ +#define NRF_TWI_MNGR_WRITE_OP(address) (((address) << 1) | 0) +/** + * @brief Helper macro, should not be used directly. + */ +#define NRF_TWI_MNGR_READ_OP(address) (((address) << 1) | 1) +/** + * @brief Helper macro, should not be used directly. + */ +#define NRF_TWI_MNGR_IS_READ_OP(operation) ((operation) & 1) +/** + * @brief Helper macro, should not be used directly. + */ +#define NRF_TWI_MNGR_OP_ADDRESS(operation) ((operation) >> 1) + +/** + * @brief TWI transaction callback prototype. + * + * @param result Result of operation (NRF_SUCCESS on success, + * otherwise a relevant error code). + * @param[in] p_user_data Pointer to user data defined in transaction + * descriptor. + */ +typedef void (* nrf_twi_mngr_callback_t)(ret_code_t result, void * p_user_data); + +/** + * @brief TWI transfer descriptor. + */ +typedef struct { + uint8_t * p_data; ///< Pointer to the buffer holding the data. + uint8_t length; ///< Number of bytes to transfer. + uint8_t operation; ///< Device address combined with transfer direction. + uint8_t flags; ///< Transfer flags (see @ref NRF_TWI_MNGR_NO_STOP). +} nrf_twi_mngr_transfer_t; + +/** + * @brief TWI transaction descriptor. + */ +typedef struct { + nrf_twi_mngr_callback_t callback; + ///< User-specified function to be called after the transaction is finished. + + void * p_user_data; + ///< Pointer to user data to be passed to the callback. + + nrf_twi_mngr_transfer_t const * p_transfers; + ///< Pointer to the array of transfers that make up the transaction. + + uint8_t number_of_transfers; + ///< Number of transfers that make up the transaction. + + nrf_drv_twi_config_t const * p_required_twi_cfg; + ///< Pointer to instance hardware configuration. +} nrf_twi_mngr_transaction_t; + +/** + * @brief TWI instance control block. + */ +typedef struct { + nrf_twi_mngr_transaction_t const * volatile p_current_transaction; + ///< Currently realized transaction. + + nrf_drv_twi_config_t default_configuration; + ///< Default hardware configuration. + + nrf_drv_twi_config_t const * p_current_configuration; + ///< Pointer to current hardware configuration. + + uint8_t volatile current_transfer_idx; + ///< Index of currently performed transfer (within current transaction). +} nrf_twi_mngr_cb_t; + +/** + * @brief TWI transaction manager instance. + */ +typedef struct { + nrf_twi_mngr_cb_t * p_nrf_twi_mngr_cb; + ///< Control block of instance. + + nrf_queue_t const * p_queue; + ///< Transaction queue. + + nrf_drv_twi_t twi; + ///< Pointer to TWI master driver instance. +} nrf_twi_mngr_t; + +/** + * @brief Macro that simplifies defining a TWI transaction manager + * instance. + * + * This macro allocates a static buffer for the transaction queue. + * Therefore, it should be used in only one place in the code for a given + * instance. + * + * @note The queue size is the maximum number of pending transactions + * not counting the one that is currently realized. This means that + * for an empty queue with size of, for example, 4 elements, it is + * possible to schedule up to 5 transactions. + * + * @param[in] _nrf_twi_mngr_name Name of instance to be created. + * @param[in] _queue_size Size of the transaction queue (maximum number + * of pending transactions). + * @param[in] _twi_idx Index of hardware TWI instance to be used. + */ +#define NRF_TWI_MNGR_DEF(_nrf_twi_mngr_name, _queue_size, _twi_idx) \ + NRF_QUEUE_DEF(nrf_twi_mngr_transaction_t const *, \ + _nrf_twi_mngr_name##_queue, \ + (_queue_size), \ + NRF_QUEUE_MODE_NO_OVERFLOW); \ + static nrf_twi_mngr_cb_t CONCAT_2(_nrf_twi_mngr_name, _cb); \ + static const nrf_twi_mngr_t _nrf_twi_mngr_name = \ + { \ + .p_nrf_twi_mngr_cb = &CONCAT_2(_nrf_twi_mngr_name, _cb), \ + .p_queue = &_nrf_twi_mngr_name##_queue, \ + .twi = NRF_DRV_TWI_INSTANCE(_twi_idx) \ + } + +/** + * @brief Function for initializing a TWI transaction manager instance. + * + * @param[in] p_nrf_twi_mngr Pointer to the instance to be initialized. + * @param[in] p_default_twi_config Pointer to the TWI master driver configuration. This configuration + * will be used whenever the scheduled transaction will have + * p_twi_configuration set to NULL value. + * + * @return Values returned by the @ref nrf_drv_twi_init function. + */ +ret_code_t nrf_twi_mngr_init(nrf_twi_mngr_t const * p_nrf_twi_mngr, + nrf_drv_twi_config_t const * p_default_twi_config); + +/** + * @brief Function for uninitializing a TWI transaction manager instance. + * + * @param[in] p_nrf_twi_mngr Pointer to the instance to be uninitialized. + */ +void nrf_twi_mngr_uninit(nrf_twi_mngr_t const * p_nrf_twi_mngr); + +/** + * @brief Function for scheduling a TWI transaction. + * + * The transaction is enqueued and started as soon as the TWI bus is + * available, thus when all previously scheduled transactions have been + * finished (possibly immediately). + * + * @note If @ref nrf_twi_mngr_transaction_t::p_required_twi_cfg + * is set to a non-NULL value the module will compare it with + * @ref nrf_twi_mngr_cb_t::p_current_configuration and reinitialize hardware + * TWI instance with new parameters if any differences are found. + * If @ref nrf_twi_mngr_transaction_t::p_required_twi_cfg is set to NULL then + * it will treat it as it would be set to @ref nrf_twi_mngr_cb_t::default_configuration. + * + * @param[in] p_nrf_twi_mngr Pointer to the TWI transaction manager instance. + * @param[in] p_transaction Pointer to the descriptor of the transaction to be + * scheduled. + * + * @retval NRF_SUCCESS If the transaction has been successfully scheduled. + * @retval NRF_ERROR_NO_MEM If the queue is full (Only if queue in + * @ref NRF_QUEUE_MODE_NO_OVERFLOW). + */ +ret_code_t nrf_twi_mngr_schedule(nrf_twi_mngr_t const * p_nrf_twi_mngr, + nrf_twi_mngr_transaction_t const * p_transaction); + +/** + * @brief Function for scheduling a transaction and waiting until it is finished. + * + * This function schedules a transaction that consists of one or more transfers + * and waits until it is finished. + * + * @param[in] p_nrf_twi_mngr Pointer to the TWI transaction manager instance. + * @param[in] p_config Required TWI configuration. + * @param[in] p_transfers Pointer to an array of transfers to be performed. + * @param number_of_transfers Number of transfers to be performed. + * @param user_function User-specified function to be called while + * waiting. NULL if such functionality + * is not needed. + * + * @retval NRF_SUCCESS If the transfers have been successfully realized. + * @retval NRF_ERROR_BUSY If some transfers are already being performed. + * @retval - Other error codes mean that the transaction has ended + * with the error that is specified in the error code. + */ +ret_code_t nrf_twi_mngr_perform(nrf_twi_mngr_t const * p_nrf_twi_mngr, + nrf_drv_twi_config_t const * p_config, + nrf_twi_mngr_transfer_t const * p_transfers, + uint8_t number_of_transfers, + void (* user_function)(void)); + +/** + * @brief Function for getting the current state of a TWI transaction manager + * instance. + * + * @param[in] p_nrf_twi_mngr Pointer to the TWI transaction manager instance. + * + * @retval true If all scheduled transactions have been finished. + * @retval false Otherwise. + */ +__STATIC_INLINE bool nrf_twi_mngr_is_idle(nrf_twi_mngr_t const * p_nrf_twi_mngr); + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION +__STATIC_INLINE bool nrf_twi_mngr_is_idle(nrf_twi_mngr_t const * p_nrf_twi_mngr) +{ + return (p_nrf_twi_mngr->p_nrf_twi_mngr_cb->p_current_transaction == NULL); +} +#endif //SUPPRESS_INLINE_IMPLEMENTATION +/** + *@} + **/ + + +#ifdef __cplusplus +} +#endif + +#endif // NRF_TWI_MNGR_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error.c new file mode 100644 index 00000000000..88b38e513e2 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error.c @@ -0,0 +1,125 @@ +/** + * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/** @file + * + * @defgroup app_error Common application error handler + * @{ + * @ingroup app_common + * + * @brief Common application error handler. + */ + +#include "nrf.h" +#include +#include "app_error.h" +#include "nordic_common.h" +#include "sdk_errors.h" + +/**@brief Function for error handling, which is called when an error has occurred. + * + * @warning This handler is an example only and does not fit a final product. You need to analyze + * how your product is supposed to react in case of error. + * + * @param[in] error_code Error code supplied to the handler. + * @param[in] line_num Line number where the handler is called. + * @param[in] p_file_name Pointer to the file name. + */ +void app_error_handler_bare(ret_code_t error_code) +{ + error_info_t error_info = + { + .line_num = 0, + .p_file_name = NULL, + .err_code = error_code, + }; + + app_error_fault_handler(NRF_FAULT_ID_SDK_ERROR, 0, (uint32_t)(&error_info)); + + UNUSED_VARIABLE(error_info); +} + +void app_error_save_and_stop(uint32_t id, uint32_t pc, uint32_t info) +{ + /* static error variables - in order to prevent removal by optimizers */ + static volatile struct + { + uint32_t fault_id; + uint32_t pc; + uint32_t error_info; + assert_info_t * p_assert_info; + error_info_t * p_error_info; + ret_code_t err_code; + uint32_t line_num; + const uint8_t * p_file_name; + } m_error_data = {0}; + + // The following variable helps Keil keep the call stack visible, in addition, it can be set to + // 0 in the debugger to continue executing code after the error check. + volatile bool loop = true; + UNUSED_VARIABLE(loop); + + m_error_data.fault_id = id; + m_error_data.pc = pc; + m_error_data.error_info = info; + + switch (id) + { + case NRF_FAULT_ID_SDK_ASSERT: + m_error_data.p_assert_info = (assert_info_t *)info; + m_error_data.line_num = m_error_data.p_assert_info->line_num; + m_error_data.p_file_name = m_error_data.p_assert_info->p_file_name; + break; + + case NRF_FAULT_ID_SDK_ERROR: + m_error_data.p_error_info = (error_info_t *)info; + m_error_data.err_code = m_error_data.p_error_info->err_code; + m_error_data.line_num = m_error_data.p_error_info->line_num; + m_error_data.p_file_name = m_error_data.p_error_info->p_file_name; + break; + } + + UNUSED_VARIABLE(m_error_data); + + // If printing is disrupted, remove the irq calls, or set the loop variable to 0 in the debugger. + __disable_irq(); + while (loop); + + __enable_irq(); +} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error.h new file mode 100644 index 00000000000..b831f7b7230 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error.h @@ -0,0 +1,192 @@ +/** + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/** @file + * + * @defgroup app_error Common application error handler + * @{ + * @ingroup app_common + * + * @brief Common application error handler and macros for utilizing a common error handler. + */ + +#ifndef APP_ERROR_H__ +#define APP_ERROR_H__ + + +#include +#include +#include +#include "nrf.h" +#include "sdk_errors.h" +#include "nordic_common.h" +#include "app_error_weak.h" +#ifdef ANT_STACK_SUPPORT_REQD +#include "ant_error.h" +#endif // ANT_STACK_SUPPORT_REQD + + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NRF_FAULT_ID_SDK_RANGE_START (0x00004000) /**< The start of the range of error IDs defined in the SDK. */ + +/**@defgroup APP_ERROR_FAULT_IDS Fault ID types + * @{ */ +#define NRF_FAULT_ID_SDK_ERROR (NRF_FAULT_ID_SDK_RANGE_START + 1) /**< An error stemming from a call to @ref APP_ERROR_CHECK or @ref APP_ERROR_CHECK_BOOL. The info parameter is a pointer to an @ref error_info_t variable. */ +#define NRF_FAULT_ID_SDK_ASSERT (NRF_FAULT_ID_SDK_RANGE_START + 2) /**< An error stemming from a call to ASSERT (nrf_assert.h). The info parameter is a pointer to an @ref assert_info_t variable. */ +/**@} */ + +/**@brief Structure containing info about an error of the type @ref NRF_FAULT_ID_SDK_ERROR. + */ +typedef struct +{ + uint32_t line_num; /**< The line number where the error occurred. */ + uint8_t const * p_file_name; /**< The file in which the error occurred. */ + uint32_t err_code; /**< The error code representing the error that occurred. */ +} error_info_t; + +/**@brief Structure containing info about an error of the type @ref NRF_FAULT_ID_SDK_ASSERT. + */ +typedef struct +{ + uint16_t line_num; /**< The line number where the error occurred. */ + uint8_t const * p_file_name; /**< The file in which the error occurred. */ +} assert_info_t; + +/**@brief Defines required by app_error_handler assembler intructions. + */ +#define APP_ERROR_ERROR_INFO_OFFSET_LINE_NUM (offsetof(error_info_t, line_num)) +#define APP_ERROR_ERROR_INFO_OFFSET_P_FILE_NAME (offsetof(error_info_t, p_file_name)) +#define APP_ERROR_ERROR_INFO_OFFSET_ERR_CODE (offsetof(error_info_t, err_code)) +#define APP_ERROR_ERROR_INFO_SIZE (sizeof(error_info_t)) +#define APP_ERROR_ERROR_INFO_SIZE_ALIGNED_8BYTE \ + ALIGN_NUM(APP_ERROR_ERROR_INFO_SIZE, sizeof(uint64_t)) + + +/**@brief Function for error handling, which is called when an error has occurred. + * + * @param[in] error_code Error code supplied to the handler. + * @param[in] line_num Line number where the handler is called. + * @param[in] p_file_name Pointer to the file name. + */ +void app_error_handler(uint32_t error_code, uint32_t line_num, const uint8_t * p_file_name); + +/**@brief Function for error handling, which is called when an error has occurred. + * + * @param[in] error_code Error code supplied to the handler. + */ +void app_error_handler_bare(ret_code_t error_code); + +/**@brief Function for saving the parameters and entering an eternal loop, for debug purposes. + * + * @param[in] id Fault identifier. See @ref NRF_FAULT_IDS. + * @param[in] pc The program counter of the instruction that triggered the fault, or 0 if + * unavailable. + * @param[in] info Optional additional information regarding the fault. Refer to each fault + * identifier for details. + */ +void app_error_save_and_stop(uint32_t id, uint32_t pc, uint32_t info); + +/**@brief Function for logging details of error and flushing logs. + * + * @param[in] id Fault identifier. See @ref NRF_FAULT_IDS. + * @param[in] pc The program counter of the instruction that triggered the fault, or 0 if + * unavailable. + * @param[in] info Optional additional information regarding the fault. Refer to each fault + * identifier for details. + */ +void app_error_log_handle(uint32_t id, uint32_t pc, uint32_t info); + + +/**@brief Macro for calling error handler function. + * + * @param[in] ERR_CODE Error code supplied to the error handler. + */ +#ifdef DEBUG +#define APP_ERROR_HANDLER(ERR_CODE) \ + do \ + { \ + app_error_handler((ERR_CODE), __LINE__, (uint8_t*) __FILE__); \ + } while (0) +#else +#define APP_ERROR_HANDLER(ERR_CODE) \ + do \ + { \ + app_error_handler_bare((ERR_CODE)); \ + } while (0) +#endif +/**@brief Macro for calling error handler function if supplied error code any other than NRF_SUCCESS. + * + * @param[in] ERR_CODE Error code supplied to the error handler. + */ +#define APP_ERROR_CHECK(ERR_CODE) \ + do \ + { \ + const uint32_t LOCAL_ERR_CODE = (ERR_CODE); \ + if (LOCAL_ERR_CODE != NRF_SUCCESS) \ + { \ + APP_ERROR_HANDLER(LOCAL_ERR_CODE); \ + } \ + } while (0) + +/**@brief Macro for calling error handler function if supplied boolean value is false. + * + * @param[in] BOOLEAN_VALUE Boolean value to be evaluated. + */ +#define APP_ERROR_CHECK_BOOL(BOOLEAN_VALUE) \ + do \ + { \ + const uint32_t LOCAL_BOOLEAN_VALUE = (BOOLEAN_VALUE); \ + if (!LOCAL_BOOLEAN_VALUE) \ + { \ + APP_ERROR_HANDLER(0); \ + } \ + } while (0) + + +#ifdef __cplusplus +} +#endif + +#endif // APP_ERROR_H__ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error_handler_gcc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error_handler_gcc.c new file mode 100644 index 00000000000..4292b6dd558 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error_handler_gcc.c @@ -0,0 +1,105 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "sdk_common.h" +#include "compiler_abstraction.h" +#include "app_error.h" + +// only compile this if we are using GCC +#if defined (__GNUC__) && !defined (__CC_ARM) + +#if defined (__CORTEX_M) && (__CORTEX_M == 0x04) +void app_error_handler(ret_code_t error_code, uint32_t line_num, const uint8_t * p_file_name) __attribute__(( naked )); + +void app_error_handler(ret_code_t error_code, uint32_t line_num, const uint8_t * p_file_name) +{ + __ASM volatile( + + "push {lr} \n" + + /* reserve space on stack for error_info_t struct - preserve 8byte stack aligment */ + "sub sp, sp, %0 \n" + + /* prepare error_info_t struct */ + "str r0, [sp, %1] \n" + "str r1, [sp, %3] \n" + "str r2, [sp, %2] \n" + + /* prepare arguments and call function: app_error_fault_handler */ + "ldr r0, =%4 \n" + "mov r1, lr \n" + "mov r2, sp \n" + "bl %5 \n" + + /* release stack */ + "add sp, sp, %0 \n" + + "pop {pc} \n" + ".ltorg \n" + + : /* Outputs */ + : /* Inputs */ + "I" (APP_ERROR_ERROR_INFO_SIZE_ALIGNED_8BYTE), + "I" (APP_ERROR_ERROR_INFO_OFFSET_ERR_CODE), + "I" (APP_ERROR_ERROR_INFO_OFFSET_P_FILE_NAME), + "I" (APP_ERROR_ERROR_INFO_OFFSET_LINE_NUM), + "X" (NRF_FAULT_ID_SDK_ERROR), + "X" (app_error_fault_handler) + : /* Clobbers */ + "r0", "r1", "r2" + ); +} +#elif defined(__CORTEX_M) && (__CORTEX_M == 0x00) +/* NRF51 implementation is currently not supporting PC readout */ +void app_error_handler(ret_code_t error_code, uint32_t line_num, const uint8_t * p_file_name) +{ + error_info_t error_info = { + .line_num = line_num, + .p_file_name = p_file_name, + .err_code = error_code, + }; + app_error_fault_handler(NRF_FAULT_ID_SDK_ERROR, 0, (uint32_t)(&error_info)); + + UNUSED_VARIABLE(error_info); +} +#else +#error Architecture not supported +#endif + +#endif \ No newline at end of file diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error_handler_iar.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error_handler_iar.c new file mode 100644 index 00000000000..cfdd5bff10e --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error_handler_iar.c @@ -0,0 +1,105 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "sdk_common.h" +#include "compiler_abstraction.h" +#include "app_error.h" + +// Build this only if compiling with IAR! +#if defined ( __ICCARM__ ) + +#if defined (__CORTEX_M) && (__CORTEX_M == 0x04) +void app_error_handler(ret_code_t error_code, uint32_t line_num, const uint8_t * p_file_name) +{ + __ASM volatile( + "push {lr} \n" + /* reserve space on stack for error_info_t struct */ + "sub sp, sp, %0 \n" + + /* prepare error_info_t struct */ + "str r0, [sp, %1] \n" + "str r1, [sp, %3] \n" + "str r2, [sp, %2] \n" + + /* prepare arguments and call function: app_error_fault_handler */ + "ldr.n r0, 1f \n" + "mov r1, LR \n" + "mov r2, sp \n" + + /* call app_error_fault_handler */ + "bl %c5 \n" + + /* release stack */ + "add sp, sp, %0 \n" + "pop {pc} \n" + + "DATA \n" + "1: \n" + " DC32 %c4 \n" + + : /* Outputs */ + : /* Inputs */ + "i" (APP_ERROR_ERROR_INFO_SIZE_ALIGNED_8BYTE), + "i" (APP_ERROR_ERROR_INFO_OFFSET_ERR_CODE), + "i" (APP_ERROR_ERROR_INFO_OFFSET_P_FILE_NAME), + "i" (APP_ERROR_ERROR_INFO_OFFSET_LINE_NUM), + "i" (NRF_FAULT_ID_SDK_ERROR), + "i" (app_error_fault_handler) + : /* CLobbers */ + "r0", "r1", "r2" + ); +} +#elif defined(__CORTEX_M) && (__CORTEX_M == 0x00) +/* NRF51 implementation is currently not supporting PC readout */ +void app_error_handler(ret_code_t error_code, uint32_t line_num, const uint8_t * p_file_name) +{ + error_info_t error_info = { + .line_num = line_num, + .p_file_name = p_file_name, + .err_code = error_code, + }; + app_error_fault_handler(NRF_FAULT_ID_SDK_ERROR, 0, (uint32_t)(&error_info)); + + UNUSED_VARIABLE(error_info); +} +#else +#error Architecture not supported +#endif +#endif + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error_handler_keil.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error_handler_keil.c new file mode 100644 index 00000000000..760465ecdf6 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error_handler_keil.c @@ -0,0 +1,96 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + + +#include "sdk_common.h" +#include "compiler_abstraction.h" +#include "app_error.h" + +// make sure we are using armcc! +#if defined (__CC_ARM) + +#if defined (__CORTEX_M) && (__CORTEX_M == 0x04) +__ASM void app_error_handler(ret_code_t error_code, uint32_t line_num, const uint8_t * p_file_name) +{ + PRESERVE8 {TRUE} + THUMB + + push {lr} + + /* reserve space on stack for error_info_t struct - preserve 8byte stack aligment */ + sub sp, sp, #__cpp(APP_ERROR_ERROR_INFO_SIZE_ALIGNED_8BYTE) + + /* prepare error_info_t struct */ + str r0, [sp, #__cpp(APP_ERROR_ERROR_INFO_OFFSET_ERR_CODE)] + str r1, [sp, #__cpp(APP_ERROR_ERROR_INFO_OFFSET_LINE_NUM)] + str r2, [sp, #__cpp(APP_ERROR_ERROR_INFO_OFFSET_P_FILE_NAME)] + + /* prepare arguments and call function: app_error_fault_handler */ + mov r0, #__cpp(NRF_FAULT_ID_SDK_ERROR) + mov r1, lr + mov r2, sp + + /* call function */ + bl __cpp(app_error_fault_handler) + + /* release stack */ + add sp, sp, #__cpp(APP_ERROR_ERROR_INFO_SIZE_ALIGNED_8BYTE) + + pop {pc} +} +#elif defined(__CORTEX_M) && (__CORTEX_M == 0x00) +/* NRF51 implementation is currently not supporting PC readout */ +void app_error_handler(ret_code_t error_code, uint32_t line_num, const uint8_t * p_file_name) +{ + error_info_t error_info = { + .line_num = line_num, + .p_file_name = p_file_name, + .err_code = error_code, + }; + app_error_fault_handler(NRF_FAULT_ID_SDK_ERROR, 0, (uint32_t)(&error_info)); + + UNUSED_VARIABLE(error_info); +} +#else +#error Architecture not supported +#endif + +#endif + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error_weak.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error_weak.c new file mode 100644 index 00000000000..0e0130ac507 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error_weak.c @@ -0,0 +1,109 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "app_error.h" + +#include "nrf_log.h" +#include "nrf_log_ctrl.h" +#include "nrf_strerror.h" + +#if defined(SOFTDEVICE_PRESENT) && SOFTDEVICE_PRESENT +#include "nrf_sdm.h" +#endif + +/*lint -save -e14 */ +/** + * Function is implemented as weak so that it can be overwritten by custom application error handler + * when needed. + */ +__WEAK void app_error_fault_handler(uint32_t id, uint32_t pc, uint32_t info) +{ + __disable_irq(); + NRF_LOG_FINAL_FLUSH(); + +#ifndef DEBUG + NRF_LOG_ERROR("Fatal error"); +#else + switch (id) + { +#if defined(SOFTDEVICE_PRESENT) && SOFTDEVICE_PRESENT + case NRF_FAULT_ID_SD_ASSERT: + NRF_LOG_ERROR("SOFTDEVICE: ASSERTION FAILED"); + break; + case NRF_FAULT_ID_APP_MEMACC: + NRF_LOG_ERROR("SOFTDEVICE: INVALID MEMORY ACCESS"); + break; +#endif + case NRF_FAULT_ID_SDK_ASSERT: + { + assert_info_t * p_info = (assert_info_t *)info; + NRF_LOG_ERROR("ASSERTION FAILED at %s:%u", + p_info->p_file_name, + p_info->line_num); + break; + } + case NRF_FAULT_ID_SDK_ERROR: + { + error_info_t * p_info = (error_info_t *)info; + NRF_LOG_ERROR("ERROR %u [%s] at %s:%u\r\nPC at: 0x%08x", + p_info->err_code, + nrf_strerror_get(p_info->err_code), + p_info->p_file_name, + p_info->line_num, + pc); + NRF_LOG_ERROR("End of error report"); + break; + } + default: + NRF_LOG_ERROR("UNKNOWN FAULT at 0x%08X", pc); + break; + } +#endif + + NRF_BREAKPOINT_COND; + // On assert, the system can only recover with a reset. + +#ifndef DEBUG + NRF_LOG_WARNING("System reset"); + NVIC_SystemReset(); +#else + app_error_save_and_stop(id, pc, info); +#endif // DEBUG +} +/*lint -restore */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error_weak.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error_weak.h new file mode 100644 index 00000000000..fd1a5021b39 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error_weak.h @@ -0,0 +1,87 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef APP_ERROR_WEAK_H__ +#define APP_ERROR_WEAK_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** @file + * + * @defgroup app_error Common application error handler + * @{ + * @ingroup app_common + * + * @brief Common application error handler. + */ + +/**@brief Callback function for errors, asserts, and faults. + * + * @details This function is called every time an error is raised in app_error, nrf_assert, or + * in the SoftDevice. Information about the error can be found in the @p info + * parameter. + * + * See also @ref nrf_fault_handler_t for more details. + * + * @note The function is implemented as weak so that it can be redefined by a custom error + * handler when needed. + * + * @param[in] id Fault identifier. See @ref NRF_FAULT_IDS. + * @param[in] pc The program counter of the instruction that triggered the fault, or 0 if + * unavailable. + * @param[in] info Optional additional information regarding the fault. The value of the @p id + * parameter dictates how to interpret this parameter. Refer to the documentation + * for each fault identifier (@ref NRF_FAULT_IDS and @ref APP_ERROR_FAULT_IDS) for + * details about interpreting @p info. + */ +void app_error_fault_handler(uint32_t id, uint32_t pc, uint32_t info); + + +/** @} */ + + +#ifdef __cplusplus +} +#endif + +#endif // APP_ERROR_WEAK_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_util.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_util.h new file mode 100644 index 00000000000..2330d390ecc --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_util.h @@ -0,0 +1,1206 @@ +/** + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/** @file + * + * @defgroup app_util Utility Functions and Definitions + * @{ + * @ingroup app_common + * + * @brief Various types and definitions available to all applications. + */ + +#ifndef APP_UTIL_H__ +#define APP_UTIL_H__ + +#include +#include +#include +#include "compiler_abstraction.h" +#include "nordic_common.h" +#include "nrf.h" + +#ifdef __cplusplus +extern "C" { +#endif +/** + * @cond (NODOX) + */ +/*lint -save -e27 -e10 -e19 */ +#if defined (__LINT__) +#define STACK_BASE 0x1F000 // Arbitrary value. +#define STACK_TOP 0x20000 // Arbitrary value. + +#elif defined ( __CC_ARM ) +extern char STACK$$Base; +extern char STACK$$Length; +#define STACK_BASE &STACK$$Base +#define STACK_TOP ((void*)((uint32_t)STACK_BASE + (uint32_t)&STACK$$Length)) + +#elif defined ( __ICCARM__ ) +extern char CSTACK$$Base; +extern char CSTACK$$Length; +#define STACK_BASE &CSTACK$$Base +#define STACK_TOP ((void*)((uint32_t)STACK_BASE + (uint32_t)&CSTACK$$Length)) + +#elif defined ( __GNUC__ ) +extern uint32_t __StackTop; +extern uint32_t __StackLimit; +#define STACK_BASE &__StackLimit +#define STACK_TOP &__StackTop +#endif + +/* These macros are valid only when absolute placement is used for the application + * image. The macros are not compile time symbols. They cannot be used as a + * constant expression, for example, inside a static assert or linker script + * at-placement. */ +#if defined (__LINT__) +#define CODE_START (0) // Arbitrary value. +#define CODE_END (0x1000) // Arbitrary value. +#define CODE_SIZE (0x1000) // Arbitrary value. + +#elif defined ( __CC_ARM ) +extern char Load$$LR$$LR_IROM1$$Base; +extern char Load$$LR$$LR_IROM1$$Length; +extern char Load$$LR$$LR_IROM1$$Limit; +#define CODE_START ((uint32_t)&Load$$LR$$LR_IROM1$$Base) +#define CODE_END ((uint32_t)&Load$$LR$$LR_IROM1$$Limit) +#define CODE_SIZE ((uint32_t)&Load$$LR$$LR_IROM1$$Length) + +#elif defined ( __ICCARM__ ) +extern void * __vector_table; +extern char RO_END$$Base; +#define CODE_START ((uint32_t)&__vector_table) +#define CODE_END ((uint32_t)&RO_END$$Base) +#define CODE_SIZE (CODE_END - CODE_START) + +#elif defined(__SES_ARM) +extern uint32_t * _vectors; +extern uint32_t __FLASH_segment_used_end__; +#define CODE_START ((uint32_t)&_vectors) +#define CODE_END ((uint32_t)&__FLASH_segment_used_end__) +#define CODE_SIZE (CODE_END - CODE_START) + +#elif defined ( __GNUC__ ) +extern uint32_t __isr_vector; +extern uint32_t __etext; +#define CODE_START ((uint32_t)&__isr_vector) +#define CODE_END ((uint32_t)&__etext) +#define CODE_SIZE (CODE_END - CODE_START) +#endif +/** @} + * @endcond + */ +/* lint -restore */ + +enum +{ + UNIT_0_625_MS = 625, /**< Number of microseconds in 0.625 milliseconds. */ + UNIT_1_25_MS = 1250, /**< Number of microseconds in 1.25 milliseconds. */ + UNIT_10_MS = 10000 /**< Number of microseconds in 10 milliseconds. */ +}; + +/** + * @brief Counts number of bits required for the given value + * + * The macro technically searches for the highest bit set. + * For value 0 it returns 0. + * + * @param val Value to be processed + * + * @return Number of bits required for the given value + */ +//lint -emacro(572,VBITS) +#define VBITS(val) VBITS_32(val) + +/** + * @def VBITS_1 + * @brief Internal macro used by @ref VBITS */ +/** + * @def VBITS_2 + * @brief Internal macro used by @ref VBITS */ +/** + * @def VBITS_4 + * @brief Internal macro used by @ref VBITS */ +/** + * @def VBITS_8 + * @brief Internal macro used by @ref VBITS */ +/** + * @def VBITS_16 + * @brief Internal macro used by @ref VBITS */ +/** + * @def VBITS_32 + * @brief Internal macro used by @ref VBITS */ +#define VBITS_1( v) ((((v) & (0x0001U << 0)) != 0) ? 1U : 0U) +#define VBITS_2( v) ((((v) & (0x0001U << 1)) != 0) ? VBITS_1 ((v) >> 1) + 1 : VBITS_1 (v)) +#define VBITS_4( v) ((((v) & (0x0003U << 2)) != 0) ? VBITS_2 ((v) >> 2) + 2 : VBITS_2 (v)) +#define VBITS_8( v) ((((v) & (0x000fU << 4)) != 0) ? VBITS_4 ((v) >> 4) + 4 : VBITS_4 (v)) +#define VBITS_16(v) ((((v) & (0x00ffU << 8)) != 0) ? VBITS_8 ((v) >> 8) + 8 : VBITS_8 (v)) +#define VBITS_32(v) ((((v) & (0xffffU << 16)) != 0) ? VBITS_16((v) >> 16) + 16 : VBITS_16(v)) + + +/*Segger embedded studio originally has offsetof macro which cannot be used in macros (like STATIC_ASSERT). + This redefinition is to allow using that. */ +#if defined(__SES_ARM) && defined(__GNUC__) +#undef offsetof +#define offsetof(TYPE, MEMBER) __builtin_offsetof (TYPE, MEMBER) +#endif + +/**@brief Implementation specific macro for delayed macro expansion used in string concatenation +* +* @param[in] lhs Left hand side in concatenation +* @param[in] rhs Right hand side in concatenation +*/ +#define STRING_CONCATENATE_IMPL(lhs, rhs) lhs ## rhs + + +/**@brief Macro used to concatenate string using delayed macro expansion +* +* @note This macro will delay concatenation until the expressions have been resolved +* +* @param[in] lhs Left hand side in concatenation +* @param[in] rhs Right hand side in concatenation +*/ +#define STRING_CONCATENATE(lhs, rhs) STRING_CONCATENATE_IMPL(lhs, rhs) + + +#ifndef __LINT__ + +// need an if/elif as _CC_ARM wil define __GNUC__ +#ifdef __CC_ARM +#define STATIC_ASSERT_SIMPLE(EXPR) extern char (*_do_assert(void)) [sizeof(char[1 - 2*!(EXPR)])] +#define STATIC_ASSERT_MSG(EXPR, MSG) extern char (*_do_assert(void)) [sizeof(char[1 - 2*!(EXPR)])] +//#endif + +//#ifdef __CC_ARM +#elif __GNUC__ +#define STATIC_ASSERT_SIMPLE(EXPR) _Static_assert(EXPR, "unspecified message") +#define STATIC_ASSERT_MSG(EXPR, MSG) _Static_assert(EXPR, MSG) +#endif + +#ifdef __ICCARM__ +#define STATIC_ASSERT_SIMPLE(EXPR) static_assert(EXPR, "unspecified message") +#define STATIC_ASSERT_MSG(EXPR, MSG) static_assert(EXPR, MSG) +#endif + +#else // __LINT__ + +#define STATIC_ASSERT_SIMPLE(EXPR) extern char (*_ignore(void)) +#define STATIC_ASSERT_MSG(EXPR, MSG) extern char (*_ignore(void)) + +#endif + + +#define _SELECT_ASSERT_FUNC(x, EXPR, MSG, ASSERT_MACRO, ...) ASSERT_MACRO + +/** + * @brief Static (i.e. compile time) assert macro. + * + * @note The output of STATIC_ASSERT can be different across compilers. + * + * Usage: + * STATIC_ASSERT(expression); + * STATIC_ASSERT(expression, message); + * + * @hideinitializer + */ +//lint -save -esym(???, STATIC_ASSERT) +#define STATIC_ASSERT(...) \ + _SELECT_ASSERT_FUNC(x, ##__VA_ARGS__, \ + STATIC_ASSERT_MSG(__VA_ARGS__), \ + STATIC_ASSERT_SIMPLE(__VA_ARGS__)) +//lint -restore + + +/**@brief Implementation details for NUM_VAR_ARGS */ +#define NUM_VA_ARGS_IMPL( \ + _0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, \ + _11, _12, _13, _14, _15, _16, _17, _18, _19, _20, \ + _21, _22, _23, _24, _25, _26, _27, _28, _29, _30, \ + _31, _32, _33, _34, _35, _36, _37, _38, _39, _40, \ + _41, _42, _43, _44, _45, _46, _47, _48, _49, _50, \ + _51, _52, _53, _54, _55, _56, _57, _58, _59, _60, \ + _61, _62, N, ...) N + + +/**@brief Macro to get the number of arguments in a call variadic macro call + * + * param[in] ... List of arguments + * + * @retval Number of variadic arguments in the argument list + */ +#define NUM_VA_ARGS(...) NUM_VA_ARGS_IMPL(__VA_ARGS__, 63, 62, 61, \ + 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \ + 50, 49, 48, 47, 46, 45, 44, 43, 42, 41, \ + 40, 39, 38, 37, 36, 35, 34, 33, 32, 31, \ + 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, \ + 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, \ + 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0) + +/**@brief Implementation details for NUM_VAR_ARGS */ +#define NUM_VA_ARGS_LESS_1_IMPL( \ + _ignored, \ + _0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, \ + _11, _12, _13, _14, _15, _16, _17, _18, _19, _20, \ + _21, _22, _23, _24, _25, _26, _27, _28, _29, _30, \ + _31, _32, _33, _34, _35, _36, _37, _38, _39, _40, \ + _41, _42, _43, _44, _45, _46, _47, _48, _49, _50, \ + _51, _52, _53, _54, _55, _56, _57, _58, _59, _60, \ + _61, _62, N, ...) N + +/**@brief Macro to get the number of arguments in a call variadic macro call. + * First argument is not counted. + * + * param[in] ... List of arguments + * + * @retval Number of variadic arguments in the argument list + */ +#define NUM_VA_ARGS_LESS_1(...) NUM_VA_ARGS_LESS_1_IMPL(__VA_ARGS__, 63, 62, 61, \ + 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \ + 50, 49, 48, 47, 46, 45, 44, 43, 42, 41, \ + 40, 39, 38, 37, 36, 35, 34, 33, 32, 31, \ + 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, \ + 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, \ + 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, ~) + + +/**@brief type for holding an encoded (i.e. little endian) 16 bit unsigned integer. */ +typedef uint8_t uint16_le_t[2]; + +/**@brief Type for holding an encoded (i.e. little endian) 32 bit unsigned integer. */ +typedef uint8_t uint32_le_t[4]; + +/**@brief Byte array type. */ +typedef struct +{ + uint16_t size; /**< Number of array entries. */ + uint8_t * p_data; /**< Pointer to array entries. */ +} uint8_array_t; + + +/**@brief Macro for performing rounded integer division (as opposed to truncating the result). + * + * @param[in] A Numerator. + * @param[in] B Denominator. + * + * @return Rounded (integer) result of dividing A by B. + */ +#define ROUNDED_DIV(A, B) (((A) + ((B) / 2)) / (B)) + + +/**@brief Macro for checking if an integer is a power of two. + * + * @param[in] A Number to be tested. + * + * @return true if value is power of two. + * @return false if value not power of two. + */ +#define IS_POWER_OF_TWO(A) ( ((A) != 0) && ((((A) - 1) & (A)) == 0) ) + + +/**@brief Macro for converting milliseconds to ticks. + * + * @param[in] TIME Number of milliseconds to convert. + * @param[in] RESOLUTION Unit to be converted to in [us/ticks]. + */ +#define MSEC_TO_UNITS(TIME, RESOLUTION) (((TIME) * 1000) / (RESOLUTION)) + + +/**@brief Macro for performing integer division, making sure the result is rounded up. + * + * @details One typical use for this is to compute the number of objects with size B is needed to + * hold A number of bytes. + * + * @param[in] A Numerator. + * @param[in] B Denominator. + * + * @return Integer result of dividing A by B, rounded up. + */ +#define CEIL_DIV(A, B) \ + (((A) + (B) - 1) / (B)) + + +/**@brief Macro for creating a buffer aligned to 4 bytes. + * + * @param[in] NAME Name of the buffor. + * @param[in] MIN_SIZE Size of this buffor (it will be rounded up to multiples of 4 bytes). + */ +#define WORD_ALIGNED_MEM_BUFF(NAME, MIN_SIZE) static uint32_t NAME[CEIL_DIV(MIN_SIZE, sizeof(uint32_t))] + + +/**@brief Macro for calculating the number of words that are needed to hold a number of bytes. + * + * @details Adds 3 and divides by 4. + * + * @param[in] n_bytes The number of bytes. + * + * @return The number of words that @p n_bytes take up (rounded up). + */ +#define BYTES_TO_WORDS(n_bytes) (((n_bytes) + 3) >> 2) + + +/**@brief The number of bytes in a word. + */ +#define BYTES_PER_WORD (4) + + +/**@brief Macro for increasing a number to the nearest (larger) multiple of another number. + * + * @param[in] alignment The number to align to. + * @param[in] number The number to align (increase). + * + * @return The aligned (increased) @p number. + */ +#define ALIGN_NUM(alignment, number) (((number) - 1) + (alignment) - (((number) - 1) % (alignment))) + +/**@brief Macro for getting first of 2 parameters. + * + * @param[in] a1 First parameter. + * @param[in] a2 Second parameter. + */ +#define GET_ARG_1(a1, a2) a1 + +/**@brief Macro for getting second of 2 parameters. + * + * @param[in] a1 First parameter. + * @param[in] a2 Second parameter. + */ +#define GET_ARG_2(a1, a2) a2 + + +/**@brief Container of macro (borrowed from Linux kernel). + * + * This macro returns parent structure address basing on child member address. + * + * @param ptr Address of child type. + * @param type Type of parent structure. + * @param member Name of child field in parent structure. + * + * @return Parent structure address. + * */ +#define CONTAINER_OF(ptr, type, member) \ + (type *)((char *)ptr - offsetof(type, member)) + + +/** + * @brief Define Bit-field mask + * + * Macro that defined the mask with selected number of bits set, starting from + * provided bit number. + * + * @param[in] bcnt Number of bits in the bit-field + * @param[in] boff Lowest bit number + */ +#define BF_MASK(bcnt, boff) ( ((1U << (bcnt)) - 1U) << (boff) ) + +/** + * @brief Get bit-field + * + * Macro that extracts selected bit-field from provided value + * + * @param[in] val Value from witch selected bit-field would be extracted + * @param[in] bcnt Number of bits in the bit-field + * @param[in] boff Lowest bit number + * + * @return Value of the selected bits + */ +#define BF_GET(val, bcnt, boff) ( ( (val) & BF_MASK((bcnt), (boff)) ) >> (boff) ) + +/** + * @brief Create bit-field value + * + * Value is masked and shifted to match given bit-field + * + * @param[in] val Value to set on bit-field + * @param[in] bcnt Number of bits for bit-field + * @param[in] boff Offset of bit-field + * + * @return Value positioned of given bit-field. + */ +#define BF_VAL(val, bcnt, boff) ( (((uint32_t)(val)) << (boff)) & BF_MASK(bcnt, boff) ) + +/** + * @name Configuration of complex bit-field + * + * @sa BF_CX + * @{ + */ +/** @brief Position of bit count in complex bit-field value */ +#define BF_CX_BCNT_POS 0U +/** @brief Mask of bit count in complex bit-field value */ +#define BF_CX_BCNT_MASK (0xffU << BF_CX_BCNT_POS) +/** @brief Position of bit position in complex bit-field value */ +#define BF_CX_BOFF_POS 8U +/** @brief Mask of bit position in complex bit-field value */ +#define BF_CX_BOFF_MASK (0xffU << BF_CX_BOFF_POS) +/** @} */ + +/** + * @brief Define complex bit-field + * + * Complex bit-field would contain its position and size in one number. + * @sa BF_CX_MASK + * @sa BF_CX_POS + * @sa BF_CX_GET + * + * @param[in] bcnt Number of bits in the bit-field + * @param[in] boff Lowest bit number + * + * @return The single number that describes the bit-field completely. + */ +#define BF_CX(bcnt, boff) ( ((((uint32_t)(bcnt)) << BF_CX_BCNT_POS) & BF_CX_BCNT_MASK) | ((((uint32_t)(boff)) << BF_CX_BOFF_POS) & BF_CX_BOFF_MASK) ) + +/** + * @brief Get number of bits in bit-field + * + * @sa BF_CX + * + * @param bf_cx Complex bit-field + * + * @return Number of bits in given bit-field + */ +#define BF_CX_BCNT(bf_cx) ( ((bf_cx) & BF_CX_BCNT_MASK) >> BF_CX_BCNT_POS ) + +/** + * @brief Get lowest bit number in the field + * + * @sa BF_CX + * + * @param[in] bf_cx Complex bit-field + * + * @return Lowest bit number in given bit-field + */ +#define BF_CX_BOFF(bf_cx) ( ((bf_cx) & BF_CX_BOFF_MASK) >> BF_CX_BOFF_POS ) + +/** + * @brief Get bit mask of the selected field + * + * @sa BF_CX + * + * @param[in] bf_cx Complex bit-field + * + * @return Mask of given bit-field + */ +#define BF_CX_MASK(bf_cx) BF_MASK(BF_CX_BCNT(bf_cx), BF_CX_BOFF(bf_cx)) + +/** + * @brief Get bit-field + * + * Macro that extracts selected bit-field from provided value. + * Bit-field is given as a complex value. + * + * @sa BF_CX + * @sa BF_GET + * + * @param[in] val Value from witch selected bit-field would be extracted + * @param[in] bf_cx Complex bit-field + * + * @return Value of the selected bits. + */ +#define BF_CX_GET(val, bf_cx) BF_GET(val, BF_CX_BCNT(bf_cx), BF_CX_BOFF(bf_cx)) + +/** + * @brief Create bit-field value + * + * Value is masked and shifted to match given bit-field. + * + * @param[in] val Value to set on bit-field + * @param[in] bf_cx Complex bit-field + * + * @return Value positioned of given bit-field. + */ +#define BF_CX_VAL(val, bf_cx) BF_VAL(val, BF_CX_BCNT(bf_cx), BF_CX_BOFF(bf_cx)) + +/** + * @brief Extracting data from the brackets + * + * This macro get rid of brackets around the argument. + * It can be used to pass multiple arguments in logical one argument to a macro. + * Call it with arguments inside brackets: + * @code + * #define ARGUMENTS (a, b, c) + * BRACKET_EXTRACT(ARGUMENTS) + * @endcode + * It would produce: + * @code + * a, b, c + * @endcode + * + * @param a Argument with anything inside brackets + * @return Anything that appears inside the brackets of the argument + * + * @note + * The argument of the macro have to be inside brackets. + * In other case the compilation would fail. + */ +#define BRACKET_EXTRACT(a) BRACKET_EXTRACT_(a) +#define BRACKET_EXTRACT_(a) BRACKET_EXTRACT__ a +#define BRACKET_EXTRACT__(...) __VA_ARGS__ + + +/** + * @brief Check if number of parameters is more than 1 + * + * @param ... Arguments to count + * + * @return 0 If argument count is <= 1 + * @return 1 If argument count is > 1 + * + * @sa NUM_VA_ARGS + * @sa NUM_IS_MORE_THAN_1 + */ +#define NUM_VA_ARGS_IS_MORE_THAN_1(...) NUM_IS_MORE_THAN_1(NUM_VA_ARGS(__VA_ARGS__)) + +/** + * @brief Check if given numeric value is bigger than 1 + * + * This macro accepts numeric value, that may be the result of argument expansion. + * This numeric value is then converted to 0 if it is lover than 1 or to 1 if + * its value is higher than 1. + * The generated result can be used to glue it into other macro mnemonic name. + * + * @param N Numeric value to check + * + * @return 0 If argument is <= 1 + * @return 1 If argument is > 1 + * + * @note Any existing definition of a form NUM_IS_MORE_THAN_1_PROBE_[N] can + * broke the result of this macro + */ +#define NUM_IS_MORE_THAN_1(N) NUM_IS_MORE_THAN_1_(N) +#define NUM_IS_MORE_THAN_1_(N) NUM_IS_MORE_THAN_1_PROBE_(NUM_IS_MORE_THAN_1_PROBE_ ## N, 1) +#define NUM_IS_MORE_THAN_1_PROBE_(...) GET_VA_ARG_1(GET_ARGS_AFTER_1(__VA_ARGS__)) +#define NUM_IS_MORE_THAN_1_PROBE_0 ~, 0 +#define NUM_IS_MORE_THAN_1_PROBE_1 ~, 0 + +/** + * @brief Get the first argument + * + * @param ... Arguments to select + * + * @return First argument or empty if no arguments are provided + */ +#define GET_VA_ARG_1(...) GET_VA_ARG_1_(__VA_ARGS__, ) // Make sure that also for 1 argument it works +#define GET_VA_ARG_1_(a1, ...) a1 + +/** + * @brief Get all the arguments but the first one + * + * @param ... Arguments to select + * + * @return All arguments after the first one or empty if less than 2 arguments are provided + */ +#define GET_ARGS_AFTER_1(...) GET_ARGS_AFTER_1_(__VA_ARGS__, ) // Make sure that also for 1 argument it works +#define GET_ARGS_AFTER_1_(a1, ...) __VA_ARGS__ + +/** + * @brief Size of a field in declared structure + * + * Macro that returns the size of the structure field. + * @param struct_type Variable type to get the field size from + * @param field Field name to analyze. It can be even field inside field (field.somethingelse.and_another). + * + * @return Size of the field + */ +#define FIELD_SIZE(struct_type, field) sizeof(((struct struct_type*)NULL)->field) + +/** + * @brief Number of elements in field array in declared structure + * + * Macro that returns number of elementy in structure field. + * @param struct_type Variable type to get the field size from + * @param field Field name to analyze. + * + * @return Number of elements in field array + * + * @sa FIELD_SIZE + */ +#define FIELD_ARRAY_SIZE(struct_type, field) (FIELD_SIZE(struct_type, field) / FIELD_SIZE(struct_type, field[0])) + +/** + * @brief Mapping macro + * + * Macro that process all arguments using given macro + * + * @param ... Macro name to be used for argument processing followed by arguments to process. + * Macro should have following form: MACRO(argument) + * + * @return All arguments processed by given macro + */ +#define MACRO_MAP(...) MACRO_MAP_(__VA_ARGS__) +#define MACRO_MAP_(...) MACRO_MAP_N(NUM_VA_ARGS_LESS_1(__VA_ARGS__), __VA_ARGS__) // To make sure it works also for 2 arguments in total + +/** + * @brief Mapping macro, recursive version + * + * Can be used in @ref MACRO_MAP macro + */ +#define MACRO_MAP_REC(...) MACRO_MAP_REC_(__VA_ARGS__) +#define MACRO_MAP_REC_(...) MACRO_MAP_REC_N(NUM_VA_ARGS_LESS_1(__VA_ARGS__), __VA_ARGS__) // To make sure it works also for 2 arguments in total +/** + * @brief Mapping N arguments macro + * + * Macro similar to @ref MACRO_MAP but maps exact number of arguments. + * If there is more arguments given, the rest would be ignored. + * + * @param N Number of arguments to map + * @param ... Macro name to be used for argument processing followed by arguments to process. + * Macro should have following form: MACRO(argument) + * + * @return Selected number of arguments processed by given macro + */ +#define MACRO_MAP_N(N, ...) MACRO_MAP_N_(N, __VA_ARGS__) +#define MACRO_MAP_N_(N, ...) CONCAT_2(MACRO_MAP_, N)(__VA_ARGS__, ) + +/** + * @brief Mapping N arguments macro, recursive version + * + * Can be used in @ref MACRO_MAP_N macro + */ +#define MACRO_MAP_REC_N(N, ...) MACRO_MAP_REC_N_(N, __VA_ARGS__) +#define MACRO_MAP_REC_N_(N, ...) CONCAT_2(MACRO_MAP_REC_, N)(__VA_ARGS__, ) + +#define MACRO_MAP_0( ...) +#define MACRO_MAP_1( macro, a, ...) macro(a) +#define MACRO_MAP_2( macro, a, ...) macro(a) MACRO_MAP_1 (macro, __VA_ARGS__, ) +#define MACRO_MAP_3( macro, a, ...) macro(a) MACRO_MAP_2 (macro, __VA_ARGS__, ) +#define MACRO_MAP_4( macro, a, ...) macro(a) MACRO_MAP_3 (macro, __VA_ARGS__, ) +#define MACRO_MAP_5( macro, a, ...) macro(a) MACRO_MAP_4 (macro, __VA_ARGS__, ) +#define MACRO_MAP_6( macro, a, ...) macro(a) MACRO_MAP_5 (macro, __VA_ARGS__, ) +#define MACRO_MAP_7( macro, a, ...) macro(a) MACRO_MAP_6 (macro, __VA_ARGS__, ) +#define MACRO_MAP_8( macro, a, ...) macro(a) MACRO_MAP_7 (macro, __VA_ARGS__, ) +#define MACRO_MAP_9( macro, a, ...) macro(a) MACRO_MAP_8 (macro, __VA_ARGS__, ) +#define MACRO_MAP_10(macro, a, ...) macro(a) MACRO_MAP_9 (macro, __VA_ARGS__, ) +#define MACRO_MAP_11(macro, a, ...) macro(a) MACRO_MAP_10(macro, __VA_ARGS__, ) +#define MACRO_MAP_12(macro, a, ...) macro(a) MACRO_MAP_11(macro, __VA_ARGS__, ) +#define MACRO_MAP_13(macro, a, ...) macro(a) MACRO_MAP_12(macro, __VA_ARGS__, ) +#define MACRO_MAP_14(macro, a, ...) macro(a) MACRO_MAP_13(macro, __VA_ARGS__, ) +#define MACRO_MAP_15(macro, a, ...) macro(a) MACRO_MAP_14(macro, __VA_ARGS__, ) + +#define MACRO_MAP_REC_0( ...) +#define MACRO_MAP_REC_1( macro, a, ...) macro(a) +#define MACRO_MAP_REC_2( macro, a, ...) macro(a) MACRO_MAP_REC_1 (macro, __VA_ARGS__, ) +#define MACRO_MAP_REC_3( macro, a, ...) macro(a) MACRO_MAP_REC_2 (macro, __VA_ARGS__, ) +#define MACRO_MAP_REC_4( macro, a, ...) macro(a) MACRO_MAP_REC_3 (macro, __VA_ARGS__, ) +#define MACRO_MAP_REC_5( macro, a, ...) macro(a) MACRO_MAP_REC_4 (macro, __VA_ARGS__, ) +#define MACRO_MAP_REC_6( macro, a, ...) macro(a) MACRO_MAP_REC_5 (macro, __VA_ARGS__, ) +#define MACRO_MAP_REC_7( macro, a, ...) macro(a) MACRO_MAP_REC_6 (macro, __VA_ARGS__, ) +#define MACRO_MAP_REC_8( macro, a, ...) macro(a) MACRO_MAP_REC_7 (macro, __VA_ARGS__, ) +#define MACRO_MAP_REC_9( macro, a, ...) macro(a) MACRO_MAP_REC_8 (macro, __VA_ARGS__, ) +#define MACRO_MAP_REC_10(macro, a, ...) macro(a) MACRO_MAP_REC_9 (macro, __VA_ARGS__, ) +#define MACRO_MAP_REC_11(macro, a, ...) macro(a) MACRO_MAP_REC_10(macro, __VA_ARGS__, ) +#define MACRO_MAP_REC_12(macro, a, ...) macro(a) MACRO_MAP_REC_11(macro, __VA_ARGS__, ) +#define MACRO_MAP_REC_13(macro, a, ...) macro(a) MACRO_MAP_REC_12(macro, __VA_ARGS__, ) +#define MACRO_MAP_REC_14(macro, a, ...) macro(a) MACRO_MAP_REC_13(macro, __VA_ARGS__, ) +#define MACRO_MAP_REC_15(macro, a, ...) macro(a) MACRO_MAP_REC_14(macro, __VA_ARGS__, ) + +/** + * @brief Mapping macro with current index + * + * Basically macro similar to @ref MACRO_MAP, but the processing function would get an argument + * and current argument index (beginning from 0). + * + * @param ... Macro name to be used for argument processing followed by arguments to process. + * Macro should have following form: MACRO(argument, index) + * @return All arguments processed by given macro + */ +#define MACRO_MAP_FOR(...) MACRO_MAP_FOR_(__VA_ARGS__) +#define MACRO_MAP_FOR_N_LIST 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 +#define MACRO_MAP_FOR_(...) MACRO_MAP_FOR_N(NUM_VA_ARGS_LESS_1(__VA_ARGS__), __VA_ARGS__) + +/** + * @brief Mapping N arguments macro with current index + * + * Macro is similar to @ref MACRO_MAP_FOR but maps exact number of arguments. + * If there is more arguments given, the rest would be ignored. + * + * @param N Number of arguments to map + * @param ... Macro name to be used for argument processing followed by arguments to process. + * Macro should have following form: MACRO(argument, index) + * + * @return Selected number of arguments processed by given macro + */ +#define MACRO_MAP_FOR_N(N, ...) MACRO_MAP_FOR_N_(N, __VA_ARGS__) +#define MACRO_MAP_FOR_N_(N, ...) CONCAT_2(MACRO_MAP_FOR_, N)((MACRO_MAP_FOR_N_LIST), __VA_ARGS__, ) + +#define MACRO_MAP_FOR_0( n_list, ...) +#define MACRO_MAP_FOR_1( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) +#define MACRO_MAP_FOR_2( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_1 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_3( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_2 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_4( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_3 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_5( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_4 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_6( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_5 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_7( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_6 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_8( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_7 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_9( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_8 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_10(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_9 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_11(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_10((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_12(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_11((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_13(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_12((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_14(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_13((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_15(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_14((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) + + +/** + * @brief Mapping macro with current index and parameter + * + * Version of @ref MACRO_MAP_FOR that passes also the same parameter to all macros. + * + * @param param Parameter that would be passed to each macro call during mapping. + * @param ... Macro name to be used for argument processing followed by arguments to process. + * Macro should have following form: MACRO(argument, index, param) + * + * @return All arguments processed by given macro + */ +#define MACRO_MAP_FOR_PARAM(param, ...) MACRO_MAP_FOR_PARAM_(param, __VA_ARGS__) +#define MACRO_MAP_FOR_PARAM_(param, ...) MACRO_MAP_FOR_PARAM_N(NUM_VA_ARGS_LESS_1(__VA_ARGS__), param, __VA_ARGS__) + +/** + * @brief Mapping N arguments macro with with current index and parameter + * + * @param N Number of arguments to map + * @param param Parameter that would be passed to each macro call during mapping. + * @param ... Macro name to be used for argument processing followed by arguments to process. + * Macro should have following form: MACRO(argument, index, param) + * + * @return All arguments processed by given macro + */ +#define MACRO_MAP_FOR_PARAM_N(N, param, ...) MACRO_MAP_FOR_PARAM_N_(N, param, __VA_ARGS__) +#define MACRO_MAP_FOR_PARAM_N_(N, param, ...) CONCAT_2(MACRO_MAP_FOR_PARAM_, N)((MACRO_MAP_FOR_N_LIST), param, __VA_ARGS__, ) + + +#define MACRO_MAP_FOR_PARAM_0( n_list, param, ...) +#define MACRO_MAP_FOR_PARAM_1( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) +#define MACRO_MAP_FOR_PARAM_2( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_1 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_PARAM_3( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_2 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_PARAM_4( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_3 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_PARAM_5( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_4 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_PARAM_6( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_5 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_PARAM_7( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_6 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_PARAM_8( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_7 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_PARAM_9( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_8 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_PARAM_10(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_9 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_PARAM_11(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_10((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_PARAM_12(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_11((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_PARAM_13(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_12((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_PARAM_14(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_13((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) +#define MACRO_MAP_FOR_PARAM_15(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_14((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) + + +/** + * @brief Repeating macro. + * + * @param count Count of repeats. + * @param macro Macro must have the following form: MACRO(arguments). + * @param ... Arguments passed to the macro. + * + * @return All arguments processed by the given macro. + */ +#define MACRO_REPEAT(count, macro, ...) MACRO_REPEAT_(count, macro, __VA_ARGS__) +#define MACRO_REPEAT_(count, macro, ...) CONCAT_2(MACRO_REPEAT_, count)(macro, __VA_ARGS__) + +#define MACRO_REPEAT_0(macro, ...) +#define MACRO_REPEAT_1(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_0(macro, __VA_ARGS__) +#define MACRO_REPEAT_2(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_1(macro, __VA_ARGS__) +#define MACRO_REPEAT_3(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_2(macro, __VA_ARGS__) +#define MACRO_REPEAT_4(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_3(macro, __VA_ARGS__) +#define MACRO_REPEAT_5(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_4(macro, __VA_ARGS__) +#define MACRO_REPEAT_6(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_5(macro, __VA_ARGS__) +#define MACRO_REPEAT_7(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_6(macro, __VA_ARGS__) +#define MACRO_REPEAT_8(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_7(macro, __VA_ARGS__) +#define MACRO_REPEAT_9(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_8(macro, __VA_ARGS__) +#define MACRO_REPEAT_10(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_9(macro, __VA_ARGS__) +#define MACRO_REPEAT_11(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_10(macro, __VA_ARGS__) +#define MACRO_REPEAT_12(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_11(macro, __VA_ARGS__) +#define MACRO_REPEAT_13(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_12(macro, __VA_ARGS__) +#define MACRO_REPEAT_14(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_13(macro, __VA_ARGS__) +#define MACRO_REPEAT_15(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_14(macro, __VA_ARGS__) + + +/** + * @brief Repeating macro with current index. + * + * Macro similar to @ref MACRO_REPEAT but the processing function gets the arguments + * and the current argument index (beginning from 0). + + * @param count Count of repeats. + * @param macro Macro must have the following form: MACRO(index, arguments). + * @param ... Arguments passed to the macro. + * + * @return All arguments processed by the given macro. + */ +#define MACRO_REPEAT_FOR(count, macro, ...) MACRO_REPEAT_FOR_(count, macro, __VA_ARGS__) +#define MACRO_REPEAT_FOR_(count, macro, ...) CONCAT_2(MACRO_REPEAT_FOR_, count)((MACRO_MAP_FOR_N_LIST), macro, __VA_ARGS__) + +#define MACRO_REPEAT_FOR_0(n_list, macro, ...) +#define MACRO_REPEAT_FOR_1(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_0((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) +#define MACRO_REPEAT_FOR_2(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_1((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) +#define MACRO_REPEAT_FOR_3(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_2((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) +#define MACRO_REPEAT_FOR_4(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_3((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) +#define MACRO_REPEAT_FOR_5(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_4((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) +#define MACRO_REPEAT_FOR_6(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_5((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) +#define MACRO_REPEAT_FOR_7(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_6((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) +#define MACRO_REPEAT_FOR_8(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_7((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) +#define MACRO_REPEAT_FOR_9(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_8((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) +#define MACRO_REPEAT_FOR_10(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_9((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) +#define MACRO_REPEAT_FOR_11(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_10((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) +#define MACRO_REPEAT_FOR_12(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_11((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) +#define MACRO_REPEAT_FOR_13(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_12((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) +#define MACRO_REPEAT_FOR_14(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_13((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) +#define MACRO_REPEAT_FOR_15(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_14((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) + +/**@brief Adding curly brace to the macro parameter. + * + * Useful in array of structures initialization. + * + * @param p Parameter to put into the curly brace. */ +#define PARAM_CBRACE(p) { p }, + + +/**@brief Function for changing the value unit. + * + * @param[in] value Value to be rescaled. + * @param[in] old_unit_reversal Reversal of the incoming unit. + * @param[in] new_unit_reversal Reversal of the desired unit. + * + * @return Number of bytes written. + */ +static __INLINE uint64_t value_rescale(uint32_t value, uint32_t old_unit_reversal, uint16_t new_unit_reversal) +{ + return (uint64_t)ROUNDED_DIV((uint64_t)value * new_unit_reversal, old_unit_reversal); +} + +/**@brief Function for encoding a uint16 value. + * + * @param[in] value Value to be encoded. + * @param[out] p_encoded_data Buffer where the encoded data is to be written. + * + * @return Number of bytes written. + */ +static __INLINE uint8_t uint16_encode(uint16_t value, uint8_t * p_encoded_data) +{ + p_encoded_data[0] = (uint8_t) ((value & 0x00FF) >> 0); + p_encoded_data[1] = (uint8_t) ((value & 0xFF00) >> 8); + return sizeof(uint16_t); +} + +/**@brief Function for encoding a three-byte value. + * + * @param[in] value Value to be encoded. + * @param[out] p_encoded_data Buffer where the encoded data is to be written. + * + * @return Number of bytes written. + */ +static __INLINE uint8_t uint24_encode(uint32_t value, uint8_t * p_encoded_data) +{ + p_encoded_data[0] = (uint8_t) ((value & 0x000000FF) >> 0); + p_encoded_data[1] = (uint8_t) ((value & 0x0000FF00) >> 8); + p_encoded_data[2] = (uint8_t) ((value & 0x00FF0000) >> 16); + return 3; +} + +/**@brief Function for encoding a uint32 value. + * + * @param[in] value Value to be encoded. + * @param[out] p_encoded_data Buffer where the encoded data is to be written. + * + * @return Number of bytes written. + */ +static __INLINE uint8_t uint32_encode(uint32_t value, uint8_t * p_encoded_data) +{ + p_encoded_data[0] = (uint8_t) ((value & 0x000000FF) >> 0); + p_encoded_data[1] = (uint8_t) ((value & 0x0000FF00) >> 8); + p_encoded_data[2] = (uint8_t) ((value & 0x00FF0000) >> 16); + p_encoded_data[3] = (uint8_t) ((value & 0xFF000000) >> 24); + return sizeof(uint32_t); +} + +/**@brief Function for encoding a uint40 value. + * + * @param[in] value Value to be encoded. + * @param[out] p_encoded_data Buffer where the encoded data is to be written. + * + * @return Number of bytes written. + */ +static __INLINE uint8_t uint40_encode(uint64_t value, uint8_t * p_encoded_data) +{ + p_encoded_data[0] = (uint8_t) ((value & 0x00000000FF) >> 0); + p_encoded_data[1] = (uint8_t) ((value & 0x000000FF00) >> 8); + p_encoded_data[2] = (uint8_t) ((value & 0x0000FF0000) >> 16); + p_encoded_data[3] = (uint8_t) ((value & 0x00FF000000) >> 24); + p_encoded_data[4] = (uint8_t) ((value & 0xFF00000000) >> 32); + return 5; +} + +/**@brief Function for encoding a uint48 value. + * + * @param[in] value Value to be encoded. + * @param[out] p_encoded_data Buffer where the encoded data is to be written. + * + * @return Number of bytes written. + */ +static __INLINE uint8_t uint48_encode(uint64_t value, uint8_t * p_encoded_data) +{ + p_encoded_data[0] = (uint8_t) ((value & 0x0000000000FF) >> 0); + p_encoded_data[1] = (uint8_t) ((value & 0x00000000FF00) >> 8); + p_encoded_data[2] = (uint8_t) ((value & 0x000000FF0000) >> 16); + p_encoded_data[3] = (uint8_t) ((value & 0x0000FF000000) >> 24); + p_encoded_data[4] = (uint8_t) ((value & 0x00FF00000000) >> 32); + p_encoded_data[5] = (uint8_t) ((value & 0xFF0000000000) >> 40); + return 6; +} + +/**@brief Function for decoding a uint16 value. + * + * @param[in] p_encoded_data Buffer where the encoded data is stored. + * + * @return Decoded value. + */ +static __INLINE uint16_t uint16_decode(const uint8_t * p_encoded_data) +{ + return ( (((uint16_t)((uint8_t *)p_encoded_data)[0])) | + (((uint16_t)((uint8_t *)p_encoded_data)[1]) << 8 )); +} + +/**@brief Function for decoding a uint16 value in big-endian format. + * + * @param[in] p_encoded_data Buffer where the encoded data is stored. + * + * @return Decoded value. + */ +static __INLINE uint16_t uint16_big_decode(const uint8_t * p_encoded_data) +{ + return ( (((uint16_t)((uint8_t *)p_encoded_data)[0]) << 8 ) | + (((uint16_t)((uint8_t *)p_encoded_data)[1])) ); +} + +/**@brief Function for decoding a three-byte value. + * + * @param[in] p_encoded_data Buffer where the encoded data is stored. + * + * @return Decoded value (uint32_t). + */ +static __INLINE uint32_t uint24_decode(const uint8_t * p_encoded_data) +{ + return ( (((uint32_t)((uint8_t *)p_encoded_data)[0]) << 0) | + (((uint32_t)((uint8_t *)p_encoded_data)[1]) << 8) | + (((uint32_t)((uint8_t *)p_encoded_data)[2]) << 16)); +} + +/**@brief Function for decoding a uint32 value. + * + * @param[in] p_encoded_data Buffer where the encoded data is stored. + * + * @return Decoded value. + */ +static __INLINE uint32_t uint32_decode(const uint8_t * p_encoded_data) +{ + return ( (((uint32_t)((uint8_t *)p_encoded_data)[0]) << 0) | + (((uint32_t)((uint8_t *)p_encoded_data)[1]) << 8) | + (((uint32_t)((uint8_t *)p_encoded_data)[2]) << 16) | + (((uint32_t)((uint8_t *)p_encoded_data)[3]) << 24 )); +} + +/**@brief Function for decoding a uint32 value in big-endian format. + * + * @param[in] p_encoded_data Buffer where the encoded data is stored. + * + * @return Decoded value. + */ +static __INLINE uint32_t uint32_big_decode(const uint8_t * p_encoded_data) +{ + return ( (((uint32_t)((uint8_t *)p_encoded_data)[0]) << 24) | + (((uint32_t)((uint8_t *)p_encoded_data)[1]) << 16) | + (((uint32_t)((uint8_t *)p_encoded_data)[2]) << 8) | + (((uint32_t)((uint8_t *)p_encoded_data)[3]) << 0) ); +} + +/** + * @brief Function for encoding an uint16 value in big-endian format. + * + * @param[in] value Value to be encoded. + * @param[out] p_encoded_data Buffer where the encoded data will be written. + * + * @return Number of bytes written. + */ +static __INLINE uint8_t uint16_big_encode(uint16_t value, uint8_t * p_encoded_data) +{ + p_encoded_data[0] = (uint8_t) (value >> 8); + p_encoded_data[1] = (uint8_t) (value & 0xFF); + + return sizeof(uint16_t); +} + +/*lint -esym(526, __rev) */ +/*lint -esym(628, __rev) */ +/**@brief Function for encoding a uint32 value in big-endian format. + * + * @param[in] value Value to be encoded. + * @param[out] p_encoded_data Buffer where the encoded data will be written. + * + * @return Number of bytes written. + */ +static __INLINE uint8_t uint32_big_encode(uint32_t value, uint8_t * p_encoded_data) +{ + *(uint32_t *)p_encoded_data = __REV(value); + return sizeof(uint32_t); +} + +/**@brief Function for decoding a uint40 value. + * + * @param[in] p_encoded_data Buffer where the encoded data is stored. + * + * @return Decoded value. (uint64_t) + */ +static __INLINE uint64_t uint40_decode(const uint8_t * p_encoded_data) +{ + return ( (((uint64_t)((uint8_t *)p_encoded_data)[0]) << 0) | + (((uint64_t)((uint8_t *)p_encoded_data)[1]) << 8) | + (((uint64_t)((uint8_t *)p_encoded_data)[2]) << 16) | + (((uint64_t)((uint8_t *)p_encoded_data)[3]) << 24) | + (((uint64_t)((uint8_t *)p_encoded_data)[4]) << 32 )); +} + +/**@brief Function for decoding a uint48 value. + * + * @param[in] p_encoded_data Buffer where the encoded data is stored. + * + * @return Decoded value. (uint64_t) + */ +static __INLINE uint64_t uint48_decode(const uint8_t * p_encoded_data) +{ + return ( (((uint64_t)((uint8_t *)p_encoded_data)[0]) << 0) | + (((uint64_t)((uint8_t *)p_encoded_data)[1]) << 8) | + (((uint64_t)((uint8_t *)p_encoded_data)[2]) << 16) | + (((uint64_t)((uint8_t *)p_encoded_data)[3]) << 24) | + (((uint64_t)((uint8_t *)p_encoded_data)[4]) << 32) | + (((uint64_t)((uint8_t *)p_encoded_data)[5]) << 40 )); +} + +/** @brief Function for converting the input voltage (in milli volts) into percentage of 3.0 Volts. + * + * @details The calculation is based on a linearized version of the battery's discharge + * curve. 3.0V returns 100% battery level. The limit for power failure is 2.1V and + * is considered to be the lower boundary. + * + * The discharge curve for CR2032 is non-linear. In this model it is split into + * 4 linear sections: + * - Section 1: 3.0V - 2.9V = 100% - 42% (58% drop on 100 mV) + * - Section 2: 2.9V - 2.74V = 42% - 18% (24% drop on 160 mV) + * - Section 3: 2.74V - 2.44V = 18% - 6% (12% drop on 300 mV) + * - Section 4: 2.44V - 2.1V = 6% - 0% (6% drop on 340 mV) + * + * These numbers are by no means accurate. Temperature and + * load in the actual application is not accounted for! + * + * @param[in] mvolts The voltage in mV + * + * @return Battery level in percent. +*/ +static __INLINE uint8_t battery_level_in_percent(const uint16_t mvolts) +{ + uint8_t battery_level; + + if (mvolts >= 3000) + { + battery_level = 100; + } + else if (mvolts > 2900) + { + battery_level = 100 - ((3000 - mvolts) * 58) / 100; + } + else if (mvolts > 2740) + { + battery_level = 42 - ((2900 - mvolts) * 24) / 160; + } + else if (mvolts > 2440) + { + battery_level = 18 - ((2740 - mvolts) * 12) / 300; + } + else if (mvolts > 2100) + { + battery_level = 6 - ((2440 - mvolts) * 6) / 340; + } + else + { + battery_level = 0; + } + + return battery_level; +} + +/**@brief Function for checking if a pointer value is aligned to a 4 byte boundary. + * + * @param[in] p Pointer value to be checked. + * + * @return TRUE if pointer is aligned to a 4 byte boundary, FALSE otherwise. + */ +static __INLINE bool is_word_aligned(void const* p) +{ + return (((uintptr_t)p & 0x03) == 0); +} + +/*lint -e{568, 685} */ +/** + * @brief Function for checking if provided address is located in stack space. + * + * @param[in] ptr Pointer to be checked. + * + * @return true if address is in stack space, false otherwise. + */ +static __INLINE bool is_address_from_stack(void * ptr) +{ + if (((uint32_t)ptr >= (uint32_t)STACK_BASE) && + ((uint32_t)ptr < (uint32_t)STACK_TOP) ) + { + return true; + } + else + { + return false; + } +} + +#ifdef __cplusplus +} +#endif + +#endif // APP_UTIL_H__ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_util_bds.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_util_bds.h new file mode 100644 index 00000000000..24ae12fc990 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_util_bds.h @@ -0,0 +1,449 @@ +/** + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/** @file + * + * @defgroup app_util Utility Functions and Definitions + * @{ + * @ingroup app_common + * + * @brief Various types and definitions available to all applications. + */ + +#ifndef APP_UTIL_BDS_H__ +#define APP_UTIL_BDS_H__ + +#include +#include +#include +#include "compiler_abstraction.h" +#include "app_util.h" +#include "ble_srv_common.h" +#include "nordic_common.h" + +#ifdef __cplusplus +extern "C" { +#endif + +typedef uint8_t nibble_t; +typedef uint32_t uint24_t; +typedef uint64_t uint40_t; + +/**@brief IEEE 11073-20601 Regulatory Certification Data List Structure */ +typedef struct +{ + uint8_t * p_list; /**< Pointer the byte array containing the encoded opaque structure based on IEEE 11073-20601 specification. */ + uint8_t list_len; /**< Length of the byte array. */ +} regcertdatalist_t; + +/**@brief SFLOAT format (IEEE-11073 16-bit FLOAT, meaning 4 bits for exponent (base 10) and 12 bits mantissa) */ +typedef struct +{ + int8_t exponent; /**< Base 10 exponent, should be using only 4 bits */ + int16_t mantissa; /**< Mantissa, should be using only 12 bits */ +} sfloat_t; + +/**@brief Date and Time structure. */ +typedef struct +{ + uint16_t year; + uint8_t month; + uint8_t day; + uint8_t hours; + uint8_t minutes; + uint8_t seconds; +} ble_date_time_t; + + +/**@brief Function for encoding a uint16 value. + * + * @param[in] p_value Value to be encoded. + * @param[out] p_encoded_data Buffer where the encoded data is to be written. + * + * @return Number of bytes written. + */ +static __INLINE uint8_t bds_uint16_encode(const uint16_t * p_value, uint8_t * p_encoded_data) +{ + p_encoded_data[0] = (uint8_t) ((*p_value & 0x00FF) >> 0); + p_encoded_data[1] = (uint8_t) ((*p_value & 0xFF00) >> 8); + return sizeof(uint16_t); +} + +static __INLINE uint8_t bds_int16_encode(const int16_t * p_value, uint8_t * p_encoded_data) +{ + uint16_t tmp = *p_value; + return bds_uint16_encode(&tmp, p_encoded_data); +} + +/**@brief Function for encoding a uint24 value. + * + * @param[in] p_value Value to be encoded. + * @param[out] p_encoded_data Buffer where the encoded data is to be written. + * + * @return Number of bytes written. + */ +static __INLINE uint8_t bds_uint24_encode(const uint32_t * p_value, uint8_t * p_encoded_data) +{ + p_encoded_data[0] = (uint8_t) ((*p_value & 0x000000FF) >> 0); + p_encoded_data[1] = (uint8_t) ((*p_value & 0x0000FF00) >> 8); + p_encoded_data[2] = (uint8_t) ((*p_value & 0x00FF0000) >> 16); + return (3); +} + + +/**@brief Function for encoding a uint32 value. + * + * @param[in] p_value Value to be encoded. + * @param[out] p_encoded_data Buffer where the encoded data is to be written. + * + * @return Number of bytes written. + */ +static __INLINE uint8_t bds_uint32_encode(const uint32_t * p_value, uint8_t * p_encoded_data) +{ + p_encoded_data[0] = (uint8_t) ((*p_value & 0x000000FF) >> 0); + p_encoded_data[1] = (uint8_t) ((*p_value & 0x0000FF00) >> 8); + p_encoded_data[2] = (uint8_t) ((*p_value & 0x00FF0000) >> 16); + p_encoded_data[3] = (uint8_t) ((*p_value & 0xFF000000) >> 24); + return sizeof(uint32_t); +} + + +/**@brief Function for encoding a uint40 value. + * + * @param[in] p_value Value to be encoded. + * @param[out] p_encoded_data Buffer where the encoded data is to be written. + * + * @return Number of bytes written. + */ +static __INLINE uint8_t bds_uint40_encode(const uint64_t * p_value, uint8_t * p_encoded_data) +{ + p_encoded_data[0] = (uint8_t) ((*p_value & 0x00000000000000FF) >> 0); + p_encoded_data[1] = (uint8_t) ((*p_value & 0x000000000000FF00) >> 8); + p_encoded_data[2] = (uint8_t) ((*p_value & 0x0000000000FF0000) >> 16); + p_encoded_data[3] = (uint8_t) ((*p_value & 0x00000000FF000000) >> 24); + p_encoded_data[4] = (uint8_t) ((*p_value & 0x000000FF00000000) >> 32); + return 5; +} + +/**@brief Function for encoding a sfloat value. + * + * @param[in] p_value Value to be encoded. + * @param[out] p_encoded_data Buffer where the encoded data is to be written. + * + * @return Number of bytes written. + */ +static __INLINE uint8_t bds_sfloat_encode(const sfloat_t * p_value, uint8_t * p_encoded_data) +{ + uint16_t encoded_val; + + encoded_val = ((p_value->exponent << 12) & 0xF000) | + ((p_value->mantissa << 0) & 0x0FFF); + + return(bds_uint16_encode(&encoded_val, p_encoded_data)); +} + + +/**@brief Function for encoding a uint8_array value. + * + * @param[in] p_value Value to be encoded. + * @param[out] p_encoded_data Buffer where the encoded data is to be written. + */ +static __INLINE uint8_t bds_uint8_array_encode(const uint8_array_t * p_value, + uint8_t * p_encoded_data) +{ + memcpy(p_encoded_data, p_value->p_data, p_value->size); + return p_value->size; +} + + +/**@brief Function for encoding a utf8_str value. + * + * @param[in] p_value Value to be encoded. + * @param[out] p_encoded_data Buffer where the encoded data is to be written. + + */ +static __INLINE uint8_t bds_ble_srv_utf8_str_encode(const ble_srv_utf8_str_t * p_value, + uint8_t * p_encoded_data) +{ + memcpy(p_encoded_data, p_value->p_str, p_value->length); + return p_value->length; +} + +/**@brief Function for encoding a regcertdatalist value. + * + * @param[in] p_value Value to be encoded. + * @param[out] p_encoded_data Buffer where the encoded data is to be written. + + */ +static __INLINE uint8_t bds_regcertdatalist_encode(const regcertdatalist_t * p_value, + uint8_t * p_encoded_data) +{ + memcpy(p_encoded_data, p_value->p_list, p_value->list_len); + return p_value->list_len; +} + + +/**@brief Function for decoding a date_time value. + * + * @param[in] p_date_time pointer to the date_time structure to encode. + * @param[in] p_encoded_data pointer to the encoded data + * @return length of the encoded field. + */ +static __INLINE uint8_t bds_ble_date_time_encode(const ble_date_time_t * p_date_time, + uint8_t * p_encoded_data) +{ + uint8_t len = bds_uint16_encode(&p_date_time->year, &p_encoded_data[0]); + + p_encoded_data[len++] = p_date_time->month; + p_encoded_data[len++] = p_date_time->day; + p_encoded_data[len++] = p_date_time->hours; + p_encoded_data[len++] = p_date_time->minutes; + p_encoded_data[len++] = p_date_time->seconds; + + return len; +} + + +/**@brief Function for decoding a uint16 value. + * + * @param[in] len length of the field to be decoded. + * @param[in] p_encoded_data Buffer where the encoded data is stored. + * @param[in] p_decoded_val pointer to the decoded value + * @return length of the decoded field. + */ +static __INLINE uint8_t bds_uint16_decode(const uint8_t len, + const uint8_t * p_encoded_data, + uint16_t * p_decoded_val) +{ + UNUSED_VARIABLE(len); + *p_decoded_val = (((uint16_t)((uint8_t *)p_encoded_data)[0])) | + (((uint16_t)((uint8_t *)p_encoded_data)[1]) << 8 ); + return (sizeof(uint16_t)); +} + + +/**@brief Function for decoding a int16 value. + * + * @param[in] len length of the field to be decoded. + * @param[in] p_encoded_data Buffer where the encoded data is stored. + * @param[in] p_decoded_val pointer to the decoded value + * @return length of the decoded field. + */ +static __INLINE uint8_t bds_int16_decode(const uint8_t len, + const uint8_t * p_encoded_data, + int16_t * p_decoded_val) +{ + UNUSED_VARIABLE(len); + uint16_t tmp = 0; + uint8_t retval = bds_uint16_decode(len, p_encoded_data, &tmp); + *p_decoded_val = (int16_t)tmp; + return retval; +} + + +/**@brief Function for decoding a uint24 value. + * + * @param[in] len length of the field to be decoded. + * @param[in] p_encoded_data Buffer where the encoded data is stored. + * @param[in] p_decoded_val pointer to the decoded value + * + * @return length of the decoded field. + */ +static __INLINE uint8_t bds_uint24_decode(const uint8_t len, + const uint8_t * p_encoded_data, + uint32_t * p_decoded_val) +{ + UNUSED_VARIABLE(len); + *p_decoded_val = (((uint32_t)((uint8_t *)p_encoded_data)[0]) << 0) | + (((uint32_t)((uint8_t *)p_encoded_data)[1]) << 8) | + (((uint32_t)((uint8_t *)p_encoded_data)[2]) << 16); + return (3); +} + + +/**@brief Function for decoding a uint32 value. + * + * @param[in] len length of the field to be decoded. + * @param[in] p_encoded_data Buffer where the encoded data is stored. + * @param[in] p_decoded_val pointer to the decoded value + * + * @return length of the decoded field. + */ +static __INLINE uint8_t bds_uint32_decode(const uint8_t len, + const uint8_t * p_encoded_data, + uint32_t * p_decoded_val) +{ + UNUSED_VARIABLE(len); + *p_decoded_val = (((uint32_t)((uint8_t *)p_encoded_data)[0]) << 0) | + (((uint32_t)((uint8_t *)p_encoded_data)[1]) << 8) | + (((uint32_t)((uint8_t *)p_encoded_data)[2]) << 16) | + (((uint32_t)((uint8_t *)p_encoded_data)[3]) << 24 ); + return (sizeof(uint32_t)); +} + + +/**@brief Function for decoding a uint40 value. + * + * @param[in] len length of the field to be decoded. + * @param[in] p_encoded_data Buffer where the encoded data is stored. + * @param[in] p_decoded_val pointer to the decoded value + * + * @return length of the decoded field. + */ +static __INLINE uint8_t bds_uint40_decode(const uint8_t len, + const uint8_t * p_encoded_data, + uint64_t * p_decoded_val) +{ + UNUSED_VARIABLE(len); + *p_decoded_val = (((uint64_t)((uint8_t *)p_encoded_data)[0]) << 0) | + (((uint64_t)((uint8_t *)p_encoded_data)[1]) << 8) | + (((uint64_t)((uint8_t *)p_encoded_data)[2]) << 16) | + (((uint64_t)((uint8_t *)p_encoded_data)[3]) << 24 )| + (((uint64_t)((uint8_t *)p_encoded_data)[4]) << 32 ); + return (40); +} + + +/**@brief Function for decoding a sfloat value. + * + * @param[in] len length of the field to be decoded. + * @param[in] p_encoded_data Buffer where the encoded data is stored. + * @param[in] p_decoded_val pointer to the decoded value + * + * @return length of the decoded field. + + */ +static __INLINE uint8_t bds_sfloat_decode(const uint8_t len, + const uint8_t * p_encoded_data, + sfloat_t * p_decoded_val) +{ + + p_decoded_val->exponent = 0; + bds_uint16_decode(len, p_encoded_data, (uint16_t*)&p_decoded_val->mantissa); + p_decoded_val->exponent = (uint8_t)((p_decoded_val->mantissa & 0xF000) >> 12); + p_decoded_val->mantissa &= 0x0FFF; + return len; +} + + +/**@brief Function for decoding a uint8_array value. + * + * @param[in] len length of the field to be decoded. + * @param[in] p_encoded_data Buffer where the encoded data is stored. + * @param[in] p_decoded_val pointer to the decoded value + * + * @return length of the decoded field. + */ +static __INLINE uint8_t bds_uint8_array_decode(const uint8_t len, + const uint8_t * p_encoded_data, + uint8_array_t * p_decoded_val) +{ + memcpy(p_decoded_val->p_data, p_encoded_data, len); + p_decoded_val->size = len; + return p_decoded_val->size; +} + + +/**@brief Function for decoding a utf8_str value. + * + * @param[in] len length of the field to be decoded. + * @param[in] p_encoded_data Buffer where the encoded data is stored. + * @param[in] p_decoded_val pointer to the decoded value + * + * @return length of the decoded field. + */ +static __INLINE uint8_t bds_ble_srv_utf8_str_decode(const uint8_t len, + const uint8_t * p_encoded_data, + ble_srv_utf8_str_t * p_decoded_val) +{ + p_decoded_val->p_str = (uint8_t*)p_encoded_data; + p_decoded_val->length = len; + return p_decoded_val->length; +} + + +/**@brief Function for decoding a regcertdatalist value. + * + * @param[in] len length of the field to be decoded. + * @param[in] p_encoded_data Buffer where the encoded data is stored. + * @param[in] p_decoded_val pointer to the decoded value + * + * @return length of the decoded field. + */ +static __INLINE uint8_t bds_regcertdatalist_decode(const uint8_t len, + const uint8_t * p_encoded_data, + regcertdatalist_t * p_decoded_val) +{ + memcpy(p_decoded_val->p_list, p_encoded_data, len); + p_decoded_val->list_len = len; + return p_decoded_val->list_len; +} + + +/**@brief Function for decoding a date_time value. + * + * @param[in] len length of the field to be decoded. + * @param[in] p_encoded_data Buffer where the encoded data is stored. + * @param[in] p_date_time pointer to the decoded value + * + * @return length of the decoded field. + */ +static __INLINE uint8_t bds_ble_date_time_decode(const uint8_t len, + const uint8_t * p_encoded_data, + ble_date_time_t * p_date_time) +{ + UNUSED_VARIABLE(len); + uint8_t pos = bds_uint16_decode(len, &p_encoded_data[0], &p_date_time->year); + p_date_time->month = p_encoded_data[pos++]; + p_date_time->day = p_encoded_data[pos++]; + p_date_time->hours = p_encoded_data[pos++]; + p_date_time->minutes = p_encoded_data[pos++]; + p_date_time->seconds = p_encoded_data[pos++]; + + return pos; +} + + +#ifdef __cplusplus +} +#endif + +#endif // APP_UTIL_BDS_H__ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_util_platform.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_util_platform.c new file mode 100644 index 00000000000..71690d0fdc5 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_util_platform.c @@ -0,0 +1,127 @@ +/** + * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "app_util_platform.h" + +#ifdef SOFTDEVICE_PRESENT +/* Global nvic state instance, required by nrf_nvic.h */ +nrf_nvic_state_t nrf_nvic_state; +#endif + +static uint32_t m_in_critical_region = 0; + +void app_util_disable_irq(void) +{ + __disable_irq(); + m_in_critical_region++; +} + +void app_util_enable_irq(void) +{ + m_in_critical_region--; + if (m_in_critical_region == 0) + { + __enable_irq(); + } +} + +void app_util_critical_region_enter(uint8_t *p_nested) +{ +#if __CORTEX_M == (0x04U) + ASSERT(APP_LEVEL_PRIVILEGED == privilege_level_get()) +#endif + +#if defined(SOFTDEVICE_PRESENT) + /* return value can be safely ignored */ + (void) sd_nvic_critical_region_enter(p_nested); +#else + app_util_disable_irq(); +#endif +} + +void app_util_critical_region_exit(uint8_t nested) +{ +#if __CORTEX_M == (0x04U) + ASSERT(APP_LEVEL_PRIVILEGED == privilege_level_get()) +#endif + +#if defined(SOFTDEVICE_PRESENT) + /* return value can be safely ignored */ + (void) sd_nvic_critical_region_exit(nested); +#else + app_util_enable_irq(); +#endif +} + + +uint8_t privilege_level_get(void) +{ +#if __CORTEX_M == (0x00U) || defined(_WIN32) || defined(__unix) || defined(__APPLE__) + /* the Cortex-M0 has no concept of privilege */ + return APP_LEVEL_PRIVILEGED; +#elif __CORTEX_M == (0x04U) + uint32_t isr_vector_num = __get_IPSR() & IPSR_ISR_Msk ; + if (0 == isr_vector_num) + { + /* Thread Mode, check nPRIV */ + int32_t control = __get_CONTROL(); + return control & CONTROL_nPRIV_Msk ? APP_LEVEL_UNPRIVILEGED : APP_LEVEL_PRIVILEGED; + } + else + { + /* Handler Mode, always privileged */ + return APP_LEVEL_PRIVILEGED; + } +#endif +} + + +uint8_t current_int_priority_get(void) +{ + uint32_t isr_vector_num = __get_IPSR() & IPSR_ISR_Msk ; + if (isr_vector_num > 0) + { + int32_t irq_type = ((int32_t)isr_vector_num - EXTERNAL_INT_VECTOR_OFFSET); + return (NVIC_GetPriority((IRQn_Type)irq_type) & 0xFF); + } + else + { + return APP_IRQ_PRIORITY_THREAD; + } +} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_util_platform.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_util_platform.h new file mode 100644 index 00000000000..ed478f39839 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_util_platform.h @@ -0,0 +1,279 @@ +/** + * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/**@file + * + * @defgroup app_util_platform Utility Functions and Definitions (Platform) + * @{ + * @ingroup app_common + * + * @brief Various types and definitions available to all applications when using SoftDevice. + */ + +#ifndef APP_UTIL_PLATFORM_H__ +#define APP_UTIL_PLATFORM_H__ + +#include +#include "compiler_abstraction.h" +#include "nrf.h" +#ifdef SOFTDEVICE_PRESENT +#include "nrf_soc.h" +#include "nrf_nvic.h" +#endif +#include "nrf_assert.h" +#include "app_error.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#if __CORTEX_M == (0x00U) +#define _PRIO_SD_HIGH 0 +#define _PRIO_APP_HIGH 1 +#define _PRIO_APP_MID 1 +#define _PRIO_SD_LOW 2 +#define _PRIO_APP_LOW 3 +#define _PRIO_APP_LOWEST 3 +#define _PRIO_THREAD 4 +#elif __CORTEX_M == (0x04U) +#define _PRIO_SD_HIGH 0 +#define _PRIO_SD_MID 1 +#define _PRIO_APP_HIGH 2 +#define _PRIO_APP_MID 3 +#define _PRIO_SD_LOW 4 +#define _PRIO_SD_LOWEST 5 +#define _PRIO_APP_LOW 6 +#define _PRIO_APP_LOWEST 7 +#define _PRIO_THREAD 15 +#else + #error "No platform defined" +#endif + + +//lint -save -e113 -e452 +/**@brief The interrupt priorities available to the application while the SoftDevice is active. */ +typedef enum +{ +#ifndef SOFTDEVICE_PRESENT + APP_IRQ_PRIORITY_HIGHEST = _PRIO_SD_HIGH, +#else + APP_IRQ_PRIORITY_HIGHEST = _PRIO_APP_HIGH, +#endif + APP_IRQ_PRIORITY_HIGH = _PRIO_APP_HIGH, +#ifndef SOFTDEVICE_PRESENT + APP_IRQ_PRIORITY_MID = _PRIO_SD_LOW, +#else + APP_IRQ_PRIORITY_MID = _PRIO_APP_MID, +#endif + APP_IRQ_PRIORITY_LOW = _PRIO_APP_LOW, + APP_IRQ_PRIORITY_LOWEST = _PRIO_APP_LOWEST, + APP_IRQ_PRIORITY_THREAD = _PRIO_THREAD /**< "Interrupt level" when running in Thread Mode. */ +} app_irq_priority_t; +//lint -restore + + +/*@brief The privilege levels available to applications in Thread Mode */ +typedef enum +{ + APP_LEVEL_UNPRIVILEGED, + APP_LEVEL_PRIVILEGED +} app_level_t; + +/**@cond NO_DOXYGEN */ +#define EXTERNAL_INT_VECTOR_OFFSET 16 +/**@endcond */ + +/**@brief Macro for setting a breakpoint. + */ +#if defined(__GNUC__) +#define NRF_BREAKPOINT __asm__("BKPT 0"); +#else +#define NRF_BREAKPOINT __BKPT(0) +#endif + +/** @brief Macro for setting a breakpoint. + * + * If it is possible to detect debugger presence then it is set only in that case. + * + */ +#if __CORTEX_M == 0x04 +#define NRF_BREAKPOINT_COND do { \ + /* C_DEBUGEN == 1 -> Debugger Connected */ \ + if (CoreDebug->DHCSR & CoreDebug_DHCSR_C_DEBUGEN_Msk) \ + { \ + /* Generate breakpoint if debugger is connected */ \ + NRF_BREAKPOINT; \ + } \ + }while (0) +#else +#define NRF_BREAKPOINT_COND NRF_BREAKPOINT +#endif // __CORTEX_M == 0x04 + +#if defined ( __CC_ARM ) +#define PACKED(TYPE) __packed TYPE +#define PACKED_STRUCT PACKED(struct) +#elif defined ( __GNUC__ ) +#define PACKED __attribute__((packed)) +#define PACKED_STRUCT struct PACKED +#elif defined (__ICCARM__) +#define PACKED_STRUCT __packed struct +#endif + +#if defined ( __CC_ARM ) +#define PRAGMA_OPTIMIZATION_FORCE_START _Pragma ("push") \ + _Pragma ("O3") +#define PRAGMA_OPTIMIZATION_FORCE_END _Pragma ("pop") +#elif defined ( __GNUC__ ) +#define PRAGMA_OPTIMIZATION_FORCE_START _Pragma("GCC push_options") \ + _Pragma ("GCC optimize (\"Os\")") +#define PRAGMA_OPTIMIZATION_FORCE_END _Pragma ("GCC pop_options") +#elif defined (__ICCARM__) +#define PRAGMA_OPTIMIZATION_FORCE_START _Pragma ("optimize=high z") +#define PRAGMA_OPTIMIZATION_FORCE_END +#endif + + +void app_util_critical_region_enter (uint8_t *p_nested); +void app_util_critical_region_exit (uint8_t nested); + +/**@brief Macro for entering a critical region. + * + * @note Due to implementation details, there must exist one and only one call to + * CRITICAL_REGION_EXIT() for each call to CRITICAL_REGION_ENTER(), and they must be located + * in the same scope. + */ +#ifdef SOFTDEVICE_PRESENT +#define CRITICAL_REGION_ENTER() \ + { \ + uint8_t __CR_NESTED = 0; \ + app_util_critical_region_enter(&__CR_NESTED); +#else +#define CRITICAL_REGION_ENTER() app_util_critical_region_enter(NULL) +#endif + +/**@brief Macro for leaving a critical region. + * + * @note Due to implementation details, there must exist one and only one call to + * CRITICAL_REGION_EXIT() for each call to CRITICAL_REGION_ENTER(), and they must be located + * in the same scope. + */ +#ifdef SOFTDEVICE_PRESENT +#define CRITICAL_REGION_EXIT() \ + app_util_critical_region_exit(__CR_NESTED); \ + } +#else +#define CRITICAL_REGION_EXIT() app_util_critical_region_exit(0) +#endif + +/* Workaround for Keil 4 */ +#ifndef IPSR_ISR_Msk +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ +#endif + + + +/**@brief Macro to enable anonymous unions from a certain point in the code. + */ +#if defined(__CC_ARM) + #define ANON_UNIONS_ENABLE _Pragma("push") \ + _Pragma("anon_unions") \ + struct semicolon_swallower +#elif defined(__ICCARM__) + #define ANON_UNIONS_ENABLE _Pragma("language=extended") \ + struct semicolon_swallower +#else + #define ANON_UNIONS_ENABLE struct semicolon_swallower + // No action will be taken. + // For GCC anonymous unions are enabled by default. +#endif + +/**@brief Macro to disable anonymous unions from a certain point in the code. + * @note Call only after first calling @ref ANON_UNIONS_ENABLE. + */ +#if defined(__CC_ARM) + #define ANON_UNIONS_DISABLE _Pragma("pop") \ + struct semicolon_swallower +#elif defined(__ICCARM__) + #define ANON_UNIONS_DISABLE struct semicolon_swallower + // for IAR leave anonymous unions enabled +#else + #define ANON_UNIONS_DISABLE struct semicolon_swallower + // No action will be taken. + // For GCC anonymous unions are enabled by default. +#endif + +/**@brief Macro for adding pragma directive only for GCC. + */ +#ifdef __GNUC__ +#define GCC_PRAGMA(v) _Pragma(v) +#else +#define GCC_PRAGMA(v) +#endif + +/* Workaround for Keil 4 */ +#ifndef CONTROL_nPRIV_Msk +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ +#endif + +/**@brief Function for finding the current interrupt level. + * + * @return Current interrupt level. + * @retval APP_IRQ_PRIORITY_HIGH We are running in Application High interrupt level. + * @retval APP_IRQ_PRIORITY_LOW We are running in Application Low interrupt level. + * @retval APP_IRQ_PRIORITY_THREAD We are running in Thread Mode. + */ +uint8_t current_int_priority_get(void); + + +/**@brief Function for finding out the current privilege level. + * + * @return Current privilege level. + * @retval APP_LEVEL_UNPRIVILEGED We are running in unprivileged level. + * @retval APP_LEVEL_PRIVILEGED We are running in privileged level. + */ +uint8_t privilege_level_get(void); + + +#ifdef __cplusplus +} +#endif + +#endif // APP_UTIL_PLATFORM_H__ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/nordic_common.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/nordic_common.h new file mode 100644 index 00000000000..1492acffb1d --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/nordic_common.h @@ -0,0 +1,215 @@ +/** + * Copyright (c) 2008 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/** @file + * @brief Common defines and macros for firmware developed by Nordic Semiconductor. + */ + +#ifndef NORDIC_COMMON_H__ +#define NORDIC_COMMON_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Check if selected module is enabled + * + * This is save function for driver enable checking. + * Correct from Lint point of view (not using default of undefined value). + * + * Usage: + * @code + #if NRF_MODULE_ENABLED(UART) + ... + #endif + * @endcode + * + * @param module The module name. + * + * @retval 1 The macro _ENABLE is defined and is non-zero. + * @retval 0 The macro _ENABLE is not defined or it equals zero. + * + * @note + * This macro intentionally does not implement second expansion level. + * The name of the module to be checked has to be given directly as a parameter. + * And given parameter would be connected with @c _ENABLED postfix directly + * without evaluating its value. + */ +//lint -emacro(491,NRF_MODULE_ENABLED) // Suppers warning 491 "non-standard use of 'defined' preprocessor operator" +#ifdef NRF_MODULE_ENABLE_ALL +#warning "Do not use NRF_MODULE_ENABLE_ALL for real builds." +#define NRF_MODULE_ENABLED(module) 1 +#else +#define NRF_MODULE_ENABLED(module) \ + ((defined(module ## _ENABLED) && (module ## _ENABLED)) ? 1 : 0) +#endif +/** The upper 8 bits of a 32 bit value */ +//lint -emacro(572,MSB_32) // Suppress warning 572 "Excessive shift value" +#define MSB_32(a) (((a) & 0xFF000000) >> 24) +/** The lower 8 bits (of a 32 bit value) */ +#define LSB_32(a) ((a) & 0x000000FF) + +/** The upper 8 bits of a 16 bit value */ +//lint -emacro(572,MSB_16) // Suppress warning 572 "Excessive shift value" +#define MSB_16(a) (((a) & 0xFF00) >> 8) +/** The lower 8 bits (of a 16 bit value) */ +#define LSB_16(a) ((a) & 0x00FF) + +/** Leaves the minimum of the two 32-bit arguments */ +/*lint -emacro(506, MIN) */ /* Suppress "Constant value Boolean */ +#define MIN(a, b) ((a) < (b) ? (a) : (b)) +/** Leaves the maximum of the two 32-bit arguments */ +/*lint -emacro(506, MAX) */ /* Suppress "Constant value Boolean */ +#define MAX(a, b) ((a) < (b) ? (b) : (a)) + +/**@brief Concatenates two parameters. + * + * It realizes two level expansion to make it sure that all the parameters + * are actually expanded before gluing them together. + * + * @param p1 First parameter to concatenating + * @param p2 Second parameter to concatenating + * + * @return Two parameters glued together. + * They have to create correct C mnemonic in other case + * preprocessor error would be generated. + * + * @sa CONCAT_3 + */ +#define CONCAT_2(p1, p2) CONCAT_2_(p1, p2) +/** Auxiliary macro used by @ref CONCAT_2 */ +#define CONCAT_2_(p1, p2) p1##p2 + +/**@brief Concatenates three parameters. + * + * It realizes two level expansion to make it sure that all the parameters + * are actually expanded before gluing them together. + * + * @param p1 First parameter to concatenating + * @param p2 Second parameter to concatenating + * @param p3 Third parameter to concatenating + * + * @return Three parameters glued together. + * They have to create correct C mnemonic in other case + * preprocessor error would be generated. + * + * @sa CONCAT_2 + */ +#define CONCAT_3(p1, p2, p3) CONCAT_3_(p1, p2, p3) +/** Auxiliary macro used by @ref CONCAT_3 */ +#define CONCAT_3_(p1, p2, p3) p1##p2##p3 + +#define STRINGIFY_(val) #val +/** Converts a macro argument into a character constant. + */ +#define STRINGIFY(val) STRINGIFY_(val) + +/** Counts number of elements inside the array + */ +#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) + +/**@brief Set a bit in the uint32 word. + * + * @param[in] W Word whose bit is being set. + * @param[in] B Bit number in the word to be set. + */ +#define SET_BIT(W, B) ((W) |= (uint32_t)(1U << (B))) + + +/**@brief Clears a bit in the uint32 word. + * + * @param[in] W Word whose bit is to be cleared. + * @param[in] B Bit number in the word to be cleared. + */ +#define CLR_BIT(W, B) ((W) &= (~(uint32_t)(1U << (B)))) + + +/**@brief Checks if a bit is set. + * + * @param[in] W Word whose bit is to be checked. + * @param[in] B Bit number in the word to be checked. + * + * @retval 1 if bit is set. + * @retval 0 if bit is not set. + */ +#define IS_SET(W, B) (((W) >> (B)) & 1) + +#define BIT_0 0x01 /**< The value of bit 0 */ +#define BIT_1 0x02 /**< The value of bit 1 */ +#define BIT_2 0x04 /**< The value of bit 2 */ +#define BIT_3 0x08 /**< The value of bit 3 */ +#define BIT_4 0x10 /**< The value of bit 4 */ +#define BIT_5 0x20 /**< The value of bit 5 */ +#define BIT_6 0x40 /**< The value of bit 6 */ +#define BIT_7 0x80 /**< The value of bit 7 */ +#define BIT_8 0x0100 /**< The value of bit 8 */ +#define BIT_9 0x0200 /**< The value of bit 9 */ +#define BIT_10 0x0400 /**< The value of bit 10 */ +#define BIT_11 0x0800 /**< The value of bit 11 */ +#define BIT_12 0x1000 /**< The value of bit 12 */ +#define BIT_13 0x2000 /**< The value of bit 13 */ +#define BIT_14 0x4000 /**< The value of bit 14 */ +#define BIT_15 0x8000 /**< The value of bit 15 */ +#define BIT_16 0x00010000 /**< The value of bit 16 */ +#define BIT_17 0x00020000 /**< The value of bit 17 */ +#define BIT_18 0x00040000 /**< The value of bit 18 */ +#define BIT_19 0x00080000 /**< The value of bit 19 */ +#define BIT_20 0x00100000 /**< The value of bit 20 */ +#define BIT_21 0x00200000 /**< The value of bit 21 */ +#define BIT_22 0x00400000 /**< The value of bit 22 */ +#define BIT_23 0x00800000 /**< The value of bit 23 */ +#define BIT_24 0x01000000 /**< The value of bit 24 */ +#define BIT_25 0x02000000 /**< The value of bit 25 */ +#define BIT_26 0x04000000 /**< The value of bit 26 */ +#define BIT_27 0x08000000 /**< The value of bit 27 */ +#define BIT_28 0x10000000 /**< The value of bit 28 */ +#define BIT_29 0x20000000 /**< The value of bit 29 */ +#define BIT_30 0x40000000 /**< The value of bit 30 */ +#define BIT_31 0x80000000 /**< The value of bit 31 */ + +#define UNUSED_VARIABLE(X) ((void)(X)) +#define UNUSED_PARAMETER(X) UNUSED_VARIABLE(X) +#define UNUSED_RETURN_VALUE(X) UNUSED_VARIABLE(X) + +#ifdef __cplusplus +} +#endif + +#endif // NORDIC_COMMON_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/nrf_assert.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/nrf_assert.c new file mode 100644 index 00000000000..6678e22e181 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/nrf_assert.c @@ -0,0 +1,54 @@ +/** + * Copyright (c) 2006 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "nrf_assert.h" +#include "app_error.h" +#include "nordic_common.h" + +__WEAK void assert_nrf_callback(uint16_t line_num, const uint8_t * file_name) +{ + assert_info_t assert_info = + { + .line_num = line_num, + .p_file_name = file_name, + }; + app_error_fault_handler(NRF_FAULT_ID_SDK_ASSERT, 0, (uint32_t)(&assert_info)); + + UNUSED_VARIABLE(assert_info); +} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/nrf_assert.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/nrf_assert.h new file mode 100644 index 00000000000..f0789104097 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/nrf_assert.h @@ -0,0 +1,122 @@ +/** + * Copyright (c) 2006 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/** @file + * @brief Utilities for verifying program logic + */ + +#ifndef NRF_ASSERT_H_ +#define NRF_ASSERT_H_ + +#include +#include "nrf.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @brief Function for handling assertions. + * + * + * @note + * This function is called when an assertion has triggered. + * + * @note + * This function is deprecated and will be removed in future releases. + * Use app_error_fault_handler instead. + * + * + * @post + * All hardware is put into an idle non-emitting state (in particular the radio is highly + * important to switch off since the radio might be in a state that makes it send + * packets continiously while a typical final infinit ASSERT loop is executing). + * + * + * @param line_num The line number where the assertion is called + * @param file_name Pointer to the file name + */ +//lint -save -esym(14, assert_nrf_callback) +void assert_nrf_callback(uint16_t line_num, const uint8_t *file_name); +//lint -restore + +#if (defined(DEBUG_NRF) || defined(DEBUG_NRF_USER)) +#define NRF_ASSERT_PRESENT 1 +#else +#define NRF_ASSERT_PRESENT 0 +#endif + +//#if defined(DEBUG_NRF) || defined(DEBUG_NRF_USER) + +/*lint -emacro(506, ASSERT) */ /* Suppress "Constant value Boolean */ +/*lint -emacro(774, ASSERT) */ /* Suppress "Boolean within 'if' always evaluates to True" */ \ + +/** @brief Function for checking intended for production code. + * + * Check passes if "expr" evaluates to true. */ + +#ifdef _lint +#define ASSERT(expr) \ +if (expr) \ +{ \ +} \ +else \ +{ \ + while (1); \ +} +#else //_lint +#define ASSERT(expr) \ +if (NRF_ASSERT_PRESENT) \ +{ \ + if (expr) \ + { \ + } \ + else \ + { \ + assert_nrf_callback((uint16_t)__LINE__, (uint8_t *)__FILE__); \ + } \ +} + +#endif + + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_ASSERT_H_ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/nrf_bitmask.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/nrf_bitmask.h new file mode 100644 index 00000000000..be2eac52b3e --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/nrf_bitmask.h @@ -0,0 +1,147 @@ +/** + * Copyright (c) 2006 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_BITMASK_H +#define NRF_BITMASK_H + +#include "compiler_abstraction.h" +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#define BITMASK_BYTE_GET(abs_bit) ((abs_bit)/8) +#define BITMASK_RELBIT_GET(abs_bit) ((abs_bit) & 0x00000007) + +/** + * Function for checking if bit in the multi-byte bit mask is set. + * + * @param bit Bit index. + * @param p_mask A pointer to mask with bit fields. + * + * @return 0 if bit is not set, positive value otherwise. + */ +__STATIC_INLINE uint32_t nrf_bitmask_bit_is_set(uint32_t bit, void const * p_mask) +{ + uint8_t const * p_mask8 = (uint8_t const *)p_mask; + uint32_t byte_idx = BITMASK_BYTE_GET(bit); + bit = BITMASK_RELBIT_GET(bit); + return (1 << bit) & p_mask8[byte_idx]; +} + +/** + * Function for setting a bit in the multi-byte bit mask. + * + * @param bit Bit index. + * @param p_mask A pointer to mask with bit fields. + */ +__STATIC_INLINE void nrf_bitmask_bit_set(uint32_t bit, void * p_mask) +{ + uint8_t * p_mask8 = (uint8_t *)p_mask; + uint32_t byte_idx = BITMASK_BYTE_GET(bit); + bit = BITMASK_RELBIT_GET(bit); + p_mask8[byte_idx] |= (1 << bit); +} + +/** + * Function for clearing a bit in the multi-byte bit mask. + * + * @param bit Bit index. + * @param p_mask A pointer to mask with bit fields. + */ +__STATIC_INLINE void nrf_bitmask_bit_clear(uint32_t bit, void * p_mask) +{ + uint8_t * p_mask8 = (uint8_t *)p_mask; + uint32_t byte_idx = BITMASK_BYTE_GET(bit); + bit = BITMASK_RELBIT_GET(bit); + p_mask8[byte_idx] &= ~(1 << bit); +} + +/** + * Function for performing bitwise OR operation on two multi-byte bit masks. + * + * @param p_mask1 A pointer to the first bit mask. + * @param p_mask2 A pointer to the second bit mask. + * @param p_mask_out A pointer to the output bit mask. + * @param length Length of output mask in bytes. + */ +__STATIC_INLINE void nrf_bitmask_masks_or(void const * p_mask1, + void const * p_mask2, + void * p_out_mask, + uint32_t length) +{ + uint8_t const * p_mask8_1 = (uint8_t const *)p_mask1; + uint8_t const * p_mask8_2 = (uint8_t const *)p_mask2; + uint8_t * p_mask8_out = (uint8_t *)p_out_mask; + uint32_t i; + for (i = 0; i < length; i++) + { + p_mask8_out[i] = p_mask8_1[i] | p_mask8_2[i]; + } +} + +/** + * Function for performing bitwise AND operation on two multi-byte bit masks. + * + * @param p_mask1 A pointer to the first bit mask. + * @param p_mask2 A pointer to the second bit mask. + * @param p_mask_out A pointer to the output bit mask. + * @param length Length of output mask in bytes. + */ +__STATIC_INLINE void nrf_bitmask_masks_and(void const * p_mask1, + void const * p_mask2, + void * p_out_mask, + uint32_t length) +{ + uint8_t const * p_mask8_1 = (uint8_t const *)p_mask1; + uint8_t const * p_mask8_2 = (uint8_t const *)p_mask2; + uint8_t * p_mask8_out = (uint8_t *)p_out_mask; + uint32_t i; + for (i = 0; i < length; i++) + { + p_mask8_out[i] = p_mask8_1[i] & p_mask8_2[i]; + } +} + +#ifdef __cplusplus +} +#endif + +#endif //NRF_BITMASK_H diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/sdk_alloca.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/sdk_alloca.h new file mode 100644 index 00000000000..2266dd3ba2e --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/sdk_alloca.h @@ -0,0 +1,85 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/** @file sdk_alloca.h + * + * @brief Defines alloca() function. + * + * @details This file defines alloca() function. This can be done directly or by including system + * header files. Not all platforms support alloca(). In this case no error will be shown, but + * SDK_ALLOCA_DEFINED will be set to 0. + */ + +#ifndef SDK_ALLOCA_H__ +#define SDK_ALLOCA_H__ + + +#if defined(__SDK_DOXYGEN__) + /** @brief Set to one it alloca() function is available on this platform and it is correctly defined + * by this header file. + */ + #define SDK_ALLOCA_DEFINED 1 +#elif defined(__GNUC__) + #if defined(__SES_ARM) + // SES does not have definition of alloca(), but it have working GCC's __builtin_alloca(). + #if !defined(alloca) + #define alloca(size) __builtin_alloca((size)) + #endif + #else + // alloca() can be defined in on some platforms, but if not then try standard header file. + #include + #if !defined(alloca) + #include + #endif + #endif + #define SDK_ALLOCA_DEFINED 1 +#elif defined(__IAR_SYSTEMS_ICC__) + // IAR does not support alloca() function. + #define SDK_ALLOCA_DEFINED 0 +#else + // All other supported compilers have alloca() definition in header file. + #include + #define SDK_ALLOCA_DEFINED 1 +#endif + + +/*lint -"d__builtin_alloca=(void*)" */ + + +#endif // NRF_ALLOCA_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/sdk_common.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/sdk_common.h new file mode 100644 index 00000000000..6f65d033215 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/sdk_common.h @@ -0,0 +1,77 @@ +/** + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/** @cond */ +/**@file + * + * @ingroup experimental_api + * @defgroup sdk_common SDK Common Header + * @brief All common headers needed for SDK examples will be included here so that application + * developer does not have to include headers on him/herself. + * @{ + */ + +#ifndef SDK_COMMON_H__ +#define SDK_COMMON_H__ + +#include +#include +#include +#include "sdk_config.h" +#include "nordic_common.h" +#include "compiler_abstraction.h" +#include "sdk_os.h" +#include "sdk_errors.h" +#include "app_util.h" +#include "sdk_macros.h" + +#ifdef __cplusplus +extern "C" { +#endif + + +/** @} */ +/** @endcond */ + +#ifdef __cplusplus +} +#endif + +#endif // SDK_COMMON_H__ + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/sdk_errors.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/sdk_errors.h new file mode 100644 index 00000000000..7b5dea5ae19 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/sdk_errors.h @@ -0,0 +1,167 @@ +/** + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/**@file + * + * @defgroup sdk_error SDK Error codes + * @{ + * @ingroup app_common + * @{ + * @details Error codes are 32-bit unsigned integers with the most significant 16-bit reserved for + * identifying the module where the error occurred while the least least significant LSB + * are used to provide the cause or nature of error. Each module is assigned a 16-bit + * unsigned integer. Which it will use to identify all errors that occurred in it. 16-bit + * LSB range is with module id as the MSB in the 32-bit error code is reserved for the + * module. As an example, if 0x8800 identifies a certain SDK module, all values from + * 0x88000000 - 0x8800FFFF are reserved for this module. + * It should be noted that common error reasons have been assigned values to make it + * possible to decode error reason easily. As an example, lets module uninitialized has + * been assigned an error code 0x000A0. Then, if application encounters an error code + * 0xZZZZ00A0, it knows that it accessing a certain module without initializing it. + * Apart from this, each module is allowed to define error codes that are not covered by + * the common ones, however, these values are defined in a range that does not conflict + * with common error values. For module, specific error however, it is possible that the + * same error value is used by two different modules to indicated errors of very different + * nature. If error is already defined by the NRF common error codes, these are reused. + * A range is reserved for application as well, it can use this range for defining + * application specific errors. + * + * @note Success code, NRF_SUCCESS, does not include any module identifier. + + */ + +#ifndef SDK_ERRORS_H__ +#define SDK_ERRORS_H__ + +#include +#include "nrf_error.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup sdk_err_base Base defined for SDK Modules + * @{ + */ +#define NRF_ERROR_SDK_ERROR_BASE (NRF_ERROR_BASE_NUM + 0x8000) /**< Base value defined for SDK module identifiers. */ +#define NRF_ERROR_SDK_COMMON_ERROR_BASE (NRF_ERROR_BASE_NUM + 0x0080) /**< Base error value to be used for SDK error values. */ +/** @} */ + +/** + * @defgroup sdk_module_codes Codes reserved as identification for module where the error occurred. + * @{ + */ +#define NRF_ERROR_MEMORY_MANAGER_ERR_BASE (0x8100) /**< Base address for Memory Manager related errors. */ +#define NRF_ERROR_PERIPH_DRIVERS_ERR_BASE (0x8200) /**< Base address for Peripheral drivers related errors. */ +#define NRF_ERROR_GAZELLE_ERR_BASE (0x8300) /**< Base address for Gazelle related errors. */ +#define NRF_ERROR_BLE_IPSP_ERR_BASE (0x8400) /**< Base address for BLE IPSP related errors. */ +#define NRF_ERROR_CRYPTO_ERR_BASE (0x8500) /**< Base address for crypto related errors. */ +/** @} */ + + +/** + * @defgroup sdk_iot_errors Codes reserved as identification for IoT errors. + * @{ + */ +#define NRF_ERROR_IOT_ERR_BASE_START (0xA000) +#define NRF_ERROR_IOT_ERR_BASE_STOP (0xAFFF) +/** @} */ + + +/** + * @defgroup sdk_common_errors Codes reserved as identification for common errors. + * @{ + */ +#define NRF_ERROR_MODULE_NOT_INITIALIZED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0000) ///< Module not initialized +#define NRF_ERROR_MUTEX_INIT_FAILED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0001) ///< Mutex initialization failed +#define NRF_ERROR_MUTEX_LOCK_FAILED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0002) ///< Mutex lock failed +#define NRF_ERROR_MUTEX_UNLOCK_FAILED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0003) ///< Mutex unlock failed +#define NRF_ERROR_MUTEX_COND_INIT_FAILED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0004) ///< Mutex conditional initialization failed +#define NRF_ERROR_MODULE_ALREADY_INITIALIZED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0005) ///< Module already initialized +#define NRF_ERROR_STORAGE_FULL (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0006) ///< Storage full +#define NRF_ERROR_API_NOT_IMPLEMENTED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0010) ///< API not implemented +#define NRF_ERROR_FEATURE_NOT_ENABLED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0011) ///< Feature not enabled +#define NRF_ERROR_IO_PENDING (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0012) ///< Input/Output pending +/** @} */ + + +/** + * @defgroup drv_specific_errors Error / status codes specific to drivers. + * @{ + */ +#define NRF_ERROR_DRV_TWI_ERR_OVERRUN (NRF_ERROR_PERIPH_DRIVERS_ERR_BASE + 0x0000) +#define NRF_ERROR_DRV_TWI_ERR_ANACK (NRF_ERROR_PERIPH_DRIVERS_ERR_BASE + 0x0001) +#define NRF_ERROR_DRV_TWI_ERR_DNACK (NRF_ERROR_PERIPH_DRIVERS_ERR_BASE + 0x0002) +/** @} */ + + +/** + * @defgroup ble_ipsp_errors IPSP codes + * @brief Error and status codes specific to IPSP. + * @{ + */ +#define NRF_ERROR_BLE_IPSP_RX_PKT_TRUNCATED (NRF_ERROR_BLE_IPSP_ERR_BASE + 0x0000) +#define NRF_ERROR_BLE_IPSP_CHANNEL_ALREADY_EXISTS (NRF_ERROR_BLE_IPSP_ERR_BASE + 0x0001) +#define NRF_ERROR_BLE_IPSP_LINK_DISCONNECTED (NRF_ERROR_BLE_IPSP_ERR_BASE + 0x0002) +#define NRF_ERROR_BLE_IPSP_PEER_REJECTED (NRF_ERROR_BLE_IPSP_ERR_BASE + 0x0003) +/* @} */ + + +/** + * @brief API Result. + * + * @details Indicates success or failure of an API procedure. In case of failure, a comprehensive + * error code indicating cause or reason for failure is provided. + * + * Though called an API result, it could used in Asynchronous notifications callback along + * with asynchronous callback as event result. This mechanism is employed when an event + * marks the end of procedure initiated using API. API result, in this case, will only be + * an indicative of whether the procedure has been requested successfully. + */ +typedef uint32_t ret_code_t; + +/** @} */ +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // SDK_ERRORS_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/sdk_macros.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/sdk_macros.h new file mode 100644 index 00000000000..c33c66eff0c --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/sdk_macros.h @@ -0,0 +1,215 @@ +/** + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/**@file + * + + * @defgroup sdk_common_macros SDK Common Header + * @ingroup app_common + * @brief Macros for parameter checking and similar tasks + * @{ + */ + +#ifndef SDK_MACROS_H__ +#define SDK_MACROS_H__ + +#include "nrf_assert.h" + +#ifdef __cplusplus +extern "C" { +#endif + + +/**@brief Macro for parameter checking. + * + * If @p _cond evaluates to true, does nothing. Otherwise, + * if @p _module ## _PARAM_CHECK_DISABLED is @e not set (default), prints an error message + * if @p _printfn is provided, and returns from the calling function context with code @p _err. + * If @p _module ## _PARAM_CHECK_DISABLED is set, behaves like the ASSERT macro. + * + * Parameter checking implemented using this macro can be optionally turned off for release code. + * Only disable runtime parameter checks if size if a major concern. + * + * @param _module The module name. + * @param _cond The condition to be evaluated. + * @param _err The error to be returned. + * @param _printfn A printf-compatible function used to log the error. + * Leave empty if no logging is needed. + * + * @hideinitializer + */ +/*lint -esym(666, NRF_PARAM_CHECK*) : Expression with side effects passed to macro */ +#define NRF_PARAM_CHECK(_module, _cond, _err, _printfn) \ + do \ + { \ + if ((_cond)) \ + { \ + /* Do nothing. */ \ + } \ + else if (!(_module ## _PARAM_CHECK_DISABLED)) \ + { \ + _printfn("%s check failed in %s() with value 0x%x.", #_cond, __func__, _err); \ + return (_err); \ + } \ + else \ + { \ + ASSERT((_cond)); \ + } \ + } while (0); + + +/**@brief Macro for verifying statement to be true. It will cause the exterior function to return + * err_code if the statement is not true. + * + * @param[in] statement Statement to test. + * @param[in] err_code Error value to return if test was invalid. + * + * @retval nothing, but will cause the exterior function to return @p err_code if @p statement + * is false. + */ +#define VERIFY_TRUE(statement, err_code) \ +do \ +{ \ + if (!(statement)) \ + { \ + return err_code; \ + } \ +} while (0) + + +/**@brief Macro for verifying statement to be true. It will cause the exterior function to return + * if the statement is not true. + * + * @param[in] statement Statement to test. + */ +#define VERIFY_TRUE_VOID(statement) VERIFY_TRUE((statement), ) + + +/**@brief Macro for verifying statement to be false. It will cause the exterior function to return + * err_code if the statement is not false. + * + * @param[in] statement Statement to test. + * @param[in] err_code Error value to return if test was invalid. + * + * @retval nothing, but will cause the exterior function to return @p err_code if @p statement + * is true. + */ +#define VERIFY_FALSE(statement, err_code) \ +do \ +{ \ + if ((statement)) \ + { \ + return err_code; \ + } \ +} while (0) + + +/**@brief Macro for verifying statement to be false. It will cause the exterior function to return + * if the statement is not false. + * + * @param[in] statement Statement to test. + */ +#define VERIFY_FALSE_VOID(statement) VERIFY_FALSE((statement), ) + + +/**@brief Macro for verifying that a function returned NRF_SUCCESS. It will cause the exterior + * function to return error code of statement if it is not @ref NRF_SUCCESS. + * + * @param[in] statement Statement to check against NRF_SUCCESS. + */ +#define VERIFY_SUCCESS(statement) \ +do \ +{ \ + uint32_t _err_code = (uint32_t) (statement); \ + if (_err_code != NRF_SUCCESS) \ + { \ + return _err_code; \ + } \ +} while(0) + + +/**@brief Macro for verifying that a function returned NRF_SUCCESS. It will cause the exterior + * function to return if the err_code is not @ref NRF_SUCCESS. + * + * @param[in] err_code The error code to check. + */ +#define VERIFY_SUCCESS_VOID(err_code) VERIFY_TRUE_VOID((err_code) == NRF_SUCCESS) + + +/**@brief Macro for verifying that the module is initialized. It will cause the exterior function to + * return @ref NRF_ERROR_INVALID_STATE if not. + * + * @note MODULE_INITIALIZED must be defined in each module using this macro. MODULE_INITIALIZED + * should be true if the module is initialized, false if not. + */ +#define VERIFY_MODULE_INITIALIZED() VERIFY_TRUE((MODULE_INITIALIZED), NRF_ERROR_INVALID_STATE) + + +/**@brief Macro for verifying that the module is initialized. It will cause the exterior function to + * return if not. + * + * @note MODULE_INITIALIZED must be defined in each module using this macro. MODULE_INITIALIZED + * should be true if the module is initialized, false if not. + */ +#define VERIFY_MODULE_INITIALIZED_VOID() VERIFY_TRUE_VOID((MODULE_INITIALIZED)) + + +/**@brief Macro for verifying that the module is initialized. It will cause the exterior function to + * return if not. + * + * @param[in] param The variable to check if is NULL. + */ +#define VERIFY_PARAM_NOT_NULL(param) VERIFY_FALSE(((param) == NULL), NRF_ERROR_NULL) + + +/**@brief Macro for verifying that the module is initialized. It will cause the exterior function to + * return if not. + * + * @param[in] param The variable to check if is NULL. + */ +#define VERIFY_PARAM_NOT_NULL_VOID(param) VERIFY_FALSE_VOID(((param) == NULL)) + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // SDK_MACROS_H__ + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/sdk_mapped_flags.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/sdk_mapped_flags.c new file mode 100644 index 00000000000..df5c09a98c7 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/sdk_mapped_flags.c @@ -0,0 +1,220 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "sdk_mapped_flags.h" +#include +#include +#include +#include "compiler_abstraction.h" + + +// Test whether the flag collection type is large enough to hold all the flags. If this fails, +// reduce SDK_MAPPED_FLAGS_N_KEYS or increase the size of sdk_mapped_flags_t. +STATIC_ASSERT((sizeof(sdk_mapped_flags_t) * SDK_MAPPED_FLAGS_N_KEYS_PER_BYTE) >= SDK_MAPPED_FLAGS_N_KEYS); + + +/**@brief Function for setting the state of a flag to true. + * + * @note This function does not check whether the index is valid. + * + * @param[in] p_flags The collection of flags to modify. + * @param[in] index The index of the flag to modify. + */ +static __INLINE void sdk_mapped_flags_set_by_index(sdk_mapped_flags_t * p_flags, uint16_t index) +{ + *p_flags |= (1U << index); +} + + +/**@brief Function for setting the state of a flag to false. + * + * @note This function does not check whether the index is valid. + * + * @param[in] p_flags The collection of flags to modify. + * @param[in] index The index of the flag to modify. + */ +static __INLINE void sdk_mapped_flags_clear_by_index(sdk_mapped_flags_t * p_flags, uint16_t index) +{ + *p_flags &= ~(1U << index); +} + + +/**@brief Function for getting the state of a flag. + * + * @note This function does not check whether the index is valid. + * + * @param[in] p_flags The collection of flags to read. + * @param[in] index The index of the flag to get. + */ +static __INLINE bool sdk_mapped_flags_get_by_index(sdk_mapped_flags_t flags, uint16_t index) +{ + return ((flags & (1 << index)) != 0); +} + + + +uint16_t sdk_mapped_flags_first_key_index_get(sdk_mapped_flags_t flags) +{ + for (uint16_t i = 0; i < SDK_MAPPED_FLAGS_N_KEYS; i++) + { + if (sdk_mapped_flags_get_by_index(flags, i)) + { + return i; + } + } + return SDK_MAPPED_FLAGS_INVALID_INDEX; +} + + +void sdk_mapped_flags_update_by_key(uint16_t * p_keys, + sdk_mapped_flags_t * p_flags, + uint16_t key, + bool value) +{ + sdk_mapped_flags_bulk_update_by_key(p_keys, p_flags, 1, key, value); +} + + +void sdk_mapped_flags_bulk_update_by_key(uint16_t * p_keys, + sdk_mapped_flags_t * p_flags, + uint32_t n_flag_collections, + uint16_t key, + bool value) +{ + if ((p_keys != NULL) && (p_flags != NULL) && (n_flag_collections > 0)) + { + for (uint32_t i = 0; i < SDK_MAPPED_FLAGS_N_KEYS; i++) + { + if (p_keys[i] == key) + { + for (uint32_t j = 0; j < n_flag_collections; j++) + { + if (value) + { + sdk_mapped_flags_set_by_index(&p_flags[j], i); + } + else + { + sdk_mapped_flags_clear_by_index(&p_flags[j], i); + } + } + return; + } + } + } +} + + +bool sdk_mapped_flags_get_by_key_w_idx(uint16_t * p_keys, + sdk_mapped_flags_t flags, + uint16_t key, + uint8_t * p_index) +{ + if (p_keys != NULL) + { + for (uint32_t i = 0; i < SDK_MAPPED_FLAGS_N_KEYS; i++) + { + if (p_keys[i] == key) + { + if (p_index != NULL) + { + *p_index = i; + } + return sdk_mapped_flags_get_by_index(flags, i); + } + } + } + if (p_index != NULL) + { + *p_index = SDK_MAPPED_FLAGS_N_KEYS; + } + return false; +} + + +bool sdk_mapped_flags_get_by_key(uint16_t * p_keys, sdk_mapped_flags_t flags, uint16_t key) +{ + if (p_keys != NULL) + { + for (uint32_t i = 0; i < SDK_MAPPED_FLAGS_N_KEYS; i++) + { + if (p_keys[i] == key) + { + return sdk_mapped_flags_get_by_index(flags, i); + } + } + } + return false; +} + + +sdk_mapped_flags_key_list_t sdk_mapped_flags_key_list_get(uint16_t * p_keys, + sdk_mapped_flags_t flags) +{ + sdk_mapped_flags_key_list_t key_list; + key_list.len = 0; + + if (p_keys != NULL) + { + for (uint32_t i = 0; i < SDK_MAPPED_FLAGS_N_KEYS; i++) + { + if (sdk_mapped_flags_get_by_index(flags, i)) + { + key_list.flag_keys[key_list.len++] = p_keys[i]; + } + } + } + + return key_list; +} + + +uint32_t sdk_mapped_flags_n_flags_set(sdk_mapped_flags_t flags) +{ + uint32_t n_flags_set = 0; + + for (uint32_t i = 0; i < SDK_MAPPED_FLAGS_N_KEYS; i++) + { + if (sdk_mapped_flags_get_by_index(flags, i)) + { + n_flags_set += 1; + } + } + return n_flags_set; +} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/sdk_mapped_flags.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/sdk_mapped_flags.h new file mode 100644 index 00000000000..2432c88aede --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/sdk_mapped_flags.h @@ -0,0 +1,199 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef SDK_MAPPED_FLAGS_H__ +#define SDK_MAPPED_FLAGS_H__ + +#include +#include +#include "app_util.h" +#include "compiler_abstraction.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @file + * @defgroup sdk_mapped_flags Mapped flags + * @ingroup app_common + * @{ + * @brief Module for writing and reading flags that are associated + * with keys. + * + * @details The flags are represented as bits in a bitmap called a flag collection. The keys + * are uint16_t. Each flag collection contains all flags of the same type, one flag for + * each key. + * + * The mapped flags module does not keep the flag states, nor the list of keys. These are + * provided in the API calls. A key's index in the key list determines which bit in the + * flag collection is associated with it. This module does not ever edit the key list, and + * does not edit flags except in function calls that take the flag collection as a pointer. + * + */ + +#define SDK_MAPPED_FLAGS_N_KEYS 32 /**< The number of keys to keep flags for. This is also the number of flags in a flag collection. If changing this value, you might also need change the width of the sdk_mapped_flags_t type. */ +#define SDK_MAPPED_FLAGS_N_KEYS_PER_BYTE 8 /**< The number of flags that fit in one byte. */ +#define SDK_MAPPED_FLAGS_INVALID_INDEX 0xFFFF /**< A flag index guaranteed to be invalid. */ + +typedef uint32_t sdk_mapped_flags_t; /**< The bitmap to hold flags. Each flag is one bit, and each bit represents the flag state associated with one key. */ + + +/**@brief Type used to present a subset of the registered keys. + */ +typedef struct +{ + uint32_t len; /**< The length of the list. */ + uint16_t flag_keys[SDK_MAPPED_FLAGS_N_KEYS]; /**< The list of keys. */ +} sdk_mapped_flags_key_list_t; + + +/**@brief Function for getting the first index at which the flag is true in the provided + * collection. + * + * @param[in] flags The flag collection to search for a flag set to true. + * + * @return The first index that has its flag set to true. If none were found, the + * function returns @ref SDK_MAPPED_FLAGS_INVALID_INDEX. + */ +uint16_t sdk_mapped_flags_first_key_index_get(sdk_mapped_flags_t flags); + + +/**@brief Function for updating the state of a flag. + * + * @param[in] p_keys The list of associated keys (assumed to have a length of + * @ref SDK_MAPPED_FLAGS_N_KEYS). + * @param[out] p_flags The flag collection to modify. + * @param[in] key The key to modify the flag of. + * @param[in] value The state to set the flag to. + */ +void sdk_mapped_flags_update_by_key(uint16_t * p_keys, + sdk_mapped_flags_t * p_flags, + uint16_t key, + bool value); + + +/**@brief Function for updating the state of the same flag in multiple flag collections. + * + * @details The key and value are the same for all flag collections in the p_flags array. + * + * @param[in] p_keys The list of associated keys (assumed to have a length of + * @ref SDK_MAPPED_FLAGS_N_KEYS). + * @param[out] p_flags The flag collections to modify. + * @param[out] n_flag_collections The number of flag collections in p_flags. + * @param[in] key The key to modify the flag of. + * @param[in] value The state to set the flag to. + */ +void sdk_mapped_flags_bulk_update_by_key(uint16_t * p_keys, + sdk_mapped_flags_t * p_flags, + uint32_t n_flag_collections, + uint16_t key, + bool value); + + +/**@brief Function for getting the state of a specific flag. + * + * @param[in] p_keys The list of associated keys (assumed to have a length of + * @ref SDK_MAPPED_FLAGS_N_KEYS). + * @param[in] flags The flag collection to read from. + * @param[in] key The key to get the flag for. + * + * @return The state of the flag. + */ +bool sdk_mapped_flags_get_by_key(uint16_t * p_keys, sdk_mapped_flags_t flags, uint16_t key); + + +/**@brief Function for getting the state of a specific flag. + * + * @param[in] p_keys The list of associated keys (assumed to have a length of + * @ref SDK_MAPPED_FLAGS_N_KEYS). + * @param[in] flags The flag collection from which to read. + * @param[in] key The key for which to get the flag. + * @param[out] p_index If not NULL, the index of the key. + * + * @return The state of the flag. + */ +bool sdk_mapped_flags_get_by_key_w_idx(uint16_t * p_keys, + sdk_mapped_flags_t flags, + uint16_t key, + uint8_t * p_index); + + +/**@brief Function for getting a list of all keys that have a specific flag set to true. + * + * @param[in] p_keys The list of associated keys (assumed to have a length of + * @ref SDK_MAPPED_FLAGS_N_KEYS). + * @param[in] flags The flag collection to search. + * + * @return The list of keys. + */ +sdk_mapped_flags_key_list_t sdk_mapped_flags_key_list_get(uint16_t * p_keys, + sdk_mapped_flags_t flags); + + +/**@brief Function for getting the number of keys that have a specific flag set to true. + * + * @param[in] flags The flag collection to search. + * + * @return The number of keys. + */ +uint32_t sdk_mapped_flags_n_flags_set(sdk_mapped_flags_t flags); + + +/**@brief Function for querying whether any flags in the collection are set. + * + * @param[in] flags The flag collection to query. + * + * @retval true If one or more flags are set to true. + * @retval false Otherwise. + */ +static __INLINE bool sdk_mapped_flags_any_set(sdk_mapped_flags_t flags) +{ + return (flags != 0); +} + + +/** @} */ + + +#ifdef __cplusplus +} +#endif + +#endif /* SDK_MAPPED_FLAGS_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/sdk_os.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/sdk_os.h new file mode 100644 index 00000000000..6aeb3d4f6ff --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/sdk_os.h @@ -0,0 +1,76 @@ +/** + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/** @cond */ +/**@file + * + * @defgroup sdk_os SDK OS Abstraction + * @ingroup experimental_api + * @details In order to made SDK modules independent of use of an embedded OS, and permit + * application with varied task architecture, SDK abstracts the OS specific + * elements here in order to make all other modules agnostic to the OS or task + * architecture. + * @{ + */ + +#ifndef SDK_OS_H__ +#define SDK_OS_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#define SDK_MUTEX_DEFINE(X) +#define SDK_MUTEX_INIT(X) +#define SDK_MUTEX_LOCK(X) +#define SDK_MUTEX_UNLOCK(X) + +/** + * @defgroup os_data_type Data types. + */ + +/** @} */ +/** @endcond */ + +#ifdef __cplusplus +} +#endif + +#endif // SDK_OS_H__ + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/sdk_resources.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/sdk_resources.h new file mode 100644 index 00000000000..eaef717f9d2 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/sdk_resources.h @@ -0,0 +1,86 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/** @file + * @brief Definition file for resource usage by SoftDevice, ESB and Gazell. + */ + +#ifndef SDK_RESOURCES_H__ +#define SDK_RESOURCES_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(SOFTDEVICE_PRESENT) || defined (BLE_STACK_SUPPORT_REQD) || defined (ANT_STACK_SUPPORT_REQD) + #include "nrf_sd_def.h" +#else + #define SD_PPI_RESTRICTED 0uL /**< 1 if PPI peripheral is restricted, 0 otherwise. */ + #define SD_PPI_CHANNELS_USED 0uL /**< PPI channels utilized by SotfDevice (not available to th spplication). */ + #define SD_PPI_GROUPS_USED 0uL /**< PPI groups utilized by SotfDevice (not available to th spplication). */ + #define SD_TIMERS_USED 0uL /**< Timers used by SoftDevice. */ + #define SD_SWI_USED 0uL /**< Software interrupts used by SoftDevice. */ +#endif + +#ifdef GAZELL_PRESENT + #include "nrf_gzll_resources.h" +#else + #define GZLL_PPI_CHANNELS_USED 0uL /**< PPI channels utilized by Gazell (not available to th spplication). */ + #define GZLL_TIMERS_USED 0uL /**< Timers used by Gazell. */ + #define GZLL_SWI_USED 0uL /**< Software interrupts used by Gazell */ +#endif + +#ifdef ESB_PRESENT + #include "nrf_esb_resources.h" +#else + #define ESB_PPI_CHANNELS_USED 0uL /**< PPI channels utilized by ESB (not available to th spplication). */ + #define ESB_TIMERS_USED 0uL /**< Timers used by ESB. */ + #define ESB_SWI_USED 0uL /**< Software interrupts used by ESB */ +#endif + +#define NRF_PPI_CHANNELS_USED (SD_PPI_CHANNELS_USED | GZLL_PPI_CHANNELS_USED | ESB_PPI_CHANNELS_USED) +#define NRF_PPI_GROUPS_USED (SD_PPI_GROUPS_USED) +#define NRF_SWI_USED (SD_SWI_USED | GZLL_SWI_USED | ESB_SWI_USED) +#define NRF_TIMERS_USED (SD_TIMERS_USED | GZLL_TIMERS_USED | ESB_TIMERS_USED) + +#ifdef __cplusplus +} +#endif + +#endif // SDK_RESOURCES_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/apply_old_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/apply_old_config.h new file mode 100644 index 00000000000..62ef4755fa2 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/apply_old_config.h @@ -0,0 +1,1385 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + + +#ifndef APPLY_OLD_CONFIG_H__ +#define APPLY_OLD_CONFIG_H__ + +//------------------------------------------------------------------------------ +// Peripheral Resource Sharing (PRS) + +#if defined(PERIPHERAL_RESOURCE_SHARING_ENABLED) + +#define NRFX_PRS_ENABLED PERIPHERAL_RESOURCE_SHARING_ENABLED +#define NRFX_PRS_BOX_0_ENABLED PERIPHERAL_RESOURCE_SHARING_ENABLED +#define NRFX_PRS_BOX_1_ENABLED PERIPHERAL_RESOURCE_SHARING_ENABLED +#define NRFX_PRS_BOX_2_ENABLED PERIPHERAL_RESOURCE_SHARING_ENABLED +#define NRFX_PRS_BOX_3_ENABLED PERIPHERAL_RESOURCE_SHARING_ENABLED +#define NRFX_PRS_BOX_4_ENABLED PERIPHERAL_RESOURCE_SHARING_ENABLED + +#if defined(COMMON_CONFIG_LOG_ENABLED) +#undef NRFX_PRS_CONFIG_LOG_ENABLED +#define NRFX_PRS_CONFIG_LOG_ENABLED COMMON_CONFIG_LOG_ENABLED +#endif +#if defined(COMMON_CONFIG_LOG_LEVEL) +#undef NRFX_PRS_CONFIG_LOG_LEVEL +#define NRFX_PRS_CONFIG_LOG_LEVEL COMMON_CONFIG_LOG_LEVEL +#endif +#if defined(COMMON_CONFIG_INFO_COLOR) +#undef NRFX_PRS_CONFIG_INFO_COLOR +#define NRFX_PRS_CONFIG_INFO_COLOR COMMON_CONFIG_INFO_COLOR +#endif +#if defined(COMMON_CONFIG_DEBUG_COLOR) +#undef NRFX_PRS_CONFIG_DEBUG_COLOR +#define NRFX_PRS_CONFIG_DEBUG_COLOR COMMON_CONFIG_DEBUG_COLOR +#endif + +#endif // defined(PERIPHERAL_RESOURCE_SHARING_ENABLED) + +//------------------------------------------------------------------------------ +// CLOCK + +#if defined(CLOCK_ENABLED) + +#undef NRFX_CLOCK_ENABLED +#define NRFX_CLOCK_ENABLED CLOCK_ENABLED + +#if defined(CLOCK_CONFIG_LF_SRC) +#undef NRFX_CLOCK_CONFIG_LF_SRC +#define NRFX_CLOCK_CONFIG_LF_SRC CLOCK_CONFIG_LF_SRC +#endif +#if defined(CLOCK_CONFIG_IRQ_PRIORITY) +#undef NRFX_CLOCK_CONFIG_IRQ_PRIORITY +#define NRFX_CLOCK_CONFIG_IRQ_PRIORITY CLOCK_CONFIG_IRQ_PRIORITY +#endif + +#if defined(CLOCK_CONFIG_LOG_ENABLED) +#undef NRFX_CLOCK_CONFIG_LOG_ENABLED +#define NRFX_CLOCK_CONFIG_LOG_ENABLED CLOCK_CONFIG_LOG_ENABLED +#endif +#if defined(CLOCK_CONFIG_LOG_LEVEL) +#undef NRFX_CLOCK_CONFIG_LOG_LEVEL +#define NRFX_CLOCK_CONFIG_LOG_LEVEL CLOCK_CONFIG_LOG_LEVEL +#endif +#if defined(CLOCK_CONFIG_INFO_COLOR) +#undef NRFX_CLOCK_CONFIG_INFO_COLOR +#define NRFX_CLOCK_CONFIG_INFO_COLOR CLOCK_CONFIG_INFO_COLOR +#endif +#if defined(CLOCK_CONFIG_DEBUG_COLOR) +#undef NRFX_CLOCK_CONFIG_DEBUG_COLOR +#define NRFX_CLOCK_CONFIG_DEBUG_COLOR CLOCK_CONFIG_DEBUG_COLOR +#endif + +#endif // defined(CLOCK_ENABLED) + +//------------------------------------------------------------------------------ +// COMP + +#if defined(COMP_ENABLED) + +#undef NRFX_COMP_ENABLED +#define NRFX_COMP_ENABLED COMP_ENABLED + +#if defined(COMP_CONFIG_REF) +#undef NRFX_COMP_CONFIG_REF +#define NRFX_COMP_CONFIG_REF COMP_CONFIG_REF +#endif +#if defined(COMP_CONFIG_MAIN_MODE) +#undef NRFX_COMP_CONFIG_MAIN_MODE +#define NRFX_COMP_CONFIG_MAIN_MODE COMP_CONFIG_MAIN_MODE +#endif +#if defined(COMP_CONFIG_SPEED_MODE) +#undef NRFX_COMP_CONFIG_SPEED_MODE +#define NRFX_COMP_CONFIG_SPEED_MODE COMP_CONFIG_SPEED_MODE +#endif +#if defined(COMP_CONFIG_HYST) +#undef NRFX_COMP_CONFIG_HYST +#define NRFX_COMP_CONFIG_HYST COMP_CONFIG_HYST +#endif +#if defined(COMP_CONFIG_ISOURCE) +#undef NRFX_COMP_CONFIG_ISOURCE +#define NRFX_COMP_CONFIG_ISOURCE COMP_CONFIG_ISOURCE +#endif +#if defined(COMP_CONFIG_INPUT) +#undef NRFX_COMP_CONFIG_INPUT +#define NRFX_COMP_CONFIG_INPUT COMP_CONFIG_INPUT +#endif +#if defined(COMP_CONFIG_IRQ_PRIORITY) +#undef NRFX_COMP_CONFIG_IRQ_PRIORITY +#define NRFX_COMP_CONFIG_IRQ_PRIORITY COMP_CONFIG_IRQ_PRIORITY +#endif + +#if defined(COMP_CONFIG_LOG_ENABLED) +#undef NRFX_COMP_CONFIG_LOG_ENABLED +#define NRFX_COMP_CONFIG_LOG_ENABLED COMP_CONFIG_LOG_ENABLED +#endif +#if defined(COMP_CONFIG_LOG_LEVEL) +#undef NRFX_COMP_CONFIG_LOG_LEVEL +#define NRFX_COMP_CONFIG_LOG_LEVEL COMP_CONFIG_LOG_LEVEL +#endif +#if defined(COMP_CONFIG_INFO_COLOR) +#undef NRFX_COMP_CONFIG_INFO_COLOR +#define NRFX_COMP_CONFIG_INFO_COLOR COMP_CONFIG_INFO_COLOR +#endif +#if defined(COMP_CONFIG_DEBUG_COLOR) +#undef NRFX_COMP_CONFIG_DEBUG_COLOR +#define NRFX_COMP_CONFIG_DEBUG_COLOR COMP_CONFIG_DEBUG_COLOR +#endif + +#endif // defined(COMP_ENABLED) + +//------------------------------------------------------------------------------ +// GPIOTE + +#if defined(GPIOTE_ENABLED) + +#undef NRFX_GPIOTE_ENABLED +#define NRFX_GPIOTE_ENABLED GPIOTE_ENABLED + +#if defined(GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS) +#undef NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS +#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS +#endif + +#if defined(GPIOTE_CONFIG_IRQ_PRIORITY) +#undef NRFX_GPIOTE_CONFIG_IRQ_PRIORITY +#define NRFX_GPIOTE_CONFIG_IRQ_PRIORITY GPIOTE_CONFIG_IRQ_PRIORITY +#endif + +#if defined(GPIOTE_CONFIG_LOG_ENABLED) +#undef NRFX_GPIOTE_CONFIG_LOG_ENABLED +#define NRFX_GPIOTE_CONFIG_LOG_ENABLED GPIOTE_CONFIG_LOG_ENABLED +#endif +#if defined(GPIOTE_CONFIG_LOG_LEVEL) +#undef NRFX_GPIOTE_CONFIG_LOG_LEVEL +#define NRFX_GPIOTE_CONFIG_LOG_LEVEL GPIOTE_CONFIG_LOG_LEVEL +#endif +#if defined(GPIOTE_CONFIG_INFO_COLOR) +#undef NRFX_GPIOTE_CONFIG_INFO_COLOR +#define NRFX_GPIOTE_CONFIG_INFO_COLOR GPIOTE_CONFIG_INFO_COLOR +#endif +#if defined(GPIOTE_CONFIG_DEBUG_COLOR) +#undef NRFX_GPIOTE_CONFIG_DEBUG_COLOR +#define NRFX_GPIOTE_CONFIG_DEBUG_COLOR GPIOTE_CONFIG_DEBUG_COLOR +#endif + +#endif // defined(GPIOTE_ENABLED) + +//------------------------------------------------------------------------------ +// I2S + +#if defined(I2S_ENABLED) + +#undef NRFX_I2S_ENABLED +#define NRFX_I2S_ENABLED I2S_ENABLED + +#if defined(I2S_CONFIG_SCK_PIN) +#undef NRFX_I2S_CONFIG_SCK_PIN +#define NRFX_I2S_CONFIG_SCK_PIN I2S_CONFIG_SCK_PIN +#endif +#if defined(I2S_CONFIG_LRCK_PIN) +#undef NRFX_I2S_CONFIG_LRCK_PIN +#define NRFX_I2S_CONFIG_LRCK_PIN I2S_CONFIG_LRCK_PIN +#endif +#if defined(I2S_CONFIG_MCK_PIN) +#undef NRFX_I2S_CONFIG_MCK_PIN +#define NRFX_I2S_CONFIG_MCK_PIN I2S_CONFIG_MCK_PIN +#endif +#if defined(I2S_CONFIG_SDOUT_PIN) +#undef NRFX_I2S_CONFIG_SDOUT_PIN +#define NRFX_I2S_CONFIG_SDOUT_PIN I2S_CONFIG_SDOUT_PIN +#endif +#if defined(I2S_CONFIG_SDIN_PIN) +#undef NRFX_I2S_CONFIG_SDIN_PIN +#define NRFX_I2S_CONFIG_SDIN_PIN I2S_CONFIG_SDIN_PIN +#endif + +#if defined(I2S_CONFIG_MASTER) +#undef NRFX_I2S_CONFIG_MASTER +#define NRFX_I2S_CONFIG_MASTER I2S_CONFIG_MASTER +#endif +#if defined(I2S_CONFIG_FORMAT) +#undef NRFX_I2S_CONFIG_FORMAT +#define NRFX_I2S_CONFIG_FORMAT I2S_CONFIG_FORMAT +#endif +#if defined(I2S_CONFIG_ALIGN) +#undef NRFX_I2S_CONFIG_ALIGN +#define NRFX_I2S_CONFIG_ALIGN I2S_CONFIG_ALIGN +#endif +#if defined(I2S_CONFIG_SWIDTH) +#undef NRFX_I2S_CONFIG_SWIDTH +#define NRFX_I2S_CONFIG_SWIDTH I2S_CONFIG_SWIDTH +#endif +#if defined(I2S_CONFIG_CHANNELS) +#undef NRFX_I2S_CONFIG_CHANNELS +#define NRFX_I2S_CONFIG_CHANNELS I2S_CONFIG_CHANNELS +#endif +#if defined(I2S_CONFIG_MCK_SETUP) +#undef NRFX_I2S_CONFIG_MCK_SETUP +#define NRFX_I2S_CONFIG_MCK_SETUP I2S_CONFIG_MCK_SETUP +#endif +#if defined(I2S_CONFIG_RATIO) +#undef NRFX_I2S_CONFIG_RATIO +#define NRFX_I2S_CONFIG_RATIO I2S_CONFIG_RATIO +#endif +#if defined(I2S_CONFIG_IRQ_PRIORITY) +#undef NRFX_I2S_CONFIG_IRQ_PRIORITY +#define NRFX_I2S_CONFIG_IRQ_PRIORITY I2S_CONFIG_IRQ_PRIORITY +#endif + +#if defined(I2S_CONFIG_LOG_ENABLED) +#undef NRFX_I2S_CONFIG_LOG_ENABLED +#define NRFX_I2S_CONFIG_LOG_ENABLED I2S_CONFIG_LOG_ENABLED +#endif +#if defined(I2S_CONFIG_LOG_LEVEL) +#undef NRFX_I2S_CONFIG_LOG_LEVEL +#define NRFX_I2S_CONFIG_LOG_LEVEL I2S_CONFIG_LOG_LEVEL +#endif +#if defined(I2S_CONFIG_INFO_COLOR) +#undef NRFX_I2S_CONFIG_INFO_COLOR +#define NRFX_I2S_CONFIG_INFO_COLOR I2S_CONFIG_INFO_COLOR +#endif +#if defined(I2S_CONFIG_DEBUG_COLOR) +#undef NRFX_I2S_CONFIG_DEBUG_COLOR +#define NRFX_I2S_CONFIG_DEBUG_COLOR I2S_CONFIG_DEBUG_COLOR +#endif + +#endif // defined(I2S_ENABLED) + +//------------------------------------------------------------------------------ +// LPCOMP + +#if defined(LPCOMP_ENABLED) + +#undef NRFX_LPCOMP_ENABLED +#define NRFX_LPCOMP_ENABLED LPCOMP_ENABLED + +#if defined(LPCOMP_CONFIG_REFERENCE) +#undef NRFX_LPCOMP_CONFIG_REFERENCE +#define NRFX_LPCOMP_CONFIG_REFERENCE LPCOMP_CONFIG_REFERENCE +#endif +#if defined(LPCOMP_CONFIG_DETECTION) +#undef NRFX_LPCOMP_CONFIG_DETECTION +#define NRFX_LPCOMP_CONFIG_DETECTION LPCOMP_CONFIG_DETECTION +#endif +#if defined(LPCOMP_CONFIG_INPUT) +#undef NRFX_LPCOMP_CONFIG_INPUT +#define NRFX_LPCOMP_CONFIG_INPUT LPCOMP_CONFIG_INPUT +#endif +#if defined(LPCOMP_CONFIG_HYST) +#undef NRFX_LPCOMP_CONFIG_HYST +#define NRFX_LPCOMP_CONFIG_HYST LPCOMP_CONFIG_HYST +#endif +#if defined(LPCOMP_CONFIG_IRQ_PRIORITY) +#undef NRFX_LPCOMP_CONFIG_IRQ_PRIORITY +#define NRFX_LPCOMP_CONFIG_IRQ_PRIORITY LPCOMP_CONFIG_IRQ_PRIORITY +#endif + +#if defined(LPCOMP_CONFIG_LOG_ENABLED) +#undef NRFX_LPCOMP_CONFIG_LOG_ENABLED +#define NRFX_LPCOMP_CONFIG_LOG_ENABLED LPCOMP_CONFIG_LOG_ENABLED +#endif +#if defined(LPCOMP_CONFIG_LOG_LEVEL) +#undef NRFX_LPCOMP_CONFIG_LOG_LEVEL +#define NRFX_LPCOMP_CONFIG_LOG_LEVEL LPCOMP_CONFIG_LOG_LEVEL +#endif +#if defined(LPCOMP_CONFIG_INFO_COLOR) +#undef NRFX_LPCOMP_CONFIG_INFO_COLOR +#define NRFX_LPCOMP_CONFIG_INFO_COLOR LPCOMP_CONFIG_INFO_COLOR +#endif +#if defined(LPCOMP_CONFIG_DEBUG_COLOR) +#undef NRFX_LPCOMP_CONFIG_DEBUG_COLOR +#define NRFX_LPCOMP_CONFIG_DEBUG_COLOR LPCOMP_CONFIG_DEBUG_COLOR +#endif + +#endif // defined(LPCOMP_ENABLED) + +//------------------------------------------------------------------------------ +// PDM + +#if defined(PDM_ENABLED) + +#undef NRFX_PDM_ENABLED +#define NRFX_PDM_ENABLED PDM_ENABLED + +#if defined(PDM_CONFIG_MODE) +#undef NRFX_PDM_CONFIG_MODE +#define NRFX_PDM_CONFIG_MODE PDM_CONFIG_MODE +#endif +#if defined(PDM_CONFIG_EDGE) +#undef NRFX_PDM_CONFIG_EDGE +#define NRFX_PDM_CONFIG_EDGE PDM_CONFIG_EDGE +#endif +#if defined(PDM_CONFIG_CLOCK_FREQ) +#undef NRFX_PDM_CONFIG_CLOCK_FREQ +#define NRFX_PDM_CONFIG_CLOCK_FREQ PDM_CONFIG_CLOCK_FREQ +#endif +#if defined(PDM_CONFIG_IRQ_PRIORITY) +#undef NRFX_PDM_CONFIG_IRQ_PRIORITY +#define NRFX_PDM_CONFIG_IRQ_PRIORITY PDM_CONFIG_IRQ_PRIORITY +#endif + +#if defined(PDM_CONFIG_LOG_ENABLED) +#undef NRFX_PDM_CONFIG_LOG_ENABLED +#define NRFX_PDM_CONFIG_LOG_ENABLED PDM_CONFIG_LOG_ENABLED +#endif +#if defined(PDM_CONFIG_LOG_LEVEL) +#undef NRFX_PDM_CONFIG_LOG_LEVEL +#define NRFX_PDM_CONFIG_LOG_LEVEL PDM_CONFIG_LOG_LEVEL +#endif +#if defined(PDM_CONFIG_INFO_COLOR) +#undef NRFX_PDM_CONFIG_INFO_COLOR +#define NRFX_PDM_CONFIG_INFO_COLOR PDM_CONFIG_INFO_COLOR +#endif +#if defined(PDM_CONFIG_DEBUG_COLOR) +#undef NRFX_PDM_CONFIG_DEBUG_COLOR +#define NRFX_PDM_CONFIG_DEBUG_COLOR PDM_CONFIG_DEBUG_COLOR +#endif + +#endif // defined(PDM_ENABLED) + +//------------------------------------------------------------------------------ +// POWER + +#if defined(POWER_ENABLED) + +#undef NRFX_POWER_ENABLED +#define NRFX_POWER_ENABLED POWER_ENABLED + +#if defined(POWER_CONFIG_IRQ_PRIORITY) +#undef NRFX_POWER_CONFIG_IRQ_PRIORITY +#define NRFX_POWER_CONFIG_IRQ_PRIORITY POWER_CONFIG_IRQ_PRIORITY +#endif + +#if defined(POWER_CONFIG_DEFAULT_DCDCEN) +#undef NRFX_POWER_CONFIG_DEFAULT_DCDCEN +#define NRFX_POWER_CONFIG_DEFAULT_DCDCEN POWER_CONFIG_DEFAULT_DCDCEN +#endif +#if defined(POWER_CONFIG_DEFAULT_DCDCENHV) +#undef NRFX_POWER_CONFIG_DEFAULT_DCDCENHV +#define NRFX_POWER_CONFIG_DEFAULT_DCDCENHV POWER_CONFIG_DEFAULT_DCDCENHV +#endif + +#endif // defined(POWER_ENABLED) + +//------------------------------------------------------------------------------ +// PPI + +#if defined(PPI_ENABLED) + +#undef NRFX_PPI_ENABLED +#define NRFX_PPI_ENABLED PPI_ENABLED + +#if defined(PPI_CONFIG_LOG_ENABLED) +#undef NRFX_PPI_CONFIG_LOG_ENABLED +#define NRFX_PPI_CONFIG_LOG_ENABLED PPI_CONFIG_LOG_ENABLED +#endif +#if defined(PPI_CONFIG_LOG_LEVEL) +#undef NRFX_PPI_CONFIG_LOG_LEVEL +#define NRFX_PPI_CONFIG_LOG_LEVEL PPI_CONFIG_LOG_LEVEL +#endif +#if defined(PPI_CONFIG_INFO_COLOR) +#undef NRFX_PPI_CONFIG_INFO_COLOR +#define NRFX_PPI_CONFIG_INFO_COLOR PPI_CONFIG_INFO_COLOR +#endif +#if defined(PPI_CONFIG_DEBUG_COLOR) +#undef NRFX_PPI_CONFIG_DEBUG_COLOR +#define NRFX_PPI_CONFIG_DEBUG_COLOR PPI_CONFIG_DEBUG_COLOR +#endif + +#endif // defined(PPI_ENABLED) + +//------------------------------------------------------------------------------ +// PWM + +#if defined(PWM_ENABLED) + +#undef NRFX_PWM_ENABLED +#define NRFX_PWM_ENABLED PWM_ENABLED + +#if defined(PWM0_ENABLED) +#undef NRFX_PWM0_ENABLED +#define NRFX_PWM0_ENABLED PWM0_ENABLED +#endif +#if defined(PWM1_ENABLED) +#undef NRFX_PWM1_ENABLED +#define NRFX_PWM1_ENABLED PWM1_ENABLED +#endif +#if defined(PWM2_ENABLED) +#undef NRFX_PWM2_ENABLED +#define NRFX_PWM2_ENABLED PWM2_ENABLED +#endif +#if defined(PWM3_ENABLED) +#undef NRFX_PWM3_ENABLED +#define NRFX_PWM3_ENABLED PWM3_ENABLED +#endif + +#if defined(PWM_DEFAULT_CONFIG_OUT0_PIN) +#undef NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN +#define NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN PWM_DEFAULT_CONFIG_OUT0_PIN +#endif +#if defined(PWM_DEFAULT_CONFIG_OUT1_PIN) +#undef NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN +#define NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN PWM_DEFAULT_CONFIG_OUT1_PIN +#endif +#if defined(PWM_DEFAULT_CONFIG_OUT2_PIN) +#undef NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN +#define NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN PWM_DEFAULT_CONFIG_OUT2_PIN +#endif +#if defined(PWM_DEFAULT_CONFIG_OUT3_PIN) +#undef NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN +#define NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN PWM_DEFAULT_CONFIG_OUT3_PIN +#endif +#if defined(PWM_DEFAULT_CONFIG_BASE_CLOCK) +#undef NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK +#define NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK PWM_DEFAULT_CONFIG_BASE_CLOCK +#endif +#if defined(PWM_DEFAULT_CONFIG_COUNT_MODE) +#undef NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE +#define NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE PWM_DEFAULT_CONFIG_COUNT_MODE +#endif +#if defined(PWM_DEFAULT_CONFIG_TOP_VALUE) +#undef NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE +#define NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE PWM_DEFAULT_CONFIG_TOP_VALUE +#endif +#if defined(PWM_DEFAULT_CONFIG_LOAD_MODE) +#undef NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE +#define NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE PWM_DEFAULT_CONFIG_LOAD_MODE +#endif +#if defined(PWM_DEFAULT_CONFIG_STEP_MODE) +#undef NRFX_PWM_DEFAULT_CONFIG_STEP_MODE +#define NRFX_PWM_DEFAULT_CONFIG_STEP_MODE PWM_DEFAULT_CONFIG_STEP_MODE +#endif +#if defined(PWM_DEFAULT_CONFIG_IRQ_PRIORITY) +#undef NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY PWM_DEFAULT_CONFIG_IRQ_PRIORITY +#endif + +#if defined(PWM_CONFIG_LOG_ENABLED) +#undef NRFX_PWM_CONFIG_LOG_ENABLED +#define NRFX_PWM_CONFIG_LOG_ENABLED PWM_CONFIG_LOG_ENABLED +#endif +#if defined(PWM_CONFIG_LOG_LEVEL) +#undef NRFX_PWM_CONFIG_LOG_LEVEL +#define NRFX_PWM_CONFIG_LOG_LEVEL PWM_CONFIG_LOG_LEVEL +#endif +#if defined(PWM_CONFIG_INFO_COLOR) +#undef NRFX_PWM_CONFIG_INFO_COLOR +#define NRFX_PWM_CONFIG_INFO_COLOR PWM_CONFIG_INFO_COLOR +#endif +#if defined(PWM_CONFIG_DEBUG_COLOR) +#undef NRFX_PWM_CONFIG_DEBUG_COLOR +#define NRFX_PWM_CONFIG_DEBUG_COLOR PWM_CONFIG_DEBUG_COLOR +#endif + +#if defined(PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED) +#undef NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED +#define NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED +#endif +#if defined(PWM_NRF52_ANOMALY_109_EGU_INSTANCE) +#undef NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE +#define NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE PWM_NRF52_ANOMALY_109_EGU_INSTANCE +#endif + +#endif // defined(PWM_ENABLED) + +//------------------------------------------------------------------------------ +// QDEC + +#if defined(QDEC_ENABLED) + +#undef NRFX_QDEC_ENABLED +#define NRFX_QDEC_ENABLED QDEC_ENABLED + +#if defined(QDEC_CONFIG_REPORTPER) +#undef NRFX_QDEC_CONFIG_REPORTPER +#define NRFX_QDEC_CONFIG_REPORTPER QDEC_CONFIG_REPORTPER +#endif +#if defined(QDEC_CONFIG_SAMPLEPER) +#undef NRFX_QDEC_CONFIG_SAMPLEPER +#define NRFX_QDEC_CONFIG_SAMPLEPER QDEC_CONFIG_SAMPLEPER +#endif +#if defined(QDEC_CONFIG_PIO_A) +#undef NRFX_QDEC_CONFIG_PIO_A +#define NRFX_QDEC_CONFIG_PIO_A QDEC_CONFIG_PIO_A +#endif +#if defined(QDEC_CONFIG_PIO_B) +#undef NRFX_QDEC_CONFIG_PIO_B +#define NRFX_QDEC_CONFIG_PIO_B QDEC_CONFIG_PIO_B +#endif +#if defined(QDEC_CONFIG_PIO_LED) +#undef NRFX_QDEC_CONFIG_PIO_LED +#define NRFX_QDEC_CONFIG_PIO_LED QDEC_CONFIG_PIO_LED +#endif +#if defined(QDEC_CONFIG_LEDPRE) +#undef NRFX_QDEC_CONFIG_LEDPRE +#define NRFX_QDEC_CONFIG_LEDPRE QDEC_CONFIG_LEDPRE +#endif +#if defined(QDEC_CONFIG_LEDPOL) +#undef NRFX_QDEC_CONFIG_LEDPOL +#define NRFX_QDEC_CONFIG_LEDPOL QDEC_CONFIG_LEDPOL +#endif +#if defined(QDEC_CONFIG_DBFEN) +#undef NRFX_QDEC_CONFIG_DBFEN +#define NRFX_QDEC_CONFIG_DBFEN QDEC_CONFIG_DBFEN +#endif +#if defined(QDEC_CONFIG_SAMPLE_INTEN) +#undef NRFX_QDEC_CONFIG_SAMPLE_INTEN +#define NRFX_QDEC_CONFIG_SAMPLE_INTEN QDEC_CONFIG_SAMPLE_INTEN +#endif +#if defined(QDEC_CONFIG_IRQ_PRIORITY) +#undef NRFX_QDEC_CONFIG_IRQ_PRIORITY +#define NRFX_QDEC_CONFIG_IRQ_PRIORITY QDEC_CONFIG_IRQ_PRIORITY +#endif + +#if defined(QDEC_CONFIG_LOG_ENABLED) +#undef NRFX_QDEC_CONFIG_LOG_ENABLED +#define NRFX_QDEC_CONFIG_LOG_ENABLED QDEC_CONFIG_LOG_ENABLED +#endif +#if defined(QDEC_CONFIG_LOG_LEVEL) +#undef NRFX_QDEC_CONFIG_LOG_LEVEL +#define NRFX_QDEC_CONFIG_LOG_LEVEL QDEC_CONFIG_LOG_LEVEL +#endif +#if defined(QDEC_CONFIG_INFO_COLOR) +#undef NRFX_QDEC_CONFIG_INFO_COLOR +#define NRFX_QDEC_CONFIG_INFO_COLOR QDEC_CONFIG_INFO_COLOR +#endif +#if defined(QDEC_CONFIG_DEBUG_COLOR) +#undef NRFX_QDEC_CONFIG_DEBUG_COLOR +#define NRFX_QDEC_CONFIG_DEBUG_COLOR QDEC_CONFIG_DEBUG_COLOR +#endif + +#endif // defined(QDEC_ENABLED) + +//------------------------------------------------------------------------------ +// QSPI + +#if defined(QSPI_ENABLED) + +#undef NRFX_QSPI_ENABLED +#define NRFX_QSPI_ENABLED QSPI_ENABLED + +#if defined(QSPI_CONFIG_SCK_DELAY) +#undef NRFX_QSPI_CONFIG_SCK_DELAY +#define NRFX_QSPI_CONFIG_SCK_DELAY QSPI_CONFIG_SCK_DELAY +#endif +#if defined(QSPI_CONFIG_XIP_OFFSET) +#undef NRFX_QSPI_CONFIG_XIP_OFFSET +#define NRFX_QSPI_CONFIG_XIP_OFFSET QSPI_CONFIG_XIP_OFFSET +#endif +#if defined(QSPI_CONFIG_READOC) +#undef NRFX_QSPI_CONFIG_READOC +#define NRFX_QSPI_CONFIG_READOC QSPI_CONFIG_READOC +#endif +#if defined(QSPI_CONFIG_WRITEOC) +#undef NRFX_QSPI_CONFIG_WRITEOC +#define NRFX_QSPI_CONFIG_WRITEOC QSPI_CONFIG_WRITEOC +#endif +#if defined(QSPI_CONFIG_ADDRMODE) +#undef NRFX_QSPI_CONFIG_ADDRMODE +#define NRFX_QSPI_CONFIG_ADDRMODE QSPI_CONFIG_ADDRMODE +#endif +#if defined(QSPI_CONFIG_MODE) +#undef NRFX_QSPI_CONFIG_MODE +#define NRFX_QSPI_CONFIG_MODE QSPI_CONFIG_MODE +#endif +#if defined(QSPI_CONFIG_FREQUENCY) +#undef NRFX_QSPI_CONFIG_FREQUENCY +#define NRFX_QSPI_CONFIG_FREQUENCY QSPI_CONFIG_FREQUENCY +#endif +#if defined(QSPI_CONFIG_IRQ_PRIORITY) +#undef NRFX_QSPI_CONFIG_IRQ_PRIORITY +#define NRFX_QSPI_CONFIG_IRQ_PRIORITY QSPI_CONFIG_IRQ_PRIORITY +#endif + +#if defined(QSPI_PIN_SCK) +#undef NRFX_QSPI_PIN_SCK +#define NRFX_QSPI_PIN_SCK QSPI_PIN_SCK +#endif +#if defined(QSPI_PIN_CSN) +#undef NRFX_QSPI_PIN_CSN +#define NRFX_QSPI_PIN_CSN QSPI_PIN_CSN +#endif +#if defined(QSPI_PIN_IO0) +#undef NRFX_QSPI_PIN_IO0 +#define NRFX_QSPI_PIN_IO0 QSPI_PIN_IO0 +#endif +#if defined(QSPI_PIN_IO0) +#undef NRFX_QSPI_PIN_IO0 +#define NRFX_QSPI_PIN_IO0 QSPI_PIN_IO0 +#endif +#if defined(QSPI_PIN_IO1) +#undef NRFX_QSPI_PIN_IO1 +#define NRFX_QSPI_PIN_IO1 QSPI_PIN_IO1 +#endif +#if defined(QSPI_PIN_IO2) +#undef NRFX_QSPI_PIN_IO2 +#define NRFX_QSPI_PIN_IO2 QSPI_PIN_IO2 +#endif +#if defined(QSPI_PIN_IO3) +#undef NRFX_QSPI_PIN_IO3 +#define NRFX_QSPI_PIN_IO3 QSPI_PIN_IO3 +#endif + +#endif // defined(QSPI_ENABLED) + +//------------------------------------------------------------------------------ +// RNG + +#if defined(RNG_ENABLED) + +#undef NRFX_RNG_ENABLED +#define NRFX_RNG_ENABLED RNG_ENABLED + +#if defined(RNG_CONFIG_ERROR_CORRECTION) +#undef NRFX_RNG_CONFIG_ERROR_CORRECTION +#define NRFX_RNG_CONFIG_ERROR_CORRECTION RNG_CONFIG_ERROR_CORRECTION +#endif + +#if defined(RNG_CONFIG_IRQ_PRIORITY) +#undef NRFX_RNG_CONFIG_IRQ_PRIORITY +#define NRFX_RNG_CONFIG_IRQ_PRIORITY RNG_CONFIG_IRQ_PRIORITY +#endif + +#if defined(RNG_CONFIG_LOG_ENABLED) +#undef NRFX_RNG_CONFIG_LOG_ENABLED +#define NRFX_RNG_CONFIG_LOG_ENABLED RNG_CONFIG_LOG_ENABLED +#endif +#if defined(RNG_CONFIG_LOG_LEVEL) +#undef NRFX_RNG_CONFIG_LOG_LEVEL +#define NRFX_RNG_CONFIG_LOG_LEVEL RNG_CONFIG_LOG_LEVEL +#endif +#if defined(RNG_CONFIG_INFO_COLOR) +#undef NRFX_RNG_CONFIG_INFO_COLOR +#define NRFX_RNG_CONFIG_INFO_COLOR RNG_CONFIG_INFO_COLOR +#endif +#if defined(RNG_CONFIG_DEBUG_COLOR) +#undef NRFX_RNG_CONFIG_DEBUG_COLOR +#define NRFX_RNG_CONFIG_DEBUG_COLOR RNG_CONFIG_DEBUG_COLOR +#endif + +#endif // defined(RNG_ENABLED) + +//------------------------------------------------------------------------------ +// RTC + +#if defined(RTC_ENABLED) + +#undef NRFX_RTC_ENABLED +#define NRFX_RTC_ENABLED RTC_ENABLED + +#if defined(RTC0_ENABLED) +#undef NRFX_RTC0_ENABLED +#define NRFX_RTC0_ENABLED RTC0_ENABLED +#endif +#if defined(RTC1_ENABLED) +#undef NRFX_RTC1_ENABLED +#define NRFX_RTC1_ENABLED RTC1_ENABLED +#endif +#if defined(RTC2_ENABLED) +#undef NRFX_RTC2_ENABLED +#define NRFX_RTC2_ENABLED RTC2_ENABLED +#endif + +#if defined(RTC_DEFAULT_CONFIG_FREQUENCY) +#undef NRFX_RTC_DEFAULT_CONFIG_FREQUENCY +#define NRFX_RTC_DEFAULT_CONFIG_FREQUENCY RTC_DEFAULT_CONFIG_FREQUENCY +#endif +#if defined(RTC_DEFAULT_CONFIG_RELIABLE) +#undef NRFX_RTC_DEFAULT_CONFIG_RELIABLE +#define NRFX_RTC_DEFAULT_CONFIG_RELIABLE RTC_DEFAULT_CONFIG_RELIABLE +#endif +#if defined(RTC_DEFAULT_CONFIG_IRQ_PRIORITY) +#undef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY RTC_DEFAULT_CONFIG_IRQ_PRIORITY +#endif + +#if defined(NRF_MAXIMUM_LATENCY_US) +#undef NRFX_RTC_MAXIMUM_LATENCY_US +#define NRFX_RTC_MAXIMUM_LATENCY_US NRF_MAXIMUM_LATENCY_US +#endif + +#if defined(RTC_CONFIG_LOG_ENABLED) +#undef NRFX_RTC_CONFIG_LOG_ENABLED +#define NRFX_RTC_CONFIG_LOG_ENABLED RTC_CONFIG_LOG_ENABLED +#endif +#if defined(RTC_CONFIG_LOG_LEVEL) +#undef NRFX_RTC_CONFIG_LOG_LEVEL +#define NRFX_RTC_CONFIG_LOG_LEVEL RTC_CONFIG_LOG_LEVEL +#endif +#if defined(RTC_CONFIG_INFO_COLOR) +#undef NRFX_RTC_CONFIG_INFO_COLOR +#define NRFX_RTC_CONFIG_INFO_COLOR RTC_CONFIG_INFO_COLOR +#endif +#if defined(RTC_CONFIG_DEBUG_COLOR) +#undef NRFX_RTC_CONFIG_DEBUG_COLOR +#define NRFX_RTC_CONFIG_DEBUG_COLOR RTC_CONFIG_DEBUG_COLOR +#endif + +#endif // defined(RTC_ENABLED) + +//------------------------------------------------------------------------------ +// SAADC + +#if defined(SAADC_ENABLED) + +#undef NRFX_SAADC_ENABLED +#define NRFX_SAADC_ENABLED SAADC_ENABLED + +#if defined(SAADC_CONFIG_RESOLUTION) +#undef NRFX_SAADC_CONFIG_RESOLUTION +#define NRFX_SAADC_CONFIG_RESOLUTION SAADC_CONFIG_RESOLUTION +#endif +#if defined(SAADC_CONFIG_OVERSAMPLE) +#undef NRFX_SAADC_CONFIG_OVERSAMPLE +#define NRFX_SAADC_CONFIG_OVERSAMPLE SAADC_CONFIG_OVERSAMPLE +#endif +#if defined(SAADC_CONFIG_LP_MODE) +#undef NRFX_SAADC_CONFIG_LP_MODE +#define NRFX_SAADC_CONFIG_LP_MODE SAADC_CONFIG_LP_MODE +#endif +#if defined(SAADC_CONFIG_IRQ_PRIORITY) +#undef NRFX_SAADC_CONFIG_IRQ_PRIORITY +#define NRFX_SAADC_CONFIG_IRQ_PRIORITY SAADC_CONFIG_IRQ_PRIORITY +#endif + +#if defined(SAADC_CONFIG_LOG_ENABLED) +#undef NRFX_SAADC_CONFIG_LOG_ENABLED +#define NRFX_SAADC_CONFIG_LOG_ENABLED SAADC_CONFIG_LOG_ENABLED +#endif +#if defined(SAADC_CONFIG_LOG_LEVEL) +#undef NRFX_SAADC_CONFIG_LOG_LEVEL +#define NRFX_SAADC_CONFIG_LOG_LEVEL SAADC_CONFIG_LOG_LEVEL +#endif +#if defined(SAADC_CONFIG_INFO_COLOR) +#undef NRFX_SAADC_CONFIG_INFO_COLOR +#define NRFX_SAADC_CONFIG_INFO_COLOR SAADC_CONFIG_INFO_COLOR +#endif +#if defined(SAADC_CONFIG_DEBUG_COLOR) +#undef NRFX_SAADC_CONFIG_DEBUG_COLOR +#define NRFX_SAADC_CONFIG_DEBUG_COLOR SAADC_CONFIG_DEBUG_COLOR +#endif + +#endif // defined(SAADC_ENABLED) + +//------------------------------------------------------------------------------ +// SPI + +#if defined(SPI_ENABLED) + +#undef NRFX_SPI_ENABLED +#define NRFX_SPI_ENABLED \ + (SPI_ENABLED && (NRFX_SPI0_ENABLED || NRFX_SPI1_ENABLED || NRFX_SPI2_ENABLED)) +#undef NRFX_SPIM_ENABLED +#define NRFX_SPIM_ENABLED \ + (SPI_ENABLED && (NRFX_SPIM0_ENABLED || NRFX_SPIM1_ENABLED || NRFX_SPIM2_ENABLED)) + +#if defined(SPI_PRESENT) && !defined(SPIM_PRESENT) + +#undef NRFX_SPI0_ENABLED +#define NRFX_SPI0_ENABLED SPI0_ENABLED +#undef NRFX_SPIM0_ENABLED +#define NRFX_SPIM0_ENABLED 0 + +#undef NRFX_SPI1_ENABLED +#define NRFX_SPI1_ENABLED SPI1_ENABLED +#undef NRFX_SPIM1_ENABLED +#define NRFX_SPIM1_ENABLED 0 + +#undef NRFX_SPI2_ENABLED +#define NRFX_SPI2_ENABLED SPI2_ENABLED +#undef NRFX_SPIM2_ENABLED +#define NRFX_SPIM2_ENABLED 0 + +#elif !defined(SPI_PRESENT) && defined(SPIM_PRESENT) + +#undef NRFX_SPI0_ENABLED +#define NRFX_SPI0_ENABLED 0 +#undef NRFX_SPIM0_ENABLED +#define NRFX_SPIM0_ENABLED SPI0_ENABLED + +#undef NRFX_SPI1_ENABLED +#define NRFX_SPI1_ENABLED 0 +#undef NRFX_SPIM1_ENABLED +#define NRFX_SPIM1_ENABLED SPI1_ENABLED + +#undef NRFX_SPI2_ENABLED +#define NRFX_SPI2_ENABLED 0 +#undef NRFX_SPIM2_ENABLED +#define NRFX_SPIM2_ENABLED SPI2_ENABLED + +#else // -> defined(SPI_PRESENT) && defined(SPIM_PRESENT) + +#undef NRFX_SPI0_ENABLED +#define NRFX_SPI0_ENABLED (SPI0_ENABLED && !SPI0_USE_EASY_DMA) +#undef NRFX_SPIM0_ENABLED +#define NRFX_SPIM0_ENABLED (SPI0_ENABLED && SPI0_USE_EASY_DMA) + +#undef NRFX_SPI1_ENABLED +#define NRFX_SPI1_ENABLED (SPI1_ENABLED && !SPI1_USE_EASY_DMA) +#undef NRFX_SPIM1_ENABLED +#define NRFX_SPIM1_ENABLED (SPI1_ENABLED && SPI1_USE_EASY_DMA) + +#undef NRFX_SPI2_ENABLED +#define NRFX_SPI2_ENABLED (SPI2_ENABLED && !SPI2_USE_EASY_DMA) +#undef NRFX_SPIM2_ENABLED +#define NRFX_SPIM2_ENABLED (SPI2_ENABLED && SPI2_USE_EASY_DMA) + +#endif // -> defined(SPI_PRESENT) && defined(SPIM_PRESENT) + +#if defined(NRF_SPI_DRV_MISO_PULLUP_CFG) +#undef NRFX_SPI_MISO_PULL_CFG +#define NRFX_SPI_MISO_PULL_CFG NRF_SPI_DRV_MISO_PULLUP_CFG +#undef NRFX_SPIM_MISO_PULL_CFG +#define NRFX_SPIM_MISO_PULL_CFG NRF_SPI_DRV_MISO_PULLUP_CFG +#endif + +#if defined(SPI_DEFAULT_CONFIG_IRQ_PRIORITY) +#undef NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY SPI_DEFAULT_CONFIG_IRQ_PRIORITY +#undef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY SPI_DEFAULT_CONFIG_IRQ_PRIORITY +#endif + +#if defined(SPI_CONFIG_LOG_ENABLED) +#undef NRFX_SPI_CONFIG_LOG_ENABLED +#define NRFX_SPI_CONFIG_LOG_ENABLED SPI_CONFIG_LOG_ENABLED +#undef NRFX_SPIM_CONFIG_LOG_ENABLED +#define NRFX_SPIM_CONFIG_LOG_ENABLED SPI_CONFIG_LOG_ENABLED +#endif +#if defined(SPI_CONFIG_LOG_LEVEL) +#undef NRFX_SPI_CONFIG_LOG_LEVEL +#define NRFX_SPI_CONFIG_LOG_LEVEL SPI_CONFIG_LOG_LEVEL +#undef NRFX_SPIM_CONFIG_LOG_LEVEL +#define NRFX_SPIM_CONFIG_LOG_LEVEL SPI_CONFIG_LOG_LEVEL +#endif +#if defined(SPI_CONFIG_INFO_COLOR) +#undef NRFX_SPI_CONFIG_INFO_COLOR +#define NRFX_SPI_CONFIG_INFO_COLOR SPI_CONFIG_INFO_COLOR +#undef NRFX_SPIM_CONFIG_INFO_COLOR +#define NRFX_SPIM_CONFIG_INFO_COLOR SPI_CONFIG_INFO_COLOR +#endif +#if defined(SPI_CONFIG_DEBUG_COLOR) +#undef NRFX_SPI_CONFIG_DEBUG_COLOR +#define NRFX_SPI_CONFIG_DEBUG_COLOR SPI_CONFIG_DEBUG_COLOR +#undef NRFX_SPIM_CONFIG_DEBUG_COLOR +#define NRFX_SPIM_CONFIG_DEBUG_COLOR SPI_CONFIG_DEBUG_COLOR +#endif + +#if defined(SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED) +#undef NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED +#define NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED +#endif + +#endif // defined(SPI_ENABLED) + +//------------------------------------------------------------------------------ +// SPIS + +#if defined(SPIS_ENABLED) + +#undef NRFX_SPIS_ENABLED +#define NRFX_SPIS_ENABLED SPIS_ENABLED + +#if defined(SPIS0_ENABLED) +#undef NRFX_SPIS0_ENABLED +#define NRFX_SPIS0_ENABLED SPIS0_ENABLED +#endif +#if defined(SPIS1_ENABLED) +#undef NRFX_SPIS1_ENABLED +#define NRFX_SPIS1_ENABLED SPIS1_ENABLED +#endif +#if defined(SPIS2_ENABLED) +#undef NRFX_SPIS2_ENABLED +#define NRFX_SPIS2_ENABLED SPIS2_ENABLED +#endif + +#if defined(SPIS_DEFAULT_CONFIG_IRQ_PRIORITY) +#undef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY SPIS_DEFAULT_CONFIG_IRQ_PRIORITY +#endif +#if defined(SPIS_DEFAULT_MODE) +#undef NRFX_SPIS_DEFAULT_MODE +#define NRFX_SPIS_DEFAULT_MODE SPIS_DEFAULT_MODE +#endif +#if defined(SPIS_DEFAULT_BIT_ORDER) +#undef NRFX_SPIS_DEFAULT_BIT_ORDER +#define NRFX_SPIS_DEFAULT_BIT_ORDER SPIS_DEFAULT_BIT_ORDER +#endif +#if defined(SPIS_DEFAULT_DEF) +#undef NRFX_SPIS_DEFAULT_DEF +#define NRFX_SPIS_DEFAULT_DEF SPIS_DEFAULT_DEF +#endif +#if defined(SPIS_DEFAULT_ORC) +#undef NRFX_SPIS_DEFAULT_ORC +#define NRFX_SPIS_DEFAULT_ORC SPIS_DEFAULT_ORC +#endif + +#if defined(SPIS_CONFIG_LOG_ENABLED) +#undef NRFX_SPIS_CONFIG_LOG_ENABLED +#define NRFX_SPIS_CONFIG_LOG_ENABLED SPIS_CONFIG_LOG_ENABLED +#endif +#if defined(SPIS_CONFIG_LOG_LEVEL) +#undef NRFX_SPIS_CONFIG_LOG_LEVEL +#define NRFX_SPIS_CONFIG_LOG_LEVEL SPIS_CONFIG_LOG_LEVEL +#endif +#if defined(SPIS_CONFIG_INFO_COLOR) +#undef NRFX_SPIS_CONFIG_INFO_COLOR +#define NRFX_SPIS_CONFIG_INFO_COLOR SPIS_CONFIG_INFO_COLOR +#endif +#if defined(SPIS_CONFIG_DEBUG_COLOR) +#undef NRFX_SPIS_CONFIG_DEBUG_COLOR +#define NRFX_SPIS_CONFIG_DEBUG_COLOR SPIS_CONFIG_DEBUG_COLOR +#endif + +#if defined(SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED) +#undef NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED +#define NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED +#endif + +#endif // defined(SPIS_ENABLED) + +//------------------------------------------------------------------------------ +// SWI + +#if defined(SWI_DISABLE0) +#undef NRFX_SWI0_DISABLED +#define NRFX_SWI0_DISABLED 1 +#endif +#if defined(SWI_DISABLE1) +#undef NRFX_SWI1_DISABLED +#define NRFX_SWI1_DISABLED 1 +#endif +#if defined(SWI_DISABLE2) +#undef NRFX_SWI2_DISABLED +#define NRFX_SWI2_DISABLED 1 +#endif +#if defined(SWI_DISABLE3) +#undef NRFX_SWI3_DISABLED +#define NRFX_SWI3_DISABLED 1 +#endif +#if defined(SWI_DISABLE4) +#undef NRFX_SWI4_DISABLED +#define NRFX_SWI4_DISABLED 1 +#endif +#if defined(SWI_DISABLE5) +#undef NRFX_SWI5_DISABLED +#define NRFX_SWI5_DISABLED 1 +#endif + +#if defined(EGU_ENABLED) +#undef NRFX_EGU_ENABLED +#define NRFX_EGU_ENABLED EGU_ENABLED +#endif + +#if defined(SWI_CONFIG_LOG_ENABLED) +#undef NRFX_SWI_CONFIG_LOG_ENABLED +#define NRFX_SWI_CONFIG_LOG_ENABLED SWI_CONFIG_LOG_ENABLED +#endif +#if defined(SWI_CONFIG_LOG_LEVEL) +#undef NRFX_SWI_CONFIG_LOG_LEVEL +#define NRFX_SWI_CONFIG_LOG_LEVEL SWI_CONFIG_LOG_LEVEL +#endif +#if defined(SWI_CONFIG_INFO_COLOR) +#undef NRFX_SWI_CONFIG_INFO_COLOR +#define NRFX_SWI_CONFIG_INFO_COLOR SWI_CONFIG_INFO_COLOR +#endif +#if defined(SWI_CONFIG_DEBUG_COLOR) +#undef NRFX_SWI_CONFIG_DEBUG_COLOR +#define NRFX_SWI_CONFIG_DEBUG_COLOR SWI_CONFIG_DEBUG_COLOR +#endif + +//------------------------------------------------------------------------------ +// SysTick + +#if defined(SYSTICK_ENABLED) + +#undef NRFX_SYSTICK_ENABLED +#define NRFX_SYSTICK_ENABLED SYSTICK_ENABLED + +#endif // defined(SYSTICK_ENABLED) + +//------------------------------------------------------------------------------ +// TIMER + +#if defined(TIMER_ENABLED) + +#undef NRFX_TIMER_ENABLED +#define NRFX_TIMER_ENABLED TIMER_ENABLED + +#if defined(TIMER0_ENABLED) +#undef NRFX_TIMER0_ENABLED +#define NRFX_TIMER0_ENABLED TIMER0_ENABLED +#endif +#if defined(TIMER1_ENABLED) +#undef NRFX_TIMER1_ENABLED +#define NRFX_TIMER1_ENABLED TIMER1_ENABLED +#endif +#if defined(TIMER2_ENABLED) +#undef NRFX_TIMER2_ENABLED +#define NRFX_TIMER2_ENABLED TIMER2_ENABLED +#endif +#if defined(TIMER3_ENABLED) +#undef NRFX_TIMER3_ENABLED +#define NRFX_TIMER3_ENABLED TIMER3_ENABLED +#endif +#if defined(TIMER4_ENABLED) +#undef NRFX_TIMER4_ENABLED +#define NRFX_TIMER4_ENABLED TIMER4_ENABLED +#endif + +#if defined(TIMER_DEFAULT_CONFIG_FREQUENCY) +#undef NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY +#define NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY TIMER_DEFAULT_CONFIG_FREQUENCY +#endif +#if defined(TIMER_DEFAULT_CONFIG_MODE) +#undef NRFX_TIMER_DEFAULT_CONFIG_MODE +#define NRFX_TIMER_DEFAULT_CONFIG_MODE TIMER_DEFAULT_CONFIG_MODE +#endif +#if defined(TIMER_DEFAULT_CONFIG_BIT_WIDTH) +#undef NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH +#define NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH TIMER_DEFAULT_CONFIG_BIT_WIDTH +#endif +#if defined(TIMER_DEFAULT_CONFIG_IRQ_PRIORITY) +#undef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY TIMER_DEFAULT_CONFIG_IRQ_PRIORITY +#endif + +#if defined(TIMER_CONFIG_LOG_ENABLED) +#undef NRFX_TIMER_CONFIG_LOG_ENABLED +#define NRFX_TIMER_CONFIG_LOG_ENABLED TIMER_CONFIG_LOG_ENABLED +#endif +#if defined(TIMER_CONFIG_LOG_LEVEL) +#undef NRFX_TIMER_CONFIG_LOG_LEVEL +#define NRFX_TIMER_CONFIG_LOG_LEVEL TIMER_CONFIG_LOG_LEVEL +#endif +#if defined(TIMER_CONFIG_INFO_COLOR) +#undef NRFX_TIMER_CONFIG_INFO_COLOR +#define NRFX_TIMER_CONFIG_INFO_COLOR TIMER_CONFIG_INFO_COLOR +#endif +#if defined(TIMER_CONFIG_DEBUG_COLOR) +#undef NRFX_TIMER_CONFIG_DEBUG_COLOR +#define NRFX_TIMER_CONFIG_DEBUG_COLOR TIMER_CONFIG_DEBUG_COLOR +#endif + +#endif // defined(TIMER_ENABLED) + +//------------------------------------------------------------------------------ +// TWI +#define TWI_ONLY ( defined(TWI_PRESENT) && !defined(TWIM_PRESENT)) +#define TWIM_ONLY (!defined(TWI_PRESENT) && defined(TWIM_PRESENT)) +#define TWI_AND_TWIM ( defined(TWI_PRESENT) && defined(TWIM_PRESENT)) + +#if defined(TWI_ENABLED) + +#undef NRFX_TWI_ENABLED +#define NRFX_TWI_ENABLED (TWI_ENABLED && (NRFX_TWI0_ENABLED || NRFX_TWI1_ENABLED)) +#undef NRFX_TWIM_ENABLED +#define NRFX_TWIM_ENABLED (TWI_ENABLED && (NRFX_TWIM0_ENABLED || NRFX_TWIM1_ENABLED)) + +#if defined(TWI_PRESENT) && !defined(TWIM_PRESENT) + +#undef NRFX_TWI0_ENABLED +#define NRFX_TWI0_ENABLED TWI0_ENABLED +#undef NRFX_TWIM0_ENABLED +#define NRFX_TWIM0_ENABLED 0 + +#undef NRFX_TWI1_ENABLED +#define NRFX_TWI1_ENABLED TWI1_ENABLED +#undef NRFX_TWIM1_ENABLED +#define NRFX_TWIM1_ENABLED 0 + +#elif !defined(TWI_PRESENT) && defined(TWIM_PRESENT) + +#undef NRFX_TWI0_ENABLED +#define NRFX_TWI0_ENABLED 0 +#undef NRFX_TWIM0_ENABLED +#define NRFX_TWIM0_ENABLED TWI0_ENABLED + +#undef NRFX_TWI1_ENABLED +#define NRFX_TWI1_ENABLED 0 +#undef NRFX_TWIM1_ENABLED +#define NRFX_TWIM1_ENABLED TWI1_ENABLED + +#else // -> defined(TWI_PRESENT) && defined(TWIM_PRESENT) + +#undef NRFX_TWI0_ENABLED +#define NRFX_TWI0_ENABLED (TWI0_ENABLED && !TWI0_USE_EASY_DMA) +#undef NRFX_TWIM0_ENABLED +#define NRFX_TWIM0_ENABLED (TWI0_ENABLED && TWI0_USE_EASY_DMA) + +#undef NRFX_TWI1_ENABLED +#define NRFX_TWI1_ENABLED (TWI1_ENABLED && !TWI1_USE_EASY_DMA) +#undef NRFX_TWIM1_ENABLED +#define NRFX_TWIM1_ENABLED (TWI1_ENABLED && TWI1_USE_EASY_DMA) + +#endif // -> defined(TWI_PRESENT) && defined(TWIM_PRESENT) + +#if defined(TWI_DEFAULT_CONFIG_FREQUENCY) +#undef NRFX_TWI_DEFAULT_CONFIG_FREQUENCY +#define NRFX_TWI_DEFAULT_CONFIG_FREQUENCY TWI_DEFAULT_CONFIG_FREQUENCY +#undef NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY +#define NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY TWI_DEFAULT_CONFIG_FREQUENCY +#endif +#if defined(TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT) +#undef NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT +#define NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT +#undef NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT +#define NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT +#endif +#if defined(TWI_DEFAULT_CONFIG_IRQ_PRIORITY) +#undef NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY TWI_DEFAULT_CONFIG_IRQ_PRIORITY +#undef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY TWI_DEFAULT_CONFIG_IRQ_PRIORITY +#endif + +#if defined(TWI_CONFIG_LOG_ENABLED) +#undef NRFX_TWI_CONFIG_LOG_ENABLED +#define NRFX_TWI_CONFIG_LOG_ENABLED TWI_CONFIG_LOG_ENABLED +#undef NRFX_TWIM_CONFIG_LOG_ENABLED +#define NRFX_TWIM_CONFIG_LOG_ENABLED TWI_CONFIG_LOG_ENABLED +#endif +#if defined(TWI_CONFIG_LOG_LEVEL) +#undef NRFX_TWI_CONFIG_LOG_LEVEL +#define NRFX_TWI_CONFIG_LOG_LEVEL TWI_CONFIG_LOG_LEVEL +#undef NRFX_TWIM_CONFIG_LOG_LEVEL +#define NRFX_TWIM_CONFIG_LOG_LEVEL TWI_CONFIG_LOG_LEVEL +#endif +#if defined(TWI_CONFIG_INFO_COLOR) +#undef NRFX_TWI_CONFIG_INFO_COLOR +#define NRFX_TWI_CONFIG_INFO_COLOR TWI_CONFIG_INFO_COLOR +#undef NRFX_TWIM_CONFIG_INFO_COLOR +#define NRFX_TWIM_CONFIG_INFO_COLOR TWI_CONFIG_INFO_COLOR +#endif +#if defined(TWI_CONFIG_DEBUG_COLOR) +#undef NRFX_TWI_CONFIG_DEBUG_COLOR +#define NRFX_TWI_CONFIG_DEBUG_COLOR TWI_CONFIG_DEBUG_COLOR +#undef NRFX_TWIM_CONFIG_DEBUG_COLOR +#define NRFX_TWIM_CONFIG_DEBUG_COLOR TWI_CONFIG_DEBUG_COLOR +#endif + +#if defined(TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED) +#undef NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED +#define NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED +#endif + +#endif // defined(TWI_ENABLED) + +//------------------------------------------------------------------------------ +// TWIS + +#if defined(TWIS_ENABLED) + +#undef NRFX_TWIS_ENABLED +#define NRFX_TWIS_ENABLED TWIS_ENABLED + +#if defined(TWIS0_ENABLED) +#undef NRFX_TWIS0_ENABLED +#define NRFX_TWIS0_ENABLED TWIS0_ENABLED +#endif +#if defined(TWIS1_ENABLED) +#undef NRFX_TWIS1_ENABLED +#define NRFX_TWIS1_ENABLED TWIS1_ENABLED +#endif + +#if defined(TWIS_ASSUME_INIT_AFTER_RESET_ONLY) +#undef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY +#define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY TWIS_ASSUME_INIT_AFTER_RESET_ONLY +#endif +#if defined(TWIS_NO_SYNC_MODE) +#undef NRFX_TWIS_NO_SYNC_MODE +#define NRFX_TWIS_NO_SYNC_MODE TWIS_NO_SYNC_MODE +#endif + +#if defined(TWIS_DEFAULT_CONFIG_ADDR0) +#undef NRFX_TWIS_DEFAULT_CONFIG_ADDR0 +#define NRFX_TWIS_DEFAULT_CONFIG_ADDR0 TWIS_DEFAULT_CONFIG_ADDR0 +#endif +#if defined(TWIS_DEFAULT_CONFIG_ADDR1) +#undef NRFX_TWIS_DEFAULT_CONFIG_ADDR1 +#define NRFX_TWIS_DEFAULT_CONFIG_ADDR1 TWIS_DEFAULT_CONFIG_ADDR1 +#endif +#if defined(TWIS_DEFAULT_CONFIG_SCL_PULL) +#undef NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL +#define NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL TWIS_DEFAULT_CONFIG_SCL_PULL +#endif +#if defined(TWIS_DEFAULT_CONFIG_SDA_PULL) +#undef NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL +#define NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL TWIS_DEFAULT_CONFIG_SDA_PULL +#endif +#if defined(TWIS_DEFAULT_CONFIG_IRQ_PRIORITY) +#undef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY TWIS_DEFAULT_CONFIG_IRQ_PRIORITY +#endif + +#if defined(TWIS_CONFIG_LOG_ENABLED) +#undef NRFX_TWIS_CONFIG_LOG_ENABLED +#define NRFX_TWIS_CONFIG_LOG_ENABLED TWIS_CONFIG_LOG_ENABLED +#endif +#if defined(TWIS_CONFIG_LOG_LEVEL) +#undef NRFX_TWIS_CONFIG_LOG_LEVEL +#define NRFX_TWIS_CONFIG_LOG_LEVEL TWIS_CONFIG_LOG_LEVEL +#endif +#if defined(TWIS_CONFIG_INFO_COLOR) +#undef NRFX_TWIS_CONFIG_INFO_COLOR +#define NRFX_TWIS_CONFIG_INFO_COLOR TWIS_CONFIG_INFO_COLOR +#endif +#if defined(TWIS_CONFIG_DEBUG_COLOR) +#undef NRFX_TWIS_CONFIG_DEBUG_COLOR +#define NRFX_TWIS_CONFIG_DEBUG_COLOR TWIS_CONFIG_DEBUG_COLOR +#endif + +#endif // defined(TWIS_ENABLED) + +//------------------------------------------------------------------------------ +// UART + +#if defined(UART_ENABLED) + +#undef NRFX_UART_ENABLED +#define NRFX_UART_ENABLED (UART_ENABLED && NRFX_UART0_ENABLED) +#undef NRFX_UARTE_ENABLED +#define NRFX_UARTE_ENABLED (UART_ENABLED && (NRFX_UARTE0_ENABLED || NRFX_UARTE1_ENABLED)) + +#if defined(UART0_ENABLED) +#undef NRFX_UART0_ENABLED +#define NRFX_UART0_ENABLED (UART0_ENABLED && UART_LEGACY_SUPPORT) +#undef NRFX_UARTE0_ENABLED +#define NRFX_UARTE0_ENABLED (UART0_ENABLED && UART_EASY_DMA_SUPPORT) +#endif +#if defined(UART1_ENABLED) +#undef NRFX_UARTE1_ENABLED +#define NRFX_UARTE1_ENABLED (UART1_ENABLED && UART_EASY_DMA_SUPPORT) +#endif + +#if defined(UART_DEFAULT_CONFIG_HWFC) +#undef NRFX_UART_DEFAULT_CONFIG_HWFC +#define NRFX_UART_DEFAULT_CONFIG_HWFC UART_DEFAULT_CONFIG_HWFC +#undef NRFX_UARTE_DEFAULT_CONFIG_HWFC +#define NRFX_UARTE_DEFAULT_CONFIG_HWFC UART_DEFAULT_CONFIG_HWFC +#endif +#if defined(UART_DEFAULT_CONFIG_PARITY) +#undef NRFX_UART_DEFAULT_CONFIG_PARITY +#define NRFX_UART_DEFAULT_CONFIG_PARITY UART_DEFAULT_CONFIG_PARITY +#undef NRFX_UARTE_DEFAULT_CONFIG_PARITY +#define NRFX_UARTE_DEFAULT_CONFIG_PARITY UART_DEFAULT_CONFIG_PARITY +#endif +#if defined(UART_DEFAULT_CONFIG_BAUDRATE) +#undef NRFX_UART_DEFAULT_CONFIG_BAUDRATE +#define NRFX_UART_DEFAULT_CONFIG_BAUDRATE UART_DEFAULT_CONFIG_BAUDRATE +#undef NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE +#define NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE UART_DEFAULT_CONFIG_BAUDRATE +#endif +#if defined(UART_DEFAULT_CONFIG_IRQ_PRIORITY) +#undef NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY UART_DEFAULT_CONFIG_IRQ_PRIORITY +#undef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY UART_DEFAULT_CONFIG_IRQ_PRIORITY +#endif + +#if defined(UART_CONFIG_LOG_ENABLED) +#undef NRFX_UART_CONFIG_LOG_ENABLED +#define NRFX_UART_CONFIG_LOG_ENABLED UART_CONFIG_LOG_ENABLED +#undef NRFX_UARTE_CONFIG_LOG_ENABLED +#define NRFX_UARTE_CONFIG_LOG_ENABLED UART_CONFIG_LOG_ENABLED +#endif +#if defined(UART_CONFIG_LOG_LEVEL) +#undef NRFX_UART_CONFIG_LOG_LEVEL +#define NRFX_UART_CONFIG_LOG_LEVEL UART_CONFIG_LOG_LEVEL +#undef NRFX_UARTE_CONFIG_LOG_LEVEL +#define NRFX_UARTE_CONFIG_LOG_LEVEL UART_CONFIG_LOG_LEVEL +#endif +#if defined(UART_CONFIG_INFO_COLOR) +#undef NRFX_UART_CONFIG_INFO_COLOR +#define NRFX_UART_CONFIG_INFO_COLOR UART_CONFIG_INFO_COLOR +#undef NRFX_UARTE_CONFIG_INFO_COLOR +#define NRFX_UARTE_CONFIG_INFO_COLOR UART_CONFIG_INFO_COLOR +#endif +#if defined(UART_CONFIG_DEBUG_COLOR) +#undef NRFX_UART_CONFIG_DEBUG_COLOR +#define NRFX_UART_CONFIG_DEBUG_COLOR UART_CONFIG_DEBUG_COLOR +#undef NRFX_UARTE_CONFIG_DEBUG_COLOR +#define NRFX_UARTE_CONFIG_DEBUG_COLOR UART_CONFIG_DEBUG_COLOR +#endif + +#endif // defined(UART_ENABLED) + +//------------------------------------------------------------------------------ +// WDT + +#if defined(WDT_ENABLED) + +#undef NRFX_WDT_ENABLED +#define NRFX_WDT_ENABLED WDT_ENABLED + +#if defined(WDT_CONFIG_BEHAVIOUR) +#undef NRFX_WDT_CONFIG_BEHAVIOUR +#define NRFX_WDT_CONFIG_BEHAVIOUR WDT_CONFIG_BEHAVIOUR +#endif +#if defined(WDT_CONFIG_RELOAD_VALUE) +#undef NRFX_WDT_CONFIG_RELOAD_VALUE +#define NRFX_WDT_CONFIG_RELOAD_VALUE WDT_CONFIG_RELOAD_VALUE +#endif +#if defined(WDT_CONFIG_IRQ_PRIORITY) +#undef NRFX_WDT_CONFIG_IRQ_PRIORITY +#define NRFX_WDT_CONFIG_IRQ_PRIORITY WDT_CONFIG_IRQ_PRIORITY +#endif + +#if defined(WDT_CONFIG_LOG_ENABLED) +#undef NRFX_WDT_CONFIG_LOG_ENABLED +#define NRFX_WDT_CONFIG_LOG_ENABLED WDT_CONFIG_LOG_ENABLED +#endif +#if defined(WDT_CONFIG_LOG_LEVEL) +#undef NRFX_WDT_CONFIG_LOG_LEVEL +#define NRFX_WDT_CONFIG_LOG_LEVEL WDT_CONFIG_LOG_LEVEL +#endif +#if defined(WDT_CONFIG_INFO_COLOR) +#undef NRFX_WDT_CONFIG_INFO_COLOR +#define NRFX_WDT_CONFIG_INFO_COLOR WDT_CONFIG_INFO_COLOR +#endif +#if defined(WDT_CONFIG_DEBUG_COLOR) +#undef NRFX_WDT_CONFIG_DEBUG_COLOR +#define NRFX_WDT_CONFIG_DEBUG_COLOR WDT_CONFIG_DEBUG_COLOR +#endif + +#endif // defined(WDT_ENABLED) + +#endif // APPLY_OLD_CONFIG_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_clock.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_clock.h new file mode 100644 index 00000000000..5873bf21229 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_clock.h @@ -0,0 +1,297 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_DRV_CLOCK_H__ +#define NRF_DRV_CLOCK_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_drv_clock Clock driver - legacy layer + * @{ + * @ingroup nrf_clock + * + * @brief Layer providing compatibility with the former API. + */ + +/** + * @brief Clock events. + */ +typedef enum +{ + NRF_DRV_CLOCK_EVT_HFCLK_STARTED, ///< HFCLK has been started. + NRF_DRV_CLOCK_EVT_LFCLK_STARTED, ///< LFCLK has been started. + NRF_DRV_CLOCK_EVT_CAL_DONE, ///< Calibration is done. + NRF_DRV_CLOCK_EVT_CAL_ABORTED, ///< Calibration has been aborted. +} nrf_drv_clock_evt_type_t; + +/** + * @brief Clock event handler. + * + * @param[in] event Event. + */ +typedef void (*nrf_drv_clock_event_handler_t)(nrf_drv_clock_evt_type_t event); + +// Forward declaration of the nrf_drv_clock_handler_item_t type. +typedef struct nrf_drv_clock_handler_item_s nrf_drv_clock_handler_item_t; + +struct nrf_drv_clock_handler_item_s +{ + nrf_drv_clock_handler_item_t * p_next; ///< A pointer to the next handler that should be called when the clock is started. + nrf_drv_clock_event_handler_t event_handler; ///< Function to be called when the clock is started. +}; + +/** + * @brief Function for checking if driver is already initialized + * + * @retval true Driver is initialized + * @retval false Driver is uninitialized + */ +bool nrf_drv_clock_init_check(void); + +/** + * @brief Function for initializing the nrf_drv_clock module. + * + * After initialization, the module is in power off state (clocks are not requested). + * + * @retval NRF_SUCCESS If the procedure was successful. + * @retval NRF_ERROR_MODULE_ALREADY_INITIALIZED If the driver was already initialized. + */ +ret_code_t nrf_drv_clock_init(void); + +/** + * @brief Function for uninitializing the clock module. + * + */ +void nrf_drv_clock_uninit(void); + +/** + * @brief Function for requesting the LFCLK. + * + * The low-frequency clock can be requested by different modules + * or contexts. The driver ensures that the clock will be started only when it is requested + * the first time. If the clock is not ready but it was already started, the handler item that is + * provided as an input parameter is added to the list of handlers that will be notified + * when the clock is started. If the clock is already enabled, user callback is called from the + * current context. + * + * The first request will start the selected LFCLK source. If an event handler is + * provided, it will be called once the LFCLK is started. If the LFCLK was already started at this + * time, the event handler will be called from the context of this function. Additionally, + * the @ref nrf_drv_clock_lfclk_is_running function can be polled to check if the clock has started. + * + * @note When a SoftDevice is enabled, the LFCLK is always running and the driver cannot control it. + * + * @note The handler item provided by the user cannot be an automatic variable. + * + * @param[in] p_handler_item A pointer to the event handler structure. + */ +void nrf_drv_clock_lfclk_request(nrf_drv_clock_handler_item_t * p_handler_item); + +/** + * @brief Function for releasing the LFCLK. + * + * If there are no more requests, the LFCLK source will be stopped. + * + * @note When a SoftDevice is enabled, the LFCLK is always running. + */ +void nrf_drv_clock_lfclk_release(void); + +/** + * @brief Function for checking the LFCLK state. + * + * @retval true If the LFCLK is running. + * @retval false If the LFCLK is not running. + */ +bool nrf_drv_clock_lfclk_is_running(void); + +/** + * @brief Function for requesting the high-accuracy source HFCLK. + * + * The high-accuracy source + * can be requested by different modules or contexts. The driver ensures that the high-accuracy + * clock will be started only when it is requested the first time. If the clock is not ready + * but it was already started, the handler item that is provided as an input parameter is added + * to the list of handlers that will be notified when the clock is started. + * + * If an event handler is provided, it will be called once the clock is started. If the clock was already + * started at this time, the event handler will be called from the context of this function. Additionally, + * the @ref nrf_drv_clock_hfclk_is_running function can be polled to check if the clock has started. + * + * @note If a SoftDevice is running, the clock is managed by the SoftDevice and all requests are handled by + * the SoftDevice. This function cannot be called from all interrupt priority levels in that case. + * @note The handler item provided by the user cannot be an automatic variable. + * + * @param[in] p_handler_item A pointer to the event handler structure. + */ +void nrf_drv_clock_hfclk_request(nrf_drv_clock_handler_item_t * p_handler_item); + +/** + * @brief Function for releasing the high-accuracy source HFCLK. + * + * If there are no more requests, the high-accuracy source will be released. + */ +void nrf_drv_clock_hfclk_release(void); + +/** + * @brief Function for checking the HFCLK state. + * + * @retval true If the HFCLK is running (for \nRFXX XTAL source). + * @retval false If the HFCLK is not running. + */ +bool nrf_drv_clock_hfclk_is_running(void); + +/** + * @brief Function for starting a single calibration process. + * + * This function can also delay the start of calibration by a user-specified value. The delay will use + * a low-power timer that is part of the CLOCK module. @ref nrf_drv_clock_is_calibrating can be called to + * check if calibration is still in progress. If a handler is provided, the user can be notified when + * calibration is completed. The ext calibration can be started from the handler context. + * + * The calibration process consists of three phases: + * - Delay (optional) + * - Requesting the high-accuracy HFCLK + * - Hardware-supported calibration + * + * @param[in] delay Time after which the calibration will be started (in 0.25 s units). + * @param[in] handler NULL or user function to be called when calibration is completed or aborted. + * + * @retval NRF_SUCCESS If the procedure was successful. + * @retval NRF_ERROR_FORBIDDEN If a SoftDevice is present or the selected LFCLK source is not an RC oscillator. + * @retval NRF_ERROR_INVALID_STATE If the low-frequency clock is off. + * @retval NRF_ERROR_BUSY If calibration is in progress. + */ +ret_code_t nrf_drv_clock_calibration_start(uint8_t delay, nrf_drv_clock_event_handler_t handler); + +/** + * @brief Function for aborting calibration. + * + * This function aborts on-going calibration. If calibration was started, it cannot be stopped. If a handler + * was provided by @ref nrf_drv_clock_calibration_start, this handler will be called once + * aborted calibration is completed. @ref nrf_drv_clock_is_calibrating can also be used to check + * if the system is calibrating. + * + * @retval NRF_SUCCESS If the procedure was successful. + * @retval NRF_ERROR_FORBIDDEN If a SoftDevice is present or the selected LFCLK source is not an RC oscillator. + */ +ret_code_t nrf_drv_clock_calibration_abort(void); + +/** + * @brief Function for checking if calibration is in progress. + * + * This function indicates that the system is + * in calibration if it is in any of the calibration process phases (see @ref nrf_drv_clock_calibration_start). + * + * @param[out] p_is_calibrating True if calibration is in progress, false if not. + * + * @retval NRF_SUCCESS If the procedure was successful. + * @retval NRF_ERROR_FORBIDDEN If a SoftDevice is present or the selected LFCLK source is not an RC oscillator. + */ +ret_code_t nrf_drv_clock_is_calibrating(bool * p_is_calibrating); + +/**@brief Function for returning a requested task address for the clock driver module. + * + * @param[in] task One of the peripheral tasks. + * + * @return Task address. + */ +__STATIC_INLINE uint32_t nrf_drv_clock_ppi_task_addr(nrf_clock_task_t task); + +/**@brief Function for returning a requested event address for the clock driver module. + * + * @param[in] event One of the peripheral events. + * + * @return Event address. + */ +__STATIC_INLINE uint32_t nrf_drv_clock_ppi_event_addr(nrf_clock_event_t event); + + +#ifdef SOFTDEVICE_PRESENT +/** + * @brief Function called by the SoftDevice handler if an @ref NRF_SOC_EVTS event is received from the SoftDevice. + * + * @param[in] evt_id One of NRF_SOC_EVTS values. + */ +void nrf_drv_clock_on_soc_event(uint32_t evt_id); + +/** + * @brief Function called by the SoftDevice handler when the SoftDevice has been enabled. + * + * This function is called just after the SoftDevice has been properly enabled. + * Its main purpose is to mark that LFCLK has been requested by SD. + */ +void nrf_drv_clock_on_sd_enable(void); + +/** + * @brief Function called by the SoftDevice handler when the SoftDevice has been disabled. + * + * This function is called just after the SoftDevice has been properly disabled. + * It has two purposes: + * 1. Releases the LFCLK from the SD. + * 2. Reinitializes an interrupt after the SD releases POWER_CLOCK_IRQ. + */ +void nrf_drv_clock_on_sd_disable(void); + +#endif +/** + *@} + **/ + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION +__STATIC_INLINE uint32_t nrf_drv_clock_ppi_task_addr(nrf_clock_task_t task) +{ + return nrf_clock_task_address_get(task); +} + +__STATIC_INLINE uint32_t nrf_drv_clock_ppi_event_addr(nrf_clock_event_t event) +{ + return nrf_clock_event_address_get(event); +} +#endif //SUPPRESS_INLINE_IMPLEMENTATION + +#ifdef __cplusplus +} +#endif + +#endif // NRF_DRV_CLOCK_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_common.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_common.h new file mode 100644 index 00000000000..66439a3b130 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_common.h @@ -0,0 +1,63 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_DRV_COMMON_H__ +#define NRF_DRV_COMMON_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#define INTERRUPT_PRIORITY_VALIDATION(pri) STATIC_ASSERT(INTERRUPT_PRIORITY_IS_VALID((pri))) +#define INTERRUPT_PRIORITY_ASSERT(pri) ASSERT(INTERRUPT_PRIORITY_IS_VALID((pri))) + +#define nrf_drv_irq_handler_t nrfx_irq_handler_t +#define nrf_drv_bitpos_to_event nrfx_bitpos_to_event +#define nrf_drv_event_to_bitpos nrfx_event_to_bitpos +#define nrf_drv_get_IRQn nrfx_get_irq_number +#define nrf_drv_is_in_RAM nrfx_is_in_ram + +#ifdef __cplusplus +} +#endif + +#endif // NRF_DRV_COMMON_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_gpiote.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_gpiote.h new file mode 100644 index 00000000000..31bccb093b6 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_gpiote.h @@ -0,0 +1,139 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_DRV_GPIOTE_H__ +#define NRF_DRV_GPIOTE_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_drv_gpiote GPIOTE driver - legacy layer + * @{ + * @ingroup nrf_gpiote + * @brief Layer providing compatibility with the former API. + */ + +/** @brief Type definition for forwarding the new implementation. */ +typedef nrfx_gpiote_in_config_t nrf_drv_gpiote_in_config_t; +/** @brief Type definition for forwarding the new implementation. */ +typedef nrfx_gpiote_pin_t nrf_drv_gpiote_pin_t; +/** @brief Type definition for forwarding the new implementation. */ +typedef nrfx_gpiote_out_config_t nrf_drv_gpiote_out_config_t; +/** @brief Type definition for forwarding the new implementation. */ +typedef nrfx_gpiote_evt_handler_t nrf_drv_gpiote_evt_handler_t; + +/** @brief Macro for forwarding the new implementation. */ +#define GPIOTE_CONFIG_IN_SENSE_LOTOHI NRFX_GPIOTE_CONFIG_IN_SENSE_LOTOHI +/** @brief Macro for forwarding the new implementation. */ +#define GPIOTE_CONFIG_IN_SENSE_HITOLO NRFX_GPIOTE_CONFIG_IN_SENSE_HITOLO +/** @brief Macro for forwarding the new implementation. */ +#define GPIOTE_CONFIG_IN_SENSE_TOGGLE NRFX_GPIOTE_CONFIG_IN_SENSE_TOGGLE +/** @brief Macro for forwarding the new implementation. */ +#define GPIOTE_RAW_CONFIG_IN_SENSE_LOTOHI NRFX_GPIOTE_RAW_CONFIG_IN_SENSE_LOTOHI +/** @brief Macro for forwarding the new implementation. */ +#define GPIOTE_RAW_CONFIG_IN_SENSE_HITOLO NRFX_GPIOTE_RAW_CONFIG_IN_SENSE_HITOLO +/** @brief Macro for forwarding the new implementation. */ +#define GPIOTE_RAW_CONFIG_IN_SENSE_TOGGLE NRFX_GPIOTE_RAW_CONFIG_IN_SENSE_TOGGLE +/** @brief Macro for forwarding the new implementation. */ +#define GPIOTE_CONFIG_OUT_SIMPLE NRFX_GPIOTE_CONFIG_OUT_SIMPLE +/** @brief Macro for forwarding the new implementation. */ +#define GPIOTE_CONFIG_OUT_TASK_LOW NRFX_GPIOTE_CONFIG_OUT_TASK_LOW +/** @brief Macro for forwarding the new implementation. */ +#define GPIOTE_CONFIG_OUT_TASK_HIGH NRFX_GPIOTE_CONFIG_OUT_TASK_HIGH +/** @brief Macro for forwarding the new implementation. */ +#define GPIOTE_CONFIG_OUT_TASK_TOGGLE NRFX_GPIOTE_CONFIG_OUT_TASK_TOGGLE + +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_gpiote_init nrfx_gpiote_init +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_gpiote_is_init nrfx_gpiote_is_init +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_gpiote_uninit nrfx_gpiote_uninit +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_gpiote_out_init nrfx_gpiote_out_init +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_gpiote_out_uninit nrfx_gpiote_out_uninit +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_gpiote_out_set nrfx_gpiote_out_set +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_gpiote_out_clear nrfx_gpiote_out_clear +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_gpiote_out_toggle nrfx_gpiote_out_toggle +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_gpiote_out_task_enable nrfx_gpiote_out_task_enable +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_gpiote_out_task_disable nrfx_gpiote_out_task_disable +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_gpiote_out_task_addr_get nrfx_gpiote_out_task_addr_get +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_gpiote_in_init nrfx_gpiote_in_init +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_gpiote_in_uninit nrfx_gpiote_in_uninit +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_gpiote_in_event_enable nrfx_gpiote_in_event_enable +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_gpiote_in_event_disable nrfx_gpiote_in_event_disable +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_gpiote_in_is_set nrfx_gpiote_in_is_set +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_gpiote_in_event_addr_get nrfx_gpiote_in_event_addr_get +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_gpiote_set_task_addr_get nrfx_gpiote_set_task_addr_get +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_gpiote_clr_task_addr_get nrfx_gpiote_clr_task_addr_get +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_gpiote_out_task_force nrfx_gpiote_out_task_force +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_gpiote_out_task_trigger nrfx_gpiote_out_task_trigger +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_gpiote_set_task_trigger nrfx_gpiote_set_task_trigger +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_gpiote_clr_task_trigger nrfx_gpiote_clr_task_trigger + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif //NRF_DRV_GPIOTE_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_pwm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_pwm.h new file mode 100644 index 00000000000..396afecb1c2 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_pwm.h @@ -0,0 +1,135 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_DRV_PWM_H__ +#define NRF_DRV_PWM_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_drv_pwm PWM driver - legacy layer + * @{ + * @ingroup nrf_pwm + * + * @brief @tagAPI52 Layer providing compatibility with the former API. + */ + +/** @brief Type definition for forwarding the new implementation. */ +typedef nrfx_pwm_t nrf_drv_pwm_t; +/** @brief Type definition for forwarding the new implementation. */ +typedef nrfx_pwm_config_t nrf_drv_pwm_config_t; + +/** @brief Macro for forwarding the new implementation. */ +#define NRF_DRV_PWM_INSTANCE NRFX_PWM_INSTANCE +/** @brief Macro for forwarding the new implementation. */ +#define NRF_DRV_PWM_PIN_NOT_USED NRFX_PWM_PIN_NOT_USED +/** @brief Macro for forwarding the new implementation. */ +#define NRF_DRV_PWM_PIN_INVERTED NRFX_PWM_PIN_INVERTED +/** @brief Macro for forwarding the new implementation. */ +#define NRF_DRV_PWM_DEFAULT_CONFIG NRFX_PWM_DEFAULT_CONFIG + +/** @brief Macro for forwarding the new implementation. */ +#define NRF_DRV_PWM_FLAG_STOP NRFX_PWM_FLAG_STOP +/** @brief Macro for forwarding the new implementation. */ +#define NRF_DRV_PWM_FLAG_LOOP NRFX_PWM_FLAG_LOOP +/** @brief Macro for forwarding the new implementation. */ +#define NRF_DRV_PWM_FLAG_SIGNAL_END_SEQ0 NRFX_PWM_FLAG_SIGNAL_END_SEQ0 +/** @brief Macro for forwarding the new implementation. */ +#define NRF_DRV_PWM_FLAG_SIGNAL_END_SEQ1 NRFX_PWM_FLAG_SIGNAL_END_SEQ1 +/** @brief Macro for forwarding the new implementation. */ +#define NRF_DRV_PWM_FLAG_NO_EVT_FINISHED NRFX_PWM_FLAG_NO_EVT_FINISHED +/** @brief Macro for forwarding the new implementation. */ +#define NRF_DRV_PWM_FLAG_START_VIA_TASK NRFX_PWM_FLAG_START_VIA_TASK +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_pwm_flag_t nrfx_pwm_flag_t +/** @brief Macro for forwarding the new implementation. */ +#define NRF_DRV_PWM_EVT_FINISHED NRFX_PWM_EVT_FINISHED +/** @brief Macro for forwarding the new implementation. */ +#define NRF_DRV_PWM_EVT_END_SEQ0 NRFX_PWM_EVT_END_SEQ0 +/** @brief Macro for forwarding the new implementation. */ +#define NRF_DRV_PWM_EVT_END_SEQ1 NRFX_PWM_EVT_END_SEQ1 +/** @brief Macro for forwarding the new implementation. */ +#define NRF_DRV_PWM_EVT_STOPPED NRFX_PWM_EVT_STOPPED +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_pwm_evt_type_t nrfx_pwm_evt_type_t +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_pwm_handler_t nrfx_pwm_handler_t + +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_pwm_init nrfx_pwm_init +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_pwm_uninit nrfx_pwm_uninit +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_pwm_simple_playback nrfx_pwm_simple_playback +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_pwm_complex_playback nrfx_pwm_complex_playback +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_pwm_step nrfx_pwm_step +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_pwm_stop nrfx_pwm_stop +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_pwm_is_stopped nrfx_pwm_is_stopped +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_pwm_sequence_update nrfx_pwm_sequence_update +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_pwm_sequence_values_update nrfx_pwm_sequence_values_update +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_pwm_sequence_length_update nrfx_pwm_sequence_length_update +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_pwm_sequence_repeats_update nrfx_pwm_sequence_repeats_update +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_pwm_sequence_end_delay_update nrfx_pwm_sequence_end_delay_update + +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_pwm_task_address_get nrfx_pwm_task_address_get +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_pwm_event_address_get nrfx_pwm_event_address_get + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_DRV_PWM_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_saadc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_saadc.h new file mode 100644 index 00000000000..8c25b063e86 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_saadc.h @@ -0,0 +1,143 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_DRV_SAADC_H__ +#define NRF_DRV_SAADC_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_drv_saadc SAADC driver - legacy layer + * @{ + * @ingroup nrf_saadc + * + * @brief @tagAPI52 Layer providing compatibility with the former API. + */ + +/** @brief Type definition for forwarding the new implementation. */ +typedef nrfx_saadc_config_t nrf_drv_saadc_config_t; + +/** @brief Macro for forwarding the new implementation. */ +#define NRF_DRV_SAADC_EVT_DONE NRFX_SAADC_EVT_DONE +/** @brief Macro for forwarding the new implementation. */ +#define NRF_DRV_SAADC_EVT_LIMIT NRFX_SAADC_EVT_LIMIT +/** @brief Macro for forwarding the new implementation. */ +#define NRF_DRV_SAADC_EVT_CALIBRATEDONE NRFX_SAADC_EVT_CALIBRATEDONE +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_saadc_evt_type_t nrfx_saadc_evt_type_t +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_saadc_done_evt_t nrfx_saadc_done_evt_t +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_saadc_limit_evt_t nrfx_saadc_limit_evt_t +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_saadc_evt_t nrfx_saadc_evt_t +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_saadc_event_handler_t nrfx_saadc_event_handler_t + +/** @brief Macro for forwarding the new implementation. */ +#define NRF_DRV_SAADC_LIMITH_DISABLED NRFX_SAADC_LIMITH_DISABLED +/** @brief Macro for forwarding the new implementation. */ +#define NRF_DRV_SAADC_LIMITL_DISABLED NRFX_SAADC_LIMITL_DISABLED +/** @brief Macro for forwarding the new implementation. */ +#define NRF_DRV_SAADC_DEFAULT_CONFIG NRFX_SAADC_DEFAULT_CONFIG +/** @brief Macro for forwarding the new implementation. */ +#define NRF_DRV_SAADC_DEFAULT_CHANNEL_CONFIG_SE \ + NRFX_SAADC_DEFAULT_CHANNEL_CONFIG_SE +/** @brief Macro for forwarding the new implementation. */ +#define NRF_DRV_SAADC_DEFAULT_CHANNEL_CONFIG_DIFFERENTIAL \ + NRFX_SAADC_DEFAULT_CHANNEL_CONFIG_DIFFERENTIAL + +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_saadc_uninit nrfx_saadc_uninit +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_saadc_channel_init nrfx_saadc_channel_init +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_saadc_channel_uninit nrfx_saadc_channel_uninit +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_saadc_sample nrfx_saadc_sample +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_saadc_sample_convert nrfx_saadc_sample_convert +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_saadc_buffer_convert nrfx_saadc_buffer_convert +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_saadc_calibrate_offset nrfx_saadc_calibrate_offset +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_saadc_is_busy nrfx_saadc_is_busy +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_saadc_abort nrfx_saadc_abort +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_saadc_limits_set nrfx_saadc_limits_set + +/** @brief Macro for forwarding the new implementation. */ +#define nrf_drv_saadc_sample_task_get nrfx_saadc_sample_task_get + +/** + * @brief Function for initializing the SAADC. + * + * @param[in] p_config Pointer to the structure with initial configuration. + * If NULL, the default one is used. + * @param[in] event_handler Event handler provided by the user. + * + * @retval NRF_SUCCESS If initialization was successful. + * @retval NRF_ERROR_INVALID_STATE If the driver is already initialized. + * @retval NRF_ERROR_INVALID_PARAM If event_handler is NULL. + */ +__STATIC_INLINE ret_code_t nrf_drv_saadc_init(nrf_drv_saadc_config_t const * p_config, + nrf_drv_saadc_event_handler_t event_handler) +{ + if (p_config == NULL) + { + static const nrfx_saadc_config_t default_config = NRFX_SAADC_DEFAULT_CONFIG; + p_config = &default_config; + } + return nrfx_saadc_init(p_config, event_handler); +} + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_DRV_SAADC_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_spi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_spi.h new file mode 100644 index 00000000000..dd746117a83 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_spi.h @@ -0,0 +1,644 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_DRV_SPI_H__ +#define NRF_DRV_SPI_H__ + +#include + +// Needed for Mbed +#ifdef SPI0_ENABLED +#define SPI0_INCR SPI0_ENABLED +#else +#define SPI0_INCR 0 +#endif + +#ifdef SPI1_ENABLED +#define SPI1_INCR SPI1_ENABLED +#else +#define SPI1_INCR 0 +#endif + +#ifdef SPI2_ENABLED +#define SPI2_INCR SPI2_ENABLED +#else +#define SPI2_INCR 0 +#endif + +#ifdef SPI3_ENABLED +#define SPI3_INCR SPI3_ENABLED +#else +#define SPI3_INCR 0 +#endif + +#define ENABLED_SPI_COUNT (SPI0_INCR + SPI1_INCR + SPI2_INCR + SPI3_INCR) + +#ifdef SPIM_PRESENT + #include +#else + // Compilers (at least the smart ones) will remove the SPIM related code + // (blocks starting with "if (NRF_DRV_SPI_USE_SPIM)") when it is not used, + // but to perform the compilation they need the following definitions. + #define nrfx_spim_init(...) 0 + #define nrfx_spim_uninit(...) + #define nrfx_spim_start_task_get(...) 0 + #define nrfx_spim_end_event_get(...) 0 + #define nrfx_spim_abort(...) +#endif + +#ifdef SPI_PRESENT + #include +#else + // Compilers (at least the smart ones) will remove the SPI related code + // (blocks starting with "if (NRF_DRV_SPI_USE_SPI)") when it is not used, + // but to perform the compilation they need the following definitions. + #define nrfx_spi_init(...) 0 + #define nrfx_spi_uninit(...) + #define nrfx_spi_start_task_get(...) 0 + #define nrfx_spi_end_event_get(...) 0 + #define nrfx_spi_abort(...) + + // This part is for old modules that use directly SPI HAL definitions + // (to make them compilable for chips that have only SPIM). + #define NRF_SPI_FREQ_125K NRF_SPIM_FREQ_125K + #define NRF_SPI_FREQ_250K NRF_SPIM_FREQ_250K + #define NRF_SPI_FREQ_500K NRF_SPIM_FREQ_500K + #define NRF_SPI_FREQ_1M NRF_SPIM_FREQ_1M + #define NRF_SPI_FREQ_2M NRF_SPIM_FREQ_2M + #define NRF_SPI_FREQ_4M NRF_SPIM_FREQ_4M + #define NRF_SPI_FREQ_8M NRF_SPIM_FREQ_8M + #define NRF_SPI_MODE_0 NRF_SPIM_MODE_0 + #define NRF_SPI_MODE_1 NRF_SPIM_MODE_1 + #define NRF_SPI_MODE_2 NRF_SPIM_MODE_2 + #define NRF_SPI_MODE_3 NRF_SPIM_MODE_3 + #define NRF_SPI_BIT_ORDER_MSB_FIRST NRF_SPIM_BIT_ORDER_MSB_FIRST + #define NRF_SPI_BIT_ORDER_LSB_FIRST NRF_SPIM_BIT_ORDER_LSB_FIRST +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_drv_spi SPI master driver + * @{ + * @ingroup nrf_spi + * @brief Layer providing compatibility with the former API. + */ + +/** + * @brief SPI master driver instance data structure. + */ +typedef struct +{ + uint8_t inst_idx; + union + { +#ifdef SPIM_PRESENT + nrfx_spim_t spim; +#endif +#ifdef SPI_PRESENT + nrfx_spi_t spi; +#endif + } u; + bool use_easy_dma; +} nrf_drv_spi_t; + +/** + * @brief Macro for creating an SPI master driver instance. + */ +#define NRF_DRV_SPI_INSTANCE(id) NRF_DRV_SPI_INSTANCE_(id) +#define NRF_DRV_SPI_INSTANCE_(id) NRF_DRV_SPI_INSTANCE_ ## id + +#if NRFX_CHECK(NRFX_SPIM0_ENABLED) + #define NRF_DRV_SPI_INSTANCE_0 \ + { 0, { .spim = NRFX_SPIM_INSTANCE(0) }, true } +#elif NRFX_CHECK(NRFX_SPI0_ENABLED) + #define NRF_DRV_SPI_INSTANCE_0 \ + { 0, { .spi = NRFX_SPI_INSTANCE(0) }, false } +#endif +#if NRFX_CHECK(NRFX_SPIM1_ENABLED) + #define NRF_DRV_SPI_INSTANCE_1 \ + { 1, { .spim = NRFX_SPIM_INSTANCE(1) }, true } +#elif NRFX_CHECK(NRFX_SPI1_ENABLED) + #define NRF_DRV_SPI_INSTANCE_1 \ + { 1, { .spi = NRFX_SPI_INSTANCE(1) }, false } +#endif +#if NRFX_CHECK(NRFX_SPIM2_ENABLED) + #define NRF_DRV_SPI_INSTANCE_2 \ + { 2, { .spim = NRFX_SPIM_INSTANCE(2) }, true } +#elif NRFX_CHECK(NRFX_SPI2_ENABLED) + #define NRF_DRV_SPI_INSTANCE_2 \ + { 2, { .spi = NRFX_SPI_INSTANCE(2) }, false } +#endif + +/** + * @brief This value can be provided instead of a pin number for signals MOSI, + * MISO, and Slave Select to specify that the given signal is not used and + * therefore does not need to be connected to a pin. + */ +#define NRF_DRV_SPI_PIN_NOT_USED 0xFF + +/** + * @brief SPI data rates. + */ +typedef enum +{ + NRF_DRV_SPI_FREQ_125K = NRF_SPI_FREQ_125K, ///< 125 kbps. + NRF_DRV_SPI_FREQ_250K = NRF_SPI_FREQ_250K, ///< 250 kbps. + NRF_DRV_SPI_FREQ_500K = NRF_SPI_FREQ_500K, ///< 500 kbps. + NRF_DRV_SPI_FREQ_1M = NRF_SPI_FREQ_1M, ///< 1 Mbps. + NRF_DRV_SPI_FREQ_2M = NRF_SPI_FREQ_2M, ///< 2 Mbps. + NRF_DRV_SPI_FREQ_4M = NRF_SPI_FREQ_4M, ///< 4 Mbps. + NRF_DRV_SPI_FREQ_8M = NRF_SPI_FREQ_8M ///< 8 Mbps. +} nrf_drv_spi_frequency_t; + +/** + * @brief SPI modes. + */ +typedef enum +{ + NRF_DRV_SPI_MODE_0 = NRF_SPI_MODE_0, ///< SCK active high, sample on leading edge of clock. + NRF_DRV_SPI_MODE_1 = NRF_SPI_MODE_1, ///< SCK active high, sample on trailing edge of clock. + NRF_DRV_SPI_MODE_2 = NRF_SPI_MODE_2, ///< SCK active low, sample on leading edge of clock. + NRF_DRV_SPI_MODE_3 = NRF_SPI_MODE_3 ///< SCK active low, sample on trailing edge of clock. +} nrf_drv_spi_mode_t; + +/** + * @brief SPI bit orders. + */ +typedef enum +{ + NRF_DRV_SPI_BIT_ORDER_MSB_FIRST = NRF_SPI_BIT_ORDER_MSB_FIRST, ///< Most significant bit shifted out first. + NRF_DRV_SPI_BIT_ORDER_LSB_FIRST = NRF_SPI_BIT_ORDER_LSB_FIRST ///< Least significant bit shifted out first. +} nrf_drv_spi_bit_order_t; + +/** + * @brief SPI master driver instance configuration structure. + */ +typedef struct +{ + uint8_t sck_pin; ///< SCK pin number. + uint8_t mosi_pin; ///< MOSI pin number (optional). + /**< Set to @ref NRF_DRV_SPI_PIN_NOT_USED + * if this signal is not needed. */ + uint8_t miso_pin; ///< MISO pin number (optional). + /**< Set to @ref NRF_DRV_SPI_PIN_NOT_USED + * if this signal is not needed. */ + uint8_t ss_pin; ///< Slave Select pin number (optional). + /**< Set to @ref NRF_DRV_SPI_PIN_NOT_USED + * if this signal is not needed. The driver + * supports only active low for this signal. + * If the signal should be active high, + * it must be controlled externally. */ + uint8_t irq_priority; ///< Interrupt priority. + uint8_t orc; ///< Over-run character. + /**< This character is used when all bytes from the TX buffer are sent, + but the transfer continues due to RX. */ + nrf_drv_spi_frequency_t frequency; ///< SPI frequency. + nrf_drv_spi_mode_t mode; ///< SPI mode. + nrf_drv_spi_bit_order_t bit_order; ///< SPI bit order. +} nrf_drv_spi_config_t; + +/** + * @brief SPI master instance default configuration. + */ +#define NRF_DRV_SPI_DEFAULT_CONFIG \ +{ \ + .sck_pin = NRF_DRV_SPI_PIN_NOT_USED, \ + .mosi_pin = NRF_DRV_SPI_PIN_NOT_USED, \ + .miso_pin = NRF_DRV_SPI_PIN_NOT_USED, \ + .ss_pin = NRF_DRV_SPI_PIN_NOT_USED, \ + .irq_priority = SPI_DEFAULT_CONFIG_IRQ_PRIORITY, \ + .orc = 0xFF, \ + .frequency = NRF_DRV_SPI_FREQ_4M, \ + .mode = NRF_DRV_SPI_MODE_0, \ + .bit_order = NRF_DRV_SPI_BIT_ORDER_MSB_FIRST, \ +} + +#define NRF_DRV_SPI_FLAG_TX_POSTINC (1UL << 0) /**< TX buffer address incremented after transfer. */ +#define NRF_DRV_SPI_FLAG_RX_POSTINC (1UL << 1) /**< RX buffer address incremented after transfer. */ +#define NRF_DRV_SPI_FLAG_NO_XFER_EVT_HANDLER (1UL << 2) /**< Interrupt after each transfer is suppressed, and the event handler is not called. */ +#define NRF_DRV_SPI_FLAG_HOLD_XFER (1UL << 3) /**< Set up the transfer but do not start it. */ +#define NRF_DRV_SPI_FLAG_REPEATED_XFER (1UL << 4) /**< Flag indicating that the transfer will be executed multiple times. */ + +/** + * @brief Single transfer descriptor structure. + */ +typedef struct +{ + uint8_t const * p_tx_buffer; ///< Pointer to TX buffer. + uint8_t tx_length; ///< TX buffer length. + uint8_t * p_rx_buffer; ///< Pointer to RX buffer. + uint8_t rx_length; ///< RX buffer length. +}nrf_drv_spi_xfer_desc_t; + +/** + * @brief Macro for setting up single transfer descriptor. + * + * This macro is for internal use only. + */ +#define NRF_DRV_SPI_SINGLE_XFER(p_tx, tx_len, p_rx, rx_len) \ + { \ + .p_tx_buffer = (uint8_t const *)(p_tx), \ + .tx_length = (tx_len), \ + .p_rx_buffer = (p_rx), \ + .rx_length = (rx_len), \ + } + +/** + * @brief Macro for setting duplex TX RX transfer. + */ +#define NRF_DRV_SPI_XFER_TRX(p_tx_buf, tx_length, p_rx_buf, rx_length) \ + NRF_DRV_SPI_SINGLE_XFER(p_tx_buf, tx_length, p_rx_buf, rx_length) + +/** + * @brief Macro for setting TX transfer. + */ +#define NRF_DRV_SPI_XFER_TX(p_buf, length) \ + NRF_DRV_SPI_SINGLE_XFER(p_buf, length, NULL, 0) + +/** + * @brief Macro for setting RX transfer. + */ +#define NRF_DRV_SPI_XFER_RX(p_buf, length) \ + NRF_DRV_SPI_SINGLE_XFER(NULL, 0, p_buf, length) + +/** + * @brief SPI master driver event types, passed to the handler routine provided + * during initialization. + */ +typedef enum +{ + NRF_DRV_SPI_EVENT_DONE, ///< Transfer done. +} nrf_drv_spi_evt_type_t; + +typedef struct +{ + nrf_drv_spi_evt_type_t type; ///< Event type. + union + { + nrf_drv_spi_xfer_desc_t done; ///< Event data for DONE event. + } data; +} nrf_drv_spi_evt_t; + +/** + * @brief SPI master driver event handler type. + */ +typedef void (* nrf_drv_spi_evt_handler_t)(nrf_drv_spi_evt_t const * p_event, + void * p_context); + + +/** + * @brief Function for initializing the SPI master driver instance. + * + * This function configures and enables the specified peripheral. + * + * @note MISO pin has pull down enabled. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_config Pointer to the structure with the initial configuration. + * + * @param handler Event handler provided by the user. If NULL, transfers + * will be performed in blocking mode. + * @param p_context Context passed to event handler. + * + * @retval NRF_SUCCESS If initialization was successful. + * @retval NRF_ERROR_INVALID_STATE If the driver was already initialized. + * @retval NRF_ERROR_BUSY If some other peripheral with the same + * instance ID is already in use. This is + * possible only if PERIPHERAL_RESOURCE_SHARING_ENABLED + * is set to a value other than zero. + */ +ret_code_t nrf_drv_spi_init(nrf_drv_spi_t const * const p_instance, + nrf_drv_spi_config_t const * p_config, + nrf_drv_spi_evt_handler_t handler, + void * p_context); + +/** + * @brief Function for uninitializing the SPI master driver instance. + * + * @note Configuration of pins is kept. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +__STATIC_INLINE +void nrf_drv_spi_uninit(nrf_drv_spi_t const * const p_instance); + +/** + * @brief Function for starting the SPI data transfer. + * + * If an event handler was provided in the @ref nrf_drv_spi_init call, this function + * returns immediately and the handler is called when the transfer is done. + * Otherwise, the transfer is performed in blocking mode, which means that this function + * returns when the transfer is finished. + * + * @note Peripherals using EasyDMA (for example, SPIM) require the transfer buffers + * to be placed in the Data RAM region. If they are not and an SPIM instance is + * used, this function will fail with the error code NRF_ERROR_INVALID_ADDR. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_tx_buffer Pointer to the transmit buffer. Can be NULL + * if there is nothing to send. + * @param tx_buffer_length Length of the transmit buffer. + * @param[in] p_rx_buffer Pointer to the receive buffer. Can be NULL + * if there is nothing to receive. + * @param rx_buffer_length Length of the receive buffer. + * + * @retval NRF_SUCCESS If the operation was successful. + * @retval NRF_ERROR_BUSY If a previously started transfer has not finished + * yet. + * @retval NRF_ERROR_INVALID_ADDR If the provided buffers are not placed in the Data + * RAM region. + */ +__STATIC_INLINE +ret_code_t nrf_drv_spi_transfer(nrf_drv_spi_t const * const p_instance, + uint8_t const * p_tx_buffer, + uint8_t tx_buffer_length, + uint8_t * p_rx_buffer, + uint8_t rx_buffer_length); + +/** + * @brief Function for starting the SPI data transfer with additional option flags. + * + * Function enables customizing the transfer by using option flags. + * + * Additional options are provided using the flags parameter: + * + * - @ref NRF_DRV_SPI_FLAG_TX_POSTINC and @ref NRF_DRV_SPI_FLAG_RX_POSTINC: + * Post-incrementation of buffer addresses. Supported only by SPIM. + * - @ref NRF_DRV_SPI_FLAG_HOLD_XFER: Driver is not starting the transfer. Use this + * flag if the transfer is triggered externally by PPI. Supported only by SPIM. Use + * @ref nrf_drv_spi_start_task_get to get the address of the start task. + * - @ref NRF_DRV_SPI_FLAG_NO_XFER_EVT_HANDLER: No user event handler after transfer + * completion. This also means no interrupt at the end of the transfer. Supported only by SPIM. + * If @ref NRF_DRV_SPI_FLAG_NO_XFER_EVT_HANDLER is used, the driver does not set the instance into + * busy state, so you must ensure that the next transfers are set up when SPIM is not active. + * @ref nrf_drv_spi_end_event_get function can be used to detect end of transfer. Option can be used + * together with @ref NRF_DRV_SPI_FLAG_REPEATED_XFER to prepare a sequence of SPI transfers + * without interruptions. + * - @ref NRF_DRV_SPI_FLAG_REPEATED_XFER: Prepare for repeated transfers. You can set + * up a number of transfers that will be triggered externally (for example by PPI). An example is + * a TXRX transfer with the options @ref NRF_DRV_SPI_FLAG_RX_POSTINC, + * @ref NRF_DRV_SPI_FLAG_NO_XFER_EVT_HANDLER, and @ref NRF_DRV_SPI_FLAG_REPEATED_XFER. After the + * transfer is set up, a set of transfers can be triggered by PPI that will read, for example, + * the same register of an external component and put it into a RAM buffer without any interrupts. + * @ref nrf_drv_spi_end_event_get can be used to get the address of the END event, which can be + * used to count the number of transfers. If @ref NRF_DRV_SPI_FLAG_REPEATED_XFER is used, + * the driver does not set the instance into busy state, so you must ensure that the next + * transfers are set up when SPIM is not active. Supported only by SPIM. + * @note Function is intended to be used only in non-blocking mode. + * + * @param p_instance Pointer to the driver instance structure. + * @param p_xfer_desc Pointer to the transfer descriptor. + * @param flags Transfer options (0 for default settings). + * + * @retval NRF_SUCCESS If the procedure was successful. + * @retval NRF_ERROR_BUSY If the driver is not ready for a new transfer. + * @retval NRF_ERROR_NOT_SUPPORTED If the provided parameters are not supported. + * @retval NRF_ERROR_INVALID_ADDR If the provided buffers are not placed in the Data + * RAM region. + */ +__STATIC_INLINE +ret_code_t nrf_drv_spi_xfer(nrf_drv_spi_t const * const p_instance, + nrf_drv_spi_xfer_desc_t const * p_xfer_desc, + uint32_t flags); + +/** + * @brief Function for returning the address of a SPIM start task. + * + * This function should be used if @ref nrf_drv_spi_xfer was called with the flag @ref NRF_DRV_SPI_FLAG_HOLD_XFER. + * In that case, the transfer is not started by the driver, but it must be started externally by PPI. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @return Start task address. + */ +__STATIC_INLINE +uint32_t nrf_drv_spi_start_task_get(nrf_drv_spi_t const * p_instance); + +/** + * @brief Function for returning the address of a END SPIM event. + * + * A END event can be used to detect the end of a transfer if the @ref NRF_DRV_SPI_FLAG_NO_XFER_EVT_HANDLER + * option is used. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @return END event address. + */ +__STATIC_INLINE +uint32_t nrf_drv_spi_end_event_get(nrf_drv_spi_t const * p_instance); + +/** + * @brief Function for aborting ongoing transfer. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +__STATIC_INLINE +void nrf_drv_spi_abort(nrf_drv_spi_t const * p_instance); + + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +#if defined(SPI_PRESENT) && !defined(SPIM_PRESENT) +#define NRF_DRV_SPI_WITH_SPI +#elif !defined(SPI_PRESENT) && defined(SPIM_PRESENT) +#define NRF_DRV_SPI_WITH_SPIM +#else +#if (NRFX_CHECK(SPI0_ENABLED) && NRFX_CHECK(SPI0_USE_EASY_DMA)) || \ + (NRFX_CHECK(SPI1_ENABLED) && NRFX_CHECK(SPI1_USE_EASY_DMA)) || \ + (NRFX_CHECK(SPI2_ENABLED) && NRFX_CHECK(SPI2_USE_EASY_DMA)) + #define NRF_DRV_SPI_WITH_SPIM +#endif +#if (NRFX_CHECK(SPI0_ENABLED) && !NRFX_CHECK(SPI0_USE_EASY_DMA)) || \ + (NRFX_CHECK(SPI1_ENABLED) && !NRFX_CHECK(SPI1_USE_EASY_DMA)) || \ + (NRFX_CHECK(SPI2_ENABLED) && !NRFX_CHECK(SPI2_USE_EASY_DMA)) + #define NRF_DRV_SPI_WITH_SPI +#endif +#endif +#if defined(NRF_DRV_SPI_WITH_SPIM) && defined(NRF_DRV_SPI_WITH_SPI) + #define NRF_DRV_SPI_USE_SPIM (p_instance->use_easy_dma) +#elif defined(NRF_DRV_SPI_WITH_SPIM) + #define NRF_DRV_SPI_USE_SPIM true +#else + #define NRF_DRV_SPI_USE_SPIM false +#endif +#define NRF_DRV_SPI_USE_SPI (!NRF_DRV_SPI_USE_SPIM) + +__STATIC_INLINE +void nrf_drv_spi_uninit(nrf_drv_spi_t const * p_instance) +{ + if (NRF_DRV_SPI_USE_SPIM) + { + nrfx_spim_uninit(&p_instance->u.spim); + } + else if (NRF_DRV_SPI_USE_SPI) + { + nrfx_spi_uninit(&p_instance->u.spi); + } +} + +__STATIC_INLINE +ret_code_t nrf_drv_spi_transfer(nrf_drv_spi_t const * const p_instance, + uint8_t const * p_tx_buffer, + uint8_t tx_buffer_length, + uint8_t * p_rx_buffer, + uint8_t rx_buffer_length) +{ + ret_code_t result = 0; + if (NRF_DRV_SPI_USE_SPIM) + { + #ifdef SPIM_PRESENT + nrfx_spim_xfer_desc_t const spim_xfer_desc = + { + .p_tx_buffer = p_tx_buffer, + .tx_length = tx_buffer_length, + .p_rx_buffer = p_rx_buffer, + .rx_length = rx_buffer_length, + }; + result = nrfx_spim_xfer(&p_instance->u.spim, &spim_xfer_desc, 0); + #endif + } + else if (NRF_DRV_SPI_USE_SPI) + { + #ifdef SPI_PRESENT + nrfx_spi_xfer_desc_t const spi_xfer_desc = + { + .p_tx_buffer = p_tx_buffer, + .tx_length = tx_buffer_length, + .p_rx_buffer = p_rx_buffer, + .rx_length = rx_buffer_length, + }; + result = nrfx_spi_xfer(&p_instance->u.spi, &spi_xfer_desc, 0); + #endif + } + return result; +} + +__STATIC_INLINE +ret_code_t nrf_drv_spi_xfer(nrf_drv_spi_t const * const p_instance, + nrf_drv_spi_xfer_desc_t const * p_xfer_desc, + uint32_t flags) +{ + ret_code_t result = 0; + if (NRF_DRV_SPI_USE_SPIM) + { + #ifdef SPIM_PRESENT + nrfx_spim_xfer_desc_t const spim_xfer_desc = + { + .p_tx_buffer = p_xfer_desc->p_tx_buffer, + .tx_length = p_xfer_desc->tx_length, + .p_rx_buffer = p_xfer_desc->p_rx_buffer, + .rx_length = p_xfer_desc->rx_length, + }; + result = nrfx_spim_xfer(&p_instance->u.spim, &spim_xfer_desc, flags); + #endif + } + else if (NRF_DRV_SPI_USE_SPI) + { + #ifdef SPI_PRESENT + nrfx_spi_xfer_desc_t const spi_xfer_desc = + { + .p_tx_buffer = p_xfer_desc->p_tx_buffer, + .tx_length = p_xfer_desc->tx_length, + .p_rx_buffer = p_xfer_desc->p_rx_buffer, + .rx_length = p_xfer_desc->rx_length, + }; + result = nrfx_spi_xfer(&p_instance->u.spi, &spi_xfer_desc, flags); + #endif + } + return result; +} + +__STATIC_INLINE +uint32_t nrf_drv_spi_start_task_get(nrf_drv_spi_t const * p_instance) +{ + uint32_t result = 0; + if (NRF_DRV_SPI_USE_SPIM) + { + result = nrfx_spim_start_task_get(&p_instance->u.spim); + } + else if (NRF_DRV_SPI_USE_SPI) + { + NRFX_ASSERT(false); // not supported + result = 0; + } + return result; +} + +__STATIC_INLINE +uint32_t nrf_drv_spi_end_event_get(nrf_drv_spi_t const * p_instance) +{ + uint32_t result = 0; + if (NRF_DRV_SPI_USE_SPIM) + { + result = nrfx_spim_end_event_get(&p_instance->u.spim); + } + else if (NRF_DRV_SPI_USE_SPI) + { + NRFX_ASSERT(false); // not supported + result = 0; + } + return result; +} + +__STATIC_INLINE +void nrf_drv_spi_abort(nrf_drv_spi_t const * p_instance) +{ + if (NRF_DRV_SPI_USE_SPIM) + { + nrfx_spim_abort(&p_instance->u.spim); + } + else if (NRF_DRV_SPI_USE_SPI) + { + nrfx_spi_abort(&p_instance->u.spi); + } +} + +#endif // SUPPRESS_INLINE_IMPLEMENTATION + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_DRV_SPI_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_twi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_twi.h new file mode 100644 index 00000000000..a876a9c8121 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_twi.h @@ -0,0 +1,708 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_DRV_TWI_H__ +#define NRF_DRV_TWI_H__ + +#include + +// needed for Mbed +#ifdef TWI0_ENABLED +#define TWI0_INCR TWI0_ENABLED +#else +#define TWI0_INCR 0 +#endif + +#ifdef TWI1_ENABLED +#define TWI1_INCR TWI1_ENABLED +#else +#define TWI1_INCR 0 +#endif + +#define ENABLED_TWI_COUNT (TWI0_INCR + TWI1_INCR) +// end needed for Mbed + +#ifdef TWIM_PRESENT + #include +#else + // Compilers (at least the smart ones) will remove the TWIM related code + // (blocks starting with "if (NRF_DRV_TWI_USE_TWIM)") when it is not used, + // but to perform the compilation they need the following definitions. + #define nrfx_twim_init(...) 0 + #define nrfx_twim_uninit(...) + #define nrfx_twim_enable(...) + #define nrfx_twim_disable(...) + #define nrfx_twim_tx(...) 0 + #define nrfx_twim_rx(...) 0 + #define nrfx_twim_is_busy(...) 0 + #define nrfx_twim_start_task_get(...) 0 + #define nrfx_twim_stopped_event_get(...) 0 +#endif + +#ifdef TWI_PRESENT + #include +#else + // Compilers (at least the smart ones) will remove the TWI related code + // (blocks starting with "if (NRF_DRV_TWI_USE_TWI)") when it is not used, + // but to perform the compilation they need the following definitions. + #define nrfx_twi_init(...) 0 + #define nrfx_twi_uninit(...) + #define nrfx_twi_enable(...) + #define nrfx_twi_disable(...) + #define nrfx_twi_tx(...) 0 + #define nrfx_twi_rx(...) 0 + #define nrfx_twi_is_busy(...) 0 + #define nrfx_twi_data_count_get(...) 0 + #define nrfx_twi_stopped_event_get(...) 0 + + // This part is for old modules that use directly TWI HAL definitions + // (to make them compilable for chips that have only TWIM). + #define NRF_TWI_ERROR_ADDRESS_NACK NRF_TWIM_ERROR_ADDRESS_NACK + #define NRF_TWI_ERROR_DATA_NACK NRF_TWIM_ERROR_DATA_NACK + #define NRF_TWI_FREQ_100K NRF_TWIM_FREQ_100K + #define NRF_TWI_FREQ_250K NRF_TWIM_FREQ_250K + #define NRF_TWI_FREQ_400K NRF_TWIM_FREQ_400K +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_drv_twi TWI driver - legacy layer + * @{ + * @ingroup nrf_twi + * @brief Layer providing compatibility with the former API. + */ + +/** + * @brief Structure for the TWI master driver instance. + */ +typedef struct +{ + uint8_t inst_idx; + union + { +#ifdef TWIM_PRESENT + nrfx_twim_t twim; +#endif +#ifdef TWI_PRESENT + nrfx_twi_t twi; +#endif + } u; + bool use_easy_dma; +} nrf_drv_twi_t; + + +/** + * @brief Macro for creating a TWI master driver instance. + */ +// Mbed - need these +#define NRF_TWIM0_ENABLED 1 +#define NRF_TWIM1_ENABLED 1 + +#define NRF_DRV_TWI_INSTANCE(id) NRF_DRV_TWI_INSTANCE_(id) +#define NRF_DRV_TWI_INSTANCE_(id) NRF_DRV_TWI_INSTANCE_ ## id +#if NRFX_CHECK(NRFX_TWIM0_ENABLED) + #define NRF_DRV_TWI_INSTANCE_0 \ + { 0, { .twim = NRFX_TWIM_INSTANCE(0) }, true } +#elif NRFX_CHECK(NRFX_TWI0_ENABLED) + #define NRF_DRV_TWI_INSTANCE_0 \ + { 0, { .twi = NRFX_TWI_INSTANCE(0) }, false } +#endif +#if NRFX_CHECK(NRFX_TWIM1_ENABLED) + #define NRF_DRV_TWI_INSTANCE_1 \ + { 1, { .twim = NRFX_TWIM_INSTANCE(1) }, true } +#elif NRFX_CHECK(NRFX_TWI1_ENABLED) + #define NRF_DRV_TWI_INSTANCE_1 \ + { 1, { .twi = NRFX_TWI_INSTANCE(1) }, false } +#endif + +/** + * @brief TWI master clock frequency. + */ +typedef enum +{ + NRF_DRV_TWI_FREQ_100K = NRF_TWI_FREQ_100K , ///< 100 kbps. + NRF_DRV_TWI_FREQ_250K = NRF_TWI_FREQ_250K , ///< 250 kbps. + NRF_DRV_TWI_FREQ_400K = NRF_TWI_FREQ_400K ///< 400 kbps. +} nrf_drv_twi_frequency_t; + +/** + * @brief Structure for the TWI master driver instance configuration. + */ +typedef struct +{ + uint32_t scl; ///< SCL pin number. + uint32_t sda; ///< SDA pin number. + nrf_drv_twi_frequency_t frequency; ///< TWI frequency. + uint8_t interrupt_priority; ///< Interrupt priority. + bool clear_bus_init; ///< Clear bus during init. + bool hold_bus_uninit; ///< Hold pull up state on gpio pins after uninit. +} nrf_drv_twi_config_t; + +/** + * @brief TWI master driver instance default configuration. + */ +#define NRF_DRV_TWI_DEFAULT_CONFIG \ +{ \ + .frequency = (nrf_drv_twi_frequency_t)TWI_DEFAULT_CONFIG_FREQUENCY, \ + .scl = 31, \ + .sda = 31, \ + .interrupt_priority = TWI_DEFAULT_CONFIG_IRQ_PRIORITY, \ + .clear_bus_init = TWI_DEFAULT_CONFIG_CLR_BUS_INIT, \ + .hold_bus_uninit = TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT, \ +} + +#define NRF_DRV_TWI_FLAG_TX_POSTINC (1UL << 0) /**< TX buffer address incremented after transfer. */ +#define NRF_DRV_TWI_FLAG_RX_POSTINC (1UL << 1) /**< RX buffer address incremented after transfer. */ +#define NRF_DRV_TWI_FLAG_NO_XFER_EVT_HANDLER (1UL << 2) /**< Interrupt after each transfer is suppressed, and the event handler is not called. */ +#define NRF_DRV_TWI_FLAG_HOLD_XFER (1UL << 3) /**< Set up the transfer but do not start it. */ +#define NRF_DRV_TWI_FLAG_REPEATED_XFER (1UL << 4) /**< Flag indicating that the transfer will be executed multiple times. */ +#define NRF_DRV_TWI_FLAG_TX_NO_STOP (1UL << 5) /**< Flag indicating that the TX transfer will not end with a stop condition. */ + +/** + * @brief TWI master driver event types. + */ +typedef enum +{ + NRF_DRV_TWI_EVT_DONE, ///< Transfer completed event. + NRF_DRV_TWI_EVT_ADDRESS_NACK, ///< Error event: NACK received after sending the address. + NRF_DRV_TWI_EVT_DATA_NACK ///< Error event: NACK received after sending a data byte. +} nrf_drv_twi_evt_type_t; + +/** + * @brief TWI master driver transfer types. + */ +typedef enum +{ + NRF_DRV_TWI_XFER_TX, ///< TX transfer. + NRF_DRV_TWI_XFER_RX, ///< RX transfer. + NRF_DRV_TWI_XFER_TXRX, ///< TX transfer followed by RX transfer with repeated start. + NRF_DRV_TWI_XFER_TXTX ///< TX transfer followed by TX transfer with repeated start. +} nrf_drv_twi_xfer_type_t; + +/** + * @brief Structure for a TWI transfer descriptor. + */ +typedef struct +{ + nrf_drv_twi_xfer_type_t type; ///< Type of transfer. + uint8_t address; ///< Slave address. + uint8_t primary_length; ///< Number of bytes transferred. + uint8_t secondary_length; ///< Number of bytes transferred. + uint8_t * p_primary_buf; ///< Pointer to transferred data. + uint8_t * p_secondary_buf; ///< Pointer to transferred data. +} nrf_drv_twi_xfer_desc_t; + + +/**@brief Macro for setting the TX transfer descriptor. */ +#define NRF_DRV_TWI_XFER_DESC_TX(addr, p_data, length) \ + { \ + .type = NRF_DRV_TWI_XFER_TX, \ + .address = addr, \ + .primary_length = length, \ + .p_primary_buf = p_data, \ + } + +/**@brief Macro for setting the RX transfer descriptor. */ +#define NRF_DRV_TWI_XFER_DESC_RX(addr, p_data, length) \ + { \ + .type = NRF_DRV_TWI_XFER_RX, \ + .address = addr, \ + .primary_length = length, \ + .p_primary_buf = p_data, \ + } + +/**@brief Macro for setting the TXRX transfer descriptor. */ +#define NRF_DRV_TWI_XFER_DESC_TXRX(addr, p_tx, tx_len, p_rx, rx_len) \ + { \ + .type = NRF_DRV_TWI_XFER_TXRX, \ + .address = addr, \ + .primary_length = tx_len, \ + .secondary_length = rx_len, \ + .p_primary_buf = p_tx, \ + .p_secondary_buf = p_rx, \ + } + +/**@brief Macro for setting the TXTX transfer descriptor. */ +#define NRF_DRV_TWI_XFER_DESC_TXTX(addr, p_tx, tx_len, p_tx2, tx_len2) \ + { \ + .type = NRF_DRV_TWI_XFER_TXTX, \ + .address = addr, \ + .primary_length = tx_len, \ + .secondary_length = tx_len2, \ + .p_primary_buf = p_tx, \ + .p_secondary_buf = p_tx2, \ + } + +/** + * @brief Structure for a TWI event. + */ +typedef struct +{ + nrf_drv_twi_evt_type_t type; ///< Event type. + nrf_drv_twi_xfer_desc_t xfer_desc; ///< Transfer details. +} nrf_drv_twi_evt_t; + +/** + * @brief TWI event handler prototype. + */ +typedef void (* nrf_drv_twi_evt_handler_t)(nrf_drv_twi_evt_t const * p_event, + void * p_context); + +/** + * @brief Function for initializing the TWI driver instance. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_config Initial configuration. + * @param[in] event_handler Event handler provided by the user. If NULL, blocking mode is enabled. + * @param[in] p_context Context passed to event handler. + * + * @retval NRF_SUCCESS If initialization was successful. + * @retval NRF_ERROR_INVALID_STATE If the driver is in invalid state. + * @retval NRF_ERROR_BUSY If some other peripheral with the same + * instance ID is already in use. This is + * possible only if PERIPHERAL_RESOURCE_SHARING_ENABLED + * is set to a value other than zero. + */ +ret_code_t nrf_drv_twi_init(nrf_drv_twi_t const * p_instance, + nrf_drv_twi_config_t const * p_config, + nrf_drv_twi_evt_handler_t event_handler, + void * p_context); + +/** + * @brief Function for uninitializing the TWI instance. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +__STATIC_INLINE +void nrf_drv_twi_uninit(nrf_drv_twi_t const * p_instance); + +/** + * @brief Function for enabling the TWI instance. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +__STATIC_INLINE +void nrf_drv_twi_enable(nrf_drv_twi_t const * p_instance); + +/** + * @brief Function for disabling the TWI instance. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +__STATIC_INLINE +void nrf_drv_twi_disable(nrf_drv_twi_t const * p_instance); + +/** + * @brief Function for sending data to a TWI slave. + * + * The transmission will be stopped when an error occurs. If a transfer is ongoing, + * the function returns the error code @ref NRF_ERROR_BUSY. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] address Address of a specific slave device (only 7 LSB). + * @param[in] p_data Pointer to a transmit buffer. + * @param[in] length Number of bytes to send. + * @param[in] no_stop If set, the stop condition is not generated on the bus + * after the transfer has completed successfully (allowing + * for a repeated start in the next transfer). + * + * @retval NRF_SUCCESS If the procedure was successful. + * @retval NRF_ERROR_BUSY If the driver is not ready for a new transfer. + * @retval NRF_ERROR_INTERNAL If an error was detected by hardware. + * @retval NRF_ERROR_INVALID_ADDR If the EasyDMA is used and memory adress in not in RAM. + * @retval NRF_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address in polling mode. + * @retval NRF_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte in polling mode. + */ +__STATIC_INLINE +ret_code_t nrf_drv_twi_tx(nrf_drv_twi_t const * p_instance, + uint8_t address, + uint8_t const * p_data, + uint8_t length, + bool no_stop); + +/** + * @brief Function for reading data from a TWI slave. + * + * The transmission will be stopped when an error occurs. If a transfer is ongoing, + * the function returns the error code @ref NRF_ERROR_BUSY. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] address Address of a specific slave device (only 7 LSB). + * @param[in] p_data Pointer to a receive buffer. + * @param[in] length Number of bytes to be received. + * + * @retval NRF_SUCCESS If the procedure was successful. + * @retval NRF_ERROR_BUSY If the driver is not ready for a new transfer. + * @retval NRF_ERROR_INTERNAL If an error was detected by hardware. + * @retval NRF_ERROR_DRV_TWI_ERR_OVERRUN If the unread data was replaced by new data + * @retval NRF_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address in polling mode. + * @retval NRF_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte in polling mode. + */ +__STATIC_INLINE +ret_code_t nrf_drv_twi_rx(nrf_drv_twi_t const * p_instance, + uint8_t address, + uint8_t * p_data, + uint8_t length); + +/** + * @brief Function for preparing a TWI transfer. + * + * The following transfer types can be configured (@ref nrf_drv_twi_xfer_desc_t::type): + * - @ref NRF_DRV_TWI_XFER_TXRX: Write operation followed by a read operation (without STOP condition in between). + * - @ref NRF_DRV_TWI_XFER_TXTX: Write operation followed by a write operation (without STOP condition in between). + * - @ref NRF_DRV_TWI_XFER_TX: Write operation (with or without STOP condition). + * - @ref NRF_DRV_TWI_XFER_RX: Read operation (with STOP condition). + * + * Additional options are provided using the flags parameter: + * - @ref NRF_DRV_TWI_FLAG_TX_POSTINC and @ref NRF_DRV_TWI_FLAG_RX_POSTINC: Post-incrementation of buffer addresses. Supported only by TWIM. + * - @ref NRF_DRV_TWI_FLAG_NO_XFER_EVT_HANDLER: No user event handler after transfer completion. In most cases, this also means no interrupt at the end of the transfer. + * - @ref NRF_DRV_TWI_FLAG_HOLD_XFER: Driver is not starting the transfer. Use this flag if the transfer is triggered externally by PPI. Supported only by TWIM. + * Use @ref nrf_drv_twi_start_task_get to get the address of the start task. + * - @ref NRF_DRV_TWI_FLAG_REPEATED_XFER: Prepare for repeated transfers. You can set up a number of transfers that will be triggered externally (for example by PPI). + * An example is a TXRX transfer with the options @ref NRF_DRV_TWI_FLAG_RX_POSTINC, @ref NRF_DRV_TWI_FLAG_NO_XFER_EVT_HANDLER, and @ref NRF_DRV_TWI_FLAG_REPEATED_XFER. + * After the transfer is set up, a set of transfers can be triggered by PPI that will read, for example, the same register of an + * external component and put it into a RAM buffer without any interrupts. @ref nrf_drv_twi_stopped_event_get can be used to get the + * address of the STOPPED event, which can be used to count the number of transfers. If @ref NRF_DRV_TWI_FLAG_REPEATED_XFER is used, + * the driver does not set the driver instance into busy state, so you must ensure that the next transfers are set up + * when TWIM is not active. Supported only by TWIM. + * - @ref NRF_DRV_TWI_FLAG_TX_NO_STOP: No stop condition after TX transfer. + * + * @note + * Some flag combinations are invalid: + * - @ref NRF_DRV_TWI_FLAG_TX_NO_STOP with @ref nrf_drv_twi_xfer_desc_t::type different than @ref NRF_DRV_TWI_XFER_TX + * - @ref NRF_DRV_TWI_FLAG_REPEATED_XFER with @ref nrf_drv_twi_xfer_desc_t::type set to @ref NRF_DRV_TWI_XFER_TXTX + * + * If @ref nrf_drv_twi_xfer_desc_t::type is set to @ref NRF_DRV_TWI_XFER_TX and the @ref NRF_DRV_TWI_FLAG_TX_NO_STOP and @ref NRF_DRV_TWI_FLAG_REPEATED_XFER + * flags are set, two tasks must be used to trigger a transfer: TASKS_RESUME followed by TASKS_STARTTX. If no stop condition is generated, + * TWIM is in SUSPENDED state. Therefore, it must be resumed before the transfer can be started. + * + * @note + * This function should be used only if the instance is configured to work in non-blocking mode. If the function is used in blocking mode, the driver asserts. + * @note If you are using this function with TWI, the only supported flag is @ref NRF_DRV_TWI_FLAG_TX_NO_STOP. All other flags require TWIM. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_xfer_desc Pointer to the transfer descriptor. + * @param[in] flags Transfer options (0 for default settings). + * + * @retval NRF_SUCCESS If the procedure was successful. + * @retval NRF_ERROR_BUSY If the driver is not ready for a new transfer. + * @retval NRF_ERROR_NOT_SUPPORTED If the provided parameters are not supported. + * @retval NRF_ERROR_INTERNAL If an error was detected by hardware. + * @retval NRF_ERROR_INVALID_ADDR If the EasyDMA is used and memory adress in not in RAM + * @retval NRF_ERROR_DRV_TWI_ERR_OVERRUN If the unread data was replaced by new data (TXRX and RX) + * @retval NRF_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address. + * @retval NRF_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte. + */ +__STATIC_INLINE +ret_code_t nrf_drv_twi_xfer(nrf_drv_twi_t const * p_instance, + nrf_drv_twi_xfer_desc_t const * p_xfer_desc, + uint32_t flags); + +/** + * @brief Function for checking the TWI driver state. + * + * @param[in] p_instance TWI instance. + * + * @retval true If the TWI driver is currently busy performing a transfer. + * @retval false If the TWI driver is ready for a new transfer. + */ +__STATIC_INLINE +bool nrf_drv_twi_is_busy(nrf_drv_twi_t const * p_instance); + +/** + * @brief Function for getting the transferred data count. + * + * This function provides valid results only in legacy mode. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @return Data count. + */ +__STATIC_INLINE +uint32_t nrf_drv_twi_data_count_get(nrf_drv_twi_t const * const p_instance); + +/** + * @brief Function for returning the address of a TWI/TWIM start task. + * + * This function should be used if @ref nrf_drv_twi_xfer was called with the flag @ref NRF_DRV_TWI_FLAG_HOLD_XFER. + * In that case, the transfer is not started by the driver, but it must be started externally by PPI. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] xfer_type Transfer type used in the last call of the @ref nrf_drv_twi_xfer function. + * + * @return Start task address (TX or RX) depending on the value of xfer_type. + */ +__STATIC_INLINE +uint32_t nrf_drv_twi_start_task_get(nrf_drv_twi_t const * p_instance, nrf_drv_twi_xfer_type_t xfer_type); + +/** + * @brief Function for returning the address of a STOPPED TWI/TWIM event. + * + * A STOPPED event can be used to detect the end of a transfer if the @ref NRF_DRV_TWI_FLAG_NO_XFER_EVT_HANDLER + * option is used. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @return STOPPED event address. + */ +__STATIC_INLINE +uint32_t nrf_drv_twi_stopped_event_get(nrf_drv_twi_t const * p_instance); + + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +#if defined(TWI_PRESENT) && !defined(TWIM_PRESENT) +#define NRF_DRV_TWI_WITH_TWI +#elif !defined(TWI_PRESENT) && defined(TWIM_PRESENT) +#define NRF_DRV_TWI_WITH_TWIM +#else +#if (NRFX_CHECK(TWI0_ENABLED) && NRFX_CHECK(TWI0_USE_EASY_DMA)) || \ + (NRFX_CHECK(TWI1_ENABLED) && NRFX_CHECK(TWI1_USE_EASY_DMA)) + #define NRF_DRV_TWI_WITH_TWIM +#endif +#if (NRFX_CHECK(TWI0_ENABLED) && !NRFX_CHECK(TWI0_USE_EASY_DMA)) || \ + (NRFX_CHECK(TWI1_ENABLED) && !NRFX_CHECK(TWI1_USE_EASY_DMA)) + #define NRF_DRV_TWI_WITH_TWI +#endif +#endif +#if defined(NRF_DRV_TWI_WITH_TWIM) && defined(NRF_DRV_TWI_WITH_TWI) + #define NRF_DRV_TWI_USE_TWIM (p_instance->use_easy_dma) +#elif defined(NRF_DRV_TWI_WITH_TWIM) + #define NRF_DRV_TWI_USE_TWIM true +#else + #define NRF_DRV_TWI_USE_TWIM false +#endif +#define NRF_DRV_TWI_USE_TWI (!NRF_DRV_TWI_USE_TWIM) + +__STATIC_INLINE +void nrf_drv_twi_uninit(nrf_drv_twi_t const * p_instance) +{ + if (NRF_DRV_TWI_USE_TWIM) + { + nrfx_twim_uninit(&p_instance->u.twim); + } + else if (NRF_DRV_TWI_USE_TWI) + { + nrfx_twi_uninit(&p_instance->u.twi); + } +} + +__STATIC_INLINE +void nrf_drv_twi_enable(nrf_drv_twi_t const * p_instance) +{ + if (NRF_DRV_TWI_USE_TWIM) + { + nrfx_twim_enable(&p_instance->u.twim); + } + else if (NRF_DRV_TWI_USE_TWI) + { + nrfx_twi_enable(&p_instance->u.twi); + } +} + +__STATIC_INLINE +void nrf_drv_twi_disable(nrf_drv_twi_t const * p_instance) +{ + if (NRF_DRV_TWI_USE_TWIM) + { + nrfx_twim_disable(&p_instance->u.twim); + } + else if (NRF_DRV_TWI_USE_TWI) + { + nrfx_twi_disable(&p_instance->u.twi); + } +} + +__STATIC_INLINE +ret_code_t nrf_drv_twi_tx(nrf_drv_twi_t const * p_instance, + uint8_t address, + uint8_t const * p_data, + uint8_t length, + bool no_stop) +{ + ret_code_t result = 0; + if (NRF_DRV_TWI_USE_TWIM) + { + result = nrfx_twim_tx(&p_instance->u.twim, + address, p_data, length, no_stop); + } + else if (NRF_DRV_TWI_USE_TWI) + { + result = nrfx_twi_tx(&p_instance->u.twi, + address, p_data, length, no_stop); + } + return result; +} + +__STATIC_INLINE +ret_code_t nrf_drv_twi_rx(nrf_drv_twi_t const * p_instance, + uint8_t address, + uint8_t * p_data, + uint8_t length) +{ + ret_code_t result = 0; + if (NRF_DRV_TWI_USE_TWIM) + { + result = nrfx_twim_rx(&p_instance->u.twim, + address, p_data, length); + } + else if (NRF_DRV_TWI_USE_TWI) + { + result = nrfx_twi_rx(&p_instance->u.twi, + address, p_data, length); + } + return result; +} + +__STATIC_INLINE +ret_code_t nrf_drv_twi_xfer(nrf_drv_twi_t const * p_instance, + nrf_drv_twi_xfer_desc_t const * p_xfer_desc, + uint32_t flags) +{ + ret_code_t result = 0; + if (NRF_DRV_TWI_USE_TWIM) + { + #ifdef TWIM_PRESENT + nrfx_twim_xfer_desc_t const twim_xfer_desc = + { + .type = (nrfx_twim_xfer_type_t)p_xfer_desc->type, + .address = p_xfer_desc->address, + .primary_length = p_xfer_desc->primary_length, + .secondary_length = p_xfer_desc->secondary_length, + .p_primary_buf = p_xfer_desc->p_primary_buf, + .p_secondary_buf = p_xfer_desc->p_secondary_buf, + }; + result = nrfx_twim_xfer(&p_instance->u.twim, &twim_xfer_desc, flags); + #endif + } + else if (NRF_DRV_TWI_USE_TWI) + { + #ifdef TWI_PRESENT + nrfx_twi_xfer_desc_t const twi_xfer_desc = + { + .type = (nrfx_twi_xfer_type_t)p_xfer_desc->type, + .address = p_xfer_desc->address, + .primary_length = p_xfer_desc->primary_length, + .secondary_length = p_xfer_desc->secondary_length, + .p_primary_buf = p_xfer_desc->p_primary_buf, + .p_secondary_buf = p_xfer_desc->p_secondary_buf, + }; + result = nrfx_twi_xfer(&p_instance->u.twi, &twi_xfer_desc, flags); + #endif + } + return result; +} + +__STATIC_INLINE +bool nrf_drv_twi_is_busy(nrf_drv_twi_t const * p_instance) +{ + bool result = 0; + if (NRF_DRV_TWI_USE_TWIM) + { + result = nrfx_twim_is_busy(&p_instance->u.twim); + } + else if (NRF_DRV_TWI_USE_TWI) + { + result = nrfx_twi_is_busy(&p_instance->u.twi); + } + return result; +} + +__STATIC_INLINE +uint32_t nrf_drv_twi_data_count_get(nrf_drv_twi_t const * const p_instance) +{ + uint32_t result = 0; + if (NRF_DRV_TWI_USE_TWIM) + { + NRFX_ASSERT(false); // not supported + result = 0; + } + else if (NRF_DRV_TWI_USE_TWI) + { + result = nrfx_twi_data_count_get(&p_instance->u.twi); + } + return result; +} + +__STATIC_INLINE +uint32_t nrf_drv_twi_start_task_get(nrf_drv_twi_t const * p_instance, + nrf_drv_twi_xfer_type_t xfer_type) +{ + uint32_t result = 0; + if (NRF_DRV_TWI_USE_TWIM) + { + result = nrfx_twim_start_task_get(&p_instance->u.twim, + (nrfx_twim_xfer_type_t)xfer_type); + } + else if (NRF_DRV_TWI_USE_TWI) + { + NRFX_ASSERT(false); // not supported + result = 0; + } + return result; +} + +__STATIC_INLINE +uint32_t nrf_drv_twi_stopped_event_get(nrf_drv_twi_t const * p_instance) +{ + uint32_t result = 0; + if (NRF_DRV_TWI_USE_TWIM) + { + result = nrfx_twim_stopped_event_get(&p_instance->u.twim); + } + else if (NRF_DRV_TWI_USE_TWI) + { + result = nrfx_twi_stopped_event_get(&p_instance->u.twi); + } + return result; +} + +#endif // SUPPRESS_INLINE_IMPLEMENTATION + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_DRV_TWI_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_uart.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_uart.h new file mode 100644 index 00000000000..c938ffc1314 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_uart.h @@ -0,0 +1,671 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_DRV_UART_H__ +#define NRF_DRV_UART_H__ + +#include + +// Needed for Mbed +#ifndef UART1_ENABLED +#define UART1_ENABLED 0 +#endif + +#ifndef UART0_ENABLED +#define UART0_ENABLED 0 +#endif + +#define UART0_INSTANCE_INDEX 0 +#define UART1_INSTANCE_INDEX UART0_ENABLED +#define UART_ENABLED_COUNT UART0_ENABLED + UART1_ENABLED + + +#if defined(UARTE_PRESENT) && NRFX_CHECK(NRFX_UARTE_ENABLED) + #define NRF_DRV_UART_WITH_UARTE +#endif +#if defined(UART_PRESENT) && NRFX_CHECK(NRFX_UART_ENABLED) + #define NRF_DRV_UART_WITH_UART +#endif + + +#if defined(NRF_DRV_UART_WITH_UARTE) + #include + #define NRF_DRV_UART_CREATE_UARTE(id) \ + .uarte = NRFX_UARTE_INSTANCE(id), +#else + // Compilers (at least the smart ones) will remove the UARTE related code + // (blocks starting with "if (NRF_DRV_UART_USE_UARTE)") when it is not used, + // but to perform the compilation they need the following definitions. + #define nrfx_uarte_init(...) 0 + #define nrfx_uarte_uninit(...) + #define nrfx_uarte_task_address_get(...) 0 + #define nrfx_uarte_event_address_get(...) 0 + #define nrfx_uarte_tx(...) 0 + #define nrfx_uarte_tx_in_progress(...) 0 + #define nrfx_uarte_tx_abort(...) + #define nrfx_uarte_rx(...) 0 + #define nrfx_uarte_rx_ready(...) 0 + #define nrfx_uarte_rx_abort(...) + #define nrfx_uarte_errorsrc_get(...) 0 + #define NRF_DRV_UART_CREATE_UARTE(id) +#endif + +// Mbed - needed to build +#define NRF_DRV_UART_WITH_UART +#if defined(NRF_DRV_UART_WITH_UART) + #include + #define NRF_DRV_UART_CREATE_UART(id) \ + .uart = NRFX_UART_INSTANCE(id), +#else + // Compilers (at least the smart ones) will remove the UART related code + // (blocks starting with "if (NRF_DRV_UART_USE_UART)") when it is not used, + // but to perform the compilation they need the following definitions. + #define nrfx_uart_init(...) 0 + #define nrfx_uart_uninit(...) + #define nrfx_uart_task_address_get(...) 0 + #define nrfx_uart_event_address_get(...) 0 + #define nrfx_uart_tx(...) 0 + #define nrfx_uart_tx_in_progress(...) 0 + #define nrfx_uart_tx_abort(...) + #define nrfx_uart_rx(...) 0 + #define nrfx_uart_rx_enable(...) + #define nrfx_uart_rx_disable(...) + #define nrfx_uart_rx_ready(...) 0 + #define nrfx_uart_rx_abort(...) + #define nrfx_uart_errorsrc_get(...) 0 + #define NRF_DRV_UART_CREATE_UART(id) + + // This part is for old modules that use directly UART HAL definitions + // (to make them compilable for chips that have only UARTE). + #define NRF_UART_BAUDRATE_1200 NRF_UARTE_BAUDRATE_1200 + #define NRF_UART_BAUDRATE_2400 NRF_UARTE_BAUDRATE_2400 + #define NRF_UART_BAUDRATE_4800 NRF_UARTE_BAUDRATE_4800 + #define NRF_UART_BAUDRATE_9600 NRF_UARTE_BAUDRATE_9600 + #define NRF_UART_BAUDRATE_14400 NRF_UARTE_BAUDRATE_14400 + #define NRF_UART_BAUDRATE_19200 NRF_UARTE_BAUDRATE_19200 + #define NRF_UART_BAUDRATE_28800 NRF_UARTE_BAUDRATE_28800 + #define NRF_UART_BAUDRATE_38400 NRF_UARTE_BAUDRATE_38400 + #define NRF_UART_BAUDRATE_57600 NRF_UARTE_BAUDRATE_57600 + #define NRF_UART_BAUDRATE_76800 NRF_UARTE_BAUDRATE_76800 + #define NRF_UART_BAUDRATE_115200 NRF_UARTE_BAUDRATE_115200 + #define NRF_UART_BAUDRATE_230400 NRF_UARTE_BAUDRATE_230400 + #define NRF_UART_BAUDRATE_250000 NRF_UARTE_BAUDRATE_250000 + #define NRF_UART_BAUDRATE_460800 NRF_UARTE_BAUDRATE_460800 + #define NRF_UART_BAUDRATE_921600 NRF_UARTE_BAUDRATE_921600 + #define NRF_UART_BAUDRATE_1000000 NRF_UARTE_BAUDRATE_1000000 + typedef nrf_uarte_baudrate_t nrf_uart_baudrate_t; + #define NRF_UART_ERROR_OVERRUN_MASK NRF_UARTE_ERROR_OVERRUN_MASK + #define NRF_UART_ERROR_PARITY_MASK NRF_UARTE_ERROR_PARITY_MASK + #define NRF_UART_ERROR_FRAMING_MASK NRF_UARTE_ERROR_PARITY_MASK + #define NRF_UART_ERROR_BREAK_MASK NRF_UARTE_ERROR_BREAK_MASK + typedef nrf_uarte_error_mask_t nrf_uart_error_mask_t; + #define NRF_UART_HWFC_DISABLED NRF_UARTE_HWFC_DISABLED + #define NRF_UART_HWFC_ENABLED NRF_UARTE_HWFC_ENABLED + typedef nrf_uarte_hwfc_t nrf_uart_hwfc_t; + #define NRF_UART_PARITY_EXCLUDED NRF_UARTE_PARITY_EXCLUDED + #define NRF_UART_PARITY_INCLUDED NRF_UARTE_PARITY_INCLUDED + typedef nrf_uarte_parity_t nrf_uart_parity_t; + typedef nrf_uarte_task_t nrf_uart_task_t; + typedef nrf_uarte_event_t nrf_uart_event_t; + #define NRF_UART_PSEL_DISCONNECTED NRF_UARTE_PSEL_DISCONNECTED + #define nrf_uart_event_clear(...) +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_drv_uart UART driver - legacy layer + * @{ + * @ingroup nrf_uart + * @brief Layer providing compatibility with the former API. + */ + +/** + * @brief Structure for the UART driver instance. + */ +typedef struct +{ + uint8_t inst_idx; +#if defined(NRF_DRV_UART_WITH_UARTE) + nrfx_uarte_t uarte; +#endif +#if defined(NRF_DRV_UART_WITH_UART) + nrfx_uart_t uart; +#endif +} nrf_drv_uart_t; + +/** + * @brief Macro for creating an UART driver instance. + */ +#define NRF_DRV_UART_INSTANCE(id) \ +{ \ + .inst_idx = id, \ + NRF_DRV_UART_CREATE_UARTE(id) \ + NRF_DRV_UART_CREATE_UART(id) \ +} + +/** + * @brief Types of UART driver events. + */ +typedef enum +{ + NRF_DRV_UART_EVT_TX_DONE, ///< Requested TX transfer completed. + NRF_DRV_UART_EVT_RX_DONE, ///< Requested RX transfer completed. + NRF_DRV_UART_EVT_ERROR, ///< Error reported by UART peripheral. +} nrf_drv_uart_evt_type_t; + +/**@brief Structure for UART configuration. */ +typedef struct +{ + uint32_t pseltxd; ///< TXD pin number. + uint32_t pselrxd; ///< RXD pin number. + uint32_t pselcts; ///< CTS pin number. + uint32_t pselrts; ///< RTS pin number. + void * p_context; ///< Context passed to interrupt handler. + nrf_uart_hwfc_t hwfc; ///< Flow control configuration. + nrf_uart_parity_t parity; ///< Parity configuration. + nrf_uart_baudrate_t baudrate; ///< Baudrate. + uint8_t interrupt_priority; ///< Interrupt priority. +#if defined(NRF_DRV_UART_WITH_UARTE) && defined(NRF_DRV_UART_WITH_UART) + bool use_easy_dma; +#endif +} nrf_drv_uart_config_t; + +#if defined(NRF_DRV_UART_WITH_UARTE) && defined(NRF_DRV_UART_WITH_UART) +extern uint8_t nrf_drv_uart_use_easy_dma[]; +#define NRF_DRV_UART_DEFAULT_CONFIG_USE_EASY_DMA .use_easy_dma = true, +#else +#define NRF_DRV_UART_DEFAULT_CONFIG_USE_EASY_DMA +#endif + +/**@brief UART default configuration. */ +#define NRF_DRV_UART_DEFAULT_CONFIG \ +{ \ + .pseltxd = NRF_UART_PSEL_DISCONNECTED, \ + .pselrxd = NRF_UART_PSEL_DISCONNECTED, \ + .pselcts = NRF_UART_PSEL_DISCONNECTED, \ + .pselrts = NRF_UART_PSEL_DISCONNECTED, \ + .p_context = NULL, \ + .hwfc = (nrf_uart_hwfc_t)UART_DEFAULT_CONFIG_HWFC, \ + .parity = (nrf_uart_parity_t)UART_DEFAULT_CONFIG_PARITY, \ + .baudrate = (nrf_uart_baudrate_t)UART_DEFAULT_CONFIG_BAUDRATE, \ + .interrupt_priority = UART_DEFAULT_CONFIG_IRQ_PRIORITY, \ + NRF_DRV_UART_DEFAULT_CONFIG_USE_EASY_DMA \ +} + +/**@brief Structure for UART transfer completion event. */ +typedef struct +{ + uint8_t * p_data; ///< Pointer to memory used for transfer. + uint8_t bytes; ///< Number of bytes transfered. +} nrf_drv_uart_xfer_evt_t; + +/**@brief Structure for UART error event. */ +typedef struct +{ + nrf_drv_uart_xfer_evt_t rxtx; ///< Transfer details includes number of bytes transfered. + uint32_t error_mask;///< Mask of error flags that generated the event. +} nrf_drv_uart_error_evt_t; + +/**@brief Structure for UART event. */ +typedef struct +{ + nrf_drv_uart_evt_type_t type; ///< Event type. + union + { + nrf_drv_uart_xfer_evt_t rxtx; ///< Data provided for transfer completion events. + nrf_drv_uart_error_evt_t error;///< Data provided for error event. + } data; +} nrf_drv_uart_event_t; + +/** + * @brief UART interrupt event handler. + * + * @param[in] p_event Pointer to event structure. Event is allocated on the stack so it is available + * only within the context of the event handler. + * @param[in] p_context Context passed to interrupt handler, set on initialization. + */ +typedef void (*nrf_uart_event_handler_t)(nrf_drv_uart_event_t * p_event, void * p_context); + +/** + * @brief Function for initializing the UART driver. + * + * This function configures and enables UART. After this function GPIO pins are controlled by UART. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_config Initial configuration. + * @param[in] event_handler Event handler provided by the user. If not provided driver works in + * blocking mode. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_INVALID_STATE If driver is already initialized. + */ +ret_code_t nrf_drv_uart_init(nrf_drv_uart_t const * p_instance, + nrf_drv_uart_config_t const * p_config, + nrf_uart_event_handler_t event_handler); + +/** + * @brief Function for uninitializing the UART driver. + * @param[in] p_instance Pointer to the driver instance structure. + */ +__STATIC_INLINE +void nrf_drv_uart_uninit(nrf_drv_uart_t const * p_instance); + +/** + * @brief Function for getting the address of a specific UART task. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] task Task. + * + * @return Task address. + */ +__STATIC_INLINE +uint32_t nrf_drv_uart_task_address_get(nrf_drv_uart_t const * p_instance, + nrf_uart_task_t task); + +/** + * @brief Function for getting the address of a specific UART event. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] event Event. + * + * @return Event address. + */ +__STATIC_INLINE +uint32_t nrf_drv_uart_event_address_get(nrf_drv_uart_t const * p_instance, + nrf_uart_event_t event); + +/** + * @brief Function for sending data over UART. + * + * If an event handler was provided in nrf_drv_uart_init() call, this function + * returns immediately and the handler is called when the transfer is done. + * Otherwise, the transfer is performed in blocking mode, i.e. this function + * returns when the transfer is finished. Blocking mode is not using interrupt so + * there is no context switching inside the function. + * + * @note Peripherals using EasyDMA (i.e. UARTE) require that the transfer buffers + * are placed in the Data RAM region. If they are not and UARTE instance is + * used, this function will fail with error code NRFX_ERROR_INVALID_ADDR. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_data Pointer to data. + * @param[in] length Number of bytes to send. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_BUSY If driver is already transferring. + * @retval NRFX_ERROR_FORBIDDEN If the transfer was aborted from a different context + * (blocking mode only, also see @ref nrf_drv_uart_rx_disable). + * @retval NRFX_ERROR_INVALID_ADDR If p_data does not point to RAM buffer (UARTE only). + */ +__STATIC_INLINE +ret_code_t nrf_drv_uart_tx(nrf_drv_uart_t const * p_instance, + uint8_t const * const p_data, + uint8_t length); + +/** + * @brief Function for checking if UART is currently transmitting. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true If UART is transmitting. + * @retval false If UART is not transmitting. + */ +__STATIC_INLINE +bool nrf_drv_uart_tx_in_progress(nrf_drv_uart_t const * p_instance); + +/** + * @brief Function for aborting any ongoing transmission. + * @note @ref NRF_DRV_UART_EVT_TX_DONE event will be generated in non-blocking mode. Event will + * contain number of bytes sent until abort was called. If Easy DMA is not used event will be + * called from the function context. If Easy DMA is used it will be called from UART interrupt + * context. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +__STATIC_INLINE +void nrf_drv_uart_tx_abort(nrf_drv_uart_t const * p_instance); + +/** + * @brief Function for receiving data over UART. + * + * If an event handler was provided in the nrf_drv_uart_init() call, this function + * returns immediately and the handler is called when the transfer is done. + * Otherwise, the transfer is performed in blocking mode, i.e. this function + * returns when the transfer is finished. Blocking mode is not using interrupt so + * there is no context switching inside the function. + * The receive buffer pointer is double buffered in non-blocking mode. The secondary + * buffer can be set immediately after starting the transfer and will be filled + * when the primary buffer is full. The double buffering feature allows + * receiving data continuously. + * + * @note Peripherals using EasyDMA (i.e. UARTE) require that the transfer buffers + * are placed in the Data RAM region. If they are not and UARTE driver instance + * is used, this function will fail with error code NRFX_ERROR_INVALID_ADDR. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_data Pointer to data. + * @param[in] length Number of bytes to receive. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_BUSY If the driver is already receiving + * (and the secondary buffer has already been set + * in non-blocking mode). + * @retval NRFX_ERROR_FORBIDDEN If the transfer was aborted from a different context + * (blocking mode only, also see @ref nrf_drv_uart_rx_disable). + * @retval NRFX_ERROR_INTERNAL If UART peripheral reported an error. + * @retval NRFX_ERROR_INVALID_ADDR If p_data does not point to RAM buffer (UARTE only). + */ +__STATIC_INLINE +ret_code_t nrf_drv_uart_rx(nrf_drv_uart_t const * p_instance, + uint8_t * p_data, + uint8_t length); + + + +/** + * @brief Function for testing the receiver state in blocking mode. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true If the receiver has at least one byte of data to get. + * @retval false If the receiver is empty. + */ +__STATIC_INLINE +bool nrf_drv_uart_rx_ready(nrf_drv_uart_t const * p_instance); + +/** + * @brief Function for enabling the receiver. + * + * UART has a 6-byte-long RX FIFO and it is used to store incoming data. If a user does not call the + * UART receive function before the FIFO is filled, an overrun error will appear. Enabling the receiver + * without specifying an RX buffer is supported only in UART mode (without Easy DMA). The receiver must be + * explicitly closed by the user @sa nrf_drv_uart_rx_disable. This function asserts if the mode is wrong. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +__STATIC_INLINE +void nrf_drv_uart_rx_enable(nrf_drv_uart_t const * p_instance); + +/** + * @brief Function for disabling the receiver. + * + * This function must be called to close the receiver after it has been explicitly enabled by + * @sa nrf_drv_uart_rx_enable. The feature is supported only in UART mode (without Easy DMA). The function + * asserts if mode is wrong. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +__STATIC_INLINE +void nrf_drv_uart_rx_disable(nrf_drv_uart_t const * p_instance); + +/** + * @brief Function for aborting any ongoing reception. + * @note @ref NRF_DRV_UART_EVT_RX_DONE event will be generated in non-blocking mode. The event will + * contain the number of bytes received until abort was called. The event is called from UART interrupt + * context. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +__STATIC_INLINE +void nrf_drv_uart_rx_abort(nrf_drv_uart_t const * p_instance); + +/** + * @brief Function for reading error source mask. Mask contains values from @ref nrf_uart_error_mask_t. + * @note Function should be used in blocking mode only. In case of non-blocking mode, an error event is + * generated. Function clears error sources after reading. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval Mask of reported errors. + */ +__STATIC_INLINE +uint32_t nrf_drv_uart_errorsrc_get(nrf_drv_uart_t const * p_instance); + + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +#if defined(NRF_DRV_UART_WITH_UARTE) && defined(NRF_DRV_UART_WITH_UART) + #define NRF_DRV_UART_USE_UARTE (nrf_drv_uart_use_easy_dma[p_instance->inst_idx]) +#elif defined(NRF_DRV_UART_WITH_UARTE) + #define NRF_DRV_UART_USE_UARTE true +#else + #define NRF_DRV_UART_USE_UARTE false +#endif +#define NRF_DRV_UART_USE_UART (!NRF_DRV_UART_USE_UARTE) + +__STATIC_INLINE +void nrf_drv_uart_uninit(nrf_drv_uart_t const * p_instance) +{ + if (NRF_DRV_UART_USE_UARTE) + { + nrfx_uarte_uninit(&p_instance->uarte); + } + else if (NRF_DRV_UART_USE_UART) + { + nrfx_uart_uninit(&p_instance->uart); + } +} + +__STATIC_INLINE +uint32_t nrf_drv_uart_task_address_get(nrf_drv_uart_t const * p_instance, + nrf_uart_task_t task) +{ + uint32_t result = 0; + if (NRF_DRV_UART_USE_UARTE) + { + result = nrfx_uarte_task_address_get(&p_instance->uarte, + (nrf_uarte_task_t)task); + } + else if (NRF_DRV_UART_USE_UART) + { + result = nrfx_uart_task_address_get(&p_instance->uart, task); + } + return result; +} + +__STATIC_INLINE +uint32_t nrf_drv_uart_event_address_get(nrf_drv_uart_t const * p_instance, + nrf_uart_event_t event) +{ + uint32_t result = 0; + if (NRF_DRV_UART_USE_UARTE) + { + result = nrfx_uarte_event_address_get(&p_instance->uarte, + (nrf_uarte_event_t)event); + } + else if (NRF_DRV_UART_USE_UART) + { + result = nrfx_uart_event_address_get(&p_instance->uart, event); + } + return result; +} + +__STATIC_INLINE +ret_code_t nrf_drv_uart_tx(nrf_drv_uart_t const * p_instance, + uint8_t const * p_data, + uint8_t length) +{ + uint32_t result = 0; + if (NRF_DRV_UART_USE_UARTE) + { + result = nrfx_uarte_tx(&p_instance->uarte, + p_data, + length); + } + else if (NRF_DRV_UART_USE_UART) + { + result = nrfx_uart_tx(&p_instance->uart, + p_data, + length); + } + return result; +} + +__STATIC_INLINE +bool nrf_drv_uart_tx_in_progress(nrf_drv_uart_t const * p_instance) +{ + bool result = 0; + if (NRF_DRV_UART_USE_UARTE) + { + result = nrfx_uarte_tx_in_progress(&p_instance->uarte); + } + else if (NRF_DRV_UART_USE_UART) + { + result = nrfx_uart_tx_in_progress(&p_instance->uart); + } + return result; +} + +__STATIC_INLINE +void nrf_drv_uart_tx_abort(nrf_drv_uart_t const * p_instance) +{ + if (NRF_DRV_UART_USE_UARTE) + { + nrfx_uarte_tx_abort(&p_instance->uarte); + } + else if (NRF_DRV_UART_USE_UART) + { + nrfx_uart_tx_abort(&p_instance->uart); + } +} + +__STATIC_INLINE +ret_code_t nrf_drv_uart_rx(nrf_drv_uart_t const * p_instance, + uint8_t * p_data, + uint8_t length) +{ + uint32_t result = 0; + if (NRF_DRV_UART_USE_UARTE) + { + result = nrfx_uarte_rx(&p_instance->uarte, + p_data, + length); + } + else if (NRF_DRV_UART_USE_UART) + { + result = nrfx_uart_rx(&p_instance->uart, + p_data, + length); + } + return result; +} + +__STATIC_INLINE +bool nrf_drv_uart_rx_ready(nrf_drv_uart_t const * p_instance) +{ + bool result = 0; + if (NRF_DRV_UART_USE_UARTE) + { + result = nrfx_uarte_rx_ready(&p_instance->uarte); + } + else if (NRF_DRV_UART_USE_UART) + { + result = nrfx_uart_rx_ready(&p_instance->uart); + } + return result; +} + +__STATIC_INLINE +void nrf_drv_uart_rx_enable(nrf_drv_uart_t const * p_instance) +{ + if (NRF_DRV_UART_USE_UARTE) + { + NRFX_ASSERT(false); // not supported + } + else if (NRF_DRV_UART_USE_UART) + { + nrfx_uart_rx_enable(&p_instance->uart); + } +} + +__STATIC_INLINE +void nrf_drv_uart_rx_disable(nrf_drv_uart_t const * p_instance) +{ + if (NRF_DRV_UART_USE_UARTE) + { + NRFX_ASSERT(false); // not supported + } + else if (NRF_DRV_UART_USE_UART) + { + nrfx_uart_rx_disable(&p_instance->uart); + } +} + +__STATIC_INLINE +void nrf_drv_uart_rx_abort(nrf_drv_uart_t const * p_instance) +{ + if (NRF_DRV_UART_USE_UARTE) + { + nrfx_uarte_rx_abort(&p_instance->uarte); + } + else if (NRF_DRV_UART_USE_UART) + { + nrfx_uart_rx_abort(&p_instance->uart); + } +} + +__STATIC_INLINE +uint32_t nrf_drv_uart_errorsrc_get(nrf_drv_uart_t const * p_instance) +{ + uint32_t result = 0; + if (NRF_DRV_UART_USE_UARTE) + { + result = nrfx_uarte_errorsrc_get(&p_instance->uarte); + } + else if (NRF_DRV_UART_USE_UART) + { + nrf_uart_event_clear(p_instance->uart.p_reg, NRF_UART_EVENT_ERROR); + result = nrfx_uart_errorsrc_get(&p_instance->uart); + } + return result; +} + +#endif // SUPPRESS_INLINE_IMPLEMENTATION + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_DRV_UART_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/nrfx_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/nrfx_config.h new file mode 100644 index 00000000000..72577ef2fc5 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/nrfx_config.h @@ -0,0 +1,47 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_CONFIG_H__ +#define NRFX_CONFIG_H__ + +// TODO - temporary redirection +#include + +#endif // NRFX_CONFIG_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/nrfx_glue.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/nrfx_glue.h new file mode 100644 index 00000000000..464c6ee79bc --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/nrfx_glue.h @@ -0,0 +1,269 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_GLUE_H__ +#define NRFX_GLUE_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_glue nrfx_glue.h + * @{ + * @ingroup nrfx + * + * @brief This file contains macros that should be implemented according to + * the needs of the host environment into which @em nrfx is integrated. + */ + +// RF - remove the legacy layer... this is preventing driver instances from being generated +//#include + +#include + +//------------------------------------------------------------------------------ + +#include +/** + * @brief Macro for placing a runtime assertion. + * + * @param expression Expression to evaluate. + */ +#define NRFX_ASSERT(expression) ASSERT(expression) + +#include +/** + * @brief Macro for placing a compile time assertion. + * + * @param expression Expression to evaluate. + */ +#define NRFX_STATIC_ASSERT(expression) STATIC_ASSERT(expression) + +//------------------------------------------------------------------------------ + +#ifdef NRF51 +#ifdef SOFTDEVICE_PRESENT +#define INTERRUPT_PRIORITY_IS_VALID(pri) (((pri) == 1) || ((pri) == 3)) +#else +#define INTERRUPT_PRIORITY_IS_VALID(pri) ((pri) < 4) +#endif //SOFTDEVICE_PRESENT +#else +#ifdef SOFTDEVICE_PRESENT +#define INTERRUPT_PRIORITY_IS_VALID(pri) ((((pri) > 1) && ((pri) < 4)) || \ + (((pri) > 4) && ((pri) < 8))) +#else +#define INTERRUPT_PRIORITY_IS_VALID(pri) ((pri) < 8) +#endif //SOFTDEVICE_PRESENT +#endif //NRF52 + +/** + * @brief Macro for setting the priority of a specific IRQ. + * + * @param irq_number IRQ number. + * @param priority Priority to set. + */ +#define NRFX_IRQ_PRIORITY_SET(irq_number, priority) \ + _NRFX_IRQ_PRIORITY_SET(irq_number, priority) +static inline void _NRFX_IRQ_PRIORITY_SET(IRQn_Type irq_number, + uint8_t priority) +{ + ASSERT(INTERRUPT_PRIORITY_IS_VALID(priority)); + NVIC_SetPriority(irq_number, priority); +} + +/** + * @brief Macro for enabling a specific IRQ. + * + * @param irq_number IRQ number. + */ +#define NRFX_IRQ_ENABLE(irq_number) _NRFX_IRQ_ENABLE(irq_number) +static inline void _NRFX_IRQ_ENABLE(IRQn_Type irq_number) +{ + NVIC_ClearPendingIRQ(irq_number); + NVIC_EnableIRQ(irq_number); +} + +/** + * @brief Macro for checking if a specific IRQ is enabled. + * + * @param irq_number IRQ number. + * + * @retval true If the IRQ is enabled. + * @retval false Otherwise. + */ +#define NRFX_IRQ_IS_ENABLED(irq_number) _NRFX_IRQ_IS_ENABLED(irq_number) +static inline bool _NRFX_IRQ_IS_ENABLED(IRQn_Type irq_number) +{ + return 0 != (NVIC->ISER[irq_number / 32] & (1UL << (irq_number % 32))); +} + +/** + * @brief Macro for disabling a specific IRQ. + * + * @param irq_number IRQ number. + */ +#define NRFX_IRQ_DISABLE(irq_number) _NRFX_IRQ_DISABLE(irq_number) +static inline void _NRFX_IRQ_DISABLE(IRQn_Type irq_number) +{ + NVIC_DisableIRQ(irq_number); +} + +/** + * @brief Macro for setting a specific IRQ as pending. + * + * @param irq_number IRQ number. + */ +#define NRFX_IRQ_PENDING_SET(irq_number) _NRFX_IRQ_PENDING_SET(irq_number) +static inline void _NRFX_IRQ_PENDING_SET(IRQn_Type irq_number) +{ + NVIC_SetPendingIRQ(irq_number); +} + +/** + * @brief Macro for clearing the pending status of a specific IRQ. + * + * @param irq_number IRQ number. + */ +#define NRFX_IRQ_PENDING_CLEAR(irq_number) _NRFX_IRQ_PENDING_CLEAR(irq_number) +static inline void _NRFX_IRQ_PENDING_CLEAR(IRQn_Type irq_number) +{ + NVIC_ClearPendingIRQ(irq_number); +} + +/** + * @brief Macro for checking the pending status of a specific IRQ. + * + * @retval true If the IRQ is pending. + * @retval false Otherwise. + */ +#define NRFX_IRQ_IS_PENDING(irq_number) _NRFX_IRQ_IS_PENDING(irq_number) +static inline bool _NRFX_IRQ_IS_PENDING(IRQn_Type irq_number) +{ + return (NVIC_GetPendingIRQ(irq_number) == 1); +} + +#include +#include +/** + * @brief Macro for entering into a critical section. + */ +#define NRFX_CRITICAL_SECTION_ENTER() CRITICAL_REGION_ENTER() + +/** + * @brief Macro for exiting from a critical section. + */ +#define NRFX_CRITICAL_SECTION_EXIT() CRITICAL_REGION_EXIT() + +//------------------------------------------------------------------------------ + +/** + * @brief When set to a non-zero value, this macro specifies that + * @ref nrfx_coredep_delay_us uses a precise DWT-based solution. + * A compilation error is generated if the DWT unit is not present + * in the SoC used. + */ +#define NRFX_DELAY_DWT_BASED 0 + +#include + +#define NRFX_DELAY_US(us_time) nrfx_coredep_delay_us(us_time) + +//------------------------------------------------------------------------------ + +#include +/** + * @brief When set to a non-zero value, this macro specifies that the + * @ref nrfx_error_codes and the @ref ret_code_t type itself are defined + * in a customized way and the default definitions from @c + * should not be used. + */ +#define NRFX_CUSTOM_ERROR_CODES 1 + +typedef ret_code_t nrfx_err_t; + +#define NRFX_SUCCESS NRF_SUCCESS +#define NRFX_ERROR_INTERNAL NRF_ERROR_INTERNAL +#define NRFX_ERROR_NO_MEM NRF_ERROR_NO_MEM +#define NRFX_ERROR_NOT_SUPPORTED NRF_ERROR_NOT_SUPPORTED +#define NRFX_ERROR_INVALID_PARAM NRF_ERROR_INVALID_PARAM +#define NRFX_ERROR_INVALID_STATE NRF_ERROR_INVALID_STATE +#define NRFX_ERROR_INVALID_LENGTH NRF_ERROR_INVALID_LENGTH +#define NRFX_ERROR_TIMEOUT NRF_ERROR_TIMEOUT +#define NRFX_ERROR_FORBIDDEN NRF_ERROR_FORBIDDEN +#define NRFX_ERROR_NULL NRF_ERROR_NULL +#define NRFX_ERROR_INVALID_ADDR NRF_ERROR_INVALID_ADDR +#define NRFX_ERROR_BUSY NRF_ERROR_BUSY +#define NRFX_ERROR_ALREADY_INITIALIZED NRF_ERROR_MODULE_ALREADY_INITIALIZED + +#define NRFX_ERROR_DRV_TWI_ERR_OVERRUN NRF_ERROR_DRV_TWI_ERR_OVERRUN +#define NRFX_ERROR_DRV_TWI_ERR_ANACK NRF_ERROR_DRV_TWI_ERR_ANACK +#define NRFX_ERROR_DRV_TWI_ERR_DNACK NRF_ERROR_DRV_TWI_ERR_DNACK + +//------------------------------------------------------------------------------ + +#include +/** + * @brief Bitmask defining PPI channels reserved to be used outside of nrfx. + */ +#define NRFX_PPI_CHANNELS_USED NRF_PPI_CHANNELS_USED + +/** + * @brief Bitmask defining PPI groups reserved to be used outside of nrfx. + */ +#define NRFX_PPI_GROUPS_USED NRF_PPI_GROUPS_USED + +/** + * @brief Bitmask defining SWI instances reserved to be used outside of nrfx. + */ +#define NRFX_SWI_USED NRF_SWI_USED + +/** + * @brief Bitmask defining TIMER instances reserved to be used outside of nrfx. + */ +#define NRFX_TIMERS_USED NRF_TIMERS_USED + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_GLUE_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/nrfx_log.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/nrfx_log.h new file mode 100644 index 00000000000..4c2546ef335 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/nrfx_log.h @@ -0,0 +1,152 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_LOG_H__ +#define NRFX_LOG_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(NRFX_LOG_MODULE) +#define NRF_LOG_MODULE_NAME NRFX_LOG_MODULE + +#define NRFX_CONFIG_ENTRY(x) CONCAT_3(NRFX_, NRFX_LOG_MODULE, x) + +#if NRFX_CHECK(NRFX_CONFIG_ENTRY(_CONFIG_LOG_ENABLED)) +#define NRF_LOG_LEVEL NRFX_CONFIG_ENTRY(_CONFIG_LOG_LEVEL) +#define NRF_LOG_INFO_COLOR NRFX_CONFIG_ENTRY(_CONFIG_INFO_COLOR) +#define NRF_LOG_DEBUG_COLOR NRFX_CONFIG_ENTRY(_CONFIG_DEBUG_COLOR) +#else +#define NRF_LOG_LEVEL 0 +#endif +#endif // defined(NRFX_LOG_MODULE) + +#include + +#if defined(NRFX_LOG_MODULE) +NRF_LOG_MODULE_REGISTER(); +#endif + +#define TEST_MACRO_INFO(...) NRF_LOG_INFO(__VA_ARGS__) +/** + * @defgroup nrfx_log nrfx_log.h + * @{ + * @ingroup nrfx + * + * @brief This file contains macros that should be implemented according to + * the needs of the host environment into which @em nrfx is integrated. + */ + +/** + * @brief Macro for logging a message with the severity level ERROR. + */ +#define NRFX_LOG_ERROR(...) NRF_LOG_ERROR(__VA_ARGS__) + +/** + * @brief Macro for logging a message with the severity level WARNING. + */ +#define NRFX_LOG_WARNING(...) NRF_LOG_WARNING(__VA_ARGS__) + +/** + * @brief Macro for logging a message with the severity level INFO. + */ +#define NRFX_LOG_INFO(...) TEST_MACRO_INFO(__VA_ARGS__) + +/** + * @brief Macro for logging a message with the severity level DEBUG. + */ +#define NRFX_LOG_DEBUG(...) NRF_LOG_DEBUG(__VA_ARGS__) + + +/** + * @brief Macro for logging a memory dump with the severity level ERROR. + * + * @param[in] p_memory Pointer to the memory region to be dumped. + * @param[in] length Length of the memory region in bytes. + */ +#define NRFX_LOG_HEXDUMP_ERROR(p_memory, length) \ + NRF_LOG_HEXDUMP_ERROR(p_memory, length) + +/** + * @brief Macro for logging a memory dump with the severity level WARNING. + * + * @param[in] p_memory Pointer to the memory region to be dumped. + * @param[in] length Length of the memory region in bytes. + */ +#define NRFX_LOG_HEXDUMP_WARNING(p_memory, length) \ + NRF_LOG_HEXDUMP_WARNING(p_memory, length) + +/** + * @brief Macro for logging a memory dump with the severity level INFO. + * + * @param[in] p_memory Pointer to the memory region to be dumped. + * @param[in] length Length of the memory region in bytes. + */ +#define NRFX_LOG_HEXDUMP_INFO(p_memory, length) \ + NRF_LOG_HEXDUMP_INFO(p_memory, length) + +/** + * @brief Macro for logging a memory dump with the severity level DEBUG. + * + * @param[in] p_memory Pointer to the memory region to be dumped. + * @param[in] length Length of the memory region in bytes. + */ +#define NRFX_LOG_HEXDUMP_DEBUG(p_memory, length) \ + NRF_LOG_HEXDUMP_DEBUG(p_memory, length) + + +/** + * @brief Macro for getting the textual representation of a given error code. + * + * @param[in] error_code Error code. + * + * @return String containing the textual representation of the error code. + */ +#define NRFX_LOG_ERROR_STRING_GET(error_code) \ + NRF_LOG_ERROR_STRING_GET(error_code) + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_LOG_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrf_bitmask.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrf_bitmask.h new file mode 100644 index 00000000000..8f2ac3626d4 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrf_bitmask.h @@ -0,0 +1,156 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_BITMASK_H +#define NRF_BITMASK_H + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_bitmask Bitmask module + * @{ + * @ingroup nrfx + * @brief Bitmask managing module. + */ + +#define BITMASK_BYTE_GET(abs_bit) ((abs_bit)/8) +#define BITMASK_RELBIT_GET(abs_bit) ((abs_bit) & 0x00000007) + +/** + * Function for checking if bit in the multi-byte bit mask is set. + * + * @param bit Bit index. + * @param p_mask A pointer to mask with bit fields. + * + * @return 0 if bit is not set, positive value otherwise. + */ +__STATIC_INLINE uint32_t nrf_bitmask_bit_is_set(uint32_t bit, void const * p_mask) +{ + uint8_t const * p_mask8 = (uint8_t const *)p_mask; + uint32_t byte_idx = BITMASK_BYTE_GET(bit); + bit = BITMASK_RELBIT_GET(bit); + return (1 << bit) & p_mask8[byte_idx]; +} + +/** + * Function for setting a bit in the multi-byte bit mask. + * + * @param bit Bit index. + * @param p_mask A pointer to mask with bit fields. + */ +__STATIC_INLINE void nrf_bitmask_bit_set(uint32_t bit, void * p_mask) +{ + uint8_t * p_mask8 = (uint8_t *)p_mask; + uint32_t byte_idx = BITMASK_BYTE_GET(bit); + bit = BITMASK_RELBIT_GET(bit); + p_mask8[byte_idx] |= (1 << bit); +} + +/** + * Function for clearing a bit in the multi-byte bit mask. + * + * @param bit Bit index. + * @param p_mask A pointer to mask with bit fields. + */ +__STATIC_INLINE void nrf_bitmask_bit_clear(uint32_t bit, void * p_mask) +{ + uint8_t * p_mask8 = (uint8_t *)p_mask; + uint32_t byte_idx = BITMASK_BYTE_GET(bit); + bit = BITMASK_RELBIT_GET(bit); + p_mask8[byte_idx] &= ~(1 << bit); +} + +/** + * Function for performing bitwise OR operation on two multi-byte bit masks. + * + * @param p_mask1 A pointer to the first bit mask. + * @param p_mask2 A pointer to the second bit mask. + * @param p_out_mask A pointer to the output bit mask. + * @param length Length of output mask in bytes. + */ +__STATIC_INLINE void nrf_bitmask_masks_or(void const * p_mask1, + void const * p_mask2, + void * p_out_mask, + uint32_t length) +{ + uint8_t const * p_mask8_1 = (uint8_t const *)p_mask1; + uint8_t const * p_mask8_2 = (uint8_t const *)p_mask2; + uint8_t * p_mask8_out = (uint8_t *)p_out_mask; + uint32_t i; + for (i = 0; i < length; i++) + { + p_mask8_out[i] = p_mask8_1[i] | p_mask8_2[i]; + } +} + +/** + * Function for performing bitwise AND operation on two multi-byte bit masks. + * + * @param p_mask1 A pointer to the first bit mask. + * @param p_mask2 A pointer to the second bit mask. + * @param p_out_mask A pointer to the output bit mask. + * @param length Length of output mask in bytes. + */ +__STATIC_INLINE void nrf_bitmask_masks_and(void const * p_mask1, + void const * p_mask2, + void * p_out_mask, + uint32_t length) +{ + uint8_t const * p_mask8_1 = (uint8_t const *)p_mask1; + uint8_t const * p_mask8_2 = (uint8_t const *)p_mask2; + uint8_t * p_mask8_out = (uint8_t *)p_out_mask; + uint32_t i; + for (i = 0; i < length; i++) + { + p_mask8_out[i] = p_mask8_1[i] & p_mask8_2[i]; + } +} + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_BITMASK_H diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_adc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_adc.h new file mode 100644 index 00000000000..e28d52aaad7 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_adc.h @@ -0,0 +1,281 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_ADC_H__ +#define NRFX_ADC_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_adc ADC driver + * @{ + * @ingroup nrf_adc + * @brief Analog-to-Digital Converter (ADC) peripheral driver. + */ + +/** + * @brief Driver event types. + */ +typedef enum +{ + NRFX_ADC_EVT_DONE, ///< Event generated when the buffer is filled with samples. + NRFX_ADC_EVT_SAMPLE, ///< Event generated when the requested channel is sampled. +} nrfx_adc_evt_type_t; + +/** + * @brief Analog-to-digital converter driver DONE event. + */ +typedef struct +{ + nrf_adc_value_t * p_buffer; ///< Pointer to the buffer with converted samples. + uint16_t size; ///< Number of samples in the buffer. +} nrfx_adc_done_evt_t; + +/** + * @brief Analog-to-digital converter driver SAMPLE event. + */ +typedef struct +{ + nrf_adc_value_t sample; ///< Converted sample. +} nrfx_adc_sample_evt_t; + +/** + * @brief Analog-to-digital converter driver event. + */ +typedef struct +{ + nrfx_adc_evt_type_t type; ///< Event type. + union + { + nrfx_adc_done_evt_t done; ///< Data for DONE event. + nrfx_adc_sample_evt_t sample; ///< Data for SAMPLE event. + } data; +} nrfx_adc_evt_t; + +/**@brief Macro for initializing the ADC channel with the default configuration. */ +#define NRFX_ADC_DEFAULT_CHANNEL(analog_input) \ + { \ + NULL, \ + { \ + .resolution = NRF_ADC_CONFIG_RES_10BIT, \ + .scaling = NRF_ADC_CONFIG_SCALING_INPUT_FULL_SCALE, \ + .reference = NRF_ADC_CONFIG_REF_VBG, \ + .input = (analog_input), \ + .extref = NRF_ADC_CONFIG_EXTREFSEL_NONE \ + } \ + } + +// Forward declaration of the nrfx_adc_channel_t type. +typedef struct nrfx_adc_channel_s nrfx_adc_channel_t; + +/** + * @brief ADC channel. + * + * This structure is defined by the user and used by the driver. Therefore, it should + * not be defined on the stack as a local variable. + */ +struct nrfx_adc_channel_s +{ + nrfx_adc_channel_t * p_next; ///< Pointer to the next enabled channel (for internal use). + nrf_adc_config_t config; ///< ADC configuration for the current channel. +}; + +/** + * @brief ADC configuration. + */ +typedef struct +{ + uint8_t interrupt_priority; ///< Priority of ADC interrupt. +} nrfx_adc_config_t; + +/** @brief ADC default configuration. */ +#define NRFX_ADC_DEFAULT_CONFIG \ +{ \ + .interrupt_priority = NRFX_ADC_CONFIG_IRQ_PRIORITY \ +} + +/** + * @brief User event handler prototype. + * + * This function is called when the requested number of samples has been processed. + * + * @param p_event Event. + */ +typedef void (*nrfx_adc_event_handler_t)(nrfx_adc_evt_t const * p_event); + +/** + * @brief Function for initializing the ADC. + * + * If a valid event handler is provided, the driver is initialized in non-blocking mode. + * If event_handler is NULL, the driver works in blocking mode. + * + * @param[in] p_config Pointer to the structure with initial configuration. + * @param[in] event_handler Event handler provided by the user. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_INVALID_STATE If the driver is already initialized. + */ +nrfx_err_t nrfx_adc_init(nrfx_adc_config_t const * p_config, + nrfx_adc_event_handler_t event_handler); + +/** + * @brief Function for uninitializing the ADC. + * + * This function stops all ongoing conversions and disables all channels. + */ +void nrfx_adc_uninit(void); + +/** + * @brief Function for enabling an ADC channel. + * + * This function configures and enables the channel. When @ref nrfx_adc_buffer_convert is + * called, all channels that have been enabled with this function are sampled. + * + * @note The channel instance variable @p p_channel is used by the driver as an item + * in a list. Therefore, it cannot be an automatic variable that is located on the stack. + */ +void nrfx_adc_channel_enable(nrfx_adc_channel_t * const p_channel); + +/** + * @brief Function for disabling an ADC channel. + */ +void nrfx_adc_channel_disable(nrfx_adc_channel_t * const p_channel); + +/** + * @brief Function for starting ADC sampling. + * + * This function triggers single ADC sampling. If more than one channel is enabled, the driver + * emulates scanning and all channels are sampled in the order they were enabled. + */ +void nrfx_adc_sample(void); + +/** + * @brief Function for executing a single ADC conversion. + * + * This function selects the desired input and starts a single conversion. If a valid pointer + * is provided for the result, the function blocks until the conversion is completed. Otherwise, the + * function returns when the conversion is started, and the result is provided in an event (driver + * must be initialized in non-blocking mode, otherwise an assertion will fail). The function will + * fail if ADC is busy. The channel does not need to be enabled to perform a single conversion. + * + * @param[in] p_channel Channel. + * @param[out] p_value Pointer to the location where the result should be placed. Unless NULL is + * provided, the function is blocking. + * + * @retval NRFX_SUCCESS If conversion was successful. + * @retval NRFX_ERROR_BUSY If the ADC driver is busy. + */ +nrfx_err_t nrfx_adc_sample_convert(nrfx_adc_channel_t const * const p_channel, + nrf_adc_value_t * p_value); + +/** + * @brief Function for converting data to the buffer. + * + * If the driver is initialized in non-blocking mode, this function returns when the first + * conversion is set up. When the buffer is filled, the application is notified by the event + * handler. If the driver is initialized in blocking mode, the function returns when the buffer is + * filled. + * + * Conversion is done on all enabled channels, but it is not triggered by this + * function. This function will prepare the ADC for sampling and then + * wait for the SAMPLE task. Sampling can be triggered manually by the @ref + * nrfx_adc_sample function or by PPI using the @ref NRF_ADC_TASK_START task. + * + * @note If more than one channel is enabled, the function emulates scanning, and + * a single START task will trigger conversion on all enabled channels. For example: + * If 3 channels are enabled and the user requests 6 samples, the completion event + * handler will be called after 2 START tasks. + * + * @note The application must adjust the sampling frequency. The maximum frequency + * depends on the sampling timer and the maximum latency of the ADC interrupt. If + * an interrupt is not handled before the next sampling is triggered, the sample + * will be lost. + * + * @param[in] buffer Result buffer. + * @param[in] size Buffer size in samples. + * + * @retval NRFX_SUCCESS If conversion was successful. + * @retval NRFX_ERROR_BUSY If the driver is busy. + */ +nrfx_err_t nrfx_adc_buffer_convert(nrf_adc_value_t * buffer, uint16_t size); + +/** + * @brief Function for retrieving the ADC state. + * + * @retval true If the ADC is busy. + * @retval false If the ADC is ready. + */ +bool nrfx_adc_is_busy(void); + +/** + * @brief Function for getting the address of the ADC START task. + * + * This function is used to get the address of the START task, which can be used to trigger ADC + * conversion. + * + * @return Start task address. + */ +__STATIC_INLINE uint32_t nrfx_adc_start_task_get(void); + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE uint32_t nrfx_adc_start_task_get(void) +{ + return nrf_adc_task_address_get(NRF_ADC_TASK_START); +} + +#endif + + +void nrfx_adc_irq_handler(void); + + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_ADC_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_clock.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_clock.h new file mode 100644 index 00000000000..8a5e184af20 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_clock.h @@ -0,0 +1,223 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_CLOCK_H__ +#define NRFX_CLOCK_H__ + +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_clock CLOCK driver + * @{ + * @ingroup nrf_clock + * @brief CLOCK peripheral driver. + */ + +/** + * @brief Clock events. + */ +typedef enum +{ + NRFX_CLOCK_EVT_HFCLK_STARTED, ///< HFCLK has been started. + NRFX_CLOCK_EVT_LFCLK_STARTED, ///< LFCLK has been started. + NRFX_CLOCK_EVT_CTTO, ///< Calibration timeout. + NRFX_CLOCK_EVT_CAL_DONE ///< Calibration has been done. +} nrfx_clock_evt_type_t; + +/** + * @brief Clock event handler. + * + * @param[in] event Event. + */ +typedef void (*nrfx_clock_event_handler_t)(nrfx_clock_evt_type_t event); + +/** + * @brief Function for initializing internal structures in the nrfx_clock module. + * + * After initialization, the module is in power off state (clocks are not started). + * + * @param[in] event_handler Event handler provided by the user. + * Must not be NULL. + * + * @retval NRFX_SUCCESS If the procedure was successful. + * @retval NRFX_ERROR_ALREADY_INITIALIZED If the driver was already initialized. + */ +nrfx_err_t nrfx_clock_init(nrfx_clock_event_handler_t event_handler); + +/** + * @brief Function for enabling interrupts in the clock module. + */ +void nrfx_clock_enable(void); + +/** + * @brief Function for disabling interrupts in the clock module. + */ +void nrfx_clock_disable(void); + +/** + * @brief Function for uninitializing the clock module. + */ +void nrfx_clock_uninit(void); + +/** + * @brief Function for starting the LFCLK. + */ +void nrfx_clock_lfclk_start(void); + +/** + * @brief Function for stoping the LFCLK. + */ +void nrfx_clock_lfclk_stop(void); + +/** + * @brief Function for checking the LFCLK state. + * + * @retval true If the LFCLK is running. + * @retval false If the LFCLK is not running. + */ +__STATIC_INLINE bool nrfx_clock_lfclk_is_running(void); + +/** + * @brief Function for starting the high-accuracy source HFCLK. + */ +void nrfx_clock_hfclk_start(void); + +/** + * @brief Function for stoping external high-accuracy source HFCLK. + */ +void nrfx_clock_hfclk_stop(void); + +/** + * @brief Function for checking the HFCLK state. + * + * @retval true If the HFCLK is running (XTAL source). + * @retval false If the HFCLK is not running. + */ +__STATIC_INLINE bool nrfx_clock_hfclk_is_running(void); + +/** + * @brief Function for starting calibration of internal LFCLK. + * + * This function starts the calibration process. The process cannot be aborted. LFCLK and HFCLK + * must be running before this function is called. + * + * @retval NRFX_SUCCESS If the procedure was successful. + * @retval NRFX_ERROR_INVALID_STATE If the low-frequency of high-frequency clock is off. + * @retval NRFX_ERROR_BUSY If calibration is in progress. + */ +nrfx_err_t nrfx_clock_calibration_start(void); + +/** + * @brief Function for checking if calibration is in progress. + * + * This function indicates that the system is in calibration phase. + * + * @retval NRFX_SUCCESS If the procedure was successful. + * @retval NRFX_ERROR_BUSY If calibration is in progress. + */ +nrfx_err_t nrfx_clock_is_calibrating(void); + +/** + * @brief Function for starting calibration timer. + * @param interval Time after which the CTTO event and interrupt will be generated (in 0.25 s units). + */ +void nrfx_clock_calibration_timer_start(uint8_t interval); + +/** + * @brief Function for stoping calibration timer. + */ +void nrfx_clock_calibration_timer_stop(void); + +/**@brief Function for returning a requested task address for the clock driver module. + * + * @param[in] task One of the peripheral tasks. + * + * @return Task address. + */ +__STATIC_INLINE uint32_t nrfx_clock_ppi_task_addr(nrf_clock_task_t task); + +/**@brief Function for returning a requested event address for the clock driver module. + * + * @param[in] event One of the peripheral events. + * + * @return Event address. + */ +__STATIC_INLINE uint32_t nrfx_clock_ppi_event_addr(nrf_clock_event_t event); + + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION +__STATIC_INLINE uint32_t nrfx_clock_ppi_task_addr(nrf_clock_task_t task) +{ + return nrf_clock_task_address_get(task); +} + +__STATIC_INLINE uint32_t nrfx_clock_ppi_event_addr(nrf_clock_event_t event) +{ + return nrf_clock_event_address_get(event); +} + +__STATIC_INLINE bool nrfx_clock_hfclk_is_running(void) +{ + return nrf_clock_hf_is_running(NRF_CLOCK_HFCLK_HIGH_ACCURACY); +} + +__STATIC_INLINE bool nrfx_clock_lfclk_is_running(void) +{ + return nrf_clock_lf_is_running(); +} +#endif //SUPPRESS_INLINE_IMPLEMENTATION + + +void nrfx_clock_irq_handler(void); + + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_CLOCK_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_comp.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_comp.h new file mode 100644 index 00000000000..8b4ee4400ae --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_comp.h @@ -0,0 +1,247 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_COMP_H__ +#define NRFX_COMP_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_comp COMP driver + * @{ + * @ingroup nrf_comp + * @brief Comparator (COMP) peripheral driver. + */ + +/** + * @brief Macro to convert the threshold voltage to an integer value + * (needed by the COMP_TH register). + * + * @param[in] vol Voltage to be changed to COMP_TH register value. This value + * must not be smaller than reference voltage divided by 64. + * @param[in] ref Reference voltage. + */ +#define NRFX_VOLTAGE_THRESHOLD_TO_INT(vol, ref) \ + (uint8_t)(((vol) > ((ref) / 64)) ? (NRFX_ROUNDED_DIV((vol) * 64,(ref)) - 1) : 0) + +/** + * @brief COMP event handler function type. + * @param[in] event COMP event. + */ +typedef void (* nrfx_comp_event_handler_t)(nrf_comp_event_t event); + +/** @brief COMP shortcut masks. */ +typedef enum +{ + NRFX_COMP_SHORT_STOP_AFTER_CROSS_EVT = COMP_SHORTS_CROSS_STOP_Msk, /*!< Shortcut between the CROSS event and the STOP task. */ + NRFX_COMP_SHORT_STOP_AFTER_UP_EVT = COMP_SHORTS_UP_STOP_Msk, /*!< Shortcut between the UP event and the STOP task. */ + NRFX_COMP_SHORT_STOP_AFTER_DOWN_EVT = COMP_SHORTS_DOWN_STOP_Msk /*!< Shortcut between the DOWN event and the STOP task. */ +} nrfx_comp_short_mask_t; + +/** @brief COMP events masks. */ +typedef enum +{ + NRFX_COMP_EVT_EN_CROSS_MASK = COMP_INTENSET_CROSS_Msk, /*!< CROSS event (generated after VIN+ == VIN-). */ + NRFX_COMP_EVT_EN_UP_MASK = COMP_INTENSET_UP_Msk, /*!< UP event (generated when VIN+ crosses VIN- while increasing). */ + NRFX_COMP_EVT_EN_DOWN_MASK = COMP_INTENSET_DOWN_Msk, /*!< DOWN event (generated when VIN+ crosses VIN- while decreasing). */ + NRFX_COMP_EVT_EN_READY_MASK = COMP_INTENSET_READY_Msk /*!< READY event (generated when the module is ready). */ +} nrfx_comp_evt_en_mask_t; + +/** @brief COMP configuration. */ +typedef struct +{ + nrf_comp_ref_t reference; /**< Reference selection. */ + nrf_comp_ext_ref_t ext_ref; /**< External analog reference selection. */ + nrf_comp_main_mode_t main_mode; /**< Main operation mode. */ + nrf_comp_th_t threshold; /**< Structure holding THDOWN and THUP values needed by the COMP_TH register. */ + nrf_comp_sp_mode_t speed_mode; /**< Speed and power mode. */ + nrf_comp_hyst_t hyst; /**< Comparator hysteresis.*/ +#if defined (COMP_ISOURCE_ISOURCE_Msk) || defined (__NRFX_DOXYGEN__) + nrf_isource_t isource; /**< Current source selected on analog input. */ +#endif + nrf_comp_input_t input; /**< Input to be monitored. */ + uint8_t interrupt_priority; /**< Interrupt priority. */ +} nrfx_comp_config_t; + +/** @brief COMP threshold default configuration. */ +#define NRFX_COMP_CONFIG_TH \ +{ \ + .th_down = NRFX_VOLTAGE_THRESHOLD_TO_INT(0.5, 1.8), \ + .th_up = NRFX_VOLTAGE_THRESHOLD_TO_INT(1.5, 1.8) \ +} + +/** @brief COMP driver default configuration including the COMP HAL configuration. */ +#if defined (COMP_ISOURCE_ISOURCE_Msk) || defined (__NRFX_DOXYGEN__) +#define NRFX_COMP_DEFAULT_CONFIG(_input) \ +{ \ + .reference = (nrf_comp_ref_t)NRFX_COMP_CONFIG_REF, \ + .main_mode = (nrf_comp_main_mode_t)NRFX_COMP_CONFIG_MAIN_MODE, \ + .threshold = NRFX_COMP_CONFIG_TH, \ + .speed_mode = (nrf_comp_sp_mode_t)NRFX_COMP_CONFIG_SPEED_MODE, \ + .hyst = (nrf_comp_hyst_t)NRFX_COMP_CONFIG_HYST, \ + .isource = (nrf_isource_t)NRFX_COMP_CONFIG_ISOURCE, \ + .input = (nrf_comp_input_t)_input, \ + .interrupt_priority = NRFX_COMP_CONFIG_IRQ_PRIORITY \ +} +#else +#define NRFX_COMP_DEFAULT_CONFIG(_input) \ +{ \ + .reference = (nrf_comp_ref_t)NRFX_COMP_CONFIG_REF, \ + .main_mode = (nrf_comp_main_mode_t)NRFX_COMP_CONFIG_MAIN_MODE, \ + .threshold = NRFX_COMP_CONFIG_TH, \ + .speed_mode = (nrf_comp_sp_mode_t)NRFX_COMP_CONFIG_SPEED_MODE, \ + .hyst = (nrf_comp_hyst_t)NRFX_COMP_CONFIG_HYST, \ + .input = (nrf_comp_input_t)_input, \ + .interrupt_priority = NRFX_COMP_CONFIG_IRQ_PRIORITY \ +} +#endif + +/** + * @brief Function for initializing the COMP driver. + * + * This function initializes the COMP driver, but does not enable the peripheral or any interrupts. + * To start the driver, call the function @ref nrfx_comp_start() after initialization. + * + * @param[in] p_config Pointer to the structure with initial configuration. + * @param[in] event_handler Event handler provided by the user. + * Must not be NULL. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_INVALID_STATE If the driver has already been initialized. + * @retval NRFX_ERROR_BUSY If the LPCOMP peripheral is already in use. + * This is possible only if @ref nrfx_prs module + * is enabled. + */ +nrfx_err_t nrfx_comp_init(nrfx_comp_config_t const * p_config, + nrfx_comp_event_handler_t event_handler); + + +/** + * @brief Function for uninitializing the COMP driver. + * + * This function uninitializes the COMP driver. The COMP peripheral and + * its interrupts are disabled, and local variables are cleaned. After this call, you must + * initialize the driver again by calling nrfx_comp_init() if you want to use it. + * + * @sa nrfx_comp_stop() + */ +void nrfx_comp_uninit(void); + +/** + * @brief Function for setting the analog input. + * + * @param[in] psel COMP analog pin selection. + */ +void nrfx_comp_pin_select(nrf_comp_input_t psel); + +/** + * @brief Function for starting the COMP peripheral and interrupts. + * + * Before calling this function, the driver must be initialized. This function + * enables the COMP peripheral and its interrupts. + * + * @param[in] comp_evt_en_mask Mask of events to be enabled. This parameter should be built as + * 'or' of elements from @ref nrfx_comp_evt_en_mask_t. + * @param[in] comp_shorts_mask Mask of shorts to be enabled. This parameter should be built as + * 'or' of elements from @ref nrfx_comp_short_mask_t. + * + * @sa nrfx_comp_init() + * + */ +void nrfx_comp_start(uint32_t comp_evt_en_mask, uint32_t comp_shorts_mask); + +/**@brief Function for stopping the COMP peripheral. + * + * Before calling this function, the driver must be enabled. This function disables the COMP + * peripheral and its interrupts. + * + * @sa nrfx_comp_uninit() + * + */ +void nrfx_comp_stop(void); + +/** + * @brief Function for copying the current state of the comparator result to the RESULT register. + * + * @retval 0 If the input voltage is below the threshold (VIN+ < VIN-). + * @retval 1 If the input voltage is above the threshold (VIN+ > VIN-). + */ +uint32_t nrfx_comp_sample(void); + +/** + * @brief Function for getting the address of a COMP task. + * + * @param[in] task COMP task. + * + * @return Address of the given COMP task. + */ +__STATIC_INLINE uint32_t nrfx_comp_task_address_get(nrf_comp_task_t task) +{ + return (uint32_t)nrf_comp_task_address_get(task); +} + +/** + * @brief Function for getting the address of a COMP event. + * + * @param[in] event COMP event. + * + * @return Address of the given COMP event. + */ +__STATIC_INLINE uint32_t nrfx_comp_event_address_get(nrf_comp_event_t event) +{ + return (uint32_t)nrf_comp_event_address_get(event); +} + + +void nrfx_comp_irq_handler(void); + + +/** @} **/ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_COMP_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_gpiote.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_gpiote.h new file mode 100644 index 00000000000..ee79e6d94f0 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_gpiote.h @@ -0,0 +1,423 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_GPIOTE_H__ +#define NRFX_GPIOTE_H__ + +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_gpiote GPIOTE driver + * @{ + * @ingroup nrf_gpiote + * @brief GPIOTE peripheral driver. + */ + +/**@brief Input pin configuration. */ +typedef struct +{ + nrf_gpiote_polarity_t sense; /**< Transition that triggers interrupt. */ + nrf_gpio_pin_pull_t pull; /**< Pulling mode. */ + bool is_watcher : 1; /**< True when the input pin is tracking an output pin. */ + bool hi_accuracy : 1; /**< True when high accuracy (IN_EVENT) is used. */ + bool skip_gpio_setup : 1; /**< Do not change GPIO configuration */ +} nrfx_gpiote_in_config_t; + +/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect low-to-high transition. + * @details Set hi_accu to true to use IN_EVENT. */ +#define NRFX_GPIOTE_CONFIG_IN_SENSE_LOTOHI(hi_accu) \ + { \ + .is_watcher = false, \ + .hi_accuracy = hi_accu, \ + .pull = NRF_GPIO_PIN_NOPULL, \ + .sense = NRF_GPIOTE_POLARITY_LOTOHI, \ + } + +/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect high-to-low transition. + * @details Set hi_accu to true to use IN_EVENT. */ +#define NRFX_GPIOTE_CONFIG_IN_SENSE_HITOLO(hi_accu) \ + { \ + .is_watcher = false, \ + .hi_accuracy = hi_accu, \ + .pull = NRF_GPIO_PIN_NOPULL, \ + .sense = NRF_GPIOTE_POLARITY_HITOLO, \ + } + +/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect any change on the pin. + * @details Set hi_accu to true to use IN_EVENT.*/ +#define NRFX_GPIOTE_CONFIG_IN_SENSE_TOGGLE(hi_accu) \ + { \ + .is_watcher = false, \ + .hi_accuracy = hi_accu, \ + .pull = NRF_GPIO_PIN_NOPULL, \ + .sense = NRF_GPIOTE_POLARITY_TOGGLE, \ + } + +/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect low-to-high transition. + * @details Set hi_accu to true to use IN_EVENT. + * @note This macro prepares configuration that skips GPIO setup. */ +#define NRFX_GPIOTE_RAW_CONFIG_IN_SENSE_LOTOHI(hi_accu) \ + { \ + .is_watcher = false, \ + .hi_accuracy = hi_accu, \ + .pull = NRF_GPIO_PIN_NOPULL, \ + .sense = NRF_GPIOTE_POLARITY_LOTOHI, \ + .skip_gpio_setup = true, \ + } + +/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect high-to-low transition. + * @details Set hi_accu to true to use IN_EVENT. + * @note This macro prepares configuration that skips GPIO setup. */ +#define NRFX_GPIOTE_RAW_CONFIG_IN_SENSE_HITOLO(hi_accu) \ + { \ + .is_watcher = false, \ + .hi_accuracy = hi_accu, \ + .pull = NRF_GPIO_PIN_NOPULL, \ + .sense = NRF_GPIOTE_POLARITY_HITOLO, \ + .skip_gpio_setup = true, \ + } + +/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect any change on the pin. + * @details Set hi_accu to true to use IN_EVENT. + * @note This macro prepares configuration that skips GPIO setup. */ +#define NRFX_GPIOTE_RAW_CONFIG_IN_SENSE_TOGGLE(hi_accu) \ + { \ + .is_watcher = false, \ + .hi_accuracy = hi_accu, \ + .pull = NRF_GPIO_PIN_NOPULL, \ + .sense = NRF_GPIOTE_POLARITY_TOGGLE, \ + .skip_gpio_setup = true, \ + } + + +/**@brief Output pin configuration. */ +typedef struct +{ + nrf_gpiote_polarity_t action; /**< Configuration of the pin task. */ + nrf_gpiote_outinit_t init_state; /**< Initial state of the output pin. */ + bool task_pin; /**< True if the pin is controlled by a GPIOTE task. */ +} nrfx_gpiote_out_config_t; + +/**@brief Macro for configuring a pin to use as output. GPIOTE is not used for the pin. */ +#define NRFX_GPIOTE_CONFIG_OUT_SIMPLE(init_high) \ + { \ + .init_state = init_high ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW, \ + .task_pin = false, \ + } + +/**@brief Macro for configuring a pin to use the GPIO OUT TASK to change the state from high to low. + * @details The task will clear the pin. Therefore, the pin is set initially. */ +#define NRFX_GPIOTE_CONFIG_OUT_TASK_LOW \ + { \ + .init_state = NRF_GPIOTE_INITIAL_VALUE_HIGH, \ + .task_pin = true, \ + .action = NRF_GPIOTE_POLARITY_HITOLO, \ + } + +/**@brief Macro for configuring a pin to use the GPIO OUT TASK to change the state from low to high. + * @details The task will set the pin. Therefore, the pin is cleared initially. */ +#define NRFX_GPIOTE_CONFIG_OUT_TASK_HIGH \ + { \ + .init_state = NRF_GPIOTE_INITIAL_VALUE_LOW, \ + .task_pin = true, \ + .action = NRF_GPIOTE_POLARITY_LOTOHI, \ + } + +/**@brief Macro for configuring a pin to use the GPIO OUT TASK to toggle the pin state. + * @details The initial pin state must be provided. */ +#define NRFX_GPIOTE_CONFIG_OUT_TASK_TOGGLE(init_high) \ + { \ + .init_state = init_high ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW, \ + .task_pin = true, \ + .action = NRF_GPIOTE_POLARITY_TOGGLE, \ + } + +/** @brief Pin. */ +typedef uint32_t nrfx_gpiote_pin_t; + +/** + * @brief Pin event handler prototype. + * + * @param pin Pin that triggered this event. + * @param action Action that lead to triggering this event. + */ +typedef void (*nrfx_gpiote_evt_handler_t)(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action); + +/** + * @brief Function for initializing the GPIOTE module. + * + * @details Only static configuration is supported to prevent the shared + * resource being customized by the initiator. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_INVALID_STATE If the driver was already initialized. + */ +nrfx_err_t nrfx_gpiote_init(void); + +/** + * @brief Function for checking if the GPIOTE module is initialized. + * + * @details The GPIOTE module is a shared module. Therefore, you should check if + * the module is already initialized and skip initialization if it is. + * + * @retval true If the module is already initialized. + * @retval false If the module is not initialized. + */ +bool nrfx_gpiote_is_init(void); + +/** + * @brief Function for uninitializing the GPIOTE module. + */ +void nrfx_gpiote_uninit(void); + +/** + * @brief Function for initializing a GPIOTE output pin. + * @details The output pin can be controlled by the CPU or by PPI. The initial + * configuration specifies which mode is used. If PPI mode is used, the driver + * attempts to allocate one of the available GPIOTE channels. If no channel is + * available, an error is returned. + * + * @param[in] pin Pin. + * @param[in] p_config Initial configuration. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_INVALID_STATE If the driver is not initialized or the pin is already used. + * @retval NRFX_ERROR_NO_MEM If no GPIOTE channel is available. + */ +nrfx_err_t nrfx_gpiote_out_init(nrfx_gpiote_pin_t pin, + nrfx_gpiote_out_config_t const * p_config); + +/** + * @brief Function for uninitializing a GPIOTE output pin. + * @details The driver frees the GPIOTE channel if the output pin was using one. + * + * @param[in] pin Pin. + */ +void nrfx_gpiote_out_uninit(nrfx_gpiote_pin_t pin); + +/** + * @brief Function for setting a GPIOTE output pin. + * + * @param[in] pin Pin. + */ +void nrfx_gpiote_out_set(nrfx_gpiote_pin_t pin); + +/** + * @brief Function for clearing a GPIOTE output pin. + * + * @param[in] pin Pin. + */ +void nrfx_gpiote_out_clear(nrfx_gpiote_pin_t pin); + +/** + * @brief Function for toggling a GPIOTE output pin. + * + * @param[in] pin Pin. + */ +void nrfx_gpiote_out_toggle(nrfx_gpiote_pin_t pin); + +/** + * @brief Function for enabling a GPIOTE output pin task. + * + * @param[in] pin Pin. + */ +void nrfx_gpiote_out_task_enable(nrfx_gpiote_pin_t pin); + +/** + * @brief Function for disabling a GPIOTE output pin task. + * + * @param[in] pin Pin. + */ +void nrfx_gpiote_out_task_disable(nrfx_gpiote_pin_t pin); + +/** + * @brief Function for getting the address of a configurable GPIOTE task. + * + * @param[in] pin Pin. + * + * @return Address of OUT task. + */ +uint32_t nrfx_gpiote_out_task_addr_get(nrfx_gpiote_pin_t pin); + +#if defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__NRFX_DOXYGEN__) +/** + * @brief Function for getting the address of a configurable GPIOTE task. + * + * @param[in] pin Pin. + * + * @return Address of SET task. + */ +uint32_t nrfx_gpiote_set_task_addr_get(nrfx_gpiote_pin_t pin); +#endif // defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__NRFX_DOXYGEN__) + +#if defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__) +/** + * @brief Function for getting the address of a configurable GPIOTE task. + * + * @param[in] pin Pin. + * + * @return Address of CLR task. + */ +uint32_t nrfx_gpiote_clr_task_addr_get(nrfx_gpiote_pin_t pin); +#endif // defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__) + +/** + * @brief Function for initializing a GPIOTE input pin. + * @details The input pin can act in two ways: + * - lower accuracy but low power (high frequency clock not needed) + * - higher accuracy (high frequency clock required) + * + * The initial configuration specifies which mode is used. + * If high-accuracy mode is used, the driver attempts to allocate one + * of the available GPIOTE channels. If no channel is + * available, an error is returned. + * In low accuracy mode SENSE feature is used. In this case only one active pin + * can be detected at a time. It can be worked around by setting all of the used + * low accuracy pins to toggle mode. + * For more information about SENSE functionality, refer to Product Specification. + * + * @param[in] pin Pin. + * @param[in] p_config Initial configuration. + * @param[in] evt_handler User function to be called when the configured transition occurs. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_INVALID_STATE If the driver is not initialized or the pin is already used. + * @retval NRFX_ERROR_NO_MEM If no GPIOTE channel is available. + */ +nrfx_err_t nrfx_gpiote_in_init(nrfx_gpiote_pin_t pin, + nrfx_gpiote_in_config_t const * p_config, + nrfx_gpiote_evt_handler_t evt_handler); + +/** + * @brief Function for uninitializing a GPIOTE input pin. + * @details The driver frees the GPIOTE channel if the input pin was using one. + * + * @param[in] pin Pin. + */ +void nrfx_gpiote_in_uninit(nrfx_gpiote_pin_t pin); + +/** + * @brief Function for enabling sensing of a GPIOTE input pin. + * + * @details If the input pin is configured as high-accuracy pin, the function + * enables an IN_EVENT. Otherwise, the function enables the GPIO sense mechanism. + * Note that a PORT event is shared between multiple pins, therefore the + * interrupt is always enabled. + * + * @param[in] pin Pin. + * @param[in] int_enable True to enable the interrupt. Always valid for a high-accuracy pin. + */ +void nrfx_gpiote_in_event_enable(nrfx_gpiote_pin_t pin, bool int_enable); + +/** + * @brief Function for disabling a GPIOTE input pin. + * + * @param[in] pin Pin. + */ +void nrfx_gpiote_in_event_disable(nrfx_gpiote_pin_t pin); + +/** + * @brief Function for checking if a GPIOTE input pin is set. + * + * @param[in] pin Pin. + * + * @retval true If the input pin is set. + * @retval false If the input pin is not set. + */ +bool nrfx_gpiote_in_is_set(nrfx_gpiote_pin_t pin); + +/** + * @brief Function for getting the address of a GPIOTE input pin event. + * @details If the pin is configured to use low-accuracy mode, the address of the PORT event is returned. + * + * @param[in] pin Pin. + */ +uint32_t nrfx_gpiote_in_event_addr_get(nrfx_gpiote_pin_t pin); + +/** + * @brief Function for forcing a specific state on the pin configured as task. + * + * @param[in] pin Pin. + * @param[in] state Pin state. + */ +void nrfx_gpiote_out_task_force(nrfx_gpiote_pin_t pin, uint8_t state); + +/** + * @brief Function for triggering the task OUT manually. + * + * @param[in] pin Pin. + */ +void nrfx_gpiote_out_task_trigger(nrfx_gpiote_pin_t pin); + +#if defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__NRFX_DOXYGEN__) +/** + * @brief Function for triggering the task SET manually. + * + * @param[in] pin Pin. + */ +void nrfx_gpiote_set_task_trigger(nrfx_gpiote_pin_t pin); +#endif // defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__NRFX_DOXYGEN__) + +#if defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__) +/** + * @brief Function for triggering the task CLR manually. + * + * @param[in] pin Pin. + */ +void nrfx_gpiote_clr_task_trigger(nrfx_gpiote_pin_t pin); +#endif // defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__) + + +void nrfx_gpiote_irq_handler(void); + + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_GPIOTE_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_i2s.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_i2s.h new file mode 100644 index 00000000000..f64fa210cf1 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_i2s.h @@ -0,0 +1,254 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_I2S_H__ +#define NRFX_I2S_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_i2s I2S driver + * @{ + * @ingroup nrf_i2s + * @brief Inter-IC Sound (I2S) peripheral driver. + */ + + +/** + * @brief This value can be provided instead of a pin number for the signals + * SDOUT, SDIN, and MCK to specify that a given signal is not used + * and therefore does not need to be connected to a pin. + */ +#define NRFX_I2S_PIN_NOT_USED 0xFF + +/** @brief I2S driver configuration structure. */ +typedef struct +{ + uint8_t sck_pin; ///< SCK pin number. + uint8_t lrck_pin; ///< LRCK pin number. + uint8_t mck_pin; ///< MCK pin number. + /**< Optional. Use @ref NRFX_I2S_PIN_NOT_USED + * if this signal is not needed. */ + uint8_t sdout_pin; ///< SDOUT pin number. + /**< Optional. Use @ref NRFX_I2S_PIN_NOT_USED + * if this signal is not needed. */ + uint8_t sdin_pin; ///< SDIN pin number. + /**< Optional. Use @ref NRFX_I2S_PIN_NOT_USED + * if this signal is not needed. */ + uint8_t irq_priority; ///< Interrupt priority. + + nrf_i2s_mode_t mode; ///< Mode of operation. + nrf_i2s_format_t format; ///< Frame format. + nrf_i2s_align_t alignment; ///< Alignment of sample within a frame. + nrf_i2s_swidth_t sample_width; ///< Sample width. + nrf_i2s_channels_t channels; ///< Enabled channels. + nrf_i2s_mck_t mck_setup; ///< Master clock setup. + nrf_i2s_ratio_t ratio; ///< MCK/LRCK ratio. +} nrfx_i2s_config_t; + +/** @brief I2S driver buffers structure. */ +typedef struct +{ + uint32_t * p_rx_buffer; + uint32_t const * p_tx_buffer; +} nrfx_i2s_buffers_t; + +/** + * @brief I2S driver default configuration. + */ +#define NRFX_I2S_DEFAULT_CONFIG \ +{ \ + .sck_pin = NRFX_I2S_CONFIG_SCK_PIN, \ + .lrck_pin = NRFX_I2S_CONFIG_LRCK_PIN, \ + .mck_pin = NRFX_I2S_CONFIG_MCK_PIN, \ + .sdout_pin = NRFX_I2S_CONFIG_SDOUT_PIN, \ + .sdin_pin = NRFX_I2S_CONFIG_SDIN_PIN, \ + .irq_priority = NRFX_I2S_CONFIG_IRQ_PRIORITY, \ + .mode = (nrf_i2s_mode_t)NRFX_I2S_CONFIG_MASTER, \ + .format = (nrf_i2s_format_t)NRFX_I2S_CONFIG_FORMAT, \ + .alignment = (nrf_i2s_align_t)NRFX_I2S_CONFIG_ALIGN, \ + .sample_width = (nrf_i2s_swidth_t)NRFX_I2S_CONFIG_SWIDTH, \ + .channels = (nrf_i2s_channels_t)NRFX_I2S_CONFIG_CHANNELS, \ + .mck_setup = (nrf_i2s_mck_t)NRFX_I2S_CONFIG_MCK_SETUP, \ + .ratio = (nrf_i2s_ratio_t)NRFX_I2S_CONFIG_RATIO, \ +} + + +#define NRFX_I2S_STATUS_NEXT_BUFFERS_NEEDED (1UL << 0) + /**< The application should provide buffers that are to be used in the next + * part of the transfer. A call to @ref nrfx_i2s_next_buffers_set should + * be done before the currently used buffers are completely processed + * (i.e. the time remaining for supplying the next buffers depends on + * the used size of the buffers). */ + +/** + * @brief I2S driver data handler type. + * + * A data handling function of this type must be specified during initialization + * of the driver. The driver will call this function when it finishes using + * buffers passed to it by the application, and when it needs to be provided + * with buffers for the next part of the transfer. + * + * @note The @c p_released pointer passed to this function is temporary and + * will be invalid after the function returns, hence it cannot be stored + * and used later. If needed, the pointed content (i.e. buffers pointers) + * should be copied instead. + * + * @param[in] p_released Pointer to a structure with pointers to buffers + * passed previously to the driver that will no longer + * be access by it (they can be now safely released or + * used for another purpose, in particular for a next + * part of the transfer). + * This pointer will be NULL if the application did not + * supply the buffers for the next part of the transfer + * (via a call to @ref nrfx_i2s_next_buffers_set) since + * the previous time the data handler signaled such need. + * This means that data corruption occurred (the previous + * buffers are used for the second time) and no buffers + * can be released at the moment. + * Both pointers in this structure are NULL when the + * handler is called for the first time after a transfer + * is started, because no data has been transferred yet + * at this point. In all successive calls the pointers + * specify what has been sent (TX) and what has been + * received (RX) in the part of transfer that has just + * been completed (provided that a given direction is + * enabled, see @ref nrfx_i2s_start). + * @param[in] status Bit field describing the current status of the transfer. + * It can be 0 or a combination of the following flags: + * - @ref NRFX_I2S_STATUS_NEXT_BUFFERS_NEEDED + */ +typedef void (* nrfx_i2s_data_handler_t)(nrfx_i2s_buffers_t const * p_released, + uint32_t status); + + +/** + * @brief Function for initializing the I2S driver. + * + * @param[in] p_config Pointer to the structure with initial configuration. + * @param[in] handler Data handler provided by the user. Must not be NULL. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_INVALID_STATE If the driver was already initialized. + * @retval NRFX_ERROR_INVALID_PARAM If the requested combination of configuration + * options is not allowed by the I2S peripheral. + */ +nrfx_err_t nrfx_i2s_init(nrfx_i2s_config_t const * p_config, + nrfx_i2s_data_handler_t handler); + +/** @brief Function for uninitializing the I2S driver. */ +void nrfx_i2s_uninit(void); + +/** + * @brief Function for starting the continuous I2S transfer. + * + * The I2S data transfer can be performed in one of three modes: RX (reception) + * only, TX (transmission) only, or in both directions simultaneously. + * The mode is selected by specifying a proper buffer for a given direction + * in the call to this function or by passing NULL instead if this direction + * should be disabled. + * + * The length of the buffer (which is a common value for RX and TX if both + * directions are enabled) is specified in 32-bit words. One 32-bit memory + * word can either contain four 8-bit samples, two 16-bit samples, or one + * right-aligned 24-bit sample sign-extended to a 32-bit value. + * For a detailed memory mapping for different supported configurations, + * see the @linkProductSpecification52. + * + * @note Peripherals using EasyDMA (including I2S) require the transfer buffers + * to be placed in the Data RAM region. If this condition is not met, + * this function will fail with the error code NRFX_ERROR_INVALID_ADDR. + * + * @param[in] p_initial_buffers Pointer to a structure specifying the buffers + * to be used in the initial part of the transfer + * (buffers for all consecutive parts are provided + * through the data handler). + * @param[in] buffer_size Size of the buffers (in 32-bit words). + * Must not be 0. + * @param[in] flags Transfer options (0 for default settings). + * Currently, no additional flags are available. + * + * @retval NRFX_SUCCESS If the operation was successful. + * @retval NRFX_ERROR_INVALID_STATE If a transfer was already started or + * the driver has not been initialized. + * @retval NRFX_ERROR_INVALID_ADDR If the provided buffers are not placed + * in the Data RAM region. + */ +nrfx_err_t nrfx_i2s_start(nrfx_i2s_buffers_t const * p_initial_buffers, + uint16_t buffer_size, + uint8_t flags); + +/** + * @brief Function for supplying the buffers to be used in the next part of + * the transfer. + * + * The application should call this function when the data handler receives + * @ref NRFX_I2S_STATUS_NEXT_BUFFERS_NEEDED in the @c status parameter. + * The call can be done immediately from the data handler function or later, + * but it has to be done before the I2S peripheral finishes processing the + * buffers supplied previously. Otherwise, data corruption will occur. + * + * @sa nrfx_i2s_data_handler_t + * + * @retval NRFX_SUCCESS If the operation was successful. + * @retval NRFX_ERROR_INVALID_STATE If the buffers were already supplied or + * the peripheral is currently being stopped. + */ +nrfx_err_t nrfx_i2s_next_buffers_set(nrfx_i2s_buffers_t const * p_buffers); + +/** @brief Function for stopping the I2S transfer. */ +void nrfx_i2s_stop(void); + +/** @} */ + + +void nrfx_i2s_irq_handler(void); + + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_I2S_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_lpcomp.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_lpcomp.h new file mode 100644 index 00000000000..f6744a332aa --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_lpcomp.h @@ -0,0 +1,150 @@ +/** + * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_LPCOMP_H__ +#define NRFX_LPCOMP_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_lpcomp LPCOMP driver + * @{ + * @ingroup nrf_lpcomp + * @brief Low Power Comparator (LPCOMP) peripheral driver. + */ + +/** + * @brief LPCOMP event handler function type. + * @param[in] event LPCOMP event. + */ +typedef void (* nrfx_lpcomp_event_handler_t)(nrf_lpcomp_event_t event); + +/** @brief LPCOMP configuration. */ +typedef struct +{ + nrf_lpcomp_config_t hal; /**< LPCOMP HAL configuration. */ + nrf_lpcomp_input_t input; /**< Input to be monitored. */ + uint8_t interrupt_priority; /**< LPCOMP interrupt priority. */ +} nrfx_lpcomp_config_t; + +/** @brief LPCOMP driver default configuration including the LPCOMP HAL configuration. */ +#ifdef NRF52_SERIES +#define NRFX_LPCOMP_DEFAULT_CONFIG \ + { \ + .hal = { (nrf_lpcomp_ref_t)NRFX_LPCOMP_CONFIG_REFERENCE , \ + (nrf_lpcomp_detect_t)NRFX_LPCOMP_CONFIG_DETECTION, \ + (nrf_lpcomp_hysteresis_t)NRFX_LPCOMP_CONFIG_HYST }, \ + .input = (nrf_lpcomp_input_t)NRFX_LPCOMP_CONFIG_INPUT, \ + .interrupt_priority = NRFX_LPCOMP_CONFIG_IRQ_PRIORITY \ + } +#else +#define NRFX_LPCOMP_DEFAULT_CONFIG \ + { \ + .hal = { (nrf_lpcomp_ref_t)NRFX_LPCOMP_CONFIG_REFERENCE , \ + (nrf_lpcomp_detect_t)NRFX_LPCOMP_CONFIG_DETECTION }, \ + .input = (nrf_lpcomp_input_t)NRFX_LPCOMP_CONFIG_INPUT, \ + .interrupt_priority = NRFX_LPCOMP_CONFIG_IRQ_PRIORITY \ + } +#endif + +/** + * @brief Function for initializing the LPCOMP driver. + * + * This function initializes the LPCOMP driver, but does not enable the peripheral or any interrupts. + * To start the driver, call the function nrfx_lpcomp_enable() after initialization. + * + * @param[in] p_config Pointer to the structure with initial configuration. + * @param[in] event_handler Event handler provided by the user. + * Must not be NULL. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_INVALID_STATE If the driver has already been initialized. + * @retval NRFX_ERROR_BUSY If the COMP peripheral is already in use. + * This is possible only if @ref nrfx_prs module + * is enabled. + */ +nrfx_err_t nrfx_lpcomp_init(nrfx_lpcomp_config_t const * p_config, + nrfx_lpcomp_event_handler_t event_handler); + +/** + * @brief Function for uninitializing the LCOMP driver. + * + * This function uninitializes the LPCOMP driver. The LPCOMP peripheral and + * its interrupts are disabled, and local variables are cleaned. After this call, you must + * initialize the driver again by calling nrfx_lpcomp_init() if you want to use it. + * + * @sa nrfx_lpcomp_disable() + * @sa nrfx_lpcomp_init() + */ +void nrfx_lpcomp_uninit(void); + +/**@brief Function for enabling the LPCOMP peripheral and interrupts. + * + * Before calling this function, the driver must be initialized. This function + * enables the LPCOMP peripheral and its interrupts. + * + * @sa nrfx_lpcomp_disable() + */ +void nrfx_lpcomp_enable(void); + +/**@brief Function for disabling the LPCOMP peripheral. + * + * Before calling this function, the driver must be initialized. This function disables the LPCOMP + * peripheral and its interrupts. + * + * @sa nrfx_lpcomp_enable() + */ +void nrfx_lpcomp_disable(void); + + +void nrfx_lpcomp_irq_handler(void); + +/** @} **/ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_LPCOMP_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_pdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_pdm.h new file mode 100644 index 00000000000..f2201c97fd5 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_pdm.h @@ -0,0 +1,214 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_PDM_H__ +#define NRFX_PDM_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_pdm PDM driver + * @{ + * @ingroup nrf_pdm + * @brief Pulse Density Modulation (PDM) peripheral driver. + */ + + +#define NRFX_PDM_MAX_BUFFER_SIZE 32767 + + +/** + * @brief PDM error type. + */ +typedef enum +{ + NRFX_PDM_NO_ERROR = 0, + NRFX_PDM_ERROR_OVERFLOW = 1 +} nrfx_pdm_error_t; + +/** + * @brief PDM event structure. + */ +typedef struct +{ + bool buffer_requested; ///< Buffer request flag. + int16_t * buffer_released; ///< Pointer to the released buffer. Can be NULL. + nrfx_pdm_error_t error; ///< Error type. +} nrfx_pdm_evt_t; + +/** + * @brief PDM interface driver configuration structure. + */ +typedef struct +{ + nrf_pdm_mode_t mode; ///< Interface operation mode. + nrf_pdm_edge_t edge; ///< Sampling mode. + uint8_t pin_clk; ///< CLK pin. + uint8_t pin_din; ///< DIN pin. + nrf_pdm_freq_t clock_freq; ///< Clock frequency. + nrf_pdm_gain_t gain_l; ///< Left channel gain. + nrf_pdm_gain_t gain_r; ///< Right channel gain. + uint8_t interrupt_priority; ///< Interrupt priority. +} nrfx_pdm_config_t; + +/** + * @brief Macro for setting @ref nrfx_pdm_config_t to default settings + * in single ended mode. + * + * @param _pin_clk CLK output pin. + * @param _pin_din DIN input pin. + */ +#define NRFX_PDM_DEFAULT_CONFIG(_pin_clk, _pin_din) \ +{ \ + .mode = (nrf_pdm_mode_t)NRFX_PDM_CONFIG_MODE, \ + .edge = (nrf_pdm_edge_t)NRFX_PDM_CONFIG_EDGE, \ + .pin_clk = _pin_clk, \ + .pin_din = _pin_din, \ + .clock_freq = (nrf_pdm_freq_t)NRFX_PDM_CONFIG_CLOCK_FREQ, \ + .gain_l = NRF_PDM_GAIN_DEFAULT, \ + .gain_r = NRF_PDM_GAIN_DEFAULT, \ + .interrupt_priority = NRFX_PDM_CONFIG_IRQ_PRIORITY \ +} + +/** + * @brief Handler for PDM interface ready events. + * + * This event handler is called on a buffer request, an error or when a buffer + * is full and ready to be processed. + * + * @param[in] p_evt Pointer to the PDM event structure. + */ +typedef void (*nrfx_pdm_event_handler_t)(nrfx_pdm_evt_t const * const p_evt); + + +/** + * @brief Function for initializing the PDM interface. + * + * @param[in] p_config Pointer to the structure with initial configuration. + * @param[in] event_handler Event handler provided by the user. Cannot be NULL. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_INVALID_STATE If the driver is already initialized. + * @retval NRFX_ERROR_INVALID_PARAM If invalid configuration was specified. + */ +nrfx_err_t nrfx_pdm_init(nrfx_pdm_config_t const * p_config, + nrfx_pdm_event_handler_t event_handler); + +/** + * @brief Function for uninitializing the PDM interface. + * + * This function stops PDM sampling, if it is in progress. + */ +void nrfx_pdm_uninit(void); + +/** + * @brief Function for getting the address of a PDM interface task. + * + * @param[in] task Task. + * + * @return Task address. + */ +__STATIC_INLINE uint32_t nrfx_pdm_task_address_get(nrf_pdm_task_t task) +{ + return nrf_pdm_task_address_get(task); +} + +/** + * @brief Function for getting the state of the PDM interface. + * + * @retval true If the PDM interface is enabled. + * @retval false If the PDM interface is disabled. + */ +__STATIC_INLINE bool nrfx_pdm_enable_check(void) +{ + return nrf_pdm_enable_check(); +} + +/** + * @brief Function for starting PDM sampling. + * + * @retval NRFX_SUCCESS If sampling was started successfully or was already in progress. + * @retval NRFX_ERROR_BUSY If a previous start/stop operation is in progress. + */ +nrfx_err_t nrfx_pdm_start(void); + +/** + * @brief Function for stopping PDM sampling. + * + * When this function is called, the PDM interface is stopped after finishing + * the current frame. + * The event handler function might be called once more after calling this function. + * + * @retval NRFX_SUCCESS If sampling was stopped successfully or was already stopped before. + * @retval NRFX_ERROR_BUSY If a previous start/stop operation is in progress. + */ +nrfx_err_t nrfx_pdm_stop(void); + +/** + * @brief Function for supplying the sample buffer. + * + * Call this function after every buffer request event. + * + * @param[in] buffer Pointer to the receive buffer. Cannot be NULL. + * @param[in] buffer_length Length of the receive buffer in 16-bit words. + * + * @retval NRFX_SUCCESS If the buffer was applied successfully. + * @retval NRFX_ERROR_BUSY If the buffer was already supplied or the peripheral is currently being stopped. + * @retval NRFX_ERROR_INVALID_STATE If the driver was not initialized. + * @retval NRFX_ERROR_INVALID_PARAM If invalid parameters were provided. + */ +nrfx_err_t nrfx_pdm_buffer_set(int16_t * buffer, uint16_t buffer_length); + + +void nrfx_pdm_irq_handler(void); + + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_PDM_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_power.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_power.h new file mode 100644 index 00000000000..c7bac84d375 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_power.h @@ -0,0 +1,382 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_POWER_H__ +#define NRFX_POWER_H__ + +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_power POWER driver + * @{ + * @ingroup nrf_power + * @brief POWER peripheral driver. + */ + +/** + * @brief Power mode possible configurations + */ +typedef enum +{ + NRFX_POWER_MODE_CONSTLAT, /**< Constant latency mode */ + NRFX_POWER_MODE_LOWPWR /**< Low power mode */ +}nrfx_power_mode_t; + +#if NRF_POWER_HAS_SLEEPEVT || defined(__NRFX_DOXYGEN__) +/** + * @brief Events from power system + */ +typedef enum +{ + NRFX_POWER_SLEEP_EVT_ENTER, /**< CPU entered WFI/WFE sleep + * + * Keep in mind that if this interrupt is enabled, + * it means that CPU was waken up just after WFI by this interrupt. + */ + NRFX_POWER_SLEEP_EVT_EXIT /**< CPU exited WFI/WFE sleep */ +}nrfx_power_sleep_evt_t; +#endif /* NRF_POWER_HAS_SLEEPEVT */ + +#if NRF_POWER_HAS_USBREG || defined(__NRFX_DOXYGEN__) +/** + * @brief Events from USB power system + */ +typedef enum +{ + NRFX_POWER_USB_EVT_DETECTED, /**< USB power detected on the connector (plugged in). */ + NRFX_POWER_USB_EVT_REMOVED, /**< USB power removed from the connector. */ + NRFX_POWER_USB_EVT_READY /**< USB power regulator ready. */ +}nrfx_power_usb_evt_t; + +/** + * @brief USB power state + * + * The single enumerator that holds all data about current state of USB + * related POWER. + * + * Organized this way that higher power state has higher numeric value + */ +typedef enum +{ + NRFX_POWER_USB_STATE_DISCONNECTED, /**< No power on USB lines detected */ + NRFX_POWER_USB_STATE_CONNECTED, /**< The USB power is detected, but USB power regulator is not ready */ + NRFX_POWER_USB_STATE_READY /**< From the power point of view USB is ready for working */ +}nrfx_power_usb_state_t; +#endif /* NRF_POWER_HAS_USBREG */ + +/** + * @name Callback types + * + * Defined types of callback functions + * @{ + */ +/** + * @brief Event handler for power failure warning + */ +typedef void (*nrfx_power_pofwarn_event_handler_t)(void); + +#if NRF_POWER_HAS_SLEEPEVT || defined(__NRFX_DOXYGEN__) +/** + * @brief Event handler for entering/exiting sleep + * + * @param event Event type + */ +typedef void (*nrfx_power_sleep_event_handler_t)(nrfx_power_sleep_evt_t event); +#endif + +#if NRF_POWER_HAS_USBREG || defined(__NRFX_DOXYGEN__) +/** + * @brief Event handler for USB related power events + * + * @param event Event type + */ +typedef void (*nrfx_power_usb_event_handler_t)(nrfx_power_usb_evt_t event); +#endif +/** @} */ + +/** + * @brief General power configuration + * + * Parameters required to initialize power driver. + */ +typedef struct +{ + /** + * @brief Enable main DCDC regulator + * + * This bit only informs the driver that elements for DCDC regulator + * are installed and regulator can be used. + * The regulator would be enabled or disabled automatically + * by the hardware, basing on current power requirement. + */ + bool dcdcen:1; + +#if NRF_POWER_HAS_VDDH || defined(__NRFX_DOXYGEN__) + /** + * @brief Enable HV DCDC regulator + * + * This bit only informs the driver that elements for DCDC regulator + * are installed and regulator can be used. + * The regulator would be enabled or disabled automatically + * by the hardware, basing on current power requirement. + */ + bool dcdcenhv: 1; +#endif +}nrfx_power_config_t; + +/** + * @brief The configuration for power failure comparator + * + * Configuration used to enable and configure power failure comparator + */ +typedef struct +{ + nrfx_power_pofwarn_event_handler_t handler; //!< Event handler + nrf_power_pof_thr_t thr; //!< Threshold for power failure detection +#if NRF_POWER_HAS_VDDH || defined(__NRFX_DOXYGEN__) + nrf_power_pof_thrvddh_t thrvddh; //!< Threshold for power failure detection on VDDH pin +#endif +}nrfx_power_pofwarn_config_t; + +#if NRF_POWER_HAS_SLEEPEVT || defined(__NRFX_DOXYGEN__) +/** + * @brief The configuration of sleep event processing + * + * Configuration used to enable and configure sleep event handling + */ +typedef struct +{ + nrfx_power_sleep_event_handler_t handler; //!< Event handler + bool en_enter:1; //!< Enable event on sleep entering + bool en_exit :1; //!< Enable event on sleep exiting +}nrfx_power_sleepevt_config_t; +#endif + +#if NRF_POWER_HAS_USBREG || defined(__NRFX_DOXYGEN__) +/** + * @brief The configuration of USB related power events + * + * Configuration used to enable and configure USB power event handling + */ +typedef struct +{ + nrfx_power_usb_event_handler_t handler; //!< Event processing +}nrfx_power_usbevt_config_t; +#endif /* NRF_POWER_HAS_USBREG */ + +/** + * @brief Function for getting the handler of the power failure comparator. + * @return Handler of the power failure comparator. + */ +nrfx_power_pofwarn_event_handler_t nrfx_power_pof_handler_get(void); + +#if NRF_POWER_HAS_USBREG || defined(__NRFX_DOXYGEN__) +/** + * @brief Function for getting the handler of the USB power. + * @return Handler of the USB power. + */ +nrfx_power_usb_event_handler_t nrfx_power_usb_handler_get(void); +#endif + +/** + * @brief Initialize power module driver + * + * Enabled power module driver would process all the interrupts from power system. + * + * @param[in] p_config Pointer to the structure with initial configuration. + * + * @retval NRFX_SUCCESS Successfully initialized. + * @retval NRFX_ERROR_ALREADY_INITIALIZED Module was already initialized. + */ +nrfx_err_t nrfx_power_init(nrfx_power_config_t const * p_config); + +/** + * @brief Unintialize power module driver + * + * Disables all the interrupt handling in the module. + * + * @sa nrfx_power_init + */ +void nrfx_power_uninit(void); + +/** + * @brief Initialize power failure comparator + * + * Configures the power failure comparator. This function does not setup and enable it. + * Those steps can be done with functions @ref nrfx_power_pof_enable and @ref nrfx_power_pof_disable + * or with Softdevice API (when Softdevice is using). + * + * @param[in] p_config Configuration with values and event handler. + * If event handler is set to NULL, interrupt would be disabled. + */ +void nrfx_power_pof_init(nrfx_power_pofwarn_config_t const * p_config); + +/** + * @brief Enable power failure comparator + * Sets and enables interrupt of the power failure comparator. This functions cannot be using + * when Softdevice is enabled. If event handler set in init function is set to NULL, interrupt + * would be disabled. + * + * @param[in] p_config Configuration with values and event handler. + */ +void nrfx_power_pof_enable(nrfx_power_pofwarn_config_t const * p_config); + +/** + * @brief Disable the power failure comparator + * + * Disables the power failure comparator interrupt. + */ +void nrfx_power_pof_disable(void); + +/** + * @brief Clear the power failure comparator settings + * + * Clears the settings of the power failure comparator. + */ +void nrfx_power_pof_uninit(void); + +#if NRF_POWER_HAS_SLEEPEVT || defined(__NRFX_DOXYGEN__) +/** + * @brief Initialize sleep entering and exiting events processing + * + * Configures and setups the sleep event processing. + * + * @param[in] p_config Configuration with values and event handler. + * + * @sa nrfx_power_sleepevt_uninit + * + */ +void nrfx_power_sleepevt_init(nrfx_power_sleepevt_config_t const * p_config); + +/** + * @brief Enable sleep entering and exiting events processing + * + * @param[in] p_config Configuration with values and event handler. + */ +void nrfx_power_sleepevt_enable(nrfx_power_sleepevt_config_t const * p_config); + +/** + * @brief Disable sleep entering and exiting events processing + */ +void nrfx_power_sleepevt_disable(void); + +/** + * @brief Uninitialize sleep entering and exiting events processing + * + * @sa nrfx_power_sleepevt_init + */ +void nrfx_power_sleepevt_uninit(void); +#endif /* NRF_POWER_HAS_SLEEPEVT */ + +#if NRF_POWER_HAS_USBREG || defined(__NRFX_DOXYGEN__) +/** + * @brief Initialize USB power event processing + * + * Configures and setups the USB power event processing. + * + * @param[in] p_config Configuration with values and event handler. + * + * @sa nrfx_power_usbevt_uninit + */ +void nrfx_power_usbevt_init(nrfx_power_usbevt_config_t const * p_config); + +/** + * @brief Enable USB power event processing + */ +void nrfx_power_usbevt_enable(void); + +/** + * @brief Disable USB power event processing + */ +void nrfx_power_usbevt_disable(void); + +/** + * @brief Uninitalize USB power event processing + * + * @sa nrfx_power_usbevt_init + */ +void nrfx_power_usbevt_uninit(void); + +/** + * @brief Get the status of USB power + * + * @return Current USB power status + */ +__STATIC_INLINE nrfx_power_usb_state_t nrfx_power_usbstatus_get(void); + +#endif /* NRF_POWER_HAS_USBREG */ + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +#if NRF_POWER_HAS_USBREG +__STATIC_INLINE nrfx_power_usb_state_t nrfx_power_usbstatus_get(void) +{ + uint32_t status = nrf_power_usbregstatus_get(); + if(0 == (status & NRF_POWER_USBREGSTATUS_VBUSDETECT_MASK)) + { + return NRFX_POWER_USB_STATE_DISCONNECTED; + } + if(0 == (status & NRF_POWER_USBREGSTATUS_OUTPUTRDY_MASK)) + { + return NRFX_POWER_USB_STATE_CONNECTED; + } + return NRFX_POWER_USB_STATE_READY; +} +#endif /* NRF_POWER_HAS_USBREG */ + +#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ + + +void nrfx_power_irq_handler(void); + + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* NRFX_POWER_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_power_clock.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_power_clock.h new file mode 100644 index 00000000000..c63dbcf473d --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_power_clock.h @@ -0,0 +1,90 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_POWER_CLOCK_H__ +#define NRFX_POWER_CLOCK_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + + +__STATIC_INLINE void nrfx_power_clock_irq_init(void); + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION +__STATIC_INLINE void nrfx_power_clock_irq_init(void) +{ + uint8_t priority; +#if NRFX_CHECK(NRFX_POWER_ENABLED) && NRFX_CHECK(NRFX_CLOCK_ENABLED) + #if NRFX_POWER_CONFIG_IRQ_PRIORITY != NRFX_CLOCK_CONFIG_IRQ_PRIORITY + #error "IRQ priority for POWER and CLOCK have to be the same. Check ." + #endif + priority = NRFX_POWER_CONFIG_IRQ_PRIORITY; +#elif NRFX_CHECK(NRFX_POWER_ENABLED) + priority = NRFX_POWER_CONFIG_IRQ_PRIORITY; +#elif NRFX_CHECK(NRFX_CLOCK_ENABLED) + priority = NRFX_CLOCK_CONFIG_IRQ_PRIORITY; +#endif + + if (!NRFX_IRQ_IS_ENABLED(POWER_CLOCK_IRQn)) + { + NRFX_IRQ_PRIORITY_SET(POWER_CLOCK_IRQn, priority); + NRFX_IRQ_ENABLE(POWER_CLOCK_IRQn); + } +} +#endif // SUPPRESS_INLINE_IMPLEMENTATION + + +#if NRFX_CHECK(NRFX_POWER_ENABLED) && NRFX_CHECK(NRFX_CLOCK_ENABLED) +void nrfx_power_clock_irq_handler(void); +#elif NRFX_CHECK(NRFX_POWER_ENABLED) +#define nrfx_power_irq_handler nrfx_power_clock_irq_handler +#elif NRFX_CHECK(NRFX_CLOCK_ENABLED) +#define nrfx_clock_irq_handler nrfx_power_clock_irq_handler +#endif + + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_POWER_CLOCK_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_ppi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_ppi.h new file mode 100644 index 00000000000..f7b9b24d42a --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_ppi.h @@ -0,0 +1,327 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_PPI_H__ +#define NRFX_PPI_H__ + +#include +#include + +/** + * @defgroup nrfx_ppi PPI allocator + * @{ + * @ingroup nrf_ppi + * @brief Programmable Peripheral Interconnect (PPI) allocator. + */ + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef NRFX_PPI_CHANNELS_USED +#define NRFX_PPI_CHANNELS_USED 0 +#endif + +#ifndef NRFX_PPI_GROUPS_USED +#define NRFX_PPI_GROUPS_USED 0 +#endif + +#if PPI_CH_NUM > 16 +#define NRFX_PPI_ALL_APP_CHANNELS_MASK ((uint32_t)0xFFFFFFFFuL & ~(NRFX_PPI_CHANNELS_USED)) /**< All PPI channels available to the application. */ +#define NRFX_PPI_PROG_APP_CHANNELS_MASK ((uint32_t)0x000FFFFFuL & ~(NRFX_PPI_CHANNELS_USED)) /**< Programmable PPI channels available to the application. */ +#else +#define NRFX_PPI_ALL_APP_CHANNELS_MASK ((uint32_t)0xFFF0FFFFuL & ~(NRFX_PPI_CHANNELS_USED)) /**< All PPI channels available to the application. */ +#define NRFX_PPI_PROG_APP_CHANNELS_MASK ((uint32_t)0x0000FFFFuL & ~(NRFX_PPI_CHANNELS_USED)) /**< Programmable PPI channels available to the application. */ +#endif + +#define NRFX_PPI_ALL_APP_GROUPS_MASK (((1uL << PPI_GROUP_NUM) - 1) & ~(NRFX_PPI_GROUPS_USED)) /**< All PPI groups available to the application. */ + +/** + * @brief Function for uninitializing the PPI module. + * + * This function disables all channels and clears the channel groups. + */ +void nrfx_ppi_free_all(void); + +/** + * @brief Function for allocating a PPI channel. + * @details This function allocates the first unused PPI channel. + * + * @param[out] p_channel Pointer to the PPI channel that has been allocated. + * + * @retval NRFX_SUCCESS If the channel was successfully allocated. + * @retval NRFX_ERROR_NO_MEM If there is no available channel to be used. + */ +nrfx_err_t nrfx_ppi_channel_alloc(nrf_ppi_channel_t * p_channel); + +/** + * @brief Function for freeing a PPI channel. + * @details This function also disables the chosen channel. + * + * @param[in] channel PPI channel to be freed. + * + * @retval NRFX_SUCCESS If the channel was successfully freed. + * @retval NRFX_ERROR_INVALID_PARAM If the channel is not user-configurable. + */ +nrfx_err_t nrfx_ppi_channel_free(nrf_ppi_channel_t channel); + +/** + * @brief Function for assigning task and event endpoints to the PPI channel. + * + * @param[in] channel PPI channel to be assigned endpoints. + * @param[in] eep Event endpoint address. + * @param[in] tep Task endpoint address. + * + * @retval NRFX_SUCCESS If the channel was successfully assigned. + * @retval NRFX_ERROR_INVALID_STATE If the channel is not allocated for the user. + * @retval NRFX_ERROR_INVALID_PARAM If the channel is not user-configurable. + */ +nrfx_err_t nrfx_ppi_channel_assign(nrf_ppi_channel_t channel, uint32_t eep, uint32_t tep); + +/** + * @brief Function for assigning or clearing fork endpoint to the PPI channel. + * + * @param[in] channel PPI channel to be assigned endpoints. + * @param[in] fork_tep Fork task endpoint address or 0 to clear. + * + * @retval NRFX_SUCCESS If the channel was successfully assigned. + * @retval NRFX_ERROR_INVALID_STATE If the channel is not allocated for the user. + * @retval NRFX_ERROR_INVALID_PARAM If the channel is not user-configurable. + * @retval NRFX_ERROR_NOT_SUPPORTED If function is not supported. + */ +nrfx_err_t nrfx_ppi_channel_fork_assign(nrf_ppi_channel_t channel, uint32_t fork_tep); + +/** + * @brief Function for enabling a PPI channel. + * + * @param[in] channel PPI channel to be enabled. + * + * @retval NRFX_SUCCESS If the channel was successfully enabled. + * @retval NRFX_ERROR_INVALID_STATE If the user-configurable channel is not allocated. + * @retval NRFX_ERROR_INVALID_PARAM If the channel cannot be enabled by the user. + */ +nrfx_err_t nrfx_ppi_channel_enable(nrf_ppi_channel_t channel); + +/** + * @brief Function for disabling a PPI channel. + * + * @param[in] channel PPI channel to be disabled. + * + * @retval NRFX_SUCCESS If the channel was successfully disabled. + * @retval NRFX_ERROR_INVALID_STATE If the user-configurable channel is not allocated. + * @retval NRFX_ERROR_INVALID_PARAM If the channel cannot be disabled by the user. + */ +nrfx_err_t nrfx_ppi_channel_disable(nrf_ppi_channel_t channel); + +/** + * @brief Function for allocating a PPI channel group. + * @details This function allocates the first unused PPI group. + * + * @param[out] p_group Pointer to the PPI channel group that has been allocated. + * + * @retval NRFX_SUCCESS If the channel group was successfully allocated. + * @retval NRFX_ERROR_NO_MEM If there is no available channel group to be used. + */ +nrfx_err_t nrfx_ppi_group_alloc(nrf_ppi_channel_group_t * p_group); + +/** + * @brief Function for freeing a PPI channel group. + * @details This function also disables the chosen group. + * + * @param[in] group PPI channel group to be freed. + * + * @retval NRFX_SUCCESS If the channel group was successfully freed. + * @retval NRFX_ERROR_INVALID_PARAM If the channel group is not user-configurable. + */ +nrfx_err_t nrfx_ppi_group_free(nrf_ppi_channel_group_t group); + +/** + * @brief Compute a channel mask for NRF_PPI registers. + * + * @param[in] channel Channel number to transform to a mask. + * + * @retval Channel mask. + */ +__STATIC_INLINE uint32_t nrfx_ppi_channel_to_mask(nrf_ppi_channel_t channel) +{ + return (1uL << (uint32_t) channel); +} + +/** + * @brief Function for including multiple PPI channels in a channel group. + * + * @param[in] channel_mask PPI channels to be added. + * @param[in] group Channel group in which to include the channels. + * + * @retval NRFX_SUCCESS If the channels was successfully included. + * @retval NRFX_ERROR_INVALID_PARAM If group is not an application group or channels are not an + * application channels. + * @retval NRFX_ERROR_INVALID_STATE If group is not an allocated group. + */ +nrfx_err_t nrfx_ppi_channels_include_in_group(uint32_t channel_mask, + nrf_ppi_channel_group_t group); + +/** + * @brief Function for including a PPI channel in a channel group. + * + * @param[in] channel PPI channel to be added. + * @param[in] group Channel group in which to include the channel. + * + * @retval NRFX_SUCCESS If the channel was successfully included. + * @retval NRFX_ERROR_INVALID_PARAM If group is not an application group or channel is not an + * application channel. + * @retval NRFX_ERROR_INVALID_STATE If group is not an allocated group. + */ +__STATIC_INLINE nrfx_err_t nrfx_ppi_channel_include_in_group(nrf_ppi_channel_t channel, + nrf_ppi_channel_group_t group) +{ + return nrfx_ppi_channels_include_in_group(nrfx_ppi_channel_to_mask(channel), group); +} + +/** + * @brief Function for removing multiple PPI channels from a channel group. + * + * @param[in] channel_mask PPI channels to be removed. + * @param[in] group Channel group from which to remove the channels. + * + * @retval NRFX_SUCCESS If the channel was successfully removed. + * @retval NRFX_ERROR_INVALID_PARAM If group is not an application group or channels are not an + * application channels. + * @retval NRFX_ERROR_INVALID_STATE If group is not an allocated group. + */ +nrfx_err_t nrfx_ppi_channels_remove_from_group(uint32_t channel_mask, + nrf_ppi_channel_group_t group); + +/** + * @brief Function for removing a PPI channel from a channel group. + * + * @param[in] channel PPI channel to be removed. + * @param[in] group Channel group from which to remove the channel. + * + * @retval NRFX_SUCCESS If the channel was successfully removed. + * @retval NRFX_ERROR_INVALID_PARAM If group is not an application group or channel is not an + * application channel. + * @retval NRFX_ERROR_INVALID_STATE If group is not an allocated group. + */ +__STATIC_INLINE nrfx_err_t nrfx_ppi_channel_remove_from_group(nrf_ppi_channel_t channel, + nrf_ppi_channel_group_t group) +{ + return nrfx_ppi_channels_remove_from_group(nrfx_ppi_channel_to_mask(channel), group); +} + +/** + * @brief Function for clearing a PPI channel group. + * + * @param[in] group Channel group to be cleared. + * + * @retval NRFX_SUCCESS If the group was successfully cleared. + * @retval NRFX_ERROR_INVALID_PARAM If group is not an application group. + * @retval NRFX_ERROR_INVALID_STATE If group is not an allocated group. + */ +__STATIC_INLINE nrfx_err_t nrfx_ppi_group_clear(nrf_ppi_channel_group_t group) +{ + return nrfx_ppi_channels_remove_from_group(NRFX_PPI_ALL_APP_CHANNELS_MASK, group); +} + +/** + * @brief Function for enabling a PPI channel group. + * + * @param[in] group Channel group to be enabled. + * + * @retval NRFX_SUCCESS If the group was successfully enabled. + * @retval NRFX_ERROR_INVALID_PARAM If group is not an application group. + * @retval NRFX_ERROR_INVALID_STATE If group is not an allocated group. + */ +nrfx_err_t nrfx_ppi_group_enable(nrf_ppi_channel_group_t group); + +/** + * @brief Function for disabling a PPI channel group. + * + * @param[in] group Channel group to be disabled. + * + * @retval NRFX_SUCCESS If the group was successfully disabled. + * @retval NRFX_ERROR_INVALID_PARAM If group is not an application group. + * @retval NRFX_ERROR_INVALID_STATE If group is not an allocated group. + */ +nrfx_err_t nrfx_ppi_group_disable(nrf_ppi_channel_group_t group); + +/** + * @brief Function for getting the address of a PPI task. + * + * @param[in] task Task. + * + * @retval Task address. + */ +__STATIC_INLINE uint32_t nrfx_ppi_task_addr_get(nrf_ppi_task_t task) +{ + return (uint32_t) nrf_ppi_task_address_get(task); +} + +/** + * @brief Function for getting the address of a PPI group enable task. + * + * @param[in] group PPI channel group + * + * @retval Task address. + */ +__STATIC_INLINE uint32_t nrfx_ppi_task_addr_group_enable_get(nrf_ppi_channel_group_t group) +{ + return (uint32_t) nrf_ppi_task_group_enable_address_get(group); +} + +/** + * @brief Function for getting the address of a PPI group enable task. + * + * @param[in] group PPI channel group + * + * @retval Task address. + */ +__STATIC_INLINE uint32_t nrfx_ppi_task_addr_group_disable_get(nrf_ppi_channel_group_t group) +{ + return (uint32_t) nrf_ppi_task_group_disable_address_get(group); +} + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_PPI_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_pwm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_pwm.h new file mode 100644 index 00000000000..c4c15dd49ec --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_pwm.h @@ -0,0 +1,497 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_PWM_H__ +#define NRFX_PWM_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_pwm PWM driver + * @{ + * @ingroup nrf_pwm + * @brief Pulse Width Modulation (PWM) peripheral driver. + */ + +/** + * @brief PWM driver instance data structure. + */ +typedef struct +{ + NRF_PWM_Type * p_registers; ///< Pointer to the structure with PWM peripheral instance registers. + uint8_t drv_inst_idx; ///< Driver instance index. +} nrfx_pwm_t; + +/** + * @brief Macro for creating a PWM driver instance. + */ +#define NRFX_PWM_INSTANCE(id) \ +{ \ + .p_registers = NRFX_CONCAT_2(NRF_PWM, id), \ + .drv_inst_idx = NRFX_CONCAT_3(NRFX_PWM, id, _INST_IDX), \ +} + +enum { +#if NRFX_CHECK(NRFX_PWM0_ENABLED) + NRFX_PWM0_INST_IDX, +#endif +#if NRFX_CHECK(NRFX_PWM1_ENABLED) + NRFX_PWM1_INST_IDX, +#endif +#if NRFX_CHECK(NRFX_PWM2_ENABLED) + NRFX_PWM2_INST_IDX, +#endif +#if NRFX_CHECK(NRFX_PWM3_ENABLED) + NRFX_PWM3_INST_IDX, +#endif + NRFX_PWM_ENABLED_COUNT +}; + +/** + * @brief This value can be provided instead of a pin number for any channel + * to specify that its output is not used and therefore does not need + * to be connected to a pin. + */ +#define NRFX_PWM_PIN_NOT_USED 0xFF + +/** + * @brief This value can be added to a pin number to inverse its polarity + * (set idle state = 1). + */ +#define NRFX_PWM_PIN_INVERTED 0x80 + +/** + * @brief PWM driver configuration structure. + */ +typedef struct +{ + uint8_t output_pins[NRF_PWM_CHANNEL_COUNT]; ///< Pin numbers for individual output channels (optional). + /**< Use @ref NRFX_PWM_PIN_NOT_USED + * if a given output channel is not needed. */ + uint8_t irq_priority; ///< Interrupt priority. + nrf_pwm_clk_t base_clock; ///< Base clock frequency. + nrf_pwm_mode_t count_mode; ///< Operating mode of the pulse generator counter. + uint16_t top_value; ///< Value up to which the pulse generator counter counts. + nrf_pwm_dec_load_t load_mode; ///< Mode of loading sequence data from RAM. + nrf_pwm_dec_step_t step_mode; ///< Mode of advancing the active sequence. +} nrfx_pwm_config_t; + +/** + * @brief PWM driver default configuration. + */ +#define NRFX_PWM_DEFAULT_CONFIG \ +{ \ + .output_pins = { NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN, \ + NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN, \ + NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN, \ + NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN }, \ + .irq_priority = NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY, \ + .base_clock = (nrf_pwm_clk_t)NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK, \ + .count_mode = (nrf_pwm_mode_t)NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE, \ + .top_value = NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE, \ + .load_mode = (nrf_pwm_dec_load_t)NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE, \ + .step_mode = (nrf_pwm_dec_step_t)NRFX_PWM_DEFAULT_CONFIG_STEP_MODE, \ +} + + +/** + * @brief PWM flags providing additional playback options. + */ +typedef enum +{ + NRFX_PWM_FLAG_STOP = 0x01, /**< When the requested playback is finished, + the peripheral should be stopped. + @note The STOP task is triggered when + the last value of the final sequence is + loaded from RAM, and the peripheral stops + at the end of the current PWM period. + For sequences with configured repeating + of duty cycle values, this might result in + less than the requested number of repeats + of the last value. */ + NRFX_PWM_FLAG_LOOP = 0x02, /**< When the requested playback is finished, + it should be started from the beginning. + This flag is ignored if used together + with @ref NRFX_PWM_FLAG_STOP. + @note The playback restart is done via a + shortcut configured in the PWM peripheral. + This shortcut triggers the proper starting + task when the final value of previous + playback is read from RAM and applied to + the pulse generator counter. + When this mechanism is used together with + the @ref NRF_PWM_STEP_TRIGGERED mode, + the playback restart will occur right + after switching to the final value (this + final value will be played only once). */ + NRFX_PWM_FLAG_SIGNAL_END_SEQ0 = 0x04, /**< The event handler should be + called when the last value + from sequence 0 is loaded. */ + NRFX_PWM_FLAG_SIGNAL_END_SEQ1 = 0x08, /**< The event handler should be + called when the last value + from sequence 1 is loaded. */ + NRFX_PWM_FLAG_NO_EVT_FINISHED = 0x10, /**< The playback finished event + (enabled by default) should be + suppressed. */ + NRFX_PWM_FLAG_START_VIA_TASK = 0x80, /**< The playback should not be + started directly by the called + function. Instead, the function + should only prepare it and + return the address of the task + to be triggered to start the + playback. */ +} nrfx_pwm_flag_t; + + +/** + * @brief PWM driver event type. + */ +typedef enum +{ + NRFX_PWM_EVT_FINISHED, ///< Sequence playback finished. + NRFX_PWM_EVT_END_SEQ0, /**< End of sequence 0 reached. Its data can be + safely modified now. */ + NRFX_PWM_EVT_END_SEQ1, /**< End of sequence 1 reached. Its data can be + safely modified now. */ + NRFX_PWM_EVT_STOPPED, ///< The PWM peripheral has been stopped. +} nrfx_pwm_evt_type_t; + +/** + * @brief PWM driver event handler type. + */ +typedef void (* nrfx_pwm_handler_t)(nrfx_pwm_evt_type_t event_type); + + +/** + * @brief Function for initializing the PWM driver. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_config Pointer to the structure with initial configuration. + * + * @param[in] handler Event handler provided by the user. If NULL is passed + * instead, event notifications are not done and PWM + * interrupts are disabled. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_INVALID_STATE If the driver was already initialized. + */ +nrfx_err_t nrfx_pwm_init(nrfx_pwm_t const * const p_instance, + nrfx_pwm_config_t const * p_config, + nrfx_pwm_handler_t handler); + +/** + * @brief Function for uninitializing the PWM driver. + * + * If any sequence playback is in progress, it is stopped immediately. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_pwm_uninit(nrfx_pwm_t const * const p_instance); + +/** + * @brief Function for starting a single sequence playback. + * + * To take advantage of the looping mechanism in the PWM peripheral, both + * sequences must be used (single sequence can be played back only once by + * the peripheral). Therefore, the provided sequence is internally set and + * played back as both sequence 0 and sequence 1. Consequently, if end of + * sequence notifications are required, events for both sequences should be + * used (that means that both the @ref NRFX_PWM_FLAG_SIGNAL_END_SEQ0 flag + * and the @ref NRFX_PWM_FLAG_SIGNAL_END_SEQ1 flag should be specified and + * the @ref NRFX_PWM_EVT_END_SEQ0 event and the @ref NRFX_PWM_EVT_END_SEQ1 + * event should be handled in the same way). + * + * Use the @ref NRFX_PWM_FLAG_START_VIA_TASK flag if you want the playback + * to be only prepared by this function, and you want to start it later by + * triggering a task (using PPI for instance). The function will then return + * the address of the task to be triggered. + * + * @note The array containing the duty cycle values for the specified sequence + * must be in RAM and cannot be allocated on stack. + * For detailed information, see @ref nrf_pwm_sequence_t. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_sequence Sequence to be played back. + * @param[in] playback_count Number of playbacks to be performed (must not be 0). + * @param[in] flags Additional options. Pass any combination of + * @ref nrfx_pwm_flag_t "playback flags", or 0 + * for default settings. + * + * @return Address of the task to be triggered to start the playback if the @ref + * NRFX_PWM_FLAG_START_VIA_TASK flag was used, 0 otherwise. + */ +uint32_t nrfx_pwm_simple_playback(nrfx_pwm_t const * const p_instance, + nrf_pwm_sequence_t const * p_sequence, + uint16_t playback_count, + uint32_t flags); + +/** + * @brief Function for starting a two-sequence playback. + * + * Use the @ref NRFX_PWM_FLAG_START_VIA_TASK flag if you want the playback + * to be only prepared by this function, and you want to start it later by + * triggering a task (using PPI for instance). The function will then return + * the address of the task to be triggered. + * + * @note The array containing the duty cycle values for the specified sequence + * must be in RAM and cannot be allocated on stack. + * For detailed information, see @ref nrf_pwm_sequence_t. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_sequence_0 First sequence to be played back. + * @param[in] p_sequence_1 Second sequence to be played back. + * @param[in] playback_count Number of playbacks to be performed (must not be 0). + * @param[in] flags Additional options. Pass any combination of + * @ref nrfx_pwm_flag_t "playback flags", or 0 + * for default settings. + * + * @return Address of the task to be triggered to start the playback if the @ref + * NRFX_PWM_FLAG_START_VIA_TASK flag was used, 0 otherwise. + */ +uint32_t nrfx_pwm_complex_playback(nrfx_pwm_t const * const p_instance, + nrf_pwm_sequence_t const * p_sequence_0, + nrf_pwm_sequence_t const * p_sequence_1, + uint16_t playback_count, + uint32_t flags); + +/** + * @brief Function for advancing the active sequence. + * + * This function only applies to @ref NRF_PWM_STEP_TRIGGERED mode. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +__STATIC_INLINE void nrfx_pwm_step(nrfx_pwm_t const * const p_instance); + +/** + * @brief Function for stopping the sequence playback. + * + * The playback is stopped at the end of the current PWM period. + * This means that if the active sequence is configured to repeat each duty + * cycle value for a certain number of PWM periods, the last played value + * might appear on the output less times than requested. + * + * @note This function can be instructed to wait until the playback is stopped + * (by setting @p wait_until_stopped to true). Note that, depending on + * the length of the PMW period, this might take a significant amount of + * time. Alternatively, the @ref nrfx_pwm_is_stopped function can be + * used to poll the status, or the @ref NRFX_PWM_EVT_STOPPED event can + * be used to get the notification when the playback is stopped, provided + * the event handler is defined. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] wait_until_stopped If true, the function will not return until + * the playback is stopped. + * + * @retval true If the PWM peripheral is stopped. + * @retval false If the PWM peripheral is not stopped. + */ +bool nrfx_pwm_stop(nrfx_pwm_t const * const p_instance, + bool wait_until_stopped); + +/** + * @brief Function for checking the status of the PWM peripheral. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true If the PWM peripheral is stopped. + * @retval false If the PWM peripheral is not stopped. + */ +bool nrfx_pwm_is_stopped(nrfx_pwm_t const * const p_instance); + +/** + * @brief Function for updating the sequence data during playback. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] seq_id Identifier of the sequence (0 or 1). + * @param[in] p_sequence Pointer to the new sequence definition. + */ +__STATIC_INLINE void nrfx_pwm_sequence_update( + nrfx_pwm_t const * const p_instance, + uint8_t seq_id, + nrf_pwm_sequence_t const * p_sequence); + +/** + * @brief Function for updating the pointer to the duty cycle values + * in the specified sequence during playback. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] seq_id Identifier of the sequence (0 or 1). + * @param[in] values New pointer to the duty cycle values. + */ +__STATIC_INLINE void nrfx_pwm_sequence_values_update(nrfx_pwm_t const * const p_instance, + uint8_t seq_id, + nrf_pwm_values_t values); + +/** + * @brief Function for updating the number of duty cycle values + * in the specified sequence during playback. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] seq_id Identifier of the sequence (0 or 1). + * @param[in] length New number of the duty cycle values. + */ +__STATIC_INLINE void nrfx_pwm_sequence_length_update(nrfx_pwm_t const * const p_instance, + uint8_t seq_id, + uint16_t length); + +/** + * @brief Function for updating the number of repeats for duty cycle values + * in specified sequence during playback. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] seq_id Identifier of the sequence (0 or 1). + * @param[in] repeats New number of repeats. + */ +__STATIC_INLINE void nrfx_pwm_sequence_repeats_update(nrfx_pwm_t const * const p_instance, + uint8_t seq_id, + uint32_t repeats); + +/** + * @brief Function for updating the additional delay after the specified + * sequence during playback. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] seq_id Identifier of the sequence (0 or 1). + * @param[in] end_delay New end delay value (in PWM periods). + */ +__STATIC_INLINE void nrfx_pwm_sequence_end_delay_update(nrfx_pwm_t const * const p_instance, + uint8_t seq_id, + uint32_t end_delay); + +/** + * @brief Function for returning the address of a specified PWM task that can + * be used in PPI module. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] task Requested task. + * + * @return Task address. + */ +__STATIC_INLINE uint32_t nrfx_pwm_task_address_get(nrfx_pwm_t const * const p_instance, + nrf_pwm_task_t task); + +/**@brief Function for returning the address of a specified PWM event that can + * be used in PPI module. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] event Requested event. + * + * @return Event address. + */ +__STATIC_INLINE uint32_t nrfx_pwm_event_address_get(nrfx_pwm_t const * const p_instance, + nrf_pwm_event_t event); + + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE void nrfx_pwm_step(nrfx_pwm_t const * const p_instance) +{ + nrf_pwm_task_trigger(p_instance->p_registers, NRF_PWM_TASK_NEXTSTEP); +} + +__STATIC_INLINE void nrfx_pwm_sequence_update(nrfx_pwm_t const * const p_instance, + uint8_t seq_id, + nrf_pwm_sequence_t const * p_sequence) +{ + nrf_pwm_sequence_set(p_instance->p_registers, seq_id, p_sequence); +} + +__STATIC_INLINE void nrfx_pwm_sequence_values_update(nrfx_pwm_t const * const p_instance, + uint8_t seq_id, + nrf_pwm_values_t values) +{ + nrf_pwm_seq_ptr_set(p_instance->p_registers, seq_id, values.p_raw); +} + +__STATIC_INLINE void nrfx_pwm_sequence_length_update(nrfx_pwm_t const * const p_instance, + uint8_t seq_id, + uint16_t length) +{ + nrf_pwm_seq_cnt_set(p_instance->p_registers, seq_id, length); +} + +__STATIC_INLINE void nrfx_pwm_sequence_repeats_update(nrfx_pwm_t const * const p_instance, + uint8_t seq_id, + uint32_t repeats) +{ + nrf_pwm_seq_refresh_set(p_instance->p_registers, seq_id, repeats); +} + +__STATIC_INLINE void nrfx_pwm_sequence_end_delay_update(nrfx_pwm_t const * const p_instance, + uint8_t seq_id, + uint32_t end_delay) +{ + nrf_pwm_seq_end_delay_set(p_instance->p_registers, seq_id, end_delay); +} + +__STATIC_INLINE uint32_t nrfx_pwm_task_address_get(nrfx_pwm_t const * const p_instance, + nrf_pwm_task_t task) +{ + return nrf_pwm_task_address_get(p_instance->p_registers, task); +} + +__STATIC_INLINE uint32_t nrfx_pwm_event_address_get(nrfx_pwm_t const * const p_instance, + nrf_pwm_event_t event) +{ + return nrf_pwm_event_address_get(p_instance->p_registers, event); +} + +#endif // SUPPRESS_INLINE_IMPLEMENTATION + + +void nrfx_pwm_0_irq_handler(void); +void nrfx_pwm_1_irq_handler(void); +void nrfx_pwm_2_irq_handler(void); +void nrfx_pwm_3_irq_handler(void); + + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_PWM_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_qdec.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_qdec.h new file mode 100644 index 00000000000..9f636d5b976 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_qdec.h @@ -0,0 +1,186 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_QDEC_H__ +#define NRFX_QDEC_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_qdec QDEC driver + * @{ + * @ingroup nrf_qdec + * @brief Quadrature Decoder (QDEC) peripheral driver. + */ + +/**@brief QDEC configuration structure.*/ +typedef struct +{ + nrf_qdec_reportper_t reportper; /**< Report period in samples. */ + nrf_qdec_sampleper_t sampleper; /**< Sampling period in microseconds. */ + uint32_t psela; /**< Pin number for A input. */ + uint32_t pselb; /**< Pin number for B input. */ + uint32_t pselled; /**< Pin number for LED output. */ + uint32_t ledpre; /**< Time (in microseconds) how long LED is switched on before sampling. */ + nrf_qdec_ledpol_t ledpol; /**< Active LED polarity. */ + bool dbfen; /**< State of debouncing filter. */ + bool sample_inten; /**< Enabling sample ready interrupt. */ + uint8_t interrupt_priority; /**< QDEC interrupt priority. */ +} nrfx_qdec_config_t; + +/**@brief QDEC default configuration. */ +#define NRFX_QDEC_DEFAULT_CONFIG \ + { \ + .reportper = (nrf_qdec_reportper_t)NRFX_QDEC_CONFIG_REPORTPER, \ + .sampleper = (nrf_qdec_sampleper_t)NRFX_QDEC_CONFIG_SAMPLEPER, \ + .psela = NRFX_QDEC_CONFIG_PIO_A, \ + .pselb = NRFX_QDEC_CONFIG_PIO_B, \ + .pselled = NRFX_QDEC_CONFIG_PIO_LED, \ + .ledpre = NRFX_QDEC_CONFIG_LEDPRE, \ + .ledpol = (nrf_qdec_ledpol_t)NRFX_QDEC_CONFIG_LEDPOL, \ + .interrupt_priority = NRFX_QDEC_CONFIG_IRQ_PRIORITY, \ + .dbfen = NRFX_QDEC_CONFIG_DBFEN, \ + .sample_inten = NRFX_QDEC_CONFIG_SAMPLE_INTEN \ + } + +/**@brief QDEC sample event data.*/ +typedef struct +{ + int8_t value; /**< Sample value. */ +} nrfx_qdec_sample_data_evt_t; + +/**@brief QDEC report event data.*/ +typedef struct +{ + int16_t acc; /**< Accumulated transitions. */ + uint16_t accdbl; /**< Accumulated double transitions. */ +} nrfx_qdec_report_data_evt_t; + +/**@brief QDEC event handler structure. */ +typedef struct +{ + nrf_qdec_event_t type; + union + { + nrfx_qdec_sample_data_evt_t sample; /**< Sample event data. */ + nrfx_qdec_report_data_evt_t report; /**< Report event data. */ + } data; +} nrfx_qdec_event_t; + +/**@brief QDEC event handler. + * @param[in] event QDEC event structure. + */ +typedef void (*nrfx_qdec_event_handler_t)(nrfx_qdec_event_t event); + +/**@brief Function for initializing QDEC. + * + * @param[in] p_config Pointer to the structure with initial configuration. + * @param[in] event_handler Event handler provided by the user. + * Must not be NULL. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_INVALID_STATE If QDEC was already initialized. + */ +nrfx_err_t nrfx_qdec_init(nrfx_qdec_config_t const * p_config, + nrfx_qdec_event_handler_t event_handler); + +/**@brief Function for uninitializing QDEC. + * @note Function asserts if module is uninitialized. + */ +void nrfx_qdec_uninit(void); + +/**@brief Function for enabling QDEC. + * @note Function asserts if module is uninitialized or enabled. + */ +void nrfx_qdec_enable(void); + +/**@brief Function for disabling QDEC. + * @note Function asserts if module is uninitialized or disabled. + */ +void nrfx_qdec_disable(void); + +/**@brief Function for reading accumulated transitions QDEC. + * @note Function asserts if module is not enabled. + * @note Accumulators are cleared after reading. + * + * @param[out] p_acc Pointer to store accumulated transitions. + * @param[out] p_accdbl Pointer to store accumulated double transitions. + */ +void nrfx_qdec_accumulators_read(int16_t * p_acc, int16_t * p_accdbl); + +/** + * @brief Function for returning the address of a specific QDEC task. + * + * @param task QDEC task. + * + * @return Task address. + */ +__STATIC_INLINE uint32_t nrfx_qdec_task_address_get(nrf_qdec_task_t task) +{ + return (uint32_t)nrf_qdec_task_address_get(task); +} + +/** + * @brief Function for returning the address of a specific QDEC event. + * + * @param event QDEC event. + * + * @return Event address. + */ +__STATIC_INLINE uint32_t nrfx_qdec_event_address_get(nrf_qdec_event_t event) +{ + return (uint32_t)nrf_qdec_event_address_get(event); +} + + +void nrfx_qdec_irq_handler(void); + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_QDEC_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_qspi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_qspi.h new file mode 100644 index 00000000000..6f19f105b2c --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_qspi.h @@ -0,0 +1,297 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_QSPI_H__ +#define NRFX_QSPI_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_qspi QSPI driver + * @{ + * @ingroup nrf_qspi + * @brief Quad Serial Peripheral Interface (QSPI) peripheral driver. + */ + +/** + * @brief QSPI driver instance configuration structure. + */ +typedef struct +{ + uint32_t xip_offset; /**< Address offset into the external memory for Execute in Place operation. */ + nrf_qspi_pins_t pins; /**< Pins configuration structure. */ + nrf_qspi_prot_conf_t prot_if; /**< Protocol layer interface configuration structure. */ + nrf_qspi_phy_conf_t phy_if; /**< Physical layer interface configuration structure. */ + uint8_t irq_priority; /**< Interrupt priority. */ +} nrfx_qspi_config_t; + +/** + * @brief QSPI instance default configuration. + */ +#define NRFX_QSPI_DEFAULT_CONFIG \ +{ \ + .xip_offset = NRFX_QSPI_CONFIG_XIP_OFFSET, \ + .pins = { \ + .sck_pin = NRFX_QSPI_PIN_SCK, \ + .csn_pin = NRFX_QSPI_PIN_CSN, \ + .io0_pin = NRFX_QSPI_PIN_IO0, \ + .io1_pin = NRFX_QSPI_PIN_IO1, \ + .io2_pin = NRFX_QSPI_PIN_IO2, \ + .io3_pin = NRFX_QSPI_PIN_IO3, \ + }, \ + .irq_priority = (uint8_t)NRFX_QSPI_CONFIG_IRQ_PRIORITY, \ + .prot_if = { \ + .readoc = (nrf_qspi_readoc_t)NRFX_QSPI_CONFIG_READOC, \ + .writeoc = (nrf_qspi_writeoc_t)NRFX_QSPI_CONFIG_WRITEOC, \ + .addrmode = (nrf_qspi_addrmode_t)NRFX_QSPI_CONFIG_ADDRMODE, \ + .dpmconfig = false, \ + }, \ + .phy_if = { \ + .sck_freq = (nrf_qspi_frequency_t)NRFX_QSPI_CONFIG_FREQUENCY, \ + .sck_delay = (uint8_t)NRFX_QSPI_CONFIG_SCK_DELAY, \ + .spi_mode = (nrf_qspi_spi_mode_t)NRFX_QSPI_CONFIG_MODE, \ + .dpmen = false \ + }, \ +} + +/** + * @brief QSPI custom instruction helper with default configuration. + */ +#define NRFX_QSPI_DEFAULT_CINSTR(opc, len) \ +{ \ + .opcode = (opc), \ + .length = (len), \ + .io2_level = false, \ + .io3_level = false, \ + .wipwait = false, \ + .wren = false \ +} + +/** + * @brief QSPI master driver event types, passed to the handler routine provided + * during initialization. + */ +typedef enum +{ + NRFX_QSPI_EVENT_DONE, /**< Transfer done. */ +} nrfx_qspi_evt_t; + +/** + * @brief QSPI driver event handler type. + */ +typedef void (*nrfx_qspi_handler_t)(nrfx_qspi_evt_t event, void * p_context); + +/** + * @brief Function for initializing the QSPI driver instance. + * + * This function configures the peripheral and its interrupts and activates it. During the + * activation process, the internal clocks are started and the QSPI peripheral tries to read + * the status byte to read the busy bit. Reading the status byte is done in a simple poll and wait + * mechanism. + * If the busy bit is 1, this indicates issues with the external memory device. As a result, + * @ref nrfx_qspi_init returns NRFX_ERROR_TIMEOUT. + * + * In case of issues: + * - Check the connection. + * - Make sure that the memory device does not perform other operations like erasing or writing. + * - Check if there is a short circuit. + * + * @param[in] p_config Pointer to the structure with initial configuration. + * @param[in] handler Event handler provided by the user. If NULL, transfers + * will be performed in blocking mode. + * @param[in] p_context Pointer to context. Use in interrupt handler. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_TIMEOUT If the peripheral cannot connect with external memory. + * @retval NRFX_ERROR_INVALID_STATE If the driver was already initialized. + * @retval NRFX_ERROR_INVALID_PARAM If the pin configuration was incorrect. + */ +nrfx_err_t nrfx_qspi_init(nrfx_qspi_config_t const * p_config, + nrfx_qspi_handler_t handler, + void * p_context); + +/** + * @brief Function for uninitializing the QSPI driver instance. + */ +void nrfx_qspi_uninit(void); + +/** + * @brief Function for reading data from QSPI memory. + * + * Write, read, and erase operations check memory device busy state before starting the operation. + * If the memory is busy, the resulting action depends on the mode in which the read operation is used: + * - blocking mode (without handler) - a delay occurs until the last operation still runs and + * until operation data is still being read. + * - interrupt mode (with handler) - event emission occurs after the last operation + * and reading of data are finished. + * + * @param[out] p_rx_buffer Pointer to the receive buffer. + * @param[in] rx_buffer_length Size of the data to read. + * @param[in] src_address Address in memory to read from. + * + * @retval NRFX_SUCCESS If the operation was successful (blocking mode) or operation + * was commissioned (handler mode). + * @retval NRFX_ERROR_BUSY If the driver currently handles another operation. + * @retval NRFX_ERROR_INVALID_ADDR If the provided buffer is not placed in the Data RAM region. + */ +nrfx_err_t nrfx_qspi_read(void * p_rx_buffer, + size_t rx_buffer_length, + uint32_t src_address); + +/** + * @brief Function for writing data to QSPI memory. + * + * Write, read, and erase operations check memory device busy state before starting the operation. + * If the memory is busy, the resulting action depends on the mode in which the write operation is used: + * - blocking mode (without handler) - a delay occurs until the last operation still runs and + * until operation data is still being sent. + * - interrupt mode (with handler) - event emission occurs after the last operation + * and sending of operation data are finished. + * To manually control operation execution in the memory device, use @ref nrfx_qspi_mem_busy_check + * after executing the write function. + * Remember that an incoming event signalizes only that data was sent to the memory device and the periheral + * before the write operation checked if memory was busy. + * + * @param[in] p_tx_buffer Pointer to the writing buffer. + * @param[in] tx_buffer_length Size of the data to write. + * @param[in] dst_address Address in memory to write to. + * + * @retval NRFX_SUCCESS If the operation was successful (blocking mode) or operation + * was commissioned (handler mode). + * @retval NRFX_ERROR_BUSY If the driver currently handles other operation. + * @retval NRFX_ERROR_INVALID_ADDR If the provided buffer is not placed in the Data RAM region. + */ +nrfx_err_t nrfx_qspi_write(void const * p_tx_buffer, + size_t tx_buffer_length, + uint32_t dst_address); + +/** + * @brief Function for starting erasing of one memory block - 4KB, 64KB, or the whole chip. + * + * Write, read, and erase operations check memory device busy state before starting the operation. + * If the memory is busy, the resulting action depends on the mode in which the erase operation is used: + * - blocking mode (without handler) - a delay occurs until the last operation still runs and + * until operation data is still being sent. + * - interrupt mode (with handler) - event emission occurs after the last operation + * and sending of operation data are finished. + * To manually control operation execution in the memory device, use @ref nrfx_qspi_mem_busy_check + * after executing the erase function. + * Remember that an incoming event signalizes only that data was sent to the memory device and the periheral + * before the erase operation checked if memory was busy. + * + * @param[in] length Size of data to erase. See @ref nrf_qspi_erase_len_t. + * @param[in] start_address Memory address to start erasing. If chip erase is performed, address + * field is ommited. + * + * @retval NRFX_SUCCESS If the operation was successful (blocking mode) or operation + * was commissioned (handler mode). + * @retval NRFX_ERROR_BUSY If the driver currently handles another operation. + */ +nrfx_err_t nrfx_qspi_erase(nrf_qspi_erase_len_t length, + uint32_t start_address); + +/** + * @brief Function for starting an erase operation of the whole chip. + * + * @retval NRFX_SUCCESS If the operation was successful (blocking mode) or operation + * was commissioned (handler mode). + * @retval NRFX_ERROR_BUSY If the driver currently handles another operation. + */ +nrfx_err_t nrfx_qspi_chip_erase(void); + +/** + * @brief Function for getting the current driver status and status byte of memory device with + * testing WIP (write in progress) bit. + * + * @retval NRFX_SUCCESS If the driver and memory are ready to handle a new operation. + * @retval NRFX_ERROR_BUSY If the driver or memory currently handle another operation. + */ +nrfx_err_t nrfx_qspi_mem_busy_check(void); + +/** + * @brief Function for sending operation code, sending data, and receiving data from the memory device. + * + * Use this function to transfer configuration data to memory and to receive data from memory. + * Pointers can be addresses from flash memory. + * This function is a synchronous function and should be used only if necessary. + * + * @param[in] p_config Pointer to the structure with opcode and transfer configuration. + * @param[in] p_tx_buffer Pointer to the array with data to send. Can be NULL if only opcode is transmitted. + * @param[out] p_rx_buffer Pointer to the array for data to receive. Can be NULL if there is nothing to receive. + * + * @retval NRFX_SUCCESS If the operation was successful. + * @retval NRFX_ERROR_TIMEOUT If the external memory is busy or there are connection issues. + * @retval NRFX_ERROR_BUSY If the driver currently handles other operation. + */ +nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config, + void const * p_tx_buffer, + void * p_rx_buffer); +/** + * @brief Function for sending operation code and data to the memory device with simpler configuration. + * + * Use this function to transfer configuration data to memory and to receive data from memory. + * This function is a synchronous function and should be used only if necessary. + * + * @param[in] opcode Operation code. Sending first. + * @param[in] length Length of the data to send and opcode. See @ref nrf_qspi_cinstr_len_t. + * @param[in] p_tx_buffer Pointer to input data array. + * + * @retval NRFX_SUCCESS If the operation was successful. + * @retval NRFX_ERROR_BUSY If the driver currently handles another operation. + */ +nrfx_err_t nrfx_qspi_cinstr_quick_send(uint8_t opcode, + nrf_qspi_cinstr_len_t length, + void const * p_tx_buffer); + + +void nrfx_qspi_irq_handler(void); + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_QSPI_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_rng.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_rng.h new file mode 100644 index 00000000000..431f872f1dc --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_rng.h @@ -0,0 +1,126 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRFX_RNG_H__ +#define NRFX_RNG_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_rng RNG driver + * @{ + * @ingroup nrf_rng + * @brief Random Number Generator (RNG) peripheral driver. + */ + +/** + * @brief Struct for RNG configuration. + */ +typedef struct +{ + bool error_correction : 1; /**< Error correction flag. */ + uint8_t interrupt_priority; /**< interrupt priority */ +} nrfx_rng_config_t; + +/** + * @brief RNG default configuration. + * Basic usage: + * @code + * nrfx_rng_config_t config = NRFX_RNG_DEFAULT_CONFIG; + * if (nrfx_rng_init(&config, handler) + * { ... + * @endcode + */ +#define NRFX_RNG_DEFAULT_CONFIG \ + { \ + .error_correction = NRFX_RNG_CONFIG_ERROR_CORRECTION, \ + .interrupt_priority = NRFX_RNG_CONFIG_IRQ_PRIORITY, \ + } + +/** + * @brief RNG driver event handler type. + */ +typedef void (* nrfx_rng_evt_handler_t)(uint8_t rng_data); + +/** + * @brief Function for initializing the nrfx_rng module. + * + * @param[in] p_config Pointer to the structure with initial configuration. + * @param[in] handler Event handler provided by the user. Must not be NULL. + * + * @retval NRFX_SUCCESS Driver was successfully initialized. + * @retval NRFX_ERROR_ALREADY_INITIALIZED Driver was already initialized. + */ +nrfx_err_t nrfx_rng_init(nrfx_rng_config_t const * p_config, nrfx_rng_evt_handler_t handler); + +/** + * @brief Function for starting the random value generation. + * + * Function enables interrupts in perihperal and start them. + */ +void nrfx_rng_start(void); + +/** + * @brief Function for stoping the random value generation. + * + * Function disables interrupts in perihperal and stop generation of new random values. + */ +void nrfx_rng_stop(void); + +/** + * @brief Function for uninitializing the nrfx_rng module. + */ +void nrfx_rng_uninit(void); + + +void nrfx_rng_irq_handler(void); + + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_RNG_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_rtc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_rtc.h new file mode 100644 index 00000000000..aec1b7debbb --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_rtc.h @@ -0,0 +1,369 @@ +/** + * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_RTC_H__ +#define NRFX_RTC_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_rtc RTC driver + * @{ + * @ingroup nrf_rtc + * @brief Real Timer Counter (RTC) peripheral driver. + */ + +/**@brief Macro to convert microseconds into ticks. */ +#define NRFX_RTC_US_TO_TICKS(us,freq) (((us) * (freq)) / 1000000U) + +/**@brief RTC driver interrupt types. */ +typedef enum +{ + NRFX_RTC_INT_COMPARE0 = 0, /**< Interrupt from COMPARE0 event. */ + NRFX_RTC_INT_COMPARE1 = 1, /**< Interrupt from COMPARE1 event. */ + NRFX_RTC_INT_COMPARE2 = 2, /**< Interrupt from COMPARE2 event. */ + NRFX_RTC_INT_COMPARE3 = 3, /**< Interrupt from COMPARE3 event. */ + NRFX_RTC_INT_TICK = 4, /**< Interrupt from TICK event. */ + NRFX_RTC_INT_OVERFLOW = 5 /**< Interrupt from OVERFLOW event. */ +} nrfx_rtc_int_type_t; + +/**@brief RTC driver instance structure. */ +typedef struct +{ + NRF_RTC_Type * p_reg; /**< Pointer to instance register set. */ + IRQn_Type irq; /**< Instance IRQ ID. */ + uint8_t instance_id; /**< Instance index. */ + uint8_t cc_channel_count; /**< Number of capture/compare channels. */ +} nrfx_rtc_t; + +/**@brief Macro for creating RTC driver instance.*/ +#define NRFX_RTC_INSTANCE(id) \ +{ \ + .p_reg = NRFX_CONCAT_2(NRF_RTC, id), \ + .irq = NRFX_CONCAT_3(RTC, id, _IRQn), \ + .instance_id = NRFX_CONCAT_3(NRFX_RTC, id, _INST_IDX), \ + .cc_channel_count = NRF_RTC_CC_CHANNEL_COUNT(id), \ +} + +enum { +#if NRFX_CHECK(NRFX_RTC0_ENABLED) + NRFX_RTC0_INST_IDX, +#endif +#if NRFX_CHECK(NRFX_RTC1_ENABLED) + NRFX_RTC1_INST_IDX, +#endif +#if NRFX_CHECK(NRFX_RTC2_ENABLED) + NRFX_RTC2_INST_IDX, +#endif + NRFX_RTC_ENABLED_COUNT +}; + +/**@brief RTC driver instance configuration structure. */ +typedef struct +{ + uint16_t prescaler; /**< Prescaler. */ + uint8_t interrupt_priority; /**< Interrupt priority. */ + uint8_t tick_latency; /**< Maximum length of interrupt handler in ticks (max 7.7 ms). */ + bool reliable; /**< Reliable mode flag. */ +} nrfx_rtc_config_t; + +/**@brief RTC instance default configuration. */ +#define NRFX_RTC_DEFAULT_CONFIG \ +{ \ + .prescaler = RTC_FREQ_TO_PRESCALER(NRFX_RTC_DEFAULT_CONFIG_FREQUENCY), \ + .interrupt_priority = NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY, \ + .reliable = NRFX_RTC_DEFAULT_CONFIG_RELIABLE, \ + .tick_latency = NRFX_RTC_US_TO_TICKS(NRFX_RTC_MAXIMUM_LATENCY_US, \ + NRFX_RTC_DEFAULT_CONFIG_FREQUENCY), \ +} + +/**@brief RTC driver instance handler type. */ +typedef void (*nrfx_rtc_handler_t)(nrfx_rtc_int_type_t int_type); + +/**@brief Function for initializing the RTC driver instance. + * + * After initialization, the instance is in power off state. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_config Pointer to the structure with initial configuration. + * @param[in] handler Event handler provided by the user. + * Must not be NULL. + * + * @retval NRFX_SUCCESS If successfully initialized. + * @retval NRFX_ERROR_INVALID_STATE If the instance is already initialized. + */ +nrfx_err_t nrfx_rtc_init(nrfx_rtc_t const * const p_instance, + nrfx_rtc_config_t const * p_config, + nrfx_rtc_handler_t handler); + +/**@brief Function for uninitializing the RTC driver instance. + * + * After uninitialization, the instance is in idle state. The hardware should return to the state + * before initialization. The function asserts if the instance is in idle state. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_rtc_uninit(nrfx_rtc_t const * const p_instance); + +/**@brief Function for enabling the RTC driver instance. + * + * @note Function asserts if instance is enabled. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_rtc_enable(nrfx_rtc_t const * const p_instance); + +/**@brief Function for disabling the RTC driver instance. + * + * @note Function asserts if instance is disabled. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_rtc_disable(nrfx_rtc_t const * const p_instance); + +/**@brief Function for setting a compare channel. + * + * The function asserts if the instance is not initialized or if the channel parameter is + * wrong. The function powers on the instance if the instance was in power off state. + * + * The driver is not entering a critical section when configuring RTC, which means that it can be + * preempted for a certain amount of time. When the driver was preempted and the value to be set + * is short in time, there is a risk that the driver sets a compare value that is + * behind. If RTCn_CONFIG_RELIABLE is 1 for the given instance, the Reliable mode handles that case. + * However, to detect if the requested value is behind, this mode makes the following assumptions: + * - The maximum preemption time in ticks (8 - bit value) is known and is less than 7.7 ms + * (for prescaler = 0, RTC frequency 32 kHz). + * - The requested absolute compare value is not bigger than (0x00FFFFFF) - tick_latency. It is + * the user's responsibility to ensure that. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] channel One of the instance's channels. + * @param[in] val Absolute value to be set in the compare register. + * @param[in] enable_irq True to enable the interrupt. False to disable the interrupt. + * + * @retval NRFX_SUCCESS If the procedure was successful. + * @retval NRFX_ERROR_TIMEOUT If the compare was not set because the request value is behind the current counter + * value. This error can only be reported if RTCn_CONFIG_RELIABLE = 1. + */ +nrfx_err_t nrfx_rtc_cc_set(nrfx_rtc_t const * const p_instance, + uint32_t channel, + uint32_t val, + bool enable_irq); + +/**@brief Function for disabling a channel. + * + * This function disables channel events and channel interrupts. The function asserts if the instance is not + * initialized or if the channel parameter is wrong. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] channel One of the instance's channels. + * + * @retval NRFX_SUCCESS If the procedure was successful. + * @retval NRFX_ERROR_TIMEOUT If an interrupt was pending on the requested channel. + */ +nrfx_err_t nrfx_rtc_cc_disable(nrfx_rtc_t const * const p_instance, uint32_t channel); + +/**@brief Function for enabling tick. + * + * This function enables the tick event and optionally the interrupt. The function asserts if the instance is not + * powered on. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] enable_irq True to enable the interrupt. False to disable the interrupt. + */ +void nrfx_rtc_tick_enable(nrfx_rtc_t const * const p_instance, bool enable_irq); + +/**@brief Function for disabling tick. + * + * This function disables the tick event and interrupt. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_rtc_tick_disable(nrfx_rtc_t const * const p_instance); + +/**@brief Function for enabling overflow. + * + * This function enables the overflow event and optionally the interrupt. The function asserts if the instance is + * not powered on. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] enable_irq True to enable the interrupt. False to disable the interrupt. + */ +void nrfx_rtc_overflow_enable(nrfx_rtc_t const * const p_instance, bool enable_irq); + +/**@brief Function for disabling overflow. + * + * This function disables the overflow event and interrupt. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_rtc_overflow_disable(nrfx_rtc_t const * const p_instance); + +/**@brief Function for getting the maximum relative ticks value that can be set in the compare channel. + * + * When a stack (for example SoftDevice) is used and it occupies high priority interrupts, + * the application code can be interrupted at any moment for a certain period of time. + * If Reliable mode is enabled, the provided maximum latency is taken into account + * and the return value is smaller than the RTC counter resolution. + * If Reliable mode is disabled, the return value equals the counter resolution. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval ticks Maximum ticks value. + */ +uint32_t nrfx_rtc_max_ticks_get(nrfx_rtc_t const * const p_instance); + +/**@brief Function for disabling all instance interrupts. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_mask Pointer to the location where the mask is filled. + */ +__STATIC_INLINE void nrfx_rtc_int_disable(nrfx_rtc_t const * const p_instance, + uint32_t * p_mask); + +/**@brief Function for enabling instance interrupts. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] mask Mask of interrupts to enable. + */ +__STATIC_INLINE void nrfx_rtc_int_enable(nrfx_rtc_t const * const p_instance, uint32_t mask); + +/**@brief Function for retrieving the current counter value. + * + * This function asserts if the instance is not powered on or if p_val is NULL. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval value Counter value. + */ +__STATIC_INLINE uint32_t nrfx_rtc_counter_get(nrfx_rtc_t const * const p_instance); + +/**@brief Function for clearing the counter value. + * + * This function asserts if the instance is not powered on. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +__STATIC_INLINE void nrfx_rtc_counter_clear(nrfx_rtc_t const * const p_instance); + +/**@brief Function for returning a requested task address for the RTC driver instance. + * + * This function asserts if the output pointer is NULL. The task address can be used by the PPI module. + * + * @param[in] p_instance Pointer to the instance. + * @param[in] task One of the peripheral tasks. + * + * @retval Address of task register. + */ +__STATIC_INLINE uint32_t nrfx_rtc_task_address_get(nrfx_rtc_t const * const p_instance, + nrf_rtc_task_t task); + +/**@brief Function for returning a requested event address for the RTC driver instance. + * + * This function asserts if the output pointer is NULL. The event address can be used by the PPI module. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] event One of the peripheral events. + * + * @retval Address of event register. + */ +__STATIC_INLINE uint32_t nrfx_rtc_event_address_get(nrfx_rtc_t const * const p_instance, + nrf_rtc_event_t event); + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE void nrfx_rtc_int_disable(nrfx_rtc_t const * const p_instance, + uint32_t * p_mask) +{ + *p_mask = nrf_rtc_int_get(p_instance->p_reg); + nrf_rtc_int_disable(p_instance->p_reg, NRF_RTC_INT_TICK_MASK | + NRF_RTC_INT_OVERFLOW_MASK | + NRF_RTC_INT_COMPARE0_MASK | + NRF_RTC_INT_COMPARE1_MASK | + NRF_RTC_INT_COMPARE2_MASK | + NRF_RTC_INT_COMPARE3_MASK); +} + +__STATIC_INLINE void nrfx_rtc_int_enable(nrfx_rtc_t const * const p_instance, uint32_t mask) +{ + nrf_rtc_int_enable(p_instance->p_reg, mask); +} + +__STATIC_INLINE uint32_t nrfx_rtc_counter_get(nrfx_rtc_t const * const p_instance) +{ + return nrf_rtc_counter_get(p_instance->p_reg); +} + +__STATIC_INLINE void nrfx_rtc_counter_clear(nrfx_rtc_t const * const p_instance) +{ + nrf_rtc_task_trigger(p_instance->p_reg, NRF_RTC_TASK_CLEAR); +} + +__STATIC_INLINE uint32_t nrfx_rtc_task_address_get(nrfx_rtc_t const * const p_instance, + nrf_rtc_task_t task) +{ + return nrf_rtc_task_address_get(p_instance->p_reg, task); +} + +__STATIC_INLINE uint32_t nrfx_rtc_event_address_get(nrfx_rtc_t const * const p_instance, + nrf_rtc_event_t event) +{ + return nrf_rtc_event_address_get(p_instance->p_reg, event); +} +#endif // SUPPRESS_INLINE_IMPLEMENTATION + + +void nrfx_rtc_0_irq_handler(void); +void nrfx_rtc_1_irq_handler(void); +void nrfx_rtc_2_irq_handler(void); + + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_RTC_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_saadc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_saadc.h new file mode 100644 index 00000000000..76532d4da3e --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_saadc.h @@ -0,0 +1,326 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_SAADC_H__ +#define NRFX_SAADC_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_saadc SAADC driver + * @{ + * @ingroup nrf_saadc + * @brief Successive Approximation Analog-to-Digital Converter (SAADC) peripheral driver. + */ + +/** + * @brief Value that should be set as high limit to disable limit detection. + */ +#define NRFX_SAADC_LIMITH_DISABLED (2047) +/** + * @brief Value that should be set as low limit to disable limit detection. + */ +#define NRFX_SAADC_LIMITL_DISABLED (-2048) + +/** + * @brief Macro for setting @ref nrfx_saadc_config_t to default settings. + */ +#define NRFX_SAADC_DEFAULT_CONFIG \ +{ \ + .resolution = (nrf_saadc_resolution_t)NRFX_SAADC_CONFIG_RESOLUTION, \ + .oversample = (nrf_saadc_oversample_t)NRFX_SAADC_CONFIG_OVERSAMPLE, \ + .interrupt_priority = NRFX_SAADC_CONFIG_IRQ_PRIORITY, \ + .low_power_mode = NRFX_SAADC_CONFIG_LP_MODE \ +} + +/** + * @brief Macro for setting @ref nrf_saadc_channel_config_t to default settings + * in single ended mode. + * + * @param PIN_P Analog input. + */ +#define NRFX_SAADC_DEFAULT_CHANNEL_CONFIG_SE(PIN_P) \ +{ \ + .resistor_p = NRF_SAADC_RESISTOR_DISABLED, \ + .resistor_n = NRF_SAADC_RESISTOR_DISABLED, \ + .gain = NRF_SAADC_GAIN1_6, \ + .reference = NRF_SAADC_REFERENCE_INTERNAL, \ + .acq_time = NRF_SAADC_ACQTIME_10US, \ + .mode = NRF_SAADC_MODE_SINGLE_ENDED, \ + .burst = NRF_SAADC_BURST_DISABLED, \ + .pin_p = (nrf_saadc_input_t)(PIN_P), \ + .pin_n = NRF_SAADC_INPUT_DISABLED \ +} + +/** + * @brief Macro for setting @ref nrf_saadc_channel_config_t to default settings + * in differential mode. + * + * @param PIN_P Positive analog input. + * @param PIN_N Negative analog input. + */ +#define NRFX_SAADC_DEFAULT_CHANNEL_CONFIG_DIFFERENTIAL(PIN_P, PIN_N) \ +{ \ + .resistor_p = NRF_SAADC_RESISTOR_DISABLED, \ + .resistor_n = NRF_SAADC_RESISTOR_DISABLED, \ + .gain = NRF_SAADC_GAIN1_6, \ + .reference = NRF_SAADC_REFERENCE_INTERNAL, \ + .acq_time = NRF_SAADC_ACQTIME_10US, \ + .mode = NRF_SAADC_MODE_DIFFERENTIAL, \ + .pin_p = (nrf_saadc_input_t)(PIN_P), \ + .pin_n = (nrf_saadc_input_t)(PIN_N) \ +} + +/** + * @brief Analog-to-digital converter driver configuration structure. + */ +typedef struct +{ + nrf_saadc_resolution_t resolution; ///< Resolution configuration. + nrf_saadc_oversample_t oversample; ///< Oversampling configuration. + uint8_t interrupt_priority; ///< Interrupt priority. + bool low_power_mode; ///< Indicates if low power mode is active. +} nrfx_saadc_config_t; + +/** + * @brief Driver event types. + */ +typedef enum +{ + NRFX_SAADC_EVT_DONE, ///< Event generated when the buffer is filled with samples. + NRFX_SAADC_EVT_LIMIT, ///< Event generated after one of the limits is reached. + NRFX_SAADC_EVT_CALIBRATEDONE ///< Event generated when the calibration is complete. +} nrfx_saadc_evt_type_t; + +/** + * @brief Analog-to-digital converter driver done event data. + */ +typedef struct +{ + nrf_saadc_value_t * p_buffer; ///< Pointer to buffer with converted samples. + uint16_t size; ///< Number of samples in the buffer. +} nrfx_saadc_done_evt_t; + +/** + * @brief Analog-to-digital converter driver limit event data. + */ +typedef struct +{ + uint8_t channel; ///< Channel on which the limit was detected. + nrf_saadc_limit_t limit_type; ///< Type of limit detected. +} nrfx_saadc_limit_evt_t; + +/** + * @brief Analog-to-digital converter driver event structure. + */ +typedef struct +{ + nrfx_saadc_evt_type_t type; ///< Event type. + union + { + nrfx_saadc_done_evt_t done; ///< Data for @ref NRFX_SAADC_EVT_DONE event. + nrfx_saadc_limit_evt_t limit; ///< Data for @ref NRFX_SAADC_EVT_LIMIT event. + } data; +} nrfx_saadc_evt_t; + +/** + * @brief ADC event handler. + * + * @param[in] p_event Pointer to an ADC event. The event structure is allocated on + * the stack, so it is valid only within the context of + * the event handler. + */ +typedef void (* nrfx_saadc_event_handler_t)(nrfx_saadc_evt_t const * p_event); + +/** + * @brief Function for initializing the SAADC. + * + * @param[in] p_config Pointer to the structure with initial configuration. + * @param[in] event_handler Event handler provided by the user. + * Must not be NULL. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_INVALID_STATE If the driver is already initialized. + */ +nrfx_err_t nrfx_saadc_init(nrfx_saadc_config_t const * p_config, + nrfx_saadc_event_handler_t event_handler); + +/** + * @brief Function for uninitializing the SAADC. + * + * This function stops all ongoing conversions and disables all channels. + */ +void nrfx_saadc_uninit(void); + + +/** + * @brief Function for getting the address of a SAMPLE SAADC task. + * + * @return Task address. + */ +uint32_t nrfx_saadc_sample_task_get(void); + +/** + * @brief Function for initializing an SAADC channel. + * + * This function configures and enables the channel. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_INVALID_STATE If the ADC was not initialized. + * @retval NRFX_ERROR_NO_MEM If the specified channel was already allocated. + */ +nrfx_err_t nrfx_saadc_channel_init(uint8_t channel, + nrf_saadc_channel_config_t const * const p_config); + + +/** + * @brief Function for uninitializing an SAADC channel. + * + * @retval NRFX_SUCCESS If uninitialization was successful. + * @retval NRFX_ERROR_BUSY If the ADC is busy. + */ +nrfx_err_t nrfx_saadc_channel_uninit(uint8_t channel); + +/** + * @brief Function for starting SAADC sampling. + * + * @retval NRFX_SUCCESS If ADC sampling was triggered. + * @retval NRFX_ERROR_INVALID_STATE If ADC is in idle state. + */ +nrfx_err_t nrfx_saadc_sample(void); + +/** + * @brief Blocking function for executing a single ADC conversion. + * + * This function selects the desired input, starts a single conversion, + * waits for it to finish, and returns the result. + * + * The function will fail if ADC is busy. + * + * @param[in] channel Channel. + * @param[out] p_value Pointer to the location where the result should be placed. + * + * @retval NRFX_SUCCESS If conversion was successful. + * @retval NRFX_ERROR_BUSY If the ADC driver is busy. + */ +nrfx_err_t nrfx_saadc_sample_convert(uint8_t channel, nrf_saadc_value_t * p_value); + +/** + * @brief Function for issuing conversion of data to the buffer. + * + * This function is non-blocking. The application is notified about filling the buffer by the event + * handler. Conversion will be done on all enabled channels. If the ADC is in idle state, the + * function will set up Easy DMA for the conversion. The ADC will be ready for sampling and wait for + * the SAMPLE task. It can be triggered manually by the @ref nrfx_saadc_sample function or by PPI + * using the @ref NRF_SAADC_TASK_SAMPLE task. If one buffer is already set and the conversion is + * ongoing, calling this function will result in queuing the given buffer. The driver will start + * filling the issued buffer when the first one is completed. If the function is called again before + * the first buffer is filled or calibration is in progress, it will return with error. + * + * @param[in] buffer Result buffer. + * @param[in] size Buffer size in words. + * + * @retval NRFX_SUCCESS If conversion was successful. + * @retval NRFX_ERROR_BUSY If the driver already has two buffers set or calibration is in progress. + */ +nrfx_err_t nrfx_saadc_buffer_convert(nrf_saadc_value_t * buffer, uint16_t size); + +/** + * @brief Function for triggering the ADC offset calibration. + * + * This function is non-blocking. The application is notified about completion by the event handler. + * Calibration will also trigger DONE and RESULTDONE events. + * + * The function will fail if ADC is busy or calibration is already in progress. + * + * @retval NRFX_SUCCESS If calibration was started successfully. + * @retval NRFX_ERROR_BUSY If the ADC driver is busy. + */ +nrfx_err_t nrfx_saadc_calibrate_offset(void); + +/** + * @brief Function for retrieving the SAADC state. + * + * @retval true If the ADC is busy. + * @retval false If the ADC is ready. + */ +bool nrfx_saadc_is_busy(void); + +/** + * @brief Function for aborting ongoing and buffered conversions. + * @note @ref NRFX_SAADC_EVT_DONE event will be generated if there is a conversion in progress. + * Event will contain number of words in the sample buffer. + */ +void nrfx_saadc_abort(void); + +/** + * @brief Function for setting the SAADC channel limits. + * When limits are enabled and the result exceeds the defined bounds, the limit handler + * function is called. + * + * @param[in] channel SAADC channel number. + * @param[in] limit_low Lower limit (valid values from @ref NRFX_SAADC_LIMITL_DISABLED to + * @ref NRFX_SAADC_LIMITH_DISABLED). Conversion results below this value will + * trigger the handler function. Set to @ref NRFX_SAADC_LIMITL_DISABLED + * to disable this limit. + * @param[in] limit_high Upper limit (valid values from @ref NRFX_SAADC_LIMITL_DISABLED to + * @ref NRFX_SAADC_LIMITH_DISABLED). Conversion results above this value will + * trigger the handler function. Set to @ref NRFX_SAADC_LIMITH_DISABLED + * to disable this limit. + */ +void nrfx_saadc_limits_set(uint8_t channel, int16_t limit_low, int16_t limit_high); + + +void nrfx_saadc_irq_handler(void); + + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_SAADC_H__ + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_spi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_spi.h new file mode 100644 index 00000000000..edd10bcbd3b --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_spi.h @@ -0,0 +1,273 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_SPI_H__ +#define NRFX_SPI_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_spi SPI driver + * @{ + * @ingroup nrf_spi + * @brief SPI peripheral driver. + */ + +/** + * @brief SPI master driver instance data structure. + */ +typedef struct +{ + NRF_SPI_Type * p_reg; ///< Pointer to a structure with SPI registers. + uint8_t drv_inst_idx; ///< Driver instance index. +} nrfx_spi_t; + +enum { +#if NRFX_CHECK(NRFX_SPI0_ENABLED) + NRFX_SPI0_INST_IDX, +#endif +#if NRFX_CHECK(NRFX_SPI1_ENABLED) + NRFX_SPI1_INST_IDX, +#endif +#if NRFX_CHECK(NRFX_SPI2_ENABLED) + NRFX_SPI2_INST_IDX, +#endif + NRFX_SPI_ENABLED_COUNT +}; + +/** + * @brief Macro for creating an SPI master driver instance. + */ +#define NRFX_SPI_INSTANCE(id) \ +{ \ + .p_reg = NRFX_CONCAT_2(NRF_SPI, id), \ + .drv_inst_idx = NRFX_CONCAT_3(NRFX_SPI, id, _INST_IDX), \ +} + +/** + * @brief This value can be provided instead of a pin number for signals MOSI, + * MISO, and Slave Select to specify that the given signal is not used and + * therefore does not need to be connected to a pin. + */ +#define NRFX_SPI_PIN_NOT_USED 0xFF + +/** + * @brief SPI master driver instance configuration structure. + */ +typedef struct +{ + uint8_t sck_pin; ///< SCK pin number. + uint8_t mosi_pin; ///< MOSI pin number (optional). + /**< Set to @ref NRFX_SPI_PIN_NOT_USED + * if this signal is not needed. */ + uint8_t miso_pin; ///< MISO pin number (optional). + /**< Set to @ref NRFX_SPI_PIN_NOT_USED + * if this signal is not needed. */ + uint8_t ss_pin; ///< Slave Select pin number (optional). + /**< Set to @ref NRFX_SPI_PIN_NOT_USED + * if this signal is not needed. The driver + * supports only active low for this signal. + * If the signal should be active high, + * it must be controlled externally. */ + uint8_t irq_priority; ///< Interrupt priority. + uint8_t orc; ///< Over-run character. + /**< This character is used when all bytes from the TX buffer are sent, + but the transfer continues due to RX. */ + nrf_spi_frequency_t frequency; ///< SPI frequency. + nrf_spi_mode_t mode; ///< SPI mode. + nrf_spi_bit_order_t bit_order; ///< SPI bit order. +} nrfx_spi_config_t; + +/** + * @brief SPI master instance default configuration. + */ +#define NRFX_SPI_DEFAULT_CONFIG \ +{ \ + .sck_pin = NRFX_SPI_PIN_NOT_USED, \ + .mosi_pin = NRFX_SPI_PIN_NOT_USED, \ + .miso_pin = NRFX_SPI_PIN_NOT_USED, \ + .ss_pin = NRFX_SPI_PIN_NOT_USED, \ + .irq_priority = NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY, \ + .orc = 0xFF, \ + .frequency = NRF_SPI_FREQ_4M, \ + .mode = NRF_SPI_MODE_0, \ + .bit_order = NRF_SPI_BIT_ORDER_MSB_FIRST, \ +} + +/** + * @brief Single transfer descriptor structure. + */ +typedef struct +{ + uint8_t const * p_tx_buffer; ///< Pointer to TX buffer. + size_t tx_length; ///< TX buffer length. + uint8_t * p_rx_buffer; ///< Pointer to RX buffer. + size_t rx_length; ///< RX buffer length. +} nrfx_spi_xfer_desc_t; + +/** + * @brief Macro for setting up single transfer descriptor. + * + * This macro is for internal use only. + */ +#define NRFX_SPI_SINGLE_XFER(p_tx, tx_len, p_rx, rx_len) \ + { \ + .p_tx_buffer = (uint8_t const *)(p_tx), \ + .tx_length = (tx_len), \ + .p_rx_buffer = (p_rx), \ + .rx_length = (rx_len), \ + } + +/** + * @brief Macro for setting duplex TX RX transfer. + */ +#define NRFX_SPI_XFER_TRX(p_tx_buf, tx_length, p_rx_buf, rx_length) \ + NRFX_SPI_SINGLE_XFER(p_tx_buf, tx_length, p_rx_buf, rx_length) + +/** + * @brief Macro for setting TX transfer. + */ +#define NRFX_SPI_XFER_TX(p_buf, length) \ + NRFX_SPI_SINGLE_XFER(p_buf, length, NULL, 0) + +/** + * @brief Macro for setting RX transfer. + */ +#define NRFX_SPI_XFER_RX(p_buf, length) \ + NRFX_SPI_SINGLE_XFER(NULL, 0, p_buf, length) + +/** + * @brief SPI master driver event types, passed to the handler routine provided + * during initialization. + */ +typedef enum +{ + NRFX_SPI_EVENT_DONE, ///< Transfer done. +} nrfx_spi_evt_type_t; + +typedef struct +{ + nrfx_spi_evt_type_t type; ///< Event type. + nrfx_spi_xfer_desc_t xfer_desc; ///< Transfer details. +} nrfx_spi_evt_t; + +/** + * @brief SPI master driver event handler type. + */ +typedef void (* nrfx_spi_evt_handler_t)(nrfx_spi_evt_t const * p_event, + void * p_context); + +/** + * @brief Function for initializing the SPI master driver instance. + * + * This function configures and enables the specified peripheral. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_config Pointer to the structure with initial configuration. + * + * @param handler Event handler provided by the user. If NULL, transfers + * will be performed in blocking mode. + * @param p_context Context passed to event handler. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_INVALID_STATE If the driver was already initialized. + * @retval NRFX_ERROR_BUSY If some other peripheral with the same + * instance ID is already in use. This is + * possible only if @ref nrfx_prs module + * is enabled. + */ +nrfx_err_t nrfx_spi_init(nrfx_spi_t const * const p_instance, + nrfx_spi_config_t const * p_config, + nrfx_spi_evt_handler_t handler, + void * p_context); + +/** + * @brief Function for uninitializing the SPI master driver instance. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_spi_uninit(nrfx_spi_t const * const p_instance); + +/** + * @brief Function for starting the SPI data transfer. + * + * If an event handler was provided in the @ref nrfx_spi_init call, this function + * returns immediately and the handler is called when the transfer is done. + * Otherwise, the transfer is performed in blocking mode, which means that this function + * returns when the transfer is finished. + * + * @param p_instance Pointer to the driver instance structure. + * @param p_xfer_desc Pointer to the transfer descriptor. + * @param flags Transfer options (0 for default settings). + * Currently, no additional flags are available. + * + * @retval NRFX_SUCCESS If the procedure was successful. + * @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer. + * @retval NRFX_ERROR_NOT_SUPPORTED If the provided parameters are not supported. + */ +nrfx_err_t nrfx_spi_xfer(nrfx_spi_t const * const p_instance, + nrfx_spi_xfer_desc_t const * p_xfer_desc, + uint32_t flags); + +/** + * @brief Function for aborting ongoing transfer. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_spi_abort(nrfx_spi_t const * p_instance); + + +void nrfx_spi_0_irq_handler(void); +void nrfx_spi_1_irq_handler(void); +void nrfx_spi_2_irq_handler(void); + + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_SPI_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_spim.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_spim.h new file mode 100644 index 00000000000..3490f110235 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_spim.h @@ -0,0 +1,396 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_SPIM_H__ +#define NRFX_SPIM_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_spim SPIM driver + * @{ + * @ingroup nrf_spim + * @brief SPIM peripheral driver. + */ + +/** + * @brief SPIM master driver instance data structure. + */ +typedef struct +{ + NRF_SPIM_Type * p_reg; ///< Pointer to a structure with SPIM registers. + uint8_t drv_inst_idx; ///< Driver instance index. +} nrfx_spim_t; + +enum { +#if NRFX_CHECK(NRFX_SPIM0_ENABLED) + NRFX_SPIM0_INST_IDX, +#endif +#if NRFX_CHECK(NRFX_SPIM1_ENABLED) + NRFX_SPIM1_INST_IDX, +#endif +#if NRFX_CHECK(NRFX_SPIM2_ENABLED) + NRFX_SPIM2_INST_IDX, +#endif +#if NRFX_CHECK(NRFX_SPIM3_ENABLED) + NRFX_SPIM3_INST_IDX, +#endif + NRFX_SPIM_ENABLED_COUNT +}; + +/** + * @brief Macro for creating an SPIM master driver instance. + */ +#define NRFX_SPIM_INSTANCE(id) \ +{ \ + .p_reg = NRFX_CONCAT_2(NRF_SPIM, id), \ + .drv_inst_idx = NRFX_CONCAT_3(NRFX_SPIM, id, _INST_IDX), \ +} + +/** + * @brief This value can be provided instead of a pin number for signals MOSI, + * MISO, and Slave Select to specify that the given signal is not used and + * therefore does not need to be connected to a pin. + */ +#define NRFX_SPIM_PIN_NOT_USED 0xFF + +/** + * @brief SPIM master driver instance configuration structure. + */ +typedef struct +{ + uint8_t sck_pin; ///< SCK pin number. + uint8_t mosi_pin; ///< MOSI pin number (optional). + /**< Set to @ref NRFX_SPIM_PIN_NOT_USED + * if this signal is not needed. */ + uint8_t miso_pin; ///< MISO pin number (optional). + /**< Set to @ref NRFX_SPIM_PIN_NOT_USED + * if this signal is not needed. */ + uint8_t ss_pin; ///< Slave Select pin number (optional). + /**< Set to @ref NRFX_SPIM_PIN_NOT_USED + * if this signal is not needed. */ + bool ss_active_high; ///< Polarity of the Slave Select pin during transmission. + uint8_t irq_priority; ///< Interrupt priority. + uint8_t orc; ///< Over-run character. + /**< This character is used when all bytes from the TX buffer are sent, + but the transfer continues due to RX. */ + nrf_spim_frequency_t frequency; ///< SPI frequency. + nrf_spim_mode_t mode; ///< SPI mode. + nrf_spim_bit_order_t bit_order; ///< SPI bit order. +#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) || defined(__NRFX_DOXYGEN__) + uint8_t dcx_pin; ///< D/CX pin number (optional). + uint8_t rx_delay; ///< Sample delay for input serial data on MISO. + /**< The value specifies the delay, in number of 64 MHz clock cycles + * (15.625 ns), from the the sampling edge of SCK (leading edge for + * CONFIG.CPHA = 0, trailing edge for CONFIG.CPHA = 1) until + * the input serial data is sampled.*/ + bool use_hw_ss; ///< Indication to use software or hardware controlled Slave Select pin. + uint8_t ss_duration; ///< Slave Select duration before and after transmission. + /**< Minimum duration between the edge of CSN and the edge of SCK and minimum + * duration of CSN must stay inactive between transactions. + * The value is specified in number of 64 MHz clock cycles (15.625 ns). + * Supported only for hardware controlled Slave Select.*/ +#endif +} nrfx_spim_config_t; + +#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) || defined(__NRFX_DOXYGEN__) +/** + * @brief SPIM master instance extended default configuration. + */ + #define NRFX_SPIM_DEFAULT_EXTENDED_CONFIG \ + .dcx_pin = NRFX_SPIM_PIN_NOT_USED, \ + .rx_delay = 0x00, \ + .ss_duration = 0x00, \ + .use_hw_ss = false, +#else + #define NRFX_SPIM_DEFAULT_EXTENDED_CONFIG +#endif + +/** + * @brief SPIM master instance default configuration. + */ +#define NRFX_SPIM_DEFAULT_CONFIG \ +{ \ + .sck_pin = NRFX_SPIM_PIN_NOT_USED, \ + .mosi_pin = NRFX_SPIM_PIN_NOT_USED, \ + .miso_pin = NRFX_SPIM_PIN_NOT_USED, \ + .ss_pin = NRFX_SPIM_PIN_NOT_USED, \ + .ss_active_high = false, \ + .irq_priority = NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY, \ + .orc = 0xFF, \ + .frequency = NRF_SPIM_FREQ_4M, \ + .mode = NRF_SPIM_MODE_0, \ + .bit_order = NRF_SPIM_BIT_ORDER_MSB_FIRST, \ + NRFX_SPIM_DEFAULT_EXTENDED_CONFIG \ +} + +#define NRFX_SPIM_FLAG_TX_POSTINC (1UL << 0) /**< TX buffer address incremented after transfer. */ +#define NRFX_SPIM_FLAG_RX_POSTINC (1UL << 1) /**< RX buffer address incremented after transfer. */ +#define NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER (1UL << 2) /**< Interrupt after each transfer is suppressed, and the event handler is not called. */ +#define NRFX_SPIM_FLAG_HOLD_XFER (1UL << 3) /**< Set up the transfer but do not start it. */ +#define NRFX_SPIM_FLAG_REPEATED_XFER (1UL << 4) /**< Flag indicating that the transfer will be executed multiple times. */ + +/** + * @brief Single transfer descriptor structure. + */ +typedef struct +{ + uint8_t const * p_tx_buffer; ///< Pointer to TX buffer. + size_t tx_length; ///< TX buffer length. + uint8_t * p_rx_buffer; ///< Pointer to RX buffer. + size_t rx_length; ///< RX buffer length. +} nrfx_spim_xfer_desc_t; + +/** + * @brief Macro for setting up single transfer descriptor. + * + * This macro is for internal use only. + */ +#define NRFX_SPIM_SINGLE_XFER(p_tx, tx_len, p_rx, rx_len) \ + { \ + .p_tx_buffer = (uint8_t const *)(p_tx), \ + .tx_length = (tx_len), \ + .p_rx_buffer = (p_rx), \ + .rx_length = (rx_len), \ + } + +/** + * @brief Macro for setting duplex TX RX transfer. + */ +#define NRFX_SPIM_XFER_TRX(p_tx_buf, tx_length, p_rx_buf, rx_length) \ + NRFX_SPIM_SINGLE_XFER(p_tx_buf, tx_length, p_rx_buf, rx_length) + +/** + * @brief Macro for setting TX transfer. + */ +#define NRFX_SPIM_XFER_TX(p_buf, length) \ + NRFX_SPIM_SINGLE_XFER(p_buf, length, NULL, 0) + +/** + * @brief Macro for setting RX transfer. + */ +#define NRFX_SPIM_XFER_RX(p_buf, length) \ + NRFX_SPIM_SINGLE_XFER(NULL, 0, p_buf, length) + +/** + * @brief SPIM master driver event types, passed to the handler routine provided + * during initialization. + */ +typedef enum +{ + NRFX_SPIM_EVENT_DONE, ///< Transfer done. +} nrfx_spim_evt_type_t; + +typedef struct +{ + nrfx_spim_evt_type_t type; ///< Event type. + nrfx_spim_xfer_desc_t xfer_desc; ///< Transfer details. +} nrfx_spim_evt_t; + +/** + * @brief SPIM master driver event handler type. + */ +typedef void (* nrfx_spim_evt_handler_t)(nrfx_spim_evt_t const * p_event, + void * p_context); + +/** + * @brief Function for initializing the SPI master driver instance. + * + * This function configures and enables the specified peripheral. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_config Pointer to the structure with initial configuration. + * + * @param handler Event handler provided by the user. If NULL, transfers + * will be performed in blocking mode. + * @param p_context Context passed to event handler. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_INVALID_STATE If the driver was already initialized. + * @retval NRFX_ERROR_BUSY If some other peripheral with the same + * instance ID is already in use. This is + * possible only if @ref nrfx_prs module + * is enabled. + * @retval NRFX_ERROR_NOT_SUPPORTED If requested configuration is not supported + * by the SPIM instance. + */ +nrfx_err_t nrfx_spim_init(nrfx_spim_t const * const p_instance, + nrfx_spim_config_t const * p_config, + nrfx_spim_evt_handler_t handler, + void * p_context); + +/** + * @brief Function for uninitializing the SPI master driver instance. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_spim_uninit(nrfx_spim_t const * const p_instance); + +/** + * @brief Function for starting the SPI data transfer. + * + * Additional options are provided using the @c flags parameter: + * + * - @ref NRFX_SPIM_FLAG_TX_POSTINC and @ref NRFX_SPIM_FLAG_RX_POSTINC: + * Post-incrementation of buffer addresses. Supported only by SPIM. + * - @ref NRFX_SPIM_FLAG_HOLD_XFER: Driver is not starting the transfer. Use this + * flag if the transfer is triggered externally by PPI. Supported only by SPIM. Use + * @ref nrfx_spim_start_task_get to get the address of the start task. + * - @ref NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER: No user event handler after transfer + * completion. This also means no interrupt at the end of the transfer. Supported only by SPIM. + * If @ref NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER is used, the driver does not set the instance into + * busy state, so you must ensure that the next transfers are set up when SPIM is not active. + * @ref nrfx_spim_end_event_get function can be used to detect end of transfer. Option can be used + * together with @ref NRFX_SPIM_FLAG_REPEATED_XFER to prepare a sequence of SPI transfers + * without interruptions. + * - @ref NRFX_SPIM_FLAG_REPEATED_XFER: Prepare for repeated transfers. You can set + * up a number of transfers that will be triggered externally (for example by PPI). An example is + * a TXRX transfer with the options @ref NRFX_SPIM_FLAG_RX_POSTINC, + * @ref NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER, and @ref NRFX_SPIM_FLAG_REPEATED_XFER. After the + * transfer is set up, a set of transfers can be triggered by PPI that will read, for example, + * the same register of an external component and put it into a RAM buffer without any interrupts. + * @ref nrfx_spim_end_event_get can be used to get the address of the END event, which can be + * used to count the number of transfers. If @ref NRFX_SPIM_FLAG_REPEATED_XFER is used, + * the driver does not set the instance into busy state, so you must ensure that the next + * transfers are set up when SPIM is not active. Supported only by SPIM. + * + * @note Peripherals using EasyDMA (including SPIM) require the transfer buffers + * to be placed in the Data RAM region. If this condition is not met, + * this function will fail with the error code NRFX_ERROR_INVALID_ADDR. + * + * @param p_instance Pointer to the driver instance structure. + * @param p_xfer_desc Pointer to the transfer descriptor. + * @param flags Transfer options (0 for default settings). + * + * @retval NRFX_SUCCESS If the procedure was successful. + * @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer. + * @retval NRFX_ERROR_NOT_SUPPORTED If the provided parameters are not supported. + * @retval NRFX_ERROR_INVALID_ADDR If the provided buffers are not placed in the Data + * RAM region. + */ +nrfx_err_t nrfx_spim_xfer(nrfx_spim_t const * const p_instance, + nrfx_spim_xfer_desc_t const * p_xfer_desc, + uint32_t flags); + +#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) || defined(__NRFX_DOXYGEN__) +/** + * @brief Function for starting the SPI data transfer with DCX control. + * + * See @ref nrfx_spim_xfer for description of additional options of transfer + * provided by the @c flags parameter. + * + * @note Peripherals that use EasyDMA (including SPIM) require the transfer buffers + * to be placed in the Data RAM region. If this condition is not met, + * this function will fail with the error code NRFX_ERROR_INVALID_ADDR. + * + * @param p_instance Pointer to the driver instance structure. + * @param p_xfer_desc Pointer to the transfer descriptor. + * @param flags Transfer options (0 for default settings). + * @param cmd_length Length of the command bytes preceding the data + * bytes. The DCX line will be low during transmission + * of command bytes and high during transmission of data bytes. + * Maximum value available for dividing the transmitted bytes + * into command bytes and data bytes is @ref NRF_SPIM_DCX_CNT_ALL_CMD - 1. + * The @ref NRF_SPIM_DCX_CNT_ALL_CMD value passed as the + * @c cmd_length parameter causes all transmitted bytes + * to be marked as command bytes. + * + * @retval NRFX_SUCCESS If the procedure was successful. + * @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer. + * @retval NRFX_ERROR_NOT_SUPPORTED If the provided parameters are not supported. + * @retval NRFX_ERROR_INVALID_ADDR If the provided buffers are not placed in the Data + * RAM region. + */ +nrfx_err_t nrfx_spim_xfer_dcx(nrfx_spim_t const * const p_instance, + nrfx_spim_xfer_desc_t const * p_xfer_desc, + uint32_t flags, + uint8_t cmd_length); +#endif + +/** + * @brief Function for returning the address of a SPIM start task. + * + * This function should be used if @ref nrfx_spim_xfer was called with the flag @ref NRFX_SPIM_FLAG_HOLD_XFER. + * In that case, the transfer is not started by the driver, but it must be started externally by PPI. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @return Start task address. + */ +uint32_t nrfx_spim_start_task_get(nrfx_spim_t const * p_instance); + +/** + * @brief Function for returning the address of a END SPIM event. + * + * The END event can be used to detect the end of a transfer + * if the @ref NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER option is used. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @return END event address. + */ +uint32_t nrfx_spim_end_event_get(nrfx_spim_t const * p_instance); + +/** + * @brief Function for aborting ongoing transfer. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_spim_abort(nrfx_spim_t const * p_instance); + + +void nrfx_spim_0_irq_handler(void); +void nrfx_spim_1_irq_handler(void); +void nrfx_spim_2_irq_handler(void); +void nrfx_spim_3_irq_handler(void); + + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_SPIM_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_spis.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_spis.h new file mode 100644 index 00000000000..b16b29f06c9 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_spis.h @@ -0,0 +1,250 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_SPIS_H__ +#define NRFX_SPIS_H__ + +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_spis SPI slave driver + * @{ + * @ingroup nrf_spis + * @brief SPI Slave peripheral driver. + */ + +/** @brief SPI slave driver instance data structure. */ +typedef struct +{ + NRF_SPIS_Type * p_reg; //!< Pointer to a structure with SPIS registers. + uint8_t drv_inst_idx; //!< Driver instance index. +} nrfx_spis_t; + +enum { +#if NRFX_CHECK(NRFX_SPIS0_ENABLED) + NRFX_SPIS0_INST_IDX, +#endif +#if NRFX_CHECK(NRFX_SPIS1_ENABLED) + NRFX_SPIS1_INST_IDX, +#endif +#if NRFX_CHECK(NRFX_SPIS2_ENABLED) + NRFX_SPIS2_INST_IDX, +#endif + NRFX_SPIS_ENABLED_COUNT +}; + +/** @brief Macro for creating an SPI slave driver instance. */ +#define NRFX_SPIS_INSTANCE(id) \ +{ \ + .p_reg = NRFX_CONCAT_2(NRF_SPIS, id), \ + .drv_inst_idx = NRFX_CONCAT_3(NRFX_SPIS, id, _INST_IDX), \ +} + +/** + * @brief This value can be provided instead of a pin number for the signals MOSI + * and MISO to specify that the given signal is not used and therefore + * does not need to be connected to a pin. + */ +#define NRFX_SPIS_PIN_NOT_USED 0xFF + +/** @brief Default pull-up configuration of the SPI CS. */ +#define NRFX_SPIS_DEFAULT_CSN_PULLUP NRF_GPIO_PIN_NOPULL +/** @brief Default drive configuration of the SPI MISO. */ +#define NRFX_SPIS_DEFAULT_MISO_DRIVE NRF_GPIO_PIN_S0S1 + +/** @brief SPI slave driver event types. */ +typedef enum +{ + NRFX_SPIS_BUFFERS_SET_DONE, //!< Memory buffer set event. Memory buffers have been set successfully to the SPI slave device, and SPI transaction can be done. + NRFX_SPIS_XFER_DONE, //!< SPI transaction event. SPI transaction has been completed. + NRFX_SPIS_EVT_TYPE_MAX //!< Enumeration upper bound. +} nrfx_spis_evt_type_t; + +/** @brief SPI slave driver event structure. */ +typedef struct +{ + nrfx_spis_evt_type_t evt_type; //!< Type of the event. + size_t rx_amount; //!< Number of bytes received in the last transaction. This parameter is only valid for @ref NRFX_SPIS_XFER_DONE events. + size_t tx_amount; //!< Number of bytes transmitted in the last transaction. This parameter is only valid for @ref NRFX_SPIS_XFER_DONE events. +} nrfx_spis_evt_t; + +/** @brief SPI slave instance default configuration. */ +#define NRFX_SPIS_DEFAULT_CONFIG \ +{ \ + .sck_pin = NRFX_SPIS_PIN_NOT_USED, \ + .mosi_pin = NRFX_SPIS_PIN_NOT_USED, \ + .miso_pin = NRFX_SPIS_PIN_NOT_USED, \ + .csn_pin = NRFX_SPIS_PIN_NOT_USED, \ + .mode = NRF_SPIS_MODE_0, \ + .bit_order = NRF_SPIS_BIT_ORDER_MSB_FIRST, \ + .csn_pullup = NRFX_SPIS_DEFAULT_CSN_PULLUP, \ + .miso_drive = NRFX_SPIS_DEFAULT_MISO_DRIVE, \ + .def = NRFX_SPIS_DEFAULT_DEF, \ + .orc = NRFX_SPIS_DEFAULT_ORC, \ + .irq_priority = NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY, \ +} + +/** @brief SPI peripheral device configuration data. */ +typedef struct +{ + uint32_t miso_pin; //!< SPI MISO pin (optional). + /**< Set @ref NRFX_SPIS_PIN_NOT_USED + * if this signal is not needed. */ + uint32_t mosi_pin; //!< SPI MOSI pin (optional). + /**< Set @ref NRFX_SPIS_PIN_NOT_USED + * if this signal is not needed. */ + uint32_t sck_pin; //!< SPI SCK pin. + uint32_t csn_pin; //!< SPI CSN pin. + nrf_spis_mode_t mode; //!< SPI mode. + nrf_spis_bit_order_t bit_order; //!< SPI transaction bit order. + nrf_gpio_pin_pull_t csn_pullup; //!< CSN pin pull-up configuration. + nrf_gpio_pin_drive_t miso_drive; //!< MISO pin drive configuration. + uint8_t def; //!< Character clocked out in case of an ignored transaction. + uint8_t orc; //!< Character clocked out after an over-read of the transmit buffer. + uint8_t irq_priority; //!< Interrupt priority. +} nrfx_spis_config_t; + + +/** + * @brief SPI slave driver event handler type. + * + * @param[in] p_event Pointer to the event structure. The structure is + * allocated on the stack so it is valid only until + * the event handler returns. + * @param[in] p_context Context set on initialization. + */ +typedef void (*nrfx_spis_event_handler_t)(nrfx_spis_evt_t const * p_event, + void * p_context); + +/** + * @brief Function for initializing the SPI slave driver instance. + * + * @note When the nRF52 Anomaly 109 workaround for SPIS is enabled, this function + * initializes the GPIOTE driver as well, and uses one of GPIOTE channels + * to detect falling edges on CSN pin. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_config Pointer to the structure with initial configuration. + * @param[in] event_handler Function to be called by the SPI slave driver upon event. + * Must not be NULL. + * @param[in] p_context Context passed to the event handler. + * + * @retval NRFX_SUCCESS If the initialization was successful. + * @retval NRFX_ERROR_INVALID_STATE If the instance is already initialized. + * @retval NRFX_ERROR_INVALID_PARAM If an invalid parameter is supplied. + * @retval NRFX_ERROR_BUSY If some other peripheral with the same + * instance ID is already in use. This is + * possible only if @ref nrfx_prs module + * is enabled. + * @retval NRFX_ERROR_INTERNAL GPIOTE channel for detecting falling edges + * on CSN pin cannot be initialized. Possible + * only when using nRF52 Anomaly 109 workaround. + */ +nrfx_err_t nrfx_spis_init(nrfx_spis_t const * const p_instance, + nrfx_spis_config_t const * p_config, + nrfx_spis_event_handler_t event_handler, + void * p_context); + +/** + * @brief Function for uninitializing the SPI slave driver instance. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_spis_uninit(nrfx_spis_t const * const p_instance); + +/** + * @brief Function for preparing the SPI slave instance for a single SPI transaction. + * + * This function prepares the SPI slave device to be ready for a single SPI transaction. It configures + * the SPI slave device to use the memory supplied with the function call in SPI transactions. + * + * When either the memory buffer configuration or the SPI transaction has been + * completed, the event callback function will be called with the appropriate event + * @ref nrfx_spis_evt_type_t. Note that the callback function can be called before returning from + * this function, because it is called from the SPI slave interrupt context. + * + * @note This function can be called from the callback function context. + * + * @note Client applications must call this function after every @ref NRFX_SPIS_XFER_DONE event if + * the SPI slave driver should be prepared for a possible new SPI transaction. + * + * @note Peripherals using EasyDMA (including SPIS) require the transfer buffers + * to be placed in the Data RAM region. If this condition is not met, + * this function will fail with the error code NRFX_ERROR_INVALID_ADDR. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_tx_buffer Pointer to the TX buffer. Can be NULL when the buffer length is zero. + * @param[in] p_rx_buffer Pointer to the RX buffer. Can be NULL when the buffer length is zero. + * @param[in] tx_buffer_length Length of the TX buffer in bytes. + * @param[in] rx_buffer_length Length of the RX buffer in bytes. + * + * @retval NRFX_SUCCESS If the operation was successful. + * @retval NRFX_ERROR_INVALID_STATE If the operation failed because the SPI slave device is in an incorrect state. + * @retval NRFX_ERROR_INVALID_ADDR If the provided buffers are not placed in the Data + * RAM region. + * @retval NRFX_ERROR_INVALID_LENGTH If provided lengths exceed the EasyDMA limits for the peripheral. + * @retval NRFX_ERROR_INTERNAL If the operation failed because of an internal error. + */ +nrfx_err_t nrfx_spis_buffers_set(nrfx_spis_t const * const p_instance, + uint8_t const * p_tx_buffer, + size_t tx_buffer_length, + uint8_t * p_rx_buffer, + size_t rx_buffer_length); + + +void nrfx_spis_0_irq_handler(void); +void nrfx_spis_1_irq_handler(void); +void nrfx_spis_2_irq_handler(void); + + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_SPIS_H__ + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_swi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_swi.h new file mode 100644 index 00000000000..92416aef13a --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_swi.h @@ -0,0 +1,222 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_SWI_H__ +#define NRFX_SWI_H__ + +#include + +#if NRFX_CHECK(NRFX_EGU_ENABLED) +#include +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_swi SWI driver + * @{ + * @ingroup nrf_swi_egu + * + * @brief Driver for managing software interrupts (SWI). + */ + +/** @brief SWI instance. */ +typedef uint8_t nrfx_swi_t; + +/** + * @brief SWI user flags. + * + * User flags are set during the SWI trigger and passed to the callback function as an argument. + */ +typedef uint16_t nrfx_swi_flags_t; + +/** @brief Unallocated instance value. */ +#define NRFX_SWI_UNALLOCATED ((nrfx_swi_t)0xFFuL) + +/** @brief Default SWI priority. */ +#define NRFX_SWI_DEFAULT_PRIORITY APP_IRQ_PRIORITY_LOWEST + +/** + * @brief SWI handler function. + * + * @param swi SWI instance. + * @param flags User flags. + */ +typedef void (*nrfx_swi_handler_t)(nrfx_swi_t swi, nrfx_swi_flags_t flags); + + +/** + * @brief Function for allocating the first unused SWI instance and setting a handler. + * + * @param[out] p_swi Points to a place where the allocated SWI instance + * number is to be stored. + * @param[in] event_handler Event handler function. + * If NULL, no interrupt will be enabled. + * It can be NULL only if the EGU driver is enabled. + * For classic SWI, it must be a valid handler pointer. + * @param[in] irq_priority Interrupt priority. + * + * @retval NRFX_SUCCESS If the SWI was successfully allocated. + * @retval NRFX_ERROR_NO_MEM If there is no available SWI to be used. + */ +nrfx_err_t nrfx_swi_alloc(nrfx_swi_t * p_swi, + nrfx_swi_handler_t event_handler, + uint32_t irq_priority); + +/** + * @brief Function for freeing a previously allocated SWI. + * + * @param[in,out] p_swi SWI instance to free. The value is changed to + * @ref NRFX_SWI_UNALLOCATED on success. + */ +void nrfx_swi_free(nrfx_swi_t * p_swi); + +/** @brief Function for freeing all allocated SWIs. */ +void nrfx_swi_all_free(void); + +/** + * @brief Function for triggering the SWI. + * + * @param[in] swi SWI to trigger. + * @param[in] flag_number Number of user flag to trigger. + */ +void nrfx_swi_trigger(nrfx_swi_t swi, + uint8_t flag_number); + +/** + * @brief Function for checking if the specified SWI is currently allocated. + * + * @param[in] swi SWI instance. + * + * @retval true If the SWI instance is allocated. + * @retval false Otherwise. + */ +bool nrfx_swi_is_allocated(nrfx_swi_t swi); + +#if NRFX_CHECK(NRFX_EGU_ENABLED) || defined(__NRFX_DOXYGEN__) + +/** + * @brief Function for returning the base address of the EGU peripheral + * associated with the specified SWI instance. + * + * @param[in] swi SWI instance. + * + * @returns EGU base address or NULL if the specified SWI instance number + * is too high. + */ +__STATIC_INLINE NRF_EGU_Type * nrfx_swi_egu_instance_get(nrfx_swi_t swi) +{ +#if (EGU_COUNT < SWI_COUNT) + if (swi >= EGU_COUNT) + { + return NULL; + } +#endif + uint32_t offset = ((uint32_t)swi) * (NRF_EGU1_BASE - NRF_EGU0_BASE); + return (NRF_EGU_Type *)(NRF_EGU0_BASE + offset); +} + +/** + * @brief Function for returning the EGU trigger task address. + * + * @param[in] swi SWI instance. + * @param[in] channel Number of the EGU channel. + * + * @returns Address of EGU trigger task. + */ +__STATIC_INLINE uint32_t nrfx_swi_task_trigger_address_get(nrfx_swi_t swi, + uint8_t channel) +{ + NRFX_ASSERT(nrfx_swi_is_allocated(swi)); + + NRF_EGU_Type * p_egu = nrfx_swi_egu_instance_get(swi); +#if (EGU_COUNT < SWI_COUNT) + if (p_egu == NULL) + { + return 0; + } +#endif + + return (uint32_t)nrf_egu_task_trigger_address_get(p_egu, channel); +} + +/** + * @brief Function for returning the EGU triggered event address. + * + * @param[in] swi SWI instance. + * @param[in] channel Number of the EGU channel. + * + * @returns Address of EGU triggered event. + */ +__STATIC_INLINE uint32_t nrfx_swi_event_triggered_address_get(nrfx_swi_t swi, + uint8_t channel) +{ + NRFX_ASSERT(nrfx_swi_is_allocated(swi)); + + NRF_EGU_Type * p_egu = nrfx_swi_egu_instance_get(swi); +#if (EGU_COUNT < SWI_COUNT) + if (p_egu == NULL) + { + return 0; + } +#endif + + return (uint32_t)nrf_egu_event_triggered_address_get(p_egu, channel); +} + +#endif // NRFX_CHECK(NRFX_EGU_ENABLED) || defined(__NRFX_DOXYGEN__) + + +void nrfx_swi_0_irq_handler(void); +void nrfx_swi_1_irq_handler(void); +void nrfx_swi_2_irq_handler(void); +void nrfx_swi_3_irq_handler(void); +void nrfx_swi_4_irq_handler(void); +void nrfx_swi_5_irq_handler(void); + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_SWI_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_systick.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_systick.h new file mode 100644 index 00000000000..16290744640 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_systick.h @@ -0,0 +1,135 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_SYSTICK_H__ +#define NRFX_SYSTICK_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_systick ARM(R) SysTick driver + * @{ + * @ingroup nrf_systick + * + * @brief ARM(R) SysTick driver. + * + * This driver configures ARM(R) SysTick as a free-running timer. + * This timer is used to generate delays and pool for timeouts. + * Only relatively short timeouts are supported. + * The SysTick works on 64MHz and is 24-bits wide. + * It means that it overflows around 4 times per second and around 250 ms + * would be the highest supported time in the library. + * But it would be really hard to detect if overflow was generated without + * using interrupts. For safety we would limit the maximum delay range by half. + */ + +/** + * @brief The value type that holds the SysTick state + * + * This variable is used to count the requested timeout. + * @sa nrfx_systick_get + */ +typedef struct { + uint32_t time; //!< Registered time value +} nrfx_systick_state_t; + +/** + * @brief Configure and start the timer + * + * Function configures SysTick as a free-running timer without interrupt. + */ +void nrfx_systick_init(void); + +/** + * @brief Get current SysTick state + * + * Function gets current state of the SysTick timer. + * It can be used to check time-out by @ref nrfx_systick_test. + * + * @param[out] p_state The pointer to the state variable to be filled + */ +void nrfx_systick_get(nrfx_systick_state_t * p_state); + +/** + * @brief Test if specified time is up in relation to remembered state + * + * @param[in] p_state Remembered state set by @ref nrfx_systick_get + * @param[in] us Required time-out. + * + * @retval true If current time is higher than specified state plus given time-out. + * @retval false If current time is lower than specified state plus given time-out + */ +bool nrfx_systick_test(nrfx_systick_state_t const * p_state, uint32_t us); + +/** + * @brief Blocking delay in CPU ticks + * + * @param[in] ticks Number of CPU ticks to delay. + */ +void nrfx_systick_delay_ticks(uint32_t ticks); + +/** + * @brief Blocking delay in us + * + * @param[in] us Number of microseconds to delay. + */ +void nrfx_systick_delay_us(uint32_t us); + +/** + * @brief Blocking delay in ms + * + * This delay function removes the limits of the highest possible delay value. + * + * @param[in] ms Number of milliseconds to delay. + */ +void nrfx_systick_delay_ms(uint32_t ms); + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* NRFX_SYSTICK_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_timer.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_timer.h new file mode 100644 index 00000000000..b493f239ece --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_timer.h @@ -0,0 +1,413 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_TIMER_H__ +#define NRFX_TIMER_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_timer Timer driver + * @{ + * @ingroup nrf_timer + * @brief TIMER peripheral driver. + */ + +/** + * @brief Timer driver instance data structure. + */ +typedef struct +{ + NRF_TIMER_Type * p_reg; ///< Pointer to the structure with TIMER peripheral instance registers. + uint8_t instance_id; ///< Driver instance index. + uint8_t cc_channel_count; ///< Number of capture/compare channels. +} nrfx_timer_t; + +/** + * @brief Macro for creating a timer driver instance. + */ +#define NRFX_TIMER_INSTANCE(id) \ +{ \ + .p_reg = NRFX_CONCAT_2(NRF_TIMER, id), \ + .instance_id = NRFX_CONCAT_3(NRFX_TIMER, id, _INST_IDX), \ + .cc_channel_count = NRF_TIMER_CC_CHANNEL_COUNT(id), \ +} + +enum { +#if NRFX_CHECK(NRFX_TIMER0_ENABLED) + NRFX_TIMER0_INST_IDX, +#endif +#if NRFX_CHECK(NRFX_TIMER1_ENABLED) + NRFX_TIMER1_INST_IDX, +#endif +#if NRFX_CHECK(NRFX_TIMER2_ENABLED) + NRFX_TIMER2_INST_IDX, +#endif +#if NRFX_CHECK(NRFX_TIMER3_ENABLED) + NRFX_TIMER3_INST_IDX, +#endif +#if NRFX_CHECK(NRFX_TIMER4_ENABLED) + NRFX_TIMER4_INST_IDX, +#endif + NRFX_TIMER_ENABLED_COUNT +}; + +/** + * @brief Timer driver instance configuration structure. + */ +typedef struct +{ + nrf_timer_frequency_t frequency; ///< Frequency. + nrf_timer_mode_t mode; ///< Mode of operation. + nrf_timer_bit_width_t bit_width; ///< Bit width. + uint8_t interrupt_priority; ///< Interrupt priority. + void * p_context; ///< Context passed to interrupt handler. +} nrfx_timer_config_t; + +/** + * @brief Timer driver instance default configuration. + */ +#define NRFX_TIMER_DEFAULT_CONFIG \ +{ \ + .frequency = (nrf_timer_frequency_t)NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY,\ + .mode = (nrf_timer_mode_t)NRFX_TIMER_DEFAULT_CONFIG_MODE, \ + .bit_width = (nrf_timer_bit_width_t)NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH,\ + .interrupt_priority = NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY, \ + .p_context = NULL \ +} + +/** + * @brief Timer driver event handler type. + * + * @param[in] event_type Timer event. + * @param[in] p_context General purpose parameter set during initialization of + * the timer. This parameter can be used to pass + * additional information to the handler function, for + * example, the timer ID. + */ +typedef void (* nrfx_timer_event_handler_t)(nrf_timer_event_t event_type, + void * p_context); + +/** + * @brief Function for initializing the timer. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_config Pointer to the structure with initial configuration. + * @param[in] timer_event_handler Event handler provided by the user. + * Must not be NULL. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_INVALID_STATE If the instance is already initialized. + */ +nrfx_err_t nrfx_timer_init(nrfx_timer_t const * const p_instance, + nrfx_timer_config_t const * p_config, + nrfx_timer_event_handler_t timer_event_handler); + +/** + * @brief Function for uninitializing the timer. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_timer_uninit(nrfx_timer_t const * const p_instance); + +/** + * @brief Function for turning on the timer. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_timer_enable(nrfx_timer_t const * const p_instance); + +/** + * @brief Function for turning off the timer. + * + * Note that the timer will allow to enter the lowest possible SYSTEM_ON state + * only after this function is called. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_timer_disable(nrfx_timer_t const * const p_instance); + +/** + * @brief Function for checking the timer state. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @return True if timer is enabled, false otherwise. + */ +bool nrfx_timer_is_enabled(nrfx_timer_t const * const p_instance); + +/** + * @brief Function for pausing the timer. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_timer_pause(nrfx_timer_t const * const p_instance); + +/** + * @brief Function for resuming the timer. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_timer_resume(nrfx_timer_t const * const p_instance); + +/** + * @brief Function for clearing the timer. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_timer_clear(nrfx_timer_t const * const p_instance); + +/** + * @brief Function for incrementing the timer. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_timer_increment(nrfx_timer_t const * const p_instance); + +/** + * @brief Function for returning the address of a specific timer task. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] timer_task Timer task. + * + * @return Task address. + */ +__STATIC_INLINE uint32_t nrfx_timer_task_address_get(nrfx_timer_t const * const p_instance, + nrf_timer_task_t timer_task); + +/** + * @brief Function for returning the address of a specific timer capture task. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] channel Capture channel number. + * + * @return Task address. + */ +__STATIC_INLINE uint32_t nrfx_timer_capture_task_address_get(nrfx_timer_t const * const p_instance, + uint32_t channel); + +/** + * @brief Function for returning the address of a specific timer event. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] timer_event Timer event. + * + * @return Event address. + */ +__STATIC_INLINE uint32_t nrfx_timer_event_address_get(nrfx_timer_t const * const p_instance, + nrf_timer_event_t timer_event); + +/** + * @brief Function for returning the address of a specific timer compare event. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] channel Compare channel number. + * + * @return Event address. + */ +__STATIC_INLINE uint32_t nrfx_timer_compare_event_address_get(nrfx_timer_t const * const p_instance, + uint32_t channel); + +/** + * @brief Function for capturing the timer value. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] cc_channel Capture channel number. + * + * @return Captured value. + */ +uint32_t nrfx_timer_capture(nrfx_timer_t const * const p_instance, + nrf_timer_cc_channel_t cc_channel); + +/** + * @brief Function for returning the capture value from a specific channel. + * + * Use this function to read channel values when PPI is used for capturing. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] cc_channel Capture channel number. + * + * @return Captured value. + */ +__STATIC_INLINE uint32_t nrfx_timer_capture_get(nrfx_timer_t const * const p_instance, + nrf_timer_cc_channel_t cc_channel); + +/** + * @brief Function for setting the timer channel in compare mode. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] cc_channel Compare channel number. + * @param[in] cc_value Compare value. + * @param[in] enable_int Enable or disable the interrupt for the compare channel. + */ +void nrfx_timer_compare(nrfx_timer_t const * const p_instance, + nrf_timer_cc_channel_t cc_channel, + uint32_t cc_value, + bool enable_int); + +/** + * @brief Function for setting the timer channel in extended compare mode. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] cc_channel Compare channel number. + * @param[in] cc_value Compare value. + * @param[in] timer_short_mask Shortcut between the compare event on the channel + * and the timer task (STOP or CLEAR). + * @param[in] enable_int Enable or disable the interrupt for the compare + * channel. + */ +void nrfx_timer_extended_compare(nrfx_timer_t const * const p_instance, + nrf_timer_cc_channel_t cc_channel, + uint32_t cc_value, + nrf_timer_short_mask_t timer_short_mask, + bool enable_int); + +/** + * @brief Function for converting time in microseconds to timer ticks. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] time_us Time in microseconds. + * + * @return Number of ticks. + */ +__STATIC_INLINE uint32_t nrfx_timer_us_to_ticks(nrfx_timer_t const * const p_instance, + uint32_t time_us); + +/** + * @brief Function for converting time in milliseconds to timer ticks. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] time_ms Time in milliseconds. + * + * @return Number of ticks. + */ +__STATIC_INLINE uint32_t nrfx_timer_ms_to_ticks(nrfx_timer_t const * const p_instance, + uint32_t time_ms); + +/** + * @brief Function for enabling timer compare interrupt. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] channel Compare channel. + */ +void nrfx_timer_compare_int_enable(nrfx_timer_t const * const p_instance, + uint32_t channel); + +/** + * @brief Function for disabling timer compare interrupt. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] channel Compare channel. + */ +void nrfx_timer_compare_int_disable(nrfx_timer_t const * const p_instance, + uint32_t channel); + + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE uint32_t nrfx_timer_task_address_get(nrfx_timer_t const * const p_instance, + nrf_timer_task_t timer_task) +{ + return (uint32_t)nrf_timer_task_address_get(p_instance->p_reg, timer_task); +} + +__STATIC_INLINE uint32_t nrfx_timer_capture_task_address_get(nrfx_timer_t const * const p_instance, + uint32_t channel) +{ + NRFX_ASSERT(channel < p_instance->cc_channel_count); + return (uint32_t)nrf_timer_task_address_get(p_instance->p_reg, + nrf_timer_capture_task_get(channel)); +} + +__STATIC_INLINE uint32_t nrfx_timer_event_address_get(nrfx_timer_t const * const p_instance, + nrf_timer_event_t timer_event) +{ + return (uint32_t)nrf_timer_event_address_get(p_instance->p_reg, timer_event); +} + +__STATIC_INLINE uint32_t nrfx_timer_compare_event_address_get(nrfx_timer_t const * const p_instance, + uint32_t channel) +{ + NRFX_ASSERT(channel < p_instance->cc_channel_count); + return (uint32_t)nrf_timer_event_address_get(p_instance->p_reg, + nrf_timer_compare_event_get(channel)); +} + +__STATIC_INLINE uint32_t nrfx_timer_capture_get(nrfx_timer_t const * const p_instance, + nrf_timer_cc_channel_t cc_channel) +{ + return nrf_timer_cc_read(p_instance->p_reg, cc_channel); +} + +__STATIC_INLINE uint32_t nrfx_timer_us_to_ticks(nrfx_timer_t const * const p_instance, + uint32_t timer_us) +{ + return nrf_timer_us_to_ticks(timer_us, nrf_timer_frequency_get(p_instance->p_reg)); +} + +__STATIC_INLINE uint32_t nrfx_timer_ms_to_ticks(nrfx_timer_t const * const p_instance, + uint32_t timer_ms) +{ + return nrf_timer_ms_to_ticks(timer_ms, nrf_timer_frequency_get(p_instance->p_reg)); +} + +#endif // SUPPRESS_INLINE_IMPLEMENTATION + + +void nrfx_timer_0_irq_handler(void); +void nrfx_timer_1_irq_handler(void); +void nrfx_timer_2_irq_handler(void); +void nrfx_timer_3_irq_handler(void); +void nrfx_timer_4_irq_handler(void); + + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_TIMER_H__ + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_twi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_twi.h new file mode 100644 index 00000000000..c5b85908d4d --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_twi.h @@ -0,0 +1,368 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_TWI_H__ +#define NRFX_TWI_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_twi TWI driver + * @{ + * @ingroup nrf_twi + * @brief TWI peripheral driver. + */ + +/** + * @brief Structure for the TWI master driver instance. + */ +typedef struct +{ + NRF_TWI_Type * p_twi; ///< Pointer to a structure with TWI registers. + uint8_t drv_inst_idx; ///< Driver instance index. +} nrfx_twi_t; + +/** + * @brief Macro for creating a TWI master driver instance. + */ +#define NRFX_TWI_INSTANCE(id) \ +{ \ + .p_twi = NRFX_CONCAT_2(NRF_TWI, id), \ + .drv_inst_idx = NRFX_CONCAT_3(NRFX_TWI, id, _INST_IDX), \ +} + +enum { +#if NRFX_CHECK(NRFX_TWI0_ENABLED) + NRFX_TWI0_INST_IDX, +#endif +#if NRFX_CHECK(NRFX_TWI1_ENABLED) + NRFX_TWI1_INST_IDX, +#endif + NRFX_TWI_ENABLED_COUNT +}; + +/** + * @brief Structure for the TWI master driver instance configuration. + */ +typedef struct +{ + uint32_t scl; ///< SCL pin number. + uint32_t sda; ///< SDA pin number. + nrf_twi_frequency_t frequency; ///< TWI frequency. + uint8_t interrupt_priority; ///< Interrupt priority. + bool hold_bus_uninit; ///< Hold pull up state on gpio pins after uninit. +} nrfx_twi_config_t; + +/** + * @brief TWI master driver instance default configuration. + */ +#define NRFX_TWI_DEFAULT_CONFIG \ +{ \ + .frequency = (nrf_twi_frequency_t)NRFX_TWI_DEFAULT_CONFIG_FREQUENCY, \ + .scl = 31, \ + .sda = 31, \ + .interrupt_priority = NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY, \ + .hold_bus_uninit = NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT, \ +} + +#define NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER (1UL << 2) /**< Interrupt after each transfer is suppressed, and the event handler is not called. */ +#define NRFX_TWI_FLAG_TX_NO_STOP (1UL << 5) /**< Flag indicating that the TX transfer will not end with a stop condition. */ + +/** + * @brief TWI master driver event types. + */ +typedef enum +{ + NRFX_TWI_EVT_DONE, ///< Transfer completed event. + NRFX_TWI_EVT_ADDRESS_NACK, ///< Error event: NACK received after sending the address. + NRFX_TWI_EVT_DATA_NACK ///< Error event: NACK received after sending a data byte. +} nrfx_twi_evt_type_t; + +/** + * @brief TWI master driver transfer types. + */ +typedef enum +{ + NRFX_TWI_XFER_TX, ///< TX transfer. + NRFX_TWI_XFER_RX, ///< RX transfer. + NRFX_TWI_XFER_TXRX, ///< TX transfer followed by RX transfer with repeated start. + NRFX_TWI_XFER_TXTX ///< TX transfer followed by TX transfer with repeated start. +} nrfx_twi_xfer_type_t; + +/** + * @brief Structure for a TWI transfer descriptor. + */ +typedef struct +{ + nrfx_twi_xfer_type_t type; ///< Type of transfer. + uint8_t address; ///< Slave address. + size_t primary_length; ///< Number of bytes transferred. + size_t secondary_length; ///< Number of bytes transferred. + uint8_t * p_primary_buf; ///< Pointer to transferred data. + uint8_t * p_secondary_buf; ///< Pointer to transferred data. +} nrfx_twi_xfer_desc_t; + + +/**@brief Macro for setting the TX transfer descriptor. */ +#define NRFX_TWI_XFER_DESC_TX(addr, p_data, length) \ + { \ + .type = NRFX_TWI_XFER_TX, \ + .address = addr, \ + .primary_length = length, \ + .p_primary_buf = p_data, \ + } + +/**@brief Macro for setting the RX transfer descriptor. */ +#define NRFX_TWI_XFER_DESC_RX(addr, p_data, length) \ + { \ + .type = NRFX_TWI_XFER_RX, \ + .address = addr, \ + .primary_length = length, \ + .p_primary_buf = p_data, \ + } + +/**@brief Macro for setting the TXRX transfer descriptor. */ +#define NRFX_TWI_XFER_DESC_TXRX(addr, p_tx, tx_len, p_rx, rx_len) \ + { \ + .type = NRFX_TWI_XFER_TXRX, \ + .address = addr, \ + .primary_length = tx_len, \ + .secondary_length = rx_len, \ + .p_primary_buf = p_tx, \ + .p_secondary_buf = p_rx, \ + } + +/**@brief Macro for setting the TXTX transfer descriptor. */ +#define NRFX_TWI_XFER_DESC_TXTX(addr, p_tx, tx_len, p_tx2, tx_len2) \ + { \ + .type = NRFX_TWI_XFER_TXTX, \ + .address = addr, \ + .primary_length = tx_len, \ + .secondary_length = tx_len2, \ + .p_primary_buf = p_tx, \ + .p_secondary_buf = p_tx2, \ + } + +/** + * @brief Structure for a TWI event. + */ +typedef struct +{ + nrfx_twi_evt_type_t type; ///< Event type. + nrfx_twi_xfer_desc_t xfer_desc; ///< Transfer details. +} nrfx_twi_evt_t; + +/** + * @brief TWI event handler prototype. + */ +typedef void (* nrfx_twi_evt_handler_t)(nrfx_twi_evt_t const * p_event, + void * p_context); + +/** + * @brief Function for initializing the TWI driver instance. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_config Pointer to the structure with initial configuration. + * @param[in] event_handler Event handler provided by the user. If NULL, blocking mode is enabled. + * @param[in] p_context Context passed to event handler. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_INVALID_STATE If the driver is in invalid state. + * @retval NRFX_ERROR_BUSY If some other peripheral with the same + * instance ID is already in use. This is + * possible only if @ref nrfx_prs module + * is enabled. + */ +nrfx_err_t nrfx_twi_init(nrfx_twi_t const * p_instance, + nrfx_twi_config_t const * p_config, + nrfx_twi_evt_handler_t event_handler, + void * p_context); + +/** + * @brief Function for uninitializing the TWI instance. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_twi_uninit(nrfx_twi_t const * p_instance); + +/** + * @brief Function for enabling the TWI instance. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_twi_enable(nrfx_twi_t const * p_instance); + +/** + * @brief Function for disabling the TWI instance. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_twi_disable(nrfx_twi_t const * p_instance); + +/** + * @brief Function for sending data to a TWI slave. + * + * The transmission will be stopped when an error occurs. If a transfer is ongoing, + * the function returns the error code @ref NRFX_ERROR_BUSY. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] address Address of a specific slave device (only 7 LSB). + * @param[in] p_data Pointer to a transmit buffer. + * @param[in] length Number of bytes to send. + * @param[in] no_stop If set, the stop condition is not generated on the bus + * after the transfer has completed successfully (allowing + * for a repeated start in the next transfer). + * + * @retval NRFX_SUCCESS If the procedure was successful. + * @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer. + * @retval NRFX_ERROR_INTERNAL If an error was detected by hardware. + * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address in polling mode. + * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte in polling mode. + */ +nrfx_err_t nrfx_twi_tx(nrfx_twi_t const * p_instance, + uint8_t address, + uint8_t const * p_data, + size_t length, + bool no_stop); + +/** + * @brief Function for reading data from a TWI slave. + * + * The transmission will be stopped when an error occurs. If a transfer is ongoing, + * the function returns the error code @ref NRFX_ERROR_BUSY. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] address Address of a specific slave device (only 7 LSB). + * @param[in] p_data Pointer to a receive buffer. + * @param[in] length Number of bytes to be received. + * + * @retval NRFX_SUCCESS If the procedure was successful. + * @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer. + * @retval NRFX_ERROR_INTERNAL If an error was detected by hardware. + * @retval NRFX_ERROR_DRV_TWI_ERR_OVERRUN If the unread data was replaced by new data + * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address in polling mode. + * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte in polling mode. + */ +nrfx_err_t nrfx_twi_rx(nrfx_twi_t const * p_instance, + uint8_t address, + uint8_t * p_data, + size_t length); + +/** + * @brief Function for preparing a TWI transfer. + * + * The following transfer types can be configured (@ref nrfx_twi_xfer_desc_t::type): + * - @ref NRFX_TWI_XFER_TXRX: Write operation followed by a read operation (without STOP condition in between). + * - @ref NRFX_TWI_XFER_TXTX: Write operation followed by a write operation (without STOP condition in between). + * - @ref NRFX_TWI_XFER_TX: Write operation (with or without STOP condition). + * - @ref NRFX_TWI_XFER_RX: Read operation (with STOP condition). + * + * @note TXRX and TXTX transfers are supported only in non-blocking mode. + * + * Additional options are provided using the flags parameter: + * - @ref NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER: No user event handler after transfer completion. In most cases, this also means no interrupt at the end of the transfer. + * - @ref NRFX_TWI_FLAG_TX_NO_STOP: No stop condition after TX transfer. + * + * @note + * Some flag combinations are invalid: + * - @ref NRFX_TWI_FLAG_TX_NO_STOP with @ref nrfx_twi_xfer_desc_t::type different than @ref NRFX_TWI_XFER_TX + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_xfer_desc Pointer to the transfer descriptor. + * @param[in] flags Transfer options (0 for default settings). + * + * @retval NRFX_SUCCESS If the procedure was successful. + * @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer. + * @retval NRFX_ERROR_NOT_SUPPORTED If the provided parameters are not supported. + * @retval NRFX_ERROR_INTERNAL If an error was detected by hardware. + * @retval NRFX_ERROR_DRV_TWI_ERR_OVERRUN If the unread data was replaced by new data (TXRX and RX) + * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address. + * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte. + */ +nrfx_err_t nrfx_twi_xfer(nrfx_twi_t const * p_instance, + nrfx_twi_xfer_desc_t const * p_xfer_desc, + uint32_t flags); + +/** + * @brief Function for checking the TWI driver state. + * + * @param[in] p_instance TWI instance. + * + * @retval true If the TWI driver is currently busy performing a transfer. + * @retval false If the TWI driver is ready for a new transfer. + */ +bool nrfx_twi_is_busy(nrfx_twi_t const * p_instance); + +/** + * @brief Function for getting the transferred data count. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @return Data count. + */ +size_t nrfx_twi_data_count_get(nrfx_twi_t const * const p_instance); + +/** + * @brief Function for returning the address of a STOPPED TWI event. + * + * A STOPPED event can be used to detect the end of a transfer if the @ref NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER + * option is used. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @return STOPPED event address. + */ +uint32_t nrfx_twi_stopped_event_get(nrfx_twi_t const * p_instance); + +void nrfx_twi_0_irq_handler(void); +void nrfx_twi_1_irq_handler(void); + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_TWI_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_twim.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_twim.h new file mode 100644 index 00000000000..0b1be22fe83 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_twim.h @@ -0,0 +1,408 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_TWIM_H__ +#define NRFX_TWIM_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_twim TWIM driver + * @{ + * @ingroup nrf_twim + * @brief TWIM peripheral driver. + */ + +/** + * @brief Structure for the TWI master driver instance. + */ +typedef struct +{ + NRF_TWIM_Type * p_twim; ///< Pointer to a structure with TWIM registers. + uint8_t drv_inst_idx; ///< Driver instance index. +} nrfx_twim_t; + +/** + * @brief Macro for creating a TWI master driver instance. + */ +#define NRFX_TWIM_INSTANCE(id) \ +{ \ + .p_twim = NRFX_CONCAT_2(NRF_TWIM, id), \ + .drv_inst_idx = NRFX_CONCAT_3(NRFX_TWIM, id, _INST_IDX), \ +} + +enum { +#if NRFX_CHECK(NRFX_TWIM0_ENABLED) + NRFX_TWIM0_INST_IDX, +#endif +#if NRFX_CHECK(NRFX_TWIM1_ENABLED) + NRFX_TWIM1_INST_IDX, +#endif + NRFX_TWIM_ENABLED_COUNT +}; + +/** + * @brief Structure for the TWI master driver instance configuration. + */ +typedef struct +{ + uint32_t scl; ///< SCL pin number. + uint32_t sda; ///< SDA pin number. + nrf_twim_frequency_t frequency; ///< TWIM frequency. + uint8_t interrupt_priority; ///< Interrupt priority. + bool hold_bus_uninit; ///< Hold pull up state on gpio pins after uninit. +} nrfx_twim_config_t; + +/** + * @brief TWI master driver instance default configuration. + */ +#define NRFX_TWIM_DEFAULT_CONFIG \ +{ \ + .frequency = (nrf_twim_frequency_t)NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY, \ + .scl = 31, \ + .sda = 31, \ + .interrupt_priority = NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY, \ + .hold_bus_uninit = NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT, \ +} + +#define NRFX_TWIM_FLAG_TX_POSTINC (1UL << 0) /**< TX buffer address incremented after transfer. */ +#define NRFX_TWIM_FLAG_RX_POSTINC (1UL << 1) /**< RX buffer address incremented after transfer. */ +#define NRFX_TWIM_FLAG_NO_XFER_EVT_HANDLER (1UL << 2) /**< Interrupt after each transfer is suppressed, and the event handler is not called. */ +#define NRFX_TWIM_FLAG_HOLD_XFER (1UL << 3) /**< Set up the transfer but do not start it. */ +#define NRFX_TWIM_FLAG_REPEATED_XFER (1UL << 4) /**< Flag indicating that the transfer will be executed multiple times. */ +#define NRFX_TWIM_FLAG_TX_NO_STOP (1UL << 5) /**< Flag indicating that the TX transfer will not end with a stop condition. */ + +/** + * @brief TWI master driver event types. + */ +typedef enum +{ + NRFX_TWIM_EVT_DONE, ///< Transfer completed event. + NRFX_TWIM_EVT_ADDRESS_NACK, ///< Error event: NACK received after sending the address. + NRFX_TWIM_EVT_DATA_NACK ///< Error event: NACK received after sending a data byte. +} nrfx_twim_evt_type_t; + +/** + * @brief TWI master driver transfer types. + */ +typedef enum +{ + NRFX_TWIM_XFER_TX, ///< TX transfer. + NRFX_TWIM_XFER_RX, ///< RX transfer. + NRFX_TWIM_XFER_TXRX, ///< TX transfer followed by RX transfer with repeated start. + NRFX_TWIM_XFER_TXTX ///< TX transfer followed by TX transfer with repeated start. +} nrfx_twim_xfer_type_t; + +/** + * @brief Structure for a TWI transfer descriptor. + */ +typedef struct +{ + nrfx_twim_xfer_type_t type; ///< Type of transfer. + uint8_t address; ///< Slave address. + size_t primary_length; ///< Number of bytes transferred. + size_t secondary_length; ///< Number of bytes transferred. + uint8_t * p_primary_buf; ///< Pointer to transferred data. + uint8_t * p_secondary_buf; ///< Pointer to transferred data. +} nrfx_twim_xfer_desc_t; + + +/**@brief Macro for setting the TX transfer descriptor. */ +#define NRFX_TWIM_XFER_DESC_TX(addr, p_data, length) \ + { \ + .type = NRFX_TWIM_XFER_TX, \ + .address = addr, \ + .primary_length = length, \ + .p_primary_buf = p_data, \ + } + +/**@brief Macro for setting the RX transfer descriptor. */ +#define NRFX_TWIM_XFER_DESC_RX(addr, p_data, length) \ + { \ + .type = NRFX_TWIM_XFER_RX, \ + .address = addr, \ + .primary_length = length, \ + .p_primary_buf = p_data, \ + } + +/**@brief Macro for setting the TXRX transfer descriptor. */ +#define NRFX_TWIM_XFER_DESC_TXRX(addr, p_tx, tx_len, p_rx, rx_len) \ + { \ + .type = NRFX_TWIM_XFER_TXRX, \ + .address = addr, \ + .primary_length = tx_len, \ + .secondary_length = rx_len, \ + .p_primary_buf = p_tx, \ + .p_secondary_buf = p_rx, \ + } + +/**@brief Macro for setting the TXTX transfer descriptor. */ +#define NRFX_TWIM_XFER_DESC_TXTX(addr, p_tx, tx_len, p_tx2, tx_len2) \ + { \ + .type = NRFX_TWIM_XFER_TXTX, \ + .address = addr, \ + .primary_length = tx_len, \ + .secondary_length = tx_len2, \ + .p_primary_buf = p_tx, \ + .p_secondary_buf = p_tx2, \ + } + +/** + * @brief Structure for a TWI event. + */ +typedef struct +{ + nrfx_twim_evt_type_t type; ///< Event type. + nrfx_twim_xfer_desc_t xfer_desc; ///< Transfer details. +} nrfx_twim_evt_t; + +/** + * @brief TWI event handler prototype. + */ +typedef void (* nrfx_twim_evt_handler_t)(nrfx_twim_evt_t const * p_event, + void * p_context); + +/** + * @brief Function for initializing the TWI driver instance. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_config Pointer to the structure with initial configuration. + * @param[in] event_handler Event handler provided by the user. If NULL, blocking mode is enabled. + * @param[in] p_context Context passed to event handler. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_INVALID_STATE If the driver is in invalid state. + * @retval NRFX_ERROR_BUSY If some other peripheral with the same + * instance ID is already in use. This is + * possible only if @ref nrfx_prs module + * is enabled. + */ +nrfx_err_t nrfx_twim_init(nrfx_twim_t const * p_instance, + nrfx_twim_config_t const * p_config, + nrfx_twim_evt_handler_t event_handler, + void * p_context); + +/** + * @brief Function for uninitializing the TWI instance. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_twim_uninit(nrfx_twim_t const * p_instance); + +/** + * @brief Function for enabling the TWI instance. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_twim_enable(nrfx_twim_t const * p_instance); + +/** + * @brief Function for disabling the TWI instance. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_twim_disable(nrfx_twim_t const * p_instance); + +/** + * @brief Function for sending data to a TWI slave. + * + * The transmission will be stopped when an error occurs. If a transfer is ongoing, + * the function returns the error code @ref NRFX_ERROR_BUSY. + * + * @note Peripherals using EasyDMA (including TWIM) require the transfer buffers + * to be placed in the Data RAM region. If this condition is not met, + * this function will fail with the error code NRFX_ERROR_INVALID_ADDR. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] address Address of a specific slave device (only 7 LSB). + * @param[in] p_data Pointer to a transmit buffer. + * @param[in] length Number of bytes to send. Maximum possible length is + * dependent on the used SoC (see the MAXCNT register + * description in the Product Specification). The driver + * checks it with assertion. + * @param[in] no_stop If set, the stop condition is not generated on the bus + * after the transfer has completed successfully (allowing + * for a repeated start in the next transfer). + * + * @retval NRFX_SUCCESS If the procedure was successful. + * @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer. + * @retval NRFX_ERROR_INTERNAL If an error was detected by hardware. + * @retval NRFX_ERROR_INVALID_ADDR If the provided buffer is not placed in the Data RAM region. + * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address in polling mode. + * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte in polling mode. + */ +nrfx_err_t nrfx_twim_tx(nrfx_twim_t const * p_instance, + uint8_t address, + uint8_t const * p_data, + size_t length, + bool no_stop); + +/** + * @brief Function for reading data from a TWI slave. + * + * The transmission will be stopped when an error occurs. If a transfer is ongoing, + * the function returns the error code @ref NRFX_ERROR_BUSY. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] address Address of a specific slave device (only 7 LSB). + * @param[in] p_data Pointer to a receive buffer. + * @param[in] length Number of bytes to be received. Maximum possible length + * is dependent on the used SoC (see the MAXCNT register + * description in the Product Specification). The driver + * checks it with assertion. + * + * @retval NRFX_SUCCESS If the procedure was successful. + * @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer. + * @retval NRFX_ERROR_INTERNAL If an error was detected by hardware. + * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address in polling mode. + * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte in polling mode. + */ +nrfx_err_t nrfx_twim_rx(nrfx_twim_t const * p_instance, + uint8_t address, + uint8_t * p_data, + size_t length); + +/** + * @brief Function for preparing a TWI transfer. + * + * The following transfer types can be configured (@ref nrfx_twim_xfer_desc_t::type): + * - @ref NRFX_TWIM_XFER_TXRX: Write operation followed by a read operation (without STOP condition in between). + * - @ref NRFX_TWIM_XFER_TXTX: Write operation followed by a write operation (without STOP condition in between). + * - @ref NRFX_TWIM_XFER_TX: Write operation (with or without STOP condition). + * - @ref NRFX_TWIM_XFER_RX: Read operation (with STOP condition). + * + * @note TXRX and TXTX transfers are supported only in non-blocking mode. + * + * Additional options are provided using the flags parameter: + * - @ref NRFX_TWIM_FLAG_TX_POSTINC and @ref NRFX_TWIM_FLAG_RX_POSTINC: Post-incrementation of buffer addresses. Supported only by TWIM. + * - @ref NRFX_TWIM_FLAG_NO_XFER_EVT_HANDLER: No user event handler after transfer completion. In most cases, this also means no interrupt at the end of the transfer. + * - @ref NRFX_TWIM_FLAG_HOLD_XFER: Driver is not starting the transfer. Use this flag if the transfer is triggered externally by PPI. Supported only by TWIM. + * Use @ref nrfx_twim_start_task_get to get the address of the start task. + * - @ref NRFX_TWIM_FLAG_REPEATED_XFER: Prepare for repeated transfers. You can set up a number of transfers that will be triggered externally (for example by PPI). + * An example is a TXRX transfer with the options @ref NRFX_TWIM_FLAG_RX_POSTINC, @ref NRFX_TWIM_FLAG_NO_XFER_EVT_HANDLER, and @ref NRFX_TWIM_FLAG_REPEATED_XFER. + * After the transfer is set up, a set of transfers can be triggered by PPI that will read, for example, the same register of an + * external component and put it into a RAM buffer without any interrupts. @ref nrfx_twim_stopped_event_get can be used to get the + * address of the STOPPED event, which can be used to count the number of transfers. If @ref NRFX_TWIM_FLAG_REPEATED_XFER is used, + * the driver does not set the driver instance into busy state, so you must ensure that the next transfers are set up + * when TWIM is not active. Supported only by TWIM. + * - @ref NRFX_TWIM_FLAG_TX_NO_STOP: No stop condition after TX transfer. + * + * @note + * Some flag combinations are invalid: + * - @ref NRFX_TWIM_FLAG_TX_NO_STOP with @ref nrfx_twim_xfer_desc_t::type different than @ref NRFX_TWIM_XFER_TX + * - @ref NRFX_TWIM_FLAG_REPEATED_XFER with @ref nrfx_twim_xfer_desc_t::type set to @ref NRFX_TWIM_XFER_TXTX + * + * If @ref nrfx_twim_xfer_desc_t::type is set to @ref NRFX_TWIM_XFER_TX and the @ref NRFX_TWIM_FLAG_TX_NO_STOP and @ref NRFX_TWIM_FLAG_REPEATED_XFER + * flags are set, two tasks must be used to trigger a transfer: TASKS_RESUME followed by TASKS_STARTTX. If no stop condition is generated, + * TWIM is in SUSPENDED state. Therefore, it must be resumed before the transfer can be started. + * + * @note Peripherals using EasyDMA (including TWIM) require the transfer buffers + * to be placed in the Data RAM region. If this condition is not met, + * this function will fail with the error code NRFX_ERROR_INVALID_ADDR. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_xfer_desc Pointer to the transfer descriptor. + * @param[in] flags Transfer options (0 for default settings). + * + * @retval NRFX_SUCCESS If the procedure was successful. + * @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer. + * @retval NRFX_ERROR_NOT_SUPPORTED If the provided parameters are not supported. + * @retval NRFX_ERROR_INTERNAL If an error was detected by hardware. + * @retval NRFX_ERROR_INVALID_ADDR If the provided buffers are not placed in the Data RAM region. + * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address. + * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte. + */ +nrfx_err_t nrfx_twim_xfer(nrfx_twim_t const * p_instance, + nrfx_twim_xfer_desc_t const * p_xfer_desc, + uint32_t flags); + +/** + * @brief Function for checking the TWI driver state. + * + * @param[in] p_instance TWI instance. + * + * @retval true If the TWI driver is currently busy performing a transfer. + * @retval false If the TWI driver is ready for a new transfer. + */ +bool nrfx_twim_is_busy(nrfx_twim_t const * p_instance); + + +/** + * @brief Function for returning the address of a TWIM start task. + * + * This function should be used if @ref nrfx_twim_xfer was called with the flag @ref NRFX_TWIM_FLAG_HOLD_XFER. + * In that case, the transfer is not started by the driver, but it must be started externally by PPI. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] xfer_type Transfer type used in the last call of the @ref nrfx_twim_xfer function. + * + * @return Start task address (TX or RX) depending on the value of xfer_type. + */ +uint32_t nrfx_twim_start_task_get(nrfx_twim_t const * p_instance, nrfx_twim_xfer_type_t xfer_type); + +/** + * @brief Function for returning the address of a STOPPED TWIM event. + * + * A STOPPED event can be used to detect the end of a transfer if the @ref NRFX_TWIM_FLAG_NO_XFER_EVT_HANDLER + * option is used. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @return STOPPED event address. + */ +uint32_t nrfx_twim_stopped_event_get(nrfx_twim_t const * p_instance); + + +void nrfx_twim_0_irq_handler(void); +void nrfx_twim_1_irq_handler(void); + + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_TWIM_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_twis.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_twis.h new file mode 100644 index 00000000000..56308680fcc --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_twis.h @@ -0,0 +1,405 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_TWIS_H__ +#define NRFX_TWIS_H__ + +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_twis TWIS driver + * @{ + * @ingroup nrf_twis + * @brief Two Wire Slave interface (TWIS) peripheral driver. + */ + +/** + * @brief TWIS driver instance data structure. + */ +typedef struct +{ + NRF_TWIS_Type * p_reg; ///< Pointer to a structure with TWIS registers. + uint8_t drv_inst_idx; ///< Driver instance index. +} nrfx_twis_t; + +enum { +#if NRFX_CHECK(NRFX_TWIS0_ENABLED) + NRFX_TWIS0_INST_IDX, +#endif +#if NRFX_CHECK(NRFX_TWIS1_ENABLED) + NRFX_TWIS1_INST_IDX, +#endif + NRFX_TWIS_ENABLED_COUNT +}; + +/** + * @brief Macro for creating a TWIS driver instance. + */ +#define NRFX_TWIS_INSTANCE(id) \ +{ \ + .p_reg = NRFX_CONCAT_2(NRF_TWIS, id), \ + .drv_inst_idx = NRFX_CONCAT_3(NRFX_TWIS, id, _INST_IDX), \ +} + +/** + * @brief Event callback function event definitions. + */ +typedef enum +{ + NRFX_TWIS_EVT_READ_REQ, ///< Read request detected. + /**< If there is no buffer prepared, buf_req flag in the even will be set. + Call then @ref nrfx_twis_tx_prepare to give parameters for buffer. + */ + NRFX_TWIS_EVT_READ_DONE, ///< Read request has finished - free any data. + NRFX_TWIS_EVT_READ_ERROR, ///< Read request finished with error. + NRFX_TWIS_EVT_WRITE_REQ, ///< Write request detected. + /**< If there is no buffer prepared, buf_req flag in the even will be set. + Call then @ref nrfx_twis_rx_prepare to give parameters for buffer. + */ + NRFX_TWIS_EVT_WRITE_DONE, ///< Write request has finished - process data. + NRFX_TWIS_EVT_WRITE_ERROR, ///< Write request finished with error. + NRFX_TWIS_EVT_GENERAL_ERROR ///< Error that happens not inside WRITE or READ transaction. +} nrfx_twis_evt_type_t; + +/** + * @brief Possible error sources. + * + * This is flag enum - values from this enum can be connected using logical or operator. + * @note + * We could use directly @ref nrf_twis_error_t. Error type enum is redefined here because + * of possible future extension (eg. supporting timeouts and synchronous mode). + */ +typedef enum +{ + NRFX_TWIS_ERROR_OVERFLOW = NRF_TWIS_ERROR_OVERFLOW, /**< RX buffer overflow detected, and prevented. */ + NRFX_TWIS_ERROR_DATA_NACK = NRF_TWIS_ERROR_DATA_NACK, /**< NACK sent after receiving a data byte. */ + NRFX_TWIS_ERROR_OVERREAD = NRF_TWIS_ERROR_OVERREAD, /**< TX buffer over-read detected, and prevented. */ + NRFX_TWIS_ERROR_UNEXPECTED_EVENT = 1 << 8 /**< Unexpected event detected by state machine. */ +} nrfx_twis_error_t; + +/** + * @brief TWIS driver event structure. + */ +typedef struct +{ + nrfx_twis_evt_type_t type; ///< Event type. + union + { + bool buf_req; ///< Flag for @ref NRFX_TWIS_EVT_READ_REQ and @ref NRFX_TWIS_EVT_WRITE_REQ. + /**< Information if transmission buffer requires to be prepared. */ + uint32_t tx_amount; ///< Data for @ref NRFX_TWIS_EVT_READ_DONE. + uint32_t rx_amount; ///< Data for @ref NRFX_TWIS_EVT_WRITE_DONE. + uint32_t error; ///< Data for @ref NRFX_TWIS_EVT_GENERAL_ERROR. + } data; +} nrfx_twis_evt_t; + +/** + * @brief TWI slave event callback function type. + * + * @param[in] p_event Event information structure. + */ +typedef void (*nrfx_twis_event_handler_t)(nrfx_twis_evt_t const * p_event); + +/** + * @brief Structure for TWIS configuration. + */ +typedef struct +{ + uint32_t addr[2]; //!< Set addresses that this slave should respond. Set 0 to disable. + uint32_t scl; //!< SCL pin number. + uint32_t sda; //!< SDA pin number. + nrf_gpio_pin_pull_t scl_pull; //!< SCL pin pull. + nrf_gpio_pin_pull_t sda_pull; //!< SDA pin pull. + uint8_t interrupt_priority; //!< The priority of interrupt for the module to set. +} nrfx_twis_config_t; + +/** + * @brief Generate default configuration for TWIS driver instance. + */ +#define NRFX_TWIS_DEFAULT_CONFIG \ +{ \ + .addr = { NRFX_TWIS_DEFAULT_CONFIG_ADDR0, \ + NRFX_TWIS_DEFAULT_CONFIG_ADDR1 }, \ + .scl = 31, \ + .scl_pull = (nrf_gpio_pin_pull_t)NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL, \ + .sda = 31, \ + .sda_pull = (nrf_gpio_pin_pull_t)NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL, \ + .interrupt_priority = NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY \ +} + +/** + * @brief Function for initializing the TWIS driver instance. + * + * Function initializes and enables TWIS driver. + * @attention After driver initialization enable it by @ref nrfx_twis_enable. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @attention @em p_instance has to be global object. + * It would be used by interrupts so make it sure that object + * would not be destroyed when function is leaving. + * @param[in] p_config Pointer to the structure with initial configuration. + * @param[in] event_handler Event handler provided by the user. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_INVALID_STATE If the driver is already initialized. + * @retval NRFX_ERROR_BUSY If some other peripheral with the same + * instance ID is already in use. This is + * possible only if NRFX_PRS_ENABLED + * is set to a value other than zero. + */ +nrfx_err_t nrfx_twis_init(nrfx_twis_t const * p_instance, + nrfx_twis_config_t const * p_config, + nrfx_twis_event_handler_t event_handler); + +/** + * @brief Function for uninitializing the TWIS driver instance. + * + * Function initializes the peripheral and resets all registers to default values. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @note + * It is safe to call nrfx_twis_uninit even before initialization. + * Actually @ref nrfx_twis_init function calls this function to + * make sure that TWIS state is known. + * @note + * If TWIS driver was in uninitialized state before calling this function, + * selected pins would not be reset to default configuration. + */ +void nrfx_twis_uninit(nrfx_twis_t const * p_instance); + +/** + * @brief Enable TWIS instance. + * + * This function enables TWIS instance. + * Function defined if there is needs for dynamically enabling and disabling the peripheral. + * Use @ref nrfx_twis_enable and @ref nrfx_twis_disable functions. + * They do not change any configuration registers. + * + * @param p_instance Pointer to the driver instance structure. + */ +void nrfx_twis_enable(nrfx_twis_t const * p_instance); + +/** + * @brief Disable TWIS instance. + * + * Disabling TWIS instance gives possibility to turn off the TWIS while + * holding configuration done by @ref nrfx_twis_init. + * + * @param p_instance Pointer to the driver instance structure. + */ +void nrfx_twis_disable(nrfx_twis_t const * p_instance); + +/** + * @brief Get and clear last error flags. + * + * Function gets information about errors. + * This is also the only possibility to exit from error substate of the internal state machine. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @return Error flags defined in @ref nrfx_twis_error_t. + * @attention + * This function clears error state and flags. + */ +uint32_t nrfx_twis_error_get_and_clear(nrfx_twis_t const * p_instance); + + +/** + * @brief Prepare data for sending. + * + * This function should be used in response for @ref NRFX_TWIS_EVT_READ_REQ event. + * + * @note Peripherals using EasyDMA (including TWIS) require the transfer buffers + * to be placed in the Data RAM region. If this condition is not met, + * this function will fail with the error code NRFX_ERROR_INVALID_ADDR. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_buf Transmission buffer. + * @attention Transmission buffer has to be placed in RAM. + * @param size Maximum number of bytes that master may read from buffer given. + * + * @retval NRFX_SUCCESS Preparation finished properly. + * @retval NRFX_ERROR_INVALID_ADDR Given @em p_buf is not placed inside the RAM. + * @retval NRFX_ERROR_INVALID_LENGTH Wrong value in @em size parameter. + * @retval NRFX_ERROR_INVALID_STATE Module not initialized or not enabled. + */ +nrfx_err_t nrfx_twis_tx_prepare(nrfx_twis_t const * p_instance, + void const * p_buf, + size_t size); + +/** + * @brief Get number of transmitted bytes. + * + * Function returns number of bytes sent. + * This function may be called after @ref NRFX_TWIS_EVT_READ_DONE or @ref NRFX_TWIS_EVT_READ_ERROR events. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @return Number of bytes sent. + */ +__STATIC_INLINE size_t nrfx_twis_tx_amount(nrfx_twis_t const * p_instance); + +/** + * @brief Prepare data for receiving + * + * This function should be used in response for @ref NRFX_TWIS_EVT_WRITE_REQ event. + * + * @note Peripherals using EasyDMA (including TWIS) require the transfer buffers + * to be placed in the Data RAM region. If this condition is not met, + * this function will fail with the error code NRFX_ERROR_INVALID_ADDR. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_buf Buffer that would be filled with received data. + * @attention Receiving buffer has to be placed in RAM. + * @param size Size of the buffer (maximum amount of data to receive). + * + * @retval NRFX_SUCCESS Preparation finished properly. + * @retval NRFX_ERROR_INVALID_ADDR Given @em p_buf is not placed inside the RAM. + * @retval NRFX_ERROR_INVALID_LENGTH Wrong value in @em size parameter. + * @retval NRFX_ERROR_INVALID_STATE Module not initialized or not enabled. + */ +nrfx_err_t nrfx_twis_rx_prepare(nrfx_twis_t const * p_instance, + void * p_buf, + size_t size); + +/** + * @brief Get number of received bytes. + * + * Function returns number of bytes received. + * This function may be called after @ref NRFX_TWIS_EVT_WRITE_DONE or @ref NRFX_TWIS_EVT_WRITE_ERROR events. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @return Number of bytes received. + */ +__STATIC_INLINE size_t nrfx_twis_rx_amount(nrfx_twis_t const * p_instance); + +/** + * @brief Function checks if driver is busy right now. + * + * Actual driver substate is tested. + * If driver is in any other state than IDLE or ERROR this function returns true. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true Driver is in state other than ERROR or IDLE. + * @retval false There is no transmission pending. + */ +bool nrfx_twis_is_busy(nrfx_twis_t const * p_instance); + +/** + * @brief Function checks if driver is waiting for tx buffer. + * + * If this function returns true, it means that driver is stalled expecting + * of the @ref nrfx_twis_tx_prepare function call. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true Driver waits for @ref nrfx_twis_tx_prepare. + * @retval false Driver is not in the state where it waits for preparing tx buffer. + */ +bool nrfx_twis_is_waiting_tx_buff(nrfx_twis_t const * p_instance); + +/** + * @brief Function checks if driver is waiting for rx buffer. + * + * If this function returns true, it means that driver is staled expecting + * of the @ref nrfx_twis_rx_prepare function call. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true Driver waits for @ref nrfx_twis_rx_prepare. + * @retval false Driver is not in the state where it waits for preparing rx buffer. + */ +bool nrfx_twis_is_waiting_rx_buff(nrfx_twis_t const * p_instance); + +/** + * @brief Check if driver is sending data. + * + * If this function returns true, it means that there is ongoing output transmission. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true There is ongoing output transmission. + * @retval false Driver is in other state. + */ +bool nrfx_twis_is_pending_tx(nrfx_twis_t const * p_instance); + +/** + * @brief Check if driver is receiving data. + * + * If this function returns true, it means that there is ongoing input transmission. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true There is ongoing input transmission. + * @retval false Driver is in other state. + */ +bool nrfx_twis_is_pending_rx(nrfx_twis_t const * p_instance); + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION +__STATIC_INLINE size_t nrfx_twis_tx_amount(nrfx_twis_t const * p_instance) +{ + return nrf_twis_tx_amount_get(p_instance->p_reg); +} + +__STATIC_INLINE size_t nrfx_twis_rx_amount(nrfx_twis_t const * p_instance) +{ + return nrf_twis_rx_amount_get(p_instance->p_reg); +} +#endif // SUPPRESS_INLINE_IMPLEMENTATION + + +void nrfx_twis_0_irq_handler(void); +void nrfx_twis_1_irq_handler(void); + + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_TWIS_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_uart.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_uart.h new file mode 100644 index 00000000000..d55beb72472 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_uart.h @@ -0,0 +1,365 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_UART_H__ +#define NRFX_UART_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_uart UART driver + * @{ + * @ingroup nrf_uart + * @brief UART peripheral driver. + */ + +/** + * @brief UART driver instance data structure. + */ +typedef struct +{ + NRF_UART_Type * p_reg; ///< Pointer to a structure with UART registers. + uint8_t drv_inst_idx; ///< Driver instance index. +} nrfx_uart_t; + +enum { +#if NRFX_CHECK(NRFX_UART0_ENABLED) + NRFX_UART0_INST_IDX, +#endif + NRFX_UART_ENABLED_COUNT +}; + +/** + * @brief Macro for creating a UART driver instance. + */ +#define NRFX_UART_INSTANCE(id) \ +{ \ + .p_reg = NRFX_CONCAT_2(NRF_UART, id), \ + .drv_inst_idx = NRFX_CONCAT_3(NRFX_UART, id, _INST_IDX), \ +} + +/** + * @brief Types of UART driver events. + */ +typedef enum +{ + NRFX_UART_EVT_TX_DONE, ///< Requested TX transfer completed. + NRFX_UART_EVT_RX_DONE, ///< Requested RX transfer completed. + NRFX_UART_EVT_ERROR, ///< Error reported by UART peripheral. +} nrfx_uart_evt_type_t; + +/** + * @brief Structure for UART configuration. + */ +typedef struct +{ + uint32_t pseltxd; ///< TXD pin number. + uint32_t pselrxd; ///< RXD pin number. + uint32_t pselcts; ///< CTS pin number. + uint32_t pselrts; ///< RTS pin number. + void * p_context; ///< Context passed to interrupt handler. + nrf_uart_hwfc_t hwfc; ///< Flow control configuration. + nrf_uart_parity_t parity; ///< Parity configuration. + nrf_uart_baudrate_t baudrate; ///< Baudrate. + uint8_t interrupt_priority; ///< Interrupt priority. +} nrfx_uart_config_t; + +/** + * @brief UART default configuration. + */ +#define NRFX_UART_DEFAULT_CONFIG \ +{ \ + .pseltxd = NRF_UART_PSEL_DISCONNECTED, \ + .pselrxd = NRF_UART_PSEL_DISCONNECTED, \ + .pselcts = NRF_UART_PSEL_DISCONNECTED, \ + .pselrts = NRF_UART_PSEL_DISCONNECTED, \ + .p_context = NULL, \ + .hwfc = (nrf_uart_hwfc_t)NRFX_UART_DEFAULT_CONFIG_HWFC, \ + .parity = (nrf_uart_parity_t)NRFX_UART_DEFAULT_CONFIG_PARITY, \ + .baudrate = (nrf_uart_baudrate_t)NRFX_UART_DEFAULT_CONFIG_BAUDRATE, \ + .interrupt_priority = NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY, \ +} + +/** + * @brief Structure for UART transfer completion event. + */ +typedef struct +{ + uint8_t * p_data; ///< Pointer to memory used for transfer. + uint32_t bytes; ///< Number of bytes transfered. +} nrfx_uart_xfer_evt_t; + +/** + * @brief Structure for UART error event. + */ +typedef struct +{ + nrfx_uart_xfer_evt_t rxtx; ///< Transfer details includes number of bytes transferred. + uint32_t error_mask; ///< Mask of error flags that generated the event. +} nrfx_uart_error_evt_t; + +/** + * @brief Structure for UART event. + */ +typedef struct +{ + nrfx_uart_evt_type_t type; ///< Event type. + union + { + nrfx_uart_xfer_evt_t rxtx; ///< Data provided for transfer completion events. + nrfx_uart_error_evt_t error; ///< Data provided for error event. + } data; +} nrfx_uart_event_t; + +/** + * @brief UART interrupt event handler. + * + * @param[in] p_event Pointer to event structure. Event is allocated on the stack so it is available + * only within the context of the event handler. + * @param[in] p_context Context passed to interrupt handler, set on initialization. + */ +typedef void (*nrfx_uart_event_handler_t)(nrfx_uart_event_t const * p_event, + void * p_context); + +/** + * @brief Function for initializing the UART driver. + * + * This function configures and enables UART. After this function GPIO pins are controlled by UART. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_config Pointer to the structure with initial configuration. + * @param[in] event_handler Event handler provided by the user. If not provided driver works in + * blocking mode. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_INVALID_STATE If driver is already initialized. + * @retval NRFX_ERROR_BUSY If some other peripheral with the same + * instance ID is already in use. This is + * possible only if @ref nrfx_prs module + * is enabled. + */ +nrfx_err_t nrfx_uart_init(nrfx_uart_t const * p_instance, + nrfx_uart_config_t const * p_config, + nrfx_uart_event_handler_t event_handler); + +/** + * @brief Function for uninitializing the UART driver. + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_uart_uninit(nrfx_uart_t const * p_instance); + +/** + * @brief Function for getting the address of a specific UART task. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] task Task. + * + * @return Task address. + */ +__STATIC_INLINE uint32_t nrfx_uart_task_address_get(nrfx_uart_t const * p_instance, + nrf_uart_task_t task); + +/** + * @brief Function for getting the address of a specific UART event. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] event Event. + * + * @return Event address. + */ +__STATIC_INLINE uint32_t nrfx_uart_event_address_get(nrfx_uart_t const * p_instance, + nrf_uart_event_t event); + +/** + * @brief Function for sending data over UART. + * + * If an event handler was provided in nrfx_uart_init() call, this function + * returns immediately and the handler is called when the transfer is done. + * Otherwise, the transfer is performed in blocking mode, i.e. this function + * returns when the transfer is finished. Blocking mode is not using interrupt + * so there is no context switching inside the function. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_data Pointer to data. + * @param[in] length Number of bytes to send. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_BUSY If driver is already transferring. + * @retval NRFX_ERROR_FORBIDDEN If the transfer was aborted from a different context + * (blocking mode only). + */ +nrfx_err_t nrfx_uart_tx(nrfx_uart_t const * p_instance, + uint8_t const * p_data, + size_t length); + +/** + * @brief Function for checking if UART is currently transmitting. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true If UART is transmitting. + * @retval false If UART is not transmitting. + */ +bool nrfx_uart_tx_in_progress(nrfx_uart_t const * p_instance); + +/** + * @brief Function for aborting any ongoing transmission. + * @note @ref NRFX_UART_EVT_TX_DONE event will be generated in non-blocking mode. + * It will contain number of bytes sent until abort was called. The event + * handler will be called from the function context. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_uart_tx_abort(nrfx_uart_t const * p_instance); + +/** + * @brief Function for receiving data over UART. + * + * If an event handler was provided in the nrfx_uart_init() call, this function + * returns immediately and the handler is called when the transfer is done. + * Otherwise, the transfer is performed in blocking mode, i.e. this function + * returns when the transfer is finished. Blocking mode is not using interrupt so + * there is no context switching inside the function. + * The receive buffer pointer is double buffered in non-blocking mode. The secondary + * buffer can be set immediately after starting the transfer and will be filled + * when the primary buffer is full. The double buffering feature allows + * receiving data continuously. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_data Pointer to data. + * @param[in] length Number of bytes to receive. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_BUSY If the driver is already receiving + * (and the secondary buffer has already been set + * in non-blocking mode). + * @retval NRFX_ERROR_FORBIDDEN If the transfer was aborted from a different context + * (blocking mode only, also see @ref nrfx_uart_rx_disable). + * @retval NRFX_ERROR_INTERNAL If UART peripheral reported an error. + */ +nrfx_err_t nrfx_uart_rx(nrfx_uart_t const * p_instance, + uint8_t * p_data, + size_t length); + + + +/** + * @brief Function for testing the receiver state in blocking mode. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true If the receiver has at least one byte of data to get. + * @retval false If the receiver is empty. + */ +bool nrfx_uart_rx_ready(nrfx_uart_t const * p_instance); + +/** + * @brief Function for enabling the receiver. + * + * UART has a 6-byte-long RX FIFO and it is used to store incoming data. If a user does not call the + * UART receive function before the FIFO is filled, an overrun error will appear. The receiver must be + * explicitly closed by the user @sa nrfx_uart_rx_disable. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_uart_rx_enable(nrfx_uart_t const * p_instance); + +/** + * @brief Function for disabling the receiver. + * + * This function must be called to close the receiver after it has been explicitly enabled by + * @sa nrfx_uart_rx_enable. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_uart_rx_disable(nrfx_uart_t const * p_instance); + +/** + * @brief Function for aborting any ongoing reception. + * @note @ref NRFX_UART_EVT_TX_DONE event will be generated in non-blocking mode. + * It will contain number of bytes received until abort was called. The event + * handler will be called from the UART interrupt context. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_uart_rx_abort(nrfx_uart_t const * p_instance); + +/** + * @brief Function for reading error source mask. Mask contains values from @ref nrf_uart_error_mask_t. + * @note Function should be used in blocking mode only. In case of non-blocking mode, an error event is + * generated. Function clears error sources after reading. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval Mask of reported errors. + */ +uint32_t nrfx_uart_errorsrc_get(nrfx_uart_t const * p_instance); + + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION +__STATIC_INLINE uint32_t nrfx_uart_task_address_get(nrfx_uart_t const * p_instance, + nrf_uart_task_t task) +{ + return nrf_uart_task_address_get(p_instance->p_reg, task); +} + +__STATIC_INLINE uint32_t nrfx_uart_event_address_get(nrfx_uart_t const * p_instance, + nrf_uart_event_t event) +{ + return nrf_uart_event_address_get(p_instance->p_reg, event); +} +#endif // SUPPRESS_INLINE_IMPLEMENTATION + + +void nrfx_uart_0_irq_handler(void); + + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_UART_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_uarte.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_uarte.h new file mode 100644 index 00000000000..e5deec0b531 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_uarte.h @@ -0,0 +1,363 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_UARTE_H__ +#define NRFX_UARTE_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_uarte UARTE driver + * @{ + * @ingroup nrf_uarte + * @brief UARTE peripheral driver. + */ + +/** + * @brief Structure for the UARTE driver instance. + */ +typedef struct +{ + NRF_UARTE_Type * p_reg; ///< Pointer to a structure with UARTE registers. + uint8_t drv_inst_idx; ///< Driver instance index. +} nrfx_uarte_t; + +enum { +#if NRFX_CHECK(NRFX_UARTE0_ENABLED) + NRFX_UARTE0_INST_IDX, +#endif +#if NRFX_CHECK(NRFX_UARTE1_ENABLED) + NRFX_UARTE1_INST_IDX, +#endif + NRFX_UARTE_ENABLED_COUNT +}; + +/** + * @brief Macro for creating a UARTE driver instance. + */ +#define NRFX_UARTE_INSTANCE(id) \ +{ \ + .p_reg = NRFX_CONCAT_2(NRF_UARTE, id), \ + .drv_inst_idx = NRFX_CONCAT_3(NRFX_UARTE, id, _INST_IDX), \ +} + +/** + * @brief Types of UARTE driver events. + */ +typedef enum +{ + NRFX_UARTE_EVT_TX_DONE, ///< Requested TX transfer completed. + NRFX_UARTE_EVT_RX_DONE, ///< Requested RX transfer completed. + NRFX_UARTE_EVT_ERROR, ///< Error reported by UART peripheral. +} nrfx_uarte_evt_type_t; + +/** + * @brief Structure for UARTE configuration. + */ +typedef struct +{ + uint32_t pseltxd; ///< TXD pin number. + uint32_t pselrxd; ///< RXD pin number. + uint32_t pselcts; ///< CTS pin number. + uint32_t pselrts; ///< RTS pin number. + void * p_context; ///< Context passed to interrupt handler. + nrf_uarte_hwfc_t hwfc; ///< Flow control configuration. + nrf_uarte_parity_t parity; ///< Parity configuration. + nrf_uarte_baudrate_t baudrate; ///< Baudrate. + uint8_t interrupt_priority; ///< Interrupt priority. +} nrfx_uarte_config_t; + +/** + * @brief UARTE default configuration. + */ +#define NRFX_UARTE_DEFAULT_CONFIG \ +{ \ + .pseltxd = NRF_UARTE_PSEL_DISCONNECTED, \ + .pselrxd = NRF_UARTE_PSEL_DISCONNECTED, \ + .pselcts = NRF_UARTE_PSEL_DISCONNECTED, \ + .pselrts = NRF_UARTE_PSEL_DISCONNECTED, \ + .p_context = NULL, \ + .hwfc = (nrf_uarte_hwfc_t)NRFX_UARTE_DEFAULT_CONFIG_HWFC, \ + .parity = (nrf_uarte_parity_t)NRFX_UARTE_DEFAULT_CONFIG_PARITY, \ + .baudrate = (nrf_uarte_baudrate_t)NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE, \ + .interrupt_priority = NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY, \ +} + +/** + * @brief Structure for UARTE transfer completion event. + */ +typedef struct +{ + uint8_t * p_data; ///< Pointer to memory used for transfer. + uint8_t bytes; ///< Number of bytes transfered. +} nrfx_uarte_xfer_evt_t; + +/** + * @brief Structure for UARTE error event. + */ +typedef struct +{ + nrfx_uarte_xfer_evt_t rxtx; ///< Transfer details includes number of bytes transferred. + uint32_t error_mask; ///< Mask of error flags that generated the event. +} nrfx_uarte_error_evt_t; + +/** + * @brief Structure for UARTE event. + */ +typedef struct +{ + nrfx_uarte_evt_type_t type; ///< Event type. + union + { + nrfx_uarte_xfer_evt_t rxtx; ///< Data provided for transfer completion events. + nrfx_uarte_error_evt_t error; ///< Data provided for error event. + } data; +} nrfx_uarte_event_t; + +/** + * @brief UARTE interrupt event handler. + * + * @param[in] p_event Pointer to event structure. Event is allocated on the stack so it is available + * only within the context of the event handler. + * @param[in] p_context Context passed to interrupt handler, set on initialization. + */ +typedef void (*nrfx_uarte_event_handler_t)(nrfx_uarte_event_t const * p_event, + void * p_context); + +/** + * @brief Function for initializing the UARTE driver. + * + * This function configures and enables UARTE. After this function GPIO pins are controlled by UARTE. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_config Pointer to the structure with initial configuration. + * @param[in] event_handler Event handler provided by the user. If not provided driver works in + * blocking mode. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_INVALID_STATE If driver is already initialized. + * @retval NRFX_ERROR_BUSY If some other peripheral with the same + * instance ID is already in use. This is + * possible only if @ref nrfx_prs module + * is enabled. + */ +nrfx_err_t nrfx_uarte_init(nrfx_uarte_t const * p_instance, + nrfx_uarte_config_t const * p_config, + nrfx_uarte_event_handler_t event_handler); + +/** + * @brief Function for uninitializing the UARTE driver. + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_uarte_uninit(nrfx_uarte_t const * p_instance); + +/** + * @brief Function for getting the address of a specific UARTE task. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] task Task. + * + * @return Task address. + */ +__STATIC_INLINE uint32_t nrfx_uarte_task_address_get(nrfx_uarte_t const * p_instance, + nrf_uarte_task_t task); + +/** + * @brief Function for getting the address of a specific UARTE event. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] event Event. + * + * @return Event address. + */ +__STATIC_INLINE uint32_t nrfx_uarte_event_address_get(nrfx_uarte_t const * p_instance, + nrf_uarte_event_t event); + +/** + * @brief Function for sending data over UARTE. + * + * If an event handler was provided in nrfx_uarte_init() call, this function + * returns immediately and the handler is called when the transfer is done. + * Otherwise, the transfer is performed in blocking mode, i.e. this function + * returns when the transfer is finished. Blocking mode is not using interrupt + * so there is no context switching inside the function. + * + * @note Peripherals using EasyDMA (including UARTE) require the transfer buffers + * to be placed in the Data RAM region. If this condition is not met, + * this function will fail with the error code NRFX_ERROR_INVALID_ADDR. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_data Pointer to data. + * @param[in] length Number of bytes to send. Maximum possible length is + * dependent on the used SoC (see the MAXCNT register + * description in the Product Specification). The driver + * checks it with assertion. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_BUSY If driver is already transferring. + * @retval NRFX_ERROR_FORBIDDEN If the transfer was aborted from a different context + * (blocking mode only). + * @retval NRFX_ERROR_INVALID_ADDR If p_data does not point to RAM buffer. + */ +nrfx_err_t nrfx_uarte_tx(nrfx_uarte_t const * p_instance, + uint8_t const * p_data, + size_t length); + +/** + * @brief Function for checking if UARTE is currently transmitting. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true If UARTE is transmitting. + * @retval false If UARTE is not transmitting. + */ +bool nrfx_uarte_tx_in_progress(nrfx_uarte_t const * p_instance); + +/** + * @brief Function for aborting any ongoing transmission. + * @note @ref NRFX_UARTE_EVT_TX_DONE event will be generated in non-blocking mode. + * It will contain number of bytes sent until abort was called. The event + * handler will be called from UARTE interrupt context. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_uarte_tx_abort(nrfx_uarte_t const * p_instance); + +/** + * @brief Function for receiving data over UARTE. + * + * If an event handler was provided in the nrfx_uarte_init() call, this function + * returns immediately and the handler is called when the transfer is done. + * Otherwise, the transfer is performed in blocking mode, i.e. this function + * returns when the transfer is finished. Blocking mode is not using interrupt so + * there is no context switching inside the function. + * The receive buffer pointer is double buffered in non-blocking mode. The secondary + * buffer can be set immediately after starting the transfer and will be filled + * when the primary buffer is full. The double buffering feature allows + * receiving data continuously. + * + * @note Peripherals using EasyDMA (including UARTE) require the transfer buffers + * to be placed in the Data RAM region. If this condition is not met, + * this function will fail with the error code NRFX_ERROR_INVALID_ADDR. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_data Pointer to data. + * @param[in] length Number of bytes to receive. Maximum possible length is + * dependent on the used SoC (see the MAXCNT register + * description in the Product Specification). The driver + * checks it with assertion. + * + * @retval NRFX_SUCCESS If initialization was successful. + * @retval NRFX_ERROR_BUSY If the driver is already receiving + * (and the secondary buffer has already been set + * in non-blocking mode). + * @retval NRFX_ERROR_FORBIDDEN If the transfer was aborted from a different context + * (blocking mode only). + * @retval NRFX_ERROR_INTERNAL If UARTE peripheral reported an error. + * @retval NRFX_ERROR_INVALID_ADDR If p_data does not point to RAM buffer. + */ +nrfx_err_t nrfx_uarte_rx(nrfx_uarte_t const * p_instance, + uint8_t * p_data, + size_t length); + + + +/** + * @brief Function for testing the receiver state in blocking mode. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true If the receiver has at least one byte of data to get. + * @retval false If the receiver is empty. + */ +bool nrfx_uarte_rx_ready(nrfx_uarte_t const * p_instance); + +/** + * @brief Function for aborting any ongoing reception. + * @note @ref NRFX_UARTE_EVT_RX_DONE event will be generated in non-blocking mode. + * It will contain number of bytes received until abort was called. The event + * handler will be called from UARTE interrupt context. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_uarte_rx_abort(nrfx_uarte_t const * p_instance); + +/** + * @brief Function for reading error source mask. Mask contains values from @ref nrf_uarte_error_mask_t. + * @note Function should be used in blocking mode only. In case of non-blocking mode, an error event is + * generated. Function clears error sources after reading. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval Mask of reported errors. + */ +uint32_t nrfx_uarte_errorsrc_get(nrfx_uarte_t const * p_instance); + + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION +__STATIC_INLINE uint32_t nrfx_uarte_task_address_get(nrfx_uarte_t const * p_instance, + nrf_uarte_task_t task) +{ + return nrf_uarte_task_address_get(p_instance->p_reg, task); +} + +__STATIC_INLINE uint32_t nrfx_uarte_event_address_get(nrfx_uarte_t const * p_instance, + nrf_uarte_event_t event) +{ + return nrf_uarte_event_address_get(p_instance->p_reg, event); +} +#endif // SUPPRESS_INLINE_IMPLEMENTATION + + +void nrfx_uarte_0_irq_handler(void); +void nrfx_uarte_1_irq_handler(void); + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_UARTE_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_wdt.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_wdt.h new file mode 100644 index 00000000000..be98a3853a8 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_wdt.h @@ -0,0 +1,156 @@ +/** + * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_WDT_H__ +#define NRFX_WDT_H__ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_wdt WDT driver + * @{ + * @ingroup nrf_wdt + * @brief Watchdog Timer (WDT) peripheral driver. + */ + +/**@brief Struct for WDT initialization. */ +typedef struct +{ + nrf_wdt_behaviour_t behaviour; /**< WDT behaviour when CPU in sleep/halt mode. */ + uint32_t reload_value; /**< WDT reload value in ms. */ + uint8_t interrupt_priority; /**< WDT interrupt priority */ +} nrfx_wdt_config_t; + +/**@brief WDT event handler function type. */ +typedef void (*nrfx_wdt_event_handler_t)(void); + +/**@brief WDT channel id type. */ +typedef nrf_wdt_rr_register_t nrfx_wdt_channel_id; + +#define NRFX_WDT_DEAFULT_CONFIG \ + { \ + .behaviour = (nrf_wdt_behaviour_t)NRFX_WDT_CONFIG_BEHAVIOUR, \ + .reload_value = NRFX_WDT_CONFIG_RELOAD_VALUE, \ + .interrupt_priority = NRFX_WDT_CONFIG_IRQ_PRIORITY, \ + } +/** + * @brief This function initializes watchdog. + * + * @param[in] p_config Pointer to the structure with initial configuration. + * @param[in] wdt_event_handler Event handler provided by the user. + * Must not be NULL. + * + * @return NRFX_SUCCESS on success, otherwise an error code. + */ +nrfx_err_t nrfx_wdt_init(nrfx_wdt_config_t const * p_config, + nrfx_wdt_event_handler_t wdt_event_handler); + +/** + * @brief This function allocate watchdog channel. + * + * @note This function can not be called after nrfx_wdt_start(void). + * + * @param[out] p_channel_id ID of granted channel. + * + * @return NRFX_SUCCESS on success, otherwise an error code. + */ +nrfx_err_t nrfx_wdt_channel_alloc(nrfx_wdt_channel_id * p_channel_id); + +/** + * @brief This function starts watchdog. + * + * @note After calling this function the watchdog is started, so the user needs to feed all allocated + * watchdog channels to avoid reset. At least one watchdog channel has to be allocated. + */ +void nrfx_wdt_enable(void); + +/** + * @brief This function feeds the watchdog. + * + * @details Function feeds all allocated watchdog channels. + */ +void nrfx_wdt_feed(void); + +/** + * @brief This function feeds the invidual watchdog channel. + * + * @param[in] channel_id ID of watchdog channel. + */ +void nrfx_wdt_channel_feed(nrfx_wdt_channel_id channel_id); + +/**@brief Function for returning a requested task address for the wdt driver module. + * + * @param[in] task One of the peripheral tasks. + * + * @retval Task address. + */ +__STATIC_INLINE uint32_t nrfx_wdt_ppi_task_addr(nrf_wdt_task_t task) +{ + return nrf_wdt_task_address_get(task); +} + +/**@brief Function for returning a requested event address for the wdt driver module. + * + * @param[in] event One of the peripheral events. + * + * @retval Event address + */ +__STATIC_INLINE uint32_t nrfx_wdt_ppi_event_addr(nrf_wdt_event_t event) +{ + return nrf_wdt_event_address_get(event); +} + + +void nrfx_wdt_irq_handler(void); + + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/nrfx_common.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/nrfx_common.h new file mode 100644 index 00000000000..3204f7ca1a3 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/nrfx_common.h @@ -0,0 +1,269 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_COMMON_H__ +#define NRFX_COMMON_H__ + +#include +#include +#include + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_common Common module + * @{ + * @ingroup nrfx + * @brief Common module. + */ + +/** + * @brief Macro for checking if the specified identifier is defined and it has + * a non-zero value. + * + * Normally, preprocessors treat all undefined identifiers as having the value + * zero. However, some tools, like static code analyzers, may issue a warning + * when such identifier is evaluated. This macro gives the possibility to suppress + * such warnings only in places where this macro is used for evaluation, not in + * the whole analyzed code. + */ +#define NRFX_CHECK(module_enabled) (module_enabled) + +/** + * @brief Macro for concatenating two tokens in macro expansion. + * + * @note This macro is expanded in two steps so that tokens given as macros + * themselves are fully expanded before they are merged. + * + * @param p1 First token. + * @param p2 Second token. + * + * @return The two tokens merged into one, unless they cannot together form + * a valid token (in such case, the preprocessor issues a warning and + * does not perform the concatenation). + * + * @sa NRFX_CONCAT_3 + */ +#define NRFX_CONCAT_2(p1, p2) NRFX_CONCAT_2_(p1, p2) +/** + * @brief Internal macro used by @ref NRFX_CONCAT_2 to perform the expansion + * in two steps. + */ +#define NRFX_CONCAT_2_(p1, p2) p1 ## p2 + +/** + * @brief Macro for concatenating three tokens in macro expansion. + * + * @note This macro is expanded in two steps so that tokens given as macros + * themselves are fully expanded before they are merged. + * + * @param p1 First token. + * @param p2 Second token. + * @param p3 Third token. + * + * @return The three tokens merged into one, unless they cannot together form + * a valid token (in such case, the preprocessor issues a warning and + * does not perform the concatenation). + * + * @sa NRFX_CONCAT_2 + */ +#define NRFX_CONCAT_3(p1, p2, p3) NRFX_CONCAT_3_(p1, p2, p3) +/** + * @brief Internal macro used by @ref NRFX_CONCAT_3 to perform the expansion + * in two steps. + */ +#define NRFX_CONCAT_3_(p1, p2, p3) p1 ## p2 ## p3 + +/**@brief Macro for performing rounded integer division (as opposed to + * truncating the result). + * + * @param a Numerator. + * @param b Denominator. + * + * @return Rounded (integer) result of dividing @c a by @c b. + */ +#define NRFX_ROUNDED_DIV(a, b) (((a) + ((b) / 2)) / (b)) + +/**@brief Macro for checking if given lengths of EasyDMA transfers do not exceed + * the limit of the specified peripheral. + * + * @param peripheral Peripheral to check the lengths against. + * @param length1 First length to be checked. + * @param length2 Second length to be checked (pass 0 if not needed). + * + * @return + */ +#define NRFX_EASYDMA_LENGTH_VALIDATE(peripheral, length1, length2) \ + (((length1) < (1U << NRFX_CONCAT_2(peripheral, _EASYDMA_MAXCNT_SIZE))) && \ + ((length2) < (1U << NRFX_CONCAT_2(peripheral, _EASYDMA_MAXCNT_SIZE)))) + +/**@brief Macro for waiting until condition is met. + * + * @param[in] condition Condition to meet. + * @param[in] attempts Maximum number of condition checks. Must not be 0. + * @param[in] delay_us Delay between consecutive checks, in microseconds. + * @param[out] result Boolean variable to store the result of the wait process. + * Set to true if the condition is met or false otherwise. + */ +#define NRFX_WAIT_FOR(condition, attempts, delay_us, result) \ +do { \ + result = false; \ + uint32_t remaining_attempts = (attempts); \ + do { \ + if (condition) \ + { \ + result = true; \ + break; \ + } \ + NRFX_DELAY_US(delay_us); \ + } while (--remaining_attempts); \ +} while(0) + +/** + * @brief IRQ handler type. + */ +typedef void (* nrfx_irq_handler_t)(void); + +/** + * @brief Driver state. + */ +typedef enum +{ + NRFX_DRV_STATE_UNINITIALIZED, ///< Uninitialized. + NRFX_DRV_STATE_INITIALIZED, ///< Initialized but powered off. + NRFX_DRV_STATE_POWERED_ON, ///< Initialized and powered on. +} nrfx_drv_state_t; + + +/** + * @brief Function for checking if an object is placed in the Data RAM region. + * + * Several peripherals (the ones using EasyDMA) require the transfer buffers + * to be placed in the Data RAM region. This function can be used to check if + * this condition is met. + * + * @param[in] p_object Pointer to an object whose location is to be checked. + * + * @retval true If the pointed object is located in the Data RAM region. + * @retval false Otherwise. + */ +__STATIC_INLINE bool nrfx_is_in_ram(void const * p_object); + +/** + * @brief Function for getting the interrupt number for a specific peripheral. + * + * @param[in] p_reg Peripheral base pointer. + * + * @return Interrupt number associated with the pointed peripheral. + */ +__STATIC_INLINE IRQn_Type nrfx_get_irq_number(void const * p_reg); + +/** + * @brief Function for converting an INTEN register bit position to the + * corresponding event identifier. + * + * The event identifier is the offset between the event register address and + * the peripheral base address, and is equal (thus, can be directly cast) to + * the corresponding value of the enumerated type from HAL (nrf_*_event_t). + + * @param bit INTEN register bit position. + * + * @return Event identifier. + * + * @sa nrfx_event_to_bitpos + */ +__STATIC_INLINE uint32_t nrfx_bitpos_to_event(uint32_t bit); + +/** + * @brief Function for converting an event identifier to the corresponding + * INTEN register bit position. + * + * The event identifier is the offset between the event register address and + * the peripheral base address, and is equal (thus, can be directly cast) to + * the corresponding value of the enumerated type from HAL (nrf_*_event_t). + * + * @param event Event identifier. + * + * @return INTEN register bit position. + * + * @sa nrfx_bitpos_to_event + */ +__STATIC_INLINE uint32_t nrfx_event_to_bitpos(uint32_t event); + + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE bool nrfx_is_in_ram(void const * p_object) +{ + return ((((uint32_t)p_object) & 0xE0000000u) == 0x20000000u); +} + +__STATIC_INLINE IRQn_Type nrfx_get_irq_number(void const * p_reg) +{ + uint8_t irq_number = (uint8_t)(((uint32_t)p_reg) >> 12u); + return (IRQn_Type)irq_number; +} + +__STATIC_INLINE uint32_t nrfx_bitpos_to_event(uint32_t bit) +{ + static const uint32_t event_reg_offset = 0x100u; + return event_reg_offset + (bit * sizeof(uint32_t)); +} + +__STATIC_INLINE uint32_t nrfx_event_to_bitpos(uint32_t event) +{ + static const uint32_t event_reg_offset = 0x100u; + return (event - event_reg_offset) / sizeof(uint32_t); +} + +#endif + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_COMMON_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/nrfx_errors.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/nrfx_errors.h new file mode 100644 index 00000000000..f900be8110e --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/nrfx_errors.h @@ -0,0 +1,82 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_ERRORS_H__ +#define NRFX_ERRORS_H__ + +#if !NRFX_CHECK(NRFX_CUSTOM_ERROR_CODES) + +/** + * @defgroup nrfx_error_codes Global Error Codes + * @{ + * @ingroup nrfx + * + * @brief Global error codes definitions. + */ + +#define NRFX_ERROR_BASE_NUM 0x0BAD0000 +#define NRFX_ERROR_DRIVERS_BASE_NUM (NRFX_ERROR_BASE_NUM + 0x10000) + +/** @brief Enumerated type for error codes. */ +typedef enum { + NRFX_SUCCESS = (NRFX_ERROR_BASE_NUM + 0), ///< Operation performed successfully. + NRFX_ERROR_INTERNAL = (NRFX_ERROR_BASE_NUM + 1), ///< Internal error. + NRFX_ERROR_NO_MEM = (NRFX_ERROR_BASE_NUM + 2), ///< No memory for operation. + NRFX_ERROR_NOT_SUPPORTED = (NRFX_ERROR_BASE_NUM + 3), ///< Not supported. + NRFX_ERROR_INVALID_PARAM = (NRFX_ERROR_BASE_NUM + 4), ///< Invalid parameter. + NRFX_ERROR_INVALID_STATE = (NRFX_ERROR_BASE_NUM + 5), ///< Invalid state, operation disallowed in this state. + NRFX_ERROR_INVALID_LENGTH = (NRFX_ERROR_BASE_NUM + 6), ///< Invalid length. + NRFX_ERROR_TIMEOUT = (NRFX_ERROR_BASE_NUM + 7), ///< Operation timed out. + NRFX_ERROR_FORBIDDEN = (NRFX_ERROR_BASE_NUM + 8), ///< Operation is forbidden. + NRFX_ERROR_NULL = (NRFX_ERROR_BASE_NUM + 9), ///< Null pointer. + NRFX_ERROR_INVALID_ADDR = (NRFX_ERROR_BASE_NUM + 10), ///< Bad memory address. + NRFX_ERROR_BUSY = (NRFX_ERROR_BASE_NUM + 11), ///< Busy. + NRFX_ERROR_ALREADY_INITIALIZED = (NRFX_ERROR_BASE_NUM + 12), ///< Module already initialized. + + NRFX_ERROR_DRV_TWI_ERR_OVERRUN = (NRFX_ERROR_DRIVERS_BASE_NUM + 0), ///< TWI error: Overrun. + NRFX_ERROR_DRV_TWI_ERR_ANACK = (NRFX_ERROR_DRIVERS_BASE_NUM + 1), ///< TWI error: Address not acknowledged. + NRFX_ERROR_DRV_TWI_ERR_DNACK = (NRFX_ERROR_DRIVERS_BASE_NUM + 2) ///< TWI error: Data not acknowledged. +} nrfx_err_t; + +/** @} */ + +#endif // !NRFX_CHECK(NRFX_CUSTOM_ERROR_CODES) + +#endif // NRFX_ERRORS_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_adc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_adc.c new file mode 100644 index 00000000000..cbe51facda5 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_adc.c @@ -0,0 +1,324 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_ADC_ENABLED) + +#include + +#define NRFX_LOG_MODULE ADC +#include + +#define EVT_TO_STR(event) (event == NRF_ADC_EVENT_END ? "NRF_ADC_EVENT_END" : "UNKNOWN EVENT") + +typedef struct +{ + nrfx_adc_event_handler_t event_handler; + nrfx_adc_channel_t * p_head; + nrfx_adc_channel_t * p_current_conv; + nrf_adc_value_t * p_buffer; + uint16_t size; + uint16_t idx; + nrfx_drv_state_t state; +} adc_cb_t; + +static adc_cb_t m_cb; + +nrfx_err_t nrfx_adc_init(nrfx_adc_config_t const * p_config, + nrfx_adc_event_handler_t event_handler) +{ + NRFX_ASSERT(p_config); + nrfx_err_t err_code; + + if (m_cb.state != NRFX_DRV_STATE_UNINITIALIZED) + { + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + nrf_adc_event_clear(NRF_ADC_EVENT_END); + if (event_handler) + { + NRFX_IRQ_PRIORITY_SET(ADC_IRQn, p_config->interrupt_priority); + NRFX_IRQ_ENABLE(ADC_IRQn); + } + m_cb.event_handler = event_handler; + m_cb.state = NRFX_DRV_STATE_INITIALIZED; + + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +void nrfx_adc_uninit(void) +{ + m_cb.p_head = NULL; + NRFX_IRQ_DISABLE(ADC_IRQn); + nrf_adc_int_disable(NRF_ADC_INT_END_MASK); + nrf_adc_task_trigger(NRF_ADC_TASK_STOP); + + m_cb.state = NRFX_DRV_STATE_UNINITIALIZED; +} + +void nrfx_adc_channel_enable(nrfx_adc_channel_t * const p_channel) +{ + NRFX_ASSERT(!nrfx_adc_is_busy()); + + p_channel->p_next = NULL; + if (m_cb.p_head == NULL) + { + m_cb.p_head = p_channel; + } + else + { + nrfx_adc_channel_t * p_curr_channel = m_cb.p_head; + while (p_curr_channel->p_next != NULL) + { + NRFX_ASSERT(p_channel != p_curr_channel); + p_curr_channel = p_curr_channel->p_next; + } + p_curr_channel->p_next = p_channel; + } + + NRFX_LOG_INFO("Enabled."); +} + +void nrfx_adc_channel_disable(nrfx_adc_channel_t * const p_channel) +{ + NRFX_ASSERT(m_cb.p_head); + NRFX_ASSERT(!nrfx_adc_is_busy()); + + nrfx_adc_channel_t * p_curr_channel = m_cb.p_head; + nrfx_adc_channel_t * p_prev_channel = NULL; + while (p_curr_channel != p_channel) + { + p_prev_channel = p_curr_channel; + p_curr_channel = p_curr_channel->p_next; + NRFX_ASSERT(p_curr_channel != NULL); + } + if (p_prev_channel) + { + p_prev_channel->p_next = p_curr_channel->p_next; + } + else + { + m_cb.p_head = p_curr_channel->p_next; + } + + NRFX_LOG_INFO("Disabled."); +} + +void nrfx_adc_sample(void) +{ + NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); + NRFX_ASSERT(!nrf_adc_busy_check()); + nrf_adc_task_trigger(NRF_ADC_TASK_START); +} + +nrfx_err_t nrfx_adc_sample_convert(nrfx_adc_channel_t const * const p_channel, + nrf_adc_value_t * p_value) +{ + nrfx_err_t err_code; + + NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); + if (m_cb.state == NRFX_DRV_STATE_POWERED_ON) + { + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + else + { + m_cb.state = NRFX_DRV_STATE_POWERED_ON; + + nrf_adc_init(&p_channel->config); + nrf_adc_enable(); + nrf_adc_int_disable(NRF_ADC_INT_END_MASK); + nrf_adc_task_trigger(NRF_ADC_TASK_START); + if (p_value) + { + while (!nrf_adc_event_check(NRF_ADC_EVENT_END)) {} + nrf_adc_event_clear(NRF_ADC_EVENT_END); + *p_value = (nrf_adc_value_t)nrf_adc_result_get(); + nrf_adc_disable(); + + m_cb.state = NRFX_DRV_STATE_INITIALIZED; + } + else + { + NRFX_ASSERT(m_cb.event_handler); + m_cb.p_buffer = NULL; + nrf_adc_int_enable(NRF_ADC_INT_END_MASK); + } + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } +} + +static bool adc_sample_process() +{ + nrf_adc_event_clear(NRF_ADC_EVENT_END); + nrf_adc_disable(); + m_cb.p_buffer[m_cb.idx] = (nrf_adc_value_t)nrf_adc_result_get(); + m_cb.idx++; + if (m_cb.idx < m_cb.size) + { + bool task_trigger = false; + if (m_cb.p_current_conv->p_next == NULL) + { + m_cb.p_current_conv = m_cb.p_head; + } + else + { + m_cb.p_current_conv = m_cb.p_current_conv->p_next; + task_trigger = true; + } + nrf_adc_init(&m_cb.p_current_conv->config); + nrf_adc_enable(); + if (task_trigger) + { + nrf_adc_task_trigger(NRF_ADC_TASK_START); + } + return false; + } + else + { + return true; + } +} + +nrfx_err_t nrfx_adc_buffer_convert(nrf_adc_value_t * buffer, uint16_t size) +{ + NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); + + nrfx_err_t err_code; + + NRFX_LOG_INFO("Number of samples requested to convert: %d.", size); + + if (m_cb.state == NRFX_DRV_STATE_POWERED_ON) + { + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + else + { + m_cb.state = NRFX_DRV_STATE_POWERED_ON; + m_cb.p_current_conv = m_cb.p_head; + m_cb.size = size; + m_cb.idx = 0; + m_cb.p_buffer = buffer; + nrf_adc_init(&m_cb.p_current_conv->config); + nrf_adc_event_clear(NRF_ADC_EVENT_END); + nrf_adc_enable(); + if (m_cb.event_handler) + { + nrf_adc_int_enable(NRF_ADC_INT_END_MASK); + } + else + { + while (1) + { + while (!nrf_adc_event_check(NRF_ADC_EVENT_END)){} + + if (adc_sample_process()) + { + m_cb.state = NRFX_DRV_STATE_INITIALIZED; + break; + } + } + } + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } +} + +bool nrfx_adc_is_busy(void) +{ + NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); + return (m_cb.state == NRFX_DRV_STATE_POWERED_ON) ? true : false; +} + +void nrfx_adc_irq_handler(void) +{ + if (m_cb.p_buffer == NULL) + { + nrf_adc_event_clear(NRF_ADC_EVENT_END); + NRFX_LOG_DEBUG("Event: %s.",NRFX_LOG_ERROR_STRING_GET(NRF_ADC_EVENT_END)); + nrf_adc_int_disable(NRF_ADC_INT_END_MASK); + nrf_adc_disable(); + nrfx_adc_evt_t evt; + evt.type = NRFX_ADC_EVT_SAMPLE; + evt.data.sample.sample = (nrf_adc_value_t)nrf_adc_result_get(); + NRFX_LOG_DEBUG("ADC data:"); + NRFX_LOG_HEXDUMP_DEBUG((uint8_t *)(&evt.data.sample.sample), sizeof(nrf_adc_value_t)); + m_cb.state = NRFX_DRV_STATE_INITIALIZED; + m_cb.event_handler(&evt); + } + else if (adc_sample_process()) + { + NRFX_LOG_DEBUG("Event: %s.", NRFX_LOG_ERROR_STRING_GET(NRF_ADC_EVENT_END)); + nrf_adc_int_disable(NRF_ADC_INT_END_MASK); + nrfx_adc_evt_t evt; + evt.type = NRFX_ADC_EVT_DONE; + evt.data.done.p_buffer = m_cb.p_buffer; + evt.data.done.size = m_cb.size; + m_cb.state = NRFX_DRV_STATE_INITIALIZED; + NRFX_LOG_DEBUG("ADC data:"); + NRFX_LOG_HEXDUMP_DEBUG((uint8_t *)m_cb.p_buffer, m_cb.size * sizeof(nrf_adc_value_t)); + m_cb.event_handler(&evt); + } +} + +#endif // NRFX_CHECK(NRFX_ADC_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_clock.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_clock.c new file mode 100644 index 00000000000..8e1d14e9a02 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_clock.c @@ -0,0 +1,381 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_CLOCK_ENABLED) + +#include + +#define NRFX_LOG_MODULE CLOCK +#include + +#if NRFX_CHECK(NRFX_POWER_ENABLED) +extern bool nrfx_power_irq_enabled; +#endif + +#define EVT_TO_STR(event) \ + (event == NRF_CLOCK_EVENT_HFCLKSTARTED ? "NRF_CLOCK_EVENT_HFCLKSTARTED" : \ + (event == NRF_CLOCK_EVENT_LFCLKSTARTED ? "NRF_CLOCK_EVENT_LFCLKSTARTED" : \ + (event == NRF_CLOCK_EVENT_DONE ? "NRF_CLOCK_EVENT_DONE" : \ + (event == NRF_CLOCK_EVENT_CTTO ? "NRF_CLOCK_EVENT_CTTO" : \ + "UNKNOWN EVENT")))) + + +/*lint -save -e652 */ +#define NRF_CLOCK_LFCLK_RC CLOCK_LFCLKSRC_SRC_RC +#define NRF_CLOCK_LFCLK_Xtal CLOCK_LFCLKSRC_SRC_Xtal +#define NRF_CLOCK_LFCLK_Synth CLOCK_LFCLKSRC_SRC_Synth +/*lint -restore */ + +#if (NRFX_CLOCK_CONFIG_LF_SRC == NRF_CLOCK_LFCLK_RC) +#define CALIBRATION_SUPPORT 1 +#else +#define CALIBRATION_SUPPORT 0 +#endif + +#if defined(NRF52810_XXAA) || \ + defined(NRF52832_XXAA) || defined(NRF52832_XXAB) || \ + defined(NRF52840_XXAA) +// Enable workaround for nRF52 anomaly 192 (LFRC oscillator frequency is wrong +// after calibration, exceeding 500 ppm). +#define USE_WORKAROUND_FOR_ANOMALY_192 + +// Enable workaround for nRF52 anomaly 201 (EVENTS_HFCLKSTARTED might be generated twice). +#define USE_WORKAROUND_FOR_ANOMALY_201 +#endif + +typedef enum +{ + CAL_STATE_IDLE, + CAL_STATE_CAL +} nrfx_clock_cal_state_t; + +/**@brief CLOCK control block. */ +typedef struct +{ + nrfx_clock_event_handler_t event_handler; + bool module_initialized; /*< Indicate the state of module */ +#if defined(USE_WORKAROUND_FOR_ANOMALY_201) + bool hfclk_started; /*< Anomaly 201 workaround. */ +#endif + +#if CALIBRATION_SUPPORT + volatile nrfx_clock_cal_state_t cal_state; +#endif // CALIBRATION_SUPPORT +} nrfx_clock_cb_t; + +static nrfx_clock_cb_t m_clock_cb; + +/** + * This variable is used to check whether common POWER_CLOCK common interrupt + * should be disabled or not if @ref nrfx_power tries to disable the interrupt. + */ +#if NRFX_CHECK(NRFX_POWER_ENABLED) +bool nrfx_clock_irq_enabled; +#endif + +#if defined(NRF52832_XXAA) || defined(NRF52832_XXAB) + +// ANOMALY 132 - LFCLK needs to avoid frame from 66us to 138us after LFCLK stop. This solution +// applies delay of 138us before starting LFCLK. +#define ANOMALY_132_REQ_DELAY_US 138UL + +// nRF52832 is clocked with 64MHz. +#define ANOMALY_132_NRF52832_FREQ_MHZ 64UL + +// Convert time to cycles. +#define ANOMALY_132_DELAY_CYCLES (ANOMALY_132_REQ_DELAY_US * ANOMALY_132_NRF52832_FREQ_MHZ) + +/** + * @brief Function for applying delay of 138us before starting LFCLK. + */ +static void nrfx_clock_anomaly_132(void) +{ + uint32_t cyccnt_inital; + uint32_t core_debug; + uint32_t dwt_ctrl; + + // Preserve DEMCR register to do not influence into its configuration. Enable the trace and + // debug blocks. It is required to read and write data to DWT block. + core_debug = CoreDebug->DEMCR; + CoreDebug->DEMCR = core_debug | CoreDebug_DEMCR_TRCENA_Msk; + + // Preserve CTRL register in DWT block to do not influence into its configuration. Make sure + // that cycle counter is enabled. + dwt_ctrl = DWT->CTRL; + DWT->CTRL = dwt_ctrl | DWT_CTRL_CYCCNTENA_Msk; + + // Store start value of cycle counter. + cyccnt_inital = DWT->CYCCNT; + + // Delay required time. + while ((DWT->CYCCNT - cyccnt_inital) < ANOMALY_132_DELAY_CYCLES) + {} + + // Restore preserved registers. + DWT->CTRL = dwt_ctrl; + CoreDebug->DEMCR = core_debug; +} + +#endif // defined(NRF52832_XXAA) || defined(NRF52832_XXAB) + +nrfx_err_t nrfx_clock_init(nrfx_clock_event_handler_t event_handler) +{ + NRFX_ASSERT(event_handler); + + nrfx_err_t err_code = NRFX_SUCCESS; + if (m_clock_cb.module_initialized) + { + err_code = NRFX_ERROR_ALREADY_INITIALIZED; + } + else + { +#if CALIBRATION_SUPPORT + m_clock_cb.cal_state = CAL_STATE_IDLE; +#endif + m_clock_cb.event_handler = event_handler; + m_clock_cb.module_initialized = true; +#if defined(USE_WORKAROUND_FOR_ANOMALY_201) + m_clock_cb.hfclk_started = false; +#endif + } + + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +void nrfx_clock_enable(void) +{ + NRFX_ASSERT(m_clock_cb.module_initialized); + nrfx_power_clock_irq_init(); + nrf_clock_lf_src_set((nrf_clock_lfclk_t)NRFX_CLOCK_CONFIG_LF_SRC); + +#if NRFX_CHECK(NRFX_POWER_ENABLED) + nrfx_clock_irq_enabled = true; +#endif + + NRFX_LOG_INFO("Module enabled."); +} + +void nrfx_clock_disable(void) +{ + NRFX_ASSERT(m_clock_cb.module_initialized); +#if NRFX_CHECK(NRFX_POWER_ENABLED) + NRFX_ASSERT(nrfx_clock_irq_enabled); + if (!nrfx_power_irq_enabled) +#endif + { + NRFX_IRQ_DISABLE(POWER_CLOCK_IRQn); + } + nrf_clock_int_disable(CLOCK_INTENSET_HFCLKSTARTED_Msk | + CLOCK_INTENSET_LFCLKSTARTED_Msk | + CLOCK_INTENSET_DONE_Msk | + CLOCK_INTENSET_CTTO_Msk); +#if NRFX_CHECK(NRFX_POWER_ENABLED) + nrfx_clock_irq_enabled = false; +#endif + NRFX_LOG_INFO("Module disabled."); +} + +void nrfx_clock_uninit(void) +{ + NRFX_ASSERT(m_clock_cb.module_initialized); + nrfx_clock_lfclk_stop(); + nrfx_clock_hfclk_stop(); + m_clock_cb.module_initialized = false; + NRFX_LOG_INFO("Uninitialized."); +} + +void nrfx_clock_lfclk_start(void) +{ + NRFX_ASSERT(m_clock_cb.module_initialized); + nrf_clock_event_clear(NRF_CLOCK_EVENT_LFCLKSTARTED); + nrf_clock_int_enable(NRF_CLOCK_INT_LF_STARTED_MASK); + +#if defined(NRF52832_XXAA) || defined(NRF52832_XXAB) + nrfx_clock_anomaly_132(); +#endif + + nrf_clock_task_trigger(NRF_CLOCK_TASK_LFCLKSTART); +} + +void nrfx_clock_lfclk_stop(void) +{ + NRFX_ASSERT(m_clock_cb.module_initialized); + nrf_clock_task_trigger(NRF_CLOCK_TASK_LFCLKSTOP); + while (nrf_clock_lf_is_running()) + {} +} + +void nrfx_clock_hfclk_start(void) +{ + NRFX_ASSERT(m_clock_cb.module_initialized); + nrf_clock_event_clear(NRF_CLOCK_EVENT_HFCLKSTARTED); + nrf_clock_int_enable(NRF_CLOCK_INT_HF_STARTED_MASK); + nrf_clock_task_trigger(NRF_CLOCK_TASK_HFCLKSTART); +} + +void nrfx_clock_hfclk_stop(void) +{ + NRFX_ASSERT(m_clock_cb.module_initialized); + nrf_clock_task_trigger(NRF_CLOCK_TASK_HFCLKSTOP); + while (nrf_clock_hf_is_running(NRF_CLOCK_HFCLK_HIGH_ACCURACY)) + {} +#if defined(USE_WORKAROUND_FOR_ANOMALY_201) + m_clock_cb.hfclk_started = false; +#endif +} + +nrfx_err_t nrfx_clock_calibration_start(void) +{ + nrfx_err_t err_code = NRFX_SUCCESS; +#if CALIBRATION_SUPPORT + if (nrfx_clock_hfclk_is_running() == false) + { + return NRFX_ERROR_INVALID_STATE; + } + + if (nrfx_clock_lfclk_is_running() == false) + { + return NRFX_ERROR_INVALID_STATE; + } + + if (m_clock_cb.cal_state == CAL_STATE_IDLE) + { + nrf_clock_event_clear(NRF_CLOCK_EVENT_DONE); + nrf_clock_int_enable(NRF_CLOCK_INT_DONE_MASK); + m_clock_cb.cal_state = CAL_STATE_CAL; +#if defined(USE_WORKAROUND_FOR_ANOMALY_192) + *(volatile uint32_t *)0x40000C34 = 0x00000002; +#endif + nrf_clock_task_trigger(NRF_CLOCK_TASK_CAL); + } + else + { + err_code = NRFX_ERROR_BUSY; + } +#endif // CALIBRATION_SUPPORT + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +nrfx_err_t nrfx_clock_is_calibrating(void) +{ +#if CALIBRATION_SUPPORT + if (m_clock_cb.cal_state == CAL_STATE_CAL) + { + return NRFX_ERROR_BUSY; + } +#endif + return NRFX_SUCCESS; +} + +void nrfx_clock_calibration_timer_start(uint8_t interval) +{ + nrf_clock_cal_timer_timeout_set(interval); + nrf_clock_event_clear(NRF_CLOCK_EVENT_CTTO); + nrf_clock_int_enable(NRF_CLOCK_INT_CTTO_MASK); + nrf_clock_task_trigger(NRF_CLOCK_TASK_CTSTART); +} + +void nrfx_clock_calibration_timer_stop(void) +{ + nrf_clock_int_disable(NRF_CLOCK_INT_CTTO_MASK); + nrf_clock_task_trigger(NRF_CLOCK_TASK_CTSTOP); +} + +void nrfx_clock_irq_handler(void) +{ + if (nrf_clock_event_check(NRF_CLOCK_EVENT_HFCLKSTARTED)) + { + nrf_clock_event_clear(NRF_CLOCK_EVENT_HFCLKSTARTED); + NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_CLOCK_EVENT_HFCLKSTARTED)); + nrf_clock_int_disable(NRF_CLOCK_INT_HF_STARTED_MASK); + +#if defined(USE_WORKAROUND_FOR_ANOMALY_201) + if (!m_clock_cb.hfclk_started) + { + m_clock_cb.hfclk_started = true; + m_clock_cb.event_handler(NRFX_CLOCK_EVT_HFCLK_STARTED); + } +#else + m_clock_cb.event_handler(NRFX_CLOCK_EVT_HFCLK_STARTED); +#endif + } + if (nrf_clock_event_check(NRF_CLOCK_EVENT_LFCLKSTARTED)) + { + nrf_clock_event_clear(NRF_CLOCK_EVENT_LFCLKSTARTED); + NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_CLOCK_EVENT_LFCLKSTARTED)); + nrf_clock_int_disable(NRF_CLOCK_INT_LF_STARTED_MASK); + + m_clock_cb.event_handler(NRFX_CLOCK_EVT_LFCLK_STARTED); + } +#if CALIBRATION_SUPPORT + if (nrf_clock_event_check(NRF_CLOCK_EVENT_CTTO)) + { + nrf_clock_event_clear(NRF_CLOCK_EVENT_CTTO); + NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_CLOCK_EVENT_CTTO)); + nrf_clock_int_disable(NRF_CLOCK_INT_CTTO_MASK); + + m_clock_cb.event_handler(NRFX_CLOCK_EVT_CTTO); + } + + if (nrf_clock_event_check(NRF_CLOCK_EVENT_DONE)) + { +#if defined(USE_WORKAROUND_FOR_ANOMALY_192) + *(volatile uint32_t *)0x40000C34 = 0x00000000; +#endif + nrf_clock_event_clear(NRF_CLOCK_EVENT_DONE); + NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_CLOCK_EVENT_DONE)); + nrf_clock_int_disable(NRF_CLOCK_INT_DONE_MASK); + m_clock_cb.cal_state = CAL_STATE_IDLE; + m_clock_cb.event_handler(NRFX_CLOCK_EVT_CAL_DONE); + } +#endif // CALIBRATION_SUPPORT +} + +#undef NRF_CLOCK_LFCLK_RC +#undef NRF_CLOCK_LFCLK_Xtal +#undef NRF_CLOCK_LFCLK_Synth + +#endif // NRFX_CHECK(NRFX_CLOCK_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_comp.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_comp.c new file mode 100644 index 00000000000..63572d5ca21 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_comp.c @@ -0,0 +1,211 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_COMP_ENABLED) + +#include +#include "prs/nrfx_prs.h" + +#define NRFX_LOG_MODULE COMP +#include + +#define EVT_TO_STR(event) \ + (event == NRF_COMP_EVENT_READY ? "NRF_COMP_EVENT_READY" : \ + (event == NRF_COMP_EVENT_DOWN ? "NRF_COMP_EVENT_DOWN" : \ + (event == NRF_COMP_EVENT_UP ? "NRF_COMP_EVENT_UP" : \ + (event == NRF_COMP_EVENT_CROSS ? "NRF_COMP_EVENT_CROSS" : \ + "UNKNOWN ERROR")))) + + +static nrfx_comp_event_handler_t m_comp_event_handler = NULL; +static nrfx_drv_state_t m_state = NRFX_DRV_STATE_UNINITIALIZED; + +static void comp_execute_handler(nrf_comp_event_t event, uint32_t event_mask) +{ + if (nrf_comp_event_check(event) && nrf_comp_int_enable_check(event_mask)) + { + nrf_comp_event_clear(event); + NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(event)); + + m_comp_event_handler(event); + } +} + +void nrfx_comp_irq_handler(void) +{ + comp_execute_handler(NRF_COMP_EVENT_READY, COMP_INTENSET_READY_Msk); + comp_execute_handler(NRF_COMP_EVENT_DOWN, COMP_INTENSET_DOWN_Msk); + comp_execute_handler(NRF_COMP_EVENT_UP, COMP_INTENSET_UP_Msk); + comp_execute_handler(NRF_COMP_EVENT_CROSS, COMP_INTENSET_CROSS_Msk); +} + + +nrfx_err_t nrfx_comp_init(nrfx_comp_config_t const * p_config, + nrfx_comp_event_handler_t event_handler) +{ + NRFX_ASSERT(p_config); + NRFX_ASSERT(event_handler); + nrfx_err_t err_code; + + if (m_state != NRFX_DRV_STATE_UNINITIALIZED) + { // COMP driver is already initialized + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + m_comp_event_handler = event_handler; + +#if NRFX_CHECK(NRFX_PRS_ENABLED) + if (nrfx_prs_acquire(NRF_COMP, nrfx_comp_irq_handler) != NRFX_SUCCESS) + { + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } +#endif + + nrf_comp_task_trigger(NRF_COMP_TASK_STOP); + nrf_comp_enable(); + + // Clear events to be sure there are no leftovers. + nrf_comp_event_clear(NRF_COMP_EVENT_READY); + nrf_comp_event_clear(NRF_COMP_EVENT_DOWN); + nrf_comp_event_clear(NRF_COMP_EVENT_UP); + nrf_comp_event_clear(NRF_COMP_EVENT_CROSS); + + nrf_comp_ref_set(p_config->reference); + + //If external source is chosen, write to appropriate register. + if (p_config->reference == COMP_REFSEL_REFSEL_ARef) + { + nrf_comp_ext_ref_set(p_config->ext_ref); + } + + nrf_comp_th_set(p_config->threshold); + nrf_comp_main_mode_set(p_config->main_mode); + nrf_comp_speed_mode_set(p_config->speed_mode); + nrf_comp_hysteresis_set(p_config->hyst); +#if defined (COMP_ISOURCE_ISOURCE_Msk) + nrf_comp_isource_set(p_config->isource); +#endif + nrf_comp_shorts_disable(NRFX_COMP_SHORT_STOP_AFTER_CROSS_EVT | + NRFX_COMP_SHORT_STOP_AFTER_UP_EVT | + NRFX_COMP_SHORT_STOP_AFTER_DOWN_EVT); + nrf_comp_int_disable(COMP_INTENCLR_CROSS_Msk | + COMP_INTENCLR_UP_Msk | + COMP_INTENCLR_DOWN_Msk | + COMP_INTENCLR_READY_Msk); + + nrf_comp_input_select(p_config->input); + + NRFX_IRQ_PRIORITY_SET(COMP_LPCOMP_IRQn, p_config->interrupt_priority); + NRFX_IRQ_ENABLE(COMP_LPCOMP_IRQn); + + m_state = NRFX_DRV_STATE_INITIALIZED; + + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +void nrfx_comp_uninit(void) +{ + NRFX_ASSERT(m_state != NRFX_DRV_STATE_UNINITIALIZED); + NRFX_IRQ_DISABLE(COMP_LPCOMP_IRQn); + nrf_comp_disable(); +#if NRFX_CHECK(NRFX_PRS_ENABLED) + nrfx_prs_release(NRF_COMP); +#endif + m_state = NRFX_DRV_STATE_UNINITIALIZED; + m_comp_event_handler = NULL; + NRFX_LOG_INFO("Uninitialized."); +} + +void nrfx_comp_pin_select(nrf_comp_input_t psel) +{ + bool comp_enable_state = nrf_comp_enable_check(); + nrf_comp_task_trigger(NRF_COMP_TASK_STOP); + if (m_state == NRFX_DRV_STATE_POWERED_ON) + { + m_state = NRFX_DRV_STATE_INITIALIZED; + } + nrf_comp_disable(); + nrf_comp_input_select(psel); + if (comp_enable_state == true) + { + nrf_comp_enable(); + } +} + +void nrfx_comp_start(uint32_t comp_int_mask, uint32_t comp_shorts_mask) +{ + NRFX_ASSERT(m_state == NRFX_DRV_STATE_INITIALIZED); + nrf_comp_int_enable(comp_int_mask); + nrf_comp_shorts_enable(comp_shorts_mask); + nrf_comp_task_trigger(NRF_COMP_TASK_START); + m_state = NRFX_DRV_STATE_POWERED_ON; + NRFX_LOG_INFO("Enabled."); +} + +void nrfx_comp_stop(void) +{ + NRFX_ASSERT(m_state == NRFX_DRV_STATE_POWERED_ON); + nrf_comp_shorts_disable(UINT32_MAX); + nrf_comp_int_disable(UINT32_MAX); + nrf_comp_task_trigger(NRF_COMP_TASK_STOP); + m_state = NRFX_DRV_STATE_INITIALIZED; + NRFX_LOG_INFO("Disabled."); +} + +uint32_t nrfx_comp_sample() +{ + NRFX_ASSERT(m_state == NRFX_DRV_STATE_POWERED_ON); + nrf_comp_task_trigger(NRF_COMP_TASK_SAMPLE); + return nrf_comp_result_get(); +} + +#endif // NRFX_CHECK(NRFX_COMP_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_gpiote.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_gpiote.c new file mode 100644 index 00000000000..8412b60ad66 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_gpiote.c @@ -0,0 +1,826 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include + +#if NRFX_CHECK(NRFX_GPIOTE_ENABLED) + +#include +#include "nrf_bitmask.h" +#include + +#define NRFX_LOG_MODULE GPIOTE +#include + + +#define FORBIDDEN_HANDLER_ADDRESS ((nrfx_gpiote_evt_handler_t)UINT32_MAX) +#define PIN_NOT_USED (-1) +#define PIN_USED (-2) +#define NO_CHANNELS (-1) +#define SENSE_FIELD_POS (6) +#define SENSE_FIELD_MASK (0xC0) + +/** + * @brief Macro for converting task-event index to an address of an event register. + * + * Macro utilizes the fact that registers are grouped together in ascending order. + */ +#define TE_IDX_TO_EVENT_ADDR(idx) (nrf_gpiote_events_t)((uint32_t)NRF_GPIOTE_EVENTS_IN_0 + \ + (sizeof(uint32_t) * (idx))) + +/** + * @brief Macro for converting task-event index of OUT task to an address of a task register. + * + * Macro utilizes the fact that registers are grouped together in ascending order. + */ +#define TE_OUT_IDX_TO_TASK_ADDR(idx) (nrf_gpiote_tasks_t)((uint32_t)NRF_GPIOTE_TASKS_OUT_0 + \ + (sizeof(uint32_t) * (idx))) + +#if defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__NRFX_DOXYGEN__) +/** + * @brief Macro for converting task-event index of SET task to an address of a task register. + * + * Macro utilizes the fact that registers are grouped together in ascending order. + */ +#define TE_SET_IDX_TO_TASK_ADDR(idx) (nrf_gpiote_tasks_t)((uint32_t)NRF_GPIOTE_TASKS_SET_0 + \ + (sizeof(uint32_t) * (idx))) + +#endif // defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__NRFX_DOXYGEN__) + +#if defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__) +/** + * @brief Macro for converting task-event index of CLR task to an address of a task register. + * + * Macro utilizes the fact that registers are grouped together in ascending order. + */ +#define TE_CLR_IDX_TO_TASK_ADDR(idx) (nrf_gpiote_tasks_t)((uint32_t)NRF_GPIOTE_TASKS_CLR_0 + \ + (sizeof(uint32_t) * (idx))) + +#endif // defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__) + +/*lint -save -e571*/ /* Suppress "Warning 571: Suspicious cast" */ +typedef struct +{ + nrfx_gpiote_evt_handler_t handlers[GPIOTE_CH_NUM + NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS]; + int8_t pin_assignments[NUMBER_OF_PINS]; + int8_t port_handlers_pins[NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS]; + uint8_t configured_pins[((NUMBER_OF_PINS)+7) / 8]; + nrfx_drv_state_t state; +} gpiote_control_block_t; + +static gpiote_control_block_t m_cb; + +__STATIC_INLINE bool pin_in_use(uint32_t pin) +{ + return (m_cb.pin_assignments[pin] != PIN_NOT_USED); +} + + +__STATIC_INLINE bool pin_in_use_as_non_task_out(uint32_t pin) +{ + return (m_cb.pin_assignments[pin] == PIN_USED); +} + + +__STATIC_INLINE bool pin_in_use_by_te(uint32_t pin) +{ + return (m_cb.pin_assignments[pin] >= 0 && m_cb.pin_assignments[pin] < GPIOTE_CH_NUM) ? + true : false; +} + + +__STATIC_INLINE bool pin_in_use_by_port(uint32_t pin) +{ + return (m_cb.pin_assignments[pin] >= GPIOTE_CH_NUM); +} + + +__STATIC_INLINE bool pin_in_use_by_gpiote(uint32_t pin) +{ + return (m_cb.pin_assignments[pin] >= 0); +} + + +__STATIC_INLINE void pin_in_use_by_te_set(uint32_t pin, + uint32_t channel_id, + nrfx_gpiote_evt_handler_t handler, + bool is_channel) +{ + m_cb.pin_assignments[pin] = channel_id; + m_cb.handlers[channel_id] = handler; + if (!is_channel) + { + m_cb.port_handlers_pins[channel_id - GPIOTE_CH_NUM] = (int8_t)pin; + } +} + + +__STATIC_INLINE void pin_in_use_set(uint32_t pin) +{ + m_cb.pin_assignments[pin] = PIN_USED; +} + + +__STATIC_INLINE void pin_in_use_clear(uint32_t pin) +{ + m_cb.pin_assignments[pin] = PIN_NOT_USED; +} + + +__STATIC_INLINE void pin_configured_set(uint32_t pin) +{ + nrf_bitmask_bit_set(pin, m_cb.configured_pins); +} + +__STATIC_INLINE void pin_configured_clear(uint32_t pin) +{ + nrf_bitmask_bit_clear(pin, m_cb.configured_pins); +} + +__STATIC_INLINE bool pin_configured_check(uint32_t pin) +{ + return 0 != nrf_bitmask_bit_is_set(pin, m_cb.configured_pins); +} + +__STATIC_INLINE int8_t channel_port_get(uint32_t pin) +{ + return m_cb.pin_assignments[pin]; +} + + +__STATIC_INLINE nrfx_gpiote_evt_handler_t channel_handler_get(uint32_t channel) +{ + return m_cb.handlers[channel]; +} + + +static int8_t channel_port_alloc(uint32_t pin, nrfx_gpiote_evt_handler_t handler, bool channel) +{ + int8_t channel_id = NO_CHANNELS; + uint32_t i; + + uint32_t start_idx = channel ? 0 : GPIOTE_CH_NUM; + uint32_t end_idx = + channel ? GPIOTE_CH_NUM : (GPIOTE_CH_NUM + NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS); + + // critical section + + for (i = start_idx; i < end_idx; i++) + { + if (m_cb.handlers[i] == FORBIDDEN_HANDLER_ADDRESS) + { + pin_in_use_by_te_set(pin, i, handler, channel); + channel_id = i; + break; + } + } + // critical section + return channel_id; +} + + +static void channel_free(uint8_t channel_id) +{ + m_cb.handlers[channel_id] = FORBIDDEN_HANDLER_ADDRESS; + if (channel_id >= GPIOTE_CH_NUM) + { + m_cb.port_handlers_pins[channel_id - GPIOTE_CH_NUM] = (int8_t)PIN_NOT_USED; + } +} + + +nrfx_err_t nrfx_gpiote_init(void) +{ + nrfx_err_t err_code; + + if (m_cb.state != NRFX_DRV_STATE_UNINITIALIZED) + { + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + uint8_t i; + + for (i = 0; i < NUMBER_OF_PINS; i++) + { + pin_in_use_clear(i); + } + + for (i = 0; i < (GPIOTE_CH_NUM + NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS); i++) + { + channel_free(i); + } + + memset(m_cb.configured_pins, 0, sizeof(m_cb.configured_pins)); + + NRFX_IRQ_PRIORITY_SET(GPIOTE_IRQn, NRFX_GPIOTE_CONFIG_IRQ_PRIORITY); + NRFX_IRQ_ENABLE(GPIOTE_IRQn); + nrf_gpiote_event_clear(NRF_GPIOTE_EVENTS_PORT); + nrf_gpiote_int_enable(GPIOTE_INTENSET_PORT_Msk); + m_cb.state = NRFX_DRV_STATE_INITIALIZED; + + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + + +bool nrfx_gpiote_is_init(void) +{ + return (m_cb.state != NRFX_DRV_STATE_UNINITIALIZED) ? true : false; +} + + +void nrfx_gpiote_uninit(void) +{ + NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); + + uint32_t i; + + for (i = 0; i < NUMBER_OF_PINS; i++) + { + if (pin_in_use_as_non_task_out(i)) + { + nrfx_gpiote_out_uninit(i); + } + else if ( pin_in_use_by_gpiote(i)) + { + /* Disable gpiote_in is having the same effect on out pin as gpiote_out_uninit on + * so it can be called on all pins used by GPIOTE. + */ + nrfx_gpiote_in_uninit(i); + } + } + m_cb.state = NRFX_DRV_STATE_UNINITIALIZED; + NRFX_LOG_INFO("Uninitialized."); +} + + +nrfx_err_t nrfx_gpiote_out_init(nrfx_gpiote_pin_t pin, + nrfx_gpiote_out_config_t const * p_config) +{ + NRFX_ASSERT(pin < NUMBER_OF_PINS); + NRFX_ASSERT(m_cb.state == NRFX_DRV_STATE_INITIALIZED); + NRFX_ASSERT(p_config); + + nrfx_err_t err_code = NRFX_SUCCESS; + + if (pin_in_use(pin)) + { + err_code = NRFX_ERROR_INVALID_STATE; + } + else + { + if (p_config->task_pin) + { + int8_t channel = channel_port_alloc(pin, NULL, true); + + if (channel != NO_CHANNELS) + { + nrf_gpiote_task_configure((uint32_t)channel, + pin, + p_config->action, + p_config->init_state); + } + else + { + err_code = NRFX_ERROR_NO_MEM; + } + } + else + { + pin_in_use_set(pin); + } + + if (err_code == NRFX_SUCCESS) + { + if (p_config->init_state == NRF_GPIOTE_INITIAL_VALUE_HIGH) + { + nrf_gpio_pin_set(pin); + } + else + { + nrf_gpio_pin_clear(pin); + } + + nrf_gpio_cfg_output(pin); + pin_configured_set(pin); + } + } + + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + + +void nrfx_gpiote_out_uninit(nrfx_gpiote_pin_t pin) +{ + NRFX_ASSERT(pin < NUMBER_OF_PINS); + NRFX_ASSERT(pin_in_use(pin)); + + if (pin_in_use_by_te(pin)) + { + channel_free((uint8_t)channel_port_get(pin)); + nrf_gpiote_te_default((uint32_t)channel_port_get(pin)); + } + pin_in_use_clear(pin); + + if (pin_configured_check(pin)) + { + nrf_gpio_cfg_default(pin); + pin_configured_clear(pin); + } +} + + +void nrfx_gpiote_out_set(nrfx_gpiote_pin_t pin) +{ + NRFX_ASSERT(pin < NUMBER_OF_PINS); + NRFX_ASSERT(pin_in_use(pin)); + NRFX_ASSERT(!pin_in_use_by_te(pin)); + + nrf_gpio_pin_set(pin); +} + + +void nrfx_gpiote_out_clear(nrfx_gpiote_pin_t pin) +{ + NRFX_ASSERT(pin < NUMBER_OF_PINS); + NRFX_ASSERT(pin_in_use(pin)); + NRFX_ASSERT(!pin_in_use_by_te(pin)); + + nrf_gpio_pin_clear(pin); +} + + +void nrfx_gpiote_out_toggle(nrfx_gpiote_pin_t pin) +{ + NRFX_ASSERT(pin < NUMBER_OF_PINS); + NRFX_ASSERT(pin_in_use(pin)); + NRFX_ASSERT(!pin_in_use_by_te(pin)); + + nrf_gpio_pin_toggle(pin); +} + + +void nrfx_gpiote_out_task_enable(nrfx_gpiote_pin_t pin) +{ + NRFX_ASSERT(pin < NUMBER_OF_PINS); + NRFX_ASSERT(pin_in_use(pin)); + NRFX_ASSERT(pin_in_use_by_te(pin)); + + nrf_gpiote_task_enable((uint32_t)m_cb.pin_assignments[pin]); +} + + +void nrfx_gpiote_out_task_disable(nrfx_gpiote_pin_t pin) +{ + NRFX_ASSERT(pin < NUMBER_OF_PINS); + NRFX_ASSERT(pin_in_use(pin)); + NRFX_ASSERT(pin_in_use_by_te(pin)); + + nrf_gpiote_task_disable((uint32_t)m_cb.pin_assignments[pin]); +} + + +uint32_t nrfx_gpiote_out_task_addr_get(nrfx_gpiote_pin_t pin) +{ + NRFX_ASSERT(pin < NUMBER_OF_PINS); + NRFX_ASSERT(pin_in_use_by_te(pin)); + + nrf_gpiote_tasks_t task = TE_OUT_IDX_TO_TASK_ADDR((uint32_t)channel_port_get(pin)); + return nrf_gpiote_task_addr_get(task); +} + + +#if defined(GPIOTE_FEATURE_SET_PRESENT) +uint32_t nrfx_gpiote_set_task_addr_get(nrfx_gpiote_pin_t pin) +{ + NRFX_ASSERT(pin < NUMBER_OF_PINS); + NRFX_ASSERT(pin_in_use_by_te(pin)); + + nrf_gpiote_tasks_t task = TE_SET_IDX_TO_TASK_ADDR((uint32_t)channel_port_get(pin)); + return nrf_gpiote_task_addr_get(task); +} + + +#endif // defined(GPIOTE_FEATURE_SET_PRESENT) + +#if defined(GPIOTE_FEATURE_CLR_PRESENT) +uint32_t nrfx_gpiote_clr_task_addr_get(nrfx_gpiote_pin_t pin) +{ + NRFX_ASSERT(pin < NUMBER_OF_PINS); + NRFX_ASSERT(pin_in_use_by_te(pin)); + + nrf_gpiote_tasks_t task = TE_CLR_IDX_TO_TASK_ADDR((uint32_t)channel_port_get(pin)); + return nrf_gpiote_task_addr_get(task); +} + + +#endif // defined(GPIOTE_FEATURE_CLR_PRESENT) + +void nrfx_gpiote_out_task_force(nrfx_gpiote_pin_t pin, uint8_t state) +{ + NRFX_ASSERT(pin < NUMBER_OF_PINS); + NRFX_ASSERT(pin_in_use(pin)); + NRFX_ASSERT(pin_in_use_by_te(pin)); + + nrf_gpiote_outinit_t init_val = + state ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW; + nrf_gpiote_task_force((uint32_t)m_cb.pin_assignments[pin], init_val); +} + + +void nrfx_gpiote_out_task_trigger(nrfx_gpiote_pin_t pin) +{ + NRFX_ASSERT(pin < NUMBER_OF_PINS); + NRFX_ASSERT(pin_in_use(pin)); + NRFX_ASSERT(pin_in_use_by_te(pin)); + + nrf_gpiote_tasks_t task = TE_OUT_IDX_TO_TASK_ADDR((uint32_t)channel_port_get(pin)); + nrf_gpiote_task_set(task); +} + + +#if defined(GPIOTE_FEATURE_SET_PRESENT) +void nrfx_gpiote_set_task_trigger(nrfx_gpiote_pin_t pin) +{ + NRFX_ASSERT(pin < NUMBER_OF_PINS); + NRFX_ASSERT(pin_in_use(pin)); + NRFX_ASSERT(pin_in_use_by_te(pin)); + + nrf_gpiote_tasks_t task = TE_SET_IDX_TO_TASK_ADDR((uint32_t)channel_port_get(pin)); + nrf_gpiote_task_set(task); +} + + +#endif // defined(GPIOTE_FEATURE_SET_PRESENT) + +#if defined(GPIOTE_FEATURE_CLR_PRESENT) +void nrfx_gpiote_clr_task_trigger(nrfx_gpiote_pin_t pin) +{ + NRFX_ASSERT(pin < NUMBER_OF_PINS); + NRFX_ASSERT(pin_in_use(pin)); + NRFX_ASSERT(pin_in_use_by_te(pin)); + + nrf_gpiote_tasks_t task = TE_CLR_IDX_TO_TASK_ADDR((uint32_t)channel_port_get(pin)); + nrf_gpiote_task_set(task); +} + + +#endif // defined(GPIOTE_FEATURE_CLR_PRESENT) + +nrfx_err_t nrfx_gpiote_in_init(nrfx_gpiote_pin_t pin, + nrfx_gpiote_in_config_t const * p_config, + nrfx_gpiote_evt_handler_t evt_handler) +{ + NRFX_ASSERT(pin < NUMBER_OF_PINS); + nrfx_err_t err_code = NRFX_SUCCESS; + + /* Only one GPIOTE channel can be assigned to one physical pin. */ + if (pin_in_use_by_gpiote(pin)) + { + err_code = NRFX_ERROR_INVALID_STATE; + } + else + { + int8_t channel = channel_port_alloc(pin, evt_handler, p_config->hi_accuracy); + if (channel != NO_CHANNELS) + { + if (!p_config->skip_gpio_setup) + { + if (p_config->is_watcher) + { + nrf_gpio_cfg_watcher(pin); + } + else + { + nrf_gpio_cfg_input(pin, p_config->pull); + } + pin_configured_set(pin); + } + + if (p_config->hi_accuracy) + { + nrf_gpiote_event_configure((uint32_t)channel, pin, p_config->sense); + } + else + { + m_cb.port_handlers_pins[channel - + GPIOTE_CH_NUM] |= (p_config->sense) << SENSE_FIELD_POS; + } + } + else + { + err_code = NRFX_ERROR_NO_MEM; + } + } + + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +void nrfx_gpiote_in_event_enable(nrfx_gpiote_pin_t pin, bool int_enable) +{ + NRFX_ASSERT(pin < NUMBER_OF_PINS); + NRFX_ASSERT(pin_in_use_by_gpiote(pin)); + if (pin_in_use_by_port(pin)) + { + uint8_t pin_and_sense = (uint8_t) + m_cb.port_handlers_pins[channel_port_get(pin) - GPIOTE_CH_NUM]; + nrf_gpiote_polarity_t polarity = + (nrf_gpiote_polarity_t)(pin_and_sense >> SENSE_FIELD_POS); + nrf_gpio_pin_sense_t sense; + if (polarity == NRF_GPIOTE_POLARITY_TOGGLE) + { + /* read current pin state and set for next sense to oposit */ + sense = (nrf_gpio_pin_read(pin)) ? + NRF_GPIO_PIN_SENSE_LOW : NRF_GPIO_PIN_SENSE_HIGH; + } + else + { + sense = (polarity == NRF_GPIOTE_POLARITY_LOTOHI) ? + NRF_GPIO_PIN_SENSE_HIGH : NRF_GPIO_PIN_SENSE_LOW; + } + nrf_gpio_cfg_sense_set(pin, sense); + } + else if (pin_in_use_by_te(pin)) + { + int32_t channel = (int32_t)channel_port_get(pin); + nrf_gpiote_events_t event = TE_IDX_TO_EVENT_ADDR((uint32_t)channel); + + nrf_gpiote_event_enable((uint32_t)channel); + + nrf_gpiote_event_clear(event); + if (int_enable) + { + nrfx_gpiote_evt_handler_t handler = channel_handler_get((uint32_t)channel_port_get(pin)); + // Enable the interrupt only if event handler was provided. + if (handler) + { + nrf_gpiote_int_enable(1 << channel); + } + } + } +} + + +void nrfx_gpiote_in_event_disable(nrfx_gpiote_pin_t pin) +{ + NRFX_ASSERT(pin < NUMBER_OF_PINS); + NRFX_ASSERT(pin_in_use_by_gpiote(pin)); + if (pin_in_use_by_port(pin)) + { + nrf_gpio_cfg_sense_set(pin, NRF_GPIO_PIN_NOSENSE); + } + else if (pin_in_use_by_te(pin)) + { + int32_t channel = (int32_t)channel_port_get(pin); + nrf_gpiote_event_disable((uint32_t)channel); + nrf_gpiote_int_disable(1 << channel); + } +} + + +void nrfx_gpiote_in_uninit(nrfx_gpiote_pin_t pin) +{ + NRFX_ASSERT(pin < NUMBER_OF_PINS); + NRFX_ASSERT(pin_in_use_by_gpiote(pin)); + nrfx_gpiote_in_event_disable(pin); + if (pin_in_use_by_te(pin)) + { + nrf_gpiote_te_default((uint32_t)channel_port_get(pin)); + } + if (pin_configured_check(pin)) + { + nrf_gpio_cfg_default(pin); + pin_configured_clear(pin); + } + channel_free((uint8_t)channel_port_get(pin)); + pin_in_use_clear(pin); +} + + +bool nrfx_gpiote_in_is_set(nrfx_gpiote_pin_t pin) +{ + NRFX_ASSERT(pin < NUMBER_OF_PINS); + return nrf_gpio_pin_read(pin) ? true : false; +} + + +uint32_t nrfx_gpiote_in_event_addr_get(nrfx_gpiote_pin_t pin) +{ + NRFX_ASSERT(pin < NUMBER_OF_PINS); + NRFX_ASSERT(pin_in_use_by_port(pin) || pin_in_use_by_te(pin)); + + nrf_gpiote_events_t event = NRF_GPIOTE_EVENTS_PORT; + + if (pin_in_use_by_te(pin)) + { + event = TE_IDX_TO_EVENT_ADDR((uint32_t)channel_port_get(pin)); + } + return nrf_gpiote_event_addr_get(event); +} + + +void nrfx_gpiote_irq_handler(void) +{ + uint32_t status = 0; + uint32_t input[GPIO_COUNT] = {0}; + + /* collect status of all GPIOTE pin events. Processing is done once all are collected and cleared.*/ + uint32_t i; + nrf_gpiote_events_t event = NRF_GPIOTE_EVENTS_IN_0; + uint32_t mask = (uint32_t)NRF_GPIOTE_INT_IN0_MASK; + + for (i = 0; i < GPIOTE_CH_NUM; i++) + { + if (nrf_gpiote_event_is_set(event) && nrf_gpiote_int_is_enabled(mask)) + { + nrf_gpiote_event_clear(event); + status |= mask; + } + mask <<= 1; + /* Incrementing to next event, utilizing the fact that events are grouped together + * in ascending order. */ + event = (nrf_gpiote_events_t)((uint32_t)event + sizeof(uint32_t)); + } + + /* collect PORT status event, if event is set read pins state. Processing is postponed to the + * end of interrupt. */ + if (nrf_gpiote_event_is_set(NRF_GPIOTE_EVENTS_PORT)) + { + nrf_gpiote_event_clear(NRF_GPIOTE_EVENTS_PORT); + status |= (uint32_t)NRF_GPIOTE_INT_PORT_MASK; + nrf_gpio_ports_read(0, GPIO_COUNT, input); + } + + /* Process pin events. */ + if (status & NRF_GPIOTE_INT_IN_MASK) + { + mask = (uint32_t)NRF_GPIOTE_INT_IN0_MASK; + + for (i = 0; i < GPIOTE_CH_NUM; i++) + { + if (mask & status) + { + nrfx_gpiote_pin_t pin = nrf_gpiote_event_pin_get(i); + NRFX_LOG_DEBUG("Event in number: %d.", i); + nrf_gpiote_polarity_t polarity = nrf_gpiote_event_polarity_get(i); + nrfx_gpiote_evt_handler_t handler = channel_handler_get(i); + NRFX_LOG_DEBUG("Pin: %d, polarity: %d.", pin, polarity); + if (handler) + { + handler(pin, polarity); + } + } + mask <<= 1; + } + } + + if (status & (uint32_t)NRF_GPIOTE_INT_PORT_MASK) + { + /* Process port event. */ + uint32_t port_idx; + uint8_t repeat = 0; + uint32_t toggle_mask[GPIO_COUNT] = {0}; + uint32_t pins_to_check[GPIO_COUNT]; + + // Faster way of doing memset because in interrupt context. + for (port_idx = 0; port_idx < GPIO_COUNT; port_idx++) + { + pins_to_check[port_idx] = 0xFFFFFFFF; + } + + do + { + repeat = 0; + + for (i = 0; i < NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS; i++) + { + uint8_t pin_and_sense = (uint8_t)m_cb.port_handlers_pins[i]; + nrfx_gpiote_pin_t pin = (pin_and_sense & ~SENSE_FIELD_MASK); + + if ((m_cb.port_handlers_pins[i] != PIN_NOT_USED) + && nrf_bitmask_bit_is_set(pin, pins_to_check)) + { + nrf_gpiote_polarity_t polarity = + (nrf_gpiote_polarity_t)((pin_and_sense & + SENSE_FIELD_MASK) >> SENSE_FIELD_POS); + nrfx_gpiote_evt_handler_t handler = + channel_handler_get((uint32_t)channel_port_get(pin)); + if (handler || (polarity == NRF_GPIOTE_POLARITY_TOGGLE)) + { + if (polarity == NRF_GPIOTE_POLARITY_TOGGLE) + { + nrf_bitmask_bit_set(pin, toggle_mask); + } + nrf_gpio_pin_sense_t sense = nrf_gpio_pin_sense_get(pin); + uint32_t pin_state = nrf_bitmask_bit_is_set(pin, input); + if ((pin_state && (sense == NRF_GPIO_PIN_SENSE_HIGH)) || + (!pin_state && (sense == NRF_GPIO_PIN_SENSE_LOW)) ) + { + NRFX_LOG_DEBUG("PORT event for pin: %d, polarity: %d.", pin, polarity); + if (polarity == NRF_GPIOTE_POLARITY_TOGGLE) + { + nrf_gpio_pin_sense_t next_sense = + (sense == NRF_GPIO_PIN_SENSE_HIGH) ? + NRF_GPIO_PIN_SENSE_LOW : + NRF_GPIO_PIN_SENSE_HIGH; + nrf_gpio_cfg_sense_set(pin, next_sense); + ++repeat; + + } + if (handler) + { + handler(pin, polarity); + } + } + } + } + } + + if (repeat) + { + // When one of the pins in low-accuracy and toggle mode becomes active, + // it's sense mode is inverted to clear the internal SENSE signal. + // State of any other enabled low-accuracy input in toggle mode must be checked + // explicitly, because it does not trigger the interrput when SENSE signal is active. + // For more information about SENSE functionality, refer to Product Specification. + + uint32_t new_input[GPIO_COUNT]; + bool input_unchanged = true; + nrf_gpio_ports_read(0, GPIO_COUNT, new_input); + + // Faster way of doing memcmp because in interrupt context. + for (port_idx = 0; port_idx < GPIO_COUNT; port_idx++) + { + if (new_input[port_idx] != input[port_idx]) + { + input_unchanged = false; + break; + } + } + + if (input_unchanged) + { + // No change. + repeat = 0; + } + else + { + // Faster way of doing memcpy because in interrupt context. + for (port_idx = 0; port_idx < GPIO_COUNT; port_idx++) + { + input[port_idx] = new_input[port_idx]; + pins_to_check[port_idx] = toggle_mask[port_idx]; + } + } + } + } + while (repeat); + } +} + + +/*lint -restore*/ +#endif // NRFX_CHECK(NRFX_GPIOTE_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_i2s.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_i2s.c new file mode 100644 index 00000000000..35beaab6769 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_i2s.c @@ -0,0 +1,420 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_I2S_ENABLED) + +#include +#include + +#define NRFX_LOG_MODULE I2S +#include + +#define EVT_TO_STR(event) \ + (event == NRF_I2S_EVENT_RXPTRUPD ? "NRF_I2S_EVENT_RXPTRUPD" : \ + (event == NRF_I2S_EVENT_TXPTRUPD ? "NRF_I2S_EVENT_TXPTRUPD" : \ + (event == NRF_I2S_EVENT_STOPPED ? "NRF_I2S_EVENT_STOPPED" : \ + "UNKNOWN EVENT"))) + +// Control block - driver instance local data. +typedef struct +{ + nrfx_i2s_data_handler_t handler; + nrfx_drv_state_t state; + + bool use_rx : 1; + bool use_tx : 1; + bool rx_ready : 1; + bool tx_ready : 1; + bool buffers_needed : 1; + bool buffers_reused : 1; + + uint16_t buffer_size; + nrfx_i2s_buffers_t next_buffers; + nrfx_i2s_buffers_t current_buffers; +} i2s_control_block_t; +static i2s_control_block_t m_cb; + + +static void configure_pins(nrfx_i2s_config_t const * p_config) +{ + uint32_t mck_pin, sdout_pin, sdin_pin; + + // Configure pins used by the peripheral: + + // - SCK and LRCK (required) - depending on the mode of operation these + // pins are configured as outputs (in Master mode) or inputs (in Slave + // mode). + if (p_config->mode == NRF_I2S_MODE_MASTER) + { + nrf_gpio_cfg_output(p_config->sck_pin); + nrf_gpio_cfg_output(p_config->lrck_pin); + } + else + { + nrf_gpio_cfg_input(p_config->sck_pin, NRF_GPIO_PIN_NOPULL); + nrf_gpio_cfg_input(p_config->lrck_pin, NRF_GPIO_PIN_NOPULL); + } + + // - MCK (optional) - always output, + if (p_config->mck_pin != NRFX_I2S_PIN_NOT_USED) + { + mck_pin = p_config->mck_pin; + nrf_gpio_cfg_output(mck_pin); + } + else + { + mck_pin = NRF_I2S_PIN_NOT_CONNECTED; + } + + // - SDOUT (optional) - always output, + if (p_config->sdout_pin != NRFX_I2S_PIN_NOT_USED) + { + sdout_pin = p_config->sdout_pin; + nrf_gpio_cfg_output(sdout_pin); + } + else + { + sdout_pin = NRF_I2S_PIN_NOT_CONNECTED; + } + + // - SDIN (optional) - always input. + if (p_config->sdin_pin != NRFX_I2S_PIN_NOT_USED) + { + sdin_pin = p_config->sdin_pin; + nrf_gpio_cfg_input(sdin_pin, NRF_GPIO_PIN_NOPULL); + } + else + { + sdin_pin = NRF_I2S_PIN_NOT_CONNECTED; + } + + nrf_i2s_pins_set(NRF_I2S, + p_config->sck_pin, + p_config->lrck_pin, + mck_pin, + sdout_pin, + sdin_pin); +} + + +nrfx_err_t nrfx_i2s_init(nrfx_i2s_config_t const * p_config, + nrfx_i2s_data_handler_t handler) +{ + NRFX_ASSERT(p_config); + NRFX_ASSERT(handler); + + nrfx_err_t err_code; + + if (m_cb.state != NRFX_DRV_STATE_UNINITIALIZED) + { + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + if (!nrf_i2s_configure(NRF_I2S, + p_config->mode, + p_config->format, + p_config->alignment, + p_config->sample_width, + p_config->channels, + p_config->mck_setup, + p_config->ratio)) + { + err_code = NRFX_ERROR_INVALID_PARAM; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + configure_pins(p_config); + + m_cb.handler = handler; + + NRFX_IRQ_PRIORITY_SET(I2S_IRQn, p_config->irq_priority); + NRFX_IRQ_ENABLE(I2S_IRQn); + + m_cb.state = NRFX_DRV_STATE_INITIALIZED; + + NRFX_LOG_INFO("Initialized."); + return NRFX_SUCCESS; +} + + +void nrfx_i2s_uninit(void) +{ + NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); + + nrfx_i2s_stop(); + + NRFX_IRQ_DISABLE(I2S_IRQn); + + nrf_i2s_pins_set(NRF_I2S, + NRF_I2S_PIN_NOT_CONNECTED, + NRF_I2S_PIN_NOT_CONNECTED, + NRF_I2S_PIN_NOT_CONNECTED, + NRF_I2S_PIN_NOT_CONNECTED, + NRF_I2S_PIN_NOT_CONNECTED); + + m_cb.state = NRFX_DRV_STATE_UNINITIALIZED; + NRFX_LOG_INFO("Uninitialized."); +} + + +nrfx_err_t nrfx_i2s_start(nrfx_i2s_buffers_t const * p_initial_buffers, + uint16_t buffer_size, + uint8_t flags) +{ + NRFX_ASSERT(p_initial_buffers != NULL); + NRFX_ASSERT(p_initial_buffers->p_rx_buffer != NULL || + p_initial_buffers->p_tx_buffer != NULL); + NRFX_ASSERT(buffer_size != 0); + (void)(flags); + + nrfx_err_t err_code; + + if (m_cb.state != NRFX_DRV_STATE_INITIALIZED) + { + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + if (((p_initial_buffers->p_rx_buffer != NULL) + && !nrfx_is_in_ram(p_initial_buffers->p_rx_buffer)) + || + ((p_initial_buffers->p_tx_buffer != NULL) + && !nrfx_is_in_ram(p_initial_buffers->p_tx_buffer))) + { + err_code = NRFX_ERROR_INVALID_ADDR; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + m_cb.use_rx = (p_initial_buffers->p_rx_buffer != NULL); + m_cb.use_tx = (p_initial_buffers->p_tx_buffer != NULL); + m_cb.rx_ready = false; + m_cb.tx_ready = false; + m_cb.buffers_needed = false; + m_cb.buffer_size = buffer_size; + + // Set the provided initial buffers as next, they will become the current + // ones after the IRQ handler is called for the first time, what will occur + // right after the START task is triggered. + m_cb.next_buffers = *p_initial_buffers; + m_cb.current_buffers.p_rx_buffer = NULL; + m_cb.current_buffers.p_tx_buffer = NULL; + + nrf_i2s_transfer_set(NRF_I2S, + m_cb.buffer_size, + m_cb.next_buffers.p_rx_buffer, + m_cb.next_buffers.p_tx_buffer); + + nrf_i2s_enable(NRF_I2S); + + m_cb.state = NRFX_DRV_STATE_POWERED_ON; + + nrf_i2s_event_clear(NRF_I2S, NRF_I2S_EVENT_RXPTRUPD); + nrf_i2s_event_clear(NRF_I2S, NRF_I2S_EVENT_TXPTRUPD); + nrf_i2s_event_clear(NRF_I2S, NRF_I2S_EVENT_STOPPED); + nrf_i2s_int_enable(NRF_I2S, (m_cb.use_rx ? NRF_I2S_INT_RXPTRUPD_MASK : 0) | + (m_cb.use_tx ? NRF_I2S_INT_TXPTRUPD_MASK : 0) | + NRF_I2S_INT_STOPPED_MASK); + nrf_i2s_task_trigger(NRF_I2S, NRF_I2S_TASK_START); + + NRFX_LOG_INFO("Started."); + return NRFX_SUCCESS; +} + + +nrfx_err_t nrfx_i2s_next_buffers_set(nrfx_i2s_buffers_t const * p_buffers) +{ + NRFX_ASSERT(m_cb.state == NRFX_DRV_STATE_POWERED_ON); + NRFX_ASSERT(p_buffers); + + nrfx_err_t err_code; + + if (!m_cb.buffers_needed) + { + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + if (((p_buffers->p_rx_buffer != NULL) + && !nrfx_is_in_ram(p_buffers->p_rx_buffer)) + || + ((p_buffers->p_tx_buffer != NULL) + && !nrfx_is_in_ram(p_buffers->p_tx_buffer))) + { + err_code = NRFX_ERROR_INVALID_ADDR; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + if (m_cb.use_tx) + { + NRFX_ASSERT(p_buffers->p_tx_buffer != NULL); + nrf_i2s_tx_buffer_set(NRF_I2S, p_buffers->p_tx_buffer); + } + if (m_cb.use_rx) + { + NRFX_ASSERT(p_buffers->p_rx_buffer != NULL); + nrf_i2s_rx_buffer_set(NRF_I2S, p_buffers->p_rx_buffer); + } + + m_cb.next_buffers = *p_buffers; + m_cb.buffers_needed = false; + + return NRFX_SUCCESS; +} + + +void nrfx_i2s_stop(void) +{ + NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); + + m_cb.buffers_needed = false; + + // First disable interrupts, then trigger the STOP task, so no spurious + // RXPTRUPD and TXPTRUPD events (see nRF52 anomaly 55) are processed. + nrf_i2s_int_disable(NRF_I2S, NRF_I2S_INT_RXPTRUPD_MASK | + NRF_I2S_INT_TXPTRUPD_MASK); + nrf_i2s_task_trigger(NRF_I2S, NRF_I2S_TASK_STOP); +} + + +void nrfx_i2s_irq_handler(void) +{ + if (nrf_i2s_event_check(NRF_I2S, NRF_I2S_EVENT_TXPTRUPD)) + { + nrf_i2s_event_clear(NRF_I2S, NRF_I2S_EVENT_TXPTRUPD); + m_cb.tx_ready = true; + if (m_cb.use_tx && m_cb.buffers_needed) + { + m_cb.buffers_reused = true; + } + } + if (nrf_i2s_event_check(NRF_I2S, NRF_I2S_EVENT_RXPTRUPD)) + { + nrf_i2s_event_clear(NRF_I2S, NRF_I2S_EVENT_RXPTRUPD); + m_cb.rx_ready = true; + if (m_cb.use_rx && m_cb.buffers_needed) + { + m_cb.buffers_reused = true; + } + } + + if (nrf_i2s_event_check(NRF_I2S, NRF_I2S_EVENT_STOPPED)) + { + nrf_i2s_event_clear(NRF_I2S, NRF_I2S_EVENT_STOPPED); + nrf_i2s_int_disable(NRF_I2S, NRF_I2S_INT_STOPPED_MASK); + nrf_i2s_disable(NRF_I2S); + + // When stopped, release all buffers, including these scheduled for + // the next transfer. + m_cb.handler(&m_cb.current_buffers, 0); + m_cb.handler(&m_cb.next_buffers, 0); + + m_cb.state = NRFX_DRV_STATE_INITIALIZED; + NRFX_LOG_INFO("Stopped."); + } + else + { + // Check if the requested transfer has been completed: + // - full-duplex mode + if ((m_cb.use_tx && m_cb.use_rx && m_cb.tx_ready && m_cb.rx_ready) || + // - TX only mode + (!m_cb.use_rx && m_cb.tx_ready) || + // - RX only mode + (!m_cb.use_tx && m_cb.rx_ready)) + { + m_cb.tx_ready = false; + m_cb.rx_ready = false; + + // If the application did not supply the buffers for the next + // part of the transfer until this moment, the current buffers + // cannot be released, since the I2S peripheral already started + // using them. Signal this situation to the application by + // passing NULL instead of the structure with released buffers. + if (m_cb.buffers_reused) + { + m_cb.buffers_reused = false; + // This will most likely be set at this point. However, there is + // a small time window between TXPTRUPD and RXPTRUPD events, + // and it is theoretically possible that next buffers will be + // set in this window, so to be sure this flag is set to true, + // set it explicitly. + m_cb.buffers_needed = true; + m_cb.handler(NULL, + NRFX_I2S_STATUS_NEXT_BUFFERS_NEEDED); + } + else + { + // Buffers that have been used by the I2S peripheral (current) + // are now released and will be returned to the application, + // and the ones scheduled to be used as next become the current + // ones. + nrfx_i2s_buffers_t released_buffers = m_cb.current_buffers; + m_cb.current_buffers = m_cb.next_buffers; + m_cb.next_buffers.p_rx_buffer = NULL; + m_cb.next_buffers.p_tx_buffer = NULL; + m_cb.buffers_needed = true; + m_cb.handler(&released_buffers, + NRFX_I2S_STATUS_NEXT_BUFFERS_NEEDED); + } + + } + } +} + +#endif // NRFX_CHECK(NRFX_I2S_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_lpcomp.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_lpcomp.c new file mode 100644 index 00000000000..024eda6614f --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_lpcomp.c @@ -0,0 +1,174 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_LPCOMP_ENABLED) + +#include +#include "prs/nrfx_prs.h" + +#define NRFX_LOG_MODULE LPCOMP +#include + +#define EVT_TO_STR(event) \ + (event == NRF_LPCOMP_EVENT_READY ? "NRF_LPCOMP_EVENT_READY" : \ + (event == NRF_LPCOMP_EVENT_DOWN ? "NRF_LPCOMP_EVENT_DOWN" : \ + (event == NRF_LPCOMP_EVENT_UP ? "NRF_LPCOMP_EVENT_UP" : \ + (event == NRF_LPCOMP_EVENT_CROSS ? "NRF_LPCOMP_EVENT_CROSS" : \ + "UNKNOWN EVENT")))) + + +static nrfx_lpcomp_event_handler_t m_lpcomp_event_handler = NULL; +static nrfx_drv_state_t m_state = NRFX_DRV_STATE_UNINITIALIZED; + +static void lpcomp_execute_handler(nrf_lpcomp_event_t event, uint32_t event_mask) +{ + if (nrf_lpcomp_event_check(event) && nrf_lpcomp_int_enable_check(event_mask)) + { + nrf_lpcomp_event_clear(event); + NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(event)); + + m_lpcomp_event_handler(event); + } +} + +void nrfx_lpcomp_irq_handler(void) +{ + lpcomp_execute_handler(NRF_LPCOMP_EVENT_READY, LPCOMP_INTENSET_READY_Msk); + lpcomp_execute_handler(NRF_LPCOMP_EVENT_DOWN, LPCOMP_INTENSET_DOWN_Msk); + lpcomp_execute_handler(NRF_LPCOMP_EVENT_UP, LPCOMP_INTENSET_UP_Msk); + lpcomp_execute_handler(NRF_LPCOMP_EVENT_CROSS, LPCOMP_INTENSET_CROSS_Msk); +} + +nrfx_err_t nrfx_lpcomp_init(nrfx_lpcomp_config_t const * p_config, + nrfx_lpcomp_event_handler_t event_handler) +{ + NRFX_ASSERT(p_config); + NRFX_ASSERT(event_handler); + nrfx_err_t err_code; + + if (m_state != NRFX_DRV_STATE_UNINITIALIZED) + { // LPCOMP driver is already initialized + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + m_lpcomp_event_handler = event_handler; + +#if NRFX_CHECK(NRFX_PRS_ENABLED) + if (nrfx_prs_acquire(NRF_LPCOMP, nrfx_lpcomp_irq_handler) != NRFX_SUCCESS) + { + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } +#endif + + nrf_lpcomp_configure(&(p_config->hal)); + + nrf_lpcomp_input_select(p_config->input); + + switch (p_config->hal.detection) + { + case NRF_LPCOMP_DETECT_UP: + nrf_lpcomp_int_enable(LPCOMP_INTENSET_UP_Msk); + break; + + case NRF_LPCOMP_DETECT_DOWN: + nrf_lpcomp_int_enable(LPCOMP_INTENSET_DOWN_Msk); + break; + + case NRF_LPCOMP_DETECT_CROSS: + nrf_lpcomp_int_enable(LPCOMP_INTENSET_CROSS_Msk); + break; + + default: + break; + } + nrf_lpcomp_shorts_enable(NRF_LPCOMP_SHORT_READY_SAMPLE_MASK); + + NRFX_IRQ_PRIORITY_SET(LPCOMP_IRQn, p_config->interrupt_priority); + NRFX_IRQ_ENABLE(LPCOMP_IRQn); + + m_state = NRFX_DRV_STATE_INITIALIZED; + + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +void nrfx_lpcomp_uninit(void) +{ + NRFX_ASSERT(m_state != NRFX_DRV_STATE_UNINITIALIZED); + NRFX_IRQ_DISABLE(LPCOMP_IRQn); + nrfx_lpcomp_disable(); +#if NRFX_CHECK(NRFX_PRS_ENABLED) + nrfx_prs_release(NRF_LPCOMP); +#endif + m_state = NRFX_DRV_STATE_UNINITIALIZED; + m_lpcomp_event_handler = NULL; + NRFX_LOG_INFO("Uninitialized."); +} + +void nrfx_lpcomp_enable(void) +{ + NRFX_ASSERT(m_state == NRFX_DRV_STATE_INITIALIZED); + nrf_lpcomp_enable(); + nrf_lpcomp_task_trigger(NRF_LPCOMP_TASK_START); + m_state = NRFX_DRV_STATE_POWERED_ON; + NRFX_LOG_INFO("Enabled."); +} + +void nrfx_lpcomp_disable(void) +{ + NRFX_ASSERT(m_state == NRFX_DRV_STATE_POWERED_ON); + nrf_lpcomp_disable(); + nrf_lpcomp_task_trigger(NRF_LPCOMP_TASK_STOP); + m_state = NRFX_DRV_STATE_INITIALIZED; + NRFX_LOG_INFO("Disabled."); +} + +#endif // NRFX_CHECK(NRFX_LPCOMP_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_pdm.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_pdm.c new file mode 100644 index 00000000000..db0945e7ca5 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_pdm.c @@ -0,0 +1,370 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_PDM_ENABLED) + +#include +#include + +#define NRFX_LOG_MODULE PDM +#include + +#define EVT_TO_STR(event) \ + (event == NRF_PDM_EVENT_STARTED ? "NRF_PDM_EVENT_STARTED" : \ + (event == NRF_PDM_EVENT_STOPPED ? "NRF_PDM_EVENT_STOPPED" : \ + (event == NRF_PDM_EVENT_END ? "NRF_PDM_EVENT_END" : \ + "UNKNOWN EVENT"))) + + +/** @brief PDM interface status. */ +typedef enum +{ + NRFX_PDM_STATE_IDLE, + NRFX_PDM_STATE_RUNNING, + NRFX_PDM_STATE_STARTING, + NRFX_PDM_STATE_STOPPING +} nrfx_pdm_state_t; + +/** @brief PDM interface control block.*/ +typedef struct +{ + nrfx_pdm_event_handler_t event_handler; ///< Event handler function pointer. + int16_t * buff_address[2]; ///< Sample buffers. + uint16_t buff_length[2]; ///< Length of the sample buffers. + nrfx_drv_state_t drv_state; ///< Driver state. + volatile nrfx_pdm_state_t op_state; ///< PDM peripheral operation state. + uint8_t active_buffer; ///< Number of currently active buffer. + uint8_t error; ///< Driver error flag. + volatile uint8_t irq_buff_request; ///< Request the next buffer in the ISR. +} nrfx_pdm_cb_t; + +static nrfx_pdm_cb_t m_cb; + + +void nrfx_pdm_irq_handler(void) +{ + if (nrf_pdm_event_check(NRF_PDM_EVENT_STARTED)) + { + nrf_pdm_event_clear(NRF_PDM_EVENT_STARTED); + NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_PDM_EVENT_STARTED)); + + uint8_t finished_buffer = m_cb.active_buffer; + + // Check if the next buffer was set before. + uint8_t next_buffer = (~m_cb.active_buffer) & 0x01; + if (m_cb.buff_address[next_buffer] || + m_cb.op_state == NRFX_PDM_STATE_STARTING) + { + nrfx_pdm_evt_t evt; + evt.error = NRFX_PDM_NO_ERROR; + m_cb.error = 0; + + // Release the full buffer if ready and request the next one. + if (m_cb.op_state == NRFX_PDM_STATE_STARTING) + { + evt.buffer_released = 0; + m_cb.op_state = NRFX_PDM_STATE_RUNNING; + } + else + { + evt.buffer_released = m_cb.buff_address[finished_buffer]; + m_cb.buff_address[finished_buffer] = 0; + m_cb.active_buffer = next_buffer; + } + evt.buffer_requested = true; + m_cb.event_handler(&evt); + } + else + { + // No next buffer available. Report an error. + // Do not request the new buffer as it was already done. + if (m_cb.error == 0) + { + nrfx_pdm_evt_t const evt = { + .buffer_requested = false, + .buffer_released = NULL, + .error = NRFX_PDM_ERROR_OVERFLOW + }; + m_cb.error = 1; + m_cb.event_handler(&evt); + } + } + + if (m_cb.op_state == NRFX_PDM_STATE_STARTING) + { + m_cb.op_state = NRFX_PDM_STATE_RUNNING; + } + } + else if (nrf_pdm_event_check(NRF_PDM_EVENT_STOPPED)) + { + nrf_pdm_event_clear(NRF_PDM_EVENT_STOPPED); + NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_PDM_EVENT_STOPPED)); + nrf_pdm_disable(); + m_cb.op_state = NRFX_PDM_STATE_IDLE; + + // Release the buffers. + nrfx_pdm_evt_t evt; + evt.error = NRFX_PDM_NO_ERROR; + evt.buffer_requested = false; + if (m_cb.buff_address[m_cb.active_buffer]) + { + evt.buffer_released = m_cb.buff_address[m_cb.active_buffer]; + m_cb.buff_address[m_cb.active_buffer] = 0; + m_cb.event_handler(&evt); + } + + uint8_t second_buffer = (~m_cb.active_buffer) & 0x01; + if (m_cb.buff_address[second_buffer]) + { + evt.buffer_released = m_cb.buff_address[second_buffer]; + m_cb.buff_address[second_buffer] = 0; + m_cb.event_handler(&evt); + } + m_cb.active_buffer = 0; + } + + if (m_cb.irq_buff_request) + { + nrfx_pdm_evt_t const evt = + { + .buffer_requested = true, + .buffer_released = NULL, + .error = NRFX_PDM_NO_ERROR, + }; + m_cb.irq_buff_request = 0; + m_cb.event_handler(&evt); + } +} + + +nrfx_err_t nrfx_pdm_init(nrfx_pdm_config_t const * p_config, + nrfx_pdm_event_handler_t event_handler) +{ + NRFX_ASSERT(p_config); + NRFX_ASSERT(event_handler); + nrfx_err_t err_code; + + if (m_cb.drv_state != NRFX_DRV_STATE_UNINITIALIZED) + { + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + if (p_config->gain_l > NRF_PDM_GAIN_MAXIMUM || + p_config->gain_r > NRF_PDM_GAIN_MAXIMUM) + { + err_code = NRFX_ERROR_INVALID_PARAM; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + m_cb.buff_address[0] = 0; + m_cb.buff_address[1] = 0; + m_cb.active_buffer = 0; + m_cb.error = 0; + m_cb.event_handler = event_handler; + m_cb.op_state = NRFX_PDM_STATE_IDLE; + + nrf_pdm_clock_set(p_config->clock_freq); + nrf_pdm_mode_set(p_config->mode, p_config->edge); + nrf_pdm_gain_set(p_config->gain_l, p_config->gain_r); + + nrf_gpio_cfg_output(p_config->pin_clk); + nrf_gpio_pin_clear(p_config->pin_clk); + nrf_gpio_cfg_input(p_config->pin_din, NRF_GPIO_PIN_NOPULL); + nrf_pdm_psel_connect(p_config->pin_clk, p_config->pin_din); + + nrf_pdm_event_clear(NRF_PDM_EVENT_STARTED); + nrf_pdm_event_clear(NRF_PDM_EVENT_END); + nrf_pdm_event_clear(NRF_PDM_EVENT_STOPPED); + nrf_pdm_int_enable(NRF_PDM_INT_STARTED | NRF_PDM_INT_STOPPED); + NRFX_IRQ_PRIORITY_SET(PDM_IRQn, p_config->interrupt_priority); + NRFX_IRQ_ENABLE(PDM_IRQn); + m_cb.drv_state = NRFX_DRV_STATE_INITIALIZED; + + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +void nrfx_pdm_uninit(void) +{ + nrf_pdm_disable(); + nrf_pdm_psel_disconnect(); + m_cb.drv_state = NRFX_DRV_STATE_UNINITIALIZED; + NRFX_LOG_INFO("Uninitialized."); +} + +static void pdm_start() +{ + m_cb.drv_state = NRFX_DRV_STATE_POWERED_ON; + nrf_pdm_enable(); + nrf_pdm_event_clear(NRF_PDM_EVENT_STARTED); + nrf_pdm_task_trigger(NRF_PDM_TASK_START); +} + +static void pdm_buf_request() +{ + m_cb.irq_buff_request = 1; + NRFX_IRQ_PENDING_SET(PDM_IRQn); +} + +nrfx_err_t nrfx_pdm_start(void) +{ + NRFX_ASSERT(m_cb.drv_state != NRFX_DRV_STATE_UNINITIALIZED); + nrfx_err_t err_code; + + if (m_cb.op_state != NRFX_PDM_STATE_IDLE) + { + if (m_cb.op_state == NRFX_PDM_STATE_RUNNING) + { + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + m_cb.op_state = NRFX_PDM_STATE_STARTING; + pdm_buf_request(); + + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +nrfx_err_t nrfx_pdm_buffer_set(int16_t * buffer, uint16_t buffer_length) +{ + if (m_cb.drv_state == NRFX_DRV_STATE_UNINITIALIZED) + { + return NRFX_ERROR_INVALID_STATE; + } + if (m_cb.op_state == NRFX_PDM_STATE_STOPPING) + { + return NRFX_ERROR_BUSY; + } + if ((buffer == NULL) || (buffer_length > NRFX_PDM_MAX_BUFFER_SIZE)) + { + return NRFX_ERROR_INVALID_PARAM; + } + + nrfx_err_t err_code = NRFX_SUCCESS; + + // Enter the PDM critical section. + NRFX_IRQ_DISABLE(PDM_IRQn); + + uint8_t next_buffer = (~m_cb.active_buffer) & 0x01; + if (m_cb.op_state == NRFX_PDM_STATE_STARTING) + { + next_buffer = 0; + } + + if (m_cb.buff_address[next_buffer]) + { + // Buffer already set. + err_code = NRFX_ERROR_BUSY; + } + else + { + m_cb.buff_address[next_buffer] = buffer; + m_cb.buff_length[next_buffer] = buffer_length; + nrf_pdm_buffer_set((uint32_t *)buffer, buffer_length); + + if (m_cb.drv_state != NRFX_DRV_STATE_POWERED_ON) + { + pdm_start(); + } + } + + NRFX_IRQ_ENABLE(PDM_IRQn); + return err_code; +} + +nrfx_err_t nrfx_pdm_stop(void) +{ + NRFX_ASSERT(m_cb.drv_state != NRFX_DRV_STATE_UNINITIALIZED); + nrfx_err_t err_code; + + if (m_cb.op_state != NRFX_PDM_STATE_RUNNING) + { + if (m_cb.op_state == NRFX_PDM_STATE_IDLE || + m_cb.op_state == NRFX_PDM_STATE_STARTING) + { + nrf_pdm_disable(); + m_cb.op_state = NRFX_PDM_STATE_IDLE; + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + m_cb.drv_state = NRFX_DRV_STATE_INITIALIZED; + m_cb.op_state = NRFX_PDM_STATE_STOPPING; + + nrf_pdm_task_trigger(NRF_PDM_TASK_STOP); + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +#endif // NRFX_CHECK(NRFX_PDM_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_power.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_power.c new file mode 100644 index 00000000000..d861951c512 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_power.c @@ -0,0 +1,306 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_POWER_ENABLED) + +#include + +#if NRFX_CHECK(NRFX_CLOCK_ENABLED) +extern bool nrfx_clock_irq_enabled; +#endif + +/** + * @internal + * @defgroup nrfx_power_internals POWER driver internals + * @ingroup nrfx_power + * + * Internal variables, auxiliary macros and functions of POWER driver. + * @{ + */ + +/** + * This variable is used to check whether common POWER_CLOCK common interrupt + * should be disabled or not if @ref nrfx_clock tries to disable the interrupt. + */ + +bool nrfx_power_irq_enabled; + +/** + * @brief The initialization flag + */ + +#define m_initialized nrfx_power_irq_enabled + +/** + * @brief The handler of power fail comparator warning event + */ +static nrfx_power_pofwarn_event_handler_t m_pofwarn_handler; + +#if NRF_POWER_HAS_SLEEPEVT || defined(__NRFX_DOXYGEN__) +/** + * @brief The handler of sleep event handler + */ +static nrfx_power_sleep_event_handler_t m_sleepevt_handler; +#endif + +#if NRF_POWER_HAS_USBREG || defined(__NRFX_DOXYGEN__) +/** + * @brief The handler of USB power events + */ +static nrfx_power_usb_event_handler_t m_usbevt_handler; +#endif + +/** @} */ + +nrfx_power_pofwarn_event_handler_t nrfx_power_pof_handler_get(void) +{ + return m_pofwarn_handler; +} + +#if NRF_POWER_HAS_USBREG +nrfx_power_usb_event_handler_t nrfx_power_usb_handler_get(void) +{ + return m_usbevt_handler; +} +#endif + +nrfx_err_t nrfx_power_init(nrfx_power_config_t const * p_config) +{ + NRFX_ASSERT(p_config); + if (m_initialized) + { + return NRFX_ERROR_ALREADY_INITIALIZED; + } + +#if NRF_POWER_HAS_VDDH + nrf_power_dcdcen_vddh_set(p_config->dcdcenhv); +#endif + nrf_power_dcdcen_set(p_config->dcdcen); + + nrfx_power_clock_irq_init(); + + m_initialized = true; + return NRFX_SUCCESS; +} + + +void nrfx_power_uninit(void) +{ + NRFX_ASSERT(m_initialized); + +#if NRFX_CHECK(NRFX_CLOCK_ENABLED) + if (!nrfx_clock_irq_enabled) +#endif + { + NRFX_IRQ_DISABLE(POWER_CLOCK_IRQn); + } + + nrfx_power_pof_uninit(); +#if NRF_POWER_HAS_SLEEPEVT || defined(__NRFX_DOXYGEN__) + nrfx_power_sleepevt_uninit(); +#endif +#if NRF_POWER_HAS_USBREG || defined(__NRFX_DOXYGEN__) + nrfx_power_usbevt_uninit(); +#endif + m_initialized = false; +} + +void nrfx_power_pof_init(nrfx_power_pofwarn_config_t const * p_config) +{ + NRFX_ASSERT(p_config != NULL); + + nrfx_power_pof_uninit(); + + if (p_config->handler != NULL) + { + m_pofwarn_handler = p_config->handler; + } +} + +void nrfx_power_pof_enable(nrfx_power_pofwarn_config_t const * p_config) +{ + nrf_power_pofcon_set(true, p_config->thr); +#if NRF_POWER_HAS_VDDH || defined(__NRFX_DOXYGEN__) + nrf_power_pofcon_vddh_set(p_config->thrvddh); +#endif + if (m_pofwarn_handler != NULL) + { + nrf_power_int_enable(NRF_POWER_INT_POFWARN_MASK); + } +} + +void nrfx_power_pof_disable(void) +{ + nrf_power_int_disable(NRF_POWER_INT_POFWARN_MASK); +} + +void nrfx_power_pof_uninit(void) +{ + m_pofwarn_handler = NULL; +} + +#if NRF_POWER_HAS_SLEEPEVT || defined(__NRFX_DOXYGEN__) +void nrfx_power_sleepevt_init(nrfx_power_sleepevt_config_t const * p_config) +{ + NRFX_ASSERT(p_config != NULL); + + nrfx_power_sleepevt_uninit(); + if (p_config->handler != NULL) + { + m_sleepevt_handler = p_config->handler; + } +} + +void nrfx_power_sleepevt_enable(nrfx_power_sleepevt_config_t const * p_config) +{ + uint32_t enmask = 0; + if (p_config->en_enter) + { + enmask |= NRF_POWER_INT_SLEEPENTER_MASK; + nrf_power_event_clear(NRF_POWER_EVENT_SLEEPENTER); + } + if (p_config->en_exit) + { + enmask |= NRF_POWER_INT_SLEEPEXIT_MASK; + nrf_power_event_clear(NRF_POWER_EVENT_SLEEPEXIT); + } + nrf_power_int_enable(enmask); +} + +void nrfx_power_sleepevt_disable(void) +{ + nrf_power_int_disable( + NRF_POWER_INT_SLEEPENTER_MASK | + NRF_POWER_INT_SLEEPEXIT_MASK); +} + +void nrfx_power_sleepevt_uninit(void) +{ + m_sleepevt_handler = NULL; +} +#endif /* NRF_POWER_HAS_SLEEPEVT */ + +#if NRF_POWER_HAS_USBREG || defined(__NRFX_DOXYGEN__) +void nrfx_power_usbevt_init(nrfx_power_usbevt_config_t const * p_config) +{ + nrfx_power_usbevt_uninit(); + if (p_config->handler != NULL) + { + m_usbevt_handler = p_config->handler; + } +} + +void nrfx_power_usbevt_enable(void) +{ + nrf_power_int_enable( + NRF_POWER_INT_USBDETECTED_MASK | + NRF_POWER_INT_USBREMOVED_MASK | + NRF_POWER_INT_USBPWRRDY_MASK); +} + +void nrfx_power_usbevt_disable(void) +{ + nrf_power_int_disable( + NRF_POWER_INT_USBDETECTED_MASK | + NRF_POWER_INT_USBREMOVED_MASK | + NRF_POWER_INT_USBPWRRDY_MASK); +} + +void nrfx_power_usbevt_uninit(void) +{ + m_usbevt_handler = NULL; +} +#endif /* NRF_POWER_HAS_USBREG */ + + +void nrfx_power_irq_handler(void) +{ + uint32_t enabled = nrf_power_int_enable_get(); + if ((0 != (enabled & NRF_POWER_INT_POFWARN_MASK)) && + nrf_power_event_get_and_clear(NRF_POWER_EVENT_POFWARN)) + { + /* Cannot be null if event is enabled */ + NRFX_ASSERT(m_pofwarn_handler != NULL); + m_pofwarn_handler(); + } +#if NRF_POWER_HAS_SLEEPEVT || defined(__NRFX_DOXYGEN__) + if ((0 != (enabled & NRF_POWER_INT_SLEEPENTER_MASK)) && + nrf_power_event_get_and_clear(NRF_POWER_EVENT_SLEEPENTER)) + { + /* Cannot be null if event is enabled */ + NRFX_ASSERT(m_sleepevt_handler != NULL); + m_sleepevt_handler(NRFX_POWER_SLEEP_EVT_ENTER); + } + if ((0 != (enabled & NRF_POWER_INT_SLEEPEXIT_MASK)) && + nrf_power_event_get_and_clear(NRF_POWER_EVENT_SLEEPEXIT)) + { + /* Cannot be null if event is enabled */ + NRFX_ASSERT(m_sleepevt_handler != NULL); + m_sleepevt_handler(NRFX_POWER_SLEEP_EVT_EXIT); + } +#endif +#if NRF_POWER_HAS_USBREG || defined(__NRFX_DOXYGEN__) + if ((0 != (enabled & NRF_POWER_INT_USBDETECTED_MASK)) && + nrf_power_event_get_and_clear(NRF_POWER_EVENT_USBDETECTED)) + { + /* Cannot be null if event is enabled */ + NRFX_ASSERT(m_usbevt_handler != NULL); + m_usbevt_handler(NRFX_POWER_USB_EVT_DETECTED); + } + if ((0 != (enabled & NRF_POWER_INT_USBREMOVED_MASK)) && + nrf_power_event_get_and_clear(NRF_POWER_EVENT_USBREMOVED)) + { + /* Cannot be null if event is enabled */ + NRFX_ASSERT(m_usbevt_handler != NULL); + m_usbevt_handler(NRFX_POWER_USB_EVT_REMOVED); + } + if ((0 != (enabled & NRF_POWER_INT_USBPWRRDY_MASK)) && + nrf_power_event_get_and_clear(NRF_POWER_EVENT_USBPWRRDY)) + { + /* Cannot be null if event is enabled */ + NRFX_ASSERT(m_usbevt_handler != NULL); + m_usbevt_handler(NRFX_POWER_USB_EVT_READY); + } +#endif +} + +#endif // NRFX_CHECK(NRFX_POWER_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_power_clock.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_power_clock.c new file mode 100644 index 00000000000..ff69bf7145f --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_power_clock.c @@ -0,0 +1,52 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include +#include +#include + + +#if NRFX_CHECK(NRFX_POWER_ENABLED) && NRFX_CHECK(NRFX_CLOCK_ENABLED) +void nrfx_power_clock_irq_handler(void) +{ + nrfx_power_irq_handler(); + nrfx_clock_irq_handler(); +} +#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_ppi.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_ppi.c new file mode 100644 index 00000000000..067ba18d6e5 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_ppi.c @@ -0,0 +1,534 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_PPI_ENABLED) + +#include + +#define NRFX_LOG_MODULE_NAME PPI +#include + + +static uint32_t m_channels_allocated; /**< Bitmap representing channels availability. 1 when a channel is allocated, 0 otherwise. */ +static uint8_t m_groups_allocated; /**< Bitmap representing groups availability. 1 when a group is allocated, 0 otherwise.*/ + + +/** + * @brief Compute a group mask (needed for driver internals, not used for NRF_PPI registers). + * + * @param[in] group Group number to transform to a mask. + * + * @retval Group mask. + */ +__STATIC_INLINE uint32_t group_to_mask(nrf_ppi_channel_group_t group) +{ + return (1uL << (uint32_t) group); +} + + +/** + * @brief Check whether a channel is a programmable channel and can be used by an application. + * + * @param[in] channel Channel to check. + * + * @retval true The channel is a programmable application channel. + * @retval false The channel is used by a stack (for example SoftDevice) or is preprogrammed. + */ +__STATIC_INLINE bool is_programmable_app_channel(nrf_ppi_channel_t channel) +{ + return ((NRFX_PPI_PROG_APP_CHANNELS_MASK & nrfx_ppi_channel_to_mask(channel)) != 0); +} + + +/** + * @brief Check whether channels can be used by an application. + * + * @param[in] channel_mask Channel mask to check. + * + * @retval true All specified channels can be used by an application. + * @retval false At least one specified channel is used by a stack (for example SoftDevice). + */ +__STATIC_INLINE bool are_app_channels(uint32_t channel_mask) +{ + //lint -e(587) + return ((~(NRFX_PPI_ALL_APP_CHANNELS_MASK) & channel_mask) == 0); +} + + +/** + * @brief Check whether a channel can be used by an application. + * + * @param[in] channel Channel to check. + * + * @retval true The channel can be used by an application. + * @retval false The channel is used by a stack (for example SoftDevice). + */ +__STATIC_INLINE bool is_app_channel(nrf_ppi_channel_t channel) +{ + return are_app_channels(nrfx_ppi_channel_to_mask(channel)); +} + + +/** + * @brief Check whether a channel group can be used by an application. + * + * @param[in] group Group to check. + * + * @retval true The group is an application group. + * @retval false The group is not an application group (this group either does not exist or + * it is used by a stack (for example SoftDevice)). + */ +__STATIC_INLINE bool is_app_group(nrf_ppi_channel_group_t group) +{ + return ((NRFX_PPI_ALL_APP_GROUPS_MASK & group_to_mask(group)) != 0); +} + + +/** + * @brief Check whether a channel is allocated. + * + * @param[in] channel_num Channel number to check. + * + * @retval true The channel is allocated. + * @retval false The channel is not allocated. + */ +__STATIC_INLINE bool is_allocated_channel(nrf_ppi_channel_t channel) +{ + return ((m_channels_allocated & nrfx_ppi_channel_to_mask(channel)) != 0); +} + + +/** + * @brief Set channel allocated indication. + * + * @param[in] channel_num Specifies the channel to set the "allocated" indication. + */ +__STATIC_INLINE void channel_allocated_set(nrf_ppi_channel_t channel) +{ + m_channels_allocated |= nrfx_ppi_channel_to_mask(channel); +} + + +/** + * @brief Clear channel allocated indication. + * + * @param[in] channel_num Specifies the channel to clear the "allocated" indication. + */ +__STATIC_INLINE void channel_allocated_clr(nrf_ppi_channel_t channel) +{ + m_channels_allocated &= ~nrfx_ppi_channel_to_mask(channel); +} + + +/** + * @brief Clear all allocated channels. + */ +__STATIC_INLINE void channel_allocated_clr_all(void) +{ + m_channels_allocated &= ~NRFX_PPI_ALL_APP_CHANNELS_MASK; +} + + +/** + * @brief Check whether a group is allocated. + * + * @param[in] group_num Group number to check. + * + * @retval true The group is allocated. + * false The group is not allocated. + */ +__STATIC_INLINE bool is_allocated_group(nrf_ppi_channel_group_t group) +{ + return ((m_groups_allocated & group_to_mask(group)) != 0); +} + + +/** + * @brief Set group allocated indication. + * + * @param[in] group_num Specifies the group to set the "allocated" indication. + */ +__STATIC_INLINE void group_allocated_set(nrf_ppi_channel_group_t group) +{ + m_groups_allocated |= group_to_mask(group); +} + + +/** + * @brief Clear group allocated indication. + * + * @param[in] group_num Specifies the group to clear the "allocated" indication. + */ +__STATIC_INLINE void group_allocated_clr(nrf_ppi_channel_group_t group) +{ + m_groups_allocated &= ~group_to_mask(group); +} + + +/** + * @brief Clear all allocated groups. + */ +__STATIC_INLINE void group_allocated_clr_all() +{ + m_groups_allocated &= ~NRFX_PPI_ALL_APP_GROUPS_MASK; +} + + +void nrfx_ppi_free_all(void) +{ + uint32_t mask = NRFX_PPI_ALL_APP_GROUPS_MASK; + nrf_ppi_channel_group_t group; + + // Disable all channels and groups + nrf_ppi_channels_disable(NRFX_PPI_ALL_APP_CHANNELS_MASK); + + for (group = NRF_PPI_CHANNEL_GROUP0; mask != 0; mask &= ~group_to_mask(group), group++) + { + if (mask & group_to_mask(group)) + { + nrf_ppi_channel_group_clear(group); + } + } + channel_allocated_clr_all(); + group_allocated_clr_all(); +} + + +nrfx_err_t nrfx_ppi_channel_alloc(nrf_ppi_channel_t * p_channel) +{ + nrfx_err_t err_code = NRFX_SUCCESS; + nrf_ppi_channel_t channel; + uint32_t mask = 0; + err_code = NRFX_ERROR_NO_MEM; + + mask = NRFX_PPI_PROG_APP_CHANNELS_MASK; + for (channel = NRF_PPI_CHANNEL0; + mask != 0; + mask &= ~nrfx_ppi_channel_to_mask(channel), channel++) + { + NRFX_CRITICAL_SECTION_ENTER(); + if ((mask & nrfx_ppi_channel_to_mask(channel)) && (!is_allocated_channel(channel))) + { + channel_allocated_set(channel); + *p_channel = channel; + err_code = NRFX_SUCCESS; + } + NRFX_CRITICAL_SECTION_EXIT(); + if (err_code == NRFX_SUCCESS) + { + NRFX_LOG_INFO("Allocated channel: %d.", channel); + break; + } + } + + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + + +nrfx_err_t nrfx_ppi_channel_free(nrf_ppi_channel_t channel) +{ + nrfx_err_t err_code = NRFX_SUCCESS; + + if (!is_programmable_app_channel(channel)) + { + err_code = NRFX_ERROR_INVALID_PARAM; + } + else + { + // First disable this channel + nrf_ppi_channel_disable(channel); + NRFX_CRITICAL_SECTION_ENTER(); + channel_allocated_clr(channel); + NRFX_CRITICAL_SECTION_EXIT(); + } + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + + +nrfx_err_t nrfx_ppi_channel_assign(nrf_ppi_channel_t channel, uint32_t eep, uint32_t tep) +{ + if ((uint32_t *)eep == NULL || (uint32_t *)tep == NULL) + { + return NRFX_ERROR_NULL; + } + + nrfx_err_t err_code = NRFX_SUCCESS; + + if (!is_programmable_app_channel(channel)) + { + err_code = NRFX_ERROR_INVALID_PARAM; + } + else if (!is_allocated_channel(channel)) + { + err_code = NRFX_ERROR_INVALID_STATE; + } + else + { + nrf_ppi_channel_endpoint_setup(channel, eep, tep); + NRFX_LOG_INFO("Assigned channel: %d, event end point: %x, task end point: %x.", + channel, + eep, + tep); + } + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +nrfx_err_t nrfx_ppi_channel_fork_assign(nrf_ppi_channel_t channel, uint32_t fork_tep) +{ + nrfx_err_t err_code = NRFX_SUCCESS; +#ifdef PPI_FEATURE_FORKS_PRESENT + if (!is_programmable_app_channel(channel)) + { + err_code = NRFX_ERROR_INVALID_PARAM; + } + else if (!is_allocated_channel(channel)) + { + err_code = NRFX_ERROR_INVALID_STATE; + } + else + { + nrf_ppi_fork_endpoint_setup(channel, fork_tep); + NRFX_LOG_INFO("Fork assigned channel: %d, task end point: %d.", channel, fork_tep); + } + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +#else + err_code = NRFX_ERROR_NOT_SUPPORTED; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +#endif +} + +nrfx_err_t nrfx_ppi_channel_enable(nrf_ppi_channel_t channel) +{ + nrfx_err_t err_code = NRFX_SUCCESS; + + if (!is_app_channel(channel)) + { + err_code = NRFX_ERROR_INVALID_PARAM; + } + else if (is_programmable_app_channel(channel) && !is_allocated_channel(channel)) + { + err_code = NRFX_ERROR_INVALID_STATE; + } + else + { + nrf_ppi_channel_enable(channel); + } + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + + +nrfx_err_t nrfx_ppi_channel_disable(nrf_ppi_channel_t channel) +{ + nrfx_err_t err_code = NRFX_SUCCESS; + + if (!is_app_channel(channel)) + { + err_code = NRFX_ERROR_INVALID_PARAM; + } + else if (is_programmable_app_channel(channel) && !is_allocated_channel(channel)) + { + err_code = NRFX_ERROR_INVALID_STATE; + } + else + { + nrf_ppi_channel_disable(channel); + err_code = NRFX_SUCCESS; + } + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + + +nrfx_err_t nrfx_ppi_group_alloc(nrf_ppi_channel_group_t * p_group) +{ + nrfx_err_t err_code; + uint32_t mask = 0; + nrf_ppi_channel_group_t group; + + err_code = NRFX_ERROR_NO_MEM; + + mask = NRFX_PPI_ALL_APP_GROUPS_MASK; + for (group = NRF_PPI_CHANNEL_GROUP0; mask != 0; mask &= ~group_to_mask(group), group++) + { + NRFX_CRITICAL_SECTION_ENTER(); + if ((mask & group_to_mask(group)) && (!is_allocated_group(group))) + { + group_allocated_set(group); + *p_group = group; + err_code = NRFX_SUCCESS; + } + NRFX_CRITICAL_SECTION_EXIT(); + if (err_code == NRFX_SUCCESS) + { + NRFX_LOG_INFO("Allocated group: %d.", group); + break; + } + } + + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + + +nrfx_err_t nrfx_ppi_group_free(nrf_ppi_channel_group_t group) +{ + nrfx_err_t err_code = NRFX_SUCCESS; + + if (!is_app_group(group)) + { + err_code = NRFX_ERROR_INVALID_PARAM; + } + if (!is_allocated_group(group)) + { + err_code = NRFX_ERROR_INVALID_STATE; + } + else + { + nrf_ppi_group_disable(group); + NRFX_CRITICAL_SECTION_ENTER(); + group_allocated_clr(group); + NRFX_CRITICAL_SECTION_EXIT(); + } + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + + +nrfx_err_t nrfx_ppi_group_enable(nrf_ppi_channel_group_t group) +{ + nrfx_err_t err_code = NRFX_SUCCESS; + + if (!is_app_group(group)) + { + err_code = NRFX_ERROR_INVALID_PARAM; + } + else if (!is_allocated_group(group)) + { + err_code = NRFX_ERROR_INVALID_STATE; + } + else + { + nrf_ppi_group_enable(group); + } + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + + +nrfx_err_t nrfx_ppi_group_disable(nrf_ppi_channel_group_t group) +{ + nrfx_err_t err_code = NRFX_SUCCESS; + + if (!is_app_group(group)) + { + err_code = NRFX_ERROR_INVALID_PARAM; + } + else + { + nrf_ppi_group_disable(group); + } + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +nrfx_err_t nrfx_ppi_channels_remove_from_group(uint32_t channel_mask, + nrf_ppi_channel_group_t group) +{ + nrfx_err_t err_code = NRFX_SUCCESS; + + if (!is_app_group(group)) + { + err_code = NRFX_ERROR_INVALID_PARAM; + } + else if (!is_allocated_group(group)) + { + err_code = NRFX_ERROR_INVALID_STATE; + } + else if (!are_app_channels(channel_mask)) + { + err_code = NRFX_ERROR_INVALID_PARAM; + } + else + { + NRFX_CRITICAL_SECTION_ENTER(); + nrf_ppi_channels_remove_from_group(channel_mask, group); + NRFX_CRITICAL_SECTION_EXIT(); + } + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +nrfx_err_t nrfx_ppi_channels_include_in_group(uint32_t channel_mask, + nrf_ppi_channel_group_t group) +{ + nrfx_err_t err_code = NRFX_SUCCESS; + + if (!is_app_group(group)) + { + err_code = NRFX_ERROR_INVALID_PARAM; + } + else if (!is_allocated_group(group)) + { + err_code = NRFX_ERROR_INVALID_STATE; + } + else if (!are_app_channels(channel_mask)) + { + err_code = NRFX_ERROR_INVALID_PARAM; + } + else + { + NRFX_CRITICAL_SECTION_ENTER(); + nrf_ppi_channels_include_in_group(channel_mask, group); + NRFX_CRITICAL_SECTION_EXIT(); + } + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} +#endif // NRFX_CHECK(NRFX_PPI_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_pwm.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_pwm.c new file mode 100644 index 00000000000..3a6581f5731 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_pwm.c @@ -0,0 +1,515 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_PWM_ENABLED) + +#if !(NRFX_CHECK(NRFX_PWM0_ENABLED) || NRFX_CHECK(NRFX_PWM1_ENABLED) || \ + NRFX_CHECK(NRFX_PWM2_ENABLED) || NRFX_CHECK(NRFX_PWM3_ENABLED)) +#error "No enabled PWM instances. Check ." +#endif + +#include +#include + +#define NRFX_LOG_MODULE PWM +#include + +#if NRFX_CHECK(NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED) +// The workaround uses interrupts to wake up the CPU and ensure it is active +// when PWM is about to start a DMA transfer. For initial transfer, done when +// a playback is started via PPI, a specific EGU instance is used to generate +// an interrupt. During the playback, the PWM interrupt triggered on SEQEND +// event of a preceding sequence is used to protect the transfer done for +// the next sequence to be played. +#include +#define USE_DMA_ISSUE_WORKAROUND +#endif +#if defined(USE_DMA_ISSUE_WORKAROUND) +#define EGU_IRQn(i) EGU_IRQn_(i) +#define EGU_IRQn_(i) SWI##i##_EGU##i##_IRQn +#define EGU_IRQHandler(i) EGU_IRQHandler_(i) +#define EGU_IRQHandler_(i) nrfx_swi_##i##_irq_handler +#define DMA_ISSUE_EGU_IDX NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE +#define DMA_ISSUE_EGU NRFX_CONCAT_2(NRF_EGU, DMA_ISSUE_EGU_IDX) +#define DMA_ISSUE_EGU_IRQn EGU_IRQn(DMA_ISSUE_EGU_IDX) +#define DMA_ISSUE_EGU_IRQHandler EGU_IRQHandler(DMA_ISSUE_EGU_IDX) +#endif + +// Control block - driver instance local data. +typedef struct +{ +#if defined(USE_DMA_ISSUE_WORKAROUND) + uint32_t starting_task_address; +#endif + nrfx_pwm_handler_t handler; + nrfx_drv_state_t volatile state; + uint8_t flags; +} pwm_control_block_t; +static pwm_control_block_t m_cb[NRFX_PWM_ENABLED_COUNT]; + +static void configure_pins(nrfx_pwm_t const * const p_instance, + nrfx_pwm_config_t const * p_config) +{ + uint32_t out_pins[NRF_PWM_CHANNEL_COUNT]; + uint8_t i; + + for (i = 0; i < NRF_PWM_CHANNEL_COUNT; ++i) + { + uint8_t output_pin = p_config->output_pins[i]; + if (output_pin != NRFX_PWM_PIN_NOT_USED) + { + bool inverted = output_pin & NRFX_PWM_PIN_INVERTED; + out_pins[i] = output_pin & ~NRFX_PWM_PIN_INVERTED; + + if (inverted) + { + nrf_gpio_pin_set(out_pins[i]); + } + else + { + nrf_gpio_pin_clear(out_pins[i]); + } + + nrf_gpio_cfg_output(out_pins[i]); + } + else + { + out_pins[i] = NRF_PWM_PIN_NOT_CONNECTED; + } + } + + nrf_pwm_pins_set(p_instance->p_registers, out_pins); +} + + +nrfx_err_t nrfx_pwm_init(nrfx_pwm_t const * const p_instance, + nrfx_pwm_config_t const * p_config, + nrfx_pwm_handler_t handler) +{ + NRFX_ASSERT(p_config); + + nrfx_err_t err_code; + + pwm_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) + { + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + p_cb->handler = handler; + + configure_pins(p_instance, p_config); + + nrf_pwm_enable(p_instance->p_registers); + nrf_pwm_configure(p_instance->p_registers, + p_config->base_clock, p_config->count_mode, p_config->top_value); + nrf_pwm_decoder_set(p_instance->p_registers, + p_config->load_mode, p_config->step_mode); + + nrf_pwm_shorts_set(p_instance->p_registers, 0); + nrf_pwm_int_set(p_instance->p_registers, 0); + nrf_pwm_event_clear(p_instance->p_registers, NRF_PWM_EVENT_LOOPSDONE); + nrf_pwm_event_clear(p_instance->p_registers, NRF_PWM_EVENT_SEQEND0); + nrf_pwm_event_clear(p_instance->p_registers, NRF_PWM_EVENT_SEQEND1); + nrf_pwm_event_clear(p_instance->p_registers, NRF_PWM_EVENT_STOPPED); + + // The workaround for nRF52 Anomaly 109 "protects" DMA transfers by handling + // interrupts generated on SEQEND0 and SEQEND1 events (this ensures that + // the 64 MHz clock is ready when data for the next sequence to be played + // is read). Therefore, the PWM interrupt must be enabled even if the event + // handler is not used. +#if defined(USE_DMA_ISSUE_WORKAROUND) + NRFX_IRQ_PRIORITY_SET(DMA_ISSUE_EGU_IRQn, p_config->irq_priority); + NRFX_IRQ_ENABLE(DMA_ISSUE_EGU_IRQn); +#else + if (p_cb->handler) +#endif + { + NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(p_instance->p_registers), + p_config->irq_priority); + NRFX_IRQ_ENABLE(nrfx_get_irq_number(p_instance->p_registers)); + } + + p_cb->state = NRFX_DRV_STATE_INITIALIZED; + + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + + +void nrfx_pwm_uninit(nrfx_pwm_t const * const p_instance) +{ + pwm_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + + NRFX_IRQ_DISABLE(nrfx_get_irq_number(p_instance->p_registers)); +#if defined(USE_DMA_ISSUE_WORKAROUND) + NRFX_IRQ_DISABLE(DMA_ISSUE_EGU_IRQn); +#endif + + nrf_pwm_disable(p_instance->p_registers); + + p_cb->state = NRFX_DRV_STATE_UNINITIALIZED; +} + + +static uint32_t start_playback(nrfx_pwm_t const * const p_instance, + pwm_control_block_t * p_cb, + uint8_t flags, + nrf_pwm_task_t starting_task) +{ + p_cb->state = NRFX_DRV_STATE_POWERED_ON; + p_cb->flags = flags; + + if (p_cb->handler) + { + // The notification about finished playback is by default enabled, + // but this can be suppressed. + // The notification that the peripheral has stopped is always enabled. + uint32_t int_mask = NRF_PWM_INT_LOOPSDONE_MASK | + NRF_PWM_INT_STOPPED_MASK; + + // The workaround for nRF52 Anomaly 109 "protects" DMA transfers by + // handling interrupts generated on SEQEND0 and SEQEND1 events (see + // 'nrfx_pwm_init'), hence these events must be always enabled + // to generate interrupts. + // However, the user handler is called for them only when requested + // (see 'irq_handler'). +#if defined(USE_DMA_ISSUE_WORKAROUND) + int_mask |= NRF_PWM_INT_SEQEND0_MASK | NRF_PWM_INT_SEQEND1_MASK; +#else + if (flags & NRFX_PWM_FLAG_SIGNAL_END_SEQ0) + { + int_mask |= NRF_PWM_INT_SEQEND0_MASK; + } + if (flags & NRFX_PWM_FLAG_SIGNAL_END_SEQ1) + { + int_mask |= NRF_PWM_INT_SEQEND1_MASK; + } +#endif + if (flags & NRFX_PWM_FLAG_NO_EVT_FINISHED) + { + int_mask &= ~NRF_PWM_INT_LOOPSDONE_MASK; + } + + nrf_pwm_int_set(p_instance->p_registers, int_mask); + } +#if defined(USE_DMA_ISSUE_WORKAROUND) + else + { + nrf_pwm_int_set(p_instance->p_registers, + NRF_PWM_INT_SEQEND0_MASK | NRF_PWM_INT_SEQEND1_MASK); + } +#endif + + nrf_pwm_event_clear(p_instance->p_registers, NRF_PWM_EVENT_STOPPED); + + if (flags & NRFX_PWM_FLAG_START_VIA_TASK) + { + uint32_t starting_task_address = + nrf_pwm_task_address_get(p_instance->p_registers, starting_task); + +#if defined(USE_DMA_ISSUE_WORKAROUND) + // To "protect" the initial DMA transfer it is required to start + // the PWM by triggering the proper task from EGU interrupt handler, + // it is not safe to do it directly via PPI. + p_cb->starting_task_address = starting_task_address; + nrf_egu_int_enable(DMA_ISSUE_EGU, + nrf_egu_int_get(DMA_ISSUE_EGU, p_instance->drv_inst_idx)); + return (uint32_t)nrf_egu_task_trigger_address_get(DMA_ISSUE_EGU, + p_instance->drv_inst_idx); +#else + return starting_task_address; +#endif + } + + nrf_pwm_task_trigger(p_instance->p_registers, starting_task); + return 0; +} + + +uint32_t nrfx_pwm_simple_playback(nrfx_pwm_t const * const p_instance, + nrf_pwm_sequence_t const * p_sequence, + uint16_t playback_count, + uint32_t flags) +{ + pwm_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + NRFX_ASSERT(playback_count > 0); + NRFX_ASSERT(nrfx_is_in_ram(p_sequence->values.p_raw)); + + // To take advantage of the looping mechanism, we need to use both sequences + // (single sequence can be played back only once). + nrf_pwm_sequence_set(p_instance->p_registers, 0, p_sequence); + nrf_pwm_sequence_set(p_instance->p_registers, 1, p_sequence); + bool odd = (playback_count & 1); + nrf_pwm_loop_set(p_instance->p_registers, + (playback_count / 2) + (odd ? 1 : 0)); + + uint32_t shorts_mask; + if (flags & NRFX_PWM_FLAG_STOP) + { + shorts_mask = NRF_PWM_SHORT_LOOPSDONE_STOP_MASK; + } + else if (flags & NRFX_PWM_FLAG_LOOP) + { + shorts_mask = odd ? NRF_PWM_SHORT_LOOPSDONE_SEQSTART1_MASK + : NRF_PWM_SHORT_LOOPSDONE_SEQSTART0_MASK; + } + else + { + shorts_mask = 0; + } + nrf_pwm_shorts_set(p_instance->p_registers, shorts_mask); + + NRFX_LOG_INFO("Function: %s, sequence length: %d.", + __func__, + p_sequence->length); + NRFX_LOG_DEBUG("Sequence data:"); + NRFX_LOG_HEXDUMP_DEBUG((uint8_t *)p_sequence->values.p_raw, + p_sequence->length * sizeof(uint16_t)); + return start_playback(p_instance, p_cb, flags, + odd ? NRF_PWM_TASK_SEQSTART1 : NRF_PWM_TASK_SEQSTART0); +} + + +uint32_t nrfx_pwm_complex_playback(nrfx_pwm_t const * const p_instance, + nrf_pwm_sequence_t const * p_sequence_0, + nrf_pwm_sequence_t const * p_sequence_1, + uint16_t playback_count, + uint32_t flags) +{ + pwm_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + NRFX_ASSERT(playback_count > 0); + NRFX_ASSERT(nrfx_is_in_ram(p_sequence_0->values.p_raw)); + NRFX_ASSERT(nrfx_is_in_ram(p_sequence_1->values.p_raw)); + + nrf_pwm_sequence_set(p_instance->p_registers, 0, p_sequence_0); + nrf_pwm_sequence_set(p_instance->p_registers, 1, p_sequence_1); + nrf_pwm_loop_set(p_instance->p_registers, playback_count); + + uint32_t shorts_mask; + if (flags & NRFX_PWM_FLAG_STOP) + { + shorts_mask = NRF_PWM_SHORT_LOOPSDONE_STOP_MASK; + } + else if (flags & NRFX_PWM_FLAG_LOOP) + { + shorts_mask = NRF_PWM_SHORT_LOOPSDONE_SEQSTART0_MASK; + } + else + { + shorts_mask = 0; + } + nrf_pwm_shorts_set(p_instance->p_registers, shorts_mask); + + NRFX_LOG_INFO("Function: %s, sequence 0 length: %d.", + __func__, + p_sequence_0->length); + NRFX_LOG_INFO("Function: %s, sequence 1 length: %d.", + __func__, + p_sequence_1->length); + NRFX_LOG_DEBUG("Sequence 0 data:"); + NRFX_LOG_HEXDUMP_DEBUG(p_sequence_0->values.p_raw, + p_sequence_0->length * sizeof(uint16_t)); + NRFX_LOG_DEBUG("Sequence 1 data:"); + NRFX_LOG_HEXDUMP_DEBUG(p_sequence_1->values.p_raw, + p_sequence_1->length * sizeof(uint16_t)); + return start_playback(p_instance, p_cb, flags, NRF_PWM_TASK_SEQSTART0); +} + + +bool nrfx_pwm_stop(nrfx_pwm_t const * const p_instance, + bool wait_until_stopped) +{ + NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state != NRFX_DRV_STATE_UNINITIALIZED); + + bool ret_val = false; + + if (nrfx_pwm_is_stopped(p_instance)) + { + ret_val = true; + } + else + { + nrf_pwm_task_trigger(p_instance->p_registers, NRF_PWM_TASK_STOP); + + do { + if (nrfx_pwm_is_stopped(p_instance)) + { + ret_val = true; + break; + } + } while (wait_until_stopped); + } + + NRFX_LOG_INFO("%s returned %d.", __func__, ret_val); + return ret_val; +} + + +bool nrfx_pwm_is_stopped(nrfx_pwm_t const * const p_instance) +{ + pwm_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + + bool ret_val = false; + + // If the event handler is used (interrupts are enabled), the state will + // be changed in interrupt handler when the STOPPED event occurs. + if (p_cb->state != NRFX_DRV_STATE_POWERED_ON) + { + ret_val = true; + } + // If interrupts are disabled, we must check the STOPPED event here. + if (nrf_pwm_event_check(p_instance->p_registers, NRF_PWM_EVENT_STOPPED)) + { + p_cb->state = NRFX_DRV_STATE_INITIALIZED; + NRFX_LOG_INFO("Disabled."); + ret_val = true; + } + + NRFX_LOG_INFO("%s returned %d.", __func__, ret_val); + return ret_val; +} + + +static void irq_handler(NRF_PWM_Type * p_pwm, pwm_control_block_t * p_cb) +{ + // The user handler is called for SEQEND0 and SEQEND1 events only when the + // user asks for it (by setting proper flags when starting the playback). + if (nrf_pwm_event_check(p_pwm, NRF_PWM_EVENT_SEQEND0)) + { + nrf_pwm_event_clear(p_pwm, NRF_PWM_EVENT_SEQEND0); + if ((p_cb->flags & NRFX_PWM_FLAG_SIGNAL_END_SEQ0) && p_cb->handler) + { + p_cb->handler(NRFX_PWM_EVT_END_SEQ0); + } + } + if (nrf_pwm_event_check(p_pwm, NRF_PWM_EVENT_SEQEND1)) + { + nrf_pwm_event_clear(p_pwm, NRF_PWM_EVENT_SEQEND1); + if ((p_cb->flags & NRFX_PWM_FLAG_SIGNAL_END_SEQ1) && p_cb->handler) + { + p_cb->handler(NRFX_PWM_EVT_END_SEQ1); + } + } + // For LOOPSDONE the handler is called by default, but the user can disable + // this (via flags). + if (nrf_pwm_event_check(p_pwm, NRF_PWM_EVENT_LOOPSDONE)) + { + nrf_pwm_event_clear(p_pwm, NRF_PWM_EVENT_LOOPSDONE); + if (!(p_cb->flags & NRFX_PWM_FLAG_NO_EVT_FINISHED) && p_cb->handler) + { + p_cb->handler(NRFX_PWM_EVT_FINISHED); + } + } + + // The STOPPED event is always propagated to the user handler. + if (nrf_pwm_event_check(p_pwm, NRF_PWM_EVENT_STOPPED)) + { + nrf_pwm_event_clear(p_pwm, NRF_PWM_EVENT_STOPPED); + + p_cb->state = NRFX_DRV_STATE_INITIALIZED; + if (p_cb->handler) + { + p_cb->handler(NRFX_PWM_EVT_STOPPED); + } + } +} + + +#if defined(USE_DMA_ISSUE_WORKAROUND) +// See 'start_playback' why this is needed. +void DMA_ISSUE_EGU_IRQHandler(void) +{ + int i; + for (i = 0; i < NRFX_PWM_ENABLED_COUNT; ++i) + { + volatile uint32_t * p_event_reg = + nrf_egu_event_triggered_address_get(DMA_ISSUE_EGU, i); + if (*p_event_reg) + { + *p_event_reg = 0; + *(volatile uint32_t *)(m_cb[i].starting_task_address) = 1; + } + } +} +#endif + + +#if NRFX_CHECK(NRFX_PWM0_ENABLED) +void nrfx_pwm_0_irq_handler(void) +{ + irq_handler(NRF_PWM0, &m_cb[NRFX_PWM0_INST_IDX]); +} +#endif + +#if NRFX_CHECK(NRFX_PWM1_ENABLED) +void nrfx_pwm_1_irq_handler(void) +{ + irq_handler(NRF_PWM1, &m_cb[NRFX_PWM1_INST_IDX]); +} +#endif + +#if NRFX_CHECK(NRFX_PWM2_ENABLED) +void nrfx_pwm_2_irq_handler(void) +{ + irq_handler(NRF_PWM2, &m_cb[NRFX_PWM2_INST_IDX]); +} +#endif + +#if NRFX_CHECK(NRFX_PWM3_ENABLED) +void nrfx_pwm_3_irq_handler(void) +{ + irq_handler(NRF_PWM3, &m_cb[NRFX_PWM3_INST_IDX]); +} +#endif + +#endif // NRFX_CHECK(NRFX_PWM_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_qdec.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_qdec.c new file mode 100644 index 00000000000..c7994d13eca --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_qdec.c @@ -0,0 +1,201 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_QDEC_ENABLED) + +#include +#include + +#define NRFX_LOG_MODULE QDEC +#include + +#define EVT_TO_STR(event) \ + (event == NRF_QDEC_EVENT_SAMPLERDY ? "NRF_QDEC_EVENT_SAMPLERDY" : \ + (event == NRF_QDEC_EVENT_REPORTRDY ? "NRF_QDEC_EVENT_REPORTRDY" : \ + (event == NRF_QDEC_EVENT_ACCOF ? "NRF_QDEC_EVENT_ACCOF" : \ + "UNKNOWN EVENT"))) + + +static nrfx_qdec_event_handler_t m_qdec_event_handler = NULL; +static nrfx_drv_state_t m_state = NRFX_DRV_STATE_UNINITIALIZED; + +void nrfx_qdec_irq_handler(void) +{ + nrfx_qdec_event_t event; + if ( nrf_qdec_event_check(NRF_QDEC_EVENT_SAMPLERDY) && + nrf_qdec_int_enable_check(NRF_QDEC_INT_SAMPLERDY_MASK) ) + { + nrf_qdec_event_clear(NRF_QDEC_EVENT_SAMPLERDY); + NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_QDEC_EVENT_SAMPLERDY)); + + event.type = NRF_QDEC_EVENT_SAMPLERDY; + event.data.sample.value = (int8_t)nrf_qdec_sample_get(); + m_qdec_event_handler(event); + } + + if ( nrf_qdec_event_check(NRF_QDEC_EVENT_REPORTRDY) && + nrf_qdec_int_enable_check(NRF_QDEC_INT_REPORTRDY_MASK) ) + { + nrf_qdec_event_clear(NRF_QDEC_EVENT_REPORTRDY); + NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_QDEC_EVENT_REPORTRDY)); + + event.type = NRF_QDEC_EVENT_REPORTRDY; + + event.data.report.acc = (int16_t)nrf_qdec_accread_get(); + event.data.report.accdbl = (uint16_t)nrf_qdec_accdblread_get(); + m_qdec_event_handler(event); + } + + if ( nrf_qdec_event_check(NRF_QDEC_EVENT_ACCOF) && + nrf_qdec_int_enable_check(NRF_QDEC_INT_ACCOF_MASK) ) + { + nrf_qdec_event_clear(NRF_QDEC_EVENT_ACCOF); + NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_QDEC_EVENT_ACCOF)); + + event.type = NRF_QDEC_EVENT_ACCOF; + m_qdec_event_handler(event); + } +} + + +nrfx_err_t nrfx_qdec_init(nrfx_qdec_config_t const * p_config, + nrfx_qdec_event_handler_t event_handler) +{ + NRFX_ASSERT(p_config); + NRFX_ASSERT(event_handler); + nrfx_err_t err_code; + + if (m_state != NRFX_DRV_STATE_UNINITIALIZED) + { + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + m_qdec_event_handler = event_handler; + + nrf_qdec_sampleper_set(p_config->sampleper); + nrf_gpio_cfg_input(p_config->pselled, NRF_GPIO_PIN_NOPULL); + nrf_gpio_cfg_input(p_config->psela, NRF_GPIO_PIN_NOPULL); + nrf_gpio_cfg_input(p_config->pselb, NRF_GPIO_PIN_NOPULL); + nrf_qdec_pio_assign(p_config->psela, p_config->pselb, p_config->pselled); + nrf_qdec_ledpre_set(p_config->ledpre); + nrf_qdec_ledpol_set(p_config->ledpol); + nrf_qdec_shorts_enable(NRF_QDEC_SHORT_REPORTRDY_READCLRACC_MASK); + + if (p_config->dbfen) + { + nrf_qdec_dbfen_enable(); + } + else + { + nrf_qdec_dbfen_disable(); + } + + uint32_t int_mask = NRF_QDEC_INT_ACCOF_MASK; + + if (p_config->reportper != NRF_QDEC_REPORTPER_DISABLED) + { + nrf_qdec_reportper_set(p_config->reportper); + int_mask |= NRF_QDEC_INT_REPORTRDY_MASK; + } + + if (p_config->sample_inten) + { + int_mask |= NRF_QDEC_INT_SAMPLERDY_MASK; + } + + nrf_qdec_int_enable(int_mask); + NRFX_IRQ_PRIORITY_SET(QDEC_IRQn, p_config->interrupt_priority); + NRFX_IRQ_ENABLE(QDEC_IRQn); + + m_state = NRFX_DRV_STATE_INITIALIZED; + + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +void nrfx_qdec_uninit(void) +{ + NRFX_ASSERT(m_state != NRFX_DRV_STATE_UNINITIALIZED); + nrfx_qdec_disable(); + NRFX_IRQ_DISABLE(QDEC_IRQn); + m_state = NRFX_DRV_STATE_UNINITIALIZED; + NRFX_LOG_INFO("Uninitialized."); +} + +void nrfx_qdec_enable(void) +{ + NRFX_ASSERT(m_state == NRFX_DRV_STATE_INITIALIZED); + nrf_qdec_enable(); + nrf_qdec_task_trigger(NRF_QDEC_TASK_START); + m_state = NRFX_DRV_STATE_POWERED_ON; + NRFX_LOG_INFO("Enabled."); +} + +void nrfx_qdec_disable(void) +{ + NRFX_ASSERT(m_state == NRFX_DRV_STATE_POWERED_ON); + nrf_qdec_task_trigger(NRF_QDEC_TASK_STOP); + nrf_qdec_disable(); + m_state = NRFX_DRV_STATE_INITIALIZED; + NRFX_LOG_INFO("Disabled."); +} + +void nrfx_qdec_accumulators_read(int16_t * p_acc, int16_t * p_accdbl) +{ + NRFX_ASSERT(m_state == NRFX_DRV_STATE_POWERED_ON); + nrf_qdec_task_trigger(NRF_QDEC_TASK_READCLRACC); + + *p_acc = (int16_t)nrf_qdec_accread_get(); + *p_accdbl = (int16_t)nrf_qdec_accdblread_get(); + + NRFX_LOG_DEBUG("Accumulators data, ACC register:"); + NRFX_LOG_HEXDUMP_DEBUG((uint8_t *)p_acc, sizeof(p_acc[0])); + NRFX_LOG_DEBUG("Accumulators data, ACCDBL register:"); + NRFX_LOG_HEXDUMP_DEBUG((uint8_t *)p_accdbl, sizeof(p_accdbl[0])); +} + +#endif // NRFX_CHECK(NRFX_QDEC_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_qspi.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_qspi.c new file mode 100644 index 00000000000..93ffeffa7a6 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_qspi.c @@ -0,0 +1,337 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_QSPI_ENABLED) + +#include + + +/** + * @brief Command byte used to read status register. + * + */ +#define QSPI_STD_CMD_RDSR 0x05 + +/** + * @brief Byte used to mask status register and retrieve the write-in-progess bit. + * + */ +#define QSPI_MEM_STATUSREG_WIP_Pos 0x01 + +/** + * @brief Default time used in timeout function. + */ +#define QSPI_DEF_WAIT_TIME_US 10 + +/** + * @brief Default number of tries in timeout function. + */ +#define QSPI_DEF_WAIT_ATTEMPTS 100 + +/** + * @brief Control block - driver instance local data. + */ +typedef struct +{ + nrfx_qspi_handler_t handler; /**< Handler. */ + nrfx_drv_state_t state; /**< Driver state. */ + volatile bool interrupt_driven; /**< Information if the current operation is performed and is interrupt-driven. */ + void * p_context; /**< Driver context used in interrupt. */ +} qspi_control_block_t; + +static qspi_control_block_t m_cb; + +static nrfx_err_t qspi_task_perform(nrf_qspi_task_t task) +{ + // Wait for peripheral + if (m_cb.interrupt_driven) + { + return NRFX_ERROR_BUSY; + } + + nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); + + if (m_cb.handler) + { + m_cb.interrupt_driven = true; + nrf_qspi_int_enable(NRF_QSPI, NRF_QSPI_INT_READY_MASK); + } + + nrf_qspi_task_trigger(NRF_QSPI, task); + + if (m_cb.handler == NULL) + { + while (!nrf_qspi_event_check(NRF_QSPI, NRF_QSPI_EVENT_READY)) + {}; + } + return NRFX_SUCCESS; +} + +static bool qspi_pins_configure(nrf_qspi_pins_t const * p_config) +{ + // Check if the user set meaningful values to struct fields. If not, return false. + if ((p_config->sck_pin == NRF_QSPI_PIN_NOT_CONNECTED) || + (p_config->csn_pin == NRF_QSPI_PIN_NOT_CONNECTED) || + (p_config->io0_pin == NRF_QSPI_PIN_NOT_CONNECTED) || + (p_config->io1_pin == NRF_QSPI_PIN_NOT_CONNECTED)) + { + return false; + } + + nrf_qspi_pins_set(NRF_QSPI, p_config); + + return true; +} + +nrfx_err_t nrfx_qspi_init(nrfx_qspi_config_t const * p_config, + nrfx_qspi_handler_t handler, + void * p_context) +{ + NRFX_ASSERT(p_config); + if (m_cb.state != NRFX_DRV_STATE_UNINITIALIZED) + { + return NRFX_ERROR_INVALID_STATE; + } + + if (!qspi_pins_configure(&p_config->pins)) + { + return NRFX_ERROR_INVALID_PARAM; + } + + nrf_qspi_xip_offset_set(NRF_QSPI, p_config->xip_offset); + nrf_qspi_ifconfig0_set(NRF_QSPI, &p_config->prot_if); + nrf_qspi_ifconfig1_set(NRF_QSPI, &p_config->phy_if); + + m_cb.interrupt_driven = false; + m_cb.handler = handler; + m_cb.p_context = p_context; + + /* QSPI interrupt is disabled because the device should be enabled in polling mode (wait for activate + task event ready)*/ + nrf_qspi_int_disable(NRF_QSPI, NRF_QSPI_INT_READY_MASK); + + if (handler) + { + NRFX_IRQ_PRIORITY_SET(QSPI_IRQn, p_config->irq_priority); + NRFX_IRQ_ENABLE(QSPI_IRQn); + } + + m_cb.state = NRFX_DRV_STATE_INITIALIZED; + + nrf_qspi_enable(NRF_QSPI); + + nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); + nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_ACTIVATE); + + // Waiting for the peripheral to activate + bool result; + NRFX_WAIT_FOR(nrf_qspi_event_check(NRF_QSPI, NRF_QSPI_EVENT_READY), + QSPI_DEF_WAIT_ATTEMPTS, + QSPI_DEF_WAIT_TIME_US, + result); + + if (!result) + { + return NRFX_ERROR_TIMEOUT; + } + + return NRFX_SUCCESS; +} + +nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config, + void const * p_tx_buffer, + void * p_rx_buffer) +{ + NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); + + if (m_cb.interrupt_driven) + { + return NRFX_ERROR_BUSY; + } + + nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); + /* In some cases, only opcode should be sent. To prevent execution, set function code is + * surrounded by an if. + */ + if (p_tx_buffer) + { + nrf_qspi_cinstrdata_set(NRF_QSPI, p_config->length, p_tx_buffer); + } + nrf_qspi_int_disable(NRF_QSPI, NRF_QSPI_INT_READY_MASK); + + nrf_qspi_cinstr_transfer_start(NRF_QSPI, p_config); + + bool result; + NRFX_WAIT_FOR(nrf_qspi_event_check(NRF_QSPI, NRF_QSPI_EVENT_READY), + QSPI_DEF_WAIT_ATTEMPTS, + QSPI_DEF_WAIT_TIME_US, + result); + + if (!result) + { + // This timeout should never occur when WIPWAIT is not active, since in this + // case the QSPI peripheral should send the command immediately, without any + // waiting for previous write to complete. + NRFX_ASSERT(p_config->wipwait); + + return NRFX_ERROR_TIMEOUT; + } + nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); + nrf_qspi_int_enable(NRF_QSPI, NRF_QSPI_INT_READY_MASK); + + if (p_rx_buffer) + { + nrf_qspi_cinstrdata_get(NRF_QSPI, p_config->length, p_rx_buffer); + } + + return NRFX_SUCCESS; +} + +nrfx_err_t nrfx_qspi_cinstr_quick_send(uint8_t opcode, + nrf_qspi_cinstr_len_t length, + void const * p_tx_buffer) +{ + nrf_qspi_cinstr_conf_t config = NRFX_QSPI_DEFAULT_CINSTR(opcode, length); + return nrfx_qspi_cinstr_xfer(&config, p_tx_buffer, NULL); +} + +nrfx_err_t nrfx_qspi_mem_busy_check(void) +{ + nrfx_err_t ret_code; + uint8_t status_value = 0; + + nrf_qspi_cinstr_conf_t const config = + NRFX_QSPI_DEFAULT_CINSTR(QSPI_STD_CMD_RDSR, + NRF_QSPI_CINSTR_LEN_2B); + ret_code = nrfx_qspi_cinstr_xfer(&config, &status_value, &status_value); + + if (ret_code != NRFX_SUCCESS) + { + return ret_code; + } + + if ((status_value & QSPI_MEM_STATUSREG_WIP_Pos) != 0x00) + { + return NRFX_ERROR_BUSY; + } + + return NRFX_SUCCESS; +} + +void nrfx_qspi_uninit(void) +{ + NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); + + nrf_qspi_int_disable(NRF_QSPI, NRF_QSPI_INT_READY_MASK); + + nrf_qspi_disable(NRF_QSPI); + + nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_DEACTIVATE); + + // Workaround for nRF52840 anomaly 122: Current consumption is too high. + *(volatile uint32_t *)0x40029054ul = 1ul; + + NRFX_IRQ_DISABLE(QSPI_IRQn); + + nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); + + m_cb.state = NRFX_DRV_STATE_UNINITIALIZED; +} + +nrfx_err_t nrfx_qspi_write(void const * p_tx_buffer, + size_t tx_buffer_length, + uint32_t dst_address) +{ + NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); + NRFX_ASSERT(p_tx_buffer != NULL); + + if (!nrfx_is_in_ram(p_tx_buffer)) + { + return NRFX_ERROR_INVALID_ADDR; + } + + nrf_qspi_write_buffer_set(NRF_QSPI, p_tx_buffer, tx_buffer_length, dst_address); + return qspi_task_perform(NRF_QSPI_TASK_WRITESTART); + +} + +nrfx_err_t nrfx_qspi_read(void * p_rx_buffer, + size_t rx_buffer_length, + uint32_t src_address) +{ + NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); + NRFX_ASSERT(p_rx_buffer != NULL); + + if (!nrfx_is_in_ram(p_rx_buffer)) + { + return NRFX_ERROR_INVALID_ADDR; + } + + nrf_qspi_read_buffer_set(NRF_QSPI, p_rx_buffer, rx_buffer_length, src_address); + return qspi_task_perform(NRF_QSPI_TASK_READSTART); +} + +nrfx_err_t nrfx_qspi_erase(nrf_qspi_erase_len_t length, + uint32_t start_address) +{ + NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); + nrf_qspi_erase_ptr_set(NRF_QSPI, start_address, length); + return qspi_task_perform(NRF_QSPI_TASK_ERASESTART); +} + +nrfx_err_t nrfx_qspi_chip_erase(void) +{ + return nrfx_qspi_erase(NRF_QSPI_ERASE_LEN_ALL, 0); +} + +void nrfx_qspi_irq_handler(void) +{ + // Catch Event ready interrupts + if (nrf_qspi_event_check(NRF_QSPI, NRF_QSPI_EVENT_READY)) + { + m_cb.interrupt_driven = false; + nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); + m_cb.handler(NRFX_QSPI_EVENT_DONE, m_cb.p_context); + } +} + +#endif // NRFX_CHECK(NRFX_QSPI_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_rng.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_rng.c new file mode 100644 index 00000000000..a179f7ca80a --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_rng.c @@ -0,0 +1,122 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_RNG_ENABLED) + +#include + +#define NRFX_LOG_MODULE RNG +#include + +/** + * @brief Internal state of RNG driver. + */ +static nrfx_drv_state_t m_rng_state; + +/** + * @brief Pointer to handler calling from interrupt routine. + */ +static nrfx_rng_evt_handler_t m_rng_hndl; + +nrfx_err_t nrfx_rng_init(nrfx_rng_config_t const * p_config, nrfx_rng_evt_handler_t handler) +{ + NRFX_ASSERT(p_config); + NRFX_ASSERT(handler); + if (m_rng_state != NRFX_DRV_STATE_UNINITIALIZED) + { + return NRFX_ERROR_ALREADY_INITIALIZED; + } + + m_rng_hndl = handler; + + if (p_config->error_correction) + { + nrf_rng_error_correction_enable(); + } + nrf_rng_shorts_disable(NRF_RNG_SHORT_VALRDY_STOP_MASK); + NRFX_IRQ_PRIORITY_SET(RNG_IRQn, p_config->interrupt_priority); + NRFX_IRQ_ENABLE(RNG_IRQn); + + m_rng_state = NRFX_DRV_STATE_INITIALIZED; + + return NRFX_SUCCESS; +} + +void nrfx_rng_start(void) +{ + NRFX_ASSERT(m_rng_state == NRFX_DRV_STATE_INITIALIZED); + nrf_rng_event_clear(NRF_RNG_EVENT_VALRDY); + nrf_rng_int_enable(NRF_RNG_INT_VALRDY_MASK); + nrf_rng_task_trigger(NRF_RNG_TASK_START); +} + +void nrfx_rng_stop(void) +{ + NRFX_ASSERT(m_rng_state == NRFX_DRV_STATE_INITIALIZED); + nrf_rng_int_disable(NRF_RNG_INT_VALRDY_MASK); + nrf_rng_task_trigger(NRF_RNG_TASK_STOP); +} + +void nrfx_rng_uninit(void) +{ + NRFX_ASSERT(m_rng_state == NRFX_DRV_STATE_INITIALIZED); + + nrf_rng_int_disable(NRF_RNG_INT_VALRDY_MASK); + nrf_rng_task_trigger(NRF_RNG_TASK_STOP); + NRFX_IRQ_DISABLE(RNG_IRQn); + + m_rng_state = NRFX_DRV_STATE_UNINITIALIZED; + NRFX_LOG_INFO("Uninitialized."); +} + +void nrfx_rng_irq_handler(void) +{ + nrf_rng_event_clear(NRF_RNG_EVENT_VALRDY); + + uint8_t rng_value = nrf_rng_random_value_get(); + + m_rng_hndl(rng_value); + + NRFX_LOG_DEBUG("Event: NRF_RNG_EVENT_VALRDY."); +} + +#endif // NRFX_CHECK(NRFX_RNG_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_rtc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_rtc.c new file mode 100644 index 00000000000..95e8605719f --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_rtc.c @@ -0,0 +1,348 @@ +/** + * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_RTC_ENABLED) + +#if !(NRFX_CHECK(NRFX_RTC0_ENABLED) || NRFX_CHECK(NRFX_RTC1_ENABLED) || \ + NRFX_CHECK(NRFX_RTC2_ENABLED)) +#error "No enabled RTC instances. Check ." +#endif + +#include + +#define NRFX_LOG_MODULE RTC +#include + +#define EVT_TO_STR(event) \ + (event == NRF_RTC_EVENT_TICK ? "NRF_RTC_EVENT_TICK" : \ + (event == NRF_RTC_EVENT_OVERFLOW ? "NRF_RTC_EVENT_OVERFLOW" : \ + (event == NRF_RTC_EVENT_COMPARE_0 ? "NRF_RTC_EVENT_COMPARE_0" : \ + (event == NRF_RTC_EVENT_COMPARE_1 ? "NRF_RTC_EVENT_COMPARE_1" : \ + (event == NRF_RTC_EVENT_COMPARE_2 ? "NRF_RTC_EVENT_COMPARE_2" : \ + (event == NRF_RTC_EVENT_COMPARE_3 ? "NRF_RTC_EVENT_COMPARE_3" : \ + "UNKNOWN EVENT")))))) + + +/**@brief RTC driver instance control block structure. */ +typedef struct +{ + nrfx_drv_state_t state; /**< Instance state. */ + bool reliable; /**< Reliable mode flag. */ + uint8_t tick_latency; /**< Maximum length of interrupt handler in ticks (max 7.7 ms). */ +} nrfx_rtc_cb_t; + +// User callbacks local storage. +static nrfx_rtc_handler_t m_handlers[NRFX_RTC_ENABLED_COUNT]; +static nrfx_rtc_cb_t m_cb[NRFX_RTC_ENABLED_COUNT]; + +nrfx_err_t nrfx_rtc_init(nrfx_rtc_t const * const p_instance, + nrfx_rtc_config_t const * p_config, + nrfx_rtc_handler_t handler) +{ + NRFX_ASSERT(p_config); + NRFX_ASSERT(handler); + nrfx_err_t err_code; + + m_handlers[p_instance->instance_id] = handler; + + if (m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED) + { + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + NRFX_IRQ_PRIORITY_SET(p_instance->irq, p_config->interrupt_priority); + NRFX_IRQ_ENABLE(p_instance->irq); + nrf_rtc_prescaler_set(p_instance->p_reg, p_config->prescaler); + m_cb[p_instance->instance_id].reliable = p_config->reliable; + m_cb[p_instance->instance_id].tick_latency = p_config->tick_latency; + m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_INITIALIZED; + + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +void nrfx_rtc_uninit(nrfx_rtc_t const * const p_instance) +{ + uint32_t mask = NRF_RTC_INT_TICK_MASK | + NRF_RTC_INT_OVERFLOW_MASK | + NRF_RTC_INT_COMPARE0_MASK | + NRF_RTC_INT_COMPARE1_MASK | + NRF_RTC_INT_COMPARE2_MASK | + NRF_RTC_INT_COMPARE3_MASK; + NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); + + NRFX_IRQ_DISABLE(p_instance->irq); + + nrf_rtc_task_trigger(p_instance->p_reg, NRF_RTC_TASK_STOP); + nrf_rtc_event_disable(p_instance->p_reg, mask); + nrf_rtc_int_disable(p_instance->p_reg, mask); + + m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_UNINITIALIZED; + NRFX_LOG_INFO("Uninitialized."); +} + +void nrfx_rtc_enable(nrfx_rtc_t const * const p_instance) +{ + NRFX_ASSERT(m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_INITIALIZED); + + nrf_rtc_task_trigger(p_instance->p_reg, NRF_RTC_TASK_START); + m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_POWERED_ON; + NRFX_LOG_INFO("Enabled."); +} + +void nrfx_rtc_disable(nrfx_rtc_t const * const p_instance) +{ + NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); + + nrf_rtc_task_trigger(p_instance->p_reg, NRF_RTC_TASK_STOP); + m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_INITIALIZED; + NRFX_LOG_INFO("Disabled."); +} + +nrfx_err_t nrfx_rtc_cc_disable(nrfx_rtc_t const * const p_instance, uint32_t channel) +{ + NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); + NRFX_ASSERT(channelcc_channel_count); + + nrfx_err_t err_code; + uint32_t int_mask = RTC_CHANNEL_INT_MASK(channel); + nrf_rtc_event_t event = RTC_CHANNEL_EVENT_ADDR(channel); + + nrf_rtc_event_disable(p_instance->p_reg,int_mask); + if (nrf_rtc_int_is_enabled(p_instance->p_reg,int_mask)) + { + nrf_rtc_int_disable(p_instance->p_reg,int_mask); + if (nrf_rtc_event_pending(p_instance->p_reg,event)) + { + nrf_rtc_event_clear(p_instance->p_reg,event); + err_code = NRFX_ERROR_TIMEOUT; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + } + NRFX_LOG_INFO("RTC id: %d, channel disabled: %lu.", p_instance->instance_id, channel); + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +nrfx_err_t nrfx_rtc_cc_set(nrfx_rtc_t const * const p_instance, + uint32_t channel, + uint32_t val, + bool enable_irq) +{ + NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); + NRFX_ASSERT(channelcc_channel_count); + + nrfx_err_t err_code; + uint32_t int_mask = RTC_CHANNEL_INT_MASK(channel); + nrf_rtc_event_t event = RTC_CHANNEL_EVENT_ADDR(channel); + + nrf_rtc_event_disable(p_instance->p_reg, int_mask); + nrf_rtc_int_disable(p_instance->p_reg, int_mask); + + val = RTC_WRAP(val); + if (m_cb[p_instance->instance_id].reliable) + { + nrf_rtc_cc_set(p_instance->p_reg,channel,val); + uint32_t cnt = nrf_rtc_counter_get(p_instance->p_reg); + int32_t diff = cnt - val; + if (cnt < val) + { + diff += RTC_COUNTER_COUNTER_Msk; + } + if (diff < m_cb[p_instance->instance_id].tick_latency) + { + err_code = NRFX_ERROR_TIMEOUT; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + } + else + { + nrf_rtc_cc_set(p_instance->p_reg,channel,val); + } + + if (enable_irq) + { + nrf_rtc_event_clear(p_instance->p_reg,event); + nrf_rtc_int_enable(p_instance->p_reg, int_mask); + } + nrf_rtc_event_enable(p_instance->p_reg,int_mask); + + NRFX_LOG_INFO("RTC id: %d, channel enabled: %lu, compare value: %lu.", + p_instance->instance_id, + channel, + val); + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +void nrfx_rtc_tick_enable(nrfx_rtc_t const * const p_instance, bool enable_irq) +{ + nrf_rtc_event_t event = NRF_RTC_EVENT_TICK; + uint32_t mask = NRF_RTC_INT_TICK_MASK; + + nrf_rtc_event_clear(p_instance->p_reg, event); + nrf_rtc_event_enable(p_instance->p_reg, mask); + if (enable_irq) + { + nrf_rtc_int_enable(p_instance->p_reg, mask); + } + NRFX_LOG_INFO("Tick events enabled."); +} + +void nrfx_rtc_tick_disable(nrfx_rtc_t const * const p_instance) +{ + uint32_t mask = NRF_RTC_INT_TICK_MASK; + + nrf_rtc_event_disable(p_instance->p_reg, mask); + nrf_rtc_int_disable(p_instance->p_reg, mask); + NRFX_LOG_INFO("Tick events disabled."); +} + +void nrfx_rtc_overflow_enable(nrfx_rtc_t const * const p_instance, bool enable_irq) +{ + nrf_rtc_event_t event = NRF_RTC_EVENT_OVERFLOW; + uint32_t mask = NRF_RTC_INT_OVERFLOW_MASK; + + nrf_rtc_event_clear(p_instance->p_reg, event); + nrf_rtc_event_enable(p_instance->p_reg, mask); + if (enable_irq) + { + nrf_rtc_int_enable(p_instance->p_reg, mask); + } +} + +void nrfx_rtc_overflow_disable(nrfx_rtc_t const * const p_instance) +{ + uint32_t mask = NRF_RTC_INT_OVERFLOW_MASK; + nrf_rtc_event_disable(p_instance->p_reg, mask); + nrf_rtc_int_disable(p_instance->p_reg, mask); +} + +uint32_t nrfx_rtc_max_ticks_get(nrfx_rtc_t const * const p_instance) +{ + uint32_t ticks; + if (m_cb[p_instance->instance_id].reliable) + { + ticks = RTC_COUNTER_COUNTER_Msk - m_cb[p_instance->instance_id].tick_latency; + } + else + { + ticks = RTC_COUNTER_COUNTER_Msk; + } + return ticks; +} + +static void irq_handler(NRF_RTC_Type * p_reg, + uint32_t instance_id, + uint32_t channel_count) +{ + uint32_t i; + uint32_t int_mask = (uint32_t)NRF_RTC_INT_COMPARE0_MASK; + nrf_rtc_event_t event = NRF_RTC_EVENT_COMPARE_0; + + for (i = 0; i < channel_count; i++) + { + if (nrf_rtc_int_is_enabled(p_reg,int_mask) && nrf_rtc_event_pending(p_reg,event)) + { + nrf_rtc_event_disable(p_reg,int_mask); + nrf_rtc_int_disable(p_reg,int_mask); + nrf_rtc_event_clear(p_reg,event); + NRFX_LOG_DEBUG("Event: %s, instance id: %lu.", EVT_TO_STR(event), instance_id); + m_handlers[instance_id]((nrfx_rtc_int_type_t)i); + } + int_mask <<= 1; + event = (nrf_rtc_event_t)((uint32_t)event + sizeof(uint32_t)); + } + event = NRF_RTC_EVENT_TICK; + if (nrf_rtc_int_is_enabled(p_reg,NRF_RTC_INT_TICK_MASK) && + nrf_rtc_event_pending(p_reg, event)) + { + nrf_rtc_event_clear(p_reg, event); + NRFX_LOG_DEBUG("Event: %s, instance id: %lu.", EVT_TO_STR(event), instance_id); + m_handlers[instance_id](NRFX_RTC_INT_TICK); + } + + event = NRF_RTC_EVENT_OVERFLOW; + if (nrf_rtc_int_is_enabled(p_reg,NRF_RTC_INT_OVERFLOW_MASK) && + nrf_rtc_event_pending(p_reg, event)) + { + nrf_rtc_event_clear(p_reg,event); + NRFX_LOG_DEBUG("Event: %s, instance id: %lu.", EVT_TO_STR(event), instance_id); + m_handlers[instance_id](NRFX_RTC_INT_OVERFLOW); + } +} + +#if NRFX_CHECK(NRFX_RTC0_ENABLED) +void nrfx_rtc_0_irq_handler(void) +{ + irq_handler(NRF_RTC0, NRFX_RTC0_INST_IDX, NRF_RTC_CC_CHANNEL_COUNT(0)); +} +#endif + +#if NRFX_CHECK(NRFX_RTC1_ENABLED) +void nrfx_rtc_1_irq_handler(void) +{ + irq_handler(NRF_RTC1, NRFX_RTC1_INST_IDX, NRF_RTC_CC_CHANNEL_COUNT(1)); +} +#endif + +#if NRFX_CHECK(NRFX_RTC2_ENABLED) +void nrfx_rtc_2_irq_handler(void) +{ + irq_handler(NRF_RTC2, NRFX_RTC2_INST_IDX, NRF_RTC_CC_CHANNEL_COUNT(2)); +} +#endif + +#endif // NRFX_CHECK(NRFX_RTC_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_saadc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_saadc.c new file mode 100644 index 00000000000..4ab34095696 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_saadc.c @@ -0,0 +1,639 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include + +#if NRFX_CHECK(NRFX_SAADC_ENABLED) +#include + +#define NRFX_LOG_MODULE SAADC +#include + +#define EVT_TO_STR(event) \ + (event == NRF_SAADC_EVENT_STARTED ? "NRF_SAADC_EVENT_STARTED" : \ + (event == NRF_SAADC_EVENT_END ? "NRF_SAADC_EVENT_END" : \ + (event == NRF_SAADC_EVENT_DONE ? "NRF_SAADC_EVENT_DONE" : \ + (event == NRF_SAADC_EVENT_RESULTDONE ? "NRF_SAADC_EVENT_RESULTDONE" : \ + (event == NRF_SAADC_EVENT_CALIBRATEDONE ? "NRF_SAADC_EVENT_CALIBRATEDONE" : \ + (event == NRF_SAADC_EVENT_STOPPED ? "NRF_SAADC_EVENT_STOPPED" : \ + "UNKNOWN EVENT")))))) + + +typedef enum +{ + NRF_SAADC_STATE_IDLE = 0, + NRF_SAADC_STATE_BUSY = 1, + NRF_SAADC_STATE_CALIBRATION = 2 +} nrf_saadc_state_t; + + +typedef struct +{ + nrf_saadc_input_t pselp; + nrf_saadc_input_t pseln; +} nrf_saadc_psel_buffer; + +/** @brief SAADC control block.*/ +typedef struct +{ + nrfx_saadc_event_handler_t event_handler; ///< Event handler function pointer. + volatile nrf_saadc_value_t * p_buffer; ///< Sample buffer. + volatile uint16_t buffer_size; ///< Size of the sample buffer. + volatile nrf_saadc_value_t * p_secondary_buffer; ///< Secondary sample buffer. + volatile nrf_saadc_state_t adc_state; ///< State of the SAADC. + uint32_t limits_enabled_flags; ///< Enabled limits flags. + uint16_t secondary_buffer_size; ///< Size of the secondary buffer. + uint16_t buffer_size_left; ///< When low power mode is active indicates how many samples left to convert on current buffer. + nrf_saadc_psel_buffer psel[NRF_SAADC_CHANNEL_COUNT]; ///< Pin configurations of SAADC channels. + nrfx_drv_state_t state; ///< Driver initialization state. + uint8_t active_channels; ///< Number of enabled SAADC channels. + bool low_power_mode; ///< Indicates if low power mode is active. + bool conversions_end; ///< When low power mode is active indicates end of conversions on current buffer. +} nrfx_saadc_cb_t; + +static nrfx_saadc_cb_t m_cb; + +#define LOW_LIMIT_TO_FLAG(channel) ((2 * channel + 1)) +#define HIGH_LIMIT_TO_FLAG(channel) ((2 * channel)) +#define FLAG_IDX_TO_EVENT(idx) ((nrf_saadc_event_t)((uint32_t)NRF_SAADC_EVENT_CH0_LIMITH + \ + 4 * idx)) +#define LIMIT_EVENT_TO_CHANNEL(event) (uint8_t)(((uint32_t)event - \ + (uint32_t)NRF_SAADC_EVENT_CH0_LIMITH) / 8) +#define LIMIT_EVENT_TO_LIMIT_TYPE(event)((((uint32_t)event - (uint32_t)NRF_SAADC_EVENT_CH0_LIMITH) & 4) \ + ? NRF_SAADC_LIMIT_LOW : NRF_SAADC_LIMIT_HIGH) +#define HW_TIMEOUT 10000 + +void nrfx_saadc_irq_handler(void) +{ + if (nrf_saadc_event_check(NRF_SAADC_EVENT_END)) + { + nrf_saadc_event_clear(NRF_SAADC_EVENT_END); + NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_SAADC_EVENT_END)); + + if (!m_cb.low_power_mode || m_cb.conversions_end) + { + nrfx_saadc_evt_t evt; + evt.type = NRFX_SAADC_EVT_DONE; + evt.data.done.p_buffer = (nrf_saadc_value_t *)m_cb.p_buffer; + evt.data.done.size = m_cb.buffer_size; + + if (m_cb.p_secondary_buffer == NULL) + { + m_cb.adc_state = NRF_SAADC_STATE_IDLE; + } + else + { + m_cb.buffer_size_left = m_cb.secondary_buffer_size; + m_cb.p_buffer = m_cb.p_secondary_buffer; + m_cb.buffer_size = m_cb.secondary_buffer_size; + m_cb.p_secondary_buffer = NULL; + if (!m_cb.low_power_mode) + { + nrf_saadc_task_trigger(NRF_SAADC_TASK_START); + } + } + m_cb.event_handler(&evt); + m_cb.conversions_end = false; + } + } + if (m_cb.low_power_mode && nrf_saadc_event_check(NRF_SAADC_EVENT_STARTED)) + { + nrf_saadc_event_clear(NRF_SAADC_EVENT_STARTED); + NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_SAADC_EVENT_STARTED)); + + if (m_cb.buffer_size_left > m_cb.active_channels) + { + // More samples to convert than for single event. + m_cb.buffer_size_left -= m_cb.active_channels; + nrf_saadc_buffer_init((nrf_saadc_value_t *)&m_cb.p_buffer[m_cb.buffer_size - + m_cb.buffer_size_left], + m_cb.active_channels); + } + else if ((m_cb.buffer_size_left == m_cb.active_channels) && + + (m_cb.p_secondary_buffer != NULL)) + { + // Samples to convert for one event, prepare next buffer. + m_cb.conversions_end = true; + m_cb.buffer_size_left = 0; + nrf_saadc_buffer_init((nrf_saadc_value_t *)m_cb.p_secondary_buffer, + m_cb.active_channels); + } + else if (m_cb.buffer_size_left == m_cb.active_channels) + { + // Samples to convert for one event, but no second buffer. + m_cb.conversions_end = true; + m_cb.buffer_size_left = 0; + } + nrf_saadc_event_clear(NRF_SAADC_EVENT_END); + nrf_saadc_task_trigger(NRF_SAADC_TASK_SAMPLE); + } + if (nrf_saadc_event_check(NRF_SAADC_EVENT_CALIBRATEDONE)) + { + nrf_saadc_event_clear(NRF_SAADC_EVENT_CALIBRATEDONE); + NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_SAADC_EVENT_CALIBRATEDONE)); + m_cb.adc_state = NRF_SAADC_STATE_IDLE; + + nrfx_saadc_evt_t evt; + evt.type = NRFX_SAADC_EVT_CALIBRATEDONE; + m_cb.event_handler(&evt); + } + if (nrf_saadc_event_check(NRF_SAADC_EVENT_STOPPED)) + { + nrf_saadc_event_clear(NRF_SAADC_EVENT_STOPPED); + NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_SAADC_EVENT_STOPPED)); + m_cb.adc_state = NRF_SAADC_STATE_IDLE; + } + else + { + uint32_t limit_flags = m_cb.limits_enabled_flags; + uint32_t flag_idx; + nrf_saadc_event_t event; + + while (limit_flags) + { + flag_idx = __CLZ(limit_flags); + limit_flags &= ~((1UL << 31) >> flag_idx); + event = FLAG_IDX_TO_EVENT(flag_idx); + if (nrf_saadc_event_check(event)) + { + nrf_saadc_event_clear(event); + nrfx_saadc_evt_t evt; + evt.type = NRFX_SAADC_EVT_LIMIT; + evt.data.limit.channel = LIMIT_EVENT_TO_CHANNEL(event); + evt.data.limit.limit_type = LIMIT_EVENT_TO_LIMIT_TYPE(event); + NRFX_LOG_DEBUG("Event limit, channel: %d, limit type: %d.", + evt.data.limit.channel, + evt.data.limit.limit_type); + m_cb.event_handler(&evt); + } + } + } +} + + +nrfx_err_t nrfx_saadc_init(nrfx_saadc_config_t const * p_config, + nrfx_saadc_event_handler_t event_handler) +{ + NRFX_ASSERT(p_config); + NRFX_ASSERT(event_handler); + nrfx_err_t err_code; + + if (m_cb.state != NRFX_DRV_STATE_UNINITIALIZED) + { + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + m_cb.event_handler = event_handler; + nrf_saadc_resolution_set(p_config->resolution); + nrf_saadc_oversample_set(p_config->oversample); + m_cb.low_power_mode = p_config->low_power_mode; + m_cb.state = NRFX_DRV_STATE_INITIALIZED; + m_cb.adc_state = NRF_SAADC_STATE_IDLE; + m_cb.active_channels = 0; + m_cb.limits_enabled_flags = 0; + m_cb.conversions_end = false; + + nrf_saadc_int_disable(NRF_SAADC_INT_ALL); + nrf_saadc_event_clear(NRF_SAADC_EVENT_END); + nrf_saadc_event_clear(NRF_SAADC_EVENT_STARTED); + NRFX_IRQ_PRIORITY_SET(SAADC_IRQn, p_config->interrupt_priority); + NRFX_IRQ_ENABLE(SAADC_IRQn); + nrf_saadc_int_enable(NRF_SAADC_INT_END); + + if (m_cb.low_power_mode) + { + nrf_saadc_int_enable(NRF_SAADC_INT_STARTED); + } + + nrf_saadc_enable(); + + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + + return err_code; +} + + +void nrfx_saadc_uninit(void) +{ + NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); + + nrf_saadc_int_disable(NRF_SAADC_INT_ALL); + NRFX_IRQ_DISABLE(SAADC_IRQn); + nrf_saadc_task_trigger(NRF_SAADC_TASK_STOP); + + // Wait for ADC being stopped. + bool result; + NRFX_WAIT_FOR(nrf_saadc_event_check(NRF_SAADC_EVENT_STOPPED), HW_TIMEOUT, 0, result); + NRFX_ASSERT(result); + + nrf_saadc_disable(); + m_cb.adc_state = NRF_SAADC_STATE_IDLE; + + for (uint32_t channel = 0; channel < NRF_SAADC_CHANNEL_COUNT; ++channel) + { + if (m_cb.psel[channel].pselp != NRF_SAADC_INPUT_DISABLED) + { + nrfx_err_t err_code = nrfx_saadc_channel_uninit(channel); + NRFX_ASSERT(err_code == NRFX_SUCCESS); + } + } + + m_cb.state = NRFX_DRV_STATE_UNINITIALIZED; +} + + +nrfx_err_t nrfx_saadc_channel_init(uint8_t channel, + nrf_saadc_channel_config_t const * const p_config) +{ + NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); + NRFX_ASSERT(channel < NRF_SAADC_CHANNEL_COUNT); + // Oversampling can be used only with one channel. + NRFX_ASSERT((nrf_saadc_oversample_get() == NRF_SAADC_OVERSAMPLE_DISABLED) || + (m_cb.active_channels == 0)); + NRFX_ASSERT((p_config->pin_p <= NRF_SAADC_INPUT_VDD) && + (p_config->pin_p > NRF_SAADC_INPUT_DISABLED)); + NRFX_ASSERT(p_config->pin_n <= NRF_SAADC_INPUT_VDD); + + nrfx_err_t err_code; + + // A channel can only be initialized if the driver is in the idle state. + if (m_cb.adc_state != NRF_SAADC_STATE_IDLE) + { + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + +#ifdef NRF52_PAN_74 + if ((p_config->acq_time == NRF_SAADC_ACQTIME_3US) || + (p_config->acq_time == NRF_SAADC_ACQTIME_5US)) + { + nrf_saadc_disable(); + } +#endif //NRF52_PAN_74 + + if (m_cb.psel[channel].pselp == NRF_SAADC_INPUT_DISABLED) + { + ++m_cb.active_channels; + } + m_cb.psel[channel].pselp = p_config->pin_p; + m_cb.psel[channel].pseln = p_config->pin_n; + nrf_saadc_channel_init(channel, p_config); + nrf_saadc_channel_input_set(channel, p_config->pin_p, p_config->pin_n); + +#ifdef NRF52_PAN_74 + if ((p_config->acq_time == NRF_SAADC_ACQTIME_3US) || + (p_config->acq_time == NRF_SAADC_ACQTIME_5US)) + { + nrf_saadc_enable(); + } +#endif //NRF52_PAN_74 + + NRFX_LOG_INFO("Channel initialized: %d.", channel); + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + + +nrfx_err_t nrfx_saadc_channel_uninit(uint8_t channel) +{ + NRFX_ASSERT(channel < NRF_SAADC_CHANNEL_COUNT); + NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); + + nrfx_err_t err_code; + + // A channel can only be uninitialized if the driver is in the idle state. + if (m_cb.adc_state != NRF_SAADC_STATE_IDLE) + { + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + if (m_cb.psel[channel].pselp != NRF_SAADC_INPUT_DISABLED) + { + --m_cb.active_channels; + } + m_cb.psel[channel].pselp = NRF_SAADC_INPUT_DISABLED; + m_cb.psel[channel].pseln = NRF_SAADC_INPUT_DISABLED; + nrf_saadc_channel_input_set(channel, NRF_SAADC_INPUT_DISABLED, NRF_SAADC_INPUT_DISABLED); + nrfx_saadc_limits_set(channel, NRFX_SAADC_LIMITL_DISABLED, NRFX_SAADC_LIMITH_DISABLED); + NRFX_LOG_INFO("Channel denitialized: %d.", channel); + + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + + +uint32_t nrfx_saadc_sample_task_get(void) +{ + return nrf_saadc_task_address_get( + m_cb.low_power_mode ? NRF_SAADC_TASK_START : NRF_SAADC_TASK_SAMPLE); +} + + +nrfx_err_t nrfx_saadc_sample_convert(uint8_t channel, nrf_saadc_value_t * p_value) +{ + nrfx_err_t err_code; + + if (m_cb.adc_state != NRF_SAADC_STATE_IDLE) + { + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + m_cb.adc_state = NRF_SAADC_STATE_BUSY; + nrf_saadc_int_disable(NRF_SAADC_INT_STARTED | NRF_SAADC_INT_END); + nrf_saadc_buffer_init(p_value, 1); + if (m_cb.active_channels > 1) + { + for (uint32_t i = 0; i < NRF_SAADC_CHANNEL_COUNT; ++i) + { + nrf_saadc_channel_input_set(i, NRF_SAADC_INPUT_DISABLED, NRF_SAADC_INPUT_DISABLED); + } + } + nrf_saadc_channel_input_set(channel, m_cb.psel[channel].pselp, m_cb.psel[channel].pseln); + nrf_saadc_task_trigger(NRF_SAADC_TASK_START); + nrf_saadc_task_trigger(NRF_SAADC_TASK_SAMPLE); + + bool result; + NRFX_WAIT_FOR(nrf_saadc_event_check(NRF_SAADC_EVENT_END), HW_TIMEOUT, 0, result); + NRFX_ASSERT(result); + + nrf_saadc_event_clear(NRF_SAADC_EVENT_STARTED); + nrf_saadc_event_clear(NRF_SAADC_EVENT_END); + + NRFX_LOG_INFO("Conversion value: %d, channel %d.", *p_value, channel); + + if (m_cb.active_channels > 1) + { + for (uint32_t i = 0; i < NRF_SAADC_CHANNEL_COUNT; ++i) + { + nrf_saadc_channel_input_set(i, m_cb.psel[i].pselp, m_cb.psel[i].pseln); + } + } + + if (m_cb.low_power_mode) + { + nrf_saadc_int_enable(NRF_SAADC_INT_STARTED | NRF_SAADC_INT_END); + } + else + { + nrf_saadc_int_enable(NRF_SAADC_INT_END); + } + + m_cb.adc_state = NRF_SAADC_STATE_IDLE; + + err_code = NRFX_SUCCESS; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + + +nrfx_err_t nrfx_saadc_buffer_convert(nrf_saadc_value_t * p_buffer, uint16_t size) +{ + NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); + NRFX_ASSERT((size % m_cb.active_channels) == 0); + nrfx_err_t err_code; + + nrf_saadc_int_disable(NRF_SAADC_INT_END | NRF_SAADC_INT_CALIBRATEDONE); + if (m_cb.adc_state == NRF_SAADC_STATE_CALIBRATION) + { + nrf_saadc_int_enable(NRF_SAADC_INT_END | NRF_SAADC_INT_CALIBRATEDONE); + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + if (m_cb.adc_state == NRF_SAADC_STATE_BUSY) + { + if ( m_cb.p_secondary_buffer) + { + nrf_saadc_int_enable(NRF_SAADC_INT_END); + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + else + { + m_cb.p_secondary_buffer = p_buffer; + m_cb.secondary_buffer_size = size; + if (!m_cb.low_power_mode) + { + while (nrf_saadc_event_check(NRF_SAADC_EVENT_STARTED) == 0); + nrf_saadc_event_clear(NRF_SAADC_EVENT_STARTED); + nrf_saadc_buffer_init(p_buffer, size); + } + nrf_saadc_int_enable(NRF_SAADC_INT_END); + err_code = NRFX_SUCCESS; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + } + nrf_saadc_int_enable(NRF_SAADC_INT_END); + m_cb.adc_state = NRF_SAADC_STATE_BUSY; + + m_cb.p_buffer = p_buffer; + m_cb.buffer_size = size; + m_cb.p_secondary_buffer = NULL; + + NRFX_LOG_INFO("Function: %s, buffer length: %d, active channels: %d.", + __func__, + size, + m_cb.active_channels); + + if (m_cb.low_power_mode) + { + m_cb.buffer_size_left = size; + nrf_saadc_buffer_init(p_buffer, m_cb.active_channels); + } + else + { + nrf_saadc_buffer_init(p_buffer, size); + nrf_saadc_event_clear(NRF_SAADC_EVENT_STARTED); + nrf_saadc_task_trigger(NRF_SAADC_TASK_START); + } + + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + + +nrfx_err_t nrfx_saadc_sample() +{ + NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); + + nrfx_err_t err_code = NRFX_SUCCESS; + if (m_cb.adc_state != NRF_SAADC_STATE_BUSY) + { + err_code = NRFX_ERROR_INVALID_STATE; + } + else if (m_cb.low_power_mode) + { + nrf_saadc_task_trigger(NRF_SAADC_TASK_START); + } + else + { + nrf_saadc_task_trigger(NRF_SAADC_TASK_SAMPLE); + } + + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + + +nrfx_err_t nrfx_saadc_calibrate_offset() +{ + NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); + + nrfx_err_t err_code; + + if (m_cb.adc_state != NRF_SAADC_STATE_IDLE) + { + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + m_cb.adc_state = NRF_SAADC_STATE_CALIBRATION; + + nrf_saadc_event_clear(NRF_SAADC_EVENT_CALIBRATEDONE); + nrf_saadc_int_enable(NRF_SAADC_INT_CALIBRATEDONE); + nrf_saadc_task_trigger(NRF_SAADC_TASK_CALIBRATEOFFSET); + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + + +bool nrfx_saadc_is_busy(void) +{ + return (m_cb.adc_state != NRF_SAADC_STATE_IDLE); +} + + +void nrfx_saadc_abort(void) +{ + if (nrfx_saadc_is_busy()) + { + nrf_saadc_event_clear(NRF_SAADC_EVENT_STOPPED); + nrf_saadc_int_enable(NRF_SAADC_INT_STOPPED); + nrf_saadc_task_trigger(NRF_SAADC_TASK_STOP); + + if (m_cb.adc_state == NRF_SAADC_STATE_CALIBRATION) + { + m_cb.adc_state = NRF_SAADC_STATE_IDLE; + } + else + { + // Wait for ADC being stopped. + bool result; + NRFX_WAIT_FOR((m_cb.adc_state != NRF_SAADC_STATE_IDLE), HW_TIMEOUT, 0, result); + NRFX_ASSERT(result); + } + + nrf_saadc_int_disable(NRF_SAADC_INT_STOPPED); + + m_cb.p_buffer = 0; + m_cb.p_secondary_buffer = 0; + NRFX_LOG_INFO("Conversion aborted."); + } +} + + +void nrfx_saadc_limits_set(uint8_t channel, int16_t limit_low, int16_t limit_high) +{ + NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); + NRFX_ASSERT(m_cb.event_handler); // only non blocking mode supported + NRFX_ASSERT(limit_low >= NRFX_SAADC_LIMITL_DISABLED); + NRFX_ASSERT(limit_high <= NRFX_SAADC_LIMITH_DISABLED); + NRFX_ASSERT(limit_low < limit_high); + nrf_saadc_channel_limits_set(channel, limit_low, limit_high); + + uint32_t int_mask = nrf_saadc_limit_int_get(channel, NRF_SAADC_LIMIT_LOW); + if (limit_low == NRFX_SAADC_LIMITL_DISABLED) + { + m_cb.limits_enabled_flags &= ~(0x80000000 >> LOW_LIMIT_TO_FLAG(channel)); + nrf_saadc_int_disable(int_mask); + } + else + { + m_cb.limits_enabled_flags |= (0x80000000 >> LOW_LIMIT_TO_FLAG(channel)); + nrf_saadc_int_enable(int_mask); + } + + int_mask = nrf_saadc_limit_int_get(channel, NRF_SAADC_LIMIT_HIGH); + if (limit_high == NRFX_SAADC_LIMITH_DISABLED) + { + m_cb.limits_enabled_flags &= ~(0x80000000 >> HIGH_LIMIT_TO_FLAG(channel)); + nrf_saadc_int_disable(int_mask); + } + else + { + m_cb.limits_enabled_flags |= (0x80000000 >> HIGH_LIMIT_TO_FLAG(channel)); + nrf_saadc_int_enable(int_mask); + } +} +#endif // NRFX_CHECK(NRFX_SAADC_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_spi.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_spi.c new file mode 100644 index 00000000000..2c6bb44c2cf --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_spi.c @@ -0,0 +1,441 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_SPI_ENABLED) + +#if !(NRFX_CHECK(NRFX_SPI0_ENABLED) || NRFX_CHECK(NRFX_SPI1_ENABLED) || \ + NRFX_CHECK(NRFX_SPI2_ENABLED)) +#error "No enabled SPI instances. Check ." +#endif + +#include +#include "prs/nrfx_prs.h" +#include + +#define NRFX_LOG_MODULE SPI +#include + +// Control block - driver instance local data. +typedef struct +{ + nrfx_spi_evt_handler_t handler; + void * p_context; + nrfx_spi_evt_t evt; // Keep the struct that is ready for event handler. Less memcpy. + nrfx_drv_state_t state; + volatile bool transfer_in_progress; + + // [no need for 'volatile' attribute for the following members, as they + // are not concurrently used in IRQ handlers and main line code] + uint8_t ss_pin; + uint8_t miso_pin; + uint8_t orc; + size_t bytes_transferred; + + bool abort; +} spi_control_block_t; +static spi_control_block_t m_cb[NRFX_SPI_ENABLED_COUNT]; + + +nrfx_err_t nrfx_spi_init(nrfx_spi_t const * const p_instance, + nrfx_spi_config_t const * p_config, + nrfx_spi_evt_handler_t handler, + void * p_context) +{ + NRFX_ASSERT(p_config); + spi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + nrfx_err_t err_code; + + if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) + { + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + +#if NRFX_CHECK(NRFX_PRS_ENABLED) + static nrfx_irq_handler_t const irq_handlers[NRFX_SPI_ENABLED_COUNT] = { + #if NRFX_CHECK(NRFX_SPI0_ENABLED) + nrfx_spi_0_irq_handler, + #endif + #if NRFX_CHECK(NRFX_SPI1_ENABLED) + nrfx_spi_1_irq_handler, + #endif + #if NRFX_CHECK(NRFX_SPI2_ENABLED) + nrfx_spi_2_irq_handler, + #endif + }; + if (nrfx_prs_acquire(p_instance->p_reg, + irq_handlers[p_instance->drv_inst_idx]) != NRFX_SUCCESS) + { + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } +#endif // NRFX_CHECK(NRFX_PRS_ENABLED) + + p_cb->handler = handler; + p_cb->p_context = p_context; + + uint32_t mosi_pin; + uint32_t miso_pin; + // Configure pins used by the peripheral: + // - SCK - output with initial value corresponding with the SPI mode used: + // 0 - for modes 0 and 1 (CPOL = 0), 1 - for modes 2 and 3 (CPOL = 1); + // according to the reference manual guidelines this pin and its input + // buffer must always be connected for the SPI to work. + if (p_config->mode <= NRF_SPI_MODE_1) + { + nrf_gpio_pin_clear(p_config->sck_pin); + } + else + { + nrf_gpio_pin_set(p_config->sck_pin); + } + nrf_gpio_cfg(p_config->sck_pin, + NRF_GPIO_PIN_DIR_OUTPUT, + NRF_GPIO_PIN_INPUT_CONNECT, + NRF_GPIO_PIN_NOPULL, + NRF_GPIO_PIN_S0S1, + NRF_GPIO_PIN_NOSENSE); + // - MOSI (optional) - output with initial value 0, + if (p_config->mosi_pin != NRFX_SPI_PIN_NOT_USED) + { + mosi_pin = p_config->mosi_pin; + nrf_gpio_pin_clear(mosi_pin); + nrf_gpio_cfg_output(mosi_pin); + } + else + { + mosi_pin = NRF_SPI_PIN_NOT_CONNECTED; + } + // - MISO (optional) - input, + if (p_config->miso_pin != NRFX_SPI_PIN_NOT_USED) + { + miso_pin = p_config->miso_pin; + nrf_gpio_cfg_input(miso_pin, (nrf_gpio_pin_pull_t)NRFX_SPI_MISO_PULL_CFG); + } + else + { + miso_pin = NRF_SPI_PIN_NOT_CONNECTED; + } + m_cb[p_instance->drv_inst_idx].miso_pin = p_config->miso_pin; + // - Slave Select (optional) - output with initial value 1 (inactive). + if (p_config->ss_pin != NRFX_SPI_PIN_NOT_USED) + { + nrf_gpio_pin_set(p_config->ss_pin); + nrf_gpio_cfg_output(p_config->ss_pin); + } + m_cb[p_instance->drv_inst_idx].ss_pin = p_config->ss_pin; + + NRF_SPI_Type * p_spi = p_instance->p_reg; + nrf_spi_pins_set(p_spi, p_config->sck_pin, mosi_pin, miso_pin); + nrf_spi_frequency_set(p_spi, p_config->frequency); + nrf_spi_configure(p_spi, p_config->mode, p_config->bit_order); + + m_cb[p_instance->drv_inst_idx].orc = p_config->orc; + + if (p_cb->handler) + { + nrf_spi_int_enable(p_spi, NRF_SPI_INT_READY_MASK); + } + + nrf_spi_enable(p_spi); + + if (p_cb->handler) + { + NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(p_instance->p_reg), + p_config->irq_priority); + NRFX_IRQ_ENABLE(nrfx_get_irq_number(p_instance->p_reg)); + } + + p_cb->transfer_in_progress = false; + p_cb->state = NRFX_DRV_STATE_INITIALIZED; + + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +void nrfx_spi_uninit(nrfx_spi_t const * const p_instance) +{ + spi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + + if (p_cb->handler) + { + NRFX_IRQ_DISABLE(nrfx_get_irq_number(p_instance->p_reg)); + } + + NRF_SPI_Type * p_spi = p_instance->p_reg; + if (p_cb->handler) + { + nrf_spi_int_disable(p_spi, NRF_SPI_ALL_INTS_MASK); + } + + if (p_cb->miso_pin != NRFX_SPI_PIN_NOT_USED) + { + nrf_gpio_cfg_default(p_cb->miso_pin); + } + nrf_spi_disable(p_spi); + +#if NRFX_CHECK(NRFX_PRS_ENABLED) + nrfx_prs_release(p_instance->p_reg); +#endif + + p_cb->state = NRFX_DRV_STATE_UNINITIALIZED; +} + +static void finish_transfer(spi_control_block_t * p_cb) +{ + // If Slave Select signal is used, this is the time to deactivate it. + if (p_cb->ss_pin != NRFX_SPI_PIN_NOT_USED) + { + nrf_gpio_pin_set(p_cb->ss_pin); + } + + // By clearing this flag before calling the handler we allow subsequent + // transfers to be started directly from the handler function. + p_cb->transfer_in_progress = false; + + p_cb->evt.type = NRFX_SPI_EVENT_DONE; + p_cb->handler(&p_cb->evt, p_cb->p_context); +} + +// This function is called from the IRQ handler or, in blocking mode, directly +// from the 'spi_xfer' function. +// It returns true as long as the transfer should be continued, otherwise (when +// there is nothing more to send/receive) it returns false. +static bool transfer_byte(NRF_SPI_Type * p_spi, spi_control_block_t * p_cb) +{ + // Read the data byte received in this transfer (always, because no further + // READY event can be generated until the current byte is read out from the + // RXD register), and store it in the RX buffer (only when needed). + volatile uint8_t rx_data = nrf_spi_rxd_get(p_spi); + if (p_cb->bytes_transferred < p_cb->evt.xfer_desc.rx_length) + { + p_cb->evt.xfer_desc.p_rx_buffer[p_cb->bytes_transferred] = rx_data; + } + + ++p_cb->bytes_transferred; + + // Check if there are more bytes to send or receive and write proper data + // byte (next one from TX buffer or over-run character) to the TXD register + // when needed. + // NOTE - we've already used 'p_cb->bytes_transferred + 1' bytes from our + // buffers, because we take advantage of double buffering of TXD + // register (so in effect one byte is still being transmitted now); + // see how the transfer is started in the 'spi_xfer' function. + size_t bytes_used = p_cb->bytes_transferred + 1; + + if (p_cb->abort) + { + if (bytes_used < p_cb->evt.xfer_desc.tx_length) + { + p_cb->evt.xfer_desc.tx_length = bytes_used; + } + if (bytes_used < p_cb->evt.xfer_desc.rx_length) + { + p_cb->evt.xfer_desc.rx_length = bytes_used; + } + } + + if (bytes_used < p_cb->evt.xfer_desc.tx_length) + { + nrf_spi_txd_set(p_spi, p_cb->evt.xfer_desc.p_tx_buffer[bytes_used]); + return true; + } + else if (bytes_used < p_cb->evt.xfer_desc.rx_length) + { + nrf_spi_txd_set(p_spi, p_cb->orc); + return true; + } + + return (p_cb->bytes_transferred < p_cb->evt.xfer_desc.tx_length || + p_cb->bytes_transferred < p_cb->evt.xfer_desc.rx_length); +} + +static void spi_xfer(NRF_SPI_Type * p_spi, + spi_control_block_t * p_cb, + nrfx_spi_xfer_desc_t const * p_xfer_desc) +{ + p_cb->bytes_transferred = 0; + nrf_spi_int_disable(p_spi, NRF_SPI_INT_READY_MASK); + + nrf_spi_event_clear(p_spi, NRF_SPI_EVENT_READY); + + // Start the transfer by writing some byte to the TXD register; + // if TX buffer is not empty, take the first byte from this buffer, + // otherwise - use over-run character. + nrf_spi_txd_set(p_spi, + (p_xfer_desc->tx_length > 0 ? p_xfer_desc->p_tx_buffer[0] : p_cb->orc)); + + // TXD register is double buffered, so next byte to be transmitted can + // be written immediately, if needed, i.e. if TX or RX transfer is to + // be more that 1 byte long. Again - if there is something more in TX + // buffer send it, otherwise use over-run character. + if (p_xfer_desc->tx_length > 1) + { + nrf_spi_txd_set(p_spi, p_xfer_desc->p_tx_buffer[1]); + } + else if (p_xfer_desc->rx_length > 1) + { + nrf_spi_txd_set(p_spi, p_cb->orc); + } + + // For blocking mode (user handler not provided) wait here for READY + // events (indicating that the byte from TXD register was transmitted + // and a new incoming byte was moved to the RXD register) and continue + // transaction until all requested bytes are transferred. + // In non-blocking mode - IRQ service routine will do this stuff. + if (p_cb->handler) + { + nrf_spi_int_enable(p_spi, NRF_SPI_INT_READY_MASK); + } + else + { + do { + while (!nrf_spi_event_check(p_spi, NRF_SPI_EVENT_READY)) {} + nrf_spi_event_clear(p_spi, NRF_SPI_EVENT_READY); + NRFX_LOG_DEBUG("SPI: Event: NRF_SPI_EVENT_READY."); + } while (transfer_byte(p_spi, p_cb)); + if (p_cb->ss_pin != NRFX_SPI_PIN_NOT_USED) + { + nrf_gpio_pin_set(p_cb->ss_pin); + } + } +} + +nrfx_err_t nrfx_spi_xfer(nrfx_spi_t const * const p_instance, + nrfx_spi_xfer_desc_t const * p_xfer_desc, + uint32_t flags) +{ + spi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + NRFX_ASSERT(p_xfer_desc->p_tx_buffer != NULL || p_xfer_desc->tx_length == 0); + NRFX_ASSERT(p_xfer_desc->p_rx_buffer != NULL || p_xfer_desc->rx_length == 0); + + nrfx_err_t err_code = NRFX_SUCCESS; + + if (p_cb->transfer_in_progress) + { + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + else + { + if (p_cb->handler) + { + p_cb->transfer_in_progress = true; + } + } + + p_cb->evt.xfer_desc = *p_xfer_desc; + p_cb->abort = false; + + if (p_cb->ss_pin != NRFX_SPI_PIN_NOT_USED) + { + nrf_gpio_pin_clear(p_cb->ss_pin); + } + if (flags) + { + p_cb->transfer_in_progress = false; + err_code = NRFX_ERROR_NOT_SUPPORTED; + } + else + { + spi_xfer(p_instance->p_reg, p_cb, p_xfer_desc); + } + NRFX_LOG_INFO("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +void nrfx_spi_abort(nrfx_spi_t const * p_instance) +{ + spi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + p_cb->abort = true; +} + +static void irq_handler(NRF_SPI_Type * p_spi, spi_control_block_t * p_cb) +{ + NRFX_ASSERT(p_cb->handler); + + nrf_spi_event_clear(p_spi, NRF_SPI_EVENT_READY); + NRFX_LOG_DEBUG("Event: NRF_SPI_EVENT_READY."); + + if (!transfer_byte(p_spi, p_cb)) + { + finish_transfer(p_cb); + } +} + +#if NRFX_CHECK(NRFX_SPI0_ENABLED) +void nrfx_spi_0_irq_handler(void) +{ + irq_handler(NRF_SPI0, &m_cb[NRFX_SPI0_INST_IDX]); +} +#endif + +#if NRFX_CHECK(NRFX_SPI1_ENABLED) +void nrfx_spi_1_irq_handler(void) +{ + irq_handler(NRF_SPI1, &m_cb[NRFX_SPI1_INST_IDX]); +} +#endif + +#if NRFX_CHECK(NRFX_SPI2_ENABLED) +void nrfx_spi_2_irq_handler(void) +{ + irq_handler(NRF_SPI2, &m_cb[NRFX_SPI2_INST_IDX]); +} +#endif + +#endif // NRFX_CHECK(NRFX_SPI_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_spim.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_spim.c new file mode 100644 index 00000000000..cf16e26bc2c --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_spim.c @@ -0,0 +1,688 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_SPIM_ENABLED) + +#if !(NRFX_CHECK(NRFX_SPIM0_ENABLED) || NRFX_CHECK(NRFX_SPIM1_ENABLED) || \ + NRFX_CHECK(NRFX_SPIM2_ENABLED) || NRFX_CHECK(NRFX_SPIM3_ENABLED)) +#error "No enabled SPIM instances. Check ." +#endif + +#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) && !NRFX_CHECK(NRFX_SPIM3_ENABLED) +#error "Extended options are available only in SPIM3 on the nRF52840 SoC." +#endif + +#include +#include "prs/nrfx_prs.h" +#include + +#define NRFX_LOG_MODULE SPIM +#include + +#define SPIMX_LENGTH_VALIDATE(peripheral, drv_inst_idx, rx_len, tx_len) \ + (((drv_inst_idx) == NRFX_CONCAT_3(NRFX_, peripheral, _INST_IDX)) && \ + NRFX_EASYDMA_LENGTH_VALIDATE(peripheral, rx_len, tx_len)) + +#if NRFX_CHECK(NRFX_SPIM0_ENABLED) +#define SPIM0_LENGTH_VALIDATE(...) SPIMX_LENGTH_VALIDATE(SPIM0, __VA_ARGS__) +#else +#define SPIM0_LENGTH_VALIDATE(...) 0 +#endif + +#if NRFX_CHECK(NRFX_SPIM1_ENABLED) +#define SPIM1_LENGTH_VALIDATE(...) SPIMX_LENGTH_VALIDATE(SPIM1, __VA_ARGS__) +#else +#define SPIM1_LENGTH_VALIDATE(...) 0 +#endif + +#if NRFX_CHECK(NRFX_SPIM2_ENABLED) +#define SPIM2_LENGTH_VALIDATE(...) SPIMX_LENGTH_VALIDATE(SPIM2, __VA_ARGS__) +#else +#define SPIM2_LENGTH_VALIDATE(...) 0 +#endif + +#if NRFX_CHECK(NRFX_SPIM3_ENABLED) +#define SPIM3_LENGTH_VALIDATE(...) SPIMX_LENGTH_VALIDATE(SPIM3, __VA_ARGS__) +#else +#define SPIM3_LENGTH_VALIDATE(...) 0 +#endif + +#define SPIM_LENGTH_VALIDATE(drv_inst_idx, rx_len, tx_len) \ + (SPIM0_LENGTH_VALIDATE(drv_inst_idx, rx_len, tx_len) || \ + SPIM1_LENGTH_VALIDATE(drv_inst_idx, rx_len, tx_len) || \ + SPIM2_LENGTH_VALIDATE(drv_inst_idx, rx_len, tx_len) || \ + SPIM3_LENGTH_VALIDATE(drv_inst_idx, rx_len, tx_len)) + + +// Control block - driver instance local data. +typedef struct +{ + nrfx_spim_evt_handler_t handler; + void * p_context; + nrfx_spim_evt_t evt; // Keep the struct that is ready for event handler. Less memcpy. + nrfx_drv_state_t state; + volatile bool transfer_in_progress; + +#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) + bool use_hw_ss; +#endif + + // [no need for 'volatile' attribute for the following members, as they + // are not concurrently used in IRQ handlers and main line code] + bool ss_active_high; + uint8_t ss_pin; + uint8_t miso_pin; + uint8_t orc; + +#if NRFX_CHECK(NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED) + size_t tx_length; + size_t rx_length; +#endif +} spim_control_block_t; +static spim_control_block_t m_cb[NRFX_SPIM_ENABLED_COUNT]; + +#if NRFX_CHECK(NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED) + +// Workaround for nRF52840 anomaly 198: SPIM3 transmit data might be corrupted. + +static uint32_t m_anomaly_198_preserved_value; + +static void anomaly_198_enable(uint8_t const * p_buffer, size_t buf_len) +{ + m_anomaly_198_preserved_value = *((volatile uint32_t *)0x40000E00); + + if (buf_len == 0) + { + return; + } + uint32_t buffer_end_addr = ((uint32_t)p_buffer) + buf_len; + uint32_t block_addr = ((uint32_t)p_buffer) & ~0x1FFF; + uint32_t block_flag = (1UL << ((block_addr >> 13) & 0xFFFF)); + uint32_t occupied_blocks = 0; + + if (block_addr >= 0x20010000) + { + occupied_blocks = (1UL << 8); + } + else + { + do { + occupied_blocks |= block_flag; + block_flag <<= 1; + block_addr += 0x2000; + } while ((block_addr < buffer_end_addr) && (block_addr < 0x20012000)); + } + + *((volatile uint32_t *)0x40000E00) = occupied_blocks; +} + +static void anomaly_198_disable(void) +{ + *((volatile uint32_t *)0x40000E00) = m_anomaly_198_preserved_value; +} +#endif // NRFX_CHECK(NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED) + +nrfx_err_t nrfx_spim_init(nrfx_spim_t const * const p_instance, + nrfx_spim_config_t const * p_config, + nrfx_spim_evt_handler_t handler, + void * p_context) +{ + NRFX_ASSERT(p_config); + spim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + nrfx_err_t err_code; + + if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) + { + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + +#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) + + // Currently, only SPIM3 in nRF52840 supports the extended features. Other instances must be checked. + if ((p_instance->drv_inst_idx != NRFX_SPIM3_INST_IDX) && + ((p_config->dcx_pin != NRFX_SPIM_PIN_NOT_USED) || + (p_config->frequency == NRF_SPIM_FREQ_16M) || + (p_config->frequency == NRF_SPIM_FREQ_32M) || + (p_config->rx_delay != 0x00) || + (p_config->use_hw_ss))) + { + err_code = NRFX_ERROR_NOT_SUPPORTED; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } +#endif + + NRF_SPIM_Type * p_spim = (NRF_SPIM_Type *)p_instance->p_reg; + +#if NRFX_CHECK(NRFX_PRS_ENABLED) + static nrfx_irq_handler_t const irq_handlers[NRFX_SPIM_ENABLED_COUNT] = { + #if NRFX_CHECK(NRFX_SPIM0_ENABLED) + nrfx_spim_0_irq_handler, + #endif + #if NRFX_CHECK(NRFX_SPIM1_ENABLED) + nrfx_spim_1_irq_handler, + #endif + #if NRFX_CHECK(NRFX_SPIM2_ENABLED) + nrfx_spim_2_irq_handler, + #endif + #if NRFX_CHECK(NRFX_SPIM3_ENABLED) + nrfx_spim_3_irq_handler, + #endif + }; + if (nrfx_prs_acquire(p_instance->p_reg, + irq_handlers[p_instance->drv_inst_idx]) != NRFX_SUCCESS) + { + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } +#endif // NRFX_CHECK(NRFX_PRS_ENABLED) + + p_cb->handler = handler; + p_cb->p_context = p_context; + + uint32_t mosi_pin; + uint32_t miso_pin; + // Configure pins used by the peripheral: + // - SCK - output with initial value corresponding with the SPI mode used: + // 0 - for modes 0 and 1 (CPOL = 0), 1 - for modes 2 and 3 (CPOL = 1); + // according to the reference manual guidelines this pin and its input + // buffer must always be connected for the SPI to work. + if (p_config->mode <= NRF_SPIM_MODE_1) + { + nrf_gpio_pin_clear(p_config->sck_pin); + } + else + { + nrf_gpio_pin_set(p_config->sck_pin); + } + nrf_gpio_cfg(p_config->sck_pin, + NRF_GPIO_PIN_DIR_OUTPUT, + NRF_GPIO_PIN_INPUT_CONNECT, + NRF_GPIO_PIN_NOPULL, + NRF_GPIO_PIN_S0S1, + NRF_GPIO_PIN_NOSENSE); + // - MOSI (optional) - output with initial value 0, + if (p_config->mosi_pin != NRFX_SPIM_PIN_NOT_USED) + { + mosi_pin = p_config->mosi_pin; + nrf_gpio_pin_clear(mosi_pin); + nrf_gpio_cfg_output(mosi_pin); + } + else + { + mosi_pin = NRF_SPIM_PIN_NOT_CONNECTED; + } + // - MISO (optional) - input, + if (p_config->miso_pin != NRFX_SPIM_PIN_NOT_USED) + { + miso_pin = p_config->miso_pin; + nrf_gpio_cfg_input(miso_pin, (nrf_gpio_pin_pull_t)NRFX_SPIM_MISO_PULL_CFG); + } + else + { + miso_pin = NRF_SPIM_PIN_NOT_CONNECTED; + } + m_cb[p_instance->drv_inst_idx].miso_pin = p_config->miso_pin; + // - Slave Select (optional) - output with initial value 1 (inactive). + if (p_config->ss_pin != NRFX_SPIM_PIN_NOT_USED) + { + if (p_config->ss_active_high) + { + nrf_gpio_pin_clear(p_config->ss_pin); + } + else + { + nrf_gpio_pin_set(p_config->ss_pin); + } + nrf_gpio_cfg_output(p_config->ss_pin); +#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) + if (p_config->use_hw_ss) + { + m_cb[p_instance->drv_inst_idx].use_hw_ss = p_config->use_hw_ss; + nrf_spim_csn_configure(p_spim, + p_config->ss_pin, + (p_config->ss_active_high == true ? + NRF_SPIM_CSN_POL_HIGH : NRF_SPIM_CSN_POL_LOW), + p_config->ss_duration); + } +#endif + m_cb[p_instance->drv_inst_idx].ss_pin = p_config->ss_pin; + m_cb[p_instance->drv_inst_idx].ss_active_high = p_config->ss_active_high; + } + +#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) + // - DCX (optional) - output. + if (p_config->dcx_pin != NRFX_SPIM_PIN_NOT_USED) + { + nrf_gpio_pin_set(p_config->dcx_pin); + nrf_gpio_cfg_output(p_config->dcx_pin); + nrf_spim_dcx_pin_set(p_spim, p_config->dcx_pin); + } + + // Change rx delay + nrf_spim_iftiming_set(p_spim, p_config->rx_delay); +#endif + + + nrf_spim_pins_set(p_spim, p_config->sck_pin, mosi_pin, miso_pin); + nrf_spim_frequency_set(p_spim, p_config->frequency); + nrf_spim_configure(p_spim, p_config->mode, p_config->bit_order); + + nrf_spim_orc_set(p_spim, p_config->orc); + + if (p_cb->handler) + { + nrf_spim_int_enable(p_spim, NRF_SPIM_INT_END_MASK); + } + + nrf_spim_enable(p_spim); + + if (p_cb->handler) + { + NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(p_instance->p_reg), + p_config->irq_priority); + NRFX_IRQ_ENABLE(nrfx_get_irq_number(p_instance->p_reg)); + } + + p_cb->transfer_in_progress = false; + p_cb->state = NRFX_DRV_STATE_INITIALIZED; + + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +void nrfx_spim_uninit(nrfx_spim_t const * const p_instance) +{ + spim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + + if (p_cb->handler) + { + NRFX_IRQ_DISABLE(nrfx_get_irq_number(p_instance->p_reg)); + } + + NRF_SPIM_Type * p_spim = (NRF_SPIM_Type *)p_instance->p_reg; + if (p_cb->handler) + { + nrf_spim_int_disable(p_spim, NRF_SPIM_ALL_INTS_MASK); + if (p_cb->transfer_in_progress) + { + // Ensure that SPI is not performing any transfer. + nrf_spim_task_trigger(p_spim, NRF_SPIM_TASK_STOP); + while (!nrf_spim_event_check(p_spim, NRF_SPIM_EVENT_STOPPED)) + {} + p_cb->transfer_in_progress = false; + } + } + + if (p_cb->miso_pin != NRFX_SPIM_PIN_NOT_USED) + { + nrf_gpio_cfg_default(p_cb->miso_pin); + } + nrf_spim_disable(p_spim); + +#if NRFX_CHECK(NRFX_PRS_ENABLED) + nrfx_prs_release(p_instance->p_reg); +#endif + + p_cb->state = NRFX_DRV_STATE_UNINITIALIZED; +} + +#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) +nrfx_err_t nrfx_spim_xfer_dcx(nrfx_spim_t const * const p_instance, + nrfx_spim_xfer_desc_t const * p_xfer_desc, + uint32_t flags, + uint8_t cmd_length) +{ + NRFX_ASSERT(cmd_length <= NRF_SPIM_DCX_CNT_ALL_CMD); + nrf_spim_dcx_cnt_set((NRF_SPIM_Type *)p_instance->p_reg, cmd_length); + return nrfx_spim_xfer(p_instance, p_xfer_desc, 0); +} +#endif + +static void finish_transfer(spim_control_block_t * p_cb) +{ + // If Slave Select signal is used, this is the time to deactivate it. + if (p_cb->ss_pin != NRFX_SPIM_PIN_NOT_USED) + { +#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) + if (!p_cb->use_hw_ss) +#endif + { + if (p_cb->ss_active_high) + { + nrf_gpio_pin_clear(p_cb->ss_pin); + } + else + { + nrf_gpio_pin_set(p_cb->ss_pin); + } + } + } + + // By clearing this flag before calling the handler we allow subsequent + // transfers to be started directly from the handler function. + p_cb->transfer_in_progress = false; + + p_cb->evt.type = NRFX_SPIM_EVENT_DONE; + p_cb->handler(&p_cb->evt, p_cb->p_context); +} + +__STATIC_INLINE void spim_int_enable(NRF_SPIM_Type * p_spim, bool enable) +{ + if (!enable) + { + nrf_spim_int_disable(p_spim, NRF_SPIM_INT_END_MASK); + } + else + { + nrf_spim_int_enable(p_spim, NRF_SPIM_INT_END_MASK); + } +} + +__STATIC_INLINE void spim_list_enable_handle(NRF_SPIM_Type * p_spim, uint32_t flags) +{ + if (NRFX_SPIM_FLAG_TX_POSTINC & flags) + { + nrf_spim_tx_list_enable(p_spim); + } + else + { + nrf_spim_tx_list_disable(p_spim); + } + + if (NRFX_SPIM_FLAG_RX_POSTINC & flags) + { + nrf_spim_rx_list_enable(p_spim); + } + else + { + nrf_spim_rx_list_disable(p_spim); + } +} + +static nrfx_err_t spim_xfer(NRF_SPIM_Type * p_spim, + spim_control_block_t * p_cb, + nrfx_spim_xfer_desc_t const * p_xfer_desc, + uint32_t flags) +{ + nrfx_err_t err_code; + // EasyDMA requires that transfer buffers are placed in Data RAM region; + // signal error if they are not. + if ((p_xfer_desc->p_tx_buffer != NULL && !nrfx_is_in_ram(p_xfer_desc->p_tx_buffer)) || + (p_xfer_desc->p_rx_buffer != NULL && !nrfx_is_in_ram(p_xfer_desc->p_rx_buffer))) + { + p_cb->transfer_in_progress = false; + err_code = NRFX_ERROR_INVALID_ADDR; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + +#if NRFX_CHECK(NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED) + p_cb->tx_length = 0; + p_cb->rx_length = 0; +#endif + + nrf_spim_tx_buffer_set(p_spim, p_xfer_desc->p_tx_buffer, p_xfer_desc->tx_length); + nrf_spim_rx_buffer_set(p_spim, p_xfer_desc->p_rx_buffer, p_xfer_desc->rx_length); + +#if NRFX_CHECK(NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED) + if (p_spim == NRF_SPIM3) + { + anomaly_198_enable(p_xfer_desc->p_tx_buffer, p_xfer_desc->tx_length); + } +#endif + + nrf_spim_event_clear(p_spim, NRF_SPIM_EVENT_END); + + spim_list_enable_handle(p_spim, flags); + + if (!(flags & NRFX_SPIM_FLAG_HOLD_XFER)) + { + nrf_spim_task_trigger(p_spim, NRF_SPIM_TASK_START); + } +#if NRFX_CHECK(NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED) + if (flags & NRFX_SPIM_FLAG_HOLD_XFER) + { + nrf_spim_event_clear(p_spim, NRF_SPIM_EVENT_STARTED); + p_cb->tx_length = p_xfer_desc->tx_length; + p_cb->rx_length = p_xfer_desc->rx_length; + nrf_spim_tx_buffer_set(p_spim, p_xfer_desc->p_tx_buffer, 0); + nrf_spim_rx_buffer_set(p_spim, p_xfer_desc->p_rx_buffer, 0); + nrf_spim_int_enable(p_spim, NRF_SPIM_INT_STARTED_MASK); + } +#endif + + if (!p_cb->handler) + { + while (!nrf_spim_event_check(p_spim, NRF_SPIM_EVENT_END)){} + +#if NRFX_CHECK(NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED) + if (p_spim == NRF_SPIM3) + { + anomaly_198_disable(); + } +#endif + if (p_cb->ss_pin != NRFX_SPIM_PIN_NOT_USED) + { +#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) + if (!p_cb->use_hw_ss) +#endif + { + if (p_cb->ss_active_high) + { + nrf_gpio_pin_clear(p_cb->ss_pin); + } + else + { + nrf_gpio_pin_set(p_cb->ss_pin); + } + } + } + } + else + { + spim_int_enable(p_spim, !(flags & NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER)); + } + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +nrfx_err_t nrfx_spim_xfer(nrfx_spim_t const * const p_instance, + nrfx_spim_xfer_desc_t const * p_xfer_desc, + uint32_t flags) +{ + spim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + NRFX_ASSERT(p_xfer_desc->p_tx_buffer != NULL || p_xfer_desc->tx_length == 0); + NRFX_ASSERT(p_xfer_desc->p_rx_buffer != NULL || p_xfer_desc->rx_length == 0); + NRFX_ASSERT(SPIM_LENGTH_VALIDATE(p_instance->drv_inst_idx, + p_xfer_desc->rx_length, + p_xfer_desc->tx_length)); + + nrfx_err_t err_code = NRFX_SUCCESS; + + if (p_cb->transfer_in_progress) + { + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + else + { + if (p_cb->handler && !(flags & (NRFX_SPIM_FLAG_REPEATED_XFER | + NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER))) + { + p_cb->transfer_in_progress = true; + } + } + + p_cb->evt.xfer_desc = *p_xfer_desc; + + if (p_cb->ss_pin != NRFX_SPIM_PIN_NOT_USED) + { +#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) + if (!p_cb->use_hw_ss) +#endif + { + if (p_cb->ss_active_high) + { + nrf_gpio_pin_set(p_cb->ss_pin); + } + else + { + nrf_gpio_pin_clear(p_cb->ss_pin); + } + } + } + + return spim_xfer(p_instance->p_reg, p_cb, p_xfer_desc, flags); +} + +void nrfx_spim_abort(nrfx_spim_t const * p_instance) +{ + spim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + + nrf_spim_task_trigger(p_instance->p_reg, NRF_SPIM_TASK_STOP); + while (!nrf_spim_event_check(p_instance->p_reg, NRF_SPIM_EVENT_STOPPED)) + {} + p_cb->transfer_in_progress = false; +} + +uint32_t nrfx_spim_start_task_get(nrfx_spim_t const * p_instance) +{ + NRF_SPIM_Type * p_spim = (NRF_SPIM_Type *)p_instance->p_reg; + return nrf_spim_task_address_get(p_spim, NRF_SPIM_TASK_START); +} + +uint32_t nrfx_spim_end_event_get(nrfx_spim_t const * p_instance) +{ + NRF_SPIM_Type * p_spim = (NRF_SPIM_Type *)p_instance->p_reg; + return nrf_spim_event_address_get(p_spim, NRF_SPIM_EVENT_END); +} + +static void irq_handler(NRF_SPIM_Type * p_spim, spim_control_block_t * p_cb) +{ + +#if NRFX_CHECK(NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED) + if ((nrf_spim_int_enable_check(p_spim, NRF_SPIM_INT_STARTED_MASK)) && + (nrf_spim_event_check(p_spim, NRF_SPIM_EVENT_STARTED)) ) + { + /* Handle first, zero-length, auxiliary transmission. */ + nrf_spim_event_clear(p_spim, NRF_SPIM_EVENT_STARTED); + nrf_spim_event_clear(p_spim, NRF_SPIM_EVENT_END); + + NRFX_ASSERT(p_spim->TXD.MAXCNT == 0); + p_spim->TXD.MAXCNT = p_cb->tx_length; + + NRFX_ASSERT(p_spim->RXD.MAXCNT == 0); + p_spim->RXD.MAXCNT = p_cb->rx_length; + + /* Disable STARTED interrupt, used only in auxiliary transmission. */ + nrf_spim_int_disable(p_spim, NRF_SPIM_INT_STARTED_MASK); + + /* Start the actual, glitch-free transmission. */ + nrf_spim_task_trigger(p_spim, NRF_SPIM_TASK_START); + return; + } +#endif + + if (nrf_spim_event_check(p_spim, NRF_SPIM_EVENT_END)) + { +#if NRFX_CHECK(NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED) + if (p_spim == NRF_SPIM3) + { + anomaly_198_disable(); + } +#endif + nrf_spim_event_clear(p_spim, NRF_SPIM_EVENT_END); + NRFX_ASSERT(p_cb->handler); + NRFX_LOG_DEBUG("Event: NRF_SPIM_EVENT_END."); + finish_transfer(p_cb); + } +} + +#if NRFX_CHECK(NRFX_SPIM0_ENABLED) +void nrfx_spim_0_irq_handler(void) +{ + irq_handler(NRF_SPIM0, &m_cb[NRFX_SPIM0_INST_IDX]); +} +#endif + +#if NRFX_CHECK(NRFX_SPIM1_ENABLED) +void nrfx_spim_1_irq_handler(void) +{ + irq_handler(NRF_SPIM1, &m_cb[NRFX_SPIM1_INST_IDX]); +} +#endif + +#if NRFX_CHECK(NRFX_SPIM2_ENABLED) +void nrfx_spim_2_irq_handler(void) +{ + irq_handler(NRF_SPIM2, &m_cb[NRFX_SPIM2_INST_IDX]); +} +#endif + +#if NRFX_CHECK(NRFX_SPIM3_ENABLED) +void nrfx_spim_3_irq_handler(void) +{ + irq_handler(NRF_SPIM3, &m_cb[NRFX_SPIM3_INST_IDX]); +} +#endif + +#endif // NRFX_CHECK(NRFX_SPIM_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_spis.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_spis.c new file mode 100644 index 00000000000..53075f07c77 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_spis.c @@ -0,0 +1,494 @@ +/** + * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_SPIS_ENABLED) + +#if !(NRFX_CHECK(NRFX_SPIS0_ENABLED) || NRFX_CHECK(NRFX_SPIS1_ENABLED) || \ + NRFX_CHECK(NRFX_SPIS2_ENABLED)) +#error "No enabled SPIS instances. Check ." +#endif + +#include +#include "prs/nrfx_prs.h" + +#define NRFX_LOG_MODULE SPIS +#include + +#define EVT_TO_STR(event) \ + (event == NRF_SPIS_EVENT_ACQUIRED ? "NRF_SPIS_EVENT_ACQUIRED" : \ + (event == NRF_SPIS_EVENT_END ? "NRF_SPIS_EVENT_END" : \ + "UNKNOWN ERROR")) + +#define SPISX_LENGTH_VALIDATE(peripheral, drv_inst_idx, rx_len, tx_len) \ + (((drv_inst_idx) == NRFX_CONCAT_3(NRFX_, peripheral, _INST_IDX)) && \ + NRFX_EASYDMA_LENGTH_VALIDATE(peripheral, rx_len, tx_len)) + +#if NRFX_CHECK(NRFX_SPIS0_ENABLED) +#define SPIS0_LENGTH_VALIDATE(...) SPISX_LENGTH_VALIDATE(SPIS0, __VA_ARGS__) +#else +#define SPIS0_LENGTH_VALIDATE(...) 0 +#endif + +#if NRFX_CHECK(NRFX_SPIS1_ENABLED) +#define SPIS1_LENGTH_VALIDATE(...) SPISX_LENGTH_VALIDATE(SPIS1, __VA_ARGS__) +#else +#define SPIS1_LENGTH_VALIDATE(...) 0 +#endif + +#if NRFX_CHECK(NRFX_SPIS2_ENABLED) +#define SPIS2_LENGTH_VALIDATE(...) SPISX_LENGTH_VALIDATE(SPIS2, __VA_ARGS__) +#else +#define SPIS2_LENGTH_VALIDATE(...) 0 +#endif + +#define SPIS_LENGTH_VALIDATE(drv_inst_idx, rx_len, tx_len) \ + (SPIS0_LENGTH_VALIDATE(drv_inst_idx, rx_len, tx_len) || \ + SPIS1_LENGTH_VALIDATE(drv_inst_idx, rx_len, tx_len) || \ + SPIS2_LENGTH_VALIDATE(drv_inst_idx, rx_len, tx_len)) + + +#if NRFX_CHECK(NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED) +#include +#define USE_DMA_ISSUE_WORKAROUND +// This handler is called by the GPIOTE driver when a falling edge is detected +// on the CSN line. There is no need to do anything here. The handling of the +// interrupt itself provides a protection for DMA transfers. +static void csn_event_handler(nrfx_gpiote_pin_t pin, + nrf_gpiote_polarity_t action) +{ +} +#endif + + +/**@brief States of the SPI transaction state machine. */ +typedef enum +{ + SPIS_STATE_INIT, /**< Initialization state. In this state the module waits for a call to @ref spi_slave_buffers_set. */ + SPIS_BUFFER_RESOURCE_REQUESTED, /**< State where the configuration of the memory buffers, which are to be used in SPI transaction, has started. */ + SPIS_BUFFER_RESOURCE_CONFIGURED, /**< State where the configuration of the memory buffers, which are to be used in SPI transaction, has completed. */ + SPIS_XFER_COMPLETED /**< State where SPI transaction has been completed. */ +} nrfx_spis_state_t; + +/**@brief SPIS control block - driver instance local data. */ +typedef struct +{ + volatile uint32_t tx_buffer_size; //!< SPI slave TX buffer size in bytes. + volatile uint32_t rx_buffer_size; //!< SPI slave RX buffer size in bytes. + nrfx_spis_event_handler_t handler; //!< SPI event handler. + volatile const uint8_t * tx_buffer; //!< SPI slave TX buffer. + volatile uint8_t * rx_buffer; //!< SPI slave RX buffer. + nrfx_drv_state_t state; //!< driver initialization state. + volatile nrfx_spis_state_t spi_state; //!< SPI slave state. + void * p_context; //!< Context set on initialization. +} spis_cb_t; + +static spis_cb_t m_cb[NRFX_SPIS_ENABLED_COUNT]; + +nrfx_err_t nrfx_spis_init(nrfx_spis_t const * const p_instance, + nrfx_spis_config_t const * p_config, + nrfx_spis_event_handler_t event_handler, + void * p_context) +{ + NRFX_ASSERT(p_config); + NRFX_ASSERT(event_handler); + spis_cb_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + nrfx_err_t err_code; + + NRF_SPIS_Type * p_spis = p_instance->p_reg; + + if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) + { + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + if ((uint32_t)p_config->mode > (uint32_t)NRF_SPIS_MODE_3) + { + err_code = NRFX_ERROR_INVALID_PARAM; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } +#if NRFX_CHECK(NRFX_PRS_ENABLED) + static nrfx_irq_handler_t const irq_handlers[NRFX_SPIS_ENABLED_COUNT] = { + #if NRFX_CHECK(NRFX_SPIS0_ENABLED) + nrfx_spis_0_irq_handler, + #endif + #if NRFX_CHECK(NRFX_SPIS1_ENABLED) + nrfx_spis_1_irq_handler, + #endif + #if NRFX_CHECK(NRFX_SPIS2_ENABLED) + nrfx_spis_2_irq_handler, + #endif + }; + if (nrfx_prs_acquire(p_spis, + irq_handlers[p_instance->drv_inst_idx]) != NRFX_SUCCESS) + { + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } +#endif // NRFX_CHECK(NRFX_PRS_ENABLED) + + // Configure the SPI pins for input. + uint32_t mosi_pin; + uint32_t miso_pin; + + if (p_config->miso_pin != NRFX_SPIS_PIN_NOT_USED) + { + nrf_gpio_cfg(p_config->miso_pin, + NRF_GPIO_PIN_DIR_INPUT, + NRF_GPIO_PIN_INPUT_CONNECT, + NRF_GPIO_PIN_NOPULL, + p_config->miso_drive, + NRF_GPIO_PIN_NOSENSE); + miso_pin = p_config->miso_pin; + } + else + { + miso_pin = NRF_SPIS_PIN_NOT_CONNECTED; + } + + if (p_config->mosi_pin != NRFX_SPIS_PIN_NOT_USED) + { + nrf_gpio_cfg(p_config->mosi_pin, + NRF_GPIO_PIN_DIR_INPUT, + NRF_GPIO_PIN_INPUT_CONNECT, + NRF_GPIO_PIN_NOPULL, + NRF_GPIO_PIN_S0S1, + NRF_GPIO_PIN_NOSENSE); + mosi_pin = p_config->mosi_pin; + } + else + { + mosi_pin = NRF_SPIS_PIN_NOT_CONNECTED; + } + + nrf_gpio_cfg(p_config->csn_pin, + NRF_GPIO_PIN_DIR_INPUT, + NRF_GPIO_PIN_INPUT_CONNECT, + p_config->csn_pullup, + NRF_GPIO_PIN_S0S1, + NRF_GPIO_PIN_NOSENSE); + + nrf_gpio_cfg(p_config->sck_pin, + NRF_GPIO_PIN_DIR_INPUT, + NRF_GPIO_PIN_INPUT_CONNECT, + NRF_GPIO_PIN_NOPULL, + NRF_GPIO_PIN_S0S1, + NRF_GPIO_PIN_NOSENSE); + + nrf_spis_pins_set(p_spis, p_config->sck_pin, mosi_pin, miso_pin, p_config->csn_pin); + + nrf_spis_rx_buffer_set(p_spis, NULL, 0); + nrf_spis_tx_buffer_set(p_spis, NULL, 0); + + // Configure SPI mode. + nrf_spis_configure(p_spis, p_config->mode, p_config->bit_order); + + // Configure DEF and ORC characters. + nrf_spis_def_set(p_spis, p_config->def); + nrf_spis_orc_set(p_spis, p_config->orc); + + // Clear possible pending events. + nrf_spis_event_clear(p_spis, NRF_SPIS_EVENT_END); + nrf_spis_event_clear(p_spis, NRF_SPIS_EVENT_ACQUIRED); + + // Enable END_ACQUIRE shortcut. + nrf_spis_shorts_enable(p_spis, NRF_SPIS_SHORT_END_ACQUIRE); + + p_cb->spi_state = SPIS_STATE_INIT; + p_cb->handler = event_handler; + p_cb->p_context = p_context; + +#if defined(USE_DMA_ISSUE_WORKAROUND) + // Configure a GPIOTE channel to generate interrupts on each falling edge + // on the CSN line. Handling of these interrupts will make the CPU active, + // and thus will protect the DMA transfers started by SPIS right after it + // is selected for communication. + // [the GPIOTE driver may be already initialized at this point (by this + // driver when another SPIS instance is used, or by an application code), + // so just ignore the returned value] + (void)nrfx_gpiote_init(); + static nrfx_gpiote_in_config_t const csn_gpiote_config = + NRFX_GPIOTE_CONFIG_IN_SENSE_HITOLO(true); + nrfx_err_t gpiote_err_code = nrfx_gpiote_in_init(p_config->csn_pin, + &csn_gpiote_config, csn_event_handler); + if (gpiote_err_code != NRFX_SUCCESS) + { + err_code = NRFX_ERROR_INTERNAL; + NRFX_LOG_INFO("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + nrfx_gpiote_in_event_enable(p_config->csn_pin, true); +#endif + + // Enable IRQ. + nrf_spis_int_enable(p_spis, NRF_SPIS_INT_ACQUIRED_MASK | + NRF_SPIS_INT_END_MASK); + NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(p_instance->p_reg), + p_config->irq_priority); + NRFX_IRQ_ENABLE(nrfx_get_irq_number(p_instance->p_reg)); + + p_cb->state = NRFX_DRV_STATE_INITIALIZED; + + // Enable SPI slave device. + nrf_spis_enable(p_spis); + + NRFX_LOG_INFO("Initialized."); + return NRFX_SUCCESS; +} + + +void nrfx_spis_uninit(nrfx_spis_t const * const p_instance) +{ + spis_cb_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + + NRF_SPIS_Type * p_spis = p_instance->p_reg; + + #define DISABLE_ALL 0xFFFFFFFF + nrf_spis_disable(p_spis); + NRFX_IRQ_DISABLE(nrfx_get_irq_number(p_instance->p_reg)); + nrf_spis_int_disable(p_spis, DISABLE_ALL); + #undef DISABLE_ALL + +#if NRFX_CHECK(NRFX_PRS_ENABLED) + nrfx_prs_release(p_spis); +#endif + + p_cb->state = NRFX_DRV_STATE_UNINITIALIZED; + NRFX_LOG_INFO("Uninitialized."); +} + + +/**@brief Function for executing the state entry action. */ +static void spis_state_entry_action_execute(NRF_SPIS_Type * p_spis, + spis_cb_t * p_cb) +{ + nrfx_spis_evt_t event; + + switch (p_cb->spi_state) + { + case SPIS_BUFFER_RESOURCE_REQUESTED: + nrf_spis_task_trigger(p_spis, NRF_SPIS_TASK_ACQUIRE); + break; + + case SPIS_BUFFER_RESOURCE_CONFIGURED: + event.evt_type = NRFX_SPIS_BUFFERS_SET_DONE; + event.rx_amount = 0; + event.tx_amount = 0; + + NRFX_ASSERT(p_cb->handler != NULL); + p_cb->handler(&event, p_cb->p_context); + break; + + case SPIS_XFER_COMPLETED: + event.evt_type = NRFX_SPIS_XFER_DONE; + event.rx_amount = nrf_spis_rx_amount_get(p_spis); + event.tx_amount = nrf_spis_tx_amount_get(p_spis); + NRFX_LOG_INFO("Transfer rx_len:%d.", event.rx_amount); + NRFX_LOG_DEBUG("Rx data:"); + NRFX_LOG_HEXDUMP_DEBUG((uint8_t const *)p_cb->rx_buffer, + event.rx_amount * sizeof(p_cb->rx_buffer[0])); + NRFX_ASSERT(p_cb->handler != NULL); + p_cb->handler(&event, p_cb->p_context); + break; + + default: + // No implementation required. + break; + } +} + +/**@brief Function for changing the state of the SPI state machine. + * + * @param[in] p_spis SPIS instance register. + * @param[in] p_cb SPIS instance control block. + * @param[in] new_state State where the state machine transits to. + */ +static void spis_state_change(NRF_SPIS_Type * p_spis, + spis_cb_t * p_cb, + nrfx_spis_state_t new_state) +{ + p_cb->spi_state = new_state; + spis_state_entry_action_execute(p_spis, p_cb); +} + +nrfx_err_t nrfx_spis_buffers_set(nrfx_spis_t const * const p_instance, + uint8_t const * p_tx_buffer, + size_t tx_buffer_length, + uint8_t * p_rx_buffer, + size_t rx_buffer_length) +{ + NRFX_ASSERT(p_tx_buffer != NULL || tx_buffer_length == 0); + NRFX_ASSERT(p_rx_buffer != NULL || rx_buffer_length == 0); + + spis_cb_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + nrfx_err_t err_code; + + if (!SPIS_LENGTH_VALIDATE(p_instance->drv_inst_idx, + rx_buffer_length, + tx_buffer_length)) + { + return NRFX_ERROR_INVALID_LENGTH; + } + + // EasyDMA requires that transfer buffers are placed in Data RAM region; + // signal error if they are not. + if ((p_tx_buffer != NULL && !nrfx_is_in_ram(p_tx_buffer)) || + (p_rx_buffer != NULL && !nrfx_is_in_ram(p_rx_buffer))) + { + err_code = NRFX_ERROR_INVALID_ADDR; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + switch (p_cb->spi_state) + { + case SPIS_STATE_INIT: + case SPIS_XFER_COMPLETED: + case SPIS_BUFFER_RESOURCE_CONFIGURED: + p_cb->tx_buffer = p_tx_buffer; + p_cb->rx_buffer = p_rx_buffer; + p_cb->tx_buffer_size = tx_buffer_length; + p_cb->rx_buffer_size = rx_buffer_length; + err_code = NRFX_SUCCESS; + + spis_state_change(p_instance->p_reg, p_cb, SPIS_BUFFER_RESOURCE_REQUESTED); + break; + + case SPIS_BUFFER_RESOURCE_REQUESTED: + err_code = NRFX_ERROR_INVALID_STATE; + break; + + default: + // @note: execution of this code path would imply internal error in the design. + err_code = NRFX_ERROR_INTERNAL; + break; + } + + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +static void spis_irq_handler(NRF_SPIS_Type * p_spis, spis_cb_t * p_cb) +{ + // @note: as multiple events can be pending for processing, the correct event processing order + // is as follows: + // - SPI semaphore acquired event. + // - SPI transaction complete event. + + // Check for SPI semaphore acquired event. + if (nrf_spis_event_check(p_spis, NRF_SPIS_EVENT_ACQUIRED)) + { + nrf_spis_event_clear(p_spis, NRF_SPIS_EVENT_ACQUIRED); + NRFX_LOG_DEBUG("SPIS: Event: %s.", EVT_TO_STR(NRF_SPIS_EVENT_ACQUIRED)); + + switch (p_cb->spi_state) + { + case SPIS_BUFFER_RESOURCE_REQUESTED: + nrf_spis_tx_buffer_set(p_spis, (uint8_t *)p_cb->tx_buffer, p_cb->tx_buffer_size); + nrf_spis_rx_buffer_set(p_spis, (uint8_t *)p_cb->rx_buffer, p_cb->rx_buffer_size); + + nrf_spis_task_trigger(p_spis, NRF_SPIS_TASK_RELEASE); + + spis_state_change(p_spis, p_cb, SPIS_BUFFER_RESOURCE_CONFIGURED); + break; + + default: + // No implementation required. + break; + } + } + + // Check for SPI transaction complete event. + if (nrf_spis_event_check(p_spis, NRF_SPIS_EVENT_END)) + { + nrf_spis_event_clear(p_spis, NRF_SPIS_EVENT_END); + NRFX_LOG_DEBUG("SPIS: Event: %s.", EVT_TO_STR(NRF_SPIS_EVENT_END)); + + switch (p_cb->spi_state) + { + case SPIS_BUFFER_RESOURCE_CONFIGURED: + spis_state_change(p_spis, p_cb, SPIS_XFER_COMPLETED); + break; + + default: + // No implementation required. + break; + } + } +} + +#if NRFX_CHECK(NRFX_SPIS0_ENABLED) +void nrfx_spis_0_irq_handler(void) +{ + spis_irq_handler(NRF_SPIS0, &m_cb[NRFX_SPIS0_INST_IDX]); +} +#endif + +#if NRFX_CHECK(NRFX_SPIS1_ENABLED) +void nrfx_spis_1_irq_handler(void) +{ + spis_irq_handler(NRF_SPIS1, &m_cb[NRFX_SPIS1_INST_IDX]); +} +#endif + +#if NRFX_CHECK(NRFX_SPIS2_ENABLED) +void nrfx_spis_2_irq_handler(void) +{ + spis_irq_handler(NRF_SPIS2, &m_cb[NRFX_SPIS2_INST_IDX]); +} +#endif + +#endif // NRFX_CHECK(NRFX_SPIS_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_swi.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_swi.c new file mode 100644 index 00000000000..4a6dcc4d4c8 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_swi.c @@ -0,0 +1,412 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_SWI_ENABLED) + +#include + +#define NRFX_LOG_MODULE SWI +#include + + +// NRFX_SWI_RESERVED_MASK - SWIs reserved for use by external modules. +#if NRFX_CHECK(NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED) +#define NRFX_SWI_RESERVED_MASK ((NRFX_SWI_USED) | \ + (1u << NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE)) +#else +#define NRFX_SWI_RESERVED_MASK (NRFX_SWI_USED) +#endif + +// NRFX_SWI_DISABLED_MASK - SWIs excluded from use in . +#if NRFX_CHECK(NRFX_SWI0_DISABLED) +#define NRFX_SWI0_DISABLED_MASK (1u << 0) +#else +#define NRFX_SWI0_DISABLED_MASK 0u +#endif +#if NRFX_CHECK(NRFX_SWI1_DISABLED) +#define NRFX_SWI1_DISABLED_MASK (1u << 1) +#else +#define NRFX_SWI1_DISABLED_MASK 0u +#endif +#if NRFX_CHECK(NRFX_SWI2_DISABLED) +#define NRFX_SWI2_DISABLED_MASK (1u << 2) +#else +#define NRFX_SWI2_DISABLED_MASK 0u +#endif +#if NRFX_CHECK(NRFX_SWI3_DISABLED) +#define NRFX_SWI3_DISABLED_MASK (1u << 3) +#else +#define NRFX_SWI3_DISABLED_MASK 0u +#endif +#if NRFX_CHECK(NRFX_SWI4_DISABLED) +#define NRFX_SWI4_DISABLED_MASK (1u << 4) +#else +#define NRFX_SWI4_DISABLED_MASK 0u +#endif +#if NRFX_CHECK(NRFX_SWI5_DISABLED) +#define NRFX_SWI5_DISABLED_MASK (1u << 5) +#else +#define NRFX_SWI5_DISABLED_MASK 0u +#endif +#define NRFX_SWI_DISABLED_MASK (NRFX_SWI0_DISABLED_MASK | \ + NRFX_SWI1_DISABLED_MASK | \ + NRFX_SWI2_DISABLED_MASK | \ + NRFX_SWI3_DISABLED_MASK | \ + NRFX_SWI4_DISABLED_MASK | \ + NRFX_SWI5_DISABLED_MASK) + +#if (NRFX_SWI_RESERVED_MASK & NRFX_SWI_DISABLED_MASK) +#error "A reserved SWI configured to be disabled. Check and NRFX_SWI_USED." +#endif + +// NRFX_SWI_AVAILABLE_MASK - SWIs available for this module, i.e. present +// in the hardware and neither reserved by external modules nor disabled +// in . +#define NRFX_SWI_PRESENT_MASK ((1u << (SWI_COUNT)) - 1u) +#define NRFX_SWI_AVAILABLE_MASK (NRFX_SWI_PRESENT_MASK & \ + ~(NRFX_SWI_RESERVED_MASK | \ + NRFX_SWI_DISABLED_MASK)) + +#if (NRFX_SWI_AVAILABLE_MASK == 0) +#error "No available SWI instances. Check and NRFX_SWI_USED." +#endif + +#define NRFX_SWI_IS_AVAILABLE(idx) ((NRFX_SWI_AVAILABLE_MASK >> (idx)) & 1u) + +#define NRFX_SWI_FIRST (NRFX_SWI_IS_AVAILABLE(0) ? 0u : \ + (NRFX_SWI_IS_AVAILABLE(1) ? 1u : \ + (NRFX_SWI_IS_AVAILABLE(2) ? 2u : \ + (NRFX_SWI_IS_AVAILABLE(3) ? 3u : \ + (NRFX_SWI_IS_AVAILABLE(4) ? 4u : \ + 5u))))) +#define NRFX_SWI_LAST (NRFX_SWI_IS_AVAILABLE(5) ? 5u : \ + (NRFX_SWI_IS_AVAILABLE(4) ? 4u : \ + (NRFX_SWI_IS_AVAILABLE(3) ? 3u : \ + (NRFX_SWI_IS_AVAILABLE(2) ? 2u : \ + (NRFX_SWI_IS_AVAILABLE(1) ? 1u : \ + 0u))))) + +// NRFX_SWI_EGU_COUNT - number of EGU instances to be used by this module +// (note - if EGU is not present, EGU_COUNT is not defined). +#if NRFX_CHECK(NRFX_EGU_ENABLED) +#define NRFX_SWI_EGU_COUNT EGU_COUNT +#else +#define NRFX_SWI_EGU_COUNT 0 +#endif + +// These flags are needed only for SWIs that have no corresponding EGU unit +// (in EGU such flags are available in hardware). +#if (NRFX_SWI_EGU_COUNT < SWI_COUNT) +static nrfx_swi_flags_t m_swi_flags[SWI_COUNT - NRFX_SWI_EGU_COUNT]; +#endif +static nrfx_swi_handler_t m_swi_handlers[SWI_COUNT]; +static uint8_t m_swi_allocated_mask; + + +static void swi_mark_allocated(nrfx_swi_t swi) +{ + m_swi_allocated_mask |= (1u << swi); +} + +static void swi_mark_unallocated(nrfx_swi_t swi) +{ + m_swi_allocated_mask &= ~(1u << swi); +} + +static bool swi_is_allocated(nrfx_swi_t swi) +{ + return (m_swi_allocated_mask & (1u << swi)); +} + +static bool swi_is_available(nrfx_swi_t swi) +{ + return NRFX_SWI_IS_AVAILABLE(swi); +} + +static IRQn_Type swi_irq_number_get(nrfx_swi_t swi) +{ + return (IRQn_Type)((uint32_t)SWI0_IRQn + (uint32_t)swi); +} + +static void swi_handler_setup(nrfx_swi_t swi, + nrfx_swi_handler_t event_handler, + uint32_t irq_priority) +{ + m_swi_handlers[swi] = event_handler; + +#if NRFX_SWI_EGU_COUNT + if (swi < NRFX_SWI_EGU_COUNT) + { + NRF_EGU_Type * p_egu = nrfx_swi_egu_instance_get(swi); + NRFX_ASSERT(p_egu != NULL); + nrf_egu_int_enable(p_egu, NRF_EGU_INT_ALL); + + if (event_handler == NULL) + { + return; + } + } +#endif + + NRFX_ASSERT(event_handler != NULL); + + NRFX_IRQ_PRIORITY_SET(swi_irq_number_get(swi), irq_priority); + NRFX_IRQ_ENABLE(swi_irq_number_get(swi)); +} + +nrfx_err_t nrfx_swi_alloc(nrfx_swi_t * p_swi, + nrfx_swi_handler_t event_handler, + uint32_t irq_priority) +{ + NRFX_ASSERT(p_swi != NULL); + + nrfx_err_t err_code; + + for (nrfx_swi_t swi = NRFX_SWI_FIRST; swi <= NRFX_SWI_LAST; ++swi) + { + if (swi_is_available(swi)) + { + bool allocated = false; + NRFX_CRITICAL_SECTION_ENTER(); + if (!swi_is_allocated(swi)) + { + swi_mark_allocated(swi); + allocated = true; + } + NRFX_CRITICAL_SECTION_EXIT(); + + if (allocated) + { + swi_handler_setup(swi, event_handler, irq_priority); + + *p_swi = swi; + NRFX_LOG_INFO("SWI channel allocated: %d.", (*p_swi)); + return NRFX_SUCCESS; + } + } + } + + err_code = NRFX_ERROR_NO_MEM; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +bool nrfx_swi_is_allocated(nrfx_swi_t swi) +{ + return swi_is_allocated(swi); +} + +void nrfx_swi_free(nrfx_swi_t * p_swi) +{ + NRFX_ASSERT(p_swi != NULL); + nrfx_swi_t swi = *p_swi; + + NRFX_ASSERT(swi_is_allocated(swi)); + NRFX_IRQ_DISABLE(swi_irq_number_get(swi)); + m_swi_handlers[swi] = NULL; + + swi_mark_unallocated(swi); + *p_swi = NRFX_SWI_UNALLOCATED; +} + +void nrfx_swi_all_free(void) +{ + for (nrfx_swi_t swi = NRFX_SWI_FIRST; swi <= NRFX_SWI_LAST; ++swi) + { + if (swi_is_allocated(swi)) + { + NRFX_IRQ_DISABLE(swi_irq_number_get(swi)); + m_swi_handlers[swi] = NULL; +#if NRFX_SWI_EGU_COUNT + if (swi < NRFX_SWI_EGU_COUNT) + { + nrf_egu_int_disable(nrfx_swi_egu_instance_get(swi), + NRF_EGU_INT_ALL); + } +#endif + } + } + + m_swi_allocated_mask = 0; +} + +void nrfx_swi_trigger(nrfx_swi_t swi, uint8_t flag_number) +{ + NRFX_ASSERT(swi_is_allocated(swi)); + +#if NRFX_SWI_EGU_COUNT + + NRF_EGU_Type * p_egu = nrfx_swi_egu_instance_get(swi); +#if (NRFX_SWI_EGU_COUNT < SWI_COUNT) + if (p_egu == NULL) + { + m_swi_flags[swi - NRFX_SWI_EGU_COUNT] |= (1 << flag_number); + NRFX_IRQ_PENDING_SET(swi_irq_number_get(swi)); + } + else +#endif // (NRFX_SWI_EGU_COUNT < SWI_COUNT) + { + nrf_egu_task_trigger(p_egu, + nrf_egu_task_trigger_get(p_egu, flag_number)); + } + +#else // -> #if !NRFX_SWI_EGU_COUNT + + m_swi_flags[swi - NRFX_SWI_EGU_COUNT] |= (1 << flag_number); + NRFX_IRQ_PENDING_SET(swi_irq_number_get(swi)); + +#endif +} + +#if NRFX_SWI_EGU_COUNT +static void egu_irq_handler(nrfx_swi_t swi, uint8_t egu_channel_count) +{ +#if (NRFX_SWI_FIRST > 0) + NRFX_ASSERT(swi >= NRFX_SWI_FIRST); +#endif + NRFX_ASSERT(swi <= NRFX_SWI_LAST); + nrfx_swi_handler_t handler = m_swi_handlers[swi]; + NRFX_ASSERT(handler != NULL); + + NRF_EGU_Type * p_egu = nrfx_swi_egu_instance_get(swi); + NRFX_ASSERT(p_egu != NULL); + + nrfx_swi_flags_t flags = 0; + for (uint8_t i = 0; i < egu_channel_count; ++i) + { + nrf_egu_event_t egu_event = nrf_egu_event_triggered_get(p_egu, i); + if (nrf_egu_event_check(p_egu, egu_event)) + { + flags |= (1u << i); + nrf_egu_event_clear(p_egu, egu_event); + } + } + + handler(swi, flags); +} +#endif // NRFX_SWI_EGU_COUNT + +#if (NRFX_SWI_EGU_COUNT < SWI_COUNT) +static void swi_irq_handler(nrfx_swi_t swi) +{ +#if (NRFX_SWI_FIRST > 0) + NRFX_ASSERT(swi >= NRFX_SWI_FIRST); +#endif + NRFX_ASSERT(swi <= NRFX_SWI_LAST); + nrfx_swi_handler_t handler = m_swi_handlers[swi]; + NRFX_ASSERT(handler != NULL); + + nrfx_swi_flags_t flags = m_swi_flags[swi - NRFX_SWI_EGU_COUNT]; + m_swi_flags[swi - NRFX_SWI_EGU_COUNT] &= ~flags; + + handler(swi, flags); +} +#endif // (NRFX_SWI_EGU_COUNT < SWI_COUNT) + + +#if NRFX_SWI_IS_AVAILABLE(0) +void nrfx_swi_0_irq_handler(void) +{ +#if (NRFX_SWI_EGU_COUNT > 0) + egu_irq_handler(0, EGU0_CH_NUM); +#else + swi_irq_handler(0); +#endif +} +#endif // NRFX_SWI_IS_AVAILABLE(0) + +#if NRFX_SWI_IS_AVAILABLE(1) +void nrfx_swi_1_irq_handler(void) +{ +#if (NRFX_SWI_EGU_COUNT > 1) + egu_irq_handler(1, EGU1_CH_NUM); +#else + swi_irq_handler(1); +#endif +} +#endif // NRFX_SWI_IS_AVAILABLE(1) + +#if NRFX_SWI_IS_AVAILABLE(2) +void nrfx_swi_2_irq_handler(void) +{ +#if (NRFX_SWI_EGU_COUNT > 2) + egu_irq_handler(2, EGU2_CH_NUM); +#else + swi_irq_handler(2); +#endif +} +#endif // NRFX_SWI_IS_AVAILABLE(2) + +#if NRFX_SWI_IS_AVAILABLE(3) +void nrfx_swi_3_irq_handler(void) +{ +#if (NRFX_SWI_EGU_COUNT > 3) + egu_irq_handler(3, EGU3_CH_NUM); +#else + swi_irq_handler(3); +#endif +} +#endif // NRFX_SWI_IS_AVAILABLE(3) + +#if NRFX_SWI_IS_AVAILABLE(4) +void nrfx_swi_4_irq_handler(void) +{ +#if (NRFX_SWI_EGU_COUNT > 4) + egu_irq_handler(4, EGU4_CH_NUM); +#else + swi_irq_handler(4); +#endif +} +#endif // NRFX_SWI_IS_AVAILABLE(4) + +#if NRFX_SWI_IS_AVAILABLE(5) +void nrfx_swi_5_irq_handler(void) +{ +#if (NRFX_SWI_EGU_COUNT > 5) + egu_irq_handler(5, EGU5_CH_NUM); +#else + swi_irq_handler(5); +#endif +} +#endif // NRFX_SWI_IS_AVAILABLE(5) + +#endif // NRFX_CHECK(NRFX_SWI_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_systick.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_systick.c new file mode 100644 index 00000000000..ef38b0f8b93 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_systick.c @@ -0,0 +1,170 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include + +#if NRFX_CHECK(NRFX_SYSTICK_ENABLED) +#include + +/** + * @brief Maximum number of ticks to delay + * + * The maximum number of ticks should be much lower than + * Physical maximum count of the SysTick timer. + * It is dictated by the fact that it would be impossible to detect delay + * properly when the timer value warps around the starting point. + */ +#define NRFX_SYSTICK_TICKS_MAX (NRF_SYSTICK_VAL_MASK / 2UL) + +/** + * @brief Number of milliseconds in a second + */ +#define NRFX_SYSTICK_MS (1000UL) + +/** + * @brief Number of microseconds in a second + */ +#define NRFX_SYSTICK_US (1000UL * NRFX_SYSTICK_MS) + +/** + * @brief Number of milliseconds to wait in single loop + * + * Constant used by @ref nrd_drv_systick_delay_ms function + * to split waiting into loops and rest. + * + * It describes the number of milliseconds to wait in single loop. + * + * See @ref nrfx_systick_delay_ms source code for details. + */ +#define NRFX_SYSTICK_MS_STEP (64U) + +/** + * @brief Checks if the given time is in correct range + * + * Function tests given time is not to big for this library. + * Assertion is used for testing. + * + * @param us Time in microseconds to check + */ +#define NRFX_SYSTICK_ASSERT_TIMEOUT(us) \ + NRFX_ASSERT(us <= (NRFX_SYSTICK_TICKS_MAX / ((SystemCoreClock) / NRFX_SYSTICK_US))); + +/** + * @brief Function that converts microseconds to ticks + * + * Function converts from microseconds to CPU ticks. + * + * @param us Number of microseconds + * + * @return Number of ticks + * + * @sa nrfx_systick_ms_tick + */ +static inline uint32_t nrfx_systick_us_tick(uint32_t us) +{ + return us * ((SystemCoreClock) / NRFX_SYSTICK_US); +} + +/** + * @brief Function that converts milliseconds to ticks + * + * Function converts from milliseconds to CPU ticks. + * + * @param us Number of milliseconds + * + * @return Number of ticks + * + * @sa nrfx_systick_us_tick + */ +static inline uint32_t nrfx_systick_ms_tick(uint32_t ms) +{ + return ms * ((SystemCoreClock) / NRFX_SYSTICK_MS); +} + +void nrfx_systick_init(void) +{ + nrf_systick_load_set(NRF_SYSTICK_VAL_MASK); + nrf_systick_csr_set( + NRF_SYSTICK_CSR_CLKSOURCE_CPU | + NRF_SYSTICK_CSR_TICKINT_DISABLE | + NRF_SYSTICK_CSR_ENABLE); +} + +void nrfx_systick_get(nrfx_systick_state_t * p_state) +{ + p_state->time = nrf_systick_val_get(); +} + +bool nrfx_systick_test(nrfx_systick_state_t const * p_state, uint32_t us) +{ + NRFX_SYSTICK_ASSERT_TIMEOUT(us); + + const uint32_t diff = NRF_SYSTICK_VAL_MASK & ((p_state->time) - nrf_systick_val_get()); + return (diff >= nrfx_systick_us_tick(us)); +} + +void nrfx_systick_delay_ticks(uint32_t ticks) +{ + NRFX_ASSERT(ticks <= NRFX_SYSTICK_TICKS_MAX); + + const uint32_t start = nrf_systick_val_get(); + while ((NRF_SYSTICK_VAL_MASK & (start - nrf_systick_val_get())) < ticks) + { + /* Nothing to do */ + } +} + +void nrfx_systick_delay_us(uint32_t us) +{ + NRFX_SYSTICK_ASSERT_TIMEOUT(us); + nrfx_systick_delay_ticks(nrfx_systick_us_tick(us)); +} + +void nrfx_systick_delay_ms(uint32_t ms) +{ + uint32_t n = ms / NRFX_SYSTICK_MS_STEP; + uint32_t r = ms % NRFX_SYSTICK_MS_STEP; + while (0 != (n--)) + { + nrfx_systick_delay_ticks(nrfx_systick_ms_tick(NRFX_SYSTICK_MS_STEP)); + } + nrfx_systick_delay_ticks(nrfx_systick_ms_tick(r)); +} + +#endif // NRFX_CHECK(NRFX_SYSTICK_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_timer.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_timer.c new file mode 100644 index 00000000000..024958efbdb --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_timer.c @@ -0,0 +1,330 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_TIMER_ENABLED) + +#if !(NRFX_CHECK(NRFX_TIMER0_ENABLED) || NRFX_CHECK(NRFX_TIMER1_ENABLED) || \ + NRFX_CHECK(NRFX_TIMER2_ENABLED) || NRFX_CHECK(NRFX_TIMER3_ENABLED) || \ + NRFX_CHECK(NRFX_TIMER4_ENABLED)) +#error "No enabled TIMER instances. Check ." +#endif + +#include + +#define NRFX_LOG_MODULE TIMER +#include + +/**@brief Timer control block. */ +typedef struct +{ + nrfx_timer_event_handler_t handler; + void * context; + nrfx_drv_state_t state; +} timer_control_block_t; + +static timer_control_block_t m_cb[NRFX_TIMER_ENABLED_COUNT]; + +nrfx_err_t nrfx_timer_init(nrfx_timer_t const * const p_instance, + nrfx_timer_config_t const * p_config, + nrfx_timer_event_handler_t timer_event_handler) +{ + timer_control_block_t * p_cb = &m_cb[p_instance->instance_id]; +#ifdef SOFTDEVICE_PRESENT + NRFX_ASSERT(p_instance->p_reg != NRF_TIMER0); +#endif + NRFX_ASSERT(p_config); + NRFX_ASSERT(timer_event_handler); + + nrfx_err_t err_code; + + if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) + { + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + /* Warning 685: Relational operator '<=' always evaluates to 'true'" + * Warning in NRF_TIMER_IS_BIT_WIDTH_VALID macro. Macro validate timers resolution. + * Not necessary in nRF52 based systems. Obligatory in nRF51 based systems. + */ + + /*lint -save -e685 */ + + NRFX_ASSERT(NRF_TIMER_IS_BIT_WIDTH_VALID(p_instance->p_reg, p_config->bit_width)); + + //lint -restore + + p_cb->handler = timer_event_handler; + p_cb->context = p_config->p_context; + + uint8_t i; + for (i = 0; i < p_instance->cc_channel_count; ++i) + { + nrf_timer_event_clear(p_instance->p_reg, + nrf_timer_compare_event_get(i)); + } + + NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(p_instance->p_reg), + p_config->interrupt_priority); + NRFX_IRQ_ENABLE(nrfx_get_irq_number(p_instance->p_reg)); + + nrf_timer_mode_set(p_instance->p_reg, p_config->mode); + nrf_timer_bit_width_set(p_instance->p_reg, p_config->bit_width); + nrf_timer_frequency_set(p_instance->p_reg, p_config->frequency); + + p_cb->state = NRFX_DRV_STATE_INITIALIZED; + + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +void nrfx_timer_uninit(nrfx_timer_t const * const p_instance) +{ + NRFX_IRQ_DISABLE(nrfx_get_irq_number(p_instance->p_reg)); + + #define DISABLE_ALL UINT32_MAX + nrf_timer_shorts_disable(p_instance->p_reg, DISABLE_ALL); + nrf_timer_int_disable(p_instance->p_reg, DISABLE_ALL); + #undef DISABLE_ALL + + nrfx_timer_disable(p_instance); + + m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_UNINITIALIZED; + NRFX_LOG_INFO("Uninitialized instance: %d.", p_instance->instance_id); +} + +void nrfx_timer_enable(nrfx_timer_t const * const p_instance) +{ + NRFX_ASSERT(m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_INITIALIZED); + nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_START); + m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_POWERED_ON; + NRFX_LOG_INFO("Enabled instance: %d.", p_instance->instance_id); +} + +void nrfx_timer_disable(nrfx_timer_t const * const p_instance) +{ + NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); + nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_SHUTDOWN); + m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_INITIALIZED; + NRFX_LOG_INFO("Disabled instance: %d.", p_instance->instance_id); +} + +bool nrfx_timer_is_enabled(nrfx_timer_t const * const p_instance) +{ + NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); + return (m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_POWERED_ON); +} + +void nrfx_timer_resume(nrfx_timer_t const * const p_instance) +{ + NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); + nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_START); + NRFX_LOG_INFO("Resumed instance: %d.", p_instance->instance_id); +} + +void nrfx_timer_pause(nrfx_timer_t const * const p_instance) +{ + NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); + nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_STOP); + NRFX_LOG_INFO("Paused instance: %d.", p_instance->instance_id); +} + +void nrfx_timer_clear(nrfx_timer_t const * const p_instance) +{ + NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); + nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_CLEAR); +} + +void nrfx_timer_increment(nrfx_timer_t const * const p_instance) +{ + NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); + NRFX_ASSERT(nrf_timer_mode_get(p_instance->p_reg) != NRF_TIMER_MODE_TIMER); + + nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_COUNT); +} + +uint32_t nrfx_timer_capture(nrfx_timer_t const * const p_instance, + nrf_timer_cc_channel_t cc_channel) +{ + NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); + NRFX_ASSERT(cc_channel < p_instance->cc_channel_count); + + nrf_timer_task_trigger(p_instance->p_reg, + nrf_timer_capture_task_get(cc_channel)); + return nrf_timer_cc_read(p_instance->p_reg, cc_channel); +} + +void nrfx_timer_compare(nrfx_timer_t const * const p_instance, + nrf_timer_cc_channel_t cc_channel, + uint32_t cc_value, + bool enable_int) +{ + nrf_timer_int_mask_t timer_int = nrf_timer_compare_int_get(cc_channel); + + if (enable_int) + { + nrf_timer_event_clear(p_instance->p_reg, nrf_timer_compare_event_get(cc_channel)); + nrf_timer_int_enable(p_instance->p_reg, timer_int); + } + else + { + nrf_timer_int_disable(p_instance->p_reg, timer_int); + } + + nrf_timer_cc_write(p_instance->p_reg, cc_channel, cc_value); + NRFX_LOG_INFO("Timer id: %d, capture value set: %lu, channel: %d.", + p_instance->instance_id, + cc_value, + cc_channel); +} + +void nrfx_timer_extended_compare(nrfx_timer_t const * const p_instance, + nrf_timer_cc_channel_t cc_channel, + uint32_t cc_value, + nrf_timer_short_mask_t timer_short_mask, + bool enable_int) +{ + nrf_timer_shorts_disable(p_instance->p_reg, + (TIMER_SHORTS_COMPARE0_STOP_Msk << cc_channel) | + (TIMER_SHORTS_COMPARE0_CLEAR_Msk << cc_channel)); + + nrf_timer_shorts_enable(p_instance->p_reg, timer_short_mask); + + nrfx_timer_compare(p_instance, + cc_channel, + cc_value, + enable_int); + NRFX_LOG_INFO("Timer id: %d, capture value set: %lu, channel: %d.", + p_instance->instance_id, + cc_value, + cc_channel); +} + +void nrfx_timer_compare_int_enable(nrfx_timer_t const * const p_instance, + uint32_t channel) +{ + NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); + NRFX_ASSERT(channel < p_instance->cc_channel_count); + + nrf_timer_event_clear(p_instance->p_reg, + nrf_timer_compare_event_get(channel)); + nrf_timer_int_enable(p_instance->p_reg, + nrf_timer_compare_int_get(channel)); +} + +void nrfx_timer_compare_int_disable(nrfx_timer_t const * const p_instance, + uint32_t channel) +{ + NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); + NRFX_ASSERT(channel < p_instance->cc_channel_count); + + nrf_timer_int_disable(p_instance->p_reg, + nrf_timer_compare_int_get(channel)); +} + +static void irq_handler(NRF_TIMER_Type * p_reg, + timer_control_block_t * p_cb, + uint8_t channel_count) +{ + uint8_t i; + for (i = 0; i < channel_count; ++i) + { + nrf_timer_event_t event = nrf_timer_compare_event_get(i); + nrf_timer_int_mask_t int_mask = nrf_timer_compare_int_get(i); + + if (nrf_timer_event_check(p_reg, event) && + nrf_timer_int_enable_check(p_reg, int_mask)) + { + nrf_timer_event_clear(p_reg, event); + NRFX_LOG_DEBUG("Compare event, channel: %d.", i); + p_cb->handler(event, p_cb->context); + } + } +} + +#if NRFX_CHECK(NRFX_TIMER0_ENABLED) +void nrfx_timer_0_irq_handler(void) +{ + irq_handler(NRF_TIMER0, &m_cb[NRFX_TIMER0_INST_IDX], + NRF_TIMER_CC_CHANNEL_COUNT(0)); +} +#endif + +#if NRFX_CHECK(NRFX_TIMER1_ENABLED) +void nrfx_timer_1_irq_handler(void) +{ + irq_handler(NRF_TIMER1, &m_cb[NRFX_TIMER1_INST_IDX], + NRF_TIMER_CC_CHANNEL_COUNT(1)); +} +#endif + +#if NRFX_CHECK(NRFX_TIMER2_ENABLED) +void nrfx_timer_2_irq_handler(void) +{ + irq_handler(NRF_TIMER2, &m_cb[NRFX_TIMER2_INST_IDX], + NRF_TIMER_CC_CHANNEL_COUNT(2)); +} +#endif + +#if NRFX_CHECK(NRFX_TIMER3_ENABLED) +void nrfx_timer_3_irq_handler(void) +{ + irq_handler(NRF_TIMER3, &m_cb[NRFX_TIMER3_INST_IDX], + NRF_TIMER_CC_CHANNEL_COUNT(3)); +} +#endif + +#if NRFX_CHECK(NRFX_TIMER4_ENABLED) +void nrfx_timer_4_irq_handler(void) +{ + irq_handler(NRF_TIMER4, &m_cb[NRFX_TIMER4_INST_IDX], + NRF_TIMER_CC_CHANNEL_COUNT(4)); +} +#endif + +#endif // NRFX_CHECK(NRFX_TIMER_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_twi.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_twi.c new file mode 100644 index 00000000000..c7492bd4ee2 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_twi.c @@ -0,0 +1,723 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_TWI_ENABLED) + +#if !(NRFX_CHECK(NRFX_TWI0_ENABLED) || NRFX_CHECK(NRFX_TWI1_ENABLED)) +#error "No enabled TWI instances. Check ." +#endif + +#include +#include +#include "prs/nrfx_prs.h" + +#define NRFX_LOG_MODULE TWI +#include + +#define EVT_TO_STR(event) \ + (event == NRFX_TWI_EVT_DONE ? "EVT_DONE" : \ + (event == NRFX_TWI_EVT_ADDRESS_NACK ? "EVT_ADDRESS_NACK" : \ + (event == NRFX_TWI_EVT_DATA_NACK ? "EVT_DATA_NACK" : \ + "UNKNOWN ERROR"))) + +#define EVT_TO_STR_TWI(event) \ + (event == NRF_TWI_EVENT_STOPPED ? "NRF_TWI_EVENT_STOPPED" : \ + (event == NRF_TWI_EVENT_RXDREADY ? "NRF_TWI_EVENT_RXDREADY" : \ + (event == NRF_TWI_EVENT_TXDSENT ? "NRF_TWI_EVENT_TXDSENT" : \ + (event == NRF_TWI_EVENT_ERROR ? "NRF_TWI_EVENT_ERROR" : \ + (event == NRF_TWI_EVENT_BB ? "NRF_TWI_EVENT_BB" : \ + (event == NRF_TWI_EVENT_SUSPENDED ? "NRF_TWI_EVENT_SUSPENDED" : \ + "UNKNOWN ERROR")))))) + +#define TRANSFER_TO_STR(type) \ + (type == NRFX_TWI_XFER_TX ? "XFER_TX" : \ + (type == NRFX_TWI_XFER_RX ? "XFER_RX" : \ + (type == NRFX_TWI_XFER_TXRX ? "XFER_TXRX" : \ + (type == NRFX_TWI_XFER_TXTX ? "XFER_TXTX" : \ + "UNKNOWN TRANSFER TYPE")))) + +#define TWI_PIN_INIT(_pin) nrf_gpio_cfg((_pin), \ + NRF_GPIO_PIN_DIR_INPUT, \ + NRF_GPIO_PIN_INPUT_CONNECT, \ + NRF_GPIO_PIN_PULLUP, \ + NRF_GPIO_PIN_S0D1, \ + NRF_GPIO_PIN_NOSENSE) + +#define HW_TIMEOUT 10000 + +// Control block - driver instance local data. +typedef struct +{ + nrfx_twi_evt_handler_t handler; + void * p_context; + volatile uint32_t int_mask; + nrfx_twi_xfer_desc_t xfer_desc; + uint32_t flags; + uint8_t * p_curr_buf; + uint8_t curr_length; + bool curr_no_stop; + nrfx_drv_state_t state; + bool error; + volatile bool busy; + bool repeated; + uint8_t bytes_transferred; + bool hold_bus_uninit; +} twi_control_block_t; + +static twi_control_block_t m_cb[NRFX_TWI_ENABLED_COUNT]; + +static nrfx_err_t twi_process_error(uint32_t errorsrc) +{ + nrfx_err_t ret = NRFX_ERROR_INTERNAL; + + if (errorsrc & NRF_TWI_ERROR_OVERRUN) + { + ret = NRFX_ERROR_DRV_TWI_ERR_OVERRUN; + } + + if (errorsrc & NRF_TWI_ERROR_ADDRESS_NACK) + { + ret = NRFX_ERROR_DRV_TWI_ERR_ANACK; + } + + if (errorsrc & NRF_TWI_ERROR_DATA_NACK) + { + ret = NRFX_ERROR_DRV_TWI_ERR_DNACK; + } + + return ret; +} + + + +nrfx_err_t nrfx_twi_init(nrfx_twi_t const * p_instance, + nrfx_twi_config_t const * p_config, + nrfx_twi_evt_handler_t event_handler, + void * p_context) +{ + NRFX_ASSERT(p_config); + NRFX_ASSERT(p_config->scl != p_config->sda); + twi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + nrfx_err_t err_code; + + if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) + { + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + +#if NRFX_CHECK(NRFX_PRS_ENABLED) + static nrfx_irq_handler_t const irq_handlers[NRFX_TWI_ENABLED_COUNT] = { + #if NRFX_CHECK(NRFX_TWI0_ENABLED) + nrfx_twi_0_irq_handler, + #endif + #if NRFX_CHECK(NRFX_TWI1_ENABLED) + nrfx_twi_1_irq_handler, + #endif + }; + if (nrfx_prs_acquire(p_instance->p_twi, + irq_handlers[p_instance->drv_inst_idx]) != NRFX_SUCCESS) + { + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } +#endif // NRFX_CHECK(NRFX_PRS_ENABLED) + + p_cb->handler = event_handler; + p_cb->p_context = p_context; + p_cb->int_mask = 0; + p_cb->repeated = false; + p_cb->busy = false; + p_cb->hold_bus_uninit = p_config->hold_bus_uninit; + + /* To secure correct signal levels on the pins used by the TWI + master when the system is in OFF mode, and when the TWI master is + disabled, these pins must be configured in the GPIO peripheral. + */ + TWI_PIN_INIT(p_config->scl); + TWI_PIN_INIT(p_config->sda); + + NRF_TWI_Type * p_twi = p_instance->p_twi; + nrf_twi_pins_set(p_twi, p_config->scl, p_config->sda); + nrf_twi_frequency_set(p_twi, + (nrf_twi_frequency_t)p_config->frequency); + + if (p_cb->handler) + { + NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(p_instance->p_twi), + p_config->interrupt_priority); + NRFX_IRQ_ENABLE(nrfx_get_irq_number(p_instance->p_twi)); + } + + p_cb->state = NRFX_DRV_STATE_INITIALIZED; + + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +void nrfx_twi_uninit(nrfx_twi_t const * p_instance) +{ + twi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + + if (p_cb->handler) + { + NRFX_IRQ_DISABLE(nrfx_get_irq_number(p_instance->p_twi)); + } + nrfx_twi_disable(p_instance); + +#if NRFX_CHECK(NRFX_PRS_ENABLED) + nrfx_prs_release(p_instance->p_twi); +#endif + + if (!p_cb->hold_bus_uninit) + { + nrf_gpio_cfg_default(p_instance->p_twi->PSELSCL); + nrf_gpio_cfg_default(p_instance->p_twi->PSELSDA); + } + + p_cb->state = NRFX_DRV_STATE_UNINITIALIZED; + NRFX_LOG_INFO("Instance uninitialized: %d.", p_instance->drv_inst_idx); +} + +void nrfx_twi_enable(nrfx_twi_t const * p_instance) +{ + twi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_INITIALIZED); + + NRF_TWI_Type * p_twi = p_instance->p_twi; + nrf_twi_enable(p_twi); + + p_cb->state = NRFX_DRV_STATE_POWERED_ON; + NRFX_LOG_INFO("Instance enabled: %d.", p_instance->drv_inst_idx); +} + +void nrfx_twi_disable(nrfx_twi_t const * p_instance) +{ + twi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + + NRF_TWI_Type * p_twi = p_instance->p_twi; + nrf_twi_int_disable(p_twi, NRF_TWI_ALL_INTS_MASK); + nrf_twi_shorts_disable(p_twi, NRF_TWI_ALL_SHORTS_MASK); + nrf_twi_disable(p_twi); + + p_cb->state = NRFX_DRV_STATE_INITIALIZED; + NRFX_LOG_INFO("Instance disabled: %d.", p_instance->drv_inst_idx); +} + +static bool twi_send_byte(NRF_TWI_Type * p_twi, + uint8_t const * p_data, + uint8_t length, + uint8_t * p_bytes_transferred, + bool no_stop) +{ + if (*p_bytes_transferred < length) + { + nrf_twi_txd_set(p_twi, p_data[*p_bytes_transferred]); + ++(*p_bytes_transferred); + } + else + { + if (no_stop) + { + nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_SUSPEND); + return false; + } + else + { + nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STOP); + } + } + return true; +} + +static void twi_receive_byte(NRF_TWI_Type * p_twi, + uint8_t * p_data, + uint8_t length, + uint8_t * p_bytes_transferred) +{ + if (*p_bytes_transferred < length) + { + p_data[*p_bytes_transferred] = nrf_twi_rxd_get(p_twi); + + ++(*p_bytes_transferred); + + if (*p_bytes_transferred == length - 1) + { + nrf_twi_shorts_set(p_twi, NRF_TWI_SHORT_BB_STOP_MASK); + } + else if (*p_bytes_transferred == length) + { + return; + } + + nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_RESUME); + } +} + +static bool twi_transfer(NRF_TWI_Type * p_twi, + bool * p_error, + uint8_t * p_bytes_transferred, + uint8_t * p_data, + uint8_t length, + bool no_stop) +{ + bool do_stop_check = ((*p_error) || ((*p_bytes_transferred) == length)); + + if (*p_error) + { + nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_ERROR); + nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_TXDSENT); + nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_RXDREADY); + } + else if (nrf_twi_event_check(p_twi, NRF_TWI_EVENT_ERROR)) + { + nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_ERROR); + NRFX_LOG_DEBUG("TWI: Event: %s.", EVT_TO_STR_TWI(NRF_TWI_EVENT_ERROR)); + nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STOP); + *p_error = true; + } + else + { + if (nrf_twi_event_check(p_twi, NRF_TWI_EVENT_TXDSENT)) + { + nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_TXDSENT); + NRFX_LOG_DEBUG("TWI: Event: %s.", EVT_TO_STR_TWI(NRF_TWI_EVENT_TXDSENT)); + if (nrf_twi_event_check(p_twi, NRF_TWI_EVENT_ERROR)) + { + nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_ERROR); + NRFX_LOG_DEBUG("TWI: Event: %s.", EVT_TO_STR_TWI(NRF_TWI_EVENT_ERROR)); + nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STOP); + *p_error = true; + } + else + { + if (!twi_send_byte(p_twi, p_data, length, p_bytes_transferred, no_stop)) + { + return false; + } + } + } + else if (nrf_twi_event_check(p_twi, NRF_TWI_EVENT_RXDREADY)) + { + nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_RXDREADY); + NRFX_LOG_DEBUG("TWI: Event: %s.", EVT_TO_STR_TWI(NRF_TWI_EVENT_RXDREADY)); + if (nrf_twi_event_check(p_twi, NRF_TWI_EVENT_ERROR)) + { + NRFX_LOG_DEBUG("TWI: Event: %s.", EVT_TO_STR_TWI(NRF_TWI_EVENT_ERROR)); + nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_ERROR); + nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STOP); + *p_error = true; + } + else + { + twi_receive_byte(p_twi, p_data, length, p_bytes_transferred); + } + } + } + + if (do_stop_check && nrf_twi_event_check(p_twi, NRF_TWI_EVENT_STOPPED)) + { + nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_STOPPED); + NRFX_LOG_DEBUG("TWI: Event: %s.", EVT_TO_STR_TWI(NRF_TWI_EVENT_STOPPED)); + return false; + } + + return true; +} + +static nrfx_err_t twi_tx_start_transfer(twi_control_block_t * p_cb, + NRF_TWI_Type * p_twi, + uint8_t const * p_data, + uint8_t length, + bool no_stop) +{ + nrfx_err_t ret_code = NRFX_SUCCESS; + volatile int32_t hw_timeout; + + hw_timeout = HW_TIMEOUT; + + nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_STOPPED); + nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_ERROR); + nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_TXDSENT); + nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_RXDREADY); + nrf_twi_shorts_set(p_twi, 0); + + p_cb->bytes_transferred = 0; + p_cb->error = false; + + // In case TWI is suspended resume its operation. + nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_RESUME); + nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STARTTX); + + (void)twi_send_byte(p_twi, p_data, length, &p_cb->bytes_transferred, no_stop); + + if (p_cb->handler) + { + p_cb->int_mask = NRF_TWI_INT_STOPPED_MASK | + NRF_TWI_INT_ERROR_MASK | + NRF_TWI_INT_TXDSENT_MASK | + NRF_TWI_INT_RXDREADY_MASK; + nrf_twi_int_enable(p_twi, p_cb->int_mask); + } + else + { + while ((hw_timeout > 0) && + twi_transfer(p_twi, + &p_cb->error, + &p_cb->bytes_transferred, + (uint8_t *)p_data, + length, + no_stop)) + { + hw_timeout--; + } + + if (p_cb->error) + { + uint32_t errorsrc = nrf_twi_errorsrc_get_and_clear(p_twi); + + if (errorsrc) + { + ret_code = twi_process_error(errorsrc); + } + } + + if (hw_timeout <= 0) + { + nrf_twi_disable(p_twi); + nrf_twi_enable(p_twi); + ret_code = NRFX_ERROR_INTERNAL; + } + + } + return ret_code; +} + +static nrfx_err_t twi_rx_start_transfer(twi_control_block_t * p_cb, + NRF_TWI_Type * p_twi, + uint8_t const * p_data, + uint8_t length) +{ + nrfx_err_t ret_code = NRFX_SUCCESS; + volatile int32_t hw_timeout; + + hw_timeout = HW_TIMEOUT; + + nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_STOPPED); + nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_ERROR); + nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_TXDSENT); + nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_RXDREADY); + + p_cb->bytes_transferred = 0; + p_cb->error = false; + + if (length == 1) + { + nrf_twi_shorts_set(p_twi, NRF_TWI_SHORT_BB_STOP_MASK); + } + else + { + nrf_twi_shorts_set(p_twi, NRF_TWI_SHORT_BB_SUSPEND_MASK); + } + // In case TWI is suspended resume its operation. + nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_RESUME); + nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STARTRX); + + if (p_cb->handler) + { + p_cb->int_mask = NRF_TWI_INT_STOPPED_MASK | + NRF_TWI_INT_ERROR_MASK | + NRF_TWI_INT_TXDSENT_MASK | + NRF_TWI_INT_RXDREADY_MASK; + nrf_twi_int_enable(p_twi, p_cb->int_mask); + } + else + { + while ((hw_timeout > 0) && + twi_transfer(p_twi, + &p_cb->error, + &p_cb->bytes_transferred, + (uint8_t*)p_data, + length, + false)) + { + hw_timeout--; + } + + if (p_cb->error) + { + uint32_t errorsrc = nrf_twi_errorsrc_get_and_clear(p_twi); + + if (errorsrc) + { + ret_code = twi_process_error(errorsrc); + } + } + if (hw_timeout <= 0) + { + nrf_twi_disable(p_twi); + nrf_twi_enable(p_twi); + ret_code = NRFX_ERROR_INTERNAL; + } + } + return ret_code; +} + +__STATIC_INLINE nrfx_err_t twi_xfer(twi_control_block_t * p_cb, + NRF_TWI_Type * p_twi, + nrfx_twi_xfer_desc_t const * p_xfer_desc, + uint32_t flags) +{ + + nrfx_err_t err_code = NRFX_SUCCESS; + + /* Block TWI interrupts to ensure that function is not interrupted by TWI interrupt. */ + nrf_twi_int_disable(p_twi, NRF_TWI_ALL_INTS_MASK); + + if (p_cb->busy) + { + nrf_twi_int_enable(p_twi, p_cb->int_mask); + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + else + { + p_cb->busy = (NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER & flags) ? false : true; + } + + p_cb->flags = flags; + p_cb->xfer_desc = *p_xfer_desc; + p_cb->curr_length = p_xfer_desc->primary_length; + p_cb->p_curr_buf = p_xfer_desc->p_primary_buf; + nrf_twi_address_set(p_twi, p_xfer_desc->address); + + if (p_xfer_desc->type != NRFX_TWI_XFER_RX) + { + p_cb->curr_no_stop = ((p_xfer_desc->type == NRFX_TWI_XFER_TX) && + !(flags & NRFX_TWI_FLAG_TX_NO_STOP)) ? false : true; + + err_code = twi_tx_start_transfer(p_cb, + p_twi, + p_xfer_desc->p_primary_buf, + p_xfer_desc->primary_length, + p_cb->curr_no_stop); + } + else + { + p_cb->curr_no_stop = false; + + err_code = twi_rx_start_transfer(p_cb, + p_twi, + p_xfer_desc->p_primary_buf, + p_xfer_desc->primary_length); + } + if (p_cb->handler == NULL) + { + p_cb->busy = false; + } + return err_code; +} + +bool nrfx_twi_is_busy(nrfx_twi_t const * p_instance) +{ + twi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + return p_cb->busy; +} + +nrfx_err_t nrfx_twi_xfer(nrfx_twi_t const * p_instance, + nrfx_twi_xfer_desc_t const * p_xfer_desc, + uint32_t flags) +{ + + nrfx_err_t err_code = NRFX_SUCCESS; + twi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + // TXRX and TXTX transfers are supported only in non-blocking mode. + NRFX_ASSERT( !((p_cb->handler == NULL) && (p_xfer_desc->type == NRFX_TWI_XFER_TXRX))); + NRFX_ASSERT( !((p_cb->handler == NULL) && (p_xfer_desc->type == NRFX_TWI_XFER_TXTX))); + + NRFX_LOG_INFO("Transfer type: %s.", TRANSFER_TO_STR(p_xfer_desc->type)); + NRFX_LOG_INFO("Transfer buffers length: primary: %d, secondary: %d.", + p_xfer_desc->primary_length, + p_xfer_desc->secondary_length); + NRFX_LOG_DEBUG("Primary buffer data:"); + NRFX_LOG_HEXDUMP_DEBUG(p_xfer_desc->p_primary_buf, + p_xfer_desc->primary_length * sizeof(p_xfer_desc->p_primary_buf[0])); + NRFX_LOG_DEBUG("Secondary buffer data:"); + NRFX_LOG_HEXDUMP_DEBUG(p_xfer_desc->p_secondary_buf, + p_xfer_desc->secondary_length * sizeof(p_xfer_desc->p_secondary_buf[0])); + + err_code = twi_xfer(p_cb, (NRF_TWI_Type *)p_instance->p_twi, p_xfer_desc, flags); + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +nrfx_err_t nrfx_twi_tx(nrfx_twi_t const * p_instance, + uint8_t address, + uint8_t const * p_data, + size_t length, + bool no_stop) +{ + nrfx_twi_xfer_desc_t xfer = NRFX_TWI_XFER_DESC_TX(address, (uint8_t*)p_data, length); + + return nrfx_twi_xfer(p_instance, &xfer, no_stop ? NRFX_TWI_FLAG_TX_NO_STOP : 0); +} + +nrfx_err_t nrfx_twi_rx(nrfx_twi_t const * p_instance, + uint8_t address, + uint8_t * p_data, + size_t length) +{ + nrfx_twi_xfer_desc_t xfer = NRFX_TWI_XFER_DESC_RX(address, p_data, length); + return nrfx_twi_xfer(p_instance, &xfer, 0); +} + +size_t nrfx_twi_data_count_get(nrfx_twi_t const * const p_instance) +{ + return m_cb[p_instance->drv_inst_idx].bytes_transferred; +} + +uint32_t nrfx_twi_stopped_event_get(nrfx_twi_t const * p_instance) +{ + return (uint32_t)nrf_twi_event_address_get(p_instance->p_twi, NRF_TWI_EVENT_STOPPED); +} + +static void twi_irq_handler(NRF_TWI_Type * p_twi, twi_control_block_t * p_cb) +{ + NRFX_ASSERT(p_cb->handler); + + if (twi_transfer(p_twi, + &p_cb->error, + &p_cb->bytes_transferred, + p_cb->p_curr_buf, + p_cb->curr_length, + p_cb->curr_no_stop )) + { + return; + } + + if (!p_cb->error && + ((p_cb->xfer_desc.type == NRFX_TWI_XFER_TXRX) || + (p_cb->xfer_desc.type == NRFX_TWI_XFER_TXTX)) && + p_cb->p_curr_buf == p_cb->xfer_desc.p_primary_buf) + { + p_cb->p_curr_buf = p_cb->xfer_desc.p_secondary_buf; + p_cb->curr_length = p_cb->xfer_desc.secondary_length; + p_cb->curr_no_stop = (p_cb->flags & NRFX_TWI_FLAG_TX_NO_STOP); + + if (p_cb->xfer_desc.type == NRFX_TWI_XFER_TXTX) + { + (void)twi_tx_start_transfer(p_cb, + p_twi, + p_cb->p_curr_buf, + p_cb->curr_length, + p_cb->curr_no_stop); + } + else + { + (void)twi_rx_start_transfer(p_cb, p_twi, p_cb->p_curr_buf, p_cb->curr_length); + } + } + else + { + nrfx_twi_evt_t event; + event.xfer_desc = p_cb->xfer_desc; + + if (p_cb->error) + { + uint32_t errorsrc = nrf_twi_errorsrc_get_and_clear(p_twi); + if (errorsrc & NRF_TWI_ERROR_ADDRESS_NACK) + { + event.type = NRFX_TWI_EVT_ADDRESS_NACK; + NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRFX_TWI_EVT_ADDRESS_NACK)); + } + else if (errorsrc & NRF_TWI_ERROR_DATA_NACK) + { + event.type = NRFX_TWI_EVT_DATA_NACK; + NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRFX_TWI_EVT_DATA_NACK)); + } + } + else + { + event.type = NRFX_TWI_EVT_DONE; + NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRFX_TWI_EVT_DONE)); + } + + p_cb->busy = false; + + if (!(NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER & p_cb->flags)) + { + p_cb->handler(&event, p_cb->p_context); + } + } + +} + +#if NRFX_CHECK(NRFX_TWI0_ENABLED) +void nrfx_twi_0_irq_handler(void) +{ + twi_irq_handler(NRF_TWI0, &m_cb[NRFX_TWI0_INST_IDX]); +} +#endif + +#if NRFX_CHECK(NRFX_TWI1_ENABLED) +void nrfx_twi_1_irq_handler(void) +{ + twi_irq_handler(NRF_TWI1, &m_cb[NRFX_TWI1_INST_IDX]); +} +#endif + +#endif // NRFX_CHECK(NRFX_TWI_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_twim.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_twim.c new file mode 100644 index 00000000000..7d9cb36001e --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_twim.c @@ -0,0 +1,664 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_TWIM_ENABLED) + +#if !(NRFX_CHECK(NRFX_TWIM0_ENABLED) || NRFX_CHECK(NRFX_TWIM1_ENABLED)) +#error "No enabled TWIM instances. Check ." +#endif + +#include +#include +#include "prs/nrfx_prs.h" + +#define NRFX_LOG_MODULE TWIM +#include + +#define EVT_TO_STR(event) \ + (event == NRFX_TWIM_EVT_DONE ? "EVT_DONE" : \ + (event == NRFX_TWIM_EVT_ADDRESS_NACK ? "EVT_ADDRESS_NACK" : \ + (event == NRFX_TWIM_EVT_DATA_NACK ? "EVT_DATA_NACK" : \ + "UNKNOWN ERROR"))) + +#define EVT_TO_STR_TWIM(event) \ + (event == NRF_TWIM_EVENT_STOPPED ? "NRF_TWIM_EVENT_STOPPED" : \ + (event == NRF_TWIM_EVENT_ERROR ? "NRF_TWIM_EVENT_ERROR" : \ + (event == NRF_TWIM_EVENT_SUSPENDED ? "NRF_TWIM_EVENT_SUSPENDED" : \ + (event == NRF_TWIM_EVENT_RXSTARTED ? "NRF_TWIM_EVENT_RXSTARTED" : \ + (event == NRF_TWIM_EVENT_TXSTARTED ? "NRF_TWIM_EVENT_TXSTARTED" : \ + (event == NRF_TWIM_EVENT_LASTRX ? "NRF_TWIM_EVENT_LASTRX" : \ + (event == NRF_TWIM_EVENT_LASTTX ? "NRF_TWIM_EVENT_LASTTX" : \ + "UNKNOWN ERROR"))))))) + +#define TRANSFER_TO_STR(type) \ + (type == NRFX_TWIM_XFER_TX ? "XFER_TX" : \ + (type == NRFX_TWIM_XFER_RX ? "XFER_RX" : \ + (type == NRFX_TWIM_XFER_TXRX ? "XFER_TXRX" : \ + (type == NRFX_TWIM_XFER_TXTX ? "XFER_TXTX" : \ + "UNKNOWN TRANSFER TYPE")))) + +#define TWIM_PIN_INIT(_pin) nrf_gpio_cfg((_pin), \ + NRF_GPIO_PIN_DIR_INPUT, \ + NRF_GPIO_PIN_INPUT_CONNECT, \ + NRF_GPIO_PIN_PULLUP, \ + NRF_GPIO_PIN_S0D1, \ + NRF_GPIO_PIN_NOSENSE) + +#define TWIMX_LENGTH_VALIDATE(peripheral, drv_inst_idx, len1, len2) \ + (((drv_inst_idx) == NRFX_CONCAT_3(NRFX_, peripheral, _INST_IDX)) && \ + NRFX_EASYDMA_LENGTH_VALIDATE(peripheral, len1, len2)) + +#if NRFX_CHECK(NRFX_TWIM0_ENABLED) +#define TWIM0_LENGTH_VALIDATE(...) TWIMX_LENGTH_VALIDATE(TWIM0, __VA_ARGS__) +#else +#define TWIM0_LENGTH_VALIDATE(...) 0 +#endif + +#if NRFX_CHECK(NRFX_TWIM1_ENABLED) +#define TWIM1_LENGTH_VALIDATE(...) TWIMX_LENGTH_VALIDATE(TWIM1, __VA_ARGS__) +#else +#define TWIM1_LENGTH_VALIDATE(...) 0 +#endif + +#define TWIM_LENGTH_VALIDATE(drv_inst_idx, len1, len2) \ + (TWIM0_LENGTH_VALIDATE(drv_inst_idx, len1, len2) || \ + TWIM1_LENGTH_VALIDATE(drv_inst_idx, len1, len2)) + +// Control block - driver instance local data. +typedef struct +{ + nrfx_twim_evt_handler_t handler; + void * p_context; + volatile uint32_t int_mask; + nrfx_twim_xfer_desc_t xfer_desc; + uint32_t flags; + uint8_t * p_curr_buf; + size_t curr_length; + bool curr_no_stop; + nrfx_drv_state_t state; + bool error; + volatile bool busy; + bool repeated; + uint8_t bytes_transferred; + bool hold_bus_uninit; +#if NRFX_CHECK(NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED) + nrf_twim_frequency_t bus_frequency; +#endif +} twim_control_block_t; + +static twim_control_block_t m_cb[NRFX_TWIM_ENABLED_COUNT]; + +static nrfx_err_t twi_process_error(uint32_t errorsrc) +{ + nrfx_err_t ret = NRFX_ERROR_INTERNAL; + + if (errorsrc & NRF_TWIM_ERROR_ADDRESS_NACK) + { + ret = NRFX_ERROR_DRV_TWI_ERR_ANACK; + } + + if (errorsrc & NRF_TWIM_ERROR_DATA_NACK) + { + ret = NRFX_ERROR_DRV_TWI_ERR_DNACK; + } + + return ret; +} + +nrfx_err_t nrfx_twim_init(nrfx_twim_t const * p_instance, + nrfx_twim_config_t const * p_config, + nrfx_twim_evt_handler_t event_handler, + void * p_context) +{ + NRFX_ASSERT(p_config); + NRFX_ASSERT(p_config->scl != p_config->sda); + twim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + nrfx_err_t err_code; + + if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) + { + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + +#if NRFX_CHECK(NRFX_PRS_ENABLED) + static nrfx_irq_handler_t const irq_handlers[NRFX_TWIM_ENABLED_COUNT] = { + #if NRFX_CHECK(NRFX_TWIM0_ENABLED) + nrfx_twim_0_irq_handler, + #endif + #if NRFX_CHECK(NRFX_TWIM1_ENABLED) + nrfx_twim_1_irq_handler, + #endif + }; + if (nrfx_prs_acquire(p_instance->p_twim, + irq_handlers[p_instance->drv_inst_idx]) != NRFX_SUCCESS) + { + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } +#endif // NRFX_CHECK(NRFX_PRS_ENABLED) + + p_cb->handler = event_handler; + p_cb->p_context = p_context; + p_cb->int_mask = 0; + p_cb->repeated = false; + p_cb->busy = false; + p_cb->hold_bus_uninit = p_config->hold_bus_uninit; +#if NRFX_CHECK(NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED) + p_cb->bus_frequency = (nrf_twim_frequency_t)p_config->frequency; +#endif + + /* To secure correct signal levels on the pins used by the TWI + master when the system is in OFF mode, and when the TWI master is + disabled, these pins must be configured in the GPIO peripheral. + */ + TWIM_PIN_INIT(p_config->scl); + TWIM_PIN_INIT(p_config->sda); + + NRF_TWIM_Type * p_twim = p_instance->p_twim; + nrf_twim_pins_set(p_twim, p_config->scl, p_config->sda); + nrf_twim_frequency_set(p_twim, + (nrf_twim_frequency_t)p_config->frequency); + + if (p_cb->handler) + { + NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(p_instance->p_twim), + p_config->interrupt_priority); + NRFX_IRQ_ENABLE(nrfx_get_irq_number(p_instance->p_twim)); + } + + p_cb->state = NRFX_DRV_STATE_INITIALIZED; + + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +void nrfx_twim_uninit(nrfx_twim_t const * p_instance) +{ + twim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + + if (p_cb->handler) + { + NRFX_IRQ_DISABLE(nrfx_get_irq_number(p_instance->p_twim)); + } + nrfx_twim_disable(p_instance); + +#if NRFX_CHECK(NRFX_PRS_ENABLED) + nrfx_prs_release(p_instance->p_twim); +#endif + + if (!p_cb->hold_bus_uninit) + { + nrf_gpio_cfg_default(p_instance->p_twim->PSEL.SCL); + nrf_gpio_cfg_default(p_instance->p_twim->PSEL.SDA); + } + + p_cb->state = NRFX_DRV_STATE_UNINITIALIZED; + NRFX_LOG_INFO("Instance uninitialized: %d.", p_instance->drv_inst_idx); +} + +void nrfx_twim_enable(nrfx_twim_t const * p_instance) +{ + twim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_INITIALIZED); + + nrf_twim_enable(p_instance->p_twim); + + p_cb->state = NRFX_DRV_STATE_POWERED_ON; + NRFX_LOG_INFO("Instance enabled: %d.", p_instance->drv_inst_idx); +} + +void nrfx_twim_disable(nrfx_twim_t const * p_instance) +{ + twim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + + NRF_TWIM_Type * p_twim = p_instance->p_twim; + p_cb->int_mask = 0; + nrf_twim_int_disable(p_twim, NRF_TWIM_ALL_INTS_MASK); + nrf_twim_shorts_disable(p_twim, NRF_TWIM_ALL_SHORTS_MASK); + nrf_twim_disable(p_twim); + + p_cb->state = NRFX_DRV_STATE_INITIALIZED; + NRFX_LOG_INFO("Instance disabled: %d.", p_instance->drv_inst_idx); +} + + +bool nrfx_twim_is_busy(nrfx_twim_t const * p_instance) +{ + twim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + return p_cb->busy; +} + + +__STATIC_INLINE void twim_list_enable_handle(NRF_TWIM_Type * p_twim, uint32_t flags) +{ + if (NRFX_TWIM_FLAG_TX_POSTINC & flags) + { + nrf_twim_tx_list_enable(p_twim); + } + else + { + nrf_twim_tx_list_disable(p_twim); + } + + if (NRFX_TWIM_FLAG_RX_POSTINC & flags) + { + nrf_twim_rx_list_enable(p_twim); + } + else + { + nrf_twim_rx_list_disable(p_twim); + } +} +__STATIC_INLINE nrfx_err_t twim_xfer(twim_control_block_t * p_cb, + NRF_TWIM_Type * p_twim, + nrfx_twim_xfer_desc_t const * p_xfer_desc, + uint32_t flags) +{ + nrfx_err_t err_code = NRFX_SUCCESS; + nrf_twim_task_t start_task = NRF_TWIM_TASK_STARTTX; + nrf_twim_event_t evt_to_wait = NRF_TWIM_EVENT_STOPPED; + + if (!nrfx_is_in_ram(p_xfer_desc->p_primary_buf)) + { + err_code = NRFX_ERROR_INVALID_ADDR; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + /* Block TWI interrupts to ensure that function is not interrupted by TWI interrupt. */ + nrf_twim_int_disable(p_twim, NRF_TWIM_ALL_INTS_MASK); + if (p_cb->busy) + { + nrf_twim_int_enable(p_twim, p_cb->int_mask); + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + else + { + p_cb->busy = ((NRFX_TWIM_FLAG_NO_XFER_EVT_HANDLER & flags) || + (NRFX_TWIM_FLAG_REPEATED_XFER & flags)) ? false: true; + } + + p_cb->xfer_desc = *p_xfer_desc; + p_cb->repeated = (flags & NRFX_TWIM_FLAG_REPEATED_XFER) ? true : false; + nrf_twim_address_set(p_twim, p_xfer_desc->address); + + nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_STOPPED); + nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_ERROR); + + twim_list_enable_handle(p_twim, flags); + switch (p_xfer_desc->type) + { + case NRFX_TWIM_XFER_TXTX: + NRFX_ASSERT(!(flags & NRFX_TWIM_FLAG_REPEATED_XFER)); + NRFX_ASSERT(!(flags & NRFX_TWIM_FLAG_HOLD_XFER)); + NRFX_ASSERT(!(flags & NRFX_TWIM_FLAG_NO_XFER_EVT_HANDLER)); + if (!nrfx_is_in_ram(p_xfer_desc->p_secondary_buf)) + { + err_code = NRFX_ERROR_INVALID_ADDR; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + nrf_twim_shorts_set(p_twim, NRF_TWIM_SHORT_LASTTX_SUSPEND_MASK); + nrf_twim_tx_buffer_set(p_twim, p_xfer_desc->p_primary_buf, p_xfer_desc->primary_length); + nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_TXSTARTED); + nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_LASTTX); + nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_SUSPENDED); + nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_RESUME); + nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_STARTTX); + while (!nrf_twim_event_check(p_twim, NRF_TWIM_EVENT_TXSTARTED)) + {} + NRFX_LOG_DEBUG("TWIM: Event: %s.", EVT_TO_STR_TWIM(NRF_TWIM_EVENT_TXSTARTED)); + nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_TXSTARTED); + nrf_twim_tx_buffer_set(p_twim, p_xfer_desc->p_secondary_buf, p_xfer_desc->secondary_length); + p_cb->int_mask = NRF_TWIM_INT_SUSPENDED_MASK | NRF_TWIM_INT_ERROR_MASK; + break; + case NRFX_TWIM_XFER_TXRX: + nrf_twim_tx_buffer_set(p_twim, p_xfer_desc->p_primary_buf, p_xfer_desc->primary_length); + if (!nrfx_is_in_ram(p_xfer_desc->p_secondary_buf)) + { + err_code = NRFX_ERROR_INVALID_ADDR; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + nrf_twim_rx_buffer_set(p_twim, p_xfer_desc->p_secondary_buf, p_xfer_desc->secondary_length); + nrf_twim_shorts_set(p_twim, NRF_TWIM_SHORT_LASTTX_STARTRX_MASK | + NRF_TWIM_SHORT_LASTRX_STOP_MASK); + p_cb->int_mask = NRF_TWIM_INT_STOPPED_MASK | NRF_TWIM_INT_ERROR_MASK; + break; + case NRFX_TWIM_XFER_TX: + nrf_twim_tx_buffer_set(p_twim, p_xfer_desc->p_primary_buf, p_xfer_desc->primary_length); + if (NRFX_TWIM_FLAG_TX_NO_STOP & flags) + { + nrf_twim_shorts_set(p_twim, NRF_TWIM_SHORT_LASTTX_SUSPEND_MASK); + p_cb->int_mask = NRF_TWIM_INT_SUSPENDED_MASK | NRF_TWIM_INT_ERROR_MASK; + nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_SUSPENDED); + evt_to_wait = NRF_TWIM_EVENT_SUSPENDED; + } + else + { + nrf_twim_shorts_set(p_twim, NRF_TWIM_SHORT_LASTTX_STOP_MASK); + p_cb->int_mask = NRF_TWIM_INT_STOPPED_MASK | NRF_TWIM_INT_ERROR_MASK; + } + nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_RESUME); + break; + case NRFX_TWIM_XFER_RX: + nrf_twim_rx_buffer_set(p_twim, p_xfer_desc->p_primary_buf, p_xfer_desc->primary_length); + nrf_twim_shorts_set(p_twim, NRF_TWIM_SHORT_LASTRX_STOP_MASK); + p_cb->int_mask = NRF_TWIM_INT_STOPPED_MASK | NRF_TWIM_INT_ERROR_MASK; + start_task = NRF_TWIM_TASK_STARTRX; + nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_RESUME); + break; + default: + err_code = NRFX_ERROR_INVALID_PARAM; + break; + } + + if (!(flags & NRFX_TWIM_FLAG_HOLD_XFER) && (p_xfer_desc->type != NRFX_TWIM_XFER_TXTX)) + { + nrf_twim_task_trigger(p_twim, start_task); + } + + if (p_cb->handler) + { + if (flags & NRFX_TWIM_FLAG_NO_XFER_EVT_HANDLER) + { + p_cb->int_mask = NRF_TWIM_INT_ERROR_MASK; + } + nrf_twim_int_enable(p_twim, p_cb->int_mask); + +#if NRFX_CHECK(NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED) + if ((flags & NRFX_TWIM_FLAG_HOLD_XFER) && ((p_xfer_desc->type == NRFX_TWIM_XFER_TX) || + (p_xfer_desc->type == NRFX_TWIM_XFER_TXRX))) + { + p_cb->flags = flags; + twim_list_enable_handle(p_twim, 0); + p_twim->FREQUENCY = 0; + nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_TXSTARTED); + nrf_twim_int_enable(p_twim, NRF_TWIM_INT_TXSTARTED_MASK); + } +#endif + } + else + { + while (!nrf_twim_event_check(p_twim, evt_to_wait)) + { + if (nrf_twim_event_check(p_twim, NRF_TWIM_EVENT_ERROR)) + { + NRFX_LOG_DEBUG("TWIM: Event: %s.", EVT_TO_STR_TWIM(NRF_TWIM_EVENT_ERROR)); + nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_ERROR); + nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_RESUME); + nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_STOP); + evt_to_wait = NRF_TWIM_EVENT_STOPPED; + } + } + + uint32_t errorsrc = nrf_twim_errorsrc_get_and_clear(p_twim); + + p_cb->busy = false; + + if (errorsrc) + { + err_code = twi_process_error(errorsrc); + } + } + return err_code; +} + + +nrfx_err_t nrfx_twim_xfer(nrfx_twim_t const * p_instance, + nrfx_twim_xfer_desc_t const * p_xfer_desc, + uint32_t flags) +{ + NRFX_ASSERT(TWIM_LENGTH_VALIDATE(p_instance->drv_inst_idx, + p_xfer_desc->primary_length, + p_xfer_desc->secondary_length)); + + nrfx_err_t err_code = NRFX_SUCCESS; + twim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + // TXRX and TXTX transfers are supported only in non-blocking mode. + NRFX_ASSERT( !((p_cb->handler == NULL) && (p_xfer_desc->type == NRFX_TWIM_XFER_TXRX))); + NRFX_ASSERT( !((p_cb->handler == NULL) && (p_xfer_desc->type == NRFX_TWIM_XFER_TXTX))); + + NRFX_LOG_INFO("Transfer type: %s.", TRANSFER_TO_STR(p_xfer_desc->type)); + NRFX_LOG_INFO("Transfer buffers length: primary: %d, secondary: %d.", + p_xfer_desc->primary_length, + p_xfer_desc->secondary_length); + NRFX_LOG_DEBUG("Primary buffer data:"); + NRFX_LOG_HEXDUMP_DEBUG(p_xfer_desc->p_primary_buf, + p_xfer_desc->primary_length * sizeof(p_xfer_desc->p_primary_buf[0])); + NRFX_LOG_DEBUG("Secondary buffer data:"); + NRFX_LOG_HEXDUMP_DEBUG(p_xfer_desc->p_secondary_buf, + p_xfer_desc->secondary_length * sizeof(p_xfer_desc->p_secondary_buf[0])); + + err_code = twim_xfer(p_cb, (NRF_TWIM_Type *)p_instance->p_twim, p_xfer_desc, flags); + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +nrfx_err_t nrfx_twim_tx(nrfx_twim_t const * p_instance, + uint8_t address, + uint8_t const * p_data, + size_t length, + bool no_stop) +{ + nrfx_twim_xfer_desc_t xfer = NRFX_TWIM_XFER_DESC_TX(address, (uint8_t*)p_data, length); + + return nrfx_twim_xfer(p_instance, &xfer, no_stop ? NRFX_TWIM_FLAG_TX_NO_STOP : 0); +} + +nrfx_err_t nrfx_twim_rx(nrfx_twim_t const * p_instance, + uint8_t address, + uint8_t * p_data, + size_t length) +{ + nrfx_twim_xfer_desc_t xfer = NRFX_TWIM_XFER_DESC_RX(address, p_data, length); + return nrfx_twim_xfer(p_instance, &xfer, 0); +} + +uint32_t nrfx_twim_start_task_get(nrfx_twim_t const * p_instance, + nrfx_twim_xfer_type_t xfer_type) +{ + return (uint32_t)nrf_twim_task_address_get(p_instance->p_twim, + (xfer_type != NRFX_TWIM_XFER_RX) ? NRF_TWIM_TASK_STARTTX : NRF_TWIM_TASK_STARTRX); +} + +uint32_t nrfx_twim_stopped_event_get(nrfx_twim_t const * p_instance) +{ + return (uint32_t)nrf_twim_event_address_get(p_instance->p_twim, NRF_TWIM_EVENT_STOPPED); +} + +static void twim_irq_handler(NRF_TWIM_Type * p_twim, twim_control_block_t * p_cb) +{ + +#if NRFX_CHECK(NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED) + /* Handle only workaround case. Can be used without TWIM handler in IRQs. */ + if (nrf_twim_event_check(p_twim, NRF_TWIM_EVENT_TXSTARTED)) + { + nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_TXSTARTED); + nrf_twim_int_disable(p_twim, NRF_TWIM_INT_TXSTARTED_MASK); + if (p_twim->FREQUENCY == 0) + { + // Set enable to zero to reset TWIM internal state. + nrf_twim_disable(p_twim); + nrf_twim_enable(p_twim); + + // Set proper frequency. + nrf_twim_frequency_set(p_twim, p_cb->bus_frequency); + twim_list_enable_handle(p_twim, p_cb->flags); + + // Start proper transmission. + nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_STARTTX); + return; + } + } +#endif + + NRFX_ASSERT(p_cb->handler); + + if (nrf_twim_event_check(p_twim, NRF_TWIM_EVENT_ERROR)) + { + nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_ERROR); + NRFX_LOG_DEBUG("TWIM: Event: %s.", EVT_TO_STR_TWIM(NRF_TWIM_EVENT_ERROR)); + if (!nrf_twim_event_check(p_twim, NRF_TWIM_EVENT_STOPPED)) + { + nrf_twim_int_disable(p_twim, p_cb->int_mask); + p_cb->int_mask = NRF_TWIM_INT_STOPPED_MASK; + nrf_twim_int_enable(p_twim, p_cb->int_mask); + + nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_RESUME); + nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_STOP); + return; + } + } + + nrfx_twim_evt_t event; + + if (nrf_twim_event_check(p_twim, NRF_TWIM_EVENT_STOPPED)) + { + NRFX_LOG_DEBUG("TWIM: Event: %s.", EVT_TO_STR_TWIM(NRF_TWIM_EVENT_STOPPED)); + nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_STOPPED); + event.xfer_desc = p_cb->xfer_desc; + if (p_cb->error) + { + + event.xfer_desc.primary_length = (p_cb->xfer_desc.type == NRFX_TWIM_XFER_RX) ? + nrf_twim_rxd_amount_get(p_twim) : nrf_twim_txd_amount_get(p_twim); + event.xfer_desc.secondary_length = (p_cb->xfer_desc.type == NRFX_TWIM_XFER_TXRX) ? + nrf_twim_rxd_amount_get(p_twim) : nrf_twim_txd_amount_get(p_twim); + + } + nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_LASTTX); + nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_LASTRX); + if (!p_cb->repeated || p_cb->error) + { + nrf_twim_shorts_set(p_twim, 0); + p_cb->int_mask = 0; + nrf_twim_int_disable(p_twim, NRF_TWIM_ALL_INTS_MASK); + } + } + else + { + nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_SUSPENDED); + NRFX_LOG_DEBUG("TWIM: Event: %s.", EVT_TO_STR_TWIM(NRF_TWIM_EVENT_SUSPENDED)); + if (p_cb->xfer_desc.type == NRFX_TWIM_XFER_TX) + { + event.xfer_desc = p_cb->xfer_desc; + if (!p_cb->repeated) + { + nrf_twim_shorts_set(p_twim, 0); + p_cb->int_mask = 0; + nrf_twim_int_disable(p_twim, NRF_TWIM_ALL_INTS_MASK); + } + } + else + { + nrf_twim_shorts_set(p_twim, NRF_TWIM_SHORT_LASTTX_STOP_MASK); + p_cb->int_mask = NRF_TWIM_INT_STOPPED_MASK | NRF_TWIM_INT_ERROR_MASK; + nrf_twim_int_disable(p_twim, NRF_TWIM_ALL_INTS_MASK); + nrf_twim_int_enable(p_twim, p_cb->int_mask); + nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_STARTTX); + nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_RESUME); + return; + } + } + + uint32_t errorsrc = nrf_twim_errorsrc_get_and_clear(p_twim); + if (errorsrc & NRF_TWIM_ERROR_ADDRESS_NACK) + { + event.type = NRFX_TWIM_EVT_ADDRESS_NACK; + NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRFX_TWIM_EVT_ADDRESS_NACK)); + } + else if (errorsrc & NRF_TWIM_ERROR_DATA_NACK) + { + event.type = NRFX_TWIM_EVT_DATA_NACK; + NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRFX_TWIM_EVT_DATA_NACK)); + } + else + { + event.type = NRFX_TWIM_EVT_DONE; + NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRFX_TWIM_EVT_DONE)); + } + + if (!p_cb->repeated) + { + p_cb->busy = false; + } + p_cb->handler(&event, p_cb->p_context); +} + +#if NRFX_CHECK(NRFX_TWIM0_ENABLED) +void nrfx_twim_0_irq_handler(void) +{ + twim_irq_handler(NRF_TWIM0, &m_cb[NRFX_TWIM0_INST_IDX]); +} +#endif + +#if NRFX_CHECK(NRFX_TWIM1_ENABLED) +void nrfx_twim_1_irq_handler(void) +{ + twim_irq_handler(NRF_TWIM1, &m_cb[NRFX_TWIM1_INST_IDX]); +} +#endif + +#endif // NRFX_CHECK(NRFX_TWIM_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_twis.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_twis.c new file mode 100644 index 00000000000..9fb7a4947c8 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_twis.c @@ -0,0 +1,834 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_TWIS_ENABLED) + +#if !(NRFX_CHECK(NRFX_TWIS0_ENABLED) || NRFX_CHECK(NRFX_TWIS1_ENABLED)) +#error "No enabled TWIS instances. Check ." +#endif + +#include +#include "prs/nrfx_prs.h" + +#define NRFX_LOG_MODULE TWIS +#include + +#define EVT_TO_STR(event) \ + (event == NRF_TWIS_EVENT_STOPPED ? "NRF_TWIS_EVENT_STOPPED" : \ + (event == NRF_TWIS_EVENT_ERROR ? "NRF_TWIS_EVENT_ERROR" : \ + (event == NRF_TWIS_EVENT_RXSTARTED ? "NRF_TWIS_EVENT_RXSTARTED" : \ + (event == NRF_TWIS_EVENT_TXSTARTED ? "NRF_TWIS_EVENT_TXSTARTED" : \ + (event == NRF_TWIS_EVENT_WRITE ? "NRF_TWIS_EVENT_WRITE" : \ + (event == NRF_TWIS_EVENT_READ ? "NRF_TWIS_EVENT_READ" : \ + "UNKNOWN EVENT")))))) + + +/** + * @brief Actual state of internal state machine + * + * Current substate of powered on state. + */ +typedef enum +{ + NRFX_TWIS_SUBSTATE_IDLE, ///< No ongoing transmission + NRFX_TWIS_SUBSTATE_READ_WAITING, ///< Read request received, waiting for data + NRFX_TWIS_SUBSTATE_READ_PENDING, ///< Reading is actually pending (data sending) + NRFX_TWIS_SUBSTATE_WRITE_WAITING, ///< Write request received, waiting for data buffer + NRFX_TWIS_SUBSTATE_WRITE_PENDING, ///< Writing is actually pending (data receiving) +} nrfx_twis_substate_t; + +// Control block - driver instance local data. +typedef struct +{ + nrfx_twis_event_handler_t ev_handler; + // Internal copy of hardware errors flags merged with specific internal + // driver errors flags. + // This value can be changed in the interrupt and cleared in the main program. + // Always use Atomic load-store when updating this value in main loop. + volatile uint32_t error; + nrfx_drv_state_t state; + volatile nrfx_twis_substate_t substate; + + volatile bool semaphore; +} twis_control_block_t; +static twis_control_block_t m_cb[NRFX_TWIS_ENABLED_COUNT]; + +/** + * @brief Used interrupts mask + * + * Mask for all interrupts used by this library + */ +static const uint32_t m_used_ints_mask = NRF_TWIS_INT_STOPPED_MASK | + NRF_TWIS_INT_ERROR_MASK | + NRF_TWIS_INT_RXSTARTED_MASK | + NRF_TWIS_INT_TXSTARTED_MASK | + NRF_TWIS_INT_WRITE_MASK | + NRF_TWIS_INT_READ_MASK; + +/** + * @brief Clear all events + * + * Function clears all actually pending events + */ +static void nrfx_twis_clear_all_events(NRF_TWIS_Type * const p_reg) +{ + /* Clear all events */ + nrf_twis_event_clear(p_reg, NRF_TWIS_EVENT_STOPPED); + nrf_twis_event_clear(p_reg, NRF_TWIS_EVENT_ERROR); + nrf_twis_event_clear(p_reg, NRF_TWIS_EVENT_RXSTARTED); + nrf_twis_event_clear(p_reg, NRF_TWIS_EVENT_TXSTARTED); + nrf_twis_event_clear(p_reg, NRF_TWIS_EVENT_WRITE); + nrf_twis_event_clear(p_reg, NRF_TWIS_EVENT_READ); +} + +/** + * @brief Reset all the registers to known state + * + * This function clears all registers that requires it to known state. + * TWIS is left disabled after this function. + * All events are cleared. + * @param[out] p_reg TWIS to reset register address + */ +static inline void nrfx_twis_swreset(NRF_TWIS_Type * p_reg) +{ + /* Disable TWIS */ + nrf_twis_disable(p_reg); + + /* Disconnect pins */ + nrf_twis_pins_set(p_reg, ~0U, ~0U); + + /* Disable interrupt global for the instance */ + NRFX_IRQ_DISABLE(nrfx_get_irq_number(p_reg)); + + /* Disable interrupts */ + nrf_twis_int_disable(p_reg, ~0U); +} + +/** + * @brief Configure pin + * + * Function configures selected for work as SDA or SCL. + * @param pin Pin number to configure + */ +static inline void nrfx_twis_config_pin(uint32_t pin, nrf_gpio_pin_pull_t pull) +{ + nrf_gpio_cfg(pin, + NRF_GPIO_PIN_DIR_INPUT, + NRF_GPIO_PIN_INPUT_DISCONNECT, + pull, + NRF_GPIO_PIN_S0D1, + NRF_GPIO_PIN_NOSENSE); +} + +/** + * @brief Auxiliary function for getting event state on right bit possition + * + * This function calls @ref nrf_twis_event_get function but the the result + * is shifted to match INTEN register scheme. + * + * @param[in,out] p_reg TWIS to read event from + * @param ev Event code + * + * @return Selected event state shifted by @ref nrfx_event_to_bitpos + * + * @sa nrf_twis_event_get + * @sa nrfx_event_to_bitpos + */ +static inline uint32_t nrfx_twis_event_bit_get(NRF_TWIS_Type * p_reg, + nrf_twis_event_t ev) +{ + return (uint32_t)nrf_twis_event_get_and_clear(p_reg, ev) << nrfx_event_to_bitpos(ev); +} + +/** + * @brief Auxiliary function for checking event bit inside given flags value + * + * Function used here to check presence of the event inside given flags value. + * It transforms given event to bit possition and then checks if in given variable it is cleared. + * + * @param flags Flags to test + * @param ev Event code + * + * @retval true Flag for selected event is set + * @retval false Flag for selected event is cleared + */ +static inline bool nrfx_twis_check_bit(uint32_t flags, + nrf_twis_event_t ev) +{ + return 0 != (flags & (1U << nrfx_event_to_bitpos(ev))); +} + +/** + * @brief Auxiliary function for clearing event bit in given flags value + * + * Function used to clear selected event bit. + * + * @param flags Flags to process + * @param ev Event code to clear + * + * @return Value @em flags with cleared event bit that matches given @em ev + */ +static inline uint32_t nrfx_twis_clear_bit(uint32_t flags, + nrf_twis_event_t ev) +{ + return flags & ~(1U << nrfx_event_to_bitpos(ev)); +} + +static void call_event_handler(twis_control_block_t const * p_cb, + nrfx_twis_evt_t const * p_evt) +{ + nrfx_twis_event_handler_t handler = p_cb->ev_handler; + if (handler != NULL) + { + handler(p_evt); + } +} + +/** + * @brief Auxiliary function for error processing + * + * Function called when in current substate the event apears and it cannot be processed. + * It should be called also on ERROR event. + * If given @em error parameter has zero value the @ref NRFX_TWIS_ERROR_UNEXPECTED_EVENT + * would be set. + * + * @param p_cb Pointer to the driver instance control block. + * @param evt What error event raport to event handler + * @param error Error flags + */ +static inline void nrfx_twis_process_error(twis_control_block_t * p_cb, + nrfx_twis_evt_type_t evt, + uint32_t error) +{ + if (0 == error) + { + error = NRFX_TWIS_ERROR_UNEXPECTED_EVENT; + } + nrfx_twis_evt_t evdata; + evdata.type = evt; + evdata.data.error = error; + + p_cb->error |= error; + + call_event_handler(p_cb, &evdata); +} + +static void nrfx_twis_state_machine(NRF_TWIS_Type * p_reg, + twis_control_block_t * p_cb) +{ + if (!NRFX_TWIS_NO_SYNC_MODE) + { + /* Exclude parallel processing of this function */ + if (p_cb->semaphore) + { + return; + } + p_cb->semaphore = 1; + } + + /* Event data structure to be passed into event handler */ + nrfx_twis_evt_t evdata; + /* Current substate copy */ + nrfx_twis_substate_t substate = p_cb->substate; + /* Event flags */ + uint32_t ev = 0; + + /* Get all events */ + ev |= nrfx_twis_event_bit_get(p_reg, NRF_TWIS_EVENT_STOPPED); + ev |= nrfx_twis_event_bit_get(p_reg, NRF_TWIS_EVENT_ERROR); + ev |= nrfx_twis_event_bit_get(p_reg, NRF_TWIS_EVENT_RXSTARTED); + ev |= nrfx_twis_event_bit_get(p_reg, NRF_TWIS_EVENT_TXSTARTED); + ev |= nrfx_twis_event_bit_get(p_reg, NRF_TWIS_EVENT_WRITE); + ev |= nrfx_twis_event_bit_get(p_reg, NRF_TWIS_EVENT_READ); + + /* State machine */ + while (0 != ev) + { + switch (substate) + { + case NRFX_TWIS_SUBSTATE_IDLE: + if (nrfx_twis_check_bit(ev, NRF_TWIS_EVENT_STOPPED)) + { + /* Stopped event is always allowed in IDLE state - just ignore */ + ev = nrfx_twis_clear_bit(ev, NRF_TWIS_EVENT_STOPPED); + } + else if (nrfx_twis_check_bit(ev, NRF_TWIS_EVENT_READ)) + { + evdata.type = NRFX_TWIS_EVT_READ_REQ; + if (nrfx_twis_check_bit(ev, NRF_TWIS_EVENT_TXSTARTED)) + { + substate = NRFX_TWIS_SUBSTATE_READ_PENDING; + evdata.data.buf_req = false; + } + else + { + substate = NRFX_TWIS_SUBSTATE_READ_WAITING; + evdata.data.buf_req = true; + } + call_event_handler(p_cb, &evdata); + ev = nrfx_twis_clear_bit(ev, NRF_TWIS_EVENT_READ); + ev = nrfx_twis_clear_bit(ev, NRF_TWIS_EVENT_TXSTARTED); + ev = nrfx_twis_clear_bit(ev, NRF_TWIS_EVENT_WRITE); + ev = nrfx_twis_clear_bit(ev, NRF_TWIS_EVENT_RXSTARTED); + } + else if (nrfx_twis_check_bit(ev, NRF_TWIS_EVENT_WRITE)) + { + evdata.type = NRFX_TWIS_EVT_WRITE_REQ; + if (nrfx_twis_check_bit(ev, NRF_TWIS_EVENT_RXSTARTED)) + { + substate = NRFX_TWIS_SUBSTATE_WRITE_PENDING; + evdata.data.buf_req = false; + } + else + { + substate = NRFX_TWIS_SUBSTATE_WRITE_WAITING; + evdata.data.buf_req = true; + } + call_event_handler(p_cb, &evdata); + ev = nrfx_twis_clear_bit(ev, NRF_TWIS_EVENT_READ); + ev = nrfx_twis_clear_bit(ev, NRF_TWIS_EVENT_TXSTARTED); + ev = nrfx_twis_clear_bit(ev, NRF_TWIS_EVENT_WRITE); + ev = nrfx_twis_clear_bit(ev, NRF_TWIS_EVENT_RXSTARTED); + } + else + { + nrfx_twis_process_error(p_cb, + NRFX_TWIS_EVT_GENERAL_ERROR, + nrf_twis_error_source_get_and_clear(p_reg)); + ev = 0; + } + break; + case NRFX_TWIS_SUBSTATE_READ_WAITING: + if (nrfx_twis_check_bit(ev, NRF_TWIS_EVENT_TXSTARTED) || + nrfx_twis_check_bit(ev, NRF_TWIS_EVENT_WRITE) || + nrfx_twis_check_bit(ev, NRF_TWIS_EVENT_READ) || + nrfx_twis_check_bit(ev, NRF_TWIS_EVENT_STOPPED)) + { + substate = NRFX_TWIS_SUBSTATE_READ_PENDING; + /* Any other bits requires further processing in PENDING substate */ + ev = nrfx_twis_clear_bit(ev, NRF_TWIS_EVENT_TXSTARTED); + } + else + { + nrfx_twis_process_error(p_cb, + NRFX_TWIS_EVT_READ_ERROR, + nrf_twis_error_source_get_and_clear(p_reg)); + substate = NRFX_TWIS_SUBSTATE_IDLE; + ev = 0; + } + break; + case NRFX_TWIS_SUBSTATE_READ_PENDING: + if (nrfx_twis_check_bit(ev, NRF_TWIS_EVENT_WRITE) || + nrfx_twis_check_bit(ev, NRF_TWIS_EVENT_READ) || + nrfx_twis_check_bit(ev, NRF_TWIS_EVENT_STOPPED)) + { + evdata.type = NRFX_TWIS_EVT_READ_DONE; + evdata.data.tx_amount = nrf_twis_tx_amount_get(p_reg); + NRFX_LOG_INFO("Transfer tx_len:%d", evdata.data.tx_amount); + NRFX_LOG_DEBUG("Tx data:"); + NRFX_LOG_HEXDUMP_DEBUG((uint8_t const *)p_reg->TXD.PTR, + evdata.data.tx_amount * sizeof(uint8_t)); + call_event_handler(p_cb, &evdata); + /* Go to idle and repeat the state machine if READ or WRITE events detected. + * This time READ or WRITE would be started */ + substate = NRFX_TWIS_SUBSTATE_IDLE; + ev = nrfx_twis_clear_bit(ev, NRF_TWIS_EVENT_STOPPED); + } + else + { + nrfx_twis_process_error(p_cb, + NRFX_TWIS_EVT_READ_ERROR, + nrf_twis_error_source_get_and_clear(p_reg)); + substate = NRFX_TWIS_SUBSTATE_IDLE; + ev = 0; + } + break; + case NRFX_TWIS_SUBSTATE_WRITE_WAITING: + if (nrfx_twis_check_bit(ev, NRF_TWIS_EVENT_RXSTARTED) || + nrfx_twis_check_bit(ev, NRF_TWIS_EVENT_WRITE) || + nrfx_twis_check_bit(ev, NRF_TWIS_EVENT_READ) || + nrfx_twis_check_bit(ev, NRF_TWIS_EVENT_STOPPED)) + { + substate = NRFX_TWIS_SUBSTATE_WRITE_PENDING; + /* Any other bits requires further processing in PENDING substate */ + ev = nrfx_twis_clear_bit(ev, NRF_TWIS_EVENT_RXSTARTED); + } + else + { + nrfx_twis_process_error(p_cb, + NRFX_TWIS_EVT_WRITE_ERROR, + nrf_twis_error_source_get_and_clear(p_reg)); + substate = NRFX_TWIS_SUBSTATE_IDLE; + ev = 0; + } + break; + case NRFX_TWIS_SUBSTATE_WRITE_PENDING: + if (nrfx_twis_check_bit(ev, NRF_TWIS_EVENT_WRITE) || + nrfx_twis_check_bit(ev, NRF_TWIS_EVENT_READ) || + nrfx_twis_check_bit(ev, NRF_TWIS_EVENT_STOPPED)) + { + evdata.type = NRFX_TWIS_EVT_WRITE_DONE; + evdata.data.rx_amount = nrf_twis_rx_amount_get(p_reg); + call_event_handler(p_cb, &evdata); + /* Go to idle and repeat the state machine if READ or WRITE events detected. + * This time READ or WRITE would be started */ + substate = NRFX_TWIS_SUBSTATE_IDLE; + ev = nrfx_twis_clear_bit(ev, NRF_TWIS_EVENT_STOPPED); + } + else + { + nrfx_twis_process_error(p_cb, + NRFX_TWIS_EVT_WRITE_ERROR, + nrf_twis_error_source_get_and_clear(p_reg)); + substate = NRFX_TWIS_SUBSTATE_IDLE; + ev = 0; + } + break; + default: + substate = NRFX_TWIS_SUBSTATE_IDLE; + /* Do not clear any events and repeat the machine */ + break; + } + } + + p_cb->substate = substate; + if (!NRFX_TWIS_NO_SYNC_MODE) + { + p_cb->semaphore = 0; + } +} + + +static inline void nrfx_twis_preprocess_status(nrfx_twis_t const * p_instance) +{ + if (!NRFX_TWIS_NO_SYNC_MODE) + { + NRF_TWIS_Type * p_reg = p_instance->p_reg; + twis_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + if (NULL == p_cb->ev_handler) + { + nrfx_twis_state_machine(p_reg, p_cb); + } + } +} + + +/* ------------------------------------------------------------------------- + * Implementation of interface functions + * + */ + + +nrfx_err_t nrfx_twis_init(nrfx_twis_t const * p_instance, + nrfx_twis_config_t const * p_config, + nrfx_twis_event_handler_t event_handler) +{ + NRFX_ASSERT(p_config); + NRFX_ASSERT(p_config->scl != p_config->sda); + nrfx_err_t err_code; + + NRF_TWIS_Type * p_reg = p_instance->p_reg; + twis_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) + { + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + +#if NRFX_CHECK(NRFX_PRS_ENABLED) + static nrfx_irq_handler_t const irq_handlers[NRFX_TWIS_ENABLED_COUNT] = { + #if NRFX_CHECK(NRFX_TWIS0_ENABLED) + nrfx_twis_0_irq_handler, + #endif + #if NRFX_CHECK(NRFX_TWIS1_ENABLED) + nrfx_twis_1_irq_handler, + #endif + }; + if (nrfx_prs_acquire(p_reg, + irq_handlers[p_instance->drv_inst_idx]) != NRFX_SUCCESS) + { + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } +#endif // NRFX_CHECK(NRFX_PRS_ENABLED) + + if (!NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY) + { + nrfx_twis_swreset(p_reg); + } + + nrfx_twis_config_pin(p_config->scl, p_config->scl_pull); + nrfx_twis_config_pin(p_config->sda, p_config->sda_pull); + + nrf_twis_config_addr_mask_t addr_mask = (nrf_twis_config_addr_mask_t)0; + if (0 == (p_config->addr[0] | p_config->addr[1])) + { + addr_mask = NRF_TWIS_CONFIG_ADDRESS0_MASK; + } + else + { + if (0 != p_config->addr[0]) + { + addr_mask |= NRF_TWIS_CONFIG_ADDRESS0_MASK; + } + if (0 != p_config->addr[1]) + { + addr_mask |= NRF_TWIS_CONFIG_ADDRESS1_MASK; + } + } + + /* Peripheral interrupt configure + * (note - interrupts still needs to be configured in INTEN register. + * This is done in enable function) */ + NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(p_reg), + p_config->interrupt_priority); + NRFX_IRQ_ENABLE(nrfx_get_irq_number(p_reg)); + + /* Configure */ + nrf_twis_pins_set (p_reg, p_config->scl, p_config->sda); + nrf_twis_address_set (p_reg, 0, p_config->addr[0]); + nrf_twis_address_set (p_reg, 1, p_config->addr[1]); + nrf_twis_config_address_set(p_reg, addr_mask); + + /* Clear semaphore */ + if (!NRFX_TWIS_NO_SYNC_MODE) + { + p_cb->semaphore = 0; + } + /* Set internal instance variables */ + p_cb->substate = NRFX_TWIS_SUBSTATE_IDLE; + p_cb->ev_handler = event_handler; + p_cb->state = NRFX_DRV_STATE_INITIALIZED; + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + + +void nrfx_twis_uninit(nrfx_twis_t const * p_instance) +{ + NRF_TWIS_Type * p_reg = p_instance->p_reg; + twis_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + + TWIS_PSEL_Type psel = p_reg->PSEL; + + nrfx_twis_swreset(p_reg); + + /* Clear pins state if */ + if (!(TWIS_PSEL_SCL_CONNECT_Msk & psel.SCL)) + { + nrf_gpio_cfg_default(psel.SCL); + } + if (!(TWIS_PSEL_SDA_CONNECT_Msk & psel.SDA)) + { + nrf_gpio_cfg_default(psel.SDA); + } + +#if NRFX_CHECK(NRFX_PRS_ENABLED) + nrfx_prs_release(p_reg); +#endif + + /* Clear variables */ + p_cb->ev_handler = NULL; + p_cb->state = NRFX_DRV_STATE_UNINITIALIZED; +} + + +void nrfx_twis_enable(nrfx_twis_t const * p_instance) +{ + NRF_TWIS_Type * p_reg = p_instance->p_reg; + twis_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_INITIALIZED); + + nrfx_twis_clear_all_events(p_reg); + + /* Enable interrupts */ + if (NULL != p_cb->ev_handler) + { + nrf_twis_int_enable(p_reg, m_used_ints_mask); + } + + nrf_twis_enable(p_reg); + p_cb->error = 0; + p_cb->state = NRFX_DRV_STATE_POWERED_ON; + p_cb->substate = NRFX_TWIS_SUBSTATE_IDLE; +} + + +void nrfx_twis_disable(nrfx_twis_t const * p_instance) +{ + NRF_TWIS_Type * p_reg = p_instance->p_reg; + twis_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + + nrf_twis_int_disable(p_reg, m_used_ints_mask); + + nrf_twis_disable(p_reg); + p_cb->state = NRFX_DRV_STATE_INITIALIZED; +} + +/* ARM recommends not using the LDREX and STREX instructions in C code. + * This is because the compiler might generate loads and stores between + * LDREX and STREX, potentially clearing the exclusive monitor set by LDREX. + * This recommendation also applies to the byte, halfword, and doubleword + * variants LDREXB, STREXB, LDREXH, STREXH, LDREXD, and STREXD. + * + * This is the reason for the function below to be implemented in assembly. + */ +//lint -save -e578 +#if defined (__CC_ARM ) +static __ASM uint32_t nrfx_twis_error_get_and_clear_internal(uint32_t volatile * perror) +{ + mov r3, r0 + mov r1, #0 +nrfx_twis_error_get_and_clear_internal_try + ldrex r0, [r3] + strex r2, r1, [r3] + cmp r2, r1 /* did this succeed? */ + bne nrfx_twis_error_get_and_clear_internal_try /* no - try again */ + bx lr +} +#elif defined ( __GNUC__ ) +static uint32_t nrfx_twis_error_get_and_clear_internal(uint32_t volatile * perror) +{ + uint32_t ret; + uint32_t temp; + __ASM volatile( + " .syntax unified \n" + "nrfx_twis_error_get_and_clear_internal_try: \n" + " ldrex %[ret], [%[perror]] \n" + " strex %[temp], %[zero], [%[perror]] \n" + " cmp %[temp], %[zero] \n" + " bne nrfx_twis_error_get_and_clear_internal_try \n" + : /* Output */ + [ret]"=&l"(ret), + [temp]"=&l"(temp) + : /* Input */ + [zero]"l"(0), + [perror]"l"(perror) + ); + (void)temp; + return ret; +} +#elif defined ( __ICCARM__ ) +static uint32_t nrfx_twis_error_get_and_clear_internal(uint32_t volatile * perror) +{ + uint32_t ret; + uint32_t temp; + __ASM volatile( + "1: \n" + " ldrex %[ret], [%[perror]] \n" + " strex %[temp], %[zero], [%[perror]] \n" + " cmp %[temp], %[zero] \n" + " bne.n 1b \n" + : /* Output */ + [ret]"=&l"(ret), + [temp]"=&l"(temp) + : /* Input */ + [zero]"l"(0), + [perror]"l"(perror) + ); + (void)temp; + return ret; +} +#else + #error Unknown compiler +#endif +//lint -restore + +uint32_t nrfx_twis_error_get_and_clear(nrfx_twis_t const * p_instance) +{ + nrfx_twis_preprocess_status(p_instance); + /* Make sure that access to error member is atomic + * so there is no bit that is cleared if it is not copied to local variable already. */ + twis_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + return nrfx_twis_error_get_and_clear_internal(&p_cb->error); +} + + +nrfx_err_t nrfx_twis_tx_prepare(nrfx_twis_t const * p_instance, + void const * p_buf, + size_t size) +{ + nrfx_err_t err_code; + twis_control_block_t const * p_cb = &m_cb[p_instance->drv_inst_idx]; + + /* Check power state*/ + if (p_cb->state != NRFX_DRV_STATE_POWERED_ON) + { + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + /* Check data address */ + if (!nrfx_is_in_ram(p_buf)) + { + err_code = NRFX_ERROR_INVALID_ADDR; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + /* Check data size */ + if ((size & TWIS_TXD_MAXCNT_MAXCNT_Msk) != size) + { + err_code = NRFX_ERROR_INVALID_LENGTH; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + nrf_twis_tx_prepare(p_instance->p_reg, + (uint8_t const *)p_buf, + (nrf_twis_amount_t)size); + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + + +nrfx_err_t nrfx_twis_rx_prepare(nrfx_twis_t const * p_instance, + void * p_buf, + size_t size) +{ + nrfx_err_t err_code; + twis_control_block_t const * p_cb = &m_cb[p_instance->drv_inst_idx]; + + /* Check power state*/ + if (p_cb->state != NRFX_DRV_STATE_POWERED_ON) + { + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + /* Check data address */ + if (!nrfx_is_in_ram(p_buf)) + { + err_code = NRFX_ERROR_INVALID_ADDR; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + /* Check data size */ + if ((size & TWIS_RXD_MAXCNT_MAXCNT_Msk) != size) + { + err_code = NRFX_ERROR_INVALID_LENGTH; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + nrf_twis_rx_prepare(p_instance->p_reg, + (uint8_t *)p_buf, + (nrf_twis_amount_t)size); + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + + +bool nrfx_twis_is_busy(nrfx_twis_t const * p_instance) +{ + nrfx_twis_preprocess_status(p_instance); + twis_control_block_t const * p_cb = &m_cb[p_instance->drv_inst_idx]; + return NRFX_TWIS_SUBSTATE_IDLE != p_cb->substate; +} + +bool nrfx_twis_is_waiting_tx_buff(nrfx_twis_t const * p_instance) +{ + nrfx_twis_preprocess_status(p_instance); + twis_control_block_t const * p_cb = &m_cb[p_instance->drv_inst_idx]; + return NRFX_TWIS_SUBSTATE_READ_WAITING == p_cb->substate; +} + +bool nrfx_twis_is_waiting_rx_buff(nrfx_twis_t const * p_instance) +{ + nrfx_twis_preprocess_status(p_instance); + twis_control_block_t const * p_cb = &m_cb[p_instance->drv_inst_idx]; + return NRFX_TWIS_SUBSTATE_WRITE_WAITING == p_cb->substate; +} + +bool nrfx_twis_is_pending_tx(nrfx_twis_t const * p_instance) +{ + nrfx_twis_preprocess_status(p_instance); + twis_control_block_t const * p_cb = &m_cb[p_instance->drv_inst_idx]; + return NRFX_TWIS_SUBSTATE_READ_PENDING == p_cb->substate; +} + +bool nrfx_twis_is_pending_rx(nrfx_twis_t const * p_instance) +{ + nrfx_twis_preprocess_status(p_instance); + twis_control_block_t const * p_cb = &m_cb[p_instance->drv_inst_idx]; + return NRFX_TWIS_SUBSTATE_WRITE_PENDING == p_cb->substate; +} + + +#if NRFX_CHECK(NRFX_TWIS0_ENABLED) +void nrfx_twis_0_irq_handler(void) +{ + nrfx_twis_state_machine(NRF_TWIS0, &m_cb[NRFX_TWIS0_INST_IDX]); +} +#endif + +#if NRFX_CHECK(NRFX_TWIS1_ENABLED) +void nrfx_twis_1_irq_handler(void) +{ + nrfx_twis_state_machine(NRF_TWIS1, &m_cb[NRFX_TWIS1_INST_IDX]); +} +#endif + +#endif // NRFX_CHECK(NRFX_TWIS_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_uart.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_uart.c new file mode 100644 index 00000000000..8c5f487f89f --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_uart.c @@ -0,0 +1,649 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_UART_ENABLED) + +#if !NRFX_CHECK(NRFX_UART0_ENABLED) +#error "No enabled UART instances. Check ." +#endif + +#include +#include "prs/nrfx_prs.h" +#include + +#define NRFX_LOG_MODULE UART +#include + +#define EVT_TO_STR(event) \ + (event == NRF_UART_EVENT_ERROR ? "NRF_UART_EVENT_ERROR" : \ + "UNKNOWN EVENT") + + +#define TX_COUNTER_ABORT_REQ_VALUE UINT32_MAX + +typedef struct +{ + void * p_context; + nrfx_uart_event_handler_t handler; + uint8_t const * p_tx_buffer; + uint8_t * p_rx_buffer; + uint8_t * p_rx_secondary_buffer; + size_t tx_buffer_length; + size_t rx_buffer_length; + size_t rx_secondary_buffer_length; + volatile size_t tx_counter; + volatile size_t rx_counter; + volatile bool tx_abort; + bool rx_enabled; + nrfx_drv_state_t state; +} uart_control_block_t; +static uart_control_block_t m_cb[NRFX_UART_ENABLED_COUNT]; + +static void apply_config(nrfx_uart_t const * p_instance, + nrfx_uart_config_t const * p_config) +{ + if (p_config->pseltxd != NRF_UART_PSEL_DISCONNECTED) + { + nrf_gpio_pin_set(p_config->pseltxd); + nrf_gpio_cfg_output(p_config->pseltxd); + } + if (p_config->pselrxd != NRF_UART_PSEL_DISCONNECTED) + { + nrf_gpio_cfg_input(p_config->pselrxd, NRF_GPIO_PIN_NOPULL); + } + + nrf_uart_baudrate_set(p_instance->p_reg, p_config->baudrate); + nrf_uart_configure(p_instance->p_reg, p_config->parity, p_config->hwfc); + nrf_uart_txrx_pins_set(p_instance->p_reg, p_config->pseltxd, p_config->pselrxd); + if (p_config->hwfc == NRF_UART_HWFC_ENABLED) + { + if (p_config->pselcts != NRF_UART_PSEL_DISCONNECTED) + { + nrf_gpio_cfg_input(p_config->pselcts, NRF_GPIO_PIN_NOPULL); + } + if (p_config->pselrts != NRF_UART_PSEL_DISCONNECTED) + { + nrf_gpio_pin_set(p_config->pselrts); + nrf_gpio_cfg_output(p_config->pselrts); + } + nrf_uart_hwfc_pins_set(p_instance->p_reg, p_config->pselrts, p_config->pselcts); + } +} + +static void interrupts_enable(nrfx_uart_t const * p_instance, + uint8_t interrupt_priority) +{ + nrf_uart_event_clear(p_instance->p_reg, NRF_UART_EVENT_TXDRDY); + nrf_uart_event_clear(p_instance->p_reg, NRF_UART_EVENT_RXTO); + nrf_uart_int_enable(p_instance->p_reg, NRF_UART_INT_MASK_TXDRDY | + NRF_UART_INT_MASK_RXTO); + NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number((void *)p_instance->p_reg), + interrupt_priority); + NRFX_IRQ_ENABLE(nrfx_get_irq_number((void *)p_instance->p_reg)); +} + +static void interrupts_disable(nrfx_uart_t const * p_instance) +{ + nrf_uart_int_disable(p_instance->p_reg, NRF_UART_INT_MASK_RXDRDY | + NRF_UART_INT_MASK_TXDRDY | + NRF_UART_INT_MASK_ERROR | + NRF_UART_INT_MASK_RXTO); + NRFX_IRQ_DISABLE(nrfx_get_irq_number((void *)p_instance->p_reg)); +} + +static void pins_to_default(nrfx_uart_t const * p_instance) +{ + /* Reset pins to default states */ + uint32_t txd; + uint32_t rxd; + uint32_t rts; + uint32_t cts; + + txd = nrf_uart_tx_pin_get(p_instance->p_reg); + rxd = nrf_uart_rx_pin_get(p_instance->p_reg); + rts = nrf_uart_rts_pin_get(p_instance->p_reg); + cts = nrf_uart_cts_pin_get(p_instance->p_reg); + nrf_uart_txrx_pins_disconnect(p_instance->p_reg); + nrf_uart_hwfc_pins_disconnect(p_instance->p_reg); + + if (txd != NRF_UART_PSEL_DISCONNECTED) + { + nrf_gpio_cfg_default(txd); + } + if (rxd != NRF_UART_PSEL_DISCONNECTED) + { + nrf_gpio_cfg_default(rxd); + } + if (cts != NRF_UART_PSEL_DISCONNECTED) + { + nrf_gpio_cfg_default(cts); + } + if (rts != NRF_UART_PSEL_DISCONNECTED) + { + nrf_gpio_cfg_default(rts); + } +} + +nrfx_err_t nrfx_uart_init(nrfx_uart_t const * p_instance, + nrfx_uart_config_t const * p_config, + nrfx_uart_event_handler_t event_handler) +{ + NRFX_ASSERT(p_config); + uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + nrfx_err_t err_code = NRFX_SUCCESS; + + if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) + { + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + +#if NRFX_CHECK(NRFX_PRS_ENABLED) + static nrfx_irq_handler_t const irq_handlers[NRFX_UART_ENABLED_COUNT] = { + #if NRFX_CHECK(NRFX_UART0_ENABLED) + nrfx_uart_0_irq_handler, + #endif + }; + if (nrfx_prs_acquire(p_instance->p_reg, + irq_handlers[p_instance->drv_inst_idx]) != NRFX_SUCCESS) + { + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } +#endif // NRFX_CHECK(NRFX_PRS_ENABLED) + + apply_config(p_instance, p_config); + + p_cb->handler = event_handler; + p_cb->p_context = p_config->p_context; + + if (p_cb->handler) + { + interrupts_enable(p_instance, p_config->interrupt_priority); + } + + nrf_uart_enable(p_instance->p_reg); + p_cb->rx_buffer_length = 0; + p_cb->rx_secondary_buffer_length = 0; + p_cb->rx_enabled = false; + p_cb->tx_buffer_length = 0; + p_cb->state = NRFX_DRV_STATE_INITIALIZED; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +void nrfx_uart_uninit(nrfx_uart_t const * p_instance) +{ + uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + nrf_uart_disable(p_instance->p_reg); + + if (p_cb->handler) + { + interrupts_disable(p_instance); + } + + pins_to_default(p_instance); + +#if NRFX_CHECK(NRFX_PRS_ENABLED) + nrfx_prs_release(p_instance->p_reg); +#endif + + p_cb->state = NRFX_DRV_STATE_UNINITIALIZED; + p_cb->handler = NULL; + NRFX_LOG_INFO("Instance uninitialized: %d.", p_instance->drv_inst_idx); +} + +static void tx_byte(NRF_UART_Type * p_uart, uart_control_block_t * p_cb) +{ + nrf_uart_event_clear(p_uart, NRF_UART_EVENT_TXDRDY); + uint8_t txd = p_cb->p_tx_buffer[p_cb->tx_counter]; + p_cb->tx_counter++; + nrf_uart_txd_set(p_uart, txd); +} + +static bool tx_blocking(NRF_UART_Type * p_uart, uart_control_block_t * p_cb) +{ + while (p_cb->tx_counter < p_cb->tx_buffer_length) + { + // Wait until the transmitter is ready to accept a new byte. + // Exit immediately if the transfer has been aborted. + while (!nrf_uart_event_check(p_uart, NRF_UART_EVENT_TXDRDY)) + { + if (p_cb->tx_abort) + { + return false; + } + } + + tx_byte(p_uart, p_cb); + } + + return true; +} + +nrfx_err_t nrfx_uart_tx(nrfx_uart_t const * p_instance, + uint8_t const * p_data, + size_t length) +{ + uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_INITIALIZED); + NRFX_ASSERT(p_data); + NRFX_ASSERT(length > 0); + + nrfx_err_t err_code; + + if (nrfx_uart_tx_in_progress(p_instance)) + { + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + p_cb->tx_buffer_length = length; + p_cb->p_tx_buffer = p_data; + p_cb->tx_counter = 0; + p_cb->tx_abort = false; + + NRFX_LOG_INFO("Transfer tx_len: %d.", p_cb->tx_buffer_length); + NRFX_LOG_DEBUG("Tx data:"); + NRFX_LOG_HEXDUMP_DEBUG(p_cb->p_tx_buffer, + p_cb->tx_buffer_length * sizeof(p_cb->p_tx_buffer[0])); + + err_code = NRFX_SUCCESS; + + nrf_uart_event_clear(p_instance->p_reg, NRF_UART_EVENT_TXDRDY); + nrf_uart_task_trigger(p_instance->p_reg, NRF_UART_TASK_STARTTX); + + tx_byte(p_instance->p_reg, p_cb); + + if (p_cb->handler == NULL) + { + if (!tx_blocking(p_instance->p_reg, p_cb)) + { + // The transfer has been aborted. + err_code = NRFX_ERROR_FORBIDDEN; + } + else + { + // Wait until the last byte is completely transmitted. + while (!nrf_uart_event_check(p_instance->p_reg, NRF_UART_EVENT_TXDRDY)) + {} + nrf_uart_task_trigger(p_instance->p_reg, NRF_UART_TASK_STOPTX); + } + p_cb->tx_buffer_length = 0; + } + + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +bool nrfx_uart_tx_in_progress(nrfx_uart_t const * p_instance) +{ + return (m_cb[p_instance->drv_inst_idx].tx_buffer_length != 0); +} + +static void rx_enable(nrfx_uart_t const * p_instance) +{ + nrf_uart_event_clear(p_instance->p_reg, NRF_UART_EVENT_ERROR); + nrf_uart_event_clear(p_instance->p_reg, NRF_UART_EVENT_RXDRDY); + nrf_uart_task_trigger(p_instance->p_reg, NRF_UART_TASK_STARTRX); +} + +static void rx_byte(NRF_UART_Type * p_uart, uart_control_block_t * p_cb) +{ + if (!p_cb->rx_buffer_length) + { + nrf_uart_event_clear(p_uart, NRF_UART_EVENT_RXDRDY); + // Byte received when buffer is not set - data lost. + (void) nrf_uart_rxd_get(p_uart); + return; + } + nrf_uart_event_clear(p_uart, NRF_UART_EVENT_RXDRDY); + p_cb->p_rx_buffer[p_cb->rx_counter] = nrf_uart_rxd_get(p_uart); + p_cb->rx_counter++; +} + +nrfx_err_t nrfx_uart_rx(nrfx_uart_t const * p_instance, + uint8_t * p_data, + size_t length) +{ + uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state == NRFX_DRV_STATE_INITIALIZED); + NRFX_ASSERT(p_data); + NRFX_ASSERT(length > 0); + + nrfx_err_t err_code; + + bool second_buffer = false; + + if (p_cb->handler) + { + nrf_uart_int_disable(p_instance->p_reg, NRF_UART_INT_MASK_RXDRDY | + NRF_UART_INT_MASK_ERROR); + } + if (p_cb->rx_buffer_length != 0) + { + if (p_cb->rx_secondary_buffer_length != 0) + { + if (p_cb->handler) + { + nrf_uart_int_enable(p_instance->p_reg, NRF_UART_INT_MASK_RXDRDY | + NRF_UART_INT_MASK_ERROR); + } + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + second_buffer = true; + } + + if (!second_buffer) + { + p_cb->rx_buffer_length = length; + p_cb->p_rx_buffer = p_data; + p_cb->rx_counter = 0; + p_cb->rx_secondary_buffer_length = 0; + } + else + { + p_cb->p_rx_secondary_buffer = p_data; + p_cb->rx_secondary_buffer_length = length; + } + + NRFX_LOG_INFO("Transfer rx_len: %d.", length); + + if ((!p_cb->rx_enabled) && (!second_buffer)) + { + rx_enable(p_instance); + } + + if (p_cb->handler == NULL) + { + nrf_uart_event_clear(p_instance->p_reg, NRF_UART_EVENT_RXTO); + + bool rxrdy; + bool rxto; + bool error; + do + { + do + { + error = nrf_uart_event_check(p_instance->p_reg, NRF_UART_EVENT_ERROR); + rxrdy = nrf_uart_event_check(p_instance->p_reg, NRF_UART_EVENT_RXDRDY); + rxto = nrf_uart_event_check(p_instance->p_reg, NRF_UART_EVENT_RXTO); + } while ((!rxrdy) && (!rxto) && (!error)); + + if (error || rxto) + { + break; + } + rx_byte(p_instance->p_reg, p_cb); + } while (p_cb->rx_buffer_length > p_cb->rx_counter); + + p_cb->rx_buffer_length = 0; + if (error) + { + err_code = NRFX_ERROR_INTERNAL; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + if (rxto) + { + err_code = NRFX_ERROR_FORBIDDEN; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + if (p_cb->rx_enabled) + { + nrf_uart_task_trigger(p_instance->p_reg, NRF_UART_TASK_STARTRX); + } + else + { + // Skip stopping RX if driver is forced to be enabled. + nrf_uart_task_trigger(p_instance->p_reg, NRF_UART_TASK_STOPRX); + } + } + else + { + nrf_uart_int_enable(p_instance->p_reg, NRF_UART_INT_MASK_RXDRDY | + NRF_UART_INT_MASK_ERROR); + } + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +bool nrfx_uart_rx_ready(nrfx_uart_t const * p_instance) +{ + return nrf_uart_event_check(p_instance->p_reg, NRF_UART_EVENT_RXDRDY); +} + +void nrfx_uart_rx_enable(nrfx_uart_t const * p_instance) +{ + if (!m_cb[p_instance->drv_inst_idx].rx_enabled) + { + rx_enable(p_instance); + m_cb[p_instance->drv_inst_idx].rx_enabled = true; + } +} + +void nrfx_uart_rx_disable(nrfx_uart_t const * p_instance) +{ + nrf_uart_task_trigger(p_instance->p_reg, NRF_UART_TASK_STOPRX); + m_cb[p_instance->drv_inst_idx].rx_enabled = false; +} + +uint32_t nrfx_uart_errorsrc_get(nrfx_uart_t const * p_instance) +{ + nrf_uart_event_clear(p_instance->p_reg, NRF_UART_EVENT_ERROR); + return nrf_uart_errorsrc_get_and_clear(p_instance->p_reg); +} + +static void rx_done_event(uart_control_block_t * p_cb, + size_t bytes, + uint8_t * p_data) +{ + nrfx_uart_event_t event; + + event.type = NRFX_UART_EVT_RX_DONE; + event.data.rxtx.bytes = bytes; + event.data.rxtx.p_data = p_data; + + p_cb->handler(&event, p_cb->p_context); +} + +static void tx_done_event(uart_control_block_t * p_cb, + size_t bytes) +{ + nrfx_uart_event_t event; + + event.type = NRFX_UART_EVT_TX_DONE; + event.data.rxtx.bytes = bytes; + event.data.rxtx.p_data = (uint8_t *)p_cb->p_tx_buffer; + + p_cb->tx_buffer_length = 0; + + p_cb->handler(&event, p_cb->p_context); +} + +void nrfx_uart_tx_abort(nrfx_uart_t const * p_instance) +{ + uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + p_cb->tx_abort = true; + nrf_uart_task_trigger(p_instance->p_reg, NRF_UART_TASK_STOPTX); + if (p_cb->handler) + { + tx_done_event(p_cb, p_cb->tx_counter); + } + + NRFX_LOG_INFO("TX transaction aborted."); +} + +void nrfx_uart_rx_abort(nrfx_uart_t const * p_instance) +{ + nrf_uart_int_disable(p_instance->p_reg, NRF_UART_INT_MASK_RXDRDY | + NRF_UART_INT_MASK_ERROR); + nrf_uart_task_trigger(p_instance->p_reg, NRF_UART_TASK_STOPRX); + + NRFX_LOG_INFO("RX transaction aborted."); +} + +static void uart_irq_handler(NRF_UART_Type * p_uart, + uart_control_block_t * p_cb) +{ + if (nrf_uart_int_enable_check(p_uart, NRF_UART_INT_MASK_ERROR) && + nrf_uart_event_check(p_uart, NRF_UART_EVENT_ERROR)) + { + nrfx_uart_event_t event; + nrf_uart_event_clear(p_uart, NRF_UART_EVENT_ERROR); + NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_UART_EVENT_ERROR)); + nrf_uart_int_disable(p_uart, NRF_UART_INT_MASK_RXDRDY | + NRF_UART_INT_MASK_ERROR); + if (!p_cb->rx_enabled) + { + nrf_uart_task_trigger(p_uart, NRF_UART_TASK_STOPRX); + } + event.type = NRFX_UART_EVT_ERROR; + event.data.error.error_mask = nrf_uart_errorsrc_get_and_clear(p_uart); + event.data.error.rxtx.bytes = p_cb->rx_buffer_length; + event.data.error.rxtx.p_data = p_cb->p_rx_buffer; + + // Abort transfer. + p_cb->rx_buffer_length = 0; + p_cb->rx_secondary_buffer_length = 0; + + p_cb->handler(&event,p_cb->p_context); + } + else if (nrf_uart_int_enable_check(p_uart, NRF_UART_INT_MASK_RXDRDY) && + nrf_uart_event_check(p_uart, NRF_UART_EVENT_RXDRDY)) + { + rx_byte(p_uart, p_cb); + if (p_cb->rx_buffer_length == p_cb->rx_counter) + { + if (p_cb->rx_secondary_buffer_length) + { + uint8_t * p_data = p_cb->p_rx_buffer; + size_t rx_counter = p_cb->rx_counter; + + // Switch to secondary buffer. + p_cb->rx_buffer_length = p_cb->rx_secondary_buffer_length; + p_cb->p_rx_buffer = p_cb->p_rx_secondary_buffer; + p_cb->rx_secondary_buffer_length = 0; + p_cb->rx_counter = 0; + rx_done_event(p_cb, rx_counter, p_data); + } + else + { + if (!p_cb->rx_enabled) + { + nrf_uart_task_trigger(p_uart, NRF_UART_TASK_STOPRX); + } + nrf_uart_int_disable(p_uart, NRF_UART_INT_MASK_RXDRDY | + NRF_UART_INT_MASK_ERROR); + p_cb->rx_buffer_length = 0; + rx_done_event(p_cb, p_cb->rx_counter, p_cb->p_rx_buffer); + } + } + } + + if (nrf_uart_event_check(p_uart, NRF_UART_EVENT_TXDRDY)) + { + if (p_cb->tx_counter < p_cb->tx_buffer_length && + !p_cb->tx_abort) + { + tx_byte(p_uart, p_cb); + } + else + { + nrf_uart_event_clear(p_uart, NRF_UART_EVENT_TXDRDY); + if (p_cb->tx_buffer_length) + { + tx_done_event(p_cb, p_cb->tx_buffer_length); + } + } + } + + if (nrf_uart_event_check(p_uart, NRF_UART_EVENT_RXTO)) + { + nrf_uart_event_clear(p_uart, NRF_UART_EVENT_RXTO); + + // RXTO event may be triggered as a result of abort call. In th + if (p_cb->rx_enabled) + { + nrf_uart_task_trigger(p_uart, NRF_UART_TASK_STARTRX); + } + if (p_cb->rx_buffer_length) + { + p_cb->rx_buffer_length = 0; + rx_done_event(p_cb, p_cb->rx_counter, p_cb->p_rx_buffer); + } + } +} + +#if NRFX_CHECK(NRFX_UART0_ENABLED) +void nrfx_uart_0_irq_handler(void) +{ + uart_irq_handler(NRF_UART0, &m_cb[NRFX_UART0_INST_IDX]); +} +#endif + +#endif // NRFX_CHECK(NRFX_UART_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_uarte.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_uarte.c new file mode 100644 index 00000000000..1d5bf090aed --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_uarte.c @@ -0,0 +1,583 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_UARTE_ENABLED) + +#if !(NRFX_CHECK(NRFX_UARTE0_ENABLED) || NRFX_CHECK(NRFX_UARTE1_ENABLED)) +#error "No enabled UARTE instances. Check ." +#endif + +#include +#include "prs/nrfx_prs.h" +#include + +#define NRFX_LOG_MODULE UARTE +#include + +#define EVT_TO_STR(event) \ + (event == NRF_UARTE_EVENT_ERROR ? "NRF_UARTE_EVENT_ERROR" : \ + "UNKNOWN EVENT") + +#define UARTEX_LENGTH_VALIDATE(peripheral, drv_inst_idx, len1, len2) \ + (((drv_inst_idx) == NRFX_CONCAT_3(NRFX_, peripheral, _INST_IDX)) && \ + NRFX_EASYDMA_LENGTH_VALIDATE(peripheral, len1, len2)) + +#if NRFX_CHECK(NRFX_UARTE0_ENABLED) +#define UARTE0_LENGTH_VALIDATE(...) UARTEX_LENGTH_VALIDATE(UARTE0, __VA_ARGS__) +#else +#define UARTE0_LENGTH_VALIDATE(...) 0 +#endif + +#if NRFX_CHECK(NRFX_UARTE1_ENABLED) +#define UARTE1_LENGTH_VALIDATE(...) UARTEX_LENGTH_VALIDATE(UARTE1, __VA_ARGS__) +#else +#define UARTE1_LENGTH_VALIDATE(...) 0 +#endif + +#define UARTE_LENGTH_VALIDATE(drv_inst_idx, length) \ + (UARTE0_LENGTH_VALIDATE(drv_inst_idx, length, 0) || \ + UARTE1_LENGTH_VALIDATE(drv_inst_idx, length, 0)) + + +typedef struct +{ + void * p_context; + nrfx_uarte_event_handler_t handler; + uint8_t const * p_tx_buffer; + uint8_t * p_rx_buffer; + uint8_t * p_rx_secondary_buffer; + size_t tx_buffer_length; + size_t rx_buffer_length; + size_t rx_secondary_buffer_length; + nrfx_drv_state_t state; +} uarte_control_block_t; +static uarte_control_block_t m_cb[NRFX_UARTE_ENABLED_COUNT]; + +static void apply_config(nrfx_uarte_t const * p_instance, + nrfx_uarte_config_t const * p_config) +{ + if (p_config->pseltxd != NRF_UARTE_PSEL_DISCONNECTED) + { + nrf_gpio_pin_set(p_config->pseltxd); + nrf_gpio_cfg_output(p_config->pseltxd); + } + if (p_config->pselrxd != NRF_UARTE_PSEL_DISCONNECTED) + { + nrf_gpio_cfg_input(p_config->pselrxd, NRF_GPIO_PIN_NOPULL); + } + + nrf_uarte_baudrate_set(p_instance->p_reg, p_config->baudrate); + nrf_uarte_configure(p_instance->p_reg, p_config->parity, p_config->hwfc); + nrf_uarte_txrx_pins_set(p_instance->p_reg, p_config->pseltxd, p_config->pselrxd); + if (p_config->hwfc == NRF_UARTE_HWFC_ENABLED) + { + if (p_config->pselcts != NRF_UARTE_PSEL_DISCONNECTED) + { + nrf_gpio_cfg_input(p_config->pselcts, NRF_GPIO_PIN_NOPULL); + } + if (p_config->pselrts != NRF_UARTE_PSEL_DISCONNECTED) + { + nrf_gpio_pin_set(p_config->pselrts); + nrf_gpio_cfg_output(p_config->pselrts); + } + nrf_uarte_hwfc_pins_set(p_instance->p_reg, p_config->pselrts, p_config->pselcts); + } +} + +static void interrupts_enable(nrfx_uarte_t const * p_instance, + uint8_t interrupt_priority) +{ + nrf_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_ENDRX); + nrf_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_ENDTX); + nrf_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_ERROR); + nrf_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_RXTO); + nrf_uarte_int_enable(p_instance->p_reg, NRF_UARTE_INT_ENDRX_MASK | + NRF_UARTE_INT_ENDTX_MASK | + NRF_UARTE_INT_ERROR_MASK | + NRF_UARTE_INT_RXTO_MASK); + NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number((void *)p_instance->p_reg), + interrupt_priority); + NRFX_IRQ_ENABLE(nrfx_get_irq_number((void *)p_instance->p_reg)); +} + +static void interrupts_disable(nrfx_uarte_t const * p_instance) +{ + nrf_uarte_int_disable(p_instance->p_reg, NRF_UARTE_INT_ENDRX_MASK | + NRF_UARTE_INT_ENDTX_MASK | + NRF_UARTE_INT_ERROR_MASK | + NRF_UARTE_INT_RXTO_MASK); + NRFX_IRQ_DISABLE(nrfx_get_irq_number((void *)p_instance->p_reg)); +} + +static void pins_to_default(nrfx_uarte_t const * p_instance) +{ + /* Reset pins to default states */ + uint32_t txd; + uint32_t rxd; + uint32_t rts; + uint32_t cts; + + txd = nrf_uarte_tx_pin_get(p_instance->p_reg); + rxd = nrf_uarte_rx_pin_get(p_instance->p_reg); + rts = nrf_uarte_rts_pin_get(p_instance->p_reg); + cts = nrf_uarte_cts_pin_get(p_instance->p_reg); + nrf_uarte_txrx_pins_disconnect(p_instance->p_reg); + nrf_uarte_hwfc_pins_disconnect(p_instance->p_reg); + + if (txd != NRF_UARTE_PSEL_DISCONNECTED) + { + nrf_gpio_cfg_default(txd); + } + if (rxd != NRF_UARTE_PSEL_DISCONNECTED) + { + nrf_gpio_cfg_default(rxd); + } + if (cts != NRF_UARTE_PSEL_DISCONNECTED) + { + nrf_gpio_cfg_default(cts); + } + if (rts != NRF_UARTE_PSEL_DISCONNECTED) + { + nrf_gpio_cfg_default(rts); + } +} + +nrfx_err_t nrfx_uarte_init(nrfx_uarte_t const * p_instance, + nrfx_uarte_config_t const * p_config, + nrfx_uarte_event_handler_t event_handler) +{ + NRFX_ASSERT(p_config); + uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + nrfx_err_t err_code = NRFX_SUCCESS; + + if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) + { + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + +#if NRFX_CHECK(NRFX_PRS_ENABLED) + static nrfx_irq_handler_t const irq_handlers[NRFX_UARTE_ENABLED_COUNT] = { + #if NRFX_CHECK(NRFX_UARTE0_ENABLED) + nrfx_uarte_0_irq_handler, + #endif + #if NRFX_CHECK(NRFX_UARTE1_ENABLED) + nrfx_uarte_1_irq_handler, + #endif + }; + if (nrfx_prs_acquire(p_instance->p_reg, + irq_handlers[p_instance->drv_inst_idx]) != NRFX_SUCCESS) + { + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } +#endif // NRFX_CHECK(NRFX_PRS_ENABLED) + + apply_config(p_instance, p_config); + + p_cb->handler = event_handler; + p_cb->p_context = p_config->p_context; + + if (p_cb->handler) + { + interrupts_enable(p_instance, p_config->interrupt_priority); + } + + nrf_uarte_enable(p_instance->p_reg); + p_cb->rx_buffer_length = 0; + p_cb->rx_secondary_buffer_length = 0; + p_cb->tx_buffer_length = 0; + p_cb->state = NRFX_DRV_STATE_INITIALIZED; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +void nrfx_uarte_uninit(nrfx_uarte_t const * p_instance) +{ + uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + nrf_uarte_disable(p_instance->p_reg); + + if (p_cb->handler) + { + interrupts_disable(p_instance); + } + + pins_to_default(p_instance); + +#if NRFX_CHECK(NRFX_PRS_ENABLED) + nrfx_prs_release(p_instance->p_reg); +#endif + + p_cb->state = NRFX_DRV_STATE_UNINITIALIZED; + p_cb->handler = NULL; + NRFX_LOG_INFO("Instance uninitialized: %d.", p_instance->drv_inst_idx); +} + +nrfx_err_t nrfx_uarte_tx(nrfx_uarte_t const * p_instance, + uint8_t const * p_data, + size_t length) +{ + uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_INITIALIZED); + NRFX_ASSERT(p_data); + NRFX_ASSERT(length > 0); + NRFX_ASSERT(UARTE_LENGTH_VALIDATE(p_instance->drv_inst_idx, length)); + + nrfx_err_t err_code; + + // EasyDMA requires that transfer buffers are placed in DataRAM, + // signal error if the are not. + if (!nrfx_is_in_ram(p_data)) + { + err_code = NRFX_ERROR_INVALID_ADDR; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + if (nrfx_uarte_tx_in_progress(p_instance)) + { + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + p_cb->tx_buffer_length = length; + p_cb->p_tx_buffer = p_data; + + NRFX_LOG_INFO("Transfer tx_len: %d.", p_cb->tx_buffer_length); + NRFX_LOG_DEBUG("Tx data:"); + NRFX_LOG_HEXDUMP_DEBUG(p_cb->p_tx_buffer, + p_cb->tx_buffer_length * sizeof(p_cb->p_tx_buffer[0])); + + err_code = NRFX_SUCCESS; + + nrf_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_ENDTX); + nrf_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_TXSTOPPED); + nrf_uarte_tx_buffer_set(p_instance->p_reg, p_cb->p_tx_buffer, p_cb->tx_buffer_length); + nrf_uarte_task_trigger(p_instance->p_reg, NRF_UARTE_TASK_STARTTX); + + if (p_cb->handler == NULL) + { + bool endtx; + bool txstopped; + do + { + endtx = nrf_uarte_event_check(p_instance->p_reg, NRF_UARTE_EVENT_ENDTX); + txstopped = nrf_uarte_event_check(p_instance->p_reg, NRF_UARTE_EVENT_TXSTOPPED); + } + while ((!endtx) && (!txstopped)); + + if (txstopped) + { + err_code = NRFX_ERROR_FORBIDDEN; + } + p_cb->tx_buffer_length = 0; + } + + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +bool nrfx_uarte_tx_in_progress(nrfx_uarte_t const * p_instance) +{ + return (m_cb[p_instance->drv_inst_idx].tx_buffer_length != 0); +} + +nrfx_err_t nrfx_uarte_rx(nrfx_uarte_t const * p_instance, + uint8_t * p_data, + size_t length) +{ + uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state == NRFX_DRV_STATE_INITIALIZED); + NRFX_ASSERT(p_data); + NRFX_ASSERT(length > 0); + NRFX_ASSERT(UARTE_LENGTH_VALIDATE(p_instance->drv_inst_idx, length)); + + nrfx_err_t err_code; + + // EasyDMA requires that transfer buffers are placed in DataRAM, + // signal error if the are not. + if (!nrfx_is_in_ram(p_data)) + { + err_code = NRFX_ERROR_INVALID_ADDR; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + bool second_buffer = false; + + if (p_cb->handler) + { + nrf_uarte_int_disable(p_instance->p_reg, NRF_UARTE_INT_ERROR_MASK | + NRF_UARTE_INT_ENDRX_MASK); + } + if (p_cb->rx_buffer_length != 0) + { + if (p_cb->rx_secondary_buffer_length != 0) + { + if (p_cb->handler) + { + nrf_uarte_int_enable(p_instance->p_reg, NRF_UARTE_INT_ERROR_MASK | + NRF_UARTE_INT_ENDRX_MASK); + } + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + second_buffer = true; + } + + if (!second_buffer) + { + p_cb->rx_buffer_length = length; + p_cb->p_rx_buffer = p_data; + p_cb->rx_secondary_buffer_length = 0; + } + else + { + p_cb->p_rx_secondary_buffer = p_data; + p_cb->rx_secondary_buffer_length = length; + } + + NRFX_LOG_INFO("Transfer rx_len: %d.", length); + + err_code = NRFX_SUCCESS; + + nrf_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_ENDRX); + nrf_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_RXTO); + nrf_uarte_rx_buffer_set(p_instance->p_reg, p_data, length); + if (!second_buffer) + { + nrf_uarte_task_trigger(p_instance->p_reg, NRF_UARTE_TASK_STARTRX); + } + else + { + nrf_uarte_shorts_enable(p_instance->p_reg, NRF_UARTE_SHORT_ENDRX_STARTRX); + } + + if (m_cb[p_instance->drv_inst_idx].handler == NULL) + { + bool endrx; + bool rxto; + bool error; + do { + endrx = nrf_uarte_event_check(p_instance->p_reg, NRF_UARTE_EVENT_ENDRX); + rxto = nrf_uarte_event_check(p_instance->p_reg, NRF_UARTE_EVENT_RXTO); + error = nrf_uarte_event_check(p_instance->p_reg, NRF_UARTE_EVENT_ERROR); + } while ((!endrx) && (!rxto) && (!error)); + + m_cb[p_instance->drv_inst_idx].rx_buffer_length = 0; + + if (error) + { + err_code = NRFX_ERROR_INTERNAL; + } + + if (rxto) + { + err_code = NRFX_ERROR_FORBIDDEN; + } + } + else + { + nrf_uarte_int_enable(p_instance->p_reg, NRF_UARTE_INT_ERROR_MASK | + NRF_UARTE_INT_ENDRX_MASK); + } + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + +bool nrfx_uarte_rx_ready(nrfx_uarte_t const * p_instance) +{ + return nrf_uarte_event_check(p_instance->p_reg, NRF_UARTE_EVENT_ENDRX); +} + +uint32_t nrfx_uarte_errorsrc_get(nrfx_uarte_t const * p_instance) +{ + nrf_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_ERROR); + return nrf_uarte_errorsrc_get_and_clear(p_instance->p_reg); +} + +static void rx_done_event(uarte_control_block_t * p_cb, + size_t bytes, + uint8_t * p_data) +{ + nrfx_uarte_event_t event; + + event.type = NRFX_UARTE_EVT_RX_DONE; + event.data.rxtx.bytes = bytes; + event.data.rxtx.p_data = p_data; + + p_cb->handler(&event, p_cb->p_context); +} + +static void tx_done_event(uarte_control_block_t * p_cb, + size_t bytes) +{ + nrfx_uarte_event_t event; + + event.type = NRFX_UARTE_EVT_TX_DONE; + event.data.rxtx.bytes = bytes; + event.data.rxtx.p_data = (uint8_t *)p_cb->p_tx_buffer; + + p_cb->tx_buffer_length = 0; + + p_cb->handler(&event, p_cb->p_context); +} + +void nrfx_uarte_tx_abort(nrfx_uarte_t const * p_instance) +{ + uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + nrf_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_TXSTOPPED); + nrf_uarte_task_trigger(p_instance->p_reg, NRF_UARTE_TASK_STOPTX); + if (p_cb->handler == NULL) + { + while (!nrf_uarte_event_check(p_instance->p_reg, NRF_UARTE_EVENT_TXSTOPPED)) + {} + } + NRFX_LOG_INFO("TX transaction aborted."); +} + +void nrfx_uarte_rx_abort(nrfx_uarte_t const * p_instance) +{ + nrf_uarte_task_trigger(p_instance->p_reg, NRF_UARTE_TASK_STOPRX); + NRFX_LOG_INFO("RX transaction aborted."); +} + +static void uarte_irq_handler(NRF_UARTE_Type * p_uarte, + uarte_control_block_t * p_cb) +{ + if (nrf_uarte_event_check(p_uarte, NRF_UARTE_EVENT_ERROR)) + { + nrfx_uarte_event_t event; + + nrf_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_ERROR); + + event.type = NRFX_UARTE_EVT_ERROR; + event.data.error.error_mask = nrf_uarte_errorsrc_get_and_clear(p_uarte); + event.data.error.rxtx.bytes = nrf_uarte_rx_amount_get(p_uarte); + event.data.error.rxtx.p_data = p_cb->p_rx_buffer; + + // Abort transfer. + p_cb->rx_buffer_length = 0; + p_cb->rx_secondary_buffer_length = 0; + + p_cb->handler(&event, p_cb->p_context); + } + else if (nrf_uarte_event_check(p_uarte, NRF_UARTE_EVENT_ENDRX)) + { + nrf_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_ENDRX); + size_t amount = nrf_uarte_rx_amount_get(p_uarte); + // If the transfer was stopped before completion, amount of transfered bytes + // will not be equal to the buffer length. Interrupted transfer is ignored. + if (amount == p_cb->rx_buffer_length) + { + if (p_cb->rx_secondary_buffer_length) + { + uint8_t * p_data = p_cb->p_rx_buffer; + nrf_uarte_shorts_disable(p_uarte, NRF_UARTE_SHORT_ENDRX_STARTRX); + p_cb->rx_buffer_length = p_cb->rx_secondary_buffer_length; + p_cb->p_rx_buffer = p_cb->p_rx_secondary_buffer; + p_cb->rx_secondary_buffer_length = 0; + rx_done_event(p_cb, amount, p_data); + } + else + { + p_cb->rx_buffer_length = 0; + rx_done_event(p_cb, amount, p_cb->p_rx_buffer); + } + } + } + + if (nrf_uarte_event_check(p_uarte, NRF_UARTE_EVENT_RXTO)) + { + nrf_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_RXTO); + if (p_cb->rx_buffer_length) + { + p_cb->rx_buffer_length = 0; + rx_done_event(p_cb, nrf_uarte_rx_amount_get(p_uarte), p_cb->p_rx_buffer); + } + } + + if (nrf_uarte_event_check(p_uarte, NRF_UARTE_EVENT_ENDTX)) + { + nrf_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_ENDTX); + if (p_cb->tx_buffer_length) + { + tx_done_event(p_cb, nrf_uarte_tx_amount_get(p_uarte)); + } + } +} + +#if NRFX_CHECK(NRFX_UARTE0_ENABLED) +void nrfx_uarte_0_irq_handler(void) +{ + uarte_irq_handler(NRF_UARTE0, &m_cb[NRFX_UARTE0_INST_IDX]); +} +#endif + +#if NRFX_CHECK(NRFX_UARTE1_ENABLED) +void nrfx_uarte_1_irq_handler(void) +{ + uarte_irq_handler(NRF_UARTE1, &m_cb[NRFX_UARTE1_INST_IDX]); +} +#endif + +#endif // NRFX_CHECK(NRFX_UARTE_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_wdt.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_wdt.c new file mode 100644 index 00000000000..d4d33b1fafd --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_wdt.c @@ -0,0 +1,153 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_WDT_ENABLED) +#include + +#define NRFX_LOG_MODULE WDT +#include + + +/**@brief WDT event handler. */ +static nrfx_wdt_event_handler_t m_wdt_event_handler; + +/**@brief WDT state. */ +static nrfx_drv_state_t m_state; + +/**@brief WDT alloc table. */ +static uint32_t m_alloc_index; + +/**@brief WDT interrupt handler. */ +void nrfx_wdt_irq_handler(void) +{ + if (nrf_wdt_int_enable_check(NRF_WDT_INT_TIMEOUT_MASK) == true) + { + nrf_wdt_event_clear(NRF_WDT_EVENT_TIMEOUT); + m_wdt_event_handler(); + } +} + + +nrfx_err_t nrfx_wdt_init(nrfx_wdt_config_t const * p_config, + nrfx_wdt_event_handler_t wdt_event_handler) +{ + NRFX_ASSERT(p_config); + NRFX_ASSERT(wdt_event_handler != NULL); + nrfx_err_t err_code; + m_wdt_event_handler = wdt_event_handler; + + if (m_state == NRFX_DRV_STATE_UNINITIALIZED) + { + m_state = NRFX_DRV_STATE_INITIALIZED; + } + else + { + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } + + nrf_wdt_behaviour_set(p_config->behaviour); + + nrf_wdt_reload_value_set((p_config->reload_value * 32768) / 1000); + + NRFX_IRQ_PRIORITY_SET(WDT_IRQn, p_config->interrupt_priority); + NRFX_IRQ_ENABLE(WDT_IRQn); + + err_code = NRFX_SUCCESS; + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; +} + + +void nrfx_wdt_enable(void) +{ + NRFX_ASSERT(m_alloc_index != 0); + NRFX_ASSERT(m_state == NRFX_DRV_STATE_INITIALIZED); + nrf_wdt_int_enable(NRF_WDT_INT_TIMEOUT_MASK); + nrf_wdt_task_trigger(NRF_WDT_TASK_START); + m_state = NRFX_DRV_STATE_POWERED_ON; + NRFX_LOG_INFO("Enabled."); +} + + +void nrfx_wdt_feed(void) +{ + NRFX_ASSERT(m_state == NRFX_DRV_STATE_POWERED_ON); + for (uint32_t i = 0; i < m_alloc_index; i++) + { + nrf_wdt_reload_request_set((nrf_wdt_rr_register_t)(NRF_WDT_RR0 + i)); + } +} + +nrfx_err_t nrfx_wdt_channel_alloc(nrfx_wdt_channel_id * p_channel_id) +{ + nrfx_err_t result; + NRFX_ASSERT(p_channel_id); + NRFX_ASSERT(m_state == NRFX_DRV_STATE_INITIALIZED); + + NRFX_CRITICAL_SECTION_ENTER(); + if (m_alloc_index < NRF_WDT_CHANNEL_NUMBER) + { + *p_channel_id = (nrfx_wdt_channel_id)(NRF_WDT_RR0 + m_alloc_index); + m_alloc_index++; + nrf_wdt_reload_request_enable(*p_channel_id); + result = NRFX_SUCCESS; + } + else + { + result = NRFX_ERROR_NO_MEM; + } + NRFX_CRITICAL_SECTION_EXIT(); + NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(result)); + return result; +} + +void nrfx_wdt_channel_feed(nrfx_wdt_channel_id channel_id) +{ + NRFX_ASSERT(m_state == NRFX_DRV_STATE_POWERED_ON); + nrf_wdt_reload_request_set(channel_id); +} + +#endif // NRFX_CHECK(NRFX_WDT_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/prs/nrfx_prs.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/prs/nrfx_prs.c new file mode 100644 index 00000000000..e7a105fe3e8 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/prs/nrfx_prs.c @@ -0,0 +1,166 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include + +#if NRFX_CHECK(NRFX_PRS_ENABLED) +#include "nrfx_prs.h" + +#define NRFX_LOG_MODULE PRS +#include + +#define LOG_FUNCTION_EXIT(level, ret_code) \ + NRFX_LOG_##level("Function: %s, error code: %s.", \ + __func__, \ + NRFX_LOG_ERROR_STRING_GET(ret_code)) + + +typedef struct { + nrfx_irq_handler_t handler; + bool acquired; +} prs_box_t; + +#define PRS_BOX_DEFINE(n) \ + static prs_box_t m_prs_box_##n = { .handler = NULL, .acquired = false }; \ + void nrfx_prs_box_##n##_irq_handler(void) \ + { \ + NRFX_ASSERT(m_prs_box_##n.handler); \ + m_prs_box_##n.handler(); \ + } + +#if defined(NRFX_PRS_BOX_0_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_0_ENABLED) +PRS_BOX_DEFINE(0) +#endif +#if defined(NRFX_PRS_BOX_1_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_1_ENABLED) +PRS_BOX_DEFINE(1) +#endif +#if defined(NRFX_PRS_BOX_2_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_2_ENABLED) +PRS_BOX_DEFINE(2) +#endif +#if defined(NRFX_PRS_BOX_3_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_3_ENABLED) +PRS_BOX_DEFINE(3) +#endif +#if defined(NRFX_PRS_BOX_4_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_4_ENABLED) +PRS_BOX_DEFINE(4) +#endif + + +static prs_box_t * prs_box_get(void const * p_base_addr) +{ +#if !defined(IS_PRS_BOX) +#define IS_PRS_BOX(n, p_base_addr) ((p_base_addr) == NRFX_PRS_BOX_##n##_ADDR) +#endif + +#if defined(NRFX_PRS_BOX_0_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_0_ENABLED) + if (IS_PRS_BOX(0, p_base_addr)) { return &m_prs_box_0; } + else +#endif +#if defined(NRFX_PRS_BOX_1_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_1_ENABLED) + if (IS_PRS_BOX(1, p_base_addr)) { return &m_prs_box_1; } + else +#endif +#if defined(NRFX_PRS_BOX_2_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_2_ENABLED) + if (IS_PRS_BOX(2, p_base_addr)) { return &m_prs_box_2; } + else +#endif +#if defined(NRFX_PRS_BOX_3_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_3_ENABLED) + if (IS_PRS_BOX(3, p_base_addr)) { return &m_prs_box_3; } + else +#endif +#if defined(NRFX_PRS_BOX_4_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_4_ENABLED) + if (IS_PRS_BOX(4, p_base_addr)) { return &m_prs_box_4; } + else +#endif + { + return NULL; + } +} + +nrfx_err_t nrfx_prs_acquire(void const * p_base_addr, + nrfx_irq_handler_t irq_handler) +{ + NRFX_ASSERT(p_base_addr); + + nrfx_err_t ret_code; + + prs_box_t * p_box = prs_box_get(p_base_addr); + if (p_box != NULL) + { + bool busy = false; + + NRFX_CRITICAL_SECTION_ENTER(); + if (p_box->acquired) + { + busy = true; + } + else + { + p_box->handler = irq_handler; + p_box->acquired = true; + } + NRFX_CRITICAL_SECTION_EXIT(); + + if (busy) + { + ret_code = NRFX_ERROR_BUSY; + LOG_FUNCTION_EXIT(WARNING, ret_code); + return ret_code; + } + } + + ret_code = NRFX_SUCCESS; + LOG_FUNCTION_EXIT(INFO, ret_code); + return ret_code; +} + +void nrfx_prs_release(void const * p_base_addr) +{ + NRFX_ASSERT(p_base_addr); + + prs_box_t * p_box = prs_box_get(p_base_addr); + if (p_box != NULL) + { + p_box->handler = NULL; + p_box->acquired = false; + } +} + + +#endif // NRFX_CHECK(NRFX_PRS_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/prs/nrfx_prs.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/prs/nrfx_prs.h new file mode 100644 index 00000000000..f585fa13101 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/prs/nrfx_prs.h @@ -0,0 +1,140 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_PRS_H__ +#define NRFX_PRS_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_prs Peripheral Resource Sharing (PRS) + * @{ + * @ingroup nrfx + * + * @brief Peripheral Resource Sharing interface (PRS). + */ + +#if defined(NRF51) + // SPI0, TWI0 + #define NRFX_PRS_BOX_0_ADDR NRF_SPI0 + // SPI1, SPIS1, TWI1 + #define NRFX_PRS_BOX_1_ADDR NRF_SPI1 +#elif defined(NRF52810_XXAA) + // TWIM0, TWIS0 + #define NRFX_PRS_BOX_0_ADDR NRF_TWIM0 + // SPIM0, SPIS0 + #define NRFX_PRS_BOX_1_ADDR NRF_SPIM0 +#elif defined(NRF52832_XXAA) || defined (NRF52832_XXAB) + // SPIM0, SPIS0, TWIM0, TWIS0, SPI0, TWI0 + #define NRFX_PRS_BOX_0_ADDR NRF_SPIM0 + // SPIM1, SPIS1, TWIM1, TWIS1, SPI1, TWI1 + #define NRFX_PRS_BOX_1_ADDR NRF_SPIM1 + // SPIM2, SPIS2, SPI2 + #define NRFX_PRS_BOX_2_ADDR NRF_SPIM2 + // COMP, LPCOMP + #define NRFX_PRS_BOX_3_ADDR NRF_COMP + // UARTE0, UART0 + #define NRFX_PRS_BOX_4_ADDR NRF_UARTE0 +#elif defined(NRF52840_XXAA) + // SPIM0, SPIS0, TWIM0, TWIS0, SPI0, TWI0 + #define NRFX_PRS_BOX_0_ADDR NRF_SPIM0 + // SPIM1, SPIS1, TWIM1, TWIS1, SPI1, TWI1 + #define NRFX_PRS_BOX_1_ADDR NRF_SPIM1 + // SPIM2, SPIS2, SPI2 + #define NRFX_PRS_BOX_2_ADDR NRF_SPIM2 + // COMP, LPCOMP + #define NRFX_PRS_BOX_3_ADDR NRF_COMP + // UARTE0, UART0 + #define NRFX_PRS_BOX_4_ADDR NRF_UARTE0 +#else + #error "Unknown device." +#endif + +/** + * @brief Function for acquiring shared peripheral resources associated with + * the specified peripheral. + * + * Certain resources and registers are shared among peripherals that have + * the same ID (for example: SPI0, SPIM0, SPIS0, TWI0, TWIM0, and TWIS0 in + * nRF52832). Only one of them can be utilized at a given time. This function + * reserves proper resources to be used by the specified peripheral. + * If NRFX_PRS_ENABLED is set to a non-zero value, IRQ handlers for peripherals + * that are sharing resources with others are implemented by the @ref nrfx_prs + * module instead of individual drivers. The drivers must then specify their + * interrupt handling routines and register them by using this function. + * + * @param[in] p_base_addr Requested peripheral base pointer. + * @param[in] irq_handler Interrupt handler to register. + * + * @retval NRFX_SUCCESS If resources were acquired successfully or the + * specified peripheral is not handled by the PRS + * subsystem and there is no need to acquire resources + * for it. + * @retval NRFX_ERROR_BUSY If resources were already acquired. + */ +nrfx_err_t nrfx_prs_acquire(void const * p_base_addr, + nrfx_irq_handler_t irq_handler); + +/** + * @brief Function for releasing shared resources reserved previously by + * @ref nrfx_prs_acquire() for the specified peripheral. + * + * @param[in] p_base_addr Released peripheral base pointer. + */ +void nrfx_prs_release(void const * p_base_addr); + + +void nrfx_prs_box_0_irq_handler(void); +void nrfx_prs_box_1_irq_handler(void); +void nrfx_prs_box_2_irq_handler(void); +void nrfx_prs_box_3_irq_handler(void); +void nrfx_prs_box_4_irq_handler(void); + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_PRS_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_adc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_adc.h new file mode 100644 index 00000000000..862e6f1e5c9 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_adc.h @@ -0,0 +1,348 @@ +/** + * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_ADC_H_ +#define NRF_ADC_H_ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_adc_hal ADC HAL + * @{ + * @ingroup nrf_adc + * @brief Hardware access layer for managing the Analog-to-Digital Converter (ADC) + * peripheral. + */ + +/** @brief ADC interrupts. */ +typedef enum +{ + NRF_ADC_INT_END_MASK = ADC_INTENSET_END_Msk, /**< ADC interrupt on END event. */ +} nrf_adc_int_mask_t; + +/** @brief Resolution of the analog-to-digital converter. */ +typedef enum +{ + NRF_ADC_CONFIG_RES_8BIT = ADC_CONFIG_RES_8bit, /**< 8-bit resolution. */ + NRF_ADC_CONFIG_RES_9BIT = ADC_CONFIG_RES_9bit, /**< 9-bit resolution. */ + NRF_ADC_CONFIG_RES_10BIT = ADC_CONFIG_RES_10bit, /**< 10-bit resolution. */ +} nrf_adc_config_resolution_t; + + +/** @brief Scaling factor of the analog-to-digital conversion. */ +typedef enum +{ + NRF_ADC_CONFIG_SCALING_INPUT_FULL_SCALE = ADC_CONFIG_INPSEL_AnalogInputNoPrescaling, /**< Full scale input. */ + NRF_ADC_CONFIG_SCALING_INPUT_TWO_THIRDS = ADC_CONFIG_INPSEL_AnalogInputTwoThirdsPrescaling, /**< 2/3 scale input. */ + NRF_ADC_CONFIG_SCALING_INPUT_ONE_THIRD = ADC_CONFIG_INPSEL_AnalogInputOneThirdPrescaling, /**< 1/3 scale input. */ + NRF_ADC_CONFIG_SCALING_SUPPLY_TWO_THIRDS = ADC_CONFIG_INPSEL_SupplyTwoThirdsPrescaling, /**< 2/3 of supply. */ + NRF_ADC_CONFIG_SCALING_SUPPLY_ONE_THIRD = ADC_CONFIG_INPSEL_SupplyOneThirdPrescaling /**< 1/3 of supply. */ +} nrf_adc_config_scaling_t; + + +/** + * @brief External reference selection of the analog-to-digital converter. + */ +typedef enum +{ + NRF_ADC_CONFIG_EXTREFSEL_NONE = ADC_CONFIG_EXTREFSEL_None, /**< Analog reference inputs disabled. */ + NRF_ADC_CONFIG_EXTREFSEL_AREF0 = ADC_CONFIG_EXTREFSEL_AnalogReference0, /**< AREF0 as analog reference. */ + NRF_ADC_CONFIG_EXTREFSEL_AREF1 = ADC_CONFIG_EXTREFSEL_AnalogReference1 /**< AREF1 as analog reference. */ +} nrf_adc_config_extref_t; + +/** + * @brief Reference selection of the analog-to-digital converter. + */ +typedef enum +{ + NRF_ADC_CONFIG_REF_VBG = ADC_CONFIG_REFSEL_VBG, /**< 1.2 V reference. */ + NRF_ADC_CONFIG_REF_SUPPLY_ONE_HALF = ADC_CONFIG_REFSEL_SupplyOneHalfPrescaling, /**< 1/2 of power supply. */ + NRF_ADC_CONFIG_REF_SUPPLY_ONE_THIRD = ADC_CONFIG_REFSEL_SupplyOneThirdPrescaling, /**< 1/3 of power supply. */ + NRF_ADC_CONFIG_REF_EXT = ADC_CONFIG_REFSEL_External /**< External reference. See @ref nrf_adc_config_extref_t for further configuration.*/ +} nrf_adc_config_reference_t; + +/** @brief Input selection of the analog-to-digital converter. */ +typedef enum +{ + NRF_ADC_CONFIG_INPUT_DISABLED = ADC_CONFIG_PSEL_Disabled, /**< No input selected. */ + NRF_ADC_CONFIG_INPUT_0 = ADC_CONFIG_PSEL_AnalogInput0, /**< Input 0. */ + NRF_ADC_CONFIG_INPUT_1 = ADC_CONFIG_PSEL_AnalogInput1, /**< Input 1. */ + NRF_ADC_CONFIG_INPUT_2 = ADC_CONFIG_PSEL_AnalogInput2, /**< Input 2. */ + NRF_ADC_CONFIG_INPUT_3 = ADC_CONFIG_PSEL_AnalogInput3, /**< Input 3. */ + NRF_ADC_CONFIG_INPUT_4 = ADC_CONFIG_PSEL_AnalogInput4, /**< Input 4. */ + NRF_ADC_CONFIG_INPUT_5 = ADC_CONFIG_PSEL_AnalogInput5, /**< Input 5. */ + NRF_ADC_CONFIG_INPUT_6 = ADC_CONFIG_PSEL_AnalogInput6, /**< Input 6. */ + NRF_ADC_CONFIG_INPUT_7 = ADC_CONFIG_PSEL_AnalogInput7, /**< Input 7. */ +} nrf_adc_config_input_t; + +/** @brief Analog-to-digital converter tasks. */ +typedef enum +{ + /*lint -save -e30*/ + NRF_ADC_TASK_START = offsetof(NRF_ADC_Type, TASKS_START), /**< ADC start sampling task. */ + NRF_ADC_TASK_STOP = offsetof(NRF_ADC_Type, TASKS_STOP) /**< ADC stop sampling task. */ + /*lint -restore*/ +} nrf_adc_task_t; + +/** @brief Analog-to-digital converter events. */ +typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ +{ + /*lint -save -e30*/ + NRF_ADC_EVENT_END = offsetof(NRF_ADC_Type, EVENTS_END) /**< End of a conversion event. */ + /*lint -restore*/ +} nrf_adc_event_t; + +/**@brief Analog-to-digital converter configuration. */ +typedef struct +{ + nrf_adc_config_resolution_t resolution; /**< ADC resolution. */ + nrf_adc_config_scaling_t scaling; /**< ADC scaling factor. */ + nrf_adc_config_reference_t reference; /**< ADC reference. */ + nrf_adc_config_input_t input; /**< ADC input selection. */ + nrf_adc_config_extref_t extref; /**< ADC external reference selection. */ +} nrf_adc_config_t; + +/**@brief Analog-to-digital value type. */ +typedef uint16_t nrf_adc_value_t; + +/** + * @brief Function for activating a specific ADC task. + * + * @param[in] task Task to activate. + */ +__STATIC_INLINE void nrf_adc_task_trigger(nrf_adc_task_t task); + +/** + * @brief Function for getting the address of an ADC task register. + * + * @param[in] task ADC task. + * + * @return Address of the specified ADC task. + */ +__STATIC_INLINE uint32_t nrf_adc_task_address_get(nrf_adc_task_t task); + +/** + * @brief Function for checking the state of an ADC event. + * + * @param[in] event Event to check. + * + * @retval true If the event is set. + * @retval false If the event is not set. + */ +__STATIC_INLINE bool nrf_adc_event_check(nrf_adc_event_t event); + +/** + * @brief Function for clearing an ADC event. + * + * @param[in] event Event to clear. + */ +__STATIC_INLINE void nrf_adc_event_clear(nrf_adc_event_t event); + +/** + * @brief Function for getting the address of a specific ADC event register. + * + * @param[in] adc_event ADC event. + * + * @return Address of the specified ADC event. + */ +__STATIC_INLINE uint32_t nrf_adc_event_address_get(nrf_adc_event_t adc_event); + +/** + * @brief Function for enabling the specified interrupts. + * + * @param[in] int_mask Interrupts to enable. + */ +__STATIC_INLINE void nrf_adc_int_enable(uint32_t int_mask); + +/** + * @brief Function for disabling the specified interrupts. + * + * @param[in] int_mask Interrupts to disable. + */ +__STATIC_INLINE void nrf_adc_int_disable(uint32_t int_mask); + +/** + * @brief Function for retrieving the state of the specified ADC interrupts. + * + * @param[in] int_mask Interrupts to check. + * + * @retval true If all specified interrupts are enabled. + * @retval false If at least one of the given interrupts is not enabled. + */ +__STATIC_INLINE bool nrf_adc_int_enable_check(uint32_t int_mask); + +/** + * @brief Function for checking whether the ADC is busy. + * + * This function checks whether the ADC converter is busy with a conversion. + * + * @retval true If the ADC is busy. + * @retval false If the ADC is not busy. + */ +__STATIC_INLINE bool nrf_adc_busy_check(void); + +/** + * @brief Function for enabling the ADC. + * + */ +__STATIC_INLINE void nrf_adc_enable(void); + +/** + * @brief Function for disabling the ADC. + * + */ +__STATIC_INLINE void nrf_adc_disable(void); + +/** + * @brief Function for checking if the ADC is enabled. + * + * @retval true If the ADC is enabled. + * @retval false If the ADC is not enabled. + */ +__STATIC_INLINE bool nrf_adc_enable_check(void); + +/** + * @brief Function for retrieving the ADC conversion result. + * + * This function retrieves and returns the last analog-to-digital conversion result. + * + * @return Last conversion result. + */ +__STATIC_INLINE nrf_adc_value_t nrf_adc_result_get(void); + +/** + * @brief Function for initializing the ADC. + * + * This function writes data to ADC's CONFIG register. After the configuration, + * the ADC is in DISABLE state and must be enabled before using it. + * + * @param[in] p_config Configuration parameters. + */ +__STATIC_INLINE void nrf_adc_init(nrf_adc_config_t const * p_config); + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE void nrf_adc_task_trigger(nrf_adc_task_t task) +{ + *((volatile uint32_t *)((uint8_t *)NRF_ADC + (uint32_t)task)) = 0x1UL; +} + +__STATIC_INLINE uint32_t nrf_adc_task_address_get(nrf_adc_task_t adc_task) +{ + return (uint32_t)((uint8_t *)NRF_ADC + (uint32_t)adc_task); +} + +__STATIC_INLINE bool nrf_adc_event_check(nrf_adc_event_t event) +{ + return (bool)*(volatile uint32_t *)((uint8_t *)NRF_ADC + (uint32_t)event); +} + +__STATIC_INLINE void nrf_adc_event_clear(nrf_adc_event_t event) +{ + *((volatile uint32_t *)((uint8_t *)NRF_ADC + (uint32_t)event)) = 0x0UL; +} + +__STATIC_INLINE uint32_t nrf_adc_event_address_get(nrf_adc_event_t adc_event) +{ + return (uint32_t)((uint8_t *)NRF_ADC + (uint32_t)adc_event); +} + +__STATIC_INLINE void nrf_adc_int_enable(uint32_t int_mask) +{ + NRF_ADC->INTENSET = int_mask; +} + +__STATIC_INLINE void nrf_adc_int_disable(uint32_t int_mask) +{ + NRF_ADC->INTENCLR = int_mask; +} + +__STATIC_INLINE bool nrf_adc_int_enable_check(uint32_t int_mask) +{ + return (bool)(NRF_ADC->INTENSET & int_mask); +} + +__STATIC_INLINE bool nrf_adc_busy_check(void) +{ + return ((NRF_ADC->BUSY & ADC_BUSY_BUSY_Msk) == (ADC_BUSY_BUSY_Busy << ADC_BUSY_BUSY_Pos)); +} + +__STATIC_INLINE void nrf_adc_enable(void) +{ + NRF_ADC->ENABLE = (ADC_ENABLE_ENABLE_Enabled << ADC_ENABLE_ENABLE_Pos); +} + +__STATIC_INLINE void nrf_adc_disable(void) +{ + NRF_ADC->ENABLE = (ADC_ENABLE_ENABLE_Disabled << ADC_ENABLE_ENABLE_Pos); +} + +__STATIC_INLINE bool nrf_adc_enable_check(void) +{ + return (NRF_ADC->ENABLE == (ADC_ENABLE_ENABLE_Enabled << ADC_ENABLE_ENABLE_Pos)); +} + +__STATIC_INLINE nrf_adc_value_t nrf_adc_result_get(void) +{ + return (nrf_adc_value_t)NRF_ADC->RESULT; +} + +__STATIC_INLINE void nrf_adc_init(nrf_adc_config_t const * p_config) +{ + NRF_ADC->CONFIG = + ((p_config->resolution << ADC_CONFIG_RES_Pos) & ADC_CONFIG_RES_Msk) + |((p_config->scaling << ADC_CONFIG_INPSEL_Pos) & ADC_CONFIG_INPSEL_Msk) + |((p_config->reference << ADC_CONFIG_REFSEL_Pos) & ADC_CONFIG_REFSEL_Msk) + |((p_config->input << ADC_CONFIG_PSEL_Pos) & ADC_CONFIG_PSEL_Msk) + |((p_config->extref << ADC_CONFIG_EXTREFSEL_Pos) & ADC_CONFIG_EXTREFSEL_Msk); +} + +#endif // SUPPRESS_INLINE_IMPLEMENTATION +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_ADC_H_ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_clock.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_clock.h new file mode 100644 index 00000000000..31cfc7a2e85 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_clock.h @@ -0,0 +1,400 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_CLOCK_H__ +#define NRF_CLOCK_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_clock_hal Clock HAL + * @{ + * @ingroup nrf_clock + * @brief Hardware access layer for managing the CLOCK peripheral. + * + * This code can be used to managing low-frequency clock (LFCLK) and the high-frequency clock + * (HFCLK) settings. + */ + +#define NRF_CLOCK_TASK_TRIGGER (1UL) +#define NRF_CLOCK_EVENT_CLEAR (0UL) + +/** + * @brief Low-frequency clock sources. + * @details Used by LFCLKSRC, LFCLKSTAT, and LFCLKSRCCOPY registers. + */ +typedef enum +{ + NRF_CLOCK_LFCLK_RC = CLOCK_LFCLKSRC_SRC_RC, /**< Internal 32 kHz RC oscillator. */ + NRF_CLOCK_LFCLK_Xtal = CLOCK_LFCLKSRC_SRC_Xtal, /**< External 32 kHz crystal. */ + NRF_CLOCK_LFCLK_Synth = CLOCK_LFCLKSRC_SRC_Synth /**< Internal 32 kHz synthesizer from HFCLK system clock. */ +} nrf_clock_lfclk_t; + +/** + * @brief High-frequency clock sources. + */ +typedef enum +{ + NRF_CLOCK_HFCLK_LOW_ACCURACY = CLOCK_HFCLKSTAT_SRC_RC, /**< Internal 16 MHz RC oscillator. */ + NRF_CLOCK_HFCLK_HIGH_ACCURACY = CLOCK_HFCLKSTAT_SRC_Xtal /**< External 16 MHz/32 MHz crystal oscillator. */ +} nrf_clock_hfclk_t; + +/** + * @brief Trigger status of task LFCLKSTART/HFCLKSTART. + * @details Used by LFCLKRUN and HFCLKRUN registers. + */ +typedef enum +{ + NRF_CLOCK_START_TASK_NOT_TRIGGERED = CLOCK_LFCLKRUN_STATUS_NotTriggered, /**< Task LFCLKSTART/HFCLKSTART has not been triggered. */ + NRF_CLOCK_START_TASK_TRIGGERED = CLOCK_LFCLKRUN_STATUS_Triggered /**< Task LFCLKSTART/HFCLKSTART has been triggered. */ +} nrf_clock_start_task_status_t; + +/** + * @brief Interrupts. + */ +typedef enum +{ + NRF_CLOCK_INT_HF_STARTED_MASK = CLOCK_INTENSET_HFCLKSTARTED_Msk, /**< Interrupt on HFCLKSTARTED event. */ + NRF_CLOCK_INT_LF_STARTED_MASK = CLOCK_INTENSET_LFCLKSTARTED_Msk, /**< Interrupt on LFCLKSTARTED event. */ + NRF_CLOCK_INT_DONE_MASK = CLOCK_INTENSET_DONE_Msk, /**< Interrupt on DONE event. */ + NRF_CLOCK_INT_CTTO_MASK = CLOCK_INTENSET_CTTO_Msk /**< Interrupt on CTTO event. */ +} nrf_clock_int_mask_t; + +/** + * @brief Tasks. + * + * @details The NRF_CLOCK_TASK_LFCLKSTOP task cannot be set when the low-frequency clock is not running. + * The NRF_CLOCK_TASK_HFCLKSTOP task cannot be set when the high-frequency clock is not running. + */ +typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ +{ + NRF_CLOCK_TASK_HFCLKSTART = offsetof(NRF_CLOCK_Type, TASKS_HFCLKSTART), /**< Start HFCLK clock source.*/ + NRF_CLOCK_TASK_HFCLKSTOP = offsetof(NRF_CLOCK_Type, TASKS_HFCLKSTOP), /**< Stop HFCLK clock source.*/ + NRF_CLOCK_TASK_LFCLKSTART = offsetof(NRF_CLOCK_Type, TASKS_LFCLKSTART), /**< Start LFCLK clock source.*/ + NRF_CLOCK_TASK_LFCLKSTOP = offsetof(NRF_CLOCK_Type, TASKS_LFCLKSTOP), /**< Stop LFCLK clock source.*/ + NRF_CLOCK_TASK_CAL = offsetof(NRF_CLOCK_Type, TASKS_CAL), /**< Start calibration of LFCLK RC oscillator.*/ + NRF_CLOCK_TASK_CTSTART = offsetof(NRF_CLOCK_Type, TASKS_CTSTART), /**< Start calibration timer.*/ + NRF_CLOCK_TASK_CTSTOP = offsetof(NRF_CLOCK_Type, TASKS_CTSTOP) /**< Stop calibration timer.*/ +} nrf_clock_task_t; /*lint -restore */ + +/** + * @brief Events. + */ +typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ +{ + NRF_CLOCK_EVENT_HFCLKSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_HFCLKSTARTED), /**< HFCLK oscillator started.*/ + NRF_CLOCK_EVENT_LFCLKSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_LFCLKSTARTED), /**< LFCLK oscillator started.*/ + NRF_CLOCK_EVENT_DONE = offsetof(NRF_CLOCK_Type, EVENTS_DONE), /**< Calibration of LFCLK RC oscillator completed.*/ + NRF_CLOCK_EVENT_CTTO = offsetof(NRF_CLOCK_Type, EVENTS_CTTO) /**< Calibration timer time-out.*/ +} nrf_clock_event_t; /*lint -restore */ + +/** + * @brief Function for enabling a specific interrupt. + * + * @param[in] int_mask Interrupt. + */ +__STATIC_INLINE void nrf_clock_int_enable(uint32_t int_mask); + +/** + * @brief Function for disabling a specific interrupt. + * + * @param[in] int_mask Interrupt. + */ +__STATIC_INLINE void nrf_clock_int_disable(uint32_t int_mask); + +/** + * @brief Function for retrieving the state of a specific interrupt. + * + * @param[in] int_mask Interrupt. + * + * @retval true If the interrupt is enabled. + * @retval false If the interrupt is not enabled. + */ +__STATIC_INLINE bool nrf_clock_int_enable_check(nrf_clock_int_mask_t int_mask); + +/** + * @brief Function for retrieving the address of a specific task. + * @details This function can be used by the PPI module. + * + * @param[in] task Task. + * + * @return Address of the requested task register. + */ +__STATIC_INLINE uint32_t nrf_clock_task_address_get(nrf_clock_task_t task); + +/** + * @brief Function for setting a specific task. + * + * @param[in] task Task. + */ +__STATIC_INLINE void nrf_clock_task_trigger(nrf_clock_task_t task); + +/** + * @brief Function for retrieving the address of a specific event. + * @details This function can be used by the PPI module. + * + * @param[in] event Event. + * + * @return Address of the requested event register. + */ +__STATIC_INLINE uint32_t nrf_clock_event_address_get(nrf_clock_event_t event); + +/** + * @brief Function for clearing a specific event. + * + * @param[in] event Event. + */ +__STATIC_INLINE void nrf_clock_event_clear(nrf_clock_event_t event); + +/** + * @brief Function for retrieving the state of a specific event. + * + * @param[in] event Event. + * + * @retval true If the event is set. + * @retval false If the event is not set. + */ +__STATIC_INLINE bool nrf_clock_event_check(nrf_clock_event_t event); + +/** + * @brief Function for changing the low-frequency clock source. + * @details This function cannot be called when the low-frequency clock is running. + * + * @param[in] source New low-frequency clock source. + * + */ +__STATIC_INLINE void nrf_clock_lf_src_set(nrf_clock_lfclk_t source); + +/** + * @brief Function for retrieving the selected source for the low-frequency clock. + * + * @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator is the selected source for the low-frequency clock. + * @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator is the selected source for the low-frequency clock. + * @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from the HFCLK is the selected source for the low-frequency clock. + */ +__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_src_get(void); + +/** + * @brief Function for retrieving the active source of the low-frequency clock. + * + * @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator is the active source of the low-frequency clock. + * @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator is the active source of the low-frequency clock. + * @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from the HFCLK is the active source of the low-frequency clock. + */ +__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_actv_src_get(void); + +/** + * @brief Function for retrieving the clock source for the LFCLK clock when the task LKCLKSTART is triggered. + * + * @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator is running and generating the LFCLK clock. + * @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator is running and generating the LFCLK clock. + * @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from the HFCLK is running and generating the LFCLK clock. + */ +__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_srccopy_get(void); + +/** + * @brief Function for retrieving the state of the LFCLK clock. + * + * @retval false If the LFCLK clock is not running. + * @retval true If the LFCLK clock is running. + */ +__STATIC_INLINE bool nrf_clock_lf_is_running(void); + +/** + * @brief Function for retrieving the trigger status of the task LFCLKSTART. + * + * @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED If the task LFCLKSTART has not been triggered. + * @retval NRF_CLOCK_START_TASK_TRIGGERED If the task LFCLKSTART has been triggered. + */ +__STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_lf_start_task_status_get(void); + +/** + * @brief Function for retrieving the active source of the high-frequency clock. + * + * @retval NRF_CLOCK_HFCLK_LOW_ACCURACY If the internal 16 MHz RC oscillator is the active source of the high-frequency clock. + * @retval NRF_CLOCK_HFCLK_HIGH_ACCURACY If an external 16 MHz/32 MHz crystal oscillator is the active source of the high-frequency clock. + */ +__STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hf_src_get(void); + +/** + * @brief Function for retrieving the state of the HFCLK clock. + * + * @param[in] clk_src Clock source to be checked. + * + * @retval false If the HFCLK clock is not running. + * @retval true If the HFCLK clock is running. + */ +__STATIC_INLINE bool nrf_clock_hf_is_running(nrf_clock_hfclk_t clk_src); + +/** + * @brief Function for retrieving the trigger status of the task HFCLKSTART. + * + * @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED If the task HFCLKSTART has not been triggered. + * @retval NRF_CLOCK_START_TASK_TRIGGERED If the task HFCLKSTART has been triggered. + */ +__STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_hf_start_task_status_get(void); + +/** + * @brief Function for changing the calibration timer interval. + * + * @param[in] interval New calibration timer interval in 0.25 s resolution (range: 0.25 seconds to 31.75 seconds). + */ +__STATIC_INLINE void nrf_clock_cal_timer_timeout_set(uint32_t interval); + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE void nrf_clock_int_enable(uint32_t int_mask) +{ + NRF_CLOCK->INTENSET = int_mask; +} + +__STATIC_INLINE void nrf_clock_int_disable(uint32_t int_mask) +{ + NRF_CLOCK->INTENCLR = int_mask; +} + +__STATIC_INLINE bool nrf_clock_int_enable_check(nrf_clock_int_mask_t int_mask) +{ + return (bool)(NRF_CLOCK->INTENCLR & int_mask); +} + +__STATIC_INLINE uint32_t nrf_clock_task_address_get(nrf_clock_task_t task) +{ + return ((uint32_t )NRF_CLOCK + task); +} + +__STATIC_INLINE void nrf_clock_task_trigger(nrf_clock_task_t task) +{ + *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + task)) = NRF_CLOCK_TASK_TRIGGER; +} + +__STATIC_INLINE uint32_t nrf_clock_event_address_get(nrf_clock_event_t event) +{ + return ((uint32_t)NRF_CLOCK + event); +} + +__STATIC_INLINE void nrf_clock_event_clear(nrf_clock_event_t event) +{ + *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + event)) = NRF_CLOCK_EVENT_CLEAR; +#if __CORTEX_M == 0x04 + volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + event)); + (void)dummy; +#endif +} + +__STATIC_INLINE bool nrf_clock_event_check(nrf_clock_event_t event) +{ + return (bool)*((volatile uint32_t *)((uint8_t *)NRF_CLOCK + event)); +} + +__STATIC_INLINE void nrf_clock_lf_src_set(nrf_clock_lfclk_t source) +{ + NRF_CLOCK->LFCLKSRC = + (uint32_t)((source << CLOCK_LFCLKSRC_SRC_Pos) & CLOCK_LFCLKSRC_SRC_Msk); +} + +__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_src_get(void) +{ + return (nrf_clock_lfclk_t)((NRF_CLOCK->LFCLKSRC & + CLOCK_LFCLKSRC_SRC_Msk) >> CLOCK_LFCLKSRC_SRC_Pos); +} + +__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_actv_src_get(void) +{ + return (nrf_clock_lfclk_t)((NRF_CLOCK->LFCLKSTAT & + CLOCK_LFCLKSTAT_SRC_Msk) >> CLOCK_LFCLKSTAT_SRC_Pos); +} + +__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_srccopy_get(void) +{ + return (nrf_clock_lfclk_t)((NRF_CLOCK->LFCLKSRCCOPY & + CLOCK_LFCLKSRCCOPY_SRC_Msk) >> CLOCK_LFCLKSRCCOPY_SRC_Pos); +} + +__STATIC_INLINE bool nrf_clock_lf_is_running(void) +{ + return ((NRF_CLOCK->LFCLKSTAT & + CLOCK_LFCLKSTAT_STATE_Msk) >> CLOCK_LFCLKSTAT_STATE_Pos); +} + +__STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_lf_start_task_status_get(void) +{ + return (nrf_clock_start_task_status_t)((NRF_CLOCK->LFCLKRUN & + CLOCK_LFCLKRUN_STATUS_Msk) >> + CLOCK_LFCLKRUN_STATUS_Pos); +} + +__STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hf_src_get(void) +{ + return (nrf_clock_hfclk_t)((NRF_CLOCK->HFCLKSTAT & + CLOCK_HFCLKSTAT_SRC_Msk) >> CLOCK_HFCLKSTAT_SRC_Pos); +} + +__STATIC_INLINE bool nrf_clock_hf_is_running(nrf_clock_hfclk_t clk_src) +{ + return (NRF_CLOCK->HFCLKSTAT & (CLOCK_HFCLKSTAT_STATE_Msk | CLOCK_HFCLKSTAT_SRC_Msk)) == + (CLOCK_HFCLKSTAT_STATE_Msk | (clk_src << CLOCK_HFCLKSTAT_SRC_Pos)); +} + +__STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_hf_start_task_status_get(void) +{ + return (nrf_clock_start_task_status_t)((NRF_CLOCK->HFCLKRUN & + CLOCK_HFCLKRUN_STATUS_Msk) >> + CLOCK_HFCLKRUN_STATUS_Pos); +} + +__STATIC_INLINE void nrf_clock_cal_timer_timeout_set(uint32_t interval) +{ + NRF_CLOCK->CTIV = ((interval << CLOCK_CTIV_CTIV_Pos) & CLOCK_CTIV_CTIV_Msk); +} + +#endif // SUPPRESS_INLINE_IMPLEMENTATION + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_CLOCK_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_comp.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_comp.h new file mode 100644 index 00000000000..0f8b1081645 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_comp.h @@ -0,0 +1,509 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_COMP_H_ +#define NRF_COMP_H_ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_comp_hal COMP HAL + * @{ + * @ingroup nrf_comp + * @brief Hardware access layer for managing the Comparator (COMP) peripheral. + */ + +/** + * @enum nrf_comp_input_t + * @brief COMP analog pin selection. + */ +typedef enum +{ + NRF_COMP_INPUT_0 = COMP_PSEL_PSEL_AnalogInput0, /*!< AIN0 selected as analog input. */ + NRF_COMP_INPUT_1 = COMP_PSEL_PSEL_AnalogInput1, /*!< AIN1 selected as analog input. */ + NRF_COMP_INPUT_2 = COMP_PSEL_PSEL_AnalogInput2, /*!< AIN2 selected as analog input. */ + NRF_COMP_INPUT_3 = COMP_PSEL_PSEL_AnalogInput3, /*!< AIN3 selected as analog input. */ + NRF_COMP_INPUT_4 = COMP_PSEL_PSEL_AnalogInput4, /*!< AIN4 selected as analog input. */ + NRF_COMP_INPUT_5 = COMP_PSEL_PSEL_AnalogInput5, /*!< AIN5 selected as analog input. */ + NRF_COMP_INPUT_6 = COMP_PSEL_PSEL_AnalogInput6, /*!< AIN6 selected as analog input. */ +#if defined (COMP_PSEL_PSEL_AnalogInput7) || defined (__NRFX_DOXYGEN__) + NRF_COMP_INPUT_7 = COMP_PSEL_PSEL_AnalogInput7, /*!< AIN7 selected as analog input. */ +#endif +#if defined (COMP_PSEL_PSEL_VddDiv2) || defined (__NRFX_DOXYGEN__) + NRF_COMP_VDD_DIV2 = COMP_PSEL_PSEL_VddDiv2, /*!< VDD/2 selected as analog input. */ +#endif +}nrf_comp_input_t; + +/** + * @enum nrf_comp_ref_t + * @brief COMP reference selection. + */ +typedef enum +{ + NRF_COMP_REF_Int1V2 = COMP_REFSEL_REFSEL_Int1V2, /*!< VREF = internal 1.2 V reference (VDD >= 1.7 V). */ + NRF_COMP_REF_Int1V8 = COMP_REFSEL_REFSEL_Int1V8, /*!< VREF = internal 1.8 V reference (VDD >= VREF + 0.2 V). */ + NRF_COMP_REF_Int2V4 = COMP_REFSEL_REFSEL_Int2V4, /*!< VREF = internal 2.4 V reference (VDD >= VREF + 0.2 V). */ + NRF_COMP_REF_VDD = COMP_REFSEL_REFSEL_VDD, /*!< VREF = VDD. */ + NRF_COMP_REF_ARef = COMP_REFSEL_REFSEL_ARef /*!< VREF = AREF (VDD >= VREF >= AREFMIN). */ +}nrf_comp_ref_t; + +/** + * @enum nrf_comp_ext_ref_t + * @brief COMP external analog reference selection. + */ +typedef enum +{ + NRF_COMP_EXT_REF_0 = COMP_EXTREFSEL_EXTREFSEL_AnalogReference0, /*!< Use AIN0 as external analog reference. */ + NRF_COMP_EXT_REF_1 = COMP_EXTREFSEL_EXTREFSEL_AnalogReference1 /*!< Use AIN1 as external analog reference. */ +}nrf_comp_ext_ref_t; + +/** + * @brief COMP THDOWN and THUP values that are used to calculate the threshold voltages VDOWN and VUP. + */ +typedef struct +{ + uint8_t th_down; /*!< THDOWN value. */ + uint8_t th_up; /*!< THUP value. */ +}nrf_comp_th_t; + +/** + * @enum nrf_comp_main_mode_t + * @brief COMP main operation mode. + */ +typedef enum +{ + NRF_COMP_MAIN_MODE_SE = COMP_MODE_MAIN_SE, /*!< Single ended mode. */ + NRF_COMP_MAIN_MODE_Diff = COMP_MODE_MAIN_Diff /*!< Differential mode. */ +}nrf_comp_main_mode_t; + +/** + * @enum nrf_comp_sp_mode_t + * @brief COMP speed and power mode. + */ +typedef enum +{ + NRF_COMP_SP_MODE_Low = COMP_MODE_SP_Low, /*!< Low power mode. */ + NRF_COMP_SP_MODE_Normal = COMP_MODE_SP_Normal, /*!< Normal mode. */ + NRF_COMP_SP_MODE_High = COMP_MODE_SP_High /*!< High speed mode. */ +}nrf_comp_sp_mode_t; + +/** + * @enum nrf_comp_hyst_t + * @brief COMP comparator hysteresis. + */ +typedef enum +{ + NRF_COMP_HYST_NoHyst = COMP_HYST_HYST_NoHyst, /*!< Comparator hysteresis disabled. */ + NRF_COMP_HYST_50mV = COMP_HYST_HYST_Hyst50mV /*!< Comparator hysteresis enabled. */ +}nrf_comp_hyst_t; + +#if defined (COMP_ISOURCE_ISOURCE_Msk) || defined (__NRFX_DOXYGEN__) +/** + * @brief COMP current source selection on analog input. + */ +typedef enum +{ + NRF_COMP_ISOURCE_Off = COMP_ISOURCE_ISOURCE_Off, /*!< Current source disabled. */ + NRF_COMP_ISOURCE_Ien2uA5 = COMP_ISOURCE_ISOURCE_Ien2mA5, /*!< Current source enabled (+/- 2.5 uA). */ + NRF_COMP_ISOURCE_Ien5uA = COMP_ISOURCE_ISOURCE_Ien5mA, /*!< Current source enabled (+/- 5 uA). */ + NRF_COMP_ISOURCE_Ien10uA = COMP_ISOURCE_ISOURCE_Ien10mA /*!< Current source enabled (+/- 10 uA). */ +}nrf_isource_t; +#endif + +/** + * @enum nrf_comp_task_t + * @brief COMP tasks. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_COMP_TASK_START = offsetof(NRF_COMP_Type, TASKS_START), /*!< COMP start sampling task. */ + NRF_COMP_TASK_STOP = offsetof(NRF_COMP_Type, TASKS_STOP), /*!< COMP stop sampling task. */ + NRF_COMP_TASK_SAMPLE = offsetof(NRF_COMP_Type, TASKS_SAMPLE) /*!< Sample comparator value. */ + /*lint -restore*/ +}nrf_comp_task_t; + +/** + * @enum nrf_comp_event_t + * @brief COMP events. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_COMP_EVENT_READY = offsetof(NRF_COMP_Type, EVENTS_READY), /*!< COMP is ready and output is valid. */ + NRF_COMP_EVENT_DOWN = offsetof(NRF_COMP_Type, EVENTS_DOWN), /*!< Input voltage crossed the threshold going down. */ + NRF_COMP_EVENT_UP = offsetof(NRF_COMP_Type, EVENTS_UP), /*!< Input voltage crossed the threshold going up. */ + NRF_COMP_EVENT_CROSS = offsetof(NRF_COMP_Type, EVENTS_CROSS) /*!< Input voltage crossed the threshold in any direction. */ + /*lint -restore*/ +}nrf_comp_event_t; + +/** + * @brief COMP reference configuration. + */ +typedef struct +{ + nrf_comp_ref_t reference; /*!< COMP reference selection. */ + nrf_comp_ext_ref_t external; /*!< COMP external analog reference selection. */ +}nrf_comp_ref_conf_t; + + +/** + * @brief Function for enabling the COMP peripheral. + */ +__STATIC_INLINE void nrf_comp_enable(void); + + +/** + * @brief Function for disabling the COMP peripheral. + */ + +__STATIC_INLINE void nrf_comp_disable(void); + +/** + * @brief Function for checking if the COMP peripheral is enabled. + * + * @retval true If the COMP peripheral is enabled. + * @retval false If the COMP peripheral is not enabled. + */ +__STATIC_INLINE bool nrf_comp_enable_check(void); + +/** + * @brief Function for setting the reference source. + * + * @param[in] reference COMP reference selection. + */ +__STATIC_INLINE void nrf_comp_ref_set(nrf_comp_ref_t reference); + + +/** + * @brief Function for setting the external analog reference source. + * + * @param[in] ext_ref COMP external analog reference selection. + */ +__STATIC_INLINE void nrf_comp_ext_ref_set(nrf_comp_ext_ref_t ext_ref); + + +/** + * @brief Function for setting threshold voltages. + * + * @param[in] threshold COMP VDOWN and VUP thresholds. + */ +__STATIC_INLINE void nrf_comp_th_set(nrf_comp_th_t threshold); + + +/** + * @brief Function for setting the main mode. + * + * @param[in] main_mode COMP main operation mode. + */ +__STATIC_INLINE void nrf_comp_main_mode_set(nrf_comp_main_mode_t main_mode); + + +/** + * @brief Function for setting the speed mode. + * + * @param[in] speed_mode COMP speed and power mode. + */ +__STATIC_INLINE void nrf_comp_speed_mode_set(nrf_comp_sp_mode_t speed_mode); + + +/** + * @brief Function for setting the hysteresis. + * + * @param[in] hyst COMP comparator hysteresis. + */ +__STATIC_INLINE void nrf_comp_hysteresis_set(nrf_comp_hyst_t hyst); + + +#if defined (COMP_ISOURCE_ISOURCE_Msk) || defined (__NRFX_DOXYGEN__) +/** + * @brief Function for setting the current source on the analog input. + * + * @param[in] isource COMP current source selection on analog input. + */ +__STATIC_INLINE void nrf_comp_isource_set(nrf_isource_t isource); +#endif + + +/** + * @brief Function for selecting the active input of the COMP. + * + * @param[in] input Input to be selected. + */ +__STATIC_INLINE void nrf_comp_input_select(nrf_comp_input_t input); + + +/** + * @brief Function for getting the last COMP compare result. + * + * @return The last compare result. If 0, then VIN+ < VIN-. If 1, then VIN+ > VIN-. + * + * @note If VIN+ == VIN-, the return value depends on the previous result. + */ +__STATIC_INLINE uint32_t nrf_comp_result_get(void); + + +/** + * @brief Function for enabling interrupts from COMP. + * + * @param[in] comp_int_mask Mask of interrupts to be enabled. + * + * @sa nrf_comp_int_enable_check() + */ +__STATIC_INLINE void nrf_comp_int_enable(uint32_t comp_int_mask); + +/** + * @brief Function for disabling interrupts from COMP. + * + * @param[in] comp_int_mask Mask of interrupts to be disabled. + * + * @sa nrf_comp_int_enable_check() + */ +__STATIC_INLINE void nrf_comp_int_disable(uint32_t comp_int_mask); + + +/** + * @brief Function for getting the enabled interrupts of COMP. + * + * @param[in] comp_int_mask Mask of interrupts to be checked. + * + * @retval true If any interrupts of the specified mask are enabled. + */ +__STATIC_INLINE bool nrf_comp_int_enable_check(uint32_t comp_int_mask); + + + +/** + * @brief Function for getting the address of a specific COMP task register. + * + * @param[in] comp_task COMP task. + * + * @return Address of the specified COMP task. + */ +__STATIC_INLINE uint32_t * nrf_comp_task_address_get(nrf_comp_task_t comp_task); + + +/** + * @brief Function for getting the address of a specific COMP event register. + * + * @param[in] comp_event COMP event. + * + * @return Address of the specified COMP event. + */ +__STATIC_INLINE uint32_t * nrf_comp_event_address_get(nrf_comp_event_t comp_event); + + +/** + * @brief Function for setting COMP shorts. + * + * @param[in] comp_short_mask COMP shorts by mask. + * + */ +__STATIC_INLINE void nrf_comp_shorts_enable(uint32_t comp_short_mask); + + +/** + * @brief Function for clearing COMP shorts by mask. + * + * @param[in] comp_short_mask COMP shorts to be cleared. + * + */ +__STATIC_INLINE void nrf_comp_shorts_disable(uint32_t comp_short_mask); + + +/** + * @brief Function for setting a specific COMP task. + * + * @param[in] comp_task COMP task to be set. + * + */ +__STATIC_INLINE void nrf_comp_task_trigger(nrf_comp_task_t comp_task); + + +/** + * @brief Function for clearing a specific COMP event. + * + * @param[in] comp_event COMP event to be cleared. + * + */ +__STATIC_INLINE void nrf_comp_event_clear(nrf_comp_event_t comp_event); + + +/** + * @brief Function for getting the state of a specific COMP event. + * + * @retval true If the specified COMP event is active. + * + */ +__STATIC_INLINE bool nrf_comp_event_check(nrf_comp_event_t comp_event); + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE void nrf_comp_enable(void) +{ + NRF_COMP->ENABLE = (COMP_ENABLE_ENABLE_Enabled << COMP_ENABLE_ENABLE_Pos); +} + +__STATIC_INLINE void nrf_comp_disable(void) +{ + NRF_COMP->ENABLE = (COMP_ENABLE_ENABLE_Disabled << COMP_ENABLE_ENABLE_Pos); +} + +__STATIC_INLINE bool nrf_comp_enable_check(void) +{ + return ((NRF_COMP->ENABLE) & COMP_ENABLE_ENABLE_Enabled); +} + +__STATIC_INLINE void nrf_comp_ref_set(nrf_comp_ref_t reference) +{ + NRF_COMP->REFSEL = (reference << COMP_REFSEL_REFSEL_Pos); +} + +__STATIC_INLINE void nrf_comp_ext_ref_set(nrf_comp_ext_ref_t ext_ref) +{ + NRF_COMP->EXTREFSEL = (ext_ref << COMP_EXTREFSEL_EXTREFSEL_Pos); +} + +__STATIC_INLINE void nrf_comp_th_set(nrf_comp_th_t threshold) +{ + NRF_COMP->TH = + ((threshold.th_down << COMP_TH_THDOWN_Pos) & COMP_TH_THDOWN_Msk) | + ((threshold.th_up << COMP_TH_THUP_Pos) & COMP_TH_THUP_Msk); +} + +__STATIC_INLINE void nrf_comp_main_mode_set(nrf_comp_main_mode_t main_mode) +{ + NRF_COMP->MODE |= (main_mode << COMP_MODE_MAIN_Pos); +} + +__STATIC_INLINE void nrf_comp_speed_mode_set(nrf_comp_sp_mode_t speed_mode) +{ + NRF_COMP->MODE |= (speed_mode << COMP_MODE_SP_Pos); +} + +__STATIC_INLINE void nrf_comp_hysteresis_set(nrf_comp_hyst_t hyst) +{ + NRF_COMP->HYST = (hyst << COMP_HYST_HYST_Pos) & COMP_HYST_HYST_Msk; +} + +#if defined (COMP_ISOURCE_ISOURCE_Msk) +__STATIC_INLINE void nrf_comp_isource_set(nrf_isource_t isource) +{ + NRF_COMP->ISOURCE = (isource << COMP_ISOURCE_ISOURCE_Pos) & COMP_ISOURCE_ISOURCE_Msk; +} +#endif + +__STATIC_INLINE void nrf_comp_input_select(nrf_comp_input_t input) +{ + NRF_COMP->PSEL = ((uint32_t)input << COMP_PSEL_PSEL_Pos); +} + +__STATIC_INLINE uint32_t nrf_comp_result_get(void) +{ + return (uint32_t)NRF_COMP->RESULT; +} + +__STATIC_INLINE void nrf_comp_int_enable(uint32_t comp_int_mask) +{ + NRF_COMP->INTENSET = comp_int_mask; +} + +__STATIC_INLINE void nrf_comp_int_disable(uint32_t comp_int_mask) +{ + NRF_COMP->INTENCLR = comp_int_mask; +} + +__STATIC_INLINE bool nrf_comp_int_enable_check(uint32_t comp_int_mask) +{ + return (NRF_COMP->INTENSET & comp_int_mask); // when read this register will return the value of INTEN. +} + +__STATIC_INLINE uint32_t * nrf_comp_task_address_get(nrf_comp_task_t comp_task) +{ + return (uint32_t *)((uint8_t *)NRF_COMP + (uint32_t)comp_task); +} + +__STATIC_INLINE uint32_t * nrf_comp_event_address_get(nrf_comp_event_t comp_event) +{ + return (uint32_t *)((uint8_t *)NRF_COMP + (uint32_t)comp_event); +} + +__STATIC_INLINE void nrf_comp_shorts_enable(uint32_t comp_short_mask) +{ + NRF_COMP->SHORTS |= comp_short_mask; +} + +__STATIC_INLINE void nrf_comp_shorts_disable(uint32_t comp_short_mask) +{ + NRF_COMP->SHORTS &= ~comp_short_mask; +} + +__STATIC_INLINE void nrf_comp_task_trigger(nrf_comp_task_t comp_task) +{ + *( (volatile uint32_t *)( (uint8_t *)NRF_COMP + comp_task) ) = 1; +} + +__STATIC_INLINE void nrf_comp_event_clear(nrf_comp_event_t comp_event) +{ + *( (volatile uint32_t *)( (uint8_t *)NRF_COMP + (uint32_t)comp_event) ) = 0; +#if __CORTEX_M == 0x04 + volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_COMP + (uint32_t)comp_event)); + (void)dummy; +#endif +} + +__STATIC_INLINE bool nrf_comp_event_check(nrf_comp_event_t comp_event) +{ + return (bool) (*(volatile uint32_t *)( (uint8_t *)NRF_COMP + comp_event)); +} + +#endif // SUPPRESS_INLINE_IMPLEMENTATION + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_COMP_H_ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_ecb.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_ecb.c new file mode 100644 index 00000000000..e794a0838e5 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_ecb.c @@ -0,0 +1,93 @@ +/** + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +//lint -e438 + +#include +#include "nrf_ecb.h" +#include + +static uint8_t ecb_data[48]; ///< ECB data structure for RNG peripheral to access. +static uint8_t* ecb_key; ///< Key: Starts at ecb_data +static uint8_t* ecb_cleartext; ///< Cleartext: Starts at ecb_data + 16 bytes. +static uint8_t* ecb_ciphertext; ///< Ciphertext: Starts at ecb_data + 32 bytes. + +bool nrf_ecb_init(void) +{ + ecb_key = ecb_data; + ecb_cleartext = ecb_data + 16; + ecb_ciphertext = ecb_data + 32; + + NRF_ECB->ECBDATAPTR = (uint32_t)ecb_data; + return true; +} + + +bool nrf_ecb_crypt(uint8_t * dest_buf, const uint8_t * src_buf) +{ + uint32_t counter = 0x1000000; + if (src_buf != ecb_cleartext) + { + memcpy(ecb_cleartext,src_buf,16); + } + NRF_ECB->EVENTS_ENDECB = 0; + NRF_ECB->TASKS_STARTECB = 1; + while (NRF_ECB->EVENTS_ENDECB == 0) + { + counter--; + if (counter == 0) + { + return false; + } + } + NRF_ECB->EVENTS_ENDECB = 0; + if (dest_buf != ecb_ciphertext) + { + memcpy(dest_buf,ecb_ciphertext,16); + } + return true; +} + +void nrf_ecb_set_key(const uint8_t * key) +{ + memcpy(ecb_key,key,16); +} + + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_ecb.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_ecb.h new file mode 100644 index 00000000000..15830b7d900 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_ecb.h @@ -0,0 +1,97 @@ +/** + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_ECB_H__ +#define NRF_ECB_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_ecb_hal AES ECB encryption HAL + * @{ + * @ingroup nrf_ecb + * @brief Driver for the AES Electronic Code Book (ECB) peripheral. + * + * To encrypt data, the peripheral must first be powered on + * using @ref nrf_ecb_init. Next, the key must be set using @ref nrf_ecb_set_key. + */ + +/** + * @brief Function for initializing and powering on the ECB peripheral. + * + * This function allocates memory for the ECBDATAPTR. + * @retval true If initialization was successful. + * @retval false If powering on failed. + */ +bool nrf_ecb_init(void); + +/** + * @brief Function for encrypting 16-byte data using current key. + * + * This function avoids unnecessary copying of data if the parameters point to the + * correct locations in the ECB data structure. + * + * @param dst Result of encryption, 16 bytes will be written. + * @param src Source with 16-byte data to be encrypted. + * + * @retval true If the encryption operation completed. + * @retval false If the encryption operation did not complete. + */ +bool nrf_ecb_crypt(uint8_t * dst, const uint8_t * src); + +/** + * @brief Function for setting the key to be used for encryption. + * + * @param key Pointer to the key. 16 bytes will be read. + */ +void nrf_ecb_set_key(const uint8_t * key); + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_ECB_H__ + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_egu.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_egu.h new file mode 100644 index 00000000000..083dce279a6 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_egu.h @@ -0,0 +1,389 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_EGU_H__ +#define NRF_EGU_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** +* @defgroup nrf_egu_hal EGU HAL +* @{ +* @ingroup nrf_swi_egu +* @brief Hardware access layer for managing the Event Generator Unit (EGU) peripheral. +*/ + +/** + * @enum nrf_egu_task_t + * @brief EGU tasks. + */ +typedef enum +{ + /*lint -save -e30 -esym(628,__INTADDR__)*/ + NRF_EGU_TASK_TRIGGER0 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[0]), /**< Trigger 0 for triggering the corresponding TRIGGERED[0] event. */ + NRF_EGU_TASK_TRIGGER1 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[1]), /**< Trigger 1 for triggering the corresponding TRIGGERED[1] event. */ + NRF_EGU_TASK_TRIGGER2 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[2]), /**< Trigger 2 for triggering the corresponding TRIGGERED[2] event. */ + NRF_EGU_TASK_TRIGGER3 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[3]), /**< Trigger 3 for triggering the corresponding TRIGGERED[3] event. */ + NRF_EGU_TASK_TRIGGER4 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[4]), /**< Trigger 4 for triggering the corresponding TRIGGERED[4] event. */ + NRF_EGU_TASK_TRIGGER5 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[5]), /**< Trigger 5 for triggering the corresponding TRIGGERED[5] event. */ + NRF_EGU_TASK_TRIGGER6 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[6]), /**< Trigger 6 for triggering the corresponding TRIGGERED[6] event. */ + NRF_EGU_TASK_TRIGGER7 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[7]), /**< Trigger 7 for triggering the corresponding TRIGGERED[7] event. */ + NRF_EGU_TASK_TRIGGER8 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[8]), /**< Trigger 8 for triggering the corresponding TRIGGERED[8] event. */ + NRF_EGU_TASK_TRIGGER9 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[9]), /**< Trigger 9 for triggering the corresponding TRIGGERED[9] event. */ + NRF_EGU_TASK_TRIGGER10 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[10]), /**< Trigger 10 for triggering the corresponding TRIGGERED[10] event. */ + NRF_EGU_TASK_TRIGGER11 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[11]), /**< Trigger 11 for triggering the corresponding TRIGGERED[11] event. */ + NRF_EGU_TASK_TRIGGER12 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[12]), /**< Trigger 12 for triggering the corresponding TRIGGERED[12] event. */ + NRF_EGU_TASK_TRIGGER13 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[13]), /**< Trigger 13 for triggering the corresponding TRIGGERED[13] event. */ + NRF_EGU_TASK_TRIGGER14 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[14]), /**< Trigger 14 for triggering the corresponding TRIGGERED[14] event. */ + NRF_EGU_TASK_TRIGGER15 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[15]) /**< Trigger 15 for triggering the corresponding TRIGGERED[15] event. */ + /*lint -restore*/ +} nrf_egu_task_t; + + +/** + * @enum nrf_egu_event_t + * @brief EGU events. + */ +typedef enum +{ + /*lint -save -e30 -esym(628,__INTADDR__)*/ + NRF_EGU_EVENT_TRIGGERED0 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[0]), /**< Event number 0 generated by triggering the corresponding TRIGGER[0] task. */ + NRF_EGU_EVENT_TRIGGERED1 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[1]), /**< Event number 1 generated by triggering the corresponding TRIGGER[1] task. */ + NRF_EGU_EVENT_TRIGGERED2 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[2]), /**< Event number 2 generated by triggering the corresponding TRIGGER[2] task. */ + NRF_EGU_EVENT_TRIGGERED3 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[3]), /**< Event number 3 generated by triggering the corresponding TRIGGER[3] task. */ + NRF_EGU_EVENT_TRIGGERED4 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[4]), /**< Event number 4 generated by triggering the corresponding TRIGGER[4] task. */ + NRF_EGU_EVENT_TRIGGERED5 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[5]), /**< Event number 5 generated by triggering the corresponding TRIGGER[5] task. */ + NRF_EGU_EVENT_TRIGGERED6 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[6]), /**< Event number 6 generated by triggering the corresponding TRIGGER[6] task. */ + NRF_EGU_EVENT_TRIGGERED7 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[7]), /**< Event number 7 generated by triggering the corresponding TRIGGER[7] task. */ + NRF_EGU_EVENT_TRIGGERED8 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[8]), /**< Event number 8 generated by triggering the corresponding TRIGGER[8] task. */ + NRF_EGU_EVENT_TRIGGERED9 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[9]), /**< Event number 9 generated by triggering the corresponding TRIGGER[9] task. */ + NRF_EGU_EVENT_TRIGGERED10 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[10]), /**< Event number 10 generated by triggering the corresponding TRIGGER[10] task. */ + NRF_EGU_EVENT_TRIGGERED11 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[11]), /**< Event number 11 generated by triggering the corresponding TRIGGER[11] task. */ + NRF_EGU_EVENT_TRIGGERED12 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[12]), /**< Event number 12 generated by triggering the corresponding TRIGGER[12] task. */ + NRF_EGU_EVENT_TRIGGERED13 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[13]), /**< Event number 13 generated by triggering the corresponding TRIGGER[13] task. */ + NRF_EGU_EVENT_TRIGGERED14 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[14]), /**< Event number 14 generated by triggering the corresponding TRIGGER[14] task. */ + NRF_EGU_EVENT_TRIGGERED15 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[15]) /**< Event number 15 generated by triggering the corresponding TRIGGER[15] task. */ + /*lint -restore*/ +} nrf_egu_event_t; + + +/** + * @enum nrf_egu_int_mask_t + * @brief EGU interrupts. + */ +typedef enum +{ + NRF_EGU_INT_TRIGGERED0 = EGU_INTENSET_TRIGGERED0_Msk, /**< Interrupt on EVENTS_TRIGGERED[0] event. */ + NRF_EGU_INT_TRIGGERED1 = EGU_INTENSET_TRIGGERED1_Msk, /**< Interrupt on EVENTS_TRIGGERED[1] event. */ + NRF_EGU_INT_TRIGGERED2 = EGU_INTENSET_TRIGGERED2_Msk, /**< Interrupt on EVENTS_TRIGGERED[2] event. */ + NRF_EGU_INT_TRIGGERED3 = EGU_INTENSET_TRIGGERED3_Msk, /**< Interrupt on EVENTS_TRIGGERED[3] event. */ + NRF_EGU_INT_TRIGGERED4 = EGU_INTENSET_TRIGGERED4_Msk, /**< Interrupt on EVENTS_TRIGGERED[4] event. */ + NRF_EGU_INT_TRIGGERED5 = EGU_INTENSET_TRIGGERED5_Msk, /**< Interrupt on EVENTS_TRIGGERED[5] event. */ + NRF_EGU_INT_TRIGGERED6 = EGU_INTENSET_TRIGGERED6_Msk, /**< Interrupt on EVENTS_TRIGGERED[6] event. */ + NRF_EGU_INT_TRIGGERED7 = EGU_INTENSET_TRIGGERED7_Msk, /**< Interrupt on EVENTS_TRIGGERED[7] event. */ + NRF_EGU_INT_TRIGGERED8 = EGU_INTENSET_TRIGGERED8_Msk, /**< Interrupt on EVENTS_TRIGGERED[8] event. */ + NRF_EGU_INT_TRIGGERED9 = EGU_INTENSET_TRIGGERED9_Msk, /**< Interrupt on EVENTS_TRIGGERED[9] event. */ + NRF_EGU_INT_TRIGGERED10 = EGU_INTENSET_TRIGGERED10_Msk, /**< Interrupt on EVENTS_TRIGGERED[10] event. */ + NRF_EGU_INT_TRIGGERED11 = EGU_INTENSET_TRIGGERED11_Msk, /**< Interrupt on EVENTS_TRIGGERED[11] event. */ + NRF_EGU_INT_TRIGGERED12 = EGU_INTENSET_TRIGGERED12_Msk, /**< Interrupt on EVENTS_TRIGGERED[12] event. */ + NRF_EGU_INT_TRIGGERED13 = EGU_INTENSET_TRIGGERED13_Msk, /**< Interrupt on EVENTS_TRIGGERED[13] event. */ + NRF_EGU_INT_TRIGGERED14 = EGU_INTENSET_TRIGGERED14_Msk, /**< Interrupt on EVENTS_TRIGGERED[14] event. */ + NRF_EGU_INT_TRIGGERED15 = EGU_INTENSET_TRIGGERED15_Msk, /**< Interrupt on EVENTS_TRIGGERED[15] event. */ + NRF_EGU_INT_ALL = 0xFFFFuL +} nrf_egu_int_mask_t; + +/**@brief Function for getting max channel number of given EGU. + * + * @param NRF_EGUx EGU instance. + * + * @returns number of available channels. + */ +__STATIC_INLINE uint32_t nrf_egu_channel_count(NRF_EGU_Type * NRF_EGUx); + +/** + * @brief Function for triggering a specific EGU task. + * + * @param NRF_EGUx EGU instance. + * @param egu_task EGU task. + */ +__STATIC_INLINE void nrf_egu_task_trigger(NRF_EGU_Type * NRF_EGUx, nrf_egu_task_t egu_task); + +/** + * @brief Function for returning the address of a specific EGU task register. + * + * @param NRF_EGUx EGU instance. + * @param egu_task EGU task. + */ +__STATIC_INLINE uint32_t * nrf_egu_task_address_get(NRF_EGU_Type * NRF_EGUx, + nrf_egu_task_t egu_task); + +/** + * @brief Function for returning the address of a specific EGU TRIGGER task register. + * + * @param NRF_EGUx EGU instance. + * @param channel Channel number. + */ +__STATIC_INLINE uint32_t * nrf_egu_task_trigger_address_get(NRF_EGU_Type * NRF_EGUx, + uint8_t channel); + +/** + * @brief Function for returning the specific EGU TRIGGER task. + * + * @param NRF_EGUx EGU instance. + * @param channel Channel number. + */ +__STATIC_INLINE nrf_egu_task_t nrf_egu_task_trigger_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel); + +/** + * @brief Function for returning the state of a specific EGU event. + * + * @param NRF_EGUx EGU instance. + * @param egu_event EGU event to check. + */ +__STATIC_INLINE bool nrf_egu_event_check(NRF_EGU_Type * NRF_EGUx, + nrf_egu_event_t egu_event); + +/** + * @brief Function for clearing a specific EGU event. + * + * @param NRF_EGUx EGU instance. + * @param egu_event EGU event to clear. + */ +__STATIC_INLINE void nrf_egu_event_clear(NRF_EGU_Type * NRF_EGUx, + nrf_egu_event_t egu_event); + +/** + * @brief Function for returning the address of a specific EGU event register. + * + * @param NRF_EGUx EGU instance. + * @param egu_event EGU event. + */ +__STATIC_INLINE uint32_t * nrf_egu_event_address_get(NRF_EGU_Type * NRF_EGUx, + nrf_egu_event_t egu_event); + +/** + * @brief Function for returning the address of a specific EGU TRIGGERED event register. + * + * @param NRF_EGUx EGU instance. + * @param channel Channel number. + */ +__STATIC_INLINE uint32_t * nrf_egu_event_triggered_address_get(NRF_EGU_Type * NRF_EGUx, + uint8_t channel); + +/** + * @brief Function for returning the specific EGU TRIGGERED event. + * + * @param NRF_EGUx EGU instance. + * @param channel Channel number. + */ +__STATIC_INLINE nrf_egu_event_t nrf_egu_event_triggered_get(NRF_EGU_Type * NRF_EGUx, + uint8_t channel); + +/** + * @brief Function for enabling one or more specific EGU interrupts. + * + * @param NRF_EGUx EGU instance. + * @param egu_int_mask Interrupts to enable. + */ +__STATIC_INLINE void nrf_egu_int_enable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask); + +/** + * @brief Function for retrieving the state of one or more EGU interrupts. + * + * @param NRF_EGUx EGU instance. + * @param egu_int_mask Interrupts to check. + * + * @retval true If all of the specified interrupts are enabled. + * @retval false If at least one of the specified interrupts is disabled. + */ +__STATIC_INLINE bool nrf_egu_int_enable_check(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask); + +/** + * @brief Function for disabling one or more specific EGU interrupts. + * + * @param NRF_EGUx EGU instance. + * @param egu_int_mask Interrupts to disable. + */ +__STATIC_INLINE void nrf_egu_int_disable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask); + +/** + * @brief Function for retrieving one or more specific EGU interrupts. + * + * @param NRF_EGUx EGU instance. + * @param channel Channel number. + * + * @returns EGU interrupt mask. + */ +__STATIC_INLINE nrf_egu_int_mask_t nrf_egu_int_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel); + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE uint32_t nrf_egu_channel_count(NRF_EGU_Type * NRF_EGUx) +{ + if (NRF_EGUx == NRF_EGU0){ + return EGU0_CH_NUM; + } + if (NRF_EGUx == NRF_EGU1){ + return EGU1_CH_NUM; + } +#if EGU_COUNT > 2 + if (NRF_EGUx == NRF_EGU2){ + return EGU2_CH_NUM; + } + if (NRF_EGUx == NRF_EGU3){ + return EGU3_CH_NUM; + } + if (NRF_EGUx == NRF_EGU4){ + return EGU4_CH_NUM; + } + if (NRF_EGUx == NRF_EGU5){ + return EGU5_CH_NUM; + } +#endif + return 0; +} + +__STATIC_INLINE void nrf_egu_task_trigger(NRF_EGU_Type * NRF_EGUx, nrf_egu_task_t egu_task) +{ + NRFX_ASSERT(NRF_EGUx); + *((volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_task)) = 0x1UL; +} + +__STATIC_INLINE uint32_t * nrf_egu_task_address_get(NRF_EGU_Type * NRF_EGUx, + nrf_egu_task_t egu_task) +{ + NRFX_ASSERT(NRF_EGUx); + return (uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_task); +} + +__STATIC_INLINE uint32_t * nrf_egu_task_trigger_address_get(NRF_EGU_Type * NRF_EGUx, + uint8_t channel) +{ + NRFX_ASSERT(NRF_EGUx); + NRFX_ASSERT(channel < nrf_egu_channel_count(NRF_EGUx)); + return (uint32_t*)&NRF_EGUx->TASKS_TRIGGER[channel]; +} + +__STATIC_INLINE nrf_egu_task_t nrf_egu_task_trigger_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel) +{ + NRFX_ASSERT(NRF_EGUx); + NRFX_ASSERT(channel < nrf_egu_channel_count(NRF_EGUx)); + return (nrf_egu_task_t)((uint32_t) NRF_EGU_TASK_TRIGGER0 + (channel * sizeof(uint32_t))); +} + +__STATIC_INLINE bool nrf_egu_event_check(NRF_EGU_Type * NRF_EGUx, + nrf_egu_event_t egu_event) +{ + NRFX_ASSERT(NRF_EGUx); + return (bool)*(volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event); +} + +__STATIC_INLINE void nrf_egu_event_clear(NRF_EGU_Type * NRF_EGUx, + nrf_egu_event_t egu_event) +{ + NRFX_ASSERT(NRF_EGUx); + *((volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event)) = 0x0UL; +#if __CORTEX_M == 0x04 + volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event)); + (void)dummy; +#endif +} + +__STATIC_INLINE uint32_t * nrf_egu_event_address_get(NRF_EGU_Type * NRF_EGUx, + nrf_egu_event_t egu_event) +{ + NRFX_ASSERT(NRF_EGUx); + return (uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event); +} + +__STATIC_INLINE uint32_t * nrf_egu_event_triggered_address_get(NRF_EGU_Type * NRF_EGUx, + uint8_t channel) +{ + NRFX_ASSERT(NRF_EGUx); + NRFX_ASSERT(channel < nrf_egu_channel_count(NRF_EGUx)); + return (uint32_t*)&NRF_EGUx->EVENTS_TRIGGERED[channel]; +} + +__STATIC_INLINE nrf_egu_event_t nrf_egu_event_triggered_get(NRF_EGU_Type * NRF_EGUx, + uint8_t channel) +{ + NRFX_ASSERT(NRF_EGUx); + NRFX_ASSERT(channel < nrf_egu_channel_count(NRF_EGUx)); + return (nrf_egu_event_t)((uint32_t) NRF_EGU_EVENT_TRIGGERED0 + (channel * sizeof(uint32_t))); +} + +__STATIC_INLINE void nrf_egu_int_enable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask) +{ + NRFX_ASSERT(NRF_EGUx); + NRF_EGUx->INTENSET = egu_int_mask; +} + +__STATIC_INLINE bool nrf_egu_int_enable_check(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask) +{ + NRFX_ASSERT(NRF_EGUx); + return (bool)(NRF_EGUx->INTENSET & egu_int_mask); +} + +__STATIC_INLINE void nrf_egu_int_disable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask) +{ + NRFX_ASSERT(NRF_EGUx); + NRF_EGUx->INTENCLR = egu_int_mask; +} + +__STATIC_INLINE nrf_egu_int_mask_t nrf_egu_int_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel) +{ + NRFX_ASSERT(NRF_EGUx); + NRFX_ASSERT(channel < nrf_egu_channel_count(NRF_EGUx)); + return (nrf_egu_int_mask_t)((uint32_t) (EGU_INTENSET_TRIGGERED0_Msk << channel)); +} + +#endif // SUPPRESS_INLINE_IMPLEMENTATION + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_gpio.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_gpio.h new file mode 100644 index 00000000000..09113205fe7 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_gpio.h @@ -0,0 +1,785 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_GPIO_H__ +#define NRF_GPIO_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_gpio_hal GPIO HAL + * @{ + * @ingroup nrf_gpio + * @brief Hardware access layer for managing the GPIO peripheral. + */ + +#if (GPIO_COUNT == 1) +#define NUMBER_OF_PINS (P0_PIN_NUM) +#define GPIO_REG_LIST {NRF_GPIO} +#elif (GPIO_COUNT == 2) +#define NUMBER_OF_PINS (P0_PIN_NUM + P1_PIN_NUM) +#define GPIO_REG_LIST {NRF_P0, NRF_P1} +#else +#error "Not supported." +#endif + + +/** + * @brief Macro for mapping port and pin numbers to values understandable for nrf_gpio functions. + */ +#define NRF_GPIO_PIN_MAP(port, pin) (((port) << 5) | ((pin) & 0x1F)) + +/** + * @brief Pin direction definitions. + */ +typedef enum +{ + NRF_GPIO_PIN_DIR_INPUT = GPIO_PIN_CNF_DIR_Input, ///< Input. + NRF_GPIO_PIN_DIR_OUTPUT = GPIO_PIN_CNF_DIR_Output ///< Output. +} nrf_gpio_pin_dir_t; + +/** + * @brief Connection of input buffer. + */ +typedef enum +{ + NRF_GPIO_PIN_INPUT_CONNECT = GPIO_PIN_CNF_INPUT_Connect, ///< Connect input buffer. + NRF_GPIO_PIN_INPUT_DISCONNECT = GPIO_PIN_CNF_INPUT_Disconnect ///< Disconnect input buffer. +} nrf_gpio_pin_input_t; + +/** + * @brief Enumerator used for selecting the pin to be pulled down or up at the time of pin configuration. + */ +typedef enum +{ + NRF_GPIO_PIN_NOPULL = GPIO_PIN_CNF_PULL_Disabled, ///< Pin pull-up resistor disabled. + NRF_GPIO_PIN_PULLDOWN = GPIO_PIN_CNF_PULL_Pulldown, ///< Pin pull-down resistor enabled. + NRF_GPIO_PIN_PULLUP = GPIO_PIN_CNF_PULL_Pullup, ///< Pin pull-up resistor enabled. +} nrf_gpio_pin_pull_t; + +/** + * @brief Enumerator used for selecting output drive mode. + */ +typedef enum +{ + NRF_GPIO_PIN_S0S1 = GPIO_PIN_CNF_DRIVE_S0S1, ///< !< Standard '0', standard '1'. + NRF_GPIO_PIN_H0S1 = GPIO_PIN_CNF_DRIVE_H0S1, ///< !< High-drive '0', standard '1'. + NRF_GPIO_PIN_S0H1 = GPIO_PIN_CNF_DRIVE_S0H1, ///< !< Standard '0', high-drive '1'. + NRF_GPIO_PIN_H0H1 = GPIO_PIN_CNF_DRIVE_H0H1, ///< !< High drive '0', high-drive '1'. + NRF_GPIO_PIN_D0S1 = GPIO_PIN_CNF_DRIVE_D0S1, ///< !< Disconnect '0' standard '1'. + NRF_GPIO_PIN_D0H1 = GPIO_PIN_CNF_DRIVE_D0H1, ///< !< Disconnect '0', high-drive '1'. + NRF_GPIO_PIN_S0D1 = GPIO_PIN_CNF_DRIVE_S0D1, ///< !< Standard '0', disconnect '1'. + NRF_GPIO_PIN_H0D1 = GPIO_PIN_CNF_DRIVE_H0D1, ///< !< High-drive '0', disconnect '1'. +} nrf_gpio_pin_drive_t; + +/** + * @brief Enumerator used for selecting the pin to sense high or low level on the pin input. + */ +typedef enum +{ + NRF_GPIO_PIN_NOSENSE = GPIO_PIN_CNF_SENSE_Disabled, ///< Pin sense level disabled. + NRF_GPIO_PIN_SENSE_LOW = GPIO_PIN_CNF_SENSE_Low, ///< Pin sense low level. + NRF_GPIO_PIN_SENSE_HIGH = GPIO_PIN_CNF_SENSE_High, ///< Pin sense high level. +} nrf_gpio_pin_sense_t; + +/** + * @brief Function for configuring the GPIO pin range as output pins with normal drive strength. + * This function can be used to configure pin range as simple output with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases). + * + * @param pin_range_start Specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30). + * + * @param pin_range_end Specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30). + * + * @note For configuring only one pin as output, use @ref nrf_gpio_cfg_output. + * Sense capability on the pin is disabled and input is disconnected from the buffer as the pins are configured as output. + */ +__STATIC_INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end); + +/** + * @brief Function for configuring the GPIO pin range as input pins with given initial value set, hiding inner details. + * This function can be used to configure pin range as simple input. + * + * @param pin_range_start Specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30). + * + * @param pin_range_end Specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30). + * + * @param pull_config State of the pin range pull resistor (no pull, pulled down, or pulled high). + * + * @note For configuring only one pin as input, use @ref nrf_gpio_cfg_input. + * Sense capability on the pin is disabled and input is connected to buffer so that the GPIO->IN register is readable. + */ +__STATIC_INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start, + uint32_t pin_range_end, + nrf_gpio_pin_pull_t pull_config); + +/** + * @brief Pin configuration function. + * + * The main pin configuration function. + * This function allows to set any aspect in PIN_CNF register. + * @param pin_number Specifies the pin number. + * @param dir Pin direction. + * @param input Connect or disconnect the input buffer. + * @param pull Pull configuration. + * @param drive Drive configuration. + * @param sense Pin sensing mechanism. + */ +__STATIC_INLINE void nrf_gpio_cfg( + uint32_t pin_number, + nrf_gpio_pin_dir_t dir, + nrf_gpio_pin_input_t input, + nrf_gpio_pin_pull_t pull, + nrf_gpio_pin_drive_t drive, + nrf_gpio_pin_sense_t sense); + +/** + * @brief Function for configuring the given GPIO pin number as output, hiding inner details. + * This function can be used to configure a pin as simple output with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases). + * + * @param pin_number Specifies the pin number. + * + * @note Sense capability on the pin is disabled and input is disconnected from the buffer as the pins are configured as output. + */ +__STATIC_INLINE void nrf_gpio_cfg_output(uint32_t pin_number); + +/** + * @brief Function for configuring the given GPIO pin number as input, hiding inner details. + * This function can be used to configure a pin as simple input. + * + * @param pin_number Specifies the pin number. + * @param pull_config State of the pin range pull resistor (no pull, pulled down, or pulled high). + * + * @note Sense capability on the pin is disabled and input is connected to buffer so that the GPIO->IN register is readable. + */ +__STATIC_INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config); + +/** + * @brief Function for resetting pin configuration to its default state. + * + * @param pin_number Specifies the pin number. + */ +__STATIC_INLINE void nrf_gpio_cfg_default(uint32_t pin_number); + +/** + * @brief Function for configuring the given GPIO pin number as a watcher. Only input is connected. + * + * @param pin_number Specifies the pin number. + * + */ +__STATIC_INLINE void nrf_gpio_cfg_watcher(uint32_t pin_number); + +/** + * @brief Function for disconnecting input for the given GPIO. + * + * @param pin_number Specifies the pin number. + * + */ +__STATIC_INLINE void nrf_gpio_input_disconnect(uint32_t pin_number); + +/** + * @brief Function for configuring the given GPIO pin number as input, hiding inner details. + * This function can be used to configure pin range as simple input. + * Sense capability on the pin is configurable and input is connected to buffer so that the GPIO->IN register is readable. + * + * @param pin_number Specifies the pin number. + * @param pull_config State of the pin pull resistor (no pull, pulled down, or pulled high). + * @param sense_config Sense level of the pin (no sense, sense low, or sense high). + */ +__STATIC_INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number, + nrf_gpio_pin_pull_t pull_config, + nrf_gpio_pin_sense_t sense_config); + +/** + * @brief Function for configuring sense level for the given GPIO. + * + * @param pin_number Specifies the pin number. + * @param sense_config Sense configuration. + * + */ +__STATIC_INLINE void nrf_gpio_cfg_sense_set(uint32_t pin_number, nrf_gpio_pin_sense_t sense_config); + +/** + * @brief Function for setting the direction for a GPIO pin. + * + * @param pin_number Specifies the pin number for which to set the direction. + * + * @param direction Specifies the direction. + */ +__STATIC_INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_t direction); + +/** + * @brief Function for setting a GPIO pin. + * + * Note that the pin must be configured as an output for this function to have any effect. + * + * @param pin_number Specifies the pin number to set. + */ +__STATIC_INLINE void nrf_gpio_pin_set(uint32_t pin_number); + +/** + * @brief Function for clearing a GPIO pin. + * + * Note that the pin must be configured as an output for this + * function to have any effect. + * + * @param pin_number Specifies the pin number to clear. + */ +__STATIC_INLINE void nrf_gpio_pin_clear(uint32_t pin_number); + +/** + * @brief Function for toggling a GPIO pin. + * + * Note that the pin must be configured as an output for this + * function to have any effect. + * + * @param pin_number Specifies the pin number to toggle. + */ +__STATIC_INLINE void nrf_gpio_pin_toggle(uint32_t pin_number); + +/** + * @brief Function for writing a value to a GPIO pin. + * + * Note that the pin must be configured as an output for this + * function to have any effect. + * + * @param pin_number Specifies the pin number to write. + * + * @param value Specifies the value to be written to the pin. + * @arg 0 Clears the pin. + * @arg >=1 Sets the pin. + */ +__STATIC_INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value); + +/** + * @brief Function for reading the input level of a GPIO pin. + * + * Note that the pin must have input connected for the value + * returned from this function to be valid. + * + * @param pin_number Specifies the pin number to read. + * + * @return 0 if the pin input level is low. Positive value if the pin is high. + */ +__STATIC_INLINE uint32_t nrf_gpio_pin_read(uint32_t pin_number); + +/** + * @brief Function for reading the output level of a GPIO pin. + * + * @param pin_number Specifies the pin number to read. + * + * @return 0 if the pin output level is low. Positive value if pin output is high. + */ +__STATIC_INLINE uint32_t nrf_gpio_pin_out_read(uint32_t pin_number); + +/** + * @brief Function for reading the sense configuration of a GPIO pin. + * + * @param pin_number Specifies the pin number to read. + * + * @retval Sense configuration. + */ +__STATIC_INLINE nrf_gpio_pin_sense_t nrf_gpio_pin_sense_get(uint32_t pin_number); + +/** + * @brief Function for setting output direction on selected pins on a given port. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param out_mask Mask specifying the pins to set as output. + * + */ +__STATIC_INLINE void nrf_gpio_port_dir_output_set(NRF_GPIO_Type * p_reg, uint32_t out_mask); + +/** + * @brief Function for setting input direction on selected pins on a given port. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param in_mask Mask specifying the pins to set as input. + * + */ +__STATIC_INLINE void nrf_gpio_port_dir_input_set(NRF_GPIO_Type * p_reg, uint32_t in_mask); + +/** + * @brief Function for writing the direction configuration of GPIO pins in a given port. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param dir_mask Mask specifying the direction of pins. Bit set means that the given pin is configured as output. + * + */ +__STATIC_INLINE void nrf_gpio_port_dir_write(NRF_GPIO_Type * p_reg, uint32_t dir_mask); + +/** + * @brief Function for reading the direction configuration of a GPIO port. + * + * @param p_reg Pointer to the peripheral registers structure. + * + * @retval Pin configuration of the current direction settings. Bit set means that the given pin is configured as output. + */ +__STATIC_INLINE uint32_t nrf_gpio_port_dir_read(NRF_GPIO_Type const * p_reg); + +/** + * @brief Function for reading the input signals of GPIO pins on a given port. + * + * @param p_reg Pointer to the peripheral registers structure. + * + * @retval Port input values. + */ +__STATIC_INLINE uint32_t nrf_gpio_port_in_read(NRF_GPIO_Type const * p_reg); + +/** + * @brief Function for reading the output signals of GPIO pins of a given port. + * + * @param p_reg Pointer to the peripheral registers structure. + * + * @retval Port output values. + */ +__STATIC_INLINE uint32_t nrf_gpio_port_out_read(NRF_GPIO_Type const * p_reg); + +/** + * @brief Function for writing the GPIO pins output on a given port. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param value Output port mask. + * + */ +__STATIC_INLINE void nrf_gpio_port_out_write(NRF_GPIO_Type * p_reg, uint32_t value); + +/** + * @brief Function for setting high level on selected GPIO pins of a given port. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param set_mask Mask with pins to set as logical high level. + * + */ +__STATIC_INLINE void nrf_gpio_port_out_set(NRF_GPIO_Type * p_reg, uint32_t set_mask); + +/** + * @brief Function for setting low level on selected GPIO pins of a given port. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param clr_mask Mask with pins to set as logical low level. + * + */ +__STATIC_INLINE void nrf_gpio_port_out_clear(NRF_GPIO_Type * p_reg, uint32_t clr_mask); + +/** + * @brief Function for reading pins state of multiple consecutive ports. + * + * @param start_port Index of the first port to read. + * @param length Number of ports to read. + * @param p_masks Pointer to output array where port states will be stored. + */ +__STATIC_INLINE void nrf_gpio_ports_read(uint32_t start_port, uint32_t length, uint32_t * p_masks); + +#if defined(GPIO_DETECTMODE_DETECTMODE_LDETECT) || defined(__NRF_DOXYGEN__) +/** + * @brief Function for reading latch state of multiple consecutive ports. + * + * @param start_port Index of the first port to read. + * @param length Number of ports to read. + * @param p_masks Pointer to output array where latch states will be stored. + */ +__STATIC_INLINE void nrf_gpio_latches_read(uint32_t start_port, uint32_t length, + uint32_t * p_masks); + +/** + * @brief Function for reading latch state of single pin. + * + * @param pin_number Pin number. + * @return 0 if latch is not set. Positive value otherwise. + * + */ +__STATIC_INLINE uint32_t nrf_gpio_pin_latch_get(uint32_t pin_number); + +/** + * @brief Function for clearing latch state of a single pin. + * + * @param pin_number Pin number. + * + */ +__STATIC_INLINE void nrf_gpio_pin_latch_clear(uint32_t pin_number); +#endif + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +/** + * @brief Function for extracting port and relative pin number from absolute pin number. + * + * @param[inout] Pointer to absolute pin number which is overriden by relative to port pin number. + * + * @return Pointer to port register set. + * + */ +__STATIC_INLINE NRF_GPIO_Type * nrf_gpio_pin_port_decode(uint32_t * p_pin) +{ + NRFX_ASSERT(*p_pin < NUMBER_OF_PINS); +#if (GPIO_COUNT == 1) + // The oldest definition case + return NRF_GPIO; +#else + if (*p_pin < P0_PIN_NUM) + { + return NRF_P0; + } + else + { + *p_pin = *p_pin & (P0_PIN_NUM - 1); + return NRF_P1; + } +#endif +} + + +__STATIC_INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end) +{ + /*lint -e{845} // A zero has been given as right argument to operator '|'" */ + for (; pin_range_start <= pin_range_end; pin_range_start++) + { + nrf_gpio_cfg_output(pin_range_start); + } +} + + +__STATIC_INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start, + uint32_t pin_range_end, + nrf_gpio_pin_pull_t pull_config) +{ + /*lint -e{845} // A zero has been given as right argument to operator '|'" */ + for (; pin_range_start <= pin_range_end; pin_range_start++) + { + nrf_gpio_cfg_input(pin_range_start, pull_config); + } +} + + +__STATIC_INLINE void nrf_gpio_cfg( + uint32_t pin_number, + nrf_gpio_pin_dir_t dir, + nrf_gpio_pin_input_t input, + nrf_gpio_pin_pull_t pull, + nrf_gpio_pin_drive_t drive, + nrf_gpio_pin_sense_t sense) +{ + NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); + + reg->PIN_CNF[pin_number] = ((uint32_t)dir << GPIO_PIN_CNF_DIR_Pos) + | ((uint32_t)input << GPIO_PIN_CNF_INPUT_Pos) + | ((uint32_t)pull << GPIO_PIN_CNF_PULL_Pos) + | ((uint32_t)drive << GPIO_PIN_CNF_DRIVE_Pos) + | ((uint32_t)sense << GPIO_PIN_CNF_SENSE_Pos); +} + + +__STATIC_INLINE void nrf_gpio_cfg_output(uint32_t pin_number) +{ + nrf_gpio_cfg( + pin_number, + NRF_GPIO_PIN_DIR_OUTPUT, + NRF_GPIO_PIN_INPUT_DISCONNECT, + NRF_GPIO_PIN_NOPULL, + NRF_GPIO_PIN_S0S1, + NRF_GPIO_PIN_NOSENSE); +} + + +__STATIC_INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config) +{ + nrf_gpio_cfg( + pin_number, + NRF_GPIO_PIN_DIR_INPUT, + NRF_GPIO_PIN_INPUT_CONNECT, + pull_config, + NRF_GPIO_PIN_S0S1, + NRF_GPIO_PIN_NOSENSE); +} + + +__STATIC_INLINE void nrf_gpio_cfg_default(uint32_t pin_number) +{ + nrf_gpio_cfg( + pin_number, + NRF_GPIO_PIN_DIR_INPUT, + NRF_GPIO_PIN_INPUT_DISCONNECT, + NRF_GPIO_PIN_NOPULL, + NRF_GPIO_PIN_S0S1, + NRF_GPIO_PIN_NOSENSE); +} + + +__STATIC_INLINE void nrf_gpio_cfg_watcher(uint32_t pin_number) +{ + NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); + /*lint -e{845} // A zero has been given as right argument to operator '|'" */ + uint32_t cnf = reg->PIN_CNF[pin_number] & ~GPIO_PIN_CNF_INPUT_Msk; + + reg->PIN_CNF[pin_number] = cnf | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos); +} + + +__STATIC_INLINE void nrf_gpio_input_disconnect(uint32_t pin_number) +{ + NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); + /*lint -e{845} // A zero has been given as right argument to operator '|'" */ + uint32_t cnf = reg->PIN_CNF[pin_number] & ~GPIO_PIN_CNF_INPUT_Msk; + + reg->PIN_CNF[pin_number] = cnf | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos); +} + + +__STATIC_INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number, + nrf_gpio_pin_pull_t pull_config, + nrf_gpio_pin_sense_t sense_config) +{ + nrf_gpio_cfg( + pin_number, + NRF_GPIO_PIN_DIR_INPUT, + NRF_GPIO_PIN_INPUT_CONNECT, + pull_config, + NRF_GPIO_PIN_S0S1, + sense_config); +} + + +__STATIC_INLINE void nrf_gpio_cfg_sense_set(uint32_t pin_number, nrf_gpio_pin_sense_t sense_config) +{ + NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); + + /*lint -e{845} // A zero has been given as right argument to operator '|'" */ + reg->PIN_CNF[pin_number] &= ~GPIO_PIN_CNF_SENSE_Msk; + reg->PIN_CNF[pin_number] |= (sense_config << GPIO_PIN_CNF_SENSE_Pos); +} + + +__STATIC_INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_t direction) +{ + if (direction == NRF_GPIO_PIN_DIR_INPUT) + { + nrf_gpio_cfg( + pin_number, + NRF_GPIO_PIN_DIR_INPUT, + NRF_GPIO_PIN_INPUT_CONNECT, + NRF_GPIO_PIN_NOPULL, + NRF_GPIO_PIN_S0S1, + NRF_GPIO_PIN_NOSENSE); + } + else + { + NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); + reg->DIRSET = (1UL << pin_number); + } +} + + +__STATIC_INLINE void nrf_gpio_pin_set(uint32_t pin_number) +{ + NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); + + nrf_gpio_port_out_set(reg, 1UL << pin_number); +} + + +__STATIC_INLINE void nrf_gpio_pin_clear(uint32_t pin_number) +{ + NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); + + nrf_gpio_port_out_clear(reg, 1UL << pin_number); +} + + +__STATIC_INLINE void nrf_gpio_pin_toggle(uint32_t pin_number) +{ + NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); + uint32_t pins_state = reg->OUT; + + reg->OUTSET = (~pins_state & (1UL << pin_number)); + reg->OUTCLR = (pins_state & (1UL << pin_number)); +} + + +__STATIC_INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value) +{ + if (value == 0) + { + nrf_gpio_pin_clear(pin_number); + } + else + { + nrf_gpio_pin_set(pin_number); + } +} + + +__STATIC_INLINE uint32_t nrf_gpio_pin_read(uint32_t pin_number) +{ + NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); + + return ((nrf_gpio_port_in_read(reg) >> pin_number) & 1UL); +} + + +__STATIC_INLINE uint32_t nrf_gpio_pin_out_read(uint32_t pin_number) +{ + NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); + + return ((nrf_gpio_port_out_read(reg) >> pin_number) & 1UL); +} + + +__STATIC_INLINE nrf_gpio_pin_sense_t nrf_gpio_pin_sense_get(uint32_t pin_number) +{ + NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); + + return (nrf_gpio_pin_sense_t)((reg->PIN_CNF[pin_number] & + GPIO_PIN_CNF_SENSE_Msk) >> GPIO_PIN_CNF_SENSE_Pos); +} + + +__STATIC_INLINE void nrf_gpio_port_dir_output_set(NRF_GPIO_Type * p_reg, uint32_t out_mask) +{ + p_reg->DIRSET = out_mask; +} + + +__STATIC_INLINE void nrf_gpio_port_dir_input_set(NRF_GPIO_Type * p_reg, uint32_t in_mask) +{ + p_reg->DIRCLR = in_mask; +} + + +__STATIC_INLINE void nrf_gpio_port_dir_write(NRF_GPIO_Type * p_reg, uint32_t value) +{ + p_reg->DIR = value; +} + + +__STATIC_INLINE uint32_t nrf_gpio_port_dir_read(NRF_GPIO_Type const * p_reg) +{ + return p_reg->DIR; +} + + +__STATIC_INLINE uint32_t nrf_gpio_port_in_read(NRF_GPIO_Type const * p_reg) +{ + return p_reg->IN; +} + + +__STATIC_INLINE uint32_t nrf_gpio_port_out_read(NRF_GPIO_Type const * p_reg) +{ + return p_reg->OUT; +} + + +__STATIC_INLINE void nrf_gpio_port_out_write(NRF_GPIO_Type * p_reg, uint32_t value) +{ + p_reg->OUT = value; +} + + +__STATIC_INLINE void nrf_gpio_port_out_set(NRF_GPIO_Type * p_reg, uint32_t set_mask) +{ + p_reg->OUTSET = set_mask; +} + + +__STATIC_INLINE void nrf_gpio_port_out_clear(NRF_GPIO_Type * p_reg, uint32_t clr_mask) +{ + p_reg->OUTCLR = clr_mask; +} + + +__STATIC_INLINE void nrf_gpio_ports_read(uint32_t start_port, uint32_t length, uint32_t * p_masks) +{ + NRF_GPIO_Type * gpio_regs[GPIO_COUNT] = GPIO_REG_LIST; + + NRFX_ASSERT(start_port + length <= GPIO_COUNT); + uint32_t i; + + for (i = start_port; i < (start_port + length); i++) + { + *p_masks = nrf_gpio_port_in_read(gpio_regs[i]); + p_masks++; + } +} + + +#ifdef GPIO_DETECTMODE_DETECTMODE_LDETECT +__STATIC_INLINE void nrf_gpio_latches_read(uint32_t start_port, uint32_t length, uint32_t * p_masks) +{ + NRF_GPIO_Type * gpio_regs[GPIO_COUNT] = GPIO_REG_LIST; + uint32_t i; + + for (i = start_port; i < (start_port + length); i++) + { + *p_masks = gpio_regs[i]->LATCH; + p_masks++; + } +} + + +__STATIC_INLINE uint32_t nrf_gpio_pin_latch_get(uint32_t pin_number) +{ + NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); + + return (reg->LATCH & (1 << pin_number)) ? 1 : 0; +} + + +__STATIC_INLINE void nrf_gpio_pin_latch_clear(uint32_t pin_number) +{ + NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); + + reg->LATCH = (1 << pin_number); +} + + +#endif +#endif // SUPPRESS_INLINE_IMPLEMENTATION + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_GPIO_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_gpiote.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_gpiote.h new file mode 100644 index 00000000000..91faf9fcc27 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_gpiote.h @@ -0,0 +1,428 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_GPIOTE_H__ +#define NRF_GPIOTE_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** +* @defgroup nrf_gpiote_hal GPIOTE HAL +* @{ +* @ingroup nrf_gpiote +* @brief Hardware access layer for managing the GPIOTE peripheral. +*/ + +#ifdef GPIOTE_CONFIG_PORT_Msk +#define GPIOTE_CONFIG_PORT_PIN_Msk (GPIOTE_CONFIG_PORT_Msk | GPIOTE_CONFIG_PSEL_Msk) +#else +#define GPIOTE_CONFIG_PORT_PIN_Msk GPIOTE_CONFIG_PSEL_Msk +#endif + + /** + * @enum nrf_gpiote_polarity_t + * @brief Polarity for the GPIOTE channel. + */ +typedef enum +{ + NRF_GPIOTE_POLARITY_LOTOHI = GPIOTE_CONFIG_POLARITY_LoToHi, ///< Low to high. + NRF_GPIOTE_POLARITY_HITOLO = GPIOTE_CONFIG_POLARITY_HiToLo, ///< High to low. + NRF_GPIOTE_POLARITY_TOGGLE = GPIOTE_CONFIG_POLARITY_Toggle ///< Toggle. +} nrf_gpiote_polarity_t; + + + /** + * @enum nrf_gpiote_outinit_t + * @brief Initial output value for the GPIOTE channel. + */ +typedef enum +{ + NRF_GPIOTE_INITIAL_VALUE_LOW = GPIOTE_CONFIG_OUTINIT_Low, ///< Low to high. + NRF_GPIOTE_INITIAL_VALUE_HIGH = GPIOTE_CONFIG_OUTINIT_High ///< High to low. +} nrf_gpiote_outinit_t; + +/** + * @brief Tasks. + */ +typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ +{ + NRF_GPIOTE_TASKS_OUT_0 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[0]), /**< Out task 0.*/ + NRF_GPIOTE_TASKS_OUT_1 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[1]), /**< Out task 1.*/ + NRF_GPIOTE_TASKS_OUT_2 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[2]), /**< Out task 2.*/ + NRF_GPIOTE_TASKS_OUT_3 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[3]), /**< Out task 3.*/ +#if (GPIOTE_CH_NUM > 4) || defined(__NRFX_DOXYGEN__) + NRF_GPIOTE_TASKS_OUT_4 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[4]), /**< Out task 4.*/ + NRF_GPIOTE_TASKS_OUT_5 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[5]), /**< Out task 5.*/ + NRF_GPIOTE_TASKS_OUT_6 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[6]), /**< Out task 6.*/ + NRF_GPIOTE_TASKS_OUT_7 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[7]), /**< Out task 7.*/ +#endif +#if defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__NRFX_DOXYGEN__) + NRF_GPIOTE_TASKS_SET_0 = offsetof(NRF_GPIOTE_Type, TASKS_SET[0]), /**< Set task 0.*/ + NRF_GPIOTE_TASKS_SET_1 = offsetof(NRF_GPIOTE_Type, TASKS_SET[1]), /**< Set task 1.*/ + NRF_GPIOTE_TASKS_SET_2 = offsetof(NRF_GPIOTE_Type, TASKS_SET[2]), /**< Set task 2.*/ + NRF_GPIOTE_TASKS_SET_3 = offsetof(NRF_GPIOTE_Type, TASKS_SET[3]), /**< Set task 3.*/ + NRF_GPIOTE_TASKS_SET_4 = offsetof(NRF_GPIOTE_Type, TASKS_SET[4]), /**< Set task 4.*/ + NRF_GPIOTE_TASKS_SET_5 = offsetof(NRF_GPIOTE_Type, TASKS_SET[5]), /**< Set task 5.*/ + NRF_GPIOTE_TASKS_SET_6 = offsetof(NRF_GPIOTE_Type, TASKS_SET[6]), /**< Set task 6.*/ + NRF_GPIOTE_TASKS_SET_7 = offsetof(NRF_GPIOTE_Type, TASKS_SET[7]), /**< Set task 7.*/ +#endif +#if defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__) + NRF_GPIOTE_TASKS_CLR_0 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[0]), /**< Clear task 0.*/ + NRF_GPIOTE_TASKS_CLR_1 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[1]), /**< Clear task 1.*/ + NRF_GPIOTE_TASKS_CLR_2 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[2]), /**< Clear task 2.*/ + NRF_GPIOTE_TASKS_CLR_3 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[3]), /**< Clear task 3.*/ + NRF_GPIOTE_TASKS_CLR_4 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[4]), /**< Clear task 4.*/ + NRF_GPIOTE_TASKS_CLR_5 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[5]), /**< Clear task 5.*/ + NRF_GPIOTE_TASKS_CLR_6 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[6]), /**< Clear task 6.*/ + NRF_GPIOTE_TASKS_CLR_7 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[7]), /**< Clear task 7.*/ +#endif + /*lint -restore*/ +} nrf_gpiote_tasks_t; + +/** + * @brief Events. + */ +typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ +{ + NRF_GPIOTE_EVENTS_IN_0 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[0]), /**< In event 0.*/ + NRF_GPIOTE_EVENTS_IN_1 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[1]), /**< In event 1.*/ + NRF_GPIOTE_EVENTS_IN_2 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[2]), /**< In event 2.*/ + NRF_GPIOTE_EVENTS_IN_3 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[3]), /**< In event 3.*/ +#if (GPIOTE_CH_NUM > 4) || defined(__NRFX_DOXYGEN__) + NRF_GPIOTE_EVENTS_IN_4 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[4]), /**< In event 4.*/ + NRF_GPIOTE_EVENTS_IN_5 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[5]), /**< In event 5.*/ + NRF_GPIOTE_EVENTS_IN_6 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[6]), /**< In event 6.*/ + NRF_GPIOTE_EVENTS_IN_7 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[7]), /**< In event 7.*/ +#endif + NRF_GPIOTE_EVENTS_PORT = offsetof(NRF_GPIOTE_Type, EVENTS_PORT), /**< Port event.*/ + /*lint -restore*/ +} nrf_gpiote_events_t; + +/** + * @enum nrf_gpiote_int_t + * @brief GPIOTE interrupts. + */ +typedef enum +{ + NRF_GPIOTE_INT_IN0_MASK = GPIOTE_INTENSET_IN0_Msk, /**< GPIOTE interrupt from IN0. */ + NRF_GPIOTE_INT_IN1_MASK = GPIOTE_INTENSET_IN1_Msk, /**< GPIOTE interrupt from IN1. */ + NRF_GPIOTE_INT_IN2_MASK = GPIOTE_INTENSET_IN2_Msk, /**< GPIOTE interrupt from IN2. */ + NRF_GPIOTE_INT_IN3_MASK = GPIOTE_INTENSET_IN3_Msk, /**< GPIOTE interrupt from IN3. */ +#if (GPIOTE_CH_NUM > 4) || defined(__NRFX_DOXYGEN__) + NRF_GPIOTE_INT_IN4_MASK = GPIOTE_INTENSET_IN4_Msk, /**< GPIOTE interrupt from IN4. */ + NRF_GPIOTE_INT_IN5_MASK = GPIOTE_INTENSET_IN5_Msk, /**< GPIOTE interrupt from IN5. */ + NRF_GPIOTE_INT_IN6_MASK = GPIOTE_INTENSET_IN6_Msk, /**< GPIOTE interrupt from IN6. */ + NRF_GPIOTE_INT_IN7_MASK = GPIOTE_INTENSET_IN7_Msk, /**< GPIOTE interrupt from IN7. */ +#endif + NRF_GPIOTE_INT_PORT_MASK = (int)GPIOTE_INTENSET_PORT_Msk, /**< GPIOTE interrupt from PORT event. */ +} nrf_gpiote_int_t; + +#define NRF_GPIOTE_INT_IN_MASK (NRF_GPIOTE_INT_IN0_MASK | NRF_GPIOTE_INT_IN1_MASK |\ + NRF_GPIOTE_INT_IN2_MASK | NRF_GPIOTE_INT_IN3_MASK) +#if (GPIOTE_CH_NUM > 4) +#undef NRF_GPIOTE_INT_IN_MASK +#define NRF_GPIOTE_INT_IN_MASK (NRF_GPIOTE_INT_IN0_MASK | NRF_GPIOTE_INT_IN1_MASK |\ + NRF_GPIOTE_INT_IN2_MASK | NRF_GPIOTE_INT_IN3_MASK |\ + NRF_GPIOTE_INT_IN4_MASK | NRF_GPIOTE_INT_IN5_MASK |\ + NRF_GPIOTE_INT_IN6_MASK | NRF_GPIOTE_INT_IN7_MASK) +#endif + +/** + * @brief Function for activating a specific GPIOTE task. + * + * @param[in] task Task. + */ +__STATIC_INLINE void nrf_gpiote_task_set(nrf_gpiote_tasks_t task); + +/** + * @brief Function for getting the address of a specific GPIOTE task. + * + * @param[in] task Task. + * + * @returns Address. + */ +__STATIC_INLINE uint32_t nrf_gpiote_task_addr_get(nrf_gpiote_tasks_t task); + +/** + * @brief Function for getting the state of a specific GPIOTE event. + * + * @param[in] event Event. + */ +__STATIC_INLINE bool nrf_gpiote_event_is_set(nrf_gpiote_events_t event); + +/** + * @brief Function for clearing a specific GPIOTE event. + * + * @param[in] event Event. + */ +__STATIC_INLINE void nrf_gpiote_event_clear(nrf_gpiote_events_t event); + +/** + * @brief Function for getting the address of a specific GPIOTE event. + * + * @param[in] event Event. + * + * @return Address + */ +__STATIC_INLINE uint32_t nrf_gpiote_event_addr_get(nrf_gpiote_events_t event); + +/**@brief Function for enabling interrupts. + * + * @param[in] mask Interrupt mask to be enabled. + */ +__STATIC_INLINE void nrf_gpiote_int_enable(uint32_t mask); + +/**@brief Function for disabling interrupts. + * + * @param[in] mask Interrupt mask to be disabled. + */ +__STATIC_INLINE void nrf_gpiote_int_disable(uint32_t mask); + +/**@brief Function for checking if interrupts are enabled. + * + * @param[in] mask Mask of interrupt flags to check. + * + * @return Mask with enabled interrupts. + */ +__STATIC_INLINE uint32_t nrf_gpiote_int_is_enabled(uint32_t mask); + +/**@brief Function for enabling a GPIOTE event. + * + * @param[in] idx Task-Event index. + */ +__STATIC_INLINE void nrf_gpiote_event_enable(uint32_t idx); + +/**@brief Function for disabling a GPIOTE event. + * + * @param[in] idx Task-Event index. + */ +__STATIC_INLINE void nrf_gpiote_event_disable(uint32_t idx); + +/**@brief Function for configuring a GPIOTE event. + * + * @param[in] idx Task-Event index. + * @param[in] pin Pin associated with event. + * @param[in] polarity Transition that should generate an event. + */ +__STATIC_INLINE void nrf_gpiote_event_configure(uint32_t idx, uint32_t pin, + nrf_gpiote_polarity_t polarity); + +/**@brief Function for getting the pin associated with a GPIOTE event. + * + * @param[in] idx Task-Event index. + * + * @return Pin number. + */ +__STATIC_INLINE uint32_t nrf_gpiote_event_pin_get(uint32_t idx); + +/**@brief Function for getting the polarity associated with a GPIOTE event. + * + * @param[in] idx Task-Event index. + * + * @return Polarity. + */ +__STATIC_INLINE nrf_gpiote_polarity_t nrf_gpiote_event_polarity_get(uint32_t idx); + +/**@brief Function for enabling a GPIOTE task. + * + * @param[in] idx Task-Event index. + */ +__STATIC_INLINE void nrf_gpiote_task_enable(uint32_t idx); + +/**@brief Function for disabling a GPIOTE task. + * + * @param[in] idx Task-Event index. + */ +__STATIC_INLINE void nrf_gpiote_task_disable(uint32_t idx); + +/**@brief Function for configuring a GPIOTE task. + * @note Function is not configuring mode field so task is disabled after this function is called. + * + * @param[in] idx Task-Event index. + * @param[in] pin Pin associated with event. + * @param[in] polarity Transition that should generate an event. + * @param[in] init_val Initial value of the pin. + */ +__STATIC_INLINE void nrf_gpiote_task_configure(uint32_t idx, uint32_t pin, + nrf_gpiote_polarity_t polarity, + nrf_gpiote_outinit_t init_val); + +/**@brief Function for forcing a specific state on the pin connected to GPIOTE. + * + * @param[in] idx Task-Event index. + * @param[in] init_val Pin state. + */ +__STATIC_INLINE void nrf_gpiote_task_force(uint32_t idx, nrf_gpiote_outinit_t init_val); + +/**@brief Function for resetting a GPIOTE task event configuration to the default state. + * + * @param[in] idx Task-Event index. + */ +__STATIC_INLINE void nrf_gpiote_te_default(uint32_t idx); + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION +__STATIC_INLINE void nrf_gpiote_task_set(nrf_gpiote_tasks_t task) +{ + *(__IO uint32_t *)((uint32_t)NRF_GPIOTE + task) = 0x1UL; +} + +__STATIC_INLINE uint32_t nrf_gpiote_task_addr_get(nrf_gpiote_tasks_t task) +{ + return ((uint32_t)NRF_GPIOTE + task); +} + +__STATIC_INLINE bool nrf_gpiote_event_is_set(nrf_gpiote_events_t event) +{ + return (*(uint32_t *)nrf_gpiote_event_addr_get(event) == 0x1UL) ? true : false; +} + +__STATIC_INLINE void nrf_gpiote_event_clear(nrf_gpiote_events_t event) +{ + *(uint32_t *)nrf_gpiote_event_addr_get(event) = 0; +#if __CORTEX_M == 0x04 + volatile uint32_t dummy = *((volatile uint32_t *)nrf_gpiote_event_addr_get(event)); + (void)dummy; +#endif +} + +__STATIC_INLINE uint32_t nrf_gpiote_event_addr_get(nrf_gpiote_events_t event) +{ + return ((uint32_t)NRF_GPIOTE + event); +} + +__STATIC_INLINE void nrf_gpiote_int_enable(uint32_t mask) +{ + NRF_GPIOTE->INTENSET = mask; +} + +__STATIC_INLINE void nrf_gpiote_int_disable(uint32_t mask) +{ + NRF_GPIOTE->INTENCLR = mask; +} + +__STATIC_INLINE uint32_t nrf_gpiote_int_is_enabled(uint32_t mask) +{ + return (NRF_GPIOTE->INTENSET & mask); +} + +__STATIC_INLINE void nrf_gpiote_event_enable(uint32_t idx) +{ + NRF_GPIOTE->CONFIG[idx] |= GPIOTE_CONFIG_MODE_Event; +} + +__STATIC_INLINE void nrf_gpiote_event_disable(uint32_t idx) +{ + NRF_GPIOTE->CONFIG[idx] &= ~GPIOTE_CONFIG_MODE_Event; +} + +__STATIC_INLINE void nrf_gpiote_event_configure(uint32_t idx, uint32_t pin, nrf_gpiote_polarity_t polarity) +{ + NRF_GPIOTE->CONFIG[idx] &= ~(GPIOTE_CONFIG_PORT_PIN_Msk | GPIOTE_CONFIG_POLARITY_Msk); + NRF_GPIOTE->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) | + ((polarity << GPIOTE_CONFIG_POLARITY_Pos) & GPIOTE_CONFIG_POLARITY_Msk); +} + +__STATIC_INLINE uint32_t nrf_gpiote_event_pin_get(uint32_t idx) +{ + return ((NRF_GPIOTE->CONFIG[idx] & GPIOTE_CONFIG_PORT_PIN_Msk) >> GPIOTE_CONFIG_PSEL_Pos); +} + +__STATIC_INLINE nrf_gpiote_polarity_t nrf_gpiote_event_polarity_get(uint32_t idx) +{ + return (nrf_gpiote_polarity_t)((NRF_GPIOTE->CONFIG[idx] & GPIOTE_CONFIG_POLARITY_Msk) >> GPIOTE_CONFIG_POLARITY_Pos); +} + +__STATIC_INLINE void nrf_gpiote_task_enable(uint32_t idx) +{ + uint32_t final_config = NRF_GPIOTE->CONFIG[idx] | GPIOTE_CONFIG_MODE_Task; +#ifdef NRF51 + /* Workaround for the OUTINIT PAN. When nrf_gpiote_task_config() is called a glitch happens + on the GPIO if the GPIO in question is already assigned to GPIOTE and the pin is in the + correct state in GPIOTE but not in the OUT register. */ + /* Configure channel to not existing, not connected to the pin, and configure as a tasks that will set it to proper level */ + NRF_GPIOTE->CONFIG[idx] = final_config | (((31) << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk); + __NOP(); + __NOP(); + __NOP(); +#endif + NRF_GPIOTE->CONFIG[idx] = final_config; +} + +__STATIC_INLINE void nrf_gpiote_task_disable(uint32_t idx) +{ + NRF_GPIOTE->CONFIG[idx] &= ~GPIOTE_CONFIG_MODE_Task; +} + +__STATIC_INLINE void nrf_gpiote_task_configure(uint32_t idx, uint32_t pin, + nrf_gpiote_polarity_t polarity, + nrf_gpiote_outinit_t init_val) +{ + NRF_GPIOTE->CONFIG[idx] &= ~(GPIOTE_CONFIG_PORT_PIN_Msk | + GPIOTE_CONFIG_POLARITY_Msk | + GPIOTE_CONFIG_OUTINIT_Msk); + + NRF_GPIOTE->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) | + ((polarity << GPIOTE_CONFIG_POLARITY_Pos) & GPIOTE_CONFIG_POLARITY_Msk) | + ((init_val << GPIOTE_CONFIG_OUTINIT_Pos) & GPIOTE_CONFIG_OUTINIT_Msk); +} + +__STATIC_INLINE void nrf_gpiote_task_force(uint32_t idx, nrf_gpiote_outinit_t init_val) +{ + NRF_GPIOTE->CONFIG[idx] = (NRF_GPIOTE->CONFIG[idx] & ~GPIOTE_CONFIG_OUTINIT_Msk) + | ((init_val << GPIOTE_CONFIG_OUTINIT_Pos) & GPIOTE_CONFIG_OUTINIT_Msk); +} + +__STATIC_INLINE void nrf_gpiote_te_default(uint32_t idx) +{ + NRF_GPIOTE->CONFIG[idx] = 0; +} +#endif //SUPPRESS_INLINE_IMPLEMENTATION + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_i2s.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_i2s.h new file mode 100644 index 00000000000..ab698e59212 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_i2s.h @@ -0,0 +1,557 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_I2S_H__ +#define NRF_I2S_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_i2s_hal I2S HAL + * @{ + * @ingroup nrf_i2s + * @brief Hardware access layer for managing the Inter-IC Sound (I2S) peripheral. + */ + +/** + * @brief This value can be provided as a parameter for the @ref nrf_i2s_pins_set + * function call to specify that a given I2S signal (SDOUT, SDIN, or MCK) + * shall not be connected to a physical pin. + */ +#define NRF_I2S_PIN_NOT_CONNECTED 0xFFFFFFFF + + +/** + * @brief I2S tasks. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_I2S_TASK_START = offsetof(NRF_I2S_Type, TASKS_START), ///< Starts continuous I2S transfer. Also starts the MCK generator if this is enabled. + NRF_I2S_TASK_STOP = offsetof(NRF_I2S_Type, TASKS_STOP) ///< Stops I2S transfer. Also stops the MCK generator. + /*lint -restore*/ +} nrf_i2s_task_t; + +/** + * @brief I2S events. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_I2S_EVENT_RXPTRUPD = offsetof(NRF_I2S_Type, EVENTS_RXPTRUPD), ///< The RXD.PTR register has been copied to internal double-buffers. + NRF_I2S_EVENT_TXPTRUPD = offsetof(NRF_I2S_Type, EVENTS_TXPTRUPD), ///< The TXD.PTR register has been copied to internal double-buffers. + NRF_I2S_EVENT_STOPPED = offsetof(NRF_I2S_Type, EVENTS_STOPPED) ///< I2S transfer stopped. + /*lint -restore*/ +} nrf_i2s_event_t; + +/** + * @brief I2S interrupts. + */ +typedef enum +{ + NRF_I2S_INT_RXPTRUPD_MASK = I2S_INTENSET_RXPTRUPD_Msk, ///< Interrupt on RXPTRUPD event. + NRF_I2S_INT_TXPTRUPD_MASK = I2S_INTENSET_TXPTRUPD_Msk, ///< Interrupt on TXPTRUPD event. + NRF_I2S_INT_STOPPED_MASK = I2S_INTENSET_STOPPED_Msk ///< Interrupt on STOPPED event. +} nrf_i2s_int_mask_t; + +/** + * @brief I2S modes of operation. + */ +typedef enum +{ + NRF_I2S_MODE_MASTER = I2S_CONFIG_MODE_MODE_Master, ///< Master mode. + NRF_I2S_MODE_SLAVE = I2S_CONFIG_MODE_MODE_Slave ///< Slave mode. +} nrf_i2s_mode_t; + +/** + * @brief I2S master clock generator settings. + */ +typedef enum +{ + NRF_I2S_MCK_DISABLED = 0, ///< MCK disabled. + // [conversion to 'int' needed to prevent compilers from complaining + // that the provided value (0x80000000UL) is out of range of "int"] + NRF_I2S_MCK_32MDIV2 = (int)I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV2, ///< 32 MHz / 2 = 16.0 MHz. + NRF_I2S_MCK_32MDIV3 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV3, ///< 32 MHz / 3 = 10.6666667 MHz. + NRF_I2S_MCK_32MDIV4 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV4, ///< 32 MHz / 4 = 8.0 MHz. + NRF_I2S_MCK_32MDIV5 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV5, ///< 32 MHz / 5 = 6.4 MHz. + NRF_I2S_MCK_32MDIV6 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV6, ///< 32 MHz / 6 = 5.3333333 MHz. + NRF_I2S_MCK_32MDIV8 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV8, ///< 32 MHz / 8 = 4.0 MHz. + NRF_I2S_MCK_32MDIV10 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV10, ///< 32 MHz / 10 = 3.2 MHz. + NRF_I2S_MCK_32MDIV11 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV11, ///< 32 MHz / 11 = 2.9090909 MHz. + NRF_I2S_MCK_32MDIV15 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV15, ///< 32 MHz / 15 = 2.1333333 MHz. + NRF_I2S_MCK_32MDIV16 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV16, ///< 32 MHz / 16 = 2.0 MHz. + NRF_I2S_MCK_32MDIV21 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV21, ///< 32 MHz / 21 = 1.5238095 MHz. + NRF_I2S_MCK_32MDIV23 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV23, ///< 32 MHz / 23 = 1.3913043 MHz. + NRF_I2S_MCK_32MDIV31 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV31, ///< 32 MHz / 31 = 1.0322581 MHz. + NRF_I2S_MCK_32MDIV42 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV42, ///< 32 MHz / 42 = 0.7619048 MHz. + NRF_I2S_MCK_32MDIV63 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV63, ///< 32 MHz / 63 = 0.5079365 MHz. + NRF_I2S_MCK_32MDIV125 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV125 ///< 32 MHz / 125 = 0.256 MHz. +} nrf_i2s_mck_t; + +/** + * @brief I2S MCK/LRCK ratios. + */ +typedef enum +{ + NRF_I2S_RATIO_32X = I2S_CONFIG_RATIO_RATIO_32X, ///< LRCK = MCK / 32. + NRF_I2S_RATIO_48X = I2S_CONFIG_RATIO_RATIO_48X, ///< LRCK = MCK / 48. + NRF_I2S_RATIO_64X = I2S_CONFIG_RATIO_RATIO_64X, ///< LRCK = MCK / 64. + NRF_I2S_RATIO_96X = I2S_CONFIG_RATIO_RATIO_96X, ///< LRCK = MCK / 96. + NRF_I2S_RATIO_128X = I2S_CONFIG_RATIO_RATIO_128X, ///< LRCK = MCK / 128. + NRF_I2S_RATIO_192X = I2S_CONFIG_RATIO_RATIO_192X, ///< LRCK = MCK / 192. + NRF_I2S_RATIO_256X = I2S_CONFIG_RATIO_RATIO_256X, ///< LRCK = MCK / 256. + NRF_I2S_RATIO_384X = I2S_CONFIG_RATIO_RATIO_384X, ///< LRCK = MCK / 384. + NRF_I2S_RATIO_512X = I2S_CONFIG_RATIO_RATIO_512X ///< LRCK = MCK / 512. +} nrf_i2s_ratio_t; + +/** + * @brief I2S sample widths. + */ +typedef enum +{ + NRF_I2S_SWIDTH_8BIT = I2S_CONFIG_SWIDTH_SWIDTH_8Bit, ///< 8 bit. + NRF_I2S_SWIDTH_16BIT = I2S_CONFIG_SWIDTH_SWIDTH_16Bit, ///< 16 bit. + NRF_I2S_SWIDTH_24BIT = I2S_CONFIG_SWIDTH_SWIDTH_24Bit ///< 24 bit. +} nrf_i2s_swidth_t; + +/** + * @brief I2S alignments of sample within a frame. + */ +typedef enum +{ + NRF_I2S_ALIGN_LEFT = I2S_CONFIG_ALIGN_ALIGN_Left, ///< Left-aligned. + NRF_I2S_ALIGN_RIGHT = I2S_CONFIG_ALIGN_ALIGN_Right ///< Right-aligned. +} nrf_i2s_align_t; + +/** + * @brief I2S frame formats. + */ +typedef enum +{ + NRF_I2S_FORMAT_I2S = I2S_CONFIG_FORMAT_FORMAT_I2S, ///< Original I2S format. + NRF_I2S_FORMAT_ALIGNED = I2S_CONFIG_FORMAT_FORMAT_Aligned ///< Alternate (left- or right-aligned) format. +} nrf_i2s_format_t; + +/** + * @brief I2S enabled channels. + */ +typedef enum +{ + NRF_I2S_CHANNELS_STEREO = I2S_CONFIG_CHANNELS_CHANNELS_Stereo, ///< Stereo. + NRF_I2S_CHANNELS_LEFT = I2S_CONFIG_CHANNELS_CHANNELS_Left, ///< Left only. + NRF_I2S_CHANNELS_RIGHT = I2S_CONFIG_CHANNELS_CHANNELS_Right ///< Right only. +} nrf_i2s_channels_t; + + +/** + * @brief Function for activating a specific I2S task. + * + * @param[in] p_i2s I2S instance. + * @param[in] task Task to activate. + */ +__STATIC_INLINE void nrf_i2s_task_trigger(NRF_I2S_Type * p_i2s, + nrf_i2s_task_t task); + +/** + * @brief Function for getting the address of a specific I2S task register. + * + * @param[in] p_i2s I2S instance. + * @param[in] task Requested task. + * + * @return Address of the specified task register. + */ +__STATIC_INLINE uint32_t nrf_i2s_task_address_get(NRF_I2S_Type const * p_i2s, + nrf_i2s_task_t task); + +/** + * @brief Function for clearing a specific I2S event. + * + * @param[in] p_i2s I2S instance. + * @param[in] event Event to clear. + */ +__STATIC_INLINE void nrf_i2s_event_clear(NRF_I2S_Type * p_i2s, + nrf_i2s_event_t event); + +/** + * @brief Function for checking the state of a specific I2S event. + * + * @param[in] p_i2s I2S instance. + * @param[in] event Event to check. + * + * @retval true If the event is set. + * @retval false If the event is not set. + */ +__STATIC_INLINE bool nrf_i2s_event_check(NRF_I2S_Type const * p_i2s, + nrf_i2s_event_t event); + +/** + * @brief Function for getting the address of a specific I2S event register. + * + * @param[in] p_i2s I2S instance. + * @param[in] event Requested event. + * + * @return Address of the specified event register. + */ +__STATIC_INLINE uint32_t nrf_i2s_event_address_get(NRF_I2S_Type const * p_i2s, + nrf_i2s_event_t event); + +/** + * @brief Function for enabling specified interrupts. + * + * @param[in] p_i2s I2S instance. + * @param[in] mask Interrupts to enable. + */ +__STATIC_INLINE void nrf_i2s_int_enable(NRF_I2S_Type * p_i2s, uint32_t mask); + +/** + * @brief Function for disabling specified interrupts. + * + * @param[in] p_i2s I2S instance. + * @param[in] mask Interrupts to disable. + */ +__STATIC_INLINE void nrf_i2s_int_disable(NRF_I2S_Type * p_i2s, uint32_t mask); + +/** + * @brief Function for retrieving the state of a given interrupt. + * + * @param[in] p_i2s I2S instance. + * @param[in] i2s_int Interrupt to check. + * + * @retval true If the interrupt is enabled. + * @retval false If the interrupt is not enabled. + */ +__STATIC_INLINE bool nrf_i2s_int_enable_check(NRF_I2S_Type const * p_i2s, + nrf_i2s_int_mask_t i2s_int); + +/** + * @brief Function for enabling the I2S peripheral. + * + * @param[in] p_i2s I2S instance. + */ +__STATIC_INLINE void nrf_i2s_enable(NRF_I2S_Type * p_i2s); + +/** + * @brief Function for disabling the I2S peripheral. + * + * @param[in] p_i2s I2S instance. + */ +__STATIC_INLINE void nrf_i2s_disable(NRF_I2S_Type * p_i2s); + +/** + * @brief Function for configuring I2S pins. + * + * Usage of the SDOUT, SDIN, and MCK signals is optional. + * If a given signal is not needed, pass the @ref NRF_I2S_PIN_NOT_CONNECTED + * value instead of its pin number. + * + * @param[in] p_i2s I2S instance. + * @param[in] sck_pin SCK pin number. + * @param[in] lrck_pin LRCK pin number. + * @param[in] mck_pin MCK pin number. + * @param[in] sdout_pin SDOUT pin number. + * @param[in] sdin_pin SDIN pin number. + */ +__STATIC_INLINE void nrf_i2s_pins_set(NRF_I2S_Type * p_i2s, + uint32_t sck_pin, + uint32_t lrck_pin, + uint32_t mck_pin, + uint32_t sdout_pin, + uint32_t sdin_pin); + +/** + * @brief Function for setting the I2S peripheral configuration. + * + * @param[in] p_i2s I2S instance. + * @param[in] mode Mode of operation (master or slave). + * @param[in] format I2S frame format. + * @param[in] alignment Alignment of sample within a frame. + * @param[in] sample_width Sample width. + * @param[in] channels Enabled channels. + * @param[in] mck_setup Master clock generator setup. + * @param[in] ratio MCK/LRCK ratio. + * + * @retval true If the configuration has been set successfully. + * @retval false If the requested configuration is not allowed. + */ +__STATIC_INLINE bool nrf_i2s_configure(NRF_I2S_Type * p_i2s, + nrf_i2s_mode_t mode, + nrf_i2s_format_t format, + nrf_i2s_align_t alignment, + nrf_i2s_swidth_t sample_width, + nrf_i2s_channels_t channels, + nrf_i2s_mck_t mck_setup, + nrf_i2s_ratio_t ratio); + +/** + * @brief Function for setting up the I2S transfer. + * + * This function sets up the RX and TX buffers and enables reception and/or + * transmission accordingly. If the transfer in a given direction is not + * required, pass NULL instead of the pointer to the corresponding buffer. + * + * @param[in] p_i2s I2S instance. + * @param[in] size Size of the buffers (in 32-bit words). + * @param[in] p_rx_buffer Pointer to the receive buffer. + * Pass NULL to disable reception. + * @param[in] p_tx_buffer Pointer to the transmit buffer. + * Pass NULL to disable transmission. + */ +__STATIC_INLINE void nrf_i2s_transfer_set(NRF_I2S_Type * p_i2s, + uint16_t size, + uint32_t * p_rx_buffer, + uint32_t const * p_tx_buffer); + +/** + * @brief Function for setting the pointer to the receive buffer. + * + * @note The size of the buffer can be set only by calling + * @ref nrf_i2s_transfer_set. + * + * @param[in] p_i2s I2S instance. + * @param[in] p_buffer Pointer to the receive buffer. + */ +__STATIC_INLINE void nrf_i2s_rx_buffer_set(NRF_I2S_Type * p_i2s, + uint32_t * p_buffer); + +/** + * @brief Function for getting the pointer to the receive buffer. + * + * @param[in] p_i2s I2S instance. + * + * @return Pointer to the receive buffer. + */ +__STATIC_INLINE uint32_t * nrf_i2s_rx_buffer_get(NRF_I2S_Type const * p_i2s); + +/** + * @brief Function for setting the pointer to the transmit buffer. + * + * @note The size of the buffer can be set only by calling + * @ref nrf_i2s_transfer_set. + * + * @param[in] p_i2s I2S instance. + * @param[in] p_buffer Pointer to the transmit buffer. + */ +__STATIC_INLINE void nrf_i2s_tx_buffer_set(NRF_I2S_Type * p_i2s, + uint32_t const * p_buffer); + +/** + * @brief Function for getting the pointer to the transmit buffer. + * + * @param[in] p_i2s I2S instance. + * + * @return Pointer to the transmit buffer. + */ +__STATIC_INLINE uint32_t * nrf_i2s_tx_buffer_get(NRF_I2S_Type const * p_i2s); + + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE void nrf_i2s_task_trigger(NRF_I2S_Type * p_i2s, + nrf_i2s_task_t task) +{ + *((volatile uint32_t *)((uint8_t *)p_i2s + (uint32_t)task)) = 0x1UL; +} + +__STATIC_INLINE uint32_t nrf_i2s_task_address_get(NRF_I2S_Type const * p_i2s, + nrf_i2s_task_t task) +{ + return ((uint32_t)p_i2s + (uint32_t)task); +} + +__STATIC_INLINE void nrf_i2s_event_clear(NRF_I2S_Type * p_i2s, + nrf_i2s_event_t event) +{ + *((volatile uint32_t *)((uint8_t *)p_i2s + (uint32_t)event)) = 0x0UL; +#if __CORTEX_M == 0x04 + volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_i2s + (uint32_t)event)); + (void)dummy; +#endif +} + +__STATIC_INLINE bool nrf_i2s_event_check(NRF_I2S_Type const * p_i2s, + nrf_i2s_event_t event) +{ + return (bool)*(volatile uint32_t *)((uint8_t *)p_i2s + (uint32_t)event); +} + +__STATIC_INLINE uint32_t nrf_i2s_event_address_get(NRF_I2S_Type const * p_i2s, + nrf_i2s_event_t event) +{ + return ((uint32_t)p_i2s + (uint32_t)event); +} + +__STATIC_INLINE void nrf_i2s_int_enable(NRF_I2S_Type * p_i2s, uint32_t mask) +{ + p_i2s->INTENSET = mask; +} + +__STATIC_INLINE void nrf_i2s_int_disable(NRF_I2S_Type * p_i2s, uint32_t mask) +{ + p_i2s->INTENCLR = mask; +} + +__STATIC_INLINE bool nrf_i2s_int_enable_check(NRF_I2S_Type const * p_i2s, + nrf_i2s_int_mask_t i2s_int) +{ + return (bool)(p_i2s->INTENSET & i2s_int); +} + +__STATIC_INLINE void nrf_i2s_enable(NRF_I2S_Type * p_i2s) +{ + p_i2s->ENABLE = (I2S_ENABLE_ENABLE_Enabled << I2S_ENABLE_ENABLE_Pos); +} + +__STATIC_INLINE void nrf_i2s_disable(NRF_I2S_Type * p_i2s) +{ + p_i2s->ENABLE = (I2S_ENABLE_ENABLE_Disabled << I2S_ENABLE_ENABLE_Pos); +} + +__STATIC_INLINE void nrf_i2s_pins_set(NRF_I2S_Type * p_i2s, + uint32_t sck_pin, + uint32_t lrck_pin, + uint32_t mck_pin, + uint32_t sdout_pin, + uint32_t sdin_pin) +{ + p_i2s->PSEL.SCK = sck_pin; + p_i2s->PSEL.LRCK = lrck_pin; + p_i2s->PSEL.MCK = mck_pin; + p_i2s->PSEL.SDOUT = sdout_pin; + p_i2s->PSEL.SDIN = sdin_pin; +} + +__STATIC_INLINE bool nrf_i2s_configure(NRF_I2S_Type * p_i2s, + nrf_i2s_mode_t mode, + nrf_i2s_format_t format, + nrf_i2s_align_t alignment, + nrf_i2s_swidth_t sample_width, + nrf_i2s_channels_t channels, + nrf_i2s_mck_t mck_setup, + nrf_i2s_ratio_t ratio) +{ + if (mode == NRF_I2S_MODE_MASTER) + { + // The MCK/LRCK ratio shall be a multiple of 2 * sample width. + if (((sample_width == NRF_I2S_SWIDTH_16BIT) && + (ratio == NRF_I2S_RATIO_48X)) + || + ((sample_width == NRF_I2S_SWIDTH_24BIT) && + ((ratio == NRF_I2S_RATIO_32X) || + (ratio == NRF_I2S_RATIO_64X) || + (ratio == NRF_I2S_RATIO_128X) || + (ratio == NRF_I2S_RATIO_256X) || + (ratio == NRF_I2S_RATIO_512X)))) + { + return false; + } + } + + p_i2s->CONFIG.MODE = mode; + p_i2s->CONFIG.FORMAT = format; + p_i2s->CONFIG.ALIGN = alignment; + p_i2s->CONFIG.SWIDTH = sample_width; + p_i2s->CONFIG.CHANNELS = channels; + p_i2s->CONFIG.RATIO = ratio; + + if (mck_setup == NRF_I2S_MCK_DISABLED) + { + p_i2s->CONFIG.MCKEN = + (I2S_CONFIG_MCKEN_MCKEN_Disabled << I2S_CONFIG_MCKEN_MCKEN_Pos); + } + else + { + p_i2s->CONFIG.MCKFREQ = mck_setup; + p_i2s->CONFIG.MCKEN = + (I2S_CONFIG_MCKEN_MCKEN_Enabled << I2S_CONFIG_MCKEN_MCKEN_Pos); + } + + return true; +} + +__STATIC_INLINE void nrf_i2s_transfer_set(NRF_I2S_Type * p_i2s, + uint16_t size, + uint32_t * p_buffer_rx, + uint32_t const * p_buffer_tx) +{ + p_i2s->RXTXD.MAXCNT = size; + + nrf_i2s_rx_buffer_set(p_i2s, p_buffer_rx); + p_i2s->CONFIG.RXEN = (p_buffer_rx != NULL) ? 1 : 0; + + nrf_i2s_tx_buffer_set(p_i2s, p_buffer_tx); + p_i2s->CONFIG.TXEN = (p_buffer_tx != NULL) ? 1 : 0; +} + +__STATIC_INLINE void nrf_i2s_rx_buffer_set(NRF_I2S_Type * p_i2s, + uint32_t * p_buffer) +{ + p_i2s->RXD.PTR = (uint32_t)p_buffer; +} + +__STATIC_INLINE uint32_t * nrf_i2s_rx_buffer_get(NRF_I2S_Type const * p_i2s) +{ + return (uint32_t *)(p_i2s->RXD.PTR); +} + +__STATIC_INLINE void nrf_i2s_tx_buffer_set(NRF_I2S_Type * p_i2s, + uint32_t const * p_buffer) +{ + p_i2s->TXD.PTR = (uint32_t)p_buffer; +} + +__STATIC_INLINE uint32_t * nrf_i2s_tx_buffer_get(NRF_I2S_Type const * p_i2s) +{ + return (uint32_t *)(p_i2s->TXD.PTR); +} + +#endif // SUPPRESS_INLINE_IMPLEMENTATION + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_I2S_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_lpcomp.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_lpcomp.h new file mode 100644 index 00000000000..c10a909a027 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_lpcomp.h @@ -0,0 +1,412 @@ +/** + * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_LPCOMP_H_ +#define NRF_LPCOMP_H_ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_lpcomp_hal LPCOMP HAL + * @{ + * @ingroup nrf_lpcomp + * @brief Hardware access layer for managing the Low Power Comparator (LPCOMP) peripheral. + */ + +/** + * @enum nrf_lpcomp_ref_t + * @brief LPCOMP reference selection. + */ +typedef enum +{ +#if (LPCOMP_REFSEL_RESOLUTION == 8) || defined(__NRFX_DOXYGEN__) + NRF_LPCOMP_REF_SUPPLY_1_8 = LPCOMP_REFSEL_REFSEL_SupplyOneEighthPrescaling, /**< Use supply with a 1/8 prescaler as reference. */ + NRF_LPCOMP_REF_SUPPLY_2_8 = LPCOMP_REFSEL_REFSEL_SupplyTwoEighthsPrescaling, /**< Use supply with a 2/8 prescaler as reference. */ + NRF_LPCOMP_REF_SUPPLY_3_8 = LPCOMP_REFSEL_REFSEL_SupplyThreeEighthsPrescaling, /**< Use supply with a 3/8 prescaler as reference. */ + NRF_LPCOMP_REF_SUPPLY_4_8 = LPCOMP_REFSEL_REFSEL_SupplyFourEighthsPrescaling, /**< Use supply with a 4/8 prescaler as reference. */ + NRF_LPCOMP_REF_SUPPLY_5_8 = LPCOMP_REFSEL_REFSEL_SupplyFiveEighthsPrescaling, /**< Use supply with a 5/8 prescaler as reference. */ + NRF_LPCOMP_REF_SUPPLY_6_8 = LPCOMP_REFSEL_REFSEL_SupplySixEighthsPrescaling, /**< Use supply with a 6/8 prescaler as reference. */ + NRF_LPCOMP_REF_SUPPLY_7_8 = LPCOMP_REFSEL_REFSEL_SupplySevenEighthsPrescaling, /**< Use supply with a 7/8 prescaler as reference. */ +#elif (LPCOMP_REFSEL_RESOLUTION == 16) || defined(__NRFX_DOXYGEN__) + NRF_LPCOMP_REF_SUPPLY_1_8 = LPCOMP_REFSEL_REFSEL_Ref1_8Vdd, /**< Use supply with a 1/8 prescaler as reference. */ + NRF_LPCOMP_REF_SUPPLY_2_8 = LPCOMP_REFSEL_REFSEL_Ref2_8Vdd, /**< Use supply with a 2/8 prescaler as reference. */ + NRF_LPCOMP_REF_SUPPLY_3_8 = LPCOMP_REFSEL_REFSEL_Ref3_8Vdd, /**< Use supply with a 3/8 prescaler as reference. */ + NRF_LPCOMP_REF_SUPPLY_4_8 = LPCOMP_REFSEL_REFSEL_Ref4_8Vdd, /**< Use supply with a 4/8 prescaler as reference. */ + NRF_LPCOMP_REF_SUPPLY_5_8 = LPCOMP_REFSEL_REFSEL_Ref5_8Vdd, /**< Use supply with a 5/8 prescaler as reference. */ + NRF_LPCOMP_REF_SUPPLY_6_8 = LPCOMP_REFSEL_REFSEL_Ref6_8Vdd, /**< Use supply with a 6/8 prescaler as reference. */ + NRF_LPCOMP_REF_SUPPLY_7_8 = LPCOMP_REFSEL_REFSEL_Ref7_8Vdd, /**< Use supply with a 7/8 prescaler as reference. */ + NRF_LPCOMP_REF_SUPPLY_1_16 = LPCOMP_REFSEL_REFSEL_Ref1_16Vdd, /**< Use supply with a 1/16 prescaler as reference. */ + NRF_LPCOMP_REF_SUPPLY_3_16 = LPCOMP_REFSEL_REFSEL_Ref3_16Vdd, /**< Use supply with a 3/16 prescaler as reference. */ + NRF_LPCOMP_REF_SUPPLY_5_16 = LPCOMP_REFSEL_REFSEL_Ref5_16Vdd, /**< Use supply with a 5/16 prescaler as reference. */ + NRF_LPCOMP_REF_SUPPLY_7_16 = LPCOMP_REFSEL_REFSEL_Ref7_16Vdd, /**< Use supply with a 7/16 prescaler as reference. */ + NRF_LPCOMP_REF_SUPPLY_9_16 = LPCOMP_REFSEL_REFSEL_Ref9_16Vdd, /**< Use supply with a 9/16 prescaler as reference. */ + NRF_LPCOMP_REF_SUPPLY_11_16 = LPCOMP_REFSEL_REFSEL_Ref11_16Vdd, /**< Use supply with a 11/16 prescaler as reference. */ + NRF_LPCOMP_REF_SUPPLY_13_16 = LPCOMP_REFSEL_REFSEL_Ref13_16Vdd, /**< Use supply with a 13/16 prescaler as reference. */ + NRF_LPCOMP_REF_SUPPLY_15_16 = LPCOMP_REFSEL_REFSEL_Ref15_16Vdd, /**< Use supply with a 15/16 prescaler as reference. */ +#endif + NRF_LPCOMP_REF_EXT_REF0 = LPCOMP_REFSEL_REFSEL_ARef | + (LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference0 << 16), /**< External reference 0. */ + NRF_LPCOMP_CONFIG_REF_EXT_REF1 = LPCOMP_REFSEL_REFSEL_ARef | + (LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference1 << 16), /**< External reference 1. */ +} nrf_lpcomp_ref_t; + +/** + * @enum nrf_lpcomp_input_t + * @brief LPCOMP input selection. + */ +typedef enum +{ + NRF_LPCOMP_INPUT_0 = LPCOMP_PSEL_PSEL_AnalogInput0, /**< Input 0. */ + NRF_LPCOMP_INPUT_1 = LPCOMP_PSEL_PSEL_AnalogInput1, /**< Input 1. */ + NRF_LPCOMP_INPUT_2 = LPCOMP_PSEL_PSEL_AnalogInput2, /**< Input 2. */ + NRF_LPCOMP_INPUT_3 = LPCOMP_PSEL_PSEL_AnalogInput3, /**< Input 3. */ + NRF_LPCOMP_INPUT_4 = LPCOMP_PSEL_PSEL_AnalogInput4, /**< Input 4. */ + NRF_LPCOMP_INPUT_5 = LPCOMP_PSEL_PSEL_AnalogInput5, /**< Input 5. */ + NRF_LPCOMP_INPUT_6 = LPCOMP_PSEL_PSEL_AnalogInput6, /**< Input 6. */ + NRF_LPCOMP_INPUT_7 = LPCOMP_PSEL_PSEL_AnalogInput7 /**< Input 7. */ +} nrf_lpcomp_input_t; + +/** + * @enum nrf_lpcomp_detect_t + * @brief LPCOMP detection type selection. + */ +typedef enum +{ + NRF_LPCOMP_DETECT_CROSS = LPCOMP_ANADETECT_ANADETECT_Cross, /**< Generate ANADETEC on crossing, both upwards and downwards crossing. */ + NRF_LPCOMP_DETECT_UP = LPCOMP_ANADETECT_ANADETECT_Up, /**< Generate ANADETEC on upwards crossing only. */ + NRF_LPCOMP_DETECT_DOWN = LPCOMP_ANADETECT_ANADETECT_Down /**< Generate ANADETEC on downwards crossing only. */ +} nrf_lpcomp_detect_t; + +/** + * @enum nrf_lpcomp_task_t + * @brief LPCOMP tasks. + */ +typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ +{ + NRF_LPCOMP_TASK_START = offsetof(NRF_LPCOMP_Type, TASKS_START), /**< LPCOMP start sampling task. */ + NRF_LPCOMP_TASK_STOP = offsetof(NRF_LPCOMP_Type, TASKS_STOP), /**< LPCOMP stop sampling task. */ + NRF_LPCOMP_TASK_SAMPLE = offsetof(NRF_LPCOMP_Type, TASKS_SAMPLE) /**< Sample comparator value. */ +} nrf_lpcomp_task_t; /*lint -restore*/ + + +/** + * @enum nrf_lpcomp_event_t + * @brief LPCOMP events. + */ +typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ +{ + NRF_LPCOMP_EVENT_READY = offsetof(NRF_LPCOMP_Type, EVENTS_READY), /**< LPCOMP is ready and output is valid. */ + NRF_LPCOMP_EVENT_DOWN = offsetof(NRF_LPCOMP_Type, EVENTS_DOWN), /**< Input voltage crossed the threshold going down. */ + NRF_LPCOMP_EVENT_UP = offsetof(NRF_LPCOMP_Type, EVENTS_UP), /**< Input voltage crossed the threshold going up. */ + NRF_LPCOMP_EVENT_CROSS = offsetof(NRF_LPCOMP_Type, EVENTS_CROSS) /**< Input voltage crossed the threshold in any direction. */ +} nrf_lpcomp_event_t; /*lint -restore*/ + +/** + * @enum nrf_lpcomp_short_mask_t + * @brief LPCOMP shorts masks. + */ +typedef enum +{ + NRF_LPCOMP_SHORT_CROSS_STOP_MASK = LPCOMP_SHORTS_CROSS_STOP_Msk, /*!< Short between CROSS event and STOP task. */ + NRF_LPCOMP_SHORT_UP_STOP_MASK = LPCOMP_SHORTS_UP_STOP_Msk, /*!< Short between UP event and STOP task. */ + NRF_LPCOMP_SHORT_DOWN_STOP_MASK = LPCOMP_SHORTS_DOWN_STOP_Msk, /*!< Short between DOWN event and STOP task. */ + NRF_LPCOMP_SHORT_READY_STOP_MASK = LPCOMP_SHORTS_READY_STOP_Msk, /*!< Short between READY event and STOP task. */ + NRF_LPCOMP_SHORT_READY_SAMPLE_MASK = LPCOMP_SHORTS_READY_SAMPLE_Msk /*!< Short between READY event and SAMPLE task. */ +} nrf_lpcomp_short_mask_t; + +#ifdef LPCOMP_FEATURE_HYST_PRESENT +/** + * @enum nrf_lpcomp_hysteresis_t + * @brief LPCOMP hysteresis. + */ +typedef enum +{ + NRF_LPCOMP_HYST_NOHYST = LPCOMP_HYST_HYST_NoHyst, /**< Comparator hysteresis disabled. */ + NRF_LPCOMP_HYST_50mV = LPCOMP_HYST_HYST_Hyst50mV /**< Comparator hysteresis enabled (typ. 50 mV). */ +}nrf_lpcomp_hysteresis_t; +#endif // LPCOMP_FEATURE_HYST_PRESENT + +/** @brief LPCOMP configuration. */ +typedef struct +{ + nrf_lpcomp_ref_t reference; /**< LPCOMP reference. */ + nrf_lpcomp_detect_t detection; /**< LPCOMP detection type. */ +#ifdef LPCOMP_FEATURE_HYST_PRESENT + nrf_lpcomp_hysteresis_t hyst; /**< LPCOMP hysteresis. */ +#endif // LPCOMP_FEATURE_HYST_PRESENT +} nrf_lpcomp_config_t; + +/** Default LPCOMP configuration. */ +#define NRF_LPCOMP_CONFIG_DEFAULT { NRF_LPCOMP_REF_SUPPLY_FOUR_EIGHT, NRF_LPCOMP_DETECT_DOWN } + +/** + * @brief Function for configuring LPCOMP. + * + * This function powers on LPCOMP and configures it. LPCOMP is in DISABLE state after configuration, + * so it must be enabled before using it. All shorts are inactive, events are cleared, and LPCOMP is stopped. + * + * @param[in] p_config Configuration. + */ +__STATIC_INLINE void nrf_lpcomp_configure(const nrf_lpcomp_config_t * p_config) +{ + NRF_LPCOMP->TASKS_STOP = 1; + NRF_LPCOMP->ENABLE = LPCOMP_ENABLE_ENABLE_Disabled << LPCOMP_ENABLE_ENABLE_Pos; + NRF_LPCOMP->REFSEL = + (p_config->reference << LPCOMP_REFSEL_REFSEL_Pos) & LPCOMP_REFSEL_REFSEL_Msk; + + //If external source is choosen extract analog reference index. + if ((p_config->reference & LPCOMP_REFSEL_REFSEL_ARef)==LPCOMP_REFSEL_REFSEL_ARef) + { + uint32_t extref = p_config->reference >> 16; + NRF_LPCOMP->EXTREFSEL = (extref << LPCOMP_EXTREFSEL_EXTREFSEL_Pos) & LPCOMP_EXTREFSEL_EXTREFSEL_Msk; + } + + NRF_LPCOMP->ANADETECT = + (p_config->detection << LPCOMP_ANADETECT_ANADETECT_Pos) & LPCOMP_ANADETECT_ANADETECT_Msk; +#ifdef LPCOMP_FEATURE_HYST_PRESENT + NRF_LPCOMP->HYST = ((p_config->hyst) << LPCOMP_HYST_HYST_Pos) & LPCOMP_HYST_HYST_Msk; +#endif //LPCOMP_FEATURE_HYST_PRESENT + NRF_LPCOMP->SHORTS = 0; + NRF_LPCOMP->INTENCLR = LPCOMP_INTENCLR_CROSS_Msk | LPCOMP_INTENCLR_UP_Msk | + LPCOMP_INTENCLR_DOWN_Msk | LPCOMP_INTENCLR_READY_Msk; +} + + +/** + * @brief Function for selecting the LPCOMP input. + * + * This function selects the active input of LPCOMP. + * + * @param[in] input Input to be selected. + */ +__STATIC_INLINE void nrf_lpcomp_input_select(nrf_lpcomp_input_t input) +{ + uint32_t lpcomp_enable_state = NRF_LPCOMP->ENABLE; + + NRF_LPCOMP->ENABLE = LPCOMP_ENABLE_ENABLE_Disabled << LPCOMP_ENABLE_ENABLE_Pos; + NRF_LPCOMP->PSEL = + ((uint32_t)input << LPCOMP_PSEL_PSEL_Pos) | (NRF_LPCOMP->PSEL & ~LPCOMP_PSEL_PSEL_Msk); + NRF_LPCOMP->ENABLE = lpcomp_enable_state; +} + + +/** + * @brief Function for enabling the Low Power Comparator. + * + * This function enables LPCOMP. + * + */ +__STATIC_INLINE void nrf_lpcomp_enable(void) +{ + NRF_LPCOMP->ENABLE = LPCOMP_ENABLE_ENABLE_Enabled << LPCOMP_ENABLE_ENABLE_Pos; + NRF_LPCOMP->EVENTS_READY = 0; + NRF_LPCOMP->EVENTS_DOWN = 0; + NRF_LPCOMP->EVENTS_UP = 0; + NRF_LPCOMP->EVENTS_CROSS = 0; +} + + +/** + * @brief Function for disabling the Low Power Comparator. + * + * This function disables LPCOMP. + * + */ +__STATIC_INLINE void nrf_lpcomp_disable(void) +{ + NRF_LPCOMP->ENABLE = LPCOMP_ENABLE_ENABLE_Disabled << LPCOMP_ENABLE_ENABLE_Pos; +} + + +/** + * @brief Function for getting the last LPCOMP compare result. + * + * @return The last compare result. If 0 then VIN+ < VIN-, if 1 then the opposite. + */ +__STATIC_INLINE uint32_t nrf_lpcomp_result_get(void) +{ + return (uint32_t)NRF_LPCOMP->RESULT; +} + + +/** + * @brief Function for enabling interrupts from LPCOMP. + * + * @param[in] lpcomp_int_mask Mask of interrupts to be enabled. + * + * @sa nrf_lpcomp_int_disable() + * @sa nrf_lpcomp_int_enable_check() + */ +__STATIC_INLINE void nrf_lpcomp_int_enable(uint32_t lpcomp_int_mask) +{ + NRF_LPCOMP->INTENSET = lpcomp_int_mask; +} + + +/** + * @brief Function for disabling interrupts from LPCOMP. + * + * @param[in] lpcomp_int_mask Mask of interrupts to be disabled. + * + * @sa nrf_lpcomp_int_enable() + * @sa nrf_lpcomp_int_enable_check() + */ +__STATIC_INLINE void nrf_lpcomp_int_disable(uint32_t lpcomp_int_mask) +{ + NRF_LPCOMP->INTENCLR = lpcomp_int_mask; +} + + +/** + * @brief Function for getting the enabled interrupts of LPCOMP. + * + * @param[in] lpcomp_int_mask Mask of interrupts to be checked. + * + * @retval true If any of interrupts of the specified mask are enabled. + * + * @sa nrf_lpcomp_int_enable() + * @sa nrf_lpcomp_int_disable() + */ +__STATIC_INLINE bool nrf_lpcomp_int_enable_check(uint32_t lpcomp_int_mask) +{ + return (NRF_LPCOMP->INTENSET & lpcomp_int_mask); // when read this register will return the value of INTEN. +} + + +/** + * @brief Function for getting the address of a specific LPCOMP task register. + * + * @param[in] lpcomp_task LPCOMP task. + * + * @return The address of the specified LPCOMP task. + */ +__STATIC_INLINE uint32_t * nrf_lpcomp_task_address_get(nrf_lpcomp_task_t lpcomp_task) +{ + return (uint32_t *)((uint8_t *)NRF_LPCOMP + lpcomp_task); +} + + +/** + * @brief Function for getting the address of a specific LPCOMP event register. + * + * @param[in] lpcomp_event LPCOMP event. + * + * @return The address of the specified LPCOMP event. + */ +__STATIC_INLINE uint32_t * nrf_lpcomp_event_address_get(nrf_lpcomp_event_t lpcomp_event) +{ + return (uint32_t *)((uint8_t *)NRF_LPCOMP + lpcomp_event); +} + + +/** + * @brief Function for setting LPCOMP shorts. + * + * @param[in] lpcomp_short_mask LPCOMP shorts by mask. + * + */ +__STATIC_INLINE void nrf_lpcomp_shorts_enable(uint32_t lpcomp_short_mask) +{ + NRF_LPCOMP->SHORTS |= lpcomp_short_mask; +} + + +/** + * @brief Function for clearing LPCOMP shorts by mask. + * + * @param[in] lpcomp_short_mask LPCOMP shorts to be cleared. + * + */ +__STATIC_INLINE void nrf_lpcomp_shorts_disable(uint32_t lpcomp_short_mask) +{ + NRF_LPCOMP->SHORTS &= ~lpcomp_short_mask; +} + + +/** + * @brief Function for setting a specific LPCOMP task. + * + * @param[in] lpcomp_task LPCOMP task to be set. + * + */ +__STATIC_INLINE void nrf_lpcomp_task_trigger(nrf_lpcomp_task_t lpcomp_task) +{ + *( (volatile uint32_t *)( (uint8_t *)NRF_LPCOMP + lpcomp_task) ) = 1; +} + + +/** + * @brief Function for clearing a specific LPCOMP event. + * + * @param[in] lpcomp_event LPCOMP event to be cleared. + * + */ +__STATIC_INLINE void nrf_lpcomp_event_clear(nrf_lpcomp_event_t lpcomp_event) +{ + *( (volatile uint32_t *)( (uint8_t *)NRF_LPCOMP + lpcomp_event) ) = 0; +#if __CORTEX_M == 0x04 + volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_LPCOMP + lpcomp_event)); + (void)dummy; +#endif +} + + +/** + * @brief Function for getting the state of a specific LPCOMP event. + * + * @retval true If the specified LPCOMP event is active. + * + */ +__STATIC_INLINE bool nrf_lpcomp_event_check(nrf_lpcomp_event_t lpcomp_event) +{ + return (bool) (*(volatile uint32_t *)( (uint8_t *)NRF_LPCOMP + lpcomp_event)); +} + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_LPCOMP_H_ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_nvmc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_nvmc.c new file mode 100644 index 00000000000..99fc64f85ed --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_nvmc.c @@ -0,0 +1,133 @@ +/** + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/** + *@file + *@brief NMVC driver implementation + */ + +#include +#include "nrf_nvmc.h" + +static inline void wait_for_flash_ready(void) +{ + while (NRF_NVMC->READY == NVMC_READY_READY_Busy) {;} +} + +void nrf_nvmc_page_erase(uint32_t address) +{ + // Enable erase. + NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Een; + __ISB(); + __DSB(); + + // Erase the page + NRF_NVMC->ERASEPAGE = address; + wait_for_flash_ready(); + + NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren; + __ISB(); + __DSB(); +} + + +void nrf_nvmc_write_byte(uint32_t address, uint8_t value) +{ + uint32_t byte_shift = address & (uint32_t)0x03; + uint32_t address32 = address & ~byte_shift; // Address to the word this byte is in. + uint32_t value32 = (*(uint32_t*)address32 & ~((uint32_t)0xFF << (byte_shift << (uint32_t)3))); + value32 = value32 + ((uint32_t)value << (byte_shift << 3)); + + // Enable write. + NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos); + __ISB(); + __DSB(); + + *(uint32_t*)address32 = value32; + wait_for_flash_ready(); + + NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos); + __ISB(); + __DSB(); +} + +void nrf_nvmc_write_word(uint32_t address, uint32_t value) +{ + // Enable write. + NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen; + __ISB(); + __DSB(); + + *(uint32_t*)address = value; + wait_for_flash_ready(); + + NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren; + __ISB(); + __DSB(); +} + +void nrf_nvmc_write_bytes(uint32_t address, const uint8_t * src, uint32_t num_bytes) +{ + uint32_t i; + for (i = 0; i < num_bytes; i++) + { + nrf_nvmc_write_byte(address + i,src[i]); + } +} + +void nrf_nvmc_write_words(uint32_t address, const uint32_t * src, uint32_t num_words) +{ + uint32_t i; + + // Enable write. + NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen; + __ISB(); + __DSB(); + + for (i = 0; i < num_words; i++) + { + ((uint32_t*)address)[i] = src[i]; + wait_for_flash_ready(); + } + + NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren; + __ISB(); + __DSB(); +} + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_nvmc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_nvmc.h new file mode 100644 index 00000000000..a0d8de8efd3 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_nvmc.h @@ -0,0 +1,119 @@ +/** + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_NVMC_H__ +#define NRF_NVMC_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + + +/** + * @defgroup nrf_nvmc_hal NVMC HAL + * @{ + * @ingroup nrf_nvmc + * @brief Hardware access layer for managing the Non-Volatile Memory Controller (NVMC) peripheral. + * + * This driver allows writing to the non-volatile memory (NVM) regions + * of the chip. In order to write to NVM the controller must be powered + * on and the relevant page must be erased. + * + */ + + +/** + * @brief Erase a page in flash. This is required before writing to any + * address in the page. + * + * @param address Start address of the page. + */ +void nrf_nvmc_page_erase(uint32_t address); + + +/** + * @brief Write a single byte to flash. + * + * The function reads the word containing the byte, and then + * rewrites the entire word. + * + * @param address Address to write to. + * @param value Value to write. + */ +void nrf_nvmc_write_byte(uint32_t address , uint8_t value); + + +/** + * @brief Write a 32-bit word to flash. + * @param address Address to write to. + * @param value Value to write. + */ +void nrf_nvmc_write_word(uint32_t address, uint32_t value); + + +/** + * @brief Write consecutive bytes to flash. + * + * @param address Address to write to. + * @param src Pointer to data to copy from. + * @param num_bytes Number of bytes in src to write. + */ +void nrf_nvmc_write_bytes(uint32_t address, const uint8_t * src, uint32_t num_bytes); + + +/** + * @brief Write consecutive words to flash. + * + * @param address Address to write to. + * @param src Pointer to data to copy from. + * @param num_words Number of words in src to write. + */ +void nrf_nvmc_write_words(uint32_t address, const uint32_t * src, uint32_t num_words); + + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_NVMC_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_pdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_pdm.h new file mode 100644 index 00000000000..5f183140e49 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_pdm.h @@ -0,0 +1,387 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_PDM_H_ +#define NRF_PDM_H_ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_pdm_hal PDM HAL + * @{ + * @ingroup nrf_pdm + * @brief Hardware access layer for managing the Pulse Density Modulation (PDM) peripheral. + */ + +#define NRF_PDM_GAIN_MINIMUM 0x00 +#define NRF_PDM_GAIN_DEFAULT 0x28 +#define NRF_PDM_GAIN_MAXIMUM 0x50 + +typedef uint8_t nrf_pdm_gain_t; + + +/** + * @brief PDM tasks. + */ +typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ +{ + NRF_PDM_TASK_START = offsetof(NRF_PDM_Type, TASKS_START), ///< Starts continuous PDM transfer. + NRF_PDM_TASK_STOP = offsetof(NRF_PDM_Type, TASKS_STOP) ///< Stops PDM transfer. +} nrf_pdm_task_t; + + +/** + * @brief PDM events. + */ +typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ +{ + NRF_PDM_EVENT_STARTED = offsetof(NRF_PDM_Type, EVENTS_STARTED), ///< PDM transfer has started. + NRF_PDM_EVENT_STOPPED = offsetof(NRF_PDM_Type, EVENTS_STOPPED), ///< PDM transfer has finished. + NRF_PDM_EVENT_END = offsetof(NRF_PDM_Type, EVENTS_END) ///< The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM. +} nrf_pdm_event_t; + + +/** + * @brief PDM interrupt masks. + */ +typedef enum +{ + NRF_PDM_INT_STARTED = PDM_INTENSET_STARTED_Msk, ///< Interrupt on EVENTS_STARTED event. + NRF_PDM_INT_STOPPED = PDM_INTENSET_STOPPED_Msk, ///< Interrupt on EVENTS_STOPPED event. + NRF_PDM_INT_END = PDM_INTENSET_END_Msk ///< Interrupt on EVENTS_END event. +} nrf_pdm_int_mask_t; + +/** + * @brief PDM clock frequency. + */ +typedef enum +{ + NRF_PDM_FREQ_1000K = PDM_PDMCLKCTRL_FREQ_1000K, ///< PDM_CLK = 1.000 MHz. + NRF_PDM_FREQ_1032K = PDM_PDMCLKCTRL_FREQ_Default, ///< PDM_CLK = 1.032 MHz. + NRF_PDM_FREQ_1067K = PDM_PDMCLKCTRL_FREQ_1067K ///< PDM_CLK = 1.067 MHz. +} nrf_pdm_freq_t; + + +/** + * @brief PDM operation mode. + */ +typedef enum +{ + NRF_PDM_MODE_STEREO = PDM_MODE_OPERATION_Stereo, ///< Sample and store one pair (Left + Right) of 16-bit samples per RAM word. + NRF_PDM_MODE_MONO = PDM_MODE_OPERATION_Mono ///< Sample and store two successive Left samples (16 bit each) per RAM word. +} nrf_pdm_mode_t; + + +/** + * @brief PDM sampling mode. + */ +typedef enum +{ + NRF_PDM_EDGE_LEFTFALLING = PDM_MODE_EDGE_LeftFalling, ///< Left (or mono) is sampled on falling edge of PDM_CLK. + NRF_PDM_EDGE_LEFTRISING = PDM_MODE_EDGE_LeftRising ///< Left (or mono) is sampled on rising edge of PDM_CLK. +} nrf_pdm_edge_t; + + +/** + * @brief Function for triggering a PDM task. + * + * @param[in] pdm_task PDM task. + */ +__STATIC_INLINE void nrf_pdm_task_trigger(nrf_pdm_task_t pdm_task) +{ + *((volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_task)) = 0x1UL; +} + + +/** + * @brief Function for getting the address of a PDM task register. + * + * @param[in] pdm_task PDM task. + * + * @return Address of the specified PDM task. + */ +__STATIC_INLINE uint32_t nrf_pdm_task_address_get(nrf_pdm_task_t pdm_task) +{ + return (uint32_t)((uint8_t *)NRF_PDM + (uint32_t)pdm_task); +} + + +/** + * @brief Function for getting the state of a PDM event. + * + * @param[in] pdm_event PDM event. + * + * @return State of the specified PDM event. + */ +__STATIC_INLINE bool nrf_pdm_event_check(nrf_pdm_event_t pdm_event) +{ + return (bool)*(volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_event); +} + + +/** + * @brief Function for clearing a PDM event. + * + * @param[in] pdm_event PDM event. + */ +__STATIC_INLINE void nrf_pdm_event_clear(nrf_pdm_event_t pdm_event) +{ + *((volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_event)) = 0x0UL; +#if __CORTEX_M == 0x04 + volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_event)); + (void)dummy; +#endif +} + + +/** + * @brief Function for getting the address of a PDM event register. + * + * @param[in] pdm_event PDM event. + * + * @return Address of the specified PDM event. + */ +__STATIC_INLINE volatile uint32_t * nrf_pdm_event_address_get(nrf_pdm_event_t pdm_event) +{ + return (volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_event); +} + + +/** + * @brief Function for enabling PDM interrupts. + * + * @param[in] pdm_int_mask Interrupts to enable. + */ +__STATIC_INLINE void nrf_pdm_int_enable(uint32_t pdm_int_mask) +{ + NRF_PDM->INTENSET = pdm_int_mask; +} + + +/** + * @brief Function for retrieving the state of PDM interrupts. + * + * @param[in] pdm_int_mask Interrupts to check. + * + * @retval true If all specified interrupts are enabled. + * @retval false If at least one of the given interrupts is not enabled. + */ +__STATIC_INLINE bool nrf_pdm_int_enable_check(uint32_t pdm_int_mask) +{ + return (bool)(NRF_PDM->INTENSET & pdm_int_mask); +} + + +/** + * @brief Function for disabling interrupts. + * + * @param pdm_int_mask Interrupts to disable. + */ +__STATIC_INLINE void nrf_pdm_int_disable(uint32_t pdm_int_mask) +{ + NRF_PDM->INTENCLR = pdm_int_mask; +} + + +/** + * @brief Function for enabling the PDM peripheral. + * + * The PDM peripheral must be enabled before use. + */ +__STATIC_INLINE void nrf_pdm_enable(void) +{ + NRF_PDM->ENABLE = (PDM_ENABLE_ENABLE_Enabled << PDM_ENABLE_ENABLE_Pos); +} + + +/** + * @brief Function for disabling the PDM peripheral. + */ +__STATIC_INLINE void nrf_pdm_disable(void) +{ + NRF_PDM->ENABLE = (PDM_ENABLE_ENABLE_Disabled << PDM_ENABLE_ENABLE_Pos); +} + + +/** + * @brief Function for checking if the PDM peripheral is enabled. + * + * @retval true If the PDM peripheral is enabled. + * @retval false If the PDM peripheral is not enabled. + */ +__STATIC_INLINE bool nrf_pdm_enable_check(void) +{ + return (NRF_PDM->ENABLE == (PDM_ENABLE_ENABLE_Enabled << PDM_ENABLE_ENABLE_Pos)); +} + + +/** + * @brief Function for setting the PDM operation mode. + * + * @param[in] pdm_mode PDM operation mode. + * @param[in] pdm_edge PDM sampling mode. + */ +__STATIC_INLINE void nrf_pdm_mode_set(nrf_pdm_mode_t pdm_mode, nrf_pdm_edge_t pdm_edge) +{ + NRF_PDM->MODE = ((pdm_mode << PDM_MODE_OPERATION_Pos) & PDM_MODE_OPERATION_Msk) + | ((pdm_edge << PDM_MODE_EDGE_Pos) & PDM_MODE_EDGE_Msk); +} + + +/** + * @brief Function for getting the PDM operation mode. + * + * @param[out] p_pdm_mode PDM operation mode. + * @param[out] p_pdm_edge PDM sampling mode. + */ +__STATIC_INLINE void nrf_pdm_mode_get(nrf_pdm_mode_t * p_pdm_mode, nrf_pdm_edge_t * p_pdm_edge) +{ + uint32_t mode = NRF_PDM->MODE; + *p_pdm_mode = (nrf_pdm_mode_t)((mode & PDM_MODE_OPERATION_Msk ) >> PDM_MODE_OPERATION_Pos); + *p_pdm_edge = (nrf_pdm_edge_t)((mode & PDM_MODE_EDGE_Msk ) >> PDM_MODE_EDGE_Pos); +} + + +/** + * @brief Function for setting the PDM clock frequency. + * + * @param[in] pdm_freq PDM clock frequency. + */ +__STATIC_INLINE void nrf_pdm_clock_set(nrf_pdm_freq_t pdm_freq) +{ + NRF_PDM->PDMCLKCTRL = ((pdm_freq << PDM_PDMCLKCTRL_FREQ_Pos) & PDM_PDMCLKCTRL_FREQ_Msk); +} + + +/** + * @brief Function for getting the PDM clock frequency. + */ +__STATIC_INLINE nrf_pdm_freq_t nrf_pdm_clock_get(void) +{ + return (nrf_pdm_freq_t) ((NRF_PDM->PDMCLKCTRL << PDM_PDMCLKCTRL_FREQ_Pos) & PDM_PDMCLKCTRL_FREQ_Msk); +} + + +/** + * @brief Function for setting up the PDM pins. + * + * @param[in] psel_clk CLK pin number. + * @param[in] psel_din DIN pin number. + */ +__STATIC_INLINE void nrf_pdm_psel_connect(uint32_t psel_clk, uint32_t psel_din) +{ + NRF_PDM->PSEL.CLK = psel_clk; + NRF_PDM->PSEL.DIN = psel_din; +} + +/** + * @brief Function for disconnecting the PDM pins. + */ +__STATIC_INLINE void nrf_pdm_psel_disconnect() +{ + NRF_PDM->PSEL.CLK = ((PDM_PSEL_CLK_CONNECT_Disconnected << PDM_PSEL_CLK_CONNECT_Pos) + & PDM_PSEL_CLK_CONNECT_Msk); + NRF_PDM->PSEL.DIN = ((PDM_PSEL_DIN_CONNECT_Disconnected << PDM_PSEL_DIN_CONNECT_Pos) + & PDM_PSEL_DIN_CONNECT_Msk); +} + + +/** + * @brief Function for setting the PDM gain. + * + * @param[in] gain_l Left channel gain. + * @param[in] gain_r Right channel gain. + */ +__STATIC_INLINE void nrf_pdm_gain_set(nrf_pdm_gain_t gain_l, nrf_pdm_gain_t gain_r) +{ + NRF_PDM->GAINL = gain_l; + NRF_PDM->GAINR = gain_r; +} + + +/** + * @brief Function for getting the PDM gain. + * + * @param[out] p_gain_l Left channel gain. + * @param[out] p_gain_r Right channel gain. + */ +__STATIC_INLINE void nrf_pdm_gain_get(nrf_pdm_gain_t * p_gain_l, nrf_pdm_gain_t * p_gain_r) +{ + *p_gain_l = NRF_PDM->GAINL; + *p_gain_r = NRF_PDM->GAINR; +} + + +/** + * @brief Function for setting the PDM sample buffer. + * + * @param[in] p_buffer Pointer to the RAM address where samples should be written with EasyDMA. + * @param[in] num Number of samples to allocate memory for in EasyDMA mode. + * + * The amount of allocated RAM depends on the operation mode. + * - For stereo mode: N 32-bit words. + * - For mono mode: Ceil(N/2) 32-bit words. + */ +__STATIC_INLINE void nrf_pdm_buffer_set(uint32_t * p_buffer, uint32_t num) +{ + NRF_PDM->SAMPLE.PTR = (uint32_t)p_buffer; + NRF_PDM->SAMPLE.MAXCNT = num; +} + +/** + * @brief Function for getting the current PDM sample buffer address. + * + * @return Pointer to the current sample buffer. + */ +__STATIC_INLINE uint32_t * nrf_pdm_buffer_get() +{ + return (uint32_t *)NRF_PDM->SAMPLE.PTR; +} + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_PDM_H_ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_power.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_power.h new file mode 100644 index 00000000000..9082d82ce01 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_power.h @@ -0,0 +1,1057 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_POWER_H__ +#define NRF_POWER_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_power_hal POWER HAL + * @{ + * @ingroup nrf_power + * @brief Hardware access layer for managing the POWER peripheral. + */ + +#if defined(POWER_RAMSTATUS_RAMBLOCK0_Msk) +#define NRF_POWER_HAS_RAMSTATUS 1 +#else +#define NRF_POWER_HAS_RAMSTATUS 0 +#endif + +/** + * @name The implemented functionality + * @{ + * + * Macros that defines functionality that is implemented into POWER peripheral. + */ +#if defined(POWER_INTENSET_SLEEPENTER_Msk) || defined(__NRFX_DOXYGEN__) +/** + * @brief The fact that sleep events are present + * + * In some MCUs there is possibility to process sleep entering and exiting + * events. + */ +#define NRF_POWER_HAS_SLEEPEVT 1 +#else +#define NRF_POWER_HAS_SLEEPEVT 0 +#endif + +#if defined(POWER_RAM_POWER_S0POWER_Msk) || defined(__NRFX_DOXYGEN__) +/** + * @brief The fact that RAMPOWER registers are present + * + * After nRF51, new way to manage RAM power was implemented. + * Special registers, one for every RAM block that makes it possible to + * power ON or OFF RAM segments and turn ON and OFF RAM retention in system OFF + * state. + */ +#define NRF_POWER_HAS_RAMPOWER_REGS 1 +#else +#define NRF_POWER_HAS_RAMPOWER_REGS 0 +#endif + +#if defined(POWER_POFCON_THRESHOLDVDDH_Msk) || defined(__NRFX_DOXYGEN__) +/** + * @brief Auxiliary definition to mark the fact that VDDH is present + * + * This definition can be used in a code to decide if the part with VDDH + * related settings should be implemented. + */ +#define NRF_POWER_HAS_VDDH 1 +#else +#define NRF_POWER_HAS_VDDH 0 +#endif + +#if defined(POWER_USBREGSTATUS_VBUSDETECT_Msk) || defined(__NRFX_DOXYGEN__) +/** + * @brief The fact that power module manages USB regulator + * + * In devices that have USB, power peripheral manages also connection + * detection and USB power regulator, that converts 5 V to 3.3 V + * used by USBD peripheral. + */ +#define NRF_POWER_HAS_USBREG 1 +#else +#define NRF_POWER_HAS_USBREG 0 +#endif +/** @} */ + +/* ------------------------------------------------------------------------------------------------ + * Begin of automatically generated part + * ------------------------------------------------------------------------------------------------ + */ + +/** + * @brief POWER tasks + */ +typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ +{ + NRF_POWER_TASK_CONSTLAT = offsetof(NRF_POWER_Type, TASKS_CONSTLAT), /**< Enable constant latency mode */ + NRF_POWER_TASK_LOWPWR = offsetof(NRF_POWER_Type, TASKS_LOWPWR ), /**< Enable low power mode (variable latency) */ +}nrf_power_task_t; /*lint -restore */ + +/** + * @brief POWER events + */ +typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ +{ + NRF_POWER_EVENT_POFWARN = offsetof(NRF_POWER_Type, EVENTS_POFWARN ), /**< Power failure warning */ +#if NRF_POWER_HAS_SLEEPEVT + NRF_POWER_EVENT_SLEEPENTER = offsetof(NRF_POWER_Type, EVENTS_SLEEPENTER ), /**< CPU entered WFI/WFE sleep */ + NRF_POWER_EVENT_SLEEPEXIT = offsetof(NRF_POWER_Type, EVENTS_SLEEPEXIT ), /**< CPU exited WFI/WFE sleep */ +#endif +#if NRF_POWER_HAS_USBREG + NRF_POWER_EVENT_USBDETECTED = offsetof(NRF_POWER_Type, EVENTS_USBDETECTED), /**< Voltage supply detected on VBUS */ + NRF_POWER_EVENT_USBREMOVED = offsetof(NRF_POWER_Type, EVENTS_USBREMOVED ), /**< Voltage supply removed from VBUS */ + NRF_POWER_EVENT_USBPWRRDY = offsetof(NRF_POWER_Type, EVENTS_USBPWRRDY ), /**< USB 3.3 V supply ready */ +#endif +}nrf_power_event_t; /*lint -restore */ + +/** + * @brief POWER interrupts + */ +typedef enum +{ + NRF_POWER_INT_POFWARN_MASK = POWER_INTENSET_POFWARN_Msk , /**< Write '1' to Enable interrupt for POFWARN event */ +#if NRF_POWER_HAS_SLEEPEVT + NRF_POWER_INT_SLEEPENTER_MASK = POWER_INTENSET_SLEEPENTER_Msk , /**< Write '1' to Enable interrupt for SLEEPENTER event */ + NRF_POWER_INT_SLEEPEXIT_MASK = POWER_INTENSET_SLEEPEXIT_Msk , /**< Write '1' to Enable interrupt for SLEEPEXIT event */ +#endif +#if NRF_POWER_HAS_USBREG + NRF_POWER_INT_USBDETECTED_MASK = POWER_INTENSET_USBDETECTED_Msk, /**< Write '1' to Enable interrupt for USBDETECTED event */ + NRF_POWER_INT_USBREMOVED_MASK = POWER_INTENSET_USBREMOVED_Msk , /**< Write '1' to Enable interrupt for USBREMOVED event */ + NRF_POWER_INT_USBPWRRDY_MASK = POWER_INTENSET_USBPWRRDY_Msk , /**< Write '1' to Enable interrupt for USBPWRRDY event */ +#endif +}nrf_power_int_mask_t; + +/** + * @brief Function for activating a specific POWER task. + * + * @param task Task. + */ +__STATIC_INLINE void nrf_power_task_trigger(nrf_power_task_t task); + +/** + * @brief Function for returning the address of a specific POWER task register. + * + * @param task Task. + * + * @return Task address. + */ +__STATIC_INLINE uint32_t nrf_power_task_address_get(nrf_power_task_t task); + +/** + * @brief Function for clearing a specific event. + * + * @param event Event. + */ +__STATIC_INLINE void nrf_power_event_clear(nrf_power_event_t event); + +/** + * @brief Function for returning the state of a specific event. + * + * @param event Event. + * + * @retval true If the event is set. + * @retval false If the event is not set. + */ +__STATIC_INLINE bool nrf_power_event_check(nrf_power_event_t event); + +/** + * @brief Function for getting and clearing the state of specific event + * + * This function checks the state of the event and clears it. + * + * @param event Event. + * + * @retval true If the event was set. + * @retval false If the event was not set. + */ +__STATIC_INLINE bool nrf_power_event_get_and_clear(nrf_power_event_t event); + +/** + * @brief Function for returning the address of a specific POWER event register. + * + * @param event Event. + * + * @return Address. + */ +__STATIC_INLINE uint32_t nrf_power_event_address_get(nrf_power_event_t event); + +/** + * @brief Function for enabling selected interrupts. + * + * @param int_mask Interrupts mask. + */ +__STATIC_INLINE void nrf_power_int_enable(uint32_t int_mask); + +/** + * @brief Function for retrieving the state of selected interrupts. + * + * @param int_mask Interrupts mask. + * + * @retval true If any of selected interrupts is enabled. + * @retval false If none of selected interrupts is enabled. + */ +__STATIC_INLINE bool nrf_power_int_enable_check(uint32_t int_mask); + +/** + * @brief Function for retrieving the information about enabled interrupts. + * + * @return The flags of enabled interrupts. + */ +__STATIC_INLINE uint32_t nrf_power_int_enable_get(void); + +/** + * @brief Function for disabling selected interrupts. + * + * @param int_mask Interrupts mask. + */ +__STATIC_INLINE void nrf_power_int_disable(uint32_t int_mask); + + +/** @} */ /* End of nrf_power_hal */ + + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +/* ------------------------------------------------------------------------------------------------ + * Internal functions + */ + +/** + * @internal + * @brief Internal function for getting task/event register address + * + * @oaram offset Offset of the register from the instance beginning + * + * @attention offset has to be modulo 4 value. In other case we can get hardware fault. + * @return Pointer to the register + */ +__STATIC_INLINE volatile uint32_t * nrf_power_regptr_get(uint32_t offset) +{ + return (volatile uint32_t *)(((uint8_t *)NRF_POWER) + (uint32_t)offset); +} + +/** + * @internal + * @brief Internal function for getting task/event register address - constant version + * + * @oaram offset Offset of the register from the instance beginning + * + * @attention offset has to be modulo 4 value. In other case we can get hardware fault. + * @return Pointer to the register + */ +__STATIC_INLINE volatile const uint32_t * nrf_power_regptr_get_c( + uint32_t offset) +{ + return (volatile const uint32_t *)(((uint8_t *)NRF_POWER) + + (uint32_t)offset); +} + +/* ------------------------------------------------------------------------------------------------ + * Interface functions definitions + */ + +void nrf_power_task_trigger(nrf_power_task_t task) +{ + *(nrf_power_regptr_get((uint32_t)task)) = 1UL; +} + +uint32_t nrf_power_task_address_get(nrf_power_task_t task) +{ + return (uint32_t)nrf_power_regptr_get_c((uint32_t)task); +} + +void nrf_power_event_clear(nrf_power_event_t event) +{ + *(nrf_power_regptr_get((uint32_t)event)) = 0UL; +} + +bool nrf_power_event_check(nrf_power_event_t event) +{ + return (bool)*nrf_power_regptr_get_c((uint32_t)event); +} + +bool nrf_power_event_get_and_clear(nrf_power_event_t event) +{ + bool ret = nrf_power_event_check(event); + if (ret) + { + nrf_power_event_clear(event); + } + return ret; +} + +uint32_t nrf_power_event_address_get(nrf_power_event_t event) +{ + return (uint32_t)nrf_power_regptr_get_c((uint32_t)event); +} + +void nrf_power_int_enable(uint32_t int_mask) +{ + NRF_POWER->INTENSET = int_mask; +} + +bool nrf_power_int_enable_check(uint32_t int_mask) +{ + return !!(NRF_POWER->INTENSET & int_mask); +} + +uint32_t nrf_power_int_enable_get(void) +{ + return NRF_POWER->INTENSET; +} + +void nrf_power_int_disable(uint32_t int_mask) +{ + NRF_POWER->INTENCLR = int_mask; +} + +#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ + +/* ------------------------------------------------------------------------------------------------ + * End of automatically generated part + * ------------------------------------------------------------------------------------------------ + */ +/** + * @ingroup nrf_power_hal + * @{ + */ + +/** + * @brief Reset reason + */ +typedef enum +{ + NRF_POWER_RESETREAS_RESETPIN_MASK = POWER_RESETREAS_RESETPIN_Msk, /*!< Bit mask of RESETPIN field. *///!< NRF_POWER_RESETREAS_RESETPIN_MASK + NRF_POWER_RESETREAS_DOG_MASK = POWER_RESETREAS_DOG_Msk , /*!< Bit mask of DOG field. */ //!< NRF_POWER_RESETREAS_DOG_MASK + NRF_POWER_RESETREAS_SREQ_MASK = POWER_RESETREAS_SREQ_Msk , /*!< Bit mask of SREQ field. */ //!< NRF_POWER_RESETREAS_SREQ_MASK + NRF_POWER_RESETREAS_LOCKUP_MASK = POWER_RESETREAS_LOCKUP_Msk , /*!< Bit mask of LOCKUP field. */ //!< NRF_POWER_RESETREAS_LOCKUP_MASK + NRF_POWER_RESETREAS_OFF_MASK = POWER_RESETREAS_OFF_Msk , /*!< Bit mask of OFF field. */ //!< NRF_POWER_RESETREAS_OFF_MASK +#if defined(POWER_RESETREAS_LPCOMP_Msk) || defined(__NRFX_DOXYGEN__) + NRF_POWER_RESETREAS_LPCOMP_MASK = POWER_RESETREAS_LPCOMP_Msk , /*!< Bit mask of LPCOMP field. */ //!< NRF_POWER_RESETREAS_LPCOMP_MASK +#endif + NRF_POWER_RESETREAS_DIF_MASK = POWER_RESETREAS_DIF_Msk , /*!< Bit mask of DIF field. */ //!< NRF_POWER_RESETREAS_DIF_MASK +#if defined(POWER_RESETREAS_NFC_Msk) || defined(__NRFX_DOXYGEN__) + NRF_POWER_RESETREAS_NFC_MASK = POWER_RESETREAS_NFC_Msk , /*!< Bit mask of NFC field. */ +#endif +#if defined(POWER_RESETREAS_VBUS_Msk) || defined(__NRFX_DOXYGEN__) + NRF_POWER_RESETREAS_VBUS_MASK = POWER_RESETREAS_VBUS_Msk , /*!< Bit mask of VBUS field. */ +#endif +}nrf_power_resetreas_mask_t; + +#if NRF_POWER_HAS_USBREG +/** + * @brief USBREGSTATUS register bit masks + * + * @sa nrf_power_usbregstatus_get + */ +typedef enum +{ + NRF_POWER_USBREGSTATUS_VBUSDETECT_MASK = POWER_USBREGSTATUS_VBUSDETECT_Msk, /**< USB detected or removed */ + NRF_POWER_USBREGSTATUS_OUTPUTRDY_MASK = POWER_USBREGSTATUS_OUTPUTRDY_Msk /**< USB 3.3 V supply ready */ +}nrf_power_usbregstatus_mask_t; +#endif + +#if NRF_POWER_HAS_RAMSTATUS +/** + * @brief RAM blocks numbers + * + * @sa nrf_power_ramblock_mask_t + * @note + * Ram blocks has to been used in nrf51. + * In new CPU ram is divided into segments and this functionality is depreciated. + * For the newer MCU see the PS for mapping between internal RAM and RAM blocks, + * because this mapping is not 1:1, and functions related to old style blocks + * should not be used. + */ +typedef enum +{ + NRF_POWER_RAMBLOCK0 = POWER_RAMSTATUS_RAMBLOCK0_Pos, + NRF_POWER_RAMBLOCK1 = POWER_RAMSTATUS_RAMBLOCK1_Pos, + NRF_POWER_RAMBLOCK2 = POWER_RAMSTATUS_RAMBLOCK2_Pos, + NRF_POWER_RAMBLOCK3 = POWER_RAMSTATUS_RAMBLOCK3_Pos +}nrf_power_ramblock_t; + +/** + * @brief RAM blocks masks + * + * @sa nrf_power_ramblock_t + */ +typedef enum +{ + NRF_POWER_RAMBLOCK0_MASK = POWER_RAMSTATUS_RAMBLOCK0_Msk, + NRF_POWER_RAMBLOCK1_MASK = POWER_RAMSTATUS_RAMBLOCK1_Msk, + NRF_POWER_RAMBLOCK2_MASK = POWER_RAMSTATUS_RAMBLOCK2_Msk, + NRF_POWER_RAMBLOCK3_MASK = POWER_RAMSTATUS_RAMBLOCK3_Msk +}nrf_power_ramblock_mask_t; +#endif // NRF_POWER_HAS_RAMSTATUS + +/** + * @brief RAM power state position of the bits + * + * @sa nrf_power_onoffram_mask_t + */ +typedef enum +{ + NRF_POWER_ONRAM0, /**< Keep RAM block 0 on or off in system ON Mode */ + NRF_POWER_OFFRAM0, /**< Keep retention on RAM block 0 when RAM block is switched off */ + NRF_POWER_ONRAM1, /**< Keep RAM block 1 on or off in system ON Mode */ + NRF_POWER_OFFRAM1, /**< Keep retention on RAM block 1 when RAM block is switched off */ + NRF_POWER_ONRAM2, /**< Keep RAM block 2 on or off in system ON Mode */ + NRF_POWER_OFFRAM2, /**< Keep retention on RAM block 2 when RAM block is switched off */ + NRF_POWER_ONRAM3, /**< Keep RAM block 3 on or off in system ON Mode */ + NRF_POWER_OFFRAM3, /**< Keep retention on RAM block 3 when RAM block is switched off */ +}nrf_power_onoffram_t; + +/** + * @brief RAM power state bit masks + * + * @sa nrf_power_onoffram_t + */ +typedef enum +{ + NRF_POWER_ONRAM0_MASK = 1U << NRF_POWER_ONRAM0, /**< Keep RAM block 0 on or off in system ON Mode */ + NRF_POWER_OFFRAM0_MASK = 1U << NRF_POWER_OFFRAM0, /**< Keep retention on RAM block 0 when RAM block is switched off */ + NRF_POWER_ONRAM1_MASK = 1U << NRF_POWER_ONRAM1, /**< Keep RAM block 1 on or off in system ON Mode */ + NRF_POWER_OFFRAM1_MASK = 1U << NRF_POWER_OFFRAM1, /**< Keep retention on RAM block 1 when RAM block is switched off */ + NRF_POWER_ONRAM2_MASK = 1U << NRF_POWER_ONRAM2, /**< Keep RAM block 2 on or off in system ON Mode */ + NRF_POWER_OFFRAM2_MASK = 1U << NRF_POWER_OFFRAM2, /**< Keep retention on RAM block 2 when RAM block is switched off */ + NRF_POWER_ONRAM3_MASK = 1U << NRF_POWER_ONRAM3, /**< Keep RAM block 3 on or off in system ON Mode */ + NRF_POWER_OFFRAM3_MASK = 1U << NRF_POWER_OFFRAM3, /**< Keep retention on RAM block 3 when RAM block is switched off */ +}nrf_power_onoffram_mask_t; + +/** + * @brief Power failure comparator thresholds + */ +typedef enum +{ + NRF_POWER_POFTHR_V21 = POWER_POFCON_THRESHOLD_V21, /**< Set threshold to 2.1 V */ + NRF_POWER_POFTHR_V23 = POWER_POFCON_THRESHOLD_V23, /**< Set threshold to 2.3 V */ + NRF_POWER_POFTHR_V25 = POWER_POFCON_THRESHOLD_V25, /**< Set threshold to 2.5 V */ + NRF_POWER_POFTHR_V27 = POWER_POFCON_THRESHOLD_V27, /**< Set threshold to 2.7 V */ +#if defined(POWER_POFCON_THRESHOLD_V17) || defined(__NRFX_DOXYGEN__) + NRF_POWER_POFTHR_V17 = POWER_POFCON_THRESHOLD_V17, /**< Set threshold to 1.7 V */ + NRF_POWER_POFTHR_V18 = POWER_POFCON_THRESHOLD_V18, /**< Set threshold to 1.8 V */ + NRF_POWER_POFTHR_V19 = POWER_POFCON_THRESHOLD_V19, /**< Set threshold to 1.9 V */ + NRF_POWER_POFTHR_V20 = POWER_POFCON_THRESHOLD_V20, /**< Set threshold to 2.0 V */ + NRF_POWER_POFTHR_V22 = POWER_POFCON_THRESHOLD_V22, /**< Set threshold to 2.2 V */ + NRF_POWER_POFTHR_V24 = POWER_POFCON_THRESHOLD_V24, /**< Set threshold to 2.4 V */ + NRF_POWER_POFTHR_V26 = POWER_POFCON_THRESHOLD_V26, /**< Set threshold to 2.6 V */ + NRF_POWER_POFTHR_V28 = POWER_POFCON_THRESHOLD_V28, /**< Set threshold to 2.8 V */ +#endif +}nrf_power_pof_thr_t; + +#if NRF_POWER_HAS_VDDH +/** + * @brief Power failure comparator thresholds for VDDH + */ +typedef enum +{ + NRF_POWER_POFTHRVDDH_V27 = POWER_POFCON_THRESHOLDVDDH_V27, /**< Set threshold to 2.7 V */ + NRF_POWER_POFTHRVDDH_V28 = POWER_POFCON_THRESHOLDVDDH_V28, /**< Set threshold to 2.8 V */ + NRF_POWER_POFTHRVDDH_V29 = POWER_POFCON_THRESHOLDVDDH_V29, /**< Set threshold to 2.9 V */ + NRF_POWER_POFTHRVDDH_V30 = POWER_POFCON_THRESHOLDVDDH_V30, /**< Set threshold to 3.0 V */ + NRF_POWER_POFTHRVDDH_V31 = POWER_POFCON_THRESHOLDVDDH_V31, /**< Set threshold to 3.1 V */ + NRF_POWER_POFTHRVDDH_V32 = POWER_POFCON_THRESHOLDVDDH_V32, /**< Set threshold to 3.2 V */ + NRF_POWER_POFTHRVDDH_V33 = POWER_POFCON_THRESHOLDVDDH_V33, /**< Set threshold to 3.3 V */ + NRF_POWER_POFTHRVDDH_V34 = POWER_POFCON_THRESHOLDVDDH_V34, /**< Set threshold to 3.4 V */ + NRF_POWER_POFTHRVDDH_V35 = POWER_POFCON_THRESHOLDVDDH_V35, /**< Set threshold to 3.5 V */ + NRF_POWER_POFTHRVDDH_V36 = POWER_POFCON_THRESHOLDVDDH_V36, /**< Set threshold to 3.6 V */ + NRF_POWER_POFTHRVDDH_V37 = POWER_POFCON_THRESHOLDVDDH_V37, /**< Set threshold to 3.7 V */ + NRF_POWER_POFTHRVDDH_V38 = POWER_POFCON_THRESHOLDVDDH_V38, /**< Set threshold to 3.8 V */ + NRF_POWER_POFTHRVDDH_V39 = POWER_POFCON_THRESHOLDVDDH_V39, /**< Set threshold to 3.9 V */ + NRF_POWER_POFTHRVDDH_V40 = POWER_POFCON_THRESHOLDVDDH_V40, /**< Set threshold to 4.0 V */ + NRF_POWER_POFTHRVDDH_V41 = POWER_POFCON_THRESHOLDVDDH_V41, /**< Set threshold to 4.1 V */ + NRF_POWER_POFTHRVDDH_V42 = POWER_POFCON_THRESHOLDVDDH_V42, /**< Set threshold to 4.2 V */ +}nrf_power_pof_thrvddh_t; + +/** + * @brief Main regulator status + */ +typedef enum +{ + NRF_POWER_MAINREGSTATUS_NORMAL = POWER_MAINREGSTATUS_MAINREGSTATUS_Normal, /**< Normal voltage mode. Voltage supplied on VDD. */ + NRF_POWER_MAINREGSTATUS_HIGH = POWER_MAINREGSTATUS_MAINREGSTATUS_High /**< High voltage mode. Voltage supplied on VDDH. */ +}nrf_power_mainregstatus_t; + +#endif /* NRF_POWER_HAS_VDDH */ + +#if NRF_POWER_HAS_RAMPOWER_REGS +/** + * @brief Bit positions for RAMPOWER register + * + * All possible bits described, even if they are not used in selected MCU. + */ +typedef enum +{ + /** Keep RAM section S0 ON in System ON mode */ + NRF_POWER_RAMPOWER_S0POWER = POWER_RAM_POWER_S0POWER_Pos, + NRF_POWER_RAMPOWER_S1POWER, /**< Keep RAM section S1 ON in System ON mode */ + NRF_POWER_RAMPOWER_S2POWER, /**< Keep RAM section S2 ON in System ON mode */ + NRF_POWER_RAMPOWER_S3POWER, /**< Keep RAM section S3 ON in System ON mode */ + NRF_POWER_RAMPOWER_S4POWER, /**< Keep RAM section S4 ON in System ON mode */ + NRF_POWER_RAMPOWER_S5POWER, /**< Keep RAM section S5 ON in System ON mode */ + NRF_POWER_RAMPOWER_S6POWER, /**< Keep RAM section S6 ON in System ON mode */ + NRF_POWER_RAMPOWER_S7POWER, /**< Keep RAM section S7 ON in System ON mode */ + NRF_POWER_RAMPOWER_S8POWER, /**< Keep RAM section S8 ON in System ON mode */ + NRF_POWER_RAMPOWER_S9POWER, /**< Keep RAM section S9 ON in System ON mode */ + NRF_POWER_RAMPOWER_S10POWER, /**< Keep RAM section S10 ON in System ON mode */ + NRF_POWER_RAMPOWER_S11POWER, /**< Keep RAM section S11 ON in System ON mode */ + NRF_POWER_RAMPOWER_S12POWER, /**< Keep RAM section S12 ON in System ON mode */ + NRF_POWER_RAMPOWER_S13POWER, /**< Keep RAM section S13 ON in System ON mode */ + NRF_POWER_RAMPOWER_S14POWER, /**< Keep RAM section S14 ON in System ON mode */ + NRF_POWER_RAMPOWER_S15POWER, /**< Keep RAM section S15 ON in System ON mode */ + + /** Keep section retention in OFF mode when section is OFF */ + NRF_POWER_RAMPOWER_S0RETENTION = POWER_RAM_POWER_S0RETENTION_Pos, + NRF_POWER_RAMPOWER_S1RETENTION, /**< Keep section retention in OFF mode when section is OFF */ + NRF_POWER_RAMPOWER_S2RETENTION, /**< Keep section retention in OFF mode when section is OFF */ + NRF_POWER_RAMPOWER_S3RETENTION, /**< Keep section retention in OFF mode when section is OFF */ + NRF_POWER_RAMPOWER_S4RETENTION, /**< Keep section retention in OFF mode when section is OFF */ + NRF_POWER_RAMPOWER_S5RETENTION, /**< Keep section retention in OFF mode when section is OFF */ + NRF_POWER_RAMPOWER_S6RETENTION, /**< Keep section retention in OFF mode when section is OFF */ + NRF_POWER_RAMPOWER_S7RETENTION, /**< Keep section retention in OFF mode when section is OFF */ + NRF_POWER_RAMPOWER_S8RETENTION, /**< Keep section retention in OFF mode when section is OFF */ + NRF_POWER_RAMPOWER_S9RETENTION, /**< Keep section retention in OFF mode when section is OFF */ + NRF_POWER_RAMPOWER_S10RETENTION, /**< Keep section retention in OFF mode when section is OFF */ + NRF_POWER_RAMPOWER_S11RETENTION, /**< Keep section retention in OFF mode when section is OFF */ + NRF_POWER_RAMPOWER_S12RETENTION, /**< Keep section retention in OFF mode when section is OFF */ + NRF_POWER_RAMPOWER_S13RETENTION, /**< Keep section retention in OFF mode when section is OFF */ + NRF_POWER_RAMPOWER_S14RETENTION, /**< Keep section retention in OFF mode when section is OFF */ + NRF_POWER_RAMPOWER_S15RETENTION, /**< Keep section retention in OFF mode when section is OFF */ +}nrf_power_rampower_t; + +#if defined ( __CC_ARM ) +#pragma push +#pragma diag_suppress 66 +#endif +/** + * @brief Bit masks for RAMPOWER register + * + * All possible bits described, even if they are not used in selected MCU. + */ +typedef enum +{ + NRF_POWER_RAMPOWER_S0POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S0POWER , + NRF_POWER_RAMPOWER_S1POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S1POWER , + NRF_POWER_RAMPOWER_S2POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S2POWER , + NRF_POWER_RAMPOWER_S3POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S3POWER , + NRF_POWER_RAMPOWER_S4POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S4POWER , + NRF_POWER_RAMPOWER_S5POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S5POWER , + NRF_POWER_RAMPOWER_S7POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S7POWER , + NRF_POWER_RAMPOWER_S8POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S8POWER , + NRF_POWER_RAMPOWER_S9POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S9POWER , + NRF_POWER_RAMPOWER_S10POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S10POWER, + NRF_POWER_RAMPOWER_S11POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S11POWER, + NRF_POWER_RAMPOWER_S12POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S12POWER, + NRF_POWER_RAMPOWER_S13POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S13POWER, + NRF_POWER_RAMPOWER_S14POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S14POWER, + NRF_POWER_RAMPOWER_S15POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S15POWER, + + NRF_POWER_RAMPOWER_S0RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S0RETENTION , + NRF_POWER_RAMPOWER_S1RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S1RETENTION , + NRF_POWER_RAMPOWER_S2RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S2RETENTION , + NRF_POWER_RAMPOWER_S3RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S3RETENTION , + NRF_POWER_RAMPOWER_S4RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S4RETENTION , + NRF_POWER_RAMPOWER_S5RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S5RETENTION , + NRF_POWER_RAMPOWER_S7RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S7RETENTION , + NRF_POWER_RAMPOWER_S8RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S8RETENTION , + NRF_POWER_RAMPOWER_S9RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S9RETENTION , + NRF_POWER_RAMPOWER_S10RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S10RETENTION, + NRF_POWER_RAMPOWER_S11RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S11RETENTION, + NRF_POWER_RAMPOWER_S12RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S12RETENTION, + NRF_POWER_RAMPOWER_S13RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S13RETENTION, + NRF_POWER_RAMPOWER_S14RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S14RETENTION, + NRF_POWER_RAMPOWER_S15RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S15RETENTION, +}nrf_power_rampower_mask_t; +#if defined ( __CC_ARM ) +#pragma pop +#endif +#endif /* NRF_POWER_HAS_RAMPOWER_REGS */ + + +/** + * @brief Get reset reason mask + * + * Function returns the reset reason. + * Unless cleared, the RESETREAS register is cumulative. + * A field is cleared by writing '1' to it (see @ref nrf_power_resetreas_clear). + * If none of the reset sources are flagged, + * this indicates that the chip was reset from the on-chip reset generator, + * which indicates a power-on-reset or a brown out reset. + * + * @return The mask of reset reasons constructed with @ref nrf_power_resetreas_mask_t. + */ +__STATIC_INLINE uint32_t nrf_power_resetreas_get(void); + +/** + * @brief Clear selected reset reason field + * + * Function clears selected reset reason fields. + * + * @param[in] mask The mask constructed from @ref nrf_power_resetreas_mask_t enumerator values. + * @sa nrf_power_resetreas_get + */ +__STATIC_INLINE void nrf_power_resetreas_clear(uint32_t mask); + +#if NRF_POWER_HAS_RAMSTATUS +/** + * @brief Get RAMSTATUS register + * + * Returns the masks of RAM blocks that are powered ON. + * + * @return Value with bits sets according to masks in @ref nrf_power_ramblock_mask_t. + */ +__STATIC_INLINE uint32_t nrf_power_ramstatus_get(void); +#endif // NRF_POWER_HAS_RAMSTATUS + +/** + * @brief Go to system OFF + * + * This function puts the CPU into system off mode. + * The only way to wake up the CPU is by reset. + * + * @note This function never returns. + */ +__STATIC_INLINE void nrf_power_system_off(void); + +/** + * @brief Set power failure comparator configuration + * + * Sets power failure comparator threshold and enable/disable flag. + * + * @param enabled Set to true if power failure comparator should be enabled. + * @param thr Set the voltage threshold value. + * + * @note + * If VDDH settings is present in the device, this function would + * clear it settings (set to the lowest voltage). + * Use @ref nrf_power_pofcon_vddh_set function to set new value. + */ +__STATIC_INLINE void nrf_power_pofcon_set(bool enabled, nrf_power_pof_thr_t thr); + +/** + * @brief Get power failure comparator configuration + * + * Get power failure comparator threshold and enable bit. + * + * @param[out] p_enabled Function would set this boolean variable to true + * if power failure comparator is enabled. + * The pointer can be NULL if we do not need this information. + * @return Threshold setting for power failure comparator + */ +__STATIC_INLINE nrf_power_pof_thr_t nrf_power_pofcon_get(bool * p_enabled); + +#if NRF_POWER_HAS_VDDH +/** + * @brief Set VDDH power failure comparator threshold + * + * @param thr Threshold to be set + */ +__STATIC_INLINE void nrf_power_pofcon_vddh_set(nrf_power_pof_thrvddh_t thr); + +/** + * @brief Get VDDH power failure comparator threshold + * + * @return VDDH threshold currently configured + */ +__STATIC_INLINE nrf_power_pof_thrvddh_t nrf_power_pofcon_vddh_get(void); +#endif + +/** + * @brief Set general purpose retention register + * + * @param val Value to be set in the register + */ +__STATIC_INLINE void nrf_power_gpregret_set(uint8_t val); + +/** + * @brief Get general purpose retention register + * + * @return The value from the register + */ +__STATIC_INLINE uint8_t nrf_power_gpregret_get(void); + +#if defined(POWER_GPREGRET2_GPREGRET_Msk) || defined(__NRFX_DOXYGEN__) +/** + * @brief Set general purpose retention register 2 + * + * @param val Value to be set in the register + * @note This register is not available in nrf51 MCU family + */ +__STATIC_INLINE void nrf_power_gpregret2_set(uint8_t val); + +/** + * @brief Get general purpose retention register 2 + * + * @return The value from the register + * @note This register is not available in all MCUs. + */ +__STATIC_INLINE uint8_t nrf_power_gpregret2_get(void); +#endif + +/** + * @brief Enable or disable DCDC converter + * + * @param enable Set true to enable or false to disable DCDC converter. + * + * @note + * If the device consist of high voltage power input (VDDH) this setting + * would relate to the converter on low voltage side (1.3 V output). + */ +__STATIC_INLINE void nrf_power_dcdcen_set(bool enable); + +/** + * @brief Get the state of DCDC converter + * + * @retval true Converter is enabled + * @retval false Converter is disabled + * + * @note + * If the device consist of high voltage power input (VDDH) this setting + * would relate to the converter on low voltage side (1.3 V output). + */ +__STATIC_INLINE bool nrf_power_dcdcen_get(void); + +#if NRF_POWER_HAS_RAMPOWER_REGS +/** + * @brief Turn ON sections in selected RAM block. + * + * This function turns ON sections in block and also block retention. + * + * @sa nrf_power_rampower_mask_t + * @sa nrf_power_rampower_mask_off + * + * @param block RAM block index. + * @param section_mask Mask of the sections created by merging + * @ref nrf_power_rampower_mask_t flags. + */ +__STATIC_INLINE void nrf_power_rampower_mask_on(uint8_t block, uint32_t section_mask); + +/** + * @brief Turn ON sections in selected RAM block. + * + * This function turns OFF sections in block and also block retention. + * + * @sa nrf_power_rampower_mask_t + * @sa nrf_power_rampower_mask_off + * + * @param block RAM block index. + * @param section_mask Mask of the sections created by merging + * @ref nrf_power_rampower_mask_t flags. + */ +__STATIC_INLINE void nrf_power_rampower_mask_off(uint8_t block, uint32_t section_mask); + +/** + * @brief Get the mask of ON and retention sections in selected RAM block. + * + * @param block RAM block index. + * @return Mask of sections state composed from @ref nrf_power_rampower_mask_t flags. + */ +__STATIC_INLINE uint32_t nrf_power_rampower_mask_get(uint8_t block); +#endif /* NRF_POWER_HAS_RAMPOWER_REGS */ + +#if NRF_POWER_HAS_VDDH +/** + * @brief Enable of disable DCDC converter on VDDH + * + * @param enable Set true to enable or false to disable DCDC converter. + */ +__STATIC_INLINE void nrf_power_dcdcen_vddh_set(bool enable); + +/** + * @brief Get the state of DCDC converter on VDDH + * + * @retval true Converter is enabled + * @retval false Converter is disabled + */ +__STATIC_INLINE bool nrf_power_dcdcen_vddh_get(void); + +/** + * @brief Get main supply status + * + * @return Current main supply status + */ +__STATIC_INLINE nrf_power_mainregstatus_t nrf_power_mainregstatus_get(void); +#endif /* NRF_POWER_HAS_VDDH */ + +#if NRF_POWER_HAS_USBREG +/** + * + * @return Get the whole USBREGSTATUS register + * + * @return The USBREGSTATUS register value. + * Use @ref nrf_power_usbregstatus_mask_t values for bit masking. + * + * @sa nrf_power_usbregstatus_vbusdet_get + * @sa nrf_power_usbregstatus_outrdy_get + */ +__STATIC_INLINE uint32_t nrf_power_usbregstatus_get(void); + +/** + * @brief VBUS input detection status + * + * USBDETECTED and USBREMOVED events are derived from this information + * + * @retval false VBUS voltage below valid threshold + * @retval true VBUS voltage above valid threshold + * + * @sa nrf_power_usbregstatus_get + */ +__STATIC_INLINE bool nrf_power_usbregstatus_vbusdet_get(void); + +/** + * @brief USB supply output settling time elapsed + * + * @retval false USBREG output settling time not elapsed + * @retval true USBREG output settling time elapsed + * (same information as USBPWRRDY event) + * + * @sa nrf_power_usbregstatus_get + */ +__STATIC_INLINE bool nrf_power_usbregstatus_outrdy_get(void); +#endif /* NRF_POWER_HAS_USBREG */ + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE uint32_t nrf_power_resetreas_get(void) +{ + return NRF_POWER->RESETREAS; +} + +__STATIC_INLINE void nrf_power_resetreas_clear(uint32_t mask) +{ + NRF_POWER->RESETREAS = mask; +} + +#if NRF_POWER_HAS_RAMSTATUS +__STATIC_INLINE uint32_t nrf_power_ramstatus_get(void) +{ + return NRF_POWER->RAMSTATUS; +} +#endif // NRF_POWER_HAS_RAMSTATUS + +__STATIC_INLINE void nrf_power_system_off(void) +{ + NRF_POWER->SYSTEMOFF = POWER_SYSTEMOFF_SYSTEMOFF_Enter; + __DSB(); + + /* Solution for simulated System OFF in debug mode */ + while (true) + { + __WFE(); + } +} + +__STATIC_INLINE void nrf_power_pofcon_set(bool enabled, nrf_power_pof_thr_t thr) +{ + NRFX_ASSERT(thr == (thr & (POWER_POFCON_THRESHOLD_Msk >> POWER_POFCON_THRESHOLD_Pos))); +#if NRF_POWER_HAS_VDDH + uint32_t pofcon = NRF_POWER->POFCON; + pofcon &= ~(POWER_POFCON_THRESHOLD_Msk | POWER_POFCON_POF_Msk); + pofcon |= +#else /* NRF_POWER_HAS_VDDH */ + NRF_POWER->POFCON = +#endif + (((uint32_t)thr) << POWER_POFCON_THRESHOLD_Pos) | + (enabled ? + (POWER_POFCON_POF_Enabled << POWER_POFCON_POF_Pos) + : + (POWER_POFCON_POF_Disabled << POWER_POFCON_POF_Pos)); +#if NRF_POWER_HAS_VDDH + NRF_POWER->POFCON = pofcon; +#endif +} + +__STATIC_INLINE nrf_power_pof_thr_t nrf_power_pofcon_get(bool * p_enabled) +{ + uint32_t pofcon = NRF_POWER->POFCON; + if (NULL != p_enabled) + { + (*p_enabled) = ((pofcon & POWER_POFCON_POF_Msk) >> POWER_POFCON_POF_Pos) + == POWER_POFCON_POF_Enabled; + } + return (nrf_power_pof_thr_t)((pofcon & POWER_POFCON_THRESHOLD_Msk) >> + POWER_POFCON_THRESHOLD_Pos); +} + +#if NRF_POWER_HAS_VDDH +__STATIC_INLINE void nrf_power_pofcon_vddh_set(nrf_power_pof_thrvddh_t thr) +{ + NRFX_ASSERT(thr == (thr & (POWER_POFCON_THRESHOLDVDDH_Msk >> POWER_POFCON_THRESHOLDVDDH_Pos))); + uint32_t pofcon = NRF_POWER->POFCON; + pofcon &= ~POWER_POFCON_THRESHOLDVDDH_Msk; + pofcon |= (((uint32_t)thr) << POWER_POFCON_THRESHOLDVDDH_Pos); + NRF_POWER->POFCON = pofcon; +} + +__STATIC_INLINE nrf_power_pof_thrvddh_t nrf_power_pofcon_vddh_get(void) +{ + return (nrf_power_pof_thrvddh_t)((NRF_POWER->POFCON & + POWER_POFCON_THRESHOLDVDDH_Msk) >> POWER_POFCON_THRESHOLDVDDH_Pos); +} +#endif /* NRF_POWER_HAS_VDDH */ + +__STATIC_INLINE void nrf_power_gpregret_set(uint8_t val) +{ + NRF_POWER->GPREGRET = val; +} + +__STATIC_INLINE uint8_t nrf_power_gpregret_get(void) +{ + return NRF_POWER->GPREGRET; +} + +#if defined(POWER_GPREGRET2_GPREGRET_Msk) || defined(__NRFX_DOXYGEN__) +void nrf_power_gpregret2_set(uint8_t val) +{ + NRF_POWER->GPREGRET2 = val; +} + +__STATIC_INLINE uint8_t nrf_power_gpregret2_get(void) +{ + return NRF_POWER->GPREGRET2; +} +#endif + +__STATIC_INLINE void nrf_power_dcdcen_set(bool enable) +{ +#if NRF_POWER_HAS_VDDH + NRF_POWER->DCDCEN = (enable ? + POWER_DCDCEN_DCDCEN_Enabled : POWER_DCDCEN_DCDCEN_Disabled) << + POWER_DCDCEN_DCDCEN_Pos; +#else + NRF_POWER->DCDCEN = (enable ? + POWER_DCDCEN_DCDCEN_Enabled : POWER_DCDCEN_DCDCEN_Disabled) << + POWER_DCDCEN_DCDCEN_Pos; +#endif +} + +__STATIC_INLINE bool nrf_power_dcdcen_get(void) +{ +#if NRF_POWER_HAS_VDDH + return (NRF_POWER->DCDCEN & POWER_DCDCEN_DCDCEN_Msk) + == + (POWER_DCDCEN_DCDCEN_Enabled << POWER_DCDCEN_DCDCEN_Pos); +#else + return (NRF_POWER->DCDCEN & POWER_DCDCEN_DCDCEN_Msk) + == + (POWER_DCDCEN_DCDCEN_Enabled << POWER_DCDCEN_DCDCEN_Pos); +#endif +} + +#if NRF_POWER_HAS_RAMPOWER_REGS +__STATIC_INLINE void nrf_power_rampower_mask_on(uint8_t block, uint32_t section_mask) +{ + NRFX_ASSERT(block < ARRAY_SIZE(NRF_POWER->RAM)); + NRF_POWER->RAM[block].POWERSET = section_mask; +} + +__STATIC_INLINE void nrf_power_rampower_mask_off(uint8_t block, uint32_t section_mask) +{ + NRFX_ASSERT(block < ARRAY_SIZE(NRF_POWER->RAM)); + NRF_POWER->RAM[block].POWERCLR = section_mask; +} + +__STATIC_INLINE uint32_t nrf_power_rampower_mask_get(uint8_t block) +{ + NRFX_ASSERT(block < ARRAY_SIZE(NRF_POWER->RAM)); + return NRF_POWER->RAM[block].POWER; +} +#endif /* NRF_POWER_HAS_RAMPOWER_REGS */ + +#if NRF_POWER_HAS_VDDH +__STATIC_INLINE void nrf_power_dcdcen_vddh_set(bool enable) +{ + NRF_POWER->DCDCEN0 = (enable ? + POWER_DCDCEN0_DCDCEN_Enabled : POWER_DCDCEN0_DCDCEN_Disabled) << + POWER_DCDCEN0_DCDCEN_Pos; +} + +bool nrf_power_dcdcen_vddh_get(void) +{ + return (NRF_POWER->DCDCEN0 & POWER_DCDCEN0_DCDCEN_Msk) + == + (POWER_DCDCEN0_DCDCEN_Enabled << POWER_DCDCEN0_DCDCEN_Pos); +} + +nrf_power_mainregstatus_t nrf_power_mainregstatus_get(void) +{ + return (nrf_power_mainregstatus_t)(((NRF_POWER->MAINREGSTATUS) & + POWER_MAINREGSTATUS_MAINREGSTATUS_Msk) >> + POWER_MAINREGSTATUS_MAINREGSTATUS_Pos); +} +#endif /* NRF_POWER_HAS_VDDH */ + +#if NRF_POWER_HAS_USBREG +__STATIC_INLINE uint32_t nrf_power_usbregstatus_get(void) +{ + return NRF_POWER->USBREGSTATUS; +} + +__STATIC_INLINE bool nrf_power_usbregstatus_vbusdet_get(void) +{ + return (nrf_power_usbregstatus_get() & + NRF_POWER_USBREGSTATUS_VBUSDETECT_MASK) != 0; +} + +__STATIC_INLINE bool nrf_power_usbregstatus_outrdy_get(void) +{ + return (nrf_power_usbregstatus_get() & + NRF_POWER_USBREGSTATUS_OUTPUTRDY_MASK) != 0; +} +#endif /* NRF_POWER_HAS_USBREG */ + +#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_POWER_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_ppi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_ppi.h new file mode 100644 index 00000000000..cdface55e0c --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_ppi.h @@ -0,0 +1,481 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_PPI_H__ +#define NRF_PPI_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_ppi_hal PPI HAL + * @{ + * @ingroup nrf_ppi + * @brief Hardware access layer for managing the Programmable Peripheral Interconnect (PPI) + * channels. + */ + +#define NRF_PPI_TASK_SET (1UL) + +/** + * @enum nrf_ppi_channel_t + * @brief PPI channels. + */ +typedef enum +{ + NRF_PPI_CHANNEL0 = PPI_CHEN_CH0_Pos, /**< Channel 0. */ + NRF_PPI_CHANNEL1 = PPI_CHEN_CH1_Pos, /**< Channel 1. */ + NRF_PPI_CHANNEL2 = PPI_CHEN_CH2_Pos, /**< Channel 2. */ + NRF_PPI_CHANNEL3 = PPI_CHEN_CH3_Pos, /**< Channel 3. */ + NRF_PPI_CHANNEL4 = PPI_CHEN_CH4_Pos, /**< Channel 4. */ + NRF_PPI_CHANNEL5 = PPI_CHEN_CH5_Pos, /**< Channel 5. */ + NRF_PPI_CHANNEL6 = PPI_CHEN_CH6_Pos, /**< Channel 6. */ + NRF_PPI_CHANNEL7 = PPI_CHEN_CH7_Pos, /**< Channel 7. */ + NRF_PPI_CHANNEL8 = PPI_CHEN_CH8_Pos, /**< Channel 8. */ + NRF_PPI_CHANNEL9 = PPI_CHEN_CH9_Pos, /**< Channel 9. */ + NRF_PPI_CHANNEL10 = PPI_CHEN_CH10_Pos, /**< Channel 10. */ + NRF_PPI_CHANNEL11 = PPI_CHEN_CH11_Pos, /**< Channel 11. */ + NRF_PPI_CHANNEL12 = PPI_CHEN_CH12_Pos, /**< Channel 12. */ + NRF_PPI_CHANNEL13 = PPI_CHEN_CH13_Pos, /**< Channel 13. */ + NRF_PPI_CHANNEL14 = PPI_CHEN_CH14_Pos, /**< Channel 14. */ + NRF_PPI_CHANNEL15 = PPI_CHEN_CH15_Pos, /**< Channel 15. */ +#if (PPI_CH_NUM > 16) || defined(__NRFX_DOXYGEN__) + NRF_PPI_CHANNEL16 = PPI_CHEN_CH16_Pos, /**< Channel 16. */ + NRF_PPI_CHANNEL17 = PPI_CHEN_CH17_Pos, /**< Channel 17. */ + NRF_PPI_CHANNEL18 = PPI_CHEN_CH18_Pos, /**< Channel 18. */ + NRF_PPI_CHANNEL19 = PPI_CHEN_CH19_Pos, /**< Channel 19. */ +#endif + NRF_PPI_CHANNEL20 = PPI_CHEN_CH20_Pos, /**< Channel 20. */ + NRF_PPI_CHANNEL21 = PPI_CHEN_CH21_Pos, /**< Channel 21. */ + NRF_PPI_CHANNEL22 = PPI_CHEN_CH22_Pos, /**< Channel 22. */ + NRF_PPI_CHANNEL23 = PPI_CHEN_CH23_Pos, /**< Channel 23. */ + NRF_PPI_CHANNEL24 = PPI_CHEN_CH24_Pos, /**< Channel 24. */ + NRF_PPI_CHANNEL25 = PPI_CHEN_CH25_Pos, /**< Channel 25. */ + NRF_PPI_CHANNEL26 = PPI_CHEN_CH26_Pos, /**< Channel 26. */ + NRF_PPI_CHANNEL27 = PPI_CHEN_CH27_Pos, /**< Channel 27. */ + NRF_PPI_CHANNEL28 = PPI_CHEN_CH28_Pos, /**< Channel 28. */ + NRF_PPI_CHANNEL29 = PPI_CHEN_CH29_Pos, /**< Channel 29. */ + NRF_PPI_CHANNEL30 = PPI_CHEN_CH30_Pos, /**< Channel 30. */ + NRF_PPI_CHANNEL31 = PPI_CHEN_CH31_Pos /**< Channel 31. */ +} nrf_ppi_channel_t; + +/** + * @enum nrf_ppi_channel_group_t + * @brief PPI channel groups. + */ +typedef enum +{ + NRF_PPI_CHANNEL_GROUP0 = 0, /**< Channel group 0. */ + NRF_PPI_CHANNEL_GROUP1 = 1, /**< Channel group 1. */ + NRF_PPI_CHANNEL_GROUP2 = 2, /**< Channel group 2. */ + NRF_PPI_CHANNEL_GROUP3 = 3, /**< Channel group 3. */ +#if (PPI_GROUP_NUM > 4) || defined(__NRFX_DOXYGEN__) + NRF_PPI_CHANNEL_GROUP4 = 4, /**< Channel group 4. */ + NRF_PPI_CHANNEL_GROUP5 = 5 /**< Channel group 5. */ +#endif +} nrf_ppi_channel_group_t; + +/** + * @enum nrf_ppi_channel_include_t + * @brief Definition of which PPI channels belong to a group. + */ +typedef enum +{ + NRF_PPI_CHANNEL_EXCLUDE = PPI_CHG_CH0_Excluded, /**< Channel excluded from a group. */ + NRF_PPI_CHANNEL_INCLUDE = PPI_CHG_CH0_Included /**< Channel included in a group. */ +} nrf_ppi_channel_include_t; + +/** + * @enum nrf_ppi_channel_enable_t + * @brief Definition if a PPI channel is enabled. + */ +typedef enum +{ + NRF_PPI_CHANNEL_DISABLED = PPI_CHEN_CH0_Disabled, /**< Channel disabled. */ + NRF_PPI_CHANNEL_ENABLED = PPI_CHEN_CH0_Enabled /**< Channel enabled. */ +} nrf_ppi_channel_enable_t; + +/** + * @enum nrf_ppi_task_t + * @brief PPI tasks. + */ +typedef enum +{ + /*lint -save -e30 -esym(628,__INTADDR__)*/ + NRF_PPI_TASK_CHG0_EN = offsetof(NRF_PPI_Type, TASKS_CHG[0].EN), /**< Task for enabling channel group 0 */ + NRF_PPI_TASK_CHG0_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[0].DIS), /**< Task for disabling channel group 0 */ + NRF_PPI_TASK_CHG1_EN = offsetof(NRF_PPI_Type, TASKS_CHG[1].EN), /**< Task for enabling channel group 1 */ + NRF_PPI_TASK_CHG1_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[1].DIS), /**< Task for disabling channel group 1 */ + NRF_PPI_TASK_CHG2_EN = offsetof(NRF_PPI_Type, TASKS_CHG[2].EN), /**< Task for enabling channel group 2 */ + NRF_PPI_TASK_CHG2_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[2].DIS), /**< Task for disabling channel group 2 */ + NRF_PPI_TASK_CHG3_EN = offsetof(NRF_PPI_Type, TASKS_CHG[3].EN), /**< Task for enabling channel group 3 */ + NRF_PPI_TASK_CHG3_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[3].DIS), /**< Task for disabling channel group 3 */ +#if (PPI_GROUP_NUM > 4) || defined(__NRFX_DOXYGEN__) + NRF_PPI_TASK_CHG4_EN = offsetof(NRF_PPI_Type, TASKS_CHG[4].EN), /**< Task for enabling channel group 4 */ + NRF_PPI_TASK_CHG4_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[4].DIS), /**< Task for disabling channel group 4 */ + NRF_PPI_TASK_CHG5_EN = offsetof(NRF_PPI_Type, TASKS_CHG[5].EN), /**< Task for enabling channel group 5 */ + NRF_PPI_TASK_CHG5_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[5].DIS) /**< Task for disabling channel group 5 */ +#endif + /*lint -restore*/ +} nrf_ppi_task_t; + +/** + * @brief Function for enabling a given PPI channel. + * + * @details This function enables only one channel. + * + * @param[in] channel Channel to enable. + * + * */ +__STATIC_INLINE void nrf_ppi_channel_enable(nrf_ppi_channel_t channel); + +/** + * @brief Function for disabling a given PPI channel. + * + * @details This function disables only one channel. + * + * @param[in] channel Channel to disable. + */ +__STATIC_INLINE void nrf_ppi_channel_disable(nrf_ppi_channel_t channel); + +/** + * @brief Function for checking if a given PPI channel is enabled. + * + * @details This function checks only one channel. + * + * @param[in] channel Channel to check. + * + * @retval NRF_PPI_CHANNEL_ENABLED If the channel is enabled. + * @retval NRF_PPI_CHANNEL_DISABLED If the channel is not enabled. + * + */ +__STATIC_INLINE nrf_ppi_channel_enable_t nrf_ppi_channel_enable_get(nrf_ppi_channel_t channel); + +/** + * @brief Function for disabling all PPI channels. + */ +__STATIC_INLINE void nrf_ppi_channel_disable_all(void); + +/** + * @brief Function for disabling multiple PPI channels. + * + * @param[in] mask Channel mask. + */ +__STATIC_INLINE void nrf_ppi_channels_disable(uint32_t mask); + +/** + * @brief Function for setting up event and task endpoints for a given PPI channel. + * + * @param[in] eep Event register address. + * + * @param[in] tep Task register address. + * + * @param[in] channel Channel to which the given endpoints are assigned. + */ +__STATIC_INLINE void nrf_ppi_channel_endpoint_setup(nrf_ppi_channel_t channel, + uint32_t eep, + uint32_t tep); + +#if defined(PPI_FEATURE_FORKS_PRESENT) || defined(__NRFX_DOXYGEN__) +/** + * @brief Function for setting up task endpoint for a given PPI fork. + * + * @param[in] fork_tep Task register address. + * + * @param[in] channel Channel to which the given fork endpoint is assigned. + */ +__STATIC_INLINE void nrf_ppi_fork_endpoint_setup(nrf_ppi_channel_t channel, + uint32_t fork_tep); + +/** + * @brief Function for setting up event and task endpoints for a given PPI channel and fork. + * + * @param[in] eep Event register address. + * + * @param[in] tep Task register address. + * + * @param[in] fork_tep Fork task register address (register value). + * + * @param[in] channel Channel to which the given endpoints are assigned. + */ +__STATIC_INLINE void nrf_ppi_channel_and_fork_endpoint_setup(nrf_ppi_channel_t channel, + uint32_t eep, + uint32_t tep, + uint32_t fork_tep); +#endif + +/** + * @brief Function for including a PPI channel in a channel group. + * + * @details This function adds only one channel to the group. + * + * @param[in] channel Channel to be included in the group. + * + * @param[in] channel_group Channel group. + * + */ +__STATIC_INLINE void nrf_ppi_channel_include_in_group(nrf_ppi_channel_t channel, + nrf_ppi_channel_group_t channel_group); + +/** + * @brief Function for including multiple PPI channels in a channel group. + * + * @details This function adds all specified channels to the group. + * + * @param[in] channel_mask Channels to be included in the group. + * + * @param[in] channel_group Channel group. + * + */ +__STATIC_INLINE void nrf_ppi_channels_include_in_group(uint32_t channel_mask, + nrf_ppi_channel_group_t channel_group); + +/** + * @brief Function for removing a PPI channel from a channel group. + * + * @details This function removes only one channel from the group. + * + * @param[in] channel Channel to be removed from the group. + * + * @param[in] channel_group Channel group. + */ +__STATIC_INLINE void nrf_ppi_channel_remove_from_group(nrf_ppi_channel_t channel, + nrf_ppi_channel_group_t channel_group); + +/** + * @brief Function for removing multiple PPI channels from a channel group. + * + * @details This function removes all specified channels from the group. + * + * @param[in] channel_mask Channels to be removed from the group. + * + * @param[in] channel_group Channel group. + */ +__STATIC_INLINE void nrf_ppi_channels_remove_from_group(uint32_t channel_mask, + nrf_ppi_channel_group_t channel_group); + +/** + * @brief Function for removing all PPI channels from a channel group. + * + * @param[in] group Channel group. + * + */ +__STATIC_INLINE void nrf_ppi_channel_group_clear(nrf_ppi_channel_group_t group); + +/** + * @brief Function for enabling a channel group. + * + * @param[in] group Channel group. + * + */ +__STATIC_INLINE void nrf_ppi_group_enable(nrf_ppi_channel_group_t group); + +/** + * @brief Function for disabling a channel group. + * + * @param[in] group Channel group. + * + */ +__STATIC_INLINE void nrf_ppi_group_disable(nrf_ppi_channel_group_t group); + +/** + * @brief Function for setting a PPI task. + * + * @param[in] ppi_task PPI task to set. + */ +__STATIC_INLINE void nrf_ppi_task_trigger(nrf_ppi_task_t ppi_task); + +/** + * @brief Function for returning the address of a specific PPI task register. + * + * @param[in] ppi_task PPI task. + */ +__STATIC_INLINE uint32_t * nrf_ppi_task_address_get(nrf_ppi_task_t ppi_task); + +/** + * @brief Function for returning the PPI enable task address of a specific group. + * + * @param[in] group PPI group. + */ +__STATIC_INLINE uint32_t * nrf_ppi_task_group_enable_address_get(nrf_ppi_channel_group_t group); + +/** + * @brief Function for returning the PPI disable task address of a specific group. + * + * @param[in] group PPI group. + */ +__STATIC_INLINE uint32_t * nrf_ppi_task_group_disable_address_get(nrf_ppi_channel_group_t group); + + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE void nrf_ppi_channel_enable(nrf_ppi_channel_t channel) +{ + NRF_PPI->CHENSET = PPI_CHENSET_CH0_Set << ((uint32_t) channel); +} + +__STATIC_INLINE void nrf_ppi_channel_disable(nrf_ppi_channel_t channel) +{ + NRF_PPI->CHENCLR = PPI_CHENCLR_CH0_Clear << ((uint32_t) channel); +} + +__STATIC_INLINE nrf_ppi_channel_enable_t nrf_ppi_channel_enable_get(nrf_ppi_channel_t channel) +{ + if (NRF_PPI->CHEN & (PPI_CHEN_CH0_Msk << ((uint32_t) channel))) + { + return NRF_PPI_CHANNEL_ENABLED; + } + else + { + return NRF_PPI_CHANNEL_DISABLED; + } +} + +__STATIC_INLINE void nrf_ppi_channel_disable_all(void) +{ + NRF_PPI->CHENCLR = ((uint32_t)0xFFFFFFFFuL); +} + +__STATIC_INLINE void nrf_ppi_channels_disable(uint32_t mask) +{ + NRF_PPI->CHENCLR = mask; +} + +__STATIC_INLINE void nrf_ppi_channel_endpoint_setup(nrf_ppi_channel_t channel, + uint32_t eep, + uint32_t tep) +{ + NRF_PPI->CH[(uint32_t) channel].EEP = eep; + NRF_PPI->CH[(uint32_t) channel].TEP = tep; +} + +#if defined(PPI_FEATURE_FORKS_PRESENT) + +__STATIC_INLINE void nrf_ppi_fork_endpoint_setup(nrf_ppi_channel_t channel, + uint32_t fork_tep) +{ + NRF_PPI->FORK[(uint32_t) channel].TEP = fork_tep; +} + +__STATIC_INLINE void nrf_ppi_channel_and_fork_endpoint_setup(nrf_ppi_channel_t channel, + uint32_t eep, + uint32_t tep, + uint32_t fork_tep) +{ + nrf_ppi_channel_endpoint_setup(channel, eep, tep); + nrf_ppi_fork_endpoint_setup(channel, fork_tep); +} +#endif + +__STATIC_INLINE void nrf_ppi_channel_include_in_group(nrf_ppi_channel_t channel, + nrf_ppi_channel_group_t channel_group) +{ + NRF_PPI->CHG[(uint32_t) channel_group] = + NRF_PPI->CHG[(uint32_t) channel_group] | (PPI_CHG_CH0_Included << ((uint32_t) channel)); +} + +__STATIC_INLINE void nrf_ppi_channels_include_in_group(uint32_t channel_mask, + nrf_ppi_channel_group_t channel_group) +{ + NRF_PPI->CHG[(uint32_t) channel_group] = + NRF_PPI->CHG[(uint32_t) channel_group] | (channel_mask); +} + +__STATIC_INLINE void nrf_ppi_channel_remove_from_group(nrf_ppi_channel_t channel, + nrf_ppi_channel_group_t channel_group) +{ + NRF_PPI->CHG[(uint32_t) channel_group] = + NRF_PPI->CHG[(uint32_t) channel_group] & ~(PPI_CHG_CH0_Included << ((uint32_t) channel)); +} + +__STATIC_INLINE void nrf_ppi_channels_remove_from_group(uint32_t channel_mask, + nrf_ppi_channel_group_t channel_group) +{ + NRF_PPI->CHG[(uint32_t) channel_group] = + NRF_PPI->CHG[(uint32_t) channel_group] & ~(channel_mask); +} + +__STATIC_INLINE void nrf_ppi_channel_group_clear(nrf_ppi_channel_group_t group) +{ + NRF_PPI->CHG[(uint32_t) group] = 0; +} + +__STATIC_INLINE void nrf_ppi_group_enable(nrf_ppi_channel_group_t group) +{ + NRF_PPI->TASKS_CHG[(uint32_t) group].EN = NRF_PPI_TASK_SET; +} + +__STATIC_INLINE void nrf_ppi_group_disable(nrf_ppi_channel_group_t group) +{ + NRF_PPI->TASKS_CHG[(uint32_t) group].DIS = NRF_PPI_TASK_SET; +} + +__STATIC_INLINE void nrf_ppi_task_trigger(nrf_ppi_task_t ppi_task) +{ + *((volatile uint32_t *) ((uint8_t *) NRF_PPI_BASE + (uint32_t) ppi_task)) = NRF_PPI_TASK_SET; +} + +__STATIC_INLINE uint32_t * nrf_ppi_task_address_get(nrf_ppi_task_t ppi_task) +{ + return (uint32_t *) ((uint8_t *) NRF_PPI_BASE + (uint32_t) ppi_task); +} + +__STATIC_INLINE uint32_t * nrf_ppi_task_group_enable_address_get(nrf_ppi_channel_group_t group) +{ + return (uint32_t *) &NRF_PPI->TASKS_CHG[(uint32_t) group].EN; +} + +__STATIC_INLINE uint32_t * nrf_ppi_task_group_disable_address_get(nrf_ppi_channel_group_t group) +{ + return (uint32_t *) &NRF_PPI->TASKS_CHG[(uint32_t) group].DIS; +} + +#endif // SUPPRESS_INLINE_IMPLEMENTATION + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_PPI_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_pwm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_pwm.h new file mode 100644 index 00000000000..6c576126b34 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_pwm.h @@ -0,0 +1,694 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_PWM_H__ +#define NRF_PWM_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_pwm_hal PWM HAL + * @{ + * @ingroup nrf_pwm + * @brief Hardware access layer for managing the Pulse Width Modulation (PWM) peripheral. + */ + +/** + * @brief This value can be provided as a parameter for the @ref nrf_pwm_pins_set + * function call to specify that a given output channel shall not be + * connected to a physical pin. + */ +#define NRF_PWM_PIN_NOT_CONNECTED 0xFFFFFFFF + +/** + * @brief Number of channels in each Pointer to the peripheral registers structure. + */ +#define NRF_PWM_CHANNEL_COUNT 4 + + +/** + * @brief PWM tasks. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_PWM_TASK_STOP = offsetof(NRF_PWM_Type, TASKS_STOP), ///< Stops PWM pulse generation on all channels at the end of the current PWM period, and stops the sequence playback. + NRF_PWM_TASK_SEQSTART0 = offsetof(NRF_PWM_Type, TASKS_SEQSTART[0]), ///< Starts playback of sequence 0. + NRF_PWM_TASK_SEQSTART1 = offsetof(NRF_PWM_Type, TASKS_SEQSTART[1]), ///< Starts playback of sequence 1. + NRF_PWM_TASK_NEXTSTEP = offsetof(NRF_PWM_Type, TASKS_NEXTSTEP) ///< Steps by one value in the current sequence if the decoder is set to @ref NRF_PWM_STEP_TRIGGERED mode. + /*lint -restore*/ +} nrf_pwm_task_t; + +/** + * @brief PWM events. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_PWM_EVENT_STOPPED = offsetof(NRF_PWM_Type, EVENTS_STOPPED), ///< Response to STOP task, emitted when PWM pulses are no longer generated. + NRF_PWM_EVENT_SEQSTARTED0 = offsetof(NRF_PWM_Type, EVENTS_SEQSTARTED[0]), ///< First PWM period started on sequence 0. + NRF_PWM_EVENT_SEQSTARTED1 = offsetof(NRF_PWM_Type, EVENTS_SEQSTARTED[1]), ///< First PWM period started on sequence 1. + NRF_PWM_EVENT_SEQEND0 = offsetof(NRF_PWM_Type, EVENTS_SEQEND[0]), ///< Emitted at the end of every sequence 0 when its last value has been read from RAM. + NRF_PWM_EVENT_SEQEND1 = offsetof(NRF_PWM_Type, EVENTS_SEQEND[1]), ///< Emitted at the end of every sequence 1 when its last value has been read from RAM. + NRF_PWM_EVENT_PWMPERIODEND = offsetof(NRF_PWM_Type, EVENTS_PWMPERIODEND), ///< Emitted at the end of each PWM period. + NRF_PWM_EVENT_LOOPSDONE = offsetof(NRF_PWM_Type, EVENTS_LOOPSDONE) ///< Concatenated sequences have been played the requested number of times. + /*lint -restore*/ +} nrf_pwm_event_t; + +/** + * @brief PWM interrupts. + */ +typedef enum +{ + NRF_PWM_INT_STOPPED_MASK = PWM_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event. + NRF_PWM_INT_SEQSTARTED0_MASK = PWM_INTENSET_SEQSTARTED0_Msk, ///< Interrupt on SEQSTARTED[0] event. + NRF_PWM_INT_SEQSTARTED1_MASK = PWM_INTENSET_SEQSTARTED1_Msk, ///< Interrupt on SEQSTARTED[1] event. + NRF_PWM_INT_SEQEND0_MASK = PWM_INTENSET_SEQEND0_Msk, ///< Interrupt on SEQEND[0] event. + NRF_PWM_INT_SEQEND1_MASK = PWM_INTENSET_SEQEND1_Msk, ///< Interrupt on SEQEND[1] event. + NRF_PWM_INT_PWMPERIODEND_MASK = PWM_INTENSET_PWMPERIODEND_Msk, ///< Interrupt on PWMPERIODEND event. + NRF_PWM_INT_LOOPSDONE_MASK = PWM_INTENSET_LOOPSDONE_Msk ///< Interrupt on LOOPSDONE event. +} nrf_pwm_int_mask_t; + +/** + * @brief PWM shortcuts. + */ +typedef enum +{ + NRF_PWM_SHORT_SEQEND0_STOP_MASK = PWM_SHORTS_SEQEND0_STOP_Msk, ///< Shortcut between SEQEND[0] event and STOP task. + NRF_PWM_SHORT_SEQEND1_STOP_MASK = PWM_SHORTS_SEQEND1_STOP_Msk, ///< Shortcut between SEQEND[1] event and STOP task. + NRF_PWM_SHORT_LOOPSDONE_SEQSTART0_MASK = PWM_SHORTS_LOOPSDONE_SEQSTART0_Msk, ///< Shortcut between LOOPSDONE event and SEQSTART[0] task. + NRF_PWM_SHORT_LOOPSDONE_SEQSTART1_MASK = PWM_SHORTS_LOOPSDONE_SEQSTART1_Msk, ///< Shortcut between LOOPSDONE event and SEQSTART[1] task. + NRF_PWM_SHORT_LOOPSDONE_STOP_MASK = PWM_SHORTS_LOOPSDONE_STOP_Msk ///< Shortcut between LOOPSDONE event and STOP task. +} nrf_pwm_short_mask_t; + +/** + * @brief PWM modes of operation. + */ +typedef enum +{ + NRF_PWM_MODE_UP = PWM_MODE_UPDOWN_Up, ///< Up counter (edge-aligned PWM duty cycle). + NRF_PWM_MODE_UP_AND_DOWN = PWM_MODE_UPDOWN_UpAndDown, ///< Up and down counter (center-aligned PWM duty cycle). +} nrf_pwm_mode_t; + +/** + * @brief PWM base clock frequencies. + */ +typedef enum +{ + NRF_PWM_CLK_16MHz = PWM_PRESCALER_PRESCALER_DIV_1, ///< 16 MHz / 1 = 16 MHz. + NRF_PWM_CLK_8MHz = PWM_PRESCALER_PRESCALER_DIV_2, ///< 16 MHz / 2 = 8 MHz. + NRF_PWM_CLK_4MHz = PWM_PRESCALER_PRESCALER_DIV_4, ///< 16 MHz / 4 = 4 MHz. + NRF_PWM_CLK_2MHz = PWM_PRESCALER_PRESCALER_DIV_8, ///< 16 MHz / 8 = 2 MHz. + NRF_PWM_CLK_1MHz = PWM_PRESCALER_PRESCALER_DIV_16, ///< 16 MHz / 16 = 1 MHz. + NRF_PWM_CLK_500kHz = PWM_PRESCALER_PRESCALER_DIV_32, ///< 16 MHz / 32 = 500 kHz. + NRF_PWM_CLK_250kHz = PWM_PRESCALER_PRESCALER_DIV_64, ///< 16 MHz / 64 = 250 kHz. + NRF_PWM_CLK_125kHz = PWM_PRESCALER_PRESCALER_DIV_128 ///< 16 MHz / 128 = 125 kHz. +} nrf_pwm_clk_t; + +/** + * @brief PWM decoder load modes. + * + * The selected mode determines how the sequence data is read from RAM and + * spread to the compare registers. + */ +typedef enum +{ + NRF_PWM_LOAD_COMMON = PWM_DECODER_LOAD_Common, ///< 1st half word (16-bit) used in all PWM channels (0-3). + NRF_PWM_LOAD_GROUPED = PWM_DECODER_LOAD_Grouped, ///< 1st half word (16-bit) used in channels 0 and 1; 2nd word in channels 2 and 3. + NRF_PWM_LOAD_INDIVIDUAL = PWM_DECODER_LOAD_Individual, ///< 1st half word (16-bit) used in channel 0; 2nd in channel 1; 3rd in channel 2; 4th in channel 3. + NRF_PWM_LOAD_WAVE_FORM = PWM_DECODER_LOAD_WaveForm ///< 1st half word (16-bit) used in channel 0; 2nd in channel 1; ... ; 4th as the top value for the pulse generator counter. +} nrf_pwm_dec_load_t; + +/** + * @brief PWM decoder next step modes. + * + * The selected mode determines when the next value from the active sequence + * is loaded. + */ +typedef enum +{ + NRF_PWM_STEP_AUTO = PWM_DECODER_MODE_RefreshCount, ///< Automatically after the current value is played and repeated the requested number of times. + NRF_PWM_STEP_TRIGGERED = PWM_DECODER_MODE_NextStep ///< When the @ref NRF_PWM_TASK_NEXTSTEP task is triggered. +} nrf_pwm_dec_step_t; + + +/** + * @brief Type used for defining duty cycle values for a sequence + * loaded in @ref NRF_PWM_LOAD_COMMON mode. + */ +typedef uint16_t nrf_pwm_values_common_t; + +/** + * @brief Structure for defining duty cycle values for a sequence + * loaded in @ref NRF_PWM_LOAD_GROUPED mode. + */ +typedef struct { + uint16_t group_0; ///< Duty cycle value for group 0 (channels 0 and 1). + uint16_t group_1; ///< Duty cycle value for group 1 (channels 2 and 3). +} nrf_pwm_values_grouped_t; + +/** + * @brief Structure for defining duty cycle values for a sequence + * loaded in @ref NRF_PWM_LOAD_INDIVIDUAL mode. + */ +typedef struct +{ + uint16_t channel_0; ///< Duty cycle value for channel 0. + uint16_t channel_1; ///< Duty cycle value for channel 1. + uint16_t channel_2; ///< Duty cycle value for channel 2. + uint16_t channel_3; ///< Duty cycle value for channel 3. +} nrf_pwm_values_individual_t; + +/** + * @brief Structure for defining duty cycle values for a sequence + * loaded in @ref NRF_PWM_LOAD_WAVE_FORM mode. + */ +typedef struct { + uint16_t channel_0; ///< Duty cycle value for channel 0. + uint16_t channel_1; ///< Duty cycle value for channel 1. + uint16_t channel_2; ///< Duty cycle value for channel 2. + uint16_t counter_top; ///< Top value for the pulse generator counter. +} nrf_pwm_values_wave_form_t; + +/** + * @brief Union grouping pointers to arrays of duty cycle values applicable to + * various loading modes. + */ +typedef union { + nrf_pwm_values_common_t const * p_common; ///< Pointer to be used in @ref NRF_PWM_LOAD_COMMON mode. + nrf_pwm_values_grouped_t const * p_grouped; ///< Pointer to be used in @ref NRF_PWM_LOAD_GROUPED mode. + nrf_pwm_values_individual_t const * p_individual; ///< Pointer to be used in @ref NRF_PWM_LOAD_INDIVIDUAL mode. + nrf_pwm_values_wave_form_t const * p_wave_form; ///< Pointer to be used in @ref NRF_PWM_LOAD_WAVE_FORM mode. + uint16_t const * p_raw; ///< Pointer providing raw access to the values. +} nrf_pwm_values_t; + +/** + * @brief Structure for defining a sequence of PWM duty cycles. + * + * When the sequence is set (by a call to @ref nrf_pwm_sequence_set), the + * provided duty cycle values are not copied. The @p values pointer is stored + * in the peripheral's internal register, and the values are loaded from RAM + * during the sequence playback. Therefore, you must ensure that the values + * do not change before and during the sequence playback (for example, + * the values cannot be placed in a local variable that is allocated on stack). + * If the sequence is played in a loop and the values should be updated + * before the next iteration, it is safe to modify them when the corresponding + * event signaling the end of sequence occurs (@ref NRF_PWM_EVENT_SEQEND0 + * or @ref NRF_PWM_EVENT_SEQEND1, respectively). + * + * @note The @p repeats and @p end_delay values (which are written to the + * SEQ[n].REFRESH and SEQ[n].ENDDELAY registers in the peripheral, + * respectively) are ignored at the end of a complex sequence + * playback, indicated by the LOOPSDONE event. + * See the @linkProductSpecification52 for more information. + */ +typedef struct +{ + nrf_pwm_values_t values; ///< Pointer to an array with duty cycle values. This array must be in Data RAM. + /**< This field is defined as an union of pointers + * to provide a convenient way to define duty + * cycle values in various loading modes + * (see @ref nrf_pwm_dec_load_t). + * In each value, the most significant bit (15) + * determines the polarity of the output and the + * others (14-0) compose the 15-bit value to be + * compared with the pulse generator counter. */ + uint16_t length; ///< Number of 16-bit values in the array pointed by @p values. + uint32_t repeats; ///< Number of times that each duty cycle should be repeated (after being played once). Ignored in @ref NRF_PWM_STEP_TRIGGERED mode. + uint32_t end_delay; ///< Additional time (in PWM periods) that the last duty cycle is to be kept after the sequence is played. Ignored in @ref NRF_PWM_STEP_TRIGGERED mode. +} nrf_pwm_sequence_t; + +/** + * @brief Helper macro for calculating the number of 16-bit values in specified + * array of duty cycle values. + */ +#define NRF_PWM_VALUES_LENGTH(array) (sizeof(array) / sizeof(uint16_t)) + + +/** + * @brief Function for activating a specific PWM task. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] task Task to activate. + */ +__STATIC_INLINE void nrf_pwm_task_trigger(NRF_PWM_Type * p_reg, + nrf_pwm_task_t task); + +/** + * @brief Function for getting the address of a specific PWM task register. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] task Requested task. + * + * @return Address of the specified task register. + */ +__STATIC_INLINE uint32_t nrf_pwm_task_address_get(NRF_PWM_Type const * p_reg, + nrf_pwm_task_t task); + +/** + * @brief Function for clearing a specific PWM event. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] event Event to clear. + */ +__STATIC_INLINE void nrf_pwm_event_clear(NRF_PWM_Type * p_reg, + nrf_pwm_event_t event); + +/** + * @brief Function for checking the state of a specific PWM event. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] event Event to check. + * + * @retval true If the event is set. + * @retval false If the event is not set. + */ +__STATIC_INLINE bool nrf_pwm_event_check(NRF_PWM_Type const * p_reg, + nrf_pwm_event_t event); + +/** + * @brief Function for getting the address of a specific PWM event register. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] event Requested event. + * + * @return Address of the specified event register. + */ +__STATIC_INLINE uint32_t nrf_pwm_event_address_get(NRF_PWM_Type const * p_reg, + nrf_pwm_event_t event); + +/** + * @brief Function for enabling specified shortcuts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] pwm_shorts_mask Shortcuts to enable. + */ +__STATIC_INLINE void nrf_pwm_shorts_enable(NRF_PWM_Type * p_reg, + uint32_t pwm_shorts_mask); + +/** + * @brief Function for disabling specified shortcuts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] pwm_shorts_mask Shortcuts to disable. + */ +__STATIC_INLINE void nrf_pwm_shorts_disable(NRF_PWM_Type * p_reg, + uint32_t pwm_shorts_mask); + +/** + * @brief Function for setting the configuration of PWM shortcuts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] pwm_shorts_mask Shortcuts configuration to set. + */ +__STATIC_INLINE void nrf_pwm_shorts_set(NRF_PWM_Type * p_reg, + uint32_t pwm_shorts_mask); + +/** + * @brief Function for enabling specified interrupts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] pwm_int_mask Interrupts to enable. + */ +__STATIC_INLINE void nrf_pwm_int_enable(NRF_PWM_Type * p_reg, + uint32_t pwm_int_mask); + +/** + * @brief Function for disabling specified interrupts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] pwm_int_mask Interrupts to disable. + */ +__STATIC_INLINE void nrf_pwm_int_disable(NRF_PWM_Type * p_reg, + uint32_t pwm_int_mask); + +/** + * @brief Function for setting the configuration of PWM interrupts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] pwm_int_mask Interrupts configuration to set. + */ +__STATIC_INLINE void nrf_pwm_int_set(NRF_PWM_Type * p_reg, + uint32_t pwm_int_mask); + +/** + * @brief Function for retrieving the state of a given interrupt. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] pwm_int Interrupt to check. + * + * @retval true If the interrupt is enabled. + * @retval false If the interrupt is not enabled. + */ +__STATIC_INLINE bool nrf_pwm_int_enable_check(NRF_PWM_Type const * p_reg, + nrf_pwm_int_mask_t pwm_int); + +/** + * @brief Function for enabling the PWM peripheral. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_pwm_enable(NRF_PWM_Type * p_reg); + +/** + * @brief Function for disabling the PWM peripheral. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_pwm_disable(NRF_PWM_Type * p_reg); + +/** + * @brief Function for assigning pins to PWM output channels. + * + * Usage of all PWM output channels is optional. If a given channel is not + * needed, pass the @ref NRF_PWM_PIN_NOT_CONNECTED value instead of its pin + * number. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] out_pins Array with pin numbers for individual PWM output channels. + */ +__STATIC_INLINE void nrf_pwm_pins_set(NRF_PWM_Type * p_reg, + uint32_t out_pins[NRF_PWM_CHANNEL_COUNT]); + +/** + * @brief Function for configuring the PWM peripheral. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] base_clock Base clock frequency. + * @param[in] mode Operating mode of the pulse generator counter. + * @param[in] top_value Value up to which the pulse generator counter counts. + */ +__STATIC_INLINE void nrf_pwm_configure(NRF_PWM_Type * p_reg, + nrf_pwm_clk_t base_clock, + nrf_pwm_mode_t mode, + uint16_t top_value); + +/** + * @brief Function for defining a sequence of PWM duty cycles. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] seq_id Identifier of the sequence (0 or 1). + * @param[in] p_seq Pointer to the sequence definition. + */ +__STATIC_INLINE void nrf_pwm_sequence_set(NRF_PWM_Type * p_reg, + uint8_t seq_id, + nrf_pwm_sequence_t const * p_seq); + +/** + * @brief Function for modifying the pointer to the duty cycle values + * in the specified sequence. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] seq_id Identifier of the sequence (0 or 1). + * @param[in] p_values Pointer to an array with duty cycle values. + */ +__STATIC_INLINE void nrf_pwm_seq_ptr_set(NRF_PWM_Type * p_reg, + uint8_t seq_id, + uint16_t const * p_values); + +/** + * @brief Function for modifying the total number of duty cycle values + * in the specified sequence. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] seq_id Identifier of the sequence (0 or 1). + * @param[in] length Number of duty cycle values. + */ +__STATIC_INLINE void nrf_pwm_seq_cnt_set(NRF_PWM_Type * p_reg, + uint8_t seq_id, + uint16_t length); + +/** + * @brief Function for modifying the additional number of PWM periods spent + * on each duty cycle value in the specified sequence. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] seq_id Identifier of the sequence (0 or 1). + * @param[in] refresh Number of additional PWM periods for each duty cycle value. + */ +__STATIC_INLINE void nrf_pwm_seq_refresh_set(NRF_PWM_Type * p_reg, + uint8_t seq_id, + uint32_t refresh); + +/** + * @brief Function for modifying the additional time added after the sequence + * is played. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] seq_id Identifier of the sequence (0 or 1). + * @param[in] end_delay Number of PWM periods added at the end of the sequence. + */ +__STATIC_INLINE void nrf_pwm_seq_end_delay_set(NRF_PWM_Type * p_reg, + uint8_t seq_id, + uint32_t end_delay); + +/** + * @brief Function for setting the mode of loading sequence data from RAM + * and advancing the sequence. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] dec_load Mode of loading sequence data from RAM. + * @param[in] dec_step Mode of advancing the active sequence. + */ +__STATIC_INLINE void nrf_pwm_decoder_set(NRF_PWM_Type * p_reg, + nrf_pwm_dec_load_t dec_load, + nrf_pwm_dec_step_t dec_step); + +/** + * @brief Function for setting the number of times the sequence playback + * should be performed. + * + * This function applies to two-sequence playback (concatenated sequence 0 and 1). + * A single sequence can be played back only once. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] loop_count Number of times to perform the sequence playback. + */ +__STATIC_INLINE void nrf_pwm_loop_set(NRF_PWM_Type * p_reg, + uint16_t loop_count); + + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE void nrf_pwm_task_trigger(NRF_PWM_Type * p_reg, + nrf_pwm_task_t task) +{ + *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL; +} + +__STATIC_INLINE uint32_t nrf_pwm_task_address_get(NRF_PWM_Type const * p_reg, + nrf_pwm_task_t task) +{ + return ((uint32_t)p_reg + (uint32_t)task); +} + +__STATIC_INLINE void nrf_pwm_event_clear(NRF_PWM_Type * p_reg, + nrf_pwm_event_t event) +{ + *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL; +#if __CORTEX_M == 0x04 + volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)); + (void)dummy; +#endif +} + +__STATIC_INLINE bool nrf_pwm_event_check(NRF_PWM_Type const * p_reg, + nrf_pwm_event_t event) +{ + return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event); +} + +__STATIC_INLINE uint32_t nrf_pwm_event_address_get(NRF_PWM_Type const * p_reg, + nrf_pwm_event_t event) +{ + return ((uint32_t)p_reg + (uint32_t)event); +} + +__STATIC_INLINE void nrf_pwm_shorts_enable(NRF_PWM_Type * p_reg, + uint32_t pwm_shorts_mask) +{ + p_reg->SHORTS |= pwm_shorts_mask; +} + +__STATIC_INLINE void nrf_pwm_shorts_disable(NRF_PWM_Type * p_reg, + uint32_t pwm_shorts_mask) +{ + p_reg->SHORTS &= ~(pwm_shorts_mask); +} + +__STATIC_INLINE void nrf_pwm_shorts_set(NRF_PWM_Type * p_reg, + uint32_t pwm_shorts_mask) +{ + p_reg->SHORTS = pwm_shorts_mask; +} + +__STATIC_INLINE void nrf_pwm_int_enable(NRF_PWM_Type * p_reg, + uint32_t pwm_int_mask) +{ + p_reg->INTENSET = pwm_int_mask; +} + +__STATIC_INLINE void nrf_pwm_int_disable(NRF_PWM_Type * p_reg, + uint32_t pwm_int_mask) +{ + p_reg->INTENCLR = pwm_int_mask; +} + +__STATIC_INLINE void nrf_pwm_int_set(NRF_PWM_Type * p_reg, + uint32_t pwm_int_mask) +{ + p_reg->INTEN = pwm_int_mask; +} + +__STATIC_INLINE bool nrf_pwm_int_enable_check(NRF_PWM_Type const * p_reg, + nrf_pwm_int_mask_t pwm_int) +{ + return (bool)(p_reg->INTENSET & pwm_int); +} + +__STATIC_INLINE void nrf_pwm_enable(NRF_PWM_Type * p_reg) +{ + p_reg->ENABLE = (PWM_ENABLE_ENABLE_Enabled << PWM_ENABLE_ENABLE_Pos); +} + +__STATIC_INLINE void nrf_pwm_disable(NRF_PWM_Type * p_reg) +{ + p_reg->ENABLE = (PWM_ENABLE_ENABLE_Disabled << PWM_ENABLE_ENABLE_Pos); +} + +__STATIC_INLINE void nrf_pwm_pins_set(NRF_PWM_Type * p_reg, + uint32_t out_pins[NRF_PWM_CHANNEL_COUNT]) +{ + uint8_t i; + for (i = 0; i < NRF_PWM_CHANNEL_COUNT; ++i) + { + p_reg->PSEL.OUT[i] = out_pins[i]; + } +} + +__STATIC_INLINE void nrf_pwm_configure(NRF_PWM_Type * p_reg, + nrf_pwm_clk_t base_clock, + nrf_pwm_mode_t mode, + uint16_t top_value) +{ + NRFX_ASSERT(top_value <= PWM_COUNTERTOP_COUNTERTOP_Msk); + + p_reg->PRESCALER = base_clock; + p_reg->MODE = mode; + p_reg->COUNTERTOP = top_value; +} + +__STATIC_INLINE void nrf_pwm_sequence_set(NRF_PWM_Type * p_reg, + uint8_t seq_id, + nrf_pwm_sequence_t const * p_seq) +{ + NRFX_ASSERT(p_seq != NULL); + + nrf_pwm_seq_ptr_set( p_reg, seq_id, p_seq->values.p_raw); + nrf_pwm_seq_cnt_set( p_reg, seq_id, p_seq->length); + nrf_pwm_seq_refresh_set( p_reg, seq_id, p_seq->repeats); + nrf_pwm_seq_end_delay_set(p_reg, seq_id, p_seq->end_delay); +} + +__STATIC_INLINE void nrf_pwm_seq_ptr_set(NRF_PWM_Type * p_reg, + uint8_t seq_id, + uint16_t const * p_values) +{ + NRFX_ASSERT(seq_id <= 1); + NRFX_ASSERT(p_values != NULL); + p_reg->SEQ[seq_id].PTR = (uint32_t)p_values; +} + +__STATIC_INLINE void nrf_pwm_seq_cnt_set(NRF_PWM_Type * p_reg, + uint8_t seq_id, + uint16_t length) +{ + NRFX_ASSERT(seq_id <= 1); + NRFX_ASSERT(length != 0); + NRFX_ASSERT(length <= PWM_SEQ_CNT_CNT_Msk); + p_reg->SEQ[seq_id].CNT = length; +} + +__STATIC_INLINE void nrf_pwm_seq_refresh_set(NRF_PWM_Type * p_reg, + uint8_t seq_id, + uint32_t refresh) +{ + NRFX_ASSERT(seq_id <= 1); + NRFX_ASSERT(refresh <= PWM_SEQ_REFRESH_CNT_Msk); + p_reg->SEQ[seq_id].REFRESH = refresh; +} + +__STATIC_INLINE void nrf_pwm_seq_end_delay_set(NRF_PWM_Type * p_reg, + uint8_t seq_id, + uint32_t end_delay) +{ + NRFX_ASSERT(seq_id <= 1); + NRFX_ASSERT(end_delay <= PWM_SEQ_ENDDELAY_CNT_Msk); + p_reg->SEQ[seq_id].ENDDELAY = end_delay; +} + +__STATIC_INLINE void nrf_pwm_decoder_set(NRF_PWM_Type * p_reg, + nrf_pwm_dec_load_t dec_load, + nrf_pwm_dec_step_t dec_step) +{ + p_reg->DECODER = ((uint32_t)dec_load << PWM_DECODER_LOAD_Pos) | + ((uint32_t)dec_step << PWM_DECODER_MODE_Pos); +} + +__STATIC_INLINE void nrf_pwm_loop_set(NRF_PWM_Type * p_reg, + uint16_t loop_count) +{ + p_reg->LOOP = loop_count; +} + +#endif // SUPPRESS_INLINE_IMPLEMENTATION + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_PWM_H__ + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_qdec.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_qdec.h new file mode 100644 index 00000000000..537bf78efbd --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_qdec.h @@ -0,0 +1,495 @@ +/** + * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_QDEC_H__ +#define NRF_QDEC_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_qdec_hal QDEC HAL + * @{ + * @ingroup nrf_qdec + * @brief Hardware access layer for managing the Quadrature Decoder (QDEC) peripheral. + */ + +/** + * @enum nrf_qdec_task_t + * @brief QDEC tasks. + */ +typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ +{ + NRF_QDEC_TASK_START = offsetof(NRF_QDEC_Type, TASKS_START), /**< Starting the quadrature decoder. */ + NRF_QDEC_TASK_STOP = offsetof(NRF_QDEC_Type, TASKS_STOP), /**< Stopping the quadrature decoder. */ + NRF_QDEC_TASK_READCLRACC = offsetof(NRF_QDEC_Type, TASKS_READCLRACC) /**< Reading and clearing ACC and ACCDBL registers. */ +} nrf_qdec_task_t; + +/** + * @enum nrf_qdec_event_t + * @brief QDEC events. + */ +typedef enum +{ + NRF_QDEC_EVENT_SAMPLERDY = offsetof(NRF_QDEC_Type, EVENTS_SAMPLERDY), /**< Event generated for every new sample. */ + NRF_QDEC_EVENT_REPORTRDY = offsetof(NRF_QDEC_Type, EVENTS_REPORTRDY), /**< Event generated for every new report. */ + NRF_QDEC_EVENT_ACCOF = offsetof(NRF_QDEC_Type, EVENTS_ACCOF) /**< Event generated for every accumulator overflow. */ +} nrf_qdec_event_t; /*lint -restore */ + +/** + * @enum nrf_qdec_short_mask_t + * @brief QDEC shortcuts. + */ +typedef enum +{ + NRF_QDEC_SHORT_REPORTRDY_READCLRACC_MASK = QDEC_SHORTS_REPORTRDY_READCLRACC_Msk, /**< Shortcut between REPORTRDY event and READCLRACC task. */ + NRF_QDEC_SHORT_SAMPLERDY_STOP_MASK = QDEC_SHORTS_SAMPLERDY_STOP_Msk /**< Shortcut between SAMPLERDY event and STOP task. */ +} nrf_qdec_short_mask_t; + +/** + * @enum nrf_qdec_int_mask_t + * @brief QDEC interrupts. + */ +typedef enum +{ + NRF_QDEC_INT_SAMPLERDY_MASK = QDEC_INTENSET_SAMPLERDY_Msk, /**< Mask for enabling or disabling an interrupt on SAMPLERDY event. */ + NRF_QDEC_INT_REPORTRDY_MASK = QDEC_INTENSET_REPORTRDY_Msk, /**< Mask for enabling or disabling an interrupt on REPORTRDY event. */ + NRF_QDEC_INT_ACCOF_MASK = QDEC_INTENSET_ACCOF_Msk /**< Mask for enabling or disabling an interrupt on ACCOF event. */ +} nrf_qdec_int_mask_t; + +/** + * @enum nrf_qdec_enable_t + * @brief States of the enable bit. + */ +typedef enum +{ + NRF_QDEC_DISABLE = QDEC_ENABLE_ENABLE_Disabled, /**< Mask for disabling the QDEC periperal. When disabled, the QDEC decoder pins are not active. */ + NRF_QDEC_ENABLE = QDEC_ENABLE_ENABLE_Enabled /**< Mask for enabling the QDEC periperal. When enabled, the QDEC pins are active. */ +} nrf_qdec_enable_t; + + +/** + * @enum nrf_qdec_dbfen_t + * @brief States of the debounce filter enable bit. + */ +typedef enum +{ + NRF_QDEC_DBFEN_DISABLE = QDEC_DBFEN_DBFEN_Disabled, /**< Mask for disabling the debounce filter. */ + NRF_QDEC_DBFEN_ENABLE = QDEC_DBFEN_DBFEN_Enabled /**< Mask for enabling the debounce filter. */ +} nrf_qdec_dbfen_t; + +/** + * @enum nrf_qdec_ledpol_t + * @brief Active LED polarity. + */ +typedef enum +{ + NRF_QDEC_LEPOL_ACTIVE_LOW = QDEC_LEDPOL_LEDPOL_ActiveLow, /**< QDEC LED active on output pin low. */ + NRF_QDEC_LEPOL_ACTIVE_HIGH = QDEC_LEDPOL_LEDPOL_ActiveHigh /**< QDEC LED active on output pin high. */ +} nrf_qdec_ledpol_t; + + +/** + * @enum nrf_qdec_sampleper_t + * @brief Available sampling periods. + */ +typedef enum +{ + NRF_QDEC_SAMPLEPER_128us = QDEC_SAMPLEPER_SAMPLEPER_128us, /**< QDEC sampling period 128 microseconds. */ + NRF_QDEC_SAMPLEPER_256us = QDEC_SAMPLEPER_SAMPLEPER_256us, /**< QDEC sampling period 256 microseconds. */ + NRF_QDEC_SAMPLEPER_512us = QDEC_SAMPLEPER_SAMPLEPER_512us, /**< QDEC sampling period 512 microseconds. */ + NRF_QDEC_SAMPLEPER_1024us = QDEC_SAMPLEPER_SAMPLEPER_1024us, /**< QDEC sampling period 1024 microseconds. */ + NRF_QDEC_SAMPLEPER_2048us = QDEC_SAMPLEPER_SAMPLEPER_2048us, /**< QDEC sampling period 2048 microseconds. */ + NRF_QDEC_SAMPLEPER_4096us = QDEC_SAMPLEPER_SAMPLEPER_4096us, /**< QDEC sampling period 4096 microseconds. */ + NRF_QDEC_SAMPLEPER_8192us = QDEC_SAMPLEPER_SAMPLEPER_8192us, /**< QDEC sampling period 8192 microseconds. */ + NRF_QDEC_SAMPLEPER_16384us = QDEC_SAMPLEPER_SAMPLEPER_16384us /**< QDEC sampling period 16384 microseconds. */ +} nrf_qdec_sampleper_t; + +/** + * @enum nrf_qdec_reportper_t + * @brief Available report periods. + */ +typedef enum +{ + NRF_QDEC_REPORTPER_10 = QDEC_REPORTPER_REPORTPER_10Smpl, /**< QDEC report period 10 samples. */ + NRF_QDEC_REPORTPER_40 = QDEC_REPORTPER_REPORTPER_40Smpl, /**< QDEC report period 40 samples. */ + NRF_QDEC_REPORTPER_80 = QDEC_REPORTPER_REPORTPER_80Smpl, /**< QDEC report period 80 samples. */ + NRF_QDEC_REPORTPER_120 = QDEC_REPORTPER_REPORTPER_120Smpl, /**< QDEC report period 120 samples. */ + NRF_QDEC_REPORTPER_160 = QDEC_REPORTPER_REPORTPER_160Smpl, /**< QDEC report period 160 samples. */ + NRF_QDEC_REPORTPER_200 = QDEC_REPORTPER_REPORTPER_200Smpl, /**< QDEC report period 200 samples. */ + NRF_QDEC_REPORTPER_240 = QDEC_REPORTPER_REPORTPER_240Smpl, /**< QDEC report period 240 samples. */ + NRF_QDEC_REPORTPER_280 = QDEC_REPORTPER_REPORTPER_280Smpl, /**< QDEC report period 280 samples. */ + NRF_QDEC_REPORTPER_DISABLED /**< QDEC reporting disabled. */ +} nrf_qdec_reportper_t; + +/** + * @brief Function for enabling QDEC. + */ +__STATIC_INLINE void nrf_qdec_enable(void) +{ + NRF_QDEC->ENABLE = NRF_QDEC_ENABLE; +} + + +/** + * @brief Function for disabling QDEC. + */ +__STATIC_INLINE void nrf_qdec_disable(void) +{ + NRF_QDEC->ENABLE = NRF_QDEC_DISABLE; +} + + +/** + * @brief Function for returning the enable state of QDEC. + * @return State of the register. + */ +__STATIC_INLINE uint32_t nrf_qdec_enable_get(void) +{ + return NRF_QDEC->ENABLE; +} + + +/** + * @brief Function for enabling QDEC interrupts by mask. + * @param[in] qdec_int_mask Sources of the interrupts to enable. + */ +__STATIC_INLINE void nrf_qdec_int_enable(uint32_t qdec_int_mask) +{ + NRF_QDEC->INTENSET = qdec_int_mask; // writing 0 has no effect +} + + +/** + * @brief Function for disabling QDEC interrupts by mask. + * @param[in] qdec_int_mask Sources of the interrupts to disable. + * + */ +__STATIC_INLINE void nrf_qdec_int_disable(uint32_t qdec_int_mask) +{ + NRF_QDEC->INTENCLR = qdec_int_mask; // writing 0 has no effect +} + + +/** + * @brief Function for getting the enabled interrupts of the QDEC. + */ +__STATIC_INLINE uint32_t nrf_qdec_int_enable_check(nrf_qdec_int_mask_t qdec_int_mask) +{ + return NRF_QDEC->INTENSET & qdec_int_mask; // when read this register will return the value of INTEN. +} + + +/** + * @brief Function for enabling the debouncing filter of the QED. + */ +__STATIC_INLINE void nrf_qdec_dbfen_enable(void) +{ + NRF_QDEC->DBFEN = NRF_QDEC_DBFEN_ENABLE; +} + + +/** + * @brief Function for disabling the debouncing filter of the QED. + */ +__STATIC_INLINE void nrf_qdec_dbfen_disable(void) +{ + NRF_QDEC->DBFEN = NRF_QDEC_DBFEN_DISABLE; +} + + +/** + * @brief Function for getting the state of the QDEC's debouncing filter. + * @retval NRF_QDEC_DBFEN_DISABLE If the debouncing filter is disabled. + * @retval NRF_QDEC_DBFEN_ENABLE If the debouncing filter is enabled. + */ +__STATIC_INLINE uint32_t nrf_qdec_dbfen_get(void) +{ + return NRF_QDEC->DBFEN; +} + + +/** + * @brief Function for assigning QDEC pins. + * @param[in] psela Pin number. + * @param[in] pselb Pin number. + * @param[in] pselled Pin number. + */ +__STATIC_INLINE void nrf_qdec_pio_assign( uint32_t psela, uint32_t pselb, uint32_t pselled) +{ + NRF_QDEC->PSELA = psela; + NRF_QDEC->PSELB = pselb; + NRF_QDEC->PSELLED = pselled; + +} + +/** + * @brief Function for setting a specific QDEC task. + * @param[in] qdec_task QDEC task to be set. + */ +__STATIC_INLINE void nrf_qdec_task_trigger(nrf_qdec_task_t qdec_task) +{ + *( (volatile uint32_t *)( (uint8_t *)NRF_QDEC + qdec_task) ) = 1; +} + + +/** + * @brief Function for retrieving the address of a QDEC task register. + * @param[in] qdec_task QDEC task. + */ +__STATIC_INLINE uint32_t * nrf_qdec_task_address_get(nrf_qdec_task_t qdec_task) +{ + return (uint32_t *)( (uint8_t *)NRF_QDEC + qdec_task); +} + + +/** + * @brief Function for clearing a specific QDEC event. + * @param[in] qdec_event QDEC event to clear. + */ +__STATIC_INLINE void nrf_qdec_event_clear(nrf_qdec_event_t qdec_event) +{ + *( (volatile uint32_t *)( (uint8_t *)NRF_QDEC + qdec_event) ) = 0; +#if __CORTEX_M == 0x04 + volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_QDEC + qdec_event)); + (void)dummy; +#endif +} + + +/** + * @brief Function for retrieving the state of a specific QDEC event. + * @return State of the QDEC event. + */ +__STATIC_INLINE uint32_t nrf_qdec_event_check(nrf_qdec_event_t qdec_event) +{ + return *(volatile uint32_t *)( (uint8_t *)NRF_QDEC + qdec_event); +} + + +/** + * @brief Function for retrieving the address of a specific QDEC event register. + * @param[in] qdec_event QDEC event. + * @return Address of the specified QDEC event. + */ +__STATIC_INLINE uint32_t * nrf_qdec_event_address_get(nrf_qdec_event_t qdec_event) +{ + return (uint32_t *)( (uint8_t *)NRF_QDEC + qdec_event); +} + + +/** + * @brief Function for setting QDEC shortcuts. + * @param[in] qdec_short_mask QDEC shortcut by mask. + */ +__STATIC_INLINE void nrf_qdec_shorts_enable(uint32_t qdec_short_mask) +{ + NRF_QDEC->SHORTS |= qdec_short_mask; +} + + +/** + * @brief Function for clearing shortcuts of the QDEC by mask. + * @param[in] qdec_short_mask QDEC shortcute to be cleared. + */ +__STATIC_INLINE void nrf_qdec_shorts_disable(uint32_t qdec_short_mask) +{ + NRF_QDEC->SHORTS &= ~qdec_short_mask; +} + + +/** + * @brief Function for retrieving the value of QDEC's SAMPLEPER register. + * @return Value of the SAMPLEPER register. + */ +__STATIC_INLINE int32_t nrf_qdec_sampleper_reg_get(void) +{ + return NRF_QDEC->SAMPLEPER; +} + + +/** + * @brief Function for converting the value of QDEC's SAMPLE PERIOD to microseconds. + * @retval sampling period in microseconds. + */ +__STATIC_INLINE uint32_t nrf_qdec_sampleper_to_value(uint32_t sampleper) +{ + return (1 << (7 + sampleper)); +} + +/** + * @brief Function for setting the value of QDEC's SAMPLEPER register. + * @param[in] sample_per Sampling period. + */ +__STATIC_INLINE void nrf_qdec_sampleper_set(nrf_qdec_sampleper_t sample_per) +{ + NRF_QDEC->SAMPLEPER = sample_per; +} + + +/** + * @brief Function for retrieving the value of QDEC's SAMPLE register. + * @return Value of the SAMPLE register. + */ +__STATIC_INLINE int32_t nrf_qdec_sample_get(void) +{ + return NRF_QDEC->SAMPLE; +} + + +/** + * @brief Function for retrieving the value of QDEC's ACC register. + * @return Value of the ACC register. + */ +__STATIC_INLINE int32_t nrf_qdec_acc_get(void) +{ + return NRF_QDEC->ACC; +} + + +/** + * @brief Function for retrieving the value of QDEC's ACCREAD register. + * @return Value of the ACCREAD register. + */ +__STATIC_INLINE int32_t nrf_qdec_accread_get(void) +{ + return NRF_QDEC->ACCREAD; +} + + +/** + * @brief Function for retrieving the value of QDEC's ACCDBL register. + * @return Value of the ACCDBL register. + */ +__STATIC_INLINE uint32_t nrf_qdec_accdbl_get(void) +{ + return NRF_QDEC->ACCDBL; +} + + +/** + * @brief Function for retrieving the value of QDEC's ACCDBLREAD register. + * @return Value of the ACCDBLREAD register. + */ +__STATIC_INLINE uint32_t nrf_qdec_accdblread_get(void) +{ + return NRF_QDEC->ACCDBLREAD; +} + + +/** + * @brief Function for setting how long the LED is switched on before sampling. + * @param[in] time_us Time (in microseconds) how long the LED is switched on before sampling. + */ +__STATIC_INLINE void nrf_qdec_ledpre_set(uint32_t time_us) +{ + NRF_QDEC->LEDPRE = time_us; +} + + +/** + * @brief Function for retrieving how long the LED is switched on before sampling. + * @retval time_us Time (in microseconds) how long the LED is switched on before sampling. + */ +__STATIC_INLINE uint32_t nrf_qdec_ledpre_get(void) +{ + return NRF_QDEC->LEDPRE; +} + + +/** + * @brief Function for setting the report period (in samples). + * @param[in] reportper Number of samples. + */ +__STATIC_INLINE void nrf_qdec_reportper_set(nrf_qdec_reportper_t reportper) +{ + NRF_QDEC->REPORTPER = reportper; +} + + +/** + * @brief Function for retrieving the report period. + * @retval reportper Number of samples as encoded in the register. + */ +__STATIC_INLINE uint32_t nrf_qdec_reportper_reg_get(void) +{ + return NRF_QDEC->REPORTPER; +} + + +/** + * @brief Function for retrieving the value of QDEC's SAMPLEPER register. + * @param [in] reportper Reportper to be converted to amount of samples per report. + + */ +__STATIC_INLINE uint32_t nrf_qdec_reportper_to_value(uint32_t reportper) +{ + return (reportper == NRF_QDEC_REPORTPER_10) ? 10 : reportper * 40; +} + + +/** + * @brief Function for setting the active level for the LED. + * @param[in] pol Active level for the LED. + */ +__STATIC_INLINE void nrf_qdec_ledpol_set(nrf_qdec_ledpol_t pol) +{ + NRF_QDEC->LEDPOL = pol; +} + + +/** + * @brief Function for retrieving the active level for the LED. + * @return Active level for the LED. + */ +__STATIC_INLINE uint32_t nrf_qdec_ledpol_get(void) +{ + return NRF_QDEC->LEDPOL; +} + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_qspi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_qspi.h new file mode 100644 index 00000000000..c6970e4a42f --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_qspi.h @@ -0,0 +1,778 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_QSPI_H__ +#define NRF_QSPI_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_qspi_hal QSPI HAL + * @{ + * @ingroup nrf_qspi + * @brief Hardware access layer for managing the QSPI peripheral. + */ + +/** + * @brief This value can be used as a parameter for the @ref nrf_qspi_pins_set + * function to specify that a given QSPI signal (SCK, CSN, IO0, IO1, IO2, or IO3) + * will not be connected to a physical pin. + */ +#define NRF_QSPI_PIN_NOT_CONNECTED 0xFF + +/** + * @brief Macro for setting proper values to pin registers. + */ + +#define NRF_QSPI_PIN_VAL(pin) (pin) == NRF_QSPI_PIN_NOT_CONNECTED ? 0xFFFFFFFF : (pin) + +/** + * @brief QSPI tasks. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_QSPI_TASK_ACTIVATE = offsetof(NRF_QSPI_Type, TASKS_ACTIVATE), /**< Activate the QSPI interface. */ + NRF_QSPI_TASK_READSTART = offsetof(NRF_QSPI_Type, TASKS_READSTART), /**< Start transfer from external flash memory to internal RAM. */ + NRF_QSPI_TASK_WRITESTART = offsetof(NRF_QSPI_Type, TASKS_WRITESTART), /**< Start transfer from internal RAM to external flash memory. */ + NRF_QSPI_TASK_ERASESTART = offsetof(NRF_QSPI_Type, TASKS_ERASESTART), /**< Start external flash memory erase operation. */ + NRF_QSPI_TASK_DEACTIVATE = offsetof(NRF_QSPI_Type, TASKS_DEACTIVATE), /**< Deactivate the QSPI interface. */ + /*lint -restore*/ +} nrf_qspi_task_t; + +/** + * @brief QSPI events. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_QSPI_EVENT_READY = offsetof(NRF_QSPI_Type, EVENTS_READY) /**< QSPI peripheral is ready after it executes any task. */ + /*lint -restore*/ +} nrf_qspi_event_t; + +/** + * @brief QSPI interrupts. + */ +typedef enum +{ + NRF_QSPI_INT_READY_MASK = QSPI_INTENSET_READY_Msk /**< Interrupt on READY event. */ +} nrf_qspi_int_mask_t; + +/** + * @brief QSPI frequency divider values. + */ +typedef enum +{ + NRF_QSPI_FREQ_32MDIV1, /**< 32.0 MHz. */ + NRF_QSPI_FREQ_32MDIV2, /**< 16.0 MHz. */ + NRF_QSPI_FREQ_32MDIV3, /**< 10.6 MHz. */ + NRF_QSPI_FREQ_32MDIV4, /**< 8.00 MHz. */ + NRF_QSPI_FREQ_32MDIV5, /**< 6.40 MHz. */ + NRF_QSPI_FREQ_32MDIV6, /**< 5.33 MHz. */ + NRF_QSPI_FREQ_32MDIV7, /**< 4.57 MHz. */ + NRF_QSPI_FREQ_32MDIV8, /**< 4.00 MHz. */ + NRF_QSPI_FREQ_32MDIV9, /**< 3.55 MHz. */ + NRF_QSPI_FREQ_32MDIV10, /**< 3.20 MHz. */ + NRF_QSPI_FREQ_32MDIV11, /**< 2.90 MHz. */ + NRF_QSPI_FREQ_32MDIV12, /**< 2.66 MHz. */ + NRF_QSPI_FREQ_32MDIV13, /**< 2.46 MHz. */ + NRF_QSPI_FREQ_32MDIV14, /**< 2.29 MHz. */ + NRF_QSPI_FREQ_32MDIV15, /**< 2.13 MHz. */ + NRF_QSPI_FREQ_32MDIV16, /**< 2.00 MHz. */ +} nrf_qspi_frequency_t; + +/** + * @brief Interface configuration for a read operation. + */ +typedef enum +{ + NRF_QSPI_READOC_FASTREAD = QSPI_IFCONFIG0_READOC_FASTREAD, /**< Single data line SPI. FAST_READ (opcode 0x0B). */ + NRF_QSPI_READOC_READ2O = QSPI_IFCONFIG0_READOC_READ2O, /**< Dual data line SPI. READ2O (opcode 0x3B). */ + NRF_QSPI_READOC_READ2IO = QSPI_IFCONFIG0_READOC_READ2IO, /**< Dual data line SPI. READ2IO (opcode 0xBB). */ + NRF_QSPI_READOC_READ4O = QSPI_IFCONFIG0_READOC_READ4O, /**< Quad data line SPI. READ4O (opcode 0x6B). */ + NRF_QSPI_READOC_READ4IO = QSPI_IFCONFIG0_READOC_READ4IO /**< Quad data line SPI. READ4IO (opcode 0xEB). */ +} nrf_qspi_readoc_t; + +/** + * @brief Interface configuration for a write operation. + */ +typedef enum +{ + NRF_QSPI_WRITEOC_PP = QSPI_IFCONFIG0_WRITEOC_PP, /**< Single data line SPI. PP (opcode 0x02). */ + NRF_QSPI_WRITEOC_PP2O = QSPI_IFCONFIG0_WRITEOC_PP2O, /**< Dual data line SPI. PP2O (opcode 0xA2). */ + NRF_QSPI_WRITEOC_PP4O = QSPI_IFCONFIG0_WRITEOC_PP4O, /**< Quad data line SPI. PP4O (opcode 0x32). */ + NRF_QSPI_WRITEOC_PP4IO = QSPI_IFCONFIG0_WRITEOC_PP4IO, /**< Quad data line SPI. READ4O (opcode 0x38). */ +} nrf_qspi_writeoc_t; + +/** + * @brief Interface configuration for addressing mode. + */ +typedef enum +{ + NRF_QSPI_ADDRMODE_24BIT = QSPI_IFCONFIG0_ADDRMODE_24BIT, /**< 24-bit addressing. */ + NRF_QSPI_ADDRMODE_32BIT = QSPI_IFCONFIG0_ADDRMODE_32BIT /**< 32-bit addressing. */ +} nrf_qspi_addrmode_t; + +/** + * @brief QSPI SPI mode. Polarization and phase configuration. + */ +typedef enum +{ + NRF_QSPI_MODE_0 = QSPI_IFCONFIG1_SPIMODE_MODE0, /**< Mode 0 (CPOL=0, CPHA=0). */ + NRF_QSPI_MODE_1 = QSPI_IFCONFIG1_SPIMODE_MODE3 /**< Mode 1 (CPOL=1, CPHA=1). */ +} nrf_qspi_spi_mode_t; + +/** + * @brief Addressing configuration mode. + */ +typedef enum +{ + NRF_QSPI_ADDRCONF_MODE_NOINSTR = QSPI_ADDRCONF_MODE_NoInstr, /**< Do not send any instruction. */ + NRF_QSPI_ADDRCONF_MODE_OPCODE = QSPI_ADDRCONF_MODE_Opcode, /**< Send opcode. */ + NRF_QSPI_ADDRCONF_MODE_OPBYTE0 = QSPI_ADDRCONF_MODE_OpByte0, /**< Send opcode, byte0. */ + NRF_QSPI_ADDRCONF_MODE_ALL = QSPI_ADDRCONF_MODE_All /**< Send opcode, byte0, byte1. */ +} nrf_qspi_addrconfig_mode_t; + +/** + * @brief Erasing data length. + */ +typedef enum +{ + NRF_QSPI_ERASE_LEN_4KB = QSPI_ERASE_LEN_LEN_4KB, /**< Erase 4 kB block (flash command 0x20). */ + NRF_QSPI_ERASE_LEN_64KB = QSPI_ERASE_LEN_LEN_64KB, /**< Erase 64 kB block (flash command 0xD8). */ + NRF_QSPI_ERASE_LEN_ALL = QSPI_ERASE_LEN_LEN_All /**< Erase all (flash command 0xC7). */ +} nrf_qspi_erase_len_t; + +/** + * @brief Custom instruction length. + */ +typedef enum +{ + NRF_QSPI_CINSTR_LEN_1B = QSPI_CINSTRCONF_LENGTH_1B, /**< Send opcode only. */ + NRF_QSPI_CINSTR_LEN_2B = QSPI_CINSTRCONF_LENGTH_2B, /**< Send opcode, CINSTRDAT0.BYTE0. */ + NRF_QSPI_CINSTR_LEN_3B = QSPI_CINSTRCONF_LENGTH_3B, /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT0.BYTE1. */ + NRF_QSPI_CINSTR_LEN_4B = QSPI_CINSTRCONF_LENGTH_4B, /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT0.BYTE2. */ + NRF_QSPI_CINSTR_LEN_5B = QSPI_CINSTRCONF_LENGTH_5B, /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT0.BYTE3. */ + NRF_QSPI_CINSTR_LEN_6B = QSPI_CINSTRCONF_LENGTH_6B, /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE4. */ + NRF_QSPI_CINSTR_LEN_7B = QSPI_CINSTRCONF_LENGTH_7B, /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE5. */ + NRF_QSPI_CINSTR_LEN_8B = QSPI_CINSTRCONF_LENGTH_8B, /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE6. */ + NRF_QSPI_CINSTR_LEN_9B = QSPI_CINSTRCONF_LENGTH_9B /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE7. */ +} nrf_qspi_cinstr_len_t; + +/** + * @brief Pins configuration. + */ +typedef struct +{ + uint8_t sck_pin; /**< SCK pin number. */ + uint8_t csn_pin; /**< Chip select pin number. */ + uint8_t io0_pin; /**< IO0/MOSI pin number. */ + uint8_t io1_pin; /**< IO1/MISO pin number. */ + uint8_t io2_pin; /**< IO2 pin number (optional). + * Set to @ref NRF_QSPI_PIN_NOT_CONNECTED if this signal is not needed. + */ + uint8_t io3_pin; /**< IO3 pin number (optional). + * Set to @ref NRF_QSPI_PIN_NOT_CONNECTED if this signal is not needed. + */ +} nrf_qspi_pins_t; + +/** + * @brief Custom instruction configuration. + */ +typedef struct +{ + uint8_t opcode; /**< Opcode used in custom instruction transmission. */ + nrf_qspi_cinstr_len_t length; /**< Length of the custom instruction data. */ + bool io2_level; /**< I/O line level during transmission. */ + bool io3_level; /**< I/O line level during transmission. */ + bool wipwait; /**< Wait if a Wait in Progress bit is set in the memory status byte. */ + bool wren; /**< Send write enable before instruction. */ +} nrf_qspi_cinstr_conf_t; + +/** + * @brief Addressing mode register configuration. See @ref nrf_qspi_addrconfig_set + */ +typedef struct +{ + uint8_t opcode; /**< Opcode used to enter proper addressing mode. */ + uint8_t byte0; /**< Byte following the opcode. */ + uint8_t byte1; /**< Byte following byte0. */ + nrf_qspi_addrconfig_mode_t mode; /**< Extended addresing mode. */ + bool wipwait; /**< Enable/disable waiting for complete operation execution. */ + bool wren; /**< Send write enable before instruction. */ +} nrf_qspi_addrconfig_conf_t; + +/** + * @brief Structure with QSPI protocol interface configuration. + */ +typedef struct +{ + nrf_qspi_readoc_t readoc; /**< Read operation code. */ + nrf_qspi_writeoc_t writeoc; /**< Write operation code. */ + nrf_qspi_addrmode_t addrmode; /**< Addresing mode (24-bit or 32-bit). */ + bool dpmconfig; /**< Enable the Deep Power-down Mode (DPM) feature. */ +} nrf_qspi_prot_conf_t; + +/** + * @brief QSPI physical interface configuration. + */ +typedef struct +{ + uint8_t sck_delay; /**< tSHSL, tWHSL, and tSHWL in number of 16 MHz periods (62.5ns). */ + bool dpmen; /**< Enable the DPM feature. */ + nrf_qspi_spi_mode_t spi_mode; /**< SPI phase and polarization. */ + nrf_qspi_frequency_t sck_freq; /**< SCK frequency given as enum @ref nrf_qspi_frequency_t. */ +} nrf_qspi_phy_conf_t; + +/** + * @brief Function for activating a specific QSPI task. + * + * @param[in] p_reg Pointer to the peripheral register structure. + * @param[in] task Task to activate. + */ +__STATIC_INLINE void nrf_qspi_task_trigger(NRF_QSPI_Type * p_reg, nrf_qspi_task_t task); + +/** + * @brief Function for getting the address of a specific QSPI task register. + * + * @param[in] p_reg Pointer to the peripheral register structure. + * @param[in] task Requested task. + * + * @return Address of the specified task register. + */ +__STATIC_INLINE uint32_t nrf_qspi_task_address_get(NRF_QSPI_Type const * p_reg, + nrf_qspi_task_t task); + +/** + * @brief Function for clearing a specific QSPI event. + * + * @param[in] p_reg Pointer to the peripheral register structure. + * @param[in] qspi_event Event to clear. + */ +__STATIC_INLINE void nrf_qspi_event_clear(NRF_QSPI_Type * p_reg, nrf_qspi_event_t qspi_event); + +/** + * @brief Function for checking the state of a specific SPI event. + * + * @param[in] p_reg Pointer to the peripheral register structure. + * @param[in] qspi_event Event to check. + * + * @retval true If the event is set. + * @retval false If the event is not set. + */ +__STATIC_INLINE bool nrf_qspi_event_check(NRF_QSPI_Type const * p_reg, nrf_qspi_event_t qspi_event); + +/** + * @brief Function for getting the address of a specific QSPI event register. + * + * @param[in] p_reg Pointer to the peripheral register structure. + * @param[in] qspi_event Requested event. + * + * @return Address of the specified event register. + */ +__STATIC_INLINE uint32_t * nrf_qspi_event_address_get(NRF_QSPI_Type const * p_reg, + nrf_qspi_event_t qspi_event); + +/** + * @brief Function for enabling specified interrupts. + * + * @param[in] p_reg Pointer to the peripheral register structure. + * @param[in] qspi_int_mask Interrupts to enable. + */ +__STATIC_INLINE void nrf_qspi_int_enable(NRF_QSPI_Type * p_reg, uint32_t qspi_int_mask); + +/** + * @brief Function for disabling specified interrupts. + * + * @param[in] p_reg Pointer to the peripheral register structure. + * @param[in] qspi_int_mask Interrupts to disable. + */ +__STATIC_INLINE void nrf_qspi_int_disable(NRF_QSPI_Type * p_reg, uint32_t qspi_int_mask); + +/** + * @brief Function for retrieving the state of a given interrupt. + * + * @param[in] p_reg Pointer to the peripheral register structure. + * @param[in] qspi_int Interrupt to check. + * + * @retval true If the interrupt is enabled. + * @retval false If the interrupt is not enabled. + */ +__STATIC_INLINE bool nrf_qspi_int_enable_check(NRF_QSPI_Type const * p_reg, + nrf_qspi_int_mask_t qspi_int); + +/** + * @brief Function for enabling the QSPI peripheral. + * + * @param[in] p_reg Pointer to the peripheral register structure. + */ +__STATIC_INLINE void nrf_qspi_enable(NRF_QSPI_Type * p_reg); + +/** + * @brief Function for disabling the QSPI peripheral. + * + * @param[in] p_reg Pointer to the peripheral register structure. + */ +__STATIC_INLINE void nrf_qspi_disable(NRF_QSPI_Type * p_reg); + +/** + * @brief Function for configuring QSPI pins. + * + * If a given signal is not needed, pass the @ref NRF_QSPI_PIN_NOT_CONNECTED + * value instead of its pin number. + * + * @param[in] p_reg Pointer to the peripheral register structure. + * @param[in] p_pins Pointer to the pins configuration structure. See @ref nrf_qspi_pins_t. + */ +__STATIC_INLINE void nrf_qspi_pins_set(NRF_QSPI_Type * p_reg, + const nrf_qspi_pins_t * p_pins); + +/** + * @brief Function for setting the QSPI XIPOFFSET register. + * + * @param[in] p_reg Pointer to the peripheral register structure. + * @param[in] xip_offset Address offset in the external memory for Execute in Place operation. + */ +__STATIC_INLINE void nrf_qspi_xip_offset_set(NRF_QSPI_Type * p_reg, + uint32_t xip_offset); + +/** + * @brief Function for setting the QSPI IFCONFIG0 register. + * + * @param[in] p_reg Pointer to the peripheral register structure. + * @param[in] p_config Pointer to the QSPI protocol interface configuration structure. See @ref nrf_qspi_prot_conf_t. + */ +__STATIC_INLINE void nrf_qspi_ifconfig0_set(NRF_QSPI_Type * p_reg, + const nrf_qspi_prot_conf_t * p_config); + +/** + * @brief Function for setting the QSPI IFCONFIG1 register. + * + * @param[in] p_reg Pointer to the peripheral register structure. + * @param[in] p_config Pointer to the QSPI physical interface configuration structure. See @ref nrf_qspi_phy_conf_t. + */ +__STATIC_INLINE void nrf_qspi_ifconfig1_set(NRF_QSPI_Type * p_reg, + const nrf_qspi_phy_conf_t * p_config); + +/** + * @brief Function for setting the QSPI ADDRCONF register. + * + * Function must be executed before sending task NRF_QSPI_TASK_ACTIVATE. Data stored in the structure + * is sent during the start of the peripheral. Remember that the reset instruction can set + * addressing mode to default in the memory device. If memory reset is necessary before configuring + * the addressing mode, use custom instruction feature instead of this function. + * Case with reset: Enable the peripheral without setting ADDRCONF register, send reset instructions + * using a custom instruction feature (reset enable and then reset), set proper addressing mode + * using the custom instruction feature. + * + * @param[in] p_reg Pointer to the peripheral register structure. + * @param[in] p_config Pointer to the addressing mode configuration structure. See @ref nrf_qspi_addrconfig_conf_t. +*/ +__STATIC_INLINE void nrf_qspi_addrconfig_set(NRF_QSPI_Type * p_reg, + const nrf_qspi_addrconfig_conf_t * p_config); + +/** + * @brief Function for setting write data into the peripheral register (without starting the process). + * + * @param[in] p_reg Pointer to the peripheral register structure. + * @param[in] p_buffer Pointer to the writing buffer. + * @param[in] length Lenght of the writing data. + * @param[in] dest_addr Address in memory to write to. + */ +__STATIC_INLINE void nrf_qspi_write_buffer_set(NRF_QSPI_Type * p_reg, + void const * p_buffer, + uint32_t length, + uint32_t dest_addr); + +/** + * @brief Function for setting read data into the peripheral register (without starting the process). + * + * @param[in] p_reg Pointer to the peripheral register structure. + * @param[out] p_buffer Pointer to the reading buffer. + * @param[in] length Length of the read data. + * @param[in] src_addr Address in memory to read from. + */ +__STATIC_INLINE void nrf_qspi_read_buffer_set(NRF_QSPI_Type * p_reg, + void * p_buffer, + uint32_t length, + uint32_t src_addr); + +/** + * @brief Function for setting erase data into the peripheral register (without starting the process). + * + * @param[in] p_reg Pointer to the peripheral register structure. + * @param[in] erase_addr Start address to erase. Address must have padding set to 4 bytes. + * @param[in] len Size of erasing area. + */ +__STATIC_INLINE void nrf_qspi_erase_ptr_set(NRF_QSPI_Type * p_reg, + uint32_t erase_addr, + nrf_qspi_erase_len_t len); + +/** + * @brief Function for getting the peripheral status register. + * + * @param[in] p_reg Pointer to the peripheral register structure. + * + * @return Peripheral status register. + */ +__STATIC_INLINE uint32_t nrf_qspi_status_reg_get(NRF_QSPI_Type const * p_reg); + +/** + * @brief Function for getting the device status register stored in the peripheral status register. + * + * @param[in] p_reg Pointer to the peripheral register structure. + * + * @return Device status register (lower byte). + */ +__STATIC_INLINE uint8_t nrf_qspi_sreg_get(NRF_QSPI_Type const * p_reg); + +/** + * @brief Function for checking if the peripheral is busy or not. + * + * @param[in] p_reg Pointer to the peripheral register structure. + * + * @retval true If QSPI is busy. + * @retval false If QSPI is ready. + */ +__STATIC_INLINE bool nrf_qspi_busy_check(NRF_QSPI_Type const * p_reg); + +/** + * @brief Function for setting registers sending with custom instruction transmission. + * + * This function can be ommited when using NRF_QSPI_CINSTR_LEN_1B as the length argument + * (sending only opcode without data). + * + * @param[in] p_reg Pointer to the peripheral register structure. + * @param[in] length Length of the custom instruction data. + * @param[in] p_tx_data Pointer to the data to send with the custom instruction. + */ +__STATIC_INLINE void nrf_qspi_cinstrdata_set(NRF_QSPI_Type * p_reg, + nrf_qspi_cinstr_len_t length, + void const * p_tx_data); + +/** + * @brief Function for getting data from register after custom instruction transmission. + * @param[in] p_reg Pointer to the peripheral register structure. + * @param[in] length Length of the custom instruction data. + * @param[in] p_rx_data Pointer to the reading buffer. + */ +__STATIC_INLINE void nrf_qspi_cinstrdata_get(NRF_QSPI_Type const * p_reg, + nrf_qspi_cinstr_len_t length, + void * p_rx_data); + +/** + * @brief Function for sending custom instruction to external memory. + * + * @param[in] p_reg Pointer to the peripheral register structure. + * @param[in] p_config Pointer to the custom instruction configuration structure. See @ref nrf_qspi_cinstr_conf_t. + */ + +__STATIC_INLINE void nrf_qspi_cinstr_transfer_start(NRF_QSPI_Type * p_reg, + const nrf_qspi_cinstr_conf_t * p_config); + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE void nrf_qspi_task_trigger(NRF_QSPI_Type * p_reg, nrf_qspi_task_t task) +{ + *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL; +} + +__STATIC_INLINE uint32_t nrf_qspi_task_address_get(NRF_QSPI_Type const * p_reg, + nrf_qspi_task_t task) +{ + return ((uint32_t)p_reg + (uint32_t)task); +} + +__STATIC_INLINE void nrf_qspi_event_clear(NRF_QSPI_Type * p_reg, nrf_qspi_event_t qspi_event) +{ + *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)qspi_event)) = 0x0UL; +} + +__STATIC_INLINE bool nrf_qspi_event_check(NRF_QSPI_Type const * p_reg, nrf_qspi_event_t qspi_event) +{ + return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)qspi_event); +} + +__STATIC_INLINE uint32_t * nrf_qspi_event_address_get(NRF_QSPI_Type const * p_reg, + nrf_qspi_event_t qspi_event) +{ + return (uint32_t *)((uint8_t *)p_reg + (uint32_t)qspi_event); +} + +__STATIC_INLINE void nrf_qspi_int_enable(NRF_QSPI_Type * p_reg, uint32_t qspi_int_mask) +{ + p_reg->INTENSET = qspi_int_mask; +} + +__STATIC_INLINE void nrf_qspi_int_disable(NRF_QSPI_Type * p_reg, uint32_t qspi_int_mask) +{ + p_reg->INTENCLR = qspi_int_mask; +} + +__STATIC_INLINE bool nrf_qspi_int_enable_check(NRF_QSPI_Type const * p_reg, + nrf_qspi_int_mask_t qspi_int) +{ + return (bool)(p_reg->INTENSET & qspi_int); +} + +__STATIC_INLINE void nrf_qspi_enable(NRF_QSPI_Type * p_reg) +{ + p_reg->ENABLE = (QSPI_ENABLE_ENABLE_Enabled << QSPI_ENABLE_ENABLE_Pos); +} + +__STATIC_INLINE void nrf_qspi_disable(NRF_QSPI_Type * p_reg) +{ + p_reg->ENABLE = (QSPI_ENABLE_ENABLE_Disabled << QSPI_ENABLE_ENABLE_Pos); +} + +__STATIC_INLINE void nrf_qspi_pins_set(NRF_QSPI_Type * p_reg, const nrf_qspi_pins_t * p_pins) +{ + p_reg->PSEL.SCK = NRF_QSPI_PIN_VAL(p_pins->sck_pin); + p_reg->PSEL.CSN = NRF_QSPI_PIN_VAL(p_pins->csn_pin); + p_reg->PSEL.IO0 = NRF_QSPI_PIN_VAL(p_pins->io0_pin); + p_reg->PSEL.IO1 = NRF_QSPI_PIN_VAL(p_pins->io1_pin); + p_reg->PSEL.IO2 = NRF_QSPI_PIN_VAL(p_pins->io2_pin); + p_reg->PSEL.IO3 = NRF_QSPI_PIN_VAL(p_pins->io3_pin); +} + +__STATIC_INLINE void nrf_qspi_xip_offset_set(NRF_QSPI_Type * p_reg, + uint32_t xip_offset) +{ + p_reg->XIPOFFSET = xip_offset; +} + +__STATIC_INLINE void nrf_qspi_ifconfig0_set(NRF_QSPI_Type * p_reg, + const nrf_qspi_prot_conf_t * p_config) +{ + uint32_t config = p_config->readoc; + config |= ((uint32_t)p_config->writeoc) << QSPI_IFCONFIG0_WRITEOC_Pos; + config |= ((uint32_t)p_config->addrmode) << QSPI_IFCONFIG0_ADDRMODE_Pos; + config |= (p_config->dpmconfig ? 1U : 0U ) << QSPI_IFCONFIG0_DPMENABLE_Pos; + + p_reg->IFCONFIG0 = config; +} + +__STATIC_INLINE void nrf_qspi_ifconfig1_set(NRF_QSPI_Type * p_reg, + const nrf_qspi_phy_conf_t * p_config) +{ + // IFCONFIG1 mask for reserved fields in the register. + uint32_t config = p_reg->IFCONFIG1 & 0x00FFFF00; + config |= p_config->sck_delay; + config |= (p_config->dpmen ? 1U : 0U) << QSPI_IFCONFIG1_DPMEN_Pos; + config |= ((uint32_t)(p_config->spi_mode)) << QSPI_IFCONFIG1_SPIMODE_Pos; + config |= ((uint32_t)(p_config->sck_freq)) << QSPI_IFCONFIG1_SCKFREQ_Pos; + + p_reg->IFCONFIG1 = config; +} + +__STATIC_INLINE void nrf_qspi_addrconfig_set(NRF_QSPI_Type * p_reg, + const nrf_qspi_addrconfig_conf_t * p_config) +{ + uint32_t config = p_config->opcode; + config |= ((uint32_t)p_config->byte0) << QSPI_ADDRCONF_BYTE0_Pos; + config |= ((uint32_t)p_config->byte1) << QSPI_ADDRCONF_BYTE1_Pos; + config |= ((uint32_t)(p_config->mode)) << QSPI_ADDRCONF_MODE_Pos; + config |= (p_config->wipwait ? 1U : 0U) << QSPI_ADDRCONF_WIPWAIT_Pos; + config |= (p_config->wren ? 1U : 0U) << QSPI_ADDRCONF_WREN_Pos; + + p_reg->ADDRCONF = config; +} + +__STATIC_INLINE void nrf_qspi_write_buffer_set(NRF_QSPI_Type * p_reg, + void const * p_buffer, + uint32_t length, + uint32_t dest_addr) +{ + p_reg->WRITE.DST = dest_addr; + p_reg->WRITE.SRC = (uint32_t) p_buffer; + p_reg->WRITE.CNT = length; +} + +__STATIC_INLINE void nrf_qspi_read_buffer_set(NRF_QSPI_Type * p_reg, + void * p_buffer, + uint32_t length, + uint32_t src_addr) +{ + p_reg->READ.SRC = src_addr; + p_reg->READ.DST = (uint32_t) p_buffer; + p_reg->READ.CNT = length; +} + +__STATIC_INLINE void nrf_qspi_erase_ptr_set(NRF_QSPI_Type * p_reg, + uint32_t erase_addr, + nrf_qspi_erase_len_t len) +{ + p_reg->ERASE.PTR = erase_addr; + p_reg->ERASE.LEN = len; +} + +__STATIC_INLINE uint32_t nrf_qspi_status_reg_get(NRF_QSPI_Type const * p_reg) +{ + return p_reg->STATUS; +} + +__STATIC_INLINE uint8_t nrf_qspi_sreg_get(NRF_QSPI_Type const * p_reg) +{ + return (uint8_t)(p_reg->STATUS & QSPI_STATUS_SREG_Msk) >> QSPI_STATUS_SREG_Pos; +} + +__STATIC_INLINE bool nrf_qspi_busy_check(NRF_QSPI_Type const * p_reg) +{ + return ((p_reg->STATUS & QSPI_STATUS_READY_Msk) >> + QSPI_STATUS_READY_Pos) == QSPI_STATUS_READY_BUSY; +} + +__STATIC_INLINE void nrf_qspi_cinstrdata_set(NRF_QSPI_Type * p_reg, + nrf_qspi_cinstr_len_t length, + void const * p_tx_data) +{ + uint32_t reg = 0; + uint8_t const *p_tx_data_8 = (uint8_t const *) p_tx_data; + + // Load custom instruction. + switch (length) + { + case NRF_QSPI_CINSTR_LEN_9B: + reg |= ((uint32_t)p_tx_data_8[7]) << QSPI_CINSTRDAT1_BYTE7_Pos; + /* fall-through */ + case NRF_QSPI_CINSTR_LEN_8B: + reg |= ((uint32_t)p_tx_data_8[6]) << QSPI_CINSTRDAT1_BYTE6_Pos; + /* fall-through */ + case NRF_QSPI_CINSTR_LEN_7B: + reg |= ((uint32_t)p_tx_data_8[5]) << QSPI_CINSTRDAT1_BYTE5_Pos; + /* fall-through */ + case NRF_QSPI_CINSTR_LEN_6B: + reg |= ((uint32_t)p_tx_data_8[4]); + p_reg->CINSTRDAT1 = reg; + reg = 0; + /* fall-through */ + case NRF_QSPI_CINSTR_LEN_5B: + reg |= ((uint32_t)p_tx_data_8[3]) << QSPI_CINSTRDAT0_BYTE3_Pos; + /* fall-through */ + case NRF_QSPI_CINSTR_LEN_4B: + reg |= ((uint32_t)p_tx_data_8[2]) << QSPI_CINSTRDAT0_BYTE2_Pos; + /* fall-through */ + case NRF_QSPI_CINSTR_LEN_3B: + reg |= ((uint32_t)p_tx_data_8[1]) << QSPI_CINSTRDAT0_BYTE1_Pos; + /* fall-through */ + case NRF_QSPI_CINSTR_LEN_2B: + reg |= ((uint32_t)p_tx_data_8[0]); + p_reg->CINSTRDAT0 = reg; + /* fall-through */ + case NRF_QSPI_CINSTR_LEN_1B: + /* Send only opcode. Case to avoid compiler warnings. */ + break; + default: + break; + } +} + +__STATIC_INLINE void nrf_qspi_cinstrdata_get(NRF_QSPI_Type const * p_reg, + nrf_qspi_cinstr_len_t length, + void * p_rx_data) +{ + uint8_t *p_rx_data_8 = (uint8_t *) p_rx_data; + + uint32_t reg = p_reg->CINSTRDAT1; + switch (length) + { + case NRF_QSPI_CINSTR_LEN_9B: + p_rx_data_8[7] = (uint8_t)(reg >> QSPI_CINSTRDAT1_BYTE7_Pos); + /* fall-through */ + case NRF_QSPI_CINSTR_LEN_8B: + p_rx_data_8[6] = (uint8_t)(reg >> QSPI_CINSTRDAT1_BYTE6_Pos); + /* fall-through */ + case NRF_QSPI_CINSTR_LEN_7B: + p_rx_data_8[5] = (uint8_t)(reg >> QSPI_CINSTRDAT1_BYTE5_Pos); + /* fall-through */ + case NRF_QSPI_CINSTR_LEN_6B: + p_rx_data_8[4] = (uint8_t)(reg); + /* fall-through */ + default: + break; + } + + reg = p_reg->CINSTRDAT0; + switch (length) + { + case NRF_QSPI_CINSTR_LEN_5B: + p_rx_data_8[3] = (uint8_t)(reg >> QSPI_CINSTRDAT0_BYTE3_Pos); + /* fall-through */ + case NRF_QSPI_CINSTR_LEN_4B: + p_rx_data_8[2] = (uint8_t)(reg >> QSPI_CINSTRDAT0_BYTE2_Pos); + /* fall-through */ + case NRF_QSPI_CINSTR_LEN_3B: + p_rx_data_8[1] = (uint8_t)(reg >> QSPI_CINSTRDAT0_BYTE1_Pos); + /* fall-through */ + case NRF_QSPI_CINSTR_LEN_2B: + p_rx_data_8[0] = (uint8_t)(reg); + /* fall-through */ + case NRF_QSPI_CINSTR_LEN_1B: + /* Send only opcode. Case to avoid compiler warnings. */ + break; + default: + break; + } +} + +__STATIC_INLINE void nrf_qspi_cinstr_transfer_start(NRF_QSPI_Type * p_reg, + const nrf_qspi_cinstr_conf_t * p_config) +{ + p_reg->CINSTRCONF = (((uint32_t)p_config->opcode << QSPI_CINSTRCONF_OPCODE_Pos) | + ((uint32_t)p_config->length << QSPI_CINSTRCONF_LENGTH_Pos) | + ((uint32_t)p_config->io2_level << QSPI_CINSTRCONF_LIO2_Pos) | + ((uint32_t)p_config->io3_level << QSPI_CINSTRCONF_LIO3_Pos) | + ((uint32_t)p_config->wipwait << QSPI_CINSTRCONF_WIPWAIT_Pos) | + ((uint32_t)p_config->wren << QSPI_CINSTRCONF_WREN_Pos)); +} + +#endif // SUPPRESS_INLINE_IMPLEMENTATION + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_QSPI_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_rng.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_rng.h new file mode 100644 index 00000000000..62f60c02b94 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_rng.h @@ -0,0 +1,274 @@ +/** + * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_RNG_H__ +#define NRF_RNG_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_rng_hal RNG HAL + * @{ + * @ingroup nrf_rng + * @brief Hardware access layer for managing the Random Number Generator (RNG) peripheral. + */ + +#define NRF_RNG_TASK_SET (1UL) +#define NRF_RNG_EVENT_CLEAR (0UL) +/** + * @enum nrf_rng_task_t + * @brief RNG tasks. + */ +typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ +{ + NRF_RNG_TASK_START = offsetof(NRF_RNG_Type, TASKS_START), /**< Start the random number generator. */ + NRF_RNG_TASK_STOP = offsetof(NRF_RNG_Type, TASKS_STOP) /**< Stop the random number generator. */ +} nrf_rng_task_t; /*lint -restore */ + +/** + * @enum nrf_rng_event_t + * @brief RNG events. + */ +typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ +{ + NRF_RNG_EVENT_VALRDY = offsetof(NRF_RNG_Type, EVENTS_VALRDY) /**< New random number generated event. */ +} nrf_rng_event_t; /*lint -restore */ + +/** + * @enum nrf_rng_int_mask_t + * @brief RNG interrupts. + */ +typedef enum +{ + NRF_RNG_INT_VALRDY_MASK = RNG_INTENSET_VALRDY_Msk /**< Mask for enabling or disabling an interrupt on VALRDY event. */ +} nrf_rng_int_mask_t; + +/** + * @enum nrf_rng_short_mask_t + * @brief Types of RNG shortcuts. + */ +typedef enum +{ + NRF_RNG_SHORT_VALRDY_STOP_MASK = RNG_SHORTS_VALRDY_STOP_Msk /**< Mask for setting shortcut between EVENT_VALRDY and TASK_STOP. */ +} nrf_rng_short_mask_t; + +/** + * @brief Function for enabling interrupts. + * + * @param[in] rng_int_mask Mask of interrupts. + */ +__STATIC_INLINE void nrf_rng_int_enable(uint32_t rng_int_mask); + +/** + * @brief Function for disabling interrupts. + * + * @param[in] rng_int_mask Mask of interrupts. + */ +__STATIC_INLINE void nrf_rng_int_disable(uint32_t rng_int_mask); + +/** + * @brief Function for getting the state of a specific interrupt. + * + * @param[in] rng_int_mask Interrupt. + * + * @retval true If the interrupt is not enabled. + * @retval false If the interrupt is enabled. + */ +__STATIC_INLINE bool nrf_rng_int_get(nrf_rng_int_mask_t rng_int_mask); + +/** + * @brief Function for getting the address of a specific task. + * + * This function can be used by the PPI module. + * + * @param[in] rng_task Task. + */ +__STATIC_INLINE uint32_t * nrf_rng_task_address_get(nrf_rng_task_t rng_task); + +/** + * @brief Function for setting a specific task. + * + * @param[in] rng_task Task. + */ +__STATIC_INLINE void nrf_rng_task_trigger(nrf_rng_task_t rng_task); + +/** + * @brief Function for getting address of a specific event. + * + * This function can be used by the PPI module. + * + * @param[in] rng_event Event. + */ +__STATIC_INLINE uint32_t * nrf_rng_event_address_get(nrf_rng_event_t rng_event); + +/** + * @brief Function for clearing a specific event. + * + * @param[in] rng_event Event. + */ +__STATIC_INLINE void nrf_rng_event_clear(nrf_rng_event_t rng_event); + +/** + * @brief Function for getting the state of a specific event. + * + * @param[in] rng_event Event. + * + * @retval true If the event is not set. + * @retval false If the event is set. + */ +__STATIC_INLINE bool nrf_rng_event_get(nrf_rng_event_t rng_event); + +/** + * @brief Function for setting shortcuts. + * + * @param[in] rng_short_mask Mask of shortcuts. + * + */ +__STATIC_INLINE void nrf_rng_shorts_enable(uint32_t rng_short_mask); + +/** + * @brief Function for clearing shortcuts. + * + * @param[in] rng_short_mask Mask of shortcuts. + * + */ +__STATIC_INLINE void nrf_rng_shorts_disable(uint32_t rng_short_mask); + +/** + * @brief Function for getting the previously generated random value. + * + * @return Previously generated random value. + */ +__STATIC_INLINE uint8_t nrf_rng_random_value_get(void); + +/** + * @brief Function for enabling digital error correction. + */ +__STATIC_INLINE void nrf_rng_error_correction_enable(void); + +/** + * @brief Function for disabling digital error correction. + */ +__STATIC_INLINE void nrf_rng_error_correction_disable(void); + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE void nrf_rng_int_enable(uint32_t rng_int_mask) +{ + NRF_RNG->INTENSET = rng_int_mask; +} + +__STATIC_INLINE void nrf_rng_int_disable(uint32_t rng_int_mask) +{ + NRF_RNG->INTENCLR = rng_int_mask; +} + +__STATIC_INLINE bool nrf_rng_int_get(nrf_rng_int_mask_t rng_int_mask) +{ + return (bool)(NRF_RNG->INTENCLR & rng_int_mask); +} + +__STATIC_INLINE uint32_t * nrf_rng_task_address_get(nrf_rng_task_t rng_task) +{ + return (uint32_t *)((uint8_t *)NRF_RNG + rng_task); +} + +__STATIC_INLINE void nrf_rng_task_trigger(nrf_rng_task_t rng_task) +{ + *((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_task)) = NRF_RNG_TASK_SET; +} + +__STATIC_INLINE uint32_t * nrf_rng_event_address_get(nrf_rng_event_t rng_event) +{ + return (uint32_t *)((uint8_t *)NRF_RNG + rng_event); +} + +__STATIC_INLINE void nrf_rng_event_clear(nrf_rng_event_t rng_event) +{ + *((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event)) = NRF_RNG_EVENT_CLEAR; +#if __CORTEX_M == 0x04 + volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event)); + (void)dummy; +#endif +} + +__STATIC_INLINE bool nrf_rng_event_get(nrf_rng_event_t rng_event) +{ + return (bool) * ((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event)); +} + +__STATIC_INLINE void nrf_rng_shorts_enable(uint32_t rng_short_mask) +{ + NRF_RNG->SHORTS |= rng_short_mask; +} + +__STATIC_INLINE void nrf_rng_shorts_disable(uint32_t rng_short_mask) +{ + NRF_RNG->SHORTS &= ~rng_short_mask; +} + +__STATIC_INLINE uint8_t nrf_rng_random_value_get(void) +{ + return (uint8_t)(NRF_RNG->VALUE & RNG_VALUE_VALUE_Msk); +} + +__STATIC_INLINE void nrf_rng_error_correction_enable(void) +{ + NRF_RNG->CONFIG |= RNG_CONFIG_DERCEN_Msk; +} + +__STATIC_INLINE void nrf_rng_error_correction_disable(void) +{ + NRF_RNG->CONFIG &= ~RNG_CONFIG_DERCEN_Msk; +} + +#endif + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_RNG_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_rtc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_rtc.h new file mode 100644 index 00000000000..d4770d5e48c --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_rtc.h @@ -0,0 +1,330 @@ +/** + * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_RTC_H +#define NRF_RTC_H + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_rtc_hal RTC HAL + * @{ + * @ingroup nrf_rtc + * @brief Hardware access layer for managing the Real Time Counter (RTC) peripheral. + */ + +/** + * @brief Macro for getting the number of compare channels available + * in a given RTC instance. + */ + +#define NRF_RTC_CC_CHANNEL_COUNT(id) NRFX_CONCAT_3(RTC, id, _CC_NUM) + +#define RTC_INPUT_FREQ 32768 /**< Input frequency of the RTC instance. */ + +/** + * @brief Macro for converting expected frequency to prescaler setting. + */ +#define RTC_FREQ_TO_PRESCALER(FREQ) (uint16_t)(((RTC_INPUT_FREQ) / (FREQ)) - 1) + +/**< Macro for wrapping values to RTC capacity. */ +#define RTC_WRAP(val) ((val) & RTC_COUNTER_COUNTER_Msk) + +#define RTC_CHANNEL_INT_MASK(ch) ((uint32_t)(NRF_RTC_INT_COMPARE0_MASK) << (ch)) +#define RTC_CHANNEL_EVENT_ADDR(ch) (nrf_rtc_event_t)((NRF_RTC_EVENT_COMPARE_0) + (ch) * sizeof(uint32_t)) +/** + * @enum nrf_rtc_task_t + * @brief RTC tasks. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_RTC_TASK_START = offsetof(NRF_RTC_Type,TASKS_START), /**< Start. */ + NRF_RTC_TASK_STOP = offsetof(NRF_RTC_Type,TASKS_STOP), /**< Stop. */ + NRF_RTC_TASK_CLEAR = offsetof(NRF_RTC_Type,TASKS_CLEAR), /**< Clear. */ + NRF_RTC_TASK_TRIGGER_OVERFLOW = offsetof(NRF_RTC_Type,TASKS_TRIGOVRFLW),/**< Trigger overflow. */ + /*lint -restore*/ +} nrf_rtc_task_t; + +/** + * @enum nrf_rtc_event_t + * @brief RTC events. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_RTC_EVENT_TICK = offsetof(NRF_RTC_Type,EVENTS_TICK), /**< Tick event. */ + NRF_RTC_EVENT_OVERFLOW = offsetof(NRF_RTC_Type,EVENTS_OVRFLW), /**< Overflow event. */ + NRF_RTC_EVENT_COMPARE_0 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[0]), /**< Compare 0 event. */ + NRF_RTC_EVENT_COMPARE_1 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[1]), /**< Compare 1 event. */ + NRF_RTC_EVENT_COMPARE_2 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[2]), /**< Compare 2 event. */ + NRF_RTC_EVENT_COMPARE_3 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[3]) /**< Compare 3 event. */ + /*lint -restore*/ +} nrf_rtc_event_t; + +/** + * @enum nrf_rtc_int_t + * @brief RTC interrupts. + */ +typedef enum +{ + NRF_RTC_INT_TICK_MASK = RTC_INTENSET_TICK_Msk, /**< RTC interrupt from tick event. */ + NRF_RTC_INT_OVERFLOW_MASK = RTC_INTENSET_OVRFLW_Msk, /**< RTC interrupt from overflow event. */ + NRF_RTC_INT_COMPARE0_MASK = RTC_INTENSET_COMPARE0_Msk, /**< RTC interrupt from compare event on channel 0. */ + NRF_RTC_INT_COMPARE1_MASK = RTC_INTENSET_COMPARE1_Msk, /**< RTC interrupt from compare event on channel 1. */ + NRF_RTC_INT_COMPARE2_MASK = RTC_INTENSET_COMPARE2_Msk, /**< RTC interrupt from compare event on channel 2. */ + NRF_RTC_INT_COMPARE3_MASK = RTC_INTENSET_COMPARE3_Msk /**< RTC interrupt from compare event on channel 3. */ +} nrf_rtc_int_t; + +/**@brief Function for setting a compare value for a channel. + * + * @param[in] p_rtc Pointer to the peripheral registers structure. + * @param[in] ch Channel. + * @param[in] cc_val Compare value to set. + */ +__STATIC_INLINE void nrf_rtc_cc_set(NRF_RTC_Type * p_rtc, uint32_t ch, uint32_t cc_val); + +/**@brief Function for returning the compare value for a channel. + * + * @param[in] p_rtc Pointer to the peripheral registers structure. + * @param[in] ch Channel. + * + * @return COMPARE[ch] value. + */ +__STATIC_INLINE uint32_t nrf_rtc_cc_get(NRF_RTC_Type * p_rtc, uint32_t ch); + +/**@brief Function for enabling interrupts. + * + * @param[in] p_rtc Pointer to the peripheral registers structure. + * @param[in] mask Interrupt mask to be enabled. + */ +__STATIC_INLINE void nrf_rtc_int_enable(NRF_RTC_Type * p_rtc, uint32_t mask); + +/**@brief Function for disabling interrupts. + * + * @param[in] p_rtc Pointer to the peripheral registers structure. + * @param[in] mask Interrupt mask to be disabled. + */ +__STATIC_INLINE void nrf_rtc_int_disable(NRF_RTC_Type * p_rtc, uint32_t mask); + +/**@brief Function for checking if interrupts are enabled. + * + * @param[in] p_rtc Pointer to the peripheral registers structure. + * @param[in] mask Mask of interrupt flags to check. + * + * @return Mask with enabled interrupts. + */ +__STATIC_INLINE uint32_t nrf_rtc_int_is_enabled(NRF_RTC_Type * p_rtc, uint32_t mask); + +/**@brief Function for returning the status of currently enabled interrupts. + * + * @param[in] p_rtc Pointer to the peripheral registers structure. + * + * @return Value in INTEN register. + */ +__STATIC_INLINE uint32_t nrf_rtc_int_get(NRF_RTC_Type * p_rtc); + +/**@brief Function for checking if an event is pending. + * + * @param[in] p_rtc Pointer to the peripheral registers structure. + * @param[in] event Address of the event. + * + * @return Mask of pending events. + */ +__STATIC_INLINE uint32_t nrf_rtc_event_pending(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event); + +/**@brief Function for clearing an event. + * + * @param[in] p_rtc Pointer to the peripheral registers structure. + * @param[in] event Event to clear. + */ +__STATIC_INLINE void nrf_rtc_event_clear(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event); + +/**@brief Function for returning a counter value. + * + * @param[in] p_rtc Pointer to the peripheral registers structure. + * + * @return Counter value. + */ +__STATIC_INLINE uint32_t nrf_rtc_counter_get(NRF_RTC_Type * p_rtc); + +/**@brief Function for setting a prescaler value. + * + * @param[in] p_rtc Pointer to the peripheral registers structure. + * @param[in] val Value to set the prescaler to. + */ +__STATIC_INLINE void nrf_rtc_prescaler_set(NRF_RTC_Type * p_rtc, uint32_t val); + +/**@brief Function for returning the address of an event. + * + * @param[in] p_rtc Pointer to the peripheral registers structure. + * @param[in] event Requested event. + * + * @return Address of the requested event register. + */ +__STATIC_INLINE uint32_t nrf_rtc_event_address_get(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event); + +/**@brief Function for returning the address of a task. + * + * @param[in] p_rtc Pointer to the peripheral registers structure. + * @param[in] task Requested task. + * + * @return Address of the requested task register. + */ +__STATIC_INLINE uint32_t nrf_rtc_task_address_get(NRF_RTC_Type * p_rtc, nrf_rtc_task_t task); + +/**@brief Function for starting a task. + * + * @param[in] p_rtc Pointer to the peripheral registers structure. + * @param[in] task Requested task. + */ +__STATIC_INLINE void nrf_rtc_task_trigger(NRF_RTC_Type * p_rtc, nrf_rtc_task_t task); + +/**@brief Function for enabling events. + * + * @param[in] p_rtc Pointer to the peripheral registers structure. + * @param[in] mask Mask of event flags to enable. + */ +__STATIC_INLINE void nrf_rtc_event_enable(NRF_RTC_Type * p_rtc, uint32_t mask); + +/**@brief Function for disabling an event. + * + * @param[in] p_rtc Pointer to the peripheral registers structure. + * @param[in] event Requested event. + */ +__STATIC_INLINE void nrf_rtc_event_disable(NRF_RTC_Type * p_rtc, uint32_t event); + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE void nrf_rtc_cc_set(NRF_RTC_Type * p_rtc, uint32_t ch, uint32_t cc_val) +{ + p_rtc->CC[ch] = cc_val; +} + +__STATIC_INLINE uint32_t nrf_rtc_cc_get(NRF_RTC_Type * p_rtc, uint32_t ch) +{ + return p_rtc->CC[ch]; +} + +__STATIC_INLINE void nrf_rtc_int_enable(NRF_RTC_Type * p_rtc, uint32_t mask) +{ + p_rtc->INTENSET = mask; +} + +__STATIC_INLINE void nrf_rtc_int_disable(NRF_RTC_Type * p_rtc, uint32_t mask) +{ + p_rtc->INTENCLR = mask; +} + +__STATIC_INLINE uint32_t nrf_rtc_int_is_enabled(NRF_RTC_Type * p_rtc, uint32_t mask) +{ + return (p_rtc->INTENSET & mask); +} + +__STATIC_INLINE uint32_t nrf_rtc_int_get(NRF_RTC_Type * p_rtc) +{ + return p_rtc->INTENSET; +} + +__STATIC_INLINE uint32_t nrf_rtc_event_pending(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event) +{ + return *(volatile uint32_t *)((uint8_t *)p_rtc + (uint32_t)event); +} + +__STATIC_INLINE void nrf_rtc_event_clear(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event) +{ + *((volatile uint32_t *)((uint8_t *)p_rtc + (uint32_t)event)) = 0; +#if __CORTEX_M == 0x04 + volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_rtc + (uint32_t)event)); + (void)dummy; +#endif +} + +__STATIC_INLINE uint32_t nrf_rtc_counter_get(NRF_RTC_Type * p_rtc) +{ + return p_rtc->COUNTER; +} + +__STATIC_INLINE void nrf_rtc_prescaler_set(NRF_RTC_Type * p_rtc, uint32_t val) +{ + NRFX_ASSERT(val <= (RTC_PRESCALER_PRESCALER_Msk >> RTC_PRESCALER_PRESCALER_Pos)); + p_rtc->PRESCALER = val; +} +__STATIC_INLINE uint32_t rtc_prescaler_get(NRF_RTC_Type * p_rtc) +{ + return p_rtc->PRESCALER; +} + +__STATIC_INLINE uint32_t nrf_rtc_event_address_get(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event) +{ + return (uint32_t)p_rtc + event; +} + +__STATIC_INLINE uint32_t nrf_rtc_task_address_get(NRF_RTC_Type * p_rtc, nrf_rtc_task_t task) +{ + return (uint32_t)p_rtc + task; +} + +__STATIC_INLINE void nrf_rtc_task_trigger(NRF_RTC_Type * p_rtc, nrf_rtc_task_t task) +{ + *(__IO uint32_t *)((uint32_t)p_rtc + task) = 1; +} + +__STATIC_INLINE void nrf_rtc_event_enable(NRF_RTC_Type * p_rtc, uint32_t mask) +{ + p_rtc->EVTENSET = mask; +} +__STATIC_INLINE void nrf_rtc_event_disable(NRF_RTC_Type * p_rtc, uint32_t mask) +{ + p_rtc->EVTENCLR = mask; +} +#endif + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_RTC_H */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_saadc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_saadc.h new file mode 100644 index 00000000000..fe8835683f8 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_saadc.h @@ -0,0 +1,615 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_SAADC_H_ +#define NRF_SAADC_H_ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_saadc_hal SAADC HAL + * @{ + * @ingroup nrf_saadc + * @brief Hardware access layer for managing the SAADC peripheral. + */ + +#define NRF_SAADC_CHANNEL_COUNT 8 + +/** + * @brief Resolution of the analog-to-digital converter. + */ +typedef enum +{ + NRF_SAADC_RESOLUTION_8BIT = SAADC_RESOLUTION_VAL_8bit, ///< 8 bit resolution. + NRF_SAADC_RESOLUTION_10BIT = SAADC_RESOLUTION_VAL_10bit, ///< 10 bit resolution. + NRF_SAADC_RESOLUTION_12BIT = SAADC_RESOLUTION_VAL_12bit, ///< 12 bit resolution. + NRF_SAADC_RESOLUTION_14BIT = SAADC_RESOLUTION_VAL_14bit ///< 14 bit resolution. +} nrf_saadc_resolution_t; + + +/** + * @brief Input selection for the analog-to-digital converter. + */ +typedef enum +{ + NRF_SAADC_INPUT_DISABLED = SAADC_CH_PSELP_PSELP_NC, ///< Not connected. + NRF_SAADC_INPUT_AIN0 = SAADC_CH_PSELP_PSELP_AnalogInput0, ///< Analog input 0 (AIN0). + NRF_SAADC_INPUT_AIN1 = SAADC_CH_PSELP_PSELP_AnalogInput1, ///< Analog input 1 (AIN1). + NRF_SAADC_INPUT_AIN2 = SAADC_CH_PSELP_PSELP_AnalogInput2, ///< Analog input 2 (AIN2). + NRF_SAADC_INPUT_AIN3 = SAADC_CH_PSELP_PSELP_AnalogInput3, ///< Analog input 3 (AIN3). + NRF_SAADC_INPUT_AIN4 = SAADC_CH_PSELP_PSELP_AnalogInput4, ///< Analog input 4 (AIN4). + NRF_SAADC_INPUT_AIN5 = SAADC_CH_PSELP_PSELP_AnalogInput5, ///< Analog input 5 (AIN5). + NRF_SAADC_INPUT_AIN6 = SAADC_CH_PSELP_PSELP_AnalogInput6, ///< Analog input 6 (AIN6). + NRF_SAADC_INPUT_AIN7 = SAADC_CH_PSELP_PSELP_AnalogInput7, ///< Analog input 7 (AIN7). + NRF_SAADC_INPUT_VDD = SAADC_CH_PSELP_PSELP_VDD ///< VDD as input. +} nrf_saadc_input_t; + + +/** + * @brief Analog-to-digital converter oversampling mode. + */ +typedef enum +{ + NRF_SAADC_OVERSAMPLE_DISABLED = SAADC_OVERSAMPLE_OVERSAMPLE_Bypass, ///< No oversampling. + NRF_SAADC_OVERSAMPLE_2X = SAADC_OVERSAMPLE_OVERSAMPLE_Over2x, ///< Oversample 2x. + NRF_SAADC_OVERSAMPLE_4X = SAADC_OVERSAMPLE_OVERSAMPLE_Over4x, ///< Oversample 4x. + NRF_SAADC_OVERSAMPLE_8X = SAADC_OVERSAMPLE_OVERSAMPLE_Over8x, ///< Oversample 8x. + NRF_SAADC_OVERSAMPLE_16X = SAADC_OVERSAMPLE_OVERSAMPLE_Over16x, ///< Oversample 16x. + NRF_SAADC_OVERSAMPLE_32X = SAADC_OVERSAMPLE_OVERSAMPLE_Over32x, ///< Oversample 32x. + NRF_SAADC_OVERSAMPLE_64X = SAADC_OVERSAMPLE_OVERSAMPLE_Over64x, ///< Oversample 64x. + NRF_SAADC_OVERSAMPLE_128X = SAADC_OVERSAMPLE_OVERSAMPLE_Over128x, ///< Oversample 128x. + NRF_SAADC_OVERSAMPLE_256X = SAADC_OVERSAMPLE_OVERSAMPLE_Over256x ///< Oversample 256x. +} nrf_saadc_oversample_t; + + +/** + * @brief Analog-to-digital converter channel resistor control. + */ +typedef enum +{ + NRF_SAADC_RESISTOR_DISABLED = SAADC_CH_CONFIG_RESP_Bypass, ///< Bypass resistor ladder. + NRF_SAADC_RESISTOR_PULLDOWN = SAADC_CH_CONFIG_RESP_Pulldown, ///< Pull-down to GND. + NRF_SAADC_RESISTOR_PULLUP = SAADC_CH_CONFIG_RESP_Pullup, ///< Pull-up to VDD. + NRF_SAADC_RESISTOR_VDD1_2 = SAADC_CH_CONFIG_RESP_VDD1_2 ///< Set input at VDD/2. +} nrf_saadc_resistor_t; + + +/** + * @brief Gain factor of the analog-to-digital converter input. + */ +typedef enum +{ + NRF_SAADC_GAIN1_6 = SAADC_CH_CONFIG_GAIN_Gain1_6, ///< Gain factor 1/6. + NRF_SAADC_GAIN1_5 = SAADC_CH_CONFIG_GAIN_Gain1_5, ///< Gain factor 1/5. + NRF_SAADC_GAIN1_4 = SAADC_CH_CONFIG_GAIN_Gain1_4, ///< Gain factor 1/4. + NRF_SAADC_GAIN1_3 = SAADC_CH_CONFIG_GAIN_Gain1_3, ///< Gain factor 1/3. + NRF_SAADC_GAIN1_2 = SAADC_CH_CONFIG_GAIN_Gain1_2, ///< Gain factor 1/2. + NRF_SAADC_GAIN1 = SAADC_CH_CONFIG_GAIN_Gain1, ///< Gain factor 1. + NRF_SAADC_GAIN2 = SAADC_CH_CONFIG_GAIN_Gain2, ///< Gain factor 2. + NRF_SAADC_GAIN4 = SAADC_CH_CONFIG_GAIN_Gain4, ///< Gain factor 4. +} nrf_saadc_gain_t; + + +/** + * @brief Reference selection for the analog-to-digital converter. + */ +typedef enum +{ + NRF_SAADC_REFERENCE_INTERNAL = SAADC_CH_CONFIG_REFSEL_Internal, ///< Internal reference (0.6 V). + NRF_SAADC_REFERENCE_VDD4 = SAADC_CH_CONFIG_REFSEL_VDD1_4 ///< VDD/4 as reference. +} nrf_saadc_reference_t; + + +/** + * @brief Analog-to-digital converter acquisition time. + */ +typedef enum +{ + NRF_SAADC_ACQTIME_3US = SAADC_CH_CONFIG_TACQ_3us, ///< 3 us. + NRF_SAADC_ACQTIME_5US = SAADC_CH_CONFIG_TACQ_5us, ///< 5 us. + NRF_SAADC_ACQTIME_10US = SAADC_CH_CONFIG_TACQ_10us, ///< 10 us. + NRF_SAADC_ACQTIME_15US = SAADC_CH_CONFIG_TACQ_15us, ///< 15 us. + NRF_SAADC_ACQTIME_20US = SAADC_CH_CONFIG_TACQ_20us, ///< 20 us. + NRF_SAADC_ACQTIME_40US = SAADC_CH_CONFIG_TACQ_40us ///< 40 us. +} nrf_saadc_acqtime_t; + + +/** + * @brief Analog-to-digital converter channel mode. + */ +typedef enum +{ + NRF_SAADC_MODE_SINGLE_ENDED = SAADC_CH_CONFIG_MODE_SE, ///< Single ended, PSELN will be ignored, negative input to ADC shorted to GND. + NRF_SAADC_MODE_DIFFERENTIAL = SAADC_CH_CONFIG_MODE_Diff ///< Differential mode. +} nrf_saadc_mode_t; + + +/** + * @brief Analog-to-digital converter channel burst mode. + */ +typedef enum +{ + NRF_SAADC_BURST_DISABLED = SAADC_CH_CONFIG_BURST_Disabled, ///< Burst mode is disabled (normal operation). + NRF_SAADC_BURST_ENABLED = SAADC_CH_CONFIG_BURST_Enabled ///< Burst mode is enabled. SAADC takes 2^OVERSAMPLE number of samples as fast as it can, and sends the average to Data RAM. +} nrf_saadc_burst_t; + + +/** + * @brief Analog-to-digital converter tasks. + */ +typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ +{ + NRF_SAADC_TASK_START = offsetof(NRF_SAADC_Type, TASKS_START), ///< Start the ADC and prepare the result buffer in RAM. + NRF_SAADC_TASK_SAMPLE = offsetof(NRF_SAADC_Type, TASKS_SAMPLE), ///< Take one ADC sample. If scan is enabled, all channels are sampled. + NRF_SAADC_TASK_STOP = offsetof(NRF_SAADC_Type, TASKS_STOP), ///< Stop the ADC and terminate any on-going conversion. + NRF_SAADC_TASK_CALIBRATEOFFSET = offsetof(NRF_SAADC_Type, TASKS_CALIBRATEOFFSET), ///< Starts offset auto-calibration. +} nrf_saadc_task_t; + + +/** + * @brief Analog-to-digital converter events. + */ +typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ +{ + NRF_SAADC_EVENT_STARTED = offsetof(NRF_SAADC_Type, EVENTS_STARTED), ///< The ADC has started. + NRF_SAADC_EVENT_END = offsetof(NRF_SAADC_Type, EVENTS_END), ///< The ADC has filled up the result buffer. + NRF_SAADC_EVENT_DONE = offsetof(NRF_SAADC_Type, EVENTS_DONE), ///< A conversion task has been completed. + NRF_SAADC_EVENT_RESULTDONE = offsetof(NRF_SAADC_Type, EVENTS_RESULTDONE), ///< A result is ready to get transferred to RAM. + NRF_SAADC_EVENT_CALIBRATEDONE = offsetof(NRF_SAADC_Type, EVENTS_CALIBRATEDONE), ///< Calibration is complete. + NRF_SAADC_EVENT_STOPPED = offsetof(NRF_SAADC_Type, EVENTS_STOPPED), ///< The ADC has stopped. + NRF_SAADC_EVENT_CH0_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[0].LIMITH), ///< Last result is equal or above CH[0].LIMIT.HIGH. + NRF_SAADC_EVENT_CH0_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[0].LIMITL), ///< Last result is equal or below CH[0].LIMIT.LOW. + NRF_SAADC_EVENT_CH1_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[1].LIMITH), ///< Last result is equal or above CH[1].LIMIT.HIGH. + NRF_SAADC_EVENT_CH1_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[1].LIMITL), ///< Last result is equal or below CH[1].LIMIT.LOW. + NRF_SAADC_EVENT_CH2_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[2].LIMITH), ///< Last result is equal or above CH[2].LIMIT.HIGH. + NRF_SAADC_EVENT_CH2_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[2].LIMITL), ///< Last result is equal or below CH[2].LIMIT.LOW. + NRF_SAADC_EVENT_CH3_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[3].LIMITH), ///< Last result is equal or above CH[3].LIMIT.HIGH. + NRF_SAADC_EVENT_CH3_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[3].LIMITL), ///< Last result is equal or below CH[3].LIMIT.LOW. + NRF_SAADC_EVENT_CH4_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[4].LIMITH), ///< Last result is equal or above CH[4].LIMIT.HIGH. + NRF_SAADC_EVENT_CH4_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[4].LIMITL), ///< Last result is equal or below CH[4].LIMIT.LOW. + NRF_SAADC_EVENT_CH5_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[5].LIMITH), ///< Last result is equal or above CH[5].LIMIT.HIGH. + NRF_SAADC_EVENT_CH5_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[5].LIMITL), ///< Last result is equal or below CH[5].LIMIT.LOW. + NRF_SAADC_EVENT_CH6_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[6].LIMITH), ///< Last result is equal or above CH[6].LIMIT.HIGH. + NRF_SAADC_EVENT_CH6_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[6].LIMITL), ///< Last result is equal or below CH[6].LIMIT.LOW. + NRF_SAADC_EVENT_CH7_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[7].LIMITH), ///< Last result is equal or above CH[7].LIMIT.HIGH. + NRF_SAADC_EVENT_CH7_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[7].LIMITL) ///< Last result is equal or below CH[7].LIMIT.LOW. +} nrf_saadc_event_t; + + +/** + * @brief Analog-to-digital converter interrupt masks. + */ +typedef enum +{ + NRF_SAADC_INT_STARTED = SAADC_INTENSET_STARTED_Msk, ///< Interrupt on EVENTS_STARTED event. + NRF_SAADC_INT_END = SAADC_INTENSET_END_Msk, ///< Interrupt on EVENTS_END event. + NRF_SAADC_INT_DONE = SAADC_INTENSET_DONE_Msk, ///< Interrupt on EVENTS_DONE event. + NRF_SAADC_INT_RESULTDONE = SAADC_INTENSET_RESULTDONE_Msk, ///< Interrupt on EVENTS_RESULTDONE event. + NRF_SAADC_INT_CALIBRATEDONE = SAADC_INTENSET_CALIBRATEDONE_Msk, ///< Interrupt on EVENTS_CALIBRATEDONE event. + NRF_SAADC_INT_STOPPED = SAADC_INTENSET_STOPPED_Msk, ///< Interrupt on EVENTS_STOPPED event. + NRF_SAADC_INT_CH0LIMITH = SAADC_INTENSET_CH0LIMITH_Msk, ///< Interrupt on EVENTS_CH[0].LIMITH event. + NRF_SAADC_INT_CH0LIMITL = SAADC_INTENSET_CH0LIMITL_Msk, ///< Interrupt on EVENTS_CH[0].LIMITL event. + NRF_SAADC_INT_CH1LIMITH = SAADC_INTENSET_CH1LIMITH_Msk, ///< Interrupt on EVENTS_CH[1].LIMITH event. + NRF_SAADC_INT_CH1LIMITL = SAADC_INTENSET_CH1LIMITL_Msk, ///< Interrupt on EVENTS_CH[1].LIMITL event. + NRF_SAADC_INT_CH2LIMITH = SAADC_INTENSET_CH2LIMITH_Msk, ///< Interrupt on EVENTS_CH[2].LIMITH event. + NRF_SAADC_INT_CH2LIMITL = SAADC_INTENSET_CH2LIMITL_Msk, ///< Interrupt on EVENTS_CH[2].LIMITL event. + NRF_SAADC_INT_CH3LIMITH = SAADC_INTENSET_CH3LIMITH_Msk, ///< Interrupt on EVENTS_CH[3].LIMITH event. + NRF_SAADC_INT_CH3LIMITL = SAADC_INTENSET_CH3LIMITL_Msk, ///< Interrupt on EVENTS_CH[3].LIMITL event. + NRF_SAADC_INT_CH4LIMITH = SAADC_INTENSET_CH4LIMITH_Msk, ///< Interrupt on EVENTS_CH[4].LIMITH event. + NRF_SAADC_INT_CH4LIMITL = SAADC_INTENSET_CH4LIMITL_Msk, ///< Interrupt on EVENTS_CH[4].LIMITL event. + NRF_SAADC_INT_CH5LIMITH = SAADC_INTENSET_CH5LIMITH_Msk, ///< Interrupt on EVENTS_CH[5].LIMITH event. + NRF_SAADC_INT_CH5LIMITL = SAADC_INTENSET_CH5LIMITL_Msk, ///< Interrupt on EVENTS_CH[5].LIMITL event. + NRF_SAADC_INT_CH6LIMITH = SAADC_INTENSET_CH6LIMITH_Msk, ///< Interrupt on EVENTS_CH[6].LIMITH event. + NRF_SAADC_INT_CH6LIMITL = SAADC_INTENSET_CH6LIMITL_Msk, ///< Interrupt on EVENTS_CH[6].LIMITL event. + NRF_SAADC_INT_CH7LIMITH = SAADC_INTENSET_CH7LIMITH_Msk, ///< Interrupt on EVENTS_CH[7].LIMITH event. + NRF_SAADC_INT_CH7LIMITL = SAADC_INTENSET_CH7LIMITL_Msk, ///< Interrupt on EVENTS_CH[7].LIMITL event. + NRF_SAADC_INT_ALL = 0x7FFFFFFFUL ///< Mask of all interrupts. +} nrf_saadc_int_mask_t; + + +/** + * @brief Analog-to-digital converter value limit type. + */ +typedef enum +{ + NRF_SAADC_LIMIT_LOW = 0, + NRF_SAADC_LIMIT_HIGH = 1 +} nrf_saadc_limit_t; + + +typedef int16_t nrf_saadc_value_t; ///< Type of a single ADC conversion result. + + +/** + * @brief Analog-to-digital converter configuration structure. + */ +typedef struct +{ + nrf_saadc_resolution_t resolution; + nrf_saadc_oversample_t oversample; + nrf_saadc_value_t * buffer; + uint32_t buffer_size; +} nrf_saadc_config_t; + + +/** + * @brief Analog-to-digital converter channel configuration structure. + */ +typedef struct +{ + nrf_saadc_resistor_t resistor_p; + nrf_saadc_resistor_t resistor_n; + nrf_saadc_gain_t gain; + nrf_saadc_reference_t reference; + nrf_saadc_acqtime_t acq_time; + nrf_saadc_mode_t mode; + nrf_saadc_burst_t burst; + nrf_saadc_input_t pin_p; + nrf_saadc_input_t pin_n; +} nrf_saadc_channel_config_t; + + +/** + * @brief Function for triggering a specific SAADC task. + * + * @param[in] saadc_task SAADC task. + */ +__STATIC_INLINE void nrf_saadc_task_trigger(nrf_saadc_task_t saadc_task) +{ + *((volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)saadc_task)) = 0x1UL; +} + + +/** + * @brief Function for getting the address of a specific SAADC task register. + * + * @param[in] saadc_task SAADC task. + * + * @return Address of the specified SAADC task. + */ +__STATIC_INLINE uint32_t nrf_saadc_task_address_get(nrf_saadc_task_t saadc_task) +{ + return (uint32_t)((uint8_t *)NRF_SAADC + (uint32_t)saadc_task); +} + + +/** + * @brief Function for getting the state of a specific SAADC event. + * + * @param[in] saadc_event SAADC event. + * + * @return State of the specified SAADC event. + */ +__STATIC_INLINE bool nrf_saadc_event_check(nrf_saadc_event_t saadc_event) +{ + return (bool)*(volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)saadc_event); +} + + +/** + * @brief Function for clearing the specific SAADC event. + * + * @param[in] saadc_event SAADC event. + */ +__STATIC_INLINE void nrf_saadc_event_clear(nrf_saadc_event_t saadc_event) +{ + *((volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)saadc_event)) = 0x0UL; +#if __CORTEX_M == 0x04 + volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)saadc_event)); + (void)dummy; +#endif +} + + +/** + * @brief Function for getting the address of a specific SAADC event register. + * + * @param[in] saadc_event SAADC event. + * + * @return Address of the specified SAADC event. + */ +__STATIC_INLINE uint32_t nrf_saadc_event_address_get(nrf_saadc_event_t saadc_event) +{ + return (uint32_t )((uint8_t *)NRF_SAADC + (uint32_t)saadc_event); +} + + +/** + * @brief Function for getting the address of a specific SAADC limit event register. + * + * @param[in] channel Channel number. + * @param[in] limit_type Low limit or high limit. + * + * @return Address of the specified SAADC limit event. + */ +__STATIC_INLINE volatile uint32_t * nrf_saadc_event_limit_address_get(uint8_t channel, nrf_saadc_limit_t limit_type) +{ + NRFX_ASSERT(channel < NRF_SAADC_CHANNEL_COUNT); + if (limit_type == NRF_SAADC_LIMIT_HIGH) + { + return &NRF_SAADC->EVENTS_CH[channel].LIMITH; + } + else + { + return &NRF_SAADC->EVENTS_CH[channel].LIMITL; + } +} + + +/** + * @brief Function for getting the SAADC channel monitoring limit events. + * + * @param[in] channel Channel number. + * @param[in] limit_type Low limit or high limit. + */ +__STATIC_INLINE nrf_saadc_event_t nrf_saadc_event_limit_get(uint8_t channel, nrf_saadc_limit_t limit_type) +{ + if (limit_type == NRF_SAADC_LIMIT_HIGH) + { + return (nrf_saadc_event_t)( (uint32_t) NRF_SAADC_EVENT_CH0_LIMITH + + (uint32_t) (NRF_SAADC_EVENT_CH1_LIMITH - NRF_SAADC_EVENT_CH0_LIMITH) + * (uint32_t) channel ); + } + else + { + return (nrf_saadc_event_t)( (uint32_t) NRF_SAADC_EVENT_CH0_LIMITL + + (uint32_t) (NRF_SAADC_EVENT_CH1_LIMITL - NRF_SAADC_EVENT_CH0_LIMITL) + * (uint32_t) channel ); + } +} + + +/** + * @brief Function for configuring the input pins for a specific SAADC channel. + * + * @param[in] channel Channel number. + * @param[in] pselp Positive input. + * @param[in] pseln Negative input. Set to NRF_SAADC_INPUT_DISABLED in single ended mode. + */ +__STATIC_INLINE void nrf_saadc_channel_input_set(uint8_t channel, + nrf_saadc_input_t pselp, + nrf_saadc_input_t pseln) +{ + NRF_SAADC->CH[channel].PSELN = pseln; + NRF_SAADC->CH[channel].PSELP = pselp; +} + + +/** + * @brief Function for setting the SAADC channel monitoring limits. + * + * @param[in] channel Channel number. + * @param[in] low Low limit. + * @param[in] high High limit. + */ +__STATIC_INLINE void nrf_saadc_channel_limits_set(uint8_t channel, int16_t low, int16_t high) +{ + NRF_SAADC->CH[channel].LIMIT = ( + (((uint32_t) low << SAADC_CH_LIMIT_LOW_Pos) & SAADC_CH_LIMIT_LOW_Msk) + | (((uint32_t) high << SAADC_CH_LIMIT_HIGH_Pos) & SAADC_CH_LIMIT_HIGH_Msk)); +} + + +/** + * @brief Function for enabling specified SAADC interrupts. + * + * @param[in] saadc_int_mask Interrupt(s) to enable. + */ +__STATIC_INLINE void nrf_saadc_int_enable(uint32_t saadc_int_mask) +{ + NRF_SAADC->INTENSET = saadc_int_mask; +} + + +/** + * @brief Function for retrieving the state of specified SAADC interrupts. + * + * @param[in] saadc_int_mask Interrupt(s) to check. + * + * @retval true If all specified interrupts are enabled. + * @retval false If at least one of the given interrupts is not enabled. + */ +__STATIC_INLINE bool nrf_saadc_int_enable_check(uint32_t saadc_int_mask) +{ + return (bool)(NRF_SAADC->INTENSET & saadc_int_mask); +} + + +/** + * @brief Function for disabling specified interrupts. + * + * @param saadc_int_mask Interrupt(s) to disable. + */ +__STATIC_INLINE void nrf_saadc_int_disable(uint32_t saadc_int_mask) +{ + NRF_SAADC->INTENCLR = saadc_int_mask; +} + + +/** + * @brief Function for generating masks for SAADC channel limit interrupts. + * + * @param[in] channel SAADC channel number. + * @param[in] limit_type Limit type. + * + * @returns Interrupt mask. + */ +__STATIC_INLINE uint32_t nrf_saadc_limit_int_get(uint8_t channel, nrf_saadc_limit_t limit_type) +{ + NRFX_ASSERT(channel < NRF_SAADC_CHANNEL_COUNT); + uint32_t mask = (limit_type == NRF_SAADC_LIMIT_LOW) ? NRF_SAADC_INT_CH0LIMITL : NRF_SAADC_INT_CH0LIMITH; + return mask << (channel * 2); +} + + +/** + * @brief Function for checking whether the SAADC is busy. + * + * This function checks whether the analog-to-digital converter is busy with a conversion. + * + * @retval true If the SAADC is busy. + * @retval false If the SAADC is not busy. + */ +__STATIC_INLINE bool nrf_saadc_busy_check(void) +{ + //return ((NRF_SAADC->STATUS & SAADC_STATUS_STATUS_Msk) == SAADC_STATUS_STATUS_Msk); + //simplified for performance + return NRF_SAADC->STATUS; +} + + +/** + * @brief Function for enabling the SAADC. + * + * The analog-to-digital converter must be enabled before use. + */ +__STATIC_INLINE void nrf_saadc_enable(void) +{ + NRF_SAADC->ENABLE = (SAADC_ENABLE_ENABLE_Enabled << SAADC_ENABLE_ENABLE_Pos); +} + + +/** + * @brief Function for disabling the SAADC. + */ +__STATIC_INLINE void nrf_saadc_disable(void) +{ + NRF_SAADC->ENABLE = (SAADC_ENABLE_ENABLE_Disabled << SAADC_ENABLE_ENABLE_Pos); +} + + +/** + * @brief Function for checking if the SAADC is enabled. + * + * @retval true If the SAADC is enabled. + * @retval false If the SAADC is not enabled. + */ +__STATIC_INLINE bool nrf_saadc_enable_check(void) +{ + //simplified for performance + return NRF_SAADC->ENABLE; +} + + +/** + * @brief Function for initializing the SAADC result buffer. + * + * @param[in] buffer Pointer to the result buffer. + * @param[in] num Size of buffer in words. + */ +__STATIC_INLINE void nrf_saadc_buffer_init(nrf_saadc_value_t * buffer, uint32_t num) +{ + NRF_SAADC->RESULT.PTR = (uint32_t)buffer; + NRF_SAADC->RESULT.MAXCNT = num; +} + +/** + * @brief Function for getting the number of buffer words transferred since last START operation. + * + * @returns Number of words transferred. + */ +__STATIC_INLINE uint16_t nrf_saadc_amount_get(void) +{ + return NRF_SAADC->RESULT.AMOUNT; +} + + +/** + * @brief Function for setting the SAADC sample resolution. + * + * @param[in] resolution Bit resolution. + */ +__STATIC_INLINE void nrf_saadc_resolution_set(nrf_saadc_resolution_t resolution) +{ + NRF_SAADC->RESOLUTION = resolution; +} + + +/** + * @brief Function for configuring the oversampling feature. + * + * @param[in] oversample Oversampling mode. + */ +__STATIC_INLINE void nrf_saadc_oversample_set(nrf_saadc_oversample_t oversample) +{ + NRF_SAADC->OVERSAMPLE = oversample; +} + +/** + * @brief Function for getting the oversampling feature configuration. + * + * @return Oversampling configuration. + */ +__STATIC_INLINE nrf_saadc_oversample_t nrf_saadc_oversample_get(void) +{ + return (nrf_saadc_oversample_t)NRF_SAADC->OVERSAMPLE; +} + +/** + * @brief Function for initializing the SAADC channel. + * + * @param[in] channel Channel number. + * @param[in] config Pointer to the channel configuration structure. + */ +__STATIC_INLINE void nrf_saadc_channel_init(uint8_t channel, + nrf_saadc_channel_config_t const * const config) +{ + NRF_SAADC->CH[channel].CONFIG = + ((config->resistor_p << SAADC_CH_CONFIG_RESP_Pos) & SAADC_CH_CONFIG_RESP_Msk) + | ((config->resistor_n << SAADC_CH_CONFIG_RESN_Pos) & SAADC_CH_CONFIG_RESN_Msk) + | ((config->gain << SAADC_CH_CONFIG_GAIN_Pos) & SAADC_CH_CONFIG_GAIN_Msk) + | ((config->reference << SAADC_CH_CONFIG_REFSEL_Pos) & SAADC_CH_CONFIG_REFSEL_Msk) + | ((config->acq_time << SAADC_CH_CONFIG_TACQ_Pos) & SAADC_CH_CONFIG_TACQ_Msk) + | ((config->mode << SAADC_CH_CONFIG_MODE_Pos) & SAADC_CH_CONFIG_MODE_Msk) + | ((config->burst << SAADC_CH_CONFIG_BURST_Pos) & SAADC_CH_CONFIG_BURST_Msk); + nrf_saadc_channel_input_set(channel, config->pin_p, config->pin_n); +} + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_SAADC_H_ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_spi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_spi.h new file mode 100644 index 00000000000..28b8c8026bd --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_spi.h @@ -0,0 +1,369 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_SPI_H__ +#define NRF_SPI_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_spi_hal SPI HAL + * @{ + * @ingroup nrf_spi + * @brief Hardware access layer for managing the SPI peripheral. + */ + +/** + * @brief This value can be used as a parameter for the @ref nrf_spi_pins_set + * function to specify that a given SPI signal (SCK, MOSI, or MISO) + * shall not be connected to a physical pin. + */ +#define NRF_SPI_PIN_NOT_CONNECTED 0xFFFFFFFF + + +/** + * @brief SPI events. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_SPI_EVENT_READY = offsetof(NRF_SPI_Type, EVENTS_READY) ///< TXD byte sent and RXD byte received. + /*lint -restore*/ +} nrf_spi_event_t; + +/** + * @brief SPI interrupts. + */ +typedef enum +{ + NRF_SPI_INT_READY_MASK = SPI_INTENSET_READY_Msk, ///< Interrupt on READY event. + NRF_SPI_ALL_INTS_MASK = SPI_INTENSET_READY_Msk ///< All SPI interrupts. +} nrf_spi_int_mask_t; + +/** + * @brief SPI data rates. + */ +typedef enum +{ + NRF_SPI_FREQ_125K = SPI_FREQUENCY_FREQUENCY_K125, ///< 125 kbps. + NRF_SPI_FREQ_250K = SPI_FREQUENCY_FREQUENCY_K250, ///< 250 kbps. + NRF_SPI_FREQ_500K = SPI_FREQUENCY_FREQUENCY_K500, ///< 500 kbps. + NRF_SPI_FREQ_1M = SPI_FREQUENCY_FREQUENCY_M1, ///< 1 Mbps. + NRF_SPI_FREQ_2M = SPI_FREQUENCY_FREQUENCY_M2, ///< 2 Mbps. + NRF_SPI_FREQ_4M = SPI_FREQUENCY_FREQUENCY_M4, ///< 4 Mbps. + // [conversion to 'int' needed to prevent compilers from complaining + // that the provided value (0x80000000UL) is out of range of "int"] + NRF_SPI_FREQ_8M = (int)SPI_FREQUENCY_FREQUENCY_M8 ///< 8 Mbps. +} nrf_spi_frequency_t; + +/** + * @brief SPI modes. + */ +typedef enum +{ + NRF_SPI_MODE_0, ///< SCK active high, sample on leading edge of clock. + NRF_SPI_MODE_1, ///< SCK active high, sample on trailing edge of clock. + NRF_SPI_MODE_2, ///< SCK active low, sample on leading edge of clock. + NRF_SPI_MODE_3 ///< SCK active low, sample on trailing edge of clock. +} nrf_spi_mode_t; + +/** + * @brief SPI bit orders. + */ +typedef enum +{ + NRF_SPI_BIT_ORDER_MSB_FIRST = SPI_CONFIG_ORDER_MsbFirst, ///< Most significant bit shifted out first. + NRF_SPI_BIT_ORDER_LSB_FIRST = SPI_CONFIG_ORDER_LsbFirst ///< Least significant bit shifted out first. +} nrf_spi_bit_order_t; + + +/** + * @brief Function for clearing a specific SPI event. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spi_event Event to clear. + */ +__STATIC_INLINE void nrf_spi_event_clear(NRF_SPI_Type * p_reg, + nrf_spi_event_t spi_event); + +/** + * @brief Function for checking the state of a specific SPI event. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spi_event Event to check. + * + * @retval true If the event is set. + * @retval false If the event is not set. + */ +__STATIC_INLINE bool nrf_spi_event_check(NRF_SPI_Type * p_reg, + nrf_spi_event_t spi_event); + +/** + * @brief Function for getting the address of a specific SPI event register. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spi_event Requested event. + * + * @return Address of the specified event register. + */ +__STATIC_INLINE uint32_t * nrf_spi_event_address_get(NRF_SPI_Type * p_reg, + nrf_spi_event_t spi_event); + +/** + * @brief Function for enabling specified interrupts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spi_int_mask Interrupts to enable. + */ +__STATIC_INLINE void nrf_spi_int_enable(NRF_SPI_Type * p_reg, + uint32_t spi_int_mask); + +/** + * @brief Function for disabling specified interrupts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spi_int_mask Interrupts to disable. + */ +__STATIC_INLINE void nrf_spi_int_disable(NRF_SPI_Type * p_reg, + uint32_t spi_int_mask); + +/** + * @brief Function for retrieving the state of a given interrupt. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spi_int Interrupt to check. + * + * @retval true If the interrupt is enabled. + * @retval false If the interrupt is not enabled. + */ +__STATIC_INLINE bool nrf_spi_int_enable_check(NRF_SPI_Type * p_reg, + nrf_spi_int_mask_t spi_int); + +/** + * @brief Function for enabling the SPI peripheral. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_spi_enable(NRF_SPI_Type * p_reg); + +/** + * @brief Function for disabling the SPI peripheral. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_spi_disable(NRF_SPI_Type * p_reg); + +/** + * @brief Function for configuring SPI pins. + * + * If a given signal is not needed, pass the @ref NRF_SPI_PIN_NOT_CONNECTED + * value instead of its pin number. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] sck_pin SCK pin number. + * @param[in] mosi_pin MOSI pin number. + * @param[in] miso_pin MISO pin number. + */ +__STATIC_INLINE void nrf_spi_pins_set(NRF_SPI_Type * p_reg, + uint32_t sck_pin, + uint32_t mosi_pin, + uint32_t miso_pin); + +/** + * @brief Function for writing data to the SPI transmitter register. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] data TX data to send. + */ +__STATIC_INLINE void nrf_spi_txd_set(NRF_SPI_Type * p_reg, uint8_t data); + +/** + * @brief Function for reading data from the SPI receiver register. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * + * @return RX data received. + */ +__STATIC_INLINE uint8_t nrf_spi_rxd_get(NRF_SPI_Type * p_reg); + +/** + * @brief Function for setting the SPI master data rate. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] frequency SPI frequency. + */ +__STATIC_INLINE void nrf_spi_frequency_set(NRF_SPI_Type * p_reg, + nrf_spi_frequency_t frequency); + +/** + * @brief Function for setting the SPI configuration. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spi_mode SPI mode. + * @param[in] spi_bit_order SPI bit order. + */ +__STATIC_INLINE void nrf_spi_configure(NRF_SPI_Type * p_reg, + nrf_spi_mode_t spi_mode, + nrf_spi_bit_order_t spi_bit_order); + + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE void nrf_spi_event_clear(NRF_SPI_Type * p_reg, + nrf_spi_event_t spi_event) +{ + *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spi_event)) = 0x0UL; +#if __CORTEX_M == 0x04 + volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spi_event)); + (void)dummy; +#endif +} + +__STATIC_INLINE bool nrf_spi_event_check(NRF_SPI_Type * p_reg, + nrf_spi_event_t spi_event) +{ + return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spi_event); +} + +__STATIC_INLINE uint32_t * nrf_spi_event_address_get(NRF_SPI_Type * p_reg, + nrf_spi_event_t spi_event) +{ + return (uint32_t *)((uint8_t *)p_reg + (uint32_t)spi_event); +} + +__STATIC_INLINE void nrf_spi_int_enable(NRF_SPI_Type * p_reg, + uint32_t spi_int_mask) +{ + p_reg->INTENSET = spi_int_mask; +} + +__STATIC_INLINE void nrf_spi_int_disable(NRF_SPI_Type * p_reg, + uint32_t spi_int_mask) +{ + p_reg->INTENCLR = spi_int_mask; +} + +__STATIC_INLINE bool nrf_spi_int_enable_check(NRF_SPI_Type * p_reg, + nrf_spi_int_mask_t spi_int) +{ + return (bool)(p_reg->INTENSET & spi_int); +} + +__STATIC_INLINE void nrf_spi_enable(NRF_SPI_Type * p_reg) +{ + p_reg->ENABLE = (SPI_ENABLE_ENABLE_Enabled << SPI_ENABLE_ENABLE_Pos); +} + +__STATIC_INLINE void nrf_spi_disable(NRF_SPI_Type * p_reg) +{ + p_reg->ENABLE = (SPI_ENABLE_ENABLE_Disabled << SPI_ENABLE_ENABLE_Pos); +} + +__STATIC_INLINE void nrf_spi_pins_set(NRF_SPI_Type * p_reg, + uint32_t sck_pin, + uint32_t mosi_pin, + uint32_t miso_pin) +{ + p_reg->PSELSCK = sck_pin; + p_reg->PSELMOSI = mosi_pin; + p_reg->PSELMISO = miso_pin; +} + +__STATIC_INLINE void nrf_spi_txd_set(NRF_SPI_Type * p_reg, uint8_t data) +{ + p_reg->TXD = data; +} + +__STATIC_INLINE uint8_t nrf_spi_rxd_get(NRF_SPI_Type * p_reg) +{ + return p_reg->RXD; +} + +__STATIC_INLINE void nrf_spi_frequency_set(NRF_SPI_Type * p_reg, + nrf_spi_frequency_t frequency) +{ + p_reg->FREQUENCY = frequency; +} + +__STATIC_INLINE void nrf_spi_configure(NRF_SPI_Type * p_reg, + nrf_spi_mode_t spi_mode, + nrf_spi_bit_order_t spi_bit_order) +{ + uint32_t config = (spi_bit_order == NRF_SPI_BIT_ORDER_MSB_FIRST ? + SPI_CONFIG_ORDER_MsbFirst : SPI_CONFIG_ORDER_LsbFirst); + switch (spi_mode) + { + default: + case NRF_SPI_MODE_0: + config |= (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos) | + (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos); + break; + + case NRF_SPI_MODE_1: + config |= (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos) | + (SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos); + break; + + case NRF_SPI_MODE_2: + config |= (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos) | + (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos); + break; + + case NRF_SPI_MODE_3: + config |= (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos) | + (SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos); + break; + } + p_reg->CONFIG = config; +} + +#endif // SUPPRESS_INLINE_IMPLEMENTATION + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_SPI_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_spim.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_spim.h new file mode 100644 index 00000000000..ede94f3c205 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_spim.h @@ -0,0 +1,736 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_SPIM_H__ +#define NRF_SPIM_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_spim_hal SPIM HAL + * @{ + * @ingroup nrf_spim + * @brief Hardware access layer for managing the SPIM peripheral. + */ + +/** + * @brief This value can be used as a parameter for the @ref nrf_spim_pins_set + * function to specify that a given SPI signal (SCK, MOSI, or MISO) + * shall not be connected to a physical pin. + */ +#define NRF_SPIM_PIN_NOT_CONNECTED 0xFFFFFFFF + +#if defined(SPIM_DCXCNT_DCXCNT_Msk) || defined(__NRFX_DOXYGEN__) +/** + * @brief This value specified in the DCX line configuration causes this line + * to be set low during whole transmission (all transmitted bytes are + * marked as command bytes). Any lower value causes the DCX line to be + * switched from low to high after this number of bytes is transmitted + * (all remaining bytes are marked as data bytes). + */ +#define NRF_SPIM_DCX_CNT_ALL_CMD 0xF +#endif + +#define NRF_SPIM_HW_CSN_PRESENT \ + (NRFX_CHECK(SPIM0_FEATURE_HARDWARE_CSN_PRESENT) || \ + NRFX_CHECK(SPIM1_FEATURE_HARDWARE_CSN_PRESENT) || \ + NRFX_CHECK(SPIM2_FEATURE_HARDWARE_CSN_PRESENT) || \ + NRFX_CHECK(SPIM3_FEATURE_HARDWARE_CSN_PRESENT)) + +/** + * @brief SPIM tasks. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_SPIM_TASK_START = offsetof(NRF_SPIM_Type, TASKS_START), ///< Start SPI transaction. + NRF_SPIM_TASK_STOP = offsetof(NRF_SPIM_Type, TASKS_STOP), ///< Stop SPI transaction. + NRF_SPIM_TASK_SUSPEND = offsetof(NRF_SPIM_Type, TASKS_SUSPEND), ///< Suspend SPI transaction. + NRF_SPIM_TASK_RESUME = offsetof(NRF_SPIM_Type, TASKS_RESUME) ///< Resume SPI transaction. + /*lint -restore*/ +} nrf_spim_task_t; + +/** + * @brief SPIM events. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_SPIM_EVENT_STOPPED = offsetof(NRF_SPIM_Type, EVENTS_STOPPED), ///< SPI transaction has stopped. + NRF_SPIM_EVENT_ENDRX = offsetof(NRF_SPIM_Type, EVENTS_ENDRX), ///< End of RXD buffer reached. + NRF_SPIM_EVENT_END = offsetof(NRF_SPIM_Type, EVENTS_END), ///< End of RXD buffer and TXD buffer reached. + NRF_SPIM_EVENT_ENDTX = offsetof(NRF_SPIM_Type, EVENTS_ENDTX), ///< End of TXD buffer reached. + NRF_SPIM_EVENT_STARTED = offsetof(NRF_SPIM_Type, EVENTS_STARTED) ///< Transaction started. + /*lint -restore*/ +} nrf_spim_event_t; + +/** + * @brief SPIM shortcuts. + */ +typedef enum +{ + NRF_SPIM_SHORT_END_START_MASK = SPIM_SHORTS_END_START_Msk, ///< Shortcut between END event and START task. + NRF_SPIM_ALL_SHORTS_MASK = SPIM_SHORTS_END_START_Msk ///< All SPIM shortcuts. +} nrf_spim_short_mask_t; + +/** + * @brief SPIM interrupts. + */ +typedef enum +{ + NRF_SPIM_INT_STOPPED_MASK = SPIM_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event. + NRF_SPIM_INT_ENDRX_MASK = SPIM_INTENSET_ENDRX_Msk, ///< Interrupt on ENDRX event. + NRF_SPIM_INT_END_MASK = SPIM_INTENSET_END_Msk, ///< Interrupt on END event. + NRF_SPIM_INT_ENDTX_MASK = SPIM_INTENSET_ENDTX_Msk, ///< Interrupt on ENDTX event. + NRF_SPIM_INT_STARTED_MASK = SPIM_INTENSET_STARTED_Msk, ///< Interrupt on STARTED event. + NRF_SPIM_ALL_INTS_MASK = SPIM_INTENSET_STOPPED_Msk | + SPIM_INTENSET_ENDRX_Msk | + SPIM_INTENSET_END_Msk | + SPIM_INTENSET_ENDTX_Msk | + SPIM_INTENSET_STARTED_Msk ///< All SPIM interrupts. +} nrf_spim_int_mask_t; + +/** + * @brief SPI master data rates. + */ +typedef enum +{ + NRF_SPIM_FREQ_125K = SPIM_FREQUENCY_FREQUENCY_K125, ///< 125 kbps. + NRF_SPIM_FREQ_250K = SPIM_FREQUENCY_FREQUENCY_K250, ///< 250 kbps. + NRF_SPIM_FREQ_500K = SPIM_FREQUENCY_FREQUENCY_K500, ///< 500 kbps. + NRF_SPIM_FREQ_1M = SPIM_FREQUENCY_FREQUENCY_M1, ///< 1 Mbps. + NRF_SPIM_FREQ_2M = SPIM_FREQUENCY_FREQUENCY_M2, ///< 2 Mbps. + NRF_SPIM_FREQ_4M = SPIM_FREQUENCY_FREQUENCY_M4, ///< 4 Mbps. + // [conversion to 'int' needed to prevent compilers from complaining + // that the provided value (0x80000000UL) is out of range of "int"] + NRF_SPIM_FREQ_8M = (int)SPIM_FREQUENCY_FREQUENCY_M8, ///< 8 Mbps. +#if defined(SPIM_FREQUENCY_FREQUENCY_M16) || defined(__NRFX_DOXYGEN__) + NRF_SPIM_FREQ_16M = SPIM_FREQUENCY_FREQUENCY_M16, ///< 16 Mbps. +#endif +#if defined(SPIM_FREQUENCY_FREQUENCY_M32) || defined(__NRFX_DOXYGEN__) + NRF_SPIM_FREQ_32M = SPIM_FREQUENCY_FREQUENCY_M32 ///< 32 Mbps. +#endif +} nrf_spim_frequency_t; + +/** + * @brief SPI modes. + */ +typedef enum +{ + NRF_SPIM_MODE_0, ///< SCK active high, sample on leading edge of clock. + NRF_SPIM_MODE_1, ///< SCK active high, sample on trailing edge of clock. + NRF_SPIM_MODE_2, ///< SCK active low, sample on leading edge of clock. + NRF_SPIM_MODE_3 ///< SCK active low, sample on trailing edge of clock. +} nrf_spim_mode_t; + +/** + * @brief SPI bit orders. + */ +typedef enum +{ + NRF_SPIM_BIT_ORDER_MSB_FIRST = SPIM_CONFIG_ORDER_MsbFirst, ///< Most significant bit shifted out first. + NRF_SPIM_BIT_ORDER_LSB_FIRST = SPIM_CONFIG_ORDER_LsbFirst ///< Least significant bit shifted out first. +} nrf_spim_bit_order_t; + +#if (NRF_SPIM_HW_CSN_PRESENT) || defined(__NRFX_DOXYGEN__) +/** + * @brief SPI CSN pin polarity. + */ +typedef enum +{ + NRF_SPIM_CSN_POL_LOW = SPIM_CSNPOL_CSNPOL_LOW, ///< Active low (idle state high). + NRF_SPIM_CSN_POL_HIGH = SPIM_CSNPOL_CSNPOL_HIGH ///< Active high (idle state low). +} nrf_spim_csn_pol_t; +#endif // (NRF_SPIM_HW_CSN_PRESENT) || defined(__NRFX_DOXYGEN__) + +/** + * @brief Function for activating a specific SPIM task. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spim_task Task to activate. + */ +__STATIC_INLINE void nrf_spim_task_trigger(NRF_SPIM_Type * p_reg, + nrf_spim_task_t spim_task); + +/** + * @brief Function for getting the address of a specific SPIM task register. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spim_task Requested task. + * + * @return Address of the specified task register. + */ +__STATIC_INLINE uint32_t nrf_spim_task_address_get(NRF_SPIM_Type * p_reg, + nrf_spim_task_t spim_task); + +/** + * @brief Function for clearing a specific SPIM event. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spim_event Event to clear. + */ +__STATIC_INLINE void nrf_spim_event_clear(NRF_SPIM_Type * p_reg, + nrf_spim_event_t spim_event); + +/** + * @brief Function for checking the state of a specific SPIM event. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spim_event Event to check. + * + * @retval true If the event is set. + * @retval false If the event is not set. + */ +__STATIC_INLINE bool nrf_spim_event_check(NRF_SPIM_Type * p_reg, + nrf_spim_event_t spim_event); + +/** + * @brief Function for getting the address of a specific SPIM event register. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spim_event Requested event. + * + * @return Address of the specified event register. + */ +__STATIC_INLINE uint32_t nrf_spim_event_address_get(NRF_SPIM_Type * p_reg, + nrf_spim_event_t spim_event); +/** + * @brief Function for enabling specified shortcuts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spim_shorts_mask Shortcuts to enable. + */ +__STATIC_INLINE void nrf_spim_shorts_enable(NRF_SPIM_Type * p_reg, + uint32_t spim_shorts_mask); + +/** + * @brief Function for disabling specified shortcuts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spim_shorts_mask Shortcuts to disable. + */ +__STATIC_INLINE void nrf_spim_shorts_disable(NRF_SPIM_Type * p_reg, + uint32_t spim_shorts_mask); + +/** + * @brief Function for getting shorts setting. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE uint32_t nrf_spim_shorts_get(NRF_SPIM_Type * p_reg); + +/** + * @brief Function for enabling specified interrupts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spim_int_mask Interrupts to enable. + */ +__STATIC_INLINE void nrf_spim_int_enable(NRF_SPIM_Type * p_reg, + uint32_t spim_int_mask); + +/** + * @brief Function for disabling specified interrupts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spim_int_mask Interrupts to disable. + */ +__STATIC_INLINE void nrf_spim_int_disable(NRF_SPIM_Type * p_reg, + uint32_t spim_int_mask); + +/** + * @brief Function for retrieving the state of a given interrupt. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spim_int Interrupt to check. + * + * @retval true If the interrupt is enabled. + * @retval false If the interrupt is not enabled. + */ +__STATIC_INLINE bool nrf_spim_int_enable_check(NRF_SPIM_Type * p_reg, + nrf_spim_int_mask_t spim_int); + +/** + * @brief Function for enabling the SPIM peripheral. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_spim_enable(NRF_SPIM_Type * p_reg); + +/** + * @brief Function for disabling the SPIM peripheral. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_spim_disable(NRF_SPIM_Type * p_reg); + +/** + * @brief Function for configuring SPIM pins. + * + * If a given signal is not needed, pass the @ref NRF_SPIM_PIN_NOT_CONNECTED + * value instead of its pin number. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] sck_pin SCK pin number. + * @param[in] mosi_pin MOSI pin number. + * @param[in] miso_pin MISO pin number. + */ +__STATIC_INLINE void nrf_spim_pins_set(NRF_SPIM_Type * p_reg, + uint32_t sck_pin, + uint32_t mosi_pin, + uint32_t miso_pin); + +#if (NRF_SPIM_HW_CSN_PRESENT) || defined(__NRFX_DOXYGEN__) +/** + * @brief Function for configuring the SPIM hardware CSN pin. + * + * If this signal is not needed, pass the @ref NRF_SPIM_PIN_NOT_CONNECTED + * value instead of its pin number. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] pin CSN pin number. + * @param[in] polarity CSN pin polarity. + * @param[in] duration Minimum duration between the edge of CSN and the edge of SCK + * and minimum duration of CSN must stay unselected between transactions. + * The value is specified in number of 64 MHz clock cycles (15.625 ns). + */ +__STATIC_INLINE void nrf_spim_csn_configure(NRF_SPIM_Type * p_reg, + uint32_t pin, + nrf_spim_csn_pol_t polarity, + uint32_t duration); +#endif // (NRF_SPIM_HW_CSN_PRESENT) || defined(__NRFX_DOXYGEN__) + +#if defined(SPIM_PSELDCX_CONNECT_Msk) || defined(__NRFX_DOXYGEN__) +/** + * @brief Function for configuring the SPIM DCX pin. + * + * If this signal is not needed, pass the @ref NRF_SPIM_PIN_NOT_CONNECTED + * value instead of its pin number. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] dcx_pin DCX pin number. + */ +__STATIC_INLINE void nrf_spim_dcx_pin_set(NRF_SPIM_Type * p_reg, + uint32_t dcx_pin); + +/** + * @brief Function for configuring the number of command bytes. + * + * Maximum value available for dividing the transmitted bytes into command + * bytes and data bytes is @ref NRF_SPIM_DCX_CNT_ALL_CMD - 1. + * The @ref NRF_SPIM_DCX_CNT_ALL_CMD value passed as the @c count parameter + * causes all transmitted bytes to be marked as command bytes. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] count Number of command bytes preceding the data bytes. + */ +__STATIC_INLINE void nrf_spim_dcx_cnt_set(NRF_SPIM_Type * p_reg, + uint32_t count); +#endif // defined(SPIM_PSELDCX_CONNECT_Msk) || defined(__NRFX_DOXYGEN__) + +#if defined(SPIM_IFTIMING_RXDELAY_RXDELAY_Msk) || defined(__NRFX_DOXYGEN__) +/** + * @brief Function for configuring the extended SPIM interface. + * @param p_reg Pointer to the peripheral registers structure. + * @param rxdelay Sample delay for input serial data on MISO, + * specified in 64 MHz clock cycles (15.625 ns) from the sampling edge of SCK. + */ +__STATIC_INLINE void nrf_spim_iftiming_set(NRF_SPIM_Type * p_reg, + uint32_t rxdelay); +#endif // defined(SPIM_IFTIMING_RXDELAY_RXDELAY_Msk) || defined(__NRFX_DOXYGEN__) + +#if defined(SPIM_STALLSTAT_RX_Msk) || defined(__NRFX_DOXYGEN__) +/** + * @brief Function for clearing stall status for RX EasyDMA RAM accesses. + * + * @param p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_spim_stallstat_rx_clear(NRF_SPIM_Type * p_reg); + +/** + * @brief Function for getting stall status for RX EasyDMA RAM accesses. + * + * @param p_reg Pointer to the peripheral registers structure. + * + * @return Stall status of RX EasyDMA RAM accesses. + */ +__STATIC_INLINE bool nrf_spim_stallstat_rx_get(NRF_SPIM_Type * p_reg); +#endif // defined(SPIM_STALLSTAT_RX_Msk) || defined(__NRFX_DOXYGEN__) + +#if defined(SPIM_STALLSTAT_TX_Msk) || defined(__NRFX_DOXYGEN__) +/** + * @brief Function for clearing stall status for TX EasyDMA RAM accesses. + * + * @param p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_spim_stallstat_tx_clear(NRF_SPIM_Type * p_reg); + +/** + * @brief Function for getting stall status for TX EasyDMA RAM accesses. + * + * @param p_reg Pointer to the peripheral registers structure. + * + * @return Stall status of TX EasyDMA RAM accesses. + */ +__STATIC_INLINE bool nrf_spim_stallstat_tx_get(NRF_SPIM_Type * p_reg); +#endif // defined(SPIM_STALLSTAT_TX_Msk) || defined(__NRFX_DOXYGEN__) + +/** + * @brief Function for setting the SPI master data rate. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] frequency SPI frequency. + */ +__STATIC_INLINE void nrf_spim_frequency_set(NRF_SPIM_Type * p_reg, + nrf_spim_frequency_t frequency); + +/** + * @brief Function for setting the transmit buffer. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] p_buffer Pointer to the buffer with data to send. + * @param[in] length Maximum number of data bytes to transmit. + */ +__STATIC_INLINE void nrf_spim_tx_buffer_set(NRF_SPIM_Type * p_reg, + uint8_t const * p_buffer, + size_t length); + +/** + * @brief Function for setting the receive buffer. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] p_buffer Pointer to the buffer for received data. + * @param[in] length Maximum number of data bytes to receive. + */ +__STATIC_INLINE void nrf_spim_rx_buffer_set(NRF_SPIM_Type * p_reg, + uint8_t * p_buffer, + size_t length); + +/** + * @brief Function for setting the SPI configuration. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spi_mode SPI mode. + * @param[in] spi_bit_order SPI bit order. + */ +__STATIC_INLINE void nrf_spim_configure(NRF_SPIM_Type * p_reg, + nrf_spim_mode_t spi_mode, + nrf_spim_bit_order_t spi_bit_order); + +/** + * @brief Function for setting the over-read character. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] orc Over-read character that is clocked out in case of + * an over-read of the TXD buffer. + */ +__STATIC_INLINE void nrf_spim_orc_set(NRF_SPIM_Type * p_reg, + uint8_t orc); + +/** + * @brief Function for enabling the TX list feature. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_spim_tx_list_enable(NRF_SPIM_Type * p_reg); + +/** + * @brief Function for disabling the TX list feature. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_spim_tx_list_disable(NRF_SPIM_Type * p_reg); + +/** + * @brief Function for enabling the RX list feature. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_spim_rx_list_enable(NRF_SPIM_Type * p_reg); + +/** + * @brief Function for disabling the RX list feature. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_spim_rx_list_disable(NRF_SPIM_Type * p_reg); + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE void nrf_spim_task_trigger(NRF_SPIM_Type * p_reg, + nrf_spim_task_t spim_task) +{ + *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spim_task)) = 0x1UL; +} + +__STATIC_INLINE uint32_t nrf_spim_task_address_get(NRF_SPIM_Type * p_reg, + nrf_spim_task_t spim_task) +{ + return (uint32_t)((uint8_t *)p_reg + (uint32_t)spim_task); +} + +__STATIC_INLINE void nrf_spim_event_clear(NRF_SPIM_Type * p_reg, + nrf_spim_event_t spim_event) +{ + *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spim_event)) = 0x0UL; +#if __CORTEX_M == 0x04 + volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spim_event)); + (void)dummy; +#endif +} + +__STATIC_INLINE bool nrf_spim_event_check(NRF_SPIM_Type * p_reg, + nrf_spim_event_t spim_event) +{ + return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spim_event); +} + +__STATIC_INLINE uint32_t nrf_spim_event_address_get(NRF_SPIM_Type * p_reg, + nrf_spim_event_t spim_event) +{ + return (uint32_t)((uint8_t *)p_reg + (uint32_t)spim_event); +} + +__STATIC_INLINE void nrf_spim_shorts_enable(NRF_SPIM_Type * p_reg, + uint32_t spim_shorts_mask) +{ + p_reg->SHORTS |= spim_shorts_mask; +} + +__STATIC_INLINE void nrf_spim_shorts_disable(NRF_SPIM_Type * p_reg, + uint32_t spim_shorts_mask) +{ + p_reg->SHORTS &= ~(spim_shorts_mask); +} + +__STATIC_INLINE uint32_t nrf_spim_shorts_get(NRF_SPIM_Type * p_reg) +{ + return p_reg->SHORTS; +} + +__STATIC_INLINE void nrf_spim_int_enable(NRF_SPIM_Type * p_reg, + uint32_t spim_int_mask) +{ + p_reg->INTENSET = spim_int_mask; +} + +__STATIC_INLINE void nrf_spim_int_disable(NRF_SPIM_Type * p_reg, + uint32_t spim_int_mask) +{ + p_reg->INTENCLR = spim_int_mask; +} + +__STATIC_INLINE bool nrf_spim_int_enable_check(NRF_SPIM_Type * p_reg, + nrf_spim_int_mask_t spim_int) +{ + return (bool)(p_reg->INTENSET & spim_int); +} + +__STATIC_INLINE void nrf_spim_enable(NRF_SPIM_Type * p_reg) +{ + p_reg->ENABLE = (SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos); +} + +__STATIC_INLINE void nrf_spim_disable(NRF_SPIM_Type * p_reg) +{ + p_reg->ENABLE = (SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos); +} + +__STATIC_INLINE void nrf_spim_pins_set(NRF_SPIM_Type * p_reg, + uint32_t sck_pin, + uint32_t mosi_pin, + uint32_t miso_pin) +{ + p_reg->PSEL.SCK = sck_pin; + p_reg->PSEL.MOSI = mosi_pin; + p_reg->PSEL.MISO = miso_pin; +} + +#if (NRF_SPIM_HW_CSN_PRESENT) +__STATIC_INLINE void nrf_spim_csn_configure(NRF_SPIM_Type * p_reg, + uint32_t pin, + nrf_spim_csn_pol_t polarity, + uint32_t duration) +{ + p_reg->PSEL.CSN = pin; + p_reg->CSNPOL = polarity; + p_reg->IFTIMING.CSNDUR = duration; +} +#endif // defined(NRF_SPIM_HW_CSN_PRESENT) + +#if defined(SPIM_PSELDCX_CONNECT_Msk) +__STATIC_INLINE void nrf_spim_dcx_pin_set(NRF_SPIM_Type * p_reg, + uint32_t dcx_pin) +{ + p_reg->PSELDCX = dcx_pin; +} + +__STATIC_INLINE void nrf_spim_dcx_cnt_set(NRF_SPIM_Type * p_reg, + uint32_t dcx_cnt) +{ + p_reg->DCXCNT = dcx_cnt; +} +#endif // defined(SPIM_PSELDCX_CONNECT_Msk) + +#if defined(SPIM_IFTIMING_RXDELAY_RXDELAY_Msk) +__STATIC_INLINE void nrf_spim_iftiming_set(NRF_SPIM_Type * p_reg, + uint32_t rxdelay) +{ + p_reg->IFTIMING.RXDELAY = rxdelay; +} +#endif // defined(SPIM_IFTIMING_RXDELAY_RXDELAY_Msk) + +#if defined(SPIM_STALLSTAT_RX_Msk) +__STATIC_INLINE void nrf_spim_stallstat_rx_clear(NRF_SPIM_Type * p_reg) +{ + p_reg->STALLSTAT &= ~(SPIM_STALLSTAT_RX_Msk); +} + +__STATIC_INLINE bool nrf_spim_stallstat_rx_get(NRF_SPIM_Type * p_reg) +{ + return (p_reg->STALLSTAT & SPIM_STALLSTAT_RX_Msk) != 0; +} +#endif // defined(SPIM_STALLSTAT_RX_Msk) + +#if defined(SPIM_STALLSTAT_TX_Msk) +__STATIC_INLINE void nrf_spim_stallstat_tx_clear(NRF_SPIM_Type * p_reg) +{ + p_reg->STALLSTAT &= ~(SPIM_STALLSTAT_TX_Msk); +} + +__STATIC_INLINE bool nrf_spim_stallstat_tx_get(NRF_SPIM_Type * p_reg) +{ + return (p_reg->STALLSTAT & SPIM_STALLSTAT_TX_Msk) != 0; +} +#endif // defined(SPIM_STALLSTAT_TX_Msk) + +__STATIC_INLINE void nrf_spim_frequency_set(NRF_SPIM_Type * p_reg, + nrf_spim_frequency_t frequency) +{ + p_reg->FREQUENCY = frequency; +} + +__STATIC_INLINE void nrf_spim_tx_buffer_set(NRF_SPIM_Type * p_reg, + uint8_t const * p_buffer, + size_t length) +{ + p_reg->TXD.PTR = (uint32_t)p_buffer; + p_reg->TXD.MAXCNT = length; +} + +__STATIC_INLINE void nrf_spim_rx_buffer_set(NRF_SPIM_Type * p_reg, + uint8_t * p_buffer, + size_t length) +{ + p_reg->RXD.PTR = (uint32_t)p_buffer; + p_reg->RXD.MAXCNT = length; +} + +__STATIC_INLINE void nrf_spim_configure(NRF_SPIM_Type * p_reg, + nrf_spim_mode_t spi_mode, + nrf_spim_bit_order_t spi_bit_order) +{ + uint32_t config = (spi_bit_order == NRF_SPIM_BIT_ORDER_MSB_FIRST ? + SPIM_CONFIG_ORDER_MsbFirst : SPIM_CONFIG_ORDER_LsbFirst); + switch (spi_mode) + { + default: + case NRF_SPIM_MODE_0: + config |= (SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) | + (SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos); + break; + + case NRF_SPIM_MODE_1: + config |= (SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) | + (SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos); + break; + + case NRF_SPIM_MODE_2: + config |= (SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) | + (SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos); + break; + + case NRF_SPIM_MODE_3: + config |= (SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) | + (SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos); + break; + } + p_reg->CONFIG = config; +} + +__STATIC_INLINE void nrf_spim_orc_set(NRF_SPIM_Type * p_reg, + uint8_t orc) +{ + p_reg->ORC = orc; +} + + +__STATIC_INLINE void nrf_spim_tx_list_enable(NRF_SPIM_Type * p_reg) +{ + p_reg->TXD.LIST = 1; +} + +__STATIC_INLINE void nrf_spim_tx_list_disable(NRF_SPIM_Type * p_reg) +{ + p_reg->TXD.LIST = 0; +} + +__STATIC_INLINE void nrf_spim_rx_list_enable(NRF_SPIM_Type * p_reg) +{ + p_reg->RXD.LIST = 1; +} + +__STATIC_INLINE void nrf_spim_rx_list_disable(NRF_SPIM_Type * p_reg) +{ + p_reg->RXD.LIST = 0; +} + +#endif // SUPPRESS_INLINE_IMPLEMENTATION + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_SPIM_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_spis.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_spis.h new file mode 100644 index 00000000000..d2d56c665d1 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_spis.h @@ -0,0 +1,571 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_SPIS_H__ +#define NRF_SPIS_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_spis_hal SPIS HAL + * @{ + * @ingroup nrf_spis + * @brief Hardware access layer for managing the SPIS peripheral. + */ + +/** + * @brief This value can be used as a parameter for the @ref nrf_spis_pins_set + * function to specify that a given SPI signal (SCK, MOSI, or MISO) + * shall not be connected to a physical pin. + */ +#define NRF_SPIS_PIN_NOT_CONNECTED 0xFFFFFFFF + + +/** + * @brief SPIS tasks. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_SPIS_TASK_ACQUIRE = offsetof(NRF_SPIS_Type, TASKS_ACQUIRE), ///< Acquire SPI semaphore. + NRF_SPIS_TASK_RELEASE = offsetof(NRF_SPIS_Type, TASKS_RELEASE), ///< Release SPI semaphore, enabling the SPI slave to acquire it. + /*lint -restore*/ +} nrf_spis_task_t; + +/** + * @brief SPIS events. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_SPIS_EVENT_END = offsetof(NRF_SPIS_Type, EVENTS_END), ///< Granted transaction completed. + NRF_SPIS_EVENT_ACQUIRED = offsetof(NRF_SPIS_Type, EVENTS_ACQUIRED) ///< Semaphore acquired. + /*lint -restore*/ +} nrf_spis_event_t; + +/** + * @brief SPIS shortcuts. + */ +typedef enum +{ + NRF_SPIS_SHORT_END_ACQUIRE = SPIS_SHORTS_END_ACQUIRE_Msk ///< Shortcut between END event and ACQUIRE task. +} nrf_spis_short_mask_t; + +/** + * @brief SPIS interrupts. + */ +typedef enum +{ + NRF_SPIS_INT_END_MASK = SPIS_INTENSET_END_Msk, ///< Interrupt on END event. + NRF_SPIS_INT_ACQUIRED_MASK = SPIS_INTENSET_ACQUIRED_Msk ///< Interrupt on ACQUIRED event. +} nrf_spis_int_mask_t; + +/** + * @brief SPI modes. + */ +typedef enum +{ + NRF_SPIS_MODE_0, ///< SCK active high, sample on leading edge of clock. + NRF_SPIS_MODE_1, ///< SCK active high, sample on trailing edge of clock. + NRF_SPIS_MODE_2, ///< SCK active low, sample on leading edge of clock. + NRF_SPIS_MODE_3 ///< SCK active low, sample on trailing edge of clock. +} nrf_spis_mode_t; + +/** + * @brief SPI bit orders. + */ +typedef enum +{ + NRF_SPIS_BIT_ORDER_MSB_FIRST = SPIS_CONFIG_ORDER_MsbFirst, ///< Most significant bit shifted out first. + NRF_SPIS_BIT_ORDER_LSB_FIRST = SPIS_CONFIG_ORDER_LsbFirst ///< Least significant bit shifted out first. +} nrf_spis_bit_order_t; + +/** + * @brief SPI semaphore status. + */ +typedef enum +{ + NRF_SPIS_SEMSTAT_FREE = 0, ///< Semaphore is free. + NRF_SPIS_SEMSTAT_CPU = 1, ///< Semaphore is assigned to the CPU. + NRF_SPIS_SEMSTAT_SPIS = 2, ///< Semaphore is assigned to the SPI slave. + NRF_SPIS_SEMSTAT_CPUPENDING = 3 ///< Semaphore is assigned to the SPI, but a handover to the CPU is pending. +} nrf_spis_semstat_t; + +/** + * @brief SPIS status. + */ +typedef enum +{ + NRF_SPIS_STATUS_OVERREAD = SPIS_STATUS_OVERREAD_Msk, ///< TX buffer over-read detected and prevented. + NRF_SPIS_STATUS_OVERFLOW = SPIS_STATUS_OVERFLOW_Msk ///< RX buffer overflow detected and prevented. +} nrf_spis_status_mask_t; + +/** + * @brief Function for activating a specific SPIS task. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spis_task Task to activate. + */ +__STATIC_INLINE void nrf_spis_task_trigger(NRF_SPIS_Type * p_reg, + nrf_spis_task_t spis_task); + +/** + * @brief Function for getting the address of a specific SPIS task register. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spis_task Requested task. + * + * @return Address of the specified task register. + */ +__STATIC_INLINE uint32_t nrf_spis_task_address_get(NRF_SPIS_Type const * p_reg, + nrf_spis_task_t spis_task); + +/** + * @brief Function for clearing a specific SPIS event. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spis_event Event to clear. + */ +__STATIC_INLINE void nrf_spis_event_clear(NRF_SPIS_Type * p_reg, + nrf_spis_event_t spis_event); + +/** + * @brief Function for checking the state of a specific SPIS event. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spis_event Event to check. + * + * @retval true If the event is set. + * @retval false If the event is not set. + */ +__STATIC_INLINE bool nrf_spis_event_check(NRF_SPIS_Type const * p_reg, + nrf_spis_event_t spis_event); + +/** + * @brief Function for getting the address of a specific SPIS event register. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spis_event Requested event. + * + * @return Address of the specified event register. + */ +__STATIC_INLINE uint32_t nrf_spis_event_address_get(NRF_SPIS_Type const * p_reg, + nrf_spis_event_t spis_event); + +/** + * @brief Function for enabling specified shortcuts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spis_shorts_mask Shortcuts to enable. + */ +__STATIC_INLINE void nrf_spis_shorts_enable(NRF_SPIS_Type * p_reg, + uint32_t spis_shorts_mask); + +/** + * @brief Function for disabling specified shortcuts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spis_shorts_mask Shortcuts to disable. + */ +__STATIC_INLINE void nrf_spis_shorts_disable(NRF_SPIS_Type * p_reg, + uint32_t spis_shorts_mask); + +/** + * @brief Function for enabling specified interrupts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spis_int_mask Interrupts to enable. + */ +__STATIC_INLINE void nrf_spis_int_enable(NRF_SPIS_Type * p_reg, + uint32_t spis_int_mask); + +/** + * @brief Function for disabling specified interrupts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spis_int_mask Interrupts to disable. + */ +__STATIC_INLINE void nrf_spis_int_disable(NRF_SPIS_Type * p_reg, + uint32_t spis_int_mask); + +/** + * @brief Function for retrieving the state of a given interrupt. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spis_int Interrupt to check. + * + * @retval true If the interrupt is enabled. + * @retval false If the interrupt is not enabled. + */ +__STATIC_INLINE bool nrf_spis_int_enable_check(NRF_SPIS_Type const * p_reg, + nrf_spis_int_mask_t spis_int); + +/** + * @brief Function for enabling the SPIS peripheral. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_spis_enable(NRF_SPIS_Type * p_reg); + +/** + * @brief Function for disabling the SPIS peripheral. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_spis_disable(NRF_SPIS_Type * p_reg); + +/** + * @brief Function for retrieving the SPIS semaphore status. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * + * @returns Current semaphore status. + */ +__STATIC_INLINE nrf_spis_semstat_t nrf_spis_semaphore_status_get(NRF_SPIS_Type * p_reg); + +/** + * @brief Function for retrieving the SPIS status. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * + * @returns Current SPIS status. + */ +__STATIC_INLINE nrf_spis_status_mask_t nrf_spis_status_get(NRF_SPIS_Type * p_reg); + +/** + * @brief Function for configuring SPIS pins. + * + * If a given signal is not needed, pass the @ref NRF_SPIS_PIN_NOT_CONNECTED + * value instead of its pin number. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] sck_pin SCK pin number. + * @param[in] mosi_pin MOSI pin number. + * @param[in] miso_pin MISO pin number. + * @param[in] csn_pin CSN pin number. + */ +__STATIC_INLINE void nrf_spis_pins_set(NRF_SPIS_Type * p_reg, + uint32_t sck_pin, + uint32_t mosi_pin, + uint32_t miso_pin, + uint32_t csn_pin); + +/** + * @brief Function for setting the transmit buffer. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] p_buffer Pointer to the buffer that contains the data to send. + * @param[in] length Maximum number of data bytes to transmit. + */ +__STATIC_INLINE void nrf_spis_tx_buffer_set(NRF_SPIS_Type * p_reg, + uint8_t const * p_buffer, + size_t length); + +/** + * @brief Function for setting the receive buffer. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] p_buffer Pointer to the buffer for received data. + * @param[in] length Maximum number of data bytes to receive. + */ +__STATIC_INLINE void nrf_spis_rx_buffer_set(NRF_SPIS_Type * p_reg, + uint8_t * p_buffer, + size_t length); + +/** + * @brief Function for getting the number of bytes transmitted + * in the last granted transaction. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * + * @returns Number of bytes transmitted. + */ +__STATIC_INLINE size_t nrf_spis_tx_amount_get(NRF_SPIS_Type const * p_reg); + +/** + * @brief Function for getting the number of bytes received + * in the last granted transaction. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * + * @returns Number of bytes received. + */ +__STATIC_INLINE size_t nrf_spis_rx_amount_get(NRF_SPIS_Type const * p_reg); + +/** + * @brief Function for setting the SPI configuration. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] spi_mode SPI mode. + * @param[in] spi_bit_order SPI bit order. + */ +__STATIC_INLINE void nrf_spis_configure(NRF_SPIS_Type * p_reg, + nrf_spis_mode_t spi_mode, + nrf_spis_bit_order_t spi_bit_order); + +/** + * @brief Function for setting the default character. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] def Default character that is clocked out in case of + * an overflow of the RXD buffer. + */ +__STATIC_INLINE void nrf_spis_def_set(NRF_SPIS_Type * p_reg, + uint8_t def); + +/** + * @brief Function for setting the over-read character. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] orc Over-read character that is clocked out in case of + * an over-read of the TXD buffer. + */ +__STATIC_INLINE void nrf_spis_orc_set(NRF_SPIS_Type * p_reg, + uint8_t orc); + + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE void nrf_spis_task_trigger(NRF_SPIS_Type * p_reg, + nrf_spis_task_t spis_task) +{ + *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spis_task)) = 0x1UL; +} + +__STATIC_INLINE uint32_t nrf_spis_task_address_get(NRF_SPIS_Type const * p_reg, + nrf_spis_task_t spis_task) +{ + return (uint32_t)p_reg + (uint32_t)spis_task; +} + +__STATIC_INLINE void nrf_spis_event_clear(NRF_SPIS_Type * p_reg, + nrf_spis_event_t spis_event) +{ + *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spis_event)) = 0x0UL; +#if __CORTEX_M == 0x04 + volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spis_event)); + (void)dummy; +#endif +} + +__STATIC_INLINE bool nrf_spis_event_check(NRF_SPIS_Type const * p_reg, + nrf_spis_event_t spis_event) +{ + return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spis_event); +} + +__STATIC_INLINE uint32_t nrf_spis_event_address_get(NRF_SPIS_Type const * p_reg, + nrf_spis_event_t spis_event) +{ + return (uint32_t)p_reg + (uint32_t)spis_event; +} + +__STATIC_INLINE void nrf_spis_shorts_enable(NRF_SPIS_Type * p_reg, + uint32_t spis_shorts_mask) +{ + p_reg->SHORTS |= spis_shorts_mask; +} + +__STATIC_INLINE void nrf_spis_shorts_disable(NRF_SPIS_Type * p_reg, + uint32_t spis_shorts_mask) +{ + p_reg->SHORTS &= ~(spis_shorts_mask); +} + +__STATIC_INLINE void nrf_spis_int_enable(NRF_SPIS_Type * p_reg, + uint32_t spis_int_mask) +{ + p_reg->INTENSET = spis_int_mask; +} + +__STATIC_INLINE void nrf_spis_int_disable(NRF_SPIS_Type * p_reg, + uint32_t spis_int_mask) +{ + p_reg->INTENCLR = spis_int_mask; +} + +__STATIC_INLINE bool nrf_spis_int_enable_check(NRF_SPIS_Type const * p_reg, + nrf_spis_int_mask_t spis_int) +{ + return (bool)(p_reg->INTENSET & spis_int); +} + +__STATIC_INLINE void nrf_spis_enable(NRF_SPIS_Type * p_reg) +{ + p_reg->ENABLE = (SPIS_ENABLE_ENABLE_Enabled << SPIS_ENABLE_ENABLE_Pos); +} + +__STATIC_INLINE void nrf_spis_disable(NRF_SPIS_Type * p_reg) +{ + p_reg->ENABLE = (SPIS_ENABLE_ENABLE_Disabled << SPIS_ENABLE_ENABLE_Pos); +} + +__STATIC_INLINE nrf_spis_semstat_t nrf_spis_semaphore_status_get(NRF_SPIS_Type * p_reg) +{ + return (nrf_spis_semstat_t) ((p_reg->SEMSTAT & SPIS_SEMSTAT_SEMSTAT_Msk) + >> SPIS_SEMSTAT_SEMSTAT_Pos); +} + +__STATIC_INLINE nrf_spis_status_mask_t nrf_spis_status_get(NRF_SPIS_Type * p_reg) +{ + return (nrf_spis_status_mask_t) p_reg->STATUS; +} + +__STATIC_INLINE void nrf_spis_pins_set(NRF_SPIS_Type * p_reg, + uint32_t sck_pin, + uint32_t mosi_pin, + uint32_t miso_pin, + uint32_t csn_pin) +{ +#if defined (NRF51) + p_reg->PSELSCK = sck_pin; + p_reg->PSELMOSI = mosi_pin; + p_reg->PSELMISO = miso_pin; + p_reg->PSELCSN = csn_pin; +#else + p_reg->PSEL.SCK = sck_pin; + p_reg->PSEL.MOSI = mosi_pin; + p_reg->PSEL.MISO = miso_pin; + p_reg->PSEL.CSN = csn_pin; +#endif +} + +__STATIC_INLINE void nrf_spis_tx_buffer_set(NRF_SPIS_Type * p_reg, + uint8_t const * p_buffer, + size_t length) +{ +#if defined (NRF51) + p_reg->TXDPTR = (uint32_t)p_buffer; + p_reg->MAXTX = length; +#else + p_reg->TXD.PTR = (uint32_t)p_buffer; + p_reg->TXD.MAXCNT = length; +#endif +} + +__STATIC_INLINE void nrf_spis_rx_buffer_set(NRF_SPIS_Type * p_reg, + uint8_t * p_buffer, + size_t length) +{ +#if defined (NRF51) + p_reg->RXDPTR = (uint32_t)p_buffer; + p_reg->MAXRX = length; +#else + p_reg->RXD.PTR = (uint32_t)p_buffer; + p_reg->RXD.MAXCNT = length; +#endif +} + +__STATIC_INLINE size_t nrf_spis_tx_amount_get(NRF_SPIS_Type const * p_reg) +{ +#if defined (NRF51) + return p_reg->AMOUNTTX; +#else + return p_reg->TXD.AMOUNT; +#endif +} + +__STATIC_INLINE size_t nrf_spis_rx_amount_get(NRF_SPIS_Type const * p_reg) +{ +#if defined (NRF51) + return p_reg->AMOUNTRX; +#else + return p_reg->RXD.AMOUNT; +#endif +} + +__STATIC_INLINE void nrf_spis_configure(NRF_SPIS_Type * p_reg, + nrf_spis_mode_t spi_mode, + nrf_spis_bit_order_t spi_bit_order) +{ + uint32_t config = (spi_bit_order == NRF_SPIS_BIT_ORDER_MSB_FIRST ? + SPIS_CONFIG_ORDER_MsbFirst : SPIS_CONFIG_ORDER_LsbFirst); + + switch (spi_mode) + { + default: + case NRF_SPIS_MODE_0: + config |= (SPIS_CONFIG_CPOL_ActiveHigh << SPIS_CONFIG_CPOL_Pos) | + (SPIS_CONFIG_CPHA_Leading << SPIS_CONFIG_CPHA_Pos); + break; + + case NRF_SPIS_MODE_1: + config |= (SPIS_CONFIG_CPOL_ActiveHigh << SPIS_CONFIG_CPOL_Pos) | + (SPIS_CONFIG_CPHA_Trailing << SPIS_CONFIG_CPHA_Pos); + break; + + case NRF_SPIS_MODE_2: + config |= (SPIS_CONFIG_CPOL_ActiveLow << SPIS_CONFIG_CPOL_Pos) | + (SPIS_CONFIG_CPHA_Leading << SPIS_CONFIG_CPHA_Pos); + break; + + case NRF_SPIS_MODE_3: + config |= (SPIS_CONFIG_CPOL_ActiveLow << SPIS_CONFIG_CPOL_Pos) | + (SPIS_CONFIG_CPHA_Trailing << SPIS_CONFIG_CPHA_Pos); + break; + } + p_reg->CONFIG = config; +} + +__STATIC_INLINE void nrf_spis_orc_set(NRF_SPIS_Type * p_reg, + uint8_t orc) +{ + p_reg->ORC = orc; +} + +__STATIC_INLINE void nrf_spis_def_set(NRF_SPIS_Type * p_reg, + uint8_t def) +{ + p_reg->DEF = def; +} + +#endif // SUPPRESS_INLINE_IMPLEMENTATION + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_SPIS_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_systick.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_systick.h new file mode 100644 index 00000000000..4842fb42358 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_systick.h @@ -0,0 +1,190 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_SYSTICK_H__ +#define NRF_SYSTICK_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_systick_hal SYSTICK HAL + * @{ + * @ingroup nrf_systick + * @brief Hardware access layer for managing the SYSTICK peripheral. + * + * SYSTICK is ARM peripheral, not Nordic design. + * It means that it has no Nordic-typical interface with Tasks and Events. + * + * Its usage is limited here to implement simple delays. + * Also keep in mind that this timer would be stopped when CPU is sleeping + * (WFE/WFI instruction is successfully executed). + */ + +/** + * @brief Mask of usable bits in the SysTick value + */ +#define NRF_SYSTICK_VAL_MASK SysTick_VAL_CURRENT_Msk + +/** + * @brief Flags used by SysTick configuration. + * + * @sa nrf_systick_csr_set + * @sa nrf_systick_csr_get + */ +typedef enum { + NRF_SYSTICK_CSR_COUNTFLAG_MASK = SysTick_CTRL_COUNTFLAG_Msk, /**< Status flag: Returns 1 if timer counted to 0 since the last read of this register. */ + + NRF_SYSTICK_CSR_CLKSOURCE_MASK = SysTick_CTRL_CLKSOURCE_Msk, /**< Configuration bit: Select the SysTick clock source. */ + NRF_SYSTICK_CSR_CLKSOURCE_REF = 0U << SysTick_CTRL_CLKSOURCE_Pos, /**< Configuration value: Select reference clock. */ + NRF_SYSTICK_CSR_CLKSOURCE_CPU = 1U << SysTick_CTRL_CLKSOURCE_Pos, /**< Configuration value: Select CPU clock. */ + + NRF_SYSTICK_CSR_TICKINT_MASK = SysTick_CTRL_TICKINT_Msk, /**< Configuration bit: Enables SysTick exception request. */ + NRF_SYSTICK_CSR_TICKINT_ENABLE = 1U << SysTick_CTRL_TICKINT_Pos, /**< Configuration value: Counting down to zero does not assert the SysTick exception request. */ + NRF_SYSTICK_CSR_TICKINT_DISABLE = 0U << SysTick_CTRL_TICKINT_Pos, /**< Configuration value: Counting down to zero to asserts the SysTick exception request. */ + + NRF_SYSTICK_CSR_ENABLE_MASK = SysTick_CTRL_ENABLE_Msk, /**< Configuration bit: Enable the SysTick timer. */ + NRF_SYSTICK_CSR_ENABLE = 1U << SysTick_CTRL_ENABLE_Pos, /**< Configuration value: Counter enabled. */ + NRF_SYSTICK_CSR_DISABLE = 0U << SysTick_CTRL_ENABLE_Pos /**< Configuration value: Counter disabled. */ +} nrf_systick_csr_flags_t; + +/** + * @brief Get Configuration and Status Register + * + * @return Values composed by @ref nrf_systick_csr_flags_t. + * @note The @ref NRF_SYSTICK_CSR_COUNTFLAG_MASK value is cleared when CSR register is read. + */ +__STATIC_INLINE uint32_t nrf_systick_csr_get(void); + +/** + * @brief Set Configuration and Status Register + * + * @param[in] val The value composed from @ref nrf_systick_csr_flags_t. + */ +__STATIC_INLINE void nrf_systick_csr_set(uint32_t val); + +/** + * @brief Get the current reload value. + * + * @return The reload register value. + */ +__STATIC_INLINE uint32_t nrf_systick_load_get(void); + +/** + * @brief Configure the reload value. + * + * @param[in] val The value to set in the reload register. + */ +__STATIC_INLINE void nrf_systick_load_set(uint32_t val); + +/** + * @brief Read the SysTick current value + * + * @return The current SysTick value + * @sa NRF_SYSTICK_VAL_MASK + */ +__STATIC_INLINE uint32_t nrf_systick_val_get(void); + +/** + * @brief Clear the SysTick current value + * + * @note The SysTick does not allow setting current value. + * Any write to VAL register would clear the timer. + */ +__STATIC_INLINE void nrf_systick_val_clear(void); + +/** + * @brief Read the calibration register + * + * @return The calibration register value + */ +__STATIC_INLINE uint32_t nrf_systick_calib_get(void); + + + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE uint32_t nrf_systick_csr_get(void) +{ + return SysTick->CTRL; +} + +__STATIC_INLINE void nrf_systick_csr_set(uint32_t val) +{ + SysTick->CTRL = val; +} + +__STATIC_INLINE uint32_t nrf_systick_load_get(void) +{ + return SysTick->LOAD; +} + +__STATIC_INLINE void nrf_systick_load_set(uint32_t val) +{ + SysTick->LOAD = val; +} + +__STATIC_INLINE uint32_t nrf_systick_val_get(void) +{ + return SysTick->VAL; +} + +__STATIC_INLINE void nrf_systick_val_clear(void) +{ + SysTick->VAL = 0; +} + +__STATIC_INLINE uint32_t nrf_systick_calib_get(void) +{ + return SysTick->CALIB; +} + +#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_SYSTICK_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_temp.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_temp.h new file mode 100644 index 00000000000..04772a9f4d9 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_temp.h @@ -0,0 +1,88 @@ +/** + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_TEMP_H__ +#define NRF_TEMP_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** +* @defgroup nrf_temp_hal TEMP HAL +* @{ +* @ingroup nrf_temp temperature_example +* @brief Temperature module init and read functions. +*/ + +#define MASK_SIGN (0x00000200UL) +#define MASK_SIGN_EXTENSION (0xFFFFFC00UL) + +/** + * @brief Function for preparing the temp module for temperature measurement. + * + * This function initializes the TEMP module and writes to the hidden configuration register. + */ +static __INLINE void nrf_temp_init(void) +{ + /**@note Workaround for PAN_028 rev2.0A anomaly 31 - TEMP: Temperature offset value has to be manually loaded to the TEMP module */ + *(uint32_t *) 0x4000C504 = 0; +} + +/** + * @brief Function for reading temperature measurement. + * + * The function reads the 10 bit 2's complement value and transforms it to a 32 bit 2's complement value. + */ +static __INLINE int32_t nrf_temp_read(void) +{ + /**@note Workaround for PAN_028 rev2.0A anomaly 28 - TEMP: Negative measured values are not represented correctly */ + return ((NRF_TEMP->TEMP & MASK_SIGN) != 0) ? (int32_t)(NRF_TEMP->TEMP | MASK_SIGN_EXTENSION) : (NRF_TEMP->TEMP); +} + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_timer.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_timer.h new file mode 100644 index 00000000000..2303478d01c --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_timer.h @@ -0,0 +1,634 @@ +/** + * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_TIMER_H__ +#define NRF_TIMER_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_timer_hal TIMER HAL + * @{ + * @ingroup nrf_timer + * @brief Hardware access layer for managing the TIMER peripheral. + */ + +/** + * @brief Macro for validating the correctness of the BIT_WIDTH setting. + */ + +#define TIMER_MAX_SIZE(id) NRFX_CONCAT_3(TIMER, id, _MAX_SIZE) + +#define TIMER_BIT_WIDTH_MAX(id, bit_width) \ + (TIMER_MAX_SIZE(id) == 8 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) : \ + (TIMER_MAX_SIZE(id) == 16 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \ + (bit_width == NRF_TIMER_BIT_WIDTH_16) : \ + (TIMER_MAX_SIZE(id) == 24 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \ + (bit_width == NRF_TIMER_BIT_WIDTH_16) || \ + (bit_width == NRF_TIMER_BIT_WIDTH_24) : \ + (TIMER_MAX_SIZE(id) == 32 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \ + (bit_width == NRF_TIMER_BIT_WIDTH_16) || \ + (bit_width == NRF_TIMER_BIT_WIDTH_24) || \ + (bit_width == NRF_TIMER_BIT_WIDTH_32) : \ + false)))) + +#if TIMER_COUNT > 3 +#define NRF_TIMER_IS_BIT_WIDTH_VALID(p_reg, bit_width) ( \ + ((p_reg == NRF_TIMER0) && (TIMER_BIT_WIDTH_MAX(0, bit_width))) \ + || ((p_reg == NRF_TIMER1) && (TIMER_BIT_WIDTH_MAX(1, bit_width))) \ + || ((p_reg == NRF_TIMER2) && (TIMER_BIT_WIDTH_MAX(2, bit_width))) \ + || ((p_reg == NRF_TIMER3) && (TIMER_BIT_WIDTH_MAX(3, bit_width))) \ + || ((p_reg == NRF_TIMER4) && (TIMER_BIT_WIDTH_MAX(4, bit_width))) ) + +#else +#define NRF_TIMER_IS_BIT_WIDTH_VALID(p_reg, bit_width) ( \ + ((p_reg == NRF_TIMER0) && TIMER_BIT_WIDTH_MAX(0, bit_width)) \ + || ((p_reg == NRF_TIMER1) && TIMER_BIT_WIDTH_MAX(1, bit_width)) \ + || ((p_reg == NRF_TIMER2) && TIMER_BIT_WIDTH_MAX(2, bit_width)) ) + +#endif + +/** + * @brief Macro for getting the number of capture/compare channels available + * in a given timer instance. + */ +#define NRF_TIMER_CC_CHANNEL_COUNT(id) NRFX_CONCAT_3(TIMER, id, _CC_NUM) + +/** + * @brief Timer tasks. + */ +typedef enum +{ + /*lint -save -e30 -esym(628,__INTADDR__)*/ + NRF_TIMER_TASK_START = offsetof(NRF_TIMER_Type, TASKS_START), ///< Task for starting the timer. + NRF_TIMER_TASK_STOP = offsetof(NRF_TIMER_Type, TASKS_STOP), ///< Task for stopping the timer. + NRF_TIMER_TASK_COUNT = offsetof(NRF_TIMER_Type, TASKS_COUNT), ///< Task for incrementing the timer (in counter mode). + NRF_TIMER_TASK_CLEAR = offsetof(NRF_TIMER_Type, TASKS_CLEAR), ///< Task for resetting the timer value. + NRF_TIMER_TASK_SHUTDOWN = offsetof(NRF_TIMER_Type, TASKS_SHUTDOWN), ///< Task for powering off the timer. + NRF_TIMER_TASK_CAPTURE0 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[0]), ///< Task for capturing the timer value on channel 0. + NRF_TIMER_TASK_CAPTURE1 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[1]), ///< Task for capturing the timer value on channel 1. + NRF_TIMER_TASK_CAPTURE2 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[2]), ///< Task for capturing the timer value on channel 2. + NRF_TIMER_TASK_CAPTURE3 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[3]), ///< Task for capturing the timer value on channel 3. +#if defined(TIMER_INTENSET_COMPARE4_Msk) || defined(__NRFX_DOXYGEN__) + NRF_TIMER_TASK_CAPTURE4 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[4]), ///< Task for capturing the timer value on channel 4. +#endif +#if defined(TIMER_INTENSET_COMPARE5_Msk) || defined(__NRFX_DOXYGEN__) + NRF_TIMER_TASK_CAPTURE5 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[5]), ///< Task for capturing the timer value on channel 5. +#endif + /*lint -restore*/ +} nrf_timer_task_t; + +/** + * @brief Timer events. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_TIMER_EVENT_COMPARE0 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[0]), ///< Event from compare channel 0. + NRF_TIMER_EVENT_COMPARE1 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[1]), ///< Event from compare channel 1. + NRF_TIMER_EVENT_COMPARE2 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[2]), ///< Event from compare channel 2. + NRF_TIMER_EVENT_COMPARE3 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[3]), ///< Event from compare channel 3. +#if defined(TIMER_INTENSET_COMPARE4_Msk) || defined(__NRFX_DOXYGEN__) + NRF_TIMER_EVENT_COMPARE4 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[4]), ///< Event from compare channel 4. +#endif +#if defined(TIMER_INTENSET_COMPARE5_Msk) || defined(__NRFX_DOXYGEN__) + NRF_TIMER_EVENT_COMPARE5 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[5]), ///< Event from compare channel 5. +#endif + /*lint -restore*/ +} nrf_timer_event_t; + +/** + * @brief Types of timer shortcuts. + */ +typedef enum +{ + NRF_TIMER_SHORT_COMPARE0_STOP_MASK = TIMER_SHORTS_COMPARE0_STOP_Msk, ///< Shortcut for stopping the timer based on compare 0. + NRF_TIMER_SHORT_COMPARE1_STOP_MASK = TIMER_SHORTS_COMPARE1_STOP_Msk, ///< Shortcut for stopping the timer based on compare 1. + NRF_TIMER_SHORT_COMPARE2_STOP_MASK = TIMER_SHORTS_COMPARE2_STOP_Msk, ///< Shortcut for stopping the timer based on compare 2. + NRF_TIMER_SHORT_COMPARE3_STOP_MASK = TIMER_SHORTS_COMPARE3_STOP_Msk, ///< Shortcut for stopping the timer based on compare 3. +#if defined(TIMER_INTENSET_COMPARE4_Msk) || defined(__NRFX_DOXYGEN__) + NRF_TIMER_SHORT_COMPARE4_STOP_MASK = TIMER_SHORTS_COMPARE4_STOP_Msk, ///< Shortcut for stopping the timer based on compare 4. +#endif +#if defined(TIMER_INTENSET_COMPARE5_Msk) || defined(__NRFX_DOXYGEN__) + NRF_TIMER_SHORT_COMPARE5_STOP_MASK = TIMER_SHORTS_COMPARE5_STOP_Msk, ///< Shortcut for stopping the timer based on compare 5. +#endif + NRF_TIMER_SHORT_COMPARE0_CLEAR_MASK = TIMER_SHORTS_COMPARE0_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 0. + NRF_TIMER_SHORT_COMPARE1_CLEAR_MASK = TIMER_SHORTS_COMPARE1_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 1. + NRF_TIMER_SHORT_COMPARE2_CLEAR_MASK = TIMER_SHORTS_COMPARE2_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 2. + NRF_TIMER_SHORT_COMPARE3_CLEAR_MASK = TIMER_SHORTS_COMPARE3_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 3. +#if defined(TIMER_INTENSET_COMPARE4_Msk) || defined(__NRFX_DOXYGEN__) + NRF_TIMER_SHORT_COMPARE4_CLEAR_MASK = TIMER_SHORTS_COMPARE4_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 4. +#endif +#if defined(TIMER_INTENSET_COMPARE5_Msk) || defined(__NRFX_DOXYGEN__) + NRF_TIMER_SHORT_COMPARE5_CLEAR_MASK = TIMER_SHORTS_COMPARE5_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 5. +#endif +} nrf_timer_short_mask_t; + +/** + * @brief Timer modes. + */ +typedef enum +{ + NRF_TIMER_MODE_TIMER = TIMER_MODE_MODE_Timer, ///< Timer mode: timer. + NRF_TIMER_MODE_COUNTER = TIMER_MODE_MODE_Counter, ///< Timer mode: counter. +#if defined(TIMER_MODE_MODE_LowPowerCounter) || defined(__NRFX_DOXYGEN__) + NRF_TIMER_MODE_LOW_POWER_COUNTER = TIMER_MODE_MODE_LowPowerCounter, ///< Timer mode: low-power counter. +#endif +} nrf_timer_mode_t; + +/** + * @brief Timer bit width. + */ +typedef enum +{ + NRF_TIMER_BIT_WIDTH_8 = TIMER_BITMODE_BITMODE_08Bit, ///< Timer bit width 8 bit. + NRF_TIMER_BIT_WIDTH_16 = TIMER_BITMODE_BITMODE_16Bit, ///< Timer bit width 16 bit. + NRF_TIMER_BIT_WIDTH_24 = TIMER_BITMODE_BITMODE_24Bit, ///< Timer bit width 24 bit. + NRF_TIMER_BIT_WIDTH_32 = TIMER_BITMODE_BITMODE_32Bit ///< Timer bit width 32 bit. +} nrf_timer_bit_width_t; + +/** + * @brief Timer prescalers. + */ +typedef enum +{ + NRF_TIMER_FREQ_16MHz = 0, ///< Timer frequency 16 MHz. + NRF_TIMER_FREQ_8MHz, ///< Timer frequency 8 MHz. + NRF_TIMER_FREQ_4MHz, ///< Timer frequency 4 MHz. + NRF_TIMER_FREQ_2MHz, ///< Timer frequency 2 MHz. + NRF_TIMER_FREQ_1MHz, ///< Timer frequency 1 MHz. + NRF_TIMER_FREQ_500kHz, ///< Timer frequency 500 kHz. + NRF_TIMER_FREQ_250kHz, ///< Timer frequency 250 kHz. + NRF_TIMER_FREQ_125kHz, ///< Timer frequency 125 kHz. + NRF_TIMER_FREQ_62500Hz, ///< Timer frequency 62500 Hz. + NRF_TIMER_FREQ_31250Hz ///< Timer frequency 31250 Hz. +} nrf_timer_frequency_t; + +/** + * @brief Timer capture/compare channels. + */ +typedef enum +{ + NRF_TIMER_CC_CHANNEL0 = 0, ///< Timer capture/compare channel 0. + NRF_TIMER_CC_CHANNEL1, ///< Timer capture/compare channel 1. + NRF_TIMER_CC_CHANNEL2, ///< Timer capture/compare channel 2. + NRF_TIMER_CC_CHANNEL3, ///< Timer capture/compare channel 3. +#if defined(TIMER_INTENSET_COMPARE4_Msk) || defined(__NRFX_DOXYGEN__) + NRF_TIMER_CC_CHANNEL4, ///< Timer capture/compare channel 4. +#endif +#if defined(TIMER_INTENSET_COMPARE5_Msk) || defined(__NRFX_DOXYGEN__) + NRF_TIMER_CC_CHANNEL5, ///< Timer capture/compare channel 5. +#endif +} nrf_timer_cc_channel_t; + +/** + * @brief Timer interrupts. + */ +typedef enum +{ + NRF_TIMER_INT_COMPARE0_MASK = TIMER_INTENSET_COMPARE0_Msk, ///< Timer interrupt from compare event on channel 0. + NRF_TIMER_INT_COMPARE1_MASK = TIMER_INTENSET_COMPARE1_Msk, ///< Timer interrupt from compare event on channel 1. + NRF_TIMER_INT_COMPARE2_MASK = TIMER_INTENSET_COMPARE2_Msk, ///< Timer interrupt from compare event on channel 2. + NRF_TIMER_INT_COMPARE3_MASK = TIMER_INTENSET_COMPARE3_Msk, ///< Timer interrupt from compare event on channel 3. +#if defined(TIMER_INTENSET_COMPARE4_Msk) || defined(__NRFX_DOXYGEN__) + NRF_TIMER_INT_COMPARE4_MASK = TIMER_INTENSET_COMPARE4_Msk, ///< Timer interrupt from compare event on channel 4. +#endif +#if defined(TIMER_INTENSET_COMPARE5_Msk) || defined(__NRFX_DOXYGEN__) + NRF_TIMER_INT_COMPARE5_MASK = TIMER_INTENSET_COMPARE5_Msk, ///< Timer interrupt from compare event on channel 5. +#endif +} nrf_timer_int_mask_t; + + +/** + * @brief Function for activating a specific timer task. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] task Task to activate. + */ +__STATIC_INLINE void nrf_timer_task_trigger(NRF_TIMER_Type * p_reg, + nrf_timer_task_t task); + +/** + * @brief Function for getting the address of a specific timer task register. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] task Requested task. + * + * @return Address of the specified task register. + */ +__STATIC_INLINE uint32_t * nrf_timer_task_address_get(NRF_TIMER_Type * p_reg, + nrf_timer_task_t task); + +/** + * @brief Function for clearing a specific timer event. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] event Event to clear. + */ +__STATIC_INLINE void nrf_timer_event_clear(NRF_TIMER_Type * p_reg, + nrf_timer_event_t event); + +/** + * @brief Function for checking the state of a specific timer event. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] event Event to check. + * + * @retval true If the event is set. + * @retval false If the event is not set. + */ +__STATIC_INLINE bool nrf_timer_event_check(NRF_TIMER_Type * p_reg, + nrf_timer_event_t event); + +/** + * @brief Function for getting the address of a specific timer event register. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] event Requested event. + * + * @return Address of the specified event register. + */ +__STATIC_INLINE uint32_t * nrf_timer_event_address_get(NRF_TIMER_Type * p_reg, + nrf_timer_event_t event); + +/** + * @brief Function for enabling specified shortcuts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] timer_shorts_mask Shortcuts to enable. + */ +__STATIC_INLINE void nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg, + uint32_t timer_shorts_mask); + +/** + * @brief Function for disabling specified shortcuts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] timer_shorts_mask Shortcuts to disable. + */ +__STATIC_INLINE void nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg, + uint32_t timer_shorts_mask); + +/** + * @brief Function for enabling specified interrupts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] timer_int_mask Interrupts to enable. + */ +__STATIC_INLINE void nrf_timer_int_enable(NRF_TIMER_Type * p_reg, + uint32_t timer_int_mask); + +/** + * @brief Function for disabling specified interrupts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] timer_int_mask Interrupts to disable. + */ +__STATIC_INLINE void nrf_timer_int_disable(NRF_TIMER_Type * p_reg, + uint32_t timer_int_mask); + +/** + * @brief Function for retrieving the state of a given interrupt. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] timer_int Interrupt to check. + * + * @retval true If the interrupt is enabled. + * @retval false If the interrupt is not enabled. + */ +__STATIC_INLINE bool nrf_timer_int_enable_check(NRF_TIMER_Type * p_reg, + uint32_t timer_int); + +/** + * @brief Function for setting the timer mode. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] mode Timer mode. + */ +__STATIC_INLINE void nrf_timer_mode_set(NRF_TIMER_Type * p_reg, + nrf_timer_mode_t mode); + +/** + * @brief Function for retrieving the timer mode. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * + * @return Timer mode. + */ +__STATIC_INLINE nrf_timer_mode_t nrf_timer_mode_get(NRF_TIMER_Type * p_reg); + +/** + * @brief Function for setting the timer bit width. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] bit_width Timer bit width. + */ +__STATIC_INLINE void nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg, + nrf_timer_bit_width_t bit_width); + +/** + * @brief Function for retrieving the timer bit width. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * + * @return Timer bit width. + */ +__STATIC_INLINE nrf_timer_bit_width_t nrf_timer_bit_width_get(NRF_TIMER_Type * p_reg); + +/** + * @brief Function for setting the timer frequency. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] frequency Timer frequency. + */ +__STATIC_INLINE void nrf_timer_frequency_set(NRF_TIMER_Type * p_reg, + nrf_timer_frequency_t frequency); + +/** + * @brief Function for retrieving the timer frequency. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * + * @return Timer frequency. + */ +__STATIC_INLINE nrf_timer_frequency_t nrf_timer_frequency_get(NRF_TIMER_Type * p_reg); + +/** + * @brief Function for writing the capture/compare register for a specified channel. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] cc_channel Requested capture/compare channel. + * @param[in] cc_value Value to write to the capture/compare register. + */ +__STATIC_INLINE void nrf_timer_cc_write(NRF_TIMER_Type * p_reg, + nrf_timer_cc_channel_t cc_channel, + uint32_t cc_value); + +/** + * @brief Function for retrieving the capture/compare value for a specified channel. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] cc_channel Requested capture/compare channel. + * + * @return Value from the requested capture/compare register. + */ +__STATIC_INLINE uint32_t nrf_timer_cc_read(NRF_TIMER_Type * p_reg, + nrf_timer_cc_channel_t cc_channel); + +/** + * @brief Function for getting a specific timer capture task. + * + * @param[in] channel Capture channel. + * + * @return Capture task. + */ +__STATIC_INLINE nrf_timer_task_t nrf_timer_capture_task_get(uint32_t channel); + +/** + * @brief Function for getting a specific timer compare event. + * + * @param[in] channel Compare channel. + * + * @return Compare event. + */ +__STATIC_INLINE nrf_timer_event_t nrf_timer_compare_event_get(uint32_t channel); + +/** + * @brief Function for getting a specific timer compare interrupt. + * + * @param[in] channel Compare channel. + * + * @return Compare interrupt. + */ +__STATIC_INLINE nrf_timer_int_mask_t nrf_timer_compare_int_get(uint32_t channel); + +/** + * @brief Function for calculating the number of timer ticks for a given time + * (in microseconds) and timer frequency. + * + * @param[in] time_us Time in microseconds. + * @param[in] frequency Timer frequency. + * + * @return Number of timer ticks. + */ +__STATIC_INLINE uint32_t nrf_timer_us_to_ticks(uint32_t time_us, + nrf_timer_frequency_t frequency); + +/** + * @brief Function for calculating the number of timer ticks for a given time + * (in milliseconds) and timer frequency. + * + * @param[in] time_ms Time in milliseconds. + * @param[in] frequency Timer frequency. + * + * @return Number of timer ticks. + */ +__STATIC_INLINE uint32_t nrf_timer_ms_to_ticks(uint32_t time_ms, + nrf_timer_frequency_t frequency); + + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE void nrf_timer_task_trigger(NRF_TIMER_Type * p_reg, + nrf_timer_task_t task) +{ + *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL; +} + +__STATIC_INLINE uint32_t * nrf_timer_task_address_get(NRF_TIMER_Type * p_reg, + nrf_timer_task_t task) +{ + return (uint32_t *)((uint8_t *)p_reg + (uint32_t)task); +} + +__STATIC_INLINE void nrf_timer_event_clear(NRF_TIMER_Type * p_reg, + nrf_timer_event_t event) +{ + *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL; +#if __CORTEX_M == 0x04 + volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)); + (void)dummy; +#endif +} + +__STATIC_INLINE bool nrf_timer_event_check(NRF_TIMER_Type * p_reg, + nrf_timer_event_t event) +{ + return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event); +} + +__STATIC_INLINE uint32_t * nrf_timer_event_address_get(NRF_TIMER_Type * p_reg, + nrf_timer_event_t event) +{ + return (uint32_t *)((uint8_t *)p_reg + (uint32_t)event); +} + +__STATIC_INLINE void nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg, + uint32_t timer_shorts_mask) +{ + p_reg->SHORTS |= timer_shorts_mask; +} + +__STATIC_INLINE void nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg, + uint32_t timer_shorts_mask) +{ + p_reg->SHORTS &= ~(timer_shorts_mask); +} + +__STATIC_INLINE void nrf_timer_int_enable(NRF_TIMER_Type * p_reg, + uint32_t timer_int_mask) +{ + p_reg->INTENSET = timer_int_mask; +} + +__STATIC_INLINE void nrf_timer_int_disable(NRF_TIMER_Type * p_reg, + uint32_t timer_int_mask) +{ + p_reg->INTENCLR = timer_int_mask; +} + +__STATIC_INLINE bool nrf_timer_int_enable_check(NRF_TIMER_Type * p_reg, + uint32_t timer_int) +{ + return (bool)(p_reg->INTENSET & timer_int); +} + +__STATIC_INLINE void nrf_timer_mode_set(NRF_TIMER_Type * p_reg, + nrf_timer_mode_t mode) +{ + p_reg->MODE = (p_reg->MODE & ~TIMER_MODE_MODE_Msk) | + ((mode << TIMER_MODE_MODE_Pos) & TIMER_MODE_MODE_Msk); +} + +__STATIC_INLINE nrf_timer_mode_t nrf_timer_mode_get(NRF_TIMER_Type * p_reg) +{ + return (nrf_timer_mode_t)(p_reg->MODE); +} + +__STATIC_INLINE void nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg, + nrf_timer_bit_width_t bit_width) +{ + p_reg->BITMODE = (p_reg->BITMODE & ~TIMER_BITMODE_BITMODE_Msk) | + ((bit_width << TIMER_BITMODE_BITMODE_Pos) & + TIMER_BITMODE_BITMODE_Msk); +} + +__STATIC_INLINE nrf_timer_bit_width_t nrf_timer_bit_width_get(NRF_TIMER_Type * p_reg) +{ + return (nrf_timer_bit_width_t)(p_reg->BITMODE); +} + +__STATIC_INLINE void nrf_timer_frequency_set(NRF_TIMER_Type * p_reg, + nrf_timer_frequency_t frequency) +{ + p_reg->PRESCALER = (p_reg->PRESCALER & ~TIMER_PRESCALER_PRESCALER_Msk) | + ((frequency << TIMER_PRESCALER_PRESCALER_Pos) & + TIMER_PRESCALER_PRESCALER_Msk); +} + +__STATIC_INLINE nrf_timer_frequency_t nrf_timer_frequency_get(NRF_TIMER_Type * p_reg) +{ + return (nrf_timer_frequency_t)(p_reg->PRESCALER); +} + +__STATIC_INLINE void nrf_timer_cc_write(NRF_TIMER_Type * p_reg, + nrf_timer_cc_channel_t cc_channel, + uint32_t cc_value) +{ + p_reg->CC[cc_channel] = cc_value; +} + +__STATIC_INLINE uint32_t nrf_timer_cc_read(NRF_TIMER_Type * p_reg, + nrf_timer_cc_channel_t cc_channel) +{ + return (uint32_t)p_reg->CC[cc_channel]; +} + +__STATIC_INLINE nrf_timer_task_t nrf_timer_capture_task_get(uint32_t channel) +{ + return (nrf_timer_task_t) + ((uint32_t)NRF_TIMER_TASK_CAPTURE0 + (channel * sizeof(uint32_t))); +} + +__STATIC_INLINE nrf_timer_event_t nrf_timer_compare_event_get(uint32_t channel) +{ + return (nrf_timer_event_t) + ((uint32_t)NRF_TIMER_EVENT_COMPARE0 + (channel * sizeof(uint32_t))); +} + +__STATIC_INLINE nrf_timer_int_mask_t nrf_timer_compare_int_get(uint32_t channel) +{ + return (nrf_timer_int_mask_t) + ((uint32_t)NRF_TIMER_INT_COMPARE0_MASK << channel); +} + +__STATIC_INLINE uint32_t nrf_timer_us_to_ticks(uint32_t time_us, + nrf_timer_frequency_t frequency) +{ + // The "frequency" parameter here is actually the prescaler value, and the + // timer runs at the following frequency: f = 16 MHz / 2^prescaler. + uint32_t prescaler = (uint32_t)frequency; + NRFX_ASSERT(time_us <= (UINT32_MAX / 16UL)); + return ((time_us * 16UL) >> prescaler); +} + +__STATIC_INLINE uint32_t nrf_timer_ms_to_ticks(uint32_t time_ms, + nrf_timer_frequency_t frequency) +{ + // The "frequency" parameter here is actually the prescaler value, and the + // timer runs at the following frequency: f = 16000 kHz / 2^prescaler. + uint32_t prescaler = (uint32_t)frequency; + NRFX_ASSERT(time_ms <= (UINT32_MAX / 16000UL)); + return ((time_ms * 16000UL) >> prescaler); +} + +#endif // SUPPRESS_INLINE_IMPLEMENTATION + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_TIMER_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_twi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_twi.h new file mode 100644 index 00000000000..e17b7933cd4 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_twi.h @@ -0,0 +1,451 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_TWI_H__ +#define NRF_TWI_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_twi_hal TWI HAL + * @{ + * @ingroup nrf_twi + * @brief Hardware access layer for managing the TWI peripheral. + */ + +/** + * @brief TWI tasks. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_TWI_TASK_STARTRX = offsetof(NRF_TWI_Type, TASKS_STARTRX), ///< Start TWI receive sequence. + NRF_TWI_TASK_STARTTX = offsetof(NRF_TWI_Type, TASKS_STARTTX), ///< Start TWI transmit sequence. + NRF_TWI_TASK_STOP = offsetof(NRF_TWI_Type, TASKS_STOP), ///< Stop TWI transaction. + NRF_TWI_TASK_SUSPEND = offsetof(NRF_TWI_Type, TASKS_SUSPEND), ///< Suspend TWI transaction. + NRF_TWI_TASK_RESUME = offsetof(NRF_TWI_Type, TASKS_RESUME) ///< Resume TWI transaction. + /*lint -restore*/ +} nrf_twi_task_t; + +/** + * @brief TWI events. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_TWI_EVENT_STOPPED = offsetof(NRF_TWI_Type, EVENTS_STOPPED), ///< TWI stopped. + NRF_TWI_EVENT_RXDREADY = offsetof(NRF_TWI_Type, EVENTS_RXDREADY), ///< TWI RXD byte received. + NRF_TWI_EVENT_TXDSENT = offsetof(NRF_TWI_Type, EVENTS_TXDSENT), ///< TWI TXD byte sent. + NRF_TWI_EVENT_ERROR = offsetof(NRF_TWI_Type, EVENTS_ERROR), ///< TWI error. + NRF_TWI_EVENT_BB = offsetof(NRF_TWI_Type, EVENTS_BB), ///< TWI byte boundary, generated before each byte that is sent or received. + NRF_TWI_EVENT_SUSPENDED = offsetof(NRF_TWI_Type, EVENTS_SUSPENDED) ///< TWI entered the suspended state. + /*lint -restore*/ +} nrf_twi_event_t; + +/** + * @brief TWI shortcuts. + */ +typedef enum +{ + NRF_TWI_SHORT_BB_SUSPEND_MASK = TWI_SHORTS_BB_SUSPEND_Msk, ///< Shortcut between BB event and SUSPEND task. + NRF_TWI_SHORT_BB_STOP_MASK = TWI_SHORTS_BB_STOP_Msk, ///< Shortcut between BB event and STOP task. + NRF_TWI_ALL_SHORTS_MASK = TWI_SHORTS_BB_SUSPEND_Msk | + TWI_SHORTS_BB_STOP_Msk ///< All TWI shortcuts. +} nrf_twi_short_mask_t; + +/** + * @brief TWI interrupts. + */ +typedef enum +{ + NRF_TWI_INT_STOPPED_MASK = TWI_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event. + NRF_TWI_INT_RXDREADY_MASK = TWI_INTENSET_RXDREADY_Msk, ///< Interrupt on RXDREADY event. + NRF_TWI_INT_TXDSENT_MASK = TWI_INTENSET_TXDSENT_Msk, ///< Interrupt on TXDSENT event. + NRF_TWI_INT_ERROR_MASK = TWI_INTENSET_ERROR_Msk, ///< Interrupt on ERROR event. + NRF_TWI_INT_BB_MASK = TWI_INTENSET_BB_Msk, ///< Interrupt on BB event. + NRF_TWI_INT_SUSPENDED_MASK = TWI_INTENSET_SUSPENDED_Msk, ///< Interrupt on SUSPENDED event. + NRF_TWI_ALL_INTS_MASK = TWI_INTENSET_STOPPED_Msk | + TWI_INTENSET_RXDREADY_Msk | + TWI_INTENSET_TXDSENT_Msk | + TWI_INTENSET_ERROR_Msk | + TWI_INTENSET_BB_Msk | + TWI_INTENSET_SUSPENDED_Msk ///< All TWI interrupts. +} nrf_twi_int_mask_t; + +/** + * @brief TWI error source. + */ +typedef enum +{ + NRF_TWI_ERROR_ADDRESS_NACK = TWI_ERRORSRC_ANACK_Msk, ///< NACK received after sending the address. + NRF_TWI_ERROR_DATA_NACK = TWI_ERRORSRC_DNACK_Msk, ///< NACK received after sending a data byte. + NRF_TWI_ERROR_OVERRUN = TWI_ERRORSRC_OVERRUN_Msk ///< Overrun error. + /**< A new byte was received before the previous byte was read + * from the RXD register (previous data is lost). */ +} nrf_twi_error_t; + +/** + * @brief TWI master clock frequency. + */ +typedef enum +{ + NRF_TWI_FREQ_100K = TWI_FREQUENCY_FREQUENCY_K100, ///< 100 kbps. + NRF_TWI_FREQ_250K = TWI_FREQUENCY_FREQUENCY_K250, ///< 250 kbps. + NRF_TWI_FREQ_400K = TWI_FREQUENCY_FREQUENCY_K400 ///< 400 kbps. +} nrf_twi_frequency_t; + + +/** + * @brief Function for activating a specific TWI task. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] task Task to activate. + */ +__STATIC_INLINE void nrf_twi_task_trigger(NRF_TWI_Type * p_reg, + nrf_twi_task_t task); + +/** + * @brief Function for getting the address of a specific TWI task register. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] task Requested task. + * + * @return Address of the specified task register. + */ +__STATIC_INLINE uint32_t * nrf_twi_task_address_get(NRF_TWI_Type * p_reg, + nrf_twi_task_t task); + +/** + * @brief Function for clearing a specific TWI event. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] event Event to clear. + */ +__STATIC_INLINE void nrf_twi_event_clear(NRF_TWI_Type * p_reg, + nrf_twi_event_t event); + +/** + * @brief Function for checking the state of a specific event. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] event Event to check. + * + * @retval true If the event is set. + * @retval false If the event is not set. + */ +__STATIC_INLINE bool nrf_twi_event_check(NRF_TWI_Type * p_reg, + nrf_twi_event_t event); + +/** + * @brief Function for getting the address of a specific TWI event register. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] event Requested event. + * + * @return Address of the specified event register. + */ +__STATIC_INLINE uint32_t * nrf_twi_event_address_get(NRF_TWI_Type * p_reg, + nrf_twi_event_t event); + +/** + * @brief Function for enabling specified shortcuts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] shorts_mask Shortcuts to enable. + */ +__STATIC_INLINE void nrf_twi_shorts_enable(NRF_TWI_Type * p_reg, + uint32_t shorts_mask); + +/** + * @brief Function for disabling specified shortcuts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] shorts_mask Shortcuts to disable. + */ +__STATIC_INLINE void nrf_twi_shorts_disable(NRF_TWI_Type * p_reg, + uint32_t shorts_mask); + +/** + * @brief Function for enabling specified interrupts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] int_mask Interrupts to enable. + */ +__STATIC_INLINE void nrf_twi_int_enable(NRF_TWI_Type * p_reg, + uint32_t int_mask); + +/** + * @brief Function for disabling specified interrupts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] int_mask Interrupts to disable. + */ +__STATIC_INLINE void nrf_twi_int_disable(NRF_TWI_Type * p_reg, + uint32_t int_mask); + +/** + * @brief Function for retrieving the state of a given interrupt. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] int_mask Interrupt to check. + * + * @retval true If the interrupt is enabled. + * @retval false If the interrupt is not enabled. + */ +__STATIC_INLINE bool nrf_twi_int_enable_check(NRF_TWI_Type * p_reg, + nrf_twi_int_mask_t int_mask); + +/** + * @brief Function for enabling the TWI peripheral. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_twi_enable(NRF_TWI_Type * p_reg); + +/** + * @brief Function for disabling the TWI peripheral. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_twi_disable(NRF_TWI_Type * p_reg); + +/** + * @brief Function for configuring TWI pins. + * + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] scl_pin SCL pin number. + * @param[in] sda_pin SDA pin number. + */ +__STATIC_INLINE void nrf_twi_pins_set(NRF_TWI_Type * p_reg, + uint32_t scl_pin, + uint32_t sda_pin); + +/** + * @brief Function for setting the TWI master clock frequency. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] frequency TWI frequency. + */ +__STATIC_INLINE void nrf_twi_frequency_set(NRF_TWI_Type * p_reg, + nrf_twi_frequency_t frequency); + +/** + * @brief Function for checking the TWI error source. + * + * The error flags are cleared after reading. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * + * @return Mask with error source flags. + */ +__STATIC_INLINE uint32_t nrf_twi_errorsrc_get_and_clear(NRF_TWI_Type * p_reg); + +/** + * @brief Function for setting the address to be used in TWI transfers. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] address Address to be used in transfers. + */ +__STATIC_INLINE void nrf_twi_address_set(NRF_TWI_Type * p_reg, uint8_t address); + +/** + * @brief Function for reading data received by TWI. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * + * @return Received data. + */ +__STATIC_INLINE uint8_t nrf_twi_rxd_get(NRF_TWI_Type * p_reg); + +/** + * @brief Function for writing data to be transmitted by TWI. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] data Data to be transmitted. + */ +__STATIC_INLINE void nrf_twi_txd_set(NRF_TWI_Type * p_reg, uint8_t data); + +__STATIC_INLINE void nrf_twi_shorts_set(NRF_TWI_Type * p_reg, + uint32_t shorts_mask); + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE void nrf_twi_task_trigger(NRF_TWI_Type * p_reg, + nrf_twi_task_t task) +{ + *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL; +} + +__STATIC_INLINE uint32_t * nrf_twi_task_address_get(NRF_TWI_Type * p_reg, + nrf_twi_task_t task) +{ + return (uint32_t *)((uint8_t *)p_reg + (uint32_t)task); +} + +__STATIC_INLINE void nrf_twi_event_clear(NRF_TWI_Type * p_reg, + nrf_twi_event_t event) +{ + *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL; +#if __CORTEX_M == 0x04 + volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)); + (void)dummy; +#endif +} + +__STATIC_INLINE bool nrf_twi_event_check(NRF_TWI_Type * p_reg, + nrf_twi_event_t event) +{ + return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event); +} + +__STATIC_INLINE uint32_t * nrf_twi_event_address_get(NRF_TWI_Type * p_reg, + nrf_twi_event_t event) +{ + return (uint32_t *)((uint8_t *)p_reg + (uint32_t)event); +} + +__STATIC_INLINE void nrf_twi_shorts_enable(NRF_TWI_Type * p_reg, + uint32_t shorts_mask) +{ + p_reg->SHORTS |= shorts_mask; +} + +__STATIC_INLINE void nrf_twi_shorts_disable(NRF_TWI_Type * p_reg, + uint32_t shorts_mask) +{ + p_reg->SHORTS &= ~(shorts_mask); +} + +__STATIC_INLINE void nrf_twi_int_enable(NRF_TWI_Type * p_reg, + uint32_t int_mask) +{ + p_reg->INTENSET = int_mask; +} + +__STATIC_INLINE void nrf_twi_int_disable(NRF_TWI_Type * p_reg, + uint32_t int_mask) +{ + p_reg->INTENCLR = int_mask; +} + +__STATIC_INLINE bool nrf_twi_int_enable_check(NRF_TWI_Type * p_reg, + nrf_twi_int_mask_t int_mask) +{ + return (bool)(p_reg->INTENSET & int_mask); +} + +__STATIC_INLINE void nrf_twi_enable(NRF_TWI_Type * p_reg) +{ + p_reg->ENABLE = (TWI_ENABLE_ENABLE_Enabled << TWI_ENABLE_ENABLE_Pos); +} + +__STATIC_INLINE void nrf_twi_disable(NRF_TWI_Type * p_reg) +{ + p_reg->ENABLE = (TWI_ENABLE_ENABLE_Disabled << TWI_ENABLE_ENABLE_Pos); +} + +__STATIC_INLINE void nrf_twi_pins_set(NRF_TWI_Type * p_reg, + uint32_t scl_pin, + uint32_t sda_pin) +{ +#if defined(TWI_PSEL_SCL_CONNECT_Pos) + p_reg->PSEL.SCL = scl_pin; +#else + p_reg->PSELSCL = scl_pin; +#endif + +#if defined(TWI_PSEL_SDA_CONNECT_Pos) + p_reg->PSEL.SDA = sda_pin; +#else + p_reg->PSELSDA = sda_pin; +#endif +} + +__STATIC_INLINE void nrf_twi_frequency_set(NRF_TWI_Type * p_reg, + nrf_twi_frequency_t frequency) +{ + p_reg->FREQUENCY = frequency; +} + +__STATIC_INLINE uint32_t nrf_twi_errorsrc_get_and_clear(NRF_TWI_Type * p_reg) +{ + uint32_t error_source = p_reg->ERRORSRC; + + // [error flags are cleared by writing '1' on their position] + p_reg->ERRORSRC = error_source; + + return error_source; +} + +__STATIC_INLINE void nrf_twi_address_set(NRF_TWI_Type * p_reg, uint8_t address) +{ + p_reg->ADDRESS = address; +} + +__STATIC_INLINE uint8_t nrf_twi_rxd_get(NRF_TWI_Type * p_reg) +{ + return (uint8_t)p_reg->RXD; +} + +__STATIC_INLINE void nrf_twi_txd_set(NRF_TWI_Type * p_reg, uint8_t data) +{ + p_reg->TXD = data; +} + +__STATIC_INLINE void nrf_twi_shorts_set(NRF_TWI_Type * p_reg, + uint32_t shorts_mask) +{ + p_reg->SHORTS = shorts_mask; +} + +#endif // SUPPRESS_INLINE_IMPLEMENTATION + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_TWI_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_twim.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_twim.h new file mode 100644 index 00000000000..a5a8e37a827 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_twim.h @@ -0,0 +1,522 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_TWIM_H__ +#define NRF_TWIM_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_twim_hal TWIM HAL + * @{ + * @ingroup nrf_twim + * @brief Hardware access layer for managing the TWIM peripheral. + */ + +/** + * @brief TWIM tasks. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_TWIM_TASK_STARTRX = offsetof(NRF_TWIM_Type, TASKS_STARTRX), ///< Start TWI receive sequence. + NRF_TWIM_TASK_STARTTX = offsetof(NRF_TWIM_Type, TASKS_STARTTX), ///< Start TWI transmit sequence. + NRF_TWIM_TASK_STOP = offsetof(NRF_TWIM_Type, TASKS_STOP), ///< Stop TWI transaction. + NRF_TWIM_TASK_SUSPEND = offsetof(NRF_TWIM_Type, TASKS_SUSPEND), ///< Suspend TWI transaction. + NRF_TWIM_TASK_RESUME = offsetof(NRF_TWIM_Type, TASKS_RESUME) ///< Resume TWI transaction. + /*lint -restore*/ +} nrf_twim_task_t; + +/** + * @brief TWIM events. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_TWIM_EVENT_STOPPED = offsetof(NRF_TWIM_Type, EVENTS_STOPPED), ///< TWI stopped. + NRF_TWIM_EVENT_ERROR = offsetof(NRF_TWIM_Type, EVENTS_ERROR), ///< TWI error. + NRF_TWIM_EVENT_SUSPENDED = 0x148, ///< TWI suspended. + NRF_TWIM_EVENT_RXSTARTED = offsetof(NRF_TWIM_Type, EVENTS_RXSTARTED), ///< Receive sequence started. + NRF_TWIM_EVENT_TXSTARTED = offsetof(NRF_TWIM_Type, EVENTS_TXSTARTED), ///< Transmit sequence started. + NRF_TWIM_EVENT_LASTRX = offsetof(NRF_TWIM_Type, EVENTS_LASTRX), ///< Byte boundary, starting to receive the last byte. + NRF_TWIM_EVENT_LASTTX = offsetof(NRF_TWIM_Type, EVENTS_LASTTX) ///< Byte boundary, starting to transmit the last byte. + /*lint -restore*/ +} nrf_twim_event_t; + +/** + * @brief TWIM shortcuts. + */ +typedef enum +{ + NRF_TWIM_SHORT_LASTTX_STARTRX_MASK = TWIM_SHORTS_LASTTX_STARTRX_Msk, ///< Shortcut between LASTTX event and STARTRX task. + NRF_TWIM_SHORT_LASTTX_SUSPEND_MASK = TWIM_SHORTS_LASTTX_SUSPEND_Msk, ///< Shortcut between LASTTX event and SUSPEND task. + NRF_TWIM_SHORT_LASTTX_STOP_MASK = TWIM_SHORTS_LASTTX_STOP_Msk, ///< Shortcut between LASTTX event and STOP task. + NRF_TWIM_SHORT_LASTRX_STARTTX_MASK = TWIM_SHORTS_LASTRX_STARTTX_Msk, ///< Shortcut between LASTRX event and STARTTX task. + NRF_TWIM_SHORT_LASTRX_STOP_MASK = TWIM_SHORTS_LASTRX_STOP_Msk, ///< Shortcut between LASTRX event and STOP task. + NRF_TWIM_ALL_SHORTS_MASK = TWIM_SHORTS_LASTTX_STARTRX_Msk | + TWIM_SHORTS_LASTTX_SUSPEND_Msk | + TWIM_SHORTS_LASTTX_STOP_Msk | + TWIM_SHORTS_LASTRX_STARTTX_Msk | + TWIM_SHORTS_LASTRX_STOP_Msk ///< All TWIM shortcuts. +} nrf_twim_short_mask_t; + +/** + * @brief TWIM interrupts. + */ +typedef enum +{ + NRF_TWIM_INT_STOPPED_MASK = TWIM_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event. + NRF_TWIM_INT_ERROR_MASK = TWIM_INTENSET_ERROR_Msk, ///< Interrupt on ERROR event. + NRF_TWIM_INT_SUSPENDED_MASK = TWIM_INTENSET_SUSPENDED_Msk, ///< Interrupt on SUSPENDED event. + NRF_TWIM_INT_RXSTARTED_MASK = TWIM_INTENSET_RXSTARTED_Msk, ///< Interrupt on RXSTARTED event. + NRF_TWIM_INT_TXSTARTED_MASK = TWIM_INTENSET_TXSTARTED_Msk, ///< Interrupt on TXSTARTED event. + NRF_TWIM_INT_LASTRX_MASK = TWIM_INTENSET_LASTRX_Msk, ///< Interrupt on LASTRX event. + NRF_TWIM_INT_LASTTX_MASK = TWIM_INTENSET_LASTTX_Msk, ///< Interrupt on LASTTX event. + NRF_TWIM_ALL_INTS_MASK = TWIM_INTENSET_STOPPED_Msk | + TWIM_INTENSET_ERROR_Msk | + TWIM_INTENSET_SUSPENDED_Msk | + TWIM_INTENSET_RXSTARTED_Msk | + TWIM_INTENSET_TXSTARTED_Msk | + TWIM_INTENSET_LASTRX_Msk | + TWIM_INTENSET_LASTTX_Msk ///< Interrupt on LASTTX event. +} nrf_twim_int_mask_t; + +/** + * @brief TWIM master clock frequency. + */ +typedef enum +{ + NRF_TWIM_FREQ_100K = TWIM_FREQUENCY_FREQUENCY_K100, ///< 100 kbps. + NRF_TWIM_FREQ_250K = TWIM_FREQUENCY_FREQUENCY_K250, ///< 250 kbps. + NRF_TWIM_FREQ_400K = TWIM_FREQUENCY_FREQUENCY_K400 ///< 400 kbps. +} nrf_twim_frequency_t; + +/** + * @brief TWIM error source. + */ +typedef enum +{ + NRF_TWIM_ERROR_ADDRESS_NACK = TWIM_ERRORSRC_ANACK_Msk, ///< NACK received after sending the address. + NRF_TWIM_ERROR_DATA_NACK = TWIM_ERRORSRC_DNACK_Msk ///< NACK received after sending a data byte. +} nrf_twim_error_t; + + +/** + * @brief Function for activating a specific TWIM task. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] task Task to activate. + */ +__STATIC_INLINE void nrf_twim_task_trigger(NRF_TWIM_Type * p_reg, + nrf_twim_task_t task); + +/** + * @brief Function for getting the address of a specific TWIM task register. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] task Requested task. + * + * @return Address of the specified task register. + */ +__STATIC_INLINE uint32_t * nrf_twim_task_address_get(NRF_TWIM_Type * p_reg, + nrf_twim_task_t task); + +/** + * @brief Function for clearing a specific TWIM event. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] event Event to clear. + */ +__STATIC_INLINE void nrf_twim_event_clear(NRF_TWIM_Type * p_reg, + nrf_twim_event_t event); + +/** + * @brief Function for checking the state of a specific TWIM event. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] event Event to check. + * + * @retval true If the event is set. + * @retval false If the event is not set. + */ +__STATIC_INLINE bool nrf_twim_event_check(NRF_TWIM_Type * p_reg, + nrf_twim_event_t event); + +/** + * @brief Function for getting the address of a specific TWIM event register. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] event Requested event. + * + * @return Address of the specified event register. + */ +__STATIC_INLINE uint32_t * nrf_twim_event_address_get(NRF_TWIM_Type * p_reg, + nrf_twim_event_t event); + +/** + * @brief Function for enabling specified shortcuts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] shorts_mask Shortcuts to enable. + */ +__STATIC_INLINE void nrf_twim_shorts_enable(NRF_TWIM_Type * p_reg, + uint32_t shorts_mask); + +/** + * @brief Function for disabling specified shortcuts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] shorts_mask Shortcuts to disable. + */ +__STATIC_INLINE void nrf_twim_shorts_disable(NRF_TWIM_Type * p_reg, + uint32_t shorts_mask); + +/** + * @brief Function for enabling specified interrupts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] int_mask Interrupts to enable. + */ +__STATIC_INLINE void nrf_twim_int_enable(NRF_TWIM_Type * p_reg, + uint32_t int_mask); + +/** + * @brief Function for disabling specified interrupts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] int_mask Interrupts to disable. + */ +__STATIC_INLINE void nrf_twim_int_disable(NRF_TWIM_Type * p_reg, + uint32_t int_mask); + +/** + * @brief Function for checking the state of a given interrupt. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] int_mask Interrupt to check. + * + * @retval true If the interrupt is enabled. + * @retval false If the interrupt is not enabled. + */ +__STATIC_INLINE bool nrf_twim_int_enable_check(NRF_TWIM_Type * p_reg, + nrf_twim_int_mask_t int_mask); + +/** + * @brief Function for enabling the TWIM peripheral. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_twim_enable(NRF_TWIM_Type * p_reg); + +/** + * @brief Function for disabling the TWIM peripheral. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_twim_disable(NRF_TWIM_Type * p_reg); + +/** + * @brief Function for configuring TWI pins. + * + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] scl_pin SCL pin number. + * @param[in] sda_pin SDA pin number. + */ +__STATIC_INLINE void nrf_twim_pins_set(NRF_TWIM_Type * p_reg, + uint32_t scl_pin, + uint32_t sda_pin); + +/** + * @brief Function for setting the TWI master clock frequency. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] frequency TWI frequency. + */ +__STATIC_INLINE void nrf_twim_frequency_set(NRF_TWIM_Type * p_reg, + nrf_twim_frequency_t frequency); + +/** + * @brief Function for checking the TWI error source. + * + * The error flags are cleared after reading. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * + * @return Mask with error source flags. + */ +__STATIC_INLINE uint32_t nrf_twim_errorsrc_get_and_clear(NRF_TWIM_Type * p_reg); + +/** + * @brief Function for setting the address to be used in TWI transfers. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] address Address to be used in transfers. + */ +__STATIC_INLINE void nrf_twim_address_set(NRF_TWIM_Type * p_reg, + uint8_t address); + +/** + * @brief Function for setting the transmit buffer. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] p_buffer Pointer to the buffer with data to send. + * @param[in] length Maximum number of data bytes to transmit. + */ +__STATIC_INLINE void nrf_twim_tx_buffer_set(NRF_TWIM_Type * p_reg, + uint8_t const * p_buffer, + size_t length); + +/** + * @brief Function for setting the receive buffer. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] p_buffer Pointer to the buffer for received data. + * @param[in] length Maximum number of data bytes to receive. + */ +__STATIC_INLINE void nrf_twim_rx_buffer_set(NRF_TWIM_Type * p_reg, + uint8_t * p_buffer, + size_t length); + +__STATIC_INLINE void nrf_twim_shorts_set(NRF_TWIM_Type * p_reg, + uint32_t shorts_mask); + +__STATIC_INLINE size_t nrf_twim_txd_amount_get(NRF_TWIM_Type * p_reg); + +__STATIC_INLINE size_t nrf_twim_rxd_amount_get(NRF_TWIM_Type * p_reg); + +/** + * @brief Function for enabling the TX list feature. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_twim_tx_list_enable(NRF_TWIM_Type * p_reg); + +/** + * @brief Function for disabling the TX list feature. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_twim_tx_list_disable(NRF_TWIM_Type * p_reg); + +/** + * @brief Function for enabling the RX list feature. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_twim_rx_list_enable(NRF_TWIM_Type * p_reg); + +/** + * @brief Function for disabling the RX list feature. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_twim_rx_list_disable(NRF_TWIM_Type * p_reg); + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE void nrf_twim_task_trigger(NRF_TWIM_Type * p_reg, + nrf_twim_task_t task) +{ + *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL; +} + +__STATIC_INLINE uint32_t * nrf_twim_task_address_get(NRF_TWIM_Type * p_reg, + nrf_twim_task_t task) +{ + return (uint32_t *)((uint8_t *)p_reg + (uint32_t)task); +} + +__STATIC_INLINE void nrf_twim_event_clear(NRF_TWIM_Type * p_reg, + nrf_twim_event_t event) +{ + *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL; +#if __CORTEX_M == 0x04 + volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)); + (void)dummy; +#endif +} + +__STATIC_INLINE bool nrf_twim_event_check(NRF_TWIM_Type * p_reg, + nrf_twim_event_t event) +{ + return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event); +} + +__STATIC_INLINE uint32_t * nrf_twim_event_address_get(NRF_TWIM_Type * p_reg, + nrf_twim_event_t event) +{ + return (uint32_t *)((uint8_t *)p_reg + (uint32_t)event); +} + +__STATIC_INLINE void nrf_twim_shorts_enable(NRF_TWIM_Type * p_reg, + uint32_t shorts_mask) +{ + p_reg->SHORTS |= shorts_mask; +} + +__STATIC_INLINE void nrf_twim_shorts_disable(NRF_TWIM_Type * p_reg, + uint32_t shorts_mask) +{ + p_reg->SHORTS &= ~(shorts_mask); +} + +__STATIC_INLINE void nrf_twim_int_enable(NRF_TWIM_Type * p_reg, + uint32_t int_mask) +{ + p_reg->INTENSET = int_mask; +} + +__STATIC_INLINE void nrf_twim_int_disable(NRF_TWIM_Type * p_reg, + uint32_t int_mask) +{ + p_reg->INTENCLR = int_mask; +} + +__STATIC_INLINE bool nrf_twim_int_enable_check(NRF_TWIM_Type * p_reg, + nrf_twim_int_mask_t int_mask) +{ + return (bool)(p_reg->INTENSET & int_mask); +} + +__STATIC_INLINE void nrf_twim_enable(NRF_TWIM_Type * p_reg) +{ + p_reg->ENABLE = (TWIM_ENABLE_ENABLE_Enabled << TWIM_ENABLE_ENABLE_Pos); +} + +__STATIC_INLINE void nrf_twim_disable(NRF_TWIM_Type * p_reg) +{ + p_reg->ENABLE = (TWIM_ENABLE_ENABLE_Disabled << TWIM_ENABLE_ENABLE_Pos); +} + +__STATIC_INLINE void nrf_twim_pins_set(NRF_TWIM_Type * p_reg, + uint32_t scl_pin, + uint32_t sda_pin) +{ + p_reg->PSEL.SCL = scl_pin; + p_reg->PSEL.SDA = sda_pin; +} + +__STATIC_INLINE void nrf_twim_frequency_set(NRF_TWIM_Type * p_reg, + nrf_twim_frequency_t frequency) +{ + p_reg->FREQUENCY = frequency; +} + +__STATIC_INLINE uint32_t nrf_twim_errorsrc_get_and_clear(NRF_TWIM_Type * p_reg) +{ + uint32_t error_source = p_reg->ERRORSRC; + + // [error flags are cleared by writing '1' on their position] + p_reg->ERRORSRC = error_source; + + return error_source; +} + +__STATIC_INLINE void nrf_twim_address_set(NRF_TWIM_Type * p_reg, + uint8_t address) +{ + p_reg->ADDRESS = address; +} + +__STATIC_INLINE void nrf_twim_tx_buffer_set(NRF_TWIM_Type * p_reg, + uint8_t const * p_buffer, + size_t length) +{ + p_reg->TXD.PTR = (uint32_t)p_buffer; + p_reg->TXD.MAXCNT = length; +} + +__STATIC_INLINE void nrf_twim_rx_buffer_set(NRF_TWIM_Type * p_reg, + uint8_t * p_buffer, + size_t length) +{ + p_reg->RXD.PTR = (uint32_t)p_buffer; + p_reg->RXD.MAXCNT = length; +} + +__STATIC_INLINE void nrf_twim_shorts_set(NRF_TWIM_Type * p_reg, + uint32_t shorts_mask) +{ + p_reg->SHORTS = shorts_mask; +} + +__STATIC_INLINE size_t nrf_twim_txd_amount_get(NRF_TWIM_Type * p_reg) +{ + return p_reg->TXD.AMOUNT; +} + +__STATIC_INLINE size_t nrf_twim_rxd_amount_get(NRF_TWIM_Type * p_reg) +{ + return p_reg->RXD.AMOUNT; +} + +__STATIC_INLINE void nrf_twim_tx_list_enable(NRF_TWIM_Type * p_reg) +{ + p_reg->TXD.LIST = 1; +} + +__STATIC_INLINE void nrf_twim_tx_list_disable(NRF_TWIM_Type * p_reg) +{ + p_reg->TXD.LIST = 0; +} + +__STATIC_INLINE void nrf_twim_rx_list_enable(NRF_TWIM_Type * p_reg) +{ + p_reg->RXD.LIST = 1; +} + +__STATIC_INLINE void nrf_twim_rx_list_disable(NRF_TWIM_Type * p_reg) +{ + p_reg->RXD.LIST = 0; +} +#endif // SUPPRESS_INLINE_IMPLEMENTATION + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_TWIM_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_twis.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_twis.h new file mode 100644 index 00000000000..30d50182987 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_twis.h @@ -0,0 +1,702 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_TWIS_H__ +#define NRF_TWIS_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_twis_hal TWIS HAL + * @{ + * @ingroup nrf_twis + * @brief Hardware access layer for managing the Two Wire Interface Slave with EasyDMA + * (TWIS) peripheral. + */ + +/** + * @brief TWIS tasks + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_TWIS_TASK_STOP = offsetof(NRF_TWIS_Type, TASKS_STOP), /**< Stop TWIS transaction */ + NRF_TWIS_TASK_SUSPEND = offsetof(NRF_TWIS_Type, TASKS_SUSPEND), /**< Suspend TWIS transaction */ + NRF_TWIS_TASK_RESUME = offsetof(NRF_TWIS_Type, TASKS_RESUME), /**< Resume TWIS transaction */ + NRF_TWIS_TASK_PREPARERX = offsetof(NRF_TWIS_Type, TASKS_PREPARERX), /**< Prepare the TWIS slave to respond to a write command */ + NRF_TWIS_TASK_PREPARETX = offsetof(NRF_TWIS_Type, TASKS_PREPARETX) /**< Prepare the TWIS slave to respond to a read command */ + /*lint -restore*/ +} nrf_twis_task_t; + +/** + * @brief TWIS events + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_TWIS_EVENT_STOPPED = offsetof(NRF_TWIS_Type, EVENTS_STOPPED), /**< TWIS stopped */ + NRF_TWIS_EVENT_ERROR = offsetof(NRF_TWIS_Type, EVENTS_ERROR), /**< TWIS error */ + NRF_TWIS_EVENT_RXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_RXSTARTED), /**< Receive sequence started */ + NRF_TWIS_EVENT_TXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_TXSTARTED), /**< Transmit sequence started */ + NRF_TWIS_EVENT_WRITE = offsetof(NRF_TWIS_Type, EVENTS_WRITE), /**< Write command received */ + NRF_TWIS_EVENT_READ = offsetof(NRF_TWIS_Type, EVENTS_READ) /**< Read command received */ + /*lint -restore*/ +} nrf_twis_event_t; + +/** + * @brief TWIS shortcuts + */ +typedef enum +{ + NRF_TWIS_SHORT_WRITE_SUSPEND_MASK = TWIS_SHORTS_WRITE_SUSPEND_Msk, /**< Shortcut between WRITE event and SUSPEND task */ + NRF_TWIS_SHORT_READ_SUSPEND_MASK = TWIS_SHORTS_READ_SUSPEND_Msk, /**< Shortcut between READ event and SUSPEND task */ +} nrf_twis_short_mask_t; + +/** + * @brief TWIS interrupts + */ +typedef enum +{ + NRF_TWIS_INT_STOPPED_MASK = TWIS_INTEN_STOPPED_Msk, /**< Interrupt on STOPPED event */ + NRF_TWIS_INT_ERROR_MASK = TWIS_INTEN_ERROR_Msk, /**< Interrupt on ERROR event */ + NRF_TWIS_INT_RXSTARTED_MASK = TWIS_INTEN_RXSTARTED_Msk, /**< Interrupt on RXSTARTED event */ + NRF_TWIS_INT_TXSTARTED_MASK = TWIS_INTEN_TXSTARTED_Msk, /**< Interrupt on TXSTARTED event */ + NRF_TWIS_INT_WRITE_MASK = TWIS_INTEN_WRITE_Msk, /**< Interrupt on WRITE event */ + NRF_TWIS_INT_READ_MASK = TWIS_INTEN_READ_Msk, /**< Interrupt on READ event */ +} nrf_twis_int_mask_t; + +/** + * @brief TWIS error source + */ +typedef enum +{ + NRF_TWIS_ERROR_OVERFLOW = TWIS_ERRORSRC_OVERFLOW_Msk, /**< RX buffer overflow detected, and prevented */ + NRF_TWIS_ERROR_DATA_NACK = TWIS_ERRORSRC_DNACK_Msk, /**< NACK sent after receiving a data byte */ + NRF_TWIS_ERROR_OVERREAD = TWIS_ERRORSRC_OVERREAD_Msk /**< TX buffer over-read detected, and prevented */ +} nrf_twis_error_t; + +/** + * @brief TWIS address matching configuration + */ +typedef enum +{ + NRF_TWIS_CONFIG_ADDRESS0_MASK = TWIS_CONFIG_ADDRESS0_Msk, /**< Enable or disable address matching on ADDRESS[0] */ + NRF_TWIS_CONFIG_ADDRESS1_MASK = TWIS_CONFIG_ADDRESS1_Msk, /**< Enable or disable address matching on ADDRESS[1] */ + NRF_TWIS_CONFIG_ADDRESS01_MASK = TWIS_CONFIG_ADDRESS0_Msk | TWIS_CONFIG_ADDRESS1_Msk /**< Enable both address matching */ +} nrf_twis_config_addr_mask_t; + +/** + * @brief Variable type to hold amount of data for EasyDMA + * + * Variable of the minimum size that can hold the amount of data to transfer. + * + * @note + * Defined to make it simple to change if EasyDMA would be updated to support more data in + * the future devices to. + */ +typedef uint8_t nrf_twis_amount_t; + +/** + * @brief Smallest variable type to hold TWI address + * + * Variable of the minimum size that can hold single TWI address. + * + * @note + * Defined to make it simple to change if new TWI would support for example + * 10 bit addressing mode. + */ +typedef uint8_t nrf_twis_address_t; + + +/** + * @brief Function for activating a specific TWIS task. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param task Task. + */ +__STATIC_INLINE void nrf_twis_task_trigger(NRF_TWIS_Type * const p_reg, nrf_twis_task_t task); + +/** + * @brief Function for returning the address of a specific TWIS task register. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param task Task. + * + * @return Task address. + */ +__STATIC_INLINE uint32_t nrf_twis_task_address_get( + NRF_TWIS_Type const * const p_reg, + nrf_twis_task_t task); + +/** + * @brief Function for clearing a specific event. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param event Event. + */ +__STATIC_INLINE void nrf_twis_event_clear( + NRF_TWIS_Type * const p_reg, + nrf_twis_event_t event); +/** + * @brief Function for returning the state of a specific event. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param event Event. + * + * @retval true If the event is set. + * @retval false If the event is not set. + */ +__STATIC_INLINE bool nrf_twis_event_check( + NRF_TWIS_Type const * const p_reg, + nrf_twis_event_t event); + + +/** + * @brief Function for getting and clearing the state of specific event + * + * This function checks the state of the event and clears it. + * @param[in,out] p_reg Pointer to the peripheral registers structure. + * @param event Event. + * + * @retval true If the event was set. + * @retval false If the event was not set. + */ +__STATIC_INLINE bool nrf_twis_event_get_and_clear( + NRF_TWIS_Type * const p_reg, + nrf_twis_event_t event); + + +/** + * @brief Function for returning the address of a specific TWIS event register. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param event Event. + * + * @return Address. + */ +__STATIC_INLINE uint32_t nrf_twis_event_address_get( + NRF_TWIS_Type const * const p_reg, + nrf_twis_event_t event); + +/** + * @brief Function for setting a shortcut. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param short_mask Shortcuts mask. + */ +__STATIC_INLINE void nrf_twis_shorts_enable(NRF_TWIS_Type * const p_reg, uint32_t short_mask); + +/** + * @brief Function for clearing shortcuts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param short_mask Shortcuts mask. + */ +__STATIC_INLINE void nrf_twis_shorts_disable(NRF_TWIS_Type * const p_reg, uint32_t short_mask); + +/** + * @brief Get the shorts mask + * + * Function returns shorts register. + * @param[in] p_reg Pointer to the peripheral registers structure. + * @return Flags of currently enabled shortcuts + */ +__STATIC_INLINE uint32_t nrf_twis_shorts_get(NRF_TWIS_Type * const p_reg); + +/** + * @brief Function for enabling selected interrupts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param int_mask Interrupts mask. + */ +__STATIC_INLINE void nrf_twis_int_enable(NRF_TWIS_Type * const p_reg, uint32_t int_mask); + +/** + * @brief Function for retrieving the state of selected interrupts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param int_mask Interrupts mask. + * + * @retval true If any of selected interrupts is enabled. + * @retval false If none of selected interrupts is enabled. + */ +__STATIC_INLINE bool nrf_twis_int_enable_check(NRF_TWIS_Type const * const p_reg, uint32_t int_mask); + +/** + * @brief Function for disabling selected interrupts. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param int_mask Interrupts mask. + */ +__STATIC_INLINE void nrf_twis_int_disable(NRF_TWIS_Type * const p_reg, uint32_t int_mask); + +/** + * @brief Function for retrieving and clearing the TWIS error source. + * + * @attention Error sources are cleared after read. + * @param[in] p_reg Pointer to the peripheral registers structure. + * @return Error source mask with values from @ref nrf_twis_error_t. + */ +__STATIC_INLINE uint32_t nrf_twis_error_source_get_and_clear(NRF_TWIS_Type * const p_reg); + +/** + * @brief Get information which of addresses matched + * + * Function returns index in the address table + * that points to the address that already matched. + * @param[in] p_reg Pointer to the peripheral registers structure. + * @return Index of matched address + */ +__STATIC_INLINE uint_fast8_t nrf_twis_match_get(NRF_TWIS_Type const * p_reg); + +/** + * @brief Function for enabling TWIS. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_twis_enable(NRF_TWIS_Type * const p_reg); + +/** + * @brief Function for disabling TWIS. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_twis_disable(NRF_TWIS_Type * const p_reg); + +/** + * @brief Function for configuring TWIS pins. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param scl SCL pin number. + * @param sda SDA pin number. + */ +__STATIC_INLINE void nrf_twis_pins_set(NRF_TWIS_Type * const p_reg, uint32_t scl, uint32_t sda); + +/** + * @brief Function for setting the receive buffer. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param p_buf Pointer to the buffer for received data. + * @param length Maximum number of data bytes to receive. + */ +__STATIC_INLINE void nrf_twis_rx_buffer_set( + NRF_TWIS_Type * const p_reg, + uint8_t * p_buf, + nrf_twis_amount_t length); + +/** + * @brief Function that prepares TWIS for receiving + * + * This function sets receive buffer and then sets NRF_TWIS_TASK_PREPARERX task. + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param p_buf Pointer to the buffer for received data. + * @param length Maximum number of data bytes to receive. + */ +__STATIC_INLINE void nrf_twis_rx_prepare( + NRF_TWIS_Type * const p_reg, + uint8_t * p_buf, + nrf_twis_amount_t length); + +/** + * @brief Function for getting number of bytes received in the last transaction. + * + * @param[in] p_reg TWIS instance. + * @return Amount of bytes received. + * */ +__STATIC_INLINE nrf_twis_amount_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * const p_reg); + +/** + * @brief Function for setting the transmit buffer. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param p_buf Pointer to the buffer with data to send. + * @param length Maximum number of data bytes to transmit. + */ +__STATIC_INLINE void nrf_twis_tx_buffer_set( + NRF_TWIS_Type * const p_reg, + uint8_t const * p_buf, + nrf_twis_amount_t length); + +/** + * @brief Function that prepares TWIS for transmitting + * + * This function sets transmit buffer and then sets NRF_TWIS_TASK_PREPARETX task. + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param p_buf Pointer to the buffer with data to send. + * @param length Maximum number of data bytes to transmit. + */ +__STATIC_INLINE void nrf_twis_tx_prepare( + NRF_TWIS_Type * const p_reg, + uint8_t const * p_buf, + nrf_twis_amount_t length); + +/** + * @brief Function for getting number of bytes transmitted in the last transaction. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @return Amount of bytes transmitted. + */ +__STATIC_INLINE nrf_twis_amount_t nrf_twis_tx_amount_get(NRF_TWIS_Type const * const p_reg); + +/** + * @brief Function for setting slave address + * + * Function sets the selected address for this TWI interface. + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param n Index of address to set + * @param addr Addres to set + * @sa nrf_twis_config_address_set + * @sa nrf_twis_config_address_get + */ +__STATIC_INLINE void nrf_twis_address_set( + NRF_TWIS_Type * const p_reg, + uint_fast8_t n, + nrf_twis_address_t addr); + +/** + * @brief Function for retrieving configured slave address + * + * Function gets the selected address for this TWI interface. + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param n Index of address to get + */ +__STATIC_INLINE nrf_twis_address_t nrf_twis_address_get( + NRF_TWIS_Type const * const p_reg, + uint_fast8_t n); + +/** + * @brief Function for setting the device address configuration. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param addr_mask Mask of address indexes of what device should answer to. + * + * @sa nrf_twis_address_set + */ +__STATIC_INLINE void nrf_twis_config_address_set( + NRF_TWIS_Type * const p_reg, + nrf_twis_config_addr_mask_t addr_mask); + +/** + * @brief Function for retrieving the device address configuration. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * + * @return Mask of address indexes of what device should answer to. + */ +__STATIC_INLINE nrf_twis_config_addr_mask_t nrf_twis_config_address_get( + NRF_TWIS_Type const * const p_reg); + +/** + * @brief Function for setting the over-read character. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] orc Over-read character. Character clocked out in case of + * over-read of the TXD buffer. + */ +__STATIC_INLINE void nrf_twis_orc_set( + NRF_TWIS_Type * const p_reg, + uint8_t orc); + +/** + * @brief Function for setting the over-read character. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * + * @return Over-read character configured for selected instance. + */ +__STATIC_INLINE uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * const p_reg); + + +/** @} */ /* End of nrf_twis_hal */ + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +/* ------------------------------------------------------------------------------------------------ + * Internal functions + */ + +/** + * @internal + * @brief Internal function for getting task/event register address + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @oaram offset Offset of the register from the instance beginning + * + * @attention offset has to be modulo 4 value. In other case we can get hardware fault. + * @return Pointer to the register + */ +__STATIC_INLINE volatile uint32_t* nrf_twis_getRegPtr(NRF_TWIS_Type * const p_reg, uint32_t offset) +{ + return (volatile uint32_t*)((uint8_t *)p_reg + (uint32_t)offset); +} + +/** + * @internal + * @brief Internal function for getting task/event register address - constant version + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @oaram offset Offset of the register from the instance beginning + * + * @attention offset has to be modulo 4 value. In other case we can get hardware fault. + * @return Pointer to the register + */ +__STATIC_INLINE volatile const uint32_t* nrf_twis_getRegPtr_c(NRF_TWIS_Type const * const p_reg, uint32_t offset) +{ + return (volatile const uint32_t*)((uint8_t *)p_reg + (uint32_t)offset); +} + + +/* ------------------------------------------------------------------------------------------------ + * Interface functions definitions + */ + + +void nrf_twis_task_trigger(NRF_TWIS_Type * const p_reg, nrf_twis_task_t task) +{ + *(nrf_twis_getRegPtr(p_reg, (uint32_t)task)) = 1UL; +} + +uint32_t nrf_twis_task_address_get( + NRF_TWIS_Type const * const p_reg, + nrf_twis_task_t task) +{ + return (uint32_t)nrf_twis_getRegPtr_c(p_reg, (uint32_t)task); +} + +void nrf_twis_event_clear( + NRF_TWIS_Type * const p_reg, + nrf_twis_event_t event) +{ + *(nrf_twis_getRegPtr(p_reg, (uint32_t)event)) = 0UL; +#if __CORTEX_M == 0x04 + volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)); + (void)dummy; +#endif +} + +bool nrf_twis_event_check( + NRF_TWIS_Type const * const p_reg, + nrf_twis_event_t event) +{ + return (bool)*nrf_twis_getRegPtr_c(p_reg, (uint32_t)event); +} + +bool nrf_twis_event_get_and_clear( + NRF_TWIS_Type * const p_reg, + nrf_twis_event_t event) +{ + bool ret = nrf_twis_event_check(p_reg, event); + if (ret) + { + nrf_twis_event_clear(p_reg, event); + } + return ret; +} + +uint32_t nrf_twis_event_address_get( + NRF_TWIS_Type const * const p_reg, + nrf_twis_event_t event) +{ + return (uint32_t)nrf_twis_getRegPtr_c(p_reg, (uint32_t)event); +} + +void nrf_twis_shorts_enable(NRF_TWIS_Type * const p_reg, uint32_t short_mask) +{ + p_reg->SHORTS |= short_mask; +} + +void nrf_twis_shorts_disable(NRF_TWIS_Type * const p_reg, uint32_t short_mask) +{ + if (~0U == short_mask) + { + /* Optimized version for "disable all" */ + p_reg->SHORTS = 0; + } + else + { + p_reg->SHORTS &= ~short_mask; + } +} + +uint32_t nrf_twis_shorts_get(NRF_TWIS_Type * const p_reg) +{ + return p_reg->SHORTS; +} + +void nrf_twis_int_enable(NRF_TWIS_Type * const p_reg, uint32_t int_mask) +{ + p_reg->INTENSET = int_mask; +} + +bool nrf_twis_int_enable_check(NRF_TWIS_Type const * const p_reg, uint32_t int_mask) +{ + return (bool)(p_reg->INTENSET & int_mask); +} + +void nrf_twis_int_disable(NRF_TWIS_Type * const p_reg, uint32_t int_mask) +{ + p_reg->INTENCLR = int_mask; +} + +uint32_t nrf_twis_error_source_get_and_clear(NRF_TWIS_Type * const p_reg) +{ + uint32_t ret = p_reg->ERRORSRC; + p_reg->ERRORSRC = ret; + return ret; +} + +uint_fast8_t nrf_twis_match_get(NRF_TWIS_Type const * p_reg) +{ + return (uint_fast8_t)p_reg->MATCH; +} + +void nrf_twis_enable(NRF_TWIS_Type * const p_reg) +{ + p_reg->ENABLE = (TWIS_ENABLE_ENABLE_Enabled << TWIS_ENABLE_ENABLE_Pos); +} + +void nrf_twis_disable(NRF_TWIS_Type * const p_reg) +{ + p_reg->ENABLE = (TWIS_ENABLE_ENABLE_Disabled << TWIS_ENABLE_ENABLE_Pos); +} + +void nrf_twis_pins_set(NRF_TWIS_Type * const p_reg, uint32_t scl, uint32_t sda) +{ + p_reg->PSEL.SCL = scl; + p_reg->PSEL.SDA = sda; +} + +void nrf_twis_rx_buffer_set( + NRF_TWIS_Type * const p_reg, + uint8_t * p_buf, + nrf_twis_amount_t length) +{ + p_reg->RXD.PTR = (uint32_t)p_buf; + p_reg->RXD.MAXCNT = length; +} + +__STATIC_INLINE void nrf_twis_rx_prepare( + NRF_TWIS_Type * const p_reg, + uint8_t * p_buf, + nrf_twis_amount_t length) +{ + nrf_twis_rx_buffer_set(p_reg, p_buf, length); + nrf_twis_task_trigger(p_reg, NRF_TWIS_TASK_PREPARERX); +} + +nrf_twis_amount_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * const p_reg) +{ + return (nrf_twis_amount_t)p_reg->RXD.AMOUNT; +} + +void nrf_twis_tx_buffer_set( + NRF_TWIS_Type * const p_reg, + uint8_t const * p_buf, + nrf_twis_amount_t length) +{ + p_reg->TXD.PTR = (uint32_t)p_buf; + p_reg->TXD.MAXCNT = length; +} + +__STATIC_INLINE void nrf_twis_tx_prepare( + NRF_TWIS_Type * const p_reg, + uint8_t const * p_buf, + nrf_twis_amount_t length) +{ + nrf_twis_tx_buffer_set(p_reg, p_buf, length); + nrf_twis_task_trigger(p_reg, NRF_TWIS_TASK_PREPARETX); +} + +nrf_twis_amount_t nrf_twis_tx_amount_get(NRF_TWIS_Type const * const p_reg) +{ + return (nrf_twis_amount_t)p_reg->TXD.AMOUNT; +} + +void nrf_twis_address_set( + NRF_TWIS_Type * const p_reg, + uint_fast8_t n, + nrf_twis_address_t addr) +{ + p_reg->ADDRESS[n] = addr; +} + +nrf_twis_address_t nrf_twis_address_get( + NRF_TWIS_Type const * const p_reg, + uint_fast8_t n) +{ + return (nrf_twis_address_t)p_reg->ADDRESS[n]; +} +void nrf_twis_config_address_set( + NRF_TWIS_Type * const p_reg, + nrf_twis_config_addr_mask_t addr_mask) +{ + /* This is the only configuration in TWIS - just write it without masking */ + p_reg->CONFIG = addr_mask; +} + +nrf_twis_config_addr_mask_t nrf_twis_config_address_get(NRF_TWIS_Type const * const p_reg) +{ + return (nrf_twis_config_addr_mask_t)(p_reg->CONFIG & TWIS_ADDRESS_ADDRESS_Msk); +} + +void nrf_twis_orc_set( + NRF_TWIS_Type * const p_reg, + uint8_t orc) +{ + p_reg->ORC = orc; +} + +uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * const p_reg) +{ + return (uint8_t)p_reg->ORC; +} + +#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ + + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_TWIS_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_uart.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_uart.h new file mode 100644 index 00000000000..71d7726510b --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_uart.h @@ -0,0 +1,526 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_UART_H__ +#define NRF_UART_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_uart_hal UART HAL + * @{ + * @ingroup nrf_uart + * @brief Hardware access layer for managing the UART peripheral. + */ + +#define NRF_UART_PSEL_DISCONNECTED 0xFFFFFFFF + +/** + * @enum nrf_uart_task_t + * @brief UART tasks. + */ +typedef enum +{ + /*lint -save -e30 -esym(628,__INTADDR__)*/ + NRF_UART_TASK_STARTRX = offsetof(NRF_UART_Type, TASKS_STARTRX), /**< Task for starting reception. */ + NRF_UART_TASK_STOPRX = offsetof(NRF_UART_Type, TASKS_STOPRX), /**< Task for stopping reception. */ + NRF_UART_TASK_STARTTX = offsetof(NRF_UART_Type, TASKS_STARTTX), /**< Task for starting transmission. */ + NRF_UART_TASK_STOPTX = offsetof(NRF_UART_Type, TASKS_STOPTX), /**< Task for stopping transmission. */ + NRF_UART_TASK_SUSPEND = offsetof(NRF_UART_Type, TASKS_SUSPEND), /**< Task for suspending UART. */ + /*lint -restore*/ +} nrf_uart_task_t; + +/** + * @enum nrf_uart_event_t + * @brief UART events. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_UART_EVENT_CTS = offsetof(NRF_UART_Type, EVENTS_CTS), /**< Event from CTS line activation. */ + NRF_UART_EVENT_NCTS = offsetof(NRF_UART_Type, EVENTS_NCTS), /**< Event from CTS line deactivation. */ + NRF_UART_EVENT_RXDRDY = offsetof(NRF_UART_Type, EVENTS_RXDRDY),/**< Event from data ready in RXD. */ + NRF_UART_EVENT_TXDRDY = offsetof(NRF_UART_Type, EVENTS_TXDRDY),/**< Event from data sent from TXD. */ + NRF_UART_EVENT_ERROR = offsetof(NRF_UART_Type, EVENTS_ERROR), /**< Event from error detection. */ + NRF_UART_EVENT_RXTO = offsetof(NRF_UART_Type, EVENTS_RXTO) /**< Event from receiver timeout. */ + /*lint -restore*/ +} nrf_uart_event_t; + +/** + * @enum nrf_uart_int_mask_t + * @brief UART interrupts. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_UART_INT_MASK_CTS = UART_INTENCLR_CTS_Msk, /**< CTS line activation interrupt. */ + NRF_UART_INT_MASK_NCTS = UART_INTENCLR_NCTS_Msk, /**< CTS line deactivation interrupt. */ + NRF_UART_INT_MASK_RXDRDY = UART_INTENCLR_RXDRDY_Msk, /**< Data ready in RXD interrupt. */ + NRF_UART_INT_MASK_TXDRDY = UART_INTENCLR_TXDRDY_Msk, /**< Data sent from TXD interrupt. */ + NRF_UART_INT_MASK_ERROR = UART_INTENCLR_ERROR_Msk, /**< Error detection interrupt. */ + NRF_UART_INT_MASK_RXTO = UART_INTENCLR_RXTO_Msk /**< Receiver timeout interrupt. */ + /*lint -restore*/ +} nrf_uart_int_mask_t; + +/** + * @enum nrf_uart_baudrate_t + * @brief Baudrates supported by UART. + */ +typedef enum +{ + NRF_UART_BAUDRATE_1200 = UART_BAUDRATE_BAUDRATE_Baud1200, /**< 1200 baud. */ + NRF_UART_BAUDRATE_2400 = UART_BAUDRATE_BAUDRATE_Baud2400, /**< 2400 baud. */ + NRF_UART_BAUDRATE_4800 = UART_BAUDRATE_BAUDRATE_Baud4800, /**< 4800 baud. */ + NRF_UART_BAUDRATE_9600 = UART_BAUDRATE_BAUDRATE_Baud9600, /**< 9600 baud. */ + NRF_UART_BAUDRATE_14400 = UART_BAUDRATE_BAUDRATE_Baud14400, /**< 14400 baud. */ + NRF_UART_BAUDRATE_19200 = UART_BAUDRATE_BAUDRATE_Baud19200, /**< 19200 baud. */ + NRF_UART_BAUDRATE_28800 = UART_BAUDRATE_BAUDRATE_Baud28800, /**< 28800 baud. */ + NRF_UART_BAUDRATE_31250 = UART_BAUDRATE_BAUDRATE_Baud31250, /**< 31250 baud. */ + NRF_UART_BAUDRATE_38400 = UART_BAUDRATE_BAUDRATE_Baud38400, /**< 38400 baud. */ + NRF_UART_BAUDRATE_56000 = UART_BAUDRATE_BAUDRATE_Baud56000, /**< 56000 baud. */ + NRF_UART_BAUDRATE_57600 = UART_BAUDRATE_BAUDRATE_Baud57600, /**< 57600 baud. */ + NRF_UART_BAUDRATE_76800 = UART_BAUDRATE_BAUDRATE_Baud76800, /**< 76800 baud. */ + NRF_UART_BAUDRATE_115200 = UART_BAUDRATE_BAUDRATE_Baud115200, /**< 115200 baud. */ + NRF_UART_BAUDRATE_230400 = UART_BAUDRATE_BAUDRATE_Baud230400, /**< 230400 baud. */ + NRF_UART_BAUDRATE_250000 = UART_BAUDRATE_BAUDRATE_Baud250000, /**< 250000 baud. */ + NRF_UART_BAUDRATE_460800 = UART_BAUDRATE_BAUDRATE_Baud460800, /**< 460800 baud. */ + NRF_UART_BAUDRATE_921600 = UART_BAUDRATE_BAUDRATE_Baud921600, /**< 921600 baud. */ + NRF_UART_BAUDRATE_1000000 = UART_BAUDRATE_BAUDRATE_Baud1M, /**< 1000000 baud. */ +} nrf_uart_baudrate_t; + +/** + * @enum nrf_uart_error_mask_t + * @brief Types of UART error masks. + */ +typedef enum +{ + NRF_UART_ERROR_OVERRUN_MASK = UART_ERRORSRC_OVERRUN_Msk, /**< Overrun error. */ + NRF_UART_ERROR_PARITY_MASK = UART_ERRORSRC_PARITY_Msk, /**< Parity error. */ + NRF_UART_ERROR_FRAMING_MASK = UART_ERRORSRC_FRAMING_Msk, /**< Framing error. */ + NRF_UART_ERROR_BREAK_MASK = UART_ERRORSRC_BREAK_Msk, /**< Break error. */ +} nrf_uart_error_mask_t; + +/** + * @enum nrf_uart_parity_t + * @brief Types of UART parity modes. + */ +typedef enum +{ + NRF_UART_PARITY_EXCLUDED = UART_CONFIG_PARITY_Excluded << UART_CONFIG_PARITY_Pos, /**< Parity excluded. */ + NRF_UART_PARITY_INCLUDED = UART_CONFIG_PARITY_Included << UART_CONFIG_PARITY_Pos, /**< Parity included. */ +} nrf_uart_parity_t; + +/** + * @enum nrf_uart_hwfc_t + * @brief Types of UART flow control modes. + */ +typedef enum +{ + NRF_UART_HWFC_DISABLED = UART_CONFIG_HWFC_Disabled, /**< HW flow control disabled. */ + NRF_UART_HWFC_ENABLED = UART_CONFIG_HWFC_Enabled, /**< HW flow control enabled. */ +} nrf_uart_hwfc_t; + +/** + * @brief Function for clearing a specific UART event. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] event Event to clear. + */ +__STATIC_INLINE void nrf_uart_event_clear(NRF_UART_Type * p_reg, nrf_uart_event_t event); + +/** + * @brief Function for checking the state of a specific UART event. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] event Event to check. + * + * @retval True if event is set, False otherwise. + */ +__STATIC_INLINE bool nrf_uart_event_check(NRF_UART_Type * p_reg, nrf_uart_event_t event); + +/** + * @brief Function for returning the address of a specific UART event register. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] event Desired event. + * + * @retval Address of specified event register. + */ +__STATIC_INLINE uint32_t nrf_uart_event_address_get(NRF_UART_Type * p_reg, + nrf_uart_event_t event); + +/** + * @brief Function for enabling a specific interrupt. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param int_mask Interrupts to enable. + */ +__STATIC_INLINE void nrf_uart_int_enable(NRF_UART_Type * p_reg, uint32_t int_mask); + +/** + * @brief Function for retrieving the state of a given interrupt. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param int_mask Mask of interrupt to check. + * + * @retval true If the interrupt is enabled. + * @retval false If the interrupt is not enabled. + */ +__STATIC_INLINE bool nrf_uart_int_enable_check(NRF_UART_Type * p_reg, uint32_t int_mask); + +/** + * @brief Function for disabling specific interrupts. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param int_mask Interrupts to disable. + */ +__STATIC_INLINE void nrf_uart_int_disable(NRF_UART_Type * p_reg, uint32_t int_mask); + +/** + * @brief Function for getting error source mask. Function is clearing error source flags after reading. + * + * @param p_reg Pointer to the peripheral registers structure. + * @return Mask with error source flags. + */ +__STATIC_INLINE uint32_t nrf_uart_errorsrc_get_and_clear(NRF_UART_Type * p_reg); + +/** + * @brief Function for enabling UART. + * + * @param p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_uart_enable(NRF_UART_Type * p_reg); + +/** + * @brief Function for disabling UART. + * + * @param p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_uart_disable(NRF_UART_Type * p_reg); + +/** + * @brief Function for configuring TX/RX pins. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param pseltxd TXD pin number. + * @param pselrxd RXD pin number. + */ +__STATIC_INLINE void nrf_uart_txrx_pins_set(NRF_UART_Type * p_reg, uint32_t pseltxd, uint32_t pselrxd); + +/** + * @brief Function for disconnecting TX/RX pins. + * + * @param p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_uart_txrx_pins_disconnect(NRF_UART_Type * p_reg); + +/** + * @brief Function for getting TX pin. + * + * @param p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE uint32_t nrf_uart_tx_pin_get(NRF_UART_Type * p_reg); + +/** + * @brief Function for getting RX pin. + * + * @param p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE uint32_t nrf_uart_rx_pin_get(NRF_UART_Type * p_reg); + +/** + * @brief Function for getting RTS pin. + * + * @param p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE uint32_t nrf_uart_rts_pin_get(NRF_UART_Type * p_reg); + +/** + * @brief Function for getting CTS pin. + * + * @param p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE uint32_t nrf_uart_cts_pin_get(NRF_UART_Type * p_reg); + + +/** + * @brief Function for configuring flow control pins. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param pselrts RTS pin number. + * @param pselcts CTS pin number. + */ +__STATIC_INLINE void nrf_uart_hwfc_pins_set(NRF_UART_Type * p_reg, + uint32_t pselrts, + uint32_t pselcts); + +/** + * @brief Function for disconnecting flow control pins. + * + * @param p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_uart_hwfc_pins_disconnect(NRF_UART_Type * p_reg); + +/** + * @brief Function for reading RX data. + * + * @param p_reg Pointer to the peripheral registers structure. + * @return Received byte. + */ +__STATIC_INLINE uint8_t nrf_uart_rxd_get(NRF_UART_Type * p_reg); + +/** + * @brief Function for setting Tx data. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param txd Byte. + */ +__STATIC_INLINE void nrf_uart_txd_set(NRF_UART_Type * p_reg, uint8_t txd); + +/** + * @brief Function for starting an UART task. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param task Task. + */ +__STATIC_INLINE void nrf_uart_task_trigger(NRF_UART_Type * p_reg, nrf_uart_task_t task); + +/** + * @brief Function for returning the address of a specific task register. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param task Task. + * + * @return Task address. + */ +__STATIC_INLINE uint32_t nrf_uart_task_address_get(NRF_UART_Type * p_reg, nrf_uart_task_t task); + +/** + * @brief Function for configuring UART. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param hwfc Hardware flow control. Enabled if true. + * @param parity Parity. Included if true. + */ +__STATIC_INLINE void nrf_uart_configure(NRF_UART_Type * p_reg, + nrf_uart_parity_t parity, + nrf_uart_hwfc_t hwfc); + +/** + * @brief Function for setting UART baudrate. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param baudrate Baudrate. + */ +__STATIC_INLINE void nrf_uart_baudrate_set(NRF_UART_Type * p_reg, nrf_uart_baudrate_t baudrate); + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION +__STATIC_INLINE void nrf_uart_event_clear(NRF_UART_Type * p_reg, nrf_uart_event_t event) +{ + *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL; +#if __CORTEX_M == 0x04 + volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)); + (void)dummy; +#endif + +} + +__STATIC_INLINE bool nrf_uart_event_check(NRF_UART_Type * p_reg, nrf_uart_event_t event) +{ + return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event); +} + +__STATIC_INLINE uint32_t nrf_uart_event_address_get(NRF_UART_Type * p_reg, + nrf_uart_event_t event) +{ + return (uint32_t)((uint8_t *)p_reg + (uint32_t)event); +} + +__STATIC_INLINE void nrf_uart_int_enable(NRF_UART_Type * p_reg, uint32_t int_mask) +{ + p_reg->INTENSET = int_mask; +} + +__STATIC_INLINE bool nrf_uart_int_enable_check(NRF_UART_Type * p_reg, uint32_t int_mask) +{ + return (bool)(p_reg->INTENSET & int_mask); +} + +__STATIC_INLINE void nrf_uart_int_disable(NRF_UART_Type * p_reg, uint32_t int_mask) +{ + p_reg->INTENCLR = int_mask; +} + +__STATIC_INLINE uint32_t nrf_uart_errorsrc_get_and_clear(NRF_UART_Type * p_reg) +{ + uint32_t errsrc_mask = p_reg->ERRORSRC; + p_reg->ERRORSRC = errsrc_mask; + return errsrc_mask; +} + +__STATIC_INLINE void nrf_uart_enable(NRF_UART_Type * p_reg) +{ + p_reg->ENABLE = UART_ENABLE_ENABLE_Enabled; +} + +__STATIC_INLINE void nrf_uart_disable(NRF_UART_Type * p_reg) +{ + p_reg->ENABLE = UART_ENABLE_ENABLE_Disabled; +} + +__STATIC_INLINE void nrf_uart_txrx_pins_set(NRF_UART_Type * p_reg, uint32_t pseltxd, uint32_t pselrxd) +{ +#if defined(UART_PSEL_RXD_CONNECT_Pos) + p_reg->PSEL.RXD = pselrxd; +#else + p_reg->PSELRXD = pselrxd; +#endif +#if defined(UART_PSEL_TXD_CONNECT_Pos) + p_reg->PSEL.TXD = pseltxd; +#else + p_reg->PSELTXD = pseltxd; +#endif +} + +__STATIC_INLINE void nrf_uart_txrx_pins_disconnect(NRF_UART_Type * p_reg) +{ + nrf_uart_txrx_pins_set(p_reg, NRF_UART_PSEL_DISCONNECTED, NRF_UART_PSEL_DISCONNECTED); +} + +__STATIC_INLINE uint32_t nrf_uart_tx_pin_get(NRF_UART_Type * p_reg) +{ +#if defined(UART_PSEL_TXD_CONNECT_Pos) + return p_reg->PSEL.TXD; +#else + return p_reg->PSELTXD; +#endif +} + +__STATIC_INLINE uint32_t nrf_uart_rx_pin_get(NRF_UART_Type * p_reg) +{ +#if defined(UART_PSEL_RXD_CONNECT_Pos) + return p_reg->PSEL.RXD; +#else + return p_reg->PSELRXD; +#endif +} + +__STATIC_INLINE uint32_t nrf_uart_rts_pin_get(NRF_UART_Type * p_reg) +{ +#if defined(UART_PSEL_RTS_CONNECT_Pos) + return p_reg->PSEL.RTS; +#else + return p_reg->PSELRTS; +#endif +} + +__STATIC_INLINE uint32_t nrf_uart_cts_pin_get(NRF_UART_Type * p_reg) +{ +#if defined(UART_PSEL_RTS_CONNECT_Pos) + return p_reg->PSEL.CTS; +#else + return p_reg->PSELCTS; +#endif +} + +__STATIC_INLINE void nrf_uart_hwfc_pins_set(NRF_UART_Type * p_reg, uint32_t pselrts, uint32_t pselcts) +{ +#if defined(UART_PSEL_RTS_CONNECT_Pos) + p_reg->PSEL.RTS = pselrts; +#else + p_reg->PSELRTS = pselrts; +#endif + +#if defined(UART_PSEL_RTS_CONNECT_Pos) + p_reg->PSEL.CTS = pselcts; +#else + p_reg->PSELCTS = pselcts; +#endif +} + +__STATIC_INLINE void nrf_uart_hwfc_pins_disconnect(NRF_UART_Type * p_reg) +{ + nrf_uart_hwfc_pins_set(p_reg, NRF_UART_PSEL_DISCONNECTED, NRF_UART_PSEL_DISCONNECTED); +} + +__STATIC_INLINE uint8_t nrf_uart_rxd_get(NRF_UART_Type * p_reg) +{ + return p_reg->RXD; +} + +__STATIC_INLINE void nrf_uart_txd_set(NRF_UART_Type * p_reg, uint8_t txd) +{ + p_reg->TXD = txd; +} + +__STATIC_INLINE void nrf_uart_task_trigger(NRF_UART_Type * p_reg, nrf_uart_task_t task) +{ + *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL; +} + +__STATIC_INLINE uint32_t nrf_uart_task_address_get(NRF_UART_Type * p_reg, nrf_uart_task_t task) +{ + return (uint32_t)p_reg + (uint32_t)task; +} + +__STATIC_INLINE void nrf_uart_configure(NRF_UART_Type * p_reg, + nrf_uart_parity_t parity, + nrf_uart_hwfc_t hwfc) +{ + p_reg->CONFIG = (uint32_t)parity | (uint32_t)hwfc; +} + +__STATIC_INLINE void nrf_uart_baudrate_set(NRF_UART_Type * p_reg, nrf_uart_baudrate_t baudrate) +{ + p_reg->BAUDRATE = baudrate; +} +#endif //SUPPRESS_INLINE_IMPLEMENTATION + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif //NRF_UART_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_uarte.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_uarte.h new file mode 100644 index 00000000000..b1e65dca124 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_uarte.h @@ -0,0 +1,579 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_UARTE_H__ +#define NRF_UARTE_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#define NRF_UARTE_PSEL_DISCONNECTED 0xFFFFFFFF + +/** + * @defgroup nrf_uarte_hal UARTE HAL + * @{ + * @ingroup nrf_uarte + * @brief Hardware access layer for managing the UARTE peripheral. + */ + +/** + * @enum nrf_uarte_task_t + * @brief UARTE tasks. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_UARTE_TASK_STARTRX = offsetof(NRF_UARTE_Type, TASKS_STARTRX), ///< Start UART receiver. + NRF_UARTE_TASK_STOPRX = offsetof(NRF_UARTE_Type, TASKS_STOPRX), ///< Stop UART receiver. + NRF_UARTE_TASK_STARTTX = offsetof(NRF_UARTE_Type, TASKS_STARTTX), ///< Start UART transmitter. + NRF_UARTE_TASK_STOPTX = offsetof(NRF_UARTE_Type, TASKS_STOPTX), ///< Stop UART transmitter. + NRF_UARTE_TASK_FLUSHRX = offsetof(NRF_UARTE_Type, TASKS_FLUSHRX) ///< Flush RX FIFO in RX buffer. + /*lint -restore*/ +} nrf_uarte_task_t; + +/** + * @enum nrf_uarte_event_t + * @brief UARTE events. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_UARTE_EVENT_CTS = offsetof(NRF_UARTE_Type, EVENTS_CTS), ///< CTS is activated. + NRF_UARTE_EVENT_NCTS = offsetof(NRF_UARTE_Type, EVENTS_NCTS), ///< CTS is deactivated. + NRF_UARTE_EVENT_RXDRDY = offsetof(NRF_UARTE_Type, EVENTS_RXDRDY), ///< Data received in RXD (but potentially not yet transferred to Data RAM). + NRF_UARTE_EVENT_ENDRX = offsetof(NRF_UARTE_Type, EVENTS_ENDRX), ///< Receive buffer is filled up. + NRF_UARTE_EVENT_TXDDY = offsetof(NRF_UARTE_Type, EVENTS_TXDRDY), ///< Data sent from TXD. + NRF_UARTE_EVENT_ENDTX = offsetof(NRF_UARTE_Type, EVENTS_ENDTX), ///< Last TX byte transmitted. + NRF_UARTE_EVENT_ERROR = offsetof(NRF_UARTE_Type, EVENTS_ERROR), ///< Error detected. + NRF_UARTE_EVENT_RXTO = offsetof(NRF_UARTE_Type, EVENTS_RXTO), ///< Receiver timeout. + NRF_UARTE_EVENT_RXSTARTED = offsetof(NRF_UARTE_Type, EVENTS_RXSTARTED), ///< Receiver has started. + NRF_UARTE_EVENT_TXSTARTED = offsetof(NRF_UARTE_Type, EVENTS_TXSTARTED), ///< Transmitter has started. + NRF_UARTE_EVENT_TXSTOPPED = offsetof(NRF_UARTE_Type, EVENTS_TXSTOPPED) ///< Transmitted stopped. + /*lint -restore*/ +} nrf_uarte_event_t; + +/** + * @brief Types of UARTE shortcuts. + */ +typedef enum +{ + NRF_UARTE_SHORT_ENDRX_STARTRX = UARTE_SHORTS_ENDRX_STARTRX_Msk, ///< Shortcut between ENDRX event and STARTRX task. + NRF_UARTE_SHORT_ENDRX_STOPRX = UARTE_SHORTS_ENDRX_STOPRX_Msk ///< Shortcut between ENDRX event and STOPRX task. +} nrf_uarte_short_t; + + +/** + * @enum nrf_uarte_int_mask_t + * @brief UARTE interrupts. + */ +typedef enum +{ + NRF_UARTE_INT_CTS_MASK = UARTE_INTENSET_CTS_Msk, ///< Interrupt on CTS event. + NRF_UARTE_INT_NCTS_MASK = UARTE_INTENSET_NCTS_Msk, ///< Interrupt on NCTS event. + NRF_UARTE_INT_RXDRDY_MASK = UARTE_INTENSET_RXDRDY_Msk, ///< Interrupt on RXDRDY event. + NRF_UARTE_INT_ENDRX_MASK = UARTE_INTENSET_ENDRX_Msk, ///< Interrupt on ENDRX event. + NRF_UARTE_INT_TXDRDY_MASK = UARTE_INTENSET_TXDRDY_Msk, ///< Interrupt on TXDRDY event. + NRF_UARTE_INT_ENDTX_MASK = UARTE_INTENSET_ENDTX_Msk, ///< Interrupt on ENDTX event. + NRF_UARTE_INT_ERROR_MASK = UARTE_INTENSET_ERROR_Msk, ///< Interrupt on ERROR event. + NRF_UARTE_INT_RXTO_MASK = UARTE_INTENSET_RXTO_Msk, ///< Interrupt on RXTO event. + NRF_UARTE_INT_RXSTARTED_MASK = UARTE_INTENSET_RXSTARTED_Msk, ///< Interrupt on RXSTARTED event. + NRF_UARTE_INT_TXSTARTED_MASK = UARTE_INTENSET_TXSTARTED_Msk, ///< Interrupt on TXSTARTED event. + NRF_UARTE_INT_TXSTOPPED_MASK = UARTE_INTENSET_TXSTOPPED_Msk ///< Interrupt on TXSTOPPED event. +} nrf_uarte_int_mask_t; + +/** + * @enum nrf_uarte_baudrate_t + * @brief Baudrates supported by UARTE. + */ +typedef enum +{ + NRF_UARTE_BAUDRATE_1200 = UARTE_BAUDRATE_BAUDRATE_Baud1200, ///< 1200 baud. + NRF_UARTE_BAUDRATE_2400 = UARTE_BAUDRATE_BAUDRATE_Baud2400, ///< 2400 baud. + NRF_UARTE_BAUDRATE_4800 = UARTE_BAUDRATE_BAUDRATE_Baud4800, ///< 4800 baud. + NRF_UARTE_BAUDRATE_9600 = UARTE_BAUDRATE_BAUDRATE_Baud9600, ///< 9600 baud. + NRF_UARTE_BAUDRATE_14400 = UARTE_BAUDRATE_BAUDRATE_Baud14400, ///< 14400 baud. + NRF_UARTE_BAUDRATE_19200 = UARTE_BAUDRATE_BAUDRATE_Baud19200, ///< 19200 baud. + NRF_UARTE_BAUDRATE_28800 = UARTE_BAUDRATE_BAUDRATE_Baud28800, ///< 28800 baud. + NRF_UARTE_BAUDRATE_31250 = UARTE_BAUDRATE_BAUDRATE_Baud31250, ///< 31250 baud. + NRF_UARTE_BAUDRATE_38400 = UARTE_BAUDRATE_BAUDRATE_Baud38400, ///< 38400 baud. + NRF_UARTE_BAUDRATE_56000 = UARTE_BAUDRATE_BAUDRATE_Baud56000, ///< 56000 baud. + NRF_UARTE_BAUDRATE_57600 = UARTE_BAUDRATE_BAUDRATE_Baud57600, ///< 57600 baud. + NRF_UARTE_BAUDRATE_76800 = UARTE_BAUDRATE_BAUDRATE_Baud76800, ///< 76800 baud. + NRF_UARTE_BAUDRATE_115200 = UARTE_BAUDRATE_BAUDRATE_Baud115200, ///< 115200 baud. + NRF_UARTE_BAUDRATE_230400 = UARTE_BAUDRATE_BAUDRATE_Baud230400, ///< 230400 baud. + NRF_UARTE_BAUDRATE_250000 = UARTE_BAUDRATE_BAUDRATE_Baud250000, ///< 250000 baud. + NRF_UARTE_BAUDRATE_460800 = UARTE_BAUDRATE_BAUDRATE_Baud460800, ///< 460800 baud. + NRF_UARTE_BAUDRATE_921600 = UARTE_BAUDRATE_BAUDRATE_Baud921600, ///< 921600 baud. + NRF_UARTE_BAUDRATE_1000000 = UARTE_BAUDRATE_BAUDRATE_Baud1M ///< 1000000 baud. +} nrf_uarte_baudrate_t; + +/** + * @enum nrf_uarte_error_mask_t + * @brief Types of UARTE error masks. + */ +typedef enum +{ + NRF_UARTE_ERROR_OVERRUN_MASK = UARTE_ERRORSRC_OVERRUN_Msk, ///< Overrun error. + NRF_UARTE_ERROR_PARITY_MASK = UARTE_ERRORSRC_PARITY_Msk, ///< Parity error. + NRF_UARTE_ERROR_FRAMING_MASK = UARTE_ERRORSRC_FRAMING_Msk, ///< Framing error. + NRF_UARTE_ERROR_BREAK_MASK = UARTE_ERRORSRC_BREAK_Msk ///< Break error. +} nrf_uarte_error_mask_t; + +/** + * @enum nrf_uarte_parity_t + * @brief Types of UARTE parity modes. + */ +typedef enum +{ + NRF_UARTE_PARITY_EXCLUDED = UARTE_CONFIG_PARITY_Excluded << UARTE_CONFIG_PARITY_Pos, ///< Parity excluded. + NRF_UARTE_PARITY_INCLUDED = UARTE_CONFIG_PARITY_Included << UARTE_CONFIG_PARITY_Pos ///< Parity included. +} nrf_uarte_parity_t; + +/** + * @enum nrf_uarte_hwfc_t + * @brief Types of UARTE flow control modes. + */ +typedef enum +{ + NRF_UARTE_HWFC_DISABLED = UARTE_CONFIG_HWFC_Disabled << UARTE_CONFIG_HWFC_Pos, ///< HW flow control disabled. + NRF_UARTE_HWFC_ENABLED = UARTE_CONFIG_HWFC_Enabled << UARTE_CONFIG_HWFC_Pos ///< HW flow control enabled. +} nrf_uarte_hwfc_t; + + +/** + * @brief Function for clearing a specific UARTE event. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] event Event to clear. + */ +__STATIC_INLINE void nrf_uarte_event_clear(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event); + +/** + * @brief Function for checking the state of a specific UARTE event. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] event Event to check. + * + * @retval True if event is set, False otherwise. + */ +__STATIC_INLINE bool nrf_uarte_event_check(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event); + +/** + * @brief Function for returning the address of a specific UARTE event register. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] event Desired event. + * + * @retval Address of specified event register. + */ +__STATIC_INLINE uint32_t nrf_uarte_event_address_get(NRF_UARTE_Type * p_reg, + nrf_uarte_event_t event); + +/** + * @brief Function for enabling UARTE shortcuts. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param shorts_mask Shortcuts to enable. + */ +__STATIC_INLINE void nrf_uarte_shorts_enable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask); + +/** + * @brief Function for disabling UARTE shortcuts. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param shorts_mask Shortcuts to disable. + */ +__STATIC_INLINE void nrf_uarte_shorts_disable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask); + +/** + * @brief Function for enabling UARTE interrupts. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param int_mask Interrupts to enable. + */ +__STATIC_INLINE void nrf_uarte_int_enable(NRF_UARTE_Type * p_reg, uint32_t int_mask); + +/** + * @brief Function for retrieving the state of a given interrupt. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param int_mask Mask of interrupt to check. + * + * @retval true If the interrupt is enabled. + * @retval false If the interrupt is not enabled. + */ +__STATIC_INLINE bool nrf_uarte_int_enable_check(NRF_UARTE_Type * p_reg, nrf_uarte_int_mask_t int_mask); + +/** + * @brief Function for disabling specific interrupts. + * + * @param p_reg Instance. + * @param int_mask Interrupts to disable. + */ +__STATIC_INLINE void nrf_uarte_int_disable(NRF_UARTE_Type * p_reg, uint32_t int_mask); + +/** + * @brief Function for getting error source mask. Function is clearing error source flags after reading. + * + * @param p_reg Pointer to the peripheral registers structure. + * @return Mask with error source flags. + */ +__STATIC_INLINE uint32_t nrf_uarte_errorsrc_get_and_clear(NRF_UARTE_Type * p_reg); + +/** + * @brief Function for enabling UARTE. + * + * @param p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_uarte_enable(NRF_UARTE_Type * p_reg); + +/** + * @brief Function for disabling UARTE. + * + * @param p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_uarte_disable(NRF_UARTE_Type * p_reg); + +/** + * @brief Function for configuring TX/RX pins. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param pseltxd TXD pin number. + * @param pselrxd RXD pin number. + */ +__STATIC_INLINE void nrf_uarte_txrx_pins_set(NRF_UARTE_Type * p_reg, uint32_t pseltxd, uint32_t pselrxd); + +/** + * @brief Function for disconnecting TX/RX pins. + * + * @param p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_uarte_txrx_pins_disconnect(NRF_UARTE_Type * p_reg); + +/** + * @brief Function for getting TX pin. + * + * @param p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE uint32_t nrf_uarte_tx_pin_get(NRF_UARTE_Type * p_reg); + +/** + * @brief Function for getting RX pin. + * + * @param p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE uint32_t nrf_uarte_rx_pin_get(NRF_UARTE_Type * p_reg); + +/** + * @brief Function for getting RTS pin. + * + * @param p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE uint32_t nrf_uarte_rts_pin_get(NRF_UARTE_Type * p_reg); + +/** + * @brief Function for getting CTS pin. + * + * @param p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE uint32_t nrf_uarte_cts_pin_get(NRF_UARTE_Type * p_reg); + + +/** + * @brief Function for configuring flow control pins. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param pselrts RTS pin number. + * @param pselcts CTS pin number. + */ +__STATIC_INLINE void nrf_uarte_hwfc_pins_set(NRF_UARTE_Type * p_reg, + uint32_t pselrts, + uint32_t pselcts); + +/** + * @brief Function for disconnecting flow control pins. + * + * @param p_reg Pointer to the peripheral registers structure. + */ +__STATIC_INLINE void nrf_uarte_hwfc_pins_disconnect(NRF_UARTE_Type * p_reg); + +/** + * @brief Function for starting an UARTE task. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param task Task. + */ +__STATIC_INLINE void nrf_uarte_task_trigger(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task); + +/** + * @brief Function for returning the address of a specific task register. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param task Task. + * + * @return Task address. + */ +__STATIC_INLINE uint32_t nrf_uarte_task_address_get(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task); + +/** + * @brief Function for configuring UARTE. + * + * @param p_reg Pointer to the peripheral registers structure. + * @param hwfc Hardware flow control. Enabled if true. + * @param parity Parity. Included if true. + */ +__STATIC_INLINE void nrf_uarte_configure(NRF_UARTE_Type * p_reg, + nrf_uarte_parity_t parity, + nrf_uarte_hwfc_t hwfc); + + +/** + * @brief Function for setting UARTE baudrate. + * + * @param p_reg Instance. + * @param baudrate Baudrate. + */ +__STATIC_INLINE void nrf_uarte_baudrate_set(NRF_UARTE_Type * p_reg, nrf_uarte_baudrate_t baudrate); + +/** + * @brief Function for setting the transmit buffer. + * + * @param[in] p_reg Instance. + * @param[in] p_buffer Pointer to the buffer with data to send. + * @param[in] length Maximum number of data bytes to transmit. + */ +__STATIC_INLINE void nrf_uarte_tx_buffer_set(NRF_UARTE_Type * p_reg, + uint8_t const * p_buffer, + size_t length); + +/** + * @brief Function for getting number of bytes transmitted in the last transaction. + * + * @param[in] p_reg Instance. + * + * @retval Amount of bytes transmitted. + */ +__STATIC_INLINE uint32_t nrf_uarte_tx_amount_get(NRF_UARTE_Type * p_reg); + +/** + * @brief Function for setting the receive buffer. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * @param[in] p_buffer Pointer to the buffer for received data. + * @param[in] length Maximum number of data bytes to receive. + */ +__STATIC_INLINE void nrf_uarte_rx_buffer_set(NRF_UARTE_Type * p_reg, + uint8_t * p_buffer, + size_t length); + +/** + * @brief Function for getting number of bytes received in the last transaction. + * + * @param[in] p_reg Pointer to the peripheral registers structure. + * + * @retval Amount of bytes received. + */ +__STATIC_INLINE uint32_t nrf_uarte_rx_amount_get(NRF_UARTE_Type * p_reg); + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION +__STATIC_INLINE void nrf_uarte_event_clear(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event) +{ + *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL; +#if __CORTEX_M == 0x04 + volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)); + (void)dummy; +#endif + +} + +__STATIC_INLINE bool nrf_uarte_event_check(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event) +{ + return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event); +} + +__STATIC_INLINE uint32_t nrf_uarte_event_address_get(NRF_UARTE_Type * p_reg, + nrf_uarte_event_t event) +{ + return (uint32_t)((uint8_t *)p_reg + (uint32_t)event); +} + +__STATIC_INLINE void nrf_uarte_shorts_enable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask) +{ + p_reg->SHORTS |= shorts_mask; +} + +__STATIC_INLINE void nrf_uarte_shorts_disable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask) +{ + p_reg->SHORTS &= ~(shorts_mask); +} + +__STATIC_INLINE void nrf_uarte_int_enable(NRF_UARTE_Type * p_reg, uint32_t int_mask) +{ + p_reg->INTENSET = int_mask; +} + +__STATIC_INLINE bool nrf_uarte_int_enable_check(NRF_UARTE_Type * p_reg, nrf_uarte_int_mask_t int_mask) +{ + return (bool)(p_reg->INTENSET & int_mask); +} + +__STATIC_INLINE void nrf_uarte_int_disable(NRF_UARTE_Type * p_reg, uint32_t int_mask) +{ + p_reg->INTENCLR = int_mask; +} + +__STATIC_INLINE uint32_t nrf_uarte_errorsrc_get_and_clear(NRF_UARTE_Type * p_reg) +{ + uint32_t errsrc_mask = p_reg->ERRORSRC; + p_reg->ERRORSRC = errsrc_mask; + return errsrc_mask; +} + +__STATIC_INLINE void nrf_uarte_enable(NRF_UARTE_Type * p_reg) +{ + p_reg->ENABLE = UARTE_ENABLE_ENABLE_Enabled; +} + +__STATIC_INLINE void nrf_uarte_disable(NRF_UARTE_Type * p_reg) +{ + p_reg->ENABLE = UARTE_ENABLE_ENABLE_Disabled; +} + +__STATIC_INLINE void nrf_uarte_txrx_pins_set(NRF_UARTE_Type * p_reg, uint32_t pseltxd, uint32_t pselrxd) +{ + p_reg->PSEL.TXD = pseltxd; + p_reg->PSEL.RXD = pselrxd; +} + +__STATIC_INLINE void nrf_uarte_txrx_pins_disconnect(NRF_UARTE_Type * p_reg) +{ + nrf_uarte_txrx_pins_set(p_reg, NRF_UARTE_PSEL_DISCONNECTED, NRF_UARTE_PSEL_DISCONNECTED); +} + +__STATIC_INLINE uint32_t nrf_uarte_tx_pin_get(NRF_UARTE_Type * p_reg) +{ + return p_reg->PSEL.TXD; +} + +__STATIC_INLINE uint32_t nrf_uarte_rx_pin_get(NRF_UARTE_Type * p_reg) +{ + return p_reg->PSEL.RXD; +} + +__STATIC_INLINE uint32_t nrf_uarte_rts_pin_get(NRF_UARTE_Type * p_reg) +{ + return p_reg->PSEL.RTS; +} + +__STATIC_INLINE uint32_t nrf_uarte_cts_pin_get(NRF_UARTE_Type * p_reg) +{ + return p_reg->PSEL.CTS; +} + +__STATIC_INLINE void nrf_uarte_hwfc_pins_set(NRF_UARTE_Type * p_reg, uint32_t pselrts, uint32_t pselcts) +{ + p_reg->PSEL.RTS = pselrts; + p_reg->PSEL.CTS = pselcts; +} + +__STATIC_INLINE void nrf_uarte_hwfc_pins_disconnect(NRF_UARTE_Type * p_reg) +{ + nrf_uarte_hwfc_pins_set(p_reg, NRF_UARTE_PSEL_DISCONNECTED, NRF_UARTE_PSEL_DISCONNECTED); +} + +__STATIC_INLINE void nrf_uarte_task_trigger(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task) +{ + *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL; +} + +__STATIC_INLINE uint32_t nrf_uarte_task_address_get(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task) +{ + return (uint32_t)p_reg + (uint32_t)task; +} + +__STATIC_INLINE void nrf_uarte_configure(NRF_UARTE_Type * p_reg, + nrf_uarte_parity_t parity, + nrf_uarte_hwfc_t hwfc) +{ + p_reg->CONFIG = (uint32_t)parity | (uint32_t)hwfc; +} + +__STATIC_INLINE void nrf_uarte_baudrate_set(NRF_UARTE_Type * p_reg, nrf_uarte_baudrate_t baudrate) +{ + p_reg->BAUDRATE = baudrate; +} + +__STATIC_INLINE void nrf_uarte_tx_buffer_set(NRF_UARTE_Type * p_reg, + uint8_t const * p_buffer, + size_t length) +{ + p_reg->TXD.PTR = (uint32_t)p_buffer; + p_reg->TXD.MAXCNT = length; +} + +__STATIC_INLINE uint32_t nrf_uarte_tx_amount_get(NRF_UARTE_Type * p_reg) +{ + return p_reg->TXD.AMOUNT; +} + +__STATIC_INLINE void nrf_uarte_rx_buffer_set(NRF_UARTE_Type * p_reg, + uint8_t * p_buffer, + size_t length) +{ + p_reg->RXD.PTR = (uint32_t)p_buffer; + p_reg->RXD.MAXCNT = length; +} + +__STATIC_INLINE uint32_t nrf_uarte_rx_amount_get(NRF_UARTE_Type * p_reg) +{ + return p_reg->RXD.AMOUNT; +} +#endif //SUPPRESS_INLINE_IMPLEMENTATION + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif //NRF_UARTE_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_usbd.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_usbd.h new file mode 100644 index 00000000000..c020fc89689 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_usbd.h @@ -0,0 +1,1391 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_USBD_H__ +#define NRF_USBD_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_usbd_hal USBD HAL + * @{ + * @ingroup nrf_usbd + * @brief Hardware access layer for managing the Universal Serial Bus Device (USBD) + * peripheral. + */ + +/** + * @brief USBD tasks + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_USBD_TASK_STARTEPIN0 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[0] ), /**< Captures the EPIN[0].PTR, EPIN[0].MAXCNT and EPIN[0].CONFIG registers values, and enables control endpoint IN 0 to respond to traffic from host */ + NRF_USBD_TASK_STARTEPIN1 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[1] ), /**< Captures the EPIN[1].PTR, EPIN[1].MAXCNT and EPIN[1].CONFIG registers values, and enables data endpoint IN 1 to respond to traffic from host */ + NRF_USBD_TASK_STARTEPIN2 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[2] ), /**< Captures the EPIN[2].PTR, EPIN[2].MAXCNT and EPIN[2].CONFIG registers values, and enables data endpoint IN 2 to respond to traffic from host */ + NRF_USBD_TASK_STARTEPIN3 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[3] ), /**< Captures the EPIN[3].PTR, EPIN[3].MAXCNT and EPIN[3].CONFIG registers values, and enables data endpoint IN 3 to respond to traffic from host */ + NRF_USBD_TASK_STARTEPIN4 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[4] ), /**< Captures the EPIN[4].PTR, EPIN[4].MAXCNT and EPIN[4].CONFIG registers values, and enables data endpoint IN 4 to respond to traffic from host */ + NRF_USBD_TASK_STARTEPIN5 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[5] ), /**< Captures the EPIN[5].PTR, EPIN[5].MAXCNT and EPIN[5].CONFIG registers values, and enables data endpoint IN 5 to respond to traffic from host */ + NRF_USBD_TASK_STARTEPIN6 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[6] ), /**< Captures the EPIN[6].PTR, EPIN[6].MAXCNT and EPIN[6].CONFIG registers values, and enables data endpoint IN 6 to respond to traffic from host */ + NRF_USBD_TASK_STARTEPIN7 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[7] ), /**< Captures the EPIN[7].PTR, EPIN[7].MAXCNT and EPIN[7].CONFIG registers values, and enables data endpoint IN 7 to respond to traffic from host */ + NRF_USBD_TASK_STARTISOIN = offsetof(NRF_USBD_Type, TASKS_STARTISOIN ), /**< Captures the ISOIN.PTR, ISOIN.MAXCNT and ISOIN.CONFIG registers values, and enables sending data on iso endpoint 8 */ + NRF_USBD_TASK_STARTEPOUT0 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[0]), /**< Captures the EPOUT[0].PTR, EPOUT[0].MAXCNT and EPOUT[0].CONFIG registers values, and enables control endpoint 0 to respond to traffic from host */ + NRF_USBD_TASK_STARTEPOUT1 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[1]), /**< Captures the EPOUT[1].PTR, EPOUT[1].MAXCNT and EPOUT[1].CONFIG registers values, and enables data endpoint 1 to respond to traffic from host */ + NRF_USBD_TASK_STARTEPOUT2 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[2]), /**< Captures the EPOUT[2].PTR, EPOUT[2].MAXCNT and EPOUT[2].CONFIG registers values, and enables data endpoint 2 to respond to traffic from host */ + NRF_USBD_TASK_STARTEPOUT3 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[3]), /**< Captures the EPOUT[3].PTR, EPOUT[3].MAXCNT and EPOUT[3].CONFIG registers values, and enables data endpoint 3 to respond to traffic from host */ + NRF_USBD_TASK_STARTEPOUT4 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[4]), /**< Captures the EPOUT[4].PTR, EPOUT[4].MAXCNT and EPOUT[4].CONFIG registers values, and enables data endpoint 4 to respond to traffic from host */ + NRF_USBD_TASK_STARTEPOUT5 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[5]), /**< Captures the EPOUT[5].PTR, EPOUT[5].MAXCNT and EPOUT[5].CONFIG registers values, and enables data endpoint 5 to respond to traffic from host */ + NRF_USBD_TASK_STARTEPOUT6 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[6]), /**< Captures the EPOUT[6].PTR, EPOUT[6].MAXCNT and EPOUT[6].CONFIG registers values, and enables data endpoint 6 to respond to traffic from host */ + NRF_USBD_TASK_STARTEPOUT7 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[7]), /**< Captures the EPOUT[7].PTR, EPOUT[7].MAXCNT and EPOUT[7].CONFIG registers values, and enables data endpoint 7 to respond to traffic from host */ + NRF_USBD_TASK_STARTISOOUT = offsetof(NRF_USBD_Type, TASKS_STARTISOOUT ), /**< Captures the ISOOUT.PTR, ISOOUT.MAXCNT and ISOOUT.CONFIG registers values, and enables receiving of data on iso endpoint 8 */ + NRF_USBD_TASK_EP0RCVOUT = offsetof(NRF_USBD_Type, TASKS_EP0RCVOUT ), /**< Allows OUT data stage on control endpoint 0 */ + NRF_USBD_TASK_EP0STATUS = offsetof(NRF_USBD_Type, TASKS_EP0STATUS ), /**< Allows status stage on control endpoint 0 */ + NRF_USBD_TASK_EP0STALL = offsetof(NRF_USBD_Type, TASKS_EP0STALL ), /**< STALLs data and status stage on control endpoint 0 */ + NRF_USBD_TASK_DRIVEDPDM = offsetof(NRF_USBD_Type, TASKS_DPDMDRIVE ), /**< Forces D+ and D-lines to the state defined in the DPDMVALUE register */ + NRF_USBD_TASK_NODRIVEDPDM = offsetof(NRF_USBD_Type, TASKS_DPDMNODRIVE ), /**< Stops forcing D+ and D- lines to any state (USB engine takes control) */ + /*lint -restore*/ +}nrf_usbd_task_t; + +/** + * @brief USBD events + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_USBD_EVENT_USBRESET = offsetof(NRF_USBD_Type, EVENTS_USBRESET ), /**< Signals that a USB reset condition has been detected on the USB lines */ + NRF_USBD_EVENT_STARTED = offsetof(NRF_USBD_Type, EVENTS_STARTED ), /**< Confirms that the EPIN[n].PTR, EPIN[n].MAXCNT, EPIN[n].CONFIG, or EPOUT[n].PTR, EPOUT[n].MAXCNT and EPOUT[n].CONFIG registers have been captured on all endpoints reported in the EPSTATUS register */ + NRF_USBD_EVENT_ENDEPIN0 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[0] ), /**< The whole EPIN[0] buffer has been consumed. The RAM buffer can be accessed safely by software. */ + NRF_USBD_EVENT_ENDEPIN1 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[1] ), /**< The whole EPIN[1] buffer has been consumed. The RAM buffer can be accessed safely by software. */ + NRF_USBD_EVENT_ENDEPIN2 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[2] ), /**< The whole EPIN[2] buffer has been consumed. The RAM buffer can be accessed safely by software. */ + NRF_USBD_EVENT_ENDEPIN3 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[3] ), /**< The whole EPIN[3] buffer has been consumed. The RAM buffer can be accessed safely by software. */ + NRF_USBD_EVENT_ENDEPIN4 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[4] ), /**< The whole EPIN[4] buffer has been consumed. The RAM buffer can be accessed safely by software. */ + NRF_USBD_EVENT_ENDEPIN5 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[5] ), /**< The whole EPIN[5] buffer has been consumed. The RAM buffer can be accessed safely by software. */ + NRF_USBD_EVENT_ENDEPIN6 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[6] ), /**< The whole EPIN[6] buffer has been consumed. The RAM buffer can be accessed safely by software. */ + NRF_USBD_EVENT_ENDEPIN7 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[7] ), /**< The whole EPIN[7] buffer has been consumed. The RAM buffer can be accessed safely by software. */ + NRF_USBD_EVENT_EP0DATADONE = offsetof(NRF_USBD_Type, EVENTS_EP0DATADONE), /**< An acknowledged data transfer has taken place on the control endpoint */ + NRF_USBD_EVENT_ENDISOIN0 = offsetof(NRF_USBD_Type, EVENTS_ENDISOIN ), /**< The whole ISOIN buffer has been consumed. The RAM buffer can be accessed safely by software. */ + NRF_USBD_EVENT_ENDEPOUT0 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[0]), /**< The whole EPOUT[0] buffer has been consumed. The RAM buffer can be accessed safely by software. */ + NRF_USBD_EVENT_ENDEPOUT1 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[1]), /**< The whole EPOUT[1] buffer has been consumed. The RAM buffer can be accessed safely by software. */ + NRF_USBD_EVENT_ENDEPOUT2 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[2]), /**< The whole EPOUT[2] buffer has been consumed. The RAM buffer can be accessed safely by software. */ + NRF_USBD_EVENT_ENDEPOUT3 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[3]), /**< The whole EPOUT[3] buffer has been consumed. The RAM buffer can be accessed safely by software. */ + NRF_USBD_EVENT_ENDEPOUT4 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[4]), /**< The whole EPOUT[4] buffer has been consumed. The RAM buffer can be accessed safely by software. */ + NRF_USBD_EVENT_ENDEPOUT5 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[5]), /**< The whole EPOUT[5] buffer has been consumed. The RAM buffer can be accessed safely by software. */ + NRF_USBD_EVENT_ENDEPOUT6 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[6]), /**< The whole EPOUT[6] buffer has been consumed. The RAM buffer can be accessed safely by software. */ + NRF_USBD_EVENT_ENDEPOUT7 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[7]), /**< The whole EPOUT[7] buffer has been consumed. The RAM buffer can be accessed safely by software. */ + NRF_USBD_EVENT_ENDISOOUT0 = offsetof(NRF_USBD_Type, EVENTS_ENDISOOUT ), /**< The whole ISOOUT buffer has been consumed. The RAM buffer can be accessed safely by software. */ + NRF_USBD_EVENT_SOF = offsetof(NRF_USBD_Type, EVENTS_SOF ), /**< Signals that a SOF (start of frame) condition has been detected on the USB lines */ + NRF_USBD_EVENT_USBEVENT = offsetof(NRF_USBD_Type, EVENTS_USBEVENT ), /**< An event or an error not covered by specific events has occurred, check EVENTCAUSE register to find the cause */ + NRF_USBD_EVENT_EP0SETUP = offsetof(NRF_USBD_Type, EVENTS_EP0SETUP ), /**< A valid SETUP token has been received (and acknowledged) on the control endpoint */ + NRF_USBD_EVENT_DATAEP = offsetof(NRF_USBD_Type, EVENTS_EPDATA ), /**< A data transfer has occurred on a data endpoint, indicated by the EPDATASTATUS register */ + /*lint -restore*/ +}nrf_usbd_event_t; + +/** + * @brief USBD shorts + */ +typedef enum +{ + NRF_USBD_SHORT_EP0DATADONE_STARTEPIN0_MASK = USBD_SHORTS_EP0DATADONE_STARTEPIN0_Msk , /**< Shortcut between EP0DATADONE event and STARTEPIN0 task */ + NRF_USBD_SHORT_EP0DATADONE_STARTEPOUT0_MASK = USBD_SHORTS_EP0DATADONE_STARTEPOUT0_Msk, /**< Shortcut between EP0DATADONE event and STARTEPOUT0 task */ + NRF_USBD_SHORT_EP0DATADONE_EP0STATUS_MASK = USBD_SHORTS_EP0DATADONE_EP0STATUS_Msk , /**< Shortcut between EP0DATADONE event and EP0STATUS task */ + NRF_USBD_SHORT_ENDEPOUT0_EP0STATUS_MASK = USBD_SHORTS_ENDEPOUT0_EP0STATUS_Msk , /**< Shortcut between ENDEPOUT[0] event and EP0STATUS task */ + NRF_USBD_SHORT_ENDEPOUT0_EP0RCVOUT_MASK = USBD_SHORTS_ENDEPOUT0_EP0RCVOUT_Msk , /**< Shortcut between ENDEPOUT[0] event and EP0RCVOUT task */ +}nrf_usbd_short_mask_t; + +/** + * @brief USBD interrupts + */ +typedef enum +{ + NRF_USBD_INT_USBRESET_MASK = USBD_INTEN_USBRESET_Msk , /**< Enable or disable interrupt for USBRESET event */ + NRF_USBD_INT_STARTED_MASK = USBD_INTEN_STARTED_Msk , /**< Enable or disable interrupt for STARTED event */ + NRF_USBD_INT_ENDEPIN0_MASK = USBD_INTEN_ENDEPIN0_Msk , /**< Enable or disable interrupt for ENDEPIN[0] event */ + NRF_USBD_INT_ENDEPIN1_MASK = USBD_INTEN_ENDEPIN1_Msk , /**< Enable or disable interrupt for ENDEPIN[1] event */ + NRF_USBD_INT_ENDEPIN2_MASK = USBD_INTEN_ENDEPIN2_Msk , /**< Enable or disable interrupt for ENDEPIN[2] event */ + NRF_USBD_INT_ENDEPIN3_MASK = USBD_INTEN_ENDEPIN3_Msk , /**< Enable or disable interrupt for ENDEPIN[3] event */ + NRF_USBD_INT_ENDEPIN4_MASK = USBD_INTEN_ENDEPIN4_Msk , /**< Enable or disable interrupt for ENDEPIN[4] event */ + NRF_USBD_INT_ENDEPIN5_MASK = USBD_INTEN_ENDEPIN5_Msk , /**< Enable or disable interrupt for ENDEPIN[5] event */ + NRF_USBD_INT_ENDEPIN6_MASK = USBD_INTEN_ENDEPIN6_Msk , /**< Enable or disable interrupt for ENDEPIN[6] event */ + NRF_USBD_INT_ENDEPIN7_MASK = USBD_INTEN_ENDEPIN7_Msk , /**< Enable or disable interrupt for ENDEPIN[7] event */ + NRF_USBD_INT_EP0DATADONE_MASK = USBD_INTEN_EP0DATADONE_Msk, /**< Enable or disable interrupt for EP0DATADONE event */ + NRF_USBD_INT_ENDISOIN0_MASK = USBD_INTEN_ENDISOIN_Msk , /**< Enable or disable interrupt for ENDISOIN[0] event */ + NRF_USBD_INT_ENDEPOUT0_MASK = USBD_INTEN_ENDEPOUT0_Msk , /**< Enable or disable interrupt for ENDEPOUT[0] event */ + NRF_USBD_INT_ENDEPOUT1_MASK = USBD_INTEN_ENDEPOUT1_Msk , /**< Enable or disable interrupt for ENDEPOUT[1] event */ + NRF_USBD_INT_ENDEPOUT2_MASK = USBD_INTEN_ENDEPOUT2_Msk , /**< Enable or disable interrupt for ENDEPOUT[2] event */ + NRF_USBD_INT_ENDEPOUT3_MASK = USBD_INTEN_ENDEPOUT3_Msk , /**< Enable or disable interrupt for ENDEPOUT[3] event */ + NRF_USBD_INT_ENDEPOUT4_MASK = USBD_INTEN_ENDEPOUT4_Msk , /**< Enable or disable interrupt for ENDEPOUT[4] event */ + NRF_USBD_INT_ENDEPOUT5_MASK = USBD_INTEN_ENDEPOUT5_Msk , /**< Enable or disable interrupt for ENDEPOUT[5] event */ + NRF_USBD_INT_ENDEPOUT6_MASK = USBD_INTEN_ENDEPOUT6_Msk , /**< Enable or disable interrupt for ENDEPOUT[6] event */ + NRF_USBD_INT_ENDEPOUT7_MASK = USBD_INTEN_ENDEPOUT7_Msk , /**< Enable or disable interrupt for ENDEPOUT[7] event */ + NRF_USBD_INT_ENDISOOUT0_MASK = USBD_INTEN_ENDISOOUT_Msk , /**< Enable or disable interrupt for ENDISOOUT[0] event */ + NRF_USBD_INT_SOF_MASK = USBD_INTEN_SOF_Msk , /**< Enable or disable interrupt for SOF event */ + NRF_USBD_INT_USBEVENT_MASK = USBD_INTEN_USBEVENT_Msk , /**< Enable or disable interrupt for USBEVENT event */ + NRF_USBD_INT_EP0SETUP_MASK = USBD_INTEN_EP0SETUP_Msk , /**< Enable or disable interrupt for EP0SETUP event */ + NRF_USBD_INT_DATAEP_MASK = USBD_INTEN_EPDATA_Msk , /**< Enable or disable interrupt for EPDATA event */ +}nrf_usbd_int_mask_t; + + +/** + * @brief Function for activating a specific USBD task. + * + * @param task Task. + */ +__STATIC_INLINE void nrf_usbd_task_trigger(nrf_usbd_task_t task); + +/** + * @brief Function for returning the address of a specific USBD task register. + * + * @param task Task. + * + * @return Task address. + */ +__STATIC_INLINE uint32_t nrf_usbd_task_address_get(nrf_usbd_task_t task); + +/** + * @brief Function for clearing a specific event. + * + * @param event Event. + */ +__STATIC_INLINE void nrf_usbd_event_clear(nrf_usbd_event_t event); + +/** + * @brief Function for returning the state of a specific event. + * + * @param event Event. + * + * @retval true If the event is set. + * @retval false If the event is not set. + */ +__STATIC_INLINE bool nrf_usbd_event_check(nrf_usbd_event_t event); + +/** + * @brief Function for getting and clearing the state of specific event + * + * This function checks the state of the event and clears it. + * + * @param event Event. + * + * @retval true If the event was set. + * @retval false If the event was not set. + */ +__STATIC_INLINE bool nrf_usbd_event_get_and_clear(nrf_usbd_event_t event); + +/** + * @brief Function for returning the address of a specific USBD event register. + * + * @param event Event. + * + * @return Address. + */ +__STATIC_INLINE uint32_t nrf_usbd_event_address_get(nrf_usbd_event_t event); + +/** + * @brief Function for setting a shortcut. + * + * @param short_mask Shortcuts mask. + */ +__STATIC_INLINE void nrf_usbd_shorts_enable(uint32_t short_mask); + +/** + * @brief Function for clearing shortcuts. + * + * @param short_mask Shortcuts mask. + */ +__STATIC_INLINE void nrf_usbd_shorts_disable(uint32_t short_mask); + +/** + * @brief Get the shorts mask + * + * Function returns shorts register. + * + * @return Flags of currently enabled shortcuts + */ +__STATIC_INLINE uint32_t nrf_usbd_shorts_get(void); + +/** + * @brief Function for enabling selected interrupts. + * + * @param int_mask Interrupts mask. + */ +__STATIC_INLINE void nrf_usbd_int_enable(uint32_t int_mask); + +/** + * @brief Function for retrieving the state of selected interrupts. + * + * @param int_mask Interrupts mask. + * + * @retval true If any of selected interrupts is enabled. + * @retval false If none of selected interrupts is enabled. + */ +__STATIC_INLINE bool nrf_usbd_int_enable_check(uint32_t int_mask); + +/** + * @brief Function for retrieving the information about enabled interrupts. + * + * @return The flags of enabled interrupts. + */ +__STATIC_INLINE uint32_t nrf_usbd_int_enable_get(void); + +/** + * @brief Function for disabling selected interrupts. + * + * @param int_mask Interrupts mask. + */ +__STATIC_INLINE void nrf_usbd_int_disable(uint32_t int_mask); + + +/** @} */ /* End of nrf_usbd_hal */ + + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +/* ------------------------------------------------------------------------------------------------ + * Internal functions + */ + +/** + * @internal + * @brief Internal function for getting task/event register address + * + * @oaram offset Offset of the register from the instance beginning + * + * @attention offset has to be modulo 4 value. In other case we can get hardware fault. + * @return Pointer to the register + */ +__STATIC_INLINE volatile uint32_t* nrf_usbd_getRegPtr(uint32_t offset) +{ + return (volatile uint32_t*)(((uint8_t *)NRF_USBD) + (uint32_t)offset); +} + +/** + * @internal + * @brief Internal function for getting task/event register address - constant version + * + * @oaram offset Offset of the register from the instance beginning + * + * @attention offset has to be modulo 4 value. In other case we can get hardware fault. + * @return Pointer to the register + */ +__STATIC_INLINE volatile const uint32_t* nrf_usbd_getRegPtr_c(uint32_t offset) +{ + return (volatile const uint32_t*)(((uint8_t *)NRF_USBD) + (uint32_t)offset); +} + +/* ------------------------------------------------------------------------------------------------ + * Interface functions definitions + */ + +void nrf_usbd_task_trigger(nrf_usbd_task_t task) +{ + *(nrf_usbd_getRegPtr((uint32_t)task)) = 1UL; + __ISB(); + __DSB(); +} + +uint32_t nrf_usbd_task_address_get(nrf_usbd_task_t task) +{ + return (uint32_t)nrf_usbd_getRegPtr_c((uint32_t)task); +} + +void nrf_usbd_event_clear(nrf_usbd_event_t event) +{ + *(nrf_usbd_getRegPtr((uint32_t)event)) = 0UL; + __ISB(); + __DSB(); +} + +bool nrf_usbd_event_check(nrf_usbd_event_t event) +{ + return (bool)*nrf_usbd_getRegPtr_c((uint32_t)event); +} + +bool nrf_usbd_event_get_and_clear(nrf_usbd_event_t event) +{ + bool ret = nrf_usbd_event_check(event); + if (ret) + { + nrf_usbd_event_clear(event); + } + return ret; +} + +uint32_t nrf_usbd_event_address_get(nrf_usbd_event_t event) +{ + return (uint32_t)nrf_usbd_getRegPtr_c((uint32_t)event); +} + +void nrf_usbd_shorts_enable(uint32_t short_mask) +{ + NRF_USBD->SHORTS |= short_mask; +} + +void nrf_usbd_shorts_disable(uint32_t short_mask) +{ + if (~0U == short_mask) + { + /* Optimized version for "disable all" */ + NRF_USBD->SHORTS = 0; + } + else + { + NRF_USBD->SHORTS &= ~short_mask; + } +} + +uint32_t nrf_usbd_shorts_get(void) +{ + return NRF_USBD->SHORTS; +} + +void nrf_usbd_int_enable(uint32_t int_mask) +{ + NRF_USBD->INTENSET = int_mask; +} + +bool nrf_usbd_int_enable_check(uint32_t int_mask) +{ + return !!(NRF_USBD->INTENSET & int_mask); +} + +uint32_t nrf_usbd_int_enable_get(void) +{ + return NRF_USBD->INTENSET; +} + +void nrf_usbd_int_disable(uint32_t int_mask) +{ + NRF_USBD->INTENCLR = int_mask; +} + +#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ + +/* ------------------------------------------------------------------------------------------------ + * End of automatically generated part + * ------------------------------------------------------------------------------------------------ + */ +/** + * @addtogroup nrf_usbd_hal + * @{ + */ + +/** + * @brief Frame counter size + * + * The number of counts that can be fitted into frame counter + */ +#define NRF_USBD_FRAMECNTR_SIZE \ + ( (USBD_FRAMECNTR_FRAMECNTR_Msk >> USBD_FRAMECNTR_FRAMECNTR_Pos) + 1UL ) +#ifndef USBD_FRAMECNTR_FRAMECNTR_Msk +#error USBD_FRAMECNTR_FRAMECNTR_Msk should be changed into USBD_FRAMECNTR_FRAMECNTR_Msk +#endif + +/** + * @brief First isochronous endpoint number + * + * The number of the first isochronous endpoint + */ +#define NRF_USBD_EPISO_FIRST 8 + +/** + * @brief Total number of IN endpoints + * + * Total number of IN endpoint (including ISOCHRONOUS). + */ +#define NRF_USBD_EPIN_CNT 9 + +/** + * @brief Total number of OUT endpoints + * + * Total number of OUT endpoint (including ISOCHRONOUS). + */ +#define NRF_USBD_EPOUT_CNT 9 + +/** + * @brief Mask of the direction bit in endpoint number + */ +#define NRF_USBD_EP_DIR_Msk (1U << 7) + +/** + * @brief The value of direction bit for IN endpoint direction + */ +#define NRF_USBD_EP_DIR_IN (1U << 7) + +/** + * @brief The value of direction bit for OUT endpoint direction + */ +#define NRF_USBD_EP_DIR_OUT (0U << 7) + +/** + * @brief Macro for making IN endpoint identifier from endpoint number + * + * Macro that sets direction bit to make IN endpoint + * @param[in] epnr Endpoint number + * @return IN Endpoint identifier + */ +#define NRF_USBD_EPIN(epnr) (((uint8_t)(epnr)) | NRF_USBD_EP_DIR_IN) + +/** + * @brief Macro for making OUT endpoint identifier from endpoint number + * + * Macro that sets direction bit to make OUT endpoint + * @param[in] epnr Endpoint number + * @return OUT Endpoint identifier + */ +#define NRF_USBD_EPOUT(epnr) (((uint8_t)(epnr)) | NRF_USBD_EP_DIR_OUT) + +/** + * @brief Macro for extracting the endpoint number from endpoint identifier + * + * Macro that strips out the information about endpoint direction. + * @param[in] ep Endpoint identifier + * @return Endpoint number + */ +#define NRF_USBD_EP_NR_GET(ep) ((uint8_t)(((uint8_t)(ep)) & 0xFU)) + +/** + * @brief Macro for checking endpoint direction + * + * This macro checks if given endpoint has IN direction + * @param ep Endpoint identifier + * @retval true If the endpoint direction is IN + * @retval false If the endpoint direction is OUT + */ +#define NRF_USBD_EPIN_CHECK(ep) ( (((uint8_t)(ep)) & NRF_USBD_EP_DIR_Msk) == NRF_USBD_EP_DIR_IN ) + +/** + * @brief Macro for checking endpoint direction + * + * This macro checks if given endpoint has OUT direction + * @param ep Endpoint identifier + * @retval true If the endpoint direction is OUT + * @retval false If the endpoint direction is IN + */ +#define NRF_USBD_EPOUT_CHECK(ep) ( (((uint8_t)(ep)) & NRF_USBD_EP_DIR_Msk) == NRF_USBD_EP_DIR_OUT ) + +/** + * @brief Macro for checking if endpoint is isochronous + * + * @param ep It can be endpoint identifier or just endpoint number to check + * @retval true The endpoint is isochronous type + * @retval false The endpoint is bulk of interrupt type + */ +#define NRF_USBD_EPISO_CHECK(ep) (NRF_USBD_EP_NR_GET(ep) >= NRF_USBD_EPISO_FIRST) + +/** + * @brief Macro for checking if given number is valid endpoint number + * + * @param ep Endpoint number to check + * @retval true The endpoint is valid + * @retval false The endpoint is not valid + */ +#define NRF_USBD_EP_VALIDATE(ep) ( \ + (NRF_USBD_EPIN_CHECK(ep) && (NRF_USBD_EP_NR_GET(ep) < NRF_USBD_EPIN_CNT)) \ + || \ + (NRF_USBD_EPOUT_CHECK(ep) && (NRF_USBD_EP_NR_GET(ep) < NRF_USBD_EPOUT_CNT)) \ + ) + +/** + * @brief Not isochronous data frame received + * + * Special value returned by @ref nrf_usbd_episoout_size_get function that means that + * data frame was not received at all. + * This allows differentiate between situations when zero size data comes or no data comes at all + * on isochronous endpoint. + */ +#define NRF_USBD_EPISOOUT_NO_DATA ((size_t)(-1)) + +/** + * @brief EVENTCAUSE register bit masks + */ +typedef enum +{ + NRF_USBD_EVENTCAUSE_ISOOUTCRC_MASK = USBD_EVENTCAUSE_ISOOUTCRC_Msk, /**< CRC error was detected on isochronous OUT endpoint 8. */ + NRF_USBD_EVENTCAUSE_SUSPEND_MASK = USBD_EVENTCAUSE_SUSPEND_Msk , /**< Signals that the USB lines have been seen idle long enough for the device to enter suspend. */ + NRF_USBD_EVENTCAUSE_RESUME_MASK = USBD_EVENTCAUSE_RESUME_Msk , /**< Signals that a RESUME condition (K state or activity restart) has been detected on the USB lines. */ + NRF_USBD_EVENTCAUSE_READY_MASK = USBD_EVENTCAUSE_READY_Msk, /**< MAC is ready for normal operation, rised few us after USBD enabling */ + NRF_USBD_EVENTCAUSE_WUREQ_MASK = (1U << 10) /**< The USBD peripheral has exited Low Power mode */ +}nrf_usbd_eventcause_mask_t; + +/** + * @brief DPDMVALUE register + */ +typedef enum +{ + /**Generate Resume signal. Signal is generated for 50 us or 5 ms, + * depending on bus state */ + NRF_USBD_DPDMVALUE_RESUME = USBD_DPDMVALUE_STATE_Resume, + /** D+ Forced high, D- forced low (J state) */ + NRF_USBD_DPDMVALUE_J = USBD_DPDMVALUE_STATE_J, + /** D+ Forced low, D- forced high (K state) */ + NRF_USBD_DPMVALUE_K = USBD_DPDMVALUE_STATE_K +}nrf_usbd_dpdmvalue_t; + +/** + * @brief Dtoggle value or operation + */ +typedef enum +{ + NRF_USBD_DTOGGLE_NOP = USBD_DTOGGLE_VALUE_Nop, /**< No operation - do not change current data toggle on selected endpoint */ + NRF_USBD_DTOGGLE_DATA0 = USBD_DTOGGLE_VALUE_Data0,/**< Data toggle is DATA0 on selected endpoint */ + NRF_USBD_DTOGGLE_DATA1 = USBD_DTOGGLE_VALUE_Data1 /**< Data toggle is DATA1 on selected endpoint */ +}nrf_usbd_dtoggle_t; + +/** + * @brief EPSTATUS bit masks + */ +typedef enum +{ + NRF_USBD_EPSTATUS_EPIN0_MASK = USBD_EPSTATUS_EPIN0_Msk, + NRF_USBD_EPSTATUS_EPIN1_MASK = USBD_EPSTATUS_EPIN1_Msk, + NRF_USBD_EPSTATUS_EPIN2_MASK = USBD_EPSTATUS_EPIN2_Msk, + NRF_USBD_EPSTATUS_EPIN3_MASK = USBD_EPSTATUS_EPIN3_Msk, + NRF_USBD_EPSTATUS_EPIN4_MASK = USBD_EPSTATUS_EPIN4_Msk, + NRF_USBD_EPSTATUS_EPIN5_MASK = USBD_EPSTATUS_EPIN5_Msk, + NRF_USBD_EPSTATUS_EPIN6_MASK = USBD_EPSTATUS_EPIN6_Msk, + NRF_USBD_EPSTATUS_EPIN7_MASK = USBD_EPSTATUS_EPIN7_Msk, + + NRF_USBD_EPSTATUS_EPOUT0_MASK = USBD_EPSTATUS_EPOUT0_Msk, + NRF_USBD_EPSTATUS_EPOUT1_MASK = USBD_EPSTATUS_EPOUT1_Msk, + NRF_USBD_EPSTATUS_EPOUT2_MASK = USBD_EPSTATUS_EPOUT2_Msk, + NRF_USBD_EPSTATUS_EPOUT3_MASK = USBD_EPSTATUS_EPOUT3_Msk, + NRF_USBD_EPSTATUS_EPOUT4_MASK = USBD_EPSTATUS_EPOUT4_Msk, + NRF_USBD_EPSTATUS_EPOUT5_MASK = USBD_EPSTATUS_EPOUT5_Msk, + NRF_USBD_EPSTATUS_EPOUT6_MASK = USBD_EPSTATUS_EPOUT6_Msk, + NRF_USBD_EPSTATUS_EPOUT7_MASK = USBD_EPSTATUS_EPOUT7_Msk, +}nrf_usbd_epstatus_mask_t; + +/** + * @brief DATAEPSTATUS bit masks + */ +typedef enum +{ + NRF_USBD_EPDATASTATUS_EPIN1_MASK = USBD_EPDATASTATUS_EPIN1_Msk, + NRF_USBD_EPDATASTATUS_EPIN2_MASK = USBD_EPDATASTATUS_EPIN2_Msk, + NRF_USBD_EPDATASTATUS_EPIN3_MASK = USBD_EPDATASTATUS_EPIN3_Msk, + NRF_USBD_EPDATASTATUS_EPIN4_MASK = USBD_EPDATASTATUS_EPIN4_Msk, + NRF_USBD_EPDATASTATUS_EPIN5_MASK = USBD_EPDATASTATUS_EPIN5_Msk, + NRF_USBD_EPDATASTATUS_EPIN6_MASK = USBD_EPDATASTATUS_EPIN6_Msk, + NRF_USBD_EPDATASTATUS_EPIN7_MASK = USBD_EPDATASTATUS_EPIN7_Msk, + + NRF_USBD_EPDATASTATUS_EPOUT1_MASK = USBD_EPDATASTATUS_EPOUT1_Msk, + NRF_USBD_EPDATASTATUS_EPOUT2_MASK = USBD_EPDATASTATUS_EPOUT2_Msk, + NRF_USBD_EPDATASTATUS_EPOUT3_MASK = USBD_EPDATASTATUS_EPOUT3_Msk, + NRF_USBD_EPDATASTATUS_EPOUT4_MASK = USBD_EPDATASTATUS_EPOUT4_Msk, + NRF_USBD_EPDATASTATUS_EPOUT5_MASK = USBD_EPDATASTATUS_EPOUT5_Msk, + NRF_USBD_EPDATASTATUS_EPOUT6_MASK = USBD_EPDATASTATUS_EPOUT6_Msk, + NRF_USBD_EPDATASTATUS_EPOUT7_MASK = USBD_EPDATASTATUS_EPOUT7_Msk, +}nrf_usbd_dataepstatus_mask_t; + +/** + * @brief ISOSPLIT configurations + */ +typedef enum +{ + NRF_USBD_ISOSPLIT_OneDir = USBD_ISOSPLIT_SPLIT_OneDir, /**< Full buffer dedicated to either iso IN or OUT */ + NRF_USBD_ISOSPLIT_Half = USBD_ISOSPLIT_SPLIT_HalfIN, /**< Buffer divided in half */ +}nrf_usbd_isosplit_t; + +/** + * @brief Function for enabling USBD + */ +__STATIC_INLINE void nrf_usbd_enable(void); + +/** + * @brief Function for disabling USBD + */ +__STATIC_INLINE void nrf_usbd_disable(void); + +/** + * @brief Function for getting EVENTCAUSE register + * + * @return Flag values defined in @ref nrf_usbd_eventcause_mask_t + */ +__STATIC_INLINE uint32_t nrf_usbd_eventcause_get(void); + +/** + * @brief Function for clearing EVENTCAUSE flags + * + * @param flags Flags defined in @ref nrf_usbd_eventcause_mask_t + */ +__STATIC_INLINE void nrf_usbd_eventcause_clear(uint32_t flags); + +/** + * @brief Function for getting EVENTCAUSE register and clear flags that are set + * + * The safest way to return current EVENTCAUSE register. + * All the flags that are returned would be cleared inside EVENTCAUSE register. + * + * @return Flag values defined in @ref nrf_usbd_eventcause_mask_t + */ +__STATIC_INLINE uint32_t nrf_usbd_eventcause_get_and_clear(void); + +/** + * @brief Function for getting HALTEDEPIN register value + * + * @param ep Endpoint number with IN/OUT flag + * + * @return The value of HALTEDEPIN or HALTEDOUT register for selected endpoint + * + * @note + * Use this function for the response for GetStatus() request to endpoint. + * To check if endpoint is stalled in the code use @ref nrf_usbd_ep_is_stall. + */ +__STATIC_INLINE uint32_t nrf_usbd_haltedep(uint8_t ep); + +/** + * @brief Function for checking if selected endpoint is stalled + * + * Function to be used as a syntax sweeter for @ref nrf_usbd_haltedep. + * + * Also as the isochronous endpoint cannot be halted - it returns always false + * if isochronous endpoint is checked. + * + * @param ep Endpoint number with IN/OUT flag + * + * @return The information if the enepoint is halted. + */ +__STATIC_INLINE bool nrf_usbd_ep_is_stall(uint8_t ep); + +/** + * @brief Function for getting EPSTATUS register value + * + * @return Flag values defined in @ref nrf_usbd_epstatus_mask_t + */ +__STATIC_INLINE uint32_t nrf_usbd_epstatus_get(void); + +/** + * @brief Function for clearing EPSTATUS register value + * + * @param flags Flags defined in @ref nrf_usbd_epstatus_mask_t + */ +__STATIC_INLINE void nrf_usbd_epstatus_clear(uint32_t flags); + +/** + * @brief Function for getting and clearing EPSTATUS register value + * + * Function clears all flags in register set before returning its value. + * @return Flag values defined in @ref nrf_usbd_epstatus_mask_t + */ +__STATIC_INLINE uint32_t nrf_usbd_epstatus_get_and_clear(void); + +/** + * @brief Function for getting DATAEPSTATUS register value + * + * @return Flag values defined in @ref nrf_usbd_dataepstatus_mask_t + */ +__STATIC_INLINE uint32_t nrf_usbd_epdatastatus_get(void); + +/** + * @brief Function for clearing DATAEPSTATUS register value + * + * @param flags Flags defined in @ref nrf_usbd_dataepstatus_mask_t + */ +__STATIC_INLINE void nrf_usbd_epdatastatus_clear(uint32_t flags); + +/** + * @brief Function for getting and clearing DATAEPSTATUS register value + * + * Function clears all flags in register set before returning its value. + * @return Flag values defined in @ref nrf_usbd_dataepstatus_mask_t + */ +__STATIC_INLINE uint32_t nrf_usbd_epdatastatus_get_and_clear(void); + +/** + * @name Setup command frame functions + * + * Functions for setup command frame parts access + * @{ + */ + /** + * @brief Function for reading BMREQUESTTYPE - part of SETUP packet + * + * @return the value of BREQUESTTYPE on last received SETUP frame + */ + __STATIC_INLINE uint8_t nrf_usbd_setup_bmrequesttype_get(void); + + /** + * @brief Function for reading BMREQUEST - part of SETUP packet + * + * @return the value of BREQUEST on last received SETUP frame + */ + __STATIC_INLINE uint8_t nrf_usbd_setup_brequest_get(void); + + /** + * @brief Function for reading WVALUE - part of SETUP packet + * + * @return the value of WVALUE on last received SETUP frame + */ + __STATIC_INLINE uint16_t nrf_usbd_setup_wvalue_get(void); + + /** + * @brief Function for reading WINDEX - part of SETUP packet + * + * @return the value of WINDEX on last received SETUP frame + */ + __STATIC_INLINE uint16_t nrf_usbd_setup_windex_get(void); + + /** + * @brief Function for reading WLENGTH - part of SETUP packet + * + * @return the value of WLENGTH on last received SETUP frame + */ + __STATIC_INLINE uint16_t nrf_usbd_setup_wlength_get(void); +/** @} */ + +/** + * @brief Function for getting number of received bytes on selected endpoint + * + * @param ep Endpoint identifier. + * + * @return Number of received bytes. + * + * @note This function may be used on Bulk/Interrupt and Isochronous endpoints. + * @note For the function that returns different value for ISOOUT zero transfer or no transfer at all, + * see @ref nrf_usbd_episoout_size_get function. This function would return 0 for both cases. + */ +__STATIC_INLINE size_t nrf_usbd_epout_size_get(uint8_t ep); + +/** + * @brief Function for getting number of received bytes on isochronous endpoint. + * + * @param ep Endpoint identifier, has to be isochronous out endpoint. + * + * @return Number of bytes received or @ref NRF_USBD_EPISOOUT_NO_DATA + */ +__STATIC_INLINE size_t nrf_usbd_episoout_size_get(uint8_t ep); + +/** + * @brief Function for clearing out endpoint to accept any new incoming traffic + * + * @param ep ep Endpoint identifier. Only OUT Interrupt/Bulk endpoints are accepted. + */ +__STATIC_INLINE void nrf_usbd_epout_clear(uint8_t ep); + +/** + * @brief Function for enabling USB pullup + */ +__STATIC_INLINE void nrf_usbd_pullup_enable(void); + +/** + * @brief Function for disabling USB pullup + */ +__STATIC_INLINE void nrf_usbd_pullup_disable(void); + +/** + * @brief Function for returning current USB pullup state + * + * @retval true USB pullup is enabled + * @retval false USB pullup is disabled + */ +__STATIC_INLINE bool nrf_usbd_pullup_check(void); + +/** + * @brief Function for configuring the value to be forced on the bus on DRIVEDPDM task + * + * Selected state would be forced on the bus when @ref NRF_USBD_TASK_DRIVEDPDM is set. + * The state would be removed from the bus on @ref NRF_USBD_TASK_NODRIVEDPDM and + * the control would be returned to the USBD peripheral. + * @param val State to be set + */ +__STATIC_INLINE void nrf_usbd_dpdmvalue_set(nrf_usbd_dpdmvalue_t val); + +/** + * @brief Function for setting data toggle + * + * Configuration of current state of data toggling + * @param ep Endpoint number with the information about its direction + * @param op Operation to execute + */ +__STATIC_INLINE void nrf_usbd_dtoggle_set(uint8_t ep, nrf_usbd_dtoggle_t op); + +/** + * @brief Function for getting data toggle + * + * Get the current state of data toggling + * @param ep Endpoint number to return the information about current data toggling + * @retval NRF_USBD_DTOGGLE_DATA0 Data toggle is DATA0 on selected endpoint + * @retval NRF_USBD_DTOGGLE_DATA1 Data toggle is DATA1 on selected endpoint + */ +__STATIC_INLINE nrf_usbd_dtoggle_t nrf_usbd_dtoggle_get(uint8_t ep); + +/** + * @brief Function for checking if endpoint is enabled + * + * @param ep Endpoint id to check + * + * @retval true Endpoint is enabled + * @retval false Endpoint is disabled + */ +__STATIC_INLINE bool nrf_usbd_ep_enable_check(uint8_t ep); + +/** + * @brief Function for enabling selected endpoint + * + * Enabled endpoint responds for the tokens on the USB bus + * + * @param ep Endpoint id to enable + */ +__STATIC_INLINE void nrf_usbd_ep_enable(uint8_t ep); + +/** + * @brief Function for disabling selected endpoint + * + * Disabled endpoint does not respond for the tokens on the USB bus + * + * @param ep Endpoint id to disable + */ +__STATIC_INLINE void nrf_usbd_ep_disable(uint8_t ep); + +/** + * @brief Function for disabling all endpoints + * + * Auxiliary function to simply disable all aviable endpoints. + * It lefts only EP0 IN and OUT enabled. + */ +__STATIC_INLINE void nrf_usbd_ep_all_disable(void); + +/** + * @brief Function for stalling selected endpoint + * + * @param ep Endpoint identifier + * @note This function cannot be called on isochronous endpoint + */ +__STATIC_INLINE void nrf_usbd_ep_stall(uint8_t ep); + +/** + * @brief Function for unstalling selected endpoint + * + * @param ep Endpoint identifier + * @note This function cannot be called on isochronous endpoint + */ +__STATIC_INLINE void nrf_usbd_ep_unstall(uint8_t ep); + +/** + * @brief Function for configuration of isochronous buffer splitting + * + * Configure isochronous buffer splitting between IN and OUT endpoints. + * + * @param split Required configuration + */ +__STATIC_INLINE void nrf_usbd_isosplit_set(nrf_usbd_isosplit_t split); + +/** + * @brief Function for getting the isochronous buffer splitting configuration + * + * Get the current isochronous buffer splitting configuration. + * + * @return Current configuration + */ +__STATIC_INLINE nrf_usbd_isosplit_t nrf_usbd_isosplit_get(void); + +/** + * @brief Function for getting current frame counter + * + * @return Current frame counter + */ +__STATIC_INLINE uint32_t nrf_usbd_framecntr_get(void); + +/** + * @brief Function for entering into low power mode + * + * After this function is called the clock source from the USBD is disconnected internally. + * After this function is called most of the USBD registers cannot be accessed anymore. + * + * @sa nrf_usbd_lowpower_disable + * @sa nrf_usbd_lowpower_check + */ +__STATIC_INLINE void nrf_usbd_lowpower_enable(void); + +/** + * @brief Function for exiting from low power mode + * + * After this function is called the clock source for the USBD is connected internally. + * The @ref NRF_USBD_EVENTCAUSE_WUREQ_MASK event would be generated and + * then the USBD registers may be accessed. + * + * @sa nrf_usbd_lowpower_enable + * @sa nrf_usbd_lowpower_check + */ +__STATIC_INLINE void nrf_usbd_lowpower_disable(void); + +/** + * @brief Function for checking the state of the low power mode + * + * @retval true USBD is in low power mode + * @retval false USBD is not in low power mode + */ +__STATIC_INLINE bool nrf_usbd_lowpower_check(void); + +/** + * @brief Function for configuring EasyDMA channel + * + * Configures EasyDMA for the transfer. + * + * @param ep Endpoint identifier (with direction) + * @param ptr Pointer to the data + * @param maxcnt Number of bytes to transfer + */ +__STATIC_INLINE void nrf_usbd_ep_easydma_set(uint8_t ep, uint32_t ptr, uint32_t maxcnt); + +/** + * @brief Function for getting number of transferred bytes + * + * Get number of transferred bytes in the last transaction + * + * @param ep Endpoint identifier + * + * @return The content of the AMOUNT register + */ +__STATIC_INLINE uint32_t nrf_usbd_ep_amount_get(uint8_t ep); + + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +void nrf_usbd_enable(void) +{ +#ifdef NRF_FPGA_IMPLEMENTATION + *(volatile uint32_t *)0x400005F4 = 3; + __ISB(); + __DSB(); + *(volatile uint32_t *)0x400005F0 = 3; + __ISB(); + __DSB(); +#endif + + NRF_USBD->ENABLE = USBD_ENABLE_ENABLE_Enabled << USBD_ENABLE_ENABLE_Pos; + __ISB(); + __DSB(); +} + +void nrf_usbd_disable(void) +{ + NRF_USBD->ENABLE = USBD_ENABLE_ENABLE_Disabled << USBD_ENABLE_ENABLE_Pos; + __ISB(); + __DSB(); +} + +uint32_t nrf_usbd_eventcause_get(void) +{ + return NRF_USBD->EVENTCAUSE; +} + +void nrf_usbd_eventcause_clear(uint32_t flags) +{ + NRF_USBD->EVENTCAUSE = flags; + __ISB(); + __DSB(); +} + +uint32_t nrf_usbd_eventcause_get_and_clear(void) +{ + uint32_t ret; + ret = nrf_usbd_eventcause_get(); + nrf_usbd_eventcause_clear(ret); + __ISB(); + __DSB(); + return ret; +} + +uint32_t nrf_usbd_haltedep(uint8_t ep) +{ + uint8_t epnr = NRF_USBD_EP_NR_GET(ep); + if (NRF_USBD_EPIN_CHECK(ep)) + { + NRFX_ASSERT(epnr < ARRAY_SIZE(NRF_USBD->HALTED.EPIN)); + return NRF_USBD->HALTED.EPIN[epnr]; + } + else + { + NRFX_ASSERT(epnr < ARRAY_SIZE(NRF_USBD->HALTED.EPOUT)); + return NRF_USBD->HALTED.EPOUT[epnr]; + } +} + +bool nrf_usbd_ep_is_stall(uint8_t ep) +{ + if (NRF_USBD_EPISO_CHECK(ep)) + return false; + return USBD_HALTED_EPOUT_GETSTATUS_Halted == nrf_usbd_haltedep(ep); +} + +uint32_t nrf_usbd_epstatus_get(void) +{ + return NRF_USBD->EPSTATUS; +} + +void nrf_usbd_epstatus_clear(uint32_t flags) +{ + NRF_USBD->EPSTATUS = flags; + __ISB(); + __DSB(); +} + +uint32_t nrf_usbd_epstatus_get_and_clear(void) +{ + uint32_t ret; + ret = nrf_usbd_epstatus_get(); + nrf_usbd_epstatus_clear(ret); + return ret; +} + +uint32_t nrf_usbd_epdatastatus_get(void) +{ + return NRF_USBD->EPDATASTATUS; +} + +void nrf_usbd_epdatastatus_clear(uint32_t flags) +{ + NRF_USBD->EPDATASTATUS = flags; + __ISB(); + __DSB(); +} + +uint32_t nrf_usbd_epdatastatus_get_and_clear(void) +{ + uint32_t ret; + ret = nrf_usbd_epdatastatus_get(); + nrf_usbd_epdatastatus_clear(ret); + __ISB(); + __DSB(); + return ret; +} + +uint8_t nrf_usbd_setup_bmrequesttype_get(void) +{ + return (uint8_t)(NRF_USBD->BMREQUESTTYPE); +} + +uint8_t nrf_usbd_setup_brequest_get(void) +{ + return (uint8_t)(NRF_USBD->BREQUEST); +} + +uint16_t nrf_usbd_setup_wvalue_get(void) +{ + const uint16_t val = NRF_USBD->WVALUEL; + return (uint16_t)(val | ((NRF_USBD->WVALUEH) << 8)); +} + +uint16_t nrf_usbd_setup_windex_get(void) +{ + const uint16_t val = NRF_USBD->WINDEXL; + return (uint16_t)(val | ((NRF_USBD->WINDEXH) << 8)); +} + +uint16_t nrf_usbd_setup_wlength_get(void) +{ + const uint16_t val = NRF_USBD->WLENGTHL; + return (uint16_t)(val | ((NRF_USBD->WLENGTHH) << 8)); +} + +size_t nrf_usbd_epout_size_get(uint8_t ep) +{ + NRFX_ASSERT(NRF_USBD_EP_VALIDATE(ep)); + NRFX_ASSERT(NRF_USBD_EPOUT_CHECK(ep)); + if (NRF_USBD_EPISO_CHECK(ep)) + { + size_t size_isoout = NRF_USBD->SIZE.ISOOUT; + if ((size_isoout & USBD_SIZE_ISOOUT_ZERO_Msk) == (USBD_SIZE_ISOOUT_ZERO_ZeroData << USBD_SIZE_ISOOUT_ZERO_Pos)) + { + size_isoout = 0; + } + return size_isoout; + } + + NRFX_ASSERT(NRF_USBD_EP_NR_GET(ep) < ARRAY_SIZE(NRF_USBD->SIZE.EPOUT)); + return NRF_USBD->SIZE.EPOUT[NRF_USBD_EP_NR_GET(ep)]; +} + +size_t nrf_usbd_episoout_size_get(uint8_t ep) +{ + NRFX_ASSERT(NRF_USBD_EP_VALIDATE(ep)); + NRFX_ASSERT(NRF_USBD_EPOUT_CHECK(ep)); + NRFX_ASSERT(NRF_USBD_EPISO_CHECK(ep)); + + size_t size_isoout = NRF_USBD->SIZE.ISOOUT; + if (size_isoout == 0) + { + size_isoout = NRF_USBD_EPISOOUT_NO_DATA; + } + else if ((size_isoout & USBD_SIZE_ISOOUT_ZERO_Msk) == (USBD_SIZE_ISOOUT_ZERO_ZeroData << USBD_SIZE_ISOOUT_ZERO_Pos)) + { + size_isoout = 0; + } + return size_isoout; +} + +void nrf_usbd_epout_clear(uint8_t ep) +{ + NRFX_ASSERT(NRF_USBD_EPOUT_CHECK(ep) && (NRF_USBD_EP_NR_GET(ep) < ARRAY_SIZE(NRF_USBD->SIZE.EPOUT))); + NRF_USBD->SIZE.EPOUT[NRF_USBD_EP_NR_GET(ep)] = 0; + __ISB(); + __DSB(); +} + +void nrf_usbd_pullup_enable(void) +{ + NRF_USBD->USBPULLUP = USBD_USBPULLUP_CONNECT_Enabled << USBD_USBPULLUP_CONNECT_Pos; + __ISB(); + __DSB(); +} + +void nrf_usbd_pullup_disable(void) +{ + NRF_USBD->USBPULLUP = USBD_USBPULLUP_CONNECT_Disabled << USBD_USBPULLUP_CONNECT_Pos; + __ISB(); + __DSB(); +} + +bool nrf_usbd_pullup_check(void) +{ + return NRF_USBD->USBPULLUP == (USBD_USBPULLUP_CONNECT_Enabled << USBD_USBPULLUP_CONNECT_Pos); +} + +void nrf_usbd_dpdmvalue_set(nrf_usbd_dpdmvalue_t val) +{ + NRF_USBD->DPDMVALUE = ((uint32_t)val) << USBD_DPDMVALUE_STATE_Pos; +} + +void nrf_usbd_dtoggle_set(uint8_t ep, nrf_usbd_dtoggle_t op) +{ + NRFX_ASSERT(NRF_USBD_EP_VALIDATE(ep)); + NRFX_ASSERT(!NRF_USBD_EPISO_CHECK(ep)); + NRF_USBD->DTOGGLE = ep | (NRF_USBD_DTOGGLE_NOP << USBD_DTOGGLE_VALUE_Pos); + __DSB(); + NRF_USBD->DTOGGLE = ep | (op << USBD_DTOGGLE_VALUE_Pos); + __ISB(); + __DSB(); +} + +nrf_usbd_dtoggle_t nrf_usbd_dtoggle_get(uint8_t ep) +{ + uint32_t retval; + /* Select the endpoint to read */ + NRF_USBD->DTOGGLE = ep | (NRF_USBD_DTOGGLE_NOP << USBD_DTOGGLE_VALUE_Pos); + retval = ((NRF_USBD->DTOGGLE) & USBD_DTOGGLE_VALUE_Msk) >> USBD_DTOGGLE_VALUE_Pos; + return (nrf_usbd_dtoggle_t)retval; +} + +bool nrf_usbd_ep_enable_check(uint8_t ep) +{ + NRFX_ASSERT(NRF_USBD_EP_VALIDATE(ep)); + uint8_t epnr = NRF_USBD_EP_NR_GET(ep); + + if (NRF_USBD_EPIN_CHECK(ep)) + { + return 0 != (NRF_USBD->EPINEN & (1UL << epnr)); + } + else + { + return 0 != (NRF_USBD->EPOUTEN & (1UL << epnr)); + } +} + +void nrf_usbd_ep_enable(uint8_t ep) +{ + NRFX_ASSERT(NRF_USBD_EP_VALIDATE(ep)); + uint8_t epnr = NRF_USBD_EP_NR_GET(ep); + + if (NRF_USBD_EPIN_CHECK(ep)) + { + NRF_USBD->EPINEN |= 1UL << epnr; + } + else + { + NRF_USBD->EPOUTEN |= 1UL << epnr; + } + __ISB(); + __DSB(); +} + +void nrf_usbd_ep_disable(uint8_t ep) +{ + NRFX_ASSERT(NRF_USBD_EP_VALIDATE(ep)); + uint8_t epnr = NRF_USBD_EP_NR_GET(ep); + + if (NRF_USBD_EPIN_CHECK(ep)) + { + NRF_USBD->EPINEN &= ~(1UL << epnr); + } + else + { + NRF_USBD->EPOUTEN &= ~(1UL << epnr); + } + __ISB(); + __DSB(); +} + +void nrf_usbd_ep_all_disable(void) +{ + NRF_USBD->EPINEN = USBD_EPINEN_IN0_Enable << USBD_EPINEN_IN0_Pos; + NRF_USBD->EPOUTEN = USBD_EPOUTEN_OUT0_Enable << USBD_EPOUTEN_OUT0_Pos; + __ISB(); + __DSB(); +} + +void nrf_usbd_ep_stall(uint8_t ep) +{ + NRFX_ASSERT(!NRF_USBD_EPISO_CHECK(ep)); + NRF_USBD->EPSTALL = (USBD_EPSTALL_STALL_Stall << USBD_EPSTALL_STALL_Pos) | ep; + __ISB(); + __DSB(); +} + +void nrf_usbd_ep_unstall(uint8_t ep) +{ + NRFX_ASSERT(!NRF_USBD_EPISO_CHECK(ep)); + NRF_USBD->EPSTALL = (USBD_EPSTALL_STALL_UnStall << USBD_EPSTALL_STALL_Pos) | ep; + __ISB(); + __DSB(); +} + +void nrf_usbd_isosplit_set(nrf_usbd_isosplit_t split) +{ + NRF_USBD->ISOSPLIT = split << USBD_ISOSPLIT_SPLIT_Pos; +} + +nrf_usbd_isosplit_t nrf_usbd_isosplit_get(void) +{ + return (nrf_usbd_isosplit_t) + (((NRF_USBD->ISOSPLIT) & USBD_ISOSPLIT_SPLIT_Msk) >> USBD_ISOSPLIT_SPLIT_Pos); +} + +uint32_t nrf_usbd_framecntr_get(void) +{ + return NRF_USBD->FRAMECNTR; +} + +void nrf_usbd_lowpower_enable(void) +{ + NRF_USBD->LOWPOWER = USBD_LOWPOWER_LOWPOWER_LowPower << USBD_LOWPOWER_LOWPOWER_Pos; +} + +void nrf_usbd_lowpower_disable(void) +{ + NRF_USBD->LOWPOWER = USBD_LOWPOWER_LOWPOWER_ForceNormal << USBD_LOWPOWER_LOWPOWER_Pos; +} + +bool nrf_usbd_lowpower_check(void) +{ + return (NRF_USBD->LOWPOWER != (USBD_LOWPOWER_LOWPOWER_ForceNormal << USBD_LOWPOWER_LOWPOWER_Pos)); +} + + +void nrf_usbd_ep_easydma_set(uint8_t ep, uint32_t ptr, uint32_t maxcnt) +{ + if (NRF_USBD_EPIN_CHECK(ep)) + { + if (NRF_USBD_EPISO_CHECK(ep)) + { + NRF_USBD->ISOIN.PTR = ptr; + NRF_USBD->ISOIN.MAXCNT = maxcnt; + } + else + { + uint8_t epnr = NRF_USBD_EP_NR_GET(ep); + NRFX_ASSERT(epnr < ARRAY_SIZE(NRF_USBD->EPIN)); + NRF_USBD->EPIN[epnr].PTR = ptr; + NRF_USBD->EPIN[epnr].MAXCNT = maxcnt; + } + } + else + { + if (NRF_USBD_EPISO_CHECK(ep)) + { + NRF_USBD->ISOOUT.PTR = ptr; + NRF_USBD->ISOOUT.MAXCNT = maxcnt; + } + else + { + uint8_t epnr = NRF_USBD_EP_NR_GET(ep); + NRFX_ASSERT(epnr < ARRAY_SIZE(NRF_USBD->EPOUT)); + NRF_USBD->EPOUT[epnr].PTR = ptr; + NRF_USBD->EPOUT[epnr].MAXCNT = maxcnt; + } + } +} + +uint32_t nrf_usbd_ep_amount_get(uint8_t ep) +{ + uint32_t ret; + + if (NRF_USBD_EPIN_CHECK(ep)) + { + if (NRF_USBD_EPISO_CHECK(ep)) + { + ret = NRF_USBD->ISOIN.AMOUNT; + } + else + { + uint8_t epnr = NRF_USBD_EP_NR_GET(ep); + NRFX_ASSERT(epnr < ARRAY_SIZE(NRF_USBD->EPOUT)); + ret = NRF_USBD->EPIN[epnr].AMOUNT; + } + } + else + { + if (NRF_USBD_EPISO_CHECK(ep)) + { + ret = NRF_USBD->ISOOUT.AMOUNT; + } + else + { + uint8_t epnr = NRF_USBD_EP_NR_GET(ep); + NRFX_ASSERT(epnr < ARRAY_SIZE(NRF_USBD->EPOUT)); + ret = NRF_USBD->EPOUT[epnr].AMOUNT; + } + } + + return ret; +} + +#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_USBD_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_wdt.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_wdt.h new file mode 100644 index 00000000000..44157b38d16 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_wdt.h @@ -0,0 +1,333 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_WDT_H__ +#define NRF_WDT_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_wdt_hal WDT HAL + * @{ + * @ingroup nrf_wdt + * @brief Hardware access layer for managing the Watchdog Timer (WDT) peripheral. + */ + +#define NRF_WDT_CHANNEL_NUMBER 0x8UL +#define NRF_WDT_RR_VALUE 0x6E524635UL /* Fixed value, shouldn't be modified.*/ + +#define NRF_WDT_TASK_SET 1UL +#define NRF_WDT_EVENT_CLEAR 0UL + +/** + * @enum nrf_wdt_task_t + * @brief WDT tasks. + */ +typedef enum +{ + /*lint -save -e30 -esym(628,__INTADDR__)*/ + NRF_WDT_TASK_START = offsetof(NRF_WDT_Type, TASKS_START), /**< Task for starting WDT. */ + /*lint -restore*/ +} nrf_wdt_task_t; + +/** + * @enum nrf_wdt_event_t + * @brief WDT events. + */ +typedef enum +{ + /*lint -save -e30*/ + NRF_WDT_EVENT_TIMEOUT = offsetof(NRF_WDT_Type, EVENTS_TIMEOUT), /**< Event from WDT time-out. */ + /*lint -restore*/ +} nrf_wdt_event_t; + +/** + * @enum nrf_wdt_behaviour_t + * @brief WDT behavior in CPU SLEEP or HALT mode. + */ +typedef enum +{ + NRF_WDT_BEHAVIOUR_RUN_SLEEP = WDT_CONFIG_SLEEP_Msk, /**< WDT will run when CPU is in SLEEP mode. */ + NRF_WDT_BEHAVIOUR_RUN_HALT = WDT_CONFIG_HALT_Msk, /**< WDT will run when CPU is in HALT mode. */ + NRF_WDT_BEHAVIOUR_RUN_SLEEP_HALT = WDT_CONFIG_SLEEP_Msk | WDT_CONFIG_HALT_Msk, /**< WDT will run when CPU is in SLEEP or HALT mode. */ + NRF_WDT_BEHAVIOUR_PAUSE_SLEEP_HALT = 0, /**< WDT will be paused when CPU is in SLEEP or HALT mode. */ +} nrf_wdt_behaviour_t; + +/** + * @enum nrf_wdt_rr_register_t + * @brief WDT reload request registers. + */ +typedef enum +{ + NRF_WDT_RR0 = 0, /**< Reload request register 0. */ + NRF_WDT_RR1, /**< Reload request register 1. */ + NRF_WDT_RR2, /**< Reload request register 2. */ + NRF_WDT_RR3, /**< Reload request register 3. */ + NRF_WDT_RR4, /**< Reload request register 4. */ + NRF_WDT_RR5, /**< Reload request register 5. */ + NRF_WDT_RR6, /**< Reload request register 6. */ + NRF_WDT_RR7 /**< Reload request register 7. */ +} nrf_wdt_rr_register_t; + +/** + * @enum nrf_wdt_int_mask_t + * @brief WDT interrupts. + */ +typedef enum +{ + NRF_WDT_INT_TIMEOUT_MASK = WDT_INTENSET_TIMEOUT_Msk, /**< WDT interrupt from time-out event. */ +} nrf_wdt_int_mask_t; + +/** + * @brief Function for configuring the watchdog behavior when the CPU is sleeping or halted. + * + * @param behaviour Watchdog behavior when CPU is in SLEEP or HALT mode. + */ +__STATIC_INLINE void nrf_wdt_behaviour_set(nrf_wdt_behaviour_t behaviour) +{ + NRF_WDT->CONFIG = behaviour; +} + + +/** + * @brief Function for starting the watchdog. + * + * @param[in] task Task. + */ +__STATIC_INLINE void nrf_wdt_task_trigger(nrf_wdt_task_t task) +{ + *((volatile uint32_t *)((uint8_t *)NRF_WDT + task)) = NRF_WDT_TASK_SET; +} + + +/** + * @brief Function for clearing the WDT event. + * + * @param[in] event Event. + */ +__STATIC_INLINE void nrf_wdt_event_clear(nrf_wdt_event_t event) +{ + *((volatile uint32_t *)((uint8_t *)NRF_WDT + (uint32_t)event)) = NRF_WDT_EVENT_CLEAR; +#if __CORTEX_M == 0x04 + volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_WDT + (uint32_t)event)); + (void)dummy; +#endif +} + + +/** + * @brief Function for retrieving the state of the WDT event. + * + * @param[in] event Event. + * + * @retval true If the event is set. + * @retval false If the event is not set. + */ +__STATIC_INLINE bool nrf_wdt_event_check(nrf_wdt_event_t event) +{ + return (bool)*((volatile uint32_t *)((uint8_t *)NRF_WDT + event)); +} + + +/** + * @brief Function for enabling a specific interrupt. + * + * @param[in] int_mask Interrupt. + */ +__STATIC_INLINE void nrf_wdt_int_enable(uint32_t int_mask) +{ + NRF_WDT->INTENSET = int_mask; +} + + +/** + * @brief Function for retrieving the state of given interrupt. + * + * @param[in] int_mask Interrupt. + * + * @retval true Interrupt is enabled. + * @retval false Interrupt is not enabled. + */ +__STATIC_INLINE bool nrf_wdt_int_enable_check(uint32_t int_mask) +{ + return (bool)(NRF_WDT->INTENSET & int_mask); +} + + +/** + * @brief Function for disabling a specific interrupt. + * + * @param[in] int_mask Interrupt. + */ +__STATIC_INLINE void nrf_wdt_int_disable(uint32_t int_mask) +{ + NRF_WDT->INTENCLR = int_mask; +} + + +/** + * @brief Function for returning the address of a specific WDT task register. + * + * @param[in] task Task. + */ +__STATIC_INLINE uint32_t nrf_wdt_task_address_get(nrf_wdt_task_t task) +{ + return ((uint32_t)NRF_WDT + task); +} + + +/** + * @brief Function for returning the address of a specific WDT event register. + * + * @param[in] event Event. + * + * @retval address of requested event register + */ +__STATIC_INLINE uint32_t nrf_wdt_event_address_get(nrf_wdt_event_t event) +{ + return ((uint32_t)NRF_WDT + event); +} + + +/** + * @brief Function for retrieving the watchdog status. + * + * @retval true If the watchdog is started. + * @retval false If the watchdog is not started. + */ +__STATIC_INLINE bool nrf_wdt_started(void) +{ + return (bool)(NRF_WDT->RUNSTATUS); +} + + +/** + * @brief Function for retrieving the watchdog reload request status. + * + * @param[in] rr_register Reload request register to check. + * + * @retval true If a reload request is running. + * @retval false If no reload request is running. + */ +__STATIC_INLINE bool nrf_wdt_request_status(nrf_wdt_rr_register_t rr_register) +{ + return (bool)(((NRF_WDT->REQSTATUS) >> rr_register) & 0x1UL); +} + + +/** + * @brief Function for setting the watchdog reload value. + * + * @param[in] reload_value Watchdog counter initial value. + */ +__STATIC_INLINE void nrf_wdt_reload_value_set(uint32_t reload_value) +{ + NRF_WDT->CRV = reload_value; +} + + +/** + * @brief Function for retrieving the watchdog reload value. + * + * @retval Reload value. + */ +__STATIC_INLINE uint32_t nrf_wdt_reload_value_get(void) +{ + return (uint32_t)NRF_WDT->CRV; +} + + +/** + * @brief Function for enabling a specific reload request register. + * + * @param[in] rr_register Reload request register to enable. + */ +__STATIC_INLINE void nrf_wdt_reload_request_enable(nrf_wdt_rr_register_t rr_register) +{ + NRF_WDT->RREN |= 0x1UL << rr_register; +} + + +/** + * @brief Function for disabling a specific reload request register. + * + * @param[in] rr_register Reload request register to disable. + */ +__STATIC_INLINE void nrf_wdt_reload_request_disable(nrf_wdt_rr_register_t rr_register) +{ + NRF_WDT->RREN &= ~(0x1UL << rr_register); +} + + +/** + * @brief Function for retrieving the status of a specific reload request register. + * + * @param[in] rr_register Reload request register to check. + * + * @retval true If the reload request register is enabled. + * @retval false If the reload request register is not enabled. + */ +__STATIC_INLINE bool nrf_wdt_reload_request_is_enabled(nrf_wdt_rr_register_t rr_register) +{ + return (bool)(NRF_WDT->RREN & (0x1UL << rr_register)); +} + + +/** + * @brief Function for setting a specific reload request register. + * + * @param[in] rr_register Reload request register to set. + */ +__STATIC_INLINE void nrf_wdt_reload_request_set(nrf_wdt_rr_register_t rr_register) +{ + NRF_WDT->RR[rr_register] = NRF_WDT_RR_VALUE; +} + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/compiler_abstraction.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/compiler_abstraction.h new file mode 100644 index 00000000000..73da016d8b3 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/compiler_abstraction.h @@ -0,0 +1,155 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +#ifndef _COMPILER_ABSTRACTION_H +#define _COMPILER_ABSTRACTION_H + +/*lint ++flb "Enter library region" */ + +#if defined ( __CC_ARM ) + + #ifndef __ASM + #define __ASM __asm + #endif + + #ifndef __INLINE + #define __INLINE __inline + #endif + + #ifndef __WEAK + #define __WEAK __weak + #endif + + #ifndef __ALIGN + #define __ALIGN(n) __align(n) + #endif + + #ifndef __PACKED + #define __PACKED __packed + #endif + + #define GET_SP() __current_sp() + +#elif defined ( __ICCARM__ ) + + #ifndef __ASM + #define __ASM __asm + #endif + + #ifndef __INLINE + #define __INLINE inline + #endif + + #ifndef __WEAK + #define __WEAK __weak + #endif + + #ifndef __ALIGN + #define STRING_PRAGMA(x) _Pragma(#x) + #define __ALIGN(n) STRING_PRAGMA(data_alignment = n) + #endif + + #ifndef __PACKED + #define __PACKED __packed + #endif + + #define GET_SP() __get_SP() + +#elif defined ( __GNUC__ ) + + #ifndef __ASM + #define __ASM __asm + #endif + + #ifndef __INLINE + #define __INLINE inline + #endif + + #ifndef __WEAK + #define __WEAK __attribute__((weak)) + #endif + + #ifndef __ALIGN + #define __ALIGN(n) __attribute__((aligned(n))) + #endif + + #ifndef __PACKED + #define __PACKED __attribute__((packed)) + #endif + + #define GET_SP() gcc_current_sp() + + static inline unsigned int gcc_current_sp(void) + { + register unsigned sp __ASM("sp"); + return sp; + } + +#elif defined ( __TASKING__ ) + + #ifndef __ASM + #define __ASM __asm + #endif + + #ifndef __INLINE + #define __INLINE inline + #endif + + #ifndef __WEAK + #define __WEAK __attribute__((weak)) + #endif + + #ifndef __ALIGN + #define __ALIGN(n) __align(n) + #endif + + /* Not defined for TASKING. */ + #ifndef __PACKED + #define __PACKED + #endif + + #define GET_SP() __get_MSP() + +#endif + +/*lint --flb "Leave library region" */ + +#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nRFxxx.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nRFxxx.h new file mode 100644 index 00000000000..ba7205237f9 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nRFxxx.h @@ -0,0 +1,21 @@ +/***************************************************************************** + * SEGGER Microcontroller GmbH & Co. KG * + * Solutions for real time microcontroller applications * + ***************************************************************************** + * * + * (c) 2017 SEGGER Microcontroller GmbH & Co. KG * + * * + * Internet: www.segger.com Support: support@segger.com * + * * + *****************************************************************************/ + +#ifndef __nRFxxx_h +#define __nRFxxx_h + +#if defined(NRF51) || defined(NRF51) || defined(NRF51) || defined(NRF51) || defined(NRF51) || defined(NRF51) || defined(NRF51) || defined(NRF51) || defined(NRF52) || defined(NRF52832_XXAB) || defined(NRF52840_XXAA) + +#include "nrf.h" + +#endif + +#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf.h new file mode 100644 index 00000000000..f0bfec35924 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf.h @@ -0,0 +1,102 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +#ifndef NRF_H +#define NRF_H + +/* MDK version */ +#define MDK_MAJOR_VERSION 8 +#define MDK_MINOR_VERSION 16 +#define MDK_MICRO_VERSION 0 + +/* Redefine "old" too-generic name NRF52 to NRF52832_XXAA to keep backwards compatibility. */ +#if defined (NRF52) + #ifndef NRF52832_XXAA + #define NRF52832_XXAA + #endif +#endif + +/* Define NRF52_SERIES for common use in nRF52 series devices. Only if not previously defined. */ +#if defined (NRF52810_XXAA) || defined (NRF52832_XXAA) || defined (NRF52832_XXAB) || defined (NRF52840_XXAA) + #ifndef NRF52_SERIES + #define NRF52_SERIES + #endif +#endif + + +#if defined(_WIN32) + /* Do not include nrf specific files when building for PC host */ +#elif defined(__unix) + /* Do not include nrf specific files when building for PC host */ +#elif defined(__APPLE__) + /* Do not include nrf specific files when building for PC host */ +#else + + /* Device selection for device includes. */ + #if defined (NRF51) + #include "nrf51.h" + #include "nrf51_bitfields.h" + #include "nrf51_deprecated.h" + #elif defined (NRF52840_XXAA) + #include "nrf52840.h" + #include "nrf52840_bitfields.h" + #include "nrf51_to_nrf52840.h" + #include "nrf52_to_nrf52840.h" + #elif defined (NRF52832_XXAA) || defined (NRF52832_XXAB) + #include "nrf52.h" + #include "nrf52_bitfields.h" + #include "nrf51_to_nrf52.h" + #include "nrf52_name_change.h" + #elif defined (NRF52810_XXAA) + #include "nrf52810.h" + #include "nrf52810_bitfields.h" + #include "nrf51_to_nrf52810.h" + #include "nrf52_to_nrf52810.h" + #else + #error "Device must be defined. See nrf.h." + #endif /* NRF51, NRF52832_XXAA, NRF52832_XXAB, NRF52810_XXAA, NRF52840_XXAA */ + + #include "compiler_abstraction.h" + +#endif /* _WIN32 || __unix || __APPLE__ */ + +#endif /* NRF_H */ + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51.h new file mode 100644 index 00000000000..b716765bef3 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51.h @@ -0,0 +1,1202 @@ + +/****************************************************************************************************//** + * @file nrf51.h + * + * @brief CMSIS Cortex-M0 Peripheral Access Layer Header File for + * nrf51 from Nordic Semiconductor. + * + * @version V522 + * @date 8. March 2018 + * + * @note Generated with SVDConv V2.81d + * from CMSIS SVD File 'nrf51.svd' Version 522, + * + * @par Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + *******************************************************************************************************/ + + + +/** @addtogroup Nordic Semiconductor + * @{ + */ + +/** @addtogroup nrf51 + * @{ + */ + +#ifndef NRF51_H +#define NRF51_H + +#ifdef __cplusplus +extern "C" { +#endif + + +/* ------------------------- Interrupt Number Definition ------------------------ */ + +typedef enum { +/* ------------------- Cortex-M0 Processor Exceptions Numbers ------------------- */ + Reset_IRQn = -15, /*!< 1 Reset Vector, invoked on Power up and warm reset */ + NonMaskableInt_IRQn = -14, /*!< 2 Non maskable Interrupt, cannot be stopped or preempted */ + HardFault_IRQn = -13, /*!< 3 Hard Fault, all classes of Fault */ + SVCall_IRQn = -5, /*!< 11 System Service Call via SVC instruction */ + DebugMonitor_IRQn = -4, /*!< 12 Debug Monitor */ + PendSV_IRQn = -2, /*!< 14 Pendable request for system service */ + SysTick_IRQn = -1, /*!< 15 System Tick Timer */ +/* ---------------------- nrf51 Specific Interrupt Numbers ---------------------- */ + POWER_CLOCK_IRQn = 0, /*!< 0 POWER_CLOCK */ + RADIO_IRQn = 1, /*!< 1 RADIO */ + UART0_IRQn = 2, /*!< 2 UART0 */ + SPI0_TWI0_IRQn = 3, /*!< 3 SPI0_TWI0 */ + SPI1_TWI1_IRQn = 4, /*!< 4 SPI1_TWI1 */ + GPIOTE_IRQn = 6, /*!< 6 GPIOTE */ + ADC_IRQn = 7, /*!< 7 ADC */ + TIMER0_IRQn = 8, /*!< 8 TIMER0 */ + TIMER1_IRQn = 9, /*!< 9 TIMER1 */ + TIMER2_IRQn = 10, /*!< 10 TIMER2 */ + RTC0_IRQn = 11, /*!< 11 RTC0 */ + TEMP_IRQn = 12, /*!< 12 TEMP */ + RNG_IRQn = 13, /*!< 13 RNG */ + ECB_IRQn = 14, /*!< 14 ECB */ + CCM_AAR_IRQn = 15, /*!< 15 CCM_AAR */ + WDT_IRQn = 16, /*!< 16 WDT */ + RTC1_IRQn = 17, /*!< 17 RTC1 */ + QDEC_IRQn = 18, /*!< 18 QDEC */ + LPCOMP_IRQn = 19, /*!< 19 LPCOMP */ + SWI0_IRQn = 20, /*!< 20 SWI0 */ + SWI1_IRQn = 21, /*!< 21 SWI1 */ + SWI2_IRQn = 22, /*!< 22 SWI2 */ + SWI3_IRQn = 23, /*!< 23 SWI3 */ + SWI4_IRQn = 24, /*!< 24 SWI4 */ + SWI5_IRQn = 25 /*!< 25 SWI5 */ +} IRQn_Type; + + +/** @addtogroup Configuration_of_CMSIS + * @{ + */ + + +/* ================================================================================ */ +/* ================ Processor and Core Peripheral Section ================ */ +/* ================================================================================ */ + +/* ----------------Configuration of the Cortex-M0 Processor and Core Peripherals---------------- */ +#define __CM0_REV 0x0301 /*!< Cortex-M0 Core Revision */ +#define __MPU_PRESENT 0 /*!< MPU present or not */ +#define __NVIC_PRIO_BITS 2 /*!< Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ +/** @} */ /* End of group Configuration_of_CMSIS */ + +#include "core_cm0.h" /*!< Cortex-M0 processor and core peripherals */ +#include "system_nrf51.h" /*!< nrf51 System */ + + +/* ================================================================================ */ +/* ================ Device Specific Peripheral Section ================ */ +/* ================================================================================ */ + + +/** @addtogroup Device_Peripheral_Registers + * @{ + */ + + +/* ------------------- Start of section using anonymous unions ------------------ */ +#if defined(__CC_ARM) + #pragma push + #pragma anon_unions +#elif defined(__ICCARM__) + #pragma language=extended +#elif defined(__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined(__TMS470__) +/* anonymous unions are enabled by default */ +#elif defined(__TASKING__) + #pragma warning 586 +#else + #warning Not supported compiler type +#endif + + +typedef struct { + __O uint32_t EN; /*!< Enable channel group. */ + __O uint32_t DIS; /*!< Disable channel group. */ +} PPI_TASKS_CHG_Type; + +typedef struct { + __IO uint32_t EEP; /*!< Channel event end-point. */ + __IO uint32_t TEP; /*!< Channel task end-point. */ +} PPI_CH_Type; + + +/* ================================================================================ */ +/* ================ POWER ================ */ +/* ================================================================================ */ + + +/** + * @brief Power Control. (POWER) + */ + +typedef struct { /*!< POWER Structure */ + __I uint32_t RESERVED0[30]; + __O uint32_t TASKS_CONSTLAT; /*!< Enable constant latency mode. */ + __O uint32_t TASKS_LOWPWR; /*!< Enable low power mode (variable latency). */ + __I uint32_t RESERVED1[34]; + __IO uint32_t EVENTS_POFWARN; /*!< Power failure warning. */ + __I uint32_t RESERVED2[126]; + __IO uint32_t INTENSET; /*!< Interrupt enable set register. */ + __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */ + __I uint32_t RESERVED3[61]; + __IO uint32_t RESETREAS; /*!< Reset reason. */ + __I uint32_t RESERVED4[9]; + __I uint32_t RAMSTATUS; /*!< Ram status register. */ + __I uint32_t RESERVED5[53]; + __O uint32_t SYSTEMOFF; /*!< System off register. */ + __I uint32_t RESERVED6[3]; + __IO uint32_t POFCON; /*!< Power failure configuration. */ + __I uint32_t RESERVED7[2]; + __IO uint32_t GPREGRET; /*!< General purpose retention register. This register is a retained + register. */ + __I uint32_t RESERVED8; + __IO uint32_t RAMON; /*!< Ram on/off. */ + __I uint32_t RESERVED9[7]; + __IO uint32_t RESET; /*!< Pin reset functionality configuration register. This register + is a retained register. */ + __I uint32_t RESERVED10[3]; + __IO uint32_t RAMONB; /*!< Ram on/off. */ + __I uint32_t RESERVED11[8]; + __IO uint32_t DCDCEN; /*!< DCDC converter enable configuration register. */ + __I uint32_t RESERVED12[291]; + __IO uint32_t DCDCFORCE; /*!< DCDC power-up force register. */ +} NRF_POWER_Type; + + +/* ================================================================================ */ +/* ================ CLOCK ================ */ +/* ================================================================================ */ + + +/** + * @brief Clock control. (CLOCK) + */ + +typedef struct { /*!< CLOCK Structure */ + __O uint32_t TASKS_HFCLKSTART; /*!< Start HFCLK clock source. */ + __O uint32_t TASKS_HFCLKSTOP; /*!< Stop HFCLK clock source. */ + __O uint32_t TASKS_LFCLKSTART; /*!< Start LFCLK clock source. */ + __O uint32_t TASKS_LFCLKSTOP; /*!< Stop LFCLK clock source. */ + __O uint32_t TASKS_CAL; /*!< Start calibration of LFCLK RC oscillator. */ + __O uint32_t TASKS_CTSTART; /*!< Start calibration timer. */ + __O uint32_t TASKS_CTSTOP; /*!< Stop calibration timer. */ + __I uint32_t RESERVED0[57]; + __IO uint32_t EVENTS_HFCLKSTARTED; /*!< HFCLK oscillator started. */ + __IO uint32_t EVENTS_LFCLKSTARTED; /*!< LFCLK oscillator started. */ + __I uint32_t RESERVED1; + __IO uint32_t EVENTS_DONE; /*!< Calibration of LFCLK RC oscillator completed. */ + __IO uint32_t EVENTS_CTTO; /*!< Calibration timer timeout. */ + __I uint32_t RESERVED2[124]; + __IO uint32_t INTENSET; /*!< Interrupt enable set register. */ + __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */ + __I uint32_t RESERVED3[63]; + __I uint32_t HFCLKRUN; /*!< Task HFCLKSTART trigger status. */ + __I uint32_t HFCLKSTAT; /*!< High frequency clock status. */ + __I uint32_t RESERVED4; + __I uint32_t LFCLKRUN; /*!< Task LFCLKSTART triggered status. */ + __I uint32_t LFCLKSTAT; /*!< Low frequency clock status. */ + __I uint32_t LFCLKSRCCOPY; /*!< Clock source for the LFCLK clock, set when task LKCLKSTART is + triggered. */ + __I uint32_t RESERVED5[62]; + __IO uint32_t LFCLKSRC; /*!< Clock source for the LFCLK clock. */ + __I uint32_t RESERVED6[7]; + __IO uint32_t CTIV; /*!< Calibration timer interval. */ + __I uint32_t RESERVED7[5]; + __IO uint32_t XTALFREQ; /*!< Crystal frequency. */ +} NRF_CLOCK_Type; + + +/* ================================================================================ */ +/* ================ MPU ================ */ +/* ================================================================================ */ + + +/** + * @brief Memory Protection Unit. (MPU) + */ + +typedef struct { /*!< MPU Structure */ + __I uint32_t RESERVED0[330]; + __IO uint32_t PERR0; /*!< Configuration of peripherals in mpu regions. */ + __IO uint32_t RLENR0; /*!< Length of RAM region 0. */ + __I uint32_t RESERVED1[52]; + __IO uint32_t PROTENSET0; /*!< Erase and write protection bit enable set register. */ + __IO uint32_t PROTENSET1; /*!< Erase and write protection bit enable set register. */ + __IO uint32_t DISABLEINDEBUG; /*!< Disable erase and write protection mechanism in debug mode. */ + __IO uint32_t PROTBLOCKSIZE; /*!< Erase and write protection block size. */ +} NRF_MPU_Type; + + +/* ================================================================================ */ +/* ================ RADIO ================ */ +/* ================================================================================ */ + + +/** + * @brief The radio. (RADIO) + */ + +typedef struct { /*!< RADIO Structure */ + __O uint32_t TASKS_TXEN; /*!< Enable radio in TX mode. */ + __O uint32_t TASKS_RXEN; /*!< Enable radio in RX mode. */ + __O uint32_t TASKS_START; /*!< Start radio. */ + __O uint32_t TASKS_STOP; /*!< Stop radio. */ + __O uint32_t TASKS_DISABLE; /*!< Disable radio. */ + __O uint32_t TASKS_RSSISTART; /*!< Start the RSSI and take one sample of the receive signal strength. */ + __O uint32_t TASKS_RSSISTOP; /*!< Stop the RSSI measurement. */ + __O uint32_t TASKS_BCSTART; /*!< Start the bit counter. */ + __O uint32_t TASKS_BCSTOP; /*!< Stop the bit counter. */ + __I uint32_t RESERVED0[55]; + __IO uint32_t EVENTS_READY; /*!< Ready event. */ + __IO uint32_t EVENTS_ADDRESS; /*!< Address event. */ + __IO uint32_t EVENTS_PAYLOAD; /*!< Payload event. */ + __IO uint32_t EVENTS_END; /*!< End event. */ + __IO uint32_t EVENTS_DISABLED; /*!< Disable event. */ + __IO uint32_t EVENTS_DEVMATCH; /*!< A device address match occurred on the last received packet. */ + __IO uint32_t EVENTS_DEVMISS; /*!< No device address match occurred on the last received packet. */ + __IO uint32_t EVENTS_RSSIEND; /*!< Sampling of the receive signal strength complete. A new RSSI + sample is ready for readout at the RSSISAMPLE register. */ + __I uint32_t RESERVED1[2]; + __IO uint32_t EVENTS_BCMATCH; /*!< Bit counter reached bit count value specified in BCC register. */ + __I uint32_t RESERVED2[53]; + __IO uint32_t SHORTS; /*!< Shortcuts for the radio. */ + __I uint32_t RESERVED3[64]; + __IO uint32_t INTENSET; /*!< Interrupt enable set register. */ + __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */ + __I uint32_t RESERVED4[61]; + __I uint32_t CRCSTATUS; /*!< CRC status of received packet. */ + __I uint32_t RESERVED5; + __I uint32_t RXMATCH; /*!< Received address. */ + __I uint32_t RXCRC; /*!< Received CRC. */ + __I uint32_t DAI; /*!< Device address match index. */ + __I uint32_t RESERVED6[60]; + __IO uint32_t PACKETPTR; /*!< Packet pointer. Decision point: START task. */ + __IO uint32_t FREQUENCY; /*!< Frequency. */ + __IO uint32_t TXPOWER; /*!< Output power. */ + __IO uint32_t MODE; /*!< Data rate and modulation. */ + __IO uint32_t PCNF0; /*!< Packet configuration 0. */ + __IO uint32_t PCNF1; /*!< Packet configuration 1. */ + __IO uint32_t BASE0; /*!< Radio base address 0. Decision point: START task. */ + __IO uint32_t BASE1; /*!< Radio base address 1. Decision point: START task. */ + __IO uint32_t PREFIX0; /*!< Prefixes bytes for logical addresses 0 to 3. */ + __IO uint32_t PREFIX1; /*!< Prefixes bytes for logical addresses 4 to 7. */ + __IO uint32_t TXADDRESS; /*!< Transmit address select. */ + __IO uint32_t RXADDRESSES; /*!< Receive address select. */ + __IO uint32_t CRCCNF; /*!< CRC configuration. */ + __IO uint32_t CRCPOLY; /*!< CRC polynomial. */ + __IO uint32_t CRCINIT; /*!< CRC initial value. */ + __IO uint32_t TEST; /*!< Test features enable register. */ + __IO uint32_t TIFS; /*!< Inter Frame Spacing in microseconds. */ + __I uint32_t RSSISAMPLE; /*!< RSSI sample. */ + __I uint32_t RESERVED7; + __I uint32_t STATE; /*!< Current radio state. */ + __IO uint32_t DATAWHITEIV; /*!< Data whitening initial value. */ + __I uint32_t RESERVED8[2]; + __IO uint32_t BCC; /*!< Bit counter compare. */ + __I uint32_t RESERVED9[39]; + __IO uint32_t DAB[8]; /*!< Device address base segment. */ + __IO uint32_t DAP[8]; /*!< Device address prefix. */ + __IO uint32_t DACNF; /*!< Device address match configuration. */ + __I uint32_t RESERVED10[56]; + __IO uint32_t OVERRIDE0; /*!< Trim value override register 0. */ + __IO uint32_t OVERRIDE1; /*!< Trim value override register 1. */ + __IO uint32_t OVERRIDE2; /*!< Trim value override register 2. */ + __IO uint32_t OVERRIDE3; /*!< Trim value override register 3. */ + __IO uint32_t OVERRIDE4; /*!< Trim value override register 4. */ + __I uint32_t RESERVED11[561]; + __IO uint32_t POWER; /*!< Peripheral power control. */ +} NRF_RADIO_Type; + + +/* ================================================================================ */ +/* ================ UART ================ */ +/* ================================================================================ */ + + +/** + * @brief Universal Asynchronous Receiver/Transmitter. (UART) + */ + +typedef struct { /*!< UART Structure */ + __O uint32_t TASKS_STARTRX; /*!< Start UART receiver. */ + __O uint32_t TASKS_STOPRX; /*!< Stop UART receiver. */ + __O uint32_t TASKS_STARTTX; /*!< Start UART transmitter. */ + __O uint32_t TASKS_STOPTX; /*!< Stop UART transmitter. */ + __I uint32_t RESERVED0[3]; + __O uint32_t TASKS_SUSPEND; /*!< Suspend UART. */ + __I uint32_t RESERVED1[56]; + __IO uint32_t EVENTS_CTS; /*!< CTS activated. */ + __IO uint32_t EVENTS_NCTS; /*!< CTS deactivated. */ + __IO uint32_t EVENTS_RXDRDY; /*!< Data received in RXD. */ + __I uint32_t RESERVED2[4]; + __IO uint32_t EVENTS_TXDRDY; /*!< Data sent from TXD. */ + __I uint32_t RESERVED3; + __IO uint32_t EVENTS_ERROR; /*!< Error detected. */ + __I uint32_t RESERVED4[7]; + __IO uint32_t EVENTS_RXTO; /*!< Receiver timeout. */ + __I uint32_t RESERVED5[46]; + __IO uint32_t SHORTS; /*!< Shortcuts for UART. */ + __I uint32_t RESERVED6[64]; + __IO uint32_t INTENSET; /*!< Interrupt enable set register. */ + __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */ + __I uint32_t RESERVED7[93]; + __IO uint32_t ERRORSRC; /*!< Error source. Write error field to 1 to clear error. */ + __I uint32_t RESERVED8[31]; + __IO uint32_t ENABLE; /*!< Enable UART and acquire IOs. */ + __I uint32_t RESERVED9; + __IO uint32_t PSELRTS; /*!< Pin select for RTS. */ + __IO uint32_t PSELTXD; /*!< Pin select for TXD. */ + __IO uint32_t PSELCTS; /*!< Pin select for CTS. */ + __IO uint32_t PSELRXD; /*!< Pin select for RXD. */ + __I uint32_t RXD; /*!< RXD register. On read action the buffer pointer is displaced. + Once read the character is consumed. If read when no character + available, the UART will stop working. */ + __O uint32_t TXD; /*!< TXD register. */ + __I uint32_t RESERVED10; + __IO uint32_t BAUDRATE; /*!< UART Baudrate. */ + __I uint32_t RESERVED11[17]; + __IO uint32_t CONFIG; /*!< Configuration of parity and hardware flow control register. */ + __I uint32_t RESERVED12[675]; + __IO uint32_t POWER; /*!< Peripheral power control. */ +} NRF_UART_Type; + + +/* ================================================================================ */ +/* ================ SPI ================ */ +/* ================================================================================ */ + + +/** + * @brief SPI master 0. (SPI) + */ + +typedef struct { /*!< SPI Structure */ + __I uint32_t RESERVED0[66]; + __IO uint32_t EVENTS_READY; /*!< TXD byte sent and RXD byte received. */ + __I uint32_t RESERVED1[126]; + __IO uint32_t INTENSET; /*!< Interrupt enable set register. */ + __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */ + __I uint32_t RESERVED2[125]; + __IO uint32_t ENABLE; /*!< Enable SPI. */ + __I uint32_t RESERVED3; + __IO uint32_t PSELSCK; /*!< Pin select for SCK. */ + __IO uint32_t PSELMOSI; /*!< Pin select for MOSI. */ + __IO uint32_t PSELMISO; /*!< Pin select for MISO. */ + __I uint32_t RESERVED4; + __I uint32_t RXD; /*!< RX data. */ + __IO uint32_t TXD; /*!< TX data. */ + __I uint32_t RESERVED5; + __IO uint32_t FREQUENCY; /*!< SPI frequency */ + __I uint32_t RESERVED6[11]; + __IO uint32_t CONFIG; /*!< Configuration register. */ + __I uint32_t RESERVED7[681]; + __IO uint32_t POWER; /*!< Peripheral power control. */ +} NRF_SPI_Type; + + +/* ================================================================================ */ +/* ================ TWI ================ */ +/* ================================================================================ */ + + +/** + * @brief Two-wire interface master 0. (TWI) + */ + +typedef struct { /*!< TWI Structure */ + __O uint32_t TASKS_STARTRX; /*!< Start 2-Wire master receive sequence. */ + __I uint32_t RESERVED0; + __O uint32_t TASKS_STARTTX; /*!< Start 2-Wire master transmit sequence. */ + __I uint32_t RESERVED1[2]; + __O uint32_t TASKS_STOP; /*!< Stop 2-Wire transaction. */ + __I uint32_t RESERVED2; + __O uint32_t TASKS_SUSPEND; /*!< Suspend 2-Wire transaction. */ + __O uint32_t TASKS_RESUME; /*!< Resume 2-Wire transaction. */ + __I uint32_t RESERVED3[56]; + __IO uint32_t EVENTS_STOPPED; /*!< Two-wire stopped. */ + __IO uint32_t EVENTS_RXDREADY; /*!< Two-wire ready to deliver new RXD byte received. */ + __I uint32_t RESERVED4[4]; + __IO uint32_t EVENTS_TXDSENT; /*!< Two-wire finished sending last TXD byte. */ + __I uint32_t RESERVED5; + __IO uint32_t EVENTS_ERROR; /*!< Two-wire error detected. */ + __I uint32_t RESERVED6[4]; + __IO uint32_t EVENTS_BB; /*!< Two-wire byte boundary. */ + __I uint32_t RESERVED7[3]; + __IO uint32_t EVENTS_SUSPENDED; /*!< Two-wire suspended. */ + __I uint32_t RESERVED8[45]; + __IO uint32_t SHORTS; /*!< Shortcuts for TWI. */ + __I uint32_t RESERVED9[64]; + __IO uint32_t INTENSET; /*!< Interrupt enable set register. */ + __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */ + __I uint32_t RESERVED10[110]; + __IO uint32_t ERRORSRC; /*!< Two-wire error source. Write error field to 1 to clear error. */ + __I uint32_t RESERVED11[14]; + __IO uint32_t ENABLE; /*!< Enable two-wire master. */ + __I uint32_t RESERVED12; + __IO uint32_t PSELSCL; /*!< Pin select for SCL. */ + __IO uint32_t PSELSDA; /*!< Pin select for SDA. */ + __I uint32_t RESERVED13[2]; + __I uint32_t RXD; /*!< RX data register. */ + __IO uint32_t TXD; /*!< TX data register. */ + __I uint32_t RESERVED14; + __IO uint32_t FREQUENCY; /*!< Two-wire frequency. */ + __I uint32_t RESERVED15[24]; + __IO uint32_t ADDRESS; /*!< Address used in the two-wire transfer. */ + __I uint32_t RESERVED16[668]; + __IO uint32_t POWER; /*!< Peripheral power control. */ +} NRF_TWI_Type; + + +/* ================================================================================ */ +/* ================ SPIS ================ */ +/* ================================================================================ */ + + +/** + * @brief SPI slave 1. (SPIS) + */ + +typedef struct { /*!< SPIS Structure */ + __I uint32_t RESERVED0[9]; + __O uint32_t TASKS_ACQUIRE; /*!< Acquire SPI semaphore. */ + __O uint32_t TASKS_RELEASE; /*!< Release SPI semaphore. */ + __I uint32_t RESERVED1[54]; + __IO uint32_t EVENTS_END; /*!< Granted transaction completed. */ + __I uint32_t RESERVED2[2]; + __IO uint32_t EVENTS_ENDRX; /*!< End of RXD buffer reached */ + __I uint32_t RESERVED3[5]; + __IO uint32_t EVENTS_ACQUIRED; /*!< Semaphore acquired. */ + __I uint32_t RESERVED4[53]; + __IO uint32_t SHORTS; /*!< Shortcuts for SPIS. */ + __I uint32_t RESERVED5[64]; + __IO uint32_t INTENSET; /*!< Interrupt enable set register. */ + __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */ + __I uint32_t RESERVED6[61]; + __I uint32_t SEMSTAT; /*!< Semaphore status. */ + __I uint32_t RESERVED7[15]; + __IO uint32_t STATUS; /*!< Status from last transaction. */ + __I uint32_t RESERVED8[47]; + __IO uint32_t ENABLE; /*!< Enable SPIS. */ + __I uint32_t RESERVED9; + __IO uint32_t PSELSCK; /*!< Pin select for SCK. */ + __IO uint32_t PSELMISO; /*!< Pin select for MISO. */ + __IO uint32_t PSELMOSI; /*!< Pin select for MOSI. */ + __IO uint32_t PSELCSN; /*!< Pin select for CSN. */ + __I uint32_t RESERVED10[7]; + __IO uint32_t RXDPTR; /*!< RX data pointer. */ + __IO uint32_t MAXRX; /*!< Maximum number of bytes in the receive buffer. */ + __I uint32_t AMOUNTRX; /*!< Number of bytes received in last granted transaction. */ + __I uint32_t RESERVED11; + __IO uint32_t TXDPTR; /*!< TX data pointer. */ + __IO uint32_t MAXTX; /*!< Maximum number of bytes in the transmit buffer. */ + __I uint32_t AMOUNTTX; /*!< Number of bytes transmitted in last granted transaction. */ + __I uint32_t RESERVED12; + __IO uint32_t CONFIG; /*!< Configuration register. */ + __I uint32_t RESERVED13; + __IO uint32_t DEF; /*!< Default character. */ + __I uint32_t RESERVED14[24]; + __IO uint32_t ORC; /*!< Over-read character. */ + __I uint32_t RESERVED15[654]; + __IO uint32_t POWER; /*!< Peripheral power control. */ +} NRF_SPIS_Type; + + +/* ================================================================================ */ +/* ================ GPIOTE ================ */ +/* ================================================================================ */ + + +/** + * @brief GPIO tasks and events. (GPIOTE) + */ + +typedef struct { /*!< GPIOTE Structure */ + __O uint32_t TASKS_OUT[4]; /*!< Tasks asssociated with GPIOTE channels. */ + __I uint32_t RESERVED0[60]; + __IO uint32_t EVENTS_IN[4]; /*!< Tasks asssociated with GPIOTE channels. */ + __I uint32_t RESERVED1[27]; + __IO uint32_t EVENTS_PORT; /*!< Event generated from multiple pins. */ + __I uint32_t RESERVED2[97]; + __IO uint32_t INTENSET; /*!< Interrupt enable set register. */ + __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */ + __I uint32_t RESERVED3[129]; + __IO uint32_t CONFIG[4]; /*!< Channel configuration registers. */ + __I uint32_t RESERVED4[695]; + __IO uint32_t POWER; /*!< Peripheral power control. */ +} NRF_GPIOTE_Type; + + +/* ================================================================================ */ +/* ================ ADC ================ */ +/* ================================================================================ */ + + +/** + * @brief Analog to digital converter. (ADC) + */ + +typedef struct { /*!< ADC Structure */ + __O uint32_t TASKS_START; /*!< Start an ADC conversion. */ + __O uint32_t TASKS_STOP; /*!< Stop ADC. */ + __I uint32_t RESERVED0[62]; + __IO uint32_t EVENTS_END; /*!< ADC conversion complete. */ + __I uint32_t RESERVED1[128]; + __IO uint32_t INTENSET; /*!< Interrupt enable set register. */ + __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */ + __I uint32_t RESERVED2[61]; + __I uint32_t BUSY; /*!< ADC busy register. */ + __I uint32_t RESERVED3[63]; + __IO uint32_t ENABLE; /*!< ADC enable. */ + __IO uint32_t CONFIG; /*!< ADC configuration register. */ + __I uint32_t RESULT; /*!< Result of ADC conversion. */ + __I uint32_t RESERVED4[700]; + __IO uint32_t POWER; /*!< Peripheral power control. */ +} NRF_ADC_Type; + + +/* ================================================================================ */ +/* ================ TIMER ================ */ +/* ================================================================================ */ + + +/** + * @brief Timer 0. (TIMER) + */ + +typedef struct { /*!< TIMER Structure */ + __O uint32_t TASKS_START; /*!< Start Timer. */ + __O uint32_t TASKS_STOP; /*!< Stop Timer. */ + __O uint32_t TASKS_COUNT; /*!< Increment Timer (In counter mode). */ + __O uint32_t TASKS_CLEAR; /*!< Clear timer. */ + __O uint32_t TASKS_SHUTDOWN; /*!< Shutdown timer. */ + __I uint32_t RESERVED0[11]; + __O uint32_t TASKS_CAPTURE[4]; /*!< Capture Timer value to CC[n] registers. */ + __I uint32_t RESERVED1[60]; + __IO uint32_t EVENTS_COMPARE[4]; /*!< Compare event on CC[n] match. */ + __I uint32_t RESERVED2[44]; + __IO uint32_t SHORTS; /*!< Shortcuts for Timer. */ + __I uint32_t RESERVED3[64]; + __IO uint32_t INTENSET; /*!< Interrupt enable set register. */ + __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */ + __I uint32_t RESERVED4[126]; + __IO uint32_t MODE; /*!< Timer Mode selection. */ + __IO uint32_t BITMODE; /*!< Sets timer behaviour. */ + __I uint32_t RESERVED5; + __IO uint32_t PRESCALER; /*!< 4-bit prescaler to source clock frequency (max value 9). Source + clock frequency is divided by 2^SCALE. */ + __I uint32_t RESERVED6[11]; + __IO uint32_t CC[4]; /*!< Capture/compare registers. */ + __I uint32_t RESERVED7[683]; + __IO uint32_t POWER; /*!< Peripheral power control. */ +} NRF_TIMER_Type; + + +/* ================================================================================ */ +/* ================ RTC ================ */ +/* ================================================================================ */ + + +/** + * @brief Real time counter 0. (RTC) + */ + +typedef struct { /*!< RTC Structure */ + __O uint32_t TASKS_START; /*!< Start RTC Counter. */ + __O uint32_t TASKS_STOP; /*!< Stop RTC Counter. */ + __O uint32_t TASKS_CLEAR; /*!< Clear RTC Counter. */ + __O uint32_t TASKS_TRIGOVRFLW; /*!< Set COUNTER to 0xFFFFFFF0. */ + __I uint32_t RESERVED0[60]; + __IO uint32_t EVENTS_TICK; /*!< Event on COUNTER increment. */ + __IO uint32_t EVENTS_OVRFLW; /*!< Event on COUNTER overflow. */ + __I uint32_t RESERVED1[14]; + __IO uint32_t EVENTS_COMPARE[4]; /*!< Compare event on CC[n] match. */ + __I uint32_t RESERVED2[109]; + __IO uint32_t INTENSET; /*!< Interrupt enable set register. */ + __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */ + __I uint32_t RESERVED3[13]; + __IO uint32_t EVTEN; /*!< Configures event enable routing to PPI for each RTC event. */ + __IO uint32_t EVTENSET; /*!< Enable events routing to PPI. The reading of this register gives + the value of EVTEN. */ + __IO uint32_t EVTENCLR; /*!< Disable events routing to PPI. The reading of this register + gives the value of EVTEN. */ + __I uint32_t RESERVED4[110]; + __I uint32_t COUNTER; /*!< Current COUNTER value. */ + __IO uint32_t PRESCALER; /*!< 12-bit prescaler for COUNTER frequency (32768/(PRESCALER+1)). + Must be written when RTC is STOPed. */ + __I uint32_t RESERVED5[13]; + __IO uint32_t CC[4]; /*!< Capture/compare registers. */ + __I uint32_t RESERVED6[683]; + __IO uint32_t POWER; /*!< Peripheral power control. */ +} NRF_RTC_Type; + + +/* ================================================================================ */ +/* ================ TEMP ================ */ +/* ================================================================================ */ + + +/** + * @brief Temperature Sensor. (TEMP) + */ + +typedef struct { /*!< TEMP Structure */ + __O uint32_t TASKS_START; /*!< Start temperature measurement. */ + __O uint32_t TASKS_STOP; /*!< Stop temperature measurement. */ + __I uint32_t RESERVED0[62]; + __IO uint32_t EVENTS_DATARDY; /*!< Temperature measurement complete, data ready event. */ + __I uint32_t RESERVED1[128]; + __IO uint32_t INTENSET; /*!< Interrupt enable set register. */ + __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */ + __I uint32_t RESERVED2[127]; + __I int32_t TEMP; /*!< Die temperature in degC, 2's complement format, 0.25 degC pecision. */ + __I uint32_t RESERVED3[700]; + __IO uint32_t POWER; /*!< Peripheral power control. */ +} NRF_TEMP_Type; + + +/* ================================================================================ */ +/* ================ RNG ================ */ +/* ================================================================================ */ + + +/** + * @brief Random Number Generator. (RNG) + */ + +typedef struct { /*!< RNG Structure */ + __O uint32_t TASKS_START; /*!< Start the random number generator. */ + __O uint32_t TASKS_STOP; /*!< Stop the random number generator. */ + __I uint32_t RESERVED0[62]; + __IO uint32_t EVENTS_VALRDY; /*!< New random number generated and written to VALUE register. */ + __I uint32_t RESERVED1[63]; + __IO uint32_t SHORTS; /*!< Shortcuts for the RNG. */ + __I uint32_t RESERVED2[64]; + __IO uint32_t INTENSET; /*!< Interrupt enable set register */ + __IO uint32_t INTENCLR; /*!< Interrupt enable clear register */ + __I uint32_t RESERVED3[126]; + __IO uint32_t CONFIG; /*!< Configuration register. */ + __I uint32_t VALUE; /*!< RNG random number. */ + __I uint32_t RESERVED4[700]; + __IO uint32_t POWER; /*!< Peripheral power control. */ +} NRF_RNG_Type; + + +/* ================================================================================ */ +/* ================ ECB ================ */ +/* ================================================================================ */ + + +/** + * @brief AES ECB Mode Encryption. (ECB) + */ + +typedef struct { /*!< ECB Structure */ + __O uint32_t TASKS_STARTECB; /*!< Start ECB block encrypt. If a crypto operation is running, this + will not initiate a new encryption and the ERRORECB event will + be triggered. */ + __O uint32_t TASKS_STOPECB; /*!< Stop current ECB encryption. If a crypto operation is running, + this will will trigger the ERRORECB event. */ + __I uint32_t RESERVED0[62]; + __IO uint32_t EVENTS_ENDECB; /*!< ECB block encrypt complete. */ + __IO uint32_t EVENTS_ERRORECB; /*!< ECB block encrypt aborted due to a STOPECB task or due to an + error. */ + __I uint32_t RESERVED1[127]; + __IO uint32_t INTENSET; /*!< Interrupt enable set register. */ + __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */ + __I uint32_t RESERVED2[126]; + __IO uint32_t ECBDATAPTR; /*!< ECB block encrypt memory pointer. */ + __I uint32_t RESERVED3[701]; + __IO uint32_t POWER; /*!< Peripheral power control. */ +} NRF_ECB_Type; + + +/* ================================================================================ */ +/* ================ AAR ================ */ +/* ================================================================================ */ + + +/** + * @brief Accelerated Address Resolver. (AAR) + */ + +typedef struct { /*!< AAR Structure */ + __O uint32_t TASKS_START; /*!< Start resolving addresses based on IRKs specified in the IRK + data structure. */ + __I uint32_t RESERVED0; + __O uint32_t TASKS_STOP; /*!< Stop resolving addresses. */ + __I uint32_t RESERVED1[61]; + __IO uint32_t EVENTS_END; /*!< Address resolution procedure completed. */ + __IO uint32_t EVENTS_RESOLVED; /*!< Address resolved. */ + __IO uint32_t EVENTS_NOTRESOLVED; /*!< Address not resolved. */ + __I uint32_t RESERVED2[126]; + __IO uint32_t INTENSET; /*!< Interrupt enable set register. */ + __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */ + __I uint32_t RESERVED3[61]; + __I uint32_t STATUS; /*!< Resolution status. */ + __I uint32_t RESERVED4[63]; + __IO uint32_t ENABLE; /*!< Enable AAR. */ + __IO uint32_t NIRK; /*!< Number of Identity root Keys in the IRK data structure. */ + __IO uint32_t IRKPTR; /*!< Pointer to the IRK data structure. */ + __I uint32_t RESERVED5; + __IO uint32_t ADDRPTR; /*!< Pointer to the resolvable address (6 bytes). */ + __IO uint32_t SCRATCHPTR; /*!< Pointer to a scratch data area used for temporary storage during + resolution. A minimum of 3 bytes must be reserved. */ + __I uint32_t RESERVED6[697]; + __IO uint32_t POWER; /*!< Peripheral power control. */ +} NRF_AAR_Type; + + +/* ================================================================================ */ +/* ================ CCM ================ */ +/* ================================================================================ */ + + +/** + * @brief AES CCM Mode Encryption. (CCM) + */ + +typedef struct { /*!< CCM Structure */ + __O uint32_t TASKS_KSGEN; /*!< Start generation of key-stream. This operation will stop by + itself when completed. */ + __O uint32_t TASKS_CRYPT; /*!< Start encrypt/decrypt. This operation will stop by itself when + completed. */ + __O uint32_t TASKS_STOP; /*!< Stop encrypt/decrypt. */ + __I uint32_t RESERVED0[61]; + __IO uint32_t EVENTS_ENDKSGEN; /*!< Keystream generation completed. */ + __IO uint32_t EVENTS_ENDCRYPT; /*!< Encrypt/decrypt completed. */ + __IO uint32_t EVENTS_ERROR; /*!< Error happened. */ + __I uint32_t RESERVED1[61]; + __IO uint32_t SHORTS; /*!< Shortcuts for the CCM. */ + __I uint32_t RESERVED2[64]; + __IO uint32_t INTENSET; /*!< Interrupt enable set register. */ + __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */ + __I uint32_t RESERVED3[61]; + __I uint32_t MICSTATUS; /*!< CCM RX MIC check result. */ + __I uint32_t RESERVED4[63]; + __IO uint32_t ENABLE; /*!< CCM enable. */ + __IO uint32_t MODE; /*!< Operation mode. */ + __IO uint32_t CNFPTR; /*!< Pointer to a data structure holding AES key and NONCE vector. */ + __IO uint32_t INPTR; /*!< Pointer to the input packet. */ + __IO uint32_t OUTPTR; /*!< Pointer to the output packet. */ + __IO uint32_t SCRATCHPTR; /*!< Pointer to a scratch data area used for temporary storage during + resolution. A minimum of 43 bytes must be reserved. */ + __I uint32_t RESERVED5[697]; + __IO uint32_t POWER; /*!< Peripheral power control. */ +} NRF_CCM_Type; + + +/* ================================================================================ */ +/* ================ WDT ================ */ +/* ================================================================================ */ + + +/** + * @brief Watchdog Timer. (WDT) + */ + +typedef struct { /*!< WDT Structure */ + __O uint32_t TASKS_START; /*!< Start the watchdog. */ + __I uint32_t RESERVED0[63]; + __IO uint32_t EVENTS_TIMEOUT; /*!< Watchdog timeout. */ + __I uint32_t RESERVED1[128]; + __IO uint32_t INTENSET; /*!< Interrupt enable set register. */ + __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */ + __I uint32_t RESERVED2[61]; + __I uint32_t RUNSTATUS; /*!< Watchdog running status. */ + __I uint32_t REQSTATUS; /*!< Request status. */ + __I uint32_t RESERVED3[63]; + __IO uint32_t CRV; /*!< Counter reload value in number of 32kiHz clock cycles. */ + __IO uint32_t RREN; /*!< Reload request enable. */ + __IO uint32_t CONFIG; /*!< Configuration register. */ + __I uint32_t RESERVED4[60]; + __O uint32_t RR[8]; /*!< Reload requests registers. */ + __I uint32_t RESERVED5[631]; + __IO uint32_t POWER; /*!< Peripheral power control. */ +} NRF_WDT_Type; + + +/* ================================================================================ */ +/* ================ QDEC ================ */ +/* ================================================================================ */ + + +/** + * @brief Rotary decoder. (QDEC) + */ + +typedef struct { /*!< QDEC Structure */ + __O uint32_t TASKS_START; /*!< Start the quadrature decoder. */ + __O uint32_t TASKS_STOP; /*!< Stop the quadrature decoder. */ + __O uint32_t TASKS_READCLRACC; /*!< Transfers the content from ACC registers to ACCREAD registers, + and clears the ACC registers. */ + __I uint32_t RESERVED0[61]; + __IO uint32_t EVENTS_SAMPLERDY; /*!< A new sample is written to the sample register. */ + __IO uint32_t EVENTS_REPORTRDY; /*!< REPORTPER number of samples accumulated in ACC register, and + ACC register different than zero. */ + __IO uint32_t EVENTS_ACCOF; /*!< ACC or ACCDBL register overflow. */ + __I uint32_t RESERVED1[61]; + __IO uint32_t SHORTS; /*!< Shortcuts for the QDEC. */ + __I uint32_t RESERVED2[64]; + __IO uint32_t INTENSET; /*!< Interrupt enable set register. */ + __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */ + __I uint32_t RESERVED3[125]; + __IO uint32_t ENABLE; /*!< Enable the QDEC. */ + __IO uint32_t LEDPOL; /*!< LED output pin polarity. */ + __IO uint32_t SAMPLEPER; /*!< Sample period. */ + __I int32_t SAMPLE; /*!< Motion sample value. */ + __IO uint32_t REPORTPER; /*!< Number of samples to generate an EVENT_REPORTRDY. */ + __I int32_t ACC; /*!< Accumulated valid transitions register. */ + __I int32_t ACCREAD; /*!< Snapshot of ACC register. Value generated by the TASKS_READCLEACC + task. */ + __IO uint32_t PSELLED; /*!< Pin select for LED output. */ + __IO uint32_t PSELA; /*!< Pin select for phase A input. */ + __IO uint32_t PSELB; /*!< Pin select for phase B input. */ + __IO uint32_t DBFEN; /*!< Enable debouncer input filters. */ + __I uint32_t RESERVED4[5]; + __IO uint32_t LEDPRE; /*!< Time LED is switched ON before the sample. */ + __I uint32_t ACCDBL; /*!< Accumulated double (error) transitions register. */ + __I uint32_t ACCDBLREAD; /*!< Snapshot of ACCDBL register. Value generated by the TASKS_READCLEACC + task. */ + __I uint32_t RESERVED5[684]; + __IO uint32_t POWER; /*!< Peripheral power control. */ +} NRF_QDEC_Type; + + +/* ================================================================================ */ +/* ================ LPCOMP ================ */ +/* ================================================================================ */ + + +/** + * @brief Low power comparator. (LPCOMP) + */ + +typedef struct { /*!< LPCOMP Structure */ + __O uint32_t TASKS_START; /*!< Start the comparator. */ + __O uint32_t TASKS_STOP; /*!< Stop the comparator. */ + __O uint32_t TASKS_SAMPLE; /*!< Sample comparator value. */ + __I uint32_t RESERVED0[61]; + __IO uint32_t EVENTS_READY; /*!< LPCOMP is ready and output is valid. */ + __IO uint32_t EVENTS_DOWN; /*!< Input voltage crossed the threshold going down. */ + __IO uint32_t EVENTS_UP; /*!< Input voltage crossed the threshold going up. */ + __IO uint32_t EVENTS_CROSS; /*!< Input voltage crossed the threshold in any direction. */ + __I uint32_t RESERVED1[60]; + __IO uint32_t SHORTS; /*!< Shortcuts for the LPCOMP. */ + __I uint32_t RESERVED2[64]; + __IO uint32_t INTENSET; /*!< Interrupt enable set register. */ + __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */ + __I uint32_t RESERVED3[61]; + __I uint32_t RESULT; /*!< Result of last compare. */ + __I uint32_t RESERVED4[63]; + __IO uint32_t ENABLE; /*!< Enable the LPCOMP. */ + __IO uint32_t PSEL; /*!< Input pin select. */ + __IO uint32_t REFSEL; /*!< Reference select. */ + __IO uint32_t EXTREFSEL; /*!< External reference select. */ + __I uint32_t RESERVED5[4]; + __IO uint32_t ANADETECT; /*!< Analog detect configuration. */ + __I uint32_t RESERVED6[694]; + __IO uint32_t POWER; /*!< Peripheral power control. */ +} NRF_LPCOMP_Type; + + +/* ================================================================================ */ +/* ================ SWI ================ */ +/* ================================================================================ */ + + +/** + * @brief SW Interrupts. (SWI) + */ + +typedef struct { /*!< SWI Structure */ + __I uint32_t UNUSED; /*!< Unused. */ +} NRF_SWI_Type; + + +/* ================================================================================ */ +/* ================ NVMC ================ */ +/* ================================================================================ */ + + +/** + * @brief Non Volatile Memory Controller. (NVMC) + */ + +typedef struct { /*!< NVMC Structure */ + __I uint32_t RESERVED0[256]; + __I uint32_t READY; /*!< Ready flag. */ + __I uint32_t RESERVED1[64]; + __IO uint32_t CONFIG; /*!< Configuration register. */ + + union { + __IO uint32_t ERASEPCR1; /*!< Register for erasing a non-protected non-volatile memory page. */ + __IO uint32_t ERASEPAGE; /*!< Register for erasing a non-protected non-volatile memory page. */ + }; + __IO uint32_t ERASEALL; /*!< Register for erasing all non-volatile user memory. */ + __IO uint32_t ERASEPCR0; /*!< Register for erasing a protected non-volatile memory page. */ + __IO uint32_t ERASEUICR; /*!< Register for start erasing User Information Congfiguration Registers. */ +} NRF_NVMC_Type; + + +/* ================================================================================ */ +/* ================ PPI ================ */ +/* ================================================================================ */ + + +/** + * @brief PPI controller. (PPI) + */ + +typedef struct { /*!< PPI Structure */ + PPI_TASKS_CHG_Type TASKS_CHG[4]; /*!< Channel group tasks. */ + __I uint32_t RESERVED0[312]; + __IO uint32_t CHEN; /*!< Channel enable. */ + __IO uint32_t CHENSET; /*!< Channel enable set. */ + __IO uint32_t CHENCLR; /*!< Channel enable clear. */ + __I uint32_t RESERVED1; + PPI_CH_Type CH[16]; /*!< PPI Channel. */ + __I uint32_t RESERVED2[156]; + __IO uint32_t CHG[4]; /*!< Channel group configuration. */ +} NRF_PPI_Type; + + +/* ================================================================================ */ +/* ================ FICR ================ */ +/* ================================================================================ */ + + +/** + * @brief Factory Information Configuration. (FICR) + */ + +typedef struct { /*!< FICR Structure */ + __I uint32_t RESERVED0[4]; + __I uint32_t CODEPAGESIZE; /*!< Code memory page size in bytes. */ + __I uint32_t CODESIZE; /*!< Code memory size in pages. */ + __I uint32_t RESERVED1[4]; + __I uint32_t CLENR0; /*!< Length of code region 0 in bytes. */ + __I uint32_t PPFC; /*!< Pre-programmed factory code present. */ + __I uint32_t RESERVED2; + __I uint32_t NUMRAMBLOCK; /*!< Number of individualy controllable RAM blocks. */ + + union { + __I uint32_t SIZERAMBLOCK[4]; /*!< Deprecated array of size of RAM block in bytes. This name is + kept for backward compatinility purposes. Use SIZERAMBLOCKS + instead. */ + __I uint32_t SIZERAMBLOCKS; /*!< Size of RAM blocks in bytes. */ + }; + __I uint32_t RESERVED3[5]; + __I uint32_t CONFIGID; /*!< Configuration identifier. */ + __I uint32_t DEVICEID[2]; /*!< Device identifier. */ + __I uint32_t RESERVED4[6]; + __I uint32_t ER[4]; /*!< Encryption root. */ + __I uint32_t IR[4]; /*!< Identity root. */ + __I uint32_t DEVICEADDRTYPE; /*!< Device address type. */ + __I uint32_t DEVICEADDR[2]; /*!< Device address. */ + __I uint32_t OVERRIDEEN; /*!< Radio calibration override enable. */ + __I uint32_t NRF_1MBIT[5]; /*!< Override values for the OVERRIDEn registers in RADIO for NRF_1Mbit + mode. */ + __I uint32_t RESERVED5[10]; + __I uint32_t BLE_1MBIT[5]; /*!< Override values for the OVERRIDEn registers in RADIO for BLE_1Mbit + mode. */ +} NRF_FICR_Type; + + +/* ================================================================================ */ +/* ================ UICR ================ */ +/* ================================================================================ */ + + +/** + * @brief User Information Configuration. (UICR) + */ + +typedef struct { /*!< UICR Structure */ + __IO uint32_t CLENR0; /*!< Length of code region 0. */ + __IO uint32_t RBPCONF; /*!< Readback protection configuration. */ + __IO uint32_t XTALFREQ; /*!< Reset value for CLOCK XTALFREQ register. */ + __I uint32_t RESERVED0; + __I uint32_t FWID; /*!< Firmware ID. */ + + union { + __IO uint32_t NRFFW[15]; /*!< Reserved for Nordic firmware design. */ + __IO uint32_t BOOTLOADERADDR; /*!< Bootloader start address. */ + }; + __IO uint32_t NRFHW[12]; /*!< Reserved for Nordic hardware design. */ + __IO uint32_t CUSTOMER[32]; /*!< Reserved for customer. */ +} NRF_UICR_Type; + + +/* ================================================================================ */ +/* ================ GPIO ================ */ +/* ================================================================================ */ + + +/** + * @brief General purpose input and output. (GPIO) + */ + +typedef struct { /*!< GPIO Structure */ + __I uint32_t RESERVED0[321]; + __IO uint32_t OUT; /*!< Write GPIO port. */ + __IO uint32_t OUTSET; /*!< Set individual bits in GPIO port. */ + __IO uint32_t OUTCLR; /*!< Clear individual bits in GPIO port. */ + __I uint32_t IN; /*!< Read GPIO port. */ + __IO uint32_t DIR; /*!< Direction of GPIO pins. */ + __IO uint32_t DIRSET; /*!< DIR set register. */ + __IO uint32_t DIRCLR; /*!< DIR clear register. */ + __I uint32_t RESERVED1[120]; + __IO uint32_t PIN_CNF[32]; /*!< Configuration of GPIO pins. */ +} NRF_GPIO_Type; + + +/* -------------------- End of section using anonymous unions ------------------- */ +#if defined(__CC_ARM) + #pragma pop +#elif defined(__ICCARM__) + /* leave anonymous unions enabled */ +#elif defined(__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined(__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined(__TASKING__) + #pragma warning restore +#else + #warning Not supported compiler type +#endif + + + + +/* ================================================================================ */ +/* ================ Peripheral memory map ================ */ +/* ================================================================================ */ + +#define NRF_POWER_BASE 0x40000000UL +#define NRF_CLOCK_BASE 0x40000000UL +#define NRF_MPU_BASE 0x40000000UL +#define NRF_RADIO_BASE 0x40001000UL +#define NRF_UART0_BASE 0x40002000UL +#define NRF_SPI0_BASE 0x40003000UL +#define NRF_TWI0_BASE 0x40003000UL +#define NRF_SPI1_BASE 0x40004000UL +#define NRF_TWI1_BASE 0x40004000UL +#define NRF_SPIS1_BASE 0x40004000UL +#define NRF_GPIOTE_BASE 0x40006000UL +#define NRF_ADC_BASE 0x40007000UL +#define NRF_TIMER0_BASE 0x40008000UL +#define NRF_TIMER1_BASE 0x40009000UL +#define NRF_TIMER2_BASE 0x4000A000UL +#define NRF_RTC0_BASE 0x4000B000UL +#define NRF_TEMP_BASE 0x4000C000UL +#define NRF_RNG_BASE 0x4000D000UL +#define NRF_ECB_BASE 0x4000E000UL +#define NRF_AAR_BASE 0x4000F000UL +#define NRF_CCM_BASE 0x4000F000UL +#define NRF_WDT_BASE 0x40010000UL +#define NRF_RTC1_BASE 0x40011000UL +#define NRF_QDEC_BASE 0x40012000UL +#define NRF_LPCOMP_BASE 0x40013000UL +#define NRF_SWI_BASE 0x40014000UL +#define NRF_NVMC_BASE 0x4001E000UL +#define NRF_PPI_BASE 0x4001F000UL +#define NRF_FICR_BASE 0x10000000UL +#define NRF_UICR_BASE 0x10001000UL +#define NRF_GPIO_BASE 0x50000000UL + + +/* ================================================================================ */ +/* ================ Peripheral declaration ================ */ +/* ================================================================================ */ + +#define NRF_POWER ((NRF_POWER_Type *) NRF_POWER_BASE) +#define NRF_CLOCK ((NRF_CLOCK_Type *) NRF_CLOCK_BASE) +#define NRF_MPU ((NRF_MPU_Type *) NRF_MPU_BASE) +#define NRF_RADIO ((NRF_RADIO_Type *) NRF_RADIO_BASE) +#define NRF_UART0 ((NRF_UART_Type *) NRF_UART0_BASE) +#define NRF_SPI0 ((NRF_SPI_Type *) NRF_SPI0_BASE) +#define NRF_TWI0 ((NRF_TWI_Type *) NRF_TWI0_BASE) +#define NRF_SPI1 ((NRF_SPI_Type *) NRF_SPI1_BASE) +#define NRF_TWI1 ((NRF_TWI_Type *) NRF_TWI1_BASE) +#define NRF_SPIS1 ((NRF_SPIS_Type *) NRF_SPIS1_BASE) +#define NRF_GPIOTE ((NRF_GPIOTE_Type *) NRF_GPIOTE_BASE) +#define NRF_ADC ((NRF_ADC_Type *) NRF_ADC_BASE) +#define NRF_TIMER0 ((NRF_TIMER_Type *) NRF_TIMER0_BASE) +#define NRF_TIMER1 ((NRF_TIMER_Type *) NRF_TIMER1_BASE) +#define NRF_TIMER2 ((NRF_TIMER_Type *) NRF_TIMER2_BASE) +#define NRF_RTC0 ((NRF_RTC_Type *) NRF_RTC0_BASE) +#define NRF_TEMP ((NRF_TEMP_Type *) NRF_TEMP_BASE) +#define NRF_RNG ((NRF_RNG_Type *) NRF_RNG_BASE) +#define NRF_ECB ((NRF_ECB_Type *) NRF_ECB_BASE) +#define NRF_AAR ((NRF_AAR_Type *) NRF_AAR_BASE) +#define NRF_CCM ((NRF_CCM_Type *) NRF_CCM_BASE) +#define NRF_WDT ((NRF_WDT_Type *) NRF_WDT_BASE) +#define NRF_RTC1 ((NRF_RTC_Type *) NRF_RTC1_BASE) +#define NRF_QDEC ((NRF_QDEC_Type *) NRF_QDEC_BASE) +#define NRF_LPCOMP ((NRF_LPCOMP_Type *) NRF_LPCOMP_BASE) +#define NRF_SWI ((NRF_SWI_Type *) NRF_SWI_BASE) +#define NRF_NVMC ((NRF_NVMC_Type *) NRF_NVMC_BASE) +#define NRF_PPI ((NRF_PPI_Type *) NRF_PPI_BASE) +#define NRF_FICR ((NRF_FICR_Type *) NRF_FICR_BASE) +#define NRF_UICR ((NRF_UICR_Type *) NRF_UICR_BASE) +#define NRF_GPIO ((NRF_GPIO_Type *) NRF_GPIO_BASE) + + +/** @} */ /* End of group Device_Peripheral_Registers */ +/** @} */ /* End of group nrf51 */ +/** @} */ /* End of group Nordic Semiconductor */ + +#ifdef __cplusplus +} +#endif + + +#endif /* nrf51_H */ + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51422_peripherals.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51422_peripherals.h new file mode 100644 index 00000000000..b65a716943a --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51422_peripherals.h @@ -0,0 +1,165 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +/* This file is deprecated */ +#ifndef _NRF51422_PERIPHERALS_H +#define _NRF51422_PERIPHERALS_H + + +/* Power Peripheral */ +#define POWER_PRESENT +#define POWER_COUNT 1 + +#define POWER_FEATURE_RAMON_REGISTERS_PRESENT + +/* Software Interrupts */ +#define SWI_PRESENT +#define SWI_COUNT 6 + +/* GPIO */ +#define GPIO_PRESENT +#define GPIO_COUNT 1 + +#define P0_PIN_NUM 32 + +/* MPU and BPROT */ +#define BPROT_PRESENT + +#define BPROT_REGIONS_SIZE 4096 +#define BPROT_REGIONS_NUM 64 + +/* Radio */ +#define RADIO_PRESENT +#define RADIO_COUNT 1 + +/* Accelerated Address Resolver */ +#define AAR_PRESENT +#define AAR_COUNT 1 + +#define AAR_MAX_IRK_NUM 8 + +/* AES Electronic CodeBook mode encryption */ +#define ECB_PRESENT +#define ECB_COUNT 1 + +/* AES CCM mode encryption */ +#define CCM_PRESENT +#define CCM_COUNT 1 + +/* Peripheral to Peripheral Interconnect */ +#define PPI_PRESENT +#define PPI_COUNT 1 + +#define PPI_CH_NUM 16 +#define PPI_FIXED_CH_NUM 12 +#define PPI_GROUP_NUM 4 + +/* Timer/Counter */ +#define TIMER_PRESENT +#define TIMER_COUNT 3 + +#define TIMER0_MAX_SIZE 32 +#define TIMER1_MAX_SIZE 16 +#define TIMER2_MAX_SIZE 16 + +#define TIMER0_CC_NUM 4 +#define TIMER1_CC_NUM 4 +#define TIMER2_CC_NUM 4 + +/* Real Time Counter */ +#define RTC_PRESENT +#define RTC_COUNT 2 + +#define RTC0_CC_NUM 3 +#define RTC1_CC_NUM 4 + +/* RNG */ +#define RNG_PRESENT +#define RNG_COUNT 1 + +/* Watchdog Timer */ +#define WDT_PRESENT +#define WDT_COUNT 1 + +/* Temperature Sensor */ +#define TEMP_PRESENT +#define TEMP_COUNT 1 + +/* Serial Peripheral Interface Master */ +#define SPI_PRESENT +#define SPI_COUNT 2 + +/* Serial Peripheral Interface Slave with DMA */ +#define SPIS_PRESENT +#define SPIS_COUNT 1 + +#define SPIS1_EASYDMA_MAXCNT_SIZE 8 + +/* Two Wire Interface Master */ +#define TWI_PRESENT +#define TWI_COUNT 2 + +/* Universal Asynchronous Receiver-Transmitter */ +#define UART_PRESENT +#define UART_COUNT 1 + +/* Quadrature Decoder */ +#define QDEC_PRESENT +#define QDEC_COUNT 1 + +/* Analog to Digital Converter */ +#define ADC_PRESENT +#define ADC_COUNT 1 + +/* GPIO Tasks and Events */ +#define GPIOTE_PRESENT +#define GPIOTE_COUNT 1 + +#define GPIOTE_CH_NUM 4 + +/* Low Power Comparator */ +#define LPCOMP_PRESENT +#define LPCOMP_COUNT 1 + +#define LPCOMP_REFSEL_RESOLUTION 8 + + +#endif // _NRF51422_PERIPHERALS_H diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51801_peripherals.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51801_peripherals.h new file mode 100644 index 00000000000..28de185b1b5 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51801_peripherals.h @@ -0,0 +1,165 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +/* This file is deprecated */ +#ifndef _NRF51801_PERIPHERALS_H +#define _NRF51801_PERIPHERALS_H + + +/* Power Peripheral */ +#define POWER_PRESENT +#define POWER_COUNT 1 + +#define POWER_FEATURE_RAMON_REGISTERS_PRESENT + +/* Software Interrupts */ +#define SWI_PRESENT +#define SWI_COUNT 6 + +/* GPIO */ +#define GPIO_PRESENT +#define GPIO_COUNT 1 + +#define P0_PIN_NUM 32 + +/* MPU and BPROT */ +#define BPROT_PRESENT + +#define BPROT_REGIONS_SIZE 4096 +#define BPROT_REGIONS_NUM 64 + +/* Radio */ +#define RADIO_PRESENT +#define RADIO_COUNT 1 + +/* Accelerated Address Resolver */ +#define AAR_PRESENT +#define AAR_COUNT 1 + +#define AAR_MAX_IRK_NUM 8 + +/* AES Electronic CodeBook mode encryption */ +#define ECB_PRESENT +#define ECB_COUNT 1 + +/* AES CCM mode encryption */ +#define CCM_PRESENT +#define CCM_COUNT 1 + +/* Peripheral to Peripheral Interconnect */ +#define PPI_PRESENT +#define PPI_COUNT 1 + +#define PPI_CH_NUM 16 +#define PPI_FIXED_CH_NUM 12 +#define PPI_GROUP_NUM 4 + +/* Timer/Counter */ +#define TIMER_PRESENT +#define TIMER_COUNT 3 + +#define TIMER0_MAX_SIZE 32 +#define TIMER1_MAX_SIZE 16 +#define TIMER2_MAX_SIZE 16 + +#define TIMER0_CC_NUM 4 +#define TIMER1_CC_NUM 4 +#define TIMER2_CC_NUM 4 + +/* Real Time Counter */ +#define RTC_PRESENT +#define RTC_COUNT 2 + +#define RTC0_CC_NUM 3 +#define RTC1_CC_NUM 4 + +/* RNG */ +#define RNG_PRESENT +#define RNG_COUNT 1 + +/* Watchdog Timer */ +#define WDT_PRESENT +#define WDT_COUNT 1 + +/* Temperature Sensor */ +#define TEMP_PRESENT +#define TEMP_COUNT 1 + +/* Serial Peripheral Interface Master */ +#define SPI_PRESENT +#define SPI_COUNT 2 + +/* Serial Peripheral Interface Slave with DMA */ +#define SPIS_PRESENT +#define SPIS_COUNT 1 + +#define SPIS1_EASYDMA_MAXCNT_SIZE 8 + +/* Two Wire Interface Master */ +#define TWI_PRESENT +#define TWI_COUNT 2 + +/* Universal Asynchronous Receiver-Transmitter */ +#define UART_PRESENT +#define UART_COUNT 1 + +/* Quadrature Decoder */ +#define QDEC_PRESENT +#define QDEC_COUNT 1 + +/* Analog to Digital Converter */ +#define ADC_PRESENT +#define ADC_COUNT 1 + +/* GPIO Tasks and Events */ +#define GPIOTE_PRESENT +#define GPIOTE_COUNT 1 + +#define GPIOTE_CH_NUM 4 + +/* Low Power Comparator */ +#define LPCOMP_PRESENT +#define LPCOMP_COUNT 1 + +#define LPCOMP_REFSEL_RESOLUTION 8 + + +#endif // _NRF51801_PERIPHERALS_H diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51802_peripherals.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51802_peripherals.h new file mode 100644 index 00000000000..06d77bc6620 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51802_peripherals.h @@ -0,0 +1,165 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +/* This file is deprecated */ +#ifndef _NRF51802_PERIPHERALS_H +#define _NRF51802_PERIPHERALS_H + + +/* Power Peripheral */ +#define POWER_PRESENT +#define POWER_COUNT 1 + +#define POWER_FEATURE_RAMON_REGISTERS_PRESENT + +/* Software Interrupts */ +#define SWI_PRESENT +#define SWI_COUNT 6 + +/* GPIO */ +#define GPIO_PRESENT +#define GPIO_COUNT 1 + +#define P0_PIN_NUM 32 + +/* MPU and BPROT */ +#define BPROT_PRESENT + +#define BPROT_REGIONS_SIZE 4096 +#define BPROT_REGIONS_NUM 64 + +/* Radio */ +#define RADIO_PRESENT +#define RADIO_COUNT 1 + +/* Accelerated Address Resolver */ +#define AAR_PRESENT +#define AAR_COUNT 1 + +#define AAR_MAX_IRK_NUM 8 + +/* AES Electronic CodeBook mode encryption */ +#define ECB_PRESENT +#define ECB_COUNT 1 + +/* AES CCM mode encryption */ +#define CCM_PRESENT +#define CCM_COUNT 1 + +/* Peripheral to Peripheral Interconnect */ +#define PPI_PRESENT +#define PPI_COUNT 1 + +#define PPI_CH_NUM 16 +#define PPI_FIXED_CH_NUM 12 +#define PPI_GROUP_NUM 4 + +/* Timer/Counter */ +#define TIMER_PRESENT +#define TIMER_COUNT 3 + +#define TIMER0_MAX_SIZE 32 +#define TIMER1_MAX_SIZE 16 +#define TIMER2_MAX_SIZE 16 + +#define TIMER0_CC_NUM 4 +#define TIMER1_CC_NUM 4 +#define TIMER2_CC_NUM 4 + +/* Real Time Counter */ +#define RTC_PRESENT +#define RTC_COUNT 2 + +#define RTC0_CC_NUM 3 +#define RTC1_CC_NUM 4 + +/* RNG */ +#define RNG_PRESENT +#define RNG_COUNT 1 + +/* Watchdog Timer */ +#define WDT_PRESENT +#define WDT_COUNT 1 + +/* Temperature Sensor */ +#define TEMP_PRESENT +#define TEMP_COUNT 1 + +/* Serial Peripheral Interface Master */ +#define SPI_PRESENT +#define SPI_COUNT 2 + +/* Serial Peripheral Interface Slave with DMA */ +#define SPIS_PRESENT +#define SPIS_COUNT 1 + +#define SPIS1_EASYDMA_MAXCNT_SIZE 8 + +/* Two Wire Interface Master */ +#define TWI_PRESENT +#define TWI_COUNT 2 + +/* Universal Asynchronous Receiver-Transmitter */ +#define UART_PRESENT +#define UART_COUNT 1 + +/* Quadrature Decoder */ +#define QDEC_PRESENT +#define QDEC_COUNT 1 + +/* Analog to Digital Converter */ +#define ADC_PRESENT +#define ADC_COUNT 1 + +/* GPIO Tasks and Events */ +#define GPIOTE_PRESENT +#define GPIOTE_COUNT 1 + +#define GPIOTE_CH_NUM 4 + +/* Low Power Comparator */ +#define LPCOMP_PRESENT +#define LPCOMP_COUNT 1 + +#define LPCOMP_REFSEL_RESOLUTION 8 + + +#endif // _NRF51802_PERIPHERALS_H diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51822_peripherals.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51822_peripherals.h new file mode 100644 index 00000000000..b9a890abb25 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51822_peripherals.h @@ -0,0 +1,166 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + + +/* This file is deprecated */ +#ifndef _NRF51822_PERIPHERALS_H +#define _NRF51822_PERIPHERALS_H + + +/* Power Peripheral */ +#define POWER_PRESENT +#define POWER_COUNT 1 + +#define POWER_FEATURE_RAMON_REGISTERS_PRESENT + +/* Software Interrupts */ +#define SWI_PRESENT +#define SWI_COUNT 6 + +/* GPIO */ +#define GPIO_PRESENT +#define GPIO_COUNT 1 + +#define P0_PIN_NUM 32 + +/* MPU and BPROT */ +#define BPROT_PRESENT + +#define BPROT_REGIONS_SIZE 4096 +#define BPROT_REGIONS_NUM 64 + +/* Radio */ +#define RADIO_PRESENT +#define RADIO_COUNT 1 + +/* Accelerated Address Resolver */ +#define AAR_PRESENT +#define AAR_COUNT 1 + +#define AAR_MAX_IRK_NUM 8 + +/* AES Electronic CodeBook mode encryption */ +#define ECB_PRESENT +#define ECB_COUNT 1 + +/* AES CCM mode encryption */ +#define CCM_PRESENT +#define CCM_COUNT 1 + +/* Peripheral to Peripheral Interconnect */ +#define PPI_PRESENT +#define PPI_COUNT 1 + +#define PPI_CH_NUM 16 +#define PPI_FIXED_CH_NUM 12 +#define PPI_GROUP_NUM 4 + +/* Timer/Counter */ +#define TIMER_PRESENT +#define TIMER_COUNT 3 + +#define TIMER0_MAX_SIZE 32 +#define TIMER1_MAX_SIZE 16 +#define TIMER2_MAX_SIZE 16 + +#define TIMER0_CC_NUM 4 +#define TIMER1_CC_NUM 4 +#define TIMER2_CC_NUM 4 + +/* Real Time Counter */ +#define RTC_PRESENT +#define RTC_COUNT 2 + +#define RTC0_CC_NUM 3 +#define RTC1_CC_NUM 4 + +/* RNG */ +#define RNG_PRESENT +#define RNG_COUNT 1 + +/* Watchdog Timer */ +#define WDT_PRESENT +#define WDT_COUNT 1 + +/* Temperature Sensor */ +#define TEMP_PRESENT +#define TEMP_COUNT 1 + +/* Serial Peripheral Interface Master */ +#define SPI_PRESENT +#define SPI_COUNT 2 + +/* Serial Peripheral Interface Slave with DMA */ +#define SPIS_PRESENT +#define SPIS_COUNT 1 + +#define SPIS1_EASYDMA_MAXCNT_SIZE 8 + +/* Two Wire Interface Master */ +#define TWI_PRESENT +#define TWI_COUNT 2 + +/* Universal Asynchronous Receiver-Transmitter */ +#define UART_PRESENT +#define UART_COUNT 1 + +/* Quadrature Decoder */ +#define QDEC_PRESENT +#define QDEC_COUNT 1 + +/* Analog to Digital Converter */ +#define ADC_PRESENT +#define ADC_COUNT 1 + +/* GPIO Tasks and Events */ +#define GPIOTE_PRESENT +#define GPIOTE_COUNT 1 + +#define GPIOTE_CH_NUM 4 + +/* Low Power Comparator */ +#define LPCOMP_PRESENT +#define LPCOMP_COUNT 1 + +#define LPCOMP_REFSEL_RESOLUTION 8 + + +#endif // _NRF51822_PERIPHERALS_H diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51824_peripherals.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51824_peripherals.h new file mode 100644 index 00000000000..36ff87da44c --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51824_peripherals.h @@ -0,0 +1,166 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + + +/* This file is deprecated */ +#ifndef _NRF51824_PERIPHERALS_H +#define _NRF51824_PERIPHERALS_H + + +/* Power Peripheral */ +#define POWER_PRESENT +#define POWER_COUNT 1 + +#define POWER_FEATURE_RAMON_REGISTERS_PRESENT + +/* Software Interrupts */ +#define SWI_PRESENT +#define SWI_COUNT 6 + +/* GPIO */ +#define GPIO_PRESENT +#define GPIO_COUNT 1 + +#define P0_PIN_NUM 32 + +/* MPU and BPROT */ +#define BPROT_PRESENT + +#define BPROT_REGIONS_SIZE 4096 +#define BPROT_REGIONS_NUM 64 + +/* Radio */ +#define RADIO_PRESENT +#define RADIO_COUNT 1 + +/* Accelerated Address Resolver */ +#define AAR_PRESENT +#define AAR_COUNT 1 + +#define AAR_MAX_IRK_NUM 8 + +/* AES Electronic CodeBook mode encryption */ +#define ECB_PRESENT +#define ECB_COUNT 1 + +/* AES CCM mode encryption */ +#define CCM_PRESENT +#define CCM_COUNT 1 + +/* Peripheral to Peripheral Interconnect */ +#define PPI_PRESENT +#define PPI_COUNT 1 + +#define PPI_CH_NUM 16 +#define PPI_FIXED_CH_NUM 12 +#define PPI_GROUP_NUM 4 + +/* Timer/Counter */ +#define TIMER_PRESENT +#define TIMER_COUNT 3 + +#define TIMER0_MAX_SIZE 32 +#define TIMER1_MAX_SIZE 16 +#define TIMER2_MAX_SIZE 16 + +#define TIMER0_CC_NUM 4 +#define TIMER1_CC_NUM 4 +#define TIMER2_CC_NUM 4 + +/* Real Time Counter */ +#define RTC_PRESENT +#define RTC_COUNT 2 + +#define RTC0_CC_NUM 3 +#define RTC1_CC_NUM 4 + +/* RNG */ +#define RNG_PRESENT +#define RNG_COUNT 1 + +/* Watchdog Timer */ +#define WDT_PRESENT +#define WDT_COUNT 1 + +/* Temperature Sensor */ +#define TEMP_PRESENT +#define TEMP_COUNT 1 + +/* Serial Peripheral Interface Master */ +#define SPI_PRESENT +#define SPI_COUNT 2 + +/* Serial Peripheral Interface Slave with DMA */ +#define SPIS_PRESENT +#define SPIS_COUNT 1 + +#define SPIS1_EASYDMA_MAXCNT_SIZE 8 + +/* Two Wire Interface Master */ +#define TWI_PRESENT +#define TWI_COUNT 2 + +/* Universal Asynchronous Receiver-Transmitter */ +#define UART_PRESENT +#define UART_COUNT 1 + +/* Quadrature Decoder */ +#define QDEC_PRESENT +#define QDEC_COUNT 1 + +/* Analog to Digital Converter */ +#define ADC_PRESENT +#define ADC_COUNT 1 + +/* GPIO Tasks and Events */ +#define GPIOTE_PRESENT +#define GPIOTE_COUNT 1 + +#define GPIOTE_CH_NUM 4 + +/* Low Power Comparator */ +#define LPCOMP_PRESENT +#define LPCOMP_COUNT 1 + +#define LPCOMP_REFSEL_RESOLUTION 8 + + +#endif // _NRF51824_PERIPHERALS_H diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51_bitfields.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51_bitfields.h new file mode 100644 index 00000000000..007b3379687 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51_bitfields.h @@ -0,0 +1,6140 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +#ifndef __NRF51_BITS_H +#define __NRF51_BITS_H + +/*lint ++flb "Enter library region" */ + +/* Peripheral: AAR */ +/* Description: Accelerated Address Resolver. */ + +/* Register: AAR_INTENSET */ +/* Description: Interrupt enable set register. */ + +/* Bit 2 : Enable interrupt on NOTRESOLVED event. */ +#define AAR_INTENSET_NOTRESOLVED_Pos (2UL) /*!< Position of NOTRESOLVED field. */ +#define AAR_INTENSET_NOTRESOLVED_Msk (0x1UL << AAR_INTENSET_NOTRESOLVED_Pos) /*!< Bit mask of NOTRESOLVED field. */ +#define AAR_INTENSET_NOTRESOLVED_Disabled (0UL) /*!< Interrupt disabled. */ +#define AAR_INTENSET_NOTRESOLVED_Enabled (1UL) /*!< Interrupt enabled. */ +#define AAR_INTENSET_NOTRESOLVED_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 1 : Enable interrupt on RESOLVED event. */ +#define AAR_INTENSET_RESOLVED_Pos (1UL) /*!< Position of RESOLVED field. */ +#define AAR_INTENSET_RESOLVED_Msk (0x1UL << AAR_INTENSET_RESOLVED_Pos) /*!< Bit mask of RESOLVED field. */ +#define AAR_INTENSET_RESOLVED_Disabled (0UL) /*!< Interrupt disabled. */ +#define AAR_INTENSET_RESOLVED_Enabled (1UL) /*!< Interrupt enabled. */ +#define AAR_INTENSET_RESOLVED_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 0 : Enable interrupt on END event. */ +#define AAR_INTENSET_END_Pos (0UL) /*!< Position of END field. */ +#define AAR_INTENSET_END_Msk (0x1UL << AAR_INTENSET_END_Pos) /*!< Bit mask of END field. */ +#define AAR_INTENSET_END_Disabled (0UL) /*!< Interrupt disabled. */ +#define AAR_INTENSET_END_Enabled (1UL) /*!< Interrupt enabled. */ +#define AAR_INTENSET_END_Set (1UL) /*!< Enable interrupt on write. */ + +/* Register: AAR_INTENCLR */ +/* Description: Interrupt enable clear register. */ + +/* Bit 2 : Disable interrupt on NOTRESOLVED event. */ +#define AAR_INTENCLR_NOTRESOLVED_Pos (2UL) /*!< Position of NOTRESOLVED field. */ +#define AAR_INTENCLR_NOTRESOLVED_Msk (0x1UL << AAR_INTENCLR_NOTRESOLVED_Pos) /*!< Bit mask of NOTRESOLVED field. */ +#define AAR_INTENCLR_NOTRESOLVED_Disabled (0UL) /*!< Interrupt disabled. */ +#define AAR_INTENCLR_NOTRESOLVED_Enabled (1UL) /*!< Interrupt enabled. */ +#define AAR_INTENCLR_NOTRESOLVED_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 1 : Disable interrupt on RESOLVED event. */ +#define AAR_INTENCLR_RESOLVED_Pos (1UL) /*!< Position of RESOLVED field. */ +#define AAR_INTENCLR_RESOLVED_Msk (0x1UL << AAR_INTENCLR_RESOLVED_Pos) /*!< Bit mask of RESOLVED field. */ +#define AAR_INTENCLR_RESOLVED_Disabled (0UL) /*!< Interrupt disabled. */ +#define AAR_INTENCLR_RESOLVED_Enabled (1UL) /*!< Interrupt enabled. */ +#define AAR_INTENCLR_RESOLVED_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 0 : Disable interrupt on ENDKSGEN event. */ +#define AAR_INTENCLR_END_Pos (0UL) /*!< Position of END field. */ +#define AAR_INTENCLR_END_Msk (0x1UL << AAR_INTENCLR_END_Pos) /*!< Bit mask of END field. */ +#define AAR_INTENCLR_END_Disabled (0UL) /*!< Interrupt disabled. */ +#define AAR_INTENCLR_END_Enabled (1UL) /*!< Interrupt enabled. */ +#define AAR_INTENCLR_END_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Register: AAR_STATUS */ +/* Description: Resolution status. */ + +/* Bits 3..0 : The IRK used last time an address was resolved. */ +#define AAR_STATUS_STATUS_Pos (0UL) /*!< Position of STATUS field. */ +#define AAR_STATUS_STATUS_Msk (0xFUL << AAR_STATUS_STATUS_Pos) /*!< Bit mask of STATUS field. */ + +/* Register: AAR_ENABLE */ +/* Description: Enable AAR. */ + +/* Bits 1..0 : Enable AAR. */ +#define AAR_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define AAR_ENABLE_ENABLE_Msk (0x3UL << AAR_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define AAR_ENABLE_ENABLE_Disabled (0x00UL) /*!< Disabled AAR. */ +#define AAR_ENABLE_ENABLE_Enabled (0x03UL) /*!< Enable AAR. */ + +/* Register: AAR_NIRK */ +/* Description: Number of Identity root Keys in the IRK data structure. */ + +/* Bits 4..0 : Number of Identity root Keys in the IRK data structure. */ +#define AAR_NIRK_NIRK_Pos (0UL) /*!< Position of NIRK field. */ +#define AAR_NIRK_NIRK_Msk (0x1FUL << AAR_NIRK_NIRK_Pos) /*!< Bit mask of NIRK field. */ + +/* Register: AAR_POWER */ +/* Description: Peripheral power control. */ + +/* Bit 0 : Peripheral power control. */ +#define AAR_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ +#define AAR_POWER_POWER_Msk (0x1UL << AAR_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ +#define AAR_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ +#define AAR_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ + + +/* Peripheral: ADC */ +/* Description: Analog to digital converter. */ + +/* Register: ADC_INTENSET */ +/* Description: Interrupt enable set register. */ + +/* Bit 0 : Enable interrupt on END event. */ +#define ADC_INTENSET_END_Pos (0UL) /*!< Position of END field. */ +#define ADC_INTENSET_END_Msk (0x1UL << ADC_INTENSET_END_Pos) /*!< Bit mask of END field. */ +#define ADC_INTENSET_END_Disabled (0UL) /*!< Interrupt disabled. */ +#define ADC_INTENSET_END_Enabled (1UL) /*!< Interrupt enabled. */ +#define ADC_INTENSET_END_Set (1UL) /*!< Enable interrupt on write. */ + +/* Register: ADC_INTENCLR */ +/* Description: Interrupt enable clear register. */ + +/* Bit 0 : Disable interrupt on END event. */ +#define ADC_INTENCLR_END_Pos (0UL) /*!< Position of END field. */ +#define ADC_INTENCLR_END_Msk (0x1UL << ADC_INTENCLR_END_Pos) /*!< Bit mask of END field. */ +#define ADC_INTENCLR_END_Disabled (0UL) /*!< Interrupt disabled. */ +#define ADC_INTENCLR_END_Enabled (1UL) /*!< Interrupt enabled. */ +#define ADC_INTENCLR_END_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Register: ADC_BUSY */ +/* Description: ADC busy register. */ + +/* Bit 0 : ADC busy register. */ +#define ADC_BUSY_BUSY_Pos (0UL) /*!< Position of BUSY field. */ +#define ADC_BUSY_BUSY_Msk (0x1UL << ADC_BUSY_BUSY_Pos) /*!< Bit mask of BUSY field. */ +#define ADC_BUSY_BUSY_Ready (0UL) /*!< No ongoing ADC conversion is taking place. ADC is ready. */ +#define ADC_BUSY_BUSY_Busy (1UL) /*!< An ADC conversion is taking place. ADC is busy. */ + +/* Register: ADC_ENABLE */ +/* Description: ADC enable. */ + +/* Bits 1..0 : ADC enable. */ +#define ADC_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define ADC_ENABLE_ENABLE_Msk (0x3UL << ADC_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define ADC_ENABLE_ENABLE_Disabled (0x00UL) /*!< ADC is disabled. */ +#define ADC_ENABLE_ENABLE_Enabled (0x01UL) /*!< ADC is enabled. If an analog input pin is selected as source of the conversion, the selected pin is configured as an analog input. */ + +/* Register: ADC_CONFIG */ +/* Description: ADC configuration register. */ + +/* Bits 17..16 : ADC external reference pin selection. */ +#define ADC_CONFIG_EXTREFSEL_Pos (16UL) /*!< Position of EXTREFSEL field. */ +#define ADC_CONFIG_EXTREFSEL_Msk (0x3UL << ADC_CONFIG_EXTREFSEL_Pos) /*!< Bit mask of EXTREFSEL field. */ +#define ADC_CONFIG_EXTREFSEL_None (0UL) /*!< Analog external reference inputs disabled. */ +#define ADC_CONFIG_EXTREFSEL_AnalogReference0 (1UL) /*!< Use analog reference 0 as reference. */ +#define ADC_CONFIG_EXTREFSEL_AnalogReference1 (2UL) /*!< Use analog reference 1 as reference. */ + +/* Bits 15..8 : ADC analog pin selection. */ +#define ADC_CONFIG_PSEL_Pos (8UL) /*!< Position of PSEL field. */ +#define ADC_CONFIG_PSEL_Msk (0xFFUL << ADC_CONFIG_PSEL_Pos) /*!< Bit mask of PSEL field. */ +#define ADC_CONFIG_PSEL_Disabled (0UL) /*!< Analog input pins disabled. */ +#define ADC_CONFIG_PSEL_AnalogInput0 (1UL) /*!< Use analog input 0 as analog input. */ +#define ADC_CONFIG_PSEL_AnalogInput1 (2UL) /*!< Use analog input 1 as analog input. */ +#define ADC_CONFIG_PSEL_AnalogInput2 (4UL) /*!< Use analog input 2 as analog input. */ +#define ADC_CONFIG_PSEL_AnalogInput3 (8UL) /*!< Use analog input 3 as analog input. */ +#define ADC_CONFIG_PSEL_AnalogInput4 (16UL) /*!< Use analog input 4 as analog input. */ +#define ADC_CONFIG_PSEL_AnalogInput5 (32UL) /*!< Use analog input 5 as analog input. */ +#define ADC_CONFIG_PSEL_AnalogInput6 (64UL) /*!< Use analog input 6 as analog input. */ +#define ADC_CONFIG_PSEL_AnalogInput7 (128UL) /*!< Use analog input 7 as analog input. */ + +/* Bits 6..5 : ADC reference selection. */ +#define ADC_CONFIG_REFSEL_Pos (5UL) /*!< Position of REFSEL field. */ +#define ADC_CONFIG_REFSEL_Msk (0x3UL << ADC_CONFIG_REFSEL_Pos) /*!< Bit mask of REFSEL field. */ +#define ADC_CONFIG_REFSEL_VBG (0x00UL) /*!< Use internal 1.2V bandgap voltage as reference for conversion. */ +#define ADC_CONFIG_REFSEL_External (0x01UL) /*!< Use external source configured by EXTREFSEL as reference for conversion. */ +#define ADC_CONFIG_REFSEL_SupplyOneHalfPrescaling (0x02UL) /*!< Use supply voltage with 1/2 prescaling as reference for conversion. Only usable when supply voltage is between 1.7V and 2.6V. */ +#define ADC_CONFIG_REFSEL_SupplyOneThirdPrescaling (0x03UL) /*!< Use supply voltage with 1/3 prescaling as reference for conversion. Only usable when supply voltage is between 2.5V and 3.6V. */ + +/* Bits 4..2 : ADC input selection. */ +#define ADC_CONFIG_INPSEL_Pos (2UL) /*!< Position of INPSEL field. */ +#define ADC_CONFIG_INPSEL_Msk (0x7UL << ADC_CONFIG_INPSEL_Pos) /*!< Bit mask of INPSEL field. */ +#define ADC_CONFIG_INPSEL_AnalogInputNoPrescaling (0x00UL) /*!< Analog input specified by PSEL with no prescaling used as input for the conversion. */ +#define ADC_CONFIG_INPSEL_AnalogInputTwoThirdsPrescaling (0x01UL) /*!< Analog input specified by PSEL with 2/3 prescaling used as input for the conversion. */ +#define ADC_CONFIG_INPSEL_AnalogInputOneThirdPrescaling (0x02UL) /*!< Analog input specified by PSEL with 1/3 prescaling used as input for the conversion. */ +#define ADC_CONFIG_INPSEL_SupplyTwoThirdsPrescaling (0x05UL) /*!< Supply voltage with 2/3 prescaling used as input for the conversion. */ +#define ADC_CONFIG_INPSEL_SupplyOneThirdPrescaling (0x06UL) /*!< Supply voltage with 1/3 prescaling used as input for the conversion. */ + +/* Bits 1..0 : ADC resolution. */ +#define ADC_CONFIG_RES_Pos (0UL) /*!< Position of RES field. */ +#define ADC_CONFIG_RES_Msk (0x3UL << ADC_CONFIG_RES_Pos) /*!< Bit mask of RES field. */ +#define ADC_CONFIG_RES_8bit (0x00UL) /*!< 8bit ADC resolution. */ +#define ADC_CONFIG_RES_9bit (0x01UL) /*!< 9bit ADC resolution. */ +#define ADC_CONFIG_RES_10bit (0x02UL) /*!< 10bit ADC resolution. */ + +/* Register: ADC_RESULT */ +/* Description: Result of ADC conversion. */ + +/* Bits 9..0 : Result of ADC conversion. */ +#define ADC_RESULT_RESULT_Pos (0UL) /*!< Position of RESULT field. */ +#define ADC_RESULT_RESULT_Msk (0x3FFUL << ADC_RESULT_RESULT_Pos) /*!< Bit mask of RESULT field. */ + +/* Register: ADC_POWER */ +/* Description: Peripheral power control. */ + +/* Bit 0 : Peripheral power control. */ +#define ADC_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ +#define ADC_POWER_POWER_Msk (0x1UL << ADC_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ +#define ADC_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ +#define ADC_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ + + +/* Peripheral: CCM */ +/* Description: AES CCM Mode Encryption. */ + +/* Register: CCM_SHORTS */ +/* Description: Shortcuts for the CCM. */ + +/* Bit 0 : Shortcut between ENDKSGEN event and CRYPT task. */ +#define CCM_SHORTS_ENDKSGEN_CRYPT_Pos (0UL) /*!< Position of ENDKSGEN_CRYPT field. */ +#define CCM_SHORTS_ENDKSGEN_CRYPT_Msk (0x1UL << CCM_SHORTS_ENDKSGEN_CRYPT_Pos) /*!< Bit mask of ENDKSGEN_CRYPT field. */ +#define CCM_SHORTS_ENDKSGEN_CRYPT_Disabled (0UL) /*!< Shortcut disabled. */ +#define CCM_SHORTS_ENDKSGEN_CRYPT_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Register: CCM_INTENSET */ +/* Description: Interrupt enable set register. */ + +/* Bit 2 : Enable interrupt on ERROR event. */ +#define CCM_INTENSET_ERROR_Pos (2UL) /*!< Position of ERROR field. */ +#define CCM_INTENSET_ERROR_Msk (0x1UL << CCM_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define CCM_INTENSET_ERROR_Disabled (0UL) /*!< Interrupt disabled. */ +#define CCM_INTENSET_ERROR_Enabled (1UL) /*!< Interrupt enabled. */ +#define CCM_INTENSET_ERROR_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 1 : Enable interrupt on ENDCRYPT event. */ +#define CCM_INTENSET_ENDCRYPT_Pos (1UL) /*!< Position of ENDCRYPT field. */ +#define CCM_INTENSET_ENDCRYPT_Msk (0x1UL << CCM_INTENSET_ENDCRYPT_Pos) /*!< Bit mask of ENDCRYPT field. */ +#define CCM_INTENSET_ENDCRYPT_Disabled (0UL) /*!< Interrupt disabled. */ +#define CCM_INTENSET_ENDCRYPT_Enabled (1UL) /*!< Interrupt enabled. */ +#define CCM_INTENSET_ENDCRYPT_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 0 : Enable interrupt on ENDKSGEN event. */ +#define CCM_INTENSET_ENDKSGEN_Pos (0UL) /*!< Position of ENDKSGEN field. */ +#define CCM_INTENSET_ENDKSGEN_Msk (0x1UL << CCM_INTENSET_ENDKSGEN_Pos) /*!< Bit mask of ENDKSGEN field. */ +#define CCM_INTENSET_ENDKSGEN_Disabled (0UL) /*!< Interrupt disabled. */ +#define CCM_INTENSET_ENDKSGEN_Enabled (1UL) /*!< Interrupt enabled. */ +#define CCM_INTENSET_ENDKSGEN_Set (1UL) /*!< Enable interrupt on write. */ + +/* Register: CCM_INTENCLR */ +/* Description: Interrupt enable clear register. */ + +/* Bit 2 : Disable interrupt on ERROR event. */ +#define CCM_INTENCLR_ERROR_Pos (2UL) /*!< Position of ERROR field. */ +#define CCM_INTENCLR_ERROR_Msk (0x1UL << CCM_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define CCM_INTENCLR_ERROR_Disabled (0UL) /*!< Interrupt disabled. */ +#define CCM_INTENCLR_ERROR_Enabled (1UL) /*!< Interrupt enabled. */ +#define CCM_INTENCLR_ERROR_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 1 : Disable interrupt on ENDCRYPT event. */ +#define CCM_INTENCLR_ENDCRYPT_Pos (1UL) /*!< Position of ENDCRYPT field. */ +#define CCM_INTENCLR_ENDCRYPT_Msk (0x1UL << CCM_INTENCLR_ENDCRYPT_Pos) /*!< Bit mask of ENDCRYPT field. */ +#define CCM_INTENCLR_ENDCRYPT_Disabled (0UL) /*!< Interrupt disabled. */ +#define CCM_INTENCLR_ENDCRYPT_Enabled (1UL) /*!< Interrupt enabled. */ +#define CCM_INTENCLR_ENDCRYPT_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 0 : Disable interrupt on ENDKSGEN event. */ +#define CCM_INTENCLR_ENDKSGEN_Pos (0UL) /*!< Position of ENDKSGEN field. */ +#define CCM_INTENCLR_ENDKSGEN_Msk (0x1UL << CCM_INTENCLR_ENDKSGEN_Pos) /*!< Bit mask of ENDKSGEN field. */ +#define CCM_INTENCLR_ENDKSGEN_Disabled (0UL) /*!< Interrupt disabled. */ +#define CCM_INTENCLR_ENDKSGEN_Enabled (1UL) /*!< Interrupt enabled. */ +#define CCM_INTENCLR_ENDKSGEN_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Register: CCM_MICSTATUS */ +/* Description: CCM RX MIC check result. */ + +/* Bit 0 : Result of the MIC check performed during the previous CCM RX STARTCRYPT */ +#define CCM_MICSTATUS_MICSTATUS_Pos (0UL) /*!< Position of MICSTATUS field. */ +#define CCM_MICSTATUS_MICSTATUS_Msk (0x1UL << CCM_MICSTATUS_MICSTATUS_Pos) /*!< Bit mask of MICSTATUS field. */ +#define CCM_MICSTATUS_MICSTATUS_CheckFailed (0UL) /*!< MIC check failed. */ +#define CCM_MICSTATUS_MICSTATUS_CheckPassed (1UL) /*!< MIC check passed. */ + +/* Register: CCM_ENABLE */ +/* Description: CCM enable. */ + +/* Bits 1..0 : CCM enable. */ +#define CCM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define CCM_ENABLE_ENABLE_Msk (0x3UL << CCM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define CCM_ENABLE_ENABLE_Disabled (0x00UL) /*!< CCM is disabled. */ +#define CCM_ENABLE_ENABLE_Enabled (0x02UL) /*!< CCM is enabled. */ + +/* Register: CCM_MODE */ +/* Description: Operation mode. */ + +/* Bit 0 : CCM mode operation. */ +#define CCM_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ +#define CCM_MODE_MODE_Msk (0x1UL << CCM_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ +#define CCM_MODE_MODE_Encryption (0UL) /*!< CCM mode TX */ +#define CCM_MODE_MODE_Decryption (1UL) /*!< CCM mode TX */ + +/* Register: CCM_POWER */ +/* Description: Peripheral power control. */ + +/* Bit 0 : Peripheral power control. */ +#define CCM_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ +#define CCM_POWER_POWER_Msk (0x1UL << CCM_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ +#define CCM_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ +#define CCM_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ + + +/* Peripheral: CLOCK */ +/* Description: Clock control. */ + +/* Register: CLOCK_INTENSET */ +/* Description: Interrupt enable set register. */ + +/* Bit 4 : Enable interrupt on CTTO event. */ +#define CLOCK_INTENSET_CTTO_Pos (4UL) /*!< Position of CTTO field. */ +#define CLOCK_INTENSET_CTTO_Msk (0x1UL << CLOCK_INTENSET_CTTO_Pos) /*!< Bit mask of CTTO field. */ +#define CLOCK_INTENSET_CTTO_Disabled (0UL) /*!< Interrupt disabled. */ +#define CLOCK_INTENSET_CTTO_Enabled (1UL) /*!< Interrupt enabled. */ +#define CLOCK_INTENSET_CTTO_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 3 : Enable interrupt on DONE event. */ +#define CLOCK_INTENSET_DONE_Pos (3UL) /*!< Position of DONE field. */ +#define CLOCK_INTENSET_DONE_Msk (0x1UL << CLOCK_INTENSET_DONE_Pos) /*!< Bit mask of DONE field. */ +#define CLOCK_INTENSET_DONE_Disabled (0UL) /*!< Interrupt disabled. */ +#define CLOCK_INTENSET_DONE_Enabled (1UL) /*!< Interrupt enabled. */ +#define CLOCK_INTENSET_DONE_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 1 : Enable interrupt on LFCLKSTARTED event. */ +#define CLOCK_INTENSET_LFCLKSTARTED_Pos (1UL) /*!< Position of LFCLKSTARTED field. */ +#define CLOCK_INTENSET_LFCLKSTARTED_Msk (0x1UL << CLOCK_INTENSET_LFCLKSTARTED_Pos) /*!< Bit mask of LFCLKSTARTED field. */ +#define CLOCK_INTENSET_LFCLKSTARTED_Disabled (0UL) /*!< Interrupt disabled. */ +#define CLOCK_INTENSET_LFCLKSTARTED_Enabled (1UL) /*!< Interrupt enabled. */ +#define CLOCK_INTENSET_LFCLKSTARTED_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 0 : Enable interrupt on HFCLKSTARTED event. */ +#define CLOCK_INTENSET_HFCLKSTARTED_Pos (0UL) /*!< Position of HFCLKSTARTED field. */ +#define CLOCK_INTENSET_HFCLKSTARTED_Msk (0x1UL << CLOCK_INTENSET_HFCLKSTARTED_Pos) /*!< Bit mask of HFCLKSTARTED field. */ +#define CLOCK_INTENSET_HFCLKSTARTED_Disabled (0UL) /*!< Interrupt disabled. */ +#define CLOCK_INTENSET_HFCLKSTARTED_Enabled (1UL) /*!< Interrupt enabled. */ +#define CLOCK_INTENSET_HFCLKSTARTED_Set (1UL) /*!< Enable interrupt on write. */ + +/* Register: CLOCK_INTENCLR */ +/* Description: Interrupt enable clear register. */ + +/* Bit 4 : Disable interrupt on CTTO event. */ +#define CLOCK_INTENCLR_CTTO_Pos (4UL) /*!< Position of CTTO field. */ +#define CLOCK_INTENCLR_CTTO_Msk (0x1UL << CLOCK_INTENCLR_CTTO_Pos) /*!< Bit mask of CTTO field. */ +#define CLOCK_INTENCLR_CTTO_Disabled (0UL) /*!< Interrupt disabled. */ +#define CLOCK_INTENCLR_CTTO_Enabled (1UL) /*!< Interrupt enabled. */ +#define CLOCK_INTENCLR_CTTO_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 3 : Disable interrupt on DONE event. */ +#define CLOCK_INTENCLR_DONE_Pos (3UL) /*!< Position of DONE field. */ +#define CLOCK_INTENCLR_DONE_Msk (0x1UL << CLOCK_INTENCLR_DONE_Pos) /*!< Bit mask of DONE field. */ +#define CLOCK_INTENCLR_DONE_Disabled (0UL) /*!< Interrupt disabled. */ +#define CLOCK_INTENCLR_DONE_Enabled (1UL) /*!< Interrupt enabled. */ +#define CLOCK_INTENCLR_DONE_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 1 : Disable interrupt on LFCLKSTARTED event. */ +#define CLOCK_INTENCLR_LFCLKSTARTED_Pos (1UL) /*!< Position of LFCLKSTARTED field. */ +#define CLOCK_INTENCLR_LFCLKSTARTED_Msk (0x1UL << CLOCK_INTENCLR_LFCLKSTARTED_Pos) /*!< Bit mask of LFCLKSTARTED field. */ +#define CLOCK_INTENCLR_LFCLKSTARTED_Disabled (0UL) /*!< Interrupt disabled. */ +#define CLOCK_INTENCLR_LFCLKSTARTED_Enabled (1UL) /*!< Interrupt enabled. */ +#define CLOCK_INTENCLR_LFCLKSTARTED_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 0 : Disable interrupt on HFCLKSTARTED event. */ +#define CLOCK_INTENCLR_HFCLKSTARTED_Pos (0UL) /*!< Position of HFCLKSTARTED field. */ +#define CLOCK_INTENCLR_HFCLKSTARTED_Msk (0x1UL << CLOCK_INTENCLR_HFCLKSTARTED_Pos) /*!< Bit mask of HFCLKSTARTED field. */ +#define CLOCK_INTENCLR_HFCLKSTARTED_Disabled (0UL) /*!< Interrupt disabled. */ +#define CLOCK_INTENCLR_HFCLKSTARTED_Enabled (1UL) /*!< Interrupt enabled. */ +#define CLOCK_INTENCLR_HFCLKSTARTED_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Register: CLOCK_HFCLKRUN */ +/* Description: Task HFCLKSTART trigger status. */ + +/* Bit 0 : Task HFCLKSTART trigger status. */ +#define CLOCK_HFCLKRUN_STATUS_Pos (0UL) /*!< Position of STATUS field. */ +#define CLOCK_HFCLKRUN_STATUS_Msk (0x1UL << CLOCK_HFCLKRUN_STATUS_Pos) /*!< Bit mask of STATUS field. */ +#define CLOCK_HFCLKRUN_STATUS_NotTriggered (0UL) /*!< Task HFCLKSTART has not been triggered. */ +#define CLOCK_HFCLKRUN_STATUS_Triggered (1UL) /*!< Task HFCLKSTART has been triggered. */ + +/* Register: CLOCK_HFCLKSTAT */ +/* Description: High frequency clock status. */ + +/* Bit 16 : State for the HFCLK. */ +#define CLOCK_HFCLKSTAT_STATE_Pos (16UL) /*!< Position of STATE field. */ +#define CLOCK_HFCLKSTAT_STATE_Msk (0x1UL << CLOCK_HFCLKSTAT_STATE_Pos) /*!< Bit mask of STATE field. */ +#define CLOCK_HFCLKSTAT_STATE_NotRunning (0UL) /*!< HFCLK clock not running. */ +#define CLOCK_HFCLKSTAT_STATE_Running (1UL) /*!< HFCLK clock running. */ + +/* Bit 0 : Active clock source for the HF clock. */ +#define CLOCK_HFCLKSTAT_SRC_Pos (0UL) /*!< Position of SRC field. */ +#define CLOCK_HFCLKSTAT_SRC_Msk (0x1UL << CLOCK_HFCLKSTAT_SRC_Pos) /*!< Bit mask of SRC field. */ +#define CLOCK_HFCLKSTAT_SRC_RC (0UL) /*!< Internal 16MHz RC oscillator running and generating the HFCLK clock. */ +#define CLOCK_HFCLKSTAT_SRC_Xtal (1UL) /*!< External 16MHz/32MHz crystal oscillator running and generating the HFCLK clock. */ + +/* Register: CLOCK_LFCLKRUN */ +/* Description: Task LFCLKSTART triggered status. */ + +/* Bit 0 : Task LFCLKSTART triggered status. */ +#define CLOCK_LFCLKRUN_STATUS_Pos (0UL) /*!< Position of STATUS field. */ +#define CLOCK_LFCLKRUN_STATUS_Msk (0x1UL << CLOCK_LFCLKRUN_STATUS_Pos) /*!< Bit mask of STATUS field. */ +#define CLOCK_LFCLKRUN_STATUS_NotTriggered (0UL) /*!< Task LFCLKSTART has not been triggered. */ +#define CLOCK_LFCLKRUN_STATUS_Triggered (1UL) /*!< Task LFCLKSTART has been triggered. */ + +/* Register: CLOCK_LFCLKSTAT */ +/* Description: Low frequency clock status. */ + +/* Bit 16 : State for the LF clock. */ +#define CLOCK_LFCLKSTAT_STATE_Pos (16UL) /*!< Position of STATE field. */ +#define CLOCK_LFCLKSTAT_STATE_Msk (0x1UL << CLOCK_LFCLKSTAT_STATE_Pos) /*!< Bit mask of STATE field. */ +#define CLOCK_LFCLKSTAT_STATE_NotRunning (0UL) /*!< LFCLK clock not running. */ +#define CLOCK_LFCLKSTAT_STATE_Running (1UL) /*!< LFCLK clock running. */ + +/* Bits 1..0 : Active clock source for the LF clock. */ +#define CLOCK_LFCLKSTAT_SRC_Pos (0UL) /*!< Position of SRC field. */ +#define CLOCK_LFCLKSTAT_SRC_Msk (0x3UL << CLOCK_LFCLKSTAT_SRC_Pos) /*!< Bit mask of SRC field. */ +#define CLOCK_LFCLKSTAT_SRC_RC (0UL) /*!< Internal 32KiHz RC oscillator running and generating the LFCLK clock. */ +#define CLOCK_LFCLKSTAT_SRC_Xtal (1UL) /*!< External 32KiHz crystal oscillator running and generating the LFCLK clock. */ +#define CLOCK_LFCLKSTAT_SRC_Synth (2UL) /*!< Internal 32KiHz synthesizer from the HFCLK running and generating the LFCLK clock. */ + +/* Register: CLOCK_LFCLKSRCCOPY */ +/* Description: Clock source for the LFCLK clock, set when task LKCLKSTART is triggered. */ + +/* Bits 1..0 : Clock source for the LFCLK clock, set when task LKCLKSTART is triggered. */ +#define CLOCK_LFCLKSRCCOPY_SRC_Pos (0UL) /*!< Position of SRC field. */ +#define CLOCK_LFCLKSRCCOPY_SRC_Msk (0x3UL << CLOCK_LFCLKSRCCOPY_SRC_Pos) /*!< Bit mask of SRC field. */ +#define CLOCK_LFCLKSRCCOPY_SRC_RC (0UL) /*!< Internal 32KiHz RC oscillator. */ +#define CLOCK_LFCLKSRCCOPY_SRC_Xtal (1UL) /*!< External 32KiHz crystal. */ +#define CLOCK_LFCLKSRCCOPY_SRC_Synth (2UL) /*!< Internal 32KiHz synthesizer from HFCLK system clock. */ + +/* Register: CLOCK_LFCLKSRC */ +/* Description: Clock source for the LFCLK clock. */ + +/* Bits 1..0 : Clock source. */ +#define CLOCK_LFCLKSRC_SRC_Pos (0UL) /*!< Position of SRC field. */ +#define CLOCK_LFCLKSRC_SRC_Msk (0x3UL << CLOCK_LFCLKSRC_SRC_Pos) /*!< Bit mask of SRC field. */ +#define CLOCK_LFCLKSRC_SRC_RC (0UL) /*!< Internal 32KiHz RC oscillator. */ +#define CLOCK_LFCLKSRC_SRC_Xtal (1UL) /*!< External 32KiHz crystal. */ +#define CLOCK_LFCLKSRC_SRC_Synth (2UL) /*!< Internal 32KiHz synthesizer from HFCLK system clock. */ + +/* Register: CLOCK_CTIV */ +/* Description: Calibration timer interval. */ + +/* Bits 6..0 : Calibration timer interval in 0.25s resolution. */ +#define CLOCK_CTIV_CTIV_Pos (0UL) /*!< Position of CTIV field. */ +#define CLOCK_CTIV_CTIV_Msk (0x7FUL << CLOCK_CTIV_CTIV_Pos) /*!< Bit mask of CTIV field. */ + +/* Register: CLOCK_XTALFREQ */ +/* Description: Crystal frequency. */ + +/* Bits 7..0 : External Xtal frequency selection. */ +#define CLOCK_XTALFREQ_XTALFREQ_Pos (0UL) /*!< Position of XTALFREQ field. */ +#define CLOCK_XTALFREQ_XTALFREQ_Msk (0xFFUL << CLOCK_XTALFREQ_XTALFREQ_Pos) /*!< Bit mask of XTALFREQ field. */ +#define CLOCK_XTALFREQ_XTALFREQ_32MHz (0x00UL) /*!< 32MHz xtal is used as source for the HFCLK oscillator. */ +#define CLOCK_XTALFREQ_XTALFREQ_16MHz (0xFFUL) /*!< 16MHz xtal is used as source for the HFCLK oscillator. */ + + +/* Peripheral: ECB */ +/* Description: AES ECB Mode Encryption. */ + +/* Register: ECB_INTENSET */ +/* Description: Interrupt enable set register. */ + +/* Bit 1 : Enable interrupt on ERRORECB event. */ +#define ECB_INTENSET_ERRORECB_Pos (1UL) /*!< Position of ERRORECB field. */ +#define ECB_INTENSET_ERRORECB_Msk (0x1UL << ECB_INTENSET_ERRORECB_Pos) /*!< Bit mask of ERRORECB field. */ +#define ECB_INTENSET_ERRORECB_Disabled (0UL) /*!< Interrupt disabled. */ +#define ECB_INTENSET_ERRORECB_Enabled (1UL) /*!< Interrupt enabled. */ +#define ECB_INTENSET_ERRORECB_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 0 : Enable interrupt on ENDECB event. */ +#define ECB_INTENSET_ENDECB_Pos (0UL) /*!< Position of ENDECB field. */ +#define ECB_INTENSET_ENDECB_Msk (0x1UL << ECB_INTENSET_ENDECB_Pos) /*!< Bit mask of ENDECB field. */ +#define ECB_INTENSET_ENDECB_Disabled (0UL) /*!< Interrupt disabled. */ +#define ECB_INTENSET_ENDECB_Enabled (1UL) /*!< Interrupt enabled. */ +#define ECB_INTENSET_ENDECB_Set (1UL) /*!< Enable interrupt on write. */ + +/* Register: ECB_INTENCLR */ +/* Description: Interrupt enable clear register. */ + +/* Bit 1 : Disable interrupt on ERRORECB event. */ +#define ECB_INTENCLR_ERRORECB_Pos (1UL) /*!< Position of ERRORECB field. */ +#define ECB_INTENCLR_ERRORECB_Msk (0x1UL << ECB_INTENCLR_ERRORECB_Pos) /*!< Bit mask of ERRORECB field. */ +#define ECB_INTENCLR_ERRORECB_Disabled (0UL) /*!< Interrupt disabled. */ +#define ECB_INTENCLR_ERRORECB_Enabled (1UL) /*!< Interrupt enabled. */ +#define ECB_INTENCLR_ERRORECB_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 0 : Disable interrupt on ENDECB event. */ +#define ECB_INTENCLR_ENDECB_Pos (0UL) /*!< Position of ENDECB field. */ +#define ECB_INTENCLR_ENDECB_Msk (0x1UL << ECB_INTENCLR_ENDECB_Pos) /*!< Bit mask of ENDECB field. */ +#define ECB_INTENCLR_ENDECB_Disabled (0UL) /*!< Interrupt disabled. */ +#define ECB_INTENCLR_ENDECB_Enabled (1UL) /*!< Interrupt enabled. */ +#define ECB_INTENCLR_ENDECB_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Register: ECB_POWER */ +/* Description: Peripheral power control. */ + +/* Bit 0 : Peripheral power control. */ +#define ECB_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ +#define ECB_POWER_POWER_Msk (0x1UL << ECB_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ +#define ECB_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ +#define ECB_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ + + +/* Peripheral: FICR */ +/* Description: Factory Information Configuration. */ + +/* Register: FICR_PPFC */ +/* Description: Pre-programmed factory code present. */ + +/* Bits 7..0 : Pre-programmed factory code present. */ +#define FICR_PPFC_PPFC_Pos (0UL) /*!< Position of PPFC field. */ +#define FICR_PPFC_PPFC_Msk (0xFFUL << FICR_PPFC_PPFC_Pos) /*!< Bit mask of PPFC field. */ +#define FICR_PPFC_PPFC_Present (0x00UL) /*!< Present. */ +#define FICR_PPFC_PPFC_NotPresent (0xFFUL) /*!< Not present. */ + +/* Register: FICR_CONFIGID */ +/* Description: Configuration identifier. */ + +/* Bits 31..16 : Firmware Identification Number pre-loaded into the flash. */ +#define FICR_CONFIGID_FWID_Pos (16UL) /*!< Position of FWID field. */ +#define FICR_CONFIGID_FWID_Msk (0xFFFFUL << FICR_CONFIGID_FWID_Pos) /*!< Bit mask of FWID field. */ + +/* Bits 15..0 : Hardware Identification Number. */ +#define FICR_CONFIGID_HWID_Pos (0UL) /*!< Position of HWID field. */ +#define FICR_CONFIGID_HWID_Msk (0xFFFFUL << FICR_CONFIGID_HWID_Pos) /*!< Bit mask of HWID field. */ + +/* Register: FICR_DEVICEADDRTYPE */ +/* Description: Device address type. */ + +/* Bit 0 : Device address type. */ +#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Pos (0UL) /*!< Position of DEVICEADDRTYPE field. */ +#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Msk (0x1UL << FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Pos) /*!< Bit mask of DEVICEADDRTYPE field. */ +#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Public (0UL) /*!< Public address. */ +#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Random (1UL) /*!< Random address. */ + +/* Register: FICR_OVERRIDEEN */ +/* Description: Radio calibration override enable. */ + +/* Bit 3 : Override default values for BLE_1Mbit mode. */ +#define FICR_OVERRIDEEN_BLE_1MBIT_Pos (3UL) /*!< Position of BLE_1MBIT field. */ +#define FICR_OVERRIDEEN_BLE_1MBIT_Msk (0x1UL << FICR_OVERRIDEEN_BLE_1MBIT_Pos) /*!< Bit mask of BLE_1MBIT field. */ +#define FICR_OVERRIDEEN_BLE_1MBIT_Override (0UL) /*!< Override the default values for BLE_1Mbit mode. */ +#define FICR_OVERRIDEEN_BLE_1MBIT_NotOverride (1UL) /*!< Do not override the default values for BLE_1Mbit mode. */ + +/* Bit 0 : Override default values for NRF_1Mbit mode. */ +#define FICR_OVERRIDEEN_NRF_1MBIT_Pos (0UL) /*!< Position of NRF_1MBIT field. */ +#define FICR_OVERRIDEEN_NRF_1MBIT_Msk (0x1UL << FICR_OVERRIDEEN_NRF_1MBIT_Pos) /*!< Bit mask of NRF_1MBIT field. */ +#define FICR_OVERRIDEEN_NRF_1MBIT_Override (0UL) /*!< Override the default values for NRF_1Mbit mode. */ +#define FICR_OVERRIDEEN_NRF_1MBIT_NotOverride (1UL) /*!< Do not override the default values for NRF_1Mbit mode. */ + + +/* Peripheral: GPIO */ +/* Description: General purpose input and output. */ + +/* Register: GPIO_OUT */ +/* Description: Write GPIO port. */ + +/* Bit 31 : Pin 31. */ +#define GPIO_OUT_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_OUT_PIN31_Msk (0x1UL << GPIO_OUT_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_OUT_PIN31_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN31_High (1UL) /*!< Pin driver is high. */ + +/* Bit 30 : Pin 30. */ +#define GPIO_OUT_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_OUT_PIN30_Msk (0x1UL << GPIO_OUT_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_OUT_PIN30_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN30_High (1UL) /*!< Pin driver is high. */ + +/* Bit 29 : Pin 29. */ +#define GPIO_OUT_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_OUT_PIN29_Msk (0x1UL << GPIO_OUT_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_OUT_PIN29_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN29_High (1UL) /*!< Pin driver is high. */ + +/* Bit 28 : Pin 28. */ +#define GPIO_OUT_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_OUT_PIN28_Msk (0x1UL << GPIO_OUT_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_OUT_PIN28_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN28_High (1UL) /*!< Pin driver is high. */ + +/* Bit 27 : Pin 27. */ +#define GPIO_OUT_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_OUT_PIN27_Msk (0x1UL << GPIO_OUT_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_OUT_PIN27_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN27_High (1UL) /*!< Pin driver is high. */ + +/* Bit 26 : Pin 26. */ +#define GPIO_OUT_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_OUT_PIN26_Msk (0x1UL << GPIO_OUT_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_OUT_PIN26_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN26_High (1UL) /*!< Pin driver is high. */ + +/* Bit 25 : Pin 25. */ +#define GPIO_OUT_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_OUT_PIN25_Msk (0x1UL << GPIO_OUT_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_OUT_PIN25_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN25_High (1UL) /*!< Pin driver is high. */ + +/* Bit 24 : Pin 24. */ +#define GPIO_OUT_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_OUT_PIN24_Msk (0x1UL << GPIO_OUT_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_OUT_PIN24_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN24_High (1UL) /*!< Pin driver is high. */ + +/* Bit 23 : Pin 23. */ +#define GPIO_OUT_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_OUT_PIN23_Msk (0x1UL << GPIO_OUT_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_OUT_PIN23_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN23_High (1UL) /*!< Pin driver is high. */ + +/* Bit 22 : Pin 22. */ +#define GPIO_OUT_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_OUT_PIN22_Msk (0x1UL << GPIO_OUT_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_OUT_PIN22_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN22_High (1UL) /*!< Pin driver is high. */ + +/* Bit 21 : Pin 21. */ +#define GPIO_OUT_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_OUT_PIN21_Msk (0x1UL << GPIO_OUT_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_OUT_PIN21_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN21_High (1UL) /*!< Pin driver is high. */ + +/* Bit 20 : Pin 20. */ +#define GPIO_OUT_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_OUT_PIN20_Msk (0x1UL << GPIO_OUT_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_OUT_PIN20_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN20_High (1UL) /*!< Pin driver is high. */ + +/* Bit 19 : Pin 19. */ +#define GPIO_OUT_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_OUT_PIN19_Msk (0x1UL << GPIO_OUT_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_OUT_PIN19_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN19_High (1UL) /*!< Pin driver is high. */ + +/* Bit 18 : Pin 18. */ +#define GPIO_OUT_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_OUT_PIN18_Msk (0x1UL << GPIO_OUT_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_OUT_PIN18_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN18_High (1UL) /*!< Pin driver is high. */ + +/* Bit 17 : Pin 17. */ +#define GPIO_OUT_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_OUT_PIN17_Msk (0x1UL << GPIO_OUT_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_OUT_PIN17_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN17_High (1UL) /*!< Pin driver is high. */ + +/* Bit 16 : Pin 16. */ +#define GPIO_OUT_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_OUT_PIN16_Msk (0x1UL << GPIO_OUT_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_OUT_PIN16_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN16_High (1UL) /*!< Pin driver is high. */ + +/* Bit 15 : Pin 15. */ +#define GPIO_OUT_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_OUT_PIN15_Msk (0x1UL << GPIO_OUT_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_OUT_PIN15_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN15_High (1UL) /*!< Pin driver is high. */ + +/* Bit 14 : Pin 14. */ +#define GPIO_OUT_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_OUT_PIN14_Msk (0x1UL << GPIO_OUT_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_OUT_PIN14_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN14_High (1UL) /*!< Pin driver is high. */ + +/* Bit 13 : Pin 13. */ +#define GPIO_OUT_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_OUT_PIN13_Msk (0x1UL << GPIO_OUT_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_OUT_PIN13_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN13_High (1UL) /*!< Pin driver is high. */ + +/* Bit 12 : Pin 12. */ +#define GPIO_OUT_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_OUT_PIN12_Msk (0x1UL << GPIO_OUT_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_OUT_PIN12_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN12_High (1UL) /*!< Pin driver is high. */ + +/* Bit 11 : Pin 11. */ +#define GPIO_OUT_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_OUT_PIN11_Msk (0x1UL << GPIO_OUT_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_OUT_PIN11_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN11_High (1UL) /*!< Pin driver is high. */ + +/* Bit 10 : Pin 10. */ +#define GPIO_OUT_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_OUT_PIN10_Msk (0x1UL << GPIO_OUT_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_OUT_PIN10_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN10_High (1UL) /*!< Pin driver is high. */ + +/* Bit 9 : Pin 9. */ +#define GPIO_OUT_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_OUT_PIN9_Msk (0x1UL << GPIO_OUT_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_OUT_PIN9_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN9_High (1UL) /*!< Pin driver is high. */ + +/* Bit 8 : Pin 8. */ +#define GPIO_OUT_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_OUT_PIN8_Msk (0x1UL << GPIO_OUT_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_OUT_PIN8_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN8_High (1UL) /*!< Pin driver is high. */ + +/* Bit 7 : Pin 7. */ +#define GPIO_OUT_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_OUT_PIN7_Msk (0x1UL << GPIO_OUT_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_OUT_PIN7_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN7_High (1UL) /*!< Pin driver is high. */ + +/* Bit 6 : Pin 6. */ +#define GPIO_OUT_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_OUT_PIN6_Msk (0x1UL << GPIO_OUT_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_OUT_PIN6_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN6_High (1UL) /*!< Pin driver is high. */ + +/* Bit 5 : Pin 5. */ +#define GPIO_OUT_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_OUT_PIN5_Msk (0x1UL << GPIO_OUT_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_OUT_PIN5_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN5_High (1UL) /*!< Pin driver is high. */ + +/* Bit 4 : Pin 4. */ +#define GPIO_OUT_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_OUT_PIN4_Msk (0x1UL << GPIO_OUT_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_OUT_PIN4_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN4_High (1UL) /*!< Pin driver is high. */ + +/* Bit 3 : Pin 3. */ +#define GPIO_OUT_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_OUT_PIN3_Msk (0x1UL << GPIO_OUT_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_OUT_PIN3_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN3_High (1UL) /*!< Pin driver is high. */ + +/* Bit 2 : Pin 2. */ +#define GPIO_OUT_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_OUT_PIN2_Msk (0x1UL << GPIO_OUT_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_OUT_PIN2_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN2_High (1UL) /*!< Pin driver is high. */ + +/* Bit 1 : Pin 1. */ +#define GPIO_OUT_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_OUT_PIN1_Msk (0x1UL << GPIO_OUT_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_OUT_PIN1_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN1_High (1UL) /*!< Pin driver is high. */ + +/* Bit 0 : Pin 0. */ +#define GPIO_OUT_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_OUT_PIN0_Msk (0x1UL << GPIO_OUT_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_OUT_PIN0_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUT_PIN0_High (1UL) /*!< Pin driver is high. */ + +/* Register: GPIO_OUTSET */ +/* Description: Set individual bits in GPIO port. */ + +/* Bit 31 : Pin 31. */ +#define GPIO_OUTSET_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_OUTSET_PIN31_Msk (0x1UL << GPIO_OUTSET_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_OUTSET_PIN31_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN31_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN31_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 30 : Pin 30. */ +#define GPIO_OUTSET_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_OUTSET_PIN30_Msk (0x1UL << GPIO_OUTSET_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_OUTSET_PIN30_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN30_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN30_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 29 : Pin 29. */ +#define GPIO_OUTSET_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_OUTSET_PIN29_Msk (0x1UL << GPIO_OUTSET_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_OUTSET_PIN29_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN29_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN29_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 28 : Pin 28. */ +#define GPIO_OUTSET_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_OUTSET_PIN28_Msk (0x1UL << GPIO_OUTSET_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_OUTSET_PIN28_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN28_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN28_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 27 : Pin 27. */ +#define GPIO_OUTSET_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_OUTSET_PIN27_Msk (0x1UL << GPIO_OUTSET_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_OUTSET_PIN27_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN27_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN27_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 26 : Pin 26. */ +#define GPIO_OUTSET_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_OUTSET_PIN26_Msk (0x1UL << GPIO_OUTSET_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_OUTSET_PIN26_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN26_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN26_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 25 : Pin 25. */ +#define GPIO_OUTSET_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_OUTSET_PIN25_Msk (0x1UL << GPIO_OUTSET_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_OUTSET_PIN25_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN25_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN25_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 24 : Pin 24. */ +#define GPIO_OUTSET_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_OUTSET_PIN24_Msk (0x1UL << GPIO_OUTSET_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_OUTSET_PIN24_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN24_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN24_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 23 : Pin 23. */ +#define GPIO_OUTSET_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_OUTSET_PIN23_Msk (0x1UL << GPIO_OUTSET_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_OUTSET_PIN23_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN23_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN23_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 22 : Pin 22. */ +#define GPIO_OUTSET_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_OUTSET_PIN22_Msk (0x1UL << GPIO_OUTSET_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_OUTSET_PIN22_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN22_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN22_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 21 : Pin 21. */ +#define GPIO_OUTSET_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_OUTSET_PIN21_Msk (0x1UL << GPIO_OUTSET_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_OUTSET_PIN21_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN21_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN21_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 20 : Pin 20. */ +#define GPIO_OUTSET_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_OUTSET_PIN20_Msk (0x1UL << GPIO_OUTSET_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_OUTSET_PIN20_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN20_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN20_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 19 : Pin 19. */ +#define GPIO_OUTSET_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_OUTSET_PIN19_Msk (0x1UL << GPIO_OUTSET_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_OUTSET_PIN19_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN19_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN19_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 18 : Pin 18. */ +#define GPIO_OUTSET_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_OUTSET_PIN18_Msk (0x1UL << GPIO_OUTSET_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_OUTSET_PIN18_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN18_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN18_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 17 : Pin 17. */ +#define GPIO_OUTSET_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_OUTSET_PIN17_Msk (0x1UL << GPIO_OUTSET_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_OUTSET_PIN17_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN17_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN17_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 16 : Pin 16. */ +#define GPIO_OUTSET_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_OUTSET_PIN16_Msk (0x1UL << GPIO_OUTSET_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_OUTSET_PIN16_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN16_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN16_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 15 : Pin 15. */ +#define GPIO_OUTSET_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_OUTSET_PIN15_Msk (0x1UL << GPIO_OUTSET_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_OUTSET_PIN15_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN15_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN15_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 14 : Pin 14. */ +#define GPIO_OUTSET_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_OUTSET_PIN14_Msk (0x1UL << GPIO_OUTSET_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_OUTSET_PIN14_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN14_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN14_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 13 : Pin 13. */ +#define GPIO_OUTSET_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_OUTSET_PIN13_Msk (0x1UL << GPIO_OUTSET_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_OUTSET_PIN13_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN13_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN13_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 12 : Pin 12. */ +#define GPIO_OUTSET_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_OUTSET_PIN12_Msk (0x1UL << GPIO_OUTSET_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_OUTSET_PIN12_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN12_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN12_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 11 : Pin 11. */ +#define GPIO_OUTSET_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_OUTSET_PIN11_Msk (0x1UL << GPIO_OUTSET_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_OUTSET_PIN11_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN11_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN11_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 10 : Pin 10. */ +#define GPIO_OUTSET_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_OUTSET_PIN10_Msk (0x1UL << GPIO_OUTSET_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_OUTSET_PIN10_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN10_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN10_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 9 : Pin 9. */ +#define GPIO_OUTSET_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_OUTSET_PIN9_Msk (0x1UL << GPIO_OUTSET_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_OUTSET_PIN9_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN9_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN9_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 8 : Pin 8. */ +#define GPIO_OUTSET_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_OUTSET_PIN8_Msk (0x1UL << GPIO_OUTSET_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_OUTSET_PIN8_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN8_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN8_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 7 : Pin 7. */ +#define GPIO_OUTSET_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_OUTSET_PIN7_Msk (0x1UL << GPIO_OUTSET_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_OUTSET_PIN7_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN7_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN7_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 6 : Pin 6. */ +#define GPIO_OUTSET_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_OUTSET_PIN6_Msk (0x1UL << GPIO_OUTSET_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_OUTSET_PIN6_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN6_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN6_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 5 : Pin 5. */ +#define GPIO_OUTSET_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_OUTSET_PIN5_Msk (0x1UL << GPIO_OUTSET_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_OUTSET_PIN5_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN5_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN5_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 4 : Pin 4. */ +#define GPIO_OUTSET_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_OUTSET_PIN4_Msk (0x1UL << GPIO_OUTSET_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_OUTSET_PIN4_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN4_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN4_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 3 : Pin 3. */ +#define GPIO_OUTSET_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_OUTSET_PIN3_Msk (0x1UL << GPIO_OUTSET_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_OUTSET_PIN3_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN3_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN3_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 2 : Pin 2. */ +#define GPIO_OUTSET_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_OUTSET_PIN2_Msk (0x1UL << GPIO_OUTSET_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_OUTSET_PIN2_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN2_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN2_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 1 : Pin 1. */ +#define GPIO_OUTSET_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_OUTSET_PIN1_Msk (0x1UL << GPIO_OUTSET_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_OUTSET_PIN1_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN1_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN1_Set (1UL) /*!< Set pin driver high. */ + +/* Bit 0 : Pin 0. */ +#define GPIO_OUTSET_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_OUTSET_PIN0_Msk (0x1UL << GPIO_OUTSET_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_OUTSET_PIN0_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTSET_PIN0_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTSET_PIN0_Set (1UL) /*!< Set pin driver high. */ + +/* Register: GPIO_OUTCLR */ +/* Description: Clear individual bits in GPIO port. */ + +/* Bit 31 : Pin 31. */ +#define GPIO_OUTCLR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_OUTCLR_PIN31_Msk (0x1UL << GPIO_OUTCLR_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_OUTCLR_PIN31_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN31_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN31_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 30 : Pin 30. */ +#define GPIO_OUTCLR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_OUTCLR_PIN30_Msk (0x1UL << GPIO_OUTCLR_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_OUTCLR_PIN30_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN30_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN30_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 29 : Pin 29. */ +#define GPIO_OUTCLR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_OUTCLR_PIN29_Msk (0x1UL << GPIO_OUTCLR_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_OUTCLR_PIN29_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN29_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN29_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 28 : Pin 28. */ +#define GPIO_OUTCLR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_OUTCLR_PIN28_Msk (0x1UL << GPIO_OUTCLR_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_OUTCLR_PIN28_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN28_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN28_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 27 : Pin 27. */ +#define GPIO_OUTCLR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_OUTCLR_PIN27_Msk (0x1UL << GPIO_OUTCLR_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_OUTCLR_PIN27_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN27_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN27_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 26 : Pin 26. */ +#define GPIO_OUTCLR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_OUTCLR_PIN26_Msk (0x1UL << GPIO_OUTCLR_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_OUTCLR_PIN26_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN26_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN26_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 25 : Pin 25. */ +#define GPIO_OUTCLR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_OUTCLR_PIN25_Msk (0x1UL << GPIO_OUTCLR_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_OUTCLR_PIN25_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN25_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN25_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 24 : Pin 24. */ +#define GPIO_OUTCLR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_OUTCLR_PIN24_Msk (0x1UL << GPIO_OUTCLR_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_OUTCLR_PIN24_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN24_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN24_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 23 : Pin 23. */ +#define GPIO_OUTCLR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_OUTCLR_PIN23_Msk (0x1UL << GPIO_OUTCLR_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_OUTCLR_PIN23_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN23_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN23_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 22 : Pin 22. */ +#define GPIO_OUTCLR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_OUTCLR_PIN22_Msk (0x1UL << GPIO_OUTCLR_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_OUTCLR_PIN22_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN22_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN22_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 21 : Pin 21. */ +#define GPIO_OUTCLR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_OUTCLR_PIN21_Msk (0x1UL << GPIO_OUTCLR_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_OUTCLR_PIN21_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN21_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN21_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 20 : Pin 20. */ +#define GPIO_OUTCLR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_OUTCLR_PIN20_Msk (0x1UL << GPIO_OUTCLR_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_OUTCLR_PIN20_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN20_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN20_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 19 : Pin 19. */ +#define GPIO_OUTCLR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_OUTCLR_PIN19_Msk (0x1UL << GPIO_OUTCLR_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_OUTCLR_PIN19_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN19_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN19_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 18 : Pin 18. */ +#define GPIO_OUTCLR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_OUTCLR_PIN18_Msk (0x1UL << GPIO_OUTCLR_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_OUTCLR_PIN18_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN18_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN18_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 17 : Pin 17. */ +#define GPIO_OUTCLR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_OUTCLR_PIN17_Msk (0x1UL << GPIO_OUTCLR_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_OUTCLR_PIN17_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN17_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN17_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 16 : Pin 16. */ +#define GPIO_OUTCLR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_OUTCLR_PIN16_Msk (0x1UL << GPIO_OUTCLR_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_OUTCLR_PIN16_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN16_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN16_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 15 : Pin 15. */ +#define GPIO_OUTCLR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_OUTCLR_PIN15_Msk (0x1UL << GPIO_OUTCLR_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_OUTCLR_PIN15_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN15_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN15_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 14 : Pin 14. */ +#define GPIO_OUTCLR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_OUTCLR_PIN14_Msk (0x1UL << GPIO_OUTCLR_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_OUTCLR_PIN14_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN14_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN14_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 13 : Pin 13. */ +#define GPIO_OUTCLR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_OUTCLR_PIN13_Msk (0x1UL << GPIO_OUTCLR_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_OUTCLR_PIN13_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN13_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN13_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 12 : Pin 12. */ +#define GPIO_OUTCLR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_OUTCLR_PIN12_Msk (0x1UL << GPIO_OUTCLR_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_OUTCLR_PIN12_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN12_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN12_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 11 : Pin 11. */ +#define GPIO_OUTCLR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_OUTCLR_PIN11_Msk (0x1UL << GPIO_OUTCLR_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_OUTCLR_PIN11_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN11_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN11_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 10 : Pin 10. */ +#define GPIO_OUTCLR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_OUTCLR_PIN10_Msk (0x1UL << GPIO_OUTCLR_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_OUTCLR_PIN10_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN10_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN10_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 9 : Pin 9. */ +#define GPIO_OUTCLR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_OUTCLR_PIN9_Msk (0x1UL << GPIO_OUTCLR_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_OUTCLR_PIN9_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN9_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN9_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 8 : Pin 8. */ +#define GPIO_OUTCLR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_OUTCLR_PIN8_Msk (0x1UL << GPIO_OUTCLR_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_OUTCLR_PIN8_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN8_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN8_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 7 : Pin 7. */ +#define GPIO_OUTCLR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_OUTCLR_PIN7_Msk (0x1UL << GPIO_OUTCLR_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_OUTCLR_PIN7_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN7_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN7_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 6 : Pin 6. */ +#define GPIO_OUTCLR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_OUTCLR_PIN6_Msk (0x1UL << GPIO_OUTCLR_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_OUTCLR_PIN6_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN6_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN6_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 5 : Pin 5. */ +#define GPIO_OUTCLR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_OUTCLR_PIN5_Msk (0x1UL << GPIO_OUTCLR_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_OUTCLR_PIN5_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN5_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN5_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 4 : Pin 4. */ +#define GPIO_OUTCLR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_OUTCLR_PIN4_Msk (0x1UL << GPIO_OUTCLR_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_OUTCLR_PIN4_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN4_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN4_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 3 : Pin 3. */ +#define GPIO_OUTCLR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_OUTCLR_PIN3_Msk (0x1UL << GPIO_OUTCLR_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_OUTCLR_PIN3_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN3_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN3_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 2 : Pin 2. */ +#define GPIO_OUTCLR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_OUTCLR_PIN2_Msk (0x1UL << GPIO_OUTCLR_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_OUTCLR_PIN2_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN2_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN2_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 1 : Pin 1. */ +#define GPIO_OUTCLR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_OUTCLR_PIN1_Msk (0x1UL << GPIO_OUTCLR_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_OUTCLR_PIN1_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN1_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN1_Clear (1UL) /*!< Set pin driver low. */ + +/* Bit 0 : Pin 0. */ +#define GPIO_OUTCLR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_OUTCLR_PIN0_Msk (0x1UL << GPIO_OUTCLR_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_OUTCLR_PIN0_Low (0UL) /*!< Pin driver is low. */ +#define GPIO_OUTCLR_PIN0_High (1UL) /*!< Pin driver is high. */ +#define GPIO_OUTCLR_PIN0_Clear (1UL) /*!< Set pin driver low. */ + +/* Register: GPIO_IN */ +/* Description: Read GPIO port. */ + +/* Bit 31 : Pin 31. */ +#define GPIO_IN_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_IN_PIN31_Msk (0x1UL << GPIO_IN_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_IN_PIN31_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN31_High (1UL) /*!< Pin input is high. */ + +/* Bit 30 : Pin 30. */ +#define GPIO_IN_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_IN_PIN30_Msk (0x1UL << GPIO_IN_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_IN_PIN30_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN30_High (1UL) /*!< Pin input is high. */ + +/* Bit 29 : Pin 29. */ +#define GPIO_IN_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_IN_PIN29_Msk (0x1UL << GPIO_IN_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_IN_PIN29_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN29_High (1UL) /*!< Pin input is high. */ + +/* Bit 28 : Pin 28. */ +#define GPIO_IN_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_IN_PIN28_Msk (0x1UL << GPIO_IN_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_IN_PIN28_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN28_High (1UL) /*!< Pin input is high. */ + +/* Bit 27 : Pin 27. */ +#define GPIO_IN_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_IN_PIN27_Msk (0x1UL << GPIO_IN_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_IN_PIN27_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN27_High (1UL) /*!< Pin input is high. */ + +/* Bit 26 : Pin 26. */ +#define GPIO_IN_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_IN_PIN26_Msk (0x1UL << GPIO_IN_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_IN_PIN26_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN26_High (1UL) /*!< Pin input is high. */ + +/* Bit 25 : Pin 25. */ +#define GPIO_IN_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_IN_PIN25_Msk (0x1UL << GPIO_IN_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_IN_PIN25_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN25_High (1UL) /*!< Pin input is high. */ + +/* Bit 24 : Pin 24. */ +#define GPIO_IN_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_IN_PIN24_Msk (0x1UL << GPIO_IN_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_IN_PIN24_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN24_High (1UL) /*!< Pin input is high. */ + +/* Bit 23 : Pin 23. */ +#define GPIO_IN_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_IN_PIN23_Msk (0x1UL << GPIO_IN_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_IN_PIN23_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN23_High (1UL) /*!< Pin input is high. */ + +/* Bit 22 : Pin 22. */ +#define GPIO_IN_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_IN_PIN22_Msk (0x1UL << GPIO_IN_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_IN_PIN22_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN22_High (1UL) /*!< Pin input is high. */ + +/* Bit 21 : Pin 21. */ +#define GPIO_IN_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_IN_PIN21_Msk (0x1UL << GPIO_IN_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_IN_PIN21_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN21_High (1UL) /*!< Pin input is high. */ + +/* Bit 20 : Pin 20. */ +#define GPIO_IN_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_IN_PIN20_Msk (0x1UL << GPIO_IN_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_IN_PIN20_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN20_High (1UL) /*!< Pin input is high. */ + +/* Bit 19 : Pin 19. */ +#define GPIO_IN_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_IN_PIN19_Msk (0x1UL << GPIO_IN_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_IN_PIN19_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN19_High (1UL) /*!< Pin input is high. */ + +/* Bit 18 : Pin 18. */ +#define GPIO_IN_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_IN_PIN18_Msk (0x1UL << GPIO_IN_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_IN_PIN18_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN18_High (1UL) /*!< Pin input is high. */ + +/* Bit 17 : Pin 17. */ +#define GPIO_IN_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_IN_PIN17_Msk (0x1UL << GPIO_IN_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_IN_PIN17_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN17_High (1UL) /*!< Pin input is high. */ + +/* Bit 16 : Pin 16. */ +#define GPIO_IN_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_IN_PIN16_Msk (0x1UL << GPIO_IN_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_IN_PIN16_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN16_High (1UL) /*!< Pin input is high. */ + +/* Bit 15 : Pin 15. */ +#define GPIO_IN_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_IN_PIN15_Msk (0x1UL << GPIO_IN_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_IN_PIN15_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN15_High (1UL) /*!< Pin input is high. */ + +/* Bit 14 : Pin 14. */ +#define GPIO_IN_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_IN_PIN14_Msk (0x1UL << GPIO_IN_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_IN_PIN14_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN14_High (1UL) /*!< Pin input is high. */ + +/* Bit 13 : Pin 13. */ +#define GPIO_IN_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_IN_PIN13_Msk (0x1UL << GPIO_IN_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_IN_PIN13_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN13_High (1UL) /*!< Pin input is high. */ + +/* Bit 12 : Pin 12. */ +#define GPIO_IN_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_IN_PIN12_Msk (0x1UL << GPIO_IN_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_IN_PIN12_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN12_High (1UL) /*!< Pin input is high. */ + +/* Bit 11 : Pin 11. */ +#define GPIO_IN_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_IN_PIN11_Msk (0x1UL << GPIO_IN_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_IN_PIN11_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN11_High (1UL) /*!< Pin input is high. */ + +/* Bit 10 : Pin 10. */ +#define GPIO_IN_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_IN_PIN10_Msk (0x1UL << GPIO_IN_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_IN_PIN10_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN10_High (1UL) /*!< Pin input is high. */ + +/* Bit 9 : Pin 9. */ +#define GPIO_IN_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_IN_PIN9_Msk (0x1UL << GPIO_IN_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_IN_PIN9_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN9_High (1UL) /*!< Pin input is high. */ + +/* Bit 8 : Pin 8. */ +#define GPIO_IN_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_IN_PIN8_Msk (0x1UL << GPIO_IN_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_IN_PIN8_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN8_High (1UL) /*!< Pin input is high. */ + +/* Bit 7 : Pin 7. */ +#define GPIO_IN_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_IN_PIN7_Msk (0x1UL << GPIO_IN_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_IN_PIN7_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN7_High (1UL) /*!< Pin input is high. */ + +/* Bit 6 : Pin 6. */ +#define GPIO_IN_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_IN_PIN6_Msk (0x1UL << GPIO_IN_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_IN_PIN6_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN6_High (1UL) /*!< Pin input is high. */ + +/* Bit 5 : Pin 5. */ +#define GPIO_IN_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_IN_PIN5_Msk (0x1UL << GPIO_IN_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_IN_PIN5_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN5_High (1UL) /*!< Pin input is high. */ + +/* Bit 4 : Pin 4. */ +#define GPIO_IN_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_IN_PIN4_Msk (0x1UL << GPIO_IN_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_IN_PIN4_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN4_High (1UL) /*!< Pin input is high. */ + +/* Bit 3 : Pin 3. */ +#define GPIO_IN_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_IN_PIN3_Msk (0x1UL << GPIO_IN_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_IN_PIN3_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN3_High (1UL) /*!< Pin input is high. */ + +/* Bit 2 : Pin 2. */ +#define GPIO_IN_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_IN_PIN2_Msk (0x1UL << GPIO_IN_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_IN_PIN2_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN2_High (1UL) /*!< Pin input is high. */ + +/* Bit 1 : Pin 1. */ +#define GPIO_IN_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_IN_PIN1_Msk (0x1UL << GPIO_IN_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_IN_PIN1_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN1_High (1UL) /*!< Pin input is high. */ + +/* Bit 0 : Pin 0. */ +#define GPIO_IN_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_IN_PIN0_Msk (0x1UL << GPIO_IN_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_IN_PIN0_Low (0UL) /*!< Pin input is low. */ +#define GPIO_IN_PIN0_High (1UL) /*!< Pin input is high. */ + +/* Register: GPIO_DIR */ +/* Description: Direction of GPIO pins. */ + +/* Bit 31 : Pin 31. */ +#define GPIO_DIR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_DIR_PIN31_Msk (0x1UL << GPIO_DIR_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_DIR_PIN31_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN31_Output (1UL) /*!< Pin set as output. */ + +/* Bit 30 : Pin 30. */ +#define GPIO_DIR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_DIR_PIN30_Msk (0x1UL << GPIO_DIR_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_DIR_PIN30_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN30_Output (1UL) /*!< Pin set as output. */ + +/* Bit 29 : Pin 29. */ +#define GPIO_DIR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_DIR_PIN29_Msk (0x1UL << GPIO_DIR_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_DIR_PIN29_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN29_Output (1UL) /*!< Pin set as output. */ + +/* Bit 28 : Pin 28. */ +#define GPIO_DIR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_DIR_PIN28_Msk (0x1UL << GPIO_DIR_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_DIR_PIN28_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN28_Output (1UL) /*!< Pin set as output. */ + +/* Bit 27 : Pin 27. */ +#define GPIO_DIR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_DIR_PIN27_Msk (0x1UL << GPIO_DIR_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_DIR_PIN27_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN27_Output (1UL) /*!< Pin set as output. */ + +/* Bit 26 : Pin 26. */ +#define GPIO_DIR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_DIR_PIN26_Msk (0x1UL << GPIO_DIR_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_DIR_PIN26_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN26_Output (1UL) /*!< Pin set as output. */ + +/* Bit 25 : Pin 25. */ +#define GPIO_DIR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_DIR_PIN25_Msk (0x1UL << GPIO_DIR_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_DIR_PIN25_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN25_Output (1UL) /*!< Pin set as output. */ + +/* Bit 24 : Pin 24. */ +#define GPIO_DIR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_DIR_PIN24_Msk (0x1UL << GPIO_DIR_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_DIR_PIN24_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN24_Output (1UL) /*!< Pin set as output. */ + +/* Bit 23 : Pin 23. */ +#define GPIO_DIR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_DIR_PIN23_Msk (0x1UL << GPIO_DIR_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_DIR_PIN23_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN23_Output (1UL) /*!< Pin set as output. */ + +/* Bit 22 : Pin 22. */ +#define GPIO_DIR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_DIR_PIN22_Msk (0x1UL << GPIO_DIR_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_DIR_PIN22_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN22_Output (1UL) /*!< Pin set as output. */ + +/* Bit 21 : Pin 21. */ +#define GPIO_DIR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_DIR_PIN21_Msk (0x1UL << GPIO_DIR_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_DIR_PIN21_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN21_Output (1UL) /*!< Pin set as output. */ + +/* Bit 20 : Pin 20. */ +#define GPIO_DIR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_DIR_PIN20_Msk (0x1UL << GPIO_DIR_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_DIR_PIN20_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN20_Output (1UL) /*!< Pin set as output. */ + +/* Bit 19 : Pin 19. */ +#define GPIO_DIR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_DIR_PIN19_Msk (0x1UL << GPIO_DIR_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_DIR_PIN19_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN19_Output (1UL) /*!< Pin set as output. */ + +/* Bit 18 : Pin 18. */ +#define GPIO_DIR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_DIR_PIN18_Msk (0x1UL << GPIO_DIR_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_DIR_PIN18_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN18_Output (1UL) /*!< Pin set as output. */ + +/* Bit 17 : Pin 17. */ +#define GPIO_DIR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_DIR_PIN17_Msk (0x1UL << GPIO_DIR_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_DIR_PIN17_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN17_Output (1UL) /*!< Pin set as output. */ + +/* Bit 16 : Pin 16. */ +#define GPIO_DIR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_DIR_PIN16_Msk (0x1UL << GPIO_DIR_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_DIR_PIN16_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN16_Output (1UL) /*!< Pin set as output. */ + +/* Bit 15 : Pin 15. */ +#define GPIO_DIR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_DIR_PIN15_Msk (0x1UL << GPIO_DIR_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_DIR_PIN15_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN15_Output (1UL) /*!< Pin set as output. */ + +/* Bit 14 : Pin 14. */ +#define GPIO_DIR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_DIR_PIN14_Msk (0x1UL << GPIO_DIR_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_DIR_PIN14_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN14_Output (1UL) /*!< Pin set as output. */ + +/* Bit 13 : Pin 13. */ +#define GPIO_DIR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_DIR_PIN13_Msk (0x1UL << GPIO_DIR_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_DIR_PIN13_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN13_Output (1UL) /*!< Pin set as output. */ + +/* Bit 12 : Pin 12. */ +#define GPIO_DIR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_DIR_PIN12_Msk (0x1UL << GPIO_DIR_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_DIR_PIN12_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN12_Output (1UL) /*!< Pin set as output. */ + +/* Bit 11 : Pin 11. */ +#define GPIO_DIR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_DIR_PIN11_Msk (0x1UL << GPIO_DIR_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_DIR_PIN11_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN11_Output (1UL) /*!< Pin set as output. */ + +/* Bit 10 : Pin 10. */ +#define GPIO_DIR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_DIR_PIN10_Msk (0x1UL << GPIO_DIR_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_DIR_PIN10_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN10_Output (1UL) /*!< Pin set as output. */ + +/* Bit 9 : Pin 9. */ +#define GPIO_DIR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_DIR_PIN9_Msk (0x1UL << GPIO_DIR_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_DIR_PIN9_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN9_Output (1UL) /*!< Pin set as output. */ + +/* Bit 8 : Pin 8. */ +#define GPIO_DIR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_DIR_PIN8_Msk (0x1UL << GPIO_DIR_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_DIR_PIN8_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN8_Output (1UL) /*!< Pin set as output. */ + +/* Bit 7 : Pin 7. */ +#define GPIO_DIR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_DIR_PIN7_Msk (0x1UL << GPIO_DIR_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_DIR_PIN7_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN7_Output (1UL) /*!< Pin set as output. */ + +/* Bit 6 : Pin 6. */ +#define GPIO_DIR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_DIR_PIN6_Msk (0x1UL << GPIO_DIR_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_DIR_PIN6_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN6_Output (1UL) /*!< Pin set as output. */ + +/* Bit 5 : Pin 5. */ +#define GPIO_DIR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_DIR_PIN5_Msk (0x1UL << GPIO_DIR_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_DIR_PIN5_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN5_Output (1UL) /*!< Pin set as output. */ + +/* Bit 4 : Pin 4. */ +#define GPIO_DIR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_DIR_PIN4_Msk (0x1UL << GPIO_DIR_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_DIR_PIN4_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN4_Output (1UL) /*!< Pin set as output. */ + +/* Bit 3 : Pin 3. */ +#define GPIO_DIR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_DIR_PIN3_Msk (0x1UL << GPIO_DIR_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_DIR_PIN3_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN3_Output (1UL) /*!< Pin set as output. */ + +/* Bit 2 : Pin 2. */ +#define GPIO_DIR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_DIR_PIN2_Msk (0x1UL << GPIO_DIR_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_DIR_PIN2_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN2_Output (1UL) /*!< Pin set as output. */ + +/* Bit 1 : Pin 1. */ +#define GPIO_DIR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_DIR_PIN1_Msk (0x1UL << GPIO_DIR_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_DIR_PIN1_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN1_Output (1UL) /*!< Pin set as output. */ + +/* Bit 0 : Pin 0. */ +#define GPIO_DIR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_DIR_PIN0_Msk (0x1UL << GPIO_DIR_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_DIR_PIN0_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIR_PIN0_Output (1UL) /*!< Pin set as output. */ + +/* Register: GPIO_DIRSET */ +/* Description: DIR set register. */ + +/* Bit 31 : Set as output pin 31. */ +#define GPIO_DIRSET_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_DIRSET_PIN31_Msk (0x1UL << GPIO_DIRSET_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_DIRSET_PIN31_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN31_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN31_Set (1UL) /*!< Set pin as output. */ + +/* Bit 30 : Set as output pin 30. */ +#define GPIO_DIRSET_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_DIRSET_PIN30_Msk (0x1UL << GPIO_DIRSET_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_DIRSET_PIN30_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN30_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN30_Set (1UL) /*!< Set pin as output. */ + +/* Bit 29 : Set as output pin 29. */ +#define GPIO_DIRSET_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_DIRSET_PIN29_Msk (0x1UL << GPIO_DIRSET_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_DIRSET_PIN29_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN29_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN29_Set (1UL) /*!< Set pin as output. */ + +/* Bit 28 : Set as output pin 28. */ +#define GPIO_DIRSET_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_DIRSET_PIN28_Msk (0x1UL << GPIO_DIRSET_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_DIRSET_PIN28_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN28_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN28_Set (1UL) /*!< Set pin as output. */ + +/* Bit 27 : Set as output pin 27. */ +#define GPIO_DIRSET_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_DIRSET_PIN27_Msk (0x1UL << GPIO_DIRSET_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_DIRSET_PIN27_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN27_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN27_Set (1UL) /*!< Set pin as output. */ + +/* Bit 26 : Set as output pin 26. */ +#define GPIO_DIRSET_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_DIRSET_PIN26_Msk (0x1UL << GPIO_DIRSET_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_DIRSET_PIN26_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN26_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN26_Set (1UL) /*!< Set pin as output. */ + +/* Bit 25 : Set as output pin 25. */ +#define GPIO_DIRSET_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_DIRSET_PIN25_Msk (0x1UL << GPIO_DIRSET_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_DIRSET_PIN25_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN25_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN25_Set (1UL) /*!< Set pin as output. */ + +/* Bit 24 : Set as output pin 24. */ +#define GPIO_DIRSET_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_DIRSET_PIN24_Msk (0x1UL << GPIO_DIRSET_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_DIRSET_PIN24_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN24_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN24_Set (1UL) /*!< Set pin as output. */ + +/* Bit 23 : Set as output pin 23. */ +#define GPIO_DIRSET_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_DIRSET_PIN23_Msk (0x1UL << GPIO_DIRSET_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_DIRSET_PIN23_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN23_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN23_Set (1UL) /*!< Set pin as output. */ + +/* Bit 22 : Set as output pin 22. */ +#define GPIO_DIRSET_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_DIRSET_PIN22_Msk (0x1UL << GPIO_DIRSET_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_DIRSET_PIN22_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN22_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN22_Set (1UL) /*!< Set pin as output. */ + +/* Bit 21 : Set as output pin 21. */ +#define GPIO_DIRSET_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_DIRSET_PIN21_Msk (0x1UL << GPIO_DIRSET_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_DIRSET_PIN21_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN21_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN21_Set (1UL) /*!< Set pin as output. */ + +/* Bit 20 : Set as output pin 20. */ +#define GPIO_DIRSET_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_DIRSET_PIN20_Msk (0x1UL << GPIO_DIRSET_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_DIRSET_PIN20_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN20_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN20_Set (1UL) /*!< Set pin as output. */ + +/* Bit 19 : Set as output pin 19. */ +#define GPIO_DIRSET_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_DIRSET_PIN19_Msk (0x1UL << GPIO_DIRSET_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_DIRSET_PIN19_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN19_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN19_Set (1UL) /*!< Set pin as output. */ + +/* Bit 18 : Set as output pin 18. */ +#define GPIO_DIRSET_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_DIRSET_PIN18_Msk (0x1UL << GPIO_DIRSET_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_DIRSET_PIN18_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN18_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN18_Set (1UL) /*!< Set pin as output. */ + +/* Bit 17 : Set as output pin 17. */ +#define GPIO_DIRSET_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_DIRSET_PIN17_Msk (0x1UL << GPIO_DIRSET_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_DIRSET_PIN17_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN17_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN17_Set (1UL) /*!< Set pin as output. */ + +/* Bit 16 : Set as output pin 16. */ +#define GPIO_DIRSET_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_DIRSET_PIN16_Msk (0x1UL << GPIO_DIRSET_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_DIRSET_PIN16_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN16_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN16_Set (1UL) /*!< Set pin as output. */ + +/* Bit 15 : Set as output pin 15. */ +#define GPIO_DIRSET_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_DIRSET_PIN15_Msk (0x1UL << GPIO_DIRSET_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_DIRSET_PIN15_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN15_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN15_Set (1UL) /*!< Set pin as output. */ + +/* Bit 14 : Set as output pin 14. */ +#define GPIO_DIRSET_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_DIRSET_PIN14_Msk (0x1UL << GPIO_DIRSET_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_DIRSET_PIN14_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN14_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN14_Set (1UL) /*!< Set pin as output. */ + +/* Bit 13 : Set as output pin 13. */ +#define GPIO_DIRSET_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_DIRSET_PIN13_Msk (0x1UL << GPIO_DIRSET_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_DIRSET_PIN13_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN13_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN13_Set (1UL) /*!< Set pin as output. */ + +/* Bit 12 : Set as output pin 12. */ +#define GPIO_DIRSET_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_DIRSET_PIN12_Msk (0x1UL << GPIO_DIRSET_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_DIRSET_PIN12_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN12_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN12_Set (1UL) /*!< Set pin as output. */ + +/* Bit 11 : Set as output pin 11. */ +#define GPIO_DIRSET_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_DIRSET_PIN11_Msk (0x1UL << GPIO_DIRSET_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_DIRSET_PIN11_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN11_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN11_Set (1UL) /*!< Set pin as output. */ + +/* Bit 10 : Set as output pin 10. */ +#define GPIO_DIRSET_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_DIRSET_PIN10_Msk (0x1UL << GPIO_DIRSET_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_DIRSET_PIN10_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN10_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN10_Set (1UL) /*!< Set pin as output. */ + +/* Bit 9 : Set as output pin 9. */ +#define GPIO_DIRSET_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_DIRSET_PIN9_Msk (0x1UL << GPIO_DIRSET_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_DIRSET_PIN9_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN9_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN9_Set (1UL) /*!< Set pin as output. */ + +/* Bit 8 : Set as output pin 8. */ +#define GPIO_DIRSET_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_DIRSET_PIN8_Msk (0x1UL << GPIO_DIRSET_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_DIRSET_PIN8_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN8_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN8_Set (1UL) /*!< Set pin as output. */ + +/* Bit 7 : Set as output pin 7. */ +#define GPIO_DIRSET_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_DIRSET_PIN7_Msk (0x1UL << GPIO_DIRSET_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_DIRSET_PIN7_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN7_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN7_Set (1UL) /*!< Set pin as output. */ + +/* Bit 6 : Set as output pin 6. */ +#define GPIO_DIRSET_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_DIRSET_PIN6_Msk (0x1UL << GPIO_DIRSET_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_DIRSET_PIN6_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN6_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN6_Set (1UL) /*!< Set pin as output. */ + +/* Bit 5 : Set as output pin 5. */ +#define GPIO_DIRSET_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_DIRSET_PIN5_Msk (0x1UL << GPIO_DIRSET_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_DIRSET_PIN5_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN5_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN5_Set (1UL) /*!< Set pin as output. */ + +/* Bit 4 : Set as output pin 4. */ +#define GPIO_DIRSET_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_DIRSET_PIN4_Msk (0x1UL << GPIO_DIRSET_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_DIRSET_PIN4_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN4_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN4_Set (1UL) /*!< Set pin as output. */ + +/* Bit 3 : Set as output pin 3. */ +#define GPIO_DIRSET_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_DIRSET_PIN3_Msk (0x1UL << GPIO_DIRSET_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_DIRSET_PIN3_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN3_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN3_Set (1UL) /*!< Set pin as output. */ + +/* Bit 2 : Set as output pin 2. */ +#define GPIO_DIRSET_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_DIRSET_PIN2_Msk (0x1UL << GPIO_DIRSET_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_DIRSET_PIN2_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN2_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN2_Set (1UL) /*!< Set pin as output. */ + +/* Bit 1 : Set as output pin 1. */ +#define GPIO_DIRSET_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_DIRSET_PIN1_Msk (0x1UL << GPIO_DIRSET_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_DIRSET_PIN1_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN1_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN1_Set (1UL) /*!< Set pin as output. */ + +/* Bit 0 : Set as output pin 0. */ +#define GPIO_DIRSET_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_DIRSET_PIN0_Msk (0x1UL << GPIO_DIRSET_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_DIRSET_PIN0_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRSET_PIN0_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRSET_PIN0_Set (1UL) /*!< Set pin as output. */ + +/* Register: GPIO_DIRCLR */ +/* Description: DIR clear register. */ + +/* Bit 31 : Set as input pin 31. */ +#define GPIO_DIRCLR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_DIRCLR_PIN31_Msk (0x1UL << GPIO_DIRCLR_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_DIRCLR_PIN31_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN31_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN31_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 30 : Set as input pin 30. */ +#define GPIO_DIRCLR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_DIRCLR_PIN30_Msk (0x1UL << GPIO_DIRCLR_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_DIRCLR_PIN30_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN30_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN30_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 29 : Set as input pin 29. */ +#define GPIO_DIRCLR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_DIRCLR_PIN29_Msk (0x1UL << GPIO_DIRCLR_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_DIRCLR_PIN29_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN29_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN29_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 28 : Set as input pin 28. */ +#define GPIO_DIRCLR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_DIRCLR_PIN28_Msk (0x1UL << GPIO_DIRCLR_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_DIRCLR_PIN28_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN28_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN28_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 27 : Set as input pin 27. */ +#define GPIO_DIRCLR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_DIRCLR_PIN27_Msk (0x1UL << GPIO_DIRCLR_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_DIRCLR_PIN27_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN27_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN27_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 26 : Set as input pin 26. */ +#define GPIO_DIRCLR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_DIRCLR_PIN26_Msk (0x1UL << GPIO_DIRCLR_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_DIRCLR_PIN26_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN26_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN26_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 25 : Set as input pin 25. */ +#define GPIO_DIRCLR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_DIRCLR_PIN25_Msk (0x1UL << GPIO_DIRCLR_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_DIRCLR_PIN25_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN25_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN25_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 24 : Set as input pin 24. */ +#define GPIO_DIRCLR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_DIRCLR_PIN24_Msk (0x1UL << GPIO_DIRCLR_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_DIRCLR_PIN24_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN24_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN24_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 23 : Set as input pin 23. */ +#define GPIO_DIRCLR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_DIRCLR_PIN23_Msk (0x1UL << GPIO_DIRCLR_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_DIRCLR_PIN23_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN23_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN23_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 22 : Set as input pin 22. */ +#define GPIO_DIRCLR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_DIRCLR_PIN22_Msk (0x1UL << GPIO_DIRCLR_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_DIRCLR_PIN22_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN22_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN22_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 21 : Set as input pin 21. */ +#define GPIO_DIRCLR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_DIRCLR_PIN21_Msk (0x1UL << GPIO_DIRCLR_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_DIRCLR_PIN21_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN21_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN21_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 20 : Set as input pin 20. */ +#define GPIO_DIRCLR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_DIRCLR_PIN20_Msk (0x1UL << GPIO_DIRCLR_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_DIRCLR_PIN20_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN20_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN20_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 19 : Set as input pin 19. */ +#define GPIO_DIRCLR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_DIRCLR_PIN19_Msk (0x1UL << GPIO_DIRCLR_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_DIRCLR_PIN19_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN19_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN19_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 18 : Set as input pin 18. */ +#define GPIO_DIRCLR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_DIRCLR_PIN18_Msk (0x1UL << GPIO_DIRCLR_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_DIRCLR_PIN18_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN18_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN18_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 17 : Set as input pin 17. */ +#define GPIO_DIRCLR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_DIRCLR_PIN17_Msk (0x1UL << GPIO_DIRCLR_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_DIRCLR_PIN17_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN17_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN17_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 16 : Set as input pin 16. */ +#define GPIO_DIRCLR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_DIRCLR_PIN16_Msk (0x1UL << GPIO_DIRCLR_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_DIRCLR_PIN16_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN16_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN16_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 15 : Set as input pin 15. */ +#define GPIO_DIRCLR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_DIRCLR_PIN15_Msk (0x1UL << GPIO_DIRCLR_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_DIRCLR_PIN15_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN15_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN15_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 14 : Set as input pin 14. */ +#define GPIO_DIRCLR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_DIRCLR_PIN14_Msk (0x1UL << GPIO_DIRCLR_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_DIRCLR_PIN14_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN14_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN14_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 13 : Set as input pin 13. */ +#define GPIO_DIRCLR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_DIRCLR_PIN13_Msk (0x1UL << GPIO_DIRCLR_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_DIRCLR_PIN13_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN13_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN13_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 12 : Set as input pin 12. */ +#define GPIO_DIRCLR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_DIRCLR_PIN12_Msk (0x1UL << GPIO_DIRCLR_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_DIRCLR_PIN12_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN12_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN12_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 11 : Set as input pin 11. */ +#define GPIO_DIRCLR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_DIRCLR_PIN11_Msk (0x1UL << GPIO_DIRCLR_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_DIRCLR_PIN11_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN11_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN11_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 10 : Set as input pin 10. */ +#define GPIO_DIRCLR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_DIRCLR_PIN10_Msk (0x1UL << GPIO_DIRCLR_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_DIRCLR_PIN10_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN10_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN10_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 9 : Set as input pin 9. */ +#define GPIO_DIRCLR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_DIRCLR_PIN9_Msk (0x1UL << GPIO_DIRCLR_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_DIRCLR_PIN9_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN9_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN9_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 8 : Set as input pin 8. */ +#define GPIO_DIRCLR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_DIRCLR_PIN8_Msk (0x1UL << GPIO_DIRCLR_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_DIRCLR_PIN8_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN8_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN8_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 7 : Set as input pin 7. */ +#define GPIO_DIRCLR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_DIRCLR_PIN7_Msk (0x1UL << GPIO_DIRCLR_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_DIRCLR_PIN7_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN7_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN7_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 6 : Set as input pin 6. */ +#define GPIO_DIRCLR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_DIRCLR_PIN6_Msk (0x1UL << GPIO_DIRCLR_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_DIRCLR_PIN6_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN6_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN6_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 5 : Set as input pin 5. */ +#define GPIO_DIRCLR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_DIRCLR_PIN5_Msk (0x1UL << GPIO_DIRCLR_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_DIRCLR_PIN5_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN5_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN5_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 4 : Set as input pin 4. */ +#define GPIO_DIRCLR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_DIRCLR_PIN4_Msk (0x1UL << GPIO_DIRCLR_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_DIRCLR_PIN4_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN4_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN4_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 3 : Set as input pin 3. */ +#define GPIO_DIRCLR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_DIRCLR_PIN3_Msk (0x1UL << GPIO_DIRCLR_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_DIRCLR_PIN3_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN3_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN3_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 2 : Set as input pin 2. */ +#define GPIO_DIRCLR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_DIRCLR_PIN2_Msk (0x1UL << GPIO_DIRCLR_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_DIRCLR_PIN2_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN2_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN2_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 1 : Set as input pin 1. */ +#define GPIO_DIRCLR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_DIRCLR_PIN1_Msk (0x1UL << GPIO_DIRCLR_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_DIRCLR_PIN1_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN1_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN1_Clear (1UL) /*!< Set pin as input. */ + +/* Bit 0 : Set as input pin 0. */ +#define GPIO_DIRCLR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_DIRCLR_PIN0_Msk (0x1UL << GPIO_DIRCLR_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_DIRCLR_PIN0_Input (0UL) /*!< Pin set as input. */ +#define GPIO_DIRCLR_PIN0_Output (1UL) /*!< Pin set as output. */ +#define GPIO_DIRCLR_PIN0_Clear (1UL) /*!< Set pin as input. */ + +/* Register: GPIO_PIN_CNF */ +/* Description: Configuration of GPIO pins. */ + +/* Bits 17..16 : Pin sensing mechanism. */ +#define GPIO_PIN_CNF_SENSE_Pos (16UL) /*!< Position of SENSE field. */ +#define GPIO_PIN_CNF_SENSE_Msk (0x3UL << GPIO_PIN_CNF_SENSE_Pos) /*!< Bit mask of SENSE field. */ +#define GPIO_PIN_CNF_SENSE_Disabled (0x00UL) /*!< Disabled. */ +#define GPIO_PIN_CNF_SENSE_High (0x02UL) /*!< Wakeup on high level. */ +#define GPIO_PIN_CNF_SENSE_Low (0x03UL) /*!< Wakeup on low level. */ + +/* Bits 10..8 : Drive configuration. */ +#define GPIO_PIN_CNF_DRIVE_Pos (8UL) /*!< Position of DRIVE field. */ +#define GPIO_PIN_CNF_DRIVE_Msk (0x7UL << GPIO_PIN_CNF_DRIVE_Pos) /*!< Bit mask of DRIVE field. */ +#define GPIO_PIN_CNF_DRIVE_S0S1 (0x00UL) /*!< Standard '0', Standard '1'. */ +#define GPIO_PIN_CNF_DRIVE_H0S1 (0x01UL) /*!< High '0', Standard '1'. */ +#define GPIO_PIN_CNF_DRIVE_S0H1 (0x02UL) /*!< Standard '0', High '1'. */ +#define GPIO_PIN_CNF_DRIVE_H0H1 (0x03UL) /*!< High '0', High '1'. */ +#define GPIO_PIN_CNF_DRIVE_D0S1 (0x04UL) /*!< Disconnected '0', Standard '1'. */ +#define GPIO_PIN_CNF_DRIVE_D0H1 (0x05UL) /*!< Disconnected '0', High '1'. */ +#define GPIO_PIN_CNF_DRIVE_S0D1 (0x06UL) /*!< Standard '0', Disconnected '1'. */ +#define GPIO_PIN_CNF_DRIVE_H0D1 (0x07UL) /*!< High '0', Disconnected '1'. */ + +/* Bits 3..2 : Pull-up or -down configuration. */ +#define GPIO_PIN_CNF_PULL_Pos (2UL) /*!< Position of PULL field. */ +#define GPIO_PIN_CNF_PULL_Msk (0x3UL << GPIO_PIN_CNF_PULL_Pos) /*!< Bit mask of PULL field. */ +#define GPIO_PIN_CNF_PULL_Disabled (0x00UL) /*!< No pull. */ +#define GPIO_PIN_CNF_PULL_Pulldown (0x01UL) /*!< Pulldown on pin. */ +#define GPIO_PIN_CNF_PULL_Pullup (0x03UL) /*!< Pullup on pin. */ + +/* Bit 1 : Connect or disconnect input path. */ +#define GPIO_PIN_CNF_INPUT_Pos (1UL) /*!< Position of INPUT field. */ +#define GPIO_PIN_CNF_INPUT_Msk (0x1UL << GPIO_PIN_CNF_INPUT_Pos) /*!< Bit mask of INPUT field. */ +#define GPIO_PIN_CNF_INPUT_Connect (0UL) /*!< Connect input pin. */ +#define GPIO_PIN_CNF_INPUT_Disconnect (1UL) /*!< Disconnect input pin. */ + +/* Bit 0 : Pin direction. */ +#define GPIO_PIN_CNF_DIR_Pos (0UL) /*!< Position of DIR field. */ +#define GPIO_PIN_CNF_DIR_Msk (0x1UL << GPIO_PIN_CNF_DIR_Pos) /*!< Bit mask of DIR field. */ +#define GPIO_PIN_CNF_DIR_Input (0UL) /*!< Configure pin as an input pin. */ +#define GPIO_PIN_CNF_DIR_Output (1UL) /*!< Configure pin as an output pin. */ + + +/* Peripheral: GPIOTE */ +/* Description: GPIO tasks and events. */ + +/* Register: GPIOTE_INTENSET */ +/* Description: Interrupt enable set register. */ + +/* Bit 31 : Enable interrupt on PORT event. */ +#define GPIOTE_INTENSET_PORT_Pos (31UL) /*!< Position of PORT field. */ +#define GPIOTE_INTENSET_PORT_Msk (0x1UL << GPIOTE_INTENSET_PORT_Pos) /*!< Bit mask of PORT field. */ +#define GPIOTE_INTENSET_PORT_Disabled (0UL) /*!< Interrupt disabled. */ +#define GPIOTE_INTENSET_PORT_Enabled (1UL) /*!< Interrupt enabled. */ +#define GPIOTE_INTENSET_PORT_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 3 : Enable interrupt on IN[3] event. */ +#define GPIOTE_INTENSET_IN3_Pos (3UL) /*!< Position of IN3 field. */ +#define GPIOTE_INTENSET_IN3_Msk (0x1UL << GPIOTE_INTENSET_IN3_Pos) /*!< Bit mask of IN3 field. */ +#define GPIOTE_INTENSET_IN3_Disabled (0UL) /*!< Interrupt disabled. */ +#define GPIOTE_INTENSET_IN3_Enabled (1UL) /*!< Interrupt enabled. */ +#define GPIOTE_INTENSET_IN3_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 2 : Enable interrupt on IN[2] event. */ +#define GPIOTE_INTENSET_IN2_Pos (2UL) /*!< Position of IN2 field. */ +#define GPIOTE_INTENSET_IN2_Msk (0x1UL << GPIOTE_INTENSET_IN2_Pos) /*!< Bit mask of IN2 field. */ +#define GPIOTE_INTENSET_IN2_Disabled (0UL) /*!< Interrupt disabled. */ +#define GPIOTE_INTENSET_IN2_Enabled (1UL) /*!< Interrupt enabled. */ +#define GPIOTE_INTENSET_IN2_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 1 : Enable interrupt on IN[1] event. */ +#define GPIOTE_INTENSET_IN1_Pos (1UL) /*!< Position of IN1 field. */ +#define GPIOTE_INTENSET_IN1_Msk (0x1UL << GPIOTE_INTENSET_IN1_Pos) /*!< Bit mask of IN1 field. */ +#define GPIOTE_INTENSET_IN1_Disabled (0UL) /*!< Interrupt disabled. */ +#define GPIOTE_INTENSET_IN1_Enabled (1UL) /*!< Interrupt enabled. */ +#define GPIOTE_INTENSET_IN1_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 0 : Enable interrupt on IN[0] event. */ +#define GPIOTE_INTENSET_IN0_Pos (0UL) /*!< Position of IN0 field. */ +#define GPIOTE_INTENSET_IN0_Msk (0x1UL << GPIOTE_INTENSET_IN0_Pos) /*!< Bit mask of IN0 field. */ +#define GPIOTE_INTENSET_IN0_Disabled (0UL) /*!< Interrupt disabled. */ +#define GPIOTE_INTENSET_IN0_Enabled (1UL) /*!< Interrupt enabled. */ +#define GPIOTE_INTENSET_IN0_Set (1UL) /*!< Enable interrupt on write. */ + +/* Register: GPIOTE_INTENCLR */ +/* Description: Interrupt enable clear register. */ + +/* Bit 31 : Disable interrupt on PORT event. */ +#define GPIOTE_INTENCLR_PORT_Pos (31UL) /*!< Position of PORT field. */ +#define GPIOTE_INTENCLR_PORT_Msk (0x1UL << GPIOTE_INTENCLR_PORT_Pos) /*!< Bit mask of PORT field. */ +#define GPIOTE_INTENCLR_PORT_Disabled (0UL) /*!< Interrupt disabled. */ +#define GPIOTE_INTENCLR_PORT_Enabled (1UL) /*!< Interrupt enabled. */ +#define GPIOTE_INTENCLR_PORT_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 3 : Disable interrupt on IN[3] event. */ +#define GPIOTE_INTENCLR_IN3_Pos (3UL) /*!< Position of IN3 field. */ +#define GPIOTE_INTENCLR_IN3_Msk (0x1UL << GPIOTE_INTENCLR_IN3_Pos) /*!< Bit mask of IN3 field. */ +#define GPIOTE_INTENCLR_IN3_Disabled (0UL) /*!< Interrupt disabled. */ +#define GPIOTE_INTENCLR_IN3_Enabled (1UL) /*!< Interrupt enabled. */ +#define GPIOTE_INTENCLR_IN3_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 2 : Disable interrupt on IN[2] event. */ +#define GPIOTE_INTENCLR_IN2_Pos (2UL) /*!< Position of IN2 field. */ +#define GPIOTE_INTENCLR_IN2_Msk (0x1UL << GPIOTE_INTENCLR_IN2_Pos) /*!< Bit mask of IN2 field. */ +#define GPIOTE_INTENCLR_IN2_Disabled (0UL) /*!< Interrupt disabled. */ +#define GPIOTE_INTENCLR_IN2_Enabled (1UL) /*!< Interrupt enabled. */ +#define GPIOTE_INTENCLR_IN2_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 1 : Disable interrupt on IN[1] event. */ +#define GPIOTE_INTENCLR_IN1_Pos (1UL) /*!< Position of IN1 field. */ +#define GPIOTE_INTENCLR_IN1_Msk (0x1UL << GPIOTE_INTENCLR_IN1_Pos) /*!< Bit mask of IN1 field. */ +#define GPIOTE_INTENCLR_IN1_Disabled (0UL) /*!< Interrupt disabled. */ +#define GPIOTE_INTENCLR_IN1_Enabled (1UL) /*!< Interrupt enabled. */ +#define GPIOTE_INTENCLR_IN1_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 0 : Disable interrupt on IN[0] event. */ +#define GPIOTE_INTENCLR_IN0_Pos (0UL) /*!< Position of IN0 field. */ +#define GPIOTE_INTENCLR_IN0_Msk (0x1UL << GPIOTE_INTENCLR_IN0_Pos) /*!< Bit mask of IN0 field. */ +#define GPIOTE_INTENCLR_IN0_Disabled (0UL) /*!< Interrupt disabled. */ +#define GPIOTE_INTENCLR_IN0_Enabled (1UL) /*!< Interrupt enabled. */ +#define GPIOTE_INTENCLR_IN0_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Register: GPIOTE_CONFIG */ +/* Description: Channel configuration registers. */ + +/* Bit 20 : Initial value of the output when the GPIOTE channel is configured as a Task. */ +#define GPIOTE_CONFIG_OUTINIT_Pos (20UL) /*!< Position of OUTINIT field. */ +#define GPIOTE_CONFIG_OUTINIT_Msk (0x1UL << GPIOTE_CONFIG_OUTINIT_Pos) /*!< Bit mask of OUTINIT field. */ +#define GPIOTE_CONFIG_OUTINIT_Low (0UL) /*!< Initial low output when in task mode. */ +#define GPIOTE_CONFIG_OUTINIT_High (1UL) /*!< Initial high output when in task mode. */ + +/* Bits 17..16 : Effects on output when in Task mode, or events on input that generates an event. */ +#define GPIOTE_CONFIG_POLARITY_Pos (16UL) /*!< Position of POLARITY field. */ +#define GPIOTE_CONFIG_POLARITY_Msk (0x3UL << GPIOTE_CONFIG_POLARITY_Pos) /*!< Bit mask of POLARITY field. */ +#define GPIOTE_CONFIG_POLARITY_None (0x00UL) /*!< No task or event. */ +#define GPIOTE_CONFIG_POLARITY_LoToHi (0x01UL) /*!< Low to high. */ +#define GPIOTE_CONFIG_POLARITY_HiToLo (0x02UL) /*!< High to low. */ +#define GPIOTE_CONFIG_POLARITY_Toggle (0x03UL) /*!< Toggle. */ + +/* Bits 12..8 : Pin select. */ +#define GPIOTE_CONFIG_PSEL_Pos (8UL) /*!< Position of PSEL field. */ +#define GPIOTE_CONFIG_PSEL_Msk (0x1FUL << GPIOTE_CONFIG_PSEL_Pos) /*!< Bit mask of PSEL field. */ + +/* Bits 1..0 : Mode */ +#define GPIOTE_CONFIG_MODE_Pos (0UL) /*!< Position of MODE field. */ +#define GPIOTE_CONFIG_MODE_Msk (0x3UL << GPIOTE_CONFIG_MODE_Pos) /*!< Bit mask of MODE field. */ +#define GPIOTE_CONFIG_MODE_Disabled (0x00UL) /*!< Disabled. */ +#define GPIOTE_CONFIG_MODE_Event (0x01UL) /*!< Channel configure in event mode. */ +#define GPIOTE_CONFIG_MODE_Task (0x03UL) /*!< Channel configure in task mode. */ + +/* Register: GPIOTE_POWER */ +/* Description: Peripheral power control. */ + +/* Bit 0 : Peripheral power control. */ +#define GPIOTE_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ +#define GPIOTE_POWER_POWER_Msk (0x1UL << GPIOTE_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ +#define GPIOTE_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ +#define GPIOTE_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ + + +/* Peripheral: LPCOMP */ +/* Description: Low power comparator. */ + +/* Register: LPCOMP_SHORTS */ +/* Description: Shortcuts for the LPCOMP. */ + +/* Bit 4 : Shortcut between CROSS event and STOP task. */ +#define LPCOMP_SHORTS_CROSS_STOP_Pos (4UL) /*!< Position of CROSS_STOP field. */ +#define LPCOMP_SHORTS_CROSS_STOP_Msk (0x1UL << LPCOMP_SHORTS_CROSS_STOP_Pos) /*!< Bit mask of CROSS_STOP field. */ +#define LPCOMP_SHORTS_CROSS_STOP_Disabled (0UL) /*!< Shortcut disabled. */ +#define LPCOMP_SHORTS_CROSS_STOP_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Bit 3 : Shortcut between UP event and STOP task. */ +#define LPCOMP_SHORTS_UP_STOP_Pos (3UL) /*!< Position of UP_STOP field. */ +#define LPCOMP_SHORTS_UP_STOP_Msk (0x1UL << LPCOMP_SHORTS_UP_STOP_Pos) /*!< Bit mask of UP_STOP field. */ +#define LPCOMP_SHORTS_UP_STOP_Disabled (0UL) /*!< Shortcut disabled. */ +#define LPCOMP_SHORTS_UP_STOP_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Bit 2 : Shortcut between DOWN event and STOP task. */ +#define LPCOMP_SHORTS_DOWN_STOP_Pos (2UL) /*!< Position of DOWN_STOP field. */ +#define LPCOMP_SHORTS_DOWN_STOP_Msk (0x1UL << LPCOMP_SHORTS_DOWN_STOP_Pos) /*!< Bit mask of DOWN_STOP field. */ +#define LPCOMP_SHORTS_DOWN_STOP_Disabled (0UL) /*!< Shortcut disabled. */ +#define LPCOMP_SHORTS_DOWN_STOP_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Bit 1 : Shortcut between RADY event and STOP task. */ +#define LPCOMP_SHORTS_READY_STOP_Pos (1UL) /*!< Position of READY_STOP field. */ +#define LPCOMP_SHORTS_READY_STOP_Msk (0x1UL << LPCOMP_SHORTS_READY_STOP_Pos) /*!< Bit mask of READY_STOP field. */ +#define LPCOMP_SHORTS_READY_STOP_Disabled (0UL) /*!< Shortcut disabled. */ +#define LPCOMP_SHORTS_READY_STOP_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Bit 0 : Shortcut between READY event and SAMPLE task. */ +#define LPCOMP_SHORTS_READY_SAMPLE_Pos (0UL) /*!< Position of READY_SAMPLE field. */ +#define LPCOMP_SHORTS_READY_SAMPLE_Msk (0x1UL << LPCOMP_SHORTS_READY_SAMPLE_Pos) /*!< Bit mask of READY_SAMPLE field. */ +#define LPCOMP_SHORTS_READY_SAMPLE_Disabled (0UL) /*!< Shortcut disabled. */ +#define LPCOMP_SHORTS_READY_SAMPLE_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Register: LPCOMP_INTENSET */ +/* Description: Interrupt enable set register. */ + +/* Bit 3 : Enable interrupt on CROSS event. */ +#define LPCOMP_INTENSET_CROSS_Pos (3UL) /*!< Position of CROSS field. */ +#define LPCOMP_INTENSET_CROSS_Msk (0x1UL << LPCOMP_INTENSET_CROSS_Pos) /*!< Bit mask of CROSS field. */ +#define LPCOMP_INTENSET_CROSS_Disabled (0UL) /*!< Interrupt disabled. */ +#define LPCOMP_INTENSET_CROSS_Enabled (1UL) /*!< Interrupt enabled. */ +#define LPCOMP_INTENSET_CROSS_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 2 : Enable interrupt on UP event. */ +#define LPCOMP_INTENSET_UP_Pos (2UL) /*!< Position of UP field. */ +#define LPCOMP_INTENSET_UP_Msk (0x1UL << LPCOMP_INTENSET_UP_Pos) /*!< Bit mask of UP field. */ +#define LPCOMP_INTENSET_UP_Disabled (0UL) /*!< Interrupt disabled. */ +#define LPCOMP_INTENSET_UP_Enabled (1UL) /*!< Interrupt enabled. */ +#define LPCOMP_INTENSET_UP_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 1 : Enable interrupt on DOWN event. */ +#define LPCOMP_INTENSET_DOWN_Pos (1UL) /*!< Position of DOWN field. */ +#define LPCOMP_INTENSET_DOWN_Msk (0x1UL << LPCOMP_INTENSET_DOWN_Pos) /*!< Bit mask of DOWN field. */ +#define LPCOMP_INTENSET_DOWN_Disabled (0UL) /*!< Interrupt disabled. */ +#define LPCOMP_INTENSET_DOWN_Enabled (1UL) /*!< Interrupt enabled. */ +#define LPCOMP_INTENSET_DOWN_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 0 : Enable interrupt on READY event. */ +#define LPCOMP_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */ +#define LPCOMP_INTENSET_READY_Msk (0x1UL << LPCOMP_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ +#define LPCOMP_INTENSET_READY_Disabled (0UL) /*!< Interrupt disabled. */ +#define LPCOMP_INTENSET_READY_Enabled (1UL) /*!< Interrupt enabled. */ +#define LPCOMP_INTENSET_READY_Set (1UL) /*!< Enable interrupt on write. */ + +/* Register: LPCOMP_INTENCLR */ +/* Description: Interrupt enable clear register. */ + +/* Bit 3 : Disable interrupt on CROSS event. */ +#define LPCOMP_INTENCLR_CROSS_Pos (3UL) /*!< Position of CROSS field. */ +#define LPCOMP_INTENCLR_CROSS_Msk (0x1UL << LPCOMP_INTENCLR_CROSS_Pos) /*!< Bit mask of CROSS field. */ +#define LPCOMP_INTENCLR_CROSS_Disabled (0UL) /*!< Interrupt disabled. */ +#define LPCOMP_INTENCLR_CROSS_Enabled (1UL) /*!< Interrupt enabled. */ +#define LPCOMP_INTENCLR_CROSS_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 2 : Disable interrupt on UP event. */ +#define LPCOMP_INTENCLR_UP_Pos (2UL) /*!< Position of UP field. */ +#define LPCOMP_INTENCLR_UP_Msk (0x1UL << LPCOMP_INTENCLR_UP_Pos) /*!< Bit mask of UP field. */ +#define LPCOMP_INTENCLR_UP_Disabled (0UL) /*!< Interrupt disabled. */ +#define LPCOMP_INTENCLR_UP_Enabled (1UL) /*!< Interrupt enabled. */ +#define LPCOMP_INTENCLR_UP_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 1 : Disable interrupt on DOWN event. */ +#define LPCOMP_INTENCLR_DOWN_Pos (1UL) /*!< Position of DOWN field. */ +#define LPCOMP_INTENCLR_DOWN_Msk (0x1UL << LPCOMP_INTENCLR_DOWN_Pos) /*!< Bit mask of DOWN field. */ +#define LPCOMP_INTENCLR_DOWN_Disabled (0UL) /*!< Interrupt disabled. */ +#define LPCOMP_INTENCLR_DOWN_Enabled (1UL) /*!< Interrupt enabled. */ +#define LPCOMP_INTENCLR_DOWN_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 0 : Disable interrupt on READY event. */ +#define LPCOMP_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */ +#define LPCOMP_INTENCLR_READY_Msk (0x1UL << LPCOMP_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ +#define LPCOMP_INTENCLR_READY_Disabled (0UL) /*!< Interrupt disabled. */ +#define LPCOMP_INTENCLR_READY_Enabled (1UL) /*!< Interrupt enabled. */ +#define LPCOMP_INTENCLR_READY_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Register: LPCOMP_RESULT */ +/* Description: Result of last compare. */ + +/* Bit 0 : Result of last compare. Decision point SAMPLE task. */ +#define LPCOMP_RESULT_RESULT_Pos (0UL) /*!< Position of RESULT field. */ +#define LPCOMP_RESULT_RESULT_Msk (0x1UL << LPCOMP_RESULT_RESULT_Pos) /*!< Bit mask of RESULT field. */ +#define LPCOMP_RESULT_RESULT_Below (0UL) /*!< Input voltage is bellow the reference threshold. */ +#define LPCOMP_RESULT_RESULT_Above (1UL) /*!< Input voltage is above the reference threshold. */ + +/* Register: LPCOMP_ENABLE */ +/* Description: Enable the LPCOMP. */ + +/* Bits 1..0 : Enable or disable LPCOMP. */ +#define LPCOMP_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define LPCOMP_ENABLE_ENABLE_Msk (0x3UL << LPCOMP_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define LPCOMP_ENABLE_ENABLE_Disabled (0x00UL) /*!< Disabled LPCOMP. */ +#define LPCOMP_ENABLE_ENABLE_Enabled (0x01UL) /*!< Enable LPCOMP. */ + +/* Register: LPCOMP_PSEL */ +/* Description: Input pin select. */ + +/* Bits 2..0 : Analog input pin select. */ +#define LPCOMP_PSEL_PSEL_Pos (0UL) /*!< Position of PSEL field. */ +#define LPCOMP_PSEL_PSEL_Msk (0x7UL << LPCOMP_PSEL_PSEL_Pos) /*!< Bit mask of PSEL field. */ +#define LPCOMP_PSEL_PSEL_AnalogInput0 (0UL) /*!< Use analog input 0 as analog input. */ +#define LPCOMP_PSEL_PSEL_AnalogInput1 (1UL) /*!< Use analog input 1 as analog input. */ +#define LPCOMP_PSEL_PSEL_AnalogInput2 (2UL) /*!< Use analog input 2 as analog input. */ +#define LPCOMP_PSEL_PSEL_AnalogInput3 (3UL) /*!< Use analog input 3 as analog input. */ +#define LPCOMP_PSEL_PSEL_AnalogInput4 (4UL) /*!< Use analog input 4 as analog input. */ +#define LPCOMP_PSEL_PSEL_AnalogInput5 (5UL) /*!< Use analog input 5 as analog input. */ +#define LPCOMP_PSEL_PSEL_AnalogInput6 (6UL) /*!< Use analog input 6 as analog input. */ +#define LPCOMP_PSEL_PSEL_AnalogInput7 (7UL) /*!< Use analog input 7 as analog input. */ + +/* Register: LPCOMP_REFSEL */ +/* Description: Reference select. */ + +/* Bits 2..0 : Reference select. */ +#define LPCOMP_REFSEL_REFSEL_Pos (0UL) /*!< Position of REFSEL field. */ +#define LPCOMP_REFSEL_REFSEL_Msk (0x7UL << LPCOMP_REFSEL_REFSEL_Pos) /*!< Bit mask of REFSEL field. */ +#define LPCOMP_REFSEL_REFSEL_SupplyOneEighthPrescaling (0UL) /*!< Use supply with a 1/8 prescaler as reference. */ +#define LPCOMP_REFSEL_REFSEL_SupplyTwoEighthsPrescaling (1UL) /*!< Use supply with a 2/8 prescaler as reference. */ +#define LPCOMP_REFSEL_REFSEL_SupplyThreeEighthsPrescaling (2UL) /*!< Use supply with a 3/8 prescaler as reference. */ +#define LPCOMP_REFSEL_REFSEL_SupplyFourEighthsPrescaling (3UL) /*!< Use supply with a 4/8 prescaler as reference. */ +#define LPCOMP_REFSEL_REFSEL_SupplyFiveEighthsPrescaling (4UL) /*!< Use supply with a 5/8 prescaler as reference. */ +#define LPCOMP_REFSEL_REFSEL_SupplySixEighthsPrescaling (5UL) /*!< Use supply with a 6/8 prescaler as reference. */ +#define LPCOMP_REFSEL_REFSEL_SupplySevenEighthsPrescaling (6UL) /*!< Use supply with a 7/8 prescaler as reference. */ +#define LPCOMP_REFSEL_REFSEL_ARef (7UL) /*!< Use external analog reference as reference. */ + +/* Register: LPCOMP_EXTREFSEL */ +/* Description: External reference select. */ + +/* Bit 0 : External analog reference pin selection. */ +#define LPCOMP_EXTREFSEL_EXTREFSEL_Pos (0UL) /*!< Position of EXTREFSEL field. */ +#define LPCOMP_EXTREFSEL_EXTREFSEL_Msk (0x1UL << LPCOMP_EXTREFSEL_EXTREFSEL_Pos) /*!< Bit mask of EXTREFSEL field. */ +#define LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference0 (0UL) /*!< Use analog reference 0 as reference. */ +#define LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference1 (1UL) /*!< Use analog reference 1 as reference. */ + +/* Register: LPCOMP_ANADETECT */ +/* Description: Analog detect configuration. */ + +/* Bits 1..0 : Analog detect configuration. */ +#define LPCOMP_ANADETECT_ANADETECT_Pos (0UL) /*!< Position of ANADETECT field. */ +#define LPCOMP_ANADETECT_ANADETECT_Msk (0x3UL << LPCOMP_ANADETECT_ANADETECT_Pos) /*!< Bit mask of ANADETECT field. */ +#define LPCOMP_ANADETECT_ANADETECT_Cross (0UL) /*!< Generate ANADETEC on crossing, both upwards and downwards crossing. */ +#define LPCOMP_ANADETECT_ANADETECT_Up (1UL) /*!< Generate ANADETEC on upwards crossing only. */ +#define LPCOMP_ANADETECT_ANADETECT_Down (2UL) /*!< Generate ANADETEC on downwards crossing only. */ + +/* Register: LPCOMP_POWER */ +/* Description: Peripheral power control. */ + +/* Bit 0 : Peripheral power control. */ +#define LPCOMP_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ +#define LPCOMP_POWER_POWER_Msk (0x1UL << LPCOMP_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ +#define LPCOMP_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ +#define LPCOMP_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ + + +/* Peripheral: MPU */ +/* Description: Memory Protection Unit. */ + +/* Register: MPU_PERR0 */ +/* Description: Configuration of peripherals in mpu regions. */ + +/* Bit 31 : PPI region configuration. */ +#define MPU_PERR0_PPI_Pos (31UL) /*!< Position of PPI field. */ +#define MPU_PERR0_PPI_Msk (0x1UL << MPU_PERR0_PPI_Pos) /*!< Bit mask of PPI field. */ +#define MPU_PERR0_PPI_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ +#define MPU_PERR0_PPI_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ + +/* Bit 30 : NVMC region configuration. */ +#define MPU_PERR0_NVMC_Pos (30UL) /*!< Position of NVMC field. */ +#define MPU_PERR0_NVMC_Msk (0x1UL << MPU_PERR0_NVMC_Pos) /*!< Bit mask of NVMC field. */ +#define MPU_PERR0_NVMC_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ +#define MPU_PERR0_NVMC_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ + +/* Bit 19 : LPCOMP region configuration. */ +#define MPU_PERR0_LPCOMP_Pos (19UL) /*!< Position of LPCOMP field. */ +#define MPU_PERR0_LPCOMP_Msk (0x1UL << MPU_PERR0_LPCOMP_Pos) /*!< Bit mask of LPCOMP field. */ +#define MPU_PERR0_LPCOMP_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ +#define MPU_PERR0_LPCOMP_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ + +/* Bit 18 : QDEC region configuration. */ +#define MPU_PERR0_QDEC_Pos (18UL) /*!< Position of QDEC field. */ +#define MPU_PERR0_QDEC_Msk (0x1UL << MPU_PERR0_QDEC_Pos) /*!< Bit mask of QDEC field. */ +#define MPU_PERR0_QDEC_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ +#define MPU_PERR0_QDEC_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ + +/* Bit 17 : RTC1 region configuration. */ +#define MPU_PERR0_RTC1_Pos (17UL) /*!< Position of RTC1 field. */ +#define MPU_PERR0_RTC1_Msk (0x1UL << MPU_PERR0_RTC1_Pos) /*!< Bit mask of RTC1 field. */ +#define MPU_PERR0_RTC1_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ +#define MPU_PERR0_RTC1_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ + +/* Bit 16 : WDT region configuration. */ +#define MPU_PERR0_WDT_Pos (16UL) /*!< Position of WDT field. */ +#define MPU_PERR0_WDT_Msk (0x1UL << MPU_PERR0_WDT_Pos) /*!< Bit mask of WDT field. */ +#define MPU_PERR0_WDT_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ +#define MPU_PERR0_WDT_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ + +/* Bit 15 : CCM and AAR region configuration. */ +#define MPU_PERR0_CCM_AAR_Pos (15UL) /*!< Position of CCM_AAR field. */ +#define MPU_PERR0_CCM_AAR_Msk (0x1UL << MPU_PERR0_CCM_AAR_Pos) /*!< Bit mask of CCM_AAR field. */ +#define MPU_PERR0_CCM_AAR_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ +#define MPU_PERR0_CCM_AAR_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ + +/* Bit 14 : ECB region configuration. */ +#define MPU_PERR0_ECB_Pos (14UL) /*!< Position of ECB field. */ +#define MPU_PERR0_ECB_Msk (0x1UL << MPU_PERR0_ECB_Pos) /*!< Bit mask of ECB field. */ +#define MPU_PERR0_ECB_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ +#define MPU_PERR0_ECB_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ + +/* Bit 13 : RNG region configuration. */ +#define MPU_PERR0_RNG_Pos (13UL) /*!< Position of RNG field. */ +#define MPU_PERR0_RNG_Msk (0x1UL << MPU_PERR0_RNG_Pos) /*!< Bit mask of RNG field. */ +#define MPU_PERR0_RNG_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ +#define MPU_PERR0_RNG_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ + +/* Bit 12 : TEMP region configuration. */ +#define MPU_PERR0_TEMP_Pos (12UL) /*!< Position of TEMP field. */ +#define MPU_PERR0_TEMP_Msk (0x1UL << MPU_PERR0_TEMP_Pos) /*!< Bit mask of TEMP field. */ +#define MPU_PERR0_TEMP_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ +#define MPU_PERR0_TEMP_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ + +/* Bit 11 : RTC0 region configuration. */ +#define MPU_PERR0_RTC0_Pos (11UL) /*!< Position of RTC0 field. */ +#define MPU_PERR0_RTC0_Msk (0x1UL << MPU_PERR0_RTC0_Pos) /*!< Bit mask of RTC0 field. */ +#define MPU_PERR0_RTC0_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ +#define MPU_PERR0_RTC0_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ + +/* Bit 10 : TIMER2 region configuration. */ +#define MPU_PERR0_TIMER2_Pos (10UL) /*!< Position of TIMER2 field. */ +#define MPU_PERR0_TIMER2_Msk (0x1UL << MPU_PERR0_TIMER2_Pos) /*!< Bit mask of TIMER2 field. */ +#define MPU_PERR0_TIMER2_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ +#define MPU_PERR0_TIMER2_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ + +/* Bit 9 : TIMER1 region configuration. */ +#define MPU_PERR0_TIMER1_Pos (9UL) /*!< Position of TIMER1 field. */ +#define MPU_PERR0_TIMER1_Msk (0x1UL << MPU_PERR0_TIMER1_Pos) /*!< Bit mask of TIMER1 field. */ +#define MPU_PERR0_TIMER1_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ +#define MPU_PERR0_TIMER1_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ + +/* Bit 8 : TIMER0 region configuration. */ +#define MPU_PERR0_TIMER0_Pos (8UL) /*!< Position of TIMER0 field. */ +#define MPU_PERR0_TIMER0_Msk (0x1UL << MPU_PERR0_TIMER0_Pos) /*!< Bit mask of TIMER0 field. */ +#define MPU_PERR0_TIMER0_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ +#define MPU_PERR0_TIMER0_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ + +/* Bit 7 : ADC region configuration. */ +#define MPU_PERR0_ADC_Pos (7UL) /*!< Position of ADC field. */ +#define MPU_PERR0_ADC_Msk (0x1UL << MPU_PERR0_ADC_Pos) /*!< Bit mask of ADC field. */ +#define MPU_PERR0_ADC_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ +#define MPU_PERR0_ADC_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ + +/* Bit 6 : GPIOTE region configuration. */ +#define MPU_PERR0_GPIOTE_Pos (6UL) /*!< Position of GPIOTE field. */ +#define MPU_PERR0_GPIOTE_Msk (0x1UL << MPU_PERR0_GPIOTE_Pos) /*!< Bit mask of GPIOTE field. */ +#define MPU_PERR0_GPIOTE_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ +#define MPU_PERR0_GPIOTE_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ + +/* Bit 4 : SPI1 and TWI1 region configuration. */ +#define MPU_PERR0_SPI1_TWI1_Pos (4UL) /*!< Position of SPI1_TWI1 field. */ +#define MPU_PERR0_SPI1_TWI1_Msk (0x1UL << MPU_PERR0_SPI1_TWI1_Pos) /*!< Bit mask of SPI1_TWI1 field. */ +#define MPU_PERR0_SPI1_TWI1_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ +#define MPU_PERR0_SPI1_TWI1_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ + +/* Bit 3 : SPI0 and TWI0 region configuration. */ +#define MPU_PERR0_SPI0_TWI0_Pos (3UL) /*!< Position of SPI0_TWI0 field. */ +#define MPU_PERR0_SPI0_TWI0_Msk (0x1UL << MPU_PERR0_SPI0_TWI0_Pos) /*!< Bit mask of SPI0_TWI0 field. */ +#define MPU_PERR0_SPI0_TWI0_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ +#define MPU_PERR0_SPI0_TWI0_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ + +/* Bit 2 : UART0 region configuration. */ +#define MPU_PERR0_UART0_Pos (2UL) /*!< Position of UART0 field. */ +#define MPU_PERR0_UART0_Msk (0x1UL << MPU_PERR0_UART0_Pos) /*!< Bit mask of UART0 field. */ +#define MPU_PERR0_UART0_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ +#define MPU_PERR0_UART0_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ + +/* Bit 1 : RADIO region configuration. */ +#define MPU_PERR0_RADIO_Pos (1UL) /*!< Position of RADIO field. */ +#define MPU_PERR0_RADIO_Msk (0x1UL << MPU_PERR0_RADIO_Pos) /*!< Bit mask of RADIO field. */ +#define MPU_PERR0_RADIO_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ +#define MPU_PERR0_RADIO_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ + +/* Bit 0 : POWER_CLOCK region configuration. */ +#define MPU_PERR0_POWER_CLOCK_Pos (0UL) /*!< Position of POWER_CLOCK field. */ +#define MPU_PERR0_POWER_CLOCK_Msk (0x1UL << MPU_PERR0_POWER_CLOCK_Pos) /*!< Bit mask of POWER_CLOCK field. */ +#define MPU_PERR0_POWER_CLOCK_InRegion1 (0UL) /*!< Peripheral configured in region 1. */ +#define MPU_PERR0_POWER_CLOCK_InRegion0 (1UL) /*!< Peripheral configured in region 0. */ + +/* Register: MPU_PROTENSET0 */ +/* Description: Erase and write protection bit enable set register. */ + +/* Bit 31 : Protection enable for region 31. */ +#define MPU_PROTENSET0_PROTREG31_Pos (31UL) /*!< Position of PROTREG31 field. */ +#define MPU_PROTENSET0_PROTREG31_Msk (0x1UL << MPU_PROTENSET0_PROTREG31_Pos) /*!< Bit mask of PROTREG31 field. */ +#define MPU_PROTENSET0_PROTREG31_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG31_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG31_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 30 : Protection enable for region 30. */ +#define MPU_PROTENSET0_PROTREG30_Pos (30UL) /*!< Position of PROTREG30 field. */ +#define MPU_PROTENSET0_PROTREG30_Msk (0x1UL << MPU_PROTENSET0_PROTREG30_Pos) /*!< Bit mask of PROTREG30 field. */ +#define MPU_PROTENSET0_PROTREG30_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG30_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG30_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 29 : Protection enable for region 29. */ +#define MPU_PROTENSET0_PROTREG29_Pos (29UL) /*!< Position of PROTREG29 field. */ +#define MPU_PROTENSET0_PROTREG29_Msk (0x1UL << MPU_PROTENSET0_PROTREG29_Pos) /*!< Bit mask of PROTREG29 field. */ +#define MPU_PROTENSET0_PROTREG29_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG29_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG29_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 28 : Protection enable for region 28. */ +#define MPU_PROTENSET0_PROTREG28_Pos (28UL) /*!< Position of PROTREG28 field. */ +#define MPU_PROTENSET0_PROTREG28_Msk (0x1UL << MPU_PROTENSET0_PROTREG28_Pos) /*!< Bit mask of PROTREG28 field. */ +#define MPU_PROTENSET0_PROTREG28_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG28_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG28_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 27 : Protection enable for region 27. */ +#define MPU_PROTENSET0_PROTREG27_Pos (27UL) /*!< Position of PROTREG27 field. */ +#define MPU_PROTENSET0_PROTREG27_Msk (0x1UL << MPU_PROTENSET0_PROTREG27_Pos) /*!< Bit mask of PROTREG27 field. */ +#define MPU_PROTENSET0_PROTREG27_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG27_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG27_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 26 : Protection enable for region 26. */ +#define MPU_PROTENSET0_PROTREG26_Pos (26UL) /*!< Position of PROTREG26 field. */ +#define MPU_PROTENSET0_PROTREG26_Msk (0x1UL << MPU_PROTENSET0_PROTREG26_Pos) /*!< Bit mask of PROTREG26 field. */ +#define MPU_PROTENSET0_PROTREG26_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG26_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG26_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 25 : Protection enable for region 25. */ +#define MPU_PROTENSET0_PROTREG25_Pos (25UL) /*!< Position of PROTREG25 field. */ +#define MPU_PROTENSET0_PROTREG25_Msk (0x1UL << MPU_PROTENSET0_PROTREG25_Pos) /*!< Bit mask of PROTREG25 field. */ +#define MPU_PROTENSET0_PROTREG25_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG25_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG25_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 24 : Protection enable for region 24. */ +#define MPU_PROTENSET0_PROTREG24_Pos (24UL) /*!< Position of PROTREG24 field. */ +#define MPU_PROTENSET0_PROTREG24_Msk (0x1UL << MPU_PROTENSET0_PROTREG24_Pos) /*!< Bit mask of PROTREG24 field. */ +#define MPU_PROTENSET0_PROTREG24_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG24_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG24_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 23 : Protection enable for region 23. */ +#define MPU_PROTENSET0_PROTREG23_Pos (23UL) /*!< Position of PROTREG23 field. */ +#define MPU_PROTENSET0_PROTREG23_Msk (0x1UL << MPU_PROTENSET0_PROTREG23_Pos) /*!< Bit mask of PROTREG23 field. */ +#define MPU_PROTENSET0_PROTREG23_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG23_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG23_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 22 : Protection enable for region 22. */ +#define MPU_PROTENSET0_PROTREG22_Pos (22UL) /*!< Position of PROTREG22 field. */ +#define MPU_PROTENSET0_PROTREG22_Msk (0x1UL << MPU_PROTENSET0_PROTREG22_Pos) /*!< Bit mask of PROTREG22 field. */ +#define MPU_PROTENSET0_PROTREG22_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG22_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG22_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 21 : Protection enable for region 21. */ +#define MPU_PROTENSET0_PROTREG21_Pos (21UL) /*!< Position of PROTREG21 field. */ +#define MPU_PROTENSET0_PROTREG21_Msk (0x1UL << MPU_PROTENSET0_PROTREG21_Pos) /*!< Bit mask of PROTREG21 field. */ +#define MPU_PROTENSET0_PROTREG21_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG21_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG21_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 20 : Protection enable for region 20. */ +#define MPU_PROTENSET0_PROTREG20_Pos (20UL) /*!< Position of PROTREG20 field. */ +#define MPU_PROTENSET0_PROTREG20_Msk (0x1UL << MPU_PROTENSET0_PROTREG20_Pos) /*!< Bit mask of PROTREG20 field. */ +#define MPU_PROTENSET0_PROTREG20_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG20_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG20_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 19 : Protection enable for region 19. */ +#define MPU_PROTENSET0_PROTREG19_Pos (19UL) /*!< Position of PROTREG19 field. */ +#define MPU_PROTENSET0_PROTREG19_Msk (0x1UL << MPU_PROTENSET0_PROTREG19_Pos) /*!< Bit mask of PROTREG19 field. */ +#define MPU_PROTENSET0_PROTREG19_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG19_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG19_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 18 : Protection enable for region 18. */ +#define MPU_PROTENSET0_PROTREG18_Pos (18UL) /*!< Position of PROTREG18 field. */ +#define MPU_PROTENSET0_PROTREG18_Msk (0x1UL << MPU_PROTENSET0_PROTREG18_Pos) /*!< Bit mask of PROTREG18 field. */ +#define MPU_PROTENSET0_PROTREG18_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG18_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG18_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 17 : Protection enable for region 17. */ +#define MPU_PROTENSET0_PROTREG17_Pos (17UL) /*!< Position of PROTREG17 field. */ +#define MPU_PROTENSET0_PROTREG17_Msk (0x1UL << MPU_PROTENSET0_PROTREG17_Pos) /*!< Bit mask of PROTREG17 field. */ +#define MPU_PROTENSET0_PROTREG17_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG17_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG17_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 16 : Protection enable for region 16. */ +#define MPU_PROTENSET0_PROTREG16_Pos (16UL) /*!< Position of PROTREG16 field. */ +#define MPU_PROTENSET0_PROTREG16_Msk (0x1UL << MPU_PROTENSET0_PROTREG16_Pos) /*!< Bit mask of PROTREG16 field. */ +#define MPU_PROTENSET0_PROTREG16_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG16_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG16_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 15 : Protection enable for region 15. */ +#define MPU_PROTENSET0_PROTREG15_Pos (15UL) /*!< Position of PROTREG15 field. */ +#define MPU_PROTENSET0_PROTREG15_Msk (0x1UL << MPU_PROTENSET0_PROTREG15_Pos) /*!< Bit mask of PROTREG15 field. */ +#define MPU_PROTENSET0_PROTREG15_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG15_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG15_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 14 : Protection enable for region 14. */ +#define MPU_PROTENSET0_PROTREG14_Pos (14UL) /*!< Position of PROTREG14 field. */ +#define MPU_PROTENSET0_PROTREG14_Msk (0x1UL << MPU_PROTENSET0_PROTREG14_Pos) /*!< Bit mask of PROTREG14 field. */ +#define MPU_PROTENSET0_PROTREG14_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG14_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG14_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 13 : Protection enable for region 13. */ +#define MPU_PROTENSET0_PROTREG13_Pos (13UL) /*!< Position of PROTREG13 field. */ +#define MPU_PROTENSET0_PROTREG13_Msk (0x1UL << MPU_PROTENSET0_PROTREG13_Pos) /*!< Bit mask of PROTREG13 field. */ +#define MPU_PROTENSET0_PROTREG13_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG13_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG13_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 12 : Protection enable for region 12. */ +#define MPU_PROTENSET0_PROTREG12_Pos (12UL) /*!< Position of PROTREG12 field. */ +#define MPU_PROTENSET0_PROTREG12_Msk (0x1UL << MPU_PROTENSET0_PROTREG12_Pos) /*!< Bit mask of PROTREG12 field. */ +#define MPU_PROTENSET0_PROTREG12_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG12_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG12_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 11 : Protection enable for region 11. */ +#define MPU_PROTENSET0_PROTREG11_Pos (11UL) /*!< Position of PROTREG11 field. */ +#define MPU_PROTENSET0_PROTREG11_Msk (0x1UL << MPU_PROTENSET0_PROTREG11_Pos) /*!< Bit mask of PROTREG11 field. */ +#define MPU_PROTENSET0_PROTREG11_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG11_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG11_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 10 : Protection enable for region 10. */ +#define MPU_PROTENSET0_PROTREG10_Pos (10UL) /*!< Position of PROTREG10 field. */ +#define MPU_PROTENSET0_PROTREG10_Msk (0x1UL << MPU_PROTENSET0_PROTREG10_Pos) /*!< Bit mask of PROTREG10 field. */ +#define MPU_PROTENSET0_PROTREG10_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG10_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG10_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 9 : Protection enable for region 9. */ +#define MPU_PROTENSET0_PROTREG9_Pos (9UL) /*!< Position of PROTREG9 field. */ +#define MPU_PROTENSET0_PROTREG9_Msk (0x1UL << MPU_PROTENSET0_PROTREG9_Pos) /*!< Bit mask of PROTREG9 field. */ +#define MPU_PROTENSET0_PROTREG9_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG9_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG9_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 8 : Protection enable for region 8. */ +#define MPU_PROTENSET0_PROTREG8_Pos (8UL) /*!< Position of PROTREG8 field. */ +#define MPU_PROTENSET0_PROTREG8_Msk (0x1UL << MPU_PROTENSET0_PROTREG8_Pos) /*!< Bit mask of PROTREG8 field. */ +#define MPU_PROTENSET0_PROTREG8_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG8_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG8_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 7 : Protection enable for region 7. */ +#define MPU_PROTENSET0_PROTREG7_Pos (7UL) /*!< Position of PROTREG7 field. */ +#define MPU_PROTENSET0_PROTREG7_Msk (0x1UL << MPU_PROTENSET0_PROTREG7_Pos) /*!< Bit mask of PROTREG7 field. */ +#define MPU_PROTENSET0_PROTREG7_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG7_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG7_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 6 : Protection enable for region 6. */ +#define MPU_PROTENSET0_PROTREG6_Pos (6UL) /*!< Position of PROTREG6 field. */ +#define MPU_PROTENSET0_PROTREG6_Msk (0x1UL << MPU_PROTENSET0_PROTREG6_Pos) /*!< Bit mask of PROTREG6 field. */ +#define MPU_PROTENSET0_PROTREG6_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG6_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG6_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 5 : Protection enable for region 5. */ +#define MPU_PROTENSET0_PROTREG5_Pos (5UL) /*!< Position of PROTREG5 field. */ +#define MPU_PROTENSET0_PROTREG5_Msk (0x1UL << MPU_PROTENSET0_PROTREG5_Pos) /*!< Bit mask of PROTREG5 field. */ +#define MPU_PROTENSET0_PROTREG5_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG5_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG5_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 4 : Protection enable for region 4. */ +#define MPU_PROTENSET0_PROTREG4_Pos (4UL) /*!< Position of PROTREG4 field. */ +#define MPU_PROTENSET0_PROTREG4_Msk (0x1UL << MPU_PROTENSET0_PROTREG4_Pos) /*!< Bit mask of PROTREG4 field. */ +#define MPU_PROTENSET0_PROTREG4_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG4_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG4_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 3 : Protection enable for region 3. */ +#define MPU_PROTENSET0_PROTREG3_Pos (3UL) /*!< Position of PROTREG3 field. */ +#define MPU_PROTENSET0_PROTREG3_Msk (0x1UL << MPU_PROTENSET0_PROTREG3_Pos) /*!< Bit mask of PROTREG3 field. */ +#define MPU_PROTENSET0_PROTREG3_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG3_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG3_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 2 : Protection enable for region 2. */ +#define MPU_PROTENSET0_PROTREG2_Pos (2UL) /*!< Position of PROTREG2 field. */ +#define MPU_PROTENSET0_PROTREG2_Msk (0x1UL << MPU_PROTENSET0_PROTREG2_Pos) /*!< Bit mask of PROTREG2 field. */ +#define MPU_PROTENSET0_PROTREG2_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG2_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG2_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 1 : Protection enable for region 1. */ +#define MPU_PROTENSET0_PROTREG1_Pos (1UL) /*!< Position of PROTREG1 field. */ +#define MPU_PROTENSET0_PROTREG1_Msk (0x1UL << MPU_PROTENSET0_PROTREG1_Pos) /*!< Bit mask of PROTREG1 field. */ +#define MPU_PROTENSET0_PROTREG1_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG1_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG1_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 0 : Protection enable for region 0. */ +#define MPU_PROTENSET0_PROTREG0_Pos (0UL) /*!< Position of PROTREG0 field. */ +#define MPU_PROTENSET0_PROTREG0_Msk (0x1UL << MPU_PROTENSET0_PROTREG0_Pos) /*!< Bit mask of PROTREG0 field. */ +#define MPU_PROTENSET0_PROTREG0_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET0_PROTREG0_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET0_PROTREG0_Set (1UL) /*!< Enable protection on write. */ + +/* Register: MPU_PROTENSET1 */ +/* Description: Erase and write protection bit enable set register. */ + +/* Bit 31 : Protection enable for region 63. */ +#define MPU_PROTENSET1_PROTREG63_Pos (31UL) /*!< Position of PROTREG63 field. */ +#define MPU_PROTENSET1_PROTREG63_Msk (0x1UL << MPU_PROTENSET1_PROTREG63_Pos) /*!< Bit mask of PROTREG63 field. */ +#define MPU_PROTENSET1_PROTREG63_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG63_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG63_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 30 : Protection enable for region 62. */ +#define MPU_PROTENSET1_PROTREG62_Pos (30UL) /*!< Position of PROTREG62 field. */ +#define MPU_PROTENSET1_PROTREG62_Msk (0x1UL << MPU_PROTENSET1_PROTREG62_Pos) /*!< Bit mask of PROTREG62 field. */ +#define MPU_PROTENSET1_PROTREG62_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG62_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG62_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 29 : Protection enable for region 61. */ +#define MPU_PROTENSET1_PROTREG61_Pos (29UL) /*!< Position of PROTREG61 field. */ +#define MPU_PROTENSET1_PROTREG61_Msk (0x1UL << MPU_PROTENSET1_PROTREG61_Pos) /*!< Bit mask of PROTREG61 field. */ +#define MPU_PROTENSET1_PROTREG61_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG61_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG61_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 28 : Protection enable for region 60. */ +#define MPU_PROTENSET1_PROTREG60_Pos (28UL) /*!< Position of PROTREG60 field. */ +#define MPU_PROTENSET1_PROTREG60_Msk (0x1UL << MPU_PROTENSET1_PROTREG60_Pos) /*!< Bit mask of PROTREG60 field. */ +#define MPU_PROTENSET1_PROTREG60_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG60_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG60_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 27 : Protection enable for region 59. */ +#define MPU_PROTENSET1_PROTREG59_Pos (27UL) /*!< Position of PROTREG59 field. */ +#define MPU_PROTENSET1_PROTREG59_Msk (0x1UL << MPU_PROTENSET1_PROTREG59_Pos) /*!< Bit mask of PROTREG59 field. */ +#define MPU_PROTENSET1_PROTREG59_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG59_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG59_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 26 : Protection enable for region 58. */ +#define MPU_PROTENSET1_PROTREG58_Pos (26UL) /*!< Position of PROTREG58 field. */ +#define MPU_PROTENSET1_PROTREG58_Msk (0x1UL << MPU_PROTENSET1_PROTREG58_Pos) /*!< Bit mask of PROTREG58 field. */ +#define MPU_PROTENSET1_PROTREG58_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG58_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG58_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 25 : Protection enable for region 57. */ +#define MPU_PROTENSET1_PROTREG57_Pos (25UL) /*!< Position of PROTREG57 field. */ +#define MPU_PROTENSET1_PROTREG57_Msk (0x1UL << MPU_PROTENSET1_PROTREG57_Pos) /*!< Bit mask of PROTREG57 field. */ +#define MPU_PROTENSET1_PROTREG57_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG57_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG57_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 24 : Protection enable for region 56. */ +#define MPU_PROTENSET1_PROTREG56_Pos (24UL) /*!< Position of PROTREG56 field. */ +#define MPU_PROTENSET1_PROTREG56_Msk (0x1UL << MPU_PROTENSET1_PROTREG56_Pos) /*!< Bit mask of PROTREG56 field. */ +#define MPU_PROTENSET1_PROTREG56_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG56_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG56_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 23 : Protection enable for region 55. */ +#define MPU_PROTENSET1_PROTREG55_Pos (23UL) /*!< Position of PROTREG55 field. */ +#define MPU_PROTENSET1_PROTREG55_Msk (0x1UL << MPU_PROTENSET1_PROTREG55_Pos) /*!< Bit mask of PROTREG55 field. */ +#define MPU_PROTENSET1_PROTREG55_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG55_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG55_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 22 : Protection enable for region 54. */ +#define MPU_PROTENSET1_PROTREG54_Pos (22UL) /*!< Position of PROTREG54 field. */ +#define MPU_PROTENSET1_PROTREG54_Msk (0x1UL << MPU_PROTENSET1_PROTREG54_Pos) /*!< Bit mask of PROTREG54 field. */ +#define MPU_PROTENSET1_PROTREG54_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG54_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG54_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 21 : Protection enable for region 53. */ +#define MPU_PROTENSET1_PROTREG53_Pos (21UL) /*!< Position of PROTREG53 field. */ +#define MPU_PROTENSET1_PROTREG53_Msk (0x1UL << MPU_PROTENSET1_PROTREG53_Pos) /*!< Bit mask of PROTREG53 field. */ +#define MPU_PROTENSET1_PROTREG53_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG53_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG53_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 20 : Protection enable for region 52. */ +#define MPU_PROTENSET1_PROTREG52_Pos (20UL) /*!< Position of PROTREG52 field. */ +#define MPU_PROTENSET1_PROTREG52_Msk (0x1UL << MPU_PROTENSET1_PROTREG52_Pos) /*!< Bit mask of PROTREG52 field. */ +#define MPU_PROTENSET1_PROTREG52_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG52_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG52_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 19 : Protection enable for region 51. */ +#define MPU_PROTENSET1_PROTREG51_Pos (19UL) /*!< Position of PROTREG51 field. */ +#define MPU_PROTENSET1_PROTREG51_Msk (0x1UL << MPU_PROTENSET1_PROTREG51_Pos) /*!< Bit mask of PROTREG51 field. */ +#define MPU_PROTENSET1_PROTREG51_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG51_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG51_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 18 : Protection enable for region 50. */ +#define MPU_PROTENSET1_PROTREG50_Pos (18UL) /*!< Position of PROTREG50 field. */ +#define MPU_PROTENSET1_PROTREG50_Msk (0x1UL << MPU_PROTENSET1_PROTREG50_Pos) /*!< Bit mask of PROTREG50 field. */ +#define MPU_PROTENSET1_PROTREG50_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG50_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG50_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 17 : Protection enable for region 49. */ +#define MPU_PROTENSET1_PROTREG49_Pos (17UL) /*!< Position of PROTREG49 field. */ +#define MPU_PROTENSET1_PROTREG49_Msk (0x1UL << MPU_PROTENSET1_PROTREG49_Pos) /*!< Bit mask of PROTREG49 field. */ +#define MPU_PROTENSET1_PROTREG49_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG49_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG49_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 16 : Protection enable for region 48. */ +#define MPU_PROTENSET1_PROTREG48_Pos (16UL) /*!< Position of PROTREG48 field. */ +#define MPU_PROTENSET1_PROTREG48_Msk (0x1UL << MPU_PROTENSET1_PROTREG48_Pos) /*!< Bit mask of PROTREG48 field. */ +#define MPU_PROTENSET1_PROTREG48_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG48_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG48_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 15 : Protection enable for region 47. */ +#define MPU_PROTENSET1_PROTREG47_Pos (15UL) /*!< Position of PROTREG47 field. */ +#define MPU_PROTENSET1_PROTREG47_Msk (0x1UL << MPU_PROTENSET1_PROTREG47_Pos) /*!< Bit mask of PROTREG47 field. */ +#define MPU_PROTENSET1_PROTREG47_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG47_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG47_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 14 : Protection enable for region 46. */ +#define MPU_PROTENSET1_PROTREG46_Pos (14UL) /*!< Position of PROTREG46 field. */ +#define MPU_PROTENSET1_PROTREG46_Msk (0x1UL << MPU_PROTENSET1_PROTREG46_Pos) /*!< Bit mask of PROTREG46 field. */ +#define MPU_PROTENSET1_PROTREG46_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG46_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG46_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 13 : Protection enable for region 45. */ +#define MPU_PROTENSET1_PROTREG45_Pos (13UL) /*!< Position of PROTREG45 field. */ +#define MPU_PROTENSET1_PROTREG45_Msk (0x1UL << MPU_PROTENSET1_PROTREG45_Pos) /*!< Bit mask of PROTREG45 field. */ +#define MPU_PROTENSET1_PROTREG45_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG45_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG45_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 12 : Protection enable for region 44. */ +#define MPU_PROTENSET1_PROTREG44_Pos (12UL) /*!< Position of PROTREG44 field. */ +#define MPU_PROTENSET1_PROTREG44_Msk (0x1UL << MPU_PROTENSET1_PROTREG44_Pos) /*!< Bit mask of PROTREG44 field. */ +#define MPU_PROTENSET1_PROTREG44_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG44_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG44_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 11 : Protection enable for region 43. */ +#define MPU_PROTENSET1_PROTREG43_Pos (11UL) /*!< Position of PROTREG43 field. */ +#define MPU_PROTENSET1_PROTREG43_Msk (0x1UL << MPU_PROTENSET1_PROTREG43_Pos) /*!< Bit mask of PROTREG43 field. */ +#define MPU_PROTENSET1_PROTREG43_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG43_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG43_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 10 : Protection enable for region 42. */ +#define MPU_PROTENSET1_PROTREG42_Pos (10UL) /*!< Position of PROTREG42 field. */ +#define MPU_PROTENSET1_PROTREG42_Msk (0x1UL << MPU_PROTENSET1_PROTREG42_Pos) /*!< Bit mask of PROTREG42 field. */ +#define MPU_PROTENSET1_PROTREG42_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG42_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG42_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 9 : Protection enable for region 41. */ +#define MPU_PROTENSET1_PROTREG41_Pos (9UL) /*!< Position of PROTREG41 field. */ +#define MPU_PROTENSET1_PROTREG41_Msk (0x1UL << MPU_PROTENSET1_PROTREG41_Pos) /*!< Bit mask of PROTREG41 field. */ +#define MPU_PROTENSET1_PROTREG41_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG41_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG41_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 8 : Protection enable for region 40. */ +#define MPU_PROTENSET1_PROTREG40_Pos (8UL) /*!< Position of PROTREG40 field. */ +#define MPU_PROTENSET1_PROTREG40_Msk (0x1UL << MPU_PROTENSET1_PROTREG40_Pos) /*!< Bit mask of PROTREG40 field. */ +#define MPU_PROTENSET1_PROTREG40_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG40_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG40_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 7 : Protection enable for region 39. */ +#define MPU_PROTENSET1_PROTREG39_Pos (7UL) /*!< Position of PROTREG39 field. */ +#define MPU_PROTENSET1_PROTREG39_Msk (0x1UL << MPU_PROTENSET1_PROTREG39_Pos) /*!< Bit mask of PROTREG39 field. */ +#define MPU_PROTENSET1_PROTREG39_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG39_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG39_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 6 : Protection enable for region 38. */ +#define MPU_PROTENSET1_PROTREG38_Pos (6UL) /*!< Position of PROTREG38 field. */ +#define MPU_PROTENSET1_PROTREG38_Msk (0x1UL << MPU_PROTENSET1_PROTREG38_Pos) /*!< Bit mask of PROTREG38 field. */ +#define MPU_PROTENSET1_PROTREG38_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG38_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG38_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 5 : Protection enable for region 37. */ +#define MPU_PROTENSET1_PROTREG37_Pos (5UL) /*!< Position of PROTREG37 field. */ +#define MPU_PROTENSET1_PROTREG37_Msk (0x1UL << MPU_PROTENSET1_PROTREG37_Pos) /*!< Bit mask of PROTREG37 field. */ +#define MPU_PROTENSET1_PROTREG37_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG37_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG37_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 4 : Protection enable for region 36. */ +#define MPU_PROTENSET1_PROTREG36_Pos (4UL) /*!< Position of PROTREG36 field. */ +#define MPU_PROTENSET1_PROTREG36_Msk (0x1UL << MPU_PROTENSET1_PROTREG36_Pos) /*!< Bit mask of PROTREG36 field. */ +#define MPU_PROTENSET1_PROTREG36_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG36_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG36_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 3 : Protection enable for region 35. */ +#define MPU_PROTENSET1_PROTREG35_Pos (3UL) /*!< Position of PROTREG35 field. */ +#define MPU_PROTENSET1_PROTREG35_Msk (0x1UL << MPU_PROTENSET1_PROTREG35_Pos) /*!< Bit mask of PROTREG35 field. */ +#define MPU_PROTENSET1_PROTREG35_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG35_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG35_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 2 : Protection enable for region 34. */ +#define MPU_PROTENSET1_PROTREG34_Pos (2UL) /*!< Position of PROTREG34 field. */ +#define MPU_PROTENSET1_PROTREG34_Msk (0x1UL << MPU_PROTENSET1_PROTREG34_Pos) /*!< Bit mask of PROTREG34 field. */ +#define MPU_PROTENSET1_PROTREG34_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG34_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG34_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 1 : Protection enable for region 33. */ +#define MPU_PROTENSET1_PROTREG33_Pos (1UL) /*!< Position of PROTREG33 field. */ +#define MPU_PROTENSET1_PROTREG33_Msk (0x1UL << MPU_PROTENSET1_PROTREG33_Pos) /*!< Bit mask of PROTREG33 field. */ +#define MPU_PROTENSET1_PROTREG33_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG33_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG33_Set (1UL) /*!< Enable protection on write. */ + +/* Bit 0 : Protection enable for region 32. */ +#define MPU_PROTENSET1_PROTREG32_Pos (0UL) /*!< Position of PROTREG32 field. */ +#define MPU_PROTENSET1_PROTREG32_Msk (0x1UL << MPU_PROTENSET1_PROTREG32_Pos) /*!< Bit mask of PROTREG32 field. */ +#define MPU_PROTENSET1_PROTREG32_Disabled (0UL) /*!< Protection disabled. */ +#define MPU_PROTENSET1_PROTREG32_Enabled (1UL) /*!< Protection enabled. */ +#define MPU_PROTENSET1_PROTREG32_Set (1UL) /*!< Enable protection on write. */ + +/* Register: MPU_DISABLEINDEBUG */ +/* Description: Disable erase and write protection mechanism in debug mode. */ + +/* Bit 0 : Disable protection mechanism in debug mode. */ +#define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos (0UL) /*!< Position of DISABLEINDEBUG field. */ +#define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Msk (0x1UL << MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos) /*!< Bit mask of DISABLEINDEBUG field. */ +#define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Enabled (0UL) /*!< Protection enabled. */ +#define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Disabled (1UL) /*!< Protection disabled. */ + +/* Register: MPU_PROTBLOCKSIZE */ +/* Description: Erase and write protection block size. */ + +/* Bits 1..0 : Erase and write protection block size. */ +#define MPU_PROTBLOCKSIZE_PROTBLOCKSIZE_Pos (0UL) /*!< Position of PROTBLOCKSIZE field. */ +#define MPU_PROTBLOCKSIZE_PROTBLOCKSIZE_Msk (0x3UL << MPU_PROTBLOCKSIZE_PROTBLOCKSIZE_Pos) /*!< Bit mask of PROTBLOCKSIZE field. */ +#define MPU_PROTBLOCKSIZE_PROTBLOCKSIZE_4k (0UL) /*!< Erase and write protection block size is 4k. */ + + +/* Peripheral: NVMC */ +/* Description: Non Volatile Memory Controller. */ + +/* Register: NVMC_READY */ +/* Description: Ready flag. */ + +/* Bit 0 : NVMC ready. */ +#define NVMC_READY_READY_Pos (0UL) /*!< Position of READY field. */ +#define NVMC_READY_READY_Msk (0x1UL << NVMC_READY_READY_Pos) /*!< Bit mask of READY field. */ +#define NVMC_READY_READY_Busy (0UL) /*!< NVMC is busy (on-going write or erase operation). */ +#define NVMC_READY_READY_Ready (1UL) /*!< NVMC is ready. */ + +/* Register: NVMC_CONFIG */ +/* Description: Configuration register. */ + +/* Bits 1..0 : Program write enable. */ +#define NVMC_CONFIG_WEN_Pos (0UL) /*!< Position of WEN field. */ +#define NVMC_CONFIG_WEN_Msk (0x3UL << NVMC_CONFIG_WEN_Pos) /*!< Bit mask of WEN field. */ +#define NVMC_CONFIG_WEN_Ren (0x00UL) /*!< Read only access. */ +#define NVMC_CONFIG_WEN_Wen (0x01UL) /*!< Write enabled. */ +#define NVMC_CONFIG_WEN_Een (0x02UL) /*!< Erase enabled. */ + +/* Register: NVMC_ERASEALL */ +/* Description: Register for erasing all non-volatile user memory. */ + +/* Bit 0 : Starts the erasing of all user NVM (code region 0/1 and UICR registers). */ +#define NVMC_ERASEALL_ERASEALL_Pos (0UL) /*!< Position of ERASEALL field. */ +#define NVMC_ERASEALL_ERASEALL_Msk (0x1UL << NVMC_ERASEALL_ERASEALL_Pos) /*!< Bit mask of ERASEALL field. */ +#define NVMC_ERASEALL_ERASEALL_NoOperation (0UL) /*!< No operation. */ +#define NVMC_ERASEALL_ERASEALL_Erase (1UL) /*!< Start chip erase. */ + +/* Register: NVMC_ERASEUICR */ +/* Description: Register for start erasing User Information Congfiguration Registers. */ + +/* Bit 0 : It can only be used when all contents of code region 1 are erased. */ +#define NVMC_ERASEUICR_ERASEUICR_Pos (0UL) /*!< Position of ERASEUICR field. */ +#define NVMC_ERASEUICR_ERASEUICR_Msk (0x1UL << NVMC_ERASEUICR_ERASEUICR_Pos) /*!< Bit mask of ERASEUICR field. */ +#define NVMC_ERASEUICR_ERASEUICR_NoOperation (0UL) /*!< No operation. */ +#define NVMC_ERASEUICR_ERASEUICR_Erase (1UL) /*!< Start UICR erase. */ + + +/* Peripheral: POWER */ +/* Description: Power Control. */ + +/* Register: POWER_INTENSET */ +/* Description: Interrupt enable set register. */ + +/* Bit 2 : Enable interrupt on POFWARN event. */ +#define POWER_INTENSET_POFWARN_Pos (2UL) /*!< Position of POFWARN field. */ +#define POWER_INTENSET_POFWARN_Msk (0x1UL << POWER_INTENSET_POFWARN_Pos) /*!< Bit mask of POFWARN field. */ +#define POWER_INTENSET_POFWARN_Disabled (0UL) /*!< Interrupt disabled. */ +#define POWER_INTENSET_POFWARN_Enabled (1UL) /*!< Interrupt enabled. */ +#define POWER_INTENSET_POFWARN_Set (1UL) /*!< Enable interrupt on write. */ + +/* Register: POWER_INTENCLR */ +/* Description: Interrupt enable clear register. */ + +/* Bit 2 : Disable interrupt on POFWARN event. */ +#define POWER_INTENCLR_POFWARN_Pos (2UL) /*!< Position of POFWARN field. */ +#define POWER_INTENCLR_POFWARN_Msk (0x1UL << POWER_INTENCLR_POFWARN_Pos) /*!< Bit mask of POFWARN field. */ +#define POWER_INTENCLR_POFWARN_Disabled (0UL) /*!< Interrupt disabled. */ +#define POWER_INTENCLR_POFWARN_Enabled (1UL) /*!< Interrupt enabled. */ +#define POWER_INTENCLR_POFWARN_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Register: POWER_RESETREAS */ +/* Description: Reset reason. */ + +/* Bit 18 : Reset from wake-up from OFF mode detected by entering into debug interface mode. */ +#define POWER_RESETREAS_DIF_Pos (18UL) /*!< Position of DIF field. */ +#define POWER_RESETREAS_DIF_Msk (0x1UL << POWER_RESETREAS_DIF_Pos) /*!< Bit mask of DIF field. */ +#define POWER_RESETREAS_DIF_NotDetected (0UL) /*!< Reset not detected. */ +#define POWER_RESETREAS_DIF_Detected (1UL) /*!< Reset detected. */ + +/* Bit 17 : Reset from wake-up from OFF mode detected by the use of ANADETECT signal from LPCOMP. */ +#define POWER_RESETREAS_LPCOMP_Pos (17UL) /*!< Position of LPCOMP field. */ +#define POWER_RESETREAS_LPCOMP_Msk (0x1UL << POWER_RESETREAS_LPCOMP_Pos) /*!< Bit mask of LPCOMP field. */ +#define POWER_RESETREAS_LPCOMP_NotDetected (0UL) /*!< Reset not detected. */ +#define POWER_RESETREAS_LPCOMP_Detected (1UL) /*!< Reset detected. */ + +/* Bit 16 : Reset from wake-up from OFF mode detected by the use of DETECT signal from GPIO. */ +#define POWER_RESETREAS_OFF_Pos (16UL) /*!< Position of OFF field. */ +#define POWER_RESETREAS_OFF_Msk (0x1UL << POWER_RESETREAS_OFF_Pos) /*!< Bit mask of OFF field. */ +#define POWER_RESETREAS_OFF_NotDetected (0UL) /*!< Reset not detected. */ +#define POWER_RESETREAS_OFF_Detected (1UL) /*!< Reset detected. */ + +/* Bit 3 : Reset from CPU lock-up detected. */ +#define POWER_RESETREAS_LOCKUP_Pos (3UL) /*!< Position of LOCKUP field. */ +#define POWER_RESETREAS_LOCKUP_Msk (0x1UL << POWER_RESETREAS_LOCKUP_Pos) /*!< Bit mask of LOCKUP field. */ +#define POWER_RESETREAS_LOCKUP_NotDetected (0UL) /*!< Reset not detected. */ +#define POWER_RESETREAS_LOCKUP_Detected (1UL) /*!< Reset detected. */ + +/* Bit 2 : Reset from AIRCR.SYSRESETREQ detected. */ +#define POWER_RESETREAS_SREQ_Pos (2UL) /*!< Position of SREQ field. */ +#define POWER_RESETREAS_SREQ_Msk (0x1UL << POWER_RESETREAS_SREQ_Pos) /*!< Bit mask of SREQ field. */ +#define POWER_RESETREAS_SREQ_NotDetected (0UL) /*!< Reset not detected. */ +#define POWER_RESETREAS_SREQ_Detected (1UL) /*!< Reset detected. */ + +/* Bit 1 : Reset from watchdog detected. */ +#define POWER_RESETREAS_DOG_Pos (1UL) /*!< Position of DOG field. */ +#define POWER_RESETREAS_DOG_Msk (0x1UL << POWER_RESETREAS_DOG_Pos) /*!< Bit mask of DOG field. */ +#define POWER_RESETREAS_DOG_NotDetected (0UL) /*!< Reset not detected. */ +#define POWER_RESETREAS_DOG_Detected (1UL) /*!< Reset detected. */ + +/* Bit 0 : Reset from pin-reset detected. */ +#define POWER_RESETREAS_RESETPIN_Pos (0UL) /*!< Position of RESETPIN field. */ +#define POWER_RESETREAS_RESETPIN_Msk (0x1UL << POWER_RESETREAS_RESETPIN_Pos) /*!< Bit mask of RESETPIN field. */ +#define POWER_RESETREAS_RESETPIN_NotDetected (0UL) /*!< Reset not detected. */ +#define POWER_RESETREAS_RESETPIN_Detected (1UL) /*!< Reset detected. */ + +/* Register: POWER_RAMSTATUS */ +/* Description: Ram status register. */ + +/* Bit 3 : RAM block 3 status. */ +#define POWER_RAMSTATUS_RAMBLOCK3_Pos (3UL) /*!< Position of RAMBLOCK3 field. */ +#define POWER_RAMSTATUS_RAMBLOCK3_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK3_Pos) /*!< Bit mask of RAMBLOCK3 field. */ +#define POWER_RAMSTATUS_RAMBLOCK3_Off (0UL) /*!< RAM block 3 is off or powering up. */ +#define POWER_RAMSTATUS_RAMBLOCK3_On (1UL) /*!< RAM block 3 is on. */ + +/* Bit 2 : RAM block 2 status. */ +#define POWER_RAMSTATUS_RAMBLOCK2_Pos (2UL) /*!< Position of RAMBLOCK2 field. */ +#define POWER_RAMSTATUS_RAMBLOCK2_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK2_Pos) /*!< Bit mask of RAMBLOCK2 field. */ +#define POWER_RAMSTATUS_RAMBLOCK2_Off (0UL) /*!< RAM block 2 is off or powering up. */ +#define POWER_RAMSTATUS_RAMBLOCK2_On (1UL) /*!< RAM block 2 is on. */ + +/* Bit 1 : RAM block 1 status. */ +#define POWER_RAMSTATUS_RAMBLOCK1_Pos (1UL) /*!< Position of RAMBLOCK1 field. */ +#define POWER_RAMSTATUS_RAMBLOCK1_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK1_Pos) /*!< Bit mask of RAMBLOCK1 field. */ +#define POWER_RAMSTATUS_RAMBLOCK1_Off (0UL) /*!< RAM block 1 is off or powering up. */ +#define POWER_RAMSTATUS_RAMBLOCK1_On (1UL) /*!< RAM block 1 is on. */ + +/* Bit 0 : RAM block 0 status. */ +#define POWER_RAMSTATUS_RAMBLOCK0_Pos (0UL) /*!< Position of RAMBLOCK0 field. */ +#define POWER_RAMSTATUS_RAMBLOCK0_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK0_Pos) /*!< Bit mask of RAMBLOCK0 field. */ +#define POWER_RAMSTATUS_RAMBLOCK0_Off (0UL) /*!< RAM block 0 is off or powering up. */ +#define POWER_RAMSTATUS_RAMBLOCK0_On (1UL) /*!< RAM block 0 is on. */ + +/* Register: POWER_SYSTEMOFF */ +/* Description: System off register. */ + +/* Bit 0 : Enter system off mode. */ +#define POWER_SYSTEMOFF_SYSTEMOFF_Pos (0UL) /*!< Position of SYSTEMOFF field. */ +#define POWER_SYSTEMOFF_SYSTEMOFF_Msk (0x1UL << POWER_SYSTEMOFF_SYSTEMOFF_Pos) /*!< Bit mask of SYSTEMOFF field. */ +#define POWER_SYSTEMOFF_SYSTEMOFF_Enter (1UL) /*!< Enter system off mode. */ + +/* Register: POWER_POFCON */ +/* Description: Power failure configuration. */ + +/* Bits 2..1 : Set threshold level. */ +#define POWER_POFCON_THRESHOLD_Pos (1UL) /*!< Position of THRESHOLD field. */ +#define POWER_POFCON_THRESHOLD_Msk (0x3UL << POWER_POFCON_THRESHOLD_Pos) /*!< Bit mask of THRESHOLD field. */ +#define POWER_POFCON_THRESHOLD_V21 (0x00UL) /*!< Set threshold to 2.1Volts. */ +#define POWER_POFCON_THRESHOLD_V23 (0x01UL) /*!< Set threshold to 2.3Volts. */ +#define POWER_POFCON_THRESHOLD_V25 (0x02UL) /*!< Set threshold to 2.5Volts. */ +#define POWER_POFCON_THRESHOLD_V27 (0x03UL) /*!< Set threshold to 2.7Volts. */ + +/* Bit 0 : Power failure comparator enable. */ +#define POWER_POFCON_POF_Pos (0UL) /*!< Position of POF field. */ +#define POWER_POFCON_POF_Msk (0x1UL << POWER_POFCON_POF_Pos) /*!< Bit mask of POF field. */ +#define POWER_POFCON_POF_Disabled (0UL) /*!< Disabled. */ +#define POWER_POFCON_POF_Enabled (1UL) /*!< Enabled. */ + +/* Register: POWER_GPREGRET */ +/* Description: General purpose retention register. This register is a retained register. */ + +/* Bits 7..0 : General purpose retention register. */ +#define POWER_GPREGRET_GPREGRET_Pos (0UL) /*!< Position of GPREGRET field. */ +#define POWER_GPREGRET_GPREGRET_Msk (0xFFUL << POWER_GPREGRET_GPREGRET_Pos) /*!< Bit mask of GPREGRET field. */ + +/* Register: POWER_RAMON */ +/* Description: Ram on/off. */ + +/* Bit 17 : RAM block 1 behaviour in OFF mode. */ +#define POWER_RAMON_OFFRAM1_Pos (17UL) /*!< Position of OFFRAM1 field. */ +#define POWER_RAMON_OFFRAM1_Msk (0x1UL << POWER_RAMON_OFFRAM1_Pos) /*!< Bit mask of OFFRAM1 field. */ +#define POWER_RAMON_OFFRAM1_RAM1Off (0UL) /*!< RAM block 1 OFF in OFF mode. */ +#define POWER_RAMON_OFFRAM1_RAM1On (1UL) /*!< RAM block 1 ON in OFF mode. */ + +/* Bit 16 : RAM block 0 behaviour in OFF mode. */ +#define POWER_RAMON_OFFRAM0_Pos (16UL) /*!< Position of OFFRAM0 field. */ +#define POWER_RAMON_OFFRAM0_Msk (0x1UL << POWER_RAMON_OFFRAM0_Pos) /*!< Bit mask of OFFRAM0 field. */ +#define POWER_RAMON_OFFRAM0_RAM0Off (0UL) /*!< RAM block 0 OFF in OFF mode. */ +#define POWER_RAMON_OFFRAM0_RAM0On (1UL) /*!< RAM block 0 ON in OFF mode. */ + +/* Bit 1 : RAM block 1 behaviour in ON mode. */ +#define POWER_RAMON_ONRAM1_Pos (1UL) /*!< Position of ONRAM1 field. */ +#define POWER_RAMON_ONRAM1_Msk (0x1UL << POWER_RAMON_ONRAM1_Pos) /*!< Bit mask of ONRAM1 field. */ +#define POWER_RAMON_ONRAM1_RAM1Off (0UL) /*!< RAM block 1 OFF in ON mode. */ +#define POWER_RAMON_ONRAM1_RAM1On (1UL) /*!< RAM block 1 ON in ON mode. */ + +/* Bit 0 : RAM block 0 behaviour in ON mode. */ +#define POWER_RAMON_ONRAM0_Pos (0UL) /*!< Position of ONRAM0 field. */ +#define POWER_RAMON_ONRAM0_Msk (0x1UL << POWER_RAMON_ONRAM0_Pos) /*!< Bit mask of ONRAM0 field. */ +#define POWER_RAMON_ONRAM0_RAM0Off (0UL) /*!< RAM block 0 OFF in ON mode. */ +#define POWER_RAMON_ONRAM0_RAM0On (1UL) /*!< RAM block 0 ON in ON mode. */ + +/* Register: POWER_RESET */ +/* Description: Pin reset functionality configuration register. This register is a retained register. */ + +/* Bit 0 : Enable or disable pin reset in debug interface mode. */ +#define POWER_RESET_RESET_Pos (0UL) /*!< Position of RESET field. */ +#define POWER_RESET_RESET_Msk (0x1UL << POWER_RESET_RESET_Pos) /*!< Bit mask of RESET field. */ +#define POWER_RESET_RESET_Disabled (0UL) /*!< Pin reset in debug interface mode disabled. */ +#define POWER_RESET_RESET_Enabled (1UL) /*!< Pin reset in debug interface mode enabled. */ + +/* Register: POWER_RAMONB */ +/* Description: Ram on/off. */ + +/* Bit 17 : RAM block 3 behaviour in OFF mode. */ +#define POWER_RAMONB_OFFRAM3_Pos (17UL) /*!< Position of OFFRAM3 field. */ +#define POWER_RAMONB_OFFRAM3_Msk (0x1UL << POWER_RAMONB_OFFRAM3_Pos) /*!< Bit mask of OFFRAM3 field. */ +#define POWER_RAMONB_OFFRAM3_RAM3Off (0UL) /*!< RAM block 3 OFF in OFF mode. */ +#define POWER_RAMONB_OFFRAM3_RAM3On (1UL) /*!< RAM block 3 ON in OFF mode. */ + +/* Bit 16 : RAM block 2 behaviour in OFF mode. */ +#define POWER_RAMONB_OFFRAM2_Pos (16UL) /*!< Position of OFFRAM2 field. */ +#define POWER_RAMONB_OFFRAM2_Msk (0x1UL << POWER_RAMONB_OFFRAM2_Pos) /*!< Bit mask of OFFRAM2 field. */ +#define POWER_RAMONB_OFFRAM2_RAM2Off (0UL) /*!< RAM block 2 OFF in OFF mode. */ +#define POWER_RAMONB_OFFRAM2_RAM2On (1UL) /*!< RAM block 2 ON in OFF mode. */ + +/* Bit 1 : RAM block 3 behaviour in ON mode. */ +#define POWER_RAMONB_ONRAM3_Pos (1UL) /*!< Position of ONRAM3 field. */ +#define POWER_RAMONB_ONRAM3_Msk (0x1UL << POWER_RAMONB_ONRAM3_Pos) /*!< Bit mask of ONRAM3 field. */ +#define POWER_RAMONB_ONRAM3_RAM3Off (0UL) /*!< RAM block 33 OFF in ON mode. */ +#define POWER_RAMONB_ONRAM3_RAM3On (1UL) /*!< RAM block 3 ON in ON mode. */ + +/* Bit 0 : RAM block 2 behaviour in ON mode. */ +#define POWER_RAMONB_ONRAM2_Pos (0UL) /*!< Position of ONRAM2 field. */ +#define POWER_RAMONB_ONRAM2_Msk (0x1UL << POWER_RAMONB_ONRAM2_Pos) /*!< Bit mask of ONRAM2 field. */ +#define POWER_RAMONB_ONRAM2_RAM2Off (0UL) /*!< RAM block 2 OFF in ON mode. */ +#define POWER_RAMONB_ONRAM2_RAM2On (1UL) /*!< RAM block 2 ON in ON mode. */ + +/* Register: POWER_DCDCEN */ +/* Description: DCDC converter enable configuration register. */ + +/* Bit 0 : Enable DCDC converter. */ +#define POWER_DCDCEN_DCDCEN_Pos (0UL) /*!< Position of DCDCEN field. */ +#define POWER_DCDCEN_DCDCEN_Msk (0x1UL << POWER_DCDCEN_DCDCEN_Pos) /*!< Bit mask of DCDCEN field. */ +#define POWER_DCDCEN_DCDCEN_Disabled (0UL) /*!< DCDC converter disabled. */ +#define POWER_DCDCEN_DCDCEN_Enabled (1UL) /*!< DCDC converter enabled. */ + +/* Register: POWER_DCDCFORCE */ +/* Description: DCDC power-up force register. */ + +/* Bit 1 : DCDC power-up force on. */ +#define POWER_DCDCFORCE_FORCEON_Pos (1UL) /*!< Position of FORCEON field. */ +#define POWER_DCDCFORCE_FORCEON_Msk (0x1UL << POWER_DCDCFORCE_FORCEON_Pos) /*!< Bit mask of FORCEON field. */ +#define POWER_DCDCFORCE_FORCEON_NoForce (0UL) /*!< No force. */ +#define POWER_DCDCFORCE_FORCEON_Force (1UL) /*!< Force. */ + +/* Bit 0 : DCDC power-up force off. */ +#define POWER_DCDCFORCE_FORCEOFF_Pos (0UL) /*!< Position of FORCEOFF field. */ +#define POWER_DCDCFORCE_FORCEOFF_Msk (0x1UL << POWER_DCDCFORCE_FORCEOFF_Pos) /*!< Bit mask of FORCEOFF field. */ +#define POWER_DCDCFORCE_FORCEOFF_NoForce (0UL) /*!< No force. */ +#define POWER_DCDCFORCE_FORCEOFF_Force (1UL) /*!< Force. */ + + +/* Peripheral: PPI */ +/* Description: PPI controller. */ + +/* Register: PPI_CHEN */ +/* Description: Channel enable. */ + +/* Bit 31 : Enable PPI channel 31. */ +#define PPI_CHEN_CH31_Pos (31UL) /*!< Position of CH31 field. */ +#define PPI_CHEN_CH31_Msk (0x1UL << PPI_CHEN_CH31_Pos) /*!< Bit mask of CH31 field. */ +#define PPI_CHEN_CH31_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH31_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 30 : Enable PPI channel 30. */ +#define PPI_CHEN_CH30_Pos (30UL) /*!< Position of CH30 field. */ +#define PPI_CHEN_CH30_Msk (0x1UL << PPI_CHEN_CH30_Pos) /*!< Bit mask of CH30 field. */ +#define PPI_CHEN_CH30_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH30_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 29 : Enable PPI channel 29. */ +#define PPI_CHEN_CH29_Pos (29UL) /*!< Position of CH29 field. */ +#define PPI_CHEN_CH29_Msk (0x1UL << PPI_CHEN_CH29_Pos) /*!< Bit mask of CH29 field. */ +#define PPI_CHEN_CH29_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH29_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 28 : Enable PPI channel 28. */ +#define PPI_CHEN_CH28_Pos (28UL) /*!< Position of CH28 field. */ +#define PPI_CHEN_CH28_Msk (0x1UL << PPI_CHEN_CH28_Pos) /*!< Bit mask of CH28 field. */ +#define PPI_CHEN_CH28_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH28_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 27 : Enable PPI channel 27. */ +#define PPI_CHEN_CH27_Pos (27UL) /*!< Position of CH27 field. */ +#define PPI_CHEN_CH27_Msk (0x1UL << PPI_CHEN_CH27_Pos) /*!< Bit mask of CH27 field. */ +#define PPI_CHEN_CH27_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH27_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 26 : Enable PPI channel 26. */ +#define PPI_CHEN_CH26_Pos (26UL) /*!< Position of CH26 field. */ +#define PPI_CHEN_CH26_Msk (0x1UL << PPI_CHEN_CH26_Pos) /*!< Bit mask of CH26 field. */ +#define PPI_CHEN_CH26_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH26_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 25 : Enable PPI channel 25. */ +#define PPI_CHEN_CH25_Pos (25UL) /*!< Position of CH25 field. */ +#define PPI_CHEN_CH25_Msk (0x1UL << PPI_CHEN_CH25_Pos) /*!< Bit mask of CH25 field. */ +#define PPI_CHEN_CH25_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH25_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 24 : Enable PPI channel 24. */ +#define PPI_CHEN_CH24_Pos (24UL) /*!< Position of CH24 field. */ +#define PPI_CHEN_CH24_Msk (0x1UL << PPI_CHEN_CH24_Pos) /*!< Bit mask of CH24 field. */ +#define PPI_CHEN_CH24_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH24_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 23 : Enable PPI channel 23. */ +#define PPI_CHEN_CH23_Pos (23UL) /*!< Position of CH23 field. */ +#define PPI_CHEN_CH23_Msk (0x1UL << PPI_CHEN_CH23_Pos) /*!< Bit mask of CH23 field. */ +#define PPI_CHEN_CH23_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH23_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 22 : Enable PPI channel 22. */ +#define PPI_CHEN_CH22_Pos (22UL) /*!< Position of CH22 field. */ +#define PPI_CHEN_CH22_Msk (0x1UL << PPI_CHEN_CH22_Pos) /*!< Bit mask of CH22 field. */ +#define PPI_CHEN_CH22_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH22_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 21 : Enable PPI channel 21. */ +#define PPI_CHEN_CH21_Pos (21UL) /*!< Position of CH21 field. */ +#define PPI_CHEN_CH21_Msk (0x1UL << PPI_CHEN_CH21_Pos) /*!< Bit mask of CH21 field. */ +#define PPI_CHEN_CH21_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH21_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 20 : Enable PPI channel 20. */ +#define PPI_CHEN_CH20_Pos (20UL) /*!< Position of CH20 field. */ +#define PPI_CHEN_CH20_Msk (0x1UL << PPI_CHEN_CH20_Pos) /*!< Bit mask of CH20 field. */ +#define PPI_CHEN_CH20_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH20_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 15 : Enable PPI channel 15. */ +#define PPI_CHEN_CH15_Pos (15UL) /*!< Position of CH15 field. */ +#define PPI_CHEN_CH15_Msk (0x1UL << PPI_CHEN_CH15_Pos) /*!< Bit mask of CH15 field. */ +#define PPI_CHEN_CH15_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH15_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 14 : Enable PPI channel 14. */ +#define PPI_CHEN_CH14_Pos (14UL) /*!< Position of CH14 field. */ +#define PPI_CHEN_CH14_Msk (0x1UL << PPI_CHEN_CH14_Pos) /*!< Bit mask of CH14 field. */ +#define PPI_CHEN_CH14_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH14_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 13 : Enable PPI channel 13. */ +#define PPI_CHEN_CH13_Pos (13UL) /*!< Position of CH13 field. */ +#define PPI_CHEN_CH13_Msk (0x1UL << PPI_CHEN_CH13_Pos) /*!< Bit mask of CH13 field. */ +#define PPI_CHEN_CH13_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH13_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 12 : Enable PPI channel 12. */ +#define PPI_CHEN_CH12_Pos (12UL) /*!< Position of CH12 field. */ +#define PPI_CHEN_CH12_Msk (0x1UL << PPI_CHEN_CH12_Pos) /*!< Bit mask of CH12 field. */ +#define PPI_CHEN_CH12_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH12_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 11 : Enable PPI channel 11. */ +#define PPI_CHEN_CH11_Pos (11UL) /*!< Position of CH11 field. */ +#define PPI_CHEN_CH11_Msk (0x1UL << PPI_CHEN_CH11_Pos) /*!< Bit mask of CH11 field. */ +#define PPI_CHEN_CH11_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH11_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 10 : Enable PPI channel 10. */ +#define PPI_CHEN_CH10_Pos (10UL) /*!< Position of CH10 field. */ +#define PPI_CHEN_CH10_Msk (0x1UL << PPI_CHEN_CH10_Pos) /*!< Bit mask of CH10 field. */ +#define PPI_CHEN_CH10_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH10_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 9 : Enable PPI channel 9. */ +#define PPI_CHEN_CH9_Pos (9UL) /*!< Position of CH9 field. */ +#define PPI_CHEN_CH9_Msk (0x1UL << PPI_CHEN_CH9_Pos) /*!< Bit mask of CH9 field. */ +#define PPI_CHEN_CH9_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH9_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 8 : Enable PPI channel 8. */ +#define PPI_CHEN_CH8_Pos (8UL) /*!< Position of CH8 field. */ +#define PPI_CHEN_CH8_Msk (0x1UL << PPI_CHEN_CH8_Pos) /*!< Bit mask of CH8 field. */ +#define PPI_CHEN_CH8_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH8_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 7 : Enable PPI channel 7. */ +#define PPI_CHEN_CH7_Pos (7UL) /*!< Position of CH7 field. */ +#define PPI_CHEN_CH7_Msk (0x1UL << PPI_CHEN_CH7_Pos) /*!< Bit mask of CH7 field. */ +#define PPI_CHEN_CH7_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH7_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 6 : Enable PPI channel 6. */ +#define PPI_CHEN_CH6_Pos (6UL) /*!< Position of CH6 field. */ +#define PPI_CHEN_CH6_Msk (0x1UL << PPI_CHEN_CH6_Pos) /*!< Bit mask of CH6 field. */ +#define PPI_CHEN_CH6_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH6_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 5 : Enable PPI channel 5. */ +#define PPI_CHEN_CH5_Pos (5UL) /*!< Position of CH5 field. */ +#define PPI_CHEN_CH5_Msk (0x1UL << PPI_CHEN_CH5_Pos) /*!< Bit mask of CH5 field. */ +#define PPI_CHEN_CH5_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH5_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 4 : Enable PPI channel 4. */ +#define PPI_CHEN_CH4_Pos (4UL) /*!< Position of CH4 field. */ +#define PPI_CHEN_CH4_Msk (0x1UL << PPI_CHEN_CH4_Pos) /*!< Bit mask of CH4 field. */ +#define PPI_CHEN_CH4_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH4_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 3 : Enable PPI channel 3. */ +#define PPI_CHEN_CH3_Pos (3UL) /*!< Position of CH3 field. */ +#define PPI_CHEN_CH3_Msk (0x1UL << PPI_CHEN_CH3_Pos) /*!< Bit mask of CH3 field. */ +#define PPI_CHEN_CH3_Disabled (0UL) /*!< Channel disabled */ +#define PPI_CHEN_CH3_Enabled (1UL) /*!< Channel enabled */ + +/* Bit 2 : Enable PPI channel 2. */ +#define PPI_CHEN_CH2_Pos (2UL) /*!< Position of CH2 field. */ +#define PPI_CHEN_CH2_Msk (0x1UL << PPI_CHEN_CH2_Pos) /*!< Bit mask of CH2 field. */ +#define PPI_CHEN_CH2_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH2_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 1 : Enable PPI channel 1. */ +#define PPI_CHEN_CH1_Pos (1UL) /*!< Position of CH1 field. */ +#define PPI_CHEN_CH1_Msk (0x1UL << PPI_CHEN_CH1_Pos) /*!< Bit mask of CH1 field. */ +#define PPI_CHEN_CH1_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH1_Enabled (1UL) /*!< Channel enabled. */ + +/* Bit 0 : Enable PPI channel 0. */ +#define PPI_CHEN_CH0_Pos (0UL) /*!< Position of CH0 field. */ +#define PPI_CHEN_CH0_Msk (0x1UL << PPI_CHEN_CH0_Pos) /*!< Bit mask of CH0 field. */ +#define PPI_CHEN_CH0_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHEN_CH0_Enabled (1UL) /*!< Channel enabled. */ + +/* Register: PPI_CHENSET */ +/* Description: Channel enable set. */ + +/* Bit 31 : Enable PPI channel 31. */ +#define PPI_CHENSET_CH31_Pos (31UL) /*!< Position of CH31 field. */ +#define PPI_CHENSET_CH31_Msk (0x1UL << PPI_CHENSET_CH31_Pos) /*!< Bit mask of CH31 field. */ +#define PPI_CHENSET_CH31_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH31_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH31_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 30 : Enable PPI channel 30. */ +#define PPI_CHENSET_CH30_Pos (30UL) /*!< Position of CH30 field. */ +#define PPI_CHENSET_CH30_Msk (0x1UL << PPI_CHENSET_CH30_Pos) /*!< Bit mask of CH30 field. */ +#define PPI_CHENSET_CH30_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH30_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH30_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 29 : Enable PPI channel 29. */ +#define PPI_CHENSET_CH29_Pos (29UL) /*!< Position of CH29 field. */ +#define PPI_CHENSET_CH29_Msk (0x1UL << PPI_CHENSET_CH29_Pos) /*!< Bit mask of CH29 field. */ +#define PPI_CHENSET_CH29_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH29_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH29_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 28 : Enable PPI channel 28. */ +#define PPI_CHENSET_CH28_Pos (28UL) /*!< Position of CH28 field. */ +#define PPI_CHENSET_CH28_Msk (0x1UL << PPI_CHENSET_CH28_Pos) /*!< Bit mask of CH28 field. */ +#define PPI_CHENSET_CH28_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH28_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH28_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 27 : Enable PPI channel 27. */ +#define PPI_CHENSET_CH27_Pos (27UL) /*!< Position of CH27 field. */ +#define PPI_CHENSET_CH27_Msk (0x1UL << PPI_CHENSET_CH27_Pos) /*!< Bit mask of CH27 field. */ +#define PPI_CHENSET_CH27_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH27_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH27_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 26 : Enable PPI channel 26. */ +#define PPI_CHENSET_CH26_Pos (26UL) /*!< Position of CH26 field. */ +#define PPI_CHENSET_CH26_Msk (0x1UL << PPI_CHENSET_CH26_Pos) /*!< Bit mask of CH26 field. */ +#define PPI_CHENSET_CH26_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH26_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH26_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 25 : Enable PPI channel 25. */ +#define PPI_CHENSET_CH25_Pos (25UL) /*!< Position of CH25 field. */ +#define PPI_CHENSET_CH25_Msk (0x1UL << PPI_CHENSET_CH25_Pos) /*!< Bit mask of CH25 field. */ +#define PPI_CHENSET_CH25_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH25_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH25_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 24 : Enable PPI channel 24. */ +#define PPI_CHENSET_CH24_Pos (24UL) /*!< Position of CH24 field. */ +#define PPI_CHENSET_CH24_Msk (0x1UL << PPI_CHENSET_CH24_Pos) /*!< Bit mask of CH24 field. */ +#define PPI_CHENSET_CH24_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH24_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH24_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 23 : Enable PPI channel 23. */ +#define PPI_CHENSET_CH23_Pos (23UL) /*!< Position of CH23 field. */ +#define PPI_CHENSET_CH23_Msk (0x1UL << PPI_CHENSET_CH23_Pos) /*!< Bit mask of CH23 field. */ +#define PPI_CHENSET_CH23_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH23_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH23_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 22 : Enable PPI channel 22. */ +#define PPI_CHENSET_CH22_Pos (22UL) /*!< Position of CH22 field. */ +#define PPI_CHENSET_CH22_Msk (0x1UL << PPI_CHENSET_CH22_Pos) /*!< Bit mask of CH22 field. */ +#define PPI_CHENSET_CH22_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH22_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH22_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 21 : Enable PPI channel 21. */ +#define PPI_CHENSET_CH21_Pos (21UL) /*!< Position of CH21 field. */ +#define PPI_CHENSET_CH21_Msk (0x1UL << PPI_CHENSET_CH21_Pos) /*!< Bit mask of CH21 field. */ +#define PPI_CHENSET_CH21_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH21_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH21_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 20 : Enable PPI channel 20. */ +#define PPI_CHENSET_CH20_Pos (20UL) /*!< Position of CH20 field. */ +#define PPI_CHENSET_CH20_Msk (0x1UL << PPI_CHENSET_CH20_Pos) /*!< Bit mask of CH20 field. */ +#define PPI_CHENSET_CH20_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH20_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH20_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 15 : Enable PPI channel 15. */ +#define PPI_CHENSET_CH15_Pos (15UL) /*!< Position of CH15 field. */ +#define PPI_CHENSET_CH15_Msk (0x1UL << PPI_CHENSET_CH15_Pos) /*!< Bit mask of CH15 field. */ +#define PPI_CHENSET_CH15_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH15_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH15_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 14 : Enable PPI channel 14. */ +#define PPI_CHENSET_CH14_Pos (14UL) /*!< Position of CH14 field. */ +#define PPI_CHENSET_CH14_Msk (0x1UL << PPI_CHENSET_CH14_Pos) /*!< Bit mask of CH14 field. */ +#define PPI_CHENSET_CH14_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH14_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH14_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 13 : Enable PPI channel 13. */ +#define PPI_CHENSET_CH13_Pos (13UL) /*!< Position of CH13 field. */ +#define PPI_CHENSET_CH13_Msk (0x1UL << PPI_CHENSET_CH13_Pos) /*!< Bit mask of CH13 field. */ +#define PPI_CHENSET_CH13_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH13_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH13_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 12 : Enable PPI channel 12. */ +#define PPI_CHENSET_CH12_Pos (12UL) /*!< Position of CH12 field. */ +#define PPI_CHENSET_CH12_Msk (0x1UL << PPI_CHENSET_CH12_Pos) /*!< Bit mask of CH12 field. */ +#define PPI_CHENSET_CH12_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH12_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH12_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 11 : Enable PPI channel 11. */ +#define PPI_CHENSET_CH11_Pos (11UL) /*!< Position of CH11 field. */ +#define PPI_CHENSET_CH11_Msk (0x1UL << PPI_CHENSET_CH11_Pos) /*!< Bit mask of CH11 field. */ +#define PPI_CHENSET_CH11_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH11_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH11_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 10 : Enable PPI channel 10. */ +#define PPI_CHENSET_CH10_Pos (10UL) /*!< Position of CH10 field. */ +#define PPI_CHENSET_CH10_Msk (0x1UL << PPI_CHENSET_CH10_Pos) /*!< Bit mask of CH10 field. */ +#define PPI_CHENSET_CH10_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH10_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH10_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 9 : Enable PPI channel 9. */ +#define PPI_CHENSET_CH9_Pos (9UL) /*!< Position of CH9 field. */ +#define PPI_CHENSET_CH9_Msk (0x1UL << PPI_CHENSET_CH9_Pos) /*!< Bit mask of CH9 field. */ +#define PPI_CHENSET_CH9_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH9_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH9_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 8 : Enable PPI channel 8. */ +#define PPI_CHENSET_CH8_Pos (8UL) /*!< Position of CH8 field. */ +#define PPI_CHENSET_CH8_Msk (0x1UL << PPI_CHENSET_CH8_Pos) /*!< Bit mask of CH8 field. */ +#define PPI_CHENSET_CH8_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH8_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH8_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 7 : Enable PPI channel 7. */ +#define PPI_CHENSET_CH7_Pos (7UL) /*!< Position of CH7 field. */ +#define PPI_CHENSET_CH7_Msk (0x1UL << PPI_CHENSET_CH7_Pos) /*!< Bit mask of CH7 field. */ +#define PPI_CHENSET_CH7_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH7_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH7_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 6 : Enable PPI channel 6. */ +#define PPI_CHENSET_CH6_Pos (6UL) /*!< Position of CH6 field. */ +#define PPI_CHENSET_CH6_Msk (0x1UL << PPI_CHENSET_CH6_Pos) /*!< Bit mask of CH6 field. */ +#define PPI_CHENSET_CH6_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH6_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH6_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 5 : Enable PPI channel 5. */ +#define PPI_CHENSET_CH5_Pos (5UL) /*!< Position of CH5 field. */ +#define PPI_CHENSET_CH5_Msk (0x1UL << PPI_CHENSET_CH5_Pos) /*!< Bit mask of CH5 field. */ +#define PPI_CHENSET_CH5_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH5_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH5_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 4 : Enable PPI channel 4. */ +#define PPI_CHENSET_CH4_Pos (4UL) /*!< Position of CH4 field. */ +#define PPI_CHENSET_CH4_Msk (0x1UL << PPI_CHENSET_CH4_Pos) /*!< Bit mask of CH4 field. */ +#define PPI_CHENSET_CH4_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH4_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH4_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 3 : Enable PPI channel 3. */ +#define PPI_CHENSET_CH3_Pos (3UL) /*!< Position of CH3 field. */ +#define PPI_CHENSET_CH3_Msk (0x1UL << PPI_CHENSET_CH3_Pos) /*!< Bit mask of CH3 field. */ +#define PPI_CHENSET_CH3_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH3_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH3_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 2 : Enable PPI channel 2. */ +#define PPI_CHENSET_CH2_Pos (2UL) /*!< Position of CH2 field. */ +#define PPI_CHENSET_CH2_Msk (0x1UL << PPI_CHENSET_CH2_Pos) /*!< Bit mask of CH2 field. */ +#define PPI_CHENSET_CH2_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH2_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH2_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 1 : Enable PPI channel 1. */ +#define PPI_CHENSET_CH1_Pos (1UL) /*!< Position of CH1 field. */ +#define PPI_CHENSET_CH1_Msk (0x1UL << PPI_CHENSET_CH1_Pos) /*!< Bit mask of CH1 field. */ +#define PPI_CHENSET_CH1_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH1_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH1_Set (1UL) /*!< Enable channel on write. */ + +/* Bit 0 : Enable PPI channel 0. */ +#define PPI_CHENSET_CH0_Pos (0UL) /*!< Position of CH0 field. */ +#define PPI_CHENSET_CH0_Msk (0x1UL << PPI_CHENSET_CH0_Pos) /*!< Bit mask of CH0 field. */ +#define PPI_CHENSET_CH0_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENSET_CH0_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENSET_CH0_Set (1UL) /*!< Enable channel on write. */ + +/* Register: PPI_CHENCLR */ +/* Description: Channel enable clear. */ + +/* Bit 31 : Disable PPI channel 31. */ +#define PPI_CHENCLR_CH31_Pos (31UL) /*!< Position of CH31 field. */ +#define PPI_CHENCLR_CH31_Msk (0x1UL << PPI_CHENCLR_CH31_Pos) /*!< Bit mask of CH31 field. */ +#define PPI_CHENCLR_CH31_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH31_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH31_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 30 : Disable PPI channel 30. */ +#define PPI_CHENCLR_CH30_Pos (30UL) /*!< Position of CH30 field. */ +#define PPI_CHENCLR_CH30_Msk (0x1UL << PPI_CHENCLR_CH30_Pos) /*!< Bit mask of CH30 field. */ +#define PPI_CHENCLR_CH30_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH30_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH30_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 29 : Disable PPI channel 29. */ +#define PPI_CHENCLR_CH29_Pos (29UL) /*!< Position of CH29 field. */ +#define PPI_CHENCLR_CH29_Msk (0x1UL << PPI_CHENCLR_CH29_Pos) /*!< Bit mask of CH29 field. */ +#define PPI_CHENCLR_CH29_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH29_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH29_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 28 : Disable PPI channel 28. */ +#define PPI_CHENCLR_CH28_Pos (28UL) /*!< Position of CH28 field. */ +#define PPI_CHENCLR_CH28_Msk (0x1UL << PPI_CHENCLR_CH28_Pos) /*!< Bit mask of CH28 field. */ +#define PPI_CHENCLR_CH28_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH28_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH28_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 27 : Disable PPI channel 27. */ +#define PPI_CHENCLR_CH27_Pos (27UL) /*!< Position of CH27 field. */ +#define PPI_CHENCLR_CH27_Msk (0x1UL << PPI_CHENCLR_CH27_Pos) /*!< Bit mask of CH27 field. */ +#define PPI_CHENCLR_CH27_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH27_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH27_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 26 : Disable PPI channel 26. */ +#define PPI_CHENCLR_CH26_Pos (26UL) /*!< Position of CH26 field. */ +#define PPI_CHENCLR_CH26_Msk (0x1UL << PPI_CHENCLR_CH26_Pos) /*!< Bit mask of CH26 field. */ +#define PPI_CHENCLR_CH26_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH26_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH26_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 25 : Disable PPI channel 25. */ +#define PPI_CHENCLR_CH25_Pos (25UL) /*!< Position of CH25 field. */ +#define PPI_CHENCLR_CH25_Msk (0x1UL << PPI_CHENCLR_CH25_Pos) /*!< Bit mask of CH25 field. */ +#define PPI_CHENCLR_CH25_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH25_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH25_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 24 : Disable PPI channel 24. */ +#define PPI_CHENCLR_CH24_Pos (24UL) /*!< Position of CH24 field. */ +#define PPI_CHENCLR_CH24_Msk (0x1UL << PPI_CHENCLR_CH24_Pos) /*!< Bit mask of CH24 field. */ +#define PPI_CHENCLR_CH24_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH24_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH24_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 23 : Disable PPI channel 23. */ +#define PPI_CHENCLR_CH23_Pos (23UL) /*!< Position of CH23 field. */ +#define PPI_CHENCLR_CH23_Msk (0x1UL << PPI_CHENCLR_CH23_Pos) /*!< Bit mask of CH23 field. */ +#define PPI_CHENCLR_CH23_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH23_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH23_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 22 : Disable PPI channel 22. */ +#define PPI_CHENCLR_CH22_Pos (22UL) /*!< Position of CH22 field. */ +#define PPI_CHENCLR_CH22_Msk (0x1UL << PPI_CHENCLR_CH22_Pos) /*!< Bit mask of CH22 field. */ +#define PPI_CHENCLR_CH22_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH22_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH22_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 21 : Disable PPI channel 21. */ +#define PPI_CHENCLR_CH21_Pos (21UL) /*!< Position of CH21 field. */ +#define PPI_CHENCLR_CH21_Msk (0x1UL << PPI_CHENCLR_CH21_Pos) /*!< Bit mask of CH21 field. */ +#define PPI_CHENCLR_CH21_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH21_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH21_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 20 : Disable PPI channel 20. */ +#define PPI_CHENCLR_CH20_Pos (20UL) /*!< Position of CH20 field. */ +#define PPI_CHENCLR_CH20_Msk (0x1UL << PPI_CHENCLR_CH20_Pos) /*!< Bit mask of CH20 field. */ +#define PPI_CHENCLR_CH20_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH20_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH20_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 15 : Disable PPI channel 15. */ +#define PPI_CHENCLR_CH15_Pos (15UL) /*!< Position of CH15 field. */ +#define PPI_CHENCLR_CH15_Msk (0x1UL << PPI_CHENCLR_CH15_Pos) /*!< Bit mask of CH15 field. */ +#define PPI_CHENCLR_CH15_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH15_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH15_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 14 : Disable PPI channel 14. */ +#define PPI_CHENCLR_CH14_Pos (14UL) /*!< Position of CH14 field. */ +#define PPI_CHENCLR_CH14_Msk (0x1UL << PPI_CHENCLR_CH14_Pos) /*!< Bit mask of CH14 field. */ +#define PPI_CHENCLR_CH14_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH14_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH14_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 13 : Disable PPI channel 13. */ +#define PPI_CHENCLR_CH13_Pos (13UL) /*!< Position of CH13 field. */ +#define PPI_CHENCLR_CH13_Msk (0x1UL << PPI_CHENCLR_CH13_Pos) /*!< Bit mask of CH13 field. */ +#define PPI_CHENCLR_CH13_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH13_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH13_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 12 : Disable PPI channel 12. */ +#define PPI_CHENCLR_CH12_Pos (12UL) /*!< Position of CH12 field. */ +#define PPI_CHENCLR_CH12_Msk (0x1UL << PPI_CHENCLR_CH12_Pos) /*!< Bit mask of CH12 field. */ +#define PPI_CHENCLR_CH12_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH12_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH12_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 11 : Disable PPI channel 11. */ +#define PPI_CHENCLR_CH11_Pos (11UL) /*!< Position of CH11 field. */ +#define PPI_CHENCLR_CH11_Msk (0x1UL << PPI_CHENCLR_CH11_Pos) /*!< Bit mask of CH11 field. */ +#define PPI_CHENCLR_CH11_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH11_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH11_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 10 : Disable PPI channel 10. */ +#define PPI_CHENCLR_CH10_Pos (10UL) /*!< Position of CH10 field. */ +#define PPI_CHENCLR_CH10_Msk (0x1UL << PPI_CHENCLR_CH10_Pos) /*!< Bit mask of CH10 field. */ +#define PPI_CHENCLR_CH10_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH10_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH10_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 9 : Disable PPI channel 9. */ +#define PPI_CHENCLR_CH9_Pos (9UL) /*!< Position of CH9 field. */ +#define PPI_CHENCLR_CH9_Msk (0x1UL << PPI_CHENCLR_CH9_Pos) /*!< Bit mask of CH9 field. */ +#define PPI_CHENCLR_CH9_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH9_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH9_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 8 : Disable PPI channel 8. */ +#define PPI_CHENCLR_CH8_Pos (8UL) /*!< Position of CH8 field. */ +#define PPI_CHENCLR_CH8_Msk (0x1UL << PPI_CHENCLR_CH8_Pos) /*!< Bit mask of CH8 field. */ +#define PPI_CHENCLR_CH8_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH8_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH8_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 7 : Disable PPI channel 7. */ +#define PPI_CHENCLR_CH7_Pos (7UL) /*!< Position of CH7 field. */ +#define PPI_CHENCLR_CH7_Msk (0x1UL << PPI_CHENCLR_CH7_Pos) /*!< Bit mask of CH7 field. */ +#define PPI_CHENCLR_CH7_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH7_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH7_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 6 : Disable PPI channel 6. */ +#define PPI_CHENCLR_CH6_Pos (6UL) /*!< Position of CH6 field. */ +#define PPI_CHENCLR_CH6_Msk (0x1UL << PPI_CHENCLR_CH6_Pos) /*!< Bit mask of CH6 field. */ +#define PPI_CHENCLR_CH6_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH6_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH6_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 5 : Disable PPI channel 5. */ +#define PPI_CHENCLR_CH5_Pos (5UL) /*!< Position of CH5 field. */ +#define PPI_CHENCLR_CH5_Msk (0x1UL << PPI_CHENCLR_CH5_Pos) /*!< Bit mask of CH5 field. */ +#define PPI_CHENCLR_CH5_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH5_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH5_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 4 : Disable PPI channel 4. */ +#define PPI_CHENCLR_CH4_Pos (4UL) /*!< Position of CH4 field. */ +#define PPI_CHENCLR_CH4_Msk (0x1UL << PPI_CHENCLR_CH4_Pos) /*!< Bit mask of CH4 field. */ +#define PPI_CHENCLR_CH4_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH4_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH4_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 3 : Disable PPI channel 3. */ +#define PPI_CHENCLR_CH3_Pos (3UL) /*!< Position of CH3 field. */ +#define PPI_CHENCLR_CH3_Msk (0x1UL << PPI_CHENCLR_CH3_Pos) /*!< Bit mask of CH3 field. */ +#define PPI_CHENCLR_CH3_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH3_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH3_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 2 : Disable PPI channel 2. */ +#define PPI_CHENCLR_CH2_Pos (2UL) /*!< Position of CH2 field. */ +#define PPI_CHENCLR_CH2_Msk (0x1UL << PPI_CHENCLR_CH2_Pos) /*!< Bit mask of CH2 field. */ +#define PPI_CHENCLR_CH2_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH2_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH2_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 1 : Disable PPI channel 1. */ +#define PPI_CHENCLR_CH1_Pos (1UL) /*!< Position of CH1 field. */ +#define PPI_CHENCLR_CH1_Msk (0x1UL << PPI_CHENCLR_CH1_Pos) /*!< Bit mask of CH1 field. */ +#define PPI_CHENCLR_CH1_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH1_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH1_Clear (1UL) /*!< Disable channel on write. */ + +/* Bit 0 : Disable PPI channel 0. */ +#define PPI_CHENCLR_CH0_Pos (0UL) /*!< Position of CH0 field. */ +#define PPI_CHENCLR_CH0_Msk (0x1UL << PPI_CHENCLR_CH0_Pos) /*!< Bit mask of CH0 field. */ +#define PPI_CHENCLR_CH0_Disabled (0UL) /*!< Channel disabled. */ +#define PPI_CHENCLR_CH0_Enabled (1UL) /*!< Channel enabled. */ +#define PPI_CHENCLR_CH0_Clear (1UL) /*!< Disable channel on write. */ + +/* Register: PPI_CHG */ +/* Description: Channel group configuration. */ + +/* Bit 31 : Include CH31 in channel group. */ +#define PPI_CHG_CH31_Pos (31UL) /*!< Position of CH31 field. */ +#define PPI_CHG_CH31_Msk (0x1UL << PPI_CHG_CH31_Pos) /*!< Bit mask of CH31 field. */ +#define PPI_CHG_CH31_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH31_Included (1UL) /*!< Channel included. */ + +/* Bit 30 : Include CH30 in channel group. */ +#define PPI_CHG_CH30_Pos (30UL) /*!< Position of CH30 field. */ +#define PPI_CHG_CH30_Msk (0x1UL << PPI_CHG_CH30_Pos) /*!< Bit mask of CH30 field. */ +#define PPI_CHG_CH30_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH30_Included (1UL) /*!< Channel included. */ + +/* Bit 29 : Include CH29 in channel group. */ +#define PPI_CHG_CH29_Pos (29UL) /*!< Position of CH29 field. */ +#define PPI_CHG_CH29_Msk (0x1UL << PPI_CHG_CH29_Pos) /*!< Bit mask of CH29 field. */ +#define PPI_CHG_CH29_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH29_Included (1UL) /*!< Channel included. */ + +/* Bit 28 : Include CH28 in channel group. */ +#define PPI_CHG_CH28_Pos (28UL) /*!< Position of CH28 field. */ +#define PPI_CHG_CH28_Msk (0x1UL << PPI_CHG_CH28_Pos) /*!< Bit mask of CH28 field. */ +#define PPI_CHG_CH28_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH28_Included (1UL) /*!< Channel included. */ + +/* Bit 27 : Include CH27 in channel group. */ +#define PPI_CHG_CH27_Pos (27UL) /*!< Position of CH27 field. */ +#define PPI_CHG_CH27_Msk (0x1UL << PPI_CHG_CH27_Pos) /*!< Bit mask of CH27 field. */ +#define PPI_CHG_CH27_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH27_Included (1UL) /*!< Channel included. */ + +/* Bit 26 : Include CH26 in channel group. */ +#define PPI_CHG_CH26_Pos (26UL) /*!< Position of CH26 field. */ +#define PPI_CHG_CH26_Msk (0x1UL << PPI_CHG_CH26_Pos) /*!< Bit mask of CH26 field. */ +#define PPI_CHG_CH26_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH26_Included (1UL) /*!< Channel included. */ + +/* Bit 25 : Include CH25 in channel group. */ +#define PPI_CHG_CH25_Pos (25UL) /*!< Position of CH25 field. */ +#define PPI_CHG_CH25_Msk (0x1UL << PPI_CHG_CH25_Pos) /*!< Bit mask of CH25 field. */ +#define PPI_CHG_CH25_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH25_Included (1UL) /*!< Channel included. */ + +/* Bit 24 : Include CH24 in channel group. */ +#define PPI_CHG_CH24_Pos (24UL) /*!< Position of CH24 field. */ +#define PPI_CHG_CH24_Msk (0x1UL << PPI_CHG_CH24_Pos) /*!< Bit mask of CH24 field. */ +#define PPI_CHG_CH24_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH24_Included (1UL) /*!< Channel included. */ + +/* Bit 23 : Include CH23 in channel group. */ +#define PPI_CHG_CH23_Pos (23UL) /*!< Position of CH23 field. */ +#define PPI_CHG_CH23_Msk (0x1UL << PPI_CHG_CH23_Pos) /*!< Bit mask of CH23 field. */ +#define PPI_CHG_CH23_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH23_Included (1UL) /*!< Channel included. */ + +/* Bit 22 : Include CH22 in channel group. */ +#define PPI_CHG_CH22_Pos (22UL) /*!< Position of CH22 field. */ +#define PPI_CHG_CH22_Msk (0x1UL << PPI_CHG_CH22_Pos) /*!< Bit mask of CH22 field. */ +#define PPI_CHG_CH22_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH22_Included (1UL) /*!< Channel included. */ + +/* Bit 21 : Include CH21 in channel group. */ +#define PPI_CHG_CH21_Pos (21UL) /*!< Position of CH21 field. */ +#define PPI_CHG_CH21_Msk (0x1UL << PPI_CHG_CH21_Pos) /*!< Bit mask of CH21 field. */ +#define PPI_CHG_CH21_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH21_Included (1UL) /*!< Channel included. */ + +/* Bit 20 : Include CH20 in channel group. */ +#define PPI_CHG_CH20_Pos (20UL) /*!< Position of CH20 field. */ +#define PPI_CHG_CH20_Msk (0x1UL << PPI_CHG_CH20_Pos) /*!< Bit mask of CH20 field. */ +#define PPI_CHG_CH20_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH20_Included (1UL) /*!< Channel included. */ + +/* Bit 15 : Include CH15 in channel group. */ +#define PPI_CHG_CH15_Pos (15UL) /*!< Position of CH15 field. */ +#define PPI_CHG_CH15_Msk (0x1UL << PPI_CHG_CH15_Pos) /*!< Bit mask of CH15 field. */ +#define PPI_CHG_CH15_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH15_Included (1UL) /*!< Channel included. */ + +/* Bit 14 : Include CH14 in channel group. */ +#define PPI_CHG_CH14_Pos (14UL) /*!< Position of CH14 field. */ +#define PPI_CHG_CH14_Msk (0x1UL << PPI_CHG_CH14_Pos) /*!< Bit mask of CH14 field. */ +#define PPI_CHG_CH14_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH14_Included (1UL) /*!< Channel included. */ + +/* Bit 13 : Include CH13 in channel group. */ +#define PPI_CHG_CH13_Pos (13UL) /*!< Position of CH13 field. */ +#define PPI_CHG_CH13_Msk (0x1UL << PPI_CHG_CH13_Pos) /*!< Bit mask of CH13 field. */ +#define PPI_CHG_CH13_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH13_Included (1UL) /*!< Channel included. */ + +/* Bit 12 : Include CH12 in channel group. */ +#define PPI_CHG_CH12_Pos (12UL) /*!< Position of CH12 field. */ +#define PPI_CHG_CH12_Msk (0x1UL << PPI_CHG_CH12_Pos) /*!< Bit mask of CH12 field. */ +#define PPI_CHG_CH12_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH12_Included (1UL) /*!< Channel included. */ + +/* Bit 11 : Include CH11 in channel group. */ +#define PPI_CHG_CH11_Pos (11UL) /*!< Position of CH11 field. */ +#define PPI_CHG_CH11_Msk (0x1UL << PPI_CHG_CH11_Pos) /*!< Bit mask of CH11 field. */ +#define PPI_CHG_CH11_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH11_Included (1UL) /*!< Channel included. */ + +/* Bit 10 : Include CH10 in channel group. */ +#define PPI_CHG_CH10_Pos (10UL) /*!< Position of CH10 field. */ +#define PPI_CHG_CH10_Msk (0x1UL << PPI_CHG_CH10_Pos) /*!< Bit mask of CH10 field. */ +#define PPI_CHG_CH10_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH10_Included (1UL) /*!< Channel included. */ + +/* Bit 9 : Include CH9 in channel group. */ +#define PPI_CHG_CH9_Pos (9UL) /*!< Position of CH9 field. */ +#define PPI_CHG_CH9_Msk (0x1UL << PPI_CHG_CH9_Pos) /*!< Bit mask of CH9 field. */ +#define PPI_CHG_CH9_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH9_Included (1UL) /*!< Channel included. */ + +/* Bit 8 : Include CH8 in channel group. */ +#define PPI_CHG_CH8_Pos (8UL) /*!< Position of CH8 field. */ +#define PPI_CHG_CH8_Msk (0x1UL << PPI_CHG_CH8_Pos) /*!< Bit mask of CH8 field. */ +#define PPI_CHG_CH8_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH8_Included (1UL) /*!< Channel included. */ + +/* Bit 7 : Include CH7 in channel group. */ +#define PPI_CHG_CH7_Pos (7UL) /*!< Position of CH7 field. */ +#define PPI_CHG_CH7_Msk (0x1UL << PPI_CHG_CH7_Pos) /*!< Bit mask of CH7 field. */ +#define PPI_CHG_CH7_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH7_Included (1UL) /*!< Channel included. */ + +/* Bit 6 : Include CH6 in channel group. */ +#define PPI_CHG_CH6_Pos (6UL) /*!< Position of CH6 field. */ +#define PPI_CHG_CH6_Msk (0x1UL << PPI_CHG_CH6_Pos) /*!< Bit mask of CH6 field. */ +#define PPI_CHG_CH6_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH6_Included (1UL) /*!< Channel included. */ + +/* Bit 5 : Include CH5 in channel group. */ +#define PPI_CHG_CH5_Pos (5UL) /*!< Position of CH5 field. */ +#define PPI_CHG_CH5_Msk (0x1UL << PPI_CHG_CH5_Pos) /*!< Bit mask of CH5 field. */ +#define PPI_CHG_CH5_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH5_Included (1UL) /*!< Channel included. */ + +/* Bit 4 : Include CH4 in channel group. */ +#define PPI_CHG_CH4_Pos (4UL) /*!< Position of CH4 field. */ +#define PPI_CHG_CH4_Msk (0x1UL << PPI_CHG_CH4_Pos) /*!< Bit mask of CH4 field. */ +#define PPI_CHG_CH4_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH4_Included (1UL) /*!< Channel included. */ + +/* Bit 3 : Include CH3 in channel group. */ +#define PPI_CHG_CH3_Pos (3UL) /*!< Position of CH3 field. */ +#define PPI_CHG_CH3_Msk (0x1UL << PPI_CHG_CH3_Pos) /*!< Bit mask of CH3 field. */ +#define PPI_CHG_CH3_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH3_Included (1UL) /*!< Channel included. */ + +/* Bit 2 : Include CH2 in channel group. */ +#define PPI_CHG_CH2_Pos (2UL) /*!< Position of CH2 field. */ +#define PPI_CHG_CH2_Msk (0x1UL << PPI_CHG_CH2_Pos) /*!< Bit mask of CH2 field. */ +#define PPI_CHG_CH2_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH2_Included (1UL) /*!< Channel included. */ + +/* Bit 1 : Include CH1 in channel group. */ +#define PPI_CHG_CH1_Pos (1UL) /*!< Position of CH1 field. */ +#define PPI_CHG_CH1_Msk (0x1UL << PPI_CHG_CH1_Pos) /*!< Bit mask of CH1 field. */ +#define PPI_CHG_CH1_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH1_Included (1UL) /*!< Channel included. */ + +/* Bit 0 : Include CH0 in channel group. */ +#define PPI_CHG_CH0_Pos (0UL) /*!< Position of CH0 field. */ +#define PPI_CHG_CH0_Msk (0x1UL << PPI_CHG_CH0_Pos) /*!< Bit mask of CH0 field. */ +#define PPI_CHG_CH0_Excluded (0UL) /*!< Channel excluded. */ +#define PPI_CHG_CH0_Included (1UL) /*!< Channel included. */ + + +/* Peripheral: QDEC */ +/* Description: Rotary decoder. */ + +/* Register: QDEC_SHORTS */ +/* Description: Shortcuts for the QDEC. */ + +/* Bit 1 : Shortcut between SAMPLERDY event and STOP task. */ +#define QDEC_SHORTS_SAMPLERDY_STOP_Pos (1UL) /*!< Position of SAMPLERDY_STOP field. */ +#define QDEC_SHORTS_SAMPLERDY_STOP_Msk (0x1UL << QDEC_SHORTS_SAMPLERDY_STOP_Pos) /*!< Bit mask of SAMPLERDY_STOP field. */ +#define QDEC_SHORTS_SAMPLERDY_STOP_Disabled (0UL) /*!< Shortcut disabled. */ +#define QDEC_SHORTS_SAMPLERDY_STOP_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Bit 0 : Shortcut between REPORTRDY event and READCLRACC task. */ +#define QDEC_SHORTS_REPORTRDY_READCLRACC_Pos (0UL) /*!< Position of REPORTRDY_READCLRACC field. */ +#define QDEC_SHORTS_REPORTRDY_READCLRACC_Msk (0x1UL << QDEC_SHORTS_REPORTRDY_READCLRACC_Pos) /*!< Bit mask of REPORTRDY_READCLRACC field. */ +#define QDEC_SHORTS_REPORTRDY_READCLRACC_Disabled (0UL) /*!< Shortcut disabled. */ +#define QDEC_SHORTS_REPORTRDY_READCLRACC_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Register: QDEC_INTENSET */ +/* Description: Interrupt enable set register. */ + +/* Bit 2 : Enable interrupt on ACCOF event. */ +#define QDEC_INTENSET_ACCOF_Pos (2UL) /*!< Position of ACCOF field. */ +#define QDEC_INTENSET_ACCOF_Msk (0x1UL << QDEC_INTENSET_ACCOF_Pos) /*!< Bit mask of ACCOF field. */ +#define QDEC_INTENSET_ACCOF_Disabled (0UL) /*!< Interrupt disabled. */ +#define QDEC_INTENSET_ACCOF_Enabled (1UL) /*!< Interrupt enabled. */ +#define QDEC_INTENSET_ACCOF_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 1 : Enable interrupt on REPORTRDY event. */ +#define QDEC_INTENSET_REPORTRDY_Pos (1UL) /*!< Position of REPORTRDY field. */ +#define QDEC_INTENSET_REPORTRDY_Msk (0x1UL << QDEC_INTENSET_REPORTRDY_Pos) /*!< Bit mask of REPORTRDY field. */ +#define QDEC_INTENSET_REPORTRDY_Disabled (0UL) /*!< Interrupt disabled. */ +#define QDEC_INTENSET_REPORTRDY_Enabled (1UL) /*!< Interrupt enabled. */ +#define QDEC_INTENSET_REPORTRDY_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 0 : Enable interrupt on SAMPLERDY event. */ +#define QDEC_INTENSET_SAMPLERDY_Pos (0UL) /*!< Position of SAMPLERDY field. */ +#define QDEC_INTENSET_SAMPLERDY_Msk (0x1UL << QDEC_INTENSET_SAMPLERDY_Pos) /*!< Bit mask of SAMPLERDY field. */ +#define QDEC_INTENSET_SAMPLERDY_Disabled (0UL) /*!< Interrupt disabled. */ +#define QDEC_INTENSET_SAMPLERDY_Enabled (1UL) /*!< Interrupt enabled. */ +#define QDEC_INTENSET_SAMPLERDY_Set (1UL) /*!< Enable interrupt on write. */ + +/* Register: QDEC_INTENCLR */ +/* Description: Interrupt enable clear register. */ + +/* Bit 2 : Disable interrupt on ACCOF event. */ +#define QDEC_INTENCLR_ACCOF_Pos (2UL) /*!< Position of ACCOF field. */ +#define QDEC_INTENCLR_ACCOF_Msk (0x1UL << QDEC_INTENCLR_ACCOF_Pos) /*!< Bit mask of ACCOF field. */ +#define QDEC_INTENCLR_ACCOF_Disabled (0UL) /*!< Interrupt disabled. */ +#define QDEC_INTENCLR_ACCOF_Enabled (1UL) /*!< Interrupt enabled. */ +#define QDEC_INTENCLR_ACCOF_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 1 : Disable interrupt on REPORTRDY event. */ +#define QDEC_INTENCLR_REPORTRDY_Pos (1UL) /*!< Position of REPORTRDY field. */ +#define QDEC_INTENCLR_REPORTRDY_Msk (0x1UL << QDEC_INTENCLR_REPORTRDY_Pos) /*!< Bit mask of REPORTRDY field. */ +#define QDEC_INTENCLR_REPORTRDY_Disabled (0UL) /*!< Interrupt disabled. */ +#define QDEC_INTENCLR_REPORTRDY_Enabled (1UL) /*!< Interrupt enabled. */ +#define QDEC_INTENCLR_REPORTRDY_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 0 : Disable interrupt on SAMPLERDY event. */ +#define QDEC_INTENCLR_SAMPLERDY_Pos (0UL) /*!< Position of SAMPLERDY field. */ +#define QDEC_INTENCLR_SAMPLERDY_Msk (0x1UL << QDEC_INTENCLR_SAMPLERDY_Pos) /*!< Bit mask of SAMPLERDY field. */ +#define QDEC_INTENCLR_SAMPLERDY_Disabled (0UL) /*!< Interrupt disabled. */ +#define QDEC_INTENCLR_SAMPLERDY_Enabled (1UL) /*!< Interrupt enabled. */ +#define QDEC_INTENCLR_SAMPLERDY_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Register: QDEC_ENABLE */ +/* Description: Enable the QDEC. */ + +/* Bit 0 : Enable or disable QDEC. */ +#define QDEC_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define QDEC_ENABLE_ENABLE_Msk (0x1UL << QDEC_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define QDEC_ENABLE_ENABLE_Disabled (0UL) /*!< Disabled QDEC. */ +#define QDEC_ENABLE_ENABLE_Enabled (1UL) /*!< Enable QDEC. */ + +/* Register: QDEC_LEDPOL */ +/* Description: LED output pin polarity. */ + +/* Bit 0 : LED output pin polarity. */ +#define QDEC_LEDPOL_LEDPOL_Pos (0UL) /*!< Position of LEDPOL field. */ +#define QDEC_LEDPOL_LEDPOL_Msk (0x1UL << QDEC_LEDPOL_LEDPOL_Pos) /*!< Bit mask of LEDPOL field. */ +#define QDEC_LEDPOL_LEDPOL_ActiveLow (0UL) /*!< LED output is active low. */ +#define QDEC_LEDPOL_LEDPOL_ActiveHigh (1UL) /*!< LED output is active high. */ + +/* Register: QDEC_SAMPLEPER */ +/* Description: Sample period. */ + +/* Bits 2..0 : Sample period. */ +#define QDEC_SAMPLEPER_SAMPLEPER_Pos (0UL) /*!< Position of SAMPLEPER field. */ +#define QDEC_SAMPLEPER_SAMPLEPER_Msk (0x7UL << QDEC_SAMPLEPER_SAMPLEPER_Pos) /*!< Bit mask of SAMPLEPER field. */ +#define QDEC_SAMPLEPER_SAMPLEPER_128us (0x00UL) /*!< 128us sample period. */ +#define QDEC_SAMPLEPER_SAMPLEPER_256us (0x01UL) /*!< 256us sample period. */ +#define QDEC_SAMPLEPER_SAMPLEPER_512us (0x02UL) /*!< 512us sample period. */ +#define QDEC_SAMPLEPER_SAMPLEPER_1024us (0x03UL) /*!< 1024us sample period. */ +#define QDEC_SAMPLEPER_SAMPLEPER_2048us (0x04UL) /*!< 2048us sample period. */ +#define QDEC_SAMPLEPER_SAMPLEPER_4096us (0x05UL) /*!< 4096us sample period. */ +#define QDEC_SAMPLEPER_SAMPLEPER_8192us (0x06UL) /*!< 8192us sample period. */ +#define QDEC_SAMPLEPER_SAMPLEPER_16384us (0x07UL) /*!< 16384us sample period. */ + +/* Register: QDEC_SAMPLE */ +/* Description: Motion sample value. */ + +/* Bits 31..0 : Last sample taken in compliment to 2. */ +#define QDEC_SAMPLE_SAMPLE_Pos (0UL) /*!< Position of SAMPLE field. */ +#define QDEC_SAMPLE_SAMPLE_Msk (0xFFFFFFFFUL << QDEC_SAMPLE_SAMPLE_Pos) /*!< Bit mask of SAMPLE field. */ + +/* Register: QDEC_REPORTPER */ +/* Description: Number of samples to generate an EVENT_REPORTRDY. */ + +/* Bits 2..0 : Number of samples to generate an EVENT_REPORTRDY. */ +#define QDEC_REPORTPER_REPORTPER_Pos (0UL) /*!< Position of REPORTPER field. */ +#define QDEC_REPORTPER_REPORTPER_Msk (0x7UL << QDEC_REPORTPER_REPORTPER_Pos) /*!< Bit mask of REPORTPER field. */ +#define QDEC_REPORTPER_REPORTPER_10Smpl (0x00UL) /*!< 10 samples per report. */ +#define QDEC_REPORTPER_REPORTPER_40Smpl (0x01UL) /*!< 40 samples per report. */ +#define QDEC_REPORTPER_REPORTPER_80Smpl (0x02UL) /*!< 80 samples per report. */ +#define QDEC_REPORTPER_REPORTPER_120Smpl (0x03UL) /*!< 120 samples per report. */ +#define QDEC_REPORTPER_REPORTPER_160Smpl (0x04UL) /*!< 160 samples per report. */ +#define QDEC_REPORTPER_REPORTPER_200Smpl (0x05UL) /*!< 200 samples per report. */ +#define QDEC_REPORTPER_REPORTPER_240Smpl (0x06UL) /*!< 240 samples per report. */ +#define QDEC_REPORTPER_REPORTPER_280Smpl (0x07UL) /*!< 280 samples per report. */ + +/* Register: QDEC_DBFEN */ +/* Description: Enable debouncer input filters. */ + +/* Bit 0 : Enable debounce input filters. */ +#define QDEC_DBFEN_DBFEN_Pos (0UL) /*!< Position of DBFEN field. */ +#define QDEC_DBFEN_DBFEN_Msk (0x1UL << QDEC_DBFEN_DBFEN_Pos) /*!< Bit mask of DBFEN field. */ +#define QDEC_DBFEN_DBFEN_Disabled (0UL) /*!< Debounce input filters disabled. */ +#define QDEC_DBFEN_DBFEN_Enabled (1UL) /*!< Debounce input filters enabled. */ + +/* Register: QDEC_LEDPRE */ +/* Description: Time LED is switched ON before the sample. */ + +/* Bits 8..0 : Period in us the LED in switched on prior to sampling. */ +#define QDEC_LEDPRE_LEDPRE_Pos (0UL) /*!< Position of LEDPRE field. */ +#define QDEC_LEDPRE_LEDPRE_Msk (0x1FFUL << QDEC_LEDPRE_LEDPRE_Pos) /*!< Bit mask of LEDPRE field. */ + +/* Register: QDEC_ACCDBL */ +/* Description: Accumulated double (error) transitions register. */ + +/* Bits 3..0 : Accumulated double (error) transitions. */ +#define QDEC_ACCDBL_ACCDBL_Pos (0UL) /*!< Position of ACCDBL field. */ +#define QDEC_ACCDBL_ACCDBL_Msk (0xFUL << QDEC_ACCDBL_ACCDBL_Pos) /*!< Bit mask of ACCDBL field. */ + +/* Register: QDEC_ACCDBLREAD */ +/* Description: Snapshot of ACCDBL register. Value generated by the TASKS_READCLEACC task. */ + +/* Bits 3..0 : Snapshot of accumulated double (error) transitions. */ +#define QDEC_ACCDBLREAD_ACCDBLREAD_Pos (0UL) /*!< Position of ACCDBLREAD field. */ +#define QDEC_ACCDBLREAD_ACCDBLREAD_Msk (0xFUL << QDEC_ACCDBLREAD_ACCDBLREAD_Pos) /*!< Bit mask of ACCDBLREAD field. */ + +/* Register: QDEC_POWER */ +/* Description: Peripheral power control. */ + +/* Bit 0 : Peripheral power control. */ +#define QDEC_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ +#define QDEC_POWER_POWER_Msk (0x1UL << QDEC_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ +#define QDEC_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ +#define QDEC_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ + + +/* Peripheral: RADIO */ +/* Description: The radio. */ + +/* Register: RADIO_SHORTS */ +/* Description: Shortcuts for the radio. */ + +/* Bit 8 : Shortcut between DISABLED event and RSSISTOP task. */ +#define RADIO_SHORTS_DISABLED_RSSISTOP_Pos (8UL) /*!< Position of DISABLED_RSSISTOP field. */ +#define RADIO_SHORTS_DISABLED_RSSISTOP_Msk (0x1UL << RADIO_SHORTS_DISABLED_RSSISTOP_Pos) /*!< Bit mask of DISABLED_RSSISTOP field. */ +#define RADIO_SHORTS_DISABLED_RSSISTOP_Disabled (0UL) /*!< Shortcut disabled. */ +#define RADIO_SHORTS_DISABLED_RSSISTOP_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Bit 6 : Shortcut between ADDRESS event and BCSTART task. */ +#define RADIO_SHORTS_ADDRESS_BCSTART_Pos (6UL) /*!< Position of ADDRESS_BCSTART field. */ +#define RADIO_SHORTS_ADDRESS_BCSTART_Msk (0x1UL << RADIO_SHORTS_ADDRESS_BCSTART_Pos) /*!< Bit mask of ADDRESS_BCSTART field. */ +#define RADIO_SHORTS_ADDRESS_BCSTART_Disabled (0UL) /*!< Shortcut disabled. */ +#define RADIO_SHORTS_ADDRESS_BCSTART_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Bit 5 : Shortcut between END event and START task. */ +#define RADIO_SHORTS_END_START_Pos (5UL) /*!< Position of END_START field. */ +#define RADIO_SHORTS_END_START_Msk (0x1UL << RADIO_SHORTS_END_START_Pos) /*!< Bit mask of END_START field. */ +#define RADIO_SHORTS_END_START_Disabled (0UL) /*!< Shortcut disabled. */ +#define RADIO_SHORTS_END_START_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Bit 4 : Shortcut between ADDRESS event and RSSISTART task. */ +#define RADIO_SHORTS_ADDRESS_RSSISTART_Pos (4UL) /*!< Position of ADDRESS_RSSISTART field. */ +#define RADIO_SHORTS_ADDRESS_RSSISTART_Msk (0x1UL << RADIO_SHORTS_ADDRESS_RSSISTART_Pos) /*!< Bit mask of ADDRESS_RSSISTART field. */ +#define RADIO_SHORTS_ADDRESS_RSSISTART_Disabled (0UL) /*!< Shortcut disabled. */ +#define RADIO_SHORTS_ADDRESS_RSSISTART_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Bit 3 : Shortcut between DISABLED event and RXEN task. */ +#define RADIO_SHORTS_DISABLED_RXEN_Pos (3UL) /*!< Position of DISABLED_RXEN field. */ +#define RADIO_SHORTS_DISABLED_RXEN_Msk (0x1UL << RADIO_SHORTS_DISABLED_RXEN_Pos) /*!< Bit mask of DISABLED_RXEN field. */ +#define RADIO_SHORTS_DISABLED_RXEN_Disabled (0UL) /*!< Shortcut disabled. */ +#define RADIO_SHORTS_DISABLED_RXEN_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Bit 2 : Shortcut between DISABLED event and TXEN task. */ +#define RADIO_SHORTS_DISABLED_TXEN_Pos (2UL) /*!< Position of DISABLED_TXEN field. */ +#define RADIO_SHORTS_DISABLED_TXEN_Msk (0x1UL << RADIO_SHORTS_DISABLED_TXEN_Pos) /*!< Bit mask of DISABLED_TXEN field. */ +#define RADIO_SHORTS_DISABLED_TXEN_Disabled (0UL) /*!< Shortcut disabled. */ +#define RADIO_SHORTS_DISABLED_TXEN_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Bit 1 : Shortcut between END event and DISABLE task. */ +#define RADIO_SHORTS_END_DISABLE_Pos (1UL) /*!< Position of END_DISABLE field. */ +#define RADIO_SHORTS_END_DISABLE_Msk (0x1UL << RADIO_SHORTS_END_DISABLE_Pos) /*!< Bit mask of END_DISABLE field. */ +#define RADIO_SHORTS_END_DISABLE_Disabled (0UL) /*!< Shortcut disabled. */ +#define RADIO_SHORTS_END_DISABLE_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Bit 0 : Shortcut between READY event and START task. */ +#define RADIO_SHORTS_READY_START_Pos (0UL) /*!< Position of READY_START field. */ +#define RADIO_SHORTS_READY_START_Msk (0x1UL << RADIO_SHORTS_READY_START_Pos) /*!< Bit mask of READY_START field. */ +#define RADIO_SHORTS_READY_START_Disabled (0UL) /*!< Shortcut disabled. */ +#define RADIO_SHORTS_READY_START_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Register: RADIO_INTENSET */ +/* Description: Interrupt enable set register. */ + +/* Bit 10 : Enable interrupt on BCMATCH event. */ +#define RADIO_INTENSET_BCMATCH_Pos (10UL) /*!< Position of BCMATCH field. */ +#define RADIO_INTENSET_BCMATCH_Msk (0x1UL << RADIO_INTENSET_BCMATCH_Pos) /*!< Bit mask of BCMATCH field. */ +#define RADIO_INTENSET_BCMATCH_Disabled (0UL) /*!< Interrupt disabled. */ +#define RADIO_INTENSET_BCMATCH_Enabled (1UL) /*!< Interrupt enabled. */ +#define RADIO_INTENSET_BCMATCH_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 7 : Enable interrupt on RSSIEND event. */ +#define RADIO_INTENSET_RSSIEND_Pos (7UL) /*!< Position of RSSIEND field. */ +#define RADIO_INTENSET_RSSIEND_Msk (0x1UL << RADIO_INTENSET_RSSIEND_Pos) /*!< Bit mask of RSSIEND field. */ +#define RADIO_INTENSET_RSSIEND_Disabled (0UL) /*!< Interrupt disabled. */ +#define RADIO_INTENSET_RSSIEND_Enabled (1UL) /*!< Interrupt enabled. */ +#define RADIO_INTENSET_RSSIEND_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 6 : Enable interrupt on DEVMISS event. */ +#define RADIO_INTENSET_DEVMISS_Pos (6UL) /*!< Position of DEVMISS field. */ +#define RADIO_INTENSET_DEVMISS_Msk (0x1UL << RADIO_INTENSET_DEVMISS_Pos) /*!< Bit mask of DEVMISS field. */ +#define RADIO_INTENSET_DEVMISS_Disabled (0UL) /*!< Interrupt disabled. */ +#define RADIO_INTENSET_DEVMISS_Enabled (1UL) /*!< Interrupt enabled. */ +#define RADIO_INTENSET_DEVMISS_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 5 : Enable interrupt on DEVMATCH event. */ +#define RADIO_INTENSET_DEVMATCH_Pos (5UL) /*!< Position of DEVMATCH field. */ +#define RADIO_INTENSET_DEVMATCH_Msk (0x1UL << RADIO_INTENSET_DEVMATCH_Pos) /*!< Bit mask of DEVMATCH field. */ +#define RADIO_INTENSET_DEVMATCH_Disabled (0UL) /*!< Interrupt disabled. */ +#define RADIO_INTENSET_DEVMATCH_Enabled (1UL) /*!< Interrupt enabled. */ +#define RADIO_INTENSET_DEVMATCH_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 4 : Enable interrupt on DISABLED event. */ +#define RADIO_INTENSET_DISABLED_Pos (4UL) /*!< Position of DISABLED field. */ +#define RADIO_INTENSET_DISABLED_Msk (0x1UL << RADIO_INTENSET_DISABLED_Pos) /*!< Bit mask of DISABLED field. */ +#define RADIO_INTENSET_DISABLED_Disabled (0UL) /*!< Interrupt disabled. */ +#define RADIO_INTENSET_DISABLED_Enabled (1UL) /*!< Interrupt enabled. */ +#define RADIO_INTENSET_DISABLED_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 3 : Enable interrupt on END event. */ +#define RADIO_INTENSET_END_Pos (3UL) /*!< Position of END field. */ +#define RADIO_INTENSET_END_Msk (0x1UL << RADIO_INTENSET_END_Pos) /*!< Bit mask of END field. */ +#define RADIO_INTENSET_END_Disabled (0UL) /*!< Interrupt disabled. */ +#define RADIO_INTENSET_END_Enabled (1UL) /*!< Interrupt enabled. */ +#define RADIO_INTENSET_END_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 2 : Enable interrupt on PAYLOAD event. */ +#define RADIO_INTENSET_PAYLOAD_Pos (2UL) /*!< Position of PAYLOAD field. */ +#define RADIO_INTENSET_PAYLOAD_Msk (0x1UL << RADIO_INTENSET_PAYLOAD_Pos) /*!< Bit mask of PAYLOAD field. */ +#define RADIO_INTENSET_PAYLOAD_Disabled (0UL) /*!< Interrupt disabled. */ +#define RADIO_INTENSET_PAYLOAD_Enabled (1UL) /*!< Interrupt enabled. */ +#define RADIO_INTENSET_PAYLOAD_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 1 : Enable interrupt on ADDRESS event. */ +#define RADIO_INTENSET_ADDRESS_Pos (1UL) /*!< Position of ADDRESS field. */ +#define RADIO_INTENSET_ADDRESS_Msk (0x1UL << RADIO_INTENSET_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ +#define RADIO_INTENSET_ADDRESS_Disabled (0UL) /*!< Interrupt disabled. */ +#define RADIO_INTENSET_ADDRESS_Enabled (1UL) /*!< Interrupt enabled. */ +#define RADIO_INTENSET_ADDRESS_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 0 : Enable interrupt on READY event. */ +#define RADIO_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */ +#define RADIO_INTENSET_READY_Msk (0x1UL << RADIO_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ +#define RADIO_INTENSET_READY_Disabled (0UL) /*!< Interrupt disabled. */ +#define RADIO_INTENSET_READY_Enabled (1UL) /*!< Interrupt enabled. */ +#define RADIO_INTENSET_READY_Set (1UL) /*!< Enable interrupt on write. */ + +/* Register: RADIO_INTENCLR */ +/* Description: Interrupt enable clear register. */ + +/* Bit 10 : Disable interrupt on BCMATCH event. */ +#define RADIO_INTENCLR_BCMATCH_Pos (10UL) /*!< Position of BCMATCH field. */ +#define RADIO_INTENCLR_BCMATCH_Msk (0x1UL << RADIO_INTENCLR_BCMATCH_Pos) /*!< Bit mask of BCMATCH field. */ +#define RADIO_INTENCLR_BCMATCH_Disabled (0UL) /*!< Interrupt disabled. */ +#define RADIO_INTENCLR_BCMATCH_Enabled (1UL) /*!< Interrupt enabled. */ +#define RADIO_INTENCLR_BCMATCH_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 7 : Disable interrupt on RSSIEND event. */ +#define RADIO_INTENCLR_RSSIEND_Pos (7UL) /*!< Position of RSSIEND field. */ +#define RADIO_INTENCLR_RSSIEND_Msk (0x1UL << RADIO_INTENCLR_RSSIEND_Pos) /*!< Bit mask of RSSIEND field. */ +#define RADIO_INTENCLR_RSSIEND_Disabled (0UL) /*!< Interrupt disabled. */ +#define RADIO_INTENCLR_RSSIEND_Enabled (1UL) /*!< Interrupt enabled. */ +#define RADIO_INTENCLR_RSSIEND_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 6 : Disable interrupt on DEVMISS event. */ +#define RADIO_INTENCLR_DEVMISS_Pos (6UL) /*!< Position of DEVMISS field. */ +#define RADIO_INTENCLR_DEVMISS_Msk (0x1UL << RADIO_INTENCLR_DEVMISS_Pos) /*!< Bit mask of DEVMISS field. */ +#define RADIO_INTENCLR_DEVMISS_Disabled (0UL) /*!< Interrupt disabled. */ +#define RADIO_INTENCLR_DEVMISS_Enabled (1UL) /*!< Interrupt enabled. */ +#define RADIO_INTENCLR_DEVMISS_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 5 : Disable interrupt on DEVMATCH event. */ +#define RADIO_INTENCLR_DEVMATCH_Pos (5UL) /*!< Position of DEVMATCH field. */ +#define RADIO_INTENCLR_DEVMATCH_Msk (0x1UL << RADIO_INTENCLR_DEVMATCH_Pos) /*!< Bit mask of DEVMATCH field. */ +#define RADIO_INTENCLR_DEVMATCH_Disabled (0UL) /*!< Interrupt disabled. */ +#define RADIO_INTENCLR_DEVMATCH_Enabled (1UL) /*!< Interrupt enabled. */ +#define RADIO_INTENCLR_DEVMATCH_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 4 : Disable interrupt on DISABLED event. */ +#define RADIO_INTENCLR_DISABLED_Pos (4UL) /*!< Position of DISABLED field. */ +#define RADIO_INTENCLR_DISABLED_Msk (0x1UL << RADIO_INTENCLR_DISABLED_Pos) /*!< Bit mask of DISABLED field. */ +#define RADIO_INTENCLR_DISABLED_Disabled (0UL) /*!< Interrupt disabled. */ +#define RADIO_INTENCLR_DISABLED_Enabled (1UL) /*!< Interrupt enabled. */ +#define RADIO_INTENCLR_DISABLED_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 3 : Disable interrupt on END event. */ +#define RADIO_INTENCLR_END_Pos (3UL) /*!< Position of END field. */ +#define RADIO_INTENCLR_END_Msk (0x1UL << RADIO_INTENCLR_END_Pos) /*!< Bit mask of END field. */ +#define RADIO_INTENCLR_END_Disabled (0UL) /*!< Interrupt disabled. */ +#define RADIO_INTENCLR_END_Enabled (1UL) /*!< Interrupt enabled. */ +#define RADIO_INTENCLR_END_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 2 : Disable interrupt on PAYLOAD event. */ +#define RADIO_INTENCLR_PAYLOAD_Pos (2UL) /*!< Position of PAYLOAD field. */ +#define RADIO_INTENCLR_PAYLOAD_Msk (0x1UL << RADIO_INTENCLR_PAYLOAD_Pos) /*!< Bit mask of PAYLOAD field. */ +#define RADIO_INTENCLR_PAYLOAD_Disabled (0UL) /*!< Interrupt disabled. */ +#define RADIO_INTENCLR_PAYLOAD_Enabled (1UL) /*!< Interrupt enabled. */ +#define RADIO_INTENCLR_PAYLOAD_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 1 : Disable interrupt on ADDRESS event. */ +#define RADIO_INTENCLR_ADDRESS_Pos (1UL) /*!< Position of ADDRESS field. */ +#define RADIO_INTENCLR_ADDRESS_Msk (0x1UL << RADIO_INTENCLR_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ +#define RADIO_INTENCLR_ADDRESS_Disabled (0UL) /*!< Interrupt disabled. */ +#define RADIO_INTENCLR_ADDRESS_Enabled (1UL) /*!< Interrupt enabled. */ +#define RADIO_INTENCLR_ADDRESS_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 0 : Disable interrupt on READY event. */ +#define RADIO_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */ +#define RADIO_INTENCLR_READY_Msk (0x1UL << RADIO_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ +#define RADIO_INTENCLR_READY_Disabled (0UL) /*!< Interrupt disabled. */ +#define RADIO_INTENCLR_READY_Enabled (1UL) /*!< Interrupt enabled. */ +#define RADIO_INTENCLR_READY_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Register: RADIO_CRCSTATUS */ +/* Description: CRC status of received packet. */ + +/* Bit 0 : CRC status of received packet. */ +#define RADIO_CRCSTATUS_CRCSTATUS_Pos (0UL) /*!< Position of CRCSTATUS field. */ +#define RADIO_CRCSTATUS_CRCSTATUS_Msk (0x1UL << RADIO_CRCSTATUS_CRCSTATUS_Pos) /*!< Bit mask of CRCSTATUS field. */ +#define RADIO_CRCSTATUS_CRCSTATUS_CRCError (0UL) /*!< Packet received with CRC error. */ +#define RADIO_CRCSTATUS_CRCSTATUS_CRCOk (1UL) /*!< Packet received with CRC ok. */ + +/* Register: RADIO_RXMATCH */ +/* Description: Received address. */ + +/* Bits 2..0 : Logical address in which previous packet was received. */ +#define RADIO_RXMATCH_RXMATCH_Pos (0UL) /*!< Position of RXMATCH field. */ +#define RADIO_RXMATCH_RXMATCH_Msk (0x7UL << RADIO_RXMATCH_RXMATCH_Pos) /*!< Bit mask of RXMATCH field. */ + +/* Register: RADIO_RXCRC */ +/* Description: Received CRC. */ + +/* Bits 23..0 : CRC field of previously received packet. */ +#define RADIO_RXCRC_RXCRC_Pos (0UL) /*!< Position of RXCRC field. */ +#define RADIO_RXCRC_RXCRC_Msk (0xFFFFFFUL << RADIO_RXCRC_RXCRC_Pos) /*!< Bit mask of RXCRC field. */ + +/* Register: RADIO_DAI */ +/* Description: Device address match index. */ + +/* Bits 2..0 : Index (n) of device address (see DAB[n] and DAP[n]) that obtained an address match. */ +#define RADIO_DAI_DAI_Pos (0UL) /*!< Position of DAI field. */ +#define RADIO_DAI_DAI_Msk (0x7UL << RADIO_DAI_DAI_Pos) /*!< Bit mask of DAI field. */ + +/* Register: RADIO_FREQUENCY */ +/* Description: Frequency. */ + +/* Bits 6..0 : Radio channel frequency offset in MHz: RF Frequency = 2400 + FREQUENCY (MHz). Decision point: TXEN or RXEN task. */ +#define RADIO_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ +#define RADIO_FREQUENCY_FREQUENCY_Msk (0x7FUL << RADIO_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ + +/* Register: RADIO_TXPOWER */ +/* Description: Output power. */ + +/* Bits 7..0 : Radio output power. Decision point: TXEN task. */ +#define RADIO_TXPOWER_TXPOWER_Pos (0UL) /*!< Position of TXPOWER field. */ +#define RADIO_TXPOWER_TXPOWER_Msk (0xFFUL << RADIO_TXPOWER_TXPOWER_Pos) /*!< Bit mask of TXPOWER field. */ +#define RADIO_TXPOWER_TXPOWER_0dBm (0x00UL) /*!< 0dBm. */ +#define RADIO_TXPOWER_TXPOWER_Pos4dBm (0x04UL) /*!< +4dBm. */ +#define RADIO_TXPOWER_TXPOWER_Neg30dBm (0xD8UL) /*!< -30dBm. */ +#define RADIO_TXPOWER_TXPOWER_Neg20dBm (0xECUL) /*!< -20dBm. */ +#define RADIO_TXPOWER_TXPOWER_Neg16dBm (0xF0UL) /*!< -16dBm. */ +#define RADIO_TXPOWER_TXPOWER_Neg12dBm (0xF4UL) /*!< -12dBm. */ +#define RADIO_TXPOWER_TXPOWER_Neg8dBm (0xF8UL) /*!< -8dBm. */ +#define RADIO_TXPOWER_TXPOWER_Neg4dBm (0xFCUL) /*!< -4dBm. */ + +/* Register: RADIO_MODE */ +/* Description: Data rate and modulation. */ + +/* Bits 1..0 : Radio data rate and modulation setting. Decision point: TXEN or RXEN task. */ +#define RADIO_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ +#define RADIO_MODE_MODE_Msk (0x3UL << RADIO_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ +#define RADIO_MODE_MODE_Nrf_1Mbit (0x00UL) /*!< 1Mbit/s Nordic propietary radio mode. */ +#define RADIO_MODE_MODE_Nrf_2Mbit (0x01UL) /*!< 2Mbit/s Nordic propietary radio mode. */ +#define RADIO_MODE_MODE_Nrf_250Kbit (0x02UL) /*!< 250kbit/s Nordic propietary radio mode. */ +#define RADIO_MODE_MODE_Ble_1Mbit (0x03UL) /*!< 1Mbit/s Bluetooth Low Energy */ + +/* Register: RADIO_PCNF0 */ +/* Description: Packet configuration 0. */ + +/* Bits 19..16 : Length of S1 field in number of bits. Decision point: START task. */ +#define RADIO_PCNF0_S1LEN_Pos (16UL) /*!< Position of S1LEN field. */ +#define RADIO_PCNF0_S1LEN_Msk (0xFUL << RADIO_PCNF0_S1LEN_Pos) /*!< Bit mask of S1LEN field. */ + +/* Bit 8 : Length of S0 field in number of bytes. Decision point: START task. */ +#define RADIO_PCNF0_S0LEN_Pos (8UL) /*!< Position of S0LEN field. */ +#define RADIO_PCNF0_S0LEN_Msk (0x1UL << RADIO_PCNF0_S0LEN_Pos) /*!< Bit mask of S0LEN field. */ + +/* Bits 3..0 : Length of length field in number of bits. Decision point: START task. */ +#define RADIO_PCNF0_LFLEN_Pos (0UL) /*!< Position of LFLEN field. */ +#define RADIO_PCNF0_LFLEN_Msk (0xFUL << RADIO_PCNF0_LFLEN_Pos) /*!< Bit mask of LFLEN field. */ + +/* Register: RADIO_PCNF1 */ +/* Description: Packet configuration 1. */ + +/* Bit 25 : Packet whitening enable. */ +#define RADIO_PCNF1_WHITEEN_Pos (25UL) /*!< Position of WHITEEN field. */ +#define RADIO_PCNF1_WHITEEN_Msk (0x1UL << RADIO_PCNF1_WHITEEN_Pos) /*!< Bit mask of WHITEEN field. */ +#define RADIO_PCNF1_WHITEEN_Disabled (0UL) /*!< Whitening disabled. */ +#define RADIO_PCNF1_WHITEEN_Enabled (1UL) /*!< Whitening enabled. */ + +/* Bit 24 : On air endianness of packet length field. Decision point: START task. */ +#define RADIO_PCNF1_ENDIAN_Pos (24UL) /*!< Position of ENDIAN field. */ +#define RADIO_PCNF1_ENDIAN_Msk (0x1UL << RADIO_PCNF1_ENDIAN_Pos) /*!< Bit mask of ENDIAN field. */ +#define RADIO_PCNF1_ENDIAN_Little (0UL) /*!< Least significant bit on air first */ +#define RADIO_PCNF1_ENDIAN_Big (1UL) /*!< Most significant bit on air first */ + +/* Bits 18..16 : Base address length in number of bytes. Decision point: START task. */ +#define RADIO_PCNF1_BALEN_Pos (16UL) /*!< Position of BALEN field. */ +#define RADIO_PCNF1_BALEN_Msk (0x7UL << RADIO_PCNF1_BALEN_Pos) /*!< Bit mask of BALEN field. */ + +/* Bits 15..8 : Static length in number of bytes. Decision point: START task. */ +#define RADIO_PCNF1_STATLEN_Pos (8UL) /*!< Position of STATLEN field. */ +#define RADIO_PCNF1_STATLEN_Msk (0xFFUL << RADIO_PCNF1_STATLEN_Pos) /*!< Bit mask of STATLEN field. */ + +/* Bits 7..0 : Maximum length of packet payload in number of bytes. */ +#define RADIO_PCNF1_MAXLEN_Pos (0UL) /*!< Position of MAXLEN field. */ +#define RADIO_PCNF1_MAXLEN_Msk (0xFFUL << RADIO_PCNF1_MAXLEN_Pos) /*!< Bit mask of MAXLEN field. */ + +/* Register: RADIO_PREFIX0 */ +/* Description: Prefixes bytes for logical addresses 0 to 3. */ + +/* Bits 31..24 : Address prefix 3. Decision point: START task. */ +#define RADIO_PREFIX0_AP3_Pos (24UL) /*!< Position of AP3 field. */ +#define RADIO_PREFIX0_AP3_Msk (0xFFUL << RADIO_PREFIX0_AP3_Pos) /*!< Bit mask of AP3 field. */ + +/* Bits 23..16 : Address prefix 2. Decision point: START task. */ +#define RADIO_PREFIX0_AP2_Pos (16UL) /*!< Position of AP2 field. */ +#define RADIO_PREFIX0_AP2_Msk (0xFFUL << RADIO_PREFIX0_AP2_Pos) /*!< Bit mask of AP2 field. */ + +/* Bits 15..8 : Address prefix 1. Decision point: START task. */ +#define RADIO_PREFIX0_AP1_Pos (8UL) /*!< Position of AP1 field. */ +#define RADIO_PREFIX0_AP1_Msk (0xFFUL << RADIO_PREFIX0_AP1_Pos) /*!< Bit mask of AP1 field. */ + +/* Bits 7..0 : Address prefix 0. Decision point: START task. */ +#define RADIO_PREFIX0_AP0_Pos (0UL) /*!< Position of AP0 field. */ +#define RADIO_PREFIX0_AP0_Msk (0xFFUL << RADIO_PREFIX0_AP0_Pos) /*!< Bit mask of AP0 field. */ + +/* Register: RADIO_PREFIX1 */ +/* Description: Prefixes bytes for logical addresses 4 to 7. */ + +/* Bits 31..24 : Address prefix 7. Decision point: START task. */ +#define RADIO_PREFIX1_AP7_Pos (24UL) /*!< Position of AP7 field. */ +#define RADIO_PREFIX1_AP7_Msk (0xFFUL << RADIO_PREFIX1_AP7_Pos) /*!< Bit mask of AP7 field. */ + +/* Bits 23..16 : Address prefix 6. Decision point: START task. */ +#define RADIO_PREFIX1_AP6_Pos (16UL) /*!< Position of AP6 field. */ +#define RADIO_PREFIX1_AP6_Msk (0xFFUL << RADIO_PREFIX1_AP6_Pos) /*!< Bit mask of AP6 field. */ + +/* Bits 15..8 : Address prefix 5. Decision point: START task. */ +#define RADIO_PREFIX1_AP5_Pos (8UL) /*!< Position of AP5 field. */ +#define RADIO_PREFIX1_AP5_Msk (0xFFUL << RADIO_PREFIX1_AP5_Pos) /*!< Bit mask of AP5 field. */ + +/* Bits 7..0 : Address prefix 4. Decision point: START task. */ +#define RADIO_PREFIX1_AP4_Pos (0UL) /*!< Position of AP4 field. */ +#define RADIO_PREFIX1_AP4_Msk (0xFFUL << RADIO_PREFIX1_AP4_Pos) /*!< Bit mask of AP4 field. */ + +/* Register: RADIO_TXADDRESS */ +/* Description: Transmit address select. */ + +/* Bits 2..0 : Logical address to be used when transmitting a packet. Decision point: START task. */ +#define RADIO_TXADDRESS_TXADDRESS_Pos (0UL) /*!< Position of TXADDRESS field. */ +#define RADIO_TXADDRESS_TXADDRESS_Msk (0x7UL << RADIO_TXADDRESS_TXADDRESS_Pos) /*!< Bit mask of TXADDRESS field. */ + +/* Register: RADIO_RXADDRESSES */ +/* Description: Receive address select. */ + +/* Bit 7 : Enable reception on logical address 7. Decision point: START task. */ +#define RADIO_RXADDRESSES_ADDR7_Pos (7UL) /*!< Position of ADDR7 field. */ +#define RADIO_RXADDRESSES_ADDR7_Msk (0x1UL << RADIO_RXADDRESSES_ADDR7_Pos) /*!< Bit mask of ADDR7 field. */ +#define RADIO_RXADDRESSES_ADDR7_Disabled (0UL) /*!< Reception disabled. */ +#define RADIO_RXADDRESSES_ADDR7_Enabled (1UL) /*!< Reception enabled. */ + +/* Bit 6 : Enable reception on logical address 6. Decision point: START task. */ +#define RADIO_RXADDRESSES_ADDR6_Pos (6UL) /*!< Position of ADDR6 field. */ +#define RADIO_RXADDRESSES_ADDR6_Msk (0x1UL << RADIO_RXADDRESSES_ADDR6_Pos) /*!< Bit mask of ADDR6 field. */ +#define RADIO_RXADDRESSES_ADDR6_Disabled (0UL) /*!< Reception disabled. */ +#define RADIO_RXADDRESSES_ADDR6_Enabled (1UL) /*!< Reception enabled. */ + +/* Bit 5 : Enable reception on logical address 5. Decision point: START task. */ +#define RADIO_RXADDRESSES_ADDR5_Pos (5UL) /*!< Position of ADDR5 field. */ +#define RADIO_RXADDRESSES_ADDR5_Msk (0x1UL << RADIO_RXADDRESSES_ADDR5_Pos) /*!< Bit mask of ADDR5 field. */ +#define RADIO_RXADDRESSES_ADDR5_Disabled (0UL) /*!< Reception disabled. */ +#define RADIO_RXADDRESSES_ADDR5_Enabled (1UL) /*!< Reception enabled. */ + +/* Bit 4 : Enable reception on logical address 4. Decision point: START task. */ +#define RADIO_RXADDRESSES_ADDR4_Pos (4UL) /*!< Position of ADDR4 field. */ +#define RADIO_RXADDRESSES_ADDR4_Msk (0x1UL << RADIO_RXADDRESSES_ADDR4_Pos) /*!< Bit mask of ADDR4 field. */ +#define RADIO_RXADDRESSES_ADDR4_Disabled (0UL) /*!< Reception disabled. */ +#define RADIO_RXADDRESSES_ADDR4_Enabled (1UL) /*!< Reception enabled. */ + +/* Bit 3 : Enable reception on logical address 3. Decision point: START task. */ +#define RADIO_RXADDRESSES_ADDR3_Pos (3UL) /*!< Position of ADDR3 field. */ +#define RADIO_RXADDRESSES_ADDR3_Msk (0x1UL << RADIO_RXADDRESSES_ADDR3_Pos) /*!< Bit mask of ADDR3 field. */ +#define RADIO_RXADDRESSES_ADDR3_Disabled (0UL) /*!< Reception disabled. */ +#define RADIO_RXADDRESSES_ADDR3_Enabled (1UL) /*!< Reception enabled. */ + +/* Bit 2 : Enable reception on logical address 2. Decision point: START task. */ +#define RADIO_RXADDRESSES_ADDR2_Pos (2UL) /*!< Position of ADDR2 field. */ +#define RADIO_RXADDRESSES_ADDR2_Msk (0x1UL << RADIO_RXADDRESSES_ADDR2_Pos) /*!< Bit mask of ADDR2 field. */ +#define RADIO_RXADDRESSES_ADDR2_Disabled (0UL) /*!< Reception disabled. */ +#define RADIO_RXADDRESSES_ADDR2_Enabled (1UL) /*!< Reception enabled. */ + +/* Bit 1 : Enable reception on logical address 1. Decision point: START task. */ +#define RADIO_RXADDRESSES_ADDR1_Pos (1UL) /*!< Position of ADDR1 field. */ +#define RADIO_RXADDRESSES_ADDR1_Msk (0x1UL << RADIO_RXADDRESSES_ADDR1_Pos) /*!< Bit mask of ADDR1 field. */ +#define RADIO_RXADDRESSES_ADDR1_Disabled (0UL) /*!< Reception disabled. */ +#define RADIO_RXADDRESSES_ADDR1_Enabled (1UL) /*!< Reception enabled. */ + +/* Bit 0 : Enable reception on logical address 0. Decision point: START task. */ +#define RADIO_RXADDRESSES_ADDR0_Pos (0UL) /*!< Position of ADDR0 field. */ +#define RADIO_RXADDRESSES_ADDR0_Msk (0x1UL << RADIO_RXADDRESSES_ADDR0_Pos) /*!< Bit mask of ADDR0 field. */ +#define RADIO_RXADDRESSES_ADDR0_Disabled (0UL) /*!< Reception disabled. */ +#define RADIO_RXADDRESSES_ADDR0_Enabled (1UL) /*!< Reception enabled. */ + +/* Register: RADIO_CRCCNF */ +/* Description: CRC configuration. */ + +/* Bit 8 : Leave packet address field out of the CRC calculation. Decision point: START task. */ +#define RADIO_CRCCNF_SKIPADDR_Pos (8UL) /*!< Position of SKIPADDR field. */ +#define RADIO_CRCCNF_SKIPADDR_Msk (0x1UL << RADIO_CRCCNF_SKIPADDR_Pos) /*!< Bit mask of SKIPADDR field. */ +#define RADIO_CRCCNF_SKIPADDR_Include (0UL) /*!< Include packet address in CRC calculation. */ +#define RADIO_CRCCNF_SKIPADDR_Skip (1UL) /*!< Packet address is skipped in CRC calculation. The CRC calculation will start at the first byte after the address. */ + +/* Bits 1..0 : CRC length. Decision point: START task. */ +#define RADIO_CRCCNF_LEN_Pos (0UL) /*!< Position of LEN field. */ +#define RADIO_CRCCNF_LEN_Msk (0x3UL << RADIO_CRCCNF_LEN_Pos) /*!< Bit mask of LEN field. */ +#define RADIO_CRCCNF_LEN_Disabled (0UL) /*!< CRC calculation disabled. */ +#define RADIO_CRCCNF_LEN_One (1UL) /*!< One byte long CRC. */ +#define RADIO_CRCCNF_LEN_Two (2UL) /*!< Two bytes long CRC. */ +#define RADIO_CRCCNF_LEN_Three (3UL) /*!< Three bytes long CRC. */ + +/* Register: RADIO_CRCPOLY */ +/* Description: CRC polynomial. */ + +/* Bits 23..0 : CRC polynomial. Decision point: START task. */ +#define RADIO_CRCPOLY_CRCPOLY_Pos (0UL) /*!< Position of CRCPOLY field. */ +#define RADIO_CRCPOLY_CRCPOLY_Msk (0xFFFFFFUL << RADIO_CRCPOLY_CRCPOLY_Pos) /*!< Bit mask of CRCPOLY field. */ + +/* Register: RADIO_CRCINIT */ +/* Description: CRC initial value. */ + +/* Bits 23..0 : Initial value for CRC calculation. Decision point: START task. */ +#define RADIO_CRCINIT_CRCINIT_Pos (0UL) /*!< Position of CRCINIT field. */ +#define RADIO_CRCINIT_CRCINIT_Msk (0xFFFFFFUL << RADIO_CRCINIT_CRCINIT_Pos) /*!< Bit mask of CRCINIT field. */ + +/* Register: RADIO_TEST */ +/* Description: Test features enable register. */ + +/* Bit 1 : PLL lock. Decision point: TXEN or RXEN task. */ +#define RADIO_TEST_PLLLOCK_Pos (1UL) /*!< Position of PLLLOCK field. */ +#define RADIO_TEST_PLLLOCK_Msk (0x1UL << RADIO_TEST_PLLLOCK_Pos) /*!< Bit mask of PLLLOCK field. */ +#define RADIO_TEST_PLLLOCK_Disabled (0UL) /*!< PLL lock disabled. */ +#define RADIO_TEST_PLLLOCK_Enabled (1UL) /*!< PLL lock enabled. */ + +/* Bit 0 : Constant carrier. Decision point: TXEN task. */ +#define RADIO_TEST_CONSTCARRIER_Pos (0UL) /*!< Position of CONSTCARRIER field. */ +#define RADIO_TEST_CONSTCARRIER_Msk (0x1UL << RADIO_TEST_CONSTCARRIER_Pos) /*!< Bit mask of CONSTCARRIER field. */ +#define RADIO_TEST_CONSTCARRIER_Disabled (0UL) /*!< Constant carrier disabled. */ +#define RADIO_TEST_CONSTCARRIER_Enabled (1UL) /*!< Constant carrier enabled. */ + +/* Register: RADIO_TIFS */ +/* Description: Inter Frame Spacing in microseconds. */ + +/* Bits 7..0 : Inter frame spacing in microseconds. Decision point: START rask */ +#define RADIO_TIFS_TIFS_Pos (0UL) /*!< Position of TIFS field. */ +#define RADIO_TIFS_TIFS_Msk (0xFFUL << RADIO_TIFS_TIFS_Pos) /*!< Bit mask of TIFS field. */ + +/* Register: RADIO_RSSISAMPLE */ +/* Description: RSSI sample. */ + +/* Bits 6..0 : RSSI sample result. The result is read as a positive value so that ReceivedSignalStrength = -RSSISAMPLE dBm */ +#define RADIO_RSSISAMPLE_RSSISAMPLE_Pos (0UL) /*!< Position of RSSISAMPLE field. */ +#define RADIO_RSSISAMPLE_RSSISAMPLE_Msk (0x7FUL << RADIO_RSSISAMPLE_RSSISAMPLE_Pos) /*!< Bit mask of RSSISAMPLE field. */ + +/* Register: RADIO_STATE */ +/* Description: Current radio state. */ + +/* Bits 3..0 : Current radio state. */ +#define RADIO_STATE_STATE_Pos (0UL) /*!< Position of STATE field. */ +#define RADIO_STATE_STATE_Msk (0xFUL << RADIO_STATE_STATE_Pos) /*!< Bit mask of STATE field. */ +#define RADIO_STATE_STATE_Disabled (0x00UL) /*!< Radio is in the Disabled state. */ +#define RADIO_STATE_STATE_RxRu (0x01UL) /*!< Radio is in the Rx Ramp Up state. */ +#define RADIO_STATE_STATE_RxIdle (0x02UL) /*!< Radio is in the Rx Idle state. */ +#define RADIO_STATE_STATE_Rx (0x03UL) /*!< Radio is in the Rx state. */ +#define RADIO_STATE_STATE_RxDisable (0x04UL) /*!< Radio is in the Rx Disable state. */ +#define RADIO_STATE_STATE_TxRu (0x09UL) /*!< Radio is in the Tx Ramp Up state. */ +#define RADIO_STATE_STATE_TxIdle (0x0AUL) /*!< Radio is in the Tx Idle state. */ +#define RADIO_STATE_STATE_Tx (0x0BUL) /*!< Radio is in the Tx state. */ +#define RADIO_STATE_STATE_TxDisable (0x0CUL) /*!< Radio is in the Tx Disable state. */ + +/* Register: RADIO_DATAWHITEIV */ +/* Description: Data whitening initial value. */ + +/* Bits 6..0 : Data whitening initial value. Bit 0 corresponds to Position 0 of the LSFR, Bit 1 to position 5... Decision point: TXEN or RXEN task. */ +#define RADIO_DATAWHITEIV_DATAWHITEIV_Pos (0UL) /*!< Position of DATAWHITEIV field. */ +#define RADIO_DATAWHITEIV_DATAWHITEIV_Msk (0x7FUL << RADIO_DATAWHITEIV_DATAWHITEIV_Pos) /*!< Bit mask of DATAWHITEIV field. */ + +/* Register: RADIO_DAP */ +/* Description: Device address prefix. */ + +/* Bits 15..0 : Device address prefix. */ +#define RADIO_DAP_DAP_Pos (0UL) /*!< Position of DAP field. */ +#define RADIO_DAP_DAP_Msk (0xFFFFUL << RADIO_DAP_DAP_Pos) /*!< Bit mask of DAP field. */ + +/* Register: RADIO_DACNF */ +/* Description: Device address match configuration. */ + +/* Bit 15 : TxAdd for device address 7. */ +#define RADIO_DACNF_TXADD7_Pos (15UL) /*!< Position of TXADD7 field. */ +#define RADIO_DACNF_TXADD7_Msk (0x1UL << RADIO_DACNF_TXADD7_Pos) /*!< Bit mask of TXADD7 field. */ + +/* Bit 14 : TxAdd for device address 6. */ +#define RADIO_DACNF_TXADD6_Pos (14UL) /*!< Position of TXADD6 field. */ +#define RADIO_DACNF_TXADD6_Msk (0x1UL << RADIO_DACNF_TXADD6_Pos) /*!< Bit mask of TXADD6 field. */ + +/* Bit 13 : TxAdd for device address 5. */ +#define RADIO_DACNF_TXADD5_Pos (13UL) /*!< Position of TXADD5 field. */ +#define RADIO_DACNF_TXADD5_Msk (0x1UL << RADIO_DACNF_TXADD5_Pos) /*!< Bit mask of TXADD5 field. */ + +/* Bit 12 : TxAdd for device address 4. */ +#define RADIO_DACNF_TXADD4_Pos (12UL) /*!< Position of TXADD4 field. */ +#define RADIO_DACNF_TXADD4_Msk (0x1UL << RADIO_DACNF_TXADD4_Pos) /*!< Bit mask of TXADD4 field. */ + +/* Bit 11 : TxAdd for device address 3. */ +#define RADIO_DACNF_TXADD3_Pos (11UL) /*!< Position of TXADD3 field. */ +#define RADIO_DACNF_TXADD3_Msk (0x1UL << RADIO_DACNF_TXADD3_Pos) /*!< Bit mask of TXADD3 field. */ + +/* Bit 10 : TxAdd for device address 2. */ +#define RADIO_DACNF_TXADD2_Pos (10UL) /*!< Position of TXADD2 field. */ +#define RADIO_DACNF_TXADD2_Msk (0x1UL << RADIO_DACNF_TXADD2_Pos) /*!< Bit mask of TXADD2 field. */ + +/* Bit 9 : TxAdd for device address 1. */ +#define RADIO_DACNF_TXADD1_Pos (9UL) /*!< Position of TXADD1 field. */ +#define RADIO_DACNF_TXADD1_Msk (0x1UL << RADIO_DACNF_TXADD1_Pos) /*!< Bit mask of TXADD1 field. */ + +/* Bit 8 : TxAdd for device address 0. */ +#define RADIO_DACNF_TXADD0_Pos (8UL) /*!< Position of TXADD0 field. */ +#define RADIO_DACNF_TXADD0_Msk (0x1UL << RADIO_DACNF_TXADD0_Pos) /*!< Bit mask of TXADD0 field. */ + +/* Bit 7 : Enable or disable device address matching using device address 7. */ +#define RADIO_DACNF_ENA7_Pos (7UL) /*!< Position of ENA7 field. */ +#define RADIO_DACNF_ENA7_Msk (0x1UL << RADIO_DACNF_ENA7_Pos) /*!< Bit mask of ENA7 field. */ +#define RADIO_DACNF_ENA7_Disabled (0UL) /*!< Disabled. */ +#define RADIO_DACNF_ENA7_Enabled (1UL) /*!< Enabled. */ + +/* Bit 6 : Enable or disable device address matching using device address 6. */ +#define RADIO_DACNF_ENA6_Pos (6UL) /*!< Position of ENA6 field. */ +#define RADIO_DACNF_ENA6_Msk (0x1UL << RADIO_DACNF_ENA6_Pos) /*!< Bit mask of ENA6 field. */ +#define RADIO_DACNF_ENA6_Disabled (0UL) /*!< Disabled. */ +#define RADIO_DACNF_ENA6_Enabled (1UL) /*!< Enabled. */ + +/* Bit 5 : Enable or disable device address matching using device address 5. */ +#define RADIO_DACNF_ENA5_Pos (5UL) /*!< Position of ENA5 field. */ +#define RADIO_DACNF_ENA5_Msk (0x1UL << RADIO_DACNF_ENA5_Pos) /*!< Bit mask of ENA5 field. */ +#define RADIO_DACNF_ENA5_Disabled (0UL) /*!< Disabled. */ +#define RADIO_DACNF_ENA5_Enabled (1UL) /*!< Enabled. */ + +/* Bit 4 : Enable or disable device address matching using device address 4. */ +#define RADIO_DACNF_ENA4_Pos (4UL) /*!< Position of ENA4 field. */ +#define RADIO_DACNF_ENA4_Msk (0x1UL << RADIO_DACNF_ENA4_Pos) /*!< Bit mask of ENA4 field. */ +#define RADIO_DACNF_ENA4_Disabled (0UL) /*!< Disabled. */ +#define RADIO_DACNF_ENA4_Enabled (1UL) /*!< Enabled. */ + +/* Bit 3 : Enable or disable device address matching using device address 3. */ +#define RADIO_DACNF_ENA3_Pos (3UL) /*!< Position of ENA3 field. */ +#define RADIO_DACNF_ENA3_Msk (0x1UL << RADIO_DACNF_ENA3_Pos) /*!< Bit mask of ENA3 field. */ +#define RADIO_DACNF_ENA3_Disabled (0UL) /*!< Disabled. */ +#define RADIO_DACNF_ENA3_Enabled (1UL) /*!< Enabled. */ + +/* Bit 2 : Enable or disable device address matching using device address 2. */ +#define RADIO_DACNF_ENA2_Pos (2UL) /*!< Position of ENA2 field. */ +#define RADIO_DACNF_ENA2_Msk (0x1UL << RADIO_DACNF_ENA2_Pos) /*!< Bit mask of ENA2 field. */ +#define RADIO_DACNF_ENA2_Disabled (0UL) /*!< Disabled. */ +#define RADIO_DACNF_ENA2_Enabled (1UL) /*!< Enabled. */ + +/* Bit 1 : Enable or disable device address matching using device address 1. */ +#define RADIO_DACNF_ENA1_Pos (1UL) /*!< Position of ENA1 field. */ +#define RADIO_DACNF_ENA1_Msk (0x1UL << RADIO_DACNF_ENA1_Pos) /*!< Bit mask of ENA1 field. */ +#define RADIO_DACNF_ENA1_Disabled (0UL) /*!< Disabled. */ +#define RADIO_DACNF_ENA1_Enabled (1UL) /*!< Enabled. */ + +/* Bit 0 : Enable or disable device address matching using device address 0. */ +#define RADIO_DACNF_ENA0_Pos (0UL) /*!< Position of ENA0 field. */ +#define RADIO_DACNF_ENA0_Msk (0x1UL << RADIO_DACNF_ENA0_Pos) /*!< Bit mask of ENA0 field. */ +#define RADIO_DACNF_ENA0_Disabled (0UL) /*!< Disabled. */ +#define RADIO_DACNF_ENA0_Enabled (1UL) /*!< Enabled. */ + +/* Register: RADIO_OVERRIDE0 */ +/* Description: Trim value override register 0. */ + +/* Bits 31..0 : Trim value override 0. */ +#define RADIO_OVERRIDE0_OVERRIDE0_Pos (0UL) /*!< Position of OVERRIDE0 field. */ +#define RADIO_OVERRIDE0_OVERRIDE0_Msk (0xFFFFFFFFUL << RADIO_OVERRIDE0_OVERRIDE0_Pos) /*!< Bit mask of OVERRIDE0 field. */ + +/* Register: RADIO_OVERRIDE1 */ +/* Description: Trim value override register 1. */ + +/* Bits 31..0 : Trim value override 1. */ +#define RADIO_OVERRIDE1_OVERRIDE1_Pos (0UL) /*!< Position of OVERRIDE1 field. */ +#define RADIO_OVERRIDE1_OVERRIDE1_Msk (0xFFFFFFFFUL << RADIO_OVERRIDE1_OVERRIDE1_Pos) /*!< Bit mask of OVERRIDE1 field. */ + +/* Register: RADIO_OVERRIDE2 */ +/* Description: Trim value override register 2. */ + +/* Bits 31..0 : Trim value override 2. */ +#define RADIO_OVERRIDE2_OVERRIDE2_Pos (0UL) /*!< Position of OVERRIDE2 field. */ +#define RADIO_OVERRIDE2_OVERRIDE2_Msk (0xFFFFFFFFUL << RADIO_OVERRIDE2_OVERRIDE2_Pos) /*!< Bit mask of OVERRIDE2 field. */ + +/* Register: RADIO_OVERRIDE3 */ +/* Description: Trim value override register 3. */ + +/* Bits 31..0 : Trim value override 3. */ +#define RADIO_OVERRIDE3_OVERRIDE3_Pos (0UL) /*!< Position of OVERRIDE3 field. */ +#define RADIO_OVERRIDE3_OVERRIDE3_Msk (0xFFFFFFFFUL << RADIO_OVERRIDE3_OVERRIDE3_Pos) /*!< Bit mask of OVERRIDE3 field. */ + +/* Register: RADIO_OVERRIDE4 */ +/* Description: Trim value override register 4. */ + +/* Bit 31 : Enable or disable override of default trim values. */ +#define RADIO_OVERRIDE4_ENABLE_Pos (31UL) /*!< Position of ENABLE field. */ +#define RADIO_OVERRIDE4_ENABLE_Msk (0x1UL << RADIO_OVERRIDE4_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define RADIO_OVERRIDE4_ENABLE_Disabled (0UL) /*!< Override trim values disabled. */ +#define RADIO_OVERRIDE4_ENABLE_Enabled (1UL) /*!< Override trim values enabled. */ + +/* Bits 27..0 : Trim value override 4. */ +#define RADIO_OVERRIDE4_OVERRIDE4_Pos (0UL) /*!< Position of OVERRIDE4 field. */ +#define RADIO_OVERRIDE4_OVERRIDE4_Msk (0xFFFFFFFUL << RADIO_OVERRIDE4_OVERRIDE4_Pos) /*!< Bit mask of OVERRIDE4 field. */ + +/* Register: RADIO_POWER */ +/* Description: Peripheral power control. */ + +/* Bit 0 : Peripheral power control. */ +#define RADIO_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ +#define RADIO_POWER_POWER_Msk (0x1UL << RADIO_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ +#define RADIO_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ +#define RADIO_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ + + +/* Peripheral: RNG */ +/* Description: Random Number Generator. */ + +/* Register: RNG_SHORTS */ +/* Description: Shortcuts for the RNG. */ + +/* Bit 0 : Shortcut between VALRDY event and STOP task. */ +#define RNG_SHORTS_VALRDY_STOP_Pos (0UL) /*!< Position of VALRDY_STOP field. */ +#define RNG_SHORTS_VALRDY_STOP_Msk (0x1UL << RNG_SHORTS_VALRDY_STOP_Pos) /*!< Bit mask of VALRDY_STOP field. */ +#define RNG_SHORTS_VALRDY_STOP_Disabled (0UL) /*!< Shortcut disabled. */ +#define RNG_SHORTS_VALRDY_STOP_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Register: RNG_INTENSET */ +/* Description: Interrupt enable set register */ + +/* Bit 0 : Enable interrupt on VALRDY event. */ +#define RNG_INTENSET_VALRDY_Pos (0UL) /*!< Position of VALRDY field. */ +#define RNG_INTENSET_VALRDY_Msk (0x1UL << RNG_INTENSET_VALRDY_Pos) /*!< Bit mask of VALRDY field. */ +#define RNG_INTENSET_VALRDY_Disabled (0UL) /*!< Interrupt disabled. */ +#define RNG_INTENSET_VALRDY_Enabled (1UL) /*!< Interrupt enabled. */ +#define RNG_INTENSET_VALRDY_Set (1UL) /*!< Enable interrupt on write. */ + +/* Register: RNG_INTENCLR */ +/* Description: Interrupt enable clear register */ + +/* Bit 0 : Disable interrupt on VALRDY event. */ +#define RNG_INTENCLR_VALRDY_Pos (0UL) /*!< Position of VALRDY field. */ +#define RNG_INTENCLR_VALRDY_Msk (0x1UL << RNG_INTENCLR_VALRDY_Pos) /*!< Bit mask of VALRDY field. */ +#define RNG_INTENCLR_VALRDY_Disabled (0UL) /*!< Interrupt disabled. */ +#define RNG_INTENCLR_VALRDY_Enabled (1UL) /*!< Interrupt enabled. */ +#define RNG_INTENCLR_VALRDY_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Register: RNG_CONFIG */ +/* Description: Configuration register. */ + +/* Bit 0 : Digital error correction enable. */ +#define RNG_CONFIG_DERCEN_Pos (0UL) /*!< Position of DERCEN field. */ +#define RNG_CONFIG_DERCEN_Msk (0x1UL << RNG_CONFIG_DERCEN_Pos) /*!< Bit mask of DERCEN field. */ +#define RNG_CONFIG_DERCEN_Disabled (0UL) /*!< Digital error correction disabled. */ +#define RNG_CONFIG_DERCEN_Enabled (1UL) /*!< Digital error correction enabled. */ + +/* Register: RNG_VALUE */ +/* Description: RNG random number. */ + +/* Bits 7..0 : Generated random number. */ +#define RNG_VALUE_VALUE_Pos (0UL) /*!< Position of VALUE field. */ +#define RNG_VALUE_VALUE_Msk (0xFFUL << RNG_VALUE_VALUE_Pos) /*!< Bit mask of VALUE field. */ + +/* Register: RNG_POWER */ +/* Description: Peripheral power control. */ + +/* Bit 0 : Peripheral power control. */ +#define RNG_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ +#define RNG_POWER_POWER_Msk (0x1UL << RNG_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ +#define RNG_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ +#define RNG_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ + + +/* Peripheral: RTC */ +/* Description: Real time counter 0. */ + +/* Register: RTC_INTENSET */ +/* Description: Interrupt enable set register. */ + +/* Bit 19 : Enable interrupt on COMPARE[3] event. */ +#define RTC_INTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define RTC_INTENSET_COMPARE3_Msk (0x1UL << RTC_INTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define RTC_INTENSET_COMPARE3_Disabled (0UL) /*!< Interrupt disabled. */ +#define RTC_INTENSET_COMPARE3_Enabled (1UL) /*!< Interrupt enabled. */ +#define RTC_INTENSET_COMPARE3_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 18 : Enable interrupt on COMPARE[2] event. */ +#define RTC_INTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define RTC_INTENSET_COMPARE2_Msk (0x1UL << RTC_INTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define RTC_INTENSET_COMPARE2_Disabled (0UL) /*!< Interrupt disabled. */ +#define RTC_INTENSET_COMPARE2_Enabled (1UL) /*!< Interrupt enabled. */ +#define RTC_INTENSET_COMPARE2_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 17 : Enable interrupt on COMPARE[1] event. */ +#define RTC_INTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define RTC_INTENSET_COMPARE1_Msk (0x1UL << RTC_INTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define RTC_INTENSET_COMPARE1_Disabled (0UL) /*!< Interrupt disabled. */ +#define RTC_INTENSET_COMPARE1_Enabled (1UL) /*!< Interrupt enabled. */ +#define RTC_INTENSET_COMPARE1_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 16 : Enable interrupt on COMPARE[0] event. */ +#define RTC_INTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define RTC_INTENSET_COMPARE0_Msk (0x1UL << RTC_INTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define RTC_INTENSET_COMPARE0_Disabled (0UL) /*!< Interrupt disabled. */ +#define RTC_INTENSET_COMPARE0_Enabled (1UL) /*!< Interrupt enabled. */ +#define RTC_INTENSET_COMPARE0_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 1 : Enable interrupt on OVRFLW event. */ +#define RTC_INTENSET_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ +#define RTC_INTENSET_OVRFLW_Msk (0x1UL << RTC_INTENSET_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ +#define RTC_INTENSET_OVRFLW_Disabled (0UL) /*!< Interrupt disabled. */ +#define RTC_INTENSET_OVRFLW_Enabled (1UL) /*!< Interrupt enabled. */ +#define RTC_INTENSET_OVRFLW_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 0 : Enable interrupt on TICK event. */ +#define RTC_INTENSET_TICK_Pos (0UL) /*!< Position of TICK field. */ +#define RTC_INTENSET_TICK_Msk (0x1UL << RTC_INTENSET_TICK_Pos) /*!< Bit mask of TICK field. */ +#define RTC_INTENSET_TICK_Disabled (0UL) /*!< Interrupt disabled. */ +#define RTC_INTENSET_TICK_Enabled (1UL) /*!< Interrupt enabled. */ +#define RTC_INTENSET_TICK_Set (1UL) /*!< Enable interrupt on write. */ + +/* Register: RTC_INTENCLR */ +/* Description: Interrupt enable clear register. */ + +/* Bit 19 : Disable interrupt on COMPARE[3] event. */ +#define RTC_INTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define RTC_INTENCLR_COMPARE3_Msk (0x1UL << RTC_INTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define RTC_INTENCLR_COMPARE3_Disabled (0UL) /*!< Interrupt disabled. */ +#define RTC_INTENCLR_COMPARE3_Enabled (1UL) /*!< Interrupt enabled. */ +#define RTC_INTENCLR_COMPARE3_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 18 : Disable interrupt on COMPARE[2] event. */ +#define RTC_INTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define RTC_INTENCLR_COMPARE2_Msk (0x1UL << RTC_INTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define RTC_INTENCLR_COMPARE2_Disabled (0UL) /*!< Interrupt disabled. */ +#define RTC_INTENCLR_COMPARE2_Enabled (1UL) /*!< Interrupt enabled. */ +#define RTC_INTENCLR_COMPARE2_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 17 : Disable interrupt on COMPARE[1] event. */ +#define RTC_INTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define RTC_INTENCLR_COMPARE1_Msk (0x1UL << RTC_INTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define RTC_INTENCLR_COMPARE1_Disabled (0UL) /*!< Interrupt disabled. */ +#define RTC_INTENCLR_COMPARE1_Enabled (1UL) /*!< Interrupt enabled. */ +#define RTC_INTENCLR_COMPARE1_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 16 : Disable interrupt on COMPARE[0] event. */ +#define RTC_INTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define RTC_INTENCLR_COMPARE0_Msk (0x1UL << RTC_INTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define RTC_INTENCLR_COMPARE0_Disabled (0UL) /*!< Interrupt disabled. */ +#define RTC_INTENCLR_COMPARE0_Enabled (1UL) /*!< Interrupt enabled. */ +#define RTC_INTENCLR_COMPARE0_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 1 : Disable interrupt on OVRFLW event. */ +#define RTC_INTENCLR_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ +#define RTC_INTENCLR_OVRFLW_Msk (0x1UL << RTC_INTENCLR_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ +#define RTC_INTENCLR_OVRFLW_Disabled (0UL) /*!< Interrupt disabled. */ +#define RTC_INTENCLR_OVRFLW_Enabled (1UL) /*!< Interrupt enabled. */ +#define RTC_INTENCLR_OVRFLW_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 0 : Disable interrupt on TICK event. */ +#define RTC_INTENCLR_TICK_Pos (0UL) /*!< Position of TICK field. */ +#define RTC_INTENCLR_TICK_Msk (0x1UL << RTC_INTENCLR_TICK_Pos) /*!< Bit mask of TICK field. */ +#define RTC_INTENCLR_TICK_Disabled (0UL) /*!< Interrupt disabled. */ +#define RTC_INTENCLR_TICK_Enabled (1UL) /*!< Interrupt enabled. */ +#define RTC_INTENCLR_TICK_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Register: RTC_EVTEN */ +/* Description: Configures event enable routing to PPI for each RTC event. */ + +/* Bit 19 : COMPARE[3] event enable. */ +#define RTC_EVTEN_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define RTC_EVTEN_COMPARE3_Msk (0x1UL << RTC_EVTEN_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define RTC_EVTEN_COMPARE3_Disabled (0UL) /*!< Event disabled. */ +#define RTC_EVTEN_COMPARE3_Enabled (1UL) /*!< Event enabled. */ + +/* Bit 18 : COMPARE[2] event enable. */ +#define RTC_EVTEN_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define RTC_EVTEN_COMPARE2_Msk (0x1UL << RTC_EVTEN_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define RTC_EVTEN_COMPARE2_Disabled (0UL) /*!< Event disabled. */ +#define RTC_EVTEN_COMPARE2_Enabled (1UL) /*!< Event enabled. */ + +/* Bit 17 : COMPARE[1] event enable. */ +#define RTC_EVTEN_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define RTC_EVTEN_COMPARE1_Msk (0x1UL << RTC_EVTEN_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define RTC_EVTEN_COMPARE1_Disabled (0UL) /*!< Event disabled. */ +#define RTC_EVTEN_COMPARE1_Enabled (1UL) /*!< Event enabled. */ + +/* Bit 16 : COMPARE[0] event enable. */ +#define RTC_EVTEN_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define RTC_EVTEN_COMPARE0_Msk (0x1UL << RTC_EVTEN_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define RTC_EVTEN_COMPARE0_Disabled (0UL) /*!< Event disabled. */ +#define RTC_EVTEN_COMPARE0_Enabled (1UL) /*!< Event enabled. */ + +/* Bit 1 : OVRFLW event enable. */ +#define RTC_EVTEN_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ +#define RTC_EVTEN_OVRFLW_Msk (0x1UL << RTC_EVTEN_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ +#define RTC_EVTEN_OVRFLW_Disabled (0UL) /*!< Event disabled. */ +#define RTC_EVTEN_OVRFLW_Enabled (1UL) /*!< Event enabled. */ + +/* Bit 0 : TICK event enable. */ +#define RTC_EVTEN_TICK_Pos (0UL) /*!< Position of TICK field. */ +#define RTC_EVTEN_TICK_Msk (0x1UL << RTC_EVTEN_TICK_Pos) /*!< Bit mask of TICK field. */ +#define RTC_EVTEN_TICK_Disabled (0UL) /*!< Event disabled. */ +#define RTC_EVTEN_TICK_Enabled (1UL) /*!< Event enabled. */ + +/* Register: RTC_EVTENSET */ +/* Description: Enable events routing to PPI. The reading of this register gives the value of EVTEN. */ + +/* Bit 19 : Enable routing to PPI of COMPARE[3] event. */ +#define RTC_EVTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define RTC_EVTENSET_COMPARE3_Msk (0x1UL << RTC_EVTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define RTC_EVTENSET_COMPARE3_Disabled (0UL) /*!< Event disabled. */ +#define RTC_EVTENSET_COMPARE3_Enabled (1UL) /*!< Event enabled. */ +#define RTC_EVTENSET_COMPARE3_Set (1UL) /*!< Enable event on write. */ + +/* Bit 18 : Enable routing to PPI of COMPARE[2] event. */ +#define RTC_EVTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define RTC_EVTENSET_COMPARE2_Msk (0x1UL << RTC_EVTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define RTC_EVTENSET_COMPARE2_Disabled (0UL) /*!< Event disabled. */ +#define RTC_EVTENSET_COMPARE2_Enabled (1UL) /*!< Event enabled. */ +#define RTC_EVTENSET_COMPARE2_Set (1UL) /*!< Enable event on write. */ + +/* Bit 17 : Enable routing to PPI of COMPARE[1] event. */ +#define RTC_EVTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define RTC_EVTENSET_COMPARE1_Msk (0x1UL << RTC_EVTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define RTC_EVTENSET_COMPARE1_Disabled (0UL) /*!< Event disabled. */ +#define RTC_EVTENSET_COMPARE1_Enabled (1UL) /*!< Event enabled. */ +#define RTC_EVTENSET_COMPARE1_Set (1UL) /*!< Enable event on write. */ + +/* Bit 16 : Enable routing to PPI of COMPARE[0] event. */ +#define RTC_EVTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define RTC_EVTENSET_COMPARE0_Msk (0x1UL << RTC_EVTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define RTC_EVTENSET_COMPARE0_Disabled (0UL) /*!< Event disabled. */ +#define RTC_EVTENSET_COMPARE0_Enabled (1UL) /*!< Event enabled. */ +#define RTC_EVTENSET_COMPARE0_Set (1UL) /*!< Enable event on write. */ + +/* Bit 1 : Enable routing to PPI of OVRFLW event. */ +#define RTC_EVTENSET_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ +#define RTC_EVTENSET_OVRFLW_Msk (0x1UL << RTC_EVTENSET_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ +#define RTC_EVTENSET_OVRFLW_Disabled (0UL) /*!< Event disabled. */ +#define RTC_EVTENSET_OVRFLW_Enabled (1UL) /*!< Event enabled. */ +#define RTC_EVTENSET_OVRFLW_Set (1UL) /*!< Enable event on write. */ + +/* Bit 0 : Enable routing to PPI of TICK event. */ +#define RTC_EVTENSET_TICK_Pos (0UL) /*!< Position of TICK field. */ +#define RTC_EVTENSET_TICK_Msk (0x1UL << RTC_EVTENSET_TICK_Pos) /*!< Bit mask of TICK field. */ +#define RTC_EVTENSET_TICK_Disabled (0UL) /*!< Event disabled. */ +#define RTC_EVTENSET_TICK_Enabled (1UL) /*!< Event enabled. */ +#define RTC_EVTENSET_TICK_Set (1UL) /*!< Enable event on write. */ + +/* Register: RTC_EVTENCLR */ +/* Description: Disable events routing to PPI. The reading of this register gives the value of EVTEN. */ + +/* Bit 19 : Disable routing to PPI of COMPARE[3] event. */ +#define RTC_EVTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define RTC_EVTENCLR_COMPARE3_Msk (0x1UL << RTC_EVTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define RTC_EVTENCLR_COMPARE3_Disabled (0UL) /*!< Event disabled. */ +#define RTC_EVTENCLR_COMPARE3_Enabled (1UL) /*!< Event enabled. */ +#define RTC_EVTENCLR_COMPARE3_Clear (1UL) /*!< Disable event on write. */ + +/* Bit 18 : Disable routing to PPI of COMPARE[2] event. */ +#define RTC_EVTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define RTC_EVTENCLR_COMPARE2_Msk (0x1UL << RTC_EVTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define RTC_EVTENCLR_COMPARE2_Disabled (0UL) /*!< Event disabled. */ +#define RTC_EVTENCLR_COMPARE2_Enabled (1UL) /*!< Event enabled. */ +#define RTC_EVTENCLR_COMPARE2_Clear (1UL) /*!< Disable event on write. */ + +/* Bit 17 : Disable routing to PPI of COMPARE[1] event. */ +#define RTC_EVTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define RTC_EVTENCLR_COMPARE1_Msk (0x1UL << RTC_EVTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define RTC_EVTENCLR_COMPARE1_Disabled (0UL) /*!< Event disabled. */ +#define RTC_EVTENCLR_COMPARE1_Enabled (1UL) /*!< Event enabled. */ +#define RTC_EVTENCLR_COMPARE1_Clear (1UL) /*!< Disable event on write. */ + +/* Bit 16 : Disable routing to PPI of COMPARE[0] event. */ +#define RTC_EVTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define RTC_EVTENCLR_COMPARE0_Msk (0x1UL << RTC_EVTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define RTC_EVTENCLR_COMPARE0_Disabled (0UL) /*!< Event disabled. */ +#define RTC_EVTENCLR_COMPARE0_Enabled (1UL) /*!< Event enabled. */ +#define RTC_EVTENCLR_COMPARE0_Clear (1UL) /*!< Disable event on write. */ + +/* Bit 1 : Disable routing to PPI of OVRFLW event. */ +#define RTC_EVTENCLR_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ +#define RTC_EVTENCLR_OVRFLW_Msk (0x1UL << RTC_EVTENCLR_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ +#define RTC_EVTENCLR_OVRFLW_Disabled (0UL) /*!< Event disabled. */ +#define RTC_EVTENCLR_OVRFLW_Enabled (1UL) /*!< Event enabled. */ +#define RTC_EVTENCLR_OVRFLW_Clear (1UL) /*!< Disable event on write. */ + +/* Bit 0 : Disable routing to PPI of TICK event. */ +#define RTC_EVTENCLR_TICK_Pos (0UL) /*!< Position of TICK field. */ +#define RTC_EVTENCLR_TICK_Msk (0x1UL << RTC_EVTENCLR_TICK_Pos) /*!< Bit mask of TICK field. */ +#define RTC_EVTENCLR_TICK_Disabled (0UL) /*!< Event disabled. */ +#define RTC_EVTENCLR_TICK_Enabled (1UL) /*!< Event enabled. */ +#define RTC_EVTENCLR_TICK_Clear (1UL) /*!< Disable event on write. */ + +/* Register: RTC_COUNTER */ +/* Description: Current COUNTER value. */ + +/* Bits 23..0 : Counter value. */ +#define RTC_COUNTER_COUNTER_Pos (0UL) /*!< Position of COUNTER field. */ +#define RTC_COUNTER_COUNTER_Msk (0xFFFFFFUL << RTC_COUNTER_COUNTER_Pos) /*!< Bit mask of COUNTER field. */ + +/* Register: RTC_PRESCALER */ +/* Description: 12-bit prescaler for COUNTER frequency (32768/(PRESCALER+1)). Must be written when RTC is STOPed. */ + +/* Bits 11..0 : RTC PRESCALER value. */ +#define RTC_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */ +#define RTC_PRESCALER_PRESCALER_Msk (0xFFFUL << RTC_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */ + +/* Register: RTC_CC */ +/* Description: Capture/compare registers. */ + +/* Bits 23..0 : Compare value. */ +#define RTC_CC_COMPARE_Pos (0UL) /*!< Position of COMPARE field. */ +#define RTC_CC_COMPARE_Msk (0xFFFFFFUL << RTC_CC_COMPARE_Pos) /*!< Bit mask of COMPARE field. */ + +/* Register: RTC_POWER */ +/* Description: Peripheral power control. */ + +/* Bit 0 : Peripheral power control. */ +#define RTC_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ +#define RTC_POWER_POWER_Msk (0x1UL << RTC_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ +#define RTC_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ +#define RTC_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ + + +/* Peripheral: SPI */ +/* Description: SPI master 0. */ + +/* Register: SPI_INTENSET */ +/* Description: Interrupt enable set register. */ + +/* Bit 2 : Enable interrupt on READY event. */ +#define SPI_INTENSET_READY_Pos (2UL) /*!< Position of READY field. */ +#define SPI_INTENSET_READY_Msk (0x1UL << SPI_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ +#define SPI_INTENSET_READY_Disabled (0UL) /*!< Interrupt disabled. */ +#define SPI_INTENSET_READY_Enabled (1UL) /*!< Interrupt enabled. */ +#define SPI_INTENSET_READY_Set (1UL) /*!< Enable interrupt on write. */ + +/* Register: SPI_INTENCLR */ +/* Description: Interrupt enable clear register. */ + +/* Bit 2 : Disable interrupt on READY event. */ +#define SPI_INTENCLR_READY_Pos (2UL) /*!< Position of READY field. */ +#define SPI_INTENCLR_READY_Msk (0x1UL << SPI_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ +#define SPI_INTENCLR_READY_Disabled (0UL) /*!< Interrupt disabled. */ +#define SPI_INTENCLR_READY_Enabled (1UL) /*!< Interrupt enabled. */ +#define SPI_INTENCLR_READY_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Register: SPI_ENABLE */ +/* Description: Enable SPI. */ + +/* Bits 2..0 : Enable or disable SPI. */ +#define SPI_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define SPI_ENABLE_ENABLE_Msk (0x7UL << SPI_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define SPI_ENABLE_ENABLE_Disabled (0x00UL) /*!< Disabled SPI. */ +#define SPI_ENABLE_ENABLE_Enabled (0x01UL) /*!< Enable SPI. */ + +/* Register: SPI_RXD */ +/* Description: RX data. */ + +/* Bits 7..0 : RX data from last transfer. */ +#define SPI_RXD_RXD_Pos (0UL) /*!< Position of RXD field. */ +#define SPI_RXD_RXD_Msk (0xFFUL << SPI_RXD_RXD_Pos) /*!< Bit mask of RXD field. */ + +/* Register: SPI_TXD */ +/* Description: TX data. */ + +/* Bits 7..0 : TX data for next transfer. */ +#define SPI_TXD_TXD_Pos (0UL) /*!< Position of TXD field. */ +#define SPI_TXD_TXD_Msk (0xFFUL << SPI_TXD_TXD_Pos) /*!< Bit mask of TXD field. */ + +/* Register: SPI_FREQUENCY */ +/* Description: SPI frequency */ + +/* Bits 31..0 : SPI data rate. */ +#define SPI_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ +#define SPI_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << SPI_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ +#define SPI_FREQUENCY_FREQUENCY_K125 (0x02000000UL) /*!< 125kbps. */ +#define SPI_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250kbps. */ +#define SPI_FREQUENCY_FREQUENCY_K500 (0x08000000UL) /*!< 500kbps. */ +#define SPI_FREQUENCY_FREQUENCY_M1 (0x10000000UL) /*!< 1Mbps. */ +#define SPI_FREQUENCY_FREQUENCY_M2 (0x20000000UL) /*!< 2Mbps. */ +#define SPI_FREQUENCY_FREQUENCY_M4 (0x40000000UL) /*!< 4Mbps. */ +#define SPI_FREQUENCY_FREQUENCY_M8 (0x80000000UL) /*!< 8Mbps. */ + +/* Register: SPI_CONFIG */ +/* Description: Configuration register. */ + +/* Bit 2 : Serial clock (SCK) polarity. */ +#define SPI_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */ +#define SPI_CONFIG_CPOL_Msk (0x1UL << SPI_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */ +#define SPI_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high. */ +#define SPI_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low. */ + +/* Bit 1 : Serial clock (SCK) phase. */ +#define SPI_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */ +#define SPI_CONFIG_CPHA_Msk (0x1UL << SPI_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */ +#define SPI_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of the clock. Shift serial data on trailing edge. */ +#define SPI_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of the clock. Shift serial data on leading edge. */ + +/* Bit 0 : Bit order. */ +#define SPI_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */ +#define SPI_CONFIG_ORDER_Msk (0x1UL << SPI_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */ +#define SPI_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit transmitted out first. */ +#define SPI_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit transmitted out first. */ + +/* Register: SPI_POWER */ +/* Description: Peripheral power control. */ + +/* Bit 0 : Peripheral power control. */ +#define SPI_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ +#define SPI_POWER_POWER_Msk (0x1UL << SPI_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ +#define SPI_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ +#define SPI_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ + + +/* Peripheral: SPIS */ +/* Description: SPI slave 1. */ + +/* Register: SPIS_SHORTS */ +/* Description: Shortcuts for SPIS. */ + +/* Bit 2 : Shortcut between END event and the ACQUIRE task. */ +#define SPIS_SHORTS_END_ACQUIRE_Pos (2UL) /*!< Position of END_ACQUIRE field. */ +#define SPIS_SHORTS_END_ACQUIRE_Msk (0x1UL << SPIS_SHORTS_END_ACQUIRE_Pos) /*!< Bit mask of END_ACQUIRE field. */ +#define SPIS_SHORTS_END_ACQUIRE_Disabled (0UL) /*!< Shortcut disabled. */ +#define SPIS_SHORTS_END_ACQUIRE_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Register: SPIS_INTENSET */ +/* Description: Interrupt enable set register. */ + +/* Bit 10 : Enable interrupt on ACQUIRED event. */ +#define SPIS_INTENSET_ACQUIRED_Pos (10UL) /*!< Position of ACQUIRED field. */ +#define SPIS_INTENSET_ACQUIRED_Msk (0x1UL << SPIS_INTENSET_ACQUIRED_Pos) /*!< Bit mask of ACQUIRED field. */ +#define SPIS_INTENSET_ACQUIRED_Disabled (0UL) /*!< Interrupt disabled. */ +#define SPIS_INTENSET_ACQUIRED_Enabled (1UL) /*!< Interrupt enabled. */ +#define SPIS_INTENSET_ACQUIRED_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 4 : enable interrupt on ENDRX event. */ +#define SPIS_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ +#define SPIS_INTENSET_ENDRX_Msk (0x1UL << SPIS_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define SPIS_INTENSET_ENDRX_Disabled (0UL) /*!< Interrupt disabled. */ +#define SPIS_INTENSET_ENDRX_Enabled (1UL) /*!< Interrupt enabled. */ +#define SPIS_INTENSET_ENDRX_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 1 : Enable interrupt on END event. */ +#define SPIS_INTENSET_END_Pos (1UL) /*!< Position of END field. */ +#define SPIS_INTENSET_END_Msk (0x1UL << SPIS_INTENSET_END_Pos) /*!< Bit mask of END field. */ +#define SPIS_INTENSET_END_Disabled (0UL) /*!< Interrupt disabled. */ +#define SPIS_INTENSET_END_Enabled (1UL) /*!< Interrupt enabled. */ +#define SPIS_INTENSET_END_Set (1UL) /*!< Enable interrupt on write. */ + +/* Register: SPIS_INTENCLR */ +/* Description: Interrupt enable clear register. */ + +/* Bit 10 : Disable interrupt on ACQUIRED event. */ +#define SPIS_INTENCLR_ACQUIRED_Pos (10UL) /*!< Position of ACQUIRED field. */ +#define SPIS_INTENCLR_ACQUIRED_Msk (0x1UL << SPIS_INTENCLR_ACQUIRED_Pos) /*!< Bit mask of ACQUIRED field. */ +#define SPIS_INTENCLR_ACQUIRED_Disabled (0UL) /*!< Interrupt disabled. */ +#define SPIS_INTENCLR_ACQUIRED_Enabled (1UL) /*!< Interrupt enabled. */ +#define SPIS_INTENCLR_ACQUIRED_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 4 : Disable interrupt on ENDRX event. */ +#define SPIS_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ +#define SPIS_INTENCLR_ENDRX_Msk (0x1UL << SPIS_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define SPIS_INTENCLR_ENDRX_Disabled (0UL) /*!< Interrupt disabled. */ +#define SPIS_INTENCLR_ENDRX_Enabled (1UL) /*!< Interrupt enabled. */ +#define SPIS_INTENCLR_ENDRX_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 1 : Disable interrupt on END event. */ +#define SPIS_INTENCLR_END_Pos (1UL) /*!< Position of END field. */ +#define SPIS_INTENCLR_END_Msk (0x1UL << SPIS_INTENCLR_END_Pos) /*!< Bit mask of END field. */ +#define SPIS_INTENCLR_END_Disabled (0UL) /*!< Interrupt disabled. */ +#define SPIS_INTENCLR_END_Enabled (1UL) /*!< Interrupt enabled. */ +#define SPIS_INTENCLR_END_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Register: SPIS_SEMSTAT */ +/* Description: Semaphore status. */ + +/* Bits 1..0 : Semaphore status. */ +#define SPIS_SEMSTAT_SEMSTAT_Pos (0UL) /*!< Position of SEMSTAT field. */ +#define SPIS_SEMSTAT_SEMSTAT_Msk (0x3UL << SPIS_SEMSTAT_SEMSTAT_Pos) /*!< Bit mask of SEMSTAT field. */ +#define SPIS_SEMSTAT_SEMSTAT_Free (0x00UL) /*!< Semaphore is free. */ +#define SPIS_SEMSTAT_SEMSTAT_CPU (0x01UL) /*!< Semaphore is assigned to the CPU. */ +#define SPIS_SEMSTAT_SEMSTAT_SPIS (0x02UL) /*!< Semaphore is assigned to the SPIS. */ +#define SPIS_SEMSTAT_SEMSTAT_CPUPending (0x03UL) /*!< Semaphore is assigned to the SPIS, but a handover to the CPU is pending. */ + +/* Register: SPIS_STATUS */ +/* Description: Status from last transaction. */ + +/* Bit 1 : RX buffer overflow detected, and prevented. */ +#define SPIS_STATUS_OVERFLOW_Pos (1UL) /*!< Position of OVERFLOW field. */ +#define SPIS_STATUS_OVERFLOW_Msk (0x1UL << SPIS_STATUS_OVERFLOW_Pos) /*!< Bit mask of OVERFLOW field. */ +#define SPIS_STATUS_OVERFLOW_NotPresent (0UL) /*!< Error not present. */ +#define SPIS_STATUS_OVERFLOW_Present (1UL) /*!< Error present. */ +#define SPIS_STATUS_OVERFLOW_Clear (1UL) /*!< Clear on write. */ + +/* Bit 0 : TX buffer overread detected, and prevented. */ +#define SPIS_STATUS_OVERREAD_Pos (0UL) /*!< Position of OVERREAD field. */ +#define SPIS_STATUS_OVERREAD_Msk (0x1UL << SPIS_STATUS_OVERREAD_Pos) /*!< Bit mask of OVERREAD field. */ +#define SPIS_STATUS_OVERREAD_NotPresent (0UL) /*!< Error not present. */ +#define SPIS_STATUS_OVERREAD_Present (1UL) /*!< Error present. */ +#define SPIS_STATUS_OVERREAD_Clear (1UL) /*!< Clear on write. */ + +/* Register: SPIS_ENABLE */ +/* Description: Enable SPIS. */ + +/* Bits 2..0 : Enable or disable SPIS. */ +#define SPIS_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define SPIS_ENABLE_ENABLE_Msk (0x7UL << SPIS_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define SPIS_ENABLE_ENABLE_Disabled (0x00UL) /*!< Disabled SPIS. */ +#define SPIS_ENABLE_ENABLE_Enabled (0x02UL) /*!< Enable SPIS. */ + +/* Register: SPIS_MAXRX */ +/* Description: Maximum number of bytes in the receive buffer. */ + +/* Bits 7..0 : Maximum number of bytes in the receive buffer. */ +#define SPIS_MAXRX_MAXRX_Pos (0UL) /*!< Position of MAXRX field. */ +#define SPIS_MAXRX_MAXRX_Msk (0xFFUL << SPIS_MAXRX_MAXRX_Pos) /*!< Bit mask of MAXRX field. */ + +/* Register: SPIS_AMOUNTRX */ +/* Description: Number of bytes received in last granted transaction. */ + +/* Bits 7..0 : Number of bytes received in last granted transaction. */ +#define SPIS_AMOUNTRX_AMOUNTRX_Pos (0UL) /*!< Position of AMOUNTRX field. */ +#define SPIS_AMOUNTRX_AMOUNTRX_Msk (0xFFUL << SPIS_AMOUNTRX_AMOUNTRX_Pos) /*!< Bit mask of AMOUNTRX field. */ + +/* Register: SPIS_MAXTX */ +/* Description: Maximum number of bytes in the transmit buffer. */ + +/* Bits 7..0 : Maximum number of bytes in the transmit buffer. */ +#define SPIS_MAXTX_MAXTX_Pos (0UL) /*!< Position of MAXTX field. */ +#define SPIS_MAXTX_MAXTX_Msk (0xFFUL << SPIS_MAXTX_MAXTX_Pos) /*!< Bit mask of MAXTX field. */ + +/* Register: SPIS_AMOUNTTX */ +/* Description: Number of bytes transmitted in last granted transaction. */ + +/* Bits 7..0 : Number of bytes transmitted in last granted transaction. */ +#define SPIS_AMOUNTTX_AMOUNTTX_Pos (0UL) /*!< Position of AMOUNTTX field. */ +#define SPIS_AMOUNTTX_AMOUNTTX_Msk (0xFFUL << SPIS_AMOUNTTX_AMOUNTTX_Pos) /*!< Bit mask of AMOUNTTX field. */ + +/* Register: SPIS_CONFIG */ +/* Description: Configuration register. */ + +/* Bit 2 : Serial clock (SCK) polarity. */ +#define SPIS_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */ +#define SPIS_CONFIG_CPOL_Msk (0x1UL << SPIS_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */ +#define SPIS_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high. */ +#define SPIS_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low. */ + +/* Bit 1 : Serial clock (SCK) phase. */ +#define SPIS_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */ +#define SPIS_CONFIG_CPHA_Msk (0x1UL << SPIS_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */ +#define SPIS_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of the clock. Shift serial data on trailing edge. */ +#define SPIS_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of the clock. Shift serial data on leading edge. */ + +/* Bit 0 : Bit order. */ +#define SPIS_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */ +#define SPIS_CONFIG_ORDER_Msk (0x1UL << SPIS_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */ +#define SPIS_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit transmitted out first. */ +#define SPIS_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit transmitted out first. */ + +/* Register: SPIS_DEF */ +/* Description: Default character. */ + +/* Bits 7..0 : Default character. */ +#define SPIS_DEF_DEF_Pos (0UL) /*!< Position of DEF field. */ +#define SPIS_DEF_DEF_Msk (0xFFUL << SPIS_DEF_DEF_Pos) /*!< Bit mask of DEF field. */ + +/* Register: SPIS_ORC */ +/* Description: Over-read character. */ + +/* Bits 7..0 : Over-read character. */ +#define SPIS_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */ +#define SPIS_ORC_ORC_Msk (0xFFUL << SPIS_ORC_ORC_Pos) /*!< Bit mask of ORC field. */ + +/* Register: SPIS_POWER */ +/* Description: Peripheral power control. */ + +/* Bit 0 : Peripheral power control. */ +#define SPIS_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ +#define SPIS_POWER_POWER_Msk (0x1UL << SPIS_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ +#define SPIS_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ +#define SPIS_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ + + +/* Peripheral: TEMP */ +/* Description: Temperature Sensor. */ + +/* Register: TEMP_INTENSET */ +/* Description: Interrupt enable set register. */ + +/* Bit 0 : Enable interrupt on DATARDY event. */ +#define TEMP_INTENSET_DATARDY_Pos (0UL) /*!< Position of DATARDY field. */ +#define TEMP_INTENSET_DATARDY_Msk (0x1UL << TEMP_INTENSET_DATARDY_Pos) /*!< Bit mask of DATARDY field. */ +#define TEMP_INTENSET_DATARDY_Disabled (0UL) /*!< Interrupt disabled. */ +#define TEMP_INTENSET_DATARDY_Enabled (1UL) /*!< Interrupt enabled. */ +#define TEMP_INTENSET_DATARDY_Set (1UL) /*!< Enable interrupt on write. */ + +/* Register: TEMP_INTENCLR */ +/* Description: Interrupt enable clear register. */ + +/* Bit 0 : Disable interrupt on DATARDY event. */ +#define TEMP_INTENCLR_DATARDY_Pos (0UL) /*!< Position of DATARDY field. */ +#define TEMP_INTENCLR_DATARDY_Msk (0x1UL << TEMP_INTENCLR_DATARDY_Pos) /*!< Bit mask of DATARDY field. */ +#define TEMP_INTENCLR_DATARDY_Disabled (0UL) /*!< Interrupt disabled. */ +#define TEMP_INTENCLR_DATARDY_Enabled (1UL) /*!< Interrupt enabled. */ +#define TEMP_INTENCLR_DATARDY_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Register: TEMP_POWER */ +/* Description: Peripheral power control. */ + +/* Bit 0 : Peripheral power control. */ +#define TEMP_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ +#define TEMP_POWER_POWER_Msk (0x1UL << TEMP_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ +#define TEMP_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ +#define TEMP_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ + + +/* Peripheral: TIMER */ +/* Description: Timer 0. */ + +/* Register: TIMER_SHORTS */ +/* Description: Shortcuts for Timer. */ + +/* Bit 11 : Shortcut between CC[3] event and the STOP task. */ +#define TIMER_SHORTS_COMPARE3_STOP_Pos (11UL) /*!< Position of COMPARE3_STOP field. */ +#define TIMER_SHORTS_COMPARE3_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE3_STOP_Pos) /*!< Bit mask of COMPARE3_STOP field. */ +#define TIMER_SHORTS_COMPARE3_STOP_Disabled (0UL) /*!< Shortcut disabled. */ +#define TIMER_SHORTS_COMPARE3_STOP_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Bit 10 : Shortcut between CC[2] event and the STOP task. */ +#define TIMER_SHORTS_COMPARE2_STOP_Pos (10UL) /*!< Position of COMPARE2_STOP field. */ +#define TIMER_SHORTS_COMPARE2_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE2_STOP_Pos) /*!< Bit mask of COMPARE2_STOP field. */ +#define TIMER_SHORTS_COMPARE2_STOP_Disabled (0UL) /*!< Shortcut disabled. */ +#define TIMER_SHORTS_COMPARE2_STOP_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Bit 9 : Shortcut between CC[1] event and the STOP task. */ +#define TIMER_SHORTS_COMPARE1_STOP_Pos (9UL) /*!< Position of COMPARE1_STOP field. */ +#define TIMER_SHORTS_COMPARE1_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE1_STOP_Pos) /*!< Bit mask of COMPARE1_STOP field. */ +#define TIMER_SHORTS_COMPARE1_STOP_Disabled (0UL) /*!< Shortcut disabled. */ +#define TIMER_SHORTS_COMPARE1_STOP_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Bit 8 : Shortcut between CC[0] event and the STOP task. */ +#define TIMER_SHORTS_COMPARE0_STOP_Pos (8UL) /*!< Position of COMPARE0_STOP field. */ +#define TIMER_SHORTS_COMPARE0_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE0_STOP_Pos) /*!< Bit mask of COMPARE0_STOP field. */ +#define TIMER_SHORTS_COMPARE0_STOP_Disabled (0UL) /*!< Shortcut disabled. */ +#define TIMER_SHORTS_COMPARE0_STOP_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Bit 3 : Shortcut between CC[3] event and the CLEAR task. */ +#define TIMER_SHORTS_COMPARE3_CLEAR_Pos (3UL) /*!< Position of COMPARE3_CLEAR field. */ +#define TIMER_SHORTS_COMPARE3_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE3_CLEAR_Pos) /*!< Bit mask of COMPARE3_CLEAR field. */ +#define TIMER_SHORTS_COMPARE3_CLEAR_Disabled (0UL) /*!< Shortcut disabled. */ +#define TIMER_SHORTS_COMPARE3_CLEAR_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Bit 2 : Shortcut between CC[2] event and the CLEAR task. */ +#define TIMER_SHORTS_COMPARE2_CLEAR_Pos (2UL) /*!< Position of COMPARE2_CLEAR field. */ +#define TIMER_SHORTS_COMPARE2_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE2_CLEAR_Pos) /*!< Bit mask of COMPARE2_CLEAR field. */ +#define TIMER_SHORTS_COMPARE2_CLEAR_Disabled (0UL) /*!< Shortcut disabled. */ +#define TIMER_SHORTS_COMPARE2_CLEAR_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Bit 1 : Shortcut between CC[1] event and the CLEAR task. */ +#define TIMER_SHORTS_COMPARE1_CLEAR_Pos (1UL) /*!< Position of COMPARE1_CLEAR field. */ +#define TIMER_SHORTS_COMPARE1_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE1_CLEAR_Pos) /*!< Bit mask of COMPARE1_CLEAR field. */ +#define TIMER_SHORTS_COMPARE1_CLEAR_Disabled (0UL) /*!< Shortcut disabled. */ +#define TIMER_SHORTS_COMPARE1_CLEAR_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Bit 0 : Shortcut between CC[0] event and the CLEAR task. */ +#define TIMER_SHORTS_COMPARE0_CLEAR_Pos (0UL) /*!< Position of COMPARE0_CLEAR field. */ +#define TIMER_SHORTS_COMPARE0_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE0_CLEAR_Pos) /*!< Bit mask of COMPARE0_CLEAR field. */ +#define TIMER_SHORTS_COMPARE0_CLEAR_Disabled (0UL) /*!< Shortcut disabled. */ +#define TIMER_SHORTS_COMPARE0_CLEAR_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Register: TIMER_INTENSET */ +/* Description: Interrupt enable set register. */ + +/* Bit 19 : Enable interrupt on COMPARE[3] */ +#define TIMER_INTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define TIMER_INTENSET_COMPARE3_Msk (0x1UL << TIMER_INTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define TIMER_INTENSET_COMPARE3_Disabled (0UL) /*!< Interrupt disabled. */ +#define TIMER_INTENSET_COMPARE3_Enabled (1UL) /*!< Interrupt enabled. */ +#define TIMER_INTENSET_COMPARE3_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 18 : Enable interrupt on COMPARE[2] */ +#define TIMER_INTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define TIMER_INTENSET_COMPARE2_Msk (0x1UL << TIMER_INTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define TIMER_INTENSET_COMPARE2_Disabled (0UL) /*!< Interrupt disabled. */ +#define TIMER_INTENSET_COMPARE2_Enabled (1UL) /*!< Interrupt enabled. */ +#define TIMER_INTENSET_COMPARE2_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 17 : Enable interrupt on COMPARE[1] */ +#define TIMER_INTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define TIMER_INTENSET_COMPARE1_Msk (0x1UL << TIMER_INTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define TIMER_INTENSET_COMPARE1_Disabled (0UL) /*!< Interrupt disabled. */ +#define TIMER_INTENSET_COMPARE1_Enabled (1UL) /*!< Interrupt enabled. */ +#define TIMER_INTENSET_COMPARE1_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 16 : Enable interrupt on COMPARE[0] */ +#define TIMER_INTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define TIMER_INTENSET_COMPARE0_Msk (0x1UL << TIMER_INTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define TIMER_INTENSET_COMPARE0_Disabled (0UL) /*!< Interrupt disabled. */ +#define TIMER_INTENSET_COMPARE0_Enabled (1UL) /*!< Interrupt enabled. */ +#define TIMER_INTENSET_COMPARE0_Set (1UL) /*!< Enable interrupt on write. */ + +/* Register: TIMER_INTENCLR */ +/* Description: Interrupt enable clear register. */ + +/* Bit 19 : Disable interrupt on COMPARE[3] */ +#define TIMER_INTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define TIMER_INTENCLR_COMPARE3_Msk (0x1UL << TIMER_INTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define TIMER_INTENCLR_COMPARE3_Disabled (0UL) /*!< Interrupt disabled. */ +#define TIMER_INTENCLR_COMPARE3_Enabled (1UL) /*!< Interrupt enabled. */ +#define TIMER_INTENCLR_COMPARE3_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 18 : Disable interrupt on COMPARE[2] */ +#define TIMER_INTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define TIMER_INTENCLR_COMPARE2_Msk (0x1UL << TIMER_INTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define TIMER_INTENCLR_COMPARE2_Disabled (0UL) /*!< Interrupt disabled. */ +#define TIMER_INTENCLR_COMPARE2_Enabled (1UL) /*!< Interrupt enabled. */ +#define TIMER_INTENCLR_COMPARE2_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 17 : Disable interrupt on COMPARE[1] */ +#define TIMER_INTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define TIMER_INTENCLR_COMPARE1_Msk (0x1UL << TIMER_INTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define TIMER_INTENCLR_COMPARE1_Disabled (0UL) /*!< Interrupt disabled. */ +#define TIMER_INTENCLR_COMPARE1_Enabled (1UL) /*!< Interrupt enabled. */ +#define TIMER_INTENCLR_COMPARE1_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 16 : Disable interrupt on COMPARE[0] */ +#define TIMER_INTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define TIMER_INTENCLR_COMPARE0_Msk (0x1UL << TIMER_INTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define TIMER_INTENCLR_COMPARE0_Disabled (0UL) /*!< Interrupt disabled. */ +#define TIMER_INTENCLR_COMPARE0_Enabled (1UL) /*!< Interrupt enabled. */ +#define TIMER_INTENCLR_COMPARE0_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Register: TIMER_MODE */ +/* Description: Timer Mode selection. */ + +/* Bit 0 : Select Normal or Counter mode. */ +#define TIMER_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ +#define TIMER_MODE_MODE_Msk (0x1UL << TIMER_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ +#define TIMER_MODE_MODE_Timer (0UL) /*!< Timer in Normal mode. */ +#define TIMER_MODE_MODE_Counter (1UL) /*!< Timer in Counter mode. */ + +/* Register: TIMER_BITMODE */ +/* Description: Sets timer behaviour. */ + +/* Bits 1..0 : Sets timer behaviour ro be like the implementation of a timer with width as indicated. */ +#define TIMER_BITMODE_BITMODE_Pos (0UL) /*!< Position of BITMODE field. */ +#define TIMER_BITMODE_BITMODE_Msk (0x3UL << TIMER_BITMODE_BITMODE_Pos) /*!< Bit mask of BITMODE field. */ +#define TIMER_BITMODE_BITMODE_16Bit (0x00UL) /*!< 16-bit timer behaviour. */ +#define TIMER_BITMODE_BITMODE_08Bit (0x01UL) /*!< 8-bit timer behaviour. */ +#define TIMER_BITMODE_BITMODE_24Bit (0x02UL) /*!< 24-bit timer behaviour. */ +#define TIMER_BITMODE_BITMODE_32Bit (0x03UL) /*!< 32-bit timer behaviour. */ + +/* Register: TIMER_PRESCALER */ +/* Description: 4-bit prescaler to source clock frequency (max value 9). Source clock frequency is divided by 2^SCALE. */ + +/* Bits 3..0 : Timer PRESCALER value. Max value is 9. */ +#define TIMER_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */ +#define TIMER_PRESCALER_PRESCALER_Msk (0xFUL << TIMER_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */ + +/* Register: TIMER_POWER */ +/* Description: Peripheral power control. */ + +/* Bit 0 : Peripheral power control. */ +#define TIMER_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ +#define TIMER_POWER_POWER_Msk (0x1UL << TIMER_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ +#define TIMER_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ +#define TIMER_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ + + +/* Peripheral: TWI */ +/* Description: Two-wire interface master 0. */ + +/* Register: TWI_SHORTS */ +/* Description: Shortcuts for TWI. */ + +/* Bit 1 : Shortcut between BB event and the STOP task. */ +#define TWI_SHORTS_BB_STOP_Pos (1UL) /*!< Position of BB_STOP field. */ +#define TWI_SHORTS_BB_STOP_Msk (0x1UL << TWI_SHORTS_BB_STOP_Pos) /*!< Bit mask of BB_STOP field. */ +#define TWI_SHORTS_BB_STOP_Disabled (0UL) /*!< Shortcut disabled. */ +#define TWI_SHORTS_BB_STOP_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Bit 0 : Shortcut between BB event and the SUSPEND task. */ +#define TWI_SHORTS_BB_SUSPEND_Pos (0UL) /*!< Position of BB_SUSPEND field. */ +#define TWI_SHORTS_BB_SUSPEND_Msk (0x1UL << TWI_SHORTS_BB_SUSPEND_Pos) /*!< Bit mask of BB_SUSPEND field. */ +#define TWI_SHORTS_BB_SUSPEND_Disabled (0UL) /*!< Shortcut disabled. */ +#define TWI_SHORTS_BB_SUSPEND_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Register: TWI_INTENSET */ +/* Description: Interrupt enable set register. */ + +/* Bit 18 : Enable interrupt on SUSPENDED event. */ +#define TWI_INTENSET_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ +#define TWI_INTENSET_SUSPENDED_Msk (0x1UL << TWI_INTENSET_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ +#define TWI_INTENSET_SUSPENDED_Disabled (0UL) /*!< Interrupt disabled. */ +#define TWI_INTENSET_SUSPENDED_Enabled (1UL) /*!< Interrupt enabled. */ +#define TWI_INTENSET_SUSPENDED_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 14 : Enable interrupt on BB event. */ +#define TWI_INTENSET_BB_Pos (14UL) /*!< Position of BB field. */ +#define TWI_INTENSET_BB_Msk (0x1UL << TWI_INTENSET_BB_Pos) /*!< Bit mask of BB field. */ +#define TWI_INTENSET_BB_Disabled (0UL) /*!< Interrupt disabled. */ +#define TWI_INTENSET_BB_Enabled (1UL) /*!< Interrupt enabled. */ +#define TWI_INTENSET_BB_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 9 : Enable interrupt on ERROR event. */ +#define TWI_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define TWI_INTENSET_ERROR_Msk (0x1UL << TWI_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define TWI_INTENSET_ERROR_Disabled (0UL) /*!< Interrupt disabled. */ +#define TWI_INTENSET_ERROR_Enabled (1UL) /*!< Interrupt enabled. */ +#define TWI_INTENSET_ERROR_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 7 : Enable interrupt on TXDSENT event. */ +#define TWI_INTENSET_TXDSENT_Pos (7UL) /*!< Position of TXDSENT field. */ +#define TWI_INTENSET_TXDSENT_Msk (0x1UL << TWI_INTENSET_TXDSENT_Pos) /*!< Bit mask of TXDSENT field. */ +#define TWI_INTENSET_TXDSENT_Disabled (0UL) /*!< Interrupt disabled. */ +#define TWI_INTENSET_TXDSENT_Enabled (1UL) /*!< Interrupt enabled. */ +#define TWI_INTENSET_TXDSENT_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 2 : Enable interrupt on READY event. */ +#define TWI_INTENSET_RXDREADY_Pos (2UL) /*!< Position of RXDREADY field. */ +#define TWI_INTENSET_RXDREADY_Msk (0x1UL << TWI_INTENSET_RXDREADY_Pos) /*!< Bit mask of RXDREADY field. */ +#define TWI_INTENSET_RXDREADY_Disabled (0UL) /*!< Interrupt disabled. */ +#define TWI_INTENSET_RXDREADY_Enabled (1UL) /*!< Interrupt enabled. */ +#define TWI_INTENSET_RXDREADY_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 1 : Enable interrupt on STOPPED event. */ +#define TWI_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define TWI_INTENSET_STOPPED_Msk (0x1UL << TWI_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define TWI_INTENSET_STOPPED_Disabled (0UL) /*!< Interrupt disabled. */ +#define TWI_INTENSET_STOPPED_Enabled (1UL) /*!< Interrupt enabled. */ +#define TWI_INTENSET_STOPPED_Set (1UL) /*!< Enable interrupt on write. */ + +/* Register: TWI_INTENCLR */ +/* Description: Interrupt enable clear register. */ + +/* Bit 18 : Disable interrupt on SUSPENDED event. */ +#define TWI_INTENCLR_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ +#define TWI_INTENCLR_SUSPENDED_Msk (0x1UL << TWI_INTENCLR_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ +#define TWI_INTENCLR_SUSPENDED_Disabled (0UL) /*!< Interrupt disabled. */ +#define TWI_INTENCLR_SUSPENDED_Enabled (1UL) /*!< Interrupt enabled. */ +#define TWI_INTENCLR_SUSPENDED_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 14 : Disable interrupt on BB event. */ +#define TWI_INTENCLR_BB_Pos (14UL) /*!< Position of BB field. */ +#define TWI_INTENCLR_BB_Msk (0x1UL << TWI_INTENCLR_BB_Pos) /*!< Bit mask of BB field. */ +#define TWI_INTENCLR_BB_Disabled (0UL) /*!< Interrupt disabled. */ +#define TWI_INTENCLR_BB_Enabled (1UL) /*!< Interrupt enabled. */ +#define TWI_INTENCLR_BB_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 9 : Disable interrupt on ERROR event. */ +#define TWI_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define TWI_INTENCLR_ERROR_Msk (0x1UL << TWI_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define TWI_INTENCLR_ERROR_Disabled (0UL) /*!< Interrupt disabled. */ +#define TWI_INTENCLR_ERROR_Enabled (1UL) /*!< Interrupt enabled. */ +#define TWI_INTENCLR_ERROR_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 7 : Disable interrupt on TXDSENT event. */ +#define TWI_INTENCLR_TXDSENT_Pos (7UL) /*!< Position of TXDSENT field. */ +#define TWI_INTENCLR_TXDSENT_Msk (0x1UL << TWI_INTENCLR_TXDSENT_Pos) /*!< Bit mask of TXDSENT field. */ +#define TWI_INTENCLR_TXDSENT_Disabled (0UL) /*!< Interrupt disabled. */ +#define TWI_INTENCLR_TXDSENT_Enabled (1UL) /*!< Interrupt enabled. */ +#define TWI_INTENCLR_TXDSENT_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 2 : Disable interrupt on RXDREADY event. */ +#define TWI_INTENCLR_RXDREADY_Pos (2UL) /*!< Position of RXDREADY field. */ +#define TWI_INTENCLR_RXDREADY_Msk (0x1UL << TWI_INTENCLR_RXDREADY_Pos) /*!< Bit mask of RXDREADY field. */ +#define TWI_INTENCLR_RXDREADY_Disabled (0UL) /*!< Interrupt disabled. */ +#define TWI_INTENCLR_RXDREADY_Enabled (1UL) /*!< Interrupt enabled. */ +#define TWI_INTENCLR_RXDREADY_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 1 : Disable interrupt on STOPPED event. */ +#define TWI_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define TWI_INTENCLR_STOPPED_Msk (0x1UL << TWI_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define TWI_INTENCLR_STOPPED_Disabled (0UL) /*!< Interrupt disabled. */ +#define TWI_INTENCLR_STOPPED_Enabled (1UL) /*!< Interrupt enabled. */ +#define TWI_INTENCLR_STOPPED_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Register: TWI_ERRORSRC */ +/* Description: Two-wire error source. Write error field to 1 to clear error. */ + +/* Bit 2 : NACK received after sending a data byte. */ +#define TWI_ERRORSRC_DNACK_Pos (2UL) /*!< Position of DNACK field. */ +#define TWI_ERRORSRC_DNACK_Msk (0x1UL << TWI_ERRORSRC_DNACK_Pos) /*!< Bit mask of DNACK field. */ +#define TWI_ERRORSRC_DNACK_NotPresent (0UL) /*!< Error not present. */ +#define TWI_ERRORSRC_DNACK_Present (1UL) /*!< Error present. */ +#define TWI_ERRORSRC_DNACK_Clear (1UL) /*!< Clear error on write. */ + +/* Bit 1 : NACK received after sending the address. */ +#define TWI_ERRORSRC_ANACK_Pos (1UL) /*!< Position of ANACK field. */ +#define TWI_ERRORSRC_ANACK_Msk (0x1UL << TWI_ERRORSRC_ANACK_Pos) /*!< Bit mask of ANACK field. */ +#define TWI_ERRORSRC_ANACK_NotPresent (0UL) /*!< Error not present. */ +#define TWI_ERRORSRC_ANACK_Present (1UL) /*!< Error present. */ +#define TWI_ERRORSRC_ANACK_Clear (1UL) /*!< Clear error on write. */ + +/* Bit 0 : Byte received in RXD register before read of the last received byte (data loss). */ +#define TWI_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */ +#define TWI_ERRORSRC_OVERRUN_Msk (0x1UL << TWI_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ +#define TWI_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Error not present. */ +#define TWI_ERRORSRC_OVERRUN_Present (1UL) /*!< Error present. */ +#define TWI_ERRORSRC_OVERRUN_Clear (1UL) /*!< Clear error on write. */ + +/* Register: TWI_ENABLE */ +/* Description: Enable two-wire master. */ + +/* Bits 2..0 : Enable or disable W2M */ +#define TWI_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define TWI_ENABLE_ENABLE_Msk (0x7UL << TWI_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define TWI_ENABLE_ENABLE_Disabled (0x00UL) /*!< Disabled. */ +#define TWI_ENABLE_ENABLE_Enabled (0x05UL) /*!< Enabled. */ + +/* Register: TWI_RXD */ +/* Description: RX data register. */ + +/* Bits 7..0 : RX data from last transfer. */ +#define TWI_RXD_RXD_Pos (0UL) /*!< Position of RXD field. */ +#define TWI_RXD_RXD_Msk (0xFFUL << TWI_RXD_RXD_Pos) /*!< Bit mask of RXD field. */ + +/* Register: TWI_TXD */ +/* Description: TX data register. */ + +/* Bits 7..0 : TX data for next transfer. */ +#define TWI_TXD_TXD_Pos (0UL) /*!< Position of TXD field. */ +#define TWI_TXD_TXD_Msk (0xFFUL << TWI_TXD_TXD_Pos) /*!< Bit mask of TXD field. */ + +/* Register: TWI_FREQUENCY */ +/* Description: Two-wire frequency. */ + +/* Bits 31..0 : Two-wire master clock frequency. */ +#define TWI_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ +#define TWI_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << TWI_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ +#define TWI_FREQUENCY_FREQUENCY_K100 (0x01980000UL) /*!< 100 kbps. */ +#define TWI_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps. */ +#define TWI_FREQUENCY_FREQUENCY_K400 (0x06680000UL) /*!< 400 kbps (actual rate 410.256 kbps). */ + +/* Register: TWI_ADDRESS */ +/* Description: Address used in the two-wire transfer. */ + +/* Bits 6..0 : Two-wire address. */ +#define TWI_ADDRESS_ADDRESS_Pos (0UL) /*!< Position of ADDRESS field. */ +#define TWI_ADDRESS_ADDRESS_Msk (0x7FUL << TWI_ADDRESS_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ + +/* Register: TWI_POWER */ +/* Description: Peripheral power control. */ + +/* Bit 0 : Peripheral power control. */ +#define TWI_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ +#define TWI_POWER_POWER_Msk (0x1UL << TWI_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ +#define TWI_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ +#define TWI_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ + + +/* Peripheral: UART */ +/* Description: Universal Asynchronous Receiver/Transmitter. */ + +/* Register: UART_SHORTS */ +/* Description: Shortcuts for UART. */ + +/* Bit 4 : Shortcut between NCTS event and STOPRX task. */ +#define UART_SHORTS_NCTS_STOPRX_Pos (4UL) /*!< Position of NCTS_STOPRX field. */ +#define UART_SHORTS_NCTS_STOPRX_Msk (0x1UL << UART_SHORTS_NCTS_STOPRX_Pos) /*!< Bit mask of NCTS_STOPRX field. */ +#define UART_SHORTS_NCTS_STOPRX_Disabled (0UL) /*!< Shortcut disabled. */ +#define UART_SHORTS_NCTS_STOPRX_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Bit 3 : Shortcut between CTS event and STARTRX task. */ +#define UART_SHORTS_CTS_STARTRX_Pos (3UL) /*!< Position of CTS_STARTRX field. */ +#define UART_SHORTS_CTS_STARTRX_Msk (0x1UL << UART_SHORTS_CTS_STARTRX_Pos) /*!< Bit mask of CTS_STARTRX field. */ +#define UART_SHORTS_CTS_STARTRX_Disabled (0UL) /*!< Shortcut disabled. */ +#define UART_SHORTS_CTS_STARTRX_Enabled (1UL) /*!< Shortcut enabled. */ + +/* Register: UART_INTENSET */ +/* Description: Interrupt enable set register. */ + +/* Bit 17 : Enable interrupt on RXTO event. */ +#define UART_INTENSET_RXTO_Pos (17UL) /*!< Position of RXTO field. */ +#define UART_INTENSET_RXTO_Msk (0x1UL << UART_INTENSET_RXTO_Pos) /*!< Bit mask of RXTO field. */ +#define UART_INTENSET_RXTO_Disabled (0UL) /*!< Interrupt disabled. */ +#define UART_INTENSET_RXTO_Enabled (1UL) /*!< Interrupt enabled. */ +#define UART_INTENSET_RXTO_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 9 : Enable interrupt on ERROR event. */ +#define UART_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define UART_INTENSET_ERROR_Msk (0x1UL << UART_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define UART_INTENSET_ERROR_Disabled (0UL) /*!< Interrupt disabled. */ +#define UART_INTENSET_ERROR_Enabled (1UL) /*!< Interrupt enabled. */ +#define UART_INTENSET_ERROR_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 7 : Enable interrupt on TXRDY event. */ +#define UART_INTENSET_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ +#define UART_INTENSET_TXDRDY_Msk (0x1UL << UART_INTENSET_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ +#define UART_INTENSET_TXDRDY_Disabled (0UL) /*!< Interrupt disabled. */ +#define UART_INTENSET_TXDRDY_Enabled (1UL) /*!< Interrupt enabled. */ +#define UART_INTENSET_TXDRDY_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 2 : Enable interrupt on RXRDY event. */ +#define UART_INTENSET_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ +#define UART_INTENSET_RXDRDY_Msk (0x1UL << UART_INTENSET_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ +#define UART_INTENSET_RXDRDY_Disabled (0UL) /*!< Interrupt disabled. */ +#define UART_INTENSET_RXDRDY_Enabled (1UL) /*!< Interrupt enabled. */ +#define UART_INTENSET_RXDRDY_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 1 : Enable interrupt on NCTS event. */ +#define UART_INTENSET_NCTS_Pos (1UL) /*!< Position of NCTS field. */ +#define UART_INTENSET_NCTS_Msk (0x1UL << UART_INTENSET_NCTS_Pos) /*!< Bit mask of NCTS field. */ +#define UART_INTENSET_NCTS_Disabled (0UL) /*!< Interrupt disabled. */ +#define UART_INTENSET_NCTS_Enabled (1UL) /*!< Interrupt enabled. */ +#define UART_INTENSET_NCTS_Set (1UL) /*!< Enable interrupt on write. */ + +/* Bit 0 : Enable interrupt on CTS event. */ +#define UART_INTENSET_CTS_Pos (0UL) /*!< Position of CTS field. */ +#define UART_INTENSET_CTS_Msk (0x1UL << UART_INTENSET_CTS_Pos) /*!< Bit mask of CTS field. */ +#define UART_INTENSET_CTS_Disabled (0UL) /*!< Interrupt disabled. */ +#define UART_INTENSET_CTS_Enabled (1UL) /*!< Interrupt enabled. */ +#define UART_INTENSET_CTS_Set (1UL) /*!< Enable interrupt on write. */ + +/* Register: UART_INTENCLR */ +/* Description: Interrupt enable clear register. */ + +/* Bit 17 : Disable interrupt on RXTO event. */ +#define UART_INTENCLR_RXTO_Pos (17UL) /*!< Position of RXTO field. */ +#define UART_INTENCLR_RXTO_Msk (0x1UL << UART_INTENCLR_RXTO_Pos) /*!< Bit mask of RXTO field. */ +#define UART_INTENCLR_RXTO_Disabled (0UL) /*!< Interrupt disabled. */ +#define UART_INTENCLR_RXTO_Enabled (1UL) /*!< Interrupt enabled. */ +#define UART_INTENCLR_RXTO_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 9 : Disable interrupt on ERROR event. */ +#define UART_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define UART_INTENCLR_ERROR_Msk (0x1UL << UART_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define UART_INTENCLR_ERROR_Disabled (0UL) /*!< Interrupt disabled. */ +#define UART_INTENCLR_ERROR_Enabled (1UL) /*!< Interrupt enabled. */ +#define UART_INTENCLR_ERROR_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 7 : Disable interrupt on TXRDY event. */ +#define UART_INTENCLR_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ +#define UART_INTENCLR_TXDRDY_Msk (0x1UL << UART_INTENCLR_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ +#define UART_INTENCLR_TXDRDY_Disabled (0UL) /*!< Interrupt disabled. */ +#define UART_INTENCLR_TXDRDY_Enabled (1UL) /*!< Interrupt enabled. */ +#define UART_INTENCLR_TXDRDY_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 2 : Disable interrupt on RXRDY event. */ +#define UART_INTENCLR_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ +#define UART_INTENCLR_RXDRDY_Msk (0x1UL << UART_INTENCLR_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ +#define UART_INTENCLR_RXDRDY_Disabled (0UL) /*!< Interrupt disabled. */ +#define UART_INTENCLR_RXDRDY_Enabled (1UL) /*!< Interrupt enabled. */ +#define UART_INTENCLR_RXDRDY_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 1 : Disable interrupt on NCTS event. */ +#define UART_INTENCLR_NCTS_Pos (1UL) /*!< Position of NCTS field. */ +#define UART_INTENCLR_NCTS_Msk (0x1UL << UART_INTENCLR_NCTS_Pos) /*!< Bit mask of NCTS field. */ +#define UART_INTENCLR_NCTS_Disabled (0UL) /*!< Interrupt disabled. */ +#define UART_INTENCLR_NCTS_Enabled (1UL) /*!< Interrupt enabled. */ +#define UART_INTENCLR_NCTS_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Bit 0 : Disable interrupt on CTS event. */ +#define UART_INTENCLR_CTS_Pos (0UL) /*!< Position of CTS field. */ +#define UART_INTENCLR_CTS_Msk (0x1UL << UART_INTENCLR_CTS_Pos) /*!< Bit mask of CTS field. */ +#define UART_INTENCLR_CTS_Disabled (0UL) /*!< Interrupt disabled. */ +#define UART_INTENCLR_CTS_Enabled (1UL) /*!< Interrupt enabled. */ +#define UART_INTENCLR_CTS_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Register: UART_ERRORSRC */ +/* Description: Error source. Write error field to 1 to clear error. */ + +/* Bit 3 : The serial data input is '0' for longer than the length of a data frame. */ +#define UART_ERRORSRC_BREAK_Pos (3UL) /*!< Position of BREAK field. */ +#define UART_ERRORSRC_BREAK_Msk (0x1UL << UART_ERRORSRC_BREAK_Pos) /*!< Bit mask of BREAK field. */ +#define UART_ERRORSRC_BREAK_NotPresent (0UL) /*!< Error not present. */ +#define UART_ERRORSRC_BREAK_Present (1UL) /*!< Error present. */ +#define UART_ERRORSRC_BREAK_Clear (1UL) /*!< Clear error on write. */ + +/* Bit 2 : A valid stop bit is not detected on the serial data input after all bits in a character have been received. */ +#define UART_ERRORSRC_FRAMING_Pos (2UL) /*!< Position of FRAMING field. */ +#define UART_ERRORSRC_FRAMING_Msk (0x1UL << UART_ERRORSRC_FRAMING_Pos) /*!< Bit mask of FRAMING field. */ +#define UART_ERRORSRC_FRAMING_NotPresent (0UL) /*!< Error not present. */ +#define UART_ERRORSRC_FRAMING_Present (1UL) /*!< Error present. */ +#define UART_ERRORSRC_FRAMING_Clear (1UL) /*!< Clear error on write. */ + +/* Bit 1 : A character with bad parity is received. Only checked if HW parity control is enabled. */ +#define UART_ERRORSRC_PARITY_Pos (1UL) /*!< Position of PARITY field. */ +#define UART_ERRORSRC_PARITY_Msk (0x1UL << UART_ERRORSRC_PARITY_Pos) /*!< Bit mask of PARITY field. */ +#define UART_ERRORSRC_PARITY_NotPresent (0UL) /*!< Error not present. */ +#define UART_ERRORSRC_PARITY_Present (1UL) /*!< Error present. */ +#define UART_ERRORSRC_PARITY_Clear (1UL) /*!< Clear error on write. */ + +/* Bit 0 : A start bit is received while the previous data still lies in RXD. (Data loss). */ +#define UART_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */ +#define UART_ERRORSRC_OVERRUN_Msk (0x1UL << UART_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ +#define UART_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Error not present. */ +#define UART_ERRORSRC_OVERRUN_Present (1UL) /*!< Error present. */ +#define UART_ERRORSRC_OVERRUN_Clear (1UL) /*!< Clear error on write. */ + +/* Register: UART_ENABLE */ +/* Description: Enable UART and acquire IOs. */ + +/* Bits 2..0 : Enable or disable UART and acquire IOs. */ +#define UART_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define UART_ENABLE_ENABLE_Msk (0x7UL << UART_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define UART_ENABLE_ENABLE_Disabled (0x00UL) /*!< UART disabled. */ +#define UART_ENABLE_ENABLE_Enabled (0x04UL) /*!< UART enabled. */ + +/* Register: UART_RXD */ +/* Description: RXD register. On read action the buffer pointer is displaced. Once read the character is consumed. If read when no character available, the UART will stop working. */ + +/* Bits 7..0 : RX data from previous transfer. Double buffered. */ +#define UART_RXD_RXD_Pos (0UL) /*!< Position of RXD field. */ +#define UART_RXD_RXD_Msk (0xFFUL << UART_RXD_RXD_Pos) /*!< Bit mask of RXD field. */ + +/* Register: UART_TXD */ +/* Description: TXD register. */ + +/* Bits 7..0 : TX data for transfer. */ +#define UART_TXD_TXD_Pos (0UL) /*!< Position of TXD field. */ +#define UART_TXD_TXD_Msk (0xFFUL << UART_TXD_TXD_Pos) /*!< Bit mask of TXD field. */ + +/* Register: UART_BAUDRATE */ +/* Description: UART Baudrate. */ + +/* Bits 31..0 : UART baudrate. */ +#define UART_BAUDRATE_BAUDRATE_Pos (0UL) /*!< Position of BAUDRATE field. */ +#define UART_BAUDRATE_BAUDRATE_Msk (0xFFFFFFFFUL << UART_BAUDRATE_BAUDRATE_Pos) /*!< Bit mask of BAUDRATE field. */ +#define UART_BAUDRATE_BAUDRATE_Baud1200 (0x0004F000UL) /*!< 1200 baud. */ +#define UART_BAUDRATE_BAUDRATE_Baud2400 (0x0009D000UL) /*!< 2400 baud. */ +#define UART_BAUDRATE_BAUDRATE_Baud4800 (0x0013B000UL) /*!< 4800 baud. */ +#define UART_BAUDRATE_BAUDRATE_Baud9600 (0x00275000UL) /*!< 9600 baud. */ +#define UART_BAUDRATE_BAUDRATE_Baud14400 (0x003B0000UL) /*!< 14400 baud. */ +#define UART_BAUDRATE_BAUDRATE_Baud19200 (0x004EA000UL) /*!< 19200 baud. */ +#define UART_BAUDRATE_BAUDRATE_Baud28800 (0x0075F000UL) /*!< 28800 baud. */ +#define UART_BAUDRATE_BAUDRATE_Baud31250 (0x00800000UL) /*!< 31250 baud. */ +#define UART_BAUDRATE_BAUDRATE_Baud38400 (0x009D5000UL) /*!< 38400 baud. */ +#define UART_BAUDRATE_BAUDRATE_Baud56000 (0x00E50000UL) /*!< 56000 baud. */ +#define UART_BAUDRATE_BAUDRATE_Baud57600 (0x00EBF000UL) /*!< 57600 baud. */ +#define UART_BAUDRATE_BAUDRATE_Baud76800 (0x013A9000UL) /*!< 76800 baud. */ +#define UART_BAUDRATE_BAUDRATE_Baud115200 (0x01D7E000UL) /*!< 115200 baud. */ +#define UART_BAUDRATE_BAUDRATE_Baud230400 (0x03AFB000UL) /*!< 230400 baud. */ +#define UART_BAUDRATE_BAUDRATE_Baud250000 (0x04000000UL) /*!< 250000 baud. */ +#define UART_BAUDRATE_BAUDRATE_Baud460800 (0x075F7000UL) /*!< 460800 baud. */ +#define UART_BAUDRATE_BAUDRATE_Baud921600 (0x0EBED000UL) /*!< 921600 baud. */ +#define UART_BAUDRATE_BAUDRATE_Baud1M (0x10000000UL) /*!< 1M baud. */ + +/* Register: UART_CONFIG */ +/* Description: Configuration of parity and hardware flow control register. */ + +/* Bits 3..1 : Include parity bit. */ +#define UART_CONFIG_PARITY_Pos (1UL) /*!< Position of PARITY field. */ +#define UART_CONFIG_PARITY_Msk (0x7UL << UART_CONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */ +#define UART_CONFIG_PARITY_Excluded (0UL) /*!< Parity bit excluded. */ +#define UART_CONFIG_PARITY_Included (7UL) /*!< Parity bit included. */ + +/* Bit 0 : Hardware flow control. */ +#define UART_CONFIG_HWFC_Pos (0UL) /*!< Position of HWFC field. */ +#define UART_CONFIG_HWFC_Msk (0x1UL << UART_CONFIG_HWFC_Pos) /*!< Bit mask of HWFC field. */ +#define UART_CONFIG_HWFC_Disabled (0UL) /*!< Hardware flow control disabled. */ +#define UART_CONFIG_HWFC_Enabled (1UL) /*!< Hardware flow control enabled. */ + +/* Register: UART_POWER */ +/* Description: Peripheral power control. */ + +/* Bit 0 : Peripheral power control. */ +#define UART_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ +#define UART_POWER_POWER_Msk (0x1UL << UART_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ +#define UART_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ +#define UART_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ + + +/* Peripheral: UICR */ +/* Description: User Information Configuration. */ + +/* Register: UICR_RBPCONF */ +/* Description: Readback protection configuration. */ + +/* Bits 15..8 : Readback protect all code in the device. */ +#define UICR_RBPCONF_PALL_Pos (8UL) /*!< Position of PALL field. */ +#define UICR_RBPCONF_PALL_Msk (0xFFUL << UICR_RBPCONF_PALL_Pos) /*!< Bit mask of PALL field. */ +#define UICR_RBPCONF_PALL_Enabled (0x00UL) /*!< Enabled. */ +#define UICR_RBPCONF_PALL_Disabled (0xFFUL) /*!< Disabled. */ + +/* Bits 7..0 : Readback protect region 0. Will be ignored if pre-programmed factory code is present on the chip. */ +#define UICR_RBPCONF_PR0_Pos (0UL) /*!< Position of PR0 field. */ +#define UICR_RBPCONF_PR0_Msk (0xFFUL << UICR_RBPCONF_PR0_Pos) /*!< Bit mask of PR0 field. */ +#define UICR_RBPCONF_PR0_Enabled (0x00UL) /*!< Enabled. */ +#define UICR_RBPCONF_PR0_Disabled (0xFFUL) /*!< Disabled. */ + +/* Register: UICR_XTALFREQ */ +/* Description: Reset value for CLOCK XTALFREQ register. */ + +/* Bits 7..0 : Reset value for CLOCK XTALFREQ register. */ +#define UICR_XTALFREQ_XTALFREQ_Pos (0UL) /*!< Position of XTALFREQ field. */ +#define UICR_XTALFREQ_XTALFREQ_Msk (0xFFUL << UICR_XTALFREQ_XTALFREQ_Pos) /*!< Bit mask of XTALFREQ field. */ +#define UICR_XTALFREQ_XTALFREQ_32MHz (0x00UL) /*!< 32MHz Xtal is used. */ +#define UICR_XTALFREQ_XTALFREQ_16MHz (0xFFUL) /*!< 16MHz Xtal is used. */ + +/* Register: UICR_FWID */ +/* Description: Firmware ID. */ + +/* Bits 15..0 : Identification number for the firmware loaded into the chip. */ +#define UICR_FWID_FWID_Pos (0UL) /*!< Position of FWID field. */ +#define UICR_FWID_FWID_Msk (0xFFFFUL << UICR_FWID_FWID_Pos) /*!< Bit mask of FWID field. */ + + +/* Peripheral: WDT */ +/* Description: Watchdog Timer. */ + +/* Register: WDT_INTENSET */ +/* Description: Interrupt enable set register. */ + +/* Bit 0 : Enable interrupt on TIMEOUT event. */ +#define WDT_INTENSET_TIMEOUT_Pos (0UL) /*!< Position of TIMEOUT field. */ +#define WDT_INTENSET_TIMEOUT_Msk (0x1UL << WDT_INTENSET_TIMEOUT_Pos) /*!< Bit mask of TIMEOUT field. */ +#define WDT_INTENSET_TIMEOUT_Disabled (0UL) /*!< Interrupt disabled. */ +#define WDT_INTENSET_TIMEOUT_Enabled (1UL) /*!< Interrupt enabled. */ +#define WDT_INTENSET_TIMEOUT_Set (1UL) /*!< Enable interrupt on write. */ + +/* Register: WDT_INTENCLR */ +/* Description: Interrupt enable clear register. */ + +/* Bit 0 : Disable interrupt on TIMEOUT event. */ +#define WDT_INTENCLR_TIMEOUT_Pos (0UL) /*!< Position of TIMEOUT field. */ +#define WDT_INTENCLR_TIMEOUT_Msk (0x1UL << WDT_INTENCLR_TIMEOUT_Pos) /*!< Bit mask of TIMEOUT field. */ +#define WDT_INTENCLR_TIMEOUT_Disabled (0UL) /*!< Interrupt disabled. */ +#define WDT_INTENCLR_TIMEOUT_Enabled (1UL) /*!< Interrupt enabled. */ +#define WDT_INTENCLR_TIMEOUT_Clear (1UL) /*!< Disable interrupt on write. */ + +/* Register: WDT_RUNSTATUS */ +/* Description: Watchdog running status. */ + +/* Bit 0 : Watchdog running status. */ +#define WDT_RUNSTATUS_RUNSTATUS_Pos (0UL) /*!< Position of RUNSTATUS field. */ +#define WDT_RUNSTATUS_RUNSTATUS_Msk (0x1UL << WDT_RUNSTATUS_RUNSTATUS_Pos) /*!< Bit mask of RUNSTATUS field. */ +#define WDT_RUNSTATUS_RUNSTATUS_NotRunning (0UL) /*!< Watchdog timer is not running. */ +#define WDT_RUNSTATUS_RUNSTATUS_Running (1UL) /*!< Watchdog timer is running. */ + +/* Register: WDT_REQSTATUS */ +/* Description: Request status. */ + +/* Bit 7 : Request status for RR[7]. */ +#define WDT_REQSTATUS_RR7_Pos (7UL) /*!< Position of RR7 field. */ +#define WDT_REQSTATUS_RR7_Msk (0x1UL << WDT_REQSTATUS_RR7_Pos) /*!< Bit mask of RR7 field. */ +#define WDT_REQSTATUS_RR7_DisabledOrRequested (0UL) /*!< RR[7] register is not enabled or has already requested reload. */ +#define WDT_REQSTATUS_RR7_EnabledAndUnrequested (1UL) /*!< RR[7] register is enabled and has not jet requested. */ + +/* Bit 6 : Request status for RR[6]. */ +#define WDT_REQSTATUS_RR6_Pos (6UL) /*!< Position of RR6 field. */ +#define WDT_REQSTATUS_RR6_Msk (0x1UL << WDT_REQSTATUS_RR6_Pos) /*!< Bit mask of RR6 field. */ +#define WDT_REQSTATUS_RR6_DisabledOrRequested (0UL) /*!< RR[6] register is not enabled or has already requested reload. */ +#define WDT_REQSTATUS_RR6_EnabledAndUnrequested (1UL) /*!< RR[6] register is enabled and has not jet requested. */ + +/* Bit 5 : Request status for RR[5]. */ +#define WDT_REQSTATUS_RR5_Pos (5UL) /*!< Position of RR5 field. */ +#define WDT_REQSTATUS_RR5_Msk (0x1UL << WDT_REQSTATUS_RR5_Pos) /*!< Bit mask of RR5 field. */ +#define WDT_REQSTATUS_RR5_DisabledOrRequested (0UL) /*!< RR[5] register is not enabled or has already requested reload. */ +#define WDT_REQSTATUS_RR5_EnabledAndUnrequested (1UL) /*!< RR[5] register is enabled and has not jet requested. */ + +/* Bit 4 : Request status for RR[4]. */ +#define WDT_REQSTATUS_RR4_Pos (4UL) /*!< Position of RR4 field. */ +#define WDT_REQSTATUS_RR4_Msk (0x1UL << WDT_REQSTATUS_RR4_Pos) /*!< Bit mask of RR4 field. */ +#define WDT_REQSTATUS_RR4_DisabledOrRequested (0UL) /*!< RR[4] register is not enabled or has already requested reload. */ +#define WDT_REQSTATUS_RR4_EnabledAndUnrequested (1UL) /*!< RR[4] register is enabled and has not jet requested. */ + +/* Bit 3 : Request status for RR[3]. */ +#define WDT_REQSTATUS_RR3_Pos (3UL) /*!< Position of RR3 field. */ +#define WDT_REQSTATUS_RR3_Msk (0x1UL << WDT_REQSTATUS_RR3_Pos) /*!< Bit mask of RR3 field. */ +#define WDT_REQSTATUS_RR3_DisabledOrRequested (0UL) /*!< RR[3] register is not enabled or has already requested reload. */ +#define WDT_REQSTATUS_RR3_EnabledAndUnrequested (1UL) /*!< RR[3] register is enabled and has not jet requested. */ + +/* Bit 2 : Request status for RR[2]. */ +#define WDT_REQSTATUS_RR2_Pos (2UL) /*!< Position of RR2 field. */ +#define WDT_REQSTATUS_RR2_Msk (0x1UL << WDT_REQSTATUS_RR2_Pos) /*!< Bit mask of RR2 field. */ +#define WDT_REQSTATUS_RR2_DisabledOrRequested (0UL) /*!< RR[2] register is not enabled or has already requested reload. */ +#define WDT_REQSTATUS_RR2_EnabledAndUnrequested (1UL) /*!< RR[2] register is enabled and has not jet requested. */ + +/* Bit 1 : Request status for RR[1]. */ +#define WDT_REQSTATUS_RR1_Pos (1UL) /*!< Position of RR1 field. */ +#define WDT_REQSTATUS_RR1_Msk (0x1UL << WDT_REQSTATUS_RR1_Pos) /*!< Bit mask of RR1 field. */ +#define WDT_REQSTATUS_RR1_DisabledOrRequested (0UL) /*!< RR[1] register is not enabled or has already requested reload. */ +#define WDT_REQSTATUS_RR1_EnabledAndUnrequested (1UL) /*!< RR[1] register is enabled and has not jet requested. */ + +/* Bit 0 : Request status for RR[0]. */ +#define WDT_REQSTATUS_RR0_Pos (0UL) /*!< Position of RR0 field. */ +#define WDT_REQSTATUS_RR0_Msk (0x1UL << WDT_REQSTATUS_RR0_Pos) /*!< Bit mask of RR0 field. */ +#define WDT_REQSTATUS_RR0_DisabledOrRequested (0UL) /*!< RR[0] register is not enabled or has already requested reload. */ +#define WDT_REQSTATUS_RR0_EnabledAndUnrequested (1UL) /*!< RR[0] register is enabled and has not jet requested. */ + +/* Register: WDT_RREN */ +/* Description: Reload request enable. */ + +/* Bit 7 : Enable or disable RR[7] register. */ +#define WDT_RREN_RR7_Pos (7UL) /*!< Position of RR7 field. */ +#define WDT_RREN_RR7_Msk (0x1UL << WDT_RREN_RR7_Pos) /*!< Bit mask of RR7 field. */ +#define WDT_RREN_RR7_Disabled (0UL) /*!< RR[7] register is disabled. */ +#define WDT_RREN_RR7_Enabled (1UL) /*!< RR[7] register is enabled. */ + +/* Bit 6 : Enable or disable RR[6] register. */ +#define WDT_RREN_RR6_Pos (6UL) /*!< Position of RR6 field. */ +#define WDT_RREN_RR6_Msk (0x1UL << WDT_RREN_RR6_Pos) /*!< Bit mask of RR6 field. */ +#define WDT_RREN_RR6_Disabled (0UL) /*!< RR[6] register is disabled. */ +#define WDT_RREN_RR6_Enabled (1UL) /*!< RR[6] register is enabled. */ + +/* Bit 5 : Enable or disable RR[5] register. */ +#define WDT_RREN_RR5_Pos (5UL) /*!< Position of RR5 field. */ +#define WDT_RREN_RR5_Msk (0x1UL << WDT_RREN_RR5_Pos) /*!< Bit mask of RR5 field. */ +#define WDT_RREN_RR5_Disabled (0UL) /*!< RR[5] register is disabled. */ +#define WDT_RREN_RR5_Enabled (1UL) /*!< RR[5] register is enabled. */ + +/* Bit 4 : Enable or disable RR[4] register. */ +#define WDT_RREN_RR4_Pos (4UL) /*!< Position of RR4 field. */ +#define WDT_RREN_RR4_Msk (0x1UL << WDT_RREN_RR4_Pos) /*!< Bit mask of RR4 field. */ +#define WDT_RREN_RR4_Disabled (0UL) /*!< RR[4] register is disabled. */ +#define WDT_RREN_RR4_Enabled (1UL) /*!< RR[4] register is enabled. */ + +/* Bit 3 : Enable or disable RR[3] register. */ +#define WDT_RREN_RR3_Pos (3UL) /*!< Position of RR3 field. */ +#define WDT_RREN_RR3_Msk (0x1UL << WDT_RREN_RR3_Pos) /*!< Bit mask of RR3 field. */ +#define WDT_RREN_RR3_Disabled (0UL) /*!< RR[3] register is disabled. */ +#define WDT_RREN_RR3_Enabled (1UL) /*!< RR[3] register is enabled. */ + +/* Bit 2 : Enable or disable RR[2] register. */ +#define WDT_RREN_RR2_Pos (2UL) /*!< Position of RR2 field. */ +#define WDT_RREN_RR2_Msk (0x1UL << WDT_RREN_RR2_Pos) /*!< Bit mask of RR2 field. */ +#define WDT_RREN_RR2_Disabled (0UL) /*!< RR[2] register is disabled. */ +#define WDT_RREN_RR2_Enabled (1UL) /*!< RR[2] register is enabled. */ + +/* Bit 1 : Enable or disable RR[1] register. */ +#define WDT_RREN_RR1_Pos (1UL) /*!< Position of RR1 field. */ +#define WDT_RREN_RR1_Msk (0x1UL << WDT_RREN_RR1_Pos) /*!< Bit mask of RR1 field. */ +#define WDT_RREN_RR1_Disabled (0UL) /*!< RR[1] register is disabled. */ +#define WDT_RREN_RR1_Enabled (1UL) /*!< RR[1] register is enabled. */ + +/* Bit 0 : Enable or disable RR[0] register. */ +#define WDT_RREN_RR0_Pos (0UL) /*!< Position of RR0 field. */ +#define WDT_RREN_RR0_Msk (0x1UL << WDT_RREN_RR0_Pos) /*!< Bit mask of RR0 field. */ +#define WDT_RREN_RR0_Disabled (0UL) /*!< RR[0] register is disabled. */ +#define WDT_RREN_RR0_Enabled (1UL) /*!< RR[0] register is enabled. */ + +/* Register: WDT_CONFIG */ +/* Description: Configuration register. */ + +/* Bit 3 : Configure the watchdog to pause or not while the CPU is halted by the debugger. */ +#define WDT_CONFIG_HALT_Pos (3UL) /*!< Position of HALT field. */ +#define WDT_CONFIG_HALT_Msk (0x1UL << WDT_CONFIG_HALT_Pos) /*!< Bit mask of HALT field. */ +#define WDT_CONFIG_HALT_Pause (0UL) /*!< Pause watchdog while the CPU is halted by the debugger. */ +#define WDT_CONFIG_HALT_Run (1UL) /*!< Do not pause watchdog while the CPU is halted by the debugger. */ + +/* Bit 0 : Configure the watchdog to pause or not while the CPU is sleeping. */ +#define WDT_CONFIG_SLEEP_Pos (0UL) /*!< Position of SLEEP field. */ +#define WDT_CONFIG_SLEEP_Msk (0x1UL << WDT_CONFIG_SLEEP_Pos) /*!< Bit mask of SLEEP field. */ +#define WDT_CONFIG_SLEEP_Pause (0UL) /*!< Pause watchdog while the CPU is asleep. */ +#define WDT_CONFIG_SLEEP_Run (1UL) /*!< Do not pause watchdog while the CPU is asleep. */ + +/* Register: WDT_RR */ +/* Description: Reload requests registers. */ + +/* Bits 31..0 : Reload register. */ +#define WDT_RR_RR_Pos (0UL) /*!< Position of RR field. */ +#define WDT_RR_RR_Msk (0xFFFFFFFFUL << WDT_RR_RR_Pos) /*!< Bit mask of RR field. */ +#define WDT_RR_RR_Reload (0x6E524635UL) /*!< Value to request a reload of the watchdog timer. */ + +/* Register: WDT_POWER */ +/* Description: Peripheral power control. */ + +/* Bit 0 : Peripheral power control. */ +#define WDT_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ +#define WDT_POWER_POWER_Msk (0x1UL << WDT_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ +#define WDT_POWER_POWER_Disabled (0UL) /*!< Module power disabled. */ +#define WDT_POWER_POWER_Enabled (1UL) /*!< Module power enabled. */ + + +/*lint --flb "Leave library region" */ +#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51_deprecated.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51_deprecated.h new file mode 100644 index 00000000000..3d2a262db26 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51_deprecated.h @@ -0,0 +1,455 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +#ifndef NRF51_DEPRECATED_H +#define NRF51_DEPRECATED_H + +/*lint ++flb "Enter library region */ + +/* This file is given to prevent your SW from not compiling with the updates made to nrf51.h and + * nrf51_bitfields.h. The macros defined in this file were available previously. Do not use these + * macros on purpose. Use the ones defined in nrf51.h and nrf51_bitfields.h instead. + */ + +/* NVMC */ +/* The register ERASEPROTECTEDPAGE is called ERASEPCR0 in the documentation. */ +#define ERASEPROTECTEDPAGE ERASEPCR0 + + +/* LPCOMP */ +/* The interrupt ISR was renamed. Adding old name to the macros. */ +#define LPCOMP_COMP_IRQHandler LPCOMP_IRQHandler +#define LPCOMP_COMP_IRQn LPCOMP_IRQn +/* Corrected typo in RESULT register. */ +#define LPCOMP_RESULT_RESULT_Bellow LPCOMP_RESULT_RESULT_Below + + +/* MPU */ +/* The field MPU.PERR0.LPCOMP_COMP was renamed. Added into deprecated in case somebody was using the macros defined for it. */ +#define MPU_PERR0_LPCOMP_COMP_Pos MPU_PERR0_LPCOMP_Pos +#define MPU_PERR0_LPCOMP_COMP_Msk MPU_PERR0_LPCOMP_Msk +#define MPU_PERR0_LPCOMP_COMP_InRegion1 MPU_PERR0_LPCOMP_InRegion1 +#define MPU_PERR0_LPCOMP_COMP_InRegion0 MPU_PERR0_LPCOMP_InRegion0 + + +/* POWER */ +/* The field POWER.RAMON.OFFRAM3 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */ +#define POWER_RAMON_OFFRAM3_Pos (19UL) +#define POWER_RAMON_OFFRAM3_Msk (0x1UL << POWER_RAMON_OFFRAM3_Pos) +#define POWER_RAMON_OFFRAM3_RAM3Off (0UL) +#define POWER_RAMON_OFFRAM3_RAM3On (1UL) +/* The field POWER.RAMON.OFFRAM2 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */ +#define POWER_RAMON_OFFRAM2_Pos (18UL) +#define POWER_RAMON_OFFRAM2_Msk (0x1UL << POWER_RAMON_OFFRAM2_Pos) +#define POWER_RAMON_OFFRAM2_RAM2Off (0UL) +#define POWER_RAMON_OFFRAM2_RAM2On (1UL) +/* The field POWER.RAMON.ONRAM3 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */ +#define POWER_RAMON_ONRAM3_Pos (3UL) +#define POWER_RAMON_ONRAM3_Msk (0x1UL << POWER_RAMON_ONRAM3_Pos) +#define POWER_RAMON_ONRAM3_RAM3Off (0UL) +#define POWER_RAMON_ONRAM3_RAM3On (1UL) +/* The field POWER.RAMON.ONRAM2 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */ +#define POWER_RAMON_ONRAM2_Pos (2UL) +#define POWER_RAMON_ONRAM2_Msk (0x1UL << POWER_RAMON_ONRAM2_Pos) +#define POWER_RAMON_ONRAM2_RAM2Off (0UL) +#define POWER_RAMON_ONRAM2_RAM2On (1UL) + + +/* RADIO */ +/* The enumerated value RADIO.TXPOWER.TXPOWER.Neg40dBm was renamed. Added into deprecated with the new macro name. */ +#define RADIO_TXPOWER_TXPOWER_Neg40dBm RADIO_TXPOWER_TXPOWER_Neg30dBm +/* The name of the field SKIPADDR was corrected. Old macros added for compatibility. */ +#define RADIO_CRCCNF_SKIP_ADDR_Pos RADIO_CRCCNF_SKIPADDR_Pos +#define RADIO_CRCCNF_SKIP_ADDR_Msk RADIO_CRCCNF_SKIPADDR_Msk +#define RADIO_CRCCNF_SKIP_ADDR_Include RADIO_CRCCNF_SKIPADDR_Include +#define RADIO_CRCCNF_SKIP_ADDR_Skip RADIO_CRCCNF_SKIPADDR_Skip +/* The name of the field PLLLOCK was corrected. Old macros added for compatibility. */ +#define RADIO_TEST_PLL_LOCK_Pos RADIO_TEST_PLLLOCK_Pos +#define RADIO_TEST_PLL_LOCK_Msk RADIO_TEST_PLLLOCK_Msk +#define RADIO_TEST_PLL_LOCK_Disabled RADIO_TEST_PLLLOCK_Disabled +#define RADIO_TEST_PLL_LOCK_Enabled RADIO_TEST_PLLLOCK_Enabled +/* The name of the field CONSTCARRIER was corrected. Old macros added for compatibility. */ +#define RADIO_TEST_CONST_CARRIER_Pos RADIO_TEST_CONSTCARRIER_Pos +#define RADIO_TEST_CONST_CARRIER_Msk RADIO_TEST_CONSTCARRIER_Msk +#define RADIO_TEST_CONST_CARRIER_Disabled RADIO_TEST_CONSTCARRIER_Disabled +#define RADIO_TEST_CONST_CARRIER_Enabled RADIO_TEST_CONSTCARRIER_Enabled + + +/* FICR */ +/* The registers FICR.SIZERAMBLOCK0, FICR.SIZERAMBLOCK1, FICR.SIZERAMBLOCK2 and FICR.SIZERAMBLOCK3 were renamed into an array. */ +#define SIZERAMBLOCK0 SIZERAMBLOCKS +#define SIZERAMBLOCK1 SIZERAMBLOCKS +#define SIZERAMBLOCK2 SIZERAMBLOCK[2] /*!< Note that this macro will disapear when SIZERAMBLOCK array is eliminated. SIZERAMBLOCK is a deprecated array. */ +#define SIZERAMBLOCK3 SIZERAMBLOCK[3] /*!< Note that this macro will disapear when SIZERAMBLOCK array is eliminated. SIZERAMBLOCK is a deprecated array. */ +/* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */ +#define DEVICEID0 DEVICEID[0] +#define DEVICEID1 DEVICEID[1] +/* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */ +#define ER0 ER[0] +#define ER1 ER[1] +#define ER2 ER[2] +#define ER3 ER[3] +/* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */ +#define IR0 IR[0] +#define IR1 IR[1] +#define IR2 IR[2] +#define IR3 IR[3] +/* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */ +#define DEVICEADDR0 DEVICEADDR[0] +#define DEVICEADDR1 DEVICEADDR[1] + + +/* PPI */ +/* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */ +#define TASKS_CHG0EN TASKS_CHG[0].EN +#define TASKS_CHG0DIS TASKS_CHG[0].DIS +#define TASKS_CHG1EN TASKS_CHG[1].EN +#define TASKS_CHG1DIS TASKS_CHG[1].DIS +#define TASKS_CHG2EN TASKS_CHG[2].EN +#define TASKS_CHG2DIS TASKS_CHG[2].DIS +#define TASKS_CHG3EN TASKS_CHG[3].EN +#define TASKS_CHG3DIS TASKS_CHG[3].DIS +/* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */ +#define CH0_EEP CH[0].EEP +#define CH0_TEP CH[0].TEP +#define CH1_EEP CH[1].EEP +#define CH1_TEP CH[1].TEP +#define CH2_EEP CH[2].EEP +#define CH2_TEP CH[2].TEP +#define CH3_EEP CH[3].EEP +#define CH3_TEP CH[3].TEP +#define CH4_EEP CH[4].EEP +#define CH4_TEP CH[4].TEP +#define CH5_EEP CH[5].EEP +#define CH5_TEP CH[5].TEP +#define CH6_EEP CH[6].EEP +#define CH6_TEP CH[6].TEP +#define CH7_EEP CH[7].EEP +#define CH7_TEP CH[7].TEP +#define CH8_EEP CH[8].EEP +#define CH8_TEP CH[8].TEP +#define CH9_EEP CH[9].EEP +#define CH9_TEP CH[9].TEP +#define CH10_EEP CH[10].EEP +#define CH10_TEP CH[10].TEP +#define CH11_EEP CH[11].EEP +#define CH11_TEP CH[11].TEP +#define CH12_EEP CH[12].EEP +#define CH12_TEP CH[12].TEP +#define CH13_EEP CH[13].EEP +#define CH13_TEP CH[13].TEP +#define CH14_EEP CH[14].EEP +#define CH14_TEP CH[14].TEP +#define CH15_EEP CH[15].EEP +#define CH15_TEP CH[15].TEP +/* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */ +#define CHG0 CHG[0] +#define CHG1 CHG[1] +#define CHG2 CHG[2] +#define CHG3 CHG[3] +/* All bitfield macros for the CHGx registers therefore changed name. */ +#define PPI_CHG0_CH15_Pos PPI_CHG_CH15_Pos +#define PPI_CHG0_CH15_Msk PPI_CHG_CH15_Msk +#define PPI_CHG0_CH15_Excluded PPI_CHG_CH15_Excluded +#define PPI_CHG0_CH15_Included PPI_CHG_CH15_Included +#define PPI_CHG0_CH14_Pos PPI_CHG_CH14_Pos +#define PPI_CHG0_CH14_Msk PPI_CHG_CH14_Msk +#define PPI_CHG0_CH14_Excluded PPI_CHG_CH14_Excluded +#define PPI_CHG0_CH14_Included PPI_CHG_CH14_Included +#define PPI_CHG0_CH13_Pos PPI_CHG_CH13_Pos +#define PPI_CHG0_CH13_Msk PPI_CHG_CH13_Msk +#define PPI_CHG0_CH13_Excluded PPI_CHG_CH13_Excluded +#define PPI_CHG0_CH13_Included PPI_CHG_CH13_Included +#define PPI_CHG0_CH12_Pos PPI_CHG_CH12_Pos +#define PPI_CHG0_CH12_Msk PPI_CHG_CH12_Msk +#define PPI_CHG0_CH12_Excluded PPI_CHG_CH12_Excluded +#define PPI_CHG0_CH12_Included PPI_CHG_CH12_Included +#define PPI_CHG0_CH11_Pos PPI_CHG_CH11_Pos +#define PPI_CHG0_CH11_Msk PPI_CHG_CH11_Msk +#define PPI_CHG0_CH11_Excluded PPI_CHG_CH11_Excluded +#define PPI_CHG0_CH11_Included PPI_CHG_CH11_Included +#define PPI_CHG0_CH10_Pos PPI_CHG_CH10_Pos +#define PPI_CHG0_CH10_Msk PPI_CHG_CH10_Msk +#define PPI_CHG0_CH10_Excluded PPI_CHG_CH10_Excluded +#define PPI_CHG0_CH10_Included PPI_CHG_CH10_Included +#define PPI_CHG0_CH9_Pos PPI_CHG_CH9_Pos +#define PPI_CHG0_CH9_Msk PPI_CHG_CH9_Msk +#define PPI_CHG0_CH9_Excluded PPI_CHG_CH9_Excluded +#define PPI_CHG0_CH9_Included PPI_CHG_CH9_Included +#define PPI_CHG0_CH8_Pos PPI_CHG_CH8_Pos +#define PPI_CHG0_CH8_Msk PPI_CHG_CH8_Msk +#define PPI_CHG0_CH8_Excluded PPI_CHG_CH8_Excluded +#define PPI_CHG0_CH8_Included PPI_CHG_CH8_Included +#define PPI_CHG0_CH7_Pos PPI_CHG_CH7_Pos +#define PPI_CHG0_CH7_Msk PPI_CHG_CH7_Msk +#define PPI_CHG0_CH7_Excluded PPI_CHG_CH7_Excluded +#define PPI_CHG0_CH7_Included PPI_CHG_CH7_Included +#define PPI_CHG0_CH6_Pos PPI_CHG_CH6_Pos +#define PPI_CHG0_CH6_Msk PPI_CHG_CH6_Msk +#define PPI_CHG0_CH6_Excluded PPI_CHG_CH6_Excluded +#define PPI_CHG0_CH6_Included PPI_CHG_CH6_Included +#define PPI_CHG0_CH5_Pos PPI_CHG_CH5_Pos +#define PPI_CHG0_CH5_Msk PPI_CHG_CH5_Msk +#define PPI_CHG0_CH5_Excluded PPI_CHG_CH5_Excluded +#define PPI_CHG0_CH5_Included PPI_CHG_CH5_Included +#define PPI_CHG0_CH4_Pos PPI_CHG_CH4_Pos +#define PPI_CHG0_CH4_Msk PPI_CHG_CH4_Msk +#define PPI_CHG0_CH4_Excluded PPI_CHG_CH4_Excluded +#define PPI_CHG0_CH4_Included PPI_CHG_CH4_Included +#define PPI_CHG0_CH3_Pos PPI_CHG_CH3_Pos +#define PPI_CHG0_CH3_Msk PPI_CHG_CH3_Msk +#define PPI_CHG0_CH3_Excluded PPI_CHG_CH3_Excluded +#define PPI_CHG0_CH3_Included PPI_CHG_CH3_Included +#define PPI_CHG0_CH2_Pos PPI_CHG_CH2_Pos +#define PPI_CHG0_CH2_Msk PPI_CHG_CH2_Msk +#define PPI_CHG0_CH2_Excluded PPI_CHG_CH2_Excluded +#define PPI_CHG0_CH2_Included PPI_CHG_CH2_Included +#define PPI_CHG0_CH1_Pos PPI_CHG_CH1_Pos +#define PPI_CHG0_CH1_Msk PPI_CHG_CH1_Msk +#define PPI_CHG0_CH1_Excluded PPI_CHG_CH1_Excluded +#define PPI_CHG0_CH1_Included PPI_CHG_CH1_Included +#define PPI_CHG0_CH0_Pos PPI_CHG_CH0_Pos +#define PPI_CHG0_CH0_Msk PPI_CHG_CH0_Msk +#define PPI_CHG0_CH0_Excluded PPI_CHG_CH0_Excluded +#define PPI_CHG0_CH0_Included PPI_CHG_CH0_Included +#define PPI_CHG1_CH15_Pos PPI_CHG_CH15_Pos +#define PPI_CHG1_CH15_Msk PPI_CHG_CH15_Msk +#define PPI_CHG1_CH15_Excluded PPI_CHG_CH15_Excluded +#define PPI_CHG1_CH15_Included PPI_CHG_CH15_Included +#define PPI_CHG1_CH14_Pos PPI_CHG_CH14_Pos +#define PPI_CHG1_CH14_Msk PPI_CHG_CH14_Msk +#define PPI_CHG1_CH14_Excluded PPI_CHG_CH14_Excluded +#define PPI_CHG1_CH14_Included PPI_CHG_CH14_Included +#define PPI_CHG1_CH13_Pos PPI_CHG_CH13_Pos +#define PPI_CHG1_CH13_Msk PPI_CHG_CH13_Msk +#define PPI_CHG1_CH13_Excluded PPI_CHG_CH13_Excluded +#define PPI_CHG1_CH13_Included PPI_CHG_CH13_Included +#define PPI_CHG1_CH12_Pos PPI_CHG_CH12_Pos +#define PPI_CHG1_CH12_Msk PPI_CHG_CH12_Msk +#define PPI_CHG1_CH12_Excluded PPI_CHG_CH12_Excluded +#define PPI_CHG1_CH12_Included PPI_CHG_CH12_Included +#define PPI_CHG1_CH11_Pos PPI_CHG_CH11_Pos +#define PPI_CHG1_CH11_Msk PPI_CHG_CH11_Msk +#define PPI_CHG1_CH11_Excluded PPI_CHG_CH11_Excluded +#define PPI_CHG1_CH11_Included PPI_CHG_CH11_Included +#define PPI_CHG1_CH10_Pos PPI_CHG_CH10_Pos +#define PPI_CHG1_CH10_Msk PPI_CHG_CH10_Msk +#define PPI_CHG1_CH10_Excluded PPI_CHG_CH10_Excluded +#define PPI_CHG1_CH10_Included PPI_CHG_CH10_Included +#define PPI_CHG1_CH9_Pos PPI_CHG_CH9_Pos +#define PPI_CHG1_CH9_Msk PPI_CHG_CH9_Msk +#define PPI_CHG1_CH9_Excluded PPI_CHG_CH9_Excluded +#define PPI_CHG1_CH9_Included PPI_CHG_CH9_Included +#define PPI_CHG1_CH8_Pos PPI_CHG_CH8_Pos +#define PPI_CHG1_CH8_Msk PPI_CHG_CH8_Msk +#define PPI_CHG1_CH8_Excluded PPI_CHG_CH8_Excluded +#define PPI_CHG1_CH8_Included PPI_CHG_CH8_Included +#define PPI_CHG1_CH7_Pos PPI_CHG_CH7_Pos +#define PPI_CHG1_CH7_Msk PPI_CHG_CH7_Msk +#define PPI_CHG1_CH7_Excluded PPI_CHG_CH7_Excluded +#define PPI_CHG1_CH7_Included PPI_CHG_CH7_Included +#define PPI_CHG1_CH6_Pos PPI_CHG_CH6_Pos +#define PPI_CHG1_CH6_Msk PPI_CHG_CH6_Msk +#define PPI_CHG1_CH6_Excluded PPI_CHG_CH6_Excluded +#define PPI_CHG1_CH6_Included PPI_CHG_CH6_Included +#define PPI_CHG1_CH5_Pos PPI_CHG_CH5_Pos +#define PPI_CHG1_CH5_Msk PPI_CHG_CH5_Msk +#define PPI_CHG1_CH5_Excluded PPI_CHG_CH5_Excluded +#define PPI_CHG1_CH5_Included PPI_CHG_CH5_Included +#define PPI_CHG1_CH4_Pos PPI_CHG_CH4_Pos +#define PPI_CHG1_CH4_Msk PPI_CHG_CH4_Msk +#define PPI_CHG1_CH4_Excluded PPI_CHG_CH4_Excluded +#define PPI_CHG1_CH4_Included PPI_CHG_CH4_Included +#define PPI_CHG1_CH3_Pos PPI_CHG_CH3_Pos +#define PPI_CHG1_CH3_Msk PPI_CHG_CH3_Msk +#define PPI_CHG1_CH3_Excluded PPI_CHG_CH3_Excluded +#define PPI_CHG1_CH3_Included PPI_CHG_CH3_Included +#define PPI_CHG1_CH2_Pos PPI_CHG_CH2_Pos +#define PPI_CHG1_CH2_Msk PPI_CHG_CH2_Msk +#define PPI_CHG1_CH2_Excluded PPI_CHG_CH2_Excluded +#define PPI_CHG1_CH2_Included PPI_CHG_CH2_Included +#define PPI_CHG1_CH1_Pos PPI_CHG_CH1_Pos +#define PPI_CHG1_CH1_Msk PPI_CHG_CH1_Msk +#define PPI_CHG1_CH1_Excluded PPI_CHG_CH1_Excluded +#define PPI_CHG1_CH1_Included PPI_CHG_CH1_Included +#define PPI_CHG1_CH0_Pos PPI_CHG_CH0_Pos +#define PPI_CHG1_CH0_Msk PPI_CHG_CH0_Msk +#define PPI_CHG1_CH0_Excluded PPI_CHG_CH0_Excluded +#define PPI_CHG1_CH0_Included PPI_CHG_CH0_Included +#define PPI_CHG2_CH15_Pos PPI_CHG_CH15_Pos +#define PPI_CHG2_CH15_Msk PPI_CHG_CH15_Msk +#define PPI_CHG2_CH15_Excluded PPI_CHG_CH15_Excluded +#define PPI_CHG2_CH15_Included PPI_CHG_CH15_Included +#define PPI_CHG2_CH14_Pos PPI_CHG_CH14_Pos +#define PPI_CHG2_CH14_Msk PPI_CHG_CH14_Msk +#define PPI_CHG2_CH14_Excluded PPI_CHG_CH14_Excluded +#define PPI_CHG2_CH14_Included PPI_CHG_CH14_Included +#define PPI_CHG2_CH13_Pos PPI_CHG_CH13_Pos +#define PPI_CHG2_CH13_Msk PPI_CHG_CH13_Msk +#define PPI_CHG2_CH13_Excluded PPI_CHG_CH13_Excluded +#define PPI_CHG2_CH13_Included PPI_CHG_CH13_Included +#define PPI_CHG2_CH12_Pos PPI_CHG_CH12_Pos +#define PPI_CHG2_CH12_Msk PPI_CHG_CH12_Msk +#define PPI_CHG2_CH12_Excluded PPI_CHG_CH12_Excluded +#define PPI_CHG2_CH12_Included PPI_CHG_CH12_Included +#define PPI_CHG2_CH11_Pos PPI_CHG_CH11_Pos +#define PPI_CHG2_CH11_Msk PPI_CHG_CH11_Msk +#define PPI_CHG2_CH11_Excluded PPI_CHG_CH11_Excluded +#define PPI_CHG2_CH11_Included PPI_CHG_CH11_Included +#define PPI_CHG2_CH10_Pos PPI_CHG_CH10_Pos +#define PPI_CHG2_CH10_Msk PPI_CHG_CH10_Msk +#define PPI_CHG2_CH10_Excluded PPI_CHG_CH10_Excluded +#define PPI_CHG2_CH10_Included PPI_CHG_CH10_Included +#define PPI_CHG2_CH9_Pos PPI_CHG_CH9_Pos +#define PPI_CHG2_CH9_Msk PPI_CHG_CH9_Msk +#define PPI_CHG2_CH9_Excluded PPI_CHG_CH9_Excluded +#define PPI_CHG2_CH9_Included PPI_CHG_CH9_Included +#define PPI_CHG2_CH8_Pos PPI_CHG_CH8_Pos +#define PPI_CHG2_CH8_Msk PPI_CHG_CH8_Msk +#define PPI_CHG2_CH8_Excluded PPI_CHG_CH8_Excluded +#define PPI_CHG2_CH8_Included PPI_CHG_CH8_Included +#define PPI_CHG2_CH7_Pos PPI_CHG_CH7_Pos +#define PPI_CHG2_CH7_Msk PPI_CHG_CH7_Msk +#define PPI_CHG2_CH7_Excluded PPI_CHG_CH7_Excluded +#define PPI_CHG2_CH7_Included PPI_CHG_CH7_Included +#define PPI_CHG2_CH6_Pos PPI_CHG_CH6_Pos +#define PPI_CHG2_CH6_Msk PPI_CHG_CH6_Msk +#define PPI_CHG2_CH6_Excluded PPI_CHG_CH6_Excluded +#define PPI_CHG2_CH6_Included PPI_CHG_CH6_Included +#define PPI_CHG2_CH5_Pos PPI_CHG_CH5_Pos +#define PPI_CHG2_CH5_Msk PPI_CHG_CH5_Msk +#define PPI_CHG2_CH5_Excluded PPI_CHG_CH5_Excluded +#define PPI_CHG2_CH5_Included PPI_CHG_CH5_Included +#define PPI_CHG2_CH4_Pos PPI_CHG_CH4_Pos +#define PPI_CHG2_CH4_Msk PPI_CHG_CH4_Msk +#define PPI_CHG2_CH4_Excluded PPI_CHG_CH4_Excluded +#define PPI_CHG2_CH4_Included PPI_CHG_CH4_Included +#define PPI_CHG2_CH3_Pos PPI_CHG_CH3_Pos +#define PPI_CHG2_CH3_Msk PPI_CHG_CH3_Msk +#define PPI_CHG2_CH3_Excluded PPI_CHG_CH3_Excluded +#define PPI_CHG2_CH3_Included PPI_CHG_CH3_Included +#define PPI_CHG2_CH2_Pos PPI_CHG_CH2_Pos +#define PPI_CHG2_CH2_Msk PPI_CHG_CH2_Msk +#define PPI_CHG2_CH2_Excluded PPI_CHG_CH2_Excluded +#define PPI_CHG2_CH2_Included PPI_CHG_CH2_Included +#define PPI_CHG2_CH1_Pos PPI_CHG_CH1_Pos +#define PPI_CHG2_CH1_Msk PPI_CHG_CH1_Msk +#define PPI_CHG2_CH1_Excluded PPI_CHG_CH1_Excluded +#define PPI_CHG2_CH1_Included PPI_CHG_CH1_Included +#define PPI_CHG2_CH0_Pos PPI_CHG_CH0_Pos +#define PPI_CHG2_CH0_Msk PPI_CHG_CH0_Msk +#define PPI_CHG2_CH0_Excluded PPI_CHG_CH0_Excluded +#define PPI_CHG2_CH0_Included PPI_CHG_CH0_Included +#define PPI_CHG3_CH15_Pos PPI_CHG_CH15_Pos +#define PPI_CHG3_CH15_Msk PPI_CHG_CH15_Msk +#define PPI_CHG3_CH15_Excluded PPI_CHG_CH15_Excluded +#define PPI_CHG3_CH15_Included PPI_CHG_CH15_Included +#define PPI_CHG3_CH14_Pos PPI_CHG_CH14_Pos +#define PPI_CHG3_CH14_Msk PPI_CHG_CH14_Msk +#define PPI_CHG3_CH14_Excluded PPI_CHG_CH14_Excluded +#define PPI_CHG3_CH14_Included PPI_CHG_CH14_Included +#define PPI_CHG3_CH13_Pos PPI_CHG_CH13_Pos +#define PPI_CHG3_CH13_Msk PPI_CHG_CH13_Msk +#define PPI_CHG3_CH13_Excluded PPI_CHG_CH13_Excluded +#define PPI_CHG3_CH13_Included PPI_CHG_CH13_Included +#define PPI_CHG3_CH12_Pos PPI_CHG_CH12_Pos +#define PPI_CHG3_CH12_Msk PPI_CHG_CH12_Msk +#define PPI_CHG3_CH12_Excluded PPI_CHG_CH12_Excluded +#define PPI_CHG3_CH12_Included PPI_CHG_CH12_Included +#define PPI_CHG3_CH11_Pos PPI_CHG_CH11_Pos +#define PPI_CHG3_CH11_Msk PPI_CHG_CH11_Msk +#define PPI_CHG3_CH11_Excluded PPI_CHG_CH11_Excluded +#define PPI_CHG3_CH11_Included PPI_CHG_CH11_Included +#define PPI_CHG3_CH10_Pos PPI_CHG_CH10_Pos +#define PPI_CHG3_CH10_Msk PPI_CHG_CH10_Msk +#define PPI_CHG3_CH10_Excluded PPI_CHG_CH10_Excluded +#define PPI_CHG3_CH10_Included PPI_CHG_CH10_Included +#define PPI_CHG3_CH9_Pos PPI_CHG_CH9_Pos +#define PPI_CHG3_CH9_Msk PPI_CHG_CH9_Msk +#define PPI_CHG3_CH9_Excluded PPI_CHG_CH9_Excluded +#define PPI_CHG3_CH9_Included PPI_CHG_CH9_Included +#define PPI_CHG3_CH8_Pos PPI_CHG_CH8_Pos +#define PPI_CHG3_CH8_Msk PPI_CHG_CH8_Msk +#define PPI_CHG3_CH8_Excluded PPI_CHG_CH8_Excluded +#define PPI_CHG3_CH8_Included PPI_CHG_CH8_Included +#define PPI_CHG3_CH7_Pos PPI_CHG_CH7_Pos +#define PPI_CHG3_CH7_Msk PPI_CHG_CH7_Msk +#define PPI_CHG3_CH7_Excluded PPI_CHG_CH7_Excluded +#define PPI_CHG3_CH7_Included PPI_CHG_CH7_Included +#define PPI_CHG3_CH6_Pos PPI_CHG_CH6_Pos +#define PPI_CHG3_CH6_Msk PPI_CHG_CH6_Msk +#define PPI_CHG3_CH6_Excluded PPI_CHG_CH6_Excluded +#define PPI_CHG3_CH6_Included PPI_CHG_CH6_Included +#define PPI_CHG3_CH5_Pos PPI_CHG_CH5_Pos +#define PPI_CHG3_CH5_Msk PPI_CHG_CH5_Msk +#define PPI_CHG3_CH5_Excluded PPI_CHG_CH5_Excluded +#define PPI_CHG3_CH5_Included PPI_CHG_CH5_Included +#define PPI_CHG3_CH4_Pos PPI_CHG_CH4_Pos +#define PPI_CHG3_CH4_Msk PPI_CHG_CH4_Msk +#define PPI_CHG3_CH4_Excluded PPI_CHG_CH4_Excluded +#define PPI_CHG3_CH4_Included PPI_CHG_CH4_Included +#define PPI_CHG3_CH3_Pos PPI_CHG_CH3_Pos +#define PPI_CHG3_CH3_Msk PPI_CHG_CH3_Msk +#define PPI_CHG3_CH3_Excluded PPI_CHG_CH3_Excluded +#define PPI_CHG3_CH3_Included PPI_CHG_CH3_Included +#define PPI_CHG3_CH2_Pos PPI_CHG_CH2_Pos +#define PPI_CHG3_CH2_Msk PPI_CHG_CH2_Msk +#define PPI_CHG3_CH2_Excluded PPI_CHG_CH2_Excluded +#define PPI_CHG3_CH2_Included PPI_CHG_CH2_Included +#define PPI_CHG3_CH1_Pos PPI_CHG_CH1_Pos +#define PPI_CHG3_CH1_Msk PPI_CHG_CH1_Msk +#define PPI_CHG3_CH1_Excluded PPI_CHG_CH1_Excluded +#define PPI_CHG3_CH1_Included PPI_CHG_CH1_Included +#define PPI_CHG3_CH0_Pos PPI_CHG_CH0_Pos +#define PPI_CHG3_CH0_Msk PPI_CHG_CH0_Msk +#define PPI_CHG3_CH0_Excluded PPI_CHG_CH0_Excluded +#define PPI_CHG3_CH0_Included PPI_CHG_CH0_Included + +/* SPIS */ +/* nRF51 devices do not have an SPIS0, only SPIS1. SPIS0_EASYDMA_MAXCNT_SIZE was therefore renamed. */ +#define SPIS0_EASYDMA_MAXCNT_SIZE SPIS1_EASYDMA_MAXCNT_SIZE + + + +/*lint --flb "Leave library region" */ + +#endif /* NRF51_DEPRECATED_H */ + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51_peripherals.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51_peripherals.h new file mode 100644 index 00000000000..e533ad521cd --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51_peripherals.h @@ -0,0 +1,164 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +#ifndef _NRF51_PERIPHERALS_H +#define _NRF51_PERIPHERALS_H + + +/* Power Peripheral */ +#define POWER_PRESENT +#define POWER_COUNT 1 + +#define POWER_FEATURE_RAMON_REGISTERS_PRESENT + +/* Software Interrupts */ +#define SWI_PRESENT +#define SWI_COUNT 6 + +/* GPIO */ +#define GPIO_PRESENT +#define GPIO_COUNT 1 + +#define P0_PIN_NUM 32 + +/* MPU and BPROT */ +#define BPROT_PRESENT + +#define BPROT_REGIONS_SIZE 4096 +#define BPROT_REGIONS_NUM 64 + +/* Radio */ +#define RADIO_PRESENT +#define RADIO_COUNT 1 + +/* Accelerated Address Resolver */ +#define AAR_PRESENT +#define AAR_COUNT 1 + +#define AAR_MAX_IRK_NUM 8 + +/* AES Electronic CodeBook mode encryption */ +#define ECB_PRESENT +#define ECB_COUNT 1 + +/* AES CCM mode encryption */ +#define CCM_PRESENT +#define CCM_COUNT 1 + +/* Peripheral to Peripheral Interconnect */ +#define PPI_PRESENT +#define PPI_COUNT 1 + +#define PPI_CH_NUM 16 +#define PPI_FIXED_CH_NUM 12 +#define PPI_GROUP_NUM 4 + +/* Timer/Counter */ +#define TIMER_PRESENT +#define TIMER_COUNT 3 + +#define TIMER0_MAX_SIZE 32 +#define TIMER1_MAX_SIZE 16 +#define TIMER2_MAX_SIZE 16 + +#define TIMER0_CC_NUM 4 +#define TIMER1_CC_NUM 4 +#define TIMER2_CC_NUM 4 + +/* Real Time Counter */ +#define RTC_PRESENT +#define RTC_COUNT 2 + +#define RTC0_CC_NUM 3 +#define RTC1_CC_NUM 4 + +/* RNG */ +#define RNG_PRESENT +#define RNG_COUNT 1 + +/* Watchdog Timer */ +#define WDT_PRESENT +#define WDT_COUNT 1 + +/* Temperature Sensor */ +#define TEMP_PRESENT +#define TEMP_COUNT 1 + +/* Serial Peripheral Interface Master */ +#define SPI_PRESENT +#define SPI_COUNT 2 + +/* Serial Peripheral Interface Slave with DMA */ +#define SPIS_PRESENT +#define SPIS_COUNT 1 + +#define SPIS1_EASYDMA_MAXCNT_SIZE 8 + +/* Two Wire Interface Master */ +#define TWI_PRESENT +#define TWI_COUNT 2 + +/* Universal Asynchronous Receiver-Transmitter */ +#define UART_PRESENT +#define UART_COUNT 1 + +/* Quadrature Decoder */ +#define QDEC_PRESENT +#define QDEC_COUNT 1 + +/* Analog to Digital Converter */ +#define ADC_PRESENT +#define ADC_COUNT 1 + +/* GPIO Tasks and Events */ +#define GPIOTE_PRESENT +#define GPIOTE_COUNT 1 + +#define GPIOTE_CH_NUM 4 + +/* Low Power Comparator */ +#define LPCOMP_PRESENT +#define LPCOMP_COUNT 1 + +#define LPCOMP_REFSEL_RESOLUTION 8 + + +#endif // _NRF51_PERIPHERALS_H diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51_to_nrf52.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51_to_nrf52.h new file mode 100644 index 00000000000..6bbb7cc238c --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51_to_nrf52.h @@ -0,0 +1,963 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +#ifndef NRF51_TO_NRF52_H +#define NRF51_TO_NRF52_H + +/*lint ++flb "Enter library region */ + +/* This file is given to prevent your SW from not compiling with the name changes between nRF51 and nRF52 devices. + * It redefines the old nRF51 names into the new ones as long as the functionality is still supported. If the + * functionality is gone, there old names are not defined, so compilation will fail. Note that also includes macros + * from the nrf51_deprecated.h file. */ + + +/* IRQ */ +/* Several peripherals have been added to several indexes. Names of IRQ handlers and IRQ numbers have changed. */ +#define UART0_IRQHandler UARTE0_UART0_IRQHandler +#define SPI0_TWI0_IRQHandler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler +#define SPI1_TWI1_IRQHandler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler +#define ADC_IRQHandler SAADC_IRQHandler +#define LPCOMP_IRQHandler COMP_LPCOMP_IRQHandler +#define SWI0_IRQHandler SWI0_EGU0_IRQHandler +#define SWI1_IRQHandler SWI1_EGU1_IRQHandler +#define SWI2_IRQHandler SWI2_EGU2_IRQHandler +#define SWI3_IRQHandler SWI3_EGU3_IRQHandler +#define SWI4_IRQHandler SWI4_EGU4_IRQHandler +#define SWI5_IRQHandler SWI5_EGU5_IRQHandler + +#define UART0_IRQn UARTE0_UART0_IRQn +#define SPI0_TWI0_IRQn SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn +#define SPI1_TWI1_IRQn SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn +#define ADC_IRQn SAADC_IRQn +#define LPCOMP_IRQn COMP_LPCOMP_IRQn +#define SWI0_IRQn SWI0_EGU0_IRQn +#define SWI1_IRQn SWI1_EGU1_IRQn +#define SWI2_IRQn SWI2_EGU2_IRQn +#define SWI3_IRQn SWI3_EGU3_IRQn +#define SWI4_IRQn SWI4_EGU4_IRQn +#define SWI5_IRQn SWI5_EGU5_IRQn + + +/* UICR */ +/* Register RBPCONF was renamed to APPROTECT. */ +#define RBPCONF APPROTECT + +#define UICR_RBPCONF_PALL_Pos UICR_APPROTECT_PALL_Pos +#define UICR_RBPCONF_PALL_Msk UICR_APPROTECT_PALL_Msk +#define UICR_RBPCONF_PALL_Enabled UICR_APPROTECT_PALL_Enabled +#define UICR_RBPCONF_PALL_Disabled UICR_APPROTECT_PALL_Disabled + + +/* GPIO */ +/* GPIO port was renamed to P0. */ +#define NRF_GPIO NRF_P0 +#define NRF_GPIO_BASE NRF_P0_BASE + + +/* QDEC */ +/* The registers PSELA, PSELB and PSELLED were restructured into a struct. */ +#define PSELLED PSEL.LED +#define PSELA PSEL.A +#define PSELB PSEL.B + + +/* SPIS */ +/* The registers PSELSCK, PSELMISO, PSELMOSI, PSELCSN were restructured into a struct. */ +#define PSELSCK PSEL.SCK +#define PSELMISO PSEL.MISO +#define PSELMOSI PSEL.MOSI +#define PSELCSN PSEL.CSN + +/* The registers RXDPTR, MAXRX, AMOUNTRX were restructured into a struct */ +#define RXDPTR RXD.PTR +#define MAXRX RXD.MAXCNT +#define AMOUNTRX RXD.AMOUNT + +#define SPIS_MAXRX_MAXRX_Pos SPIS_RXD_MAXCNT_MAXCNT_Pos +#define SPIS_MAXRX_MAXRX_Msk SPIS_RXD_MAXCNT_MAXCNT_Msk + +#define SPIS_AMOUNTRX_AMOUNTRX_Pos SPIS_RXD_AMOUNT_AMOUNT_Pos +#define SPIS_AMOUNTRX_AMOUNTRX_Msk SPIS_RXD_AMOUNT_AMOUNT_Msk + +/* The registers TXDPTR, MAXTX, AMOUNTTX were restructured into a struct */ +#define TXDPTR TXD.PTR +#define MAXTX TXD.MAXCNT +#define AMOUNTTX TXD.AMOUNT + +#define SPIS_MAXTX_MAXTX_Pos SPIS_TXD_MAXCNT_MAXCNT_Pos +#define SPIS_MAXTX_MAXTX_Msk SPIS_TXD_MAXCNT_MAXCNT_Msk + +#define SPIS_AMOUNTTX_AMOUNTTX_Pos SPIS_TXD_AMOUNT_AMOUNT_Pos +#define SPIS_AMOUNTTX_AMOUNTTX_Msk SPIS_TXD_AMOUNT_AMOUNT_Msk + + +/* MPU */ +/* Part of MPU module was renamed BPROT, while the rest was eliminated. */ +#define NRF_MPU NRF_BPROT + +/* Register DISABLEINDEBUG macros were affected. */ +#define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Pos +#define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Msk BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Msk +#define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Enabled BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Enabled +#define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Disabled BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Disabled + +/* Registers PROTENSET0 and PROTENSET1 were affected and renamed as CONFIG0 and CONFIG1. */ +#define PROTENSET0 CONFIG0 +#define PROTENSET1 CONFIG1 + +#define MPU_PROTENSET1_PROTREG63_Pos BPROT_CONFIG1_REGION63_Pos +#define MPU_PROTENSET1_PROTREG63_Msk BPROT_CONFIG1_REGION63_Msk +#define MPU_PROTENSET1_PROTREG63_Disabled BPROT_CONFIG1_REGION63_Disabled +#define MPU_PROTENSET1_PROTREG63_Enabled BPROT_CONFIG1_REGION63_Enabled +#define MPU_PROTENSET1_PROTREG63_Set BPROT_CONFIG1_REGION63_Enabled + +#define MPU_PROTENSET1_PROTREG62_Pos BPROT_CONFIG1_REGION62_Pos +#define MPU_PROTENSET1_PROTREG62_Msk BPROT_CONFIG1_REGION62_Msk +#define MPU_PROTENSET1_PROTREG62_Disabled BPROT_CONFIG1_REGION62_Disabled +#define MPU_PROTENSET1_PROTREG62_Enabled BPROT_CONFIG1_REGION62_Enabled +#define MPU_PROTENSET1_PROTREG62_Set BPROT_CONFIG1_REGION62_Enabled + +#define MPU_PROTENSET1_PROTREG61_Pos BPROT_CONFIG1_REGION61_Pos +#define MPU_PROTENSET1_PROTREG61_Msk BPROT_CONFIG1_REGION61_Msk +#define MPU_PROTENSET1_PROTREG61_Disabled BPROT_CONFIG1_REGION61_Disabled +#define MPU_PROTENSET1_PROTREG61_Enabled BPROT_CONFIG1_REGION61_Enabled +#define MPU_PROTENSET1_PROTREG61_Set BPROT_CONFIG1_REGION61_Enabled + +#define MPU_PROTENSET1_PROTREG60_Pos BPROT_CONFIG1_REGION60_Pos +#define MPU_PROTENSET1_PROTREG60_Msk BPROT_CONFIG1_REGION60_Msk +#define MPU_PROTENSET1_PROTREG60_Disabled BPROT_CONFIG1_REGION60_Disabled +#define MPU_PROTENSET1_PROTREG60_Enabled BPROT_CONFIG1_REGION60_Enabled +#define MPU_PROTENSET1_PROTREG60_Set BPROT_CONFIG1_REGION60_Enabled + +#define MPU_PROTENSET1_PROTREG59_Pos BPROT_CONFIG1_REGION59_Pos +#define MPU_PROTENSET1_PROTREG59_Msk BPROT_CONFIG1_REGION59_Msk +#define MPU_PROTENSET1_PROTREG59_Disabled BPROT_CONFIG1_REGION59_Disabled +#define MPU_PROTENSET1_PROTREG59_Enabled BPROT_CONFIG1_REGION59_Enabled +#define MPU_PROTENSET1_PROTREG59_Set BPROT_CONFIG1_REGION59_Enabled + +#define MPU_PROTENSET1_PROTREG58_Pos BPROT_CONFIG1_REGION58_Pos +#define MPU_PROTENSET1_PROTREG58_Msk BPROT_CONFIG1_REGION58_Msk +#define MPU_PROTENSET1_PROTREG58_Disabled BPROT_CONFIG1_REGION58_Disabled +#define MPU_PROTENSET1_PROTREG58_Enabled BPROT_CONFIG1_REGION58_Enabled +#define MPU_PROTENSET1_PROTREG58_Set BPROT_CONFIG1_REGION58_Enabled + +#define MPU_PROTENSET1_PROTREG57_Pos BPROT_CONFIG1_REGION57_Pos +#define MPU_PROTENSET1_PROTREG57_Msk BPROT_CONFIG1_REGION57_Msk +#define MPU_PROTENSET1_PROTREG57_Disabled BPROT_CONFIG1_REGION57_Disabled +#define MPU_PROTENSET1_PROTREG57_Enabled BPROT_CONFIG1_REGION57_Enabled +#define MPU_PROTENSET1_PROTREG57_Set BPROT_CONFIG1_REGION57_Enabled + +#define MPU_PROTENSET1_PROTREG56_Pos BPROT_CONFIG1_REGION56_Pos +#define MPU_PROTENSET1_PROTREG56_Msk BPROT_CONFIG1_REGION56_Msk +#define MPU_PROTENSET1_PROTREG56_Disabled BPROT_CONFIG1_REGION56_Disabled +#define MPU_PROTENSET1_PROTREG56_Enabled BPROT_CONFIG1_REGION56_Enabled +#define MPU_PROTENSET1_PROTREG56_Set BPROT_CONFIG1_REGION56_Enabled + +#define MPU_PROTENSET1_PROTREG55_Pos BPROT_CONFIG1_REGION55_Pos +#define MPU_PROTENSET1_PROTREG55_Msk BPROT_CONFIG1_REGION55_Msk +#define MPU_PROTENSET1_PROTREG55_Disabled BPROT_CONFIG1_REGION55_Disabled +#define MPU_PROTENSET1_PROTREG55_Enabled BPROT_CONFIG1_REGION55_Enabled +#define MPU_PROTENSET1_PROTREG55_Set BPROT_CONFIG1_REGION55_Enabled + +#define MPU_PROTENSET1_PROTREG54_Pos BPROT_CONFIG1_REGION54_Pos +#define MPU_PROTENSET1_PROTREG54_Msk BPROT_CONFIG1_REGION54_Msk +#define MPU_PROTENSET1_PROTREG54_Disabled BPROT_CONFIG1_REGION54_Disabled +#define MPU_PROTENSET1_PROTREG54_Enabled BPROT_CONFIG1_REGION54_Enabled +#define MPU_PROTENSET1_PROTREG54_Set BPROT_CONFIG1_REGION54_Enabled + +#define MPU_PROTENSET1_PROTREG53_Pos BPROT_CONFIG1_REGION53_Pos +#define MPU_PROTENSET1_PROTREG53_Msk BPROT_CONFIG1_REGION53_Msk +#define MPU_PROTENSET1_PROTREG53_Disabled BPROT_CONFIG1_REGION53_Disabled +#define MPU_PROTENSET1_PROTREG53_Enabled BPROT_CONFIG1_REGION53_Enabled +#define MPU_PROTENSET1_PROTREG53_Set BPROT_CONFIG1_REGION53_Enabled + +#define MPU_PROTENSET1_PROTREG52_Pos BPROT_CONFIG1_REGION52_Pos +#define MPU_PROTENSET1_PROTREG52_Msk BPROT_CONFIG1_REGION52_Msk +#define MPU_PROTENSET1_PROTREG52_Disabled BPROT_CONFIG1_REGION52_Disabled +#define MPU_PROTENSET1_PROTREG52_Enabled BPROT_CONFIG1_REGION52_Enabled +#define MPU_PROTENSET1_PROTREG52_Set BPROT_CONFIG1_REGION52_Enabled + +#define MPU_PROTENSET1_PROTREG51_Pos BPROT_CONFIG1_REGION51_Pos +#define MPU_PROTENSET1_PROTREG51_Msk BPROT_CONFIG1_REGION51_Msk +#define MPU_PROTENSET1_PROTREG51_Disabled BPROT_CONFIG1_REGION51_Disabled +#define MPU_PROTENSET1_PROTREG51_Enabled BPROT_CONFIG1_REGION51_Enabled +#define MPU_PROTENSET1_PROTREG51_Set BPROT_CONFIG1_REGION51_Enabled + +#define MPU_PROTENSET1_PROTREG50_Pos BPROT_CONFIG1_REGION50_Pos +#define MPU_PROTENSET1_PROTREG50_Msk BPROT_CONFIG1_REGION50_Msk +#define MPU_PROTENSET1_PROTREG50_Disabled BPROT_CONFIG1_REGION50_Disabled +#define MPU_PROTENSET1_PROTREG50_Enabled BPROT_CONFIG1_REGION50_Enabled +#define MPU_PROTENSET1_PROTREG50_Set BPROT_CONFIG1_REGION50_Enabled + +#define MPU_PROTENSET1_PROTREG49_Pos BPROT_CONFIG1_REGION49_Pos +#define MPU_PROTENSET1_PROTREG49_Msk BPROT_CONFIG1_REGION49_Msk +#define MPU_PROTENSET1_PROTREG49_Disabled BPROT_CONFIG1_REGION49_Disabled +#define MPU_PROTENSET1_PROTREG49_Enabled BPROT_CONFIG1_REGION49_Enabled +#define MPU_PROTENSET1_PROTREG49_Set BPROT_CONFIG1_REGION49_Enabled + +#define MPU_PROTENSET1_PROTREG48_Pos BPROT_CONFIG1_REGION48_Pos +#define MPU_PROTENSET1_PROTREG48_Msk BPROT_CONFIG1_REGION48_Msk +#define MPU_PROTENSET1_PROTREG48_Disabled BPROT_CONFIG1_REGION48_Disabled +#define MPU_PROTENSET1_PROTREG48_Enabled BPROT_CONFIG1_REGION48_Enabled +#define MPU_PROTENSET1_PROTREG48_Set BPROT_CONFIG1_REGION48_Enabled + +#define MPU_PROTENSET1_PROTREG47_Pos BPROT_CONFIG1_REGION47_Pos +#define MPU_PROTENSET1_PROTREG47_Msk BPROT_CONFIG1_REGION47_Msk +#define MPU_PROTENSET1_PROTREG47_Disabled BPROT_CONFIG1_REGION47_Disabled +#define MPU_PROTENSET1_PROTREG47_Enabled BPROT_CONFIG1_REGION47_Enabled +#define MPU_PROTENSET1_PROTREG47_Set BPROT_CONFIG1_REGION47_Enabled + +#define MPU_PROTENSET1_PROTREG46_Pos BPROT_CONFIG1_REGION46_Pos +#define MPU_PROTENSET1_PROTREG46_Msk BPROT_CONFIG1_REGION46_Msk +#define MPU_PROTENSET1_PROTREG46_Disabled BPROT_CONFIG1_REGION46_Disabled +#define MPU_PROTENSET1_PROTREG46_Enabled BPROT_CONFIG1_REGION46_Enabled +#define MPU_PROTENSET1_PROTREG46_Set BPROT_CONFIG1_REGION46_Enabled + +#define MPU_PROTENSET1_PROTREG45_Pos BPROT_CONFIG1_REGION45_Pos +#define MPU_PROTENSET1_PROTREG45_Msk BPROT_CONFIG1_REGION45_Msk +#define MPU_PROTENSET1_PROTREG45_Disabled BPROT_CONFIG1_REGION45_Disabled +#define MPU_PROTENSET1_PROTREG45_Enabled BPROT_CONFIG1_REGION45_Enabled +#define MPU_PROTENSET1_PROTREG45_Set BPROT_CONFIG1_REGION45_Enabled + +#define MPU_PROTENSET1_PROTREG44_Pos BPROT_CONFIG1_REGION44_Pos +#define MPU_PROTENSET1_PROTREG44_Msk BPROT_CONFIG1_REGION44_Msk +#define MPU_PROTENSET1_PROTREG44_Disabled BPROT_CONFIG1_REGION44_Disabled +#define MPU_PROTENSET1_PROTREG44_Enabled BPROT_CONFIG1_REGION44_Enabled +#define MPU_PROTENSET1_PROTREG44_Set BPROT_CONFIG1_REGION44_Enabled + +#define MPU_PROTENSET1_PROTREG43_Pos BPROT_CONFIG1_REGION43_Pos +#define MPU_PROTENSET1_PROTREG43_Msk BPROT_CONFIG1_REGION43_Msk +#define MPU_PROTENSET1_PROTREG43_Disabled BPROT_CONFIG1_REGION43_Disabled +#define MPU_PROTENSET1_PROTREG43_Enabled BPROT_CONFIG1_REGION43_Enabled +#define MPU_PROTENSET1_PROTREG43_Set BPROT_CONFIG1_REGION43_Enabled + +#define MPU_PROTENSET1_PROTREG42_Pos BPROT_CONFIG1_REGION42_Pos +#define MPU_PROTENSET1_PROTREG42_Msk BPROT_CONFIG1_REGION42_Msk +#define MPU_PROTENSET1_PROTREG42_Disabled BPROT_CONFIG1_REGION42_Disabled +#define MPU_PROTENSET1_PROTREG42_Enabled BPROT_CONFIG1_REGION42_Enabled +#define MPU_PROTENSET1_PROTREG42_Set BPROT_CONFIG1_REGION42_Enabled + +#define MPU_PROTENSET1_PROTREG41_Pos BPROT_CONFIG1_REGION41_Pos +#define MPU_PROTENSET1_PROTREG41_Msk BPROT_CONFIG1_REGION41_Msk +#define MPU_PROTENSET1_PROTREG41_Disabled BPROT_CONFIG1_REGION41_Disabled +#define MPU_PROTENSET1_PROTREG41_Enabled BPROT_CONFIG1_REGION41_Enabled +#define MPU_PROTENSET1_PROTREG41_Set BPROT_CONFIG1_REGION41_Enabled + +#define MPU_PROTENSET1_PROTREG40_Pos BPROT_CONFIG1_REGION40_Pos +#define MPU_PROTENSET1_PROTREG40_Msk BPROT_CONFIG1_REGION40_Msk +#define MPU_PROTENSET1_PROTREG40_Disabled BPROT_CONFIG1_REGION40_Disabled +#define MPU_PROTENSET1_PROTREG40_Enabled BPROT_CONFIG1_REGION40_Enabled +#define MPU_PROTENSET1_PROTREG40_Set BPROT_CONFIG1_REGION40_Enabled + +#define MPU_PROTENSET1_PROTREG39_Pos BPROT_CONFIG1_REGION39_Pos +#define MPU_PROTENSET1_PROTREG39_Msk BPROT_CONFIG1_REGION39_Msk +#define MPU_PROTENSET1_PROTREG39_Disabled BPROT_CONFIG1_REGION39_Disabled +#define MPU_PROTENSET1_PROTREG39_Enabled BPROT_CONFIG1_REGION39_Enabled +#define MPU_PROTENSET1_PROTREG39_Set BPROT_CONFIG1_REGION39_Enabled + +#define MPU_PROTENSET1_PROTREG38_Pos BPROT_CONFIG1_REGION38_Pos +#define MPU_PROTENSET1_PROTREG38_Msk BPROT_CONFIG1_REGION38_Msk +#define MPU_PROTENSET1_PROTREG38_Disabled BPROT_CONFIG1_REGION38_Disabled +#define MPU_PROTENSET1_PROTREG38_Enabled BPROT_CONFIG1_REGION38_Enabled +#define MPU_PROTENSET1_PROTREG38_Set BPROT_CONFIG1_REGION38_Enabled + +#define MPU_PROTENSET1_PROTREG37_Pos BPROT_CONFIG1_REGION37_Pos +#define MPU_PROTENSET1_PROTREG37_Msk BPROT_CONFIG1_REGION37_Msk +#define MPU_PROTENSET1_PROTREG37_Disabled BPROT_CONFIG1_REGION37_Disabled +#define MPU_PROTENSET1_PROTREG37_Enabled BPROT_CONFIG1_REGION37_Enabled +#define MPU_PROTENSET1_PROTREG37_Set BPROT_CONFIG1_REGION37_Enabled + +#define MPU_PROTENSET1_PROTREG36_Pos BPROT_CONFIG1_REGION36_Pos +#define MPU_PROTENSET1_PROTREG36_Msk BPROT_CONFIG1_REGION36_Msk +#define MPU_PROTENSET1_PROTREG36_Disabled BPROT_CONFIG1_REGION36_Disabled +#define MPU_PROTENSET1_PROTREG36_Enabled BPROT_CONFIG1_REGION36_Enabled +#define MPU_PROTENSET1_PROTREG36_Set BPROT_CONFIG1_REGION36_Enabled + +#define MPU_PROTENSET1_PROTREG35_Pos BPROT_CONFIG1_REGION35_Pos +#define MPU_PROTENSET1_PROTREG35_Msk BPROT_CONFIG1_REGION35_Msk +#define MPU_PROTENSET1_PROTREG35_Disabled BPROT_CONFIG1_REGION35_Disabled +#define MPU_PROTENSET1_PROTREG35_Enabled BPROT_CONFIG1_REGION35_Enabled +#define MPU_PROTENSET1_PROTREG35_Set BPROT_CONFIG1_REGION35_Enabled + +#define MPU_PROTENSET1_PROTREG34_Pos BPROT_CONFIG1_REGION34_Pos +#define MPU_PROTENSET1_PROTREG34_Msk BPROT_CONFIG1_REGION34_Msk +#define MPU_PROTENSET1_PROTREG34_Disabled BPROT_CONFIG1_REGION34_Disabled +#define MPU_PROTENSET1_PROTREG34_Enabled BPROT_CONFIG1_REGION34_Enabled +#define MPU_PROTENSET1_PROTREG34_Set BPROT_CONFIG1_REGION34_Enabled + +#define MPU_PROTENSET1_PROTREG33_Pos BPROT_CONFIG1_REGION33_Pos +#define MPU_PROTENSET1_PROTREG33_Msk BPROT_CONFIG1_REGION33_Msk +#define MPU_PROTENSET1_PROTREG33_Disabled BPROT_CONFIG1_REGION33_Disabled +#define MPU_PROTENSET1_PROTREG33_Enabled BPROT_CONFIG1_REGION33_Enabled +#define MPU_PROTENSET1_PROTREG33_Set BPROT_CONFIG1_REGION33_Enabled + +#define MPU_PROTENSET1_PROTREG32_Pos BPROT_CONFIG1_REGION32_Pos +#define MPU_PROTENSET1_PROTREG32_Msk BPROT_CONFIG1_REGION32_Msk +#define MPU_PROTENSET1_PROTREG32_Disabled BPROT_CONFIG1_REGION32_Disabled +#define MPU_PROTENSET1_PROTREG32_Enabled BPROT_CONFIG1_REGION32_Enabled +#define MPU_PROTENSET1_PROTREG32_Set BPROT_CONFIG1_REGION32_Enabled + +#define MPU_PROTENSET0_PROTREG31_Pos BPROT_CONFIG0_REGION31_Pos +#define MPU_PROTENSET0_PROTREG31_Msk BPROT_CONFIG0_REGION31_Msk +#define MPU_PROTENSET0_PROTREG31_Disabled BPROT_CONFIG0_REGION31_Disabled +#define MPU_PROTENSET0_PROTREG31_Enabled BPROT_CONFIG0_REGION31_Enabled +#define MPU_PROTENSET0_PROTREG31_Set BPROT_CONFIG0_REGION31_Enabled + +#define MPU_PROTENSET0_PROTREG30_Pos BPROT_CONFIG0_REGION30_Pos +#define MPU_PROTENSET0_PROTREG30_Msk BPROT_CONFIG0_REGION30_Msk +#define MPU_PROTENSET0_PROTREG30_Disabled BPROT_CONFIG0_REGION30_Disabled +#define MPU_PROTENSET0_PROTREG30_Enabled BPROT_CONFIG0_REGION30_Enabled +#define MPU_PROTENSET0_PROTREG30_Set BPROT_CONFIG0_REGION30_Enabled + +#define MPU_PROTENSET0_PROTREG29_Pos BPROT_CONFIG0_REGION29_Pos +#define MPU_PROTENSET0_PROTREG29_Msk BPROT_CONFIG0_REGION29_Msk +#define MPU_PROTENSET0_PROTREG29_Disabled BPROT_CONFIG0_REGION29_Disabled +#define MPU_PROTENSET0_PROTREG29_Enabled BPROT_CONFIG0_REGION29_Enabled +#define MPU_PROTENSET0_PROTREG29_Set BPROT_CONFIG0_REGION29_Enabled + +#define MPU_PROTENSET0_PROTREG28_Pos BPROT_CONFIG0_REGION28_Pos +#define MPU_PROTENSET0_PROTREG28_Msk BPROT_CONFIG0_REGION28_Msk +#define MPU_PROTENSET0_PROTREG28_Disabled BPROT_CONFIG0_REGION28_Disabled +#define MPU_PROTENSET0_PROTREG28_Enabled BPROT_CONFIG0_REGION28_Enabled +#define MPU_PROTENSET0_PROTREG28_Set BPROT_CONFIG0_REGION28_Enabled + +#define MPU_PROTENSET0_PROTREG27_Pos BPROT_CONFIG0_REGION27_Pos +#define MPU_PROTENSET0_PROTREG27_Msk BPROT_CONFIG0_REGION27_Msk +#define MPU_PROTENSET0_PROTREG27_Disabled BPROT_CONFIG0_REGION27_Disabled +#define MPU_PROTENSET0_PROTREG27_Enabled BPROT_CONFIG0_REGION27_Enabled +#define MPU_PROTENSET0_PROTREG27_Set BPROT_CONFIG0_REGION27_Enabled + +#define MPU_PROTENSET0_PROTREG26_Pos BPROT_CONFIG0_REGION26_Pos +#define MPU_PROTENSET0_PROTREG26_Msk BPROT_CONFIG0_REGION26_Msk +#define MPU_PROTENSET0_PROTREG26_Disabled BPROT_CONFIG0_REGION26_Disabled +#define MPU_PROTENSET0_PROTREG26_Enabled BPROT_CONFIG0_REGION26_Enabled +#define MPU_PROTENSET0_PROTREG26_Set BPROT_CONFIG0_REGION26_Enabled + +#define MPU_PROTENSET0_PROTREG25_Pos BPROT_CONFIG0_REGION25_Pos +#define MPU_PROTENSET0_PROTREG25_Msk BPROT_CONFIG0_REGION25_Msk +#define MPU_PROTENSET0_PROTREG25_Disabled BPROT_CONFIG0_REGION25_Disabled +#define MPU_PROTENSET0_PROTREG25_Enabled BPROT_CONFIG0_REGION25_Enabled +#define MPU_PROTENSET0_PROTREG25_Set BPROT_CONFIG0_REGION25_Enabled + +#define MPU_PROTENSET0_PROTREG24_Pos BPROT_CONFIG0_REGION24_Pos +#define MPU_PROTENSET0_PROTREG24_Msk BPROT_CONFIG0_REGION24_Msk +#define MPU_PROTENSET0_PROTREG24_Disabled BPROT_CONFIG0_REGION24_Disabled +#define MPU_PROTENSET0_PROTREG24_Enabled BPROT_CONFIG0_REGION24_Enabled +#define MPU_PROTENSET0_PROTREG24_Set BPROT_CONFIG0_REGION24_Enabled + +#define MPU_PROTENSET0_PROTREG23_Pos BPROT_CONFIG0_REGION23_Pos +#define MPU_PROTENSET0_PROTREG23_Msk BPROT_CONFIG0_REGION23_Msk +#define MPU_PROTENSET0_PROTREG23_Disabled BPROT_CONFIG0_REGION23_Disabled +#define MPU_PROTENSET0_PROTREG23_Enabled BPROT_CONFIG0_REGION23_Enabled +#define MPU_PROTENSET0_PROTREG23_Set BPROT_CONFIG0_REGION23_Enabled + +#define MPU_PROTENSET0_PROTREG22_Pos BPROT_CONFIG0_REGION22_Pos +#define MPU_PROTENSET0_PROTREG22_Msk BPROT_CONFIG0_REGION22_Msk +#define MPU_PROTENSET0_PROTREG22_Disabled BPROT_CONFIG0_REGION22_Disabled +#define MPU_PROTENSET0_PROTREG22_Enabled BPROT_CONFIG0_REGION22_Enabled +#define MPU_PROTENSET0_PROTREG22_Set BPROT_CONFIG0_REGION22_Enabled + +#define MPU_PROTENSET0_PROTREG21_Pos BPROT_CONFIG0_REGION21_Pos +#define MPU_PROTENSET0_PROTREG21_Msk BPROT_CONFIG0_REGION21_Msk +#define MPU_PROTENSET0_PROTREG21_Disabled BPROT_CONFIG0_REGION21_Disabled +#define MPU_PROTENSET0_PROTREG21_Enabled BPROT_CONFIG0_REGION21_Enabled +#define MPU_PROTENSET0_PROTREG21_Set BPROT_CONFIG0_REGION21_Enabled + +#define MPU_PROTENSET0_PROTREG20_Pos BPROT_CONFIG0_REGION20_Pos +#define MPU_PROTENSET0_PROTREG20_Msk BPROT_CONFIG0_REGION20_Msk +#define MPU_PROTENSET0_PROTREG20_Disabled BPROT_CONFIG0_REGION20_Disabled +#define MPU_PROTENSET0_PROTREG20_Enabled BPROT_CONFIG0_REGION20_Enabled +#define MPU_PROTENSET0_PROTREG20_Set BPROT_CONFIG0_REGION20_Enabled + +#define MPU_PROTENSET0_PROTREG19_Pos BPROT_CONFIG0_REGION19_Pos +#define MPU_PROTENSET0_PROTREG19_Msk BPROT_CONFIG0_REGION19_Msk +#define MPU_PROTENSET0_PROTREG19_Disabled BPROT_CONFIG0_REGION19_Disabled +#define MPU_PROTENSET0_PROTREG19_Enabled BPROT_CONFIG0_REGION19_Enabled +#define MPU_PROTENSET0_PROTREG19_Set BPROT_CONFIG0_REGION19_Enabled + +#define MPU_PROTENSET0_PROTREG18_Pos BPROT_CONFIG0_REGION18_Pos +#define MPU_PROTENSET0_PROTREG18_Msk BPROT_CONFIG0_REGION18_Msk +#define MPU_PROTENSET0_PROTREG18_Disabled BPROT_CONFIG0_REGION18_Disabled +#define MPU_PROTENSET0_PROTREG18_Enabled BPROT_CONFIG0_REGION18_Enabled +#define MPU_PROTENSET0_PROTREG18_Set BPROT_CONFIG0_REGION18_Enabled + +#define MPU_PROTENSET0_PROTREG17_Pos BPROT_CONFIG0_REGION17_Pos +#define MPU_PROTENSET0_PROTREG17_Msk BPROT_CONFIG0_REGION17_Msk +#define MPU_PROTENSET0_PROTREG17_Disabled BPROT_CONFIG0_REGION17_Disabled +#define MPU_PROTENSET0_PROTREG17_Enabled BPROT_CONFIG0_REGION17_Enabled +#define MPU_PROTENSET0_PROTREG17_Set BPROT_CONFIG0_REGION17_Enabled + +#define MPU_PROTENSET0_PROTREG16_Pos BPROT_CONFIG0_REGION16_Pos +#define MPU_PROTENSET0_PROTREG16_Msk BPROT_CONFIG0_REGION16_Msk +#define MPU_PROTENSET0_PROTREG16_Disabled BPROT_CONFIG0_REGION16_Disabled +#define MPU_PROTENSET0_PROTREG16_Enabled BPROT_CONFIG0_REGION16_Enabled +#define MPU_PROTENSET0_PROTREG16_Set BPROT_CONFIG0_REGION16_Enabled + +#define MPU_PROTENSET0_PROTREG15_Pos BPROT_CONFIG0_REGION15_Pos +#define MPU_PROTENSET0_PROTREG15_Msk BPROT_CONFIG0_REGION15_Msk +#define MPU_PROTENSET0_PROTREG15_Disabled BPROT_CONFIG0_REGION15_Disabled +#define MPU_PROTENSET0_PROTREG15_Enabled BPROT_CONFIG0_REGION15_Enabled +#define MPU_PROTENSET0_PROTREG15_Set BPROT_CONFIG0_REGION15_Enabled + +#define MPU_PROTENSET0_PROTREG14_Pos BPROT_CONFIG0_REGION14_Pos +#define MPU_PROTENSET0_PROTREG14_Msk BPROT_CONFIG0_REGION14_Msk +#define MPU_PROTENSET0_PROTREG14_Disabled BPROT_CONFIG0_REGION14_Disabled +#define MPU_PROTENSET0_PROTREG14_Enabled BPROT_CONFIG0_REGION14_Enabled +#define MPU_PROTENSET0_PROTREG14_Set BPROT_CONFIG0_REGION14_Enabled + +#define MPU_PROTENSET0_PROTREG13_Pos BPROT_CONFIG0_REGION13_Pos +#define MPU_PROTENSET0_PROTREG13_Msk BPROT_CONFIG0_REGION13_Msk +#define MPU_PROTENSET0_PROTREG13_Disabled BPROT_CONFIG0_REGION13_Disabled +#define MPU_PROTENSET0_PROTREG13_Enabled BPROT_CONFIG0_REGION13_Enabled +#define MPU_PROTENSET0_PROTREG13_Set BPROT_CONFIG0_REGION13_Enabled + +#define MPU_PROTENSET0_PROTREG12_Pos BPROT_CONFIG0_REGION12_Pos +#define MPU_PROTENSET0_PROTREG12_Msk BPROT_CONFIG0_REGION12_Msk +#define MPU_PROTENSET0_PROTREG12_Disabled BPROT_CONFIG0_REGION12_Disabled +#define MPU_PROTENSET0_PROTREG12_Enabled BPROT_CONFIG0_REGION12_Enabled +#define MPU_PROTENSET0_PROTREG12_Set BPROT_CONFIG0_REGION12_Enabled + +#define MPU_PROTENSET0_PROTREG11_Pos BPROT_CONFIG0_REGION11_Pos +#define MPU_PROTENSET0_PROTREG11_Msk BPROT_CONFIG0_REGION11_Msk +#define MPU_PROTENSET0_PROTREG11_Disabled BPROT_CONFIG0_REGION11_Disabled +#define MPU_PROTENSET0_PROTREG11_Enabled BPROT_CONFIG0_REGION11_Enabled +#define MPU_PROTENSET0_PROTREG11_Set BPROT_CONFIG0_REGION11_Enabled + +#define MPU_PROTENSET0_PROTREG10_Pos BPROT_CONFIG0_REGION10_Pos +#define MPU_PROTENSET0_PROTREG10_Msk BPROT_CONFIG0_REGION10_Msk +#define MPU_PROTENSET0_PROTREG10_Disabled BPROT_CONFIG0_REGION10_Disabled +#define MPU_PROTENSET0_PROTREG10_Enabled BPROT_CONFIG0_REGION10_Enabled +#define MPU_PROTENSET0_PROTREG10_Set BPROT_CONFIG0_REGION10_Enabled + +#define MPU_PROTENSET0_PROTREG9_Pos BPROT_CONFIG0_REGION9_Pos +#define MPU_PROTENSET0_PROTREG9_Msk BPROT_CONFIG0_REGION9_Msk +#define MPU_PROTENSET0_PROTREG9_Disabled BPROT_CONFIG0_REGION9_Disabled +#define MPU_PROTENSET0_PROTREG9_Enabled BPROT_CONFIG0_REGION9_Enabled +#define MPU_PROTENSET0_PROTREG9_Set BPROT_CONFIG0_REGION9_Enabled + +#define MPU_PROTENSET0_PROTREG8_Pos BPROT_CONFIG0_REGION8_Pos +#define MPU_PROTENSET0_PROTREG8_Msk BPROT_CONFIG0_REGION8_Msk +#define MPU_PROTENSET0_PROTREG8_Disabled BPROT_CONFIG0_REGION8_Disabled +#define MPU_PROTENSET0_PROTREG8_Enabled BPROT_CONFIG0_REGION8_Enabled +#define MPU_PROTENSET0_PROTREG8_Set BPROT_CONFIG0_REGION8_Enabled + +#define MPU_PROTENSET0_PROTREG7_Pos BPROT_CONFIG0_REGION7_Pos +#define MPU_PROTENSET0_PROTREG7_Msk BPROT_CONFIG0_REGION7_Msk +#define MPU_PROTENSET0_PROTREG7_Disabled BPROT_CONFIG0_REGION7_Disabled +#define MPU_PROTENSET0_PROTREG7_Enabled BPROT_CONFIG0_REGION7_Enabled +#define MPU_PROTENSET0_PROTREG7_Set BPROT_CONFIG0_REGION7_Enabled + +#define MPU_PROTENSET0_PROTREG6_Pos BPROT_CONFIG0_REGION6_Pos +#define MPU_PROTENSET0_PROTREG6_Msk BPROT_CONFIG0_REGION6_Msk +#define MPU_PROTENSET0_PROTREG6_Disabled BPROT_CONFIG0_REGION6_Disabled +#define MPU_PROTENSET0_PROTREG6_Enabled BPROT_CONFIG0_REGION6_Enabled +#define MPU_PROTENSET0_PROTREG6_Set BPROT_CONFIG0_REGION6_Enabled + +#define MPU_PROTENSET0_PROTREG5_Pos BPROT_CONFIG0_REGION5_Pos +#define MPU_PROTENSET0_PROTREG5_Msk BPROT_CONFIG0_REGION5_Msk +#define MPU_PROTENSET0_PROTREG5_Disabled BPROT_CONFIG0_REGION5_Disabled +#define MPU_PROTENSET0_PROTREG5_Enabled BPROT_CONFIG0_REGION5_Enabled +#define MPU_PROTENSET0_PROTREG5_Set BPROT_CONFIG0_REGION5_Enabled + +#define MPU_PROTENSET0_PROTREG4_Pos BPROT_CONFIG0_REGION4_Pos +#define MPU_PROTENSET0_PROTREG4_Msk BPROT_CONFIG0_REGION4_Msk +#define MPU_PROTENSET0_PROTREG4_Disabled BPROT_CONFIG0_REGION4_Disabled +#define MPU_PROTENSET0_PROTREG4_Enabled BPROT_CONFIG0_REGION4_Enabled +#define MPU_PROTENSET0_PROTREG4_Set BPROT_CONFIG0_REGION4_Enabled + +#define MPU_PROTENSET0_PROTREG3_Pos BPROT_CONFIG0_REGION3_Pos +#define MPU_PROTENSET0_PROTREG3_Msk BPROT_CONFIG0_REGION3_Msk +#define MPU_PROTENSET0_PROTREG3_Disabled BPROT_CONFIG0_REGION3_Disabled +#define MPU_PROTENSET0_PROTREG3_Enabled BPROT_CONFIG0_REGION3_Enabled +#define MPU_PROTENSET0_PROTREG3_Set BPROT_CONFIG0_REGION3_Enabled + +#define MPU_PROTENSET0_PROTREG2_Pos BPROT_CONFIG0_REGION2_Pos +#define MPU_PROTENSET0_PROTREG2_Msk BPROT_CONFIG0_REGION2_Msk +#define MPU_PROTENSET0_PROTREG2_Disabled BPROT_CONFIG0_REGION2_Disabled +#define MPU_PROTENSET0_PROTREG2_Enabled BPROT_CONFIG0_REGION2_Enabled +#define MPU_PROTENSET0_PROTREG2_Set BPROT_CONFIG0_REGION2_Enabled + +#define MPU_PROTENSET0_PROTREG1_Pos BPROT_CONFIG0_REGION1_Pos +#define MPU_PROTENSET0_PROTREG1_Msk BPROT_CONFIG0_REGION1_Msk +#define MPU_PROTENSET0_PROTREG1_Disabled BPROT_CONFIG0_REGION1_Disabled +#define MPU_PROTENSET0_PROTREG1_Enabled BPROT_CONFIG0_REGION1_Enabled +#define MPU_PROTENSET0_PROTREG1_Set BPROT_CONFIG0_REGION1_Enabled + +#define MPU_PROTENSET0_PROTREG0_Pos BPROT_CONFIG0_REGION0_Pos +#define MPU_PROTENSET0_PROTREG0_Msk BPROT_CONFIG0_REGION0_Msk +#define MPU_PROTENSET0_PROTREG0_Disabled BPROT_CONFIG0_REGION0_Disabled +#define MPU_PROTENSET0_PROTREG0_Enabled BPROT_CONFIG0_REGION0_Enabled +#define MPU_PROTENSET0_PROTREG0_Set BPROT_CONFIG0_REGION0_Enabled + + +/* From nrf51_deprecated.h */ + +/* NVMC */ +/* The register ERASEPROTECTEDPAGE changed name to ERASEPCR0 in the documentation. */ +#define ERASEPROTECTEDPAGE ERASEPCR0 + + +/* IRQ */ +/* COMP module was eliminated. Adapted to nrf52 headers. */ +#define LPCOMP_COMP_IRQHandler COMP_LPCOMP_IRQHandler +#define LPCOMP_COMP_IRQn COMP_LPCOMP_IRQn + + +/* REFSEL register redefined enumerated values and added some more. */ +#define LPCOMP_REFSEL_REFSEL_SupplyOneEighthPrescaling LPCOMP_REFSEL_REFSEL_Ref1_8Vdd +#define LPCOMP_REFSEL_REFSEL_SupplyTwoEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref2_8Vdd +#define LPCOMP_REFSEL_REFSEL_SupplyThreeEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref3_8Vdd +#define LPCOMP_REFSEL_REFSEL_SupplyFourEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref4_8Vdd +#define LPCOMP_REFSEL_REFSEL_SupplyFiveEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref5_8Vdd +#define LPCOMP_REFSEL_REFSEL_SupplySixEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref6_8Vdd +#define LPCOMP_REFSEL_REFSEL_SupplySevenEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref7_8Vdd + + +/* RADIO */ +/* The name of the field SKIPADDR was corrected. Old macros added for compatibility. */ +#define RADIO_CRCCNF_SKIP_ADDR_Pos RADIO_CRCCNF_SKIPADDR_Pos +#define RADIO_CRCCNF_SKIP_ADDR_Msk RADIO_CRCCNF_SKIPADDR_Msk +#define RADIO_CRCCNF_SKIP_ADDR_Include RADIO_CRCCNF_SKIPADDR_Include +#define RADIO_CRCCNF_SKIP_ADDR_Skip RADIO_CRCCNF_SKIPADDR_Skip + + +/* FICR */ +/* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */ +#define DEVICEID0 DEVICEID[0] +#define DEVICEID1 DEVICEID[1] + +/* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */ +#define ER0 ER[0] +#define ER1 ER[1] +#define ER2 ER[2] +#define ER3 ER[3] + +/* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */ +#define IR0 IR[0] +#define IR1 IR[1] +#define IR2 IR[2] +#define IR3 IR[3] + +/* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */ +#define DEVICEADDR0 DEVICEADDR[0] +#define DEVICEADDR1 DEVICEADDR[1] + + +/* PPI */ +/* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */ +#define TASKS_CHG0EN TASKS_CHG[0].EN +#define TASKS_CHG0DIS TASKS_CHG[0].DIS +#define TASKS_CHG1EN TASKS_CHG[1].EN +#define TASKS_CHG1DIS TASKS_CHG[1].DIS +#define TASKS_CHG2EN TASKS_CHG[2].EN +#define TASKS_CHG2DIS TASKS_CHG[2].DIS +#define TASKS_CHG3EN TASKS_CHG[3].EN +#define TASKS_CHG3DIS TASKS_CHG[3].DIS + +/* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */ +#define CH0_EEP CH[0].EEP +#define CH0_TEP CH[0].TEP +#define CH1_EEP CH[1].EEP +#define CH1_TEP CH[1].TEP +#define CH2_EEP CH[2].EEP +#define CH2_TEP CH[2].TEP +#define CH3_EEP CH[3].EEP +#define CH3_TEP CH[3].TEP +#define CH4_EEP CH[4].EEP +#define CH4_TEP CH[4].TEP +#define CH5_EEP CH[5].EEP +#define CH5_TEP CH[5].TEP +#define CH6_EEP CH[6].EEP +#define CH6_TEP CH[6].TEP +#define CH7_EEP CH[7].EEP +#define CH7_TEP CH[7].TEP +#define CH8_EEP CH[8].EEP +#define CH8_TEP CH[8].TEP +#define CH9_EEP CH[9].EEP +#define CH9_TEP CH[9].TEP +#define CH10_EEP CH[10].EEP +#define CH10_TEP CH[10].TEP +#define CH11_EEP CH[11].EEP +#define CH11_TEP CH[11].TEP +#define CH12_EEP CH[12].EEP +#define CH12_TEP CH[12].TEP +#define CH13_EEP CH[13].EEP +#define CH13_TEP CH[13].TEP +#define CH14_EEP CH[14].EEP +#define CH14_TEP CH[14].TEP +#define CH15_EEP CH[15].EEP +#define CH15_TEP CH[15].TEP + +/* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */ +#define CHG0 CHG[0] +#define CHG1 CHG[1] +#define CHG2 CHG[2] +#define CHG3 CHG[3] + +/* All bitfield macros for the CHGx registers therefore changed name. */ +#define PPI_CHG0_CH15_Pos PPI_CHG_CH15_Pos +#define PPI_CHG0_CH15_Msk PPI_CHG_CH15_Msk +#define PPI_CHG0_CH15_Excluded PPI_CHG_CH15_Excluded +#define PPI_CHG0_CH15_Included PPI_CHG_CH15_Included + +#define PPI_CHG0_CH14_Pos PPI_CHG_CH14_Pos +#define PPI_CHG0_CH14_Msk PPI_CHG_CH14_Msk +#define PPI_CHG0_CH14_Excluded PPI_CHG_CH14_Excluded +#define PPI_CHG0_CH14_Included PPI_CHG_CH14_Included + +#define PPI_CHG0_CH13_Pos PPI_CHG_CH13_Pos +#define PPI_CHG0_CH13_Msk PPI_CHG_CH13_Msk +#define PPI_CHG0_CH13_Excluded PPI_CHG_CH13_Excluded +#define PPI_CHG0_CH13_Included PPI_CHG_CH13_Included + +#define PPI_CHG0_CH12_Pos PPI_CHG_CH12_Pos +#define PPI_CHG0_CH12_Msk PPI_CHG_CH12_Msk +#define PPI_CHG0_CH12_Excluded PPI_CHG_CH12_Excluded +#define PPI_CHG0_CH12_Included PPI_CHG_CH12_Included + +#define PPI_CHG0_CH11_Pos PPI_CHG_CH11_Pos +#define PPI_CHG0_CH11_Msk PPI_CHG_CH11_Msk +#define PPI_CHG0_CH11_Excluded PPI_CHG_CH11_Excluded +#define PPI_CHG0_CH11_Included PPI_CHG_CH11_Included + +#define PPI_CHG0_CH10_Pos PPI_CHG_CH10_Pos +#define PPI_CHG0_CH10_Msk PPI_CHG_CH10_Msk +#define PPI_CHG0_CH10_Excluded PPI_CHG_CH10_Excluded +#define PPI_CHG0_CH10_Included PPI_CHG_CH10_Included + +#define PPI_CHG0_CH9_Pos PPI_CHG_CH9_Pos +#define PPI_CHG0_CH9_Msk PPI_CHG_CH9_Msk +#define PPI_CHG0_CH9_Excluded PPI_CHG_CH9_Excluded +#define PPI_CHG0_CH9_Included PPI_CHG_CH9_Included + +#define PPI_CHG0_CH8_Pos PPI_CHG_CH8_Pos +#define PPI_CHG0_CH8_Msk PPI_CHG_CH8_Msk +#define PPI_CHG0_CH8_Excluded PPI_CHG_CH8_Excluded +#define PPI_CHG0_CH8_Included PPI_CHG_CH8_Included + +#define PPI_CHG0_CH7_Pos PPI_CHG_CH7_Pos +#define PPI_CHG0_CH7_Msk PPI_CHG_CH7_Msk +#define PPI_CHG0_CH7_Excluded PPI_CHG_CH7_Excluded +#define PPI_CHG0_CH7_Included PPI_CHG_CH7_Included + +#define PPI_CHG0_CH6_Pos PPI_CHG_CH6_Pos +#define PPI_CHG0_CH6_Msk PPI_CHG_CH6_Msk +#define PPI_CHG0_CH6_Excluded PPI_CHG_CH6_Excluded +#define PPI_CHG0_CH6_Included PPI_CHG_CH6_Included + +#define PPI_CHG0_CH5_Pos PPI_CHG_CH5_Pos +#define PPI_CHG0_CH5_Msk PPI_CHG_CH5_Msk +#define PPI_CHG0_CH5_Excluded PPI_CHG_CH5_Excluded +#define PPI_CHG0_CH5_Included PPI_CHG_CH5_Included + +#define PPI_CHG0_CH4_Pos PPI_CHG_CH4_Pos +#define PPI_CHG0_CH4_Msk PPI_CHG_CH4_Msk +#define PPI_CHG0_CH4_Excluded PPI_CHG_CH4_Excluded +#define PPI_CHG0_CH4_Included PPI_CHG_CH4_Included + +#define PPI_CHG0_CH3_Pos PPI_CHG_CH3_Pos +#define PPI_CHG0_CH3_Msk PPI_CHG_CH3_Msk +#define PPI_CHG0_CH3_Excluded PPI_CHG_CH3_Excluded +#define PPI_CHG0_CH3_Included PPI_CHG_CH3_Included + +#define PPI_CHG0_CH2_Pos PPI_CHG_CH2_Pos +#define PPI_CHG0_CH2_Msk PPI_CHG_CH2_Msk +#define PPI_CHG0_CH2_Excluded PPI_CHG_CH2_Excluded +#define PPI_CHG0_CH2_Included PPI_CHG_CH2_Included + +#define PPI_CHG0_CH1_Pos PPI_CHG_CH1_Pos +#define PPI_CHG0_CH1_Msk PPI_CHG_CH1_Msk +#define PPI_CHG0_CH1_Excluded PPI_CHG_CH1_Excluded +#define PPI_CHG0_CH1_Included PPI_CHG_CH1_Included + +#define PPI_CHG0_CH0_Pos PPI_CHG_CH0_Pos +#define PPI_CHG0_CH0_Msk PPI_CHG_CH0_Msk +#define PPI_CHG0_CH0_Excluded PPI_CHG_CH0_Excluded +#define PPI_CHG0_CH0_Included PPI_CHG_CH0_Included + +#define PPI_CHG1_CH15_Pos PPI_CHG_CH15_Pos +#define PPI_CHG1_CH15_Msk PPI_CHG_CH15_Msk +#define PPI_CHG1_CH15_Excluded PPI_CHG_CH15_Excluded +#define PPI_CHG1_CH15_Included PPI_CHG_CH15_Included + +#define PPI_CHG1_CH14_Pos PPI_CHG_CH14_Pos +#define PPI_CHG1_CH14_Msk PPI_CHG_CH14_Msk +#define PPI_CHG1_CH14_Excluded PPI_CHG_CH14_Excluded +#define PPI_CHG1_CH14_Included PPI_CHG_CH14_Included + +#define PPI_CHG1_CH13_Pos PPI_CHG_CH13_Pos +#define PPI_CHG1_CH13_Msk PPI_CHG_CH13_Msk +#define PPI_CHG1_CH13_Excluded PPI_CHG_CH13_Excluded +#define PPI_CHG1_CH13_Included PPI_CHG_CH13_Included + +#define PPI_CHG1_CH12_Pos PPI_CHG_CH12_Pos +#define PPI_CHG1_CH12_Msk PPI_CHG_CH12_Msk +#define PPI_CHG1_CH12_Excluded PPI_CHG_CH12_Excluded +#define PPI_CHG1_CH12_Included PPI_CHG_CH12_Included + +#define PPI_CHG1_CH11_Pos PPI_CHG_CH11_Pos +#define PPI_CHG1_CH11_Msk PPI_CHG_CH11_Msk +#define PPI_CHG1_CH11_Excluded PPI_CHG_CH11_Excluded +#define PPI_CHG1_CH11_Included PPI_CHG_CH11_Included + +#define PPI_CHG1_CH10_Pos PPI_CHG_CH10_Pos +#define PPI_CHG1_CH10_Msk PPI_CHG_CH10_Msk +#define PPI_CHG1_CH10_Excluded PPI_CHG_CH10_Excluded +#define PPI_CHG1_CH10_Included PPI_CHG_CH10_Included + +#define PPI_CHG1_CH9_Pos PPI_CHG_CH9_Pos +#define PPI_CHG1_CH9_Msk PPI_CHG_CH9_Msk +#define PPI_CHG1_CH9_Excluded PPI_CHG_CH9_Excluded +#define PPI_CHG1_CH9_Included PPI_CHG_CH9_Included + +#define PPI_CHG1_CH8_Pos PPI_CHG_CH8_Pos +#define PPI_CHG1_CH8_Msk PPI_CHG_CH8_Msk +#define PPI_CHG1_CH8_Excluded PPI_CHG_CH8_Excluded +#define PPI_CHG1_CH8_Included PPI_CHG_CH8_Included + +#define PPI_CHG1_CH7_Pos PPI_CHG_CH7_Pos +#define PPI_CHG1_CH7_Msk PPI_CHG_CH7_Msk +#define PPI_CHG1_CH7_Excluded PPI_CHG_CH7_Excluded +#define PPI_CHG1_CH7_Included PPI_CHG_CH7_Included + +#define PPI_CHG1_CH6_Pos PPI_CHG_CH6_Pos +#define PPI_CHG1_CH6_Msk PPI_CHG_CH6_Msk +#define PPI_CHG1_CH6_Excluded PPI_CHG_CH6_Excluded +#define PPI_CHG1_CH6_Included PPI_CHG_CH6_Included + +#define PPI_CHG1_CH5_Pos PPI_CHG_CH5_Pos +#define PPI_CHG1_CH5_Msk PPI_CHG_CH5_Msk +#define PPI_CHG1_CH5_Excluded PPI_CHG_CH5_Excluded +#define PPI_CHG1_CH5_Included PPI_CHG_CH5_Included + +#define PPI_CHG1_CH4_Pos PPI_CHG_CH4_Pos +#define PPI_CHG1_CH4_Msk PPI_CHG_CH4_Msk +#define PPI_CHG1_CH4_Excluded PPI_CHG_CH4_Excluded +#define PPI_CHG1_CH4_Included PPI_CHG_CH4_Included + +#define PPI_CHG1_CH3_Pos PPI_CHG_CH3_Pos +#define PPI_CHG1_CH3_Msk PPI_CHG_CH3_Msk +#define PPI_CHG1_CH3_Excluded PPI_CHG_CH3_Excluded +#define PPI_CHG1_CH3_Included PPI_CHG_CH3_Included + +#define PPI_CHG1_CH2_Pos PPI_CHG_CH2_Pos +#define PPI_CHG1_CH2_Msk PPI_CHG_CH2_Msk +#define PPI_CHG1_CH2_Excluded PPI_CHG_CH2_Excluded +#define PPI_CHG1_CH2_Included PPI_CHG_CH2_Included + +#define PPI_CHG1_CH1_Pos PPI_CHG_CH1_Pos +#define PPI_CHG1_CH1_Msk PPI_CHG_CH1_Msk +#define PPI_CHG1_CH1_Excluded PPI_CHG_CH1_Excluded +#define PPI_CHG1_CH1_Included PPI_CHG_CH1_Included + +#define PPI_CHG1_CH0_Pos PPI_CHG_CH0_Pos +#define PPI_CHG1_CH0_Msk PPI_CHG_CH0_Msk +#define PPI_CHG1_CH0_Excluded PPI_CHG_CH0_Excluded +#define PPI_CHG1_CH0_Included PPI_CHG_CH0_Included + +#define PPI_CHG2_CH15_Pos PPI_CHG_CH15_Pos +#define PPI_CHG2_CH15_Msk PPI_CHG_CH15_Msk +#define PPI_CHG2_CH15_Excluded PPI_CHG_CH15_Excluded +#define PPI_CHG2_CH15_Included PPI_CHG_CH15_Included + +#define PPI_CHG2_CH14_Pos PPI_CHG_CH14_Pos +#define PPI_CHG2_CH14_Msk PPI_CHG_CH14_Msk +#define PPI_CHG2_CH14_Excluded PPI_CHG_CH14_Excluded +#define PPI_CHG2_CH14_Included PPI_CHG_CH14_Included + +#define PPI_CHG2_CH13_Pos PPI_CHG_CH13_Pos +#define PPI_CHG2_CH13_Msk PPI_CHG_CH13_Msk +#define PPI_CHG2_CH13_Excluded PPI_CHG_CH13_Excluded +#define PPI_CHG2_CH13_Included PPI_CHG_CH13_Included + +#define PPI_CHG2_CH12_Pos PPI_CHG_CH12_Pos +#define PPI_CHG2_CH12_Msk PPI_CHG_CH12_Msk +#define PPI_CHG2_CH12_Excluded PPI_CHG_CH12_Excluded +#define PPI_CHG2_CH12_Included PPI_CHG_CH12_Included + +#define PPI_CHG2_CH11_Pos PPI_CHG_CH11_Pos +#define PPI_CHG2_CH11_Msk PPI_CHG_CH11_Msk +#define PPI_CHG2_CH11_Excluded PPI_CHG_CH11_Excluded +#define PPI_CHG2_CH11_Included PPI_CHG_CH11_Included + +#define PPI_CHG2_CH10_Pos PPI_CHG_CH10_Pos +#define PPI_CHG2_CH10_Msk PPI_CHG_CH10_Msk +#define PPI_CHG2_CH10_Excluded PPI_CHG_CH10_Excluded +#define PPI_CHG2_CH10_Included PPI_CHG_CH10_Included + +#define PPI_CHG2_CH9_Pos PPI_CHG_CH9_Pos +#define PPI_CHG2_CH9_Msk PPI_CHG_CH9_Msk +#define PPI_CHG2_CH9_Excluded PPI_CHG_CH9_Excluded +#define PPI_CHG2_CH9_Included PPI_CHG_CH9_Included + +#define PPI_CHG2_CH8_Pos PPI_CHG_CH8_Pos +#define PPI_CHG2_CH8_Msk PPI_CHG_CH8_Msk +#define PPI_CHG2_CH8_Excluded PPI_CHG_CH8_Excluded +#define PPI_CHG2_CH8_Included PPI_CHG_CH8_Included + +#define PPI_CHG2_CH7_Pos PPI_CHG_CH7_Pos +#define PPI_CHG2_CH7_Msk PPI_CHG_CH7_Msk +#define PPI_CHG2_CH7_Excluded PPI_CHG_CH7_Excluded +#define PPI_CHG2_CH7_Included PPI_CHG_CH7_Included + +#define PPI_CHG2_CH6_Pos PPI_CHG_CH6_Pos +#define PPI_CHG2_CH6_Msk PPI_CHG_CH6_Msk +#define PPI_CHG2_CH6_Excluded PPI_CHG_CH6_Excluded +#define PPI_CHG2_CH6_Included PPI_CHG_CH6_Included + +#define PPI_CHG2_CH5_Pos PPI_CHG_CH5_Pos +#define PPI_CHG2_CH5_Msk PPI_CHG_CH5_Msk +#define PPI_CHG2_CH5_Excluded PPI_CHG_CH5_Excluded +#define PPI_CHG2_CH5_Included PPI_CHG_CH5_Included + +#define PPI_CHG2_CH4_Pos PPI_CHG_CH4_Pos +#define PPI_CHG2_CH4_Msk PPI_CHG_CH4_Msk +#define PPI_CHG2_CH4_Excluded PPI_CHG_CH4_Excluded +#define PPI_CHG2_CH4_Included PPI_CHG_CH4_Included + +#define PPI_CHG2_CH3_Pos PPI_CHG_CH3_Pos +#define PPI_CHG2_CH3_Msk PPI_CHG_CH3_Msk +#define PPI_CHG2_CH3_Excluded PPI_CHG_CH3_Excluded +#define PPI_CHG2_CH3_Included PPI_CHG_CH3_Included + +#define PPI_CHG2_CH2_Pos PPI_CHG_CH2_Pos +#define PPI_CHG2_CH2_Msk PPI_CHG_CH2_Msk +#define PPI_CHG2_CH2_Excluded PPI_CHG_CH2_Excluded +#define PPI_CHG2_CH2_Included PPI_CHG_CH2_Included + +#define PPI_CHG2_CH1_Pos PPI_CHG_CH1_Pos +#define PPI_CHG2_CH1_Msk PPI_CHG_CH1_Msk +#define PPI_CHG2_CH1_Excluded PPI_CHG_CH1_Excluded +#define PPI_CHG2_CH1_Included PPI_CHG_CH1_Included + +#define PPI_CHG2_CH0_Pos PPI_CHG_CH0_Pos +#define PPI_CHG2_CH0_Msk PPI_CHG_CH0_Msk +#define PPI_CHG2_CH0_Excluded PPI_CHG_CH0_Excluded +#define PPI_CHG2_CH0_Included PPI_CHG_CH0_Included + +#define PPI_CHG3_CH15_Pos PPI_CHG_CH15_Pos +#define PPI_CHG3_CH15_Msk PPI_CHG_CH15_Msk +#define PPI_CHG3_CH15_Excluded PPI_CHG_CH15_Excluded +#define PPI_CHG3_CH15_Included PPI_CHG_CH15_Included + +#define PPI_CHG3_CH14_Pos PPI_CHG_CH14_Pos +#define PPI_CHG3_CH14_Msk PPI_CHG_CH14_Msk +#define PPI_CHG3_CH14_Excluded PPI_CHG_CH14_Excluded +#define PPI_CHG3_CH14_Included PPI_CHG_CH14_Included + +#define PPI_CHG3_CH13_Pos PPI_CHG_CH13_Pos +#define PPI_CHG3_CH13_Msk PPI_CHG_CH13_Msk +#define PPI_CHG3_CH13_Excluded PPI_CHG_CH13_Excluded +#define PPI_CHG3_CH13_Included PPI_CHG_CH13_Included + +#define PPI_CHG3_CH12_Pos PPI_CHG_CH12_Pos +#define PPI_CHG3_CH12_Msk PPI_CHG_CH12_Msk +#define PPI_CHG3_CH12_Excluded PPI_CHG_CH12_Excluded +#define PPI_CHG3_CH12_Included PPI_CHG_CH12_Included + +#define PPI_CHG3_CH11_Pos PPI_CHG_CH11_Pos +#define PPI_CHG3_CH11_Msk PPI_CHG_CH11_Msk +#define PPI_CHG3_CH11_Excluded PPI_CHG_CH11_Excluded +#define PPI_CHG3_CH11_Included PPI_CHG_CH11_Included + +#define PPI_CHG3_CH10_Pos PPI_CHG_CH10_Pos +#define PPI_CHG3_CH10_Msk PPI_CHG_CH10_Msk +#define PPI_CHG3_CH10_Excluded PPI_CHG_CH10_Excluded +#define PPI_CHG3_CH10_Included PPI_CHG_CH10_Included + +#define PPI_CHG3_CH9_Pos PPI_CHG_CH9_Pos +#define PPI_CHG3_CH9_Msk PPI_CHG_CH9_Msk +#define PPI_CHG3_CH9_Excluded PPI_CHG_CH9_Excluded +#define PPI_CHG3_CH9_Included PPI_CHG_CH9_Included + +#define PPI_CHG3_CH8_Pos PPI_CHG_CH8_Pos +#define PPI_CHG3_CH8_Msk PPI_CHG_CH8_Msk +#define PPI_CHG3_CH8_Excluded PPI_CHG_CH8_Excluded +#define PPI_CHG3_CH8_Included PPI_CHG_CH8_Included + +#define PPI_CHG3_CH7_Pos PPI_CHG_CH7_Pos +#define PPI_CHG3_CH7_Msk PPI_CHG_CH7_Msk +#define PPI_CHG3_CH7_Excluded PPI_CHG_CH7_Excluded +#define PPI_CHG3_CH7_Included PPI_CHG_CH7_Included + +#define PPI_CHG3_CH6_Pos PPI_CHG_CH6_Pos +#define PPI_CHG3_CH6_Msk PPI_CHG_CH6_Msk +#define PPI_CHG3_CH6_Excluded PPI_CHG_CH6_Excluded +#define PPI_CHG3_CH6_Included PPI_CHG_CH6_Included + +#define PPI_CHG3_CH5_Pos PPI_CHG_CH5_Pos +#define PPI_CHG3_CH5_Msk PPI_CHG_CH5_Msk +#define PPI_CHG3_CH5_Excluded PPI_CHG_CH5_Excluded +#define PPI_CHG3_CH5_Included PPI_CHG_CH5_Included + +#define PPI_CHG3_CH4_Pos PPI_CHG_CH4_Pos +#define PPI_CHG3_CH4_Msk PPI_CHG_CH4_Msk +#define PPI_CHG3_CH4_Excluded PPI_CHG_CH4_Excluded +#define PPI_CHG3_CH4_Included PPI_CHG_CH4_Included + +#define PPI_CHG3_CH3_Pos PPI_CHG_CH3_Pos +#define PPI_CHG3_CH3_Msk PPI_CHG_CH3_Msk +#define PPI_CHG3_CH3_Excluded PPI_CHG_CH3_Excluded +#define PPI_CHG3_CH3_Included PPI_CHG_CH3_Included + +#define PPI_CHG3_CH2_Pos PPI_CHG_CH2_Pos +#define PPI_CHG3_CH2_Msk PPI_CHG_CH2_Msk +#define PPI_CHG3_CH2_Excluded PPI_CHG_CH2_Excluded +#define PPI_CHG3_CH2_Included PPI_CHG_CH2_Included + +#define PPI_CHG3_CH1_Pos PPI_CHG_CH1_Pos +#define PPI_CHG3_CH1_Msk PPI_CHG_CH1_Msk +#define PPI_CHG3_CH1_Excluded PPI_CHG_CH1_Excluded +#define PPI_CHG3_CH1_Included PPI_CHG_CH1_Included + +#define PPI_CHG3_CH0_Pos PPI_CHG_CH0_Pos +#define PPI_CHG3_CH0_Msk PPI_CHG_CH0_Msk +#define PPI_CHG3_CH0_Excluded PPI_CHG_CH0_Excluded +#define PPI_CHG3_CH0_Included PPI_CHG_CH0_Included + + + + +/*lint --flb "Leave library region" */ + +#endif /* NRF51_TO_NRF52_H */ + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51_to_nrf52810.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51_to_nrf52810.h new file mode 100644 index 00000000000..4031ff481b0 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51_to_nrf52810.h @@ -0,0 +1,532 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +#ifndef NRF51_TO_NRF52810_H +#define NRF51_TO_NRF52810_H + +/*lint ++flb "Enter library region */ + +/* This file is given to prevent your SW from not compiling with the name changes between nRF51 and nRF52840 devices. + * It redefines the old nRF51 names into the new ones as long as the functionality is still supported. If the + * functionality is gone, there old names are not defined, so compilation will fail. Note that also includes macros + * from the nrf51_deprecated.h file. */ + + + /* Differences between latest nRF51 headers and nRF52810 headers. */ + +/* IRQ */ +/* Several peripherals have been added to several indexes. Names of IRQ handlers and IRQ numbers have changed. */ +#define SWI0_IRQHandler SWI0_EGU0_IRQHandler +#define SWI1_IRQHandler SWI1_EGU1_IRQHandler + +#define SWI0_IRQn SWI0_EGU0_IRQn +#define SWI1_IRQn SWI1_EGU1_IRQn + + +/* UICR */ +/* Register RBPCONF was renamed to APPROTECT. */ +#define RBPCONF APPROTECT + +#define UICR_RBPCONF_PALL_Pos UICR_APPROTECT_PALL_Pos +#define UICR_RBPCONF_PALL_Msk UICR_APPROTECT_PALL_Msk +#define UICR_RBPCONF_PALL_Enabled UICR_APPROTECT_PALL_Enabled +#define UICR_RBPCONF_PALL_Disabled UICR_APPROTECT_PALL_Disabled + + +/* GPIO */ +/* GPIO port was renamed to P0. */ +#define NRF_GPIO NRF_P0 +#define NRF_GPIO_BASE NRF_P0_BASE + + +/* QDEC */ +/* The registers PSELA, PSELB and PSELLED were restructured into a struct. */ +#define PSELLED PSEL.LED +#define PSELA PSEL.A +#define PSELB PSEL.B + + +/* SPIS */ +/* The registers PSELSCK, PSELMISO, PSELMOSI, PSELCSN were restructured into a struct. */ +#define PSELSCK PSEL.SCK +#define PSELMISO PSEL.MISO +#define PSELMOSI PSEL.MOSI +#define PSELCSN PSEL.CSN + +/* The registers RXDPTR, MAXRX, AMOUNTRX were restructured into a struct */ +#define RXDPTR RXD.PTR +#define MAXRX RXD.MAXCNT +#define AMOUNTRX RXD.AMOUNT + +#define SPIS_MAXRX_MAXRX_Pos SPIS_RXD_MAXCNT_MAXCNT_Pos +#define SPIS_MAXRX_MAXRX_Msk SPIS_RXD_MAXCNT_MAXCNT_Msk + +#define SPIS_AMOUNTRX_AMOUNTRX_Pos SPIS_RXD_AMOUNT_AMOUNT_Pos +#define SPIS_AMOUNTRX_AMOUNTRX_Msk SPIS_RXD_AMOUNT_AMOUNT_Msk + +/* The registers TXDPTR, MAXTX, AMOUNTTX were restructured into a struct */ +#define TXDPTR TXD.PTR +#define MAXTX TXD.MAXCNT +#define AMOUNTTX TXD.AMOUNT + +#define SPIS_MAXTX_MAXTX_Pos SPIS_TXD_MAXCNT_MAXCNT_Pos +#define SPIS_MAXTX_MAXTX_Msk SPIS_TXD_MAXCNT_MAXCNT_Msk + +#define SPIS_AMOUNTTX_AMOUNTTX_Pos SPIS_TXD_AMOUNT_AMOUNT_Pos +#define SPIS_AMOUNTTX_AMOUNTTX_Msk SPIS_TXD_AMOUNT_AMOUNT_Msk + + +/* From nrf51_deprecated.h. Several macros changed in different versions of nRF52 headers. By defining the following, any code written for any version of nRF52 headers will still compile. */ + +/* NVMC */ +/* The register ERASEPROTECTEDPAGE changed name to ERASEPCR0 in the documentation. */ +#define ERASEPROTECTEDPAGE ERASEPCR0 + + +/* RADIO */ +/* The name of the field SKIPADDR was corrected. Old macros added for compatibility. */ +#define RADIO_CRCCNF_SKIP_ADDR_Pos RADIO_CRCCNF_SKIPADDR_Pos +#define RADIO_CRCCNF_SKIP_ADDR_Msk RADIO_CRCCNF_SKIPADDR_Msk +#define RADIO_CRCCNF_SKIP_ADDR_Include RADIO_CRCCNF_SKIPADDR_Include +#define RADIO_CRCCNF_SKIP_ADDR_Skip RADIO_CRCCNF_SKIPADDR_Skip + + +/* FICR */ +/* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */ +#define DEVICEID0 DEVICEID[0] +#define DEVICEID1 DEVICEID[1] + +/* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */ +#define ER0 ER[0] +#define ER1 ER[1] +#define ER2 ER[2] +#define ER3 ER[3] + +/* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */ +#define IR0 IR[0] +#define IR1 IR[1] +#define IR2 IR[2] +#define IR3 IR[3] + +/* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */ +#define DEVICEADDR0 DEVICEADDR[0] +#define DEVICEADDR1 DEVICEADDR[1] + + +/* PPI */ +/* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */ +#define TASKS_CHG0EN TASKS_CHG[0].EN +#define TASKS_CHG0DIS TASKS_CHG[0].DIS +#define TASKS_CHG1EN TASKS_CHG[1].EN +#define TASKS_CHG1DIS TASKS_CHG[1].DIS +#define TASKS_CHG2EN TASKS_CHG[2].EN +#define TASKS_CHG2DIS TASKS_CHG[2].DIS +#define TASKS_CHG3EN TASKS_CHG[3].EN +#define TASKS_CHG3DIS TASKS_CHG[3].DIS + +/* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */ +#define CH0_EEP CH[0].EEP +#define CH0_TEP CH[0].TEP +#define CH1_EEP CH[1].EEP +#define CH1_TEP CH[1].TEP +#define CH2_EEP CH[2].EEP +#define CH2_TEP CH[2].TEP +#define CH3_EEP CH[3].EEP +#define CH3_TEP CH[3].TEP +#define CH4_EEP CH[4].EEP +#define CH4_TEP CH[4].TEP +#define CH5_EEP CH[5].EEP +#define CH5_TEP CH[5].TEP +#define CH6_EEP CH[6].EEP +#define CH6_TEP CH[6].TEP +#define CH7_EEP CH[7].EEP +#define CH7_TEP CH[7].TEP +#define CH8_EEP CH[8].EEP +#define CH8_TEP CH[8].TEP +#define CH9_EEP CH[9].EEP +#define CH9_TEP CH[9].TEP +#define CH10_EEP CH[10].EEP +#define CH10_TEP CH[10].TEP +#define CH11_EEP CH[11].EEP +#define CH11_TEP CH[11].TEP +#define CH12_EEP CH[12].EEP +#define CH12_TEP CH[12].TEP +#define CH13_EEP CH[13].EEP +#define CH13_TEP CH[13].TEP +#define CH14_EEP CH[14].EEP +#define CH14_TEP CH[14].TEP +#define CH15_EEP CH[15].EEP +#define CH15_TEP CH[15].TEP + +/* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */ +#define CHG0 CHG[0] +#define CHG1 CHG[1] +#define CHG2 CHG[2] +#define CHG3 CHG[3] + +/* All bitfield macros for the CHGx registers therefore changed name. */ +#define PPI_CHG0_CH15_Pos PPI_CHG_CH15_Pos +#define PPI_CHG0_CH15_Msk PPI_CHG_CH15_Msk +#define PPI_CHG0_CH15_Excluded PPI_CHG_CH15_Excluded +#define PPI_CHG0_CH15_Included PPI_CHG_CH15_Included + +#define PPI_CHG0_CH14_Pos PPI_CHG_CH14_Pos +#define PPI_CHG0_CH14_Msk PPI_CHG_CH14_Msk +#define PPI_CHG0_CH14_Excluded PPI_CHG_CH14_Excluded +#define PPI_CHG0_CH14_Included PPI_CHG_CH14_Included + +#define PPI_CHG0_CH13_Pos PPI_CHG_CH13_Pos +#define PPI_CHG0_CH13_Msk PPI_CHG_CH13_Msk +#define PPI_CHG0_CH13_Excluded PPI_CHG_CH13_Excluded +#define PPI_CHG0_CH13_Included PPI_CHG_CH13_Included + +#define PPI_CHG0_CH12_Pos PPI_CHG_CH12_Pos +#define PPI_CHG0_CH12_Msk PPI_CHG_CH12_Msk +#define PPI_CHG0_CH12_Excluded PPI_CHG_CH12_Excluded +#define PPI_CHG0_CH12_Included PPI_CHG_CH12_Included + +#define PPI_CHG0_CH11_Pos PPI_CHG_CH11_Pos +#define PPI_CHG0_CH11_Msk PPI_CHG_CH11_Msk +#define PPI_CHG0_CH11_Excluded PPI_CHG_CH11_Excluded +#define PPI_CHG0_CH11_Included PPI_CHG_CH11_Included + +#define PPI_CHG0_CH10_Pos PPI_CHG_CH10_Pos +#define PPI_CHG0_CH10_Msk PPI_CHG_CH10_Msk +#define PPI_CHG0_CH10_Excluded PPI_CHG_CH10_Excluded +#define PPI_CHG0_CH10_Included PPI_CHG_CH10_Included + +#define PPI_CHG0_CH9_Pos PPI_CHG_CH9_Pos +#define PPI_CHG0_CH9_Msk PPI_CHG_CH9_Msk +#define PPI_CHG0_CH9_Excluded PPI_CHG_CH9_Excluded +#define PPI_CHG0_CH9_Included PPI_CHG_CH9_Included + +#define PPI_CHG0_CH8_Pos PPI_CHG_CH8_Pos +#define PPI_CHG0_CH8_Msk PPI_CHG_CH8_Msk +#define PPI_CHG0_CH8_Excluded PPI_CHG_CH8_Excluded +#define PPI_CHG0_CH8_Included PPI_CHG_CH8_Included + +#define PPI_CHG0_CH7_Pos PPI_CHG_CH7_Pos +#define PPI_CHG0_CH7_Msk PPI_CHG_CH7_Msk +#define PPI_CHG0_CH7_Excluded PPI_CHG_CH7_Excluded +#define PPI_CHG0_CH7_Included PPI_CHG_CH7_Included + +#define PPI_CHG0_CH6_Pos PPI_CHG_CH6_Pos +#define PPI_CHG0_CH6_Msk PPI_CHG_CH6_Msk +#define PPI_CHG0_CH6_Excluded PPI_CHG_CH6_Excluded +#define PPI_CHG0_CH6_Included PPI_CHG_CH6_Included + +#define PPI_CHG0_CH5_Pos PPI_CHG_CH5_Pos +#define PPI_CHG0_CH5_Msk PPI_CHG_CH5_Msk +#define PPI_CHG0_CH5_Excluded PPI_CHG_CH5_Excluded +#define PPI_CHG0_CH5_Included PPI_CHG_CH5_Included + +#define PPI_CHG0_CH4_Pos PPI_CHG_CH4_Pos +#define PPI_CHG0_CH4_Msk PPI_CHG_CH4_Msk +#define PPI_CHG0_CH4_Excluded PPI_CHG_CH4_Excluded +#define PPI_CHG0_CH4_Included PPI_CHG_CH4_Included + +#define PPI_CHG0_CH3_Pos PPI_CHG_CH3_Pos +#define PPI_CHG0_CH3_Msk PPI_CHG_CH3_Msk +#define PPI_CHG0_CH3_Excluded PPI_CHG_CH3_Excluded +#define PPI_CHG0_CH3_Included PPI_CHG_CH3_Included + +#define PPI_CHG0_CH2_Pos PPI_CHG_CH2_Pos +#define PPI_CHG0_CH2_Msk PPI_CHG_CH2_Msk +#define PPI_CHG0_CH2_Excluded PPI_CHG_CH2_Excluded +#define PPI_CHG0_CH2_Included PPI_CHG_CH2_Included + +#define PPI_CHG0_CH1_Pos PPI_CHG_CH1_Pos +#define PPI_CHG0_CH1_Msk PPI_CHG_CH1_Msk +#define PPI_CHG0_CH1_Excluded PPI_CHG_CH1_Excluded +#define PPI_CHG0_CH1_Included PPI_CHG_CH1_Included + +#define PPI_CHG0_CH0_Pos PPI_CHG_CH0_Pos +#define PPI_CHG0_CH0_Msk PPI_CHG_CH0_Msk +#define PPI_CHG0_CH0_Excluded PPI_CHG_CH0_Excluded +#define PPI_CHG0_CH0_Included PPI_CHG_CH0_Included + +#define PPI_CHG1_CH15_Pos PPI_CHG_CH15_Pos +#define PPI_CHG1_CH15_Msk PPI_CHG_CH15_Msk +#define PPI_CHG1_CH15_Excluded PPI_CHG_CH15_Excluded +#define PPI_CHG1_CH15_Included PPI_CHG_CH15_Included + +#define PPI_CHG1_CH14_Pos PPI_CHG_CH14_Pos +#define PPI_CHG1_CH14_Msk PPI_CHG_CH14_Msk +#define PPI_CHG1_CH14_Excluded PPI_CHG_CH14_Excluded +#define PPI_CHG1_CH14_Included PPI_CHG_CH14_Included + +#define PPI_CHG1_CH13_Pos PPI_CHG_CH13_Pos +#define PPI_CHG1_CH13_Msk PPI_CHG_CH13_Msk +#define PPI_CHG1_CH13_Excluded PPI_CHG_CH13_Excluded +#define PPI_CHG1_CH13_Included PPI_CHG_CH13_Included + +#define PPI_CHG1_CH12_Pos PPI_CHG_CH12_Pos +#define PPI_CHG1_CH12_Msk PPI_CHG_CH12_Msk +#define PPI_CHG1_CH12_Excluded PPI_CHG_CH12_Excluded +#define PPI_CHG1_CH12_Included PPI_CHG_CH12_Included + +#define PPI_CHG1_CH11_Pos PPI_CHG_CH11_Pos +#define PPI_CHG1_CH11_Msk PPI_CHG_CH11_Msk +#define PPI_CHG1_CH11_Excluded PPI_CHG_CH11_Excluded +#define PPI_CHG1_CH11_Included PPI_CHG_CH11_Included + +#define PPI_CHG1_CH10_Pos PPI_CHG_CH10_Pos +#define PPI_CHG1_CH10_Msk PPI_CHG_CH10_Msk +#define PPI_CHG1_CH10_Excluded PPI_CHG_CH10_Excluded +#define PPI_CHG1_CH10_Included PPI_CHG_CH10_Included + +#define PPI_CHG1_CH9_Pos PPI_CHG_CH9_Pos +#define PPI_CHG1_CH9_Msk PPI_CHG_CH9_Msk +#define PPI_CHG1_CH9_Excluded PPI_CHG_CH9_Excluded +#define PPI_CHG1_CH9_Included PPI_CHG_CH9_Included + +#define PPI_CHG1_CH8_Pos PPI_CHG_CH8_Pos +#define PPI_CHG1_CH8_Msk PPI_CHG_CH8_Msk +#define PPI_CHG1_CH8_Excluded PPI_CHG_CH8_Excluded +#define PPI_CHG1_CH8_Included PPI_CHG_CH8_Included + +#define PPI_CHG1_CH7_Pos PPI_CHG_CH7_Pos +#define PPI_CHG1_CH7_Msk PPI_CHG_CH7_Msk +#define PPI_CHG1_CH7_Excluded PPI_CHG_CH7_Excluded +#define PPI_CHG1_CH7_Included PPI_CHG_CH7_Included + +#define PPI_CHG1_CH6_Pos PPI_CHG_CH6_Pos +#define PPI_CHG1_CH6_Msk PPI_CHG_CH6_Msk +#define PPI_CHG1_CH6_Excluded PPI_CHG_CH6_Excluded +#define PPI_CHG1_CH6_Included PPI_CHG_CH6_Included + +#define PPI_CHG1_CH5_Pos PPI_CHG_CH5_Pos +#define PPI_CHG1_CH5_Msk PPI_CHG_CH5_Msk +#define PPI_CHG1_CH5_Excluded PPI_CHG_CH5_Excluded +#define PPI_CHG1_CH5_Included PPI_CHG_CH5_Included + +#define PPI_CHG1_CH4_Pos PPI_CHG_CH4_Pos +#define PPI_CHG1_CH4_Msk PPI_CHG_CH4_Msk +#define PPI_CHG1_CH4_Excluded PPI_CHG_CH4_Excluded +#define PPI_CHG1_CH4_Included PPI_CHG_CH4_Included + +#define PPI_CHG1_CH3_Pos PPI_CHG_CH3_Pos +#define PPI_CHG1_CH3_Msk PPI_CHG_CH3_Msk +#define PPI_CHG1_CH3_Excluded PPI_CHG_CH3_Excluded +#define PPI_CHG1_CH3_Included PPI_CHG_CH3_Included + +#define PPI_CHG1_CH2_Pos PPI_CHG_CH2_Pos +#define PPI_CHG1_CH2_Msk PPI_CHG_CH2_Msk +#define PPI_CHG1_CH2_Excluded PPI_CHG_CH2_Excluded +#define PPI_CHG1_CH2_Included PPI_CHG_CH2_Included + +#define PPI_CHG1_CH1_Pos PPI_CHG_CH1_Pos +#define PPI_CHG1_CH1_Msk PPI_CHG_CH1_Msk +#define PPI_CHG1_CH1_Excluded PPI_CHG_CH1_Excluded +#define PPI_CHG1_CH1_Included PPI_CHG_CH1_Included + +#define PPI_CHG1_CH0_Pos PPI_CHG_CH0_Pos +#define PPI_CHG1_CH0_Msk PPI_CHG_CH0_Msk +#define PPI_CHG1_CH0_Excluded PPI_CHG_CH0_Excluded +#define PPI_CHG1_CH0_Included PPI_CHG_CH0_Included + +#define PPI_CHG2_CH15_Pos PPI_CHG_CH15_Pos +#define PPI_CHG2_CH15_Msk PPI_CHG_CH15_Msk +#define PPI_CHG2_CH15_Excluded PPI_CHG_CH15_Excluded +#define PPI_CHG2_CH15_Included PPI_CHG_CH15_Included + +#define PPI_CHG2_CH14_Pos PPI_CHG_CH14_Pos +#define PPI_CHG2_CH14_Msk PPI_CHG_CH14_Msk +#define PPI_CHG2_CH14_Excluded PPI_CHG_CH14_Excluded +#define PPI_CHG2_CH14_Included PPI_CHG_CH14_Included + +#define PPI_CHG2_CH13_Pos PPI_CHG_CH13_Pos +#define PPI_CHG2_CH13_Msk PPI_CHG_CH13_Msk +#define PPI_CHG2_CH13_Excluded PPI_CHG_CH13_Excluded +#define PPI_CHG2_CH13_Included PPI_CHG_CH13_Included + +#define PPI_CHG2_CH12_Pos PPI_CHG_CH12_Pos +#define PPI_CHG2_CH12_Msk PPI_CHG_CH12_Msk +#define PPI_CHG2_CH12_Excluded PPI_CHG_CH12_Excluded +#define PPI_CHG2_CH12_Included PPI_CHG_CH12_Included + +#define PPI_CHG2_CH11_Pos PPI_CHG_CH11_Pos +#define PPI_CHG2_CH11_Msk PPI_CHG_CH11_Msk +#define PPI_CHG2_CH11_Excluded PPI_CHG_CH11_Excluded +#define PPI_CHG2_CH11_Included PPI_CHG_CH11_Included + +#define PPI_CHG2_CH10_Pos PPI_CHG_CH10_Pos +#define PPI_CHG2_CH10_Msk PPI_CHG_CH10_Msk +#define PPI_CHG2_CH10_Excluded PPI_CHG_CH10_Excluded +#define PPI_CHG2_CH10_Included PPI_CHG_CH10_Included + +#define PPI_CHG2_CH9_Pos PPI_CHG_CH9_Pos +#define PPI_CHG2_CH9_Msk PPI_CHG_CH9_Msk +#define PPI_CHG2_CH9_Excluded PPI_CHG_CH9_Excluded +#define PPI_CHG2_CH9_Included PPI_CHG_CH9_Included + +#define PPI_CHG2_CH8_Pos PPI_CHG_CH8_Pos +#define PPI_CHG2_CH8_Msk PPI_CHG_CH8_Msk +#define PPI_CHG2_CH8_Excluded PPI_CHG_CH8_Excluded +#define PPI_CHG2_CH8_Included PPI_CHG_CH8_Included + +#define PPI_CHG2_CH7_Pos PPI_CHG_CH7_Pos +#define PPI_CHG2_CH7_Msk PPI_CHG_CH7_Msk +#define PPI_CHG2_CH7_Excluded PPI_CHG_CH7_Excluded +#define PPI_CHG2_CH7_Included PPI_CHG_CH7_Included + +#define PPI_CHG2_CH6_Pos PPI_CHG_CH6_Pos +#define PPI_CHG2_CH6_Msk PPI_CHG_CH6_Msk +#define PPI_CHG2_CH6_Excluded PPI_CHG_CH6_Excluded +#define PPI_CHG2_CH6_Included PPI_CHG_CH6_Included + +#define PPI_CHG2_CH5_Pos PPI_CHG_CH5_Pos +#define PPI_CHG2_CH5_Msk PPI_CHG_CH5_Msk +#define PPI_CHG2_CH5_Excluded PPI_CHG_CH5_Excluded +#define PPI_CHG2_CH5_Included PPI_CHG_CH5_Included + +#define PPI_CHG2_CH4_Pos PPI_CHG_CH4_Pos +#define PPI_CHG2_CH4_Msk PPI_CHG_CH4_Msk +#define PPI_CHG2_CH4_Excluded PPI_CHG_CH4_Excluded +#define PPI_CHG2_CH4_Included PPI_CHG_CH4_Included + +#define PPI_CHG2_CH3_Pos PPI_CHG_CH3_Pos +#define PPI_CHG2_CH3_Msk PPI_CHG_CH3_Msk +#define PPI_CHG2_CH3_Excluded PPI_CHG_CH3_Excluded +#define PPI_CHG2_CH3_Included PPI_CHG_CH3_Included + +#define PPI_CHG2_CH2_Pos PPI_CHG_CH2_Pos +#define PPI_CHG2_CH2_Msk PPI_CHG_CH2_Msk +#define PPI_CHG2_CH2_Excluded PPI_CHG_CH2_Excluded +#define PPI_CHG2_CH2_Included PPI_CHG_CH2_Included + +#define PPI_CHG2_CH1_Pos PPI_CHG_CH1_Pos +#define PPI_CHG2_CH1_Msk PPI_CHG_CH1_Msk +#define PPI_CHG2_CH1_Excluded PPI_CHG_CH1_Excluded +#define PPI_CHG2_CH1_Included PPI_CHG_CH1_Included + +#define PPI_CHG2_CH0_Pos PPI_CHG_CH0_Pos +#define PPI_CHG2_CH0_Msk PPI_CHG_CH0_Msk +#define PPI_CHG2_CH0_Excluded PPI_CHG_CH0_Excluded +#define PPI_CHG2_CH0_Included PPI_CHG_CH0_Included + +#define PPI_CHG3_CH15_Pos PPI_CHG_CH15_Pos +#define PPI_CHG3_CH15_Msk PPI_CHG_CH15_Msk +#define PPI_CHG3_CH15_Excluded PPI_CHG_CH15_Excluded +#define PPI_CHG3_CH15_Included PPI_CHG_CH15_Included + +#define PPI_CHG3_CH14_Pos PPI_CHG_CH14_Pos +#define PPI_CHG3_CH14_Msk PPI_CHG_CH14_Msk +#define PPI_CHG3_CH14_Excluded PPI_CHG_CH14_Excluded +#define PPI_CHG3_CH14_Included PPI_CHG_CH14_Included + +#define PPI_CHG3_CH13_Pos PPI_CHG_CH13_Pos +#define PPI_CHG3_CH13_Msk PPI_CHG_CH13_Msk +#define PPI_CHG3_CH13_Excluded PPI_CHG_CH13_Excluded +#define PPI_CHG3_CH13_Included PPI_CHG_CH13_Included + +#define PPI_CHG3_CH12_Pos PPI_CHG_CH12_Pos +#define PPI_CHG3_CH12_Msk PPI_CHG_CH12_Msk +#define PPI_CHG3_CH12_Excluded PPI_CHG_CH12_Excluded +#define PPI_CHG3_CH12_Included PPI_CHG_CH12_Included + +#define PPI_CHG3_CH11_Pos PPI_CHG_CH11_Pos +#define PPI_CHG3_CH11_Msk PPI_CHG_CH11_Msk +#define PPI_CHG3_CH11_Excluded PPI_CHG_CH11_Excluded +#define PPI_CHG3_CH11_Included PPI_CHG_CH11_Included + +#define PPI_CHG3_CH10_Pos PPI_CHG_CH10_Pos +#define PPI_CHG3_CH10_Msk PPI_CHG_CH10_Msk +#define PPI_CHG3_CH10_Excluded PPI_CHG_CH10_Excluded +#define PPI_CHG3_CH10_Included PPI_CHG_CH10_Included + +#define PPI_CHG3_CH9_Pos PPI_CHG_CH9_Pos +#define PPI_CHG3_CH9_Msk PPI_CHG_CH9_Msk +#define PPI_CHG3_CH9_Excluded PPI_CHG_CH9_Excluded +#define PPI_CHG3_CH9_Included PPI_CHG_CH9_Included + +#define PPI_CHG3_CH8_Pos PPI_CHG_CH8_Pos +#define PPI_CHG3_CH8_Msk PPI_CHG_CH8_Msk +#define PPI_CHG3_CH8_Excluded PPI_CHG_CH8_Excluded +#define PPI_CHG3_CH8_Included PPI_CHG_CH8_Included + +#define PPI_CHG3_CH7_Pos PPI_CHG_CH7_Pos +#define PPI_CHG3_CH7_Msk PPI_CHG_CH7_Msk +#define PPI_CHG3_CH7_Excluded PPI_CHG_CH7_Excluded +#define PPI_CHG3_CH7_Included PPI_CHG_CH7_Included + +#define PPI_CHG3_CH6_Pos PPI_CHG_CH6_Pos +#define PPI_CHG3_CH6_Msk PPI_CHG_CH6_Msk +#define PPI_CHG3_CH6_Excluded PPI_CHG_CH6_Excluded +#define PPI_CHG3_CH6_Included PPI_CHG_CH6_Included + +#define PPI_CHG3_CH5_Pos PPI_CHG_CH5_Pos +#define PPI_CHG3_CH5_Msk PPI_CHG_CH5_Msk +#define PPI_CHG3_CH5_Excluded PPI_CHG_CH5_Excluded +#define PPI_CHG3_CH5_Included PPI_CHG_CH5_Included + +#define PPI_CHG3_CH4_Pos PPI_CHG_CH4_Pos +#define PPI_CHG3_CH4_Msk PPI_CHG_CH4_Msk +#define PPI_CHG3_CH4_Excluded PPI_CHG_CH4_Excluded +#define PPI_CHG3_CH4_Included PPI_CHG_CH4_Included + +#define PPI_CHG3_CH3_Pos PPI_CHG_CH3_Pos +#define PPI_CHG3_CH3_Msk PPI_CHG_CH3_Msk +#define PPI_CHG3_CH3_Excluded PPI_CHG_CH3_Excluded +#define PPI_CHG3_CH3_Included PPI_CHG_CH3_Included + +#define PPI_CHG3_CH2_Pos PPI_CHG_CH2_Pos +#define PPI_CHG3_CH2_Msk PPI_CHG_CH2_Msk +#define PPI_CHG3_CH2_Excluded PPI_CHG_CH2_Excluded +#define PPI_CHG3_CH2_Included PPI_CHG_CH2_Included + +#define PPI_CHG3_CH1_Pos PPI_CHG_CH1_Pos +#define PPI_CHG3_CH1_Msk PPI_CHG_CH1_Msk +#define PPI_CHG3_CH1_Excluded PPI_CHG_CH1_Excluded +#define PPI_CHG3_CH1_Included PPI_CHG_CH1_Included + +#define PPI_CHG3_CH0_Pos PPI_CHG_CH0_Pos +#define PPI_CHG3_CH0_Msk PPI_CHG_CH0_Msk +#define PPI_CHG3_CH0_Excluded PPI_CHG_CH0_Excluded +#define PPI_CHG3_CH0_Included PPI_CHG_CH0_Included + + + + +/*lint --flb "Leave library region" */ + +#endif /* NRF51_TO_NRF52810_H */ + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51_to_nrf52840.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51_to_nrf52840.h new file mode 100644 index 00000000000..ce192414b2a --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf51_to_nrf52840.h @@ -0,0 +1,578 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +#ifndef NRF51_TO_NRF52840_H +#define NRF51_TO_NRF52840_H + +/*lint ++flb "Enter library region */ + +/* This file is given to prevent your SW from not compiling with the name changes between nRF51 and nRF52840 devices. + * It redefines the old nRF51 names into the new ones as long as the functionality is still supported. If the + * functionality is gone, there old names are not defined, so compilation will fail. Note that also includes macros + * from the nrf51_deprecated.h file. */ + + +/* IRQ */ +/* Several peripherals have been added to several indexes. Names of IRQ handlers and IRQ numbers have changed. */ +#define UART0_IRQHandler UARTE0_UART0_IRQHandler +#define SPI0_TWI0_IRQHandler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler +#define SPI1_TWI1_IRQHandler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler +#define ADC_IRQHandler SAADC_IRQHandler +#define LPCOMP_IRQHandler COMP_LPCOMP_IRQHandler +#define SWI0_IRQHandler SWI0_EGU0_IRQHandler +#define SWI1_IRQHandler SWI1_EGU1_IRQHandler +#define SWI2_IRQHandler SWI2_EGU2_IRQHandler +#define SWI3_IRQHandler SWI3_EGU3_IRQHandler +#define SWI4_IRQHandler SWI4_EGU4_IRQHandler +#define SWI5_IRQHandler SWI5_EGU5_IRQHandler + +#define UART0_IRQn UARTE0_UART0_IRQn +#define SPI0_TWI0_IRQn SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn +#define SPI1_TWI1_IRQn SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn +#define ADC_IRQn SAADC_IRQn +#define LPCOMP_IRQn COMP_LPCOMP_IRQn +#define SWI0_IRQn SWI0_EGU0_IRQn +#define SWI1_IRQn SWI1_EGU1_IRQn +#define SWI2_IRQn SWI2_EGU2_IRQn +#define SWI3_IRQn SWI3_EGU3_IRQn +#define SWI4_IRQn SWI4_EGU4_IRQn +#define SWI5_IRQn SWI5_EGU5_IRQn + + +/* UICR */ +/* Register RBPCONF was renamed to APPROTECT. */ +#define RBPCONF APPROTECT + +#define UICR_RBPCONF_PALL_Pos UICR_APPROTECT_PALL_Pos +#define UICR_RBPCONF_PALL_Msk UICR_APPROTECT_PALL_Msk +#define UICR_RBPCONF_PALL_Enabled UICR_APPROTECT_PALL_Enabled +#define UICR_RBPCONF_PALL_Disabled UICR_APPROTECT_PALL_Disabled + + +/* GPIO */ +/* GPIO port was renamed to P0. */ +#define NRF_GPIO NRF_P0 +#define NRF_GPIO_BASE NRF_P0_BASE + + +/* QDEC */ +/* The registers PSELA, PSELB and PSELLED were restructured into a struct. */ +#define PSELLED PSEL.LED +#define PSELA PSEL.A +#define PSELB PSEL.B + + +/* SPIS */ +/* The registers PSELSCK, PSELMISO, PSELMOSI, PSELCSN were restructured into a struct. */ +#define PSELSCK PSEL.SCK +#define PSELMISO PSEL.MISO +#define PSELMOSI PSEL.MOSI +#define PSELCSN PSEL.CSN + +/* The registers RXDPTR, MAXRX, AMOUNTRX were restructured into a struct */ +#define RXDPTR RXD.PTR +#define MAXRX RXD.MAXCNT +#define AMOUNTRX RXD.AMOUNT + +#define SPIS_MAXRX_MAXRX_Pos SPIS_RXD_MAXCNT_MAXCNT_Pos +#define SPIS_MAXRX_MAXRX_Msk SPIS_RXD_MAXCNT_MAXCNT_Msk + +#define SPIS_AMOUNTRX_AMOUNTRX_Pos SPIS_RXD_AMOUNT_AMOUNT_Pos +#define SPIS_AMOUNTRX_AMOUNTRX_Msk SPIS_RXD_AMOUNT_AMOUNT_Msk + +/* The registers TXDPTR, MAXTX, AMOUNTTX were restructured into a struct */ +#define TXDPTR TXD.PTR +#define MAXTX TXD.MAXCNT +#define AMOUNTTX TXD.AMOUNT + +#define SPIS_MAXTX_MAXTX_Pos SPIS_TXD_MAXCNT_MAXCNT_Pos +#define SPIS_MAXTX_MAXTX_Msk SPIS_TXD_MAXCNT_MAXCNT_Msk + +#define SPIS_AMOUNTTX_AMOUNTTX_Pos SPIS_TXD_AMOUNT_AMOUNT_Pos +#define SPIS_AMOUNTTX_AMOUNTTX_Msk SPIS_TXD_AMOUNT_AMOUNT_Msk + + +/* UART */ +/* The registers PSELRTS, PSELTXD, PSELCTS, PSELRXD were restructured into a struct. */ +#define PSELRTS PSEL.RTS +#define PSELTXD PSEL.TXD +#define PSELCTS PSEL.CTS +#define PSELRXD PSEL.RXD + +/* TWI */ +/* The registers PSELSCL, PSELSDA were restructured into a struct. */ +#define PSELSCL PSEL.SCL +#define PSELSDA PSEL.SDA + + + +/* From nrf51_deprecated.h */ + +/* NVMC */ +/* The register ERASEPROTECTEDPAGE changed name to ERASEPCR0 in the documentation. */ +#define ERASEPROTECTEDPAGE ERASEPCR0 + + +/* IRQ */ +/* COMP module was eliminated. Adapted to nrf52840 headers. */ +#define LPCOMP_COMP_IRQHandler COMP_LPCOMP_IRQHandler +#define LPCOMP_COMP_IRQn COMP_LPCOMP_IRQn + + +/* REFSEL register redefined enumerated values and added some more. */ +#define LPCOMP_REFSEL_REFSEL_SupplyOneEighthPrescaling LPCOMP_REFSEL_REFSEL_Ref1_8Vdd +#define LPCOMP_REFSEL_REFSEL_SupplyTwoEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref2_8Vdd +#define LPCOMP_REFSEL_REFSEL_SupplyThreeEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref3_8Vdd +#define LPCOMP_REFSEL_REFSEL_SupplyFourEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref4_8Vdd +#define LPCOMP_REFSEL_REFSEL_SupplyFiveEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref5_8Vdd +#define LPCOMP_REFSEL_REFSEL_SupplySixEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref6_8Vdd +#define LPCOMP_REFSEL_REFSEL_SupplySevenEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref7_8Vdd + + +/* RADIO */ +/* The name of the field SKIPADDR was corrected. Old macros added for compatibility. */ +#define RADIO_CRCCNF_SKIP_ADDR_Pos RADIO_CRCCNF_SKIPADDR_Pos +#define RADIO_CRCCNF_SKIP_ADDR_Msk RADIO_CRCCNF_SKIPADDR_Msk +#define RADIO_CRCCNF_SKIP_ADDR_Include RADIO_CRCCNF_SKIPADDR_Include +#define RADIO_CRCCNF_SKIP_ADDR_Skip RADIO_CRCCNF_SKIPADDR_Skip + + +/* FICR */ +/* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */ +#define DEVICEID0 DEVICEID[0] +#define DEVICEID1 DEVICEID[1] + +/* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */ +#define ER0 ER[0] +#define ER1 ER[1] +#define ER2 ER[2] +#define ER3 ER[3] + +/* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */ +#define IR0 IR[0] +#define IR1 IR[1] +#define IR2 IR[2] +#define IR3 IR[3] + +/* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */ +#define DEVICEADDR0 DEVICEADDR[0] +#define DEVICEADDR1 DEVICEADDR[1] + + +/* PPI */ +/* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */ +#define TASKS_CHG0EN TASKS_CHG[0].EN +#define TASKS_CHG0DIS TASKS_CHG[0].DIS +#define TASKS_CHG1EN TASKS_CHG[1].EN +#define TASKS_CHG1DIS TASKS_CHG[1].DIS +#define TASKS_CHG2EN TASKS_CHG[2].EN +#define TASKS_CHG2DIS TASKS_CHG[2].DIS +#define TASKS_CHG3EN TASKS_CHG[3].EN +#define TASKS_CHG3DIS TASKS_CHG[3].DIS + +/* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */ +#define CH0_EEP CH[0].EEP +#define CH0_TEP CH[0].TEP +#define CH1_EEP CH[1].EEP +#define CH1_TEP CH[1].TEP +#define CH2_EEP CH[2].EEP +#define CH2_TEP CH[2].TEP +#define CH3_EEP CH[3].EEP +#define CH3_TEP CH[3].TEP +#define CH4_EEP CH[4].EEP +#define CH4_TEP CH[4].TEP +#define CH5_EEP CH[5].EEP +#define CH5_TEP CH[5].TEP +#define CH6_EEP CH[6].EEP +#define CH6_TEP CH[6].TEP +#define CH7_EEP CH[7].EEP +#define CH7_TEP CH[7].TEP +#define CH8_EEP CH[8].EEP +#define CH8_TEP CH[8].TEP +#define CH9_EEP CH[9].EEP +#define CH9_TEP CH[9].TEP +#define CH10_EEP CH[10].EEP +#define CH10_TEP CH[10].TEP +#define CH11_EEP CH[11].EEP +#define CH11_TEP CH[11].TEP +#define CH12_EEP CH[12].EEP +#define CH12_TEP CH[12].TEP +#define CH13_EEP CH[13].EEP +#define CH13_TEP CH[13].TEP +#define CH14_EEP CH[14].EEP +#define CH14_TEP CH[14].TEP +#define CH15_EEP CH[15].EEP +#define CH15_TEP CH[15].TEP + +/* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */ +#define CHG0 CHG[0] +#define CHG1 CHG[1] +#define CHG2 CHG[2] +#define CHG3 CHG[3] + +/* All bitfield macros for the CHGx registers therefore changed name. */ +#define PPI_CHG0_CH15_Pos PPI_CHG_CH15_Pos +#define PPI_CHG0_CH15_Msk PPI_CHG_CH15_Msk +#define PPI_CHG0_CH15_Excluded PPI_CHG_CH15_Excluded +#define PPI_CHG0_CH15_Included PPI_CHG_CH15_Included + +#define PPI_CHG0_CH14_Pos PPI_CHG_CH14_Pos +#define PPI_CHG0_CH14_Msk PPI_CHG_CH14_Msk +#define PPI_CHG0_CH14_Excluded PPI_CHG_CH14_Excluded +#define PPI_CHG0_CH14_Included PPI_CHG_CH14_Included + +#define PPI_CHG0_CH13_Pos PPI_CHG_CH13_Pos +#define PPI_CHG0_CH13_Msk PPI_CHG_CH13_Msk +#define PPI_CHG0_CH13_Excluded PPI_CHG_CH13_Excluded +#define PPI_CHG0_CH13_Included PPI_CHG_CH13_Included + +#define PPI_CHG0_CH12_Pos PPI_CHG_CH12_Pos +#define PPI_CHG0_CH12_Msk PPI_CHG_CH12_Msk +#define PPI_CHG0_CH12_Excluded PPI_CHG_CH12_Excluded +#define PPI_CHG0_CH12_Included PPI_CHG_CH12_Included + +#define PPI_CHG0_CH11_Pos PPI_CHG_CH11_Pos +#define PPI_CHG0_CH11_Msk PPI_CHG_CH11_Msk +#define PPI_CHG0_CH11_Excluded PPI_CHG_CH11_Excluded +#define PPI_CHG0_CH11_Included PPI_CHG_CH11_Included + +#define PPI_CHG0_CH10_Pos PPI_CHG_CH10_Pos +#define PPI_CHG0_CH10_Msk PPI_CHG_CH10_Msk +#define PPI_CHG0_CH10_Excluded PPI_CHG_CH10_Excluded +#define PPI_CHG0_CH10_Included PPI_CHG_CH10_Included + +#define PPI_CHG0_CH9_Pos PPI_CHG_CH9_Pos +#define PPI_CHG0_CH9_Msk PPI_CHG_CH9_Msk +#define PPI_CHG0_CH9_Excluded PPI_CHG_CH9_Excluded +#define PPI_CHG0_CH9_Included PPI_CHG_CH9_Included + +#define PPI_CHG0_CH8_Pos PPI_CHG_CH8_Pos +#define PPI_CHG0_CH8_Msk PPI_CHG_CH8_Msk +#define PPI_CHG0_CH8_Excluded PPI_CHG_CH8_Excluded +#define PPI_CHG0_CH8_Included PPI_CHG_CH8_Included + +#define PPI_CHG0_CH7_Pos PPI_CHG_CH7_Pos +#define PPI_CHG0_CH7_Msk PPI_CHG_CH7_Msk +#define PPI_CHG0_CH7_Excluded PPI_CHG_CH7_Excluded +#define PPI_CHG0_CH7_Included PPI_CHG_CH7_Included + +#define PPI_CHG0_CH6_Pos PPI_CHG_CH6_Pos +#define PPI_CHG0_CH6_Msk PPI_CHG_CH6_Msk +#define PPI_CHG0_CH6_Excluded PPI_CHG_CH6_Excluded +#define PPI_CHG0_CH6_Included PPI_CHG_CH6_Included + +#define PPI_CHG0_CH5_Pos PPI_CHG_CH5_Pos +#define PPI_CHG0_CH5_Msk PPI_CHG_CH5_Msk +#define PPI_CHG0_CH5_Excluded PPI_CHG_CH5_Excluded +#define PPI_CHG0_CH5_Included PPI_CHG_CH5_Included + +#define PPI_CHG0_CH4_Pos PPI_CHG_CH4_Pos +#define PPI_CHG0_CH4_Msk PPI_CHG_CH4_Msk +#define PPI_CHG0_CH4_Excluded PPI_CHG_CH4_Excluded +#define PPI_CHG0_CH4_Included PPI_CHG_CH4_Included + +#define PPI_CHG0_CH3_Pos PPI_CHG_CH3_Pos +#define PPI_CHG0_CH3_Msk PPI_CHG_CH3_Msk +#define PPI_CHG0_CH3_Excluded PPI_CHG_CH3_Excluded +#define PPI_CHG0_CH3_Included PPI_CHG_CH3_Included + +#define PPI_CHG0_CH2_Pos PPI_CHG_CH2_Pos +#define PPI_CHG0_CH2_Msk PPI_CHG_CH2_Msk +#define PPI_CHG0_CH2_Excluded PPI_CHG_CH2_Excluded +#define PPI_CHG0_CH2_Included PPI_CHG_CH2_Included + +#define PPI_CHG0_CH1_Pos PPI_CHG_CH1_Pos +#define PPI_CHG0_CH1_Msk PPI_CHG_CH1_Msk +#define PPI_CHG0_CH1_Excluded PPI_CHG_CH1_Excluded +#define PPI_CHG0_CH1_Included PPI_CHG_CH1_Included + +#define PPI_CHG0_CH0_Pos PPI_CHG_CH0_Pos +#define PPI_CHG0_CH0_Msk PPI_CHG_CH0_Msk +#define PPI_CHG0_CH0_Excluded PPI_CHG_CH0_Excluded +#define PPI_CHG0_CH0_Included PPI_CHG_CH0_Included + +#define PPI_CHG1_CH15_Pos PPI_CHG_CH15_Pos +#define PPI_CHG1_CH15_Msk PPI_CHG_CH15_Msk +#define PPI_CHG1_CH15_Excluded PPI_CHG_CH15_Excluded +#define PPI_CHG1_CH15_Included PPI_CHG_CH15_Included + +#define PPI_CHG1_CH14_Pos PPI_CHG_CH14_Pos +#define PPI_CHG1_CH14_Msk PPI_CHG_CH14_Msk +#define PPI_CHG1_CH14_Excluded PPI_CHG_CH14_Excluded +#define PPI_CHG1_CH14_Included PPI_CHG_CH14_Included + +#define PPI_CHG1_CH13_Pos PPI_CHG_CH13_Pos +#define PPI_CHG1_CH13_Msk PPI_CHG_CH13_Msk +#define PPI_CHG1_CH13_Excluded PPI_CHG_CH13_Excluded +#define PPI_CHG1_CH13_Included PPI_CHG_CH13_Included + +#define PPI_CHG1_CH12_Pos PPI_CHG_CH12_Pos +#define PPI_CHG1_CH12_Msk PPI_CHG_CH12_Msk +#define PPI_CHG1_CH12_Excluded PPI_CHG_CH12_Excluded +#define PPI_CHG1_CH12_Included PPI_CHG_CH12_Included + +#define PPI_CHG1_CH11_Pos PPI_CHG_CH11_Pos +#define PPI_CHG1_CH11_Msk PPI_CHG_CH11_Msk +#define PPI_CHG1_CH11_Excluded PPI_CHG_CH11_Excluded +#define PPI_CHG1_CH11_Included PPI_CHG_CH11_Included + +#define PPI_CHG1_CH10_Pos PPI_CHG_CH10_Pos +#define PPI_CHG1_CH10_Msk PPI_CHG_CH10_Msk +#define PPI_CHG1_CH10_Excluded PPI_CHG_CH10_Excluded +#define PPI_CHG1_CH10_Included PPI_CHG_CH10_Included + +#define PPI_CHG1_CH9_Pos PPI_CHG_CH9_Pos +#define PPI_CHG1_CH9_Msk PPI_CHG_CH9_Msk +#define PPI_CHG1_CH9_Excluded PPI_CHG_CH9_Excluded +#define PPI_CHG1_CH9_Included PPI_CHG_CH9_Included + +#define PPI_CHG1_CH8_Pos PPI_CHG_CH8_Pos +#define PPI_CHG1_CH8_Msk PPI_CHG_CH8_Msk +#define PPI_CHG1_CH8_Excluded PPI_CHG_CH8_Excluded +#define PPI_CHG1_CH8_Included PPI_CHG_CH8_Included + +#define PPI_CHG1_CH7_Pos PPI_CHG_CH7_Pos +#define PPI_CHG1_CH7_Msk PPI_CHG_CH7_Msk +#define PPI_CHG1_CH7_Excluded PPI_CHG_CH7_Excluded +#define PPI_CHG1_CH7_Included PPI_CHG_CH7_Included + +#define PPI_CHG1_CH6_Pos PPI_CHG_CH6_Pos +#define PPI_CHG1_CH6_Msk PPI_CHG_CH6_Msk +#define PPI_CHG1_CH6_Excluded PPI_CHG_CH6_Excluded +#define PPI_CHG1_CH6_Included PPI_CHG_CH6_Included + +#define PPI_CHG1_CH5_Pos PPI_CHG_CH5_Pos +#define PPI_CHG1_CH5_Msk PPI_CHG_CH5_Msk +#define PPI_CHG1_CH5_Excluded PPI_CHG_CH5_Excluded +#define PPI_CHG1_CH5_Included PPI_CHG_CH5_Included + +#define PPI_CHG1_CH4_Pos PPI_CHG_CH4_Pos +#define PPI_CHG1_CH4_Msk PPI_CHG_CH4_Msk +#define PPI_CHG1_CH4_Excluded PPI_CHG_CH4_Excluded +#define PPI_CHG1_CH4_Included PPI_CHG_CH4_Included + +#define PPI_CHG1_CH3_Pos PPI_CHG_CH3_Pos +#define PPI_CHG1_CH3_Msk PPI_CHG_CH3_Msk +#define PPI_CHG1_CH3_Excluded PPI_CHG_CH3_Excluded +#define PPI_CHG1_CH3_Included PPI_CHG_CH3_Included + +#define PPI_CHG1_CH2_Pos PPI_CHG_CH2_Pos +#define PPI_CHG1_CH2_Msk PPI_CHG_CH2_Msk +#define PPI_CHG1_CH2_Excluded PPI_CHG_CH2_Excluded +#define PPI_CHG1_CH2_Included PPI_CHG_CH2_Included + +#define PPI_CHG1_CH1_Pos PPI_CHG_CH1_Pos +#define PPI_CHG1_CH1_Msk PPI_CHG_CH1_Msk +#define PPI_CHG1_CH1_Excluded PPI_CHG_CH1_Excluded +#define PPI_CHG1_CH1_Included PPI_CHG_CH1_Included + +#define PPI_CHG1_CH0_Pos PPI_CHG_CH0_Pos +#define PPI_CHG1_CH0_Msk PPI_CHG_CH0_Msk +#define PPI_CHG1_CH0_Excluded PPI_CHG_CH0_Excluded +#define PPI_CHG1_CH0_Included PPI_CHG_CH0_Included + +#define PPI_CHG2_CH15_Pos PPI_CHG_CH15_Pos +#define PPI_CHG2_CH15_Msk PPI_CHG_CH15_Msk +#define PPI_CHG2_CH15_Excluded PPI_CHG_CH15_Excluded +#define PPI_CHG2_CH15_Included PPI_CHG_CH15_Included + +#define PPI_CHG2_CH14_Pos PPI_CHG_CH14_Pos +#define PPI_CHG2_CH14_Msk PPI_CHG_CH14_Msk +#define PPI_CHG2_CH14_Excluded PPI_CHG_CH14_Excluded +#define PPI_CHG2_CH14_Included PPI_CHG_CH14_Included + +#define PPI_CHG2_CH13_Pos PPI_CHG_CH13_Pos +#define PPI_CHG2_CH13_Msk PPI_CHG_CH13_Msk +#define PPI_CHG2_CH13_Excluded PPI_CHG_CH13_Excluded +#define PPI_CHG2_CH13_Included PPI_CHG_CH13_Included + +#define PPI_CHG2_CH12_Pos PPI_CHG_CH12_Pos +#define PPI_CHG2_CH12_Msk PPI_CHG_CH12_Msk +#define PPI_CHG2_CH12_Excluded PPI_CHG_CH12_Excluded +#define PPI_CHG2_CH12_Included PPI_CHG_CH12_Included + +#define PPI_CHG2_CH11_Pos PPI_CHG_CH11_Pos +#define PPI_CHG2_CH11_Msk PPI_CHG_CH11_Msk +#define PPI_CHG2_CH11_Excluded PPI_CHG_CH11_Excluded +#define PPI_CHG2_CH11_Included PPI_CHG_CH11_Included + +#define PPI_CHG2_CH10_Pos PPI_CHG_CH10_Pos +#define PPI_CHG2_CH10_Msk PPI_CHG_CH10_Msk +#define PPI_CHG2_CH10_Excluded PPI_CHG_CH10_Excluded +#define PPI_CHG2_CH10_Included PPI_CHG_CH10_Included + +#define PPI_CHG2_CH9_Pos PPI_CHG_CH9_Pos +#define PPI_CHG2_CH9_Msk PPI_CHG_CH9_Msk +#define PPI_CHG2_CH9_Excluded PPI_CHG_CH9_Excluded +#define PPI_CHG2_CH9_Included PPI_CHG_CH9_Included + +#define PPI_CHG2_CH8_Pos PPI_CHG_CH8_Pos +#define PPI_CHG2_CH8_Msk PPI_CHG_CH8_Msk +#define PPI_CHG2_CH8_Excluded PPI_CHG_CH8_Excluded +#define PPI_CHG2_CH8_Included PPI_CHG_CH8_Included + +#define PPI_CHG2_CH7_Pos PPI_CHG_CH7_Pos +#define PPI_CHG2_CH7_Msk PPI_CHG_CH7_Msk +#define PPI_CHG2_CH7_Excluded PPI_CHG_CH7_Excluded +#define PPI_CHG2_CH7_Included PPI_CHG_CH7_Included + +#define PPI_CHG2_CH6_Pos PPI_CHG_CH6_Pos +#define PPI_CHG2_CH6_Msk PPI_CHG_CH6_Msk +#define PPI_CHG2_CH6_Excluded PPI_CHG_CH6_Excluded +#define PPI_CHG2_CH6_Included PPI_CHG_CH6_Included + +#define PPI_CHG2_CH5_Pos PPI_CHG_CH5_Pos +#define PPI_CHG2_CH5_Msk PPI_CHG_CH5_Msk +#define PPI_CHG2_CH5_Excluded PPI_CHG_CH5_Excluded +#define PPI_CHG2_CH5_Included PPI_CHG_CH5_Included + +#define PPI_CHG2_CH4_Pos PPI_CHG_CH4_Pos +#define PPI_CHG2_CH4_Msk PPI_CHG_CH4_Msk +#define PPI_CHG2_CH4_Excluded PPI_CHG_CH4_Excluded +#define PPI_CHG2_CH4_Included PPI_CHG_CH4_Included + +#define PPI_CHG2_CH3_Pos PPI_CHG_CH3_Pos +#define PPI_CHG2_CH3_Msk PPI_CHG_CH3_Msk +#define PPI_CHG2_CH3_Excluded PPI_CHG_CH3_Excluded +#define PPI_CHG2_CH3_Included PPI_CHG_CH3_Included + +#define PPI_CHG2_CH2_Pos PPI_CHG_CH2_Pos +#define PPI_CHG2_CH2_Msk PPI_CHG_CH2_Msk +#define PPI_CHG2_CH2_Excluded PPI_CHG_CH2_Excluded +#define PPI_CHG2_CH2_Included PPI_CHG_CH2_Included + +#define PPI_CHG2_CH1_Pos PPI_CHG_CH1_Pos +#define PPI_CHG2_CH1_Msk PPI_CHG_CH1_Msk +#define PPI_CHG2_CH1_Excluded PPI_CHG_CH1_Excluded +#define PPI_CHG2_CH1_Included PPI_CHG_CH1_Included + +#define PPI_CHG2_CH0_Pos PPI_CHG_CH0_Pos +#define PPI_CHG2_CH0_Msk PPI_CHG_CH0_Msk +#define PPI_CHG2_CH0_Excluded PPI_CHG_CH0_Excluded +#define PPI_CHG2_CH0_Included PPI_CHG_CH0_Included + +#define PPI_CHG3_CH15_Pos PPI_CHG_CH15_Pos +#define PPI_CHG3_CH15_Msk PPI_CHG_CH15_Msk +#define PPI_CHG3_CH15_Excluded PPI_CHG_CH15_Excluded +#define PPI_CHG3_CH15_Included PPI_CHG_CH15_Included + +#define PPI_CHG3_CH14_Pos PPI_CHG_CH14_Pos +#define PPI_CHG3_CH14_Msk PPI_CHG_CH14_Msk +#define PPI_CHG3_CH14_Excluded PPI_CHG_CH14_Excluded +#define PPI_CHG3_CH14_Included PPI_CHG_CH14_Included + +#define PPI_CHG3_CH13_Pos PPI_CHG_CH13_Pos +#define PPI_CHG3_CH13_Msk PPI_CHG_CH13_Msk +#define PPI_CHG3_CH13_Excluded PPI_CHG_CH13_Excluded +#define PPI_CHG3_CH13_Included PPI_CHG_CH13_Included + +#define PPI_CHG3_CH12_Pos PPI_CHG_CH12_Pos +#define PPI_CHG3_CH12_Msk PPI_CHG_CH12_Msk +#define PPI_CHG3_CH12_Excluded PPI_CHG_CH12_Excluded +#define PPI_CHG3_CH12_Included PPI_CHG_CH12_Included + +#define PPI_CHG3_CH11_Pos PPI_CHG_CH11_Pos +#define PPI_CHG3_CH11_Msk PPI_CHG_CH11_Msk +#define PPI_CHG3_CH11_Excluded PPI_CHG_CH11_Excluded +#define PPI_CHG3_CH11_Included PPI_CHG_CH11_Included + +#define PPI_CHG3_CH10_Pos PPI_CHG_CH10_Pos +#define PPI_CHG3_CH10_Msk PPI_CHG_CH10_Msk +#define PPI_CHG3_CH10_Excluded PPI_CHG_CH10_Excluded +#define PPI_CHG3_CH10_Included PPI_CHG_CH10_Included + +#define PPI_CHG3_CH9_Pos PPI_CHG_CH9_Pos +#define PPI_CHG3_CH9_Msk PPI_CHG_CH9_Msk +#define PPI_CHG3_CH9_Excluded PPI_CHG_CH9_Excluded +#define PPI_CHG3_CH9_Included PPI_CHG_CH9_Included + +#define PPI_CHG3_CH8_Pos PPI_CHG_CH8_Pos +#define PPI_CHG3_CH8_Msk PPI_CHG_CH8_Msk +#define PPI_CHG3_CH8_Excluded PPI_CHG_CH8_Excluded +#define PPI_CHG3_CH8_Included PPI_CHG_CH8_Included + +#define PPI_CHG3_CH7_Pos PPI_CHG_CH7_Pos +#define PPI_CHG3_CH7_Msk PPI_CHG_CH7_Msk +#define PPI_CHG3_CH7_Excluded PPI_CHG_CH7_Excluded +#define PPI_CHG3_CH7_Included PPI_CHG_CH7_Included + +#define PPI_CHG3_CH6_Pos PPI_CHG_CH6_Pos +#define PPI_CHG3_CH6_Msk PPI_CHG_CH6_Msk +#define PPI_CHG3_CH6_Excluded PPI_CHG_CH6_Excluded +#define PPI_CHG3_CH6_Included PPI_CHG_CH6_Included + +#define PPI_CHG3_CH5_Pos PPI_CHG_CH5_Pos +#define PPI_CHG3_CH5_Msk PPI_CHG_CH5_Msk +#define PPI_CHG3_CH5_Excluded PPI_CHG_CH5_Excluded +#define PPI_CHG3_CH5_Included PPI_CHG_CH5_Included + +#define PPI_CHG3_CH4_Pos PPI_CHG_CH4_Pos +#define PPI_CHG3_CH4_Msk PPI_CHG_CH4_Msk +#define PPI_CHG3_CH4_Excluded PPI_CHG_CH4_Excluded +#define PPI_CHG3_CH4_Included PPI_CHG_CH4_Included + +#define PPI_CHG3_CH3_Pos PPI_CHG_CH3_Pos +#define PPI_CHG3_CH3_Msk PPI_CHG_CH3_Msk +#define PPI_CHG3_CH3_Excluded PPI_CHG_CH3_Excluded +#define PPI_CHG3_CH3_Included PPI_CHG_CH3_Included + +#define PPI_CHG3_CH2_Pos PPI_CHG_CH2_Pos +#define PPI_CHG3_CH2_Msk PPI_CHG_CH2_Msk +#define PPI_CHG3_CH2_Excluded PPI_CHG_CH2_Excluded +#define PPI_CHG3_CH2_Included PPI_CHG_CH2_Included + +#define PPI_CHG3_CH1_Pos PPI_CHG_CH1_Pos +#define PPI_CHG3_CH1_Msk PPI_CHG_CH1_Msk +#define PPI_CHG3_CH1_Excluded PPI_CHG_CH1_Excluded +#define PPI_CHG3_CH1_Included PPI_CHG_CH1_Included + +#define PPI_CHG3_CH0_Pos PPI_CHG_CH0_Pos +#define PPI_CHG3_CH0_Msk PPI_CHG_CH0_Msk +#define PPI_CHG3_CH0_Excluded PPI_CHG_CH0_Excluded +#define PPI_CHG3_CH0_Included PPI_CHG_CH0_Included + + + + +/*lint --flb "Leave library region" */ + +#endif /* NRF51_TO_NRF52840_H */ + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52.h new file mode 100644 index 00000000000..81b0a47aae4 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52.h @@ -0,0 +1,2100 @@ + +/****************************************************************************************************//** + * @file nrf52.h + * + * @brief CMSIS Cortex-M4 Peripheral Access Layer Header File for + * nrf52 from Nordic Semiconductor. + * + * @version V1 + * @date 8. March 2018 + * + * @note Generated with SVDConv V2.81d + * from CMSIS SVD File 'nrf52.svd' Version 1, + * + * @par Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + *******************************************************************************************************/ + + + +/** @addtogroup Nordic Semiconductor + * @{ + */ + +/** @addtogroup nrf52 + * @{ + */ + +#ifndef NRF52_H +#define NRF52_H + +#ifdef __cplusplus +extern "C" { +#endif + + +/* ------------------------- Interrupt Number Definition ------------------------ */ + +typedef enum { +/* ------------------- Cortex-M4 Processor Exceptions Numbers ------------------- */ + Reset_IRQn = -15, /*!< 1 Reset Vector, invoked on Power up and warm reset */ + NonMaskableInt_IRQn = -14, /*!< 2 Non maskable Interrupt, cannot be stopped or preempted */ + HardFault_IRQn = -13, /*!< 3 Hard Fault, all classes of Fault */ + MemoryManagement_IRQn = -12, /*!< 4 Memory Management, MPU mismatch, including Access Violation + and No Match */ + BusFault_IRQn = -11, /*!< 5 Bus Fault, Pre-Fetch-, Memory Access Fault, other address/memory + related Fault */ + UsageFault_IRQn = -10, /*!< 6 Usage Fault, i.e. Undef Instruction, Illegal State Transition */ + SVCall_IRQn = -5, /*!< 11 System Service Call via SVC instruction */ + DebugMonitor_IRQn = -4, /*!< 12 Debug Monitor */ + PendSV_IRQn = -2, /*!< 14 Pendable request for system service */ + SysTick_IRQn = -1, /*!< 15 System Tick Timer */ +/* ---------------------- nrf52 Specific Interrupt Numbers ---------------------- */ + POWER_CLOCK_IRQn = 0, /*!< 0 POWER_CLOCK */ + RADIO_IRQn = 1, /*!< 1 RADIO */ + UARTE0_UART0_IRQn = 2, /*!< 2 UARTE0_UART0 */ + SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn= 3, /*!< 3 SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0 */ + SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn= 4, /*!< 4 SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1 */ + NFCT_IRQn = 5, /*!< 5 NFCT */ + GPIOTE_IRQn = 6, /*!< 6 GPIOTE */ + SAADC_IRQn = 7, /*!< 7 SAADC */ + TIMER0_IRQn = 8, /*!< 8 TIMER0 */ + TIMER1_IRQn = 9, /*!< 9 TIMER1 */ + TIMER2_IRQn = 10, /*!< 10 TIMER2 */ + RTC0_IRQn = 11, /*!< 11 RTC0 */ + TEMP_IRQn = 12, /*!< 12 TEMP */ + RNG_IRQn = 13, /*!< 13 RNG */ + ECB_IRQn = 14, /*!< 14 ECB */ + CCM_AAR_IRQn = 15, /*!< 15 CCM_AAR */ + WDT_IRQn = 16, /*!< 16 WDT */ + RTC1_IRQn = 17, /*!< 17 RTC1 */ + QDEC_IRQn = 18, /*!< 18 QDEC */ + COMP_LPCOMP_IRQn = 19, /*!< 19 COMP_LPCOMP */ + SWI0_EGU0_IRQn = 20, /*!< 20 SWI0_EGU0 */ + SWI1_EGU1_IRQn = 21, /*!< 21 SWI1_EGU1 */ + SWI2_EGU2_IRQn = 22, /*!< 22 SWI2_EGU2 */ + SWI3_EGU3_IRQn = 23, /*!< 23 SWI3_EGU3 */ + SWI4_EGU4_IRQn = 24, /*!< 24 SWI4_EGU4 */ + SWI5_EGU5_IRQn = 25, /*!< 25 SWI5_EGU5 */ + TIMER3_IRQn = 26, /*!< 26 TIMER3 */ + TIMER4_IRQn = 27, /*!< 27 TIMER4 */ + PWM0_IRQn = 28, /*!< 28 PWM0 */ + PDM_IRQn = 29, /*!< 29 PDM */ + MWU_IRQn = 32, /*!< 32 MWU */ + PWM1_IRQn = 33, /*!< 33 PWM1 */ + PWM2_IRQn = 34, /*!< 34 PWM2 */ + SPIM2_SPIS2_SPI2_IRQn = 35, /*!< 35 SPIM2_SPIS2_SPI2 */ + RTC2_IRQn = 36, /*!< 36 RTC2 */ + I2S_IRQn = 37, /*!< 37 I2S */ + FPU_IRQn = 38 /*!< 38 FPU */ +} IRQn_Type; + + +/** @addtogroup Configuration_of_CMSIS + * @{ + */ + + +/* ================================================================================ */ +/* ================ Processor and Core Peripheral Section ================ */ +/* ================================================================================ */ + +/* ----------------Configuration of the Cortex-M4 Processor and Core Peripherals---------------- */ +#define __CM4_REV 0x0001 /*!< Cortex-M4 Core Revision */ +#define __MPU_PRESENT 1 /*!< MPU present or not */ +#define __NVIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 1 /*!< FPU present or not */ +/** @} */ /* End of group Configuration_of_CMSIS */ + +#include "core_cm4.h" /*!< Cortex-M4 processor and core peripherals */ +#include "system_nrf52.h" /*!< nrf52 System */ + + +/* ================================================================================ */ +/* ================ Device Specific Peripheral Section ================ */ +/* ================================================================================ */ + + +/** @addtogroup Device_Peripheral_Registers + * @{ + */ + + +/* ------------------- Start of section using anonymous unions ------------------ */ +#if defined(__CC_ARM) + #pragma push + #pragma anon_unions +#elif defined(__ICCARM__) + #pragma language=extended +#elif defined(__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined(__TMS470__) +/* anonymous unions are enabled by default */ +#elif defined(__TASKING__) + #pragma warning 586 +#else + #warning Not supported compiler type +#endif + + +typedef struct { + __I uint32_t PART; /*!< Part code */ + __I uint32_t VARIANT; /*!< Part Variant, Hardware version and Production configuration */ + __I uint32_t PACKAGE; /*!< Package option */ + __I uint32_t RAM; /*!< RAM variant */ + __I uint32_t FLASH; /*!< Flash variant */ + __IO uint32_t UNUSED0[3]; /*!< Description collection[0]: Unspecified */ +} FICR_INFO_Type; + +typedef struct { + __I uint32_t A0; /*!< Slope definition A0. */ + __I uint32_t A1; /*!< Slope definition A1. */ + __I uint32_t A2; /*!< Slope definition A2. */ + __I uint32_t A3; /*!< Slope definition A3. */ + __I uint32_t A4; /*!< Slope definition A4. */ + __I uint32_t A5; /*!< Slope definition A5. */ + __I uint32_t B0; /*!< y-intercept B0. */ + __I uint32_t B1; /*!< y-intercept B1. */ + __I uint32_t B2; /*!< y-intercept B2. */ + __I uint32_t B3; /*!< y-intercept B3. */ + __I uint32_t B4; /*!< y-intercept B4. */ + __I uint32_t B5; /*!< y-intercept B5. */ + __I uint32_t T0; /*!< Segment end T0. */ + __I uint32_t T1; /*!< Segment end T1. */ + __I uint32_t T2; /*!< Segment end T2. */ + __I uint32_t T3; /*!< Segment end T3. */ + __I uint32_t T4; /*!< Segment end T4. */ +} FICR_TEMP_Type; + +typedef struct { + __I uint32_t TAGHEADER0; /*!< Default header for NFC Tag. Software can read these values to + populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ + __I uint32_t TAGHEADER1; /*!< Default header for NFC Tag. Software can read these values to + populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ + __I uint32_t TAGHEADER2; /*!< Default header for NFC Tag. Software can read these values to + populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ + __I uint32_t TAGHEADER3; /*!< Default header for NFC Tag. Software can read these values to + populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ +} FICR_NFC_Type; + +typedef struct { + __IO uint32_t POWER; /*!< Description cluster[0]: RAM0 power control register */ + __O uint32_t POWERSET; /*!< Description cluster[0]: RAM0 power control set register */ + __O uint32_t POWERCLR; /*!< Description cluster[0]: RAM0 power control clear register */ + __I uint32_t RESERVED0; +} POWER_RAM_Type; + +typedef struct { + __IO uint32_t RTS; /*!< Pin select for RTS signal */ + __IO uint32_t TXD; /*!< Pin select for TXD signal */ + __IO uint32_t CTS; /*!< Pin select for CTS signal */ + __IO uint32_t RXD; /*!< Pin select for RXD signal */ +} UARTE_PSEL_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in receive buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ +} UARTE_RXD_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in transmit buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ +} UARTE_TXD_Type; + +typedef struct { + __IO uint32_t SCK; /*!< Pin select for SCK */ + __IO uint32_t MOSI; /*!< Pin select for MOSI signal */ + __IO uint32_t MISO; /*!< Pin select for MISO signal */ +} SPIM_PSEL_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in receive buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ + __IO uint32_t LIST; /*!< EasyDMA list type */ +} SPIM_RXD_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in transmit buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ + __IO uint32_t LIST; /*!< EasyDMA list type */ +} SPIM_TXD_Type; + +typedef struct { + __IO uint32_t SCK; /*!< Pin select for SCK */ + __IO uint32_t MISO; /*!< Pin select for MISO signal */ + __IO uint32_t MOSI; /*!< Pin select for MOSI signal */ + __IO uint32_t CSN; /*!< Pin select for CSN signal */ +} SPIS_PSEL_Type; + +typedef struct { + __IO uint32_t PTR; /*!< RXD data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in receive buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes received in last granted transaction */ +} SPIS_RXD_Type; + +typedef struct { + __IO uint32_t PTR; /*!< TXD data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in transmit buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transmitted in last granted transaction */ +} SPIS_TXD_Type; + +typedef struct { + __IO uint32_t SCL; /*!< Pin select for SCL signal */ + __IO uint32_t SDA; /*!< Pin select for SDA signal */ +} TWIM_PSEL_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in receive buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ + __IO uint32_t LIST; /*!< EasyDMA list type */ +} TWIM_RXD_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in transmit buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ + __IO uint32_t LIST; /*!< EasyDMA list type */ +} TWIM_TXD_Type; + +typedef struct { + __IO uint32_t SCL; /*!< Pin select for SCL signal */ + __IO uint32_t SDA; /*!< Pin select for SDA signal */ +} TWIS_PSEL_Type; + +typedef struct { + __IO uint32_t PTR; /*!< RXD Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in RXD buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last RXD transaction */ +} TWIS_RXD_Type; + +typedef struct { + __IO uint32_t PTR; /*!< TXD Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in TXD buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last TXD transaction */ +} TWIS_TXD_Type; + +typedef struct { + __IO uint32_t SCK; /*!< Pin select for SCK */ + __IO uint32_t MOSI; /*!< Pin select for MOSI */ + __IO uint32_t MISO; /*!< Pin select for MISO */ +} SPI_PSEL_Type; + +typedef struct { + __IO uint32_t RX; /*!< Result of last incoming frames */ +} NFCT_FRAMESTATUS_Type; + +typedef struct { + __IO uint32_t FRAMECONFIG; /*!< Configuration of outgoing frames */ + __IO uint32_t AMOUNT; /*!< Size of outgoing frame */ +} NFCT_TXD_Type; + +typedef struct { + __IO uint32_t FRAMECONFIG; /*!< Configuration of incoming frames */ + __I uint32_t AMOUNT; /*!< Size of last incoming frame */ +} NFCT_RXD_Type; + +typedef struct { + __IO uint32_t LIMITH; /*!< Description cluster[0]: Last results is equal or above CH[0].LIMIT.HIGH */ + __IO uint32_t LIMITL; /*!< Description cluster[0]: Last results is equal or below CH[0].LIMIT.LOW */ +} SAADC_EVENTS_CH_Type; + +typedef struct { + __IO uint32_t PSELP; /*!< Description cluster[0]: Input positive pin selection for CH[0] */ + __IO uint32_t PSELN; /*!< Description cluster[0]: Input negative pin selection for CH[0] */ + __IO uint32_t CONFIG; /*!< Description cluster[0]: Input configuration for CH[0] */ + __IO uint32_t LIMIT; /*!< Description cluster[0]: High/low limits for event monitoring + a channel */ +} SAADC_CH_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of buffer words to transfer */ + __I uint32_t AMOUNT; /*!< Number of buffer words transferred since last START */ +} SAADC_RESULT_Type; + +typedef struct { + __IO uint32_t LED; /*!< Pin select for LED signal */ + __IO uint32_t A; /*!< Pin select for A signal */ + __IO uint32_t B; /*!< Pin select for B signal */ +} QDEC_PSEL_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Description cluster[0]: Beginning address in Data RAM of this + sequence */ + __IO uint32_t CNT; /*!< Description cluster[0]: Amount of values (duty cycles) in this + sequence */ + __IO uint32_t REFRESH; /*!< Description cluster[0]: Amount of additional PWM periods between + samples loaded into compare register */ + __IO uint32_t ENDDELAY; /*!< Description cluster[0]: Time added after the sequence */ + __I uint32_t RESERVED1[4]; +} PWM_SEQ_Type; + +typedef struct { + __IO uint32_t OUT[4]; /*!< Description collection[0]: Output pin select for PWM channel + 0 */ +} PWM_PSEL_Type; + +typedef struct { + __IO uint32_t CLK; /*!< Pin number configuration for PDM CLK signal */ + __IO uint32_t DIN; /*!< Pin number configuration for PDM DIN signal */ +} PDM_PSEL_Type; + +typedef struct { + __IO uint32_t PTR; /*!< RAM address pointer to write samples to with EasyDMA */ + __IO uint32_t MAXCNT; /*!< Number of samples to allocate memory for in EasyDMA mode */ +} PDM_SAMPLE_Type; + +typedef struct { + __O uint32_t EN; /*!< Description cluster[0]: Enable channel group 0 */ + __O uint32_t DIS; /*!< Description cluster[0]: Disable channel group 0 */ +} PPI_TASKS_CHG_Type; + +typedef struct { + __IO uint32_t EEP; /*!< Description cluster[0]: Channel 0 event end-point */ + __IO uint32_t TEP; /*!< Description cluster[0]: Channel 0 task end-point */ +} PPI_CH_Type; + +typedef struct { + __IO uint32_t TEP; /*!< Description cluster[0]: Channel 0 task end-point */ +} PPI_FORK_Type; + +typedef struct { + __IO uint32_t WA; /*!< Description cluster[0]: Write access to region 0 detected */ + __IO uint32_t RA; /*!< Description cluster[0]: Read access to region 0 detected */ +} MWU_EVENTS_REGION_Type; + +typedef struct { + __IO uint32_t WA; /*!< Description cluster[0]: Write access to peripheral region 0 + detected */ + __IO uint32_t RA; /*!< Description cluster[0]: Read access to peripheral region 0 detected */ +} MWU_EVENTS_PREGION_Type; + +typedef struct { + __IO uint32_t SUBSTATWA; /*!< Description cluster[0]: Source of event/interrupt in region + 0, write access detected while corresponding subregion was enabled + for watching */ + __IO uint32_t SUBSTATRA; /*!< Description cluster[0]: Source of event/interrupt in region + 0, read access detected while corresponding subregion was enabled + for watching */ +} MWU_PERREGION_Type; + +typedef struct { + __IO uint32_t START; /*!< Description cluster[0]: Start address for region 0 */ + __IO uint32_t END; /*!< Description cluster[0]: End address of region 0 */ + __I uint32_t RESERVED2[2]; +} MWU_REGION_Type; + +typedef struct { + __I uint32_t START; /*!< Description cluster[0]: Reserved for future use */ + __I uint32_t END; /*!< Description cluster[0]: Reserved for future use */ + __IO uint32_t SUBS; /*!< Description cluster[0]: Subregions of region 0 */ + __I uint32_t RESERVED3; +} MWU_PREGION_Type; + +typedef struct { + __IO uint32_t MODE; /*!< I2S mode. */ + __IO uint32_t RXEN; /*!< Reception (RX) enable. */ + __IO uint32_t TXEN; /*!< Transmission (TX) enable. */ + __IO uint32_t MCKEN; /*!< Master clock generator enable. */ + __IO uint32_t MCKFREQ; /*!< Master clock generator frequency. */ + __IO uint32_t RATIO; /*!< MCK / LRCK ratio. */ + __IO uint32_t SWIDTH; /*!< Sample width. */ + __IO uint32_t ALIGN; /*!< Alignment of sample within a frame. */ + __IO uint32_t FORMAT; /*!< Frame format. */ + __IO uint32_t CHANNELS; /*!< Enable channels. */ +} I2S_CONFIG_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Receive buffer RAM start address. */ +} I2S_RXD_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Transmit buffer RAM start address. */ +} I2S_TXD_Type; + +typedef struct { + __IO uint32_t MAXCNT; /*!< Size of RXD and TXD buffers. */ +} I2S_RXTXD_Type; + +typedef struct { + __IO uint32_t MCK; /*!< Pin select for MCK signal. */ + __IO uint32_t SCK; /*!< Pin select for SCK signal. */ + __IO uint32_t LRCK; /*!< Pin select for LRCK signal. */ + __IO uint32_t SDIN; /*!< Pin select for SDIN signal. */ + __IO uint32_t SDOUT; /*!< Pin select for SDOUT signal. */ +} I2S_PSEL_Type; + + +/* ================================================================================ */ +/* ================ FICR ================ */ +/* ================================================================================ */ + + +/** + * @brief Factory Information Configuration Registers (FICR) + */ + +typedef struct { /*!< FICR Structure */ + __I uint32_t RESERVED0[4]; + __I uint32_t CODEPAGESIZE; /*!< Code memory page size */ + __I uint32_t CODESIZE; /*!< Code memory size */ + __I uint32_t RESERVED1[18]; + __I uint32_t DEVICEID[2]; /*!< Description collection[0]: Device identifier */ + __I uint32_t RESERVED2[6]; + __I uint32_t ER[4]; /*!< Description collection[0]: Encryption Root, word 0 */ + __I uint32_t IR[4]; /*!< Description collection[0]: Identity Root, word 0 */ + __I uint32_t DEVICEADDRTYPE; /*!< Device address type */ + __I uint32_t DEVICEADDR[2]; /*!< Description collection[0]: Device address 0 */ + __I uint32_t RESERVED3[21]; + FICR_INFO_Type INFO; /*!< Device info */ + __I uint32_t RESERVED4[185]; + FICR_TEMP_Type TEMP; /*!< Registers storing factory TEMP module linearization coefficients */ + __I uint32_t RESERVED5[2]; + FICR_NFC_Type NFC; /*!< Unspecified */ +} NRF_FICR_Type; + + +/* ================================================================================ */ +/* ================ UICR ================ */ +/* ================================================================================ */ + + +/** + * @brief User Information Configuration Registers (UICR) + */ + +typedef struct { /*!< UICR Structure */ + __IO uint32_t UNUSED0; /*!< Unspecified */ + __IO uint32_t UNUSED1; /*!< Unspecified */ + __IO uint32_t UNUSED2; /*!< Unspecified */ + __I uint32_t RESERVED0; + __IO uint32_t UNUSED3; /*!< Unspecified */ + __IO uint32_t NRFFW[15]; /*!< Description collection[0]: Reserved for Nordic firmware design */ + __IO uint32_t NRFHW[12]; /*!< Description collection[0]: Reserved for Nordic hardware design */ + __IO uint32_t CUSTOMER[32]; /*!< Description collection[0]: Reserved for customer */ + __I uint32_t RESERVED1[64]; + __IO uint32_t PSELRESET[2]; /*!< Description collection[0]: Mapping of the nRESET function (see + POWER chapter for details) */ + __IO uint32_t APPROTECT; /*!< Access Port protection */ + __IO uint32_t NFCPINS; /*!< Setting of pins dedicated to NFC functionality: NFC antenna + or GPIO */ +} NRF_UICR_Type; + + +/* ================================================================================ */ +/* ================ BPROT ================ */ +/* ================================================================================ */ + + +/** + * @brief Block Protect (BPROT) + */ + +typedef struct { /*!< BPROT Structure */ + __I uint32_t RESERVED0[384]; + __IO uint32_t CONFIG0; /*!< Block protect configuration register 0 */ + __IO uint32_t CONFIG1; /*!< Block protect configuration register 1 */ + __IO uint32_t DISABLEINDEBUG; /*!< Disable protection mechanism in debug interface mode */ + __IO uint32_t UNUSED0; /*!< Unspecified */ + __IO uint32_t CONFIG2; /*!< Block protect configuration register 2 */ + __IO uint32_t CONFIG3; /*!< Block protect configuration register 3 */ +} NRF_BPROT_Type; + + +/* ================================================================================ */ +/* ================ POWER ================ */ +/* ================================================================================ */ + + +/** + * @brief Power control (POWER) + */ + +typedef struct { /*!< POWER Structure */ + __I uint32_t RESERVED0[30]; + __O uint32_t TASKS_CONSTLAT; /*!< Enable constant latency mode */ + __O uint32_t TASKS_LOWPWR; /*!< Enable low power mode (variable latency) */ + __I uint32_t RESERVED1[34]; + __IO uint32_t EVENTS_POFWARN; /*!< Power failure warning */ + __I uint32_t RESERVED2[2]; + __IO uint32_t EVENTS_SLEEPENTER; /*!< CPU entered WFI/WFE sleep */ + __IO uint32_t EVENTS_SLEEPEXIT; /*!< CPU exited WFI/WFE sleep */ + __I uint32_t RESERVED3[122]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED4[61]; + __IO uint32_t RESETREAS; /*!< Reset reason */ + __I uint32_t RESERVED5[9]; + __I uint32_t RAMSTATUS; /*!< Deprecated register - RAM status register */ + __I uint32_t RESERVED6[53]; + __O uint32_t SYSTEMOFF; /*!< System OFF register */ + __I uint32_t RESERVED7[3]; + __IO uint32_t POFCON; /*!< Power failure comparator configuration */ + __I uint32_t RESERVED8[2]; + __IO uint32_t GPREGRET; /*!< General purpose retention register */ + __IO uint32_t GPREGRET2; /*!< General purpose retention register */ + __IO uint32_t RAMON; /*!< Deprecated register - RAM on/off register (this register is + retained) */ + __I uint32_t RESERVED9[11]; + __IO uint32_t RAMONB; /*!< Deprecated register - RAM on/off register (this register is + retained) */ + __I uint32_t RESERVED10[8]; + __IO uint32_t DCDCEN; /*!< DC/DC enable register */ + __I uint32_t RESERVED11[225]; + POWER_RAM_Type RAM[8]; /*!< Unspecified */ +} NRF_POWER_Type; + + +/* ================================================================================ */ +/* ================ CLOCK ================ */ +/* ================================================================================ */ + + +/** + * @brief Clock control (CLOCK) + */ + +typedef struct { /*!< CLOCK Structure */ + __O uint32_t TASKS_HFCLKSTART; /*!< Start HFCLK crystal oscillator */ + __O uint32_t TASKS_HFCLKSTOP; /*!< Stop HFCLK crystal oscillator */ + __O uint32_t TASKS_LFCLKSTART; /*!< Start LFCLK source */ + __O uint32_t TASKS_LFCLKSTOP; /*!< Stop LFCLK source */ + __O uint32_t TASKS_CAL; /*!< Start calibration of LFRC oscillator */ + __O uint32_t TASKS_CTSTART; /*!< Start calibration timer */ + __O uint32_t TASKS_CTSTOP; /*!< Stop calibration timer */ + __I uint32_t RESERVED0[57]; + __IO uint32_t EVENTS_HFCLKSTARTED; /*!< HFCLK oscillator started */ + __IO uint32_t EVENTS_LFCLKSTARTED; /*!< LFCLK started */ + __I uint32_t RESERVED1; + __IO uint32_t EVENTS_DONE; /*!< Calibration of LFCLK RC oscillator complete event */ + __IO uint32_t EVENTS_CTTO; /*!< Calibration timer timeout */ + __I uint32_t RESERVED2[124]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[63]; + __I uint32_t HFCLKRUN; /*!< Status indicating that HFCLKSTART task has been triggered */ + __I uint32_t HFCLKSTAT; /*!< HFCLK status */ + __I uint32_t RESERVED4; + __I uint32_t LFCLKRUN; /*!< Status indicating that LFCLKSTART task has been triggered */ + __I uint32_t LFCLKSTAT; /*!< LFCLK status */ + __I uint32_t LFCLKSRCCOPY; /*!< Copy of LFCLKSRC register, set when LFCLKSTART task was triggered */ + __I uint32_t RESERVED5[62]; + __IO uint32_t LFCLKSRC; /*!< Clock source for the LFCLK */ + __I uint32_t RESERVED6[7]; + __IO uint32_t CTIV; /*!< Calibration timer interval */ + __I uint32_t RESERVED7[8]; + __IO uint32_t TRACECONFIG; /*!< Clocking options for the Trace Port debug interface */ +} NRF_CLOCK_Type; + + +/* ================================================================================ */ +/* ================ RADIO ================ */ +/* ================================================================================ */ + + +/** + * @brief 2.4 GHz Radio (RADIO) + */ + +typedef struct { /*!< RADIO Structure */ + __O uint32_t TASKS_TXEN; /*!< Enable RADIO in TX mode */ + __O uint32_t TASKS_RXEN; /*!< Enable RADIO in RX mode */ + __O uint32_t TASKS_START; /*!< Start RADIO */ + __O uint32_t TASKS_STOP; /*!< Stop RADIO */ + __O uint32_t TASKS_DISABLE; /*!< Disable RADIO */ + __O uint32_t TASKS_RSSISTART; /*!< Start the RSSI and take one single sample of the receive signal + strength. */ + __O uint32_t TASKS_RSSISTOP; /*!< Stop the RSSI measurement */ + __O uint32_t TASKS_BCSTART; /*!< Start the bit counter */ + __O uint32_t TASKS_BCSTOP; /*!< Stop the bit counter */ + __I uint32_t RESERVED0[55]; + __IO uint32_t EVENTS_READY; /*!< RADIO has ramped up and is ready to be started */ + __IO uint32_t EVENTS_ADDRESS; /*!< Address sent or received */ + __IO uint32_t EVENTS_PAYLOAD; /*!< Packet payload sent or received */ + __IO uint32_t EVENTS_END; /*!< Packet sent or received */ + __IO uint32_t EVENTS_DISABLED; /*!< RADIO has been disabled */ + __IO uint32_t EVENTS_DEVMATCH; /*!< A device address match occurred on the last received packet */ + __IO uint32_t EVENTS_DEVMISS; /*!< No device address match occurred on the last received packet */ + __IO uint32_t EVENTS_RSSIEND; /*!< Sampling of receive signal strength complete. */ + __I uint32_t RESERVED1[2]; + __IO uint32_t EVENTS_BCMATCH; /*!< Bit counter reached bit count value. */ + __I uint32_t RESERVED2; + __IO uint32_t EVENTS_CRCOK; /*!< Packet received with CRC ok */ + __IO uint32_t EVENTS_CRCERROR; /*!< Packet received with CRC error */ + __I uint32_t RESERVED3[50]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED4[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED5[61]; + __I uint32_t CRCSTATUS; /*!< CRC status */ + __I uint32_t RESERVED6; + __I uint32_t RXMATCH; /*!< Received address */ + __I uint32_t RXCRC; /*!< CRC field of previously received packet */ + __I uint32_t DAI; /*!< Device address match index */ + __I uint32_t RESERVED7[60]; + __IO uint32_t PACKETPTR; /*!< Packet pointer */ + __IO uint32_t FREQUENCY; /*!< Frequency */ + __IO uint32_t TXPOWER; /*!< Output power */ + __IO uint32_t MODE; /*!< Data rate and modulation */ + __IO uint32_t PCNF0; /*!< Packet configuration register 0 */ + __IO uint32_t PCNF1; /*!< Packet configuration register 1 */ + __IO uint32_t BASE0; /*!< Base address 0 */ + __IO uint32_t BASE1; /*!< Base address 1 */ + __IO uint32_t PREFIX0; /*!< Prefixes bytes for logical addresses 0-3 */ + __IO uint32_t PREFIX1; /*!< Prefixes bytes for logical addresses 4-7 */ + __IO uint32_t TXADDRESS; /*!< Transmit address select */ + __IO uint32_t RXADDRESSES; /*!< Receive address select */ + __IO uint32_t CRCCNF; /*!< CRC configuration */ + __IO uint32_t CRCPOLY; /*!< CRC polynomial */ + __IO uint32_t CRCINIT; /*!< CRC initial value */ + __IO uint32_t UNUSED0; /*!< Unspecified */ + __IO uint32_t TIFS; /*!< Inter Frame Spacing in us */ + __I uint32_t RSSISAMPLE; /*!< RSSI sample */ + __I uint32_t RESERVED8; + __I uint32_t STATE; /*!< Current radio state */ + __IO uint32_t DATAWHITEIV; /*!< Data whitening initial value */ + __I uint32_t RESERVED9[2]; + __IO uint32_t BCC; /*!< Bit counter compare */ + __I uint32_t RESERVED10[39]; + __IO uint32_t DAB[8]; /*!< Description collection[0]: Device address base segment 0 */ + __IO uint32_t DAP[8]; /*!< Description collection[0]: Device address prefix 0 */ + __IO uint32_t DACNF; /*!< Device address match configuration */ + __I uint32_t RESERVED11[3]; + __IO uint32_t MODECNF0; /*!< Radio mode configuration register 0 */ + __I uint32_t RESERVED12[618]; + __IO uint32_t POWER; /*!< Peripheral power control */ +} NRF_RADIO_Type; + + +/* ================================================================================ */ +/* ================ UARTE ================ */ +/* ================================================================================ */ + + +/** + * @brief UART with EasyDMA (UARTE) + */ + +typedef struct { /*!< UARTE Structure */ + __O uint32_t TASKS_STARTRX; /*!< Start UART receiver */ + __O uint32_t TASKS_STOPRX; /*!< Stop UART receiver */ + __O uint32_t TASKS_STARTTX; /*!< Start UART transmitter */ + __O uint32_t TASKS_STOPTX; /*!< Stop UART transmitter */ + __I uint32_t RESERVED0[7]; + __O uint32_t TASKS_FLUSHRX; /*!< Flush RX FIFO into RX buffer */ + __I uint32_t RESERVED1[52]; + __IO uint32_t EVENTS_CTS; /*!< CTS is activated (set low). Clear To Send. */ + __IO uint32_t EVENTS_NCTS; /*!< CTS is deactivated (set high). Not Clear To Send. */ + __IO uint32_t EVENTS_RXDRDY; /*!< Data received in RXD (but potentially not yet transferred to + Data RAM) */ + __I uint32_t RESERVED2; + __IO uint32_t EVENTS_ENDRX; /*!< Receive buffer is filled up */ + __I uint32_t RESERVED3[2]; + __IO uint32_t EVENTS_TXDRDY; /*!< Data sent from TXD */ + __IO uint32_t EVENTS_ENDTX; /*!< Last TX byte transmitted */ + __IO uint32_t EVENTS_ERROR; /*!< Error detected */ + __I uint32_t RESERVED4[7]; + __IO uint32_t EVENTS_RXTO; /*!< Receiver timeout */ + __I uint32_t RESERVED5; + __IO uint32_t EVENTS_RXSTARTED; /*!< UART receiver has started */ + __IO uint32_t EVENTS_TXSTARTED; /*!< UART transmitter has started */ + __I uint32_t RESERVED6; + __IO uint32_t EVENTS_TXSTOPPED; /*!< Transmitter stopped */ + __I uint32_t RESERVED7[41]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED8[63]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED9[93]; + __IO uint32_t ERRORSRC; /*!< Error source */ + __I uint32_t RESERVED10[31]; + __IO uint32_t ENABLE; /*!< Enable UART */ + __I uint32_t RESERVED11; + UARTE_PSEL_Type PSEL; /*!< Unspecified */ + __I uint32_t RESERVED12[3]; + __IO uint32_t BAUDRATE; /*!< Baud rate. Accuracy depends on the HFCLK source selected. */ + __I uint32_t RESERVED13[3]; + UARTE_RXD_Type RXD; /*!< RXD EasyDMA channel */ + __I uint32_t RESERVED14; + UARTE_TXD_Type TXD; /*!< TXD EasyDMA channel */ + __I uint32_t RESERVED15[7]; + __IO uint32_t CONFIG; /*!< Configuration of parity and hardware flow control */ +} NRF_UARTE_Type; + + +/* ================================================================================ */ +/* ================ UART ================ */ +/* ================================================================================ */ + + +/** + * @brief Universal Asynchronous Receiver/Transmitter (UART) + */ + +typedef struct { /*!< UART Structure */ + __O uint32_t TASKS_STARTRX; /*!< Start UART receiver */ + __O uint32_t TASKS_STOPRX; /*!< Stop UART receiver */ + __O uint32_t TASKS_STARTTX; /*!< Start UART transmitter */ + __O uint32_t TASKS_STOPTX; /*!< Stop UART transmitter */ + __I uint32_t RESERVED0[3]; + __O uint32_t TASKS_SUSPEND; /*!< Suspend UART */ + __I uint32_t RESERVED1[56]; + __IO uint32_t EVENTS_CTS; /*!< CTS is activated (set low). Clear To Send. */ + __IO uint32_t EVENTS_NCTS; /*!< CTS is deactivated (set high). Not Clear To Send. */ + __IO uint32_t EVENTS_RXDRDY; /*!< Data received in RXD */ + __I uint32_t RESERVED2[4]; + __IO uint32_t EVENTS_TXDRDY; /*!< Data sent from TXD */ + __I uint32_t RESERVED3; + __IO uint32_t EVENTS_ERROR; /*!< Error detected */ + __I uint32_t RESERVED4[7]; + __IO uint32_t EVENTS_RXTO; /*!< Receiver timeout */ + __I uint32_t RESERVED5[46]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED6[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED7[93]; + __IO uint32_t ERRORSRC; /*!< Error source */ + __I uint32_t RESERVED8[31]; + __IO uint32_t ENABLE; /*!< Enable UART */ + __I uint32_t RESERVED9; + __IO uint32_t PSELRTS; /*!< Pin select for RTS */ + __IO uint32_t PSELTXD; /*!< Pin select for TXD */ + __IO uint32_t PSELCTS; /*!< Pin select for CTS */ + __IO uint32_t PSELRXD; /*!< Pin select for RXD */ + __I uint32_t RXD; /*!< RXD register */ + __O uint32_t TXD; /*!< TXD register */ + __I uint32_t RESERVED10; + __IO uint32_t BAUDRATE; /*!< Baud rate */ + __I uint32_t RESERVED11[17]; + __IO uint32_t CONFIG; /*!< Configuration of parity and hardware flow control */ +} NRF_UART_Type; + + +/* ================================================================================ */ +/* ================ SPIM ================ */ +/* ================================================================================ */ + + +/** + * @brief Serial Peripheral Interface Master with EasyDMA 0 (SPIM) + */ + +typedef struct { /*!< SPIM Structure */ + __I uint32_t RESERVED0[4]; + __O uint32_t TASKS_START; /*!< Start SPI transaction */ + __O uint32_t TASKS_STOP; /*!< Stop SPI transaction */ + __I uint32_t RESERVED1; + __O uint32_t TASKS_SUSPEND; /*!< Suspend SPI transaction */ + __O uint32_t TASKS_RESUME; /*!< Resume SPI transaction */ + __I uint32_t RESERVED2[56]; + __IO uint32_t EVENTS_STOPPED; /*!< SPI transaction has stopped */ + __I uint32_t RESERVED3[2]; + __IO uint32_t EVENTS_ENDRX; /*!< End of RXD buffer reached */ + __I uint32_t RESERVED4; + __IO uint32_t EVENTS_END; /*!< End of RXD buffer and TXD buffer reached */ + __I uint32_t RESERVED5; + __IO uint32_t EVENTS_ENDTX; /*!< End of TXD buffer reached */ + __I uint32_t RESERVED6[10]; + __IO uint32_t EVENTS_STARTED; /*!< Transaction started */ + __I uint32_t RESERVED7[44]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED8[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED9[125]; + __IO uint32_t ENABLE; /*!< Enable SPIM */ + __I uint32_t RESERVED10; + SPIM_PSEL_Type PSEL; /*!< Unspecified */ + __I uint32_t RESERVED11[4]; + __IO uint32_t FREQUENCY; /*!< SPI frequency. Accuracy depends on the HFCLK source selected. */ + __I uint32_t RESERVED12[3]; + SPIM_RXD_Type RXD; /*!< RXD EasyDMA channel */ + SPIM_TXD_Type TXD; /*!< TXD EasyDMA channel */ + __IO uint32_t CONFIG; /*!< Configuration register */ + __I uint32_t RESERVED13[26]; + __IO uint32_t ORC; /*!< Over-read character. Character clocked out in case and over-read + of the TXD buffer. */ +} NRF_SPIM_Type; + + +/* ================================================================================ */ +/* ================ SPIS ================ */ +/* ================================================================================ */ + + +/** + * @brief SPI Slave 0 (SPIS) + */ + +typedef struct { /*!< SPIS Structure */ + __I uint32_t RESERVED0[9]; + __O uint32_t TASKS_ACQUIRE; /*!< Acquire SPI semaphore */ + __O uint32_t TASKS_RELEASE; /*!< Release SPI semaphore, enabling the SPI slave to acquire it */ + __I uint32_t RESERVED1[54]; + __IO uint32_t EVENTS_END; /*!< Granted transaction completed */ + __I uint32_t RESERVED2[2]; + __IO uint32_t EVENTS_ENDRX; /*!< End of RXD buffer reached */ + __I uint32_t RESERVED3[5]; + __IO uint32_t EVENTS_ACQUIRED; /*!< Semaphore acquired */ + __I uint32_t RESERVED4[53]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED5[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED6[61]; + __I uint32_t SEMSTAT; /*!< Semaphore status register */ + __I uint32_t RESERVED7[15]; + __IO uint32_t STATUS; /*!< Status from last transaction */ + __I uint32_t RESERVED8[47]; + __IO uint32_t ENABLE; /*!< Enable SPI slave */ + __I uint32_t RESERVED9; + SPIS_PSEL_Type PSEL; /*!< Unspecified */ + __I uint32_t RESERVED10[7]; + SPIS_RXD_Type RXD; /*!< Unspecified */ + __I uint32_t RESERVED11; + SPIS_TXD_Type TXD; /*!< Unspecified */ + __I uint32_t RESERVED12; + __IO uint32_t CONFIG; /*!< Configuration register */ + __I uint32_t RESERVED13; + __IO uint32_t DEF; /*!< Default character. Character clocked out in case of an ignored + transaction. */ + __I uint32_t RESERVED14[24]; + __IO uint32_t ORC; /*!< Over-read character */ +} NRF_SPIS_Type; + + +/* ================================================================================ */ +/* ================ TWIM ================ */ +/* ================================================================================ */ + + +/** + * @brief I2C compatible Two-Wire Master Interface with EasyDMA 0 (TWIM) + */ + +typedef struct { /*!< TWIM Structure */ + __O uint32_t TASKS_STARTRX; /*!< Start TWI receive sequence */ + __I uint32_t RESERVED0; + __O uint32_t TASKS_STARTTX; /*!< Start TWI transmit sequence */ + __I uint32_t RESERVED1[2]; + __O uint32_t TASKS_STOP; /*!< Stop TWI transaction. Must be issued while the TWI master is + not suspended. */ + __I uint32_t RESERVED2; + __O uint32_t TASKS_SUSPEND; /*!< Suspend TWI transaction */ + __O uint32_t TASKS_RESUME; /*!< Resume TWI transaction */ + __I uint32_t RESERVED3[56]; + __IO uint32_t EVENTS_STOPPED; /*!< TWI stopped */ + __I uint32_t RESERVED4[7]; + __IO uint32_t EVENTS_ERROR; /*!< TWI error */ + __I uint32_t RESERVED5[8]; + __IO uint32_t EVENTS_SUSPENDED; /*!< Last byte has been sent out after the SUSPEND task has been + issued, TWI traffic is now suspended. */ + __IO uint32_t EVENTS_RXSTARTED; /*!< Receive sequence started */ + __IO uint32_t EVENTS_TXSTARTED; /*!< Transmit sequence started */ + __I uint32_t RESERVED6[2]; + __IO uint32_t EVENTS_LASTRX; /*!< Byte boundary, starting to receive the last byte */ + __IO uint32_t EVENTS_LASTTX; /*!< Byte boundary, starting to transmit the last byte */ + __I uint32_t RESERVED7[39]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED8[63]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED9[110]; + __IO uint32_t ERRORSRC; /*!< Error source */ + __I uint32_t RESERVED10[14]; + __IO uint32_t ENABLE; /*!< Enable TWIM */ + __I uint32_t RESERVED11; + TWIM_PSEL_Type PSEL; /*!< Unspecified */ + __I uint32_t RESERVED12[5]; + __IO uint32_t FREQUENCY; /*!< TWI frequency */ + __I uint32_t RESERVED13[3]; + TWIM_RXD_Type RXD; /*!< RXD EasyDMA channel */ + TWIM_TXD_Type TXD; /*!< TXD EasyDMA channel */ + __I uint32_t RESERVED14[13]; + __IO uint32_t ADDRESS; /*!< Address used in the TWI transfer */ +} NRF_TWIM_Type; + + +/* ================================================================================ */ +/* ================ TWIS ================ */ +/* ================================================================================ */ + + +/** + * @brief I2C compatible Two-Wire Slave Interface with EasyDMA 0 (TWIS) + */ + +typedef struct { /*!< TWIS Structure */ + __I uint32_t RESERVED0[5]; + __O uint32_t TASKS_STOP; /*!< Stop TWI transaction */ + __I uint32_t RESERVED1; + __O uint32_t TASKS_SUSPEND; /*!< Suspend TWI transaction */ + __O uint32_t TASKS_RESUME; /*!< Resume TWI transaction */ + __I uint32_t RESERVED2[3]; + __O uint32_t TASKS_PREPARERX; /*!< Prepare the TWI slave to respond to a write command */ + __O uint32_t TASKS_PREPARETX; /*!< Prepare the TWI slave to respond to a read command */ + __I uint32_t RESERVED3[51]; + __IO uint32_t EVENTS_STOPPED; /*!< TWI stopped */ + __I uint32_t RESERVED4[7]; + __IO uint32_t EVENTS_ERROR; /*!< TWI error */ + __I uint32_t RESERVED5[9]; + __IO uint32_t EVENTS_RXSTARTED; /*!< Receive sequence started */ + __IO uint32_t EVENTS_TXSTARTED; /*!< Transmit sequence started */ + __I uint32_t RESERVED6[4]; + __IO uint32_t EVENTS_WRITE; /*!< Write command received */ + __IO uint32_t EVENTS_READ; /*!< Read command received */ + __I uint32_t RESERVED7[37]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED8[63]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED9[113]; + __IO uint32_t ERRORSRC; /*!< Error source */ + __I uint32_t MATCH; /*!< Status register indicating which address had a match */ + __I uint32_t RESERVED10[10]; + __IO uint32_t ENABLE; /*!< Enable TWIS */ + __I uint32_t RESERVED11; + TWIS_PSEL_Type PSEL; /*!< Unspecified */ + __I uint32_t RESERVED12[9]; + TWIS_RXD_Type RXD; /*!< RXD EasyDMA channel */ + __I uint32_t RESERVED13; + TWIS_TXD_Type TXD; /*!< TXD EasyDMA channel */ + __I uint32_t RESERVED14[14]; + __IO uint32_t ADDRESS[2]; /*!< Description collection[0]: TWI slave address 0 */ + __I uint32_t RESERVED15; + __IO uint32_t CONFIG; /*!< Configuration register for the address match mechanism */ + __I uint32_t RESERVED16[10]; + __IO uint32_t ORC; /*!< Over-read character. Character sent out in case of an over-read + of the transmit buffer. */ +} NRF_TWIS_Type; + + +/* ================================================================================ */ +/* ================ SPI ================ */ +/* ================================================================================ */ + + +/** + * @brief Serial Peripheral Interface 0 (SPI) + */ + +typedef struct { /*!< SPI Structure */ + __I uint32_t RESERVED0[66]; + __IO uint32_t EVENTS_READY; /*!< TXD byte sent and RXD byte received */ + __I uint32_t RESERVED1[126]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED2[125]; + __IO uint32_t ENABLE; /*!< Enable SPI */ + __I uint32_t RESERVED3; + SPI_PSEL_Type PSEL; /*!< Unspecified */ + __I uint32_t RESERVED4; + __I uint32_t RXD; /*!< RXD register */ + __IO uint32_t TXD; /*!< TXD register */ + __I uint32_t RESERVED5; + __IO uint32_t FREQUENCY; /*!< SPI frequency */ + __I uint32_t RESERVED6[11]; + __IO uint32_t CONFIG; /*!< Configuration register */ +} NRF_SPI_Type; + + +/* ================================================================================ */ +/* ================ TWI ================ */ +/* ================================================================================ */ + + +/** + * @brief I2C compatible Two-Wire Interface 0 (TWI) + */ + +typedef struct { /*!< TWI Structure */ + __O uint32_t TASKS_STARTRX; /*!< Start TWI receive sequence */ + __I uint32_t RESERVED0; + __O uint32_t TASKS_STARTTX; /*!< Start TWI transmit sequence */ + __I uint32_t RESERVED1[2]; + __O uint32_t TASKS_STOP; /*!< Stop TWI transaction */ + __I uint32_t RESERVED2; + __O uint32_t TASKS_SUSPEND; /*!< Suspend TWI transaction */ + __O uint32_t TASKS_RESUME; /*!< Resume TWI transaction */ + __I uint32_t RESERVED3[56]; + __IO uint32_t EVENTS_STOPPED; /*!< TWI stopped */ + __IO uint32_t EVENTS_RXDREADY; /*!< TWI RXD byte received */ + __I uint32_t RESERVED4[4]; + __IO uint32_t EVENTS_TXDSENT; /*!< TWI TXD byte sent */ + __I uint32_t RESERVED5; + __IO uint32_t EVENTS_ERROR; /*!< TWI error */ + __I uint32_t RESERVED6[4]; + __IO uint32_t EVENTS_BB; /*!< TWI byte boundary, generated before each byte that is sent or + received */ + __I uint32_t RESERVED7[3]; + __IO uint32_t EVENTS_SUSPENDED; /*!< TWI entered the suspended state */ + __I uint32_t RESERVED8[45]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED9[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED10[110]; + __IO uint32_t ERRORSRC; /*!< Error source */ + __I uint32_t RESERVED11[14]; + __IO uint32_t ENABLE; /*!< Enable TWI */ + __I uint32_t RESERVED12; + __IO uint32_t PSELSCL; /*!< Pin select for SCL */ + __IO uint32_t PSELSDA; /*!< Pin select for SDA */ + __I uint32_t RESERVED13[2]; + __I uint32_t RXD; /*!< RXD register */ + __IO uint32_t TXD; /*!< TXD register */ + __I uint32_t RESERVED14; + __IO uint32_t FREQUENCY; /*!< TWI frequency */ + __I uint32_t RESERVED15[24]; + __IO uint32_t ADDRESS; /*!< Address used in the TWI transfer */ +} NRF_TWI_Type; + + +/* ================================================================================ */ +/* ================ NFCT ================ */ +/* ================================================================================ */ + + +/** + * @brief NFC-A compatible radio (NFCT) + */ + +typedef struct { /*!< NFCT Structure */ + __O uint32_t TASKS_ACTIVATE; /*!< Activate NFC peripheral for incoming and outgoing frames, change + state to activated */ + __O uint32_t TASKS_DISABLE; /*!< Disable NFC peripheral */ + __O uint32_t TASKS_SENSE; /*!< Enable NFC sense field mode, change state to sense mode */ + __O uint32_t TASKS_STARTTX; /*!< Start transmission of a outgoing frame, change state to transmit */ + __I uint32_t RESERVED0[3]; + __O uint32_t TASKS_ENABLERXDATA; /*!< Initializes the EasyDMA for receive. */ + __I uint32_t RESERVED1; + __O uint32_t TASKS_GOIDLE; /*!< Force state machine to IDLE state */ + __O uint32_t TASKS_GOSLEEP; /*!< Force state machine to SLEEP_A state */ + __I uint32_t RESERVED2[53]; + __IO uint32_t EVENTS_READY; /*!< The NFC peripheral is ready to receive and send frames */ + __IO uint32_t EVENTS_FIELDDETECTED; /*!< Remote NFC field detected */ + __IO uint32_t EVENTS_FIELDLOST; /*!< Remote NFC field lost */ + __IO uint32_t EVENTS_TXFRAMESTART; /*!< Marks the start of the first symbol of a transmitted frame */ + __IO uint32_t EVENTS_TXFRAMEEND; /*!< Marks the end of the last transmitted on-air symbol of a frame */ + __IO uint32_t EVENTS_RXFRAMESTART; /*!< Marks the end of the first symbol of a received frame */ + __IO uint32_t EVENTS_RXFRAMEEND; /*!< Received data have been checked (CRC, parity) and transferred + to RAM, and EasyDMA has ended accessing the RX buffer */ + __IO uint32_t EVENTS_ERROR; /*!< NFC error reported. The ERRORSTATUS register contains details + on the source of the error. */ + __I uint32_t RESERVED3[2]; + __IO uint32_t EVENTS_RXERROR; /*!< NFC RX frame error reported. The FRAMESTATUS.RX register contains + details on the source of the error. */ + __IO uint32_t EVENTS_ENDRX; /*!< RX buffer (as defined by PACKETPTR and MAXLEN) in Data RAM full. */ + __IO uint32_t EVENTS_ENDTX; /*!< Transmission of data in RAM has ended, and EasyDMA has ended + accessing the TX buffer */ + __I uint32_t RESERVED4; + __IO uint32_t EVENTS_AUTOCOLRESSTARTED; /*!< Auto collision resolution process has started */ + __I uint32_t RESERVED5[3]; + __IO uint32_t EVENTS_COLLISION; /*!< NFC Auto collision resolution error reported. */ + __IO uint32_t EVENTS_SELECTED; /*!< NFC Auto collision resolution successfully completed */ + __IO uint32_t EVENTS_STARTED; /*!< EasyDMA is ready to receive or send frames. */ + __I uint32_t RESERVED6[43]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED7[63]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED8[62]; + __IO uint32_t ERRORSTATUS; /*!< NFC Error Status register */ + __I uint32_t RESERVED9; + NFCT_FRAMESTATUS_Type FRAMESTATUS; /*!< Unspecified */ + __I uint32_t RESERVED10[8]; + __I uint32_t CURRENTLOADCTRL; /*!< Current value driven to the NFC Load Control */ + __I uint32_t RESERVED11[2]; + __I uint32_t FIELDPRESENT; /*!< Indicates the presence or not of a valid field */ + __I uint32_t RESERVED12[49]; + __IO uint32_t FRAMEDELAYMIN; /*!< Minimum frame delay */ + __IO uint32_t FRAMEDELAYMAX; /*!< Maximum frame delay */ + __IO uint32_t FRAMEDELAYMODE; /*!< Configuration register for the Frame Delay Timer */ + __IO uint32_t PACKETPTR; /*!< Packet pointer for TXD and RXD data storage in Data RAM */ + __IO uint32_t MAXLEN; /*!< Size of allocated for TXD and RXD data storage buffer in Data + RAM */ + NFCT_TXD_Type TXD; /*!< Unspecified */ + NFCT_RXD_Type RXD; /*!< Unspecified */ + __I uint32_t RESERVED13[26]; + __IO uint32_t NFCID1_LAST; /*!< Last NFCID1 part (4, 7 or 10 bytes ID) */ + __IO uint32_t NFCID1_2ND_LAST; /*!< Second last NFCID1 part (7 or 10 bytes ID) */ + __IO uint32_t NFCID1_3RD_LAST; /*!< Third last NFCID1 part (10 bytes ID) */ + __I uint32_t RESERVED14; + __IO uint32_t SENSRES; /*!< NFC-A SENS_RES auto-response settings */ + __IO uint32_t SELRES; /*!< NFC-A SEL_RES auto-response settings */ +} NRF_NFCT_Type; + + +/* ================================================================================ */ +/* ================ GPIOTE ================ */ +/* ================================================================================ */ + + +/** + * @brief GPIO Tasks and Events (GPIOTE) + */ + +typedef struct { /*!< GPIOTE Structure */ + __O uint32_t TASKS_OUT[8]; /*!< Description collection[0]: Task for writing to pin specified + in CONFIG[0].PSEL. Action on pin is configured in CONFIG[0].POLARITY. */ + __I uint32_t RESERVED0[4]; + __O uint32_t TASKS_SET[8]; /*!< Description collection[0]: Task for writing to pin specified + in CONFIG[0].PSEL. Action on pin is to set it high. */ + __I uint32_t RESERVED1[4]; + __O uint32_t TASKS_CLR[8]; /*!< Description collection[0]: Task for writing to pin specified + in CONFIG[0].PSEL. Action on pin is to set it low. */ + __I uint32_t RESERVED2[32]; + __IO uint32_t EVENTS_IN[8]; /*!< Description collection[0]: Event generated from pin specified + in CONFIG[0].PSEL */ + __I uint32_t RESERVED3[23]; + __IO uint32_t EVENTS_PORT; /*!< Event generated from multiple input GPIO pins with SENSE mechanism + enabled */ + __I uint32_t RESERVED4[97]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED5[129]; + __IO uint32_t CONFIG[8]; /*!< Description collection[0]: Configuration for OUT[n], SET[n] + and CLR[n] tasks and IN[n] event */ +} NRF_GPIOTE_Type; + + +/* ================================================================================ */ +/* ================ SAADC ================ */ +/* ================================================================================ */ + + +/** + * @brief Analog to Digital Converter (SAADC) + */ + +typedef struct { /*!< SAADC Structure */ + __O uint32_t TASKS_START; /*!< Start the ADC and prepare the result buffer in RAM */ + __O uint32_t TASKS_SAMPLE; /*!< Take one ADC sample, if scan is enabled all channels are sampled */ + __O uint32_t TASKS_STOP; /*!< Stop the ADC and terminate any on-going conversion */ + __O uint32_t TASKS_CALIBRATEOFFSET; /*!< Starts offset auto-calibration */ + __I uint32_t RESERVED0[60]; + __IO uint32_t EVENTS_STARTED; /*!< The ADC has started */ + __IO uint32_t EVENTS_END; /*!< The ADC has filled up the Result buffer */ + __IO uint32_t EVENTS_DONE; /*!< A conversion task has been completed. Depending on the mode, + multiple conversions might be needed for a result to be transferred + to RAM. */ + __IO uint32_t EVENTS_RESULTDONE; /*!< A result is ready to get transferred to RAM. */ + __IO uint32_t EVENTS_CALIBRATEDONE; /*!< Calibration is complete */ + __IO uint32_t EVENTS_STOPPED; /*!< The ADC has stopped */ + SAADC_EVENTS_CH_Type EVENTS_CH[8]; /*!< Unspecified */ + __I uint32_t RESERVED1[106]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED2[61]; + __I uint32_t STATUS; /*!< Status */ + __I uint32_t RESERVED3[63]; + __IO uint32_t ENABLE; /*!< Enable or disable ADC */ + __I uint32_t RESERVED4[3]; + SAADC_CH_Type CH[8]; /*!< Unspecified */ + __I uint32_t RESERVED5[24]; + __IO uint32_t RESOLUTION; /*!< Resolution configuration */ + __IO uint32_t OVERSAMPLE; /*!< Oversampling configuration. OVERSAMPLE should not be combined + with SCAN. The RESOLUTION is applied before averaging, thus + for high OVERSAMPLE a higher RESOLUTION should be used. */ + __IO uint32_t SAMPLERATE; /*!< Controls normal or continuous sample rate */ + __I uint32_t RESERVED6[12]; + SAADC_RESULT_Type RESULT; /*!< RESULT EasyDMA channel */ +} NRF_SAADC_Type; + + +/* ================================================================================ */ +/* ================ TIMER ================ */ +/* ================================================================================ */ + + +/** + * @brief Timer/Counter 0 (TIMER) + */ + +typedef struct { /*!< TIMER Structure */ + __O uint32_t TASKS_START; /*!< Start Timer */ + __O uint32_t TASKS_STOP; /*!< Stop Timer */ + __O uint32_t TASKS_COUNT; /*!< Increment Timer (Counter mode only) */ + __O uint32_t TASKS_CLEAR; /*!< Clear time */ + __O uint32_t TASKS_SHUTDOWN; /*!< Deprecated register - Shut down timer */ + __I uint32_t RESERVED0[11]; + __O uint32_t TASKS_CAPTURE[6]; /*!< Description collection[0]: Capture Timer value to CC[0] register */ + __I uint32_t RESERVED1[58]; + __IO uint32_t EVENTS_COMPARE[6]; /*!< Description collection[0]: Compare event on CC[0] match */ + __I uint32_t RESERVED2[42]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED3[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED4[126]; + __IO uint32_t MODE; /*!< Timer mode selection */ + __IO uint32_t BITMODE; /*!< Configure the number of bits used by the TIMER */ + __I uint32_t RESERVED5; + __IO uint32_t PRESCALER; /*!< Timer prescaler register */ + __I uint32_t RESERVED6[11]; + __IO uint32_t CC[6]; /*!< Description collection[0]: Capture/Compare register 0 */ +} NRF_TIMER_Type; + + +/* ================================================================================ */ +/* ================ RTC ================ */ +/* ================================================================================ */ + + +/** + * @brief Real time counter 0 (RTC) + */ + +typedef struct { /*!< RTC Structure */ + __O uint32_t TASKS_START; /*!< Start RTC COUNTER */ + __O uint32_t TASKS_STOP; /*!< Stop RTC COUNTER */ + __O uint32_t TASKS_CLEAR; /*!< Clear RTC COUNTER */ + __O uint32_t TASKS_TRIGOVRFLW; /*!< Set COUNTER to 0xFFFFF0 */ + __I uint32_t RESERVED0[60]; + __IO uint32_t EVENTS_TICK; /*!< Event on COUNTER increment */ + __IO uint32_t EVENTS_OVRFLW; /*!< Event on COUNTER overflow */ + __I uint32_t RESERVED1[14]; + __IO uint32_t EVENTS_COMPARE[4]; /*!< Description collection[0]: Compare event on CC[0] match */ + __I uint32_t RESERVED2[109]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[13]; + __IO uint32_t EVTEN; /*!< Enable or disable event routing */ + __IO uint32_t EVTENSET; /*!< Enable event routing */ + __IO uint32_t EVTENCLR; /*!< Disable event routing */ + __I uint32_t RESERVED4[110]; + __I uint32_t COUNTER; /*!< Current COUNTER value */ + __IO uint32_t PRESCALER; /*!< 12 bit prescaler for COUNTER frequency (32768/(PRESCALER+1)).Must + be written when RTC is stopped */ + __I uint32_t RESERVED5[13]; + __IO uint32_t CC[4]; /*!< Description collection[0]: Compare register 0 */ +} NRF_RTC_Type; + + +/* ================================================================================ */ +/* ================ TEMP ================ */ +/* ================================================================================ */ + + +/** + * @brief Temperature Sensor (TEMP) + */ + +typedef struct { /*!< TEMP Structure */ + __O uint32_t TASKS_START; /*!< Start temperature measurement */ + __O uint32_t TASKS_STOP; /*!< Stop temperature measurement */ + __I uint32_t RESERVED0[62]; + __IO uint32_t EVENTS_DATARDY; /*!< Temperature measurement complete, data ready */ + __I uint32_t RESERVED1[128]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED2[127]; + __I int32_t TEMP; /*!< Temperature in degC (0.25deg steps) */ + __I uint32_t RESERVED3[5]; + __IO uint32_t A0; /*!< Slope of 1st piece wise linear function */ + __IO uint32_t A1; /*!< Slope of 2nd piece wise linear function */ + __IO uint32_t A2; /*!< Slope of 3rd piece wise linear function */ + __IO uint32_t A3; /*!< Slope of 4th piece wise linear function */ + __IO uint32_t A4; /*!< Slope of 5th piece wise linear function */ + __IO uint32_t A5; /*!< Slope of 6th piece wise linear function */ + __I uint32_t RESERVED4[2]; + __IO uint32_t B0; /*!< y-intercept of 1st piece wise linear function */ + __IO uint32_t B1; /*!< y-intercept of 2nd piece wise linear function */ + __IO uint32_t B2; /*!< y-intercept of 3rd piece wise linear function */ + __IO uint32_t B3; /*!< y-intercept of 4th piece wise linear function */ + __IO uint32_t B4; /*!< y-intercept of 5th piece wise linear function */ + __IO uint32_t B5; /*!< y-intercept of 6th piece wise linear function */ + __I uint32_t RESERVED5[2]; + __IO uint32_t T0; /*!< End point of 1st piece wise linear function */ + __IO uint32_t T1; /*!< End point of 2nd piece wise linear function */ + __IO uint32_t T2; /*!< End point of 3rd piece wise linear function */ + __IO uint32_t T3; /*!< End point of 4th piece wise linear function */ + __IO uint32_t T4; /*!< End point of 5th piece wise linear function */ +} NRF_TEMP_Type; + + +/* ================================================================================ */ +/* ================ RNG ================ */ +/* ================================================================================ */ + + +/** + * @brief Random Number Generator (RNG) + */ + +typedef struct { /*!< RNG Structure */ + __O uint32_t TASKS_START; /*!< Task starting the random number generator */ + __O uint32_t TASKS_STOP; /*!< Task stopping the random number generator */ + __I uint32_t RESERVED0[62]; + __IO uint32_t EVENTS_VALRDY; /*!< Event being generated for every new random number written to + the VALUE register */ + __I uint32_t RESERVED1[63]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED2[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[126]; + __IO uint32_t CONFIG; /*!< Configuration register */ + __I uint32_t VALUE; /*!< Output random number */ +} NRF_RNG_Type; + + +/* ================================================================================ */ +/* ================ ECB ================ */ +/* ================================================================================ */ + + +/** + * @brief AES ECB Mode Encryption (ECB) + */ + +typedef struct { /*!< ECB Structure */ + __O uint32_t TASKS_STARTECB; /*!< Start ECB block encrypt */ + __O uint32_t TASKS_STOPECB; /*!< Abort a possible executing ECB operation */ + __I uint32_t RESERVED0[62]; + __IO uint32_t EVENTS_ENDECB; /*!< ECB block encrypt complete */ + __IO uint32_t EVENTS_ERRORECB; /*!< ECB block encrypt aborted because of a STOPECB task or due to + an error */ + __I uint32_t RESERVED1[127]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED2[126]; + __IO uint32_t ECBDATAPTR; /*!< ECB block encrypt memory pointers */ +} NRF_ECB_Type; + + +/* ================================================================================ */ +/* ================ CCM ================ */ +/* ================================================================================ */ + + +/** + * @brief AES CCM Mode Encryption (CCM) + */ + +typedef struct { /*!< CCM Structure */ + __O uint32_t TASKS_KSGEN; /*!< Start generation of key-stream. This operation will stop by + itself when completed. */ + __O uint32_t TASKS_CRYPT; /*!< Start encryption/decryption. This operation will stop by itself + when completed. */ + __O uint32_t TASKS_STOP; /*!< Stop encryption/decryption */ + __I uint32_t RESERVED0[61]; + __IO uint32_t EVENTS_ENDKSGEN; /*!< Key-stream generation complete */ + __IO uint32_t EVENTS_ENDCRYPT; /*!< Encrypt/decrypt complete */ + __IO uint32_t EVENTS_ERROR; /*!< CCM error event */ + __I uint32_t RESERVED1[61]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED2[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[61]; + __I uint32_t MICSTATUS; /*!< MIC check result */ + __I uint32_t RESERVED4[63]; + __IO uint32_t ENABLE; /*!< Enable */ + __IO uint32_t MODE; /*!< Operation mode */ + __IO uint32_t CNFPTR; /*!< Pointer to data structure holding AES key and NONCE vector */ + __IO uint32_t INPTR; /*!< Input pointer */ + __IO uint32_t OUTPTR; /*!< Output pointer */ + __IO uint32_t SCRATCHPTR; /*!< Pointer to data area used for temporary storage */ +} NRF_CCM_Type; + + +/* ================================================================================ */ +/* ================ AAR ================ */ +/* ================================================================================ */ + + +/** + * @brief Accelerated Address Resolver (AAR) + */ + +typedef struct { /*!< AAR Structure */ + __O uint32_t TASKS_START; /*!< Start resolving addresses based on IRKs specified in the IRK + data structure */ + __I uint32_t RESERVED0; + __O uint32_t TASKS_STOP; /*!< Stop resolving addresses */ + __I uint32_t RESERVED1[61]; + __IO uint32_t EVENTS_END; /*!< Address resolution procedure complete */ + __IO uint32_t EVENTS_RESOLVED; /*!< Address resolved */ + __IO uint32_t EVENTS_NOTRESOLVED; /*!< Address not resolved */ + __I uint32_t RESERVED2[126]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[61]; + __I uint32_t STATUS; /*!< Resolution status */ + __I uint32_t RESERVED4[63]; + __IO uint32_t ENABLE; /*!< Enable AAR */ + __IO uint32_t NIRK; /*!< Number of IRKs */ + __IO uint32_t IRKPTR; /*!< Pointer to IRK data structure */ + __I uint32_t RESERVED5; + __IO uint32_t ADDRPTR; /*!< Pointer to the resolvable address */ + __IO uint32_t SCRATCHPTR; /*!< Pointer to data area used for temporary storage */ +} NRF_AAR_Type; + + +/* ================================================================================ */ +/* ================ WDT ================ */ +/* ================================================================================ */ + + +/** + * @brief Watchdog Timer (WDT) + */ + +typedef struct { /*!< WDT Structure */ + __O uint32_t TASKS_START; /*!< Start the watchdog */ + __I uint32_t RESERVED0[63]; + __IO uint32_t EVENTS_TIMEOUT; /*!< Watchdog timeout */ + __I uint32_t RESERVED1[128]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED2[61]; + __I uint32_t RUNSTATUS; /*!< Run status */ + __I uint32_t REQSTATUS; /*!< Request status */ + __I uint32_t RESERVED3[63]; + __IO uint32_t CRV; /*!< Counter reload value */ + __IO uint32_t RREN; /*!< Enable register for reload request registers */ + __IO uint32_t CONFIG; /*!< Configuration register */ + __I uint32_t RESERVED4[60]; + __O uint32_t RR[8]; /*!< Description collection[0]: Reload request 0 */ +} NRF_WDT_Type; + + +/* ================================================================================ */ +/* ================ QDEC ================ */ +/* ================================================================================ */ + + +/** + * @brief Quadrature Decoder (QDEC) + */ + +typedef struct { /*!< QDEC Structure */ + __O uint32_t TASKS_START; /*!< Task starting the quadrature decoder */ + __O uint32_t TASKS_STOP; /*!< Task stopping the quadrature decoder */ + __O uint32_t TASKS_READCLRACC; /*!< Read and clear ACC and ACCDBL */ + __O uint32_t TASKS_RDCLRACC; /*!< Read and clear ACC */ + __O uint32_t TASKS_RDCLRDBL; /*!< Read and clear ACCDBL */ + __I uint32_t RESERVED0[59]; + __IO uint32_t EVENTS_SAMPLERDY; /*!< Event being generated for every new sample value written to + the SAMPLE register */ + __IO uint32_t EVENTS_REPORTRDY; /*!< Non-null report ready */ + __IO uint32_t EVENTS_ACCOF; /*!< ACC or ACCDBL register overflow */ + __IO uint32_t EVENTS_DBLRDY; /*!< Double displacement(s) detected */ + __IO uint32_t EVENTS_STOPPED; /*!< QDEC has been stopped */ + __I uint32_t RESERVED1[59]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED2[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[125]; + __IO uint32_t ENABLE; /*!< Enable the quadrature decoder */ + __IO uint32_t LEDPOL; /*!< LED output pin polarity */ + __IO uint32_t SAMPLEPER; /*!< Sample period */ + __I int32_t SAMPLE; /*!< Motion sample value */ + __IO uint32_t REPORTPER; /*!< Number of samples to be taken before REPORTRDY and DBLRDY events + can be generated */ + __I int32_t ACC; /*!< Register accumulating the valid transitions */ + __I int32_t ACCREAD; /*!< Snapshot of the ACC register, updated by the READCLRACC or RDCLRACC + task */ + QDEC_PSEL_Type PSEL; /*!< Unspecified */ + __IO uint32_t DBFEN; /*!< Enable input debounce filters */ + __I uint32_t RESERVED4[5]; + __IO uint32_t LEDPRE; /*!< Time period the LED is switched ON prior to sampling */ + __I uint32_t ACCDBL; /*!< Register accumulating the number of detected double transitions */ + __I uint32_t ACCDBLREAD; /*!< Snapshot of the ACCDBL, updated by the READCLRACC or RDCLRDBL + task */ +} NRF_QDEC_Type; + + +/* ================================================================================ */ +/* ================ COMP ================ */ +/* ================================================================================ */ + + +/** + * @brief Comparator (COMP) + */ + +typedef struct { /*!< COMP Structure */ + __O uint32_t TASKS_START; /*!< Start comparator */ + __O uint32_t TASKS_STOP; /*!< Stop comparator */ + __O uint32_t TASKS_SAMPLE; /*!< Sample comparator value */ + __I uint32_t RESERVED0[61]; + __IO uint32_t EVENTS_READY; /*!< COMP is ready and output is valid */ + __IO uint32_t EVENTS_DOWN; /*!< Downward crossing */ + __IO uint32_t EVENTS_UP; /*!< Upward crossing */ + __IO uint32_t EVENTS_CROSS; /*!< Downward or upward crossing */ + __I uint32_t RESERVED1[60]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED2[63]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[61]; + __I uint32_t RESULT; /*!< Compare result */ + __I uint32_t RESERVED4[63]; + __IO uint32_t ENABLE; /*!< COMP enable */ + __IO uint32_t PSEL; /*!< Pin select */ + __IO uint32_t REFSEL; /*!< Reference source select for single-ended mode */ + __IO uint32_t EXTREFSEL; /*!< External reference select */ + __I uint32_t RESERVED5[8]; + __IO uint32_t TH; /*!< Threshold configuration for hysteresis unit */ + __IO uint32_t MODE; /*!< Mode configuration */ + __IO uint32_t HYST; /*!< Comparator hysteresis enable */ + __IO uint32_t ISOURCE; /*!< Current source select on analog input */ +} NRF_COMP_Type; + + +/* ================================================================================ */ +/* ================ LPCOMP ================ */ +/* ================================================================================ */ + + +/** + * @brief Low Power Comparator (LPCOMP) + */ + +typedef struct { /*!< LPCOMP Structure */ + __O uint32_t TASKS_START; /*!< Start comparator */ + __O uint32_t TASKS_STOP; /*!< Stop comparator */ + __O uint32_t TASKS_SAMPLE; /*!< Sample comparator value */ + __I uint32_t RESERVED0[61]; + __IO uint32_t EVENTS_READY; /*!< LPCOMP is ready and output is valid */ + __IO uint32_t EVENTS_DOWN; /*!< Downward crossing */ + __IO uint32_t EVENTS_UP; /*!< Upward crossing */ + __IO uint32_t EVENTS_CROSS; /*!< Downward or upward crossing */ + __I uint32_t RESERVED1[60]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED2[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[61]; + __I uint32_t RESULT; /*!< Compare result */ + __I uint32_t RESERVED4[63]; + __IO uint32_t ENABLE; /*!< Enable LPCOMP */ + __IO uint32_t PSEL; /*!< Input pin select */ + __IO uint32_t REFSEL; /*!< Reference select */ + __IO uint32_t EXTREFSEL; /*!< External reference select */ + __I uint32_t RESERVED5[4]; + __IO uint32_t ANADETECT; /*!< Analog detect configuration */ + __I uint32_t RESERVED6[5]; + __IO uint32_t HYST; /*!< Comparator hysteresis enable */ +} NRF_LPCOMP_Type; + + +/* ================================================================================ */ +/* ================ SWI ================ */ +/* ================================================================================ */ + + +/** + * @brief Software interrupt 0 (SWI) + */ + +typedef struct { /*!< SWI Structure */ + __I uint32_t UNUSED; /*!< Unused. */ +} NRF_SWI_Type; + + +/* ================================================================================ */ +/* ================ EGU ================ */ +/* ================================================================================ */ + + +/** + * @brief Event Generator Unit 0 (EGU) + */ + +typedef struct { /*!< EGU Structure */ + __O uint32_t TASKS_TRIGGER[16]; /*!< Description collection[0]: Trigger 0 for triggering the corresponding + TRIGGERED[0] event */ + __I uint32_t RESERVED0[48]; + __IO uint32_t EVENTS_TRIGGERED[16]; /*!< Description collection[0]: Event number 0 generated by triggering + the corresponding TRIGGER[0] task */ + __I uint32_t RESERVED1[112]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ +} NRF_EGU_Type; + + +/* ================================================================================ */ +/* ================ PWM ================ */ +/* ================================================================================ */ + + +/** + * @brief Pulse Width Modulation Unit 0 (PWM) + */ + +typedef struct { /*!< PWM Structure */ + __I uint32_t RESERVED0; + __O uint32_t TASKS_STOP; /*!< Stops PWM pulse generation on all channels at the end of current + PWM period, and stops sequence playback */ + __O uint32_t TASKS_SEQSTART[2]; /*!< Description collection[0]: Loads the first PWM value on all + enabled channels from sequence 0, and starts playing that sequence + at the rate defined in SEQ[0]REFRESH and/or DECODER.MODE. Causes + PWM generation to start it was not running. */ + __O uint32_t TASKS_NEXTSTEP; /*!< Steps by one value in the current sequence on all enabled channels + if DECODER.MODE=NextStep. Does not cause PWM generation to start + it was not running. */ + __I uint32_t RESERVED1[60]; + __IO uint32_t EVENTS_STOPPED; /*!< Response to STOP task, emitted when PWM pulses are no longer + generated */ + __IO uint32_t EVENTS_SEQSTARTED[2]; /*!< Description collection[0]: First PWM period started on sequence + 0 */ + __IO uint32_t EVENTS_SEQEND[2]; /*!< Description collection[0]: Emitted at end of every sequence + 0, when last value from RAM has been applied to wave counter */ + __IO uint32_t EVENTS_PWMPERIODEND; /*!< Emitted at the end of each PWM period */ + __IO uint32_t EVENTS_LOOPSDONE; /*!< Concatenated sequences have been played the amount of times + defined in LOOP.CNT */ + __I uint32_t RESERVED2[56]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED3[63]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED4[125]; + __IO uint32_t ENABLE; /*!< PWM module enable register */ + __IO uint32_t MODE; /*!< Selects operating mode of the wave counter */ + __IO uint32_t COUNTERTOP; /*!< Value up to which the pulse generator counter counts */ + __IO uint32_t PRESCALER; /*!< Configuration for PWM_CLK */ + __IO uint32_t DECODER; /*!< Configuration of the decoder */ + __IO uint32_t LOOP; /*!< Amount of playback of a loop */ + __I uint32_t RESERVED5[2]; + PWM_SEQ_Type SEQ[2]; /*!< Unspecified */ + PWM_PSEL_Type PSEL; /*!< Unspecified */ +} NRF_PWM_Type; + + +/* ================================================================================ */ +/* ================ PDM ================ */ +/* ================================================================================ */ + + +/** + * @brief Pulse Density Modulation (Digital Microphone) Interface (PDM) + */ + +typedef struct { /*!< PDM Structure */ + __O uint32_t TASKS_START; /*!< Starts continuous PDM transfer */ + __O uint32_t TASKS_STOP; /*!< Stops PDM transfer */ + __I uint32_t RESERVED0[62]; + __IO uint32_t EVENTS_STARTED; /*!< PDM transfer has started */ + __IO uint32_t EVENTS_STOPPED; /*!< PDM transfer has finished */ + __IO uint32_t EVENTS_END; /*!< The PDM has written the last sample specified by SAMPLE.MAXCNT + (or the last sample after a STOP task has been received) to + Data RAM */ + __I uint32_t RESERVED1[125]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED2[125]; + __IO uint32_t ENABLE; /*!< PDM module enable register */ + __IO uint32_t PDMCLKCTRL; /*!< PDM clock generator control */ + __IO uint32_t MODE; /*!< Defines the routing of the connected PDM microphones' signals */ + __I uint32_t RESERVED3[3]; + __IO uint32_t GAINL; /*!< Left output gain adjustment */ + __IO uint32_t GAINR; /*!< Right output gain adjustment */ + __I uint32_t RESERVED4[8]; + PDM_PSEL_Type PSEL; /*!< Unspecified */ + __I uint32_t RESERVED5[6]; + PDM_SAMPLE_Type SAMPLE; /*!< Unspecified */ +} NRF_PDM_Type; + + +/* ================================================================================ */ +/* ================ NVMC ================ */ +/* ================================================================================ */ + + +/** + * @brief Non Volatile Memory Controller (NVMC) + */ + +typedef struct { /*!< NVMC Structure */ + __I uint32_t RESERVED0[256]; + __I uint32_t READY; /*!< Ready flag */ + __I uint32_t RESERVED1[64]; + __IO uint32_t CONFIG; /*!< Configuration register */ + + union { + __IO uint32_t ERASEPCR1; /*!< Deprecated register - Register for erasing a page in Code area. + Equivalent to ERASEPAGE. */ + __IO uint32_t ERASEPAGE; /*!< Register for erasing a page in Code area */ + }; + __IO uint32_t ERASEALL; /*!< Register for erasing all non-volatile user memory */ + __IO uint32_t ERASEPCR0; /*!< Deprecated register - Register for erasing a page in Code area. + Equivalent to ERASEPAGE. */ + __IO uint32_t ERASEUICR; /*!< Register for erasing User Information Configuration Registers */ + __I uint32_t RESERVED2[10]; + __IO uint32_t ICACHECNF; /*!< I-Code cache configuration register. */ + __I uint32_t RESERVED3; + __IO uint32_t IHIT; /*!< I-Code cache hit counter. */ + __IO uint32_t IMISS; /*!< I-Code cache miss counter. */ +} NRF_NVMC_Type; + + +/* ================================================================================ */ +/* ================ PPI ================ */ +/* ================================================================================ */ + + +/** + * @brief Programmable Peripheral Interconnect (PPI) + */ + +typedef struct { /*!< PPI Structure */ + PPI_TASKS_CHG_Type TASKS_CHG[6]; /*!< Channel group tasks */ + __I uint32_t RESERVED0[308]; + __IO uint32_t CHEN; /*!< Channel enable register */ + __IO uint32_t CHENSET; /*!< Channel enable set register */ + __IO uint32_t CHENCLR; /*!< Channel enable clear register */ + __I uint32_t RESERVED1; + PPI_CH_Type CH[20]; /*!< PPI Channel */ + __I uint32_t RESERVED2[148]; + __IO uint32_t CHG[6]; /*!< Description collection[0]: Channel group 0 */ + __I uint32_t RESERVED3[62]; + PPI_FORK_Type FORK[32]; /*!< Fork */ +} NRF_PPI_Type; + + +/* ================================================================================ */ +/* ================ MWU ================ */ +/* ================================================================================ */ + + +/** + * @brief Memory Watch Unit (MWU) + */ + +typedef struct { /*!< MWU Structure */ + __I uint32_t RESERVED0[64]; + MWU_EVENTS_REGION_Type EVENTS_REGION[4]; /*!< Unspecified */ + __I uint32_t RESERVED1[16]; + MWU_EVENTS_PREGION_Type EVENTS_PREGION[2]; /*!< Unspecified */ + __I uint32_t RESERVED2[100]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[5]; + __IO uint32_t NMIEN; /*!< Enable or disable non-maskable interrupt */ + __IO uint32_t NMIENSET; /*!< Enable non-maskable interrupt */ + __IO uint32_t NMIENCLR; /*!< Disable non-maskable interrupt */ + __I uint32_t RESERVED4[53]; + MWU_PERREGION_Type PERREGION[2]; /*!< Unspecified */ + __I uint32_t RESERVED5[64]; + __IO uint32_t REGIONEN; /*!< Enable/disable regions watch */ + __IO uint32_t REGIONENSET; /*!< Enable regions watch */ + __IO uint32_t REGIONENCLR; /*!< Disable regions watch */ + __I uint32_t RESERVED6[57]; + MWU_REGION_Type REGION[4]; /*!< Unspecified */ + __I uint32_t RESERVED7[32]; + MWU_PREGION_Type PREGION[2]; /*!< Unspecified */ +} NRF_MWU_Type; + + +/* ================================================================================ */ +/* ================ I2S ================ */ +/* ================================================================================ */ + + +/** + * @brief Inter-IC Sound (I2S) + */ + +typedef struct { /*!< I2S Structure */ + __O uint32_t TASKS_START; /*!< Starts continuous I2S transfer. Also starts MCK generator when + this is enabled. */ + __O uint32_t TASKS_STOP; /*!< Stops I2S transfer. Also stops MCK generator. Triggering this + task will cause the {event:STOPPED} event to be generated. */ + __I uint32_t RESERVED0[63]; + __IO uint32_t EVENTS_RXPTRUPD; /*!< The RXD.PTR register has been copied to internal double-buffers. + When the I2S module is started and RX is enabled, this event + will be generated for every RXTXD.MAXCNT words that are received + on the SDIN pin. */ + __IO uint32_t EVENTS_STOPPED; /*!< I2S transfer stopped. */ + __I uint32_t RESERVED1[2]; + __IO uint32_t EVENTS_TXPTRUPD; /*!< The TDX.PTR register has been copied to internal double-buffers. + When the I2S module is started and TX is enabled, this event + will be generated for every RXTXD.MAXCNT words that are sent + on the SDOUT pin. */ + __I uint32_t RESERVED2[122]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[125]; + __IO uint32_t ENABLE; /*!< Enable I2S module. */ + I2S_CONFIG_Type CONFIG; /*!< Unspecified */ + __I uint32_t RESERVED4[3]; + I2S_RXD_Type RXD; /*!< Unspecified */ + __I uint32_t RESERVED5; + I2S_TXD_Type TXD; /*!< Unspecified */ + __I uint32_t RESERVED6[3]; + I2S_RXTXD_Type RXTXD; /*!< Unspecified */ + __I uint32_t RESERVED7[3]; + I2S_PSEL_Type PSEL; /*!< Unspecified */ +} NRF_I2S_Type; + + +/* ================================================================================ */ +/* ================ FPU ================ */ +/* ================================================================================ */ + + +/** + * @brief FPU (FPU) + */ + +typedef struct { /*!< FPU Structure */ + __I uint32_t UNUSED; /*!< Unused. */ +} NRF_FPU_Type; + + +/* ================================================================================ */ +/* ================ GPIO ================ */ +/* ================================================================================ */ + + +/** + * @brief GPIO Port 1 (GPIO) + */ + +typedef struct { /*!< GPIO Structure */ + __I uint32_t RESERVED0[321]; + __IO uint32_t OUT; /*!< Write GPIO port */ + __IO uint32_t OUTSET; /*!< Set individual bits in GPIO port */ + __IO uint32_t OUTCLR; /*!< Clear individual bits in GPIO port */ + __I uint32_t IN; /*!< Read GPIO port */ + __IO uint32_t DIR; /*!< Direction of GPIO pins */ + __IO uint32_t DIRSET; /*!< DIR set register */ + __IO uint32_t DIRCLR; /*!< DIR clear register */ + __IO uint32_t LATCH; /*!< Latch register indicating what GPIO pins that have met the criteria + set in the PIN_CNF[n].SENSE registers */ + __IO uint32_t DETECTMODE; /*!< Select between default DETECT signal behaviour and LDETECT mode */ + __I uint32_t RESERVED1[118]; + __IO uint32_t PIN_CNF[32]; /*!< Description collection[0]: Configuration of GPIO pins */ +} NRF_GPIO_Type; + + +/* -------------------- End of section using anonymous unions ------------------- */ +#if defined(__CC_ARM) + #pragma pop +#elif defined(__ICCARM__) + /* leave anonymous unions enabled */ +#elif defined(__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined(__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined(__TASKING__) + #pragma warning restore +#else + #warning Not supported compiler type +#endif + + + + +/* ================================================================================ */ +/* ================ Peripheral memory map ================ */ +/* ================================================================================ */ + +#define NRF_FICR_BASE 0x10000000UL +#define NRF_UICR_BASE 0x10001000UL +#define NRF_BPROT_BASE 0x40000000UL +#define NRF_POWER_BASE 0x40000000UL +#define NRF_CLOCK_BASE 0x40000000UL +#define NRF_RADIO_BASE 0x40001000UL +#define NRF_UARTE0_BASE 0x40002000UL +#define NRF_UART0_BASE 0x40002000UL +#define NRF_SPIM0_BASE 0x40003000UL +#define NRF_SPIS0_BASE 0x40003000UL +#define NRF_TWIM0_BASE 0x40003000UL +#define NRF_TWIS0_BASE 0x40003000UL +#define NRF_SPI0_BASE 0x40003000UL +#define NRF_TWI0_BASE 0x40003000UL +#define NRF_SPIM1_BASE 0x40004000UL +#define NRF_SPIS1_BASE 0x40004000UL +#define NRF_TWIM1_BASE 0x40004000UL +#define NRF_TWIS1_BASE 0x40004000UL +#define NRF_SPI1_BASE 0x40004000UL +#define NRF_TWI1_BASE 0x40004000UL +#define NRF_NFCT_BASE 0x40005000UL +#define NRF_GPIOTE_BASE 0x40006000UL +#define NRF_SAADC_BASE 0x40007000UL +#define NRF_TIMER0_BASE 0x40008000UL +#define NRF_TIMER1_BASE 0x40009000UL +#define NRF_TIMER2_BASE 0x4000A000UL +#define NRF_RTC0_BASE 0x4000B000UL +#define NRF_TEMP_BASE 0x4000C000UL +#define NRF_RNG_BASE 0x4000D000UL +#define NRF_ECB_BASE 0x4000E000UL +#define NRF_CCM_BASE 0x4000F000UL +#define NRF_AAR_BASE 0x4000F000UL +#define NRF_WDT_BASE 0x40010000UL +#define NRF_RTC1_BASE 0x40011000UL +#define NRF_QDEC_BASE 0x40012000UL +#define NRF_COMP_BASE 0x40013000UL +#define NRF_LPCOMP_BASE 0x40013000UL +#define NRF_SWI0_BASE 0x40014000UL +#define NRF_EGU0_BASE 0x40014000UL +#define NRF_SWI1_BASE 0x40015000UL +#define NRF_EGU1_BASE 0x40015000UL +#define NRF_SWI2_BASE 0x40016000UL +#define NRF_EGU2_BASE 0x40016000UL +#define NRF_SWI3_BASE 0x40017000UL +#define NRF_EGU3_BASE 0x40017000UL +#define NRF_SWI4_BASE 0x40018000UL +#define NRF_EGU4_BASE 0x40018000UL +#define NRF_SWI5_BASE 0x40019000UL +#define NRF_EGU5_BASE 0x40019000UL +#define NRF_TIMER3_BASE 0x4001A000UL +#define NRF_TIMER4_BASE 0x4001B000UL +#define NRF_PWM0_BASE 0x4001C000UL +#define NRF_PDM_BASE 0x4001D000UL +#define NRF_NVMC_BASE 0x4001E000UL +#define NRF_PPI_BASE 0x4001F000UL +#define NRF_MWU_BASE 0x40020000UL +#define NRF_PWM1_BASE 0x40021000UL +#define NRF_PWM2_BASE 0x40022000UL +#define NRF_SPIM2_BASE 0x40023000UL +#define NRF_SPIS2_BASE 0x40023000UL +#define NRF_SPI2_BASE 0x40023000UL +#define NRF_RTC2_BASE 0x40024000UL +#define NRF_I2S_BASE 0x40025000UL +#define NRF_FPU_BASE 0x40026000UL +#define NRF_P0_BASE 0x50000000UL + + +/* ================================================================================ */ +/* ================ Peripheral declaration ================ */ +/* ================================================================================ */ + +#define NRF_FICR ((NRF_FICR_Type *) NRF_FICR_BASE) +#define NRF_UICR ((NRF_UICR_Type *) NRF_UICR_BASE) +#define NRF_BPROT ((NRF_BPROT_Type *) NRF_BPROT_BASE) +#define NRF_POWER ((NRF_POWER_Type *) NRF_POWER_BASE) +#define NRF_CLOCK ((NRF_CLOCK_Type *) NRF_CLOCK_BASE) +#define NRF_RADIO ((NRF_RADIO_Type *) NRF_RADIO_BASE) +#define NRF_UARTE0 ((NRF_UARTE_Type *) NRF_UARTE0_BASE) +#define NRF_UART0 ((NRF_UART_Type *) NRF_UART0_BASE) +#define NRF_SPIM0 ((NRF_SPIM_Type *) NRF_SPIM0_BASE) +#define NRF_SPIS0 ((NRF_SPIS_Type *) NRF_SPIS0_BASE) +#define NRF_TWIM0 ((NRF_TWIM_Type *) NRF_TWIM0_BASE) +#define NRF_TWIS0 ((NRF_TWIS_Type *) NRF_TWIS0_BASE) +#define NRF_SPI0 ((NRF_SPI_Type *) NRF_SPI0_BASE) +#define NRF_TWI0 ((NRF_TWI_Type *) NRF_TWI0_BASE) +#define NRF_SPIM1 ((NRF_SPIM_Type *) NRF_SPIM1_BASE) +#define NRF_SPIS1 ((NRF_SPIS_Type *) NRF_SPIS1_BASE) +#define NRF_TWIM1 ((NRF_TWIM_Type *) NRF_TWIM1_BASE) +#define NRF_TWIS1 ((NRF_TWIS_Type *) NRF_TWIS1_BASE) +#define NRF_SPI1 ((NRF_SPI_Type *) NRF_SPI1_BASE) +#define NRF_TWI1 ((NRF_TWI_Type *) NRF_TWI1_BASE) +#define NRF_NFCT ((NRF_NFCT_Type *) NRF_NFCT_BASE) +#define NRF_GPIOTE ((NRF_GPIOTE_Type *) NRF_GPIOTE_BASE) +#define NRF_SAADC ((NRF_SAADC_Type *) NRF_SAADC_BASE) +#define NRF_TIMER0 ((NRF_TIMER_Type *) NRF_TIMER0_BASE) +#define NRF_TIMER1 ((NRF_TIMER_Type *) NRF_TIMER1_BASE) +#define NRF_TIMER2 ((NRF_TIMER_Type *) NRF_TIMER2_BASE) +#define NRF_RTC0 ((NRF_RTC_Type *) NRF_RTC0_BASE) +#define NRF_TEMP ((NRF_TEMP_Type *) NRF_TEMP_BASE) +#define NRF_RNG ((NRF_RNG_Type *) NRF_RNG_BASE) +#define NRF_ECB ((NRF_ECB_Type *) NRF_ECB_BASE) +#define NRF_CCM ((NRF_CCM_Type *) NRF_CCM_BASE) +#define NRF_AAR ((NRF_AAR_Type *) NRF_AAR_BASE) +#define NRF_WDT ((NRF_WDT_Type *) NRF_WDT_BASE) +#define NRF_RTC1 ((NRF_RTC_Type *) NRF_RTC1_BASE) +#define NRF_QDEC ((NRF_QDEC_Type *) NRF_QDEC_BASE) +#define NRF_COMP ((NRF_COMP_Type *) NRF_COMP_BASE) +#define NRF_LPCOMP ((NRF_LPCOMP_Type *) NRF_LPCOMP_BASE) +#define NRF_SWI0 ((NRF_SWI_Type *) NRF_SWI0_BASE) +#define NRF_EGU0 ((NRF_EGU_Type *) NRF_EGU0_BASE) +#define NRF_SWI1 ((NRF_SWI_Type *) NRF_SWI1_BASE) +#define NRF_EGU1 ((NRF_EGU_Type *) NRF_EGU1_BASE) +#define NRF_SWI2 ((NRF_SWI_Type *) NRF_SWI2_BASE) +#define NRF_EGU2 ((NRF_EGU_Type *) NRF_EGU2_BASE) +#define NRF_SWI3 ((NRF_SWI_Type *) NRF_SWI3_BASE) +#define NRF_EGU3 ((NRF_EGU_Type *) NRF_EGU3_BASE) +#define NRF_SWI4 ((NRF_SWI_Type *) NRF_SWI4_BASE) +#define NRF_EGU4 ((NRF_EGU_Type *) NRF_EGU4_BASE) +#define NRF_SWI5 ((NRF_SWI_Type *) NRF_SWI5_BASE) +#define NRF_EGU5 ((NRF_EGU_Type *) NRF_EGU5_BASE) +#define NRF_TIMER3 ((NRF_TIMER_Type *) NRF_TIMER3_BASE) +#define NRF_TIMER4 ((NRF_TIMER_Type *) NRF_TIMER4_BASE) +#define NRF_PWM0 ((NRF_PWM_Type *) NRF_PWM0_BASE) +#define NRF_PDM ((NRF_PDM_Type *) NRF_PDM_BASE) +#define NRF_NVMC ((NRF_NVMC_Type *) NRF_NVMC_BASE) +#define NRF_PPI ((NRF_PPI_Type *) NRF_PPI_BASE) +#define NRF_MWU ((NRF_MWU_Type *) NRF_MWU_BASE) +#define NRF_PWM1 ((NRF_PWM_Type *) NRF_PWM1_BASE) +#define NRF_PWM2 ((NRF_PWM_Type *) NRF_PWM2_BASE) +#define NRF_SPIM2 ((NRF_SPIM_Type *) NRF_SPIM2_BASE) +#define NRF_SPIS2 ((NRF_SPIS_Type *) NRF_SPIS2_BASE) +#define NRF_SPI2 ((NRF_SPI_Type *) NRF_SPI2_BASE) +#define NRF_RTC2 ((NRF_RTC_Type *) NRF_RTC2_BASE) +#define NRF_I2S ((NRF_I2S_Type *) NRF_I2S_BASE) +#define NRF_FPU ((NRF_FPU_Type *) NRF_FPU_BASE) +#define NRF_P0 ((NRF_GPIO_Type *) NRF_P0_BASE) + + +/** @} */ /* End of group Device_Peripheral_Registers */ +/** @} */ /* End of group nrf52 */ +/** @} */ /* End of group Nordic Semiconductor */ + +#ifdef __cplusplus +} +#endif + + +#endif /* nrf52_H */ + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52810.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52810.h new file mode 100644 index 00000000000..c206f6a0450 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52810.h @@ -0,0 +1,1588 @@ + +/****************************************************************************************************//** + * @file nrf52810.h + * + * @brief CMSIS Cortex-M4 Peripheral Access Layer Header File for + * nrf52810 from Nordic Semiconductor. + * + * @version V1 + * @date 8. March 2018 + * + * @note Generated with SVDConv V2.81d + * from CMSIS SVD File 'nrf52810.svd' Version 1, + * + * @par Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + *******************************************************************************************************/ + + + +/** @addtogroup Nordic Semiconductor + * @{ + */ + +/** @addtogroup nrf52810 + * @{ + */ + +#ifndef NRF52810_H +#define NRF52810_H + +#ifdef __cplusplus +extern "C" { +#endif + + +/* ------------------------- Interrupt Number Definition ------------------------ */ + +typedef enum { +/* ------------------- Cortex-M4 Processor Exceptions Numbers ------------------- */ + Reset_IRQn = -15, /*!< 1 Reset Vector, invoked on Power up and warm reset */ + NonMaskableInt_IRQn = -14, /*!< 2 Non maskable Interrupt, cannot be stopped or preempted */ + HardFault_IRQn = -13, /*!< 3 Hard Fault, all classes of Fault */ + MemoryManagement_IRQn = -12, /*!< 4 Memory Management, MPU mismatch, including Access Violation + and No Match */ + BusFault_IRQn = -11, /*!< 5 Bus Fault, Pre-Fetch-, Memory Access Fault, other address/memory + related Fault */ + UsageFault_IRQn = -10, /*!< 6 Usage Fault, i.e. Undef Instruction, Illegal State Transition */ + SVCall_IRQn = -5, /*!< 11 System Service Call via SVC instruction */ + DebugMonitor_IRQn = -4, /*!< 12 Debug Monitor */ + PendSV_IRQn = -2, /*!< 14 Pendable request for system service */ + SysTick_IRQn = -1, /*!< 15 System Tick Timer */ +/* --------------------- nrf52810 Specific Interrupt Numbers -------------------- */ + POWER_CLOCK_IRQn = 0, /*!< 0 POWER_CLOCK */ + RADIO_IRQn = 1, /*!< 1 RADIO */ + UARTE0_IRQn = 2, /*!< 2 UARTE0 */ + TWIM0_TWIS0_IRQn = 3, /*!< 3 TWIM0_TWIS0 */ + SPIM0_SPIS0_IRQn = 4, /*!< 4 SPIM0_SPIS0 */ + GPIOTE_IRQn = 6, /*!< 6 GPIOTE */ + SAADC_IRQn = 7, /*!< 7 SAADC */ + TIMER0_IRQn = 8, /*!< 8 TIMER0 */ + TIMER1_IRQn = 9, /*!< 9 TIMER1 */ + TIMER2_IRQn = 10, /*!< 10 TIMER2 */ + RTC0_IRQn = 11, /*!< 11 RTC0 */ + TEMP_IRQn = 12, /*!< 12 TEMP */ + RNG_IRQn = 13, /*!< 13 RNG */ + ECB_IRQn = 14, /*!< 14 ECB */ + CCM_AAR_IRQn = 15, /*!< 15 CCM_AAR */ + WDT_IRQn = 16, /*!< 16 WDT */ + RTC1_IRQn = 17, /*!< 17 RTC1 */ + QDEC_IRQn = 18, /*!< 18 QDEC */ + COMP_IRQn = 19, /*!< 19 COMP */ + SWI0_EGU0_IRQn = 20, /*!< 20 SWI0_EGU0 */ + SWI1_EGU1_IRQn = 21, /*!< 21 SWI1_EGU1 */ + SWI2_IRQn = 22, /*!< 22 SWI2 */ + SWI3_IRQn = 23, /*!< 23 SWI3 */ + SWI4_IRQn = 24, /*!< 24 SWI4 */ + SWI5_IRQn = 25, /*!< 25 SWI5 */ + PWM0_IRQn = 28, /*!< 28 PWM0 */ + PDM_IRQn = 29 /*!< 29 PDM */ +} IRQn_Type; + + +/** @addtogroup Configuration_of_CMSIS + * @{ + */ + + +/* ================================================================================ */ +/* ================ Processor and Core Peripheral Section ================ */ +/* ================================================================================ */ + +/* ----------------Configuration of the Cortex-M4 Processor and Core Peripherals---------------- */ +#define __CM4_REV 0x0001 /*!< Cortex-M4 Core Revision */ +#define __MPU_PRESENT 1 /*!< MPU present or not */ +#define __NVIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 0 /*!< FPU present or not */ +/** @} */ /* End of group Configuration_of_CMSIS */ + +#include "core_cm4.h" /*!< Cortex-M4 processor and core peripherals */ +#include "system_nrf52810.h" /*!< nrf52810 System */ + + +/* ================================================================================ */ +/* ================ Device Specific Peripheral Section ================ */ +/* ================================================================================ */ + + +/** @addtogroup Device_Peripheral_Registers + * @{ + */ + + +/* ------------------- Start of section using anonymous unions ------------------ */ +#if defined(__CC_ARM) + #pragma push + #pragma anon_unions +#elif defined(__ICCARM__) + #pragma language=extended +#elif defined(__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined(__TMS470__) +/* anonymous unions are enabled by default */ +#elif defined(__TASKING__) + #pragma warning 586 +#else + #warning Not supported compiler type +#endif + + +typedef struct { + __I uint32_t PART; /*!< Part code */ + __I uint32_t VARIANT; /*!< Part variant, hardware version and production configuration */ + __I uint32_t PACKAGE; /*!< Package option */ + __I uint32_t RAM; /*!< RAM variant */ + __I uint32_t FLASH; /*!< Flash variant */ + __IO uint32_t UNUSED0[3]; /*!< Description collection[0]: Unspecified */ +} FICR_INFO_Type; + +typedef struct { + __I uint32_t A0; /*!< Slope definition A0 */ + __I uint32_t A1; /*!< Slope definition A1 */ + __I uint32_t A2; /*!< Slope definition A2 */ + __I uint32_t A3; /*!< Slope definition A3 */ + __I uint32_t A4; /*!< Slope definition A4 */ + __I uint32_t A5; /*!< Slope definition A5 */ + __I uint32_t B0; /*!< Y-intercept B0 */ + __I uint32_t B1; /*!< Y-intercept B1 */ + __I uint32_t B2; /*!< Y-intercept B2 */ + __I uint32_t B3; /*!< Y-intercept B3 */ + __I uint32_t B4; /*!< Y-intercept B4 */ + __I uint32_t B5; /*!< Y-intercept B5 */ + __I uint32_t T0; /*!< Segment end T0 */ + __I uint32_t T1; /*!< Segment end T1 */ + __I uint32_t T2; /*!< Segment end T2 */ + __I uint32_t T3; /*!< Segment end T3 */ + __I uint32_t T4; /*!< Segment end T4 */ +} FICR_TEMP_Type; + +typedef struct { + __IO uint32_t POWER; /*!< Description cluster[0]: RAM0 power control register */ + __O uint32_t POWERSET; /*!< Description cluster[0]: RAM0 power control set register */ + __O uint32_t POWERCLR; /*!< Description cluster[0]: RAM0 power control clear register */ + __I uint32_t RESERVED0; +} POWER_RAM_Type; + +typedef struct { + __IO uint32_t RTS; /*!< Pin select for RTS signal */ + __IO uint32_t TXD; /*!< Pin select for TXD signal */ + __IO uint32_t CTS; /*!< Pin select for CTS signal */ + __IO uint32_t RXD; /*!< Pin select for RXD signal */ +} UARTE_PSEL_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in receive buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ +} UARTE_RXD_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in transmit buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ +} UARTE_TXD_Type; + +typedef struct { + __IO uint32_t SCL; /*!< Pin select for SCL signal */ + __IO uint32_t SDA; /*!< Pin select for SDA signal */ +} TWIM_PSEL_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in receive buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ + __IO uint32_t LIST; /*!< EasyDMA list type */ +} TWIM_RXD_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in transmit buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ + __IO uint32_t LIST; /*!< EasyDMA list type */ +} TWIM_TXD_Type; + +typedef struct { + __IO uint32_t SCL; /*!< Pin select for SCL signal */ + __IO uint32_t SDA; /*!< Pin select for SDA signal */ +} TWIS_PSEL_Type; + +typedef struct { + __IO uint32_t PTR; /*!< RXD Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in RXD buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last RXD transaction */ +} TWIS_RXD_Type; + +typedef struct { + __IO uint32_t PTR; /*!< TXD Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in TXD buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last TXD transaction */ +} TWIS_TXD_Type; + +typedef struct { + __IO uint32_t SCK; /*!< Pin select for SCK */ + __IO uint32_t MOSI; /*!< Pin select for MOSI signal */ + __IO uint32_t MISO; /*!< Pin select for MISO signal */ +} SPIM_PSEL_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in receive buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ + __IO uint32_t LIST; /*!< EasyDMA list type */ +} SPIM_RXD_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in transmit buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ + __IO uint32_t LIST; /*!< EasyDMA list type */ +} SPIM_TXD_Type; + +typedef struct { + __IO uint32_t SCK; /*!< Pin select for SCK */ + __IO uint32_t MISO; /*!< Pin select for MISO signal */ + __IO uint32_t MOSI; /*!< Pin select for MOSI signal */ + __IO uint32_t CSN; /*!< Pin select for CSN signal */ +} SPIS_PSEL_Type; + +typedef struct { + __IO uint32_t PTR; /*!< RXD data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in receive buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes received in last granted transaction */ +} SPIS_RXD_Type; + +typedef struct { + __IO uint32_t PTR; /*!< TXD data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in transmit buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transmitted in last granted transaction */ +} SPIS_TXD_Type; + +typedef struct { + __IO uint32_t LIMITH; /*!< Description cluster[0]: Last results is equal or above CH[0].LIMIT.HIGH */ + __IO uint32_t LIMITL; /*!< Description cluster[0]: Last results is equal or below CH[0].LIMIT.LOW */ +} SAADC_EVENTS_CH_Type; + +typedef struct { + __IO uint32_t PSELP; /*!< Description cluster[0]: Input positive pin selection for CH[0] */ + __IO uint32_t PSELN; /*!< Description cluster[0]: Input negative pin selection for CH[0] */ + __IO uint32_t CONFIG; /*!< Description cluster[0]: Input configuration for CH[0] */ + __IO uint32_t LIMIT; /*!< Description cluster[0]: High/low limits for event monitoring + a channel */ +} SAADC_CH_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of buffer words to transfer */ + __I uint32_t AMOUNT; /*!< Number of buffer words transferred since last START */ +} SAADC_RESULT_Type; + +typedef struct { + __IO uint32_t LED; /*!< Pin select for LED signal */ + __IO uint32_t A; /*!< Pin select for A signal */ + __IO uint32_t B; /*!< Pin select for B signal */ +} QDEC_PSEL_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Description cluster[0]: Beginning address in RAM of this sequence */ + __IO uint32_t CNT; /*!< Description cluster[0]: Number of values (duty cycles) in this + sequence */ + __IO uint32_t REFRESH; /*!< Description cluster[0]: Number of additional PWM periods between + samples loaded into compare register */ + __IO uint32_t ENDDELAY; /*!< Description cluster[0]: Time added after the sequence */ + __I uint32_t RESERVED1[4]; +} PWM_SEQ_Type; + +typedef struct { + __IO uint32_t OUT[4]; /*!< Description collection[0]: Output pin select for PWM channel + 0 */ +} PWM_PSEL_Type; + +typedef struct { + __IO uint32_t CLK; /*!< Pin number configuration for PDM CLK signal */ + __IO uint32_t DIN; /*!< Pin number configuration for PDM DIN signal */ +} PDM_PSEL_Type; + +typedef struct { + __IO uint32_t PTR; /*!< RAM address pointer to write samples to with EasyDMA */ + __IO uint32_t MAXCNT; /*!< Number of samples to allocate memory for in EasyDMA mode */ +} PDM_SAMPLE_Type; + +typedef struct { + __O uint32_t EN; /*!< Description cluster[0]: Enable channel group 0 */ + __O uint32_t DIS; /*!< Description cluster[0]: Disable channel group 0 */ +} PPI_TASKS_CHG_Type; + +typedef struct { + __IO uint32_t EEP; /*!< Description cluster[0]: Channel 0 event end-point */ + __IO uint32_t TEP; /*!< Description cluster[0]: Channel 0 task end-point */ +} PPI_CH_Type; + +typedef struct { + __IO uint32_t TEP; /*!< Description cluster[0]: Channel 0 task end-point */ +} PPI_FORK_Type; + + +/* ================================================================================ */ +/* ================ FICR ================ */ +/* ================================================================================ */ + + +/** + * @brief Factory information configuration registers (FICR) + */ + +typedef struct { /*!< FICR Structure */ + __I uint32_t RESERVED0[4]; + __I uint32_t CODEPAGESIZE; /*!< Code memory page size */ + __I uint32_t CODESIZE; /*!< Code memory size */ + __I uint32_t RESERVED1[18]; + __I uint32_t DEVICEID[2]; /*!< Description collection[0]: Device identifier */ + __I uint32_t RESERVED2[6]; + __I uint32_t ER[4]; /*!< Description collection[0]: Encryption root, word 0 */ + __I uint32_t IR[4]; /*!< Description collection[0]: Identity root, word 0 */ + __I uint32_t DEVICEADDRTYPE; /*!< Device address type */ + __I uint32_t DEVICEADDR[2]; /*!< Description collection[0]: Device address 0 */ + __I uint32_t RESERVED3[21]; + FICR_INFO_Type INFO; /*!< Device info */ + __I uint32_t RESERVED4[185]; + FICR_TEMP_Type TEMP; /*!< Registers storing factory TEMP module linearization coefficients */ +} NRF_FICR_Type; + + +/* ================================================================================ */ +/* ================ UICR ================ */ +/* ================================================================================ */ + + +/** + * @brief User information configuration registers (UICR) + */ + +typedef struct { /*!< UICR Structure */ + __IO uint32_t UNUSED0; /*!< Unspecified */ + __IO uint32_t UNUSED1; /*!< Unspecified */ + __IO uint32_t UNUSED2; /*!< Unspecified */ + __I uint32_t RESERVED0; + __IO uint32_t UNUSED3; /*!< Unspecified */ + __IO uint32_t NRFFW[15]; /*!< Description collection[0]: Reserved for Nordic firmware design */ + __IO uint32_t NRFHW[12]; /*!< Description collection[0]: Reserved for Nordic hardware design */ + __IO uint32_t CUSTOMER[32]; /*!< Description collection[0]: Reserved for customer */ + __I uint32_t RESERVED1[64]; + __IO uint32_t PSELRESET[2]; /*!< Description collection[0]: Mapping of the nRESET function (see + POWER chapter for details) */ + __IO uint32_t APPROTECT; /*!< Access port protection */ +} NRF_UICR_Type; + + +/* ================================================================================ */ +/* ================ BPROT ================ */ +/* ================================================================================ */ + + +/** + * @brief Block Protect (BPROT) + */ + +typedef struct { /*!< BPROT Structure */ + __I uint32_t RESERVED0[384]; + __IO uint32_t CONFIG0; /*!< Block protect configuration register 0 */ + __IO uint32_t CONFIG1; /*!< Block protect configuration register 1 */ + __IO uint32_t DISABLEINDEBUG; /*!< Disable protection mechanism in debug mode */ + __IO uint32_t UNUSED0; /*!< Unspecified */ +} NRF_BPROT_Type; + + +/* ================================================================================ */ +/* ================ POWER ================ */ +/* ================================================================================ */ + + +/** + * @brief Power control (POWER) + */ + +typedef struct { /*!< POWER Structure */ + __I uint32_t RESERVED0[30]; + __O uint32_t TASKS_CONSTLAT; /*!< Enable constant latency mode */ + __O uint32_t TASKS_LOWPWR; /*!< Enable low power mode (variable latency) */ + __I uint32_t RESERVED1[34]; + __IO uint32_t EVENTS_POFWARN; /*!< Power failure warning */ + __I uint32_t RESERVED2[2]; + __IO uint32_t EVENTS_SLEEPENTER; /*!< CPU entered WFI/WFE sleep */ + __IO uint32_t EVENTS_SLEEPEXIT; /*!< CPU exited WFI/WFE sleep */ + __I uint32_t RESERVED3[122]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED4[61]; + __IO uint32_t RESETREAS; /*!< Reset reason */ + __I uint32_t RESERVED5[63]; + __O uint32_t SYSTEMOFF; /*!< System OFF register */ + __I uint32_t RESERVED6[3]; + __IO uint32_t POFCON; /*!< Power failure comparator configuration */ + __I uint32_t RESERVED7[2]; + __IO uint32_t GPREGRET; /*!< General purpose retention register */ + __IO uint32_t GPREGRET2; /*!< General purpose retention register */ + __I uint32_t RESERVED8[21]; + __IO uint32_t DCDCEN; /*!< DC/DC enable register */ + __I uint32_t RESERVED9[225]; + POWER_RAM_Type RAM[8]; /*!< Unspecified */ +} NRF_POWER_Type; + + +/* ================================================================================ */ +/* ================ CLOCK ================ */ +/* ================================================================================ */ + + +/** + * @brief Clock control (CLOCK) + */ + +typedef struct { /*!< CLOCK Structure */ + __O uint32_t TASKS_HFCLKSTART; /*!< Start HFCLK crystal oscillator */ + __O uint32_t TASKS_HFCLKSTOP; /*!< Stop HFCLK crystal oscillator */ + __O uint32_t TASKS_LFCLKSTART; /*!< Start LFCLK source */ + __O uint32_t TASKS_LFCLKSTOP; /*!< Stop LFCLK source */ + __O uint32_t TASKS_CAL; /*!< Start calibration of LFRC oscillator */ + __O uint32_t TASKS_CTSTART; /*!< Start calibration timer */ + __O uint32_t TASKS_CTSTOP; /*!< Stop calibration timer */ + __I uint32_t RESERVED0[57]; + __IO uint32_t EVENTS_HFCLKSTARTED; /*!< HFCLK oscillator started */ + __IO uint32_t EVENTS_LFCLKSTARTED; /*!< LFCLK started */ + __I uint32_t RESERVED1; + __IO uint32_t EVENTS_DONE; /*!< Calibration of LFCLK RC oscillator complete event */ + __IO uint32_t EVENTS_CTTO; /*!< Calibration timer timeout */ + __I uint32_t RESERVED2[124]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[63]; + __I uint32_t HFCLKRUN; /*!< Status indicating that HFCLKSTART task has been triggered */ + __I uint32_t HFCLKSTAT; /*!< HFCLK status */ + __I uint32_t RESERVED4; + __I uint32_t LFCLKRUN; /*!< Status indicating that LFCLKSTART task has been triggered */ + __I uint32_t LFCLKSTAT; /*!< LFCLK status */ + __I uint32_t LFCLKSRCCOPY; /*!< Copy of LFCLKSRC register, set when LFCLKSTART task was triggered */ + __I uint32_t RESERVED5[62]; + __IO uint32_t LFCLKSRC; /*!< Clock source for the LFCLK */ + __I uint32_t RESERVED6[7]; + __IO uint32_t CTIV; /*!< Calibration timer interval */ +} NRF_CLOCK_Type; + + +/* ================================================================================ */ +/* ================ RADIO ================ */ +/* ================================================================================ */ + + +/** + * @brief 2.4 GHz Radio (RADIO) + */ + +typedef struct { /*!< RADIO Structure */ + __O uint32_t TASKS_TXEN; /*!< Enable RADIO in TX mode */ + __O uint32_t TASKS_RXEN; /*!< Enable RADIO in RX mode */ + __O uint32_t TASKS_START; /*!< Start RADIO */ + __O uint32_t TASKS_STOP; /*!< Stop RADIO */ + __O uint32_t TASKS_DISABLE; /*!< Disable RADIO */ + __O uint32_t TASKS_RSSISTART; /*!< Start the RSSI and take one single sample of the receive signal + strength. */ + __O uint32_t TASKS_RSSISTOP; /*!< Stop the RSSI measurement */ + __O uint32_t TASKS_BCSTART; /*!< Start the bit counter */ + __O uint32_t TASKS_BCSTOP; /*!< Stop the bit counter */ + __I uint32_t RESERVED0[55]; + __IO uint32_t EVENTS_READY; /*!< RADIO has ramped up and is ready to be started */ + __IO uint32_t EVENTS_ADDRESS; /*!< Address sent or received */ + __IO uint32_t EVENTS_PAYLOAD; /*!< Packet payload sent or received */ + __IO uint32_t EVENTS_END; /*!< Packet sent or received */ + __IO uint32_t EVENTS_DISABLED; /*!< RADIO has been disabled */ + __IO uint32_t EVENTS_DEVMATCH; /*!< A device address match occurred on the last received packet */ + __IO uint32_t EVENTS_DEVMISS; /*!< No device address match occurred on the last received packet */ + __IO uint32_t EVENTS_RSSIEND; /*!< Sampling of receive signal strength complete. */ + __I uint32_t RESERVED1[2]; + __IO uint32_t EVENTS_BCMATCH; /*!< Bit counter reached bit count value. */ + __I uint32_t RESERVED2; + __IO uint32_t EVENTS_CRCOK; /*!< Packet received with CRC ok */ + __IO uint32_t EVENTS_CRCERROR; /*!< Packet received with CRC error */ + __I uint32_t RESERVED3[50]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED4[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED5[61]; + __I uint32_t CRCSTATUS; /*!< CRC status */ + __I uint32_t RESERVED6; + __I uint32_t RXMATCH; /*!< Received address */ + __I uint32_t RXCRC; /*!< CRC field of previously received packet */ + __I uint32_t DAI; /*!< Device address match index */ + __I uint32_t RESERVED7[60]; + __IO uint32_t PACKETPTR; /*!< Packet pointer */ + __IO uint32_t FREQUENCY; /*!< Frequency */ + __IO uint32_t TXPOWER; /*!< Output power */ + __IO uint32_t MODE; /*!< Data rate and modulation */ + __IO uint32_t PCNF0; /*!< Packet configuration register 0 */ + __IO uint32_t PCNF1; /*!< Packet configuration register 1 */ + __IO uint32_t BASE0; /*!< Base address 0 */ + __IO uint32_t BASE1; /*!< Base address 1 */ + __IO uint32_t PREFIX0; /*!< Prefixes bytes for logical addresses 0-3 */ + __IO uint32_t PREFIX1; /*!< Prefixes bytes for logical addresses 4-7 */ + __IO uint32_t TXADDRESS; /*!< Transmit address select */ + __IO uint32_t RXADDRESSES; /*!< Receive address select */ + __IO uint32_t CRCCNF; /*!< CRC configuration */ + __IO uint32_t CRCPOLY; /*!< CRC polynomial */ + __IO uint32_t CRCINIT; /*!< CRC initial value */ + __IO uint32_t UNUSED0; /*!< Unspecified */ + __IO uint32_t TIFS; /*!< Inter Frame Spacing in us */ + __I uint32_t RSSISAMPLE; /*!< RSSI sample */ + __I uint32_t RESERVED8; + __I uint32_t STATE; /*!< Current radio state */ + __IO uint32_t DATAWHITEIV; /*!< Data whitening initial value */ + __I uint32_t RESERVED9[2]; + __IO uint32_t BCC; /*!< Bit counter compare */ + __I uint32_t RESERVED10[39]; + __IO uint32_t DAB[8]; /*!< Description collection[0]: Device address base segment 0 */ + __IO uint32_t DAP[8]; /*!< Description collection[0]: Device address prefix 0 */ + __IO uint32_t DACNF; /*!< Device address match configuration */ + __I uint32_t RESERVED11[3]; + __IO uint32_t MODECNF0; /*!< Radio mode configuration register 0 */ + __I uint32_t RESERVED12[618]; + __IO uint32_t POWER; /*!< Peripheral power control */ +} NRF_RADIO_Type; + + +/* ================================================================================ */ +/* ================ UARTE ================ */ +/* ================================================================================ */ + + +/** + * @brief UART with EasyDMA (UARTE) + */ + +typedef struct { /*!< UARTE Structure */ + __O uint32_t TASKS_STARTRX; /*!< Start UART receiver */ + __O uint32_t TASKS_STOPRX; /*!< Stop UART receiver */ + __O uint32_t TASKS_STARTTX; /*!< Start UART transmitter */ + __O uint32_t TASKS_STOPTX; /*!< Stop UART transmitter */ + __I uint32_t RESERVED0[7]; + __O uint32_t TASKS_FLUSHRX; /*!< Flush RX FIFO into RX buffer */ + __I uint32_t RESERVED1[52]; + __IO uint32_t EVENTS_CTS; /*!< CTS is activated (set low). Clear To Send. */ + __IO uint32_t EVENTS_NCTS; /*!< CTS is deactivated (set high). Not Clear To Send. */ + __IO uint32_t EVENTS_RXDRDY; /*!< Data received in RXD (but potentially not yet transferred to + Data RAM) */ + __I uint32_t RESERVED2; + __IO uint32_t EVENTS_ENDRX; /*!< Receive buffer is filled up */ + __I uint32_t RESERVED3[2]; + __IO uint32_t EVENTS_TXDRDY; /*!< Data sent from TXD */ + __IO uint32_t EVENTS_ENDTX; /*!< Last TX byte transmitted */ + __IO uint32_t EVENTS_ERROR; /*!< Error detected */ + __I uint32_t RESERVED4[7]; + __IO uint32_t EVENTS_RXTO; /*!< Receiver timeout */ + __I uint32_t RESERVED5; + __IO uint32_t EVENTS_RXSTARTED; /*!< UART receiver has started */ + __IO uint32_t EVENTS_TXSTARTED; /*!< UART transmitter has started */ + __I uint32_t RESERVED6; + __IO uint32_t EVENTS_TXSTOPPED; /*!< Transmitter stopped */ + __I uint32_t RESERVED7[41]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED8[63]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED9[93]; + __IO uint32_t ERRORSRC; /*!< Error source Note : this register is read / write one to clear. */ + __I uint32_t RESERVED10[31]; + __IO uint32_t ENABLE; /*!< Enable UART */ + __I uint32_t RESERVED11; + UARTE_PSEL_Type PSEL; /*!< Unspecified */ + __I uint32_t RESERVED12[3]; + __IO uint32_t BAUDRATE; /*!< Baud rate. Accuracy depends on the HFCLK source selected. */ + __I uint32_t RESERVED13[3]; + UARTE_RXD_Type RXD; /*!< RXD EasyDMA channel */ + __I uint32_t RESERVED14; + UARTE_TXD_Type TXD; /*!< TXD EasyDMA channel */ + __I uint32_t RESERVED15[7]; + __IO uint32_t CONFIG; /*!< Configuration of parity and hardware flow control */ +} NRF_UARTE_Type; + + +/* ================================================================================ */ +/* ================ TWIM ================ */ +/* ================================================================================ */ + + +/** + * @brief I2C compatible Two-Wire Master Interface with EasyDMA (TWIM) + */ + +typedef struct { /*!< TWIM Structure */ + __O uint32_t TASKS_STARTRX; /*!< Start TWI receive sequence */ + __I uint32_t RESERVED0; + __O uint32_t TASKS_STARTTX; /*!< Start TWI transmit sequence */ + __I uint32_t RESERVED1[2]; + __O uint32_t TASKS_STOP; /*!< Stop TWI transaction. Must be issued while the TWI master is + not suspended. */ + __I uint32_t RESERVED2; + __O uint32_t TASKS_SUSPEND; /*!< Suspend TWI transaction */ + __O uint32_t TASKS_RESUME; /*!< Resume TWI transaction */ + __I uint32_t RESERVED3[56]; + __IO uint32_t EVENTS_STOPPED; /*!< TWI stopped */ + __I uint32_t RESERVED4[7]; + __IO uint32_t EVENTS_ERROR; /*!< TWI error */ + __I uint32_t RESERVED5[8]; + __IO uint32_t EVENTS_SUSPENDED; /*!< Last byte has been sent out after the SUSPEND task has been + issued, TWI traffic is now suspended. */ + __IO uint32_t EVENTS_RXSTARTED; /*!< Receive sequence started */ + __IO uint32_t EVENTS_TXSTARTED; /*!< Transmit sequence started */ + __I uint32_t RESERVED6[2]; + __IO uint32_t EVENTS_LASTRX; /*!< Byte boundary, starting to receive the last byte */ + __IO uint32_t EVENTS_LASTTX; /*!< Byte boundary, starting to transmit the last byte */ + __I uint32_t RESERVED7[39]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED8[63]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED9[110]; + __IO uint32_t ERRORSRC; /*!< Error source */ + __I uint32_t RESERVED10[14]; + __IO uint32_t ENABLE; /*!< Enable TWIM */ + __I uint32_t RESERVED11; + TWIM_PSEL_Type PSEL; /*!< Unspecified */ + __I uint32_t RESERVED12[5]; + __IO uint32_t FREQUENCY; /*!< TWI frequency. Accuracy depends on the HFCLK source selected. */ + __I uint32_t RESERVED13[3]; + TWIM_RXD_Type RXD; /*!< RXD EasyDMA channel */ + TWIM_TXD_Type TXD; /*!< TXD EasyDMA channel */ + __I uint32_t RESERVED14[13]; + __IO uint32_t ADDRESS; /*!< Address used in the TWI transfer */ +} NRF_TWIM_Type; + + +/* ================================================================================ */ +/* ================ TWIS ================ */ +/* ================================================================================ */ + + +/** + * @brief I2C compatible Two-Wire Slave Interface with EasyDMA (TWIS) + */ + +typedef struct { /*!< TWIS Structure */ + __I uint32_t RESERVED0[5]; + __O uint32_t TASKS_STOP; /*!< Stop TWI transaction */ + __I uint32_t RESERVED1; + __O uint32_t TASKS_SUSPEND; /*!< Suspend TWI transaction */ + __O uint32_t TASKS_RESUME; /*!< Resume TWI transaction */ + __I uint32_t RESERVED2[3]; + __O uint32_t TASKS_PREPARERX; /*!< Prepare the TWI slave to respond to a write command */ + __O uint32_t TASKS_PREPARETX; /*!< Prepare the TWI slave to respond to a read command */ + __I uint32_t RESERVED3[51]; + __IO uint32_t EVENTS_STOPPED; /*!< TWI stopped */ + __I uint32_t RESERVED4[7]; + __IO uint32_t EVENTS_ERROR; /*!< TWI error */ + __I uint32_t RESERVED5[9]; + __IO uint32_t EVENTS_RXSTARTED; /*!< Receive sequence started */ + __IO uint32_t EVENTS_TXSTARTED; /*!< Transmit sequence started */ + __I uint32_t RESERVED6[4]; + __IO uint32_t EVENTS_WRITE; /*!< Write command received */ + __IO uint32_t EVENTS_READ; /*!< Read command received */ + __I uint32_t RESERVED7[37]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED8[63]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED9[113]; + __IO uint32_t ERRORSRC; /*!< Error source */ + __I uint32_t MATCH; /*!< Status register indicating which address had a match */ + __I uint32_t RESERVED10[10]; + __IO uint32_t ENABLE; /*!< Enable TWIS */ + __I uint32_t RESERVED11; + TWIS_PSEL_Type PSEL; /*!< Unspecified */ + __I uint32_t RESERVED12[9]; + TWIS_RXD_Type RXD; /*!< RXD EasyDMA channel */ + __I uint32_t RESERVED13; + TWIS_TXD_Type TXD; /*!< TXD EasyDMA channel */ + __I uint32_t RESERVED14[14]; + __IO uint32_t ADDRESS[2]; /*!< Description collection[0]: TWI slave address 0 */ + __I uint32_t RESERVED15; + __IO uint32_t CONFIG; /*!< Configuration register for the address match mechanism */ + __I uint32_t RESERVED16[10]; + __IO uint32_t ORC; /*!< Over-read character. Character sent out in case of an over-read + of the transmit buffer. */ +} NRF_TWIS_Type; + + +/* ================================================================================ */ +/* ================ SPIM ================ */ +/* ================================================================================ */ + + +/** + * @brief Serial Peripheral Interface Master with EasyDMA (SPIM) + */ + +typedef struct { /*!< SPIM Structure */ + __I uint32_t RESERVED0[4]; + __O uint32_t TASKS_START; /*!< Start SPI transaction */ + __O uint32_t TASKS_STOP; /*!< Stop SPI transaction */ + __I uint32_t RESERVED1; + __O uint32_t TASKS_SUSPEND; /*!< Suspend SPI transaction */ + __O uint32_t TASKS_RESUME; /*!< Resume SPI transaction */ + __I uint32_t RESERVED2[56]; + __IO uint32_t EVENTS_STOPPED; /*!< SPI transaction has stopped */ + __I uint32_t RESERVED3[2]; + __IO uint32_t EVENTS_ENDRX; /*!< End of RXD buffer reached */ + __I uint32_t RESERVED4; + __IO uint32_t EVENTS_END; /*!< End of RXD buffer and TXD buffer reached */ + __I uint32_t RESERVED5; + __IO uint32_t EVENTS_ENDTX; /*!< End of TXD buffer reached */ + __I uint32_t RESERVED6[10]; + __IO uint32_t EVENTS_STARTED; /*!< Transaction started */ + __I uint32_t RESERVED7[44]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED8[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED9[125]; + __IO uint32_t ENABLE; /*!< Enable SPIM */ + __I uint32_t RESERVED10; + SPIM_PSEL_Type PSEL; /*!< Unspecified */ + __I uint32_t RESERVED11[4]; + __IO uint32_t FREQUENCY; /*!< SPI frequency. Accuracy depends on the HFCLK source selected. */ + __I uint32_t RESERVED12[3]; + SPIM_RXD_Type RXD; /*!< RXD EasyDMA channel */ + SPIM_TXD_Type TXD; /*!< TXD EasyDMA channel */ + __IO uint32_t CONFIG; /*!< Configuration register */ + __I uint32_t RESERVED13[26]; + __IO uint32_t ORC; /*!< Over-read character. Character clocked out in case and over-read + of the TXD buffer. */ +} NRF_SPIM_Type; + + +/* ================================================================================ */ +/* ================ SPIS ================ */ +/* ================================================================================ */ + + +/** + * @brief SPI Slave (SPIS) + */ + +typedef struct { /*!< SPIS Structure */ + __I uint32_t RESERVED0[9]; + __O uint32_t TASKS_ACQUIRE; /*!< Acquire SPI semaphore */ + __O uint32_t TASKS_RELEASE; /*!< Release SPI semaphore, enabling the SPI slave to acquire it */ + __I uint32_t RESERVED1[54]; + __IO uint32_t EVENTS_END; /*!< Granted transaction completed */ + __I uint32_t RESERVED2[2]; + __IO uint32_t EVENTS_ENDRX; /*!< End of RXD buffer reached */ + __I uint32_t RESERVED3[5]; + __IO uint32_t EVENTS_ACQUIRED; /*!< Semaphore acquired */ + __I uint32_t RESERVED4[53]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED5[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED6[61]; + __I uint32_t SEMSTAT; /*!< Semaphore status register */ + __I uint32_t RESERVED7[15]; + __IO uint32_t STATUS; /*!< Status from last transaction */ + __I uint32_t RESERVED8[47]; + __IO uint32_t ENABLE; /*!< Enable SPI slave */ + __I uint32_t RESERVED9; + SPIS_PSEL_Type PSEL; /*!< Unspecified */ + __I uint32_t RESERVED10[7]; + SPIS_RXD_Type RXD; /*!< Unspecified */ + __I uint32_t RESERVED11; + SPIS_TXD_Type TXD; /*!< Unspecified */ + __I uint32_t RESERVED12; + __IO uint32_t CONFIG; /*!< Configuration register */ + __I uint32_t RESERVED13; + __IO uint32_t DEF; /*!< Default character. Character clocked out in case of an ignored + transaction. */ + __I uint32_t RESERVED14[24]; + __IO uint32_t ORC; /*!< Over-read character */ +} NRF_SPIS_Type; + + +/* ================================================================================ */ +/* ================ GPIOTE ================ */ +/* ================================================================================ */ + + +/** + * @brief GPIO Tasks and Events (GPIOTE) + */ + +typedef struct { /*!< GPIOTE Structure */ + __O uint32_t TASKS_OUT[8]; /*!< Description collection[0]: Task for writing to pin specified + in CONFIG[0].PSEL. Action on pin is configured in CONFIG[0].POLARITY. */ + __I uint32_t RESERVED0[4]; + __O uint32_t TASKS_SET[8]; /*!< Description collection[0]: Task for writing to pin specified + in CONFIG[0].PSEL. Action on pin is to set it high. */ + __I uint32_t RESERVED1[4]; + __O uint32_t TASKS_CLR[8]; /*!< Description collection[0]: Task for writing to pin specified + in CONFIG[0].PSEL. Action on pin is to set it low. */ + __I uint32_t RESERVED2[32]; + __IO uint32_t EVENTS_IN[8]; /*!< Description collection[0]: Event generated from pin specified + in CONFIG[0].PSEL */ + __I uint32_t RESERVED3[23]; + __IO uint32_t EVENTS_PORT; /*!< Event generated from multiple input GPIO pins with SENSE mechanism + enabled */ + __I uint32_t RESERVED4[97]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED5[129]; + __IO uint32_t CONFIG[8]; /*!< Description collection[0]: Configuration for OUT[n], SET[n] + and CLR[n] tasks and IN[n] event */ +} NRF_GPIOTE_Type; + + +/* ================================================================================ */ +/* ================ SAADC ================ */ +/* ================================================================================ */ + + +/** + * @brief Analog to Digital Converter (SAADC) + */ + +typedef struct { /*!< SAADC Structure */ + __O uint32_t TASKS_START; /*!< Start the ADC and prepare the result buffer in RAM */ + __O uint32_t TASKS_SAMPLE; /*!< Take one ADC sample, if scan is enabled all channels are sampled */ + __O uint32_t TASKS_STOP; /*!< Stop the ADC and terminate any on-going conversion */ + __O uint32_t TASKS_CALIBRATEOFFSET; /*!< Starts offset auto-calibration */ + __I uint32_t RESERVED0[60]; + __IO uint32_t EVENTS_STARTED; /*!< The ADC has started */ + __IO uint32_t EVENTS_END; /*!< The ADC has filled up the Result buffer */ + __IO uint32_t EVENTS_DONE; /*!< A conversion task has been completed. Depending on the mode, + multiple conversions might be needed for a result to be transferred + to RAM. */ + __IO uint32_t EVENTS_RESULTDONE; /*!< A result is ready to get transferred to RAM. */ + __IO uint32_t EVENTS_CALIBRATEDONE; /*!< Calibration is complete */ + __IO uint32_t EVENTS_STOPPED; /*!< The ADC has stopped */ + SAADC_EVENTS_CH_Type EVENTS_CH[8]; /*!< Unspecified */ + __I uint32_t RESERVED1[106]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED2[61]; + __I uint32_t STATUS; /*!< Status */ + __I uint32_t RESERVED3[63]; + __IO uint32_t ENABLE; /*!< Enable or disable ADC */ + __I uint32_t RESERVED4[3]; + SAADC_CH_Type CH[8]; /*!< Unspecified */ + __I uint32_t RESERVED5[24]; + __IO uint32_t RESOLUTION; /*!< Resolution configuration */ + __IO uint32_t OVERSAMPLE; /*!< Oversampling configuration. OVERSAMPLE should not be combined + with SCAN. The RESOLUTION is applied before averaging, thus + for high OVERSAMPLE a higher RESOLUTION should be used. */ + __IO uint32_t SAMPLERATE; /*!< Controls normal or continuous sample rate */ + __I uint32_t RESERVED6[12]; + SAADC_RESULT_Type RESULT; /*!< RESULT EasyDMA channel */ +} NRF_SAADC_Type; + + +/* ================================================================================ */ +/* ================ TIMER ================ */ +/* ================================================================================ */ + + +/** + * @brief Timer/Counter 0 (TIMER) + */ + +typedef struct { /*!< TIMER Structure */ + __O uint32_t TASKS_START; /*!< Start Timer */ + __O uint32_t TASKS_STOP; /*!< Stop Timer */ + __O uint32_t TASKS_COUNT; /*!< Increment Timer (Counter mode only) */ + __O uint32_t TASKS_CLEAR; /*!< Clear time */ + __O uint32_t TASKS_SHUTDOWN; /*!< Deprecated register - Shut down timer */ + __I uint32_t RESERVED0[11]; + __O uint32_t TASKS_CAPTURE[6]; /*!< Description collection[0]: Capture Timer value to CC[0] register */ + __I uint32_t RESERVED1[58]; + __IO uint32_t EVENTS_COMPARE[6]; /*!< Description collection[0]: Compare event on CC[0] match */ + __I uint32_t RESERVED2[42]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED3[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED4[126]; + __IO uint32_t MODE; /*!< Timer mode selection */ + __IO uint32_t BITMODE; /*!< Configure the number of bits used by the TIMER */ + __I uint32_t RESERVED5; + __IO uint32_t PRESCALER; /*!< Timer prescaler register */ + __I uint32_t RESERVED6[11]; + __IO uint32_t CC[6]; /*!< Description collection[0]: Capture/Compare register 0 */ +} NRF_TIMER_Type; + + +/* ================================================================================ */ +/* ================ RTC ================ */ +/* ================================================================================ */ + + +/** + * @brief Real time counter 0 (RTC) + */ + +typedef struct { /*!< RTC Structure */ + __O uint32_t TASKS_START; /*!< Start RTC COUNTER */ + __O uint32_t TASKS_STOP; /*!< Stop RTC COUNTER */ + __O uint32_t TASKS_CLEAR; /*!< Clear RTC COUNTER */ + __O uint32_t TASKS_TRIGOVRFLW; /*!< Set COUNTER to 0xFFFFF0 */ + __I uint32_t RESERVED0[60]; + __IO uint32_t EVENTS_TICK; /*!< Event on COUNTER increment */ + __IO uint32_t EVENTS_OVRFLW; /*!< Event on COUNTER overflow */ + __I uint32_t RESERVED1[14]; + __IO uint32_t EVENTS_COMPARE[4]; /*!< Description collection[0]: Compare event on CC[0] match */ + __I uint32_t RESERVED2[109]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[13]; + __IO uint32_t EVTEN; /*!< Enable or disable event routing */ + __IO uint32_t EVTENSET; /*!< Enable event routing */ + __IO uint32_t EVTENCLR; /*!< Disable event routing */ + __I uint32_t RESERVED4[110]; + __I uint32_t COUNTER; /*!< Current COUNTER value */ + __IO uint32_t PRESCALER; /*!< 12 bit prescaler for COUNTER frequency (32768/(PRESCALER+1)).Must + be written when RTC is stopped */ + __I uint32_t RESERVED5[13]; + __IO uint32_t CC[4]; /*!< Description collection[0]: Compare register 0 */ +} NRF_RTC_Type; + + +/* ================================================================================ */ +/* ================ TEMP ================ */ +/* ================================================================================ */ + + +/** + * @brief Temperature Sensor (TEMP) + */ + +typedef struct { /*!< TEMP Structure */ + __O uint32_t TASKS_START; /*!< Start temperature measurement */ + __O uint32_t TASKS_STOP; /*!< Stop temperature measurement */ + __I uint32_t RESERVED0[62]; + __IO uint32_t EVENTS_DATARDY; /*!< Temperature measurement complete, data ready */ + __I uint32_t RESERVED1[128]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED2[127]; + __I int32_t TEMP; /*!< Temperature in degC (0.25deg steps) */ + __I uint32_t RESERVED3[5]; + __IO uint32_t A0; /*!< Slope of 1st piece wise linear function */ + __IO uint32_t A1; /*!< Slope of 2nd piece wise linear function */ + __IO uint32_t A2; /*!< Slope of 3rd piece wise linear function */ + __IO uint32_t A3; /*!< Slope of 4th piece wise linear function */ + __IO uint32_t A4; /*!< Slope of 5th piece wise linear function */ + __IO uint32_t A5; /*!< Slope of 6th piece wise linear function */ + __I uint32_t RESERVED4[2]; + __IO uint32_t B0; /*!< y-intercept of 1st piece wise linear function */ + __IO uint32_t B1; /*!< y-intercept of 2nd piece wise linear function */ + __IO uint32_t B2; /*!< y-intercept of 3rd piece wise linear function */ + __IO uint32_t B3; /*!< y-intercept of 4th piece wise linear function */ + __IO uint32_t B4; /*!< y-intercept of 5th piece wise linear function */ + __IO uint32_t B5; /*!< y-intercept of 6th piece wise linear function */ + __I uint32_t RESERVED5[2]; + __IO uint32_t T0; /*!< End point of 1st piece wise linear function */ + __IO uint32_t T1; /*!< End point of 2nd piece wise linear function */ + __IO uint32_t T2; /*!< End point of 3rd piece wise linear function */ + __IO uint32_t T3; /*!< End point of 4th piece wise linear function */ + __IO uint32_t T4; /*!< End point of 5th piece wise linear function */ +} NRF_TEMP_Type; + + +/* ================================================================================ */ +/* ================ RNG ================ */ +/* ================================================================================ */ + + +/** + * @brief Random Number Generator (RNG) + */ + +typedef struct { /*!< RNG Structure */ + __O uint32_t TASKS_START; /*!< Task starting the random number generator */ + __O uint32_t TASKS_STOP; /*!< Task stopping the random number generator */ + __I uint32_t RESERVED0[62]; + __IO uint32_t EVENTS_VALRDY; /*!< Event being generated for every new random number written to + the VALUE register */ + __I uint32_t RESERVED1[63]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED2[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[126]; + __IO uint32_t CONFIG; /*!< Configuration register */ + __I uint32_t VALUE; /*!< Output random number */ +} NRF_RNG_Type; + + +/* ================================================================================ */ +/* ================ ECB ================ */ +/* ================================================================================ */ + + +/** + * @brief AES ECB Mode Encryption (ECB) + */ + +typedef struct { /*!< ECB Structure */ + __O uint32_t TASKS_STARTECB; /*!< Start ECB block encrypt */ + __O uint32_t TASKS_STOPECB; /*!< Abort a possible executing ECB operation */ + __I uint32_t RESERVED0[62]; + __IO uint32_t EVENTS_ENDECB; /*!< ECB block encrypt complete */ + __IO uint32_t EVENTS_ERRORECB; /*!< ECB block encrypt aborted because of a STOPECB task or due to + an error */ + __I uint32_t RESERVED1[127]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED2[126]; + __IO uint32_t ECBDATAPTR; /*!< ECB block encrypt memory pointers */ +} NRF_ECB_Type; + + +/* ================================================================================ */ +/* ================ CCM ================ */ +/* ================================================================================ */ + + +/** + * @brief AES CCM Mode Encryption (CCM) + */ + +typedef struct { /*!< CCM Structure */ + __O uint32_t TASKS_KSGEN; /*!< Start generation of key-stream. This operation will stop by + itself when completed. */ + __O uint32_t TASKS_CRYPT; /*!< Start encryption/decryption. This operation will stop by itself + when completed. */ + __O uint32_t TASKS_STOP; /*!< Stop encryption/decryption */ + __O uint32_t TASKS_RATEOVERRIDE; /*!< Override DATARATE setting in MODE register with the contents + of the RATEOVERRIDE register for any ongoing encryption/decryption */ + __I uint32_t RESERVED0[60]; + __IO uint32_t EVENTS_ENDKSGEN; /*!< Key-stream generation complete */ + __IO uint32_t EVENTS_ENDCRYPT; /*!< Encrypt/decrypt complete */ + __IO uint32_t EVENTS_ERROR; /*!< Deprecated register - CCM error event */ + __I uint32_t RESERVED1[61]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED2[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[61]; + __I uint32_t MICSTATUS; /*!< MIC check result */ + __I uint32_t RESERVED4[63]; + __IO uint32_t ENABLE; /*!< Enable */ + __IO uint32_t MODE; /*!< Operation mode */ + __IO uint32_t CNFPTR; /*!< Pointer to data structure holding AES key and NONCE vector */ + __IO uint32_t INPTR; /*!< Input pointer */ + __IO uint32_t OUTPTR; /*!< Output pointer */ + __IO uint32_t SCRATCHPTR; /*!< Pointer to data area used for temporary storage */ + __IO uint32_t MAXPACKETSIZE; /*!< Length of key-stream generated when MODE.LENGTH = Extended. */ + __IO uint32_t RATEOVERRIDE; /*!< Data rate override setting. */ +} NRF_CCM_Type; + + +/* ================================================================================ */ +/* ================ AAR ================ */ +/* ================================================================================ */ + + +/** + * @brief Accelerated Address Resolver (AAR) + */ + +typedef struct { /*!< AAR Structure */ + __O uint32_t TASKS_START; /*!< Start resolving addresses based on IRKs specified in the IRK + data structure */ + __I uint32_t RESERVED0; + __O uint32_t TASKS_STOP; /*!< Stop resolving addresses */ + __I uint32_t RESERVED1[61]; + __IO uint32_t EVENTS_END; /*!< Address resolution procedure complete */ + __IO uint32_t EVENTS_RESOLVED; /*!< Address resolved */ + __IO uint32_t EVENTS_NOTRESOLVED; /*!< Address not resolved */ + __I uint32_t RESERVED2[126]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[61]; + __I uint32_t STATUS; /*!< Resolution status */ + __I uint32_t RESERVED4[63]; + __IO uint32_t ENABLE; /*!< Enable AAR */ + __IO uint32_t NIRK; /*!< Number of IRKs */ + __IO uint32_t IRKPTR; /*!< Pointer to IRK data structure */ + __I uint32_t RESERVED5; + __IO uint32_t ADDRPTR; /*!< Pointer to the resolvable address */ + __IO uint32_t SCRATCHPTR; /*!< Pointer to data area used for temporary storage */ +} NRF_AAR_Type; + + +/* ================================================================================ */ +/* ================ WDT ================ */ +/* ================================================================================ */ + + +/** + * @brief Watchdog Timer (WDT) + */ + +typedef struct { /*!< WDT Structure */ + __O uint32_t TASKS_START; /*!< Start the watchdog */ + __I uint32_t RESERVED0[63]; + __IO uint32_t EVENTS_TIMEOUT; /*!< Watchdog timeout */ + __I uint32_t RESERVED1[128]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED2[61]; + __I uint32_t RUNSTATUS; /*!< Run status */ + __I uint32_t REQSTATUS; /*!< Request status */ + __I uint32_t RESERVED3[63]; + __IO uint32_t CRV; /*!< Counter reload value */ + __IO uint32_t RREN; /*!< Enable register for reload request registers */ + __IO uint32_t CONFIG; /*!< Configuration register */ + __I uint32_t RESERVED4[60]; + __O uint32_t RR[8]; /*!< Description collection[0]: Reload request 0 */ +} NRF_WDT_Type; + + +/* ================================================================================ */ +/* ================ QDEC ================ */ +/* ================================================================================ */ + + +/** + * @brief Quadrature Decoder (QDEC) + */ + +typedef struct { /*!< QDEC Structure */ + __O uint32_t TASKS_START; /*!< Task starting the quadrature decoder */ + __O uint32_t TASKS_STOP; /*!< Task stopping the quadrature decoder */ + __O uint32_t TASKS_READCLRACC; /*!< Read and clear ACC and ACCDBL */ + __O uint32_t TASKS_RDCLRACC; /*!< Read and clear ACC */ + __O uint32_t TASKS_RDCLRDBL; /*!< Read and clear ACCDBL */ + __I uint32_t RESERVED0[59]; + __IO uint32_t EVENTS_SAMPLERDY; /*!< Event being generated for every new sample value written to + the SAMPLE register */ + __IO uint32_t EVENTS_REPORTRDY; /*!< Non-null report ready */ + __IO uint32_t EVENTS_ACCOF; /*!< ACC or ACCDBL register overflow */ + __IO uint32_t EVENTS_DBLRDY; /*!< Double displacement(s) detected */ + __IO uint32_t EVENTS_STOPPED; /*!< QDEC has been stopped */ + __I uint32_t RESERVED1[59]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED2[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[125]; + __IO uint32_t ENABLE; /*!< Enable the quadrature decoder */ + __IO uint32_t LEDPOL; /*!< LED output pin polarity */ + __IO uint32_t SAMPLEPER; /*!< Sample period */ + __I int32_t SAMPLE; /*!< Motion sample value */ + __IO uint32_t REPORTPER; /*!< Number of samples to be taken before REPORTRDY and DBLRDY events + can be generated */ + __I int32_t ACC; /*!< Register accumulating the valid transitions */ + __I int32_t ACCREAD; /*!< Snapshot of the ACC register, updated by the READCLRACC or RDCLRACC + task */ + QDEC_PSEL_Type PSEL; /*!< Unspecified */ + __IO uint32_t DBFEN; /*!< Enable input debounce filters */ + __I uint32_t RESERVED4[5]; + __IO uint32_t LEDPRE; /*!< Time period the LED is switched ON prior to sampling */ + __I uint32_t ACCDBL; /*!< Register accumulating the number of detected double transitions */ + __I uint32_t ACCDBLREAD; /*!< Snapshot of the ACCDBL, updated by the READCLRACC or RDCLRDBL + task */ +} NRF_QDEC_Type; + + +/* ================================================================================ */ +/* ================ COMP ================ */ +/* ================================================================================ */ + + +/** + * @brief Comparator (COMP) + */ + +typedef struct { /*!< COMP Structure */ + __O uint32_t TASKS_START; /*!< Start comparator */ + __O uint32_t TASKS_STOP; /*!< Stop comparator */ + __O uint32_t TASKS_SAMPLE; /*!< Sample comparator value */ + __I uint32_t RESERVED0[61]; + __IO uint32_t EVENTS_READY; /*!< COMP is ready and output is valid */ + __IO uint32_t EVENTS_DOWN; /*!< Downward crossing */ + __IO uint32_t EVENTS_UP; /*!< Upward crossing */ + __IO uint32_t EVENTS_CROSS; /*!< Downward or upward crossing */ + __I uint32_t RESERVED1[60]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED2[63]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[61]; + __I uint32_t RESULT; /*!< Compare result */ + __I uint32_t RESERVED4[63]; + __IO uint32_t ENABLE; /*!< COMP enable */ + __IO uint32_t PSEL; /*!< Pin select */ + __IO uint32_t REFSEL; /*!< Reference source select for single-ended mode */ + __IO uint32_t EXTREFSEL; /*!< External reference select */ + __I uint32_t RESERVED5[8]; + __IO uint32_t TH; /*!< Threshold configuration for hysteresis unit */ + __IO uint32_t MODE; /*!< Mode configuration */ + __IO uint32_t HYST; /*!< Comparator hysteresis enable */ +} NRF_COMP_Type; + + +/* ================================================================================ */ +/* ================ SWI ================ */ +/* ================================================================================ */ + + +/** + * @brief Software interrupt 0 (SWI) + */ + +typedef struct { /*!< SWI Structure */ + __I uint32_t UNUSED; /*!< Unused. */ +} NRF_SWI_Type; + + +/* ================================================================================ */ +/* ================ EGU ================ */ +/* ================================================================================ */ + + +/** + * @brief Event Generator Unit 0 (EGU) + */ + +typedef struct { /*!< EGU Structure */ + __O uint32_t TASKS_TRIGGER[16]; /*!< Description collection[0]: Trigger 0 for triggering the corresponding + TRIGGERED[0] event */ + __I uint32_t RESERVED0[48]; + __IO uint32_t EVENTS_TRIGGERED[16]; /*!< Description collection[0]: Event number 0 generated by triggering + the corresponding TRIGGER[0] task */ + __I uint32_t RESERVED1[112]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ +} NRF_EGU_Type; + + +/* ================================================================================ */ +/* ================ PWM ================ */ +/* ================================================================================ */ + + +/** + * @brief Pulse width modulation unit (PWM) + */ + +typedef struct { /*!< PWM Structure */ + __I uint32_t RESERVED0; + __O uint32_t TASKS_STOP; /*!< Stops PWM pulse generation on all channels at the end of current + PWM period, and stops sequence playback */ + __O uint32_t TASKS_SEQSTART[2]; /*!< Description collection[0]: Loads the first PWM value on all + enabled channels from sequence 0, and starts playing that sequence + at the rate defined in SEQ[0]REFRESH and/or DECODER.MODE. Causes + PWM generation to start if not running. */ + __O uint32_t TASKS_NEXTSTEP; /*!< Steps by one value in the current sequence on all enabled channels + if DECODER.MODE=NextStep. Does not cause PWM generation to start + if not running. */ + __I uint32_t RESERVED1[60]; + __IO uint32_t EVENTS_STOPPED; /*!< Response to STOP task, emitted when PWM pulses are no longer + generated */ + __IO uint32_t EVENTS_SEQSTARTED[2]; /*!< Description collection[0]: First PWM period started on sequence + 0 */ + __IO uint32_t EVENTS_SEQEND[2]; /*!< Description collection[0]: Emitted at end of every sequence + 0, when last value from RAM has been applied to wave counter */ + __IO uint32_t EVENTS_PWMPERIODEND; /*!< Emitted at the end of each PWM period */ + __IO uint32_t EVENTS_LOOPSDONE; /*!< Concatenated sequences have been played the amount of times + defined in LOOP.CNT */ + __I uint32_t RESERVED2[56]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED3[63]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED4[125]; + __IO uint32_t ENABLE; /*!< PWM module enable register */ + __IO uint32_t MODE; /*!< Selects operating mode of the wave counter */ + __IO uint32_t COUNTERTOP; /*!< Value up to which the pulse generator counter counts */ + __IO uint32_t PRESCALER; /*!< Configuration for PWM_CLK */ + __IO uint32_t DECODER; /*!< Configuration of the decoder */ + __IO uint32_t LOOP; /*!< Number of playbacks of a loop */ + __I uint32_t RESERVED5[2]; + PWM_SEQ_Type SEQ[2]; /*!< Unspecified */ + PWM_PSEL_Type PSEL; /*!< Unspecified */ +} NRF_PWM_Type; + + +/* ================================================================================ */ +/* ================ PDM ================ */ +/* ================================================================================ */ + + +/** + * @brief Pulse Density Modulation (Digital Microphone) Interface (PDM) + */ + +typedef struct { /*!< PDM Structure */ + __O uint32_t TASKS_START; /*!< Starts continuous PDM transfer */ + __O uint32_t TASKS_STOP; /*!< Stops PDM transfer */ + __I uint32_t RESERVED0[62]; + __IO uint32_t EVENTS_STARTED; /*!< PDM transfer has started */ + __IO uint32_t EVENTS_STOPPED; /*!< PDM transfer has finished */ + __IO uint32_t EVENTS_END; /*!< The PDM has written the last sample specified by SAMPLE.MAXCNT + (or the last sample after a STOP task has been received) to + Data RAM */ + __I uint32_t RESERVED1[125]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED2[125]; + __IO uint32_t ENABLE; /*!< PDM module enable register */ + __IO uint32_t PDMCLKCTRL; /*!< PDM clock generator control */ + __IO uint32_t MODE; /*!< Defines the routing of the connected PDM microphones' signals */ + __I uint32_t RESERVED3[3]; + __IO uint32_t GAINL; /*!< Left output gain adjustment */ + __IO uint32_t GAINR; /*!< Right output gain adjustment */ + __I uint32_t RESERVED4[8]; + PDM_PSEL_Type PSEL; /*!< Unspecified */ + __I uint32_t RESERVED5[6]; + PDM_SAMPLE_Type SAMPLE; /*!< Unspecified */ +} NRF_PDM_Type; + + +/* ================================================================================ */ +/* ================ NVMC ================ */ +/* ================================================================================ */ + + +/** + * @brief Non-volatile memory controller (NVMC) + */ + +typedef struct { /*!< NVMC Structure */ + __I uint32_t RESERVED0[256]; + __I uint32_t READY; /*!< Ready flag */ + __I uint32_t RESERVED1[64]; + __IO uint32_t CONFIG; /*!< Configuration register */ + + union { + __IO uint32_t ERASEPAGE; /*!< Register for erasing a page in code area */ + __IO uint32_t ERASEPCR1; /*!< Deprecated register - Register for erasing a page in code area. + Equivalent to ERASEPAGE. */ + }; + __IO uint32_t ERASEALL; /*!< Register for erasing all non-volatile user memory */ + __IO uint32_t ERASEPCR0; /*!< Deprecated register - Register for erasing a page in code area. + Equivalent to ERASEPAGE. */ + __IO uint32_t ERASEUICR; /*!< Register for erasing user information configuration registers */ +} NRF_NVMC_Type; + + +/* ================================================================================ */ +/* ================ PPI ================ */ +/* ================================================================================ */ + + +/** + * @brief Programmable Peripheral Interconnect (PPI) + */ + +typedef struct { /*!< PPI Structure */ + PPI_TASKS_CHG_Type TASKS_CHG[6]; /*!< Channel group tasks */ + __I uint32_t RESERVED0[308]; + __IO uint32_t CHEN; /*!< Channel enable register */ + __IO uint32_t CHENSET; /*!< Channel enable set register */ + __IO uint32_t CHENCLR; /*!< Channel enable clear register */ + __I uint32_t RESERVED1; + PPI_CH_Type CH[20]; /*!< PPI Channel */ + __I uint32_t RESERVED2[148]; + __IO uint32_t CHG[6]; /*!< Description collection[0]: Channel group 0 */ + __I uint32_t RESERVED3[62]; + PPI_FORK_Type FORK[32]; /*!< Fork */ +} NRF_PPI_Type; + + +/* ================================================================================ */ +/* ================ GPIO ================ */ +/* ================================================================================ */ + + +/** + * @brief GPIO Port (GPIO) + */ + +typedef struct { /*!< GPIO Structure */ + __I uint32_t RESERVED0[321]; + __IO uint32_t OUT; /*!< Write GPIO port */ + __IO uint32_t OUTSET; /*!< Set individual bits in GPIO port */ + __IO uint32_t OUTCLR; /*!< Clear individual bits in GPIO port */ + __I uint32_t IN; /*!< Read GPIO port */ + __IO uint32_t DIR; /*!< Direction of GPIO pins */ + __IO uint32_t DIRSET; /*!< DIR set register */ + __IO uint32_t DIRCLR; /*!< DIR clear register */ + __IO uint32_t LATCH; /*!< Latch register indicating what GPIO pins that have met the criteria + set in the PIN_CNF[n].SENSE registers */ + __IO uint32_t DETECTMODE; /*!< Select between default DETECT signal behaviour and LDETECT mode */ + __I uint32_t RESERVED1[118]; + __IO uint32_t PIN_CNF[32]; /*!< Description collection[0]: Configuration of GPIO pins */ +} NRF_GPIO_Type; + + +/* -------------------- End of section using anonymous unions ------------------- */ +#if defined(__CC_ARM) + #pragma pop +#elif defined(__ICCARM__) + /* leave anonymous unions enabled */ +#elif defined(__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined(__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined(__TASKING__) + #pragma warning restore +#else + #warning Not supported compiler type +#endif + + + + +/* ================================================================================ */ +/* ================ Peripheral memory map ================ */ +/* ================================================================================ */ + +#define NRF_FICR_BASE 0x10000000UL +#define NRF_UICR_BASE 0x10001000UL +#define NRF_BPROT_BASE 0x40000000UL +#define NRF_POWER_BASE 0x40000000UL +#define NRF_CLOCK_BASE 0x40000000UL +#define NRF_RADIO_BASE 0x40001000UL +#define NRF_UARTE0_BASE 0x40002000UL +#define NRF_TWIM0_BASE 0x40003000UL +#define NRF_TWIS0_BASE 0x40003000UL +#define NRF_SPIM0_BASE 0x40004000UL +#define NRF_SPIS0_BASE 0x40004000UL +#define NRF_GPIOTE_BASE 0x40006000UL +#define NRF_SAADC_BASE 0x40007000UL +#define NRF_TIMER0_BASE 0x40008000UL +#define NRF_TIMER1_BASE 0x40009000UL +#define NRF_TIMER2_BASE 0x4000A000UL +#define NRF_RTC0_BASE 0x4000B000UL +#define NRF_TEMP_BASE 0x4000C000UL +#define NRF_RNG_BASE 0x4000D000UL +#define NRF_ECB_BASE 0x4000E000UL +#define NRF_CCM_BASE 0x4000F000UL +#define NRF_AAR_BASE 0x4000F000UL +#define NRF_WDT_BASE 0x40010000UL +#define NRF_RTC1_BASE 0x40011000UL +#define NRF_QDEC_BASE 0x40012000UL +#define NRF_COMP_BASE 0x40013000UL +#define NRF_SWI0_BASE 0x40014000UL +#define NRF_EGU0_BASE 0x40014000UL +#define NRF_SWI1_BASE 0x40015000UL +#define NRF_EGU1_BASE 0x40015000UL +#define NRF_SWI2_BASE 0x40016000UL +#define NRF_SWI3_BASE 0x40017000UL +#define NRF_SWI4_BASE 0x40018000UL +#define NRF_SWI5_BASE 0x40019000UL +#define NRF_PWM0_BASE 0x4001C000UL +#define NRF_PDM_BASE 0x4001D000UL +#define NRF_NVMC_BASE 0x4001E000UL +#define NRF_PPI_BASE 0x4001F000UL +#define NRF_P0_BASE 0x50000000UL + + +/* ================================================================================ */ +/* ================ Peripheral declaration ================ */ +/* ================================================================================ */ + +#define NRF_FICR ((NRF_FICR_Type *) NRF_FICR_BASE) +#define NRF_UICR ((NRF_UICR_Type *) NRF_UICR_BASE) +#define NRF_BPROT ((NRF_BPROT_Type *) NRF_BPROT_BASE) +#define NRF_POWER ((NRF_POWER_Type *) NRF_POWER_BASE) +#define NRF_CLOCK ((NRF_CLOCK_Type *) NRF_CLOCK_BASE) +#define NRF_RADIO ((NRF_RADIO_Type *) NRF_RADIO_BASE) +#define NRF_UARTE0 ((NRF_UARTE_Type *) NRF_UARTE0_BASE) +#define NRF_TWIM0 ((NRF_TWIM_Type *) NRF_TWIM0_BASE) +#define NRF_TWIS0 ((NRF_TWIS_Type *) NRF_TWIS0_BASE) +#define NRF_SPIM0 ((NRF_SPIM_Type *) NRF_SPIM0_BASE) +#define NRF_SPIS0 ((NRF_SPIS_Type *) NRF_SPIS0_BASE) +#define NRF_GPIOTE ((NRF_GPIOTE_Type *) NRF_GPIOTE_BASE) +#define NRF_SAADC ((NRF_SAADC_Type *) NRF_SAADC_BASE) +#define NRF_TIMER0 ((NRF_TIMER_Type *) NRF_TIMER0_BASE) +#define NRF_TIMER1 ((NRF_TIMER_Type *) NRF_TIMER1_BASE) +#define NRF_TIMER2 ((NRF_TIMER_Type *) NRF_TIMER2_BASE) +#define NRF_RTC0 ((NRF_RTC_Type *) NRF_RTC0_BASE) +#define NRF_TEMP ((NRF_TEMP_Type *) NRF_TEMP_BASE) +#define NRF_RNG ((NRF_RNG_Type *) NRF_RNG_BASE) +#define NRF_ECB ((NRF_ECB_Type *) NRF_ECB_BASE) +#define NRF_CCM ((NRF_CCM_Type *) NRF_CCM_BASE) +#define NRF_AAR ((NRF_AAR_Type *) NRF_AAR_BASE) +#define NRF_WDT ((NRF_WDT_Type *) NRF_WDT_BASE) +#define NRF_RTC1 ((NRF_RTC_Type *) NRF_RTC1_BASE) +#define NRF_QDEC ((NRF_QDEC_Type *) NRF_QDEC_BASE) +#define NRF_COMP ((NRF_COMP_Type *) NRF_COMP_BASE) +#define NRF_SWI0 ((NRF_SWI_Type *) NRF_SWI0_BASE) +#define NRF_EGU0 ((NRF_EGU_Type *) NRF_EGU0_BASE) +#define NRF_SWI1 ((NRF_SWI_Type *) NRF_SWI1_BASE) +#define NRF_EGU1 ((NRF_EGU_Type *) NRF_EGU1_BASE) +#define NRF_SWI2 ((NRF_SWI_Type *) NRF_SWI2_BASE) +#define NRF_SWI3 ((NRF_SWI_Type *) NRF_SWI3_BASE) +#define NRF_SWI4 ((NRF_SWI_Type *) NRF_SWI4_BASE) +#define NRF_SWI5 ((NRF_SWI_Type *) NRF_SWI5_BASE) +#define NRF_PWM0 ((NRF_PWM_Type *) NRF_PWM0_BASE) +#define NRF_PDM ((NRF_PDM_Type *) NRF_PDM_BASE) +#define NRF_NVMC ((NRF_NVMC_Type *) NRF_NVMC_BASE) +#define NRF_PPI ((NRF_PPI_Type *) NRF_PPI_BASE) +#define NRF_P0 ((NRF_GPIO_Type *) NRF_P0_BASE) + + +/** @} */ /* End of group Device_Peripheral_Registers */ +/** @} */ /* End of group nrf52810 */ +/** @} */ /* End of group Nordic Semiconductor */ + +#ifdef __cplusplus +} +#endif + + +#endif /* nrf52810_H */ + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52810_bitfields.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52810_bitfields.h new file mode 100644 index 00000000000..403654961bd --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52810_bitfields.h @@ -0,0 +1,10257 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +#ifndef __NRF52810_BITS_H +#define __NRF52810_BITS_H + +/*lint ++flb "Enter library region" */ + +/* Peripheral: AAR */ +/* Description: Accelerated Address Resolver */ + +/* Register: AAR_TASKS_START */ +/* Description: Start resolving addresses based on IRKs specified in the IRK data structure */ + +/* Bit 0 : */ +#define AAR_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define AAR_TASKS_START_TASKS_START_Msk (0x1UL << AAR_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: AAR_TASKS_STOP */ +/* Description: Stop resolving addresses */ + +/* Bit 0 : */ +#define AAR_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define AAR_TASKS_STOP_TASKS_STOP_Msk (0x1UL << AAR_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: AAR_EVENTS_END */ +/* Description: Address resolution procedure complete */ + +/* Bit 0 : */ +#define AAR_EVENTS_END_EVENTS_END_Pos (0UL) /*!< Position of EVENTS_END field. */ +#define AAR_EVENTS_END_EVENTS_END_Msk (0x1UL << AAR_EVENTS_END_EVENTS_END_Pos) /*!< Bit mask of EVENTS_END field. */ + +/* Register: AAR_EVENTS_RESOLVED */ +/* Description: Address resolved */ + +/* Bit 0 : */ +#define AAR_EVENTS_RESOLVED_EVENTS_RESOLVED_Pos (0UL) /*!< Position of EVENTS_RESOLVED field. */ +#define AAR_EVENTS_RESOLVED_EVENTS_RESOLVED_Msk (0x1UL << AAR_EVENTS_RESOLVED_EVENTS_RESOLVED_Pos) /*!< Bit mask of EVENTS_RESOLVED field. */ + +/* Register: AAR_EVENTS_NOTRESOLVED */ +/* Description: Address not resolved */ + +/* Bit 0 : */ +#define AAR_EVENTS_NOTRESOLVED_EVENTS_NOTRESOLVED_Pos (0UL) /*!< Position of EVENTS_NOTRESOLVED field. */ +#define AAR_EVENTS_NOTRESOLVED_EVENTS_NOTRESOLVED_Msk (0x1UL << AAR_EVENTS_NOTRESOLVED_EVENTS_NOTRESOLVED_Pos) /*!< Bit mask of EVENTS_NOTRESOLVED field. */ + +/* Register: AAR_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 2 : Write '1' to Enable interrupt for NOTRESOLVED event */ +#define AAR_INTENSET_NOTRESOLVED_Pos (2UL) /*!< Position of NOTRESOLVED field. */ +#define AAR_INTENSET_NOTRESOLVED_Msk (0x1UL << AAR_INTENSET_NOTRESOLVED_Pos) /*!< Bit mask of NOTRESOLVED field. */ +#define AAR_INTENSET_NOTRESOLVED_Disabled (0UL) /*!< Read: Disabled */ +#define AAR_INTENSET_NOTRESOLVED_Enabled (1UL) /*!< Read: Enabled */ +#define AAR_INTENSET_NOTRESOLVED_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for RESOLVED event */ +#define AAR_INTENSET_RESOLVED_Pos (1UL) /*!< Position of RESOLVED field. */ +#define AAR_INTENSET_RESOLVED_Msk (0x1UL << AAR_INTENSET_RESOLVED_Pos) /*!< Bit mask of RESOLVED field. */ +#define AAR_INTENSET_RESOLVED_Disabled (0UL) /*!< Read: Disabled */ +#define AAR_INTENSET_RESOLVED_Enabled (1UL) /*!< Read: Enabled */ +#define AAR_INTENSET_RESOLVED_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for END event */ +#define AAR_INTENSET_END_Pos (0UL) /*!< Position of END field. */ +#define AAR_INTENSET_END_Msk (0x1UL << AAR_INTENSET_END_Pos) /*!< Bit mask of END field. */ +#define AAR_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ +#define AAR_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ +#define AAR_INTENSET_END_Set (1UL) /*!< Enable */ + +/* Register: AAR_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 2 : Write '1' to Disable interrupt for NOTRESOLVED event */ +#define AAR_INTENCLR_NOTRESOLVED_Pos (2UL) /*!< Position of NOTRESOLVED field. */ +#define AAR_INTENCLR_NOTRESOLVED_Msk (0x1UL << AAR_INTENCLR_NOTRESOLVED_Pos) /*!< Bit mask of NOTRESOLVED field. */ +#define AAR_INTENCLR_NOTRESOLVED_Disabled (0UL) /*!< Read: Disabled */ +#define AAR_INTENCLR_NOTRESOLVED_Enabled (1UL) /*!< Read: Enabled */ +#define AAR_INTENCLR_NOTRESOLVED_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for RESOLVED event */ +#define AAR_INTENCLR_RESOLVED_Pos (1UL) /*!< Position of RESOLVED field. */ +#define AAR_INTENCLR_RESOLVED_Msk (0x1UL << AAR_INTENCLR_RESOLVED_Pos) /*!< Bit mask of RESOLVED field. */ +#define AAR_INTENCLR_RESOLVED_Disabled (0UL) /*!< Read: Disabled */ +#define AAR_INTENCLR_RESOLVED_Enabled (1UL) /*!< Read: Enabled */ +#define AAR_INTENCLR_RESOLVED_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for END event */ +#define AAR_INTENCLR_END_Pos (0UL) /*!< Position of END field. */ +#define AAR_INTENCLR_END_Msk (0x1UL << AAR_INTENCLR_END_Pos) /*!< Bit mask of END field. */ +#define AAR_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ +#define AAR_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ +#define AAR_INTENCLR_END_Clear (1UL) /*!< Disable */ + +/* Register: AAR_STATUS */ +/* Description: Resolution status */ + +/* Bits 3..0 : The IRK that was used last time an address was resolved */ +#define AAR_STATUS_STATUS_Pos (0UL) /*!< Position of STATUS field. */ +#define AAR_STATUS_STATUS_Msk (0xFUL << AAR_STATUS_STATUS_Pos) /*!< Bit mask of STATUS field. */ + +/* Register: AAR_ENABLE */ +/* Description: Enable AAR */ + +/* Bits 1..0 : Enable or disable AAR */ +#define AAR_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define AAR_ENABLE_ENABLE_Msk (0x3UL << AAR_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define AAR_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ +#define AAR_ENABLE_ENABLE_Enabled (3UL) /*!< Enable */ + +/* Register: AAR_NIRK */ +/* Description: Number of IRKs */ + +/* Bits 4..0 : Number of Identity root keys available in the IRK data structure */ +#define AAR_NIRK_NIRK_Pos (0UL) /*!< Position of NIRK field. */ +#define AAR_NIRK_NIRK_Msk (0x1FUL << AAR_NIRK_NIRK_Pos) /*!< Bit mask of NIRK field. */ + +/* Register: AAR_IRKPTR */ +/* Description: Pointer to IRK data structure */ + +/* Bits 31..0 : Pointer to the IRK data structure */ +#define AAR_IRKPTR_IRKPTR_Pos (0UL) /*!< Position of IRKPTR field. */ +#define AAR_IRKPTR_IRKPTR_Msk (0xFFFFFFFFUL << AAR_IRKPTR_IRKPTR_Pos) /*!< Bit mask of IRKPTR field. */ + +/* Register: AAR_ADDRPTR */ +/* Description: Pointer to the resolvable address */ + +/* Bits 31..0 : Pointer to the resolvable address (6-bytes) */ +#define AAR_ADDRPTR_ADDRPTR_Pos (0UL) /*!< Position of ADDRPTR field. */ +#define AAR_ADDRPTR_ADDRPTR_Msk (0xFFFFFFFFUL << AAR_ADDRPTR_ADDRPTR_Pos) /*!< Bit mask of ADDRPTR field. */ + +/* Register: AAR_SCRATCHPTR */ +/* Description: Pointer to data area used for temporary storage */ + +/* Bits 31..0 : Pointer to a scratch data area used for temporary storage during resolution.A space of minimum 3 bytes must be reserved. */ +#define AAR_SCRATCHPTR_SCRATCHPTR_Pos (0UL) /*!< Position of SCRATCHPTR field. */ +#define AAR_SCRATCHPTR_SCRATCHPTR_Msk (0xFFFFFFFFUL << AAR_SCRATCHPTR_SCRATCHPTR_Pos) /*!< Bit mask of SCRATCHPTR field. */ + + +/* Peripheral: BPROT */ +/* Description: Block Protect */ + +/* Register: BPROT_CONFIG0 */ +/* Description: Block protect configuration register 0 */ + +/* Bit 31 : Enable protection for region 31. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION31_Pos (31UL) /*!< Position of REGION31 field. */ +#define BPROT_CONFIG0_REGION31_Msk (0x1UL << BPROT_CONFIG0_REGION31_Pos) /*!< Bit mask of REGION31 field. */ +#define BPROT_CONFIG0_REGION31_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION31_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 30 : Enable protection for region 30. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION30_Pos (30UL) /*!< Position of REGION30 field. */ +#define BPROT_CONFIG0_REGION30_Msk (0x1UL << BPROT_CONFIG0_REGION30_Pos) /*!< Bit mask of REGION30 field. */ +#define BPROT_CONFIG0_REGION30_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION30_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 29 : Enable protection for region 29. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION29_Pos (29UL) /*!< Position of REGION29 field. */ +#define BPROT_CONFIG0_REGION29_Msk (0x1UL << BPROT_CONFIG0_REGION29_Pos) /*!< Bit mask of REGION29 field. */ +#define BPROT_CONFIG0_REGION29_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION29_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 28 : Enable protection for region 28. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION28_Pos (28UL) /*!< Position of REGION28 field. */ +#define BPROT_CONFIG0_REGION28_Msk (0x1UL << BPROT_CONFIG0_REGION28_Pos) /*!< Bit mask of REGION28 field. */ +#define BPROT_CONFIG0_REGION28_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION28_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 27 : Enable protection for region 27. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION27_Pos (27UL) /*!< Position of REGION27 field. */ +#define BPROT_CONFIG0_REGION27_Msk (0x1UL << BPROT_CONFIG0_REGION27_Pos) /*!< Bit mask of REGION27 field. */ +#define BPROT_CONFIG0_REGION27_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION27_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 26 : Enable protection for region 26. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION26_Pos (26UL) /*!< Position of REGION26 field. */ +#define BPROT_CONFIG0_REGION26_Msk (0x1UL << BPROT_CONFIG0_REGION26_Pos) /*!< Bit mask of REGION26 field. */ +#define BPROT_CONFIG0_REGION26_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION26_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 25 : Enable protection for region 25. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION25_Pos (25UL) /*!< Position of REGION25 field. */ +#define BPROT_CONFIG0_REGION25_Msk (0x1UL << BPROT_CONFIG0_REGION25_Pos) /*!< Bit mask of REGION25 field. */ +#define BPROT_CONFIG0_REGION25_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION25_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 24 : Enable protection for region 24. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION24_Pos (24UL) /*!< Position of REGION24 field. */ +#define BPROT_CONFIG0_REGION24_Msk (0x1UL << BPROT_CONFIG0_REGION24_Pos) /*!< Bit mask of REGION24 field. */ +#define BPROT_CONFIG0_REGION24_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION24_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 23 : Enable protection for region 23. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION23_Pos (23UL) /*!< Position of REGION23 field. */ +#define BPROT_CONFIG0_REGION23_Msk (0x1UL << BPROT_CONFIG0_REGION23_Pos) /*!< Bit mask of REGION23 field. */ +#define BPROT_CONFIG0_REGION23_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION23_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 22 : Enable protection for region 22. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION22_Pos (22UL) /*!< Position of REGION22 field. */ +#define BPROT_CONFIG0_REGION22_Msk (0x1UL << BPROT_CONFIG0_REGION22_Pos) /*!< Bit mask of REGION22 field. */ +#define BPROT_CONFIG0_REGION22_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION22_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 21 : Enable protection for region 21. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION21_Pos (21UL) /*!< Position of REGION21 field. */ +#define BPROT_CONFIG0_REGION21_Msk (0x1UL << BPROT_CONFIG0_REGION21_Pos) /*!< Bit mask of REGION21 field. */ +#define BPROT_CONFIG0_REGION21_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION21_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 20 : Enable protection for region 20. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION20_Pos (20UL) /*!< Position of REGION20 field. */ +#define BPROT_CONFIG0_REGION20_Msk (0x1UL << BPROT_CONFIG0_REGION20_Pos) /*!< Bit mask of REGION20 field. */ +#define BPROT_CONFIG0_REGION20_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION20_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 19 : Enable protection for region 19. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION19_Pos (19UL) /*!< Position of REGION19 field. */ +#define BPROT_CONFIG0_REGION19_Msk (0x1UL << BPROT_CONFIG0_REGION19_Pos) /*!< Bit mask of REGION19 field. */ +#define BPROT_CONFIG0_REGION19_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION19_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 18 : Enable protection for region 18. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION18_Pos (18UL) /*!< Position of REGION18 field. */ +#define BPROT_CONFIG0_REGION18_Msk (0x1UL << BPROT_CONFIG0_REGION18_Pos) /*!< Bit mask of REGION18 field. */ +#define BPROT_CONFIG0_REGION18_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION18_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 17 : Enable protection for region 17. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION17_Pos (17UL) /*!< Position of REGION17 field. */ +#define BPROT_CONFIG0_REGION17_Msk (0x1UL << BPROT_CONFIG0_REGION17_Pos) /*!< Bit mask of REGION17 field. */ +#define BPROT_CONFIG0_REGION17_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION17_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 16 : Enable protection for region 16. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION16_Pos (16UL) /*!< Position of REGION16 field. */ +#define BPROT_CONFIG0_REGION16_Msk (0x1UL << BPROT_CONFIG0_REGION16_Pos) /*!< Bit mask of REGION16 field. */ +#define BPROT_CONFIG0_REGION16_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION16_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 15 : Enable protection for region 15. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION15_Pos (15UL) /*!< Position of REGION15 field. */ +#define BPROT_CONFIG0_REGION15_Msk (0x1UL << BPROT_CONFIG0_REGION15_Pos) /*!< Bit mask of REGION15 field. */ +#define BPROT_CONFIG0_REGION15_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION15_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 14 : Enable protection for region 14. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION14_Pos (14UL) /*!< Position of REGION14 field. */ +#define BPROT_CONFIG0_REGION14_Msk (0x1UL << BPROT_CONFIG0_REGION14_Pos) /*!< Bit mask of REGION14 field. */ +#define BPROT_CONFIG0_REGION14_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION14_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 13 : Enable protection for region 13. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION13_Pos (13UL) /*!< Position of REGION13 field. */ +#define BPROT_CONFIG0_REGION13_Msk (0x1UL << BPROT_CONFIG0_REGION13_Pos) /*!< Bit mask of REGION13 field. */ +#define BPROT_CONFIG0_REGION13_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION13_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 12 : Enable protection for region 12. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION12_Pos (12UL) /*!< Position of REGION12 field. */ +#define BPROT_CONFIG0_REGION12_Msk (0x1UL << BPROT_CONFIG0_REGION12_Pos) /*!< Bit mask of REGION12 field. */ +#define BPROT_CONFIG0_REGION12_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION12_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 11 : Enable protection for region 11. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION11_Pos (11UL) /*!< Position of REGION11 field. */ +#define BPROT_CONFIG0_REGION11_Msk (0x1UL << BPROT_CONFIG0_REGION11_Pos) /*!< Bit mask of REGION11 field. */ +#define BPROT_CONFIG0_REGION11_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION11_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 10 : Enable protection for region 10. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION10_Pos (10UL) /*!< Position of REGION10 field. */ +#define BPROT_CONFIG0_REGION10_Msk (0x1UL << BPROT_CONFIG0_REGION10_Pos) /*!< Bit mask of REGION10 field. */ +#define BPROT_CONFIG0_REGION10_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION10_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 9 : Enable protection for region 9. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION9_Pos (9UL) /*!< Position of REGION9 field. */ +#define BPROT_CONFIG0_REGION9_Msk (0x1UL << BPROT_CONFIG0_REGION9_Pos) /*!< Bit mask of REGION9 field. */ +#define BPROT_CONFIG0_REGION9_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION9_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 8 : Enable protection for region 8. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION8_Pos (8UL) /*!< Position of REGION8 field. */ +#define BPROT_CONFIG0_REGION8_Msk (0x1UL << BPROT_CONFIG0_REGION8_Pos) /*!< Bit mask of REGION8 field. */ +#define BPROT_CONFIG0_REGION8_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION8_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 7 : Enable protection for region 7. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION7_Pos (7UL) /*!< Position of REGION7 field. */ +#define BPROT_CONFIG0_REGION7_Msk (0x1UL << BPROT_CONFIG0_REGION7_Pos) /*!< Bit mask of REGION7 field. */ +#define BPROT_CONFIG0_REGION7_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION7_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 6 : Enable protection for region 6. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION6_Pos (6UL) /*!< Position of REGION6 field. */ +#define BPROT_CONFIG0_REGION6_Msk (0x1UL << BPROT_CONFIG0_REGION6_Pos) /*!< Bit mask of REGION6 field. */ +#define BPROT_CONFIG0_REGION6_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION6_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 5 : Enable protection for region 5. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION5_Pos (5UL) /*!< Position of REGION5 field. */ +#define BPROT_CONFIG0_REGION5_Msk (0x1UL << BPROT_CONFIG0_REGION5_Pos) /*!< Bit mask of REGION5 field. */ +#define BPROT_CONFIG0_REGION5_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION5_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 4 : Enable protection for region 4. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION4_Pos (4UL) /*!< Position of REGION4 field. */ +#define BPROT_CONFIG0_REGION4_Msk (0x1UL << BPROT_CONFIG0_REGION4_Pos) /*!< Bit mask of REGION4 field. */ +#define BPROT_CONFIG0_REGION4_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION4_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 3 : Enable protection for region 3. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION3_Pos (3UL) /*!< Position of REGION3 field. */ +#define BPROT_CONFIG0_REGION3_Msk (0x1UL << BPROT_CONFIG0_REGION3_Pos) /*!< Bit mask of REGION3 field. */ +#define BPROT_CONFIG0_REGION3_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION3_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 2 : Enable protection for region 2. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION2_Pos (2UL) /*!< Position of REGION2 field. */ +#define BPROT_CONFIG0_REGION2_Msk (0x1UL << BPROT_CONFIG0_REGION2_Pos) /*!< Bit mask of REGION2 field. */ +#define BPROT_CONFIG0_REGION2_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION2_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 1 : Enable protection for region 1. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION1_Pos (1UL) /*!< Position of REGION1 field. */ +#define BPROT_CONFIG0_REGION1_Msk (0x1UL << BPROT_CONFIG0_REGION1_Pos) /*!< Bit mask of REGION1 field. */ +#define BPROT_CONFIG0_REGION1_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION1_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 0 : Enable protection for region 0. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION0_Pos (0UL) /*!< Position of REGION0 field. */ +#define BPROT_CONFIG0_REGION0_Msk (0x1UL << BPROT_CONFIG0_REGION0_Pos) /*!< Bit mask of REGION0 field. */ +#define BPROT_CONFIG0_REGION0_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION0_Enabled (1UL) /*!< Protection enabled */ + +/* Register: BPROT_CONFIG1 */ +/* Description: Block protect configuration register 1 */ + +/* Bit 15 : Enable protection for region 47. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION47_Pos (15UL) /*!< Position of REGION47 field. */ +#define BPROT_CONFIG1_REGION47_Msk (0x1UL << BPROT_CONFIG1_REGION47_Pos) /*!< Bit mask of REGION47 field. */ +#define BPROT_CONFIG1_REGION47_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION47_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 14 : Enable protection for region 46. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION46_Pos (14UL) /*!< Position of REGION46 field. */ +#define BPROT_CONFIG1_REGION46_Msk (0x1UL << BPROT_CONFIG1_REGION46_Pos) /*!< Bit mask of REGION46 field. */ +#define BPROT_CONFIG1_REGION46_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION46_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 13 : Enable protection for region 45. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION45_Pos (13UL) /*!< Position of REGION45 field. */ +#define BPROT_CONFIG1_REGION45_Msk (0x1UL << BPROT_CONFIG1_REGION45_Pos) /*!< Bit mask of REGION45 field. */ +#define BPROT_CONFIG1_REGION45_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION45_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 12 : Enable protection for region 44. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION44_Pos (12UL) /*!< Position of REGION44 field. */ +#define BPROT_CONFIG1_REGION44_Msk (0x1UL << BPROT_CONFIG1_REGION44_Pos) /*!< Bit mask of REGION44 field. */ +#define BPROT_CONFIG1_REGION44_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION44_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 11 : Enable protection for region 43. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION43_Pos (11UL) /*!< Position of REGION43 field. */ +#define BPROT_CONFIG1_REGION43_Msk (0x1UL << BPROT_CONFIG1_REGION43_Pos) /*!< Bit mask of REGION43 field. */ +#define BPROT_CONFIG1_REGION43_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION43_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 10 : Enable protection for region 42. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION42_Pos (10UL) /*!< Position of REGION42 field. */ +#define BPROT_CONFIG1_REGION42_Msk (0x1UL << BPROT_CONFIG1_REGION42_Pos) /*!< Bit mask of REGION42 field. */ +#define BPROT_CONFIG1_REGION42_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION42_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 9 : Enable protection for region 41. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION41_Pos (9UL) /*!< Position of REGION41 field. */ +#define BPROT_CONFIG1_REGION41_Msk (0x1UL << BPROT_CONFIG1_REGION41_Pos) /*!< Bit mask of REGION41 field. */ +#define BPROT_CONFIG1_REGION41_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION41_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 8 : Enable protection for region 40. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION40_Pos (8UL) /*!< Position of REGION40 field. */ +#define BPROT_CONFIG1_REGION40_Msk (0x1UL << BPROT_CONFIG1_REGION40_Pos) /*!< Bit mask of REGION40 field. */ +#define BPROT_CONFIG1_REGION40_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION40_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 7 : Enable protection for region 39. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION39_Pos (7UL) /*!< Position of REGION39 field. */ +#define BPROT_CONFIG1_REGION39_Msk (0x1UL << BPROT_CONFIG1_REGION39_Pos) /*!< Bit mask of REGION39 field. */ +#define BPROT_CONFIG1_REGION39_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION39_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 6 : Enable protection for region 38. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION38_Pos (6UL) /*!< Position of REGION38 field. */ +#define BPROT_CONFIG1_REGION38_Msk (0x1UL << BPROT_CONFIG1_REGION38_Pos) /*!< Bit mask of REGION38 field. */ +#define BPROT_CONFIG1_REGION38_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION38_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 5 : Enable protection for region 37. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION37_Pos (5UL) /*!< Position of REGION37 field. */ +#define BPROT_CONFIG1_REGION37_Msk (0x1UL << BPROT_CONFIG1_REGION37_Pos) /*!< Bit mask of REGION37 field. */ +#define BPROT_CONFIG1_REGION37_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION37_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 4 : Enable protection for region 36. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION36_Pos (4UL) /*!< Position of REGION36 field. */ +#define BPROT_CONFIG1_REGION36_Msk (0x1UL << BPROT_CONFIG1_REGION36_Pos) /*!< Bit mask of REGION36 field. */ +#define BPROT_CONFIG1_REGION36_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION36_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 3 : Enable protection for region 35. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION35_Pos (3UL) /*!< Position of REGION35 field. */ +#define BPROT_CONFIG1_REGION35_Msk (0x1UL << BPROT_CONFIG1_REGION35_Pos) /*!< Bit mask of REGION35 field. */ +#define BPROT_CONFIG1_REGION35_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION35_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 2 : Enable protection for region 34. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION34_Pos (2UL) /*!< Position of REGION34 field. */ +#define BPROT_CONFIG1_REGION34_Msk (0x1UL << BPROT_CONFIG1_REGION34_Pos) /*!< Bit mask of REGION34 field. */ +#define BPROT_CONFIG1_REGION34_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION34_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 1 : Enable protection for region 33. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION33_Pos (1UL) /*!< Position of REGION33 field. */ +#define BPROT_CONFIG1_REGION33_Msk (0x1UL << BPROT_CONFIG1_REGION33_Pos) /*!< Bit mask of REGION33 field. */ +#define BPROT_CONFIG1_REGION33_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION33_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 0 : Enable protection for region 32. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION32_Pos (0UL) /*!< Position of REGION32 field. */ +#define BPROT_CONFIG1_REGION32_Msk (0x1UL << BPROT_CONFIG1_REGION32_Pos) /*!< Bit mask of REGION32 field. */ +#define BPROT_CONFIG1_REGION32_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION32_Enabled (1UL) /*!< Protection enabled */ + +/* Register: BPROT_DISABLEINDEBUG */ +/* Description: Disable protection mechanism in debug mode */ + +/* Bit 0 : Disable the protection mechanism for NVM regions while in debug mode. This register will only disable the protection mechanism if the device is in debug mode. */ +#define BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Pos (0UL) /*!< Position of DISABLEINDEBUG field. */ +#define BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Msk (0x1UL << BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Pos) /*!< Bit mask of DISABLEINDEBUG field. */ +#define BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Enabled (0UL) /*!< Enabled in debug */ +#define BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Disabled (1UL) /*!< Disabled in debug */ + + +/* Peripheral: CCM */ +/* Description: AES CCM Mode Encryption */ + +/* Register: CCM_TASKS_KSGEN */ +/* Description: Start generation of key-stream. This operation will stop by itself when completed. */ + +/* Bit 0 : */ +#define CCM_TASKS_KSGEN_TASKS_KSGEN_Pos (0UL) /*!< Position of TASKS_KSGEN field. */ +#define CCM_TASKS_KSGEN_TASKS_KSGEN_Msk (0x1UL << CCM_TASKS_KSGEN_TASKS_KSGEN_Pos) /*!< Bit mask of TASKS_KSGEN field. */ + +/* Register: CCM_TASKS_CRYPT */ +/* Description: Start encryption/decryption. This operation will stop by itself when completed. */ + +/* Bit 0 : */ +#define CCM_TASKS_CRYPT_TASKS_CRYPT_Pos (0UL) /*!< Position of TASKS_CRYPT field. */ +#define CCM_TASKS_CRYPT_TASKS_CRYPT_Msk (0x1UL << CCM_TASKS_CRYPT_TASKS_CRYPT_Pos) /*!< Bit mask of TASKS_CRYPT field. */ + +/* Register: CCM_TASKS_STOP */ +/* Description: Stop encryption/decryption */ + +/* Bit 0 : */ +#define CCM_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define CCM_TASKS_STOP_TASKS_STOP_Msk (0x1UL << CCM_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: CCM_TASKS_RATEOVERRIDE */ +/* Description: Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption */ + +/* Bit 0 : */ +#define CCM_TASKS_RATEOVERRIDE_TASKS_RATEOVERRIDE_Pos (0UL) /*!< Position of TASKS_RATEOVERRIDE field. */ +#define CCM_TASKS_RATEOVERRIDE_TASKS_RATEOVERRIDE_Msk (0x1UL << CCM_TASKS_RATEOVERRIDE_TASKS_RATEOVERRIDE_Pos) /*!< Bit mask of TASKS_RATEOVERRIDE field. */ + +/* Register: CCM_EVENTS_ENDKSGEN */ +/* Description: Key-stream generation complete */ + +/* Bit 0 : */ +#define CCM_EVENTS_ENDKSGEN_EVENTS_ENDKSGEN_Pos (0UL) /*!< Position of EVENTS_ENDKSGEN field. */ +#define CCM_EVENTS_ENDKSGEN_EVENTS_ENDKSGEN_Msk (0x1UL << CCM_EVENTS_ENDKSGEN_EVENTS_ENDKSGEN_Pos) /*!< Bit mask of EVENTS_ENDKSGEN field. */ + +/* Register: CCM_EVENTS_ENDCRYPT */ +/* Description: Encrypt/decrypt complete */ + +/* Bit 0 : */ +#define CCM_EVENTS_ENDCRYPT_EVENTS_ENDCRYPT_Pos (0UL) /*!< Position of EVENTS_ENDCRYPT field. */ +#define CCM_EVENTS_ENDCRYPT_EVENTS_ENDCRYPT_Msk (0x1UL << CCM_EVENTS_ENDCRYPT_EVENTS_ENDCRYPT_Pos) /*!< Bit mask of EVENTS_ENDCRYPT field. */ + +/* Register: CCM_EVENTS_ERROR */ +/* Description: Deprecated register - CCM error event */ + +/* Bit 0 : */ +#define CCM_EVENTS_ERROR_EVENTS_ERROR_Pos (0UL) /*!< Position of EVENTS_ERROR field. */ +#define CCM_EVENTS_ERROR_EVENTS_ERROR_Msk (0x1UL << CCM_EVENTS_ERROR_EVENTS_ERROR_Pos) /*!< Bit mask of EVENTS_ERROR field. */ + +/* Register: CCM_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 0 : Shortcut between ENDKSGEN event and CRYPT task */ +#define CCM_SHORTS_ENDKSGEN_CRYPT_Pos (0UL) /*!< Position of ENDKSGEN_CRYPT field. */ +#define CCM_SHORTS_ENDKSGEN_CRYPT_Msk (0x1UL << CCM_SHORTS_ENDKSGEN_CRYPT_Pos) /*!< Bit mask of ENDKSGEN_CRYPT field. */ +#define CCM_SHORTS_ENDKSGEN_CRYPT_Disabled (0UL) /*!< Disable shortcut */ +#define CCM_SHORTS_ENDKSGEN_CRYPT_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: CCM_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 2 : Write '1' to Enable interrupt for ERROR event */ +#define CCM_INTENSET_ERROR_Pos (2UL) /*!< Position of ERROR field. */ +#define CCM_INTENSET_ERROR_Msk (0x1UL << CCM_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define CCM_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define CCM_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define CCM_INTENSET_ERROR_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for ENDCRYPT event */ +#define CCM_INTENSET_ENDCRYPT_Pos (1UL) /*!< Position of ENDCRYPT field. */ +#define CCM_INTENSET_ENDCRYPT_Msk (0x1UL << CCM_INTENSET_ENDCRYPT_Pos) /*!< Bit mask of ENDCRYPT field. */ +#define CCM_INTENSET_ENDCRYPT_Disabled (0UL) /*!< Read: Disabled */ +#define CCM_INTENSET_ENDCRYPT_Enabled (1UL) /*!< Read: Enabled */ +#define CCM_INTENSET_ENDCRYPT_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for ENDKSGEN event */ +#define CCM_INTENSET_ENDKSGEN_Pos (0UL) /*!< Position of ENDKSGEN field. */ +#define CCM_INTENSET_ENDKSGEN_Msk (0x1UL << CCM_INTENSET_ENDKSGEN_Pos) /*!< Bit mask of ENDKSGEN field. */ +#define CCM_INTENSET_ENDKSGEN_Disabled (0UL) /*!< Read: Disabled */ +#define CCM_INTENSET_ENDKSGEN_Enabled (1UL) /*!< Read: Enabled */ +#define CCM_INTENSET_ENDKSGEN_Set (1UL) /*!< Enable */ + +/* Register: CCM_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 2 : Write '1' to Disable interrupt for ERROR event */ +#define CCM_INTENCLR_ERROR_Pos (2UL) /*!< Position of ERROR field. */ +#define CCM_INTENCLR_ERROR_Msk (0x1UL << CCM_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define CCM_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define CCM_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define CCM_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for ENDCRYPT event */ +#define CCM_INTENCLR_ENDCRYPT_Pos (1UL) /*!< Position of ENDCRYPT field. */ +#define CCM_INTENCLR_ENDCRYPT_Msk (0x1UL << CCM_INTENCLR_ENDCRYPT_Pos) /*!< Bit mask of ENDCRYPT field. */ +#define CCM_INTENCLR_ENDCRYPT_Disabled (0UL) /*!< Read: Disabled */ +#define CCM_INTENCLR_ENDCRYPT_Enabled (1UL) /*!< Read: Enabled */ +#define CCM_INTENCLR_ENDCRYPT_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for ENDKSGEN event */ +#define CCM_INTENCLR_ENDKSGEN_Pos (0UL) /*!< Position of ENDKSGEN field. */ +#define CCM_INTENCLR_ENDKSGEN_Msk (0x1UL << CCM_INTENCLR_ENDKSGEN_Pos) /*!< Bit mask of ENDKSGEN field. */ +#define CCM_INTENCLR_ENDKSGEN_Disabled (0UL) /*!< Read: Disabled */ +#define CCM_INTENCLR_ENDKSGEN_Enabled (1UL) /*!< Read: Enabled */ +#define CCM_INTENCLR_ENDKSGEN_Clear (1UL) /*!< Disable */ + +/* Register: CCM_MICSTATUS */ +/* Description: MIC check result */ + +/* Bit 0 : The result of the MIC check performed during the previous decryption operation */ +#define CCM_MICSTATUS_MICSTATUS_Pos (0UL) /*!< Position of MICSTATUS field. */ +#define CCM_MICSTATUS_MICSTATUS_Msk (0x1UL << CCM_MICSTATUS_MICSTATUS_Pos) /*!< Bit mask of MICSTATUS field. */ +#define CCM_MICSTATUS_MICSTATUS_CheckFailed (0UL) /*!< MIC check failed */ +#define CCM_MICSTATUS_MICSTATUS_CheckPassed (1UL) /*!< MIC check passed */ + +/* Register: CCM_ENABLE */ +/* Description: Enable */ + +/* Bits 1..0 : Enable or disable CCM */ +#define CCM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define CCM_ENABLE_ENABLE_Msk (0x3UL << CCM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define CCM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ +#define CCM_ENABLE_ENABLE_Enabled (2UL) /*!< Enable */ + +/* Register: CCM_MODE */ +/* Description: Operation mode */ + +/* Bit 24 : Packet length configuration */ +#define CCM_MODE_LENGTH_Pos (24UL) /*!< Position of LENGTH field. */ +#define CCM_MODE_LENGTH_Msk (0x1UL << CCM_MODE_LENGTH_Pos) /*!< Bit mask of LENGTH field. */ +#define CCM_MODE_LENGTH_Default (0UL) /*!< Default length. Effective length of LENGTH field in encrypted/decrypted packet is 5 bits. A key-stream for packet payloads up to 27 bytes will be generated. */ +#define CCM_MODE_LENGTH_Extended (1UL) /*!< Extended length. Effective length of LENGTH field in encrypted/decrypted packet is 8 bits. A key-stream for packet payloads up to MAXPACKETSIZE bytes will be generated. */ + +/* Bits 17..16 : Radio data rate that the CCM shall run synchronous with */ +#define CCM_MODE_DATARATE_Pos (16UL) /*!< Position of DATARATE field. */ +#define CCM_MODE_DATARATE_Msk (0x3UL << CCM_MODE_DATARATE_Pos) /*!< Bit mask of DATARATE field. */ +#define CCM_MODE_DATARATE_1Mbit (0UL) /*!< 1 Mbps */ +#define CCM_MODE_DATARATE_2Mbit (1UL) /*!< 2 Mbps */ +#define CCM_MODE_DATARATE_125Kbps (2UL) /*!< 125 Kbps */ +#define CCM_MODE_DATARATE_500Kbps (3UL) /*!< 500 Kbps */ + +/* Bit 0 : The mode of operation to be used. The settings in this register apply whenever either the KSGEN or CRYPT tasks are triggered. */ +#define CCM_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ +#define CCM_MODE_MODE_Msk (0x1UL << CCM_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ +#define CCM_MODE_MODE_Encryption (0UL) /*!< AES CCM packet encryption mode */ +#define CCM_MODE_MODE_Decryption (1UL) /*!< AES CCM packet decryption mode */ + +/* Register: CCM_CNFPTR */ +/* Description: Pointer to data structure holding AES key and NONCE vector */ + +/* Bits 31..0 : Pointer to the data structure holding the AES key and the CCM NONCE vector (see Table 1 CCM data structure overview) */ +#define CCM_CNFPTR_CNFPTR_Pos (0UL) /*!< Position of CNFPTR field. */ +#define CCM_CNFPTR_CNFPTR_Msk (0xFFFFFFFFUL << CCM_CNFPTR_CNFPTR_Pos) /*!< Bit mask of CNFPTR field. */ + +/* Register: CCM_INPTR */ +/* Description: Input pointer */ + +/* Bits 31..0 : Input pointer */ +#define CCM_INPTR_INPTR_Pos (0UL) /*!< Position of INPTR field. */ +#define CCM_INPTR_INPTR_Msk (0xFFFFFFFFUL << CCM_INPTR_INPTR_Pos) /*!< Bit mask of INPTR field. */ + +/* Register: CCM_OUTPTR */ +/* Description: Output pointer */ + +/* Bits 31..0 : Output pointer */ +#define CCM_OUTPTR_OUTPTR_Pos (0UL) /*!< Position of OUTPTR field. */ +#define CCM_OUTPTR_OUTPTR_Msk (0xFFFFFFFFUL << CCM_OUTPTR_OUTPTR_Pos) /*!< Bit mask of OUTPTR field. */ + +/* Register: CCM_SCRATCHPTR */ +/* Description: Pointer to data area used for temporary storage */ + +/* Bits 31..0 : Pointer to a scratch data area used for temporary storage during key-stream generation, MIC generation and encryption/decryption. */ +#define CCM_SCRATCHPTR_SCRATCHPTR_Pos (0UL) /*!< Position of SCRATCHPTR field. */ +#define CCM_SCRATCHPTR_SCRATCHPTR_Msk (0xFFFFFFFFUL << CCM_SCRATCHPTR_SCRATCHPTR_Pos) /*!< Bit mask of SCRATCHPTR field. */ + +/* Register: CCM_MAXPACKETSIZE */ +/* Description: Length of key-stream generated when MODE.LENGTH = Extended. */ + +/* Bits 7..0 : Length of key-stream generated when MODE.LENGTH = Extended. This value must be greater or equal to the subsequent packet payload to be encrypted/decrypted. */ +#define CCM_MAXPACKETSIZE_MAXPACKETSIZE_Pos (0UL) /*!< Position of MAXPACKETSIZE field. */ +#define CCM_MAXPACKETSIZE_MAXPACKETSIZE_Msk (0xFFUL << CCM_MAXPACKETSIZE_MAXPACKETSIZE_Pos) /*!< Bit mask of MAXPACKETSIZE field. */ + +/* Register: CCM_RATEOVERRIDE */ +/* Description: Data rate override setting. */ + +/* Bits 1..0 : Data rate override setting. */ +#define CCM_RATEOVERRIDE_RATEOVERRIDE_Pos (0UL) /*!< Position of RATEOVERRIDE field. */ +#define CCM_RATEOVERRIDE_RATEOVERRIDE_Msk (0x3UL << CCM_RATEOVERRIDE_RATEOVERRIDE_Pos) /*!< Bit mask of RATEOVERRIDE field. */ +#define CCM_RATEOVERRIDE_RATEOVERRIDE_1Mbit (0UL) /*!< 1 Mbps */ +#define CCM_RATEOVERRIDE_RATEOVERRIDE_2Mbit (1UL) /*!< 2 Mbps */ +#define CCM_RATEOVERRIDE_RATEOVERRIDE_125Kbps (2UL) /*!< 125 Kbps */ +#define CCM_RATEOVERRIDE_RATEOVERRIDE_500Kbps (3UL) /*!< 500 Kbps */ + + +/* Peripheral: CLOCK */ +/* Description: Clock control */ + +/* Register: CLOCK_TASKS_HFCLKSTART */ +/* Description: Start HFCLK crystal oscillator */ + +/* Bit 0 : */ +#define CLOCK_TASKS_HFCLKSTART_TASKS_HFCLKSTART_Pos (0UL) /*!< Position of TASKS_HFCLKSTART field. */ +#define CLOCK_TASKS_HFCLKSTART_TASKS_HFCLKSTART_Msk (0x1UL << CLOCK_TASKS_HFCLKSTART_TASKS_HFCLKSTART_Pos) /*!< Bit mask of TASKS_HFCLKSTART field. */ + +/* Register: CLOCK_TASKS_HFCLKSTOP */ +/* Description: Stop HFCLK crystal oscillator */ + +/* Bit 0 : */ +#define CLOCK_TASKS_HFCLKSTOP_TASKS_HFCLKSTOP_Pos (0UL) /*!< Position of TASKS_HFCLKSTOP field. */ +#define CLOCK_TASKS_HFCLKSTOP_TASKS_HFCLKSTOP_Msk (0x1UL << CLOCK_TASKS_HFCLKSTOP_TASKS_HFCLKSTOP_Pos) /*!< Bit mask of TASKS_HFCLKSTOP field. */ + +/* Register: CLOCK_TASKS_LFCLKSTART */ +/* Description: Start LFCLK source */ + +/* Bit 0 : */ +#define CLOCK_TASKS_LFCLKSTART_TASKS_LFCLKSTART_Pos (0UL) /*!< Position of TASKS_LFCLKSTART field. */ +#define CLOCK_TASKS_LFCLKSTART_TASKS_LFCLKSTART_Msk (0x1UL << CLOCK_TASKS_LFCLKSTART_TASKS_LFCLKSTART_Pos) /*!< Bit mask of TASKS_LFCLKSTART field. */ + +/* Register: CLOCK_TASKS_LFCLKSTOP */ +/* Description: Stop LFCLK source */ + +/* Bit 0 : */ +#define CLOCK_TASKS_LFCLKSTOP_TASKS_LFCLKSTOP_Pos (0UL) /*!< Position of TASKS_LFCLKSTOP field. */ +#define CLOCK_TASKS_LFCLKSTOP_TASKS_LFCLKSTOP_Msk (0x1UL << CLOCK_TASKS_LFCLKSTOP_TASKS_LFCLKSTOP_Pos) /*!< Bit mask of TASKS_LFCLKSTOP field. */ + +/* Register: CLOCK_TASKS_CAL */ +/* Description: Start calibration of LFRC oscillator */ + +/* Bit 0 : */ +#define CLOCK_TASKS_CAL_TASKS_CAL_Pos (0UL) /*!< Position of TASKS_CAL field. */ +#define CLOCK_TASKS_CAL_TASKS_CAL_Msk (0x1UL << CLOCK_TASKS_CAL_TASKS_CAL_Pos) /*!< Bit mask of TASKS_CAL field. */ + +/* Register: CLOCK_TASKS_CTSTART */ +/* Description: Start calibration timer */ + +/* Bit 0 : */ +#define CLOCK_TASKS_CTSTART_TASKS_CTSTART_Pos (0UL) /*!< Position of TASKS_CTSTART field. */ +#define CLOCK_TASKS_CTSTART_TASKS_CTSTART_Msk (0x1UL << CLOCK_TASKS_CTSTART_TASKS_CTSTART_Pos) /*!< Bit mask of TASKS_CTSTART field. */ + +/* Register: CLOCK_TASKS_CTSTOP */ +/* Description: Stop calibration timer */ + +/* Bit 0 : */ +#define CLOCK_TASKS_CTSTOP_TASKS_CTSTOP_Pos (0UL) /*!< Position of TASKS_CTSTOP field. */ +#define CLOCK_TASKS_CTSTOP_TASKS_CTSTOP_Msk (0x1UL << CLOCK_TASKS_CTSTOP_TASKS_CTSTOP_Pos) /*!< Bit mask of TASKS_CTSTOP field. */ + +/* Register: CLOCK_EVENTS_HFCLKSTARTED */ +/* Description: HFCLK oscillator started */ + +/* Bit 0 : */ +#define CLOCK_EVENTS_HFCLKSTARTED_EVENTS_HFCLKSTARTED_Pos (0UL) /*!< Position of EVENTS_HFCLKSTARTED field. */ +#define CLOCK_EVENTS_HFCLKSTARTED_EVENTS_HFCLKSTARTED_Msk (0x1UL << CLOCK_EVENTS_HFCLKSTARTED_EVENTS_HFCLKSTARTED_Pos) /*!< Bit mask of EVENTS_HFCLKSTARTED field. */ + +/* Register: CLOCK_EVENTS_LFCLKSTARTED */ +/* Description: LFCLK started */ + +/* Bit 0 : */ +#define CLOCK_EVENTS_LFCLKSTARTED_EVENTS_LFCLKSTARTED_Pos (0UL) /*!< Position of EVENTS_LFCLKSTARTED field. */ +#define CLOCK_EVENTS_LFCLKSTARTED_EVENTS_LFCLKSTARTED_Msk (0x1UL << CLOCK_EVENTS_LFCLKSTARTED_EVENTS_LFCLKSTARTED_Pos) /*!< Bit mask of EVENTS_LFCLKSTARTED field. */ + +/* Register: CLOCK_EVENTS_DONE */ +/* Description: Calibration of LFCLK RC oscillator complete event */ + +/* Bit 0 : */ +#define CLOCK_EVENTS_DONE_EVENTS_DONE_Pos (0UL) /*!< Position of EVENTS_DONE field. */ +#define CLOCK_EVENTS_DONE_EVENTS_DONE_Msk (0x1UL << CLOCK_EVENTS_DONE_EVENTS_DONE_Pos) /*!< Bit mask of EVENTS_DONE field. */ + +/* Register: CLOCK_EVENTS_CTTO */ +/* Description: Calibration timer timeout */ + +/* Bit 0 : */ +#define CLOCK_EVENTS_CTTO_EVENTS_CTTO_Pos (0UL) /*!< Position of EVENTS_CTTO field. */ +#define CLOCK_EVENTS_CTTO_EVENTS_CTTO_Msk (0x1UL << CLOCK_EVENTS_CTTO_EVENTS_CTTO_Pos) /*!< Bit mask of EVENTS_CTTO field. */ + +/* Register: CLOCK_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 4 : Write '1' to Enable interrupt for CTTO event */ +#define CLOCK_INTENSET_CTTO_Pos (4UL) /*!< Position of CTTO field. */ +#define CLOCK_INTENSET_CTTO_Msk (0x1UL << CLOCK_INTENSET_CTTO_Pos) /*!< Bit mask of CTTO field. */ +#define CLOCK_INTENSET_CTTO_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENSET_CTTO_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENSET_CTTO_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to Enable interrupt for DONE event */ +#define CLOCK_INTENSET_DONE_Pos (3UL) /*!< Position of DONE field. */ +#define CLOCK_INTENSET_DONE_Msk (0x1UL << CLOCK_INTENSET_DONE_Pos) /*!< Bit mask of DONE field. */ +#define CLOCK_INTENSET_DONE_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENSET_DONE_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENSET_DONE_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for LFCLKSTARTED event */ +#define CLOCK_INTENSET_LFCLKSTARTED_Pos (1UL) /*!< Position of LFCLKSTARTED field. */ +#define CLOCK_INTENSET_LFCLKSTARTED_Msk (0x1UL << CLOCK_INTENSET_LFCLKSTARTED_Pos) /*!< Bit mask of LFCLKSTARTED field. */ +#define CLOCK_INTENSET_LFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENSET_LFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENSET_LFCLKSTARTED_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for HFCLKSTARTED event */ +#define CLOCK_INTENSET_HFCLKSTARTED_Pos (0UL) /*!< Position of HFCLKSTARTED field. */ +#define CLOCK_INTENSET_HFCLKSTARTED_Msk (0x1UL << CLOCK_INTENSET_HFCLKSTARTED_Pos) /*!< Bit mask of HFCLKSTARTED field. */ +#define CLOCK_INTENSET_HFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENSET_HFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENSET_HFCLKSTARTED_Set (1UL) /*!< Enable */ + +/* Register: CLOCK_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 4 : Write '1' to Disable interrupt for CTTO event */ +#define CLOCK_INTENCLR_CTTO_Pos (4UL) /*!< Position of CTTO field. */ +#define CLOCK_INTENCLR_CTTO_Msk (0x1UL << CLOCK_INTENCLR_CTTO_Pos) /*!< Bit mask of CTTO field. */ +#define CLOCK_INTENCLR_CTTO_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENCLR_CTTO_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENCLR_CTTO_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to Disable interrupt for DONE event */ +#define CLOCK_INTENCLR_DONE_Pos (3UL) /*!< Position of DONE field. */ +#define CLOCK_INTENCLR_DONE_Msk (0x1UL << CLOCK_INTENCLR_DONE_Pos) /*!< Bit mask of DONE field. */ +#define CLOCK_INTENCLR_DONE_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENCLR_DONE_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENCLR_DONE_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for LFCLKSTARTED event */ +#define CLOCK_INTENCLR_LFCLKSTARTED_Pos (1UL) /*!< Position of LFCLKSTARTED field. */ +#define CLOCK_INTENCLR_LFCLKSTARTED_Msk (0x1UL << CLOCK_INTENCLR_LFCLKSTARTED_Pos) /*!< Bit mask of LFCLKSTARTED field. */ +#define CLOCK_INTENCLR_LFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENCLR_LFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENCLR_LFCLKSTARTED_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for HFCLKSTARTED event */ +#define CLOCK_INTENCLR_HFCLKSTARTED_Pos (0UL) /*!< Position of HFCLKSTARTED field. */ +#define CLOCK_INTENCLR_HFCLKSTARTED_Msk (0x1UL << CLOCK_INTENCLR_HFCLKSTARTED_Pos) /*!< Bit mask of HFCLKSTARTED field. */ +#define CLOCK_INTENCLR_HFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENCLR_HFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENCLR_HFCLKSTARTED_Clear (1UL) /*!< Disable */ + +/* Register: CLOCK_HFCLKRUN */ +/* Description: Status indicating that HFCLKSTART task has been triggered */ + +/* Bit 0 : HFCLKSTART task triggered or not */ +#define CLOCK_HFCLKRUN_STATUS_Pos (0UL) /*!< Position of STATUS field. */ +#define CLOCK_HFCLKRUN_STATUS_Msk (0x1UL << CLOCK_HFCLKRUN_STATUS_Pos) /*!< Bit mask of STATUS field. */ +#define CLOCK_HFCLKRUN_STATUS_NotTriggered (0UL) /*!< Task not triggered */ +#define CLOCK_HFCLKRUN_STATUS_Triggered (1UL) /*!< Task triggered */ + +/* Register: CLOCK_HFCLKSTAT */ +/* Description: HFCLK status */ + +/* Bit 16 : HFCLK state */ +#define CLOCK_HFCLKSTAT_STATE_Pos (16UL) /*!< Position of STATE field. */ +#define CLOCK_HFCLKSTAT_STATE_Msk (0x1UL << CLOCK_HFCLKSTAT_STATE_Pos) /*!< Bit mask of STATE field. */ +#define CLOCK_HFCLKSTAT_STATE_NotRunning (0UL) /*!< HFCLK not running */ +#define CLOCK_HFCLKSTAT_STATE_Running (1UL) /*!< HFCLK running */ + +/* Bit 0 : Source of HFCLK */ +#define CLOCK_HFCLKSTAT_SRC_Pos (0UL) /*!< Position of SRC field. */ +#define CLOCK_HFCLKSTAT_SRC_Msk (0x1UL << CLOCK_HFCLKSTAT_SRC_Pos) /*!< Bit mask of SRC field. */ +#define CLOCK_HFCLKSTAT_SRC_RC (0UL) /*!< 64 MHz internal oscillator (HFINT) */ +#define CLOCK_HFCLKSTAT_SRC_Xtal (1UL) /*!< 64 MHz crystal oscillator (HFXO) */ + +/* Register: CLOCK_LFCLKRUN */ +/* Description: Status indicating that LFCLKSTART task has been triggered */ + +/* Bit 0 : LFCLKSTART task triggered or not */ +#define CLOCK_LFCLKRUN_STATUS_Pos (0UL) /*!< Position of STATUS field. */ +#define CLOCK_LFCLKRUN_STATUS_Msk (0x1UL << CLOCK_LFCLKRUN_STATUS_Pos) /*!< Bit mask of STATUS field. */ +#define CLOCK_LFCLKRUN_STATUS_NotTriggered (0UL) /*!< Task not triggered */ +#define CLOCK_LFCLKRUN_STATUS_Triggered (1UL) /*!< Task triggered */ + +/* Register: CLOCK_LFCLKSTAT */ +/* Description: LFCLK status */ + +/* Bit 16 : LFCLK state */ +#define CLOCK_LFCLKSTAT_STATE_Pos (16UL) /*!< Position of STATE field. */ +#define CLOCK_LFCLKSTAT_STATE_Msk (0x1UL << CLOCK_LFCLKSTAT_STATE_Pos) /*!< Bit mask of STATE field. */ +#define CLOCK_LFCLKSTAT_STATE_NotRunning (0UL) /*!< LFCLK not running */ +#define CLOCK_LFCLKSTAT_STATE_Running (1UL) /*!< LFCLK running */ + +/* Bits 1..0 : Source of LFCLK */ +#define CLOCK_LFCLKSTAT_SRC_Pos (0UL) /*!< Position of SRC field. */ +#define CLOCK_LFCLKSTAT_SRC_Msk (0x3UL << CLOCK_LFCLKSTAT_SRC_Pos) /*!< Bit mask of SRC field. */ +#define CLOCK_LFCLKSTAT_SRC_RC (0UL) /*!< 32.768 kHz RC oscillator */ +#define CLOCK_LFCLKSTAT_SRC_Xtal (1UL) /*!< 32.768 kHz crystal oscillator */ +#define CLOCK_LFCLKSTAT_SRC_Synth (2UL) /*!< 32.768 kHz synthesized from HFCLK */ + +/* Register: CLOCK_LFCLKSRCCOPY */ +/* Description: Copy of LFCLKSRC register, set when LFCLKSTART task was triggered */ + +/* Bits 1..0 : Clock source */ +#define CLOCK_LFCLKSRCCOPY_SRC_Pos (0UL) /*!< Position of SRC field. */ +#define CLOCK_LFCLKSRCCOPY_SRC_Msk (0x3UL << CLOCK_LFCLKSRCCOPY_SRC_Pos) /*!< Bit mask of SRC field. */ +#define CLOCK_LFCLKSRCCOPY_SRC_RC (0UL) /*!< 32.768 kHz RC oscillator */ +#define CLOCK_LFCLKSRCCOPY_SRC_Xtal (1UL) /*!< 32.768 kHz crystal oscillator */ +#define CLOCK_LFCLKSRCCOPY_SRC_Synth (2UL) /*!< 32.768 kHz synthesized from HFCLK */ + +/* Register: CLOCK_LFCLKSRC */ +/* Description: Clock source for the LFCLK */ + +/* Bit 17 : Enable or disable external source for LFCLK */ +#define CLOCK_LFCLKSRC_EXTERNAL_Pos (17UL) /*!< Position of EXTERNAL field. */ +#define CLOCK_LFCLKSRC_EXTERNAL_Msk (0x1UL << CLOCK_LFCLKSRC_EXTERNAL_Pos) /*!< Bit mask of EXTERNAL field. */ +#define CLOCK_LFCLKSRC_EXTERNAL_Disabled (0UL) /*!< Disable external source (use with Xtal) */ +#define CLOCK_LFCLKSRC_EXTERNAL_Enabled (1UL) /*!< Enable use of external source instead of Xtal (SRC needs to be set to Xtal) */ + +/* Bit 16 : Enable or disable bypass of LFCLK crystal oscillator with external clock source */ +#define CLOCK_LFCLKSRC_BYPASS_Pos (16UL) /*!< Position of BYPASS field. */ +#define CLOCK_LFCLKSRC_BYPASS_Msk (0x1UL << CLOCK_LFCLKSRC_BYPASS_Pos) /*!< Bit mask of BYPASS field. */ +#define CLOCK_LFCLKSRC_BYPASS_Disabled (0UL) /*!< Disable (use with Xtal or low-swing external source) */ +#define CLOCK_LFCLKSRC_BYPASS_Enabled (1UL) /*!< Enable (use with rail-to-rail external source) */ + +/* Bits 1..0 : Clock source */ +#define CLOCK_LFCLKSRC_SRC_Pos (0UL) /*!< Position of SRC field. */ +#define CLOCK_LFCLKSRC_SRC_Msk (0x3UL << CLOCK_LFCLKSRC_SRC_Pos) /*!< Bit mask of SRC field. */ +#define CLOCK_LFCLKSRC_SRC_RC (0UL) /*!< 32.768 kHz RC oscillator */ +#define CLOCK_LFCLKSRC_SRC_Xtal (1UL) /*!< 32.768 kHz crystal oscillator */ +#define CLOCK_LFCLKSRC_SRC_Synth (2UL) /*!< 32.768 kHz synthesized from HFCLK */ + +/* Register: CLOCK_CTIV */ +/* Description: Calibration timer interval */ + +/* Bits 6..0 : Calibration timer interval in multiple of 0.25 seconds. Range: 0.25 seconds to 31.75 seconds. */ +#define CLOCK_CTIV_CTIV_Pos (0UL) /*!< Position of CTIV field. */ +#define CLOCK_CTIV_CTIV_Msk (0x7FUL << CLOCK_CTIV_CTIV_Pos) /*!< Bit mask of CTIV field. */ + + +/* Peripheral: COMP */ +/* Description: Comparator */ + +/* Register: COMP_TASKS_START */ +/* Description: Start comparator */ + +/* Bit 0 : */ +#define COMP_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define COMP_TASKS_START_TASKS_START_Msk (0x1UL << COMP_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: COMP_TASKS_STOP */ +/* Description: Stop comparator */ + +/* Bit 0 : */ +#define COMP_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define COMP_TASKS_STOP_TASKS_STOP_Msk (0x1UL << COMP_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: COMP_TASKS_SAMPLE */ +/* Description: Sample comparator value */ + +/* Bit 0 : */ +#define COMP_TASKS_SAMPLE_TASKS_SAMPLE_Pos (0UL) /*!< Position of TASKS_SAMPLE field. */ +#define COMP_TASKS_SAMPLE_TASKS_SAMPLE_Msk (0x1UL << COMP_TASKS_SAMPLE_TASKS_SAMPLE_Pos) /*!< Bit mask of TASKS_SAMPLE field. */ + +/* Register: COMP_EVENTS_READY */ +/* Description: COMP is ready and output is valid */ + +/* Bit 0 : */ +#define COMP_EVENTS_READY_EVENTS_READY_Pos (0UL) /*!< Position of EVENTS_READY field. */ +#define COMP_EVENTS_READY_EVENTS_READY_Msk (0x1UL << COMP_EVENTS_READY_EVENTS_READY_Pos) /*!< Bit mask of EVENTS_READY field. */ + +/* Register: COMP_EVENTS_DOWN */ +/* Description: Downward crossing */ + +/* Bit 0 : */ +#define COMP_EVENTS_DOWN_EVENTS_DOWN_Pos (0UL) /*!< Position of EVENTS_DOWN field. */ +#define COMP_EVENTS_DOWN_EVENTS_DOWN_Msk (0x1UL << COMP_EVENTS_DOWN_EVENTS_DOWN_Pos) /*!< Bit mask of EVENTS_DOWN field. */ + +/* Register: COMP_EVENTS_UP */ +/* Description: Upward crossing */ + +/* Bit 0 : */ +#define COMP_EVENTS_UP_EVENTS_UP_Pos (0UL) /*!< Position of EVENTS_UP field. */ +#define COMP_EVENTS_UP_EVENTS_UP_Msk (0x1UL << COMP_EVENTS_UP_EVENTS_UP_Pos) /*!< Bit mask of EVENTS_UP field. */ + +/* Register: COMP_EVENTS_CROSS */ +/* Description: Downward or upward crossing */ + +/* Bit 0 : */ +#define COMP_EVENTS_CROSS_EVENTS_CROSS_Pos (0UL) /*!< Position of EVENTS_CROSS field. */ +#define COMP_EVENTS_CROSS_EVENTS_CROSS_Msk (0x1UL << COMP_EVENTS_CROSS_EVENTS_CROSS_Pos) /*!< Bit mask of EVENTS_CROSS field. */ + +/* Register: COMP_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 4 : Shortcut between CROSS event and STOP task */ +#define COMP_SHORTS_CROSS_STOP_Pos (4UL) /*!< Position of CROSS_STOP field. */ +#define COMP_SHORTS_CROSS_STOP_Msk (0x1UL << COMP_SHORTS_CROSS_STOP_Pos) /*!< Bit mask of CROSS_STOP field. */ +#define COMP_SHORTS_CROSS_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define COMP_SHORTS_CROSS_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 3 : Shortcut between UP event and STOP task */ +#define COMP_SHORTS_UP_STOP_Pos (3UL) /*!< Position of UP_STOP field. */ +#define COMP_SHORTS_UP_STOP_Msk (0x1UL << COMP_SHORTS_UP_STOP_Pos) /*!< Bit mask of UP_STOP field. */ +#define COMP_SHORTS_UP_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define COMP_SHORTS_UP_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 2 : Shortcut between DOWN event and STOP task */ +#define COMP_SHORTS_DOWN_STOP_Pos (2UL) /*!< Position of DOWN_STOP field. */ +#define COMP_SHORTS_DOWN_STOP_Msk (0x1UL << COMP_SHORTS_DOWN_STOP_Pos) /*!< Bit mask of DOWN_STOP field. */ +#define COMP_SHORTS_DOWN_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define COMP_SHORTS_DOWN_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 1 : Shortcut between READY event and STOP task */ +#define COMP_SHORTS_READY_STOP_Pos (1UL) /*!< Position of READY_STOP field. */ +#define COMP_SHORTS_READY_STOP_Msk (0x1UL << COMP_SHORTS_READY_STOP_Pos) /*!< Bit mask of READY_STOP field. */ +#define COMP_SHORTS_READY_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define COMP_SHORTS_READY_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 0 : Shortcut between READY event and SAMPLE task */ +#define COMP_SHORTS_READY_SAMPLE_Pos (0UL) /*!< Position of READY_SAMPLE field. */ +#define COMP_SHORTS_READY_SAMPLE_Msk (0x1UL << COMP_SHORTS_READY_SAMPLE_Pos) /*!< Bit mask of READY_SAMPLE field. */ +#define COMP_SHORTS_READY_SAMPLE_Disabled (0UL) /*!< Disable shortcut */ +#define COMP_SHORTS_READY_SAMPLE_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: COMP_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 3 : Enable or disable interrupt for CROSS event */ +#define COMP_INTEN_CROSS_Pos (3UL) /*!< Position of CROSS field. */ +#define COMP_INTEN_CROSS_Msk (0x1UL << COMP_INTEN_CROSS_Pos) /*!< Bit mask of CROSS field. */ +#define COMP_INTEN_CROSS_Disabled (0UL) /*!< Disable */ +#define COMP_INTEN_CROSS_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable interrupt for UP event */ +#define COMP_INTEN_UP_Pos (2UL) /*!< Position of UP field. */ +#define COMP_INTEN_UP_Msk (0x1UL << COMP_INTEN_UP_Pos) /*!< Bit mask of UP field. */ +#define COMP_INTEN_UP_Disabled (0UL) /*!< Disable */ +#define COMP_INTEN_UP_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for DOWN event */ +#define COMP_INTEN_DOWN_Pos (1UL) /*!< Position of DOWN field. */ +#define COMP_INTEN_DOWN_Msk (0x1UL << COMP_INTEN_DOWN_Pos) /*!< Bit mask of DOWN field. */ +#define COMP_INTEN_DOWN_Disabled (0UL) /*!< Disable */ +#define COMP_INTEN_DOWN_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable interrupt for READY event */ +#define COMP_INTEN_READY_Pos (0UL) /*!< Position of READY field. */ +#define COMP_INTEN_READY_Msk (0x1UL << COMP_INTEN_READY_Pos) /*!< Bit mask of READY field. */ +#define COMP_INTEN_READY_Disabled (0UL) /*!< Disable */ +#define COMP_INTEN_READY_Enabled (1UL) /*!< Enable */ + +/* Register: COMP_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 3 : Write '1' to Enable interrupt for CROSS event */ +#define COMP_INTENSET_CROSS_Pos (3UL) /*!< Position of CROSS field. */ +#define COMP_INTENSET_CROSS_Msk (0x1UL << COMP_INTENSET_CROSS_Pos) /*!< Bit mask of CROSS field. */ +#define COMP_INTENSET_CROSS_Disabled (0UL) /*!< Read: Disabled */ +#define COMP_INTENSET_CROSS_Enabled (1UL) /*!< Read: Enabled */ +#define COMP_INTENSET_CROSS_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable interrupt for UP event */ +#define COMP_INTENSET_UP_Pos (2UL) /*!< Position of UP field. */ +#define COMP_INTENSET_UP_Msk (0x1UL << COMP_INTENSET_UP_Pos) /*!< Bit mask of UP field. */ +#define COMP_INTENSET_UP_Disabled (0UL) /*!< Read: Disabled */ +#define COMP_INTENSET_UP_Enabled (1UL) /*!< Read: Enabled */ +#define COMP_INTENSET_UP_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for DOWN event */ +#define COMP_INTENSET_DOWN_Pos (1UL) /*!< Position of DOWN field. */ +#define COMP_INTENSET_DOWN_Msk (0x1UL << COMP_INTENSET_DOWN_Pos) /*!< Bit mask of DOWN field. */ +#define COMP_INTENSET_DOWN_Disabled (0UL) /*!< Read: Disabled */ +#define COMP_INTENSET_DOWN_Enabled (1UL) /*!< Read: Enabled */ +#define COMP_INTENSET_DOWN_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for READY event */ +#define COMP_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */ +#define COMP_INTENSET_READY_Msk (0x1UL << COMP_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ +#define COMP_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */ +#define COMP_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */ +#define COMP_INTENSET_READY_Set (1UL) /*!< Enable */ + +/* Register: COMP_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 3 : Write '1' to Disable interrupt for CROSS event */ +#define COMP_INTENCLR_CROSS_Pos (3UL) /*!< Position of CROSS field. */ +#define COMP_INTENCLR_CROSS_Msk (0x1UL << COMP_INTENCLR_CROSS_Pos) /*!< Bit mask of CROSS field. */ +#define COMP_INTENCLR_CROSS_Disabled (0UL) /*!< Read: Disabled */ +#define COMP_INTENCLR_CROSS_Enabled (1UL) /*!< Read: Enabled */ +#define COMP_INTENCLR_CROSS_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable interrupt for UP event */ +#define COMP_INTENCLR_UP_Pos (2UL) /*!< Position of UP field. */ +#define COMP_INTENCLR_UP_Msk (0x1UL << COMP_INTENCLR_UP_Pos) /*!< Bit mask of UP field. */ +#define COMP_INTENCLR_UP_Disabled (0UL) /*!< Read: Disabled */ +#define COMP_INTENCLR_UP_Enabled (1UL) /*!< Read: Enabled */ +#define COMP_INTENCLR_UP_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for DOWN event */ +#define COMP_INTENCLR_DOWN_Pos (1UL) /*!< Position of DOWN field. */ +#define COMP_INTENCLR_DOWN_Msk (0x1UL << COMP_INTENCLR_DOWN_Pos) /*!< Bit mask of DOWN field. */ +#define COMP_INTENCLR_DOWN_Disabled (0UL) /*!< Read: Disabled */ +#define COMP_INTENCLR_DOWN_Enabled (1UL) /*!< Read: Enabled */ +#define COMP_INTENCLR_DOWN_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for READY event */ +#define COMP_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */ +#define COMP_INTENCLR_READY_Msk (0x1UL << COMP_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ +#define COMP_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */ +#define COMP_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */ +#define COMP_INTENCLR_READY_Clear (1UL) /*!< Disable */ + +/* Register: COMP_RESULT */ +/* Description: Compare result */ + +/* Bit 0 : Result of last compare. Decision point SAMPLE task. */ +#define COMP_RESULT_RESULT_Pos (0UL) /*!< Position of RESULT field. */ +#define COMP_RESULT_RESULT_Msk (0x1UL << COMP_RESULT_RESULT_Pos) /*!< Bit mask of RESULT field. */ +#define COMP_RESULT_RESULT_Below (0UL) /*!< Input voltage is below the threshold (VIN+ < VIN-) */ +#define COMP_RESULT_RESULT_Above (1UL) /*!< Input voltage is above the threshold (VIN+ > VIN-) */ + +/* Register: COMP_ENABLE */ +/* Description: COMP enable */ + +/* Bits 1..0 : Enable or disable COMP */ +#define COMP_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define COMP_ENABLE_ENABLE_Msk (0x3UL << COMP_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define COMP_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ +#define COMP_ENABLE_ENABLE_Enabled (2UL) /*!< Enable */ + +/* Register: COMP_PSEL */ +/* Description: Pin select */ + +/* Bits 2..0 : Analog pin select */ +#define COMP_PSEL_PSEL_Pos (0UL) /*!< Position of PSEL field. */ +#define COMP_PSEL_PSEL_Msk (0x7UL << COMP_PSEL_PSEL_Pos) /*!< Bit mask of PSEL field. */ +#define COMP_PSEL_PSEL_AnalogInput0 (0UL) /*!< AIN0 selected as analog input */ +#define COMP_PSEL_PSEL_AnalogInput1 (1UL) /*!< AIN1 selected as analog input */ +#define COMP_PSEL_PSEL_AnalogInput2 (2UL) /*!< AIN2 selected as analog input */ +#define COMP_PSEL_PSEL_AnalogInput3 (3UL) /*!< AIN3 selected as analog input */ +#define COMP_PSEL_PSEL_AnalogInput4 (4UL) /*!< AIN4 selected as analog input */ +#define COMP_PSEL_PSEL_AnalogInput5 (5UL) /*!< AIN5 selected as analog input */ +#define COMP_PSEL_PSEL_AnalogInput6 (6UL) /*!< AIN6 selected as analog input */ +#define COMP_PSEL_PSEL_VddDiv2 (7UL) /*!< VDD/2 selected as analog input */ + +/* Register: COMP_REFSEL */ +/* Description: Reference source select for single-ended mode */ + +/* Bits 2..0 : Reference select */ +#define COMP_REFSEL_REFSEL_Pos (0UL) /*!< Position of REFSEL field. */ +#define COMP_REFSEL_REFSEL_Msk (0x7UL << COMP_REFSEL_REFSEL_Pos) /*!< Bit mask of REFSEL field. */ +#define COMP_REFSEL_REFSEL_Int1V2 (0UL) /*!< VREF = internal 1.2 V reference (VDD >= 1.7 V) */ +#define COMP_REFSEL_REFSEL_Int1V8 (1UL) /*!< VREF = internal 1.8 V reference (VDD >= VREF + 0.2 V) */ +#define COMP_REFSEL_REFSEL_Int2V4 (2UL) /*!< VREF = internal 2.4 V reference (VDD >= VREF + 0.2 V) */ +#define COMP_REFSEL_REFSEL_VDD (4UL) /*!< VREF = VDD */ +#define COMP_REFSEL_REFSEL_ARef (5UL) /*!< VREF = AREF (VDD >= VREF >= AREFMIN) */ + +/* Register: COMP_EXTREFSEL */ +/* Description: External reference select */ + +/* Bits 2..0 : External analog reference select */ +#define COMP_EXTREFSEL_EXTREFSEL_Pos (0UL) /*!< Position of EXTREFSEL field. */ +#define COMP_EXTREFSEL_EXTREFSEL_Msk (0x7UL << COMP_EXTREFSEL_EXTREFSEL_Pos) /*!< Bit mask of EXTREFSEL field. */ +#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference0 (0UL) /*!< Use AIN0 as external analog reference */ +#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference1 (1UL) /*!< Use AIN1 as external analog reference */ +#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference2 (2UL) /*!< Use AIN2 as external analog reference */ +#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference3 (3UL) /*!< Use AIN3 as external analog reference */ +#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference4 (4UL) /*!< Use AIN4 as external analog reference */ +#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference5 (5UL) /*!< Use AIN5 as external analog reference */ +#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference6 (6UL) /*!< Use AIN6 as external analog reference */ +#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference7 (7UL) /*!< Use AIN7 as external analog reference */ + +/* Register: COMP_TH */ +/* Description: Threshold configuration for hysteresis unit */ + +/* Bits 13..8 : VUP = (THUP+1)/64*VREF */ +#define COMP_TH_THUP_Pos (8UL) /*!< Position of THUP field. */ +#define COMP_TH_THUP_Msk (0x3FUL << COMP_TH_THUP_Pos) /*!< Bit mask of THUP field. */ + +/* Bits 5..0 : VDOWN = (THDOWN+1)/64*VREF */ +#define COMP_TH_THDOWN_Pos (0UL) /*!< Position of THDOWN field. */ +#define COMP_TH_THDOWN_Msk (0x3FUL << COMP_TH_THDOWN_Pos) /*!< Bit mask of THDOWN field. */ + +/* Register: COMP_MODE */ +/* Description: Mode configuration */ + +/* Bit 8 : Main operation modes */ +#define COMP_MODE_MAIN_Pos (8UL) /*!< Position of MAIN field. */ +#define COMP_MODE_MAIN_Msk (0x1UL << COMP_MODE_MAIN_Pos) /*!< Bit mask of MAIN field. */ +#define COMP_MODE_MAIN_SE (0UL) /*!< Single-ended mode */ +#define COMP_MODE_MAIN_Diff (1UL) /*!< Differential mode */ + +/* Bits 1..0 : Speed and power modes */ +#define COMP_MODE_SP_Pos (0UL) /*!< Position of SP field. */ +#define COMP_MODE_SP_Msk (0x3UL << COMP_MODE_SP_Pos) /*!< Bit mask of SP field. */ +#define COMP_MODE_SP_Low (0UL) /*!< Low-power mode */ +#define COMP_MODE_SP_Normal (1UL) /*!< Normal mode */ +#define COMP_MODE_SP_High (2UL) /*!< High-speed mode */ + +/* Register: COMP_HYST */ +/* Description: Comparator hysteresis enable */ + +/* Bit 0 : Comparator hysteresis */ +#define COMP_HYST_HYST_Pos (0UL) /*!< Position of HYST field. */ +#define COMP_HYST_HYST_Msk (0x1UL << COMP_HYST_HYST_Pos) /*!< Bit mask of HYST field. */ +#define COMP_HYST_HYST_NoHyst (0UL) /*!< Comparator hysteresis disabled */ +#define COMP_HYST_HYST_Hyst50mV (1UL) /*!< Comparator hysteresis enabled */ + + +/* Peripheral: ECB */ +/* Description: AES ECB Mode Encryption */ + +/* Register: ECB_TASKS_STARTECB */ +/* Description: Start ECB block encrypt */ + +/* Bit 0 : */ +#define ECB_TASKS_STARTECB_TASKS_STARTECB_Pos (0UL) /*!< Position of TASKS_STARTECB field. */ +#define ECB_TASKS_STARTECB_TASKS_STARTECB_Msk (0x1UL << ECB_TASKS_STARTECB_TASKS_STARTECB_Pos) /*!< Bit mask of TASKS_STARTECB field. */ + +/* Register: ECB_TASKS_STOPECB */ +/* Description: Abort a possible executing ECB operation */ + +/* Bit 0 : */ +#define ECB_TASKS_STOPECB_TASKS_STOPECB_Pos (0UL) /*!< Position of TASKS_STOPECB field. */ +#define ECB_TASKS_STOPECB_TASKS_STOPECB_Msk (0x1UL << ECB_TASKS_STOPECB_TASKS_STOPECB_Pos) /*!< Bit mask of TASKS_STOPECB field. */ + +/* Register: ECB_EVENTS_ENDECB */ +/* Description: ECB block encrypt complete */ + +/* Bit 0 : */ +#define ECB_EVENTS_ENDECB_EVENTS_ENDECB_Pos (0UL) /*!< Position of EVENTS_ENDECB field. */ +#define ECB_EVENTS_ENDECB_EVENTS_ENDECB_Msk (0x1UL << ECB_EVENTS_ENDECB_EVENTS_ENDECB_Pos) /*!< Bit mask of EVENTS_ENDECB field. */ + +/* Register: ECB_EVENTS_ERRORECB */ +/* Description: ECB block encrypt aborted because of a STOPECB task or due to an error */ + +/* Bit 0 : */ +#define ECB_EVENTS_ERRORECB_EVENTS_ERRORECB_Pos (0UL) /*!< Position of EVENTS_ERRORECB field. */ +#define ECB_EVENTS_ERRORECB_EVENTS_ERRORECB_Msk (0x1UL << ECB_EVENTS_ERRORECB_EVENTS_ERRORECB_Pos) /*!< Bit mask of EVENTS_ERRORECB field. */ + +/* Register: ECB_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 1 : Write '1' to Enable interrupt for ERRORECB event */ +#define ECB_INTENSET_ERRORECB_Pos (1UL) /*!< Position of ERRORECB field. */ +#define ECB_INTENSET_ERRORECB_Msk (0x1UL << ECB_INTENSET_ERRORECB_Pos) /*!< Bit mask of ERRORECB field. */ +#define ECB_INTENSET_ERRORECB_Disabled (0UL) /*!< Read: Disabled */ +#define ECB_INTENSET_ERRORECB_Enabled (1UL) /*!< Read: Enabled */ +#define ECB_INTENSET_ERRORECB_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for ENDECB event */ +#define ECB_INTENSET_ENDECB_Pos (0UL) /*!< Position of ENDECB field. */ +#define ECB_INTENSET_ENDECB_Msk (0x1UL << ECB_INTENSET_ENDECB_Pos) /*!< Bit mask of ENDECB field. */ +#define ECB_INTENSET_ENDECB_Disabled (0UL) /*!< Read: Disabled */ +#define ECB_INTENSET_ENDECB_Enabled (1UL) /*!< Read: Enabled */ +#define ECB_INTENSET_ENDECB_Set (1UL) /*!< Enable */ + +/* Register: ECB_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 1 : Write '1' to Disable interrupt for ERRORECB event */ +#define ECB_INTENCLR_ERRORECB_Pos (1UL) /*!< Position of ERRORECB field. */ +#define ECB_INTENCLR_ERRORECB_Msk (0x1UL << ECB_INTENCLR_ERRORECB_Pos) /*!< Bit mask of ERRORECB field. */ +#define ECB_INTENCLR_ERRORECB_Disabled (0UL) /*!< Read: Disabled */ +#define ECB_INTENCLR_ERRORECB_Enabled (1UL) /*!< Read: Enabled */ +#define ECB_INTENCLR_ERRORECB_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for ENDECB event */ +#define ECB_INTENCLR_ENDECB_Pos (0UL) /*!< Position of ENDECB field. */ +#define ECB_INTENCLR_ENDECB_Msk (0x1UL << ECB_INTENCLR_ENDECB_Pos) /*!< Bit mask of ENDECB field. */ +#define ECB_INTENCLR_ENDECB_Disabled (0UL) /*!< Read: Disabled */ +#define ECB_INTENCLR_ENDECB_Enabled (1UL) /*!< Read: Enabled */ +#define ECB_INTENCLR_ENDECB_Clear (1UL) /*!< Disable */ + +/* Register: ECB_ECBDATAPTR */ +/* Description: ECB block encrypt memory pointers */ + +/* Bits 31..0 : Pointer to the ECB data structure (see Table 1 ECB data structure overview) */ +#define ECB_ECBDATAPTR_ECBDATAPTR_Pos (0UL) /*!< Position of ECBDATAPTR field. */ +#define ECB_ECBDATAPTR_ECBDATAPTR_Msk (0xFFFFFFFFUL << ECB_ECBDATAPTR_ECBDATAPTR_Pos) /*!< Bit mask of ECBDATAPTR field. */ + + +/* Peripheral: EGU */ +/* Description: Event Generator Unit 0 */ + +/* Register: EGU_TASKS_TRIGGER */ +/* Description: Description collection[0]: Trigger 0 for triggering the corresponding TRIGGERED[0] event */ + +/* Bit 0 : */ +#define EGU_TASKS_TRIGGER_TASKS_TRIGGER_Pos (0UL) /*!< Position of TASKS_TRIGGER field. */ +#define EGU_TASKS_TRIGGER_TASKS_TRIGGER_Msk (0x1UL << EGU_TASKS_TRIGGER_TASKS_TRIGGER_Pos) /*!< Bit mask of TASKS_TRIGGER field. */ + +/* Register: EGU_EVENTS_TRIGGERED */ +/* Description: Description collection[0]: Event number 0 generated by triggering the corresponding TRIGGER[0] task */ + +/* Bit 0 : */ +#define EGU_EVENTS_TRIGGERED_EVENTS_TRIGGERED_Pos (0UL) /*!< Position of EVENTS_TRIGGERED field. */ +#define EGU_EVENTS_TRIGGERED_EVENTS_TRIGGERED_Msk (0x1UL << EGU_EVENTS_TRIGGERED_EVENTS_TRIGGERED_Pos) /*!< Bit mask of EVENTS_TRIGGERED field. */ + +/* Register: EGU_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 15 : Enable or disable interrupt for TRIGGERED[15] event */ +#define EGU_INTEN_TRIGGERED15_Pos (15UL) /*!< Position of TRIGGERED15 field. */ +#define EGU_INTEN_TRIGGERED15_Msk (0x1UL << EGU_INTEN_TRIGGERED15_Pos) /*!< Bit mask of TRIGGERED15 field. */ +#define EGU_INTEN_TRIGGERED15_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED15_Enabled (1UL) /*!< Enable */ + +/* Bit 14 : Enable or disable interrupt for TRIGGERED[14] event */ +#define EGU_INTEN_TRIGGERED14_Pos (14UL) /*!< Position of TRIGGERED14 field. */ +#define EGU_INTEN_TRIGGERED14_Msk (0x1UL << EGU_INTEN_TRIGGERED14_Pos) /*!< Bit mask of TRIGGERED14 field. */ +#define EGU_INTEN_TRIGGERED14_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED14_Enabled (1UL) /*!< Enable */ + +/* Bit 13 : Enable or disable interrupt for TRIGGERED[13] event */ +#define EGU_INTEN_TRIGGERED13_Pos (13UL) /*!< Position of TRIGGERED13 field. */ +#define EGU_INTEN_TRIGGERED13_Msk (0x1UL << EGU_INTEN_TRIGGERED13_Pos) /*!< Bit mask of TRIGGERED13 field. */ +#define EGU_INTEN_TRIGGERED13_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED13_Enabled (1UL) /*!< Enable */ + +/* Bit 12 : Enable or disable interrupt for TRIGGERED[12] event */ +#define EGU_INTEN_TRIGGERED12_Pos (12UL) /*!< Position of TRIGGERED12 field. */ +#define EGU_INTEN_TRIGGERED12_Msk (0x1UL << EGU_INTEN_TRIGGERED12_Pos) /*!< Bit mask of TRIGGERED12 field. */ +#define EGU_INTEN_TRIGGERED12_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED12_Enabled (1UL) /*!< Enable */ + +/* Bit 11 : Enable or disable interrupt for TRIGGERED[11] event */ +#define EGU_INTEN_TRIGGERED11_Pos (11UL) /*!< Position of TRIGGERED11 field. */ +#define EGU_INTEN_TRIGGERED11_Msk (0x1UL << EGU_INTEN_TRIGGERED11_Pos) /*!< Bit mask of TRIGGERED11 field. */ +#define EGU_INTEN_TRIGGERED11_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED11_Enabled (1UL) /*!< Enable */ + +/* Bit 10 : Enable or disable interrupt for TRIGGERED[10] event */ +#define EGU_INTEN_TRIGGERED10_Pos (10UL) /*!< Position of TRIGGERED10 field. */ +#define EGU_INTEN_TRIGGERED10_Msk (0x1UL << EGU_INTEN_TRIGGERED10_Pos) /*!< Bit mask of TRIGGERED10 field. */ +#define EGU_INTEN_TRIGGERED10_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED10_Enabled (1UL) /*!< Enable */ + +/* Bit 9 : Enable or disable interrupt for TRIGGERED[9] event */ +#define EGU_INTEN_TRIGGERED9_Pos (9UL) /*!< Position of TRIGGERED9 field. */ +#define EGU_INTEN_TRIGGERED9_Msk (0x1UL << EGU_INTEN_TRIGGERED9_Pos) /*!< Bit mask of TRIGGERED9 field. */ +#define EGU_INTEN_TRIGGERED9_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED9_Enabled (1UL) /*!< Enable */ + +/* Bit 8 : Enable or disable interrupt for TRIGGERED[8] event */ +#define EGU_INTEN_TRIGGERED8_Pos (8UL) /*!< Position of TRIGGERED8 field. */ +#define EGU_INTEN_TRIGGERED8_Msk (0x1UL << EGU_INTEN_TRIGGERED8_Pos) /*!< Bit mask of TRIGGERED8 field. */ +#define EGU_INTEN_TRIGGERED8_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED8_Enabled (1UL) /*!< Enable */ + +/* Bit 7 : Enable or disable interrupt for TRIGGERED[7] event */ +#define EGU_INTEN_TRIGGERED7_Pos (7UL) /*!< Position of TRIGGERED7 field. */ +#define EGU_INTEN_TRIGGERED7_Msk (0x1UL << EGU_INTEN_TRIGGERED7_Pos) /*!< Bit mask of TRIGGERED7 field. */ +#define EGU_INTEN_TRIGGERED7_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED7_Enabled (1UL) /*!< Enable */ + +/* Bit 6 : Enable or disable interrupt for TRIGGERED[6] event */ +#define EGU_INTEN_TRIGGERED6_Pos (6UL) /*!< Position of TRIGGERED6 field. */ +#define EGU_INTEN_TRIGGERED6_Msk (0x1UL << EGU_INTEN_TRIGGERED6_Pos) /*!< Bit mask of TRIGGERED6 field. */ +#define EGU_INTEN_TRIGGERED6_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED6_Enabled (1UL) /*!< Enable */ + +/* Bit 5 : Enable or disable interrupt for TRIGGERED[5] event */ +#define EGU_INTEN_TRIGGERED5_Pos (5UL) /*!< Position of TRIGGERED5 field. */ +#define EGU_INTEN_TRIGGERED5_Msk (0x1UL << EGU_INTEN_TRIGGERED5_Pos) /*!< Bit mask of TRIGGERED5 field. */ +#define EGU_INTEN_TRIGGERED5_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED5_Enabled (1UL) /*!< Enable */ + +/* Bit 4 : Enable or disable interrupt for TRIGGERED[4] event */ +#define EGU_INTEN_TRIGGERED4_Pos (4UL) /*!< Position of TRIGGERED4 field. */ +#define EGU_INTEN_TRIGGERED4_Msk (0x1UL << EGU_INTEN_TRIGGERED4_Pos) /*!< Bit mask of TRIGGERED4 field. */ +#define EGU_INTEN_TRIGGERED4_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED4_Enabled (1UL) /*!< Enable */ + +/* Bit 3 : Enable or disable interrupt for TRIGGERED[3] event */ +#define EGU_INTEN_TRIGGERED3_Pos (3UL) /*!< Position of TRIGGERED3 field. */ +#define EGU_INTEN_TRIGGERED3_Msk (0x1UL << EGU_INTEN_TRIGGERED3_Pos) /*!< Bit mask of TRIGGERED3 field. */ +#define EGU_INTEN_TRIGGERED3_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED3_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable interrupt for TRIGGERED[2] event */ +#define EGU_INTEN_TRIGGERED2_Pos (2UL) /*!< Position of TRIGGERED2 field. */ +#define EGU_INTEN_TRIGGERED2_Msk (0x1UL << EGU_INTEN_TRIGGERED2_Pos) /*!< Bit mask of TRIGGERED2 field. */ +#define EGU_INTEN_TRIGGERED2_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED2_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for TRIGGERED[1] event */ +#define EGU_INTEN_TRIGGERED1_Pos (1UL) /*!< Position of TRIGGERED1 field. */ +#define EGU_INTEN_TRIGGERED1_Msk (0x1UL << EGU_INTEN_TRIGGERED1_Pos) /*!< Bit mask of TRIGGERED1 field. */ +#define EGU_INTEN_TRIGGERED1_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED1_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable interrupt for TRIGGERED[0] event */ +#define EGU_INTEN_TRIGGERED0_Pos (0UL) /*!< Position of TRIGGERED0 field. */ +#define EGU_INTEN_TRIGGERED0_Msk (0x1UL << EGU_INTEN_TRIGGERED0_Pos) /*!< Bit mask of TRIGGERED0 field. */ +#define EGU_INTEN_TRIGGERED0_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED0_Enabled (1UL) /*!< Enable */ + +/* Register: EGU_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 15 : Write '1' to Enable interrupt for TRIGGERED[15] event */ +#define EGU_INTENSET_TRIGGERED15_Pos (15UL) /*!< Position of TRIGGERED15 field. */ +#define EGU_INTENSET_TRIGGERED15_Msk (0x1UL << EGU_INTENSET_TRIGGERED15_Pos) /*!< Bit mask of TRIGGERED15 field. */ +#define EGU_INTENSET_TRIGGERED15_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED15_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED15_Set (1UL) /*!< Enable */ + +/* Bit 14 : Write '1' to Enable interrupt for TRIGGERED[14] event */ +#define EGU_INTENSET_TRIGGERED14_Pos (14UL) /*!< Position of TRIGGERED14 field. */ +#define EGU_INTENSET_TRIGGERED14_Msk (0x1UL << EGU_INTENSET_TRIGGERED14_Pos) /*!< Bit mask of TRIGGERED14 field. */ +#define EGU_INTENSET_TRIGGERED14_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED14_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED14_Set (1UL) /*!< Enable */ + +/* Bit 13 : Write '1' to Enable interrupt for TRIGGERED[13] event */ +#define EGU_INTENSET_TRIGGERED13_Pos (13UL) /*!< Position of TRIGGERED13 field. */ +#define EGU_INTENSET_TRIGGERED13_Msk (0x1UL << EGU_INTENSET_TRIGGERED13_Pos) /*!< Bit mask of TRIGGERED13 field. */ +#define EGU_INTENSET_TRIGGERED13_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED13_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED13_Set (1UL) /*!< Enable */ + +/* Bit 12 : Write '1' to Enable interrupt for TRIGGERED[12] event */ +#define EGU_INTENSET_TRIGGERED12_Pos (12UL) /*!< Position of TRIGGERED12 field. */ +#define EGU_INTENSET_TRIGGERED12_Msk (0x1UL << EGU_INTENSET_TRIGGERED12_Pos) /*!< Bit mask of TRIGGERED12 field. */ +#define EGU_INTENSET_TRIGGERED12_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED12_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED12_Set (1UL) /*!< Enable */ + +/* Bit 11 : Write '1' to Enable interrupt for TRIGGERED[11] event */ +#define EGU_INTENSET_TRIGGERED11_Pos (11UL) /*!< Position of TRIGGERED11 field. */ +#define EGU_INTENSET_TRIGGERED11_Msk (0x1UL << EGU_INTENSET_TRIGGERED11_Pos) /*!< Bit mask of TRIGGERED11 field. */ +#define EGU_INTENSET_TRIGGERED11_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED11_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED11_Set (1UL) /*!< Enable */ + +/* Bit 10 : Write '1' to Enable interrupt for TRIGGERED[10] event */ +#define EGU_INTENSET_TRIGGERED10_Pos (10UL) /*!< Position of TRIGGERED10 field. */ +#define EGU_INTENSET_TRIGGERED10_Msk (0x1UL << EGU_INTENSET_TRIGGERED10_Pos) /*!< Bit mask of TRIGGERED10 field. */ +#define EGU_INTENSET_TRIGGERED10_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED10_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED10_Set (1UL) /*!< Enable */ + +/* Bit 9 : Write '1' to Enable interrupt for TRIGGERED[9] event */ +#define EGU_INTENSET_TRIGGERED9_Pos (9UL) /*!< Position of TRIGGERED9 field. */ +#define EGU_INTENSET_TRIGGERED9_Msk (0x1UL << EGU_INTENSET_TRIGGERED9_Pos) /*!< Bit mask of TRIGGERED9 field. */ +#define EGU_INTENSET_TRIGGERED9_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED9_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED9_Set (1UL) /*!< Enable */ + +/* Bit 8 : Write '1' to Enable interrupt for TRIGGERED[8] event */ +#define EGU_INTENSET_TRIGGERED8_Pos (8UL) /*!< Position of TRIGGERED8 field. */ +#define EGU_INTENSET_TRIGGERED8_Msk (0x1UL << EGU_INTENSET_TRIGGERED8_Pos) /*!< Bit mask of TRIGGERED8 field. */ +#define EGU_INTENSET_TRIGGERED8_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED8_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED8_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to Enable interrupt for TRIGGERED[7] event */ +#define EGU_INTENSET_TRIGGERED7_Pos (7UL) /*!< Position of TRIGGERED7 field. */ +#define EGU_INTENSET_TRIGGERED7_Msk (0x1UL << EGU_INTENSET_TRIGGERED7_Pos) /*!< Bit mask of TRIGGERED7 field. */ +#define EGU_INTENSET_TRIGGERED7_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED7_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED7_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to Enable interrupt for TRIGGERED[6] event */ +#define EGU_INTENSET_TRIGGERED6_Pos (6UL) /*!< Position of TRIGGERED6 field. */ +#define EGU_INTENSET_TRIGGERED6_Msk (0x1UL << EGU_INTENSET_TRIGGERED6_Pos) /*!< Bit mask of TRIGGERED6 field. */ +#define EGU_INTENSET_TRIGGERED6_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED6_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED6_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to Enable interrupt for TRIGGERED[5] event */ +#define EGU_INTENSET_TRIGGERED5_Pos (5UL) /*!< Position of TRIGGERED5 field. */ +#define EGU_INTENSET_TRIGGERED5_Msk (0x1UL << EGU_INTENSET_TRIGGERED5_Pos) /*!< Bit mask of TRIGGERED5 field. */ +#define EGU_INTENSET_TRIGGERED5_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED5_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED5_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to Enable interrupt for TRIGGERED[4] event */ +#define EGU_INTENSET_TRIGGERED4_Pos (4UL) /*!< Position of TRIGGERED4 field. */ +#define EGU_INTENSET_TRIGGERED4_Msk (0x1UL << EGU_INTENSET_TRIGGERED4_Pos) /*!< Bit mask of TRIGGERED4 field. */ +#define EGU_INTENSET_TRIGGERED4_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED4_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED4_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to Enable interrupt for TRIGGERED[3] event */ +#define EGU_INTENSET_TRIGGERED3_Pos (3UL) /*!< Position of TRIGGERED3 field. */ +#define EGU_INTENSET_TRIGGERED3_Msk (0x1UL << EGU_INTENSET_TRIGGERED3_Pos) /*!< Bit mask of TRIGGERED3 field. */ +#define EGU_INTENSET_TRIGGERED3_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED3_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED3_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable interrupt for TRIGGERED[2] event */ +#define EGU_INTENSET_TRIGGERED2_Pos (2UL) /*!< Position of TRIGGERED2 field. */ +#define EGU_INTENSET_TRIGGERED2_Msk (0x1UL << EGU_INTENSET_TRIGGERED2_Pos) /*!< Bit mask of TRIGGERED2 field. */ +#define EGU_INTENSET_TRIGGERED2_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED2_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED2_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for TRIGGERED[1] event */ +#define EGU_INTENSET_TRIGGERED1_Pos (1UL) /*!< Position of TRIGGERED1 field. */ +#define EGU_INTENSET_TRIGGERED1_Msk (0x1UL << EGU_INTENSET_TRIGGERED1_Pos) /*!< Bit mask of TRIGGERED1 field. */ +#define EGU_INTENSET_TRIGGERED1_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED1_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED1_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for TRIGGERED[0] event */ +#define EGU_INTENSET_TRIGGERED0_Pos (0UL) /*!< Position of TRIGGERED0 field. */ +#define EGU_INTENSET_TRIGGERED0_Msk (0x1UL << EGU_INTENSET_TRIGGERED0_Pos) /*!< Bit mask of TRIGGERED0 field. */ +#define EGU_INTENSET_TRIGGERED0_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED0_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED0_Set (1UL) /*!< Enable */ + +/* Register: EGU_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 15 : Write '1' to Disable interrupt for TRIGGERED[15] event */ +#define EGU_INTENCLR_TRIGGERED15_Pos (15UL) /*!< Position of TRIGGERED15 field. */ +#define EGU_INTENCLR_TRIGGERED15_Msk (0x1UL << EGU_INTENCLR_TRIGGERED15_Pos) /*!< Bit mask of TRIGGERED15 field. */ +#define EGU_INTENCLR_TRIGGERED15_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED15_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED15_Clear (1UL) /*!< Disable */ + +/* Bit 14 : Write '1' to Disable interrupt for TRIGGERED[14] event */ +#define EGU_INTENCLR_TRIGGERED14_Pos (14UL) /*!< Position of TRIGGERED14 field. */ +#define EGU_INTENCLR_TRIGGERED14_Msk (0x1UL << EGU_INTENCLR_TRIGGERED14_Pos) /*!< Bit mask of TRIGGERED14 field. */ +#define EGU_INTENCLR_TRIGGERED14_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED14_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED14_Clear (1UL) /*!< Disable */ + +/* Bit 13 : Write '1' to Disable interrupt for TRIGGERED[13] event */ +#define EGU_INTENCLR_TRIGGERED13_Pos (13UL) /*!< Position of TRIGGERED13 field. */ +#define EGU_INTENCLR_TRIGGERED13_Msk (0x1UL << EGU_INTENCLR_TRIGGERED13_Pos) /*!< Bit mask of TRIGGERED13 field. */ +#define EGU_INTENCLR_TRIGGERED13_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED13_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED13_Clear (1UL) /*!< Disable */ + +/* Bit 12 : Write '1' to Disable interrupt for TRIGGERED[12] event */ +#define EGU_INTENCLR_TRIGGERED12_Pos (12UL) /*!< Position of TRIGGERED12 field. */ +#define EGU_INTENCLR_TRIGGERED12_Msk (0x1UL << EGU_INTENCLR_TRIGGERED12_Pos) /*!< Bit mask of TRIGGERED12 field. */ +#define EGU_INTENCLR_TRIGGERED12_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED12_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED12_Clear (1UL) /*!< Disable */ + +/* Bit 11 : Write '1' to Disable interrupt for TRIGGERED[11] event */ +#define EGU_INTENCLR_TRIGGERED11_Pos (11UL) /*!< Position of TRIGGERED11 field. */ +#define EGU_INTENCLR_TRIGGERED11_Msk (0x1UL << EGU_INTENCLR_TRIGGERED11_Pos) /*!< Bit mask of TRIGGERED11 field. */ +#define EGU_INTENCLR_TRIGGERED11_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED11_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED11_Clear (1UL) /*!< Disable */ + +/* Bit 10 : Write '1' to Disable interrupt for TRIGGERED[10] event */ +#define EGU_INTENCLR_TRIGGERED10_Pos (10UL) /*!< Position of TRIGGERED10 field. */ +#define EGU_INTENCLR_TRIGGERED10_Msk (0x1UL << EGU_INTENCLR_TRIGGERED10_Pos) /*!< Bit mask of TRIGGERED10 field. */ +#define EGU_INTENCLR_TRIGGERED10_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED10_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED10_Clear (1UL) /*!< Disable */ + +/* Bit 9 : Write '1' to Disable interrupt for TRIGGERED[9] event */ +#define EGU_INTENCLR_TRIGGERED9_Pos (9UL) /*!< Position of TRIGGERED9 field. */ +#define EGU_INTENCLR_TRIGGERED9_Msk (0x1UL << EGU_INTENCLR_TRIGGERED9_Pos) /*!< Bit mask of TRIGGERED9 field. */ +#define EGU_INTENCLR_TRIGGERED9_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED9_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED9_Clear (1UL) /*!< Disable */ + +/* Bit 8 : Write '1' to Disable interrupt for TRIGGERED[8] event */ +#define EGU_INTENCLR_TRIGGERED8_Pos (8UL) /*!< Position of TRIGGERED8 field. */ +#define EGU_INTENCLR_TRIGGERED8_Msk (0x1UL << EGU_INTENCLR_TRIGGERED8_Pos) /*!< Bit mask of TRIGGERED8 field. */ +#define EGU_INTENCLR_TRIGGERED8_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED8_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED8_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to Disable interrupt for TRIGGERED[7] event */ +#define EGU_INTENCLR_TRIGGERED7_Pos (7UL) /*!< Position of TRIGGERED7 field. */ +#define EGU_INTENCLR_TRIGGERED7_Msk (0x1UL << EGU_INTENCLR_TRIGGERED7_Pos) /*!< Bit mask of TRIGGERED7 field. */ +#define EGU_INTENCLR_TRIGGERED7_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED7_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED7_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to Disable interrupt for TRIGGERED[6] event */ +#define EGU_INTENCLR_TRIGGERED6_Pos (6UL) /*!< Position of TRIGGERED6 field. */ +#define EGU_INTENCLR_TRIGGERED6_Msk (0x1UL << EGU_INTENCLR_TRIGGERED6_Pos) /*!< Bit mask of TRIGGERED6 field. */ +#define EGU_INTENCLR_TRIGGERED6_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED6_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED6_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to Disable interrupt for TRIGGERED[5] event */ +#define EGU_INTENCLR_TRIGGERED5_Pos (5UL) /*!< Position of TRIGGERED5 field. */ +#define EGU_INTENCLR_TRIGGERED5_Msk (0x1UL << EGU_INTENCLR_TRIGGERED5_Pos) /*!< Bit mask of TRIGGERED5 field. */ +#define EGU_INTENCLR_TRIGGERED5_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED5_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED5_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to Disable interrupt for TRIGGERED[4] event */ +#define EGU_INTENCLR_TRIGGERED4_Pos (4UL) /*!< Position of TRIGGERED4 field. */ +#define EGU_INTENCLR_TRIGGERED4_Msk (0x1UL << EGU_INTENCLR_TRIGGERED4_Pos) /*!< Bit mask of TRIGGERED4 field. */ +#define EGU_INTENCLR_TRIGGERED4_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED4_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED4_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to Disable interrupt for TRIGGERED[3] event */ +#define EGU_INTENCLR_TRIGGERED3_Pos (3UL) /*!< Position of TRIGGERED3 field. */ +#define EGU_INTENCLR_TRIGGERED3_Msk (0x1UL << EGU_INTENCLR_TRIGGERED3_Pos) /*!< Bit mask of TRIGGERED3 field. */ +#define EGU_INTENCLR_TRIGGERED3_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED3_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED3_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable interrupt for TRIGGERED[2] event */ +#define EGU_INTENCLR_TRIGGERED2_Pos (2UL) /*!< Position of TRIGGERED2 field. */ +#define EGU_INTENCLR_TRIGGERED2_Msk (0x1UL << EGU_INTENCLR_TRIGGERED2_Pos) /*!< Bit mask of TRIGGERED2 field. */ +#define EGU_INTENCLR_TRIGGERED2_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED2_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED2_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for TRIGGERED[1] event */ +#define EGU_INTENCLR_TRIGGERED1_Pos (1UL) /*!< Position of TRIGGERED1 field. */ +#define EGU_INTENCLR_TRIGGERED1_Msk (0x1UL << EGU_INTENCLR_TRIGGERED1_Pos) /*!< Bit mask of TRIGGERED1 field. */ +#define EGU_INTENCLR_TRIGGERED1_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED1_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED1_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for TRIGGERED[0] event */ +#define EGU_INTENCLR_TRIGGERED0_Pos (0UL) /*!< Position of TRIGGERED0 field. */ +#define EGU_INTENCLR_TRIGGERED0_Msk (0x1UL << EGU_INTENCLR_TRIGGERED0_Pos) /*!< Bit mask of TRIGGERED0 field. */ +#define EGU_INTENCLR_TRIGGERED0_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED0_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED0_Clear (1UL) /*!< Disable */ + + +/* Peripheral: FICR */ +/* Description: Factory information configuration registers */ + +/* Register: FICR_CODEPAGESIZE */ +/* Description: Code memory page size */ + +/* Bits 31..0 : Code memory page size */ +#define FICR_CODEPAGESIZE_CODEPAGESIZE_Pos (0UL) /*!< Position of CODEPAGESIZE field. */ +#define FICR_CODEPAGESIZE_CODEPAGESIZE_Msk (0xFFFFFFFFUL << FICR_CODEPAGESIZE_CODEPAGESIZE_Pos) /*!< Bit mask of CODEPAGESIZE field. */ + +/* Register: FICR_CODESIZE */ +/* Description: Code memory size */ + +/* Bits 31..0 : Code memory size in number of pages */ +#define FICR_CODESIZE_CODESIZE_Pos (0UL) /*!< Position of CODESIZE field. */ +#define FICR_CODESIZE_CODESIZE_Msk (0xFFFFFFFFUL << FICR_CODESIZE_CODESIZE_Pos) /*!< Bit mask of CODESIZE field. */ + +/* Register: FICR_DEVICEID */ +/* Description: Description collection[0]: Device identifier */ + +/* Bits 31..0 : 64 bit unique device identifier */ +#define FICR_DEVICEID_DEVICEID_Pos (0UL) /*!< Position of DEVICEID field. */ +#define FICR_DEVICEID_DEVICEID_Msk (0xFFFFFFFFUL << FICR_DEVICEID_DEVICEID_Pos) /*!< Bit mask of DEVICEID field. */ + +/* Register: FICR_ER */ +/* Description: Description collection[0]: Encryption root, word 0 */ + +/* Bits 31..0 : Encryption root, word n */ +#define FICR_ER_ER_Pos (0UL) /*!< Position of ER field. */ +#define FICR_ER_ER_Msk (0xFFFFFFFFUL << FICR_ER_ER_Pos) /*!< Bit mask of ER field. */ + +/* Register: FICR_IR */ +/* Description: Description collection[0]: Identity root, word 0 */ + +/* Bits 31..0 : Identity root, word n */ +#define FICR_IR_IR_Pos (0UL) /*!< Position of IR field. */ +#define FICR_IR_IR_Msk (0xFFFFFFFFUL << FICR_IR_IR_Pos) /*!< Bit mask of IR field. */ + +/* Register: FICR_DEVICEADDRTYPE */ +/* Description: Device address type */ + +/* Bit 0 : Device address type */ +#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Pos (0UL) /*!< Position of DEVICEADDRTYPE field. */ +#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Msk (0x1UL << FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Pos) /*!< Bit mask of DEVICEADDRTYPE field. */ +#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Public (0UL) /*!< Public address */ +#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Random (1UL) /*!< Random address */ + +/* Register: FICR_DEVICEADDR */ +/* Description: Description collection[0]: Device address 0 */ + +/* Bits 31..0 : 48 bit device address */ +#define FICR_DEVICEADDR_DEVICEADDR_Pos (0UL) /*!< Position of DEVICEADDR field. */ +#define FICR_DEVICEADDR_DEVICEADDR_Msk (0xFFFFFFFFUL << FICR_DEVICEADDR_DEVICEADDR_Pos) /*!< Bit mask of DEVICEADDR field. */ + +/* Register: FICR_INFO_PART */ +/* Description: Part code */ + +/* Bits 31..0 : Part code */ +#define FICR_INFO_PART_PART_Pos (0UL) /*!< Position of PART field. */ +#define FICR_INFO_PART_PART_Msk (0xFFFFFFFFUL << FICR_INFO_PART_PART_Pos) /*!< Bit mask of PART field. */ +#define FICR_INFO_PART_PART_N52810 (0x52810UL) /*!< nRF52810 */ +#define FICR_INFO_PART_PART_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ + +/* Register: FICR_INFO_VARIANT */ +/* Description: Part variant, hardware version and production configuration */ + +/* Bits 31..0 : Part variant, hardware version and production configuration, encoded as ASCII */ +#define FICR_INFO_VARIANT_VARIANT_Pos (0UL) /*!< Position of VARIANT field. */ +#define FICR_INFO_VARIANT_VARIANT_Msk (0xFFFFFFFFUL << FICR_INFO_VARIANT_VARIANT_Pos) /*!< Bit mask of VARIANT field. */ +#define FICR_INFO_VARIANT_VARIANT_AAA0 (0x41414130UL) /*!< AAA0 */ +#define FICR_INFO_VARIANT_VARIANT_AAAA (0x41414141UL) /*!< AAAA */ +#define FICR_INFO_VARIANT_VARIANT_AAB0 (0x41414230UL) /*!< AAB0 */ +#define FICR_INFO_VARIANT_VARIANT_AABA (0x41414241UL) /*!< AABA */ +#define FICR_INFO_VARIANT_VARIANT_AABB (0x41414242UL) /*!< AABB */ +#define FICR_INFO_VARIANT_VARIANT_AAC0 (0x41414330UL) /*!< AAC0 */ +#define FICR_INFO_VARIANT_VARIANT_AACA (0x41414341UL) /*!< AACA */ +#define FICR_INFO_VARIANT_VARIANT_AACB (0x41414342UL) /*!< AACB */ +#define FICR_INFO_VARIANT_VARIANT_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ + +/* Register: FICR_INFO_PACKAGE */ +/* Description: Package option */ + +/* Bits 31..0 : Package option */ +#define FICR_INFO_PACKAGE_PACKAGE_Pos (0UL) /*!< Position of PACKAGE field. */ +#define FICR_INFO_PACKAGE_PACKAGE_Msk (0xFFFFFFFFUL << FICR_INFO_PACKAGE_PACKAGE_Pos) /*!< Bit mask of PACKAGE field. */ +#define FICR_INFO_PACKAGE_PACKAGE_QF (0x2000UL) /*!< QFxx - 48-pin QFN */ +#define FICR_INFO_PACKAGE_PACKAGE_QC (0x2003UL) /*!< QCxx - 32-pin QFN */ +#define FICR_INFO_PACKAGE_PACKAGE_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ + +/* Register: FICR_INFO_RAM */ +/* Description: RAM variant */ + +/* Bits 31..0 : RAM variant */ +#define FICR_INFO_RAM_RAM_Pos (0UL) /*!< Position of RAM field. */ +#define FICR_INFO_RAM_RAM_Msk (0xFFFFFFFFUL << FICR_INFO_RAM_RAM_Pos) /*!< Bit mask of RAM field. */ +#define FICR_INFO_RAM_RAM_K24 (0x18UL) /*!< 24 kByte RAM */ +#define FICR_INFO_RAM_RAM_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ + +/* Register: FICR_INFO_FLASH */ +/* Description: Flash variant */ + +/* Bits 31..0 : Flash variant */ +#define FICR_INFO_FLASH_FLASH_Pos (0UL) /*!< Position of FLASH field. */ +#define FICR_INFO_FLASH_FLASH_Msk (0xFFFFFFFFUL << FICR_INFO_FLASH_FLASH_Pos) /*!< Bit mask of FLASH field. */ +#define FICR_INFO_FLASH_FLASH_K192 (0xC0UL) /*!< 192 kByte flash */ +#define FICR_INFO_FLASH_FLASH_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ + +/* Register: FICR_TEMP_A0 */ +/* Description: Slope definition A0 */ + +/* Bits 11..0 : A (slope definition) register */ +#define FICR_TEMP_A0_A_Pos (0UL) /*!< Position of A field. */ +#define FICR_TEMP_A0_A_Msk (0xFFFUL << FICR_TEMP_A0_A_Pos) /*!< Bit mask of A field. */ + +/* Register: FICR_TEMP_A1 */ +/* Description: Slope definition A1 */ + +/* Bits 11..0 : A (slope definition) register */ +#define FICR_TEMP_A1_A_Pos (0UL) /*!< Position of A field. */ +#define FICR_TEMP_A1_A_Msk (0xFFFUL << FICR_TEMP_A1_A_Pos) /*!< Bit mask of A field. */ + +/* Register: FICR_TEMP_A2 */ +/* Description: Slope definition A2 */ + +/* Bits 11..0 : A (slope definition) register */ +#define FICR_TEMP_A2_A_Pos (0UL) /*!< Position of A field. */ +#define FICR_TEMP_A2_A_Msk (0xFFFUL << FICR_TEMP_A2_A_Pos) /*!< Bit mask of A field. */ + +/* Register: FICR_TEMP_A3 */ +/* Description: Slope definition A3 */ + +/* Bits 11..0 : A (slope definition) register */ +#define FICR_TEMP_A3_A_Pos (0UL) /*!< Position of A field. */ +#define FICR_TEMP_A3_A_Msk (0xFFFUL << FICR_TEMP_A3_A_Pos) /*!< Bit mask of A field. */ + +/* Register: FICR_TEMP_A4 */ +/* Description: Slope definition A4 */ + +/* Bits 11..0 : A (slope definition) register */ +#define FICR_TEMP_A4_A_Pos (0UL) /*!< Position of A field. */ +#define FICR_TEMP_A4_A_Msk (0xFFFUL << FICR_TEMP_A4_A_Pos) /*!< Bit mask of A field. */ + +/* Register: FICR_TEMP_A5 */ +/* Description: Slope definition A5 */ + +/* Bits 11..0 : A (slope definition) register */ +#define FICR_TEMP_A5_A_Pos (0UL) /*!< Position of A field. */ +#define FICR_TEMP_A5_A_Msk (0xFFFUL << FICR_TEMP_A5_A_Pos) /*!< Bit mask of A field. */ + +/* Register: FICR_TEMP_B0 */ +/* Description: Y-intercept B0 */ + +/* Bits 13..0 : B (y-intercept) */ +#define FICR_TEMP_B0_B_Pos (0UL) /*!< Position of B field. */ +#define FICR_TEMP_B0_B_Msk (0x3FFFUL << FICR_TEMP_B0_B_Pos) /*!< Bit mask of B field. */ + +/* Register: FICR_TEMP_B1 */ +/* Description: Y-intercept B1 */ + +/* Bits 13..0 : B (y-intercept) */ +#define FICR_TEMP_B1_B_Pos (0UL) /*!< Position of B field. */ +#define FICR_TEMP_B1_B_Msk (0x3FFFUL << FICR_TEMP_B1_B_Pos) /*!< Bit mask of B field. */ + +/* Register: FICR_TEMP_B2 */ +/* Description: Y-intercept B2 */ + +/* Bits 13..0 : B (y-intercept) */ +#define FICR_TEMP_B2_B_Pos (0UL) /*!< Position of B field. */ +#define FICR_TEMP_B2_B_Msk (0x3FFFUL << FICR_TEMP_B2_B_Pos) /*!< Bit mask of B field. */ + +/* Register: FICR_TEMP_B3 */ +/* Description: Y-intercept B3 */ + +/* Bits 13..0 : B (y-intercept) */ +#define FICR_TEMP_B3_B_Pos (0UL) /*!< Position of B field. */ +#define FICR_TEMP_B3_B_Msk (0x3FFFUL << FICR_TEMP_B3_B_Pos) /*!< Bit mask of B field. */ + +/* Register: FICR_TEMP_B4 */ +/* Description: Y-intercept B4 */ + +/* Bits 13..0 : B (y-intercept) */ +#define FICR_TEMP_B4_B_Pos (0UL) /*!< Position of B field. */ +#define FICR_TEMP_B4_B_Msk (0x3FFFUL << FICR_TEMP_B4_B_Pos) /*!< Bit mask of B field. */ + +/* Register: FICR_TEMP_B5 */ +/* Description: Y-intercept B5 */ + +/* Bits 13..0 : B (y-intercept) */ +#define FICR_TEMP_B5_B_Pos (0UL) /*!< Position of B field. */ +#define FICR_TEMP_B5_B_Msk (0x3FFFUL << FICR_TEMP_B5_B_Pos) /*!< Bit mask of B field. */ + +/* Register: FICR_TEMP_T0 */ +/* Description: Segment end T0 */ + +/* Bits 7..0 : T (segment end) register */ +#define FICR_TEMP_T0_T_Pos (0UL) /*!< Position of T field. */ +#define FICR_TEMP_T0_T_Msk (0xFFUL << FICR_TEMP_T0_T_Pos) /*!< Bit mask of T field. */ + +/* Register: FICR_TEMP_T1 */ +/* Description: Segment end T1 */ + +/* Bits 7..0 : T (segment end) register */ +#define FICR_TEMP_T1_T_Pos (0UL) /*!< Position of T field. */ +#define FICR_TEMP_T1_T_Msk (0xFFUL << FICR_TEMP_T1_T_Pos) /*!< Bit mask of T field. */ + +/* Register: FICR_TEMP_T2 */ +/* Description: Segment end T2 */ + +/* Bits 7..0 : T (segment end) register */ +#define FICR_TEMP_T2_T_Pos (0UL) /*!< Position of T field. */ +#define FICR_TEMP_T2_T_Msk (0xFFUL << FICR_TEMP_T2_T_Pos) /*!< Bit mask of T field. */ + +/* Register: FICR_TEMP_T3 */ +/* Description: Segment end T3 */ + +/* Bits 7..0 : T (segment end) register */ +#define FICR_TEMP_T3_T_Pos (0UL) /*!< Position of T field. */ +#define FICR_TEMP_T3_T_Msk (0xFFUL << FICR_TEMP_T3_T_Pos) /*!< Bit mask of T field. */ + +/* Register: FICR_TEMP_T4 */ +/* Description: Segment end T4 */ + +/* Bits 7..0 : T (segment end) register */ +#define FICR_TEMP_T4_T_Pos (0UL) /*!< Position of T field. */ +#define FICR_TEMP_T4_T_Msk (0xFFUL << FICR_TEMP_T4_T_Pos) /*!< Bit mask of T field. */ + + +/* Peripheral: GPIOTE */ +/* Description: GPIO Tasks and Events */ + +/* Register: GPIOTE_TASKS_OUT */ +/* Description: Description collection[0]: Task for writing to pin specified in CONFIG[0].PSEL. Action on pin is configured in CONFIG[0].POLARITY. */ + +/* Bit 0 : */ +#define GPIOTE_TASKS_OUT_TASKS_OUT_Pos (0UL) /*!< Position of TASKS_OUT field. */ +#define GPIOTE_TASKS_OUT_TASKS_OUT_Msk (0x1UL << GPIOTE_TASKS_OUT_TASKS_OUT_Pos) /*!< Bit mask of TASKS_OUT field. */ + +/* Register: GPIOTE_TASKS_SET */ +/* Description: Description collection[0]: Task for writing to pin specified in CONFIG[0].PSEL. Action on pin is to set it high. */ + +/* Bit 0 : */ +#define GPIOTE_TASKS_SET_TASKS_SET_Pos (0UL) /*!< Position of TASKS_SET field. */ +#define GPIOTE_TASKS_SET_TASKS_SET_Msk (0x1UL << GPIOTE_TASKS_SET_TASKS_SET_Pos) /*!< Bit mask of TASKS_SET field. */ + +/* Register: GPIOTE_TASKS_CLR */ +/* Description: Description collection[0]: Task for writing to pin specified in CONFIG[0].PSEL. Action on pin is to set it low. */ + +/* Bit 0 : */ +#define GPIOTE_TASKS_CLR_TASKS_CLR_Pos (0UL) /*!< Position of TASKS_CLR field. */ +#define GPIOTE_TASKS_CLR_TASKS_CLR_Msk (0x1UL << GPIOTE_TASKS_CLR_TASKS_CLR_Pos) /*!< Bit mask of TASKS_CLR field. */ + +/* Register: GPIOTE_EVENTS_IN */ +/* Description: Description collection[0]: Event generated from pin specified in CONFIG[0].PSEL */ + +/* Bit 0 : */ +#define GPIOTE_EVENTS_IN_EVENTS_IN_Pos (0UL) /*!< Position of EVENTS_IN field. */ +#define GPIOTE_EVENTS_IN_EVENTS_IN_Msk (0x1UL << GPIOTE_EVENTS_IN_EVENTS_IN_Pos) /*!< Bit mask of EVENTS_IN field. */ + +/* Register: GPIOTE_EVENTS_PORT */ +/* Description: Event generated from multiple input GPIO pins with SENSE mechanism enabled */ + +/* Bit 0 : */ +#define GPIOTE_EVENTS_PORT_EVENTS_PORT_Pos (0UL) /*!< Position of EVENTS_PORT field. */ +#define GPIOTE_EVENTS_PORT_EVENTS_PORT_Msk (0x1UL << GPIOTE_EVENTS_PORT_EVENTS_PORT_Pos) /*!< Bit mask of EVENTS_PORT field. */ + +/* Register: GPIOTE_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 31 : Write '1' to Enable interrupt for PORT event */ +#define GPIOTE_INTENSET_PORT_Pos (31UL) /*!< Position of PORT field. */ +#define GPIOTE_INTENSET_PORT_Msk (0x1UL << GPIOTE_INTENSET_PORT_Pos) /*!< Bit mask of PORT field. */ +#define GPIOTE_INTENSET_PORT_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_PORT_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_PORT_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to Enable interrupt for IN[7] event */ +#define GPIOTE_INTENSET_IN7_Pos (7UL) /*!< Position of IN7 field. */ +#define GPIOTE_INTENSET_IN7_Msk (0x1UL << GPIOTE_INTENSET_IN7_Pos) /*!< Bit mask of IN7 field. */ +#define GPIOTE_INTENSET_IN7_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_IN7_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_IN7_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to Enable interrupt for IN[6] event */ +#define GPIOTE_INTENSET_IN6_Pos (6UL) /*!< Position of IN6 field. */ +#define GPIOTE_INTENSET_IN6_Msk (0x1UL << GPIOTE_INTENSET_IN6_Pos) /*!< Bit mask of IN6 field. */ +#define GPIOTE_INTENSET_IN6_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_IN6_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_IN6_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to Enable interrupt for IN[5] event */ +#define GPIOTE_INTENSET_IN5_Pos (5UL) /*!< Position of IN5 field. */ +#define GPIOTE_INTENSET_IN5_Msk (0x1UL << GPIOTE_INTENSET_IN5_Pos) /*!< Bit mask of IN5 field. */ +#define GPIOTE_INTENSET_IN5_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_IN5_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_IN5_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to Enable interrupt for IN[4] event */ +#define GPIOTE_INTENSET_IN4_Pos (4UL) /*!< Position of IN4 field. */ +#define GPIOTE_INTENSET_IN4_Msk (0x1UL << GPIOTE_INTENSET_IN4_Pos) /*!< Bit mask of IN4 field. */ +#define GPIOTE_INTENSET_IN4_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_IN4_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_IN4_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to Enable interrupt for IN[3] event */ +#define GPIOTE_INTENSET_IN3_Pos (3UL) /*!< Position of IN3 field. */ +#define GPIOTE_INTENSET_IN3_Msk (0x1UL << GPIOTE_INTENSET_IN3_Pos) /*!< Bit mask of IN3 field. */ +#define GPIOTE_INTENSET_IN3_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_IN3_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_IN3_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable interrupt for IN[2] event */ +#define GPIOTE_INTENSET_IN2_Pos (2UL) /*!< Position of IN2 field. */ +#define GPIOTE_INTENSET_IN2_Msk (0x1UL << GPIOTE_INTENSET_IN2_Pos) /*!< Bit mask of IN2 field. */ +#define GPIOTE_INTENSET_IN2_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_IN2_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_IN2_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for IN[1] event */ +#define GPIOTE_INTENSET_IN1_Pos (1UL) /*!< Position of IN1 field. */ +#define GPIOTE_INTENSET_IN1_Msk (0x1UL << GPIOTE_INTENSET_IN1_Pos) /*!< Bit mask of IN1 field. */ +#define GPIOTE_INTENSET_IN1_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_IN1_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_IN1_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for IN[0] event */ +#define GPIOTE_INTENSET_IN0_Pos (0UL) /*!< Position of IN0 field. */ +#define GPIOTE_INTENSET_IN0_Msk (0x1UL << GPIOTE_INTENSET_IN0_Pos) /*!< Bit mask of IN0 field. */ +#define GPIOTE_INTENSET_IN0_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_IN0_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_IN0_Set (1UL) /*!< Enable */ + +/* Register: GPIOTE_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 31 : Write '1' to Disable interrupt for PORT event */ +#define GPIOTE_INTENCLR_PORT_Pos (31UL) /*!< Position of PORT field. */ +#define GPIOTE_INTENCLR_PORT_Msk (0x1UL << GPIOTE_INTENCLR_PORT_Pos) /*!< Bit mask of PORT field. */ +#define GPIOTE_INTENCLR_PORT_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_PORT_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_PORT_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to Disable interrupt for IN[7] event */ +#define GPIOTE_INTENCLR_IN7_Pos (7UL) /*!< Position of IN7 field. */ +#define GPIOTE_INTENCLR_IN7_Msk (0x1UL << GPIOTE_INTENCLR_IN7_Pos) /*!< Bit mask of IN7 field. */ +#define GPIOTE_INTENCLR_IN7_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_IN7_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_IN7_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to Disable interrupt for IN[6] event */ +#define GPIOTE_INTENCLR_IN6_Pos (6UL) /*!< Position of IN6 field. */ +#define GPIOTE_INTENCLR_IN6_Msk (0x1UL << GPIOTE_INTENCLR_IN6_Pos) /*!< Bit mask of IN6 field. */ +#define GPIOTE_INTENCLR_IN6_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_IN6_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_IN6_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to Disable interrupt for IN[5] event */ +#define GPIOTE_INTENCLR_IN5_Pos (5UL) /*!< Position of IN5 field. */ +#define GPIOTE_INTENCLR_IN5_Msk (0x1UL << GPIOTE_INTENCLR_IN5_Pos) /*!< Bit mask of IN5 field. */ +#define GPIOTE_INTENCLR_IN5_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_IN5_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_IN5_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to Disable interrupt for IN[4] event */ +#define GPIOTE_INTENCLR_IN4_Pos (4UL) /*!< Position of IN4 field. */ +#define GPIOTE_INTENCLR_IN4_Msk (0x1UL << GPIOTE_INTENCLR_IN4_Pos) /*!< Bit mask of IN4 field. */ +#define GPIOTE_INTENCLR_IN4_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_IN4_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_IN4_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to Disable interrupt for IN[3] event */ +#define GPIOTE_INTENCLR_IN3_Pos (3UL) /*!< Position of IN3 field. */ +#define GPIOTE_INTENCLR_IN3_Msk (0x1UL << GPIOTE_INTENCLR_IN3_Pos) /*!< Bit mask of IN3 field. */ +#define GPIOTE_INTENCLR_IN3_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_IN3_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_IN3_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable interrupt for IN[2] event */ +#define GPIOTE_INTENCLR_IN2_Pos (2UL) /*!< Position of IN2 field. */ +#define GPIOTE_INTENCLR_IN2_Msk (0x1UL << GPIOTE_INTENCLR_IN2_Pos) /*!< Bit mask of IN2 field. */ +#define GPIOTE_INTENCLR_IN2_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_IN2_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_IN2_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for IN[1] event */ +#define GPIOTE_INTENCLR_IN1_Pos (1UL) /*!< Position of IN1 field. */ +#define GPIOTE_INTENCLR_IN1_Msk (0x1UL << GPIOTE_INTENCLR_IN1_Pos) /*!< Bit mask of IN1 field. */ +#define GPIOTE_INTENCLR_IN1_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_IN1_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_IN1_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for IN[0] event */ +#define GPIOTE_INTENCLR_IN0_Pos (0UL) /*!< Position of IN0 field. */ +#define GPIOTE_INTENCLR_IN0_Msk (0x1UL << GPIOTE_INTENCLR_IN0_Pos) /*!< Bit mask of IN0 field. */ +#define GPIOTE_INTENCLR_IN0_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_IN0_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_IN0_Clear (1UL) /*!< Disable */ + +/* Register: GPIOTE_CONFIG */ +/* Description: Description collection[0]: Configuration for OUT[n], SET[n] and CLR[n] tasks and IN[n] event */ + +/* Bit 20 : When in task mode: Initial value of the output when the GPIOTE channel is configured. When in event mode: No effect. */ +#define GPIOTE_CONFIG_OUTINIT_Pos (20UL) /*!< Position of OUTINIT field. */ +#define GPIOTE_CONFIG_OUTINIT_Msk (0x1UL << GPIOTE_CONFIG_OUTINIT_Pos) /*!< Bit mask of OUTINIT field. */ +#define GPIOTE_CONFIG_OUTINIT_Low (0UL) /*!< Task mode: Initial value of pin before task triggering is low */ +#define GPIOTE_CONFIG_OUTINIT_High (1UL) /*!< Task mode: Initial value of pin before task triggering is high */ + +/* Bits 17..16 : When In task mode: Operation to be performed on output when OUT[n] task is triggered. When In event mode: Operation on input that shall trigger IN[n] event. */ +#define GPIOTE_CONFIG_POLARITY_Pos (16UL) /*!< Position of POLARITY field. */ +#define GPIOTE_CONFIG_POLARITY_Msk (0x3UL << GPIOTE_CONFIG_POLARITY_Pos) /*!< Bit mask of POLARITY field. */ +#define GPIOTE_CONFIG_POLARITY_None (0UL) /*!< Task mode: No effect on pin from OUT[n] task. Event mode: no IN[n] event generated on pin activity. */ +#define GPIOTE_CONFIG_POLARITY_LoToHi (1UL) /*!< Task mode: Set pin from OUT[n] task. Event mode: Generate IN[n] event when rising edge on pin. */ +#define GPIOTE_CONFIG_POLARITY_HiToLo (2UL) /*!< Task mode: Clear pin from OUT[n] task. Event mode: Generate IN[n] event when falling edge on pin. */ +#define GPIOTE_CONFIG_POLARITY_Toggle (3UL) /*!< Task mode: Toggle pin from OUT[n]. Event mode: Generate IN[n] when any change on pin. */ + +/* Bits 12..8 : GPIO number associated with SET[n], CLR[n] and OUT[n] tasks and IN[n] event */ +#define GPIOTE_CONFIG_PSEL_Pos (8UL) /*!< Position of PSEL field. */ +#define GPIOTE_CONFIG_PSEL_Msk (0x1FUL << GPIOTE_CONFIG_PSEL_Pos) /*!< Bit mask of PSEL field. */ + +/* Bits 1..0 : Mode */ +#define GPIOTE_CONFIG_MODE_Pos (0UL) /*!< Position of MODE field. */ +#define GPIOTE_CONFIG_MODE_Msk (0x3UL << GPIOTE_CONFIG_MODE_Pos) /*!< Bit mask of MODE field. */ +#define GPIOTE_CONFIG_MODE_Disabled (0UL) /*!< Disabled. Pin specified by PSEL will not be acquired by the GPIOTE module. */ +#define GPIOTE_CONFIG_MODE_Event (1UL) /*!< Event mode */ +#define GPIOTE_CONFIG_MODE_Task (3UL) /*!< Task mode */ + + +/* Peripheral: NVMC */ +/* Description: Non-volatile memory controller */ + +/* Register: NVMC_READY */ +/* Description: Ready flag */ + +/* Bit 0 : NVMC is ready or busy */ +#define NVMC_READY_READY_Pos (0UL) /*!< Position of READY field. */ +#define NVMC_READY_READY_Msk (0x1UL << NVMC_READY_READY_Pos) /*!< Bit mask of READY field. */ +#define NVMC_READY_READY_Busy (0UL) /*!< NVMC is busy (ongoing write or erase operation) */ +#define NVMC_READY_READY_Ready (1UL) /*!< NVMC is ready */ + +/* Register: NVMC_CONFIG */ +/* Description: Configuration register */ + +/* Bits 1..0 : Program memory access mode. It is strongly recommended to activate erase and write modes only when they are actively used. */ +#define NVMC_CONFIG_WEN_Pos (0UL) /*!< Position of WEN field. */ +#define NVMC_CONFIG_WEN_Msk (0x3UL << NVMC_CONFIG_WEN_Pos) /*!< Bit mask of WEN field. */ +#define NVMC_CONFIG_WEN_Ren (0UL) /*!< Read only access */ +#define NVMC_CONFIG_WEN_Wen (1UL) /*!< Write enabled */ +#define NVMC_CONFIG_WEN_Een (2UL) /*!< Erase enabled */ + +/* Register: NVMC_ERASEPCR1 */ +/* Description: Deprecated register - Register for erasing a page in code area. Equivalent to ERASEPAGE. */ + +/* Bits 31..0 : Register for erasing a page in code area. Equivalent to ERASEPAGE. */ +#define NVMC_ERASEPCR1_ERASEPCR1_Pos (0UL) /*!< Position of ERASEPCR1 field. */ +#define NVMC_ERASEPCR1_ERASEPCR1_Msk (0xFFFFFFFFUL << NVMC_ERASEPCR1_ERASEPCR1_Pos) /*!< Bit mask of ERASEPCR1 field. */ + +/* Register: NVMC_ERASEPAGE */ +/* Description: Register for erasing a page in code area */ + +/* Bits 31..0 : Register for starting erase of a page in code area. */ +#define NVMC_ERASEPAGE_ERASEPAGE_Pos (0UL) /*!< Position of ERASEPAGE field. */ +#define NVMC_ERASEPAGE_ERASEPAGE_Msk (0xFFFFFFFFUL << NVMC_ERASEPAGE_ERASEPAGE_Pos) /*!< Bit mask of ERASEPAGE field. */ + +/* Register: NVMC_ERASEALL */ +/* Description: Register for erasing all non-volatile user memory */ + +/* Bit 0 : Erase all non-volatile memory including UICR registers. Note that the erase must be enabled using CONFIG.WEN before the non-volatile memory can be erased. */ +#define NVMC_ERASEALL_ERASEALL_Pos (0UL) /*!< Position of ERASEALL field. */ +#define NVMC_ERASEALL_ERASEALL_Msk (0x1UL << NVMC_ERASEALL_ERASEALL_Pos) /*!< Bit mask of ERASEALL field. */ +#define NVMC_ERASEALL_ERASEALL_NoOperation (0UL) /*!< No operation */ +#define NVMC_ERASEALL_ERASEALL_Erase (1UL) /*!< Start erase of chip */ + +/* Register: NVMC_ERASEPCR0 */ +/* Description: Deprecated register - Register for erasing a page in code area. Equivalent to ERASEPAGE. */ + +/* Bits 31..0 : Register for starting erase of a page in code area. Equivalent to ERASEPAGE. */ +#define NVMC_ERASEPCR0_ERASEPCR0_Pos (0UL) /*!< Position of ERASEPCR0 field. */ +#define NVMC_ERASEPCR0_ERASEPCR0_Msk (0xFFFFFFFFUL << NVMC_ERASEPCR0_ERASEPCR0_Pos) /*!< Bit mask of ERASEPCR0 field. */ + +/* Register: NVMC_ERASEUICR */ +/* Description: Register for erasing user information configuration registers */ + +/* Bit 0 : Register starting erase of all user information configuration registers. Note that the erase must be enabled using CONFIG.WEN before the UICR can be erased. */ +#define NVMC_ERASEUICR_ERASEUICR_Pos (0UL) /*!< Position of ERASEUICR field. */ +#define NVMC_ERASEUICR_ERASEUICR_Msk (0x1UL << NVMC_ERASEUICR_ERASEUICR_Pos) /*!< Bit mask of ERASEUICR field. */ +#define NVMC_ERASEUICR_ERASEUICR_NoOperation (0UL) /*!< No operation */ +#define NVMC_ERASEUICR_ERASEUICR_Erase (1UL) /*!< Start erase of UICR */ + + +/* Peripheral: GPIO */ +/* Description: GPIO Port */ + +/* Register: GPIO_OUT */ +/* Description: Write GPIO port */ + +/* Bit 31 : Pin 31 */ +#define GPIO_OUT_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_OUT_PIN31_Msk (0x1UL << GPIO_OUT_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_OUT_PIN31_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN31_High (1UL) /*!< Pin driver is high */ + +/* Bit 30 : Pin 30 */ +#define GPIO_OUT_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_OUT_PIN30_Msk (0x1UL << GPIO_OUT_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_OUT_PIN30_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN30_High (1UL) /*!< Pin driver is high */ + +/* Bit 29 : Pin 29 */ +#define GPIO_OUT_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_OUT_PIN29_Msk (0x1UL << GPIO_OUT_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_OUT_PIN29_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN29_High (1UL) /*!< Pin driver is high */ + +/* Bit 28 : Pin 28 */ +#define GPIO_OUT_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_OUT_PIN28_Msk (0x1UL << GPIO_OUT_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_OUT_PIN28_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN28_High (1UL) /*!< Pin driver is high */ + +/* Bit 27 : Pin 27 */ +#define GPIO_OUT_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_OUT_PIN27_Msk (0x1UL << GPIO_OUT_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_OUT_PIN27_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN27_High (1UL) /*!< Pin driver is high */ + +/* Bit 26 : Pin 26 */ +#define GPIO_OUT_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_OUT_PIN26_Msk (0x1UL << GPIO_OUT_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_OUT_PIN26_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN26_High (1UL) /*!< Pin driver is high */ + +/* Bit 25 : Pin 25 */ +#define GPIO_OUT_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_OUT_PIN25_Msk (0x1UL << GPIO_OUT_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_OUT_PIN25_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN25_High (1UL) /*!< Pin driver is high */ + +/* Bit 24 : Pin 24 */ +#define GPIO_OUT_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_OUT_PIN24_Msk (0x1UL << GPIO_OUT_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_OUT_PIN24_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN24_High (1UL) /*!< Pin driver is high */ + +/* Bit 23 : Pin 23 */ +#define GPIO_OUT_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_OUT_PIN23_Msk (0x1UL << GPIO_OUT_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_OUT_PIN23_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN23_High (1UL) /*!< Pin driver is high */ + +/* Bit 22 : Pin 22 */ +#define GPIO_OUT_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_OUT_PIN22_Msk (0x1UL << GPIO_OUT_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_OUT_PIN22_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN22_High (1UL) /*!< Pin driver is high */ + +/* Bit 21 : Pin 21 */ +#define GPIO_OUT_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_OUT_PIN21_Msk (0x1UL << GPIO_OUT_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_OUT_PIN21_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN21_High (1UL) /*!< Pin driver is high */ + +/* Bit 20 : Pin 20 */ +#define GPIO_OUT_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_OUT_PIN20_Msk (0x1UL << GPIO_OUT_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_OUT_PIN20_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN20_High (1UL) /*!< Pin driver is high */ + +/* Bit 19 : Pin 19 */ +#define GPIO_OUT_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_OUT_PIN19_Msk (0x1UL << GPIO_OUT_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_OUT_PIN19_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN19_High (1UL) /*!< Pin driver is high */ + +/* Bit 18 : Pin 18 */ +#define GPIO_OUT_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_OUT_PIN18_Msk (0x1UL << GPIO_OUT_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_OUT_PIN18_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN18_High (1UL) /*!< Pin driver is high */ + +/* Bit 17 : Pin 17 */ +#define GPIO_OUT_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_OUT_PIN17_Msk (0x1UL << GPIO_OUT_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_OUT_PIN17_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN17_High (1UL) /*!< Pin driver is high */ + +/* Bit 16 : Pin 16 */ +#define GPIO_OUT_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_OUT_PIN16_Msk (0x1UL << GPIO_OUT_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_OUT_PIN16_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN16_High (1UL) /*!< Pin driver is high */ + +/* Bit 15 : Pin 15 */ +#define GPIO_OUT_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_OUT_PIN15_Msk (0x1UL << GPIO_OUT_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_OUT_PIN15_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN15_High (1UL) /*!< Pin driver is high */ + +/* Bit 14 : Pin 14 */ +#define GPIO_OUT_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_OUT_PIN14_Msk (0x1UL << GPIO_OUT_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_OUT_PIN14_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN14_High (1UL) /*!< Pin driver is high */ + +/* Bit 13 : Pin 13 */ +#define GPIO_OUT_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_OUT_PIN13_Msk (0x1UL << GPIO_OUT_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_OUT_PIN13_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN13_High (1UL) /*!< Pin driver is high */ + +/* Bit 12 : Pin 12 */ +#define GPIO_OUT_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_OUT_PIN12_Msk (0x1UL << GPIO_OUT_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_OUT_PIN12_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN12_High (1UL) /*!< Pin driver is high */ + +/* Bit 11 : Pin 11 */ +#define GPIO_OUT_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_OUT_PIN11_Msk (0x1UL << GPIO_OUT_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_OUT_PIN11_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN11_High (1UL) /*!< Pin driver is high */ + +/* Bit 10 : Pin 10 */ +#define GPIO_OUT_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_OUT_PIN10_Msk (0x1UL << GPIO_OUT_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_OUT_PIN10_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN10_High (1UL) /*!< Pin driver is high */ + +/* Bit 9 : Pin 9 */ +#define GPIO_OUT_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_OUT_PIN9_Msk (0x1UL << GPIO_OUT_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_OUT_PIN9_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN9_High (1UL) /*!< Pin driver is high */ + +/* Bit 8 : Pin 8 */ +#define GPIO_OUT_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_OUT_PIN8_Msk (0x1UL << GPIO_OUT_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_OUT_PIN8_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN8_High (1UL) /*!< Pin driver is high */ + +/* Bit 7 : Pin 7 */ +#define GPIO_OUT_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_OUT_PIN7_Msk (0x1UL << GPIO_OUT_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_OUT_PIN7_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN7_High (1UL) /*!< Pin driver is high */ + +/* Bit 6 : Pin 6 */ +#define GPIO_OUT_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_OUT_PIN6_Msk (0x1UL << GPIO_OUT_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_OUT_PIN6_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN6_High (1UL) /*!< Pin driver is high */ + +/* Bit 5 : Pin 5 */ +#define GPIO_OUT_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_OUT_PIN5_Msk (0x1UL << GPIO_OUT_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_OUT_PIN5_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN5_High (1UL) /*!< Pin driver is high */ + +/* Bit 4 : Pin 4 */ +#define GPIO_OUT_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_OUT_PIN4_Msk (0x1UL << GPIO_OUT_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_OUT_PIN4_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN4_High (1UL) /*!< Pin driver is high */ + +/* Bit 3 : Pin 3 */ +#define GPIO_OUT_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_OUT_PIN3_Msk (0x1UL << GPIO_OUT_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_OUT_PIN3_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN3_High (1UL) /*!< Pin driver is high */ + +/* Bit 2 : Pin 2 */ +#define GPIO_OUT_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_OUT_PIN2_Msk (0x1UL << GPIO_OUT_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_OUT_PIN2_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN2_High (1UL) /*!< Pin driver is high */ + +/* Bit 1 : Pin 1 */ +#define GPIO_OUT_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_OUT_PIN1_Msk (0x1UL << GPIO_OUT_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_OUT_PIN1_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN1_High (1UL) /*!< Pin driver is high */ + +/* Bit 0 : Pin 0 */ +#define GPIO_OUT_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_OUT_PIN0_Msk (0x1UL << GPIO_OUT_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_OUT_PIN0_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN0_High (1UL) /*!< Pin driver is high */ + +/* Register: GPIO_OUTSET */ +/* Description: Set individual bits in GPIO port */ + +/* Bit 31 : Pin 31 */ +#define GPIO_OUTSET_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_OUTSET_PIN31_Msk (0x1UL << GPIO_OUTSET_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_OUTSET_PIN31_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN31_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN31_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 30 : Pin 30 */ +#define GPIO_OUTSET_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_OUTSET_PIN30_Msk (0x1UL << GPIO_OUTSET_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_OUTSET_PIN30_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN30_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN30_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 29 : Pin 29 */ +#define GPIO_OUTSET_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_OUTSET_PIN29_Msk (0x1UL << GPIO_OUTSET_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_OUTSET_PIN29_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN29_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN29_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 28 : Pin 28 */ +#define GPIO_OUTSET_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_OUTSET_PIN28_Msk (0x1UL << GPIO_OUTSET_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_OUTSET_PIN28_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN28_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN28_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 27 : Pin 27 */ +#define GPIO_OUTSET_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_OUTSET_PIN27_Msk (0x1UL << GPIO_OUTSET_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_OUTSET_PIN27_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN27_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN27_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 26 : Pin 26 */ +#define GPIO_OUTSET_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_OUTSET_PIN26_Msk (0x1UL << GPIO_OUTSET_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_OUTSET_PIN26_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN26_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN26_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 25 : Pin 25 */ +#define GPIO_OUTSET_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_OUTSET_PIN25_Msk (0x1UL << GPIO_OUTSET_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_OUTSET_PIN25_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN25_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN25_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 24 : Pin 24 */ +#define GPIO_OUTSET_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_OUTSET_PIN24_Msk (0x1UL << GPIO_OUTSET_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_OUTSET_PIN24_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN24_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN24_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 23 : Pin 23 */ +#define GPIO_OUTSET_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_OUTSET_PIN23_Msk (0x1UL << GPIO_OUTSET_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_OUTSET_PIN23_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN23_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN23_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 22 : Pin 22 */ +#define GPIO_OUTSET_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_OUTSET_PIN22_Msk (0x1UL << GPIO_OUTSET_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_OUTSET_PIN22_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN22_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN22_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 21 : Pin 21 */ +#define GPIO_OUTSET_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_OUTSET_PIN21_Msk (0x1UL << GPIO_OUTSET_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_OUTSET_PIN21_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN21_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN21_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 20 : Pin 20 */ +#define GPIO_OUTSET_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_OUTSET_PIN20_Msk (0x1UL << GPIO_OUTSET_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_OUTSET_PIN20_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN20_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN20_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 19 : Pin 19 */ +#define GPIO_OUTSET_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_OUTSET_PIN19_Msk (0x1UL << GPIO_OUTSET_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_OUTSET_PIN19_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN19_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN19_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 18 : Pin 18 */ +#define GPIO_OUTSET_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_OUTSET_PIN18_Msk (0x1UL << GPIO_OUTSET_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_OUTSET_PIN18_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN18_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN18_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 17 : Pin 17 */ +#define GPIO_OUTSET_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_OUTSET_PIN17_Msk (0x1UL << GPIO_OUTSET_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_OUTSET_PIN17_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN17_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN17_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 16 : Pin 16 */ +#define GPIO_OUTSET_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_OUTSET_PIN16_Msk (0x1UL << GPIO_OUTSET_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_OUTSET_PIN16_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN16_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN16_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 15 : Pin 15 */ +#define GPIO_OUTSET_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_OUTSET_PIN15_Msk (0x1UL << GPIO_OUTSET_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_OUTSET_PIN15_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN15_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN15_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 14 : Pin 14 */ +#define GPIO_OUTSET_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_OUTSET_PIN14_Msk (0x1UL << GPIO_OUTSET_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_OUTSET_PIN14_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN14_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN14_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 13 : Pin 13 */ +#define GPIO_OUTSET_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_OUTSET_PIN13_Msk (0x1UL << GPIO_OUTSET_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_OUTSET_PIN13_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN13_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN13_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 12 : Pin 12 */ +#define GPIO_OUTSET_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_OUTSET_PIN12_Msk (0x1UL << GPIO_OUTSET_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_OUTSET_PIN12_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN12_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN12_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 11 : Pin 11 */ +#define GPIO_OUTSET_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_OUTSET_PIN11_Msk (0x1UL << GPIO_OUTSET_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_OUTSET_PIN11_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN11_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN11_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 10 : Pin 10 */ +#define GPIO_OUTSET_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_OUTSET_PIN10_Msk (0x1UL << GPIO_OUTSET_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_OUTSET_PIN10_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN10_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN10_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 9 : Pin 9 */ +#define GPIO_OUTSET_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_OUTSET_PIN9_Msk (0x1UL << GPIO_OUTSET_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_OUTSET_PIN9_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN9_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN9_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 8 : Pin 8 */ +#define GPIO_OUTSET_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_OUTSET_PIN8_Msk (0x1UL << GPIO_OUTSET_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_OUTSET_PIN8_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN8_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN8_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 7 : Pin 7 */ +#define GPIO_OUTSET_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_OUTSET_PIN7_Msk (0x1UL << GPIO_OUTSET_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_OUTSET_PIN7_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN7_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN7_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 6 : Pin 6 */ +#define GPIO_OUTSET_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_OUTSET_PIN6_Msk (0x1UL << GPIO_OUTSET_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_OUTSET_PIN6_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN6_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN6_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 5 : Pin 5 */ +#define GPIO_OUTSET_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_OUTSET_PIN5_Msk (0x1UL << GPIO_OUTSET_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_OUTSET_PIN5_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN5_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN5_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 4 : Pin 4 */ +#define GPIO_OUTSET_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_OUTSET_PIN4_Msk (0x1UL << GPIO_OUTSET_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_OUTSET_PIN4_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN4_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN4_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 3 : Pin 3 */ +#define GPIO_OUTSET_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_OUTSET_PIN3_Msk (0x1UL << GPIO_OUTSET_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_OUTSET_PIN3_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN3_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN3_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 2 : Pin 2 */ +#define GPIO_OUTSET_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_OUTSET_PIN2_Msk (0x1UL << GPIO_OUTSET_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_OUTSET_PIN2_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN2_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN2_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 1 : Pin 1 */ +#define GPIO_OUTSET_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_OUTSET_PIN1_Msk (0x1UL << GPIO_OUTSET_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_OUTSET_PIN1_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN1_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN1_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 0 : Pin 0 */ +#define GPIO_OUTSET_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_OUTSET_PIN0_Msk (0x1UL << GPIO_OUTSET_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_OUTSET_PIN0_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN0_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN0_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Register: GPIO_OUTCLR */ +/* Description: Clear individual bits in GPIO port */ + +/* Bit 31 : Pin 31 */ +#define GPIO_OUTCLR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_OUTCLR_PIN31_Msk (0x1UL << GPIO_OUTCLR_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_OUTCLR_PIN31_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN31_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN31_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 30 : Pin 30 */ +#define GPIO_OUTCLR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_OUTCLR_PIN30_Msk (0x1UL << GPIO_OUTCLR_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_OUTCLR_PIN30_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN30_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN30_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 29 : Pin 29 */ +#define GPIO_OUTCLR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_OUTCLR_PIN29_Msk (0x1UL << GPIO_OUTCLR_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_OUTCLR_PIN29_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN29_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN29_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 28 : Pin 28 */ +#define GPIO_OUTCLR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_OUTCLR_PIN28_Msk (0x1UL << GPIO_OUTCLR_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_OUTCLR_PIN28_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN28_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN28_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 27 : Pin 27 */ +#define GPIO_OUTCLR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_OUTCLR_PIN27_Msk (0x1UL << GPIO_OUTCLR_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_OUTCLR_PIN27_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN27_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN27_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 26 : Pin 26 */ +#define GPIO_OUTCLR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_OUTCLR_PIN26_Msk (0x1UL << GPIO_OUTCLR_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_OUTCLR_PIN26_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN26_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN26_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 25 : Pin 25 */ +#define GPIO_OUTCLR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_OUTCLR_PIN25_Msk (0x1UL << GPIO_OUTCLR_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_OUTCLR_PIN25_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN25_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN25_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 24 : Pin 24 */ +#define GPIO_OUTCLR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_OUTCLR_PIN24_Msk (0x1UL << GPIO_OUTCLR_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_OUTCLR_PIN24_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN24_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN24_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 23 : Pin 23 */ +#define GPIO_OUTCLR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_OUTCLR_PIN23_Msk (0x1UL << GPIO_OUTCLR_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_OUTCLR_PIN23_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN23_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN23_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 22 : Pin 22 */ +#define GPIO_OUTCLR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_OUTCLR_PIN22_Msk (0x1UL << GPIO_OUTCLR_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_OUTCLR_PIN22_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN22_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN22_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 21 : Pin 21 */ +#define GPIO_OUTCLR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_OUTCLR_PIN21_Msk (0x1UL << GPIO_OUTCLR_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_OUTCLR_PIN21_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN21_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN21_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 20 : Pin 20 */ +#define GPIO_OUTCLR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_OUTCLR_PIN20_Msk (0x1UL << GPIO_OUTCLR_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_OUTCLR_PIN20_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN20_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN20_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 19 : Pin 19 */ +#define GPIO_OUTCLR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_OUTCLR_PIN19_Msk (0x1UL << GPIO_OUTCLR_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_OUTCLR_PIN19_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN19_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN19_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 18 : Pin 18 */ +#define GPIO_OUTCLR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_OUTCLR_PIN18_Msk (0x1UL << GPIO_OUTCLR_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_OUTCLR_PIN18_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN18_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN18_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 17 : Pin 17 */ +#define GPIO_OUTCLR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_OUTCLR_PIN17_Msk (0x1UL << GPIO_OUTCLR_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_OUTCLR_PIN17_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN17_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN17_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 16 : Pin 16 */ +#define GPIO_OUTCLR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_OUTCLR_PIN16_Msk (0x1UL << GPIO_OUTCLR_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_OUTCLR_PIN16_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN16_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN16_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 15 : Pin 15 */ +#define GPIO_OUTCLR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_OUTCLR_PIN15_Msk (0x1UL << GPIO_OUTCLR_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_OUTCLR_PIN15_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN15_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN15_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 14 : Pin 14 */ +#define GPIO_OUTCLR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_OUTCLR_PIN14_Msk (0x1UL << GPIO_OUTCLR_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_OUTCLR_PIN14_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN14_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN14_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 13 : Pin 13 */ +#define GPIO_OUTCLR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_OUTCLR_PIN13_Msk (0x1UL << GPIO_OUTCLR_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_OUTCLR_PIN13_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN13_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN13_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 12 : Pin 12 */ +#define GPIO_OUTCLR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_OUTCLR_PIN12_Msk (0x1UL << GPIO_OUTCLR_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_OUTCLR_PIN12_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN12_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN12_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 11 : Pin 11 */ +#define GPIO_OUTCLR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_OUTCLR_PIN11_Msk (0x1UL << GPIO_OUTCLR_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_OUTCLR_PIN11_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN11_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN11_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 10 : Pin 10 */ +#define GPIO_OUTCLR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_OUTCLR_PIN10_Msk (0x1UL << GPIO_OUTCLR_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_OUTCLR_PIN10_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN10_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN10_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 9 : Pin 9 */ +#define GPIO_OUTCLR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_OUTCLR_PIN9_Msk (0x1UL << GPIO_OUTCLR_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_OUTCLR_PIN9_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN9_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN9_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 8 : Pin 8 */ +#define GPIO_OUTCLR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_OUTCLR_PIN8_Msk (0x1UL << GPIO_OUTCLR_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_OUTCLR_PIN8_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN8_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN8_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 7 : Pin 7 */ +#define GPIO_OUTCLR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_OUTCLR_PIN7_Msk (0x1UL << GPIO_OUTCLR_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_OUTCLR_PIN7_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN7_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN7_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 6 : Pin 6 */ +#define GPIO_OUTCLR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_OUTCLR_PIN6_Msk (0x1UL << GPIO_OUTCLR_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_OUTCLR_PIN6_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN6_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN6_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 5 : Pin 5 */ +#define GPIO_OUTCLR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_OUTCLR_PIN5_Msk (0x1UL << GPIO_OUTCLR_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_OUTCLR_PIN5_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN5_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN5_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 4 : Pin 4 */ +#define GPIO_OUTCLR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_OUTCLR_PIN4_Msk (0x1UL << GPIO_OUTCLR_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_OUTCLR_PIN4_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN4_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN4_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 3 : Pin 3 */ +#define GPIO_OUTCLR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_OUTCLR_PIN3_Msk (0x1UL << GPIO_OUTCLR_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_OUTCLR_PIN3_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN3_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN3_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 2 : Pin 2 */ +#define GPIO_OUTCLR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_OUTCLR_PIN2_Msk (0x1UL << GPIO_OUTCLR_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_OUTCLR_PIN2_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN2_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN2_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 1 : Pin 1 */ +#define GPIO_OUTCLR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_OUTCLR_PIN1_Msk (0x1UL << GPIO_OUTCLR_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_OUTCLR_PIN1_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN1_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN1_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 0 : Pin 0 */ +#define GPIO_OUTCLR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_OUTCLR_PIN0_Msk (0x1UL << GPIO_OUTCLR_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_OUTCLR_PIN0_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN0_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN0_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Register: GPIO_IN */ +/* Description: Read GPIO port */ + +/* Bit 31 : Pin 31 */ +#define GPIO_IN_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_IN_PIN31_Msk (0x1UL << GPIO_IN_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_IN_PIN31_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN31_High (1UL) /*!< Pin input is high */ + +/* Bit 30 : Pin 30 */ +#define GPIO_IN_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_IN_PIN30_Msk (0x1UL << GPIO_IN_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_IN_PIN30_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN30_High (1UL) /*!< Pin input is high */ + +/* Bit 29 : Pin 29 */ +#define GPIO_IN_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_IN_PIN29_Msk (0x1UL << GPIO_IN_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_IN_PIN29_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN29_High (1UL) /*!< Pin input is high */ + +/* Bit 28 : Pin 28 */ +#define GPIO_IN_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_IN_PIN28_Msk (0x1UL << GPIO_IN_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_IN_PIN28_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN28_High (1UL) /*!< Pin input is high */ + +/* Bit 27 : Pin 27 */ +#define GPIO_IN_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_IN_PIN27_Msk (0x1UL << GPIO_IN_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_IN_PIN27_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN27_High (1UL) /*!< Pin input is high */ + +/* Bit 26 : Pin 26 */ +#define GPIO_IN_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_IN_PIN26_Msk (0x1UL << GPIO_IN_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_IN_PIN26_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN26_High (1UL) /*!< Pin input is high */ + +/* Bit 25 : Pin 25 */ +#define GPIO_IN_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_IN_PIN25_Msk (0x1UL << GPIO_IN_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_IN_PIN25_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN25_High (1UL) /*!< Pin input is high */ + +/* Bit 24 : Pin 24 */ +#define GPIO_IN_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_IN_PIN24_Msk (0x1UL << GPIO_IN_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_IN_PIN24_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN24_High (1UL) /*!< Pin input is high */ + +/* Bit 23 : Pin 23 */ +#define GPIO_IN_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_IN_PIN23_Msk (0x1UL << GPIO_IN_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_IN_PIN23_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN23_High (1UL) /*!< Pin input is high */ + +/* Bit 22 : Pin 22 */ +#define GPIO_IN_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_IN_PIN22_Msk (0x1UL << GPIO_IN_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_IN_PIN22_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN22_High (1UL) /*!< Pin input is high */ + +/* Bit 21 : Pin 21 */ +#define GPIO_IN_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_IN_PIN21_Msk (0x1UL << GPIO_IN_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_IN_PIN21_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN21_High (1UL) /*!< Pin input is high */ + +/* Bit 20 : Pin 20 */ +#define GPIO_IN_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_IN_PIN20_Msk (0x1UL << GPIO_IN_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_IN_PIN20_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN20_High (1UL) /*!< Pin input is high */ + +/* Bit 19 : Pin 19 */ +#define GPIO_IN_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_IN_PIN19_Msk (0x1UL << GPIO_IN_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_IN_PIN19_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN19_High (1UL) /*!< Pin input is high */ + +/* Bit 18 : Pin 18 */ +#define GPIO_IN_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_IN_PIN18_Msk (0x1UL << GPIO_IN_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_IN_PIN18_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN18_High (1UL) /*!< Pin input is high */ + +/* Bit 17 : Pin 17 */ +#define GPIO_IN_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_IN_PIN17_Msk (0x1UL << GPIO_IN_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_IN_PIN17_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN17_High (1UL) /*!< Pin input is high */ + +/* Bit 16 : Pin 16 */ +#define GPIO_IN_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_IN_PIN16_Msk (0x1UL << GPIO_IN_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_IN_PIN16_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN16_High (1UL) /*!< Pin input is high */ + +/* Bit 15 : Pin 15 */ +#define GPIO_IN_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_IN_PIN15_Msk (0x1UL << GPIO_IN_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_IN_PIN15_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN15_High (1UL) /*!< Pin input is high */ + +/* Bit 14 : Pin 14 */ +#define GPIO_IN_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_IN_PIN14_Msk (0x1UL << GPIO_IN_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_IN_PIN14_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN14_High (1UL) /*!< Pin input is high */ + +/* Bit 13 : Pin 13 */ +#define GPIO_IN_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_IN_PIN13_Msk (0x1UL << GPIO_IN_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_IN_PIN13_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN13_High (1UL) /*!< Pin input is high */ + +/* Bit 12 : Pin 12 */ +#define GPIO_IN_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_IN_PIN12_Msk (0x1UL << GPIO_IN_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_IN_PIN12_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN12_High (1UL) /*!< Pin input is high */ + +/* Bit 11 : Pin 11 */ +#define GPIO_IN_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_IN_PIN11_Msk (0x1UL << GPIO_IN_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_IN_PIN11_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN11_High (1UL) /*!< Pin input is high */ + +/* Bit 10 : Pin 10 */ +#define GPIO_IN_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_IN_PIN10_Msk (0x1UL << GPIO_IN_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_IN_PIN10_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN10_High (1UL) /*!< Pin input is high */ + +/* Bit 9 : Pin 9 */ +#define GPIO_IN_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_IN_PIN9_Msk (0x1UL << GPIO_IN_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_IN_PIN9_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN9_High (1UL) /*!< Pin input is high */ + +/* Bit 8 : Pin 8 */ +#define GPIO_IN_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_IN_PIN8_Msk (0x1UL << GPIO_IN_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_IN_PIN8_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN8_High (1UL) /*!< Pin input is high */ + +/* Bit 7 : Pin 7 */ +#define GPIO_IN_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_IN_PIN7_Msk (0x1UL << GPIO_IN_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_IN_PIN7_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN7_High (1UL) /*!< Pin input is high */ + +/* Bit 6 : Pin 6 */ +#define GPIO_IN_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_IN_PIN6_Msk (0x1UL << GPIO_IN_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_IN_PIN6_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN6_High (1UL) /*!< Pin input is high */ + +/* Bit 5 : Pin 5 */ +#define GPIO_IN_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_IN_PIN5_Msk (0x1UL << GPIO_IN_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_IN_PIN5_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN5_High (1UL) /*!< Pin input is high */ + +/* Bit 4 : Pin 4 */ +#define GPIO_IN_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_IN_PIN4_Msk (0x1UL << GPIO_IN_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_IN_PIN4_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN4_High (1UL) /*!< Pin input is high */ + +/* Bit 3 : Pin 3 */ +#define GPIO_IN_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_IN_PIN3_Msk (0x1UL << GPIO_IN_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_IN_PIN3_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN3_High (1UL) /*!< Pin input is high */ + +/* Bit 2 : Pin 2 */ +#define GPIO_IN_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_IN_PIN2_Msk (0x1UL << GPIO_IN_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_IN_PIN2_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN2_High (1UL) /*!< Pin input is high */ + +/* Bit 1 : Pin 1 */ +#define GPIO_IN_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_IN_PIN1_Msk (0x1UL << GPIO_IN_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_IN_PIN1_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN1_High (1UL) /*!< Pin input is high */ + +/* Bit 0 : Pin 0 */ +#define GPIO_IN_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_IN_PIN0_Msk (0x1UL << GPIO_IN_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_IN_PIN0_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN0_High (1UL) /*!< Pin input is high */ + +/* Register: GPIO_DIR */ +/* Description: Direction of GPIO pins */ + +/* Bit 31 : Pin 31 */ +#define GPIO_DIR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_DIR_PIN31_Msk (0x1UL << GPIO_DIR_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_DIR_PIN31_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN31_Output (1UL) /*!< Pin set as output */ + +/* Bit 30 : Pin 30 */ +#define GPIO_DIR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_DIR_PIN30_Msk (0x1UL << GPIO_DIR_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_DIR_PIN30_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN30_Output (1UL) /*!< Pin set as output */ + +/* Bit 29 : Pin 29 */ +#define GPIO_DIR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_DIR_PIN29_Msk (0x1UL << GPIO_DIR_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_DIR_PIN29_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN29_Output (1UL) /*!< Pin set as output */ + +/* Bit 28 : Pin 28 */ +#define GPIO_DIR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_DIR_PIN28_Msk (0x1UL << GPIO_DIR_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_DIR_PIN28_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN28_Output (1UL) /*!< Pin set as output */ + +/* Bit 27 : Pin 27 */ +#define GPIO_DIR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_DIR_PIN27_Msk (0x1UL << GPIO_DIR_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_DIR_PIN27_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN27_Output (1UL) /*!< Pin set as output */ + +/* Bit 26 : Pin 26 */ +#define GPIO_DIR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_DIR_PIN26_Msk (0x1UL << GPIO_DIR_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_DIR_PIN26_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN26_Output (1UL) /*!< Pin set as output */ + +/* Bit 25 : Pin 25 */ +#define GPIO_DIR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_DIR_PIN25_Msk (0x1UL << GPIO_DIR_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_DIR_PIN25_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN25_Output (1UL) /*!< Pin set as output */ + +/* Bit 24 : Pin 24 */ +#define GPIO_DIR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_DIR_PIN24_Msk (0x1UL << GPIO_DIR_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_DIR_PIN24_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN24_Output (1UL) /*!< Pin set as output */ + +/* Bit 23 : Pin 23 */ +#define GPIO_DIR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_DIR_PIN23_Msk (0x1UL << GPIO_DIR_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_DIR_PIN23_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN23_Output (1UL) /*!< Pin set as output */ + +/* Bit 22 : Pin 22 */ +#define GPIO_DIR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_DIR_PIN22_Msk (0x1UL << GPIO_DIR_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_DIR_PIN22_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN22_Output (1UL) /*!< Pin set as output */ + +/* Bit 21 : Pin 21 */ +#define GPIO_DIR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_DIR_PIN21_Msk (0x1UL << GPIO_DIR_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_DIR_PIN21_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN21_Output (1UL) /*!< Pin set as output */ + +/* Bit 20 : Pin 20 */ +#define GPIO_DIR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_DIR_PIN20_Msk (0x1UL << GPIO_DIR_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_DIR_PIN20_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN20_Output (1UL) /*!< Pin set as output */ + +/* Bit 19 : Pin 19 */ +#define GPIO_DIR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_DIR_PIN19_Msk (0x1UL << GPIO_DIR_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_DIR_PIN19_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN19_Output (1UL) /*!< Pin set as output */ + +/* Bit 18 : Pin 18 */ +#define GPIO_DIR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_DIR_PIN18_Msk (0x1UL << GPIO_DIR_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_DIR_PIN18_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN18_Output (1UL) /*!< Pin set as output */ + +/* Bit 17 : Pin 17 */ +#define GPIO_DIR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_DIR_PIN17_Msk (0x1UL << GPIO_DIR_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_DIR_PIN17_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN17_Output (1UL) /*!< Pin set as output */ + +/* Bit 16 : Pin 16 */ +#define GPIO_DIR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_DIR_PIN16_Msk (0x1UL << GPIO_DIR_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_DIR_PIN16_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN16_Output (1UL) /*!< Pin set as output */ + +/* Bit 15 : Pin 15 */ +#define GPIO_DIR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_DIR_PIN15_Msk (0x1UL << GPIO_DIR_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_DIR_PIN15_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN15_Output (1UL) /*!< Pin set as output */ + +/* Bit 14 : Pin 14 */ +#define GPIO_DIR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_DIR_PIN14_Msk (0x1UL << GPIO_DIR_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_DIR_PIN14_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN14_Output (1UL) /*!< Pin set as output */ + +/* Bit 13 : Pin 13 */ +#define GPIO_DIR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_DIR_PIN13_Msk (0x1UL << GPIO_DIR_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_DIR_PIN13_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN13_Output (1UL) /*!< Pin set as output */ + +/* Bit 12 : Pin 12 */ +#define GPIO_DIR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_DIR_PIN12_Msk (0x1UL << GPIO_DIR_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_DIR_PIN12_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN12_Output (1UL) /*!< Pin set as output */ + +/* Bit 11 : Pin 11 */ +#define GPIO_DIR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_DIR_PIN11_Msk (0x1UL << GPIO_DIR_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_DIR_PIN11_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN11_Output (1UL) /*!< Pin set as output */ + +/* Bit 10 : Pin 10 */ +#define GPIO_DIR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_DIR_PIN10_Msk (0x1UL << GPIO_DIR_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_DIR_PIN10_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN10_Output (1UL) /*!< Pin set as output */ + +/* Bit 9 : Pin 9 */ +#define GPIO_DIR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_DIR_PIN9_Msk (0x1UL << GPIO_DIR_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_DIR_PIN9_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN9_Output (1UL) /*!< Pin set as output */ + +/* Bit 8 : Pin 8 */ +#define GPIO_DIR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_DIR_PIN8_Msk (0x1UL << GPIO_DIR_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_DIR_PIN8_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN8_Output (1UL) /*!< Pin set as output */ + +/* Bit 7 : Pin 7 */ +#define GPIO_DIR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_DIR_PIN7_Msk (0x1UL << GPIO_DIR_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_DIR_PIN7_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN7_Output (1UL) /*!< Pin set as output */ + +/* Bit 6 : Pin 6 */ +#define GPIO_DIR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_DIR_PIN6_Msk (0x1UL << GPIO_DIR_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_DIR_PIN6_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN6_Output (1UL) /*!< Pin set as output */ + +/* Bit 5 : Pin 5 */ +#define GPIO_DIR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_DIR_PIN5_Msk (0x1UL << GPIO_DIR_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_DIR_PIN5_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN5_Output (1UL) /*!< Pin set as output */ + +/* Bit 4 : Pin 4 */ +#define GPIO_DIR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_DIR_PIN4_Msk (0x1UL << GPIO_DIR_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_DIR_PIN4_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN4_Output (1UL) /*!< Pin set as output */ + +/* Bit 3 : Pin 3 */ +#define GPIO_DIR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_DIR_PIN3_Msk (0x1UL << GPIO_DIR_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_DIR_PIN3_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN3_Output (1UL) /*!< Pin set as output */ + +/* Bit 2 : Pin 2 */ +#define GPIO_DIR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_DIR_PIN2_Msk (0x1UL << GPIO_DIR_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_DIR_PIN2_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN2_Output (1UL) /*!< Pin set as output */ + +/* Bit 1 : Pin 1 */ +#define GPIO_DIR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_DIR_PIN1_Msk (0x1UL << GPIO_DIR_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_DIR_PIN1_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN1_Output (1UL) /*!< Pin set as output */ + +/* Bit 0 : Pin 0 */ +#define GPIO_DIR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_DIR_PIN0_Msk (0x1UL << GPIO_DIR_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_DIR_PIN0_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN0_Output (1UL) /*!< Pin set as output */ + +/* Register: GPIO_DIRSET */ +/* Description: DIR set register */ + +/* Bit 31 : Set as output pin 31 */ +#define GPIO_DIRSET_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_DIRSET_PIN31_Msk (0x1UL << GPIO_DIRSET_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_DIRSET_PIN31_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN31_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN31_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 30 : Set as output pin 30 */ +#define GPIO_DIRSET_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_DIRSET_PIN30_Msk (0x1UL << GPIO_DIRSET_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_DIRSET_PIN30_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN30_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN30_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 29 : Set as output pin 29 */ +#define GPIO_DIRSET_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_DIRSET_PIN29_Msk (0x1UL << GPIO_DIRSET_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_DIRSET_PIN29_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN29_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN29_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 28 : Set as output pin 28 */ +#define GPIO_DIRSET_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_DIRSET_PIN28_Msk (0x1UL << GPIO_DIRSET_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_DIRSET_PIN28_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN28_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN28_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 27 : Set as output pin 27 */ +#define GPIO_DIRSET_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_DIRSET_PIN27_Msk (0x1UL << GPIO_DIRSET_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_DIRSET_PIN27_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN27_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN27_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 26 : Set as output pin 26 */ +#define GPIO_DIRSET_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_DIRSET_PIN26_Msk (0x1UL << GPIO_DIRSET_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_DIRSET_PIN26_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN26_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN26_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 25 : Set as output pin 25 */ +#define GPIO_DIRSET_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_DIRSET_PIN25_Msk (0x1UL << GPIO_DIRSET_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_DIRSET_PIN25_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN25_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN25_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 24 : Set as output pin 24 */ +#define GPIO_DIRSET_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_DIRSET_PIN24_Msk (0x1UL << GPIO_DIRSET_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_DIRSET_PIN24_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN24_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN24_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 23 : Set as output pin 23 */ +#define GPIO_DIRSET_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_DIRSET_PIN23_Msk (0x1UL << GPIO_DIRSET_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_DIRSET_PIN23_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN23_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN23_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 22 : Set as output pin 22 */ +#define GPIO_DIRSET_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_DIRSET_PIN22_Msk (0x1UL << GPIO_DIRSET_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_DIRSET_PIN22_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN22_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN22_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 21 : Set as output pin 21 */ +#define GPIO_DIRSET_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_DIRSET_PIN21_Msk (0x1UL << GPIO_DIRSET_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_DIRSET_PIN21_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN21_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN21_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 20 : Set as output pin 20 */ +#define GPIO_DIRSET_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_DIRSET_PIN20_Msk (0x1UL << GPIO_DIRSET_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_DIRSET_PIN20_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN20_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN20_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 19 : Set as output pin 19 */ +#define GPIO_DIRSET_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_DIRSET_PIN19_Msk (0x1UL << GPIO_DIRSET_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_DIRSET_PIN19_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN19_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN19_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 18 : Set as output pin 18 */ +#define GPIO_DIRSET_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_DIRSET_PIN18_Msk (0x1UL << GPIO_DIRSET_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_DIRSET_PIN18_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN18_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN18_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 17 : Set as output pin 17 */ +#define GPIO_DIRSET_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_DIRSET_PIN17_Msk (0x1UL << GPIO_DIRSET_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_DIRSET_PIN17_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN17_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN17_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 16 : Set as output pin 16 */ +#define GPIO_DIRSET_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_DIRSET_PIN16_Msk (0x1UL << GPIO_DIRSET_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_DIRSET_PIN16_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN16_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN16_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 15 : Set as output pin 15 */ +#define GPIO_DIRSET_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_DIRSET_PIN15_Msk (0x1UL << GPIO_DIRSET_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_DIRSET_PIN15_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN15_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN15_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 14 : Set as output pin 14 */ +#define GPIO_DIRSET_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_DIRSET_PIN14_Msk (0x1UL << GPIO_DIRSET_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_DIRSET_PIN14_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN14_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN14_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 13 : Set as output pin 13 */ +#define GPIO_DIRSET_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_DIRSET_PIN13_Msk (0x1UL << GPIO_DIRSET_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_DIRSET_PIN13_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN13_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN13_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 12 : Set as output pin 12 */ +#define GPIO_DIRSET_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_DIRSET_PIN12_Msk (0x1UL << GPIO_DIRSET_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_DIRSET_PIN12_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN12_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN12_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 11 : Set as output pin 11 */ +#define GPIO_DIRSET_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_DIRSET_PIN11_Msk (0x1UL << GPIO_DIRSET_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_DIRSET_PIN11_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN11_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN11_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 10 : Set as output pin 10 */ +#define GPIO_DIRSET_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_DIRSET_PIN10_Msk (0x1UL << GPIO_DIRSET_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_DIRSET_PIN10_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN10_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN10_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 9 : Set as output pin 9 */ +#define GPIO_DIRSET_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_DIRSET_PIN9_Msk (0x1UL << GPIO_DIRSET_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_DIRSET_PIN9_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN9_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN9_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 8 : Set as output pin 8 */ +#define GPIO_DIRSET_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_DIRSET_PIN8_Msk (0x1UL << GPIO_DIRSET_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_DIRSET_PIN8_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN8_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN8_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 7 : Set as output pin 7 */ +#define GPIO_DIRSET_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_DIRSET_PIN7_Msk (0x1UL << GPIO_DIRSET_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_DIRSET_PIN7_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN7_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN7_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 6 : Set as output pin 6 */ +#define GPIO_DIRSET_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_DIRSET_PIN6_Msk (0x1UL << GPIO_DIRSET_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_DIRSET_PIN6_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN6_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN6_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 5 : Set as output pin 5 */ +#define GPIO_DIRSET_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_DIRSET_PIN5_Msk (0x1UL << GPIO_DIRSET_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_DIRSET_PIN5_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN5_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN5_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 4 : Set as output pin 4 */ +#define GPIO_DIRSET_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_DIRSET_PIN4_Msk (0x1UL << GPIO_DIRSET_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_DIRSET_PIN4_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN4_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN4_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 3 : Set as output pin 3 */ +#define GPIO_DIRSET_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_DIRSET_PIN3_Msk (0x1UL << GPIO_DIRSET_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_DIRSET_PIN3_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN3_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN3_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 2 : Set as output pin 2 */ +#define GPIO_DIRSET_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_DIRSET_PIN2_Msk (0x1UL << GPIO_DIRSET_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_DIRSET_PIN2_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN2_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN2_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 1 : Set as output pin 1 */ +#define GPIO_DIRSET_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_DIRSET_PIN1_Msk (0x1UL << GPIO_DIRSET_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_DIRSET_PIN1_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN1_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN1_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 0 : Set as output pin 0 */ +#define GPIO_DIRSET_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_DIRSET_PIN0_Msk (0x1UL << GPIO_DIRSET_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_DIRSET_PIN0_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN0_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN0_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Register: GPIO_DIRCLR */ +/* Description: DIR clear register */ + +/* Bit 31 : Set as input pin 31 */ +#define GPIO_DIRCLR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_DIRCLR_PIN31_Msk (0x1UL << GPIO_DIRCLR_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_DIRCLR_PIN31_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN31_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN31_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 30 : Set as input pin 30 */ +#define GPIO_DIRCLR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_DIRCLR_PIN30_Msk (0x1UL << GPIO_DIRCLR_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_DIRCLR_PIN30_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN30_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN30_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 29 : Set as input pin 29 */ +#define GPIO_DIRCLR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_DIRCLR_PIN29_Msk (0x1UL << GPIO_DIRCLR_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_DIRCLR_PIN29_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN29_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN29_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 28 : Set as input pin 28 */ +#define GPIO_DIRCLR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_DIRCLR_PIN28_Msk (0x1UL << GPIO_DIRCLR_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_DIRCLR_PIN28_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN28_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN28_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 27 : Set as input pin 27 */ +#define GPIO_DIRCLR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_DIRCLR_PIN27_Msk (0x1UL << GPIO_DIRCLR_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_DIRCLR_PIN27_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN27_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN27_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 26 : Set as input pin 26 */ +#define GPIO_DIRCLR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_DIRCLR_PIN26_Msk (0x1UL << GPIO_DIRCLR_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_DIRCLR_PIN26_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN26_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN26_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 25 : Set as input pin 25 */ +#define GPIO_DIRCLR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_DIRCLR_PIN25_Msk (0x1UL << GPIO_DIRCLR_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_DIRCLR_PIN25_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN25_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN25_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 24 : Set as input pin 24 */ +#define GPIO_DIRCLR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_DIRCLR_PIN24_Msk (0x1UL << GPIO_DIRCLR_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_DIRCLR_PIN24_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN24_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN24_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 23 : Set as input pin 23 */ +#define GPIO_DIRCLR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_DIRCLR_PIN23_Msk (0x1UL << GPIO_DIRCLR_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_DIRCLR_PIN23_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN23_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN23_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 22 : Set as input pin 22 */ +#define GPIO_DIRCLR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_DIRCLR_PIN22_Msk (0x1UL << GPIO_DIRCLR_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_DIRCLR_PIN22_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN22_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN22_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 21 : Set as input pin 21 */ +#define GPIO_DIRCLR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_DIRCLR_PIN21_Msk (0x1UL << GPIO_DIRCLR_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_DIRCLR_PIN21_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN21_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN21_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 20 : Set as input pin 20 */ +#define GPIO_DIRCLR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_DIRCLR_PIN20_Msk (0x1UL << GPIO_DIRCLR_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_DIRCLR_PIN20_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN20_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN20_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 19 : Set as input pin 19 */ +#define GPIO_DIRCLR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_DIRCLR_PIN19_Msk (0x1UL << GPIO_DIRCLR_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_DIRCLR_PIN19_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN19_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN19_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 18 : Set as input pin 18 */ +#define GPIO_DIRCLR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_DIRCLR_PIN18_Msk (0x1UL << GPIO_DIRCLR_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_DIRCLR_PIN18_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN18_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN18_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 17 : Set as input pin 17 */ +#define GPIO_DIRCLR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_DIRCLR_PIN17_Msk (0x1UL << GPIO_DIRCLR_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_DIRCLR_PIN17_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN17_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN17_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 16 : Set as input pin 16 */ +#define GPIO_DIRCLR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_DIRCLR_PIN16_Msk (0x1UL << GPIO_DIRCLR_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_DIRCLR_PIN16_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN16_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN16_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 15 : Set as input pin 15 */ +#define GPIO_DIRCLR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_DIRCLR_PIN15_Msk (0x1UL << GPIO_DIRCLR_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_DIRCLR_PIN15_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN15_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN15_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 14 : Set as input pin 14 */ +#define GPIO_DIRCLR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_DIRCLR_PIN14_Msk (0x1UL << GPIO_DIRCLR_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_DIRCLR_PIN14_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN14_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN14_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 13 : Set as input pin 13 */ +#define GPIO_DIRCLR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_DIRCLR_PIN13_Msk (0x1UL << GPIO_DIRCLR_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_DIRCLR_PIN13_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN13_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN13_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 12 : Set as input pin 12 */ +#define GPIO_DIRCLR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_DIRCLR_PIN12_Msk (0x1UL << GPIO_DIRCLR_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_DIRCLR_PIN12_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN12_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN12_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 11 : Set as input pin 11 */ +#define GPIO_DIRCLR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_DIRCLR_PIN11_Msk (0x1UL << GPIO_DIRCLR_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_DIRCLR_PIN11_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN11_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN11_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 10 : Set as input pin 10 */ +#define GPIO_DIRCLR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_DIRCLR_PIN10_Msk (0x1UL << GPIO_DIRCLR_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_DIRCLR_PIN10_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN10_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN10_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 9 : Set as input pin 9 */ +#define GPIO_DIRCLR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_DIRCLR_PIN9_Msk (0x1UL << GPIO_DIRCLR_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_DIRCLR_PIN9_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN9_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN9_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 8 : Set as input pin 8 */ +#define GPIO_DIRCLR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_DIRCLR_PIN8_Msk (0x1UL << GPIO_DIRCLR_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_DIRCLR_PIN8_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN8_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN8_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 7 : Set as input pin 7 */ +#define GPIO_DIRCLR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_DIRCLR_PIN7_Msk (0x1UL << GPIO_DIRCLR_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_DIRCLR_PIN7_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN7_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN7_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 6 : Set as input pin 6 */ +#define GPIO_DIRCLR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_DIRCLR_PIN6_Msk (0x1UL << GPIO_DIRCLR_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_DIRCLR_PIN6_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN6_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN6_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 5 : Set as input pin 5 */ +#define GPIO_DIRCLR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_DIRCLR_PIN5_Msk (0x1UL << GPIO_DIRCLR_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_DIRCLR_PIN5_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN5_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN5_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 4 : Set as input pin 4 */ +#define GPIO_DIRCLR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_DIRCLR_PIN4_Msk (0x1UL << GPIO_DIRCLR_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_DIRCLR_PIN4_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN4_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN4_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 3 : Set as input pin 3 */ +#define GPIO_DIRCLR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_DIRCLR_PIN3_Msk (0x1UL << GPIO_DIRCLR_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_DIRCLR_PIN3_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN3_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN3_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 2 : Set as input pin 2 */ +#define GPIO_DIRCLR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_DIRCLR_PIN2_Msk (0x1UL << GPIO_DIRCLR_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_DIRCLR_PIN2_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN2_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN2_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 1 : Set as input pin 1 */ +#define GPIO_DIRCLR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_DIRCLR_PIN1_Msk (0x1UL << GPIO_DIRCLR_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_DIRCLR_PIN1_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN1_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN1_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 0 : Set as input pin 0 */ +#define GPIO_DIRCLR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_DIRCLR_PIN0_Msk (0x1UL << GPIO_DIRCLR_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_DIRCLR_PIN0_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN0_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN0_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Register: GPIO_LATCH */ +/* Description: Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers */ + +/* Bit 31 : Status on whether PIN31 has met criteria set in PIN_CNF31.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_LATCH_PIN31_Msk (0x1UL << GPIO_LATCH_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_LATCH_PIN31_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN31_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 30 : Status on whether PIN30 has met criteria set in PIN_CNF30.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_LATCH_PIN30_Msk (0x1UL << GPIO_LATCH_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_LATCH_PIN30_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN30_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 29 : Status on whether PIN29 has met criteria set in PIN_CNF29.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_LATCH_PIN29_Msk (0x1UL << GPIO_LATCH_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_LATCH_PIN29_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN29_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 28 : Status on whether PIN28 has met criteria set in PIN_CNF28.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_LATCH_PIN28_Msk (0x1UL << GPIO_LATCH_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_LATCH_PIN28_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN28_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 27 : Status on whether PIN27 has met criteria set in PIN_CNF27.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_LATCH_PIN27_Msk (0x1UL << GPIO_LATCH_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_LATCH_PIN27_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN27_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 26 : Status on whether PIN26 has met criteria set in PIN_CNF26.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_LATCH_PIN26_Msk (0x1UL << GPIO_LATCH_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_LATCH_PIN26_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN26_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 25 : Status on whether PIN25 has met criteria set in PIN_CNF25.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_LATCH_PIN25_Msk (0x1UL << GPIO_LATCH_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_LATCH_PIN25_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN25_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 24 : Status on whether PIN24 has met criteria set in PIN_CNF24.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_LATCH_PIN24_Msk (0x1UL << GPIO_LATCH_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_LATCH_PIN24_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN24_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 23 : Status on whether PIN23 has met criteria set in PIN_CNF23.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_LATCH_PIN23_Msk (0x1UL << GPIO_LATCH_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_LATCH_PIN23_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN23_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 22 : Status on whether PIN22 has met criteria set in PIN_CNF22.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_LATCH_PIN22_Msk (0x1UL << GPIO_LATCH_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_LATCH_PIN22_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN22_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 21 : Status on whether PIN21 has met criteria set in PIN_CNF21.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_LATCH_PIN21_Msk (0x1UL << GPIO_LATCH_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_LATCH_PIN21_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN21_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 20 : Status on whether PIN20 has met criteria set in PIN_CNF20.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_LATCH_PIN20_Msk (0x1UL << GPIO_LATCH_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_LATCH_PIN20_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN20_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 19 : Status on whether PIN19 has met criteria set in PIN_CNF19.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_LATCH_PIN19_Msk (0x1UL << GPIO_LATCH_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_LATCH_PIN19_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN19_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 18 : Status on whether PIN18 has met criteria set in PIN_CNF18.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_LATCH_PIN18_Msk (0x1UL << GPIO_LATCH_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_LATCH_PIN18_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN18_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 17 : Status on whether PIN17 has met criteria set in PIN_CNF17.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_LATCH_PIN17_Msk (0x1UL << GPIO_LATCH_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_LATCH_PIN17_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN17_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 16 : Status on whether PIN16 has met criteria set in PIN_CNF16.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_LATCH_PIN16_Msk (0x1UL << GPIO_LATCH_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_LATCH_PIN16_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN16_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 15 : Status on whether PIN15 has met criteria set in PIN_CNF15.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_LATCH_PIN15_Msk (0x1UL << GPIO_LATCH_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_LATCH_PIN15_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN15_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 14 : Status on whether PIN14 has met criteria set in PIN_CNF14.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_LATCH_PIN14_Msk (0x1UL << GPIO_LATCH_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_LATCH_PIN14_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN14_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 13 : Status on whether PIN13 has met criteria set in PIN_CNF13.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_LATCH_PIN13_Msk (0x1UL << GPIO_LATCH_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_LATCH_PIN13_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN13_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 12 : Status on whether PIN12 has met criteria set in PIN_CNF12.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_LATCH_PIN12_Msk (0x1UL << GPIO_LATCH_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_LATCH_PIN12_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN12_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 11 : Status on whether PIN11 has met criteria set in PIN_CNF11.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_LATCH_PIN11_Msk (0x1UL << GPIO_LATCH_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_LATCH_PIN11_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN11_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 10 : Status on whether PIN10 has met criteria set in PIN_CNF10.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_LATCH_PIN10_Msk (0x1UL << GPIO_LATCH_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_LATCH_PIN10_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN10_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 9 : Status on whether PIN9 has met criteria set in PIN_CNF9.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_LATCH_PIN9_Msk (0x1UL << GPIO_LATCH_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_LATCH_PIN9_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN9_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 8 : Status on whether PIN8 has met criteria set in PIN_CNF8.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_LATCH_PIN8_Msk (0x1UL << GPIO_LATCH_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_LATCH_PIN8_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN8_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 7 : Status on whether PIN7 has met criteria set in PIN_CNF7.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_LATCH_PIN7_Msk (0x1UL << GPIO_LATCH_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_LATCH_PIN7_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN7_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 6 : Status on whether PIN6 has met criteria set in PIN_CNF6.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_LATCH_PIN6_Msk (0x1UL << GPIO_LATCH_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_LATCH_PIN6_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN6_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 5 : Status on whether PIN5 has met criteria set in PIN_CNF5.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_LATCH_PIN5_Msk (0x1UL << GPIO_LATCH_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_LATCH_PIN5_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN5_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 4 : Status on whether PIN4 has met criteria set in PIN_CNF4.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_LATCH_PIN4_Msk (0x1UL << GPIO_LATCH_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_LATCH_PIN4_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN4_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 3 : Status on whether PIN3 has met criteria set in PIN_CNF3.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_LATCH_PIN3_Msk (0x1UL << GPIO_LATCH_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_LATCH_PIN3_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN3_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 2 : Status on whether PIN2 has met criteria set in PIN_CNF2.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_LATCH_PIN2_Msk (0x1UL << GPIO_LATCH_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_LATCH_PIN2_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN2_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 1 : Status on whether PIN1 has met criteria set in PIN_CNF1.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_LATCH_PIN1_Msk (0x1UL << GPIO_LATCH_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_LATCH_PIN1_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN1_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 0 : Status on whether PIN0 has met criteria set in PIN_CNF0.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_LATCH_PIN0_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN0_Latched (1UL) /*!< Criteria has been met */ + +/* Register: GPIO_DETECTMODE */ +/* Description: Select between default DETECT signal behaviour and LDETECT mode */ + +/* Bit 0 : Select between default DETECT signal behaviour and LDETECT mode */ +#define GPIO_DETECTMODE_DETECTMODE_Pos (0UL) /*!< Position of DETECTMODE field. */ +#define GPIO_DETECTMODE_DETECTMODE_Msk (0x1UL << GPIO_DETECTMODE_DETECTMODE_Pos) /*!< Bit mask of DETECTMODE field. */ +#define GPIO_DETECTMODE_DETECTMODE_Default (0UL) /*!< DETECT directly connected to PIN DETECT signals */ +#define GPIO_DETECTMODE_DETECTMODE_LDETECT (1UL) /*!< Use the latched LDETECT behaviour */ + +/* Register: GPIO_PIN_CNF */ +/* Description: Description collection[0]: Configuration of GPIO pins */ + +/* Bits 17..16 : Pin sensing mechanism */ +#define GPIO_PIN_CNF_SENSE_Pos (16UL) /*!< Position of SENSE field. */ +#define GPIO_PIN_CNF_SENSE_Msk (0x3UL << GPIO_PIN_CNF_SENSE_Pos) /*!< Bit mask of SENSE field. */ +#define GPIO_PIN_CNF_SENSE_Disabled (0UL) /*!< Disabled */ +#define GPIO_PIN_CNF_SENSE_High (2UL) /*!< Sense for high level */ +#define GPIO_PIN_CNF_SENSE_Low (3UL) /*!< Sense for low level */ + +/* Bits 10..8 : Drive configuration */ +#define GPIO_PIN_CNF_DRIVE_Pos (8UL) /*!< Position of DRIVE field. */ +#define GPIO_PIN_CNF_DRIVE_Msk (0x7UL << GPIO_PIN_CNF_DRIVE_Pos) /*!< Bit mask of DRIVE field. */ +#define GPIO_PIN_CNF_DRIVE_S0S1 (0UL) /*!< Standard '0', standard '1' */ +#define GPIO_PIN_CNF_DRIVE_H0S1 (1UL) /*!< High drive '0', standard '1' */ +#define GPIO_PIN_CNF_DRIVE_S0H1 (2UL) /*!< Standard '0', high drive '1' */ +#define GPIO_PIN_CNF_DRIVE_H0H1 (3UL) /*!< High drive '0', high 'drive '1'' */ +#define GPIO_PIN_CNF_DRIVE_D0S1 (4UL) /*!< Disconnect '0' standard '1' (normally used for wired-or connections) */ +#define GPIO_PIN_CNF_DRIVE_D0H1 (5UL) /*!< Disconnect '0', high drive '1' (normally used for wired-or connections) */ +#define GPIO_PIN_CNF_DRIVE_S0D1 (6UL) /*!< Standard '0'. disconnect '1' (normally used for wired-and connections) */ +#define GPIO_PIN_CNF_DRIVE_H0D1 (7UL) /*!< High drive '0', disconnect '1' (normally used for wired-and connections) */ + +/* Bits 3..2 : Pull configuration */ +#define GPIO_PIN_CNF_PULL_Pos (2UL) /*!< Position of PULL field. */ +#define GPIO_PIN_CNF_PULL_Msk (0x3UL << GPIO_PIN_CNF_PULL_Pos) /*!< Bit mask of PULL field. */ +#define GPIO_PIN_CNF_PULL_Disabled (0UL) /*!< No pull */ +#define GPIO_PIN_CNF_PULL_Pulldown (1UL) /*!< Pull down on pin */ +#define GPIO_PIN_CNF_PULL_Pullup (3UL) /*!< Pull up on pin */ + +/* Bit 1 : Connect or disconnect input buffer */ +#define GPIO_PIN_CNF_INPUT_Pos (1UL) /*!< Position of INPUT field. */ +#define GPIO_PIN_CNF_INPUT_Msk (0x1UL << GPIO_PIN_CNF_INPUT_Pos) /*!< Bit mask of INPUT field. */ +#define GPIO_PIN_CNF_INPUT_Connect (0UL) /*!< Connect input buffer */ +#define GPIO_PIN_CNF_INPUT_Disconnect (1UL) /*!< Disconnect input buffer */ + +/* Bit 0 : Pin direction. Same physical register as DIR register */ +#define GPIO_PIN_CNF_DIR_Pos (0UL) /*!< Position of DIR field. */ +#define GPIO_PIN_CNF_DIR_Msk (0x1UL << GPIO_PIN_CNF_DIR_Pos) /*!< Bit mask of DIR field. */ +#define GPIO_PIN_CNF_DIR_Input (0UL) /*!< Configure pin as an input pin */ +#define GPIO_PIN_CNF_DIR_Output (1UL) /*!< Configure pin as an output pin */ + + +/* Peripheral: PDM */ +/* Description: Pulse Density Modulation (Digital Microphone) Interface */ + +/* Register: PDM_TASKS_START */ +/* Description: Starts continuous PDM transfer */ + +/* Bit 0 : */ +#define PDM_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define PDM_TASKS_START_TASKS_START_Msk (0x1UL << PDM_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: PDM_TASKS_STOP */ +/* Description: Stops PDM transfer */ + +/* Bit 0 : */ +#define PDM_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define PDM_TASKS_STOP_TASKS_STOP_Msk (0x1UL << PDM_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: PDM_EVENTS_STARTED */ +/* Description: PDM transfer has started */ + +/* Bit 0 : */ +#define PDM_EVENTS_STARTED_EVENTS_STARTED_Pos (0UL) /*!< Position of EVENTS_STARTED field. */ +#define PDM_EVENTS_STARTED_EVENTS_STARTED_Msk (0x1UL << PDM_EVENTS_STARTED_EVENTS_STARTED_Pos) /*!< Bit mask of EVENTS_STARTED field. */ + +/* Register: PDM_EVENTS_STOPPED */ +/* Description: PDM transfer has finished */ + +/* Bit 0 : */ +#define PDM_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */ +#define PDM_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << PDM_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */ + +/* Register: PDM_EVENTS_END */ +/* Description: The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM */ + +/* Bit 0 : */ +#define PDM_EVENTS_END_EVENTS_END_Pos (0UL) /*!< Position of EVENTS_END field. */ +#define PDM_EVENTS_END_EVENTS_END_Msk (0x1UL << PDM_EVENTS_END_EVENTS_END_Pos) /*!< Bit mask of EVENTS_END field. */ + +/* Register: PDM_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 2 : Enable or disable interrupt for END event */ +#define PDM_INTEN_END_Pos (2UL) /*!< Position of END field. */ +#define PDM_INTEN_END_Msk (0x1UL << PDM_INTEN_END_Pos) /*!< Bit mask of END field. */ +#define PDM_INTEN_END_Disabled (0UL) /*!< Disable */ +#define PDM_INTEN_END_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for STOPPED event */ +#define PDM_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define PDM_INTEN_STOPPED_Msk (0x1UL << PDM_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define PDM_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ +#define PDM_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable interrupt for STARTED event */ +#define PDM_INTEN_STARTED_Pos (0UL) /*!< Position of STARTED field. */ +#define PDM_INTEN_STARTED_Msk (0x1UL << PDM_INTEN_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define PDM_INTEN_STARTED_Disabled (0UL) /*!< Disable */ +#define PDM_INTEN_STARTED_Enabled (1UL) /*!< Enable */ + +/* Register: PDM_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 2 : Write '1' to Enable interrupt for END event */ +#define PDM_INTENSET_END_Pos (2UL) /*!< Position of END field. */ +#define PDM_INTENSET_END_Msk (0x1UL << PDM_INTENSET_END_Pos) /*!< Bit mask of END field. */ +#define PDM_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ +#define PDM_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ +#define PDM_INTENSET_END_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for STOPPED event */ +#define PDM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define PDM_INTENSET_STOPPED_Msk (0x1UL << PDM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define PDM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define PDM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define PDM_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for STARTED event */ +#define PDM_INTENSET_STARTED_Pos (0UL) /*!< Position of STARTED field. */ +#define PDM_INTENSET_STARTED_Msk (0x1UL << PDM_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define PDM_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */ +#define PDM_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */ +#define PDM_INTENSET_STARTED_Set (1UL) /*!< Enable */ + +/* Register: PDM_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 2 : Write '1' to Disable interrupt for END event */ +#define PDM_INTENCLR_END_Pos (2UL) /*!< Position of END field. */ +#define PDM_INTENCLR_END_Msk (0x1UL << PDM_INTENCLR_END_Pos) /*!< Bit mask of END field. */ +#define PDM_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ +#define PDM_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ +#define PDM_INTENCLR_END_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for STOPPED event */ +#define PDM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define PDM_INTENCLR_STOPPED_Msk (0x1UL << PDM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define PDM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define PDM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define PDM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for STARTED event */ +#define PDM_INTENCLR_STARTED_Pos (0UL) /*!< Position of STARTED field. */ +#define PDM_INTENCLR_STARTED_Msk (0x1UL << PDM_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define PDM_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */ +#define PDM_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */ +#define PDM_INTENCLR_STARTED_Clear (1UL) /*!< Disable */ + +/* Register: PDM_ENABLE */ +/* Description: PDM module enable register */ + +/* Bit 0 : Enable or disable PDM module */ +#define PDM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define PDM_ENABLE_ENABLE_Msk (0x1UL << PDM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define PDM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ +#define PDM_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */ + +/* Register: PDM_PDMCLKCTRL */ +/* Description: PDM clock generator control */ + +/* Bits 31..0 : PDM_CLK frequency */ +#define PDM_PDMCLKCTRL_FREQ_Pos (0UL) /*!< Position of FREQ field. */ +#define PDM_PDMCLKCTRL_FREQ_Msk (0xFFFFFFFFUL << PDM_PDMCLKCTRL_FREQ_Pos) /*!< Bit mask of FREQ field. */ +#define PDM_PDMCLKCTRL_FREQ_1000K (0x08000000UL) /*!< PDM_CLK = 32 MHz / 32 = 1.000 MHz */ +#define PDM_PDMCLKCTRL_FREQ_Default (0x08400000UL) /*!< PDM_CLK = 32 MHz / 31 = 1.032 MHz */ +#define PDM_PDMCLKCTRL_FREQ_1067K (0x08800000UL) /*!< PDM_CLK = 32 MHz / 30 = 1.067 MHz */ + +/* Register: PDM_MODE */ +/* Description: Defines the routing of the connected PDM microphones' signals */ + +/* Bit 1 : Defines on which PDM_CLK edge Left (or mono) is sampled */ +#define PDM_MODE_EDGE_Pos (1UL) /*!< Position of EDGE field. */ +#define PDM_MODE_EDGE_Msk (0x1UL << PDM_MODE_EDGE_Pos) /*!< Bit mask of EDGE field. */ +#define PDM_MODE_EDGE_LeftFalling (0UL) /*!< Left (or mono) is sampled on falling edge of PDM_CLK */ +#define PDM_MODE_EDGE_LeftRising (1UL) /*!< Left (or mono) is sampled on rising edge of PDM_CLK */ + +/* Bit 0 : Mono or stereo operation */ +#define PDM_MODE_OPERATION_Pos (0UL) /*!< Position of OPERATION field. */ +#define PDM_MODE_OPERATION_Msk (0x1UL << PDM_MODE_OPERATION_Pos) /*!< Bit mask of OPERATION field. */ +#define PDM_MODE_OPERATION_Stereo (0UL) /*!< Sample and store one pair (Left + Right) of 16bit samples per RAM word R=[31:16]; L=[15:0] */ +#define PDM_MODE_OPERATION_Mono (1UL) /*!< Sample and store two successive Left samples (16 bit each) per RAM word L1=[31:16]; L0=[15:0] */ + +/* Register: PDM_GAINL */ +/* Description: Left output gain adjustment */ + +/* Bits 6..0 : Left output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters) 0x00 -20 dB gain adjust 0x01 -19.5 dB gain adjust (...) 0x27 -0.5 dB gain adjust 0x28 0 dB gain adjust 0x29 +0.5 dB gain adjust (...) 0x4F +19.5 dB gain adjust 0x50 +20 dB gain adjust */ +#define PDM_GAINL_GAINL_Pos (0UL) /*!< Position of GAINL field. */ +#define PDM_GAINL_GAINL_Msk (0x7FUL << PDM_GAINL_GAINL_Pos) /*!< Bit mask of GAINL field. */ +#define PDM_GAINL_GAINL_MinGain (0x00UL) /*!< -20dB gain adjustment (minimum) */ +#define PDM_GAINL_GAINL_DefaultGain (0x28UL) /*!< 0dB gain adjustment ('2500 RMS' requirement) */ +#define PDM_GAINL_GAINL_MaxGain (0x50UL) /*!< +20dB gain adjustment (maximum) */ + +/* Register: PDM_GAINR */ +/* Description: Right output gain adjustment */ + +/* Bits 7..0 : Right output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters) */ +#define PDM_GAINR_GAINR_Pos (0UL) /*!< Position of GAINR field. */ +#define PDM_GAINR_GAINR_Msk (0xFFUL << PDM_GAINR_GAINR_Pos) /*!< Bit mask of GAINR field. */ +#define PDM_GAINR_GAINR_MinGain (0x00UL) /*!< -20dB gain adjustment (minimum) */ +#define PDM_GAINR_GAINR_DefaultGain (0x28UL) /*!< 0dB gain adjustment ('2500 RMS' requirement) */ +#define PDM_GAINR_GAINR_MaxGain (0x50UL) /*!< +20dB gain adjustment (maximum) */ + +/* Register: PDM_PSEL_CLK */ +/* Description: Pin number configuration for PDM CLK signal */ + +/* Bit 31 : Connection */ +#define PDM_PSEL_CLK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define PDM_PSEL_CLK_CONNECT_Msk (0x1UL << PDM_PSEL_CLK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define PDM_PSEL_CLK_CONNECT_Connected (0UL) /*!< Connect */ +#define PDM_PSEL_CLK_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define PDM_PSEL_CLK_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define PDM_PSEL_CLK_PIN_Msk (0x1FUL << PDM_PSEL_CLK_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: PDM_PSEL_DIN */ +/* Description: Pin number configuration for PDM DIN signal */ + +/* Bit 31 : Connection */ +#define PDM_PSEL_DIN_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define PDM_PSEL_DIN_CONNECT_Msk (0x1UL << PDM_PSEL_DIN_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define PDM_PSEL_DIN_CONNECT_Connected (0UL) /*!< Connect */ +#define PDM_PSEL_DIN_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define PDM_PSEL_DIN_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define PDM_PSEL_DIN_PIN_Msk (0x1FUL << PDM_PSEL_DIN_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: PDM_SAMPLE_PTR */ +/* Description: RAM address pointer to write samples to with EasyDMA */ + +/* Bits 31..0 : Address to write PDM samples to over DMA */ +#define PDM_SAMPLE_PTR_SAMPLEPTR_Pos (0UL) /*!< Position of SAMPLEPTR field. */ +#define PDM_SAMPLE_PTR_SAMPLEPTR_Msk (0xFFFFFFFFUL << PDM_SAMPLE_PTR_SAMPLEPTR_Pos) /*!< Bit mask of SAMPLEPTR field. */ + +/* Register: PDM_SAMPLE_MAXCNT */ +/* Description: Number of samples to allocate memory for in EasyDMA mode */ + +/* Bits 14..0 : Length of DMA RAM allocation in number of samples */ +#define PDM_SAMPLE_MAXCNT_BUFFSIZE_Pos (0UL) /*!< Position of BUFFSIZE field. */ +#define PDM_SAMPLE_MAXCNT_BUFFSIZE_Msk (0x7FFFUL << PDM_SAMPLE_MAXCNT_BUFFSIZE_Pos) /*!< Bit mask of BUFFSIZE field. */ + + +/* Peripheral: POWER */ +/* Description: Power control */ + +/* Register: POWER_TASKS_CONSTLAT */ +/* Description: Enable constant latency mode */ + +/* Bit 0 : */ +#define POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Pos (0UL) /*!< Position of TASKS_CONSTLAT field. */ +#define POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Msk (0x1UL << POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Pos) /*!< Bit mask of TASKS_CONSTLAT field. */ + +/* Register: POWER_TASKS_LOWPWR */ +/* Description: Enable low power mode (variable latency) */ + +/* Bit 0 : */ +#define POWER_TASKS_LOWPWR_TASKS_LOWPWR_Pos (0UL) /*!< Position of TASKS_LOWPWR field. */ +#define POWER_TASKS_LOWPWR_TASKS_LOWPWR_Msk (0x1UL << POWER_TASKS_LOWPWR_TASKS_LOWPWR_Pos) /*!< Bit mask of TASKS_LOWPWR field. */ + +/* Register: POWER_EVENTS_POFWARN */ +/* Description: Power failure warning */ + +/* Bit 0 : */ +#define POWER_EVENTS_POFWARN_EVENTS_POFWARN_Pos (0UL) /*!< Position of EVENTS_POFWARN field. */ +#define POWER_EVENTS_POFWARN_EVENTS_POFWARN_Msk (0x1UL << POWER_EVENTS_POFWARN_EVENTS_POFWARN_Pos) /*!< Bit mask of EVENTS_POFWARN field. */ + +/* Register: POWER_EVENTS_SLEEPENTER */ +/* Description: CPU entered WFI/WFE sleep */ + +/* Bit 0 : */ +#define POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_Pos (0UL) /*!< Position of EVENTS_SLEEPENTER field. */ +#define POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_Msk (0x1UL << POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_Pos) /*!< Bit mask of EVENTS_SLEEPENTER field. */ + +/* Register: POWER_EVENTS_SLEEPEXIT */ +/* Description: CPU exited WFI/WFE sleep */ + +/* Bit 0 : */ +#define POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_Pos (0UL) /*!< Position of EVENTS_SLEEPEXIT field. */ +#define POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_Msk (0x1UL << POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_Pos) /*!< Bit mask of EVENTS_SLEEPEXIT field. */ + +/* Register: POWER_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 6 : Write '1' to Enable interrupt for SLEEPEXIT event */ +#define POWER_INTENSET_SLEEPEXIT_Pos (6UL) /*!< Position of SLEEPEXIT field. */ +#define POWER_INTENSET_SLEEPEXIT_Msk (0x1UL << POWER_INTENSET_SLEEPEXIT_Pos) /*!< Bit mask of SLEEPEXIT field. */ +#define POWER_INTENSET_SLEEPEXIT_Disabled (0UL) /*!< Read: Disabled */ +#define POWER_INTENSET_SLEEPEXIT_Enabled (1UL) /*!< Read: Enabled */ +#define POWER_INTENSET_SLEEPEXIT_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to Enable interrupt for SLEEPENTER event */ +#define POWER_INTENSET_SLEEPENTER_Pos (5UL) /*!< Position of SLEEPENTER field. */ +#define POWER_INTENSET_SLEEPENTER_Msk (0x1UL << POWER_INTENSET_SLEEPENTER_Pos) /*!< Bit mask of SLEEPENTER field. */ +#define POWER_INTENSET_SLEEPENTER_Disabled (0UL) /*!< Read: Disabled */ +#define POWER_INTENSET_SLEEPENTER_Enabled (1UL) /*!< Read: Enabled */ +#define POWER_INTENSET_SLEEPENTER_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable interrupt for POFWARN event */ +#define POWER_INTENSET_POFWARN_Pos (2UL) /*!< Position of POFWARN field. */ +#define POWER_INTENSET_POFWARN_Msk (0x1UL << POWER_INTENSET_POFWARN_Pos) /*!< Bit mask of POFWARN field. */ +#define POWER_INTENSET_POFWARN_Disabled (0UL) /*!< Read: Disabled */ +#define POWER_INTENSET_POFWARN_Enabled (1UL) /*!< Read: Enabled */ +#define POWER_INTENSET_POFWARN_Set (1UL) /*!< Enable */ + +/* Register: POWER_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 6 : Write '1' to Disable interrupt for SLEEPEXIT event */ +#define POWER_INTENCLR_SLEEPEXIT_Pos (6UL) /*!< Position of SLEEPEXIT field. */ +#define POWER_INTENCLR_SLEEPEXIT_Msk (0x1UL << POWER_INTENCLR_SLEEPEXIT_Pos) /*!< Bit mask of SLEEPEXIT field. */ +#define POWER_INTENCLR_SLEEPEXIT_Disabled (0UL) /*!< Read: Disabled */ +#define POWER_INTENCLR_SLEEPEXIT_Enabled (1UL) /*!< Read: Enabled */ +#define POWER_INTENCLR_SLEEPEXIT_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to Disable interrupt for SLEEPENTER event */ +#define POWER_INTENCLR_SLEEPENTER_Pos (5UL) /*!< Position of SLEEPENTER field. */ +#define POWER_INTENCLR_SLEEPENTER_Msk (0x1UL << POWER_INTENCLR_SLEEPENTER_Pos) /*!< Bit mask of SLEEPENTER field. */ +#define POWER_INTENCLR_SLEEPENTER_Disabled (0UL) /*!< Read: Disabled */ +#define POWER_INTENCLR_SLEEPENTER_Enabled (1UL) /*!< Read: Enabled */ +#define POWER_INTENCLR_SLEEPENTER_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable interrupt for POFWARN event */ +#define POWER_INTENCLR_POFWARN_Pos (2UL) /*!< Position of POFWARN field. */ +#define POWER_INTENCLR_POFWARN_Msk (0x1UL << POWER_INTENCLR_POFWARN_Pos) /*!< Bit mask of POFWARN field. */ +#define POWER_INTENCLR_POFWARN_Disabled (0UL) /*!< Read: Disabled */ +#define POWER_INTENCLR_POFWARN_Enabled (1UL) /*!< Read: Enabled */ +#define POWER_INTENCLR_POFWARN_Clear (1UL) /*!< Disable */ + +/* Register: POWER_RESETREAS */ +/* Description: Reset reason */ + +/* Bit 18 : Reset due to wake up from System OFF mode when wakeup is triggered from entering into debug interface mode */ +#define POWER_RESETREAS_DIF_Pos (18UL) /*!< Position of DIF field. */ +#define POWER_RESETREAS_DIF_Msk (0x1UL << POWER_RESETREAS_DIF_Pos) /*!< Bit mask of DIF field. */ +#define POWER_RESETREAS_DIF_NotDetected (0UL) /*!< Not detected */ +#define POWER_RESETREAS_DIF_Detected (1UL) /*!< Detected */ + +/* Bit 16 : Reset due to wake up from System OFF mode when wakeup is triggered from DETECT signal from GPIO */ +#define POWER_RESETREAS_OFF_Pos (16UL) /*!< Position of OFF field. */ +#define POWER_RESETREAS_OFF_Msk (0x1UL << POWER_RESETREAS_OFF_Pos) /*!< Bit mask of OFF field. */ +#define POWER_RESETREAS_OFF_NotDetected (0UL) /*!< Not detected */ +#define POWER_RESETREAS_OFF_Detected (1UL) /*!< Detected */ + +/* Bit 3 : Reset from CPU lock-up detected */ +#define POWER_RESETREAS_LOCKUP_Pos (3UL) /*!< Position of LOCKUP field. */ +#define POWER_RESETREAS_LOCKUP_Msk (0x1UL << POWER_RESETREAS_LOCKUP_Pos) /*!< Bit mask of LOCKUP field. */ +#define POWER_RESETREAS_LOCKUP_NotDetected (0UL) /*!< Not detected */ +#define POWER_RESETREAS_LOCKUP_Detected (1UL) /*!< Detected */ + +/* Bit 2 : Reset from soft reset detected */ +#define POWER_RESETREAS_SREQ_Pos (2UL) /*!< Position of SREQ field. */ +#define POWER_RESETREAS_SREQ_Msk (0x1UL << POWER_RESETREAS_SREQ_Pos) /*!< Bit mask of SREQ field. */ +#define POWER_RESETREAS_SREQ_NotDetected (0UL) /*!< Not detected */ +#define POWER_RESETREAS_SREQ_Detected (1UL) /*!< Detected */ + +/* Bit 1 : Reset from watchdog detected */ +#define POWER_RESETREAS_DOG_Pos (1UL) /*!< Position of DOG field. */ +#define POWER_RESETREAS_DOG_Msk (0x1UL << POWER_RESETREAS_DOG_Pos) /*!< Bit mask of DOG field. */ +#define POWER_RESETREAS_DOG_NotDetected (0UL) /*!< Not detected */ +#define POWER_RESETREAS_DOG_Detected (1UL) /*!< Detected */ + +/* Bit 0 : Reset from pin-reset detected */ +#define POWER_RESETREAS_RESETPIN_Pos (0UL) /*!< Position of RESETPIN field. */ +#define POWER_RESETREAS_RESETPIN_Msk (0x1UL << POWER_RESETREAS_RESETPIN_Pos) /*!< Bit mask of RESETPIN field. */ +#define POWER_RESETREAS_RESETPIN_NotDetected (0UL) /*!< Not detected */ +#define POWER_RESETREAS_RESETPIN_Detected (1UL) /*!< Detected */ + +/* Register: POWER_SYSTEMOFF */ +/* Description: System OFF register */ + +/* Bit 0 : Enable System OFF mode */ +#define POWER_SYSTEMOFF_SYSTEMOFF_Pos (0UL) /*!< Position of SYSTEMOFF field. */ +#define POWER_SYSTEMOFF_SYSTEMOFF_Msk (0x1UL << POWER_SYSTEMOFF_SYSTEMOFF_Pos) /*!< Bit mask of SYSTEMOFF field. */ +#define POWER_SYSTEMOFF_SYSTEMOFF_Enter (1UL) /*!< Enable System OFF mode */ + +/* Register: POWER_POFCON */ +/* Description: Power failure comparator configuration */ + +/* Bits 4..1 : Power failure comparator threshold setting */ +#define POWER_POFCON_THRESHOLD_Pos (1UL) /*!< Position of THRESHOLD field. */ +#define POWER_POFCON_THRESHOLD_Msk (0xFUL << POWER_POFCON_THRESHOLD_Pos) /*!< Bit mask of THRESHOLD field. */ +#define POWER_POFCON_THRESHOLD_V17 (4UL) /*!< Set threshold to 1.7 V */ +#define POWER_POFCON_THRESHOLD_V18 (5UL) /*!< Set threshold to 1.8 V */ +#define POWER_POFCON_THRESHOLD_V19 (6UL) /*!< Set threshold to 1.9 V */ +#define POWER_POFCON_THRESHOLD_V20 (7UL) /*!< Set threshold to 2.0 V */ +#define POWER_POFCON_THRESHOLD_V21 (8UL) /*!< Set threshold to 2.1 V */ +#define POWER_POFCON_THRESHOLD_V22 (9UL) /*!< Set threshold to 2.2 V */ +#define POWER_POFCON_THRESHOLD_V23 (10UL) /*!< Set threshold to 2.3 V */ +#define POWER_POFCON_THRESHOLD_V24 (11UL) /*!< Set threshold to 2.4 V */ +#define POWER_POFCON_THRESHOLD_V25 (12UL) /*!< Set threshold to 2.5 V */ +#define POWER_POFCON_THRESHOLD_V26 (13UL) /*!< Set threshold to 2.6 V */ +#define POWER_POFCON_THRESHOLD_V27 (14UL) /*!< Set threshold to 2.7 V */ +#define POWER_POFCON_THRESHOLD_V28 (15UL) /*!< Set threshold to 2.8 V */ + +/* Bit 0 : Enable or disable power failure comparator */ +#define POWER_POFCON_POF_Pos (0UL) /*!< Position of POF field. */ +#define POWER_POFCON_POF_Msk (0x1UL << POWER_POFCON_POF_Pos) /*!< Bit mask of POF field. */ +#define POWER_POFCON_POF_Disabled (0UL) /*!< Disable */ +#define POWER_POFCON_POF_Enabled (1UL) /*!< Enable */ + +/* Register: POWER_GPREGRET */ +/* Description: General purpose retention register */ + +/* Bits 7..0 : General purpose retention register */ +#define POWER_GPREGRET_GPREGRET_Pos (0UL) /*!< Position of GPREGRET field. */ +#define POWER_GPREGRET_GPREGRET_Msk (0xFFUL << POWER_GPREGRET_GPREGRET_Pos) /*!< Bit mask of GPREGRET field. */ + +/* Register: POWER_GPREGRET2 */ +/* Description: General purpose retention register */ + +/* Bits 7..0 : General purpose retention register */ +#define POWER_GPREGRET2_GPREGRET_Pos (0UL) /*!< Position of GPREGRET field. */ +#define POWER_GPREGRET2_GPREGRET_Msk (0xFFUL << POWER_GPREGRET2_GPREGRET_Pos) /*!< Bit mask of GPREGRET field. */ + +/* Register: POWER_DCDCEN */ +/* Description: DC/DC enable register */ + +/* Bit 0 : Enable or disable DC/DC converter */ +#define POWER_DCDCEN_DCDCEN_Pos (0UL) /*!< Position of DCDCEN field. */ +#define POWER_DCDCEN_DCDCEN_Msk (0x1UL << POWER_DCDCEN_DCDCEN_Pos) /*!< Bit mask of DCDCEN field. */ +#define POWER_DCDCEN_DCDCEN_Disabled (0UL) /*!< Disable */ +#define POWER_DCDCEN_DCDCEN_Enabled (1UL) /*!< Enable */ + +/* Register: POWER_RAM_POWER */ +/* Description: Description cluster[0]: RAM0 power control register */ + +/* Bit 17 : Keep retention on RAM section S1 when RAM section is in OFF */ +#define POWER_RAM_POWER_S1RETENTION_Pos (17UL) /*!< Position of S1RETENTION field. */ +#define POWER_RAM_POWER_S1RETENTION_Msk (0x1UL << POWER_RAM_POWER_S1RETENTION_Pos) /*!< Bit mask of S1RETENTION field. */ +#define POWER_RAM_POWER_S1RETENTION_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S1RETENTION_On (1UL) /*!< On */ + +/* Bit 16 : Keep retention on RAM section S0 when RAM section is in OFF */ +#define POWER_RAM_POWER_S0RETENTION_Pos (16UL) /*!< Position of S0RETENTION field. */ +#define POWER_RAM_POWER_S0RETENTION_Msk (0x1UL << POWER_RAM_POWER_S0RETENTION_Pos) /*!< Bit mask of S0RETENTION field. */ +#define POWER_RAM_POWER_S0RETENTION_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S0RETENTION_On (1UL) /*!< On */ + +/* Bit 1 : Keep RAM section S1 ON or OFF in System ON mode. */ +#define POWER_RAM_POWER_S1POWER_Pos (1UL) /*!< Position of S1POWER field. */ +#define POWER_RAM_POWER_S1POWER_Msk (0x1UL << POWER_RAM_POWER_S1POWER_Pos) /*!< Bit mask of S1POWER field. */ +#define POWER_RAM_POWER_S1POWER_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S1POWER_On (1UL) /*!< On */ + +/* Bit 0 : Keep RAM section S0 ON or OFF in System ON mode. */ +#define POWER_RAM_POWER_S0POWER_Pos (0UL) /*!< Position of S0POWER field. */ +#define POWER_RAM_POWER_S0POWER_Msk (0x1UL << POWER_RAM_POWER_S0POWER_Pos) /*!< Bit mask of S0POWER field. */ +#define POWER_RAM_POWER_S0POWER_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S0POWER_On (1UL) /*!< On */ + +/* Register: POWER_RAM_POWERSET */ +/* Description: Description cluster[0]: RAM0 power control set register */ + +/* Bit 17 : Keep retention on RAM section S1 when RAM section is switched off */ +#define POWER_RAM_POWERSET_S1RETENTION_Pos (17UL) /*!< Position of S1RETENTION field. */ +#define POWER_RAM_POWERSET_S1RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S1RETENTION_Pos) /*!< Bit mask of S1RETENTION field. */ +#define POWER_RAM_POWERSET_S1RETENTION_On (1UL) /*!< On */ + +/* Bit 16 : Keep retention on RAM section S0 when RAM section is switched off */ +#define POWER_RAM_POWERSET_S0RETENTION_Pos (16UL) /*!< Position of S0RETENTION field. */ +#define POWER_RAM_POWERSET_S0RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S0RETENTION_Pos) /*!< Bit mask of S0RETENTION field. */ +#define POWER_RAM_POWERSET_S0RETENTION_On (1UL) /*!< On */ + +/* Bit 1 : Keep RAM section S1 of RAM0 on or off in System ON mode */ +#define POWER_RAM_POWERSET_S1POWER_Pos (1UL) /*!< Position of S1POWER field. */ +#define POWER_RAM_POWERSET_S1POWER_Msk (0x1UL << POWER_RAM_POWERSET_S1POWER_Pos) /*!< Bit mask of S1POWER field. */ +#define POWER_RAM_POWERSET_S1POWER_On (1UL) /*!< On */ + +/* Bit 0 : Keep RAM section S0 of RAM0 on or off in System ON mode */ +#define POWER_RAM_POWERSET_S0POWER_Pos (0UL) /*!< Position of S0POWER field. */ +#define POWER_RAM_POWERSET_S0POWER_Msk (0x1UL << POWER_RAM_POWERSET_S0POWER_Pos) /*!< Bit mask of S0POWER field. */ +#define POWER_RAM_POWERSET_S0POWER_On (1UL) /*!< On */ + +/* Register: POWER_RAM_POWERCLR */ +/* Description: Description cluster[0]: RAM0 power control clear register */ + +/* Bit 17 : Keep retention on RAM section S1 when RAM section is switched off */ +#define POWER_RAM_POWERCLR_S1RETENTION_Pos (17UL) /*!< Position of S1RETENTION field. */ +#define POWER_RAM_POWERCLR_S1RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S1RETENTION_Pos) /*!< Bit mask of S1RETENTION field. */ +#define POWER_RAM_POWERCLR_S1RETENTION_Off (1UL) /*!< Off */ + +/* Bit 16 : Keep retention on RAM section S0 when RAM section is switched off */ +#define POWER_RAM_POWERCLR_S0RETENTION_Pos (16UL) /*!< Position of S0RETENTION field. */ +#define POWER_RAM_POWERCLR_S0RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S0RETENTION_Pos) /*!< Bit mask of S0RETENTION field. */ +#define POWER_RAM_POWERCLR_S0RETENTION_Off (1UL) /*!< Off */ + +/* Bit 1 : Keep RAM section S1 of RAM0 on or off in System ON mode */ +#define POWER_RAM_POWERCLR_S1POWER_Pos (1UL) /*!< Position of S1POWER field. */ +#define POWER_RAM_POWERCLR_S1POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S1POWER_Pos) /*!< Bit mask of S1POWER field. */ +#define POWER_RAM_POWERCLR_S1POWER_Off (1UL) /*!< Off */ + +/* Bit 0 : Keep RAM section S0 of RAM0 on or off in System ON mode */ +#define POWER_RAM_POWERCLR_S0POWER_Pos (0UL) /*!< Position of S0POWER field. */ +#define POWER_RAM_POWERCLR_S0POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S0POWER_Pos) /*!< Bit mask of S0POWER field. */ +#define POWER_RAM_POWERCLR_S0POWER_Off (1UL) /*!< Off */ + + +/* Peripheral: PPI */ +/* Description: Programmable Peripheral Interconnect */ + +/* Register: PPI_TASKS_CHG_EN */ +/* Description: Description cluster[0]: Enable channel group 0 */ + +/* Bit 0 : */ +#define PPI_TASKS_CHG_EN_EN_Pos (0UL) /*!< Position of EN field. */ +#define PPI_TASKS_CHG_EN_EN_Msk (0x1UL << PPI_TASKS_CHG_EN_EN_Pos) /*!< Bit mask of EN field. */ + +/* Register: PPI_TASKS_CHG_DIS */ +/* Description: Description cluster[0]: Disable channel group 0 */ + +/* Bit 0 : */ +#define PPI_TASKS_CHG_DIS_DIS_Pos (0UL) /*!< Position of DIS field. */ +#define PPI_TASKS_CHG_DIS_DIS_Msk (0x1UL << PPI_TASKS_CHG_DIS_DIS_Pos) /*!< Bit mask of DIS field. */ + +/* Register: PPI_CHEN */ +/* Description: Channel enable register */ + +/* Bit 31 : Enable or disable channel 31 */ +#define PPI_CHEN_CH31_Pos (31UL) /*!< Position of CH31 field. */ +#define PPI_CHEN_CH31_Msk (0x1UL << PPI_CHEN_CH31_Pos) /*!< Bit mask of CH31 field. */ +#define PPI_CHEN_CH31_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH31_Enabled (1UL) /*!< Enable channel */ + +/* Bit 30 : Enable or disable channel 30 */ +#define PPI_CHEN_CH30_Pos (30UL) /*!< Position of CH30 field. */ +#define PPI_CHEN_CH30_Msk (0x1UL << PPI_CHEN_CH30_Pos) /*!< Bit mask of CH30 field. */ +#define PPI_CHEN_CH30_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH30_Enabled (1UL) /*!< Enable channel */ + +/* Bit 29 : Enable or disable channel 29 */ +#define PPI_CHEN_CH29_Pos (29UL) /*!< Position of CH29 field. */ +#define PPI_CHEN_CH29_Msk (0x1UL << PPI_CHEN_CH29_Pos) /*!< Bit mask of CH29 field. */ +#define PPI_CHEN_CH29_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH29_Enabled (1UL) /*!< Enable channel */ + +/* Bit 28 : Enable or disable channel 28 */ +#define PPI_CHEN_CH28_Pos (28UL) /*!< Position of CH28 field. */ +#define PPI_CHEN_CH28_Msk (0x1UL << PPI_CHEN_CH28_Pos) /*!< Bit mask of CH28 field. */ +#define PPI_CHEN_CH28_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH28_Enabled (1UL) /*!< Enable channel */ + +/* Bit 27 : Enable or disable channel 27 */ +#define PPI_CHEN_CH27_Pos (27UL) /*!< Position of CH27 field. */ +#define PPI_CHEN_CH27_Msk (0x1UL << PPI_CHEN_CH27_Pos) /*!< Bit mask of CH27 field. */ +#define PPI_CHEN_CH27_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH27_Enabled (1UL) /*!< Enable channel */ + +/* Bit 26 : Enable or disable channel 26 */ +#define PPI_CHEN_CH26_Pos (26UL) /*!< Position of CH26 field. */ +#define PPI_CHEN_CH26_Msk (0x1UL << PPI_CHEN_CH26_Pos) /*!< Bit mask of CH26 field. */ +#define PPI_CHEN_CH26_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH26_Enabled (1UL) /*!< Enable channel */ + +/* Bit 25 : Enable or disable channel 25 */ +#define PPI_CHEN_CH25_Pos (25UL) /*!< Position of CH25 field. */ +#define PPI_CHEN_CH25_Msk (0x1UL << PPI_CHEN_CH25_Pos) /*!< Bit mask of CH25 field. */ +#define PPI_CHEN_CH25_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH25_Enabled (1UL) /*!< Enable channel */ + +/* Bit 24 : Enable or disable channel 24 */ +#define PPI_CHEN_CH24_Pos (24UL) /*!< Position of CH24 field. */ +#define PPI_CHEN_CH24_Msk (0x1UL << PPI_CHEN_CH24_Pos) /*!< Bit mask of CH24 field. */ +#define PPI_CHEN_CH24_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH24_Enabled (1UL) /*!< Enable channel */ + +/* Bit 23 : Enable or disable channel 23 */ +#define PPI_CHEN_CH23_Pos (23UL) /*!< Position of CH23 field. */ +#define PPI_CHEN_CH23_Msk (0x1UL << PPI_CHEN_CH23_Pos) /*!< Bit mask of CH23 field. */ +#define PPI_CHEN_CH23_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH23_Enabled (1UL) /*!< Enable channel */ + +/* Bit 22 : Enable or disable channel 22 */ +#define PPI_CHEN_CH22_Pos (22UL) /*!< Position of CH22 field. */ +#define PPI_CHEN_CH22_Msk (0x1UL << PPI_CHEN_CH22_Pos) /*!< Bit mask of CH22 field. */ +#define PPI_CHEN_CH22_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH22_Enabled (1UL) /*!< Enable channel */ + +/* Bit 21 : Enable or disable channel 21 */ +#define PPI_CHEN_CH21_Pos (21UL) /*!< Position of CH21 field. */ +#define PPI_CHEN_CH21_Msk (0x1UL << PPI_CHEN_CH21_Pos) /*!< Bit mask of CH21 field. */ +#define PPI_CHEN_CH21_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH21_Enabled (1UL) /*!< Enable channel */ + +/* Bit 20 : Enable or disable channel 20 */ +#define PPI_CHEN_CH20_Pos (20UL) /*!< Position of CH20 field. */ +#define PPI_CHEN_CH20_Msk (0x1UL << PPI_CHEN_CH20_Pos) /*!< Bit mask of CH20 field. */ +#define PPI_CHEN_CH20_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH20_Enabled (1UL) /*!< Enable channel */ + +/* Bit 19 : Enable or disable channel 19 */ +#define PPI_CHEN_CH19_Pos (19UL) /*!< Position of CH19 field. */ +#define PPI_CHEN_CH19_Msk (0x1UL << PPI_CHEN_CH19_Pos) /*!< Bit mask of CH19 field. */ +#define PPI_CHEN_CH19_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH19_Enabled (1UL) /*!< Enable channel */ + +/* Bit 18 : Enable or disable channel 18 */ +#define PPI_CHEN_CH18_Pos (18UL) /*!< Position of CH18 field. */ +#define PPI_CHEN_CH18_Msk (0x1UL << PPI_CHEN_CH18_Pos) /*!< Bit mask of CH18 field. */ +#define PPI_CHEN_CH18_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH18_Enabled (1UL) /*!< Enable channel */ + +/* Bit 17 : Enable or disable channel 17 */ +#define PPI_CHEN_CH17_Pos (17UL) /*!< Position of CH17 field. */ +#define PPI_CHEN_CH17_Msk (0x1UL << PPI_CHEN_CH17_Pos) /*!< Bit mask of CH17 field. */ +#define PPI_CHEN_CH17_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH17_Enabled (1UL) /*!< Enable channel */ + +/* Bit 16 : Enable or disable channel 16 */ +#define PPI_CHEN_CH16_Pos (16UL) /*!< Position of CH16 field. */ +#define PPI_CHEN_CH16_Msk (0x1UL << PPI_CHEN_CH16_Pos) /*!< Bit mask of CH16 field. */ +#define PPI_CHEN_CH16_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH16_Enabled (1UL) /*!< Enable channel */ + +/* Bit 15 : Enable or disable channel 15 */ +#define PPI_CHEN_CH15_Pos (15UL) /*!< Position of CH15 field. */ +#define PPI_CHEN_CH15_Msk (0x1UL << PPI_CHEN_CH15_Pos) /*!< Bit mask of CH15 field. */ +#define PPI_CHEN_CH15_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH15_Enabled (1UL) /*!< Enable channel */ + +/* Bit 14 : Enable or disable channel 14 */ +#define PPI_CHEN_CH14_Pos (14UL) /*!< Position of CH14 field. */ +#define PPI_CHEN_CH14_Msk (0x1UL << PPI_CHEN_CH14_Pos) /*!< Bit mask of CH14 field. */ +#define PPI_CHEN_CH14_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH14_Enabled (1UL) /*!< Enable channel */ + +/* Bit 13 : Enable or disable channel 13 */ +#define PPI_CHEN_CH13_Pos (13UL) /*!< Position of CH13 field. */ +#define PPI_CHEN_CH13_Msk (0x1UL << PPI_CHEN_CH13_Pos) /*!< Bit mask of CH13 field. */ +#define PPI_CHEN_CH13_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH13_Enabled (1UL) /*!< Enable channel */ + +/* Bit 12 : Enable or disable channel 12 */ +#define PPI_CHEN_CH12_Pos (12UL) /*!< Position of CH12 field. */ +#define PPI_CHEN_CH12_Msk (0x1UL << PPI_CHEN_CH12_Pos) /*!< Bit mask of CH12 field. */ +#define PPI_CHEN_CH12_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH12_Enabled (1UL) /*!< Enable channel */ + +/* Bit 11 : Enable or disable channel 11 */ +#define PPI_CHEN_CH11_Pos (11UL) /*!< Position of CH11 field. */ +#define PPI_CHEN_CH11_Msk (0x1UL << PPI_CHEN_CH11_Pos) /*!< Bit mask of CH11 field. */ +#define PPI_CHEN_CH11_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH11_Enabled (1UL) /*!< Enable channel */ + +/* Bit 10 : Enable or disable channel 10 */ +#define PPI_CHEN_CH10_Pos (10UL) /*!< Position of CH10 field. */ +#define PPI_CHEN_CH10_Msk (0x1UL << PPI_CHEN_CH10_Pos) /*!< Bit mask of CH10 field. */ +#define PPI_CHEN_CH10_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH10_Enabled (1UL) /*!< Enable channel */ + +/* Bit 9 : Enable or disable channel 9 */ +#define PPI_CHEN_CH9_Pos (9UL) /*!< Position of CH9 field. */ +#define PPI_CHEN_CH9_Msk (0x1UL << PPI_CHEN_CH9_Pos) /*!< Bit mask of CH9 field. */ +#define PPI_CHEN_CH9_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH9_Enabled (1UL) /*!< Enable channel */ + +/* Bit 8 : Enable or disable channel 8 */ +#define PPI_CHEN_CH8_Pos (8UL) /*!< Position of CH8 field. */ +#define PPI_CHEN_CH8_Msk (0x1UL << PPI_CHEN_CH8_Pos) /*!< Bit mask of CH8 field. */ +#define PPI_CHEN_CH8_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH8_Enabled (1UL) /*!< Enable channel */ + +/* Bit 7 : Enable or disable channel 7 */ +#define PPI_CHEN_CH7_Pos (7UL) /*!< Position of CH7 field. */ +#define PPI_CHEN_CH7_Msk (0x1UL << PPI_CHEN_CH7_Pos) /*!< Bit mask of CH7 field. */ +#define PPI_CHEN_CH7_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH7_Enabled (1UL) /*!< Enable channel */ + +/* Bit 6 : Enable or disable channel 6 */ +#define PPI_CHEN_CH6_Pos (6UL) /*!< Position of CH6 field. */ +#define PPI_CHEN_CH6_Msk (0x1UL << PPI_CHEN_CH6_Pos) /*!< Bit mask of CH6 field. */ +#define PPI_CHEN_CH6_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH6_Enabled (1UL) /*!< Enable channel */ + +/* Bit 5 : Enable or disable channel 5 */ +#define PPI_CHEN_CH5_Pos (5UL) /*!< Position of CH5 field. */ +#define PPI_CHEN_CH5_Msk (0x1UL << PPI_CHEN_CH5_Pos) /*!< Bit mask of CH5 field. */ +#define PPI_CHEN_CH5_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH5_Enabled (1UL) /*!< Enable channel */ + +/* Bit 4 : Enable or disable channel 4 */ +#define PPI_CHEN_CH4_Pos (4UL) /*!< Position of CH4 field. */ +#define PPI_CHEN_CH4_Msk (0x1UL << PPI_CHEN_CH4_Pos) /*!< Bit mask of CH4 field. */ +#define PPI_CHEN_CH4_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH4_Enabled (1UL) /*!< Enable channel */ + +/* Bit 3 : Enable or disable channel 3 */ +#define PPI_CHEN_CH3_Pos (3UL) /*!< Position of CH3 field. */ +#define PPI_CHEN_CH3_Msk (0x1UL << PPI_CHEN_CH3_Pos) /*!< Bit mask of CH3 field. */ +#define PPI_CHEN_CH3_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH3_Enabled (1UL) /*!< Enable channel */ + +/* Bit 2 : Enable or disable channel 2 */ +#define PPI_CHEN_CH2_Pos (2UL) /*!< Position of CH2 field. */ +#define PPI_CHEN_CH2_Msk (0x1UL << PPI_CHEN_CH2_Pos) /*!< Bit mask of CH2 field. */ +#define PPI_CHEN_CH2_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH2_Enabled (1UL) /*!< Enable channel */ + +/* Bit 1 : Enable or disable channel 1 */ +#define PPI_CHEN_CH1_Pos (1UL) /*!< Position of CH1 field. */ +#define PPI_CHEN_CH1_Msk (0x1UL << PPI_CHEN_CH1_Pos) /*!< Bit mask of CH1 field. */ +#define PPI_CHEN_CH1_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH1_Enabled (1UL) /*!< Enable channel */ + +/* Bit 0 : Enable or disable channel 0 */ +#define PPI_CHEN_CH0_Pos (0UL) /*!< Position of CH0 field. */ +#define PPI_CHEN_CH0_Msk (0x1UL << PPI_CHEN_CH0_Pos) /*!< Bit mask of CH0 field. */ +#define PPI_CHEN_CH0_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH0_Enabled (1UL) /*!< Enable channel */ + +/* Register: PPI_CHENSET */ +/* Description: Channel enable set register */ + +/* Bit 31 : Channel 31 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH31_Pos (31UL) /*!< Position of CH31 field. */ +#define PPI_CHENSET_CH31_Msk (0x1UL << PPI_CHENSET_CH31_Pos) /*!< Bit mask of CH31 field. */ +#define PPI_CHENSET_CH31_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH31_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH31_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 30 : Channel 30 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH30_Pos (30UL) /*!< Position of CH30 field. */ +#define PPI_CHENSET_CH30_Msk (0x1UL << PPI_CHENSET_CH30_Pos) /*!< Bit mask of CH30 field. */ +#define PPI_CHENSET_CH30_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH30_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH30_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 29 : Channel 29 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH29_Pos (29UL) /*!< Position of CH29 field. */ +#define PPI_CHENSET_CH29_Msk (0x1UL << PPI_CHENSET_CH29_Pos) /*!< Bit mask of CH29 field. */ +#define PPI_CHENSET_CH29_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH29_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH29_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 28 : Channel 28 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH28_Pos (28UL) /*!< Position of CH28 field. */ +#define PPI_CHENSET_CH28_Msk (0x1UL << PPI_CHENSET_CH28_Pos) /*!< Bit mask of CH28 field. */ +#define PPI_CHENSET_CH28_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH28_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH28_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 27 : Channel 27 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH27_Pos (27UL) /*!< Position of CH27 field. */ +#define PPI_CHENSET_CH27_Msk (0x1UL << PPI_CHENSET_CH27_Pos) /*!< Bit mask of CH27 field. */ +#define PPI_CHENSET_CH27_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH27_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH27_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 26 : Channel 26 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH26_Pos (26UL) /*!< Position of CH26 field. */ +#define PPI_CHENSET_CH26_Msk (0x1UL << PPI_CHENSET_CH26_Pos) /*!< Bit mask of CH26 field. */ +#define PPI_CHENSET_CH26_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH26_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH26_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 25 : Channel 25 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH25_Pos (25UL) /*!< Position of CH25 field. */ +#define PPI_CHENSET_CH25_Msk (0x1UL << PPI_CHENSET_CH25_Pos) /*!< Bit mask of CH25 field. */ +#define PPI_CHENSET_CH25_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH25_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH25_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 24 : Channel 24 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH24_Pos (24UL) /*!< Position of CH24 field. */ +#define PPI_CHENSET_CH24_Msk (0x1UL << PPI_CHENSET_CH24_Pos) /*!< Bit mask of CH24 field. */ +#define PPI_CHENSET_CH24_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH24_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH24_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 23 : Channel 23 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH23_Pos (23UL) /*!< Position of CH23 field. */ +#define PPI_CHENSET_CH23_Msk (0x1UL << PPI_CHENSET_CH23_Pos) /*!< Bit mask of CH23 field. */ +#define PPI_CHENSET_CH23_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH23_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH23_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 22 : Channel 22 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH22_Pos (22UL) /*!< Position of CH22 field. */ +#define PPI_CHENSET_CH22_Msk (0x1UL << PPI_CHENSET_CH22_Pos) /*!< Bit mask of CH22 field. */ +#define PPI_CHENSET_CH22_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH22_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH22_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 21 : Channel 21 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH21_Pos (21UL) /*!< Position of CH21 field. */ +#define PPI_CHENSET_CH21_Msk (0x1UL << PPI_CHENSET_CH21_Pos) /*!< Bit mask of CH21 field. */ +#define PPI_CHENSET_CH21_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH21_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH21_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 20 : Channel 20 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH20_Pos (20UL) /*!< Position of CH20 field. */ +#define PPI_CHENSET_CH20_Msk (0x1UL << PPI_CHENSET_CH20_Pos) /*!< Bit mask of CH20 field. */ +#define PPI_CHENSET_CH20_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH20_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH20_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 19 : Channel 19 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH19_Pos (19UL) /*!< Position of CH19 field. */ +#define PPI_CHENSET_CH19_Msk (0x1UL << PPI_CHENSET_CH19_Pos) /*!< Bit mask of CH19 field. */ +#define PPI_CHENSET_CH19_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH19_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH19_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 18 : Channel 18 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH18_Pos (18UL) /*!< Position of CH18 field. */ +#define PPI_CHENSET_CH18_Msk (0x1UL << PPI_CHENSET_CH18_Pos) /*!< Bit mask of CH18 field. */ +#define PPI_CHENSET_CH18_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH18_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH18_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 17 : Channel 17 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH17_Pos (17UL) /*!< Position of CH17 field. */ +#define PPI_CHENSET_CH17_Msk (0x1UL << PPI_CHENSET_CH17_Pos) /*!< Bit mask of CH17 field. */ +#define PPI_CHENSET_CH17_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH17_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH17_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 16 : Channel 16 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH16_Pos (16UL) /*!< Position of CH16 field. */ +#define PPI_CHENSET_CH16_Msk (0x1UL << PPI_CHENSET_CH16_Pos) /*!< Bit mask of CH16 field. */ +#define PPI_CHENSET_CH16_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH16_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH16_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 15 : Channel 15 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH15_Pos (15UL) /*!< Position of CH15 field. */ +#define PPI_CHENSET_CH15_Msk (0x1UL << PPI_CHENSET_CH15_Pos) /*!< Bit mask of CH15 field. */ +#define PPI_CHENSET_CH15_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH15_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH15_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 14 : Channel 14 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH14_Pos (14UL) /*!< Position of CH14 field. */ +#define PPI_CHENSET_CH14_Msk (0x1UL << PPI_CHENSET_CH14_Pos) /*!< Bit mask of CH14 field. */ +#define PPI_CHENSET_CH14_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH14_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH14_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 13 : Channel 13 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH13_Pos (13UL) /*!< Position of CH13 field. */ +#define PPI_CHENSET_CH13_Msk (0x1UL << PPI_CHENSET_CH13_Pos) /*!< Bit mask of CH13 field. */ +#define PPI_CHENSET_CH13_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH13_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH13_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 12 : Channel 12 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH12_Pos (12UL) /*!< Position of CH12 field. */ +#define PPI_CHENSET_CH12_Msk (0x1UL << PPI_CHENSET_CH12_Pos) /*!< Bit mask of CH12 field. */ +#define PPI_CHENSET_CH12_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH12_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH12_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 11 : Channel 11 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH11_Pos (11UL) /*!< Position of CH11 field. */ +#define PPI_CHENSET_CH11_Msk (0x1UL << PPI_CHENSET_CH11_Pos) /*!< Bit mask of CH11 field. */ +#define PPI_CHENSET_CH11_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH11_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH11_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 10 : Channel 10 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH10_Pos (10UL) /*!< Position of CH10 field. */ +#define PPI_CHENSET_CH10_Msk (0x1UL << PPI_CHENSET_CH10_Pos) /*!< Bit mask of CH10 field. */ +#define PPI_CHENSET_CH10_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH10_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH10_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 9 : Channel 9 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH9_Pos (9UL) /*!< Position of CH9 field. */ +#define PPI_CHENSET_CH9_Msk (0x1UL << PPI_CHENSET_CH9_Pos) /*!< Bit mask of CH9 field. */ +#define PPI_CHENSET_CH9_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH9_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH9_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 8 : Channel 8 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH8_Pos (8UL) /*!< Position of CH8 field. */ +#define PPI_CHENSET_CH8_Msk (0x1UL << PPI_CHENSET_CH8_Pos) /*!< Bit mask of CH8 field. */ +#define PPI_CHENSET_CH8_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH8_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH8_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 7 : Channel 7 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH7_Pos (7UL) /*!< Position of CH7 field. */ +#define PPI_CHENSET_CH7_Msk (0x1UL << PPI_CHENSET_CH7_Pos) /*!< Bit mask of CH7 field. */ +#define PPI_CHENSET_CH7_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH7_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH7_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 6 : Channel 6 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH6_Pos (6UL) /*!< Position of CH6 field. */ +#define PPI_CHENSET_CH6_Msk (0x1UL << PPI_CHENSET_CH6_Pos) /*!< Bit mask of CH6 field. */ +#define PPI_CHENSET_CH6_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH6_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH6_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 5 : Channel 5 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH5_Pos (5UL) /*!< Position of CH5 field. */ +#define PPI_CHENSET_CH5_Msk (0x1UL << PPI_CHENSET_CH5_Pos) /*!< Bit mask of CH5 field. */ +#define PPI_CHENSET_CH5_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH5_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH5_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 4 : Channel 4 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH4_Pos (4UL) /*!< Position of CH4 field. */ +#define PPI_CHENSET_CH4_Msk (0x1UL << PPI_CHENSET_CH4_Pos) /*!< Bit mask of CH4 field. */ +#define PPI_CHENSET_CH4_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH4_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH4_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 3 : Channel 3 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH3_Pos (3UL) /*!< Position of CH3 field. */ +#define PPI_CHENSET_CH3_Msk (0x1UL << PPI_CHENSET_CH3_Pos) /*!< Bit mask of CH3 field. */ +#define PPI_CHENSET_CH3_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH3_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH3_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 2 : Channel 2 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH2_Pos (2UL) /*!< Position of CH2 field. */ +#define PPI_CHENSET_CH2_Msk (0x1UL << PPI_CHENSET_CH2_Pos) /*!< Bit mask of CH2 field. */ +#define PPI_CHENSET_CH2_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH2_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH2_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 1 : Channel 1 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH1_Pos (1UL) /*!< Position of CH1 field. */ +#define PPI_CHENSET_CH1_Msk (0x1UL << PPI_CHENSET_CH1_Pos) /*!< Bit mask of CH1 field. */ +#define PPI_CHENSET_CH1_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH1_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH1_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 0 : Channel 0 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH0_Pos (0UL) /*!< Position of CH0 field. */ +#define PPI_CHENSET_CH0_Msk (0x1UL << PPI_CHENSET_CH0_Pos) /*!< Bit mask of CH0 field. */ +#define PPI_CHENSET_CH0_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH0_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH0_Set (1UL) /*!< Write: Enable channel */ + +/* Register: PPI_CHENCLR */ +/* Description: Channel enable clear register */ + +/* Bit 31 : Channel 31 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH31_Pos (31UL) /*!< Position of CH31 field. */ +#define PPI_CHENCLR_CH31_Msk (0x1UL << PPI_CHENCLR_CH31_Pos) /*!< Bit mask of CH31 field. */ +#define PPI_CHENCLR_CH31_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH31_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH31_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 30 : Channel 30 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH30_Pos (30UL) /*!< Position of CH30 field. */ +#define PPI_CHENCLR_CH30_Msk (0x1UL << PPI_CHENCLR_CH30_Pos) /*!< Bit mask of CH30 field. */ +#define PPI_CHENCLR_CH30_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH30_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH30_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 29 : Channel 29 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH29_Pos (29UL) /*!< Position of CH29 field. */ +#define PPI_CHENCLR_CH29_Msk (0x1UL << PPI_CHENCLR_CH29_Pos) /*!< Bit mask of CH29 field. */ +#define PPI_CHENCLR_CH29_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH29_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH29_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 28 : Channel 28 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH28_Pos (28UL) /*!< Position of CH28 field. */ +#define PPI_CHENCLR_CH28_Msk (0x1UL << PPI_CHENCLR_CH28_Pos) /*!< Bit mask of CH28 field. */ +#define PPI_CHENCLR_CH28_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH28_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH28_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 27 : Channel 27 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH27_Pos (27UL) /*!< Position of CH27 field. */ +#define PPI_CHENCLR_CH27_Msk (0x1UL << PPI_CHENCLR_CH27_Pos) /*!< Bit mask of CH27 field. */ +#define PPI_CHENCLR_CH27_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH27_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH27_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 26 : Channel 26 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH26_Pos (26UL) /*!< Position of CH26 field. */ +#define PPI_CHENCLR_CH26_Msk (0x1UL << PPI_CHENCLR_CH26_Pos) /*!< Bit mask of CH26 field. */ +#define PPI_CHENCLR_CH26_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH26_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH26_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 25 : Channel 25 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH25_Pos (25UL) /*!< Position of CH25 field. */ +#define PPI_CHENCLR_CH25_Msk (0x1UL << PPI_CHENCLR_CH25_Pos) /*!< Bit mask of CH25 field. */ +#define PPI_CHENCLR_CH25_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH25_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH25_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 24 : Channel 24 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH24_Pos (24UL) /*!< Position of CH24 field. */ +#define PPI_CHENCLR_CH24_Msk (0x1UL << PPI_CHENCLR_CH24_Pos) /*!< Bit mask of CH24 field. */ +#define PPI_CHENCLR_CH24_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH24_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH24_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 23 : Channel 23 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH23_Pos (23UL) /*!< Position of CH23 field. */ +#define PPI_CHENCLR_CH23_Msk (0x1UL << PPI_CHENCLR_CH23_Pos) /*!< Bit mask of CH23 field. */ +#define PPI_CHENCLR_CH23_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH23_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH23_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 22 : Channel 22 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH22_Pos (22UL) /*!< Position of CH22 field. */ +#define PPI_CHENCLR_CH22_Msk (0x1UL << PPI_CHENCLR_CH22_Pos) /*!< Bit mask of CH22 field. */ +#define PPI_CHENCLR_CH22_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH22_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH22_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 21 : Channel 21 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH21_Pos (21UL) /*!< Position of CH21 field. */ +#define PPI_CHENCLR_CH21_Msk (0x1UL << PPI_CHENCLR_CH21_Pos) /*!< Bit mask of CH21 field. */ +#define PPI_CHENCLR_CH21_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH21_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH21_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 20 : Channel 20 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH20_Pos (20UL) /*!< Position of CH20 field. */ +#define PPI_CHENCLR_CH20_Msk (0x1UL << PPI_CHENCLR_CH20_Pos) /*!< Bit mask of CH20 field. */ +#define PPI_CHENCLR_CH20_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH20_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH20_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 19 : Channel 19 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH19_Pos (19UL) /*!< Position of CH19 field. */ +#define PPI_CHENCLR_CH19_Msk (0x1UL << PPI_CHENCLR_CH19_Pos) /*!< Bit mask of CH19 field. */ +#define PPI_CHENCLR_CH19_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH19_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH19_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 18 : Channel 18 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH18_Pos (18UL) /*!< Position of CH18 field. */ +#define PPI_CHENCLR_CH18_Msk (0x1UL << PPI_CHENCLR_CH18_Pos) /*!< Bit mask of CH18 field. */ +#define PPI_CHENCLR_CH18_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH18_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH18_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 17 : Channel 17 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH17_Pos (17UL) /*!< Position of CH17 field. */ +#define PPI_CHENCLR_CH17_Msk (0x1UL << PPI_CHENCLR_CH17_Pos) /*!< Bit mask of CH17 field. */ +#define PPI_CHENCLR_CH17_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH17_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH17_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 16 : Channel 16 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH16_Pos (16UL) /*!< Position of CH16 field. */ +#define PPI_CHENCLR_CH16_Msk (0x1UL << PPI_CHENCLR_CH16_Pos) /*!< Bit mask of CH16 field. */ +#define PPI_CHENCLR_CH16_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH16_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH16_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 15 : Channel 15 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH15_Pos (15UL) /*!< Position of CH15 field. */ +#define PPI_CHENCLR_CH15_Msk (0x1UL << PPI_CHENCLR_CH15_Pos) /*!< Bit mask of CH15 field. */ +#define PPI_CHENCLR_CH15_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH15_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH15_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 14 : Channel 14 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH14_Pos (14UL) /*!< Position of CH14 field. */ +#define PPI_CHENCLR_CH14_Msk (0x1UL << PPI_CHENCLR_CH14_Pos) /*!< Bit mask of CH14 field. */ +#define PPI_CHENCLR_CH14_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH14_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH14_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 13 : Channel 13 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH13_Pos (13UL) /*!< Position of CH13 field. */ +#define PPI_CHENCLR_CH13_Msk (0x1UL << PPI_CHENCLR_CH13_Pos) /*!< Bit mask of CH13 field. */ +#define PPI_CHENCLR_CH13_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH13_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH13_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 12 : Channel 12 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH12_Pos (12UL) /*!< Position of CH12 field. */ +#define PPI_CHENCLR_CH12_Msk (0x1UL << PPI_CHENCLR_CH12_Pos) /*!< Bit mask of CH12 field. */ +#define PPI_CHENCLR_CH12_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH12_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH12_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 11 : Channel 11 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH11_Pos (11UL) /*!< Position of CH11 field. */ +#define PPI_CHENCLR_CH11_Msk (0x1UL << PPI_CHENCLR_CH11_Pos) /*!< Bit mask of CH11 field. */ +#define PPI_CHENCLR_CH11_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH11_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH11_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 10 : Channel 10 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH10_Pos (10UL) /*!< Position of CH10 field. */ +#define PPI_CHENCLR_CH10_Msk (0x1UL << PPI_CHENCLR_CH10_Pos) /*!< Bit mask of CH10 field. */ +#define PPI_CHENCLR_CH10_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH10_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH10_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 9 : Channel 9 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH9_Pos (9UL) /*!< Position of CH9 field. */ +#define PPI_CHENCLR_CH9_Msk (0x1UL << PPI_CHENCLR_CH9_Pos) /*!< Bit mask of CH9 field. */ +#define PPI_CHENCLR_CH9_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH9_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH9_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 8 : Channel 8 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH8_Pos (8UL) /*!< Position of CH8 field. */ +#define PPI_CHENCLR_CH8_Msk (0x1UL << PPI_CHENCLR_CH8_Pos) /*!< Bit mask of CH8 field. */ +#define PPI_CHENCLR_CH8_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH8_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH8_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 7 : Channel 7 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH7_Pos (7UL) /*!< Position of CH7 field. */ +#define PPI_CHENCLR_CH7_Msk (0x1UL << PPI_CHENCLR_CH7_Pos) /*!< Bit mask of CH7 field. */ +#define PPI_CHENCLR_CH7_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH7_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH7_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 6 : Channel 6 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH6_Pos (6UL) /*!< Position of CH6 field. */ +#define PPI_CHENCLR_CH6_Msk (0x1UL << PPI_CHENCLR_CH6_Pos) /*!< Bit mask of CH6 field. */ +#define PPI_CHENCLR_CH6_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH6_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH6_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 5 : Channel 5 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH5_Pos (5UL) /*!< Position of CH5 field. */ +#define PPI_CHENCLR_CH5_Msk (0x1UL << PPI_CHENCLR_CH5_Pos) /*!< Bit mask of CH5 field. */ +#define PPI_CHENCLR_CH5_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH5_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH5_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 4 : Channel 4 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH4_Pos (4UL) /*!< Position of CH4 field. */ +#define PPI_CHENCLR_CH4_Msk (0x1UL << PPI_CHENCLR_CH4_Pos) /*!< Bit mask of CH4 field. */ +#define PPI_CHENCLR_CH4_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH4_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH4_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 3 : Channel 3 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH3_Pos (3UL) /*!< Position of CH3 field. */ +#define PPI_CHENCLR_CH3_Msk (0x1UL << PPI_CHENCLR_CH3_Pos) /*!< Bit mask of CH3 field. */ +#define PPI_CHENCLR_CH3_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH3_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH3_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 2 : Channel 2 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH2_Pos (2UL) /*!< Position of CH2 field. */ +#define PPI_CHENCLR_CH2_Msk (0x1UL << PPI_CHENCLR_CH2_Pos) /*!< Bit mask of CH2 field. */ +#define PPI_CHENCLR_CH2_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH2_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH2_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 1 : Channel 1 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH1_Pos (1UL) /*!< Position of CH1 field. */ +#define PPI_CHENCLR_CH1_Msk (0x1UL << PPI_CHENCLR_CH1_Pos) /*!< Bit mask of CH1 field. */ +#define PPI_CHENCLR_CH1_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH1_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH1_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 0 : Channel 0 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH0_Pos (0UL) /*!< Position of CH0 field. */ +#define PPI_CHENCLR_CH0_Msk (0x1UL << PPI_CHENCLR_CH0_Pos) /*!< Bit mask of CH0 field. */ +#define PPI_CHENCLR_CH0_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH0_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH0_Clear (1UL) /*!< Write: disable channel */ + +/* Register: PPI_CH_EEP */ +/* Description: Description cluster[0]: Channel 0 event end-point */ + +/* Bits 31..0 : Pointer to event register. Accepts only addresses to registers from the Event group. */ +#define PPI_CH_EEP_EEP_Pos (0UL) /*!< Position of EEP field. */ +#define PPI_CH_EEP_EEP_Msk (0xFFFFFFFFUL << PPI_CH_EEP_EEP_Pos) /*!< Bit mask of EEP field. */ + +/* Register: PPI_CH_TEP */ +/* Description: Description cluster[0]: Channel 0 task end-point */ + +/* Bits 31..0 : Pointer to task register. Accepts only addresses to registers from the Task group. */ +#define PPI_CH_TEP_TEP_Pos (0UL) /*!< Position of TEP field. */ +#define PPI_CH_TEP_TEP_Msk (0xFFFFFFFFUL << PPI_CH_TEP_TEP_Pos) /*!< Bit mask of TEP field. */ + +/* Register: PPI_CHG */ +/* Description: Description collection[0]: Channel group 0 */ + +/* Bit 31 : Include or exclude channel 31 */ +#define PPI_CHG_CH31_Pos (31UL) /*!< Position of CH31 field. */ +#define PPI_CHG_CH31_Msk (0x1UL << PPI_CHG_CH31_Pos) /*!< Bit mask of CH31 field. */ +#define PPI_CHG_CH31_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH31_Included (1UL) /*!< Include */ + +/* Bit 30 : Include or exclude channel 30 */ +#define PPI_CHG_CH30_Pos (30UL) /*!< Position of CH30 field. */ +#define PPI_CHG_CH30_Msk (0x1UL << PPI_CHG_CH30_Pos) /*!< Bit mask of CH30 field. */ +#define PPI_CHG_CH30_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH30_Included (1UL) /*!< Include */ + +/* Bit 29 : Include or exclude channel 29 */ +#define PPI_CHG_CH29_Pos (29UL) /*!< Position of CH29 field. */ +#define PPI_CHG_CH29_Msk (0x1UL << PPI_CHG_CH29_Pos) /*!< Bit mask of CH29 field. */ +#define PPI_CHG_CH29_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH29_Included (1UL) /*!< Include */ + +/* Bit 28 : Include or exclude channel 28 */ +#define PPI_CHG_CH28_Pos (28UL) /*!< Position of CH28 field. */ +#define PPI_CHG_CH28_Msk (0x1UL << PPI_CHG_CH28_Pos) /*!< Bit mask of CH28 field. */ +#define PPI_CHG_CH28_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH28_Included (1UL) /*!< Include */ + +/* Bit 27 : Include or exclude channel 27 */ +#define PPI_CHG_CH27_Pos (27UL) /*!< Position of CH27 field. */ +#define PPI_CHG_CH27_Msk (0x1UL << PPI_CHG_CH27_Pos) /*!< Bit mask of CH27 field. */ +#define PPI_CHG_CH27_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH27_Included (1UL) /*!< Include */ + +/* Bit 26 : Include or exclude channel 26 */ +#define PPI_CHG_CH26_Pos (26UL) /*!< Position of CH26 field. */ +#define PPI_CHG_CH26_Msk (0x1UL << PPI_CHG_CH26_Pos) /*!< Bit mask of CH26 field. */ +#define PPI_CHG_CH26_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH26_Included (1UL) /*!< Include */ + +/* Bit 25 : Include or exclude channel 25 */ +#define PPI_CHG_CH25_Pos (25UL) /*!< Position of CH25 field. */ +#define PPI_CHG_CH25_Msk (0x1UL << PPI_CHG_CH25_Pos) /*!< Bit mask of CH25 field. */ +#define PPI_CHG_CH25_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH25_Included (1UL) /*!< Include */ + +/* Bit 24 : Include or exclude channel 24 */ +#define PPI_CHG_CH24_Pos (24UL) /*!< Position of CH24 field. */ +#define PPI_CHG_CH24_Msk (0x1UL << PPI_CHG_CH24_Pos) /*!< Bit mask of CH24 field. */ +#define PPI_CHG_CH24_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH24_Included (1UL) /*!< Include */ + +/* Bit 23 : Include or exclude channel 23 */ +#define PPI_CHG_CH23_Pos (23UL) /*!< Position of CH23 field. */ +#define PPI_CHG_CH23_Msk (0x1UL << PPI_CHG_CH23_Pos) /*!< Bit mask of CH23 field. */ +#define PPI_CHG_CH23_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH23_Included (1UL) /*!< Include */ + +/* Bit 22 : Include or exclude channel 22 */ +#define PPI_CHG_CH22_Pos (22UL) /*!< Position of CH22 field. */ +#define PPI_CHG_CH22_Msk (0x1UL << PPI_CHG_CH22_Pos) /*!< Bit mask of CH22 field. */ +#define PPI_CHG_CH22_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH22_Included (1UL) /*!< Include */ + +/* Bit 21 : Include or exclude channel 21 */ +#define PPI_CHG_CH21_Pos (21UL) /*!< Position of CH21 field. */ +#define PPI_CHG_CH21_Msk (0x1UL << PPI_CHG_CH21_Pos) /*!< Bit mask of CH21 field. */ +#define PPI_CHG_CH21_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH21_Included (1UL) /*!< Include */ + +/* Bit 20 : Include or exclude channel 20 */ +#define PPI_CHG_CH20_Pos (20UL) /*!< Position of CH20 field. */ +#define PPI_CHG_CH20_Msk (0x1UL << PPI_CHG_CH20_Pos) /*!< Bit mask of CH20 field. */ +#define PPI_CHG_CH20_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH20_Included (1UL) /*!< Include */ + +/* Bit 19 : Include or exclude channel 19 */ +#define PPI_CHG_CH19_Pos (19UL) /*!< Position of CH19 field. */ +#define PPI_CHG_CH19_Msk (0x1UL << PPI_CHG_CH19_Pos) /*!< Bit mask of CH19 field. */ +#define PPI_CHG_CH19_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH19_Included (1UL) /*!< Include */ + +/* Bit 18 : Include or exclude channel 18 */ +#define PPI_CHG_CH18_Pos (18UL) /*!< Position of CH18 field. */ +#define PPI_CHG_CH18_Msk (0x1UL << PPI_CHG_CH18_Pos) /*!< Bit mask of CH18 field. */ +#define PPI_CHG_CH18_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH18_Included (1UL) /*!< Include */ + +/* Bit 17 : Include or exclude channel 17 */ +#define PPI_CHG_CH17_Pos (17UL) /*!< Position of CH17 field. */ +#define PPI_CHG_CH17_Msk (0x1UL << PPI_CHG_CH17_Pos) /*!< Bit mask of CH17 field. */ +#define PPI_CHG_CH17_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH17_Included (1UL) /*!< Include */ + +/* Bit 16 : Include or exclude channel 16 */ +#define PPI_CHG_CH16_Pos (16UL) /*!< Position of CH16 field. */ +#define PPI_CHG_CH16_Msk (0x1UL << PPI_CHG_CH16_Pos) /*!< Bit mask of CH16 field. */ +#define PPI_CHG_CH16_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH16_Included (1UL) /*!< Include */ + +/* Bit 15 : Include or exclude channel 15 */ +#define PPI_CHG_CH15_Pos (15UL) /*!< Position of CH15 field. */ +#define PPI_CHG_CH15_Msk (0x1UL << PPI_CHG_CH15_Pos) /*!< Bit mask of CH15 field. */ +#define PPI_CHG_CH15_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH15_Included (1UL) /*!< Include */ + +/* Bit 14 : Include or exclude channel 14 */ +#define PPI_CHG_CH14_Pos (14UL) /*!< Position of CH14 field. */ +#define PPI_CHG_CH14_Msk (0x1UL << PPI_CHG_CH14_Pos) /*!< Bit mask of CH14 field. */ +#define PPI_CHG_CH14_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH14_Included (1UL) /*!< Include */ + +/* Bit 13 : Include or exclude channel 13 */ +#define PPI_CHG_CH13_Pos (13UL) /*!< Position of CH13 field. */ +#define PPI_CHG_CH13_Msk (0x1UL << PPI_CHG_CH13_Pos) /*!< Bit mask of CH13 field. */ +#define PPI_CHG_CH13_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH13_Included (1UL) /*!< Include */ + +/* Bit 12 : Include or exclude channel 12 */ +#define PPI_CHG_CH12_Pos (12UL) /*!< Position of CH12 field. */ +#define PPI_CHG_CH12_Msk (0x1UL << PPI_CHG_CH12_Pos) /*!< Bit mask of CH12 field. */ +#define PPI_CHG_CH12_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH12_Included (1UL) /*!< Include */ + +/* Bit 11 : Include or exclude channel 11 */ +#define PPI_CHG_CH11_Pos (11UL) /*!< Position of CH11 field. */ +#define PPI_CHG_CH11_Msk (0x1UL << PPI_CHG_CH11_Pos) /*!< Bit mask of CH11 field. */ +#define PPI_CHG_CH11_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH11_Included (1UL) /*!< Include */ + +/* Bit 10 : Include or exclude channel 10 */ +#define PPI_CHG_CH10_Pos (10UL) /*!< Position of CH10 field. */ +#define PPI_CHG_CH10_Msk (0x1UL << PPI_CHG_CH10_Pos) /*!< Bit mask of CH10 field. */ +#define PPI_CHG_CH10_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH10_Included (1UL) /*!< Include */ + +/* Bit 9 : Include or exclude channel 9 */ +#define PPI_CHG_CH9_Pos (9UL) /*!< Position of CH9 field. */ +#define PPI_CHG_CH9_Msk (0x1UL << PPI_CHG_CH9_Pos) /*!< Bit mask of CH9 field. */ +#define PPI_CHG_CH9_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH9_Included (1UL) /*!< Include */ + +/* Bit 8 : Include or exclude channel 8 */ +#define PPI_CHG_CH8_Pos (8UL) /*!< Position of CH8 field. */ +#define PPI_CHG_CH8_Msk (0x1UL << PPI_CHG_CH8_Pos) /*!< Bit mask of CH8 field. */ +#define PPI_CHG_CH8_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH8_Included (1UL) /*!< Include */ + +/* Bit 7 : Include or exclude channel 7 */ +#define PPI_CHG_CH7_Pos (7UL) /*!< Position of CH7 field. */ +#define PPI_CHG_CH7_Msk (0x1UL << PPI_CHG_CH7_Pos) /*!< Bit mask of CH7 field. */ +#define PPI_CHG_CH7_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH7_Included (1UL) /*!< Include */ + +/* Bit 6 : Include or exclude channel 6 */ +#define PPI_CHG_CH6_Pos (6UL) /*!< Position of CH6 field. */ +#define PPI_CHG_CH6_Msk (0x1UL << PPI_CHG_CH6_Pos) /*!< Bit mask of CH6 field. */ +#define PPI_CHG_CH6_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH6_Included (1UL) /*!< Include */ + +/* Bit 5 : Include or exclude channel 5 */ +#define PPI_CHG_CH5_Pos (5UL) /*!< Position of CH5 field. */ +#define PPI_CHG_CH5_Msk (0x1UL << PPI_CHG_CH5_Pos) /*!< Bit mask of CH5 field. */ +#define PPI_CHG_CH5_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH5_Included (1UL) /*!< Include */ + +/* Bit 4 : Include or exclude channel 4 */ +#define PPI_CHG_CH4_Pos (4UL) /*!< Position of CH4 field. */ +#define PPI_CHG_CH4_Msk (0x1UL << PPI_CHG_CH4_Pos) /*!< Bit mask of CH4 field. */ +#define PPI_CHG_CH4_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH4_Included (1UL) /*!< Include */ + +/* Bit 3 : Include or exclude channel 3 */ +#define PPI_CHG_CH3_Pos (3UL) /*!< Position of CH3 field. */ +#define PPI_CHG_CH3_Msk (0x1UL << PPI_CHG_CH3_Pos) /*!< Bit mask of CH3 field. */ +#define PPI_CHG_CH3_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH3_Included (1UL) /*!< Include */ + +/* Bit 2 : Include or exclude channel 2 */ +#define PPI_CHG_CH2_Pos (2UL) /*!< Position of CH2 field. */ +#define PPI_CHG_CH2_Msk (0x1UL << PPI_CHG_CH2_Pos) /*!< Bit mask of CH2 field. */ +#define PPI_CHG_CH2_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH2_Included (1UL) /*!< Include */ + +/* Bit 1 : Include or exclude channel 1 */ +#define PPI_CHG_CH1_Pos (1UL) /*!< Position of CH1 field. */ +#define PPI_CHG_CH1_Msk (0x1UL << PPI_CHG_CH1_Pos) /*!< Bit mask of CH1 field. */ +#define PPI_CHG_CH1_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH1_Included (1UL) /*!< Include */ + +/* Bit 0 : Include or exclude channel 0 */ +#define PPI_CHG_CH0_Pos (0UL) /*!< Position of CH0 field. */ +#define PPI_CHG_CH0_Msk (0x1UL << PPI_CHG_CH0_Pos) /*!< Bit mask of CH0 field. */ +#define PPI_CHG_CH0_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH0_Included (1UL) /*!< Include */ + +/* Register: PPI_FORK_TEP */ +/* Description: Description cluster[0]: Channel 0 task end-point */ + +/* Bits 31..0 : Pointer to task register */ +#define PPI_FORK_TEP_TEP_Pos (0UL) /*!< Position of TEP field. */ +#define PPI_FORK_TEP_TEP_Msk (0xFFFFFFFFUL << PPI_FORK_TEP_TEP_Pos) /*!< Bit mask of TEP field. */ + + +/* Peripheral: PWM */ +/* Description: Pulse width modulation unit */ + +/* Register: PWM_TASKS_STOP */ +/* Description: Stops PWM pulse generation on all channels at the end of current PWM period, and stops sequence playback */ + +/* Bit 0 : */ +#define PWM_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define PWM_TASKS_STOP_TASKS_STOP_Msk (0x1UL << PWM_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: PWM_TASKS_SEQSTART */ +/* Description: Description collection[0]: Loads the first PWM value on all enabled channels from sequence 0, and starts playing that sequence at the rate defined in SEQ[0]REFRESH and/or DECODER.MODE. Causes PWM generation to start if not running. */ + +/* Bit 0 : */ +#define PWM_TASKS_SEQSTART_TASKS_SEQSTART_Pos (0UL) /*!< Position of TASKS_SEQSTART field. */ +#define PWM_TASKS_SEQSTART_TASKS_SEQSTART_Msk (0x1UL << PWM_TASKS_SEQSTART_TASKS_SEQSTART_Pos) /*!< Bit mask of TASKS_SEQSTART field. */ + +/* Register: PWM_TASKS_NEXTSTEP */ +/* Description: Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running. */ + +/* Bit 0 : */ +#define PWM_TASKS_NEXTSTEP_TASKS_NEXTSTEP_Pos (0UL) /*!< Position of TASKS_NEXTSTEP field. */ +#define PWM_TASKS_NEXTSTEP_TASKS_NEXTSTEP_Msk (0x1UL << PWM_TASKS_NEXTSTEP_TASKS_NEXTSTEP_Pos) /*!< Bit mask of TASKS_NEXTSTEP field. */ + +/* Register: PWM_EVENTS_STOPPED */ +/* Description: Response to STOP task, emitted when PWM pulses are no longer generated */ + +/* Bit 0 : */ +#define PWM_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */ +#define PWM_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << PWM_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */ + +/* Register: PWM_EVENTS_SEQSTARTED */ +/* Description: Description collection[0]: First PWM period started on sequence 0 */ + +/* Bit 0 : */ +#define PWM_EVENTS_SEQSTARTED_EVENTS_SEQSTARTED_Pos (0UL) /*!< Position of EVENTS_SEQSTARTED field. */ +#define PWM_EVENTS_SEQSTARTED_EVENTS_SEQSTARTED_Msk (0x1UL << PWM_EVENTS_SEQSTARTED_EVENTS_SEQSTARTED_Pos) /*!< Bit mask of EVENTS_SEQSTARTED field. */ + +/* Register: PWM_EVENTS_SEQEND */ +/* Description: Description collection[0]: Emitted at end of every sequence 0, when last value from RAM has been applied to wave counter */ + +/* Bit 0 : */ +#define PWM_EVENTS_SEQEND_EVENTS_SEQEND_Pos (0UL) /*!< Position of EVENTS_SEQEND field. */ +#define PWM_EVENTS_SEQEND_EVENTS_SEQEND_Msk (0x1UL << PWM_EVENTS_SEQEND_EVENTS_SEQEND_Pos) /*!< Bit mask of EVENTS_SEQEND field. */ + +/* Register: PWM_EVENTS_PWMPERIODEND */ +/* Description: Emitted at the end of each PWM period */ + +/* Bit 0 : */ +#define PWM_EVENTS_PWMPERIODEND_EVENTS_PWMPERIODEND_Pos (0UL) /*!< Position of EVENTS_PWMPERIODEND field. */ +#define PWM_EVENTS_PWMPERIODEND_EVENTS_PWMPERIODEND_Msk (0x1UL << PWM_EVENTS_PWMPERIODEND_EVENTS_PWMPERIODEND_Pos) /*!< Bit mask of EVENTS_PWMPERIODEND field. */ + +/* Register: PWM_EVENTS_LOOPSDONE */ +/* Description: Concatenated sequences have been played the amount of times defined in LOOP.CNT */ + +/* Bit 0 : */ +#define PWM_EVENTS_LOOPSDONE_EVENTS_LOOPSDONE_Pos (0UL) /*!< Position of EVENTS_LOOPSDONE field. */ +#define PWM_EVENTS_LOOPSDONE_EVENTS_LOOPSDONE_Msk (0x1UL << PWM_EVENTS_LOOPSDONE_EVENTS_LOOPSDONE_Pos) /*!< Bit mask of EVENTS_LOOPSDONE field. */ + +/* Register: PWM_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 4 : Shortcut between LOOPSDONE event and STOP task */ +#define PWM_SHORTS_LOOPSDONE_STOP_Pos (4UL) /*!< Position of LOOPSDONE_STOP field. */ +#define PWM_SHORTS_LOOPSDONE_STOP_Msk (0x1UL << PWM_SHORTS_LOOPSDONE_STOP_Pos) /*!< Bit mask of LOOPSDONE_STOP field. */ +#define PWM_SHORTS_LOOPSDONE_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define PWM_SHORTS_LOOPSDONE_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 3 : Shortcut between LOOPSDONE event and SEQSTART[1] task */ +#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Pos (3UL) /*!< Position of LOOPSDONE_SEQSTART1 field. */ +#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Msk (0x1UL << PWM_SHORTS_LOOPSDONE_SEQSTART1_Pos) /*!< Bit mask of LOOPSDONE_SEQSTART1 field. */ +#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Disabled (0UL) /*!< Disable shortcut */ +#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 2 : Shortcut between LOOPSDONE event and SEQSTART[0] task */ +#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Pos (2UL) /*!< Position of LOOPSDONE_SEQSTART0 field. */ +#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Msk (0x1UL << PWM_SHORTS_LOOPSDONE_SEQSTART0_Pos) /*!< Bit mask of LOOPSDONE_SEQSTART0 field. */ +#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Disabled (0UL) /*!< Disable shortcut */ +#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 1 : Shortcut between SEQEND[1] event and STOP task */ +#define PWM_SHORTS_SEQEND1_STOP_Pos (1UL) /*!< Position of SEQEND1_STOP field. */ +#define PWM_SHORTS_SEQEND1_STOP_Msk (0x1UL << PWM_SHORTS_SEQEND1_STOP_Pos) /*!< Bit mask of SEQEND1_STOP field. */ +#define PWM_SHORTS_SEQEND1_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define PWM_SHORTS_SEQEND1_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 0 : Shortcut between SEQEND[0] event and STOP task */ +#define PWM_SHORTS_SEQEND0_STOP_Pos (0UL) /*!< Position of SEQEND0_STOP field. */ +#define PWM_SHORTS_SEQEND0_STOP_Msk (0x1UL << PWM_SHORTS_SEQEND0_STOP_Pos) /*!< Bit mask of SEQEND0_STOP field. */ +#define PWM_SHORTS_SEQEND0_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define PWM_SHORTS_SEQEND0_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: PWM_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 7 : Enable or disable interrupt for LOOPSDONE event */ +#define PWM_INTEN_LOOPSDONE_Pos (7UL) /*!< Position of LOOPSDONE field. */ +#define PWM_INTEN_LOOPSDONE_Msk (0x1UL << PWM_INTEN_LOOPSDONE_Pos) /*!< Bit mask of LOOPSDONE field. */ +#define PWM_INTEN_LOOPSDONE_Disabled (0UL) /*!< Disable */ +#define PWM_INTEN_LOOPSDONE_Enabled (1UL) /*!< Enable */ + +/* Bit 6 : Enable or disable interrupt for PWMPERIODEND event */ +#define PWM_INTEN_PWMPERIODEND_Pos (6UL) /*!< Position of PWMPERIODEND field. */ +#define PWM_INTEN_PWMPERIODEND_Msk (0x1UL << PWM_INTEN_PWMPERIODEND_Pos) /*!< Bit mask of PWMPERIODEND field. */ +#define PWM_INTEN_PWMPERIODEND_Disabled (0UL) /*!< Disable */ +#define PWM_INTEN_PWMPERIODEND_Enabled (1UL) /*!< Enable */ + +/* Bit 5 : Enable or disable interrupt for SEQEND[1] event */ +#define PWM_INTEN_SEQEND1_Pos (5UL) /*!< Position of SEQEND1 field. */ +#define PWM_INTEN_SEQEND1_Msk (0x1UL << PWM_INTEN_SEQEND1_Pos) /*!< Bit mask of SEQEND1 field. */ +#define PWM_INTEN_SEQEND1_Disabled (0UL) /*!< Disable */ +#define PWM_INTEN_SEQEND1_Enabled (1UL) /*!< Enable */ + +/* Bit 4 : Enable or disable interrupt for SEQEND[0] event */ +#define PWM_INTEN_SEQEND0_Pos (4UL) /*!< Position of SEQEND0 field. */ +#define PWM_INTEN_SEQEND0_Msk (0x1UL << PWM_INTEN_SEQEND0_Pos) /*!< Bit mask of SEQEND0 field. */ +#define PWM_INTEN_SEQEND0_Disabled (0UL) /*!< Disable */ +#define PWM_INTEN_SEQEND0_Enabled (1UL) /*!< Enable */ + +/* Bit 3 : Enable or disable interrupt for SEQSTARTED[1] event */ +#define PWM_INTEN_SEQSTARTED1_Pos (3UL) /*!< Position of SEQSTARTED1 field. */ +#define PWM_INTEN_SEQSTARTED1_Msk (0x1UL << PWM_INTEN_SEQSTARTED1_Pos) /*!< Bit mask of SEQSTARTED1 field. */ +#define PWM_INTEN_SEQSTARTED1_Disabled (0UL) /*!< Disable */ +#define PWM_INTEN_SEQSTARTED1_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable interrupt for SEQSTARTED[0] event */ +#define PWM_INTEN_SEQSTARTED0_Pos (2UL) /*!< Position of SEQSTARTED0 field. */ +#define PWM_INTEN_SEQSTARTED0_Msk (0x1UL << PWM_INTEN_SEQSTARTED0_Pos) /*!< Bit mask of SEQSTARTED0 field. */ +#define PWM_INTEN_SEQSTARTED0_Disabled (0UL) /*!< Disable */ +#define PWM_INTEN_SEQSTARTED0_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for STOPPED event */ +#define PWM_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define PWM_INTEN_STOPPED_Msk (0x1UL << PWM_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define PWM_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ +#define PWM_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ + +/* Register: PWM_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 7 : Write '1' to Enable interrupt for LOOPSDONE event */ +#define PWM_INTENSET_LOOPSDONE_Pos (7UL) /*!< Position of LOOPSDONE field. */ +#define PWM_INTENSET_LOOPSDONE_Msk (0x1UL << PWM_INTENSET_LOOPSDONE_Pos) /*!< Bit mask of LOOPSDONE field. */ +#define PWM_INTENSET_LOOPSDONE_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENSET_LOOPSDONE_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENSET_LOOPSDONE_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to Enable interrupt for PWMPERIODEND event */ +#define PWM_INTENSET_PWMPERIODEND_Pos (6UL) /*!< Position of PWMPERIODEND field. */ +#define PWM_INTENSET_PWMPERIODEND_Msk (0x1UL << PWM_INTENSET_PWMPERIODEND_Pos) /*!< Bit mask of PWMPERIODEND field. */ +#define PWM_INTENSET_PWMPERIODEND_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENSET_PWMPERIODEND_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENSET_PWMPERIODEND_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to Enable interrupt for SEQEND[1] event */ +#define PWM_INTENSET_SEQEND1_Pos (5UL) /*!< Position of SEQEND1 field. */ +#define PWM_INTENSET_SEQEND1_Msk (0x1UL << PWM_INTENSET_SEQEND1_Pos) /*!< Bit mask of SEQEND1 field. */ +#define PWM_INTENSET_SEQEND1_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENSET_SEQEND1_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENSET_SEQEND1_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to Enable interrupt for SEQEND[0] event */ +#define PWM_INTENSET_SEQEND0_Pos (4UL) /*!< Position of SEQEND0 field. */ +#define PWM_INTENSET_SEQEND0_Msk (0x1UL << PWM_INTENSET_SEQEND0_Pos) /*!< Bit mask of SEQEND0 field. */ +#define PWM_INTENSET_SEQEND0_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENSET_SEQEND0_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENSET_SEQEND0_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to Enable interrupt for SEQSTARTED[1] event */ +#define PWM_INTENSET_SEQSTARTED1_Pos (3UL) /*!< Position of SEQSTARTED1 field. */ +#define PWM_INTENSET_SEQSTARTED1_Msk (0x1UL << PWM_INTENSET_SEQSTARTED1_Pos) /*!< Bit mask of SEQSTARTED1 field. */ +#define PWM_INTENSET_SEQSTARTED1_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENSET_SEQSTARTED1_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENSET_SEQSTARTED1_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable interrupt for SEQSTARTED[0] event */ +#define PWM_INTENSET_SEQSTARTED0_Pos (2UL) /*!< Position of SEQSTARTED0 field. */ +#define PWM_INTENSET_SEQSTARTED0_Msk (0x1UL << PWM_INTENSET_SEQSTARTED0_Pos) /*!< Bit mask of SEQSTARTED0 field. */ +#define PWM_INTENSET_SEQSTARTED0_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENSET_SEQSTARTED0_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENSET_SEQSTARTED0_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for STOPPED event */ +#define PWM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define PWM_INTENSET_STOPPED_Msk (0x1UL << PWM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define PWM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Register: PWM_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 7 : Write '1' to Disable interrupt for LOOPSDONE event */ +#define PWM_INTENCLR_LOOPSDONE_Pos (7UL) /*!< Position of LOOPSDONE field. */ +#define PWM_INTENCLR_LOOPSDONE_Msk (0x1UL << PWM_INTENCLR_LOOPSDONE_Pos) /*!< Bit mask of LOOPSDONE field. */ +#define PWM_INTENCLR_LOOPSDONE_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENCLR_LOOPSDONE_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENCLR_LOOPSDONE_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to Disable interrupt for PWMPERIODEND event */ +#define PWM_INTENCLR_PWMPERIODEND_Pos (6UL) /*!< Position of PWMPERIODEND field. */ +#define PWM_INTENCLR_PWMPERIODEND_Msk (0x1UL << PWM_INTENCLR_PWMPERIODEND_Pos) /*!< Bit mask of PWMPERIODEND field. */ +#define PWM_INTENCLR_PWMPERIODEND_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENCLR_PWMPERIODEND_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENCLR_PWMPERIODEND_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to Disable interrupt for SEQEND[1] event */ +#define PWM_INTENCLR_SEQEND1_Pos (5UL) /*!< Position of SEQEND1 field. */ +#define PWM_INTENCLR_SEQEND1_Msk (0x1UL << PWM_INTENCLR_SEQEND1_Pos) /*!< Bit mask of SEQEND1 field. */ +#define PWM_INTENCLR_SEQEND1_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENCLR_SEQEND1_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENCLR_SEQEND1_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to Disable interrupt for SEQEND[0] event */ +#define PWM_INTENCLR_SEQEND0_Pos (4UL) /*!< Position of SEQEND0 field. */ +#define PWM_INTENCLR_SEQEND0_Msk (0x1UL << PWM_INTENCLR_SEQEND0_Pos) /*!< Bit mask of SEQEND0 field. */ +#define PWM_INTENCLR_SEQEND0_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENCLR_SEQEND0_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENCLR_SEQEND0_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to Disable interrupt for SEQSTARTED[1] event */ +#define PWM_INTENCLR_SEQSTARTED1_Pos (3UL) /*!< Position of SEQSTARTED1 field. */ +#define PWM_INTENCLR_SEQSTARTED1_Msk (0x1UL << PWM_INTENCLR_SEQSTARTED1_Pos) /*!< Bit mask of SEQSTARTED1 field. */ +#define PWM_INTENCLR_SEQSTARTED1_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENCLR_SEQSTARTED1_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENCLR_SEQSTARTED1_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable interrupt for SEQSTARTED[0] event */ +#define PWM_INTENCLR_SEQSTARTED0_Pos (2UL) /*!< Position of SEQSTARTED0 field. */ +#define PWM_INTENCLR_SEQSTARTED0_Msk (0x1UL << PWM_INTENCLR_SEQSTARTED0_Pos) /*!< Bit mask of SEQSTARTED0 field. */ +#define PWM_INTENCLR_SEQSTARTED0_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENCLR_SEQSTARTED0_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENCLR_SEQSTARTED0_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for STOPPED event */ +#define PWM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define PWM_INTENCLR_STOPPED_Msk (0x1UL << PWM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define PWM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Register: PWM_ENABLE */ +/* Description: PWM module enable register */ + +/* Bit 0 : Enable or disable PWM module */ +#define PWM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define PWM_ENABLE_ENABLE_Msk (0x1UL << PWM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define PWM_ENABLE_ENABLE_Disabled (0UL) /*!< Disabled */ +#define PWM_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */ + +/* Register: PWM_MODE */ +/* Description: Selects operating mode of the wave counter */ + +/* Bit 0 : Selects up mode or up-and-down mode for the counter */ +#define PWM_MODE_UPDOWN_Pos (0UL) /*!< Position of UPDOWN field. */ +#define PWM_MODE_UPDOWN_Msk (0x1UL << PWM_MODE_UPDOWN_Pos) /*!< Bit mask of UPDOWN field. */ +#define PWM_MODE_UPDOWN_Up (0UL) /*!< Up counter, edge-aligned PWM duty cycle */ +#define PWM_MODE_UPDOWN_UpAndDown (1UL) /*!< Up and down counter, center-aligned PWM duty cycle */ + +/* Register: PWM_COUNTERTOP */ +/* Description: Value up to which the pulse generator counter counts */ + +/* Bits 14..0 : Value up to which the pulse generator counter counts. This register is ignored when DECODER.MODE=WaveForm and only values from RAM are used. */ +#define PWM_COUNTERTOP_COUNTERTOP_Pos (0UL) /*!< Position of COUNTERTOP field. */ +#define PWM_COUNTERTOP_COUNTERTOP_Msk (0x7FFFUL << PWM_COUNTERTOP_COUNTERTOP_Pos) /*!< Bit mask of COUNTERTOP field. */ + +/* Register: PWM_PRESCALER */ +/* Description: Configuration for PWM_CLK */ + +/* Bits 2..0 : Prescaler of PWM_CLK */ +#define PWM_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */ +#define PWM_PRESCALER_PRESCALER_Msk (0x7UL << PWM_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */ +#define PWM_PRESCALER_PRESCALER_DIV_1 (0UL) /*!< Divide by 1 (16MHz) */ +#define PWM_PRESCALER_PRESCALER_DIV_2 (1UL) /*!< Divide by 2 ( 8MHz) */ +#define PWM_PRESCALER_PRESCALER_DIV_4 (2UL) /*!< Divide by 4 ( 4MHz) */ +#define PWM_PRESCALER_PRESCALER_DIV_8 (3UL) /*!< Divide by 8 ( 2MHz) */ +#define PWM_PRESCALER_PRESCALER_DIV_16 (4UL) /*!< Divide by 16 ( 1MHz) */ +#define PWM_PRESCALER_PRESCALER_DIV_32 (5UL) /*!< Divide by 32 ( 500kHz) */ +#define PWM_PRESCALER_PRESCALER_DIV_64 (6UL) /*!< Divide by 64 ( 250kHz) */ +#define PWM_PRESCALER_PRESCALER_DIV_128 (7UL) /*!< Divide by 128 ( 125kHz) */ + +/* Register: PWM_DECODER */ +/* Description: Configuration of the decoder */ + +/* Bit 8 : Selects source for advancing the active sequence */ +#define PWM_DECODER_MODE_Pos (8UL) /*!< Position of MODE field. */ +#define PWM_DECODER_MODE_Msk (0x1UL << PWM_DECODER_MODE_Pos) /*!< Bit mask of MODE field. */ +#define PWM_DECODER_MODE_RefreshCount (0UL) /*!< SEQ[n].REFRESH is used to determine loading internal compare registers */ +#define PWM_DECODER_MODE_NextStep (1UL) /*!< NEXTSTEP task causes a new value to be loaded to internal compare registers */ + +/* Bits 1..0 : How a sequence is read from RAM and spread to the compare register */ +#define PWM_DECODER_LOAD_Pos (0UL) /*!< Position of LOAD field. */ +#define PWM_DECODER_LOAD_Msk (0x3UL << PWM_DECODER_LOAD_Pos) /*!< Bit mask of LOAD field. */ +#define PWM_DECODER_LOAD_Common (0UL) /*!< 1st half word (16-bit) used in all PWM channels 0..3 */ +#define PWM_DECODER_LOAD_Grouped (1UL) /*!< 1st half word (16-bit) used in channel 0..1; 2nd word in channel 2..3 */ +#define PWM_DECODER_LOAD_Individual (2UL) /*!< 1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in ch.3 */ +#define PWM_DECODER_LOAD_WaveForm (3UL) /*!< 1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in COUNTERTOP */ + +/* Register: PWM_LOOP */ +/* Description: Number of playbacks of a loop */ + +/* Bits 15..0 : Number of playbacks of pattern cycles */ +#define PWM_LOOP_CNT_Pos (0UL) /*!< Position of CNT field. */ +#define PWM_LOOP_CNT_Msk (0xFFFFUL << PWM_LOOP_CNT_Pos) /*!< Bit mask of CNT field. */ +#define PWM_LOOP_CNT_Disabled (0UL) /*!< Looping disabled (stop at the end of the sequence) */ + +/* Register: PWM_SEQ_PTR */ +/* Description: Description cluster[0]: Beginning address in RAM of this sequence */ + +/* Bits 31..0 : Beginning address in RAM of this sequence */ +#define PWM_SEQ_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define PWM_SEQ_PTR_PTR_Msk (0xFFFFFFFFUL << PWM_SEQ_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: PWM_SEQ_CNT */ +/* Description: Description cluster[0]: Number of values (duty cycles) in this sequence */ + +/* Bits 14..0 : Number of values (duty cycles) in this sequence */ +#define PWM_SEQ_CNT_CNT_Pos (0UL) /*!< Position of CNT field. */ +#define PWM_SEQ_CNT_CNT_Msk (0x7FFFUL << PWM_SEQ_CNT_CNT_Pos) /*!< Bit mask of CNT field. */ +#define PWM_SEQ_CNT_CNT_Disabled (0UL) /*!< Sequence is disabled, and shall not be started as it is empty */ + +/* Register: PWM_SEQ_REFRESH */ +/* Description: Description cluster[0]: Number of additional PWM periods between samples loaded into compare register */ + +/* Bits 23..0 : Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods) */ +#define PWM_SEQ_REFRESH_CNT_Pos (0UL) /*!< Position of CNT field. */ +#define PWM_SEQ_REFRESH_CNT_Msk (0xFFFFFFUL << PWM_SEQ_REFRESH_CNT_Pos) /*!< Bit mask of CNT field. */ +#define PWM_SEQ_REFRESH_CNT_Continuous (0UL) /*!< Update every PWM period */ + +/* Register: PWM_SEQ_ENDDELAY */ +/* Description: Description cluster[0]: Time added after the sequence */ + +/* Bits 23..0 : Time added after the sequence in PWM periods */ +#define PWM_SEQ_ENDDELAY_CNT_Pos (0UL) /*!< Position of CNT field. */ +#define PWM_SEQ_ENDDELAY_CNT_Msk (0xFFFFFFUL << PWM_SEQ_ENDDELAY_CNT_Pos) /*!< Bit mask of CNT field. */ + +/* Register: PWM_PSEL_OUT */ +/* Description: Description collection[0]: Output pin select for PWM channel 0 */ + +/* Bit 31 : Connection */ +#define PWM_PSEL_OUT_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define PWM_PSEL_OUT_CONNECT_Msk (0x1UL << PWM_PSEL_OUT_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define PWM_PSEL_OUT_CONNECT_Connected (0UL) /*!< Connect */ +#define PWM_PSEL_OUT_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define PWM_PSEL_OUT_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define PWM_PSEL_OUT_PIN_Msk (0x1FUL << PWM_PSEL_OUT_PIN_Pos) /*!< Bit mask of PIN field. */ + + +/* Peripheral: QDEC */ +/* Description: Quadrature Decoder */ + +/* Register: QDEC_TASKS_START */ +/* Description: Task starting the quadrature decoder */ + +/* Bit 0 : */ +#define QDEC_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define QDEC_TASKS_START_TASKS_START_Msk (0x1UL << QDEC_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: QDEC_TASKS_STOP */ +/* Description: Task stopping the quadrature decoder */ + +/* Bit 0 : */ +#define QDEC_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define QDEC_TASKS_STOP_TASKS_STOP_Msk (0x1UL << QDEC_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: QDEC_TASKS_READCLRACC */ +/* Description: Read and clear ACC and ACCDBL */ + +/* Bit 0 : */ +#define QDEC_TASKS_READCLRACC_TASKS_READCLRACC_Pos (0UL) /*!< Position of TASKS_READCLRACC field. */ +#define QDEC_TASKS_READCLRACC_TASKS_READCLRACC_Msk (0x1UL << QDEC_TASKS_READCLRACC_TASKS_READCLRACC_Pos) /*!< Bit mask of TASKS_READCLRACC field. */ + +/* Register: QDEC_TASKS_RDCLRACC */ +/* Description: Read and clear ACC */ + +/* Bit 0 : */ +#define QDEC_TASKS_RDCLRACC_TASKS_RDCLRACC_Pos (0UL) /*!< Position of TASKS_RDCLRACC field. */ +#define QDEC_TASKS_RDCLRACC_TASKS_RDCLRACC_Msk (0x1UL << QDEC_TASKS_RDCLRACC_TASKS_RDCLRACC_Pos) /*!< Bit mask of TASKS_RDCLRACC field. */ + +/* Register: QDEC_TASKS_RDCLRDBL */ +/* Description: Read and clear ACCDBL */ + +/* Bit 0 : */ +#define QDEC_TASKS_RDCLRDBL_TASKS_RDCLRDBL_Pos (0UL) /*!< Position of TASKS_RDCLRDBL field. */ +#define QDEC_TASKS_RDCLRDBL_TASKS_RDCLRDBL_Msk (0x1UL << QDEC_TASKS_RDCLRDBL_TASKS_RDCLRDBL_Pos) /*!< Bit mask of TASKS_RDCLRDBL field. */ + +/* Register: QDEC_EVENTS_SAMPLERDY */ +/* Description: Event being generated for every new sample value written to the SAMPLE register */ + +/* Bit 0 : */ +#define QDEC_EVENTS_SAMPLERDY_EVENTS_SAMPLERDY_Pos (0UL) /*!< Position of EVENTS_SAMPLERDY field. */ +#define QDEC_EVENTS_SAMPLERDY_EVENTS_SAMPLERDY_Msk (0x1UL << QDEC_EVENTS_SAMPLERDY_EVENTS_SAMPLERDY_Pos) /*!< Bit mask of EVENTS_SAMPLERDY field. */ + +/* Register: QDEC_EVENTS_REPORTRDY */ +/* Description: Non-null report ready */ + +/* Bit 0 : */ +#define QDEC_EVENTS_REPORTRDY_EVENTS_REPORTRDY_Pos (0UL) /*!< Position of EVENTS_REPORTRDY field. */ +#define QDEC_EVENTS_REPORTRDY_EVENTS_REPORTRDY_Msk (0x1UL << QDEC_EVENTS_REPORTRDY_EVENTS_REPORTRDY_Pos) /*!< Bit mask of EVENTS_REPORTRDY field. */ + +/* Register: QDEC_EVENTS_ACCOF */ +/* Description: ACC or ACCDBL register overflow */ + +/* Bit 0 : */ +#define QDEC_EVENTS_ACCOF_EVENTS_ACCOF_Pos (0UL) /*!< Position of EVENTS_ACCOF field. */ +#define QDEC_EVENTS_ACCOF_EVENTS_ACCOF_Msk (0x1UL << QDEC_EVENTS_ACCOF_EVENTS_ACCOF_Pos) /*!< Bit mask of EVENTS_ACCOF field. */ + +/* Register: QDEC_EVENTS_DBLRDY */ +/* Description: Double displacement(s) detected */ + +/* Bit 0 : */ +#define QDEC_EVENTS_DBLRDY_EVENTS_DBLRDY_Pos (0UL) /*!< Position of EVENTS_DBLRDY field. */ +#define QDEC_EVENTS_DBLRDY_EVENTS_DBLRDY_Msk (0x1UL << QDEC_EVENTS_DBLRDY_EVENTS_DBLRDY_Pos) /*!< Bit mask of EVENTS_DBLRDY field. */ + +/* Register: QDEC_EVENTS_STOPPED */ +/* Description: QDEC has been stopped */ + +/* Bit 0 : */ +#define QDEC_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */ +#define QDEC_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << QDEC_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */ + +/* Register: QDEC_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 6 : Shortcut between SAMPLERDY event and READCLRACC task */ +#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Pos (6UL) /*!< Position of SAMPLERDY_READCLRACC field. */ +#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Msk (0x1UL << QDEC_SHORTS_SAMPLERDY_READCLRACC_Pos) /*!< Bit mask of SAMPLERDY_READCLRACC field. */ +#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Disabled (0UL) /*!< Disable shortcut */ +#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 5 : Shortcut between DBLRDY event and STOP task */ +#define QDEC_SHORTS_DBLRDY_STOP_Pos (5UL) /*!< Position of DBLRDY_STOP field. */ +#define QDEC_SHORTS_DBLRDY_STOP_Msk (0x1UL << QDEC_SHORTS_DBLRDY_STOP_Pos) /*!< Bit mask of DBLRDY_STOP field. */ +#define QDEC_SHORTS_DBLRDY_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define QDEC_SHORTS_DBLRDY_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 4 : Shortcut between DBLRDY event and RDCLRDBL task */ +#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Pos (4UL) /*!< Position of DBLRDY_RDCLRDBL field. */ +#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Msk (0x1UL << QDEC_SHORTS_DBLRDY_RDCLRDBL_Pos) /*!< Bit mask of DBLRDY_RDCLRDBL field. */ +#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Disabled (0UL) /*!< Disable shortcut */ +#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 3 : Shortcut between REPORTRDY event and STOP task */ +#define QDEC_SHORTS_REPORTRDY_STOP_Pos (3UL) /*!< Position of REPORTRDY_STOP field. */ +#define QDEC_SHORTS_REPORTRDY_STOP_Msk (0x1UL << QDEC_SHORTS_REPORTRDY_STOP_Pos) /*!< Bit mask of REPORTRDY_STOP field. */ +#define QDEC_SHORTS_REPORTRDY_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define QDEC_SHORTS_REPORTRDY_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 2 : Shortcut between REPORTRDY event and RDCLRACC task */ +#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Pos (2UL) /*!< Position of REPORTRDY_RDCLRACC field. */ +#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Msk (0x1UL << QDEC_SHORTS_REPORTRDY_RDCLRACC_Pos) /*!< Bit mask of REPORTRDY_RDCLRACC field. */ +#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Disabled (0UL) /*!< Disable shortcut */ +#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 1 : Shortcut between SAMPLERDY event and STOP task */ +#define QDEC_SHORTS_SAMPLERDY_STOP_Pos (1UL) /*!< Position of SAMPLERDY_STOP field. */ +#define QDEC_SHORTS_SAMPLERDY_STOP_Msk (0x1UL << QDEC_SHORTS_SAMPLERDY_STOP_Pos) /*!< Bit mask of SAMPLERDY_STOP field. */ +#define QDEC_SHORTS_SAMPLERDY_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define QDEC_SHORTS_SAMPLERDY_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 0 : Shortcut between REPORTRDY event and READCLRACC task */ +#define QDEC_SHORTS_REPORTRDY_READCLRACC_Pos (0UL) /*!< Position of REPORTRDY_READCLRACC field. */ +#define QDEC_SHORTS_REPORTRDY_READCLRACC_Msk (0x1UL << QDEC_SHORTS_REPORTRDY_READCLRACC_Pos) /*!< Bit mask of REPORTRDY_READCLRACC field. */ +#define QDEC_SHORTS_REPORTRDY_READCLRACC_Disabled (0UL) /*!< Disable shortcut */ +#define QDEC_SHORTS_REPORTRDY_READCLRACC_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: QDEC_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 4 : Write '1' to Enable interrupt for STOPPED event */ +#define QDEC_INTENSET_STOPPED_Pos (4UL) /*!< Position of STOPPED field. */ +#define QDEC_INTENSET_STOPPED_Msk (0x1UL << QDEC_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define QDEC_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to Enable interrupt for DBLRDY event */ +#define QDEC_INTENSET_DBLRDY_Pos (3UL) /*!< Position of DBLRDY field. */ +#define QDEC_INTENSET_DBLRDY_Msk (0x1UL << QDEC_INTENSET_DBLRDY_Pos) /*!< Bit mask of DBLRDY field. */ +#define QDEC_INTENSET_DBLRDY_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENSET_DBLRDY_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENSET_DBLRDY_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable interrupt for ACCOF event */ +#define QDEC_INTENSET_ACCOF_Pos (2UL) /*!< Position of ACCOF field. */ +#define QDEC_INTENSET_ACCOF_Msk (0x1UL << QDEC_INTENSET_ACCOF_Pos) /*!< Bit mask of ACCOF field. */ +#define QDEC_INTENSET_ACCOF_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENSET_ACCOF_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENSET_ACCOF_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for REPORTRDY event */ +#define QDEC_INTENSET_REPORTRDY_Pos (1UL) /*!< Position of REPORTRDY field. */ +#define QDEC_INTENSET_REPORTRDY_Msk (0x1UL << QDEC_INTENSET_REPORTRDY_Pos) /*!< Bit mask of REPORTRDY field. */ +#define QDEC_INTENSET_REPORTRDY_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENSET_REPORTRDY_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENSET_REPORTRDY_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for SAMPLERDY event */ +#define QDEC_INTENSET_SAMPLERDY_Pos (0UL) /*!< Position of SAMPLERDY field. */ +#define QDEC_INTENSET_SAMPLERDY_Msk (0x1UL << QDEC_INTENSET_SAMPLERDY_Pos) /*!< Bit mask of SAMPLERDY field. */ +#define QDEC_INTENSET_SAMPLERDY_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENSET_SAMPLERDY_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENSET_SAMPLERDY_Set (1UL) /*!< Enable */ + +/* Register: QDEC_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 4 : Write '1' to Disable interrupt for STOPPED event */ +#define QDEC_INTENCLR_STOPPED_Pos (4UL) /*!< Position of STOPPED field. */ +#define QDEC_INTENCLR_STOPPED_Msk (0x1UL << QDEC_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define QDEC_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to Disable interrupt for DBLRDY event */ +#define QDEC_INTENCLR_DBLRDY_Pos (3UL) /*!< Position of DBLRDY field. */ +#define QDEC_INTENCLR_DBLRDY_Msk (0x1UL << QDEC_INTENCLR_DBLRDY_Pos) /*!< Bit mask of DBLRDY field. */ +#define QDEC_INTENCLR_DBLRDY_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENCLR_DBLRDY_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENCLR_DBLRDY_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable interrupt for ACCOF event */ +#define QDEC_INTENCLR_ACCOF_Pos (2UL) /*!< Position of ACCOF field. */ +#define QDEC_INTENCLR_ACCOF_Msk (0x1UL << QDEC_INTENCLR_ACCOF_Pos) /*!< Bit mask of ACCOF field. */ +#define QDEC_INTENCLR_ACCOF_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENCLR_ACCOF_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENCLR_ACCOF_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for REPORTRDY event */ +#define QDEC_INTENCLR_REPORTRDY_Pos (1UL) /*!< Position of REPORTRDY field. */ +#define QDEC_INTENCLR_REPORTRDY_Msk (0x1UL << QDEC_INTENCLR_REPORTRDY_Pos) /*!< Bit mask of REPORTRDY field. */ +#define QDEC_INTENCLR_REPORTRDY_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENCLR_REPORTRDY_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENCLR_REPORTRDY_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for SAMPLERDY event */ +#define QDEC_INTENCLR_SAMPLERDY_Pos (0UL) /*!< Position of SAMPLERDY field. */ +#define QDEC_INTENCLR_SAMPLERDY_Msk (0x1UL << QDEC_INTENCLR_SAMPLERDY_Pos) /*!< Bit mask of SAMPLERDY field. */ +#define QDEC_INTENCLR_SAMPLERDY_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENCLR_SAMPLERDY_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENCLR_SAMPLERDY_Clear (1UL) /*!< Disable */ + +/* Register: QDEC_ENABLE */ +/* Description: Enable the quadrature decoder */ + +/* Bit 0 : Enable or disable the quadrature decoder */ +#define QDEC_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define QDEC_ENABLE_ENABLE_Msk (0x1UL << QDEC_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define QDEC_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ +#define QDEC_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */ + +/* Register: QDEC_LEDPOL */ +/* Description: LED output pin polarity */ + +/* Bit 0 : LED output pin polarity */ +#define QDEC_LEDPOL_LEDPOL_Pos (0UL) /*!< Position of LEDPOL field. */ +#define QDEC_LEDPOL_LEDPOL_Msk (0x1UL << QDEC_LEDPOL_LEDPOL_Pos) /*!< Bit mask of LEDPOL field. */ +#define QDEC_LEDPOL_LEDPOL_ActiveLow (0UL) /*!< Led active on output pin low */ +#define QDEC_LEDPOL_LEDPOL_ActiveHigh (1UL) /*!< Led active on output pin high */ + +/* Register: QDEC_SAMPLEPER */ +/* Description: Sample period */ + +/* Bits 3..0 : Sample period. The SAMPLE register will be updated for every new sample */ +#define QDEC_SAMPLEPER_SAMPLEPER_Pos (0UL) /*!< Position of SAMPLEPER field. */ +#define QDEC_SAMPLEPER_SAMPLEPER_Msk (0xFUL << QDEC_SAMPLEPER_SAMPLEPER_Pos) /*!< Bit mask of SAMPLEPER field. */ +#define QDEC_SAMPLEPER_SAMPLEPER_128us (0UL) /*!< 128 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_256us (1UL) /*!< 256 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_512us (2UL) /*!< 512 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_1024us (3UL) /*!< 1024 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_2048us (4UL) /*!< 2048 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_4096us (5UL) /*!< 4096 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_8192us (6UL) /*!< 8192 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_16384us (7UL) /*!< 16384 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_32ms (8UL) /*!< 32768 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_65ms (9UL) /*!< 65536 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_131ms (10UL) /*!< 131072 us */ + +/* Register: QDEC_SAMPLE */ +/* Description: Motion sample value */ + +/* Bits 31..0 : Last motion sample */ +#define QDEC_SAMPLE_SAMPLE_Pos (0UL) /*!< Position of SAMPLE field. */ +#define QDEC_SAMPLE_SAMPLE_Msk (0xFFFFFFFFUL << QDEC_SAMPLE_SAMPLE_Pos) /*!< Bit mask of SAMPLE field. */ + +/* Register: QDEC_REPORTPER */ +/* Description: Number of samples to be taken before REPORTRDY and DBLRDY events can be generated */ + +/* Bits 3..0 : Specifies the number of samples to be accumulated in the ACC register before the REPORTRDY and DBLRDY events can be generated */ +#define QDEC_REPORTPER_REPORTPER_Pos (0UL) /*!< Position of REPORTPER field. */ +#define QDEC_REPORTPER_REPORTPER_Msk (0xFUL << QDEC_REPORTPER_REPORTPER_Pos) /*!< Bit mask of REPORTPER field. */ +#define QDEC_REPORTPER_REPORTPER_10Smpl (0UL) /*!< 10 samples / report */ +#define QDEC_REPORTPER_REPORTPER_40Smpl (1UL) /*!< 40 samples / report */ +#define QDEC_REPORTPER_REPORTPER_80Smpl (2UL) /*!< 80 samples / report */ +#define QDEC_REPORTPER_REPORTPER_120Smpl (3UL) /*!< 120 samples / report */ +#define QDEC_REPORTPER_REPORTPER_160Smpl (4UL) /*!< 160 samples / report */ +#define QDEC_REPORTPER_REPORTPER_200Smpl (5UL) /*!< 200 samples / report */ +#define QDEC_REPORTPER_REPORTPER_240Smpl (6UL) /*!< 240 samples / report */ +#define QDEC_REPORTPER_REPORTPER_280Smpl (7UL) /*!< 280 samples / report */ +#define QDEC_REPORTPER_REPORTPER_1Smpl (8UL) /*!< 1 sample / report */ + +/* Register: QDEC_ACC */ +/* Description: Register accumulating the valid transitions */ + +/* Bits 31..0 : Register accumulating all valid samples (not double transition) read from the SAMPLE register */ +#define QDEC_ACC_ACC_Pos (0UL) /*!< Position of ACC field. */ +#define QDEC_ACC_ACC_Msk (0xFFFFFFFFUL << QDEC_ACC_ACC_Pos) /*!< Bit mask of ACC field. */ + +/* Register: QDEC_ACCREAD */ +/* Description: Snapshot of the ACC register, updated by the READCLRACC or RDCLRACC task */ + +/* Bits 31..0 : Snapshot of the ACC register. */ +#define QDEC_ACCREAD_ACCREAD_Pos (0UL) /*!< Position of ACCREAD field. */ +#define QDEC_ACCREAD_ACCREAD_Msk (0xFFFFFFFFUL << QDEC_ACCREAD_ACCREAD_Pos) /*!< Bit mask of ACCREAD field. */ + +/* Register: QDEC_PSEL_LED */ +/* Description: Pin select for LED signal */ + +/* Bit 31 : Connection */ +#define QDEC_PSEL_LED_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define QDEC_PSEL_LED_CONNECT_Msk (0x1UL << QDEC_PSEL_LED_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define QDEC_PSEL_LED_CONNECT_Connected (0UL) /*!< Connect */ +#define QDEC_PSEL_LED_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define QDEC_PSEL_LED_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define QDEC_PSEL_LED_PIN_Msk (0x1FUL << QDEC_PSEL_LED_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: QDEC_PSEL_A */ +/* Description: Pin select for A signal */ + +/* Bit 31 : Connection */ +#define QDEC_PSEL_A_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define QDEC_PSEL_A_CONNECT_Msk (0x1UL << QDEC_PSEL_A_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define QDEC_PSEL_A_CONNECT_Connected (0UL) /*!< Connect */ +#define QDEC_PSEL_A_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define QDEC_PSEL_A_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define QDEC_PSEL_A_PIN_Msk (0x1FUL << QDEC_PSEL_A_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: QDEC_PSEL_B */ +/* Description: Pin select for B signal */ + +/* Bit 31 : Connection */ +#define QDEC_PSEL_B_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define QDEC_PSEL_B_CONNECT_Msk (0x1UL << QDEC_PSEL_B_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define QDEC_PSEL_B_CONNECT_Connected (0UL) /*!< Connect */ +#define QDEC_PSEL_B_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define QDEC_PSEL_B_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define QDEC_PSEL_B_PIN_Msk (0x1FUL << QDEC_PSEL_B_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: QDEC_DBFEN */ +/* Description: Enable input debounce filters */ + +/* Bit 0 : Enable input debounce filters */ +#define QDEC_DBFEN_DBFEN_Pos (0UL) /*!< Position of DBFEN field. */ +#define QDEC_DBFEN_DBFEN_Msk (0x1UL << QDEC_DBFEN_DBFEN_Pos) /*!< Bit mask of DBFEN field. */ +#define QDEC_DBFEN_DBFEN_Disabled (0UL) /*!< Debounce input filters disabled */ +#define QDEC_DBFEN_DBFEN_Enabled (1UL) /*!< Debounce input filters enabled */ + +/* Register: QDEC_LEDPRE */ +/* Description: Time period the LED is switched ON prior to sampling */ + +/* Bits 8..0 : Period in us the LED is switched on prior to sampling */ +#define QDEC_LEDPRE_LEDPRE_Pos (0UL) /*!< Position of LEDPRE field. */ +#define QDEC_LEDPRE_LEDPRE_Msk (0x1FFUL << QDEC_LEDPRE_LEDPRE_Pos) /*!< Bit mask of LEDPRE field. */ + +/* Register: QDEC_ACCDBL */ +/* Description: Register accumulating the number of detected double transitions */ + +/* Bits 3..0 : Register accumulating the number of detected double or illegal transitions. ( SAMPLE = 2 ). */ +#define QDEC_ACCDBL_ACCDBL_Pos (0UL) /*!< Position of ACCDBL field. */ +#define QDEC_ACCDBL_ACCDBL_Msk (0xFUL << QDEC_ACCDBL_ACCDBL_Pos) /*!< Bit mask of ACCDBL field. */ + +/* Register: QDEC_ACCDBLREAD */ +/* Description: Snapshot of the ACCDBL, updated by the READCLRACC or RDCLRDBL task */ + +/* Bits 3..0 : Snapshot of the ACCDBL register. This field is updated when the READCLRACC or RDCLRDBL task is triggered. */ +#define QDEC_ACCDBLREAD_ACCDBLREAD_Pos (0UL) /*!< Position of ACCDBLREAD field. */ +#define QDEC_ACCDBLREAD_ACCDBLREAD_Msk (0xFUL << QDEC_ACCDBLREAD_ACCDBLREAD_Pos) /*!< Bit mask of ACCDBLREAD field. */ + + +/* Peripheral: RADIO */ +/* Description: 2.4 GHz Radio */ + +/* Register: RADIO_TASKS_TXEN */ +/* Description: Enable RADIO in TX mode */ + +/* Bit 0 : */ +#define RADIO_TASKS_TXEN_TASKS_TXEN_Pos (0UL) /*!< Position of TASKS_TXEN field. */ +#define RADIO_TASKS_TXEN_TASKS_TXEN_Msk (0x1UL << RADIO_TASKS_TXEN_TASKS_TXEN_Pos) /*!< Bit mask of TASKS_TXEN field. */ + +/* Register: RADIO_TASKS_RXEN */ +/* Description: Enable RADIO in RX mode */ + +/* Bit 0 : */ +#define RADIO_TASKS_RXEN_TASKS_RXEN_Pos (0UL) /*!< Position of TASKS_RXEN field. */ +#define RADIO_TASKS_RXEN_TASKS_RXEN_Msk (0x1UL << RADIO_TASKS_RXEN_TASKS_RXEN_Pos) /*!< Bit mask of TASKS_RXEN field. */ + +/* Register: RADIO_TASKS_START */ +/* Description: Start RADIO */ + +/* Bit 0 : */ +#define RADIO_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define RADIO_TASKS_START_TASKS_START_Msk (0x1UL << RADIO_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: RADIO_TASKS_STOP */ +/* Description: Stop RADIO */ + +/* Bit 0 : */ +#define RADIO_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define RADIO_TASKS_STOP_TASKS_STOP_Msk (0x1UL << RADIO_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: RADIO_TASKS_DISABLE */ +/* Description: Disable RADIO */ + +/* Bit 0 : */ +#define RADIO_TASKS_DISABLE_TASKS_DISABLE_Pos (0UL) /*!< Position of TASKS_DISABLE field. */ +#define RADIO_TASKS_DISABLE_TASKS_DISABLE_Msk (0x1UL << RADIO_TASKS_DISABLE_TASKS_DISABLE_Pos) /*!< Bit mask of TASKS_DISABLE field. */ + +/* Register: RADIO_TASKS_RSSISTART */ +/* Description: Start the RSSI and take one single sample of the receive signal strength. */ + +/* Bit 0 : */ +#define RADIO_TASKS_RSSISTART_TASKS_RSSISTART_Pos (0UL) /*!< Position of TASKS_RSSISTART field. */ +#define RADIO_TASKS_RSSISTART_TASKS_RSSISTART_Msk (0x1UL << RADIO_TASKS_RSSISTART_TASKS_RSSISTART_Pos) /*!< Bit mask of TASKS_RSSISTART field. */ + +/* Register: RADIO_TASKS_RSSISTOP */ +/* Description: Stop the RSSI measurement */ + +/* Bit 0 : */ +#define RADIO_TASKS_RSSISTOP_TASKS_RSSISTOP_Pos (0UL) /*!< Position of TASKS_RSSISTOP field. */ +#define RADIO_TASKS_RSSISTOP_TASKS_RSSISTOP_Msk (0x1UL << RADIO_TASKS_RSSISTOP_TASKS_RSSISTOP_Pos) /*!< Bit mask of TASKS_RSSISTOP field. */ + +/* Register: RADIO_TASKS_BCSTART */ +/* Description: Start the bit counter */ + +/* Bit 0 : */ +#define RADIO_TASKS_BCSTART_TASKS_BCSTART_Pos (0UL) /*!< Position of TASKS_BCSTART field. */ +#define RADIO_TASKS_BCSTART_TASKS_BCSTART_Msk (0x1UL << RADIO_TASKS_BCSTART_TASKS_BCSTART_Pos) /*!< Bit mask of TASKS_BCSTART field. */ + +/* Register: RADIO_TASKS_BCSTOP */ +/* Description: Stop the bit counter */ + +/* Bit 0 : */ +#define RADIO_TASKS_BCSTOP_TASKS_BCSTOP_Pos (0UL) /*!< Position of TASKS_BCSTOP field. */ +#define RADIO_TASKS_BCSTOP_TASKS_BCSTOP_Msk (0x1UL << RADIO_TASKS_BCSTOP_TASKS_BCSTOP_Pos) /*!< Bit mask of TASKS_BCSTOP field. */ + +/* Register: RADIO_EVENTS_READY */ +/* Description: RADIO has ramped up and is ready to be started */ + +/* Bit 0 : */ +#define RADIO_EVENTS_READY_EVENTS_READY_Pos (0UL) /*!< Position of EVENTS_READY field. */ +#define RADIO_EVENTS_READY_EVENTS_READY_Msk (0x1UL << RADIO_EVENTS_READY_EVENTS_READY_Pos) /*!< Bit mask of EVENTS_READY field. */ + +/* Register: RADIO_EVENTS_ADDRESS */ +/* Description: Address sent or received */ + +/* Bit 0 : */ +#define RADIO_EVENTS_ADDRESS_EVENTS_ADDRESS_Pos (0UL) /*!< Position of EVENTS_ADDRESS field. */ +#define RADIO_EVENTS_ADDRESS_EVENTS_ADDRESS_Msk (0x1UL << RADIO_EVENTS_ADDRESS_EVENTS_ADDRESS_Pos) /*!< Bit mask of EVENTS_ADDRESS field. */ + +/* Register: RADIO_EVENTS_PAYLOAD */ +/* Description: Packet payload sent or received */ + +/* Bit 0 : */ +#define RADIO_EVENTS_PAYLOAD_EVENTS_PAYLOAD_Pos (0UL) /*!< Position of EVENTS_PAYLOAD field. */ +#define RADIO_EVENTS_PAYLOAD_EVENTS_PAYLOAD_Msk (0x1UL << RADIO_EVENTS_PAYLOAD_EVENTS_PAYLOAD_Pos) /*!< Bit mask of EVENTS_PAYLOAD field. */ + +/* Register: RADIO_EVENTS_END */ +/* Description: Packet sent or received */ + +/* Bit 0 : */ +#define RADIO_EVENTS_END_EVENTS_END_Pos (0UL) /*!< Position of EVENTS_END field. */ +#define RADIO_EVENTS_END_EVENTS_END_Msk (0x1UL << RADIO_EVENTS_END_EVENTS_END_Pos) /*!< Bit mask of EVENTS_END field. */ + +/* Register: RADIO_EVENTS_DISABLED */ +/* Description: RADIO has been disabled */ + +/* Bit 0 : */ +#define RADIO_EVENTS_DISABLED_EVENTS_DISABLED_Pos (0UL) /*!< Position of EVENTS_DISABLED field. */ +#define RADIO_EVENTS_DISABLED_EVENTS_DISABLED_Msk (0x1UL << RADIO_EVENTS_DISABLED_EVENTS_DISABLED_Pos) /*!< Bit mask of EVENTS_DISABLED field. */ + +/* Register: RADIO_EVENTS_DEVMATCH */ +/* Description: A device address match occurred on the last received packet */ + +/* Bit 0 : */ +#define RADIO_EVENTS_DEVMATCH_EVENTS_DEVMATCH_Pos (0UL) /*!< Position of EVENTS_DEVMATCH field. */ +#define RADIO_EVENTS_DEVMATCH_EVENTS_DEVMATCH_Msk (0x1UL << RADIO_EVENTS_DEVMATCH_EVENTS_DEVMATCH_Pos) /*!< Bit mask of EVENTS_DEVMATCH field. */ + +/* Register: RADIO_EVENTS_DEVMISS */ +/* Description: No device address match occurred on the last received packet */ + +/* Bit 0 : */ +#define RADIO_EVENTS_DEVMISS_EVENTS_DEVMISS_Pos (0UL) /*!< Position of EVENTS_DEVMISS field. */ +#define RADIO_EVENTS_DEVMISS_EVENTS_DEVMISS_Msk (0x1UL << RADIO_EVENTS_DEVMISS_EVENTS_DEVMISS_Pos) /*!< Bit mask of EVENTS_DEVMISS field. */ + +/* Register: RADIO_EVENTS_RSSIEND */ +/* Description: Sampling of receive signal strength complete. */ + +/* Bit 0 : */ +#define RADIO_EVENTS_RSSIEND_EVENTS_RSSIEND_Pos (0UL) /*!< Position of EVENTS_RSSIEND field. */ +#define RADIO_EVENTS_RSSIEND_EVENTS_RSSIEND_Msk (0x1UL << RADIO_EVENTS_RSSIEND_EVENTS_RSSIEND_Pos) /*!< Bit mask of EVENTS_RSSIEND field. */ + +/* Register: RADIO_EVENTS_BCMATCH */ +/* Description: Bit counter reached bit count value. */ + +/* Bit 0 : */ +#define RADIO_EVENTS_BCMATCH_EVENTS_BCMATCH_Pos (0UL) /*!< Position of EVENTS_BCMATCH field. */ +#define RADIO_EVENTS_BCMATCH_EVENTS_BCMATCH_Msk (0x1UL << RADIO_EVENTS_BCMATCH_EVENTS_BCMATCH_Pos) /*!< Bit mask of EVENTS_BCMATCH field. */ + +/* Register: RADIO_EVENTS_CRCOK */ +/* Description: Packet received with CRC ok */ + +/* Bit 0 : */ +#define RADIO_EVENTS_CRCOK_EVENTS_CRCOK_Pos (0UL) /*!< Position of EVENTS_CRCOK field. */ +#define RADIO_EVENTS_CRCOK_EVENTS_CRCOK_Msk (0x1UL << RADIO_EVENTS_CRCOK_EVENTS_CRCOK_Pos) /*!< Bit mask of EVENTS_CRCOK field. */ + +/* Register: RADIO_EVENTS_CRCERROR */ +/* Description: Packet received with CRC error */ + +/* Bit 0 : */ +#define RADIO_EVENTS_CRCERROR_EVENTS_CRCERROR_Pos (0UL) /*!< Position of EVENTS_CRCERROR field. */ +#define RADIO_EVENTS_CRCERROR_EVENTS_CRCERROR_Msk (0x1UL << RADIO_EVENTS_CRCERROR_EVENTS_CRCERROR_Pos) /*!< Bit mask of EVENTS_CRCERROR field. */ + +/* Register: RADIO_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 8 : Shortcut between DISABLED event and RSSISTOP task */ +#define RADIO_SHORTS_DISABLED_RSSISTOP_Pos (8UL) /*!< Position of DISABLED_RSSISTOP field. */ +#define RADIO_SHORTS_DISABLED_RSSISTOP_Msk (0x1UL << RADIO_SHORTS_DISABLED_RSSISTOP_Pos) /*!< Bit mask of DISABLED_RSSISTOP field. */ +#define RADIO_SHORTS_DISABLED_RSSISTOP_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_DISABLED_RSSISTOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 6 : Shortcut between ADDRESS event and BCSTART task */ +#define RADIO_SHORTS_ADDRESS_BCSTART_Pos (6UL) /*!< Position of ADDRESS_BCSTART field. */ +#define RADIO_SHORTS_ADDRESS_BCSTART_Msk (0x1UL << RADIO_SHORTS_ADDRESS_BCSTART_Pos) /*!< Bit mask of ADDRESS_BCSTART field. */ +#define RADIO_SHORTS_ADDRESS_BCSTART_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_ADDRESS_BCSTART_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 5 : Shortcut between END event and START task */ +#define RADIO_SHORTS_END_START_Pos (5UL) /*!< Position of END_START field. */ +#define RADIO_SHORTS_END_START_Msk (0x1UL << RADIO_SHORTS_END_START_Pos) /*!< Bit mask of END_START field. */ +#define RADIO_SHORTS_END_START_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_END_START_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 4 : Shortcut between ADDRESS event and RSSISTART task */ +#define RADIO_SHORTS_ADDRESS_RSSISTART_Pos (4UL) /*!< Position of ADDRESS_RSSISTART field. */ +#define RADIO_SHORTS_ADDRESS_RSSISTART_Msk (0x1UL << RADIO_SHORTS_ADDRESS_RSSISTART_Pos) /*!< Bit mask of ADDRESS_RSSISTART field. */ +#define RADIO_SHORTS_ADDRESS_RSSISTART_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_ADDRESS_RSSISTART_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 3 : Shortcut between DISABLED event and RXEN task */ +#define RADIO_SHORTS_DISABLED_RXEN_Pos (3UL) /*!< Position of DISABLED_RXEN field. */ +#define RADIO_SHORTS_DISABLED_RXEN_Msk (0x1UL << RADIO_SHORTS_DISABLED_RXEN_Pos) /*!< Bit mask of DISABLED_RXEN field. */ +#define RADIO_SHORTS_DISABLED_RXEN_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_DISABLED_RXEN_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 2 : Shortcut between DISABLED event and TXEN task */ +#define RADIO_SHORTS_DISABLED_TXEN_Pos (2UL) /*!< Position of DISABLED_TXEN field. */ +#define RADIO_SHORTS_DISABLED_TXEN_Msk (0x1UL << RADIO_SHORTS_DISABLED_TXEN_Pos) /*!< Bit mask of DISABLED_TXEN field. */ +#define RADIO_SHORTS_DISABLED_TXEN_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_DISABLED_TXEN_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 1 : Shortcut between END event and DISABLE task */ +#define RADIO_SHORTS_END_DISABLE_Pos (1UL) /*!< Position of END_DISABLE field. */ +#define RADIO_SHORTS_END_DISABLE_Msk (0x1UL << RADIO_SHORTS_END_DISABLE_Pos) /*!< Bit mask of END_DISABLE field. */ +#define RADIO_SHORTS_END_DISABLE_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_END_DISABLE_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 0 : Shortcut between READY event and START task */ +#define RADIO_SHORTS_READY_START_Pos (0UL) /*!< Position of READY_START field. */ +#define RADIO_SHORTS_READY_START_Msk (0x1UL << RADIO_SHORTS_READY_START_Pos) /*!< Bit mask of READY_START field. */ +#define RADIO_SHORTS_READY_START_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_READY_START_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: RADIO_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 13 : Write '1' to Enable interrupt for CRCERROR event */ +#define RADIO_INTENSET_CRCERROR_Pos (13UL) /*!< Position of CRCERROR field. */ +#define RADIO_INTENSET_CRCERROR_Msk (0x1UL << RADIO_INTENSET_CRCERROR_Pos) /*!< Bit mask of CRCERROR field. */ +#define RADIO_INTENSET_CRCERROR_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_CRCERROR_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_CRCERROR_Set (1UL) /*!< Enable */ + +/* Bit 12 : Write '1' to Enable interrupt for CRCOK event */ +#define RADIO_INTENSET_CRCOK_Pos (12UL) /*!< Position of CRCOK field. */ +#define RADIO_INTENSET_CRCOK_Msk (0x1UL << RADIO_INTENSET_CRCOK_Pos) /*!< Bit mask of CRCOK field. */ +#define RADIO_INTENSET_CRCOK_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_CRCOK_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_CRCOK_Set (1UL) /*!< Enable */ + +/* Bit 10 : Write '1' to Enable interrupt for BCMATCH event */ +#define RADIO_INTENSET_BCMATCH_Pos (10UL) /*!< Position of BCMATCH field. */ +#define RADIO_INTENSET_BCMATCH_Msk (0x1UL << RADIO_INTENSET_BCMATCH_Pos) /*!< Bit mask of BCMATCH field. */ +#define RADIO_INTENSET_BCMATCH_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_BCMATCH_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_BCMATCH_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to Enable interrupt for RSSIEND event */ +#define RADIO_INTENSET_RSSIEND_Pos (7UL) /*!< Position of RSSIEND field. */ +#define RADIO_INTENSET_RSSIEND_Msk (0x1UL << RADIO_INTENSET_RSSIEND_Pos) /*!< Bit mask of RSSIEND field. */ +#define RADIO_INTENSET_RSSIEND_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_RSSIEND_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_RSSIEND_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to Enable interrupt for DEVMISS event */ +#define RADIO_INTENSET_DEVMISS_Pos (6UL) /*!< Position of DEVMISS field. */ +#define RADIO_INTENSET_DEVMISS_Msk (0x1UL << RADIO_INTENSET_DEVMISS_Pos) /*!< Bit mask of DEVMISS field. */ +#define RADIO_INTENSET_DEVMISS_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_DEVMISS_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_DEVMISS_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to Enable interrupt for DEVMATCH event */ +#define RADIO_INTENSET_DEVMATCH_Pos (5UL) /*!< Position of DEVMATCH field. */ +#define RADIO_INTENSET_DEVMATCH_Msk (0x1UL << RADIO_INTENSET_DEVMATCH_Pos) /*!< Bit mask of DEVMATCH field. */ +#define RADIO_INTENSET_DEVMATCH_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_DEVMATCH_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_DEVMATCH_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to Enable interrupt for DISABLED event */ +#define RADIO_INTENSET_DISABLED_Pos (4UL) /*!< Position of DISABLED field. */ +#define RADIO_INTENSET_DISABLED_Msk (0x1UL << RADIO_INTENSET_DISABLED_Pos) /*!< Bit mask of DISABLED field. */ +#define RADIO_INTENSET_DISABLED_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_DISABLED_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_DISABLED_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to Enable interrupt for END event */ +#define RADIO_INTENSET_END_Pos (3UL) /*!< Position of END field. */ +#define RADIO_INTENSET_END_Msk (0x1UL << RADIO_INTENSET_END_Pos) /*!< Bit mask of END field. */ +#define RADIO_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_END_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable interrupt for PAYLOAD event */ +#define RADIO_INTENSET_PAYLOAD_Pos (2UL) /*!< Position of PAYLOAD field. */ +#define RADIO_INTENSET_PAYLOAD_Msk (0x1UL << RADIO_INTENSET_PAYLOAD_Pos) /*!< Bit mask of PAYLOAD field. */ +#define RADIO_INTENSET_PAYLOAD_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_PAYLOAD_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_PAYLOAD_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for ADDRESS event */ +#define RADIO_INTENSET_ADDRESS_Pos (1UL) /*!< Position of ADDRESS field. */ +#define RADIO_INTENSET_ADDRESS_Msk (0x1UL << RADIO_INTENSET_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ +#define RADIO_INTENSET_ADDRESS_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_ADDRESS_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_ADDRESS_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for READY event */ +#define RADIO_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */ +#define RADIO_INTENSET_READY_Msk (0x1UL << RADIO_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ +#define RADIO_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_READY_Set (1UL) /*!< Enable */ + +/* Register: RADIO_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 13 : Write '1' to Disable interrupt for CRCERROR event */ +#define RADIO_INTENCLR_CRCERROR_Pos (13UL) /*!< Position of CRCERROR field. */ +#define RADIO_INTENCLR_CRCERROR_Msk (0x1UL << RADIO_INTENCLR_CRCERROR_Pos) /*!< Bit mask of CRCERROR field. */ +#define RADIO_INTENCLR_CRCERROR_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_CRCERROR_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_CRCERROR_Clear (1UL) /*!< Disable */ + +/* Bit 12 : Write '1' to Disable interrupt for CRCOK event */ +#define RADIO_INTENCLR_CRCOK_Pos (12UL) /*!< Position of CRCOK field. */ +#define RADIO_INTENCLR_CRCOK_Msk (0x1UL << RADIO_INTENCLR_CRCOK_Pos) /*!< Bit mask of CRCOK field. */ +#define RADIO_INTENCLR_CRCOK_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_CRCOK_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_CRCOK_Clear (1UL) /*!< Disable */ + +/* Bit 10 : Write '1' to Disable interrupt for BCMATCH event */ +#define RADIO_INTENCLR_BCMATCH_Pos (10UL) /*!< Position of BCMATCH field. */ +#define RADIO_INTENCLR_BCMATCH_Msk (0x1UL << RADIO_INTENCLR_BCMATCH_Pos) /*!< Bit mask of BCMATCH field. */ +#define RADIO_INTENCLR_BCMATCH_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_BCMATCH_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_BCMATCH_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to Disable interrupt for RSSIEND event */ +#define RADIO_INTENCLR_RSSIEND_Pos (7UL) /*!< Position of RSSIEND field. */ +#define RADIO_INTENCLR_RSSIEND_Msk (0x1UL << RADIO_INTENCLR_RSSIEND_Pos) /*!< Bit mask of RSSIEND field. */ +#define RADIO_INTENCLR_RSSIEND_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_RSSIEND_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_RSSIEND_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to Disable interrupt for DEVMISS event */ +#define RADIO_INTENCLR_DEVMISS_Pos (6UL) /*!< Position of DEVMISS field. */ +#define RADIO_INTENCLR_DEVMISS_Msk (0x1UL << RADIO_INTENCLR_DEVMISS_Pos) /*!< Bit mask of DEVMISS field. */ +#define RADIO_INTENCLR_DEVMISS_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_DEVMISS_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_DEVMISS_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to Disable interrupt for DEVMATCH event */ +#define RADIO_INTENCLR_DEVMATCH_Pos (5UL) /*!< Position of DEVMATCH field. */ +#define RADIO_INTENCLR_DEVMATCH_Msk (0x1UL << RADIO_INTENCLR_DEVMATCH_Pos) /*!< Bit mask of DEVMATCH field. */ +#define RADIO_INTENCLR_DEVMATCH_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_DEVMATCH_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_DEVMATCH_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to Disable interrupt for DISABLED event */ +#define RADIO_INTENCLR_DISABLED_Pos (4UL) /*!< Position of DISABLED field. */ +#define RADIO_INTENCLR_DISABLED_Msk (0x1UL << RADIO_INTENCLR_DISABLED_Pos) /*!< Bit mask of DISABLED field. */ +#define RADIO_INTENCLR_DISABLED_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_DISABLED_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_DISABLED_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to Disable interrupt for END event */ +#define RADIO_INTENCLR_END_Pos (3UL) /*!< Position of END field. */ +#define RADIO_INTENCLR_END_Msk (0x1UL << RADIO_INTENCLR_END_Pos) /*!< Bit mask of END field. */ +#define RADIO_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_END_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable interrupt for PAYLOAD event */ +#define RADIO_INTENCLR_PAYLOAD_Pos (2UL) /*!< Position of PAYLOAD field. */ +#define RADIO_INTENCLR_PAYLOAD_Msk (0x1UL << RADIO_INTENCLR_PAYLOAD_Pos) /*!< Bit mask of PAYLOAD field. */ +#define RADIO_INTENCLR_PAYLOAD_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_PAYLOAD_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_PAYLOAD_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for ADDRESS event */ +#define RADIO_INTENCLR_ADDRESS_Pos (1UL) /*!< Position of ADDRESS field. */ +#define RADIO_INTENCLR_ADDRESS_Msk (0x1UL << RADIO_INTENCLR_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ +#define RADIO_INTENCLR_ADDRESS_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_ADDRESS_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_ADDRESS_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for READY event */ +#define RADIO_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */ +#define RADIO_INTENCLR_READY_Msk (0x1UL << RADIO_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ +#define RADIO_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_READY_Clear (1UL) /*!< Disable */ + +/* Register: RADIO_CRCSTATUS */ +/* Description: CRC status */ + +/* Bit 0 : CRC status of packet received */ +#define RADIO_CRCSTATUS_CRCSTATUS_Pos (0UL) /*!< Position of CRCSTATUS field. */ +#define RADIO_CRCSTATUS_CRCSTATUS_Msk (0x1UL << RADIO_CRCSTATUS_CRCSTATUS_Pos) /*!< Bit mask of CRCSTATUS field. */ +#define RADIO_CRCSTATUS_CRCSTATUS_CRCError (0UL) /*!< Packet received with CRC error */ +#define RADIO_CRCSTATUS_CRCSTATUS_CRCOk (1UL) /*!< Packet received with CRC ok */ + +/* Register: RADIO_RXMATCH */ +/* Description: Received address */ + +/* Bits 2..0 : Received address */ +#define RADIO_RXMATCH_RXMATCH_Pos (0UL) /*!< Position of RXMATCH field. */ +#define RADIO_RXMATCH_RXMATCH_Msk (0x7UL << RADIO_RXMATCH_RXMATCH_Pos) /*!< Bit mask of RXMATCH field. */ + +/* Register: RADIO_RXCRC */ +/* Description: CRC field of previously received packet */ + +/* Bits 23..0 : CRC field of previously received packet */ +#define RADIO_RXCRC_RXCRC_Pos (0UL) /*!< Position of RXCRC field. */ +#define RADIO_RXCRC_RXCRC_Msk (0xFFFFFFUL << RADIO_RXCRC_RXCRC_Pos) /*!< Bit mask of RXCRC field. */ + +/* Register: RADIO_DAI */ +/* Description: Device address match index */ + +/* Bits 2..0 : Device address match index */ +#define RADIO_DAI_DAI_Pos (0UL) /*!< Position of DAI field. */ +#define RADIO_DAI_DAI_Msk (0x7UL << RADIO_DAI_DAI_Pos) /*!< Bit mask of DAI field. */ + +/* Register: RADIO_PACKETPTR */ +/* Description: Packet pointer */ + +/* Bits 31..0 : Packet pointer */ +#define RADIO_PACKETPTR_PACKETPTR_Pos (0UL) /*!< Position of PACKETPTR field. */ +#define RADIO_PACKETPTR_PACKETPTR_Msk (0xFFFFFFFFUL << RADIO_PACKETPTR_PACKETPTR_Pos) /*!< Bit mask of PACKETPTR field. */ + +/* Register: RADIO_FREQUENCY */ +/* Description: Frequency */ + +/* Bit 8 : Channel map selection. */ +#define RADIO_FREQUENCY_MAP_Pos (8UL) /*!< Position of MAP field. */ +#define RADIO_FREQUENCY_MAP_Msk (0x1UL << RADIO_FREQUENCY_MAP_Pos) /*!< Bit mask of MAP field. */ +#define RADIO_FREQUENCY_MAP_Default (0UL) /*!< Channel map between 2400 MHZ .. 2500 MHz */ +#define RADIO_FREQUENCY_MAP_Low (1UL) /*!< Channel map between 2360 MHZ .. 2460 MHz */ + +/* Bits 6..0 : Radio channel frequency */ +#define RADIO_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ +#define RADIO_FREQUENCY_FREQUENCY_Msk (0x7FUL << RADIO_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ + +/* Register: RADIO_TXPOWER */ +/* Description: Output power */ + +/* Bits 7..0 : RADIO output power. */ +#define RADIO_TXPOWER_TXPOWER_Pos (0UL) /*!< Position of TXPOWER field. */ +#define RADIO_TXPOWER_TXPOWER_Msk (0xFFUL << RADIO_TXPOWER_TXPOWER_Pos) /*!< Bit mask of TXPOWER field. */ +#define RADIO_TXPOWER_TXPOWER_0dBm (0x00UL) /*!< 0 dBm */ +#define RADIO_TXPOWER_TXPOWER_Pos3dBm (0x03UL) /*!< +3 dBm */ +#define RADIO_TXPOWER_TXPOWER_Pos4dBm (0x04UL) /*!< +4 dBm */ +#define RADIO_TXPOWER_TXPOWER_Neg30dBm (0xD8UL) /*!< Deprecated enumerator - -40 dBm */ +#define RADIO_TXPOWER_TXPOWER_Neg40dBm (0xD8UL) /*!< -40 dBm */ +#define RADIO_TXPOWER_TXPOWER_Neg20dBm (0xECUL) /*!< -20 dBm */ +#define RADIO_TXPOWER_TXPOWER_Neg16dBm (0xF0UL) /*!< -16 dBm */ +#define RADIO_TXPOWER_TXPOWER_Neg12dBm (0xF4UL) /*!< -12 dBm */ +#define RADIO_TXPOWER_TXPOWER_Neg8dBm (0xF8UL) /*!< -8 dBm */ +#define RADIO_TXPOWER_TXPOWER_Neg4dBm (0xFCUL) /*!< -4 dBm */ + +/* Register: RADIO_MODE */ +/* Description: Data rate and modulation */ + +/* Bits 3..0 : Radio data rate and modulation setting. The radio supports Frequency-shift Keying (FSK) modulation. */ +#define RADIO_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ +#define RADIO_MODE_MODE_Msk (0xFUL << RADIO_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ +#define RADIO_MODE_MODE_Nrf_1Mbit (0UL) /*!< 1 Mbit/s Nordic proprietary radio mode */ +#define RADIO_MODE_MODE_Nrf_2Mbit (1UL) /*!< 2 Mbit/s Nordic proprietary radio mode */ +#define RADIO_MODE_MODE_Ble_1Mbit (3UL) /*!< 1 Mbit/s Bluetooth Low Energy */ +#define RADIO_MODE_MODE_Ble_2Mbit (4UL) /*!< 2 Mbit/s Bluetooth Low Energy */ + +/* Register: RADIO_PCNF0 */ +/* Description: Packet configuration register 0 */ + +/* Bit 24 : Length of preamble on air. Decision point: TASKS_START task */ +#define RADIO_PCNF0_PLEN_Pos (24UL) /*!< Position of PLEN field. */ +#define RADIO_PCNF0_PLEN_Msk (0x1UL << RADIO_PCNF0_PLEN_Pos) /*!< Bit mask of PLEN field. */ +#define RADIO_PCNF0_PLEN_8bit (0UL) /*!< 8-bit preamble */ +#define RADIO_PCNF0_PLEN_16bit (1UL) /*!< 16-bit preamble */ + +/* Bit 20 : Include or exclude S1 field in RAM */ +#define RADIO_PCNF0_S1INCL_Pos (20UL) /*!< Position of S1INCL field. */ +#define RADIO_PCNF0_S1INCL_Msk (0x1UL << RADIO_PCNF0_S1INCL_Pos) /*!< Bit mask of S1INCL field. */ +#define RADIO_PCNF0_S1INCL_Automatic (0UL) /*!< Include S1 field in RAM only if S1LEN > 0 */ +#define RADIO_PCNF0_S1INCL_Include (1UL) /*!< Always include S1 field in RAM independent of S1LEN */ + +/* Bits 19..16 : Length on air of S1 field in number of bits. */ +#define RADIO_PCNF0_S1LEN_Pos (16UL) /*!< Position of S1LEN field. */ +#define RADIO_PCNF0_S1LEN_Msk (0xFUL << RADIO_PCNF0_S1LEN_Pos) /*!< Bit mask of S1LEN field. */ + +/* Bit 8 : Length on air of S0 field in number of bytes. */ +#define RADIO_PCNF0_S0LEN_Pos (8UL) /*!< Position of S0LEN field. */ +#define RADIO_PCNF0_S0LEN_Msk (0x1UL << RADIO_PCNF0_S0LEN_Pos) /*!< Bit mask of S0LEN field. */ + +/* Bits 3..0 : Length on air of LENGTH field in number of bits. */ +#define RADIO_PCNF0_LFLEN_Pos (0UL) /*!< Position of LFLEN field. */ +#define RADIO_PCNF0_LFLEN_Msk (0xFUL << RADIO_PCNF0_LFLEN_Pos) /*!< Bit mask of LFLEN field. */ + +/* Register: RADIO_PCNF1 */ +/* Description: Packet configuration register 1 */ + +/* Bit 25 : Enable or disable packet whitening */ +#define RADIO_PCNF1_WHITEEN_Pos (25UL) /*!< Position of WHITEEN field. */ +#define RADIO_PCNF1_WHITEEN_Msk (0x1UL << RADIO_PCNF1_WHITEEN_Pos) /*!< Bit mask of WHITEEN field. */ +#define RADIO_PCNF1_WHITEEN_Disabled (0UL) /*!< Disable */ +#define RADIO_PCNF1_WHITEEN_Enabled (1UL) /*!< Enable */ + +/* Bit 24 : On air endianness of packet, this applies to the S0, LENGTH, S1 and the PAYLOAD fields. */ +#define RADIO_PCNF1_ENDIAN_Pos (24UL) /*!< Position of ENDIAN field. */ +#define RADIO_PCNF1_ENDIAN_Msk (0x1UL << RADIO_PCNF1_ENDIAN_Pos) /*!< Bit mask of ENDIAN field. */ +#define RADIO_PCNF1_ENDIAN_Little (0UL) /*!< Least Significant bit on air first */ +#define RADIO_PCNF1_ENDIAN_Big (1UL) /*!< Most significant bit on air first */ + +/* Bits 18..16 : Base address length in number of bytes */ +#define RADIO_PCNF1_BALEN_Pos (16UL) /*!< Position of BALEN field. */ +#define RADIO_PCNF1_BALEN_Msk (0x7UL << RADIO_PCNF1_BALEN_Pos) /*!< Bit mask of BALEN field. */ + +/* Bits 15..8 : Static length in number of bytes */ +#define RADIO_PCNF1_STATLEN_Pos (8UL) /*!< Position of STATLEN field. */ +#define RADIO_PCNF1_STATLEN_Msk (0xFFUL << RADIO_PCNF1_STATLEN_Pos) /*!< Bit mask of STATLEN field. */ + +/* Bits 7..0 : Maximum length of packet payload. If the packet payload is larger than MAXLEN, the radio will truncate the payload to MAXLEN. */ +#define RADIO_PCNF1_MAXLEN_Pos (0UL) /*!< Position of MAXLEN field. */ +#define RADIO_PCNF1_MAXLEN_Msk (0xFFUL << RADIO_PCNF1_MAXLEN_Pos) /*!< Bit mask of MAXLEN field. */ + +/* Register: RADIO_BASE0 */ +/* Description: Base address 0 */ + +/* Bits 31..0 : Base address 0 */ +#define RADIO_BASE0_BASE0_Pos (0UL) /*!< Position of BASE0 field. */ +#define RADIO_BASE0_BASE0_Msk (0xFFFFFFFFUL << RADIO_BASE0_BASE0_Pos) /*!< Bit mask of BASE0 field. */ + +/* Register: RADIO_BASE1 */ +/* Description: Base address 1 */ + +/* Bits 31..0 : Base address 1 */ +#define RADIO_BASE1_BASE1_Pos (0UL) /*!< Position of BASE1 field. */ +#define RADIO_BASE1_BASE1_Msk (0xFFFFFFFFUL << RADIO_BASE1_BASE1_Pos) /*!< Bit mask of BASE1 field. */ + +/* Register: RADIO_PREFIX0 */ +/* Description: Prefixes bytes for logical addresses 0-3 */ + +/* Bits 31..24 : Address prefix 3. */ +#define RADIO_PREFIX0_AP3_Pos (24UL) /*!< Position of AP3 field. */ +#define RADIO_PREFIX0_AP3_Msk (0xFFUL << RADIO_PREFIX0_AP3_Pos) /*!< Bit mask of AP3 field. */ + +/* Bits 23..16 : Address prefix 2. */ +#define RADIO_PREFIX0_AP2_Pos (16UL) /*!< Position of AP2 field. */ +#define RADIO_PREFIX0_AP2_Msk (0xFFUL << RADIO_PREFIX0_AP2_Pos) /*!< Bit mask of AP2 field. */ + +/* Bits 15..8 : Address prefix 1. */ +#define RADIO_PREFIX0_AP1_Pos (8UL) /*!< Position of AP1 field. */ +#define RADIO_PREFIX0_AP1_Msk (0xFFUL << RADIO_PREFIX0_AP1_Pos) /*!< Bit mask of AP1 field. */ + +/* Bits 7..0 : Address prefix 0. */ +#define RADIO_PREFIX0_AP0_Pos (0UL) /*!< Position of AP0 field. */ +#define RADIO_PREFIX0_AP0_Msk (0xFFUL << RADIO_PREFIX0_AP0_Pos) /*!< Bit mask of AP0 field. */ + +/* Register: RADIO_PREFIX1 */ +/* Description: Prefixes bytes for logical addresses 4-7 */ + +/* Bits 31..24 : Address prefix 7. */ +#define RADIO_PREFIX1_AP7_Pos (24UL) /*!< Position of AP7 field. */ +#define RADIO_PREFIX1_AP7_Msk (0xFFUL << RADIO_PREFIX1_AP7_Pos) /*!< Bit mask of AP7 field. */ + +/* Bits 23..16 : Address prefix 6. */ +#define RADIO_PREFIX1_AP6_Pos (16UL) /*!< Position of AP6 field. */ +#define RADIO_PREFIX1_AP6_Msk (0xFFUL << RADIO_PREFIX1_AP6_Pos) /*!< Bit mask of AP6 field. */ + +/* Bits 15..8 : Address prefix 5. */ +#define RADIO_PREFIX1_AP5_Pos (8UL) /*!< Position of AP5 field. */ +#define RADIO_PREFIX1_AP5_Msk (0xFFUL << RADIO_PREFIX1_AP5_Pos) /*!< Bit mask of AP5 field. */ + +/* Bits 7..0 : Address prefix 4. */ +#define RADIO_PREFIX1_AP4_Pos (0UL) /*!< Position of AP4 field. */ +#define RADIO_PREFIX1_AP4_Msk (0xFFUL << RADIO_PREFIX1_AP4_Pos) /*!< Bit mask of AP4 field. */ + +/* Register: RADIO_TXADDRESS */ +/* Description: Transmit address select */ + +/* Bits 2..0 : Transmit address select */ +#define RADIO_TXADDRESS_TXADDRESS_Pos (0UL) /*!< Position of TXADDRESS field. */ +#define RADIO_TXADDRESS_TXADDRESS_Msk (0x7UL << RADIO_TXADDRESS_TXADDRESS_Pos) /*!< Bit mask of TXADDRESS field. */ + +/* Register: RADIO_RXADDRESSES */ +/* Description: Receive address select */ + +/* Bit 7 : Enable or disable reception on logical address 7. */ +#define RADIO_RXADDRESSES_ADDR7_Pos (7UL) /*!< Position of ADDR7 field. */ +#define RADIO_RXADDRESSES_ADDR7_Msk (0x1UL << RADIO_RXADDRESSES_ADDR7_Pos) /*!< Bit mask of ADDR7 field. */ +#define RADIO_RXADDRESSES_ADDR7_Disabled (0UL) /*!< Disable */ +#define RADIO_RXADDRESSES_ADDR7_Enabled (1UL) /*!< Enable */ + +/* Bit 6 : Enable or disable reception on logical address 6. */ +#define RADIO_RXADDRESSES_ADDR6_Pos (6UL) /*!< Position of ADDR6 field. */ +#define RADIO_RXADDRESSES_ADDR6_Msk (0x1UL << RADIO_RXADDRESSES_ADDR6_Pos) /*!< Bit mask of ADDR6 field. */ +#define RADIO_RXADDRESSES_ADDR6_Disabled (0UL) /*!< Disable */ +#define RADIO_RXADDRESSES_ADDR6_Enabled (1UL) /*!< Enable */ + +/* Bit 5 : Enable or disable reception on logical address 5. */ +#define RADIO_RXADDRESSES_ADDR5_Pos (5UL) /*!< Position of ADDR5 field. */ +#define RADIO_RXADDRESSES_ADDR5_Msk (0x1UL << RADIO_RXADDRESSES_ADDR5_Pos) /*!< Bit mask of ADDR5 field. */ +#define RADIO_RXADDRESSES_ADDR5_Disabled (0UL) /*!< Disable */ +#define RADIO_RXADDRESSES_ADDR5_Enabled (1UL) /*!< Enable */ + +/* Bit 4 : Enable or disable reception on logical address 4. */ +#define RADIO_RXADDRESSES_ADDR4_Pos (4UL) /*!< Position of ADDR4 field. */ +#define RADIO_RXADDRESSES_ADDR4_Msk (0x1UL << RADIO_RXADDRESSES_ADDR4_Pos) /*!< Bit mask of ADDR4 field. */ +#define RADIO_RXADDRESSES_ADDR4_Disabled (0UL) /*!< Disable */ +#define RADIO_RXADDRESSES_ADDR4_Enabled (1UL) /*!< Enable */ + +/* Bit 3 : Enable or disable reception on logical address 3. */ +#define RADIO_RXADDRESSES_ADDR3_Pos (3UL) /*!< Position of ADDR3 field. */ +#define RADIO_RXADDRESSES_ADDR3_Msk (0x1UL << RADIO_RXADDRESSES_ADDR3_Pos) /*!< Bit mask of ADDR3 field. */ +#define RADIO_RXADDRESSES_ADDR3_Disabled (0UL) /*!< Disable */ +#define RADIO_RXADDRESSES_ADDR3_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable reception on logical address 2. */ +#define RADIO_RXADDRESSES_ADDR2_Pos (2UL) /*!< Position of ADDR2 field. */ +#define RADIO_RXADDRESSES_ADDR2_Msk (0x1UL << RADIO_RXADDRESSES_ADDR2_Pos) /*!< Bit mask of ADDR2 field. */ +#define RADIO_RXADDRESSES_ADDR2_Disabled (0UL) /*!< Disable */ +#define RADIO_RXADDRESSES_ADDR2_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable reception on logical address 1. */ +#define RADIO_RXADDRESSES_ADDR1_Pos (1UL) /*!< Position of ADDR1 field. */ +#define RADIO_RXADDRESSES_ADDR1_Msk (0x1UL << RADIO_RXADDRESSES_ADDR1_Pos) /*!< Bit mask of ADDR1 field. */ +#define RADIO_RXADDRESSES_ADDR1_Disabled (0UL) /*!< Disable */ +#define RADIO_RXADDRESSES_ADDR1_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable reception on logical address 0. */ +#define RADIO_RXADDRESSES_ADDR0_Pos (0UL) /*!< Position of ADDR0 field. */ +#define RADIO_RXADDRESSES_ADDR0_Msk (0x1UL << RADIO_RXADDRESSES_ADDR0_Pos) /*!< Bit mask of ADDR0 field. */ +#define RADIO_RXADDRESSES_ADDR0_Disabled (0UL) /*!< Disable */ +#define RADIO_RXADDRESSES_ADDR0_Enabled (1UL) /*!< Enable */ + +/* Register: RADIO_CRCCNF */ +/* Description: CRC configuration */ + +/* Bit 8 : Include or exclude packet address field out of CRC calculation. */ +#define RADIO_CRCCNF_SKIPADDR_Pos (8UL) /*!< Position of SKIPADDR field. */ +#define RADIO_CRCCNF_SKIPADDR_Msk (0x1UL << RADIO_CRCCNF_SKIPADDR_Pos) /*!< Bit mask of SKIPADDR field. */ +#define RADIO_CRCCNF_SKIPADDR_Include (0UL) /*!< CRC calculation includes address field */ +#define RADIO_CRCCNF_SKIPADDR_Skip (1UL) /*!< CRC calculation does not include address field. The CRC calculation will start at the first byte after the address. */ + +/* Bits 1..0 : CRC length in number of bytes. */ +#define RADIO_CRCCNF_LEN_Pos (0UL) /*!< Position of LEN field. */ +#define RADIO_CRCCNF_LEN_Msk (0x3UL << RADIO_CRCCNF_LEN_Pos) /*!< Bit mask of LEN field. */ +#define RADIO_CRCCNF_LEN_Disabled (0UL) /*!< CRC length is zero and CRC calculation is disabled */ +#define RADIO_CRCCNF_LEN_One (1UL) /*!< CRC length is one byte and CRC calculation is enabled */ +#define RADIO_CRCCNF_LEN_Two (2UL) /*!< CRC length is two bytes and CRC calculation is enabled */ +#define RADIO_CRCCNF_LEN_Three (3UL) /*!< CRC length is three bytes and CRC calculation is enabled */ + +/* Register: RADIO_CRCPOLY */ +/* Description: CRC polynomial */ + +/* Bits 23..0 : CRC polynomial */ +#define RADIO_CRCPOLY_CRCPOLY_Pos (0UL) /*!< Position of CRCPOLY field. */ +#define RADIO_CRCPOLY_CRCPOLY_Msk (0xFFFFFFUL << RADIO_CRCPOLY_CRCPOLY_Pos) /*!< Bit mask of CRCPOLY field. */ + +/* Register: RADIO_CRCINIT */ +/* Description: CRC initial value */ + +/* Bits 23..0 : CRC initial value */ +#define RADIO_CRCINIT_CRCINIT_Pos (0UL) /*!< Position of CRCINIT field. */ +#define RADIO_CRCINIT_CRCINIT_Msk (0xFFFFFFUL << RADIO_CRCINIT_CRCINIT_Pos) /*!< Bit mask of CRCINIT field. */ + +/* Register: RADIO_TIFS */ +/* Description: Inter Frame Spacing in us */ + +/* Bits 7..0 : Inter Frame Spacing in us */ +#define RADIO_TIFS_TIFS_Pos (0UL) /*!< Position of TIFS field. */ +#define RADIO_TIFS_TIFS_Msk (0xFFUL << RADIO_TIFS_TIFS_Pos) /*!< Bit mask of TIFS field. */ + +/* Register: RADIO_RSSISAMPLE */ +/* Description: RSSI sample */ + +/* Bits 6..0 : RSSI sample */ +#define RADIO_RSSISAMPLE_RSSISAMPLE_Pos (0UL) /*!< Position of RSSISAMPLE field. */ +#define RADIO_RSSISAMPLE_RSSISAMPLE_Msk (0x7FUL << RADIO_RSSISAMPLE_RSSISAMPLE_Pos) /*!< Bit mask of RSSISAMPLE field. */ + +/* Register: RADIO_STATE */ +/* Description: Current radio state */ + +/* Bits 3..0 : Current radio state */ +#define RADIO_STATE_STATE_Pos (0UL) /*!< Position of STATE field. */ +#define RADIO_STATE_STATE_Msk (0xFUL << RADIO_STATE_STATE_Pos) /*!< Bit mask of STATE field. */ +#define RADIO_STATE_STATE_Disabled (0UL) /*!< RADIO is in the Disabled state */ +#define RADIO_STATE_STATE_RxRu (1UL) /*!< RADIO is in the RXRU state */ +#define RADIO_STATE_STATE_RxIdle (2UL) /*!< RADIO is in the RXIDLE state */ +#define RADIO_STATE_STATE_Rx (3UL) /*!< RADIO is in the RX state */ +#define RADIO_STATE_STATE_RxDisable (4UL) /*!< RADIO is in the RXDISABLED state */ +#define RADIO_STATE_STATE_TxRu (9UL) /*!< RADIO is in the TXRU state */ +#define RADIO_STATE_STATE_TxIdle (10UL) /*!< RADIO is in the TXIDLE state */ +#define RADIO_STATE_STATE_Tx (11UL) /*!< RADIO is in the TX state */ +#define RADIO_STATE_STATE_TxDisable (12UL) /*!< RADIO is in the TXDISABLED state */ + +/* Register: RADIO_DATAWHITEIV */ +/* Description: Data whitening initial value */ + +/* Bits 6..0 : Data whitening initial value. Bit 6 is hard-wired to '1', writing '0' to it has no effect, and it will always be read back and used by the device as '1'. */ +#define RADIO_DATAWHITEIV_DATAWHITEIV_Pos (0UL) /*!< Position of DATAWHITEIV field. */ +#define RADIO_DATAWHITEIV_DATAWHITEIV_Msk (0x7FUL << RADIO_DATAWHITEIV_DATAWHITEIV_Pos) /*!< Bit mask of DATAWHITEIV field. */ + +/* Register: RADIO_BCC */ +/* Description: Bit counter compare */ + +/* Bits 31..0 : Bit counter compare */ +#define RADIO_BCC_BCC_Pos (0UL) /*!< Position of BCC field. */ +#define RADIO_BCC_BCC_Msk (0xFFFFFFFFUL << RADIO_BCC_BCC_Pos) /*!< Bit mask of BCC field. */ + +/* Register: RADIO_DAB */ +/* Description: Description collection[0]: Device address base segment 0 */ + +/* Bits 31..0 : Device address base segment 0 */ +#define RADIO_DAB_DAB_Pos (0UL) /*!< Position of DAB field. */ +#define RADIO_DAB_DAB_Msk (0xFFFFFFFFUL << RADIO_DAB_DAB_Pos) /*!< Bit mask of DAB field. */ + +/* Register: RADIO_DAP */ +/* Description: Description collection[0]: Device address prefix 0 */ + +/* Bits 15..0 : Device address prefix 0 */ +#define RADIO_DAP_DAP_Pos (0UL) /*!< Position of DAP field. */ +#define RADIO_DAP_DAP_Msk (0xFFFFUL << RADIO_DAP_DAP_Pos) /*!< Bit mask of DAP field. */ + +/* Register: RADIO_DACNF */ +/* Description: Device address match configuration */ + +/* Bit 15 : TxAdd for device address 7 */ +#define RADIO_DACNF_TXADD7_Pos (15UL) /*!< Position of TXADD7 field. */ +#define RADIO_DACNF_TXADD7_Msk (0x1UL << RADIO_DACNF_TXADD7_Pos) /*!< Bit mask of TXADD7 field. */ + +/* Bit 14 : TxAdd for device address 6 */ +#define RADIO_DACNF_TXADD6_Pos (14UL) /*!< Position of TXADD6 field. */ +#define RADIO_DACNF_TXADD6_Msk (0x1UL << RADIO_DACNF_TXADD6_Pos) /*!< Bit mask of TXADD6 field. */ + +/* Bit 13 : TxAdd for device address 5 */ +#define RADIO_DACNF_TXADD5_Pos (13UL) /*!< Position of TXADD5 field. */ +#define RADIO_DACNF_TXADD5_Msk (0x1UL << RADIO_DACNF_TXADD5_Pos) /*!< Bit mask of TXADD5 field. */ + +/* Bit 12 : TxAdd for device address 4 */ +#define RADIO_DACNF_TXADD4_Pos (12UL) /*!< Position of TXADD4 field. */ +#define RADIO_DACNF_TXADD4_Msk (0x1UL << RADIO_DACNF_TXADD4_Pos) /*!< Bit mask of TXADD4 field. */ + +/* Bit 11 : TxAdd for device address 3 */ +#define RADIO_DACNF_TXADD3_Pos (11UL) /*!< Position of TXADD3 field. */ +#define RADIO_DACNF_TXADD3_Msk (0x1UL << RADIO_DACNF_TXADD3_Pos) /*!< Bit mask of TXADD3 field. */ + +/* Bit 10 : TxAdd for device address 2 */ +#define RADIO_DACNF_TXADD2_Pos (10UL) /*!< Position of TXADD2 field. */ +#define RADIO_DACNF_TXADD2_Msk (0x1UL << RADIO_DACNF_TXADD2_Pos) /*!< Bit mask of TXADD2 field. */ + +/* Bit 9 : TxAdd for device address 1 */ +#define RADIO_DACNF_TXADD1_Pos (9UL) /*!< Position of TXADD1 field. */ +#define RADIO_DACNF_TXADD1_Msk (0x1UL << RADIO_DACNF_TXADD1_Pos) /*!< Bit mask of TXADD1 field. */ + +/* Bit 8 : TxAdd for device address 0 */ +#define RADIO_DACNF_TXADD0_Pos (8UL) /*!< Position of TXADD0 field. */ +#define RADIO_DACNF_TXADD0_Msk (0x1UL << RADIO_DACNF_TXADD0_Pos) /*!< Bit mask of TXADD0 field. */ + +/* Bit 7 : Enable or disable device address matching using device address 7 */ +#define RADIO_DACNF_ENA7_Pos (7UL) /*!< Position of ENA7 field. */ +#define RADIO_DACNF_ENA7_Msk (0x1UL << RADIO_DACNF_ENA7_Pos) /*!< Bit mask of ENA7 field. */ +#define RADIO_DACNF_ENA7_Disabled (0UL) /*!< Disabled */ +#define RADIO_DACNF_ENA7_Enabled (1UL) /*!< Enabled */ + +/* Bit 6 : Enable or disable device address matching using device address 6 */ +#define RADIO_DACNF_ENA6_Pos (6UL) /*!< Position of ENA6 field. */ +#define RADIO_DACNF_ENA6_Msk (0x1UL << RADIO_DACNF_ENA6_Pos) /*!< Bit mask of ENA6 field. */ +#define RADIO_DACNF_ENA6_Disabled (0UL) /*!< Disabled */ +#define RADIO_DACNF_ENA6_Enabled (1UL) /*!< Enabled */ + +/* Bit 5 : Enable or disable device address matching using device address 5 */ +#define RADIO_DACNF_ENA5_Pos (5UL) /*!< Position of ENA5 field. */ +#define RADIO_DACNF_ENA5_Msk (0x1UL << RADIO_DACNF_ENA5_Pos) /*!< Bit mask of ENA5 field. */ +#define RADIO_DACNF_ENA5_Disabled (0UL) /*!< Disabled */ +#define RADIO_DACNF_ENA5_Enabled (1UL) /*!< Enabled */ + +/* Bit 4 : Enable or disable device address matching using device address 4 */ +#define RADIO_DACNF_ENA4_Pos (4UL) /*!< Position of ENA4 field. */ +#define RADIO_DACNF_ENA4_Msk (0x1UL << RADIO_DACNF_ENA4_Pos) /*!< Bit mask of ENA4 field. */ +#define RADIO_DACNF_ENA4_Disabled (0UL) /*!< Disabled */ +#define RADIO_DACNF_ENA4_Enabled (1UL) /*!< Enabled */ + +/* Bit 3 : Enable or disable device address matching using device address 3 */ +#define RADIO_DACNF_ENA3_Pos (3UL) /*!< Position of ENA3 field. */ +#define RADIO_DACNF_ENA3_Msk (0x1UL << RADIO_DACNF_ENA3_Pos) /*!< Bit mask of ENA3 field. */ +#define RADIO_DACNF_ENA3_Disabled (0UL) /*!< Disabled */ +#define RADIO_DACNF_ENA3_Enabled (1UL) /*!< Enabled */ + +/* Bit 2 : Enable or disable device address matching using device address 2 */ +#define RADIO_DACNF_ENA2_Pos (2UL) /*!< Position of ENA2 field. */ +#define RADIO_DACNF_ENA2_Msk (0x1UL << RADIO_DACNF_ENA2_Pos) /*!< Bit mask of ENA2 field. */ +#define RADIO_DACNF_ENA2_Disabled (0UL) /*!< Disabled */ +#define RADIO_DACNF_ENA2_Enabled (1UL) /*!< Enabled */ + +/* Bit 1 : Enable or disable device address matching using device address 1 */ +#define RADIO_DACNF_ENA1_Pos (1UL) /*!< Position of ENA1 field. */ +#define RADIO_DACNF_ENA1_Msk (0x1UL << RADIO_DACNF_ENA1_Pos) /*!< Bit mask of ENA1 field. */ +#define RADIO_DACNF_ENA1_Disabled (0UL) /*!< Disabled */ +#define RADIO_DACNF_ENA1_Enabled (1UL) /*!< Enabled */ + +/* Bit 0 : Enable or disable device address matching using device address 0 */ +#define RADIO_DACNF_ENA0_Pos (0UL) /*!< Position of ENA0 field. */ +#define RADIO_DACNF_ENA0_Msk (0x1UL << RADIO_DACNF_ENA0_Pos) /*!< Bit mask of ENA0 field. */ +#define RADIO_DACNF_ENA0_Disabled (0UL) /*!< Disabled */ +#define RADIO_DACNF_ENA0_Enabled (1UL) /*!< Enabled */ + +/* Register: RADIO_MODECNF0 */ +/* Description: Radio mode configuration register 0 */ + +/* Bits 9..8 : Default TX value */ +#define RADIO_MODECNF0_DTX_Pos (8UL) /*!< Position of DTX field. */ +#define RADIO_MODECNF0_DTX_Msk (0x3UL << RADIO_MODECNF0_DTX_Pos) /*!< Bit mask of DTX field. */ +#define RADIO_MODECNF0_DTX_B1 (0UL) /*!< Transmit '1' */ +#define RADIO_MODECNF0_DTX_B0 (1UL) /*!< Transmit '0' */ +#define RADIO_MODECNF0_DTX_Center (2UL) /*!< Transmit center frequency */ + +/* Bit 0 : Radio ramp-up time */ +#define RADIO_MODECNF0_RU_Pos (0UL) /*!< Position of RU field. */ +#define RADIO_MODECNF0_RU_Msk (0x1UL << RADIO_MODECNF0_RU_Pos) /*!< Bit mask of RU field. */ +#define RADIO_MODECNF0_RU_Default (0UL) /*!< Default ramp-up time (tRXEN), compatible with firmware written for nRF51 */ +#define RADIO_MODECNF0_RU_Fast (1UL) /*!< Fast ramp-up (tRXEN,FAST), see electrical specification for more information */ + +/* Register: RADIO_POWER */ +/* Description: Peripheral power control */ + +/* Bit 0 : Peripheral power control. The peripheral and its registers will be reset to its initial state by switching the peripheral off and then back on again. */ +#define RADIO_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ +#define RADIO_POWER_POWER_Msk (0x1UL << RADIO_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ +#define RADIO_POWER_POWER_Disabled (0UL) /*!< Peripheral is powered off */ +#define RADIO_POWER_POWER_Enabled (1UL) /*!< Peripheral is powered on */ + + +/* Peripheral: RNG */ +/* Description: Random Number Generator */ + +/* Register: RNG_TASKS_START */ +/* Description: Task starting the random number generator */ + +/* Bit 0 : */ +#define RNG_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define RNG_TASKS_START_TASKS_START_Msk (0x1UL << RNG_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: RNG_TASKS_STOP */ +/* Description: Task stopping the random number generator */ + +/* Bit 0 : */ +#define RNG_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define RNG_TASKS_STOP_TASKS_STOP_Msk (0x1UL << RNG_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: RNG_EVENTS_VALRDY */ +/* Description: Event being generated for every new random number written to the VALUE register */ + +/* Bit 0 : */ +#define RNG_EVENTS_VALRDY_EVENTS_VALRDY_Pos (0UL) /*!< Position of EVENTS_VALRDY field. */ +#define RNG_EVENTS_VALRDY_EVENTS_VALRDY_Msk (0x1UL << RNG_EVENTS_VALRDY_EVENTS_VALRDY_Pos) /*!< Bit mask of EVENTS_VALRDY field. */ + +/* Register: RNG_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 0 : Shortcut between VALRDY event and STOP task */ +#define RNG_SHORTS_VALRDY_STOP_Pos (0UL) /*!< Position of VALRDY_STOP field. */ +#define RNG_SHORTS_VALRDY_STOP_Msk (0x1UL << RNG_SHORTS_VALRDY_STOP_Pos) /*!< Bit mask of VALRDY_STOP field. */ +#define RNG_SHORTS_VALRDY_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define RNG_SHORTS_VALRDY_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: RNG_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 0 : Write '1' to Enable interrupt for VALRDY event */ +#define RNG_INTENSET_VALRDY_Pos (0UL) /*!< Position of VALRDY field. */ +#define RNG_INTENSET_VALRDY_Msk (0x1UL << RNG_INTENSET_VALRDY_Pos) /*!< Bit mask of VALRDY field. */ +#define RNG_INTENSET_VALRDY_Disabled (0UL) /*!< Read: Disabled */ +#define RNG_INTENSET_VALRDY_Enabled (1UL) /*!< Read: Enabled */ +#define RNG_INTENSET_VALRDY_Set (1UL) /*!< Enable */ + +/* Register: RNG_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 0 : Write '1' to Disable interrupt for VALRDY event */ +#define RNG_INTENCLR_VALRDY_Pos (0UL) /*!< Position of VALRDY field. */ +#define RNG_INTENCLR_VALRDY_Msk (0x1UL << RNG_INTENCLR_VALRDY_Pos) /*!< Bit mask of VALRDY field. */ +#define RNG_INTENCLR_VALRDY_Disabled (0UL) /*!< Read: Disabled */ +#define RNG_INTENCLR_VALRDY_Enabled (1UL) /*!< Read: Enabled */ +#define RNG_INTENCLR_VALRDY_Clear (1UL) /*!< Disable */ + +/* Register: RNG_CONFIG */ +/* Description: Configuration register */ + +/* Bit 0 : Bias correction */ +#define RNG_CONFIG_DERCEN_Pos (0UL) /*!< Position of DERCEN field. */ +#define RNG_CONFIG_DERCEN_Msk (0x1UL << RNG_CONFIG_DERCEN_Pos) /*!< Bit mask of DERCEN field. */ +#define RNG_CONFIG_DERCEN_Disabled (0UL) /*!< Disabled */ +#define RNG_CONFIG_DERCEN_Enabled (1UL) /*!< Enabled */ + +/* Register: RNG_VALUE */ +/* Description: Output random number */ + +/* Bits 7..0 : Generated random number */ +#define RNG_VALUE_VALUE_Pos (0UL) /*!< Position of VALUE field. */ +#define RNG_VALUE_VALUE_Msk (0xFFUL << RNG_VALUE_VALUE_Pos) /*!< Bit mask of VALUE field. */ + + +/* Peripheral: RTC */ +/* Description: Real time counter 0 */ + +/* Register: RTC_TASKS_START */ +/* Description: Start RTC COUNTER */ + +/* Bit 0 : */ +#define RTC_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define RTC_TASKS_START_TASKS_START_Msk (0x1UL << RTC_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: RTC_TASKS_STOP */ +/* Description: Stop RTC COUNTER */ + +/* Bit 0 : */ +#define RTC_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define RTC_TASKS_STOP_TASKS_STOP_Msk (0x1UL << RTC_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: RTC_TASKS_CLEAR */ +/* Description: Clear RTC COUNTER */ + +/* Bit 0 : */ +#define RTC_TASKS_CLEAR_TASKS_CLEAR_Pos (0UL) /*!< Position of TASKS_CLEAR field. */ +#define RTC_TASKS_CLEAR_TASKS_CLEAR_Msk (0x1UL << RTC_TASKS_CLEAR_TASKS_CLEAR_Pos) /*!< Bit mask of TASKS_CLEAR field. */ + +/* Register: RTC_TASKS_TRIGOVRFLW */ +/* Description: Set COUNTER to 0xFFFFF0 */ + +/* Bit 0 : */ +#define RTC_TASKS_TRIGOVRFLW_TASKS_TRIGOVRFLW_Pos (0UL) /*!< Position of TASKS_TRIGOVRFLW field. */ +#define RTC_TASKS_TRIGOVRFLW_TASKS_TRIGOVRFLW_Msk (0x1UL << RTC_TASKS_TRIGOVRFLW_TASKS_TRIGOVRFLW_Pos) /*!< Bit mask of TASKS_TRIGOVRFLW field. */ + +/* Register: RTC_EVENTS_TICK */ +/* Description: Event on COUNTER increment */ + +/* Bit 0 : */ +#define RTC_EVENTS_TICK_EVENTS_TICK_Pos (0UL) /*!< Position of EVENTS_TICK field. */ +#define RTC_EVENTS_TICK_EVENTS_TICK_Msk (0x1UL << RTC_EVENTS_TICK_EVENTS_TICK_Pos) /*!< Bit mask of EVENTS_TICK field. */ + +/* Register: RTC_EVENTS_OVRFLW */ +/* Description: Event on COUNTER overflow */ + +/* Bit 0 : */ +#define RTC_EVENTS_OVRFLW_EVENTS_OVRFLW_Pos (0UL) /*!< Position of EVENTS_OVRFLW field. */ +#define RTC_EVENTS_OVRFLW_EVENTS_OVRFLW_Msk (0x1UL << RTC_EVENTS_OVRFLW_EVENTS_OVRFLW_Pos) /*!< Bit mask of EVENTS_OVRFLW field. */ + +/* Register: RTC_EVENTS_COMPARE */ +/* Description: Description collection[0]: Compare event on CC[0] match */ + +/* Bit 0 : */ +#define RTC_EVENTS_COMPARE_EVENTS_COMPARE_Pos (0UL) /*!< Position of EVENTS_COMPARE field. */ +#define RTC_EVENTS_COMPARE_EVENTS_COMPARE_Msk (0x1UL << RTC_EVENTS_COMPARE_EVENTS_COMPARE_Pos) /*!< Bit mask of EVENTS_COMPARE field. */ + +/* Register: RTC_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 19 : Write '1' to Enable interrupt for COMPARE[3] event */ +#define RTC_INTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define RTC_INTENSET_COMPARE3_Msk (0x1UL << RTC_INTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define RTC_INTENSET_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENSET_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENSET_COMPARE3_Set (1UL) /*!< Enable */ + +/* Bit 18 : Write '1' to Enable interrupt for COMPARE[2] event */ +#define RTC_INTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define RTC_INTENSET_COMPARE2_Msk (0x1UL << RTC_INTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define RTC_INTENSET_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENSET_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENSET_COMPARE2_Set (1UL) /*!< Enable */ + +/* Bit 17 : Write '1' to Enable interrupt for COMPARE[1] event */ +#define RTC_INTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define RTC_INTENSET_COMPARE1_Msk (0x1UL << RTC_INTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define RTC_INTENSET_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENSET_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENSET_COMPARE1_Set (1UL) /*!< Enable */ + +/* Bit 16 : Write '1' to Enable interrupt for COMPARE[0] event */ +#define RTC_INTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define RTC_INTENSET_COMPARE0_Msk (0x1UL << RTC_INTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define RTC_INTENSET_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENSET_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENSET_COMPARE0_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for OVRFLW event */ +#define RTC_INTENSET_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ +#define RTC_INTENSET_OVRFLW_Msk (0x1UL << RTC_INTENSET_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ +#define RTC_INTENSET_OVRFLW_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENSET_OVRFLW_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENSET_OVRFLW_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for TICK event */ +#define RTC_INTENSET_TICK_Pos (0UL) /*!< Position of TICK field. */ +#define RTC_INTENSET_TICK_Msk (0x1UL << RTC_INTENSET_TICK_Pos) /*!< Bit mask of TICK field. */ +#define RTC_INTENSET_TICK_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENSET_TICK_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENSET_TICK_Set (1UL) /*!< Enable */ + +/* Register: RTC_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 19 : Write '1' to Disable interrupt for COMPARE[3] event */ +#define RTC_INTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define RTC_INTENCLR_COMPARE3_Msk (0x1UL << RTC_INTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define RTC_INTENCLR_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENCLR_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENCLR_COMPARE3_Clear (1UL) /*!< Disable */ + +/* Bit 18 : Write '1' to Disable interrupt for COMPARE[2] event */ +#define RTC_INTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define RTC_INTENCLR_COMPARE2_Msk (0x1UL << RTC_INTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define RTC_INTENCLR_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENCLR_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENCLR_COMPARE2_Clear (1UL) /*!< Disable */ + +/* Bit 17 : Write '1' to Disable interrupt for COMPARE[1] event */ +#define RTC_INTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define RTC_INTENCLR_COMPARE1_Msk (0x1UL << RTC_INTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define RTC_INTENCLR_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENCLR_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENCLR_COMPARE1_Clear (1UL) /*!< Disable */ + +/* Bit 16 : Write '1' to Disable interrupt for COMPARE[0] event */ +#define RTC_INTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define RTC_INTENCLR_COMPARE0_Msk (0x1UL << RTC_INTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define RTC_INTENCLR_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENCLR_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENCLR_COMPARE0_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for OVRFLW event */ +#define RTC_INTENCLR_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ +#define RTC_INTENCLR_OVRFLW_Msk (0x1UL << RTC_INTENCLR_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ +#define RTC_INTENCLR_OVRFLW_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENCLR_OVRFLW_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENCLR_OVRFLW_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for TICK event */ +#define RTC_INTENCLR_TICK_Pos (0UL) /*!< Position of TICK field. */ +#define RTC_INTENCLR_TICK_Msk (0x1UL << RTC_INTENCLR_TICK_Pos) /*!< Bit mask of TICK field. */ +#define RTC_INTENCLR_TICK_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENCLR_TICK_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENCLR_TICK_Clear (1UL) /*!< Disable */ + +/* Register: RTC_EVTEN */ +/* Description: Enable or disable event routing */ + +/* Bit 19 : Enable or disable event routing for COMPARE[3] event */ +#define RTC_EVTEN_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define RTC_EVTEN_COMPARE3_Msk (0x1UL << RTC_EVTEN_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define RTC_EVTEN_COMPARE3_Disabled (0UL) /*!< Disable */ +#define RTC_EVTEN_COMPARE3_Enabled (1UL) /*!< Enable */ + +/* Bit 18 : Enable or disable event routing for COMPARE[2] event */ +#define RTC_EVTEN_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define RTC_EVTEN_COMPARE2_Msk (0x1UL << RTC_EVTEN_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define RTC_EVTEN_COMPARE2_Disabled (0UL) /*!< Disable */ +#define RTC_EVTEN_COMPARE2_Enabled (1UL) /*!< Enable */ + +/* Bit 17 : Enable or disable event routing for COMPARE[1] event */ +#define RTC_EVTEN_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define RTC_EVTEN_COMPARE1_Msk (0x1UL << RTC_EVTEN_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define RTC_EVTEN_COMPARE1_Disabled (0UL) /*!< Disable */ +#define RTC_EVTEN_COMPARE1_Enabled (1UL) /*!< Enable */ + +/* Bit 16 : Enable or disable event routing for COMPARE[0] event */ +#define RTC_EVTEN_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define RTC_EVTEN_COMPARE0_Msk (0x1UL << RTC_EVTEN_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define RTC_EVTEN_COMPARE0_Disabled (0UL) /*!< Disable */ +#define RTC_EVTEN_COMPARE0_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable event routing for OVRFLW event */ +#define RTC_EVTEN_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ +#define RTC_EVTEN_OVRFLW_Msk (0x1UL << RTC_EVTEN_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ +#define RTC_EVTEN_OVRFLW_Disabled (0UL) /*!< Disable */ +#define RTC_EVTEN_OVRFLW_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable event routing for TICK event */ +#define RTC_EVTEN_TICK_Pos (0UL) /*!< Position of TICK field. */ +#define RTC_EVTEN_TICK_Msk (0x1UL << RTC_EVTEN_TICK_Pos) /*!< Bit mask of TICK field. */ +#define RTC_EVTEN_TICK_Disabled (0UL) /*!< Disable */ +#define RTC_EVTEN_TICK_Enabled (1UL) /*!< Enable */ + +/* Register: RTC_EVTENSET */ +/* Description: Enable event routing */ + +/* Bit 19 : Write '1' to Enable event routing for COMPARE[3] event */ +#define RTC_EVTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define RTC_EVTENSET_COMPARE3_Msk (0x1UL << RTC_EVTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define RTC_EVTENSET_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENSET_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENSET_COMPARE3_Set (1UL) /*!< Enable */ + +/* Bit 18 : Write '1' to Enable event routing for COMPARE[2] event */ +#define RTC_EVTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define RTC_EVTENSET_COMPARE2_Msk (0x1UL << RTC_EVTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define RTC_EVTENSET_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENSET_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENSET_COMPARE2_Set (1UL) /*!< Enable */ + +/* Bit 17 : Write '1' to Enable event routing for COMPARE[1] event */ +#define RTC_EVTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define RTC_EVTENSET_COMPARE1_Msk (0x1UL << RTC_EVTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define RTC_EVTENSET_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENSET_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENSET_COMPARE1_Set (1UL) /*!< Enable */ + +/* Bit 16 : Write '1' to Enable event routing for COMPARE[0] event */ +#define RTC_EVTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define RTC_EVTENSET_COMPARE0_Msk (0x1UL << RTC_EVTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define RTC_EVTENSET_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENSET_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENSET_COMPARE0_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable event routing for OVRFLW event */ +#define RTC_EVTENSET_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ +#define RTC_EVTENSET_OVRFLW_Msk (0x1UL << RTC_EVTENSET_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ +#define RTC_EVTENSET_OVRFLW_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENSET_OVRFLW_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENSET_OVRFLW_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable event routing for TICK event */ +#define RTC_EVTENSET_TICK_Pos (0UL) /*!< Position of TICK field. */ +#define RTC_EVTENSET_TICK_Msk (0x1UL << RTC_EVTENSET_TICK_Pos) /*!< Bit mask of TICK field. */ +#define RTC_EVTENSET_TICK_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENSET_TICK_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENSET_TICK_Set (1UL) /*!< Enable */ + +/* Register: RTC_EVTENCLR */ +/* Description: Disable event routing */ + +/* Bit 19 : Write '1' to Disable event routing for COMPARE[3] event */ +#define RTC_EVTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define RTC_EVTENCLR_COMPARE3_Msk (0x1UL << RTC_EVTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define RTC_EVTENCLR_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENCLR_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENCLR_COMPARE3_Clear (1UL) /*!< Disable */ + +/* Bit 18 : Write '1' to Disable event routing for COMPARE[2] event */ +#define RTC_EVTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define RTC_EVTENCLR_COMPARE2_Msk (0x1UL << RTC_EVTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define RTC_EVTENCLR_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENCLR_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENCLR_COMPARE2_Clear (1UL) /*!< Disable */ + +/* Bit 17 : Write '1' to Disable event routing for COMPARE[1] event */ +#define RTC_EVTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define RTC_EVTENCLR_COMPARE1_Msk (0x1UL << RTC_EVTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define RTC_EVTENCLR_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENCLR_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENCLR_COMPARE1_Clear (1UL) /*!< Disable */ + +/* Bit 16 : Write '1' to Disable event routing for COMPARE[0] event */ +#define RTC_EVTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define RTC_EVTENCLR_COMPARE0_Msk (0x1UL << RTC_EVTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define RTC_EVTENCLR_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENCLR_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENCLR_COMPARE0_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable event routing for OVRFLW event */ +#define RTC_EVTENCLR_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ +#define RTC_EVTENCLR_OVRFLW_Msk (0x1UL << RTC_EVTENCLR_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ +#define RTC_EVTENCLR_OVRFLW_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENCLR_OVRFLW_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENCLR_OVRFLW_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable event routing for TICK event */ +#define RTC_EVTENCLR_TICK_Pos (0UL) /*!< Position of TICK field. */ +#define RTC_EVTENCLR_TICK_Msk (0x1UL << RTC_EVTENCLR_TICK_Pos) /*!< Bit mask of TICK field. */ +#define RTC_EVTENCLR_TICK_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENCLR_TICK_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENCLR_TICK_Clear (1UL) /*!< Disable */ + +/* Register: RTC_COUNTER */ +/* Description: Current COUNTER value */ + +/* Bits 23..0 : Counter value */ +#define RTC_COUNTER_COUNTER_Pos (0UL) /*!< Position of COUNTER field. */ +#define RTC_COUNTER_COUNTER_Msk (0xFFFFFFUL << RTC_COUNTER_COUNTER_Pos) /*!< Bit mask of COUNTER field. */ + +/* Register: RTC_PRESCALER */ +/* Description: 12 bit prescaler for COUNTER frequency (32768/(PRESCALER+1)).Must be written when RTC is stopped */ + +/* Bits 11..0 : Prescaler value */ +#define RTC_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */ +#define RTC_PRESCALER_PRESCALER_Msk (0xFFFUL << RTC_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */ + +/* Register: RTC_CC */ +/* Description: Description collection[0]: Compare register 0 */ + +/* Bits 23..0 : Compare value */ +#define RTC_CC_COMPARE_Pos (0UL) /*!< Position of COMPARE field. */ +#define RTC_CC_COMPARE_Msk (0xFFFFFFUL << RTC_CC_COMPARE_Pos) /*!< Bit mask of COMPARE field. */ + + +/* Peripheral: SAADC */ +/* Description: Analog to Digital Converter */ + +/* Register: SAADC_TASKS_START */ +/* Description: Start the ADC and prepare the result buffer in RAM */ + +/* Bit 0 : */ +#define SAADC_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define SAADC_TASKS_START_TASKS_START_Msk (0x1UL << SAADC_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: SAADC_TASKS_SAMPLE */ +/* Description: Take one ADC sample, if scan is enabled all channels are sampled */ + +/* Bit 0 : */ +#define SAADC_TASKS_SAMPLE_TASKS_SAMPLE_Pos (0UL) /*!< Position of TASKS_SAMPLE field. */ +#define SAADC_TASKS_SAMPLE_TASKS_SAMPLE_Msk (0x1UL << SAADC_TASKS_SAMPLE_TASKS_SAMPLE_Pos) /*!< Bit mask of TASKS_SAMPLE field. */ + +/* Register: SAADC_TASKS_STOP */ +/* Description: Stop the ADC and terminate any on-going conversion */ + +/* Bit 0 : */ +#define SAADC_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define SAADC_TASKS_STOP_TASKS_STOP_Msk (0x1UL << SAADC_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: SAADC_TASKS_CALIBRATEOFFSET */ +/* Description: Starts offset auto-calibration */ + +/* Bit 0 : */ +#define SAADC_TASKS_CALIBRATEOFFSET_TASKS_CALIBRATEOFFSET_Pos (0UL) /*!< Position of TASKS_CALIBRATEOFFSET field. */ +#define SAADC_TASKS_CALIBRATEOFFSET_TASKS_CALIBRATEOFFSET_Msk (0x1UL << SAADC_TASKS_CALIBRATEOFFSET_TASKS_CALIBRATEOFFSET_Pos) /*!< Bit mask of TASKS_CALIBRATEOFFSET field. */ + +/* Register: SAADC_EVENTS_STARTED */ +/* Description: The ADC has started */ + +/* Bit 0 : */ +#define SAADC_EVENTS_STARTED_EVENTS_STARTED_Pos (0UL) /*!< Position of EVENTS_STARTED field. */ +#define SAADC_EVENTS_STARTED_EVENTS_STARTED_Msk (0x1UL << SAADC_EVENTS_STARTED_EVENTS_STARTED_Pos) /*!< Bit mask of EVENTS_STARTED field. */ + +/* Register: SAADC_EVENTS_END */ +/* Description: The ADC has filled up the Result buffer */ + +/* Bit 0 : */ +#define SAADC_EVENTS_END_EVENTS_END_Pos (0UL) /*!< Position of EVENTS_END field. */ +#define SAADC_EVENTS_END_EVENTS_END_Msk (0x1UL << SAADC_EVENTS_END_EVENTS_END_Pos) /*!< Bit mask of EVENTS_END field. */ + +/* Register: SAADC_EVENTS_DONE */ +/* Description: A conversion task has been completed. Depending on the mode, multiple conversions might be needed for a result to be transferred to RAM. */ + +/* Bit 0 : */ +#define SAADC_EVENTS_DONE_EVENTS_DONE_Pos (0UL) /*!< Position of EVENTS_DONE field. */ +#define SAADC_EVENTS_DONE_EVENTS_DONE_Msk (0x1UL << SAADC_EVENTS_DONE_EVENTS_DONE_Pos) /*!< Bit mask of EVENTS_DONE field. */ + +/* Register: SAADC_EVENTS_RESULTDONE */ +/* Description: A result is ready to get transferred to RAM. */ + +/* Bit 0 : */ +#define SAADC_EVENTS_RESULTDONE_EVENTS_RESULTDONE_Pos (0UL) /*!< Position of EVENTS_RESULTDONE field. */ +#define SAADC_EVENTS_RESULTDONE_EVENTS_RESULTDONE_Msk (0x1UL << SAADC_EVENTS_RESULTDONE_EVENTS_RESULTDONE_Pos) /*!< Bit mask of EVENTS_RESULTDONE field. */ + +/* Register: SAADC_EVENTS_CALIBRATEDONE */ +/* Description: Calibration is complete */ + +/* Bit 0 : */ +#define SAADC_EVENTS_CALIBRATEDONE_EVENTS_CALIBRATEDONE_Pos (0UL) /*!< Position of EVENTS_CALIBRATEDONE field. */ +#define SAADC_EVENTS_CALIBRATEDONE_EVENTS_CALIBRATEDONE_Msk (0x1UL << SAADC_EVENTS_CALIBRATEDONE_EVENTS_CALIBRATEDONE_Pos) /*!< Bit mask of EVENTS_CALIBRATEDONE field. */ + +/* Register: SAADC_EVENTS_STOPPED */ +/* Description: The ADC has stopped */ + +/* Bit 0 : */ +#define SAADC_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */ +#define SAADC_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << SAADC_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */ + +/* Register: SAADC_EVENTS_CH_LIMITH */ +/* Description: Description cluster[0]: Last results is equal or above CH[0].LIMIT.HIGH */ + +/* Bit 0 : */ +#define SAADC_EVENTS_CH_LIMITH_LIMITH_Pos (0UL) /*!< Position of LIMITH field. */ +#define SAADC_EVENTS_CH_LIMITH_LIMITH_Msk (0x1UL << SAADC_EVENTS_CH_LIMITH_LIMITH_Pos) /*!< Bit mask of LIMITH field. */ + +/* Register: SAADC_EVENTS_CH_LIMITL */ +/* Description: Description cluster[0]: Last results is equal or below CH[0].LIMIT.LOW */ + +/* Bit 0 : */ +#define SAADC_EVENTS_CH_LIMITL_LIMITL_Pos (0UL) /*!< Position of LIMITL field. */ +#define SAADC_EVENTS_CH_LIMITL_LIMITL_Msk (0x1UL << SAADC_EVENTS_CH_LIMITL_LIMITL_Pos) /*!< Bit mask of LIMITL field. */ + +/* Register: SAADC_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 21 : Enable or disable interrupt for CH[7].LIMITL event */ +#define SAADC_INTEN_CH7LIMITL_Pos (21UL) /*!< Position of CH7LIMITL field. */ +#define SAADC_INTEN_CH7LIMITL_Msk (0x1UL << SAADC_INTEN_CH7LIMITL_Pos) /*!< Bit mask of CH7LIMITL field. */ +#define SAADC_INTEN_CH7LIMITL_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH7LIMITL_Enabled (1UL) /*!< Enable */ + +/* Bit 20 : Enable or disable interrupt for CH[7].LIMITH event */ +#define SAADC_INTEN_CH7LIMITH_Pos (20UL) /*!< Position of CH7LIMITH field. */ +#define SAADC_INTEN_CH7LIMITH_Msk (0x1UL << SAADC_INTEN_CH7LIMITH_Pos) /*!< Bit mask of CH7LIMITH field. */ +#define SAADC_INTEN_CH7LIMITH_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH7LIMITH_Enabled (1UL) /*!< Enable */ + +/* Bit 19 : Enable or disable interrupt for CH[6].LIMITL event */ +#define SAADC_INTEN_CH6LIMITL_Pos (19UL) /*!< Position of CH6LIMITL field. */ +#define SAADC_INTEN_CH6LIMITL_Msk (0x1UL << SAADC_INTEN_CH6LIMITL_Pos) /*!< Bit mask of CH6LIMITL field. */ +#define SAADC_INTEN_CH6LIMITL_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH6LIMITL_Enabled (1UL) /*!< Enable */ + +/* Bit 18 : Enable or disable interrupt for CH[6].LIMITH event */ +#define SAADC_INTEN_CH6LIMITH_Pos (18UL) /*!< Position of CH6LIMITH field. */ +#define SAADC_INTEN_CH6LIMITH_Msk (0x1UL << SAADC_INTEN_CH6LIMITH_Pos) /*!< Bit mask of CH6LIMITH field. */ +#define SAADC_INTEN_CH6LIMITH_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH6LIMITH_Enabled (1UL) /*!< Enable */ + +/* Bit 17 : Enable or disable interrupt for CH[5].LIMITL event */ +#define SAADC_INTEN_CH5LIMITL_Pos (17UL) /*!< Position of CH5LIMITL field. */ +#define SAADC_INTEN_CH5LIMITL_Msk (0x1UL << SAADC_INTEN_CH5LIMITL_Pos) /*!< Bit mask of CH5LIMITL field. */ +#define SAADC_INTEN_CH5LIMITL_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH5LIMITL_Enabled (1UL) /*!< Enable */ + +/* Bit 16 : Enable or disable interrupt for CH[5].LIMITH event */ +#define SAADC_INTEN_CH5LIMITH_Pos (16UL) /*!< Position of CH5LIMITH field. */ +#define SAADC_INTEN_CH5LIMITH_Msk (0x1UL << SAADC_INTEN_CH5LIMITH_Pos) /*!< Bit mask of CH5LIMITH field. */ +#define SAADC_INTEN_CH5LIMITH_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH5LIMITH_Enabled (1UL) /*!< Enable */ + +/* Bit 15 : Enable or disable interrupt for CH[4].LIMITL event */ +#define SAADC_INTEN_CH4LIMITL_Pos (15UL) /*!< Position of CH4LIMITL field. */ +#define SAADC_INTEN_CH4LIMITL_Msk (0x1UL << SAADC_INTEN_CH4LIMITL_Pos) /*!< Bit mask of CH4LIMITL field. */ +#define SAADC_INTEN_CH4LIMITL_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH4LIMITL_Enabled (1UL) /*!< Enable */ + +/* Bit 14 : Enable or disable interrupt for CH[4].LIMITH event */ +#define SAADC_INTEN_CH4LIMITH_Pos (14UL) /*!< Position of CH4LIMITH field. */ +#define SAADC_INTEN_CH4LIMITH_Msk (0x1UL << SAADC_INTEN_CH4LIMITH_Pos) /*!< Bit mask of CH4LIMITH field. */ +#define SAADC_INTEN_CH4LIMITH_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH4LIMITH_Enabled (1UL) /*!< Enable */ + +/* Bit 13 : Enable or disable interrupt for CH[3].LIMITL event */ +#define SAADC_INTEN_CH3LIMITL_Pos (13UL) /*!< Position of CH3LIMITL field. */ +#define SAADC_INTEN_CH3LIMITL_Msk (0x1UL << SAADC_INTEN_CH3LIMITL_Pos) /*!< Bit mask of CH3LIMITL field. */ +#define SAADC_INTEN_CH3LIMITL_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH3LIMITL_Enabled (1UL) /*!< Enable */ + +/* Bit 12 : Enable or disable interrupt for CH[3].LIMITH event */ +#define SAADC_INTEN_CH3LIMITH_Pos (12UL) /*!< Position of CH3LIMITH field. */ +#define SAADC_INTEN_CH3LIMITH_Msk (0x1UL << SAADC_INTEN_CH3LIMITH_Pos) /*!< Bit mask of CH3LIMITH field. */ +#define SAADC_INTEN_CH3LIMITH_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH3LIMITH_Enabled (1UL) /*!< Enable */ + +/* Bit 11 : Enable or disable interrupt for CH[2].LIMITL event */ +#define SAADC_INTEN_CH2LIMITL_Pos (11UL) /*!< Position of CH2LIMITL field. */ +#define SAADC_INTEN_CH2LIMITL_Msk (0x1UL << SAADC_INTEN_CH2LIMITL_Pos) /*!< Bit mask of CH2LIMITL field. */ +#define SAADC_INTEN_CH2LIMITL_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH2LIMITL_Enabled (1UL) /*!< Enable */ + +/* Bit 10 : Enable or disable interrupt for CH[2].LIMITH event */ +#define SAADC_INTEN_CH2LIMITH_Pos (10UL) /*!< Position of CH2LIMITH field. */ +#define SAADC_INTEN_CH2LIMITH_Msk (0x1UL << SAADC_INTEN_CH2LIMITH_Pos) /*!< Bit mask of CH2LIMITH field. */ +#define SAADC_INTEN_CH2LIMITH_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH2LIMITH_Enabled (1UL) /*!< Enable */ + +/* Bit 9 : Enable or disable interrupt for CH[1].LIMITL event */ +#define SAADC_INTEN_CH1LIMITL_Pos (9UL) /*!< Position of CH1LIMITL field. */ +#define SAADC_INTEN_CH1LIMITL_Msk (0x1UL << SAADC_INTEN_CH1LIMITL_Pos) /*!< Bit mask of CH1LIMITL field. */ +#define SAADC_INTEN_CH1LIMITL_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH1LIMITL_Enabled (1UL) /*!< Enable */ + +/* Bit 8 : Enable or disable interrupt for CH[1].LIMITH event */ +#define SAADC_INTEN_CH1LIMITH_Pos (8UL) /*!< Position of CH1LIMITH field. */ +#define SAADC_INTEN_CH1LIMITH_Msk (0x1UL << SAADC_INTEN_CH1LIMITH_Pos) /*!< Bit mask of CH1LIMITH field. */ +#define SAADC_INTEN_CH1LIMITH_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH1LIMITH_Enabled (1UL) /*!< Enable */ + +/* Bit 7 : Enable or disable interrupt for CH[0].LIMITL event */ +#define SAADC_INTEN_CH0LIMITL_Pos (7UL) /*!< Position of CH0LIMITL field. */ +#define SAADC_INTEN_CH0LIMITL_Msk (0x1UL << SAADC_INTEN_CH0LIMITL_Pos) /*!< Bit mask of CH0LIMITL field. */ +#define SAADC_INTEN_CH0LIMITL_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH0LIMITL_Enabled (1UL) /*!< Enable */ + +/* Bit 6 : Enable or disable interrupt for CH[0].LIMITH event */ +#define SAADC_INTEN_CH0LIMITH_Pos (6UL) /*!< Position of CH0LIMITH field. */ +#define SAADC_INTEN_CH0LIMITH_Msk (0x1UL << SAADC_INTEN_CH0LIMITH_Pos) /*!< Bit mask of CH0LIMITH field. */ +#define SAADC_INTEN_CH0LIMITH_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH0LIMITH_Enabled (1UL) /*!< Enable */ + +/* Bit 5 : Enable or disable interrupt for STOPPED event */ +#define SAADC_INTEN_STOPPED_Pos (5UL) /*!< Position of STOPPED field. */ +#define SAADC_INTEN_STOPPED_Msk (0x1UL << SAADC_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define SAADC_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ + +/* Bit 4 : Enable or disable interrupt for CALIBRATEDONE event */ +#define SAADC_INTEN_CALIBRATEDONE_Pos (4UL) /*!< Position of CALIBRATEDONE field. */ +#define SAADC_INTEN_CALIBRATEDONE_Msk (0x1UL << SAADC_INTEN_CALIBRATEDONE_Pos) /*!< Bit mask of CALIBRATEDONE field. */ +#define SAADC_INTEN_CALIBRATEDONE_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CALIBRATEDONE_Enabled (1UL) /*!< Enable */ + +/* Bit 3 : Enable or disable interrupt for RESULTDONE event */ +#define SAADC_INTEN_RESULTDONE_Pos (3UL) /*!< Position of RESULTDONE field. */ +#define SAADC_INTEN_RESULTDONE_Msk (0x1UL << SAADC_INTEN_RESULTDONE_Pos) /*!< Bit mask of RESULTDONE field. */ +#define SAADC_INTEN_RESULTDONE_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_RESULTDONE_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable interrupt for DONE event */ +#define SAADC_INTEN_DONE_Pos (2UL) /*!< Position of DONE field. */ +#define SAADC_INTEN_DONE_Msk (0x1UL << SAADC_INTEN_DONE_Pos) /*!< Bit mask of DONE field. */ +#define SAADC_INTEN_DONE_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_DONE_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for END event */ +#define SAADC_INTEN_END_Pos (1UL) /*!< Position of END field. */ +#define SAADC_INTEN_END_Msk (0x1UL << SAADC_INTEN_END_Pos) /*!< Bit mask of END field. */ +#define SAADC_INTEN_END_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_END_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable interrupt for STARTED event */ +#define SAADC_INTEN_STARTED_Pos (0UL) /*!< Position of STARTED field. */ +#define SAADC_INTEN_STARTED_Msk (0x1UL << SAADC_INTEN_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define SAADC_INTEN_STARTED_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_STARTED_Enabled (1UL) /*!< Enable */ + +/* Register: SAADC_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 21 : Write '1' to Enable interrupt for CH[7].LIMITL event */ +#define SAADC_INTENSET_CH7LIMITL_Pos (21UL) /*!< Position of CH7LIMITL field. */ +#define SAADC_INTENSET_CH7LIMITL_Msk (0x1UL << SAADC_INTENSET_CH7LIMITL_Pos) /*!< Bit mask of CH7LIMITL field. */ +#define SAADC_INTENSET_CH7LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH7LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH7LIMITL_Set (1UL) /*!< Enable */ + +/* Bit 20 : Write '1' to Enable interrupt for CH[7].LIMITH event */ +#define SAADC_INTENSET_CH7LIMITH_Pos (20UL) /*!< Position of CH7LIMITH field. */ +#define SAADC_INTENSET_CH7LIMITH_Msk (0x1UL << SAADC_INTENSET_CH7LIMITH_Pos) /*!< Bit mask of CH7LIMITH field. */ +#define SAADC_INTENSET_CH7LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH7LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH7LIMITH_Set (1UL) /*!< Enable */ + +/* Bit 19 : Write '1' to Enable interrupt for CH[6].LIMITL event */ +#define SAADC_INTENSET_CH6LIMITL_Pos (19UL) /*!< Position of CH6LIMITL field. */ +#define SAADC_INTENSET_CH6LIMITL_Msk (0x1UL << SAADC_INTENSET_CH6LIMITL_Pos) /*!< Bit mask of CH6LIMITL field. */ +#define SAADC_INTENSET_CH6LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH6LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH6LIMITL_Set (1UL) /*!< Enable */ + +/* Bit 18 : Write '1' to Enable interrupt for CH[6].LIMITH event */ +#define SAADC_INTENSET_CH6LIMITH_Pos (18UL) /*!< Position of CH6LIMITH field. */ +#define SAADC_INTENSET_CH6LIMITH_Msk (0x1UL << SAADC_INTENSET_CH6LIMITH_Pos) /*!< Bit mask of CH6LIMITH field. */ +#define SAADC_INTENSET_CH6LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH6LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH6LIMITH_Set (1UL) /*!< Enable */ + +/* Bit 17 : Write '1' to Enable interrupt for CH[5].LIMITL event */ +#define SAADC_INTENSET_CH5LIMITL_Pos (17UL) /*!< Position of CH5LIMITL field. */ +#define SAADC_INTENSET_CH5LIMITL_Msk (0x1UL << SAADC_INTENSET_CH5LIMITL_Pos) /*!< Bit mask of CH5LIMITL field. */ +#define SAADC_INTENSET_CH5LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH5LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH5LIMITL_Set (1UL) /*!< Enable */ + +/* Bit 16 : Write '1' to Enable interrupt for CH[5].LIMITH event */ +#define SAADC_INTENSET_CH5LIMITH_Pos (16UL) /*!< Position of CH5LIMITH field. */ +#define SAADC_INTENSET_CH5LIMITH_Msk (0x1UL << SAADC_INTENSET_CH5LIMITH_Pos) /*!< Bit mask of CH5LIMITH field. */ +#define SAADC_INTENSET_CH5LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH5LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH5LIMITH_Set (1UL) /*!< Enable */ + +/* Bit 15 : Write '1' to Enable interrupt for CH[4].LIMITL event */ +#define SAADC_INTENSET_CH4LIMITL_Pos (15UL) /*!< Position of CH4LIMITL field. */ +#define SAADC_INTENSET_CH4LIMITL_Msk (0x1UL << SAADC_INTENSET_CH4LIMITL_Pos) /*!< Bit mask of CH4LIMITL field. */ +#define SAADC_INTENSET_CH4LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH4LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH4LIMITL_Set (1UL) /*!< Enable */ + +/* Bit 14 : Write '1' to Enable interrupt for CH[4].LIMITH event */ +#define SAADC_INTENSET_CH4LIMITH_Pos (14UL) /*!< Position of CH4LIMITH field. */ +#define SAADC_INTENSET_CH4LIMITH_Msk (0x1UL << SAADC_INTENSET_CH4LIMITH_Pos) /*!< Bit mask of CH4LIMITH field. */ +#define SAADC_INTENSET_CH4LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH4LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH4LIMITH_Set (1UL) /*!< Enable */ + +/* Bit 13 : Write '1' to Enable interrupt for CH[3].LIMITL event */ +#define SAADC_INTENSET_CH3LIMITL_Pos (13UL) /*!< Position of CH3LIMITL field. */ +#define SAADC_INTENSET_CH3LIMITL_Msk (0x1UL << SAADC_INTENSET_CH3LIMITL_Pos) /*!< Bit mask of CH3LIMITL field. */ +#define SAADC_INTENSET_CH3LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH3LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH3LIMITL_Set (1UL) /*!< Enable */ + +/* Bit 12 : Write '1' to Enable interrupt for CH[3].LIMITH event */ +#define SAADC_INTENSET_CH3LIMITH_Pos (12UL) /*!< Position of CH3LIMITH field. */ +#define SAADC_INTENSET_CH3LIMITH_Msk (0x1UL << SAADC_INTENSET_CH3LIMITH_Pos) /*!< Bit mask of CH3LIMITH field. */ +#define SAADC_INTENSET_CH3LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH3LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH3LIMITH_Set (1UL) /*!< Enable */ + +/* Bit 11 : Write '1' to Enable interrupt for CH[2].LIMITL event */ +#define SAADC_INTENSET_CH2LIMITL_Pos (11UL) /*!< Position of CH2LIMITL field. */ +#define SAADC_INTENSET_CH2LIMITL_Msk (0x1UL << SAADC_INTENSET_CH2LIMITL_Pos) /*!< Bit mask of CH2LIMITL field. */ +#define SAADC_INTENSET_CH2LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH2LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH2LIMITL_Set (1UL) /*!< Enable */ + +/* Bit 10 : Write '1' to Enable interrupt for CH[2].LIMITH event */ +#define SAADC_INTENSET_CH2LIMITH_Pos (10UL) /*!< Position of CH2LIMITH field. */ +#define SAADC_INTENSET_CH2LIMITH_Msk (0x1UL << SAADC_INTENSET_CH2LIMITH_Pos) /*!< Bit mask of CH2LIMITH field. */ +#define SAADC_INTENSET_CH2LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH2LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH2LIMITH_Set (1UL) /*!< Enable */ + +/* Bit 9 : Write '1' to Enable interrupt for CH[1].LIMITL event */ +#define SAADC_INTENSET_CH1LIMITL_Pos (9UL) /*!< Position of CH1LIMITL field. */ +#define SAADC_INTENSET_CH1LIMITL_Msk (0x1UL << SAADC_INTENSET_CH1LIMITL_Pos) /*!< Bit mask of CH1LIMITL field. */ +#define SAADC_INTENSET_CH1LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH1LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH1LIMITL_Set (1UL) /*!< Enable */ + +/* Bit 8 : Write '1' to Enable interrupt for CH[1].LIMITH event */ +#define SAADC_INTENSET_CH1LIMITH_Pos (8UL) /*!< Position of CH1LIMITH field. */ +#define SAADC_INTENSET_CH1LIMITH_Msk (0x1UL << SAADC_INTENSET_CH1LIMITH_Pos) /*!< Bit mask of CH1LIMITH field. */ +#define SAADC_INTENSET_CH1LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH1LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH1LIMITH_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to Enable interrupt for CH[0].LIMITL event */ +#define SAADC_INTENSET_CH0LIMITL_Pos (7UL) /*!< Position of CH0LIMITL field. */ +#define SAADC_INTENSET_CH0LIMITL_Msk (0x1UL << SAADC_INTENSET_CH0LIMITL_Pos) /*!< Bit mask of CH0LIMITL field. */ +#define SAADC_INTENSET_CH0LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH0LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH0LIMITL_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to Enable interrupt for CH[0].LIMITH event */ +#define SAADC_INTENSET_CH0LIMITH_Pos (6UL) /*!< Position of CH0LIMITH field. */ +#define SAADC_INTENSET_CH0LIMITH_Msk (0x1UL << SAADC_INTENSET_CH0LIMITH_Pos) /*!< Bit mask of CH0LIMITH field. */ +#define SAADC_INTENSET_CH0LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH0LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH0LIMITH_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to Enable interrupt for STOPPED event */ +#define SAADC_INTENSET_STOPPED_Pos (5UL) /*!< Position of STOPPED field. */ +#define SAADC_INTENSET_STOPPED_Msk (0x1UL << SAADC_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define SAADC_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to Enable interrupt for CALIBRATEDONE event */ +#define SAADC_INTENSET_CALIBRATEDONE_Pos (4UL) /*!< Position of CALIBRATEDONE field. */ +#define SAADC_INTENSET_CALIBRATEDONE_Msk (0x1UL << SAADC_INTENSET_CALIBRATEDONE_Pos) /*!< Bit mask of CALIBRATEDONE field. */ +#define SAADC_INTENSET_CALIBRATEDONE_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CALIBRATEDONE_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CALIBRATEDONE_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to Enable interrupt for RESULTDONE event */ +#define SAADC_INTENSET_RESULTDONE_Pos (3UL) /*!< Position of RESULTDONE field. */ +#define SAADC_INTENSET_RESULTDONE_Msk (0x1UL << SAADC_INTENSET_RESULTDONE_Pos) /*!< Bit mask of RESULTDONE field. */ +#define SAADC_INTENSET_RESULTDONE_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_RESULTDONE_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_RESULTDONE_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable interrupt for DONE event */ +#define SAADC_INTENSET_DONE_Pos (2UL) /*!< Position of DONE field. */ +#define SAADC_INTENSET_DONE_Msk (0x1UL << SAADC_INTENSET_DONE_Pos) /*!< Bit mask of DONE field. */ +#define SAADC_INTENSET_DONE_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_DONE_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_DONE_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for END event */ +#define SAADC_INTENSET_END_Pos (1UL) /*!< Position of END field. */ +#define SAADC_INTENSET_END_Msk (0x1UL << SAADC_INTENSET_END_Pos) /*!< Bit mask of END field. */ +#define SAADC_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_END_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for STARTED event */ +#define SAADC_INTENSET_STARTED_Pos (0UL) /*!< Position of STARTED field. */ +#define SAADC_INTENSET_STARTED_Msk (0x1UL << SAADC_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define SAADC_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_STARTED_Set (1UL) /*!< Enable */ + +/* Register: SAADC_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 21 : Write '1' to Disable interrupt for CH[7].LIMITL event */ +#define SAADC_INTENCLR_CH7LIMITL_Pos (21UL) /*!< Position of CH7LIMITL field. */ +#define SAADC_INTENCLR_CH7LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH7LIMITL_Pos) /*!< Bit mask of CH7LIMITL field. */ +#define SAADC_INTENCLR_CH7LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH7LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH7LIMITL_Clear (1UL) /*!< Disable */ + +/* Bit 20 : Write '1' to Disable interrupt for CH[7].LIMITH event */ +#define SAADC_INTENCLR_CH7LIMITH_Pos (20UL) /*!< Position of CH7LIMITH field. */ +#define SAADC_INTENCLR_CH7LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH7LIMITH_Pos) /*!< Bit mask of CH7LIMITH field. */ +#define SAADC_INTENCLR_CH7LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH7LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH7LIMITH_Clear (1UL) /*!< Disable */ + +/* Bit 19 : Write '1' to Disable interrupt for CH[6].LIMITL event */ +#define SAADC_INTENCLR_CH6LIMITL_Pos (19UL) /*!< Position of CH6LIMITL field. */ +#define SAADC_INTENCLR_CH6LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH6LIMITL_Pos) /*!< Bit mask of CH6LIMITL field. */ +#define SAADC_INTENCLR_CH6LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH6LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH6LIMITL_Clear (1UL) /*!< Disable */ + +/* Bit 18 : Write '1' to Disable interrupt for CH[6].LIMITH event */ +#define SAADC_INTENCLR_CH6LIMITH_Pos (18UL) /*!< Position of CH6LIMITH field. */ +#define SAADC_INTENCLR_CH6LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH6LIMITH_Pos) /*!< Bit mask of CH6LIMITH field. */ +#define SAADC_INTENCLR_CH6LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH6LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH6LIMITH_Clear (1UL) /*!< Disable */ + +/* Bit 17 : Write '1' to Disable interrupt for CH[5].LIMITL event */ +#define SAADC_INTENCLR_CH5LIMITL_Pos (17UL) /*!< Position of CH5LIMITL field. */ +#define SAADC_INTENCLR_CH5LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH5LIMITL_Pos) /*!< Bit mask of CH5LIMITL field. */ +#define SAADC_INTENCLR_CH5LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH5LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH5LIMITL_Clear (1UL) /*!< Disable */ + +/* Bit 16 : Write '1' to Disable interrupt for CH[5].LIMITH event */ +#define SAADC_INTENCLR_CH5LIMITH_Pos (16UL) /*!< Position of CH5LIMITH field. */ +#define SAADC_INTENCLR_CH5LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH5LIMITH_Pos) /*!< Bit mask of CH5LIMITH field. */ +#define SAADC_INTENCLR_CH5LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH5LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH5LIMITH_Clear (1UL) /*!< Disable */ + +/* Bit 15 : Write '1' to Disable interrupt for CH[4].LIMITL event */ +#define SAADC_INTENCLR_CH4LIMITL_Pos (15UL) /*!< Position of CH4LIMITL field. */ +#define SAADC_INTENCLR_CH4LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH4LIMITL_Pos) /*!< Bit mask of CH4LIMITL field. */ +#define SAADC_INTENCLR_CH4LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH4LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH4LIMITL_Clear (1UL) /*!< Disable */ + +/* Bit 14 : Write '1' to Disable interrupt for CH[4].LIMITH event */ +#define SAADC_INTENCLR_CH4LIMITH_Pos (14UL) /*!< Position of CH4LIMITH field. */ +#define SAADC_INTENCLR_CH4LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH4LIMITH_Pos) /*!< Bit mask of CH4LIMITH field. */ +#define SAADC_INTENCLR_CH4LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH4LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH4LIMITH_Clear (1UL) /*!< Disable */ + +/* Bit 13 : Write '1' to Disable interrupt for CH[3].LIMITL event */ +#define SAADC_INTENCLR_CH3LIMITL_Pos (13UL) /*!< Position of CH3LIMITL field. */ +#define SAADC_INTENCLR_CH3LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH3LIMITL_Pos) /*!< Bit mask of CH3LIMITL field. */ +#define SAADC_INTENCLR_CH3LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH3LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH3LIMITL_Clear (1UL) /*!< Disable */ + +/* Bit 12 : Write '1' to Disable interrupt for CH[3].LIMITH event */ +#define SAADC_INTENCLR_CH3LIMITH_Pos (12UL) /*!< Position of CH3LIMITH field. */ +#define SAADC_INTENCLR_CH3LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH3LIMITH_Pos) /*!< Bit mask of CH3LIMITH field. */ +#define SAADC_INTENCLR_CH3LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH3LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH3LIMITH_Clear (1UL) /*!< Disable */ + +/* Bit 11 : Write '1' to Disable interrupt for CH[2].LIMITL event */ +#define SAADC_INTENCLR_CH2LIMITL_Pos (11UL) /*!< Position of CH2LIMITL field. */ +#define SAADC_INTENCLR_CH2LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH2LIMITL_Pos) /*!< Bit mask of CH2LIMITL field. */ +#define SAADC_INTENCLR_CH2LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH2LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH2LIMITL_Clear (1UL) /*!< Disable */ + +/* Bit 10 : Write '1' to Disable interrupt for CH[2].LIMITH event */ +#define SAADC_INTENCLR_CH2LIMITH_Pos (10UL) /*!< Position of CH2LIMITH field. */ +#define SAADC_INTENCLR_CH2LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH2LIMITH_Pos) /*!< Bit mask of CH2LIMITH field. */ +#define SAADC_INTENCLR_CH2LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH2LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH2LIMITH_Clear (1UL) /*!< Disable */ + +/* Bit 9 : Write '1' to Disable interrupt for CH[1].LIMITL event */ +#define SAADC_INTENCLR_CH1LIMITL_Pos (9UL) /*!< Position of CH1LIMITL field. */ +#define SAADC_INTENCLR_CH1LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH1LIMITL_Pos) /*!< Bit mask of CH1LIMITL field. */ +#define SAADC_INTENCLR_CH1LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH1LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH1LIMITL_Clear (1UL) /*!< Disable */ + +/* Bit 8 : Write '1' to Disable interrupt for CH[1].LIMITH event */ +#define SAADC_INTENCLR_CH1LIMITH_Pos (8UL) /*!< Position of CH1LIMITH field. */ +#define SAADC_INTENCLR_CH1LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH1LIMITH_Pos) /*!< Bit mask of CH1LIMITH field. */ +#define SAADC_INTENCLR_CH1LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH1LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH1LIMITH_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to Disable interrupt for CH[0].LIMITL event */ +#define SAADC_INTENCLR_CH0LIMITL_Pos (7UL) /*!< Position of CH0LIMITL field. */ +#define SAADC_INTENCLR_CH0LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH0LIMITL_Pos) /*!< Bit mask of CH0LIMITL field. */ +#define SAADC_INTENCLR_CH0LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH0LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH0LIMITL_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to Disable interrupt for CH[0].LIMITH event */ +#define SAADC_INTENCLR_CH0LIMITH_Pos (6UL) /*!< Position of CH0LIMITH field. */ +#define SAADC_INTENCLR_CH0LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH0LIMITH_Pos) /*!< Bit mask of CH0LIMITH field. */ +#define SAADC_INTENCLR_CH0LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH0LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH0LIMITH_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to Disable interrupt for STOPPED event */ +#define SAADC_INTENCLR_STOPPED_Pos (5UL) /*!< Position of STOPPED field. */ +#define SAADC_INTENCLR_STOPPED_Msk (0x1UL << SAADC_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define SAADC_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to Disable interrupt for CALIBRATEDONE event */ +#define SAADC_INTENCLR_CALIBRATEDONE_Pos (4UL) /*!< Position of CALIBRATEDONE field. */ +#define SAADC_INTENCLR_CALIBRATEDONE_Msk (0x1UL << SAADC_INTENCLR_CALIBRATEDONE_Pos) /*!< Bit mask of CALIBRATEDONE field. */ +#define SAADC_INTENCLR_CALIBRATEDONE_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CALIBRATEDONE_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CALIBRATEDONE_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to Disable interrupt for RESULTDONE event */ +#define SAADC_INTENCLR_RESULTDONE_Pos (3UL) /*!< Position of RESULTDONE field. */ +#define SAADC_INTENCLR_RESULTDONE_Msk (0x1UL << SAADC_INTENCLR_RESULTDONE_Pos) /*!< Bit mask of RESULTDONE field. */ +#define SAADC_INTENCLR_RESULTDONE_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_RESULTDONE_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_RESULTDONE_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable interrupt for DONE event */ +#define SAADC_INTENCLR_DONE_Pos (2UL) /*!< Position of DONE field. */ +#define SAADC_INTENCLR_DONE_Msk (0x1UL << SAADC_INTENCLR_DONE_Pos) /*!< Bit mask of DONE field. */ +#define SAADC_INTENCLR_DONE_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_DONE_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_DONE_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for END event */ +#define SAADC_INTENCLR_END_Pos (1UL) /*!< Position of END field. */ +#define SAADC_INTENCLR_END_Msk (0x1UL << SAADC_INTENCLR_END_Pos) /*!< Bit mask of END field. */ +#define SAADC_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_END_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for STARTED event */ +#define SAADC_INTENCLR_STARTED_Pos (0UL) /*!< Position of STARTED field. */ +#define SAADC_INTENCLR_STARTED_Msk (0x1UL << SAADC_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define SAADC_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_STARTED_Clear (1UL) /*!< Disable */ + +/* Register: SAADC_STATUS */ +/* Description: Status */ + +/* Bit 0 : Status */ +#define SAADC_STATUS_STATUS_Pos (0UL) /*!< Position of STATUS field. */ +#define SAADC_STATUS_STATUS_Msk (0x1UL << SAADC_STATUS_STATUS_Pos) /*!< Bit mask of STATUS field. */ +#define SAADC_STATUS_STATUS_Ready (0UL) /*!< ADC is ready. No on-going conversion. */ +#define SAADC_STATUS_STATUS_Busy (1UL) /*!< ADC is busy. Conversion in progress. */ + +/* Register: SAADC_ENABLE */ +/* Description: Enable or disable ADC */ + +/* Bit 0 : Enable or disable ADC */ +#define SAADC_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define SAADC_ENABLE_ENABLE_Msk (0x1UL << SAADC_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define SAADC_ENABLE_ENABLE_Disabled (0UL) /*!< Disable ADC */ +#define SAADC_ENABLE_ENABLE_Enabled (1UL) /*!< Enable ADC */ + +/* Register: SAADC_CH_PSELP */ +/* Description: Description cluster[0]: Input positive pin selection for CH[0] */ + +/* Bits 4..0 : Analog positive input channel */ +#define SAADC_CH_PSELP_PSELP_Pos (0UL) /*!< Position of PSELP field. */ +#define SAADC_CH_PSELP_PSELP_Msk (0x1FUL << SAADC_CH_PSELP_PSELP_Pos) /*!< Bit mask of PSELP field. */ +#define SAADC_CH_PSELP_PSELP_NC (0UL) /*!< Not connected */ +#define SAADC_CH_PSELP_PSELP_AnalogInput0 (1UL) /*!< AIN0 */ +#define SAADC_CH_PSELP_PSELP_AnalogInput1 (2UL) /*!< AIN1 */ +#define SAADC_CH_PSELP_PSELP_AnalogInput2 (3UL) /*!< AIN2 */ +#define SAADC_CH_PSELP_PSELP_AnalogInput3 (4UL) /*!< AIN3 */ +#define SAADC_CH_PSELP_PSELP_AnalogInput4 (5UL) /*!< AIN4 */ +#define SAADC_CH_PSELP_PSELP_AnalogInput5 (6UL) /*!< AIN5 */ +#define SAADC_CH_PSELP_PSELP_AnalogInput6 (7UL) /*!< AIN6 */ +#define SAADC_CH_PSELP_PSELP_AnalogInput7 (8UL) /*!< AIN7 */ +#define SAADC_CH_PSELP_PSELP_VDD (9UL) /*!< VDD */ + +/* Register: SAADC_CH_PSELN */ +/* Description: Description cluster[0]: Input negative pin selection for CH[0] */ + +/* Bits 4..0 : Analog negative input, enables differential channel */ +#define SAADC_CH_PSELN_PSELN_Pos (0UL) /*!< Position of PSELN field. */ +#define SAADC_CH_PSELN_PSELN_Msk (0x1FUL << SAADC_CH_PSELN_PSELN_Pos) /*!< Bit mask of PSELN field. */ +#define SAADC_CH_PSELN_PSELN_NC (0UL) /*!< Not connected */ +#define SAADC_CH_PSELN_PSELN_AnalogInput0 (1UL) /*!< AIN0 */ +#define SAADC_CH_PSELN_PSELN_AnalogInput1 (2UL) /*!< AIN1 */ +#define SAADC_CH_PSELN_PSELN_AnalogInput2 (3UL) /*!< AIN2 */ +#define SAADC_CH_PSELN_PSELN_AnalogInput3 (4UL) /*!< AIN3 */ +#define SAADC_CH_PSELN_PSELN_AnalogInput4 (5UL) /*!< AIN4 */ +#define SAADC_CH_PSELN_PSELN_AnalogInput5 (6UL) /*!< AIN5 */ +#define SAADC_CH_PSELN_PSELN_AnalogInput6 (7UL) /*!< AIN6 */ +#define SAADC_CH_PSELN_PSELN_AnalogInput7 (8UL) /*!< AIN7 */ +#define SAADC_CH_PSELN_PSELN_VDD (9UL) /*!< VDD */ + +/* Register: SAADC_CH_CONFIG */ +/* Description: Description cluster[0]: Input configuration for CH[0] */ + +/* Bit 24 : Enable burst mode */ +#define SAADC_CH_CONFIG_BURST_Pos (24UL) /*!< Position of BURST field. */ +#define SAADC_CH_CONFIG_BURST_Msk (0x1UL << SAADC_CH_CONFIG_BURST_Pos) /*!< Bit mask of BURST field. */ +#define SAADC_CH_CONFIG_BURST_Disabled (0UL) /*!< Burst mode is disabled (normal operation) */ +#define SAADC_CH_CONFIG_BURST_Enabled (1UL) /*!< Burst mode is enabled. SAADC takes 2^OVERSAMPLE number of samples as fast as it can, and sends the average to Data RAM. */ + +/* Bit 20 : Enable differential mode */ +#define SAADC_CH_CONFIG_MODE_Pos (20UL) /*!< Position of MODE field. */ +#define SAADC_CH_CONFIG_MODE_Msk (0x1UL << SAADC_CH_CONFIG_MODE_Pos) /*!< Bit mask of MODE field. */ +#define SAADC_CH_CONFIG_MODE_SE (0UL) /*!< Single ended, PSELN will be ignored, negative input to ADC shorted to GND */ +#define SAADC_CH_CONFIG_MODE_Diff (1UL) /*!< Differential */ + +/* Bits 18..16 : Acquisition time, the time the ADC uses to sample the input voltage */ +#define SAADC_CH_CONFIG_TACQ_Pos (16UL) /*!< Position of TACQ field. */ +#define SAADC_CH_CONFIG_TACQ_Msk (0x7UL << SAADC_CH_CONFIG_TACQ_Pos) /*!< Bit mask of TACQ field. */ +#define SAADC_CH_CONFIG_TACQ_3us (0UL) /*!< 3 us */ +#define SAADC_CH_CONFIG_TACQ_5us (1UL) /*!< 5 us */ +#define SAADC_CH_CONFIG_TACQ_10us (2UL) /*!< 10 us */ +#define SAADC_CH_CONFIG_TACQ_15us (3UL) /*!< 15 us */ +#define SAADC_CH_CONFIG_TACQ_20us (4UL) /*!< 20 us */ +#define SAADC_CH_CONFIG_TACQ_40us (5UL) /*!< 40 us */ + +/* Bit 12 : Reference control */ +#define SAADC_CH_CONFIG_REFSEL_Pos (12UL) /*!< Position of REFSEL field. */ +#define SAADC_CH_CONFIG_REFSEL_Msk (0x1UL << SAADC_CH_CONFIG_REFSEL_Pos) /*!< Bit mask of REFSEL field. */ +#define SAADC_CH_CONFIG_REFSEL_Internal (0UL) /*!< Internal reference (0.6 V) */ +#define SAADC_CH_CONFIG_REFSEL_VDD1_4 (1UL) /*!< VDD/4 as reference */ + +/* Bits 10..8 : Gain control */ +#define SAADC_CH_CONFIG_GAIN_Pos (8UL) /*!< Position of GAIN field. */ +#define SAADC_CH_CONFIG_GAIN_Msk (0x7UL << SAADC_CH_CONFIG_GAIN_Pos) /*!< Bit mask of GAIN field. */ +#define SAADC_CH_CONFIG_GAIN_Gain1_6 (0UL) /*!< 1/6 */ +#define SAADC_CH_CONFIG_GAIN_Gain1_5 (1UL) /*!< 1/5 */ +#define SAADC_CH_CONFIG_GAIN_Gain1_4 (2UL) /*!< 1/4 */ +#define SAADC_CH_CONFIG_GAIN_Gain1_3 (3UL) /*!< 1/3 */ +#define SAADC_CH_CONFIG_GAIN_Gain1_2 (4UL) /*!< 1/2 */ +#define SAADC_CH_CONFIG_GAIN_Gain1 (5UL) /*!< 1 */ +#define SAADC_CH_CONFIG_GAIN_Gain2 (6UL) /*!< 2 */ +#define SAADC_CH_CONFIG_GAIN_Gain4 (7UL) /*!< 4 */ + +/* Bits 5..4 : Negative channel resistor control */ +#define SAADC_CH_CONFIG_RESN_Pos (4UL) /*!< Position of RESN field. */ +#define SAADC_CH_CONFIG_RESN_Msk (0x3UL << SAADC_CH_CONFIG_RESN_Pos) /*!< Bit mask of RESN field. */ +#define SAADC_CH_CONFIG_RESN_Bypass (0UL) /*!< Bypass resistor ladder */ +#define SAADC_CH_CONFIG_RESN_Pulldown (1UL) /*!< Pull-down to GND */ +#define SAADC_CH_CONFIG_RESN_Pullup (2UL) /*!< Pull-up to VDD */ +#define SAADC_CH_CONFIG_RESN_VDD1_2 (3UL) /*!< Set input at VDD/2 */ + +/* Bits 1..0 : Positive channel resistor control */ +#define SAADC_CH_CONFIG_RESP_Pos (0UL) /*!< Position of RESP field. */ +#define SAADC_CH_CONFIG_RESP_Msk (0x3UL << SAADC_CH_CONFIG_RESP_Pos) /*!< Bit mask of RESP field. */ +#define SAADC_CH_CONFIG_RESP_Bypass (0UL) /*!< Bypass resistor ladder */ +#define SAADC_CH_CONFIG_RESP_Pulldown (1UL) /*!< Pull-down to GND */ +#define SAADC_CH_CONFIG_RESP_Pullup (2UL) /*!< Pull-up to VDD */ +#define SAADC_CH_CONFIG_RESP_VDD1_2 (3UL) /*!< Set input at VDD/2 */ + +/* Register: SAADC_CH_LIMIT */ +/* Description: Description cluster[0]: High/low limits for event monitoring a channel */ + +/* Bits 31..16 : High level limit */ +#define SAADC_CH_LIMIT_HIGH_Pos (16UL) /*!< Position of HIGH field. */ +#define SAADC_CH_LIMIT_HIGH_Msk (0xFFFFUL << SAADC_CH_LIMIT_HIGH_Pos) /*!< Bit mask of HIGH field. */ + +/* Bits 15..0 : Low level limit */ +#define SAADC_CH_LIMIT_LOW_Pos (0UL) /*!< Position of LOW field. */ +#define SAADC_CH_LIMIT_LOW_Msk (0xFFFFUL << SAADC_CH_LIMIT_LOW_Pos) /*!< Bit mask of LOW field. */ + +/* Register: SAADC_RESOLUTION */ +/* Description: Resolution configuration */ + +/* Bits 2..0 : Set the resolution */ +#define SAADC_RESOLUTION_VAL_Pos (0UL) /*!< Position of VAL field. */ +#define SAADC_RESOLUTION_VAL_Msk (0x7UL << SAADC_RESOLUTION_VAL_Pos) /*!< Bit mask of VAL field. */ +#define SAADC_RESOLUTION_VAL_8bit (0UL) /*!< 8 bit */ +#define SAADC_RESOLUTION_VAL_10bit (1UL) /*!< 10 bit */ +#define SAADC_RESOLUTION_VAL_12bit (2UL) /*!< 12 bit */ +#define SAADC_RESOLUTION_VAL_14bit (3UL) /*!< 14 bit */ + +/* Register: SAADC_OVERSAMPLE */ +/* Description: Oversampling configuration. OVERSAMPLE should not be combined with SCAN. The RESOLUTION is applied before averaging, thus for high OVERSAMPLE a higher RESOLUTION should be used. */ + +/* Bits 3..0 : Oversample control */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Pos (0UL) /*!< Position of OVERSAMPLE field. */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Msk (0xFUL << SAADC_OVERSAMPLE_OVERSAMPLE_Pos) /*!< Bit mask of OVERSAMPLE field. */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Bypass (0UL) /*!< Bypass oversampling */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Over2x (1UL) /*!< Oversample 2x */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Over4x (2UL) /*!< Oversample 4x */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Over8x (3UL) /*!< Oversample 8x */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Over16x (4UL) /*!< Oversample 16x */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Over32x (5UL) /*!< Oversample 32x */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Over64x (6UL) /*!< Oversample 64x */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Over128x (7UL) /*!< Oversample 128x */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Over256x (8UL) /*!< Oversample 256x */ + +/* Register: SAADC_SAMPLERATE */ +/* Description: Controls normal or continuous sample rate */ + +/* Bit 12 : Select mode for sample rate control */ +#define SAADC_SAMPLERATE_MODE_Pos (12UL) /*!< Position of MODE field. */ +#define SAADC_SAMPLERATE_MODE_Msk (0x1UL << SAADC_SAMPLERATE_MODE_Pos) /*!< Bit mask of MODE field. */ +#define SAADC_SAMPLERATE_MODE_Task (0UL) /*!< Rate is controlled from SAMPLE task */ +#define SAADC_SAMPLERATE_MODE_Timers (1UL) /*!< Rate is controlled from local timer (use CC to control the rate) */ + +/* Bits 10..0 : Capture and compare value. Sample rate is 16 MHz/CC */ +#define SAADC_SAMPLERATE_CC_Pos (0UL) /*!< Position of CC field. */ +#define SAADC_SAMPLERATE_CC_Msk (0x7FFUL << SAADC_SAMPLERATE_CC_Pos) /*!< Bit mask of CC field. */ + +/* Register: SAADC_RESULT_PTR */ +/* Description: Data pointer */ + +/* Bits 31..0 : Data pointer */ +#define SAADC_RESULT_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define SAADC_RESULT_PTR_PTR_Msk (0xFFFFFFFFUL << SAADC_RESULT_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: SAADC_RESULT_MAXCNT */ +/* Description: Maximum number of buffer words to transfer */ + +/* Bits 14..0 : Maximum number of buffer words to transfer */ +#define SAADC_RESULT_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define SAADC_RESULT_MAXCNT_MAXCNT_Msk (0x7FFFUL << SAADC_RESULT_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: SAADC_RESULT_AMOUNT */ +/* Description: Number of buffer words transferred since last START */ + +/* Bits 14..0 : Number of buffer words transferred since last START. This register can be read after an END or STOPPED event. */ +#define SAADC_RESULT_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define SAADC_RESULT_AMOUNT_AMOUNT_Msk (0x7FFFUL << SAADC_RESULT_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + + +/* Peripheral: SPIM */ +/* Description: Serial Peripheral Interface Master with EasyDMA */ + +/* Register: SPIM_TASKS_START */ +/* Description: Start SPI transaction */ + +/* Bit 0 : */ +#define SPIM_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define SPIM_TASKS_START_TASKS_START_Msk (0x1UL << SPIM_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: SPIM_TASKS_STOP */ +/* Description: Stop SPI transaction */ + +/* Bit 0 : */ +#define SPIM_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define SPIM_TASKS_STOP_TASKS_STOP_Msk (0x1UL << SPIM_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: SPIM_TASKS_SUSPEND */ +/* Description: Suspend SPI transaction */ + +/* Bit 0 : */ +#define SPIM_TASKS_SUSPEND_TASKS_SUSPEND_Pos (0UL) /*!< Position of TASKS_SUSPEND field. */ +#define SPIM_TASKS_SUSPEND_TASKS_SUSPEND_Msk (0x1UL << SPIM_TASKS_SUSPEND_TASKS_SUSPEND_Pos) /*!< Bit mask of TASKS_SUSPEND field. */ + +/* Register: SPIM_TASKS_RESUME */ +/* Description: Resume SPI transaction */ + +/* Bit 0 : */ +#define SPIM_TASKS_RESUME_TASKS_RESUME_Pos (0UL) /*!< Position of TASKS_RESUME field. */ +#define SPIM_TASKS_RESUME_TASKS_RESUME_Msk (0x1UL << SPIM_TASKS_RESUME_TASKS_RESUME_Pos) /*!< Bit mask of TASKS_RESUME field. */ + +/* Register: SPIM_EVENTS_STOPPED */ +/* Description: SPI transaction has stopped */ + +/* Bit 0 : */ +#define SPIM_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */ +#define SPIM_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << SPIM_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */ + +/* Register: SPIM_EVENTS_ENDRX */ +/* Description: End of RXD buffer reached */ + +/* Bit 0 : */ +#define SPIM_EVENTS_ENDRX_EVENTS_ENDRX_Pos (0UL) /*!< Position of EVENTS_ENDRX field. */ +#define SPIM_EVENTS_ENDRX_EVENTS_ENDRX_Msk (0x1UL << SPIM_EVENTS_ENDRX_EVENTS_ENDRX_Pos) /*!< Bit mask of EVENTS_ENDRX field. */ + +/* Register: SPIM_EVENTS_END */ +/* Description: End of RXD buffer and TXD buffer reached */ + +/* Bit 0 : */ +#define SPIM_EVENTS_END_EVENTS_END_Pos (0UL) /*!< Position of EVENTS_END field. */ +#define SPIM_EVENTS_END_EVENTS_END_Msk (0x1UL << SPIM_EVENTS_END_EVENTS_END_Pos) /*!< Bit mask of EVENTS_END field. */ + +/* Register: SPIM_EVENTS_ENDTX */ +/* Description: End of TXD buffer reached */ + +/* Bit 0 : */ +#define SPIM_EVENTS_ENDTX_EVENTS_ENDTX_Pos (0UL) /*!< Position of EVENTS_ENDTX field. */ +#define SPIM_EVENTS_ENDTX_EVENTS_ENDTX_Msk (0x1UL << SPIM_EVENTS_ENDTX_EVENTS_ENDTX_Pos) /*!< Bit mask of EVENTS_ENDTX field. */ + +/* Register: SPIM_EVENTS_STARTED */ +/* Description: Transaction started */ + +/* Bit 0 : */ +#define SPIM_EVENTS_STARTED_EVENTS_STARTED_Pos (0UL) /*!< Position of EVENTS_STARTED field. */ +#define SPIM_EVENTS_STARTED_EVENTS_STARTED_Msk (0x1UL << SPIM_EVENTS_STARTED_EVENTS_STARTED_Pos) /*!< Bit mask of EVENTS_STARTED field. */ + +/* Register: SPIM_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 17 : Shortcut between END event and START task */ +#define SPIM_SHORTS_END_START_Pos (17UL) /*!< Position of END_START field. */ +#define SPIM_SHORTS_END_START_Msk (0x1UL << SPIM_SHORTS_END_START_Pos) /*!< Bit mask of END_START field. */ +#define SPIM_SHORTS_END_START_Disabled (0UL) /*!< Disable shortcut */ +#define SPIM_SHORTS_END_START_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: SPIM_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 19 : Write '1' to Enable interrupt for STARTED event */ +#define SPIM_INTENSET_STARTED_Pos (19UL) /*!< Position of STARTED field. */ +#define SPIM_INTENSET_STARTED_Msk (0x1UL << SPIM_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define SPIM_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENSET_STARTED_Set (1UL) /*!< Enable */ + +/* Bit 8 : Write '1' to Enable interrupt for ENDTX event */ +#define SPIM_INTENSET_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ +#define SPIM_INTENSET_ENDTX_Msk (0x1UL << SPIM_INTENSET_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ +#define SPIM_INTENSET_ENDTX_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENSET_ENDTX_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENSET_ENDTX_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to Enable interrupt for END event */ +#define SPIM_INTENSET_END_Pos (6UL) /*!< Position of END field. */ +#define SPIM_INTENSET_END_Msk (0x1UL << SPIM_INTENSET_END_Pos) /*!< Bit mask of END field. */ +#define SPIM_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENSET_END_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to Enable interrupt for ENDRX event */ +#define SPIM_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ +#define SPIM_INTENSET_ENDRX_Msk (0x1UL << SPIM_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define SPIM_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENSET_ENDRX_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for STOPPED event */ +#define SPIM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define SPIM_INTENSET_STOPPED_Msk (0x1UL << SPIM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define SPIM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Register: SPIM_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 19 : Write '1' to Disable interrupt for STARTED event */ +#define SPIM_INTENCLR_STARTED_Pos (19UL) /*!< Position of STARTED field. */ +#define SPIM_INTENCLR_STARTED_Msk (0x1UL << SPIM_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define SPIM_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENCLR_STARTED_Clear (1UL) /*!< Disable */ + +/* Bit 8 : Write '1' to Disable interrupt for ENDTX event */ +#define SPIM_INTENCLR_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ +#define SPIM_INTENCLR_ENDTX_Msk (0x1UL << SPIM_INTENCLR_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ +#define SPIM_INTENCLR_ENDTX_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENCLR_ENDTX_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENCLR_ENDTX_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to Disable interrupt for END event */ +#define SPIM_INTENCLR_END_Pos (6UL) /*!< Position of END field. */ +#define SPIM_INTENCLR_END_Msk (0x1UL << SPIM_INTENCLR_END_Pos) /*!< Bit mask of END field. */ +#define SPIM_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENCLR_END_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to Disable interrupt for ENDRX event */ +#define SPIM_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ +#define SPIM_INTENCLR_ENDRX_Msk (0x1UL << SPIM_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define SPIM_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for STOPPED event */ +#define SPIM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define SPIM_INTENCLR_STOPPED_Msk (0x1UL << SPIM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define SPIM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Register: SPIM_ENABLE */ +/* Description: Enable SPIM */ + +/* Bits 3..0 : Enable or disable SPIM */ +#define SPIM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define SPIM_ENABLE_ENABLE_Msk (0xFUL << SPIM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define SPIM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable SPIM */ +#define SPIM_ENABLE_ENABLE_Enabled (7UL) /*!< Enable SPIM */ + +/* Register: SPIM_PSEL_SCK */ +/* Description: Pin select for SCK */ + +/* Bit 31 : Connection */ +#define SPIM_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPIM_PSEL_SCK_CONNECT_Msk (0x1UL << SPIM_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPIM_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */ +#define SPIM_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define SPIM_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPIM_PSEL_SCK_PIN_Msk (0x1FUL << SPIM_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPIM_PSEL_MOSI */ +/* Description: Pin select for MOSI signal */ + +/* Bit 31 : Connection */ +#define SPIM_PSEL_MOSI_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPIM_PSEL_MOSI_CONNECT_Msk (0x1UL << SPIM_PSEL_MOSI_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPIM_PSEL_MOSI_CONNECT_Connected (0UL) /*!< Connect */ +#define SPIM_PSEL_MOSI_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define SPIM_PSEL_MOSI_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPIM_PSEL_MOSI_PIN_Msk (0x1FUL << SPIM_PSEL_MOSI_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPIM_PSEL_MISO */ +/* Description: Pin select for MISO signal */ + +/* Bit 31 : Connection */ +#define SPIM_PSEL_MISO_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPIM_PSEL_MISO_CONNECT_Msk (0x1UL << SPIM_PSEL_MISO_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPIM_PSEL_MISO_CONNECT_Connected (0UL) /*!< Connect */ +#define SPIM_PSEL_MISO_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define SPIM_PSEL_MISO_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPIM_PSEL_MISO_PIN_Msk (0x1FUL << SPIM_PSEL_MISO_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPIM_FREQUENCY */ +/* Description: SPI frequency. Accuracy depends on the HFCLK source selected. */ + +/* Bits 31..0 : SPI master data rate */ +#define SPIM_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ +#define SPIM_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << SPIM_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ +#define SPIM_FREQUENCY_FREQUENCY_K125 (0x02000000UL) /*!< 125 kbps */ +#define SPIM_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */ +#define SPIM_FREQUENCY_FREQUENCY_K500 (0x08000000UL) /*!< 500 kbps */ +#define SPIM_FREQUENCY_FREQUENCY_M1 (0x10000000UL) /*!< 1 Mbps */ +#define SPIM_FREQUENCY_FREQUENCY_M2 (0x20000000UL) /*!< 2 Mbps */ +#define SPIM_FREQUENCY_FREQUENCY_M4 (0x40000000UL) /*!< 4 Mbps */ +#define SPIM_FREQUENCY_FREQUENCY_M8 (0x80000000UL) /*!< 8 Mbps */ + +/* Register: SPIM_RXD_PTR */ +/* Description: Data pointer */ + +/* Bits 31..0 : Data pointer */ +#define SPIM_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define SPIM_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIM_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: SPIM_RXD_MAXCNT */ +/* Description: Maximum number of bytes in receive buffer */ + +/* Bits 9..0 : Maximum number of bytes in receive buffer */ +#define SPIM_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define SPIM_RXD_MAXCNT_MAXCNT_Msk (0x3FFUL << SPIM_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: SPIM_RXD_AMOUNT */ +/* Description: Number of bytes transferred in the last transaction */ + +/* Bits 9..0 : Number of bytes transferred in the last transaction */ +#define SPIM_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define SPIM_RXD_AMOUNT_AMOUNT_Msk (0x3FFUL << SPIM_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: SPIM_RXD_LIST */ +/* Description: EasyDMA list type */ + +/* Bits 2..0 : List type */ +#define SPIM_RXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */ +#define SPIM_RXD_LIST_LIST_Msk (0x7UL << SPIM_RXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */ +#define SPIM_RXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */ +#define SPIM_RXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */ + +/* Register: SPIM_TXD_PTR */ +/* Description: Data pointer */ + +/* Bits 31..0 : Data pointer */ +#define SPIM_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define SPIM_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIM_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: SPIM_TXD_MAXCNT */ +/* Description: Maximum number of bytes in transmit buffer */ + +/* Bits 9..0 : Maximum number of bytes in transmit buffer */ +#define SPIM_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define SPIM_TXD_MAXCNT_MAXCNT_Msk (0x3FFUL << SPIM_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: SPIM_TXD_AMOUNT */ +/* Description: Number of bytes transferred in the last transaction */ + +/* Bits 9..0 : Number of bytes transferred in the last transaction */ +#define SPIM_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define SPIM_TXD_AMOUNT_AMOUNT_Msk (0x3FFUL << SPIM_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: SPIM_TXD_LIST */ +/* Description: EasyDMA list type */ + +/* Bits 2..0 : List type */ +#define SPIM_TXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */ +#define SPIM_TXD_LIST_LIST_Msk (0x7UL << SPIM_TXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */ +#define SPIM_TXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */ +#define SPIM_TXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */ + +/* Register: SPIM_CONFIG */ +/* Description: Configuration register */ + +/* Bit 2 : Serial clock (SCK) polarity */ +#define SPIM_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */ +#define SPIM_CONFIG_CPOL_Msk (0x1UL << SPIM_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */ +#define SPIM_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high */ +#define SPIM_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low */ + +/* Bit 1 : Serial clock (SCK) phase */ +#define SPIM_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */ +#define SPIM_CONFIG_CPHA_Msk (0x1UL << SPIM_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */ +#define SPIM_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of clock, shift serial data on trailing edge */ +#define SPIM_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of clock, shift serial data on leading edge */ + +/* Bit 0 : Bit order */ +#define SPIM_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */ +#define SPIM_CONFIG_ORDER_Msk (0x1UL << SPIM_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */ +#define SPIM_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit shifted out first */ +#define SPIM_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit shifted out first */ + +/* Register: SPIM_ORC */ +/* Description: Over-read character. Character clocked out in case and over-read of the TXD buffer. */ + +/* Bits 7..0 : Over-read character. Character clocked out in case and over-read of the TXD buffer. */ +#define SPIM_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */ +#define SPIM_ORC_ORC_Msk (0xFFUL << SPIM_ORC_ORC_Pos) /*!< Bit mask of ORC field. */ + + +/* Peripheral: SPIS */ +/* Description: SPI Slave */ + +/* Register: SPIS_TASKS_ACQUIRE */ +/* Description: Acquire SPI semaphore */ + +/* Bit 0 : */ +#define SPIS_TASKS_ACQUIRE_TASKS_ACQUIRE_Pos (0UL) /*!< Position of TASKS_ACQUIRE field. */ +#define SPIS_TASKS_ACQUIRE_TASKS_ACQUIRE_Msk (0x1UL << SPIS_TASKS_ACQUIRE_TASKS_ACQUIRE_Pos) /*!< Bit mask of TASKS_ACQUIRE field. */ + +/* Register: SPIS_TASKS_RELEASE */ +/* Description: Release SPI semaphore, enabling the SPI slave to acquire it */ + +/* Bit 0 : */ +#define SPIS_TASKS_RELEASE_TASKS_RELEASE_Pos (0UL) /*!< Position of TASKS_RELEASE field. */ +#define SPIS_TASKS_RELEASE_TASKS_RELEASE_Msk (0x1UL << SPIS_TASKS_RELEASE_TASKS_RELEASE_Pos) /*!< Bit mask of TASKS_RELEASE field. */ + +/* Register: SPIS_EVENTS_END */ +/* Description: Granted transaction completed */ + +/* Bit 0 : */ +#define SPIS_EVENTS_END_EVENTS_END_Pos (0UL) /*!< Position of EVENTS_END field. */ +#define SPIS_EVENTS_END_EVENTS_END_Msk (0x1UL << SPIS_EVENTS_END_EVENTS_END_Pos) /*!< Bit mask of EVENTS_END field. */ + +/* Register: SPIS_EVENTS_ENDRX */ +/* Description: End of RXD buffer reached */ + +/* Bit 0 : */ +#define SPIS_EVENTS_ENDRX_EVENTS_ENDRX_Pos (0UL) /*!< Position of EVENTS_ENDRX field. */ +#define SPIS_EVENTS_ENDRX_EVENTS_ENDRX_Msk (0x1UL << SPIS_EVENTS_ENDRX_EVENTS_ENDRX_Pos) /*!< Bit mask of EVENTS_ENDRX field. */ + +/* Register: SPIS_EVENTS_ACQUIRED */ +/* Description: Semaphore acquired */ + +/* Bit 0 : */ +#define SPIS_EVENTS_ACQUIRED_EVENTS_ACQUIRED_Pos (0UL) /*!< Position of EVENTS_ACQUIRED field. */ +#define SPIS_EVENTS_ACQUIRED_EVENTS_ACQUIRED_Msk (0x1UL << SPIS_EVENTS_ACQUIRED_EVENTS_ACQUIRED_Pos) /*!< Bit mask of EVENTS_ACQUIRED field. */ + +/* Register: SPIS_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 2 : Shortcut between END event and ACQUIRE task */ +#define SPIS_SHORTS_END_ACQUIRE_Pos (2UL) /*!< Position of END_ACQUIRE field. */ +#define SPIS_SHORTS_END_ACQUIRE_Msk (0x1UL << SPIS_SHORTS_END_ACQUIRE_Pos) /*!< Bit mask of END_ACQUIRE field. */ +#define SPIS_SHORTS_END_ACQUIRE_Disabled (0UL) /*!< Disable shortcut */ +#define SPIS_SHORTS_END_ACQUIRE_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: SPIS_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 10 : Write '1' to Enable interrupt for ACQUIRED event */ +#define SPIS_INTENSET_ACQUIRED_Pos (10UL) /*!< Position of ACQUIRED field. */ +#define SPIS_INTENSET_ACQUIRED_Msk (0x1UL << SPIS_INTENSET_ACQUIRED_Pos) /*!< Bit mask of ACQUIRED field. */ +#define SPIS_INTENSET_ACQUIRED_Disabled (0UL) /*!< Read: Disabled */ +#define SPIS_INTENSET_ACQUIRED_Enabled (1UL) /*!< Read: Enabled */ +#define SPIS_INTENSET_ACQUIRED_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to Enable interrupt for ENDRX event */ +#define SPIS_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ +#define SPIS_INTENSET_ENDRX_Msk (0x1UL << SPIS_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define SPIS_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */ +#define SPIS_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */ +#define SPIS_INTENSET_ENDRX_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for END event */ +#define SPIS_INTENSET_END_Pos (1UL) /*!< Position of END field. */ +#define SPIS_INTENSET_END_Msk (0x1UL << SPIS_INTENSET_END_Pos) /*!< Bit mask of END field. */ +#define SPIS_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ +#define SPIS_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ +#define SPIS_INTENSET_END_Set (1UL) /*!< Enable */ + +/* Register: SPIS_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 10 : Write '1' to Disable interrupt for ACQUIRED event */ +#define SPIS_INTENCLR_ACQUIRED_Pos (10UL) /*!< Position of ACQUIRED field. */ +#define SPIS_INTENCLR_ACQUIRED_Msk (0x1UL << SPIS_INTENCLR_ACQUIRED_Pos) /*!< Bit mask of ACQUIRED field. */ +#define SPIS_INTENCLR_ACQUIRED_Disabled (0UL) /*!< Read: Disabled */ +#define SPIS_INTENCLR_ACQUIRED_Enabled (1UL) /*!< Read: Enabled */ +#define SPIS_INTENCLR_ACQUIRED_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to Disable interrupt for ENDRX event */ +#define SPIS_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ +#define SPIS_INTENCLR_ENDRX_Msk (0x1UL << SPIS_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define SPIS_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */ +#define SPIS_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */ +#define SPIS_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for END event */ +#define SPIS_INTENCLR_END_Pos (1UL) /*!< Position of END field. */ +#define SPIS_INTENCLR_END_Msk (0x1UL << SPIS_INTENCLR_END_Pos) /*!< Bit mask of END field. */ +#define SPIS_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ +#define SPIS_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ +#define SPIS_INTENCLR_END_Clear (1UL) /*!< Disable */ + +/* Register: SPIS_SEMSTAT */ +/* Description: Semaphore status register */ + +/* Bits 1..0 : Semaphore status */ +#define SPIS_SEMSTAT_SEMSTAT_Pos (0UL) /*!< Position of SEMSTAT field. */ +#define SPIS_SEMSTAT_SEMSTAT_Msk (0x3UL << SPIS_SEMSTAT_SEMSTAT_Pos) /*!< Bit mask of SEMSTAT field. */ +#define SPIS_SEMSTAT_SEMSTAT_Free (0UL) /*!< Semaphore is free */ +#define SPIS_SEMSTAT_SEMSTAT_CPU (1UL) /*!< Semaphore is assigned to CPU */ +#define SPIS_SEMSTAT_SEMSTAT_SPIS (2UL) /*!< Semaphore is assigned to SPI slave */ +#define SPIS_SEMSTAT_SEMSTAT_CPUPending (3UL) /*!< Semaphore is assigned to SPI but a handover to the CPU is pending */ + +/* Register: SPIS_STATUS */ +/* Description: Status from last transaction */ + +/* Bit 1 : RX buffer overflow detected, and prevented */ +#define SPIS_STATUS_OVERFLOW_Pos (1UL) /*!< Position of OVERFLOW field. */ +#define SPIS_STATUS_OVERFLOW_Msk (0x1UL << SPIS_STATUS_OVERFLOW_Pos) /*!< Bit mask of OVERFLOW field. */ +#define SPIS_STATUS_OVERFLOW_NotPresent (0UL) /*!< Read: error not present */ +#define SPIS_STATUS_OVERFLOW_Present (1UL) /*!< Read: error present */ +#define SPIS_STATUS_OVERFLOW_Clear (1UL) /*!< Write: clear error on writing '1' */ + +/* Bit 0 : TX buffer over-read detected, and prevented */ +#define SPIS_STATUS_OVERREAD_Pos (0UL) /*!< Position of OVERREAD field. */ +#define SPIS_STATUS_OVERREAD_Msk (0x1UL << SPIS_STATUS_OVERREAD_Pos) /*!< Bit mask of OVERREAD field. */ +#define SPIS_STATUS_OVERREAD_NotPresent (0UL) /*!< Read: error not present */ +#define SPIS_STATUS_OVERREAD_Present (1UL) /*!< Read: error present */ +#define SPIS_STATUS_OVERREAD_Clear (1UL) /*!< Write: clear error on writing '1' */ + +/* Register: SPIS_ENABLE */ +/* Description: Enable SPI slave */ + +/* Bits 3..0 : Enable or disable SPI slave */ +#define SPIS_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define SPIS_ENABLE_ENABLE_Msk (0xFUL << SPIS_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define SPIS_ENABLE_ENABLE_Disabled (0UL) /*!< Disable SPI slave */ +#define SPIS_ENABLE_ENABLE_Enabled (2UL) /*!< Enable SPI slave */ + +/* Register: SPIS_PSEL_SCK */ +/* Description: Pin select for SCK */ + +/* Bit 31 : Connection */ +#define SPIS_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPIS_PSEL_SCK_CONNECT_Msk (0x1UL << SPIS_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPIS_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */ +#define SPIS_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define SPIS_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPIS_PSEL_SCK_PIN_Msk (0x1FUL << SPIS_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPIS_PSEL_MISO */ +/* Description: Pin select for MISO signal */ + +/* Bit 31 : Connection */ +#define SPIS_PSEL_MISO_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPIS_PSEL_MISO_CONNECT_Msk (0x1UL << SPIS_PSEL_MISO_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPIS_PSEL_MISO_CONNECT_Connected (0UL) /*!< Connect */ +#define SPIS_PSEL_MISO_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define SPIS_PSEL_MISO_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPIS_PSEL_MISO_PIN_Msk (0x1FUL << SPIS_PSEL_MISO_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPIS_PSEL_MOSI */ +/* Description: Pin select for MOSI signal */ + +/* Bit 31 : Connection */ +#define SPIS_PSEL_MOSI_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPIS_PSEL_MOSI_CONNECT_Msk (0x1UL << SPIS_PSEL_MOSI_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPIS_PSEL_MOSI_CONNECT_Connected (0UL) /*!< Connect */ +#define SPIS_PSEL_MOSI_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define SPIS_PSEL_MOSI_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPIS_PSEL_MOSI_PIN_Msk (0x1FUL << SPIS_PSEL_MOSI_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPIS_PSEL_CSN */ +/* Description: Pin select for CSN signal */ + +/* Bit 31 : Connection */ +#define SPIS_PSEL_CSN_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPIS_PSEL_CSN_CONNECT_Msk (0x1UL << SPIS_PSEL_CSN_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPIS_PSEL_CSN_CONNECT_Connected (0UL) /*!< Connect */ +#define SPIS_PSEL_CSN_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define SPIS_PSEL_CSN_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPIS_PSEL_CSN_PIN_Msk (0x1FUL << SPIS_PSEL_CSN_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPIS_RXD_PTR */ +/* Description: RXD data pointer */ + +/* Bits 31..0 : RXD data pointer */ +#define SPIS_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define SPIS_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIS_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: SPIS_RXD_MAXCNT */ +/* Description: Maximum number of bytes in receive buffer */ + +/* Bits 9..0 : Maximum number of bytes in receive buffer */ +#define SPIS_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define SPIS_RXD_MAXCNT_MAXCNT_Msk (0x3FFUL << SPIS_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: SPIS_RXD_AMOUNT */ +/* Description: Number of bytes received in last granted transaction */ + +/* Bits 9..0 : Number of bytes received in the last granted transaction */ +#define SPIS_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define SPIS_RXD_AMOUNT_AMOUNT_Msk (0x3FFUL << SPIS_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: SPIS_TXD_PTR */ +/* Description: TXD data pointer */ + +/* Bits 31..0 : TXD data pointer */ +#define SPIS_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define SPIS_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIS_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: SPIS_TXD_MAXCNT */ +/* Description: Maximum number of bytes in transmit buffer */ + +/* Bits 9..0 : Maximum number of bytes in transmit buffer */ +#define SPIS_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define SPIS_TXD_MAXCNT_MAXCNT_Msk (0x3FFUL << SPIS_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: SPIS_TXD_AMOUNT */ +/* Description: Number of bytes transmitted in last granted transaction */ + +/* Bits 9..0 : Number of bytes transmitted in last granted transaction */ +#define SPIS_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define SPIS_TXD_AMOUNT_AMOUNT_Msk (0x3FFUL << SPIS_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: SPIS_CONFIG */ +/* Description: Configuration register */ + +/* Bit 2 : Serial clock (SCK) polarity */ +#define SPIS_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */ +#define SPIS_CONFIG_CPOL_Msk (0x1UL << SPIS_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */ +#define SPIS_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high */ +#define SPIS_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low */ + +/* Bit 1 : Serial clock (SCK) phase */ +#define SPIS_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */ +#define SPIS_CONFIG_CPHA_Msk (0x1UL << SPIS_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */ +#define SPIS_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of clock, shift serial data on trailing edge */ +#define SPIS_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of clock, shift serial data on leading edge */ + +/* Bit 0 : Bit order */ +#define SPIS_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */ +#define SPIS_CONFIG_ORDER_Msk (0x1UL << SPIS_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */ +#define SPIS_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit shifted out first */ +#define SPIS_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit shifted out first */ + +/* Register: SPIS_DEF */ +/* Description: Default character. Character clocked out in case of an ignored transaction. */ + +/* Bits 7..0 : Default character. Character clocked out in case of an ignored transaction. */ +#define SPIS_DEF_DEF_Pos (0UL) /*!< Position of DEF field. */ +#define SPIS_DEF_DEF_Msk (0xFFUL << SPIS_DEF_DEF_Pos) /*!< Bit mask of DEF field. */ + +/* Register: SPIS_ORC */ +/* Description: Over-read character */ + +/* Bits 7..0 : Over-read character. Character clocked out after an over-read of the transmit buffer. */ +#define SPIS_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */ +#define SPIS_ORC_ORC_Msk (0xFFUL << SPIS_ORC_ORC_Pos) /*!< Bit mask of ORC field. */ + + +/* Peripheral: TEMP */ +/* Description: Temperature Sensor */ + +/* Register: TEMP_TASKS_START */ +/* Description: Start temperature measurement */ + +/* Bit 0 : */ +#define TEMP_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define TEMP_TASKS_START_TASKS_START_Msk (0x1UL << TEMP_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: TEMP_TASKS_STOP */ +/* Description: Stop temperature measurement */ + +/* Bit 0 : */ +#define TEMP_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define TEMP_TASKS_STOP_TASKS_STOP_Msk (0x1UL << TEMP_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: TEMP_EVENTS_DATARDY */ +/* Description: Temperature measurement complete, data ready */ + +/* Bit 0 : */ +#define TEMP_EVENTS_DATARDY_EVENTS_DATARDY_Pos (0UL) /*!< Position of EVENTS_DATARDY field. */ +#define TEMP_EVENTS_DATARDY_EVENTS_DATARDY_Msk (0x1UL << TEMP_EVENTS_DATARDY_EVENTS_DATARDY_Pos) /*!< Bit mask of EVENTS_DATARDY field. */ + +/* Register: TEMP_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 0 : Write '1' to Enable interrupt for DATARDY event */ +#define TEMP_INTENSET_DATARDY_Pos (0UL) /*!< Position of DATARDY field. */ +#define TEMP_INTENSET_DATARDY_Msk (0x1UL << TEMP_INTENSET_DATARDY_Pos) /*!< Bit mask of DATARDY field. */ +#define TEMP_INTENSET_DATARDY_Disabled (0UL) /*!< Read: Disabled */ +#define TEMP_INTENSET_DATARDY_Enabled (1UL) /*!< Read: Enabled */ +#define TEMP_INTENSET_DATARDY_Set (1UL) /*!< Enable */ + +/* Register: TEMP_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 0 : Write '1' to Disable interrupt for DATARDY event */ +#define TEMP_INTENCLR_DATARDY_Pos (0UL) /*!< Position of DATARDY field. */ +#define TEMP_INTENCLR_DATARDY_Msk (0x1UL << TEMP_INTENCLR_DATARDY_Pos) /*!< Bit mask of DATARDY field. */ +#define TEMP_INTENCLR_DATARDY_Disabled (0UL) /*!< Read: Disabled */ +#define TEMP_INTENCLR_DATARDY_Enabled (1UL) /*!< Read: Enabled */ +#define TEMP_INTENCLR_DATARDY_Clear (1UL) /*!< Disable */ + +/* Register: TEMP_TEMP */ +/* Description: Temperature in degC (0.25deg steps) */ + +/* Bits 31..0 : Temperature in degC (0.25deg steps) */ +#define TEMP_TEMP_TEMP_Pos (0UL) /*!< Position of TEMP field. */ +#define TEMP_TEMP_TEMP_Msk (0xFFFFFFFFUL << TEMP_TEMP_TEMP_Pos) /*!< Bit mask of TEMP field. */ + +/* Register: TEMP_A0 */ +/* Description: Slope of 1st piece wise linear function */ + +/* Bits 11..0 : Slope of 1st piece wise linear function */ +#define TEMP_A0_A0_Pos (0UL) /*!< Position of A0 field. */ +#define TEMP_A0_A0_Msk (0xFFFUL << TEMP_A0_A0_Pos) /*!< Bit mask of A0 field. */ + +/* Register: TEMP_A1 */ +/* Description: Slope of 2nd piece wise linear function */ + +/* Bits 11..0 : Slope of 2nd piece wise linear function */ +#define TEMP_A1_A1_Pos (0UL) /*!< Position of A1 field. */ +#define TEMP_A1_A1_Msk (0xFFFUL << TEMP_A1_A1_Pos) /*!< Bit mask of A1 field. */ + +/* Register: TEMP_A2 */ +/* Description: Slope of 3rd piece wise linear function */ + +/* Bits 11..0 : Slope of 3rd piece wise linear function */ +#define TEMP_A2_A2_Pos (0UL) /*!< Position of A2 field. */ +#define TEMP_A2_A2_Msk (0xFFFUL << TEMP_A2_A2_Pos) /*!< Bit mask of A2 field. */ + +/* Register: TEMP_A3 */ +/* Description: Slope of 4th piece wise linear function */ + +/* Bits 11..0 : Slope of 4th piece wise linear function */ +#define TEMP_A3_A3_Pos (0UL) /*!< Position of A3 field. */ +#define TEMP_A3_A3_Msk (0xFFFUL << TEMP_A3_A3_Pos) /*!< Bit mask of A3 field. */ + +/* Register: TEMP_A4 */ +/* Description: Slope of 5th piece wise linear function */ + +/* Bits 11..0 : Slope of 5th piece wise linear function */ +#define TEMP_A4_A4_Pos (0UL) /*!< Position of A4 field. */ +#define TEMP_A4_A4_Msk (0xFFFUL << TEMP_A4_A4_Pos) /*!< Bit mask of A4 field. */ + +/* Register: TEMP_A5 */ +/* Description: Slope of 6th piece wise linear function */ + +/* Bits 11..0 : Slope of 6th piece wise linear function */ +#define TEMP_A5_A5_Pos (0UL) /*!< Position of A5 field. */ +#define TEMP_A5_A5_Msk (0xFFFUL << TEMP_A5_A5_Pos) /*!< Bit mask of A5 field. */ + +/* Register: TEMP_B0 */ +/* Description: y-intercept of 1st piece wise linear function */ + +/* Bits 13..0 : y-intercept of 1st piece wise linear function */ +#define TEMP_B0_B0_Pos (0UL) /*!< Position of B0 field. */ +#define TEMP_B0_B0_Msk (0x3FFFUL << TEMP_B0_B0_Pos) /*!< Bit mask of B0 field. */ + +/* Register: TEMP_B1 */ +/* Description: y-intercept of 2nd piece wise linear function */ + +/* Bits 13..0 : y-intercept of 2nd piece wise linear function */ +#define TEMP_B1_B1_Pos (0UL) /*!< Position of B1 field. */ +#define TEMP_B1_B1_Msk (0x3FFFUL << TEMP_B1_B1_Pos) /*!< Bit mask of B1 field. */ + +/* Register: TEMP_B2 */ +/* Description: y-intercept of 3rd piece wise linear function */ + +/* Bits 13..0 : y-intercept of 3rd piece wise linear function */ +#define TEMP_B2_B2_Pos (0UL) /*!< Position of B2 field. */ +#define TEMP_B2_B2_Msk (0x3FFFUL << TEMP_B2_B2_Pos) /*!< Bit mask of B2 field. */ + +/* Register: TEMP_B3 */ +/* Description: y-intercept of 4th piece wise linear function */ + +/* Bits 13..0 : y-intercept of 4th piece wise linear function */ +#define TEMP_B3_B3_Pos (0UL) /*!< Position of B3 field. */ +#define TEMP_B3_B3_Msk (0x3FFFUL << TEMP_B3_B3_Pos) /*!< Bit mask of B3 field. */ + +/* Register: TEMP_B4 */ +/* Description: y-intercept of 5th piece wise linear function */ + +/* Bits 13..0 : y-intercept of 5th piece wise linear function */ +#define TEMP_B4_B4_Pos (0UL) /*!< Position of B4 field. */ +#define TEMP_B4_B4_Msk (0x3FFFUL << TEMP_B4_B4_Pos) /*!< Bit mask of B4 field. */ + +/* Register: TEMP_B5 */ +/* Description: y-intercept of 6th piece wise linear function */ + +/* Bits 13..0 : y-intercept of 6th piece wise linear function */ +#define TEMP_B5_B5_Pos (0UL) /*!< Position of B5 field. */ +#define TEMP_B5_B5_Msk (0x3FFFUL << TEMP_B5_B5_Pos) /*!< Bit mask of B5 field. */ + +/* Register: TEMP_T0 */ +/* Description: End point of 1st piece wise linear function */ + +/* Bits 7..0 : End point of 1st piece wise linear function */ +#define TEMP_T0_T0_Pos (0UL) /*!< Position of T0 field. */ +#define TEMP_T0_T0_Msk (0xFFUL << TEMP_T0_T0_Pos) /*!< Bit mask of T0 field. */ + +/* Register: TEMP_T1 */ +/* Description: End point of 2nd piece wise linear function */ + +/* Bits 7..0 : End point of 2nd piece wise linear function */ +#define TEMP_T1_T1_Pos (0UL) /*!< Position of T1 field. */ +#define TEMP_T1_T1_Msk (0xFFUL << TEMP_T1_T1_Pos) /*!< Bit mask of T1 field. */ + +/* Register: TEMP_T2 */ +/* Description: End point of 3rd piece wise linear function */ + +/* Bits 7..0 : End point of 3rd piece wise linear function */ +#define TEMP_T2_T2_Pos (0UL) /*!< Position of T2 field. */ +#define TEMP_T2_T2_Msk (0xFFUL << TEMP_T2_T2_Pos) /*!< Bit mask of T2 field. */ + +/* Register: TEMP_T3 */ +/* Description: End point of 4th piece wise linear function */ + +/* Bits 7..0 : End point of 4th piece wise linear function */ +#define TEMP_T3_T3_Pos (0UL) /*!< Position of T3 field. */ +#define TEMP_T3_T3_Msk (0xFFUL << TEMP_T3_T3_Pos) /*!< Bit mask of T3 field. */ + +/* Register: TEMP_T4 */ +/* Description: End point of 5th piece wise linear function */ + +/* Bits 7..0 : End point of 5th piece wise linear function */ +#define TEMP_T4_T4_Pos (0UL) /*!< Position of T4 field. */ +#define TEMP_T4_T4_Msk (0xFFUL << TEMP_T4_T4_Pos) /*!< Bit mask of T4 field. */ + + +/* Peripheral: TIMER */ +/* Description: Timer/Counter 0 */ + +/* Register: TIMER_TASKS_START */ +/* Description: Start Timer */ + +/* Bit 0 : */ +#define TIMER_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define TIMER_TASKS_START_TASKS_START_Msk (0x1UL << TIMER_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: TIMER_TASKS_STOP */ +/* Description: Stop Timer */ + +/* Bit 0 : */ +#define TIMER_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define TIMER_TASKS_STOP_TASKS_STOP_Msk (0x1UL << TIMER_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: TIMER_TASKS_COUNT */ +/* Description: Increment Timer (Counter mode only) */ + +/* Bit 0 : */ +#define TIMER_TASKS_COUNT_TASKS_COUNT_Pos (0UL) /*!< Position of TASKS_COUNT field. */ +#define TIMER_TASKS_COUNT_TASKS_COUNT_Msk (0x1UL << TIMER_TASKS_COUNT_TASKS_COUNT_Pos) /*!< Bit mask of TASKS_COUNT field. */ + +/* Register: TIMER_TASKS_CLEAR */ +/* Description: Clear time */ + +/* Bit 0 : */ +#define TIMER_TASKS_CLEAR_TASKS_CLEAR_Pos (0UL) /*!< Position of TASKS_CLEAR field. */ +#define TIMER_TASKS_CLEAR_TASKS_CLEAR_Msk (0x1UL << TIMER_TASKS_CLEAR_TASKS_CLEAR_Pos) /*!< Bit mask of TASKS_CLEAR field. */ + +/* Register: TIMER_TASKS_SHUTDOWN */ +/* Description: Deprecated register - Shut down timer */ + +/* Bit 0 : */ +#define TIMER_TASKS_SHUTDOWN_TASKS_SHUTDOWN_Pos (0UL) /*!< Position of TASKS_SHUTDOWN field. */ +#define TIMER_TASKS_SHUTDOWN_TASKS_SHUTDOWN_Msk (0x1UL << TIMER_TASKS_SHUTDOWN_TASKS_SHUTDOWN_Pos) /*!< Bit mask of TASKS_SHUTDOWN field. */ + +/* Register: TIMER_TASKS_CAPTURE */ +/* Description: Description collection[0]: Capture Timer value to CC[0] register */ + +/* Bit 0 : */ +#define TIMER_TASKS_CAPTURE_TASKS_CAPTURE_Pos (0UL) /*!< Position of TASKS_CAPTURE field. */ +#define TIMER_TASKS_CAPTURE_TASKS_CAPTURE_Msk (0x1UL << TIMER_TASKS_CAPTURE_TASKS_CAPTURE_Pos) /*!< Bit mask of TASKS_CAPTURE field. */ + +/* Register: TIMER_EVENTS_COMPARE */ +/* Description: Description collection[0]: Compare event on CC[0] match */ + +/* Bit 0 : */ +#define TIMER_EVENTS_COMPARE_EVENTS_COMPARE_Pos (0UL) /*!< Position of EVENTS_COMPARE field. */ +#define TIMER_EVENTS_COMPARE_EVENTS_COMPARE_Msk (0x1UL << TIMER_EVENTS_COMPARE_EVENTS_COMPARE_Pos) /*!< Bit mask of EVENTS_COMPARE field. */ + +/* Register: TIMER_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 13 : Shortcut between COMPARE[5] event and STOP task */ +#define TIMER_SHORTS_COMPARE5_STOP_Pos (13UL) /*!< Position of COMPARE5_STOP field. */ +#define TIMER_SHORTS_COMPARE5_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE5_STOP_Pos) /*!< Bit mask of COMPARE5_STOP field. */ +#define TIMER_SHORTS_COMPARE5_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE5_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 12 : Shortcut between COMPARE[4] event and STOP task */ +#define TIMER_SHORTS_COMPARE4_STOP_Pos (12UL) /*!< Position of COMPARE4_STOP field. */ +#define TIMER_SHORTS_COMPARE4_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE4_STOP_Pos) /*!< Bit mask of COMPARE4_STOP field. */ +#define TIMER_SHORTS_COMPARE4_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE4_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 11 : Shortcut between COMPARE[3] event and STOP task */ +#define TIMER_SHORTS_COMPARE3_STOP_Pos (11UL) /*!< Position of COMPARE3_STOP field. */ +#define TIMER_SHORTS_COMPARE3_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE3_STOP_Pos) /*!< Bit mask of COMPARE3_STOP field. */ +#define TIMER_SHORTS_COMPARE3_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE3_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 10 : Shortcut between COMPARE[2] event and STOP task */ +#define TIMER_SHORTS_COMPARE2_STOP_Pos (10UL) /*!< Position of COMPARE2_STOP field. */ +#define TIMER_SHORTS_COMPARE2_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE2_STOP_Pos) /*!< Bit mask of COMPARE2_STOP field. */ +#define TIMER_SHORTS_COMPARE2_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE2_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 9 : Shortcut between COMPARE[1] event and STOP task */ +#define TIMER_SHORTS_COMPARE1_STOP_Pos (9UL) /*!< Position of COMPARE1_STOP field. */ +#define TIMER_SHORTS_COMPARE1_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE1_STOP_Pos) /*!< Bit mask of COMPARE1_STOP field. */ +#define TIMER_SHORTS_COMPARE1_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE1_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 8 : Shortcut between COMPARE[0] event and STOP task */ +#define TIMER_SHORTS_COMPARE0_STOP_Pos (8UL) /*!< Position of COMPARE0_STOP field. */ +#define TIMER_SHORTS_COMPARE0_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE0_STOP_Pos) /*!< Bit mask of COMPARE0_STOP field. */ +#define TIMER_SHORTS_COMPARE0_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE0_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 5 : Shortcut between COMPARE[5] event and CLEAR task */ +#define TIMER_SHORTS_COMPARE5_CLEAR_Pos (5UL) /*!< Position of COMPARE5_CLEAR field. */ +#define TIMER_SHORTS_COMPARE5_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE5_CLEAR_Pos) /*!< Bit mask of COMPARE5_CLEAR field. */ +#define TIMER_SHORTS_COMPARE5_CLEAR_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE5_CLEAR_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 4 : Shortcut between COMPARE[4] event and CLEAR task */ +#define TIMER_SHORTS_COMPARE4_CLEAR_Pos (4UL) /*!< Position of COMPARE4_CLEAR field. */ +#define TIMER_SHORTS_COMPARE4_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE4_CLEAR_Pos) /*!< Bit mask of COMPARE4_CLEAR field. */ +#define TIMER_SHORTS_COMPARE4_CLEAR_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE4_CLEAR_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 3 : Shortcut between COMPARE[3] event and CLEAR task */ +#define TIMER_SHORTS_COMPARE3_CLEAR_Pos (3UL) /*!< Position of COMPARE3_CLEAR field. */ +#define TIMER_SHORTS_COMPARE3_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE3_CLEAR_Pos) /*!< Bit mask of COMPARE3_CLEAR field. */ +#define TIMER_SHORTS_COMPARE3_CLEAR_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE3_CLEAR_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 2 : Shortcut between COMPARE[2] event and CLEAR task */ +#define TIMER_SHORTS_COMPARE2_CLEAR_Pos (2UL) /*!< Position of COMPARE2_CLEAR field. */ +#define TIMER_SHORTS_COMPARE2_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE2_CLEAR_Pos) /*!< Bit mask of COMPARE2_CLEAR field. */ +#define TIMER_SHORTS_COMPARE2_CLEAR_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE2_CLEAR_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 1 : Shortcut between COMPARE[1] event and CLEAR task */ +#define TIMER_SHORTS_COMPARE1_CLEAR_Pos (1UL) /*!< Position of COMPARE1_CLEAR field. */ +#define TIMER_SHORTS_COMPARE1_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE1_CLEAR_Pos) /*!< Bit mask of COMPARE1_CLEAR field. */ +#define TIMER_SHORTS_COMPARE1_CLEAR_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE1_CLEAR_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 0 : Shortcut between COMPARE[0] event and CLEAR task */ +#define TIMER_SHORTS_COMPARE0_CLEAR_Pos (0UL) /*!< Position of COMPARE0_CLEAR field. */ +#define TIMER_SHORTS_COMPARE0_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE0_CLEAR_Pos) /*!< Bit mask of COMPARE0_CLEAR field. */ +#define TIMER_SHORTS_COMPARE0_CLEAR_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE0_CLEAR_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: TIMER_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 21 : Write '1' to Enable interrupt for COMPARE[5] event */ +#define TIMER_INTENSET_COMPARE5_Pos (21UL) /*!< Position of COMPARE5 field. */ +#define TIMER_INTENSET_COMPARE5_Msk (0x1UL << TIMER_INTENSET_COMPARE5_Pos) /*!< Bit mask of COMPARE5 field. */ +#define TIMER_INTENSET_COMPARE5_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENSET_COMPARE5_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENSET_COMPARE5_Set (1UL) /*!< Enable */ + +/* Bit 20 : Write '1' to Enable interrupt for COMPARE[4] event */ +#define TIMER_INTENSET_COMPARE4_Pos (20UL) /*!< Position of COMPARE4 field. */ +#define TIMER_INTENSET_COMPARE4_Msk (0x1UL << TIMER_INTENSET_COMPARE4_Pos) /*!< Bit mask of COMPARE4 field. */ +#define TIMER_INTENSET_COMPARE4_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENSET_COMPARE4_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENSET_COMPARE4_Set (1UL) /*!< Enable */ + +/* Bit 19 : Write '1' to Enable interrupt for COMPARE[3] event */ +#define TIMER_INTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define TIMER_INTENSET_COMPARE3_Msk (0x1UL << TIMER_INTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define TIMER_INTENSET_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENSET_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENSET_COMPARE3_Set (1UL) /*!< Enable */ + +/* Bit 18 : Write '1' to Enable interrupt for COMPARE[2] event */ +#define TIMER_INTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define TIMER_INTENSET_COMPARE2_Msk (0x1UL << TIMER_INTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define TIMER_INTENSET_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENSET_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENSET_COMPARE2_Set (1UL) /*!< Enable */ + +/* Bit 17 : Write '1' to Enable interrupt for COMPARE[1] event */ +#define TIMER_INTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define TIMER_INTENSET_COMPARE1_Msk (0x1UL << TIMER_INTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define TIMER_INTENSET_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENSET_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENSET_COMPARE1_Set (1UL) /*!< Enable */ + +/* Bit 16 : Write '1' to Enable interrupt for COMPARE[0] event */ +#define TIMER_INTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define TIMER_INTENSET_COMPARE0_Msk (0x1UL << TIMER_INTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define TIMER_INTENSET_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENSET_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENSET_COMPARE0_Set (1UL) /*!< Enable */ + +/* Register: TIMER_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 21 : Write '1' to Disable interrupt for COMPARE[5] event */ +#define TIMER_INTENCLR_COMPARE5_Pos (21UL) /*!< Position of COMPARE5 field. */ +#define TIMER_INTENCLR_COMPARE5_Msk (0x1UL << TIMER_INTENCLR_COMPARE5_Pos) /*!< Bit mask of COMPARE5 field. */ +#define TIMER_INTENCLR_COMPARE5_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENCLR_COMPARE5_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENCLR_COMPARE5_Clear (1UL) /*!< Disable */ + +/* Bit 20 : Write '1' to Disable interrupt for COMPARE[4] event */ +#define TIMER_INTENCLR_COMPARE4_Pos (20UL) /*!< Position of COMPARE4 field. */ +#define TIMER_INTENCLR_COMPARE4_Msk (0x1UL << TIMER_INTENCLR_COMPARE4_Pos) /*!< Bit mask of COMPARE4 field. */ +#define TIMER_INTENCLR_COMPARE4_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENCLR_COMPARE4_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENCLR_COMPARE4_Clear (1UL) /*!< Disable */ + +/* Bit 19 : Write '1' to Disable interrupt for COMPARE[3] event */ +#define TIMER_INTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define TIMER_INTENCLR_COMPARE3_Msk (0x1UL << TIMER_INTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define TIMER_INTENCLR_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENCLR_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENCLR_COMPARE3_Clear (1UL) /*!< Disable */ + +/* Bit 18 : Write '1' to Disable interrupt for COMPARE[2] event */ +#define TIMER_INTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define TIMER_INTENCLR_COMPARE2_Msk (0x1UL << TIMER_INTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define TIMER_INTENCLR_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENCLR_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENCLR_COMPARE2_Clear (1UL) /*!< Disable */ + +/* Bit 17 : Write '1' to Disable interrupt for COMPARE[1] event */ +#define TIMER_INTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define TIMER_INTENCLR_COMPARE1_Msk (0x1UL << TIMER_INTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define TIMER_INTENCLR_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENCLR_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENCLR_COMPARE1_Clear (1UL) /*!< Disable */ + +/* Bit 16 : Write '1' to Disable interrupt for COMPARE[0] event */ +#define TIMER_INTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define TIMER_INTENCLR_COMPARE0_Msk (0x1UL << TIMER_INTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define TIMER_INTENCLR_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENCLR_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENCLR_COMPARE0_Clear (1UL) /*!< Disable */ + +/* Register: TIMER_MODE */ +/* Description: Timer mode selection */ + +/* Bits 1..0 : Timer mode */ +#define TIMER_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ +#define TIMER_MODE_MODE_Msk (0x3UL << TIMER_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ +#define TIMER_MODE_MODE_Timer (0UL) /*!< Select Timer mode */ +#define TIMER_MODE_MODE_Counter (1UL) /*!< Deprecated enumerator - Select Counter mode */ +#define TIMER_MODE_MODE_LowPowerCounter (2UL) /*!< Select Low Power Counter mode */ + +/* Register: TIMER_BITMODE */ +/* Description: Configure the number of bits used by the TIMER */ + +/* Bits 1..0 : Timer bit width */ +#define TIMER_BITMODE_BITMODE_Pos (0UL) /*!< Position of BITMODE field. */ +#define TIMER_BITMODE_BITMODE_Msk (0x3UL << TIMER_BITMODE_BITMODE_Pos) /*!< Bit mask of BITMODE field. */ +#define TIMER_BITMODE_BITMODE_16Bit (0UL) /*!< 16 bit timer bit width */ +#define TIMER_BITMODE_BITMODE_08Bit (1UL) /*!< 8 bit timer bit width */ +#define TIMER_BITMODE_BITMODE_24Bit (2UL) /*!< 24 bit timer bit width */ +#define TIMER_BITMODE_BITMODE_32Bit (3UL) /*!< 32 bit timer bit width */ + +/* Register: TIMER_PRESCALER */ +/* Description: Timer prescaler register */ + +/* Bits 3..0 : Prescaler value */ +#define TIMER_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */ +#define TIMER_PRESCALER_PRESCALER_Msk (0xFUL << TIMER_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */ + +/* Register: TIMER_CC */ +/* Description: Description collection[0]: Capture/Compare register 0 */ + +/* Bits 31..0 : Capture/Compare value */ +#define TIMER_CC_CC_Pos (0UL) /*!< Position of CC field. */ +#define TIMER_CC_CC_Msk (0xFFFFFFFFUL << TIMER_CC_CC_Pos) /*!< Bit mask of CC field. */ + + +/* Peripheral: TWIM */ +/* Description: I2C compatible Two-Wire Master Interface with EasyDMA */ + +/* Register: TWIM_TASKS_STARTRX */ +/* Description: Start TWI receive sequence */ + +/* Bit 0 : */ +#define TWIM_TASKS_STARTRX_TASKS_STARTRX_Pos (0UL) /*!< Position of TASKS_STARTRX field. */ +#define TWIM_TASKS_STARTRX_TASKS_STARTRX_Msk (0x1UL << TWIM_TASKS_STARTRX_TASKS_STARTRX_Pos) /*!< Bit mask of TASKS_STARTRX field. */ + +/* Register: TWIM_TASKS_STARTTX */ +/* Description: Start TWI transmit sequence */ + +/* Bit 0 : */ +#define TWIM_TASKS_STARTTX_TASKS_STARTTX_Pos (0UL) /*!< Position of TASKS_STARTTX field. */ +#define TWIM_TASKS_STARTTX_TASKS_STARTTX_Msk (0x1UL << TWIM_TASKS_STARTTX_TASKS_STARTTX_Pos) /*!< Bit mask of TASKS_STARTTX field. */ + +/* Register: TWIM_TASKS_STOP */ +/* Description: Stop TWI transaction. Must be issued while the TWI master is not suspended. */ + +/* Bit 0 : */ +#define TWIM_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define TWIM_TASKS_STOP_TASKS_STOP_Msk (0x1UL << TWIM_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: TWIM_TASKS_SUSPEND */ +/* Description: Suspend TWI transaction */ + +/* Bit 0 : */ +#define TWIM_TASKS_SUSPEND_TASKS_SUSPEND_Pos (0UL) /*!< Position of TASKS_SUSPEND field. */ +#define TWIM_TASKS_SUSPEND_TASKS_SUSPEND_Msk (0x1UL << TWIM_TASKS_SUSPEND_TASKS_SUSPEND_Pos) /*!< Bit mask of TASKS_SUSPEND field. */ + +/* Register: TWIM_TASKS_RESUME */ +/* Description: Resume TWI transaction */ + +/* Bit 0 : */ +#define TWIM_TASKS_RESUME_TASKS_RESUME_Pos (0UL) /*!< Position of TASKS_RESUME field. */ +#define TWIM_TASKS_RESUME_TASKS_RESUME_Msk (0x1UL << TWIM_TASKS_RESUME_TASKS_RESUME_Pos) /*!< Bit mask of TASKS_RESUME field. */ + +/* Register: TWIM_EVENTS_STOPPED */ +/* Description: TWI stopped */ + +/* Bit 0 : */ +#define TWIM_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */ +#define TWIM_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << TWIM_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */ + +/* Register: TWIM_EVENTS_ERROR */ +/* Description: TWI error */ + +/* Bit 0 : */ +#define TWIM_EVENTS_ERROR_EVENTS_ERROR_Pos (0UL) /*!< Position of EVENTS_ERROR field. */ +#define TWIM_EVENTS_ERROR_EVENTS_ERROR_Msk (0x1UL << TWIM_EVENTS_ERROR_EVENTS_ERROR_Pos) /*!< Bit mask of EVENTS_ERROR field. */ + +/* Register: TWIM_EVENTS_SUSPENDED */ +/* Description: Last byte has been sent out after the SUSPEND task has been issued, TWI traffic is now suspended. */ + +/* Bit 0 : */ +#define TWIM_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Pos (0UL) /*!< Position of EVENTS_SUSPENDED field. */ +#define TWIM_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Msk (0x1UL << TWIM_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Pos) /*!< Bit mask of EVENTS_SUSPENDED field. */ + +/* Register: TWIM_EVENTS_RXSTARTED */ +/* Description: Receive sequence started */ + +/* Bit 0 : */ +#define TWIM_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos (0UL) /*!< Position of EVENTS_RXSTARTED field. */ +#define TWIM_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Msk (0x1UL << TWIM_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos) /*!< Bit mask of EVENTS_RXSTARTED field. */ + +/* Register: TWIM_EVENTS_TXSTARTED */ +/* Description: Transmit sequence started */ + +/* Bit 0 : */ +#define TWIM_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos (0UL) /*!< Position of EVENTS_TXSTARTED field. */ +#define TWIM_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Msk (0x1UL << TWIM_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos) /*!< Bit mask of EVENTS_TXSTARTED field. */ + +/* Register: TWIM_EVENTS_LASTRX */ +/* Description: Byte boundary, starting to receive the last byte */ + +/* Bit 0 : */ +#define TWIM_EVENTS_LASTRX_EVENTS_LASTRX_Pos (0UL) /*!< Position of EVENTS_LASTRX field. */ +#define TWIM_EVENTS_LASTRX_EVENTS_LASTRX_Msk (0x1UL << TWIM_EVENTS_LASTRX_EVENTS_LASTRX_Pos) /*!< Bit mask of EVENTS_LASTRX field. */ + +/* Register: TWIM_EVENTS_LASTTX */ +/* Description: Byte boundary, starting to transmit the last byte */ + +/* Bit 0 : */ +#define TWIM_EVENTS_LASTTX_EVENTS_LASTTX_Pos (0UL) /*!< Position of EVENTS_LASTTX field. */ +#define TWIM_EVENTS_LASTTX_EVENTS_LASTTX_Msk (0x1UL << TWIM_EVENTS_LASTTX_EVENTS_LASTTX_Pos) /*!< Bit mask of EVENTS_LASTTX field. */ + +/* Register: TWIM_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 12 : Shortcut between LASTRX event and STOP task */ +#define TWIM_SHORTS_LASTRX_STOP_Pos (12UL) /*!< Position of LASTRX_STOP field. */ +#define TWIM_SHORTS_LASTRX_STOP_Msk (0x1UL << TWIM_SHORTS_LASTRX_STOP_Pos) /*!< Bit mask of LASTRX_STOP field. */ +#define TWIM_SHORTS_LASTRX_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TWIM_SHORTS_LASTRX_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 11 : Shortcut between LASTRX event and SUSPEND task */ +#define TWIM_SHORTS_LASTRX_SUSPEND_Pos (11UL) /*!< Position of LASTRX_SUSPEND field. */ +#define TWIM_SHORTS_LASTRX_SUSPEND_Msk (0x1UL << TWIM_SHORTS_LASTRX_SUSPEND_Pos) /*!< Bit mask of LASTRX_SUSPEND field. */ +#define TWIM_SHORTS_LASTRX_SUSPEND_Disabled (0UL) /*!< Disable shortcut */ +#define TWIM_SHORTS_LASTRX_SUSPEND_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 10 : Shortcut between LASTRX event and STARTTX task */ +#define TWIM_SHORTS_LASTRX_STARTTX_Pos (10UL) /*!< Position of LASTRX_STARTTX field. */ +#define TWIM_SHORTS_LASTRX_STARTTX_Msk (0x1UL << TWIM_SHORTS_LASTRX_STARTTX_Pos) /*!< Bit mask of LASTRX_STARTTX field. */ +#define TWIM_SHORTS_LASTRX_STARTTX_Disabled (0UL) /*!< Disable shortcut */ +#define TWIM_SHORTS_LASTRX_STARTTX_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 9 : Shortcut between LASTTX event and STOP task */ +#define TWIM_SHORTS_LASTTX_STOP_Pos (9UL) /*!< Position of LASTTX_STOP field. */ +#define TWIM_SHORTS_LASTTX_STOP_Msk (0x1UL << TWIM_SHORTS_LASTTX_STOP_Pos) /*!< Bit mask of LASTTX_STOP field. */ +#define TWIM_SHORTS_LASTTX_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TWIM_SHORTS_LASTTX_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 8 : Shortcut between LASTTX event and SUSPEND task */ +#define TWIM_SHORTS_LASTTX_SUSPEND_Pos (8UL) /*!< Position of LASTTX_SUSPEND field. */ +#define TWIM_SHORTS_LASTTX_SUSPEND_Msk (0x1UL << TWIM_SHORTS_LASTTX_SUSPEND_Pos) /*!< Bit mask of LASTTX_SUSPEND field. */ +#define TWIM_SHORTS_LASTTX_SUSPEND_Disabled (0UL) /*!< Disable shortcut */ +#define TWIM_SHORTS_LASTTX_SUSPEND_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 7 : Shortcut between LASTTX event and STARTRX task */ +#define TWIM_SHORTS_LASTTX_STARTRX_Pos (7UL) /*!< Position of LASTTX_STARTRX field. */ +#define TWIM_SHORTS_LASTTX_STARTRX_Msk (0x1UL << TWIM_SHORTS_LASTTX_STARTRX_Pos) /*!< Bit mask of LASTTX_STARTRX field. */ +#define TWIM_SHORTS_LASTTX_STARTRX_Disabled (0UL) /*!< Disable shortcut */ +#define TWIM_SHORTS_LASTTX_STARTRX_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: TWIM_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 24 : Enable or disable interrupt for LASTTX event */ +#define TWIM_INTEN_LASTTX_Pos (24UL) /*!< Position of LASTTX field. */ +#define TWIM_INTEN_LASTTX_Msk (0x1UL << TWIM_INTEN_LASTTX_Pos) /*!< Bit mask of LASTTX field. */ +#define TWIM_INTEN_LASTTX_Disabled (0UL) /*!< Disable */ +#define TWIM_INTEN_LASTTX_Enabled (1UL) /*!< Enable */ + +/* Bit 23 : Enable or disable interrupt for LASTRX event */ +#define TWIM_INTEN_LASTRX_Pos (23UL) /*!< Position of LASTRX field. */ +#define TWIM_INTEN_LASTRX_Msk (0x1UL << TWIM_INTEN_LASTRX_Pos) /*!< Bit mask of LASTRX field. */ +#define TWIM_INTEN_LASTRX_Disabled (0UL) /*!< Disable */ +#define TWIM_INTEN_LASTRX_Enabled (1UL) /*!< Enable */ + +/* Bit 20 : Enable or disable interrupt for TXSTARTED event */ +#define TWIM_INTEN_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define TWIM_INTEN_TXSTARTED_Msk (0x1UL << TWIM_INTEN_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define TWIM_INTEN_TXSTARTED_Disabled (0UL) /*!< Disable */ +#define TWIM_INTEN_TXSTARTED_Enabled (1UL) /*!< Enable */ + +/* Bit 19 : Enable or disable interrupt for RXSTARTED event */ +#define TWIM_INTEN_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define TWIM_INTEN_RXSTARTED_Msk (0x1UL << TWIM_INTEN_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define TWIM_INTEN_RXSTARTED_Disabled (0UL) /*!< Disable */ +#define TWIM_INTEN_RXSTARTED_Enabled (1UL) /*!< Enable */ + +/* Bit 18 : Enable or disable interrupt for SUSPENDED event */ +#define TWIM_INTEN_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ +#define TWIM_INTEN_SUSPENDED_Msk (0x1UL << TWIM_INTEN_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ +#define TWIM_INTEN_SUSPENDED_Disabled (0UL) /*!< Disable */ +#define TWIM_INTEN_SUSPENDED_Enabled (1UL) /*!< Enable */ + +/* Bit 9 : Enable or disable interrupt for ERROR event */ +#define TWIM_INTEN_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define TWIM_INTEN_ERROR_Msk (0x1UL << TWIM_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define TWIM_INTEN_ERROR_Disabled (0UL) /*!< Disable */ +#define TWIM_INTEN_ERROR_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for STOPPED event */ +#define TWIM_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define TWIM_INTEN_STOPPED_Msk (0x1UL << TWIM_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define TWIM_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ +#define TWIM_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ + +/* Register: TWIM_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 24 : Write '1' to Enable interrupt for LASTTX event */ +#define TWIM_INTENSET_LASTTX_Pos (24UL) /*!< Position of LASTTX field. */ +#define TWIM_INTENSET_LASTTX_Msk (0x1UL << TWIM_INTENSET_LASTTX_Pos) /*!< Bit mask of LASTTX field. */ +#define TWIM_INTENSET_LASTTX_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENSET_LASTTX_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENSET_LASTTX_Set (1UL) /*!< Enable */ + +/* Bit 23 : Write '1' to Enable interrupt for LASTRX event */ +#define TWIM_INTENSET_LASTRX_Pos (23UL) /*!< Position of LASTRX field. */ +#define TWIM_INTENSET_LASTRX_Msk (0x1UL << TWIM_INTENSET_LASTRX_Pos) /*!< Bit mask of LASTRX field. */ +#define TWIM_INTENSET_LASTRX_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENSET_LASTRX_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENSET_LASTRX_Set (1UL) /*!< Enable */ + +/* Bit 20 : Write '1' to Enable interrupt for TXSTARTED event */ +#define TWIM_INTENSET_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define TWIM_INTENSET_TXSTARTED_Msk (0x1UL << TWIM_INTENSET_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define TWIM_INTENSET_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENSET_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENSET_TXSTARTED_Set (1UL) /*!< Enable */ + +/* Bit 19 : Write '1' to Enable interrupt for RXSTARTED event */ +#define TWIM_INTENSET_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define TWIM_INTENSET_RXSTARTED_Msk (0x1UL << TWIM_INTENSET_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define TWIM_INTENSET_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENSET_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENSET_RXSTARTED_Set (1UL) /*!< Enable */ + +/* Bit 18 : Write '1' to Enable interrupt for SUSPENDED event */ +#define TWIM_INTENSET_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ +#define TWIM_INTENSET_SUSPENDED_Msk (0x1UL << TWIM_INTENSET_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ +#define TWIM_INTENSET_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENSET_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENSET_SUSPENDED_Set (1UL) /*!< Enable */ + +/* Bit 9 : Write '1' to Enable interrupt for ERROR event */ +#define TWIM_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define TWIM_INTENSET_ERROR_Msk (0x1UL << TWIM_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define TWIM_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENSET_ERROR_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for STOPPED event */ +#define TWIM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define TWIM_INTENSET_STOPPED_Msk (0x1UL << TWIM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define TWIM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Register: TWIM_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 24 : Write '1' to Disable interrupt for LASTTX event */ +#define TWIM_INTENCLR_LASTTX_Pos (24UL) /*!< Position of LASTTX field. */ +#define TWIM_INTENCLR_LASTTX_Msk (0x1UL << TWIM_INTENCLR_LASTTX_Pos) /*!< Bit mask of LASTTX field. */ +#define TWIM_INTENCLR_LASTTX_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENCLR_LASTTX_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENCLR_LASTTX_Clear (1UL) /*!< Disable */ + +/* Bit 23 : Write '1' to Disable interrupt for LASTRX event */ +#define TWIM_INTENCLR_LASTRX_Pos (23UL) /*!< Position of LASTRX field. */ +#define TWIM_INTENCLR_LASTRX_Msk (0x1UL << TWIM_INTENCLR_LASTRX_Pos) /*!< Bit mask of LASTRX field. */ +#define TWIM_INTENCLR_LASTRX_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENCLR_LASTRX_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENCLR_LASTRX_Clear (1UL) /*!< Disable */ + +/* Bit 20 : Write '1' to Disable interrupt for TXSTARTED event */ +#define TWIM_INTENCLR_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define TWIM_INTENCLR_TXSTARTED_Msk (0x1UL << TWIM_INTENCLR_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define TWIM_INTENCLR_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENCLR_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENCLR_TXSTARTED_Clear (1UL) /*!< Disable */ + +/* Bit 19 : Write '1' to Disable interrupt for RXSTARTED event */ +#define TWIM_INTENCLR_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define TWIM_INTENCLR_RXSTARTED_Msk (0x1UL << TWIM_INTENCLR_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define TWIM_INTENCLR_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENCLR_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENCLR_RXSTARTED_Clear (1UL) /*!< Disable */ + +/* Bit 18 : Write '1' to Disable interrupt for SUSPENDED event */ +#define TWIM_INTENCLR_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ +#define TWIM_INTENCLR_SUSPENDED_Msk (0x1UL << TWIM_INTENCLR_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ +#define TWIM_INTENCLR_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENCLR_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENCLR_SUSPENDED_Clear (1UL) /*!< Disable */ + +/* Bit 9 : Write '1' to Disable interrupt for ERROR event */ +#define TWIM_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define TWIM_INTENCLR_ERROR_Msk (0x1UL << TWIM_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define TWIM_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for STOPPED event */ +#define TWIM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define TWIM_INTENCLR_STOPPED_Msk (0x1UL << TWIM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define TWIM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Register: TWIM_ERRORSRC */ +/* Description: Error source */ + +/* Bit 2 : NACK received after sending a data byte (write '1' to clear) */ +#define TWIM_ERRORSRC_DNACK_Pos (2UL) /*!< Position of DNACK field. */ +#define TWIM_ERRORSRC_DNACK_Msk (0x1UL << TWIM_ERRORSRC_DNACK_Pos) /*!< Bit mask of DNACK field. */ +#define TWIM_ERRORSRC_DNACK_NotReceived (0UL) /*!< Error did not occur */ +#define TWIM_ERRORSRC_DNACK_Received (1UL) /*!< Error occurred */ + +/* Bit 1 : NACK received after sending the address (write '1' to clear) */ +#define TWIM_ERRORSRC_ANACK_Pos (1UL) /*!< Position of ANACK field. */ +#define TWIM_ERRORSRC_ANACK_Msk (0x1UL << TWIM_ERRORSRC_ANACK_Pos) /*!< Bit mask of ANACK field. */ +#define TWIM_ERRORSRC_ANACK_NotReceived (0UL) /*!< Error did not occur */ +#define TWIM_ERRORSRC_ANACK_Received (1UL) /*!< Error occurred */ + +/* Bit 0 : Overrun error */ +#define TWIM_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */ +#define TWIM_ERRORSRC_OVERRUN_Msk (0x1UL << TWIM_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ +#define TWIM_ERRORSRC_OVERRUN_NotReceived (0UL) /*!< Error did not occur */ +#define TWIM_ERRORSRC_OVERRUN_Received (1UL) /*!< Error occurred */ + +/* Register: TWIM_ENABLE */ +/* Description: Enable TWIM */ + +/* Bits 3..0 : Enable or disable TWIM */ +#define TWIM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define TWIM_ENABLE_ENABLE_Msk (0xFUL << TWIM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define TWIM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable TWIM */ +#define TWIM_ENABLE_ENABLE_Enabled (6UL) /*!< Enable TWIM */ + +/* Register: TWIM_PSEL_SCL */ +/* Description: Pin select for SCL signal */ + +/* Bit 31 : Connection */ +#define TWIM_PSEL_SCL_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define TWIM_PSEL_SCL_CONNECT_Msk (0x1UL << TWIM_PSEL_SCL_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define TWIM_PSEL_SCL_CONNECT_Connected (0UL) /*!< Connect */ +#define TWIM_PSEL_SCL_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define TWIM_PSEL_SCL_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define TWIM_PSEL_SCL_PIN_Msk (0x1FUL << TWIM_PSEL_SCL_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: TWIM_PSEL_SDA */ +/* Description: Pin select for SDA signal */ + +/* Bit 31 : Connection */ +#define TWIM_PSEL_SDA_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define TWIM_PSEL_SDA_CONNECT_Msk (0x1UL << TWIM_PSEL_SDA_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define TWIM_PSEL_SDA_CONNECT_Connected (0UL) /*!< Connect */ +#define TWIM_PSEL_SDA_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define TWIM_PSEL_SDA_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define TWIM_PSEL_SDA_PIN_Msk (0x1FUL << TWIM_PSEL_SDA_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: TWIM_FREQUENCY */ +/* Description: TWI frequency. Accuracy depends on the HFCLK source selected. */ + +/* Bits 31..0 : TWI master clock frequency */ +#define TWIM_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ +#define TWIM_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << TWIM_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ +#define TWIM_FREQUENCY_FREQUENCY_K100 (0x01980000UL) /*!< 100 kbps */ +#define TWIM_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */ +#define TWIM_FREQUENCY_FREQUENCY_K400 (0x06400000UL) /*!< 400 kbps */ + +/* Register: TWIM_RXD_PTR */ +/* Description: Data pointer */ + +/* Bits 31..0 : Data pointer */ +#define TWIM_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define TWIM_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIM_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: TWIM_RXD_MAXCNT */ +/* Description: Maximum number of bytes in receive buffer */ + +/* Bits 9..0 : Maximum number of bytes in receive buffer */ +#define TWIM_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define TWIM_RXD_MAXCNT_MAXCNT_Msk (0x3FFUL << TWIM_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: TWIM_RXD_AMOUNT */ +/* Description: Number of bytes transferred in the last transaction */ + +/* Bits 9..0 : Number of bytes transferred in the last transaction. In case of NACK error, includes the NACK'ed byte. */ +#define TWIM_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define TWIM_RXD_AMOUNT_AMOUNT_Msk (0x3FFUL << TWIM_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: TWIM_RXD_LIST */ +/* Description: EasyDMA list type */ + +/* Bits 2..0 : List type */ +#define TWIM_RXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */ +#define TWIM_RXD_LIST_LIST_Msk (0x7UL << TWIM_RXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */ +#define TWIM_RXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */ +#define TWIM_RXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */ + +/* Register: TWIM_TXD_PTR */ +/* Description: Data pointer */ + +/* Bits 31..0 : Data pointer */ +#define TWIM_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define TWIM_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIM_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: TWIM_TXD_MAXCNT */ +/* Description: Maximum number of bytes in transmit buffer */ + +/* Bits 9..0 : Maximum number of bytes in transmit buffer */ +#define TWIM_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define TWIM_TXD_MAXCNT_MAXCNT_Msk (0x3FFUL << TWIM_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: TWIM_TXD_AMOUNT */ +/* Description: Number of bytes transferred in the last transaction */ + +/* Bits 9..0 : Number of bytes transferred in the last transaction. In case of NACK error, includes the NACK'ed byte. */ +#define TWIM_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define TWIM_TXD_AMOUNT_AMOUNT_Msk (0x3FFUL << TWIM_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: TWIM_TXD_LIST */ +/* Description: EasyDMA list type */ + +/* Bits 2..0 : List type */ +#define TWIM_TXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */ +#define TWIM_TXD_LIST_LIST_Msk (0x7UL << TWIM_TXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */ +#define TWIM_TXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */ +#define TWIM_TXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */ + +/* Register: TWIM_ADDRESS */ +/* Description: Address used in the TWI transfer */ + +/* Bits 6..0 : Address used in the TWI transfer */ +#define TWIM_ADDRESS_ADDRESS_Pos (0UL) /*!< Position of ADDRESS field. */ +#define TWIM_ADDRESS_ADDRESS_Msk (0x7FUL << TWIM_ADDRESS_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ + + +/* Peripheral: TWIS */ +/* Description: I2C compatible Two-Wire Slave Interface with EasyDMA */ + +/* Register: TWIS_TASKS_STOP */ +/* Description: Stop TWI transaction */ + +/* Bit 0 : */ +#define TWIS_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define TWIS_TASKS_STOP_TASKS_STOP_Msk (0x1UL << TWIS_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: TWIS_TASKS_SUSPEND */ +/* Description: Suspend TWI transaction */ + +/* Bit 0 : */ +#define TWIS_TASKS_SUSPEND_TASKS_SUSPEND_Pos (0UL) /*!< Position of TASKS_SUSPEND field. */ +#define TWIS_TASKS_SUSPEND_TASKS_SUSPEND_Msk (0x1UL << TWIS_TASKS_SUSPEND_TASKS_SUSPEND_Pos) /*!< Bit mask of TASKS_SUSPEND field. */ + +/* Register: TWIS_TASKS_RESUME */ +/* Description: Resume TWI transaction */ + +/* Bit 0 : */ +#define TWIS_TASKS_RESUME_TASKS_RESUME_Pos (0UL) /*!< Position of TASKS_RESUME field. */ +#define TWIS_TASKS_RESUME_TASKS_RESUME_Msk (0x1UL << TWIS_TASKS_RESUME_TASKS_RESUME_Pos) /*!< Bit mask of TASKS_RESUME field. */ + +/* Register: TWIS_TASKS_PREPARERX */ +/* Description: Prepare the TWI slave to respond to a write command */ + +/* Bit 0 : */ +#define TWIS_TASKS_PREPARERX_TASKS_PREPARERX_Pos (0UL) /*!< Position of TASKS_PREPARERX field. */ +#define TWIS_TASKS_PREPARERX_TASKS_PREPARERX_Msk (0x1UL << TWIS_TASKS_PREPARERX_TASKS_PREPARERX_Pos) /*!< Bit mask of TASKS_PREPARERX field. */ + +/* Register: TWIS_TASKS_PREPARETX */ +/* Description: Prepare the TWI slave to respond to a read command */ + +/* Bit 0 : */ +#define TWIS_TASKS_PREPARETX_TASKS_PREPARETX_Pos (0UL) /*!< Position of TASKS_PREPARETX field. */ +#define TWIS_TASKS_PREPARETX_TASKS_PREPARETX_Msk (0x1UL << TWIS_TASKS_PREPARETX_TASKS_PREPARETX_Pos) /*!< Bit mask of TASKS_PREPARETX field. */ + +/* Register: TWIS_EVENTS_STOPPED */ +/* Description: TWI stopped */ + +/* Bit 0 : */ +#define TWIS_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */ +#define TWIS_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << TWIS_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */ + +/* Register: TWIS_EVENTS_ERROR */ +/* Description: TWI error */ + +/* Bit 0 : */ +#define TWIS_EVENTS_ERROR_EVENTS_ERROR_Pos (0UL) /*!< Position of EVENTS_ERROR field. */ +#define TWIS_EVENTS_ERROR_EVENTS_ERROR_Msk (0x1UL << TWIS_EVENTS_ERROR_EVENTS_ERROR_Pos) /*!< Bit mask of EVENTS_ERROR field. */ + +/* Register: TWIS_EVENTS_RXSTARTED */ +/* Description: Receive sequence started */ + +/* Bit 0 : */ +#define TWIS_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos (0UL) /*!< Position of EVENTS_RXSTARTED field. */ +#define TWIS_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Msk (0x1UL << TWIS_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos) /*!< Bit mask of EVENTS_RXSTARTED field. */ + +/* Register: TWIS_EVENTS_TXSTARTED */ +/* Description: Transmit sequence started */ + +/* Bit 0 : */ +#define TWIS_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos (0UL) /*!< Position of EVENTS_TXSTARTED field. */ +#define TWIS_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Msk (0x1UL << TWIS_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos) /*!< Bit mask of EVENTS_TXSTARTED field. */ + +/* Register: TWIS_EVENTS_WRITE */ +/* Description: Write command received */ + +/* Bit 0 : */ +#define TWIS_EVENTS_WRITE_EVENTS_WRITE_Pos (0UL) /*!< Position of EVENTS_WRITE field. */ +#define TWIS_EVENTS_WRITE_EVENTS_WRITE_Msk (0x1UL << TWIS_EVENTS_WRITE_EVENTS_WRITE_Pos) /*!< Bit mask of EVENTS_WRITE field. */ + +/* Register: TWIS_EVENTS_READ */ +/* Description: Read command received */ + +/* Bit 0 : */ +#define TWIS_EVENTS_READ_EVENTS_READ_Pos (0UL) /*!< Position of EVENTS_READ field. */ +#define TWIS_EVENTS_READ_EVENTS_READ_Msk (0x1UL << TWIS_EVENTS_READ_EVENTS_READ_Pos) /*!< Bit mask of EVENTS_READ field. */ + +/* Register: TWIS_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 14 : Shortcut between READ event and SUSPEND task */ +#define TWIS_SHORTS_READ_SUSPEND_Pos (14UL) /*!< Position of READ_SUSPEND field. */ +#define TWIS_SHORTS_READ_SUSPEND_Msk (0x1UL << TWIS_SHORTS_READ_SUSPEND_Pos) /*!< Bit mask of READ_SUSPEND field. */ +#define TWIS_SHORTS_READ_SUSPEND_Disabled (0UL) /*!< Disable shortcut */ +#define TWIS_SHORTS_READ_SUSPEND_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 13 : Shortcut between WRITE event and SUSPEND task */ +#define TWIS_SHORTS_WRITE_SUSPEND_Pos (13UL) /*!< Position of WRITE_SUSPEND field. */ +#define TWIS_SHORTS_WRITE_SUSPEND_Msk (0x1UL << TWIS_SHORTS_WRITE_SUSPEND_Pos) /*!< Bit mask of WRITE_SUSPEND field. */ +#define TWIS_SHORTS_WRITE_SUSPEND_Disabled (0UL) /*!< Disable shortcut */ +#define TWIS_SHORTS_WRITE_SUSPEND_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: TWIS_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 26 : Enable or disable interrupt for READ event */ +#define TWIS_INTEN_READ_Pos (26UL) /*!< Position of READ field. */ +#define TWIS_INTEN_READ_Msk (0x1UL << TWIS_INTEN_READ_Pos) /*!< Bit mask of READ field. */ +#define TWIS_INTEN_READ_Disabled (0UL) /*!< Disable */ +#define TWIS_INTEN_READ_Enabled (1UL) /*!< Enable */ + +/* Bit 25 : Enable or disable interrupt for WRITE event */ +#define TWIS_INTEN_WRITE_Pos (25UL) /*!< Position of WRITE field. */ +#define TWIS_INTEN_WRITE_Msk (0x1UL << TWIS_INTEN_WRITE_Pos) /*!< Bit mask of WRITE field. */ +#define TWIS_INTEN_WRITE_Disabled (0UL) /*!< Disable */ +#define TWIS_INTEN_WRITE_Enabled (1UL) /*!< Enable */ + +/* Bit 20 : Enable or disable interrupt for TXSTARTED event */ +#define TWIS_INTEN_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define TWIS_INTEN_TXSTARTED_Msk (0x1UL << TWIS_INTEN_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define TWIS_INTEN_TXSTARTED_Disabled (0UL) /*!< Disable */ +#define TWIS_INTEN_TXSTARTED_Enabled (1UL) /*!< Enable */ + +/* Bit 19 : Enable or disable interrupt for RXSTARTED event */ +#define TWIS_INTEN_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define TWIS_INTEN_RXSTARTED_Msk (0x1UL << TWIS_INTEN_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define TWIS_INTEN_RXSTARTED_Disabled (0UL) /*!< Disable */ +#define TWIS_INTEN_RXSTARTED_Enabled (1UL) /*!< Enable */ + +/* Bit 9 : Enable or disable interrupt for ERROR event */ +#define TWIS_INTEN_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define TWIS_INTEN_ERROR_Msk (0x1UL << TWIS_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define TWIS_INTEN_ERROR_Disabled (0UL) /*!< Disable */ +#define TWIS_INTEN_ERROR_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for STOPPED event */ +#define TWIS_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define TWIS_INTEN_STOPPED_Msk (0x1UL << TWIS_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define TWIS_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ +#define TWIS_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ + +/* Register: TWIS_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 26 : Write '1' to Enable interrupt for READ event */ +#define TWIS_INTENSET_READ_Pos (26UL) /*!< Position of READ field. */ +#define TWIS_INTENSET_READ_Msk (0x1UL << TWIS_INTENSET_READ_Pos) /*!< Bit mask of READ field. */ +#define TWIS_INTENSET_READ_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENSET_READ_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENSET_READ_Set (1UL) /*!< Enable */ + +/* Bit 25 : Write '1' to Enable interrupt for WRITE event */ +#define TWIS_INTENSET_WRITE_Pos (25UL) /*!< Position of WRITE field. */ +#define TWIS_INTENSET_WRITE_Msk (0x1UL << TWIS_INTENSET_WRITE_Pos) /*!< Bit mask of WRITE field. */ +#define TWIS_INTENSET_WRITE_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENSET_WRITE_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENSET_WRITE_Set (1UL) /*!< Enable */ + +/* Bit 20 : Write '1' to Enable interrupt for TXSTARTED event */ +#define TWIS_INTENSET_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define TWIS_INTENSET_TXSTARTED_Msk (0x1UL << TWIS_INTENSET_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define TWIS_INTENSET_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENSET_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENSET_TXSTARTED_Set (1UL) /*!< Enable */ + +/* Bit 19 : Write '1' to Enable interrupt for RXSTARTED event */ +#define TWIS_INTENSET_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define TWIS_INTENSET_RXSTARTED_Msk (0x1UL << TWIS_INTENSET_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define TWIS_INTENSET_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENSET_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENSET_RXSTARTED_Set (1UL) /*!< Enable */ + +/* Bit 9 : Write '1' to Enable interrupt for ERROR event */ +#define TWIS_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define TWIS_INTENSET_ERROR_Msk (0x1UL << TWIS_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define TWIS_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENSET_ERROR_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for STOPPED event */ +#define TWIS_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define TWIS_INTENSET_STOPPED_Msk (0x1UL << TWIS_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define TWIS_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Register: TWIS_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 26 : Write '1' to Disable interrupt for READ event */ +#define TWIS_INTENCLR_READ_Pos (26UL) /*!< Position of READ field. */ +#define TWIS_INTENCLR_READ_Msk (0x1UL << TWIS_INTENCLR_READ_Pos) /*!< Bit mask of READ field. */ +#define TWIS_INTENCLR_READ_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENCLR_READ_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENCLR_READ_Clear (1UL) /*!< Disable */ + +/* Bit 25 : Write '1' to Disable interrupt for WRITE event */ +#define TWIS_INTENCLR_WRITE_Pos (25UL) /*!< Position of WRITE field. */ +#define TWIS_INTENCLR_WRITE_Msk (0x1UL << TWIS_INTENCLR_WRITE_Pos) /*!< Bit mask of WRITE field. */ +#define TWIS_INTENCLR_WRITE_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENCLR_WRITE_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENCLR_WRITE_Clear (1UL) /*!< Disable */ + +/* Bit 20 : Write '1' to Disable interrupt for TXSTARTED event */ +#define TWIS_INTENCLR_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define TWIS_INTENCLR_TXSTARTED_Msk (0x1UL << TWIS_INTENCLR_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define TWIS_INTENCLR_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENCLR_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENCLR_TXSTARTED_Clear (1UL) /*!< Disable */ + +/* Bit 19 : Write '1' to Disable interrupt for RXSTARTED event */ +#define TWIS_INTENCLR_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define TWIS_INTENCLR_RXSTARTED_Msk (0x1UL << TWIS_INTENCLR_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define TWIS_INTENCLR_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENCLR_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENCLR_RXSTARTED_Clear (1UL) /*!< Disable */ + +/* Bit 9 : Write '1' to Disable interrupt for ERROR event */ +#define TWIS_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define TWIS_INTENCLR_ERROR_Msk (0x1UL << TWIS_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define TWIS_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for STOPPED event */ +#define TWIS_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define TWIS_INTENCLR_STOPPED_Msk (0x1UL << TWIS_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define TWIS_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Register: TWIS_ERRORSRC */ +/* Description: Error source */ + +/* Bit 3 : TX buffer over-read detected, and prevented */ +#define TWIS_ERRORSRC_OVERREAD_Pos (3UL) /*!< Position of OVERREAD field. */ +#define TWIS_ERRORSRC_OVERREAD_Msk (0x1UL << TWIS_ERRORSRC_OVERREAD_Pos) /*!< Bit mask of OVERREAD field. */ +#define TWIS_ERRORSRC_OVERREAD_NotDetected (0UL) /*!< Error did not occur */ +#define TWIS_ERRORSRC_OVERREAD_Detected (1UL) /*!< Error occurred */ + +/* Bit 2 : NACK sent after receiving a data byte */ +#define TWIS_ERRORSRC_DNACK_Pos (2UL) /*!< Position of DNACK field. */ +#define TWIS_ERRORSRC_DNACK_Msk (0x1UL << TWIS_ERRORSRC_DNACK_Pos) /*!< Bit mask of DNACK field. */ +#define TWIS_ERRORSRC_DNACK_NotReceived (0UL) /*!< Error did not occur */ +#define TWIS_ERRORSRC_DNACK_Received (1UL) /*!< Error occurred */ + +/* Bit 0 : RX buffer overflow detected, and prevented */ +#define TWIS_ERRORSRC_OVERFLOW_Pos (0UL) /*!< Position of OVERFLOW field. */ +#define TWIS_ERRORSRC_OVERFLOW_Msk (0x1UL << TWIS_ERRORSRC_OVERFLOW_Pos) /*!< Bit mask of OVERFLOW field. */ +#define TWIS_ERRORSRC_OVERFLOW_NotDetected (0UL) /*!< Error did not occur */ +#define TWIS_ERRORSRC_OVERFLOW_Detected (1UL) /*!< Error occurred */ + +/* Register: TWIS_MATCH */ +/* Description: Status register indicating which address had a match */ + +/* Bit 0 : Which of the addresses in {ADDRESS} matched the incoming address */ +#define TWIS_MATCH_MATCH_Pos (0UL) /*!< Position of MATCH field. */ +#define TWIS_MATCH_MATCH_Msk (0x1UL << TWIS_MATCH_MATCH_Pos) /*!< Bit mask of MATCH field. */ + +/* Register: TWIS_ENABLE */ +/* Description: Enable TWIS */ + +/* Bits 3..0 : Enable or disable TWIS */ +#define TWIS_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define TWIS_ENABLE_ENABLE_Msk (0xFUL << TWIS_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define TWIS_ENABLE_ENABLE_Disabled (0UL) /*!< Disable TWIS */ +#define TWIS_ENABLE_ENABLE_Enabled (9UL) /*!< Enable TWIS */ + +/* Register: TWIS_PSEL_SCL */ +/* Description: Pin select for SCL signal */ + +/* Bit 31 : Connection */ +#define TWIS_PSEL_SCL_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define TWIS_PSEL_SCL_CONNECT_Msk (0x1UL << TWIS_PSEL_SCL_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define TWIS_PSEL_SCL_CONNECT_Connected (0UL) /*!< Connect */ +#define TWIS_PSEL_SCL_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define TWIS_PSEL_SCL_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define TWIS_PSEL_SCL_PIN_Msk (0x1FUL << TWIS_PSEL_SCL_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: TWIS_PSEL_SDA */ +/* Description: Pin select for SDA signal */ + +/* Bit 31 : Connection */ +#define TWIS_PSEL_SDA_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define TWIS_PSEL_SDA_CONNECT_Msk (0x1UL << TWIS_PSEL_SDA_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define TWIS_PSEL_SDA_CONNECT_Connected (0UL) /*!< Connect */ +#define TWIS_PSEL_SDA_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define TWIS_PSEL_SDA_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define TWIS_PSEL_SDA_PIN_Msk (0x1FUL << TWIS_PSEL_SDA_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: TWIS_RXD_PTR */ +/* Description: RXD Data pointer */ + +/* Bits 31..0 : RXD Data pointer */ +#define TWIS_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define TWIS_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIS_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: TWIS_RXD_MAXCNT */ +/* Description: Maximum number of bytes in RXD buffer */ + +/* Bits 9..0 : Maximum number of bytes in RXD buffer */ +#define TWIS_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define TWIS_RXD_MAXCNT_MAXCNT_Msk (0x3FFUL << TWIS_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: TWIS_RXD_AMOUNT */ +/* Description: Number of bytes transferred in the last RXD transaction */ + +/* Bits 9..0 : Number of bytes transferred in the last RXD transaction */ +#define TWIS_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define TWIS_RXD_AMOUNT_AMOUNT_Msk (0x3FFUL << TWIS_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: TWIS_TXD_PTR */ +/* Description: TXD Data pointer */ + +/* Bits 31..0 : TXD Data pointer */ +#define TWIS_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define TWIS_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIS_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: TWIS_TXD_MAXCNT */ +/* Description: Maximum number of bytes in TXD buffer */ + +/* Bits 9..0 : Maximum number of bytes in TXD buffer */ +#define TWIS_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define TWIS_TXD_MAXCNT_MAXCNT_Msk (0x3FFUL << TWIS_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: TWIS_TXD_AMOUNT */ +/* Description: Number of bytes transferred in the last TXD transaction */ + +/* Bits 9..0 : Number of bytes transferred in the last TXD transaction */ +#define TWIS_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define TWIS_TXD_AMOUNT_AMOUNT_Msk (0x3FFUL << TWIS_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: TWIS_ADDRESS */ +/* Description: Description collection[0]: TWI slave address 0 */ + +/* Bits 6..0 : TWI slave address */ +#define TWIS_ADDRESS_ADDRESS_Pos (0UL) /*!< Position of ADDRESS field. */ +#define TWIS_ADDRESS_ADDRESS_Msk (0x7FUL << TWIS_ADDRESS_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ + +/* Register: TWIS_CONFIG */ +/* Description: Configuration register for the address match mechanism */ + +/* Bit 1 : Enable or disable address matching on ADDRESS[1] */ +#define TWIS_CONFIG_ADDRESS1_Pos (1UL) /*!< Position of ADDRESS1 field. */ +#define TWIS_CONFIG_ADDRESS1_Msk (0x1UL << TWIS_CONFIG_ADDRESS1_Pos) /*!< Bit mask of ADDRESS1 field. */ +#define TWIS_CONFIG_ADDRESS1_Disabled (0UL) /*!< Disabled */ +#define TWIS_CONFIG_ADDRESS1_Enabled (1UL) /*!< Enabled */ + +/* Bit 0 : Enable or disable address matching on ADDRESS[0] */ +#define TWIS_CONFIG_ADDRESS0_Pos (0UL) /*!< Position of ADDRESS0 field. */ +#define TWIS_CONFIG_ADDRESS0_Msk (0x1UL << TWIS_CONFIG_ADDRESS0_Pos) /*!< Bit mask of ADDRESS0 field. */ +#define TWIS_CONFIG_ADDRESS0_Disabled (0UL) /*!< Disabled */ +#define TWIS_CONFIG_ADDRESS0_Enabled (1UL) /*!< Enabled */ + +/* Register: TWIS_ORC */ +/* Description: Over-read character. Character sent out in case of an over-read of the transmit buffer. */ + +/* Bits 7..0 : Over-read character. Character sent out in case of an over-read of the transmit buffer. */ +#define TWIS_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */ +#define TWIS_ORC_ORC_Msk (0xFFUL << TWIS_ORC_ORC_Pos) /*!< Bit mask of ORC field. */ + + +/* Peripheral: UARTE */ +/* Description: UART with EasyDMA */ + +/* Register: UARTE_TASKS_STARTRX */ +/* Description: Start UART receiver */ + +/* Bit 0 : */ +#define UARTE_TASKS_STARTRX_TASKS_STARTRX_Pos (0UL) /*!< Position of TASKS_STARTRX field. */ +#define UARTE_TASKS_STARTRX_TASKS_STARTRX_Msk (0x1UL << UARTE_TASKS_STARTRX_TASKS_STARTRX_Pos) /*!< Bit mask of TASKS_STARTRX field. */ + +/* Register: UARTE_TASKS_STOPRX */ +/* Description: Stop UART receiver */ + +/* Bit 0 : */ +#define UARTE_TASKS_STOPRX_TASKS_STOPRX_Pos (0UL) /*!< Position of TASKS_STOPRX field. */ +#define UARTE_TASKS_STOPRX_TASKS_STOPRX_Msk (0x1UL << UARTE_TASKS_STOPRX_TASKS_STOPRX_Pos) /*!< Bit mask of TASKS_STOPRX field. */ + +/* Register: UARTE_TASKS_STARTTX */ +/* Description: Start UART transmitter */ + +/* Bit 0 : */ +#define UARTE_TASKS_STARTTX_TASKS_STARTTX_Pos (0UL) /*!< Position of TASKS_STARTTX field. */ +#define UARTE_TASKS_STARTTX_TASKS_STARTTX_Msk (0x1UL << UARTE_TASKS_STARTTX_TASKS_STARTTX_Pos) /*!< Bit mask of TASKS_STARTTX field. */ + +/* Register: UARTE_TASKS_STOPTX */ +/* Description: Stop UART transmitter */ + +/* Bit 0 : */ +#define UARTE_TASKS_STOPTX_TASKS_STOPTX_Pos (0UL) /*!< Position of TASKS_STOPTX field. */ +#define UARTE_TASKS_STOPTX_TASKS_STOPTX_Msk (0x1UL << UARTE_TASKS_STOPTX_TASKS_STOPTX_Pos) /*!< Bit mask of TASKS_STOPTX field. */ + +/* Register: UARTE_TASKS_FLUSHRX */ +/* Description: Flush RX FIFO into RX buffer */ + +/* Bit 0 : */ +#define UARTE_TASKS_FLUSHRX_TASKS_FLUSHRX_Pos (0UL) /*!< Position of TASKS_FLUSHRX field. */ +#define UARTE_TASKS_FLUSHRX_TASKS_FLUSHRX_Msk (0x1UL << UARTE_TASKS_FLUSHRX_TASKS_FLUSHRX_Pos) /*!< Bit mask of TASKS_FLUSHRX field. */ + +/* Register: UARTE_EVENTS_CTS */ +/* Description: CTS is activated (set low). Clear To Send. */ + +/* Bit 0 : */ +#define UARTE_EVENTS_CTS_EVENTS_CTS_Pos (0UL) /*!< Position of EVENTS_CTS field. */ +#define UARTE_EVENTS_CTS_EVENTS_CTS_Msk (0x1UL << UARTE_EVENTS_CTS_EVENTS_CTS_Pos) /*!< Bit mask of EVENTS_CTS field. */ + +/* Register: UARTE_EVENTS_NCTS */ +/* Description: CTS is deactivated (set high). Not Clear To Send. */ + +/* Bit 0 : */ +#define UARTE_EVENTS_NCTS_EVENTS_NCTS_Pos (0UL) /*!< Position of EVENTS_NCTS field. */ +#define UARTE_EVENTS_NCTS_EVENTS_NCTS_Msk (0x1UL << UARTE_EVENTS_NCTS_EVENTS_NCTS_Pos) /*!< Bit mask of EVENTS_NCTS field. */ + +/* Register: UARTE_EVENTS_RXDRDY */ +/* Description: Data received in RXD (but potentially not yet transferred to Data RAM) */ + +/* Bit 0 : */ +#define UARTE_EVENTS_RXDRDY_EVENTS_RXDRDY_Pos (0UL) /*!< Position of EVENTS_RXDRDY field. */ +#define UARTE_EVENTS_RXDRDY_EVENTS_RXDRDY_Msk (0x1UL << UARTE_EVENTS_RXDRDY_EVENTS_RXDRDY_Pos) /*!< Bit mask of EVENTS_RXDRDY field. */ + +/* Register: UARTE_EVENTS_ENDRX */ +/* Description: Receive buffer is filled up */ + +/* Bit 0 : */ +#define UARTE_EVENTS_ENDRX_EVENTS_ENDRX_Pos (0UL) /*!< Position of EVENTS_ENDRX field. */ +#define UARTE_EVENTS_ENDRX_EVENTS_ENDRX_Msk (0x1UL << UARTE_EVENTS_ENDRX_EVENTS_ENDRX_Pos) /*!< Bit mask of EVENTS_ENDRX field. */ + +/* Register: UARTE_EVENTS_TXDRDY */ +/* Description: Data sent from TXD */ + +/* Bit 0 : */ +#define UARTE_EVENTS_TXDRDY_EVENTS_TXDRDY_Pos (0UL) /*!< Position of EVENTS_TXDRDY field. */ +#define UARTE_EVENTS_TXDRDY_EVENTS_TXDRDY_Msk (0x1UL << UARTE_EVENTS_TXDRDY_EVENTS_TXDRDY_Pos) /*!< Bit mask of EVENTS_TXDRDY field. */ + +/* Register: UARTE_EVENTS_ENDTX */ +/* Description: Last TX byte transmitted */ + +/* Bit 0 : */ +#define UARTE_EVENTS_ENDTX_EVENTS_ENDTX_Pos (0UL) /*!< Position of EVENTS_ENDTX field. */ +#define UARTE_EVENTS_ENDTX_EVENTS_ENDTX_Msk (0x1UL << UARTE_EVENTS_ENDTX_EVENTS_ENDTX_Pos) /*!< Bit mask of EVENTS_ENDTX field. */ + +/* Register: UARTE_EVENTS_ERROR */ +/* Description: Error detected */ + +/* Bit 0 : */ +#define UARTE_EVENTS_ERROR_EVENTS_ERROR_Pos (0UL) /*!< Position of EVENTS_ERROR field. */ +#define UARTE_EVENTS_ERROR_EVENTS_ERROR_Msk (0x1UL << UARTE_EVENTS_ERROR_EVENTS_ERROR_Pos) /*!< Bit mask of EVENTS_ERROR field. */ + +/* Register: UARTE_EVENTS_RXTO */ +/* Description: Receiver timeout */ + +/* Bit 0 : */ +#define UARTE_EVENTS_RXTO_EVENTS_RXTO_Pos (0UL) /*!< Position of EVENTS_RXTO field. */ +#define UARTE_EVENTS_RXTO_EVENTS_RXTO_Msk (0x1UL << UARTE_EVENTS_RXTO_EVENTS_RXTO_Pos) /*!< Bit mask of EVENTS_RXTO field. */ + +/* Register: UARTE_EVENTS_RXSTARTED */ +/* Description: UART receiver has started */ + +/* Bit 0 : */ +#define UARTE_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos (0UL) /*!< Position of EVENTS_RXSTARTED field. */ +#define UARTE_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Msk (0x1UL << UARTE_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos) /*!< Bit mask of EVENTS_RXSTARTED field. */ + +/* Register: UARTE_EVENTS_TXSTARTED */ +/* Description: UART transmitter has started */ + +/* Bit 0 : */ +#define UARTE_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos (0UL) /*!< Position of EVENTS_TXSTARTED field. */ +#define UARTE_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Msk (0x1UL << UARTE_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos) /*!< Bit mask of EVENTS_TXSTARTED field. */ + +/* Register: UARTE_EVENTS_TXSTOPPED */ +/* Description: Transmitter stopped */ + +/* Bit 0 : */ +#define UARTE_EVENTS_TXSTOPPED_EVENTS_TXSTOPPED_Pos (0UL) /*!< Position of EVENTS_TXSTOPPED field. */ +#define UARTE_EVENTS_TXSTOPPED_EVENTS_TXSTOPPED_Msk (0x1UL << UARTE_EVENTS_TXSTOPPED_EVENTS_TXSTOPPED_Pos) /*!< Bit mask of EVENTS_TXSTOPPED field. */ + +/* Register: UARTE_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 6 : Shortcut between ENDRX event and STOPRX task */ +#define UARTE_SHORTS_ENDRX_STOPRX_Pos (6UL) /*!< Position of ENDRX_STOPRX field. */ +#define UARTE_SHORTS_ENDRX_STOPRX_Msk (0x1UL << UARTE_SHORTS_ENDRX_STOPRX_Pos) /*!< Bit mask of ENDRX_STOPRX field. */ +#define UARTE_SHORTS_ENDRX_STOPRX_Disabled (0UL) /*!< Disable shortcut */ +#define UARTE_SHORTS_ENDRX_STOPRX_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 5 : Shortcut between ENDRX event and STARTRX task */ +#define UARTE_SHORTS_ENDRX_STARTRX_Pos (5UL) /*!< Position of ENDRX_STARTRX field. */ +#define UARTE_SHORTS_ENDRX_STARTRX_Msk (0x1UL << UARTE_SHORTS_ENDRX_STARTRX_Pos) /*!< Bit mask of ENDRX_STARTRX field. */ +#define UARTE_SHORTS_ENDRX_STARTRX_Disabled (0UL) /*!< Disable shortcut */ +#define UARTE_SHORTS_ENDRX_STARTRX_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: UARTE_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 22 : Enable or disable interrupt for TXSTOPPED event */ +#define UARTE_INTEN_TXSTOPPED_Pos (22UL) /*!< Position of TXSTOPPED field. */ +#define UARTE_INTEN_TXSTOPPED_Msk (0x1UL << UARTE_INTEN_TXSTOPPED_Pos) /*!< Bit mask of TXSTOPPED field. */ +#define UARTE_INTEN_TXSTOPPED_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_TXSTOPPED_Enabled (1UL) /*!< Enable */ + +/* Bit 20 : Enable or disable interrupt for TXSTARTED event */ +#define UARTE_INTEN_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define UARTE_INTEN_TXSTARTED_Msk (0x1UL << UARTE_INTEN_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define UARTE_INTEN_TXSTARTED_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_TXSTARTED_Enabled (1UL) /*!< Enable */ + +/* Bit 19 : Enable or disable interrupt for RXSTARTED event */ +#define UARTE_INTEN_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define UARTE_INTEN_RXSTARTED_Msk (0x1UL << UARTE_INTEN_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define UARTE_INTEN_RXSTARTED_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_RXSTARTED_Enabled (1UL) /*!< Enable */ + +/* Bit 17 : Enable or disable interrupt for RXTO event */ +#define UARTE_INTEN_RXTO_Pos (17UL) /*!< Position of RXTO field. */ +#define UARTE_INTEN_RXTO_Msk (0x1UL << UARTE_INTEN_RXTO_Pos) /*!< Bit mask of RXTO field. */ +#define UARTE_INTEN_RXTO_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_RXTO_Enabled (1UL) /*!< Enable */ + +/* Bit 9 : Enable or disable interrupt for ERROR event */ +#define UARTE_INTEN_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define UARTE_INTEN_ERROR_Msk (0x1UL << UARTE_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define UARTE_INTEN_ERROR_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_ERROR_Enabled (1UL) /*!< Enable */ + +/* Bit 8 : Enable or disable interrupt for ENDTX event */ +#define UARTE_INTEN_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ +#define UARTE_INTEN_ENDTX_Msk (0x1UL << UARTE_INTEN_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ +#define UARTE_INTEN_ENDTX_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_ENDTX_Enabled (1UL) /*!< Enable */ + +/* Bit 7 : Enable or disable interrupt for TXDRDY event */ +#define UARTE_INTEN_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ +#define UARTE_INTEN_TXDRDY_Msk (0x1UL << UARTE_INTEN_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ +#define UARTE_INTEN_TXDRDY_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_TXDRDY_Enabled (1UL) /*!< Enable */ + +/* Bit 4 : Enable or disable interrupt for ENDRX event */ +#define UARTE_INTEN_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ +#define UARTE_INTEN_ENDRX_Msk (0x1UL << UARTE_INTEN_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define UARTE_INTEN_ENDRX_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_ENDRX_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable interrupt for RXDRDY event */ +#define UARTE_INTEN_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ +#define UARTE_INTEN_RXDRDY_Msk (0x1UL << UARTE_INTEN_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ +#define UARTE_INTEN_RXDRDY_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_RXDRDY_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for NCTS event */ +#define UARTE_INTEN_NCTS_Pos (1UL) /*!< Position of NCTS field. */ +#define UARTE_INTEN_NCTS_Msk (0x1UL << UARTE_INTEN_NCTS_Pos) /*!< Bit mask of NCTS field. */ +#define UARTE_INTEN_NCTS_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_NCTS_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable interrupt for CTS event */ +#define UARTE_INTEN_CTS_Pos (0UL) /*!< Position of CTS field. */ +#define UARTE_INTEN_CTS_Msk (0x1UL << UARTE_INTEN_CTS_Pos) /*!< Bit mask of CTS field. */ +#define UARTE_INTEN_CTS_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_CTS_Enabled (1UL) /*!< Enable */ + +/* Register: UARTE_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 22 : Write '1' to Enable interrupt for TXSTOPPED event */ +#define UARTE_INTENSET_TXSTOPPED_Pos (22UL) /*!< Position of TXSTOPPED field. */ +#define UARTE_INTENSET_TXSTOPPED_Msk (0x1UL << UARTE_INTENSET_TXSTOPPED_Pos) /*!< Bit mask of TXSTOPPED field. */ +#define UARTE_INTENSET_TXSTOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_TXSTOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_TXSTOPPED_Set (1UL) /*!< Enable */ + +/* Bit 20 : Write '1' to Enable interrupt for TXSTARTED event */ +#define UARTE_INTENSET_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define UARTE_INTENSET_TXSTARTED_Msk (0x1UL << UARTE_INTENSET_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define UARTE_INTENSET_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_TXSTARTED_Set (1UL) /*!< Enable */ + +/* Bit 19 : Write '1' to Enable interrupt for RXSTARTED event */ +#define UARTE_INTENSET_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define UARTE_INTENSET_RXSTARTED_Msk (0x1UL << UARTE_INTENSET_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define UARTE_INTENSET_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_RXSTARTED_Set (1UL) /*!< Enable */ + +/* Bit 17 : Write '1' to Enable interrupt for RXTO event */ +#define UARTE_INTENSET_RXTO_Pos (17UL) /*!< Position of RXTO field. */ +#define UARTE_INTENSET_RXTO_Msk (0x1UL << UARTE_INTENSET_RXTO_Pos) /*!< Bit mask of RXTO field. */ +#define UARTE_INTENSET_RXTO_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_RXTO_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_RXTO_Set (1UL) /*!< Enable */ + +/* Bit 9 : Write '1' to Enable interrupt for ERROR event */ +#define UARTE_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define UARTE_INTENSET_ERROR_Msk (0x1UL << UARTE_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define UARTE_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_ERROR_Set (1UL) /*!< Enable */ + +/* Bit 8 : Write '1' to Enable interrupt for ENDTX event */ +#define UARTE_INTENSET_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ +#define UARTE_INTENSET_ENDTX_Msk (0x1UL << UARTE_INTENSET_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ +#define UARTE_INTENSET_ENDTX_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_ENDTX_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_ENDTX_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to Enable interrupt for TXDRDY event */ +#define UARTE_INTENSET_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ +#define UARTE_INTENSET_TXDRDY_Msk (0x1UL << UARTE_INTENSET_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ +#define UARTE_INTENSET_TXDRDY_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_TXDRDY_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_TXDRDY_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to Enable interrupt for ENDRX event */ +#define UARTE_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ +#define UARTE_INTENSET_ENDRX_Msk (0x1UL << UARTE_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define UARTE_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_ENDRX_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable interrupt for RXDRDY event */ +#define UARTE_INTENSET_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ +#define UARTE_INTENSET_RXDRDY_Msk (0x1UL << UARTE_INTENSET_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ +#define UARTE_INTENSET_RXDRDY_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_RXDRDY_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_RXDRDY_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for NCTS event */ +#define UARTE_INTENSET_NCTS_Pos (1UL) /*!< Position of NCTS field. */ +#define UARTE_INTENSET_NCTS_Msk (0x1UL << UARTE_INTENSET_NCTS_Pos) /*!< Bit mask of NCTS field. */ +#define UARTE_INTENSET_NCTS_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_NCTS_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_NCTS_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for CTS event */ +#define UARTE_INTENSET_CTS_Pos (0UL) /*!< Position of CTS field. */ +#define UARTE_INTENSET_CTS_Msk (0x1UL << UARTE_INTENSET_CTS_Pos) /*!< Bit mask of CTS field. */ +#define UARTE_INTENSET_CTS_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_CTS_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_CTS_Set (1UL) /*!< Enable */ + +/* Register: UARTE_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 22 : Write '1' to Disable interrupt for TXSTOPPED event */ +#define UARTE_INTENCLR_TXSTOPPED_Pos (22UL) /*!< Position of TXSTOPPED field. */ +#define UARTE_INTENCLR_TXSTOPPED_Msk (0x1UL << UARTE_INTENCLR_TXSTOPPED_Pos) /*!< Bit mask of TXSTOPPED field. */ +#define UARTE_INTENCLR_TXSTOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_TXSTOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_TXSTOPPED_Clear (1UL) /*!< Disable */ + +/* Bit 20 : Write '1' to Disable interrupt for TXSTARTED event */ +#define UARTE_INTENCLR_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define UARTE_INTENCLR_TXSTARTED_Msk (0x1UL << UARTE_INTENCLR_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define UARTE_INTENCLR_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_TXSTARTED_Clear (1UL) /*!< Disable */ + +/* Bit 19 : Write '1' to Disable interrupt for RXSTARTED event */ +#define UARTE_INTENCLR_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define UARTE_INTENCLR_RXSTARTED_Msk (0x1UL << UARTE_INTENCLR_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define UARTE_INTENCLR_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_RXSTARTED_Clear (1UL) /*!< Disable */ + +/* Bit 17 : Write '1' to Disable interrupt for RXTO event */ +#define UARTE_INTENCLR_RXTO_Pos (17UL) /*!< Position of RXTO field. */ +#define UARTE_INTENCLR_RXTO_Msk (0x1UL << UARTE_INTENCLR_RXTO_Pos) /*!< Bit mask of RXTO field. */ +#define UARTE_INTENCLR_RXTO_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_RXTO_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_RXTO_Clear (1UL) /*!< Disable */ + +/* Bit 9 : Write '1' to Disable interrupt for ERROR event */ +#define UARTE_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define UARTE_INTENCLR_ERROR_Msk (0x1UL << UARTE_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define UARTE_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ + +/* Bit 8 : Write '1' to Disable interrupt for ENDTX event */ +#define UARTE_INTENCLR_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ +#define UARTE_INTENCLR_ENDTX_Msk (0x1UL << UARTE_INTENCLR_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ +#define UARTE_INTENCLR_ENDTX_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_ENDTX_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_ENDTX_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to Disable interrupt for TXDRDY event */ +#define UARTE_INTENCLR_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ +#define UARTE_INTENCLR_TXDRDY_Msk (0x1UL << UARTE_INTENCLR_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ +#define UARTE_INTENCLR_TXDRDY_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_TXDRDY_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_TXDRDY_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to Disable interrupt for ENDRX event */ +#define UARTE_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ +#define UARTE_INTENCLR_ENDRX_Msk (0x1UL << UARTE_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define UARTE_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable interrupt for RXDRDY event */ +#define UARTE_INTENCLR_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ +#define UARTE_INTENCLR_RXDRDY_Msk (0x1UL << UARTE_INTENCLR_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ +#define UARTE_INTENCLR_RXDRDY_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_RXDRDY_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_RXDRDY_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for NCTS event */ +#define UARTE_INTENCLR_NCTS_Pos (1UL) /*!< Position of NCTS field. */ +#define UARTE_INTENCLR_NCTS_Msk (0x1UL << UARTE_INTENCLR_NCTS_Pos) /*!< Bit mask of NCTS field. */ +#define UARTE_INTENCLR_NCTS_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_NCTS_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_NCTS_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for CTS event */ +#define UARTE_INTENCLR_CTS_Pos (0UL) /*!< Position of CTS field. */ +#define UARTE_INTENCLR_CTS_Msk (0x1UL << UARTE_INTENCLR_CTS_Pos) /*!< Bit mask of CTS field. */ +#define UARTE_INTENCLR_CTS_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_CTS_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_CTS_Clear (1UL) /*!< Disable */ + +/* Register: UARTE_ERRORSRC */ +/* Description: Error source Note : this register is read / write one to clear. */ + +/* Bit 3 : Break condition */ +#define UARTE_ERRORSRC_BREAK_Pos (3UL) /*!< Position of BREAK field. */ +#define UARTE_ERRORSRC_BREAK_Msk (0x1UL << UARTE_ERRORSRC_BREAK_Pos) /*!< Bit mask of BREAK field. */ +#define UARTE_ERRORSRC_BREAK_NotPresent (0UL) /*!< Read: error not present */ +#define UARTE_ERRORSRC_BREAK_Present (1UL) /*!< Read: error present */ + +/* Bit 2 : Framing error occurred */ +#define UARTE_ERRORSRC_FRAMING_Pos (2UL) /*!< Position of FRAMING field. */ +#define UARTE_ERRORSRC_FRAMING_Msk (0x1UL << UARTE_ERRORSRC_FRAMING_Pos) /*!< Bit mask of FRAMING field. */ +#define UARTE_ERRORSRC_FRAMING_NotPresent (0UL) /*!< Read: error not present */ +#define UARTE_ERRORSRC_FRAMING_Present (1UL) /*!< Read: error present */ + +/* Bit 1 : Parity error */ +#define UARTE_ERRORSRC_PARITY_Pos (1UL) /*!< Position of PARITY field. */ +#define UARTE_ERRORSRC_PARITY_Msk (0x1UL << UARTE_ERRORSRC_PARITY_Pos) /*!< Bit mask of PARITY field. */ +#define UARTE_ERRORSRC_PARITY_NotPresent (0UL) /*!< Read: error not present */ +#define UARTE_ERRORSRC_PARITY_Present (1UL) /*!< Read: error present */ + +/* Bit 0 : Overrun error */ +#define UARTE_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */ +#define UARTE_ERRORSRC_OVERRUN_Msk (0x1UL << UARTE_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ +#define UARTE_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: error not present */ +#define UARTE_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: error present */ + +/* Register: UARTE_ENABLE */ +/* Description: Enable UART */ + +/* Bits 3..0 : Enable or disable UARTE */ +#define UARTE_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define UARTE_ENABLE_ENABLE_Msk (0xFUL << UARTE_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define UARTE_ENABLE_ENABLE_Disabled (0UL) /*!< Disable UARTE */ +#define UARTE_ENABLE_ENABLE_Enabled (8UL) /*!< Enable UARTE */ + +/* Register: UARTE_PSEL_RTS */ +/* Description: Pin select for RTS signal */ + +/* Bit 31 : Connection */ +#define UARTE_PSEL_RTS_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define UARTE_PSEL_RTS_CONNECT_Msk (0x1UL << UARTE_PSEL_RTS_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define UARTE_PSEL_RTS_CONNECT_Connected (0UL) /*!< Connect */ +#define UARTE_PSEL_RTS_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define UARTE_PSEL_RTS_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define UARTE_PSEL_RTS_PIN_Msk (0x1FUL << UARTE_PSEL_RTS_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: UARTE_PSEL_TXD */ +/* Description: Pin select for TXD signal */ + +/* Bit 31 : Connection */ +#define UARTE_PSEL_TXD_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define UARTE_PSEL_TXD_CONNECT_Msk (0x1UL << UARTE_PSEL_TXD_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define UARTE_PSEL_TXD_CONNECT_Connected (0UL) /*!< Connect */ +#define UARTE_PSEL_TXD_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define UARTE_PSEL_TXD_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define UARTE_PSEL_TXD_PIN_Msk (0x1FUL << UARTE_PSEL_TXD_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: UARTE_PSEL_CTS */ +/* Description: Pin select for CTS signal */ + +/* Bit 31 : Connection */ +#define UARTE_PSEL_CTS_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define UARTE_PSEL_CTS_CONNECT_Msk (0x1UL << UARTE_PSEL_CTS_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define UARTE_PSEL_CTS_CONNECT_Connected (0UL) /*!< Connect */ +#define UARTE_PSEL_CTS_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define UARTE_PSEL_CTS_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define UARTE_PSEL_CTS_PIN_Msk (0x1FUL << UARTE_PSEL_CTS_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: UARTE_PSEL_RXD */ +/* Description: Pin select for RXD signal */ + +/* Bit 31 : Connection */ +#define UARTE_PSEL_RXD_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define UARTE_PSEL_RXD_CONNECT_Msk (0x1UL << UARTE_PSEL_RXD_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define UARTE_PSEL_RXD_CONNECT_Connected (0UL) /*!< Connect */ +#define UARTE_PSEL_RXD_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define UARTE_PSEL_RXD_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define UARTE_PSEL_RXD_PIN_Msk (0x1FUL << UARTE_PSEL_RXD_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: UARTE_BAUDRATE */ +/* Description: Baud rate. Accuracy depends on the HFCLK source selected. */ + +/* Bits 31..0 : Baud rate */ +#define UARTE_BAUDRATE_BAUDRATE_Pos (0UL) /*!< Position of BAUDRATE field. */ +#define UARTE_BAUDRATE_BAUDRATE_Msk (0xFFFFFFFFUL << UARTE_BAUDRATE_BAUDRATE_Pos) /*!< Bit mask of BAUDRATE field. */ +#define UARTE_BAUDRATE_BAUDRATE_Baud1200 (0x0004F000UL) /*!< 1200 baud (actual rate: 1205) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud2400 (0x0009D000UL) /*!< 2400 baud (actual rate: 2396) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud4800 (0x0013B000UL) /*!< 4800 baud (actual rate: 4808) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud9600 (0x00275000UL) /*!< 9600 baud (actual rate: 9598) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud14400 (0x003AF000UL) /*!< 14400 baud (actual rate: 14401) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud19200 (0x004EA000UL) /*!< 19200 baud (actual rate: 19208) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud28800 (0x0075C000UL) /*!< 28800 baud (actual rate: 28777) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud31250 (0x00800000UL) /*!< 31250 baud */ +#define UARTE_BAUDRATE_BAUDRATE_Baud38400 (0x009D0000UL) /*!< 38400 baud (actual rate: 38369) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud56000 (0x00E50000UL) /*!< 56000 baud (actual rate: 55944) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud57600 (0x00EB0000UL) /*!< 57600 baud (actual rate: 57554) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud76800 (0x013A9000UL) /*!< 76800 baud (actual rate: 76923) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud115200 (0x01D60000UL) /*!< 115200 baud (actual rate: 115108) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud230400 (0x03B00000UL) /*!< 230400 baud (actual rate: 231884) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud250000 (0x04000000UL) /*!< 250000 baud */ +#define UARTE_BAUDRATE_BAUDRATE_Baud460800 (0x07400000UL) /*!< 460800 baud (actual rate: 457143) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud921600 (0x0F000000UL) /*!< 921600 baud (actual rate: 941176) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud1M (0x10000000UL) /*!< 1Mega baud */ + +/* Register: UARTE_RXD_PTR */ +/* Description: Data pointer */ + +/* Bits 31..0 : Data pointer */ +#define UARTE_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define UARTE_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << UARTE_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: UARTE_RXD_MAXCNT */ +/* Description: Maximum number of bytes in receive buffer */ + +/* Bits 9..0 : Maximum number of bytes in receive buffer */ +#define UARTE_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define UARTE_RXD_MAXCNT_MAXCNT_Msk (0x3FFUL << UARTE_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: UARTE_RXD_AMOUNT */ +/* Description: Number of bytes transferred in the last transaction */ + +/* Bits 9..0 : Number of bytes transferred in the last transaction */ +#define UARTE_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define UARTE_RXD_AMOUNT_AMOUNT_Msk (0x3FFUL << UARTE_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: UARTE_TXD_PTR */ +/* Description: Data pointer */ + +/* Bits 31..0 : Data pointer */ +#define UARTE_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define UARTE_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << UARTE_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: UARTE_TXD_MAXCNT */ +/* Description: Maximum number of bytes in transmit buffer */ + +/* Bits 9..0 : Maximum number of bytes in transmit buffer */ +#define UARTE_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define UARTE_TXD_MAXCNT_MAXCNT_Msk (0x3FFUL << UARTE_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: UARTE_TXD_AMOUNT */ +/* Description: Number of bytes transferred in the last transaction */ + +/* Bits 9..0 : Number of bytes transferred in the last transaction */ +#define UARTE_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define UARTE_TXD_AMOUNT_AMOUNT_Msk (0x3FFUL << UARTE_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: UARTE_CONFIG */ +/* Description: Configuration of parity and hardware flow control */ + +/* Bit 4 : Stop bits */ +#define UARTE_CONFIG_STOP_Pos (4UL) /*!< Position of STOP field. */ +#define UARTE_CONFIG_STOP_Msk (0x1UL << UARTE_CONFIG_STOP_Pos) /*!< Bit mask of STOP field. */ +#define UARTE_CONFIG_STOP_One (0UL) /*!< One stop bit */ +#define UARTE_CONFIG_STOP_Two (1UL) /*!< Two stop bits */ + +/* Bits 3..1 : Parity */ +#define UARTE_CONFIG_PARITY_Pos (1UL) /*!< Position of PARITY field. */ +#define UARTE_CONFIG_PARITY_Msk (0x7UL << UARTE_CONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */ +#define UARTE_CONFIG_PARITY_Excluded (0x0UL) /*!< Exclude parity bit */ +#define UARTE_CONFIG_PARITY_Included (0x7UL) /*!< Include even parity bit */ + +/* Bit 0 : Hardware flow control */ +#define UARTE_CONFIG_HWFC_Pos (0UL) /*!< Position of HWFC field. */ +#define UARTE_CONFIG_HWFC_Msk (0x1UL << UARTE_CONFIG_HWFC_Pos) /*!< Bit mask of HWFC field. */ +#define UARTE_CONFIG_HWFC_Disabled (0UL) /*!< Disabled */ +#define UARTE_CONFIG_HWFC_Enabled (1UL) /*!< Enabled */ + + +/* Peripheral: UICR */ +/* Description: User information configuration registers */ + +/* Register: UICR_NRFFW */ +/* Description: Description collection[0]: Reserved for Nordic firmware design */ + +/* Bits 31..0 : Reserved for Nordic firmware design */ +#define UICR_NRFFW_NRFFW_Pos (0UL) /*!< Position of NRFFW field. */ +#define UICR_NRFFW_NRFFW_Msk (0xFFFFFFFFUL << UICR_NRFFW_NRFFW_Pos) /*!< Bit mask of NRFFW field. */ + +/* Register: UICR_NRFHW */ +/* Description: Description collection[0]: Reserved for Nordic hardware design */ + +/* Bits 31..0 : Reserved for Nordic hardware design */ +#define UICR_NRFHW_NRFHW_Pos (0UL) /*!< Position of NRFHW field. */ +#define UICR_NRFHW_NRFHW_Msk (0xFFFFFFFFUL << UICR_NRFHW_NRFHW_Pos) /*!< Bit mask of NRFHW field. */ + +/* Register: UICR_CUSTOMER */ +/* Description: Description collection[0]: Reserved for customer */ + +/* Bits 31..0 : Reserved for customer */ +#define UICR_CUSTOMER_CUSTOMER_Pos (0UL) /*!< Position of CUSTOMER field. */ +#define UICR_CUSTOMER_CUSTOMER_Msk (0xFFFFFFFFUL << UICR_CUSTOMER_CUSTOMER_Pos) /*!< Bit mask of CUSTOMER field. */ + +/* Register: UICR_PSELRESET */ +/* Description: Description collection[0]: Mapping of the nRESET function (see POWER chapter for details) */ + +/* Bit 31 : Connection */ +#define UICR_PSELRESET_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define UICR_PSELRESET_CONNECT_Msk (0x1UL << UICR_PSELRESET_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define UICR_PSELRESET_CONNECT_Connected (0UL) /*!< Connect */ +#define UICR_PSELRESET_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 5..0 : GPIO number P0.n onto which reset is exposed */ +#define UICR_PSELRESET_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define UICR_PSELRESET_PIN_Msk (0x3FUL << UICR_PSELRESET_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: UICR_APPROTECT */ +/* Description: Access port protection */ + +/* Bits 7..0 : Enable or disable access port protection. */ +#define UICR_APPROTECT_PALL_Pos (0UL) /*!< Position of PALL field. */ +#define UICR_APPROTECT_PALL_Msk (0xFFUL << UICR_APPROTECT_PALL_Pos) /*!< Bit mask of PALL field. */ +#define UICR_APPROTECT_PALL_Enabled (0x00UL) /*!< Enable */ +#define UICR_APPROTECT_PALL_Disabled (0xFFUL) /*!< Disable */ + + +/* Peripheral: WDT */ +/* Description: Watchdog Timer */ + +/* Register: WDT_TASKS_START */ +/* Description: Start the watchdog */ + +/* Bit 0 : */ +#define WDT_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define WDT_TASKS_START_TASKS_START_Msk (0x1UL << WDT_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: WDT_EVENTS_TIMEOUT */ +/* Description: Watchdog timeout */ + +/* Bit 0 : */ +#define WDT_EVENTS_TIMEOUT_EVENTS_TIMEOUT_Pos (0UL) /*!< Position of EVENTS_TIMEOUT field. */ +#define WDT_EVENTS_TIMEOUT_EVENTS_TIMEOUT_Msk (0x1UL << WDT_EVENTS_TIMEOUT_EVENTS_TIMEOUT_Pos) /*!< Bit mask of EVENTS_TIMEOUT field. */ + +/* Register: WDT_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 0 : Write '1' to Enable interrupt for TIMEOUT event */ +#define WDT_INTENSET_TIMEOUT_Pos (0UL) /*!< Position of TIMEOUT field. */ +#define WDT_INTENSET_TIMEOUT_Msk (0x1UL << WDT_INTENSET_TIMEOUT_Pos) /*!< Bit mask of TIMEOUT field. */ +#define WDT_INTENSET_TIMEOUT_Disabled (0UL) /*!< Read: Disabled */ +#define WDT_INTENSET_TIMEOUT_Enabled (1UL) /*!< Read: Enabled */ +#define WDT_INTENSET_TIMEOUT_Set (1UL) /*!< Enable */ + +/* Register: WDT_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 0 : Write '1' to Disable interrupt for TIMEOUT event */ +#define WDT_INTENCLR_TIMEOUT_Pos (0UL) /*!< Position of TIMEOUT field. */ +#define WDT_INTENCLR_TIMEOUT_Msk (0x1UL << WDT_INTENCLR_TIMEOUT_Pos) /*!< Bit mask of TIMEOUT field. */ +#define WDT_INTENCLR_TIMEOUT_Disabled (0UL) /*!< Read: Disabled */ +#define WDT_INTENCLR_TIMEOUT_Enabled (1UL) /*!< Read: Enabled */ +#define WDT_INTENCLR_TIMEOUT_Clear (1UL) /*!< Disable */ + +/* Register: WDT_RUNSTATUS */ +/* Description: Run status */ + +/* Bit 0 : Indicates whether or not the watchdog is running */ +#define WDT_RUNSTATUS_RUNSTATUS_Pos (0UL) /*!< Position of RUNSTATUS field. */ +#define WDT_RUNSTATUS_RUNSTATUS_Msk (0x1UL << WDT_RUNSTATUS_RUNSTATUS_Pos) /*!< Bit mask of RUNSTATUS field. */ +#define WDT_RUNSTATUS_RUNSTATUS_NotRunning (0UL) /*!< Watchdog not running */ +#define WDT_RUNSTATUS_RUNSTATUS_Running (1UL) /*!< Watchdog is running */ + +/* Register: WDT_REQSTATUS */ +/* Description: Request status */ + +/* Bit 7 : Request status for RR[7] register */ +#define WDT_REQSTATUS_RR7_Pos (7UL) /*!< Position of RR7 field. */ +#define WDT_REQSTATUS_RR7_Msk (0x1UL << WDT_REQSTATUS_RR7_Pos) /*!< Bit mask of RR7 field. */ +#define WDT_REQSTATUS_RR7_DisabledOrRequested (0UL) /*!< RR[7] register is not enabled, or are already requesting reload */ +#define WDT_REQSTATUS_RR7_EnabledAndUnrequested (1UL) /*!< RR[7] register is enabled, and are not yet requesting reload */ + +/* Bit 6 : Request status for RR[6] register */ +#define WDT_REQSTATUS_RR6_Pos (6UL) /*!< Position of RR6 field. */ +#define WDT_REQSTATUS_RR6_Msk (0x1UL << WDT_REQSTATUS_RR6_Pos) /*!< Bit mask of RR6 field. */ +#define WDT_REQSTATUS_RR6_DisabledOrRequested (0UL) /*!< RR[6] register is not enabled, or are already requesting reload */ +#define WDT_REQSTATUS_RR6_EnabledAndUnrequested (1UL) /*!< RR[6] register is enabled, and are not yet requesting reload */ + +/* Bit 5 : Request status for RR[5] register */ +#define WDT_REQSTATUS_RR5_Pos (5UL) /*!< Position of RR5 field. */ +#define WDT_REQSTATUS_RR5_Msk (0x1UL << WDT_REQSTATUS_RR5_Pos) /*!< Bit mask of RR5 field. */ +#define WDT_REQSTATUS_RR5_DisabledOrRequested (0UL) /*!< RR[5] register is not enabled, or are already requesting reload */ +#define WDT_REQSTATUS_RR5_EnabledAndUnrequested (1UL) /*!< RR[5] register is enabled, and are not yet requesting reload */ + +/* Bit 4 : Request status for RR[4] register */ +#define WDT_REQSTATUS_RR4_Pos (4UL) /*!< Position of RR4 field. */ +#define WDT_REQSTATUS_RR4_Msk (0x1UL << WDT_REQSTATUS_RR4_Pos) /*!< Bit mask of RR4 field. */ +#define WDT_REQSTATUS_RR4_DisabledOrRequested (0UL) /*!< RR[4] register is not enabled, or are already requesting reload */ +#define WDT_REQSTATUS_RR4_EnabledAndUnrequested (1UL) /*!< RR[4] register is enabled, and are not yet requesting reload */ + +/* Bit 3 : Request status for RR[3] register */ +#define WDT_REQSTATUS_RR3_Pos (3UL) /*!< Position of RR3 field. */ +#define WDT_REQSTATUS_RR3_Msk (0x1UL << WDT_REQSTATUS_RR3_Pos) /*!< Bit mask of RR3 field. */ +#define WDT_REQSTATUS_RR3_DisabledOrRequested (0UL) /*!< RR[3] register is not enabled, or are already requesting reload */ +#define WDT_REQSTATUS_RR3_EnabledAndUnrequested (1UL) /*!< RR[3] register is enabled, and are not yet requesting reload */ + +/* Bit 2 : Request status for RR[2] register */ +#define WDT_REQSTATUS_RR2_Pos (2UL) /*!< Position of RR2 field. */ +#define WDT_REQSTATUS_RR2_Msk (0x1UL << WDT_REQSTATUS_RR2_Pos) /*!< Bit mask of RR2 field. */ +#define WDT_REQSTATUS_RR2_DisabledOrRequested (0UL) /*!< RR[2] register is not enabled, or are already requesting reload */ +#define WDT_REQSTATUS_RR2_EnabledAndUnrequested (1UL) /*!< RR[2] register is enabled, and are not yet requesting reload */ + +/* Bit 1 : Request status for RR[1] register */ +#define WDT_REQSTATUS_RR1_Pos (1UL) /*!< Position of RR1 field. */ +#define WDT_REQSTATUS_RR1_Msk (0x1UL << WDT_REQSTATUS_RR1_Pos) /*!< Bit mask of RR1 field. */ +#define WDT_REQSTATUS_RR1_DisabledOrRequested (0UL) /*!< RR[1] register is not enabled, or are already requesting reload */ +#define WDT_REQSTATUS_RR1_EnabledAndUnrequested (1UL) /*!< RR[1] register is enabled, and are not yet requesting reload */ + +/* Bit 0 : Request status for RR[0] register */ +#define WDT_REQSTATUS_RR0_Pos (0UL) /*!< Position of RR0 field. */ +#define WDT_REQSTATUS_RR0_Msk (0x1UL << WDT_REQSTATUS_RR0_Pos) /*!< Bit mask of RR0 field. */ +#define WDT_REQSTATUS_RR0_DisabledOrRequested (0UL) /*!< RR[0] register is not enabled, or are already requesting reload */ +#define WDT_REQSTATUS_RR0_EnabledAndUnrequested (1UL) /*!< RR[0] register is enabled, and are not yet requesting reload */ + +/* Register: WDT_CRV */ +/* Description: Counter reload value */ + +/* Bits 31..0 : Counter reload value in number of cycles of the 32.768 kHz clock */ +#define WDT_CRV_CRV_Pos (0UL) /*!< Position of CRV field. */ +#define WDT_CRV_CRV_Msk (0xFFFFFFFFUL << WDT_CRV_CRV_Pos) /*!< Bit mask of CRV field. */ + +/* Register: WDT_RREN */ +/* Description: Enable register for reload request registers */ + +/* Bit 7 : Enable or disable RR[7] register */ +#define WDT_RREN_RR7_Pos (7UL) /*!< Position of RR7 field. */ +#define WDT_RREN_RR7_Msk (0x1UL << WDT_RREN_RR7_Pos) /*!< Bit mask of RR7 field. */ +#define WDT_RREN_RR7_Disabled (0UL) /*!< Disable RR[7] register */ +#define WDT_RREN_RR7_Enabled (1UL) /*!< Enable RR[7] register */ + +/* Bit 6 : Enable or disable RR[6] register */ +#define WDT_RREN_RR6_Pos (6UL) /*!< Position of RR6 field. */ +#define WDT_RREN_RR6_Msk (0x1UL << WDT_RREN_RR6_Pos) /*!< Bit mask of RR6 field. */ +#define WDT_RREN_RR6_Disabled (0UL) /*!< Disable RR[6] register */ +#define WDT_RREN_RR6_Enabled (1UL) /*!< Enable RR[6] register */ + +/* Bit 5 : Enable or disable RR[5] register */ +#define WDT_RREN_RR5_Pos (5UL) /*!< Position of RR5 field. */ +#define WDT_RREN_RR5_Msk (0x1UL << WDT_RREN_RR5_Pos) /*!< Bit mask of RR5 field. */ +#define WDT_RREN_RR5_Disabled (0UL) /*!< Disable RR[5] register */ +#define WDT_RREN_RR5_Enabled (1UL) /*!< Enable RR[5] register */ + +/* Bit 4 : Enable or disable RR[4] register */ +#define WDT_RREN_RR4_Pos (4UL) /*!< Position of RR4 field. */ +#define WDT_RREN_RR4_Msk (0x1UL << WDT_RREN_RR4_Pos) /*!< Bit mask of RR4 field. */ +#define WDT_RREN_RR4_Disabled (0UL) /*!< Disable RR[4] register */ +#define WDT_RREN_RR4_Enabled (1UL) /*!< Enable RR[4] register */ + +/* Bit 3 : Enable or disable RR[3] register */ +#define WDT_RREN_RR3_Pos (3UL) /*!< Position of RR3 field. */ +#define WDT_RREN_RR3_Msk (0x1UL << WDT_RREN_RR3_Pos) /*!< Bit mask of RR3 field. */ +#define WDT_RREN_RR3_Disabled (0UL) /*!< Disable RR[3] register */ +#define WDT_RREN_RR3_Enabled (1UL) /*!< Enable RR[3] register */ + +/* Bit 2 : Enable or disable RR[2] register */ +#define WDT_RREN_RR2_Pos (2UL) /*!< Position of RR2 field. */ +#define WDT_RREN_RR2_Msk (0x1UL << WDT_RREN_RR2_Pos) /*!< Bit mask of RR2 field. */ +#define WDT_RREN_RR2_Disabled (0UL) /*!< Disable RR[2] register */ +#define WDT_RREN_RR2_Enabled (1UL) /*!< Enable RR[2] register */ + +/* Bit 1 : Enable or disable RR[1] register */ +#define WDT_RREN_RR1_Pos (1UL) /*!< Position of RR1 field. */ +#define WDT_RREN_RR1_Msk (0x1UL << WDT_RREN_RR1_Pos) /*!< Bit mask of RR1 field. */ +#define WDT_RREN_RR1_Disabled (0UL) /*!< Disable RR[1] register */ +#define WDT_RREN_RR1_Enabled (1UL) /*!< Enable RR[1] register */ + +/* Bit 0 : Enable or disable RR[0] register */ +#define WDT_RREN_RR0_Pos (0UL) /*!< Position of RR0 field. */ +#define WDT_RREN_RR0_Msk (0x1UL << WDT_RREN_RR0_Pos) /*!< Bit mask of RR0 field. */ +#define WDT_RREN_RR0_Disabled (0UL) /*!< Disable RR[0] register */ +#define WDT_RREN_RR0_Enabled (1UL) /*!< Enable RR[0] register */ + +/* Register: WDT_CONFIG */ +/* Description: Configuration register */ + +/* Bit 3 : Configure the watchdog to either be paused, or kept running, while the CPU is halted by the debugger */ +#define WDT_CONFIG_HALT_Pos (3UL) /*!< Position of HALT field. */ +#define WDT_CONFIG_HALT_Msk (0x1UL << WDT_CONFIG_HALT_Pos) /*!< Bit mask of HALT field. */ +#define WDT_CONFIG_HALT_Pause (0UL) /*!< Pause watchdog while the CPU is halted by the debugger */ +#define WDT_CONFIG_HALT_Run (1UL) /*!< Keep the watchdog running while the CPU is halted by the debugger */ + +/* Bit 0 : Configure the watchdog to either be paused, or kept running, while the CPU is sleeping */ +#define WDT_CONFIG_SLEEP_Pos (0UL) /*!< Position of SLEEP field. */ +#define WDT_CONFIG_SLEEP_Msk (0x1UL << WDT_CONFIG_SLEEP_Pos) /*!< Bit mask of SLEEP field. */ +#define WDT_CONFIG_SLEEP_Pause (0UL) /*!< Pause watchdog while the CPU is sleeping */ +#define WDT_CONFIG_SLEEP_Run (1UL) /*!< Keep the watchdog running while the CPU is sleeping */ + +/* Register: WDT_RR */ +/* Description: Description collection[0]: Reload request 0 */ + +/* Bits 31..0 : Reload request register */ +#define WDT_RR_RR_Pos (0UL) /*!< Position of RR field. */ +#define WDT_RR_RR_Msk (0xFFFFFFFFUL << WDT_RR_RR_Pos) /*!< Bit mask of RR field. */ +#define WDT_RR_RR_Reload (0x6E524635UL) /*!< Value to request a reload of the watchdog timer */ + + +/*lint --flb "Leave library region" */ +#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52810_peripherals.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52810_peripherals.h new file mode 100644 index 00000000000..597a95d2ca1 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52810_peripherals.h @@ -0,0 +1,218 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +#ifndef _NRF52810_PERIPHERALS_H +#define _NRF52810_PERIPHERALS_H + + +/* Power Peripheral */ +#define POWER_PRESENT +#define POWER_COUNT 1 + +#define POWER_FEATURE_RAM_REGISTERS_PRESENT +#define POWER_FEATURE_RAM_REGISTERS_COUNT 3 + +/* Systick timer */ +#define SYSTICK_PRESENT +#define SYSTICK_COUNT 1 + +/* Software Interrupts */ +#define SWI_PRESENT +#define SWI_COUNT 6 + +/* GPIO */ +#define GPIO_PRESENT +#define GPIO_COUNT 1 + +#define P0_PIN_NUM 32 + +/* MPU and BPROT */ +#define BPROT_PRESENT + +#define BPROT_REGIONS_SIZE 4096 +#define BPROT_REGIONS_NUM 48 + +/* Radio */ +#define RADIO_PRESENT +#define RADIO_COUNT 1 + +#define RADIO_EASYDMA_MAXCNT_SIZE 8 + +/* Accelerated Address Resolver */ +#define AAR_PRESENT +#define AAR_COUNT 1 + +#define AAR_MAX_IRK_NUM 16 + +/* AES Electronic CodeBook mode encryption */ +#define ECB_PRESENT +#define ECB_COUNT 1 + +/* AES CCM mode encryption */ +#define CCM_PRESENT +#define CCM_COUNT 1 + +/* Peripheral to Peripheral Interconnect */ +#define PPI_PRESENT +#define PPI_COUNT 1 + +#define PPI_CH_NUM 20 +#define PPI_FIXED_CH_NUM 12 +#define PPI_GROUP_NUM 6 +#define PPI_FEATURE_FORKS_PRESENT + +/* Event Generator Unit */ +#define EGU_PRESENT +#define EGU_COUNT 2 + +#define EGU0_CH_NUM 16 +#define EGU1_CH_NUM 16 + +/* Timer/Counter */ +#define TIMER_PRESENT +#define TIMER_COUNT 3 + +#define TIMER0_MAX_SIZE 32 +#define TIMER1_MAX_SIZE 32 +#define TIMER2_MAX_SIZE 32 + +#define TIMER0_CC_NUM 4 +#define TIMER1_CC_NUM 4 +#define TIMER2_CC_NUM 4 + +/* Real Time Counter */ +#define RTC_PRESENT +#define RTC_COUNT 2 + +#define RTC0_CC_NUM 3 +#define RTC1_CC_NUM 4 + +/* RNG */ +#define RNG_PRESENT +#define RNG_COUNT 1 + +/* Watchdog Timer */ +#define WDT_PRESENT +#define WDT_COUNT 1 + +/* Temperature Sensor */ +#define TEMP_PRESENT +#define TEMP_COUNT 1 + +/* Serial Peripheral Interface Master with DMA */ +#define SPIM_PRESENT +#define SPIM_COUNT 1 + +#define SPIM0_MAX_DATARATE 8 + +#define SPIM0_FEATURE_HARDWARE_CSN_PRESENT 0 + +#define SPIM0_FEATURE_DCX_PRESENT 0 + +#define SPIM0_FEATURE_RXDELAY_PRESENT 0 + +#define SPIM0_EASYDMA_MAXCNT_SIZE 10 + +/* Serial Peripheral Interface Slave with DMA*/ +#define SPIS_PRESENT +#define SPIS_COUNT 1 + +#define SPIS0_EASYDMA_MAXCNT_SIZE 10 + +/* Two Wire Interface Master with DMA */ +#define TWIM_PRESENT +#define TWIM_COUNT 1 + +#define TWIM0_EASYDMA_MAXCNT_SIZE 10 + +/* Two Wire Interface Slave with DMA */ +#define TWIS_PRESENT +#define TWIS_COUNT 1 + +#define TWIS0_EASYDMA_MAXCNT_SIZE 10 + +/* Universal Asynchronous Receiver-Transmitter with DMA */ +#define UARTE_PRESENT +#define UARTE_COUNT 1 + +#define UARTE0_EASYDMA_MAXCNT_SIZE 10 + +/* Quadrature Decoder */ +#define QDEC_PRESENT +#define QDEC_COUNT 1 + +/* Successive Approximation Analog to Digital Converter */ +#define SAADC_PRESENT +#define SAADC_COUNT 1 + +#define SAADC_EASYDMA_MAXCNT_SIZE 15 + +#define SAADC_CH_NUM 8 + +/* GPIO Tasks and Events */ +#define GPIOTE_PRESENT +#define GPIOTE_COUNT 1 + +#define GPIOTE_CH_NUM 8 + +#define GPIOTE_FEATURE_SET_PRESENT +#define GPIOTE_FEATURE_CLR_PRESENT + +/* Comparator */ +#define COMP_PRESENT +#define COMP_COUNT 1 + +/* Pulse Width Modulator */ +#define PWM_PRESENT +#define PWM_COUNT 1 + +#define PWM0_CH_NUM 4 + +#define PWM0_EASYDMA_MAXCNT_SIZE 15 + +/* Pulse Density Modulator */ +#define PDM_PRESENT +#define PDM_COUNT 1 + +#define PDM_EASYDMA_MAXCNT_SIZE 15 + + +#endif // _NRF52810_PERIPHERALS_H diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52832_peripherals.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52832_peripherals.h new file mode 100644 index 00000000000..b945de4cc47 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52832_peripherals.h @@ -0,0 +1,285 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +#ifndef _NRF52832_PERIPHERALS_H +#define _NRF52832_PERIPHERALS_H + + +/* Power Peripheral */ +#define POWER_PRESENT +#define POWER_COUNT 1 + +#define POWER_FEATURE_RAM_REGISTERS_PRESENT +#define POWER_FEATURE_RAM_REGISTERS_COUNT 8 + +/* Floating Point Unit */ +#define FPU_PRESENT +#define FPU_COUNT 1 + +/* Systick timer */ +#define SYSTICK_PRESENT +#define SYSTICK_COUNT 1 + +/* Software Interrupts */ +#define SWI_PRESENT +#define SWI_COUNT 6 + +/* Memory Watch Unit */ +#define MWU_PRESENT +#define MWU_COUNT 1 + +/* GPIO */ +#define GPIO_PRESENT +#define GPIO_COUNT 1 + +#define P0_PIN_NUM 32 + +/* MPU and BPROT */ +#define BPROT_PRESENT + +#define BPROT_REGIONS_SIZE 4096 +#define BPROT_REGIONS_NUM 128 + +/* Radio */ +#define RADIO_PRESENT +#define RADIO_COUNT 1 + +#define RADIO_EASYDMA_MAXCNT_SIZE 8 + +/* Accelerated Address Resolver */ +#define AAR_PRESENT +#define AAR_COUNT 1 + +#define AAR_MAX_IRK_NUM 16 + +/* AES Electronic CodeBook mode encryption */ +#define ECB_PRESENT +#define ECB_COUNT 1 + +/* AES CCM mode encryption */ +#define CCM_PRESENT +#define CCM_COUNT 1 + +/* NFC Tag */ +#define NFCT_PRESENT +#define NFCT_COUNT 1 + +#define NFCT_EASYDMA_MAXCNT_SIZE 9 + +/* Peripheral to Peripheral Interconnect */ +#define PPI_PRESENT +#define PPI_COUNT 1 + +#define PPI_CH_NUM 20 +#define PPI_FIXED_CH_NUM 12 +#define PPI_GROUP_NUM 6 +#define PPI_FEATURE_FORKS_PRESENT + +/* Event Generator Unit */ +#define EGU_PRESENT +#define EGU_COUNT 6 + +#define EGU0_CH_NUM 16 +#define EGU1_CH_NUM 16 +#define EGU2_CH_NUM 16 +#define EGU3_CH_NUM 16 +#define EGU4_CH_NUM 16 +#define EGU5_CH_NUM 16 + +/* Timer/Counter */ +#define TIMER_PRESENT +#define TIMER_COUNT 5 + +#define TIMER0_MAX_SIZE 32 +#define TIMER1_MAX_SIZE 32 +#define TIMER2_MAX_SIZE 32 +#define TIMER3_MAX_SIZE 32 +#define TIMER4_MAX_SIZE 32 + +#define TIMER0_CC_NUM 4 +#define TIMER1_CC_NUM 4 +#define TIMER2_CC_NUM 4 +#define TIMER3_CC_NUM 6 +#define TIMER4_CC_NUM 6 + +/* Real Time Counter */ +#define RTC_PRESENT +#define RTC_COUNT 3 + +#define RTC0_CC_NUM 3 +#define RTC1_CC_NUM 4 +#define RTC2_CC_NUM 4 + +/* RNG */ +#define RNG_PRESENT +#define RNG_COUNT 1 + +/* Watchdog Timer */ +#define WDT_PRESENT +#define WDT_COUNT 1 + +/* Temperature Sensor */ +#define TEMP_PRESENT +#define TEMP_COUNT 1 + +/* Serial Peripheral Interface Master */ +#define SPI_PRESENT +#define SPI_COUNT 3 + +/* Serial Peripheral Interface Master with DMA */ +#define SPIM_PRESENT +#define SPIM_COUNT 3 + +#define SPIM0_MAX_DATARATE 8 +#define SPIM1_MAX_DATARATE 8 +#define SPIM2_MAX_DATARATE 8 + +#define SPIM0_FEATURE_HARDWARE_CSN_PRESENT 0 +#define SPIM1_FEATURE_HARDWARE_CSN_PRESENT 0 +#define SPIM2_FEATURE_HARDWARE_CSN_PRESENT 0 + +#define SPIM0_FEATURE_DCX_PRESENT 0 +#define SPIM1_FEATURE_DCX_PRESENT 0 +#define SPIM2_FEATURE_DCX_PRESENT 0 + +#define SPIM0_FEATURE_RXDELAY_PRESENT 0 +#define SPIM1_FEATURE_RXDELAY_PRESENT 0 +#define SPIM2_FEATURE_RXDELAY_PRESENT 0 + +#define SPIM0_EASYDMA_MAXCNT_SIZE 8 +#define SPIM1_EASYDMA_MAXCNT_SIZE 8 +#define SPIM2_EASYDMA_MAXCNT_SIZE 8 + +/* Serial Peripheral Interface Slave with DMA*/ +#define SPIS_PRESENT +#define SPIS_COUNT 3 + +#define SPIS0_EASYDMA_MAXCNT_SIZE 8 +#define SPIS1_EASYDMA_MAXCNT_SIZE 8 +#define SPIS2_EASYDMA_MAXCNT_SIZE 8 + +/* Two Wire Interface Master */ +#define TWI_PRESENT +#define TWI_COUNT 2 + +/* Two Wire Interface Master with DMA */ +#define TWIM_PRESENT +#define TWIM_COUNT 2 + +#define TWIM0_EASYDMA_MAXCNT_SIZE 8 +#define TWIM1_EASYDMA_MAXCNT_SIZE 8 + +/* Two Wire Interface Slave with DMA */ +#define TWIS_PRESENT +#define TWIS_COUNT 2 + +#define TWIS0_EASYDMA_MAXCNT_SIZE 8 +#define TWIS1_EASYDMA_MAXCNT_SIZE 8 + +/* Universal Asynchronous Receiver-Transmitter */ +#define UART_PRESENT +#define UART_COUNT 1 + +/* Universal Asynchronous Receiver-Transmitter with DMA */ +#define UARTE_PRESENT +#define UARTE_COUNT 1 + +#define UARTE0_EASYDMA_MAXCNT_SIZE 8 + +/* Quadrature Decoder */ +#define QDEC_PRESENT +#define QDEC_COUNT 1 + +/* Successive Approximation Analog to Digital Converter */ +#define SAADC_PRESENT +#define SAADC_COUNT 1 + +#define SAADC_EASYDMA_MAXCNT_SIZE 15 + +#define SAADC_CH_NUM 8 + +/* GPIO Tasks and Events */ +#define GPIOTE_PRESENT +#define GPIOTE_COUNT 1 + +#define GPIOTE_CH_NUM 8 + +#define GPIOTE_FEATURE_SET_PRESENT +#define GPIOTE_FEATURE_CLR_PRESENT + +/* Low Power Comparator */ +#define LPCOMP_PRESENT +#define LPCOMP_COUNT 1 + +#define LPCOMP_REFSEL_RESOLUTION 16 + +#define LPCOMP_FEATURE_HYST_PRESENT + +/* Comparator */ +#define COMP_PRESENT +#define COMP_COUNT 1 + +/* Pulse Width Modulator */ +#define PWM_PRESENT +#define PWM_COUNT 3 + +#define PWM0_CH_NUM 4 +#define PWM1_CH_NUM 4 +#define PWM2_CH_NUM 4 + +#define PWM0_EASYDMA_MAXCNT_SIZE 15 +#define PWM1_EASYDMA_MAXCNT_SIZE 15 +#define PWM2_EASYDMA_MAXCNT_SIZE 15 + +/* Pulse Density Modulator */ +#define PDM_PRESENT +#define PDM_COUNT 1 + +#define PDM_EASYDMA_MAXCNT_SIZE 15 + +/* Inter-IC Sound Interface */ +#define I2S_PRESENT +#define I2S_COUNT 1 + +#define I2S_EASYDMA_MAXCNT_SIZE 14 + + +#endif // _NRF52832_PERIPHERALS_H diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52840.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52840.h new file mode 100644 index 00000000000..6cc29410b20 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52840.h @@ -0,0 +1,2487 @@ +/****************************************************************************************************//** + * @file nrf52840.h + * + * @brief CMSIS Cortex-M4 Peripheral Access Layer Header File for + * nrf52840 from Nordic Semiconductor. + * + * @version V1 + * @date 8. March 2018 + * + * @note Generated with SVDConv V2.81d + * from CMSIS SVD File 'nrf52840.svd' Version 1, + * + * @par Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + *******************************************************************************************************/ + + + +/** @addtogroup Nordic Semiconductor + * @{ + */ + +/** @addtogroup nrf52840 + * @{ + */ + +#ifndef NRF52840_H +#define NRF52840_H + +#ifdef __cplusplus +extern "C" { +#endif + + +/* ------------------------- Interrupt Number Definition ------------------------ */ + +typedef enum { +/* ------------------- Cortex-M4 Processor Exceptions Numbers ------------------- */ + Reset_IRQn = -15, /*!< 1 Reset Vector, invoked on Power up and warm reset */ + NonMaskableInt_IRQn = -14, /*!< 2 Non maskable Interrupt, cannot be stopped or preempted */ + HardFault_IRQn = -13, /*!< 3 Hard Fault, all classes of Fault */ + MemoryManagement_IRQn = -12, /*!< 4 Memory Management, MPU mismatch, including Access Violation + and No Match */ + BusFault_IRQn = -11, /*!< 5 Bus Fault, Pre-Fetch-, Memory Access Fault, other address/memory + related Fault */ + UsageFault_IRQn = -10, /*!< 6 Usage Fault, i.e. Undef Instruction, Illegal State Transition */ + SVCall_IRQn = -5, /*!< 11 System Service Call via SVC instruction */ + DebugMonitor_IRQn = -4, /*!< 12 Debug Monitor */ + PendSV_IRQn = -2, /*!< 14 Pendable request for system service */ + SysTick_IRQn = -1, /*!< 15 System Tick Timer */ +/* --------------------- nrf52840 Specific Interrupt Numbers -------------------- */ + POWER_CLOCK_IRQn = 0, /*!< 0 POWER_CLOCK */ + RADIO_IRQn = 1, /*!< 1 RADIO */ + UARTE0_UART0_IRQn = 2, /*!< 2 UARTE0_UART0 */ + SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn= 3, /*!< 3 SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0 */ + SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn= 4, /*!< 4 SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1 */ + NFCT_IRQn = 5, /*!< 5 NFCT */ + GPIOTE_IRQn = 6, /*!< 6 GPIOTE */ + SAADC_IRQn = 7, /*!< 7 SAADC */ + TIMER0_IRQn = 8, /*!< 8 TIMER0 */ + TIMER1_IRQn = 9, /*!< 9 TIMER1 */ + TIMER2_IRQn = 10, /*!< 10 TIMER2 */ + RTC0_IRQn = 11, /*!< 11 RTC0 */ + TEMP_IRQn = 12, /*!< 12 TEMP */ + RNG_IRQn = 13, /*!< 13 RNG */ + ECB_IRQn = 14, /*!< 14 ECB */ + CCM_AAR_IRQn = 15, /*!< 15 CCM_AAR */ + WDT_IRQn = 16, /*!< 16 WDT */ + RTC1_IRQn = 17, /*!< 17 RTC1 */ + QDEC_IRQn = 18, /*!< 18 QDEC */ + COMP_LPCOMP_IRQn = 19, /*!< 19 COMP_LPCOMP */ + SWI0_EGU0_IRQn = 20, /*!< 20 SWI0_EGU0 */ + SWI1_EGU1_IRQn = 21, /*!< 21 SWI1_EGU1 */ + SWI2_EGU2_IRQn = 22, /*!< 22 SWI2_EGU2 */ + SWI3_EGU3_IRQn = 23, /*!< 23 SWI3_EGU3 */ + SWI4_EGU4_IRQn = 24, /*!< 24 SWI4_EGU4 */ + SWI5_EGU5_IRQn = 25, /*!< 25 SWI5_EGU5 */ + TIMER3_IRQn = 26, /*!< 26 TIMER3 */ + TIMER4_IRQn = 27, /*!< 27 TIMER4 */ + PWM0_IRQn = 28, /*!< 28 PWM0 */ + PDM_IRQn = 29, /*!< 29 PDM */ + MWU_IRQn = 32, /*!< 32 MWU */ + PWM1_IRQn = 33, /*!< 33 PWM1 */ + PWM2_IRQn = 34, /*!< 34 PWM2 */ + SPIM2_SPIS2_SPI2_IRQn = 35, /*!< 35 SPIM2_SPIS2_SPI2 */ + RTC2_IRQn = 36, /*!< 36 RTC2 */ + I2S_IRQn = 37, /*!< 37 I2S */ + FPU_IRQn = 38, /*!< 38 FPU */ + USBD_IRQn = 39, /*!< 39 USBD */ + UARTE1_IRQn = 40, /*!< 40 UARTE1 */ + QSPI_IRQn = 41, /*!< 41 QSPI */ + CRYPTOCELL_IRQn = 42, /*!< 42 CRYPTOCELL */ + PWM3_IRQn = 45, /*!< 45 PWM3 */ + SPIM3_IRQn = 47 /*!< 47 SPIM3 */ +} IRQn_Type; + + +/** @addtogroup Configuration_of_CMSIS + * @{ + */ + + +/* ================================================================================ */ +/* ================ Processor and Core Peripheral Section ================ */ +/* ================================================================================ */ + +/* ----------------Configuration of the Cortex-M4 Processor and Core Peripherals---------------- */ +#define __CM4_REV 0x0001 /*!< Cortex-M4 Core Revision */ +#define __MPU_PRESENT 1 /*!< MPU present or not */ +#define __NVIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 1 /*!< FPU present or not */ +/** @} */ /* End of group Configuration_of_CMSIS */ + +#include "core_cm4.h" /*!< Cortex-M4 processor and core peripherals */ +#include "system_nrf52840.h" /*!< nrf52840 System */ + + +/* ================================================================================ */ +/* ================ Device Specific Peripheral Section ================ */ +/* ================================================================================ */ + + +/** @addtogroup Device_Peripheral_Registers + * @{ + */ + + +/* ------------------- Start of section using anonymous unions ------------------ */ +#if defined(__CC_ARM) + #pragma push + #pragma anon_unions +#elif defined(__ICCARM__) + #pragma language=extended +#elif defined(__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined(__TMS470__) +/* anonymous unions are enabled by default */ +#elif defined(__TASKING__) + #pragma warning 586 +#else + #warning Not supported compiler type +#endif + + +typedef struct { + __I uint32_t PART; /*!< Part code */ + __I uint32_t VARIANT; /*!< Build code (hardware version and production configuration) */ + __I uint32_t PACKAGE; /*!< Package option */ + __I uint32_t RAM; /*!< RAM variant */ + __I uint32_t FLASH; /*!< Flash variant */ + __IO uint32_t UNUSED8[3]; /*!< Unspecified */ +} FICR_INFO_Type; + +typedef struct { + __I uint32_t A0; /*!< Slope definition A0 */ + __I uint32_t A1; /*!< Slope definition A1 */ + __I uint32_t A2; /*!< Slope definition A2 */ + __I uint32_t A3; /*!< Slope definition A3 */ + __I uint32_t A4; /*!< Slope definition A4 */ + __I uint32_t A5; /*!< Slope definition A5 */ + __I uint32_t B0; /*!< Y-intercept B0 */ + __I uint32_t B1; /*!< Y-intercept B1 */ + __I uint32_t B2; /*!< Y-intercept B2 */ + __I uint32_t B3; /*!< Y-intercept B3 */ + __I uint32_t B4; /*!< Y-intercept B4 */ + __I uint32_t B5; /*!< Y-intercept B5 */ + __I uint32_t T0; /*!< Segment end T0 */ + __I uint32_t T1; /*!< Segment end T1 */ + __I uint32_t T2; /*!< Segment end T2 */ + __I uint32_t T3; /*!< Segment end T3 */ + __I uint32_t T4; /*!< Segment end T4 */ +} FICR_TEMP_Type; + +typedef struct { + __I uint32_t TAGHEADER0; /*!< Default header for NFC tag. Software can read these values to + populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ + __I uint32_t TAGHEADER1; /*!< Default header for NFC tag. Software can read these values to + populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ + __I uint32_t TAGHEADER2; /*!< Default header for NFC tag. Software can read these values to + populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ + __I uint32_t TAGHEADER3; /*!< Default header for NFC tag. Software can read these values to + populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ +} FICR_NFC_Type; + +typedef struct { + __I uint32_t BYTES; /*!< Amount of bytes for the required entropy bits */ + __I uint32_t RCCUTOFF; /*!< Repetition counter cutoff */ + __I uint32_t APCUTOFF; /*!< Adaptive proportion cutoff */ + __I uint32_t STARTUP; /*!< Amount of bytes for the startup tests */ + __I uint32_t ROSC1; /*!< Sample count for ring oscillator 1 */ + __I uint32_t ROSC2; /*!< Sample count for ring oscillator 2 */ + __I uint32_t ROSC3; /*!< Sample count for ring oscillator 3 */ + __I uint32_t ROSC4; /*!< Sample count for ring oscillator 4 */ +} FICR_TRNG90B_Type; + +typedef struct { + __IO uint32_t POWER; /*!< Description cluster[n]: RAMn power control register */ + __O uint32_t POWERSET; /*!< Description cluster[n]: RAMn power control set register */ + __O uint32_t POWERCLR; /*!< Description cluster[n]: RAMn power control clear register */ + __I uint32_t RESERVED0; +} POWER_RAM_Type; + +typedef struct { + __IO uint32_t RTS; /*!< Pin select for RTS */ + __IO uint32_t TXD; /*!< Pin select for TXD */ + __IO uint32_t CTS; /*!< Pin select for CTS */ + __IO uint32_t RXD; /*!< Pin select for RXD */ +} UART_PSEL_Type; + +typedef struct { + __IO uint32_t RTS; /*!< Pin select for RTS signal */ + __IO uint32_t TXD; /*!< Pin select for TXD signal */ + __IO uint32_t CTS; /*!< Pin select for CTS signal */ + __IO uint32_t RXD; /*!< Pin select for RXD signal */ +} UARTE_PSEL_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in receive buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ +} UARTE_RXD_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in transmit buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ +} UARTE_TXD_Type; + +typedef struct { + __IO uint32_t SCK; /*!< Pin select for SCK */ + __IO uint32_t MOSI; /*!< Pin select for MOSI signal */ + __IO uint32_t MISO; /*!< Pin select for MISO signal */ +} SPI_PSEL_Type; + +typedef struct { + __IO uint32_t SCK; /*!< Pin select for SCK */ + __IO uint32_t MOSI; /*!< Pin select for MOSI signal */ + __IO uint32_t MISO; /*!< Pin select for MISO signal */ + __IO uint32_t CSN; /*!< Pin select for CSN */ +} SPIM_PSEL_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in receive buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ + __IO uint32_t LIST; /*!< EasyDMA list type */ +} SPIM_RXD_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Data pointer */ + __IO uint32_t MAXCNT; /*!< Number of bytes in transmit buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ + __IO uint32_t LIST; /*!< EasyDMA list type */ +} SPIM_TXD_Type; + +typedef struct { + __IO uint32_t RXDELAY; /*!< Sample delay for input serial data on MISO */ + __IO uint32_t CSNDUR; /*!< Minimum duration between edge of CSN and edge of SCK and minimum + duration CSN must stay high between transactions */ +} SPIM_IFTIMING_Type; + +typedef struct { + __IO uint32_t SCK; /*!< Pin select for SCK */ + __IO uint32_t MISO; /*!< Pin select for MISO signal */ + __IO uint32_t MOSI; /*!< Pin select for MOSI signal */ + __IO uint32_t CSN; /*!< Pin select for CSN signal */ +} SPIS_PSEL_Type; + +typedef struct { + __IO uint32_t PTR; /*!< RXD data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in receive buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes received in last granted transaction */ +} SPIS_RXD_Type; + +typedef struct { + __IO uint32_t PTR; /*!< TXD data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in transmit buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transmitted in last granted transaction */ +} SPIS_TXD_Type; + +typedef struct { + __IO uint32_t SCL; /*!< Pin select for SCL */ + __IO uint32_t SDA; /*!< Pin select for SDA */ +} TWI_PSEL_Type; + +typedef struct { + __IO uint32_t SCL; /*!< Pin select for SCL signal */ + __IO uint32_t SDA; /*!< Pin select for SDA signal */ +} TWIM_PSEL_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in receive buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ + __IO uint32_t LIST; /*!< EasyDMA list type */ +} TWIM_RXD_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in transmit buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ + __IO uint32_t LIST; /*!< EasyDMA list type */ +} TWIM_TXD_Type; + +typedef struct { + __IO uint32_t SCL; /*!< Pin select for SCL signal */ + __IO uint32_t SDA; /*!< Pin select for SDA signal */ +} TWIS_PSEL_Type; + +typedef struct { + __IO uint32_t PTR; /*!< RXD Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in RXD buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last RXD transaction */ +} TWIS_RXD_Type; + +typedef struct { + __IO uint32_t PTR; /*!< TXD Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes in TXD buffer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last TXD transaction */ +} TWIS_TXD_Type; + +typedef struct { + __IO uint32_t RX; /*!< Result of last incoming frame */ +} NFCT_FRAMESTATUS_Type; + +typedef struct { + __IO uint32_t FRAMECONFIG; /*!< Configuration of outgoing frames */ + __IO uint32_t AMOUNT; /*!< Size of outgoing frame */ +} NFCT_TXD_Type; + +typedef struct { + __IO uint32_t FRAMECONFIG; /*!< Configuration of incoming frames */ + __I uint32_t AMOUNT; /*!< Size of last incoming frame */ +} NFCT_RXD_Type; + +typedef struct { + __IO uint32_t LIMITH; /*!< Description cluster[n]: Last result is equal or above CH[n].LIMIT.HIGH */ + __IO uint32_t LIMITL; /*!< Description cluster[n]: Last result is equal or below CH[n].LIMIT.LOW */ +} SAADC_EVENTS_CH_Type; + +typedef struct { + __IO uint32_t PSELP; /*!< Description cluster[n]: Input positive pin selection for CH[n] */ + __IO uint32_t PSELN; /*!< Description cluster[n]: Input negative pin selection for CH[n] */ + __IO uint32_t CONFIG; /*!< Description cluster[n]: Input configuration for CH[n] */ + __IO uint32_t LIMIT; /*!< Description cluster[n]: High/low limits for event monitoring + of a channel */ +} SAADC_CH_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of 16-bit samples to be written to output RAM + buffer */ + __I uint32_t AMOUNT; /*!< Number of 16-bit samples written to output RAM buffer since + the previous START task */ +} SAADC_RESULT_Type; + +typedef struct { + __IO uint32_t LED; /*!< Pin select for LED signal */ + __IO uint32_t A; /*!< Pin select for A signal */ + __IO uint32_t B; /*!< Pin select for B signal */ +} QDEC_PSEL_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Description cluster[n]: Beginning address in RAM of this sequence */ + __IO uint32_t CNT; /*!< Description cluster[n]: Number of values (duty cycles) in this + sequence */ + __IO uint32_t REFRESH; /*!< Description cluster[n]: Number of additional PWM periods between + samples loaded into compare register */ + __IO uint32_t ENDDELAY; /*!< Description cluster[n]: Time added after the sequence */ + __I uint32_t RESERVED1[4]; +} PWM_SEQ_Type; + +typedef struct { + __IO uint32_t OUT[4]; /*!< Description collection[n]: Output pin select for PWM channel + n */ +} PWM_PSEL_Type; + +typedef struct { + __IO uint32_t CLK; /*!< Pin number configuration for PDM CLK signal */ + __IO uint32_t DIN; /*!< Pin number configuration for PDM DIN signal */ +} PDM_PSEL_Type; + +typedef struct { + __IO uint32_t PTR; /*!< RAM address pointer to write samples to with EasyDMA */ + __IO uint32_t MAXCNT; /*!< Number of samples to allocate memory for in EasyDMA mode */ +} PDM_SAMPLE_Type; + +typedef struct { + __IO uint32_t ADDR; /*!< Description cluster[n]: Configure the word-aligned start address + of region n to protect */ + __IO uint32_t SIZE; /*!< Description cluster[n]: Size of region to protect counting from + address ACL[n].ADDR. Write '0' as no effect. */ + __IO uint32_t PERM; /*!< Description cluster[n]: Access permissions for region n as defined + by start address ACL[n].ADDR and size ACL[n].SIZE */ + __IO uint32_t UNUSED0; /*!< Unspecified */ +} ACL_ACL_Type; + +typedef struct { + __O uint32_t EN; /*!< Description cluster[n]: Enable channel group n */ + __O uint32_t DIS; /*!< Description cluster[n]: Disable channel group n */ +} PPI_TASKS_CHG_Type; + +typedef struct { + __IO uint32_t EEP; /*!< Description cluster[n]: Channel n event end-point */ + __IO uint32_t TEP; /*!< Description cluster[n]: Channel n task end-point */ +} PPI_CH_Type; + +typedef struct { + __IO uint32_t TEP; /*!< Description cluster[n]: Channel n task end-point */ +} PPI_FORK_Type; + +typedef struct { + __IO uint32_t WA; /*!< Description cluster[n]: Write access to region n detected */ + __IO uint32_t RA; /*!< Description cluster[n]: Read access to region n detected */ +} MWU_EVENTS_REGION_Type; + +typedef struct { + __IO uint32_t WA; /*!< Description cluster[n]: Write access to peripheral region n + detected */ + __IO uint32_t RA; /*!< Description cluster[n]: Read access to peripheral region n detected */ +} MWU_EVENTS_PREGION_Type; + +typedef struct { + __IO uint32_t SUBSTATWA; /*!< Description cluster[n]: Source of event/interrupt in region + n, write access detected while corresponding subregion was enabled + for watching */ + __IO uint32_t SUBSTATRA; /*!< Description cluster[n]: Source of event/interrupt in region + n, read access detected while corresponding subregion was enabled + for watching */ +} MWU_PERREGION_Type; + +typedef struct { + __IO uint32_t START; /*!< Description cluster[n]: Start address for region n */ + __IO uint32_t END; /*!< Description cluster[n]: End address of region n */ + __I uint32_t RESERVED2[2]; +} MWU_REGION_Type; + +typedef struct { + __I uint32_t START; /*!< Description cluster[n]: Reserved for future use */ + __I uint32_t END; /*!< Description cluster[n]: Reserved for future use */ + __IO uint32_t SUBS; /*!< Description cluster[n]: Subregions of region n */ + __I uint32_t RESERVED3; +} MWU_PREGION_Type; + +typedef struct { + __IO uint32_t MODE; /*!< I2S mode. */ + __IO uint32_t RXEN; /*!< Reception (RX) enable. */ + __IO uint32_t TXEN; /*!< Transmission (TX) enable. */ + __IO uint32_t MCKEN; /*!< Master clock generator enable. */ + __IO uint32_t MCKFREQ; /*!< Master clock generator frequency. */ + __IO uint32_t RATIO; /*!< MCK / LRCK ratio. */ + __IO uint32_t SWIDTH; /*!< Sample width. */ + __IO uint32_t ALIGN; /*!< Alignment of sample within a frame. */ + __IO uint32_t FORMAT; /*!< Frame format. */ + __IO uint32_t CHANNELS; /*!< Enable channels. */ +} I2S_CONFIG_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Receive buffer RAM start address. */ +} I2S_RXD_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Transmit buffer RAM start address. */ +} I2S_TXD_Type; + +typedef struct { + __IO uint32_t MAXCNT; /*!< Size of RXD and TXD buffers. */ +} I2S_RXTXD_Type; + +typedef struct { + __IO uint32_t MCK; /*!< Pin select for MCK signal. */ + __IO uint32_t SCK; /*!< Pin select for SCK signal. */ + __IO uint32_t LRCK; /*!< Pin select for LRCK signal. */ + __IO uint32_t SDIN; /*!< Pin select for SDIN signal. */ + __IO uint32_t SDOUT; /*!< Pin select for SDOUT signal. */ +} I2S_PSEL_Type; + +typedef struct { + __I uint32_t EPIN[8]; /*!< Description collection[n]: IN endpoint halted status. Can be + used as is as response to a GetStatus() request to endpoint. */ + __I uint32_t RESERVED4; + __I uint32_t EPOUT[8]; /*!< Description collection[n]: OUT endpoint halted status. Can be + used as is as response to a GetStatus() request to endpoint. */ +} USBD_HALTED_Type; + +typedef struct { + __IO uint32_t EPOUT[8]; /*!< Description collection[n]: Number of bytes received last in + the data stage of this OUT endpoint */ + __I uint32_t ISOOUT; /*!< Number of bytes received last on this ISO OUT data endpoint */ +} USBD_SIZE_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Description cluster[n]: Data pointer */ + __IO uint32_t MAXCNT; /*!< Description cluster[n]: Maximum number of bytes to transfer */ + __I uint32_t AMOUNT; /*!< Description cluster[n]: Number of bytes transferred in the last + transaction */ + __I uint32_t RESERVED5[2]; +} USBD_EPIN_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes to transfer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ +} USBD_ISOIN_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Description cluster[n]: Data pointer */ + __IO uint32_t MAXCNT; /*!< Description cluster[n]: Maximum number of bytes to transfer */ + __I uint32_t AMOUNT; /*!< Description cluster[n]: Number of bytes transferred in the last + transaction */ + __I uint32_t RESERVED6[2]; +} USBD_EPOUT_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Data pointer */ + __IO uint32_t MAXCNT; /*!< Maximum number of bytes to transfer */ + __I uint32_t AMOUNT; /*!< Number of bytes transferred in the last transaction */ +} USBD_ISOOUT_Type; + +typedef struct { + __IO uint32_t SRC; /*!< Flash memory source address */ + __IO uint32_t DST; /*!< RAM destination address */ + __IO uint32_t CNT; /*!< Read transfer length */ +} QSPI_READ_Type; + +typedef struct { + __IO uint32_t DST; /*!< Flash destination address */ + __IO uint32_t SRC; /*!< RAM source address */ + __IO uint32_t CNT; /*!< Write transfer length */ +} QSPI_WRITE_Type; + +typedef struct { + __IO uint32_t PTR; /*!< Start address of flash block to be erased */ + __IO uint32_t LEN; /*!< Size of block to be erased. */ +} QSPI_ERASE_Type; + +typedef struct { + __IO uint32_t SCK; /*!< Pin select for serial clock SCK */ + __IO uint32_t CSN; /*!< Pin select for chip select signal CSN. */ + __I uint32_t RESERVED7; + __IO uint32_t IO0; /*!< Pin select for serial data MOSI/IO0. */ + __IO uint32_t IO1; /*!< Pin select for serial data MISO/IO1. */ + __IO uint32_t IO2; /*!< Pin select for serial data IO2. */ + __IO uint32_t IO3; /*!< Pin select for serial data IO3. */ +} QSPI_PSEL_Type; + + +/* ================================================================================ */ +/* ================ FICR ================ */ +/* ================================================================================ */ + + +/** + * @brief Factory information configuration registers (FICR) + */ + +typedef struct { /*!< FICR Structure */ + __I uint32_t RESERVED0[4]; + __I uint32_t CODEPAGESIZE; /*!< Code memory page size */ + __I uint32_t CODESIZE; /*!< Code memory size */ + __I uint32_t RESERVED1[18]; + __I uint32_t DEVICEID[2]; /*!< Description collection[n]: Device identifier */ + __I uint32_t RESERVED2[6]; + __I uint32_t ER[4]; /*!< Description collection[n]: Encryption root, word n */ + __I uint32_t IR[4]; /*!< Description collection[n]: Identity Root, word n */ + __I uint32_t DEVICEADDRTYPE; /*!< Device address type */ + __I uint32_t DEVICEADDR[2]; /*!< Description collection[n]: Device address n */ + __I uint32_t RESERVED3[21]; + FICR_INFO_Type INFO; /*!< Device info */ + __I uint32_t RESERVED4[140]; + __I uint32_t PRODTEST[3]; /*!< Description collection[n]: Production test signature n */ + __I uint32_t RESERVED5[42]; + FICR_TEMP_Type TEMP; /*!< Registers storing factory TEMP module linearization coefficients */ + __I uint32_t RESERVED6[2]; + FICR_NFC_Type NFC; /*!< Unspecified */ + __I uint32_t RESERVED7[488]; + FICR_TRNG90B_Type TRNG90B; /*!< NIST800-90B RNG calibration data */ +} NRF_FICR_Type; + + +/* ================================================================================ */ +/* ================ UICR ================ */ +/* ================================================================================ */ + + +/** + * @brief User information configuration registers (UICR) + */ + +typedef struct { /*!< UICR Structure */ + __IO uint32_t UNUSED0; /*!< Unspecified */ + __IO uint32_t UNUSED1; /*!< Unspecified */ + __IO uint32_t UNUSED2; /*!< Unspecified */ + __I uint32_t RESERVED0; + __IO uint32_t UNUSED3; /*!< Unspecified */ + __IO uint32_t NRFFW[15]; /*!< Description collection[n]: Reserved for Nordic firmware design */ + __IO uint32_t NRFHW[12]; /*!< Description collection[n]: Reserved for Nordic hardware design */ + __IO uint32_t CUSTOMER[32]; /*!< Description collection[n]: Reserved for customer */ + __I uint32_t RESERVED1[64]; + __IO uint32_t PSELRESET[2]; /*!< Description collection[n]: Mapping of the nRESET function */ + __IO uint32_t APPROTECT; /*!< Access port protection */ + __IO uint32_t NFCPINS; /*!< Setting of pins dedicated to NFC functionality: NFC antenna + or GPIO */ + __IO uint32_t DEBUGCTRL; /*!< Processor debug control */ + __I uint32_t RESERVED2[60]; + __IO uint32_t REGOUT0; /*!< GPIO reference voltage / external output supply voltage in high + voltage mode */ +} NRF_UICR_Type; + + +/* ================================================================================ */ +/* ================ CLOCK ================ */ +/* ================================================================================ */ + + +/** + * @brief Clock control (CLOCK) + */ + +typedef struct { /*!< CLOCK Structure */ + __O uint32_t TASKS_HFCLKSTART; /*!< Start HFXO crystal oscillator */ + __O uint32_t TASKS_HFCLKSTOP; /*!< Stop HFXO crystal oscillator */ + __O uint32_t TASKS_LFCLKSTART; /*!< Start LFCLK */ + __O uint32_t TASKS_LFCLKSTOP; /*!< Stop LFCLK */ + __O uint32_t TASKS_CAL; /*!< Start calibration of LFRC */ + __O uint32_t TASKS_CTSTART; /*!< Start calibration timer */ + __O uint32_t TASKS_CTSTOP; /*!< Stop calibration timer */ + __I uint32_t RESERVED0[57]; + __IO uint32_t EVENTS_HFCLKSTARTED; /*!< HFXO crystal oscillator started */ + __IO uint32_t EVENTS_LFCLKSTARTED; /*!< LFCLK started */ + __I uint32_t RESERVED1; + __IO uint32_t EVENTS_DONE; /*!< Calibration of LFRC completed */ + __IO uint32_t EVENTS_CTTO; /*!< Calibration timer timeout */ + __I uint32_t RESERVED2[5]; + __IO uint32_t EVENTS_CTSTARTED; /*!< Calibration timer has been started and is ready to process new + tasks */ + __IO uint32_t EVENTS_CTSTOPPED; /*!< Calibration timer has been stopped and is ready to process new + tasks */ + __I uint32_t RESERVED3[117]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED4[63]; + __I uint32_t HFCLKRUN; /*!< Status indicating that HFCLKSTART task has been triggered */ + __I uint32_t HFCLKSTAT; /*!< HFCLK status */ + __I uint32_t RESERVED5; + __I uint32_t LFCLKRUN; /*!< Status indicating that LFCLKSTART task has been triggered */ + __I uint32_t LFCLKSTAT; /*!< LFCLK status */ + __I uint32_t LFCLKSRCCOPY; /*!< Copy of LFCLKSRC register, set when LFCLKSTART task was triggered */ + __I uint32_t RESERVED6[62]; + __IO uint32_t LFCLKSRC; /*!< Clock source for the LFCLK */ + __I uint32_t RESERVED7[3]; + __IO uint32_t HFXODEBOUNCE; /*!< HFXO debounce time. The HFXO is started by triggering the TASKS_HFCLKSTART + task. */ + __I uint32_t RESERVED8[3]; + __IO uint32_t CTIV; /*!< Calibration timer interval */ + __I uint32_t RESERVED9[8]; + __IO uint32_t TRACECONFIG; /*!< Clocking options for the trace port debug interface */ + __I uint32_t RESERVED10[21]; + __IO uint32_t LFRCMODE; /*!< LFRC mode configuration */ +} NRF_CLOCK_Type; + + +/* ================================================================================ */ +/* ================ POWER ================ */ +/* ================================================================================ */ + + +/** + * @brief Power control (POWER) + */ + +typedef struct { /*!< POWER Structure */ + __I uint32_t RESERVED0[30]; + __O uint32_t TASKS_CONSTLAT; /*!< Enable constant latency mode */ + __O uint32_t TASKS_LOWPWR; /*!< Enable low power mode (variable latency) */ + __I uint32_t RESERVED1[34]; + __IO uint32_t EVENTS_POFWARN; /*!< Power failure warning */ + __I uint32_t RESERVED2[2]; + __IO uint32_t EVENTS_SLEEPENTER; /*!< CPU entered WFI/WFE sleep */ + __IO uint32_t EVENTS_SLEEPEXIT; /*!< CPU exited WFI/WFE sleep */ + __IO uint32_t EVENTS_USBDETECTED; /*!< Voltage supply detected on VBUS */ + __IO uint32_t EVENTS_USBREMOVED; /*!< Voltage supply removed from VBUS */ + __IO uint32_t EVENTS_USBPWRRDY; /*!< USB 3.3 V supply ready */ + __I uint32_t RESERVED3[119]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED4[61]; + __IO uint32_t RESETREAS; /*!< Reset reason */ + __I uint32_t RESERVED5[9]; + __I uint32_t RAMSTATUS; /*!< Deprecated register - RAM status register */ + __I uint32_t RESERVED6[3]; + __I uint32_t USBREGSTATUS; /*!< USB supply status */ + __I uint32_t RESERVED7[49]; + __O uint32_t SYSTEMOFF; /*!< System OFF register */ + __I uint32_t RESERVED8[3]; + __IO uint32_t POFCON; /*!< Power-fail comparator configuration */ + __I uint32_t RESERVED9[2]; + __IO uint32_t GPREGRET; /*!< General purpose retention register */ + __IO uint32_t GPREGRET2; /*!< General purpose retention register */ + __I uint32_t RESERVED10[21]; + __IO uint32_t DCDCEN; /*!< Enable DC/DC converter for REG1 stage. */ + __I uint32_t RESERVED11; + __IO uint32_t DCDCEN0; /*!< Enable DC/DC converter for REG0 stage. */ + __I uint32_t RESERVED12[47]; + __I uint32_t MAINREGSTATUS; /*!< Main supply status */ + __I uint32_t RESERVED13[175]; + POWER_RAM_Type RAM[9]; /*!< Unspecified */ +} NRF_POWER_Type; + + +/* ================================================================================ */ +/* ================ RADIO ================ */ +/* ================================================================================ */ + + +/** + * @brief 2.4 GHz radio (RADIO) + */ + +typedef struct { /*!< RADIO Structure */ + __O uint32_t TASKS_TXEN; /*!< Enable RADIO in TX mode */ + __O uint32_t TASKS_RXEN; /*!< Enable RADIO in RX mode */ + __O uint32_t TASKS_START; /*!< Start RADIO */ + __O uint32_t TASKS_STOP; /*!< Stop RADIO */ + __O uint32_t TASKS_DISABLE; /*!< Disable RADIO */ + __O uint32_t TASKS_RSSISTART; /*!< Start the RSSI and take one single sample of the receive signal + strength */ + __O uint32_t TASKS_RSSISTOP; /*!< Stop the RSSI measurement */ + __O uint32_t TASKS_BCSTART; /*!< Start the bit counter */ + __O uint32_t TASKS_BCSTOP; /*!< Stop the bit counter */ + __O uint32_t TASKS_EDSTART; /*!< Start the energy detect measurement used in IEEE 802.15.4 mode */ + __O uint32_t TASKS_EDSTOP; /*!< Stop the energy detect measurement */ + __O uint32_t TASKS_CCASTART; /*!< Start the clear channel assessment used in IEEE 802.15.4 mode */ + __O uint32_t TASKS_CCASTOP; /*!< Stop the clear channel assessment */ + __I uint32_t RESERVED0[51]; + __IO uint32_t EVENTS_READY; /*!< RADIO has ramped up and is ready to be started */ + __IO uint32_t EVENTS_ADDRESS; /*!< Address sent or received */ + __IO uint32_t EVENTS_PAYLOAD; /*!< Packet payload sent or received */ + __IO uint32_t EVENTS_END; /*!< Packet sent or received */ + __IO uint32_t EVENTS_DISABLED; /*!< RADIO has been disabled */ + __IO uint32_t EVENTS_DEVMATCH; /*!< A device address match occurred on the last received packet */ + __IO uint32_t EVENTS_DEVMISS; /*!< No device address match occurred on the last received packet */ + __IO uint32_t EVENTS_RSSIEND; /*!< Sampling of receive signal strength complete */ + __I uint32_t RESERVED1[2]; + __IO uint32_t EVENTS_BCMATCH; /*!< Bit counter reached bit count value */ + __I uint32_t RESERVED2; + __IO uint32_t EVENTS_CRCOK; /*!< Packet received with CRC ok */ + __IO uint32_t EVENTS_CRCERROR; /*!< Packet received with CRC error */ + __IO uint32_t EVENTS_FRAMESTART; /*!< IEEE 802.15.4 length field received */ + __IO uint32_t EVENTS_EDEND; /*!< Sampling of energy detection complete. A new ED sample is ready + for readout from the RADIO.EDSAMPLE register. */ + __IO uint32_t EVENTS_EDSTOPPED; /*!< The sampling of energy detection has stopped */ + __IO uint32_t EVENTS_CCAIDLE; /*!< Wireless medium in idle - clear to send */ + __IO uint32_t EVENTS_CCABUSY; /*!< Wireless medium busy - do not send */ + __IO uint32_t EVENTS_CCASTOPPED; /*!< The CCA has stopped */ + __IO uint32_t EVENTS_RATEBOOST; /*!< Ble_LR CI field received, receive mode is changed from Ble_LR125Kbit + to Ble_LR500Kbit. */ + __IO uint32_t EVENTS_TXREADY; /*!< RADIO has ramped up and is ready to be started TX path */ + __IO uint32_t EVENTS_RXREADY; /*!< RADIO has ramped up and is ready to be started RX path */ + __IO uint32_t EVENTS_MHRMATCH; /*!< MAC header match found */ + __I uint32_t RESERVED3[3]; + __IO uint32_t EVENTS_PHYEND; /*!< Generated in Ble_LR125Kbit, Ble_LR500Kbit and BleIeee802154_250Kbit + modes when last bit is sent on air. */ + __I uint32_t RESERVED4[36]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED5[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED6[61]; + __I uint32_t CRCSTATUS; /*!< CRC status */ + __I uint32_t RESERVED7; + __I uint32_t RXMATCH; /*!< Received address */ + __I uint32_t RXCRC; /*!< CRC field of previously received packet */ + __I uint32_t DAI; /*!< Device address match index */ + __I uint32_t PDUSTAT; /*!< Payload status */ + __I uint32_t RESERVED8[59]; + __IO uint32_t PACKETPTR; /*!< Packet pointer */ + __IO uint32_t FREQUENCY; /*!< Frequency */ + __IO uint32_t TXPOWER; /*!< Output power */ + __IO uint32_t MODE; /*!< Data rate and modulation */ + __IO uint32_t PCNF0; /*!< Packet configuration register 0 */ + __IO uint32_t PCNF1; /*!< Packet configuration register 1 */ + __IO uint32_t BASE0; /*!< Base address 0 */ + __IO uint32_t BASE1; /*!< Base address 1 */ + __IO uint32_t PREFIX0; /*!< Prefixes bytes for logical addresses 0-3 */ + __IO uint32_t PREFIX1; /*!< Prefixes bytes for logical addresses 4-7 */ + __IO uint32_t TXADDRESS; /*!< Transmit address select */ + __IO uint32_t RXADDRESSES; /*!< Receive address select */ + __IO uint32_t CRCCNF; /*!< CRC configuration */ + __IO uint32_t CRCPOLY; /*!< CRC polynomial */ + __IO uint32_t CRCINIT; /*!< CRC initial value */ + __I uint32_t RESERVED9; + __IO uint32_t TIFS; /*!< Interframe spacing in us */ + __I uint32_t RSSISAMPLE; /*!< RSSI sample */ + __I uint32_t RESERVED10; + __I uint32_t STATE; /*!< Current radio state */ + __IO uint32_t DATAWHITEIV; /*!< Data whitening initial value */ + __I uint32_t RESERVED11[2]; + __IO uint32_t BCC; /*!< Bit counter compare */ + __I uint32_t RESERVED12[39]; + __IO uint32_t DAB[8]; /*!< Description collection[n]: Device address base segment n */ + __IO uint32_t DAP[8]; /*!< Description collection[n]: Device address prefix n */ + __IO uint32_t DACNF; /*!< Device address match configuration */ + __IO uint32_t MHRMATCHCONF; /*!< Search pattern configuration */ + __IO uint32_t MHRMATCHMAS; /*!< Pattern mask */ + __I uint32_t RESERVED13; + __IO uint32_t MODECNF0; /*!< Radio mode configuration register 0 */ + __I uint32_t RESERVED14[3]; + __IO uint32_t SFD; /*!< IEEE 802.15.4 start of frame delimiter */ + __IO uint32_t EDCNT; /*!< IEEE 802.15.4 energy detect loop count */ + __IO uint32_t EDSAMPLE; /*!< IEEE 802.15.4 energy detect level */ + __IO uint32_t CCACTRL; /*!< IEEE 802.15.4 clear channel assessment control */ + __I uint32_t RESERVED15[611]; + __IO uint32_t POWER; /*!< Peripheral power control */ +} NRF_RADIO_Type; + + +/* ================================================================================ */ +/* ================ UART ================ */ +/* ================================================================================ */ + + +/** + * @brief Universal Asynchronous Receiver/Transmitter (UART) + */ + +typedef struct { /*!< UART Structure */ + __O uint32_t TASKS_STARTRX; /*!< Start UART receiver */ + __O uint32_t TASKS_STOPRX; /*!< Stop UART receiver */ + __O uint32_t TASKS_STARTTX; /*!< Start UART transmitter */ + __O uint32_t TASKS_STOPTX; /*!< Stop UART transmitter */ + __I uint32_t RESERVED0[3]; + __O uint32_t TASKS_SUSPEND; /*!< Suspend UART */ + __I uint32_t RESERVED1[56]; + __IO uint32_t EVENTS_CTS; /*!< CTS is activated (set low). Clear To Send. */ + __IO uint32_t EVENTS_NCTS; /*!< CTS is deactivated (set high). Not Clear To Send. */ + __IO uint32_t EVENTS_RXDRDY; /*!< Data received in RXD */ + __I uint32_t RESERVED2[4]; + __IO uint32_t EVENTS_TXDRDY; /*!< Data sent from TXD */ + __I uint32_t RESERVED3; + __IO uint32_t EVENTS_ERROR; /*!< Error detected */ + __I uint32_t RESERVED4[7]; + __IO uint32_t EVENTS_RXTO; /*!< Receiver timeout */ + __I uint32_t RESERVED5[46]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED6[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED7[93]; + __IO uint32_t ERRORSRC; /*!< Error source */ + __I uint32_t RESERVED8[31]; + __IO uint32_t ENABLE; /*!< Enable UART */ + __I uint32_t RESERVED9; + UART_PSEL_Type PSEL; /*!< Unspecified */ + __I uint32_t RXD; /*!< RXD register */ + __O uint32_t TXD; /*!< TXD register */ + __I uint32_t RESERVED10; + __IO uint32_t BAUDRATE; /*!< Baud rate. Accuracy depends on the HFCLK source selected. */ + __I uint32_t RESERVED11[17]; + __IO uint32_t CONFIG; /*!< Configuration of parity and hardware flow control */ +} NRF_UART_Type; + + +/* ================================================================================ */ +/* ================ UARTE ================ */ +/* ================================================================================ */ + + +/** + * @brief UART with EasyDMA 0 (UARTE) + */ + +typedef struct { /*!< UARTE Structure */ + __O uint32_t TASKS_STARTRX; /*!< Start UART receiver */ + __O uint32_t TASKS_STOPRX; /*!< Stop UART receiver */ + __O uint32_t TASKS_STARTTX; /*!< Start UART transmitter */ + __O uint32_t TASKS_STOPTX; /*!< Stop UART transmitter */ + __I uint32_t RESERVED0[7]; + __O uint32_t TASKS_FLUSHRX; /*!< Flush RX FIFO into RX buffer */ + __I uint32_t RESERVED1[52]; + __IO uint32_t EVENTS_CTS; /*!< CTS is activated (set low). Clear To Send. */ + __IO uint32_t EVENTS_NCTS; /*!< CTS is deactivated (set high). Not Clear To Send. */ + __IO uint32_t EVENTS_RXDRDY; /*!< Data received in RXD (but potentially not yet transferred to + Data RAM) */ + __I uint32_t RESERVED2; + __IO uint32_t EVENTS_ENDRX; /*!< Receive buffer is filled up */ + __I uint32_t RESERVED3[2]; + __IO uint32_t EVENTS_TXDRDY; /*!< Data sent from TXD */ + __IO uint32_t EVENTS_ENDTX; /*!< Last TX byte transmitted */ + __IO uint32_t EVENTS_ERROR; /*!< Error detected */ + __I uint32_t RESERVED4[7]; + __IO uint32_t EVENTS_RXTO; /*!< Receiver timeout */ + __I uint32_t RESERVED5; + __IO uint32_t EVENTS_RXSTARTED; /*!< UART receiver has started */ + __IO uint32_t EVENTS_TXSTARTED; /*!< UART transmitter has started */ + __I uint32_t RESERVED6; + __IO uint32_t EVENTS_TXSTOPPED; /*!< Transmitter stopped */ + __I uint32_t RESERVED7[41]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED8[63]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED9[93]; + __IO uint32_t ERRORSRC; /*!< Error source Note : this register is read / write one to clear. */ + __I uint32_t RESERVED10[31]; + __IO uint32_t ENABLE; /*!< Enable UART */ + __I uint32_t RESERVED11; + UARTE_PSEL_Type PSEL; /*!< Unspecified */ + __I uint32_t RESERVED12[3]; + __IO uint32_t BAUDRATE; /*!< Baud rate. Accuracy depends on the HFCLK source selected. */ + __I uint32_t RESERVED13[3]; + UARTE_RXD_Type RXD; /*!< RXD EasyDMA channel */ + __I uint32_t RESERVED14; + UARTE_TXD_Type TXD; /*!< TXD EasyDMA channel */ + __I uint32_t RESERVED15[7]; + __IO uint32_t CONFIG; /*!< Configuration of parity and hardware flow control */ +} NRF_UARTE_Type; + + +/* ================================================================================ */ +/* ================ SPI ================ */ +/* ================================================================================ */ + + +/** + * @brief Serial Peripheral Interface 0 (SPI) + */ + +typedef struct { /*!< SPI Structure */ + __I uint32_t RESERVED0[66]; + __IO uint32_t EVENTS_READY; /*!< TXD byte sent and RXD byte received */ + __I uint32_t RESERVED1[126]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED2[125]; + __IO uint32_t ENABLE; /*!< Enable SPI */ + __I uint32_t RESERVED3; + SPI_PSEL_Type PSEL; /*!< Unspecified */ + __I uint32_t RESERVED4; + __I uint32_t RXD; /*!< RXD register */ + __IO uint32_t TXD; /*!< TXD register */ + __I uint32_t RESERVED5; + __IO uint32_t FREQUENCY; /*!< SPI frequency. Accuracy depends on the HFCLK source selected. */ + __I uint32_t RESERVED6[11]; + __IO uint32_t CONFIG; /*!< Configuration register */ +} NRF_SPI_Type; + + +/* ================================================================================ */ +/* ================ SPIM ================ */ +/* ================================================================================ */ + + +/** + * @brief Serial Peripheral Interface Master with EasyDMA 0 (SPIM) + */ + +typedef struct { /*!< SPIM Structure */ + __I uint32_t RESERVED0[4]; + __O uint32_t TASKS_START; /*!< Start SPI transaction */ + __O uint32_t TASKS_STOP; /*!< Stop SPI transaction */ + __I uint32_t RESERVED1; + __O uint32_t TASKS_SUSPEND; /*!< Suspend SPI transaction */ + __O uint32_t TASKS_RESUME; /*!< Resume SPI transaction */ + __I uint32_t RESERVED2[56]; + __IO uint32_t EVENTS_STOPPED; /*!< SPI transaction has stopped */ + __I uint32_t RESERVED3[2]; + __IO uint32_t EVENTS_ENDRX; /*!< End of RXD buffer reached */ + __I uint32_t RESERVED4; + __IO uint32_t EVENTS_END; /*!< End of RXD buffer and TXD buffer reached */ + __I uint32_t RESERVED5; + __IO uint32_t EVENTS_ENDTX; /*!< End of TXD buffer reached */ + __I uint32_t RESERVED6[10]; + __IO uint32_t EVENTS_STARTED; /*!< Transaction started */ + __I uint32_t RESERVED7[44]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED8[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED9[61]; + __IO uint32_t STALLSTAT; /*!< Stall status for EasyDMA RAM accesses. The fields in this register + is set to STALL by hardware whenever a stall occurres and can + be cleared (set to NOSTALL) by the CPU. */ + __I uint32_t RESERVED10[63]; + __IO uint32_t ENABLE; /*!< Enable SPIM */ + __I uint32_t RESERVED11; + SPIM_PSEL_Type PSEL; /*!< Unspecified */ + __I uint32_t RESERVED12[3]; + __IO uint32_t FREQUENCY; /*!< SPI frequency. Accuracy depends on the HFCLK source selected. */ + __I uint32_t RESERVED13[3]; + SPIM_RXD_Type RXD; /*!< RXD EasyDMA channel */ + SPIM_TXD_Type TXD; /*!< TXD EasyDMA channel */ + __IO uint32_t CONFIG; /*!< Configuration register */ + __I uint32_t RESERVED14[2]; + SPIM_IFTIMING_Type IFTIMING; /*!< Unspecified */ + __IO uint32_t CSNPOL; /*!< Polarity of CSN output */ + __IO uint32_t PSELDCX; /*!< Pin select for DCX signal */ + __IO uint32_t DCXCNT; /*!< DCX configuration */ + __I uint32_t RESERVED15[19]; + __IO uint32_t ORC; /*!< Byte transmitted after TXD.MAXCNT bytes have been transmitted + in the case when RXD.MAXCNT is greater than TXD.MAXCNT */ +} NRF_SPIM_Type; + + +/* ================================================================================ */ +/* ================ SPIS ================ */ +/* ================================================================================ */ + + +/** + * @brief SPI Slave 0 (SPIS) + */ + +typedef struct { /*!< SPIS Structure */ + __I uint32_t RESERVED0[9]; + __O uint32_t TASKS_ACQUIRE; /*!< Acquire SPI semaphore */ + __O uint32_t TASKS_RELEASE; /*!< Release SPI semaphore, enabling the SPI slave to acquire it */ + __I uint32_t RESERVED1[54]; + __IO uint32_t EVENTS_END; /*!< Granted transaction completed */ + __I uint32_t RESERVED2[2]; + __IO uint32_t EVENTS_ENDRX; /*!< End of RXD buffer reached */ + __I uint32_t RESERVED3[5]; + __IO uint32_t EVENTS_ACQUIRED; /*!< Semaphore acquired */ + __I uint32_t RESERVED4[53]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED5[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED6[61]; + __I uint32_t SEMSTAT; /*!< Semaphore status register */ + __I uint32_t RESERVED7[15]; + __IO uint32_t STATUS; /*!< Status from last transaction */ + __I uint32_t RESERVED8[47]; + __IO uint32_t ENABLE; /*!< Enable SPI slave */ + __I uint32_t RESERVED9; + SPIS_PSEL_Type PSEL; /*!< Unspecified */ + __I uint32_t RESERVED10[7]; + SPIS_RXD_Type RXD; /*!< Unspecified */ + __I uint32_t RESERVED11; + SPIS_TXD_Type TXD; /*!< Unspecified */ + __I uint32_t RESERVED12; + __IO uint32_t CONFIG; /*!< Configuration register */ + __I uint32_t RESERVED13; + __IO uint32_t DEF; /*!< Default character. Character clocked out in case of an ignored + transaction. */ + __I uint32_t RESERVED14[24]; + __IO uint32_t ORC; /*!< Over-read character */ +} NRF_SPIS_Type; + + +/* ================================================================================ */ +/* ================ TWI ================ */ +/* ================================================================================ */ + + +/** + * @brief I2C compatible Two-Wire Interface 0 (TWI) + */ + +typedef struct { /*!< TWI Structure */ + __O uint32_t TASKS_STARTRX; /*!< Start TWI receive sequence */ + __I uint32_t RESERVED0; + __O uint32_t TASKS_STARTTX; /*!< Start TWI transmit sequence */ + __I uint32_t RESERVED1[2]; + __O uint32_t TASKS_STOP; /*!< Stop TWI transaction */ + __I uint32_t RESERVED2; + __O uint32_t TASKS_SUSPEND; /*!< Suspend TWI transaction */ + __O uint32_t TASKS_RESUME; /*!< Resume TWI transaction */ + __I uint32_t RESERVED3[56]; + __IO uint32_t EVENTS_STOPPED; /*!< TWI stopped */ + __IO uint32_t EVENTS_RXDREADY; /*!< TWI RXD byte received */ + __I uint32_t RESERVED4[4]; + __IO uint32_t EVENTS_TXDSENT; /*!< TWI TXD byte sent */ + __I uint32_t RESERVED5; + __IO uint32_t EVENTS_ERROR; /*!< TWI error */ + __I uint32_t RESERVED6[4]; + __IO uint32_t EVENTS_BB; /*!< TWI byte boundary, generated before each byte that is sent or + received */ + __I uint32_t RESERVED7[3]; + __IO uint32_t EVENTS_SUSPENDED; /*!< TWI entered the suspended state */ + __I uint32_t RESERVED8[45]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED9[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED10[110]; + __IO uint32_t ERRORSRC; /*!< Error source */ + __I uint32_t RESERVED11[14]; + __IO uint32_t ENABLE; /*!< Enable TWI */ + __I uint32_t RESERVED12; + TWI_PSEL_Type PSEL; /*!< Unspecified */ + __I uint32_t RESERVED13[2]; + __I uint32_t RXD; /*!< RXD register */ + __IO uint32_t TXD; /*!< TXD register */ + __I uint32_t RESERVED14; + __IO uint32_t FREQUENCY; /*!< TWI frequency. Accuracy depends on the HFCLK source selected. */ + __I uint32_t RESERVED15[24]; + __IO uint32_t ADDRESS; /*!< Address used in the TWI transfer */ +} NRF_TWI_Type; + + +/* ================================================================================ */ +/* ================ TWIM ================ */ +/* ================================================================================ */ + + +/** + * @brief I2C compatible Two-Wire Master Interface with EasyDMA 0 (TWIM) + */ + +typedef struct { /*!< TWIM Structure */ + __O uint32_t TASKS_STARTRX; /*!< Start TWI receive sequence */ + __I uint32_t RESERVED0; + __O uint32_t TASKS_STARTTX; /*!< Start TWI transmit sequence */ + __I uint32_t RESERVED1[2]; + __O uint32_t TASKS_STOP; /*!< Stop TWI transaction. Must be issued while the TWI master is + not suspended. */ + __I uint32_t RESERVED2; + __O uint32_t TASKS_SUSPEND; /*!< Suspend TWI transaction */ + __O uint32_t TASKS_RESUME; /*!< Resume TWI transaction */ + __I uint32_t RESERVED3[56]; + __IO uint32_t EVENTS_STOPPED; /*!< TWI stopped */ + __I uint32_t RESERVED4[7]; + __IO uint32_t EVENTS_ERROR; /*!< TWI error */ + __I uint32_t RESERVED5[8]; + __IO uint32_t EVENTS_SUSPENDED; /*!< Last byte has been sent out after the SUSPEND task has been + issued, TWI traffic is now suspended. */ + __IO uint32_t EVENTS_RXSTARTED; /*!< Receive sequence started */ + __IO uint32_t EVENTS_TXSTARTED; /*!< Transmit sequence started */ + __I uint32_t RESERVED6[2]; + __IO uint32_t EVENTS_LASTRX; /*!< Byte boundary, starting to receive the last byte */ + __IO uint32_t EVENTS_LASTTX; /*!< Byte boundary, starting to transmit the last byte */ + __I uint32_t RESERVED7[39]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED8[63]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED9[110]; + __IO uint32_t ERRORSRC; /*!< Error source */ + __I uint32_t RESERVED10[14]; + __IO uint32_t ENABLE; /*!< Enable TWIM */ + __I uint32_t RESERVED11; + TWIM_PSEL_Type PSEL; /*!< Unspecified */ + __I uint32_t RESERVED12[5]; + __IO uint32_t FREQUENCY; /*!< TWI frequency. Accuracy depends on the HFCLK source selected. */ + __I uint32_t RESERVED13[3]; + TWIM_RXD_Type RXD; /*!< RXD EasyDMA channel */ + TWIM_TXD_Type TXD; /*!< TXD EasyDMA channel */ + __I uint32_t RESERVED14[13]; + __IO uint32_t ADDRESS; /*!< Address used in the TWI transfer */ +} NRF_TWIM_Type; + + +/* ================================================================================ */ +/* ================ TWIS ================ */ +/* ================================================================================ */ + + +/** + * @brief I2C compatible Two-Wire Slave Interface with EasyDMA 0 (TWIS) + */ + +typedef struct { /*!< TWIS Structure */ + __I uint32_t RESERVED0[5]; + __O uint32_t TASKS_STOP; /*!< Stop TWI transaction */ + __I uint32_t RESERVED1; + __O uint32_t TASKS_SUSPEND; /*!< Suspend TWI transaction */ + __O uint32_t TASKS_RESUME; /*!< Resume TWI transaction */ + __I uint32_t RESERVED2[3]; + __O uint32_t TASKS_PREPARERX; /*!< Prepare the TWI slave to respond to a write command */ + __O uint32_t TASKS_PREPARETX; /*!< Prepare the TWI slave to respond to a read command */ + __I uint32_t RESERVED3[51]; + __IO uint32_t EVENTS_STOPPED; /*!< TWI stopped */ + __I uint32_t RESERVED4[7]; + __IO uint32_t EVENTS_ERROR; /*!< TWI error */ + __I uint32_t RESERVED5[9]; + __IO uint32_t EVENTS_RXSTARTED; /*!< Receive sequence started */ + __IO uint32_t EVENTS_TXSTARTED; /*!< Transmit sequence started */ + __I uint32_t RESERVED6[4]; + __IO uint32_t EVENTS_WRITE; /*!< Write command received */ + __IO uint32_t EVENTS_READ; /*!< Read command received */ + __I uint32_t RESERVED7[37]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED8[63]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED9[113]; + __IO uint32_t ERRORSRC; /*!< Error source */ + __I uint32_t MATCH; /*!< Status register indicating which address had a match */ + __I uint32_t RESERVED10[10]; + __IO uint32_t ENABLE; /*!< Enable TWIS */ + __I uint32_t RESERVED11; + TWIS_PSEL_Type PSEL; /*!< Unspecified */ + __I uint32_t RESERVED12[9]; + TWIS_RXD_Type RXD; /*!< RXD EasyDMA channel */ + __I uint32_t RESERVED13; + TWIS_TXD_Type TXD; /*!< TXD EasyDMA channel */ + __I uint32_t RESERVED14[14]; + __IO uint32_t ADDRESS[2]; /*!< Description collection[n]: TWI slave address n */ + __I uint32_t RESERVED15; + __IO uint32_t CONFIG; /*!< Configuration register for the address match mechanism */ + __I uint32_t RESERVED16[10]; + __IO uint32_t ORC; /*!< Over-read character. Character sent out in case of an over-read + of the transmit buffer. */ +} NRF_TWIS_Type; + + +/* ================================================================================ */ +/* ================ NFCT ================ */ +/* ================================================================================ */ + + +/** + * @brief NFC-A compatible radio (NFCT) + */ + +typedef struct { /*!< NFCT Structure */ + __O uint32_t TASKS_ACTIVATE; /*!< Activate NFCT peripheral for incoming and outgoing frames, change + state to activated */ + __O uint32_t TASKS_DISABLE; /*!< Disable NFCT peripheral */ + __O uint32_t TASKS_SENSE; /*!< Enable NFC sense field mode, change state to sense mode */ + __O uint32_t TASKS_STARTTX; /*!< Start transmission of an outgoing frame, change state to transmit */ + __I uint32_t RESERVED0[3]; + __O uint32_t TASKS_ENABLERXDATA; /*!< Initializes the EasyDMA for receive. */ + __I uint32_t RESERVED1; + __O uint32_t TASKS_GOIDLE; /*!< Force state machine to IDLE state */ + __O uint32_t TASKS_GOSLEEP; /*!< Force state machine to SLEEP_A state */ + __I uint32_t RESERVED2[53]; + __IO uint32_t EVENTS_READY; /*!< The NFCT peripheral is ready to receive and send frames */ + __IO uint32_t EVENTS_FIELDDETECTED; /*!< Remote NFC field detected */ + __IO uint32_t EVENTS_FIELDLOST; /*!< Remote NFC field lost */ + __IO uint32_t EVENTS_TXFRAMESTART; /*!< Marks the start of the first symbol of a transmitted frame */ + __IO uint32_t EVENTS_TXFRAMEEND; /*!< Marks the end of the last transmitted on-air symbol of a frame */ + __IO uint32_t EVENTS_RXFRAMESTART; /*!< Marks the end of the first symbol of a received frame */ + __IO uint32_t EVENTS_RXFRAMEEND; /*!< Received data has been checked (CRC, parity) and transferred + to RAM, and EasyDMA has ended accessing the RX buffer */ + __IO uint32_t EVENTS_ERROR; /*!< NFC error reported. The ERRORSTATUS register contains details + on the source of the error. */ + __I uint32_t RESERVED3[2]; + __IO uint32_t EVENTS_RXERROR; /*!< NFC RX frame error reported. The FRAMESTATUS.RX register contains + details on the source of the error. */ + __IO uint32_t EVENTS_ENDRX; /*!< RX buffer (as defined by PACKETPTR and MAXLEN) in Data RAM full. */ + __IO uint32_t EVENTS_ENDTX; /*!< Transmission of data in RAM has ended, and EasyDMA has ended + accessing the TX buffer */ + __I uint32_t RESERVED4; + __IO uint32_t EVENTS_AUTOCOLRESSTARTED; /*!< Auto collision resolution process has started */ + __I uint32_t RESERVED5[3]; + __IO uint32_t EVENTS_COLLISION; /*!< NFC auto collision resolution error reported. */ + __IO uint32_t EVENTS_SELECTED; /*!< NFC auto collision resolution successfully completed */ + __IO uint32_t EVENTS_STARTED; /*!< EasyDMA is ready to receive or send frames. */ + __I uint32_t RESERVED6[43]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED7[63]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED8[62]; + __IO uint32_t ERRORSTATUS; /*!< NFC Error Status register */ + __I uint32_t RESERVED9; + NFCT_FRAMESTATUS_Type FRAMESTATUS; /*!< Unspecified */ + __I uint32_t NFCTAGSTATE; /*!< NfcTag state register */ + __I uint32_t RESERVED10[3]; + __I uint32_t SLEEPSTATE; /*!< Sleep state during automatic collision resolution */ + __I uint32_t RESERVED11[6]; + __I uint32_t FIELDPRESENT; /*!< Indicates the presence or not of a valid field */ + __I uint32_t RESERVED12[49]; + __IO uint32_t FRAMEDELAYMIN; /*!< Minimum frame delay */ + __IO uint32_t FRAMEDELAYMAX; /*!< Maximum frame delay */ + __IO uint32_t FRAMEDELAYMODE; /*!< Configuration register for the Frame Delay Timer */ + __IO uint32_t PACKETPTR; /*!< Packet pointer for TXD and RXD data storage in Data RAM */ + __IO uint32_t MAXLEN; /*!< Size of the RAM buffer allocated to TXD and RXD data storage + each */ + NFCT_TXD_Type TXD; /*!< Unspecified */ + NFCT_RXD_Type RXD; /*!< Unspecified */ + __I uint32_t RESERVED13[26]; + __IO uint32_t NFCID1_LAST; /*!< Last NFCID1 part (4, 7 or 10 bytes ID) */ + __IO uint32_t NFCID1_2ND_LAST; /*!< Second last NFCID1 part (7 or 10 bytes ID) */ + __IO uint32_t NFCID1_3RD_LAST; /*!< Third last NFCID1 part (10 bytes ID) */ + __IO uint32_t AUTOCOLRESCONFIG; /*!< Controls the auto collision resolution function. This setting + must be done before the NFCT peripheral is enabled. */ + __IO uint32_t SENSRES; /*!< NFC-A SENS_RES auto-response settings */ + __IO uint32_t SELRES; /*!< NFC-A SEL_RES auto-response settings */ +} NRF_NFCT_Type; + + +/* ================================================================================ */ +/* ================ GPIOTE ================ */ +/* ================================================================================ */ + + +/** + * @brief GPIO Tasks and Events (GPIOTE) + */ + +typedef struct { /*!< GPIOTE Structure */ + __O uint32_t TASKS_OUT[8]; /*!< Description collection[n]: Task for writing to pin specified + in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY. */ + __I uint32_t RESERVED0[4]; + __O uint32_t TASKS_SET[8]; /*!< Description collection[n]: Task for writing to pin specified + in CONFIG[n].PSEL. Action on pin is to set it high. */ + __I uint32_t RESERVED1[4]; + __O uint32_t TASKS_CLR[8]; /*!< Description collection[n]: Task for writing to pin specified + in CONFIG[n].PSEL. Action on pin is to set it low. */ + __I uint32_t RESERVED2[32]; + __IO uint32_t EVENTS_IN[8]; /*!< Description collection[n]: Event generated from pin specified + in CONFIG[n].PSEL */ + __I uint32_t RESERVED3[23]; + __IO uint32_t EVENTS_PORT; /*!< Event generated from multiple input GPIO pins with SENSE mechanism + enabled */ + __I uint32_t RESERVED4[97]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED5[129]; + __IO uint32_t CONFIG[8]; /*!< Description collection[n]: Configuration for OUT[n], SET[n] + and CLR[n] tasks and IN[n] event */ +} NRF_GPIOTE_Type; + + +/* ================================================================================ */ +/* ================ SAADC ================ */ +/* ================================================================================ */ + + +/** + * @brief Successive approximation register (SAR) analog-to-digital converter (SAADC) + */ + +typedef struct { /*!< SAADC Structure */ + __O uint32_t TASKS_START; /*!< Starts the SAADC and prepares the result buffer in RAM */ + __O uint32_t TASKS_SAMPLE; /*!< Takes one SAADC sample */ + __O uint32_t TASKS_STOP; /*!< Stops the SAADC and terminates all on-going conversions */ + __O uint32_t TASKS_CALIBRATEOFFSET; /*!< Starts offset auto-calibration */ + __I uint32_t RESERVED0[60]; + __IO uint32_t EVENTS_STARTED; /*!< The SAADC has started */ + __IO uint32_t EVENTS_END; /*!< The SAADC has filled up the result buffer */ + __IO uint32_t EVENTS_DONE; /*!< A conversion task has been completed. Depending on the configuration, + multiple conversions might be needed for a result to be transferred + to RAM. */ + __IO uint32_t EVENTS_RESULTDONE; /*!< Result ready for transfer to RAM */ + __IO uint32_t EVENTS_CALIBRATEDONE; /*!< Calibration is complete */ + __IO uint32_t EVENTS_STOPPED; /*!< The SAADC has stopped */ + SAADC_EVENTS_CH_Type EVENTS_CH[8]; /*!< Unspecified */ + __I uint32_t RESERVED1[106]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED2[61]; + __I uint32_t STATUS; /*!< Status */ + __I uint32_t RESERVED3[63]; + __IO uint32_t ENABLE; /*!< Enable or disable SAADC */ + __I uint32_t RESERVED4[3]; + SAADC_CH_Type CH[8]; /*!< Unspecified */ + __I uint32_t RESERVED5[24]; + __IO uint32_t RESOLUTION; /*!< Resolution configuration */ + __IO uint32_t OVERSAMPLE; /*!< Oversampling configuration. The RESOLUTION is applied before + averaging, thus for high OVERSAMPLE a higher RESOLUTION should + be used. */ + __IO uint32_t SAMPLERATE; /*!< Controls normal or continuous sample rate */ + __I uint32_t RESERVED6[12]; + SAADC_RESULT_Type RESULT; /*!< RESULT EasyDMA channel */ +} NRF_SAADC_Type; + + +/* ================================================================================ */ +/* ================ TIMER ================ */ +/* ================================================================================ */ + + +/** + * @brief Timer/Counter 0 (TIMER) + */ + +typedef struct { /*!< TIMER Structure */ + __O uint32_t TASKS_START; /*!< Start Timer */ + __O uint32_t TASKS_STOP; /*!< Stop Timer */ + __O uint32_t TASKS_COUNT; /*!< Increment Timer (Counter mode only) */ + __O uint32_t TASKS_CLEAR; /*!< Clear time */ + __O uint32_t TASKS_SHUTDOWN; /*!< Deprecated register - Shut down timer */ + __I uint32_t RESERVED0[11]; + __O uint32_t TASKS_CAPTURE[6]; /*!< Description collection[n]: Capture Timer value to CC[n] register */ + __I uint32_t RESERVED1[58]; + __IO uint32_t EVENTS_COMPARE[6]; /*!< Description collection[n]: Compare event on CC[n] match */ + __I uint32_t RESERVED2[42]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED3[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED4[126]; + __IO uint32_t MODE; /*!< Timer mode selection */ + __IO uint32_t BITMODE; /*!< Configure the number of bits used by the TIMER */ + __I uint32_t RESERVED5; + __IO uint32_t PRESCALER; /*!< Timer prescaler register */ + __I uint32_t RESERVED6[11]; + __IO uint32_t CC[6]; /*!< Description collection[n]: Capture/Compare register n */ +} NRF_TIMER_Type; + + +/* ================================================================================ */ +/* ================ RTC ================ */ +/* ================================================================================ */ + + +/** + * @brief Real time counter 0 (RTC) + */ + +typedef struct { /*!< RTC Structure */ + __O uint32_t TASKS_START; /*!< Start RTC COUNTER */ + __O uint32_t TASKS_STOP; /*!< Stop RTC COUNTER */ + __O uint32_t TASKS_CLEAR; /*!< Clear RTC COUNTER */ + __O uint32_t TASKS_TRIGOVRFLW; /*!< Set COUNTER to 0xFFFFF0 */ + __I uint32_t RESERVED0[60]; + __IO uint32_t EVENTS_TICK; /*!< Event on COUNTER increment */ + __IO uint32_t EVENTS_OVRFLW; /*!< Event on COUNTER overflow */ + __I uint32_t RESERVED1[14]; + __IO uint32_t EVENTS_COMPARE[4]; /*!< Description collection[n]: Compare event on CC[n] match */ + __I uint32_t RESERVED2[109]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[13]; + __IO uint32_t EVTEN; /*!< Enable or disable event routing */ + __IO uint32_t EVTENSET; /*!< Enable event routing */ + __IO uint32_t EVTENCLR; /*!< Disable event routing */ + __I uint32_t RESERVED4[110]; + __I uint32_t COUNTER; /*!< Current COUNTER value */ + __IO uint32_t PRESCALER; /*!< 12 bit prescaler for COUNTER frequency (32768/(PRESCALER+1)).Must + be written when RTC is stopped */ + __I uint32_t RESERVED5[13]; + __IO uint32_t CC[4]; /*!< Description collection[n]: Compare register n */ +} NRF_RTC_Type; + + +/* ================================================================================ */ +/* ================ TEMP ================ */ +/* ================================================================================ */ + + +/** + * @brief Temperature Sensor (TEMP) + */ + +typedef struct { /*!< TEMP Structure */ + __O uint32_t TASKS_START; /*!< Start temperature measurement */ + __O uint32_t TASKS_STOP; /*!< Stop temperature measurement */ + __I uint32_t RESERVED0[62]; + __IO uint32_t EVENTS_DATARDY; /*!< Temperature measurement complete, data ready */ + __I uint32_t RESERVED1[128]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED2[127]; + __I int32_t TEMP; /*!< Temperature in degC (0.25deg steps) */ + __I uint32_t RESERVED3[5]; + __IO uint32_t A0; /*!< Slope of 1st piece wise linear function */ + __IO uint32_t A1; /*!< Slope of 2nd piece wise linear function */ + __IO uint32_t A2; /*!< Slope of 3rd piece wise linear function */ + __IO uint32_t A3; /*!< Slope of 4th piece wise linear function */ + __IO uint32_t A4; /*!< Slope of 5th piece wise linear function */ + __IO uint32_t A5; /*!< Slope of 6th piece wise linear function */ + __I uint32_t RESERVED4[2]; + __IO uint32_t B0; /*!< y-intercept of 1st piece wise linear function */ + __IO uint32_t B1; /*!< y-intercept of 2nd piece wise linear function */ + __IO uint32_t B2; /*!< y-intercept of 3rd piece wise linear function */ + __IO uint32_t B3; /*!< y-intercept of 4th piece wise linear function */ + __IO uint32_t B4; /*!< y-intercept of 5th piece wise linear function */ + __IO uint32_t B5; /*!< y-intercept of 6th piece wise linear function */ + __I uint32_t RESERVED5[2]; + __IO uint32_t T0; /*!< End point of 1st piece wise linear function */ + __IO uint32_t T1; /*!< End point of 2nd piece wise linear function */ + __IO uint32_t T2; /*!< End point of 3rd piece wise linear function */ + __IO uint32_t T3; /*!< End point of 4th piece wise linear function */ + __IO uint32_t T4; /*!< End point of 5th piece wise linear function */ +} NRF_TEMP_Type; + + +/* ================================================================================ */ +/* ================ RNG ================ */ +/* ================================================================================ */ + + +/** + * @brief Random Number Generator (RNG) + */ + +typedef struct { /*!< RNG Structure */ + __O uint32_t TASKS_START; /*!< Task starting the random number generator */ + __O uint32_t TASKS_STOP; /*!< Task stopping the random number generator */ + __I uint32_t RESERVED0[62]; + __IO uint32_t EVENTS_VALRDY; /*!< Event being generated for every new random number written to + the VALUE register */ + __I uint32_t RESERVED1[63]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED2[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[126]; + __IO uint32_t CONFIG; /*!< Configuration register */ + __I uint32_t VALUE; /*!< Output random number */ +} NRF_RNG_Type; + + +/* ================================================================================ */ +/* ================ ECB ================ */ +/* ================================================================================ */ + + +/** + * @brief AES ECB Mode Encryption (ECB) + */ + +typedef struct { /*!< ECB Structure */ + __O uint32_t TASKS_STARTECB; /*!< Start ECB block encrypt */ + __O uint32_t TASKS_STOPECB; /*!< Abort a possible executing ECB operation */ + __I uint32_t RESERVED0[62]; + __IO uint32_t EVENTS_ENDECB; /*!< ECB block encrypt complete */ + __IO uint32_t EVENTS_ERRORECB; /*!< ECB block encrypt aborted because of a STOPECB task or due to + an error */ + __I uint32_t RESERVED1[127]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED2[126]; + __IO uint32_t ECBDATAPTR; /*!< ECB block encrypt memory pointers */ +} NRF_ECB_Type; + + +/* ================================================================================ */ +/* ================ AAR ================ */ +/* ================================================================================ */ + + +/** + * @brief Accelerated Address Resolver (AAR) + */ + +typedef struct { /*!< AAR Structure */ + __O uint32_t TASKS_START; /*!< Start resolving addresses based on IRKs specified in the IRK + data structure */ + __I uint32_t RESERVED0; + __O uint32_t TASKS_STOP; /*!< Stop resolving addresses */ + __I uint32_t RESERVED1[61]; + __IO uint32_t EVENTS_END; /*!< Address resolution procedure complete */ + __IO uint32_t EVENTS_RESOLVED; /*!< Address resolved */ + __IO uint32_t EVENTS_NOTRESOLVED; /*!< Address not resolved */ + __I uint32_t RESERVED2[126]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[61]; + __I uint32_t STATUS; /*!< Resolution status */ + __I uint32_t RESERVED4[63]; + __IO uint32_t ENABLE; /*!< Enable AAR */ + __IO uint32_t NIRK; /*!< Number of IRKs */ + __IO uint32_t IRKPTR; /*!< Pointer to IRK data structure */ + __I uint32_t RESERVED5; + __IO uint32_t ADDRPTR; /*!< Pointer to the resolvable address */ + __IO uint32_t SCRATCHPTR; /*!< Pointer to data area used for temporary storage */ +} NRF_AAR_Type; + + +/* ================================================================================ */ +/* ================ CCM ================ */ +/* ================================================================================ */ + + +/** + * @brief AES CCM Mode Encryption (CCM) + */ + +typedef struct { /*!< CCM Structure */ + __O uint32_t TASKS_KSGEN; /*!< Start generation of key-stream. This operation will stop by + itself when completed. */ + __O uint32_t TASKS_CRYPT; /*!< Start encryption/decryption. This operation will stop by itself + when completed. */ + __O uint32_t TASKS_STOP; /*!< Stop encryption/decryption */ + __O uint32_t TASKS_RATEOVERRIDE; /*!< Override DATARATE setting in MODE register with the contents + of the RATEOVERRIDE register for any ongoing encryption/decryption */ + __I uint32_t RESERVED0[60]; + __IO uint32_t EVENTS_ENDKSGEN; /*!< Key-stream generation complete */ + __IO uint32_t EVENTS_ENDCRYPT; /*!< Encrypt/decrypt complete */ + __IO uint32_t EVENTS_ERROR; /*!< Deprecated register - CCM error event */ + __I uint32_t RESERVED1[61]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED2[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[61]; + __I uint32_t MICSTATUS; /*!< MIC check result */ + __I uint32_t RESERVED4[63]; + __IO uint32_t ENABLE; /*!< Enable */ + __IO uint32_t MODE; /*!< Operation mode */ + __IO uint32_t CNFPTR; /*!< Pointer to data structure holding AES key and NONCE vector */ + __IO uint32_t INPTR; /*!< Input pointer */ + __IO uint32_t OUTPTR; /*!< Output pointer */ + __IO uint32_t SCRATCHPTR; /*!< Pointer to data area used for temporary storage */ + __IO uint32_t MAXPACKETSIZE; /*!< Length of key-stream generated when MODE.LENGTH = Extended. */ + __IO uint32_t RATEOVERRIDE; /*!< Data rate override setting. */ +} NRF_CCM_Type; + + +/* ================================================================================ */ +/* ================ WDT ================ */ +/* ================================================================================ */ + + +/** + * @brief Watchdog Timer (WDT) + */ + +typedef struct { /*!< WDT Structure */ + __O uint32_t TASKS_START; /*!< Start the watchdog */ + __I uint32_t RESERVED0[63]; + __IO uint32_t EVENTS_TIMEOUT; /*!< Watchdog timeout */ + __I uint32_t RESERVED1[128]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED2[61]; + __I uint32_t RUNSTATUS; /*!< Run status */ + __I uint32_t REQSTATUS; /*!< Request status */ + __I uint32_t RESERVED3[63]; + __IO uint32_t CRV; /*!< Counter reload value */ + __IO uint32_t RREN; /*!< Enable register for reload request registers */ + __IO uint32_t CONFIG; /*!< Configuration register */ + __I uint32_t RESERVED4[60]; + __O uint32_t RR[8]; /*!< Description collection[n]: Reload request n */ +} NRF_WDT_Type; + + +/* ================================================================================ */ +/* ================ QDEC ================ */ +/* ================================================================================ */ + + +/** + * @brief Quadrature Decoder (QDEC) + */ + +typedef struct { /*!< QDEC Structure */ + __O uint32_t TASKS_START; /*!< Task starting the quadrature decoder */ + __O uint32_t TASKS_STOP; /*!< Task stopping the quadrature decoder */ + __O uint32_t TASKS_READCLRACC; /*!< Read and clear ACC and ACCDBL */ + __O uint32_t TASKS_RDCLRACC; /*!< Read and clear ACC */ + __O uint32_t TASKS_RDCLRDBL; /*!< Read and clear ACCDBL */ + __I uint32_t RESERVED0[59]; + __IO uint32_t EVENTS_SAMPLERDY; /*!< Event being generated for every new sample value written to + the SAMPLE register */ + __IO uint32_t EVENTS_REPORTRDY; /*!< Non-null report ready */ + __IO uint32_t EVENTS_ACCOF; /*!< ACC or ACCDBL register overflow */ + __IO uint32_t EVENTS_DBLRDY; /*!< Double displacement(s) detected */ + __IO uint32_t EVENTS_STOPPED; /*!< QDEC has been stopped */ + __I uint32_t RESERVED1[59]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED2[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[125]; + __IO uint32_t ENABLE; /*!< Enable the quadrature decoder */ + __IO uint32_t LEDPOL; /*!< LED output pin polarity */ + __IO uint32_t SAMPLEPER; /*!< Sample period */ + __I int32_t SAMPLE; /*!< Motion sample value */ + __IO uint32_t REPORTPER; /*!< Number of samples to be taken before REPORTRDY and DBLRDY events + can be generated */ + __I int32_t ACC; /*!< Register accumulating the valid transitions */ + __I int32_t ACCREAD; /*!< Snapshot of the ACC register, updated by the READCLRACC or RDCLRACC + task */ + QDEC_PSEL_Type PSEL; /*!< Unspecified */ + __IO uint32_t DBFEN; /*!< Enable input debounce filters */ + __I uint32_t RESERVED4[5]; + __IO uint32_t LEDPRE; /*!< Time period the LED is switched ON prior to sampling */ + __I uint32_t ACCDBL; /*!< Register accumulating the number of detected double transitions */ + __I uint32_t ACCDBLREAD; /*!< Snapshot of the ACCDBL, updated by the READCLRACC or RDCLRDBL + task */ +} NRF_QDEC_Type; + + +/* ================================================================================ */ +/* ================ COMP ================ */ +/* ================================================================================ */ + + +/** + * @brief Comparator (COMP) + */ + +typedef struct { /*!< COMP Structure */ + __O uint32_t TASKS_START; /*!< Start comparator */ + __O uint32_t TASKS_STOP; /*!< Stop comparator */ + __O uint32_t TASKS_SAMPLE; /*!< Sample comparator value */ + __I uint32_t RESERVED0[61]; + __IO uint32_t EVENTS_READY; /*!< COMP is ready and output is valid */ + __IO uint32_t EVENTS_DOWN; /*!< Downward crossing */ + __IO uint32_t EVENTS_UP; /*!< Upward crossing */ + __IO uint32_t EVENTS_CROSS; /*!< Downward or upward crossing */ + __I uint32_t RESERVED1[60]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED2[63]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[61]; + __I uint32_t RESULT; /*!< Compare result */ + __I uint32_t RESERVED4[63]; + __IO uint32_t ENABLE; /*!< COMP enable */ + __IO uint32_t PSEL; /*!< Pin select */ + __IO uint32_t REFSEL; /*!< Reference source select for single-ended mode */ + __IO uint32_t EXTREFSEL; /*!< External reference select */ + __I uint32_t RESERVED5[8]; + __IO uint32_t TH; /*!< Threshold configuration for hysteresis unit */ + __IO uint32_t MODE; /*!< Mode configuration */ + __IO uint32_t HYST; /*!< Comparator hysteresis enable */ +} NRF_COMP_Type; + + +/* ================================================================================ */ +/* ================ LPCOMP ================ */ +/* ================================================================================ */ + + +/** + * @brief Low Power Comparator (LPCOMP) + */ + +typedef struct { /*!< LPCOMP Structure */ + __O uint32_t TASKS_START; /*!< Start comparator */ + __O uint32_t TASKS_STOP; /*!< Stop comparator */ + __O uint32_t TASKS_SAMPLE; /*!< Sample comparator value */ + __I uint32_t RESERVED0[61]; + __IO uint32_t EVENTS_READY; /*!< LPCOMP is ready and output is valid */ + __IO uint32_t EVENTS_DOWN; /*!< Downward crossing */ + __IO uint32_t EVENTS_UP; /*!< Upward crossing */ + __IO uint32_t EVENTS_CROSS; /*!< Downward or upward crossing */ + __I uint32_t RESERVED1[60]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED2[64]; + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[61]; + __I uint32_t RESULT; /*!< Compare result */ + __I uint32_t RESERVED4[63]; + __IO uint32_t ENABLE; /*!< Enable LPCOMP */ + __IO uint32_t PSEL; /*!< Input pin select */ + __IO uint32_t REFSEL; /*!< Reference select */ + __IO uint32_t EXTREFSEL; /*!< External reference select */ + __I uint32_t RESERVED5[4]; + __IO uint32_t ANADETECT; /*!< Analog detect configuration */ + __I uint32_t RESERVED6[5]; + __IO uint32_t HYST; /*!< Comparator hysteresis enable */ +} NRF_LPCOMP_Type; + + +/* ================================================================================ */ +/* ================ EGU ================ */ +/* ================================================================================ */ + + +/** + * @brief Event Generator Unit 0 (EGU) + */ + +typedef struct { /*!< EGU Structure */ + __O uint32_t TASKS_TRIGGER[16]; /*!< Description collection[n]: Trigger n for triggering the corresponding + TRIGGERED[n] event */ + __I uint32_t RESERVED0[48]; + __IO uint32_t EVENTS_TRIGGERED[16]; /*!< Description collection[n]: Event number n generated by triggering + the corresponding TRIGGER[n] task */ + __I uint32_t RESERVED1[112]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ +} NRF_EGU_Type; + + +/* ================================================================================ */ +/* ================ SWI ================ */ +/* ================================================================================ */ + + +/** + * @brief Software interrupt 0 (SWI) + */ + +typedef struct { /*!< SWI Structure */ + __I uint32_t UNUSED; /*!< Unused. */ +} NRF_SWI_Type; + + +/* ================================================================================ */ +/* ================ PWM ================ */ +/* ================================================================================ */ + + +/** + * @brief Pulse width modulation unit 0 (PWM) + */ + +typedef struct { /*!< PWM Structure */ + __I uint32_t RESERVED0; + __O uint32_t TASKS_STOP; /*!< Stops PWM pulse generation on all channels at the end of current + PWM period, and stops sequence playback */ + __O uint32_t TASKS_SEQSTART[2]; /*!< Description collection[n]: Loads the first PWM value on all + enabled channels from sequence n, and starts playing that sequence + at the rate defined in SEQ[n]REFRESH and/or DECODER.MODE. Causes + PWM generation to start if not running. */ + __O uint32_t TASKS_NEXTSTEP; /*!< Steps by one value in the current sequence on all enabled channels + if DECODER.MODE=NextStep. Does not cause PWM generation to start + if not running. */ + __I uint32_t RESERVED1[60]; + __IO uint32_t EVENTS_STOPPED; /*!< Response to STOP task, emitted when PWM pulses are no longer + generated */ + __IO uint32_t EVENTS_SEQSTARTED[2]; /*!< Description collection[n]: First PWM period started on sequence + n */ + __IO uint32_t EVENTS_SEQEND[2]; /*!< Description collection[n]: Emitted at end of every sequence + n, when last value from RAM has been applied to wave counter */ + __IO uint32_t EVENTS_PWMPERIODEND; /*!< Emitted at the end of each PWM period */ + __IO uint32_t EVENTS_LOOPSDONE; /*!< Concatenated sequences have been played the amount of times + defined in LOOP.CNT */ + __I uint32_t RESERVED2[56]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED3[63]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED4[125]; + __IO uint32_t ENABLE; /*!< PWM module enable register */ + __IO uint32_t MODE; /*!< Selects operating mode of the wave counter */ + __IO uint32_t COUNTERTOP; /*!< Value up to which the pulse generator counter counts */ + __IO uint32_t PRESCALER; /*!< Configuration for PWM_CLK */ + __IO uint32_t DECODER; /*!< Configuration of the decoder */ + __IO uint32_t LOOP; /*!< Number of playbacks of a loop */ + __I uint32_t RESERVED5[2]; + PWM_SEQ_Type SEQ[2]; /*!< Unspecified */ + PWM_PSEL_Type PSEL; /*!< Unspecified */ +} NRF_PWM_Type; + + +/* ================================================================================ */ +/* ================ PDM ================ */ +/* ================================================================================ */ + + +/** + * @brief Pulse Density Modulation (Digital Microphone) Interface (PDM) + */ + +typedef struct { /*!< PDM Structure */ + __O uint32_t TASKS_START; /*!< Starts continuous PDM transfer */ + __O uint32_t TASKS_STOP; /*!< Stops PDM transfer */ + __I uint32_t RESERVED0[62]; + __IO uint32_t EVENTS_STARTED; /*!< PDM transfer has started */ + __IO uint32_t EVENTS_STOPPED; /*!< PDM transfer has finished */ + __IO uint32_t EVENTS_END; /*!< The PDM has written the last sample specified by SAMPLE.MAXCNT + (or the last sample after a STOP task has been received) to + Data RAM */ + __I uint32_t RESERVED1[125]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED2[125]; + __IO uint32_t ENABLE; /*!< PDM module enable register */ + __IO uint32_t PDMCLKCTRL; /*!< PDM clock generator control */ + __IO uint32_t MODE; /*!< Defines the routing of the connected PDM microphones' signals */ + __I uint32_t RESERVED3[3]; + __IO uint32_t GAINL; /*!< Left output gain adjustment */ + __IO uint32_t GAINR; /*!< Right output gain adjustment */ + __IO uint32_t RATIO; /*!< Selects the ratio between PDM_CLK and output sample rate. Change + PDMCLKCTRL accordingly. */ + __I uint32_t RESERVED4[7]; + PDM_PSEL_Type PSEL; /*!< Unspecified */ + __I uint32_t RESERVED5[6]; + PDM_SAMPLE_Type SAMPLE; /*!< Unspecified */ +} NRF_PDM_Type; + + +/* ================================================================================ */ +/* ================ ACL ================ */ +/* ================================================================================ */ + + +/** + * @brief Access control lists (ACL) + */ + +typedef struct { /*!< ACL Structure */ + __I uint32_t RESERVED0[512]; + ACL_ACL_Type ACL[8]; /*!< Unspecified */ +} NRF_ACL_Type; + + +/* ================================================================================ */ +/* ================ NVMC ================ */ +/* ================================================================================ */ + + +/** + * @brief Non Volatile Memory Controller (NVMC) + */ + +typedef struct { /*!< NVMC Structure */ + __I uint32_t RESERVED0[256]; + __I uint32_t READY; /*!< Ready flag */ + __I uint32_t RESERVED1; + __I uint32_t READYNEXT; /*!< Ready flag */ + __I uint32_t RESERVED2[62]; + __IO uint32_t CONFIG; /*!< Configuration register */ + + union { + __IO uint32_t ERASEPCR1; /*!< Deprecated register - Register for erasing a page in code area. + Equivalent to ERASEPAGE. */ + __IO uint32_t ERASEPAGE; /*!< Register for erasing a page in code area */ + }; + __IO uint32_t ERASEALL; /*!< Register for erasing all non-volatile user memory */ + __IO uint32_t ERASEPCR0; /*!< Deprecated register - Register for erasing a page in code area. + Equivalent to ERASEPAGE. */ + __IO uint32_t ERASEUICR; /*!< Register for erasing user information configuration registers */ + __IO uint32_t ERASEPAGEPARTIAL; /*!< Register for partial erase of a page in code area */ + __IO uint32_t ERASEPAGEPARTIALCFG; /*!< Register for partial erase configuration */ + __I uint32_t RESERVED3[8]; + __IO uint32_t ICACHECNF; /*!< I-code cache configuration register. */ + __I uint32_t RESERVED4; + __IO uint32_t IHIT; /*!< I-code cache hit counter. */ + __IO uint32_t IMISS; /*!< I-code cache miss counter. */ +} NRF_NVMC_Type; + + +/* ================================================================================ */ +/* ================ PPI ================ */ +/* ================================================================================ */ + + +/** + * @brief Programmable Peripheral Interconnect (PPI) + */ + +typedef struct { /*!< PPI Structure */ + PPI_TASKS_CHG_Type TASKS_CHG[6]; /*!< Channel group tasks */ + __I uint32_t RESERVED0[308]; + __IO uint32_t CHEN; /*!< Channel enable register */ + __IO uint32_t CHENSET; /*!< Channel enable set register */ + __IO uint32_t CHENCLR; /*!< Channel enable clear register */ + __I uint32_t RESERVED1; + PPI_CH_Type CH[20]; /*!< PPI Channel */ + __I uint32_t RESERVED2[148]; + __IO uint32_t CHG[6]; /*!< Description collection[n]: Channel group n */ + __I uint32_t RESERVED3[62]; + PPI_FORK_Type FORK[32]; /*!< Fork */ +} NRF_PPI_Type; + + +/* ================================================================================ */ +/* ================ MWU ================ */ +/* ================================================================================ */ + + +/** + * @brief Memory Watch Unit (MWU) + */ + +typedef struct { /*!< MWU Structure */ + __I uint32_t RESERVED0[64]; + MWU_EVENTS_REGION_Type EVENTS_REGION[4]; /*!< Unspecified */ + __I uint32_t RESERVED1[16]; + MWU_EVENTS_PREGION_Type EVENTS_PREGION[2]; /*!< Unspecified */ + __I uint32_t RESERVED2[100]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[5]; + __IO uint32_t NMIEN; /*!< Enable or disable non-maskable interrupt */ + __IO uint32_t NMIENSET; /*!< Enable non-maskable interrupt */ + __IO uint32_t NMIENCLR; /*!< Disable non-maskable interrupt */ + __I uint32_t RESERVED4[53]; + MWU_PERREGION_Type PERREGION[2]; /*!< Unspecified */ + __I uint32_t RESERVED5[64]; + __IO uint32_t REGIONEN; /*!< Enable/disable regions watch */ + __IO uint32_t REGIONENSET; /*!< Enable regions watch */ + __IO uint32_t REGIONENCLR; /*!< Disable regions watch */ + __I uint32_t RESERVED6[57]; + MWU_REGION_Type REGION[4]; /*!< Unspecified */ + __I uint32_t RESERVED7[32]; + MWU_PREGION_Type PREGION[2]; /*!< Unspecified */ +} NRF_MWU_Type; + + +/* ================================================================================ */ +/* ================ I2S ================ */ +/* ================================================================================ */ + + +/** + * @brief Inter-IC Sound (I2S) + */ + +typedef struct { /*!< I2S Structure */ + __O uint32_t TASKS_START; /*!< Starts continuous I2S transfer. Also starts MCK generator when + this is enabled. */ + __O uint32_t TASKS_STOP; /*!< Stops I2S transfer. Also stops MCK generator. Triggering this + task will cause the {event:STOPPED} event to be generated. */ + __I uint32_t RESERVED0[63]; + __IO uint32_t EVENTS_RXPTRUPD; /*!< The RXD.PTR register has been copied to internal double-buffers. + When the I2S module is started and RX is enabled, this event + will be generated for every RXTXD.MAXCNT words that are received + on the SDIN pin. */ + __IO uint32_t EVENTS_STOPPED; /*!< I2S transfer stopped. */ + __I uint32_t RESERVED1[2]; + __IO uint32_t EVENTS_TXPTRUPD; /*!< The TDX.PTR register has been copied to internal double-buffers. + When the I2S module is started and TX is enabled, this event + will be generated for every RXTXD.MAXCNT words that are sent + on the SDOUT pin. */ + __I uint32_t RESERVED2[122]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED3[125]; + __IO uint32_t ENABLE; /*!< Enable I2S module. */ + I2S_CONFIG_Type CONFIG; /*!< Unspecified */ + __I uint32_t RESERVED4[3]; + I2S_RXD_Type RXD; /*!< Unspecified */ + __I uint32_t RESERVED5; + I2S_TXD_Type TXD; /*!< Unspecified */ + __I uint32_t RESERVED6[3]; + I2S_RXTXD_Type RXTXD; /*!< Unspecified */ + __I uint32_t RESERVED7[3]; + I2S_PSEL_Type PSEL; /*!< Unspecified */ +} NRF_I2S_Type; + + +/* ================================================================================ */ +/* ================ FPU ================ */ +/* ================================================================================ */ + + +/** + * @brief FPU (FPU) + */ + +typedef struct { /*!< FPU Structure */ + __I uint32_t UNUSED; /*!< Unused. */ +} NRF_FPU_Type; + + +/* ================================================================================ */ +/* ================ USBD ================ */ +/* ================================================================================ */ + + +/** + * @brief Universal serial bus device (USBD) + */ + +typedef struct { /*!< USBD Structure */ + __I uint32_t RESERVED0; + __O uint32_t TASKS_STARTEPIN[8]; /*!< Description collection[n]: Captures the EPIN[n].PTR and EPIN[n].MAXCNT + registers values, and enables endpoint IN n to respond to traffic + from host */ + __O uint32_t TASKS_STARTISOIN; /*!< Captures the ISOIN.PTR and ISOIN.MAXCNT registers values, and + enables sending data on ISO endpoint */ + __O uint32_t TASKS_STARTEPOUT[8]; /*!< Description collection[n]: Captures the EPOUT[n].PTR and EPOUT[n].MAXCNT + registers values, and enables endpoint n to respond to traffic + from host */ + __O uint32_t TASKS_STARTISOOUT; /*!< Captures the ISOOUT.PTR and ISOOUT.MAXCNT registers values, + and enables receiving of data on ISO endpoint */ + __O uint32_t TASKS_EP0RCVOUT; /*!< Allows OUT data stage on control endpoint 0 */ + __O uint32_t TASKS_EP0STATUS; /*!< Allows status stage on control endpoint 0 */ + __O uint32_t TASKS_EP0STALL; /*!< Stalls data and status stage on control endpoint 0 */ + __O uint32_t TASKS_DPDMDRIVE; /*!< Forces D+ and D- lines into the state defined in the DPDMVALUE + register */ + __O uint32_t TASKS_DPDMNODRIVE; /*!< Stops forcing D+ and D- lines into any state (USB engine takes + control) */ + __I uint32_t RESERVED1[40]; + __IO uint32_t EVENTS_USBRESET; /*!< Signals that a USB reset condition has been detected on USB + lines */ + __IO uint32_t EVENTS_STARTED; /*!< Confirms that the EPIN[n].PTR and EPIN[n].MAXCNT, or EPOUT[n].PTR + and EPOUT[n].MAXCNT registers have been captured on all endpoints + reported in the EPSTATUS register */ + __IO uint32_t EVENTS_ENDEPIN[8]; /*!< Description collection[n]: The whole EPIN[n] buffer has been + consumed. The RAM buffer can be accessed safely by software. */ + __IO uint32_t EVENTS_EP0DATADONE; /*!< An acknowledged data transfer has taken place on the control + endpoint */ + __IO uint32_t EVENTS_ENDISOIN; /*!< The whole ISOIN buffer has been consumed. The RAM buffer can + be accessed safely by software. */ + __IO uint32_t EVENTS_ENDEPOUT[8]; /*!< Description collection[n]: The whole EPOUT[n] buffer has been + consumed. The RAM buffer can be accessed safely by software. */ + __IO uint32_t EVENTS_ENDISOOUT; /*!< The whole ISOOUT buffer has been consumed. The RAM buffer can + be accessed safely by software. */ + __IO uint32_t EVENTS_SOF; /*!< Signals that a SOF (start of frame) condition has been detected + on USB lines */ + __IO uint32_t EVENTS_USBEVENT; /*!< An event or an error not covered by specific events has occurred. + Check EVENTCAUSE register to find the cause. */ + __IO uint32_t EVENTS_EP0SETUP; /*!< A valid SETUP token has been received (and acknowledged) on + the control endpoint */ + __IO uint32_t EVENTS_EPDATA; /*!< A data transfer has occurred on a data endpoint, indicated by + the EPDATASTATUS register */ + __I uint32_t RESERVED2[39]; + __IO uint32_t SHORTS; /*!< Shortcut register */ + __I uint32_t RESERVED3[63]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED4[61]; + __IO uint32_t EVENTCAUSE; /*!< Details on what caused the USBEVENT event */ + __I uint32_t RESERVED5[7]; + USBD_HALTED_Type HALTED; /*!< Unspecified */ + __I uint32_t RESERVED6; + __IO uint32_t EPSTATUS; /*!< Provides information on which endpoint's EasyDMA registers have + been captured */ + __IO uint32_t EPDATASTATUS; /*!< Provides information on which endpoint(s) an acknowledged data + transfer has occurred (EPDATA event) */ + __I uint32_t USBADDR; /*!< Device USB address */ + __I uint32_t RESERVED7[3]; + __I uint32_t BMREQUESTTYPE; /*!< SETUP data, byte 0, bmRequestType */ + __I uint32_t BREQUEST; /*!< SETUP data, byte 1, bRequest */ + __I uint32_t WVALUEL; /*!< SETUP data, byte 2, LSB of wValue */ + __I uint32_t WVALUEH; /*!< SETUP data, byte 3, MSB of wValue */ + __I uint32_t WINDEXL; /*!< SETUP data, byte 4, LSB of wIndex */ + __I uint32_t WINDEXH; /*!< SETUP data, byte 5, MSB of wIndex */ + __I uint32_t WLENGTHL; /*!< SETUP data, byte 6, LSB of wLength */ + __I uint32_t WLENGTHH; /*!< SETUP data, byte 7, MSB of wLength */ + USBD_SIZE_Type SIZE; /*!< Unspecified */ + __I uint32_t RESERVED8[15]; + __IO uint32_t ENABLE; /*!< Enable USB */ + __IO uint32_t USBPULLUP; /*!< Control of the USB pull-up */ + __IO uint32_t DPDMVALUE; /*!< State D+ and D- lines will be forced into by the DPDMDRIVE task. + The DPDMNODRIVE task reverts the control of the lines to MAC + IP (no forcing). */ + __IO uint32_t DTOGGLE; /*!< Data toggle control and status */ + __IO uint32_t EPINEN; /*!< Endpoint IN enable */ + __IO uint32_t EPOUTEN; /*!< Endpoint OUT enable */ + __O uint32_t EPSTALL; /*!< STALL endpoints */ + __IO uint32_t ISOSPLIT; /*!< Controls the split of ISO buffers */ + __I uint32_t FRAMECNTR; /*!< Returns the current value of the start of frame counter */ + __I uint32_t RESERVED9[2]; + __IO uint32_t LOWPOWER; /*!< Controls USBD peripheral low power mode during USB suspend */ + __IO uint32_t ISOINCONFIG; /*!< Controls the response of the ISO IN endpoint to an IN token + when no data is ready to be sent */ + __I uint32_t RESERVED10[51]; + USBD_EPIN_Type EPIN[8]; /*!< Unspecified */ + USBD_ISOIN_Type ISOIN; /*!< Unspecified */ + __I uint32_t RESERVED11[21]; + USBD_EPOUT_Type EPOUT[8]; /*!< Unspecified */ + USBD_ISOOUT_Type ISOOUT; /*!< Unspecified */ +} NRF_USBD_Type; + + +/* ================================================================================ */ +/* ================ QSPI ================ */ +/* ================================================================================ */ + + +/** + * @brief External flash interface (QSPI) + */ + +typedef struct { /*!< QSPI Structure */ + __O uint32_t TASKS_ACTIVATE; /*!< Activate QSPI interface */ + __O uint32_t TASKS_READSTART; /*!< Start transfer from external flash memory to internal RAM */ + __O uint32_t TASKS_WRITESTART; /*!< Start transfer from internal RAM to external flash memory */ + __O uint32_t TASKS_ERASESTART; /*!< Start external flash memory erase operation */ + __O uint32_t TASKS_DEACTIVATE; /*!< Deactivate QSPI interface */ + __I uint32_t RESERVED0[59]; + __IO uint32_t EVENTS_READY; /*!< QSPI peripheral is ready. This event will be generated as a + response to any QSPI task. */ + __I uint32_t RESERVED1[127]; + __IO uint32_t INTEN; /*!< Enable or disable interrupt */ + __IO uint32_t INTENSET; /*!< Enable interrupt */ + __IO uint32_t INTENCLR; /*!< Disable interrupt */ + __I uint32_t RESERVED2[125]; + __IO uint32_t ENABLE; /*!< Enable QSPI peripheral and acquire the pins selected in PSELn + registers */ + QSPI_READ_Type READ; /*!< Unspecified */ + QSPI_WRITE_Type WRITE; /*!< Unspecified */ + QSPI_ERASE_Type ERASE; /*!< Unspecified */ + QSPI_PSEL_Type PSEL; /*!< Unspecified */ + __IO uint32_t XIPOFFSET; /*!< Address offset into the external memory for Execute in Place + operation. */ + __IO uint32_t IFCONFIG0; /*!< Interface configuration. */ + __I uint32_t RESERVED3[46]; + __IO uint32_t IFCONFIG1; /*!< Interface configuration. */ + __I uint32_t STATUS; /*!< Status register. */ + __I uint32_t RESERVED4[3]; + __IO uint32_t DPMDUR; /*!< Set the duration required to enter/exit deep power-down mode + (DPM). */ + __I uint32_t RESERVED5[3]; + __IO uint32_t ADDRCONF; /*!< Extended address configuration. */ + __I uint32_t RESERVED6[3]; + __IO uint32_t CINSTRCONF; /*!< Custom instruction configuration register. */ + __IO uint32_t CINSTRDAT0; /*!< Custom instruction data register 0. */ + __IO uint32_t CINSTRDAT1; /*!< Custom instruction data register 1. */ + __IO uint32_t IFTIMING; /*!< SPI interface timing. */ +} NRF_QSPI_Type; + + +/* ================================================================================ */ +/* ================ GPIO ================ */ +/* ================================================================================ */ + + +/** + * @brief GPIO Port 1 (GPIO) + */ + +typedef struct { /*!< GPIO Structure */ + __I uint32_t RESERVED0[321]; + __IO uint32_t OUT; /*!< Write GPIO port */ + __IO uint32_t OUTSET; /*!< Set individual bits in GPIO port */ + __IO uint32_t OUTCLR; /*!< Clear individual bits in GPIO port */ + __I uint32_t IN; /*!< Read GPIO port */ + __IO uint32_t DIR; /*!< Direction of GPIO pins */ + __IO uint32_t DIRSET; /*!< DIR set register */ + __IO uint32_t DIRCLR; /*!< DIR clear register */ + __IO uint32_t LATCH; /*!< Latch register indicating what GPIO pins that have met the criteria + set in the PIN_CNF[n].SENSE registers */ + __IO uint32_t DETECTMODE; /*!< Select between default DETECT signal behaviour and LDETECT mode */ + __I uint32_t RESERVED1[118]; + __IO uint32_t PIN_CNF[32]; /*!< Description collection[n]: Configuration of GPIO pins */ +} NRF_GPIO_Type; + + +/* ================================================================================ */ +/* ================ CC_HOST_RGF ================ */ +/* ================================================================================ */ + + +/** + * @brief CRYPTOCELL HOST_RGF interface (CC_HOST_RGF) + */ + +typedef struct { /*!< CC_HOST_RGF Structure */ + __I uint32_t RESERVED0[1678]; + __IO uint32_t HOST_CRYPTOKEY_SEL; /*!< AES hardware key select */ + __I uint32_t RESERVED1[4]; + __IO uint32_t HOST_IOT_KPRTL_LOCK; /*!< This write-once register is the K_PRTL lock register. When this + register is set, K_PRTL can not be used and a zeroed key will + be used instead. The value of this register is saved in the + CRYPTOCELL AO power domain. */ + __IO uint32_t HOST_IOT_KDR0; /*!< This register holds bits 31:0 of K_DR. The value of this register + is saved in the CRYPTOCELL AO power domain. Reading from this + address returns the K_DR valid status indicating if K_DR is + successfully retained. */ + __O uint32_t HOST_IOT_KDR1; /*!< This register holds bits 63:32 of K_DR. The value of this register + is saved in the CRYPTOCELL AO power domain. */ + __O uint32_t HOST_IOT_KDR2; /*!< This register holds bits 95:64 of K_DR. The value of this register + is saved in the CRYPTOCELL AO power domain. */ + __O uint32_t HOST_IOT_KDR3; /*!< This register holds bits 127:96 of K_DR. The value of this register + is saved in the CRYPTOCELL AO power domain. */ + __IO uint32_t HOST_IOT_LCS; /*!< Controls lifecycle state (LCS) for CRYPTOCELL subsystem */ +} NRF_CC_HOST_RGF_Type; + + +/* ================================================================================ */ +/* ================ CRYPTOCELL ================ */ +/* ================================================================================ */ + + +/** + * @brief ARM TrustZone CryptoCell register interface (CRYPTOCELL) + */ + +typedef struct { /*!< CRYPTOCELL Structure */ + __I uint32_t RESERVED0[320]; + __IO uint32_t ENABLE; /*!< Enable CRYPTOCELL subsystem */ +} NRF_CRYPTOCELL_Type; + + +/* -------------------- End of section using anonymous unions ------------------- */ +#if defined(__CC_ARM) + #pragma pop +#elif defined(__ICCARM__) + /* leave anonymous unions enabled */ +#elif defined(__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined(__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined(__TASKING__) + #pragma warning restore +#else + #warning Not supported compiler type +#endif + + + + +/* ================================================================================ */ +/* ================ Peripheral memory map ================ */ +/* ================================================================================ */ + +#define NRF_FICR_BASE 0x10000000UL +#define NRF_UICR_BASE 0x10001000UL +#define NRF_CLOCK_BASE 0x40000000UL +#define NRF_POWER_BASE 0x40000000UL +#define NRF_RADIO_BASE 0x40001000UL +#define NRF_UART0_BASE 0x40002000UL +#define NRF_UARTE0_BASE 0x40002000UL +#define NRF_SPI0_BASE 0x40003000UL +#define NRF_SPIM0_BASE 0x40003000UL +#define NRF_SPIS0_BASE 0x40003000UL +#define NRF_TWI0_BASE 0x40003000UL +#define NRF_TWIM0_BASE 0x40003000UL +#define NRF_TWIS0_BASE 0x40003000UL +#define NRF_SPI1_BASE 0x40004000UL +#define NRF_SPIM1_BASE 0x40004000UL +#define NRF_SPIS1_BASE 0x40004000UL +#define NRF_TWI1_BASE 0x40004000UL +#define NRF_TWIM1_BASE 0x40004000UL +#define NRF_TWIS1_BASE 0x40004000UL +#define NRF_NFCT_BASE 0x40005000UL +#define NRF_GPIOTE_BASE 0x40006000UL +#define NRF_SAADC_BASE 0x40007000UL +#define NRF_TIMER0_BASE 0x40008000UL +#define NRF_TIMER1_BASE 0x40009000UL +#define NRF_TIMER2_BASE 0x4000A000UL +#define NRF_RTC0_BASE 0x4000B000UL +#define NRF_TEMP_BASE 0x4000C000UL +#define NRF_RNG_BASE 0x4000D000UL +#define NRF_ECB_BASE 0x4000E000UL +#define NRF_AAR_BASE 0x4000F000UL +#define NRF_CCM_BASE 0x4000F000UL +#define NRF_WDT_BASE 0x40010000UL +#define NRF_RTC1_BASE 0x40011000UL +#define NRF_QDEC_BASE 0x40012000UL +#define NRF_COMP_BASE 0x40013000UL +#define NRF_LPCOMP_BASE 0x40013000UL +#define NRF_EGU0_BASE 0x40014000UL +#define NRF_SWI0_BASE 0x40014000UL +#define NRF_EGU1_BASE 0x40015000UL +#define NRF_SWI1_BASE 0x40015000UL +#define NRF_EGU2_BASE 0x40016000UL +#define NRF_SWI2_BASE 0x40016000UL +#define NRF_EGU3_BASE 0x40017000UL +#define NRF_SWI3_BASE 0x40017000UL +#define NRF_EGU4_BASE 0x40018000UL +#define NRF_SWI4_BASE 0x40018000UL +#define NRF_EGU5_BASE 0x40019000UL +#define NRF_SWI5_BASE 0x40019000UL +#define NRF_TIMER3_BASE 0x4001A000UL +#define NRF_TIMER4_BASE 0x4001B000UL +#define NRF_PWM0_BASE 0x4001C000UL +#define NRF_PDM_BASE 0x4001D000UL +#define NRF_ACL_BASE 0x4001E000UL +#define NRF_NVMC_BASE 0x4001E000UL +#define NRF_PPI_BASE 0x4001F000UL +#define NRF_MWU_BASE 0x40020000UL +#define NRF_PWM1_BASE 0x40021000UL +#define NRF_PWM2_BASE 0x40022000UL +#define NRF_SPI2_BASE 0x40023000UL +#define NRF_SPIM2_BASE 0x40023000UL +#define NRF_SPIS2_BASE 0x40023000UL +#define NRF_RTC2_BASE 0x40024000UL +#define NRF_I2S_BASE 0x40025000UL +#define NRF_FPU_BASE 0x40026000UL +#define NRF_USBD_BASE 0x40027000UL +#define NRF_UARTE1_BASE 0x40028000UL +#define NRF_QSPI_BASE 0x40029000UL +#define NRF_PWM3_BASE 0x4002D000UL +#define NRF_SPIM3_BASE 0x4002F000UL +#define NRF_P0_BASE 0x50000000UL +#define NRF_P1_BASE 0x50000300UL +#define NRF_CC_HOST_RGF_BASE 0x5002A000UL +#define NRF_CRYPTOCELL_BASE 0x5002A000UL + + +/* ================================================================================ */ +/* ================ Peripheral declaration ================ */ +/* ================================================================================ */ + +#define NRF_FICR ((NRF_FICR_Type *) NRF_FICR_BASE) +#define NRF_UICR ((NRF_UICR_Type *) NRF_UICR_BASE) +#define NRF_CLOCK ((NRF_CLOCK_Type *) NRF_CLOCK_BASE) +#define NRF_POWER ((NRF_POWER_Type *) NRF_POWER_BASE) +#define NRF_RADIO ((NRF_RADIO_Type *) NRF_RADIO_BASE) +#define NRF_UART0 ((NRF_UART_Type *) NRF_UART0_BASE) +#define NRF_UARTE0 ((NRF_UARTE_Type *) NRF_UARTE0_BASE) +#define NRF_SPI0 ((NRF_SPI_Type *) NRF_SPI0_BASE) +#define NRF_SPIM0 ((NRF_SPIM_Type *) NRF_SPIM0_BASE) +#define NRF_SPIS0 ((NRF_SPIS_Type *) NRF_SPIS0_BASE) +#define NRF_TWI0 ((NRF_TWI_Type *) NRF_TWI0_BASE) +#define NRF_TWIM0 ((NRF_TWIM_Type *) NRF_TWIM0_BASE) +#define NRF_TWIS0 ((NRF_TWIS_Type *) NRF_TWIS0_BASE) +#define NRF_SPI1 ((NRF_SPI_Type *) NRF_SPI1_BASE) +#define NRF_SPIM1 ((NRF_SPIM_Type *) NRF_SPIM1_BASE) +#define NRF_SPIS1 ((NRF_SPIS_Type *) NRF_SPIS1_BASE) +#define NRF_TWI1 ((NRF_TWI_Type *) NRF_TWI1_BASE) +#define NRF_TWIM1 ((NRF_TWIM_Type *) NRF_TWIM1_BASE) +#define NRF_TWIS1 ((NRF_TWIS_Type *) NRF_TWIS1_BASE) +#define NRF_NFCT ((NRF_NFCT_Type *) NRF_NFCT_BASE) +#define NRF_GPIOTE ((NRF_GPIOTE_Type *) NRF_GPIOTE_BASE) +#define NRF_SAADC ((NRF_SAADC_Type *) NRF_SAADC_BASE) +#define NRF_TIMER0 ((NRF_TIMER_Type *) NRF_TIMER0_BASE) +#define NRF_TIMER1 ((NRF_TIMER_Type *) NRF_TIMER1_BASE) +#define NRF_TIMER2 ((NRF_TIMER_Type *) NRF_TIMER2_BASE) +#define NRF_RTC0 ((NRF_RTC_Type *) NRF_RTC0_BASE) +#define NRF_TEMP ((NRF_TEMP_Type *) NRF_TEMP_BASE) +#define NRF_RNG ((NRF_RNG_Type *) NRF_RNG_BASE) +#define NRF_ECB ((NRF_ECB_Type *) NRF_ECB_BASE) +#define NRF_AAR ((NRF_AAR_Type *) NRF_AAR_BASE) +#define NRF_CCM ((NRF_CCM_Type *) NRF_CCM_BASE) +#define NRF_WDT ((NRF_WDT_Type *) NRF_WDT_BASE) +#define NRF_RTC1 ((NRF_RTC_Type *) NRF_RTC1_BASE) +#define NRF_QDEC ((NRF_QDEC_Type *) NRF_QDEC_BASE) +#define NRF_COMP ((NRF_COMP_Type *) NRF_COMP_BASE) +#define NRF_LPCOMP ((NRF_LPCOMP_Type *) NRF_LPCOMP_BASE) +#define NRF_EGU0 ((NRF_EGU_Type *) NRF_EGU0_BASE) +#define NRF_SWI0 ((NRF_SWI_Type *) NRF_SWI0_BASE) +#define NRF_EGU1 ((NRF_EGU_Type *) NRF_EGU1_BASE) +#define NRF_SWI1 ((NRF_SWI_Type *) NRF_SWI1_BASE) +#define NRF_EGU2 ((NRF_EGU_Type *) NRF_EGU2_BASE) +#define NRF_SWI2 ((NRF_SWI_Type *) NRF_SWI2_BASE) +#define NRF_EGU3 ((NRF_EGU_Type *) NRF_EGU3_BASE) +#define NRF_SWI3 ((NRF_SWI_Type *) NRF_SWI3_BASE) +#define NRF_EGU4 ((NRF_EGU_Type *) NRF_EGU4_BASE) +#define NRF_SWI4 ((NRF_SWI_Type *) NRF_SWI4_BASE) +#define NRF_EGU5 ((NRF_EGU_Type *) NRF_EGU5_BASE) +#define NRF_SWI5 ((NRF_SWI_Type *) NRF_SWI5_BASE) +#define NRF_TIMER3 ((NRF_TIMER_Type *) NRF_TIMER3_BASE) +#define NRF_TIMER4 ((NRF_TIMER_Type *) NRF_TIMER4_BASE) +#define NRF_PWM0 ((NRF_PWM_Type *) NRF_PWM0_BASE) +#define NRF_PDM ((NRF_PDM_Type *) NRF_PDM_BASE) +#define NRF_ACL ((NRF_ACL_Type *) NRF_ACL_BASE) +#define NRF_NVMC ((NRF_NVMC_Type *) NRF_NVMC_BASE) +#define NRF_PPI ((NRF_PPI_Type *) NRF_PPI_BASE) +#define NRF_MWU ((NRF_MWU_Type *) NRF_MWU_BASE) +#define NRF_PWM1 ((NRF_PWM_Type *) NRF_PWM1_BASE) +#define NRF_PWM2 ((NRF_PWM_Type *) NRF_PWM2_BASE) +#define NRF_SPI2 ((NRF_SPI_Type *) NRF_SPI2_BASE) +#define NRF_SPIM2 ((NRF_SPIM_Type *) NRF_SPIM2_BASE) +#define NRF_SPIS2 ((NRF_SPIS_Type *) NRF_SPIS2_BASE) +#define NRF_RTC2 ((NRF_RTC_Type *) NRF_RTC2_BASE) +#define NRF_I2S ((NRF_I2S_Type *) NRF_I2S_BASE) +#define NRF_FPU ((NRF_FPU_Type *) NRF_FPU_BASE) +#define NRF_USBD ((NRF_USBD_Type *) NRF_USBD_BASE) +#define NRF_UARTE1 ((NRF_UARTE_Type *) NRF_UARTE1_BASE) +#define NRF_QSPI ((NRF_QSPI_Type *) NRF_QSPI_BASE) +#define NRF_PWM3 ((NRF_PWM_Type *) NRF_PWM3_BASE) +#define NRF_SPIM3 ((NRF_SPIM_Type *) NRF_SPIM3_BASE) +#define NRF_P0 ((NRF_GPIO_Type *) NRF_P0_BASE) +#define NRF_P1 ((NRF_GPIO_Type *) NRF_P1_BASE) +#define NRF_CC_HOST_RGF ((NRF_CC_HOST_RGF_Type *) NRF_CC_HOST_RGF_BASE) +#define NRF_CRYPTOCELL ((NRF_CRYPTOCELL_Type *) NRF_CRYPTOCELL_BASE) + + +/** @} */ /* End of group Device_Peripheral_Registers */ +/** @} */ /* End of group nrf52840 */ +/** @} */ /* End of group Nordic Semiconductor */ + +#ifdef __cplusplus +} +#endif + + +#endif /* nrf52840_H */ + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52840_bitfields.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52840_bitfields.h new file mode 100644 index 00000000000..64cd8b96c1c --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52840_bitfields.h @@ -0,0 +1,16915 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +#ifndef __NRF52840_BITS_H +#define __NRF52840_BITS_H + +/*lint ++flb "Enter library region" */ + +/* Peripheral: AAR */ +/* Description: Accelerated Address Resolver */ + +/* Register: AAR_TASKS_START */ +/* Description: Start resolving addresses based on IRKs specified in the IRK data structure */ + +/* Bit 0 : */ +#define AAR_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define AAR_TASKS_START_TASKS_START_Msk (0x1UL << AAR_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: AAR_TASKS_STOP */ +/* Description: Stop resolving addresses */ + +/* Bit 0 : */ +#define AAR_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define AAR_TASKS_STOP_TASKS_STOP_Msk (0x1UL << AAR_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: AAR_EVENTS_END */ +/* Description: Address resolution procedure complete */ + +/* Bit 0 : */ +#define AAR_EVENTS_END_EVENTS_END_Pos (0UL) /*!< Position of EVENTS_END field. */ +#define AAR_EVENTS_END_EVENTS_END_Msk (0x1UL << AAR_EVENTS_END_EVENTS_END_Pos) /*!< Bit mask of EVENTS_END field. */ + +/* Register: AAR_EVENTS_RESOLVED */ +/* Description: Address resolved */ + +/* Bit 0 : */ +#define AAR_EVENTS_RESOLVED_EVENTS_RESOLVED_Pos (0UL) /*!< Position of EVENTS_RESOLVED field. */ +#define AAR_EVENTS_RESOLVED_EVENTS_RESOLVED_Msk (0x1UL << AAR_EVENTS_RESOLVED_EVENTS_RESOLVED_Pos) /*!< Bit mask of EVENTS_RESOLVED field. */ + +/* Register: AAR_EVENTS_NOTRESOLVED */ +/* Description: Address not resolved */ + +/* Bit 0 : */ +#define AAR_EVENTS_NOTRESOLVED_EVENTS_NOTRESOLVED_Pos (0UL) /*!< Position of EVENTS_NOTRESOLVED field. */ +#define AAR_EVENTS_NOTRESOLVED_EVENTS_NOTRESOLVED_Msk (0x1UL << AAR_EVENTS_NOTRESOLVED_EVENTS_NOTRESOLVED_Pos) /*!< Bit mask of EVENTS_NOTRESOLVED field. */ + +/* Register: AAR_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 2 : Write '1' to enable interrupt for NOTRESOLVED event */ +#define AAR_INTENSET_NOTRESOLVED_Pos (2UL) /*!< Position of NOTRESOLVED field. */ +#define AAR_INTENSET_NOTRESOLVED_Msk (0x1UL << AAR_INTENSET_NOTRESOLVED_Pos) /*!< Bit mask of NOTRESOLVED field. */ +#define AAR_INTENSET_NOTRESOLVED_Disabled (0UL) /*!< Read: Disabled */ +#define AAR_INTENSET_NOTRESOLVED_Enabled (1UL) /*!< Read: Enabled */ +#define AAR_INTENSET_NOTRESOLVED_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable interrupt for RESOLVED event */ +#define AAR_INTENSET_RESOLVED_Pos (1UL) /*!< Position of RESOLVED field. */ +#define AAR_INTENSET_RESOLVED_Msk (0x1UL << AAR_INTENSET_RESOLVED_Pos) /*!< Bit mask of RESOLVED field. */ +#define AAR_INTENSET_RESOLVED_Disabled (0UL) /*!< Read: Disabled */ +#define AAR_INTENSET_RESOLVED_Enabled (1UL) /*!< Read: Enabled */ +#define AAR_INTENSET_RESOLVED_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to enable interrupt for END event */ +#define AAR_INTENSET_END_Pos (0UL) /*!< Position of END field. */ +#define AAR_INTENSET_END_Msk (0x1UL << AAR_INTENSET_END_Pos) /*!< Bit mask of END field. */ +#define AAR_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ +#define AAR_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ +#define AAR_INTENSET_END_Set (1UL) /*!< Enable */ + +/* Register: AAR_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 2 : Write '1' to disable interrupt for NOTRESOLVED event */ +#define AAR_INTENCLR_NOTRESOLVED_Pos (2UL) /*!< Position of NOTRESOLVED field. */ +#define AAR_INTENCLR_NOTRESOLVED_Msk (0x1UL << AAR_INTENCLR_NOTRESOLVED_Pos) /*!< Bit mask of NOTRESOLVED field. */ +#define AAR_INTENCLR_NOTRESOLVED_Disabled (0UL) /*!< Read: Disabled */ +#define AAR_INTENCLR_NOTRESOLVED_Enabled (1UL) /*!< Read: Enabled */ +#define AAR_INTENCLR_NOTRESOLVED_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable interrupt for RESOLVED event */ +#define AAR_INTENCLR_RESOLVED_Pos (1UL) /*!< Position of RESOLVED field. */ +#define AAR_INTENCLR_RESOLVED_Msk (0x1UL << AAR_INTENCLR_RESOLVED_Pos) /*!< Bit mask of RESOLVED field. */ +#define AAR_INTENCLR_RESOLVED_Disabled (0UL) /*!< Read: Disabled */ +#define AAR_INTENCLR_RESOLVED_Enabled (1UL) /*!< Read: Enabled */ +#define AAR_INTENCLR_RESOLVED_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to disable interrupt for END event */ +#define AAR_INTENCLR_END_Pos (0UL) /*!< Position of END field. */ +#define AAR_INTENCLR_END_Msk (0x1UL << AAR_INTENCLR_END_Pos) /*!< Bit mask of END field. */ +#define AAR_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ +#define AAR_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ +#define AAR_INTENCLR_END_Clear (1UL) /*!< Disable */ + +/* Register: AAR_STATUS */ +/* Description: Resolution status */ + +/* Bits 3..0 : The IRK that was used last time an address was resolved */ +#define AAR_STATUS_STATUS_Pos (0UL) /*!< Position of STATUS field. */ +#define AAR_STATUS_STATUS_Msk (0xFUL << AAR_STATUS_STATUS_Pos) /*!< Bit mask of STATUS field. */ + +/* Register: AAR_ENABLE */ +/* Description: Enable AAR */ + +/* Bits 1..0 : Enable or disable AAR */ +#define AAR_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define AAR_ENABLE_ENABLE_Msk (0x3UL << AAR_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define AAR_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ +#define AAR_ENABLE_ENABLE_Enabled (3UL) /*!< Enable */ + +/* Register: AAR_NIRK */ +/* Description: Number of IRKs */ + +/* Bits 4..0 : Number of Identity root keys available in the IRK data structure */ +#define AAR_NIRK_NIRK_Pos (0UL) /*!< Position of NIRK field. */ +#define AAR_NIRK_NIRK_Msk (0x1FUL << AAR_NIRK_NIRK_Pos) /*!< Bit mask of NIRK field. */ + +/* Register: AAR_IRKPTR */ +/* Description: Pointer to IRK data structure */ + +/* Bits 31..0 : Pointer to the IRK data structure */ +#define AAR_IRKPTR_IRKPTR_Pos (0UL) /*!< Position of IRKPTR field. */ +#define AAR_IRKPTR_IRKPTR_Msk (0xFFFFFFFFUL << AAR_IRKPTR_IRKPTR_Pos) /*!< Bit mask of IRKPTR field. */ + +/* Register: AAR_ADDRPTR */ +/* Description: Pointer to the resolvable address */ + +/* Bits 31..0 : Pointer to the resolvable address (6-bytes) */ +#define AAR_ADDRPTR_ADDRPTR_Pos (0UL) /*!< Position of ADDRPTR field. */ +#define AAR_ADDRPTR_ADDRPTR_Msk (0xFFFFFFFFUL << AAR_ADDRPTR_ADDRPTR_Pos) /*!< Bit mask of ADDRPTR field. */ + +/* Register: AAR_SCRATCHPTR */ +/* Description: Pointer to data area used for temporary storage */ + +/* Bits 31..0 : Pointer to a scratch data area used for temporary storage during resolution.A space of minimum 3 bytes must be reserved. */ +#define AAR_SCRATCHPTR_SCRATCHPTR_Pos (0UL) /*!< Position of SCRATCHPTR field. */ +#define AAR_SCRATCHPTR_SCRATCHPTR_Msk (0xFFFFFFFFUL << AAR_SCRATCHPTR_SCRATCHPTR_Pos) /*!< Bit mask of SCRATCHPTR field. */ + + +/* Peripheral: ACL */ +/* Description: Access control lists */ + +/* Register: ACL_ACL_ADDR */ +/* Description: Description cluster[n]: Configure the word-aligned start address of region n to protect */ + +/* Bits 31..0 : Valid word-aligned start address of region n to protect. Address must point to a flash page boundary. */ +#define ACL_ACL_ADDR_ADDR_Pos (0UL) /*!< Position of ADDR field. */ +#define ACL_ACL_ADDR_ADDR_Msk (0xFFFFFFFFUL << ACL_ACL_ADDR_ADDR_Pos) /*!< Bit mask of ADDR field. */ + +/* Register: ACL_ACL_SIZE */ +/* Description: Description cluster[n]: Size of region to protect counting from address ACL[n].ADDR. Write '0' as no effect. */ + +/* Bits 31..0 : Size of flash region n in bytes. Must be a multiple of the flash page size, and the maximum region size is limited to 512kB. */ +#define ACL_ACL_SIZE_SIZE_Pos (0UL) /*!< Position of SIZE field. */ +#define ACL_ACL_SIZE_SIZE_Msk (0xFFFFFFFFUL << ACL_ACL_SIZE_SIZE_Pos) /*!< Bit mask of SIZE field. */ + +/* Register: ACL_ACL_PERM */ +/* Description: Description cluster[n]: Access permissions for region n as defined by start address ACL[n].ADDR and size ACL[n].SIZE */ + +/* Bit 2 : Configure read permissions for region n. Write '0' has no effect. */ +#define ACL_ACL_PERM_READ_Pos (2UL) /*!< Position of READ field. */ +#define ACL_ACL_PERM_READ_Msk (0x1UL << ACL_ACL_PERM_READ_Pos) /*!< Bit mask of READ field. */ +#define ACL_ACL_PERM_READ_Enable (0UL) /*!< Allow read instructions to region n */ +#define ACL_ACL_PERM_READ_Disable (1UL) /*!< Block read instructions to region n */ + +/* Bit 1 : Configure write and erase permissions for region n. Write '0' has no effect. */ +#define ACL_ACL_PERM_WRITE_Pos (1UL) /*!< Position of WRITE field. */ +#define ACL_ACL_PERM_WRITE_Msk (0x1UL << ACL_ACL_PERM_WRITE_Pos) /*!< Bit mask of WRITE field. */ +#define ACL_ACL_PERM_WRITE_Enable (0UL) /*!< Allow write and erase instructions to region n */ +#define ACL_ACL_PERM_WRITE_Disable (1UL) /*!< Block write and erase instructions to region n */ + + +/* Peripheral: CCM */ +/* Description: AES CCM Mode Encryption */ + +/* Register: CCM_TASKS_KSGEN */ +/* Description: Start generation of key-stream. This operation will stop by itself when completed. */ + +/* Bit 0 : */ +#define CCM_TASKS_KSGEN_TASKS_KSGEN_Pos (0UL) /*!< Position of TASKS_KSGEN field. */ +#define CCM_TASKS_KSGEN_TASKS_KSGEN_Msk (0x1UL << CCM_TASKS_KSGEN_TASKS_KSGEN_Pos) /*!< Bit mask of TASKS_KSGEN field. */ + +/* Register: CCM_TASKS_CRYPT */ +/* Description: Start encryption/decryption. This operation will stop by itself when completed. */ + +/* Bit 0 : */ +#define CCM_TASKS_CRYPT_TASKS_CRYPT_Pos (0UL) /*!< Position of TASKS_CRYPT field. */ +#define CCM_TASKS_CRYPT_TASKS_CRYPT_Msk (0x1UL << CCM_TASKS_CRYPT_TASKS_CRYPT_Pos) /*!< Bit mask of TASKS_CRYPT field. */ + +/* Register: CCM_TASKS_STOP */ +/* Description: Stop encryption/decryption */ + +/* Bit 0 : */ +#define CCM_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define CCM_TASKS_STOP_TASKS_STOP_Msk (0x1UL << CCM_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: CCM_TASKS_RATEOVERRIDE */ +/* Description: Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption */ + +/* Bit 0 : */ +#define CCM_TASKS_RATEOVERRIDE_TASKS_RATEOVERRIDE_Pos (0UL) /*!< Position of TASKS_RATEOVERRIDE field. */ +#define CCM_TASKS_RATEOVERRIDE_TASKS_RATEOVERRIDE_Msk (0x1UL << CCM_TASKS_RATEOVERRIDE_TASKS_RATEOVERRIDE_Pos) /*!< Bit mask of TASKS_RATEOVERRIDE field. */ + +/* Register: CCM_EVENTS_ENDKSGEN */ +/* Description: Key-stream generation complete */ + +/* Bit 0 : */ +#define CCM_EVENTS_ENDKSGEN_EVENTS_ENDKSGEN_Pos (0UL) /*!< Position of EVENTS_ENDKSGEN field. */ +#define CCM_EVENTS_ENDKSGEN_EVENTS_ENDKSGEN_Msk (0x1UL << CCM_EVENTS_ENDKSGEN_EVENTS_ENDKSGEN_Pos) /*!< Bit mask of EVENTS_ENDKSGEN field. */ + +/* Register: CCM_EVENTS_ENDCRYPT */ +/* Description: Encrypt/decrypt complete */ + +/* Bit 0 : */ +#define CCM_EVENTS_ENDCRYPT_EVENTS_ENDCRYPT_Pos (0UL) /*!< Position of EVENTS_ENDCRYPT field. */ +#define CCM_EVENTS_ENDCRYPT_EVENTS_ENDCRYPT_Msk (0x1UL << CCM_EVENTS_ENDCRYPT_EVENTS_ENDCRYPT_Pos) /*!< Bit mask of EVENTS_ENDCRYPT field. */ + +/* Register: CCM_EVENTS_ERROR */ +/* Description: Deprecated register - CCM error event */ + +/* Bit 0 : */ +#define CCM_EVENTS_ERROR_EVENTS_ERROR_Pos (0UL) /*!< Position of EVENTS_ERROR field. */ +#define CCM_EVENTS_ERROR_EVENTS_ERROR_Msk (0x1UL << CCM_EVENTS_ERROR_EVENTS_ERROR_Pos) /*!< Bit mask of EVENTS_ERROR field. */ + +/* Register: CCM_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 0 : Shortcut between ENDKSGEN event and CRYPT task */ +#define CCM_SHORTS_ENDKSGEN_CRYPT_Pos (0UL) /*!< Position of ENDKSGEN_CRYPT field. */ +#define CCM_SHORTS_ENDKSGEN_CRYPT_Msk (0x1UL << CCM_SHORTS_ENDKSGEN_CRYPT_Pos) /*!< Bit mask of ENDKSGEN_CRYPT field. */ +#define CCM_SHORTS_ENDKSGEN_CRYPT_Disabled (0UL) /*!< Disable shortcut */ +#define CCM_SHORTS_ENDKSGEN_CRYPT_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: CCM_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 2 : Write '1' to enable interrupt for ERROR event */ +#define CCM_INTENSET_ERROR_Pos (2UL) /*!< Position of ERROR field. */ +#define CCM_INTENSET_ERROR_Msk (0x1UL << CCM_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define CCM_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define CCM_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define CCM_INTENSET_ERROR_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable interrupt for ENDCRYPT event */ +#define CCM_INTENSET_ENDCRYPT_Pos (1UL) /*!< Position of ENDCRYPT field. */ +#define CCM_INTENSET_ENDCRYPT_Msk (0x1UL << CCM_INTENSET_ENDCRYPT_Pos) /*!< Bit mask of ENDCRYPT field. */ +#define CCM_INTENSET_ENDCRYPT_Disabled (0UL) /*!< Read: Disabled */ +#define CCM_INTENSET_ENDCRYPT_Enabled (1UL) /*!< Read: Enabled */ +#define CCM_INTENSET_ENDCRYPT_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to enable interrupt for ENDKSGEN event */ +#define CCM_INTENSET_ENDKSGEN_Pos (0UL) /*!< Position of ENDKSGEN field. */ +#define CCM_INTENSET_ENDKSGEN_Msk (0x1UL << CCM_INTENSET_ENDKSGEN_Pos) /*!< Bit mask of ENDKSGEN field. */ +#define CCM_INTENSET_ENDKSGEN_Disabled (0UL) /*!< Read: Disabled */ +#define CCM_INTENSET_ENDKSGEN_Enabled (1UL) /*!< Read: Enabled */ +#define CCM_INTENSET_ENDKSGEN_Set (1UL) /*!< Enable */ + +/* Register: CCM_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 2 : Write '1' to disable interrupt for ERROR event */ +#define CCM_INTENCLR_ERROR_Pos (2UL) /*!< Position of ERROR field. */ +#define CCM_INTENCLR_ERROR_Msk (0x1UL << CCM_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define CCM_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define CCM_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define CCM_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable interrupt for ENDCRYPT event */ +#define CCM_INTENCLR_ENDCRYPT_Pos (1UL) /*!< Position of ENDCRYPT field. */ +#define CCM_INTENCLR_ENDCRYPT_Msk (0x1UL << CCM_INTENCLR_ENDCRYPT_Pos) /*!< Bit mask of ENDCRYPT field. */ +#define CCM_INTENCLR_ENDCRYPT_Disabled (0UL) /*!< Read: Disabled */ +#define CCM_INTENCLR_ENDCRYPT_Enabled (1UL) /*!< Read: Enabled */ +#define CCM_INTENCLR_ENDCRYPT_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to disable interrupt for ENDKSGEN event */ +#define CCM_INTENCLR_ENDKSGEN_Pos (0UL) /*!< Position of ENDKSGEN field. */ +#define CCM_INTENCLR_ENDKSGEN_Msk (0x1UL << CCM_INTENCLR_ENDKSGEN_Pos) /*!< Bit mask of ENDKSGEN field. */ +#define CCM_INTENCLR_ENDKSGEN_Disabled (0UL) /*!< Read: Disabled */ +#define CCM_INTENCLR_ENDKSGEN_Enabled (1UL) /*!< Read: Enabled */ +#define CCM_INTENCLR_ENDKSGEN_Clear (1UL) /*!< Disable */ + +/* Register: CCM_MICSTATUS */ +/* Description: MIC check result */ + +/* Bit 0 : The result of the MIC check performed during the previous decryption operation */ +#define CCM_MICSTATUS_MICSTATUS_Pos (0UL) /*!< Position of MICSTATUS field. */ +#define CCM_MICSTATUS_MICSTATUS_Msk (0x1UL << CCM_MICSTATUS_MICSTATUS_Pos) /*!< Bit mask of MICSTATUS field. */ +#define CCM_MICSTATUS_MICSTATUS_CheckFailed (0UL) /*!< MIC check failed */ +#define CCM_MICSTATUS_MICSTATUS_CheckPassed (1UL) /*!< MIC check passed */ + +/* Register: CCM_ENABLE */ +/* Description: Enable */ + +/* Bits 1..0 : Enable or disable CCM */ +#define CCM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define CCM_ENABLE_ENABLE_Msk (0x3UL << CCM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define CCM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ +#define CCM_ENABLE_ENABLE_Enabled (2UL) /*!< Enable */ + +/* Register: CCM_MODE */ +/* Description: Operation mode */ + +/* Bit 24 : Packet length configuration */ +#define CCM_MODE_LENGTH_Pos (24UL) /*!< Position of LENGTH field. */ +#define CCM_MODE_LENGTH_Msk (0x1UL << CCM_MODE_LENGTH_Pos) /*!< Bit mask of LENGTH field. */ +#define CCM_MODE_LENGTH_Default (0UL) /*!< Default length. Effective length of LENGTH field in encrypted/decrypted packet is 5 bits. A key-stream for packet payloads up to 27 bytes will be generated. */ +#define CCM_MODE_LENGTH_Extended (1UL) /*!< Extended length. Effective length of LENGTH field in encrypted/decrypted packet is 8 bits. A key-stream for packet payloads up to MAXPACKETSIZE bytes will be generated. */ + +/* Bits 17..16 : Radio data rate that the CCM shall run synchronous with */ +#define CCM_MODE_DATARATE_Pos (16UL) /*!< Position of DATARATE field. */ +#define CCM_MODE_DATARATE_Msk (0x3UL << CCM_MODE_DATARATE_Pos) /*!< Bit mask of DATARATE field. */ +#define CCM_MODE_DATARATE_1Mbit (0UL) /*!< 1 Mbps */ +#define CCM_MODE_DATARATE_2Mbit (1UL) /*!< 2 Mbps */ +#define CCM_MODE_DATARATE_125Kbps (2UL) /*!< 125 Kbps */ +#define CCM_MODE_DATARATE_500Kbps (3UL) /*!< 500 Kbps */ + +/* Bit 0 : The mode of operation to be used. The settings in this register apply whenever either the KSGEN or CRYPT tasks are triggered. */ +#define CCM_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ +#define CCM_MODE_MODE_Msk (0x1UL << CCM_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ +#define CCM_MODE_MODE_Encryption (0UL) /*!< AES CCM packet encryption mode */ +#define CCM_MODE_MODE_Decryption (1UL) /*!< AES CCM packet decryption mode */ + +/* Register: CCM_CNFPTR */ +/* Description: Pointer to data structure holding AES key and NONCE vector */ + +/* Bits 31..0 : Pointer to the data structure holding the AES key and the CCM NONCE vector (see Table 1 CCM data structure overview) */ +#define CCM_CNFPTR_CNFPTR_Pos (0UL) /*!< Position of CNFPTR field. */ +#define CCM_CNFPTR_CNFPTR_Msk (0xFFFFFFFFUL << CCM_CNFPTR_CNFPTR_Pos) /*!< Bit mask of CNFPTR field. */ + +/* Register: CCM_INPTR */ +/* Description: Input pointer */ + +/* Bits 31..0 : Input pointer */ +#define CCM_INPTR_INPTR_Pos (0UL) /*!< Position of INPTR field. */ +#define CCM_INPTR_INPTR_Msk (0xFFFFFFFFUL << CCM_INPTR_INPTR_Pos) /*!< Bit mask of INPTR field. */ + +/* Register: CCM_OUTPTR */ +/* Description: Output pointer */ + +/* Bits 31..0 : Output pointer */ +#define CCM_OUTPTR_OUTPTR_Pos (0UL) /*!< Position of OUTPTR field. */ +#define CCM_OUTPTR_OUTPTR_Msk (0xFFFFFFFFUL << CCM_OUTPTR_OUTPTR_Pos) /*!< Bit mask of OUTPTR field. */ + +/* Register: CCM_SCRATCHPTR */ +/* Description: Pointer to data area used for temporary storage */ + +/* Bits 31..0 : Pointer to a scratch data area used for temporary storage during key-stream generation, + MIC generation and encryption/decryption. */ +#define CCM_SCRATCHPTR_SCRATCHPTR_Pos (0UL) /*!< Position of SCRATCHPTR field. */ +#define CCM_SCRATCHPTR_SCRATCHPTR_Msk (0xFFFFFFFFUL << CCM_SCRATCHPTR_SCRATCHPTR_Pos) /*!< Bit mask of SCRATCHPTR field. */ + +/* Register: CCM_MAXPACKETSIZE */ +/* Description: Length of key-stream generated when MODE.LENGTH = Extended. */ + +/* Bits 7..0 : Length of key-stream generated when MODE.LENGTH = Extended. This value must be greater or equal to the subsequent packet payload to be encrypted/decrypted. */ +#define CCM_MAXPACKETSIZE_MAXPACKETSIZE_Pos (0UL) /*!< Position of MAXPACKETSIZE field. */ +#define CCM_MAXPACKETSIZE_MAXPACKETSIZE_Msk (0xFFUL << CCM_MAXPACKETSIZE_MAXPACKETSIZE_Pos) /*!< Bit mask of MAXPACKETSIZE field. */ + +/* Register: CCM_RATEOVERRIDE */ +/* Description: Data rate override setting. */ + +/* Bits 1..0 : Data rate override setting. */ +#define CCM_RATEOVERRIDE_RATEOVERRIDE_Pos (0UL) /*!< Position of RATEOVERRIDE field. */ +#define CCM_RATEOVERRIDE_RATEOVERRIDE_Msk (0x3UL << CCM_RATEOVERRIDE_RATEOVERRIDE_Pos) /*!< Bit mask of RATEOVERRIDE field. */ +#define CCM_RATEOVERRIDE_RATEOVERRIDE_1Mbit (0UL) /*!< 1 Mbps */ +#define CCM_RATEOVERRIDE_RATEOVERRIDE_2Mbit (1UL) /*!< 2 Mbps */ +#define CCM_RATEOVERRIDE_RATEOVERRIDE_125Kbps (2UL) /*!< 125 Kbps */ +#define CCM_RATEOVERRIDE_RATEOVERRIDE_500Kbps (3UL) /*!< 500 Kbps */ + + +/* Peripheral: CC_HOST_RGF */ +/* Description: CRYPTOCELL HOST_RGF interface */ + +/* Register: CC_HOST_RGF_HOST_CRYPTOKEY_SEL */ +/* Description: AES hardware key select */ + +/* Bits 1..0 : Select the source of the HW key that is used by the AES engine */ +#define CC_HOST_RGF_HOST_CRYPTOKEY_SEL_HOST_CRYPTOKEY_SEL_Pos (0UL) /*!< Position of HOST_CRYPTOKEY_SEL field. */ +#define CC_HOST_RGF_HOST_CRYPTOKEY_SEL_HOST_CRYPTOKEY_SEL_Msk (0x3UL << CC_HOST_RGF_HOST_CRYPTOKEY_SEL_HOST_CRYPTOKEY_SEL_Pos) /*!< Bit mask of HOST_CRYPTOKEY_SEL field. */ +#define CC_HOST_RGF_HOST_CRYPTOKEY_SEL_HOST_CRYPTOKEY_SEL_K_DR (0UL) /*!< Use device root key K_DR from CRYPTOCELL AO power domain */ +#define CC_HOST_RGF_HOST_CRYPTOKEY_SEL_HOST_CRYPTOKEY_SEL_K_PRTL (1UL) /*!< Use hard-coded RTL key K_PRTL */ +#define CC_HOST_RGF_HOST_CRYPTOKEY_SEL_HOST_CRYPTOKEY_SEL_Session (2UL) /*!< Use provided session key */ + +/* Register: CC_HOST_RGF_HOST_IOT_KPRTL_LOCK */ +/* Description: This write-once register is the K_PRTL lock register. When this register is set, K_PRTL can not be used and a zeroed key will be used instead. The value of this register is saved in the CRYPTOCELL AO power domain. */ + +/* Bit 0 : This register is the K_PRTL lock register. When this register is set, K_PRTL can not be used and a zeroed key will be used instead. The value of this register is saved in the CRYPTOCELL AO power domain. */ +#define CC_HOST_RGF_HOST_IOT_KPRTL_LOCK_HOST_IOT_KPRTL_LOCK_Pos (0UL) /*!< Position of HOST_IOT_KPRTL_LOCK field. */ +#define CC_HOST_RGF_HOST_IOT_KPRTL_LOCK_HOST_IOT_KPRTL_LOCK_Msk (0x1UL << CC_HOST_RGF_HOST_IOT_KPRTL_LOCK_HOST_IOT_KPRTL_LOCK_Pos) /*!< Bit mask of HOST_IOT_KPRTL_LOCK field. */ +#define CC_HOST_RGF_HOST_IOT_KPRTL_LOCK_HOST_IOT_KPRTL_LOCK_Disabled (0UL) /*!< K_PRTL can be selected for use from register HOST_CRYPTOKEY_SEL */ +#define CC_HOST_RGF_HOST_IOT_KPRTL_LOCK_HOST_IOT_KPRTL_LOCK_Enabled (1UL) /*!< K_PRTL has been locked until next power-on reset (POR). If K_PRTL is selected anyway, a zeroed key will be used instead. */ + +/* Register: CC_HOST_RGF_HOST_IOT_KDR0 */ +/* Description: This register holds bits 31:0 of K_DR. The value of this register is saved in the CRYPTOCELL AO power domain. Reading from this address returns the K_DR valid status indicating if K_DR is successfully retained. */ + +/* Bits 31..0 : Write: K_DR bits 31:0 Read: 0x00000000 when 128-bit K_DR key value is not yet retained in the CRYPTOCELL AO power domain Read: 0x00000001 when 128-bit K_DR key value is successfully retained in the CRYPTOCELL AO power domain */ +#define CC_HOST_RGF_HOST_IOT_KDR0_HOST_IOT_KDR0_Pos (0UL) /*!< Position of HOST_IOT_KDR0 field. */ +#define CC_HOST_RGF_HOST_IOT_KDR0_HOST_IOT_KDR0_Msk (0xFFFFFFFFUL << CC_HOST_RGF_HOST_IOT_KDR0_HOST_IOT_KDR0_Pos) /*!< Bit mask of HOST_IOT_KDR0 field. */ + +/* Register: CC_HOST_RGF_HOST_IOT_KDR1 */ +/* Description: This register holds bits 63:32 of K_DR. The value of this register is saved in the CRYPTOCELL AO power domain. */ + +/* Bits 31..0 : K_DR bits 63:32 */ +#define CC_HOST_RGF_HOST_IOT_KDR1_HOST_IOT_KDR1_Pos (0UL) /*!< Position of HOST_IOT_KDR1 field. */ +#define CC_HOST_RGF_HOST_IOT_KDR1_HOST_IOT_KDR1_Msk (0xFFFFFFFFUL << CC_HOST_RGF_HOST_IOT_KDR1_HOST_IOT_KDR1_Pos) /*!< Bit mask of HOST_IOT_KDR1 field. */ + +/* Register: CC_HOST_RGF_HOST_IOT_KDR2 */ +/* Description: This register holds bits 95:64 of K_DR. The value of this register is saved in the CRYPTOCELL AO power domain. */ + +/* Bits 31..0 : K_DR bits 95:64 */ +#define CC_HOST_RGF_HOST_IOT_KDR2_HOST_IOT_KDR2_Pos (0UL) /*!< Position of HOST_IOT_KDR2 field. */ +#define CC_HOST_RGF_HOST_IOT_KDR2_HOST_IOT_KDR2_Msk (0xFFFFFFFFUL << CC_HOST_RGF_HOST_IOT_KDR2_HOST_IOT_KDR2_Pos) /*!< Bit mask of HOST_IOT_KDR2 field. */ + +/* Register: CC_HOST_RGF_HOST_IOT_KDR3 */ +/* Description: This register holds bits 127:96 of K_DR. The value of this register is saved in the CRYPTOCELL AO power domain. */ + +/* Bits 31..0 : K_DR bits 127:96 */ +#define CC_HOST_RGF_HOST_IOT_KDR3_HOST_IOT_KDR3_Pos (0UL) /*!< Position of HOST_IOT_KDR3 field. */ +#define CC_HOST_RGF_HOST_IOT_KDR3_HOST_IOT_KDR3_Msk (0xFFFFFFFFUL << CC_HOST_RGF_HOST_IOT_KDR3_HOST_IOT_KDR3_Pos) /*!< Bit mask of HOST_IOT_KDR3 field. */ + +/* Register: CC_HOST_RGF_HOST_IOT_LCS */ +/* Description: Controls lifecycle state (LCS) for CRYPTOCELL subsystem */ + +/* Bit 8 : This field is read-only and indicates if CRYPTOCELL LCS has been successfully configured since last reset */ +#define CC_HOST_RGF_HOST_IOT_LCS_LCS_IS_VALID_Pos (8UL) /*!< Position of LCS_IS_VALID field. */ +#define CC_HOST_RGF_HOST_IOT_LCS_LCS_IS_VALID_Msk (0x1UL << CC_HOST_RGF_HOST_IOT_LCS_LCS_IS_VALID_Pos) /*!< Bit mask of LCS_IS_VALID field. */ +#define CC_HOST_RGF_HOST_IOT_LCS_LCS_IS_VALID_Invalid (0UL) /*!< A valid LCS is not yet retained in the CRYPTOCELL AO power domain */ +#define CC_HOST_RGF_HOST_IOT_LCS_LCS_IS_VALID_Valid (1UL) /*!< A valid LCS is successfully retained in the CRYPTOCELL AO power domain */ + +/* Bits 2..0 : Lifecycle state value. This field is write-once per reset. */ +#define CC_HOST_RGF_HOST_IOT_LCS_LCS_Pos (0UL) /*!< Position of LCS field. */ +#define CC_HOST_RGF_HOST_IOT_LCS_LCS_Msk (0x7UL << CC_HOST_RGF_HOST_IOT_LCS_LCS_Pos) /*!< Bit mask of LCS field. */ +#define CC_HOST_RGF_HOST_IOT_LCS_LCS_Debug (0UL) /*!< CC310 operates in debug mode */ +#define CC_HOST_RGF_HOST_IOT_LCS_LCS_Secure (2UL) /*!< CC310 operates in secure mode */ + + +/* Peripheral: CLOCK */ +/* Description: Clock control */ + +/* Register: CLOCK_TASKS_HFCLKSTART */ +/* Description: Start HFXO crystal oscillator */ + +/* Bit 0 : */ +#define CLOCK_TASKS_HFCLKSTART_TASKS_HFCLKSTART_Pos (0UL) /*!< Position of TASKS_HFCLKSTART field. */ +#define CLOCK_TASKS_HFCLKSTART_TASKS_HFCLKSTART_Msk (0x1UL << CLOCK_TASKS_HFCLKSTART_TASKS_HFCLKSTART_Pos) /*!< Bit mask of TASKS_HFCLKSTART field. */ + +/* Register: CLOCK_TASKS_HFCLKSTOP */ +/* Description: Stop HFXO crystal oscillator */ + +/* Bit 0 : */ +#define CLOCK_TASKS_HFCLKSTOP_TASKS_HFCLKSTOP_Pos (0UL) /*!< Position of TASKS_HFCLKSTOP field. */ +#define CLOCK_TASKS_HFCLKSTOP_TASKS_HFCLKSTOP_Msk (0x1UL << CLOCK_TASKS_HFCLKSTOP_TASKS_HFCLKSTOP_Pos) /*!< Bit mask of TASKS_HFCLKSTOP field. */ + +/* Register: CLOCK_TASKS_LFCLKSTART */ +/* Description: Start LFCLK */ + +/* Bit 0 : */ +#define CLOCK_TASKS_LFCLKSTART_TASKS_LFCLKSTART_Pos (0UL) /*!< Position of TASKS_LFCLKSTART field. */ +#define CLOCK_TASKS_LFCLKSTART_TASKS_LFCLKSTART_Msk (0x1UL << CLOCK_TASKS_LFCLKSTART_TASKS_LFCLKSTART_Pos) /*!< Bit mask of TASKS_LFCLKSTART field. */ + +/* Register: CLOCK_TASKS_LFCLKSTOP */ +/* Description: Stop LFCLK */ + +/* Bit 0 : */ +#define CLOCK_TASKS_LFCLKSTOP_TASKS_LFCLKSTOP_Pos (0UL) /*!< Position of TASKS_LFCLKSTOP field. */ +#define CLOCK_TASKS_LFCLKSTOP_TASKS_LFCLKSTOP_Msk (0x1UL << CLOCK_TASKS_LFCLKSTOP_TASKS_LFCLKSTOP_Pos) /*!< Bit mask of TASKS_LFCLKSTOP field. */ + +/* Register: CLOCK_TASKS_CAL */ +/* Description: Start calibration of LFRC */ + +/* Bit 0 : */ +#define CLOCK_TASKS_CAL_TASKS_CAL_Pos (0UL) /*!< Position of TASKS_CAL field. */ +#define CLOCK_TASKS_CAL_TASKS_CAL_Msk (0x1UL << CLOCK_TASKS_CAL_TASKS_CAL_Pos) /*!< Bit mask of TASKS_CAL field. */ + +/* Register: CLOCK_TASKS_CTSTART */ +/* Description: Start calibration timer */ + +/* Bit 0 : */ +#define CLOCK_TASKS_CTSTART_TASKS_CTSTART_Pos (0UL) /*!< Position of TASKS_CTSTART field. */ +#define CLOCK_TASKS_CTSTART_TASKS_CTSTART_Msk (0x1UL << CLOCK_TASKS_CTSTART_TASKS_CTSTART_Pos) /*!< Bit mask of TASKS_CTSTART field. */ + +/* Register: CLOCK_TASKS_CTSTOP */ +/* Description: Stop calibration timer */ + +/* Bit 0 : */ +#define CLOCK_TASKS_CTSTOP_TASKS_CTSTOP_Pos (0UL) /*!< Position of TASKS_CTSTOP field. */ +#define CLOCK_TASKS_CTSTOP_TASKS_CTSTOP_Msk (0x1UL << CLOCK_TASKS_CTSTOP_TASKS_CTSTOP_Pos) /*!< Bit mask of TASKS_CTSTOP field. */ + +/* Register: CLOCK_EVENTS_HFCLKSTARTED */ +/* Description: HFXO crystal oscillator started */ + +/* Bit 0 : */ +#define CLOCK_EVENTS_HFCLKSTARTED_EVENTS_HFCLKSTARTED_Pos (0UL) /*!< Position of EVENTS_HFCLKSTARTED field. */ +#define CLOCK_EVENTS_HFCLKSTARTED_EVENTS_HFCLKSTARTED_Msk (0x1UL << CLOCK_EVENTS_HFCLKSTARTED_EVENTS_HFCLKSTARTED_Pos) /*!< Bit mask of EVENTS_HFCLKSTARTED field. */ + +/* Register: CLOCK_EVENTS_LFCLKSTARTED */ +/* Description: LFCLK started */ + +/* Bit 0 : */ +#define CLOCK_EVENTS_LFCLKSTARTED_EVENTS_LFCLKSTARTED_Pos (0UL) /*!< Position of EVENTS_LFCLKSTARTED field. */ +#define CLOCK_EVENTS_LFCLKSTARTED_EVENTS_LFCLKSTARTED_Msk (0x1UL << CLOCK_EVENTS_LFCLKSTARTED_EVENTS_LFCLKSTARTED_Pos) /*!< Bit mask of EVENTS_LFCLKSTARTED field. */ + +/* Register: CLOCK_EVENTS_DONE */ +/* Description: Calibration of LFRC completed */ + +/* Bit 0 : */ +#define CLOCK_EVENTS_DONE_EVENTS_DONE_Pos (0UL) /*!< Position of EVENTS_DONE field. */ +#define CLOCK_EVENTS_DONE_EVENTS_DONE_Msk (0x1UL << CLOCK_EVENTS_DONE_EVENTS_DONE_Pos) /*!< Bit mask of EVENTS_DONE field. */ + +/* Register: CLOCK_EVENTS_CTTO */ +/* Description: Calibration timer timeout */ + +/* Bit 0 : */ +#define CLOCK_EVENTS_CTTO_EVENTS_CTTO_Pos (0UL) /*!< Position of EVENTS_CTTO field. */ +#define CLOCK_EVENTS_CTTO_EVENTS_CTTO_Msk (0x1UL << CLOCK_EVENTS_CTTO_EVENTS_CTTO_Pos) /*!< Bit mask of EVENTS_CTTO field. */ + +/* Register: CLOCK_EVENTS_CTSTARTED */ +/* Description: Calibration timer has been started and is ready to process new tasks */ + +/* Bit 0 : */ +#define CLOCK_EVENTS_CTSTARTED_EVENTS_CTSTARTED_Pos (0UL) /*!< Position of EVENTS_CTSTARTED field. */ +#define CLOCK_EVENTS_CTSTARTED_EVENTS_CTSTARTED_Msk (0x1UL << CLOCK_EVENTS_CTSTARTED_EVENTS_CTSTARTED_Pos) /*!< Bit mask of EVENTS_CTSTARTED field. */ + +/* Register: CLOCK_EVENTS_CTSTOPPED */ +/* Description: Calibration timer has been stopped and is ready to process new tasks */ + +/* Bit 0 : */ +#define CLOCK_EVENTS_CTSTOPPED_EVENTS_CTSTOPPED_Pos (0UL) /*!< Position of EVENTS_CTSTOPPED field. */ +#define CLOCK_EVENTS_CTSTOPPED_EVENTS_CTSTOPPED_Msk (0x1UL << CLOCK_EVENTS_CTSTOPPED_EVENTS_CTSTOPPED_Pos) /*!< Bit mask of EVENTS_CTSTOPPED field. */ + +/* Register: CLOCK_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 11 : Write '1' to enable interrupt for CTSTOPPED event */ +#define CLOCK_INTENSET_CTSTOPPED_Pos (11UL) /*!< Position of CTSTOPPED field. */ +#define CLOCK_INTENSET_CTSTOPPED_Msk (0x1UL << CLOCK_INTENSET_CTSTOPPED_Pos) /*!< Bit mask of CTSTOPPED field. */ +#define CLOCK_INTENSET_CTSTOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENSET_CTSTOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENSET_CTSTOPPED_Set (1UL) /*!< Enable */ + +/* Bit 10 : Write '1' to enable interrupt for CTSTARTED event */ +#define CLOCK_INTENSET_CTSTARTED_Pos (10UL) /*!< Position of CTSTARTED field. */ +#define CLOCK_INTENSET_CTSTARTED_Msk (0x1UL << CLOCK_INTENSET_CTSTARTED_Pos) /*!< Bit mask of CTSTARTED field. */ +#define CLOCK_INTENSET_CTSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENSET_CTSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENSET_CTSTARTED_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to enable interrupt for CTTO event */ +#define CLOCK_INTENSET_CTTO_Pos (4UL) /*!< Position of CTTO field. */ +#define CLOCK_INTENSET_CTTO_Msk (0x1UL << CLOCK_INTENSET_CTTO_Pos) /*!< Bit mask of CTTO field. */ +#define CLOCK_INTENSET_CTTO_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENSET_CTTO_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENSET_CTTO_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to enable interrupt for DONE event */ +#define CLOCK_INTENSET_DONE_Pos (3UL) /*!< Position of DONE field. */ +#define CLOCK_INTENSET_DONE_Msk (0x1UL << CLOCK_INTENSET_DONE_Pos) /*!< Bit mask of DONE field. */ +#define CLOCK_INTENSET_DONE_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENSET_DONE_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENSET_DONE_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable interrupt for LFCLKSTARTED event */ +#define CLOCK_INTENSET_LFCLKSTARTED_Pos (1UL) /*!< Position of LFCLKSTARTED field. */ +#define CLOCK_INTENSET_LFCLKSTARTED_Msk (0x1UL << CLOCK_INTENSET_LFCLKSTARTED_Pos) /*!< Bit mask of LFCLKSTARTED field. */ +#define CLOCK_INTENSET_LFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENSET_LFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENSET_LFCLKSTARTED_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to enable interrupt for HFCLKSTARTED event */ +#define CLOCK_INTENSET_HFCLKSTARTED_Pos (0UL) /*!< Position of HFCLKSTARTED field. */ +#define CLOCK_INTENSET_HFCLKSTARTED_Msk (0x1UL << CLOCK_INTENSET_HFCLKSTARTED_Pos) /*!< Bit mask of HFCLKSTARTED field. */ +#define CLOCK_INTENSET_HFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENSET_HFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENSET_HFCLKSTARTED_Set (1UL) /*!< Enable */ + +/* Register: CLOCK_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 11 : Write '1' to disable interrupt for CTSTOPPED event */ +#define CLOCK_INTENCLR_CTSTOPPED_Pos (11UL) /*!< Position of CTSTOPPED field. */ +#define CLOCK_INTENCLR_CTSTOPPED_Msk (0x1UL << CLOCK_INTENCLR_CTSTOPPED_Pos) /*!< Bit mask of CTSTOPPED field. */ +#define CLOCK_INTENCLR_CTSTOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENCLR_CTSTOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENCLR_CTSTOPPED_Clear (1UL) /*!< Disable */ + +/* Bit 10 : Write '1' to disable interrupt for CTSTARTED event */ +#define CLOCK_INTENCLR_CTSTARTED_Pos (10UL) /*!< Position of CTSTARTED field. */ +#define CLOCK_INTENCLR_CTSTARTED_Msk (0x1UL << CLOCK_INTENCLR_CTSTARTED_Pos) /*!< Bit mask of CTSTARTED field. */ +#define CLOCK_INTENCLR_CTSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENCLR_CTSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENCLR_CTSTARTED_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to disable interrupt for CTTO event */ +#define CLOCK_INTENCLR_CTTO_Pos (4UL) /*!< Position of CTTO field. */ +#define CLOCK_INTENCLR_CTTO_Msk (0x1UL << CLOCK_INTENCLR_CTTO_Pos) /*!< Bit mask of CTTO field. */ +#define CLOCK_INTENCLR_CTTO_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENCLR_CTTO_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENCLR_CTTO_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to disable interrupt for DONE event */ +#define CLOCK_INTENCLR_DONE_Pos (3UL) /*!< Position of DONE field. */ +#define CLOCK_INTENCLR_DONE_Msk (0x1UL << CLOCK_INTENCLR_DONE_Pos) /*!< Bit mask of DONE field. */ +#define CLOCK_INTENCLR_DONE_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENCLR_DONE_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENCLR_DONE_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable interrupt for LFCLKSTARTED event */ +#define CLOCK_INTENCLR_LFCLKSTARTED_Pos (1UL) /*!< Position of LFCLKSTARTED field. */ +#define CLOCK_INTENCLR_LFCLKSTARTED_Msk (0x1UL << CLOCK_INTENCLR_LFCLKSTARTED_Pos) /*!< Bit mask of LFCLKSTARTED field. */ +#define CLOCK_INTENCLR_LFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENCLR_LFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENCLR_LFCLKSTARTED_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to disable interrupt for HFCLKSTARTED event */ +#define CLOCK_INTENCLR_HFCLKSTARTED_Pos (0UL) /*!< Position of HFCLKSTARTED field. */ +#define CLOCK_INTENCLR_HFCLKSTARTED_Msk (0x1UL << CLOCK_INTENCLR_HFCLKSTARTED_Pos) /*!< Bit mask of HFCLKSTARTED field. */ +#define CLOCK_INTENCLR_HFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENCLR_HFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENCLR_HFCLKSTARTED_Clear (1UL) /*!< Disable */ + +/* Register: CLOCK_HFCLKRUN */ +/* Description: Status indicating that HFCLKSTART task has been triggered */ + +/* Bit 0 : HFCLKSTART task triggered or not */ +#define CLOCK_HFCLKRUN_STATUS_Pos (0UL) /*!< Position of STATUS field. */ +#define CLOCK_HFCLKRUN_STATUS_Msk (0x1UL << CLOCK_HFCLKRUN_STATUS_Pos) /*!< Bit mask of STATUS field. */ +#define CLOCK_HFCLKRUN_STATUS_NotTriggered (0UL) /*!< Task not triggered */ +#define CLOCK_HFCLKRUN_STATUS_Triggered (1UL) /*!< Task triggered */ + +/* Register: CLOCK_HFCLKSTAT */ +/* Description: HFCLK status */ + +/* Bit 16 : HFCLK state */ +#define CLOCK_HFCLKSTAT_STATE_Pos (16UL) /*!< Position of STATE field. */ +#define CLOCK_HFCLKSTAT_STATE_Msk (0x1UL << CLOCK_HFCLKSTAT_STATE_Pos) /*!< Bit mask of STATE field. */ +#define CLOCK_HFCLKSTAT_STATE_NotRunning (0UL) /*!< HFCLK not running */ +#define CLOCK_HFCLKSTAT_STATE_Running (1UL) /*!< HFCLK running */ + +/* Bit 0 : Source of HFCLK */ +#define CLOCK_HFCLKSTAT_SRC_Pos (0UL) /*!< Position of SRC field. */ +#define CLOCK_HFCLKSTAT_SRC_Msk (0x1UL << CLOCK_HFCLKSTAT_SRC_Pos) /*!< Bit mask of SRC field. */ +#define CLOCK_HFCLKSTAT_SRC_RC (0UL) /*!< 64 MHz internal oscillator (HFINT) */ +#define CLOCK_HFCLKSTAT_SRC_Xtal (1UL) /*!< 64 MHz crystal oscillator (HFXO) */ + +/* Register: CLOCK_LFCLKRUN */ +/* Description: Status indicating that LFCLKSTART task has been triggered */ + +/* Bit 0 : LFCLKSTART task triggered or not */ +#define CLOCK_LFCLKRUN_STATUS_Pos (0UL) /*!< Position of STATUS field. */ +#define CLOCK_LFCLKRUN_STATUS_Msk (0x1UL << CLOCK_LFCLKRUN_STATUS_Pos) /*!< Bit mask of STATUS field. */ +#define CLOCK_LFCLKRUN_STATUS_NotTriggered (0UL) /*!< Task not triggered */ +#define CLOCK_LFCLKRUN_STATUS_Triggered (1UL) /*!< Task triggered */ + +/* Register: CLOCK_LFCLKSTAT */ +/* Description: LFCLK status */ + +/* Bit 16 : LFCLK state */ +#define CLOCK_LFCLKSTAT_STATE_Pos (16UL) /*!< Position of STATE field. */ +#define CLOCK_LFCLKSTAT_STATE_Msk (0x1UL << CLOCK_LFCLKSTAT_STATE_Pos) /*!< Bit mask of STATE field. */ +#define CLOCK_LFCLKSTAT_STATE_NotRunning (0UL) /*!< LFCLK not running */ +#define CLOCK_LFCLKSTAT_STATE_Running (1UL) /*!< LFCLK running */ + +/* Bits 1..0 : Source of LFCLK */ +#define CLOCK_LFCLKSTAT_SRC_Pos (0UL) /*!< Position of SRC field. */ +#define CLOCK_LFCLKSTAT_SRC_Msk (0x3UL << CLOCK_LFCLKSTAT_SRC_Pos) /*!< Bit mask of SRC field. */ +#define CLOCK_LFCLKSTAT_SRC_RC (0UL) /*!< 32.768 kHz RC oscillator (LFRC) */ +#define CLOCK_LFCLKSTAT_SRC_Xtal (1UL) /*!< 32.768 kHz crystal oscillator (LFXO) */ +#define CLOCK_LFCLKSTAT_SRC_Synth (2UL) /*!< 32.768 kHz synthesized from HFCLK (LFSYNT) */ + +/* Register: CLOCK_LFCLKSRCCOPY */ +/* Description: Copy of LFCLKSRC register, set when LFCLKSTART task was triggered */ + +/* Bits 1..0 : Clock source */ +#define CLOCK_LFCLKSRCCOPY_SRC_Pos (0UL) /*!< Position of SRC field. */ +#define CLOCK_LFCLKSRCCOPY_SRC_Msk (0x3UL << CLOCK_LFCLKSRCCOPY_SRC_Pos) /*!< Bit mask of SRC field. */ +#define CLOCK_LFCLKSRCCOPY_SRC_RC (0UL) /*!< 32.768 kHz RC oscillator (LFRC) */ +#define CLOCK_LFCLKSRCCOPY_SRC_Xtal (1UL) /*!< 32.768 kHz crystal oscillator (LFXO) */ +#define CLOCK_LFCLKSRCCOPY_SRC_Synth (2UL) /*!< 32.768 kHz synthesized from HFCLK (LFSYNT) */ + +/* Register: CLOCK_LFCLKSRC */ +/* Description: Clock source for the LFCLK */ + +/* Bit 17 : Enable or disable external source for LFCLK */ +#define CLOCK_LFCLKSRC_EXTERNAL_Pos (17UL) /*!< Position of EXTERNAL field. */ +#define CLOCK_LFCLKSRC_EXTERNAL_Msk (0x1UL << CLOCK_LFCLKSRC_EXTERNAL_Pos) /*!< Bit mask of EXTERNAL field. */ +#define CLOCK_LFCLKSRC_EXTERNAL_Disabled (0UL) /*!< Disable external source (use with Xtal) */ +#define CLOCK_LFCLKSRC_EXTERNAL_Enabled (1UL) /*!< Enable use of external source instead of Xtal (SRC needs to be set to Xtal) */ + +/* Bit 16 : Enable or disable bypass of LFCLK crystal oscillator with external clock source */ +#define CLOCK_LFCLKSRC_BYPASS_Pos (16UL) /*!< Position of BYPASS field. */ +#define CLOCK_LFCLKSRC_BYPASS_Msk (0x1UL << CLOCK_LFCLKSRC_BYPASS_Pos) /*!< Bit mask of BYPASS field. */ +#define CLOCK_LFCLKSRC_BYPASS_Disabled (0UL) /*!< Disable (use with Xtal or low-swing external source) */ +#define CLOCK_LFCLKSRC_BYPASS_Enabled (1UL) /*!< Enable (use with rail-to-rail external source) */ + +/* Bits 1..0 : Clock source */ +#define CLOCK_LFCLKSRC_SRC_Pos (0UL) /*!< Position of SRC field. */ +#define CLOCK_LFCLKSRC_SRC_Msk (0x3UL << CLOCK_LFCLKSRC_SRC_Pos) /*!< Bit mask of SRC field. */ +#define CLOCK_LFCLKSRC_SRC_RC (0UL) /*!< 32.768 kHz RC oscillator (LFRC) */ +#define CLOCK_LFCLKSRC_SRC_Xtal (1UL) /*!< 32.768 kHz crystal oscillator (LFXO) */ +#define CLOCK_LFCLKSRC_SRC_Synth (2UL) /*!< 32.768 kHz synthesized from HFCLK (LFSYNT) */ + +/* Register: CLOCK_HFXODEBOUNCE */ +/* Description: HFXO debounce time. The HFXO is started by triggering the TASKS_HFCLKSTART task. */ + +/* Bits 7..0 : HFXO debounce time. Debounce time = HFXODEBOUNCE * 16 us. */ +#define CLOCK_HFXODEBOUNCE_HFXODEBOUNCE_Pos (0UL) /*!< Position of HFXODEBOUNCE field. */ +#define CLOCK_HFXODEBOUNCE_HFXODEBOUNCE_Msk (0xFFUL << CLOCK_HFXODEBOUNCE_HFXODEBOUNCE_Pos) /*!< Bit mask of HFXODEBOUNCE field. */ +#define CLOCK_HFXODEBOUNCE_HFXODEBOUNCE_Db256us (0x10UL) /*!< 256 us debounce time. Recommended for TSX-3225, FA-20H and FA-128 crystals. */ +#define CLOCK_HFXODEBOUNCE_HFXODEBOUNCE_Db1024us (0x40UL) /*!< 1024 us debounce time. Recommended for NX1612AA and NX1210AB crystals. */ + +/* Register: CLOCK_CTIV */ +/* Description: Calibration timer interval */ + +/* Bits 6..0 : Calibration timer interval in multiple of 0.25 seconds. Range: 0.25 seconds to 31.75 seconds. */ +#define CLOCK_CTIV_CTIV_Pos (0UL) /*!< Position of CTIV field. */ +#define CLOCK_CTIV_CTIV_Msk (0x7FUL << CLOCK_CTIV_CTIV_Pos) /*!< Bit mask of CTIV field. */ + +/* Register: CLOCK_TRACECONFIG */ +/* Description: Clocking options for the trace port debug interface */ + +/* Bits 17..16 : Pin multiplexing of trace signals. See pin assignment chapter for more details. */ +#define CLOCK_TRACECONFIG_TRACEMUX_Pos (16UL) /*!< Position of TRACEMUX field. */ +#define CLOCK_TRACECONFIG_TRACEMUX_Msk (0x3UL << CLOCK_TRACECONFIG_TRACEMUX_Pos) /*!< Bit mask of TRACEMUX field. */ +#define CLOCK_TRACECONFIG_TRACEMUX_GPIO (0UL) /*!< No trace signals routed to pins. All pins can be used as regular GPIOs. */ +#define CLOCK_TRACECONFIG_TRACEMUX_Serial (1UL) /*!< SWO trace signal routed to pin. Remaining pins can be used as regular GPIOs. */ +#define CLOCK_TRACECONFIG_TRACEMUX_Parallel (2UL) /*!< All trace signals (TRACECLK and TRACEDATA[n]) routed to pins. */ + +/* Bits 1..0 : Speed of trace port clock. Note that the TRACECLK pin will output this clock divided by two. */ +#define CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos (0UL) /*!< Position of TRACEPORTSPEED field. */ +#define CLOCK_TRACECONFIG_TRACEPORTSPEED_Msk (0x3UL << CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos) /*!< Bit mask of TRACEPORTSPEED field. */ +#define CLOCK_TRACECONFIG_TRACEPORTSPEED_32MHz (0UL) /*!< 32 MHz trace port clock (TRACECLK = 16 MHz) */ +#define CLOCK_TRACECONFIG_TRACEPORTSPEED_16MHz (1UL) /*!< 16 MHz trace port clock (TRACECLK = 8 MHz) */ +#define CLOCK_TRACECONFIG_TRACEPORTSPEED_8MHz (2UL) /*!< 8 MHz trace port clock (TRACECLK = 4 MHz) */ +#define CLOCK_TRACECONFIG_TRACEPORTSPEED_4MHz (3UL) /*!< 4 MHz trace port clock (TRACECLK = 2 MHz) */ + +/* Register: CLOCK_LFRCMODE */ +/* Description: LFRC mode configuration */ + +/* Bit 16 : Active LFRC mode. This field is read only. */ +#define CLOCK_LFRCMODE_STATUS_Pos (16UL) /*!< Position of STATUS field. */ +#define CLOCK_LFRCMODE_STATUS_Msk (0x1UL << CLOCK_LFRCMODE_STATUS_Pos) /*!< Bit mask of STATUS field. */ +#define CLOCK_LFRCMODE_STATUS_Normal (0UL) /*!< Normal mode */ +#define CLOCK_LFRCMODE_STATUS_ULP (1UL) /*!< Ultra-low power mode (ULP) */ + +/* Bit 0 : Set LFRC mode */ +#define CLOCK_LFRCMODE_MODE_Pos (0UL) /*!< Position of MODE field. */ +#define CLOCK_LFRCMODE_MODE_Msk (0x1UL << CLOCK_LFRCMODE_MODE_Pos) /*!< Bit mask of MODE field. */ +#define CLOCK_LFRCMODE_MODE_Normal (0UL) /*!< Normal mode */ +#define CLOCK_LFRCMODE_MODE_ULP (1UL) /*!< Ultra-low power mode (ULP) */ + + +/* Peripheral: COMP */ +/* Description: Comparator */ + +/* Register: COMP_TASKS_START */ +/* Description: Start comparator */ + +/* Bit 0 : */ +#define COMP_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define COMP_TASKS_START_TASKS_START_Msk (0x1UL << COMP_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: COMP_TASKS_STOP */ +/* Description: Stop comparator */ + +/* Bit 0 : */ +#define COMP_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define COMP_TASKS_STOP_TASKS_STOP_Msk (0x1UL << COMP_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: COMP_TASKS_SAMPLE */ +/* Description: Sample comparator value */ + +/* Bit 0 : */ +#define COMP_TASKS_SAMPLE_TASKS_SAMPLE_Pos (0UL) /*!< Position of TASKS_SAMPLE field. */ +#define COMP_TASKS_SAMPLE_TASKS_SAMPLE_Msk (0x1UL << COMP_TASKS_SAMPLE_TASKS_SAMPLE_Pos) /*!< Bit mask of TASKS_SAMPLE field. */ + +/* Register: COMP_EVENTS_READY */ +/* Description: COMP is ready and output is valid */ + +/* Bit 0 : */ +#define COMP_EVENTS_READY_EVENTS_READY_Pos (0UL) /*!< Position of EVENTS_READY field. */ +#define COMP_EVENTS_READY_EVENTS_READY_Msk (0x1UL << COMP_EVENTS_READY_EVENTS_READY_Pos) /*!< Bit mask of EVENTS_READY field. */ + +/* Register: COMP_EVENTS_DOWN */ +/* Description: Downward crossing */ + +/* Bit 0 : */ +#define COMP_EVENTS_DOWN_EVENTS_DOWN_Pos (0UL) /*!< Position of EVENTS_DOWN field. */ +#define COMP_EVENTS_DOWN_EVENTS_DOWN_Msk (0x1UL << COMP_EVENTS_DOWN_EVENTS_DOWN_Pos) /*!< Bit mask of EVENTS_DOWN field. */ + +/* Register: COMP_EVENTS_UP */ +/* Description: Upward crossing */ + +/* Bit 0 : */ +#define COMP_EVENTS_UP_EVENTS_UP_Pos (0UL) /*!< Position of EVENTS_UP field. */ +#define COMP_EVENTS_UP_EVENTS_UP_Msk (0x1UL << COMP_EVENTS_UP_EVENTS_UP_Pos) /*!< Bit mask of EVENTS_UP field. */ + +/* Register: COMP_EVENTS_CROSS */ +/* Description: Downward or upward crossing */ + +/* Bit 0 : */ +#define COMP_EVENTS_CROSS_EVENTS_CROSS_Pos (0UL) /*!< Position of EVENTS_CROSS field. */ +#define COMP_EVENTS_CROSS_EVENTS_CROSS_Msk (0x1UL << COMP_EVENTS_CROSS_EVENTS_CROSS_Pos) /*!< Bit mask of EVENTS_CROSS field. */ + +/* Register: COMP_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 4 : Shortcut between CROSS event and STOP task */ +#define COMP_SHORTS_CROSS_STOP_Pos (4UL) /*!< Position of CROSS_STOP field. */ +#define COMP_SHORTS_CROSS_STOP_Msk (0x1UL << COMP_SHORTS_CROSS_STOP_Pos) /*!< Bit mask of CROSS_STOP field. */ +#define COMP_SHORTS_CROSS_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define COMP_SHORTS_CROSS_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 3 : Shortcut between UP event and STOP task */ +#define COMP_SHORTS_UP_STOP_Pos (3UL) /*!< Position of UP_STOP field. */ +#define COMP_SHORTS_UP_STOP_Msk (0x1UL << COMP_SHORTS_UP_STOP_Pos) /*!< Bit mask of UP_STOP field. */ +#define COMP_SHORTS_UP_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define COMP_SHORTS_UP_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 2 : Shortcut between DOWN event and STOP task */ +#define COMP_SHORTS_DOWN_STOP_Pos (2UL) /*!< Position of DOWN_STOP field. */ +#define COMP_SHORTS_DOWN_STOP_Msk (0x1UL << COMP_SHORTS_DOWN_STOP_Pos) /*!< Bit mask of DOWN_STOP field. */ +#define COMP_SHORTS_DOWN_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define COMP_SHORTS_DOWN_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 1 : Shortcut between READY event and STOP task */ +#define COMP_SHORTS_READY_STOP_Pos (1UL) /*!< Position of READY_STOP field. */ +#define COMP_SHORTS_READY_STOP_Msk (0x1UL << COMP_SHORTS_READY_STOP_Pos) /*!< Bit mask of READY_STOP field. */ +#define COMP_SHORTS_READY_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define COMP_SHORTS_READY_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 0 : Shortcut between READY event and SAMPLE task */ +#define COMP_SHORTS_READY_SAMPLE_Pos (0UL) /*!< Position of READY_SAMPLE field. */ +#define COMP_SHORTS_READY_SAMPLE_Msk (0x1UL << COMP_SHORTS_READY_SAMPLE_Pos) /*!< Bit mask of READY_SAMPLE field. */ +#define COMP_SHORTS_READY_SAMPLE_Disabled (0UL) /*!< Disable shortcut */ +#define COMP_SHORTS_READY_SAMPLE_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: COMP_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 3 : Enable or disable interrupt for CROSS event */ +#define COMP_INTEN_CROSS_Pos (3UL) /*!< Position of CROSS field. */ +#define COMP_INTEN_CROSS_Msk (0x1UL << COMP_INTEN_CROSS_Pos) /*!< Bit mask of CROSS field. */ +#define COMP_INTEN_CROSS_Disabled (0UL) /*!< Disable */ +#define COMP_INTEN_CROSS_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable interrupt for UP event */ +#define COMP_INTEN_UP_Pos (2UL) /*!< Position of UP field. */ +#define COMP_INTEN_UP_Msk (0x1UL << COMP_INTEN_UP_Pos) /*!< Bit mask of UP field. */ +#define COMP_INTEN_UP_Disabled (0UL) /*!< Disable */ +#define COMP_INTEN_UP_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for DOWN event */ +#define COMP_INTEN_DOWN_Pos (1UL) /*!< Position of DOWN field. */ +#define COMP_INTEN_DOWN_Msk (0x1UL << COMP_INTEN_DOWN_Pos) /*!< Bit mask of DOWN field. */ +#define COMP_INTEN_DOWN_Disabled (0UL) /*!< Disable */ +#define COMP_INTEN_DOWN_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable interrupt for READY event */ +#define COMP_INTEN_READY_Pos (0UL) /*!< Position of READY field. */ +#define COMP_INTEN_READY_Msk (0x1UL << COMP_INTEN_READY_Pos) /*!< Bit mask of READY field. */ +#define COMP_INTEN_READY_Disabled (0UL) /*!< Disable */ +#define COMP_INTEN_READY_Enabled (1UL) /*!< Enable */ + +/* Register: COMP_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 3 : Write '1' to enable interrupt for CROSS event */ +#define COMP_INTENSET_CROSS_Pos (3UL) /*!< Position of CROSS field. */ +#define COMP_INTENSET_CROSS_Msk (0x1UL << COMP_INTENSET_CROSS_Pos) /*!< Bit mask of CROSS field. */ +#define COMP_INTENSET_CROSS_Disabled (0UL) /*!< Read: Disabled */ +#define COMP_INTENSET_CROSS_Enabled (1UL) /*!< Read: Enabled */ +#define COMP_INTENSET_CROSS_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to enable interrupt for UP event */ +#define COMP_INTENSET_UP_Pos (2UL) /*!< Position of UP field. */ +#define COMP_INTENSET_UP_Msk (0x1UL << COMP_INTENSET_UP_Pos) /*!< Bit mask of UP field. */ +#define COMP_INTENSET_UP_Disabled (0UL) /*!< Read: Disabled */ +#define COMP_INTENSET_UP_Enabled (1UL) /*!< Read: Enabled */ +#define COMP_INTENSET_UP_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable interrupt for DOWN event */ +#define COMP_INTENSET_DOWN_Pos (1UL) /*!< Position of DOWN field. */ +#define COMP_INTENSET_DOWN_Msk (0x1UL << COMP_INTENSET_DOWN_Pos) /*!< Bit mask of DOWN field. */ +#define COMP_INTENSET_DOWN_Disabled (0UL) /*!< Read: Disabled */ +#define COMP_INTENSET_DOWN_Enabled (1UL) /*!< Read: Enabled */ +#define COMP_INTENSET_DOWN_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to enable interrupt for READY event */ +#define COMP_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */ +#define COMP_INTENSET_READY_Msk (0x1UL << COMP_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ +#define COMP_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */ +#define COMP_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */ +#define COMP_INTENSET_READY_Set (1UL) /*!< Enable */ + +/* Register: COMP_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 3 : Write '1' to disable interrupt for CROSS event */ +#define COMP_INTENCLR_CROSS_Pos (3UL) /*!< Position of CROSS field. */ +#define COMP_INTENCLR_CROSS_Msk (0x1UL << COMP_INTENCLR_CROSS_Pos) /*!< Bit mask of CROSS field. */ +#define COMP_INTENCLR_CROSS_Disabled (0UL) /*!< Read: Disabled */ +#define COMP_INTENCLR_CROSS_Enabled (1UL) /*!< Read: Enabled */ +#define COMP_INTENCLR_CROSS_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to disable interrupt for UP event */ +#define COMP_INTENCLR_UP_Pos (2UL) /*!< Position of UP field. */ +#define COMP_INTENCLR_UP_Msk (0x1UL << COMP_INTENCLR_UP_Pos) /*!< Bit mask of UP field. */ +#define COMP_INTENCLR_UP_Disabled (0UL) /*!< Read: Disabled */ +#define COMP_INTENCLR_UP_Enabled (1UL) /*!< Read: Enabled */ +#define COMP_INTENCLR_UP_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable interrupt for DOWN event */ +#define COMP_INTENCLR_DOWN_Pos (1UL) /*!< Position of DOWN field. */ +#define COMP_INTENCLR_DOWN_Msk (0x1UL << COMP_INTENCLR_DOWN_Pos) /*!< Bit mask of DOWN field. */ +#define COMP_INTENCLR_DOWN_Disabled (0UL) /*!< Read: Disabled */ +#define COMP_INTENCLR_DOWN_Enabled (1UL) /*!< Read: Enabled */ +#define COMP_INTENCLR_DOWN_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to disable interrupt for READY event */ +#define COMP_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */ +#define COMP_INTENCLR_READY_Msk (0x1UL << COMP_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ +#define COMP_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */ +#define COMP_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */ +#define COMP_INTENCLR_READY_Clear (1UL) /*!< Disable */ + +/* Register: COMP_RESULT */ +/* Description: Compare result */ + +/* Bit 0 : Result of last compare. Decision point SAMPLE task. */ +#define COMP_RESULT_RESULT_Pos (0UL) /*!< Position of RESULT field. */ +#define COMP_RESULT_RESULT_Msk (0x1UL << COMP_RESULT_RESULT_Pos) /*!< Bit mask of RESULT field. */ +#define COMP_RESULT_RESULT_Below (0UL) /*!< Input voltage is below the threshold (VIN+ < VIN-) */ +#define COMP_RESULT_RESULT_Above (1UL) /*!< Input voltage is above the threshold (VIN+ > VIN-) */ + +/* Register: COMP_ENABLE */ +/* Description: COMP enable */ + +/* Bits 1..0 : Enable or disable COMP */ +#define COMP_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define COMP_ENABLE_ENABLE_Msk (0x3UL << COMP_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define COMP_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ +#define COMP_ENABLE_ENABLE_Enabled (2UL) /*!< Enable */ + +/* Register: COMP_PSEL */ +/* Description: Pin select */ + +/* Bits 2..0 : Analog pin select */ +#define COMP_PSEL_PSEL_Pos (0UL) /*!< Position of PSEL field. */ +#define COMP_PSEL_PSEL_Msk (0x7UL << COMP_PSEL_PSEL_Pos) /*!< Bit mask of PSEL field. */ +#define COMP_PSEL_PSEL_AnalogInput0 (0UL) /*!< AIN0 selected as analog input */ +#define COMP_PSEL_PSEL_AnalogInput1 (1UL) /*!< AIN1 selected as analog input */ +#define COMP_PSEL_PSEL_AnalogInput2 (2UL) /*!< AIN2 selected as analog input */ +#define COMP_PSEL_PSEL_AnalogInput3 (3UL) /*!< AIN3 selected as analog input */ +#define COMP_PSEL_PSEL_AnalogInput4 (4UL) /*!< AIN4 selected as analog input */ +#define COMP_PSEL_PSEL_AnalogInput5 (5UL) /*!< AIN5 selected as analog input */ +#define COMP_PSEL_PSEL_AnalogInput6 (6UL) /*!< AIN6 selected as analog input */ +#define COMP_PSEL_PSEL_AnalogInput7 (7UL) /*!< AIN7 selected as analog input */ + +/* Register: COMP_REFSEL */ +/* Description: Reference source select for single-ended mode */ + +/* Bits 2..0 : Reference select */ +#define COMP_REFSEL_REFSEL_Pos (0UL) /*!< Position of REFSEL field. */ +#define COMP_REFSEL_REFSEL_Msk (0x7UL << COMP_REFSEL_REFSEL_Pos) /*!< Bit mask of REFSEL field. */ +#define COMP_REFSEL_REFSEL_Int1V2 (0UL) /*!< VREF = internal 1.2 V reference (VDD >= 1.7 V) */ +#define COMP_REFSEL_REFSEL_Int1V8 (1UL) /*!< VREF = internal 1.8 V reference (VDD >= VREF + 0.2 V) */ +#define COMP_REFSEL_REFSEL_Int2V4 (2UL) /*!< VREF = internal 2.4 V reference (VDD >= VREF + 0.2 V) */ +#define COMP_REFSEL_REFSEL_VDD (4UL) /*!< VREF = VDD */ +#define COMP_REFSEL_REFSEL_ARef (5UL) /*!< VREF = AREF (VDD >= VREF >= AREFMIN) */ + +/* Register: COMP_EXTREFSEL */ +/* Description: External reference select */ + +/* Bits 2..0 : External analog reference select */ +#define COMP_EXTREFSEL_EXTREFSEL_Pos (0UL) /*!< Position of EXTREFSEL field. */ +#define COMP_EXTREFSEL_EXTREFSEL_Msk (0x7UL << COMP_EXTREFSEL_EXTREFSEL_Pos) /*!< Bit mask of EXTREFSEL field. */ +#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference0 (0UL) /*!< Use AIN0 as external analog reference */ +#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference1 (1UL) /*!< Use AIN1 as external analog reference */ +#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference2 (2UL) /*!< Use AIN2 as external analog reference */ +#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference3 (3UL) /*!< Use AIN3 as external analog reference */ +#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference4 (4UL) /*!< Use AIN4 as external analog reference */ +#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference5 (5UL) /*!< Use AIN5 as external analog reference */ +#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference6 (6UL) /*!< Use AIN6 as external analog reference */ +#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference7 (7UL) /*!< Use AIN7 as external analog reference */ + +/* Register: COMP_TH */ +/* Description: Threshold configuration for hysteresis unit */ + +/* Bits 13..8 : VUP = (THUP+1)/64*VREF */ +#define COMP_TH_THUP_Pos (8UL) /*!< Position of THUP field. */ +#define COMP_TH_THUP_Msk (0x3FUL << COMP_TH_THUP_Pos) /*!< Bit mask of THUP field. */ + +/* Bits 5..0 : VDOWN = (THDOWN+1)/64*VREF */ +#define COMP_TH_THDOWN_Pos (0UL) /*!< Position of THDOWN field. */ +#define COMP_TH_THDOWN_Msk (0x3FUL << COMP_TH_THDOWN_Pos) /*!< Bit mask of THDOWN field. */ + +/* Register: COMP_MODE */ +/* Description: Mode configuration */ + +/* Bit 8 : Main operation modes */ +#define COMP_MODE_MAIN_Pos (8UL) /*!< Position of MAIN field. */ +#define COMP_MODE_MAIN_Msk (0x1UL << COMP_MODE_MAIN_Pos) /*!< Bit mask of MAIN field. */ +#define COMP_MODE_MAIN_SE (0UL) /*!< Single-ended mode */ +#define COMP_MODE_MAIN_Diff (1UL) /*!< Differential mode */ + +/* Bits 1..0 : Speed and power modes */ +#define COMP_MODE_SP_Pos (0UL) /*!< Position of SP field. */ +#define COMP_MODE_SP_Msk (0x3UL << COMP_MODE_SP_Pos) /*!< Bit mask of SP field. */ +#define COMP_MODE_SP_Low (0UL) /*!< Low-power mode */ +#define COMP_MODE_SP_Normal (1UL) /*!< Normal mode */ +#define COMP_MODE_SP_High (2UL) /*!< High-speed mode */ + +/* Register: COMP_HYST */ +/* Description: Comparator hysteresis enable */ + +/* Bit 0 : Comparator hysteresis */ +#define COMP_HYST_HYST_Pos (0UL) /*!< Position of HYST field. */ +#define COMP_HYST_HYST_Msk (0x1UL << COMP_HYST_HYST_Pos) /*!< Bit mask of HYST field. */ +#define COMP_HYST_HYST_NoHyst (0UL) /*!< Comparator hysteresis disabled */ +#define COMP_HYST_HYST_Hyst50mV (1UL) /*!< Comparator hysteresis enabled */ + + +/* Peripheral: CRYPTOCELL */ +/* Description: ARM TrustZone CryptoCell register interface */ + +/* Register: CRYPTOCELL_ENABLE */ +/* Description: Enable CRYPTOCELL subsystem */ + +/* Bit 0 : Enable or disable the CRYPTOCELL subsystem */ +#define CRYPTOCELL_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define CRYPTOCELL_ENABLE_ENABLE_Msk (0x1UL << CRYPTOCELL_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define CRYPTOCELL_ENABLE_ENABLE_Disabled (0UL) /*!< CRYPTOCELL subsystem disabled */ +#define CRYPTOCELL_ENABLE_ENABLE_Enabled (1UL) /*!< CRYPTOCELL subsystem enabled */ + + +/* Peripheral: ECB */ +/* Description: AES ECB Mode Encryption */ + +/* Register: ECB_TASKS_STARTECB */ +/* Description: Start ECB block encrypt */ + +/* Bit 0 : */ +#define ECB_TASKS_STARTECB_TASKS_STARTECB_Pos (0UL) /*!< Position of TASKS_STARTECB field. */ +#define ECB_TASKS_STARTECB_TASKS_STARTECB_Msk (0x1UL << ECB_TASKS_STARTECB_TASKS_STARTECB_Pos) /*!< Bit mask of TASKS_STARTECB field. */ + +/* Register: ECB_TASKS_STOPECB */ +/* Description: Abort a possible executing ECB operation */ + +/* Bit 0 : */ +#define ECB_TASKS_STOPECB_TASKS_STOPECB_Pos (0UL) /*!< Position of TASKS_STOPECB field. */ +#define ECB_TASKS_STOPECB_TASKS_STOPECB_Msk (0x1UL << ECB_TASKS_STOPECB_TASKS_STOPECB_Pos) /*!< Bit mask of TASKS_STOPECB field. */ + +/* Register: ECB_EVENTS_ENDECB */ +/* Description: ECB block encrypt complete */ + +/* Bit 0 : */ +#define ECB_EVENTS_ENDECB_EVENTS_ENDECB_Pos (0UL) /*!< Position of EVENTS_ENDECB field. */ +#define ECB_EVENTS_ENDECB_EVENTS_ENDECB_Msk (0x1UL << ECB_EVENTS_ENDECB_EVENTS_ENDECB_Pos) /*!< Bit mask of EVENTS_ENDECB field. */ + +/* Register: ECB_EVENTS_ERRORECB */ +/* Description: ECB block encrypt aborted because of a STOPECB task or due to an error */ + +/* Bit 0 : */ +#define ECB_EVENTS_ERRORECB_EVENTS_ERRORECB_Pos (0UL) /*!< Position of EVENTS_ERRORECB field. */ +#define ECB_EVENTS_ERRORECB_EVENTS_ERRORECB_Msk (0x1UL << ECB_EVENTS_ERRORECB_EVENTS_ERRORECB_Pos) /*!< Bit mask of EVENTS_ERRORECB field. */ + +/* Register: ECB_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 1 : Write '1' to enable interrupt for ERRORECB event */ +#define ECB_INTENSET_ERRORECB_Pos (1UL) /*!< Position of ERRORECB field. */ +#define ECB_INTENSET_ERRORECB_Msk (0x1UL << ECB_INTENSET_ERRORECB_Pos) /*!< Bit mask of ERRORECB field. */ +#define ECB_INTENSET_ERRORECB_Disabled (0UL) /*!< Read: Disabled */ +#define ECB_INTENSET_ERRORECB_Enabled (1UL) /*!< Read: Enabled */ +#define ECB_INTENSET_ERRORECB_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to enable interrupt for ENDECB event */ +#define ECB_INTENSET_ENDECB_Pos (0UL) /*!< Position of ENDECB field. */ +#define ECB_INTENSET_ENDECB_Msk (0x1UL << ECB_INTENSET_ENDECB_Pos) /*!< Bit mask of ENDECB field. */ +#define ECB_INTENSET_ENDECB_Disabled (0UL) /*!< Read: Disabled */ +#define ECB_INTENSET_ENDECB_Enabled (1UL) /*!< Read: Enabled */ +#define ECB_INTENSET_ENDECB_Set (1UL) /*!< Enable */ + +/* Register: ECB_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 1 : Write '1' to disable interrupt for ERRORECB event */ +#define ECB_INTENCLR_ERRORECB_Pos (1UL) /*!< Position of ERRORECB field. */ +#define ECB_INTENCLR_ERRORECB_Msk (0x1UL << ECB_INTENCLR_ERRORECB_Pos) /*!< Bit mask of ERRORECB field. */ +#define ECB_INTENCLR_ERRORECB_Disabled (0UL) /*!< Read: Disabled */ +#define ECB_INTENCLR_ERRORECB_Enabled (1UL) /*!< Read: Enabled */ +#define ECB_INTENCLR_ERRORECB_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to disable interrupt for ENDECB event */ +#define ECB_INTENCLR_ENDECB_Pos (0UL) /*!< Position of ENDECB field. */ +#define ECB_INTENCLR_ENDECB_Msk (0x1UL << ECB_INTENCLR_ENDECB_Pos) /*!< Bit mask of ENDECB field. */ +#define ECB_INTENCLR_ENDECB_Disabled (0UL) /*!< Read: Disabled */ +#define ECB_INTENCLR_ENDECB_Enabled (1UL) /*!< Read: Enabled */ +#define ECB_INTENCLR_ENDECB_Clear (1UL) /*!< Disable */ + +/* Register: ECB_ECBDATAPTR */ +/* Description: ECB block encrypt memory pointers */ + +/* Bits 31..0 : Pointer to the ECB data structure (see Table 1 ECB data structure overview) */ +#define ECB_ECBDATAPTR_ECBDATAPTR_Pos (0UL) /*!< Position of ECBDATAPTR field. */ +#define ECB_ECBDATAPTR_ECBDATAPTR_Msk (0xFFFFFFFFUL << ECB_ECBDATAPTR_ECBDATAPTR_Pos) /*!< Bit mask of ECBDATAPTR field. */ + + +/* Peripheral: EGU */ +/* Description: Event Generator Unit 0 */ + +/* Register: EGU_TASKS_TRIGGER */ +/* Description: Description collection[n]: Trigger n for triggering the corresponding TRIGGERED[n] event */ + +/* Bit 0 : */ +#define EGU_TASKS_TRIGGER_TASKS_TRIGGER_Pos (0UL) /*!< Position of TASKS_TRIGGER field. */ +#define EGU_TASKS_TRIGGER_TASKS_TRIGGER_Msk (0x1UL << EGU_TASKS_TRIGGER_TASKS_TRIGGER_Pos) /*!< Bit mask of TASKS_TRIGGER field. */ + +/* Register: EGU_EVENTS_TRIGGERED */ +/* Description: Description collection[n]: Event number n generated by triggering the corresponding TRIGGER[n] task */ + +/* Bit 0 : */ +#define EGU_EVENTS_TRIGGERED_EVENTS_TRIGGERED_Pos (0UL) /*!< Position of EVENTS_TRIGGERED field. */ +#define EGU_EVENTS_TRIGGERED_EVENTS_TRIGGERED_Msk (0x1UL << EGU_EVENTS_TRIGGERED_EVENTS_TRIGGERED_Pos) /*!< Bit mask of EVENTS_TRIGGERED field. */ + +/* Register: EGU_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 15 : Enable or disable interrupt for TRIGGERED[15] event */ +#define EGU_INTEN_TRIGGERED15_Pos (15UL) /*!< Position of TRIGGERED15 field. */ +#define EGU_INTEN_TRIGGERED15_Msk (0x1UL << EGU_INTEN_TRIGGERED15_Pos) /*!< Bit mask of TRIGGERED15 field. */ +#define EGU_INTEN_TRIGGERED15_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED15_Enabled (1UL) /*!< Enable */ + +/* Bit 14 : Enable or disable interrupt for TRIGGERED[14] event */ +#define EGU_INTEN_TRIGGERED14_Pos (14UL) /*!< Position of TRIGGERED14 field. */ +#define EGU_INTEN_TRIGGERED14_Msk (0x1UL << EGU_INTEN_TRIGGERED14_Pos) /*!< Bit mask of TRIGGERED14 field. */ +#define EGU_INTEN_TRIGGERED14_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED14_Enabled (1UL) /*!< Enable */ + +/* Bit 13 : Enable or disable interrupt for TRIGGERED[13] event */ +#define EGU_INTEN_TRIGGERED13_Pos (13UL) /*!< Position of TRIGGERED13 field. */ +#define EGU_INTEN_TRIGGERED13_Msk (0x1UL << EGU_INTEN_TRIGGERED13_Pos) /*!< Bit mask of TRIGGERED13 field. */ +#define EGU_INTEN_TRIGGERED13_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED13_Enabled (1UL) /*!< Enable */ + +/* Bit 12 : Enable or disable interrupt for TRIGGERED[12] event */ +#define EGU_INTEN_TRIGGERED12_Pos (12UL) /*!< Position of TRIGGERED12 field. */ +#define EGU_INTEN_TRIGGERED12_Msk (0x1UL << EGU_INTEN_TRIGGERED12_Pos) /*!< Bit mask of TRIGGERED12 field. */ +#define EGU_INTEN_TRIGGERED12_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED12_Enabled (1UL) /*!< Enable */ + +/* Bit 11 : Enable or disable interrupt for TRIGGERED[11] event */ +#define EGU_INTEN_TRIGGERED11_Pos (11UL) /*!< Position of TRIGGERED11 field. */ +#define EGU_INTEN_TRIGGERED11_Msk (0x1UL << EGU_INTEN_TRIGGERED11_Pos) /*!< Bit mask of TRIGGERED11 field. */ +#define EGU_INTEN_TRIGGERED11_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED11_Enabled (1UL) /*!< Enable */ + +/* Bit 10 : Enable or disable interrupt for TRIGGERED[10] event */ +#define EGU_INTEN_TRIGGERED10_Pos (10UL) /*!< Position of TRIGGERED10 field. */ +#define EGU_INTEN_TRIGGERED10_Msk (0x1UL << EGU_INTEN_TRIGGERED10_Pos) /*!< Bit mask of TRIGGERED10 field. */ +#define EGU_INTEN_TRIGGERED10_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED10_Enabled (1UL) /*!< Enable */ + +/* Bit 9 : Enable or disable interrupt for TRIGGERED[9] event */ +#define EGU_INTEN_TRIGGERED9_Pos (9UL) /*!< Position of TRIGGERED9 field. */ +#define EGU_INTEN_TRIGGERED9_Msk (0x1UL << EGU_INTEN_TRIGGERED9_Pos) /*!< Bit mask of TRIGGERED9 field. */ +#define EGU_INTEN_TRIGGERED9_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED9_Enabled (1UL) /*!< Enable */ + +/* Bit 8 : Enable or disable interrupt for TRIGGERED[8] event */ +#define EGU_INTEN_TRIGGERED8_Pos (8UL) /*!< Position of TRIGGERED8 field. */ +#define EGU_INTEN_TRIGGERED8_Msk (0x1UL << EGU_INTEN_TRIGGERED8_Pos) /*!< Bit mask of TRIGGERED8 field. */ +#define EGU_INTEN_TRIGGERED8_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED8_Enabled (1UL) /*!< Enable */ + +/* Bit 7 : Enable or disable interrupt for TRIGGERED[7] event */ +#define EGU_INTEN_TRIGGERED7_Pos (7UL) /*!< Position of TRIGGERED7 field. */ +#define EGU_INTEN_TRIGGERED7_Msk (0x1UL << EGU_INTEN_TRIGGERED7_Pos) /*!< Bit mask of TRIGGERED7 field. */ +#define EGU_INTEN_TRIGGERED7_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED7_Enabled (1UL) /*!< Enable */ + +/* Bit 6 : Enable or disable interrupt for TRIGGERED[6] event */ +#define EGU_INTEN_TRIGGERED6_Pos (6UL) /*!< Position of TRIGGERED6 field. */ +#define EGU_INTEN_TRIGGERED6_Msk (0x1UL << EGU_INTEN_TRIGGERED6_Pos) /*!< Bit mask of TRIGGERED6 field. */ +#define EGU_INTEN_TRIGGERED6_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED6_Enabled (1UL) /*!< Enable */ + +/* Bit 5 : Enable or disable interrupt for TRIGGERED[5] event */ +#define EGU_INTEN_TRIGGERED5_Pos (5UL) /*!< Position of TRIGGERED5 field. */ +#define EGU_INTEN_TRIGGERED5_Msk (0x1UL << EGU_INTEN_TRIGGERED5_Pos) /*!< Bit mask of TRIGGERED5 field. */ +#define EGU_INTEN_TRIGGERED5_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED5_Enabled (1UL) /*!< Enable */ + +/* Bit 4 : Enable or disable interrupt for TRIGGERED[4] event */ +#define EGU_INTEN_TRIGGERED4_Pos (4UL) /*!< Position of TRIGGERED4 field. */ +#define EGU_INTEN_TRIGGERED4_Msk (0x1UL << EGU_INTEN_TRIGGERED4_Pos) /*!< Bit mask of TRIGGERED4 field. */ +#define EGU_INTEN_TRIGGERED4_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED4_Enabled (1UL) /*!< Enable */ + +/* Bit 3 : Enable or disable interrupt for TRIGGERED[3] event */ +#define EGU_INTEN_TRIGGERED3_Pos (3UL) /*!< Position of TRIGGERED3 field. */ +#define EGU_INTEN_TRIGGERED3_Msk (0x1UL << EGU_INTEN_TRIGGERED3_Pos) /*!< Bit mask of TRIGGERED3 field. */ +#define EGU_INTEN_TRIGGERED3_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED3_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable interrupt for TRIGGERED[2] event */ +#define EGU_INTEN_TRIGGERED2_Pos (2UL) /*!< Position of TRIGGERED2 field. */ +#define EGU_INTEN_TRIGGERED2_Msk (0x1UL << EGU_INTEN_TRIGGERED2_Pos) /*!< Bit mask of TRIGGERED2 field. */ +#define EGU_INTEN_TRIGGERED2_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED2_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for TRIGGERED[1] event */ +#define EGU_INTEN_TRIGGERED1_Pos (1UL) /*!< Position of TRIGGERED1 field. */ +#define EGU_INTEN_TRIGGERED1_Msk (0x1UL << EGU_INTEN_TRIGGERED1_Pos) /*!< Bit mask of TRIGGERED1 field. */ +#define EGU_INTEN_TRIGGERED1_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED1_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable interrupt for TRIGGERED[0] event */ +#define EGU_INTEN_TRIGGERED0_Pos (0UL) /*!< Position of TRIGGERED0 field. */ +#define EGU_INTEN_TRIGGERED0_Msk (0x1UL << EGU_INTEN_TRIGGERED0_Pos) /*!< Bit mask of TRIGGERED0 field. */ +#define EGU_INTEN_TRIGGERED0_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED0_Enabled (1UL) /*!< Enable */ + +/* Register: EGU_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 15 : Write '1' to enable interrupt for TRIGGERED[15] event */ +#define EGU_INTENSET_TRIGGERED15_Pos (15UL) /*!< Position of TRIGGERED15 field. */ +#define EGU_INTENSET_TRIGGERED15_Msk (0x1UL << EGU_INTENSET_TRIGGERED15_Pos) /*!< Bit mask of TRIGGERED15 field. */ +#define EGU_INTENSET_TRIGGERED15_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED15_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED15_Set (1UL) /*!< Enable */ + +/* Bit 14 : Write '1' to enable interrupt for TRIGGERED[14] event */ +#define EGU_INTENSET_TRIGGERED14_Pos (14UL) /*!< Position of TRIGGERED14 field. */ +#define EGU_INTENSET_TRIGGERED14_Msk (0x1UL << EGU_INTENSET_TRIGGERED14_Pos) /*!< Bit mask of TRIGGERED14 field. */ +#define EGU_INTENSET_TRIGGERED14_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED14_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED14_Set (1UL) /*!< Enable */ + +/* Bit 13 : Write '1' to enable interrupt for TRIGGERED[13] event */ +#define EGU_INTENSET_TRIGGERED13_Pos (13UL) /*!< Position of TRIGGERED13 field. */ +#define EGU_INTENSET_TRIGGERED13_Msk (0x1UL << EGU_INTENSET_TRIGGERED13_Pos) /*!< Bit mask of TRIGGERED13 field. */ +#define EGU_INTENSET_TRIGGERED13_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED13_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED13_Set (1UL) /*!< Enable */ + +/* Bit 12 : Write '1' to enable interrupt for TRIGGERED[12] event */ +#define EGU_INTENSET_TRIGGERED12_Pos (12UL) /*!< Position of TRIGGERED12 field. */ +#define EGU_INTENSET_TRIGGERED12_Msk (0x1UL << EGU_INTENSET_TRIGGERED12_Pos) /*!< Bit mask of TRIGGERED12 field. */ +#define EGU_INTENSET_TRIGGERED12_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED12_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED12_Set (1UL) /*!< Enable */ + +/* Bit 11 : Write '1' to enable interrupt for TRIGGERED[11] event */ +#define EGU_INTENSET_TRIGGERED11_Pos (11UL) /*!< Position of TRIGGERED11 field. */ +#define EGU_INTENSET_TRIGGERED11_Msk (0x1UL << EGU_INTENSET_TRIGGERED11_Pos) /*!< Bit mask of TRIGGERED11 field. */ +#define EGU_INTENSET_TRIGGERED11_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED11_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED11_Set (1UL) /*!< Enable */ + +/* Bit 10 : Write '1' to enable interrupt for TRIGGERED[10] event */ +#define EGU_INTENSET_TRIGGERED10_Pos (10UL) /*!< Position of TRIGGERED10 field. */ +#define EGU_INTENSET_TRIGGERED10_Msk (0x1UL << EGU_INTENSET_TRIGGERED10_Pos) /*!< Bit mask of TRIGGERED10 field. */ +#define EGU_INTENSET_TRIGGERED10_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED10_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED10_Set (1UL) /*!< Enable */ + +/* Bit 9 : Write '1' to enable interrupt for TRIGGERED[9] event */ +#define EGU_INTENSET_TRIGGERED9_Pos (9UL) /*!< Position of TRIGGERED9 field. */ +#define EGU_INTENSET_TRIGGERED9_Msk (0x1UL << EGU_INTENSET_TRIGGERED9_Pos) /*!< Bit mask of TRIGGERED9 field. */ +#define EGU_INTENSET_TRIGGERED9_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED9_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED9_Set (1UL) /*!< Enable */ + +/* Bit 8 : Write '1' to enable interrupt for TRIGGERED[8] event */ +#define EGU_INTENSET_TRIGGERED8_Pos (8UL) /*!< Position of TRIGGERED8 field. */ +#define EGU_INTENSET_TRIGGERED8_Msk (0x1UL << EGU_INTENSET_TRIGGERED8_Pos) /*!< Bit mask of TRIGGERED8 field. */ +#define EGU_INTENSET_TRIGGERED8_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED8_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED8_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to enable interrupt for TRIGGERED[7] event */ +#define EGU_INTENSET_TRIGGERED7_Pos (7UL) /*!< Position of TRIGGERED7 field. */ +#define EGU_INTENSET_TRIGGERED7_Msk (0x1UL << EGU_INTENSET_TRIGGERED7_Pos) /*!< Bit mask of TRIGGERED7 field. */ +#define EGU_INTENSET_TRIGGERED7_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED7_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED7_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to enable interrupt for TRIGGERED[6] event */ +#define EGU_INTENSET_TRIGGERED6_Pos (6UL) /*!< Position of TRIGGERED6 field. */ +#define EGU_INTENSET_TRIGGERED6_Msk (0x1UL << EGU_INTENSET_TRIGGERED6_Pos) /*!< Bit mask of TRIGGERED6 field. */ +#define EGU_INTENSET_TRIGGERED6_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED6_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED6_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to enable interrupt for TRIGGERED[5] event */ +#define EGU_INTENSET_TRIGGERED5_Pos (5UL) /*!< Position of TRIGGERED5 field. */ +#define EGU_INTENSET_TRIGGERED5_Msk (0x1UL << EGU_INTENSET_TRIGGERED5_Pos) /*!< Bit mask of TRIGGERED5 field. */ +#define EGU_INTENSET_TRIGGERED5_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED5_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED5_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to enable interrupt for TRIGGERED[4] event */ +#define EGU_INTENSET_TRIGGERED4_Pos (4UL) /*!< Position of TRIGGERED4 field. */ +#define EGU_INTENSET_TRIGGERED4_Msk (0x1UL << EGU_INTENSET_TRIGGERED4_Pos) /*!< Bit mask of TRIGGERED4 field. */ +#define EGU_INTENSET_TRIGGERED4_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED4_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED4_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to enable interrupt for TRIGGERED[3] event */ +#define EGU_INTENSET_TRIGGERED3_Pos (3UL) /*!< Position of TRIGGERED3 field. */ +#define EGU_INTENSET_TRIGGERED3_Msk (0x1UL << EGU_INTENSET_TRIGGERED3_Pos) /*!< Bit mask of TRIGGERED3 field. */ +#define EGU_INTENSET_TRIGGERED3_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED3_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED3_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to enable interrupt for TRIGGERED[2] event */ +#define EGU_INTENSET_TRIGGERED2_Pos (2UL) /*!< Position of TRIGGERED2 field. */ +#define EGU_INTENSET_TRIGGERED2_Msk (0x1UL << EGU_INTENSET_TRIGGERED2_Pos) /*!< Bit mask of TRIGGERED2 field. */ +#define EGU_INTENSET_TRIGGERED2_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED2_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED2_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable interrupt for TRIGGERED[1] event */ +#define EGU_INTENSET_TRIGGERED1_Pos (1UL) /*!< Position of TRIGGERED1 field. */ +#define EGU_INTENSET_TRIGGERED1_Msk (0x1UL << EGU_INTENSET_TRIGGERED1_Pos) /*!< Bit mask of TRIGGERED1 field. */ +#define EGU_INTENSET_TRIGGERED1_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED1_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED1_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to enable interrupt for TRIGGERED[0] event */ +#define EGU_INTENSET_TRIGGERED0_Pos (0UL) /*!< Position of TRIGGERED0 field. */ +#define EGU_INTENSET_TRIGGERED0_Msk (0x1UL << EGU_INTENSET_TRIGGERED0_Pos) /*!< Bit mask of TRIGGERED0 field. */ +#define EGU_INTENSET_TRIGGERED0_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED0_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED0_Set (1UL) /*!< Enable */ + +/* Register: EGU_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 15 : Write '1' to disable interrupt for TRIGGERED[15] event */ +#define EGU_INTENCLR_TRIGGERED15_Pos (15UL) /*!< Position of TRIGGERED15 field. */ +#define EGU_INTENCLR_TRIGGERED15_Msk (0x1UL << EGU_INTENCLR_TRIGGERED15_Pos) /*!< Bit mask of TRIGGERED15 field. */ +#define EGU_INTENCLR_TRIGGERED15_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED15_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED15_Clear (1UL) /*!< Disable */ + +/* Bit 14 : Write '1' to disable interrupt for TRIGGERED[14] event */ +#define EGU_INTENCLR_TRIGGERED14_Pos (14UL) /*!< Position of TRIGGERED14 field. */ +#define EGU_INTENCLR_TRIGGERED14_Msk (0x1UL << EGU_INTENCLR_TRIGGERED14_Pos) /*!< Bit mask of TRIGGERED14 field. */ +#define EGU_INTENCLR_TRIGGERED14_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED14_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED14_Clear (1UL) /*!< Disable */ + +/* Bit 13 : Write '1' to disable interrupt for TRIGGERED[13] event */ +#define EGU_INTENCLR_TRIGGERED13_Pos (13UL) /*!< Position of TRIGGERED13 field. */ +#define EGU_INTENCLR_TRIGGERED13_Msk (0x1UL << EGU_INTENCLR_TRIGGERED13_Pos) /*!< Bit mask of TRIGGERED13 field. */ +#define EGU_INTENCLR_TRIGGERED13_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED13_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED13_Clear (1UL) /*!< Disable */ + +/* Bit 12 : Write '1' to disable interrupt for TRIGGERED[12] event */ +#define EGU_INTENCLR_TRIGGERED12_Pos (12UL) /*!< Position of TRIGGERED12 field. */ +#define EGU_INTENCLR_TRIGGERED12_Msk (0x1UL << EGU_INTENCLR_TRIGGERED12_Pos) /*!< Bit mask of TRIGGERED12 field. */ +#define EGU_INTENCLR_TRIGGERED12_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED12_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED12_Clear (1UL) /*!< Disable */ + +/* Bit 11 : Write '1' to disable interrupt for TRIGGERED[11] event */ +#define EGU_INTENCLR_TRIGGERED11_Pos (11UL) /*!< Position of TRIGGERED11 field. */ +#define EGU_INTENCLR_TRIGGERED11_Msk (0x1UL << EGU_INTENCLR_TRIGGERED11_Pos) /*!< Bit mask of TRIGGERED11 field. */ +#define EGU_INTENCLR_TRIGGERED11_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED11_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED11_Clear (1UL) /*!< Disable */ + +/* Bit 10 : Write '1' to disable interrupt for TRIGGERED[10] event */ +#define EGU_INTENCLR_TRIGGERED10_Pos (10UL) /*!< Position of TRIGGERED10 field. */ +#define EGU_INTENCLR_TRIGGERED10_Msk (0x1UL << EGU_INTENCLR_TRIGGERED10_Pos) /*!< Bit mask of TRIGGERED10 field. */ +#define EGU_INTENCLR_TRIGGERED10_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED10_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED10_Clear (1UL) /*!< Disable */ + +/* Bit 9 : Write '1' to disable interrupt for TRIGGERED[9] event */ +#define EGU_INTENCLR_TRIGGERED9_Pos (9UL) /*!< Position of TRIGGERED9 field. */ +#define EGU_INTENCLR_TRIGGERED9_Msk (0x1UL << EGU_INTENCLR_TRIGGERED9_Pos) /*!< Bit mask of TRIGGERED9 field. */ +#define EGU_INTENCLR_TRIGGERED9_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED9_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED9_Clear (1UL) /*!< Disable */ + +/* Bit 8 : Write '1' to disable interrupt for TRIGGERED[8] event */ +#define EGU_INTENCLR_TRIGGERED8_Pos (8UL) /*!< Position of TRIGGERED8 field. */ +#define EGU_INTENCLR_TRIGGERED8_Msk (0x1UL << EGU_INTENCLR_TRIGGERED8_Pos) /*!< Bit mask of TRIGGERED8 field. */ +#define EGU_INTENCLR_TRIGGERED8_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED8_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED8_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to disable interrupt for TRIGGERED[7] event */ +#define EGU_INTENCLR_TRIGGERED7_Pos (7UL) /*!< Position of TRIGGERED7 field. */ +#define EGU_INTENCLR_TRIGGERED7_Msk (0x1UL << EGU_INTENCLR_TRIGGERED7_Pos) /*!< Bit mask of TRIGGERED7 field. */ +#define EGU_INTENCLR_TRIGGERED7_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED7_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED7_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to disable interrupt for TRIGGERED[6] event */ +#define EGU_INTENCLR_TRIGGERED6_Pos (6UL) /*!< Position of TRIGGERED6 field. */ +#define EGU_INTENCLR_TRIGGERED6_Msk (0x1UL << EGU_INTENCLR_TRIGGERED6_Pos) /*!< Bit mask of TRIGGERED6 field. */ +#define EGU_INTENCLR_TRIGGERED6_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED6_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED6_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to disable interrupt for TRIGGERED[5] event */ +#define EGU_INTENCLR_TRIGGERED5_Pos (5UL) /*!< Position of TRIGGERED5 field. */ +#define EGU_INTENCLR_TRIGGERED5_Msk (0x1UL << EGU_INTENCLR_TRIGGERED5_Pos) /*!< Bit mask of TRIGGERED5 field. */ +#define EGU_INTENCLR_TRIGGERED5_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED5_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED5_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to disable interrupt for TRIGGERED[4] event */ +#define EGU_INTENCLR_TRIGGERED4_Pos (4UL) /*!< Position of TRIGGERED4 field. */ +#define EGU_INTENCLR_TRIGGERED4_Msk (0x1UL << EGU_INTENCLR_TRIGGERED4_Pos) /*!< Bit mask of TRIGGERED4 field. */ +#define EGU_INTENCLR_TRIGGERED4_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED4_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED4_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to disable interrupt for TRIGGERED[3] event */ +#define EGU_INTENCLR_TRIGGERED3_Pos (3UL) /*!< Position of TRIGGERED3 field. */ +#define EGU_INTENCLR_TRIGGERED3_Msk (0x1UL << EGU_INTENCLR_TRIGGERED3_Pos) /*!< Bit mask of TRIGGERED3 field. */ +#define EGU_INTENCLR_TRIGGERED3_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED3_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED3_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to disable interrupt for TRIGGERED[2] event */ +#define EGU_INTENCLR_TRIGGERED2_Pos (2UL) /*!< Position of TRIGGERED2 field. */ +#define EGU_INTENCLR_TRIGGERED2_Msk (0x1UL << EGU_INTENCLR_TRIGGERED2_Pos) /*!< Bit mask of TRIGGERED2 field. */ +#define EGU_INTENCLR_TRIGGERED2_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED2_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED2_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable interrupt for TRIGGERED[1] event */ +#define EGU_INTENCLR_TRIGGERED1_Pos (1UL) /*!< Position of TRIGGERED1 field. */ +#define EGU_INTENCLR_TRIGGERED1_Msk (0x1UL << EGU_INTENCLR_TRIGGERED1_Pos) /*!< Bit mask of TRIGGERED1 field. */ +#define EGU_INTENCLR_TRIGGERED1_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED1_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED1_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to disable interrupt for TRIGGERED[0] event */ +#define EGU_INTENCLR_TRIGGERED0_Pos (0UL) /*!< Position of TRIGGERED0 field. */ +#define EGU_INTENCLR_TRIGGERED0_Msk (0x1UL << EGU_INTENCLR_TRIGGERED0_Pos) /*!< Bit mask of TRIGGERED0 field. */ +#define EGU_INTENCLR_TRIGGERED0_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED0_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED0_Clear (1UL) /*!< Disable */ + + +/* Peripheral: FICR */ +/* Description: Factory information configuration registers */ + +/* Register: FICR_CODEPAGESIZE */ +/* Description: Code memory page size */ + +/* Bits 31..0 : Code memory page size */ +#define FICR_CODEPAGESIZE_CODEPAGESIZE_Pos (0UL) /*!< Position of CODEPAGESIZE field. */ +#define FICR_CODEPAGESIZE_CODEPAGESIZE_Msk (0xFFFFFFFFUL << FICR_CODEPAGESIZE_CODEPAGESIZE_Pos) /*!< Bit mask of CODEPAGESIZE field. */ + +/* Register: FICR_CODESIZE */ +/* Description: Code memory size */ + +/* Bits 31..0 : Code memory size in number of pages */ +#define FICR_CODESIZE_CODESIZE_Pos (0UL) /*!< Position of CODESIZE field. */ +#define FICR_CODESIZE_CODESIZE_Msk (0xFFFFFFFFUL << FICR_CODESIZE_CODESIZE_Pos) /*!< Bit mask of CODESIZE field. */ + +/* Register: FICR_DEVICEID */ +/* Description: Description collection[n]: Device identifier */ + +/* Bits 31..0 : 64 bit unique device identifier */ +#define FICR_DEVICEID_DEVICEID_Pos (0UL) /*!< Position of DEVICEID field. */ +#define FICR_DEVICEID_DEVICEID_Msk (0xFFFFFFFFUL << FICR_DEVICEID_DEVICEID_Pos) /*!< Bit mask of DEVICEID field. */ + +/* Register: FICR_ER */ +/* Description: Description collection[n]: Encryption root, word n */ + +/* Bits 31..0 : Encryption root, word n */ +#define FICR_ER_ER_Pos (0UL) /*!< Position of ER field. */ +#define FICR_ER_ER_Msk (0xFFFFFFFFUL << FICR_ER_ER_Pos) /*!< Bit mask of ER field. */ + +/* Register: FICR_IR */ +/* Description: Description collection[n]: Identity Root, word n */ + +/* Bits 31..0 : Identity Root, word n */ +#define FICR_IR_IR_Pos (0UL) /*!< Position of IR field. */ +#define FICR_IR_IR_Msk (0xFFFFFFFFUL << FICR_IR_IR_Pos) /*!< Bit mask of IR field. */ + +/* Register: FICR_DEVICEADDRTYPE */ +/* Description: Device address type */ + +/* Bit 0 : Device address type */ +#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Pos (0UL) /*!< Position of DEVICEADDRTYPE field. */ +#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Msk (0x1UL << FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Pos) /*!< Bit mask of DEVICEADDRTYPE field. */ +#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Public (0UL) /*!< Public address */ +#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Random (1UL) /*!< Random address */ + +/* Register: FICR_DEVICEADDR */ +/* Description: Description collection[n]: Device address n */ + +/* Bits 31..0 : 48 bit device address */ +#define FICR_DEVICEADDR_DEVICEADDR_Pos (0UL) /*!< Position of DEVICEADDR field. */ +#define FICR_DEVICEADDR_DEVICEADDR_Msk (0xFFFFFFFFUL << FICR_DEVICEADDR_DEVICEADDR_Pos) /*!< Bit mask of DEVICEADDR field. */ + +/* Register: FICR_INFO_PART */ +/* Description: Part code */ + +/* Bits 31..0 : Part code */ +#define FICR_INFO_PART_PART_Pos (0UL) /*!< Position of PART field. */ +#define FICR_INFO_PART_PART_Msk (0xFFFFFFFFUL << FICR_INFO_PART_PART_Pos) /*!< Bit mask of PART field. */ +#define FICR_INFO_PART_PART_N52840 (0x52840UL) /*!< nRF52840 */ +#define FICR_INFO_PART_PART_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ + +/* Register: FICR_INFO_VARIANT */ +/* Description: Build code (hardware version and production configuration) */ + +/* Bits 31..0 : Build code (hardware version and production configuration). Encoded as ASCII. */ +#define FICR_INFO_VARIANT_VARIANT_Pos (0UL) /*!< Position of VARIANT field. */ +#define FICR_INFO_VARIANT_VARIANT_Msk (0xFFFFFFFFUL << FICR_INFO_VARIANT_VARIANT_Pos) /*!< Bit mask of VARIANT field. */ +#define FICR_INFO_VARIANT_VARIANT_AAAA (0x41414141UL) /*!< AAAA */ +#define FICR_INFO_VARIANT_VARIANT_AAAB (0x41414142UL) /*!< AAAB */ +#define FICR_INFO_VARIANT_VARIANT_AABA (0x41414241UL) /*!< AABA */ +#define FICR_INFO_VARIANT_VARIANT_AABB (0x41414242UL) /*!< AABB */ +#define FICR_INFO_VARIANT_VARIANT_AACA (0x41414341UL) /*!< AACA */ +#define FICR_INFO_VARIANT_VARIANT_BAAA (0x42414141UL) /*!< BAAA */ +#define FICR_INFO_VARIANT_VARIANT_CAAA (0x43414141UL) /*!< CAAA */ +#define FICR_INFO_VARIANT_VARIANT_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ + +/* Register: FICR_INFO_PACKAGE */ +/* Description: Package option */ + +/* Bits 31..0 : Package option */ +#define FICR_INFO_PACKAGE_PACKAGE_Pos (0UL) /*!< Position of PACKAGE field. */ +#define FICR_INFO_PACKAGE_PACKAGE_Msk (0xFFFFFFFFUL << FICR_INFO_PACKAGE_PACKAGE_Pos) /*!< Bit mask of PACKAGE field. */ +#define FICR_INFO_PACKAGE_PACKAGE_QI (0x2004UL) /*!< QIxx - 73-pin aQFN */ +#define FICR_INFO_PACKAGE_PACKAGE_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ + +/* Register: FICR_INFO_RAM */ +/* Description: RAM variant */ + +/* Bits 31..0 : RAM variant */ +#define FICR_INFO_RAM_RAM_Pos (0UL) /*!< Position of RAM field. */ +#define FICR_INFO_RAM_RAM_Msk (0xFFFFFFFFUL << FICR_INFO_RAM_RAM_Pos) /*!< Bit mask of RAM field. */ +#define FICR_INFO_RAM_RAM_K16 (0x10UL) /*!< 16 kByte RAM */ +#define FICR_INFO_RAM_RAM_K32 (0x20UL) /*!< 32 kByte RAM */ +#define FICR_INFO_RAM_RAM_K64 (0x40UL) /*!< 64 kByte RAM */ +#define FICR_INFO_RAM_RAM_K128 (0x80UL) /*!< 128 kByte RAM */ +#define FICR_INFO_RAM_RAM_K256 (0x100UL) /*!< 256 kByte RAM */ +#define FICR_INFO_RAM_RAM_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ + +/* Register: FICR_INFO_FLASH */ +/* Description: Flash variant */ + +/* Bits 31..0 : Flash variant */ +#define FICR_INFO_FLASH_FLASH_Pos (0UL) /*!< Position of FLASH field. */ +#define FICR_INFO_FLASH_FLASH_Msk (0xFFFFFFFFUL << FICR_INFO_FLASH_FLASH_Pos) /*!< Bit mask of FLASH field. */ +#define FICR_INFO_FLASH_FLASH_K128 (0x80UL) /*!< 128 kByte FLASH */ +#define FICR_INFO_FLASH_FLASH_K256 (0x100UL) /*!< 256 kByte FLASH */ +#define FICR_INFO_FLASH_FLASH_K512 (0x200UL) /*!< 512 kByte FLASH */ +#define FICR_INFO_FLASH_FLASH_K1024 (0x400UL) /*!< 1 MByte FLASH */ +#define FICR_INFO_FLASH_FLASH_K2048 (0x800UL) /*!< 2 MByte FLASH */ +#define FICR_INFO_FLASH_FLASH_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ + +/* Register: FICR_PRODTEST */ +/* Description: Description collection[n]: Production test signature n */ + +/* Bits 31..0 : Production test signature n */ +#define FICR_PRODTEST_PRODTEST_Pos (0UL) /*!< Position of PRODTEST field. */ +#define FICR_PRODTEST_PRODTEST_Msk (0xFFFFFFFFUL << FICR_PRODTEST_PRODTEST_Pos) /*!< Bit mask of PRODTEST field. */ +#define FICR_PRODTEST_PRODTEST_Done (0xBB42319FUL) /*!< Production tests done */ +#define FICR_PRODTEST_PRODTEST_NotDone (0xFFFFFFFFUL) /*!< Production tests not done */ + +/* Register: FICR_TEMP_A0 */ +/* Description: Slope definition A0 */ + +/* Bits 11..0 : A (slope definition) register. */ +#define FICR_TEMP_A0_A_Pos (0UL) /*!< Position of A field. */ +#define FICR_TEMP_A0_A_Msk (0xFFFUL << FICR_TEMP_A0_A_Pos) /*!< Bit mask of A field. */ + +/* Register: FICR_TEMP_A1 */ +/* Description: Slope definition A1 */ + +/* Bits 11..0 : A (slope definition) register. */ +#define FICR_TEMP_A1_A_Pos (0UL) /*!< Position of A field. */ +#define FICR_TEMP_A1_A_Msk (0xFFFUL << FICR_TEMP_A1_A_Pos) /*!< Bit mask of A field. */ + +/* Register: FICR_TEMP_A2 */ +/* Description: Slope definition A2 */ + +/* Bits 11..0 : A (slope definition) register. */ +#define FICR_TEMP_A2_A_Pos (0UL) /*!< Position of A field. */ +#define FICR_TEMP_A2_A_Msk (0xFFFUL << FICR_TEMP_A2_A_Pos) /*!< Bit mask of A field. */ + +/* Register: FICR_TEMP_A3 */ +/* Description: Slope definition A3 */ + +/* Bits 11..0 : A (slope definition) register. */ +#define FICR_TEMP_A3_A_Pos (0UL) /*!< Position of A field. */ +#define FICR_TEMP_A3_A_Msk (0xFFFUL << FICR_TEMP_A3_A_Pos) /*!< Bit mask of A field. */ + +/* Register: FICR_TEMP_A4 */ +/* Description: Slope definition A4 */ + +/* Bits 11..0 : A (slope definition) register. */ +#define FICR_TEMP_A4_A_Pos (0UL) /*!< Position of A field. */ +#define FICR_TEMP_A4_A_Msk (0xFFFUL << FICR_TEMP_A4_A_Pos) /*!< Bit mask of A field. */ + +/* Register: FICR_TEMP_A5 */ +/* Description: Slope definition A5 */ + +/* Bits 11..0 : A (slope definition) register. */ +#define FICR_TEMP_A5_A_Pos (0UL) /*!< Position of A field. */ +#define FICR_TEMP_A5_A_Msk (0xFFFUL << FICR_TEMP_A5_A_Pos) /*!< Bit mask of A field. */ + +/* Register: FICR_TEMP_B0 */ +/* Description: Y-intercept B0 */ + +/* Bits 13..0 : B (y-intercept) */ +#define FICR_TEMP_B0_B_Pos (0UL) /*!< Position of B field. */ +#define FICR_TEMP_B0_B_Msk (0x3FFFUL << FICR_TEMP_B0_B_Pos) /*!< Bit mask of B field. */ + +/* Register: FICR_TEMP_B1 */ +/* Description: Y-intercept B1 */ + +/* Bits 13..0 : B (y-intercept) */ +#define FICR_TEMP_B1_B_Pos (0UL) /*!< Position of B field. */ +#define FICR_TEMP_B1_B_Msk (0x3FFFUL << FICR_TEMP_B1_B_Pos) /*!< Bit mask of B field. */ + +/* Register: FICR_TEMP_B2 */ +/* Description: Y-intercept B2 */ + +/* Bits 13..0 : B (y-intercept) */ +#define FICR_TEMP_B2_B_Pos (0UL) /*!< Position of B field. */ +#define FICR_TEMP_B2_B_Msk (0x3FFFUL << FICR_TEMP_B2_B_Pos) /*!< Bit mask of B field. */ + +/* Register: FICR_TEMP_B3 */ +/* Description: Y-intercept B3 */ + +/* Bits 13..0 : B (y-intercept) */ +#define FICR_TEMP_B3_B_Pos (0UL) /*!< Position of B field. */ +#define FICR_TEMP_B3_B_Msk (0x3FFFUL << FICR_TEMP_B3_B_Pos) /*!< Bit mask of B field. */ + +/* Register: FICR_TEMP_B4 */ +/* Description: Y-intercept B4 */ + +/* Bits 13..0 : B (y-intercept) */ +#define FICR_TEMP_B4_B_Pos (0UL) /*!< Position of B field. */ +#define FICR_TEMP_B4_B_Msk (0x3FFFUL << FICR_TEMP_B4_B_Pos) /*!< Bit mask of B field. */ + +/* Register: FICR_TEMP_B5 */ +/* Description: Y-intercept B5 */ + +/* Bits 13..0 : B (y-intercept) */ +#define FICR_TEMP_B5_B_Pos (0UL) /*!< Position of B field. */ +#define FICR_TEMP_B5_B_Msk (0x3FFFUL << FICR_TEMP_B5_B_Pos) /*!< Bit mask of B field. */ + +/* Register: FICR_TEMP_T0 */ +/* Description: Segment end T0 */ + +/* Bits 7..0 : T (segment end) register */ +#define FICR_TEMP_T0_T_Pos (0UL) /*!< Position of T field. */ +#define FICR_TEMP_T0_T_Msk (0xFFUL << FICR_TEMP_T0_T_Pos) /*!< Bit mask of T field. */ + +/* Register: FICR_TEMP_T1 */ +/* Description: Segment end T1 */ + +/* Bits 7..0 : T (segment end) register */ +#define FICR_TEMP_T1_T_Pos (0UL) /*!< Position of T field. */ +#define FICR_TEMP_T1_T_Msk (0xFFUL << FICR_TEMP_T1_T_Pos) /*!< Bit mask of T field. */ + +/* Register: FICR_TEMP_T2 */ +/* Description: Segment end T2 */ + +/* Bits 7..0 : T (segment end) register */ +#define FICR_TEMP_T2_T_Pos (0UL) /*!< Position of T field. */ +#define FICR_TEMP_T2_T_Msk (0xFFUL << FICR_TEMP_T2_T_Pos) /*!< Bit mask of T field. */ + +/* Register: FICR_TEMP_T3 */ +/* Description: Segment end T3 */ + +/* Bits 7..0 : T (segment end) register */ +#define FICR_TEMP_T3_T_Pos (0UL) /*!< Position of T field. */ +#define FICR_TEMP_T3_T_Msk (0xFFUL << FICR_TEMP_T3_T_Pos) /*!< Bit mask of T field. */ + +/* Register: FICR_TEMP_T4 */ +/* Description: Segment end T4 */ + +/* Bits 7..0 : T (segment end) register */ +#define FICR_TEMP_T4_T_Pos (0UL) /*!< Position of T field. */ +#define FICR_TEMP_T4_T_Msk (0xFFUL << FICR_TEMP_T4_T_Pos) /*!< Bit mask of T field. */ + +/* Register: FICR_NFC_TAGHEADER0 */ +/* Description: Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ + +/* Bits 31..24 : Unique identifier byte 3 */ +#define FICR_NFC_TAGHEADER0_UD3_Pos (24UL) /*!< Position of UD3 field. */ +#define FICR_NFC_TAGHEADER0_UD3_Msk (0xFFUL << FICR_NFC_TAGHEADER0_UD3_Pos) /*!< Bit mask of UD3 field. */ + +/* Bits 23..16 : Unique identifier byte 2 */ +#define FICR_NFC_TAGHEADER0_UD2_Pos (16UL) /*!< Position of UD2 field. */ +#define FICR_NFC_TAGHEADER0_UD2_Msk (0xFFUL << FICR_NFC_TAGHEADER0_UD2_Pos) /*!< Bit mask of UD2 field. */ + +/* Bits 15..8 : Unique identifier byte 1 */ +#define FICR_NFC_TAGHEADER0_UD1_Pos (8UL) /*!< Position of UD1 field. */ +#define FICR_NFC_TAGHEADER0_UD1_Msk (0xFFUL << FICR_NFC_TAGHEADER0_UD1_Pos) /*!< Bit mask of UD1 field. */ + +/* Bits 7..0 : Default Manufacturer ID: Nordic Semiconductor ASA has ICM 0x5F */ +#define FICR_NFC_TAGHEADER0_MFGID_Pos (0UL) /*!< Position of MFGID field. */ +#define FICR_NFC_TAGHEADER0_MFGID_Msk (0xFFUL << FICR_NFC_TAGHEADER0_MFGID_Pos) /*!< Bit mask of MFGID field. */ + +/* Register: FICR_NFC_TAGHEADER1 */ +/* Description: Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ + +/* Bits 31..24 : Unique identifier byte 7 */ +#define FICR_NFC_TAGHEADER1_UD7_Pos (24UL) /*!< Position of UD7 field. */ +#define FICR_NFC_TAGHEADER1_UD7_Msk (0xFFUL << FICR_NFC_TAGHEADER1_UD7_Pos) /*!< Bit mask of UD7 field. */ + +/* Bits 23..16 : Unique identifier byte 6 */ +#define FICR_NFC_TAGHEADER1_UD6_Pos (16UL) /*!< Position of UD6 field. */ +#define FICR_NFC_TAGHEADER1_UD6_Msk (0xFFUL << FICR_NFC_TAGHEADER1_UD6_Pos) /*!< Bit mask of UD6 field. */ + +/* Bits 15..8 : Unique identifier byte 5 */ +#define FICR_NFC_TAGHEADER1_UD5_Pos (8UL) /*!< Position of UD5 field. */ +#define FICR_NFC_TAGHEADER1_UD5_Msk (0xFFUL << FICR_NFC_TAGHEADER1_UD5_Pos) /*!< Bit mask of UD5 field. */ + +/* Bits 7..0 : Unique identifier byte 4 */ +#define FICR_NFC_TAGHEADER1_UD4_Pos (0UL) /*!< Position of UD4 field. */ +#define FICR_NFC_TAGHEADER1_UD4_Msk (0xFFUL << FICR_NFC_TAGHEADER1_UD4_Pos) /*!< Bit mask of UD4 field. */ + +/* Register: FICR_NFC_TAGHEADER2 */ +/* Description: Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ + +/* Bits 31..24 : Unique identifier byte 11 */ +#define FICR_NFC_TAGHEADER2_UD11_Pos (24UL) /*!< Position of UD11 field. */ +#define FICR_NFC_TAGHEADER2_UD11_Msk (0xFFUL << FICR_NFC_TAGHEADER2_UD11_Pos) /*!< Bit mask of UD11 field. */ + +/* Bits 23..16 : Unique identifier byte 10 */ +#define FICR_NFC_TAGHEADER2_UD10_Pos (16UL) /*!< Position of UD10 field. */ +#define FICR_NFC_TAGHEADER2_UD10_Msk (0xFFUL << FICR_NFC_TAGHEADER2_UD10_Pos) /*!< Bit mask of UD10 field. */ + +/* Bits 15..8 : Unique identifier byte 9 */ +#define FICR_NFC_TAGHEADER2_UD9_Pos (8UL) /*!< Position of UD9 field. */ +#define FICR_NFC_TAGHEADER2_UD9_Msk (0xFFUL << FICR_NFC_TAGHEADER2_UD9_Pos) /*!< Bit mask of UD9 field. */ + +/* Bits 7..0 : Unique identifier byte 8 */ +#define FICR_NFC_TAGHEADER2_UD8_Pos (0UL) /*!< Position of UD8 field. */ +#define FICR_NFC_TAGHEADER2_UD8_Msk (0xFFUL << FICR_NFC_TAGHEADER2_UD8_Pos) /*!< Bit mask of UD8 field. */ + +/* Register: FICR_NFC_TAGHEADER3 */ +/* Description: Default header for NFC tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ + +/* Bits 31..24 : Unique identifier byte 15 */ +#define FICR_NFC_TAGHEADER3_UD15_Pos (24UL) /*!< Position of UD15 field. */ +#define FICR_NFC_TAGHEADER3_UD15_Msk (0xFFUL << FICR_NFC_TAGHEADER3_UD15_Pos) /*!< Bit mask of UD15 field. */ + +/* Bits 23..16 : Unique identifier byte 14 */ +#define FICR_NFC_TAGHEADER3_UD14_Pos (16UL) /*!< Position of UD14 field. */ +#define FICR_NFC_TAGHEADER3_UD14_Msk (0xFFUL << FICR_NFC_TAGHEADER3_UD14_Pos) /*!< Bit mask of UD14 field. */ + +/* Bits 15..8 : Unique identifier byte 13 */ +#define FICR_NFC_TAGHEADER3_UD13_Pos (8UL) /*!< Position of UD13 field. */ +#define FICR_NFC_TAGHEADER3_UD13_Msk (0xFFUL << FICR_NFC_TAGHEADER3_UD13_Pos) /*!< Bit mask of UD13 field. */ + +/* Bits 7..0 : Unique identifier byte 12 */ +#define FICR_NFC_TAGHEADER3_UD12_Pos (0UL) /*!< Position of UD12 field. */ +#define FICR_NFC_TAGHEADER3_UD12_Msk (0xFFUL << FICR_NFC_TAGHEADER3_UD12_Pos) /*!< Bit mask of UD12 field. */ + +/* Register: FICR_TRNG90B_BYTES */ +/* Description: Amount of bytes for the required entropy bits */ + +/* Bits 31..0 : Amount of bytes for the required entropy bits */ +#define FICR_TRNG90B_BYTES_BYTES_Pos (0UL) /*!< Position of BYTES field. */ +#define FICR_TRNG90B_BYTES_BYTES_Msk (0xFFFFFFFFUL << FICR_TRNG90B_BYTES_BYTES_Pos) /*!< Bit mask of BYTES field. */ + +/* Register: FICR_TRNG90B_RCCUTOFF */ +/* Description: Repetition counter cutoff */ + +/* Bits 31..0 : Repetition counter cutoff */ +#define FICR_TRNG90B_RCCUTOFF_RCCUTOFF_Pos (0UL) /*!< Position of RCCUTOFF field. */ +#define FICR_TRNG90B_RCCUTOFF_RCCUTOFF_Msk (0xFFFFFFFFUL << FICR_TRNG90B_RCCUTOFF_RCCUTOFF_Pos) /*!< Bit mask of RCCUTOFF field. */ + +/* Register: FICR_TRNG90B_APCUTOFF */ +/* Description: Adaptive proportion cutoff */ + +/* Bits 31..0 : Adaptive proportion cutoff */ +#define FICR_TRNG90B_APCUTOFF_APCUTOFF_Pos (0UL) /*!< Position of APCUTOFF field. */ +#define FICR_TRNG90B_APCUTOFF_APCUTOFF_Msk (0xFFFFFFFFUL << FICR_TRNG90B_APCUTOFF_APCUTOFF_Pos) /*!< Bit mask of APCUTOFF field. */ + +/* Register: FICR_TRNG90B_STARTUP */ +/* Description: Amount of bytes for the startup tests */ + +/* Bits 31..0 : Amount of bytes for the startup tests */ +#define FICR_TRNG90B_STARTUP_STARTUP_Pos (0UL) /*!< Position of STARTUP field. */ +#define FICR_TRNG90B_STARTUP_STARTUP_Msk (0xFFFFFFFFUL << FICR_TRNG90B_STARTUP_STARTUP_Pos) /*!< Bit mask of STARTUP field. */ + +/* Register: FICR_TRNG90B_ROSC1 */ +/* Description: Sample count for ring oscillator 1 */ + +/* Bits 31..0 : Sample count for ring oscillator 1 */ +#define FICR_TRNG90B_ROSC1_ROSC1_Pos (0UL) /*!< Position of ROSC1 field. */ +#define FICR_TRNG90B_ROSC1_ROSC1_Msk (0xFFFFFFFFUL << FICR_TRNG90B_ROSC1_ROSC1_Pos) /*!< Bit mask of ROSC1 field. */ + +/* Register: FICR_TRNG90B_ROSC2 */ +/* Description: Sample count for ring oscillator 2 */ + +/* Bits 31..0 : Sample count for ring oscillator 2 */ +#define FICR_TRNG90B_ROSC2_ROSC2_Pos (0UL) /*!< Position of ROSC2 field. */ +#define FICR_TRNG90B_ROSC2_ROSC2_Msk (0xFFFFFFFFUL << FICR_TRNG90B_ROSC2_ROSC2_Pos) /*!< Bit mask of ROSC2 field. */ + +/* Register: FICR_TRNG90B_ROSC3 */ +/* Description: Sample count for ring oscillator 3 */ + +/* Bits 31..0 : Sample count for ring oscillator 3 */ +#define FICR_TRNG90B_ROSC3_ROSC3_Pos (0UL) /*!< Position of ROSC3 field. */ +#define FICR_TRNG90B_ROSC3_ROSC3_Msk (0xFFFFFFFFUL << FICR_TRNG90B_ROSC3_ROSC3_Pos) /*!< Bit mask of ROSC3 field. */ + +/* Register: FICR_TRNG90B_ROSC4 */ +/* Description: Sample count for ring oscillator 4 */ + +/* Bits 31..0 : Sample count for ring oscillator 4 */ +#define FICR_TRNG90B_ROSC4_ROSC4_Pos (0UL) /*!< Position of ROSC4 field. */ +#define FICR_TRNG90B_ROSC4_ROSC4_Msk (0xFFFFFFFFUL << FICR_TRNG90B_ROSC4_ROSC4_Pos) /*!< Bit mask of ROSC4 field. */ + + +/* Peripheral: GPIOTE */ +/* Description: GPIO Tasks and Events */ + +/* Register: GPIOTE_TASKS_OUT */ +/* Description: Description collection[n]: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY. */ + +/* Bit 0 : */ +#define GPIOTE_TASKS_OUT_TASKS_OUT_Pos (0UL) /*!< Position of TASKS_OUT field. */ +#define GPIOTE_TASKS_OUT_TASKS_OUT_Msk (0x1UL << GPIOTE_TASKS_OUT_TASKS_OUT_Pos) /*!< Bit mask of TASKS_OUT field. */ + +/* Register: GPIOTE_TASKS_SET */ +/* Description: Description collection[n]: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high. */ + +/* Bit 0 : */ +#define GPIOTE_TASKS_SET_TASKS_SET_Pos (0UL) /*!< Position of TASKS_SET field. */ +#define GPIOTE_TASKS_SET_TASKS_SET_Msk (0x1UL << GPIOTE_TASKS_SET_TASKS_SET_Pos) /*!< Bit mask of TASKS_SET field. */ + +/* Register: GPIOTE_TASKS_CLR */ +/* Description: Description collection[n]: Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low. */ + +/* Bit 0 : */ +#define GPIOTE_TASKS_CLR_TASKS_CLR_Pos (0UL) /*!< Position of TASKS_CLR field. */ +#define GPIOTE_TASKS_CLR_TASKS_CLR_Msk (0x1UL << GPIOTE_TASKS_CLR_TASKS_CLR_Pos) /*!< Bit mask of TASKS_CLR field. */ + +/* Register: GPIOTE_EVENTS_IN */ +/* Description: Description collection[n]: Event generated from pin specified in CONFIG[n].PSEL */ + +/* Bit 0 : */ +#define GPIOTE_EVENTS_IN_EVENTS_IN_Pos (0UL) /*!< Position of EVENTS_IN field. */ +#define GPIOTE_EVENTS_IN_EVENTS_IN_Msk (0x1UL << GPIOTE_EVENTS_IN_EVENTS_IN_Pos) /*!< Bit mask of EVENTS_IN field. */ + +/* Register: GPIOTE_EVENTS_PORT */ +/* Description: Event generated from multiple input GPIO pins with SENSE mechanism enabled */ + +/* Bit 0 : */ +#define GPIOTE_EVENTS_PORT_EVENTS_PORT_Pos (0UL) /*!< Position of EVENTS_PORT field. */ +#define GPIOTE_EVENTS_PORT_EVENTS_PORT_Msk (0x1UL << GPIOTE_EVENTS_PORT_EVENTS_PORT_Pos) /*!< Bit mask of EVENTS_PORT field. */ + +/* Register: GPIOTE_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 31 : Write '1' to enable interrupt for PORT event */ +#define GPIOTE_INTENSET_PORT_Pos (31UL) /*!< Position of PORT field. */ +#define GPIOTE_INTENSET_PORT_Msk (0x1UL << GPIOTE_INTENSET_PORT_Pos) /*!< Bit mask of PORT field. */ +#define GPIOTE_INTENSET_PORT_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_PORT_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_PORT_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to enable interrupt for IN[7] event */ +#define GPIOTE_INTENSET_IN7_Pos (7UL) /*!< Position of IN7 field. */ +#define GPIOTE_INTENSET_IN7_Msk (0x1UL << GPIOTE_INTENSET_IN7_Pos) /*!< Bit mask of IN7 field. */ +#define GPIOTE_INTENSET_IN7_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_IN7_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_IN7_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to enable interrupt for IN[6] event */ +#define GPIOTE_INTENSET_IN6_Pos (6UL) /*!< Position of IN6 field. */ +#define GPIOTE_INTENSET_IN6_Msk (0x1UL << GPIOTE_INTENSET_IN6_Pos) /*!< Bit mask of IN6 field. */ +#define GPIOTE_INTENSET_IN6_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_IN6_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_IN6_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to enable interrupt for IN[5] event */ +#define GPIOTE_INTENSET_IN5_Pos (5UL) /*!< Position of IN5 field. */ +#define GPIOTE_INTENSET_IN5_Msk (0x1UL << GPIOTE_INTENSET_IN5_Pos) /*!< Bit mask of IN5 field. */ +#define GPIOTE_INTENSET_IN5_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_IN5_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_IN5_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to enable interrupt for IN[4] event */ +#define GPIOTE_INTENSET_IN4_Pos (4UL) /*!< Position of IN4 field. */ +#define GPIOTE_INTENSET_IN4_Msk (0x1UL << GPIOTE_INTENSET_IN4_Pos) /*!< Bit mask of IN4 field. */ +#define GPIOTE_INTENSET_IN4_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_IN4_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_IN4_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to enable interrupt for IN[3] event */ +#define GPIOTE_INTENSET_IN3_Pos (3UL) /*!< Position of IN3 field. */ +#define GPIOTE_INTENSET_IN3_Msk (0x1UL << GPIOTE_INTENSET_IN3_Pos) /*!< Bit mask of IN3 field. */ +#define GPIOTE_INTENSET_IN3_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_IN3_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_IN3_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to enable interrupt for IN[2] event */ +#define GPIOTE_INTENSET_IN2_Pos (2UL) /*!< Position of IN2 field. */ +#define GPIOTE_INTENSET_IN2_Msk (0x1UL << GPIOTE_INTENSET_IN2_Pos) /*!< Bit mask of IN2 field. */ +#define GPIOTE_INTENSET_IN2_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_IN2_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_IN2_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable interrupt for IN[1] event */ +#define GPIOTE_INTENSET_IN1_Pos (1UL) /*!< Position of IN1 field. */ +#define GPIOTE_INTENSET_IN1_Msk (0x1UL << GPIOTE_INTENSET_IN1_Pos) /*!< Bit mask of IN1 field. */ +#define GPIOTE_INTENSET_IN1_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_IN1_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_IN1_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to enable interrupt for IN[0] event */ +#define GPIOTE_INTENSET_IN0_Pos (0UL) /*!< Position of IN0 field. */ +#define GPIOTE_INTENSET_IN0_Msk (0x1UL << GPIOTE_INTENSET_IN0_Pos) /*!< Bit mask of IN0 field. */ +#define GPIOTE_INTENSET_IN0_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_IN0_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_IN0_Set (1UL) /*!< Enable */ + +/* Register: GPIOTE_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 31 : Write '1' to disable interrupt for PORT event */ +#define GPIOTE_INTENCLR_PORT_Pos (31UL) /*!< Position of PORT field. */ +#define GPIOTE_INTENCLR_PORT_Msk (0x1UL << GPIOTE_INTENCLR_PORT_Pos) /*!< Bit mask of PORT field. */ +#define GPIOTE_INTENCLR_PORT_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_PORT_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_PORT_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to disable interrupt for IN[7] event */ +#define GPIOTE_INTENCLR_IN7_Pos (7UL) /*!< Position of IN7 field. */ +#define GPIOTE_INTENCLR_IN7_Msk (0x1UL << GPIOTE_INTENCLR_IN7_Pos) /*!< Bit mask of IN7 field. */ +#define GPIOTE_INTENCLR_IN7_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_IN7_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_IN7_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to disable interrupt for IN[6] event */ +#define GPIOTE_INTENCLR_IN6_Pos (6UL) /*!< Position of IN6 field. */ +#define GPIOTE_INTENCLR_IN6_Msk (0x1UL << GPIOTE_INTENCLR_IN6_Pos) /*!< Bit mask of IN6 field. */ +#define GPIOTE_INTENCLR_IN6_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_IN6_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_IN6_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to disable interrupt for IN[5] event */ +#define GPIOTE_INTENCLR_IN5_Pos (5UL) /*!< Position of IN5 field. */ +#define GPIOTE_INTENCLR_IN5_Msk (0x1UL << GPIOTE_INTENCLR_IN5_Pos) /*!< Bit mask of IN5 field. */ +#define GPIOTE_INTENCLR_IN5_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_IN5_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_IN5_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to disable interrupt for IN[4] event */ +#define GPIOTE_INTENCLR_IN4_Pos (4UL) /*!< Position of IN4 field. */ +#define GPIOTE_INTENCLR_IN4_Msk (0x1UL << GPIOTE_INTENCLR_IN4_Pos) /*!< Bit mask of IN4 field. */ +#define GPIOTE_INTENCLR_IN4_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_IN4_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_IN4_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to disable interrupt for IN[3] event */ +#define GPIOTE_INTENCLR_IN3_Pos (3UL) /*!< Position of IN3 field. */ +#define GPIOTE_INTENCLR_IN3_Msk (0x1UL << GPIOTE_INTENCLR_IN3_Pos) /*!< Bit mask of IN3 field. */ +#define GPIOTE_INTENCLR_IN3_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_IN3_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_IN3_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to disable interrupt for IN[2] event */ +#define GPIOTE_INTENCLR_IN2_Pos (2UL) /*!< Position of IN2 field. */ +#define GPIOTE_INTENCLR_IN2_Msk (0x1UL << GPIOTE_INTENCLR_IN2_Pos) /*!< Bit mask of IN2 field. */ +#define GPIOTE_INTENCLR_IN2_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_IN2_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_IN2_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable interrupt for IN[1] event */ +#define GPIOTE_INTENCLR_IN1_Pos (1UL) /*!< Position of IN1 field. */ +#define GPIOTE_INTENCLR_IN1_Msk (0x1UL << GPIOTE_INTENCLR_IN1_Pos) /*!< Bit mask of IN1 field. */ +#define GPIOTE_INTENCLR_IN1_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_IN1_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_IN1_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to disable interrupt for IN[0] event */ +#define GPIOTE_INTENCLR_IN0_Pos (0UL) /*!< Position of IN0 field. */ +#define GPIOTE_INTENCLR_IN0_Msk (0x1UL << GPIOTE_INTENCLR_IN0_Pos) /*!< Bit mask of IN0 field. */ +#define GPIOTE_INTENCLR_IN0_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_IN0_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_IN0_Clear (1UL) /*!< Disable */ + +/* Register: GPIOTE_CONFIG */ +/* Description: Description collection[n]: Configuration for OUT[n], SET[n] and CLR[n] tasks and IN[n] event */ + +/* Bit 20 : When in task mode: Initial value of the output when the GPIOTE channel is configured. When in event mode: No effect. */ +#define GPIOTE_CONFIG_OUTINIT_Pos (20UL) /*!< Position of OUTINIT field. */ +#define GPIOTE_CONFIG_OUTINIT_Msk (0x1UL << GPIOTE_CONFIG_OUTINIT_Pos) /*!< Bit mask of OUTINIT field. */ +#define GPIOTE_CONFIG_OUTINIT_Low (0UL) /*!< Task mode: Initial value of pin before task triggering is low */ +#define GPIOTE_CONFIG_OUTINIT_High (1UL) /*!< Task mode: Initial value of pin before task triggering is high */ + +/* Bits 17..16 : When In task mode: Operation to be performed on output when OUT[n] task is triggered. When In event mode: Operation on input that shall trigger IN[n] event. */ +#define GPIOTE_CONFIG_POLARITY_Pos (16UL) /*!< Position of POLARITY field. */ +#define GPIOTE_CONFIG_POLARITY_Msk (0x3UL << GPIOTE_CONFIG_POLARITY_Pos) /*!< Bit mask of POLARITY field. */ +#define GPIOTE_CONFIG_POLARITY_None (0UL) /*!< Task mode: No effect on pin from OUT[n] task. Event mode: no IN[n] event generated on pin activity. */ +#define GPIOTE_CONFIG_POLARITY_LoToHi (1UL) /*!< Task mode: Set pin from OUT[n] task. Event mode: Generate IN[n] event when rising edge on pin. */ +#define GPIOTE_CONFIG_POLARITY_HiToLo (2UL) /*!< Task mode: Clear pin from OUT[n] task. Event mode: Generate IN[n] event when falling edge on pin. */ +#define GPIOTE_CONFIG_POLARITY_Toggle (3UL) /*!< Task mode: Toggle pin from OUT[n]. Event mode: Generate IN[n] when any change on pin. */ + +/* Bit 13 : Port number */ +#define GPIOTE_CONFIG_PORT_Pos (13UL) /*!< Position of PORT field. */ +#define GPIOTE_CONFIG_PORT_Msk (0x1UL << GPIOTE_CONFIG_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 12..8 : GPIO number associated with SET[n], CLR[n] and OUT[n] tasks and IN[n] event */ +#define GPIOTE_CONFIG_PSEL_Pos (8UL) /*!< Position of PSEL field. */ +#define GPIOTE_CONFIG_PSEL_Msk (0x1FUL << GPIOTE_CONFIG_PSEL_Pos) /*!< Bit mask of PSEL field. */ + +/* Bits 1..0 : Mode */ +#define GPIOTE_CONFIG_MODE_Pos (0UL) /*!< Position of MODE field. */ +#define GPIOTE_CONFIG_MODE_Msk (0x3UL << GPIOTE_CONFIG_MODE_Pos) /*!< Bit mask of MODE field. */ +#define GPIOTE_CONFIG_MODE_Disabled (0UL) /*!< Disabled. Pin specified by PSEL will not be acquired by the GPIOTE module. */ +#define GPIOTE_CONFIG_MODE_Event (1UL) /*!< Event mode */ +#define GPIOTE_CONFIG_MODE_Task (3UL) /*!< Task mode */ + + +/* Peripheral: I2S */ +/* Description: Inter-IC Sound */ + +/* Register: I2S_TASKS_START */ +/* Description: Starts continuous I2S transfer. Also starts MCK generator when this is enabled. */ + +/* Bit 0 : */ +#define I2S_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define I2S_TASKS_START_TASKS_START_Msk (0x1UL << I2S_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: I2S_TASKS_STOP */ +/* Description: Stops I2S transfer. Also stops MCK generator. Triggering this task will cause the {event:STOPPED} event to be generated. */ + +/* Bit 0 : */ +#define I2S_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define I2S_TASKS_STOP_TASKS_STOP_Msk (0x1UL << I2S_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: I2S_EVENTS_RXPTRUPD */ +/* Description: The RXD.PTR register has been copied to internal double-buffers. + When the I2S module is started and RX is enabled, this event will be generated for every RXTXD.MAXCNT words that are received on the SDIN pin. */ + +/* Bit 0 : */ +#define I2S_EVENTS_RXPTRUPD_EVENTS_RXPTRUPD_Pos (0UL) /*!< Position of EVENTS_RXPTRUPD field. */ +#define I2S_EVENTS_RXPTRUPD_EVENTS_RXPTRUPD_Msk (0x1UL << I2S_EVENTS_RXPTRUPD_EVENTS_RXPTRUPD_Pos) /*!< Bit mask of EVENTS_RXPTRUPD field. */ + +/* Register: I2S_EVENTS_STOPPED */ +/* Description: I2S transfer stopped. */ + +/* Bit 0 : */ +#define I2S_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */ +#define I2S_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << I2S_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */ + +/* Register: I2S_EVENTS_TXPTRUPD */ +/* Description: The TDX.PTR register has been copied to internal double-buffers. + When the I2S module is started and TX is enabled, this event will be generated for every RXTXD.MAXCNT words that are sent on the SDOUT pin. */ + +/* Bit 0 : */ +#define I2S_EVENTS_TXPTRUPD_EVENTS_TXPTRUPD_Pos (0UL) /*!< Position of EVENTS_TXPTRUPD field. */ +#define I2S_EVENTS_TXPTRUPD_EVENTS_TXPTRUPD_Msk (0x1UL << I2S_EVENTS_TXPTRUPD_EVENTS_TXPTRUPD_Pos) /*!< Bit mask of EVENTS_TXPTRUPD field. */ + +/* Register: I2S_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 5 : Enable or disable interrupt for TXPTRUPD event */ +#define I2S_INTEN_TXPTRUPD_Pos (5UL) /*!< Position of TXPTRUPD field. */ +#define I2S_INTEN_TXPTRUPD_Msk (0x1UL << I2S_INTEN_TXPTRUPD_Pos) /*!< Bit mask of TXPTRUPD field. */ +#define I2S_INTEN_TXPTRUPD_Disabled (0UL) /*!< Disable */ +#define I2S_INTEN_TXPTRUPD_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable interrupt for STOPPED event */ +#define I2S_INTEN_STOPPED_Pos (2UL) /*!< Position of STOPPED field. */ +#define I2S_INTEN_STOPPED_Msk (0x1UL << I2S_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define I2S_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ +#define I2S_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for RXPTRUPD event */ +#define I2S_INTEN_RXPTRUPD_Pos (1UL) /*!< Position of RXPTRUPD field. */ +#define I2S_INTEN_RXPTRUPD_Msk (0x1UL << I2S_INTEN_RXPTRUPD_Pos) /*!< Bit mask of RXPTRUPD field. */ +#define I2S_INTEN_RXPTRUPD_Disabled (0UL) /*!< Disable */ +#define I2S_INTEN_RXPTRUPD_Enabled (1UL) /*!< Enable */ + +/* Register: I2S_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 5 : Write '1' to enable interrupt for TXPTRUPD event */ +#define I2S_INTENSET_TXPTRUPD_Pos (5UL) /*!< Position of TXPTRUPD field. */ +#define I2S_INTENSET_TXPTRUPD_Msk (0x1UL << I2S_INTENSET_TXPTRUPD_Pos) /*!< Bit mask of TXPTRUPD field. */ +#define I2S_INTENSET_TXPTRUPD_Disabled (0UL) /*!< Read: Disabled */ +#define I2S_INTENSET_TXPTRUPD_Enabled (1UL) /*!< Read: Enabled */ +#define I2S_INTENSET_TXPTRUPD_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to enable interrupt for STOPPED event */ +#define I2S_INTENSET_STOPPED_Pos (2UL) /*!< Position of STOPPED field. */ +#define I2S_INTENSET_STOPPED_Msk (0x1UL << I2S_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define I2S_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define I2S_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define I2S_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable interrupt for RXPTRUPD event */ +#define I2S_INTENSET_RXPTRUPD_Pos (1UL) /*!< Position of RXPTRUPD field. */ +#define I2S_INTENSET_RXPTRUPD_Msk (0x1UL << I2S_INTENSET_RXPTRUPD_Pos) /*!< Bit mask of RXPTRUPD field. */ +#define I2S_INTENSET_RXPTRUPD_Disabled (0UL) /*!< Read: Disabled */ +#define I2S_INTENSET_RXPTRUPD_Enabled (1UL) /*!< Read: Enabled */ +#define I2S_INTENSET_RXPTRUPD_Set (1UL) /*!< Enable */ + +/* Register: I2S_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 5 : Write '1' to disable interrupt for TXPTRUPD event */ +#define I2S_INTENCLR_TXPTRUPD_Pos (5UL) /*!< Position of TXPTRUPD field. */ +#define I2S_INTENCLR_TXPTRUPD_Msk (0x1UL << I2S_INTENCLR_TXPTRUPD_Pos) /*!< Bit mask of TXPTRUPD field. */ +#define I2S_INTENCLR_TXPTRUPD_Disabled (0UL) /*!< Read: Disabled */ +#define I2S_INTENCLR_TXPTRUPD_Enabled (1UL) /*!< Read: Enabled */ +#define I2S_INTENCLR_TXPTRUPD_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to disable interrupt for STOPPED event */ +#define I2S_INTENCLR_STOPPED_Pos (2UL) /*!< Position of STOPPED field. */ +#define I2S_INTENCLR_STOPPED_Msk (0x1UL << I2S_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define I2S_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define I2S_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define I2S_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable interrupt for RXPTRUPD event */ +#define I2S_INTENCLR_RXPTRUPD_Pos (1UL) /*!< Position of RXPTRUPD field. */ +#define I2S_INTENCLR_RXPTRUPD_Msk (0x1UL << I2S_INTENCLR_RXPTRUPD_Pos) /*!< Bit mask of RXPTRUPD field. */ +#define I2S_INTENCLR_RXPTRUPD_Disabled (0UL) /*!< Read: Disabled */ +#define I2S_INTENCLR_RXPTRUPD_Enabled (1UL) /*!< Read: Enabled */ +#define I2S_INTENCLR_RXPTRUPD_Clear (1UL) /*!< Disable */ + +/* Register: I2S_ENABLE */ +/* Description: Enable I2S module. */ + +/* Bit 0 : Enable I2S module. */ +#define I2S_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define I2S_ENABLE_ENABLE_Msk (0x1UL << I2S_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define I2S_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ +#define I2S_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */ + +/* Register: I2S_CONFIG_MODE */ +/* Description: I2S mode. */ + +/* Bit 0 : I2S mode. */ +#define I2S_CONFIG_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ +#define I2S_CONFIG_MODE_MODE_Msk (0x1UL << I2S_CONFIG_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ +#define I2S_CONFIG_MODE_MODE_Master (0UL) /*!< Master mode. SCK and LRCK generated from internal master clcok (MCK) and output on pins defined by PSEL.xxx. */ +#define I2S_CONFIG_MODE_MODE_Slave (1UL) /*!< Slave mode. SCK and LRCK generated by external master and received on pins defined by PSEL.xxx */ + +/* Register: I2S_CONFIG_RXEN */ +/* Description: Reception (RX) enable. */ + +/* Bit 0 : Reception (RX) enable. */ +#define I2S_CONFIG_RXEN_RXEN_Pos (0UL) /*!< Position of RXEN field. */ +#define I2S_CONFIG_RXEN_RXEN_Msk (0x1UL << I2S_CONFIG_RXEN_RXEN_Pos) /*!< Bit mask of RXEN field. */ +#define I2S_CONFIG_RXEN_RXEN_Disabled (0UL) /*!< Reception disabled and now data will be written to the RXD.PTR address. */ +#define I2S_CONFIG_RXEN_RXEN_Enabled (1UL) /*!< Reception enabled. */ + +/* Register: I2S_CONFIG_TXEN */ +/* Description: Transmission (TX) enable. */ + +/* Bit 0 : Transmission (TX) enable. */ +#define I2S_CONFIG_TXEN_TXEN_Pos (0UL) /*!< Position of TXEN field. */ +#define I2S_CONFIG_TXEN_TXEN_Msk (0x1UL << I2S_CONFIG_TXEN_TXEN_Pos) /*!< Bit mask of TXEN field. */ +#define I2S_CONFIG_TXEN_TXEN_Disabled (0UL) /*!< Transmission disabled and now data will be read from the RXD.TXD address. */ +#define I2S_CONFIG_TXEN_TXEN_Enabled (1UL) /*!< Transmission enabled. */ + +/* Register: I2S_CONFIG_MCKEN */ +/* Description: Master clock generator enable. */ + +/* Bit 0 : Master clock generator enable. */ +#define I2S_CONFIG_MCKEN_MCKEN_Pos (0UL) /*!< Position of MCKEN field. */ +#define I2S_CONFIG_MCKEN_MCKEN_Msk (0x1UL << I2S_CONFIG_MCKEN_MCKEN_Pos) /*!< Bit mask of MCKEN field. */ +#define I2S_CONFIG_MCKEN_MCKEN_Disabled (0UL) /*!< Master clock generator disabled and PSEL.MCK not connected(available as GPIO). */ +#define I2S_CONFIG_MCKEN_MCKEN_Enabled (1UL) /*!< Master clock generator running and MCK output on PSEL.MCK. */ + +/* Register: I2S_CONFIG_MCKFREQ */ +/* Description: Master clock generator frequency. */ + +/* Bits 31..0 : Master clock generator frequency. */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_Pos (0UL) /*!< Position of MCKFREQ field. */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_Msk (0xFFFFFFFFUL << I2S_CONFIG_MCKFREQ_MCKFREQ_Pos) /*!< Bit mask of MCKFREQ field. */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV125 (0x020C0000UL) /*!< 32 MHz / 125 = 0.256 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV63 (0x04100000UL) /*!< 32 MHz / 63 = 0.5079365 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV42 (0x06000000UL) /*!< 32 MHz / 42 = 0.7619048 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV32 (0x08000000UL) /*!< 32 MHz / 32 = 1.0 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV31 (0x08400000UL) /*!< 32 MHz / 31 = 1.0322581 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV30 (0x08800000UL) /*!< 32 MHz / 30 = 1.0666667 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV23 (0x0B000000UL) /*!< 32 MHz / 23 = 1.3913043 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV21 (0x0C000000UL) /*!< 32 MHz / 21 = 1.5238095 */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV16 (0x10000000UL) /*!< 32 MHz / 16 = 2.0 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV15 (0x11000000UL) /*!< 32 MHz / 15 = 2.1333333 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV11 (0x16000000UL) /*!< 32 MHz / 11 = 2.9090909 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV10 (0x18000000UL) /*!< 32 MHz / 10 = 3.2 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV8 (0x20000000UL) /*!< 32 MHz / 8 = 4.0 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV6 (0x28000000UL) /*!< 32 MHz / 6 = 5.3333333 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV5 (0x30000000UL) /*!< 32 MHz / 5 = 6.4 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV4 (0x40000000UL) /*!< 32 MHz / 4 = 8.0 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV3 (0x50000000UL) /*!< 32 MHz / 3 = 10.6666667 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV2 (0x80000000UL) /*!< 32 MHz / 2 = 16.0 MHz */ + +/* Register: I2S_CONFIG_RATIO */ +/* Description: MCK / LRCK ratio. */ + +/* Bits 3..0 : MCK / LRCK ratio. */ +#define I2S_CONFIG_RATIO_RATIO_Pos (0UL) /*!< Position of RATIO field. */ +#define I2S_CONFIG_RATIO_RATIO_Msk (0xFUL << I2S_CONFIG_RATIO_RATIO_Pos) /*!< Bit mask of RATIO field. */ +#define I2S_CONFIG_RATIO_RATIO_32X (0UL) /*!< LRCK = MCK / 32 */ +#define I2S_CONFIG_RATIO_RATIO_48X (1UL) /*!< LRCK = MCK / 48 */ +#define I2S_CONFIG_RATIO_RATIO_64X (2UL) /*!< LRCK = MCK / 64 */ +#define I2S_CONFIG_RATIO_RATIO_96X (3UL) /*!< LRCK = MCK / 96 */ +#define I2S_CONFIG_RATIO_RATIO_128X (4UL) /*!< LRCK = MCK / 128 */ +#define I2S_CONFIG_RATIO_RATIO_192X (5UL) /*!< LRCK = MCK / 192 */ +#define I2S_CONFIG_RATIO_RATIO_256X (6UL) /*!< LRCK = MCK / 256 */ +#define I2S_CONFIG_RATIO_RATIO_384X (7UL) /*!< LRCK = MCK / 384 */ +#define I2S_CONFIG_RATIO_RATIO_512X (8UL) /*!< LRCK = MCK / 512 */ + +/* Register: I2S_CONFIG_SWIDTH */ +/* Description: Sample width. */ + +/* Bits 1..0 : Sample width. */ +#define I2S_CONFIG_SWIDTH_SWIDTH_Pos (0UL) /*!< Position of SWIDTH field. */ +#define I2S_CONFIG_SWIDTH_SWIDTH_Msk (0x3UL << I2S_CONFIG_SWIDTH_SWIDTH_Pos) /*!< Bit mask of SWIDTH field. */ +#define I2S_CONFIG_SWIDTH_SWIDTH_8Bit (0UL) /*!< 8 bit. */ +#define I2S_CONFIG_SWIDTH_SWIDTH_16Bit (1UL) /*!< 16 bit. */ +#define I2S_CONFIG_SWIDTH_SWIDTH_24Bit (2UL) /*!< 24 bit. */ + +/* Register: I2S_CONFIG_ALIGN */ +/* Description: Alignment of sample within a frame. */ + +/* Bit 0 : Alignment of sample within a frame. */ +#define I2S_CONFIG_ALIGN_ALIGN_Pos (0UL) /*!< Position of ALIGN field. */ +#define I2S_CONFIG_ALIGN_ALIGN_Msk (0x1UL << I2S_CONFIG_ALIGN_ALIGN_Pos) /*!< Bit mask of ALIGN field. */ +#define I2S_CONFIG_ALIGN_ALIGN_Left (0UL) /*!< Left-aligned. */ +#define I2S_CONFIG_ALIGN_ALIGN_Right (1UL) /*!< Right-aligned. */ + +/* Register: I2S_CONFIG_FORMAT */ +/* Description: Frame format. */ + +/* Bit 0 : Frame format. */ +#define I2S_CONFIG_FORMAT_FORMAT_Pos (0UL) /*!< Position of FORMAT field. */ +#define I2S_CONFIG_FORMAT_FORMAT_Msk (0x1UL << I2S_CONFIG_FORMAT_FORMAT_Pos) /*!< Bit mask of FORMAT field. */ +#define I2S_CONFIG_FORMAT_FORMAT_I2S (0UL) /*!< Original I2S format. */ +#define I2S_CONFIG_FORMAT_FORMAT_Aligned (1UL) /*!< Alternate (left- or right-aligned) format. */ + +/* Register: I2S_CONFIG_CHANNELS */ +/* Description: Enable channels. */ + +/* Bits 1..0 : Enable channels. */ +#define I2S_CONFIG_CHANNELS_CHANNELS_Pos (0UL) /*!< Position of CHANNELS field. */ +#define I2S_CONFIG_CHANNELS_CHANNELS_Msk (0x3UL << I2S_CONFIG_CHANNELS_CHANNELS_Pos) /*!< Bit mask of CHANNELS field. */ +#define I2S_CONFIG_CHANNELS_CHANNELS_Stereo (0UL) /*!< Stereo. */ +#define I2S_CONFIG_CHANNELS_CHANNELS_Left (1UL) /*!< Left only. */ +#define I2S_CONFIG_CHANNELS_CHANNELS_Right (2UL) /*!< Right only. */ + +/* Register: I2S_RXD_PTR */ +/* Description: Receive buffer RAM start address. */ + +/* Bits 31..0 : Receive buffer Data RAM start address. When receiving, words containing samples will be written to this address. This address is a word aligned Data RAM address. */ +#define I2S_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define I2S_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << I2S_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: I2S_TXD_PTR */ +/* Description: Transmit buffer RAM start address. */ + +/* Bits 31..0 : Transmit buffer Data RAM start address. When transmitting, words containing samples will be fetched from this address. This address is a word aligned Data RAM address. */ +#define I2S_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define I2S_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << I2S_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: I2S_RXTXD_MAXCNT */ +/* Description: Size of RXD and TXD buffers. */ + +/* Bits 13..0 : Size of RXD and TXD buffers in number of 32 bit words. */ +#define I2S_RXTXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define I2S_RXTXD_MAXCNT_MAXCNT_Msk (0x3FFFUL << I2S_RXTXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: I2S_PSEL_MCK */ +/* Description: Pin select for MCK signal. */ + +/* Bit 31 : Connection */ +#define I2S_PSEL_MCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define I2S_PSEL_MCK_CONNECT_Msk (0x1UL << I2S_PSEL_MCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define I2S_PSEL_MCK_CONNECT_Connected (0UL) /*!< Connect */ +#define I2S_PSEL_MCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define I2S_PSEL_MCK_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define I2S_PSEL_MCK_PORT_Msk (0x1UL << I2S_PSEL_MCK_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define I2S_PSEL_MCK_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define I2S_PSEL_MCK_PIN_Msk (0x1FUL << I2S_PSEL_MCK_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: I2S_PSEL_SCK */ +/* Description: Pin select for SCK signal. */ + +/* Bit 31 : Connection */ +#define I2S_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define I2S_PSEL_SCK_CONNECT_Msk (0x1UL << I2S_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define I2S_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */ +#define I2S_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define I2S_PSEL_SCK_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define I2S_PSEL_SCK_PORT_Msk (0x1UL << I2S_PSEL_SCK_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define I2S_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define I2S_PSEL_SCK_PIN_Msk (0x1FUL << I2S_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: I2S_PSEL_LRCK */ +/* Description: Pin select for LRCK signal. */ + +/* Bit 31 : Connection */ +#define I2S_PSEL_LRCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define I2S_PSEL_LRCK_CONNECT_Msk (0x1UL << I2S_PSEL_LRCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define I2S_PSEL_LRCK_CONNECT_Connected (0UL) /*!< Connect */ +#define I2S_PSEL_LRCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define I2S_PSEL_LRCK_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define I2S_PSEL_LRCK_PORT_Msk (0x1UL << I2S_PSEL_LRCK_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define I2S_PSEL_LRCK_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define I2S_PSEL_LRCK_PIN_Msk (0x1FUL << I2S_PSEL_LRCK_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: I2S_PSEL_SDIN */ +/* Description: Pin select for SDIN signal. */ + +/* Bit 31 : Connection */ +#define I2S_PSEL_SDIN_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define I2S_PSEL_SDIN_CONNECT_Msk (0x1UL << I2S_PSEL_SDIN_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define I2S_PSEL_SDIN_CONNECT_Connected (0UL) /*!< Connect */ +#define I2S_PSEL_SDIN_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define I2S_PSEL_SDIN_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define I2S_PSEL_SDIN_PORT_Msk (0x1UL << I2S_PSEL_SDIN_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define I2S_PSEL_SDIN_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define I2S_PSEL_SDIN_PIN_Msk (0x1FUL << I2S_PSEL_SDIN_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: I2S_PSEL_SDOUT */ +/* Description: Pin select for SDOUT signal. */ + +/* Bit 31 : Connection */ +#define I2S_PSEL_SDOUT_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define I2S_PSEL_SDOUT_CONNECT_Msk (0x1UL << I2S_PSEL_SDOUT_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define I2S_PSEL_SDOUT_CONNECT_Connected (0UL) /*!< Connect */ +#define I2S_PSEL_SDOUT_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define I2S_PSEL_SDOUT_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define I2S_PSEL_SDOUT_PORT_Msk (0x1UL << I2S_PSEL_SDOUT_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define I2S_PSEL_SDOUT_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define I2S_PSEL_SDOUT_PIN_Msk (0x1FUL << I2S_PSEL_SDOUT_PIN_Pos) /*!< Bit mask of PIN field. */ + + +/* Peripheral: LPCOMP */ +/* Description: Low Power Comparator */ + +/* Register: LPCOMP_TASKS_START */ +/* Description: Start comparator */ + +/* Bit 0 : */ +#define LPCOMP_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define LPCOMP_TASKS_START_TASKS_START_Msk (0x1UL << LPCOMP_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: LPCOMP_TASKS_STOP */ +/* Description: Stop comparator */ + +/* Bit 0 : */ +#define LPCOMP_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define LPCOMP_TASKS_STOP_TASKS_STOP_Msk (0x1UL << LPCOMP_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: LPCOMP_TASKS_SAMPLE */ +/* Description: Sample comparator value */ + +/* Bit 0 : */ +#define LPCOMP_TASKS_SAMPLE_TASKS_SAMPLE_Pos (0UL) /*!< Position of TASKS_SAMPLE field. */ +#define LPCOMP_TASKS_SAMPLE_TASKS_SAMPLE_Msk (0x1UL << LPCOMP_TASKS_SAMPLE_TASKS_SAMPLE_Pos) /*!< Bit mask of TASKS_SAMPLE field. */ + +/* Register: LPCOMP_EVENTS_READY */ +/* Description: LPCOMP is ready and output is valid */ + +/* Bit 0 : */ +#define LPCOMP_EVENTS_READY_EVENTS_READY_Pos (0UL) /*!< Position of EVENTS_READY field. */ +#define LPCOMP_EVENTS_READY_EVENTS_READY_Msk (0x1UL << LPCOMP_EVENTS_READY_EVENTS_READY_Pos) /*!< Bit mask of EVENTS_READY field. */ + +/* Register: LPCOMP_EVENTS_DOWN */ +/* Description: Downward crossing */ + +/* Bit 0 : */ +#define LPCOMP_EVENTS_DOWN_EVENTS_DOWN_Pos (0UL) /*!< Position of EVENTS_DOWN field. */ +#define LPCOMP_EVENTS_DOWN_EVENTS_DOWN_Msk (0x1UL << LPCOMP_EVENTS_DOWN_EVENTS_DOWN_Pos) /*!< Bit mask of EVENTS_DOWN field. */ + +/* Register: LPCOMP_EVENTS_UP */ +/* Description: Upward crossing */ + +/* Bit 0 : */ +#define LPCOMP_EVENTS_UP_EVENTS_UP_Pos (0UL) /*!< Position of EVENTS_UP field. */ +#define LPCOMP_EVENTS_UP_EVENTS_UP_Msk (0x1UL << LPCOMP_EVENTS_UP_EVENTS_UP_Pos) /*!< Bit mask of EVENTS_UP field. */ + +/* Register: LPCOMP_EVENTS_CROSS */ +/* Description: Downward or upward crossing */ + +/* Bit 0 : */ +#define LPCOMP_EVENTS_CROSS_EVENTS_CROSS_Pos (0UL) /*!< Position of EVENTS_CROSS field. */ +#define LPCOMP_EVENTS_CROSS_EVENTS_CROSS_Msk (0x1UL << LPCOMP_EVENTS_CROSS_EVENTS_CROSS_Pos) /*!< Bit mask of EVENTS_CROSS field. */ + +/* Register: LPCOMP_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 4 : Shortcut between CROSS event and STOP task */ +#define LPCOMP_SHORTS_CROSS_STOP_Pos (4UL) /*!< Position of CROSS_STOP field. */ +#define LPCOMP_SHORTS_CROSS_STOP_Msk (0x1UL << LPCOMP_SHORTS_CROSS_STOP_Pos) /*!< Bit mask of CROSS_STOP field. */ +#define LPCOMP_SHORTS_CROSS_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define LPCOMP_SHORTS_CROSS_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 3 : Shortcut between UP event and STOP task */ +#define LPCOMP_SHORTS_UP_STOP_Pos (3UL) /*!< Position of UP_STOP field. */ +#define LPCOMP_SHORTS_UP_STOP_Msk (0x1UL << LPCOMP_SHORTS_UP_STOP_Pos) /*!< Bit mask of UP_STOP field. */ +#define LPCOMP_SHORTS_UP_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define LPCOMP_SHORTS_UP_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 2 : Shortcut between DOWN event and STOP task */ +#define LPCOMP_SHORTS_DOWN_STOP_Pos (2UL) /*!< Position of DOWN_STOP field. */ +#define LPCOMP_SHORTS_DOWN_STOP_Msk (0x1UL << LPCOMP_SHORTS_DOWN_STOP_Pos) /*!< Bit mask of DOWN_STOP field. */ +#define LPCOMP_SHORTS_DOWN_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define LPCOMP_SHORTS_DOWN_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 1 : Shortcut between READY event and STOP task */ +#define LPCOMP_SHORTS_READY_STOP_Pos (1UL) /*!< Position of READY_STOP field. */ +#define LPCOMP_SHORTS_READY_STOP_Msk (0x1UL << LPCOMP_SHORTS_READY_STOP_Pos) /*!< Bit mask of READY_STOP field. */ +#define LPCOMP_SHORTS_READY_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define LPCOMP_SHORTS_READY_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 0 : Shortcut between READY event and SAMPLE task */ +#define LPCOMP_SHORTS_READY_SAMPLE_Pos (0UL) /*!< Position of READY_SAMPLE field. */ +#define LPCOMP_SHORTS_READY_SAMPLE_Msk (0x1UL << LPCOMP_SHORTS_READY_SAMPLE_Pos) /*!< Bit mask of READY_SAMPLE field. */ +#define LPCOMP_SHORTS_READY_SAMPLE_Disabled (0UL) /*!< Disable shortcut */ +#define LPCOMP_SHORTS_READY_SAMPLE_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: LPCOMP_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 3 : Write '1' to enable interrupt for CROSS event */ +#define LPCOMP_INTENSET_CROSS_Pos (3UL) /*!< Position of CROSS field. */ +#define LPCOMP_INTENSET_CROSS_Msk (0x1UL << LPCOMP_INTENSET_CROSS_Pos) /*!< Bit mask of CROSS field. */ +#define LPCOMP_INTENSET_CROSS_Disabled (0UL) /*!< Read: Disabled */ +#define LPCOMP_INTENSET_CROSS_Enabled (1UL) /*!< Read: Enabled */ +#define LPCOMP_INTENSET_CROSS_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to enable interrupt for UP event */ +#define LPCOMP_INTENSET_UP_Pos (2UL) /*!< Position of UP field. */ +#define LPCOMP_INTENSET_UP_Msk (0x1UL << LPCOMP_INTENSET_UP_Pos) /*!< Bit mask of UP field. */ +#define LPCOMP_INTENSET_UP_Disabled (0UL) /*!< Read: Disabled */ +#define LPCOMP_INTENSET_UP_Enabled (1UL) /*!< Read: Enabled */ +#define LPCOMP_INTENSET_UP_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable interrupt for DOWN event */ +#define LPCOMP_INTENSET_DOWN_Pos (1UL) /*!< Position of DOWN field. */ +#define LPCOMP_INTENSET_DOWN_Msk (0x1UL << LPCOMP_INTENSET_DOWN_Pos) /*!< Bit mask of DOWN field. */ +#define LPCOMP_INTENSET_DOWN_Disabled (0UL) /*!< Read: Disabled */ +#define LPCOMP_INTENSET_DOWN_Enabled (1UL) /*!< Read: Enabled */ +#define LPCOMP_INTENSET_DOWN_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to enable interrupt for READY event */ +#define LPCOMP_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */ +#define LPCOMP_INTENSET_READY_Msk (0x1UL << LPCOMP_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ +#define LPCOMP_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */ +#define LPCOMP_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */ +#define LPCOMP_INTENSET_READY_Set (1UL) /*!< Enable */ + +/* Register: LPCOMP_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 3 : Write '1' to disable interrupt for CROSS event */ +#define LPCOMP_INTENCLR_CROSS_Pos (3UL) /*!< Position of CROSS field. */ +#define LPCOMP_INTENCLR_CROSS_Msk (0x1UL << LPCOMP_INTENCLR_CROSS_Pos) /*!< Bit mask of CROSS field. */ +#define LPCOMP_INTENCLR_CROSS_Disabled (0UL) /*!< Read: Disabled */ +#define LPCOMP_INTENCLR_CROSS_Enabled (1UL) /*!< Read: Enabled */ +#define LPCOMP_INTENCLR_CROSS_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to disable interrupt for UP event */ +#define LPCOMP_INTENCLR_UP_Pos (2UL) /*!< Position of UP field. */ +#define LPCOMP_INTENCLR_UP_Msk (0x1UL << LPCOMP_INTENCLR_UP_Pos) /*!< Bit mask of UP field. */ +#define LPCOMP_INTENCLR_UP_Disabled (0UL) /*!< Read: Disabled */ +#define LPCOMP_INTENCLR_UP_Enabled (1UL) /*!< Read: Enabled */ +#define LPCOMP_INTENCLR_UP_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable interrupt for DOWN event */ +#define LPCOMP_INTENCLR_DOWN_Pos (1UL) /*!< Position of DOWN field. */ +#define LPCOMP_INTENCLR_DOWN_Msk (0x1UL << LPCOMP_INTENCLR_DOWN_Pos) /*!< Bit mask of DOWN field. */ +#define LPCOMP_INTENCLR_DOWN_Disabled (0UL) /*!< Read: Disabled */ +#define LPCOMP_INTENCLR_DOWN_Enabled (1UL) /*!< Read: Enabled */ +#define LPCOMP_INTENCLR_DOWN_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to disable interrupt for READY event */ +#define LPCOMP_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */ +#define LPCOMP_INTENCLR_READY_Msk (0x1UL << LPCOMP_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ +#define LPCOMP_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */ +#define LPCOMP_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */ +#define LPCOMP_INTENCLR_READY_Clear (1UL) /*!< Disable */ + +/* Register: LPCOMP_RESULT */ +/* Description: Compare result */ + +/* Bit 0 : Result of last compare. Decision point SAMPLE task. */ +#define LPCOMP_RESULT_RESULT_Pos (0UL) /*!< Position of RESULT field. */ +#define LPCOMP_RESULT_RESULT_Msk (0x1UL << LPCOMP_RESULT_RESULT_Pos) /*!< Bit mask of RESULT field. */ +#define LPCOMP_RESULT_RESULT_Below (0UL) /*!< Input voltage is below the reference threshold (VIN+ < VIN-). */ +#define LPCOMP_RESULT_RESULT_Above (1UL) /*!< Input voltage is above the reference threshold (VIN+ > VIN-). */ + +/* Register: LPCOMP_ENABLE */ +/* Description: Enable LPCOMP */ + +/* Bits 1..0 : Enable or disable LPCOMP */ +#define LPCOMP_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define LPCOMP_ENABLE_ENABLE_Msk (0x3UL << LPCOMP_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define LPCOMP_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ +#define LPCOMP_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */ + +/* Register: LPCOMP_PSEL */ +/* Description: Input pin select */ + +/* Bits 2..0 : Analog pin select */ +#define LPCOMP_PSEL_PSEL_Pos (0UL) /*!< Position of PSEL field. */ +#define LPCOMP_PSEL_PSEL_Msk (0x7UL << LPCOMP_PSEL_PSEL_Pos) /*!< Bit mask of PSEL field. */ +#define LPCOMP_PSEL_PSEL_AnalogInput0 (0UL) /*!< AIN0 selected as analog input */ +#define LPCOMP_PSEL_PSEL_AnalogInput1 (1UL) /*!< AIN1 selected as analog input */ +#define LPCOMP_PSEL_PSEL_AnalogInput2 (2UL) /*!< AIN2 selected as analog input */ +#define LPCOMP_PSEL_PSEL_AnalogInput3 (3UL) /*!< AIN3 selected as analog input */ +#define LPCOMP_PSEL_PSEL_AnalogInput4 (4UL) /*!< AIN4 selected as analog input */ +#define LPCOMP_PSEL_PSEL_AnalogInput5 (5UL) /*!< AIN5 selected as analog input */ +#define LPCOMP_PSEL_PSEL_AnalogInput6 (6UL) /*!< AIN6 selected as analog input */ +#define LPCOMP_PSEL_PSEL_AnalogInput7 (7UL) /*!< AIN7 selected as analog input */ + +/* Register: LPCOMP_REFSEL */ +/* Description: Reference select */ + +/* Bits 3..0 : Reference select */ +#define LPCOMP_REFSEL_REFSEL_Pos (0UL) /*!< Position of REFSEL field. */ +#define LPCOMP_REFSEL_REFSEL_Msk (0xFUL << LPCOMP_REFSEL_REFSEL_Pos) /*!< Bit mask of REFSEL field. */ +#define LPCOMP_REFSEL_REFSEL_Ref1_8Vdd (0UL) /*!< VDD * 1/8 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref2_8Vdd (1UL) /*!< VDD * 2/8 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref3_8Vdd (2UL) /*!< VDD * 3/8 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref4_8Vdd (3UL) /*!< VDD * 4/8 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref5_8Vdd (4UL) /*!< VDD * 5/8 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref6_8Vdd (5UL) /*!< VDD * 6/8 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref7_8Vdd (6UL) /*!< VDD * 7/8 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_ARef (7UL) /*!< External analog reference selected */ +#define LPCOMP_REFSEL_REFSEL_Ref1_16Vdd (8UL) /*!< VDD * 1/16 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref3_16Vdd (9UL) /*!< VDD * 3/16 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref5_16Vdd (10UL) /*!< VDD * 5/16 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref7_16Vdd (11UL) /*!< VDD * 7/16 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref9_16Vdd (12UL) /*!< VDD * 9/16 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref11_16Vdd (13UL) /*!< VDD * 11/16 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref13_16Vdd (14UL) /*!< VDD * 13/16 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref15_16Vdd (15UL) /*!< VDD * 15/16 selected as reference */ + +/* Register: LPCOMP_EXTREFSEL */ +/* Description: External reference select */ + +/* Bit 0 : External analog reference select */ +#define LPCOMP_EXTREFSEL_EXTREFSEL_Pos (0UL) /*!< Position of EXTREFSEL field. */ +#define LPCOMP_EXTREFSEL_EXTREFSEL_Msk (0x1UL << LPCOMP_EXTREFSEL_EXTREFSEL_Pos) /*!< Bit mask of EXTREFSEL field. */ +#define LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference0 (0UL) /*!< Use AIN0 as external analog reference */ +#define LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference1 (1UL) /*!< Use AIN1 as external analog reference */ + +/* Register: LPCOMP_ANADETECT */ +/* Description: Analog detect configuration */ + +/* Bits 1..0 : Analog detect configuration */ +#define LPCOMP_ANADETECT_ANADETECT_Pos (0UL) /*!< Position of ANADETECT field. */ +#define LPCOMP_ANADETECT_ANADETECT_Msk (0x3UL << LPCOMP_ANADETECT_ANADETECT_Pos) /*!< Bit mask of ANADETECT field. */ +#define LPCOMP_ANADETECT_ANADETECT_Cross (0UL) /*!< Generate ANADETECT on crossing, both upward crossing and downward crossing */ +#define LPCOMP_ANADETECT_ANADETECT_Up (1UL) /*!< Generate ANADETECT on upward crossing only */ +#define LPCOMP_ANADETECT_ANADETECT_Down (2UL) /*!< Generate ANADETECT on downward crossing only */ + +/* Register: LPCOMP_HYST */ +/* Description: Comparator hysteresis enable */ + +/* Bit 0 : Comparator hysteresis enable */ +#define LPCOMP_HYST_HYST_Pos (0UL) /*!< Position of HYST field. */ +#define LPCOMP_HYST_HYST_Msk (0x1UL << LPCOMP_HYST_HYST_Pos) /*!< Bit mask of HYST field. */ +#define LPCOMP_HYST_HYST_Disabled (0UL) /*!< Comparator hysteresis disabled */ +#define LPCOMP_HYST_HYST_Enabled (1UL) /*!< Comparator hysteresis enabled */ + + +/* Peripheral: MWU */ +/* Description: Memory Watch Unit */ + +/* Register: MWU_EVENTS_REGION_WA */ +/* Description: Description cluster[n]: Write access to region n detected */ + +/* Bit 0 : */ +#define MWU_EVENTS_REGION_WA_WA_Pos (0UL) /*!< Position of WA field. */ +#define MWU_EVENTS_REGION_WA_WA_Msk (0x1UL << MWU_EVENTS_REGION_WA_WA_Pos) /*!< Bit mask of WA field. */ + +/* Register: MWU_EVENTS_REGION_RA */ +/* Description: Description cluster[n]: Read access to region n detected */ + +/* Bit 0 : */ +#define MWU_EVENTS_REGION_RA_RA_Pos (0UL) /*!< Position of RA field. */ +#define MWU_EVENTS_REGION_RA_RA_Msk (0x1UL << MWU_EVENTS_REGION_RA_RA_Pos) /*!< Bit mask of RA field. */ + +/* Register: MWU_EVENTS_PREGION_WA */ +/* Description: Description cluster[n]: Write access to peripheral region n detected */ + +/* Bit 0 : */ +#define MWU_EVENTS_PREGION_WA_WA_Pos (0UL) /*!< Position of WA field. */ +#define MWU_EVENTS_PREGION_WA_WA_Msk (0x1UL << MWU_EVENTS_PREGION_WA_WA_Pos) /*!< Bit mask of WA field. */ + +/* Register: MWU_EVENTS_PREGION_RA */ +/* Description: Description cluster[n]: Read access to peripheral region n detected */ + +/* Bit 0 : */ +#define MWU_EVENTS_PREGION_RA_RA_Pos (0UL) /*!< Position of RA field. */ +#define MWU_EVENTS_PREGION_RA_RA_Msk (0x1UL << MWU_EVENTS_PREGION_RA_RA_Pos) /*!< Bit mask of RA field. */ + +/* Register: MWU_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 27 : Enable or disable interrupt for PREGION[1].RA event */ +#define MWU_INTEN_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */ +#define MWU_INTEN_PREGION1RA_Msk (0x1UL << MWU_INTEN_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */ +#define MWU_INTEN_PREGION1RA_Disabled (0UL) /*!< Disable */ +#define MWU_INTEN_PREGION1RA_Enabled (1UL) /*!< Enable */ + +/* Bit 26 : Enable or disable interrupt for PREGION[1].WA event */ +#define MWU_INTEN_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */ +#define MWU_INTEN_PREGION1WA_Msk (0x1UL << MWU_INTEN_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */ +#define MWU_INTEN_PREGION1WA_Disabled (0UL) /*!< Disable */ +#define MWU_INTEN_PREGION1WA_Enabled (1UL) /*!< Enable */ + +/* Bit 25 : Enable or disable interrupt for PREGION[0].RA event */ +#define MWU_INTEN_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */ +#define MWU_INTEN_PREGION0RA_Msk (0x1UL << MWU_INTEN_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */ +#define MWU_INTEN_PREGION0RA_Disabled (0UL) /*!< Disable */ +#define MWU_INTEN_PREGION0RA_Enabled (1UL) /*!< Enable */ + +/* Bit 24 : Enable or disable interrupt for PREGION[0].WA event */ +#define MWU_INTEN_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */ +#define MWU_INTEN_PREGION0WA_Msk (0x1UL << MWU_INTEN_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */ +#define MWU_INTEN_PREGION0WA_Disabled (0UL) /*!< Disable */ +#define MWU_INTEN_PREGION0WA_Enabled (1UL) /*!< Enable */ + +/* Bit 7 : Enable or disable interrupt for REGION[3].RA event */ +#define MWU_INTEN_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */ +#define MWU_INTEN_REGION3RA_Msk (0x1UL << MWU_INTEN_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */ +#define MWU_INTEN_REGION3RA_Disabled (0UL) /*!< Disable */ +#define MWU_INTEN_REGION3RA_Enabled (1UL) /*!< Enable */ + +/* Bit 6 : Enable or disable interrupt for REGION[3].WA event */ +#define MWU_INTEN_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */ +#define MWU_INTEN_REGION3WA_Msk (0x1UL << MWU_INTEN_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */ +#define MWU_INTEN_REGION3WA_Disabled (0UL) /*!< Disable */ +#define MWU_INTEN_REGION3WA_Enabled (1UL) /*!< Enable */ + +/* Bit 5 : Enable or disable interrupt for REGION[2].RA event */ +#define MWU_INTEN_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */ +#define MWU_INTEN_REGION2RA_Msk (0x1UL << MWU_INTEN_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */ +#define MWU_INTEN_REGION2RA_Disabled (0UL) /*!< Disable */ +#define MWU_INTEN_REGION2RA_Enabled (1UL) /*!< Enable */ + +/* Bit 4 : Enable or disable interrupt for REGION[2].WA event */ +#define MWU_INTEN_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */ +#define MWU_INTEN_REGION2WA_Msk (0x1UL << MWU_INTEN_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */ +#define MWU_INTEN_REGION2WA_Disabled (0UL) /*!< Disable */ +#define MWU_INTEN_REGION2WA_Enabled (1UL) /*!< Enable */ + +/* Bit 3 : Enable or disable interrupt for REGION[1].RA event */ +#define MWU_INTEN_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */ +#define MWU_INTEN_REGION1RA_Msk (0x1UL << MWU_INTEN_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */ +#define MWU_INTEN_REGION1RA_Disabled (0UL) /*!< Disable */ +#define MWU_INTEN_REGION1RA_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable interrupt for REGION[1].WA event */ +#define MWU_INTEN_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */ +#define MWU_INTEN_REGION1WA_Msk (0x1UL << MWU_INTEN_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */ +#define MWU_INTEN_REGION1WA_Disabled (0UL) /*!< Disable */ +#define MWU_INTEN_REGION1WA_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for REGION[0].RA event */ +#define MWU_INTEN_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */ +#define MWU_INTEN_REGION0RA_Msk (0x1UL << MWU_INTEN_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */ +#define MWU_INTEN_REGION0RA_Disabled (0UL) /*!< Disable */ +#define MWU_INTEN_REGION0RA_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable interrupt for REGION[0].WA event */ +#define MWU_INTEN_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */ +#define MWU_INTEN_REGION0WA_Msk (0x1UL << MWU_INTEN_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */ +#define MWU_INTEN_REGION0WA_Disabled (0UL) /*!< Disable */ +#define MWU_INTEN_REGION0WA_Enabled (1UL) /*!< Enable */ + +/* Register: MWU_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 27 : Write '1' to enable interrupt for PREGION[1].RA event */ +#define MWU_INTENSET_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */ +#define MWU_INTENSET_PREGION1RA_Msk (0x1UL << MWU_INTENSET_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */ +#define MWU_INTENSET_PREGION1RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENSET_PREGION1RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENSET_PREGION1RA_Set (1UL) /*!< Enable */ + +/* Bit 26 : Write '1' to enable interrupt for PREGION[1].WA event */ +#define MWU_INTENSET_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */ +#define MWU_INTENSET_PREGION1WA_Msk (0x1UL << MWU_INTENSET_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */ +#define MWU_INTENSET_PREGION1WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENSET_PREGION1WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENSET_PREGION1WA_Set (1UL) /*!< Enable */ + +/* Bit 25 : Write '1' to enable interrupt for PREGION[0].RA event */ +#define MWU_INTENSET_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */ +#define MWU_INTENSET_PREGION0RA_Msk (0x1UL << MWU_INTENSET_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */ +#define MWU_INTENSET_PREGION0RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENSET_PREGION0RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENSET_PREGION0RA_Set (1UL) /*!< Enable */ + +/* Bit 24 : Write '1' to enable interrupt for PREGION[0].WA event */ +#define MWU_INTENSET_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */ +#define MWU_INTENSET_PREGION0WA_Msk (0x1UL << MWU_INTENSET_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */ +#define MWU_INTENSET_PREGION0WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENSET_PREGION0WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENSET_PREGION0WA_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to enable interrupt for REGION[3].RA event */ +#define MWU_INTENSET_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */ +#define MWU_INTENSET_REGION3RA_Msk (0x1UL << MWU_INTENSET_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */ +#define MWU_INTENSET_REGION3RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENSET_REGION3RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENSET_REGION3RA_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to enable interrupt for REGION[3].WA event */ +#define MWU_INTENSET_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */ +#define MWU_INTENSET_REGION3WA_Msk (0x1UL << MWU_INTENSET_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */ +#define MWU_INTENSET_REGION3WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENSET_REGION3WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENSET_REGION3WA_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to enable interrupt for REGION[2].RA event */ +#define MWU_INTENSET_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */ +#define MWU_INTENSET_REGION2RA_Msk (0x1UL << MWU_INTENSET_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */ +#define MWU_INTENSET_REGION2RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENSET_REGION2RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENSET_REGION2RA_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to enable interrupt for REGION[2].WA event */ +#define MWU_INTENSET_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */ +#define MWU_INTENSET_REGION2WA_Msk (0x1UL << MWU_INTENSET_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */ +#define MWU_INTENSET_REGION2WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENSET_REGION2WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENSET_REGION2WA_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to enable interrupt for REGION[1].RA event */ +#define MWU_INTENSET_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */ +#define MWU_INTENSET_REGION1RA_Msk (0x1UL << MWU_INTENSET_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */ +#define MWU_INTENSET_REGION1RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENSET_REGION1RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENSET_REGION1RA_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to enable interrupt for REGION[1].WA event */ +#define MWU_INTENSET_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */ +#define MWU_INTENSET_REGION1WA_Msk (0x1UL << MWU_INTENSET_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */ +#define MWU_INTENSET_REGION1WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENSET_REGION1WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENSET_REGION1WA_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable interrupt for REGION[0].RA event */ +#define MWU_INTENSET_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */ +#define MWU_INTENSET_REGION0RA_Msk (0x1UL << MWU_INTENSET_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */ +#define MWU_INTENSET_REGION0RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENSET_REGION0RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENSET_REGION0RA_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to enable interrupt for REGION[0].WA event */ +#define MWU_INTENSET_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */ +#define MWU_INTENSET_REGION0WA_Msk (0x1UL << MWU_INTENSET_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */ +#define MWU_INTENSET_REGION0WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENSET_REGION0WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENSET_REGION0WA_Set (1UL) /*!< Enable */ + +/* Register: MWU_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 27 : Write '1' to disable interrupt for PREGION[1].RA event */ +#define MWU_INTENCLR_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */ +#define MWU_INTENCLR_PREGION1RA_Msk (0x1UL << MWU_INTENCLR_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */ +#define MWU_INTENCLR_PREGION1RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENCLR_PREGION1RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENCLR_PREGION1RA_Clear (1UL) /*!< Disable */ + +/* Bit 26 : Write '1' to disable interrupt for PREGION[1].WA event */ +#define MWU_INTENCLR_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */ +#define MWU_INTENCLR_PREGION1WA_Msk (0x1UL << MWU_INTENCLR_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */ +#define MWU_INTENCLR_PREGION1WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENCLR_PREGION1WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENCLR_PREGION1WA_Clear (1UL) /*!< Disable */ + +/* Bit 25 : Write '1' to disable interrupt for PREGION[0].RA event */ +#define MWU_INTENCLR_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */ +#define MWU_INTENCLR_PREGION0RA_Msk (0x1UL << MWU_INTENCLR_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */ +#define MWU_INTENCLR_PREGION0RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENCLR_PREGION0RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENCLR_PREGION0RA_Clear (1UL) /*!< Disable */ + +/* Bit 24 : Write '1' to disable interrupt for PREGION[0].WA event */ +#define MWU_INTENCLR_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */ +#define MWU_INTENCLR_PREGION0WA_Msk (0x1UL << MWU_INTENCLR_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */ +#define MWU_INTENCLR_PREGION0WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENCLR_PREGION0WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENCLR_PREGION0WA_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to disable interrupt for REGION[3].RA event */ +#define MWU_INTENCLR_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */ +#define MWU_INTENCLR_REGION3RA_Msk (0x1UL << MWU_INTENCLR_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */ +#define MWU_INTENCLR_REGION3RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENCLR_REGION3RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENCLR_REGION3RA_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to disable interrupt for REGION[3].WA event */ +#define MWU_INTENCLR_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */ +#define MWU_INTENCLR_REGION3WA_Msk (0x1UL << MWU_INTENCLR_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */ +#define MWU_INTENCLR_REGION3WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENCLR_REGION3WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENCLR_REGION3WA_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to disable interrupt for REGION[2].RA event */ +#define MWU_INTENCLR_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */ +#define MWU_INTENCLR_REGION2RA_Msk (0x1UL << MWU_INTENCLR_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */ +#define MWU_INTENCLR_REGION2RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENCLR_REGION2RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENCLR_REGION2RA_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to disable interrupt for REGION[2].WA event */ +#define MWU_INTENCLR_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */ +#define MWU_INTENCLR_REGION2WA_Msk (0x1UL << MWU_INTENCLR_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */ +#define MWU_INTENCLR_REGION2WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENCLR_REGION2WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENCLR_REGION2WA_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to disable interrupt for REGION[1].RA event */ +#define MWU_INTENCLR_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */ +#define MWU_INTENCLR_REGION1RA_Msk (0x1UL << MWU_INTENCLR_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */ +#define MWU_INTENCLR_REGION1RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENCLR_REGION1RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENCLR_REGION1RA_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to disable interrupt for REGION[1].WA event */ +#define MWU_INTENCLR_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */ +#define MWU_INTENCLR_REGION1WA_Msk (0x1UL << MWU_INTENCLR_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */ +#define MWU_INTENCLR_REGION1WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENCLR_REGION1WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENCLR_REGION1WA_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable interrupt for REGION[0].RA event */ +#define MWU_INTENCLR_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */ +#define MWU_INTENCLR_REGION0RA_Msk (0x1UL << MWU_INTENCLR_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */ +#define MWU_INTENCLR_REGION0RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENCLR_REGION0RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENCLR_REGION0RA_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to disable interrupt for REGION[0].WA event */ +#define MWU_INTENCLR_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */ +#define MWU_INTENCLR_REGION0WA_Msk (0x1UL << MWU_INTENCLR_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */ +#define MWU_INTENCLR_REGION0WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENCLR_REGION0WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENCLR_REGION0WA_Clear (1UL) /*!< Disable */ + +/* Register: MWU_NMIEN */ +/* Description: Enable or disable non-maskable interrupt */ + +/* Bit 27 : Enable or disable non-maskable interrupt for PREGION[1].RA event */ +#define MWU_NMIEN_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */ +#define MWU_NMIEN_PREGION1RA_Msk (0x1UL << MWU_NMIEN_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */ +#define MWU_NMIEN_PREGION1RA_Disabled (0UL) /*!< Disable */ +#define MWU_NMIEN_PREGION1RA_Enabled (1UL) /*!< Enable */ + +/* Bit 26 : Enable or disable non-maskable interrupt for PREGION[1].WA event */ +#define MWU_NMIEN_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */ +#define MWU_NMIEN_PREGION1WA_Msk (0x1UL << MWU_NMIEN_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */ +#define MWU_NMIEN_PREGION1WA_Disabled (0UL) /*!< Disable */ +#define MWU_NMIEN_PREGION1WA_Enabled (1UL) /*!< Enable */ + +/* Bit 25 : Enable or disable non-maskable interrupt for PREGION[0].RA event */ +#define MWU_NMIEN_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */ +#define MWU_NMIEN_PREGION0RA_Msk (0x1UL << MWU_NMIEN_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */ +#define MWU_NMIEN_PREGION0RA_Disabled (0UL) /*!< Disable */ +#define MWU_NMIEN_PREGION0RA_Enabled (1UL) /*!< Enable */ + +/* Bit 24 : Enable or disable non-maskable interrupt for PREGION[0].WA event */ +#define MWU_NMIEN_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */ +#define MWU_NMIEN_PREGION0WA_Msk (0x1UL << MWU_NMIEN_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */ +#define MWU_NMIEN_PREGION0WA_Disabled (0UL) /*!< Disable */ +#define MWU_NMIEN_PREGION0WA_Enabled (1UL) /*!< Enable */ + +/* Bit 7 : Enable or disable non-maskable interrupt for REGION[3].RA event */ +#define MWU_NMIEN_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */ +#define MWU_NMIEN_REGION3RA_Msk (0x1UL << MWU_NMIEN_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */ +#define MWU_NMIEN_REGION3RA_Disabled (0UL) /*!< Disable */ +#define MWU_NMIEN_REGION3RA_Enabled (1UL) /*!< Enable */ + +/* Bit 6 : Enable or disable non-maskable interrupt for REGION[3].WA event */ +#define MWU_NMIEN_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */ +#define MWU_NMIEN_REGION3WA_Msk (0x1UL << MWU_NMIEN_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */ +#define MWU_NMIEN_REGION3WA_Disabled (0UL) /*!< Disable */ +#define MWU_NMIEN_REGION3WA_Enabled (1UL) /*!< Enable */ + +/* Bit 5 : Enable or disable non-maskable interrupt for REGION[2].RA event */ +#define MWU_NMIEN_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */ +#define MWU_NMIEN_REGION2RA_Msk (0x1UL << MWU_NMIEN_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */ +#define MWU_NMIEN_REGION2RA_Disabled (0UL) /*!< Disable */ +#define MWU_NMIEN_REGION2RA_Enabled (1UL) /*!< Enable */ + +/* Bit 4 : Enable or disable non-maskable interrupt for REGION[2].WA event */ +#define MWU_NMIEN_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */ +#define MWU_NMIEN_REGION2WA_Msk (0x1UL << MWU_NMIEN_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */ +#define MWU_NMIEN_REGION2WA_Disabled (0UL) /*!< Disable */ +#define MWU_NMIEN_REGION2WA_Enabled (1UL) /*!< Enable */ + +/* Bit 3 : Enable or disable non-maskable interrupt for REGION[1].RA event */ +#define MWU_NMIEN_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */ +#define MWU_NMIEN_REGION1RA_Msk (0x1UL << MWU_NMIEN_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */ +#define MWU_NMIEN_REGION1RA_Disabled (0UL) /*!< Disable */ +#define MWU_NMIEN_REGION1RA_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable non-maskable interrupt for REGION[1].WA event */ +#define MWU_NMIEN_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */ +#define MWU_NMIEN_REGION1WA_Msk (0x1UL << MWU_NMIEN_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */ +#define MWU_NMIEN_REGION1WA_Disabled (0UL) /*!< Disable */ +#define MWU_NMIEN_REGION1WA_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable non-maskable interrupt for REGION[0].RA event */ +#define MWU_NMIEN_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */ +#define MWU_NMIEN_REGION0RA_Msk (0x1UL << MWU_NMIEN_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */ +#define MWU_NMIEN_REGION0RA_Disabled (0UL) /*!< Disable */ +#define MWU_NMIEN_REGION0RA_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable non-maskable interrupt for REGION[0].WA event */ +#define MWU_NMIEN_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */ +#define MWU_NMIEN_REGION0WA_Msk (0x1UL << MWU_NMIEN_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */ +#define MWU_NMIEN_REGION0WA_Disabled (0UL) /*!< Disable */ +#define MWU_NMIEN_REGION0WA_Enabled (1UL) /*!< Enable */ + +/* Register: MWU_NMIENSET */ +/* Description: Enable non-maskable interrupt */ + +/* Bit 27 : Write '1' to enable non-maskable interrupt for PREGION[1].RA event */ +#define MWU_NMIENSET_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */ +#define MWU_NMIENSET_PREGION1RA_Msk (0x1UL << MWU_NMIENSET_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */ +#define MWU_NMIENSET_PREGION1RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENSET_PREGION1RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENSET_PREGION1RA_Set (1UL) /*!< Enable */ + +/* Bit 26 : Write '1' to enable non-maskable interrupt for PREGION[1].WA event */ +#define MWU_NMIENSET_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */ +#define MWU_NMIENSET_PREGION1WA_Msk (0x1UL << MWU_NMIENSET_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */ +#define MWU_NMIENSET_PREGION1WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENSET_PREGION1WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENSET_PREGION1WA_Set (1UL) /*!< Enable */ + +/* Bit 25 : Write '1' to enable non-maskable interrupt for PREGION[0].RA event */ +#define MWU_NMIENSET_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */ +#define MWU_NMIENSET_PREGION0RA_Msk (0x1UL << MWU_NMIENSET_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */ +#define MWU_NMIENSET_PREGION0RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENSET_PREGION0RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENSET_PREGION0RA_Set (1UL) /*!< Enable */ + +/* Bit 24 : Write '1' to enable non-maskable interrupt for PREGION[0].WA event */ +#define MWU_NMIENSET_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */ +#define MWU_NMIENSET_PREGION0WA_Msk (0x1UL << MWU_NMIENSET_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */ +#define MWU_NMIENSET_PREGION0WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENSET_PREGION0WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENSET_PREGION0WA_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to enable non-maskable interrupt for REGION[3].RA event */ +#define MWU_NMIENSET_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */ +#define MWU_NMIENSET_REGION3RA_Msk (0x1UL << MWU_NMIENSET_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */ +#define MWU_NMIENSET_REGION3RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENSET_REGION3RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENSET_REGION3RA_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to enable non-maskable interrupt for REGION[3].WA event */ +#define MWU_NMIENSET_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */ +#define MWU_NMIENSET_REGION3WA_Msk (0x1UL << MWU_NMIENSET_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */ +#define MWU_NMIENSET_REGION3WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENSET_REGION3WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENSET_REGION3WA_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to enable non-maskable interrupt for REGION[2].RA event */ +#define MWU_NMIENSET_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */ +#define MWU_NMIENSET_REGION2RA_Msk (0x1UL << MWU_NMIENSET_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */ +#define MWU_NMIENSET_REGION2RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENSET_REGION2RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENSET_REGION2RA_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to enable non-maskable interrupt for REGION[2].WA event */ +#define MWU_NMIENSET_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */ +#define MWU_NMIENSET_REGION2WA_Msk (0x1UL << MWU_NMIENSET_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */ +#define MWU_NMIENSET_REGION2WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENSET_REGION2WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENSET_REGION2WA_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to enable non-maskable interrupt for REGION[1].RA event */ +#define MWU_NMIENSET_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */ +#define MWU_NMIENSET_REGION1RA_Msk (0x1UL << MWU_NMIENSET_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */ +#define MWU_NMIENSET_REGION1RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENSET_REGION1RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENSET_REGION1RA_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to enable non-maskable interrupt for REGION[1].WA event */ +#define MWU_NMIENSET_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */ +#define MWU_NMIENSET_REGION1WA_Msk (0x1UL << MWU_NMIENSET_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */ +#define MWU_NMIENSET_REGION1WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENSET_REGION1WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENSET_REGION1WA_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable non-maskable interrupt for REGION[0].RA event */ +#define MWU_NMIENSET_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */ +#define MWU_NMIENSET_REGION0RA_Msk (0x1UL << MWU_NMIENSET_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */ +#define MWU_NMIENSET_REGION0RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENSET_REGION0RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENSET_REGION0RA_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to enable non-maskable interrupt for REGION[0].WA event */ +#define MWU_NMIENSET_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */ +#define MWU_NMIENSET_REGION0WA_Msk (0x1UL << MWU_NMIENSET_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */ +#define MWU_NMIENSET_REGION0WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENSET_REGION0WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENSET_REGION0WA_Set (1UL) /*!< Enable */ + +/* Register: MWU_NMIENCLR */ +/* Description: Disable non-maskable interrupt */ + +/* Bit 27 : Write '1' to disable non-maskable interrupt for PREGION[1].RA event */ +#define MWU_NMIENCLR_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */ +#define MWU_NMIENCLR_PREGION1RA_Msk (0x1UL << MWU_NMIENCLR_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */ +#define MWU_NMIENCLR_PREGION1RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENCLR_PREGION1RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENCLR_PREGION1RA_Clear (1UL) /*!< Disable */ + +/* Bit 26 : Write '1' to disable non-maskable interrupt for PREGION[1].WA event */ +#define MWU_NMIENCLR_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */ +#define MWU_NMIENCLR_PREGION1WA_Msk (0x1UL << MWU_NMIENCLR_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */ +#define MWU_NMIENCLR_PREGION1WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENCLR_PREGION1WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENCLR_PREGION1WA_Clear (1UL) /*!< Disable */ + +/* Bit 25 : Write '1' to disable non-maskable interrupt for PREGION[0].RA event */ +#define MWU_NMIENCLR_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */ +#define MWU_NMIENCLR_PREGION0RA_Msk (0x1UL << MWU_NMIENCLR_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */ +#define MWU_NMIENCLR_PREGION0RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENCLR_PREGION0RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENCLR_PREGION0RA_Clear (1UL) /*!< Disable */ + +/* Bit 24 : Write '1' to disable non-maskable interrupt for PREGION[0].WA event */ +#define MWU_NMIENCLR_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */ +#define MWU_NMIENCLR_PREGION0WA_Msk (0x1UL << MWU_NMIENCLR_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */ +#define MWU_NMIENCLR_PREGION0WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENCLR_PREGION0WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENCLR_PREGION0WA_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to disable non-maskable interrupt for REGION[3].RA event */ +#define MWU_NMIENCLR_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */ +#define MWU_NMIENCLR_REGION3RA_Msk (0x1UL << MWU_NMIENCLR_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */ +#define MWU_NMIENCLR_REGION3RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENCLR_REGION3RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENCLR_REGION3RA_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to disable non-maskable interrupt for REGION[3].WA event */ +#define MWU_NMIENCLR_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */ +#define MWU_NMIENCLR_REGION3WA_Msk (0x1UL << MWU_NMIENCLR_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */ +#define MWU_NMIENCLR_REGION3WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENCLR_REGION3WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENCLR_REGION3WA_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to disable non-maskable interrupt for REGION[2].RA event */ +#define MWU_NMIENCLR_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */ +#define MWU_NMIENCLR_REGION2RA_Msk (0x1UL << MWU_NMIENCLR_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */ +#define MWU_NMIENCLR_REGION2RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENCLR_REGION2RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENCLR_REGION2RA_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to disable non-maskable interrupt for REGION[2].WA event */ +#define MWU_NMIENCLR_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */ +#define MWU_NMIENCLR_REGION2WA_Msk (0x1UL << MWU_NMIENCLR_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */ +#define MWU_NMIENCLR_REGION2WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENCLR_REGION2WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENCLR_REGION2WA_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to disable non-maskable interrupt for REGION[1].RA event */ +#define MWU_NMIENCLR_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */ +#define MWU_NMIENCLR_REGION1RA_Msk (0x1UL << MWU_NMIENCLR_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */ +#define MWU_NMIENCLR_REGION1RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENCLR_REGION1RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENCLR_REGION1RA_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to disable non-maskable interrupt for REGION[1].WA event */ +#define MWU_NMIENCLR_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */ +#define MWU_NMIENCLR_REGION1WA_Msk (0x1UL << MWU_NMIENCLR_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */ +#define MWU_NMIENCLR_REGION1WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENCLR_REGION1WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENCLR_REGION1WA_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable non-maskable interrupt for REGION[0].RA event */ +#define MWU_NMIENCLR_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */ +#define MWU_NMIENCLR_REGION0RA_Msk (0x1UL << MWU_NMIENCLR_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */ +#define MWU_NMIENCLR_REGION0RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENCLR_REGION0RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENCLR_REGION0RA_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to disable non-maskable interrupt for REGION[0].WA event */ +#define MWU_NMIENCLR_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */ +#define MWU_NMIENCLR_REGION0WA_Msk (0x1UL << MWU_NMIENCLR_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */ +#define MWU_NMIENCLR_REGION0WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENCLR_REGION0WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENCLR_REGION0WA_Clear (1UL) /*!< Disable */ + +/* Register: MWU_PERREGION_SUBSTATWA */ +/* Description: Description cluster[n]: Source of event/interrupt in region n, write access detected while corresponding subregion was enabled for watching */ + +/* Bit 31 : Subregion 31 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR31_Pos (31UL) /*!< Position of SR31 field. */ +#define MWU_PERREGION_SUBSTATWA_SR31_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR31_Pos) /*!< Bit mask of SR31 field. */ +#define MWU_PERREGION_SUBSTATWA_SR31_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR31_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 30 : Subregion 30 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR30_Pos (30UL) /*!< Position of SR30 field. */ +#define MWU_PERREGION_SUBSTATWA_SR30_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR30_Pos) /*!< Bit mask of SR30 field. */ +#define MWU_PERREGION_SUBSTATWA_SR30_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR30_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 29 : Subregion 29 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR29_Pos (29UL) /*!< Position of SR29 field. */ +#define MWU_PERREGION_SUBSTATWA_SR29_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR29_Pos) /*!< Bit mask of SR29 field. */ +#define MWU_PERREGION_SUBSTATWA_SR29_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR29_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 28 : Subregion 28 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR28_Pos (28UL) /*!< Position of SR28 field. */ +#define MWU_PERREGION_SUBSTATWA_SR28_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR28_Pos) /*!< Bit mask of SR28 field. */ +#define MWU_PERREGION_SUBSTATWA_SR28_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR28_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 27 : Subregion 27 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR27_Pos (27UL) /*!< Position of SR27 field. */ +#define MWU_PERREGION_SUBSTATWA_SR27_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR27_Pos) /*!< Bit mask of SR27 field. */ +#define MWU_PERREGION_SUBSTATWA_SR27_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR27_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 26 : Subregion 26 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR26_Pos (26UL) /*!< Position of SR26 field. */ +#define MWU_PERREGION_SUBSTATWA_SR26_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR26_Pos) /*!< Bit mask of SR26 field. */ +#define MWU_PERREGION_SUBSTATWA_SR26_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR26_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 25 : Subregion 25 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR25_Pos (25UL) /*!< Position of SR25 field. */ +#define MWU_PERREGION_SUBSTATWA_SR25_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR25_Pos) /*!< Bit mask of SR25 field. */ +#define MWU_PERREGION_SUBSTATWA_SR25_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR25_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 24 : Subregion 24 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR24_Pos (24UL) /*!< Position of SR24 field. */ +#define MWU_PERREGION_SUBSTATWA_SR24_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR24_Pos) /*!< Bit mask of SR24 field. */ +#define MWU_PERREGION_SUBSTATWA_SR24_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR24_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 23 : Subregion 23 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR23_Pos (23UL) /*!< Position of SR23 field. */ +#define MWU_PERREGION_SUBSTATWA_SR23_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR23_Pos) /*!< Bit mask of SR23 field. */ +#define MWU_PERREGION_SUBSTATWA_SR23_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR23_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 22 : Subregion 22 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR22_Pos (22UL) /*!< Position of SR22 field. */ +#define MWU_PERREGION_SUBSTATWA_SR22_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR22_Pos) /*!< Bit mask of SR22 field. */ +#define MWU_PERREGION_SUBSTATWA_SR22_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR22_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 21 : Subregion 21 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR21_Pos (21UL) /*!< Position of SR21 field. */ +#define MWU_PERREGION_SUBSTATWA_SR21_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR21_Pos) /*!< Bit mask of SR21 field. */ +#define MWU_PERREGION_SUBSTATWA_SR21_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR21_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 20 : Subregion 20 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR20_Pos (20UL) /*!< Position of SR20 field. */ +#define MWU_PERREGION_SUBSTATWA_SR20_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR20_Pos) /*!< Bit mask of SR20 field. */ +#define MWU_PERREGION_SUBSTATWA_SR20_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR20_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 19 : Subregion 19 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR19_Pos (19UL) /*!< Position of SR19 field. */ +#define MWU_PERREGION_SUBSTATWA_SR19_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR19_Pos) /*!< Bit mask of SR19 field. */ +#define MWU_PERREGION_SUBSTATWA_SR19_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR19_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 18 : Subregion 18 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR18_Pos (18UL) /*!< Position of SR18 field. */ +#define MWU_PERREGION_SUBSTATWA_SR18_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR18_Pos) /*!< Bit mask of SR18 field. */ +#define MWU_PERREGION_SUBSTATWA_SR18_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR18_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 17 : Subregion 17 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR17_Pos (17UL) /*!< Position of SR17 field. */ +#define MWU_PERREGION_SUBSTATWA_SR17_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR17_Pos) /*!< Bit mask of SR17 field. */ +#define MWU_PERREGION_SUBSTATWA_SR17_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR17_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 16 : Subregion 16 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR16_Pos (16UL) /*!< Position of SR16 field. */ +#define MWU_PERREGION_SUBSTATWA_SR16_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR16_Pos) /*!< Bit mask of SR16 field. */ +#define MWU_PERREGION_SUBSTATWA_SR16_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR16_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 15 : Subregion 15 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR15_Pos (15UL) /*!< Position of SR15 field. */ +#define MWU_PERREGION_SUBSTATWA_SR15_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR15_Pos) /*!< Bit mask of SR15 field. */ +#define MWU_PERREGION_SUBSTATWA_SR15_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR15_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 14 : Subregion 14 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR14_Pos (14UL) /*!< Position of SR14 field. */ +#define MWU_PERREGION_SUBSTATWA_SR14_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR14_Pos) /*!< Bit mask of SR14 field. */ +#define MWU_PERREGION_SUBSTATWA_SR14_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR14_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 13 : Subregion 13 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR13_Pos (13UL) /*!< Position of SR13 field. */ +#define MWU_PERREGION_SUBSTATWA_SR13_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR13_Pos) /*!< Bit mask of SR13 field. */ +#define MWU_PERREGION_SUBSTATWA_SR13_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR13_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 12 : Subregion 12 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR12_Pos (12UL) /*!< Position of SR12 field. */ +#define MWU_PERREGION_SUBSTATWA_SR12_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR12_Pos) /*!< Bit mask of SR12 field. */ +#define MWU_PERREGION_SUBSTATWA_SR12_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR12_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 11 : Subregion 11 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR11_Pos (11UL) /*!< Position of SR11 field. */ +#define MWU_PERREGION_SUBSTATWA_SR11_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR11_Pos) /*!< Bit mask of SR11 field. */ +#define MWU_PERREGION_SUBSTATWA_SR11_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR11_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 10 : Subregion 10 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR10_Pos (10UL) /*!< Position of SR10 field. */ +#define MWU_PERREGION_SUBSTATWA_SR10_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR10_Pos) /*!< Bit mask of SR10 field. */ +#define MWU_PERREGION_SUBSTATWA_SR10_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR10_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 9 : Subregion 9 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR9_Pos (9UL) /*!< Position of SR9 field. */ +#define MWU_PERREGION_SUBSTATWA_SR9_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR9_Pos) /*!< Bit mask of SR9 field. */ +#define MWU_PERREGION_SUBSTATWA_SR9_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR9_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 8 : Subregion 8 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR8_Pos (8UL) /*!< Position of SR8 field. */ +#define MWU_PERREGION_SUBSTATWA_SR8_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR8_Pos) /*!< Bit mask of SR8 field. */ +#define MWU_PERREGION_SUBSTATWA_SR8_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR8_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 7 : Subregion 7 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR7_Pos (7UL) /*!< Position of SR7 field. */ +#define MWU_PERREGION_SUBSTATWA_SR7_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR7_Pos) /*!< Bit mask of SR7 field. */ +#define MWU_PERREGION_SUBSTATWA_SR7_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR7_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 6 : Subregion 6 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR6_Pos (6UL) /*!< Position of SR6 field. */ +#define MWU_PERREGION_SUBSTATWA_SR6_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR6_Pos) /*!< Bit mask of SR6 field. */ +#define MWU_PERREGION_SUBSTATWA_SR6_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR6_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 5 : Subregion 5 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR5_Pos (5UL) /*!< Position of SR5 field. */ +#define MWU_PERREGION_SUBSTATWA_SR5_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR5_Pos) /*!< Bit mask of SR5 field. */ +#define MWU_PERREGION_SUBSTATWA_SR5_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR5_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 4 : Subregion 4 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR4_Pos (4UL) /*!< Position of SR4 field. */ +#define MWU_PERREGION_SUBSTATWA_SR4_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR4_Pos) /*!< Bit mask of SR4 field. */ +#define MWU_PERREGION_SUBSTATWA_SR4_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR4_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 3 : Subregion 3 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR3_Pos (3UL) /*!< Position of SR3 field. */ +#define MWU_PERREGION_SUBSTATWA_SR3_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR3_Pos) /*!< Bit mask of SR3 field. */ +#define MWU_PERREGION_SUBSTATWA_SR3_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR3_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 2 : Subregion 2 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR2_Pos (2UL) /*!< Position of SR2 field. */ +#define MWU_PERREGION_SUBSTATWA_SR2_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR2_Pos) /*!< Bit mask of SR2 field. */ +#define MWU_PERREGION_SUBSTATWA_SR2_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR2_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 1 : Subregion 1 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR1_Pos (1UL) /*!< Position of SR1 field. */ +#define MWU_PERREGION_SUBSTATWA_SR1_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR1_Pos) /*!< Bit mask of SR1 field. */ +#define MWU_PERREGION_SUBSTATWA_SR1_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR1_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 0 : Subregion 0 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR0_Pos (0UL) /*!< Position of SR0 field. */ +#define MWU_PERREGION_SUBSTATWA_SR0_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR0_Pos) /*!< Bit mask of SR0 field. */ +#define MWU_PERREGION_SUBSTATWA_SR0_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR0_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Register: MWU_PERREGION_SUBSTATRA */ +/* Description: Description cluster[n]: Source of event/interrupt in region n, read access detected while corresponding subregion was enabled for watching */ + +/* Bit 31 : Subregion 31 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR31_Pos (31UL) /*!< Position of SR31 field. */ +#define MWU_PERREGION_SUBSTATRA_SR31_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR31_Pos) /*!< Bit mask of SR31 field. */ +#define MWU_PERREGION_SUBSTATRA_SR31_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR31_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 30 : Subregion 30 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR30_Pos (30UL) /*!< Position of SR30 field. */ +#define MWU_PERREGION_SUBSTATRA_SR30_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR30_Pos) /*!< Bit mask of SR30 field. */ +#define MWU_PERREGION_SUBSTATRA_SR30_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR30_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 29 : Subregion 29 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR29_Pos (29UL) /*!< Position of SR29 field. */ +#define MWU_PERREGION_SUBSTATRA_SR29_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR29_Pos) /*!< Bit mask of SR29 field. */ +#define MWU_PERREGION_SUBSTATRA_SR29_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR29_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 28 : Subregion 28 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR28_Pos (28UL) /*!< Position of SR28 field. */ +#define MWU_PERREGION_SUBSTATRA_SR28_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR28_Pos) /*!< Bit mask of SR28 field. */ +#define MWU_PERREGION_SUBSTATRA_SR28_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR28_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 27 : Subregion 27 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR27_Pos (27UL) /*!< Position of SR27 field. */ +#define MWU_PERREGION_SUBSTATRA_SR27_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR27_Pos) /*!< Bit mask of SR27 field. */ +#define MWU_PERREGION_SUBSTATRA_SR27_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR27_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 26 : Subregion 26 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR26_Pos (26UL) /*!< Position of SR26 field. */ +#define MWU_PERREGION_SUBSTATRA_SR26_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR26_Pos) /*!< Bit mask of SR26 field. */ +#define MWU_PERREGION_SUBSTATRA_SR26_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR26_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 25 : Subregion 25 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR25_Pos (25UL) /*!< Position of SR25 field. */ +#define MWU_PERREGION_SUBSTATRA_SR25_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR25_Pos) /*!< Bit mask of SR25 field. */ +#define MWU_PERREGION_SUBSTATRA_SR25_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR25_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 24 : Subregion 24 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR24_Pos (24UL) /*!< Position of SR24 field. */ +#define MWU_PERREGION_SUBSTATRA_SR24_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR24_Pos) /*!< Bit mask of SR24 field. */ +#define MWU_PERREGION_SUBSTATRA_SR24_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR24_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 23 : Subregion 23 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR23_Pos (23UL) /*!< Position of SR23 field. */ +#define MWU_PERREGION_SUBSTATRA_SR23_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR23_Pos) /*!< Bit mask of SR23 field. */ +#define MWU_PERREGION_SUBSTATRA_SR23_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR23_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 22 : Subregion 22 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR22_Pos (22UL) /*!< Position of SR22 field. */ +#define MWU_PERREGION_SUBSTATRA_SR22_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR22_Pos) /*!< Bit mask of SR22 field. */ +#define MWU_PERREGION_SUBSTATRA_SR22_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR22_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 21 : Subregion 21 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR21_Pos (21UL) /*!< Position of SR21 field. */ +#define MWU_PERREGION_SUBSTATRA_SR21_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR21_Pos) /*!< Bit mask of SR21 field. */ +#define MWU_PERREGION_SUBSTATRA_SR21_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR21_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 20 : Subregion 20 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR20_Pos (20UL) /*!< Position of SR20 field. */ +#define MWU_PERREGION_SUBSTATRA_SR20_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR20_Pos) /*!< Bit mask of SR20 field. */ +#define MWU_PERREGION_SUBSTATRA_SR20_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR20_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 19 : Subregion 19 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR19_Pos (19UL) /*!< Position of SR19 field. */ +#define MWU_PERREGION_SUBSTATRA_SR19_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR19_Pos) /*!< Bit mask of SR19 field. */ +#define MWU_PERREGION_SUBSTATRA_SR19_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR19_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 18 : Subregion 18 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR18_Pos (18UL) /*!< Position of SR18 field. */ +#define MWU_PERREGION_SUBSTATRA_SR18_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR18_Pos) /*!< Bit mask of SR18 field. */ +#define MWU_PERREGION_SUBSTATRA_SR18_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR18_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 17 : Subregion 17 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR17_Pos (17UL) /*!< Position of SR17 field. */ +#define MWU_PERREGION_SUBSTATRA_SR17_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR17_Pos) /*!< Bit mask of SR17 field. */ +#define MWU_PERREGION_SUBSTATRA_SR17_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR17_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 16 : Subregion 16 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR16_Pos (16UL) /*!< Position of SR16 field. */ +#define MWU_PERREGION_SUBSTATRA_SR16_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR16_Pos) /*!< Bit mask of SR16 field. */ +#define MWU_PERREGION_SUBSTATRA_SR16_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR16_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 15 : Subregion 15 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR15_Pos (15UL) /*!< Position of SR15 field. */ +#define MWU_PERREGION_SUBSTATRA_SR15_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR15_Pos) /*!< Bit mask of SR15 field. */ +#define MWU_PERREGION_SUBSTATRA_SR15_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR15_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 14 : Subregion 14 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR14_Pos (14UL) /*!< Position of SR14 field. */ +#define MWU_PERREGION_SUBSTATRA_SR14_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR14_Pos) /*!< Bit mask of SR14 field. */ +#define MWU_PERREGION_SUBSTATRA_SR14_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR14_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 13 : Subregion 13 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR13_Pos (13UL) /*!< Position of SR13 field. */ +#define MWU_PERREGION_SUBSTATRA_SR13_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR13_Pos) /*!< Bit mask of SR13 field. */ +#define MWU_PERREGION_SUBSTATRA_SR13_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR13_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 12 : Subregion 12 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR12_Pos (12UL) /*!< Position of SR12 field. */ +#define MWU_PERREGION_SUBSTATRA_SR12_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR12_Pos) /*!< Bit mask of SR12 field. */ +#define MWU_PERREGION_SUBSTATRA_SR12_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR12_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 11 : Subregion 11 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR11_Pos (11UL) /*!< Position of SR11 field. */ +#define MWU_PERREGION_SUBSTATRA_SR11_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR11_Pos) /*!< Bit mask of SR11 field. */ +#define MWU_PERREGION_SUBSTATRA_SR11_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR11_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 10 : Subregion 10 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR10_Pos (10UL) /*!< Position of SR10 field. */ +#define MWU_PERREGION_SUBSTATRA_SR10_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR10_Pos) /*!< Bit mask of SR10 field. */ +#define MWU_PERREGION_SUBSTATRA_SR10_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR10_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 9 : Subregion 9 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR9_Pos (9UL) /*!< Position of SR9 field. */ +#define MWU_PERREGION_SUBSTATRA_SR9_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR9_Pos) /*!< Bit mask of SR9 field. */ +#define MWU_PERREGION_SUBSTATRA_SR9_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR9_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 8 : Subregion 8 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR8_Pos (8UL) /*!< Position of SR8 field. */ +#define MWU_PERREGION_SUBSTATRA_SR8_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR8_Pos) /*!< Bit mask of SR8 field. */ +#define MWU_PERREGION_SUBSTATRA_SR8_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR8_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 7 : Subregion 7 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR7_Pos (7UL) /*!< Position of SR7 field. */ +#define MWU_PERREGION_SUBSTATRA_SR7_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR7_Pos) /*!< Bit mask of SR7 field. */ +#define MWU_PERREGION_SUBSTATRA_SR7_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR7_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 6 : Subregion 6 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR6_Pos (6UL) /*!< Position of SR6 field. */ +#define MWU_PERREGION_SUBSTATRA_SR6_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR6_Pos) /*!< Bit mask of SR6 field. */ +#define MWU_PERREGION_SUBSTATRA_SR6_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR6_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 5 : Subregion 5 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR5_Pos (5UL) /*!< Position of SR5 field. */ +#define MWU_PERREGION_SUBSTATRA_SR5_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR5_Pos) /*!< Bit mask of SR5 field. */ +#define MWU_PERREGION_SUBSTATRA_SR5_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR5_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 4 : Subregion 4 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR4_Pos (4UL) /*!< Position of SR4 field. */ +#define MWU_PERREGION_SUBSTATRA_SR4_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR4_Pos) /*!< Bit mask of SR4 field. */ +#define MWU_PERREGION_SUBSTATRA_SR4_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR4_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 3 : Subregion 3 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR3_Pos (3UL) /*!< Position of SR3 field. */ +#define MWU_PERREGION_SUBSTATRA_SR3_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR3_Pos) /*!< Bit mask of SR3 field. */ +#define MWU_PERREGION_SUBSTATRA_SR3_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR3_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 2 : Subregion 2 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR2_Pos (2UL) /*!< Position of SR2 field. */ +#define MWU_PERREGION_SUBSTATRA_SR2_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR2_Pos) /*!< Bit mask of SR2 field. */ +#define MWU_PERREGION_SUBSTATRA_SR2_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR2_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 1 : Subregion 1 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR1_Pos (1UL) /*!< Position of SR1 field. */ +#define MWU_PERREGION_SUBSTATRA_SR1_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR1_Pos) /*!< Bit mask of SR1 field. */ +#define MWU_PERREGION_SUBSTATRA_SR1_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR1_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 0 : Subregion 0 in region n (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR0_Pos (0UL) /*!< Position of SR0 field. */ +#define MWU_PERREGION_SUBSTATRA_SR0_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR0_Pos) /*!< Bit mask of SR0 field. */ +#define MWU_PERREGION_SUBSTATRA_SR0_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR0_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Register: MWU_REGIONEN */ +/* Description: Enable/disable regions watch */ + +/* Bit 27 : Enable/disable read access watch in PREGION[1] */ +#define MWU_REGIONEN_PRGN1RA_Pos (27UL) /*!< Position of PRGN1RA field. */ +#define MWU_REGIONEN_PRGN1RA_Msk (0x1UL << MWU_REGIONEN_PRGN1RA_Pos) /*!< Bit mask of PRGN1RA field. */ +#define MWU_REGIONEN_PRGN1RA_Disable (0UL) /*!< Disable read access watch in this PREGION */ +#define MWU_REGIONEN_PRGN1RA_Enable (1UL) /*!< Enable read access watch in this PREGION */ + +/* Bit 26 : Enable/disable write access watch in PREGION[1] */ +#define MWU_REGIONEN_PRGN1WA_Pos (26UL) /*!< Position of PRGN1WA field. */ +#define MWU_REGIONEN_PRGN1WA_Msk (0x1UL << MWU_REGIONEN_PRGN1WA_Pos) /*!< Bit mask of PRGN1WA field. */ +#define MWU_REGIONEN_PRGN1WA_Disable (0UL) /*!< Disable write access watch in this PREGION */ +#define MWU_REGIONEN_PRGN1WA_Enable (1UL) /*!< Enable write access watch in this PREGION */ + +/* Bit 25 : Enable/disable read access watch in PREGION[0] */ +#define MWU_REGIONEN_PRGN0RA_Pos (25UL) /*!< Position of PRGN0RA field. */ +#define MWU_REGIONEN_PRGN0RA_Msk (0x1UL << MWU_REGIONEN_PRGN0RA_Pos) /*!< Bit mask of PRGN0RA field. */ +#define MWU_REGIONEN_PRGN0RA_Disable (0UL) /*!< Disable read access watch in this PREGION */ +#define MWU_REGIONEN_PRGN0RA_Enable (1UL) /*!< Enable read access watch in this PREGION */ + +/* Bit 24 : Enable/disable write access watch in PREGION[0] */ +#define MWU_REGIONEN_PRGN0WA_Pos (24UL) /*!< Position of PRGN0WA field. */ +#define MWU_REGIONEN_PRGN0WA_Msk (0x1UL << MWU_REGIONEN_PRGN0WA_Pos) /*!< Bit mask of PRGN0WA field. */ +#define MWU_REGIONEN_PRGN0WA_Disable (0UL) /*!< Disable write access watch in this PREGION */ +#define MWU_REGIONEN_PRGN0WA_Enable (1UL) /*!< Enable write access watch in this PREGION */ + +/* Bit 7 : Enable/disable read access watch in region[3] */ +#define MWU_REGIONEN_RGN3RA_Pos (7UL) /*!< Position of RGN3RA field. */ +#define MWU_REGIONEN_RGN3RA_Msk (0x1UL << MWU_REGIONEN_RGN3RA_Pos) /*!< Bit mask of RGN3RA field. */ +#define MWU_REGIONEN_RGN3RA_Disable (0UL) /*!< Disable read access watch in this region */ +#define MWU_REGIONEN_RGN3RA_Enable (1UL) /*!< Enable read access watch in this region */ + +/* Bit 6 : Enable/disable write access watch in region[3] */ +#define MWU_REGIONEN_RGN3WA_Pos (6UL) /*!< Position of RGN3WA field. */ +#define MWU_REGIONEN_RGN3WA_Msk (0x1UL << MWU_REGIONEN_RGN3WA_Pos) /*!< Bit mask of RGN3WA field. */ +#define MWU_REGIONEN_RGN3WA_Disable (0UL) /*!< Disable write access watch in this region */ +#define MWU_REGIONEN_RGN3WA_Enable (1UL) /*!< Enable write access watch in this region */ + +/* Bit 5 : Enable/disable read access watch in region[2] */ +#define MWU_REGIONEN_RGN2RA_Pos (5UL) /*!< Position of RGN2RA field. */ +#define MWU_REGIONEN_RGN2RA_Msk (0x1UL << MWU_REGIONEN_RGN2RA_Pos) /*!< Bit mask of RGN2RA field. */ +#define MWU_REGIONEN_RGN2RA_Disable (0UL) /*!< Disable read access watch in this region */ +#define MWU_REGIONEN_RGN2RA_Enable (1UL) /*!< Enable read access watch in this region */ + +/* Bit 4 : Enable/disable write access watch in region[2] */ +#define MWU_REGIONEN_RGN2WA_Pos (4UL) /*!< Position of RGN2WA field. */ +#define MWU_REGIONEN_RGN2WA_Msk (0x1UL << MWU_REGIONEN_RGN2WA_Pos) /*!< Bit mask of RGN2WA field. */ +#define MWU_REGIONEN_RGN2WA_Disable (0UL) /*!< Disable write access watch in this region */ +#define MWU_REGIONEN_RGN2WA_Enable (1UL) /*!< Enable write access watch in this region */ + +/* Bit 3 : Enable/disable read access watch in region[1] */ +#define MWU_REGIONEN_RGN1RA_Pos (3UL) /*!< Position of RGN1RA field. */ +#define MWU_REGIONEN_RGN1RA_Msk (0x1UL << MWU_REGIONEN_RGN1RA_Pos) /*!< Bit mask of RGN1RA field. */ +#define MWU_REGIONEN_RGN1RA_Disable (0UL) /*!< Disable read access watch in this region */ +#define MWU_REGIONEN_RGN1RA_Enable (1UL) /*!< Enable read access watch in this region */ + +/* Bit 2 : Enable/disable write access watch in region[1] */ +#define MWU_REGIONEN_RGN1WA_Pos (2UL) /*!< Position of RGN1WA field. */ +#define MWU_REGIONEN_RGN1WA_Msk (0x1UL << MWU_REGIONEN_RGN1WA_Pos) /*!< Bit mask of RGN1WA field. */ +#define MWU_REGIONEN_RGN1WA_Disable (0UL) /*!< Disable write access watch in this region */ +#define MWU_REGIONEN_RGN1WA_Enable (1UL) /*!< Enable write access watch in this region */ + +/* Bit 1 : Enable/disable read access watch in region[0] */ +#define MWU_REGIONEN_RGN0RA_Pos (1UL) /*!< Position of RGN0RA field. */ +#define MWU_REGIONEN_RGN0RA_Msk (0x1UL << MWU_REGIONEN_RGN0RA_Pos) /*!< Bit mask of RGN0RA field. */ +#define MWU_REGIONEN_RGN0RA_Disable (0UL) /*!< Disable read access watch in this region */ +#define MWU_REGIONEN_RGN0RA_Enable (1UL) /*!< Enable read access watch in this region */ + +/* Bit 0 : Enable/disable write access watch in region[0] */ +#define MWU_REGIONEN_RGN0WA_Pos (0UL) /*!< Position of RGN0WA field. */ +#define MWU_REGIONEN_RGN0WA_Msk (0x1UL << MWU_REGIONEN_RGN0WA_Pos) /*!< Bit mask of RGN0WA field. */ +#define MWU_REGIONEN_RGN0WA_Disable (0UL) /*!< Disable write access watch in this region */ +#define MWU_REGIONEN_RGN0WA_Enable (1UL) /*!< Enable write access watch in this region */ + +/* Register: MWU_REGIONENSET */ +/* Description: Enable regions watch */ + +/* Bit 27 : Enable read access watch in PREGION[1] */ +#define MWU_REGIONENSET_PRGN1RA_Pos (27UL) /*!< Position of PRGN1RA field. */ +#define MWU_REGIONENSET_PRGN1RA_Msk (0x1UL << MWU_REGIONENSET_PRGN1RA_Pos) /*!< Bit mask of PRGN1RA field. */ +#define MWU_REGIONENSET_PRGN1RA_Disabled (0UL) /*!< Read access watch in this PREGION is disabled */ +#define MWU_REGIONENSET_PRGN1RA_Enabled (1UL) /*!< Read access watch in this PREGION is enabled */ +#define MWU_REGIONENSET_PRGN1RA_Set (1UL) /*!< Enable read access watch in this PREGION */ + +/* Bit 26 : Enable write access watch in PREGION[1] */ +#define MWU_REGIONENSET_PRGN1WA_Pos (26UL) /*!< Position of PRGN1WA field. */ +#define MWU_REGIONENSET_PRGN1WA_Msk (0x1UL << MWU_REGIONENSET_PRGN1WA_Pos) /*!< Bit mask of PRGN1WA field. */ +#define MWU_REGIONENSET_PRGN1WA_Disabled (0UL) /*!< Write access watch in this PREGION is disabled */ +#define MWU_REGIONENSET_PRGN1WA_Enabled (1UL) /*!< Write access watch in this PREGION is enabled */ +#define MWU_REGIONENSET_PRGN1WA_Set (1UL) /*!< Enable write access watch in this PREGION */ + +/* Bit 25 : Enable read access watch in PREGION[0] */ +#define MWU_REGIONENSET_PRGN0RA_Pos (25UL) /*!< Position of PRGN0RA field. */ +#define MWU_REGIONENSET_PRGN0RA_Msk (0x1UL << MWU_REGIONENSET_PRGN0RA_Pos) /*!< Bit mask of PRGN0RA field. */ +#define MWU_REGIONENSET_PRGN0RA_Disabled (0UL) /*!< Read access watch in this PREGION is disabled */ +#define MWU_REGIONENSET_PRGN0RA_Enabled (1UL) /*!< Read access watch in this PREGION is enabled */ +#define MWU_REGIONENSET_PRGN0RA_Set (1UL) /*!< Enable read access watch in this PREGION */ + +/* Bit 24 : Enable write access watch in PREGION[0] */ +#define MWU_REGIONENSET_PRGN0WA_Pos (24UL) /*!< Position of PRGN0WA field. */ +#define MWU_REGIONENSET_PRGN0WA_Msk (0x1UL << MWU_REGIONENSET_PRGN0WA_Pos) /*!< Bit mask of PRGN0WA field. */ +#define MWU_REGIONENSET_PRGN0WA_Disabled (0UL) /*!< Write access watch in this PREGION is disabled */ +#define MWU_REGIONENSET_PRGN0WA_Enabled (1UL) /*!< Write access watch in this PREGION is enabled */ +#define MWU_REGIONENSET_PRGN0WA_Set (1UL) /*!< Enable write access watch in this PREGION */ + +/* Bit 7 : Enable read access watch in region[3] */ +#define MWU_REGIONENSET_RGN3RA_Pos (7UL) /*!< Position of RGN3RA field. */ +#define MWU_REGIONENSET_RGN3RA_Msk (0x1UL << MWU_REGIONENSET_RGN3RA_Pos) /*!< Bit mask of RGN3RA field. */ +#define MWU_REGIONENSET_RGN3RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ +#define MWU_REGIONENSET_RGN3RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ +#define MWU_REGIONENSET_RGN3RA_Set (1UL) /*!< Enable read access watch in this region */ + +/* Bit 6 : Enable write access watch in region[3] */ +#define MWU_REGIONENSET_RGN3WA_Pos (6UL) /*!< Position of RGN3WA field. */ +#define MWU_REGIONENSET_RGN3WA_Msk (0x1UL << MWU_REGIONENSET_RGN3WA_Pos) /*!< Bit mask of RGN3WA field. */ +#define MWU_REGIONENSET_RGN3WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ +#define MWU_REGIONENSET_RGN3WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ +#define MWU_REGIONENSET_RGN3WA_Set (1UL) /*!< Enable write access watch in this region */ + +/* Bit 5 : Enable read access watch in region[2] */ +#define MWU_REGIONENSET_RGN2RA_Pos (5UL) /*!< Position of RGN2RA field. */ +#define MWU_REGIONENSET_RGN2RA_Msk (0x1UL << MWU_REGIONENSET_RGN2RA_Pos) /*!< Bit mask of RGN2RA field. */ +#define MWU_REGIONENSET_RGN2RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ +#define MWU_REGIONENSET_RGN2RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ +#define MWU_REGIONENSET_RGN2RA_Set (1UL) /*!< Enable read access watch in this region */ + +/* Bit 4 : Enable write access watch in region[2] */ +#define MWU_REGIONENSET_RGN2WA_Pos (4UL) /*!< Position of RGN2WA field. */ +#define MWU_REGIONENSET_RGN2WA_Msk (0x1UL << MWU_REGIONENSET_RGN2WA_Pos) /*!< Bit mask of RGN2WA field. */ +#define MWU_REGIONENSET_RGN2WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ +#define MWU_REGIONENSET_RGN2WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ +#define MWU_REGIONENSET_RGN2WA_Set (1UL) /*!< Enable write access watch in this region */ + +/* Bit 3 : Enable read access watch in region[1] */ +#define MWU_REGIONENSET_RGN1RA_Pos (3UL) /*!< Position of RGN1RA field. */ +#define MWU_REGIONENSET_RGN1RA_Msk (0x1UL << MWU_REGIONENSET_RGN1RA_Pos) /*!< Bit mask of RGN1RA field. */ +#define MWU_REGIONENSET_RGN1RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ +#define MWU_REGIONENSET_RGN1RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ +#define MWU_REGIONENSET_RGN1RA_Set (1UL) /*!< Enable read access watch in this region */ + +/* Bit 2 : Enable write access watch in region[1] */ +#define MWU_REGIONENSET_RGN1WA_Pos (2UL) /*!< Position of RGN1WA field. */ +#define MWU_REGIONENSET_RGN1WA_Msk (0x1UL << MWU_REGIONENSET_RGN1WA_Pos) /*!< Bit mask of RGN1WA field. */ +#define MWU_REGIONENSET_RGN1WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ +#define MWU_REGIONENSET_RGN1WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ +#define MWU_REGIONENSET_RGN1WA_Set (1UL) /*!< Enable write access watch in this region */ + +/* Bit 1 : Enable read access watch in region[0] */ +#define MWU_REGIONENSET_RGN0RA_Pos (1UL) /*!< Position of RGN0RA field. */ +#define MWU_REGIONENSET_RGN0RA_Msk (0x1UL << MWU_REGIONENSET_RGN0RA_Pos) /*!< Bit mask of RGN0RA field. */ +#define MWU_REGIONENSET_RGN0RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ +#define MWU_REGIONENSET_RGN0RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ +#define MWU_REGIONENSET_RGN0RA_Set (1UL) /*!< Enable read access watch in this region */ + +/* Bit 0 : Enable write access watch in region[0] */ +#define MWU_REGIONENSET_RGN0WA_Pos (0UL) /*!< Position of RGN0WA field. */ +#define MWU_REGIONENSET_RGN0WA_Msk (0x1UL << MWU_REGIONENSET_RGN0WA_Pos) /*!< Bit mask of RGN0WA field. */ +#define MWU_REGIONENSET_RGN0WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ +#define MWU_REGIONENSET_RGN0WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ +#define MWU_REGIONENSET_RGN0WA_Set (1UL) /*!< Enable write access watch in this region */ + +/* Register: MWU_REGIONENCLR */ +/* Description: Disable regions watch */ + +/* Bit 27 : Disable read access watch in PREGION[1] */ +#define MWU_REGIONENCLR_PRGN1RA_Pos (27UL) /*!< Position of PRGN1RA field. */ +#define MWU_REGIONENCLR_PRGN1RA_Msk (0x1UL << MWU_REGIONENCLR_PRGN1RA_Pos) /*!< Bit mask of PRGN1RA field. */ +#define MWU_REGIONENCLR_PRGN1RA_Disabled (0UL) /*!< Read access watch in this PREGION is disabled */ +#define MWU_REGIONENCLR_PRGN1RA_Enabled (1UL) /*!< Read access watch in this PREGION is enabled */ +#define MWU_REGIONENCLR_PRGN1RA_Clear (1UL) /*!< Disable read access watch in this PREGION */ + +/* Bit 26 : Disable write access watch in PREGION[1] */ +#define MWU_REGIONENCLR_PRGN1WA_Pos (26UL) /*!< Position of PRGN1WA field. */ +#define MWU_REGIONENCLR_PRGN1WA_Msk (0x1UL << MWU_REGIONENCLR_PRGN1WA_Pos) /*!< Bit mask of PRGN1WA field. */ +#define MWU_REGIONENCLR_PRGN1WA_Disabled (0UL) /*!< Write access watch in this PREGION is disabled */ +#define MWU_REGIONENCLR_PRGN1WA_Enabled (1UL) /*!< Write access watch in this PREGION is enabled */ +#define MWU_REGIONENCLR_PRGN1WA_Clear (1UL) /*!< Disable write access watch in this PREGION */ + +/* Bit 25 : Disable read access watch in PREGION[0] */ +#define MWU_REGIONENCLR_PRGN0RA_Pos (25UL) /*!< Position of PRGN0RA field. */ +#define MWU_REGIONENCLR_PRGN0RA_Msk (0x1UL << MWU_REGIONENCLR_PRGN0RA_Pos) /*!< Bit mask of PRGN0RA field. */ +#define MWU_REGIONENCLR_PRGN0RA_Disabled (0UL) /*!< Read access watch in this PREGION is disabled */ +#define MWU_REGIONENCLR_PRGN0RA_Enabled (1UL) /*!< Read access watch in this PREGION is enabled */ +#define MWU_REGIONENCLR_PRGN0RA_Clear (1UL) /*!< Disable read access watch in this PREGION */ + +/* Bit 24 : Disable write access watch in PREGION[0] */ +#define MWU_REGIONENCLR_PRGN0WA_Pos (24UL) /*!< Position of PRGN0WA field. */ +#define MWU_REGIONENCLR_PRGN0WA_Msk (0x1UL << MWU_REGIONENCLR_PRGN0WA_Pos) /*!< Bit mask of PRGN0WA field. */ +#define MWU_REGIONENCLR_PRGN0WA_Disabled (0UL) /*!< Write access watch in this PREGION is disabled */ +#define MWU_REGIONENCLR_PRGN0WA_Enabled (1UL) /*!< Write access watch in this PREGION is enabled */ +#define MWU_REGIONENCLR_PRGN0WA_Clear (1UL) /*!< Disable write access watch in this PREGION */ + +/* Bit 7 : Disable read access watch in region[3] */ +#define MWU_REGIONENCLR_RGN3RA_Pos (7UL) /*!< Position of RGN3RA field. */ +#define MWU_REGIONENCLR_RGN3RA_Msk (0x1UL << MWU_REGIONENCLR_RGN3RA_Pos) /*!< Bit mask of RGN3RA field. */ +#define MWU_REGIONENCLR_RGN3RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ +#define MWU_REGIONENCLR_RGN3RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ +#define MWU_REGIONENCLR_RGN3RA_Clear (1UL) /*!< Disable read access watch in this region */ + +/* Bit 6 : Disable write access watch in region[3] */ +#define MWU_REGIONENCLR_RGN3WA_Pos (6UL) /*!< Position of RGN3WA field. */ +#define MWU_REGIONENCLR_RGN3WA_Msk (0x1UL << MWU_REGIONENCLR_RGN3WA_Pos) /*!< Bit mask of RGN3WA field. */ +#define MWU_REGIONENCLR_RGN3WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ +#define MWU_REGIONENCLR_RGN3WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ +#define MWU_REGIONENCLR_RGN3WA_Clear (1UL) /*!< Disable write access watch in this region */ + +/* Bit 5 : Disable read access watch in region[2] */ +#define MWU_REGIONENCLR_RGN2RA_Pos (5UL) /*!< Position of RGN2RA field. */ +#define MWU_REGIONENCLR_RGN2RA_Msk (0x1UL << MWU_REGIONENCLR_RGN2RA_Pos) /*!< Bit mask of RGN2RA field. */ +#define MWU_REGIONENCLR_RGN2RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ +#define MWU_REGIONENCLR_RGN2RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ +#define MWU_REGIONENCLR_RGN2RA_Clear (1UL) /*!< Disable read access watch in this region */ + +/* Bit 4 : Disable write access watch in region[2] */ +#define MWU_REGIONENCLR_RGN2WA_Pos (4UL) /*!< Position of RGN2WA field. */ +#define MWU_REGIONENCLR_RGN2WA_Msk (0x1UL << MWU_REGIONENCLR_RGN2WA_Pos) /*!< Bit mask of RGN2WA field. */ +#define MWU_REGIONENCLR_RGN2WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ +#define MWU_REGIONENCLR_RGN2WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ +#define MWU_REGIONENCLR_RGN2WA_Clear (1UL) /*!< Disable write access watch in this region */ + +/* Bit 3 : Disable read access watch in region[1] */ +#define MWU_REGIONENCLR_RGN1RA_Pos (3UL) /*!< Position of RGN1RA field. */ +#define MWU_REGIONENCLR_RGN1RA_Msk (0x1UL << MWU_REGIONENCLR_RGN1RA_Pos) /*!< Bit mask of RGN1RA field. */ +#define MWU_REGIONENCLR_RGN1RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ +#define MWU_REGIONENCLR_RGN1RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ +#define MWU_REGIONENCLR_RGN1RA_Clear (1UL) /*!< Disable read access watch in this region */ + +/* Bit 2 : Disable write access watch in region[1] */ +#define MWU_REGIONENCLR_RGN1WA_Pos (2UL) /*!< Position of RGN1WA field. */ +#define MWU_REGIONENCLR_RGN1WA_Msk (0x1UL << MWU_REGIONENCLR_RGN1WA_Pos) /*!< Bit mask of RGN1WA field. */ +#define MWU_REGIONENCLR_RGN1WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ +#define MWU_REGIONENCLR_RGN1WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ +#define MWU_REGIONENCLR_RGN1WA_Clear (1UL) /*!< Disable write access watch in this region */ + +/* Bit 1 : Disable read access watch in region[0] */ +#define MWU_REGIONENCLR_RGN0RA_Pos (1UL) /*!< Position of RGN0RA field. */ +#define MWU_REGIONENCLR_RGN0RA_Msk (0x1UL << MWU_REGIONENCLR_RGN0RA_Pos) /*!< Bit mask of RGN0RA field. */ +#define MWU_REGIONENCLR_RGN0RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ +#define MWU_REGIONENCLR_RGN0RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ +#define MWU_REGIONENCLR_RGN0RA_Clear (1UL) /*!< Disable read access watch in this region */ + +/* Bit 0 : Disable write access watch in region[0] */ +#define MWU_REGIONENCLR_RGN0WA_Pos (0UL) /*!< Position of RGN0WA field. */ +#define MWU_REGIONENCLR_RGN0WA_Msk (0x1UL << MWU_REGIONENCLR_RGN0WA_Pos) /*!< Bit mask of RGN0WA field. */ +#define MWU_REGIONENCLR_RGN0WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ +#define MWU_REGIONENCLR_RGN0WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ +#define MWU_REGIONENCLR_RGN0WA_Clear (1UL) /*!< Disable write access watch in this region */ + +/* Register: MWU_REGION_START */ +/* Description: Description cluster[n]: Start address for region n */ + +/* Bits 31..0 : Start address for region */ +#define MWU_REGION_START_START_Pos (0UL) /*!< Position of START field. */ +#define MWU_REGION_START_START_Msk (0xFFFFFFFFUL << MWU_REGION_START_START_Pos) /*!< Bit mask of START field. */ + +/* Register: MWU_REGION_END */ +/* Description: Description cluster[n]: End address of region n */ + +/* Bits 31..0 : End address of region. */ +#define MWU_REGION_END_END_Pos (0UL) /*!< Position of END field. */ +#define MWU_REGION_END_END_Msk (0xFFFFFFFFUL << MWU_REGION_END_END_Pos) /*!< Bit mask of END field. */ + +/* Register: MWU_PREGION_START */ +/* Description: Description cluster[n]: Reserved for future use */ + +/* Bits 31..0 : Reserved for future use */ +#define MWU_PREGION_START_START_Pos (0UL) /*!< Position of START field. */ +#define MWU_PREGION_START_START_Msk (0xFFFFFFFFUL << MWU_PREGION_START_START_Pos) /*!< Bit mask of START field. */ + +/* Register: MWU_PREGION_END */ +/* Description: Description cluster[n]: Reserved for future use */ + +/* Bits 31..0 : Reserved for future use */ +#define MWU_PREGION_END_END_Pos (0UL) /*!< Position of END field. */ +#define MWU_PREGION_END_END_Msk (0xFFFFFFFFUL << MWU_PREGION_END_END_Pos) /*!< Bit mask of END field. */ + +/* Register: MWU_PREGION_SUBS */ +/* Description: Description cluster[n]: Subregions of region n */ + +/* Bit 31 : Include or exclude subregion 31 in region */ +#define MWU_PREGION_SUBS_SR31_Pos (31UL) /*!< Position of SR31 field. */ +#define MWU_PREGION_SUBS_SR31_Msk (0x1UL << MWU_PREGION_SUBS_SR31_Pos) /*!< Bit mask of SR31 field. */ +#define MWU_PREGION_SUBS_SR31_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR31_Include (1UL) /*!< Include */ + +/* Bit 30 : Include or exclude subregion 30 in region */ +#define MWU_PREGION_SUBS_SR30_Pos (30UL) /*!< Position of SR30 field. */ +#define MWU_PREGION_SUBS_SR30_Msk (0x1UL << MWU_PREGION_SUBS_SR30_Pos) /*!< Bit mask of SR30 field. */ +#define MWU_PREGION_SUBS_SR30_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR30_Include (1UL) /*!< Include */ + +/* Bit 29 : Include or exclude subregion 29 in region */ +#define MWU_PREGION_SUBS_SR29_Pos (29UL) /*!< Position of SR29 field. */ +#define MWU_PREGION_SUBS_SR29_Msk (0x1UL << MWU_PREGION_SUBS_SR29_Pos) /*!< Bit mask of SR29 field. */ +#define MWU_PREGION_SUBS_SR29_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR29_Include (1UL) /*!< Include */ + +/* Bit 28 : Include or exclude subregion 28 in region */ +#define MWU_PREGION_SUBS_SR28_Pos (28UL) /*!< Position of SR28 field. */ +#define MWU_PREGION_SUBS_SR28_Msk (0x1UL << MWU_PREGION_SUBS_SR28_Pos) /*!< Bit mask of SR28 field. */ +#define MWU_PREGION_SUBS_SR28_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR28_Include (1UL) /*!< Include */ + +/* Bit 27 : Include or exclude subregion 27 in region */ +#define MWU_PREGION_SUBS_SR27_Pos (27UL) /*!< Position of SR27 field. */ +#define MWU_PREGION_SUBS_SR27_Msk (0x1UL << MWU_PREGION_SUBS_SR27_Pos) /*!< Bit mask of SR27 field. */ +#define MWU_PREGION_SUBS_SR27_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR27_Include (1UL) /*!< Include */ + +/* Bit 26 : Include or exclude subregion 26 in region */ +#define MWU_PREGION_SUBS_SR26_Pos (26UL) /*!< Position of SR26 field. */ +#define MWU_PREGION_SUBS_SR26_Msk (0x1UL << MWU_PREGION_SUBS_SR26_Pos) /*!< Bit mask of SR26 field. */ +#define MWU_PREGION_SUBS_SR26_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR26_Include (1UL) /*!< Include */ + +/* Bit 25 : Include or exclude subregion 25 in region */ +#define MWU_PREGION_SUBS_SR25_Pos (25UL) /*!< Position of SR25 field. */ +#define MWU_PREGION_SUBS_SR25_Msk (0x1UL << MWU_PREGION_SUBS_SR25_Pos) /*!< Bit mask of SR25 field. */ +#define MWU_PREGION_SUBS_SR25_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR25_Include (1UL) /*!< Include */ + +/* Bit 24 : Include or exclude subregion 24 in region */ +#define MWU_PREGION_SUBS_SR24_Pos (24UL) /*!< Position of SR24 field. */ +#define MWU_PREGION_SUBS_SR24_Msk (0x1UL << MWU_PREGION_SUBS_SR24_Pos) /*!< Bit mask of SR24 field. */ +#define MWU_PREGION_SUBS_SR24_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR24_Include (1UL) /*!< Include */ + +/* Bit 23 : Include or exclude subregion 23 in region */ +#define MWU_PREGION_SUBS_SR23_Pos (23UL) /*!< Position of SR23 field. */ +#define MWU_PREGION_SUBS_SR23_Msk (0x1UL << MWU_PREGION_SUBS_SR23_Pos) /*!< Bit mask of SR23 field. */ +#define MWU_PREGION_SUBS_SR23_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR23_Include (1UL) /*!< Include */ + +/* Bit 22 : Include or exclude subregion 22 in region */ +#define MWU_PREGION_SUBS_SR22_Pos (22UL) /*!< Position of SR22 field. */ +#define MWU_PREGION_SUBS_SR22_Msk (0x1UL << MWU_PREGION_SUBS_SR22_Pos) /*!< Bit mask of SR22 field. */ +#define MWU_PREGION_SUBS_SR22_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR22_Include (1UL) /*!< Include */ + +/* Bit 21 : Include or exclude subregion 21 in region */ +#define MWU_PREGION_SUBS_SR21_Pos (21UL) /*!< Position of SR21 field. */ +#define MWU_PREGION_SUBS_SR21_Msk (0x1UL << MWU_PREGION_SUBS_SR21_Pos) /*!< Bit mask of SR21 field. */ +#define MWU_PREGION_SUBS_SR21_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR21_Include (1UL) /*!< Include */ + +/* Bit 20 : Include or exclude subregion 20 in region */ +#define MWU_PREGION_SUBS_SR20_Pos (20UL) /*!< Position of SR20 field. */ +#define MWU_PREGION_SUBS_SR20_Msk (0x1UL << MWU_PREGION_SUBS_SR20_Pos) /*!< Bit mask of SR20 field. */ +#define MWU_PREGION_SUBS_SR20_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR20_Include (1UL) /*!< Include */ + +/* Bit 19 : Include or exclude subregion 19 in region */ +#define MWU_PREGION_SUBS_SR19_Pos (19UL) /*!< Position of SR19 field. */ +#define MWU_PREGION_SUBS_SR19_Msk (0x1UL << MWU_PREGION_SUBS_SR19_Pos) /*!< Bit mask of SR19 field. */ +#define MWU_PREGION_SUBS_SR19_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR19_Include (1UL) /*!< Include */ + +/* Bit 18 : Include or exclude subregion 18 in region */ +#define MWU_PREGION_SUBS_SR18_Pos (18UL) /*!< Position of SR18 field. */ +#define MWU_PREGION_SUBS_SR18_Msk (0x1UL << MWU_PREGION_SUBS_SR18_Pos) /*!< Bit mask of SR18 field. */ +#define MWU_PREGION_SUBS_SR18_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR18_Include (1UL) /*!< Include */ + +/* Bit 17 : Include or exclude subregion 17 in region */ +#define MWU_PREGION_SUBS_SR17_Pos (17UL) /*!< Position of SR17 field. */ +#define MWU_PREGION_SUBS_SR17_Msk (0x1UL << MWU_PREGION_SUBS_SR17_Pos) /*!< Bit mask of SR17 field. */ +#define MWU_PREGION_SUBS_SR17_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR17_Include (1UL) /*!< Include */ + +/* Bit 16 : Include or exclude subregion 16 in region */ +#define MWU_PREGION_SUBS_SR16_Pos (16UL) /*!< Position of SR16 field. */ +#define MWU_PREGION_SUBS_SR16_Msk (0x1UL << MWU_PREGION_SUBS_SR16_Pos) /*!< Bit mask of SR16 field. */ +#define MWU_PREGION_SUBS_SR16_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR16_Include (1UL) /*!< Include */ + +/* Bit 15 : Include or exclude subregion 15 in region */ +#define MWU_PREGION_SUBS_SR15_Pos (15UL) /*!< Position of SR15 field. */ +#define MWU_PREGION_SUBS_SR15_Msk (0x1UL << MWU_PREGION_SUBS_SR15_Pos) /*!< Bit mask of SR15 field. */ +#define MWU_PREGION_SUBS_SR15_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR15_Include (1UL) /*!< Include */ + +/* Bit 14 : Include or exclude subregion 14 in region */ +#define MWU_PREGION_SUBS_SR14_Pos (14UL) /*!< Position of SR14 field. */ +#define MWU_PREGION_SUBS_SR14_Msk (0x1UL << MWU_PREGION_SUBS_SR14_Pos) /*!< Bit mask of SR14 field. */ +#define MWU_PREGION_SUBS_SR14_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR14_Include (1UL) /*!< Include */ + +/* Bit 13 : Include or exclude subregion 13 in region */ +#define MWU_PREGION_SUBS_SR13_Pos (13UL) /*!< Position of SR13 field. */ +#define MWU_PREGION_SUBS_SR13_Msk (0x1UL << MWU_PREGION_SUBS_SR13_Pos) /*!< Bit mask of SR13 field. */ +#define MWU_PREGION_SUBS_SR13_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR13_Include (1UL) /*!< Include */ + +/* Bit 12 : Include or exclude subregion 12 in region */ +#define MWU_PREGION_SUBS_SR12_Pos (12UL) /*!< Position of SR12 field. */ +#define MWU_PREGION_SUBS_SR12_Msk (0x1UL << MWU_PREGION_SUBS_SR12_Pos) /*!< Bit mask of SR12 field. */ +#define MWU_PREGION_SUBS_SR12_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR12_Include (1UL) /*!< Include */ + +/* Bit 11 : Include or exclude subregion 11 in region */ +#define MWU_PREGION_SUBS_SR11_Pos (11UL) /*!< Position of SR11 field. */ +#define MWU_PREGION_SUBS_SR11_Msk (0x1UL << MWU_PREGION_SUBS_SR11_Pos) /*!< Bit mask of SR11 field. */ +#define MWU_PREGION_SUBS_SR11_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR11_Include (1UL) /*!< Include */ + +/* Bit 10 : Include or exclude subregion 10 in region */ +#define MWU_PREGION_SUBS_SR10_Pos (10UL) /*!< Position of SR10 field. */ +#define MWU_PREGION_SUBS_SR10_Msk (0x1UL << MWU_PREGION_SUBS_SR10_Pos) /*!< Bit mask of SR10 field. */ +#define MWU_PREGION_SUBS_SR10_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR10_Include (1UL) /*!< Include */ + +/* Bit 9 : Include or exclude subregion 9 in region */ +#define MWU_PREGION_SUBS_SR9_Pos (9UL) /*!< Position of SR9 field. */ +#define MWU_PREGION_SUBS_SR9_Msk (0x1UL << MWU_PREGION_SUBS_SR9_Pos) /*!< Bit mask of SR9 field. */ +#define MWU_PREGION_SUBS_SR9_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR9_Include (1UL) /*!< Include */ + +/* Bit 8 : Include or exclude subregion 8 in region */ +#define MWU_PREGION_SUBS_SR8_Pos (8UL) /*!< Position of SR8 field. */ +#define MWU_PREGION_SUBS_SR8_Msk (0x1UL << MWU_PREGION_SUBS_SR8_Pos) /*!< Bit mask of SR8 field. */ +#define MWU_PREGION_SUBS_SR8_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR8_Include (1UL) /*!< Include */ + +/* Bit 7 : Include or exclude subregion 7 in region */ +#define MWU_PREGION_SUBS_SR7_Pos (7UL) /*!< Position of SR7 field. */ +#define MWU_PREGION_SUBS_SR7_Msk (0x1UL << MWU_PREGION_SUBS_SR7_Pos) /*!< Bit mask of SR7 field. */ +#define MWU_PREGION_SUBS_SR7_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR7_Include (1UL) /*!< Include */ + +/* Bit 6 : Include or exclude subregion 6 in region */ +#define MWU_PREGION_SUBS_SR6_Pos (6UL) /*!< Position of SR6 field. */ +#define MWU_PREGION_SUBS_SR6_Msk (0x1UL << MWU_PREGION_SUBS_SR6_Pos) /*!< Bit mask of SR6 field. */ +#define MWU_PREGION_SUBS_SR6_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR6_Include (1UL) /*!< Include */ + +/* Bit 5 : Include or exclude subregion 5 in region */ +#define MWU_PREGION_SUBS_SR5_Pos (5UL) /*!< Position of SR5 field. */ +#define MWU_PREGION_SUBS_SR5_Msk (0x1UL << MWU_PREGION_SUBS_SR5_Pos) /*!< Bit mask of SR5 field. */ +#define MWU_PREGION_SUBS_SR5_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR5_Include (1UL) /*!< Include */ + +/* Bit 4 : Include or exclude subregion 4 in region */ +#define MWU_PREGION_SUBS_SR4_Pos (4UL) /*!< Position of SR4 field. */ +#define MWU_PREGION_SUBS_SR4_Msk (0x1UL << MWU_PREGION_SUBS_SR4_Pos) /*!< Bit mask of SR4 field. */ +#define MWU_PREGION_SUBS_SR4_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR4_Include (1UL) /*!< Include */ + +/* Bit 3 : Include or exclude subregion 3 in region */ +#define MWU_PREGION_SUBS_SR3_Pos (3UL) /*!< Position of SR3 field. */ +#define MWU_PREGION_SUBS_SR3_Msk (0x1UL << MWU_PREGION_SUBS_SR3_Pos) /*!< Bit mask of SR3 field. */ +#define MWU_PREGION_SUBS_SR3_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR3_Include (1UL) /*!< Include */ + +/* Bit 2 : Include or exclude subregion 2 in region */ +#define MWU_PREGION_SUBS_SR2_Pos (2UL) /*!< Position of SR2 field. */ +#define MWU_PREGION_SUBS_SR2_Msk (0x1UL << MWU_PREGION_SUBS_SR2_Pos) /*!< Bit mask of SR2 field. */ +#define MWU_PREGION_SUBS_SR2_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR2_Include (1UL) /*!< Include */ + +/* Bit 1 : Include or exclude subregion 1 in region */ +#define MWU_PREGION_SUBS_SR1_Pos (1UL) /*!< Position of SR1 field. */ +#define MWU_PREGION_SUBS_SR1_Msk (0x1UL << MWU_PREGION_SUBS_SR1_Pos) /*!< Bit mask of SR1 field. */ +#define MWU_PREGION_SUBS_SR1_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR1_Include (1UL) /*!< Include */ + +/* Bit 0 : Include or exclude subregion 0 in region */ +#define MWU_PREGION_SUBS_SR0_Pos (0UL) /*!< Position of SR0 field. */ +#define MWU_PREGION_SUBS_SR0_Msk (0x1UL << MWU_PREGION_SUBS_SR0_Pos) /*!< Bit mask of SR0 field. */ +#define MWU_PREGION_SUBS_SR0_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR0_Include (1UL) /*!< Include */ + + +/* Peripheral: NFCT */ +/* Description: NFC-A compatible radio */ + +/* Register: NFCT_TASKS_ACTIVATE */ +/* Description: Activate NFCT peripheral for incoming and outgoing frames, change state to activated */ + +/* Bit 0 : */ +#define NFCT_TASKS_ACTIVATE_TASKS_ACTIVATE_Pos (0UL) /*!< Position of TASKS_ACTIVATE field. */ +#define NFCT_TASKS_ACTIVATE_TASKS_ACTIVATE_Msk (0x1UL << NFCT_TASKS_ACTIVATE_TASKS_ACTIVATE_Pos) /*!< Bit mask of TASKS_ACTIVATE field. */ + +/* Register: NFCT_TASKS_DISABLE */ +/* Description: Disable NFCT peripheral */ + +/* Bit 0 : */ +#define NFCT_TASKS_DISABLE_TASKS_DISABLE_Pos (0UL) /*!< Position of TASKS_DISABLE field. */ +#define NFCT_TASKS_DISABLE_TASKS_DISABLE_Msk (0x1UL << NFCT_TASKS_DISABLE_TASKS_DISABLE_Pos) /*!< Bit mask of TASKS_DISABLE field. */ + +/* Register: NFCT_TASKS_SENSE */ +/* Description: Enable NFC sense field mode, change state to sense mode */ + +/* Bit 0 : */ +#define NFCT_TASKS_SENSE_TASKS_SENSE_Pos (0UL) /*!< Position of TASKS_SENSE field. */ +#define NFCT_TASKS_SENSE_TASKS_SENSE_Msk (0x1UL << NFCT_TASKS_SENSE_TASKS_SENSE_Pos) /*!< Bit mask of TASKS_SENSE field. */ + +/* Register: NFCT_TASKS_STARTTX */ +/* Description: Start transmission of an outgoing frame, change state to transmit */ + +/* Bit 0 : */ +#define NFCT_TASKS_STARTTX_TASKS_STARTTX_Pos (0UL) /*!< Position of TASKS_STARTTX field. */ +#define NFCT_TASKS_STARTTX_TASKS_STARTTX_Msk (0x1UL << NFCT_TASKS_STARTTX_TASKS_STARTTX_Pos) /*!< Bit mask of TASKS_STARTTX field. */ + +/* Register: NFCT_TASKS_ENABLERXDATA */ +/* Description: Initializes the EasyDMA for receive. */ + +/* Bit 0 : */ +#define NFCT_TASKS_ENABLERXDATA_TASKS_ENABLERXDATA_Pos (0UL) /*!< Position of TASKS_ENABLERXDATA field. */ +#define NFCT_TASKS_ENABLERXDATA_TASKS_ENABLERXDATA_Msk (0x1UL << NFCT_TASKS_ENABLERXDATA_TASKS_ENABLERXDATA_Pos) /*!< Bit mask of TASKS_ENABLERXDATA field. */ + +/* Register: NFCT_TASKS_GOIDLE */ +/* Description: Force state machine to IDLE state */ + +/* Bit 0 : */ +#define NFCT_TASKS_GOIDLE_TASKS_GOIDLE_Pos (0UL) /*!< Position of TASKS_GOIDLE field. */ +#define NFCT_TASKS_GOIDLE_TASKS_GOIDLE_Msk (0x1UL << NFCT_TASKS_GOIDLE_TASKS_GOIDLE_Pos) /*!< Bit mask of TASKS_GOIDLE field. */ + +/* Register: NFCT_TASKS_GOSLEEP */ +/* Description: Force state machine to SLEEP_A state */ + +/* Bit 0 : */ +#define NFCT_TASKS_GOSLEEP_TASKS_GOSLEEP_Pos (0UL) /*!< Position of TASKS_GOSLEEP field. */ +#define NFCT_TASKS_GOSLEEP_TASKS_GOSLEEP_Msk (0x1UL << NFCT_TASKS_GOSLEEP_TASKS_GOSLEEP_Pos) /*!< Bit mask of TASKS_GOSLEEP field. */ + +/* Register: NFCT_EVENTS_READY */ +/* Description: The NFCT peripheral is ready to receive and send frames */ + +/* Bit 0 : */ +#define NFCT_EVENTS_READY_EVENTS_READY_Pos (0UL) /*!< Position of EVENTS_READY field. */ +#define NFCT_EVENTS_READY_EVENTS_READY_Msk (0x1UL << NFCT_EVENTS_READY_EVENTS_READY_Pos) /*!< Bit mask of EVENTS_READY field. */ + +/* Register: NFCT_EVENTS_FIELDDETECTED */ +/* Description: Remote NFC field detected */ + +/* Bit 0 : */ +#define NFCT_EVENTS_FIELDDETECTED_EVENTS_FIELDDETECTED_Pos (0UL) /*!< Position of EVENTS_FIELDDETECTED field. */ +#define NFCT_EVENTS_FIELDDETECTED_EVENTS_FIELDDETECTED_Msk (0x1UL << NFCT_EVENTS_FIELDDETECTED_EVENTS_FIELDDETECTED_Pos) /*!< Bit mask of EVENTS_FIELDDETECTED field. */ + +/* Register: NFCT_EVENTS_FIELDLOST */ +/* Description: Remote NFC field lost */ + +/* Bit 0 : */ +#define NFCT_EVENTS_FIELDLOST_EVENTS_FIELDLOST_Pos (0UL) /*!< Position of EVENTS_FIELDLOST field. */ +#define NFCT_EVENTS_FIELDLOST_EVENTS_FIELDLOST_Msk (0x1UL << NFCT_EVENTS_FIELDLOST_EVENTS_FIELDLOST_Pos) /*!< Bit mask of EVENTS_FIELDLOST field. */ + +/* Register: NFCT_EVENTS_TXFRAMESTART */ +/* Description: Marks the start of the first symbol of a transmitted frame */ + +/* Bit 0 : */ +#define NFCT_EVENTS_TXFRAMESTART_EVENTS_TXFRAMESTART_Pos (0UL) /*!< Position of EVENTS_TXFRAMESTART field. */ +#define NFCT_EVENTS_TXFRAMESTART_EVENTS_TXFRAMESTART_Msk (0x1UL << NFCT_EVENTS_TXFRAMESTART_EVENTS_TXFRAMESTART_Pos) /*!< Bit mask of EVENTS_TXFRAMESTART field. */ + +/* Register: NFCT_EVENTS_TXFRAMEEND */ +/* Description: Marks the end of the last transmitted on-air symbol of a frame */ + +/* Bit 0 : */ +#define NFCT_EVENTS_TXFRAMEEND_EVENTS_TXFRAMEEND_Pos (0UL) /*!< Position of EVENTS_TXFRAMEEND field. */ +#define NFCT_EVENTS_TXFRAMEEND_EVENTS_TXFRAMEEND_Msk (0x1UL << NFCT_EVENTS_TXFRAMEEND_EVENTS_TXFRAMEEND_Pos) /*!< Bit mask of EVENTS_TXFRAMEEND field. */ + +/* Register: NFCT_EVENTS_RXFRAMESTART */ +/* Description: Marks the end of the first symbol of a received frame */ + +/* Bit 0 : */ +#define NFCT_EVENTS_RXFRAMESTART_EVENTS_RXFRAMESTART_Pos (0UL) /*!< Position of EVENTS_RXFRAMESTART field. */ +#define NFCT_EVENTS_RXFRAMESTART_EVENTS_RXFRAMESTART_Msk (0x1UL << NFCT_EVENTS_RXFRAMESTART_EVENTS_RXFRAMESTART_Pos) /*!< Bit mask of EVENTS_RXFRAMESTART field. */ + +/* Register: NFCT_EVENTS_RXFRAMEEND */ +/* Description: Received data has been checked (CRC, parity) and transferred to RAM, and EasyDMA has ended accessing the RX buffer */ + +/* Bit 0 : */ +#define NFCT_EVENTS_RXFRAMEEND_EVENTS_RXFRAMEEND_Pos (0UL) /*!< Position of EVENTS_RXFRAMEEND field. */ +#define NFCT_EVENTS_RXFRAMEEND_EVENTS_RXFRAMEEND_Msk (0x1UL << NFCT_EVENTS_RXFRAMEEND_EVENTS_RXFRAMEEND_Pos) /*!< Bit mask of EVENTS_RXFRAMEEND field. */ + +/* Register: NFCT_EVENTS_ERROR */ +/* Description: NFC error reported. The ERRORSTATUS register contains details on the source of the error. */ + +/* Bit 0 : */ +#define NFCT_EVENTS_ERROR_EVENTS_ERROR_Pos (0UL) /*!< Position of EVENTS_ERROR field. */ +#define NFCT_EVENTS_ERROR_EVENTS_ERROR_Msk (0x1UL << NFCT_EVENTS_ERROR_EVENTS_ERROR_Pos) /*!< Bit mask of EVENTS_ERROR field. */ + +/* Register: NFCT_EVENTS_RXERROR */ +/* Description: NFC RX frame error reported. The FRAMESTATUS.RX register contains details on the source of the error. */ + +/* Bit 0 : */ +#define NFCT_EVENTS_RXERROR_EVENTS_RXERROR_Pos (0UL) /*!< Position of EVENTS_RXERROR field. */ +#define NFCT_EVENTS_RXERROR_EVENTS_RXERROR_Msk (0x1UL << NFCT_EVENTS_RXERROR_EVENTS_RXERROR_Pos) /*!< Bit mask of EVENTS_RXERROR field. */ + +/* Register: NFCT_EVENTS_ENDRX */ +/* Description: RX buffer (as defined by PACKETPTR and MAXLEN) in Data RAM full. */ + +/* Bit 0 : */ +#define NFCT_EVENTS_ENDRX_EVENTS_ENDRX_Pos (0UL) /*!< Position of EVENTS_ENDRX field. */ +#define NFCT_EVENTS_ENDRX_EVENTS_ENDRX_Msk (0x1UL << NFCT_EVENTS_ENDRX_EVENTS_ENDRX_Pos) /*!< Bit mask of EVENTS_ENDRX field. */ + +/* Register: NFCT_EVENTS_ENDTX */ +/* Description: Transmission of data in RAM has ended, and EasyDMA has ended accessing the TX buffer */ + +/* Bit 0 : */ +#define NFCT_EVENTS_ENDTX_EVENTS_ENDTX_Pos (0UL) /*!< Position of EVENTS_ENDTX field. */ +#define NFCT_EVENTS_ENDTX_EVENTS_ENDTX_Msk (0x1UL << NFCT_EVENTS_ENDTX_EVENTS_ENDTX_Pos) /*!< Bit mask of EVENTS_ENDTX field. */ + +/* Register: NFCT_EVENTS_AUTOCOLRESSTARTED */ +/* Description: Auto collision resolution process has started */ + +/* Bit 0 : */ +#define NFCT_EVENTS_AUTOCOLRESSTARTED_EVENTS_AUTOCOLRESSTARTED_Pos (0UL) /*!< Position of EVENTS_AUTOCOLRESSTARTED field. */ +#define NFCT_EVENTS_AUTOCOLRESSTARTED_EVENTS_AUTOCOLRESSTARTED_Msk (0x1UL << NFCT_EVENTS_AUTOCOLRESSTARTED_EVENTS_AUTOCOLRESSTARTED_Pos) /*!< Bit mask of EVENTS_AUTOCOLRESSTARTED field. */ + +/* Register: NFCT_EVENTS_COLLISION */ +/* Description: NFC auto collision resolution error reported. */ + +/* Bit 0 : */ +#define NFCT_EVENTS_COLLISION_EVENTS_COLLISION_Pos (0UL) /*!< Position of EVENTS_COLLISION field. */ +#define NFCT_EVENTS_COLLISION_EVENTS_COLLISION_Msk (0x1UL << NFCT_EVENTS_COLLISION_EVENTS_COLLISION_Pos) /*!< Bit mask of EVENTS_COLLISION field. */ + +/* Register: NFCT_EVENTS_SELECTED */ +/* Description: NFC auto collision resolution successfully completed */ + +/* Bit 0 : */ +#define NFCT_EVENTS_SELECTED_EVENTS_SELECTED_Pos (0UL) /*!< Position of EVENTS_SELECTED field. */ +#define NFCT_EVENTS_SELECTED_EVENTS_SELECTED_Msk (0x1UL << NFCT_EVENTS_SELECTED_EVENTS_SELECTED_Pos) /*!< Bit mask of EVENTS_SELECTED field. */ + +/* Register: NFCT_EVENTS_STARTED */ +/* Description: EasyDMA is ready to receive or send frames. */ + +/* Bit 0 : */ +#define NFCT_EVENTS_STARTED_EVENTS_STARTED_Pos (0UL) /*!< Position of EVENTS_STARTED field. */ +#define NFCT_EVENTS_STARTED_EVENTS_STARTED_Msk (0x1UL << NFCT_EVENTS_STARTED_EVENTS_STARTED_Pos) /*!< Bit mask of EVENTS_STARTED field. */ + +/* Register: NFCT_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 5 : Shortcut between TXFRAMEEND event and ENABLERXDATA task */ +#define NFCT_SHORTS_TXFRAMEEND_ENABLERXDATA_Pos (5UL) /*!< Position of TXFRAMEEND_ENABLERXDATA field. */ +#define NFCT_SHORTS_TXFRAMEEND_ENABLERXDATA_Msk (0x1UL << NFCT_SHORTS_TXFRAMEEND_ENABLERXDATA_Pos) /*!< Bit mask of TXFRAMEEND_ENABLERXDATA field. */ +#define NFCT_SHORTS_TXFRAMEEND_ENABLERXDATA_Disabled (0UL) /*!< Disable shortcut */ +#define NFCT_SHORTS_TXFRAMEEND_ENABLERXDATA_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 1 : Shortcut between FIELDLOST event and SENSE task */ +#define NFCT_SHORTS_FIELDLOST_SENSE_Pos (1UL) /*!< Position of FIELDLOST_SENSE field. */ +#define NFCT_SHORTS_FIELDLOST_SENSE_Msk (0x1UL << NFCT_SHORTS_FIELDLOST_SENSE_Pos) /*!< Bit mask of FIELDLOST_SENSE field. */ +#define NFCT_SHORTS_FIELDLOST_SENSE_Disabled (0UL) /*!< Disable shortcut */ +#define NFCT_SHORTS_FIELDLOST_SENSE_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 0 : Shortcut between FIELDDETECTED event and ACTIVATE task */ +#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Pos (0UL) /*!< Position of FIELDDETECTED_ACTIVATE field. */ +#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Msk (0x1UL << NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Pos) /*!< Bit mask of FIELDDETECTED_ACTIVATE field. */ +#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Disabled (0UL) /*!< Disable shortcut */ +#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: NFCT_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 20 : Enable or disable interrupt for STARTED event */ +#define NFCT_INTEN_STARTED_Pos (20UL) /*!< Position of STARTED field. */ +#define NFCT_INTEN_STARTED_Msk (0x1UL << NFCT_INTEN_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define NFCT_INTEN_STARTED_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_STARTED_Enabled (1UL) /*!< Enable */ + +/* Bit 19 : Enable or disable interrupt for SELECTED event */ +#define NFCT_INTEN_SELECTED_Pos (19UL) /*!< Position of SELECTED field. */ +#define NFCT_INTEN_SELECTED_Msk (0x1UL << NFCT_INTEN_SELECTED_Pos) /*!< Bit mask of SELECTED field. */ +#define NFCT_INTEN_SELECTED_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_SELECTED_Enabled (1UL) /*!< Enable */ + +/* Bit 18 : Enable or disable interrupt for COLLISION event */ +#define NFCT_INTEN_COLLISION_Pos (18UL) /*!< Position of COLLISION field. */ +#define NFCT_INTEN_COLLISION_Msk (0x1UL << NFCT_INTEN_COLLISION_Pos) /*!< Bit mask of COLLISION field. */ +#define NFCT_INTEN_COLLISION_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_COLLISION_Enabled (1UL) /*!< Enable */ + +/* Bit 14 : Enable or disable interrupt for AUTOCOLRESSTARTED event */ +#define NFCT_INTEN_AUTOCOLRESSTARTED_Pos (14UL) /*!< Position of AUTOCOLRESSTARTED field. */ +#define NFCT_INTEN_AUTOCOLRESSTARTED_Msk (0x1UL << NFCT_INTEN_AUTOCOLRESSTARTED_Pos) /*!< Bit mask of AUTOCOLRESSTARTED field. */ +#define NFCT_INTEN_AUTOCOLRESSTARTED_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_AUTOCOLRESSTARTED_Enabled (1UL) /*!< Enable */ + +/* Bit 12 : Enable or disable interrupt for ENDTX event */ +#define NFCT_INTEN_ENDTX_Pos (12UL) /*!< Position of ENDTX field. */ +#define NFCT_INTEN_ENDTX_Msk (0x1UL << NFCT_INTEN_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ +#define NFCT_INTEN_ENDTX_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_ENDTX_Enabled (1UL) /*!< Enable */ + +/* Bit 11 : Enable or disable interrupt for ENDRX event */ +#define NFCT_INTEN_ENDRX_Pos (11UL) /*!< Position of ENDRX field. */ +#define NFCT_INTEN_ENDRX_Msk (0x1UL << NFCT_INTEN_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define NFCT_INTEN_ENDRX_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_ENDRX_Enabled (1UL) /*!< Enable */ + +/* Bit 10 : Enable or disable interrupt for RXERROR event */ +#define NFCT_INTEN_RXERROR_Pos (10UL) /*!< Position of RXERROR field. */ +#define NFCT_INTEN_RXERROR_Msk (0x1UL << NFCT_INTEN_RXERROR_Pos) /*!< Bit mask of RXERROR field. */ +#define NFCT_INTEN_RXERROR_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_RXERROR_Enabled (1UL) /*!< Enable */ + +/* Bit 7 : Enable or disable interrupt for ERROR event */ +#define NFCT_INTEN_ERROR_Pos (7UL) /*!< Position of ERROR field. */ +#define NFCT_INTEN_ERROR_Msk (0x1UL << NFCT_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define NFCT_INTEN_ERROR_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_ERROR_Enabled (1UL) /*!< Enable */ + +/* Bit 6 : Enable or disable interrupt for RXFRAMEEND event */ +#define NFCT_INTEN_RXFRAMEEND_Pos (6UL) /*!< Position of RXFRAMEEND field. */ +#define NFCT_INTEN_RXFRAMEEND_Msk (0x1UL << NFCT_INTEN_RXFRAMEEND_Pos) /*!< Bit mask of RXFRAMEEND field. */ +#define NFCT_INTEN_RXFRAMEEND_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_RXFRAMEEND_Enabled (1UL) /*!< Enable */ + +/* Bit 5 : Enable or disable interrupt for RXFRAMESTART event */ +#define NFCT_INTEN_RXFRAMESTART_Pos (5UL) /*!< Position of RXFRAMESTART field. */ +#define NFCT_INTEN_RXFRAMESTART_Msk (0x1UL << NFCT_INTEN_RXFRAMESTART_Pos) /*!< Bit mask of RXFRAMESTART field. */ +#define NFCT_INTEN_RXFRAMESTART_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_RXFRAMESTART_Enabled (1UL) /*!< Enable */ + +/* Bit 4 : Enable or disable interrupt for TXFRAMEEND event */ +#define NFCT_INTEN_TXFRAMEEND_Pos (4UL) /*!< Position of TXFRAMEEND field. */ +#define NFCT_INTEN_TXFRAMEEND_Msk (0x1UL << NFCT_INTEN_TXFRAMEEND_Pos) /*!< Bit mask of TXFRAMEEND field. */ +#define NFCT_INTEN_TXFRAMEEND_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_TXFRAMEEND_Enabled (1UL) /*!< Enable */ + +/* Bit 3 : Enable or disable interrupt for TXFRAMESTART event */ +#define NFCT_INTEN_TXFRAMESTART_Pos (3UL) /*!< Position of TXFRAMESTART field. */ +#define NFCT_INTEN_TXFRAMESTART_Msk (0x1UL << NFCT_INTEN_TXFRAMESTART_Pos) /*!< Bit mask of TXFRAMESTART field. */ +#define NFCT_INTEN_TXFRAMESTART_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_TXFRAMESTART_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable interrupt for FIELDLOST event */ +#define NFCT_INTEN_FIELDLOST_Pos (2UL) /*!< Position of FIELDLOST field. */ +#define NFCT_INTEN_FIELDLOST_Msk (0x1UL << NFCT_INTEN_FIELDLOST_Pos) /*!< Bit mask of FIELDLOST field. */ +#define NFCT_INTEN_FIELDLOST_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_FIELDLOST_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for FIELDDETECTED event */ +#define NFCT_INTEN_FIELDDETECTED_Pos (1UL) /*!< Position of FIELDDETECTED field. */ +#define NFCT_INTEN_FIELDDETECTED_Msk (0x1UL << NFCT_INTEN_FIELDDETECTED_Pos) /*!< Bit mask of FIELDDETECTED field. */ +#define NFCT_INTEN_FIELDDETECTED_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_FIELDDETECTED_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable interrupt for READY event */ +#define NFCT_INTEN_READY_Pos (0UL) /*!< Position of READY field. */ +#define NFCT_INTEN_READY_Msk (0x1UL << NFCT_INTEN_READY_Pos) /*!< Bit mask of READY field. */ +#define NFCT_INTEN_READY_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_READY_Enabled (1UL) /*!< Enable */ + +/* Register: NFCT_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 20 : Write '1' to enable interrupt for STARTED event */ +#define NFCT_INTENSET_STARTED_Pos (20UL) /*!< Position of STARTED field. */ +#define NFCT_INTENSET_STARTED_Msk (0x1UL << NFCT_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define NFCT_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_STARTED_Set (1UL) /*!< Enable */ + +/* Bit 19 : Write '1' to enable interrupt for SELECTED event */ +#define NFCT_INTENSET_SELECTED_Pos (19UL) /*!< Position of SELECTED field. */ +#define NFCT_INTENSET_SELECTED_Msk (0x1UL << NFCT_INTENSET_SELECTED_Pos) /*!< Bit mask of SELECTED field. */ +#define NFCT_INTENSET_SELECTED_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_SELECTED_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_SELECTED_Set (1UL) /*!< Enable */ + +/* Bit 18 : Write '1' to enable interrupt for COLLISION event */ +#define NFCT_INTENSET_COLLISION_Pos (18UL) /*!< Position of COLLISION field. */ +#define NFCT_INTENSET_COLLISION_Msk (0x1UL << NFCT_INTENSET_COLLISION_Pos) /*!< Bit mask of COLLISION field. */ +#define NFCT_INTENSET_COLLISION_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_COLLISION_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_COLLISION_Set (1UL) /*!< Enable */ + +/* Bit 14 : Write '1' to enable interrupt for AUTOCOLRESSTARTED event */ +#define NFCT_INTENSET_AUTOCOLRESSTARTED_Pos (14UL) /*!< Position of AUTOCOLRESSTARTED field. */ +#define NFCT_INTENSET_AUTOCOLRESSTARTED_Msk (0x1UL << NFCT_INTENSET_AUTOCOLRESSTARTED_Pos) /*!< Bit mask of AUTOCOLRESSTARTED field. */ +#define NFCT_INTENSET_AUTOCOLRESSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_AUTOCOLRESSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_AUTOCOLRESSTARTED_Set (1UL) /*!< Enable */ + +/* Bit 12 : Write '1' to enable interrupt for ENDTX event */ +#define NFCT_INTENSET_ENDTX_Pos (12UL) /*!< Position of ENDTX field. */ +#define NFCT_INTENSET_ENDTX_Msk (0x1UL << NFCT_INTENSET_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ +#define NFCT_INTENSET_ENDTX_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_ENDTX_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_ENDTX_Set (1UL) /*!< Enable */ + +/* Bit 11 : Write '1' to enable interrupt for ENDRX event */ +#define NFCT_INTENSET_ENDRX_Pos (11UL) /*!< Position of ENDRX field. */ +#define NFCT_INTENSET_ENDRX_Msk (0x1UL << NFCT_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define NFCT_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_ENDRX_Set (1UL) /*!< Enable */ + +/* Bit 10 : Write '1' to enable interrupt for RXERROR event */ +#define NFCT_INTENSET_RXERROR_Pos (10UL) /*!< Position of RXERROR field. */ +#define NFCT_INTENSET_RXERROR_Msk (0x1UL << NFCT_INTENSET_RXERROR_Pos) /*!< Bit mask of RXERROR field. */ +#define NFCT_INTENSET_RXERROR_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_RXERROR_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_RXERROR_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to enable interrupt for ERROR event */ +#define NFCT_INTENSET_ERROR_Pos (7UL) /*!< Position of ERROR field. */ +#define NFCT_INTENSET_ERROR_Msk (0x1UL << NFCT_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define NFCT_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_ERROR_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to enable interrupt for RXFRAMEEND event */ +#define NFCT_INTENSET_RXFRAMEEND_Pos (6UL) /*!< Position of RXFRAMEEND field. */ +#define NFCT_INTENSET_RXFRAMEEND_Msk (0x1UL << NFCT_INTENSET_RXFRAMEEND_Pos) /*!< Bit mask of RXFRAMEEND field. */ +#define NFCT_INTENSET_RXFRAMEEND_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_RXFRAMEEND_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_RXFRAMEEND_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to enable interrupt for RXFRAMESTART event */ +#define NFCT_INTENSET_RXFRAMESTART_Pos (5UL) /*!< Position of RXFRAMESTART field. */ +#define NFCT_INTENSET_RXFRAMESTART_Msk (0x1UL << NFCT_INTENSET_RXFRAMESTART_Pos) /*!< Bit mask of RXFRAMESTART field. */ +#define NFCT_INTENSET_RXFRAMESTART_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_RXFRAMESTART_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_RXFRAMESTART_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to enable interrupt for TXFRAMEEND event */ +#define NFCT_INTENSET_TXFRAMEEND_Pos (4UL) /*!< Position of TXFRAMEEND field. */ +#define NFCT_INTENSET_TXFRAMEEND_Msk (0x1UL << NFCT_INTENSET_TXFRAMEEND_Pos) /*!< Bit mask of TXFRAMEEND field. */ +#define NFCT_INTENSET_TXFRAMEEND_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_TXFRAMEEND_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_TXFRAMEEND_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to enable interrupt for TXFRAMESTART event */ +#define NFCT_INTENSET_TXFRAMESTART_Pos (3UL) /*!< Position of TXFRAMESTART field. */ +#define NFCT_INTENSET_TXFRAMESTART_Msk (0x1UL << NFCT_INTENSET_TXFRAMESTART_Pos) /*!< Bit mask of TXFRAMESTART field. */ +#define NFCT_INTENSET_TXFRAMESTART_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_TXFRAMESTART_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_TXFRAMESTART_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to enable interrupt for FIELDLOST event */ +#define NFCT_INTENSET_FIELDLOST_Pos (2UL) /*!< Position of FIELDLOST field. */ +#define NFCT_INTENSET_FIELDLOST_Msk (0x1UL << NFCT_INTENSET_FIELDLOST_Pos) /*!< Bit mask of FIELDLOST field. */ +#define NFCT_INTENSET_FIELDLOST_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_FIELDLOST_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_FIELDLOST_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable interrupt for FIELDDETECTED event */ +#define NFCT_INTENSET_FIELDDETECTED_Pos (1UL) /*!< Position of FIELDDETECTED field. */ +#define NFCT_INTENSET_FIELDDETECTED_Msk (0x1UL << NFCT_INTENSET_FIELDDETECTED_Pos) /*!< Bit mask of FIELDDETECTED field. */ +#define NFCT_INTENSET_FIELDDETECTED_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_FIELDDETECTED_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_FIELDDETECTED_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to enable interrupt for READY event */ +#define NFCT_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */ +#define NFCT_INTENSET_READY_Msk (0x1UL << NFCT_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ +#define NFCT_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_READY_Set (1UL) /*!< Enable */ + +/* Register: NFCT_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 20 : Write '1' to disable interrupt for STARTED event */ +#define NFCT_INTENCLR_STARTED_Pos (20UL) /*!< Position of STARTED field. */ +#define NFCT_INTENCLR_STARTED_Msk (0x1UL << NFCT_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define NFCT_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_STARTED_Clear (1UL) /*!< Disable */ + +/* Bit 19 : Write '1' to disable interrupt for SELECTED event */ +#define NFCT_INTENCLR_SELECTED_Pos (19UL) /*!< Position of SELECTED field. */ +#define NFCT_INTENCLR_SELECTED_Msk (0x1UL << NFCT_INTENCLR_SELECTED_Pos) /*!< Bit mask of SELECTED field. */ +#define NFCT_INTENCLR_SELECTED_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_SELECTED_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_SELECTED_Clear (1UL) /*!< Disable */ + +/* Bit 18 : Write '1' to disable interrupt for COLLISION event */ +#define NFCT_INTENCLR_COLLISION_Pos (18UL) /*!< Position of COLLISION field. */ +#define NFCT_INTENCLR_COLLISION_Msk (0x1UL << NFCT_INTENCLR_COLLISION_Pos) /*!< Bit mask of COLLISION field. */ +#define NFCT_INTENCLR_COLLISION_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_COLLISION_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_COLLISION_Clear (1UL) /*!< Disable */ + +/* Bit 14 : Write '1' to disable interrupt for AUTOCOLRESSTARTED event */ +#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Pos (14UL) /*!< Position of AUTOCOLRESSTARTED field. */ +#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Msk (0x1UL << NFCT_INTENCLR_AUTOCOLRESSTARTED_Pos) /*!< Bit mask of AUTOCOLRESSTARTED field. */ +#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Clear (1UL) /*!< Disable */ + +/* Bit 12 : Write '1' to disable interrupt for ENDTX event */ +#define NFCT_INTENCLR_ENDTX_Pos (12UL) /*!< Position of ENDTX field. */ +#define NFCT_INTENCLR_ENDTX_Msk (0x1UL << NFCT_INTENCLR_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ +#define NFCT_INTENCLR_ENDTX_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_ENDTX_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_ENDTX_Clear (1UL) /*!< Disable */ + +/* Bit 11 : Write '1' to disable interrupt for ENDRX event */ +#define NFCT_INTENCLR_ENDRX_Pos (11UL) /*!< Position of ENDRX field. */ +#define NFCT_INTENCLR_ENDRX_Msk (0x1UL << NFCT_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define NFCT_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */ + +/* Bit 10 : Write '1' to disable interrupt for RXERROR event */ +#define NFCT_INTENCLR_RXERROR_Pos (10UL) /*!< Position of RXERROR field. */ +#define NFCT_INTENCLR_RXERROR_Msk (0x1UL << NFCT_INTENCLR_RXERROR_Pos) /*!< Bit mask of RXERROR field. */ +#define NFCT_INTENCLR_RXERROR_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_RXERROR_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_RXERROR_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to disable interrupt for ERROR event */ +#define NFCT_INTENCLR_ERROR_Pos (7UL) /*!< Position of ERROR field. */ +#define NFCT_INTENCLR_ERROR_Msk (0x1UL << NFCT_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define NFCT_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to disable interrupt for RXFRAMEEND event */ +#define NFCT_INTENCLR_RXFRAMEEND_Pos (6UL) /*!< Position of RXFRAMEEND field. */ +#define NFCT_INTENCLR_RXFRAMEEND_Msk (0x1UL << NFCT_INTENCLR_RXFRAMEEND_Pos) /*!< Bit mask of RXFRAMEEND field. */ +#define NFCT_INTENCLR_RXFRAMEEND_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_RXFRAMEEND_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_RXFRAMEEND_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to disable interrupt for RXFRAMESTART event */ +#define NFCT_INTENCLR_RXFRAMESTART_Pos (5UL) /*!< Position of RXFRAMESTART field. */ +#define NFCT_INTENCLR_RXFRAMESTART_Msk (0x1UL << NFCT_INTENCLR_RXFRAMESTART_Pos) /*!< Bit mask of RXFRAMESTART field. */ +#define NFCT_INTENCLR_RXFRAMESTART_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_RXFRAMESTART_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_RXFRAMESTART_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to disable interrupt for TXFRAMEEND event */ +#define NFCT_INTENCLR_TXFRAMEEND_Pos (4UL) /*!< Position of TXFRAMEEND field. */ +#define NFCT_INTENCLR_TXFRAMEEND_Msk (0x1UL << NFCT_INTENCLR_TXFRAMEEND_Pos) /*!< Bit mask of TXFRAMEEND field. */ +#define NFCT_INTENCLR_TXFRAMEEND_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_TXFRAMEEND_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_TXFRAMEEND_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to disable interrupt for TXFRAMESTART event */ +#define NFCT_INTENCLR_TXFRAMESTART_Pos (3UL) /*!< Position of TXFRAMESTART field. */ +#define NFCT_INTENCLR_TXFRAMESTART_Msk (0x1UL << NFCT_INTENCLR_TXFRAMESTART_Pos) /*!< Bit mask of TXFRAMESTART field. */ +#define NFCT_INTENCLR_TXFRAMESTART_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_TXFRAMESTART_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_TXFRAMESTART_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to disable interrupt for FIELDLOST event */ +#define NFCT_INTENCLR_FIELDLOST_Pos (2UL) /*!< Position of FIELDLOST field. */ +#define NFCT_INTENCLR_FIELDLOST_Msk (0x1UL << NFCT_INTENCLR_FIELDLOST_Pos) /*!< Bit mask of FIELDLOST field. */ +#define NFCT_INTENCLR_FIELDLOST_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_FIELDLOST_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_FIELDLOST_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable interrupt for FIELDDETECTED event */ +#define NFCT_INTENCLR_FIELDDETECTED_Pos (1UL) /*!< Position of FIELDDETECTED field. */ +#define NFCT_INTENCLR_FIELDDETECTED_Msk (0x1UL << NFCT_INTENCLR_FIELDDETECTED_Pos) /*!< Bit mask of FIELDDETECTED field. */ +#define NFCT_INTENCLR_FIELDDETECTED_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_FIELDDETECTED_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_FIELDDETECTED_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to disable interrupt for READY event */ +#define NFCT_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */ +#define NFCT_INTENCLR_READY_Msk (0x1UL << NFCT_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ +#define NFCT_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_READY_Clear (1UL) /*!< Disable */ + +/* Register: NFCT_ERRORSTATUS */ +/* Description: NFC Error Status register */ + +/* Bit 0 : No STARTTX task triggered before expiration of the time set in FRAMEDELAYMAX */ +#define NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Pos (0UL) /*!< Position of FRAMEDELAYTIMEOUT field. */ +#define NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Msk (0x1UL << NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Pos) /*!< Bit mask of FRAMEDELAYTIMEOUT field. */ + +/* Register: NFCT_FRAMESTATUS_RX */ +/* Description: Result of last incoming frame */ + +/* Bit 3 : Overrun detected */ +#define NFCT_FRAMESTATUS_RX_OVERRUN_Pos (3UL) /*!< Position of OVERRUN field. */ +#define NFCT_FRAMESTATUS_RX_OVERRUN_Msk (0x1UL << NFCT_FRAMESTATUS_RX_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ +#define NFCT_FRAMESTATUS_RX_OVERRUN_NoOverrun (0UL) /*!< No overrun detected */ +#define NFCT_FRAMESTATUS_RX_OVERRUN_Overrun (1UL) /*!< Overrun error */ + +/* Bit 2 : Parity status of received frame */ +#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_Pos (2UL) /*!< Position of PARITYSTATUS field. */ +#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_Msk (0x1UL << NFCT_FRAMESTATUS_RX_PARITYSTATUS_Pos) /*!< Bit mask of PARITYSTATUS field. */ +#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_ParityOK (0UL) /*!< Frame received with parity OK */ +#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_ParityError (1UL) /*!< Frame received with parity error */ + +/* Bit 0 : No valid end of frame (EoF) detected */ +#define NFCT_FRAMESTATUS_RX_CRCERROR_Pos (0UL) /*!< Position of CRCERROR field. */ +#define NFCT_FRAMESTATUS_RX_CRCERROR_Msk (0x1UL << NFCT_FRAMESTATUS_RX_CRCERROR_Pos) /*!< Bit mask of CRCERROR field. */ +#define NFCT_FRAMESTATUS_RX_CRCERROR_CRCCorrect (0UL) /*!< Valid CRC detected */ +#define NFCT_FRAMESTATUS_RX_CRCERROR_CRCError (1UL) /*!< CRC received does not match local check */ + +/* Register: NFCT_NFCTAGSTATE */ +/* Description: NfcTag state register */ + +/* Bits 2..0 : NfcTag state */ +#define NFCT_NFCTAGSTATE_NFCTAGSTATE_Pos (0UL) /*!< Position of NFCTAGSTATE field. */ +#define NFCT_NFCTAGSTATE_NFCTAGSTATE_Msk (0x7UL << NFCT_NFCTAGSTATE_NFCTAGSTATE_Pos) /*!< Bit mask of NFCTAGSTATE field. */ +#define NFCT_NFCTAGSTATE_NFCTAGSTATE_Disabled (0UL) /*!< Disabled or sense */ +#define NFCT_NFCTAGSTATE_NFCTAGSTATE_RampUp (2UL) /*!< RampUp */ +#define NFCT_NFCTAGSTATE_NFCTAGSTATE_Idle (3UL) /*!< Idle */ +#define NFCT_NFCTAGSTATE_NFCTAGSTATE_Receive (4UL) /*!< Receive */ +#define NFCT_NFCTAGSTATE_NFCTAGSTATE_FrameDelay (5UL) /*!< FrameDelay */ +#define NFCT_NFCTAGSTATE_NFCTAGSTATE_Transmit (6UL) /*!< Transmit */ + +/* Register: NFCT_SLEEPSTATE */ +/* Description: Sleep state during automatic collision resolution */ + +/* Bit 0 : Reflects the sleep state during automatic collision resolution. Set to IDLE + by a GOIDLE task. Set to SLEEP_A when a valid SLEEP_REQ frame is received or by a + GOSLEEP task. */ +#define NFCT_SLEEPSTATE_SLEEPSTATE_Pos (0UL) /*!< Position of SLEEPSTATE field. */ +#define NFCT_SLEEPSTATE_SLEEPSTATE_Msk (0x1UL << NFCT_SLEEPSTATE_SLEEPSTATE_Pos) /*!< Bit mask of SLEEPSTATE field. */ +#define NFCT_SLEEPSTATE_SLEEPSTATE_Idle (0UL) /*!< State is IDLE. */ +#define NFCT_SLEEPSTATE_SLEEPSTATE_SleepA (1UL) /*!< State is SLEEP_A. */ + +/* Register: NFCT_FIELDPRESENT */ +/* Description: Indicates the presence or not of a valid field */ + +/* Bit 1 : Indicates if the low level has locked to the field */ +#define NFCT_FIELDPRESENT_LOCKDETECT_Pos (1UL) /*!< Position of LOCKDETECT field. */ +#define NFCT_FIELDPRESENT_LOCKDETECT_Msk (0x1UL << NFCT_FIELDPRESENT_LOCKDETECT_Pos) /*!< Bit mask of LOCKDETECT field. */ +#define NFCT_FIELDPRESENT_LOCKDETECT_NotLocked (0UL) /*!< Not locked to field */ +#define NFCT_FIELDPRESENT_LOCKDETECT_Locked (1UL) /*!< Locked to field */ + +/* Bit 0 : Indicates if a valid field is present. Available only in the activated state. */ +#define NFCT_FIELDPRESENT_FIELDPRESENT_Pos (0UL) /*!< Position of FIELDPRESENT field. */ +#define NFCT_FIELDPRESENT_FIELDPRESENT_Msk (0x1UL << NFCT_FIELDPRESENT_FIELDPRESENT_Pos) /*!< Bit mask of FIELDPRESENT field. */ +#define NFCT_FIELDPRESENT_FIELDPRESENT_NoField (0UL) /*!< No valid field detected */ +#define NFCT_FIELDPRESENT_FIELDPRESENT_FieldPresent (1UL) /*!< Valid field detected */ + +/* Register: NFCT_FRAMEDELAYMIN */ +/* Description: Minimum frame delay */ + +/* Bits 15..0 : Minimum frame delay in number of 13.56 MHz clocks */ +#define NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Pos (0UL) /*!< Position of FRAMEDELAYMIN field. */ +#define NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Msk (0xFFFFUL << NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Pos) /*!< Bit mask of FRAMEDELAYMIN field. */ + +/* Register: NFCT_FRAMEDELAYMAX */ +/* Description: Maximum frame delay */ + +/* Bits 19..0 : Maximum frame delay in number of 13.56 MHz clocks */ +#define NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Pos (0UL) /*!< Position of FRAMEDELAYMAX field. */ +#define NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Msk (0xFFFFFUL << NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Pos) /*!< Bit mask of FRAMEDELAYMAX field. */ + +/* Register: NFCT_FRAMEDELAYMODE */ +/* Description: Configuration register for the Frame Delay Timer */ + +/* Bits 1..0 : Configuration register for the Frame Delay Timer */ +#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Pos (0UL) /*!< Position of FRAMEDELAYMODE field. */ +#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Msk (0x3UL << NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Pos) /*!< Bit mask of FRAMEDELAYMODE field. */ +#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_FreeRun (0UL) /*!< Transmission is independent of frame timer and will start when the STARTTX task is triggered. No timeout. */ +#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Window (1UL) /*!< Frame is transmitted between FRAMEDELAYMIN and FRAMEDELAYMAX */ +#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_ExactVal (2UL) /*!< Frame is transmitted exactly at FRAMEDELAYMAX */ +#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_WindowGrid (3UL) /*!< Frame is transmitted on a bit grid between FRAMEDELAYMIN and FRAMEDELAYMAX */ + +/* Register: NFCT_PACKETPTR */ +/* Description: Packet pointer for TXD and RXD data storage in Data RAM */ + +/* Bits 31..0 : Packet pointer for TXD and RXD data storage in Data RAM. This address is a byte-aligned RAM address. */ +#define NFCT_PACKETPTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define NFCT_PACKETPTR_PTR_Msk (0xFFFFFFFFUL << NFCT_PACKETPTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: NFCT_MAXLEN */ +/* Description: Size of the RAM buffer allocated to TXD and RXD data storage each */ + +/* Bits 8..0 : Size of the RAM buffer allocated to TXD and RXD data storage each */ +#define NFCT_MAXLEN_MAXLEN_Pos (0UL) /*!< Position of MAXLEN field. */ +#define NFCT_MAXLEN_MAXLEN_Msk (0x1FFUL << NFCT_MAXLEN_MAXLEN_Pos) /*!< Bit mask of MAXLEN field. */ + +/* Register: NFCT_TXD_FRAMECONFIG */ +/* Description: Configuration of outgoing frames */ + +/* Bit 4 : CRC mode for outgoing frames */ +#define NFCT_TXD_FRAMECONFIG_CRCMODETX_Pos (4UL) /*!< Position of CRCMODETX field. */ +#define NFCT_TXD_FRAMECONFIG_CRCMODETX_Msk (0x1UL << NFCT_TXD_FRAMECONFIG_CRCMODETX_Pos) /*!< Bit mask of CRCMODETX field. */ +#define NFCT_TXD_FRAMECONFIG_CRCMODETX_NoCRCTX (0UL) /*!< CRC is not added to the frame */ +#define NFCT_TXD_FRAMECONFIG_CRCMODETX_CRC16TX (1UL) /*!< 16 bit CRC added to the frame based on all the data read from RAM that is used in the frame */ + +/* Bit 2 : Adding SoF or not in TX frames */ +#define NFCT_TXD_FRAMECONFIG_SOF_Pos (2UL) /*!< Position of SOF field. */ +#define NFCT_TXD_FRAMECONFIG_SOF_Msk (0x1UL << NFCT_TXD_FRAMECONFIG_SOF_Pos) /*!< Bit mask of SOF field. */ +#define NFCT_TXD_FRAMECONFIG_SOF_NoSoF (0UL) /*!< SoF symbol not added */ +#define NFCT_TXD_FRAMECONFIG_SOF_SoF (1UL) /*!< SoF symbol added */ + +/* Bit 1 : Discarding unused bits at start or end of a frame */ +#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_Pos (1UL) /*!< Position of DISCARDMODE field. */ +#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_Msk (0x1UL << NFCT_TXD_FRAMECONFIG_DISCARDMODE_Pos) /*!< Bit mask of DISCARDMODE field. */ +#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_DiscardEnd (0UL) /*!< Unused bits are discarded at end of frame (EoF) */ +#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_DiscardStart (1UL) /*!< Unused bits are discarded at start of frame (SoF) */ + +/* Bit 0 : Indicates if parity is added to the frame */ +#define NFCT_TXD_FRAMECONFIG_PARITY_Pos (0UL) /*!< Position of PARITY field. */ +#define NFCT_TXD_FRAMECONFIG_PARITY_Msk (0x1UL << NFCT_TXD_FRAMECONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */ +#define NFCT_TXD_FRAMECONFIG_PARITY_NoParity (0UL) /*!< Parity is not added to TX frames */ +#define NFCT_TXD_FRAMECONFIG_PARITY_Parity (1UL) /*!< Parity is added to TX frames */ + +/* Register: NFCT_TXD_AMOUNT */ +/* Description: Size of outgoing frame */ + +/* Bits 11..3 : Number of complete bytes that shall be included in the frame, excluding CRC, parity and framing */ +#define NFCT_TXD_AMOUNT_TXDATABYTES_Pos (3UL) /*!< Position of TXDATABYTES field. */ +#define NFCT_TXD_AMOUNT_TXDATABYTES_Msk (0x1FFUL << NFCT_TXD_AMOUNT_TXDATABYTES_Pos) /*!< Bit mask of TXDATABYTES field. */ + +/* Bits 2..0 : Number of bits in the last or first byte read from RAM that shall be included in the frame (excluding parity bit). */ +#define NFCT_TXD_AMOUNT_TXDATABITS_Pos (0UL) /*!< Position of TXDATABITS field. */ +#define NFCT_TXD_AMOUNT_TXDATABITS_Msk (0x7UL << NFCT_TXD_AMOUNT_TXDATABITS_Pos) /*!< Bit mask of TXDATABITS field. */ + +/* Register: NFCT_RXD_FRAMECONFIG */ +/* Description: Configuration of incoming frames */ + +/* Bit 4 : CRC mode for incoming frames */ +#define NFCT_RXD_FRAMECONFIG_CRCMODERX_Pos (4UL) /*!< Position of CRCMODERX field. */ +#define NFCT_RXD_FRAMECONFIG_CRCMODERX_Msk (0x1UL << NFCT_RXD_FRAMECONFIG_CRCMODERX_Pos) /*!< Bit mask of CRCMODERX field. */ +#define NFCT_RXD_FRAMECONFIG_CRCMODERX_NoCRCRX (0UL) /*!< CRC is not expected in RX frames */ +#define NFCT_RXD_FRAMECONFIG_CRCMODERX_CRC16RX (1UL) /*!< Last 16 bits in RX frame is CRC, CRC is checked and CRCSTATUS updated */ + +/* Bit 2 : SoF expected or not in RX frames */ +#define NFCT_RXD_FRAMECONFIG_SOF_Pos (2UL) /*!< Position of SOF field. */ +#define NFCT_RXD_FRAMECONFIG_SOF_Msk (0x1UL << NFCT_RXD_FRAMECONFIG_SOF_Pos) /*!< Bit mask of SOF field. */ +#define NFCT_RXD_FRAMECONFIG_SOF_NoSoF (0UL) /*!< SoF symbol is not expected in RX frames */ +#define NFCT_RXD_FRAMECONFIG_SOF_SoF (1UL) /*!< SoF symbol is expected in RX frames */ + +/* Bit 0 : Indicates if parity expected in RX frame */ +#define NFCT_RXD_FRAMECONFIG_PARITY_Pos (0UL) /*!< Position of PARITY field. */ +#define NFCT_RXD_FRAMECONFIG_PARITY_Msk (0x1UL << NFCT_RXD_FRAMECONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */ +#define NFCT_RXD_FRAMECONFIG_PARITY_NoParity (0UL) /*!< Parity is not expected in RX frames */ +#define NFCT_RXD_FRAMECONFIG_PARITY_Parity (1UL) /*!< Parity is expected in RX frames */ + +/* Register: NFCT_RXD_AMOUNT */ +/* Description: Size of last incoming frame */ + +/* Bits 11..3 : Number of complete bytes received in the frame (including CRC, but excluding parity and SoF/EoF framing) */ +#define NFCT_RXD_AMOUNT_RXDATABYTES_Pos (3UL) /*!< Position of RXDATABYTES field. */ +#define NFCT_RXD_AMOUNT_RXDATABYTES_Msk (0x1FFUL << NFCT_RXD_AMOUNT_RXDATABYTES_Pos) /*!< Bit mask of RXDATABYTES field. */ + +/* Bits 2..0 : Number of bits in the last byte in the frame, if less than 8 (including CRC, but excluding parity and SoF/EoF framing). */ +#define NFCT_RXD_AMOUNT_RXDATABITS_Pos (0UL) /*!< Position of RXDATABITS field. */ +#define NFCT_RXD_AMOUNT_RXDATABITS_Msk (0x7UL << NFCT_RXD_AMOUNT_RXDATABITS_Pos) /*!< Bit mask of RXDATABITS field. */ + +/* Register: NFCT_NFCID1_LAST */ +/* Description: Last NFCID1 part (4, 7 or 10 bytes ID) */ + +/* Bits 31..24 : NFCID1 byte W */ +#define NFCT_NFCID1_LAST_NFCID1_W_Pos (24UL) /*!< Position of NFCID1_W field. */ +#define NFCT_NFCID1_LAST_NFCID1_W_Msk (0xFFUL << NFCT_NFCID1_LAST_NFCID1_W_Pos) /*!< Bit mask of NFCID1_W field. */ + +/* Bits 23..16 : NFCID1 byte X */ +#define NFCT_NFCID1_LAST_NFCID1_X_Pos (16UL) /*!< Position of NFCID1_X field. */ +#define NFCT_NFCID1_LAST_NFCID1_X_Msk (0xFFUL << NFCT_NFCID1_LAST_NFCID1_X_Pos) /*!< Bit mask of NFCID1_X field. */ + +/* Bits 15..8 : NFCID1 byte Y */ +#define NFCT_NFCID1_LAST_NFCID1_Y_Pos (8UL) /*!< Position of NFCID1_Y field. */ +#define NFCT_NFCID1_LAST_NFCID1_Y_Msk (0xFFUL << NFCT_NFCID1_LAST_NFCID1_Y_Pos) /*!< Bit mask of NFCID1_Y field. */ + +/* Bits 7..0 : NFCID1 byte Z (very last byte sent) */ +#define NFCT_NFCID1_LAST_NFCID1_Z_Pos (0UL) /*!< Position of NFCID1_Z field. */ +#define NFCT_NFCID1_LAST_NFCID1_Z_Msk (0xFFUL << NFCT_NFCID1_LAST_NFCID1_Z_Pos) /*!< Bit mask of NFCID1_Z field. */ + +/* Register: NFCT_NFCID1_2ND_LAST */ +/* Description: Second last NFCID1 part (7 or 10 bytes ID) */ + +/* Bits 23..16 : NFCID1 byte T */ +#define NFCT_NFCID1_2ND_LAST_NFCID1_T_Pos (16UL) /*!< Position of NFCID1_T field. */ +#define NFCT_NFCID1_2ND_LAST_NFCID1_T_Msk (0xFFUL << NFCT_NFCID1_2ND_LAST_NFCID1_T_Pos) /*!< Bit mask of NFCID1_T field. */ + +/* Bits 15..8 : NFCID1 byte U */ +#define NFCT_NFCID1_2ND_LAST_NFCID1_U_Pos (8UL) /*!< Position of NFCID1_U field. */ +#define NFCT_NFCID1_2ND_LAST_NFCID1_U_Msk (0xFFUL << NFCT_NFCID1_2ND_LAST_NFCID1_U_Pos) /*!< Bit mask of NFCID1_U field. */ + +/* Bits 7..0 : NFCID1 byte V */ +#define NFCT_NFCID1_2ND_LAST_NFCID1_V_Pos (0UL) /*!< Position of NFCID1_V field. */ +#define NFCT_NFCID1_2ND_LAST_NFCID1_V_Msk (0xFFUL << NFCT_NFCID1_2ND_LAST_NFCID1_V_Pos) /*!< Bit mask of NFCID1_V field. */ + +/* Register: NFCT_NFCID1_3RD_LAST */ +/* Description: Third last NFCID1 part (10 bytes ID) */ + +/* Bits 23..16 : NFCID1 byte Q */ +#define NFCT_NFCID1_3RD_LAST_NFCID1_Q_Pos (16UL) /*!< Position of NFCID1_Q field. */ +#define NFCT_NFCID1_3RD_LAST_NFCID1_Q_Msk (0xFFUL << NFCT_NFCID1_3RD_LAST_NFCID1_Q_Pos) /*!< Bit mask of NFCID1_Q field. */ + +/* Bits 15..8 : NFCID1 byte R */ +#define NFCT_NFCID1_3RD_LAST_NFCID1_R_Pos (8UL) /*!< Position of NFCID1_R field. */ +#define NFCT_NFCID1_3RD_LAST_NFCID1_R_Msk (0xFFUL << NFCT_NFCID1_3RD_LAST_NFCID1_R_Pos) /*!< Bit mask of NFCID1_R field. */ + +/* Bits 7..0 : NFCID1 byte S */ +#define NFCT_NFCID1_3RD_LAST_NFCID1_S_Pos (0UL) /*!< Position of NFCID1_S field. */ +#define NFCT_NFCID1_3RD_LAST_NFCID1_S_Msk (0xFFUL << NFCT_NFCID1_3RD_LAST_NFCID1_S_Pos) /*!< Bit mask of NFCID1_S field. */ + +/* Register: NFCT_AUTOCOLRESCONFIG */ +/* Description: Controls the auto collision resolution function. This setting must be done before the NFCT peripheral is enabled. */ + +/* Bit 0 : Enables/disables auto collision resolution */ +#define NFCT_AUTOCOLRESCONFIG_MODE_Pos (0UL) /*!< Position of MODE field. */ +#define NFCT_AUTOCOLRESCONFIG_MODE_Msk (0x1UL << NFCT_AUTOCOLRESCONFIG_MODE_Pos) /*!< Bit mask of MODE field. */ +#define NFCT_AUTOCOLRESCONFIG_MODE_Enabled (0UL) /*!< Auto collision resolution enabled */ +#define NFCT_AUTOCOLRESCONFIG_MODE_Disabled (1UL) /*!< Auto collision resolution disabled */ + +/* Register: NFCT_SENSRES */ +/* Description: NFC-A SENS_RES auto-response settings */ + +/* Bits 15..12 : Reserved for future use. Shall be 0. */ +#define NFCT_SENSRES_RFU74_Pos (12UL) /*!< Position of RFU74 field. */ +#define NFCT_SENSRES_RFU74_Msk (0xFUL << NFCT_SENSRES_RFU74_Pos) /*!< Bit mask of RFU74 field. */ + +/* Bits 11..8 : Tag platform configuration as defined by the b4:b1 of byte 2 in SENS_RES response in the NFC Forum, NFC Digital Protocol Technical Specification */ +#define NFCT_SENSRES_PLATFCONFIG_Pos (8UL) /*!< Position of PLATFCONFIG field. */ +#define NFCT_SENSRES_PLATFCONFIG_Msk (0xFUL << NFCT_SENSRES_PLATFCONFIG_Pos) /*!< Bit mask of PLATFCONFIG field. */ + +/* Bits 7..6 : NFCID1 size. This value is used by the auto collision resolution engine. */ +#define NFCT_SENSRES_NFCIDSIZE_Pos (6UL) /*!< Position of NFCIDSIZE field. */ +#define NFCT_SENSRES_NFCIDSIZE_Msk (0x3UL << NFCT_SENSRES_NFCIDSIZE_Pos) /*!< Bit mask of NFCIDSIZE field. */ +#define NFCT_SENSRES_NFCIDSIZE_NFCID1Single (0UL) /*!< NFCID1 size: single (4 bytes) */ +#define NFCT_SENSRES_NFCIDSIZE_NFCID1Double (1UL) /*!< NFCID1 size: double (7 bytes) */ +#define NFCT_SENSRES_NFCIDSIZE_NFCID1Triple (2UL) /*!< NFCID1 size: triple (10 bytes) */ + +/* Bit 5 : Reserved for future use. Shall be 0. */ +#define NFCT_SENSRES_RFU5_Pos (5UL) /*!< Position of RFU5 field. */ +#define NFCT_SENSRES_RFU5_Msk (0x1UL << NFCT_SENSRES_RFU5_Pos) /*!< Bit mask of RFU5 field. */ + +/* Bits 4..0 : Bit frame SDD as defined by the b5:b1 of byte 1 in SENS_RES response in the NFC Forum, NFC Digital Protocol Technical Specification */ +#define NFCT_SENSRES_BITFRAMESDD_Pos (0UL) /*!< Position of BITFRAMESDD field. */ +#define NFCT_SENSRES_BITFRAMESDD_Msk (0x1FUL << NFCT_SENSRES_BITFRAMESDD_Pos) /*!< Bit mask of BITFRAMESDD field. */ +#define NFCT_SENSRES_BITFRAMESDD_SDD00000 (0UL) /*!< SDD pattern 00000 */ +#define NFCT_SENSRES_BITFRAMESDD_SDD00001 (1UL) /*!< SDD pattern 00001 */ +#define NFCT_SENSRES_BITFRAMESDD_SDD00010 (2UL) /*!< SDD pattern 00010 */ +#define NFCT_SENSRES_BITFRAMESDD_SDD00100 (4UL) /*!< SDD pattern 00100 */ +#define NFCT_SENSRES_BITFRAMESDD_SDD01000 (8UL) /*!< SDD pattern 01000 */ +#define NFCT_SENSRES_BITFRAMESDD_SDD10000 (16UL) /*!< SDD pattern 10000 */ + +/* Register: NFCT_SELRES */ +/* Description: NFC-A SEL_RES auto-response settings */ + +/* Bit 7 : Reserved for future use. Shall be 0. */ +#define NFCT_SELRES_RFU7_Pos (7UL) /*!< Position of RFU7 field. */ +#define NFCT_SELRES_RFU7_Msk (0x1UL << NFCT_SELRES_RFU7_Pos) /*!< Bit mask of RFU7 field. */ + +/* Bits 6..5 : Protocol as defined by the b7:b6 of SEL_RES response in the NFC Forum, NFC Digital Protocol Technical Specification */ +#define NFCT_SELRES_PROTOCOL_Pos (5UL) /*!< Position of PROTOCOL field. */ +#define NFCT_SELRES_PROTOCOL_Msk (0x3UL << NFCT_SELRES_PROTOCOL_Pos) /*!< Bit mask of PROTOCOL field. */ + +/* Bits 4..3 : Reserved for future use. Shall be 0. */ +#define NFCT_SELRES_RFU43_Pos (3UL) /*!< Position of RFU43 field. */ +#define NFCT_SELRES_RFU43_Msk (0x3UL << NFCT_SELRES_RFU43_Pos) /*!< Bit mask of RFU43 field. */ + +/* Bit 2 : Cascade as defined by the b3 of SEL_RES response in the NFC Forum, NFC Digital Protocol Technical Specification (controlled by hardware, shall be 0) */ +#define NFCT_SELRES_CASCADE_Pos (2UL) /*!< Position of CASCADE field. */ +#define NFCT_SELRES_CASCADE_Msk (0x1UL << NFCT_SELRES_CASCADE_Pos) /*!< Bit mask of CASCADE field. */ + +/* Bits 1..0 : Reserved for future use. Shall be 0. */ +#define NFCT_SELRES_RFU10_Pos (0UL) /*!< Position of RFU10 field. */ +#define NFCT_SELRES_RFU10_Msk (0x3UL << NFCT_SELRES_RFU10_Pos) /*!< Bit mask of RFU10 field. */ + + +/* Peripheral: NVMC */ +/* Description: Non Volatile Memory Controller */ + +/* Register: NVMC_READY */ +/* Description: Ready flag */ + +/* Bit 0 : NVMC is ready or busy */ +#define NVMC_READY_READY_Pos (0UL) /*!< Position of READY field. */ +#define NVMC_READY_READY_Msk (0x1UL << NVMC_READY_READY_Pos) /*!< Bit mask of READY field. */ +#define NVMC_READY_READY_Busy (0UL) /*!< NVMC is busy (on-going write or erase operation) */ +#define NVMC_READY_READY_Ready (1UL) /*!< NVMC is ready */ + +/* Register: NVMC_READYNEXT */ +/* Description: Ready flag */ + +/* Bit 0 : NVMC can accept a new write operation */ +#define NVMC_READYNEXT_READYNEXT_Pos (0UL) /*!< Position of READYNEXT field. */ +#define NVMC_READYNEXT_READYNEXT_Msk (0x1UL << NVMC_READYNEXT_READYNEXT_Pos) /*!< Bit mask of READYNEXT field. */ +#define NVMC_READYNEXT_READYNEXT_Busy (0UL) /*!< NVMC cannot accept any write operation */ +#define NVMC_READYNEXT_READYNEXT_Ready (1UL) /*!< NVMC is ready */ + +/* Register: NVMC_CONFIG */ +/* Description: Configuration register */ + +/* Bits 1..0 : Program memory access mode. It is strongly recommended to only activate erase and write modes when they are actively used. Enabling write or erase will invalidate the cache and keep it invalidated. */ +#define NVMC_CONFIG_WEN_Pos (0UL) /*!< Position of WEN field. */ +#define NVMC_CONFIG_WEN_Msk (0x3UL << NVMC_CONFIG_WEN_Pos) /*!< Bit mask of WEN field. */ +#define NVMC_CONFIG_WEN_Ren (0UL) /*!< Read only access */ +#define NVMC_CONFIG_WEN_Wen (1UL) /*!< Write enabled */ +#define NVMC_CONFIG_WEN_Een (2UL) /*!< Erase enabled */ + +/* Register: NVMC_ERASEPAGE */ +/* Description: Register for erasing a page in code area */ + +/* Bits 31..0 : Register for starting erase of a page in code area */ +#define NVMC_ERASEPAGE_ERASEPAGE_Pos (0UL) /*!< Position of ERASEPAGE field. */ +#define NVMC_ERASEPAGE_ERASEPAGE_Msk (0xFFFFFFFFUL << NVMC_ERASEPAGE_ERASEPAGE_Pos) /*!< Bit mask of ERASEPAGE field. */ + +/* Register: NVMC_ERASEPCR1 */ +/* Description: Deprecated register - Register for erasing a page in code area. Equivalent to ERASEPAGE. */ + +/* Bits 31..0 : Register for erasing a page in code area. Equivalent to ERASEPAGE. */ +#define NVMC_ERASEPCR1_ERASEPCR1_Pos (0UL) /*!< Position of ERASEPCR1 field. */ +#define NVMC_ERASEPCR1_ERASEPCR1_Msk (0xFFFFFFFFUL << NVMC_ERASEPCR1_ERASEPCR1_Pos) /*!< Bit mask of ERASEPCR1 field. */ + +/* Register: NVMC_ERASEALL */ +/* Description: Register for erasing all non-volatile user memory */ + +/* Bit 0 : Erase all non-volatile memory including UICR registers. Note that the erase must be enabled using CONFIG.WEN before the non-volatile memory can be erased. */ +#define NVMC_ERASEALL_ERASEALL_Pos (0UL) /*!< Position of ERASEALL field. */ +#define NVMC_ERASEALL_ERASEALL_Msk (0x1UL << NVMC_ERASEALL_ERASEALL_Pos) /*!< Bit mask of ERASEALL field. */ +#define NVMC_ERASEALL_ERASEALL_NoOperation (0UL) /*!< No operation */ +#define NVMC_ERASEALL_ERASEALL_Erase (1UL) /*!< Start chip erase */ + +/* Register: NVMC_ERASEPCR0 */ +/* Description: Deprecated register - Register for erasing a page in code area. Equivalent to ERASEPAGE. */ + +/* Bits 31..0 : Register for starting erase of a page in code area. Equivalent to ERASEPAGE. */ +#define NVMC_ERASEPCR0_ERASEPCR0_Pos (0UL) /*!< Position of ERASEPCR0 field. */ +#define NVMC_ERASEPCR0_ERASEPCR0_Msk (0xFFFFFFFFUL << NVMC_ERASEPCR0_ERASEPCR0_Pos) /*!< Bit mask of ERASEPCR0 field. */ + +/* Register: NVMC_ERASEUICR */ +/* Description: Register for erasing user information configuration registers */ + +/* Bit 0 : Register starting erase of all user information configuration registers. Note that the erase must be enabled using CONFIG.WEN before the UICR can be erased. */ +#define NVMC_ERASEUICR_ERASEUICR_Pos (0UL) /*!< Position of ERASEUICR field. */ +#define NVMC_ERASEUICR_ERASEUICR_Msk (0x1UL << NVMC_ERASEUICR_ERASEUICR_Pos) /*!< Bit mask of ERASEUICR field. */ +#define NVMC_ERASEUICR_ERASEUICR_NoOperation (0UL) /*!< No operation */ +#define NVMC_ERASEUICR_ERASEUICR_Erase (1UL) /*!< Start erase of UICR */ + +/* Register: NVMC_ERASEPAGEPARTIAL */ +/* Description: Register for partial erase of a page in code area */ + +/* Bits 31..0 : Register for starting partial erase of a page in code area */ +#define NVMC_ERASEPAGEPARTIAL_ERASEPAGEPARTIAL_Pos (0UL) /*!< Position of ERASEPAGEPARTIAL field. */ +#define NVMC_ERASEPAGEPARTIAL_ERASEPAGEPARTIAL_Msk (0xFFFFFFFFUL << NVMC_ERASEPAGEPARTIAL_ERASEPAGEPARTIAL_Pos) /*!< Bit mask of ERASEPAGEPARTIAL field. */ + +/* Register: NVMC_ERASEPAGEPARTIALCFG */ +/* Description: Register for partial erase configuration */ + +/* Bits 6..0 : Duration of the partial erase in milliseconds */ +#define NVMC_ERASEPAGEPARTIALCFG_DURATION_Pos (0UL) /*!< Position of DURATION field. */ +#define NVMC_ERASEPAGEPARTIALCFG_DURATION_Msk (0x7FUL << NVMC_ERASEPAGEPARTIALCFG_DURATION_Pos) /*!< Bit mask of DURATION field. */ + +/* Register: NVMC_ICACHECNF */ +/* Description: I-code cache configuration register. */ + +/* Bit 8 : Cache profiling enable */ +#define NVMC_ICACHECNF_CACHEPROFEN_Pos (8UL) /*!< Position of CACHEPROFEN field. */ +#define NVMC_ICACHECNF_CACHEPROFEN_Msk (0x1UL << NVMC_ICACHECNF_CACHEPROFEN_Pos) /*!< Bit mask of CACHEPROFEN field. */ +#define NVMC_ICACHECNF_CACHEPROFEN_Disabled (0UL) /*!< Disable cache profiling */ +#define NVMC_ICACHECNF_CACHEPROFEN_Enabled (1UL) /*!< Enable cache profiling */ + +/* Bit 0 : Cache enable */ +#define NVMC_ICACHECNF_CACHEEN_Pos (0UL) /*!< Position of CACHEEN field. */ +#define NVMC_ICACHECNF_CACHEEN_Msk (0x1UL << NVMC_ICACHECNF_CACHEEN_Pos) /*!< Bit mask of CACHEEN field. */ +#define NVMC_ICACHECNF_CACHEEN_Disabled (0UL) /*!< Disable cache. Invalidates all cache entries. */ +#define NVMC_ICACHECNF_CACHEEN_Enabled (1UL) /*!< Enable cache */ + +/* Register: NVMC_IHIT */ +/* Description: I-code cache hit counter. */ + +/* Bits 31..0 : Number of cache hits */ +#define NVMC_IHIT_HITS_Pos (0UL) /*!< Position of HITS field. */ +#define NVMC_IHIT_HITS_Msk (0xFFFFFFFFUL << NVMC_IHIT_HITS_Pos) /*!< Bit mask of HITS field. */ + +/* Register: NVMC_IMISS */ +/* Description: I-code cache miss counter. */ + +/* Bits 31..0 : Number of cache misses */ +#define NVMC_IMISS_MISSES_Pos (0UL) /*!< Position of MISSES field. */ +#define NVMC_IMISS_MISSES_Msk (0xFFFFFFFFUL << NVMC_IMISS_MISSES_Pos) /*!< Bit mask of MISSES field. */ + + +/* Peripheral: GPIO */ +/* Description: GPIO Port 1 */ + +/* Register: GPIO_OUT */ +/* Description: Write GPIO port */ + +/* Bit 31 : Pin 31 */ +#define GPIO_OUT_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_OUT_PIN31_Msk (0x1UL << GPIO_OUT_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_OUT_PIN31_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN31_High (1UL) /*!< Pin driver is high */ + +/* Bit 30 : Pin 30 */ +#define GPIO_OUT_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_OUT_PIN30_Msk (0x1UL << GPIO_OUT_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_OUT_PIN30_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN30_High (1UL) /*!< Pin driver is high */ + +/* Bit 29 : Pin 29 */ +#define GPIO_OUT_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_OUT_PIN29_Msk (0x1UL << GPIO_OUT_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_OUT_PIN29_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN29_High (1UL) /*!< Pin driver is high */ + +/* Bit 28 : Pin 28 */ +#define GPIO_OUT_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_OUT_PIN28_Msk (0x1UL << GPIO_OUT_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_OUT_PIN28_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN28_High (1UL) /*!< Pin driver is high */ + +/* Bit 27 : Pin 27 */ +#define GPIO_OUT_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_OUT_PIN27_Msk (0x1UL << GPIO_OUT_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_OUT_PIN27_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN27_High (1UL) /*!< Pin driver is high */ + +/* Bit 26 : Pin 26 */ +#define GPIO_OUT_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_OUT_PIN26_Msk (0x1UL << GPIO_OUT_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_OUT_PIN26_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN26_High (1UL) /*!< Pin driver is high */ + +/* Bit 25 : Pin 25 */ +#define GPIO_OUT_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_OUT_PIN25_Msk (0x1UL << GPIO_OUT_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_OUT_PIN25_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN25_High (1UL) /*!< Pin driver is high */ + +/* Bit 24 : Pin 24 */ +#define GPIO_OUT_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_OUT_PIN24_Msk (0x1UL << GPIO_OUT_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_OUT_PIN24_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN24_High (1UL) /*!< Pin driver is high */ + +/* Bit 23 : Pin 23 */ +#define GPIO_OUT_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_OUT_PIN23_Msk (0x1UL << GPIO_OUT_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_OUT_PIN23_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN23_High (1UL) /*!< Pin driver is high */ + +/* Bit 22 : Pin 22 */ +#define GPIO_OUT_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_OUT_PIN22_Msk (0x1UL << GPIO_OUT_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_OUT_PIN22_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN22_High (1UL) /*!< Pin driver is high */ + +/* Bit 21 : Pin 21 */ +#define GPIO_OUT_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_OUT_PIN21_Msk (0x1UL << GPIO_OUT_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_OUT_PIN21_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN21_High (1UL) /*!< Pin driver is high */ + +/* Bit 20 : Pin 20 */ +#define GPIO_OUT_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_OUT_PIN20_Msk (0x1UL << GPIO_OUT_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_OUT_PIN20_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN20_High (1UL) /*!< Pin driver is high */ + +/* Bit 19 : Pin 19 */ +#define GPIO_OUT_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_OUT_PIN19_Msk (0x1UL << GPIO_OUT_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_OUT_PIN19_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN19_High (1UL) /*!< Pin driver is high */ + +/* Bit 18 : Pin 18 */ +#define GPIO_OUT_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_OUT_PIN18_Msk (0x1UL << GPIO_OUT_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_OUT_PIN18_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN18_High (1UL) /*!< Pin driver is high */ + +/* Bit 17 : Pin 17 */ +#define GPIO_OUT_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_OUT_PIN17_Msk (0x1UL << GPIO_OUT_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_OUT_PIN17_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN17_High (1UL) /*!< Pin driver is high */ + +/* Bit 16 : Pin 16 */ +#define GPIO_OUT_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_OUT_PIN16_Msk (0x1UL << GPIO_OUT_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_OUT_PIN16_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN16_High (1UL) /*!< Pin driver is high */ + +/* Bit 15 : Pin 15 */ +#define GPIO_OUT_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_OUT_PIN15_Msk (0x1UL << GPIO_OUT_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_OUT_PIN15_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN15_High (1UL) /*!< Pin driver is high */ + +/* Bit 14 : Pin 14 */ +#define GPIO_OUT_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_OUT_PIN14_Msk (0x1UL << GPIO_OUT_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_OUT_PIN14_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN14_High (1UL) /*!< Pin driver is high */ + +/* Bit 13 : Pin 13 */ +#define GPIO_OUT_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_OUT_PIN13_Msk (0x1UL << GPIO_OUT_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_OUT_PIN13_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN13_High (1UL) /*!< Pin driver is high */ + +/* Bit 12 : Pin 12 */ +#define GPIO_OUT_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_OUT_PIN12_Msk (0x1UL << GPIO_OUT_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_OUT_PIN12_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN12_High (1UL) /*!< Pin driver is high */ + +/* Bit 11 : Pin 11 */ +#define GPIO_OUT_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_OUT_PIN11_Msk (0x1UL << GPIO_OUT_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_OUT_PIN11_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN11_High (1UL) /*!< Pin driver is high */ + +/* Bit 10 : Pin 10 */ +#define GPIO_OUT_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_OUT_PIN10_Msk (0x1UL << GPIO_OUT_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_OUT_PIN10_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN10_High (1UL) /*!< Pin driver is high */ + +/* Bit 9 : Pin 9 */ +#define GPIO_OUT_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_OUT_PIN9_Msk (0x1UL << GPIO_OUT_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_OUT_PIN9_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN9_High (1UL) /*!< Pin driver is high */ + +/* Bit 8 : Pin 8 */ +#define GPIO_OUT_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_OUT_PIN8_Msk (0x1UL << GPIO_OUT_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_OUT_PIN8_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN8_High (1UL) /*!< Pin driver is high */ + +/* Bit 7 : Pin 7 */ +#define GPIO_OUT_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_OUT_PIN7_Msk (0x1UL << GPIO_OUT_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_OUT_PIN7_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN7_High (1UL) /*!< Pin driver is high */ + +/* Bit 6 : Pin 6 */ +#define GPIO_OUT_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_OUT_PIN6_Msk (0x1UL << GPIO_OUT_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_OUT_PIN6_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN6_High (1UL) /*!< Pin driver is high */ + +/* Bit 5 : Pin 5 */ +#define GPIO_OUT_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_OUT_PIN5_Msk (0x1UL << GPIO_OUT_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_OUT_PIN5_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN5_High (1UL) /*!< Pin driver is high */ + +/* Bit 4 : Pin 4 */ +#define GPIO_OUT_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_OUT_PIN4_Msk (0x1UL << GPIO_OUT_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_OUT_PIN4_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN4_High (1UL) /*!< Pin driver is high */ + +/* Bit 3 : Pin 3 */ +#define GPIO_OUT_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_OUT_PIN3_Msk (0x1UL << GPIO_OUT_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_OUT_PIN3_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN3_High (1UL) /*!< Pin driver is high */ + +/* Bit 2 : Pin 2 */ +#define GPIO_OUT_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_OUT_PIN2_Msk (0x1UL << GPIO_OUT_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_OUT_PIN2_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN2_High (1UL) /*!< Pin driver is high */ + +/* Bit 1 : Pin 1 */ +#define GPIO_OUT_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_OUT_PIN1_Msk (0x1UL << GPIO_OUT_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_OUT_PIN1_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN1_High (1UL) /*!< Pin driver is high */ + +/* Bit 0 : Pin 0 */ +#define GPIO_OUT_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_OUT_PIN0_Msk (0x1UL << GPIO_OUT_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_OUT_PIN0_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN0_High (1UL) /*!< Pin driver is high */ + +/* Register: GPIO_OUTSET */ +/* Description: Set individual bits in GPIO port */ + +/* Bit 31 : Pin 31 */ +#define GPIO_OUTSET_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_OUTSET_PIN31_Msk (0x1UL << GPIO_OUTSET_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_OUTSET_PIN31_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN31_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN31_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 30 : Pin 30 */ +#define GPIO_OUTSET_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_OUTSET_PIN30_Msk (0x1UL << GPIO_OUTSET_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_OUTSET_PIN30_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN30_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN30_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 29 : Pin 29 */ +#define GPIO_OUTSET_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_OUTSET_PIN29_Msk (0x1UL << GPIO_OUTSET_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_OUTSET_PIN29_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN29_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN29_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 28 : Pin 28 */ +#define GPIO_OUTSET_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_OUTSET_PIN28_Msk (0x1UL << GPIO_OUTSET_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_OUTSET_PIN28_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN28_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN28_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 27 : Pin 27 */ +#define GPIO_OUTSET_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_OUTSET_PIN27_Msk (0x1UL << GPIO_OUTSET_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_OUTSET_PIN27_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN27_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN27_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 26 : Pin 26 */ +#define GPIO_OUTSET_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_OUTSET_PIN26_Msk (0x1UL << GPIO_OUTSET_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_OUTSET_PIN26_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN26_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN26_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 25 : Pin 25 */ +#define GPIO_OUTSET_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_OUTSET_PIN25_Msk (0x1UL << GPIO_OUTSET_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_OUTSET_PIN25_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN25_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN25_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 24 : Pin 24 */ +#define GPIO_OUTSET_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_OUTSET_PIN24_Msk (0x1UL << GPIO_OUTSET_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_OUTSET_PIN24_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN24_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN24_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 23 : Pin 23 */ +#define GPIO_OUTSET_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_OUTSET_PIN23_Msk (0x1UL << GPIO_OUTSET_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_OUTSET_PIN23_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN23_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN23_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 22 : Pin 22 */ +#define GPIO_OUTSET_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_OUTSET_PIN22_Msk (0x1UL << GPIO_OUTSET_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_OUTSET_PIN22_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN22_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN22_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 21 : Pin 21 */ +#define GPIO_OUTSET_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_OUTSET_PIN21_Msk (0x1UL << GPIO_OUTSET_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_OUTSET_PIN21_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN21_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN21_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 20 : Pin 20 */ +#define GPIO_OUTSET_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_OUTSET_PIN20_Msk (0x1UL << GPIO_OUTSET_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_OUTSET_PIN20_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN20_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN20_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 19 : Pin 19 */ +#define GPIO_OUTSET_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_OUTSET_PIN19_Msk (0x1UL << GPIO_OUTSET_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_OUTSET_PIN19_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN19_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN19_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 18 : Pin 18 */ +#define GPIO_OUTSET_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_OUTSET_PIN18_Msk (0x1UL << GPIO_OUTSET_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_OUTSET_PIN18_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN18_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN18_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 17 : Pin 17 */ +#define GPIO_OUTSET_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_OUTSET_PIN17_Msk (0x1UL << GPIO_OUTSET_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_OUTSET_PIN17_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN17_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN17_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 16 : Pin 16 */ +#define GPIO_OUTSET_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_OUTSET_PIN16_Msk (0x1UL << GPIO_OUTSET_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_OUTSET_PIN16_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN16_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN16_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 15 : Pin 15 */ +#define GPIO_OUTSET_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_OUTSET_PIN15_Msk (0x1UL << GPIO_OUTSET_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_OUTSET_PIN15_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN15_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN15_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 14 : Pin 14 */ +#define GPIO_OUTSET_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_OUTSET_PIN14_Msk (0x1UL << GPIO_OUTSET_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_OUTSET_PIN14_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN14_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN14_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 13 : Pin 13 */ +#define GPIO_OUTSET_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_OUTSET_PIN13_Msk (0x1UL << GPIO_OUTSET_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_OUTSET_PIN13_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN13_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN13_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 12 : Pin 12 */ +#define GPIO_OUTSET_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_OUTSET_PIN12_Msk (0x1UL << GPIO_OUTSET_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_OUTSET_PIN12_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN12_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN12_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 11 : Pin 11 */ +#define GPIO_OUTSET_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_OUTSET_PIN11_Msk (0x1UL << GPIO_OUTSET_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_OUTSET_PIN11_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN11_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN11_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 10 : Pin 10 */ +#define GPIO_OUTSET_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_OUTSET_PIN10_Msk (0x1UL << GPIO_OUTSET_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_OUTSET_PIN10_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN10_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN10_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 9 : Pin 9 */ +#define GPIO_OUTSET_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_OUTSET_PIN9_Msk (0x1UL << GPIO_OUTSET_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_OUTSET_PIN9_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN9_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN9_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 8 : Pin 8 */ +#define GPIO_OUTSET_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_OUTSET_PIN8_Msk (0x1UL << GPIO_OUTSET_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_OUTSET_PIN8_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN8_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN8_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 7 : Pin 7 */ +#define GPIO_OUTSET_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_OUTSET_PIN7_Msk (0x1UL << GPIO_OUTSET_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_OUTSET_PIN7_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN7_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN7_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 6 : Pin 6 */ +#define GPIO_OUTSET_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_OUTSET_PIN6_Msk (0x1UL << GPIO_OUTSET_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_OUTSET_PIN6_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN6_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN6_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 5 : Pin 5 */ +#define GPIO_OUTSET_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_OUTSET_PIN5_Msk (0x1UL << GPIO_OUTSET_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_OUTSET_PIN5_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN5_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN5_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 4 : Pin 4 */ +#define GPIO_OUTSET_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_OUTSET_PIN4_Msk (0x1UL << GPIO_OUTSET_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_OUTSET_PIN4_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN4_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN4_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 3 : Pin 3 */ +#define GPIO_OUTSET_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_OUTSET_PIN3_Msk (0x1UL << GPIO_OUTSET_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_OUTSET_PIN3_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN3_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN3_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 2 : Pin 2 */ +#define GPIO_OUTSET_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_OUTSET_PIN2_Msk (0x1UL << GPIO_OUTSET_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_OUTSET_PIN2_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN2_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN2_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 1 : Pin 1 */ +#define GPIO_OUTSET_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_OUTSET_PIN1_Msk (0x1UL << GPIO_OUTSET_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_OUTSET_PIN1_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN1_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN1_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 0 : Pin 0 */ +#define GPIO_OUTSET_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_OUTSET_PIN0_Msk (0x1UL << GPIO_OUTSET_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_OUTSET_PIN0_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN0_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN0_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Register: GPIO_OUTCLR */ +/* Description: Clear individual bits in GPIO port */ + +/* Bit 31 : Pin 31 */ +#define GPIO_OUTCLR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_OUTCLR_PIN31_Msk (0x1UL << GPIO_OUTCLR_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_OUTCLR_PIN31_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN31_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN31_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 30 : Pin 30 */ +#define GPIO_OUTCLR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_OUTCLR_PIN30_Msk (0x1UL << GPIO_OUTCLR_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_OUTCLR_PIN30_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN30_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN30_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 29 : Pin 29 */ +#define GPIO_OUTCLR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_OUTCLR_PIN29_Msk (0x1UL << GPIO_OUTCLR_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_OUTCLR_PIN29_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN29_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN29_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 28 : Pin 28 */ +#define GPIO_OUTCLR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_OUTCLR_PIN28_Msk (0x1UL << GPIO_OUTCLR_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_OUTCLR_PIN28_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN28_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN28_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 27 : Pin 27 */ +#define GPIO_OUTCLR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_OUTCLR_PIN27_Msk (0x1UL << GPIO_OUTCLR_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_OUTCLR_PIN27_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN27_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN27_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 26 : Pin 26 */ +#define GPIO_OUTCLR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_OUTCLR_PIN26_Msk (0x1UL << GPIO_OUTCLR_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_OUTCLR_PIN26_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN26_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN26_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 25 : Pin 25 */ +#define GPIO_OUTCLR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_OUTCLR_PIN25_Msk (0x1UL << GPIO_OUTCLR_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_OUTCLR_PIN25_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN25_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN25_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 24 : Pin 24 */ +#define GPIO_OUTCLR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_OUTCLR_PIN24_Msk (0x1UL << GPIO_OUTCLR_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_OUTCLR_PIN24_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN24_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN24_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 23 : Pin 23 */ +#define GPIO_OUTCLR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_OUTCLR_PIN23_Msk (0x1UL << GPIO_OUTCLR_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_OUTCLR_PIN23_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN23_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN23_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 22 : Pin 22 */ +#define GPIO_OUTCLR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_OUTCLR_PIN22_Msk (0x1UL << GPIO_OUTCLR_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_OUTCLR_PIN22_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN22_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN22_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 21 : Pin 21 */ +#define GPIO_OUTCLR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_OUTCLR_PIN21_Msk (0x1UL << GPIO_OUTCLR_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_OUTCLR_PIN21_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN21_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN21_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 20 : Pin 20 */ +#define GPIO_OUTCLR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_OUTCLR_PIN20_Msk (0x1UL << GPIO_OUTCLR_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_OUTCLR_PIN20_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN20_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN20_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 19 : Pin 19 */ +#define GPIO_OUTCLR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_OUTCLR_PIN19_Msk (0x1UL << GPIO_OUTCLR_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_OUTCLR_PIN19_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN19_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN19_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 18 : Pin 18 */ +#define GPIO_OUTCLR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_OUTCLR_PIN18_Msk (0x1UL << GPIO_OUTCLR_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_OUTCLR_PIN18_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN18_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN18_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 17 : Pin 17 */ +#define GPIO_OUTCLR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_OUTCLR_PIN17_Msk (0x1UL << GPIO_OUTCLR_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_OUTCLR_PIN17_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN17_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN17_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 16 : Pin 16 */ +#define GPIO_OUTCLR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_OUTCLR_PIN16_Msk (0x1UL << GPIO_OUTCLR_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_OUTCLR_PIN16_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN16_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN16_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 15 : Pin 15 */ +#define GPIO_OUTCLR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_OUTCLR_PIN15_Msk (0x1UL << GPIO_OUTCLR_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_OUTCLR_PIN15_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN15_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN15_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 14 : Pin 14 */ +#define GPIO_OUTCLR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_OUTCLR_PIN14_Msk (0x1UL << GPIO_OUTCLR_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_OUTCLR_PIN14_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN14_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN14_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 13 : Pin 13 */ +#define GPIO_OUTCLR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_OUTCLR_PIN13_Msk (0x1UL << GPIO_OUTCLR_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_OUTCLR_PIN13_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN13_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN13_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 12 : Pin 12 */ +#define GPIO_OUTCLR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_OUTCLR_PIN12_Msk (0x1UL << GPIO_OUTCLR_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_OUTCLR_PIN12_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN12_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN12_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 11 : Pin 11 */ +#define GPIO_OUTCLR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_OUTCLR_PIN11_Msk (0x1UL << GPIO_OUTCLR_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_OUTCLR_PIN11_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN11_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN11_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 10 : Pin 10 */ +#define GPIO_OUTCLR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_OUTCLR_PIN10_Msk (0x1UL << GPIO_OUTCLR_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_OUTCLR_PIN10_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN10_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN10_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 9 : Pin 9 */ +#define GPIO_OUTCLR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_OUTCLR_PIN9_Msk (0x1UL << GPIO_OUTCLR_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_OUTCLR_PIN9_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN9_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN9_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 8 : Pin 8 */ +#define GPIO_OUTCLR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_OUTCLR_PIN8_Msk (0x1UL << GPIO_OUTCLR_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_OUTCLR_PIN8_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN8_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN8_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 7 : Pin 7 */ +#define GPIO_OUTCLR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_OUTCLR_PIN7_Msk (0x1UL << GPIO_OUTCLR_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_OUTCLR_PIN7_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN7_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN7_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 6 : Pin 6 */ +#define GPIO_OUTCLR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_OUTCLR_PIN6_Msk (0x1UL << GPIO_OUTCLR_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_OUTCLR_PIN6_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN6_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN6_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 5 : Pin 5 */ +#define GPIO_OUTCLR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_OUTCLR_PIN5_Msk (0x1UL << GPIO_OUTCLR_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_OUTCLR_PIN5_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN5_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN5_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 4 : Pin 4 */ +#define GPIO_OUTCLR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_OUTCLR_PIN4_Msk (0x1UL << GPIO_OUTCLR_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_OUTCLR_PIN4_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN4_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN4_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 3 : Pin 3 */ +#define GPIO_OUTCLR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_OUTCLR_PIN3_Msk (0x1UL << GPIO_OUTCLR_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_OUTCLR_PIN3_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN3_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN3_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 2 : Pin 2 */ +#define GPIO_OUTCLR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_OUTCLR_PIN2_Msk (0x1UL << GPIO_OUTCLR_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_OUTCLR_PIN2_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN2_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN2_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 1 : Pin 1 */ +#define GPIO_OUTCLR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_OUTCLR_PIN1_Msk (0x1UL << GPIO_OUTCLR_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_OUTCLR_PIN1_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN1_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN1_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 0 : Pin 0 */ +#define GPIO_OUTCLR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_OUTCLR_PIN0_Msk (0x1UL << GPIO_OUTCLR_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_OUTCLR_PIN0_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN0_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN0_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Register: GPIO_IN */ +/* Description: Read GPIO port */ + +/* Bit 31 : Pin 31 */ +#define GPIO_IN_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_IN_PIN31_Msk (0x1UL << GPIO_IN_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_IN_PIN31_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN31_High (1UL) /*!< Pin input is high */ + +/* Bit 30 : Pin 30 */ +#define GPIO_IN_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_IN_PIN30_Msk (0x1UL << GPIO_IN_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_IN_PIN30_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN30_High (1UL) /*!< Pin input is high */ + +/* Bit 29 : Pin 29 */ +#define GPIO_IN_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_IN_PIN29_Msk (0x1UL << GPIO_IN_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_IN_PIN29_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN29_High (1UL) /*!< Pin input is high */ + +/* Bit 28 : Pin 28 */ +#define GPIO_IN_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_IN_PIN28_Msk (0x1UL << GPIO_IN_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_IN_PIN28_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN28_High (1UL) /*!< Pin input is high */ + +/* Bit 27 : Pin 27 */ +#define GPIO_IN_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_IN_PIN27_Msk (0x1UL << GPIO_IN_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_IN_PIN27_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN27_High (1UL) /*!< Pin input is high */ + +/* Bit 26 : Pin 26 */ +#define GPIO_IN_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_IN_PIN26_Msk (0x1UL << GPIO_IN_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_IN_PIN26_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN26_High (1UL) /*!< Pin input is high */ + +/* Bit 25 : Pin 25 */ +#define GPIO_IN_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_IN_PIN25_Msk (0x1UL << GPIO_IN_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_IN_PIN25_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN25_High (1UL) /*!< Pin input is high */ + +/* Bit 24 : Pin 24 */ +#define GPIO_IN_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_IN_PIN24_Msk (0x1UL << GPIO_IN_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_IN_PIN24_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN24_High (1UL) /*!< Pin input is high */ + +/* Bit 23 : Pin 23 */ +#define GPIO_IN_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_IN_PIN23_Msk (0x1UL << GPIO_IN_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_IN_PIN23_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN23_High (1UL) /*!< Pin input is high */ + +/* Bit 22 : Pin 22 */ +#define GPIO_IN_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_IN_PIN22_Msk (0x1UL << GPIO_IN_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_IN_PIN22_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN22_High (1UL) /*!< Pin input is high */ + +/* Bit 21 : Pin 21 */ +#define GPIO_IN_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_IN_PIN21_Msk (0x1UL << GPIO_IN_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_IN_PIN21_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN21_High (1UL) /*!< Pin input is high */ + +/* Bit 20 : Pin 20 */ +#define GPIO_IN_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_IN_PIN20_Msk (0x1UL << GPIO_IN_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_IN_PIN20_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN20_High (1UL) /*!< Pin input is high */ + +/* Bit 19 : Pin 19 */ +#define GPIO_IN_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_IN_PIN19_Msk (0x1UL << GPIO_IN_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_IN_PIN19_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN19_High (1UL) /*!< Pin input is high */ + +/* Bit 18 : Pin 18 */ +#define GPIO_IN_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_IN_PIN18_Msk (0x1UL << GPIO_IN_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_IN_PIN18_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN18_High (1UL) /*!< Pin input is high */ + +/* Bit 17 : Pin 17 */ +#define GPIO_IN_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_IN_PIN17_Msk (0x1UL << GPIO_IN_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_IN_PIN17_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN17_High (1UL) /*!< Pin input is high */ + +/* Bit 16 : Pin 16 */ +#define GPIO_IN_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_IN_PIN16_Msk (0x1UL << GPIO_IN_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_IN_PIN16_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN16_High (1UL) /*!< Pin input is high */ + +/* Bit 15 : Pin 15 */ +#define GPIO_IN_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_IN_PIN15_Msk (0x1UL << GPIO_IN_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_IN_PIN15_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN15_High (1UL) /*!< Pin input is high */ + +/* Bit 14 : Pin 14 */ +#define GPIO_IN_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_IN_PIN14_Msk (0x1UL << GPIO_IN_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_IN_PIN14_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN14_High (1UL) /*!< Pin input is high */ + +/* Bit 13 : Pin 13 */ +#define GPIO_IN_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_IN_PIN13_Msk (0x1UL << GPIO_IN_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_IN_PIN13_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN13_High (1UL) /*!< Pin input is high */ + +/* Bit 12 : Pin 12 */ +#define GPIO_IN_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_IN_PIN12_Msk (0x1UL << GPIO_IN_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_IN_PIN12_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN12_High (1UL) /*!< Pin input is high */ + +/* Bit 11 : Pin 11 */ +#define GPIO_IN_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_IN_PIN11_Msk (0x1UL << GPIO_IN_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_IN_PIN11_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN11_High (1UL) /*!< Pin input is high */ + +/* Bit 10 : Pin 10 */ +#define GPIO_IN_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_IN_PIN10_Msk (0x1UL << GPIO_IN_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_IN_PIN10_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN10_High (1UL) /*!< Pin input is high */ + +/* Bit 9 : Pin 9 */ +#define GPIO_IN_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_IN_PIN9_Msk (0x1UL << GPIO_IN_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_IN_PIN9_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN9_High (1UL) /*!< Pin input is high */ + +/* Bit 8 : Pin 8 */ +#define GPIO_IN_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_IN_PIN8_Msk (0x1UL << GPIO_IN_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_IN_PIN8_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN8_High (1UL) /*!< Pin input is high */ + +/* Bit 7 : Pin 7 */ +#define GPIO_IN_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_IN_PIN7_Msk (0x1UL << GPIO_IN_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_IN_PIN7_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN7_High (1UL) /*!< Pin input is high */ + +/* Bit 6 : Pin 6 */ +#define GPIO_IN_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_IN_PIN6_Msk (0x1UL << GPIO_IN_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_IN_PIN6_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN6_High (1UL) /*!< Pin input is high */ + +/* Bit 5 : Pin 5 */ +#define GPIO_IN_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_IN_PIN5_Msk (0x1UL << GPIO_IN_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_IN_PIN5_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN5_High (1UL) /*!< Pin input is high */ + +/* Bit 4 : Pin 4 */ +#define GPIO_IN_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_IN_PIN4_Msk (0x1UL << GPIO_IN_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_IN_PIN4_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN4_High (1UL) /*!< Pin input is high */ + +/* Bit 3 : Pin 3 */ +#define GPIO_IN_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_IN_PIN3_Msk (0x1UL << GPIO_IN_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_IN_PIN3_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN3_High (1UL) /*!< Pin input is high */ + +/* Bit 2 : Pin 2 */ +#define GPIO_IN_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_IN_PIN2_Msk (0x1UL << GPIO_IN_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_IN_PIN2_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN2_High (1UL) /*!< Pin input is high */ + +/* Bit 1 : Pin 1 */ +#define GPIO_IN_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_IN_PIN1_Msk (0x1UL << GPIO_IN_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_IN_PIN1_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN1_High (1UL) /*!< Pin input is high */ + +/* Bit 0 : Pin 0 */ +#define GPIO_IN_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_IN_PIN0_Msk (0x1UL << GPIO_IN_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_IN_PIN0_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN0_High (1UL) /*!< Pin input is high */ + +/* Register: GPIO_DIR */ +/* Description: Direction of GPIO pins */ + +/* Bit 31 : Pin 31 */ +#define GPIO_DIR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_DIR_PIN31_Msk (0x1UL << GPIO_DIR_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_DIR_PIN31_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN31_Output (1UL) /*!< Pin set as output */ + +/* Bit 30 : Pin 30 */ +#define GPIO_DIR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_DIR_PIN30_Msk (0x1UL << GPIO_DIR_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_DIR_PIN30_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN30_Output (1UL) /*!< Pin set as output */ + +/* Bit 29 : Pin 29 */ +#define GPIO_DIR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_DIR_PIN29_Msk (0x1UL << GPIO_DIR_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_DIR_PIN29_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN29_Output (1UL) /*!< Pin set as output */ + +/* Bit 28 : Pin 28 */ +#define GPIO_DIR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_DIR_PIN28_Msk (0x1UL << GPIO_DIR_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_DIR_PIN28_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN28_Output (1UL) /*!< Pin set as output */ + +/* Bit 27 : Pin 27 */ +#define GPIO_DIR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_DIR_PIN27_Msk (0x1UL << GPIO_DIR_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_DIR_PIN27_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN27_Output (1UL) /*!< Pin set as output */ + +/* Bit 26 : Pin 26 */ +#define GPIO_DIR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_DIR_PIN26_Msk (0x1UL << GPIO_DIR_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_DIR_PIN26_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN26_Output (1UL) /*!< Pin set as output */ + +/* Bit 25 : Pin 25 */ +#define GPIO_DIR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_DIR_PIN25_Msk (0x1UL << GPIO_DIR_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_DIR_PIN25_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN25_Output (1UL) /*!< Pin set as output */ + +/* Bit 24 : Pin 24 */ +#define GPIO_DIR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_DIR_PIN24_Msk (0x1UL << GPIO_DIR_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_DIR_PIN24_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN24_Output (1UL) /*!< Pin set as output */ + +/* Bit 23 : Pin 23 */ +#define GPIO_DIR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_DIR_PIN23_Msk (0x1UL << GPIO_DIR_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_DIR_PIN23_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN23_Output (1UL) /*!< Pin set as output */ + +/* Bit 22 : Pin 22 */ +#define GPIO_DIR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_DIR_PIN22_Msk (0x1UL << GPIO_DIR_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_DIR_PIN22_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN22_Output (1UL) /*!< Pin set as output */ + +/* Bit 21 : Pin 21 */ +#define GPIO_DIR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_DIR_PIN21_Msk (0x1UL << GPIO_DIR_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_DIR_PIN21_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN21_Output (1UL) /*!< Pin set as output */ + +/* Bit 20 : Pin 20 */ +#define GPIO_DIR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_DIR_PIN20_Msk (0x1UL << GPIO_DIR_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_DIR_PIN20_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN20_Output (1UL) /*!< Pin set as output */ + +/* Bit 19 : Pin 19 */ +#define GPIO_DIR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_DIR_PIN19_Msk (0x1UL << GPIO_DIR_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_DIR_PIN19_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN19_Output (1UL) /*!< Pin set as output */ + +/* Bit 18 : Pin 18 */ +#define GPIO_DIR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_DIR_PIN18_Msk (0x1UL << GPIO_DIR_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_DIR_PIN18_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN18_Output (1UL) /*!< Pin set as output */ + +/* Bit 17 : Pin 17 */ +#define GPIO_DIR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_DIR_PIN17_Msk (0x1UL << GPIO_DIR_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_DIR_PIN17_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN17_Output (1UL) /*!< Pin set as output */ + +/* Bit 16 : Pin 16 */ +#define GPIO_DIR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_DIR_PIN16_Msk (0x1UL << GPIO_DIR_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_DIR_PIN16_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN16_Output (1UL) /*!< Pin set as output */ + +/* Bit 15 : Pin 15 */ +#define GPIO_DIR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_DIR_PIN15_Msk (0x1UL << GPIO_DIR_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_DIR_PIN15_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN15_Output (1UL) /*!< Pin set as output */ + +/* Bit 14 : Pin 14 */ +#define GPIO_DIR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_DIR_PIN14_Msk (0x1UL << GPIO_DIR_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_DIR_PIN14_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN14_Output (1UL) /*!< Pin set as output */ + +/* Bit 13 : Pin 13 */ +#define GPIO_DIR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_DIR_PIN13_Msk (0x1UL << GPIO_DIR_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_DIR_PIN13_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN13_Output (1UL) /*!< Pin set as output */ + +/* Bit 12 : Pin 12 */ +#define GPIO_DIR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_DIR_PIN12_Msk (0x1UL << GPIO_DIR_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_DIR_PIN12_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN12_Output (1UL) /*!< Pin set as output */ + +/* Bit 11 : Pin 11 */ +#define GPIO_DIR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_DIR_PIN11_Msk (0x1UL << GPIO_DIR_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_DIR_PIN11_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN11_Output (1UL) /*!< Pin set as output */ + +/* Bit 10 : Pin 10 */ +#define GPIO_DIR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_DIR_PIN10_Msk (0x1UL << GPIO_DIR_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_DIR_PIN10_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN10_Output (1UL) /*!< Pin set as output */ + +/* Bit 9 : Pin 9 */ +#define GPIO_DIR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_DIR_PIN9_Msk (0x1UL << GPIO_DIR_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_DIR_PIN9_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN9_Output (1UL) /*!< Pin set as output */ + +/* Bit 8 : Pin 8 */ +#define GPIO_DIR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_DIR_PIN8_Msk (0x1UL << GPIO_DIR_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_DIR_PIN8_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN8_Output (1UL) /*!< Pin set as output */ + +/* Bit 7 : Pin 7 */ +#define GPIO_DIR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_DIR_PIN7_Msk (0x1UL << GPIO_DIR_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_DIR_PIN7_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN7_Output (1UL) /*!< Pin set as output */ + +/* Bit 6 : Pin 6 */ +#define GPIO_DIR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_DIR_PIN6_Msk (0x1UL << GPIO_DIR_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_DIR_PIN6_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN6_Output (1UL) /*!< Pin set as output */ + +/* Bit 5 : Pin 5 */ +#define GPIO_DIR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_DIR_PIN5_Msk (0x1UL << GPIO_DIR_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_DIR_PIN5_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN5_Output (1UL) /*!< Pin set as output */ + +/* Bit 4 : Pin 4 */ +#define GPIO_DIR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_DIR_PIN4_Msk (0x1UL << GPIO_DIR_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_DIR_PIN4_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN4_Output (1UL) /*!< Pin set as output */ + +/* Bit 3 : Pin 3 */ +#define GPIO_DIR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_DIR_PIN3_Msk (0x1UL << GPIO_DIR_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_DIR_PIN3_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN3_Output (1UL) /*!< Pin set as output */ + +/* Bit 2 : Pin 2 */ +#define GPIO_DIR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_DIR_PIN2_Msk (0x1UL << GPIO_DIR_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_DIR_PIN2_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN2_Output (1UL) /*!< Pin set as output */ + +/* Bit 1 : Pin 1 */ +#define GPIO_DIR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_DIR_PIN1_Msk (0x1UL << GPIO_DIR_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_DIR_PIN1_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN1_Output (1UL) /*!< Pin set as output */ + +/* Bit 0 : Pin 0 */ +#define GPIO_DIR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_DIR_PIN0_Msk (0x1UL << GPIO_DIR_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_DIR_PIN0_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN0_Output (1UL) /*!< Pin set as output */ + +/* Register: GPIO_DIRSET */ +/* Description: DIR set register */ + +/* Bit 31 : Set as output pin 31 */ +#define GPIO_DIRSET_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_DIRSET_PIN31_Msk (0x1UL << GPIO_DIRSET_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_DIRSET_PIN31_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN31_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN31_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 30 : Set as output pin 30 */ +#define GPIO_DIRSET_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_DIRSET_PIN30_Msk (0x1UL << GPIO_DIRSET_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_DIRSET_PIN30_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN30_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN30_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 29 : Set as output pin 29 */ +#define GPIO_DIRSET_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_DIRSET_PIN29_Msk (0x1UL << GPIO_DIRSET_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_DIRSET_PIN29_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN29_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN29_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 28 : Set as output pin 28 */ +#define GPIO_DIRSET_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_DIRSET_PIN28_Msk (0x1UL << GPIO_DIRSET_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_DIRSET_PIN28_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN28_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN28_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 27 : Set as output pin 27 */ +#define GPIO_DIRSET_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_DIRSET_PIN27_Msk (0x1UL << GPIO_DIRSET_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_DIRSET_PIN27_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN27_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN27_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 26 : Set as output pin 26 */ +#define GPIO_DIRSET_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_DIRSET_PIN26_Msk (0x1UL << GPIO_DIRSET_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_DIRSET_PIN26_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN26_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN26_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 25 : Set as output pin 25 */ +#define GPIO_DIRSET_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_DIRSET_PIN25_Msk (0x1UL << GPIO_DIRSET_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_DIRSET_PIN25_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN25_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN25_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 24 : Set as output pin 24 */ +#define GPIO_DIRSET_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_DIRSET_PIN24_Msk (0x1UL << GPIO_DIRSET_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_DIRSET_PIN24_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN24_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN24_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 23 : Set as output pin 23 */ +#define GPIO_DIRSET_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_DIRSET_PIN23_Msk (0x1UL << GPIO_DIRSET_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_DIRSET_PIN23_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN23_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN23_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 22 : Set as output pin 22 */ +#define GPIO_DIRSET_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_DIRSET_PIN22_Msk (0x1UL << GPIO_DIRSET_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_DIRSET_PIN22_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN22_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN22_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 21 : Set as output pin 21 */ +#define GPIO_DIRSET_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_DIRSET_PIN21_Msk (0x1UL << GPIO_DIRSET_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_DIRSET_PIN21_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN21_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN21_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 20 : Set as output pin 20 */ +#define GPIO_DIRSET_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_DIRSET_PIN20_Msk (0x1UL << GPIO_DIRSET_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_DIRSET_PIN20_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN20_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN20_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 19 : Set as output pin 19 */ +#define GPIO_DIRSET_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_DIRSET_PIN19_Msk (0x1UL << GPIO_DIRSET_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_DIRSET_PIN19_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN19_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN19_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 18 : Set as output pin 18 */ +#define GPIO_DIRSET_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_DIRSET_PIN18_Msk (0x1UL << GPIO_DIRSET_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_DIRSET_PIN18_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN18_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN18_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 17 : Set as output pin 17 */ +#define GPIO_DIRSET_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_DIRSET_PIN17_Msk (0x1UL << GPIO_DIRSET_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_DIRSET_PIN17_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN17_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN17_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 16 : Set as output pin 16 */ +#define GPIO_DIRSET_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_DIRSET_PIN16_Msk (0x1UL << GPIO_DIRSET_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_DIRSET_PIN16_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN16_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN16_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 15 : Set as output pin 15 */ +#define GPIO_DIRSET_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_DIRSET_PIN15_Msk (0x1UL << GPIO_DIRSET_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_DIRSET_PIN15_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN15_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN15_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 14 : Set as output pin 14 */ +#define GPIO_DIRSET_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_DIRSET_PIN14_Msk (0x1UL << GPIO_DIRSET_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_DIRSET_PIN14_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN14_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN14_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 13 : Set as output pin 13 */ +#define GPIO_DIRSET_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_DIRSET_PIN13_Msk (0x1UL << GPIO_DIRSET_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_DIRSET_PIN13_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN13_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN13_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 12 : Set as output pin 12 */ +#define GPIO_DIRSET_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_DIRSET_PIN12_Msk (0x1UL << GPIO_DIRSET_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_DIRSET_PIN12_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN12_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN12_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 11 : Set as output pin 11 */ +#define GPIO_DIRSET_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_DIRSET_PIN11_Msk (0x1UL << GPIO_DIRSET_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_DIRSET_PIN11_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN11_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN11_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 10 : Set as output pin 10 */ +#define GPIO_DIRSET_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_DIRSET_PIN10_Msk (0x1UL << GPIO_DIRSET_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_DIRSET_PIN10_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN10_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN10_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 9 : Set as output pin 9 */ +#define GPIO_DIRSET_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_DIRSET_PIN9_Msk (0x1UL << GPIO_DIRSET_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_DIRSET_PIN9_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN9_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN9_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 8 : Set as output pin 8 */ +#define GPIO_DIRSET_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_DIRSET_PIN8_Msk (0x1UL << GPIO_DIRSET_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_DIRSET_PIN8_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN8_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN8_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 7 : Set as output pin 7 */ +#define GPIO_DIRSET_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_DIRSET_PIN7_Msk (0x1UL << GPIO_DIRSET_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_DIRSET_PIN7_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN7_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN7_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 6 : Set as output pin 6 */ +#define GPIO_DIRSET_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_DIRSET_PIN6_Msk (0x1UL << GPIO_DIRSET_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_DIRSET_PIN6_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN6_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN6_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 5 : Set as output pin 5 */ +#define GPIO_DIRSET_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_DIRSET_PIN5_Msk (0x1UL << GPIO_DIRSET_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_DIRSET_PIN5_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN5_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN5_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 4 : Set as output pin 4 */ +#define GPIO_DIRSET_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_DIRSET_PIN4_Msk (0x1UL << GPIO_DIRSET_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_DIRSET_PIN4_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN4_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN4_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 3 : Set as output pin 3 */ +#define GPIO_DIRSET_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_DIRSET_PIN3_Msk (0x1UL << GPIO_DIRSET_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_DIRSET_PIN3_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN3_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN3_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 2 : Set as output pin 2 */ +#define GPIO_DIRSET_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_DIRSET_PIN2_Msk (0x1UL << GPIO_DIRSET_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_DIRSET_PIN2_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN2_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN2_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 1 : Set as output pin 1 */ +#define GPIO_DIRSET_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_DIRSET_PIN1_Msk (0x1UL << GPIO_DIRSET_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_DIRSET_PIN1_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN1_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN1_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 0 : Set as output pin 0 */ +#define GPIO_DIRSET_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_DIRSET_PIN0_Msk (0x1UL << GPIO_DIRSET_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_DIRSET_PIN0_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN0_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN0_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Register: GPIO_DIRCLR */ +/* Description: DIR clear register */ + +/* Bit 31 : Set as input pin 31 */ +#define GPIO_DIRCLR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_DIRCLR_PIN31_Msk (0x1UL << GPIO_DIRCLR_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_DIRCLR_PIN31_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN31_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN31_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 30 : Set as input pin 30 */ +#define GPIO_DIRCLR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_DIRCLR_PIN30_Msk (0x1UL << GPIO_DIRCLR_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_DIRCLR_PIN30_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN30_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN30_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 29 : Set as input pin 29 */ +#define GPIO_DIRCLR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_DIRCLR_PIN29_Msk (0x1UL << GPIO_DIRCLR_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_DIRCLR_PIN29_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN29_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN29_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 28 : Set as input pin 28 */ +#define GPIO_DIRCLR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_DIRCLR_PIN28_Msk (0x1UL << GPIO_DIRCLR_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_DIRCLR_PIN28_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN28_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN28_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 27 : Set as input pin 27 */ +#define GPIO_DIRCLR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_DIRCLR_PIN27_Msk (0x1UL << GPIO_DIRCLR_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_DIRCLR_PIN27_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN27_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN27_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 26 : Set as input pin 26 */ +#define GPIO_DIRCLR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_DIRCLR_PIN26_Msk (0x1UL << GPIO_DIRCLR_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_DIRCLR_PIN26_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN26_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN26_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 25 : Set as input pin 25 */ +#define GPIO_DIRCLR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_DIRCLR_PIN25_Msk (0x1UL << GPIO_DIRCLR_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_DIRCLR_PIN25_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN25_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN25_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 24 : Set as input pin 24 */ +#define GPIO_DIRCLR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_DIRCLR_PIN24_Msk (0x1UL << GPIO_DIRCLR_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_DIRCLR_PIN24_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN24_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN24_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 23 : Set as input pin 23 */ +#define GPIO_DIRCLR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_DIRCLR_PIN23_Msk (0x1UL << GPIO_DIRCLR_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_DIRCLR_PIN23_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN23_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN23_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 22 : Set as input pin 22 */ +#define GPIO_DIRCLR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_DIRCLR_PIN22_Msk (0x1UL << GPIO_DIRCLR_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_DIRCLR_PIN22_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN22_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN22_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 21 : Set as input pin 21 */ +#define GPIO_DIRCLR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_DIRCLR_PIN21_Msk (0x1UL << GPIO_DIRCLR_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_DIRCLR_PIN21_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN21_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN21_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 20 : Set as input pin 20 */ +#define GPIO_DIRCLR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_DIRCLR_PIN20_Msk (0x1UL << GPIO_DIRCLR_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_DIRCLR_PIN20_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN20_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN20_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 19 : Set as input pin 19 */ +#define GPIO_DIRCLR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_DIRCLR_PIN19_Msk (0x1UL << GPIO_DIRCLR_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_DIRCLR_PIN19_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN19_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN19_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 18 : Set as input pin 18 */ +#define GPIO_DIRCLR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_DIRCLR_PIN18_Msk (0x1UL << GPIO_DIRCLR_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_DIRCLR_PIN18_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN18_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN18_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 17 : Set as input pin 17 */ +#define GPIO_DIRCLR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_DIRCLR_PIN17_Msk (0x1UL << GPIO_DIRCLR_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_DIRCLR_PIN17_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN17_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN17_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 16 : Set as input pin 16 */ +#define GPIO_DIRCLR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_DIRCLR_PIN16_Msk (0x1UL << GPIO_DIRCLR_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_DIRCLR_PIN16_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN16_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN16_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 15 : Set as input pin 15 */ +#define GPIO_DIRCLR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_DIRCLR_PIN15_Msk (0x1UL << GPIO_DIRCLR_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_DIRCLR_PIN15_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN15_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN15_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 14 : Set as input pin 14 */ +#define GPIO_DIRCLR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_DIRCLR_PIN14_Msk (0x1UL << GPIO_DIRCLR_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_DIRCLR_PIN14_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN14_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN14_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 13 : Set as input pin 13 */ +#define GPIO_DIRCLR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_DIRCLR_PIN13_Msk (0x1UL << GPIO_DIRCLR_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_DIRCLR_PIN13_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN13_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN13_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 12 : Set as input pin 12 */ +#define GPIO_DIRCLR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_DIRCLR_PIN12_Msk (0x1UL << GPIO_DIRCLR_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_DIRCLR_PIN12_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN12_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN12_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 11 : Set as input pin 11 */ +#define GPIO_DIRCLR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_DIRCLR_PIN11_Msk (0x1UL << GPIO_DIRCLR_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_DIRCLR_PIN11_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN11_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN11_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 10 : Set as input pin 10 */ +#define GPIO_DIRCLR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_DIRCLR_PIN10_Msk (0x1UL << GPIO_DIRCLR_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_DIRCLR_PIN10_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN10_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN10_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 9 : Set as input pin 9 */ +#define GPIO_DIRCLR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_DIRCLR_PIN9_Msk (0x1UL << GPIO_DIRCLR_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_DIRCLR_PIN9_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN9_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN9_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 8 : Set as input pin 8 */ +#define GPIO_DIRCLR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_DIRCLR_PIN8_Msk (0x1UL << GPIO_DIRCLR_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_DIRCLR_PIN8_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN8_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN8_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 7 : Set as input pin 7 */ +#define GPIO_DIRCLR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_DIRCLR_PIN7_Msk (0x1UL << GPIO_DIRCLR_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_DIRCLR_PIN7_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN7_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN7_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 6 : Set as input pin 6 */ +#define GPIO_DIRCLR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_DIRCLR_PIN6_Msk (0x1UL << GPIO_DIRCLR_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_DIRCLR_PIN6_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN6_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN6_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 5 : Set as input pin 5 */ +#define GPIO_DIRCLR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_DIRCLR_PIN5_Msk (0x1UL << GPIO_DIRCLR_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_DIRCLR_PIN5_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN5_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN5_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 4 : Set as input pin 4 */ +#define GPIO_DIRCLR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_DIRCLR_PIN4_Msk (0x1UL << GPIO_DIRCLR_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_DIRCLR_PIN4_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN4_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN4_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 3 : Set as input pin 3 */ +#define GPIO_DIRCLR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_DIRCLR_PIN3_Msk (0x1UL << GPIO_DIRCLR_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_DIRCLR_PIN3_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN3_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN3_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 2 : Set as input pin 2 */ +#define GPIO_DIRCLR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_DIRCLR_PIN2_Msk (0x1UL << GPIO_DIRCLR_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_DIRCLR_PIN2_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN2_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN2_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 1 : Set as input pin 1 */ +#define GPIO_DIRCLR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_DIRCLR_PIN1_Msk (0x1UL << GPIO_DIRCLR_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_DIRCLR_PIN1_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN1_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN1_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 0 : Set as input pin 0 */ +#define GPIO_DIRCLR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_DIRCLR_PIN0_Msk (0x1UL << GPIO_DIRCLR_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_DIRCLR_PIN0_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN0_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN0_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Register: GPIO_LATCH */ +/* Description: Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers */ + +/* Bit 31 : Status on whether PIN31 has met criteria set in PIN_CNF31.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_LATCH_PIN31_Msk (0x1UL << GPIO_LATCH_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_LATCH_PIN31_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN31_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 30 : Status on whether PIN30 has met criteria set in PIN_CNF30.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_LATCH_PIN30_Msk (0x1UL << GPIO_LATCH_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_LATCH_PIN30_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN30_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 29 : Status on whether PIN29 has met criteria set in PIN_CNF29.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_LATCH_PIN29_Msk (0x1UL << GPIO_LATCH_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_LATCH_PIN29_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN29_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 28 : Status on whether PIN28 has met criteria set in PIN_CNF28.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_LATCH_PIN28_Msk (0x1UL << GPIO_LATCH_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_LATCH_PIN28_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN28_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 27 : Status on whether PIN27 has met criteria set in PIN_CNF27.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_LATCH_PIN27_Msk (0x1UL << GPIO_LATCH_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_LATCH_PIN27_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN27_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 26 : Status on whether PIN26 has met criteria set in PIN_CNF26.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_LATCH_PIN26_Msk (0x1UL << GPIO_LATCH_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_LATCH_PIN26_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN26_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 25 : Status on whether PIN25 has met criteria set in PIN_CNF25.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_LATCH_PIN25_Msk (0x1UL << GPIO_LATCH_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_LATCH_PIN25_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN25_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 24 : Status on whether PIN24 has met criteria set in PIN_CNF24.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_LATCH_PIN24_Msk (0x1UL << GPIO_LATCH_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_LATCH_PIN24_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN24_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 23 : Status on whether PIN23 has met criteria set in PIN_CNF23.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_LATCH_PIN23_Msk (0x1UL << GPIO_LATCH_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_LATCH_PIN23_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN23_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 22 : Status on whether PIN22 has met criteria set in PIN_CNF22.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_LATCH_PIN22_Msk (0x1UL << GPIO_LATCH_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_LATCH_PIN22_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN22_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 21 : Status on whether PIN21 has met criteria set in PIN_CNF21.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_LATCH_PIN21_Msk (0x1UL << GPIO_LATCH_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_LATCH_PIN21_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN21_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 20 : Status on whether PIN20 has met criteria set in PIN_CNF20.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_LATCH_PIN20_Msk (0x1UL << GPIO_LATCH_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_LATCH_PIN20_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN20_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 19 : Status on whether PIN19 has met criteria set in PIN_CNF19.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_LATCH_PIN19_Msk (0x1UL << GPIO_LATCH_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_LATCH_PIN19_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN19_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 18 : Status on whether PIN18 has met criteria set in PIN_CNF18.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_LATCH_PIN18_Msk (0x1UL << GPIO_LATCH_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_LATCH_PIN18_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN18_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 17 : Status on whether PIN17 has met criteria set in PIN_CNF17.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_LATCH_PIN17_Msk (0x1UL << GPIO_LATCH_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_LATCH_PIN17_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN17_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 16 : Status on whether PIN16 has met criteria set in PIN_CNF16.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_LATCH_PIN16_Msk (0x1UL << GPIO_LATCH_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_LATCH_PIN16_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN16_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 15 : Status on whether PIN15 has met criteria set in PIN_CNF15.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_LATCH_PIN15_Msk (0x1UL << GPIO_LATCH_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_LATCH_PIN15_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN15_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 14 : Status on whether PIN14 has met criteria set in PIN_CNF14.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_LATCH_PIN14_Msk (0x1UL << GPIO_LATCH_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_LATCH_PIN14_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN14_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 13 : Status on whether PIN13 has met criteria set in PIN_CNF13.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_LATCH_PIN13_Msk (0x1UL << GPIO_LATCH_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_LATCH_PIN13_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN13_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 12 : Status on whether PIN12 has met criteria set in PIN_CNF12.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_LATCH_PIN12_Msk (0x1UL << GPIO_LATCH_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_LATCH_PIN12_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN12_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 11 : Status on whether PIN11 has met criteria set in PIN_CNF11.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_LATCH_PIN11_Msk (0x1UL << GPIO_LATCH_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_LATCH_PIN11_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN11_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 10 : Status on whether PIN10 has met criteria set in PIN_CNF10.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_LATCH_PIN10_Msk (0x1UL << GPIO_LATCH_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_LATCH_PIN10_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN10_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 9 : Status on whether PIN9 has met criteria set in PIN_CNF9.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_LATCH_PIN9_Msk (0x1UL << GPIO_LATCH_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_LATCH_PIN9_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN9_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 8 : Status on whether PIN8 has met criteria set in PIN_CNF8.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_LATCH_PIN8_Msk (0x1UL << GPIO_LATCH_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_LATCH_PIN8_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN8_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 7 : Status on whether PIN7 has met criteria set in PIN_CNF7.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_LATCH_PIN7_Msk (0x1UL << GPIO_LATCH_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_LATCH_PIN7_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN7_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 6 : Status on whether PIN6 has met criteria set in PIN_CNF6.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_LATCH_PIN6_Msk (0x1UL << GPIO_LATCH_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_LATCH_PIN6_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN6_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 5 : Status on whether PIN5 has met criteria set in PIN_CNF5.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_LATCH_PIN5_Msk (0x1UL << GPIO_LATCH_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_LATCH_PIN5_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN5_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 4 : Status on whether PIN4 has met criteria set in PIN_CNF4.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_LATCH_PIN4_Msk (0x1UL << GPIO_LATCH_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_LATCH_PIN4_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN4_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 3 : Status on whether PIN3 has met criteria set in PIN_CNF3.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_LATCH_PIN3_Msk (0x1UL << GPIO_LATCH_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_LATCH_PIN3_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN3_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 2 : Status on whether PIN2 has met criteria set in PIN_CNF2.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_LATCH_PIN2_Msk (0x1UL << GPIO_LATCH_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_LATCH_PIN2_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN2_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 1 : Status on whether PIN1 has met criteria set in PIN_CNF1.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_LATCH_PIN1_Msk (0x1UL << GPIO_LATCH_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_LATCH_PIN1_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN1_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 0 : Status on whether PIN0 has met criteria set in PIN_CNF0.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_LATCH_PIN0_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN0_Latched (1UL) /*!< Criteria has been met */ + +/* Register: GPIO_DETECTMODE */ +/* Description: Select between default DETECT signal behaviour and LDETECT mode */ + +/* Bit 0 : Select between default DETECT signal behaviour and LDETECT mode */ +#define GPIO_DETECTMODE_DETECTMODE_Pos (0UL) /*!< Position of DETECTMODE field. */ +#define GPIO_DETECTMODE_DETECTMODE_Msk (0x1UL << GPIO_DETECTMODE_DETECTMODE_Pos) /*!< Bit mask of DETECTMODE field. */ +#define GPIO_DETECTMODE_DETECTMODE_Default (0UL) /*!< DETECT directly connected to PIN DETECT signals */ +#define GPIO_DETECTMODE_DETECTMODE_LDETECT (1UL) /*!< Use the latched LDETECT behaviour */ + +/* Register: GPIO_PIN_CNF */ +/* Description: Description collection[n]: Configuration of GPIO pins */ + +/* Bits 17..16 : Pin sensing mechanism */ +#define GPIO_PIN_CNF_SENSE_Pos (16UL) /*!< Position of SENSE field. */ +#define GPIO_PIN_CNF_SENSE_Msk (0x3UL << GPIO_PIN_CNF_SENSE_Pos) /*!< Bit mask of SENSE field. */ +#define GPIO_PIN_CNF_SENSE_Disabled (0UL) /*!< Disabled */ +#define GPIO_PIN_CNF_SENSE_High (2UL) /*!< Sense for high level */ +#define GPIO_PIN_CNF_SENSE_Low (3UL) /*!< Sense for low level */ + +/* Bits 10..8 : Drive configuration */ +#define GPIO_PIN_CNF_DRIVE_Pos (8UL) /*!< Position of DRIVE field. */ +#define GPIO_PIN_CNF_DRIVE_Msk (0x7UL << GPIO_PIN_CNF_DRIVE_Pos) /*!< Bit mask of DRIVE field. */ +#define GPIO_PIN_CNF_DRIVE_S0S1 (0UL) /*!< Standard '0', standard '1' */ +#define GPIO_PIN_CNF_DRIVE_H0S1 (1UL) /*!< High drive '0', standard '1' */ +#define GPIO_PIN_CNF_DRIVE_S0H1 (2UL) /*!< Standard '0', high drive '1' */ +#define GPIO_PIN_CNF_DRIVE_H0H1 (3UL) /*!< High drive '0', high 'drive '1'' */ +#define GPIO_PIN_CNF_DRIVE_D0S1 (4UL) /*!< Disconnect '0' standard '1' (normally used for wired-or connections) */ +#define GPIO_PIN_CNF_DRIVE_D0H1 (5UL) /*!< Disconnect '0', high drive '1' (normally used for wired-or connections) */ +#define GPIO_PIN_CNF_DRIVE_S0D1 (6UL) /*!< Standard '0'. disconnect '1' (normally used for wired-and connections) */ +#define GPIO_PIN_CNF_DRIVE_H0D1 (7UL) /*!< High drive '0', disconnect '1' (normally used for wired-and connections) */ + +/* Bits 3..2 : Pull configuration */ +#define GPIO_PIN_CNF_PULL_Pos (2UL) /*!< Position of PULL field. */ +#define GPIO_PIN_CNF_PULL_Msk (0x3UL << GPIO_PIN_CNF_PULL_Pos) /*!< Bit mask of PULL field. */ +#define GPIO_PIN_CNF_PULL_Disabled (0UL) /*!< No pull */ +#define GPIO_PIN_CNF_PULL_Pulldown (1UL) /*!< Pull down on pin */ +#define GPIO_PIN_CNF_PULL_Pullup (3UL) /*!< Pull up on pin */ + +/* Bit 1 : Connect or disconnect input buffer */ +#define GPIO_PIN_CNF_INPUT_Pos (1UL) /*!< Position of INPUT field. */ +#define GPIO_PIN_CNF_INPUT_Msk (0x1UL << GPIO_PIN_CNF_INPUT_Pos) /*!< Bit mask of INPUT field. */ +#define GPIO_PIN_CNF_INPUT_Connect (0UL) /*!< Connect input buffer */ +#define GPIO_PIN_CNF_INPUT_Disconnect (1UL) /*!< Disconnect input buffer */ + +/* Bit 0 : Pin direction. Same physical register as DIR register */ +#define GPIO_PIN_CNF_DIR_Pos (0UL) /*!< Position of DIR field. */ +#define GPIO_PIN_CNF_DIR_Msk (0x1UL << GPIO_PIN_CNF_DIR_Pos) /*!< Bit mask of DIR field. */ +#define GPIO_PIN_CNF_DIR_Input (0UL) /*!< Configure pin as an input pin */ +#define GPIO_PIN_CNF_DIR_Output (1UL) /*!< Configure pin as an output pin */ + + +/* Peripheral: PDM */ +/* Description: Pulse Density Modulation (Digital Microphone) Interface */ + +/* Register: PDM_TASKS_START */ +/* Description: Starts continuous PDM transfer */ + +/* Bit 0 : */ +#define PDM_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define PDM_TASKS_START_TASKS_START_Msk (0x1UL << PDM_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: PDM_TASKS_STOP */ +/* Description: Stops PDM transfer */ + +/* Bit 0 : */ +#define PDM_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define PDM_TASKS_STOP_TASKS_STOP_Msk (0x1UL << PDM_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: PDM_EVENTS_STARTED */ +/* Description: PDM transfer has started */ + +/* Bit 0 : */ +#define PDM_EVENTS_STARTED_EVENTS_STARTED_Pos (0UL) /*!< Position of EVENTS_STARTED field. */ +#define PDM_EVENTS_STARTED_EVENTS_STARTED_Msk (0x1UL << PDM_EVENTS_STARTED_EVENTS_STARTED_Pos) /*!< Bit mask of EVENTS_STARTED field. */ + +/* Register: PDM_EVENTS_STOPPED */ +/* Description: PDM transfer has finished */ + +/* Bit 0 : */ +#define PDM_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */ +#define PDM_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << PDM_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */ + +/* Register: PDM_EVENTS_END */ +/* Description: The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM */ + +/* Bit 0 : */ +#define PDM_EVENTS_END_EVENTS_END_Pos (0UL) /*!< Position of EVENTS_END field. */ +#define PDM_EVENTS_END_EVENTS_END_Msk (0x1UL << PDM_EVENTS_END_EVENTS_END_Pos) /*!< Bit mask of EVENTS_END field. */ + +/* Register: PDM_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 2 : Enable or disable interrupt for END event */ +#define PDM_INTEN_END_Pos (2UL) /*!< Position of END field. */ +#define PDM_INTEN_END_Msk (0x1UL << PDM_INTEN_END_Pos) /*!< Bit mask of END field. */ +#define PDM_INTEN_END_Disabled (0UL) /*!< Disable */ +#define PDM_INTEN_END_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for STOPPED event */ +#define PDM_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define PDM_INTEN_STOPPED_Msk (0x1UL << PDM_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define PDM_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ +#define PDM_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable interrupt for STARTED event */ +#define PDM_INTEN_STARTED_Pos (0UL) /*!< Position of STARTED field. */ +#define PDM_INTEN_STARTED_Msk (0x1UL << PDM_INTEN_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define PDM_INTEN_STARTED_Disabled (0UL) /*!< Disable */ +#define PDM_INTEN_STARTED_Enabled (1UL) /*!< Enable */ + +/* Register: PDM_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 2 : Write '1' to enable interrupt for END event */ +#define PDM_INTENSET_END_Pos (2UL) /*!< Position of END field. */ +#define PDM_INTENSET_END_Msk (0x1UL << PDM_INTENSET_END_Pos) /*!< Bit mask of END field. */ +#define PDM_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ +#define PDM_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ +#define PDM_INTENSET_END_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable interrupt for STOPPED event */ +#define PDM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define PDM_INTENSET_STOPPED_Msk (0x1UL << PDM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define PDM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define PDM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define PDM_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to enable interrupt for STARTED event */ +#define PDM_INTENSET_STARTED_Pos (0UL) /*!< Position of STARTED field. */ +#define PDM_INTENSET_STARTED_Msk (0x1UL << PDM_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define PDM_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */ +#define PDM_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */ +#define PDM_INTENSET_STARTED_Set (1UL) /*!< Enable */ + +/* Register: PDM_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 2 : Write '1' to disable interrupt for END event */ +#define PDM_INTENCLR_END_Pos (2UL) /*!< Position of END field. */ +#define PDM_INTENCLR_END_Msk (0x1UL << PDM_INTENCLR_END_Pos) /*!< Bit mask of END field. */ +#define PDM_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ +#define PDM_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ +#define PDM_INTENCLR_END_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable interrupt for STOPPED event */ +#define PDM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define PDM_INTENCLR_STOPPED_Msk (0x1UL << PDM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define PDM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define PDM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define PDM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to disable interrupt for STARTED event */ +#define PDM_INTENCLR_STARTED_Pos (0UL) /*!< Position of STARTED field. */ +#define PDM_INTENCLR_STARTED_Msk (0x1UL << PDM_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define PDM_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */ +#define PDM_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */ +#define PDM_INTENCLR_STARTED_Clear (1UL) /*!< Disable */ + +/* Register: PDM_ENABLE */ +/* Description: PDM module enable register */ + +/* Bit 0 : Enable or disable PDM module */ +#define PDM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define PDM_ENABLE_ENABLE_Msk (0x1UL << PDM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define PDM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ +#define PDM_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */ + +/* Register: PDM_PDMCLKCTRL */ +/* Description: PDM clock generator control */ + +/* Bits 31..0 : PDM_CLK frequency */ +#define PDM_PDMCLKCTRL_FREQ_Pos (0UL) /*!< Position of FREQ field. */ +#define PDM_PDMCLKCTRL_FREQ_Msk (0xFFFFFFFFUL << PDM_PDMCLKCTRL_FREQ_Pos) /*!< Bit mask of FREQ field. */ +#define PDM_PDMCLKCTRL_FREQ_1000K (0x08000000UL) /*!< PDM_CLK = 32 MHz / 32 = 1.000 MHz */ +#define PDM_PDMCLKCTRL_FREQ_Default (0x08400000UL) /*!< PDM_CLK = 32 MHz / 31 = 1.032 MHz. Nominal clock for RATIO=Ratio64. */ +#define PDM_PDMCLKCTRL_FREQ_1067K (0x08800000UL) /*!< PDM_CLK = 32 MHz / 30 = 1.067 MHz */ +#define PDM_PDMCLKCTRL_FREQ_1231K (0x09800000UL) /*!< PDM_CLK = 32 MHz / 26 = 1.231 MHz */ +#define PDM_PDMCLKCTRL_FREQ_1280K (0x0A000000UL) /*!< PDM_CLK = 32 MHz / 25 = 1.280 MHz. Nominal clock for RATIO=Ratio80. */ +#define PDM_PDMCLKCTRL_FREQ_1333K (0x0A800000UL) /*!< PDM_CLK = 32 MHz / 24 = 1.333 MHz */ + +/* Register: PDM_MODE */ +/* Description: Defines the routing of the connected PDM microphones' signals */ + +/* Bit 1 : Defines on which PDM_CLK edge Left (or mono) is sampled */ +#define PDM_MODE_EDGE_Pos (1UL) /*!< Position of EDGE field. */ +#define PDM_MODE_EDGE_Msk (0x1UL << PDM_MODE_EDGE_Pos) /*!< Bit mask of EDGE field. */ +#define PDM_MODE_EDGE_LeftFalling (0UL) /*!< Left (or mono) is sampled on falling edge of PDM_CLK */ +#define PDM_MODE_EDGE_LeftRising (1UL) /*!< Left (or mono) is sampled on rising edge of PDM_CLK */ + +/* Bit 0 : Mono or stereo operation */ +#define PDM_MODE_OPERATION_Pos (0UL) /*!< Position of OPERATION field. */ +#define PDM_MODE_OPERATION_Msk (0x1UL << PDM_MODE_OPERATION_Pos) /*!< Bit mask of OPERATION field. */ +#define PDM_MODE_OPERATION_Stereo (0UL) /*!< Sample and store one pair (Left + Right) of 16bit samples per RAM word R=[31:16]; L=[15:0] */ +#define PDM_MODE_OPERATION_Mono (1UL) /*!< Sample and store two successive Left samples (16 bit each) per RAM word L1=[31:16]; L0=[15:0] */ + +/* Register: PDM_GAINL */ +/* Description: Left output gain adjustment */ + +/* Bits 6..0 : Left output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters) 0x00 -20 dB gain adjust 0x01 -19.5 dB gain adjust (...) 0x27 -0.5 dB gain adjust 0x28 0 dB gain adjust 0x29 +0.5 dB gain adjust (...) 0x4F +19.5 dB gain adjust 0x50 +20 dB gain adjust */ +#define PDM_GAINL_GAINL_Pos (0UL) /*!< Position of GAINL field. */ +#define PDM_GAINL_GAINL_Msk (0x7FUL << PDM_GAINL_GAINL_Pos) /*!< Bit mask of GAINL field. */ +#define PDM_GAINL_GAINL_MinGain (0x00UL) /*!< -20dB gain adjustment (minimum) */ +#define PDM_GAINL_GAINL_DefaultGain (0x28UL) /*!< 0dB gain adjustment */ +#define PDM_GAINL_GAINL_MaxGain (0x50UL) /*!< +20dB gain adjustment (maximum) */ + +/* Register: PDM_GAINR */ +/* Description: Right output gain adjustment */ + +/* Bits 6..0 : Right output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters) */ +#define PDM_GAINR_GAINR_Pos (0UL) /*!< Position of GAINR field. */ +#define PDM_GAINR_GAINR_Msk (0x7FUL << PDM_GAINR_GAINR_Pos) /*!< Bit mask of GAINR field. */ +#define PDM_GAINR_GAINR_MinGain (0x00UL) /*!< -20dB gain adjustment (minimum) */ +#define PDM_GAINR_GAINR_DefaultGain (0x28UL) /*!< 0dB gain adjustment */ +#define PDM_GAINR_GAINR_MaxGain (0x50UL) /*!< +20dB gain adjustment (maximum) */ + +/* Register: PDM_RATIO */ +/* Description: Selects the ratio between PDM_CLK and output sample rate. Change PDMCLKCTRL accordingly. */ + +/* Bit 0 : Selects the ratio between PDM_CLK and output sample rate */ +#define PDM_RATIO_RATIO_Pos (0UL) /*!< Position of RATIO field. */ +#define PDM_RATIO_RATIO_Msk (0x1UL << PDM_RATIO_RATIO_Pos) /*!< Bit mask of RATIO field. */ +#define PDM_RATIO_RATIO_Ratio64 (0UL) /*!< Ratio of 64 */ +#define PDM_RATIO_RATIO_Ratio80 (1UL) /*!< Ratio of 80 */ + +/* Register: PDM_PSEL_CLK */ +/* Description: Pin number configuration for PDM CLK signal */ + +/* Bit 31 : Connection */ +#define PDM_PSEL_CLK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define PDM_PSEL_CLK_CONNECT_Msk (0x1UL << PDM_PSEL_CLK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define PDM_PSEL_CLK_CONNECT_Connected (0UL) /*!< Connect */ +#define PDM_PSEL_CLK_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define PDM_PSEL_CLK_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define PDM_PSEL_CLK_PORT_Msk (0x1UL << PDM_PSEL_CLK_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define PDM_PSEL_CLK_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define PDM_PSEL_CLK_PIN_Msk (0x1FUL << PDM_PSEL_CLK_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: PDM_PSEL_DIN */ +/* Description: Pin number configuration for PDM DIN signal */ + +/* Bit 31 : Connection */ +#define PDM_PSEL_DIN_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define PDM_PSEL_DIN_CONNECT_Msk (0x1UL << PDM_PSEL_DIN_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define PDM_PSEL_DIN_CONNECT_Connected (0UL) /*!< Connect */ +#define PDM_PSEL_DIN_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define PDM_PSEL_DIN_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define PDM_PSEL_DIN_PORT_Msk (0x1UL << PDM_PSEL_DIN_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define PDM_PSEL_DIN_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define PDM_PSEL_DIN_PIN_Msk (0x1FUL << PDM_PSEL_DIN_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: PDM_SAMPLE_PTR */ +/* Description: RAM address pointer to write samples to with EasyDMA */ + +/* Bits 31..0 : Address to write PDM samples to over DMA */ +#define PDM_SAMPLE_PTR_SAMPLEPTR_Pos (0UL) /*!< Position of SAMPLEPTR field. */ +#define PDM_SAMPLE_PTR_SAMPLEPTR_Msk (0xFFFFFFFFUL << PDM_SAMPLE_PTR_SAMPLEPTR_Pos) /*!< Bit mask of SAMPLEPTR field. */ + +/* Register: PDM_SAMPLE_MAXCNT */ +/* Description: Number of samples to allocate memory for in EasyDMA mode */ + +/* Bits 14..0 : Length of DMA RAM allocation in number of samples */ +#define PDM_SAMPLE_MAXCNT_BUFFSIZE_Pos (0UL) /*!< Position of BUFFSIZE field. */ +#define PDM_SAMPLE_MAXCNT_BUFFSIZE_Msk (0x7FFFUL << PDM_SAMPLE_MAXCNT_BUFFSIZE_Pos) /*!< Bit mask of BUFFSIZE field. */ + + +/* Peripheral: POWER */ +/* Description: Power control */ + +/* Register: POWER_TASKS_CONSTLAT */ +/* Description: Enable constant latency mode */ + +/* Bit 0 : */ +#define POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Pos (0UL) /*!< Position of TASKS_CONSTLAT field. */ +#define POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Msk (0x1UL << POWER_TASKS_CONSTLAT_TASKS_CONSTLAT_Pos) /*!< Bit mask of TASKS_CONSTLAT field. */ + +/* Register: POWER_TASKS_LOWPWR */ +/* Description: Enable low power mode (variable latency) */ + +/* Bit 0 : */ +#define POWER_TASKS_LOWPWR_TASKS_LOWPWR_Pos (0UL) /*!< Position of TASKS_LOWPWR field. */ +#define POWER_TASKS_LOWPWR_TASKS_LOWPWR_Msk (0x1UL << POWER_TASKS_LOWPWR_TASKS_LOWPWR_Pos) /*!< Bit mask of TASKS_LOWPWR field. */ + +/* Register: POWER_EVENTS_POFWARN */ +/* Description: Power failure warning */ + +/* Bit 0 : */ +#define POWER_EVENTS_POFWARN_EVENTS_POFWARN_Pos (0UL) /*!< Position of EVENTS_POFWARN field. */ +#define POWER_EVENTS_POFWARN_EVENTS_POFWARN_Msk (0x1UL << POWER_EVENTS_POFWARN_EVENTS_POFWARN_Pos) /*!< Bit mask of EVENTS_POFWARN field. */ + +/* Register: POWER_EVENTS_SLEEPENTER */ +/* Description: CPU entered WFI/WFE sleep */ + +/* Bit 0 : */ +#define POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_Pos (0UL) /*!< Position of EVENTS_SLEEPENTER field. */ +#define POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_Msk (0x1UL << POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_Pos) /*!< Bit mask of EVENTS_SLEEPENTER field. */ + +/* Register: POWER_EVENTS_SLEEPEXIT */ +/* Description: CPU exited WFI/WFE sleep */ + +/* Bit 0 : */ +#define POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_Pos (0UL) /*!< Position of EVENTS_SLEEPEXIT field. */ +#define POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_Msk (0x1UL << POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_Pos) /*!< Bit mask of EVENTS_SLEEPEXIT field. */ + +/* Register: POWER_EVENTS_USBDETECTED */ +/* Description: Voltage supply detected on VBUS */ + +/* Bit 0 : */ +#define POWER_EVENTS_USBDETECTED_EVENTS_USBDETECTED_Pos (0UL) /*!< Position of EVENTS_USBDETECTED field. */ +#define POWER_EVENTS_USBDETECTED_EVENTS_USBDETECTED_Msk (0x1UL << POWER_EVENTS_USBDETECTED_EVENTS_USBDETECTED_Pos) /*!< Bit mask of EVENTS_USBDETECTED field. */ + +/* Register: POWER_EVENTS_USBREMOVED */ +/* Description: Voltage supply removed from VBUS */ + +/* Bit 0 : */ +#define POWER_EVENTS_USBREMOVED_EVENTS_USBREMOVED_Pos (0UL) /*!< Position of EVENTS_USBREMOVED field. */ +#define POWER_EVENTS_USBREMOVED_EVENTS_USBREMOVED_Msk (0x1UL << POWER_EVENTS_USBREMOVED_EVENTS_USBREMOVED_Pos) /*!< Bit mask of EVENTS_USBREMOVED field. */ + +/* Register: POWER_EVENTS_USBPWRRDY */ +/* Description: USB 3.3 V supply ready */ + +/* Bit 0 : */ +#define POWER_EVENTS_USBPWRRDY_EVENTS_USBPWRRDY_Pos (0UL) /*!< Position of EVENTS_USBPWRRDY field. */ +#define POWER_EVENTS_USBPWRRDY_EVENTS_USBPWRRDY_Msk (0x1UL << POWER_EVENTS_USBPWRRDY_EVENTS_USBPWRRDY_Pos) /*!< Bit mask of EVENTS_USBPWRRDY field. */ + +/* Register: POWER_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 9 : Write '1' to enable interrupt for USBPWRRDY event */ +#define POWER_INTENSET_USBPWRRDY_Pos (9UL) /*!< Position of USBPWRRDY field. */ +#define POWER_INTENSET_USBPWRRDY_Msk (0x1UL << POWER_INTENSET_USBPWRRDY_Pos) /*!< Bit mask of USBPWRRDY field. */ +#define POWER_INTENSET_USBPWRRDY_Disabled (0UL) /*!< Read: Disabled */ +#define POWER_INTENSET_USBPWRRDY_Enabled (1UL) /*!< Read: Enabled */ +#define POWER_INTENSET_USBPWRRDY_Set (1UL) /*!< Enable */ + +/* Bit 8 : Write '1' to enable interrupt for USBREMOVED event */ +#define POWER_INTENSET_USBREMOVED_Pos (8UL) /*!< Position of USBREMOVED field. */ +#define POWER_INTENSET_USBREMOVED_Msk (0x1UL << POWER_INTENSET_USBREMOVED_Pos) /*!< Bit mask of USBREMOVED field. */ +#define POWER_INTENSET_USBREMOVED_Disabled (0UL) /*!< Read: Disabled */ +#define POWER_INTENSET_USBREMOVED_Enabled (1UL) /*!< Read: Enabled */ +#define POWER_INTENSET_USBREMOVED_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to enable interrupt for USBDETECTED event */ +#define POWER_INTENSET_USBDETECTED_Pos (7UL) /*!< Position of USBDETECTED field. */ +#define POWER_INTENSET_USBDETECTED_Msk (0x1UL << POWER_INTENSET_USBDETECTED_Pos) /*!< Bit mask of USBDETECTED field. */ +#define POWER_INTENSET_USBDETECTED_Disabled (0UL) /*!< Read: Disabled */ +#define POWER_INTENSET_USBDETECTED_Enabled (1UL) /*!< Read: Enabled */ +#define POWER_INTENSET_USBDETECTED_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to enable interrupt for SLEEPEXIT event */ +#define POWER_INTENSET_SLEEPEXIT_Pos (6UL) /*!< Position of SLEEPEXIT field. */ +#define POWER_INTENSET_SLEEPEXIT_Msk (0x1UL << POWER_INTENSET_SLEEPEXIT_Pos) /*!< Bit mask of SLEEPEXIT field. */ +#define POWER_INTENSET_SLEEPEXIT_Disabled (0UL) /*!< Read: Disabled */ +#define POWER_INTENSET_SLEEPEXIT_Enabled (1UL) /*!< Read: Enabled */ +#define POWER_INTENSET_SLEEPEXIT_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to enable interrupt for SLEEPENTER event */ +#define POWER_INTENSET_SLEEPENTER_Pos (5UL) /*!< Position of SLEEPENTER field. */ +#define POWER_INTENSET_SLEEPENTER_Msk (0x1UL << POWER_INTENSET_SLEEPENTER_Pos) /*!< Bit mask of SLEEPENTER field. */ +#define POWER_INTENSET_SLEEPENTER_Disabled (0UL) /*!< Read: Disabled */ +#define POWER_INTENSET_SLEEPENTER_Enabled (1UL) /*!< Read: Enabled */ +#define POWER_INTENSET_SLEEPENTER_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to enable interrupt for POFWARN event */ +#define POWER_INTENSET_POFWARN_Pos (2UL) /*!< Position of POFWARN field. */ +#define POWER_INTENSET_POFWARN_Msk (0x1UL << POWER_INTENSET_POFWARN_Pos) /*!< Bit mask of POFWARN field. */ +#define POWER_INTENSET_POFWARN_Disabled (0UL) /*!< Read: Disabled */ +#define POWER_INTENSET_POFWARN_Enabled (1UL) /*!< Read: Enabled */ +#define POWER_INTENSET_POFWARN_Set (1UL) /*!< Enable */ + +/* Register: POWER_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 9 : Write '1' to disable interrupt for USBPWRRDY event */ +#define POWER_INTENCLR_USBPWRRDY_Pos (9UL) /*!< Position of USBPWRRDY field. */ +#define POWER_INTENCLR_USBPWRRDY_Msk (0x1UL << POWER_INTENCLR_USBPWRRDY_Pos) /*!< Bit mask of USBPWRRDY field. */ +#define POWER_INTENCLR_USBPWRRDY_Disabled (0UL) /*!< Read: Disabled */ +#define POWER_INTENCLR_USBPWRRDY_Enabled (1UL) /*!< Read: Enabled */ +#define POWER_INTENCLR_USBPWRRDY_Clear (1UL) /*!< Disable */ + +/* Bit 8 : Write '1' to disable interrupt for USBREMOVED event */ +#define POWER_INTENCLR_USBREMOVED_Pos (8UL) /*!< Position of USBREMOVED field. */ +#define POWER_INTENCLR_USBREMOVED_Msk (0x1UL << POWER_INTENCLR_USBREMOVED_Pos) /*!< Bit mask of USBREMOVED field. */ +#define POWER_INTENCLR_USBREMOVED_Disabled (0UL) /*!< Read: Disabled */ +#define POWER_INTENCLR_USBREMOVED_Enabled (1UL) /*!< Read: Enabled */ +#define POWER_INTENCLR_USBREMOVED_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to disable interrupt for USBDETECTED event */ +#define POWER_INTENCLR_USBDETECTED_Pos (7UL) /*!< Position of USBDETECTED field. */ +#define POWER_INTENCLR_USBDETECTED_Msk (0x1UL << POWER_INTENCLR_USBDETECTED_Pos) /*!< Bit mask of USBDETECTED field. */ +#define POWER_INTENCLR_USBDETECTED_Disabled (0UL) /*!< Read: Disabled */ +#define POWER_INTENCLR_USBDETECTED_Enabled (1UL) /*!< Read: Enabled */ +#define POWER_INTENCLR_USBDETECTED_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to disable interrupt for SLEEPEXIT event */ +#define POWER_INTENCLR_SLEEPEXIT_Pos (6UL) /*!< Position of SLEEPEXIT field. */ +#define POWER_INTENCLR_SLEEPEXIT_Msk (0x1UL << POWER_INTENCLR_SLEEPEXIT_Pos) /*!< Bit mask of SLEEPEXIT field. */ +#define POWER_INTENCLR_SLEEPEXIT_Disabled (0UL) /*!< Read: Disabled */ +#define POWER_INTENCLR_SLEEPEXIT_Enabled (1UL) /*!< Read: Enabled */ +#define POWER_INTENCLR_SLEEPEXIT_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to disable interrupt for SLEEPENTER event */ +#define POWER_INTENCLR_SLEEPENTER_Pos (5UL) /*!< Position of SLEEPENTER field. */ +#define POWER_INTENCLR_SLEEPENTER_Msk (0x1UL << POWER_INTENCLR_SLEEPENTER_Pos) /*!< Bit mask of SLEEPENTER field. */ +#define POWER_INTENCLR_SLEEPENTER_Disabled (0UL) /*!< Read: Disabled */ +#define POWER_INTENCLR_SLEEPENTER_Enabled (1UL) /*!< Read: Enabled */ +#define POWER_INTENCLR_SLEEPENTER_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to disable interrupt for POFWARN event */ +#define POWER_INTENCLR_POFWARN_Pos (2UL) /*!< Position of POFWARN field. */ +#define POWER_INTENCLR_POFWARN_Msk (0x1UL << POWER_INTENCLR_POFWARN_Pos) /*!< Bit mask of POFWARN field. */ +#define POWER_INTENCLR_POFWARN_Disabled (0UL) /*!< Read: Disabled */ +#define POWER_INTENCLR_POFWARN_Enabled (1UL) /*!< Read: Enabled */ +#define POWER_INTENCLR_POFWARN_Clear (1UL) /*!< Disable */ + +/* Register: POWER_RESETREAS */ +/* Description: Reset reason */ + +/* Bit 20 : Reset due to wake up from System OFF mode by VBUS rising into valid range */ +#define POWER_RESETREAS_VBUS_Pos (20UL) /*!< Position of VBUS field. */ +#define POWER_RESETREAS_VBUS_Msk (0x1UL << POWER_RESETREAS_VBUS_Pos) /*!< Bit mask of VBUS field. */ +#define POWER_RESETREAS_VBUS_NotDetected (0UL) /*!< Not detected */ +#define POWER_RESETREAS_VBUS_Detected (1UL) /*!< Detected */ + +/* Bit 19 : Reset due to wake up from System OFF mode by NFC field detect */ +#define POWER_RESETREAS_NFC_Pos (19UL) /*!< Position of NFC field. */ +#define POWER_RESETREAS_NFC_Msk (0x1UL << POWER_RESETREAS_NFC_Pos) /*!< Bit mask of NFC field. */ +#define POWER_RESETREAS_NFC_NotDetected (0UL) /*!< Not detected */ +#define POWER_RESETREAS_NFC_Detected (1UL) /*!< Detected */ + +/* Bit 18 : Reset due to wake up from System OFF mode when wakeup is triggered from entering into debug interface mode */ +#define POWER_RESETREAS_DIF_Pos (18UL) /*!< Position of DIF field. */ +#define POWER_RESETREAS_DIF_Msk (0x1UL << POWER_RESETREAS_DIF_Pos) /*!< Bit mask of DIF field. */ +#define POWER_RESETREAS_DIF_NotDetected (0UL) /*!< Not detected */ +#define POWER_RESETREAS_DIF_Detected (1UL) /*!< Detected */ + +/* Bit 17 : Reset due to wake up from System OFF mode when wakeup is triggered from ANADETECT signal from LPCOMP */ +#define POWER_RESETREAS_LPCOMP_Pos (17UL) /*!< Position of LPCOMP field. */ +#define POWER_RESETREAS_LPCOMP_Msk (0x1UL << POWER_RESETREAS_LPCOMP_Pos) /*!< Bit mask of LPCOMP field. */ +#define POWER_RESETREAS_LPCOMP_NotDetected (0UL) /*!< Not detected */ +#define POWER_RESETREAS_LPCOMP_Detected (1UL) /*!< Detected */ + +/* Bit 16 : Reset due to wake up from System OFF mode when wakeup is triggered from DETECT signal from GPIO */ +#define POWER_RESETREAS_OFF_Pos (16UL) /*!< Position of OFF field. */ +#define POWER_RESETREAS_OFF_Msk (0x1UL << POWER_RESETREAS_OFF_Pos) /*!< Bit mask of OFF field. */ +#define POWER_RESETREAS_OFF_NotDetected (0UL) /*!< Not detected */ +#define POWER_RESETREAS_OFF_Detected (1UL) /*!< Detected */ + +/* Bit 3 : Reset from CPU lock-up detected */ +#define POWER_RESETREAS_LOCKUP_Pos (3UL) /*!< Position of LOCKUP field. */ +#define POWER_RESETREAS_LOCKUP_Msk (0x1UL << POWER_RESETREAS_LOCKUP_Pos) /*!< Bit mask of LOCKUP field. */ +#define POWER_RESETREAS_LOCKUP_NotDetected (0UL) /*!< Not detected */ +#define POWER_RESETREAS_LOCKUP_Detected (1UL) /*!< Detected */ + +/* Bit 2 : Reset from soft reset detected */ +#define POWER_RESETREAS_SREQ_Pos (2UL) /*!< Position of SREQ field. */ +#define POWER_RESETREAS_SREQ_Msk (0x1UL << POWER_RESETREAS_SREQ_Pos) /*!< Bit mask of SREQ field. */ +#define POWER_RESETREAS_SREQ_NotDetected (0UL) /*!< Not detected */ +#define POWER_RESETREAS_SREQ_Detected (1UL) /*!< Detected */ + +/* Bit 1 : Reset from watchdog detected */ +#define POWER_RESETREAS_DOG_Pos (1UL) /*!< Position of DOG field. */ +#define POWER_RESETREAS_DOG_Msk (0x1UL << POWER_RESETREAS_DOG_Pos) /*!< Bit mask of DOG field. */ +#define POWER_RESETREAS_DOG_NotDetected (0UL) /*!< Not detected */ +#define POWER_RESETREAS_DOG_Detected (1UL) /*!< Detected */ + +/* Bit 0 : Reset from pin-reset detected */ +#define POWER_RESETREAS_RESETPIN_Pos (0UL) /*!< Position of RESETPIN field. */ +#define POWER_RESETREAS_RESETPIN_Msk (0x1UL << POWER_RESETREAS_RESETPIN_Pos) /*!< Bit mask of RESETPIN field. */ +#define POWER_RESETREAS_RESETPIN_NotDetected (0UL) /*!< Not detected */ +#define POWER_RESETREAS_RESETPIN_Detected (1UL) /*!< Detected */ + +/* Register: POWER_RAMSTATUS */ +/* Description: Deprecated register - RAM status register */ + +/* Bit 3 : RAM block 3 is on or off/powering up */ +#define POWER_RAMSTATUS_RAMBLOCK3_Pos (3UL) /*!< Position of RAMBLOCK3 field. */ +#define POWER_RAMSTATUS_RAMBLOCK3_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK3_Pos) /*!< Bit mask of RAMBLOCK3 field. */ +#define POWER_RAMSTATUS_RAMBLOCK3_Off (0UL) /*!< Off */ +#define POWER_RAMSTATUS_RAMBLOCK3_On (1UL) /*!< On */ + +/* Bit 2 : RAM block 2 is on or off/powering up */ +#define POWER_RAMSTATUS_RAMBLOCK2_Pos (2UL) /*!< Position of RAMBLOCK2 field. */ +#define POWER_RAMSTATUS_RAMBLOCK2_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK2_Pos) /*!< Bit mask of RAMBLOCK2 field. */ +#define POWER_RAMSTATUS_RAMBLOCK2_Off (0UL) /*!< Off */ +#define POWER_RAMSTATUS_RAMBLOCK2_On (1UL) /*!< On */ + +/* Bit 1 : RAM block 1 is on or off/powering up */ +#define POWER_RAMSTATUS_RAMBLOCK1_Pos (1UL) /*!< Position of RAMBLOCK1 field. */ +#define POWER_RAMSTATUS_RAMBLOCK1_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK1_Pos) /*!< Bit mask of RAMBLOCK1 field. */ +#define POWER_RAMSTATUS_RAMBLOCK1_Off (0UL) /*!< Off */ +#define POWER_RAMSTATUS_RAMBLOCK1_On (1UL) /*!< On */ + +/* Bit 0 : RAM block 0 is on or off/powering up */ +#define POWER_RAMSTATUS_RAMBLOCK0_Pos (0UL) /*!< Position of RAMBLOCK0 field. */ +#define POWER_RAMSTATUS_RAMBLOCK0_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK0_Pos) /*!< Bit mask of RAMBLOCK0 field. */ +#define POWER_RAMSTATUS_RAMBLOCK0_Off (0UL) /*!< Off */ +#define POWER_RAMSTATUS_RAMBLOCK0_On (1UL) /*!< On */ + +/* Register: POWER_USBREGSTATUS */ +/* Description: USB supply status */ + +/* Bit 1 : USB supply output settling time elapsed */ +#define POWER_USBREGSTATUS_OUTPUTRDY_Pos (1UL) /*!< Position of OUTPUTRDY field. */ +#define POWER_USBREGSTATUS_OUTPUTRDY_Msk (0x1UL << POWER_USBREGSTATUS_OUTPUTRDY_Pos) /*!< Bit mask of OUTPUTRDY field. */ +#define POWER_USBREGSTATUS_OUTPUTRDY_NotReady (0UL) /*!< USBREG output settling time not elapsed */ +#define POWER_USBREGSTATUS_OUTPUTRDY_Ready (1UL) /*!< USBREG output settling time elapsed (same information as USBPWRRDY event) */ + +/* Bit 0 : VBUS input detection status (USBDETECTED and USBREMOVED events are derived from this information) */ +#define POWER_USBREGSTATUS_VBUSDETECT_Pos (0UL) /*!< Position of VBUSDETECT field. */ +#define POWER_USBREGSTATUS_VBUSDETECT_Msk (0x1UL << POWER_USBREGSTATUS_VBUSDETECT_Pos) /*!< Bit mask of VBUSDETECT field. */ +#define POWER_USBREGSTATUS_VBUSDETECT_NoVbus (0UL) /*!< VBUS voltage below valid threshold */ +#define POWER_USBREGSTATUS_VBUSDETECT_VbusPresent (1UL) /*!< VBUS voltage above valid threshold */ + +/* Register: POWER_SYSTEMOFF */ +/* Description: System OFF register */ + +/* Bit 0 : Enable System OFF mode */ +#define POWER_SYSTEMOFF_SYSTEMOFF_Pos (0UL) /*!< Position of SYSTEMOFF field. */ +#define POWER_SYSTEMOFF_SYSTEMOFF_Msk (0x1UL << POWER_SYSTEMOFF_SYSTEMOFF_Pos) /*!< Bit mask of SYSTEMOFF field. */ +#define POWER_SYSTEMOFF_SYSTEMOFF_Enter (1UL) /*!< Enable System OFF mode */ + +/* Register: POWER_POFCON */ +/* Description: Power-fail comparator configuration */ + +/* Bits 11..8 : Power-fail comparator threshold setting for high voltage mode (supply connected to VDDH only). This setting does not apply for normal voltage mode (supply connected to both VDD and VDDH). */ +#define POWER_POFCON_THRESHOLDVDDH_Pos (8UL) /*!< Position of THRESHOLDVDDH field. */ +#define POWER_POFCON_THRESHOLDVDDH_Msk (0xFUL << POWER_POFCON_THRESHOLDVDDH_Pos) /*!< Bit mask of THRESHOLDVDDH field. */ +#define POWER_POFCON_THRESHOLDVDDH_V27 (0UL) /*!< Set threshold to 2.7 V */ +#define POWER_POFCON_THRESHOLDVDDH_V28 (1UL) /*!< Set threshold to 2.8 V */ +#define POWER_POFCON_THRESHOLDVDDH_V29 (2UL) /*!< Set threshold to 2.9 V */ +#define POWER_POFCON_THRESHOLDVDDH_V30 (3UL) /*!< Set threshold to 3.0 V */ +#define POWER_POFCON_THRESHOLDVDDH_V31 (4UL) /*!< Set threshold to 3.1 V */ +#define POWER_POFCON_THRESHOLDVDDH_V32 (5UL) /*!< Set threshold to 3.2 V */ +#define POWER_POFCON_THRESHOLDVDDH_V33 (6UL) /*!< Set threshold to 3.3 V */ +#define POWER_POFCON_THRESHOLDVDDH_V34 (7UL) /*!< Set threshold to 3.4 V */ +#define POWER_POFCON_THRESHOLDVDDH_V35 (8UL) /*!< Set threshold to 3.5 V */ +#define POWER_POFCON_THRESHOLDVDDH_V36 (9UL) /*!< Set threshold to 3.6 V */ +#define POWER_POFCON_THRESHOLDVDDH_V37 (10UL) /*!< Set threshold to 3.7 V */ +#define POWER_POFCON_THRESHOLDVDDH_V38 (11UL) /*!< Set threshold to 3.8 V */ +#define POWER_POFCON_THRESHOLDVDDH_V39 (12UL) /*!< Set threshold to 3.9 V */ +#define POWER_POFCON_THRESHOLDVDDH_V40 (13UL) /*!< Set threshold to 4.0 V */ +#define POWER_POFCON_THRESHOLDVDDH_V41 (14UL) /*!< Set threshold to 4.1 V */ +#define POWER_POFCON_THRESHOLDVDDH_V42 (15UL) /*!< Set threshold to 4.2 V */ + +/* Bits 4..1 : Power-fail comparator threshold setting. This setting applies both for normal voltage mode (supply connected to both VDD and VDDH) and high voltage mode (supply connected to VDDH only). Values 0-3 set threshold below 1.7 V and should not be used as brown out detection will be activated before power failure warning on such low voltages. */ +#define POWER_POFCON_THRESHOLD_Pos (1UL) /*!< Position of THRESHOLD field. */ +#define POWER_POFCON_THRESHOLD_Msk (0xFUL << POWER_POFCON_THRESHOLD_Pos) /*!< Bit mask of THRESHOLD field. */ +#define POWER_POFCON_THRESHOLD_V17 (4UL) /*!< Set threshold to 1.7 V */ +#define POWER_POFCON_THRESHOLD_V18 (5UL) /*!< Set threshold to 1.8 V */ +#define POWER_POFCON_THRESHOLD_V19 (6UL) /*!< Set threshold to 1.9 V */ +#define POWER_POFCON_THRESHOLD_V20 (7UL) /*!< Set threshold to 2.0 V */ +#define POWER_POFCON_THRESHOLD_V21 (8UL) /*!< Set threshold to 2.1 V */ +#define POWER_POFCON_THRESHOLD_V22 (9UL) /*!< Set threshold to 2.2 V */ +#define POWER_POFCON_THRESHOLD_V23 (10UL) /*!< Set threshold to 2.3 V */ +#define POWER_POFCON_THRESHOLD_V24 (11UL) /*!< Set threshold to 2.4 V */ +#define POWER_POFCON_THRESHOLD_V25 (12UL) /*!< Set threshold to 2.5 V */ +#define POWER_POFCON_THRESHOLD_V26 (13UL) /*!< Set threshold to 2.6 V */ +#define POWER_POFCON_THRESHOLD_V27 (14UL) /*!< Set threshold to 2.7 V */ +#define POWER_POFCON_THRESHOLD_V28 (15UL) /*!< Set threshold to 2.8 V */ + +/* Bit 0 : Enable or disable power failure warning */ +#define POWER_POFCON_POF_Pos (0UL) /*!< Position of POF field. */ +#define POWER_POFCON_POF_Msk (0x1UL << POWER_POFCON_POF_Pos) /*!< Bit mask of POF field. */ +#define POWER_POFCON_POF_Disabled (0UL) /*!< Disable */ +#define POWER_POFCON_POF_Enabled (1UL) /*!< Enable */ + +/* Register: POWER_GPREGRET */ +/* Description: General purpose retention register */ + +/* Bits 7..0 : General purpose retention register */ +#define POWER_GPREGRET_GPREGRET_Pos (0UL) /*!< Position of GPREGRET field. */ +#define POWER_GPREGRET_GPREGRET_Msk (0xFFUL << POWER_GPREGRET_GPREGRET_Pos) /*!< Bit mask of GPREGRET field. */ + +/* Register: POWER_GPREGRET2 */ +/* Description: General purpose retention register */ + +/* Bits 7..0 : General purpose retention register */ +#define POWER_GPREGRET2_GPREGRET_Pos (0UL) /*!< Position of GPREGRET field. */ +#define POWER_GPREGRET2_GPREGRET_Msk (0xFFUL << POWER_GPREGRET2_GPREGRET_Pos) /*!< Bit mask of GPREGRET field. */ + +/* Register: POWER_DCDCEN */ +/* Description: Enable DC/DC converter for REG1 stage. */ + +/* Bit 0 : Enable DC/DC converter for REG1 stage. */ +#define POWER_DCDCEN_DCDCEN_Pos (0UL) /*!< Position of DCDCEN field. */ +#define POWER_DCDCEN_DCDCEN_Msk (0x1UL << POWER_DCDCEN_DCDCEN_Pos) /*!< Bit mask of DCDCEN field. */ +#define POWER_DCDCEN_DCDCEN_Disabled (0UL) /*!< Disable */ +#define POWER_DCDCEN_DCDCEN_Enabled (1UL) /*!< Enable */ + +/* Register: POWER_DCDCEN0 */ +/* Description: Enable DC/DC converter for REG0 stage. */ + +/* Bit 0 : Enable DC/DC converter for REG0 stage. */ +#define POWER_DCDCEN0_DCDCEN_Pos (0UL) /*!< Position of DCDCEN field. */ +#define POWER_DCDCEN0_DCDCEN_Msk (0x1UL << POWER_DCDCEN0_DCDCEN_Pos) /*!< Bit mask of DCDCEN field. */ +#define POWER_DCDCEN0_DCDCEN_Disabled (0UL) /*!< Disable */ +#define POWER_DCDCEN0_DCDCEN_Enabled (1UL) /*!< Enable */ + +/* Register: POWER_MAINREGSTATUS */ +/* Description: Main supply status */ + +/* Bit 0 : Main supply status */ +#define POWER_MAINREGSTATUS_MAINREGSTATUS_Pos (0UL) /*!< Position of MAINREGSTATUS field. */ +#define POWER_MAINREGSTATUS_MAINREGSTATUS_Msk (0x1UL << POWER_MAINREGSTATUS_MAINREGSTATUS_Pos) /*!< Bit mask of MAINREGSTATUS field. */ +#define POWER_MAINREGSTATUS_MAINREGSTATUS_Normal (0UL) /*!< Normal voltage mode. Voltage supplied on VDD. */ +#define POWER_MAINREGSTATUS_MAINREGSTATUS_High (1UL) /*!< High voltage mode. Voltage supplied on VDDH. */ + +/* Register: POWER_RAM_POWER */ +/* Description: Description cluster[n]: RAMn power control register */ + +/* Bit 31 : Keep retention on RAM section S15 when RAM section is off */ +#define POWER_RAM_POWER_S15RETENTION_Pos (31UL) /*!< Position of S15RETENTION field. */ +#define POWER_RAM_POWER_S15RETENTION_Msk (0x1UL << POWER_RAM_POWER_S15RETENTION_Pos) /*!< Bit mask of S15RETENTION field. */ +#define POWER_RAM_POWER_S15RETENTION_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S15RETENTION_On (1UL) /*!< On */ + +/* Bit 30 : Keep retention on RAM section S14 when RAM section is off */ +#define POWER_RAM_POWER_S14RETENTION_Pos (30UL) /*!< Position of S14RETENTION field. */ +#define POWER_RAM_POWER_S14RETENTION_Msk (0x1UL << POWER_RAM_POWER_S14RETENTION_Pos) /*!< Bit mask of S14RETENTION field. */ +#define POWER_RAM_POWER_S14RETENTION_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S14RETENTION_On (1UL) /*!< On */ + +/* Bit 29 : Keep retention on RAM section S13 when RAM section is off */ +#define POWER_RAM_POWER_S13RETENTION_Pos (29UL) /*!< Position of S13RETENTION field. */ +#define POWER_RAM_POWER_S13RETENTION_Msk (0x1UL << POWER_RAM_POWER_S13RETENTION_Pos) /*!< Bit mask of S13RETENTION field. */ +#define POWER_RAM_POWER_S13RETENTION_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S13RETENTION_On (1UL) /*!< On */ + +/* Bit 28 : Keep retention on RAM section S12 when RAM section is off */ +#define POWER_RAM_POWER_S12RETENTION_Pos (28UL) /*!< Position of S12RETENTION field. */ +#define POWER_RAM_POWER_S12RETENTION_Msk (0x1UL << POWER_RAM_POWER_S12RETENTION_Pos) /*!< Bit mask of S12RETENTION field. */ +#define POWER_RAM_POWER_S12RETENTION_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S12RETENTION_On (1UL) /*!< On */ + +/* Bit 27 : Keep retention on RAM section S11 when RAM section is off */ +#define POWER_RAM_POWER_S11RETENTION_Pos (27UL) /*!< Position of S11RETENTION field. */ +#define POWER_RAM_POWER_S11RETENTION_Msk (0x1UL << POWER_RAM_POWER_S11RETENTION_Pos) /*!< Bit mask of S11RETENTION field. */ +#define POWER_RAM_POWER_S11RETENTION_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S11RETENTION_On (1UL) /*!< On */ + +/* Bit 26 : Keep retention on RAM section S10 when RAM section is off */ +#define POWER_RAM_POWER_S10RETENTION_Pos (26UL) /*!< Position of S10RETENTION field. */ +#define POWER_RAM_POWER_S10RETENTION_Msk (0x1UL << POWER_RAM_POWER_S10RETENTION_Pos) /*!< Bit mask of S10RETENTION field. */ +#define POWER_RAM_POWER_S10RETENTION_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S10RETENTION_On (1UL) /*!< On */ + +/* Bit 25 : Keep retention on RAM section S9 when RAM section is off */ +#define POWER_RAM_POWER_S9RETENTION_Pos (25UL) /*!< Position of S9RETENTION field. */ +#define POWER_RAM_POWER_S9RETENTION_Msk (0x1UL << POWER_RAM_POWER_S9RETENTION_Pos) /*!< Bit mask of S9RETENTION field. */ +#define POWER_RAM_POWER_S9RETENTION_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S9RETENTION_On (1UL) /*!< On */ + +/* Bit 24 : Keep retention on RAM section S8 when RAM section is off */ +#define POWER_RAM_POWER_S8RETENTION_Pos (24UL) /*!< Position of S8RETENTION field. */ +#define POWER_RAM_POWER_S8RETENTION_Msk (0x1UL << POWER_RAM_POWER_S8RETENTION_Pos) /*!< Bit mask of S8RETENTION field. */ +#define POWER_RAM_POWER_S8RETENTION_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S8RETENTION_On (1UL) /*!< On */ + +/* Bit 23 : Keep retention on RAM section S7 when RAM section is off */ +#define POWER_RAM_POWER_S7RETENTION_Pos (23UL) /*!< Position of S7RETENTION field. */ +#define POWER_RAM_POWER_S7RETENTION_Msk (0x1UL << POWER_RAM_POWER_S7RETENTION_Pos) /*!< Bit mask of S7RETENTION field. */ +#define POWER_RAM_POWER_S7RETENTION_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S7RETENTION_On (1UL) /*!< On */ + +/* Bit 22 : Keep retention on RAM section S6 when RAM section is off */ +#define POWER_RAM_POWER_S6RETENTION_Pos (22UL) /*!< Position of S6RETENTION field. */ +#define POWER_RAM_POWER_S6RETENTION_Msk (0x1UL << POWER_RAM_POWER_S6RETENTION_Pos) /*!< Bit mask of S6RETENTION field. */ +#define POWER_RAM_POWER_S6RETENTION_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S6RETENTION_On (1UL) /*!< On */ + +/* Bit 21 : Keep retention on RAM section S5 when RAM section is off */ +#define POWER_RAM_POWER_S5RETENTION_Pos (21UL) /*!< Position of S5RETENTION field. */ +#define POWER_RAM_POWER_S5RETENTION_Msk (0x1UL << POWER_RAM_POWER_S5RETENTION_Pos) /*!< Bit mask of S5RETENTION field. */ +#define POWER_RAM_POWER_S5RETENTION_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S5RETENTION_On (1UL) /*!< On */ + +/* Bit 20 : Keep retention on RAM section S4 when RAM section is off */ +#define POWER_RAM_POWER_S4RETENTION_Pos (20UL) /*!< Position of S4RETENTION field. */ +#define POWER_RAM_POWER_S4RETENTION_Msk (0x1UL << POWER_RAM_POWER_S4RETENTION_Pos) /*!< Bit mask of S4RETENTION field. */ +#define POWER_RAM_POWER_S4RETENTION_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S4RETENTION_On (1UL) /*!< On */ + +/* Bit 19 : Keep retention on RAM section S3 when RAM section is off */ +#define POWER_RAM_POWER_S3RETENTION_Pos (19UL) /*!< Position of S3RETENTION field. */ +#define POWER_RAM_POWER_S3RETENTION_Msk (0x1UL << POWER_RAM_POWER_S3RETENTION_Pos) /*!< Bit mask of S3RETENTION field. */ +#define POWER_RAM_POWER_S3RETENTION_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S3RETENTION_On (1UL) /*!< On */ + +/* Bit 18 : Keep retention on RAM section S2 when RAM section is off */ +#define POWER_RAM_POWER_S2RETENTION_Pos (18UL) /*!< Position of S2RETENTION field. */ +#define POWER_RAM_POWER_S2RETENTION_Msk (0x1UL << POWER_RAM_POWER_S2RETENTION_Pos) /*!< Bit mask of S2RETENTION field. */ +#define POWER_RAM_POWER_S2RETENTION_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S2RETENTION_On (1UL) /*!< On */ + +/* Bit 17 : Keep retention on RAM section S1 when RAM section is off */ +#define POWER_RAM_POWER_S1RETENTION_Pos (17UL) /*!< Position of S1RETENTION field. */ +#define POWER_RAM_POWER_S1RETENTION_Msk (0x1UL << POWER_RAM_POWER_S1RETENTION_Pos) /*!< Bit mask of S1RETENTION field. */ +#define POWER_RAM_POWER_S1RETENTION_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S1RETENTION_On (1UL) /*!< On */ + +/* Bit 16 : Keep retention on RAM section S0 when RAM section is off */ +#define POWER_RAM_POWER_S0RETENTION_Pos (16UL) /*!< Position of S0RETENTION field. */ +#define POWER_RAM_POWER_S0RETENTION_Msk (0x1UL << POWER_RAM_POWER_S0RETENTION_Pos) /*!< Bit mask of S0RETENTION field. */ +#define POWER_RAM_POWER_S0RETENTION_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S0RETENTION_On (1UL) /*!< On */ + +/* Bit 15 : Keep RAM section S15 on or off in System ON mode. */ +#define POWER_RAM_POWER_S15POWER_Pos (15UL) /*!< Position of S15POWER field. */ +#define POWER_RAM_POWER_S15POWER_Msk (0x1UL << POWER_RAM_POWER_S15POWER_Pos) /*!< Bit mask of S15POWER field. */ +#define POWER_RAM_POWER_S15POWER_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S15POWER_On (1UL) /*!< On */ + +/* Bit 14 : Keep RAM section S14 on or off in System ON mode. */ +#define POWER_RAM_POWER_S14POWER_Pos (14UL) /*!< Position of S14POWER field. */ +#define POWER_RAM_POWER_S14POWER_Msk (0x1UL << POWER_RAM_POWER_S14POWER_Pos) /*!< Bit mask of S14POWER field. */ +#define POWER_RAM_POWER_S14POWER_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S14POWER_On (1UL) /*!< On */ + +/* Bit 13 : Keep RAM section S13 on or off in System ON mode. */ +#define POWER_RAM_POWER_S13POWER_Pos (13UL) /*!< Position of S13POWER field. */ +#define POWER_RAM_POWER_S13POWER_Msk (0x1UL << POWER_RAM_POWER_S13POWER_Pos) /*!< Bit mask of S13POWER field. */ +#define POWER_RAM_POWER_S13POWER_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S13POWER_On (1UL) /*!< On */ + +/* Bit 12 : Keep RAM section S12 on or off in System ON mode. */ +#define POWER_RAM_POWER_S12POWER_Pos (12UL) /*!< Position of S12POWER field. */ +#define POWER_RAM_POWER_S12POWER_Msk (0x1UL << POWER_RAM_POWER_S12POWER_Pos) /*!< Bit mask of S12POWER field. */ +#define POWER_RAM_POWER_S12POWER_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S12POWER_On (1UL) /*!< On */ + +/* Bit 11 : Keep RAM section S11 on or off in System ON mode. */ +#define POWER_RAM_POWER_S11POWER_Pos (11UL) /*!< Position of S11POWER field. */ +#define POWER_RAM_POWER_S11POWER_Msk (0x1UL << POWER_RAM_POWER_S11POWER_Pos) /*!< Bit mask of S11POWER field. */ +#define POWER_RAM_POWER_S11POWER_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S11POWER_On (1UL) /*!< On */ + +/* Bit 10 : Keep RAM section S10 on or off in System ON mode. */ +#define POWER_RAM_POWER_S10POWER_Pos (10UL) /*!< Position of S10POWER field. */ +#define POWER_RAM_POWER_S10POWER_Msk (0x1UL << POWER_RAM_POWER_S10POWER_Pos) /*!< Bit mask of S10POWER field. */ +#define POWER_RAM_POWER_S10POWER_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S10POWER_On (1UL) /*!< On */ + +/* Bit 9 : Keep RAM section S9 on or off in System ON mode. */ +#define POWER_RAM_POWER_S9POWER_Pos (9UL) /*!< Position of S9POWER field. */ +#define POWER_RAM_POWER_S9POWER_Msk (0x1UL << POWER_RAM_POWER_S9POWER_Pos) /*!< Bit mask of S9POWER field. */ +#define POWER_RAM_POWER_S9POWER_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S9POWER_On (1UL) /*!< On */ + +/* Bit 8 : Keep RAM section S8 on or off in System ON mode. */ +#define POWER_RAM_POWER_S8POWER_Pos (8UL) /*!< Position of S8POWER field. */ +#define POWER_RAM_POWER_S8POWER_Msk (0x1UL << POWER_RAM_POWER_S8POWER_Pos) /*!< Bit mask of S8POWER field. */ +#define POWER_RAM_POWER_S8POWER_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S8POWER_On (1UL) /*!< On */ + +/* Bit 7 : Keep RAM section S7 on or off in System ON mode. */ +#define POWER_RAM_POWER_S7POWER_Pos (7UL) /*!< Position of S7POWER field. */ +#define POWER_RAM_POWER_S7POWER_Msk (0x1UL << POWER_RAM_POWER_S7POWER_Pos) /*!< Bit mask of S7POWER field. */ +#define POWER_RAM_POWER_S7POWER_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S7POWER_On (1UL) /*!< On */ + +/* Bit 6 : Keep RAM section S6 on or off in System ON mode. */ +#define POWER_RAM_POWER_S6POWER_Pos (6UL) /*!< Position of S6POWER field. */ +#define POWER_RAM_POWER_S6POWER_Msk (0x1UL << POWER_RAM_POWER_S6POWER_Pos) /*!< Bit mask of S6POWER field. */ +#define POWER_RAM_POWER_S6POWER_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S6POWER_On (1UL) /*!< On */ + +/* Bit 5 : Keep RAM section S5 on or off in System ON mode. */ +#define POWER_RAM_POWER_S5POWER_Pos (5UL) /*!< Position of S5POWER field. */ +#define POWER_RAM_POWER_S5POWER_Msk (0x1UL << POWER_RAM_POWER_S5POWER_Pos) /*!< Bit mask of S5POWER field. */ +#define POWER_RAM_POWER_S5POWER_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S5POWER_On (1UL) /*!< On */ + +/* Bit 4 : Keep RAM section S4 on or off in System ON mode. */ +#define POWER_RAM_POWER_S4POWER_Pos (4UL) /*!< Position of S4POWER field. */ +#define POWER_RAM_POWER_S4POWER_Msk (0x1UL << POWER_RAM_POWER_S4POWER_Pos) /*!< Bit mask of S4POWER field. */ +#define POWER_RAM_POWER_S4POWER_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S4POWER_On (1UL) /*!< On */ + +/* Bit 3 : Keep RAM section S3 on or off in System ON mode. */ +#define POWER_RAM_POWER_S3POWER_Pos (3UL) /*!< Position of S3POWER field. */ +#define POWER_RAM_POWER_S3POWER_Msk (0x1UL << POWER_RAM_POWER_S3POWER_Pos) /*!< Bit mask of S3POWER field. */ +#define POWER_RAM_POWER_S3POWER_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S3POWER_On (1UL) /*!< On */ + +/* Bit 2 : Keep RAM section S2 on or off in System ON mode. */ +#define POWER_RAM_POWER_S2POWER_Pos (2UL) /*!< Position of S2POWER field. */ +#define POWER_RAM_POWER_S2POWER_Msk (0x1UL << POWER_RAM_POWER_S2POWER_Pos) /*!< Bit mask of S2POWER field. */ +#define POWER_RAM_POWER_S2POWER_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S2POWER_On (1UL) /*!< On */ + +/* Bit 1 : Keep RAM section S1 on or off in System ON mode. */ +#define POWER_RAM_POWER_S1POWER_Pos (1UL) /*!< Position of S1POWER field. */ +#define POWER_RAM_POWER_S1POWER_Msk (0x1UL << POWER_RAM_POWER_S1POWER_Pos) /*!< Bit mask of S1POWER field. */ +#define POWER_RAM_POWER_S1POWER_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S1POWER_On (1UL) /*!< On */ + +/* Bit 0 : Keep RAM section S0 on or off in System ON mode. */ +#define POWER_RAM_POWER_S0POWER_Pos (0UL) /*!< Position of S0POWER field. */ +#define POWER_RAM_POWER_S0POWER_Msk (0x1UL << POWER_RAM_POWER_S0POWER_Pos) /*!< Bit mask of S0POWER field. */ +#define POWER_RAM_POWER_S0POWER_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S0POWER_On (1UL) /*!< On */ + +/* Register: POWER_RAM_POWERSET */ +/* Description: Description cluster[n]: RAMn power control set register */ + +/* Bit 31 : Keep retention on RAM section S15 when RAM section is switched off */ +#define POWER_RAM_POWERSET_S15RETENTION_Pos (31UL) /*!< Position of S15RETENTION field. */ +#define POWER_RAM_POWERSET_S15RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S15RETENTION_Pos) /*!< Bit mask of S15RETENTION field. */ +#define POWER_RAM_POWERSET_S15RETENTION_On (1UL) /*!< On */ + +/* Bit 30 : Keep retention on RAM section S14 when RAM section is switched off */ +#define POWER_RAM_POWERSET_S14RETENTION_Pos (30UL) /*!< Position of S14RETENTION field. */ +#define POWER_RAM_POWERSET_S14RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S14RETENTION_Pos) /*!< Bit mask of S14RETENTION field. */ +#define POWER_RAM_POWERSET_S14RETENTION_On (1UL) /*!< On */ + +/* Bit 29 : Keep retention on RAM section S13 when RAM section is switched off */ +#define POWER_RAM_POWERSET_S13RETENTION_Pos (29UL) /*!< Position of S13RETENTION field. */ +#define POWER_RAM_POWERSET_S13RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S13RETENTION_Pos) /*!< Bit mask of S13RETENTION field. */ +#define POWER_RAM_POWERSET_S13RETENTION_On (1UL) /*!< On */ + +/* Bit 28 : Keep retention on RAM section S12 when RAM section is switched off */ +#define POWER_RAM_POWERSET_S12RETENTION_Pos (28UL) /*!< Position of S12RETENTION field. */ +#define POWER_RAM_POWERSET_S12RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S12RETENTION_Pos) /*!< Bit mask of S12RETENTION field. */ +#define POWER_RAM_POWERSET_S12RETENTION_On (1UL) /*!< On */ + +/* Bit 27 : Keep retention on RAM section S11 when RAM section is switched off */ +#define POWER_RAM_POWERSET_S11RETENTION_Pos (27UL) /*!< Position of S11RETENTION field. */ +#define POWER_RAM_POWERSET_S11RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S11RETENTION_Pos) /*!< Bit mask of S11RETENTION field. */ +#define POWER_RAM_POWERSET_S11RETENTION_On (1UL) /*!< On */ + +/* Bit 26 : Keep retention on RAM section S10 when RAM section is switched off */ +#define POWER_RAM_POWERSET_S10RETENTION_Pos (26UL) /*!< Position of S10RETENTION field. */ +#define POWER_RAM_POWERSET_S10RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S10RETENTION_Pos) /*!< Bit mask of S10RETENTION field. */ +#define POWER_RAM_POWERSET_S10RETENTION_On (1UL) /*!< On */ + +/* Bit 25 : Keep retention on RAM section S9 when RAM section is switched off */ +#define POWER_RAM_POWERSET_S9RETENTION_Pos (25UL) /*!< Position of S9RETENTION field. */ +#define POWER_RAM_POWERSET_S9RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S9RETENTION_Pos) /*!< Bit mask of S9RETENTION field. */ +#define POWER_RAM_POWERSET_S9RETENTION_On (1UL) /*!< On */ + +/* Bit 24 : Keep retention on RAM section S8 when RAM section is switched off */ +#define POWER_RAM_POWERSET_S8RETENTION_Pos (24UL) /*!< Position of S8RETENTION field. */ +#define POWER_RAM_POWERSET_S8RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S8RETENTION_Pos) /*!< Bit mask of S8RETENTION field. */ +#define POWER_RAM_POWERSET_S8RETENTION_On (1UL) /*!< On */ + +/* Bit 23 : Keep retention on RAM section S7 when RAM section is switched off */ +#define POWER_RAM_POWERSET_S7RETENTION_Pos (23UL) /*!< Position of S7RETENTION field. */ +#define POWER_RAM_POWERSET_S7RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S7RETENTION_Pos) /*!< Bit mask of S7RETENTION field. */ +#define POWER_RAM_POWERSET_S7RETENTION_On (1UL) /*!< On */ + +/* Bit 22 : Keep retention on RAM section S6 when RAM section is switched off */ +#define POWER_RAM_POWERSET_S6RETENTION_Pos (22UL) /*!< Position of S6RETENTION field. */ +#define POWER_RAM_POWERSET_S6RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S6RETENTION_Pos) /*!< Bit mask of S6RETENTION field. */ +#define POWER_RAM_POWERSET_S6RETENTION_On (1UL) /*!< On */ + +/* Bit 21 : Keep retention on RAM section S5 when RAM section is switched off */ +#define POWER_RAM_POWERSET_S5RETENTION_Pos (21UL) /*!< Position of S5RETENTION field. */ +#define POWER_RAM_POWERSET_S5RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S5RETENTION_Pos) /*!< Bit mask of S5RETENTION field. */ +#define POWER_RAM_POWERSET_S5RETENTION_On (1UL) /*!< On */ + +/* Bit 20 : Keep retention on RAM section S4 when RAM section is switched off */ +#define POWER_RAM_POWERSET_S4RETENTION_Pos (20UL) /*!< Position of S4RETENTION field. */ +#define POWER_RAM_POWERSET_S4RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S4RETENTION_Pos) /*!< Bit mask of S4RETENTION field. */ +#define POWER_RAM_POWERSET_S4RETENTION_On (1UL) /*!< On */ + +/* Bit 19 : Keep retention on RAM section S3 when RAM section is switched off */ +#define POWER_RAM_POWERSET_S3RETENTION_Pos (19UL) /*!< Position of S3RETENTION field. */ +#define POWER_RAM_POWERSET_S3RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S3RETENTION_Pos) /*!< Bit mask of S3RETENTION field. */ +#define POWER_RAM_POWERSET_S3RETENTION_On (1UL) /*!< On */ + +/* Bit 18 : Keep retention on RAM section S2 when RAM section is switched off */ +#define POWER_RAM_POWERSET_S2RETENTION_Pos (18UL) /*!< Position of S2RETENTION field. */ +#define POWER_RAM_POWERSET_S2RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S2RETENTION_Pos) /*!< Bit mask of S2RETENTION field. */ +#define POWER_RAM_POWERSET_S2RETENTION_On (1UL) /*!< On */ + +/* Bit 17 : Keep retention on RAM section S1 when RAM section is switched off */ +#define POWER_RAM_POWERSET_S1RETENTION_Pos (17UL) /*!< Position of S1RETENTION field. */ +#define POWER_RAM_POWERSET_S1RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S1RETENTION_Pos) /*!< Bit mask of S1RETENTION field. */ +#define POWER_RAM_POWERSET_S1RETENTION_On (1UL) /*!< On */ + +/* Bit 16 : Keep retention on RAM section S0 when RAM section is switched off */ +#define POWER_RAM_POWERSET_S0RETENTION_Pos (16UL) /*!< Position of S0RETENTION field. */ +#define POWER_RAM_POWERSET_S0RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S0RETENTION_Pos) /*!< Bit mask of S0RETENTION field. */ +#define POWER_RAM_POWERSET_S0RETENTION_On (1UL) /*!< On */ + +/* Bit 15 : Keep RAM section S15 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERSET_S15POWER_Pos (15UL) /*!< Position of S15POWER field. */ +#define POWER_RAM_POWERSET_S15POWER_Msk (0x1UL << POWER_RAM_POWERSET_S15POWER_Pos) /*!< Bit mask of S15POWER field. */ +#define POWER_RAM_POWERSET_S15POWER_On (1UL) /*!< On */ + +/* Bit 14 : Keep RAM section S14 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERSET_S14POWER_Pos (14UL) /*!< Position of S14POWER field. */ +#define POWER_RAM_POWERSET_S14POWER_Msk (0x1UL << POWER_RAM_POWERSET_S14POWER_Pos) /*!< Bit mask of S14POWER field. */ +#define POWER_RAM_POWERSET_S14POWER_On (1UL) /*!< On */ + +/* Bit 13 : Keep RAM section S13 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERSET_S13POWER_Pos (13UL) /*!< Position of S13POWER field. */ +#define POWER_RAM_POWERSET_S13POWER_Msk (0x1UL << POWER_RAM_POWERSET_S13POWER_Pos) /*!< Bit mask of S13POWER field. */ +#define POWER_RAM_POWERSET_S13POWER_On (1UL) /*!< On */ + +/* Bit 12 : Keep RAM section S12 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERSET_S12POWER_Pos (12UL) /*!< Position of S12POWER field. */ +#define POWER_RAM_POWERSET_S12POWER_Msk (0x1UL << POWER_RAM_POWERSET_S12POWER_Pos) /*!< Bit mask of S12POWER field. */ +#define POWER_RAM_POWERSET_S12POWER_On (1UL) /*!< On */ + +/* Bit 11 : Keep RAM section S11 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERSET_S11POWER_Pos (11UL) /*!< Position of S11POWER field. */ +#define POWER_RAM_POWERSET_S11POWER_Msk (0x1UL << POWER_RAM_POWERSET_S11POWER_Pos) /*!< Bit mask of S11POWER field. */ +#define POWER_RAM_POWERSET_S11POWER_On (1UL) /*!< On */ + +/* Bit 10 : Keep RAM section S10 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERSET_S10POWER_Pos (10UL) /*!< Position of S10POWER field. */ +#define POWER_RAM_POWERSET_S10POWER_Msk (0x1UL << POWER_RAM_POWERSET_S10POWER_Pos) /*!< Bit mask of S10POWER field. */ +#define POWER_RAM_POWERSET_S10POWER_On (1UL) /*!< On */ + +/* Bit 9 : Keep RAM section S9 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERSET_S9POWER_Pos (9UL) /*!< Position of S9POWER field. */ +#define POWER_RAM_POWERSET_S9POWER_Msk (0x1UL << POWER_RAM_POWERSET_S9POWER_Pos) /*!< Bit mask of S9POWER field. */ +#define POWER_RAM_POWERSET_S9POWER_On (1UL) /*!< On */ + +/* Bit 8 : Keep RAM section S8 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERSET_S8POWER_Pos (8UL) /*!< Position of S8POWER field. */ +#define POWER_RAM_POWERSET_S8POWER_Msk (0x1UL << POWER_RAM_POWERSET_S8POWER_Pos) /*!< Bit mask of S8POWER field. */ +#define POWER_RAM_POWERSET_S8POWER_On (1UL) /*!< On */ + +/* Bit 7 : Keep RAM section S7 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERSET_S7POWER_Pos (7UL) /*!< Position of S7POWER field. */ +#define POWER_RAM_POWERSET_S7POWER_Msk (0x1UL << POWER_RAM_POWERSET_S7POWER_Pos) /*!< Bit mask of S7POWER field. */ +#define POWER_RAM_POWERSET_S7POWER_On (1UL) /*!< On */ + +/* Bit 6 : Keep RAM section S6 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERSET_S6POWER_Pos (6UL) /*!< Position of S6POWER field. */ +#define POWER_RAM_POWERSET_S6POWER_Msk (0x1UL << POWER_RAM_POWERSET_S6POWER_Pos) /*!< Bit mask of S6POWER field. */ +#define POWER_RAM_POWERSET_S6POWER_On (1UL) /*!< On */ + +/* Bit 5 : Keep RAM section S5 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERSET_S5POWER_Pos (5UL) /*!< Position of S5POWER field. */ +#define POWER_RAM_POWERSET_S5POWER_Msk (0x1UL << POWER_RAM_POWERSET_S5POWER_Pos) /*!< Bit mask of S5POWER field. */ +#define POWER_RAM_POWERSET_S5POWER_On (1UL) /*!< On */ + +/* Bit 4 : Keep RAM section S4 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERSET_S4POWER_Pos (4UL) /*!< Position of S4POWER field. */ +#define POWER_RAM_POWERSET_S4POWER_Msk (0x1UL << POWER_RAM_POWERSET_S4POWER_Pos) /*!< Bit mask of S4POWER field. */ +#define POWER_RAM_POWERSET_S4POWER_On (1UL) /*!< On */ + +/* Bit 3 : Keep RAM section S3 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERSET_S3POWER_Pos (3UL) /*!< Position of S3POWER field. */ +#define POWER_RAM_POWERSET_S3POWER_Msk (0x1UL << POWER_RAM_POWERSET_S3POWER_Pos) /*!< Bit mask of S3POWER field. */ +#define POWER_RAM_POWERSET_S3POWER_On (1UL) /*!< On */ + +/* Bit 2 : Keep RAM section S2 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERSET_S2POWER_Pos (2UL) /*!< Position of S2POWER field. */ +#define POWER_RAM_POWERSET_S2POWER_Msk (0x1UL << POWER_RAM_POWERSET_S2POWER_Pos) /*!< Bit mask of S2POWER field. */ +#define POWER_RAM_POWERSET_S2POWER_On (1UL) /*!< On */ + +/* Bit 1 : Keep RAM section S1 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERSET_S1POWER_Pos (1UL) /*!< Position of S1POWER field. */ +#define POWER_RAM_POWERSET_S1POWER_Msk (0x1UL << POWER_RAM_POWERSET_S1POWER_Pos) /*!< Bit mask of S1POWER field. */ +#define POWER_RAM_POWERSET_S1POWER_On (1UL) /*!< On */ + +/* Bit 0 : Keep RAM section S0 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERSET_S0POWER_Pos (0UL) /*!< Position of S0POWER field. */ +#define POWER_RAM_POWERSET_S0POWER_Msk (0x1UL << POWER_RAM_POWERSET_S0POWER_Pos) /*!< Bit mask of S0POWER field. */ +#define POWER_RAM_POWERSET_S0POWER_On (1UL) /*!< On */ + +/* Register: POWER_RAM_POWERCLR */ +/* Description: Description cluster[n]: RAMn power control clear register */ + +/* Bit 31 : Keep retention on RAM section S15 when RAM section is switched off */ +#define POWER_RAM_POWERCLR_S15RETENTION_Pos (31UL) /*!< Position of S15RETENTION field. */ +#define POWER_RAM_POWERCLR_S15RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S15RETENTION_Pos) /*!< Bit mask of S15RETENTION field. */ +#define POWER_RAM_POWERCLR_S15RETENTION_Off (1UL) /*!< Off */ + +/* Bit 30 : Keep retention on RAM section S14 when RAM section is switched off */ +#define POWER_RAM_POWERCLR_S14RETENTION_Pos (30UL) /*!< Position of S14RETENTION field. */ +#define POWER_RAM_POWERCLR_S14RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S14RETENTION_Pos) /*!< Bit mask of S14RETENTION field. */ +#define POWER_RAM_POWERCLR_S14RETENTION_Off (1UL) /*!< Off */ + +/* Bit 29 : Keep retention on RAM section S13 when RAM section is switched off */ +#define POWER_RAM_POWERCLR_S13RETENTION_Pos (29UL) /*!< Position of S13RETENTION field. */ +#define POWER_RAM_POWERCLR_S13RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S13RETENTION_Pos) /*!< Bit mask of S13RETENTION field. */ +#define POWER_RAM_POWERCLR_S13RETENTION_Off (1UL) /*!< Off */ + +/* Bit 28 : Keep retention on RAM section S12 when RAM section is switched off */ +#define POWER_RAM_POWERCLR_S12RETENTION_Pos (28UL) /*!< Position of S12RETENTION field. */ +#define POWER_RAM_POWERCLR_S12RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S12RETENTION_Pos) /*!< Bit mask of S12RETENTION field. */ +#define POWER_RAM_POWERCLR_S12RETENTION_Off (1UL) /*!< Off */ + +/* Bit 27 : Keep retention on RAM section S11 when RAM section is switched off */ +#define POWER_RAM_POWERCLR_S11RETENTION_Pos (27UL) /*!< Position of S11RETENTION field. */ +#define POWER_RAM_POWERCLR_S11RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S11RETENTION_Pos) /*!< Bit mask of S11RETENTION field. */ +#define POWER_RAM_POWERCLR_S11RETENTION_Off (1UL) /*!< Off */ + +/* Bit 26 : Keep retention on RAM section S10 when RAM section is switched off */ +#define POWER_RAM_POWERCLR_S10RETENTION_Pos (26UL) /*!< Position of S10RETENTION field. */ +#define POWER_RAM_POWERCLR_S10RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S10RETENTION_Pos) /*!< Bit mask of S10RETENTION field. */ +#define POWER_RAM_POWERCLR_S10RETENTION_Off (1UL) /*!< Off */ + +/* Bit 25 : Keep retention on RAM section S9 when RAM section is switched off */ +#define POWER_RAM_POWERCLR_S9RETENTION_Pos (25UL) /*!< Position of S9RETENTION field. */ +#define POWER_RAM_POWERCLR_S9RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S9RETENTION_Pos) /*!< Bit mask of S9RETENTION field. */ +#define POWER_RAM_POWERCLR_S9RETENTION_Off (1UL) /*!< Off */ + +/* Bit 24 : Keep retention on RAM section S8 when RAM section is switched off */ +#define POWER_RAM_POWERCLR_S8RETENTION_Pos (24UL) /*!< Position of S8RETENTION field. */ +#define POWER_RAM_POWERCLR_S8RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S8RETENTION_Pos) /*!< Bit mask of S8RETENTION field. */ +#define POWER_RAM_POWERCLR_S8RETENTION_Off (1UL) /*!< Off */ + +/* Bit 23 : Keep retention on RAM section S7 when RAM section is switched off */ +#define POWER_RAM_POWERCLR_S7RETENTION_Pos (23UL) /*!< Position of S7RETENTION field. */ +#define POWER_RAM_POWERCLR_S7RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S7RETENTION_Pos) /*!< Bit mask of S7RETENTION field. */ +#define POWER_RAM_POWERCLR_S7RETENTION_Off (1UL) /*!< Off */ + +/* Bit 22 : Keep retention on RAM section S6 when RAM section is switched off */ +#define POWER_RAM_POWERCLR_S6RETENTION_Pos (22UL) /*!< Position of S6RETENTION field. */ +#define POWER_RAM_POWERCLR_S6RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S6RETENTION_Pos) /*!< Bit mask of S6RETENTION field. */ +#define POWER_RAM_POWERCLR_S6RETENTION_Off (1UL) /*!< Off */ + +/* Bit 21 : Keep retention on RAM section S5 when RAM section is switched off */ +#define POWER_RAM_POWERCLR_S5RETENTION_Pos (21UL) /*!< Position of S5RETENTION field. */ +#define POWER_RAM_POWERCLR_S5RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S5RETENTION_Pos) /*!< Bit mask of S5RETENTION field. */ +#define POWER_RAM_POWERCLR_S5RETENTION_Off (1UL) /*!< Off */ + +/* Bit 20 : Keep retention on RAM section S4 when RAM section is switched off */ +#define POWER_RAM_POWERCLR_S4RETENTION_Pos (20UL) /*!< Position of S4RETENTION field. */ +#define POWER_RAM_POWERCLR_S4RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S4RETENTION_Pos) /*!< Bit mask of S4RETENTION field. */ +#define POWER_RAM_POWERCLR_S4RETENTION_Off (1UL) /*!< Off */ + +/* Bit 19 : Keep retention on RAM section S3 when RAM section is switched off */ +#define POWER_RAM_POWERCLR_S3RETENTION_Pos (19UL) /*!< Position of S3RETENTION field. */ +#define POWER_RAM_POWERCLR_S3RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S3RETENTION_Pos) /*!< Bit mask of S3RETENTION field. */ +#define POWER_RAM_POWERCLR_S3RETENTION_Off (1UL) /*!< Off */ + +/* Bit 18 : Keep retention on RAM section S2 when RAM section is switched off */ +#define POWER_RAM_POWERCLR_S2RETENTION_Pos (18UL) /*!< Position of S2RETENTION field. */ +#define POWER_RAM_POWERCLR_S2RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S2RETENTION_Pos) /*!< Bit mask of S2RETENTION field. */ +#define POWER_RAM_POWERCLR_S2RETENTION_Off (1UL) /*!< Off */ + +/* Bit 17 : Keep retention on RAM section S1 when RAM section is switched off */ +#define POWER_RAM_POWERCLR_S1RETENTION_Pos (17UL) /*!< Position of S1RETENTION field. */ +#define POWER_RAM_POWERCLR_S1RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S1RETENTION_Pos) /*!< Bit mask of S1RETENTION field. */ +#define POWER_RAM_POWERCLR_S1RETENTION_Off (1UL) /*!< Off */ + +/* Bit 16 : Keep retention on RAM section S0 when RAM section is switched off */ +#define POWER_RAM_POWERCLR_S0RETENTION_Pos (16UL) /*!< Position of S0RETENTION field. */ +#define POWER_RAM_POWERCLR_S0RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S0RETENTION_Pos) /*!< Bit mask of S0RETENTION field. */ +#define POWER_RAM_POWERCLR_S0RETENTION_Off (1UL) /*!< Off */ + +/* Bit 15 : Keep RAM section S15 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERCLR_S15POWER_Pos (15UL) /*!< Position of S15POWER field. */ +#define POWER_RAM_POWERCLR_S15POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S15POWER_Pos) /*!< Bit mask of S15POWER field. */ +#define POWER_RAM_POWERCLR_S15POWER_Off (1UL) /*!< Off */ + +/* Bit 14 : Keep RAM section S14 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERCLR_S14POWER_Pos (14UL) /*!< Position of S14POWER field. */ +#define POWER_RAM_POWERCLR_S14POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S14POWER_Pos) /*!< Bit mask of S14POWER field. */ +#define POWER_RAM_POWERCLR_S14POWER_Off (1UL) /*!< Off */ + +/* Bit 13 : Keep RAM section S13 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERCLR_S13POWER_Pos (13UL) /*!< Position of S13POWER field. */ +#define POWER_RAM_POWERCLR_S13POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S13POWER_Pos) /*!< Bit mask of S13POWER field. */ +#define POWER_RAM_POWERCLR_S13POWER_Off (1UL) /*!< Off */ + +/* Bit 12 : Keep RAM section S12 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERCLR_S12POWER_Pos (12UL) /*!< Position of S12POWER field. */ +#define POWER_RAM_POWERCLR_S12POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S12POWER_Pos) /*!< Bit mask of S12POWER field. */ +#define POWER_RAM_POWERCLR_S12POWER_Off (1UL) /*!< Off */ + +/* Bit 11 : Keep RAM section S11 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERCLR_S11POWER_Pos (11UL) /*!< Position of S11POWER field. */ +#define POWER_RAM_POWERCLR_S11POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S11POWER_Pos) /*!< Bit mask of S11POWER field. */ +#define POWER_RAM_POWERCLR_S11POWER_Off (1UL) /*!< Off */ + +/* Bit 10 : Keep RAM section S10 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERCLR_S10POWER_Pos (10UL) /*!< Position of S10POWER field. */ +#define POWER_RAM_POWERCLR_S10POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S10POWER_Pos) /*!< Bit mask of S10POWER field. */ +#define POWER_RAM_POWERCLR_S10POWER_Off (1UL) /*!< Off */ + +/* Bit 9 : Keep RAM section S9 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERCLR_S9POWER_Pos (9UL) /*!< Position of S9POWER field. */ +#define POWER_RAM_POWERCLR_S9POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S9POWER_Pos) /*!< Bit mask of S9POWER field. */ +#define POWER_RAM_POWERCLR_S9POWER_Off (1UL) /*!< Off */ + +/* Bit 8 : Keep RAM section S8 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERCLR_S8POWER_Pos (8UL) /*!< Position of S8POWER field. */ +#define POWER_RAM_POWERCLR_S8POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S8POWER_Pos) /*!< Bit mask of S8POWER field. */ +#define POWER_RAM_POWERCLR_S8POWER_Off (1UL) /*!< Off */ + +/* Bit 7 : Keep RAM section S7 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERCLR_S7POWER_Pos (7UL) /*!< Position of S7POWER field. */ +#define POWER_RAM_POWERCLR_S7POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S7POWER_Pos) /*!< Bit mask of S7POWER field. */ +#define POWER_RAM_POWERCLR_S7POWER_Off (1UL) /*!< Off */ + +/* Bit 6 : Keep RAM section S6 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERCLR_S6POWER_Pos (6UL) /*!< Position of S6POWER field. */ +#define POWER_RAM_POWERCLR_S6POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S6POWER_Pos) /*!< Bit mask of S6POWER field. */ +#define POWER_RAM_POWERCLR_S6POWER_Off (1UL) /*!< Off */ + +/* Bit 5 : Keep RAM section S5 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERCLR_S5POWER_Pos (5UL) /*!< Position of S5POWER field. */ +#define POWER_RAM_POWERCLR_S5POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S5POWER_Pos) /*!< Bit mask of S5POWER field. */ +#define POWER_RAM_POWERCLR_S5POWER_Off (1UL) /*!< Off */ + +/* Bit 4 : Keep RAM section S4 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERCLR_S4POWER_Pos (4UL) /*!< Position of S4POWER field. */ +#define POWER_RAM_POWERCLR_S4POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S4POWER_Pos) /*!< Bit mask of S4POWER field. */ +#define POWER_RAM_POWERCLR_S4POWER_Off (1UL) /*!< Off */ + +/* Bit 3 : Keep RAM section S3 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERCLR_S3POWER_Pos (3UL) /*!< Position of S3POWER field. */ +#define POWER_RAM_POWERCLR_S3POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S3POWER_Pos) /*!< Bit mask of S3POWER field. */ +#define POWER_RAM_POWERCLR_S3POWER_Off (1UL) /*!< Off */ + +/* Bit 2 : Keep RAM section S2 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERCLR_S2POWER_Pos (2UL) /*!< Position of S2POWER field. */ +#define POWER_RAM_POWERCLR_S2POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S2POWER_Pos) /*!< Bit mask of S2POWER field. */ +#define POWER_RAM_POWERCLR_S2POWER_Off (1UL) /*!< Off */ + +/* Bit 1 : Keep RAM section S1 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERCLR_S1POWER_Pos (1UL) /*!< Position of S1POWER field. */ +#define POWER_RAM_POWERCLR_S1POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S1POWER_Pos) /*!< Bit mask of S1POWER field. */ +#define POWER_RAM_POWERCLR_S1POWER_Off (1UL) /*!< Off */ + +/* Bit 0 : Keep RAM section S0 of RAMn on or off in System ON mode */ +#define POWER_RAM_POWERCLR_S0POWER_Pos (0UL) /*!< Position of S0POWER field. */ +#define POWER_RAM_POWERCLR_S0POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S0POWER_Pos) /*!< Bit mask of S0POWER field. */ +#define POWER_RAM_POWERCLR_S0POWER_Off (1UL) /*!< Off */ + + +/* Peripheral: PPI */ +/* Description: Programmable Peripheral Interconnect */ + +/* Register: PPI_TASKS_CHG_EN */ +/* Description: Description cluster[n]: Enable channel group n */ + +/* Bit 0 : */ +#define PPI_TASKS_CHG_EN_EN_Pos (0UL) /*!< Position of EN field. */ +#define PPI_TASKS_CHG_EN_EN_Msk (0x1UL << PPI_TASKS_CHG_EN_EN_Pos) /*!< Bit mask of EN field. */ + +/* Register: PPI_TASKS_CHG_DIS */ +/* Description: Description cluster[n]: Disable channel group n */ + +/* Bit 0 : */ +#define PPI_TASKS_CHG_DIS_DIS_Pos (0UL) /*!< Position of DIS field. */ +#define PPI_TASKS_CHG_DIS_DIS_Msk (0x1UL << PPI_TASKS_CHG_DIS_DIS_Pos) /*!< Bit mask of DIS field. */ + +/* Register: PPI_CHEN */ +/* Description: Channel enable register */ + +/* Bit 31 : Enable or disable channel 31 */ +#define PPI_CHEN_CH31_Pos (31UL) /*!< Position of CH31 field. */ +#define PPI_CHEN_CH31_Msk (0x1UL << PPI_CHEN_CH31_Pos) /*!< Bit mask of CH31 field. */ +#define PPI_CHEN_CH31_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH31_Enabled (1UL) /*!< Enable channel */ + +/* Bit 30 : Enable or disable channel 30 */ +#define PPI_CHEN_CH30_Pos (30UL) /*!< Position of CH30 field. */ +#define PPI_CHEN_CH30_Msk (0x1UL << PPI_CHEN_CH30_Pos) /*!< Bit mask of CH30 field. */ +#define PPI_CHEN_CH30_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH30_Enabled (1UL) /*!< Enable channel */ + +/* Bit 29 : Enable or disable channel 29 */ +#define PPI_CHEN_CH29_Pos (29UL) /*!< Position of CH29 field. */ +#define PPI_CHEN_CH29_Msk (0x1UL << PPI_CHEN_CH29_Pos) /*!< Bit mask of CH29 field. */ +#define PPI_CHEN_CH29_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH29_Enabled (1UL) /*!< Enable channel */ + +/* Bit 28 : Enable or disable channel 28 */ +#define PPI_CHEN_CH28_Pos (28UL) /*!< Position of CH28 field. */ +#define PPI_CHEN_CH28_Msk (0x1UL << PPI_CHEN_CH28_Pos) /*!< Bit mask of CH28 field. */ +#define PPI_CHEN_CH28_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH28_Enabled (1UL) /*!< Enable channel */ + +/* Bit 27 : Enable or disable channel 27 */ +#define PPI_CHEN_CH27_Pos (27UL) /*!< Position of CH27 field. */ +#define PPI_CHEN_CH27_Msk (0x1UL << PPI_CHEN_CH27_Pos) /*!< Bit mask of CH27 field. */ +#define PPI_CHEN_CH27_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH27_Enabled (1UL) /*!< Enable channel */ + +/* Bit 26 : Enable or disable channel 26 */ +#define PPI_CHEN_CH26_Pos (26UL) /*!< Position of CH26 field. */ +#define PPI_CHEN_CH26_Msk (0x1UL << PPI_CHEN_CH26_Pos) /*!< Bit mask of CH26 field. */ +#define PPI_CHEN_CH26_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH26_Enabled (1UL) /*!< Enable channel */ + +/* Bit 25 : Enable or disable channel 25 */ +#define PPI_CHEN_CH25_Pos (25UL) /*!< Position of CH25 field. */ +#define PPI_CHEN_CH25_Msk (0x1UL << PPI_CHEN_CH25_Pos) /*!< Bit mask of CH25 field. */ +#define PPI_CHEN_CH25_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH25_Enabled (1UL) /*!< Enable channel */ + +/* Bit 24 : Enable or disable channel 24 */ +#define PPI_CHEN_CH24_Pos (24UL) /*!< Position of CH24 field. */ +#define PPI_CHEN_CH24_Msk (0x1UL << PPI_CHEN_CH24_Pos) /*!< Bit mask of CH24 field. */ +#define PPI_CHEN_CH24_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH24_Enabled (1UL) /*!< Enable channel */ + +/* Bit 23 : Enable or disable channel 23 */ +#define PPI_CHEN_CH23_Pos (23UL) /*!< Position of CH23 field. */ +#define PPI_CHEN_CH23_Msk (0x1UL << PPI_CHEN_CH23_Pos) /*!< Bit mask of CH23 field. */ +#define PPI_CHEN_CH23_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH23_Enabled (1UL) /*!< Enable channel */ + +/* Bit 22 : Enable or disable channel 22 */ +#define PPI_CHEN_CH22_Pos (22UL) /*!< Position of CH22 field. */ +#define PPI_CHEN_CH22_Msk (0x1UL << PPI_CHEN_CH22_Pos) /*!< Bit mask of CH22 field. */ +#define PPI_CHEN_CH22_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH22_Enabled (1UL) /*!< Enable channel */ + +/* Bit 21 : Enable or disable channel 21 */ +#define PPI_CHEN_CH21_Pos (21UL) /*!< Position of CH21 field. */ +#define PPI_CHEN_CH21_Msk (0x1UL << PPI_CHEN_CH21_Pos) /*!< Bit mask of CH21 field. */ +#define PPI_CHEN_CH21_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH21_Enabled (1UL) /*!< Enable channel */ + +/* Bit 20 : Enable or disable channel 20 */ +#define PPI_CHEN_CH20_Pos (20UL) /*!< Position of CH20 field. */ +#define PPI_CHEN_CH20_Msk (0x1UL << PPI_CHEN_CH20_Pos) /*!< Bit mask of CH20 field. */ +#define PPI_CHEN_CH20_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH20_Enabled (1UL) /*!< Enable channel */ + +/* Bit 19 : Enable or disable channel 19 */ +#define PPI_CHEN_CH19_Pos (19UL) /*!< Position of CH19 field. */ +#define PPI_CHEN_CH19_Msk (0x1UL << PPI_CHEN_CH19_Pos) /*!< Bit mask of CH19 field. */ +#define PPI_CHEN_CH19_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH19_Enabled (1UL) /*!< Enable channel */ + +/* Bit 18 : Enable or disable channel 18 */ +#define PPI_CHEN_CH18_Pos (18UL) /*!< Position of CH18 field. */ +#define PPI_CHEN_CH18_Msk (0x1UL << PPI_CHEN_CH18_Pos) /*!< Bit mask of CH18 field. */ +#define PPI_CHEN_CH18_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH18_Enabled (1UL) /*!< Enable channel */ + +/* Bit 17 : Enable or disable channel 17 */ +#define PPI_CHEN_CH17_Pos (17UL) /*!< Position of CH17 field. */ +#define PPI_CHEN_CH17_Msk (0x1UL << PPI_CHEN_CH17_Pos) /*!< Bit mask of CH17 field. */ +#define PPI_CHEN_CH17_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH17_Enabled (1UL) /*!< Enable channel */ + +/* Bit 16 : Enable or disable channel 16 */ +#define PPI_CHEN_CH16_Pos (16UL) /*!< Position of CH16 field. */ +#define PPI_CHEN_CH16_Msk (0x1UL << PPI_CHEN_CH16_Pos) /*!< Bit mask of CH16 field. */ +#define PPI_CHEN_CH16_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH16_Enabled (1UL) /*!< Enable channel */ + +/* Bit 15 : Enable or disable channel 15 */ +#define PPI_CHEN_CH15_Pos (15UL) /*!< Position of CH15 field. */ +#define PPI_CHEN_CH15_Msk (0x1UL << PPI_CHEN_CH15_Pos) /*!< Bit mask of CH15 field. */ +#define PPI_CHEN_CH15_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH15_Enabled (1UL) /*!< Enable channel */ + +/* Bit 14 : Enable or disable channel 14 */ +#define PPI_CHEN_CH14_Pos (14UL) /*!< Position of CH14 field. */ +#define PPI_CHEN_CH14_Msk (0x1UL << PPI_CHEN_CH14_Pos) /*!< Bit mask of CH14 field. */ +#define PPI_CHEN_CH14_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH14_Enabled (1UL) /*!< Enable channel */ + +/* Bit 13 : Enable or disable channel 13 */ +#define PPI_CHEN_CH13_Pos (13UL) /*!< Position of CH13 field. */ +#define PPI_CHEN_CH13_Msk (0x1UL << PPI_CHEN_CH13_Pos) /*!< Bit mask of CH13 field. */ +#define PPI_CHEN_CH13_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH13_Enabled (1UL) /*!< Enable channel */ + +/* Bit 12 : Enable or disable channel 12 */ +#define PPI_CHEN_CH12_Pos (12UL) /*!< Position of CH12 field. */ +#define PPI_CHEN_CH12_Msk (0x1UL << PPI_CHEN_CH12_Pos) /*!< Bit mask of CH12 field. */ +#define PPI_CHEN_CH12_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH12_Enabled (1UL) /*!< Enable channel */ + +/* Bit 11 : Enable or disable channel 11 */ +#define PPI_CHEN_CH11_Pos (11UL) /*!< Position of CH11 field. */ +#define PPI_CHEN_CH11_Msk (0x1UL << PPI_CHEN_CH11_Pos) /*!< Bit mask of CH11 field. */ +#define PPI_CHEN_CH11_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH11_Enabled (1UL) /*!< Enable channel */ + +/* Bit 10 : Enable or disable channel 10 */ +#define PPI_CHEN_CH10_Pos (10UL) /*!< Position of CH10 field. */ +#define PPI_CHEN_CH10_Msk (0x1UL << PPI_CHEN_CH10_Pos) /*!< Bit mask of CH10 field. */ +#define PPI_CHEN_CH10_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH10_Enabled (1UL) /*!< Enable channel */ + +/* Bit 9 : Enable or disable channel 9 */ +#define PPI_CHEN_CH9_Pos (9UL) /*!< Position of CH9 field. */ +#define PPI_CHEN_CH9_Msk (0x1UL << PPI_CHEN_CH9_Pos) /*!< Bit mask of CH9 field. */ +#define PPI_CHEN_CH9_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH9_Enabled (1UL) /*!< Enable channel */ + +/* Bit 8 : Enable or disable channel 8 */ +#define PPI_CHEN_CH8_Pos (8UL) /*!< Position of CH8 field. */ +#define PPI_CHEN_CH8_Msk (0x1UL << PPI_CHEN_CH8_Pos) /*!< Bit mask of CH8 field. */ +#define PPI_CHEN_CH8_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH8_Enabled (1UL) /*!< Enable channel */ + +/* Bit 7 : Enable or disable channel 7 */ +#define PPI_CHEN_CH7_Pos (7UL) /*!< Position of CH7 field. */ +#define PPI_CHEN_CH7_Msk (0x1UL << PPI_CHEN_CH7_Pos) /*!< Bit mask of CH7 field. */ +#define PPI_CHEN_CH7_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH7_Enabled (1UL) /*!< Enable channel */ + +/* Bit 6 : Enable or disable channel 6 */ +#define PPI_CHEN_CH6_Pos (6UL) /*!< Position of CH6 field. */ +#define PPI_CHEN_CH6_Msk (0x1UL << PPI_CHEN_CH6_Pos) /*!< Bit mask of CH6 field. */ +#define PPI_CHEN_CH6_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH6_Enabled (1UL) /*!< Enable channel */ + +/* Bit 5 : Enable or disable channel 5 */ +#define PPI_CHEN_CH5_Pos (5UL) /*!< Position of CH5 field. */ +#define PPI_CHEN_CH5_Msk (0x1UL << PPI_CHEN_CH5_Pos) /*!< Bit mask of CH5 field. */ +#define PPI_CHEN_CH5_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH5_Enabled (1UL) /*!< Enable channel */ + +/* Bit 4 : Enable or disable channel 4 */ +#define PPI_CHEN_CH4_Pos (4UL) /*!< Position of CH4 field. */ +#define PPI_CHEN_CH4_Msk (0x1UL << PPI_CHEN_CH4_Pos) /*!< Bit mask of CH4 field. */ +#define PPI_CHEN_CH4_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH4_Enabled (1UL) /*!< Enable channel */ + +/* Bit 3 : Enable or disable channel 3 */ +#define PPI_CHEN_CH3_Pos (3UL) /*!< Position of CH3 field. */ +#define PPI_CHEN_CH3_Msk (0x1UL << PPI_CHEN_CH3_Pos) /*!< Bit mask of CH3 field. */ +#define PPI_CHEN_CH3_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH3_Enabled (1UL) /*!< Enable channel */ + +/* Bit 2 : Enable or disable channel 2 */ +#define PPI_CHEN_CH2_Pos (2UL) /*!< Position of CH2 field. */ +#define PPI_CHEN_CH2_Msk (0x1UL << PPI_CHEN_CH2_Pos) /*!< Bit mask of CH2 field. */ +#define PPI_CHEN_CH2_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH2_Enabled (1UL) /*!< Enable channel */ + +/* Bit 1 : Enable or disable channel 1 */ +#define PPI_CHEN_CH1_Pos (1UL) /*!< Position of CH1 field. */ +#define PPI_CHEN_CH1_Msk (0x1UL << PPI_CHEN_CH1_Pos) /*!< Bit mask of CH1 field. */ +#define PPI_CHEN_CH1_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH1_Enabled (1UL) /*!< Enable channel */ + +/* Bit 0 : Enable or disable channel 0 */ +#define PPI_CHEN_CH0_Pos (0UL) /*!< Position of CH0 field. */ +#define PPI_CHEN_CH0_Msk (0x1UL << PPI_CHEN_CH0_Pos) /*!< Bit mask of CH0 field. */ +#define PPI_CHEN_CH0_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH0_Enabled (1UL) /*!< Enable channel */ + +/* Register: PPI_CHENSET */ +/* Description: Channel enable set register */ + +/* Bit 31 : Channel 31 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH31_Pos (31UL) /*!< Position of CH31 field. */ +#define PPI_CHENSET_CH31_Msk (0x1UL << PPI_CHENSET_CH31_Pos) /*!< Bit mask of CH31 field. */ +#define PPI_CHENSET_CH31_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH31_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH31_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 30 : Channel 30 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH30_Pos (30UL) /*!< Position of CH30 field. */ +#define PPI_CHENSET_CH30_Msk (0x1UL << PPI_CHENSET_CH30_Pos) /*!< Bit mask of CH30 field. */ +#define PPI_CHENSET_CH30_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH30_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH30_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 29 : Channel 29 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH29_Pos (29UL) /*!< Position of CH29 field. */ +#define PPI_CHENSET_CH29_Msk (0x1UL << PPI_CHENSET_CH29_Pos) /*!< Bit mask of CH29 field. */ +#define PPI_CHENSET_CH29_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH29_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH29_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 28 : Channel 28 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH28_Pos (28UL) /*!< Position of CH28 field. */ +#define PPI_CHENSET_CH28_Msk (0x1UL << PPI_CHENSET_CH28_Pos) /*!< Bit mask of CH28 field. */ +#define PPI_CHENSET_CH28_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH28_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH28_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 27 : Channel 27 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH27_Pos (27UL) /*!< Position of CH27 field. */ +#define PPI_CHENSET_CH27_Msk (0x1UL << PPI_CHENSET_CH27_Pos) /*!< Bit mask of CH27 field. */ +#define PPI_CHENSET_CH27_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH27_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH27_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 26 : Channel 26 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH26_Pos (26UL) /*!< Position of CH26 field. */ +#define PPI_CHENSET_CH26_Msk (0x1UL << PPI_CHENSET_CH26_Pos) /*!< Bit mask of CH26 field. */ +#define PPI_CHENSET_CH26_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH26_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH26_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 25 : Channel 25 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH25_Pos (25UL) /*!< Position of CH25 field. */ +#define PPI_CHENSET_CH25_Msk (0x1UL << PPI_CHENSET_CH25_Pos) /*!< Bit mask of CH25 field. */ +#define PPI_CHENSET_CH25_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH25_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH25_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 24 : Channel 24 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH24_Pos (24UL) /*!< Position of CH24 field. */ +#define PPI_CHENSET_CH24_Msk (0x1UL << PPI_CHENSET_CH24_Pos) /*!< Bit mask of CH24 field. */ +#define PPI_CHENSET_CH24_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH24_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH24_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 23 : Channel 23 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH23_Pos (23UL) /*!< Position of CH23 field. */ +#define PPI_CHENSET_CH23_Msk (0x1UL << PPI_CHENSET_CH23_Pos) /*!< Bit mask of CH23 field. */ +#define PPI_CHENSET_CH23_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH23_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH23_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 22 : Channel 22 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH22_Pos (22UL) /*!< Position of CH22 field. */ +#define PPI_CHENSET_CH22_Msk (0x1UL << PPI_CHENSET_CH22_Pos) /*!< Bit mask of CH22 field. */ +#define PPI_CHENSET_CH22_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH22_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH22_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 21 : Channel 21 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH21_Pos (21UL) /*!< Position of CH21 field. */ +#define PPI_CHENSET_CH21_Msk (0x1UL << PPI_CHENSET_CH21_Pos) /*!< Bit mask of CH21 field. */ +#define PPI_CHENSET_CH21_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH21_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH21_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 20 : Channel 20 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH20_Pos (20UL) /*!< Position of CH20 field. */ +#define PPI_CHENSET_CH20_Msk (0x1UL << PPI_CHENSET_CH20_Pos) /*!< Bit mask of CH20 field. */ +#define PPI_CHENSET_CH20_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH20_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH20_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 19 : Channel 19 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH19_Pos (19UL) /*!< Position of CH19 field. */ +#define PPI_CHENSET_CH19_Msk (0x1UL << PPI_CHENSET_CH19_Pos) /*!< Bit mask of CH19 field. */ +#define PPI_CHENSET_CH19_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH19_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH19_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 18 : Channel 18 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH18_Pos (18UL) /*!< Position of CH18 field. */ +#define PPI_CHENSET_CH18_Msk (0x1UL << PPI_CHENSET_CH18_Pos) /*!< Bit mask of CH18 field. */ +#define PPI_CHENSET_CH18_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH18_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH18_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 17 : Channel 17 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH17_Pos (17UL) /*!< Position of CH17 field. */ +#define PPI_CHENSET_CH17_Msk (0x1UL << PPI_CHENSET_CH17_Pos) /*!< Bit mask of CH17 field. */ +#define PPI_CHENSET_CH17_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH17_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH17_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 16 : Channel 16 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH16_Pos (16UL) /*!< Position of CH16 field. */ +#define PPI_CHENSET_CH16_Msk (0x1UL << PPI_CHENSET_CH16_Pos) /*!< Bit mask of CH16 field. */ +#define PPI_CHENSET_CH16_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH16_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH16_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 15 : Channel 15 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH15_Pos (15UL) /*!< Position of CH15 field. */ +#define PPI_CHENSET_CH15_Msk (0x1UL << PPI_CHENSET_CH15_Pos) /*!< Bit mask of CH15 field. */ +#define PPI_CHENSET_CH15_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH15_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH15_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 14 : Channel 14 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH14_Pos (14UL) /*!< Position of CH14 field. */ +#define PPI_CHENSET_CH14_Msk (0x1UL << PPI_CHENSET_CH14_Pos) /*!< Bit mask of CH14 field. */ +#define PPI_CHENSET_CH14_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH14_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH14_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 13 : Channel 13 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH13_Pos (13UL) /*!< Position of CH13 field. */ +#define PPI_CHENSET_CH13_Msk (0x1UL << PPI_CHENSET_CH13_Pos) /*!< Bit mask of CH13 field. */ +#define PPI_CHENSET_CH13_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH13_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH13_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 12 : Channel 12 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH12_Pos (12UL) /*!< Position of CH12 field. */ +#define PPI_CHENSET_CH12_Msk (0x1UL << PPI_CHENSET_CH12_Pos) /*!< Bit mask of CH12 field. */ +#define PPI_CHENSET_CH12_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH12_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH12_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 11 : Channel 11 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH11_Pos (11UL) /*!< Position of CH11 field. */ +#define PPI_CHENSET_CH11_Msk (0x1UL << PPI_CHENSET_CH11_Pos) /*!< Bit mask of CH11 field. */ +#define PPI_CHENSET_CH11_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH11_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH11_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 10 : Channel 10 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH10_Pos (10UL) /*!< Position of CH10 field. */ +#define PPI_CHENSET_CH10_Msk (0x1UL << PPI_CHENSET_CH10_Pos) /*!< Bit mask of CH10 field. */ +#define PPI_CHENSET_CH10_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH10_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH10_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 9 : Channel 9 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH9_Pos (9UL) /*!< Position of CH9 field. */ +#define PPI_CHENSET_CH9_Msk (0x1UL << PPI_CHENSET_CH9_Pos) /*!< Bit mask of CH9 field. */ +#define PPI_CHENSET_CH9_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH9_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH9_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 8 : Channel 8 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH8_Pos (8UL) /*!< Position of CH8 field. */ +#define PPI_CHENSET_CH8_Msk (0x1UL << PPI_CHENSET_CH8_Pos) /*!< Bit mask of CH8 field. */ +#define PPI_CHENSET_CH8_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH8_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH8_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 7 : Channel 7 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH7_Pos (7UL) /*!< Position of CH7 field. */ +#define PPI_CHENSET_CH7_Msk (0x1UL << PPI_CHENSET_CH7_Pos) /*!< Bit mask of CH7 field. */ +#define PPI_CHENSET_CH7_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH7_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH7_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 6 : Channel 6 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH6_Pos (6UL) /*!< Position of CH6 field. */ +#define PPI_CHENSET_CH6_Msk (0x1UL << PPI_CHENSET_CH6_Pos) /*!< Bit mask of CH6 field. */ +#define PPI_CHENSET_CH6_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH6_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH6_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 5 : Channel 5 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH5_Pos (5UL) /*!< Position of CH5 field. */ +#define PPI_CHENSET_CH5_Msk (0x1UL << PPI_CHENSET_CH5_Pos) /*!< Bit mask of CH5 field. */ +#define PPI_CHENSET_CH5_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH5_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH5_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 4 : Channel 4 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH4_Pos (4UL) /*!< Position of CH4 field. */ +#define PPI_CHENSET_CH4_Msk (0x1UL << PPI_CHENSET_CH4_Pos) /*!< Bit mask of CH4 field. */ +#define PPI_CHENSET_CH4_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH4_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH4_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 3 : Channel 3 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH3_Pos (3UL) /*!< Position of CH3 field. */ +#define PPI_CHENSET_CH3_Msk (0x1UL << PPI_CHENSET_CH3_Pos) /*!< Bit mask of CH3 field. */ +#define PPI_CHENSET_CH3_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH3_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH3_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 2 : Channel 2 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH2_Pos (2UL) /*!< Position of CH2 field. */ +#define PPI_CHENSET_CH2_Msk (0x1UL << PPI_CHENSET_CH2_Pos) /*!< Bit mask of CH2 field. */ +#define PPI_CHENSET_CH2_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH2_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH2_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 1 : Channel 1 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH1_Pos (1UL) /*!< Position of CH1 field. */ +#define PPI_CHENSET_CH1_Msk (0x1UL << PPI_CHENSET_CH1_Pos) /*!< Bit mask of CH1 field. */ +#define PPI_CHENSET_CH1_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH1_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH1_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 0 : Channel 0 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH0_Pos (0UL) /*!< Position of CH0 field. */ +#define PPI_CHENSET_CH0_Msk (0x1UL << PPI_CHENSET_CH0_Pos) /*!< Bit mask of CH0 field. */ +#define PPI_CHENSET_CH0_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH0_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH0_Set (1UL) /*!< Write: Enable channel */ + +/* Register: PPI_CHENCLR */ +/* Description: Channel enable clear register */ + +/* Bit 31 : Channel 31 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH31_Pos (31UL) /*!< Position of CH31 field. */ +#define PPI_CHENCLR_CH31_Msk (0x1UL << PPI_CHENCLR_CH31_Pos) /*!< Bit mask of CH31 field. */ +#define PPI_CHENCLR_CH31_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH31_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH31_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 30 : Channel 30 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH30_Pos (30UL) /*!< Position of CH30 field. */ +#define PPI_CHENCLR_CH30_Msk (0x1UL << PPI_CHENCLR_CH30_Pos) /*!< Bit mask of CH30 field. */ +#define PPI_CHENCLR_CH30_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH30_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH30_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 29 : Channel 29 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH29_Pos (29UL) /*!< Position of CH29 field. */ +#define PPI_CHENCLR_CH29_Msk (0x1UL << PPI_CHENCLR_CH29_Pos) /*!< Bit mask of CH29 field. */ +#define PPI_CHENCLR_CH29_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH29_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH29_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 28 : Channel 28 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH28_Pos (28UL) /*!< Position of CH28 field. */ +#define PPI_CHENCLR_CH28_Msk (0x1UL << PPI_CHENCLR_CH28_Pos) /*!< Bit mask of CH28 field. */ +#define PPI_CHENCLR_CH28_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH28_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH28_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 27 : Channel 27 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH27_Pos (27UL) /*!< Position of CH27 field. */ +#define PPI_CHENCLR_CH27_Msk (0x1UL << PPI_CHENCLR_CH27_Pos) /*!< Bit mask of CH27 field. */ +#define PPI_CHENCLR_CH27_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH27_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH27_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 26 : Channel 26 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH26_Pos (26UL) /*!< Position of CH26 field. */ +#define PPI_CHENCLR_CH26_Msk (0x1UL << PPI_CHENCLR_CH26_Pos) /*!< Bit mask of CH26 field. */ +#define PPI_CHENCLR_CH26_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH26_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH26_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 25 : Channel 25 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH25_Pos (25UL) /*!< Position of CH25 field. */ +#define PPI_CHENCLR_CH25_Msk (0x1UL << PPI_CHENCLR_CH25_Pos) /*!< Bit mask of CH25 field. */ +#define PPI_CHENCLR_CH25_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH25_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH25_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 24 : Channel 24 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH24_Pos (24UL) /*!< Position of CH24 field. */ +#define PPI_CHENCLR_CH24_Msk (0x1UL << PPI_CHENCLR_CH24_Pos) /*!< Bit mask of CH24 field. */ +#define PPI_CHENCLR_CH24_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH24_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH24_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 23 : Channel 23 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH23_Pos (23UL) /*!< Position of CH23 field. */ +#define PPI_CHENCLR_CH23_Msk (0x1UL << PPI_CHENCLR_CH23_Pos) /*!< Bit mask of CH23 field. */ +#define PPI_CHENCLR_CH23_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH23_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH23_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 22 : Channel 22 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH22_Pos (22UL) /*!< Position of CH22 field. */ +#define PPI_CHENCLR_CH22_Msk (0x1UL << PPI_CHENCLR_CH22_Pos) /*!< Bit mask of CH22 field. */ +#define PPI_CHENCLR_CH22_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH22_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH22_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 21 : Channel 21 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH21_Pos (21UL) /*!< Position of CH21 field. */ +#define PPI_CHENCLR_CH21_Msk (0x1UL << PPI_CHENCLR_CH21_Pos) /*!< Bit mask of CH21 field. */ +#define PPI_CHENCLR_CH21_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH21_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH21_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 20 : Channel 20 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH20_Pos (20UL) /*!< Position of CH20 field. */ +#define PPI_CHENCLR_CH20_Msk (0x1UL << PPI_CHENCLR_CH20_Pos) /*!< Bit mask of CH20 field. */ +#define PPI_CHENCLR_CH20_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH20_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH20_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 19 : Channel 19 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH19_Pos (19UL) /*!< Position of CH19 field. */ +#define PPI_CHENCLR_CH19_Msk (0x1UL << PPI_CHENCLR_CH19_Pos) /*!< Bit mask of CH19 field. */ +#define PPI_CHENCLR_CH19_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH19_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH19_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 18 : Channel 18 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH18_Pos (18UL) /*!< Position of CH18 field. */ +#define PPI_CHENCLR_CH18_Msk (0x1UL << PPI_CHENCLR_CH18_Pos) /*!< Bit mask of CH18 field. */ +#define PPI_CHENCLR_CH18_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH18_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH18_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 17 : Channel 17 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH17_Pos (17UL) /*!< Position of CH17 field. */ +#define PPI_CHENCLR_CH17_Msk (0x1UL << PPI_CHENCLR_CH17_Pos) /*!< Bit mask of CH17 field. */ +#define PPI_CHENCLR_CH17_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH17_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH17_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 16 : Channel 16 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH16_Pos (16UL) /*!< Position of CH16 field. */ +#define PPI_CHENCLR_CH16_Msk (0x1UL << PPI_CHENCLR_CH16_Pos) /*!< Bit mask of CH16 field. */ +#define PPI_CHENCLR_CH16_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH16_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH16_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 15 : Channel 15 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH15_Pos (15UL) /*!< Position of CH15 field. */ +#define PPI_CHENCLR_CH15_Msk (0x1UL << PPI_CHENCLR_CH15_Pos) /*!< Bit mask of CH15 field. */ +#define PPI_CHENCLR_CH15_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH15_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH15_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 14 : Channel 14 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH14_Pos (14UL) /*!< Position of CH14 field. */ +#define PPI_CHENCLR_CH14_Msk (0x1UL << PPI_CHENCLR_CH14_Pos) /*!< Bit mask of CH14 field. */ +#define PPI_CHENCLR_CH14_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH14_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH14_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 13 : Channel 13 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH13_Pos (13UL) /*!< Position of CH13 field. */ +#define PPI_CHENCLR_CH13_Msk (0x1UL << PPI_CHENCLR_CH13_Pos) /*!< Bit mask of CH13 field. */ +#define PPI_CHENCLR_CH13_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH13_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH13_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 12 : Channel 12 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH12_Pos (12UL) /*!< Position of CH12 field. */ +#define PPI_CHENCLR_CH12_Msk (0x1UL << PPI_CHENCLR_CH12_Pos) /*!< Bit mask of CH12 field. */ +#define PPI_CHENCLR_CH12_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH12_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH12_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 11 : Channel 11 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH11_Pos (11UL) /*!< Position of CH11 field. */ +#define PPI_CHENCLR_CH11_Msk (0x1UL << PPI_CHENCLR_CH11_Pos) /*!< Bit mask of CH11 field. */ +#define PPI_CHENCLR_CH11_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH11_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH11_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 10 : Channel 10 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH10_Pos (10UL) /*!< Position of CH10 field. */ +#define PPI_CHENCLR_CH10_Msk (0x1UL << PPI_CHENCLR_CH10_Pos) /*!< Bit mask of CH10 field. */ +#define PPI_CHENCLR_CH10_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH10_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH10_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 9 : Channel 9 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH9_Pos (9UL) /*!< Position of CH9 field. */ +#define PPI_CHENCLR_CH9_Msk (0x1UL << PPI_CHENCLR_CH9_Pos) /*!< Bit mask of CH9 field. */ +#define PPI_CHENCLR_CH9_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH9_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH9_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 8 : Channel 8 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH8_Pos (8UL) /*!< Position of CH8 field. */ +#define PPI_CHENCLR_CH8_Msk (0x1UL << PPI_CHENCLR_CH8_Pos) /*!< Bit mask of CH8 field. */ +#define PPI_CHENCLR_CH8_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH8_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH8_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 7 : Channel 7 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH7_Pos (7UL) /*!< Position of CH7 field. */ +#define PPI_CHENCLR_CH7_Msk (0x1UL << PPI_CHENCLR_CH7_Pos) /*!< Bit mask of CH7 field. */ +#define PPI_CHENCLR_CH7_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH7_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH7_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 6 : Channel 6 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH6_Pos (6UL) /*!< Position of CH6 field. */ +#define PPI_CHENCLR_CH6_Msk (0x1UL << PPI_CHENCLR_CH6_Pos) /*!< Bit mask of CH6 field. */ +#define PPI_CHENCLR_CH6_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH6_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH6_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 5 : Channel 5 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH5_Pos (5UL) /*!< Position of CH5 field. */ +#define PPI_CHENCLR_CH5_Msk (0x1UL << PPI_CHENCLR_CH5_Pos) /*!< Bit mask of CH5 field. */ +#define PPI_CHENCLR_CH5_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH5_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH5_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 4 : Channel 4 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH4_Pos (4UL) /*!< Position of CH4 field. */ +#define PPI_CHENCLR_CH4_Msk (0x1UL << PPI_CHENCLR_CH4_Pos) /*!< Bit mask of CH4 field. */ +#define PPI_CHENCLR_CH4_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH4_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH4_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 3 : Channel 3 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH3_Pos (3UL) /*!< Position of CH3 field. */ +#define PPI_CHENCLR_CH3_Msk (0x1UL << PPI_CHENCLR_CH3_Pos) /*!< Bit mask of CH3 field. */ +#define PPI_CHENCLR_CH3_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH3_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH3_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 2 : Channel 2 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH2_Pos (2UL) /*!< Position of CH2 field. */ +#define PPI_CHENCLR_CH2_Msk (0x1UL << PPI_CHENCLR_CH2_Pos) /*!< Bit mask of CH2 field. */ +#define PPI_CHENCLR_CH2_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH2_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH2_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 1 : Channel 1 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH1_Pos (1UL) /*!< Position of CH1 field. */ +#define PPI_CHENCLR_CH1_Msk (0x1UL << PPI_CHENCLR_CH1_Pos) /*!< Bit mask of CH1 field. */ +#define PPI_CHENCLR_CH1_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH1_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH1_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 0 : Channel 0 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH0_Pos (0UL) /*!< Position of CH0 field. */ +#define PPI_CHENCLR_CH0_Msk (0x1UL << PPI_CHENCLR_CH0_Pos) /*!< Bit mask of CH0 field. */ +#define PPI_CHENCLR_CH0_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH0_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH0_Clear (1UL) /*!< Write: disable channel */ + +/* Register: PPI_CH_EEP */ +/* Description: Description cluster[n]: Channel n event end-point */ + +/* Bits 31..0 : Pointer to event register. Accepts only addresses to registers from the Event group. */ +#define PPI_CH_EEP_EEP_Pos (0UL) /*!< Position of EEP field. */ +#define PPI_CH_EEP_EEP_Msk (0xFFFFFFFFUL << PPI_CH_EEP_EEP_Pos) /*!< Bit mask of EEP field. */ + +/* Register: PPI_CH_TEP */ +/* Description: Description cluster[n]: Channel n task end-point */ + +/* Bits 31..0 : Pointer to task register. Accepts only addresses to registers from the Task group. */ +#define PPI_CH_TEP_TEP_Pos (0UL) /*!< Position of TEP field. */ +#define PPI_CH_TEP_TEP_Msk (0xFFFFFFFFUL << PPI_CH_TEP_TEP_Pos) /*!< Bit mask of TEP field. */ + +/* Register: PPI_CHG */ +/* Description: Description collection[n]: Channel group n */ + +/* Bit 31 : Include or exclude channel 31 */ +#define PPI_CHG_CH31_Pos (31UL) /*!< Position of CH31 field. */ +#define PPI_CHG_CH31_Msk (0x1UL << PPI_CHG_CH31_Pos) /*!< Bit mask of CH31 field. */ +#define PPI_CHG_CH31_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH31_Included (1UL) /*!< Include */ + +/* Bit 30 : Include or exclude channel 30 */ +#define PPI_CHG_CH30_Pos (30UL) /*!< Position of CH30 field. */ +#define PPI_CHG_CH30_Msk (0x1UL << PPI_CHG_CH30_Pos) /*!< Bit mask of CH30 field. */ +#define PPI_CHG_CH30_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH30_Included (1UL) /*!< Include */ + +/* Bit 29 : Include or exclude channel 29 */ +#define PPI_CHG_CH29_Pos (29UL) /*!< Position of CH29 field. */ +#define PPI_CHG_CH29_Msk (0x1UL << PPI_CHG_CH29_Pos) /*!< Bit mask of CH29 field. */ +#define PPI_CHG_CH29_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH29_Included (1UL) /*!< Include */ + +/* Bit 28 : Include or exclude channel 28 */ +#define PPI_CHG_CH28_Pos (28UL) /*!< Position of CH28 field. */ +#define PPI_CHG_CH28_Msk (0x1UL << PPI_CHG_CH28_Pos) /*!< Bit mask of CH28 field. */ +#define PPI_CHG_CH28_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH28_Included (1UL) /*!< Include */ + +/* Bit 27 : Include or exclude channel 27 */ +#define PPI_CHG_CH27_Pos (27UL) /*!< Position of CH27 field. */ +#define PPI_CHG_CH27_Msk (0x1UL << PPI_CHG_CH27_Pos) /*!< Bit mask of CH27 field. */ +#define PPI_CHG_CH27_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH27_Included (1UL) /*!< Include */ + +/* Bit 26 : Include or exclude channel 26 */ +#define PPI_CHG_CH26_Pos (26UL) /*!< Position of CH26 field. */ +#define PPI_CHG_CH26_Msk (0x1UL << PPI_CHG_CH26_Pos) /*!< Bit mask of CH26 field. */ +#define PPI_CHG_CH26_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH26_Included (1UL) /*!< Include */ + +/* Bit 25 : Include or exclude channel 25 */ +#define PPI_CHG_CH25_Pos (25UL) /*!< Position of CH25 field. */ +#define PPI_CHG_CH25_Msk (0x1UL << PPI_CHG_CH25_Pos) /*!< Bit mask of CH25 field. */ +#define PPI_CHG_CH25_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH25_Included (1UL) /*!< Include */ + +/* Bit 24 : Include or exclude channel 24 */ +#define PPI_CHG_CH24_Pos (24UL) /*!< Position of CH24 field. */ +#define PPI_CHG_CH24_Msk (0x1UL << PPI_CHG_CH24_Pos) /*!< Bit mask of CH24 field. */ +#define PPI_CHG_CH24_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH24_Included (1UL) /*!< Include */ + +/* Bit 23 : Include or exclude channel 23 */ +#define PPI_CHG_CH23_Pos (23UL) /*!< Position of CH23 field. */ +#define PPI_CHG_CH23_Msk (0x1UL << PPI_CHG_CH23_Pos) /*!< Bit mask of CH23 field. */ +#define PPI_CHG_CH23_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH23_Included (1UL) /*!< Include */ + +/* Bit 22 : Include or exclude channel 22 */ +#define PPI_CHG_CH22_Pos (22UL) /*!< Position of CH22 field. */ +#define PPI_CHG_CH22_Msk (0x1UL << PPI_CHG_CH22_Pos) /*!< Bit mask of CH22 field. */ +#define PPI_CHG_CH22_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH22_Included (1UL) /*!< Include */ + +/* Bit 21 : Include or exclude channel 21 */ +#define PPI_CHG_CH21_Pos (21UL) /*!< Position of CH21 field. */ +#define PPI_CHG_CH21_Msk (0x1UL << PPI_CHG_CH21_Pos) /*!< Bit mask of CH21 field. */ +#define PPI_CHG_CH21_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH21_Included (1UL) /*!< Include */ + +/* Bit 20 : Include or exclude channel 20 */ +#define PPI_CHG_CH20_Pos (20UL) /*!< Position of CH20 field. */ +#define PPI_CHG_CH20_Msk (0x1UL << PPI_CHG_CH20_Pos) /*!< Bit mask of CH20 field. */ +#define PPI_CHG_CH20_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH20_Included (1UL) /*!< Include */ + +/* Bit 19 : Include or exclude channel 19 */ +#define PPI_CHG_CH19_Pos (19UL) /*!< Position of CH19 field. */ +#define PPI_CHG_CH19_Msk (0x1UL << PPI_CHG_CH19_Pos) /*!< Bit mask of CH19 field. */ +#define PPI_CHG_CH19_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH19_Included (1UL) /*!< Include */ + +/* Bit 18 : Include or exclude channel 18 */ +#define PPI_CHG_CH18_Pos (18UL) /*!< Position of CH18 field. */ +#define PPI_CHG_CH18_Msk (0x1UL << PPI_CHG_CH18_Pos) /*!< Bit mask of CH18 field. */ +#define PPI_CHG_CH18_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH18_Included (1UL) /*!< Include */ + +/* Bit 17 : Include or exclude channel 17 */ +#define PPI_CHG_CH17_Pos (17UL) /*!< Position of CH17 field. */ +#define PPI_CHG_CH17_Msk (0x1UL << PPI_CHG_CH17_Pos) /*!< Bit mask of CH17 field. */ +#define PPI_CHG_CH17_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH17_Included (1UL) /*!< Include */ + +/* Bit 16 : Include or exclude channel 16 */ +#define PPI_CHG_CH16_Pos (16UL) /*!< Position of CH16 field. */ +#define PPI_CHG_CH16_Msk (0x1UL << PPI_CHG_CH16_Pos) /*!< Bit mask of CH16 field. */ +#define PPI_CHG_CH16_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH16_Included (1UL) /*!< Include */ + +/* Bit 15 : Include or exclude channel 15 */ +#define PPI_CHG_CH15_Pos (15UL) /*!< Position of CH15 field. */ +#define PPI_CHG_CH15_Msk (0x1UL << PPI_CHG_CH15_Pos) /*!< Bit mask of CH15 field. */ +#define PPI_CHG_CH15_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH15_Included (1UL) /*!< Include */ + +/* Bit 14 : Include or exclude channel 14 */ +#define PPI_CHG_CH14_Pos (14UL) /*!< Position of CH14 field. */ +#define PPI_CHG_CH14_Msk (0x1UL << PPI_CHG_CH14_Pos) /*!< Bit mask of CH14 field. */ +#define PPI_CHG_CH14_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH14_Included (1UL) /*!< Include */ + +/* Bit 13 : Include or exclude channel 13 */ +#define PPI_CHG_CH13_Pos (13UL) /*!< Position of CH13 field. */ +#define PPI_CHG_CH13_Msk (0x1UL << PPI_CHG_CH13_Pos) /*!< Bit mask of CH13 field. */ +#define PPI_CHG_CH13_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH13_Included (1UL) /*!< Include */ + +/* Bit 12 : Include or exclude channel 12 */ +#define PPI_CHG_CH12_Pos (12UL) /*!< Position of CH12 field. */ +#define PPI_CHG_CH12_Msk (0x1UL << PPI_CHG_CH12_Pos) /*!< Bit mask of CH12 field. */ +#define PPI_CHG_CH12_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH12_Included (1UL) /*!< Include */ + +/* Bit 11 : Include or exclude channel 11 */ +#define PPI_CHG_CH11_Pos (11UL) /*!< Position of CH11 field. */ +#define PPI_CHG_CH11_Msk (0x1UL << PPI_CHG_CH11_Pos) /*!< Bit mask of CH11 field. */ +#define PPI_CHG_CH11_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH11_Included (1UL) /*!< Include */ + +/* Bit 10 : Include or exclude channel 10 */ +#define PPI_CHG_CH10_Pos (10UL) /*!< Position of CH10 field. */ +#define PPI_CHG_CH10_Msk (0x1UL << PPI_CHG_CH10_Pos) /*!< Bit mask of CH10 field. */ +#define PPI_CHG_CH10_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH10_Included (1UL) /*!< Include */ + +/* Bit 9 : Include or exclude channel 9 */ +#define PPI_CHG_CH9_Pos (9UL) /*!< Position of CH9 field. */ +#define PPI_CHG_CH9_Msk (0x1UL << PPI_CHG_CH9_Pos) /*!< Bit mask of CH9 field. */ +#define PPI_CHG_CH9_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH9_Included (1UL) /*!< Include */ + +/* Bit 8 : Include or exclude channel 8 */ +#define PPI_CHG_CH8_Pos (8UL) /*!< Position of CH8 field. */ +#define PPI_CHG_CH8_Msk (0x1UL << PPI_CHG_CH8_Pos) /*!< Bit mask of CH8 field. */ +#define PPI_CHG_CH8_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH8_Included (1UL) /*!< Include */ + +/* Bit 7 : Include or exclude channel 7 */ +#define PPI_CHG_CH7_Pos (7UL) /*!< Position of CH7 field. */ +#define PPI_CHG_CH7_Msk (0x1UL << PPI_CHG_CH7_Pos) /*!< Bit mask of CH7 field. */ +#define PPI_CHG_CH7_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH7_Included (1UL) /*!< Include */ + +/* Bit 6 : Include or exclude channel 6 */ +#define PPI_CHG_CH6_Pos (6UL) /*!< Position of CH6 field. */ +#define PPI_CHG_CH6_Msk (0x1UL << PPI_CHG_CH6_Pos) /*!< Bit mask of CH6 field. */ +#define PPI_CHG_CH6_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH6_Included (1UL) /*!< Include */ + +/* Bit 5 : Include or exclude channel 5 */ +#define PPI_CHG_CH5_Pos (5UL) /*!< Position of CH5 field. */ +#define PPI_CHG_CH5_Msk (0x1UL << PPI_CHG_CH5_Pos) /*!< Bit mask of CH5 field. */ +#define PPI_CHG_CH5_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH5_Included (1UL) /*!< Include */ + +/* Bit 4 : Include or exclude channel 4 */ +#define PPI_CHG_CH4_Pos (4UL) /*!< Position of CH4 field. */ +#define PPI_CHG_CH4_Msk (0x1UL << PPI_CHG_CH4_Pos) /*!< Bit mask of CH4 field. */ +#define PPI_CHG_CH4_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH4_Included (1UL) /*!< Include */ + +/* Bit 3 : Include or exclude channel 3 */ +#define PPI_CHG_CH3_Pos (3UL) /*!< Position of CH3 field. */ +#define PPI_CHG_CH3_Msk (0x1UL << PPI_CHG_CH3_Pos) /*!< Bit mask of CH3 field. */ +#define PPI_CHG_CH3_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH3_Included (1UL) /*!< Include */ + +/* Bit 2 : Include or exclude channel 2 */ +#define PPI_CHG_CH2_Pos (2UL) /*!< Position of CH2 field. */ +#define PPI_CHG_CH2_Msk (0x1UL << PPI_CHG_CH2_Pos) /*!< Bit mask of CH2 field. */ +#define PPI_CHG_CH2_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH2_Included (1UL) /*!< Include */ + +/* Bit 1 : Include or exclude channel 1 */ +#define PPI_CHG_CH1_Pos (1UL) /*!< Position of CH1 field. */ +#define PPI_CHG_CH1_Msk (0x1UL << PPI_CHG_CH1_Pos) /*!< Bit mask of CH1 field. */ +#define PPI_CHG_CH1_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH1_Included (1UL) /*!< Include */ + +/* Bit 0 : Include or exclude channel 0 */ +#define PPI_CHG_CH0_Pos (0UL) /*!< Position of CH0 field. */ +#define PPI_CHG_CH0_Msk (0x1UL << PPI_CHG_CH0_Pos) /*!< Bit mask of CH0 field. */ +#define PPI_CHG_CH0_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH0_Included (1UL) /*!< Include */ + +/* Register: PPI_FORK_TEP */ +/* Description: Description cluster[n]: Channel n task end-point */ + +/* Bits 31..0 : Pointer to task register */ +#define PPI_FORK_TEP_TEP_Pos (0UL) /*!< Position of TEP field. */ +#define PPI_FORK_TEP_TEP_Msk (0xFFFFFFFFUL << PPI_FORK_TEP_TEP_Pos) /*!< Bit mask of TEP field. */ + + +/* Peripheral: PWM */ +/* Description: Pulse width modulation unit 0 */ + +/* Register: PWM_TASKS_STOP */ +/* Description: Stops PWM pulse generation on all channels at the end of current PWM period, and stops sequence playback */ + +/* Bit 0 : */ +#define PWM_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define PWM_TASKS_STOP_TASKS_STOP_Msk (0x1UL << PWM_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: PWM_TASKS_SEQSTART */ +/* Description: Description collection[n]: Loads the first PWM value on all enabled channels from sequence n, and starts playing that sequence at the rate defined in SEQ[n]REFRESH and/or DECODER.MODE. Causes PWM generation to start if not running. */ + +/* Bit 0 : */ +#define PWM_TASKS_SEQSTART_TASKS_SEQSTART_Pos (0UL) /*!< Position of TASKS_SEQSTART field. */ +#define PWM_TASKS_SEQSTART_TASKS_SEQSTART_Msk (0x1UL << PWM_TASKS_SEQSTART_TASKS_SEQSTART_Pos) /*!< Bit mask of TASKS_SEQSTART field. */ + +/* Register: PWM_TASKS_NEXTSTEP */ +/* Description: Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running. */ + +/* Bit 0 : */ +#define PWM_TASKS_NEXTSTEP_TASKS_NEXTSTEP_Pos (0UL) /*!< Position of TASKS_NEXTSTEP field. */ +#define PWM_TASKS_NEXTSTEP_TASKS_NEXTSTEP_Msk (0x1UL << PWM_TASKS_NEXTSTEP_TASKS_NEXTSTEP_Pos) /*!< Bit mask of TASKS_NEXTSTEP field. */ + +/* Register: PWM_EVENTS_STOPPED */ +/* Description: Response to STOP task, emitted when PWM pulses are no longer generated */ + +/* Bit 0 : */ +#define PWM_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */ +#define PWM_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << PWM_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */ + +/* Register: PWM_EVENTS_SEQSTARTED */ +/* Description: Description collection[n]: First PWM period started on sequence n */ + +/* Bit 0 : */ +#define PWM_EVENTS_SEQSTARTED_EVENTS_SEQSTARTED_Pos (0UL) /*!< Position of EVENTS_SEQSTARTED field. */ +#define PWM_EVENTS_SEQSTARTED_EVENTS_SEQSTARTED_Msk (0x1UL << PWM_EVENTS_SEQSTARTED_EVENTS_SEQSTARTED_Pos) /*!< Bit mask of EVENTS_SEQSTARTED field. */ + +/* Register: PWM_EVENTS_SEQEND */ +/* Description: Description collection[n]: Emitted at end of every sequence n, when last value from RAM has been applied to wave counter */ + +/* Bit 0 : */ +#define PWM_EVENTS_SEQEND_EVENTS_SEQEND_Pos (0UL) /*!< Position of EVENTS_SEQEND field. */ +#define PWM_EVENTS_SEQEND_EVENTS_SEQEND_Msk (0x1UL << PWM_EVENTS_SEQEND_EVENTS_SEQEND_Pos) /*!< Bit mask of EVENTS_SEQEND field. */ + +/* Register: PWM_EVENTS_PWMPERIODEND */ +/* Description: Emitted at the end of each PWM period */ + +/* Bit 0 : */ +#define PWM_EVENTS_PWMPERIODEND_EVENTS_PWMPERIODEND_Pos (0UL) /*!< Position of EVENTS_PWMPERIODEND field. */ +#define PWM_EVENTS_PWMPERIODEND_EVENTS_PWMPERIODEND_Msk (0x1UL << PWM_EVENTS_PWMPERIODEND_EVENTS_PWMPERIODEND_Pos) /*!< Bit mask of EVENTS_PWMPERIODEND field. */ + +/* Register: PWM_EVENTS_LOOPSDONE */ +/* Description: Concatenated sequences have been played the amount of times defined in LOOP.CNT */ + +/* Bit 0 : */ +#define PWM_EVENTS_LOOPSDONE_EVENTS_LOOPSDONE_Pos (0UL) /*!< Position of EVENTS_LOOPSDONE field. */ +#define PWM_EVENTS_LOOPSDONE_EVENTS_LOOPSDONE_Msk (0x1UL << PWM_EVENTS_LOOPSDONE_EVENTS_LOOPSDONE_Pos) /*!< Bit mask of EVENTS_LOOPSDONE field. */ + +/* Register: PWM_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 4 : Shortcut between LOOPSDONE event and STOP task */ +#define PWM_SHORTS_LOOPSDONE_STOP_Pos (4UL) /*!< Position of LOOPSDONE_STOP field. */ +#define PWM_SHORTS_LOOPSDONE_STOP_Msk (0x1UL << PWM_SHORTS_LOOPSDONE_STOP_Pos) /*!< Bit mask of LOOPSDONE_STOP field. */ +#define PWM_SHORTS_LOOPSDONE_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define PWM_SHORTS_LOOPSDONE_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 3 : Shortcut between LOOPSDONE event and SEQSTART[1] task */ +#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Pos (3UL) /*!< Position of LOOPSDONE_SEQSTART1 field. */ +#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Msk (0x1UL << PWM_SHORTS_LOOPSDONE_SEQSTART1_Pos) /*!< Bit mask of LOOPSDONE_SEQSTART1 field. */ +#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Disabled (0UL) /*!< Disable shortcut */ +#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 2 : Shortcut between LOOPSDONE event and SEQSTART[0] task */ +#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Pos (2UL) /*!< Position of LOOPSDONE_SEQSTART0 field. */ +#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Msk (0x1UL << PWM_SHORTS_LOOPSDONE_SEQSTART0_Pos) /*!< Bit mask of LOOPSDONE_SEQSTART0 field. */ +#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Disabled (0UL) /*!< Disable shortcut */ +#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 1 : Shortcut between SEQEND[1] event and STOP task */ +#define PWM_SHORTS_SEQEND1_STOP_Pos (1UL) /*!< Position of SEQEND1_STOP field. */ +#define PWM_SHORTS_SEQEND1_STOP_Msk (0x1UL << PWM_SHORTS_SEQEND1_STOP_Pos) /*!< Bit mask of SEQEND1_STOP field. */ +#define PWM_SHORTS_SEQEND1_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define PWM_SHORTS_SEQEND1_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 0 : Shortcut between SEQEND[0] event and STOP task */ +#define PWM_SHORTS_SEQEND0_STOP_Pos (0UL) /*!< Position of SEQEND0_STOP field. */ +#define PWM_SHORTS_SEQEND0_STOP_Msk (0x1UL << PWM_SHORTS_SEQEND0_STOP_Pos) /*!< Bit mask of SEQEND0_STOP field. */ +#define PWM_SHORTS_SEQEND0_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define PWM_SHORTS_SEQEND0_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: PWM_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 7 : Enable or disable interrupt for LOOPSDONE event */ +#define PWM_INTEN_LOOPSDONE_Pos (7UL) /*!< Position of LOOPSDONE field. */ +#define PWM_INTEN_LOOPSDONE_Msk (0x1UL << PWM_INTEN_LOOPSDONE_Pos) /*!< Bit mask of LOOPSDONE field. */ +#define PWM_INTEN_LOOPSDONE_Disabled (0UL) /*!< Disable */ +#define PWM_INTEN_LOOPSDONE_Enabled (1UL) /*!< Enable */ + +/* Bit 6 : Enable or disable interrupt for PWMPERIODEND event */ +#define PWM_INTEN_PWMPERIODEND_Pos (6UL) /*!< Position of PWMPERIODEND field. */ +#define PWM_INTEN_PWMPERIODEND_Msk (0x1UL << PWM_INTEN_PWMPERIODEND_Pos) /*!< Bit mask of PWMPERIODEND field. */ +#define PWM_INTEN_PWMPERIODEND_Disabled (0UL) /*!< Disable */ +#define PWM_INTEN_PWMPERIODEND_Enabled (1UL) /*!< Enable */ + +/* Bit 5 : Enable or disable interrupt for SEQEND[1] event */ +#define PWM_INTEN_SEQEND1_Pos (5UL) /*!< Position of SEQEND1 field. */ +#define PWM_INTEN_SEQEND1_Msk (0x1UL << PWM_INTEN_SEQEND1_Pos) /*!< Bit mask of SEQEND1 field. */ +#define PWM_INTEN_SEQEND1_Disabled (0UL) /*!< Disable */ +#define PWM_INTEN_SEQEND1_Enabled (1UL) /*!< Enable */ + +/* Bit 4 : Enable or disable interrupt for SEQEND[0] event */ +#define PWM_INTEN_SEQEND0_Pos (4UL) /*!< Position of SEQEND0 field. */ +#define PWM_INTEN_SEQEND0_Msk (0x1UL << PWM_INTEN_SEQEND0_Pos) /*!< Bit mask of SEQEND0 field. */ +#define PWM_INTEN_SEQEND0_Disabled (0UL) /*!< Disable */ +#define PWM_INTEN_SEQEND0_Enabled (1UL) /*!< Enable */ + +/* Bit 3 : Enable or disable interrupt for SEQSTARTED[1] event */ +#define PWM_INTEN_SEQSTARTED1_Pos (3UL) /*!< Position of SEQSTARTED1 field. */ +#define PWM_INTEN_SEQSTARTED1_Msk (0x1UL << PWM_INTEN_SEQSTARTED1_Pos) /*!< Bit mask of SEQSTARTED1 field. */ +#define PWM_INTEN_SEQSTARTED1_Disabled (0UL) /*!< Disable */ +#define PWM_INTEN_SEQSTARTED1_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable interrupt for SEQSTARTED[0] event */ +#define PWM_INTEN_SEQSTARTED0_Pos (2UL) /*!< Position of SEQSTARTED0 field. */ +#define PWM_INTEN_SEQSTARTED0_Msk (0x1UL << PWM_INTEN_SEQSTARTED0_Pos) /*!< Bit mask of SEQSTARTED0 field. */ +#define PWM_INTEN_SEQSTARTED0_Disabled (0UL) /*!< Disable */ +#define PWM_INTEN_SEQSTARTED0_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for STOPPED event */ +#define PWM_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define PWM_INTEN_STOPPED_Msk (0x1UL << PWM_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define PWM_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ +#define PWM_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ + +/* Register: PWM_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 7 : Write '1' to enable interrupt for LOOPSDONE event */ +#define PWM_INTENSET_LOOPSDONE_Pos (7UL) /*!< Position of LOOPSDONE field. */ +#define PWM_INTENSET_LOOPSDONE_Msk (0x1UL << PWM_INTENSET_LOOPSDONE_Pos) /*!< Bit mask of LOOPSDONE field. */ +#define PWM_INTENSET_LOOPSDONE_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENSET_LOOPSDONE_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENSET_LOOPSDONE_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to enable interrupt for PWMPERIODEND event */ +#define PWM_INTENSET_PWMPERIODEND_Pos (6UL) /*!< Position of PWMPERIODEND field. */ +#define PWM_INTENSET_PWMPERIODEND_Msk (0x1UL << PWM_INTENSET_PWMPERIODEND_Pos) /*!< Bit mask of PWMPERIODEND field. */ +#define PWM_INTENSET_PWMPERIODEND_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENSET_PWMPERIODEND_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENSET_PWMPERIODEND_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to enable interrupt for SEQEND[1] event */ +#define PWM_INTENSET_SEQEND1_Pos (5UL) /*!< Position of SEQEND1 field. */ +#define PWM_INTENSET_SEQEND1_Msk (0x1UL << PWM_INTENSET_SEQEND1_Pos) /*!< Bit mask of SEQEND1 field. */ +#define PWM_INTENSET_SEQEND1_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENSET_SEQEND1_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENSET_SEQEND1_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to enable interrupt for SEQEND[0] event */ +#define PWM_INTENSET_SEQEND0_Pos (4UL) /*!< Position of SEQEND0 field. */ +#define PWM_INTENSET_SEQEND0_Msk (0x1UL << PWM_INTENSET_SEQEND0_Pos) /*!< Bit mask of SEQEND0 field. */ +#define PWM_INTENSET_SEQEND0_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENSET_SEQEND0_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENSET_SEQEND0_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to enable interrupt for SEQSTARTED[1] event */ +#define PWM_INTENSET_SEQSTARTED1_Pos (3UL) /*!< Position of SEQSTARTED1 field. */ +#define PWM_INTENSET_SEQSTARTED1_Msk (0x1UL << PWM_INTENSET_SEQSTARTED1_Pos) /*!< Bit mask of SEQSTARTED1 field. */ +#define PWM_INTENSET_SEQSTARTED1_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENSET_SEQSTARTED1_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENSET_SEQSTARTED1_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to enable interrupt for SEQSTARTED[0] event */ +#define PWM_INTENSET_SEQSTARTED0_Pos (2UL) /*!< Position of SEQSTARTED0 field. */ +#define PWM_INTENSET_SEQSTARTED0_Msk (0x1UL << PWM_INTENSET_SEQSTARTED0_Pos) /*!< Bit mask of SEQSTARTED0 field. */ +#define PWM_INTENSET_SEQSTARTED0_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENSET_SEQSTARTED0_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENSET_SEQSTARTED0_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable interrupt for STOPPED event */ +#define PWM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define PWM_INTENSET_STOPPED_Msk (0x1UL << PWM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define PWM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Register: PWM_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 7 : Write '1' to disable interrupt for LOOPSDONE event */ +#define PWM_INTENCLR_LOOPSDONE_Pos (7UL) /*!< Position of LOOPSDONE field. */ +#define PWM_INTENCLR_LOOPSDONE_Msk (0x1UL << PWM_INTENCLR_LOOPSDONE_Pos) /*!< Bit mask of LOOPSDONE field. */ +#define PWM_INTENCLR_LOOPSDONE_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENCLR_LOOPSDONE_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENCLR_LOOPSDONE_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to disable interrupt for PWMPERIODEND event */ +#define PWM_INTENCLR_PWMPERIODEND_Pos (6UL) /*!< Position of PWMPERIODEND field. */ +#define PWM_INTENCLR_PWMPERIODEND_Msk (0x1UL << PWM_INTENCLR_PWMPERIODEND_Pos) /*!< Bit mask of PWMPERIODEND field. */ +#define PWM_INTENCLR_PWMPERIODEND_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENCLR_PWMPERIODEND_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENCLR_PWMPERIODEND_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to disable interrupt for SEQEND[1] event */ +#define PWM_INTENCLR_SEQEND1_Pos (5UL) /*!< Position of SEQEND1 field. */ +#define PWM_INTENCLR_SEQEND1_Msk (0x1UL << PWM_INTENCLR_SEQEND1_Pos) /*!< Bit mask of SEQEND1 field. */ +#define PWM_INTENCLR_SEQEND1_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENCLR_SEQEND1_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENCLR_SEQEND1_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to disable interrupt for SEQEND[0] event */ +#define PWM_INTENCLR_SEQEND0_Pos (4UL) /*!< Position of SEQEND0 field. */ +#define PWM_INTENCLR_SEQEND0_Msk (0x1UL << PWM_INTENCLR_SEQEND0_Pos) /*!< Bit mask of SEQEND0 field. */ +#define PWM_INTENCLR_SEQEND0_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENCLR_SEQEND0_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENCLR_SEQEND0_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to disable interrupt for SEQSTARTED[1] event */ +#define PWM_INTENCLR_SEQSTARTED1_Pos (3UL) /*!< Position of SEQSTARTED1 field. */ +#define PWM_INTENCLR_SEQSTARTED1_Msk (0x1UL << PWM_INTENCLR_SEQSTARTED1_Pos) /*!< Bit mask of SEQSTARTED1 field. */ +#define PWM_INTENCLR_SEQSTARTED1_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENCLR_SEQSTARTED1_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENCLR_SEQSTARTED1_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to disable interrupt for SEQSTARTED[0] event */ +#define PWM_INTENCLR_SEQSTARTED0_Pos (2UL) /*!< Position of SEQSTARTED0 field. */ +#define PWM_INTENCLR_SEQSTARTED0_Msk (0x1UL << PWM_INTENCLR_SEQSTARTED0_Pos) /*!< Bit mask of SEQSTARTED0 field. */ +#define PWM_INTENCLR_SEQSTARTED0_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENCLR_SEQSTARTED0_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENCLR_SEQSTARTED0_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable interrupt for STOPPED event */ +#define PWM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define PWM_INTENCLR_STOPPED_Msk (0x1UL << PWM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define PWM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Register: PWM_ENABLE */ +/* Description: PWM module enable register */ + +/* Bit 0 : Enable or disable PWM module */ +#define PWM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define PWM_ENABLE_ENABLE_Msk (0x1UL << PWM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define PWM_ENABLE_ENABLE_Disabled (0UL) /*!< Disabled */ +#define PWM_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */ + +/* Register: PWM_MODE */ +/* Description: Selects operating mode of the wave counter */ + +/* Bit 0 : Selects up mode or up-and-down mode for the counter */ +#define PWM_MODE_UPDOWN_Pos (0UL) /*!< Position of UPDOWN field. */ +#define PWM_MODE_UPDOWN_Msk (0x1UL << PWM_MODE_UPDOWN_Pos) /*!< Bit mask of UPDOWN field. */ +#define PWM_MODE_UPDOWN_Up (0UL) /*!< Up counter, edge-aligned PWM duty cycle */ +#define PWM_MODE_UPDOWN_UpAndDown (1UL) /*!< Up and down counter, center-aligned PWM duty cycle */ + +/* Register: PWM_COUNTERTOP */ +/* Description: Value up to which the pulse generator counter counts */ + +/* Bits 14..0 : Value up to which the pulse generator counter counts. This register is ignored when DECODER.MODE=WaveForm and only values from RAM are used. */ +#define PWM_COUNTERTOP_COUNTERTOP_Pos (0UL) /*!< Position of COUNTERTOP field. */ +#define PWM_COUNTERTOP_COUNTERTOP_Msk (0x7FFFUL << PWM_COUNTERTOP_COUNTERTOP_Pos) /*!< Bit mask of COUNTERTOP field. */ + +/* Register: PWM_PRESCALER */ +/* Description: Configuration for PWM_CLK */ + +/* Bits 2..0 : Prescaler of PWM_CLK */ +#define PWM_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */ +#define PWM_PRESCALER_PRESCALER_Msk (0x7UL << PWM_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */ +#define PWM_PRESCALER_PRESCALER_DIV_1 (0UL) /*!< Divide by 1 (16 MHz) */ +#define PWM_PRESCALER_PRESCALER_DIV_2 (1UL) /*!< Divide by 2 (8 MHz) */ +#define PWM_PRESCALER_PRESCALER_DIV_4 (2UL) /*!< Divide by 4 (4 MHz) */ +#define PWM_PRESCALER_PRESCALER_DIV_8 (3UL) /*!< Divide by 8 (2 MHz) */ +#define PWM_PRESCALER_PRESCALER_DIV_16 (4UL) /*!< Divide by 16 (1 MHz) */ +#define PWM_PRESCALER_PRESCALER_DIV_32 (5UL) /*!< Divide by 32 (500 kHz) */ +#define PWM_PRESCALER_PRESCALER_DIV_64 (6UL) /*!< Divide by 64 (250 kHz) */ +#define PWM_PRESCALER_PRESCALER_DIV_128 (7UL) /*!< Divide by 128 (125 kHz) */ + +/* Register: PWM_DECODER */ +/* Description: Configuration of the decoder */ + +/* Bit 8 : Selects source for advancing the active sequence */ +#define PWM_DECODER_MODE_Pos (8UL) /*!< Position of MODE field. */ +#define PWM_DECODER_MODE_Msk (0x1UL << PWM_DECODER_MODE_Pos) /*!< Bit mask of MODE field. */ +#define PWM_DECODER_MODE_RefreshCount (0UL) /*!< SEQ[n].REFRESH is used to determine loading internal compare registers */ +#define PWM_DECODER_MODE_NextStep (1UL) /*!< NEXTSTEP task causes a new value to be loaded to internal compare registers */ + +/* Bits 1..0 : How a sequence is read from RAM and spread to the compare register */ +#define PWM_DECODER_LOAD_Pos (0UL) /*!< Position of LOAD field. */ +#define PWM_DECODER_LOAD_Msk (0x3UL << PWM_DECODER_LOAD_Pos) /*!< Bit mask of LOAD field. */ +#define PWM_DECODER_LOAD_Common (0UL) /*!< 1st half word (16-bit) used in all PWM channels 0..3 */ +#define PWM_DECODER_LOAD_Grouped (1UL) /*!< 1st half word (16-bit) used in channel 0..1; 2nd word in channel 2..3 */ +#define PWM_DECODER_LOAD_Individual (2UL) /*!< 1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in ch.3 */ +#define PWM_DECODER_LOAD_WaveForm (3UL) /*!< 1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in COUNTERTOP */ + +/* Register: PWM_LOOP */ +/* Description: Number of playbacks of a loop */ + +/* Bits 15..0 : Number of playbacks of pattern cycles */ +#define PWM_LOOP_CNT_Pos (0UL) /*!< Position of CNT field. */ +#define PWM_LOOP_CNT_Msk (0xFFFFUL << PWM_LOOP_CNT_Pos) /*!< Bit mask of CNT field. */ +#define PWM_LOOP_CNT_Disabled (0UL) /*!< Looping disabled (stop at the end of the sequence) */ + +/* Register: PWM_SEQ_PTR */ +/* Description: Description cluster[n]: Beginning address in RAM of this sequence */ + +/* Bits 31..0 : Beginning address in RAM of this sequence */ +#define PWM_SEQ_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define PWM_SEQ_PTR_PTR_Msk (0xFFFFFFFFUL << PWM_SEQ_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: PWM_SEQ_CNT */ +/* Description: Description cluster[n]: Number of values (duty cycles) in this sequence */ + +/* Bits 14..0 : Number of values (duty cycles) in this sequence */ +#define PWM_SEQ_CNT_CNT_Pos (0UL) /*!< Position of CNT field. */ +#define PWM_SEQ_CNT_CNT_Msk (0x7FFFUL << PWM_SEQ_CNT_CNT_Pos) /*!< Bit mask of CNT field. */ +#define PWM_SEQ_CNT_CNT_Disabled (0UL) /*!< Sequence is disabled, and shall not be started as it is empty */ + +/* Register: PWM_SEQ_REFRESH */ +/* Description: Description cluster[n]: Number of additional PWM periods between samples loaded into compare register */ + +/* Bits 23..0 : Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods) */ +#define PWM_SEQ_REFRESH_CNT_Pos (0UL) /*!< Position of CNT field. */ +#define PWM_SEQ_REFRESH_CNT_Msk (0xFFFFFFUL << PWM_SEQ_REFRESH_CNT_Pos) /*!< Bit mask of CNT field. */ +#define PWM_SEQ_REFRESH_CNT_Continuous (0UL) /*!< Update every PWM period */ + +/* Register: PWM_SEQ_ENDDELAY */ +/* Description: Description cluster[n]: Time added after the sequence */ + +/* Bits 23..0 : Time added after the sequence in PWM periods */ +#define PWM_SEQ_ENDDELAY_CNT_Pos (0UL) /*!< Position of CNT field. */ +#define PWM_SEQ_ENDDELAY_CNT_Msk (0xFFFFFFUL << PWM_SEQ_ENDDELAY_CNT_Pos) /*!< Bit mask of CNT field. */ + +/* Register: PWM_PSEL_OUT */ +/* Description: Description collection[n]: Output pin select for PWM channel n */ + +/* Bit 31 : Connection */ +#define PWM_PSEL_OUT_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define PWM_PSEL_OUT_CONNECT_Msk (0x1UL << PWM_PSEL_OUT_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define PWM_PSEL_OUT_CONNECT_Connected (0UL) /*!< Connect */ +#define PWM_PSEL_OUT_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define PWM_PSEL_OUT_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define PWM_PSEL_OUT_PORT_Msk (0x1UL << PWM_PSEL_OUT_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define PWM_PSEL_OUT_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define PWM_PSEL_OUT_PIN_Msk (0x1FUL << PWM_PSEL_OUT_PIN_Pos) /*!< Bit mask of PIN field. */ + + +/* Peripheral: QDEC */ +/* Description: Quadrature Decoder */ + +/* Register: QDEC_TASKS_START */ +/* Description: Task starting the quadrature decoder */ + +/* Bit 0 : */ +#define QDEC_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define QDEC_TASKS_START_TASKS_START_Msk (0x1UL << QDEC_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: QDEC_TASKS_STOP */ +/* Description: Task stopping the quadrature decoder */ + +/* Bit 0 : */ +#define QDEC_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define QDEC_TASKS_STOP_TASKS_STOP_Msk (0x1UL << QDEC_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: QDEC_TASKS_READCLRACC */ +/* Description: Read and clear ACC and ACCDBL */ + +/* Bit 0 : */ +#define QDEC_TASKS_READCLRACC_TASKS_READCLRACC_Pos (0UL) /*!< Position of TASKS_READCLRACC field. */ +#define QDEC_TASKS_READCLRACC_TASKS_READCLRACC_Msk (0x1UL << QDEC_TASKS_READCLRACC_TASKS_READCLRACC_Pos) /*!< Bit mask of TASKS_READCLRACC field. */ + +/* Register: QDEC_TASKS_RDCLRACC */ +/* Description: Read and clear ACC */ + +/* Bit 0 : */ +#define QDEC_TASKS_RDCLRACC_TASKS_RDCLRACC_Pos (0UL) /*!< Position of TASKS_RDCLRACC field. */ +#define QDEC_TASKS_RDCLRACC_TASKS_RDCLRACC_Msk (0x1UL << QDEC_TASKS_RDCLRACC_TASKS_RDCLRACC_Pos) /*!< Bit mask of TASKS_RDCLRACC field. */ + +/* Register: QDEC_TASKS_RDCLRDBL */ +/* Description: Read and clear ACCDBL */ + +/* Bit 0 : */ +#define QDEC_TASKS_RDCLRDBL_TASKS_RDCLRDBL_Pos (0UL) /*!< Position of TASKS_RDCLRDBL field. */ +#define QDEC_TASKS_RDCLRDBL_TASKS_RDCLRDBL_Msk (0x1UL << QDEC_TASKS_RDCLRDBL_TASKS_RDCLRDBL_Pos) /*!< Bit mask of TASKS_RDCLRDBL field. */ + +/* Register: QDEC_EVENTS_SAMPLERDY */ +/* Description: Event being generated for every new sample value written to the SAMPLE register */ + +/* Bit 0 : */ +#define QDEC_EVENTS_SAMPLERDY_EVENTS_SAMPLERDY_Pos (0UL) /*!< Position of EVENTS_SAMPLERDY field. */ +#define QDEC_EVENTS_SAMPLERDY_EVENTS_SAMPLERDY_Msk (0x1UL << QDEC_EVENTS_SAMPLERDY_EVENTS_SAMPLERDY_Pos) /*!< Bit mask of EVENTS_SAMPLERDY field. */ + +/* Register: QDEC_EVENTS_REPORTRDY */ +/* Description: Non-null report ready */ + +/* Bit 0 : */ +#define QDEC_EVENTS_REPORTRDY_EVENTS_REPORTRDY_Pos (0UL) /*!< Position of EVENTS_REPORTRDY field. */ +#define QDEC_EVENTS_REPORTRDY_EVENTS_REPORTRDY_Msk (0x1UL << QDEC_EVENTS_REPORTRDY_EVENTS_REPORTRDY_Pos) /*!< Bit mask of EVENTS_REPORTRDY field. */ + +/* Register: QDEC_EVENTS_ACCOF */ +/* Description: ACC or ACCDBL register overflow */ + +/* Bit 0 : */ +#define QDEC_EVENTS_ACCOF_EVENTS_ACCOF_Pos (0UL) /*!< Position of EVENTS_ACCOF field. */ +#define QDEC_EVENTS_ACCOF_EVENTS_ACCOF_Msk (0x1UL << QDEC_EVENTS_ACCOF_EVENTS_ACCOF_Pos) /*!< Bit mask of EVENTS_ACCOF field. */ + +/* Register: QDEC_EVENTS_DBLRDY */ +/* Description: Double displacement(s) detected */ + +/* Bit 0 : */ +#define QDEC_EVENTS_DBLRDY_EVENTS_DBLRDY_Pos (0UL) /*!< Position of EVENTS_DBLRDY field. */ +#define QDEC_EVENTS_DBLRDY_EVENTS_DBLRDY_Msk (0x1UL << QDEC_EVENTS_DBLRDY_EVENTS_DBLRDY_Pos) /*!< Bit mask of EVENTS_DBLRDY field. */ + +/* Register: QDEC_EVENTS_STOPPED */ +/* Description: QDEC has been stopped */ + +/* Bit 0 : */ +#define QDEC_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */ +#define QDEC_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << QDEC_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */ + +/* Register: QDEC_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 6 : Shortcut between SAMPLERDY event and READCLRACC task */ +#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Pos (6UL) /*!< Position of SAMPLERDY_READCLRACC field. */ +#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Msk (0x1UL << QDEC_SHORTS_SAMPLERDY_READCLRACC_Pos) /*!< Bit mask of SAMPLERDY_READCLRACC field. */ +#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Disabled (0UL) /*!< Disable shortcut */ +#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 5 : Shortcut between DBLRDY event and STOP task */ +#define QDEC_SHORTS_DBLRDY_STOP_Pos (5UL) /*!< Position of DBLRDY_STOP field. */ +#define QDEC_SHORTS_DBLRDY_STOP_Msk (0x1UL << QDEC_SHORTS_DBLRDY_STOP_Pos) /*!< Bit mask of DBLRDY_STOP field. */ +#define QDEC_SHORTS_DBLRDY_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define QDEC_SHORTS_DBLRDY_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 4 : Shortcut between DBLRDY event and RDCLRDBL task */ +#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Pos (4UL) /*!< Position of DBLRDY_RDCLRDBL field. */ +#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Msk (0x1UL << QDEC_SHORTS_DBLRDY_RDCLRDBL_Pos) /*!< Bit mask of DBLRDY_RDCLRDBL field. */ +#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Disabled (0UL) /*!< Disable shortcut */ +#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 3 : Shortcut between REPORTRDY event and STOP task */ +#define QDEC_SHORTS_REPORTRDY_STOP_Pos (3UL) /*!< Position of REPORTRDY_STOP field. */ +#define QDEC_SHORTS_REPORTRDY_STOP_Msk (0x1UL << QDEC_SHORTS_REPORTRDY_STOP_Pos) /*!< Bit mask of REPORTRDY_STOP field. */ +#define QDEC_SHORTS_REPORTRDY_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define QDEC_SHORTS_REPORTRDY_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 2 : Shortcut between REPORTRDY event and RDCLRACC task */ +#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Pos (2UL) /*!< Position of REPORTRDY_RDCLRACC field. */ +#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Msk (0x1UL << QDEC_SHORTS_REPORTRDY_RDCLRACC_Pos) /*!< Bit mask of REPORTRDY_RDCLRACC field. */ +#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Disabled (0UL) /*!< Disable shortcut */ +#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 1 : Shortcut between SAMPLERDY event and STOP task */ +#define QDEC_SHORTS_SAMPLERDY_STOP_Pos (1UL) /*!< Position of SAMPLERDY_STOP field. */ +#define QDEC_SHORTS_SAMPLERDY_STOP_Msk (0x1UL << QDEC_SHORTS_SAMPLERDY_STOP_Pos) /*!< Bit mask of SAMPLERDY_STOP field. */ +#define QDEC_SHORTS_SAMPLERDY_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define QDEC_SHORTS_SAMPLERDY_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 0 : Shortcut between REPORTRDY event and READCLRACC task */ +#define QDEC_SHORTS_REPORTRDY_READCLRACC_Pos (0UL) /*!< Position of REPORTRDY_READCLRACC field. */ +#define QDEC_SHORTS_REPORTRDY_READCLRACC_Msk (0x1UL << QDEC_SHORTS_REPORTRDY_READCLRACC_Pos) /*!< Bit mask of REPORTRDY_READCLRACC field. */ +#define QDEC_SHORTS_REPORTRDY_READCLRACC_Disabled (0UL) /*!< Disable shortcut */ +#define QDEC_SHORTS_REPORTRDY_READCLRACC_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: QDEC_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 4 : Write '1' to enable interrupt for STOPPED event */ +#define QDEC_INTENSET_STOPPED_Pos (4UL) /*!< Position of STOPPED field. */ +#define QDEC_INTENSET_STOPPED_Msk (0x1UL << QDEC_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define QDEC_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to enable interrupt for DBLRDY event */ +#define QDEC_INTENSET_DBLRDY_Pos (3UL) /*!< Position of DBLRDY field. */ +#define QDEC_INTENSET_DBLRDY_Msk (0x1UL << QDEC_INTENSET_DBLRDY_Pos) /*!< Bit mask of DBLRDY field. */ +#define QDEC_INTENSET_DBLRDY_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENSET_DBLRDY_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENSET_DBLRDY_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to enable interrupt for ACCOF event */ +#define QDEC_INTENSET_ACCOF_Pos (2UL) /*!< Position of ACCOF field. */ +#define QDEC_INTENSET_ACCOF_Msk (0x1UL << QDEC_INTENSET_ACCOF_Pos) /*!< Bit mask of ACCOF field. */ +#define QDEC_INTENSET_ACCOF_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENSET_ACCOF_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENSET_ACCOF_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable interrupt for REPORTRDY event */ +#define QDEC_INTENSET_REPORTRDY_Pos (1UL) /*!< Position of REPORTRDY field. */ +#define QDEC_INTENSET_REPORTRDY_Msk (0x1UL << QDEC_INTENSET_REPORTRDY_Pos) /*!< Bit mask of REPORTRDY field. */ +#define QDEC_INTENSET_REPORTRDY_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENSET_REPORTRDY_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENSET_REPORTRDY_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to enable interrupt for SAMPLERDY event */ +#define QDEC_INTENSET_SAMPLERDY_Pos (0UL) /*!< Position of SAMPLERDY field. */ +#define QDEC_INTENSET_SAMPLERDY_Msk (0x1UL << QDEC_INTENSET_SAMPLERDY_Pos) /*!< Bit mask of SAMPLERDY field. */ +#define QDEC_INTENSET_SAMPLERDY_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENSET_SAMPLERDY_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENSET_SAMPLERDY_Set (1UL) /*!< Enable */ + +/* Register: QDEC_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 4 : Write '1' to disable interrupt for STOPPED event */ +#define QDEC_INTENCLR_STOPPED_Pos (4UL) /*!< Position of STOPPED field. */ +#define QDEC_INTENCLR_STOPPED_Msk (0x1UL << QDEC_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define QDEC_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to disable interrupt for DBLRDY event */ +#define QDEC_INTENCLR_DBLRDY_Pos (3UL) /*!< Position of DBLRDY field. */ +#define QDEC_INTENCLR_DBLRDY_Msk (0x1UL << QDEC_INTENCLR_DBLRDY_Pos) /*!< Bit mask of DBLRDY field. */ +#define QDEC_INTENCLR_DBLRDY_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENCLR_DBLRDY_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENCLR_DBLRDY_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to disable interrupt for ACCOF event */ +#define QDEC_INTENCLR_ACCOF_Pos (2UL) /*!< Position of ACCOF field. */ +#define QDEC_INTENCLR_ACCOF_Msk (0x1UL << QDEC_INTENCLR_ACCOF_Pos) /*!< Bit mask of ACCOF field. */ +#define QDEC_INTENCLR_ACCOF_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENCLR_ACCOF_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENCLR_ACCOF_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable interrupt for REPORTRDY event */ +#define QDEC_INTENCLR_REPORTRDY_Pos (1UL) /*!< Position of REPORTRDY field. */ +#define QDEC_INTENCLR_REPORTRDY_Msk (0x1UL << QDEC_INTENCLR_REPORTRDY_Pos) /*!< Bit mask of REPORTRDY field. */ +#define QDEC_INTENCLR_REPORTRDY_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENCLR_REPORTRDY_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENCLR_REPORTRDY_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to disable interrupt for SAMPLERDY event */ +#define QDEC_INTENCLR_SAMPLERDY_Pos (0UL) /*!< Position of SAMPLERDY field. */ +#define QDEC_INTENCLR_SAMPLERDY_Msk (0x1UL << QDEC_INTENCLR_SAMPLERDY_Pos) /*!< Bit mask of SAMPLERDY field. */ +#define QDEC_INTENCLR_SAMPLERDY_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENCLR_SAMPLERDY_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENCLR_SAMPLERDY_Clear (1UL) /*!< Disable */ + +/* Register: QDEC_ENABLE */ +/* Description: Enable the quadrature decoder */ + +/* Bit 0 : Enable or disable the quadrature decoder */ +#define QDEC_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define QDEC_ENABLE_ENABLE_Msk (0x1UL << QDEC_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define QDEC_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ +#define QDEC_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */ + +/* Register: QDEC_LEDPOL */ +/* Description: LED output pin polarity */ + +/* Bit 0 : LED output pin polarity */ +#define QDEC_LEDPOL_LEDPOL_Pos (0UL) /*!< Position of LEDPOL field. */ +#define QDEC_LEDPOL_LEDPOL_Msk (0x1UL << QDEC_LEDPOL_LEDPOL_Pos) /*!< Bit mask of LEDPOL field. */ +#define QDEC_LEDPOL_LEDPOL_ActiveLow (0UL) /*!< Led active on output pin low */ +#define QDEC_LEDPOL_LEDPOL_ActiveHigh (1UL) /*!< Led active on output pin high */ + +/* Register: QDEC_SAMPLEPER */ +/* Description: Sample period */ + +/* Bits 3..0 : Sample period. The SAMPLE register will be updated for every new sample */ +#define QDEC_SAMPLEPER_SAMPLEPER_Pos (0UL) /*!< Position of SAMPLEPER field. */ +#define QDEC_SAMPLEPER_SAMPLEPER_Msk (0xFUL << QDEC_SAMPLEPER_SAMPLEPER_Pos) /*!< Bit mask of SAMPLEPER field. */ +#define QDEC_SAMPLEPER_SAMPLEPER_128us (0UL) /*!< 128 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_256us (1UL) /*!< 256 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_512us (2UL) /*!< 512 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_1024us (3UL) /*!< 1024 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_2048us (4UL) /*!< 2048 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_4096us (5UL) /*!< 4096 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_8192us (6UL) /*!< 8192 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_16384us (7UL) /*!< 16384 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_32ms (8UL) /*!< 32768 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_65ms (9UL) /*!< 65536 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_131ms (10UL) /*!< 131072 us */ + +/* Register: QDEC_SAMPLE */ +/* Description: Motion sample value */ + +/* Bits 31..0 : Last motion sample */ +#define QDEC_SAMPLE_SAMPLE_Pos (0UL) /*!< Position of SAMPLE field. */ +#define QDEC_SAMPLE_SAMPLE_Msk (0xFFFFFFFFUL << QDEC_SAMPLE_SAMPLE_Pos) /*!< Bit mask of SAMPLE field. */ + +/* Register: QDEC_REPORTPER */ +/* Description: Number of samples to be taken before REPORTRDY and DBLRDY events can be generated */ + +/* Bits 3..0 : Specifies the number of samples to be accumulated in the ACC register before the REPORTRDY and DBLRDY events can be generated */ +#define QDEC_REPORTPER_REPORTPER_Pos (0UL) /*!< Position of REPORTPER field. */ +#define QDEC_REPORTPER_REPORTPER_Msk (0xFUL << QDEC_REPORTPER_REPORTPER_Pos) /*!< Bit mask of REPORTPER field. */ +#define QDEC_REPORTPER_REPORTPER_10Smpl (0UL) /*!< 10 samples / report */ +#define QDEC_REPORTPER_REPORTPER_40Smpl (1UL) /*!< 40 samples / report */ +#define QDEC_REPORTPER_REPORTPER_80Smpl (2UL) /*!< 80 samples / report */ +#define QDEC_REPORTPER_REPORTPER_120Smpl (3UL) /*!< 120 samples / report */ +#define QDEC_REPORTPER_REPORTPER_160Smpl (4UL) /*!< 160 samples / report */ +#define QDEC_REPORTPER_REPORTPER_200Smpl (5UL) /*!< 200 samples / report */ +#define QDEC_REPORTPER_REPORTPER_240Smpl (6UL) /*!< 240 samples / report */ +#define QDEC_REPORTPER_REPORTPER_280Smpl (7UL) /*!< 280 samples / report */ +#define QDEC_REPORTPER_REPORTPER_1Smpl (8UL) /*!< 1 sample / report */ + +/* Register: QDEC_ACC */ +/* Description: Register accumulating the valid transitions */ + +/* Bits 31..0 : Register accumulating all valid samples (not double transition) read from the SAMPLE register */ +#define QDEC_ACC_ACC_Pos (0UL) /*!< Position of ACC field. */ +#define QDEC_ACC_ACC_Msk (0xFFFFFFFFUL << QDEC_ACC_ACC_Pos) /*!< Bit mask of ACC field. */ + +/* Register: QDEC_ACCREAD */ +/* Description: Snapshot of the ACC register, updated by the READCLRACC or RDCLRACC task */ + +/* Bits 31..0 : Snapshot of the ACC register. */ +#define QDEC_ACCREAD_ACCREAD_Pos (0UL) /*!< Position of ACCREAD field. */ +#define QDEC_ACCREAD_ACCREAD_Msk (0xFFFFFFFFUL << QDEC_ACCREAD_ACCREAD_Pos) /*!< Bit mask of ACCREAD field. */ + +/* Register: QDEC_PSEL_LED */ +/* Description: Pin select for LED signal */ + +/* Bit 31 : Connection */ +#define QDEC_PSEL_LED_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define QDEC_PSEL_LED_CONNECT_Msk (0x1UL << QDEC_PSEL_LED_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define QDEC_PSEL_LED_CONNECT_Connected (0UL) /*!< Connect */ +#define QDEC_PSEL_LED_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define QDEC_PSEL_LED_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define QDEC_PSEL_LED_PORT_Msk (0x1UL << QDEC_PSEL_LED_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define QDEC_PSEL_LED_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define QDEC_PSEL_LED_PIN_Msk (0x1FUL << QDEC_PSEL_LED_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: QDEC_PSEL_A */ +/* Description: Pin select for A signal */ + +/* Bit 31 : Connection */ +#define QDEC_PSEL_A_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define QDEC_PSEL_A_CONNECT_Msk (0x1UL << QDEC_PSEL_A_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define QDEC_PSEL_A_CONNECT_Connected (0UL) /*!< Connect */ +#define QDEC_PSEL_A_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define QDEC_PSEL_A_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define QDEC_PSEL_A_PORT_Msk (0x1UL << QDEC_PSEL_A_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define QDEC_PSEL_A_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define QDEC_PSEL_A_PIN_Msk (0x1FUL << QDEC_PSEL_A_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: QDEC_PSEL_B */ +/* Description: Pin select for B signal */ + +/* Bit 31 : Connection */ +#define QDEC_PSEL_B_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define QDEC_PSEL_B_CONNECT_Msk (0x1UL << QDEC_PSEL_B_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define QDEC_PSEL_B_CONNECT_Connected (0UL) /*!< Connect */ +#define QDEC_PSEL_B_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define QDEC_PSEL_B_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define QDEC_PSEL_B_PORT_Msk (0x1UL << QDEC_PSEL_B_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define QDEC_PSEL_B_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define QDEC_PSEL_B_PIN_Msk (0x1FUL << QDEC_PSEL_B_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: QDEC_DBFEN */ +/* Description: Enable input debounce filters */ + +/* Bit 0 : Enable input debounce filters */ +#define QDEC_DBFEN_DBFEN_Pos (0UL) /*!< Position of DBFEN field. */ +#define QDEC_DBFEN_DBFEN_Msk (0x1UL << QDEC_DBFEN_DBFEN_Pos) /*!< Bit mask of DBFEN field. */ +#define QDEC_DBFEN_DBFEN_Disabled (0UL) /*!< Debounce input filters disabled */ +#define QDEC_DBFEN_DBFEN_Enabled (1UL) /*!< Debounce input filters enabled */ + +/* Register: QDEC_LEDPRE */ +/* Description: Time period the LED is switched ON prior to sampling */ + +/* Bits 8..0 : Period in us the LED is switched on prior to sampling */ +#define QDEC_LEDPRE_LEDPRE_Pos (0UL) /*!< Position of LEDPRE field. */ +#define QDEC_LEDPRE_LEDPRE_Msk (0x1FFUL << QDEC_LEDPRE_LEDPRE_Pos) /*!< Bit mask of LEDPRE field. */ + +/* Register: QDEC_ACCDBL */ +/* Description: Register accumulating the number of detected double transitions */ + +/* Bits 3..0 : Register accumulating the number of detected double or illegal transitions. ( SAMPLE = 2 ). */ +#define QDEC_ACCDBL_ACCDBL_Pos (0UL) /*!< Position of ACCDBL field. */ +#define QDEC_ACCDBL_ACCDBL_Msk (0xFUL << QDEC_ACCDBL_ACCDBL_Pos) /*!< Bit mask of ACCDBL field. */ + +/* Register: QDEC_ACCDBLREAD */ +/* Description: Snapshot of the ACCDBL, updated by the READCLRACC or RDCLRDBL task */ + +/* Bits 3..0 : Snapshot of the ACCDBL register. This field is updated when the READCLRACC or RDCLRDBL task is triggered. */ +#define QDEC_ACCDBLREAD_ACCDBLREAD_Pos (0UL) /*!< Position of ACCDBLREAD field. */ +#define QDEC_ACCDBLREAD_ACCDBLREAD_Msk (0xFUL << QDEC_ACCDBLREAD_ACCDBLREAD_Pos) /*!< Bit mask of ACCDBLREAD field. */ + + +/* Peripheral: QSPI */ +/* Description: External flash interface */ + +/* Register: QSPI_TASKS_ACTIVATE */ +/* Description: Activate QSPI interface */ + +/* Bit 0 : */ +#define QSPI_TASKS_ACTIVATE_TASKS_ACTIVATE_Pos (0UL) /*!< Position of TASKS_ACTIVATE field. */ +#define QSPI_TASKS_ACTIVATE_TASKS_ACTIVATE_Msk (0x1UL << QSPI_TASKS_ACTIVATE_TASKS_ACTIVATE_Pos) /*!< Bit mask of TASKS_ACTIVATE field. */ + +/* Register: QSPI_TASKS_READSTART */ +/* Description: Start transfer from external flash memory to internal RAM */ + +/* Bit 0 : */ +#define QSPI_TASKS_READSTART_TASKS_READSTART_Pos (0UL) /*!< Position of TASKS_READSTART field. */ +#define QSPI_TASKS_READSTART_TASKS_READSTART_Msk (0x1UL << QSPI_TASKS_READSTART_TASKS_READSTART_Pos) /*!< Bit mask of TASKS_READSTART field. */ + +/* Register: QSPI_TASKS_WRITESTART */ +/* Description: Start transfer from internal RAM to external flash memory */ + +/* Bit 0 : */ +#define QSPI_TASKS_WRITESTART_TASKS_WRITESTART_Pos (0UL) /*!< Position of TASKS_WRITESTART field. */ +#define QSPI_TASKS_WRITESTART_TASKS_WRITESTART_Msk (0x1UL << QSPI_TASKS_WRITESTART_TASKS_WRITESTART_Pos) /*!< Bit mask of TASKS_WRITESTART field. */ + +/* Register: QSPI_TASKS_ERASESTART */ +/* Description: Start external flash memory erase operation */ + +/* Bit 0 : */ +#define QSPI_TASKS_ERASESTART_TASKS_ERASESTART_Pos (0UL) /*!< Position of TASKS_ERASESTART field. */ +#define QSPI_TASKS_ERASESTART_TASKS_ERASESTART_Msk (0x1UL << QSPI_TASKS_ERASESTART_TASKS_ERASESTART_Pos) /*!< Bit mask of TASKS_ERASESTART field. */ + +/* Register: QSPI_TASKS_DEACTIVATE */ +/* Description: Deactivate QSPI interface */ + +/* Bit 0 : */ +#define QSPI_TASKS_DEACTIVATE_TASKS_DEACTIVATE_Pos (0UL) /*!< Position of TASKS_DEACTIVATE field. */ +#define QSPI_TASKS_DEACTIVATE_TASKS_DEACTIVATE_Msk (0x1UL << QSPI_TASKS_DEACTIVATE_TASKS_DEACTIVATE_Pos) /*!< Bit mask of TASKS_DEACTIVATE field. */ + +/* Register: QSPI_EVENTS_READY */ +/* Description: QSPI peripheral is ready. This event will be generated as a response to any QSPI task. */ + +/* Bit 0 : */ +#define QSPI_EVENTS_READY_EVENTS_READY_Pos (0UL) /*!< Position of EVENTS_READY field. */ +#define QSPI_EVENTS_READY_EVENTS_READY_Msk (0x1UL << QSPI_EVENTS_READY_EVENTS_READY_Pos) /*!< Bit mask of EVENTS_READY field. */ + +/* Register: QSPI_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 0 : Enable or disable interrupt for READY event */ +#define QSPI_INTEN_READY_Pos (0UL) /*!< Position of READY field. */ +#define QSPI_INTEN_READY_Msk (0x1UL << QSPI_INTEN_READY_Pos) /*!< Bit mask of READY field. */ +#define QSPI_INTEN_READY_Disabled (0UL) /*!< Disable */ +#define QSPI_INTEN_READY_Enabled (1UL) /*!< Enable */ + +/* Register: QSPI_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 0 : Write '1' to enable interrupt for READY event */ +#define QSPI_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */ +#define QSPI_INTENSET_READY_Msk (0x1UL << QSPI_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ +#define QSPI_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */ +#define QSPI_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */ +#define QSPI_INTENSET_READY_Set (1UL) /*!< Enable */ + +/* Register: QSPI_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 0 : Write '1' to disable interrupt for READY event */ +#define QSPI_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */ +#define QSPI_INTENCLR_READY_Msk (0x1UL << QSPI_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ +#define QSPI_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */ +#define QSPI_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */ +#define QSPI_INTENCLR_READY_Clear (1UL) /*!< Disable */ + +/* Register: QSPI_ENABLE */ +/* Description: Enable QSPI peripheral and acquire the pins selected in PSELn registers */ + +/* Bit 0 : Enable or disable QSPI */ +#define QSPI_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define QSPI_ENABLE_ENABLE_Msk (0x1UL << QSPI_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define QSPI_ENABLE_ENABLE_Disabled (0UL) /*!< Disable QSPI */ +#define QSPI_ENABLE_ENABLE_Enabled (1UL) /*!< Enable QSPI */ + +/* Register: QSPI_READ_SRC */ +/* Description: Flash memory source address */ + +/* Bits 31..0 : Word-aligned flash memory source address. */ +#define QSPI_READ_SRC_SRC_Pos (0UL) /*!< Position of SRC field. */ +#define QSPI_READ_SRC_SRC_Msk (0xFFFFFFFFUL << QSPI_READ_SRC_SRC_Pos) /*!< Bit mask of SRC field. */ + +/* Register: QSPI_READ_DST */ +/* Description: RAM destination address */ + +/* Bits 31..0 : Word-aligned RAM destination address. */ +#define QSPI_READ_DST_DST_Pos (0UL) /*!< Position of DST field. */ +#define QSPI_READ_DST_DST_Msk (0xFFFFFFFFUL << QSPI_READ_DST_DST_Pos) /*!< Bit mask of DST field. */ + +/* Register: QSPI_READ_CNT */ +/* Description: Read transfer length */ + +/* Bits 20..0 : Read transfer length in number of bytes. The length must be a multiple of 4 bytes. */ +#define QSPI_READ_CNT_CNT_Pos (0UL) /*!< Position of CNT field. */ +#define QSPI_READ_CNT_CNT_Msk (0x1FFFFFUL << QSPI_READ_CNT_CNT_Pos) /*!< Bit mask of CNT field. */ + +/* Register: QSPI_WRITE_DST */ +/* Description: Flash destination address */ + +/* Bits 31..0 : Word-aligned flash destination address. */ +#define QSPI_WRITE_DST_DST_Pos (0UL) /*!< Position of DST field. */ +#define QSPI_WRITE_DST_DST_Msk (0xFFFFFFFFUL << QSPI_WRITE_DST_DST_Pos) /*!< Bit mask of DST field. */ + +/* Register: QSPI_WRITE_SRC */ +/* Description: RAM source address */ + +/* Bits 31..0 : Word-aligned RAM source address. */ +#define QSPI_WRITE_SRC_SRC_Pos (0UL) /*!< Position of SRC field. */ +#define QSPI_WRITE_SRC_SRC_Msk (0xFFFFFFFFUL << QSPI_WRITE_SRC_SRC_Pos) /*!< Bit mask of SRC field. */ + +/* Register: QSPI_WRITE_CNT */ +/* Description: Write transfer length */ + +/* Bits 20..0 : Write transfer length in number of bytes. The length must be a multiple of 4 bytes. */ +#define QSPI_WRITE_CNT_CNT_Pos (0UL) /*!< Position of CNT field. */ +#define QSPI_WRITE_CNT_CNT_Msk (0x1FFFFFUL << QSPI_WRITE_CNT_CNT_Pos) /*!< Bit mask of CNT field. */ + +/* Register: QSPI_ERASE_PTR */ +/* Description: Start address of flash block to be erased */ + +/* Bits 31..0 : Word-aligned start address of block to be erased. */ +#define QSPI_ERASE_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define QSPI_ERASE_PTR_PTR_Msk (0xFFFFFFFFUL << QSPI_ERASE_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: QSPI_ERASE_LEN */ +/* Description: Size of block to be erased. */ + +/* Bits 1..0 : LEN */ +#define QSPI_ERASE_LEN_LEN_Pos (0UL) /*!< Position of LEN field. */ +#define QSPI_ERASE_LEN_LEN_Msk (0x3UL << QSPI_ERASE_LEN_LEN_Pos) /*!< Bit mask of LEN field. */ +#define QSPI_ERASE_LEN_LEN_4KB (0UL) /*!< Erase 4 kB block (flash command 0x20) */ +#define QSPI_ERASE_LEN_LEN_64KB (1UL) /*!< Erase 64 kB block (flash command 0xD8) */ +#define QSPI_ERASE_LEN_LEN_All (2UL) /*!< Erase all (flash command 0xC7) */ + +/* Register: QSPI_PSEL_SCK */ +/* Description: Pin select for serial clock SCK */ + +/* Bit 31 : Connection */ +#define QSPI_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define QSPI_PSEL_SCK_CONNECT_Msk (0x1UL << QSPI_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define QSPI_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */ +#define QSPI_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define QSPI_PSEL_SCK_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define QSPI_PSEL_SCK_PORT_Msk (0x1UL << QSPI_PSEL_SCK_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define QSPI_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define QSPI_PSEL_SCK_PIN_Msk (0x1FUL << QSPI_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: QSPI_PSEL_CSN */ +/* Description: Pin select for chip select signal CSN. */ + +/* Bit 31 : Connection */ +#define QSPI_PSEL_CSN_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define QSPI_PSEL_CSN_CONNECT_Msk (0x1UL << QSPI_PSEL_CSN_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define QSPI_PSEL_CSN_CONNECT_Connected (0UL) /*!< Connect */ +#define QSPI_PSEL_CSN_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define QSPI_PSEL_CSN_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define QSPI_PSEL_CSN_PORT_Msk (0x1UL << QSPI_PSEL_CSN_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define QSPI_PSEL_CSN_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define QSPI_PSEL_CSN_PIN_Msk (0x1FUL << QSPI_PSEL_CSN_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: QSPI_PSEL_IO0 */ +/* Description: Pin select for serial data MOSI/IO0. */ + +/* Bit 31 : Connection */ +#define QSPI_PSEL_IO0_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define QSPI_PSEL_IO0_CONNECT_Msk (0x1UL << QSPI_PSEL_IO0_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define QSPI_PSEL_IO0_CONNECT_Connected (0UL) /*!< Connect */ +#define QSPI_PSEL_IO0_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define QSPI_PSEL_IO0_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define QSPI_PSEL_IO0_PORT_Msk (0x1UL << QSPI_PSEL_IO0_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define QSPI_PSEL_IO0_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define QSPI_PSEL_IO0_PIN_Msk (0x1FUL << QSPI_PSEL_IO0_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: QSPI_PSEL_IO1 */ +/* Description: Pin select for serial data MISO/IO1. */ + +/* Bit 31 : Connection */ +#define QSPI_PSEL_IO1_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define QSPI_PSEL_IO1_CONNECT_Msk (0x1UL << QSPI_PSEL_IO1_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define QSPI_PSEL_IO1_CONNECT_Connected (0UL) /*!< Connect */ +#define QSPI_PSEL_IO1_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define QSPI_PSEL_IO1_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define QSPI_PSEL_IO1_PORT_Msk (0x1UL << QSPI_PSEL_IO1_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define QSPI_PSEL_IO1_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define QSPI_PSEL_IO1_PIN_Msk (0x1FUL << QSPI_PSEL_IO1_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: QSPI_PSEL_IO2 */ +/* Description: Pin select for serial data IO2. */ + +/* Bit 31 : Connection */ +#define QSPI_PSEL_IO2_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define QSPI_PSEL_IO2_CONNECT_Msk (0x1UL << QSPI_PSEL_IO2_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define QSPI_PSEL_IO2_CONNECT_Connected (0UL) /*!< Connect */ +#define QSPI_PSEL_IO2_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define QSPI_PSEL_IO2_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define QSPI_PSEL_IO2_PORT_Msk (0x1UL << QSPI_PSEL_IO2_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define QSPI_PSEL_IO2_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define QSPI_PSEL_IO2_PIN_Msk (0x1FUL << QSPI_PSEL_IO2_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: QSPI_PSEL_IO3 */ +/* Description: Pin select for serial data IO3. */ + +/* Bit 31 : Connection */ +#define QSPI_PSEL_IO3_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define QSPI_PSEL_IO3_CONNECT_Msk (0x1UL << QSPI_PSEL_IO3_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define QSPI_PSEL_IO3_CONNECT_Connected (0UL) /*!< Connect */ +#define QSPI_PSEL_IO3_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define QSPI_PSEL_IO3_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define QSPI_PSEL_IO3_PORT_Msk (0x1UL << QSPI_PSEL_IO3_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define QSPI_PSEL_IO3_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define QSPI_PSEL_IO3_PIN_Msk (0x1FUL << QSPI_PSEL_IO3_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: QSPI_XIPOFFSET */ +/* Description: Address offset into the external memory for Execute in Place operation. */ + +/* Bits 31..0 : Address offset into the external memory for Execute in Place operation. Value must be a multiple of 4. */ +#define QSPI_XIPOFFSET_XIPOFFSET_Pos (0UL) /*!< Position of XIPOFFSET field. */ +#define QSPI_XIPOFFSET_XIPOFFSET_Msk (0xFFFFFFFFUL << QSPI_XIPOFFSET_XIPOFFSET_Pos) /*!< Bit mask of XIPOFFSET field. */ + +/* Register: QSPI_IFCONFIG0 */ +/* Description: Interface configuration. */ + +/* Bit 12 : Page size for commands PP, PP2O, PP4O and PP4IO. */ +#define QSPI_IFCONFIG0_PPSIZE_Pos (12UL) /*!< Position of PPSIZE field. */ +#define QSPI_IFCONFIG0_PPSIZE_Msk (0x1UL << QSPI_IFCONFIG0_PPSIZE_Pos) /*!< Bit mask of PPSIZE field. */ +#define QSPI_IFCONFIG0_PPSIZE_256Bytes (0UL) /*!< 256 bytes. */ +#define QSPI_IFCONFIG0_PPSIZE_512Bytes (1UL) /*!< 512 bytes. */ + +/* Bit 7 : Enable deep power-down mode (DPM) feature. */ +#define QSPI_IFCONFIG0_DPMENABLE_Pos (7UL) /*!< Position of DPMENABLE field. */ +#define QSPI_IFCONFIG0_DPMENABLE_Msk (0x1UL << QSPI_IFCONFIG0_DPMENABLE_Pos) /*!< Bit mask of DPMENABLE field. */ +#define QSPI_IFCONFIG0_DPMENABLE_Disable (0UL) /*!< Disable DPM feature. */ +#define QSPI_IFCONFIG0_DPMENABLE_Enable (1UL) /*!< Enable DPM feature. */ + +/* Bit 6 : Addressing mode. */ +#define QSPI_IFCONFIG0_ADDRMODE_Pos (6UL) /*!< Position of ADDRMODE field. */ +#define QSPI_IFCONFIG0_ADDRMODE_Msk (0x1UL << QSPI_IFCONFIG0_ADDRMODE_Pos) /*!< Bit mask of ADDRMODE field. */ +#define QSPI_IFCONFIG0_ADDRMODE_24BIT (0UL) /*!< 24-bit addressing. */ +#define QSPI_IFCONFIG0_ADDRMODE_32BIT (1UL) /*!< 32-bit addressing. */ + +/* Bits 5..3 : Configure number of data lines and opcode used for writing. */ +#define QSPI_IFCONFIG0_WRITEOC_Pos (3UL) /*!< Position of WRITEOC field. */ +#define QSPI_IFCONFIG0_WRITEOC_Msk (0x7UL << QSPI_IFCONFIG0_WRITEOC_Pos) /*!< Bit mask of WRITEOC field. */ +#define QSPI_IFCONFIG0_WRITEOC_PP (0UL) /*!< Single data line SPI. PP (opcode 0x02). */ +#define QSPI_IFCONFIG0_WRITEOC_PP2O (1UL) /*!< Dual data line SPI. PP2O (opcode 0xA2). */ +#define QSPI_IFCONFIG0_WRITEOC_PP4O (2UL) /*!< Quad data line SPI. PP4O (opcode 0x32). */ +#define QSPI_IFCONFIG0_WRITEOC_PP4IO (3UL) /*!< Quad data line SPI. PP4IO (opcode 0x38). */ + +/* Bits 2..0 : Configure number of data lines and opcode used for reading. */ +#define QSPI_IFCONFIG0_READOC_Pos (0UL) /*!< Position of READOC field. */ +#define QSPI_IFCONFIG0_READOC_Msk (0x7UL << QSPI_IFCONFIG0_READOC_Pos) /*!< Bit mask of READOC field. */ +#define QSPI_IFCONFIG0_READOC_FASTREAD (0UL) /*!< Single data line SPI. FAST_READ (opcode 0x0B). */ +#define QSPI_IFCONFIG0_READOC_READ2O (1UL) /*!< Dual data line SPI. READ2O (opcode 0x3B). */ +#define QSPI_IFCONFIG0_READOC_READ2IO (2UL) /*!< Dual data line SPI. READ2IO (opcode 0xBB). */ +#define QSPI_IFCONFIG0_READOC_READ4O (3UL) /*!< Quad data line SPI. READ4O (opcode 0x6B). */ +#define QSPI_IFCONFIG0_READOC_READ4IO (4UL) /*!< Quad data line SPI. READ4IO (opcode 0xEB). */ + +/* Register: QSPI_IFCONFIG1 */ +/* Description: Interface configuration. */ + +/* Bits 31..28 : SCK frequency is given as 32 MHz / (SCKFREQ + 1). */ +#define QSPI_IFCONFIG1_SCKFREQ_Pos (28UL) /*!< Position of SCKFREQ field. */ +#define QSPI_IFCONFIG1_SCKFREQ_Msk (0xFUL << QSPI_IFCONFIG1_SCKFREQ_Pos) /*!< Bit mask of SCKFREQ field. */ + +/* Bit 25 : Select SPI mode. */ +#define QSPI_IFCONFIG1_SPIMODE_Pos (25UL) /*!< Position of SPIMODE field. */ +#define QSPI_IFCONFIG1_SPIMODE_Msk (0x1UL << QSPI_IFCONFIG1_SPIMODE_Pos) /*!< Bit mask of SPIMODE field. */ +#define QSPI_IFCONFIG1_SPIMODE_MODE0 (0UL) /*!< Mode 0: Data are captured on the clock rising edge and data is output on a falling edge. Base level of clock is 0 (CPOL=0, CPHA=0). */ +#define QSPI_IFCONFIG1_SPIMODE_MODE3 (1UL) /*!< Mode 3: Data are captured on the clock falling edge and data is output on a rising edge. Base level of clock is 1 (CPOL=1, CPHA=1). */ + +/* Bit 24 : Enter/exit deep power-down mode (DPM) for external flash memory. */ +#define QSPI_IFCONFIG1_DPMEN_Pos (24UL) /*!< Position of DPMEN field. */ +#define QSPI_IFCONFIG1_DPMEN_Msk (0x1UL << QSPI_IFCONFIG1_DPMEN_Pos) /*!< Bit mask of DPMEN field. */ +#define QSPI_IFCONFIG1_DPMEN_Exit (0UL) /*!< Exit DPM. */ +#define QSPI_IFCONFIG1_DPMEN_Enter (1UL) /*!< Enter DPM. */ + +/* Bits 7..0 : Minimum amount of time that the CSN pin must stay high before it can go low again. Value is specified in number of 16 MHz periods (62.5 ns). */ +#define QSPI_IFCONFIG1_SCKDELAY_Pos (0UL) /*!< Position of SCKDELAY field. */ +#define QSPI_IFCONFIG1_SCKDELAY_Msk (0xFFUL << QSPI_IFCONFIG1_SCKDELAY_Pos) /*!< Bit mask of SCKDELAY field. */ + +/* Register: QSPI_STATUS */ +/* Description: Status register. */ + +/* Bits 31..24 : Value of external flash device Status Register. When the external flash has two bytes status register this field includes the value of the low byte. */ +#define QSPI_STATUS_SREG_Pos (24UL) /*!< Position of SREG field. */ +#define QSPI_STATUS_SREG_Msk (0xFFUL << QSPI_STATUS_SREG_Pos) /*!< Bit mask of SREG field. */ + +/* Bit 3 : Ready status. */ +#define QSPI_STATUS_READY_Pos (3UL) /*!< Position of READY field. */ +#define QSPI_STATUS_READY_Msk (0x1UL << QSPI_STATUS_READY_Pos) /*!< Bit mask of READY field. */ +#define QSPI_STATUS_READY_BUSY (0UL) /*!< QSPI peripheral is busy. It is not allowed to trigger any new tasks, writing custom instructions or enter/exit DPM. */ +#define QSPI_STATUS_READY_READY (1UL) /*!< QSPI peripheral is ready. It is allowed to trigger new tasks, writing custom instructions or enter/exit DPM. */ + +/* Bit 2 : Deep power-down mode (DPM) status of external flash. */ +#define QSPI_STATUS_DPM_Pos (2UL) /*!< Position of DPM field. */ +#define QSPI_STATUS_DPM_Msk (0x1UL << QSPI_STATUS_DPM_Pos) /*!< Bit mask of DPM field. */ +#define QSPI_STATUS_DPM_Disabled (0UL) /*!< External flash is not in DPM. */ +#define QSPI_STATUS_DPM_Enabled (1UL) /*!< External flash is in DPM. */ + +/* Register: QSPI_DPMDUR */ +/* Description: Set the duration required to enter/exit deep power-down mode (DPM). */ + +/* Bits 31..16 : Duration needed by external flash to exit DPM. Duration is given as EXIT * 256 * 62.5 ns. */ +#define QSPI_DPMDUR_EXIT_Pos (16UL) /*!< Position of EXIT field. */ +#define QSPI_DPMDUR_EXIT_Msk (0xFFFFUL << QSPI_DPMDUR_EXIT_Pos) /*!< Bit mask of EXIT field. */ + +/* Bits 15..0 : Duration needed by external flash to enter DPM. Duration is given as ENTER * 256 * 62.5 ns. */ +#define QSPI_DPMDUR_ENTER_Pos (0UL) /*!< Position of ENTER field. */ +#define QSPI_DPMDUR_ENTER_Msk (0xFFFFUL << QSPI_DPMDUR_ENTER_Pos) /*!< Bit mask of ENTER field. */ + +/* Register: QSPI_ADDRCONF */ +/* Description: Extended address configuration. */ + +/* Bit 27 : Send WREN (write enable opcode 0x06) before instruction. */ +#define QSPI_ADDRCONF_WREN_Pos (27UL) /*!< Position of WREN field. */ +#define QSPI_ADDRCONF_WREN_Msk (0x1UL << QSPI_ADDRCONF_WREN_Pos) /*!< Bit mask of WREN field. */ +#define QSPI_ADDRCONF_WREN_Disable (0UL) /*!< Do not send WREN. */ +#define QSPI_ADDRCONF_WREN_Enable (1UL) /*!< Send WREN. */ + +/* Bit 26 : Wait for write complete before sending command. */ +#define QSPI_ADDRCONF_WIPWAIT_Pos (26UL) /*!< Position of WIPWAIT field. */ +#define QSPI_ADDRCONF_WIPWAIT_Msk (0x1UL << QSPI_ADDRCONF_WIPWAIT_Pos) /*!< Bit mask of WIPWAIT field. */ +#define QSPI_ADDRCONF_WIPWAIT_Disable (0UL) /*!< No wait. */ +#define QSPI_ADDRCONF_WIPWAIT_Enable (1UL) /*!< Wait. */ + +/* Bits 25..24 : Extended addressing mode. */ +#define QSPI_ADDRCONF_MODE_Pos (24UL) /*!< Position of MODE field. */ +#define QSPI_ADDRCONF_MODE_Msk (0x3UL << QSPI_ADDRCONF_MODE_Pos) /*!< Bit mask of MODE field. */ +#define QSPI_ADDRCONF_MODE_NoInstr (0UL) /*!< Do not send any instruction. */ +#define QSPI_ADDRCONF_MODE_Opcode (1UL) /*!< Send opcode. */ +#define QSPI_ADDRCONF_MODE_OpByte0 (2UL) /*!< Send opcode, byte0. */ +#define QSPI_ADDRCONF_MODE_All (3UL) /*!< Send opcode, byte0, byte1. */ + +/* Bits 23..16 : Byte 1 following byte 0. */ +#define QSPI_ADDRCONF_BYTE1_Pos (16UL) /*!< Position of BYTE1 field. */ +#define QSPI_ADDRCONF_BYTE1_Msk (0xFFUL << QSPI_ADDRCONF_BYTE1_Pos) /*!< Bit mask of BYTE1 field. */ + +/* Bits 15..8 : Byte 0 following opcode. */ +#define QSPI_ADDRCONF_BYTE0_Pos (8UL) /*!< Position of BYTE0 field. */ +#define QSPI_ADDRCONF_BYTE0_Msk (0xFFUL << QSPI_ADDRCONF_BYTE0_Pos) /*!< Bit mask of BYTE0 field. */ + +/* Bits 7..0 : Opcode that enters the 32-bit addressing mode. */ +#define QSPI_ADDRCONF_OPCODE_Pos (0UL) /*!< Position of OPCODE field. */ +#define QSPI_ADDRCONF_OPCODE_Msk (0xFFUL << QSPI_ADDRCONF_OPCODE_Pos) /*!< Bit mask of OPCODE field. */ + +/* Register: QSPI_CINSTRCONF */ +/* Description: Custom instruction configuration register. */ + +/* Bit 17 : Stop (finalize) long frame transaction */ +#define QSPI_CINSTRCONF_LFSTOP_Pos (17UL) /*!< Position of LFSTOP field. */ +#define QSPI_CINSTRCONF_LFSTOP_Msk (0x1UL << QSPI_CINSTRCONF_LFSTOP_Pos) /*!< Bit mask of LFSTOP field. */ +#define QSPI_CINSTRCONF_LFSTOP_Stop (1UL) /*!< Stop */ + +/* Bit 16 : Enable long frame mode. When enabled, a custom instruction transaction has to be ended by writing the LFSTOP field. */ +#define QSPI_CINSTRCONF_LFEN_Pos (16UL) /*!< Position of LFEN field. */ +#define QSPI_CINSTRCONF_LFEN_Msk (0x1UL << QSPI_CINSTRCONF_LFEN_Pos) /*!< Bit mask of LFEN field. */ +#define QSPI_CINSTRCONF_LFEN_Disable (0UL) /*!< Long frame mode disabled */ +#define QSPI_CINSTRCONF_LFEN_Enable (1UL) /*!< Long frame mode enabled */ + +/* Bit 15 : Send WREN (write enable opcode 0x06) before instruction. */ +#define QSPI_CINSTRCONF_WREN_Pos (15UL) /*!< Position of WREN field. */ +#define QSPI_CINSTRCONF_WREN_Msk (0x1UL << QSPI_CINSTRCONF_WREN_Pos) /*!< Bit mask of WREN field. */ +#define QSPI_CINSTRCONF_WREN_Disable (0UL) /*!< Do not send WREN. */ +#define QSPI_CINSTRCONF_WREN_Enable (1UL) /*!< Send WREN. */ + +/* Bit 14 : Wait for write complete before sending command. */ +#define QSPI_CINSTRCONF_WIPWAIT_Pos (14UL) /*!< Position of WIPWAIT field. */ +#define QSPI_CINSTRCONF_WIPWAIT_Msk (0x1UL << QSPI_CINSTRCONF_WIPWAIT_Pos) /*!< Bit mask of WIPWAIT field. */ +#define QSPI_CINSTRCONF_WIPWAIT_Disable (0UL) /*!< No wait. */ +#define QSPI_CINSTRCONF_WIPWAIT_Enable (1UL) /*!< Wait. */ + +/* Bit 13 : Level of the IO3 pin (if connected) during transmission of custom instruction. */ +#define QSPI_CINSTRCONF_LIO3_Pos (13UL) /*!< Position of LIO3 field. */ +#define QSPI_CINSTRCONF_LIO3_Msk (0x1UL << QSPI_CINSTRCONF_LIO3_Pos) /*!< Bit mask of LIO3 field. */ + +/* Bit 12 : Level of the IO2 pin (if connected) during transmission of custom instruction. */ +#define QSPI_CINSTRCONF_LIO2_Pos (12UL) /*!< Position of LIO2 field. */ +#define QSPI_CINSTRCONF_LIO2_Msk (0x1UL << QSPI_CINSTRCONF_LIO2_Pos) /*!< Bit mask of LIO2 field. */ + +/* Bits 11..8 : Length of custom instruction in number of bytes. */ +#define QSPI_CINSTRCONF_LENGTH_Pos (8UL) /*!< Position of LENGTH field. */ +#define QSPI_CINSTRCONF_LENGTH_Msk (0xFUL << QSPI_CINSTRCONF_LENGTH_Pos) /*!< Bit mask of LENGTH field. */ +#define QSPI_CINSTRCONF_LENGTH_1B (1UL) /*!< Send opcode only. */ +#define QSPI_CINSTRCONF_LENGTH_2B (2UL) /*!< Send opcode, CINSTRDAT0.BYTE0. */ +#define QSPI_CINSTRCONF_LENGTH_3B (3UL) /*!< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT0.BYTE1. */ +#define QSPI_CINSTRCONF_LENGTH_4B (4UL) /*!< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT0.BYTE2. */ +#define QSPI_CINSTRCONF_LENGTH_5B (5UL) /*!< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT0.BYTE3. */ +#define QSPI_CINSTRCONF_LENGTH_6B (6UL) /*!< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE4. */ +#define QSPI_CINSTRCONF_LENGTH_7B (7UL) /*!< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE5. */ +#define QSPI_CINSTRCONF_LENGTH_8B (8UL) /*!< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE6. */ +#define QSPI_CINSTRCONF_LENGTH_9B (9UL) /*!< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE7. */ + +/* Bits 7..0 : Opcode of Custom instruction. */ +#define QSPI_CINSTRCONF_OPCODE_Pos (0UL) /*!< Position of OPCODE field. */ +#define QSPI_CINSTRCONF_OPCODE_Msk (0xFFUL << QSPI_CINSTRCONF_OPCODE_Pos) /*!< Bit mask of OPCODE field. */ + +/* Register: QSPI_CINSTRDAT0 */ +/* Description: Custom instruction data register 0. */ + +/* Bits 31..24 : Data byte 3 */ +#define QSPI_CINSTRDAT0_BYTE3_Pos (24UL) /*!< Position of BYTE3 field. */ +#define QSPI_CINSTRDAT0_BYTE3_Msk (0xFFUL << QSPI_CINSTRDAT0_BYTE3_Pos) /*!< Bit mask of BYTE3 field. */ + +/* Bits 23..16 : Data byte 2 */ +#define QSPI_CINSTRDAT0_BYTE2_Pos (16UL) /*!< Position of BYTE2 field. */ +#define QSPI_CINSTRDAT0_BYTE2_Msk (0xFFUL << QSPI_CINSTRDAT0_BYTE2_Pos) /*!< Bit mask of BYTE2 field. */ + +/* Bits 15..8 : Data byte 1 */ +#define QSPI_CINSTRDAT0_BYTE1_Pos (8UL) /*!< Position of BYTE1 field. */ +#define QSPI_CINSTRDAT0_BYTE1_Msk (0xFFUL << QSPI_CINSTRDAT0_BYTE1_Pos) /*!< Bit mask of BYTE1 field. */ + +/* Bits 7..0 : Data byte 0 */ +#define QSPI_CINSTRDAT0_BYTE0_Pos (0UL) /*!< Position of BYTE0 field. */ +#define QSPI_CINSTRDAT0_BYTE0_Msk (0xFFUL << QSPI_CINSTRDAT0_BYTE0_Pos) /*!< Bit mask of BYTE0 field. */ + +/* Register: QSPI_CINSTRDAT1 */ +/* Description: Custom instruction data register 1. */ + +/* Bits 31..24 : Data byte 7 */ +#define QSPI_CINSTRDAT1_BYTE7_Pos (24UL) /*!< Position of BYTE7 field. */ +#define QSPI_CINSTRDAT1_BYTE7_Msk (0xFFUL << QSPI_CINSTRDAT1_BYTE7_Pos) /*!< Bit mask of BYTE7 field. */ + +/* Bits 23..16 : Data byte 6 */ +#define QSPI_CINSTRDAT1_BYTE6_Pos (16UL) /*!< Position of BYTE6 field. */ +#define QSPI_CINSTRDAT1_BYTE6_Msk (0xFFUL << QSPI_CINSTRDAT1_BYTE6_Pos) /*!< Bit mask of BYTE6 field. */ + +/* Bits 15..8 : Data byte 5 */ +#define QSPI_CINSTRDAT1_BYTE5_Pos (8UL) /*!< Position of BYTE5 field. */ +#define QSPI_CINSTRDAT1_BYTE5_Msk (0xFFUL << QSPI_CINSTRDAT1_BYTE5_Pos) /*!< Bit mask of BYTE5 field. */ + +/* Bits 7..0 : Data byte 4 */ +#define QSPI_CINSTRDAT1_BYTE4_Pos (0UL) /*!< Position of BYTE4 field. */ +#define QSPI_CINSTRDAT1_BYTE4_Msk (0xFFUL << QSPI_CINSTRDAT1_BYTE4_Pos) /*!< Bit mask of BYTE4 field. */ + +/* Register: QSPI_IFTIMING */ +/* Description: SPI interface timing. */ + +/* Bits 10..8 : Timing related to sampling of the input serial data. The value of RXDELAY specifies the number of 64 MHz cycles (15.625 ns) delay from the the rising edge of the SPI Clock (SCK) until the input serial data is sampled. As en example, if set to 0 the input serial data is sampled on the rising edge of SCK. */ +#define QSPI_IFTIMING_RXDELAY_Pos (8UL) /*!< Position of RXDELAY field. */ +#define QSPI_IFTIMING_RXDELAY_Msk (0x7UL << QSPI_IFTIMING_RXDELAY_Pos) /*!< Bit mask of RXDELAY field. */ + + +/* Peripheral: RADIO */ +/* Description: 2.4 GHz radio */ + +/* Register: RADIO_TASKS_TXEN */ +/* Description: Enable RADIO in TX mode */ + +/* Bit 0 : */ +#define RADIO_TASKS_TXEN_TASKS_TXEN_Pos (0UL) /*!< Position of TASKS_TXEN field. */ +#define RADIO_TASKS_TXEN_TASKS_TXEN_Msk (0x1UL << RADIO_TASKS_TXEN_TASKS_TXEN_Pos) /*!< Bit mask of TASKS_TXEN field. */ + +/* Register: RADIO_TASKS_RXEN */ +/* Description: Enable RADIO in RX mode */ + +/* Bit 0 : */ +#define RADIO_TASKS_RXEN_TASKS_RXEN_Pos (0UL) /*!< Position of TASKS_RXEN field. */ +#define RADIO_TASKS_RXEN_TASKS_RXEN_Msk (0x1UL << RADIO_TASKS_RXEN_TASKS_RXEN_Pos) /*!< Bit mask of TASKS_RXEN field. */ + +/* Register: RADIO_TASKS_START */ +/* Description: Start RADIO */ + +/* Bit 0 : */ +#define RADIO_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define RADIO_TASKS_START_TASKS_START_Msk (0x1UL << RADIO_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: RADIO_TASKS_STOP */ +/* Description: Stop RADIO */ + +/* Bit 0 : */ +#define RADIO_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define RADIO_TASKS_STOP_TASKS_STOP_Msk (0x1UL << RADIO_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: RADIO_TASKS_DISABLE */ +/* Description: Disable RADIO */ + +/* Bit 0 : */ +#define RADIO_TASKS_DISABLE_TASKS_DISABLE_Pos (0UL) /*!< Position of TASKS_DISABLE field. */ +#define RADIO_TASKS_DISABLE_TASKS_DISABLE_Msk (0x1UL << RADIO_TASKS_DISABLE_TASKS_DISABLE_Pos) /*!< Bit mask of TASKS_DISABLE field. */ + +/* Register: RADIO_TASKS_RSSISTART */ +/* Description: Start the RSSI and take one single sample of the receive signal strength */ + +/* Bit 0 : */ +#define RADIO_TASKS_RSSISTART_TASKS_RSSISTART_Pos (0UL) /*!< Position of TASKS_RSSISTART field. */ +#define RADIO_TASKS_RSSISTART_TASKS_RSSISTART_Msk (0x1UL << RADIO_TASKS_RSSISTART_TASKS_RSSISTART_Pos) /*!< Bit mask of TASKS_RSSISTART field. */ + +/* Register: RADIO_TASKS_RSSISTOP */ +/* Description: Stop the RSSI measurement */ + +/* Bit 0 : */ +#define RADIO_TASKS_RSSISTOP_TASKS_RSSISTOP_Pos (0UL) /*!< Position of TASKS_RSSISTOP field. */ +#define RADIO_TASKS_RSSISTOP_TASKS_RSSISTOP_Msk (0x1UL << RADIO_TASKS_RSSISTOP_TASKS_RSSISTOP_Pos) /*!< Bit mask of TASKS_RSSISTOP field. */ + +/* Register: RADIO_TASKS_BCSTART */ +/* Description: Start the bit counter */ + +/* Bit 0 : */ +#define RADIO_TASKS_BCSTART_TASKS_BCSTART_Pos (0UL) /*!< Position of TASKS_BCSTART field. */ +#define RADIO_TASKS_BCSTART_TASKS_BCSTART_Msk (0x1UL << RADIO_TASKS_BCSTART_TASKS_BCSTART_Pos) /*!< Bit mask of TASKS_BCSTART field. */ + +/* Register: RADIO_TASKS_BCSTOP */ +/* Description: Stop the bit counter */ + +/* Bit 0 : */ +#define RADIO_TASKS_BCSTOP_TASKS_BCSTOP_Pos (0UL) /*!< Position of TASKS_BCSTOP field. */ +#define RADIO_TASKS_BCSTOP_TASKS_BCSTOP_Msk (0x1UL << RADIO_TASKS_BCSTOP_TASKS_BCSTOP_Pos) /*!< Bit mask of TASKS_BCSTOP field. */ + +/* Register: RADIO_TASKS_EDSTART */ +/* Description: Start the energy detect measurement used in IEEE 802.15.4 mode */ + +/* Bit 0 : */ +#define RADIO_TASKS_EDSTART_TASKS_EDSTART_Pos (0UL) /*!< Position of TASKS_EDSTART field. */ +#define RADIO_TASKS_EDSTART_TASKS_EDSTART_Msk (0x1UL << RADIO_TASKS_EDSTART_TASKS_EDSTART_Pos) /*!< Bit mask of TASKS_EDSTART field. */ + +/* Register: RADIO_TASKS_EDSTOP */ +/* Description: Stop the energy detect measurement */ + +/* Bit 0 : */ +#define RADIO_TASKS_EDSTOP_TASKS_EDSTOP_Pos (0UL) /*!< Position of TASKS_EDSTOP field. */ +#define RADIO_TASKS_EDSTOP_TASKS_EDSTOP_Msk (0x1UL << RADIO_TASKS_EDSTOP_TASKS_EDSTOP_Pos) /*!< Bit mask of TASKS_EDSTOP field. */ + +/* Register: RADIO_TASKS_CCASTART */ +/* Description: Start the clear channel assessment used in IEEE 802.15.4 mode */ + +/* Bit 0 : */ +#define RADIO_TASKS_CCASTART_TASKS_CCASTART_Pos (0UL) /*!< Position of TASKS_CCASTART field. */ +#define RADIO_TASKS_CCASTART_TASKS_CCASTART_Msk (0x1UL << RADIO_TASKS_CCASTART_TASKS_CCASTART_Pos) /*!< Bit mask of TASKS_CCASTART field. */ + +/* Register: RADIO_TASKS_CCASTOP */ +/* Description: Stop the clear channel assessment */ + +/* Bit 0 : */ +#define RADIO_TASKS_CCASTOP_TASKS_CCASTOP_Pos (0UL) /*!< Position of TASKS_CCASTOP field. */ +#define RADIO_TASKS_CCASTOP_TASKS_CCASTOP_Msk (0x1UL << RADIO_TASKS_CCASTOP_TASKS_CCASTOP_Pos) /*!< Bit mask of TASKS_CCASTOP field. */ + +/* Register: RADIO_EVENTS_READY */ +/* Description: RADIO has ramped up and is ready to be started */ + +/* Bit 0 : */ +#define RADIO_EVENTS_READY_EVENTS_READY_Pos (0UL) /*!< Position of EVENTS_READY field. */ +#define RADIO_EVENTS_READY_EVENTS_READY_Msk (0x1UL << RADIO_EVENTS_READY_EVENTS_READY_Pos) /*!< Bit mask of EVENTS_READY field. */ + +/* Register: RADIO_EVENTS_ADDRESS */ +/* Description: Address sent or received */ + +/* Bit 0 : */ +#define RADIO_EVENTS_ADDRESS_EVENTS_ADDRESS_Pos (0UL) /*!< Position of EVENTS_ADDRESS field. */ +#define RADIO_EVENTS_ADDRESS_EVENTS_ADDRESS_Msk (0x1UL << RADIO_EVENTS_ADDRESS_EVENTS_ADDRESS_Pos) /*!< Bit mask of EVENTS_ADDRESS field. */ + +/* Register: RADIO_EVENTS_PAYLOAD */ +/* Description: Packet payload sent or received */ + +/* Bit 0 : */ +#define RADIO_EVENTS_PAYLOAD_EVENTS_PAYLOAD_Pos (0UL) /*!< Position of EVENTS_PAYLOAD field. */ +#define RADIO_EVENTS_PAYLOAD_EVENTS_PAYLOAD_Msk (0x1UL << RADIO_EVENTS_PAYLOAD_EVENTS_PAYLOAD_Pos) /*!< Bit mask of EVENTS_PAYLOAD field. */ + +/* Register: RADIO_EVENTS_END */ +/* Description: Packet sent or received */ + +/* Bit 0 : */ +#define RADIO_EVENTS_END_EVENTS_END_Pos (0UL) /*!< Position of EVENTS_END field. */ +#define RADIO_EVENTS_END_EVENTS_END_Msk (0x1UL << RADIO_EVENTS_END_EVENTS_END_Pos) /*!< Bit mask of EVENTS_END field. */ + +/* Register: RADIO_EVENTS_DISABLED */ +/* Description: RADIO has been disabled */ + +/* Bit 0 : */ +#define RADIO_EVENTS_DISABLED_EVENTS_DISABLED_Pos (0UL) /*!< Position of EVENTS_DISABLED field. */ +#define RADIO_EVENTS_DISABLED_EVENTS_DISABLED_Msk (0x1UL << RADIO_EVENTS_DISABLED_EVENTS_DISABLED_Pos) /*!< Bit mask of EVENTS_DISABLED field. */ + +/* Register: RADIO_EVENTS_DEVMATCH */ +/* Description: A device address match occurred on the last received packet */ + +/* Bit 0 : */ +#define RADIO_EVENTS_DEVMATCH_EVENTS_DEVMATCH_Pos (0UL) /*!< Position of EVENTS_DEVMATCH field. */ +#define RADIO_EVENTS_DEVMATCH_EVENTS_DEVMATCH_Msk (0x1UL << RADIO_EVENTS_DEVMATCH_EVENTS_DEVMATCH_Pos) /*!< Bit mask of EVENTS_DEVMATCH field. */ + +/* Register: RADIO_EVENTS_DEVMISS */ +/* Description: No device address match occurred on the last received packet */ + +/* Bit 0 : */ +#define RADIO_EVENTS_DEVMISS_EVENTS_DEVMISS_Pos (0UL) /*!< Position of EVENTS_DEVMISS field. */ +#define RADIO_EVENTS_DEVMISS_EVENTS_DEVMISS_Msk (0x1UL << RADIO_EVENTS_DEVMISS_EVENTS_DEVMISS_Pos) /*!< Bit mask of EVENTS_DEVMISS field. */ + +/* Register: RADIO_EVENTS_RSSIEND */ +/* Description: Sampling of receive signal strength complete */ + +/* Bit 0 : */ +#define RADIO_EVENTS_RSSIEND_EVENTS_RSSIEND_Pos (0UL) /*!< Position of EVENTS_RSSIEND field. */ +#define RADIO_EVENTS_RSSIEND_EVENTS_RSSIEND_Msk (0x1UL << RADIO_EVENTS_RSSIEND_EVENTS_RSSIEND_Pos) /*!< Bit mask of EVENTS_RSSIEND field. */ + +/* Register: RADIO_EVENTS_BCMATCH */ +/* Description: Bit counter reached bit count value */ + +/* Bit 0 : */ +#define RADIO_EVENTS_BCMATCH_EVENTS_BCMATCH_Pos (0UL) /*!< Position of EVENTS_BCMATCH field. */ +#define RADIO_EVENTS_BCMATCH_EVENTS_BCMATCH_Msk (0x1UL << RADIO_EVENTS_BCMATCH_EVENTS_BCMATCH_Pos) /*!< Bit mask of EVENTS_BCMATCH field. */ + +/* Register: RADIO_EVENTS_CRCOK */ +/* Description: Packet received with CRC ok */ + +/* Bit 0 : */ +#define RADIO_EVENTS_CRCOK_EVENTS_CRCOK_Pos (0UL) /*!< Position of EVENTS_CRCOK field. */ +#define RADIO_EVENTS_CRCOK_EVENTS_CRCOK_Msk (0x1UL << RADIO_EVENTS_CRCOK_EVENTS_CRCOK_Pos) /*!< Bit mask of EVENTS_CRCOK field. */ + +/* Register: RADIO_EVENTS_CRCERROR */ +/* Description: Packet received with CRC error */ + +/* Bit 0 : */ +#define RADIO_EVENTS_CRCERROR_EVENTS_CRCERROR_Pos (0UL) /*!< Position of EVENTS_CRCERROR field. */ +#define RADIO_EVENTS_CRCERROR_EVENTS_CRCERROR_Msk (0x1UL << RADIO_EVENTS_CRCERROR_EVENTS_CRCERROR_Pos) /*!< Bit mask of EVENTS_CRCERROR field. */ + +/* Register: RADIO_EVENTS_FRAMESTART */ +/* Description: IEEE 802.15.4 length field received */ + +/* Bit 0 : */ +#define RADIO_EVENTS_FRAMESTART_EVENTS_FRAMESTART_Pos (0UL) /*!< Position of EVENTS_FRAMESTART field. */ +#define RADIO_EVENTS_FRAMESTART_EVENTS_FRAMESTART_Msk (0x1UL << RADIO_EVENTS_FRAMESTART_EVENTS_FRAMESTART_Pos) /*!< Bit mask of EVENTS_FRAMESTART field. */ + +/* Register: RADIO_EVENTS_EDEND */ +/* Description: Sampling of energy detection complete. A new ED sample is ready for readout from the RADIO.EDSAMPLE register. */ + +/* Bit 0 : */ +#define RADIO_EVENTS_EDEND_EVENTS_EDEND_Pos (0UL) /*!< Position of EVENTS_EDEND field. */ +#define RADIO_EVENTS_EDEND_EVENTS_EDEND_Msk (0x1UL << RADIO_EVENTS_EDEND_EVENTS_EDEND_Pos) /*!< Bit mask of EVENTS_EDEND field. */ + +/* Register: RADIO_EVENTS_EDSTOPPED */ +/* Description: The sampling of energy detection has stopped */ + +/* Bit 0 : */ +#define RADIO_EVENTS_EDSTOPPED_EVENTS_EDSTOPPED_Pos (0UL) /*!< Position of EVENTS_EDSTOPPED field. */ +#define RADIO_EVENTS_EDSTOPPED_EVENTS_EDSTOPPED_Msk (0x1UL << RADIO_EVENTS_EDSTOPPED_EVENTS_EDSTOPPED_Pos) /*!< Bit mask of EVENTS_EDSTOPPED field. */ + +/* Register: RADIO_EVENTS_CCAIDLE */ +/* Description: Wireless medium in idle - clear to send */ + +/* Bit 0 : */ +#define RADIO_EVENTS_CCAIDLE_EVENTS_CCAIDLE_Pos (0UL) /*!< Position of EVENTS_CCAIDLE field. */ +#define RADIO_EVENTS_CCAIDLE_EVENTS_CCAIDLE_Msk (0x1UL << RADIO_EVENTS_CCAIDLE_EVENTS_CCAIDLE_Pos) /*!< Bit mask of EVENTS_CCAIDLE field. */ + +/* Register: RADIO_EVENTS_CCABUSY */ +/* Description: Wireless medium busy - do not send */ + +/* Bit 0 : */ +#define RADIO_EVENTS_CCABUSY_EVENTS_CCABUSY_Pos (0UL) /*!< Position of EVENTS_CCABUSY field. */ +#define RADIO_EVENTS_CCABUSY_EVENTS_CCABUSY_Msk (0x1UL << RADIO_EVENTS_CCABUSY_EVENTS_CCABUSY_Pos) /*!< Bit mask of EVENTS_CCABUSY field. */ + +/* Register: RADIO_EVENTS_CCASTOPPED */ +/* Description: The CCA has stopped */ + +/* Bit 0 : */ +#define RADIO_EVENTS_CCASTOPPED_EVENTS_CCASTOPPED_Pos (0UL) /*!< Position of EVENTS_CCASTOPPED field. */ +#define RADIO_EVENTS_CCASTOPPED_EVENTS_CCASTOPPED_Msk (0x1UL << RADIO_EVENTS_CCASTOPPED_EVENTS_CCASTOPPED_Pos) /*!< Bit mask of EVENTS_CCASTOPPED field. */ + +/* Register: RADIO_EVENTS_RATEBOOST */ +/* Description: Ble_LR CI field received, receive mode is changed from Ble_LR125Kbit to Ble_LR500Kbit. */ + +/* Bit 0 : */ +#define RADIO_EVENTS_RATEBOOST_EVENTS_RATEBOOST_Pos (0UL) /*!< Position of EVENTS_RATEBOOST field. */ +#define RADIO_EVENTS_RATEBOOST_EVENTS_RATEBOOST_Msk (0x1UL << RADIO_EVENTS_RATEBOOST_EVENTS_RATEBOOST_Pos) /*!< Bit mask of EVENTS_RATEBOOST field. */ + +/* Register: RADIO_EVENTS_TXREADY */ +/* Description: RADIO has ramped up and is ready to be started TX path */ + +/* Bit 0 : */ +#define RADIO_EVENTS_TXREADY_EVENTS_TXREADY_Pos (0UL) /*!< Position of EVENTS_TXREADY field. */ +#define RADIO_EVENTS_TXREADY_EVENTS_TXREADY_Msk (0x1UL << RADIO_EVENTS_TXREADY_EVENTS_TXREADY_Pos) /*!< Bit mask of EVENTS_TXREADY field. */ + +/* Register: RADIO_EVENTS_RXREADY */ +/* Description: RADIO has ramped up and is ready to be started RX path */ + +/* Bit 0 : */ +#define RADIO_EVENTS_RXREADY_EVENTS_RXREADY_Pos (0UL) /*!< Position of EVENTS_RXREADY field. */ +#define RADIO_EVENTS_RXREADY_EVENTS_RXREADY_Msk (0x1UL << RADIO_EVENTS_RXREADY_EVENTS_RXREADY_Pos) /*!< Bit mask of EVENTS_RXREADY field. */ + +/* Register: RADIO_EVENTS_MHRMATCH */ +/* Description: MAC header match found */ + +/* Bit 0 : */ +#define RADIO_EVENTS_MHRMATCH_EVENTS_MHRMATCH_Pos (0UL) /*!< Position of EVENTS_MHRMATCH field. */ +#define RADIO_EVENTS_MHRMATCH_EVENTS_MHRMATCH_Msk (0x1UL << RADIO_EVENTS_MHRMATCH_EVENTS_MHRMATCH_Pos) /*!< Bit mask of EVENTS_MHRMATCH field. */ + +/* Register: RADIO_EVENTS_PHYEND */ +/* Description: Generated in Ble_LR125Kbit, Ble_LR500Kbit and BleIeee802154_250Kbit modes when last bit is sent on air. */ + +/* Bit 0 : */ +#define RADIO_EVENTS_PHYEND_EVENTS_PHYEND_Pos (0UL) /*!< Position of EVENTS_PHYEND field. */ +#define RADIO_EVENTS_PHYEND_EVENTS_PHYEND_Msk (0x1UL << RADIO_EVENTS_PHYEND_EVENTS_PHYEND_Pos) /*!< Bit mask of EVENTS_PHYEND field. */ + +/* Register: RADIO_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 21 : Shortcut between PHYEND event and START task */ +#define RADIO_SHORTS_PHYEND_START_Pos (21UL) /*!< Position of PHYEND_START field. */ +#define RADIO_SHORTS_PHYEND_START_Msk (0x1UL << RADIO_SHORTS_PHYEND_START_Pos) /*!< Bit mask of PHYEND_START field. */ +#define RADIO_SHORTS_PHYEND_START_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_PHYEND_START_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 20 : Shortcut between PHYEND event and DISABLE task */ +#define RADIO_SHORTS_PHYEND_DISABLE_Pos (20UL) /*!< Position of PHYEND_DISABLE field. */ +#define RADIO_SHORTS_PHYEND_DISABLE_Msk (0x1UL << RADIO_SHORTS_PHYEND_DISABLE_Pos) /*!< Bit mask of PHYEND_DISABLE field. */ +#define RADIO_SHORTS_PHYEND_DISABLE_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_PHYEND_DISABLE_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 19 : Shortcut between RXREADY event and START task */ +#define RADIO_SHORTS_RXREADY_START_Pos (19UL) /*!< Position of RXREADY_START field. */ +#define RADIO_SHORTS_RXREADY_START_Msk (0x1UL << RADIO_SHORTS_RXREADY_START_Pos) /*!< Bit mask of RXREADY_START field. */ +#define RADIO_SHORTS_RXREADY_START_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_RXREADY_START_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 18 : Shortcut between TXREADY event and START task */ +#define RADIO_SHORTS_TXREADY_START_Pos (18UL) /*!< Position of TXREADY_START field. */ +#define RADIO_SHORTS_TXREADY_START_Msk (0x1UL << RADIO_SHORTS_TXREADY_START_Pos) /*!< Bit mask of TXREADY_START field. */ +#define RADIO_SHORTS_TXREADY_START_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_TXREADY_START_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 17 : Shortcut between CCAIDLE event and STOP task */ +#define RADIO_SHORTS_CCAIDLE_STOP_Pos (17UL) /*!< Position of CCAIDLE_STOP field. */ +#define RADIO_SHORTS_CCAIDLE_STOP_Msk (0x1UL << RADIO_SHORTS_CCAIDLE_STOP_Pos) /*!< Bit mask of CCAIDLE_STOP field. */ +#define RADIO_SHORTS_CCAIDLE_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_CCAIDLE_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 16 : Shortcut between EDEND event and DISABLE task */ +#define RADIO_SHORTS_EDEND_DISABLE_Pos (16UL) /*!< Position of EDEND_DISABLE field. */ +#define RADIO_SHORTS_EDEND_DISABLE_Msk (0x1UL << RADIO_SHORTS_EDEND_DISABLE_Pos) /*!< Bit mask of EDEND_DISABLE field. */ +#define RADIO_SHORTS_EDEND_DISABLE_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_EDEND_DISABLE_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 15 : Shortcut between READY event and EDSTART task */ +#define RADIO_SHORTS_READY_EDSTART_Pos (15UL) /*!< Position of READY_EDSTART field. */ +#define RADIO_SHORTS_READY_EDSTART_Msk (0x1UL << RADIO_SHORTS_READY_EDSTART_Pos) /*!< Bit mask of READY_EDSTART field. */ +#define RADIO_SHORTS_READY_EDSTART_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_READY_EDSTART_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 14 : Shortcut between FRAMESTART event and BCSTART task */ +#define RADIO_SHORTS_FRAMESTART_BCSTART_Pos (14UL) /*!< Position of FRAMESTART_BCSTART field. */ +#define RADIO_SHORTS_FRAMESTART_BCSTART_Msk (0x1UL << RADIO_SHORTS_FRAMESTART_BCSTART_Pos) /*!< Bit mask of FRAMESTART_BCSTART field. */ +#define RADIO_SHORTS_FRAMESTART_BCSTART_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_FRAMESTART_BCSTART_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 13 : Shortcut between CCABUSY event and DISABLE task */ +#define RADIO_SHORTS_CCABUSY_DISABLE_Pos (13UL) /*!< Position of CCABUSY_DISABLE field. */ +#define RADIO_SHORTS_CCABUSY_DISABLE_Msk (0x1UL << RADIO_SHORTS_CCABUSY_DISABLE_Pos) /*!< Bit mask of CCABUSY_DISABLE field. */ +#define RADIO_SHORTS_CCABUSY_DISABLE_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_CCABUSY_DISABLE_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 12 : Shortcut between CCAIDLE event and TXEN task */ +#define RADIO_SHORTS_CCAIDLE_TXEN_Pos (12UL) /*!< Position of CCAIDLE_TXEN field. */ +#define RADIO_SHORTS_CCAIDLE_TXEN_Msk (0x1UL << RADIO_SHORTS_CCAIDLE_TXEN_Pos) /*!< Bit mask of CCAIDLE_TXEN field. */ +#define RADIO_SHORTS_CCAIDLE_TXEN_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_CCAIDLE_TXEN_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 11 : Shortcut between RXREADY event and CCASTART task */ +#define RADIO_SHORTS_RXREADY_CCASTART_Pos (11UL) /*!< Position of RXREADY_CCASTART field. */ +#define RADIO_SHORTS_RXREADY_CCASTART_Msk (0x1UL << RADIO_SHORTS_RXREADY_CCASTART_Pos) /*!< Bit mask of RXREADY_CCASTART field. */ +#define RADIO_SHORTS_RXREADY_CCASTART_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_RXREADY_CCASTART_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 8 : Shortcut between DISABLED event and RSSISTOP task */ +#define RADIO_SHORTS_DISABLED_RSSISTOP_Pos (8UL) /*!< Position of DISABLED_RSSISTOP field. */ +#define RADIO_SHORTS_DISABLED_RSSISTOP_Msk (0x1UL << RADIO_SHORTS_DISABLED_RSSISTOP_Pos) /*!< Bit mask of DISABLED_RSSISTOP field. */ +#define RADIO_SHORTS_DISABLED_RSSISTOP_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_DISABLED_RSSISTOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 6 : Shortcut between ADDRESS event and BCSTART task */ +#define RADIO_SHORTS_ADDRESS_BCSTART_Pos (6UL) /*!< Position of ADDRESS_BCSTART field. */ +#define RADIO_SHORTS_ADDRESS_BCSTART_Msk (0x1UL << RADIO_SHORTS_ADDRESS_BCSTART_Pos) /*!< Bit mask of ADDRESS_BCSTART field. */ +#define RADIO_SHORTS_ADDRESS_BCSTART_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_ADDRESS_BCSTART_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 5 : Shortcut between END event and START task */ +#define RADIO_SHORTS_END_START_Pos (5UL) /*!< Position of END_START field. */ +#define RADIO_SHORTS_END_START_Msk (0x1UL << RADIO_SHORTS_END_START_Pos) /*!< Bit mask of END_START field. */ +#define RADIO_SHORTS_END_START_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_END_START_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 4 : Shortcut between ADDRESS event and RSSISTART task */ +#define RADIO_SHORTS_ADDRESS_RSSISTART_Pos (4UL) /*!< Position of ADDRESS_RSSISTART field. */ +#define RADIO_SHORTS_ADDRESS_RSSISTART_Msk (0x1UL << RADIO_SHORTS_ADDRESS_RSSISTART_Pos) /*!< Bit mask of ADDRESS_RSSISTART field. */ +#define RADIO_SHORTS_ADDRESS_RSSISTART_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_ADDRESS_RSSISTART_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 3 : Shortcut between DISABLED event and RXEN task */ +#define RADIO_SHORTS_DISABLED_RXEN_Pos (3UL) /*!< Position of DISABLED_RXEN field. */ +#define RADIO_SHORTS_DISABLED_RXEN_Msk (0x1UL << RADIO_SHORTS_DISABLED_RXEN_Pos) /*!< Bit mask of DISABLED_RXEN field. */ +#define RADIO_SHORTS_DISABLED_RXEN_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_DISABLED_RXEN_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 2 : Shortcut between DISABLED event and TXEN task */ +#define RADIO_SHORTS_DISABLED_TXEN_Pos (2UL) /*!< Position of DISABLED_TXEN field. */ +#define RADIO_SHORTS_DISABLED_TXEN_Msk (0x1UL << RADIO_SHORTS_DISABLED_TXEN_Pos) /*!< Bit mask of DISABLED_TXEN field. */ +#define RADIO_SHORTS_DISABLED_TXEN_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_DISABLED_TXEN_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 1 : Shortcut between END event and DISABLE task */ +#define RADIO_SHORTS_END_DISABLE_Pos (1UL) /*!< Position of END_DISABLE field. */ +#define RADIO_SHORTS_END_DISABLE_Msk (0x1UL << RADIO_SHORTS_END_DISABLE_Pos) /*!< Bit mask of END_DISABLE field. */ +#define RADIO_SHORTS_END_DISABLE_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_END_DISABLE_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 0 : Shortcut between READY event and START task */ +#define RADIO_SHORTS_READY_START_Pos (0UL) /*!< Position of READY_START field. */ +#define RADIO_SHORTS_READY_START_Msk (0x1UL << RADIO_SHORTS_READY_START_Pos) /*!< Bit mask of READY_START field. */ +#define RADIO_SHORTS_READY_START_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_READY_START_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: RADIO_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 27 : Write '1' to enable interrupt for PHYEND event */ +#define RADIO_INTENSET_PHYEND_Pos (27UL) /*!< Position of PHYEND field. */ +#define RADIO_INTENSET_PHYEND_Msk (0x1UL << RADIO_INTENSET_PHYEND_Pos) /*!< Bit mask of PHYEND field. */ +#define RADIO_INTENSET_PHYEND_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_PHYEND_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_PHYEND_Set (1UL) /*!< Enable */ + +/* Bit 23 : Write '1' to enable interrupt for MHRMATCH event */ +#define RADIO_INTENSET_MHRMATCH_Pos (23UL) /*!< Position of MHRMATCH field. */ +#define RADIO_INTENSET_MHRMATCH_Msk (0x1UL << RADIO_INTENSET_MHRMATCH_Pos) /*!< Bit mask of MHRMATCH field. */ +#define RADIO_INTENSET_MHRMATCH_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_MHRMATCH_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_MHRMATCH_Set (1UL) /*!< Enable */ + +/* Bit 22 : Write '1' to enable interrupt for RXREADY event */ +#define RADIO_INTENSET_RXREADY_Pos (22UL) /*!< Position of RXREADY field. */ +#define RADIO_INTENSET_RXREADY_Msk (0x1UL << RADIO_INTENSET_RXREADY_Pos) /*!< Bit mask of RXREADY field. */ +#define RADIO_INTENSET_RXREADY_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_RXREADY_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_RXREADY_Set (1UL) /*!< Enable */ + +/* Bit 21 : Write '1' to enable interrupt for TXREADY event */ +#define RADIO_INTENSET_TXREADY_Pos (21UL) /*!< Position of TXREADY field. */ +#define RADIO_INTENSET_TXREADY_Msk (0x1UL << RADIO_INTENSET_TXREADY_Pos) /*!< Bit mask of TXREADY field. */ +#define RADIO_INTENSET_TXREADY_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_TXREADY_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_TXREADY_Set (1UL) /*!< Enable */ + +/* Bit 20 : Write '1' to enable interrupt for RATEBOOST event */ +#define RADIO_INTENSET_RATEBOOST_Pos (20UL) /*!< Position of RATEBOOST field. */ +#define RADIO_INTENSET_RATEBOOST_Msk (0x1UL << RADIO_INTENSET_RATEBOOST_Pos) /*!< Bit mask of RATEBOOST field. */ +#define RADIO_INTENSET_RATEBOOST_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_RATEBOOST_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_RATEBOOST_Set (1UL) /*!< Enable */ + +/* Bit 19 : Write '1' to enable interrupt for CCASTOPPED event */ +#define RADIO_INTENSET_CCASTOPPED_Pos (19UL) /*!< Position of CCASTOPPED field. */ +#define RADIO_INTENSET_CCASTOPPED_Msk (0x1UL << RADIO_INTENSET_CCASTOPPED_Pos) /*!< Bit mask of CCASTOPPED field. */ +#define RADIO_INTENSET_CCASTOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_CCASTOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_CCASTOPPED_Set (1UL) /*!< Enable */ + +/* Bit 18 : Write '1' to enable interrupt for CCABUSY event */ +#define RADIO_INTENSET_CCABUSY_Pos (18UL) /*!< Position of CCABUSY field. */ +#define RADIO_INTENSET_CCABUSY_Msk (0x1UL << RADIO_INTENSET_CCABUSY_Pos) /*!< Bit mask of CCABUSY field. */ +#define RADIO_INTENSET_CCABUSY_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_CCABUSY_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_CCABUSY_Set (1UL) /*!< Enable */ + +/* Bit 17 : Write '1' to enable interrupt for CCAIDLE event */ +#define RADIO_INTENSET_CCAIDLE_Pos (17UL) /*!< Position of CCAIDLE field. */ +#define RADIO_INTENSET_CCAIDLE_Msk (0x1UL << RADIO_INTENSET_CCAIDLE_Pos) /*!< Bit mask of CCAIDLE field. */ +#define RADIO_INTENSET_CCAIDLE_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_CCAIDLE_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_CCAIDLE_Set (1UL) /*!< Enable */ + +/* Bit 16 : Write '1' to enable interrupt for EDSTOPPED event */ +#define RADIO_INTENSET_EDSTOPPED_Pos (16UL) /*!< Position of EDSTOPPED field. */ +#define RADIO_INTENSET_EDSTOPPED_Msk (0x1UL << RADIO_INTENSET_EDSTOPPED_Pos) /*!< Bit mask of EDSTOPPED field. */ +#define RADIO_INTENSET_EDSTOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_EDSTOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_EDSTOPPED_Set (1UL) /*!< Enable */ + +/* Bit 15 : Write '1' to enable interrupt for EDEND event */ +#define RADIO_INTENSET_EDEND_Pos (15UL) /*!< Position of EDEND field. */ +#define RADIO_INTENSET_EDEND_Msk (0x1UL << RADIO_INTENSET_EDEND_Pos) /*!< Bit mask of EDEND field. */ +#define RADIO_INTENSET_EDEND_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_EDEND_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_EDEND_Set (1UL) /*!< Enable */ + +/* Bit 14 : Write '1' to enable interrupt for FRAMESTART event */ +#define RADIO_INTENSET_FRAMESTART_Pos (14UL) /*!< Position of FRAMESTART field. */ +#define RADIO_INTENSET_FRAMESTART_Msk (0x1UL << RADIO_INTENSET_FRAMESTART_Pos) /*!< Bit mask of FRAMESTART field. */ +#define RADIO_INTENSET_FRAMESTART_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_FRAMESTART_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_FRAMESTART_Set (1UL) /*!< Enable */ + +/* Bit 13 : Write '1' to enable interrupt for CRCERROR event */ +#define RADIO_INTENSET_CRCERROR_Pos (13UL) /*!< Position of CRCERROR field. */ +#define RADIO_INTENSET_CRCERROR_Msk (0x1UL << RADIO_INTENSET_CRCERROR_Pos) /*!< Bit mask of CRCERROR field. */ +#define RADIO_INTENSET_CRCERROR_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_CRCERROR_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_CRCERROR_Set (1UL) /*!< Enable */ + +/* Bit 12 : Write '1' to enable interrupt for CRCOK event */ +#define RADIO_INTENSET_CRCOK_Pos (12UL) /*!< Position of CRCOK field. */ +#define RADIO_INTENSET_CRCOK_Msk (0x1UL << RADIO_INTENSET_CRCOK_Pos) /*!< Bit mask of CRCOK field. */ +#define RADIO_INTENSET_CRCOK_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_CRCOK_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_CRCOK_Set (1UL) /*!< Enable */ + +/* Bit 10 : Write '1' to enable interrupt for BCMATCH event */ +#define RADIO_INTENSET_BCMATCH_Pos (10UL) /*!< Position of BCMATCH field. */ +#define RADIO_INTENSET_BCMATCH_Msk (0x1UL << RADIO_INTENSET_BCMATCH_Pos) /*!< Bit mask of BCMATCH field. */ +#define RADIO_INTENSET_BCMATCH_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_BCMATCH_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_BCMATCH_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to enable interrupt for RSSIEND event */ +#define RADIO_INTENSET_RSSIEND_Pos (7UL) /*!< Position of RSSIEND field. */ +#define RADIO_INTENSET_RSSIEND_Msk (0x1UL << RADIO_INTENSET_RSSIEND_Pos) /*!< Bit mask of RSSIEND field. */ +#define RADIO_INTENSET_RSSIEND_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_RSSIEND_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_RSSIEND_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to enable interrupt for DEVMISS event */ +#define RADIO_INTENSET_DEVMISS_Pos (6UL) /*!< Position of DEVMISS field. */ +#define RADIO_INTENSET_DEVMISS_Msk (0x1UL << RADIO_INTENSET_DEVMISS_Pos) /*!< Bit mask of DEVMISS field. */ +#define RADIO_INTENSET_DEVMISS_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_DEVMISS_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_DEVMISS_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to enable interrupt for DEVMATCH event */ +#define RADIO_INTENSET_DEVMATCH_Pos (5UL) /*!< Position of DEVMATCH field. */ +#define RADIO_INTENSET_DEVMATCH_Msk (0x1UL << RADIO_INTENSET_DEVMATCH_Pos) /*!< Bit mask of DEVMATCH field. */ +#define RADIO_INTENSET_DEVMATCH_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_DEVMATCH_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_DEVMATCH_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to enable interrupt for DISABLED event */ +#define RADIO_INTENSET_DISABLED_Pos (4UL) /*!< Position of DISABLED field. */ +#define RADIO_INTENSET_DISABLED_Msk (0x1UL << RADIO_INTENSET_DISABLED_Pos) /*!< Bit mask of DISABLED field. */ +#define RADIO_INTENSET_DISABLED_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_DISABLED_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_DISABLED_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to enable interrupt for END event */ +#define RADIO_INTENSET_END_Pos (3UL) /*!< Position of END field. */ +#define RADIO_INTENSET_END_Msk (0x1UL << RADIO_INTENSET_END_Pos) /*!< Bit mask of END field. */ +#define RADIO_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_END_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to enable interrupt for PAYLOAD event */ +#define RADIO_INTENSET_PAYLOAD_Pos (2UL) /*!< Position of PAYLOAD field. */ +#define RADIO_INTENSET_PAYLOAD_Msk (0x1UL << RADIO_INTENSET_PAYLOAD_Pos) /*!< Bit mask of PAYLOAD field. */ +#define RADIO_INTENSET_PAYLOAD_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_PAYLOAD_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_PAYLOAD_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable interrupt for ADDRESS event */ +#define RADIO_INTENSET_ADDRESS_Pos (1UL) /*!< Position of ADDRESS field. */ +#define RADIO_INTENSET_ADDRESS_Msk (0x1UL << RADIO_INTENSET_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ +#define RADIO_INTENSET_ADDRESS_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_ADDRESS_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_ADDRESS_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to enable interrupt for READY event */ +#define RADIO_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */ +#define RADIO_INTENSET_READY_Msk (0x1UL << RADIO_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ +#define RADIO_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_READY_Set (1UL) /*!< Enable */ + +/* Register: RADIO_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 27 : Write '1' to disable interrupt for PHYEND event */ +#define RADIO_INTENCLR_PHYEND_Pos (27UL) /*!< Position of PHYEND field. */ +#define RADIO_INTENCLR_PHYEND_Msk (0x1UL << RADIO_INTENCLR_PHYEND_Pos) /*!< Bit mask of PHYEND field. */ +#define RADIO_INTENCLR_PHYEND_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_PHYEND_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_PHYEND_Clear (1UL) /*!< Disable */ + +/* Bit 23 : Write '1' to disable interrupt for MHRMATCH event */ +#define RADIO_INTENCLR_MHRMATCH_Pos (23UL) /*!< Position of MHRMATCH field. */ +#define RADIO_INTENCLR_MHRMATCH_Msk (0x1UL << RADIO_INTENCLR_MHRMATCH_Pos) /*!< Bit mask of MHRMATCH field. */ +#define RADIO_INTENCLR_MHRMATCH_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_MHRMATCH_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_MHRMATCH_Clear (1UL) /*!< Disable */ + +/* Bit 22 : Write '1' to disable interrupt for RXREADY event */ +#define RADIO_INTENCLR_RXREADY_Pos (22UL) /*!< Position of RXREADY field. */ +#define RADIO_INTENCLR_RXREADY_Msk (0x1UL << RADIO_INTENCLR_RXREADY_Pos) /*!< Bit mask of RXREADY field. */ +#define RADIO_INTENCLR_RXREADY_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_RXREADY_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_RXREADY_Clear (1UL) /*!< Disable */ + +/* Bit 21 : Write '1' to disable interrupt for TXREADY event */ +#define RADIO_INTENCLR_TXREADY_Pos (21UL) /*!< Position of TXREADY field. */ +#define RADIO_INTENCLR_TXREADY_Msk (0x1UL << RADIO_INTENCLR_TXREADY_Pos) /*!< Bit mask of TXREADY field. */ +#define RADIO_INTENCLR_TXREADY_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_TXREADY_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_TXREADY_Clear (1UL) /*!< Disable */ + +/* Bit 20 : Write '1' to disable interrupt for RATEBOOST event */ +#define RADIO_INTENCLR_RATEBOOST_Pos (20UL) /*!< Position of RATEBOOST field. */ +#define RADIO_INTENCLR_RATEBOOST_Msk (0x1UL << RADIO_INTENCLR_RATEBOOST_Pos) /*!< Bit mask of RATEBOOST field. */ +#define RADIO_INTENCLR_RATEBOOST_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_RATEBOOST_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_RATEBOOST_Clear (1UL) /*!< Disable */ + +/* Bit 19 : Write '1' to disable interrupt for CCASTOPPED event */ +#define RADIO_INTENCLR_CCASTOPPED_Pos (19UL) /*!< Position of CCASTOPPED field. */ +#define RADIO_INTENCLR_CCASTOPPED_Msk (0x1UL << RADIO_INTENCLR_CCASTOPPED_Pos) /*!< Bit mask of CCASTOPPED field. */ +#define RADIO_INTENCLR_CCASTOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_CCASTOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_CCASTOPPED_Clear (1UL) /*!< Disable */ + +/* Bit 18 : Write '1' to disable interrupt for CCABUSY event */ +#define RADIO_INTENCLR_CCABUSY_Pos (18UL) /*!< Position of CCABUSY field. */ +#define RADIO_INTENCLR_CCABUSY_Msk (0x1UL << RADIO_INTENCLR_CCABUSY_Pos) /*!< Bit mask of CCABUSY field. */ +#define RADIO_INTENCLR_CCABUSY_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_CCABUSY_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_CCABUSY_Clear (1UL) /*!< Disable */ + +/* Bit 17 : Write '1' to disable interrupt for CCAIDLE event */ +#define RADIO_INTENCLR_CCAIDLE_Pos (17UL) /*!< Position of CCAIDLE field. */ +#define RADIO_INTENCLR_CCAIDLE_Msk (0x1UL << RADIO_INTENCLR_CCAIDLE_Pos) /*!< Bit mask of CCAIDLE field. */ +#define RADIO_INTENCLR_CCAIDLE_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_CCAIDLE_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_CCAIDLE_Clear (1UL) /*!< Disable */ + +/* Bit 16 : Write '1' to disable interrupt for EDSTOPPED event */ +#define RADIO_INTENCLR_EDSTOPPED_Pos (16UL) /*!< Position of EDSTOPPED field. */ +#define RADIO_INTENCLR_EDSTOPPED_Msk (0x1UL << RADIO_INTENCLR_EDSTOPPED_Pos) /*!< Bit mask of EDSTOPPED field. */ +#define RADIO_INTENCLR_EDSTOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_EDSTOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_EDSTOPPED_Clear (1UL) /*!< Disable */ + +/* Bit 15 : Write '1' to disable interrupt for EDEND event */ +#define RADIO_INTENCLR_EDEND_Pos (15UL) /*!< Position of EDEND field. */ +#define RADIO_INTENCLR_EDEND_Msk (0x1UL << RADIO_INTENCLR_EDEND_Pos) /*!< Bit mask of EDEND field. */ +#define RADIO_INTENCLR_EDEND_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_EDEND_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_EDEND_Clear (1UL) /*!< Disable */ + +/* Bit 14 : Write '1' to disable interrupt for FRAMESTART event */ +#define RADIO_INTENCLR_FRAMESTART_Pos (14UL) /*!< Position of FRAMESTART field. */ +#define RADIO_INTENCLR_FRAMESTART_Msk (0x1UL << RADIO_INTENCLR_FRAMESTART_Pos) /*!< Bit mask of FRAMESTART field. */ +#define RADIO_INTENCLR_FRAMESTART_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_FRAMESTART_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_FRAMESTART_Clear (1UL) /*!< Disable */ + +/* Bit 13 : Write '1' to disable interrupt for CRCERROR event */ +#define RADIO_INTENCLR_CRCERROR_Pos (13UL) /*!< Position of CRCERROR field. */ +#define RADIO_INTENCLR_CRCERROR_Msk (0x1UL << RADIO_INTENCLR_CRCERROR_Pos) /*!< Bit mask of CRCERROR field. */ +#define RADIO_INTENCLR_CRCERROR_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_CRCERROR_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_CRCERROR_Clear (1UL) /*!< Disable */ + +/* Bit 12 : Write '1' to disable interrupt for CRCOK event */ +#define RADIO_INTENCLR_CRCOK_Pos (12UL) /*!< Position of CRCOK field. */ +#define RADIO_INTENCLR_CRCOK_Msk (0x1UL << RADIO_INTENCLR_CRCOK_Pos) /*!< Bit mask of CRCOK field. */ +#define RADIO_INTENCLR_CRCOK_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_CRCOK_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_CRCOK_Clear (1UL) /*!< Disable */ + +/* Bit 10 : Write '1' to disable interrupt for BCMATCH event */ +#define RADIO_INTENCLR_BCMATCH_Pos (10UL) /*!< Position of BCMATCH field. */ +#define RADIO_INTENCLR_BCMATCH_Msk (0x1UL << RADIO_INTENCLR_BCMATCH_Pos) /*!< Bit mask of BCMATCH field. */ +#define RADIO_INTENCLR_BCMATCH_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_BCMATCH_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_BCMATCH_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to disable interrupt for RSSIEND event */ +#define RADIO_INTENCLR_RSSIEND_Pos (7UL) /*!< Position of RSSIEND field. */ +#define RADIO_INTENCLR_RSSIEND_Msk (0x1UL << RADIO_INTENCLR_RSSIEND_Pos) /*!< Bit mask of RSSIEND field. */ +#define RADIO_INTENCLR_RSSIEND_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_RSSIEND_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_RSSIEND_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to disable interrupt for DEVMISS event */ +#define RADIO_INTENCLR_DEVMISS_Pos (6UL) /*!< Position of DEVMISS field. */ +#define RADIO_INTENCLR_DEVMISS_Msk (0x1UL << RADIO_INTENCLR_DEVMISS_Pos) /*!< Bit mask of DEVMISS field. */ +#define RADIO_INTENCLR_DEVMISS_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_DEVMISS_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_DEVMISS_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to disable interrupt for DEVMATCH event */ +#define RADIO_INTENCLR_DEVMATCH_Pos (5UL) /*!< Position of DEVMATCH field. */ +#define RADIO_INTENCLR_DEVMATCH_Msk (0x1UL << RADIO_INTENCLR_DEVMATCH_Pos) /*!< Bit mask of DEVMATCH field. */ +#define RADIO_INTENCLR_DEVMATCH_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_DEVMATCH_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_DEVMATCH_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to disable interrupt for DISABLED event */ +#define RADIO_INTENCLR_DISABLED_Pos (4UL) /*!< Position of DISABLED field. */ +#define RADIO_INTENCLR_DISABLED_Msk (0x1UL << RADIO_INTENCLR_DISABLED_Pos) /*!< Bit mask of DISABLED field. */ +#define RADIO_INTENCLR_DISABLED_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_DISABLED_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_DISABLED_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to disable interrupt for END event */ +#define RADIO_INTENCLR_END_Pos (3UL) /*!< Position of END field. */ +#define RADIO_INTENCLR_END_Msk (0x1UL << RADIO_INTENCLR_END_Pos) /*!< Bit mask of END field. */ +#define RADIO_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_END_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to disable interrupt for PAYLOAD event */ +#define RADIO_INTENCLR_PAYLOAD_Pos (2UL) /*!< Position of PAYLOAD field. */ +#define RADIO_INTENCLR_PAYLOAD_Msk (0x1UL << RADIO_INTENCLR_PAYLOAD_Pos) /*!< Bit mask of PAYLOAD field. */ +#define RADIO_INTENCLR_PAYLOAD_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_PAYLOAD_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_PAYLOAD_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable interrupt for ADDRESS event */ +#define RADIO_INTENCLR_ADDRESS_Pos (1UL) /*!< Position of ADDRESS field. */ +#define RADIO_INTENCLR_ADDRESS_Msk (0x1UL << RADIO_INTENCLR_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ +#define RADIO_INTENCLR_ADDRESS_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_ADDRESS_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_ADDRESS_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to disable interrupt for READY event */ +#define RADIO_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */ +#define RADIO_INTENCLR_READY_Msk (0x1UL << RADIO_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ +#define RADIO_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_READY_Clear (1UL) /*!< Disable */ + +/* Register: RADIO_CRCSTATUS */ +/* Description: CRC status */ + +/* Bit 0 : CRC status of packet received */ +#define RADIO_CRCSTATUS_CRCSTATUS_Pos (0UL) /*!< Position of CRCSTATUS field. */ +#define RADIO_CRCSTATUS_CRCSTATUS_Msk (0x1UL << RADIO_CRCSTATUS_CRCSTATUS_Pos) /*!< Bit mask of CRCSTATUS field. */ +#define RADIO_CRCSTATUS_CRCSTATUS_CRCError (0UL) /*!< Packet received with CRC error */ +#define RADIO_CRCSTATUS_CRCSTATUS_CRCOk (1UL) /*!< Packet received with CRC ok */ + +/* Register: RADIO_RXMATCH */ +/* Description: Received address */ + +/* Bits 2..0 : Received address */ +#define RADIO_RXMATCH_RXMATCH_Pos (0UL) /*!< Position of RXMATCH field. */ +#define RADIO_RXMATCH_RXMATCH_Msk (0x7UL << RADIO_RXMATCH_RXMATCH_Pos) /*!< Bit mask of RXMATCH field. */ + +/* Register: RADIO_RXCRC */ +/* Description: CRC field of previously received packet */ + +/* Bits 23..0 : CRC field of previously received packet */ +#define RADIO_RXCRC_RXCRC_Pos (0UL) /*!< Position of RXCRC field. */ +#define RADIO_RXCRC_RXCRC_Msk (0xFFFFFFUL << RADIO_RXCRC_RXCRC_Pos) /*!< Bit mask of RXCRC field. */ + +/* Register: RADIO_DAI */ +/* Description: Device address match index */ + +/* Bits 2..0 : Device address match index */ +#define RADIO_DAI_DAI_Pos (0UL) /*!< Position of DAI field. */ +#define RADIO_DAI_DAI_Msk (0x7UL << RADIO_DAI_DAI_Pos) /*!< Bit mask of DAI field. */ + +/* Register: RADIO_PDUSTAT */ +/* Description: Payload status */ + +/* Bits 2..1 : Status on what rate packet is received with in Long Range */ +#define RADIO_PDUSTAT_CISTAT_Pos (1UL) /*!< Position of CISTAT field. */ +#define RADIO_PDUSTAT_CISTAT_Msk (0x3UL << RADIO_PDUSTAT_CISTAT_Pos) /*!< Bit mask of CISTAT field. */ +#define RADIO_PDUSTAT_CISTAT_LR125kbit (0UL) /*!< Frame is received at 125kbps */ +#define RADIO_PDUSTAT_CISTAT_LR500kbit (1UL) /*!< Frame is received at 500kbps */ + +/* Bit 0 : Status on payload length vs. PCNF1.MAXLEN */ +#define RADIO_PDUSTAT_PDUSTAT_Pos (0UL) /*!< Position of PDUSTAT field. */ +#define RADIO_PDUSTAT_PDUSTAT_Msk (0x1UL << RADIO_PDUSTAT_PDUSTAT_Pos) /*!< Bit mask of PDUSTAT field. */ +#define RADIO_PDUSTAT_PDUSTAT_LessThan (0UL) /*!< Payload less than PCNF1.MAXLEN */ +#define RADIO_PDUSTAT_PDUSTAT_GreaterThan (1UL) /*!< Payload greater than PCNF1.MAXLEN */ + +/* Register: RADIO_PACKETPTR */ +/* Description: Packet pointer */ + +/* Bits 31..0 : Packet pointer */ +#define RADIO_PACKETPTR_PACKETPTR_Pos (0UL) /*!< Position of PACKETPTR field. */ +#define RADIO_PACKETPTR_PACKETPTR_Msk (0xFFFFFFFFUL << RADIO_PACKETPTR_PACKETPTR_Pos) /*!< Bit mask of PACKETPTR field. */ + +/* Register: RADIO_FREQUENCY */ +/* Description: Frequency */ + +/* Bit 8 : Channel map selection. */ +#define RADIO_FREQUENCY_MAP_Pos (8UL) /*!< Position of MAP field. */ +#define RADIO_FREQUENCY_MAP_Msk (0x1UL << RADIO_FREQUENCY_MAP_Pos) /*!< Bit mask of MAP field. */ +#define RADIO_FREQUENCY_MAP_Default (0UL) /*!< Channel map between 2400 MHZ .. 2500 MHz */ +#define RADIO_FREQUENCY_MAP_Low (1UL) /*!< Channel map between 2360 MHZ .. 2460 MHz */ + +/* Bits 6..0 : Radio channel frequency */ +#define RADIO_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ +#define RADIO_FREQUENCY_FREQUENCY_Msk (0x7FUL << RADIO_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ + +/* Register: RADIO_TXPOWER */ +/* Description: Output power */ + +/* Bits 7..0 : RADIO output power */ +#define RADIO_TXPOWER_TXPOWER_Pos (0UL) /*!< Position of TXPOWER field. */ +#define RADIO_TXPOWER_TXPOWER_Msk (0xFFUL << RADIO_TXPOWER_TXPOWER_Pos) /*!< Bit mask of TXPOWER field. */ +#define RADIO_TXPOWER_TXPOWER_0dBm (0x0UL) /*!< 0 dBm */ +#define RADIO_TXPOWER_TXPOWER_Pos2dBm (0x2UL) /*!< +2 dBm */ +#define RADIO_TXPOWER_TXPOWER_Pos3dBm (0x3UL) /*!< +3 dBm */ +#define RADIO_TXPOWER_TXPOWER_Pos4dBm (0x4UL) /*!< +4 dBm */ +#define RADIO_TXPOWER_TXPOWER_Pos5dBm (0x5UL) /*!< +5 dBm */ +#define RADIO_TXPOWER_TXPOWER_Pos6dBm (0x6UL) /*!< +6 dBm */ +#define RADIO_TXPOWER_TXPOWER_Pos7dBm (0x7UL) /*!< +7 dBm */ +#define RADIO_TXPOWER_TXPOWER_Pos8dBm (0x8UL) /*!< +8 dBm */ +#define RADIO_TXPOWER_TXPOWER_Neg40dBm (0xD8UL) /*!< -40 dBm */ +#define RADIO_TXPOWER_TXPOWER_Neg20dBm (0xECUL) /*!< -20 dBm */ +#define RADIO_TXPOWER_TXPOWER_Neg16dBm (0xF0UL) /*!< -16 dBm */ +#define RADIO_TXPOWER_TXPOWER_Neg12dBm (0xF4UL) /*!< -12 dBm */ +#define RADIO_TXPOWER_TXPOWER_Neg8dBm (0xF8UL) /*!< -8 dBm */ +#define RADIO_TXPOWER_TXPOWER_Neg4dBm (0xFCUL) /*!< -4 dBm */ +#define RADIO_TXPOWER_TXPOWER_Neg30dBm (0xFFUL) /*!< Deprecated enumerator - -40 dBm */ + +/* Register: RADIO_MODE */ +/* Description: Data rate and modulation */ + +/* Bits 3..0 : Radio data rate and modulation setting. The radio supports frequency-shift keying (FSK) modulation. */ +#define RADIO_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ +#define RADIO_MODE_MODE_Msk (0xFUL << RADIO_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ +#define RADIO_MODE_MODE_Nrf_1Mbit (0UL) /*!< 1 Mbit/s Nordic proprietary radio mode */ +#define RADIO_MODE_MODE_Nrf_2Mbit (1UL) /*!< 2 Mbit/s Nordic proprietary radio mode */ +#define RADIO_MODE_MODE_Ble_1Mbit (3UL) /*!< 1 Mbit/s BLE */ +#define RADIO_MODE_MODE_Ble_2Mbit (4UL) /*!< 2 Mbit/s BLE */ +#define RADIO_MODE_MODE_Ble_LR125Kbit (5UL) /*!< Long range 125 kbit/s TX, 125 kbit/s and 500 kbit/s RX */ +#define RADIO_MODE_MODE_Ble_LR500Kbit (6UL) /*!< Long range 500 kbit/s TX, 125 kbit/s and 500 kbit/s RX */ +#define RADIO_MODE_MODE_Ieee802154_250Kbit (15UL) /*!< IEEE 802.15.4-2006 250 kbit/s */ + +/* Register: RADIO_PCNF0 */ +/* Description: Packet configuration register 0 */ + +/* Bits 30..29 : Length of TERM field in Long Range operation */ +#define RADIO_PCNF0_TERMLEN_Pos (29UL) /*!< Position of TERMLEN field. */ +#define RADIO_PCNF0_TERMLEN_Msk (0x3UL << RADIO_PCNF0_TERMLEN_Pos) /*!< Bit mask of TERMLEN field. */ + +/* Bit 26 : Indicates if LENGTH field contains CRC or not */ +#define RADIO_PCNF0_CRCINC_Pos (26UL) /*!< Position of CRCINC field. */ +#define RADIO_PCNF0_CRCINC_Msk (0x1UL << RADIO_PCNF0_CRCINC_Pos) /*!< Bit mask of CRCINC field. */ +#define RADIO_PCNF0_CRCINC_Exclude (0UL) /*!< LENGTH does not contain CRC */ +#define RADIO_PCNF0_CRCINC_Include (1UL) /*!< LENGTH includes CRC */ + +/* Bits 25..24 : Length of preamble on air. Decision point: TASKS_START task */ +#define RADIO_PCNF0_PLEN_Pos (24UL) /*!< Position of PLEN field. */ +#define RADIO_PCNF0_PLEN_Msk (0x3UL << RADIO_PCNF0_PLEN_Pos) /*!< Bit mask of PLEN field. */ +#define RADIO_PCNF0_PLEN_8bit (0UL) /*!< 8-bit preamble */ +#define RADIO_PCNF0_PLEN_16bit (1UL) /*!< 16-bit preamble */ +#define RADIO_PCNF0_PLEN_32bitZero (2UL) /*!< 32-bit zero preamble - used for IEEE 802.15.4 */ +#define RADIO_PCNF0_PLEN_LongRange (3UL) /*!< Preamble - used for BLE long range */ + +/* Bits 23..22 : Length of code indicator - long range */ +#define RADIO_PCNF0_CILEN_Pos (22UL) /*!< Position of CILEN field. */ +#define RADIO_PCNF0_CILEN_Msk (0x3UL << RADIO_PCNF0_CILEN_Pos) /*!< Bit mask of CILEN field. */ + +/* Bit 20 : Include or exclude S1 field in RAM */ +#define RADIO_PCNF0_S1INCL_Pos (20UL) /*!< Position of S1INCL field. */ +#define RADIO_PCNF0_S1INCL_Msk (0x1UL << RADIO_PCNF0_S1INCL_Pos) /*!< Bit mask of S1INCL field. */ +#define RADIO_PCNF0_S1INCL_Automatic (0UL) /*!< Include S1 field in RAM only if S1LEN > 0 */ +#define RADIO_PCNF0_S1INCL_Include (1UL) /*!< Always include S1 field in RAM independent of S1LEN */ + +/* Bits 19..16 : Length on air of S1 field in number of bits. */ +#define RADIO_PCNF0_S1LEN_Pos (16UL) /*!< Position of S1LEN field. */ +#define RADIO_PCNF0_S1LEN_Msk (0xFUL << RADIO_PCNF0_S1LEN_Pos) /*!< Bit mask of S1LEN field. */ + +/* Bit 8 : Length on air of S0 field in number of bytes. */ +#define RADIO_PCNF0_S0LEN_Pos (8UL) /*!< Position of S0LEN field. */ +#define RADIO_PCNF0_S0LEN_Msk (0x1UL << RADIO_PCNF0_S0LEN_Pos) /*!< Bit mask of S0LEN field. */ + +/* Bits 3..0 : Length on air of LENGTH field in number of bits. */ +#define RADIO_PCNF0_LFLEN_Pos (0UL) /*!< Position of LFLEN field. */ +#define RADIO_PCNF0_LFLEN_Msk (0xFUL << RADIO_PCNF0_LFLEN_Pos) /*!< Bit mask of LFLEN field. */ + +/* Register: RADIO_PCNF1 */ +/* Description: Packet configuration register 1 */ + +/* Bit 25 : Enable or disable packet whitening */ +#define RADIO_PCNF1_WHITEEN_Pos (25UL) /*!< Position of WHITEEN field. */ +#define RADIO_PCNF1_WHITEEN_Msk (0x1UL << RADIO_PCNF1_WHITEEN_Pos) /*!< Bit mask of WHITEEN field. */ +#define RADIO_PCNF1_WHITEEN_Disabled (0UL) /*!< Disable */ +#define RADIO_PCNF1_WHITEEN_Enabled (1UL) /*!< Enable */ + +/* Bit 24 : On air endianness of packet, this applies to the S0, LENGTH, S1 and the PAYLOAD fields. */ +#define RADIO_PCNF1_ENDIAN_Pos (24UL) /*!< Position of ENDIAN field. */ +#define RADIO_PCNF1_ENDIAN_Msk (0x1UL << RADIO_PCNF1_ENDIAN_Pos) /*!< Bit mask of ENDIAN field. */ +#define RADIO_PCNF1_ENDIAN_Little (0UL) /*!< Least significant bit on air first */ +#define RADIO_PCNF1_ENDIAN_Big (1UL) /*!< Most significant bit on air first */ + +/* Bits 18..16 : Base address length in number of bytes */ +#define RADIO_PCNF1_BALEN_Pos (16UL) /*!< Position of BALEN field. */ +#define RADIO_PCNF1_BALEN_Msk (0x7UL << RADIO_PCNF1_BALEN_Pos) /*!< Bit mask of BALEN field. */ + +/* Bits 15..8 : Static length in number of bytes */ +#define RADIO_PCNF1_STATLEN_Pos (8UL) /*!< Position of STATLEN field. */ +#define RADIO_PCNF1_STATLEN_Msk (0xFFUL << RADIO_PCNF1_STATLEN_Pos) /*!< Bit mask of STATLEN field. */ + +/* Bits 7..0 : Maximum length of packet payload. If the packet payload is larger than MAXLEN, the radio will truncate the payload to MAXLEN. */ +#define RADIO_PCNF1_MAXLEN_Pos (0UL) /*!< Position of MAXLEN field. */ +#define RADIO_PCNF1_MAXLEN_Msk (0xFFUL << RADIO_PCNF1_MAXLEN_Pos) /*!< Bit mask of MAXLEN field. */ + +/* Register: RADIO_BASE0 */ +/* Description: Base address 0 */ + +/* Bits 31..0 : Base address 0 */ +#define RADIO_BASE0_BASE0_Pos (0UL) /*!< Position of BASE0 field. */ +#define RADIO_BASE0_BASE0_Msk (0xFFFFFFFFUL << RADIO_BASE0_BASE0_Pos) /*!< Bit mask of BASE0 field. */ + +/* Register: RADIO_BASE1 */ +/* Description: Base address 1 */ + +/* Bits 31..0 : Base address 1 */ +#define RADIO_BASE1_BASE1_Pos (0UL) /*!< Position of BASE1 field. */ +#define RADIO_BASE1_BASE1_Msk (0xFFFFFFFFUL << RADIO_BASE1_BASE1_Pos) /*!< Bit mask of BASE1 field. */ + +/* Register: RADIO_PREFIX0 */ +/* Description: Prefixes bytes for logical addresses 0-3 */ + +/* Bits 31..24 : Address prefix 3. */ +#define RADIO_PREFIX0_AP3_Pos (24UL) /*!< Position of AP3 field. */ +#define RADIO_PREFIX0_AP3_Msk (0xFFUL << RADIO_PREFIX0_AP3_Pos) /*!< Bit mask of AP3 field. */ + +/* Bits 23..16 : Address prefix 2. */ +#define RADIO_PREFIX0_AP2_Pos (16UL) /*!< Position of AP2 field. */ +#define RADIO_PREFIX0_AP2_Msk (0xFFUL << RADIO_PREFIX0_AP2_Pos) /*!< Bit mask of AP2 field. */ + +/* Bits 15..8 : Address prefix 1. */ +#define RADIO_PREFIX0_AP1_Pos (8UL) /*!< Position of AP1 field. */ +#define RADIO_PREFIX0_AP1_Msk (0xFFUL << RADIO_PREFIX0_AP1_Pos) /*!< Bit mask of AP1 field. */ + +/* Bits 7..0 : Address prefix 0. */ +#define RADIO_PREFIX0_AP0_Pos (0UL) /*!< Position of AP0 field. */ +#define RADIO_PREFIX0_AP0_Msk (0xFFUL << RADIO_PREFIX0_AP0_Pos) /*!< Bit mask of AP0 field. */ + +/* Register: RADIO_PREFIX1 */ +/* Description: Prefixes bytes for logical addresses 4-7 */ + +/* Bits 31..24 : Address prefix 7. */ +#define RADIO_PREFIX1_AP7_Pos (24UL) /*!< Position of AP7 field. */ +#define RADIO_PREFIX1_AP7_Msk (0xFFUL << RADIO_PREFIX1_AP7_Pos) /*!< Bit mask of AP7 field. */ + +/* Bits 23..16 : Address prefix 6. */ +#define RADIO_PREFIX1_AP6_Pos (16UL) /*!< Position of AP6 field. */ +#define RADIO_PREFIX1_AP6_Msk (0xFFUL << RADIO_PREFIX1_AP6_Pos) /*!< Bit mask of AP6 field. */ + +/* Bits 15..8 : Address prefix 5. */ +#define RADIO_PREFIX1_AP5_Pos (8UL) /*!< Position of AP5 field. */ +#define RADIO_PREFIX1_AP5_Msk (0xFFUL << RADIO_PREFIX1_AP5_Pos) /*!< Bit mask of AP5 field. */ + +/* Bits 7..0 : Address prefix 4. */ +#define RADIO_PREFIX1_AP4_Pos (0UL) /*!< Position of AP4 field. */ +#define RADIO_PREFIX1_AP4_Msk (0xFFUL << RADIO_PREFIX1_AP4_Pos) /*!< Bit mask of AP4 field. */ + +/* Register: RADIO_TXADDRESS */ +/* Description: Transmit address select */ + +/* Bits 2..0 : Transmit address select */ +#define RADIO_TXADDRESS_TXADDRESS_Pos (0UL) /*!< Position of TXADDRESS field. */ +#define RADIO_TXADDRESS_TXADDRESS_Msk (0x7UL << RADIO_TXADDRESS_TXADDRESS_Pos) /*!< Bit mask of TXADDRESS field. */ + +/* Register: RADIO_RXADDRESSES */ +/* Description: Receive address select */ + +/* Bit 7 : Enable or disable reception on logical address 7. */ +#define RADIO_RXADDRESSES_ADDR7_Pos (7UL) /*!< Position of ADDR7 field. */ +#define RADIO_RXADDRESSES_ADDR7_Msk (0x1UL << RADIO_RXADDRESSES_ADDR7_Pos) /*!< Bit mask of ADDR7 field. */ +#define RADIO_RXADDRESSES_ADDR7_Disabled (0UL) /*!< Disable */ +#define RADIO_RXADDRESSES_ADDR7_Enabled (1UL) /*!< Enable */ + +/* Bit 6 : Enable or disable reception on logical address 6. */ +#define RADIO_RXADDRESSES_ADDR6_Pos (6UL) /*!< Position of ADDR6 field. */ +#define RADIO_RXADDRESSES_ADDR6_Msk (0x1UL << RADIO_RXADDRESSES_ADDR6_Pos) /*!< Bit mask of ADDR6 field. */ +#define RADIO_RXADDRESSES_ADDR6_Disabled (0UL) /*!< Disable */ +#define RADIO_RXADDRESSES_ADDR6_Enabled (1UL) /*!< Enable */ + +/* Bit 5 : Enable or disable reception on logical address 5. */ +#define RADIO_RXADDRESSES_ADDR5_Pos (5UL) /*!< Position of ADDR5 field. */ +#define RADIO_RXADDRESSES_ADDR5_Msk (0x1UL << RADIO_RXADDRESSES_ADDR5_Pos) /*!< Bit mask of ADDR5 field. */ +#define RADIO_RXADDRESSES_ADDR5_Disabled (0UL) /*!< Disable */ +#define RADIO_RXADDRESSES_ADDR5_Enabled (1UL) /*!< Enable */ + +/* Bit 4 : Enable or disable reception on logical address 4. */ +#define RADIO_RXADDRESSES_ADDR4_Pos (4UL) /*!< Position of ADDR4 field. */ +#define RADIO_RXADDRESSES_ADDR4_Msk (0x1UL << RADIO_RXADDRESSES_ADDR4_Pos) /*!< Bit mask of ADDR4 field. */ +#define RADIO_RXADDRESSES_ADDR4_Disabled (0UL) /*!< Disable */ +#define RADIO_RXADDRESSES_ADDR4_Enabled (1UL) /*!< Enable */ + +/* Bit 3 : Enable or disable reception on logical address 3. */ +#define RADIO_RXADDRESSES_ADDR3_Pos (3UL) /*!< Position of ADDR3 field. */ +#define RADIO_RXADDRESSES_ADDR3_Msk (0x1UL << RADIO_RXADDRESSES_ADDR3_Pos) /*!< Bit mask of ADDR3 field. */ +#define RADIO_RXADDRESSES_ADDR3_Disabled (0UL) /*!< Disable */ +#define RADIO_RXADDRESSES_ADDR3_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable reception on logical address 2. */ +#define RADIO_RXADDRESSES_ADDR2_Pos (2UL) /*!< Position of ADDR2 field. */ +#define RADIO_RXADDRESSES_ADDR2_Msk (0x1UL << RADIO_RXADDRESSES_ADDR2_Pos) /*!< Bit mask of ADDR2 field. */ +#define RADIO_RXADDRESSES_ADDR2_Disabled (0UL) /*!< Disable */ +#define RADIO_RXADDRESSES_ADDR2_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable reception on logical address 1. */ +#define RADIO_RXADDRESSES_ADDR1_Pos (1UL) /*!< Position of ADDR1 field. */ +#define RADIO_RXADDRESSES_ADDR1_Msk (0x1UL << RADIO_RXADDRESSES_ADDR1_Pos) /*!< Bit mask of ADDR1 field. */ +#define RADIO_RXADDRESSES_ADDR1_Disabled (0UL) /*!< Disable */ +#define RADIO_RXADDRESSES_ADDR1_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable reception on logical address 0. */ +#define RADIO_RXADDRESSES_ADDR0_Pos (0UL) /*!< Position of ADDR0 field. */ +#define RADIO_RXADDRESSES_ADDR0_Msk (0x1UL << RADIO_RXADDRESSES_ADDR0_Pos) /*!< Bit mask of ADDR0 field. */ +#define RADIO_RXADDRESSES_ADDR0_Disabled (0UL) /*!< Disable */ +#define RADIO_RXADDRESSES_ADDR0_Enabled (1UL) /*!< Enable */ + +/* Register: RADIO_CRCCNF */ +/* Description: CRC configuration */ + +/* Bits 9..8 : Include or exclude packet address field out of CRC calculation. */ +#define RADIO_CRCCNF_SKIPADDR_Pos (8UL) /*!< Position of SKIPADDR field. */ +#define RADIO_CRCCNF_SKIPADDR_Msk (0x3UL << RADIO_CRCCNF_SKIPADDR_Pos) /*!< Bit mask of SKIPADDR field. */ +#define RADIO_CRCCNF_SKIPADDR_Include (0UL) /*!< CRC calculation includes address field */ +#define RADIO_CRCCNF_SKIPADDR_Skip (1UL) /*!< CRC calculation does not include address field. The CRC calculation will start at the first byte after the address. */ +#define RADIO_CRCCNF_SKIPADDR_Ieee802154 (2UL) /*!< CRC calculation as per 802.15.4 standard. Starting at first byte after length field. */ + +/* Bits 1..0 : CRC length in number of bytes. */ +#define RADIO_CRCCNF_LEN_Pos (0UL) /*!< Position of LEN field. */ +#define RADIO_CRCCNF_LEN_Msk (0x3UL << RADIO_CRCCNF_LEN_Pos) /*!< Bit mask of LEN field. */ +#define RADIO_CRCCNF_LEN_Disabled (0UL) /*!< CRC length is zero and CRC calculation is disabled */ +#define RADIO_CRCCNF_LEN_One (1UL) /*!< CRC length is one byte and CRC calculation is enabled */ +#define RADIO_CRCCNF_LEN_Two (2UL) /*!< CRC length is two bytes and CRC calculation is enabled */ +#define RADIO_CRCCNF_LEN_Three (3UL) /*!< CRC length is three bytes and CRC calculation is enabled */ + +/* Register: RADIO_CRCPOLY */ +/* Description: CRC polynomial */ + +/* Bits 23..0 : CRC polynomial */ +#define RADIO_CRCPOLY_CRCPOLY_Pos (0UL) /*!< Position of CRCPOLY field. */ +#define RADIO_CRCPOLY_CRCPOLY_Msk (0xFFFFFFUL << RADIO_CRCPOLY_CRCPOLY_Pos) /*!< Bit mask of CRCPOLY field. */ + +/* Register: RADIO_CRCINIT */ +/* Description: CRC initial value */ + +/* Bits 23..0 : CRC initial value */ +#define RADIO_CRCINIT_CRCINIT_Pos (0UL) /*!< Position of CRCINIT field. */ +#define RADIO_CRCINIT_CRCINIT_Msk (0xFFFFFFUL << RADIO_CRCINIT_CRCINIT_Pos) /*!< Bit mask of CRCINIT field. */ + +/* Register: RADIO_TIFS */ +/* Description: Interframe spacing in us */ + +/* Bits 9..0 : Interframe spacing in us */ +#define RADIO_TIFS_TIFS_Pos (0UL) /*!< Position of TIFS field. */ +#define RADIO_TIFS_TIFS_Msk (0x3FFUL << RADIO_TIFS_TIFS_Pos) /*!< Bit mask of TIFS field. */ + +/* Register: RADIO_RSSISAMPLE */ +/* Description: RSSI sample */ + +/* Bits 6..0 : RSSI sample */ +#define RADIO_RSSISAMPLE_RSSISAMPLE_Pos (0UL) /*!< Position of RSSISAMPLE field. */ +#define RADIO_RSSISAMPLE_RSSISAMPLE_Msk (0x7FUL << RADIO_RSSISAMPLE_RSSISAMPLE_Pos) /*!< Bit mask of RSSISAMPLE field. */ + +/* Register: RADIO_STATE */ +/* Description: Current radio state */ + +/* Bits 3..0 : Current radio state */ +#define RADIO_STATE_STATE_Pos (0UL) /*!< Position of STATE field. */ +#define RADIO_STATE_STATE_Msk (0xFUL << RADIO_STATE_STATE_Pos) /*!< Bit mask of STATE field. */ +#define RADIO_STATE_STATE_Disabled (0UL) /*!< RADIO is in the Disabled state */ +#define RADIO_STATE_STATE_RxRu (1UL) /*!< RADIO is in the RXRU state */ +#define RADIO_STATE_STATE_RxIdle (2UL) /*!< RADIO is in the RXIDLE state */ +#define RADIO_STATE_STATE_Rx (3UL) /*!< RADIO is in the RX state */ +#define RADIO_STATE_STATE_RxDisable (4UL) /*!< RADIO is in the RXDISABLED state */ +#define RADIO_STATE_STATE_TxRu (9UL) /*!< RADIO is in the TXRU state */ +#define RADIO_STATE_STATE_TxIdle (10UL) /*!< RADIO is in the TXIDLE state */ +#define RADIO_STATE_STATE_Tx (11UL) /*!< RADIO is in the TX state */ +#define RADIO_STATE_STATE_TxDisable (12UL) /*!< RADIO is in the TXDISABLED state */ + +/* Register: RADIO_DATAWHITEIV */ +/* Description: Data whitening initial value */ + +/* Bits 6..0 : Data whitening initial value. Bit 6 is hard-wired to '1', writing '0' to it has no effect, and it will always be read back and used by the device as '1'. */ +#define RADIO_DATAWHITEIV_DATAWHITEIV_Pos (0UL) /*!< Position of DATAWHITEIV field. */ +#define RADIO_DATAWHITEIV_DATAWHITEIV_Msk (0x7FUL << RADIO_DATAWHITEIV_DATAWHITEIV_Pos) /*!< Bit mask of DATAWHITEIV field. */ + +/* Register: RADIO_BCC */ +/* Description: Bit counter compare */ + +/* Bits 31..0 : Bit counter compare */ +#define RADIO_BCC_BCC_Pos (0UL) /*!< Position of BCC field. */ +#define RADIO_BCC_BCC_Msk (0xFFFFFFFFUL << RADIO_BCC_BCC_Pos) /*!< Bit mask of BCC field. */ + +/* Register: RADIO_DAB */ +/* Description: Description collection[n]: Device address base segment n */ + +/* Bits 31..0 : Device address base segment n */ +#define RADIO_DAB_DAB_Pos (0UL) /*!< Position of DAB field. */ +#define RADIO_DAB_DAB_Msk (0xFFFFFFFFUL << RADIO_DAB_DAB_Pos) /*!< Bit mask of DAB field. */ + +/* Register: RADIO_DAP */ +/* Description: Description collection[n]: Device address prefix n */ + +/* Bits 15..0 : Device address prefix n */ +#define RADIO_DAP_DAP_Pos (0UL) /*!< Position of DAP field. */ +#define RADIO_DAP_DAP_Msk (0xFFFFUL << RADIO_DAP_DAP_Pos) /*!< Bit mask of DAP field. */ + +/* Register: RADIO_DACNF */ +/* Description: Device address match configuration */ + +/* Bit 15 : TxAdd for device address 7 */ +#define RADIO_DACNF_TXADD7_Pos (15UL) /*!< Position of TXADD7 field. */ +#define RADIO_DACNF_TXADD7_Msk (0x1UL << RADIO_DACNF_TXADD7_Pos) /*!< Bit mask of TXADD7 field. */ + +/* Bit 14 : TxAdd for device address 6 */ +#define RADIO_DACNF_TXADD6_Pos (14UL) /*!< Position of TXADD6 field. */ +#define RADIO_DACNF_TXADD6_Msk (0x1UL << RADIO_DACNF_TXADD6_Pos) /*!< Bit mask of TXADD6 field. */ + +/* Bit 13 : TxAdd for device address 5 */ +#define RADIO_DACNF_TXADD5_Pos (13UL) /*!< Position of TXADD5 field. */ +#define RADIO_DACNF_TXADD5_Msk (0x1UL << RADIO_DACNF_TXADD5_Pos) /*!< Bit mask of TXADD5 field. */ + +/* Bit 12 : TxAdd for device address 4 */ +#define RADIO_DACNF_TXADD4_Pos (12UL) /*!< Position of TXADD4 field. */ +#define RADIO_DACNF_TXADD4_Msk (0x1UL << RADIO_DACNF_TXADD4_Pos) /*!< Bit mask of TXADD4 field. */ + +/* Bit 11 : TxAdd for device address 3 */ +#define RADIO_DACNF_TXADD3_Pos (11UL) /*!< Position of TXADD3 field. */ +#define RADIO_DACNF_TXADD3_Msk (0x1UL << RADIO_DACNF_TXADD3_Pos) /*!< Bit mask of TXADD3 field. */ + +/* Bit 10 : TxAdd for device address 2 */ +#define RADIO_DACNF_TXADD2_Pos (10UL) /*!< Position of TXADD2 field. */ +#define RADIO_DACNF_TXADD2_Msk (0x1UL << RADIO_DACNF_TXADD2_Pos) /*!< Bit mask of TXADD2 field. */ + +/* Bit 9 : TxAdd for device address 1 */ +#define RADIO_DACNF_TXADD1_Pos (9UL) /*!< Position of TXADD1 field. */ +#define RADIO_DACNF_TXADD1_Msk (0x1UL << RADIO_DACNF_TXADD1_Pos) /*!< Bit mask of TXADD1 field. */ + +/* Bit 8 : TxAdd for device address 0 */ +#define RADIO_DACNF_TXADD0_Pos (8UL) /*!< Position of TXADD0 field. */ +#define RADIO_DACNF_TXADD0_Msk (0x1UL << RADIO_DACNF_TXADD0_Pos) /*!< Bit mask of TXADD0 field. */ + +/* Bit 7 : Enable or disable device address matching using device address 7 */ +#define RADIO_DACNF_ENA7_Pos (7UL) /*!< Position of ENA7 field. */ +#define RADIO_DACNF_ENA7_Msk (0x1UL << RADIO_DACNF_ENA7_Pos) /*!< Bit mask of ENA7 field. */ +#define RADIO_DACNF_ENA7_Disabled (0UL) /*!< Disabled */ +#define RADIO_DACNF_ENA7_Enabled (1UL) /*!< Enabled */ + +/* Bit 6 : Enable or disable device address matching using device address 6 */ +#define RADIO_DACNF_ENA6_Pos (6UL) /*!< Position of ENA6 field. */ +#define RADIO_DACNF_ENA6_Msk (0x1UL << RADIO_DACNF_ENA6_Pos) /*!< Bit mask of ENA6 field. */ +#define RADIO_DACNF_ENA6_Disabled (0UL) /*!< Disabled */ +#define RADIO_DACNF_ENA6_Enabled (1UL) /*!< Enabled */ + +/* Bit 5 : Enable or disable device address matching using device address 5 */ +#define RADIO_DACNF_ENA5_Pos (5UL) /*!< Position of ENA5 field. */ +#define RADIO_DACNF_ENA5_Msk (0x1UL << RADIO_DACNF_ENA5_Pos) /*!< Bit mask of ENA5 field. */ +#define RADIO_DACNF_ENA5_Disabled (0UL) /*!< Disabled */ +#define RADIO_DACNF_ENA5_Enabled (1UL) /*!< Enabled */ + +/* Bit 4 : Enable or disable device address matching using device address 4 */ +#define RADIO_DACNF_ENA4_Pos (4UL) /*!< Position of ENA4 field. */ +#define RADIO_DACNF_ENA4_Msk (0x1UL << RADIO_DACNF_ENA4_Pos) /*!< Bit mask of ENA4 field. */ +#define RADIO_DACNF_ENA4_Disabled (0UL) /*!< Disabled */ +#define RADIO_DACNF_ENA4_Enabled (1UL) /*!< Enabled */ + +/* Bit 3 : Enable or disable device address matching using device address 3 */ +#define RADIO_DACNF_ENA3_Pos (3UL) /*!< Position of ENA3 field. */ +#define RADIO_DACNF_ENA3_Msk (0x1UL << RADIO_DACNF_ENA3_Pos) /*!< Bit mask of ENA3 field. */ +#define RADIO_DACNF_ENA3_Disabled (0UL) /*!< Disabled */ +#define RADIO_DACNF_ENA3_Enabled (1UL) /*!< Enabled */ + +/* Bit 2 : Enable or disable device address matching using device address 2 */ +#define RADIO_DACNF_ENA2_Pos (2UL) /*!< Position of ENA2 field. */ +#define RADIO_DACNF_ENA2_Msk (0x1UL << RADIO_DACNF_ENA2_Pos) /*!< Bit mask of ENA2 field. */ +#define RADIO_DACNF_ENA2_Disabled (0UL) /*!< Disabled */ +#define RADIO_DACNF_ENA2_Enabled (1UL) /*!< Enabled */ + +/* Bit 1 : Enable or disable device address matching using device address 1 */ +#define RADIO_DACNF_ENA1_Pos (1UL) /*!< Position of ENA1 field. */ +#define RADIO_DACNF_ENA1_Msk (0x1UL << RADIO_DACNF_ENA1_Pos) /*!< Bit mask of ENA1 field. */ +#define RADIO_DACNF_ENA1_Disabled (0UL) /*!< Disabled */ +#define RADIO_DACNF_ENA1_Enabled (1UL) /*!< Enabled */ + +/* Bit 0 : Enable or disable device address matching using device address 0 */ +#define RADIO_DACNF_ENA0_Pos (0UL) /*!< Position of ENA0 field. */ +#define RADIO_DACNF_ENA0_Msk (0x1UL << RADIO_DACNF_ENA0_Pos) /*!< Bit mask of ENA0 field. */ +#define RADIO_DACNF_ENA0_Disabled (0UL) /*!< Disabled */ +#define RADIO_DACNF_ENA0_Enabled (1UL) /*!< Enabled */ + +/* Register: RADIO_MODECNF0 */ +/* Description: Radio mode configuration register 0 */ + +/* Bits 9..8 : Default TX value */ +#define RADIO_MODECNF0_DTX_Pos (8UL) /*!< Position of DTX field. */ +#define RADIO_MODECNF0_DTX_Msk (0x3UL << RADIO_MODECNF0_DTX_Pos) /*!< Bit mask of DTX field. */ +#define RADIO_MODECNF0_DTX_B1 (0UL) /*!< Transmit '1' */ +#define RADIO_MODECNF0_DTX_B0 (1UL) /*!< Transmit '0' */ +#define RADIO_MODECNF0_DTX_Center (2UL) /*!< Transmit center frequency */ + +/* Bit 0 : Radio ramp-up time */ +#define RADIO_MODECNF0_RU_Pos (0UL) /*!< Position of RU field. */ +#define RADIO_MODECNF0_RU_Msk (0x1UL << RADIO_MODECNF0_RU_Pos) /*!< Bit mask of RU field. */ +#define RADIO_MODECNF0_RU_Default (0UL) /*!< Default ramp-up time (tRXEN), compatible with firmware written for nRF51 */ +#define RADIO_MODECNF0_RU_Fast (1UL) /*!< Fast ramp-up (tRXEN,FAST), see electrical specification for more information */ + +/* Register: RADIO_SFD */ +/* Description: IEEE 802.15.4 start of frame delimiter */ + +/* Bits 7..0 : IEEE 802.15.4 start of frame delimiter */ +#define RADIO_SFD_SFD_Pos (0UL) /*!< Position of SFD field. */ +#define RADIO_SFD_SFD_Msk (0xFFUL << RADIO_SFD_SFD_Pos) /*!< Bit mask of SFD field. */ + +/* Register: RADIO_EDCNT */ +/* Description: IEEE 802.15.4 energy detect loop count */ + +/* Bits 20..0 : IEEE 802.15.4 energy detect loop count */ +#define RADIO_EDCNT_EDCNT_Pos (0UL) /*!< Position of EDCNT field. */ +#define RADIO_EDCNT_EDCNT_Msk (0x1FFFFFUL << RADIO_EDCNT_EDCNT_Pos) /*!< Bit mask of EDCNT field. */ + +/* Register: RADIO_EDSAMPLE */ +/* Description: IEEE 802.15.4 energy detect level */ + +/* Bits 7..0 : IEEE 802.15.4 energy detect level */ +#define RADIO_EDSAMPLE_EDLVL_Pos (0UL) /*!< Position of EDLVL field. */ +#define RADIO_EDSAMPLE_EDLVL_Msk (0xFFUL << RADIO_EDSAMPLE_EDLVL_Pos) /*!< Bit mask of EDLVL field. */ + +/* Register: RADIO_CCACTRL */ +/* Description: IEEE 802.15.4 clear channel assessment control */ + +/* Bits 31..24 : Limit for occurances above CCACORRTHRES. When not equal to zero the corrolator based signal detect is enabled. */ +#define RADIO_CCACTRL_CCACORRCNT_Pos (24UL) /*!< Position of CCACORRCNT field. */ +#define RADIO_CCACTRL_CCACORRCNT_Msk (0xFFUL << RADIO_CCACTRL_CCACORRCNT_Pos) /*!< Bit mask of CCACORRCNT field. */ + +/* Bits 23..16 : CCA correlator busy threshold. Only relevant to CarrierMode, CarrierAndEdMode and CarrierOrEdMode. */ +#define RADIO_CCACTRL_CCACORRTHRES_Pos (16UL) /*!< Position of CCACORRTHRES field. */ +#define RADIO_CCACTRL_CCACORRTHRES_Msk (0xFFUL << RADIO_CCACTRL_CCACORRTHRES_Pos) /*!< Bit mask of CCACORRTHRES field. */ + +/* Bits 15..8 : CCA energy busy threshold. Used in all the CCA modes except CarrierMode. */ +#define RADIO_CCACTRL_CCAEDTHRES_Pos (8UL) /*!< Position of CCAEDTHRES field. */ +#define RADIO_CCACTRL_CCAEDTHRES_Msk (0xFFUL << RADIO_CCACTRL_CCAEDTHRES_Pos) /*!< Bit mask of CCAEDTHRES field. */ + +/* Bits 2..0 : CCA mode of operation */ +#define RADIO_CCACTRL_CCAMODE_Pos (0UL) /*!< Position of CCAMODE field. */ +#define RADIO_CCACTRL_CCAMODE_Msk (0x7UL << RADIO_CCACTRL_CCAMODE_Pos) /*!< Bit mask of CCAMODE field. */ +#define RADIO_CCACTRL_CCAMODE_EdMode (0UL) /*!< Energy above threshold */ +#define RADIO_CCACTRL_CCAMODE_CarrierMode (1UL) /*!< Carrier seen */ +#define RADIO_CCACTRL_CCAMODE_CarrierAndEdMode (2UL) /*!< Energy above threshold AND carrier seen */ +#define RADIO_CCACTRL_CCAMODE_CarrierOrEdMode (3UL) /*!< Energy above threshold OR carrier seen */ +#define RADIO_CCACTRL_CCAMODE_EdModeTest1 (4UL) /*!< Energy above threshold test mode that will abort when first ED measurement over threshold is seen. No averaging. */ + +/* Register: RADIO_POWER */ +/* Description: Peripheral power control */ + +/* Bit 0 : Peripheral power control. The peripheral and its registers will be reset to its initial state by switching the peripheral off and then back on again. */ +#define RADIO_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ +#define RADIO_POWER_POWER_Msk (0x1UL << RADIO_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ +#define RADIO_POWER_POWER_Disabled (0UL) /*!< Peripheral is powered off */ +#define RADIO_POWER_POWER_Enabled (1UL) /*!< Peripheral is powered on */ + + +/* Peripheral: RNG */ +/* Description: Random Number Generator */ + +/* Register: RNG_TASKS_START */ +/* Description: Task starting the random number generator */ + +/* Bit 0 : */ +#define RNG_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define RNG_TASKS_START_TASKS_START_Msk (0x1UL << RNG_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: RNG_TASKS_STOP */ +/* Description: Task stopping the random number generator */ + +/* Bit 0 : */ +#define RNG_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define RNG_TASKS_STOP_TASKS_STOP_Msk (0x1UL << RNG_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: RNG_EVENTS_VALRDY */ +/* Description: Event being generated for every new random number written to the VALUE register */ + +/* Bit 0 : */ +#define RNG_EVENTS_VALRDY_EVENTS_VALRDY_Pos (0UL) /*!< Position of EVENTS_VALRDY field. */ +#define RNG_EVENTS_VALRDY_EVENTS_VALRDY_Msk (0x1UL << RNG_EVENTS_VALRDY_EVENTS_VALRDY_Pos) /*!< Bit mask of EVENTS_VALRDY field. */ + +/* Register: RNG_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 0 : Shortcut between VALRDY event and STOP task */ +#define RNG_SHORTS_VALRDY_STOP_Pos (0UL) /*!< Position of VALRDY_STOP field. */ +#define RNG_SHORTS_VALRDY_STOP_Msk (0x1UL << RNG_SHORTS_VALRDY_STOP_Pos) /*!< Bit mask of VALRDY_STOP field. */ +#define RNG_SHORTS_VALRDY_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define RNG_SHORTS_VALRDY_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: RNG_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 0 : Write '1' to enable interrupt for VALRDY event */ +#define RNG_INTENSET_VALRDY_Pos (0UL) /*!< Position of VALRDY field. */ +#define RNG_INTENSET_VALRDY_Msk (0x1UL << RNG_INTENSET_VALRDY_Pos) /*!< Bit mask of VALRDY field. */ +#define RNG_INTENSET_VALRDY_Disabled (0UL) /*!< Read: Disabled */ +#define RNG_INTENSET_VALRDY_Enabled (1UL) /*!< Read: Enabled */ +#define RNG_INTENSET_VALRDY_Set (1UL) /*!< Enable */ + +/* Register: RNG_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 0 : Write '1' to disable interrupt for VALRDY event */ +#define RNG_INTENCLR_VALRDY_Pos (0UL) /*!< Position of VALRDY field. */ +#define RNG_INTENCLR_VALRDY_Msk (0x1UL << RNG_INTENCLR_VALRDY_Pos) /*!< Bit mask of VALRDY field. */ +#define RNG_INTENCLR_VALRDY_Disabled (0UL) /*!< Read: Disabled */ +#define RNG_INTENCLR_VALRDY_Enabled (1UL) /*!< Read: Enabled */ +#define RNG_INTENCLR_VALRDY_Clear (1UL) /*!< Disable */ + +/* Register: RNG_CONFIG */ +/* Description: Configuration register */ + +/* Bit 0 : Bias correction */ +#define RNG_CONFIG_DERCEN_Pos (0UL) /*!< Position of DERCEN field. */ +#define RNG_CONFIG_DERCEN_Msk (0x1UL << RNG_CONFIG_DERCEN_Pos) /*!< Bit mask of DERCEN field. */ +#define RNG_CONFIG_DERCEN_Disabled (0UL) /*!< Disabled */ +#define RNG_CONFIG_DERCEN_Enabled (1UL) /*!< Enabled */ + +/* Register: RNG_VALUE */ +/* Description: Output random number */ + +/* Bits 7..0 : Generated random number */ +#define RNG_VALUE_VALUE_Pos (0UL) /*!< Position of VALUE field. */ +#define RNG_VALUE_VALUE_Msk (0xFFUL << RNG_VALUE_VALUE_Pos) /*!< Bit mask of VALUE field. */ + + +/* Peripheral: RTC */ +/* Description: Real time counter 0 */ + +/* Register: RTC_TASKS_START */ +/* Description: Start RTC COUNTER */ + +/* Bit 0 : */ +#define RTC_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define RTC_TASKS_START_TASKS_START_Msk (0x1UL << RTC_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: RTC_TASKS_STOP */ +/* Description: Stop RTC COUNTER */ + +/* Bit 0 : */ +#define RTC_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define RTC_TASKS_STOP_TASKS_STOP_Msk (0x1UL << RTC_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: RTC_TASKS_CLEAR */ +/* Description: Clear RTC COUNTER */ + +/* Bit 0 : */ +#define RTC_TASKS_CLEAR_TASKS_CLEAR_Pos (0UL) /*!< Position of TASKS_CLEAR field. */ +#define RTC_TASKS_CLEAR_TASKS_CLEAR_Msk (0x1UL << RTC_TASKS_CLEAR_TASKS_CLEAR_Pos) /*!< Bit mask of TASKS_CLEAR field. */ + +/* Register: RTC_TASKS_TRIGOVRFLW */ +/* Description: Set COUNTER to 0xFFFFF0 */ + +/* Bit 0 : */ +#define RTC_TASKS_TRIGOVRFLW_TASKS_TRIGOVRFLW_Pos (0UL) /*!< Position of TASKS_TRIGOVRFLW field. */ +#define RTC_TASKS_TRIGOVRFLW_TASKS_TRIGOVRFLW_Msk (0x1UL << RTC_TASKS_TRIGOVRFLW_TASKS_TRIGOVRFLW_Pos) /*!< Bit mask of TASKS_TRIGOVRFLW field. */ + +/* Register: RTC_EVENTS_TICK */ +/* Description: Event on COUNTER increment */ + +/* Bit 0 : */ +#define RTC_EVENTS_TICK_EVENTS_TICK_Pos (0UL) /*!< Position of EVENTS_TICK field. */ +#define RTC_EVENTS_TICK_EVENTS_TICK_Msk (0x1UL << RTC_EVENTS_TICK_EVENTS_TICK_Pos) /*!< Bit mask of EVENTS_TICK field. */ + +/* Register: RTC_EVENTS_OVRFLW */ +/* Description: Event on COUNTER overflow */ + +/* Bit 0 : */ +#define RTC_EVENTS_OVRFLW_EVENTS_OVRFLW_Pos (0UL) /*!< Position of EVENTS_OVRFLW field. */ +#define RTC_EVENTS_OVRFLW_EVENTS_OVRFLW_Msk (0x1UL << RTC_EVENTS_OVRFLW_EVENTS_OVRFLW_Pos) /*!< Bit mask of EVENTS_OVRFLW field. */ + +/* Register: RTC_EVENTS_COMPARE */ +/* Description: Description collection[n]: Compare event on CC[n] match */ + +/* Bit 0 : */ +#define RTC_EVENTS_COMPARE_EVENTS_COMPARE_Pos (0UL) /*!< Position of EVENTS_COMPARE field. */ +#define RTC_EVENTS_COMPARE_EVENTS_COMPARE_Msk (0x1UL << RTC_EVENTS_COMPARE_EVENTS_COMPARE_Pos) /*!< Bit mask of EVENTS_COMPARE field. */ + +/* Register: RTC_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 19 : Write '1' to enable interrupt for COMPARE[3] event */ +#define RTC_INTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define RTC_INTENSET_COMPARE3_Msk (0x1UL << RTC_INTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define RTC_INTENSET_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENSET_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENSET_COMPARE3_Set (1UL) /*!< Enable */ + +/* Bit 18 : Write '1' to enable interrupt for COMPARE[2] event */ +#define RTC_INTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define RTC_INTENSET_COMPARE2_Msk (0x1UL << RTC_INTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define RTC_INTENSET_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENSET_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENSET_COMPARE2_Set (1UL) /*!< Enable */ + +/* Bit 17 : Write '1' to enable interrupt for COMPARE[1] event */ +#define RTC_INTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define RTC_INTENSET_COMPARE1_Msk (0x1UL << RTC_INTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define RTC_INTENSET_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENSET_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENSET_COMPARE1_Set (1UL) /*!< Enable */ + +/* Bit 16 : Write '1' to enable interrupt for COMPARE[0] event */ +#define RTC_INTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define RTC_INTENSET_COMPARE0_Msk (0x1UL << RTC_INTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define RTC_INTENSET_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENSET_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENSET_COMPARE0_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable interrupt for OVRFLW event */ +#define RTC_INTENSET_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ +#define RTC_INTENSET_OVRFLW_Msk (0x1UL << RTC_INTENSET_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ +#define RTC_INTENSET_OVRFLW_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENSET_OVRFLW_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENSET_OVRFLW_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to enable interrupt for TICK event */ +#define RTC_INTENSET_TICK_Pos (0UL) /*!< Position of TICK field. */ +#define RTC_INTENSET_TICK_Msk (0x1UL << RTC_INTENSET_TICK_Pos) /*!< Bit mask of TICK field. */ +#define RTC_INTENSET_TICK_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENSET_TICK_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENSET_TICK_Set (1UL) /*!< Enable */ + +/* Register: RTC_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 19 : Write '1' to disable interrupt for COMPARE[3] event */ +#define RTC_INTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define RTC_INTENCLR_COMPARE3_Msk (0x1UL << RTC_INTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define RTC_INTENCLR_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENCLR_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENCLR_COMPARE3_Clear (1UL) /*!< Disable */ + +/* Bit 18 : Write '1' to disable interrupt for COMPARE[2] event */ +#define RTC_INTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define RTC_INTENCLR_COMPARE2_Msk (0x1UL << RTC_INTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define RTC_INTENCLR_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENCLR_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENCLR_COMPARE2_Clear (1UL) /*!< Disable */ + +/* Bit 17 : Write '1' to disable interrupt for COMPARE[1] event */ +#define RTC_INTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define RTC_INTENCLR_COMPARE1_Msk (0x1UL << RTC_INTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define RTC_INTENCLR_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENCLR_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENCLR_COMPARE1_Clear (1UL) /*!< Disable */ + +/* Bit 16 : Write '1' to disable interrupt for COMPARE[0] event */ +#define RTC_INTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define RTC_INTENCLR_COMPARE0_Msk (0x1UL << RTC_INTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define RTC_INTENCLR_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENCLR_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENCLR_COMPARE0_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable interrupt for OVRFLW event */ +#define RTC_INTENCLR_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ +#define RTC_INTENCLR_OVRFLW_Msk (0x1UL << RTC_INTENCLR_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ +#define RTC_INTENCLR_OVRFLW_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENCLR_OVRFLW_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENCLR_OVRFLW_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to disable interrupt for TICK event */ +#define RTC_INTENCLR_TICK_Pos (0UL) /*!< Position of TICK field. */ +#define RTC_INTENCLR_TICK_Msk (0x1UL << RTC_INTENCLR_TICK_Pos) /*!< Bit mask of TICK field. */ +#define RTC_INTENCLR_TICK_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENCLR_TICK_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENCLR_TICK_Clear (1UL) /*!< Disable */ + +/* Register: RTC_EVTEN */ +/* Description: Enable or disable event routing */ + +/* Bit 19 : Enable or disable event routing for COMPARE[3] event */ +#define RTC_EVTEN_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define RTC_EVTEN_COMPARE3_Msk (0x1UL << RTC_EVTEN_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define RTC_EVTEN_COMPARE3_Disabled (0UL) /*!< Disable */ +#define RTC_EVTEN_COMPARE3_Enabled (1UL) /*!< Enable */ + +/* Bit 18 : Enable or disable event routing for COMPARE[2] event */ +#define RTC_EVTEN_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define RTC_EVTEN_COMPARE2_Msk (0x1UL << RTC_EVTEN_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define RTC_EVTEN_COMPARE2_Disabled (0UL) /*!< Disable */ +#define RTC_EVTEN_COMPARE2_Enabled (1UL) /*!< Enable */ + +/* Bit 17 : Enable or disable event routing for COMPARE[1] event */ +#define RTC_EVTEN_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define RTC_EVTEN_COMPARE1_Msk (0x1UL << RTC_EVTEN_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define RTC_EVTEN_COMPARE1_Disabled (0UL) /*!< Disable */ +#define RTC_EVTEN_COMPARE1_Enabled (1UL) /*!< Enable */ + +/* Bit 16 : Enable or disable event routing for COMPARE[0] event */ +#define RTC_EVTEN_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define RTC_EVTEN_COMPARE0_Msk (0x1UL << RTC_EVTEN_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define RTC_EVTEN_COMPARE0_Disabled (0UL) /*!< Disable */ +#define RTC_EVTEN_COMPARE0_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable event routing for OVRFLW event */ +#define RTC_EVTEN_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ +#define RTC_EVTEN_OVRFLW_Msk (0x1UL << RTC_EVTEN_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ +#define RTC_EVTEN_OVRFLW_Disabled (0UL) /*!< Disable */ +#define RTC_EVTEN_OVRFLW_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable event routing for TICK event */ +#define RTC_EVTEN_TICK_Pos (0UL) /*!< Position of TICK field. */ +#define RTC_EVTEN_TICK_Msk (0x1UL << RTC_EVTEN_TICK_Pos) /*!< Bit mask of TICK field. */ +#define RTC_EVTEN_TICK_Disabled (0UL) /*!< Disable */ +#define RTC_EVTEN_TICK_Enabled (1UL) /*!< Enable */ + +/* Register: RTC_EVTENSET */ +/* Description: Enable event routing */ + +/* Bit 19 : Write '1' to enable event routing for COMPARE[3] event */ +#define RTC_EVTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define RTC_EVTENSET_COMPARE3_Msk (0x1UL << RTC_EVTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define RTC_EVTENSET_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENSET_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENSET_COMPARE3_Set (1UL) /*!< Enable */ + +/* Bit 18 : Write '1' to enable event routing for COMPARE[2] event */ +#define RTC_EVTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define RTC_EVTENSET_COMPARE2_Msk (0x1UL << RTC_EVTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define RTC_EVTENSET_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENSET_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENSET_COMPARE2_Set (1UL) /*!< Enable */ + +/* Bit 17 : Write '1' to enable event routing for COMPARE[1] event */ +#define RTC_EVTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define RTC_EVTENSET_COMPARE1_Msk (0x1UL << RTC_EVTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define RTC_EVTENSET_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENSET_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENSET_COMPARE1_Set (1UL) /*!< Enable */ + +/* Bit 16 : Write '1' to enable event routing for COMPARE[0] event */ +#define RTC_EVTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define RTC_EVTENSET_COMPARE0_Msk (0x1UL << RTC_EVTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define RTC_EVTENSET_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENSET_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENSET_COMPARE0_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable event routing for OVRFLW event */ +#define RTC_EVTENSET_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ +#define RTC_EVTENSET_OVRFLW_Msk (0x1UL << RTC_EVTENSET_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ +#define RTC_EVTENSET_OVRFLW_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENSET_OVRFLW_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENSET_OVRFLW_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to enable event routing for TICK event */ +#define RTC_EVTENSET_TICK_Pos (0UL) /*!< Position of TICK field. */ +#define RTC_EVTENSET_TICK_Msk (0x1UL << RTC_EVTENSET_TICK_Pos) /*!< Bit mask of TICK field. */ +#define RTC_EVTENSET_TICK_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENSET_TICK_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENSET_TICK_Set (1UL) /*!< Enable */ + +/* Register: RTC_EVTENCLR */ +/* Description: Disable event routing */ + +/* Bit 19 : Write '1' to disable event routing for COMPARE[3] event */ +#define RTC_EVTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define RTC_EVTENCLR_COMPARE3_Msk (0x1UL << RTC_EVTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define RTC_EVTENCLR_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENCLR_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENCLR_COMPARE3_Clear (1UL) /*!< Disable */ + +/* Bit 18 : Write '1' to disable event routing for COMPARE[2] event */ +#define RTC_EVTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define RTC_EVTENCLR_COMPARE2_Msk (0x1UL << RTC_EVTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define RTC_EVTENCLR_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENCLR_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENCLR_COMPARE2_Clear (1UL) /*!< Disable */ + +/* Bit 17 : Write '1' to disable event routing for COMPARE[1] event */ +#define RTC_EVTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define RTC_EVTENCLR_COMPARE1_Msk (0x1UL << RTC_EVTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define RTC_EVTENCLR_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENCLR_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENCLR_COMPARE1_Clear (1UL) /*!< Disable */ + +/* Bit 16 : Write '1' to disable event routing for COMPARE[0] event */ +#define RTC_EVTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define RTC_EVTENCLR_COMPARE0_Msk (0x1UL << RTC_EVTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define RTC_EVTENCLR_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENCLR_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENCLR_COMPARE0_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable event routing for OVRFLW event */ +#define RTC_EVTENCLR_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ +#define RTC_EVTENCLR_OVRFLW_Msk (0x1UL << RTC_EVTENCLR_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ +#define RTC_EVTENCLR_OVRFLW_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENCLR_OVRFLW_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENCLR_OVRFLW_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to disable event routing for TICK event */ +#define RTC_EVTENCLR_TICK_Pos (0UL) /*!< Position of TICK field. */ +#define RTC_EVTENCLR_TICK_Msk (0x1UL << RTC_EVTENCLR_TICK_Pos) /*!< Bit mask of TICK field. */ +#define RTC_EVTENCLR_TICK_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENCLR_TICK_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENCLR_TICK_Clear (1UL) /*!< Disable */ + +/* Register: RTC_COUNTER */ +/* Description: Current COUNTER value */ + +/* Bits 23..0 : Counter value */ +#define RTC_COUNTER_COUNTER_Pos (0UL) /*!< Position of COUNTER field. */ +#define RTC_COUNTER_COUNTER_Msk (0xFFFFFFUL << RTC_COUNTER_COUNTER_Pos) /*!< Bit mask of COUNTER field. */ + +/* Register: RTC_PRESCALER */ +/* Description: 12 bit prescaler for COUNTER frequency (32768/(PRESCALER+1)).Must be written when RTC is stopped */ + +/* Bits 11..0 : Prescaler value */ +#define RTC_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */ +#define RTC_PRESCALER_PRESCALER_Msk (0xFFFUL << RTC_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */ + +/* Register: RTC_CC */ +/* Description: Description collection[n]: Compare register n */ + +/* Bits 23..0 : Compare value */ +#define RTC_CC_COMPARE_Pos (0UL) /*!< Position of COMPARE field. */ +#define RTC_CC_COMPARE_Msk (0xFFFFFFUL << RTC_CC_COMPARE_Pos) /*!< Bit mask of COMPARE field. */ + + +/* Peripheral: SAADC */ +/* Description: Successive approximation register (SAR) analog-to-digital converter */ + +/* Register: SAADC_TASKS_START */ +/* Description: Starts the SAADC and prepares the result buffer in RAM */ + +/* Bit 0 : */ +#define SAADC_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define SAADC_TASKS_START_TASKS_START_Msk (0x1UL << SAADC_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: SAADC_TASKS_SAMPLE */ +/* Description: Takes one SAADC sample */ + +/* Bit 0 : */ +#define SAADC_TASKS_SAMPLE_TASKS_SAMPLE_Pos (0UL) /*!< Position of TASKS_SAMPLE field. */ +#define SAADC_TASKS_SAMPLE_TASKS_SAMPLE_Msk (0x1UL << SAADC_TASKS_SAMPLE_TASKS_SAMPLE_Pos) /*!< Bit mask of TASKS_SAMPLE field. */ + +/* Register: SAADC_TASKS_STOP */ +/* Description: Stops the SAADC and terminates all on-going conversions */ + +/* Bit 0 : */ +#define SAADC_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define SAADC_TASKS_STOP_TASKS_STOP_Msk (0x1UL << SAADC_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: SAADC_TASKS_CALIBRATEOFFSET */ +/* Description: Starts offset auto-calibration */ + +/* Bit 0 : */ +#define SAADC_TASKS_CALIBRATEOFFSET_TASKS_CALIBRATEOFFSET_Pos (0UL) /*!< Position of TASKS_CALIBRATEOFFSET field. */ +#define SAADC_TASKS_CALIBRATEOFFSET_TASKS_CALIBRATEOFFSET_Msk (0x1UL << SAADC_TASKS_CALIBRATEOFFSET_TASKS_CALIBRATEOFFSET_Pos) /*!< Bit mask of TASKS_CALIBRATEOFFSET field. */ + +/* Register: SAADC_EVENTS_STARTED */ +/* Description: The SAADC has started */ + +/* Bit 0 : */ +#define SAADC_EVENTS_STARTED_EVENTS_STARTED_Pos (0UL) /*!< Position of EVENTS_STARTED field. */ +#define SAADC_EVENTS_STARTED_EVENTS_STARTED_Msk (0x1UL << SAADC_EVENTS_STARTED_EVENTS_STARTED_Pos) /*!< Bit mask of EVENTS_STARTED field. */ + +/* Register: SAADC_EVENTS_END */ +/* Description: The SAADC has filled up the result buffer */ + +/* Bit 0 : */ +#define SAADC_EVENTS_END_EVENTS_END_Pos (0UL) /*!< Position of EVENTS_END field. */ +#define SAADC_EVENTS_END_EVENTS_END_Msk (0x1UL << SAADC_EVENTS_END_EVENTS_END_Pos) /*!< Bit mask of EVENTS_END field. */ + +/* Register: SAADC_EVENTS_DONE */ +/* Description: A conversion task has been completed. Depending on the configuration, multiple conversions might be needed for a result to be transferred to RAM. */ + +/* Bit 0 : */ +#define SAADC_EVENTS_DONE_EVENTS_DONE_Pos (0UL) /*!< Position of EVENTS_DONE field. */ +#define SAADC_EVENTS_DONE_EVENTS_DONE_Msk (0x1UL << SAADC_EVENTS_DONE_EVENTS_DONE_Pos) /*!< Bit mask of EVENTS_DONE field. */ + +/* Register: SAADC_EVENTS_RESULTDONE */ +/* Description: Result ready for transfer to RAM */ + +/* Bit 0 : */ +#define SAADC_EVENTS_RESULTDONE_EVENTS_RESULTDONE_Pos (0UL) /*!< Position of EVENTS_RESULTDONE field. */ +#define SAADC_EVENTS_RESULTDONE_EVENTS_RESULTDONE_Msk (0x1UL << SAADC_EVENTS_RESULTDONE_EVENTS_RESULTDONE_Pos) /*!< Bit mask of EVENTS_RESULTDONE field. */ + +/* Register: SAADC_EVENTS_CALIBRATEDONE */ +/* Description: Calibration is complete */ + +/* Bit 0 : */ +#define SAADC_EVENTS_CALIBRATEDONE_EVENTS_CALIBRATEDONE_Pos (0UL) /*!< Position of EVENTS_CALIBRATEDONE field. */ +#define SAADC_EVENTS_CALIBRATEDONE_EVENTS_CALIBRATEDONE_Msk (0x1UL << SAADC_EVENTS_CALIBRATEDONE_EVENTS_CALIBRATEDONE_Pos) /*!< Bit mask of EVENTS_CALIBRATEDONE field. */ + +/* Register: SAADC_EVENTS_STOPPED */ +/* Description: The SAADC has stopped */ + +/* Bit 0 : */ +#define SAADC_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */ +#define SAADC_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << SAADC_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */ + +/* Register: SAADC_EVENTS_CH_LIMITH */ +/* Description: Description cluster[n]: Last result is equal or above CH[n].LIMIT.HIGH */ + +/* Bit 0 : */ +#define SAADC_EVENTS_CH_LIMITH_LIMITH_Pos (0UL) /*!< Position of LIMITH field. */ +#define SAADC_EVENTS_CH_LIMITH_LIMITH_Msk (0x1UL << SAADC_EVENTS_CH_LIMITH_LIMITH_Pos) /*!< Bit mask of LIMITH field. */ + +/* Register: SAADC_EVENTS_CH_LIMITL */ +/* Description: Description cluster[n]: Last result is equal or below CH[n].LIMIT.LOW */ + +/* Bit 0 : */ +#define SAADC_EVENTS_CH_LIMITL_LIMITL_Pos (0UL) /*!< Position of LIMITL field. */ +#define SAADC_EVENTS_CH_LIMITL_LIMITL_Msk (0x1UL << SAADC_EVENTS_CH_LIMITL_LIMITL_Pos) /*!< Bit mask of LIMITL field. */ + +/* Register: SAADC_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 21 : Enable or disable interrupt for CH[7].LIMITL event */ +#define SAADC_INTEN_CH7LIMITL_Pos (21UL) /*!< Position of CH7LIMITL field. */ +#define SAADC_INTEN_CH7LIMITL_Msk (0x1UL << SAADC_INTEN_CH7LIMITL_Pos) /*!< Bit mask of CH7LIMITL field. */ +#define SAADC_INTEN_CH7LIMITL_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH7LIMITL_Enabled (1UL) /*!< Enable */ + +/* Bit 20 : Enable or disable interrupt for CH[7].LIMITH event */ +#define SAADC_INTEN_CH7LIMITH_Pos (20UL) /*!< Position of CH7LIMITH field. */ +#define SAADC_INTEN_CH7LIMITH_Msk (0x1UL << SAADC_INTEN_CH7LIMITH_Pos) /*!< Bit mask of CH7LIMITH field. */ +#define SAADC_INTEN_CH7LIMITH_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH7LIMITH_Enabled (1UL) /*!< Enable */ + +/* Bit 19 : Enable or disable interrupt for CH[6].LIMITL event */ +#define SAADC_INTEN_CH6LIMITL_Pos (19UL) /*!< Position of CH6LIMITL field. */ +#define SAADC_INTEN_CH6LIMITL_Msk (0x1UL << SAADC_INTEN_CH6LIMITL_Pos) /*!< Bit mask of CH6LIMITL field. */ +#define SAADC_INTEN_CH6LIMITL_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH6LIMITL_Enabled (1UL) /*!< Enable */ + +/* Bit 18 : Enable or disable interrupt for CH[6].LIMITH event */ +#define SAADC_INTEN_CH6LIMITH_Pos (18UL) /*!< Position of CH6LIMITH field. */ +#define SAADC_INTEN_CH6LIMITH_Msk (0x1UL << SAADC_INTEN_CH6LIMITH_Pos) /*!< Bit mask of CH6LIMITH field. */ +#define SAADC_INTEN_CH6LIMITH_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH6LIMITH_Enabled (1UL) /*!< Enable */ + +/* Bit 17 : Enable or disable interrupt for CH[5].LIMITL event */ +#define SAADC_INTEN_CH5LIMITL_Pos (17UL) /*!< Position of CH5LIMITL field. */ +#define SAADC_INTEN_CH5LIMITL_Msk (0x1UL << SAADC_INTEN_CH5LIMITL_Pos) /*!< Bit mask of CH5LIMITL field. */ +#define SAADC_INTEN_CH5LIMITL_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH5LIMITL_Enabled (1UL) /*!< Enable */ + +/* Bit 16 : Enable or disable interrupt for CH[5].LIMITH event */ +#define SAADC_INTEN_CH5LIMITH_Pos (16UL) /*!< Position of CH5LIMITH field. */ +#define SAADC_INTEN_CH5LIMITH_Msk (0x1UL << SAADC_INTEN_CH5LIMITH_Pos) /*!< Bit mask of CH5LIMITH field. */ +#define SAADC_INTEN_CH5LIMITH_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH5LIMITH_Enabled (1UL) /*!< Enable */ + +/* Bit 15 : Enable or disable interrupt for CH[4].LIMITL event */ +#define SAADC_INTEN_CH4LIMITL_Pos (15UL) /*!< Position of CH4LIMITL field. */ +#define SAADC_INTEN_CH4LIMITL_Msk (0x1UL << SAADC_INTEN_CH4LIMITL_Pos) /*!< Bit mask of CH4LIMITL field. */ +#define SAADC_INTEN_CH4LIMITL_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH4LIMITL_Enabled (1UL) /*!< Enable */ + +/* Bit 14 : Enable or disable interrupt for CH[4].LIMITH event */ +#define SAADC_INTEN_CH4LIMITH_Pos (14UL) /*!< Position of CH4LIMITH field. */ +#define SAADC_INTEN_CH4LIMITH_Msk (0x1UL << SAADC_INTEN_CH4LIMITH_Pos) /*!< Bit mask of CH4LIMITH field. */ +#define SAADC_INTEN_CH4LIMITH_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH4LIMITH_Enabled (1UL) /*!< Enable */ + +/* Bit 13 : Enable or disable interrupt for CH[3].LIMITL event */ +#define SAADC_INTEN_CH3LIMITL_Pos (13UL) /*!< Position of CH3LIMITL field. */ +#define SAADC_INTEN_CH3LIMITL_Msk (0x1UL << SAADC_INTEN_CH3LIMITL_Pos) /*!< Bit mask of CH3LIMITL field. */ +#define SAADC_INTEN_CH3LIMITL_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH3LIMITL_Enabled (1UL) /*!< Enable */ + +/* Bit 12 : Enable or disable interrupt for CH[3].LIMITH event */ +#define SAADC_INTEN_CH3LIMITH_Pos (12UL) /*!< Position of CH3LIMITH field. */ +#define SAADC_INTEN_CH3LIMITH_Msk (0x1UL << SAADC_INTEN_CH3LIMITH_Pos) /*!< Bit mask of CH3LIMITH field. */ +#define SAADC_INTEN_CH3LIMITH_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH3LIMITH_Enabled (1UL) /*!< Enable */ + +/* Bit 11 : Enable or disable interrupt for CH[2].LIMITL event */ +#define SAADC_INTEN_CH2LIMITL_Pos (11UL) /*!< Position of CH2LIMITL field. */ +#define SAADC_INTEN_CH2LIMITL_Msk (0x1UL << SAADC_INTEN_CH2LIMITL_Pos) /*!< Bit mask of CH2LIMITL field. */ +#define SAADC_INTEN_CH2LIMITL_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH2LIMITL_Enabled (1UL) /*!< Enable */ + +/* Bit 10 : Enable or disable interrupt for CH[2].LIMITH event */ +#define SAADC_INTEN_CH2LIMITH_Pos (10UL) /*!< Position of CH2LIMITH field. */ +#define SAADC_INTEN_CH2LIMITH_Msk (0x1UL << SAADC_INTEN_CH2LIMITH_Pos) /*!< Bit mask of CH2LIMITH field. */ +#define SAADC_INTEN_CH2LIMITH_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH2LIMITH_Enabled (1UL) /*!< Enable */ + +/* Bit 9 : Enable or disable interrupt for CH[1].LIMITL event */ +#define SAADC_INTEN_CH1LIMITL_Pos (9UL) /*!< Position of CH1LIMITL field. */ +#define SAADC_INTEN_CH1LIMITL_Msk (0x1UL << SAADC_INTEN_CH1LIMITL_Pos) /*!< Bit mask of CH1LIMITL field. */ +#define SAADC_INTEN_CH1LIMITL_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH1LIMITL_Enabled (1UL) /*!< Enable */ + +/* Bit 8 : Enable or disable interrupt for CH[1].LIMITH event */ +#define SAADC_INTEN_CH1LIMITH_Pos (8UL) /*!< Position of CH1LIMITH field. */ +#define SAADC_INTEN_CH1LIMITH_Msk (0x1UL << SAADC_INTEN_CH1LIMITH_Pos) /*!< Bit mask of CH1LIMITH field. */ +#define SAADC_INTEN_CH1LIMITH_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH1LIMITH_Enabled (1UL) /*!< Enable */ + +/* Bit 7 : Enable or disable interrupt for CH[0].LIMITL event */ +#define SAADC_INTEN_CH0LIMITL_Pos (7UL) /*!< Position of CH0LIMITL field. */ +#define SAADC_INTEN_CH0LIMITL_Msk (0x1UL << SAADC_INTEN_CH0LIMITL_Pos) /*!< Bit mask of CH0LIMITL field. */ +#define SAADC_INTEN_CH0LIMITL_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH0LIMITL_Enabled (1UL) /*!< Enable */ + +/* Bit 6 : Enable or disable interrupt for CH[0].LIMITH event */ +#define SAADC_INTEN_CH0LIMITH_Pos (6UL) /*!< Position of CH0LIMITH field. */ +#define SAADC_INTEN_CH0LIMITH_Msk (0x1UL << SAADC_INTEN_CH0LIMITH_Pos) /*!< Bit mask of CH0LIMITH field. */ +#define SAADC_INTEN_CH0LIMITH_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH0LIMITH_Enabled (1UL) /*!< Enable */ + +/* Bit 5 : Enable or disable interrupt for STOPPED event */ +#define SAADC_INTEN_STOPPED_Pos (5UL) /*!< Position of STOPPED field. */ +#define SAADC_INTEN_STOPPED_Msk (0x1UL << SAADC_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define SAADC_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ + +/* Bit 4 : Enable or disable interrupt for CALIBRATEDONE event */ +#define SAADC_INTEN_CALIBRATEDONE_Pos (4UL) /*!< Position of CALIBRATEDONE field. */ +#define SAADC_INTEN_CALIBRATEDONE_Msk (0x1UL << SAADC_INTEN_CALIBRATEDONE_Pos) /*!< Bit mask of CALIBRATEDONE field. */ +#define SAADC_INTEN_CALIBRATEDONE_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CALIBRATEDONE_Enabled (1UL) /*!< Enable */ + +/* Bit 3 : Enable or disable interrupt for RESULTDONE event */ +#define SAADC_INTEN_RESULTDONE_Pos (3UL) /*!< Position of RESULTDONE field. */ +#define SAADC_INTEN_RESULTDONE_Msk (0x1UL << SAADC_INTEN_RESULTDONE_Pos) /*!< Bit mask of RESULTDONE field. */ +#define SAADC_INTEN_RESULTDONE_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_RESULTDONE_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable interrupt for DONE event */ +#define SAADC_INTEN_DONE_Pos (2UL) /*!< Position of DONE field. */ +#define SAADC_INTEN_DONE_Msk (0x1UL << SAADC_INTEN_DONE_Pos) /*!< Bit mask of DONE field. */ +#define SAADC_INTEN_DONE_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_DONE_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for END event */ +#define SAADC_INTEN_END_Pos (1UL) /*!< Position of END field. */ +#define SAADC_INTEN_END_Msk (0x1UL << SAADC_INTEN_END_Pos) /*!< Bit mask of END field. */ +#define SAADC_INTEN_END_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_END_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable interrupt for STARTED event */ +#define SAADC_INTEN_STARTED_Pos (0UL) /*!< Position of STARTED field. */ +#define SAADC_INTEN_STARTED_Msk (0x1UL << SAADC_INTEN_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define SAADC_INTEN_STARTED_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_STARTED_Enabled (1UL) /*!< Enable */ + +/* Register: SAADC_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 21 : Write '1' to enable interrupt for CH[7].LIMITL event */ +#define SAADC_INTENSET_CH7LIMITL_Pos (21UL) /*!< Position of CH7LIMITL field. */ +#define SAADC_INTENSET_CH7LIMITL_Msk (0x1UL << SAADC_INTENSET_CH7LIMITL_Pos) /*!< Bit mask of CH7LIMITL field. */ +#define SAADC_INTENSET_CH7LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH7LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH7LIMITL_Set (1UL) /*!< Enable */ + +/* Bit 20 : Write '1' to enable interrupt for CH[7].LIMITH event */ +#define SAADC_INTENSET_CH7LIMITH_Pos (20UL) /*!< Position of CH7LIMITH field. */ +#define SAADC_INTENSET_CH7LIMITH_Msk (0x1UL << SAADC_INTENSET_CH7LIMITH_Pos) /*!< Bit mask of CH7LIMITH field. */ +#define SAADC_INTENSET_CH7LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH7LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH7LIMITH_Set (1UL) /*!< Enable */ + +/* Bit 19 : Write '1' to enable interrupt for CH[6].LIMITL event */ +#define SAADC_INTENSET_CH6LIMITL_Pos (19UL) /*!< Position of CH6LIMITL field. */ +#define SAADC_INTENSET_CH6LIMITL_Msk (0x1UL << SAADC_INTENSET_CH6LIMITL_Pos) /*!< Bit mask of CH6LIMITL field. */ +#define SAADC_INTENSET_CH6LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH6LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH6LIMITL_Set (1UL) /*!< Enable */ + +/* Bit 18 : Write '1' to enable interrupt for CH[6].LIMITH event */ +#define SAADC_INTENSET_CH6LIMITH_Pos (18UL) /*!< Position of CH6LIMITH field. */ +#define SAADC_INTENSET_CH6LIMITH_Msk (0x1UL << SAADC_INTENSET_CH6LIMITH_Pos) /*!< Bit mask of CH6LIMITH field. */ +#define SAADC_INTENSET_CH6LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH6LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH6LIMITH_Set (1UL) /*!< Enable */ + +/* Bit 17 : Write '1' to enable interrupt for CH[5].LIMITL event */ +#define SAADC_INTENSET_CH5LIMITL_Pos (17UL) /*!< Position of CH5LIMITL field. */ +#define SAADC_INTENSET_CH5LIMITL_Msk (0x1UL << SAADC_INTENSET_CH5LIMITL_Pos) /*!< Bit mask of CH5LIMITL field. */ +#define SAADC_INTENSET_CH5LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH5LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH5LIMITL_Set (1UL) /*!< Enable */ + +/* Bit 16 : Write '1' to enable interrupt for CH[5].LIMITH event */ +#define SAADC_INTENSET_CH5LIMITH_Pos (16UL) /*!< Position of CH5LIMITH field. */ +#define SAADC_INTENSET_CH5LIMITH_Msk (0x1UL << SAADC_INTENSET_CH5LIMITH_Pos) /*!< Bit mask of CH5LIMITH field. */ +#define SAADC_INTENSET_CH5LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH5LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH5LIMITH_Set (1UL) /*!< Enable */ + +/* Bit 15 : Write '1' to enable interrupt for CH[4].LIMITL event */ +#define SAADC_INTENSET_CH4LIMITL_Pos (15UL) /*!< Position of CH4LIMITL field. */ +#define SAADC_INTENSET_CH4LIMITL_Msk (0x1UL << SAADC_INTENSET_CH4LIMITL_Pos) /*!< Bit mask of CH4LIMITL field. */ +#define SAADC_INTENSET_CH4LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH4LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH4LIMITL_Set (1UL) /*!< Enable */ + +/* Bit 14 : Write '1' to enable interrupt for CH[4].LIMITH event */ +#define SAADC_INTENSET_CH4LIMITH_Pos (14UL) /*!< Position of CH4LIMITH field. */ +#define SAADC_INTENSET_CH4LIMITH_Msk (0x1UL << SAADC_INTENSET_CH4LIMITH_Pos) /*!< Bit mask of CH4LIMITH field. */ +#define SAADC_INTENSET_CH4LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH4LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH4LIMITH_Set (1UL) /*!< Enable */ + +/* Bit 13 : Write '1' to enable interrupt for CH[3].LIMITL event */ +#define SAADC_INTENSET_CH3LIMITL_Pos (13UL) /*!< Position of CH3LIMITL field. */ +#define SAADC_INTENSET_CH3LIMITL_Msk (0x1UL << SAADC_INTENSET_CH3LIMITL_Pos) /*!< Bit mask of CH3LIMITL field. */ +#define SAADC_INTENSET_CH3LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH3LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH3LIMITL_Set (1UL) /*!< Enable */ + +/* Bit 12 : Write '1' to enable interrupt for CH[3].LIMITH event */ +#define SAADC_INTENSET_CH3LIMITH_Pos (12UL) /*!< Position of CH3LIMITH field. */ +#define SAADC_INTENSET_CH3LIMITH_Msk (0x1UL << SAADC_INTENSET_CH3LIMITH_Pos) /*!< Bit mask of CH3LIMITH field. */ +#define SAADC_INTENSET_CH3LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH3LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH3LIMITH_Set (1UL) /*!< Enable */ + +/* Bit 11 : Write '1' to enable interrupt for CH[2].LIMITL event */ +#define SAADC_INTENSET_CH2LIMITL_Pos (11UL) /*!< Position of CH2LIMITL field. */ +#define SAADC_INTENSET_CH2LIMITL_Msk (0x1UL << SAADC_INTENSET_CH2LIMITL_Pos) /*!< Bit mask of CH2LIMITL field. */ +#define SAADC_INTENSET_CH2LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH2LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH2LIMITL_Set (1UL) /*!< Enable */ + +/* Bit 10 : Write '1' to enable interrupt for CH[2].LIMITH event */ +#define SAADC_INTENSET_CH2LIMITH_Pos (10UL) /*!< Position of CH2LIMITH field. */ +#define SAADC_INTENSET_CH2LIMITH_Msk (0x1UL << SAADC_INTENSET_CH2LIMITH_Pos) /*!< Bit mask of CH2LIMITH field. */ +#define SAADC_INTENSET_CH2LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH2LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH2LIMITH_Set (1UL) /*!< Enable */ + +/* Bit 9 : Write '1' to enable interrupt for CH[1].LIMITL event */ +#define SAADC_INTENSET_CH1LIMITL_Pos (9UL) /*!< Position of CH1LIMITL field. */ +#define SAADC_INTENSET_CH1LIMITL_Msk (0x1UL << SAADC_INTENSET_CH1LIMITL_Pos) /*!< Bit mask of CH1LIMITL field. */ +#define SAADC_INTENSET_CH1LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH1LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH1LIMITL_Set (1UL) /*!< Enable */ + +/* Bit 8 : Write '1' to enable interrupt for CH[1].LIMITH event */ +#define SAADC_INTENSET_CH1LIMITH_Pos (8UL) /*!< Position of CH1LIMITH field. */ +#define SAADC_INTENSET_CH1LIMITH_Msk (0x1UL << SAADC_INTENSET_CH1LIMITH_Pos) /*!< Bit mask of CH1LIMITH field. */ +#define SAADC_INTENSET_CH1LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH1LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH1LIMITH_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to enable interrupt for CH[0].LIMITL event */ +#define SAADC_INTENSET_CH0LIMITL_Pos (7UL) /*!< Position of CH0LIMITL field. */ +#define SAADC_INTENSET_CH0LIMITL_Msk (0x1UL << SAADC_INTENSET_CH0LIMITL_Pos) /*!< Bit mask of CH0LIMITL field. */ +#define SAADC_INTENSET_CH0LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH0LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH0LIMITL_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to enable interrupt for CH[0].LIMITH event */ +#define SAADC_INTENSET_CH0LIMITH_Pos (6UL) /*!< Position of CH0LIMITH field. */ +#define SAADC_INTENSET_CH0LIMITH_Msk (0x1UL << SAADC_INTENSET_CH0LIMITH_Pos) /*!< Bit mask of CH0LIMITH field. */ +#define SAADC_INTENSET_CH0LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH0LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH0LIMITH_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to enable interrupt for STOPPED event */ +#define SAADC_INTENSET_STOPPED_Pos (5UL) /*!< Position of STOPPED field. */ +#define SAADC_INTENSET_STOPPED_Msk (0x1UL << SAADC_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define SAADC_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to enable interrupt for CALIBRATEDONE event */ +#define SAADC_INTENSET_CALIBRATEDONE_Pos (4UL) /*!< Position of CALIBRATEDONE field. */ +#define SAADC_INTENSET_CALIBRATEDONE_Msk (0x1UL << SAADC_INTENSET_CALIBRATEDONE_Pos) /*!< Bit mask of CALIBRATEDONE field. */ +#define SAADC_INTENSET_CALIBRATEDONE_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CALIBRATEDONE_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CALIBRATEDONE_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to enable interrupt for RESULTDONE event */ +#define SAADC_INTENSET_RESULTDONE_Pos (3UL) /*!< Position of RESULTDONE field. */ +#define SAADC_INTENSET_RESULTDONE_Msk (0x1UL << SAADC_INTENSET_RESULTDONE_Pos) /*!< Bit mask of RESULTDONE field. */ +#define SAADC_INTENSET_RESULTDONE_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_RESULTDONE_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_RESULTDONE_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to enable interrupt for DONE event */ +#define SAADC_INTENSET_DONE_Pos (2UL) /*!< Position of DONE field. */ +#define SAADC_INTENSET_DONE_Msk (0x1UL << SAADC_INTENSET_DONE_Pos) /*!< Bit mask of DONE field. */ +#define SAADC_INTENSET_DONE_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_DONE_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_DONE_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable interrupt for END event */ +#define SAADC_INTENSET_END_Pos (1UL) /*!< Position of END field. */ +#define SAADC_INTENSET_END_Msk (0x1UL << SAADC_INTENSET_END_Pos) /*!< Bit mask of END field. */ +#define SAADC_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_END_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to enable interrupt for STARTED event */ +#define SAADC_INTENSET_STARTED_Pos (0UL) /*!< Position of STARTED field. */ +#define SAADC_INTENSET_STARTED_Msk (0x1UL << SAADC_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define SAADC_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_STARTED_Set (1UL) /*!< Enable */ + +/* Register: SAADC_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 21 : Write '1' to disable interrupt for CH[7].LIMITL event */ +#define SAADC_INTENCLR_CH7LIMITL_Pos (21UL) /*!< Position of CH7LIMITL field. */ +#define SAADC_INTENCLR_CH7LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH7LIMITL_Pos) /*!< Bit mask of CH7LIMITL field. */ +#define SAADC_INTENCLR_CH7LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH7LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH7LIMITL_Clear (1UL) /*!< Disable */ + +/* Bit 20 : Write '1' to disable interrupt for CH[7].LIMITH event */ +#define SAADC_INTENCLR_CH7LIMITH_Pos (20UL) /*!< Position of CH7LIMITH field. */ +#define SAADC_INTENCLR_CH7LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH7LIMITH_Pos) /*!< Bit mask of CH7LIMITH field. */ +#define SAADC_INTENCLR_CH7LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH7LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH7LIMITH_Clear (1UL) /*!< Disable */ + +/* Bit 19 : Write '1' to disable interrupt for CH[6].LIMITL event */ +#define SAADC_INTENCLR_CH6LIMITL_Pos (19UL) /*!< Position of CH6LIMITL field. */ +#define SAADC_INTENCLR_CH6LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH6LIMITL_Pos) /*!< Bit mask of CH6LIMITL field. */ +#define SAADC_INTENCLR_CH6LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH6LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH6LIMITL_Clear (1UL) /*!< Disable */ + +/* Bit 18 : Write '1' to disable interrupt for CH[6].LIMITH event */ +#define SAADC_INTENCLR_CH6LIMITH_Pos (18UL) /*!< Position of CH6LIMITH field. */ +#define SAADC_INTENCLR_CH6LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH6LIMITH_Pos) /*!< Bit mask of CH6LIMITH field. */ +#define SAADC_INTENCLR_CH6LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH6LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH6LIMITH_Clear (1UL) /*!< Disable */ + +/* Bit 17 : Write '1' to disable interrupt for CH[5].LIMITL event */ +#define SAADC_INTENCLR_CH5LIMITL_Pos (17UL) /*!< Position of CH5LIMITL field. */ +#define SAADC_INTENCLR_CH5LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH5LIMITL_Pos) /*!< Bit mask of CH5LIMITL field. */ +#define SAADC_INTENCLR_CH5LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH5LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH5LIMITL_Clear (1UL) /*!< Disable */ + +/* Bit 16 : Write '1' to disable interrupt for CH[5].LIMITH event */ +#define SAADC_INTENCLR_CH5LIMITH_Pos (16UL) /*!< Position of CH5LIMITH field. */ +#define SAADC_INTENCLR_CH5LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH5LIMITH_Pos) /*!< Bit mask of CH5LIMITH field. */ +#define SAADC_INTENCLR_CH5LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH5LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH5LIMITH_Clear (1UL) /*!< Disable */ + +/* Bit 15 : Write '1' to disable interrupt for CH[4].LIMITL event */ +#define SAADC_INTENCLR_CH4LIMITL_Pos (15UL) /*!< Position of CH4LIMITL field. */ +#define SAADC_INTENCLR_CH4LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH4LIMITL_Pos) /*!< Bit mask of CH4LIMITL field. */ +#define SAADC_INTENCLR_CH4LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH4LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH4LIMITL_Clear (1UL) /*!< Disable */ + +/* Bit 14 : Write '1' to disable interrupt for CH[4].LIMITH event */ +#define SAADC_INTENCLR_CH4LIMITH_Pos (14UL) /*!< Position of CH4LIMITH field. */ +#define SAADC_INTENCLR_CH4LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH4LIMITH_Pos) /*!< Bit mask of CH4LIMITH field. */ +#define SAADC_INTENCLR_CH4LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH4LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH4LIMITH_Clear (1UL) /*!< Disable */ + +/* Bit 13 : Write '1' to disable interrupt for CH[3].LIMITL event */ +#define SAADC_INTENCLR_CH3LIMITL_Pos (13UL) /*!< Position of CH3LIMITL field. */ +#define SAADC_INTENCLR_CH3LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH3LIMITL_Pos) /*!< Bit mask of CH3LIMITL field. */ +#define SAADC_INTENCLR_CH3LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH3LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH3LIMITL_Clear (1UL) /*!< Disable */ + +/* Bit 12 : Write '1' to disable interrupt for CH[3].LIMITH event */ +#define SAADC_INTENCLR_CH3LIMITH_Pos (12UL) /*!< Position of CH3LIMITH field. */ +#define SAADC_INTENCLR_CH3LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH3LIMITH_Pos) /*!< Bit mask of CH3LIMITH field. */ +#define SAADC_INTENCLR_CH3LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH3LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH3LIMITH_Clear (1UL) /*!< Disable */ + +/* Bit 11 : Write '1' to disable interrupt for CH[2].LIMITL event */ +#define SAADC_INTENCLR_CH2LIMITL_Pos (11UL) /*!< Position of CH2LIMITL field. */ +#define SAADC_INTENCLR_CH2LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH2LIMITL_Pos) /*!< Bit mask of CH2LIMITL field. */ +#define SAADC_INTENCLR_CH2LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH2LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH2LIMITL_Clear (1UL) /*!< Disable */ + +/* Bit 10 : Write '1' to disable interrupt for CH[2].LIMITH event */ +#define SAADC_INTENCLR_CH2LIMITH_Pos (10UL) /*!< Position of CH2LIMITH field. */ +#define SAADC_INTENCLR_CH2LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH2LIMITH_Pos) /*!< Bit mask of CH2LIMITH field. */ +#define SAADC_INTENCLR_CH2LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH2LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH2LIMITH_Clear (1UL) /*!< Disable */ + +/* Bit 9 : Write '1' to disable interrupt for CH[1].LIMITL event */ +#define SAADC_INTENCLR_CH1LIMITL_Pos (9UL) /*!< Position of CH1LIMITL field. */ +#define SAADC_INTENCLR_CH1LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH1LIMITL_Pos) /*!< Bit mask of CH1LIMITL field. */ +#define SAADC_INTENCLR_CH1LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH1LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH1LIMITL_Clear (1UL) /*!< Disable */ + +/* Bit 8 : Write '1' to disable interrupt for CH[1].LIMITH event */ +#define SAADC_INTENCLR_CH1LIMITH_Pos (8UL) /*!< Position of CH1LIMITH field. */ +#define SAADC_INTENCLR_CH1LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH1LIMITH_Pos) /*!< Bit mask of CH1LIMITH field. */ +#define SAADC_INTENCLR_CH1LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH1LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH1LIMITH_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to disable interrupt for CH[0].LIMITL event */ +#define SAADC_INTENCLR_CH0LIMITL_Pos (7UL) /*!< Position of CH0LIMITL field. */ +#define SAADC_INTENCLR_CH0LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH0LIMITL_Pos) /*!< Bit mask of CH0LIMITL field. */ +#define SAADC_INTENCLR_CH0LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH0LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH0LIMITL_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to disable interrupt for CH[0].LIMITH event */ +#define SAADC_INTENCLR_CH0LIMITH_Pos (6UL) /*!< Position of CH0LIMITH field. */ +#define SAADC_INTENCLR_CH0LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH0LIMITH_Pos) /*!< Bit mask of CH0LIMITH field. */ +#define SAADC_INTENCLR_CH0LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH0LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH0LIMITH_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to disable interrupt for STOPPED event */ +#define SAADC_INTENCLR_STOPPED_Pos (5UL) /*!< Position of STOPPED field. */ +#define SAADC_INTENCLR_STOPPED_Msk (0x1UL << SAADC_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define SAADC_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to disable interrupt for CALIBRATEDONE event */ +#define SAADC_INTENCLR_CALIBRATEDONE_Pos (4UL) /*!< Position of CALIBRATEDONE field. */ +#define SAADC_INTENCLR_CALIBRATEDONE_Msk (0x1UL << SAADC_INTENCLR_CALIBRATEDONE_Pos) /*!< Bit mask of CALIBRATEDONE field. */ +#define SAADC_INTENCLR_CALIBRATEDONE_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CALIBRATEDONE_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CALIBRATEDONE_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to disable interrupt for RESULTDONE event */ +#define SAADC_INTENCLR_RESULTDONE_Pos (3UL) /*!< Position of RESULTDONE field. */ +#define SAADC_INTENCLR_RESULTDONE_Msk (0x1UL << SAADC_INTENCLR_RESULTDONE_Pos) /*!< Bit mask of RESULTDONE field. */ +#define SAADC_INTENCLR_RESULTDONE_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_RESULTDONE_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_RESULTDONE_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to disable interrupt for DONE event */ +#define SAADC_INTENCLR_DONE_Pos (2UL) /*!< Position of DONE field. */ +#define SAADC_INTENCLR_DONE_Msk (0x1UL << SAADC_INTENCLR_DONE_Pos) /*!< Bit mask of DONE field. */ +#define SAADC_INTENCLR_DONE_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_DONE_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_DONE_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable interrupt for END event */ +#define SAADC_INTENCLR_END_Pos (1UL) /*!< Position of END field. */ +#define SAADC_INTENCLR_END_Msk (0x1UL << SAADC_INTENCLR_END_Pos) /*!< Bit mask of END field. */ +#define SAADC_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_END_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to disable interrupt for STARTED event */ +#define SAADC_INTENCLR_STARTED_Pos (0UL) /*!< Position of STARTED field. */ +#define SAADC_INTENCLR_STARTED_Msk (0x1UL << SAADC_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define SAADC_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_STARTED_Clear (1UL) /*!< Disable */ + +/* Register: SAADC_STATUS */ +/* Description: Status */ + +/* Bit 0 : Status */ +#define SAADC_STATUS_STATUS_Pos (0UL) /*!< Position of STATUS field. */ +#define SAADC_STATUS_STATUS_Msk (0x1UL << SAADC_STATUS_STATUS_Pos) /*!< Bit mask of STATUS field. */ +#define SAADC_STATUS_STATUS_Ready (0UL) /*!< SAADC is ready. No on-going conversions. */ +#define SAADC_STATUS_STATUS_Busy (1UL) /*!< SAADC is busy. Conversion in progress. */ + +/* Register: SAADC_ENABLE */ +/* Description: Enable or disable SAADC */ + +/* Bit 0 : Enable or disable SAADC */ +#define SAADC_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define SAADC_ENABLE_ENABLE_Msk (0x1UL << SAADC_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define SAADC_ENABLE_ENABLE_Disabled (0UL) /*!< Disable SAADC */ +#define SAADC_ENABLE_ENABLE_Enabled (1UL) /*!< Enable SAADC */ + +/* Register: SAADC_CH_PSELP */ +/* Description: Description cluster[n]: Input positive pin selection for CH[n] */ + +/* Bits 4..0 : Analog positive input channel */ +#define SAADC_CH_PSELP_PSELP_Pos (0UL) /*!< Position of PSELP field. */ +#define SAADC_CH_PSELP_PSELP_Msk (0x1FUL << SAADC_CH_PSELP_PSELP_Pos) /*!< Bit mask of PSELP field. */ +#define SAADC_CH_PSELP_PSELP_NC (0UL) /*!< Not connected */ +#define SAADC_CH_PSELP_PSELP_AnalogInput0 (1UL) /*!< AIN0 */ +#define SAADC_CH_PSELP_PSELP_AnalogInput1 (2UL) /*!< AIN1 */ +#define SAADC_CH_PSELP_PSELP_AnalogInput2 (3UL) /*!< AIN2 */ +#define SAADC_CH_PSELP_PSELP_AnalogInput3 (4UL) /*!< AIN3 */ +#define SAADC_CH_PSELP_PSELP_AnalogInput4 (5UL) /*!< AIN4 */ +#define SAADC_CH_PSELP_PSELP_AnalogInput5 (6UL) /*!< AIN5 */ +#define SAADC_CH_PSELP_PSELP_AnalogInput6 (7UL) /*!< AIN6 */ +#define SAADC_CH_PSELP_PSELP_AnalogInput7 (8UL) /*!< AIN7 */ +#define SAADC_CH_PSELP_PSELP_VDD (9UL) /*!< VDD */ +#define SAADC_CH_PSELP_PSELP_VDDHDIV5 (0x0DUL) /*!< VDDH/5 */ + +/* Register: SAADC_CH_PSELN */ +/* Description: Description cluster[n]: Input negative pin selection for CH[n] */ + +/* Bits 4..0 : Analog negative input, enables differential channel */ +#define SAADC_CH_PSELN_PSELN_Pos (0UL) /*!< Position of PSELN field. */ +#define SAADC_CH_PSELN_PSELN_Msk (0x1FUL << SAADC_CH_PSELN_PSELN_Pos) /*!< Bit mask of PSELN field. */ +#define SAADC_CH_PSELN_PSELN_NC (0UL) /*!< Not connected */ +#define SAADC_CH_PSELN_PSELN_AnalogInput0 (1UL) /*!< AIN0 */ +#define SAADC_CH_PSELN_PSELN_AnalogInput1 (2UL) /*!< AIN1 */ +#define SAADC_CH_PSELN_PSELN_AnalogInput2 (3UL) /*!< AIN2 */ +#define SAADC_CH_PSELN_PSELN_AnalogInput3 (4UL) /*!< AIN3 */ +#define SAADC_CH_PSELN_PSELN_AnalogInput4 (5UL) /*!< AIN4 */ +#define SAADC_CH_PSELN_PSELN_AnalogInput5 (6UL) /*!< AIN5 */ +#define SAADC_CH_PSELN_PSELN_AnalogInput6 (7UL) /*!< AIN6 */ +#define SAADC_CH_PSELN_PSELN_AnalogInput7 (8UL) /*!< AIN7 */ +#define SAADC_CH_PSELN_PSELN_VDD (9UL) /*!< VDD */ +#define SAADC_CH_PSELN_PSELN_VDDHDIV5 (0x0DUL) /*!< VDDH/5 */ + +/* Register: SAADC_CH_CONFIG */ +/* Description: Description cluster[n]: Input configuration for CH[n] */ + +/* Bit 24 : Enable burst mode */ +#define SAADC_CH_CONFIG_BURST_Pos (24UL) /*!< Position of BURST field. */ +#define SAADC_CH_CONFIG_BURST_Msk (0x1UL << SAADC_CH_CONFIG_BURST_Pos) /*!< Bit mask of BURST field. */ +#define SAADC_CH_CONFIG_BURST_Disabled (0UL) /*!< Burst mode is disabled (normal operation) */ +#define SAADC_CH_CONFIG_BURST_Enabled (1UL) /*!< Burst mode is enabled. SAADC takes 2^OVERSAMPLE number of samples as fast as it can, and sends the average to Data RAM. */ + +/* Bit 20 : Enable differential mode */ +#define SAADC_CH_CONFIG_MODE_Pos (20UL) /*!< Position of MODE field. */ +#define SAADC_CH_CONFIG_MODE_Msk (0x1UL << SAADC_CH_CONFIG_MODE_Pos) /*!< Bit mask of MODE field. */ +#define SAADC_CH_CONFIG_MODE_SE (0UL) /*!< Single-ended, PSELN will be ignored, negative input to SAADC shorted to GND */ +#define SAADC_CH_CONFIG_MODE_Diff (1UL) /*!< Differential */ + +/* Bits 18..16 : Acquisition time, the time the SAADC uses to sample the input voltage */ +#define SAADC_CH_CONFIG_TACQ_Pos (16UL) /*!< Position of TACQ field. */ +#define SAADC_CH_CONFIG_TACQ_Msk (0x7UL << SAADC_CH_CONFIG_TACQ_Pos) /*!< Bit mask of TACQ field. */ +#define SAADC_CH_CONFIG_TACQ_3us (0UL) /*!< 3 us */ +#define SAADC_CH_CONFIG_TACQ_5us (1UL) /*!< 5 us */ +#define SAADC_CH_CONFIG_TACQ_10us (2UL) /*!< 10 us */ +#define SAADC_CH_CONFIG_TACQ_15us (3UL) /*!< 15 us */ +#define SAADC_CH_CONFIG_TACQ_20us (4UL) /*!< 20 us */ +#define SAADC_CH_CONFIG_TACQ_40us (5UL) /*!< 40 us */ + +/* Bit 12 : Reference control */ +#define SAADC_CH_CONFIG_REFSEL_Pos (12UL) /*!< Position of REFSEL field. */ +#define SAADC_CH_CONFIG_REFSEL_Msk (0x1UL << SAADC_CH_CONFIG_REFSEL_Pos) /*!< Bit mask of REFSEL field. */ +#define SAADC_CH_CONFIG_REFSEL_Internal (0UL) /*!< Internal reference (0.6 V) */ +#define SAADC_CH_CONFIG_REFSEL_VDD1_4 (1UL) /*!< VDD/4 as reference */ + +/* Bits 10..8 : Gain control */ +#define SAADC_CH_CONFIG_GAIN_Pos (8UL) /*!< Position of GAIN field. */ +#define SAADC_CH_CONFIG_GAIN_Msk (0x7UL << SAADC_CH_CONFIG_GAIN_Pos) /*!< Bit mask of GAIN field. */ +#define SAADC_CH_CONFIG_GAIN_Gain1_6 (0UL) /*!< 1/6 */ +#define SAADC_CH_CONFIG_GAIN_Gain1_5 (1UL) /*!< 1/5 */ +#define SAADC_CH_CONFIG_GAIN_Gain1_4 (2UL) /*!< 1/4 */ +#define SAADC_CH_CONFIG_GAIN_Gain1_3 (3UL) /*!< 1/3 */ +#define SAADC_CH_CONFIG_GAIN_Gain1_2 (4UL) /*!< 1/2 */ +#define SAADC_CH_CONFIG_GAIN_Gain1 (5UL) /*!< 1 */ +#define SAADC_CH_CONFIG_GAIN_Gain2 (6UL) /*!< 2 */ +#define SAADC_CH_CONFIG_GAIN_Gain4 (7UL) /*!< 4 */ + +/* Bits 5..4 : Negative channel resistor control */ +#define SAADC_CH_CONFIG_RESN_Pos (4UL) /*!< Position of RESN field. */ +#define SAADC_CH_CONFIG_RESN_Msk (0x3UL << SAADC_CH_CONFIG_RESN_Pos) /*!< Bit mask of RESN field. */ +#define SAADC_CH_CONFIG_RESN_Bypass (0UL) /*!< Bypass resistor ladder */ +#define SAADC_CH_CONFIG_RESN_Pulldown (1UL) /*!< Pull-down to GND */ +#define SAADC_CH_CONFIG_RESN_Pullup (2UL) /*!< Pull-up to VDD */ +#define SAADC_CH_CONFIG_RESN_VDD1_2 (3UL) /*!< Set input at VDD/2 */ + +/* Bits 1..0 : Positive channel resistor control */ +#define SAADC_CH_CONFIG_RESP_Pos (0UL) /*!< Position of RESP field. */ +#define SAADC_CH_CONFIG_RESP_Msk (0x3UL << SAADC_CH_CONFIG_RESP_Pos) /*!< Bit mask of RESP field. */ +#define SAADC_CH_CONFIG_RESP_Bypass (0UL) /*!< Bypass resistor ladder */ +#define SAADC_CH_CONFIG_RESP_Pulldown (1UL) /*!< Pull-down to GND */ +#define SAADC_CH_CONFIG_RESP_Pullup (2UL) /*!< Pull-up to VDD */ +#define SAADC_CH_CONFIG_RESP_VDD1_2 (3UL) /*!< Set input at VDD/2 */ + +/* Register: SAADC_CH_LIMIT */ +/* Description: Description cluster[n]: High/low limits for event monitoring of a channel */ + +/* Bits 31..16 : High level limit */ +#define SAADC_CH_LIMIT_HIGH_Pos (16UL) /*!< Position of HIGH field. */ +#define SAADC_CH_LIMIT_HIGH_Msk (0xFFFFUL << SAADC_CH_LIMIT_HIGH_Pos) /*!< Bit mask of HIGH field. */ + +/* Bits 15..0 : Low level limit */ +#define SAADC_CH_LIMIT_LOW_Pos (0UL) /*!< Position of LOW field. */ +#define SAADC_CH_LIMIT_LOW_Msk (0xFFFFUL << SAADC_CH_LIMIT_LOW_Pos) /*!< Bit mask of LOW field. */ + +/* Register: SAADC_RESOLUTION */ +/* Description: Resolution configuration */ + +/* Bits 2..0 : Set the resolution */ +#define SAADC_RESOLUTION_VAL_Pos (0UL) /*!< Position of VAL field. */ +#define SAADC_RESOLUTION_VAL_Msk (0x7UL << SAADC_RESOLUTION_VAL_Pos) /*!< Bit mask of VAL field. */ +#define SAADC_RESOLUTION_VAL_8bit (0UL) /*!< 8 bits */ +#define SAADC_RESOLUTION_VAL_10bit (1UL) /*!< 10 bits */ +#define SAADC_RESOLUTION_VAL_12bit (2UL) /*!< 12 bits */ +#define SAADC_RESOLUTION_VAL_14bit (3UL) /*!< 14 bits */ + +/* Register: SAADC_OVERSAMPLE */ +/* Description: Oversampling configuration. The RESOLUTION is applied before averaging, thus for high OVERSAMPLE a higher RESOLUTION should be used. */ + +/* Bits 3..0 : Oversample control */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Pos (0UL) /*!< Position of OVERSAMPLE field. */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Msk (0xFUL << SAADC_OVERSAMPLE_OVERSAMPLE_Pos) /*!< Bit mask of OVERSAMPLE field. */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Bypass (0UL) /*!< Bypass oversampling */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Over2x (1UL) /*!< Oversample 2x */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Over4x (2UL) /*!< Oversample 4x */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Over8x (3UL) /*!< Oversample 8x */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Over16x (4UL) /*!< Oversample 16x */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Over32x (5UL) /*!< Oversample 32x */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Over64x (6UL) /*!< Oversample 64x */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Over128x (7UL) /*!< Oversample 128x */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Over256x (8UL) /*!< Oversample 256x */ + +/* Register: SAADC_SAMPLERATE */ +/* Description: Controls normal or continuous sample rate */ + +/* Bit 12 : Select mode for sample rate control */ +#define SAADC_SAMPLERATE_MODE_Pos (12UL) /*!< Position of MODE field. */ +#define SAADC_SAMPLERATE_MODE_Msk (0x1UL << SAADC_SAMPLERATE_MODE_Pos) /*!< Bit mask of MODE field. */ +#define SAADC_SAMPLERATE_MODE_Task (0UL) /*!< Rate is controlled from SAMPLE task */ +#define SAADC_SAMPLERATE_MODE_Timers (1UL) /*!< Rate is controlled from local timer (use CC to control the rate) */ + +/* Bits 10..0 : Capture and compare value. Sample rate is 16 MHz/CC */ +#define SAADC_SAMPLERATE_CC_Pos (0UL) /*!< Position of CC field. */ +#define SAADC_SAMPLERATE_CC_Msk (0x7FFUL << SAADC_SAMPLERATE_CC_Pos) /*!< Bit mask of CC field. */ + +/* Register: SAADC_RESULT_PTR */ +/* Description: Data pointer */ + +/* Bits 31..0 : Data pointer */ +#define SAADC_RESULT_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define SAADC_RESULT_PTR_PTR_Msk (0xFFFFFFFFUL << SAADC_RESULT_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: SAADC_RESULT_MAXCNT */ +/* Description: Maximum number of 16-bit samples to be written to output RAM buffer */ + +/* Bits 14..0 : Maximum number of 16-bit samples to be written to output RAM buffer */ +#define SAADC_RESULT_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define SAADC_RESULT_MAXCNT_MAXCNT_Msk (0x7FFFUL << SAADC_RESULT_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: SAADC_RESULT_AMOUNT */ +/* Description: Number of 16-bit samples written to output RAM buffer since the previous START task */ + +/* Bits 14..0 : Number of 16-bit samples written to output RAM buffer since the previous START task. This register can be read after an END or STOPPED event. */ +#define SAADC_RESULT_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define SAADC_RESULT_AMOUNT_AMOUNT_Msk (0x7FFFUL << SAADC_RESULT_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + + +/* Peripheral: SPI */ +/* Description: Serial Peripheral Interface 0 */ + +/* Register: SPI_EVENTS_READY */ +/* Description: TXD byte sent and RXD byte received */ + +/* Bit 0 : */ +#define SPI_EVENTS_READY_EVENTS_READY_Pos (0UL) /*!< Position of EVENTS_READY field. */ +#define SPI_EVENTS_READY_EVENTS_READY_Msk (0x1UL << SPI_EVENTS_READY_EVENTS_READY_Pos) /*!< Bit mask of EVENTS_READY field. */ + +/* Register: SPI_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 2 : Write '1' to enable interrupt for READY event */ +#define SPI_INTENSET_READY_Pos (2UL) /*!< Position of READY field. */ +#define SPI_INTENSET_READY_Msk (0x1UL << SPI_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ +#define SPI_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */ +#define SPI_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */ +#define SPI_INTENSET_READY_Set (1UL) /*!< Enable */ + +/* Register: SPI_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 2 : Write '1' to disable interrupt for READY event */ +#define SPI_INTENCLR_READY_Pos (2UL) /*!< Position of READY field. */ +#define SPI_INTENCLR_READY_Msk (0x1UL << SPI_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ +#define SPI_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */ +#define SPI_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */ +#define SPI_INTENCLR_READY_Clear (1UL) /*!< Disable */ + +/* Register: SPI_ENABLE */ +/* Description: Enable SPI */ + +/* Bits 3..0 : Enable or disable SPI */ +#define SPI_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define SPI_ENABLE_ENABLE_Msk (0xFUL << SPI_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define SPI_ENABLE_ENABLE_Disabled (0UL) /*!< Disable SPI */ +#define SPI_ENABLE_ENABLE_Enabled (1UL) /*!< Enable SPI */ + +/* Register: SPI_PSEL_SCK */ +/* Description: Pin select for SCK */ + +/* Bit 31 : Connection */ +#define SPI_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPI_PSEL_SCK_CONNECT_Msk (0x1UL << SPI_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPI_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */ +#define SPI_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define SPI_PSEL_SCK_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define SPI_PSEL_SCK_PORT_Msk (0x1UL << SPI_PSEL_SCK_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define SPI_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPI_PSEL_SCK_PIN_Msk (0x1FUL << SPI_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPI_PSEL_MOSI */ +/* Description: Pin select for MOSI signal */ + +/* Bit 31 : Connection */ +#define SPI_PSEL_MOSI_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPI_PSEL_MOSI_CONNECT_Msk (0x1UL << SPI_PSEL_MOSI_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPI_PSEL_MOSI_CONNECT_Connected (0UL) /*!< Connect */ +#define SPI_PSEL_MOSI_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define SPI_PSEL_MOSI_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define SPI_PSEL_MOSI_PORT_Msk (0x1UL << SPI_PSEL_MOSI_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define SPI_PSEL_MOSI_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPI_PSEL_MOSI_PIN_Msk (0x1FUL << SPI_PSEL_MOSI_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPI_PSEL_MISO */ +/* Description: Pin select for MISO signal */ + +/* Bit 31 : Connection */ +#define SPI_PSEL_MISO_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPI_PSEL_MISO_CONNECT_Msk (0x1UL << SPI_PSEL_MISO_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPI_PSEL_MISO_CONNECT_Connected (0UL) /*!< Connect */ +#define SPI_PSEL_MISO_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define SPI_PSEL_MISO_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define SPI_PSEL_MISO_PORT_Msk (0x1UL << SPI_PSEL_MISO_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define SPI_PSEL_MISO_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPI_PSEL_MISO_PIN_Msk (0x1FUL << SPI_PSEL_MISO_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPI_RXD */ +/* Description: RXD register */ + +/* Bits 7..0 : RX data received. Double buffered */ +#define SPI_RXD_RXD_Pos (0UL) /*!< Position of RXD field. */ +#define SPI_RXD_RXD_Msk (0xFFUL << SPI_RXD_RXD_Pos) /*!< Bit mask of RXD field. */ + +/* Register: SPI_TXD */ +/* Description: TXD register */ + +/* Bits 7..0 : TX data to send. Double buffered */ +#define SPI_TXD_TXD_Pos (0UL) /*!< Position of TXD field. */ +#define SPI_TXD_TXD_Msk (0xFFUL << SPI_TXD_TXD_Pos) /*!< Bit mask of TXD field. */ + +/* Register: SPI_FREQUENCY */ +/* Description: SPI frequency. Accuracy depends on the HFCLK source selected. */ + +/* Bits 31..0 : SPI master data rate */ +#define SPI_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ +#define SPI_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << SPI_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ +#define SPI_FREQUENCY_FREQUENCY_K125 (0x02000000UL) /*!< 125 kbps */ +#define SPI_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */ +#define SPI_FREQUENCY_FREQUENCY_K500 (0x08000000UL) /*!< 500 kbps */ +#define SPI_FREQUENCY_FREQUENCY_M1 (0x10000000UL) /*!< 1 Mbps */ +#define SPI_FREQUENCY_FREQUENCY_M2 (0x20000000UL) /*!< 2 Mbps */ +#define SPI_FREQUENCY_FREQUENCY_M4 (0x40000000UL) /*!< 4 Mbps */ +#define SPI_FREQUENCY_FREQUENCY_M8 (0x80000000UL) /*!< 8 Mbps */ + +/* Register: SPI_CONFIG */ +/* Description: Configuration register */ + +/* Bit 2 : Serial clock (SCK) polarity */ +#define SPI_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */ +#define SPI_CONFIG_CPOL_Msk (0x1UL << SPI_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */ +#define SPI_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high */ +#define SPI_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low */ + +/* Bit 1 : Serial clock (SCK) phase */ +#define SPI_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */ +#define SPI_CONFIG_CPHA_Msk (0x1UL << SPI_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */ +#define SPI_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of clock, shift serial data on trailing edge */ +#define SPI_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of clock, shift serial data on leading edge */ + +/* Bit 0 : Bit order */ +#define SPI_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */ +#define SPI_CONFIG_ORDER_Msk (0x1UL << SPI_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */ +#define SPI_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit shifted out first */ +#define SPI_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit shifted out first */ + + +/* Peripheral: SPIM */ +/* Description: Serial Peripheral Interface Master with EasyDMA 0 */ + +/* Register: SPIM_TASKS_START */ +/* Description: Start SPI transaction */ + +/* Bit 0 : */ +#define SPIM_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define SPIM_TASKS_START_TASKS_START_Msk (0x1UL << SPIM_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: SPIM_TASKS_STOP */ +/* Description: Stop SPI transaction */ + +/* Bit 0 : */ +#define SPIM_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define SPIM_TASKS_STOP_TASKS_STOP_Msk (0x1UL << SPIM_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: SPIM_TASKS_SUSPEND */ +/* Description: Suspend SPI transaction */ + +/* Bit 0 : */ +#define SPIM_TASKS_SUSPEND_TASKS_SUSPEND_Pos (0UL) /*!< Position of TASKS_SUSPEND field. */ +#define SPIM_TASKS_SUSPEND_TASKS_SUSPEND_Msk (0x1UL << SPIM_TASKS_SUSPEND_TASKS_SUSPEND_Pos) /*!< Bit mask of TASKS_SUSPEND field. */ + +/* Register: SPIM_TASKS_RESUME */ +/* Description: Resume SPI transaction */ + +/* Bit 0 : */ +#define SPIM_TASKS_RESUME_TASKS_RESUME_Pos (0UL) /*!< Position of TASKS_RESUME field. */ +#define SPIM_TASKS_RESUME_TASKS_RESUME_Msk (0x1UL << SPIM_TASKS_RESUME_TASKS_RESUME_Pos) /*!< Bit mask of TASKS_RESUME field. */ + +/* Register: SPIM_EVENTS_STOPPED */ +/* Description: SPI transaction has stopped */ + +/* Bit 0 : */ +#define SPIM_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */ +#define SPIM_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << SPIM_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */ + +/* Register: SPIM_EVENTS_ENDRX */ +/* Description: End of RXD buffer reached */ + +/* Bit 0 : */ +#define SPIM_EVENTS_ENDRX_EVENTS_ENDRX_Pos (0UL) /*!< Position of EVENTS_ENDRX field. */ +#define SPIM_EVENTS_ENDRX_EVENTS_ENDRX_Msk (0x1UL << SPIM_EVENTS_ENDRX_EVENTS_ENDRX_Pos) /*!< Bit mask of EVENTS_ENDRX field. */ + +/* Register: SPIM_EVENTS_END */ +/* Description: End of RXD buffer and TXD buffer reached */ + +/* Bit 0 : */ +#define SPIM_EVENTS_END_EVENTS_END_Pos (0UL) /*!< Position of EVENTS_END field. */ +#define SPIM_EVENTS_END_EVENTS_END_Msk (0x1UL << SPIM_EVENTS_END_EVENTS_END_Pos) /*!< Bit mask of EVENTS_END field. */ + +/* Register: SPIM_EVENTS_ENDTX */ +/* Description: End of TXD buffer reached */ + +/* Bit 0 : */ +#define SPIM_EVENTS_ENDTX_EVENTS_ENDTX_Pos (0UL) /*!< Position of EVENTS_ENDTX field. */ +#define SPIM_EVENTS_ENDTX_EVENTS_ENDTX_Msk (0x1UL << SPIM_EVENTS_ENDTX_EVENTS_ENDTX_Pos) /*!< Bit mask of EVENTS_ENDTX field. */ + +/* Register: SPIM_EVENTS_STARTED */ +/* Description: Transaction started */ + +/* Bit 0 : */ +#define SPIM_EVENTS_STARTED_EVENTS_STARTED_Pos (0UL) /*!< Position of EVENTS_STARTED field. */ +#define SPIM_EVENTS_STARTED_EVENTS_STARTED_Msk (0x1UL << SPIM_EVENTS_STARTED_EVENTS_STARTED_Pos) /*!< Bit mask of EVENTS_STARTED field. */ + +/* Register: SPIM_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 17 : Shortcut between END event and START task */ +#define SPIM_SHORTS_END_START_Pos (17UL) /*!< Position of END_START field. */ +#define SPIM_SHORTS_END_START_Msk (0x1UL << SPIM_SHORTS_END_START_Pos) /*!< Bit mask of END_START field. */ +#define SPIM_SHORTS_END_START_Disabled (0UL) /*!< Disable shortcut */ +#define SPIM_SHORTS_END_START_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: SPIM_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 19 : Write '1' to enable interrupt for STARTED event */ +#define SPIM_INTENSET_STARTED_Pos (19UL) /*!< Position of STARTED field. */ +#define SPIM_INTENSET_STARTED_Msk (0x1UL << SPIM_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define SPIM_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENSET_STARTED_Set (1UL) /*!< Enable */ + +/* Bit 8 : Write '1' to enable interrupt for ENDTX event */ +#define SPIM_INTENSET_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ +#define SPIM_INTENSET_ENDTX_Msk (0x1UL << SPIM_INTENSET_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ +#define SPIM_INTENSET_ENDTX_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENSET_ENDTX_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENSET_ENDTX_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to enable interrupt for END event */ +#define SPIM_INTENSET_END_Pos (6UL) /*!< Position of END field. */ +#define SPIM_INTENSET_END_Msk (0x1UL << SPIM_INTENSET_END_Pos) /*!< Bit mask of END field. */ +#define SPIM_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENSET_END_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to enable interrupt for ENDRX event */ +#define SPIM_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ +#define SPIM_INTENSET_ENDRX_Msk (0x1UL << SPIM_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define SPIM_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENSET_ENDRX_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable interrupt for STOPPED event */ +#define SPIM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define SPIM_INTENSET_STOPPED_Msk (0x1UL << SPIM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define SPIM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Register: SPIM_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 19 : Write '1' to disable interrupt for STARTED event */ +#define SPIM_INTENCLR_STARTED_Pos (19UL) /*!< Position of STARTED field. */ +#define SPIM_INTENCLR_STARTED_Msk (0x1UL << SPIM_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define SPIM_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENCLR_STARTED_Clear (1UL) /*!< Disable */ + +/* Bit 8 : Write '1' to disable interrupt for ENDTX event */ +#define SPIM_INTENCLR_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ +#define SPIM_INTENCLR_ENDTX_Msk (0x1UL << SPIM_INTENCLR_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ +#define SPIM_INTENCLR_ENDTX_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENCLR_ENDTX_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENCLR_ENDTX_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to disable interrupt for END event */ +#define SPIM_INTENCLR_END_Pos (6UL) /*!< Position of END field. */ +#define SPIM_INTENCLR_END_Msk (0x1UL << SPIM_INTENCLR_END_Pos) /*!< Bit mask of END field. */ +#define SPIM_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENCLR_END_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to disable interrupt for ENDRX event */ +#define SPIM_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ +#define SPIM_INTENCLR_ENDRX_Msk (0x1UL << SPIM_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define SPIM_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable interrupt for STOPPED event */ +#define SPIM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define SPIM_INTENCLR_STOPPED_Msk (0x1UL << SPIM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define SPIM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Register: SPIM_STALLSTAT */ +/* Description: Stall status for EasyDMA RAM accesses. The fields in this register is set to STALL by hardware whenever a stall occurres and can be cleared (set to NOSTALL) by the CPU. */ + +/* Bit 1 : Stall status for EasyDMA RAM writes */ +#define SPIM_STALLSTAT_RX_Pos (1UL) /*!< Position of RX field. */ +#define SPIM_STALLSTAT_RX_Msk (0x1UL << SPIM_STALLSTAT_RX_Pos) /*!< Bit mask of RX field. */ +#define SPIM_STALLSTAT_RX_NOSTALL (0UL) /*!< No stall */ +#define SPIM_STALLSTAT_RX_STALL (1UL) /*!< A stall has occurred */ + +/* Bit 0 : Stall status for EasyDMA RAM reads */ +#define SPIM_STALLSTAT_TX_Pos (0UL) /*!< Position of TX field. */ +#define SPIM_STALLSTAT_TX_Msk (0x1UL << SPIM_STALLSTAT_TX_Pos) /*!< Bit mask of TX field. */ +#define SPIM_STALLSTAT_TX_NOSTALL (0UL) /*!< No stall */ +#define SPIM_STALLSTAT_TX_STALL (1UL) /*!< A stall has occurred */ + +/* Register: SPIM_ENABLE */ +/* Description: Enable SPIM */ + +/* Bits 3..0 : Enable or disable SPIM */ +#define SPIM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define SPIM_ENABLE_ENABLE_Msk (0xFUL << SPIM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define SPIM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable SPIM */ +#define SPIM_ENABLE_ENABLE_Enabled (7UL) /*!< Enable SPIM */ + +/* Register: SPIM_PSEL_SCK */ +/* Description: Pin select for SCK */ + +/* Bit 31 : Connection */ +#define SPIM_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPIM_PSEL_SCK_CONNECT_Msk (0x1UL << SPIM_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPIM_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */ +#define SPIM_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define SPIM_PSEL_SCK_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define SPIM_PSEL_SCK_PORT_Msk (0x1UL << SPIM_PSEL_SCK_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define SPIM_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPIM_PSEL_SCK_PIN_Msk (0x1FUL << SPIM_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPIM_PSEL_MOSI */ +/* Description: Pin select for MOSI signal */ + +/* Bit 31 : Connection */ +#define SPIM_PSEL_MOSI_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPIM_PSEL_MOSI_CONNECT_Msk (0x1UL << SPIM_PSEL_MOSI_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPIM_PSEL_MOSI_CONNECT_Connected (0UL) /*!< Connect */ +#define SPIM_PSEL_MOSI_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define SPIM_PSEL_MOSI_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define SPIM_PSEL_MOSI_PORT_Msk (0x1UL << SPIM_PSEL_MOSI_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define SPIM_PSEL_MOSI_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPIM_PSEL_MOSI_PIN_Msk (0x1FUL << SPIM_PSEL_MOSI_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPIM_PSEL_MISO */ +/* Description: Pin select for MISO signal */ + +/* Bit 31 : Connection */ +#define SPIM_PSEL_MISO_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPIM_PSEL_MISO_CONNECT_Msk (0x1UL << SPIM_PSEL_MISO_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPIM_PSEL_MISO_CONNECT_Connected (0UL) /*!< Connect */ +#define SPIM_PSEL_MISO_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define SPIM_PSEL_MISO_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define SPIM_PSEL_MISO_PORT_Msk (0x1UL << SPIM_PSEL_MISO_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define SPIM_PSEL_MISO_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPIM_PSEL_MISO_PIN_Msk (0x1FUL << SPIM_PSEL_MISO_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPIM_PSEL_CSN */ +/* Description: Pin select for CSN */ + +/* Bit 31 : Connection */ +#define SPIM_PSEL_CSN_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPIM_PSEL_CSN_CONNECT_Msk (0x1UL << SPIM_PSEL_CSN_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPIM_PSEL_CSN_CONNECT_Connected (0UL) /*!< Connect */ +#define SPIM_PSEL_CSN_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define SPIM_PSEL_CSN_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define SPIM_PSEL_CSN_PORT_Msk (0x1UL << SPIM_PSEL_CSN_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define SPIM_PSEL_CSN_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPIM_PSEL_CSN_PIN_Msk (0x1FUL << SPIM_PSEL_CSN_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPIM_FREQUENCY */ +/* Description: SPI frequency. Accuracy depends on the HFCLK source selected. */ + +/* Bits 31..0 : SPI master data rate */ +#define SPIM_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ +#define SPIM_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << SPIM_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ +#define SPIM_FREQUENCY_FREQUENCY_K125 (0x02000000UL) /*!< 125 kbps */ +#define SPIM_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */ +#define SPIM_FREQUENCY_FREQUENCY_K500 (0x08000000UL) /*!< 500 kbps */ +#define SPIM_FREQUENCY_FREQUENCY_M16 (0x0A000000UL) /*!< 16 Mbps */ +#define SPIM_FREQUENCY_FREQUENCY_M1 (0x10000000UL) /*!< 1 Mbps */ +#define SPIM_FREQUENCY_FREQUENCY_M32 (0x14000000UL) /*!< 32 Mbps */ +#define SPIM_FREQUENCY_FREQUENCY_M2 (0x20000000UL) /*!< 2 Mbps */ +#define SPIM_FREQUENCY_FREQUENCY_M4 (0x40000000UL) /*!< 4 Mbps */ +#define SPIM_FREQUENCY_FREQUENCY_M8 (0x80000000UL) /*!< 8 Mbps */ + +/* Register: SPIM_RXD_PTR */ +/* Description: Data pointer */ + +/* Bits 31..0 : Data pointer */ +#define SPIM_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define SPIM_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIM_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: SPIM_RXD_MAXCNT */ +/* Description: Maximum number of bytes in receive buffer */ + +/* Bits 15..0 : Maximum number of bytes in receive buffer */ +#define SPIM_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define SPIM_RXD_MAXCNT_MAXCNT_Msk (0xFFFFUL << SPIM_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: SPIM_RXD_AMOUNT */ +/* Description: Number of bytes transferred in the last transaction */ + +/* Bits 15..0 : Number of bytes transferred in the last transaction */ +#define SPIM_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define SPIM_RXD_AMOUNT_AMOUNT_Msk (0xFFFFUL << SPIM_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: SPIM_RXD_LIST */ +/* Description: EasyDMA list type */ + +/* Bits 1..0 : List type */ +#define SPIM_RXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */ +#define SPIM_RXD_LIST_LIST_Msk (0x3UL << SPIM_RXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */ +#define SPIM_RXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */ +#define SPIM_RXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */ + +/* Register: SPIM_TXD_PTR */ +/* Description: Data pointer */ + +/* Bits 31..0 : Data pointer */ +#define SPIM_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define SPIM_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIM_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: SPIM_TXD_MAXCNT */ +/* Description: Number of bytes in transmit buffer */ + +/* Bits 15..0 : Maximum number of bytes in transmit buffer */ +#define SPIM_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define SPIM_TXD_MAXCNT_MAXCNT_Msk (0xFFFFUL << SPIM_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: SPIM_TXD_AMOUNT */ +/* Description: Number of bytes transferred in the last transaction */ + +/* Bits 15..0 : Number of bytes transferred in the last transaction */ +#define SPIM_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define SPIM_TXD_AMOUNT_AMOUNT_Msk (0xFFFFUL << SPIM_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: SPIM_TXD_LIST */ +/* Description: EasyDMA list type */ + +/* Bits 1..0 : List type */ +#define SPIM_TXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */ +#define SPIM_TXD_LIST_LIST_Msk (0x3UL << SPIM_TXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */ +#define SPIM_TXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */ +#define SPIM_TXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */ + +/* Register: SPIM_CONFIG */ +/* Description: Configuration register */ + +/* Bit 2 : Serial clock (SCK) polarity */ +#define SPIM_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */ +#define SPIM_CONFIG_CPOL_Msk (0x1UL << SPIM_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */ +#define SPIM_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high */ +#define SPIM_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low */ + +/* Bit 1 : Serial clock (SCK) phase */ +#define SPIM_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */ +#define SPIM_CONFIG_CPHA_Msk (0x1UL << SPIM_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */ +#define SPIM_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of clock, shift serial data on trailing edge */ +#define SPIM_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of clock, shift serial data on leading edge */ + +/* Bit 0 : Bit order */ +#define SPIM_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */ +#define SPIM_CONFIG_ORDER_Msk (0x1UL << SPIM_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */ +#define SPIM_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit shifted out first */ +#define SPIM_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit shifted out first */ + +/* Register: SPIM_IFTIMING_RXDELAY */ +/* Description: Sample delay for input serial data on MISO */ + +/* Bits 2..0 : Sample delay for input serial data on MISO. The value specifies the number of 64 MHz clock cycles (15.625 ns) delay from the the sampling edge of SCK (leading edge for CONFIG.CPHA = 0, trailing edge for CONFIG.CPHA = 1) until the input serial data is sampled. As en example, if RXDELAY = 0 and CONFIG.CPHA = 0, the input serial data is sampled on the rising edge of SCK. */ +#define SPIM_IFTIMING_RXDELAY_RXDELAY_Pos (0UL) /*!< Position of RXDELAY field. */ +#define SPIM_IFTIMING_RXDELAY_RXDELAY_Msk (0x7UL << SPIM_IFTIMING_RXDELAY_RXDELAY_Pos) /*!< Bit mask of RXDELAY field. */ + +/* Register: SPIM_IFTIMING_CSNDUR */ +/* Description: Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions */ + +/* Bits 7..0 : Minimum duration between edge of CSN and edge of SCK and minimum duration CSN must stay high between transactions. The value is specified in number of 64 MHz clock cycles (15.625 ns). */ +#define SPIM_IFTIMING_CSNDUR_CSNDUR_Pos (0UL) /*!< Position of CSNDUR field. */ +#define SPIM_IFTIMING_CSNDUR_CSNDUR_Msk (0xFFUL << SPIM_IFTIMING_CSNDUR_CSNDUR_Pos) /*!< Bit mask of CSNDUR field. */ + +/* Register: SPIM_CSNPOL */ +/* Description: Polarity of CSN output */ + +/* Bit 0 : Polarity of CSN output */ +#define SPIM_CSNPOL_CSNPOL_Pos (0UL) /*!< Position of CSNPOL field. */ +#define SPIM_CSNPOL_CSNPOL_Msk (0x1UL << SPIM_CSNPOL_CSNPOL_Pos) /*!< Bit mask of CSNPOL field. */ +#define SPIM_CSNPOL_CSNPOL_LOW (0UL) /*!< Active low (idle state high) */ +#define SPIM_CSNPOL_CSNPOL_HIGH (1UL) /*!< Active high (idle state low) */ + +/* Register: SPIM_PSELDCX */ +/* Description: Pin select for DCX signal */ + +/* Bit 31 : Connection */ +#define SPIM_PSELDCX_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPIM_PSELDCX_CONNECT_Msk (0x1UL << SPIM_PSELDCX_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPIM_PSELDCX_CONNECT_Connected (0UL) /*!< Connect */ +#define SPIM_PSELDCX_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define SPIM_PSELDCX_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define SPIM_PSELDCX_PORT_Msk (0x1UL << SPIM_PSELDCX_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define SPIM_PSELDCX_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPIM_PSELDCX_PIN_Msk (0x1FUL << SPIM_PSELDCX_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPIM_DCXCNT */ +/* Description: DCX configuration */ + +/* Bits 3..0 : This register specifies the number of command bytes preceding the data bytes. The PSEL.DCX line will be low during transmission of command bytes and high during transmission of data bytes. Value 0xF indicates that all bytes are command bytes. */ +#define SPIM_DCXCNT_DCXCNT_Pos (0UL) /*!< Position of DCXCNT field. */ +#define SPIM_DCXCNT_DCXCNT_Msk (0xFUL << SPIM_DCXCNT_DCXCNT_Pos) /*!< Bit mask of DCXCNT field. */ + +/* Register: SPIM_ORC */ +/* Description: Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT */ + +/* Bits 7..0 : Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT. */ +#define SPIM_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */ +#define SPIM_ORC_ORC_Msk (0xFFUL << SPIM_ORC_ORC_Pos) /*!< Bit mask of ORC field. */ + + +/* Peripheral: SPIS */ +/* Description: SPI Slave 0 */ + +/* Register: SPIS_TASKS_ACQUIRE */ +/* Description: Acquire SPI semaphore */ + +/* Bit 0 : */ +#define SPIS_TASKS_ACQUIRE_TASKS_ACQUIRE_Pos (0UL) /*!< Position of TASKS_ACQUIRE field. */ +#define SPIS_TASKS_ACQUIRE_TASKS_ACQUIRE_Msk (0x1UL << SPIS_TASKS_ACQUIRE_TASKS_ACQUIRE_Pos) /*!< Bit mask of TASKS_ACQUIRE field. */ + +/* Register: SPIS_TASKS_RELEASE */ +/* Description: Release SPI semaphore, enabling the SPI slave to acquire it */ + +/* Bit 0 : */ +#define SPIS_TASKS_RELEASE_TASKS_RELEASE_Pos (0UL) /*!< Position of TASKS_RELEASE field. */ +#define SPIS_TASKS_RELEASE_TASKS_RELEASE_Msk (0x1UL << SPIS_TASKS_RELEASE_TASKS_RELEASE_Pos) /*!< Bit mask of TASKS_RELEASE field. */ + +/* Register: SPIS_EVENTS_END */ +/* Description: Granted transaction completed */ + +/* Bit 0 : */ +#define SPIS_EVENTS_END_EVENTS_END_Pos (0UL) /*!< Position of EVENTS_END field. */ +#define SPIS_EVENTS_END_EVENTS_END_Msk (0x1UL << SPIS_EVENTS_END_EVENTS_END_Pos) /*!< Bit mask of EVENTS_END field. */ + +/* Register: SPIS_EVENTS_ENDRX */ +/* Description: End of RXD buffer reached */ + +/* Bit 0 : */ +#define SPIS_EVENTS_ENDRX_EVENTS_ENDRX_Pos (0UL) /*!< Position of EVENTS_ENDRX field. */ +#define SPIS_EVENTS_ENDRX_EVENTS_ENDRX_Msk (0x1UL << SPIS_EVENTS_ENDRX_EVENTS_ENDRX_Pos) /*!< Bit mask of EVENTS_ENDRX field. */ + +/* Register: SPIS_EVENTS_ACQUIRED */ +/* Description: Semaphore acquired */ + +/* Bit 0 : */ +#define SPIS_EVENTS_ACQUIRED_EVENTS_ACQUIRED_Pos (0UL) /*!< Position of EVENTS_ACQUIRED field. */ +#define SPIS_EVENTS_ACQUIRED_EVENTS_ACQUIRED_Msk (0x1UL << SPIS_EVENTS_ACQUIRED_EVENTS_ACQUIRED_Pos) /*!< Bit mask of EVENTS_ACQUIRED field. */ + +/* Register: SPIS_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 2 : Shortcut between END event and ACQUIRE task */ +#define SPIS_SHORTS_END_ACQUIRE_Pos (2UL) /*!< Position of END_ACQUIRE field. */ +#define SPIS_SHORTS_END_ACQUIRE_Msk (0x1UL << SPIS_SHORTS_END_ACQUIRE_Pos) /*!< Bit mask of END_ACQUIRE field. */ +#define SPIS_SHORTS_END_ACQUIRE_Disabled (0UL) /*!< Disable shortcut */ +#define SPIS_SHORTS_END_ACQUIRE_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: SPIS_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 10 : Write '1' to enable interrupt for ACQUIRED event */ +#define SPIS_INTENSET_ACQUIRED_Pos (10UL) /*!< Position of ACQUIRED field. */ +#define SPIS_INTENSET_ACQUIRED_Msk (0x1UL << SPIS_INTENSET_ACQUIRED_Pos) /*!< Bit mask of ACQUIRED field. */ +#define SPIS_INTENSET_ACQUIRED_Disabled (0UL) /*!< Read: Disabled */ +#define SPIS_INTENSET_ACQUIRED_Enabled (1UL) /*!< Read: Enabled */ +#define SPIS_INTENSET_ACQUIRED_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to enable interrupt for ENDRX event */ +#define SPIS_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ +#define SPIS_INTENSET_ENDRX_Msk (0x1UL << SPIS_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define SPIS_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */ +#define SPIS_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */ +#define SPIS_INTENSET_ENDRX_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable interrupt for END event */ +#define SPIS_INTENSET_END_Pos (1UL) /*!< Position of END field. */ +#define SPIS_INTENSET_END_Msk (0x1UL << SPIS_INTENSET_END_Pos) /*!< Bit mask of END field. */ +#define SPIS_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ +#define SPIS_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ +#define SPIS_INTENSET_END_Set (1UL) /*!< Enable */ + +/* Register: SPIS_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 10 : Write '1' to disable interrupt for ACQUIRED event */ +#define SPIS_INTENCLR_ACQUIRED_Pos (10UL) /*!< Position of ACQUIRED field. */ +#define SPIS_INTENCLR_ACQUIRED_Msk (0x1UL << SPIS_INTENCLR_ACQUIRED_Pos) /*!< Bit mask of ACQUIRED field. */ +#define SPIS_INTENCLR_ACQUIRED_Disabled (0UL) /*!< Read: Disabled */ +#define SPIS_INTENCLR_ACQUIRED_Enabled (1UL) /*!< Read: Enabled */ +#define SPIS_INTENCLR_ACQUIRED_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to disable interrupt for ENDRX event */ +#define SPIS_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ +#define SPIS_INTENCLR_ENDRX_Msk (0x1UL << SPIS_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define SPIS_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */ +#define SPIS_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */ +#define SPIS_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable interrupt for END event */ +#define SPIS_INTENCLR_END_Pos (1UL) /*!< Position of END field. */ +#define SPIS_INTENCLR_END_Msk (0x1UL << SPIS_INTENCLR_END_Pos) /*!< Bit mask of END field. */ +#define SPIS_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ +#define SPIS_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ +#define SPIS_INTENCLR_END_Clear (1UL) /*!< Disable */ + +/* Register: SPIS_SEMSTAT */ +/* Description: Semaphore status register */ + +/* Bits 1..0 : Semaphore status */ +#define SPIS_SEMSTAT_SEMSTAT_Pos (0UL) /*!< Position of SEMSTAT field. */ +#define SPIS_SEMSTAT_SEMSTAT_Msk (0x3UL << SPIS_SEMSTAT_SEMSTAT_Pos) /*!< Bit mask of SEMSTAT field. */ +#define SPIS_SEMSTAT_SEMSTAT_Free (0UL) /*!< Semaphore is free */ +#define SPIS_SEMSTAT_SEMSTAT_CPU (1UL) /*!< Semaphore is assigned to CPU */ +#define SPIS_SEMSTAT_SEMSTAT_SPIS (2UL) /*!< Semaphore is assigned to SPI slave */ +#define SPIS_SEMSTAT_SEMSTAT_CPUPending (3UL) /*!< Semaphore is assigned to SPI but a handover to the CPU is pending */ + +/* Register: SPIS_STATUS */ +/* Description: Status from last transaction */ + +/* Bit 1 : RX buffer overflow detected, and prevented */ +#define SPIS_STATUS_OVERFLOW_Pos (1UL) /*!< Position of OVERFLOW field. */ +#define SPIS_STATUS_OVERFLOW_Msk (0x1UL << SPIS_STATUS_OVERFLOW_Pos) /*!< Bit mask of OVERFLOW field. */ +#define SPIS_STATUS_OVERFLOW_NotPresent (0UL) /*!< Read: error not present */ +#define SPIS_STATUS_OVERFLOW_Present (1UL) /*!< Read: error present */ +#define SPIS_STATUS_OVERFLOW_Clear (1UL) /*!< Write: clear error on writing '1' */ + +/* Bit 0 : TX buffer over-read detected, and prevented */ +#define SPIS_STATUS_OVERREAD_Pos (0UL) /*!< Position of OVERREAD field. */ +#define SPIS_STATUS_OVERREAD_Msk (0x1UL << SPIS_STATUS_OVERREAD_Pos) /*!< Bit mask of OVERREAD field. */ +#define SPIS_STATUS_OVERREAD_NotPresent (0UL) /*!< Read: error not present */ +#define SPIS_STATUS_OVERREAD_Present (1UL) /*!< Read: error present */ +#define SPIS_STATUS_OVERREAD_Clear (1UL) /*!< Write: clear error on writing '1' */ + +/* Register: SPIS_ENABLE */ +/* Description: Enable SPI slave */ + +/* Bits 3..0 : Enable or disable SPI slave */ +#define SPIS_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define SPIS_ENABLE_ENABLE_Msk (0xFUL << SPIS_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define SPIS_ENABLE_ENABLE_Disabled (0UL) /*!< Disable SPI slave */ +#define SPIS_ENABLE_ENABLE_Enabled (2UL) /*!< Enable SPI slave */ + +/* Register: SPIS_PSEL_SCK */ +/* Description: Pin select for SCK */ + +/* Bit 31 : Connection */ +#define SPIS_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPIS_PSEL_SCK_CONNECT_Msk (0x1UL << SPIS_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPIS_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */ +#define SPIS_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define SPIS_PSEL_SCK_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define SPIS_PSEL_SCK_PORT_Msk (0x1UL << SPIS_PSEL_SCK_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define SPIS_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPIS_PSEL_SCK_PIN_Msk (0x1FUL << SPIS_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPIS_PSEL_MISO */ +/* Description: Pin select for MISO signal */ + +/* Bit 31 : Connection */ +#define SPIS_PSEL_MISO_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPIS_PSEL_MISO_CONNECT_Msk (0x1UL << SPIS_PSEL_MISO_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPIS_PSEL_MISO_CONNECT_Connected (0UL) /*!< Connect */ +#define SPIS_PSEL_MISO_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define SPIS_PSEL_MISO_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define SPIS_PSEL_MISO_PORT_Msk (0x1UL << SPIS_PSEL_MISO_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define SPIS_PSEL_MISO_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPIS_PSEL_MISO_PIN_Msk (0x1FUL << SPIS_PSEL_MISO_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPIS_PSEL_MOSI */ +/* Description: Pin select for MOSI signal */ + +/* Bit 31 : Connection */ +#define SPIS_PSEL_MOSI_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPIS_PSEL_MOSI_CONNECT_Msk (0x1UL << SPIS_PSEL_MOSI_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPIS_PSEL_MOSI_CONNECT_Connected (0UL) /*!< Connect */ +#define SPIS_PSEL_MOSI_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define SPIS_PSEL_MOSI_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define SPIS_PSEL_MOSI_PORT_Msk (0x1UL << SPIS_PSEL_MOSI_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define SPIS_PSEL_MOSI_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPIS_PSEL_MOSI_PIN_Msk (0x1FUL << SPIS_PSEL_MOSI_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPIS_PSEL_CSN */ +/* Description: Pin select for CSN signal */ + +/* Bit 31 : Connection */ +#define SPIS_PSEL_CSN_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPIS_PSEL_CSN_CONNECT_Msk (0x1UL << SPIS_PSEL_CSN_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPIS_PSEL_CSN_CONNECT_Connected (0UL) /*!< Connect */ +#define SPIS_PSEL_CSN_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define SPIS_PSEL_CSN_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define SPIS_PSEL_CSN_PORT_Msk (0x1UL << SPIS_PSEL_CSN_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define SPIS_PSEL_CSN_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPIS_PSEL_CSN_PIN_Msk (0x1FUL << SPIS_PSEL_CSN_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPIS_RXD_PTR */ +/* Description: RXD data pointer */ + +/* Bits 31..0 : RXD data pointer */ +#define SPIS_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define SPIS_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIS_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: SPIS_RXD_MAXCNT */ +/* Description: Maximum number of bytes in receive buffer */ + +/* Bits 15..0 : Maximum number of bytes in receive buffer */ +#define SPIS_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define SPIS_RXD_MAXCNT_MAXCNT_Msk (0xFFFFUL << SPIS_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: SPIS_RXD_AMOUNT */ +/* Description: Number of bytes received in last granted transaction */ + +/* Bits 15..0 : Number of bytes received in the last granted transaction */ +#define SPIS_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define SPIS_RXD_AMOUNT_AMOUNT_Msk (0xFFFFUL << SPIS_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: SPIS_TXD_PTR */ +/* Description: TXD data pointer */ + +/* Bits 31..0 : TXD data pointer */ +#define SPIS_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define SPIS_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIS_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: SPIS_TXD_MAXCNT */ +/* Description: Maximum number of bytes in transmit buffer */ + +/* Bits 15..0 : Maximum number of bytes in transmit buffer */ +#define SPIS_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define SPIS_TXD_MAXCNT_MAXCNT_Msk (0xFFFFUL << SPIS_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: SPIS_TXD_AMOUNT */ +/* Description: Number of bytes transmitted in last granted transaction */ + +/* Bits 15..0 : Number of bytes transmitted in last granted transaction */ +#define SPIS_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define SPIS_TXD_AMOUNT_AMOUNT_Msk (0xFFFFUL << SPIS_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: SPIS_CONFIG */ +/* Description: Configuration register */ + +/* Bit 2 : Serial clock (SCK) polarity */ +#define SPIS_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */ +#define SPIS_CONFIG_CPOL_Msk (0x1UL << SPIS_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */ +#define SPIS_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high */ +#define SPIS_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low */ + +/* Bit 1 : Serial clock (SCK) phase */ +#define SPIS_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */ +#define SPIS_CONFIG_CPHA_Msk (0x1UL << SPIS_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */ +#define SPIS_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of clock, shift serial data on trailing edge */ +#define SPIS_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of clock, shift serial data on leading edge */ + +/* Bit 0 : Bit order */ +#define SPIS_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */ +#define SPIS_CONFIG_ORDER_Msk (0x1UL << SPIS_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */ +#define SPIS_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit shifted out first */ +#define SPIS_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit shifted out first */ + +/* Register: SPIS_DEF */ +/* Description: Default character. Character clocked out in case of an ignored transaction. */ + +/* Bits 7..0 : Default character. Character clocked out in case of an ignored transaction. */ +#define SPIS_DEF_DEF_Pos (0UL) /*!< Position of DEF field. */ +#define SPIS_DEF_DEF_Msk (0xFFUL << SPIS_DEF_DEF_Pos) /*!< Bit mask of DEF field. */ + +/* Register: SPIS_ORC */ +/* Description: Over-read character */ + +/* Bits 7..0 : Over-read character. Character clocked out after an over-read of the transmit buffer. */ +#define SPIS_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */ +#define SPIS_ORC_ORC_Msk (0xFFUL << SPIS_ORC_ORC_Pos) /*!< Bit mask of ORC field. */ + + +/* Peripheral: TEMP */ +/* Description: Temperature Sensor */ + +/* Register: TEMP_TASKS_START */ +/* Description: Start temperature measurement */ + +/* Bit 0 : */ +#define TEMP_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define TEMP_TASKS_START_TASKS_START_Msk (0x1UL << TEMP_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: TEMP_TASKS_STOP */ +/* Description: Stop temperature measurement */ + +/* Bit 0 : */ +#define TEMP_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define TEMP_TASKS_STOP_TASKS_STOP_Msk (0x1UL << TEMP_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: TEMP_EVENTS_DATARDY */ +/* Description: Temperature measurement complete, data ready */ + +/* Bit 0 : */ +#define TEMP_EVENTS_DATARDY_EVENTS_DATARDY_Pos (0UL) /*!< Position of EVENTS_DATARDY field. */ +#define TEMP_EVENTS_DATARDY_EVENTS_DATARDY_Msk (0x1UL << TEMP_EVENTS_DATARDY_EVENTS_DATARDY_Pos) /*!< Bit mask of EVENTS_DATARDY field. */ + +/* Register: TEMP_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 0 : Write '1' to enable interrupt for DATARDY event */ +#define TEMP_INTENSET_DATARDY_Pos (0UL) /*!< Position of DATARDY field. */ +#define TEMP_INTENSET_DATARDY_Msk (0x1UL << TEMP_INTENSET_DATARDY_Pos) /*!< Bit mask of DATARDY field. */ +#define TEMP_INTENSET_DATARDY_Disabled (0UL) /*!< Read: Disabled */ +#define TEMP_INTENSET_DATARDY_Enabled (1UL) /*!< Read: Enabled */ +#define TEMP_INTENSET_DATARDY_Set (1UL) /*!< Enable */ + +/* Register: TEMP_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 0 : Write '1' to disable interrupt for DATARDY event */ +#define TEMP_INTENCLR_DATARDY_Pos (0UL) /*!< Position of DATARDY field. */ +#define TEMP_INTENCLR_DATARDY_Msk (0x1UL << TEMP_INTENCLR_DATARDY_Pos) /*!< Bit mask of DATARDY field. */ +#define TEMP_INTENCLR_DATARDY_Disabled (0UL) /*!< Read: Disabled */ +#define TEMP_INTENCLR_DATARDY_Enabled (1UL) /*!< Read: Enabled */ +#define TEMP_INTENCLR_DATARDY_Clear (1UL) /*!< Disable */ + +/* Register: TEMP_TEMP */ +/* Description: Temperature in degC (0.25deg steps) */ + +/* Bits 31..0 : Temperature in degC (0.25deg steps) */ +#define TEMP_TEMP_TEMP_Pos (0UL) /*!< Position of TEMP field. */ +#define TEMP_TEMP_TEMP_Msk (0xFFFFFFFFUL << TEMP_TEMP_TEMP_Pos) /*!< Bit mask of TEMP field. */ + +/* Register: TEMP_A0 */ +/* Description: Slope of 1st piece wise linear function */ + +/* Bits 11..0 : Slope of 1st piece wise linear function */ +#define TEMP_A0_A0_Pos (0UL) /*!< Position of A0 field. */ +#define TEMP_A0_A0_Msk (0xFFFUL << TEMP_A0_A0_Pos) /*!< Bit mask of A0 field. */ + +/* Register: TEMP_A1 */ +/* Description: Slope of 2nd piece wise linear function */ + +/* Bits 11..0 : Slope of 2nd piece wise linear function */ +#define TEMP_A1_A1_Pos (0UL) /*!< Position of A1 field. */ +#define TEMP_A1_A1_Msk (0xFFFUL << TEMP_A1_A1_Pos) /*!< Bit mask of A1 field. */ + +/* Register: TEMP_A2 */ +/* Description: Slope of 3rd piece wise linear function */ + +/* Bits 11..0 : Slope of 3rd piece wise linear function */ +#define TEMP_A2_A2_Pos (0UL) /*!< Position of A2 field. */ +#define TEMP_A2_A2_Msk (0xFFFUL << TEMP_A2_A2_Pos) /*!< Bit mask of A2 field. */ + +/* Register: TEMP_A3 */ +/* Description: Slope of 4th piece wise linear function */ + +/* Bits 11..0 : Slope of 4th piece wise linear function */ +#define TEMP_A3_A3_Pos (0UL) /*!< Position of A3 field. */ +#define TEMP_A3_A3_Msk (0xFFFUL << TEMP_A3_A3_Pos) /*!< Bit mask of A3 field. */ + +/* Register: TEMP_A4 */ +/* Description: Slope of 5th piece wise linear function */ + +/* Bits 11..0 : Slope of 5th piece wise linear function */ +#define TEMP_A4_A4_Pos (0UL) /*!< Position of A4 field. */ +#define TEMP_A4_A4_Msk (0xFFFUL << TEMP_A4_A4_Pos) /*!< Bit mask of A4 field. */ + +/* Register: TEMP_A5 */ +/* Description: Slope of 6th piece wise linear function */ + +/* Bits 11..0 : Slope of 6th piece wise linear function */ +#define TEMP_A5_A5_Pos (0UL) /*!< Position of A5 field. */ +#define TEMP_A5_A5_Msk (0xFFFUL << TEMP_A5_A5_Pos) /*!< Bit mask of A5 field. */ + +/* Register: TEMP_B0 */ +/* Description: y-intercept of 1st piece wise linear function */ + +/* Bits 13..0 : y-intercept of 1st piece wise linear function */ +#define TEMP_B0_B0_Pos (0UL) /*!< Position of B0 field. */ +#define TEMP_B0_B0_Msk (0x3FFFUL << TEMP_B0_B0_Pos) /*!< Bit mask of B0 field. */ + +/* Register: TEMP_B1 */ +/* Description: y-intercept of 2nd piece wise linear function */ + +/* Bits 13..0 : y-intercept of 2nd piece wise linear function */ +#define TEMP_B1_B1_Pos (0UL) /*!< Position of B1 field. */ +#define TEMP_B1_B1_Msk (0x3FFFUL << TEMP_B1_B1_Pos) /*!< Bit mask of B1 field. */ + +/* Register: TEMP_B2 */ +/* Description: y-intercept of 3rd piece wise linear function */ + +/* Bits 13..0 : y-intercept of 3rd piece wise linear function */ +#define TEMP_B2_B2_Pos (0UL) /*!< Position of B2 field. */ +#define TEMP_B2_B2_Msk (0x3FFFUL << TEMP_B2_B2_Pos) /*!< Bit mask of B2 field. */ + +/* Register: TEMP_B3 */ +/* Description: y-intercept of 4th piece wise linear function */ + +/* Bits 13..0 : y-intercept of 4th piece wise linear function */ +#define TEMP_B3_B3_Pos (0UL) /*!< Position of B3 field. */ +#define TEMP_B3_B3_Msk (0x3FFFUL << TEMP_B3_B3_Pos) /*!< Bit mask of B3 field. */ + +/* Register: TEMP_B4 */ +/* Description: y-intercept of 5th piece wise linear function */ + +/* Bits 13..0 : y-intercept of 5th piece wise linear function */ +#define TEMP_B4_B4_Pos (0UL) /*!< Position of B4 field. */ +#define TEMP_B4_B4_Msk (0x3FFFUL << TEMP_B4_B4_Pos) /*!< Bit mask of B4 field. */ + +/* Register: TEMP_B5 */ +/* Description: y-intercept of 6th piece wise linear function */ + +/* Bits 13..0 : y-intercept of 6th piece wise linear function */ +#define TEMP_B5_B5_Pos (0UL) /*!< Position of B5 field. */ +#define TEMP_B5_B5_Msk (0x3FFFUL << TEMP_B5_B5_Pos) /*!< Bit mask of B5 field. */ + +/* Register: TEMP_T0 */ +/* Description: End point of 1st piece wise linear function */ + +/* Bits 7..0 : End point of 1st piece wise linear function */ +#define TEMP_T0_T0_Pos (0UL) /*!< Position of T0 field. */ +#define TEMP_T0_T0_Msk (0xFFUL << TEMP_T0_T0_Pos) /*!< Bit mask of T0 field. */ + +/* Register: TEMP_T1 */ +/* Description: End point of 2nd piece wise linear function */ + +/* Bits 7..0 : End point of 2nd piece wise linear function */ +#define TEMP_T1_T1_Pos (0UL) /*!< Position of T1 field. */ +#define TEMP_T1_T1_Msk (0xFFUL << TEMP_T1_T1_Pos) /*!< Bit mask of T1 field. */ + +/* Register: TEMP_T2 */ +/* Description: End point of 3rd piece wise linear function */ + +/* Bits 7..0 : End point of 3rd piece wise linear function */ +#define TEMP_T2_T2_Pos (0UL) /*!< Position of T2 field. */ +#define TEMP_T2_T2_Msk (0xFFUL << TEMP_T2_T2_Pos) /*!< Bit mask of T2 field. */ + +/* Register: TEMP_T3 */ +/* Description: End point of 4th piece wise linear function */ + +/* Bits 7..0 : End point of 4th piece wise linear function */ +#define TEMP_T3_T3_Pos (0UL) /*!< Position of T3 field. */ +#define TEMP_T3_T3_Msk (0xFFUL << TEMP_T3_T3_Pos) /*!< Bit mask of T3 field. */ + +/* Register: TEMP_T4 */ +/* Description: End point of 5th piece wise linear function */ + +/* Bits 7..0 : End point of 5th piece wise linear function */ +#define TEMP_T4_T4_Pos (0UL) /*!< Position of T4 field. */ +#define TEMP_T4_T4_Msk (0xFFUL << TEMP_T4_T4_Pos) /*!< Bit mask of T4 field. */ + + +/* Peripheral: TIMER */ +/* Description: Timer/Counter 0 */ + +/* Register: TIMER_TASKS_START */ +/* Description: Start Timer */ + +/* Bit 0 : */ +#define TIMER_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define TIMER_TASKS_START_TASKS_START_Msk (0x1UL << TIMER_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: TIMER_TASKS_STOP */ +/* Description: Stop Timer */ + +/* Bit 0 : */ +#define TIMER_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define TIMER_TASKS_STOP_TASKS_STOP_Msk (0x1UL << TIMER_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: TIMER_TASKS_COUNT */ +/* Description: Increment Timer (Counter mode only) */ + +/* Bit 0 : */ +#define TIMER_TASKS_COUNT_TASKS_COUNT_Pos (0UL) /*!< Position of TASKS_COUNT field. */ +#define TIMER_TASKS_COUNT_TASKS_COUNT_Msk (0x1UL << TIMER_TASKS_COUNT_TASKS_COUNT_Pos) /*!< Bit mask of TASKS_COUNT field. */ + +/* Register: TIMER_TASKS_CLEAR */ +/* Description: Clear time */ + +/* Bit 0 : */ +#define TIMER_TASKS_CLEAR_TASKS_CLEAR_Pos (0UL) /*!< Position of TASKS_CLEAR field. */ +#define TIMER_TASKS_CLEAR_TASKS_CLEAR_Msk (0x1UL << TIMER_TASKS_CLEAR_TASKS_CLEAR_Pos) /*!< Bit mask of TASKS_CLEAR field. */ + +/* Register: TIMER_TASKS_SHUTDOWN */ +/* Description: Deprecated register - Shut down timer */ + +/* Bit 0 : */ +#define TIMER_TASKS_SHUTDOWN_TASKS_SHUTDOWN_Pos (0UL) /*!< Position of TASKS_SHUTDOWN field. */ +#define TIMER_TASKS_SHUTDOWN_TASKS_SHUTDOWN_Msk (0x1UL << TIMER_TASKS_SHUTDOWN_TASKS_SHUTDOWN_Pos) /*!< Bit mask of TASKS_SHUTDOWN field. */ + +/* Register: TIMER_TASKS_CAPTURE */ +/* Description: Description collection[n]: Capture Timer value to CC[n] register */ + +/* Bit 0 : */ +#define TIMER_TASKS_CAPTURE_TASKS_CAPTURE_Pos (0UL) /*!< Position of TASKS_CAPTURE field. */ +#define TIMER_TASKS_CAPTURE_TASKS_CAPTURE_Msk (0x1UL << TIMER_TASKS_CAPTURE_TASKS_CAPTURE_Pos) /*!< Bit mask of TASKS_CAPTURE field. */ + +/* Register: TIMER_EVENTS_COMPARE */ +/* Description: Description collection[n]: Compare event on CC[n] match */ + +/* Bit 0 : */ +#define TIMER_EVENTS_COMPARE_EVENTS_COMPARE_Pos (0UL) /*!< Position of EVENTS_COMPARE field. */ +#define TIMER_EVENTS_COMPARE_EVENTS_COMPARE_Msk (0x1UL << TIMER_EVENTS_COMPARE_EVENTS_COMPARE_Pos) /*!< Bit mask of EVENTS_COMPARE field. */ + +/* Register: TIMER_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 13 : Shortcut between COMPARE[5] event and STOP task */ +#define TIMER_SHORTS_COMPARE5_STOP_Pos (13UL) /*!< Position of COMPARE5_STOP field. */ +#define TIMER_SHORTS_COMPARE5_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE5_STOP_Pos) /*!< Bit mask of COMPARE5_STOP field. */ +#define TIMER_SHORTS_COMPARE5_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE5_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 12 : Shortcut between COMPARE[4] event and STOP task */ +#define TIMER_SHORTS_COMPARE4_STOP_Pos (12UL) /*!< Position of COMPARE4_STOP field. */ +#define TIMER_SHORTS_COMPARE4_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE4_STOP_Pos) /*!< Bit mask of COMPARE4_STOP field. */ +#define TIMER_SHORTS_COMPARE4_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE4_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 11 : Shortcut between COMPARE[3] event and STOP task */ +#define TIMER_SHORTS_COMPARE3_STOP_Pos (11UL) /*!< Position of COMPARE3_STOP field. */ +#define TIMER_SHORTS_COMPARE3_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE3_STOP_Pos) /*!< Bit mask of COMPARE3_STOP field. */ +#define TIMER_SHORTS_COMPARE3_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE3_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 10 : Shortcut between COMPARE[2] event and STOP task */ +#define TIMER_SHORTS_COMPARE2_STOP_Pos (10UL) /*!< Position of COMPARE2_STOP field. */ +#define TIMER_SHORTS_COMPARE2_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE2_STOP_Pos) /*!< Bit mask of COMPARE2_STOP field. */ +#define TIMER_SHORTS_COMPARE2_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE2_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 9 : Shortcut between COMPARE[1] event and STOP task */ +#define TIMER_SHORTS_COMPARE1_STOP_Pos (9UL) /*!< Position of COMPARE1_STOP field. */ +#define TIMER_SHORTS_COMPARE1_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE1_STOP_Pos) /*!< Bit mask of COMPARE1_STOP field. */ +#define TIMER_SHORTS_COMPARE1_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE1_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 8 : Shortcut between COMPARE[0] event and STOP task */ +#define TIMER_SHORTS_COMPARE0_STOP_Pos (8UL) /*!< Position of COMPARE0_STOP field. */ +#define TIMER_SHORTS_COMPARE0_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE0_STOP_Pos) /*!< Bit mask of COMPARE0_STOP field. */ +#define TIMER_SHORTS_COMPARE0_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE0_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 5 : Shortcut between COMPARE[5] event and CLEAR task */ +#define TIMER_SHORTS_COMPARE5_CLEAR_Pos (5UL) /*!< Position of COMPARE5_CLEAR field. */ +#define TIMER_SHORTS_COMPARE5_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE5_CLEAR_Pos) /*!< Bit mask of COMPARE5_CLEAR field. */ +#define TIMER_SHORTS_COMPARE5_CLEAR_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE5_CLEAR_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 4 : Shortcut between COMPARE[4] event and CLEAR task */ +#define TIMER_SHORTS_COMPARE4_CLEAR_Pos (4UL) /*!< Position of COMPARE4_CLEAR field. */ +#define TIMER_SHORTS_COMPARE4_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE4_CLEAR_Pos) /*!< Bit mask of COMPARE4_CLEAR field. */ +#define TIMER_SHORTS_COMPARE4_CLEAR_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE4_CLEAR_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 3 : Shortcut between COMPARE[3] event and CLEAR task */ +#define TIMER_SHORTS_COMPARE3_CLEAR_Pos (3UL) /*!< Position of COMPARE3_CLEAR field. */ +#define TIMER_SHORTS_COMPARE3_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE3_CLEAR_Pos) /*!< Bit mask of COMPARE3_CLEAR field. */ +#define TIMER_SHORTS_COMPARE3_CLEAR_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE3_CLEAR_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 2 : Shortcut between COMPARE[2] event and CLEAR task */ +#define TIMER_SHORTS_COMPARE2_CLEAR_Pos (2UL) /*!< Position of COMPARE2_CLEAR field. */ +#define TIMER_SHORTS_COMPARE2_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE2_CLEAR_Pos) /*!< Bit mask of COMPARE2_CLEAR field. */ +#define TIMER_SHORTS_COMPARE2_CLEAR_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE2_CLEAR_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 1 : Shortcut between COMPARE[1] event and CLEAR task */ +#define TIMER_SHORTS_COMPARE1_CLEAR_Pos (1UL) /*!< Position of COMPARE1_CLEAR field. */ +#define TIMER_SHORTS_COMPARE1_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE1_CLEAR_Pos) /*!< Bit mask of COMPARE1_CLEAR field. */ +#define TIMER_SHORTS_COMPARE1_CLEAR_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE1_CLEAR_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 0 : Shortcut between COMPARE[0] event and CLEAR task */ +#define TIMER_SHORTS_COMPARE0_CLEAR_Pos (0UL) /*!< Position of COMPARE0_CLEAR field. */ +#define TIMER_SHORTS_COMPARE0_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE0_CLEAR_Pos) /*!< Bit mask of COMPARE0_CLEAR field. */ +#define TIMER_SHORTS_COMPARE0_CLEAR_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE0_CLEAR_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: TIMER_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 21 : Write '1' to enable interrupt for COMPARE[5] event */ +#define TIMER_INTENSET_COMPARE5_Pos (21UL) /*!< Position of COMPARE5 field. */ +#define TIMER_INTENSET_COMPARE5_Msk (0x1UL << TIMER_INTENSET_COMPARE5_Pos) /*!< Bit mask of COMPARE5 field. */ +#define TIMER_INTENSET_COMPARE5_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENSET_COMPARE5_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENSET_COMPARE5_Set (1UL) /*!< Enable */ + +/* Bit 20 : Write '1' to enable interrupt for COMPARE[4] event */ +#define TIMER_INTENSET_COMPARE4_Pos (20UL) /*!< Position of COMPARE4 field. */ +#define TIMER_INTENSET_COMPARE4_Msk (0x1UL << TIMER_INTENSET_COMPARE4_Pos) /*!< Bit mask of COMPARE4 field. */ +#define TIMER_INTENSET_COMPARE4_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENSET_COMPARE4_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENSET_COMPARE4_Set (1UL) /*!< Enable */ + +/* Bit 19 : Write '1' to enable interrupt for COMPARE[3] event */ +#define TIMER_INTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define TIMER_INTENSET_COMPARE3_Msk (0x1UL << TIMER_INTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define TIMER_INTENSET_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENSET_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENSET_COMPARE3_Set (1UL) /*!< Enable */ + +/* Bit 18 : Write '1' to enable interrupt for COMPARE[2] event */ +#define TIMER_INTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define TIMER_INTENSET_COMPARE2_Msk (0x1UL << TIMER_INTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define TIMER_INTENSET_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENSET_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENSET_COMPARE2_Set (1UL) /*!< Enable */ + +/* Bit 17 : Write '1' to enable interrupt for COMPARE[1] event */ +#define TIMER_INTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define TIMER_INTENSET_COMPARE1_Msk (0x1UL << TIMER_INTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define TIMER_INTENSET_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENSET_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENSET_COMPARE1_Set (1UL) /*!< Enable */ + +/* Bit 16 : Write '1' to enable interrupt for COMPARE[0] event */ +#define TIMER_INTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define TIMER_INTENSET_COMPARE0_Msk (0x1UL << TIMER_INTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define TIMER_INTENSET_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENSET_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENSET_COMPARE0_Set (1UL) /*!< Enable */ + +/* Register: TIMER_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 21 : Write '1' to disable interrupt for COMPARE[5] event */ +#define TIMER_INTENCLR_COMPARE5_Pos (21UL) /*!< Position of COMPARE5 field. */ +#define TIMER_INTENCLR_COMPARE5_Msk (0x1UL << TIMER_INTENCLR_COMPARE5_Pos) /*!< Bit mask of COMPARE5 field. */ +#define TIMER_INTENCLR_COMPARE5_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENCLR_COMPARE5_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENCLR_COMPARE5_Clear (1UL) /*!< Disable */ + +/* Bit 20 : Write '1' to disable interrupt for COMPARE[4] event */ +#define TIMER_INTENCLR_COMPARE4_Pos (20UL) /*!< Position of COMPARE4 field. */ +#define TIMER_INTENCLR_COMPARE4_Msk (0x1UL << TIMER_INTENCLR_COMPARE4_Pos) /*!< Bit mask of COMPARE4 field. */ +#define TIMER_INTENCLR_COMPARE4_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENCLR_COMPARE4_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENCLR_COMPARE4_Clear (1UL) /*!< Disable */ + +/* Bit 19 : Write '1' to disable interrupt for COMPARE[3] event */ +#define TIMER_INTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define TIMER_INTENCLR_COMPARE3_Msk (0x1UL << TIMER_INTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define TIMER_INTENCLR_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENCLR_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENCLR_COMPARE3_Clear (1UL) /*!< Disable */ + +/* Bit 18 : Write '1' to disable interrupt for COMPARE[2] event */ +#define TIMER_INTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define TIMER_INTENCLR_COMPARE2_Msk (0x1UL << TIMER_INTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define TIMER_INTENCLR_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENCLR_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENCLR_COMPARE2_Clear (1UL) /*!< Disable */ + +/* Bit 17 : Write '1' to disable interrupt for COMPARE[1] event */ +#define TIMER_INTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define TIMER_INTENCLR_COMPARE1_Msk (0x1UL << TIMER_INTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define TIMER_INTENCLR_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENCLR_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENCLR_COMPARE1_Clear (1UL) /*!< Disable */ + +/* Bit 16 : Write '1' to disable interrupt for COMPARE[0] event */ +#define TIMER_INTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define TIMER_INTENCLR_COMPARE0_Msk (0x1UL << TIMER_INTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define TIMER_INTENCLR_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENCLR_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENCLR_COMPARE0_Clear (1UL) /*!< Disable */ + +/* Register: TIMER_MODE */ +/* Description: Timer mode selection */ + +/* Bits 1..0 : Timer mode */ +#define TIMER_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ +#define TIMER_MODE_MODE_Msk (0x3UL << TIMER_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ +#define TIMER_MODE_MODE_Timer (0UL) /*!< Select Timer mode */ +#define TIMER_MODE_MODE_Counter (1UL) /*!< Deprecated enumerator - Select Counter mode */ +#define TIMER_MODE_MODE_LowPowerCounter (2UL) /*!< Select Low Power Counter mode */ + +/* Register: TIMER_BITMODE */ +/* Description: Configure the number of bits used by the TIMER */ + +/* Bits 1..0 : Timer bit width */ +#define TIMER_BITMODE_BITMODE_Pos (0UL) /*!< Position of BITMODE field. */ +#define TIMER_BITMODE_BITMODE_Msk (0x3UL << TIMER_BITMODE_BITMODE_Pos) /*!< Bit mask of BITMODE field. */ +#define TIMER_BITMODE_BITMODE_16Bit (0UL) /*!< 16 bit timer bit width */ +#define TIMER_BITMODE_BITMODE_08Bit (1UL) /*!< 8 bit timer bit width */ +#define TIMER_BITMODE_BITMODE_24Bit (2UL) /*!< 24 bit timer bit width */ +#define TIMER_BITMODE_BITMODE_32Bit (3UL) /*!< 32 bit timer bit width */ + +/* Register: TIMER_PRESCALER */ +/* Description: Timer prescaler register */ + +/* Bits 3..0 : Prescaler value */ +#define TIMER_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */ +#define TIMER_PRESCALER_PRESCALER_Msk (0xFUL << TIMER_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */ + +/* Register: TIMER_CC */ +/* Description: Description collection[n]: Capture/Compare register n */ + +/* Bits 31..0 : Capture/Compare value */ +#define TIMER_CC_CC_Pos (0UL) /*!< Position of CC field. */ +#define TIMER_CC_CC_Msk (0xFFFFFFFFUL << TIMER_CC_CC_Pos) /*!< Bit mask of CC field. */ + + +/* Peripheral: TWI */ +/* Description: I2C compatible Two-Wire Interface 0 */ + +/* Register: TWI_TASKS_STARTRX */ +/* Description: Start TWI receive sequence */ + +/* Bit 0 : */ +#define TWI_TASKS_STARTRX_TASKS_STARTRX_Pos (0UL) /*!< Position of TASKS_STARTRX field. */ +#define TWI_TASKS_STARTRX_TASKS_STARTRX_Msk (0x1UL << TWI_TASKS_STARTRX_TASKS_STARTRX_Pos) /*!< Bit mask of TASKS_STARTRX field. */ + +/* Register: TWI_TASKS_STARTTX */ +/* Description: Start TWI transmit sequence */ + +/* Bit 0 : */ +#define TWI_TASKS_STARTTX_TASKS_STARTTX_Pos (0UL) /*!< Position of TASKS_STARTTX field. */ +#define TWI_TASKS_STARTTX_TASKS_STARTTX_Msk (0x1UL << TWI_TASKS_STARTTX_TASKS_STARTTX_Pos) /*!< Bit mask of TASKS_STARTTX field. */ + +/* Register: TWI_TASKS_STOP */ +/* Description: Stop TWI transaction */ + +/* Bit 0 : */ +#define TWI_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define TWI_TASKS_STOP_TASKS_STOP_Msk (0x1UL << TWI_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: TWI_TASKS_SUSPEND */ +/* Description: Suspend TWI transaction */ + +/* Bit 0 : */ +#define TWI_TASKS_SUSPEND_TASKS_SUSPEND_Pos (0UL) /*!< Position of TASKS_SUSPEND field. */ +#define TWI_TASKS_SUSPEND_TASKS_SUSPEND_Msk (0x1UL << TWI_TASKS_SUSPEND_TASKS_SUSPEND_Pos) /*!< Bit mask of TASKS_SUSPEND field. */ + +/* Register: TWI_TASKS_RESUME */ +/* Description: Resume TWI transaction */ + +/* Bit 0 : */ +#define TWI_TASKS_RESUME_TASKS_RESUME_Pos (0UL) /*!< Position of TASKS_RESUME field. */ +#define TWI_TASKS_RESUME_TASKS_RESUME_Msk (0x1UL << TWI_TASKS_RESUME_TASKS_RESUME_Pos) /*!< Bit mask of TASKS_RESUME field. */ + +/* Register: TWI_EVENTS_STOPPED */ +/* Description: TWI stopped */ + +/* Bit 0 : */ +#define TWI_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */ +#define TWI_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << TWI_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */ + +/* Register: TWI_EVENTS_RXDREADY */ +/* Description: TWI RXD byte received */ + +/* Bit 0 : */ +#define TWI_EVENTS_RXDREADY_EVENTS_RXDREADY_Pos (0UL) /*!< Position of EVENTS_RXDREADY field. */ +#define TWI_EVENTS_RXDREADY_EVENTS_RXDREADY_Msk (0x1UL << TWI_EVENTS_RXDREADY_EVENTS_RXDREADY_Pos) /*!< Bit mask of EVENTS_RXDREADY field. */ + +/* Register: TWI_EVENTS_TXDSENT */ +/* Description: TWI TXD byte sent */ + +/* Bit 0 : */ +#define TWI_EVENTS_TXDSENT_EVENTS_TXDSENT_Pos (0UL) /*!< Position of EVENTS_TXDSENT field. */ +#define TWI_EVENTS_TXDSENT_EVENTS_TXDSENT_Msk (0x1UL << TWI_EVENTS_TXDSENT_EVENTS_TXDSENT_Pos) /*!< Bit mask of EVENTS_TXDSENT field. */ + +/* Register: TWI_EVENTS_ERROR */ +/* Description: TWI error */ + +/* Bit 0 : */ +#define TWI_EVENTS_ERROR_EVENTS_ERROR_Pos (0UL) /*!< Position of EVENTS_ERROR field. */ +#define TWI_EVENTS_ERROR_EVENTS_ERROR_Msk (0x1UL << TWI_EVENTS_ERROR_EVENTS_ERROR_Pos) /*!< Bit mask of EVENTS_ERROR field. */ + +/* Register: TWI_EVENTS_BB */ +/* Description: TWI byte boundary, generated before each byte that is sent or received */ + +/* Bit 0 : */ +#define TWI_EVENTS_BB_EVENTS_BB_Pos (0UL) /*!< Position of EVENTS_BB field. */ +#define TWI_EVENTS_BB_EVENTS_BB_Msk (0x1UL << TWI_EVENTS_BB_EVENTS_BB_Pos) /*!< Bit mask of EVENTS_BB field. */ + +/* Register: TWI_EVENTS_SUSPENDED */ +/* Description: TWI entered the suspended state */ + +/* Bit 0 : */ +#define TWI_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Pos (0UL) /*!< Position of EVENTS_SUSPENDED field. */ +#define TWI_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Msk (0x1UL << TWI_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Pos) /*!< Bit mask of EVENTS_SUSPENDED field. */ + +/* Register: TWI_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 1 : Shortcut between BB event and STOP task */ +#define TWI_SHORTS_BB_STOP_Pos (1UL) /*!< Position of BB_STOP field. */ +#define TWI_SHORTS_BB_STOP_Msk (0x1UL << TWI_SHORTS_BB_STOP_Pos) /*!< Bit mask of BB_STOP field. */ +#define TWI_SHORTS_BB_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TWI_SHORTS_BB_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 0 : Shortcut between BB event and SUSPEND task */ +#define TWI_SHORTS_BB_SUSPEND_Pos (0UL) /*!< Position of BB_SUSPEND field. */ +#define TWI_SHORTS_BB_SUSPEND_Msk (0x1UL << TWI_SHORTS_BB_SUSPEND_Pos) /*!< Bit mask of BB_SUSPEND field. */ +#define TWI_SHORTS_BB_SUSPEND_Disabled (0UL) /*!< Disable shortcut */ +#define TWI_SHORTS_BB_SUSPEND_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: TWI_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 18 : Write '1' to enable interrupt for SUSPENDED event */ +#define TWI_INTENSET_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ +#define TWI_INTENSET_SUSPENDED_Msk (0x1UL << TWI_INTENSET_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ +#define TWI_INTENSET_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */ +#define TWI_INTENSET_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */ +#define TWI_INTENSET_SUSPENDED_Set (1UL) /*!< Enable */ + +/* Bit 14 : Write '1' to enable interrupt for BB event */ +#define TWI_INTENSET_BB_Pos (14UL) /*!< Position of BB field. */ +#define TWI_INTENSET_BB_Msk (0x1UL << TWI_INTENSET_BB_Pos) /*!< Bit mask of BB field. */ +#define TWI_INTENSET_BB_Disabled (0UL) /*!< Read: Disabled */ +#define TWI_INTENSET_BB_Enabled (1UL) /*!< Read: Enabled */ +#define TWI_INTENSET_BB_Set (1UL) /*!< Enable */ + +/* Bit 9 : Write '1' to enable interrupt for ERROR event */ +#define TWI_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define TWI_INTENSET_ERROR_Msk (0x1UL << TWI_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define TWI_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define TWI_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define TWI_INTENSET_ERROR_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to enable interrupt for TXDSENT event */ +#define TWI_INTENSET_TXDSENT_Pos (7UL) /*!< Position of TXDSENT field. */ +#define TWI_INTENSET_TXDSENT_Msk (0x1UL << TWI_INTENSET_TXDSENT_Pos) /*!< Bit mask of TXDSENT field. */ +#define TWI_INTENSET_TXDSENT_Disabled (0UL) /*!< Read: Disabled */ +#define TWI_INTENSET_TXDSENT_Enabled (1UL) /*!< Read: Enabled */ +#define TWI_INTENSET_TXDSENT_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to enable interrupt for RXDREADY event */ +#define TWI_INTENSET_RXDREADY_Pos (2UL) /*!< Position of RXDREADY field. */ +#define TWI_INTENSET_RXDREADY_Msk (0x1UL << TWI_INTENSET_RXDREADY_Pos) /*!< Bit mask of RXDREADY field. */ +#define TWI_INTENSET_RXDREADY_Disabled (0UL) /*!< Read: Disabled */ +#define TWI_INTENSET_RXDREADY_Enabled (1UL) /*!< Read: Enabled */ +#define TWI_INTENSET_RXDREADY_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable interrupt for STOPPED event */ +#define TWI_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define TWI_INTENSET_STOPPED_Msk (0x1UL << TWI_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define TWI_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define TWI_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define TWI_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Register: TWI_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 18 : Write '1' to disable interrupt for SUSPENDED event */ +#define TWI_INTENCLR_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ +#define TWI_INTENCLR_SUSPENDED_Msk (0x1UL << TWI_INTENCLR_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ +#define TWI_INTENCLR_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */ +#define TWI_INTENCLR_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */ +#define TWI_INTENCLR_SUSPENDED_Clear (1UL) /*!< Disable */ + +/* Bit 14 : Write '1' to disable interrupt for BB event */ +#define TWI_INTENCLR_BB_Pos (14UL) /*!< Position of BB field. */ +#define TWI_INTENCLR_BB_Msk (0x1UL << TWI_INTENCLR_BB_Pos) /*!< Bit mask of BB field. */ +#define TWI_INTENCLR_BB_Disabled (0UL) /*!< Read: Disabled */ +#define TWI_INTENCLR_BB_Enabled (1UL) /*!< Read: Enabled */ +#define TWI_INTENCLR_BB_Clear (1UL) /*!< Disable */ + +/* Bit 9 : Write '1' to disable interrupt for ERROR event */ +#define TWI_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define TWI_INTENCLR_ERROR_Msk (0x1UL << TWI_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define TWI_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define TWI_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define TWI_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to disable interrupt for TXDSENT event */ +#define TWI_INTENCLR_TXDSENT_Pos (7UL) /*!< Position of TXDSENT field. */ +#define TWI_INTENCLR_TXDSENT_Msk (0x1UL << TWI_INTENCLR_TXDSENT_Pos) /*!< Bit mask of TXDSENT field. */ +#define TWI_INTENCLR_TXDSENT_Disabled (0UL) /*!< Read: Disabled */ +#define TWI_INTENCLR_TXDSENT_Enabled (1UL) /*!< Read: Enabled */ +#define TWI_INTENCLR_TXDSENT_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to disable interrupt for RXDREADY event */ +#define TWI_INTENCLR_RXDREADY_Pos (2UL) /*!< Position of RXDREADY field. */ +#define TWI_INTENCLR_RXDREADY_Msk (0x1UL << TWI_INTENCLR_RXDREADY_Pos) /*!< Bit mask of RXDREADY field. */ +#define TWI_INTENCLR_RXDREADY_Disabled (0UL) /*!< Read: Disabled */ +#define TWI_INTENCLR_RXDREADY_Enabled (1UL) /*!< Read: Enabled */ +#define TWI_INTENCLR_RXDREADY_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable interrupt for STOPPED event */ +#define TWI_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define TWI_INTENCLR_STOPPED_Msk (0x1UL << TWI_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define TWI_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define TWI_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define TWI_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Register: TWI_ERRORSRC */ +/* Description: Error source */ + +/* Bit 2 : NACK received after sending a data byte (write '1' to clear) */ +#define TWI_ERRORSRC_DNACK_Pos (2UL) /*!< Position of DNACK field. */ +#define TWI_ERRORSRC_DNACK_Msk (0x1UL << TWI_ERRORSRC_DNACK_Pos) /*!< Bit mask of DNACK field. */ +#define TWI_ERRORSRC_DNACK_NotPresent (0UL) /*!< Read: error not present */ +#define TWI_ERRORSRC_DNACK_Present (1UL) /*!< Read: error present */ + +/* Bit 1 : NACK received after sending the address (write '1' to clear) */ +#define TWI_ERRORSRC_ANACK_Pos (1UL) /*!< Position of ANACK field. */ +#define TWI_ERRORSRC_ANACK_Msk (0x1UL << TWI_ERRORSRC_ANACK_Pos) /*!< Bit mask of ANACK field. */ +#define TWI_ERRORSRC_ANACK_NotPresent (0UL) /*!< Read: error not present */ +#define TWI_ERRORSRC_ANACK_Present (1UL) /*!< Read: error present */ + +/* Bit 0 : Overrun error */ +#define TWI_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */ +#define TWI_ERRORSRC_OVERRUN_Msk (0x1UL << TWI_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ +#define TWI_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: no overrun occured */ +#define TWI_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: overrun occured */ + +/* Register: TWI_ENABLE */ +/* Description: Enable TWI */ + +/* Bits 3..0 : Enable or disable TWI */ +#define TWI_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define TWI_ENABLE_ENABLE_Msk (0xFUL << TWI_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define TWI_ENABLE_ENABLE_Disabled (0UL) /*!< Disable TWI */ +#define TWI_ENABLE_ENABLE_Enabled (5UL) /*!< Enable TWI */ + +/* Register: TWI_PSEL_SCL */ +/* Description: Pin select for SCL */ + +/* Bit 31 : Connection */ +#define TWI_PSEL_SCL_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define TWI_PSEL_SCL_CONNECT_Msk (0x1UL << TWI_PSEL_SCL_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define TWI_PSEL_SCL_CONNECT_Connected (0UL) /*!< Connect */ +#define TWI_PSEL_SCL_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define TWI_PSEL_SCL_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define TWI_PSEL_SCL_PORT_Msk (0x1UL << TWI_PSEL_SCL_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define TWI_PSEL_SCL_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define TWI_PSEL_SCL_PIN_Msk (0x1FUL << TWI_PSEL_SCL_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: TWI_PSEL_SDA */ +/* Description: Pin select for SDA */ + +/* Bit 31 : Connection */ +#define TWI_PSEL_SDA_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define TWI_PSEL_SDA_CONNECT_Msk (0x1UL << TWI_PSEL_SDA_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define TWI_PSEL_SDA_CONNECT_Connected (0UL) /*!< Connect */ +#define TWI_PSEL_SDA_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define TWI_PSEL_SDA_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define TWI_PSEL_SDA_PORT_Msk (0x1UL << TWI_PSEL_SDA_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define TWI_PSEL_SDA_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define TWI_PSEL_SDA_PIN_Msk (0x1FUL << TWI_PSEL_SDA_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: TWI_RXD */ +/* Description: RXD register */ + +/* Bits 7..0 : RXD register */ +#define TWI_RXD_RXD_Pos (0UL) /*!< Position of RXD field. */ +#define TWI_RXD_RXD_Msk (0xFFUL << TWI_RXD_RXD_Pos) /*!< Bit mask of RXD field. */ + +/* Register: TWI_TXD */ +/* Description: TXD register */ + +/* Bits 7..0 : TXD register */ +#define TWI_TXD_TXD_Pos (0UL) /*!< Position of TXD field. */ +#define TWI_TXD_TXD_Msk (0xFFUL << TWI_TXD_TXD_Pos) /*!< Bit mask of TXD field. */ + +/* Register: TWI_FREQUENCY */ +/* Description: TWI frequency. Accuracy depends on the HFCLK source selected. */ + +/* Bits 31..0 : TWI master clock frequency */ +#define TWI_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ +#define TWI_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << TWI_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ +#define TWI_FREQUENCY_FREQUENCY_K100 (0x01980000UL) /*!< 100 kbps */ +#define TWI_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */ +#define TWI_FREQUENCY_FREQUENCY_K400 (0x06680000UL) /*!< 400 kbps (actual rate 410.256 kbps) */ + +/* Register: TWI_ADDRESS */ +/* Description: Address used in the TWI transfer */ + +/* Bits 6..0 : Address used in the TWI transfer */ +#define TWI_ADDRESS_ADDRESS_Pos (0UL) /*!< Position of ADDRESS field. */ +#define TWI_ADDRESS_ADDRESS_Msk (0x7FUL << TWI_ADDRESS_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ + + +/* Peripheral: TWIM */ +/* Description: I2C compatible Two-Wire Master Interface with EasyDMA 0 */ + +/* Register: TWIM_TASKS_STARTRX */ +/* Description: Start TWI receive sequence */ + +/* Bit 0 : */ +#define TWIM_TASKS_STARTRX_TASKS_STARTRX_Pos (0UL) /*!< Position of TASKS_STARTRX field. */ +#define TWIM_TASKS_STARTRX_TASKS_STARTRX_Msk (0x1UL << TWIM_TASKS_STARTRX_TASKS_STARTRX_Pos) /*!< Bit mask of TASKS_STARTRX field. */ + +/* Register: TWIM_TASKS_STARTTX */ +/* Description: Start TWI transmit sequence */ + +/* Bit 0 : */ +#define TWIM_TASKS_STARTTX_TASKS_STARTTX_Pos (0UL) /*!< Position of TASKS_STARTTX field. */ +#define TWIM_TASKS_STARTTX_TASKS_STARTTX_Msk (0x1UL << TWIM_TASKS_STARTTX_TASKS_STARTTX_Pos) /*!< Bit mask of TASKS_STARTTX field. */ + +/* Register: TWIM_TASKS_STOP */ +/* Description: Stop TWI transaction. Must be issued while the TWI master is not suspended. */ + +/* Bit 0 : */ +#define TWIM_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define TWIM_TASKS_STOP_TASKS_STOP_Msk (0x1UL << TWIM_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: TWIM_TASKS_SUSPEND */ +/* Description: Suspend TWI transaction */ + +/* Bit 0 : */ +#define TWIM_TASKS_SUSPEND_TASKS_SUSPEND_Pos (0UL) /*!< Position of TASKS_SUSPEND field. */ +#define TWIM_TASKS_SUSPEND_TASKS_SUSPEND_Msk (0x1UL << TWIM_TASKS_SUSPEND_TASKS_SUSPEND_Pos) /*!< Bit mask of TASKS_SUSPEND field. */ + +/* Register: TWIM_TASKS_RESUME */ +/* Description: Resume TWI transaction */ + +/* Bit 0 : */ +#define TWIM_TASKS_RESUME_TASKS_RESUME_Pos (0UL) /*!< Position of TASKS_RESUME field. */ +#define TWIM_TASKS_RESUME_TASKS_RESUME_Msk (0x1UL << TWIM_TASKS_RESUME_TASKS_RESUME_Pos) /*!< Bit mask of TASKS_RESUME field. */ + +/* Register: TWIM_EVENTS_STOPPED */ +/* Description: TWI stopped */ + +/* Bit 0 : */ +#define TWIM_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */ +#define TWIM_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << TWIM_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */ + +/* Register: TWIM_EVENTS_ERROR */ +/* Description: TWI error */ + +/* Bit 0 : */ +#define TWIM_EVENTS_ERROR_EVENTS_ERROR_Pos (0UL) /*!< Position of EVENTS_ERROR field. */ +#define TWIM_EVENTS_ERROR_EVENTS_ERROR_Msk (0x1UL << TWIM_EVENTS_ERROR_EVENTS_ERROR_Pos) /*!< Bit mask of EVENTS_ERROR field. */ + +/* Register: TWIM_EVENTS_SUSPENDED */ +/* Description: Last byte has been sent out after the SUSPEND task has been issued, TWI traffic is now suspended. */ + +/* Bit 0 : */ +#define TWIM_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Pos (0UL) /*!< Position of EVENTS_SUSPENDED field. */ +#define TWIM_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Msk (0x1UL << TWIM_EVENTS_SUSPENDED_EVENTS_SUSPENDED_Pos) /*!< Bit mask of EVENTS_SUSPENDED field. */ + +/* Register: TWIM_EVENTS_RXSTARTED */ +/* Description: Receive sequence started */ + +/* Bit 0 : */ +#define TWIM_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos (0UL) /*!< Position of EVENTS_RXSTARTED field. */ +#define TWIM_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Msk (0x1UL << TWIM_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos) /*!< Bit mask of EVENTS_RXSTARTED field. */ + +/* Register: TWIM_EVENTS_TXSTARTED */ +/* Description: Transmit sequence started */ + +/* Bit 0 : */ +#define TWIM_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos (0UL) /*!< Position of EVENTS_TXSTARTED field. */ +#define TWIM_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Msk (0x1UL << TWIM_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos) /*!< Bit mask of EVENTS_TXSTARTED field. */ + +/* Register: TWIM_EVENTS_LASTRX */ +/* Description: Byte boundary, starting to receive the last byte */ + +/* Bit 0 : */ +#define TWIM_EVENTS_LASTRX_EVENTS_LASTRX_Pos (0UL) /*!< Position of EVENTS_LASTRX field. */ +#define TWIM_EVENTS_LASTRX_EVENTS_LASTRX_Msk (0x1UL << TWIM_EVENTS_LASTRX_EVENTS_LASTRX_Pos) /*!< Bit mask of EVENTS_LASTRX field. */ + +/* Register: TWIM_EVENTS_LASTTX */ +/* Description: Byte boundary, starting to transmit the last byte */ + +/* Bit 0 : */ +#define TWIM_EVENTS_LASTTX_EVENTS_LASTTX_Pos (0UL) /*!< Position of EVENTS_LASTTX field. */ +#define TWIM_EVENTS_LASTTX_EVENTS_LASTTX_Msk (0x1UL << TWIM_EVENTS_LASTTX_EVENTS_LASTTX_Pos) /*!< Bit mask of EVENTS_LASTTX field. */ + +/* Register: TWIM_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 12 : Shortcut between LASTRX event and STOP task */ +#define TWIM_SHORTS_LASTRX_STOP_Pos (12UL) /*!< Position of LASTRX_STOP field. */ +#define TWIM_SHORTS_LASTRX_STOP_Msk (0x1UL << TWIM_SHORTS_LASTRX_STOP_Pos) /*!< Bit mask of LASTRX_STOP field. */ +#define TWIM_SHORTS_LASTRX_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TWIM_SHORTS_LASTRX_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 11 : Shortcut between LASTRX event and SUSPEND task */ +#define TWIM_SHORTS_LASTRX_SUSPEND_Pos (11UL) /*!< Position of LASTRX_SUSPEND field. */ +#define TWIM_SHORTS_LASTRX_SUSPEND_Msk (0x1UL << TWIM_SHORTS_LASTRX_SUSPEND_Pos) /*!< Bit mask of LASTRX_SUSPEND field. */ +#define TWIM_SHORTS_LASTRX_SUSPEND_Disabled (0UL) /*!< Disable shortcut */ +#define TWIM_SHORTS_LASTRX_SUSPEND_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 10 : Shortcut between LASTRX event and STARTTX task */ +#define TWIM_SHORTS_LASTRX_STARTTX_Pos (10UL) /*!< Position of LASTRX_STARTTX field. */ +#define TWIM_SHORTS_LASTRX_STARTTX_Msk (0x1UL << TWIM_SHORTS_LASTRX_STARTTX_Pos) /*!< Bit mask of LASTRX_STARTTX field. */ +#define TWIM_SHORTS_LASTRX_STARTTX_Disabled (0UL) /*!< Disable shortcut */ +#define TWIM_SHORTS_LASTRX_STARTTX_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 9 : Shortcut between LASTTX event and STOP task */ +#define TWIM_SHORTS_LASTTX_STOP_Pos (9UL) /*!< Position of LASTTX_STOP field. */ +#define TWIM_SHORTS_LASTTX_STOP_Msk (0x1UL << TWIM_SHORTS_LASTTX_STOP_Pos) /*!< Bit mask of LASTTX_STOP field. */ +#define TWIM_SHORTS_LASTTX_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TWIM_SHORTS_LASTTX_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 8 : Shortcut between LASTTX event and SUSPEND task */ +#define TWIM_SHORTS_LASTTX_SUSPEND_Pos (8UL) /*!< Position of LASTTX_SUSPEND field. */ +#define TWIM_SHORTS_LASTTX_SUSPEND_Msk (0x1UL << TWIM_SHORTS_LASTTX_SUSPEND_Pos) /*!< Bit mask of LASTTX_SUSPEND field. */ +#define TWIM_SHORTS_LASTTX_SUSPEND_Disabled (0UL) /*!< Disable shortcut */ +#define TWIM_SHORTS_LASTTX_SUSPEND_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 7 : Shortcut between LASTTX event and STARTRX task */ +#define TWIM_SHORTS_LASTTX_STARTRX_Pos (7UL) /*!< Position of LASTTX_STARTRX field. */ +#define TWIM_SHORTS_LASTTX_STARTRX_Msk (0x1UL << TWIM_SHORTS_LASTTX_STARTRX_Pos) /*!< Bit mask of LASTTX_STARTRX field. */ +#define TWIM_SHORTS_LASTTX_STARTRX_Disabled (0UL) /*!< Disable shortcut */ +#define TWIM_SHORTS_LASTTX_STARTRX_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: TWIM_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 24 : Enable or disable interrupt for LASTTX event */ +#define TWIM_INTEN_LASTTX_Pos (24UL) /*!< Position of LASTTX field. */ +#define TWIM_INTEN_LASTTX_Msk (0x1UL << TWIM_INTEN_LASTTX_Pos) /*!< Bit mask of LASTTX field. */ +#define TWIM_INTEN_LASTTX_Disabled (0UL) /*!< Disable */ +#define TWIM_INTEN_LASTTX_Enabled (1UL) /*!< Enable */ + +/* Bit 23 : Enable or disable interrupt for LASTRX event */ +#define TWIM_INTEN_LASTRX_Pos (23UL) /*!< Position of LASTRX field. */ +#define TWIM_INTEN_LASTRX_Msk (0x1UL << TWIM_INTEN_LASTRX_Pos) /*!< Bit mask of LASTRX field. */ +#define TWIM_INTEN_LASTRX_Disabled (0UL) /*!< Disable */ +#define TWIM_INTEN_LASTRX_Enabled (1UL) /*!< Enable */ + +/* Bit 20 : Enable or disable interrupt for TXSTARTED event */ +#define TWIM_INTEN_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define TWIM_INTEN_TXSTARTED_Msk (0x1UL << TWIM_INTEN_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define TWIM_INTEN_TXSTARTED_Disabled (0UL) /*!< Disable */ +#define TWIM_INTEN_TXSTARTED_Enabled (1UL) /*!< Enable */ + +/* Bit 19 : Enable or disable interrupt for RXSTARTED event */ +#define TWIM_INTEN_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define TWIM_INTEN_RXSTARTED_Msk (0x1UL << TWIM_INTEN_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define TWIM_INTEN_RXSTARTED_Disabled (0UL) /*!< Disable */ +#define TWIM_INTEN_RXSTARTED_Enabled (1UL) /*!< Enable */ + +/* Bit 18 : Enable or disable interrupt for SUSPENDED event */ +#define TWIM_INTEN_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ +#define TWIM_INTEN_SUSPENDED_Msk (0x1UL << TWIM_INTEN_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ +#define TWIM_INTEN_SUSPENDED_Disabled (0UL) /*!< Disable */ +#define TWIM_INTEN_SUSPENDED_Enabled (1UL) /*!< Enable */ + +/* Bit 9 : Enable or disable interrupt for ERROR event */ +#define TWIM_INTEN_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define TWIM_INTEN_ERROR_Msk (0x1UL << TWIM_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define TWIM_INTEN_ERROR_Disabled (0UL) /*!< Disable */ +#define TWIM_INTEN_ERROR_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for STOPPED event */ +#define TWIM_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define TWIM_INTEN_STOPPED_Msk (0x1UL << TWIM_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define TWIM_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ +#define TWIM_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ + +/* Register: TWIM_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 24 : Write '1' to enable interrupt for LASTTX event */ +#define TWIM_INTENSET_LASTTX_Pos (24UL) /*!< Position of LASTTX field. */ +#define TWIM_INTENSET_LASTTX_Msk (0x1UL << TWIM_INTENSET_LASTTX_Pos) /*!< Bit mask of LASTTX field. */ +#define TWIM_INTENSET_LASTTX_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENSET_LASTTX_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENSET_LASTTX_Set (1UL) /*!< Enable */ + +/* Bit 23 : Write '1' to enable interrupt for LASTRX event */ +#define TWIM_INTENSET_LASTRX_Pos (23UL) /*!< Position of LASTRX field. */ +#define TWIM_INTENSET_LASTRX_Msk (0x1UL << TWIM_INTENSET_LASTRX_Pos) /*!< Bit mask of LASTRX field. */ +#define TWIM_INTENSET_LASTRX_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENSET_LASTRX_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENSET_LASTRX_Set (1UL) /*!< Enable */ + +/* Bit 20 : Write '1' to enable interrupt for TXSTARTED event */ +#define TWIM_INTENSET_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define TWIM_INTENSET_TXSTARTED_Msk (0x1UL << TWIM_INTENSET_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define TWIM_INTENSET_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENSET_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENSET_TXSTARTED_Set (1UL) /*!< Enable */ + +/* Bit 19 : Write '1' to enable interrupt for RXSTARTED event */ +#define TWIM_INTENSET_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define TWIM_INTENSET_RXSTARTED_Msk (0x1UL << TWIM_INTENSET_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define TWIM_INTENSET_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENSET_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENSET_RXSTARTED_Set (1UL) /*!< Enable */ + +/* Bit 18 : Write '1' to enable interrupt for SUSPENDED event */ +#define TWIM_INTENSET_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ +#define TWIM_INTENSET_SUSPENDED_Msk (0x1UL << TWIM_INTENSET_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ +#define TWIM_INTENSET_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENSET_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENSET_SUSPENDED_Set (1UL) /*!< Enable */ + +/* Bit 9 : Write '1' to enable interrupt for ERROR event */ +#define TWIM_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define TWIM_INTENSET_ERROR_Msk (0x1UL << TWIM_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define TWIM_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENSET_ERROR_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable interrupt for STOPPED event */ +#define TWIM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define TWIM_INTENSET_STOPPED_Msk (0x1UL << TWIM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define TWIM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Register: TWIM_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 24 : Write '1' to disable interrupt for LASTTX event */ +#define TWIM_INTENCLR_LASTTX_Pos (24UL) /*!< Position of LASTTX field. */ +#define TWIM_INTENCLR_LASTTX_Msk (0x1UL << TWIM_INTENCLR_LASTTX_Pos) /*!< Bit mask of LASTTX field. */ +#define TWIM_INTENCLR_LASTTX_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENCLR_LASTTX_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENCLR_LASTTX_Clear (1UL) /*!< Disable */ + +/* Bit 23 : Write '1' to disable interrupt for LASTRX event */ +#define TWIM_INTENCLR_LASTRX_Pos (23UL) /*!< Position of LASTRX field. */ +#define TWIM_INTENCLR_LASTRX_Msk (0x1UL << TWIM_INTENCLR_LASTRX_Pos) /*!< Bit mask of LASTRX field. */ +#define TWIM_INTENCLR_LASTRX_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENCLR_LASTRX_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENCLR_LASTRX_Clear (1UL) /*!< Disable */ + +/* Bit 20 : Write '1' to disable interrupt for TXSTARTED event */ +#define TWIM_INTENCLR_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define TWIM_INTENCLR_TXSTARTED_Msk (0x1UL << TWIM_INTENCLR_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define TWIM_INTENCLR_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENCLR_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENCLR_TXSTARTED_Clear (1UL) /*!< Disable */ + +/* Bit 19 : Write '1' to disable interrupt for RXSTARTED event */ +#define TWIM_INTENCLR_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define TWIM_INTENCLR_RXSTARTED_Msk (0x1UL << TWIM_INTENCLR_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define TWIM_INTENCLR_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENCLR_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENCLR_RXSTARTED_Clear (1UL) /*!< Disable */ + +/* Bit 18 : Write '1' to disable interrupt for SUSPENDED event */ +#define TWIM_INTENCLR_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ +#define TWIM_INTENCLR_SUSPENDED_Msk (0x1UL << TWIM_INTENCLR_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ +#define TWIM_INTENCLR_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENCLR_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENCLR_SUSPENDED_Clear (1UL) /*!< Disable */ + +/* Bit 9 : Write '1' to disable interrupt for ERROR event */ +#define TWIM_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define TWIM_INTENCLR_ERROR_Msk (0x1UL << TWIM_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define TWIM_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable interrupt for STOPPED event */ +#define TWIM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define TWIM_INTENCLR_STOPPED_Msk (0x1UL << TWIM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define TWIM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Register: TWIM_ERRORSRC */ +/* Description: Error source */ + +/* Bit 2 : NACK received after sending a data byte (write '1' to clear) */ +#define TWIM_ERRORSRC_DNACK_Pos (2UL) /*!< Position of DNACK field. */ +#define TWIM_ERRORSRC_DNACK_Msk (0x1UL << TWIM_ERRORSRC_DNACK_Pos) /*!< Bit mask of DNACK field. */ +#define TWIM_ERRORSRC_DNACK_NotReceived (0UL) /*!< Error did not occur */ +#define TWIM_ERRORSRC_DNACK_Received (1UL) /*!< Error occurred */ + +/* Bit 1 : NACK received after sending the address (write '1' to clear) */ +#define TWIM_ERRORSRC_ANACK_Pos (1UL) /*!< Position of ANACK field. */ +#define TWIM_ERRORSRC_ANACK_Msk (0x1UL << TWIM_ERRORSRC_ANACK_Pos) /*!< Bit mask of ANACK field. */ +#define TWIM_ERRORSRC_ANACK_NotReceived (0UL) /*!< Error did not occur */ +#define TWIM_ERRORSRC_ANACK_Received (1UL) /*!< Error occurred */ + +/* Bit 0 : Overrun error */ +#define TWIM_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */ +#define TWIM_ERRORSRC_OVERRUN_Msk (0x1UL << TWIM_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ +#define TWIM_ERRORSRC_OVERRUN_NotReceived (0UL) /*!< Error did not occur */ +#define TWIM_ERRORSRC_OVERRUN_Received (1UL) /*!< Error occurred */ + +/* Register: TWIM_ENABLE */ +/* Description: Enable TWIM */ + +/* Bits 3..0 : Enable or disable TWIM */ +#define TWIM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define TWIM_ENABLE_ENABLE_Msk (0xFUL << TWIM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define TWIM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable TWIM */ +#define TWIM_ENABLE_ENABLE_Enabled (6UL) /*!< Enable TWIM */ + +/* Register: TWIM_PSEL_SCL */ +/* Description: Pin select for SCL signal */ + +/* Bit 31 : Connection */ +#define TWIM_PSEL_SCL_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define TWIM_PSEL_SCL_CONNECT_Msk (0x1UL << TWIM_PSEL_SCL_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define TWIM_PSEL_SCL_CONNECT_Connected (0UL) /*!< Connect */ +#define TWIM_PSEL_SCL_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define TWIM_PSEL_SCL_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define TWIM_PSEL_SCL_PORT_Msk (0x1UL << TWIM_PSEL_SCL_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define TWIM_PSEL_SCL_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define TWIM_PSEL_SCL_PIN_Msk (0x1FUL << TWIM_PSEL_SCL_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: TWIM_PSEL_SDA */ +/* Description: Pin select for SDA signal */ + +/* Bit 31 : Connection */ +#define TWIM_PSEL_SDA_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define TWIM_PSEL_SDA_CONNECT_Msk (0x1UL << TWIM_PSEL_SDA_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define TWIM_PSEL_SDA_CONNECT_Connected (0UL) /*!< Connect */ +#define TWIM_PSEL_SDA_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define TWIM_PSEL_SDA_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define TWIM_PSEL_SDA_PORT_Msk (0x1UL << TWIM_PSEL_SDA_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define TWIM_PSEL_SDA_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define TWIM_PSEL_SDA_PIN_Msk (0x1FUL << TWIM_PSEL_SDA_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: TWIM_FREQUENCY */ +/* Description: TWI frequency. Accuracy depends on the HFCLK source selected. */ + +/* Bits 31..0 : TWI master clock frequency */ +#define TWIM_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ +#define TWIM_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << TWIM_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ +#define TWIM_FREQUENCY_FREQUENCY_K100 (0x01980000UL) /*!< 100 kbps */ +#define TWIM_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */ +#define TWIM_FREQUENCY_FREQUENCY_K400 (0x06400000UL) /*!< 400 kbps */ + +/* Register: TWIM_RXD_PTR */ +/* Description: Data pointer */ + +/* Bits 31..0 : Data pointer */ +#define TWIM_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define TWIM_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIM_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: TWIM_RXD_MAXCNT */ +/* Description: Maximum number of bytes in receive buffer */ + +/* Bits 15..0 : Maximum number of bytes in receive buffer */ +#define TWIM_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define TWIM_RXD_MAXCNT_MAXCNT_Msk (0xFFFFUL << TWIM_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: TWIM_RXD_AMOUNT */ +/* Description: Number of bytes transferred in the last transaction */ + +/* Bits 15..0 : Number of bytes transferred in the last transaction. In case of NACK error, includes the NACK'ed byte. */ +#define TWIM_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define TWIM_RXD_AMOUNT_AMOUNT_Msk (0xFFFFUL << TWIM_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: TWIM_RXD_LIST */ +/* Description: EasyDMA list type */ + +/* Bits 2..0 : List type */ +#define TWIM_RXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */ +#define TWIM_RXD_LIST_LIST_Msk (0x7UL << TWIM_RXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */ +#define TWIM_RXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */ +#define TWIM_RXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */ + +/* Register: TWIM_TXD_PTR */ +/* Description: Data pointer */ + +/* Bits 31..0 : Data pointer */ +#define TWIM_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define TWIM_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIM_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: TWIM_TXD_MAXCNT */ +/* Description: Maximum number of bytes in transmit buffer */ + +/* Bits 15..0 : Maximum number of bytes in transmit buffer */ +#define TWIM_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define TWIM_TXD_MAXCNT_MAXCNT_Msk (0xFFFFUL << TWIM_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: TWIM_TXD_AMOUNT */ +/* Description: Number of bytes transferred in the last transaction */ + +/* Bits 15..0 : Number of bytes transferred in the last transaction. In case of NACK error, includes the NACK'ed byte. */ +#define TWIM_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define TWIM_TXD_AMOUNT_AMOUNT_Msk (0xFFFFUL << TWIM_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: TWIM_TXD_LIST */ +/* Description: EasyDMA list type */ + +/* Bits 2..0 : List type */ +#define TWIM_TXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */ +#define TWIM_TXD_LIST_LIST_Msk (0x7UL << TWIM_TXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */ +#define TWIM_TXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */ +#define TWIM_TXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */ + +/* Register: TWIM_ADDRESS */ +/* Description: Address used in the TWI transfer */ + +/* Bits 6..0 : Address used in the TWI transfer */ +#define TWIM_ADDRESS_ADDRESS_Pos (0UL) /*!< Position of ADDRESS field. */ +#define TWIM_ADDRESS_ADDRESS_Msk (0x7FUL << TWIM_ADDRESS_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ + + +/* Peripheral: TWIS */ +/* Description: I2C compatible Two-Wire Slave Interface with EasyDMA 0 */ + +/* Register: TWIS_TASKS_STOP */ +/* Description: Stop TWI transaction */ + +/* Bit 0 : */ +#define TWIS_TASKS_STOP_TASKS_STOP_Pos (0UL) /*!< Position of TASKS_STOP field. */ +#define TWIS_TASKS_STOP_TASKS_STOP_Msk (0x1UL << TWIS_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */ + +/* Register: TWIS_TASKS_SUSPEND */ +/* Description: Suspend TWI transaction */ + +/* Bit 0 : */ +#define TWIS_TASKS_SUSPEND_TASKS_SUSPEND_Pos (0UL) /*!< Position of TASKS_SUSPEND field. */ +#define TWIS_TASKS_SUSPEND_TASKS_SUSPEND_Msk (0x1UL << TWIS_TASKS_SUSPEND_TASKS_SUSPEND_Pos) /*!< Bit mask of TASKS_SUSPEND field. */ + +/* Register: TWIS_TASKS_RESUME */ +/* Description: Resume TWI transaction */ + +/* Bit 0 : */ +#define TWIS_TASKS_RESUME_TASKS_RESUME_Pos (0UL) /*!< Position of TASKS_RESUME field. */ +#define TWIS_TASKS_RESUME_TASKS_RESUME_Msk (0x1UL << TWIS_TASKS_RESUME_TASKS_RESUME_Pos) /*!< Bit mask of TASKS_RESUME field. */ + +/* Register: TWIS_TASKS_PREPARERX */ +/* Description: Prepare the TWI slave to respond to a write command */ + +/* Bit 0 : */ +#define TWIS_TASKS_PREPARERX_TASKS_PREPARERX_Pos (0UL) /*!< Position of TASKS_PREPARERX field. */ +#define TWIS_TASKS_PREPARERX_TASKS_PREPARERX_Msk (0x1UL << TWIS_TASKS_PREPARERX_TASKS_PREPARERX_Pos) /*!< Bit mask of TASKS_PREPARERX field. */ + +/* Register: TWIS_TASKS_PREPARETX */ +/* Description: Prepare the TWI slave to respond to a read command */ + +/* Bit 0 : */ +#define TWIS_TASKS_PREPARETX_TASKS_PREPARETX_Pos (0UL) /*!< Position of TASKS_PREPARETX field. */ +#define TWIS_TASKS_PREPARETX_TASKS_PREPARETX_Msk (0x1UL << TWIS_TASKS_PREPARETX_TASKS_PREPARETX_Pos) /*!< Bit mask of TASKS_PREPARETX field. */ + +/* Register: TWIS_EVENTS_STOPPED */ +/* Description: TWI stopped */ + +/* Bit 0 : */ +#define TWIS_EVENTS_STOPPED_EVENTS_STOPPED_Pos (0UL) /*!< Position of EVENTS_STOPPED field. */ +#define TWIS_EVENTS_STOPPED_EVENTS_STOPPED_Msk (0x1UL << TWIS_EVENTS_STOPPED_EVENTS_STOPPED_Pos) /*!< Bit mask of EVENTS_STOPPED field. */ + +/* Register: TWIS_EVENTS_ERROR */ +/* Description: TWI error */ + +/* Bit 0 : */ +#define TWIS_EVENTS_ERROR_EVENTS_ERROR_Pos (0UL) /*!< Position of EVENTS_ERROR field. */ +#define TWIS_EVENTS_ERROR_EVENTS_ERROR_Msk (0x1UL << TWIS_EVENTS_ERROR_EVENTS_ERROR_Pos) /*!< Bit mask of EVENTS_ERROR field. */ + +/* Register: TWIS_EVENTS_RXSTARTED */ +/* Description: Receive sequence started */ + +/* Bit 0 : */ +#define TWIS_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos (0UL) /*!< Position of EVENTS_RXSTARTED field. */ +#define TWIS_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Msk (0x1UL << TWIS_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos) /*!< Bit mask of EVENTS_RXSTARTED field. */ + +/* Register: TWIS_EVENTS_TXSTARTED */ +/* Description: Transmit sequence started */ + +/* Bit 0 : */ +#define TWIS_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos (0UL) /*!< Position of EVENTS_TXSTARTED field. */ +#define TWIS_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Msk (0x1UL << TWIS_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos) /*!< Bit mask of EVENTS_TXSTARTED field. */ + +/* Register: TWIS_EVENTS_WRITE */ +/* Description: Write command received */ + +/* Bit 0 : */ +#define TWIS_EVENTS_WRITE_EVENTS_WRITE_Pos (0UL) /*!< Position of EVENTS_WRITE field. */ +#define TWIS_EVENTS_WRITE_EVENTS_WRITE_Msk (0x1UL << TWIS_EVENTS_WRITE_EVENTS_WRITE_Pos) /*!< Bit mask of EVENTS_WRITE field. */ + +/* Register: TWIS_EVENTS_READ */ +/* Description: Read command received */ + +/* Bit 0 : */ +#define TWIS_EVENTS_READ_EVENTS_READ_Pos (0UL) /*!< Position of EVENTS_READ field. */ +#define TWIS_EVENTS_READ_EVENTS_READ_Msk (0x1UL << TWIS_EVENTS_READ_EVENTS_READ_Pos) /*!< Bit mask of EVENTS_READ field. */ + +/* Register: TWIS_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 14 : Shortcut between READ event and SUSPEND task */ +#define TWIS_SHORTS_READ_SUSPEND_Pos (14UL) /*!< Position of READ_SUSPEND field. */ +#define TWIS_SHORTS_READ_SUSPEND_Msk (0x1UL << TWIS_SHORTS_READ_SUSPEND_Pos) /*!< Bit mask of READ_SUSPEND field. */ +#define TWIS_SHORTS_READ_SUSPEND_Disabled (0UL) /*!< Disable shortcut */ +#define TWIS_SHORTS_READ_SUSPEND_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 13 : Shortcut between WRITE event and SUSPEND task */ +#define TWIS_SHORTS_WRITE_SUSPEND_Pos (13UL) /*!< Position of WRITE_SUSPEND field. */ +#define TWIS_SHORTS_WRITE_SUSPEND_Msk (0x1UL << TWIS_SHORTS_WRITE_SUSPEND_Pos) /*!< Bit mask of WRITE_SUSPEND field. */ +#define TWIS_SHORTS_WRITE_SUSPEND_Disabled (0UL) /*!< Disable shortcut */ +#define TWIS_SHORTS_WRITE_SUSPEND_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: TWIS_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 26 : Enable or disable interrupt for READ event */ +#define TWIS_INTEN_READ_Pos (26UL) /*!< Position of READ field. */ +#define TWIS_INTEN_READ_Msk (0x1UL << TWIS_INTEN_READ_Pos) /*!< Bit mask of READ field. */ +#define TWIS_INTEN_READ_Disabled (0UL) /*!< Disable */ +#define TWIS_INTEN_READ_Enabled (1UL) /*!< Enable */ + +/* Bit 25 : Enable or disable interrupt for WRITE event */ +#define TWIS_INTEN_WRITE_Pos (25UL) /*!< Position of WRITE field. */ +#define TWIS_INTEN_WRITE_Msk (0x1UL << TWIS_INTEN_WRITE_Pos) /*!< Bit mask of WRITE field. */ +#define TWIS_INTEN_WRITE_Disabled (0UL) /*!< Disable */ +#define TWIS_INTEN_WRITE_Enabled (1UL) /*!< Enable */ + +/* Bit 20 : Enable or disable interrupt for TXSTARTED event */ +#define TWIS_INTEN_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define TWIS_INTEN_TXSTARTED_Msk (0x1UL << TWIS_INTEN_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define TWIS_INTEN_TXSTARTED_Disabled (0UL) /*!< Disable */ +#define TWIS_INTEN_TXSTARTED_Enabled (1UL) /*!< Enable */ + +/* Bit 19 : Enable or disable interrupt for RXSTARTED event */ +#define TWIS_INTEN_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define TWIS_INTEN_RXSTARTED_Msk (0x1UL << TWIS_INTEN_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define TWIS_INTEN_RXSTARTED_Disabled (0UL) /*!< Disable */ +#define TWIS_INTEN_RXSTARTED_Enabled (1UL) /*!< Enable */ + +/* Bit 9 : Enable or disable interrupt for ERROR event */ +#define TWIS_INTEN_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define TWIS_INTEN_ERROR_Msk (0x1UL << TWIS_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define TWIS_INTEN_ERROR_Disabled (0UL) /*!< Disable */ +#define TWIS_INTEN_ERROR_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for STOPPED event */ +#define TWIS_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define TWIS_INTEN_STOPPED_Msk (0x1UL << TWIS_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define TWIS_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ +#define TWIS_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ + +/* Register: TWIS_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 26 : Write '1' to enable interrupt for READ event */ +#define TWIS_INTENSET_READ_Pos (26UL) /*!< Position of READ field. */ +#define TWIS_INTENSET_READ_Msk (0x1UL << TWIS_INTENSET_READ_Pos) /*!< Bit mask of READ field. */ +#define TWIS_INTENSET_READ_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENSET_READ_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENSET_READ_Set (1UL) /*!< Enable */ + +/* Bit 25 : Write '1' to enable interrupt for WRITE event */ +#define TWIS_INTENSET_WRITE_Pos (25UL) /*!< Position of WRITE field. */ +#define TWIS_INTENSET_WRITE_Msk (0x1UL << TWIS_INTENSET_WRITE_Pos) /*!< Bit mask of WRITE field. */ +#define TWIS_INTENSET_WRITE_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENSET_WRITE_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENSET_WRITE_Set (1UL) /*!< Enable */ + +/* Bit 20 : Write '1' to enable interrupt for TXSTARTED event */ +#define TWIS_INTENSET_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define TWIS_INTENSET_TXSTARTED_Msk (0x1UL << TWIS_INTENSET_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define TWIS_INTENSET_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENSET_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENSET_TXSTARTED_Set (1UL) /*!< Enable */ + +/* Bit 19 : Write '1' to enable interrupt for RXSTARTED event */ +#define TWIS_INTENSET_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define TWIS_INTENSET_RXSTARTED_Msk (0x1UL << TWIS_INTENSET_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define TWIS_INTENSET_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENSET_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENSET_RXSTARTED_Set (1UL) /*!< Enable */ + +/* Bit 9 : Write '1' to enable interrupt for ERROR event */ +#define TWIS_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define TWIS_INTENSET_ERROR_Msk (0x1UL << TWIS_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define TWIS_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENSET_ERROR_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable interrupt for STOPPED event */ +#define TWIS_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define TWIS_INTENSET_STOPPED_Msk (0x1UL << TWIS_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define TWIS_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Register: TWIS_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 26 : Write '1' to disable interrupt for READ event */ +#define TWIS_INTENCLR_READ_Pos (26UL) /*!< Position of READ field. */ +#define TWIS_INTENCLR_READ_Msk (0x1UL << TWIS_INTENCLR_READ_Pos) /*!< Bit mask of READ field. */ +#define TWIS_INTENCLR_READ_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENCLR_READ_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENCLR_READ_Clear (1UL) /*!< Disable */ + +/* Bit 25 : Write '1' to disable interrupt for WRITE event */ +#define TWIS_INTENCLR_WRITE_Pos (25UL) /*!< Position of WRITE field. */ +#define TWIS_INTENCLR_WRITE_Msk (0x1UL << TWIS_INTENCLR_WRITE_Pos) /*!< Bit mask of WRITE field. */ +#define TWIS_INTENCLR_WRITE_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENCLR_WRITE_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENCLR_WRITE_Clear (1UL) /*!< Disable */ + +/* Bit 20 : Write '1' to disable interrupt for TXSTARTED event */ +#define TWIS_INTENCLR_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define TWIS_INTENCLR_TXSTARTED_Msk (0x1UL << TWIS_INTENCLR_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define TWIS_INTENCLR_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENCLR_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENCLR_TXSTARTED_Clear (1UL) /*!< Disable */ + +/* Bit 19 : Write '1' to disable interrupt for RXSTARTED event */ +#define TWIS_INTENCLR_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define TWIS_INTENCLR_RXSTARTED_Msk (0x1UL << TWIS_INTENCLR_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define TWIS_INTENCLR_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENCLR_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENCLR_RXSTARTED_Clear (1UL) /*!< Disable */ + +/* Bit 9 : Write '1' to disable interrupt for ERROR event */ +#define TWIS_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define TWIS_INTENCLR_ERROR_Msk (0x1UL << TWIS_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define TWIS_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable interrupt for STOPPED event */ +#define TWIS_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define TWIS_INTENCLR_STOPPED_Msk (0x1UL << TWIS_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define TWIS_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Register: TWIS_ERRORSRC */ +/* Description: Error source */ + +/* Bit 3 : TX buffer over-read detected, and prevented */ +#define TWIS_ERRORSRC_OVERREAD_Pos (3UL) /*!< Position of OVERREAD field. */ +#define TWIS_ERRORSRC_OVERREAD_Msk (0x1UL << TWIS_ERRORSRC_OVERREAD_Pos) /*!< Bit mask of OVERREAD field. */ +#define TWIS_ERRORSRC_OVERREAD_NotDetected (0UL) /*!< Error did not occur */ +#define TWIS_ERRORSRC_OVERREAD_Detected (1UL) /*!< Error occurred */ + +/* Bit 2 : NACK sent after receiving a data byte */ +#define TWIS_ERRORSRC_DNACK_Pos (2UL) /*!< Position of DNACK field. */ +#define TWIS_ERRORSRC_DNACK_Msk (0x1UL << TWIS_ERRORSRC_DNACK_Pos) /*!< Bit mask of DNACK field. */ +#define TWIS_ERRORSRC_DNACK_NotReceived (0UL) /*!< Error did not occur */ +#define TWIS_ERRORSRC_DNACK_Received (1UL) /*!< Error occurred */ + +/* Bit 0 : RX buffer overflow detected, and prevented */ +#define TWIS_ERRORSRC_OVERFLOW_Pos (0UL) /*!< Position of OVERFLOW field. */ +#define TWIS_ERRORSRC_OVERFLOW_Msk (0x1UL << TWIS_ERRORSRC_OVERFLOW_Pos) /*!< Bit mask of OVERFLOW field. */ +#define TWIS_ERRORSRC_OVERFLOW_NotDetected (0UL) /*!< Error did not occur */ +#define TWIS_ERRORSRC_OVERFLOW_Detected (1UL) /*!< Error occurred */ + +/* Register: TWIS_MATCH */ +/* Description: Status register indicating which address had a match */ + +/* Bit 0 : Which of the addresses in {ADDRESS} matched the incoming address */ +#define TWIS_MATCH_MATCH_Pos (0UL) /*!< Position of MATCH field. */ +#define TWIS_MATCH_MATCH_Msk (0x1UL << TWIS_MATCH_MATCH_Pos) /*!< Bit mask of MATCH field. */ + +/* Register: TWIS_ENABLE */ +/* Description: Enable TWIS */ + +/* Bits 3..0 : Enable or disable TWIS */ +#define TWIS_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define TWIS_ENABLE_ENABLE_Msk (0xFUL << TWIS_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define TWIS_ENABLE_ENABLE_Disabled (0UL) /*!< Disable TWIS */ +#define TWIS_ENABLE_ENABLE_Enabled (9UL) /*!< Enable TWIS */ + +/* Register: TWIS_PSEL_SCL */ +/* Description: Pin select for SCL signal */ + +/* Bit 31 : Connection */ +#define TWIS_PSEL_SCL_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define TWIS_PSEL_SCL_CONNECT_Msk (0x1UL << TWIS_PSEL_SCL_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define TWIS_PSEL_SCL_CONNECT_Connected (0UL) /*!< Connect */ +#define TWIS_PSEL_SCL_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define TWIS_PSEL_SCL_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define TWIS_PSEL_SCL_PORT_Msk (0x1UL << TWIS_PSEL_SCL_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define TWIS_PSEL_SCL_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define TWIS_PSEL_SCL_PIN_Msk (0x1FUL << TWIS_PSEL_SCL_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: TWIS_PSEL_SDA */ +/* Description: Pin select for SDA signal */ + +/* Bit 31 : Connection */ +#define TWIS_PSEL_SDA_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define TWIS_PSEL_SDA_CONNECT_Msk (0x1UL << TWIS_PSEL_SDA_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define TWIS_PSEL_SDA_CONNECT_Connected (0UL) /*!< Connect */ +#define TWIS_PSEL_SDA_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define TWIS_PSEL_SDA_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define TWIS_PSEL_SDA_PORT_Msk (0x1UL << TWIS_PSEL_SDA_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define TWIS_PSEL_SDA_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define TWIS_PSEL_SDA_PIN_Msk (0x1FUL << TWIS_PSEL_SDA_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: TWIS_RXD_PTR */ +/* Description: RXD Data pointer */ + +/* Bits 31..0 : RXD Data pointer */ +#define TWIS_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define TWIS_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIS_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: TWIS_RXD_MAXCNT */ +/* Description: Maximum number of bytes in RXD buffer */ + +/* Bits 15..0 : Maximum number of bytes in RXD buffer */ +#define TWIS_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define TWIS_RXD_MAXCNT_MAXCNT_Msk (0xFFFFUL << TWIS_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: TWIS_RXD_AMOUNT */ +/* Description: Number of bytes transferred in the last RXD transaction */ + +/* Bits 15..0 : Number of bytes transferred in the last RXD transaction */ +#define TWIS_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define TWIS_RXD_AMOUNT_AMOUNT_Msk (0xFFFFUL << TWIS_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: TWIS_TXD_PTR */ +/* Description: TXD Data pointer */ + +/* Bits 31..0 : TXD Data pointer */ +#define TWIS_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define TWIS_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIS_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: TWIS_TXD_MAXCNT */ +/* Description: Maximum number of bytes in TXD buffer */ + +/* Bits 15..0 : Maximum number of bytes in TXD buffer */ +#define TWIS_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define TWIS_TXD_MAXCNT_MAXCNT_Msk (0xFFFFUL << TWIS_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: TWIS_TXD_AMOUNT */ +/* Description: Number of bytes transferred in the last TXD transaction */ + +/* Bits 15..0 : Number of bytes transferred in the last TXD transaction */ +#define TWIS_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define TWIS_TXD_AMOUNT_AMOUNT_Msk (0xFFFFUL << TWIS_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: TWIS_ADDRESS */ +/* Description: Description collection[n]: TWI slave address n */ + +/* Bits 6..0 : TWI slave address */ +#define TWIS_ADDRESS_ADDRESS_Pos (0UL) /*!< Position of ADDRESS field. */ +#define TWIS_ADDRESS_ADDRESS_Msk (0x7FUL << TWIS_ADDRESS_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ + +/* Register: TWIS_CONFIG */ +/* Description: Configuration register for the address match mechanism */ + +/* Bit 1 : Enable or disable address matching on ADDRESS[1] */ +#define TWIS_CONFIG_ADDRESS1_Pos (1UL) /*!< Position of ADDRESS1 field. */ +#define TWIS_CONFIG_ADDRESS1_Msk (0x1UL << TWIS_CONFIG_ADDRESS1_Pos) /*!< Bit mask of ADDRESS1 field. */ +#define TWIS_CONFIG_ADDRESS1_Disabled (0UL) /*!< Disabled */ +#define TWIS_CONFIG_ADDRESS1_Enabled (1UL) /*!< Enabled */ + +/* Bit 0 : Enable or disable address matching on ADDRESS[0] */ +#define TWIS_CONFIG_ADDRESS0_Pos (0UL) /*!< Position of ADDRESS0 field. */ +#define TWIS_CONFIG_ADDRESS0_Msk (0x1UL << TWIS_CONFIG_ADDRESS0_Pos) /*!< Bit mask of ADDRESS0 field. */ +#define TWIS_CONFIG_ADDRESS0_Disabled (0UL) /*!< Disabled */ +#define TWIS_CONFIG_ADDRESS0_Enabled (1UL) /*!< Enabled */ + +/* Register: TWIS_ORC */ +/* Description: Over-read character. Character sent out in case of an over-read of the transmit buffer. */ + +/* Bits 7..0 : Over-read character. Character sent out in case of an over-read of the transmit buffer. */ +#define TWIS_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */ +#define TWIS_ORC_ORC_Msk (0xFFUL << TWIS_ORC_ORC_Pos) /*!< Bit mask of ORC field. */ + + +/* Peripheral: UART */ +/* Description: Universal Asynchronous Receiver/Transmitter */ + +/* Register: UART_TASKS_STARTRX */ +/* Description: Start UART receiver */ + +/* Bit 0 : */ +#define UART_TASKS_STARTRX_TASKS_STARTRX_Pos (0UL) /*!< Position of TASKS_STARTRX field. */ +#define UART_TASKS_STARTRX_TASKS_STARTRX_Msk (0x1UL << UART_TASKS_STARTRX_TASKS_STARTRX_Pos) /*!< Bit mask of TASKS_STARTRX field. */ + +/* Register: UART_TASKS_STOPRX */ +/* Description: Stop UART receiver */ + +/* Bit 0 : */ +#define UART_TASKS_STOPRX_TASKS_STOPRX_Pos (0UL) /*!< Position of TASKS_STOPRX field. */ +#define UART_TASKS_STOPRX_TASKS_STOPRX_Msk (0x1UL << UART_TASKS_STOPRX_TASKS_STOPRX_Pos) /*!< Bit mask of TASKS_STOPRX field. */ + +/* Register: UART_TASKS_STARTTX */ +/* Description: Start UART transmitter */ + +/* Bit 0 : */ +#define UART_TASKS_STARTTX_TASKS_STARTTX_Pos (0UL) /*!< Position of TASKS_STARTTX field. */ +#define UART_TASKS_STARTTX_TASKS_STARTTX_Msk (0x1UL << UART_TASKS_STARTTX_TASKS_STARTTX_Pos) /*!< Bit mask of TASKS_STARTTX field. */ + +/* Register: UART_TASKS_STOPTX */ +/* Description: Stop UART transmitter */ + +/* Bit 0 : */ +#define UART_TASKS_STOPTX_TASKS_STOPTX_Pos (0UL) /*!< Position of TASKS_STOPTX field. */ +#define UART_TASKS_STOPTX_TASKS_STOPTX_Msk (0x1UL << UART_TASKS_STOPTX_TASKS_STOPTX_Pos) /*!< Bit mask of TASKS_STOPTX field. */ + +/* Register: UART_TASKS_SUSPEND */ +/* Description: Suspend UART */ + +/* Bit 0 : */ +#define UART_TASKS_SUSPEND_TASKS_SUSPEND_Pos (0UL) /*!< Position of TASKS_SUSPEND field. */ +#define UART_TASKS_SUSPEND_TASKS_SUSPEND_Msk (0x1UL << UART_TASKS_SUSPEND_TASKS_SUSPEND_Pos) /*!< Bit mask of TASKS_SUSPEND field. */ + +/* Register: UART_EVENTS_CTS */ +/* Description: CTS is activated (set low). Clear To Send. */ + +/* Bit 0 : */ +#define UART_EVENTS_CTS_EVENTS_CTS_Pos (0UL) /*!< Position of EVENTS_CTS field. */ +#define UART_EVENTS_CTS_EVENTS_CTS_Msk (0x1UL << UART_EVENTS_CTS_EVENTS_CTS_Pos) /*!< Bit mask of EVENTS_CTS field. */ + +/* Register: UART_EVENTS_NCTS */ +/* Description: CTS is deactivated (set high). Not Clear To Send. */ + +/* Bit 0 : */ +#define UART_EVENTS_NCTS_EVENTS_NCTS_Pos (0UL) /*!< Position of EVENTS_NCTS field. */ +#define UART_EVENTS_NCTS_EVENTS_NCTS_Msk (0x1UL << UART_EVENTS_NCTS_EVENTS_NCTS_Pos) /*!< Bit mask of EVENTS_NCTS field. */ + +/* Register: UART_EVENTS_RXDRDY */ +/* Description: Data received in RXD */ + +/* Bit 0 : */ +#define UART_EVENTS_RXDRDY_EVENTS_RXDRDY_Pos (0UL) /*!< Position of EVENTS_RXDRDY field. */ +#define UART_EVENTS_RXDRDY_EVENTS_RXDRDY_Msk (0x1UL << UART_EVENTS_RXDRDY_EVENTS_RXDRDY_Pos) /*!< Bit mask of EVENTS_RXDRDY field. */ + +/* Register: UART_EVENTS_TXDRDY */ +/* Description: Data sent from TXD */ + +/* Bit 0 : */ +#define UART_EVENTS_TXDRDY_EVENTS_TXDRDY_Pos (0UL) /*!< Position of EVENTS_TXDRDY field. */ +#define UART_EVENTS_TXDRDY_EVENTS_TXDRDY_Msk (0x1UL << UART_EVENTS_TXDRDY_EVENTS_TXDRDY_Pos) /*!< Bit mask of EVENTS_TXDRDY field. */ + +/* Register: UART_EVENTS_ERROR */ +/* Description: Error detected */ + +/* Bit 0 : */ +#define UART_EVENTS_ERROR_EVENTS_ERROR_Pos (0UL) /*!< Position of EVENTS_ERROR field. */ +#define UART_EVENTS_ERROR_EVENTS_ERROR_Msk (0x1UL << UART_EVENTS_ERROR_EVENTS_ERROR_Pos) /*!< Bit mask of EVENTS_ERROR field. */ + +/* Register: UART_EVENTS_RXTO */ +/* Description: Receiver timeout */ + +/* Bit 0 : */ +#define UART_EVENTS_RXTO_EVENTS_RXTO_Pos (0UL) /*!< Position of EVENTS_RXTO field. */ +#define UART_EVENTS_RXTO_EVENTS_RXTO_Msk (0x1UL << UART_EVENTS_RXTO_EVENTS_RXTO_Pos) /*!< Bit mask of EVENTS_RXTO field. */ + +/* Register: UART_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 4 : Shortcut between NCTS event and STOPRX task */ +#define UART_SHORTS_NCTS_STOPRX_Pos (4UL) /*!< Position of NCTS_STOPRX field. */ +#define UART_SHORTS_NCTS_STOPRX_Msk (0x1UL << UART_SHORTS_NCTS_STOPRX_Pos) /*!< Bit mask of NCTS_STOPRX field. */ +#define UART_SHORTS_NCTS_STOPRX_Disabled (0UL) /*!< Disable shortcut */ +#define UART_SHORTS_NCTS_STOPRX_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 3 : Shortcut between CTS event and STARTRX task */ +#define UART_SHORTS_CTS_STARTRX_Pos (3UL) /*!< Position of CTS_STARTRX field. */ +#define UART_SHORTS_CTS_STARTRX_Msk (0x1UL << UART_SHORTS_CTS_STARTRX_Pos) /*!< Bit mask of CTS_STARTRX field. */ +#define UART_SHORTS_CTS_STARTRX_Disabled (0UL) /*!< Disable shortcut */ +#define UART_SHORTS_CTS_STARTRX_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: UART_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 17 : Write '1' to enable interrupt for RXTO event */ +#define UART_INTENSET_RXTO_Pos (17UL) /*!< Position of RXTO field. */ +#define UART_INTENSET_RXTO_Msk (0x1UL << UART_INTENSET_RXTO_Pos) /*!< Bit mask of RXTO field. */ +#define UART_INTENSET_RXTO_Disabled (0UL) /*!< Read: Disabled */ +#define UART_INTENSET_RXTO_Enabled (1UL) /*!< Read: Enabled */ +#define UART_INTENSET_RXTO_Set (1UL) /*!< Enable */ + +/* Bit 9 : Write '1' to enable interrupt for ERROR event */ +#define UART_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define UART_INTENSET_ERROR_Msk (0x1UL << UART_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define UART_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define UART_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define UART_INTENSET_ERROR_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to enable interrupt for TXDRDY event */ +#define UART_INTENSET_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ +#define UART_INTENSET_TXDRDY_Msk (0x1UL << UART_INTENSET_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ +#define UART_INTENSET_TXDRDY_Disabled (0UL) /*!< Read: Disabled */ +#define UART_INTENSET_TXDRDY_Enabled (1UL) /*!< Read: Enabled */ +#define UART_INTENSET_TXDRDY_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to enable interrupt for RXDRDY event */ +#define UART_INTENSET_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ +#define UART_INTENSET_RXDRDY_Msk (0x1UL << UART_INTENSET_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ +#define UART_INTENSET_RXDRDY_Disabled (0UL) /*!< Read: Disabled */ +#define UART_INTENSET_RXDRDY_Enabled (1UL) /*!< Read: Enabled */ +#define UART_INTENSET_RXDRDY_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable interrupt for NCTS event */ +#define UART_INTENSET_NCTS_Pos (1UL) /*!< Position of NCTS field. */ +#define UART_INTENSET_NCTS_Msk (0x1UL << UART_INTENSET_NCTS_Pos) /*!< Bit mask of NCTS field. */ +#define UART_INTENSET_NCTS_Disabled (0UL) /*!< Read: Disabled */ +#define UART_INTENSET_NCTS_Enabled (1UL) /*!< Read: Enabled */ +#define UART_INTENSET_NCTS_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to enable interrupt for CTS event */ +#define UART_INTENSET_CTS_Pos (0UL) /*!< Position of CTS field. */ +#define UART_INTENSET_CTS_Msk (0x1UL << UART_INTENSET_CTS_Pos) /*!< Bit mask of CTS field. */ +#define UART_INTENSET_CTS_Disabled (0UL) /*!< Read: Disabled */ +#define UART_INTENSET_CTS_Enabled (1UL) /*!< Read: Enabled */ +#define UART_INTENSET_CTS_Set (1UL) /*!< Enable */ + +/* Register: UART_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 17 : Write '1' to disable interrupt for RXTO event */ +#define UART_INTENCLR_RXTO_Pos (17UL) /*!< Position of RXTO field. */ +#define UART_INTENCLR_RXTO_Msk (0x1UL << UART_INTENCLR_RXTO_Pos) /*!< Bit mask of RXTO field. */ +#define UART_INTENCLR_RXTO_Disabled (0UL) /*!< Read: Disabled */ +#define UART_INTENCLR_RXTO_Enabled (1UL) /*!< Read: Enabled */ +#define UART_INTENCLR_RXTO_Clear (1UL) /*!< Disable */ + +/* Bit 9 : Write '1' to disable interrupt for ERROR event */ +#define UART_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define UART_INTENCLR_ERROR_Msk (0x1UL << UART_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define UART_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define UART_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define UART_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to disable interrupt for TXDRDY event */ +#define UART_INTENCLR_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ +#define UART_INTENCLR_TXDRDY_Msk (0x1UL << UART_INTENCLR_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ +#define UART_INTENCLR_TXDRDY_Disabled (0UL) /*!< Read: Disabled */ +#define UART_INTENCLR_TXDRDY_Enabled (1UL) /*!< Read: Enabled */ +#define UART_INTENCLR_TXDRDY_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to disable interrupt for RXDRDY event */ +#define UART_INTENCLR_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ +#define UART_INTENCLR_RXDRDY_Msk (0x1UL << UART_INTENCLR_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ +#define UART_INTENCLR_RXDRDY_Disabled (0UL) /*!< Read: Disabled */ +#define UART_INTENCLR_RXDRDY_Enabled (1UL) /*!< Read: Enabled */ +#define UART_INTENCLR_RXDRDY_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable interrupt for NCTS event */ +#define UART_INTENCLR_NCTS_Pos (1UL) /*!< Position of NCTS field. */ +#define UART_INTENCLR_NCTS_Msk (0x1UL << UART_INTENCLR_NCTS_Pos) /*!< Bit mask of NCTS field. */ +#define UART_INTENCLR_NCTS_Disabled (0UL) /*!< Read: Disabled */ +#define UART_INTENCLR_NCTS_Enabled (1UL) /*!< Read: Enabled */ +#define UART_INTENCLR_NCTS_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to disable interrupt for CTS event */ +#define UART_INTENCLR_CTS_Pos (0UL) /*!< Position of CTS field. */ +#define UART_INTENCLR_CTS_Msk (0x1UL << UART_INTENCLR_CTS_Pos) /*!< Bit mask of CTS field. */ +#define UART_INTENCLR_CTS_Disabled (0UL) /*!< Read: Disabled */ +#define UART_INTENCLR_CTS_Enabled (1UL) /*!< Read: Enabled */ +#define UART_INTENCLR_CTS_Clear (1UL) /*!< Disable */ + +/* Register: UART_ERRORSRC */ +/* Description: Error source */ + +/* Bit 3 : Break condition */ +#define UART_ERRORSRC_BREAK_Pos (3UL) /*!< Position of BREAK field. */ +#define UART_ERRORSRC_BREAK_Msk (0x1UL << UART_ERRORSRC_BREAK_Pos) /*!< Bit mask of BREAK field. */ +#define UART_ERRORSRC_BREAK_NotPresent (0UL) /*!< Read: error not present */ +#define UART_ERRORSRC_BREAK_Present (1UL) /*!< Read: error present */ + +/* Bit 2 : Framing error occurred */ +#define UART_ERRORSRC_FRAMING_Pos (2UL) /*!< Position of FRAMING field. */ +#define UART_ERRORSRC_FRAMING_Msk (0x1UL << UART_ERRORSRC_FRAMING_Pos) /*!< Bit mask of FRAMING field. */ +#define UART_ERRORSRC_FRAMING_NotPresent (0UL) /*!< Read: error not present */ +#define UART_ERRORSRC_FRAMING_Present (1UL) /*!< Read: error present */ + +/* Bit 1 : Parity error */ +#define UART_ERRORSRC_PARITY_Pos (1UL) /*!< Position of PARITY field. */ +#define UART_ERRORSRC_PARITY_Msk (0x1UL << UART_ERRORSRC_PARITY_Pos) /*!< Bit mask of PARITY field. */ +#define UART_ERRORSRC_PARITY_NotPresent (0UL) /*!< Read: error not present */ +#define UART_ERRORSRC_PARITY_Present (1UL) /*!< Read: error present */ + +/* Bit 0 : Overrun error */ +#define UART_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */ +#define UART_ERRORSRC_OVERRUN_Msk (0x1UL << UART_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ +#define UART_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: error not present */ +#define UART_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: error present */ + +/* Register: UART_ENABLE */ +/* Description: Enable UART */ + +/* Bits 3..0 : Enable or disable UART */ +#define UART_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define UART_ENABLE_ENABLE_Msk (0xFUL << UART_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define UART_ENABLE_ENABLE_Disabled (0UL) /*!< Disable UART */ +#define UART_ENABLE_ENABLE_Enabled (4UL) /*!< Enable UART */ + +/* Register: UART_PSEL_RTS */ +/* Description: Pin select for RTS */ + +/* Bit 31 : Connection */ +#define UART_PSEL_RTS_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define UART_PSEL_RTS_CONNECT_Msk (0x1UL << UART_PSEL_RTS_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define UART_PSEL_RTS_CONNECT_Connected (0UL) /*!< Connect */ +#define UART_PSEL_RTS_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define UART_PSEL_RTS_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define UART_PSEL_RTS_PORT_Msk (0x1UL << UART_PSEL_RTS_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define UART_PSEL_RTS_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define UART_PSEL_RTS_PIN_Msk (0x1FUL << UART_PSEL_RTS_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: UART_PSEL_TXD */ +/* Description: Pin select for TXD */ + +/* Bit 31 : Connection */ +#define UART_PSEL_TXD_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define UART_PSEL_TXD_CONNECT_Msk (0x1UL << UART_PSEL_TXD_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define UART_PSEL_TXD_CONNECT_Connected (0UL) /*!< Connect */ +#define UART_PSEL_TXD_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define UART_PSEL_TXD_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define UART_PSEL_TXD_PORT_Msk (0x1UL << UART_PSEL_TXD_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define UART_PSEL_TXD_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define UART_PSEL_TXD_PIN_Msk (0x1FUL << UART_PSEL_TXD_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: UART_PSEL_CTS */ +/* Description: Pin select for CTS */ + +/* Bit 31 : Connection */ +#define UART_PSEL_CTS_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define UART_PSEL_CTS_CONNECT_Msk (0x1UL << UART_PSEL_CTS_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define UART_PSEL_CTS_CONNECT_Connected (0UL) /*!< Connect */ +#define UART_PSEL_CTS_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define UART_PSEL_CTS_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define UART_PSEL_CTS_PORT_Msk (0x1UL << UART_PSEL_CTS_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define UART_PSEL_CTS_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define UART_PSEL_CTS_PIN_Msk (0x1FUL << UART_PSEL_CTS_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: UART_PSEL_RXD */ +/* Description: Pin select for RXD */ + +/* Bit 31 : Connection */ +#define UART_PSEL_RXD_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define UART_PSEL_RXD_CONNECT_Msk (0x1UL << UART_PSEL_RXD_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define UART_PSEL_RXD_CONNECT_Connected (0UL) /*!< Connect */ +#define UART_PSEL_RXD_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define UART_PSEL_RXD_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define UART_PSEL_RXD_PORT_Msk (0x1UL << UART_PSEL_RXD_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define UART_PSEL_RXD_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define UART_PSEL_RXD_PIN_Msk (0x1FUL << UART_PSEL_RXD_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: UART_RXD */ +/* Description: RXD register */ + +/* Bits 7..0 : RX data received in previous transfers, double buffered */ +#define UART_RXD_RXD_Pos (0UL) /*!< Position of RXD field. */ +#define UART_RXD_RXD_Msk (0xFFUL << UART_RXD_RXD_Pos) /*!< Bit mask of RXD field. */ + +/* Register: UART_TXD */ +/* Description: TXD register */ + +/* Bits 7..0 : TX data to be transferred */ +#define UART_TXD_TXD_Pos (0UL) /*!< Position of TXD field. */ +#define UART_TXD_TXD_Msk (0xFFUL << UART_TXD_TXD_Pos) /*!< Bit mask of TXD field. */ + +/* Register: UART_BAUDRATE */ +/* Description: Baud rate. Accuracy depends on the HFCLK source selected. */ + +/* Bits 31..0 : Baud rate */ +#define UART_BAUDRATE_BAUDRATE_Pos (0UL) /*!< Position of BAUDRATE field. */ +#define UART_BAUDRATE_BAUDRATE_Msk (0xFFFFFFFFUL << UART_BAUDRATE_BAUDRATE_Pos) /*!< Bit mask of BAUDRATE field. */ +#define UART_BAUDRATE_BAUDRATE_Baud1200 (0x0004F000UL) /*!< 1200 baud (actual rate: 1205) */ +#define UART_BAUDRATE_BAUDRATE_Baud2400 (0x0009D000UL) /*!< 2400 baud (actual rate: 2396) */ +#define UART_BAUDRATE_BAUDRATE_Baud4800 (0x0013B000UL) /*!< 4800 baud (actual rate: 4808) */ +#define UART_BAUDRATE_BAUDRATE_Baud9600 (0x00275000UL) /*!< 9600 baud (actual rate: 9598) */ +#define UART_BAUDRATE_BAUDRATE_Baud14400 (0x003B0000UL) /*!< 14400 baud (actual rate: 14414) */ +#define UART_BAUDRATE_BAUDRATE_Baud19200 (0x004EA000UL) /*!< 19200 baud (actual rate: 19208) */ +#define UART_BAUDRATE_BAUDRATE_Baud28800 (0x0075F000UL) /*!< 28800 baud (actual rate: 28829) */ +#define UART_BAUDRATE_BAUDRATE_Baud31250 (0x00800000UL) /*!< 31250 baud */ +#define UART_BAUDRATE_BAUDRATE_Baud38400 (0x009D5000UL) /*!< 38400 baud (actual rate: 38462) */ +#define UART_BAUDRATE_BAUDRATE_Baud56000 (0x00E50000UL) /*!< 56000 baud (actual rate: 55944) */ +#define UART_BAUDRATE_BAUDRATE_Baud57600 (0x00EBF000UL) /*!< 57600 baud (actual rate: 57762) */ +#define UART_BAUDRATE_BAUDRATE_Baud76800 (0x013A9000UL) /*!< 76800 baud (actual rate: 76923) */ +#define UART_BAUDRATE_BAUDRATE_Baud115200 (0x01D7E000UL) /*!< 115200 baud (actual rate: 115942) */ +#define UART_BAUDRATE_BAUDRATE_Baud230400 (0x03AFB000UL) /*!< 230400 baud (actual rate: 231884) */ +#define UART_BAUDRATE_BAUDRATE_Baud250000 (0x04000000UL) /*!< 250000 baud */ +#define UART_BAUDRATE_BAUDRATE_Baud460800 (0x075F7000UL) /*!< 460800 baud (actual rate: 470588) */ +#define UART_BAUDRATE_BAUDRATE_Baud921600 (0x0EBED000UL) /*!< 921600 baud (actual rate: 941176) */ +#define UART_BAUDRATE_BAUDRATE_Baud1M (0x10000000UL) /*!< 1Mega baud */ + +/* Register: UART_CONFIG */ +/* Description: Configuration of parity and hardware flow control */ + +/* Bits 3..1 : Parity */ +#define UART_CONFIG_PARITY_Pos (1UL) /*!< Position of PARITY field. */ +#define UART_CONFIG_PARITY_Msk (0x7UL << UART_CONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */ +#define UART_CONFIG_PARITY_Excluded (0x0UL) /*!< Exclude parity bit */ +#define UART_CONFIG_PARITY_Included (0x7UL) /*!< Include parity bit */ + +/* Bit 0 : Hardware flow control */ +#define UART_CONFIG_HWFC_Pos (0UL) /*!< Position of HWFC field. */ +#define UART_CONFIG_HWFC_Msk (0x1UL << UART_CONFIG_HWFC_Pos) /*!< Bit mask of HWFC field. */ +#define UART_CONFIG_HWFC_Disabled (0UL) /*!< Disabled */ +#define UART_CONFIG_HWFC_Enabled (1UL) /*!< Enabled */ + + +/* Peripheral: UARTE */ +/* Description: UART with EasyDMA 0 */ + +/* Register: UARTE_TASKS_STARTRX */ +/* Description: Start UART receiver */ + +/* Bit 0 : */ +#define UARTE_TASKS_STARTRX_TASKS_STARTRX_Pos (0UL) /*!< Position of TASKS_STARTRX field. */ +#define UARTE_TASKS_STARTRX_TASKS_STARTRX_Msk (0x1UL << UARTE_TASKS_STARTRX_TASKS_STARTRX_Pos) /*!< Bit mask of TASKS_STARTRX field. */ + +/* Register: UARTE_TASKS_STOPRX */ +/* Description: Stop UART receiver */ + +/* Bit 0 : */ +#define UARTE_TASKS_STOPRX_TASKS_STOPRX_Pos (0UL) /*!< Position of TASKS_STOPRX field. */ +#define UARTE_TASKS_STOPRX_TASKS_STOPRX_Msk (0x1UL << UARTE_TASKS_STOPRX_TASKS_STOPRX_Pos) /*!< Bit mask of TASKS_STOPRX field. */ + +/* Register: UARTE_TASKS_STARTTX */ +/* Description: Start UART transmitter */ + +/* Bit 0 : */ +#define UARTE_TASKS_STARTTX_TASKS_STARTTX_Pos (0UL) /*!< Position of TASKS_STARTTX field. */ +#define UARTE_TASKS_STARTTX_TASKS_STARTTX_Msk (0x1UL << UARTE_TASKS_STARTTX_TASKS_STARTTX_Pos) /*!< Bit mask of TASKS_STARTTX field. */ + +/* Register: UARTE_TASKS_STOPTX */ +/* Description: Stop UART transmitter */ + +/* Bit 0 : */ +#define UARTE_TASKS_STOPTX_TASKS_STOPTX_Pos (0UL) /*!< Position of TASKS_STOPTX field. */ +#define UARTE_TASKS_STOPTX_TASKS_STOPTX_Msk (0x1UL << UARTE_TASKS_STOPTX_TASKS_STOPTX_Pos) /*!< Bit mask of TASKS_STOPTX field. */ + +/* Register: UARTE_TASKS_FLUSHRX */ +/* Description: Flush RX FIFO into RX buffer */ + +/* Bit 0 : */ +#define UARTE_TASKS_FLUSHRX_TASKS_FLUSHRX_Pos (0UL) /*!< Position of TASKS_FLUSHRX field. */ +#define UARTE_TASKS_FLUSHRX_TASKS_FLUSHRX_Msk (0x1UL << UARTE_TASKS_FLUSHRX_TASKS_FLUSHRX_Pos) /*!< Bit mask of TASKS_FLUSHRX field. */ + +/* Register: UARTE_EVENTS_CTS */ +/* Description: CTS is activated (set low). Clear To Send. */ + +/* Bit 0 : */ +#define UARTE_EVENTS_CTS_EVENTS_CTS_Pos (0UL) /*!< Position of EVENTS_CTS field. */ +#define UARTE_EVENTS_CTS_EVENTS_CTS_Msk (0x1UL << UARTE_EVENTS_CTS_EVENTS_CTS_Pos) /*!< Bit mask of EVENTS_CTS field. */ + +/* Register: UARTE_EVENTS_NCTS */ +/* Description: CTS is deactivated (set high). Not Clear To Send. */ + +/* Bit 0 : */ +#define UARTE_EVENTS_NCTS_EVENTS_NCTS_Pos (0UL) /*!< Position of EVENTS_NCTS field. */ +#define UARTE_EVENTS_NCTS_EVENTS_NCTS_Msk (0x1UL << UARTE_EVENTS_NCTS_EVENTS_NCTS_Pos) /*!< Bit mask of EVENTS_NCTS field. */ + +/* Register: UARTE_EVENTS_RXDRDY */ +/* Description: Data received in RXD (but potentially not yet transferred to Data RAM) */ + +/* Bit 0 : */ +#define UARTE_EVENTS_RXDRDY_EVENTS_RXDRDY_Pos (0UL) /*!< Position of EVENTS_RXDRDY field. */ +#define UARTE_EVENTS_RXDRDY_EVENTS_RXDRDY_Msk (0x1UL << UARTE_EVENTS_RXDRDY_EVENTS_RXDRDY_Pos) /*!< Bit mask of EVENTS_RXDRDY field. */ + +/* Register: UARTE_EVENTS_ENDRX */ +/* Description: Receive buffer is filled up */ + +/* Bit 0 : */ +#define UARTE_EVENTS_ENDRX_EVENTS_ENDRX_Pos (0UL) /*!< Position of EVENTS_ENDRX field. */ +#define UARTE_EVENTS_ENDRX_EVENTS_ENDRX_Msk (0x1UL << UARTE_EVENTS_ENDRX_EVENTS_ENDRX_Pos) /*!< Bit mask of EVENTS_ENDRX field. */ + +/* Register: UARTE_EVENTS_TXDRDY */ +/* Description: Data sent from TXD */ + +/* Bit 0 : */ +#define UARTE_EVENTS_TXDRDY_EVENTS_TXDRDY_Pos (0UL) /*!< Position of EVENTS_TXDRDY field. */ +#define UARTE_EVENTS_TXDRDY_EVENTS_TXDRDY_Msk (0x1UL << UARTE_EVENTS_TXDRDY_EVENTS_TXDRDY_Pos) /*!< Bit mask of EVENTS_TXDRDY field. */ + +/* Register: UARTE_EVENTS_ENDTX */ +/* Description: Last TX byte transmitted */ + +/* Bit 0 : */ +#define UARTE_EVENTS_ENDTX_EVENTS_ENDTX_Pos (0UL) /*!< Position of EVENTS_ENDTX field. */ +#define UARTE_EVENTS_ENDTX_EVENTS_ENDTX_Msk (0x1UL << UARTE_EVENTS_ENDTX_EVENTS_ENDTX_Pos) /*!< Bit mask of EVENTS_ENDTX field. */ + +/* Register: UARTE_EVENTS_ERROR */ +/* Description: Error detected */ + +/* Bit 0 : */ +#define UARTE_EVENTS_ERROR_EVENTS_ERROR_Pos (0UL) /*!< Position of EVENTS_ERROR field. */ +#define UARTE_EVENTS_ERROR_EVENTS_ERROR_Msk (0x1UL << UARTE_EVENTS_ERROR_EVENTS_ERROR_Pos) /*!< Bit mask of EVENTS_ERROR field. */ + +/* Register: UARTE_EVENTS_RXTO */ +/* Description: Receiver timeout */ + +/* Bit 0 : */ +#define UARTE_EVENTS_RXTO_EVENTS_RXTO_Pos (0UL) /*!< Position of EVENTS_RXTO field. */ +#define UARTE_EVENTS_RXTO_EVENTS_RXTO_Msk (0x1UL << UARTE_EVENTS_RXTO_EVENTS_RXTO_Pos) /*!< Bit mask of EVENTS_RXTO field. */ + +/* Register: UARTE_EVENTS_RXSTARTED */ +/* Description: UART receiver has started */ + +/* Bit 0 : */ +#define UARTE_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos (0UL) /*!< Position of EVENTS_RXSTARTED field. */ +#define UARTE_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Msk (0x1UL << UARTE_EVENTS_RXSTARTED_EVENTS_RXSTARTED_Pos) /*!< Bit mask of EVENTS_RXSTARTED field. */ + +/* Register: UARTE_EVENTS_TXSTARTED */ +/* Description: UART transmitter has started */ + +/* Bit 0 : */ +#define UARTE_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos (0UL) /*!< Position of EVENTS_TXSTARTED field. */ +#define UARTE_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Msk (0x1UL << UARTE_EVENTS_TXSTARTED_EVENTS_TXSTARTED_Pos) /*!< Bit mask of EVENTS_TXSTARTED field. */ + +/* Register: UARTE_EVENTS_TXSTOPPED */ +/* Description: Transmitter stopped */ + +/* Bit 0 : */ +#define UARTE_EVENTS_TXSTOPPED_EVENTS_TXSTOPPED_Pos (0UL) /*!< Position of EVENTS_TXSTOPPED field. */ +#define UARTE_EVENTS_TXSTOPPED_EVENTS_TXSTOPPED_Msk (0x1UL << UARTE_EVENTS_TXSTOPPED_EVENTS_TXSTOPPED_Pos) /*!< Bit mask of EVENTS_TXSTOPPED field. */ + +/* Register: UARTE_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 6 : Shortcut between ENDRX event and STOPRX task */ +#define UARTE_SHORTS_ENDRX_STOPRX_Pos (6UL) /*!< Position of ENDRX_STOPRX field. */ +#define UARTE_SHORTS_ENDRX_STOPRX_Msk (0x1UL << UARTE_SHORTS_ENDRX_STOPRX_Pos) /*!< Bit mask of ENDRX_STOPRX field. */ +#define UARTE_SHORTS_ENDRX_STOPRX_Disabled (0UL) /*!< Disable shortcut */ +#define UARTE_SHORTS_ENDRX_STOPRX_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 5 : Shortcut between ENDRX event and STARTRX task */ +#define UARTE_SHORTS_ENDRX_STARTRX_Pos (5UL) /*!< Position of ENDRX_STARTRX field. */ +#define UARTE_SHORTS_ENDRX_STARTRX_Msk (0x1UL << UARTE_SHORTS_ENDRX_STARTRX_Pos) /*!< Bit mask of ENDRX_STARTRX field. */ +#define UARTE_SHORTS_ENDRX_STARTRX_Disabled (0UL) /*!< Disable shortcut */ +#define UARTE_SHORTS_ENDRX_STARTRX_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: UARTE_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 22 : Enable or disable interrupt for TXSTOPPED event */ +#define UARTE_INTEN_TXSTOPPED_Pos (22UL) /*!< Position of TXSTOPPED field. */ +#define UARTE_INTEN_TXSTOPPED_Msk (0x1UL << UARTE_INTEN_TXSTOPPED_Pos) /*!< Bit mask of TXSTOPPED field. */ +#define UARTE_INTEN_TXSTOPPED_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_TXSTOPPED_Enabled (1UL) /*!< Enable */ + +/* Bit 20 : Enable or disable interrupt for TXSTARTED event */ +#define UARTE_INTEN_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define UARTE_INTEN_TXSTARTED_Msk (0x1UL << UARTE_INTEN_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define UARTE_INTEN_TXSTARTED_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_TXSTARTED_Enabled (1UL) /*!< Enable */ + +/* Bit 19 : Enable or disable interrupt for RXSTARTED event */ +#define UARTE_INTEN_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define UARTE_INTEN_RXSTARTED_Msk (0x1UL << UARTE_INTEN_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define UARTE_INTEN_RXSTARTED_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_RXSTARTED_Enabled (1UL) /*!< Enable */ + +/* Bit 17 : Enable or disable interrupt for RXTO event */ +#define UARTE_INTEN_RXTO_Pos (17UL) /*!< Position of RXTO field. */ +#define UARTE_INTEN_RXTO_Msk (0x1UL << UARTE_INTEN_RXTO_Pos) /*!< Bit mask of RXTO field. */ +#define UARTE_INTEN_RXTO_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_RXTO_Enabled (1UL) /*!< Enable */ + +/* Bit 9 : Enable or disable interrupt for ERROR event */ +#define UARTE_INTEN_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define UARTE_INTEN_ERROR_Msk (0x1UL << UARTE_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define UARTE_INTEN_ERROR_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_ERROR_Enabled (1UL) /*!< Enable */ + +/* Bit 8 : Enable or disable interrupt for ENDTX event */ +#define UARTE_INTEN_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ +#define UARTE_INTEN_ENDTX_Msk (0x1UL << UARTE_INTEN_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ +#define UARTE_INTEN_ENDTX_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_ENDTX_Enabled (1UL) /*!< Enable */ + +/* Bit 7 : Enable or disable interrupt for TXDRDY event */ +#define UARTE_INTEN_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ +#define UARTE_INTEN_TXDRDY_Msk (0x1UL << UARTE_INTEN_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ +#define UARTE_INTEN_TXDRDY_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_TXDRDY_Enabled (1UL) /*!< Enable */ + +/* Bit 4 : Enable or disable interrupt for ENDRX event */ +#define UARTE_INTEN_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ +#define UARTE_INTEN_ENDRX_Msk (0x1UL << UARTE_INTEN_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define UARTE_INTEN_ENDRX_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_ENDRX_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable interrupt for RXDRDY event */ +#define UARTE_INTEN_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ +#define UARTE_INTEN_RXDRDY_Msk (0x1UL << UARTE_INTEN_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ +#define UARTE_INTEN_RXDRDY_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_RXDRDY_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for NCTS event */ +#define UARTE_INTEN_NCTS_Pos (1UL) /*!< Position of NCTS field. */ +#define UARTE_INTEN_NCTS_Msk (0x1UL << UARTE_INTEN_NCTS_Pos) /*!< Bit mask of NCTS field. */ +#define UARTE_INTEN_NCTS_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_NCTS_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable interrupt for CTS event */ +#define UARTE_INTEN_CTS_Pos (0UL) /*!< Position of CTS field. */ +#define UARTE_INTEN_CTS_Msk (0x1UL << UARTE_INTEN_CTS_Pos) /*!< Bit mask of CTS field. */ +#define UARTE_INTEN_CTS_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_CTS_Enabled (1UL) /*!< Enable */ + +/* Register: UARTE_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 22 : Write '1' to enable interrupt for TXSTOPPED event */ +#define UARTE_INTENSET_TXSTOPPED_Pos (22UL) /*!< Position of TXSTOPPED field. */ +#define UARTE_INTENSET_TXSTOPPED_Msk (0x1UL << UARTE_INTENSET_TXSTOPPED_Pos) /*!< Bit mask of TXSTOPPED field. */ +#define UARTE_INTENSET_TXSTOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_TXSTOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_TXSTOPPED_Set (1UL) /*!< Enable */ + +/* Bit 20 : Write '1' to enable interrupt for TXSTARTED event */ +#define UARTE_INTENSET_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define UARTE_INTENSET_TXSTARTED_Msk (0x1UL << UARTE_INTENSET_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define UARTE_INTENSET_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_TXSTARTED_Set (1UL) /*!< Enable */ + +/* Bit 19 : Write '1' to enable interrupt for RXSTARTED event */ +#define UARTE_INTENSET_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define UARTE_INTENSET_RXSTARTED_Msk (0x1UL << UARTE_INTENSET_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define UARTE_INTENSET_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_RXSTARTED_Set (1UL) /*!< Enable */ + +/* Bit 17 : Write '1' to enable interrupt for RXTO event */ +#define UARTE_INTENSET_RXTO_Pos (17UL) /*!< Position of RXTO field. */ +#define UARTE_INTENSET_RXTO_Msk (0x1UL << UARTE_INTENSET_RXTO_Pos) /*!< Bit mask of RXTO field. */ +#define UARTE_INTENSET_RXTO_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_RXTO_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_RXTO_Set (1UL) /*!< Enable */ + +/* Bit 9 : Write '1' to enable interrupt for ERROR event */ +#define UARTE_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define UARTE_INTENSET_ERROR_Msk (0x1UL << UARTE_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define UARTE_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_ERROR_Set (1UL) /*!< Enable */ + +/* Bit 8 : Write '1' to enable interrupt for ENDTX event */ +#define UARTE_INTENSET_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ +#define UARTE_INTENSET_ENDTX_Msk (0x1UL << UARTE_INTENSET_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ +#define UARTE_INTENSET_ENDTX_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_ENDTX_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_ENDTX_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to enable interrupt for TXDRDY event */ +#define UARTE_INTENSET_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ +#define UARTE_INTENSET_TXDRDY_Msk (0x1UL << UARTE_INTENSET_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ +#define UARTE_INTENSET_TXDRDY_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_TXDRDY_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_TXDRDY_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to enable interrupt for ENDRX event */ +#define UARTE_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ +#define UARTE_INTENSET_ENDRX_Msk (0x1UL << UARTE_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define UARTE_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_ENDRX_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to enable interrupt for RXDRDY event */ +#define UARTE_INTENSET_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ +#define UARTE_INTENSET_RXDRDY_Msk (0x1UL << UARTE_INTENSET_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ +#define UARTE_INTENSET_RXDRDY_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_RXDRDY_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_RXDRDY_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable interrupt for NCTS event */ +#define UARTE_INTENSET_NCTS_Pos (1UL) /*!< Position of NCTS field. */ +#define UARTE_INTENSET_NCTS_Msk (0x1UL << UARTE_INTENSET_NCTS_Pos) /*!< Bit mask of NCTS field. */ +#define UARTE_INTENSET_NCTS_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_NCTS_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_NCTS_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to enable interrupt for CTS event */ +#define UARTE_INTENSET_CTS_Pos (0UL) /*!< Position of CTS field. */ +#define UARTE_INTENSET_CTS_Msk (0x1UL << UARTE_INTENSET_CTS_Pos) /*!< Bit mask of CTS field. */ +#define UARTE_INTENSET_CTS_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_CTS_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_CTS_Set (1UL) /*!< Enable */ + +/* Register: UARTE_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 22 : Write '1' to disable interrupt for TXSTOPPED event */ +#define UARTE_INTENCLR_TXSTOPPED_Pos (22UL) /*!< Position of TXSTOPPED field. */ +#define UARTE_INTENCLR_TXSTOPPED_Msk (0x1UL << UARTE_INTENCLR_TXSTOPPED_Pos) /*!< Bit mask of TXSTOPPED field. */ +#define UARTE_INTENCLR_TXSTOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_TXSTOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_TXSTOPPED_Clear (1UL) /*!< Disable */ + +/* Bit 20 : Write '1' to disable interrupt for TXSTARTED event */ +#define UARTE_INTENCLR_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define UARTE_INTENCLR_TXSTARTED_Msk (0x1UL << UARTE_INTENCLR_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define UARTE_INTENCLR_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_TXSTARTED_Clear (1UL) /*!< Disable */ + +/* Bit 19 : Write '1' to disable interrupt for RXSTARTED event */ +#define UARTE_INTENCLR_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define UARTE_INTENCLR_RXSTARTED_Msk (0x1UL << UARTE_INTENCLR_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define UARTE_INTENCLR_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_RXSTARTED_Clear (1UL) /*!< Disable */ + +/* Bit 17 : Write '1' to disable interrupt for RXTO event */ +#define UARTE_INTENCLR_RXTO_Pos (17UL) /*!< Position of RXTO field. */ +#define UARTE_INTENCLR_RXTO_Msk (0x1UL << UARTE_INTENCLR_RXTO_Pos) /*!< Bit mask of RXTO field. */ +#define UARTE_INTENCLR_RXTO_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_RXTO_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_RXTO_Clear (1UL) /*!< Disable */ + +/* Bit 9 : Write '1' to disable interrupt for ERROR event */ +#define UARTE_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define UARTE_INTENCLR_ERROR_Msk (0x1UL << UARTE_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define UARTE_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ + +/* Bit 8 : Write '1' to disable interrupt for ENDTX event */ +#define UARTE_INTENCLR_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ +#define UARTE_INTENCLR_ENDTX_Msk (0x1UL << UARTE_INTENCLR_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ +#define UARTE_INTENCLR_ENDTX_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_ENDTX_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_ENDTX_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to disable interrupt for TXDRDY event */ +#define UARTE_INTENCLR_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ +#define UARTE_INTENCLR_TXDRDY_Msk (0x1UL << UARTE_INTENCLR_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ +#define UARTE_INTENCLR_TXDRDY_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_TXDRDY_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_TXDRDY_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to disable interrupt for ENDRX event */ +#define UARTE_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ +#define UARTE_INTENCLR_ENDRX_Msk (0x1UL << UARTE_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define UARTE_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to disable interrupt for RXDRDY event */ +#define UARTE_INTENCLR_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ +#define UARTE_INTENCLR_RXDRDY_Msk (0x1UL << UARTE_INTENCLR_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ +#define UARTE_INTENCLR_RXDRDY_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_RXDRDY_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_RXDRDY_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable interrupt for NCTS event */ +#define UARTE_INTENCLR_NCTS_Pos (1UL) /*!< Position of NCTS field. */ +#define UARTE_INTENCLR_NCTS_Msk (0x1UL << UARTE_INTENCLR_NCTS_Pos) /*!< Bit mask of NCTS field. */ +#define UARTE_INTENCLR_NCTS_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_NCTS_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_NCTS_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to disable interrupt for CTS event */ +#define UARTE_INTENCLR_CTS_Pos (0UL) /*!< Position of CTS field. */ +#define UARTE_INTENCLR_CTS_Msk (0x1UL << UARTE_INTENCLR_CTS_Pos) /*!< Bit mask of CTS field. */ +#define UARTE_INTENCLR_CTS_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_CTS_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_CTS_Clear (1UL) /*!< Disable */ + +/* Register: UARTE_ERRORSRC */ +/* Description: Error source Note : this register is read / write one to clear. */ + +/* Bit 3 : Break condition */ +#define UARTE_ERRORSRC_BREAK_Pos (3UL) /*!< Position of BREAK field. */ +#define UARTE_ERRORSRC_BREAK_Msk (0x1UL << UARTE_ERRORSRC_BREAK_Pos) /*!< Bit mask of BREAK field. */ +#define UARTE_ERRORSRC_BREAK_NotPresent (0UL) /*!< Read: error not present */ +#define UARTE_ERRORSRC_BREAK_Present (1UL) /*!< Read: error present */ + +/* Bit 2 : Framing error occurred */ +#define UARTE_ERRORSRC_FRAMING_Pos (2UL) /*!< Position of FRAMING field. */ +#define UARTE_ERRORSRC_FRAMING_Msk (0x1UL << UARTE_ERRORSRC_FRAMING_Pos) /*!< Bit mask of FRAMING field. */ +#define UARTE_ERRORSRC_FRAMING_NotPresent (0UL) /*!< Read: error not present */ +#define UARTE_ERRORSRC_FRAMING_Present (1UL) /*!< Read: error present */ + +/* Bit 1 : Parity error */ +#define UARTE_ERRORSRC_PARITY_Pos (1UL) /*!< Position of PARITY field. */ +#define UARTE_ERRORSRC_PARITY_Msk (0x1UL << UARTE_ERRORSRC_PARITY_Pos) /*!< Bit mask of PARITY field. */ +#define UARTE_ERRORSRC_PARITY_NotPresent (0UL) /*!< Read: error not present */ +#define UARTE_ERRORSRC_PARITY_Present (1UL) /*!< Read: error present */ + +/* Bit 0 : Overrun error */ +#define UARTE_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */ +#define UARTE_ERRORSRC_OVERRUN_Msk (0x1UL << UARTE_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ +#define UARTE_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: error not present */ +#define UARTE_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: error present */ + +/* Register: UARTE_ENABLE */ +/* Description: Enable UART */ + +/* Bits 3..0 : Enable or disable UARTE */ +#define UARTE_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define UARTE_ENABLE_ENABLE_Msk (0xFUL << UARTE_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define UARTE_ENABLE_ENABLE_Disabled (0UL) /*!< Disable UARTE */ +#define UARTE_ENABLE_ENABLE_Enabled (8UL) /*!< Enable UARTE */ + +/* Register: UARTE_PSEL_RTS */ +/* Description: Pin select for RTS signal */ + +/* Bit 31 : Connection */ +#define UARTE_PSEL_RTS_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define UARTE_PSEL_RTS_CONNECT_Msk (0x1UL << UARTE_PSEL_RTS_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define UARTE_PSEL_RTS_CONNECT_Connected (0UL) /*!< Connect */ +#define UARTE_PSEL_RTS_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define UARTE_PSEL_RTS_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define UARTE_PSEL_RTS_PORT_Msk (0x1UL << UARTE_PSEL_RTS_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define UARTE_PSEL_RTS_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define UARTE_PSEL_RTS_PIN_Msk (0x1FUL << UARTE_PSEL_RTS_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: UARTE_PSEL_TXD */ +/* Description: Pin select for TXD signal */ + +/* Bit 31 : Connection */ +#define UARTE_PSEL_TXD_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define UARTE_PSEL_TXD_CONNECT_Msk (0x1UL << UARTE_PSEL_TXD_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define UARTE_PSEL_TXD_CONNECT_Connected (0UL) /*!< Connect */ +#define UARTE_PSEL_TXD_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define UARTE_PSEL_TXD_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define UARTE_PSEL_TXD_PORT_Msk (0x1UL << UARTE_PSEL_TXD_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define UARTE_PSEL_TXD_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define UARTE_PSEL_TXD_PIN_Msk (0x1FUL << UARTE_PSEL_TXD_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: UARTE_PSEL_CTS */ +/* Description: Pin select for CTS signal */ + +/* Bit 31 : Connection */ +#define UARTE_PSEL_CTS_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define UARTE_PSEL_CTS_CONNECT_Msk (0x1UL << UARTE_PSEL_CTS_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define UARTE_PSEL_CTS_CONNECT_Connected (0UL) /*!< Connect */ +#define UARTE_PSEL_CTS_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define UARTE_PSEL_CTS_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define UARTE_PSEL_CTS_PORT_Msk (0x1UL << UARTE_PSEL_CTS_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define UARTE_PSEL_CTS_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define UARTE_PSEL_CTS_PIN_Msk (0x1FUL << UARTE_PSEL_CTS_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: UARTE_PSEL_RXD */ +/* Description: Pin select for RXD signal */ + +/* Bit 31 : Connection */ +#define UARTE_PSEL_RXD_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define UARTE_PSEL_RXD_CONNECT_Msk (0x1UL << UARTE_PSEL_RXD_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define UARTE_PSEL_RXD_CONNECT_Connected (0UL) /*!< Connect */ +#define UARTE_PSEL_RXD_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number */ +#define UARTE_PSEL_RXD_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define UARTE_PSEL_RXD_PORT_Msk (0x1UL << UARTE_PSEL_RXD_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number */ +#define UARTE_PSEL_RXD_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define UARTE_PSEL_RXD_PIN_Msk (0x1FUL << UARTE_PSEL_RXD_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: UARTE_BAUDRATE */ +/* Description: Baud rate. Accuracy depends on the HFCLK source selected. */ + +/* Bits 31..0 : Baud rate */ +#define UARTE_BAUDRATE_BAUDRATE_Pos (0UL) /*!< Position of BAUDRATE field. */ +#define UARTE_BAUDRATE_BAUDRATE_Msk (0xFFFFFFFFUL << UARTE_BAUDRATE_BAUDRATE_Pos) /*!< Bit mask of BAUDRATE field. */ +#define UARTE_BAUDRATE_BAUDRATE_Baud1200 (0x0004F000UL) /*!< 1200 baud (actual rate: 1205) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud2400 (0x0009D000UL) /*!< 2400 baud (actual rate: 2396) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud4800 (0x0013B000UL) /*!< 4800 baud (actual rate: 4808) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud9600 (0x00275000UL) /*!< 9600 baud (actual rate: 9598) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud14400 (0x003AF000UL) /*!< 14400 baud (actual rate: 14401) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud19200 (0x004EA000UL) /*!< 19200 baud (actual rate: 19208) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud28800 (0x0075C000UL) /*!< 28800 baud (actual rate: 28777) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud31250 (0x00800000UL) /*!< 31250 baud */ +#define UARTE_BAUDRATE_BAUDRATE_Baud38400 (0x009D0000UL) /*!< 38400 baud (actual rate: 38369) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud56000 (0x00E50000UL) /*!< 56000 baud (actual rate: 55944) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud57600 (0x00EB0000UL) /*!< 57600 baud (actual rate: 57554) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud76800 (0x013A9000UL) /*!< 76800 baud (actual rate: 76923) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud115200 (0x01D60000UL) /*!< 115200 baud (actual rate: 115108) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud230400 (0x03B00000UL) /*!< 230400 baud (actual rate: 231884) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud250000 (0x04000000UL) /*!< 250000 baud */ +#define UARTE_BAUDRATE_BAUDRATE_Baud460800 (0x07400000UL) /*!< 460800 baud (actual rate: 457143) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud921600 (0x0F000000UL) /*!< 921600 baud (actual rate: 941176) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud1M (0x10000000UL) /*!< 1Mega baud */ + +/* Register: UARTE_RXD_PTR */ +/* Description: Data pointer */ + +/* Bits 31..0 : Data pointer */ +#define UARTE_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define UARTE_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << UARTE_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: UARTE_RXD_MAXCNT */ +/* Description: Maximum number of bytes in receive buffer */ + +/* Bits 15..0 : Maximum number of bytes in receive buffer */ +#define UARTE_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define UARTE_RXD_MAXCNT_MAXCNT_Msk (0xFFFFUL << UARTE_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: UARTE_RXD_AMOUNT */ +/* Description: Number of bytes transferred in the last transaction */ + +/* Bits 15..0 : Number of bytes transferred in the last transaction */ +#define UARTE_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define UARTE_RXD_AMOUNT_AMOUNT_Msk (0xFFFFUL << UARTE_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: UARTE_TXD_PTR */ +/* Description: Data pointer */ + +/* Bits 31..0 : Data pointer */ +#define UARTE_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define UARTE_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << UARTE_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: UARTE_TXD_MAXCNT */ +/* Description: Maximum number of bytes in transmit buffer */ + +/* Bits 15..0 : Maximum number of bytes in transmit buffer */ +#define UARTE_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define UARTE_TXD_MAXCNT_MAXCNT_Msk (0xFFFFUL << UARTE_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: UARTE_TXD_AMOUNT */ +/* Description: Number of bytes transferred in the last transaction */ + +/* Bits 15..0 : Number of bytes transferred in the last transaction */ +#define UARTE_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define UARTE_TXD_AMOUNT_AMOUNT_Msk (0xFFFFUL << UARTE_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: UARTE_CONFIG */ +/* Description: Configuration of parity and hardware flow control */ + +/* Bit 4 : Stop bits */ +#define UARTE_CONFIG_STOP_Pos (4UL) /*!< Position of STOP field. */ +#define UARTE_CONFIG_STOP_Msk (0x1UL << UARTE_CONFIG_STOP_Pos) /*!< Bit mask of STOP field. */ +#define UARTE_CONFIG_STOP_One (0UL) /*!< One stop bit */ +#define UARTE_CONFIG_STOP_Two (1UL) /*!< Two stop bits */ + +/* Bits 3..1 : Parity */ +#define UARTE_CONFIG_PARITY_Pos (1UL) /*!< Position of PARITY field. */ +#define UARTE_CONFIG_PARITY_Msk (0x7UL << UARTE_CONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */ +#define UARTE_CONFIG_PARITY_Excluded (0x0UL) /*!< Exclude parity bit */ +#define UARTE_CONFIG_PARITY_Included (0x7UL) /*!< Include even parity bit */ + +/* Bit 0 : Hardware flow control */ +#define UARTE_CONFIG_HWFC_Pos (0UL) /*!< Position of HWFC field. */ +#define UARTE_CONFIG_HWFC_Msk (0x1UL << UARTE_CONFIG_HWFC_Pos) /*!< Bit mask of HWFC field. */ +#define UARTE_CONFIG_HWFC_Disabled (0UL) /*!< Disabled */ +#define UARTE_CONFIG_HWFC_Enabled (1UL) /*!< Enabled */ + + +/* Peripheral: UICR */ +/* Description: User information configuration registers */ + +/* Register: UICR_NRFFW */ +/* Description: Description collection[n]: Reserved for Nordic firmware design */ + +/* Bits 31..0 : Reserved for Nordic firmware design */ +#define UICR_NRFFW_NRFFW_Pos (0UL) /*!< Position of NRFFW field. */ +#define UICR_NRFFW_NRFFW_Msk (0xFFFFFFFFUL << UICR_NRFFW_NRFFW_Pos) /*!< Bit mask of NRFFW field. */ + +/* Register: UICR_NRFHW */ +/* Description: Description collection[n]: Reserved for Nordic hardware design */ + +/* Bits 31..0 : Reserved for Nordic hardware design */ +#define UICR_NRFHW_NRFHW_Pos (0UL) /*!< Position of NRFHW field. */ +#define UICR_NRFHW_NRFHW_Msk (0xFFFFFFFFUL << UICR_NRFHW_NRFHW_Pos) /*!< Bit mask of NRFHW field. */ + +/* Register: UICR_CUSTOMER */ +/* Description: Description collection[n]: Reserved for customer */ + +/* Bits 31..0 : Reserved for customer */ +#define UICR_CUSTOMER_CUSTOMER_Pos (0UL) /*!< Position of CUSTOMER field. */ +#define UICR_CUSTOMER_CUSTOMER_Msk (0xFFFFFFFFUL << UICR_CUSTOMER_CUSTOMER_Pos) /*!< Bit mask of CUSTOMER field. */ + +/* Register: UICR_PSELRESET */ +/* Description: Description collection[n]: Mapping of the nRESET function */ + +/* Bit 31 : Connection */ +#define UICR_PSELRESET_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define UICR_PSELRESET_CONNECT_Msk (0x1UL << UICR_PSELRESET_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define UICR_PSELRESET_CONNECT_Connected (0UL) /*!< Connect */ +#define UICR_PSELRESET_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bit 5 : Port number onto which nRESET is exposed */ +#define UICR_PSELRESET_PORT_Pos (5UL) /*!< Position of PORT field. */ +#define UICR_PSELRESET_PORT_Msk (0x1UL << UICR_PSELRESET_PORT_Pos) /*!< Bit mask of PORT field. */ + +/* Bits 4..0 : Pin number of PORT onto which nRESET is exposed */ +#define UICR_PSELRESET_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define UICR_PSELRESET_PIN_Msk (0x1FUL << UICR_PSELRESET_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: UICR_APPROTECT */ +/* Description: Access port protection */ + +/* Bits 7..0 : Enable or disable access port protection. */ +#define UICR_APPROTECT_PALL_Pos (0UL) /*!< Position of PALL field. */ +#define UICR_APPROTECT_PALL_Msk (0xFFUL << UICR_APPROTECT_PALL_Pos) /*!< Bit mask of PALL field. */ +#define UICR_APPROTECT_PALL_Enabled (0x00UL) /*!< Enable */ +#define UICR_APPROTECT_PALL_Disabled (0xFFUL) /*!< Disable */ + +/* Register: UICR_NFCPINS */ +/* Description: Setting of pins dedicated to NFC functionality: NFC antenna or GPIO */ + +/* Bit 0 : Setting of pins dedicated to NFC functionality */ +#define UICR_NFCPINS_PROTECT_Pos (0UL) /*!< Position of PROTECT field. */ +#define UICR_NFCPINS_PROTECT_Msk (0x1UL << UICR_NFCPINS_PROTECT_Pos) /*!< Bit mask of PROTECT field. */ +#define UICR_NFCPINS_PROTECT_Disabled (0UL) /*!< Operation as GPIO pins. Same protection as normal GPIO pins */ +#define UICR_NFCPINS_PROTECT_NFC (1UL) /*!< Operation as NFC antenna pins. Configures the protection for NFC operation */ + +/* Register: UICR_DEBUGCTRL */ +/* Description: Processor debug control */ + +/* Bits 15..8 : Configure CPU flash patch and breakpoint (FPB) unit behavior */ +#define UICR_DEBUGCTRL_CPUFPBEN_Pos (8UL) /*!< Position of CPUFPBEN field. */ +#define UICR_DEBUGCTRL_CPUFPBEN_Msk (0xFFUL << UICR_DEBUGCTRL_CPUFPBEN_Pos) /*!< Bit mask of CPUFPBEN field. */ +#define UICR_DEBUGCTRL_CPUFPBEN_Disabled (0x00UL) /*!< Disable CPU FPB unit. Writes into the FPB registers will be ignored. */ +#define UICR_DEBUGCTRL_CPUFPBEN_Enabled (0xFFUL) /*!< Enable CPU FPB unit (default behavior) */ + +/* Bits 7..0 : Configure CPU non-intrusive debug features */ +#define UICR_DEBUGCTRL_CPUNIDEN_Pos (0UL) /*!< Position of CPUNIDEN field. */ +#define UICR_DEBUGCTRL_CPUNIDEN_Msk (0xFFUL << UICR_DEBUGCTRL_CPUNIDEN_Pos) /*!< Bit mask of CPUNIDEN field. */ +#define UICR_DEBUGCTRL_CPUNIDEN_Disabled (0x00UL) /*!< Disable CPU ITM and ETM functionality */ +#define UICR_DEBUGCTRL_CPUNIDEN_Enabled (0xFFUL) /*!< Enable CPU ITM and ETM functionality (default behavior) */ + +/* Register: UICR_REGOUT0 */ +/* Description: GPIO reference voltage / external output supply voltage in high voltage mode */ + +/* Bits 2..0 : Output voltage from of REG0 regulator stage. The maximum output voltage from this stage is given as VDDH - VEXDIF. */ +#define UICR_REGOUT0_VOUT_Pos (0UL) /*!< Position of VOUT field. */ +#define UICR_REGOUT0_VOUT_Msk (0x7UL << UICR_REGOUT0_VOUT_Pos) /*!< Bit mask of VOUT field. */ +#define UICR_REGOUT0_VOUT_1V8 (0UL) /*!< 1.8 V */ +#define UICR_REGOUT0_VOUT_2V1 (1UL) /*!< 2.1 V */ +#define UICR_REGOUT0_VOUT_2V4 (2UL) /*!< 2.4 V */ +#define UICR_REGOUT0_VOUT_2V7 (3UL) /*!< 2.7 V */ +#define UICR_REGOUT0_VOUT_3V0 (4UL) /*!< 3.0 V */ +#define UICR_REGOUT0_VOUT_3V3 (5UL) /*!< 3.3 V */ +#define UICR_REGOUT0_VOUT_DEFAULT (7UL) /*!< Default voltage: 1.8 V */ + + +/* Peripheral: USBD */ +/* Description: Universal serial bus device */ + +/* Register: USBD_TASKS_STARTEPIN */ +/* Description: Description collection[n]: Captures the EPIN[n].PTR and EPIN[n].MAXCNT registers values, and enables endpoint IN n to respond to traffic from host */ + +/* Bit 0 : */ +#define USBD_TASKS_STARTEPIN_TASKS_STARTEPIN_Pos (0UL) /*!< Position of TASKS_STARTEPIN field. */ +#define USBD_TASKS_STARTEPIN_TASKS_STARTEPIN_Msk (0x1UL << USBD_TASKS_STARTEPIN_TASKS_STARTEPIN_Pos) /*!< Bit mask of TASKS_STARTEPIN field. */ + +/* Register: USBD_TASKS_STARTISOIN */ +/* Description: Captures the ISOIN.PTR and ISOIN.MAXCNT registers values, and enables sending data on ISO endpoint */ + +/* Bit 0 : */ +#define USBD_TASKS_STARTISOIN_TASKS_STARTISOIN_Pos (0UL) /*!< Position of TASKS_STARTISOIN field. */ +#define USBD_TASKS_STARTISOIN_TASKS_STARTISOIN_Msk (0x1UL << USBD_TASKS_STARTISOIN_TASKS_STARTISOIN_Pos) /*!< Bit mask of TASKS_STARTISOIN field. */ + +/* Register: USBD_TASKS_STARTEPOUT */ +/* Description: Description collection[n]: Captures the EPOUT[n].PTR and EPOUT[n].MAXCNT registers values, and enables endpoint n to respond to traffic from host */ + +/* Bit 0 : */ +#define USBD_TASKS_STARTEPOUT_TASKS_STARTEPOUT_Pos (0UL) /*!< Position of TASKS_STARTEPOUT field. */ +#define USBD_TASKS_STARTEPOUT_TASKS_STARTEPOUT_Msk (0x1UL << USBD_TASKS_STARTEPOUT_TASKS_STARTEPOUT_Pos) /*!< Bit mask of TASKS_STARTEPOUT field. */ + +/* Register: USBD_TASKS_STARTISOOUT */ +/* Description: Captures the ISOOUT.PTR and ISOOUT.MAXCNT registers values, and enables receiving of data on ISO endpoint */ + +/* Bit 0 : */ +#define USBD_TASKS_STARTISOOUT_TASKS_STARTISOOUT_Pos (0UL) /*!< Position of TASKS_STARTISOOUT field. */ +#define USBD_TASKS_STARTISOOUT_TASKS_STARTISOOUT_Msk (0x1UL << USBD_TASKS_STARTISOOUT_TASKS_STARTISOOUT_Pos) /*!< Bit mask of TASKS_STARTISOOUT field. */ + +/* Register: USBD_TASKS_EP0RCVOUT */ +/* Description: Allows OUT data stage on control endpoint 0 */ + +/* Bit 0 : */ +#define USBD_TASKS_EP0RCVOUT_TASKS_EP0RCVOUT_Pos (0UL) /*!< Position of TASKS_EP0RCVOUT field. */ +#define USBD_TASKS_EP0RCVOUT_TASKS_EP0RCVOUT_Msk (0x1UL << USBD_TASKS_EP0RCVOUT_TASKS_EP0RCVOUT_Pos) /*!< Bit mask of TASKS_EP0RCVOUT field. */ + +/* Register: USBD_TASKS_EP0STATUS */ +/* Description: Allows status stage on control endpoint 0 */ + +/* Bit 0 : */ +#define USBD_TASKS_EP0STATUS_TASKS_EP0STATUS_Pos (0UL) /*!< Position of TASKS_EP0STATUS field. */ +#define USBD_TASKS_EP0STATUS_TASKS_EP0STATUS_Msk (0x1UL << USBD_TASKS_EP0STATUS_TASKS_EP0STATUS_Pos) /*!< Bit mask of TASKS_EP0STATUS field. */ + +/* Register: USBD_TASKS_EP0STALL */ +/* Description: Stalls data and status stage on control endpoint 0 */ + +/* Bit 0 : */ +#define USBD_TASKS_EP0STALL_TASKS_EP0STALL_Pos (0UL) /*!< Position of TASKS_EP0STALL field. */ +#define USBD_TASKS_EP0STALL_TASKS_EP0STALL_Msk (0x1UL << USBD_TASKS_EP0STALL_TASKS_EP0STALL_Pos) /*!< Bit mask of TASKS_EP0STALL field. */ + +/* Register: USBD_TASKS_DPDMDRIVE */ +/* Description: Forces D+ and D- lines into the state defined in the DPDMVALUE register */ + +/* Bit 0 : */ +#define USBD_TASKS_DPDMDRIVE_TASKS_DPDMDRIVE_Pos (0UL) /*!< Position of TASKS_DPDMDRIVE field. */ +#define USBD_TASKS_DPDMDRIVE_TASKS_DPDMDRIVE_Msk (0x1UL << USBD_TASKS_DPDMDRIVE_TASKS_DPDMDRIVE_Pos) /*!< Bit mask of TASKS_DPDMDRIVE field. */ + +/* Register: USBD_TASKS_DPDMNODRIVE */ +/* Description: Stops forcing D+ and D- lines into any state (USB engine takes control) */ + +/* Bit 0 : */ +#define USBD_TASKS_DPDMNODRIVE_TASKS_DPDMNODRIVE_Pos (0UL) /*!< Position of TASKS_DPDMNODRIVE field. */ +#define USBD_TASKS_DPDMNODRIVE_TASKS_DPDMNODRIVE_Msk (0x1UL << USBD_TASKS_DPDMNODRIVE_TASKS_DPDMNODRIVE_Pos) /*!< Bit mask of TASKS_DPDMNODRIVE field. */ + +/* Register: USBD_EVENTS_USBRESET */ +/* Description: Signals that a USB reset condition has been detected on USB lines */ + +/* Bit 0 : */ +#define USBD_EVENTS_USBRESET_EVENTS_USBRESET_Pos (0UL) /*!< Position of EVENTS_USBRESET field. */ +#define USBD_EVENTS_USBRESET_EVENTS_USBRESET_Msk (0x1UL << USBD_EVENTS_USBRESET_EVENTS_USBRESET_Pos) /*!< Bit mask of EVENTS_USBRESET field. */ + +/* Register: USBD_EVENTS_STARTED */ +/* Description: Confirms that the EPIN[n].PTR and EPIN[n].MAXCNT, or EPOUT[n].PTR and EPOUT[n].MAXCNT registers have been captured on all endpoints reported in the EPSTATUS register */ + +/* Bit 0 : */ +#define USBD_EVENTS_STARTED_EVENTS_STARTED_Pos (0UL) /*!< Position of EVENTS_STARTED field. */ +#define USBD_EVENTS_STARTED_EVENTS_STARTED_Msk (0x1UL << USBD_EVENTS_STARTED_EVENTS_STARTED_Pos) /*!< Bit mask of EVENTS_STARTED field. */ + +/* Register: USBD_EVENTS_ENDEPIN */ +/* Description: Description collection[n]: The whole EPIN[n] buffer has been consumed. The RAM buffer can be accessed safely by software. */ + +/* Bit 0 : */ +#define USBD_EVENTS_ENDEPIN_EVENTS_ENDEPIN_Pos (0UL) /*!< Position of EVENTS_ENDEPIN field. */ +#define USBD_EVENTS_ENDEPIN_EVENTS_ENDEPIN_Msk (0x1UL << USBD_EVENTS_ENDEPIN_EVENTS_ENDEPIN_Pos) /*!< Bit mask of EVENTS_ENDEPIN field. */ + +/* Register: USBD_EVENTS_EP0DATADONE */ +/* Description: An acknowledged data transfer has taken place on the control endpoint */ + +/* Bit 0 : */ +#define USBD_EVENTS_EP0DATADONE_EVENTS_EP0DATADONE_Pos (0UL) /*!< Position of EVENTS_EP0DATADONE field. */ +#define USBD_EVENTS_EP0DATADONE_EVENTS_EP0DATADONE_Msk (0x1UL << USBD_EVENTS_EP0DATADONE_EVENTS_EP0DATADONE_Pos) /*!< Bit mask of EVENTS_EP0DATADONE field. */ + +/* Register: USBD_EVENTS_ENDISOIN */ +/* Description: The whole ISOIN buffer has been consumed. The RAM buffer can be accessed safely by software. */ + +/* Bit 0 : */ +#define USBD_EVENTS_ENDISOIN_EVENTS_ENDISOIN_Pos (0UL) /*!< Position of EVENTS_ENDISOIN field. */ +#define USBD_EVENTS_ENDISOIN_EVENTS_ENDISOIN_Msk (0x1UL << USBD_EVENTS_ENDISOIN_EVENTS_ENDISOIN_Pos) /*!< Bit mask of EVENTS_ENDISOIN field. */ + +/* Register: USBD_EVENTS_ENDEPOUT */ +/* Description: Description collection[n]: The whole EPOUT[n] buffer has been consumed. The RAM buffer can be accessed safely by software. */ + +/* Bit 0 : */ +#define USBD_EVENTS_ENDEPOUT_EVENTS_ENDEPOUT_Pos (0UL) /*!< Position of EVENTS_ENDEPOUT field. */ +#define USBD_EVENTS_ENDEPOUT_EVENTS_ENDEPOUT_Msk (0x1UL << USBD_EVENTS_ENDEPOUT_EVENTS_ENDEPOUT_Pos) /*!< Bit mask of EVENTS_ENDEPOUT field. */ + +/* Register: USBD_EVENTS_ENDISOOUT */ +/* Description: The whole ISOOUT buffer has been consumed. The RAM buffer can be accessed safely by software. */ + +/* Bit 0 : */ +#define USBD_EVENTS_ENDISOOUT_EVENTS_ENDISOOUT_Pos (0UL) /*!< Position of EVENTS_ENDISOOUT field. */ +#define USBD_EVENTS_ENDISOOUT_EVENTS_ENDISOOUT_Msk (0x1UL << USBD_EVENTS_ENDISOOUT_EVENTS_ENDISOOUT_Pos) /*!< Bit mask of EVENTS_ENDISOOUT field. */ + +/* Register: USBD_EVENTS_SOF */ +/* Description: Signals that a SOF (start of frame) condition has been detected on USB lines */ + +/* Bit 0 : */ +#define USBD_EVENTS_SOF_EVENTS_SOF_Pos (0UL) /*!< Position of EVENTS_SOF field. */ +#define USBD_EVENTS_SOF_EVENTS_SOF_Msk (0x1UL << USBD_EVENTS_SOF_EVENTS_SOF_Pos) /*!< Bit mask of EVENTS_SOF field. */ + +/* Register: USBD_EVENTS_USBEVENT */ +/* Description: An event or an error not covered by specific events has occurred. Check EVENTCAUSE register to find the cause. */ + +/* Bit 0 : */ +#define USBD_EVENTS_USBEVENT_EVENTS_USBEVENT_Pos (0UL) /*!< Position of EVENTS_USBEVENT field. */ +#define USBD_EVENTS_USBEVENT_EVENTS_USBEVENT_Msk (0x1UL << USBD_EVENTS_USBEVENT_EVENTS_USBEVENT_Pos) /*!< Bit mask of EVENTS_USBEVENT field. */ + +/* Register: USBD_EVENTS_EP0SETUP */ +/* Description: A valid SETUP token has been received (and acknowledged) on the control endpoint */ + +/* Bit 0 : */ +#define USBD_EVENTS_EP0SETUP_EVENTS_EP0SETUP_Pos (0UL) /*!< Position of EVENTS_EP0SETUP field. */ +#define USBD_EVENTS_EP0SETUP_EVENTS_EP0SETUP_Msk (0x1UL << USBD_EVENTS_EP0SETUP_EVENTS_EP0SETUP_Pos) /*!< Bit mask of EVENTS_EP0SETUP field. */ + +/* Register: USBD_EVENTS_EPDATA */ +/* Description: A data transfer has occurred on a data endpoint, indicated by the EPDATASTATUS register */ + +/* Bit 0 : */ +#define USBD_EVENTS_EPDATA_EVENTS_EPDATA_Pos (0UL) /*!< Position of EVENTS_EPDATA field. */ +#define USBD_EVENTS_EPDATA_EVENTS_EPDATA_Msk (0x1UL << USBD_EVENTS_EPDATA_EVENTS_EPDATA_Pos) /*!< Bit mask of EVENTS_EPDATA field. */ + +/* Register: USBD_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 4 : Shortcut between ENDEPOUT[0] event and EP0RCVOUT task */ +#define USBD_SHORTS_ENDEPOUT0_EP0RCVOUT_Pos (4UL) /*!< Position of ENDEPOUT0_EP0RCVOUT field. */ +#define USBD_SHORTS_ENDEPOUT0_EP0RCVOUT_Msk (0x1UL << USBD_SHORTS_ENDEPOUT0_EP0RCVOUT_Pos) /*!< Bit mask of ENDEPOUT0_EP0RCVOUT field. */ +#define USBD_SHORTS_ENDEPOUT0_EP0RCVOUT_Disabled (0UL) /*!< Disable shortcut */ +#define USBD_SHORTS_ENDEPOUT0_EP0RCVOUT_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 3 : Shortcut between ENDEPOUT[0] event and EP0STATUS task */ +#define USBD_SHORTS_ENDEPOUT0_EP0STATUS_Pos (3UL) /*!< Position of ENDEPOUT0_EP0STATUS field. */ +#define USBD_SHORTS_ENDEPOUT0_EP0STATUS_Msk (0x1UL << USBD_SHORTS_ENDEPOUT0_EP0STATUS_Pos) /*!< Bit mask of ENDEPOUT0_EP0STATUS field. */ +#define USBD_SHORTS_ENDEPOUT0_EP0STATUS_Disabled (0UL) /*!< Disable shortcut */ +#define USBD_SHORTS_ENDEPOUT0_EP0STATUS_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 2 : Shortcut between EP0DATADONE event and EP0STATUS task */ +#define USBD_SHORTS_EP0DATADONE_EP0STATUS_Pos (2UL) /*!< Position of EP0DATADONE_EP0STATUS field. */ +#define USBD_SHORTS_EP0DATADONE_EP0STATUS_Msk (0x1UL << USBD_SHORTS_EP0DATADONE_EP0STATUS_Pos) /*!< Bit mask of EP0DATADONE_EP0STATUS field. */ +#define USBD_SHORTS_EP0DATADONE_EP0STATUS_Disabled (0UL) /*!< Disable shortcut */ +#define USBD_SHORTS_EP0DATADONE_EP0STATUS_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 1 : Shortcut between EP0DATADONE event and STARTEPOUT[0] task */ +#define USBD_SHORTS_EP0DATADONE_STARTEPOUT0_Pos (1UL) /*!< Position of EP0DATADONE_STARTEPOUT0 field. */ +#define USBD_SHORTS_EP0DATADONE_STARTEPOUT0_Msk (0x1UL << USBD_SHORTS_EP0DATADONE_STARTEPOUT0_Pos) /*!< Bit mask of EP0DATADONE_STARTEPOUT0 field. */ +#define USBD_SHORTS_EP0DATADONE_STARTEPOUT0_Disabled (0UL) /*!< Disable shortcut */ +#define USBD_SHORTS_EP0DATADONE_STARTEPOUT0_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 0 : Shortcut between EP0DATADONE event and STARTEPIN[0] task */ +#define USBD_SHORTS_EP0DATADONE_STARTEPIN0_Pos (0UL) /*!< Position of EP0DATADONE_STARTEPIN0 field. */ +#define USBD_SHORTS_EP0DATADONE_STARTEPIN0_Msk (0x1UL << USBD_SHORTS_EP0DATADONE_STARTEPIN0_Pos) /*!< Bit mask of EP0DATADONE_STARTEPIN0 field. */ +#define USBD_SHORTS_EP0DATADONE_STARTEPIN0_Disabled (0UL) /*!< Disable shortcut */ +#define USBD_SHORTS_EP0DATADONE_STARTEPIN0_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: USBD_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 24 : Enable or disable interrupt for EPDATA event */ +#define USBD_INTEN_EPDATA_Pos (24UL) /*!< Position of EPDATA field. */ +#define USBD_INTEN_EPDATA_Msk (0x1UL << USBD_INTEN_EPDATA_Pos) /*!< Bit mask of EPDATA field. */ +#define USBD_INTEN_EPDATA_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_EPDATA_Enabled (1UL) /*!< Enable */ + +/* Bit 23 : Enable or disable interrupt for EP0SETUP event */ +#define USBD_INTEN_EP0SETUP_Pos (23UL) /*!< Position of EP0SETUP field. */ +#define USBD_INTEN_EP0SETUP_Msk (0x1UL << USBD_INTEN_EP0SETUP_Pos) /*!< Bit mask of EP0SETUP field. */ +#define USBD_INTEN_EP0SETUP_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_EP0SETUP_Enabled (1UL) /*!< Enable */ + +/* Bit 22 : Enable or disable interrupt for USBEVENT event */ +#define USBD_INTEN_USBEVENT_Pos (22UL) /*!< Position of USBEVENT field. */ +#define USBD_INTEN_USBEVENT_Msk (0x1UL << USBD_INTEN_USBEVENT_Pos) /*!< Bit mask of USBEVENT field. */ +#define USBD_INTEN_USBEVENT_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_USBEVENT_Enabled (1UL) /*!< Enable */ + +/* Bit 21 : Enable or disable interrupt for SOF event */ +#define USBD_INTEN_SOF_Pos (21UL) /*!< Position of SOF field. */ +#define USBD_INTEN_SOF_Msk (0x1UL << USBD_INTEN_SOF_Pos) /*!< Bit mask of SOF field. */ +#define USBD_INTEN_SOF_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_SOF_Enabled (1UL) /*!< Enable */ + +/* Bit 20 : Enable or disable interrupt for ENDISOOUT event */ +#define USBD_INTEN_ENDISOOUT_Pos (20UL) /*!< Position of ENDISOOUT field. */ +#define USBD_INTEN_ENDISOOUT_Msk (0x1UL << USBD_INTEN_ENDISOOUT_Pos) /*!< Bit mask of ENDISOOUT field. */ +#define USBD_INTEN_ENDISOOUT_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_ENDISOOUT_Enabled (1UL) /*!< Enable */ + +/* Bit 19 : Enable or disable interrupt for ENDEPOUT[7] event */ +#define USBD_INTEN_ENDEPOUT7_Pos (19UL) /*!< Position of ENDEPOUT7 field. */ +#define USBD_INTEN_ENDEPOUT7_Msk (0x1UL << USBD_INTEN_ENDEPOUT7_Pos) /*!< Bit mask of ENDEPOUT7 field. */ +#define USBD_INTEN_ENDEPOUT7_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_ENDEPOUT7_Enabled (1UL) /*!< Enable */ + +/* Bit 18 : Enable or disable interrupt for ENDEPOUT[6] event */ +#define USBD_INTEN_ENDEPOUT6_Pos (18UL) /*!< Position of ENDEPOUT6 field. */ +#define USBD_INTEN_ENDEPOUT6_Msk (0x1UL << USBD_INTEN_ENDEPOUT6_Pos) /*!< Bit mask of ENDEPOUT6 field. */ +#define USBD_INTEN_ENDEPOUT6_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_ENDEPOUT6_Enabled (1UL) /*!< Enable */ + +/* Bit 17 : Enable or disable interrupt for ENDEPOUT[5] event */ +#define USBD_INTEN_ENDEPOUT5_Pos (17UL) /*!< Position of ENDEPOUT5 field. */ +#define USBD_INTEN_ENDEPOUT5_Msk (0x1UL << USBD_INTEN_ENDEPOUT5_Pos) /*!< Bit mask of ENDEPOUT5 field. */ +#define USBD_INTEN_ENDEPOUT5_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_ENDEPOUT5_Enabled (1UL) /*!< Enable */ + +/* Bit 16 : Enable or disable interrupt for ENDEPOUT[4] event */ +#define USBD_INTEN_ENDEPOUT4_Pos (16UL) /*!< Position of ENDEPOUT4 field. */ +#define USBD_INTEN_ENDEPOUT4_Msk (0x1UL << USBD_INTEN_ENDEPOUT4_Pos) /*!< Bit mask of ENDEPOUT4 field. */ +#define USBD_INTEN_ENDEPOUT4_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_ENDEPOUT4_Enabled (1UL) /*!< Enable */ + +/* Bit 15 : Enable or disable interrupt for ENDEPOUT[3] event */ +#define USBD_INTEN_ENDEPOUT3_Pos (15UL) /*!< Position of ENDEPOUT3 field. */ +#define USBD_INTEN_ENDEPOUT3_Msk (0x1UL << USBD_INTEN_ENDEPOUT3_Pos) /*!< Bit mask of ENDEPOUT3 field. */ +#define USBD_INTEN_ENDEPOUT3_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_ENDEPOUT3_Enabled (1UL) /*!< Enable */ + +/* Bit 14 : Enable or disable interrupt for ENDEPOUT[2] event */ +#define USBD_INTEN_ENDEPOUT2_Pos (14UL) /*!< Position of ENDEPOUT2 field. */ +#define USBD_INTEN_ENDEPOUT2_Msk (0x1UL << USBD_INTEN_ENDEPOUT2_Pos) /*!< Bit mask of ENDEPOUT2 field. */ +#define USBD_INTEN_ENDEPOUT2_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_ENDEPOUT2_Enabled (1UL) /*!< Enable */ + +/* Bit 13 : Enable or disable interrupt for ENDEPOUT[1] event */ +#define USBD_INTEN_ENDEPOUT1_Pos (13UL) /*!< Position of ENDEPOUT1 field. */ +#define USBD_INTEN_ENDEPOUT1_Msk (0x1UL << USBD_INTEN_ENDEPOUT1_Pos) /*!< Bit mask of ENDEPOUT1 field. */ +#define USBD_INTEN_ENDEPOUT1_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_ENDEPOUT1_Enabled (1UL) /*!< Enable */ + +/* Bit 12 : Enable or disable interrupt for ENDEPOUT[0] event */ +#define USBD_INTEN_ENDEPOUT0_Pos (12UL) /*!< Position of ENDEPOUT0 field. */ +#define USBD_INTEN_ENDEPOUT0_Msk (0x1UL << USBD_INTEN_ENDEPOUT0_Pos) /*!< Bit mask of ENDEPOUT0 field. */ +#define USBD_INTEN_ENDEPOUT0_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_ENDEPOUT0_Enabled (1UL) /*!< Enable */ + +/* Bit 11 : Enable or disable interrupt for ENDISOIN event */ +#define USBD_INTEN_ENDISOIN_Pos (11UL) /*!< Position of ENDISOIN field. */ +#define USBD_INTEN_ENDISOIN_Msk (0x1UL << USBD_INTEN_ENDISOIN_Pos) /*!< Bit mask of ENDISOIN field. */ +#define USBD_INTEN_ENDISOIN_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_ENDISOIN_Enabled (1UL) /*!< Enable */ + +/* Bit 10 : Enable or disable interrupt for EP0DATADONE event */ +#define USBD_INTEN_EP0DATADONE_Pos (10UL) /*!< Position of EP0DATADONE field. */ +#define USBD_INTEN_EP0DATADONE_Msk (0x1UL << USBD_INTEN_EP0DATADONE_Pos) /*!< Bit mask of EP0DATADONE field. */ +#define USBD_INTEN_EP0DATADONE_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_EP0DATADONE_Enabled (1UL) /*!< Enable */ + +/* Bit 9 : Enable or disable interrupt for ENDEPIN[7] event */ +#define USBD_INTEN_ENDEPIN7_Pos (9UL) /*!< Position of ENDEPIN7 field. */ +#define USBD_INTEN_ENDEPIN7_Msk (0x1UL << USBD_INTEN_ENDEPIN7_Pos) /*!< Bit mask of ENDEPIN7 field. */ +#define USBD_INTEN_ENDEPIN7_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_ENDEPIN7_Enabled (1UL) /*!< Enable */ + +/* Bit 8 : Enable or disable interrupt for ENDEPIN[6] event */ +#define USBD_INTEN_ENDEPIN6_Pos (8UL) /*!< Position of ENDEPIN6 field. */ +#define USBD_INTEN_ENDEPIN6_Msk (0x1UL << USBD_INTEN_ENDEPIN6_Pos) /*!< Bit mask of ENDEPIN6 field. */ +#define USBD_INTEN_ENDEPIN6_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_ENDEPIN6_Enabled (1UL) /*!< Enable */ + +/* Bit 7 : Enable or disable interrupt for ENDEPIN[5] event */ +#define USBD_INTEN_ENDEPIN5_Pos (7UL) /*!< Position of ENDEPIN5 field. */ +#define USBD_INTEN_ENDEPIN5_Msk (0x1UL << USBD_INTEN_ENDEPIN5_Pos) /*!< Bit mask of ENDEPIN5 field. */ +#define USBD_INTEN_ENDEPIN5_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_ENDEPIN5_Enabled (1UL) /*!< Enable */ + +/* Bit 6 : Enable or disable interrupt for ENDEPIN[4] event */ +#define USBD_INTEN_ENDEPIN4_Pos (6UL) /*!< Position of ENDEPIN4 field. */ +#define USBD_INTEN_ENDEPIN4_Msk (0x1UL << USBD_INTEN_ENDEPIN4_Pos) /*!< Bit mask of ENDEPIN4 field. */ +#define USBD_INTEN_ENDEPIN4_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_ENDEPIN4_Enabled (1UL) /*!< Enable */ + +/* Bit 5 : Enable or disable interrupt for ENDEPIN[3] event */ +#define USBD_INTEN_ENDEPIN3_Pos (5UL) /*!< Position of ENDEPIN3 field. */ +#define USBD_INTEN_ENDEPIN3_Msk (0x1UL << USBD_INTEN_ENDEPIN3_Pos) /*!< Bit mask of ENDEPIN3 field. */ +#define USBD_INTEN_ENDEPIN3_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_ENDEPIN3_Enabled (1UL) /*!< Enable */ + +/* Bit 4 : Enable or disable interrupt for ENDEPIN[2] event */ +#define USBD_INTEN_ENDEPIN2_Pos (4UL) /*!< Position of ENDEPIN2 field. */ +#define USBD_INTEN_ENDEPIN2_Msk (0x1UL << USBD_INTEN_ENDEPIN2_Pos) /*!< Bit mask of ENDEPIN2 field. */ +#define USBD_INTEN_ENDEPIN2_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_ENDEPIN2_Enabled (1UL) /*!< Enable */ + +/* Bit 3 : Enable or disable interrupt for ENDEPIN[1] event */ +#define USBD_INTEN_ENDEPIN1_Pos (3UL) /*!< Position of ENDEPIN1 field. */ +#define USBD_INTEN_ENDEPIN1_Msk (0x1UL << USBD_INTEN_ENDEPIN1_Pos) /*!< Bit mask of ENDEPIN1 field. */ +#define USBD_INTEN_ENDEPIN1_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_ENDEPIN1_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable interrupt for ENDEPIN[0] event */ +#define USBD_INTEN_ENDEPIN0_Pos (2UL) /*!< Position of ENDEPIN0 field. */ +#define USBD_INTEN_ENDEPIN0_Msk (0x1UL << USBD_INTEN_ENDEPIN0_Pos) /*!< Bit mask of ENDEPIN0 field. */ +#define USBD_INTEN_ENDEPIN0_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_ENDEPIN0_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for STARTED event */ +#define USBD_INTEN_STARTED_Pos (1UL) /*!< Position of STARTED field. */ +#define USBD_INTEN_STARTED_Msk (0x1UL << USBD_INTEN_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define USBD_INTEN_STARTED_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_STARTED_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable interrupt for USBRESET event */ +#define USBD_INTEN_USBRESET_Pos (0UL) /*!< Position of USBRESET field. */ +#define USBD_INTEN_USBRESET_Msk (0x1UL << USBD_INTEN_USBRESET_Pos) /*!< Bit mask of USBRESET field. */ +#define USBD_INTEN_USBRESET_Disabled (0UL) /*!< Disable */ +#define USBD_INTEN_USBRESET_Enabled (1UL) /*!< Enable */ + +/* Register: USBD_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 24 : Write '1' to enable interrupt for EPDATA event */ +#define USBD_INTENSET_EPDATA_Pos (24UL) /*!< Position of EPDATA field. */ +#define USBD_INTENSET_EPDATA_Msk (0x1UL << USBD_INTENSET_EPDATA_Pos) /*!< Bit mask of EPDATA field. */ +#define USBD_INTENSET_EPDATA_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_EPDATA_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_EPDATA_Set (1UL) /*!< Enable */ + +/* Bit 23 : Write '1' to enable interrupt for EP0SETUP event */ +#define USBD_INTENSET_EP0SETUP_Pos (23UL) /*!< Position of EP0SETUP field. */ +#define USBD_INTENSET_EP0SETUP_Msk (0x1UL << USBD_INTENSET_EP0SETUP_Pos) /*!< Bit mask of EP0SETUP field. */ +#define USBD_INTENSET_EP0SETUP_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_EP0SETUP_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_EP0SETUP_Set (1UL) /*!< Enable */ + +/* Bit 22 : Write '1' to enable interrupt for USBEVENT event */ +#define USBD_INTENSET_USBEVENT_Pos (22UL) /*!< Position of USBEVENT field. */ +#define USBD_INTENSET_USBEVENT_Msk (0x1UL << USBD_INTENSET_USBEVENT_Pos) /*!< Bit mask of USBEVENT field. */ +#define USBD_INTENSET_USBEVENT_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_USBEVENT_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_USBEVENT_Set (1UL) /*!< Enable */ + +/* Bit 21 : Write '1' to enable interrupt for SOF event */ +#define USBD_INTENSET_SOF_Pos (21UL) /*!< Position of SOF field. */ +#define USBD_INTENSET_SOF_Msk (0x1UL << USBD_INTENSET_SOF_Pos) /*!< Bit mask of SOF field. */ +#define USBD_INTENSET_SOF_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_SOF_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_SOF_Set (1UL) /*!< Enable */ + +/* Bit 20 : Write '1' to enable interrupt for ENDISOOUT event */ +#define USBD_INTENSET_ENDISOOUT_Pos (20UL) /*!< Position of ENDISOOUT field. */ +#define USBD_INTENSET_ENDISOOUT_Msk (0x1UL << USBD_INTENSET_ENDISOOUT_Pos) /*!< Bit mask of ENDISOOUT field. */ +#define USBD_INTENSET_ENDISOOUT_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_ENDISOOUT_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_ENDISOOUT_Set (1UL) /*!< Enable */ + +/* Bit 19 : Write '1' to enable interrupt for ENDEPOUT[7] event */ +#define USBD_INTENSET_ENDEPOUT7_Pos (19UL) /*!< Position of ENDEPOUT7 field. */ +#define USBD_INTENSET_ENDEPOUT7_Msk (0x1UL << USBD_INTENSET_ENDEPOUT7_Pos) /*!< Bit mask of ENDEPOUT7 field. */ +#define USBD_INTENSET_ENDEPOUT7_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_ENDEPOUT7_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_ENDEPOUT7_Set (1UL) /*!< Enable */ + +/* Bit 18 : Write '1' to enable interrupt for ENDEPOUT[6] event */ +#define USBD_INTENSET_ENDEPOUT6_Pos (18UL) /*!< Position of ENDEPOUT6 field. */ +#define USBD_INTENSET_ENDEPOUT6_Msk (0x1UL << USBD_INTENSET_ENDEPOUT6_Pos) /*!< Bit mask of ENDEPOUT6 field. */ +#define USBD_INTENSET_ENDEPOUT6_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_ENDEPOUT6_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_ENDEPOUT6_Set (1UL) /*!< Enable */ + +/* Bit 17 : Write '1' to enable interrupt for ENDEPOUT[5] event */ +#define USBD_INTENSET_ENDEPOUT5_Pos (17UL) /*!< Position of ENDEPOUT5 field. */ +#define USBD_INTENSET_ENDEPOUT5_Msk (0x1UL << USBD_INTENSET_ENDEPOUT5_Pos) /*!< Bit mask of ENDEPOUT5 field. */ +#define USBD_INTENSET_ENDEPOUT5_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_ENDEPOUT5_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_ENDEPOUT5_Set (1UL) /*!< Enable */ + +/* Bit 16 : Write '1' to enable interrupt for ENDEPOUT[4] event */ +#define USBD_INTENSET_ENDEPOUT4_Pos (16UL) /*!< Position of ENDEPOUT4 field. */ +#define USBD_INTENSET_ENDEPOUT4_Msk (0x1UL << USBD_INTENSET_ENDEPOUT4_Pos) /*!< Bit mask of ENDEPOUT4 field. */ +#define USBD_INTENSET_ENDEPOUT4_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_ENDEPOUT4_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_ENDEPOUT4_Set (1UL) /*!< Enable */ + +/* Bit 15 : Write '1' to enable interrupt for ENDEPOUT[3] event */ +#define USBD_INTENSET_ENDEPOUT3_Pos (15UL) /*!< Position of ENDEPOUT3 field. */ +#define USBD_INTENSET_ENDEPOUT3_Msk (0x1UL << USBD_INTENSET_ENDEPOUT3_Pos) /*!< Bit mask of ENDEPOUT3 field. */ +#define USBD_INTENSET_ENDEPOUT3_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_ENDEPOUT3_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_ENDEPOUT3_Set (1UL) /*!< Enable */ + +/* Bit 14 : Write '1' to enable interrupt for ENDEPOUT[2] event */ +#define USBD_INTENSET_ENDEPOUT2_Pos (14UL) /*!< Position of ENDEPOUT2 field. */ +#define USBD_INTENSET_ENDEPOUT2_Msk (0x1UL << USBD_INTENSET_ENDEPOUT2_Pos) /*!< Bit mask of ENDEPOUT2 field. */ +#define USBD_INTENSET_ENDEPOUT2_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_ENDEPOUT2_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_ENDEPOUT2_Set (1UL) /*!< Enable */ + +/* Bit 13 : Write '1' to enable interrupt for ENDEPOUT[1] event */ +#define USBD_INTENSET_ENDEPOUT1_Pos (13UL) /*!< Position of ENDEPOUT1 field. */ +#define USBD_INTENSET_ENDEPOUT1_Msk (0x1UL << USBD_INTENSET_ENDEPOUT1_Pos) /*!< Bit mask of ENDEPOUT1 field. */ +#define USBD_INTENSET_ENDEPOUT1_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_ENDEPOUT1_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_ENDEPOUT1_Set (1UL) /*!< Enable */ + +/* Bit 12 : Write '1' to enable interrupt for ENDEPOUT[0] event */ +#define USBD_INTENSET_ENDEPOUT0_Pos (12UL) /*!< Position of ENDEPOUT0 field. */ +#define USBD_INTENSET_ENDEPOUT0_Msk (0x1UL << USBD_INTENSET_ENDEPOUT0_Pos) /*!< Bit mask of ENDEPOUT0 field. */ +#define USBD_INTENSET_ENDEPOUT0_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_ENDEPOUT0_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_ENDEPOUT0_Set (1UL) /*!< Enable */ + +/* Bit 11 : Write '1' to enable interrupt for ENDISOIN event */ +#define USBD_INTENSET_ENDISOIN_Pos (11UL) /*!< Position of ENDISOIN field. */ +#define USBD_INTENSET_ENDISOIN_Msk (0x1UL << USBD_INTENSET_ENDISOIN_Pos) /*!< Bit mask of ENDISOIN field. */ +#define USBD_INTENSET_ENDISOIN_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_ENDISOIN_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_ENDISOIN_Set (1UL) /*!< Enable */ + +/* Bit 10 : Write '1' to enable interrupt for EP0DATADONE event */ +#define USBD_INTENSET_EP0DATADONE_Pos (10UL) /*!< Position of EP0DATADONE field. */ +#define USBD_INTENSET_EP0DATADONE_Msk (0x1UL << USBD_INTENSET_EP0DATADONE_Pos) /*!< Bit mask of EP0DATADONE field. */ +#define USBD_INTENSET_EP0DATADONE_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_EP0DATADONE_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_EP0DATADONE_Set (1UL) /*!< Enable */ + +/* Bit 9 : Write '1' to enable interrupt for ENDEPIN[7] event */ +#define USBD_INTENSET_ENDEPIN7_Pos (9UL) /*!< Position of ENDEPIN7 field. */ +#define USBD_INTENSET_ENDEPIN7_Msk (0x1UL << USBD_INTENSET_ENDEPIN7_Pos) /*!< Bit mask of ENDEPIN7 field. */ +#define USBD_INTENSET_ENDEPIN7_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_ENDEPIN7_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_ENDEPIN7_Set (1UL) /*!< Enable */ + +/* Bit 8 : Write '1' to enable interrupt for ENDEPIN[6] event */ +#define USBD_INTENSET_ENDEPIN6_Pos (8UL) /*!< Position of ENDEPIN6 field. */ +#define USBD_INTENSET_ENDEPIN6_Msk (0x1UL << USBD_INTENSET_ENDEPIN6_Pos) /*!< Bit mask of ENDEPIN6 field. */ +#define USBD_INTENSET_ENDEPIN6_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_ENDEPIN6_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_ENDEPIN6_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to enable interrupt for ENDEPIN[5] event */ +#define USBD_INTENSET_ENDEPIN5_Pos (7UL) /*!< Position of ENDEPIN5 field. */ +#define USBD_INTENSET_ENDEPIN5_Msk (0x1UL << USBD_INTENSET_ENDEPIN5_Pos) /*!< Bit mask of ENDEPIN5 field. */ +#define USBD_INTENSET_ENDEPIN5_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_ENDEPIN5_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_ENDEPIN5_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to enable interrupt for ENDEPIN[4] event */ +#define USBD_INTENSET_ENDEPIN4_Pos (6UL) /*!< Position of ENDEPIN4 field. */ +#define USBD_INTENSET_ENDEPIN4_Msk (0x1UL << USBD_INTENSET_ENDEPIN4_Pos) /*!< Bit mask of ENDEPIN4 field. */ +#define USBD_INTENSET_ENDEPIN4_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_ENDEPIN4_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_ENDEPIN4_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to enable interrupt for ENDEPIN[3] event */ +#define USBD_INTENSET_ENDEPIN3_Pos (5UL) /*!< Position of ENDEPIN3 field. */ +#define USBD_INTENSET_ENDEPIN3_Msk (0x1UL << USBD_INTENSET_ENDEPIN3_Pos) /*!< Bit mask of ENDEPIN3 field. */ +#define USBD_INTENSET_ENDEPIN3_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_ENDEPIN3_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_ENDEPIN3_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to enable interrupt for ENDEPIN[2] event */ +#define USBD_INTENSET_ENDEPIN2_Pos (4UL) /*!< Position of ENDEPIN2 field. */ +#define USBD_INTENSET_ENDEPIN2_Msk (0x1UL << USBD_INTENSET_ENDEPIN2_Pos) /*!< Bit mask of ENDEPIN2 field. */ +#define USBD_INTENSET_ENDEPIN2_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_ENDEPIN2_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_ENDEPIN2_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to enable interrupt for ENDEPIN[1] event */ +#define USBD_INTENSET_ENDEPIN1_Pos (3UL) /*!< Position of ENDEPIN1 field. */ +#define USBD_INTENSET_ENDEPIN1_Msk (0x1UL << USBD_INTENSET_ENDEPIN1_Pos) /*!< Bit mask of ENDEPIN1 field. */ +#define USBD_INTENSET_ENDEPIN1_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_ENDEPIN1_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_ENDEPIN1_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to enable interrupt for ENDEPIN[0] event */ +#define USBD_INTENSET_ENDEPIN0_Pos (2UL) /*!< Position of ENDEPIN0 field. */ +#define USBD_INTENSET_ENDEPIN0_Msk (0x1UL << USBD_INTENSET_ENDEPIN0_Pos) /*!< Bit mask of ENDEPIN0 field. */ +#define USBD_INTENSET_ENDEPIN0_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_ENDEPIN0_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_ENDEPIN0_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to enable interrupt for STARTED event */ +#define USBD_INTENSET_STARTED_Pos (1UL) /*!< Position of STARTED field. */ +#define USBD_INTENSET_STARTED_Msk (0x1UL << USBD_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define USBD_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_STARTED_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to enable interrupt for USBRESET event */ +#define USBD_INTENSET_USBRESET_Pos (0UL) /*!< Position of USBRESET field. */ +#define USBD_INTENSET_USBRESET_Msk (0x1UL << USBD_INTENSET_USBRESET_Pos) /*!< Bit mask of USBRESET field. */ +#define USBD_INTENSET_USBRESET_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENSET_USBRESET_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENSET_USBRESET_Set (1UL) /*!< Enable */ + +/* Register: USBD_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 24 : Write '1' to disable interrupt for EPDATA event */ +#define USBD_INTENCLR_EPDATA_Pos (24UL) /*!< Position of EPDATA field. */ +#define USBD_INTENCLR_EPDATA_Msk (0x1UL << USBD_INTENCLR_EPDATA_Pos) /*!< Bit mask of EPDATA field. */ +#define USBD_INTENCLR_EPDATA_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_EPDATA_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_EPDATA_Clear (1UL) /*!< Disable */ + +/* Bit 23 : Write '1' to disable interrupt for EP0SETUP event */ +#define USBD_INTENCLR_EP0SETUP_Pos (23UL) /*!< Position of EP0SETUP field. */ +#define USBD_INTENCLR_EP0SETUP_Msk (0x1UL << USBD_INTENCLR_EP0SETUP_Pos) /*!< Bit mask of EP0SETUP field. */ +#define USBD_INTENCLR_EP0SETUP_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_EP0SETUP_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_EP0SETUP_Clear (1UL) /*!< Disable */ + +/* Bit 22 : Write '1' to disable interrupt for USBEVENT event */ +#define USBD_INTENCLR_USBEVENT_Pos (22UL) /*!< Position of USBEVENT field. */ +#define USBD_INTENCLR_USBEVENT_Msk (0x1UL << USBD_INTENCLR_USBEVENT_Pos) /*!< Bit mask of USBEVENT field. */ +#define USBD_INTENCLR_USBEVENT_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_USBEVENT_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_USBEVENT_Clear (1UL) /*!< Disable */ + +/* Bit 21 : Write '1' to disable interrupt for SOF event */ +#define USBD_INTENCLR_SOF_Pos (21UL) /*!< Position of SOF field. */ +#define USBD_INTENCLR_SOF_Msk (0x1UL << USBD_INTENCLR_SOF_Pos) /*!< Bit mask of SOF field. */ +#define USBD_INTENCLR_SOF_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_SOF_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_SOF_Clear (1UL) /*!< Disable */ + +/* Bit 20 : Write '1' to disable interrupt for ENDISOOUT event */ +#define USBD_INTENCLR_ENDISOOUT_Pos (20UL) /*!< Position of ENDISOOUT field. */ +#define USBD_INTENCLR_ENDISOOUT_Msk (0x1UL << USBD_INTENCLR_ENDISOOUT_Pos) /*!< Bit mask of ENDISOOUT field. */ +#define USBD_INTENCLR_ENDISOOUT_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_ENDISOOUT_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_ENDISOOUT_Clear (1UL) /*!< Disable */ + +/* Bit 19 : Write '1' to disable interrupt for ENDEPOUT[7] event */ +#define USBD_INTENCLR_ENDEPOUT7_Pos (19UL) /*!< Position of ENDEPOUT7 field. */ +#define USBD_INTENCLR_ENDEPOUT7_Msk (0x1UL << USBD_INTENCLR_ENDEPOUT7_Pos) /*!< Bit mask of ENDEPOUT7 field. */ +#define USBD_INTENCLR_ENDEPOUT7_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_ENDEPOUT7_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_ENDEPOUT7_Clear (1UL) /*!< Disable */ + +/* Bit 18 : Write '1' to disable interrupt for ENDEPOUT[6] event */ +#define USBD_INTENCLR_ENDEPOUT6_Pos (18UL) /*!< Position of ENDEPOUT6 field. */ +#define USBD_INTENCLR_ENDEPOUT6_Msk (0x1UL << USBD_INTENCLR_ENDEPOUT6_Pos) /*!< Bit mask of ENDEPOUT6 field. */ +#define USBD_INTENCLR_ENDEPOUT6_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_ENDEPOUT6_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_ENDEPOUT6_Clear (1UL) /*!< Disable */ + +/* Bit 17 : Write '1' to disable interrupt for ENDEPOUT[5] event */ +#define USBD_INTENCLR_ENDEPOUT5_Pos (17UL) /*!< Position of ENDEPOUT5 field. */ +#define USBD_INTENCLR_ENDEPOUT5_Msk (0x1UL << USBD_INTENCLR_ENDEPOUT5_Pos) /*!< Bit mask of ENDEPOUT5 field. */ +#define USBD_INTENCLR_ENDEPOUT5_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_ENDEPOUT5_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_ENDEPOUT5_Clear (1UL) /*!< Disable */ + +/* Bit 16 : Write '1' to disable interrupt for ENDEPOUT[4] event */ +#define USBD_INTENCLR_ENDEPOUT4_Pos (16UL) /*!< Position of ENDEPOUT4 field. */ +#define USBD_INTENCLR_ENDEPOUT4_Msk (0x1UL << USBD_INTENCLR_ENDEPOUT4_Pos) /*!< Bit mask of ENDEPOUT4 field. */ +#define USBD_INTENCLR_ENDEPOUT4_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_ENDEPOUT4_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_ENDEPOUT4_Clear (1UL) /*!< Disable */ + +/* Bit 15 : Write '1' to disable interrupt for ENDEPOUT[3] event */ +#define USBD_INTENCLR_ENDEPOUT3_Pos (15UL) /*!< Position of ENDEPOUT3 field. */ +#define USBD_INTENCLR_ENDEPOUT3_Msk (0x1UL << USBD_INTENCLR_ENDEPOUT3_Pos) /*!< Bit mask of ENDEPOUT3 field. */ +#define USBD_INTENCLR_ENDEPOUT3_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_ENDEPOUT3_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_ENDEPOUT3_Clear (1UL) /*!< Disable */ + +/* Bit 14 : Write '1' to disable interrupt for ENDEPOUT[2] event */ +#define USBD_INTENCLR_ENDEPOUT2_Pos (14UL) /*!< Position of ENDEPOUT2 field. */ +#define USBD_INTENCLR_ENDEPOUT2_Msk (0x1UL << USBD_INTENCLR_ENDEPOUT2_Pos) /*!< Bit mask of ENDEPOUT2 field. */ +#define USBD_INTENCLR_ENDEPOUT2_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_ENDEPOUT2_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_ENDEPOUT2_Clear (1UL) /*!< Disable */ + +/* Bit 13 : Write '1' to disable interrupt for ENDEPOUT[1] event */ +#define USBD_INTENCLR_ENDEPOUT1_Pos (13UL) /*!< Position of ENDEPOUT1 field. */ +#define USBD_INTENCLR_ENDEPOUT1_Msk (0x1UL << USBD_INTENCLR_ENDEPOUT1_Pos) /*!< Bit mask of ENDEPOUT1 field. */ +#define USBD_INTENCLR_ENDEPOUT1_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_ENDEPOUT1_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_ENDEPOUT1_Clear (1UL) /*!< Disable */ + +/* Bit 12 : Write '1' to disable interrupt for ENDEPOUT[0] event */ +#define USBD_INTENCLR_ENDEPOUT0_Pos (12UL) /*!< Position of ENDEPOUT0 field. */ +#define USBD_INTENCLR_ENDEPOUT0_Msk (0x1UL << USBD_INTENCLR_ENDEPOUT0_Pos) /*!< Bit mask of ENDEPOUT0 field. */ +#define USBD_INTENCLR_ENDEPOUT0_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_ENDEPOUT0_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_ENDEPOUT0_Clear (1UL) /*!< Disable */ + +/* Bit 11 : Write '1' to disable interrupt for ENDISOIN event */ +#define USBD_INTENCLR_ENDISOIN_Pos (11UL) /*!< Position of ENDISOIN field. */ +#define USBD_INTENCLR_ENDISOIN_Msk (0x1UL << USBD_INTENCLR_ENDISOIN_Pos) /*!< Bit mask of ENDISOIN field. */ +#define USBD_INTENCLR_ENDISOIN_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_ENDISOIN_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_ENDISOIN_Clear (1UL) /*!< Disable */ + +/* Bit 10 : Write '1' to disable interrupt for EP0DATADONE event */ +#define USBD_INTENCLR_EP0DATADONE_Pos (10UL) /*!< Position of EP0DATADONE field. */ +#define USBD_INTENCLR_EP0DATADONE_Msk (0x1UL << USBD_INTENCLR_EP0DATADONE_Pos) /*!< Bit mask of EP0DATADONE field. */ +#define USBD_INTENCLR_EP0DATADONE_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_EP0DATADONE_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_EP0DATADONE_Clear (1UL) /*!< Disable */ + +/* Bit 9 : Write '1' to disable interrupt for ENDEPIN[7] event */ +#define USBD_INTENCLR_ENDEPIN7_Pos (9UL) /*!< Position of ENDEPIN7 field. */ +#define USBD_INTENCLR_ENDEPIN7_Msk (0x1UL << USBD_INTENCLR_ENDEPIN7_Pos) /*!< Bit mask of ENDEPIN7 field. */ +#define USBD_INTENCLR_ENDEPIN7_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_ENDEPIN7_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_ENDEPIN7_Clear (1UL) /*!< Disable */ + +/* Bit 8 : Write '1' to disable interrupt for ENDEPIN[6] event */ +#define USBD_INTENCLR_ENDEPIN6_Pos (8UL) /*!< Position of ENDEPIN6 field. */ +#define USBD_INTENCLR_ENDEPIN6_Msk (0x1UL << USBD_INTENCLR_ENDEPIN6_Pos) /*!< Bit mask of ENDEPIN6 field. */ +#define USBD_INTENCLR_ENDEPIN6_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_ENDEPIN6_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_ENDEPIN6_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to disable interrupt for ENDEPIN[5] event */ +#define USBD_INTENCLR_ENDEPIN5_Pos (7UL) /*!< Position of ENDEPIN5 field. */ +#define USBD_INTENCLR_ENDEPIN5_Msk (0x1UL << USBD_INTENCLR_ENDEPIN5_Pos) /*!< Bit mask of ENDEPIN5 field. */ +#define USBD_INTENCLR_ENDEPIN5_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_ENDEPIN5_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_ENDEPIN5_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to disable interrupt for ENDEPIN[4] event */ +#define USBD_INTENCLR_ENDEPIN4_Pos (6UL) /*!< Position of ENDEPIN4 field. */ +#define USBD_INTENCLR_ENDEPIN4_Msk (0x1UL << USBD_INTENCLR_ENDEPIN4_Pos) /*!< Bit mask of ENDEPIN4 field. */ +#define USBD_INTENCLR_ENDEPIN4_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_ENDEPIN4_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_ENDEPIN4_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to disable interrupt for ENDEPIN[3] event */ +#define USBD_INTENCLR_ENDEPIN3_Pos (5UL) /*!< Position of ENDEPIN3 field. */ +#define USBD_INTENCLR_ENDEPIN3_Msk (0x1UL << USBD_INTENCLR_ENDEPIN3_Pos) /*!< Bit mask of ENDEPIN3 field. */ +#define USBD_INTENCLR_ENDEPIN3_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_ENDEPIN3_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_ENDEPIN3_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to disable interrupt for ENDEPIN[2] event */ +#define USBD_INTENCLR_ENDEPIN2_Pos (4UL) /*!< Position of ENDEPIN2 field. */ +#define USBD_INTENCLR_ENDEPIN2_Msk (0x1UL << USBD_INTENCLR_ENDEPIN2_Pos) /*!< Bit mask of ENDEPIN2 field. */ +#define USBD_INTENCLR_ENDEPIN2_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_ENDEPIN2_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_ENDEPIN2_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to disable interrupt for ENDEPIN[1] event */ +#define USBD_INTENCLR_ENDEPIN1_Pos (3UL) /*!< Position of ENDEPIN1 field. */ +#define USBD_INTENCLR_ENDEPIN1_Msk (0x1UL << USBD_INTENCLR_ENDEPIN1_Pos) /*!< Bit mask of ENDEPIN1 field. */ +#define USBD_INTENCLR_ENDEPIN1_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_ENDEPIN1_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_ENDEPIN1_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to disable interrupt for ENDEPIN[0] event */ +#define USBD_INTENCLR_ENDEPIN0_Pos (2UL) /*!< Position of ENDEPIN0 field. */ +#define USBD_INTENCLR_ENDEPIN0_Msk (0x1UL << USBD_INTENCLR_ENDEPIN0_Pos) /*!< Bit mask of ENDEPIN0 field. */ +#define USBD_INTENCLR_ENDEPIN0_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_ENDEPIN0_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_ENDEPIN0_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to disable interrupt for STARTED event */ +#define USBD_INTENCLR_STARTED_Pos (1UL) /*!< Position of STARTED field. */ +#define USBD_INTENCLR_STARTED_Msk (0x1UL << USBD_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define USBD_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_STARTED_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to disable interrupt for USBRESET event */ +#define USBD_INTENCLR_USBRESET_Pos (0UL) /*!< Position of USBRESET field. */ +#define USBD_INTENCLR_USBRESET_Msk (0x1UL << USBD_INTENCLR_USBRESET_Pos) /*!< Bit mask of USBRESET field. */ +#define USBD_INTENCLR_USBRESET_Disabled (0UL) /*!< Read: Disabled */ +#define USBD_INTENCLR_USBRESET_Enabled (1UL) /*!< Read: Enabled */ +#define USBD_INTENCLR_USBRESET_Clear (1UL) /*!< Disable */ + +/* Register: USBD_EVENTCAUSE */ +/* Description: Details on what caused the USBEVENT event */ + +/* Bit 11 : USB device is ready for normal operation. Write '1' to clear. */ +#define USBD_EVENTCAUSE_READY_Pos (11UL) /*!< Position of READY field. */ +#define USBD_EVENTCAUSE_READY_Msk (0x1UL << USBD_EVENTCAUSE_READY_Pos) /*!< Bit mask of READY field. */ +#define USBD_EVENTCAUSE_READY_NotDetected (0UL) /*!< USBEVENT was not issued due to USBD peripheral ready */ +#define USBD_EVENTCAUSE_READY_Ready (1UL) /*!< USBD peripheral is ready */ + +/* Bit 10 : USB MAC has been woken up and operational. Write '1' to clear. */ +#define USBD_EVENTCAUSE_USBWUALLOWED_Pos (10UL) /*!< Position of USBWUALLOWED field. */ +#define USBD_EVENTCAUSE_USBWUALLOWED_Msk (0x1UL << USBD_EVENTCAUSE_USBWUALLOWED_Pos) /*!< Bit mask of USBWUALLOWED field. */ +#define USBD_EVENTCAUSE_USBWUALLOWED_NotAllowed (0UL) /*!< Wake up not allowed */ +#define USBD_EVENTCAUSE_USBWUALLOWED_Allowed (1UL) /*!< Wake up allowed */ + +/* Bit 9 : Signals that a RESUME condition (K state or activity restart) has been detected on USB lines. Write '1' to clear. */ +#define USBD_EVENTCAUSE_RESUME_Pos (9UL) /*!< Position of RESUME field. */ +#define USBD_EVENTCAUSE_RESUME_Msk (0x1UL << USBD_EVENTCAUSE_RESUME_Pos) /*!< Bit mask of RESUME field. */ +#define USBD_EVENTCAUSE_RESUME_NotDetected (0UL) /*!< Resume not detected */ +#define USBD_EVENTCAUSE_RESUME_Detected (1UL) /*!< Resume detected */ + +/* Bit 8 : Signals that USB lines have been idle long enough for the device to enter suspend. Write '1' to clear. */ +#define USBD_EVENTCAUSE_SUSPEND_Pos (8UL) /*!< Position of SUSPEND field. */ +#define USBD_EVENTCAUSE_SUSPEND_Msk (0x1UL << USBD_EVENTCAUSE_SUSPEND_Pos) /*!< Bit mask of SUSPEND field. */ +#define USBD_EVENTCAUSE_SUSPEND_NotDetected (0UL) /*!< Suspend not detected */ +#define USBD_EVENTCAUSE_SUSPEND_Detected (1UL) /*!< Suspend detected */ + +/* Bit 0 : CRC error was detected on isochronous OUT endpoint 8. Write '1' to clear. */ +#define USBD_EVENTCAUSE_ISOOUTCRC_Pos (0UL) /*!< Position of ISOOUTCRC field. */ +#define USBD_EVENTCAUSE_ISOOUTCRC_Msk (0x1UL << USBD_EVENTCAUSE_ISOOUTCRC_Pos) /*!< Bit mask of ISOOUTCRC field. */ +#define USBD_EVENTCAUSE_ISOOUTCRC_NotDetected (0UL) /*!< No error detected */ +#define USBD_EVENTCAUSE_ISOOUTCRC_Detected (1UL) /*!< Error detected */ + +/* Register: USBD_HALTED_EPIN */ +/* Description: Description collection[n]: IN endpoint halted status. Can be used as is as response to a GetStatus() request to endpoint. */ + +/* Bits 15..0 : IN endpoint halted status. Can be used as is as response to a GetStatus() request to endpoint. */ +#define USBD_HALTED_EPIN_GETSTATUS_Pos (0UL) /*!< Position of GETSTATUS field. */ +#define USBD_HALTED_EPIN_GETSTATUS_Msk (0xFFFFUL << USBD_HALTED_EPIN_GETSTATUS_Pos) /*!< Bit mask of GETSTATUS field. */ +#define USBD_HALTED_EPIN_GETSTATUS_NotHalted (0UL) /*!< Endpoint is not halted */ +#define USBD_HALTED_EPIN_GETSTATUS_Halted (1UL) /*!< Endpoint is halted */ + +/* Register: USBD_HALTED_EPOUT */ +/* Description: Description collection[n]: OUT endpoint halted status. Can be used as is as response to a GetStatus() request to endpoint. */ + +/* Bits 15..0 : OUT endpoint halted status. Can be used as is as response to a GetStatus() request to endpoint. */ +#define USBD_HALTED_EPOUT_GETSTATUS_Pos (0UL) /*!< Position of GETSTATUS field. */ +#define USBD_HALTED_EPOUT_GETSTATUS_Msk (0xFFFFUL << USBD_HALTED_EPOUT_GETSTATUS_Pos) /*!< Bit mask of GETSTATUS field. */ +#define USBD_HALTED_EPOUT_GETSTATUS_NotHalted (0UL) /*!< Endpoint is not halted */ +#define USBD_HALTED_EPOUT_GETSTATUS_Halted (1UL) /*!< Endpoint is halted */ + +/* Register: USBD_EPSTATUS */ +/* Description: Provides information on which endpoint's EasyDMA registers have been captured */ + +/* Bit 24 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */ +#define USBD_EPSTATUS_EPOUT8_Pos (24UL) /*!< Position of EPOUT8 field. */ +#define USBD_EPSTATUS_EPOUT8_Msk (0x1UL << USBD_EPSTATUS_EPOUT8_Pos) /*!< Bit mask of EPOUT8 field. */ +#define USBD_EPSTATUS_EPOUT8_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ +#define USBD_EPSTATUS_EPOUT8_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ + +/* Bit 23 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */ +#define USBD_EPSTATUS_EPOUT7_Pos (23UL) /*!< Position of EPOUT7 field. */ +#define USBD_EPSTATUS_EPOUT7_Msk (0x1UL << USBD_EPSTATUS_EPOUT7_Pos) /*!< Bit mask of EPOUT7 field. */ +#define USBD_EPSTATUS_EPOUT7_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ +#define USBD_EPSTATUS_EPOUT7_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ + +/* Bit 22 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */ +#define USBD_EPSTATUS_EPOUT6_Pos (22UL) /*!< Position of EPOUT6 field. */ +#define USBD_EPSTATUS_EPOUT6_Msk (0x1UL << USBD_EPSTATUS_EPOUT6_Pos) /*!< Bit mask of EPOUT6 field. */ +#define USBD_EPSTATUS_EPOUT6_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ +#define USBD_EPSTATUS_EPOUT6_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ + +/* Bit 21 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */ +#define USBD_EPSTATUS_EPOUT5_Pos (21UL) /*!< Position of EPOUT5 field. */ +#define USBD_EPSTATUS_EPOUT5_Msk (0x1UL << USBD_EPSTATUS_EPOUT5_Pos) /*!< Bit mask of EPOUT5 field. */ +#define USBD_EPSTATUS_EPOUT5_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ +#define USBD_EPSTATUS_EPOUT5_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ + +/* Bit 20 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */ +#define USBD_EPSTATUS_EPOUT4_Pos (20UL) /*!< Position of EPOUT4 field. */ +#define USBD_EPSTATUS_EPOUT4_Msk (0x1UL << USBD_EPSTATUS_EPOUT4_Pos) /*!< Bit mask of EPOUT4 field. */ +#define USBD_EPSTATUS_EPOUT4_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ +#define USBD_EPSTATUS_EPOUT4_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ + +/* Bit 19 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */ +#define USBD_EPSTATUS_EPOUT3_Pos (19UL) /*!< Position of EPOUT3 field. */ +#define USBD_EPSTATUS_EPOUT3_Msk (0x1UL << USBD_EPSTATUS_EPOUT3_Pos) /*!< Bit mask of EPOUT3 field. */ +#define USBD_EPSTATUS_EPOUT3_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ +#define USBD_EPSTATUS_EPOUT3_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ + +/* Bit 18 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */ +#define USBD_EPSTATUS_EPOUT2_Pos (18UL) /*!< Position of EPOUT2 field. */ +#define USBD_EPSTATUS_EPOUT2_Msk (0x1UL << USBD_EPSTATUS_EPOUT2_Pos) /*!< Bit mask of EPOUT2 field. */ +#define USBD_EPSTATUS_EPOUT2_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ +#define USBD_EPSTATUS_EPOUT2_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ + +/* Bit 17 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */ +#define USBD_EPSTATUS_EPOUT1_Pos (17UL) /*!< Position of EPOUT1 field. */ +#define USBD_EPSTATUS_EPOUT1_Msk (0x1UL << USBD_EPSTATUS_EPOUT1_Pos) /*!< Bit mask of EPOUT1 field. */ +#define USBD_EPSTATUS_EPOUT1_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ +#define USBD_EPSTATUS_EPOUT1_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ + +/* Bit 16 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */ +#define USBD_EPSTATUS_EPOUT0_Pos (16UL) /*!< Position of EPOUT0 field. */ +#define USBD_EPSTATUS_EPOUT0_Msk (0x1UL << USBD_EPSTATUS_EPOUT0_Pos) /*!< Bit mask of EPOUT0 field. */ +#define USBD_EPSTATUS_EPOUT0_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ +#define USBD_EPSTATUS_EPOUT0_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ + +/* Bit 8 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */ +#define USBD_EPSTATUS_EPIN8_Pos (8UL) /*!< Position of EPIN8 field. */ +#define USBD_EPSTATUS_EPIN8_Msk (0x1UL << USBD_EPSTATUS_EPIN8_Pos) /*!< Bit mask of EPIN8 field. */ +#define USBD_EPSTATUS_EPIN8_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ +#define USBD_EPSTATUS_EPIN8_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ + +/* Bit 7 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */ +#define USBD_EPSTATUS_EPIN7_Pos (7UL) /*!< Position of EPIN7 field. */ +#define USBD_EPSTATUS_EPIN7_Msk (0x1UL << USBD_EPSTATUS_EPIN7_Pos) /*!< Bit mask of EPIN7 field. */ +#define USBD_EPSTATUS_EPIN7_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ +#define USBD_EPSTATUS_EPIN7_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ + +/* Bit 6 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */ +#define USBD_EPSTATUS_EPIN6_Pos (6UL) /*!< Position of EPIN6 field. */ +#define USBD_EPSTATUS_EPIN6_Msk (0x1UL << USBD_EPSTATUS_EPIN6_Pos) /*!< Bit mask of EPIN6 field. */ +#define USBD_EPSTATUS_EPIN6_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ +#define USBD_EPSTATUS_EPIN6_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ + +/* Bit 5 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */ +#define USBD_EPSTATUS_EPIN5_Pos (5UL) /*!< Position of EPIN5 field. */ +#define USBD_EPSTATUS_EPIN5_Msk (0x1UL << USBD_EPSTATUS_EPIN5_Pos) /*!< Bit mask of EPIN5 field. */ +#define USBD_EPSTATUS_EPIN5_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ +#define USBD_EPSTATUS_EPIN5_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ + +/* Bit 4 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */ +#define USBD_EPSTATUS_EPIN4_Pos (4UL) /*!< Position of EPIN4 field. */ +#define USBD_EPSTATUS_EPIN4_Msk (0x1UL << USBD_EPSTATUS_EPIN4_Pos) /*!< Bit mask of EPIN4 field. */ +#define USBD_EPSTATUS_EPIN4_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ +#define USBD_EPSTATUS_EPIN4_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ + +/* Bit 3 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */ +#define USBD_EPSTATUS_EPIN3_Pos (3UL) /*!< Position of EPIN3 field. */ +#define USBD_EPSTATUS_EPIN3_Msk (0x1UL << USBD_EPSTATUS_EPIN3_Pos) /*!< Bit mask of EPIN3 field. */ +#define USBD_EPSTATUS_EPIN3_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ +#define USBD_EPSTATUS_EPIN3_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ + +/* Bit 2 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */ +#define USBD_EPSTATUS_EPIN2_Pos (2UL) /*!< Position of EPIN2 field. */ +#define USBD_EPSTATUS_EPIN2_Msk (0x1UL << USBD_EPSTATUS_EPIN2_Pos) /*!< Bit mask of EPIN2 field. */ +#define USBD_EPSTATUS_EPIN2_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ +#define USBD_EPSTATUS_EPIN2_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ + +/* Bit 1 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */ +#define USBD_EPSTATUS_EPIN1_Pos (1UL) /*!< Position of EPIN1 field. */ +#define USBD_EPSTATUS_EPIN1_Msk (0x1UL << USBD_EPSTATUS_EPIN1_Pos) /*!< Bit mask of EPIN1 field. */ +#define USBD_EPSTATUS_EPIN1_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ +#define USBD_EPSTATUS_EPIN1_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ + +/* Bit 0 : Captured state of endpoint's EasyDMA registers. Write '1' to clear. */ +#define USBD_EPSTATUS_EPIN0_Pos (0UL) /*!< Position of EPIN0 field. */ +#define USBD_EPSTATUS_EPIN0_Msk (0x1UL << USBD_EPSTATUS_EPIN0_Pos) /*!< Bit mask of EPIN0 field. */ +#define USBD_EPSTATUS_EPIN0_NoData (0UL) /*!< EasyDMA registers have not been captured for this endpoint */ +#define USBD_EPSTATUS_EPIN0_DataDone (1UL) /*!< EasyDMA registers have been captured for this endpoint */ + +/* Register: USBD_EPDATASTATUS */ +/* Description: Provides information on which endpoint(s) an acknowledged data transfer has occurred (EPDATA event) */ + +/* Bit 23 : Acknowledged data transfer on this OUT endpoint. Write '1' to clear. */ +#define USBD_EPDATASTATUS_EPOUT7_Pos (23UL) /*!< Position of EPOUT7 field. */ +#define USBD_EPDATASTATUS_EPOUT7_Msk (0x1UL << USBD_EPDATASTATUS_EPOUT7_Pos) /*!< Bit mask of EPOUT7 field. */ +#define USBD_EPDATASTATUS_EPOUT7_NotStarted (0UL) /*!< No acknowledged data transfer on this endpoint */ +#define USBD_EPDATASTATUS_EPOUT7_Started (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ + +/* Bit 22 : Acknowledged data transfer on this OUT endpoint. Write '1' to clear. */ +#define USBD_EPDATASTATUS_EPOUT6_Pos (22UL) /*!< Position of EPOUT6 field. */ +#define USBD_EPDATASTATUS_EPOUT6_Msk (0x1UL << USBD_EPDATASTATUS_EPOUT6_Pos) /*!< Bit mask of EPOUT6 field. */ +#define USBD_EPDATASTATUS_EPOUT6_NotStarted (0UL) /*!< No acknowledged data transfer on this endpoint */ +#define USBD_EPDATASTATUS_EPOUT6_Started (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ + +/* Bit 21 : Acknowledged data transfer on this OUT endpoint. Write '1' to clear. */ +#define USBD_EPDATASTATUS_EPOUT5_Pos (21UL) /*!< Position of EPOUT5 field. */ +#define USBD_EPDATASTATUS_EPOUT5_Msk (0x1UL << USBD_EPDATASTATUS_EPOUT5_Pos) /*!< Bit mask of EPOUT5 field. */ +#define USBD_EPDATASTATUS_EPOUT5_NotStarted (0UL) /*!< No acknowledged data transfer on this endpoint */ +#define USBD_EPDATASTATUS_EPOUT5_Started (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ + +/* Bit 20 : Acknowledged data transfer on this OUT endpoint. Write '1' to clear. */ +#define USBD_EPDATASTATUS_EPOUT4_Pos (20UL) /*!< Position of EPOUT4 field. */ +#define USBD_EPDATASTATUS_EPOUT4_Msk (0x1UL << USBD_EPDATASTATUS_EPOUT4_Pos) /*!< Bit mask of EPOUT4 field. */ +#define USBD_EPDATASTATUS_EPOUT4_NotStarted (0UL) /*!< No acknowledged data transfer on this endpoint */ +#define USBD_EPDATASTATUS_EPOUT4_Started (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ + +/* Bit 19 : Acknowledged data transfer on this OUT endpoint. Write '1' to clear. */ +#define USBD_EPDATASTATUS_EPOUT3_Pos (19UL) /*!< Position of EPOUT3 field. */ +#define USBD_EPDATASTATUS_EPOUT3_Msk (0x1UL << USBD_EPDATASTATUS_EPOUT3_Pos) /*!< Bit mask of EPOUT3 field. */ +#define USBD_EPDATASTATUS_EPOUT3_NotStarted (0UL) /*!< No acknowledged data transfer on this endpoint */ +#define USBD_EPDATASTATUS_EPOUT3_Started (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ + +/* Bit 18 : Acknowledged data transfer on this OUT endpoint. Write '1' to clear. */ +#define USBD_EPDATASTATUS_EPOUT2_Pos (18UL) /*!< Position of EPOUT2 field. */ +#define USBD_EPDATASTATUS_EPOUT2_Msk (0x1UL << USBD_EPDATASTATUS_EPOUT2_Pos) /*!< Bit mask of EPOUT2 field. */ +#define USBD_EPDATASTATUS_EPOUT2_NotStarted (0UL) /*!< No acknowledged data transfer on this endpoint */ +#define USBD_EPDATASTATUS_EPOUT2_Started (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ + +/* Bit 17 : Acknowledged data transfer on this OUT endpoint. Write '1' to clear. */ +#define USBD_EPDATASTATUS_EPOUT1_Pos (17UL) /*!< Position of EPOUT1 field. */ +#define USBD_EPDATASTATUS_EPOUT1_Msk (0x1UL << USBD_EPDATASTATUS_EPOUT1_Pos) /*!< Bit mask of EPOUT1 field. */ +#define USBD_EPDATASTATUS_EPOUT1_NotStarted (0UL) /*!< No acknowledged data transfer on this endpoint */ +#define USBD_EPDATASTATUS_EPOUT1_Started (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ + +/* Bit 7 : Acknowledged data transfer on this IN endpoint. Write '1' to clear. */ +#define USBD_EPDATASTATUS_EPIN7_Pos (7UL) /*!< Position of EPIN7 field. */ +#define USBD_EPDATASTATUS_EPIN7_Msk (0x1UL << USBD_EPDATASTATUS_EPIN7_Pos) /*!< Bit mask of EPIN7 field. */ +#define USBD_EPDATASTATUS_EPIN7_NotDone (0UL) /*!< No acknowledged data transfer on this endpoint */ +#define USBD_EPDATASTATUS_EPIN7_DataDone (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ + +/* Bit 6 : Acknowledged data transfer on this IN endpoint. Write '1' to clear. */ +#define USBD_EPDATASTATUS_EPIN6_Pos (6UL) /*!< Position of EPIN6 field. */ +#define USBD_EPDATASTATUS_EPIN6_Msk (0x1UL << USBD_EPDATASTATUS_EPIN6_Pos) /*!< Bit mask of EPIN6 field. */ +#define USBD_EPDATASTATUS_EPIN6_NotDone (0UL) /*!< No acknowledged data transfer on this endpoint */ +#define USBD_EPDATASTATUS_EPIN6_DataDone (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ + +/* Bit 5 : Acknowledged data transfer on this IN endpoint. Write '1' to clear. */ +#define USBD_EPDATASTATUS_EPIN5_Pos (5UL) /*!< Position of EPIN5 field. */ +#define USBD_EPDATASTATUS_EPIN5_Msk (0x1UL << USBD_EPDATASTATUS_EPIN5_Pos) /*!< Bit mask of EPIN5 field. */ +#define USBD_EPDATASTATUS_EPIN5_NotDone (0UL) /*!< No acknowledged data transfer on this endpoint */ +#define USBD_EPDATASTATUS_EPIN5_DataDone (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ + +/* Bit 4 : Acknowledged data transfer on this IN endpoint. Write '1' to clear. */ +#define USBD_EPDATASTATUS_EPIN4_Pos (4UL) /*!< Position of EPIN4 field. */ +#define USBD_EPDATASTATUS_EPIN4_Msk (0x1UL << USBD_EPDATASTATUS_EPIN4_Pos) /*!< Bit mask of EPIN4 field. */ +#define USBD_EPDATASTATUS_EPIN4_NotDone (0UL) /*!< No acknowledged data transfer on this endpoint */ +#define USBD_EPDATASTATUS_EPIN4_DataDone (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ + +/* Bit 3 : Acknowledged data transfer on this IN endpoint. Write '1' to clear. */ +#define USBD_EPDATASTATUS_EPIN3_Pos (3UL) /*!< Position of EPIN3 field. */ +#define USBD_EPDATASTATUS_EPIN3_Msk (0x1UL << USBD_EPDATASTATUS_EPIN3_Pos) /*!< Bit mask of EPIN3 field. */ +#define USBD_EPDATASTATUS_EPIN3_NotDone (0UL) /*!< No acknowledged data transfer on this endpoint */ +#define USBD_EPDATASTATUS_EPIN3_DataDone (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ + +/* Bit 2 : Acknowledged data transfer on this IN endpoint. Write '1' to clear. */ +#define USBD_EPDATASTATUS_EPIN2_Pos (2UL) /*!< Position of EPIN2 field. */ +#define USBD_EPDATASTATUS_EPIN2_Msk (0x1UL << USBD_EPDATASTATUS_EPIN2_Pos) /*!< Bit mask of EPIN2 field. */ +#define USBD_EPDATASTATUS_EPIN2_NotDone (0UL) /*!< No acknowledged data transfer on this endpoint */ +#define USBD_EPDATASTATUS_EPIN2_DataDone (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ + +/* Bit 1 : Acknowledged data transfer on this IN endpoint. Write '1' to clear. */ +#define USBD_EPDATASTATUS_EPIN1_Pos (1UL) /*!< Position of EPIN1 field. */ +#define USBD_EPDATASTATUS_EPIN1_Msk (0x1UL << USBD_EPDATASTATUS_EPIN1_Pos) /*!< Bit mask of EPIN1 field. */ +#define USBD_EPDATASTATUS_EPIN1_NotDone (0UL) /*!< No acknowledged data transfer on this endpoint */ +#define USBD_EPDATASTATUS_EPIN1_DataDone (1UL) /*!< Acknowledged data transfer on this endpoint has occurred */ + +/* Register: USBD_USBADDR */ +/* Description: Device USB address */ + +/* Bits 6..0 : Device USB address */ +#define USBD_USBADDR_ADDR_Pos (0UL) /*!< Position of ADDR field. */ +#define USBD_USBADDR_ADDR_Msk (0x7FUL << USBD_USBADDR_ADDR_Pos) /*!< Bit mask of ADDR field. */ + +/* Register: USBD_BMREQUESTTYPE */ +/* Description: SETUP data, byte 0, bmRequestType */ + +/* Bit 7 : Data transfer direction */ +#define USBD_BMREQUESTTYPE_DIRECTION_Pos (7UL) /*!< Position of DIRECTION field. */ +#define USBD_BMREQUESTTYPE_DIRECTION_Msk (0x1UL << USBD_BMREQUESTTYPE_DIRECTION_Pos) /*!< Bit mask of DIRECTION field. */ +#define USBD_BMREQUESTTYPE_DIRECTION_HostToDevice (0UL) /*!< Host-to-device */ +#define USBD_BMREQUESTTYPE_DIRECTION_DeviceToHost (1UL) /*!< Device-to-host */ + +/* Bits 6..5 : Data transfer type */ +#define USBD_BMREQUESTTYPE_TYPE_Pos (5UL) /*!< Position of TYPE field. */ +#define USBD_BMREQUESTTYPE_TYPE_Msk (0x3UL << USBD_BMREQUESTTYPE_TYPE_Pos) /*!< Bit mask of TYPE field. */ +#define USBD_BMREQUESTTYPE_TYPE_Standard (0UL) /*!< Standard */ +#define USBD_BMREQUESTTYPE_TYPE_Class (1UL) /*!< Class */ +#define USBD_BMREQUESTTYPE_TYPE_Vendor (2UL) /*!< Vendor */ + +/* Bits 4..0 : Data transfer type */ +#define USBD_BMREQUESTTYPE_RECIPIENT_Pos (0UL) /*!< Position of RECIPIENT field. */ +#define USBD_BMREQUESTTYPE_RECIPIENT_Msk (0x1FUL << USBD_BMREQUESTTYPE_RECIPIENT_Pos) /*!< Bit mask of RECIPIENT field. */ +#define USBD_BMREQUESTTYPE_RECIPIENT_Device (0UL) /*!< Device */ +#define USBD_BMREQUESTTYPE_RECIPIENT_Interface (1UL) /*!< Interface */ +#define USBD_BMREQUESTTYPE_RECIPIENT_Endpoint (2UL) /*!< Endpoint */ +#define USBD_BMREQUESTTYPE_RECIPIENT_Other (3UL) /*!< Other */ + +/* Register: USBD_BREQUEST */ +/* Description: SETUP data, byte 1, bRequest */ + +/* Bits 7..0 : SETUP data, byte 1, bRequest. Values provided for standard requests only, user must implement class and vendor values. */ +#define USBD_BREQUEST_BREQUEST_Pos (0UL) /*!< Position of BREQUEST field. */ +#define USBD_BREQUEST_BREQUEST_Msk (0xFFUL << USBD_BREQUEST_BREQUEST_Pos) /*!< Bit mask of BREQUEST field. */ +#define USBD_BREQUEST_BREQUEST_STD_GET_STATUS (0UL) /*!< Standard request GET_STATUS */ +#define USBD_BREQUEST_BREQUEST_STD_CLEAR_FEATURE (1UL) /*!< Standard request CLEAR_FEATURE */ +#define USBD_BREQUEST_BREQUEST_STD_SET_FEATURE (3UL) /*!< Standard request SET_FEATURE */ +#define USBD_BREQUEST_BREQUEST_STD_SET_ADDRESS (5UL) /*!< Standard request SET_ADDRESS */ +#define USBD_BREQUEST_BREQUEST_STD_GET_DESCRIPTOR (6UL) /*!< Standard request GET_DESCRIPTOR */ +#define USBD_BREQUEST_BREQUEST_STD_SET_DESCRIPTOR (7UL) /*!< Standard request SET_DESCRIPTOR */ +#define USBD_BREQUEST_BREQUEST_STD_GET_CONFIGURATION (8UL) /*!< Standard request GET_CONFIGURATION */ +#define USBD_BREQUEST_BREQUEST_STD_SET_CONFIGURATION (9UL) /*!< Standard request SET_CONFIGURATION */ +#define USBD_BREQUEST_BREQUEST_STD_GET_INTERFACE (10UL) /*!< Standard request GET_INTERFACE */ +#define USBD_BREQUEST_BREQUEST_STD_SET_INTERFACE (11UL) /*!< Standard request SET_INTERFACE */ +#define USBD_BREQUEST_BREQUEST_STD_SYNCH_FRAME (12UL) /*!< Standard request SYNCH_FRAME */ + +/* Register: USBD_WVALUEL */ +/* Description: SETUP data, byte 2, LSB of wValue */ + +/* Bits 7..0 : SETUP data, byte 2, LSB of wValue */ +#define USBD_WVALUEL_WVALUEL_Pos (0UL) /*!< Position of WVALUEL field. */ +#define USBD_WVALUEL_WVALUEL_Msk (0xFFUL << USBD_WVALUEL_WVALUEL_Pos) /*!< Bit mask of WVALUEL field. */ + +/* Register: USBD_WVALUEH */ +/* Description: SETUP data, byte 3, MSB of wValue */ + +/* Bits 7..0 : SETUP data, byte 3, MSB of wValue */ +#define USBD_WVALUEH_WVALUEH_Pos (0UL) /*!< Position of WVALUEH field. */ +#define USBD_WVALUEH_WVALUEH_Msk (0xFFUL << USBD_WVALUEH_WVALUEH_Pos) /*!< Bit mask of WVALUEH field. */ + +/* Register: USBD_WINDEXL */ +/* Description: SETUP data, byte 4, LSB of wIndex */ + +/* Bits 7..0 : SETUP data, byte 4, LSB of wIndex */ +#define USBD_WINDEXL_WINDEXL_Pos (0UL) /*!< Position of WINDEXL field. */ +#define USBD_WINDEXL_WINDEXL_Msk (0xFFUL << USBD_WINDEXL_WINDEXL_Pos) /*!< Bit mask of WINDEXL field. */ + +/* Register: USBD_WINDEXH */ +/* Description: SETUP data, byte 5, MSB of wIndex */ + +/* Bits 7..0 : SETUP data, byte 5, MSB of wIndex */ +#define USBD_WINDEXH_WINDEXH_Pos (0UL) /*!< Position of WINDEXH field. */ +#define USBD_WINDEXH_WINDEXH_Msk (0xFFUL << USBD_WINDEXH_WINDEXH_Pos) /*!< Bit mask of WINDEXH field. */ + +/* Register: USBD_WLENGTHL */ +/* Description: SETUP data, byte 6, LSB of wLength */ + +/* Bits 7..0 : SETUP data, byte 6, LSB of wLength */ +#define USBD_WLENGTHL_WLENGTHL_Pos (0UL) /*!< Position of WLENGTHL field. */ +#define USBD_WLENGTHL_WLENGTHL_Msk (0xFFUL << USBD_WLENGTHL_WLENGTHL_Pos) /*!< Bit mask of WLENGTHL field. */ + +/* Register: USBD_WLENGTHH */ +/* Description: SETUP data, byte 7, MSB of wLength */ + +/* Bits 7..0 : SETUP data, byte 7, MSB of wLength */ +#define USBD_WLENGTHH_WLENGTHH_Pos (0UL) /*!< Position of WLENGTHH field. */ +#define USBD_WLENGTHH_WLENGTHH_Msk (0xFFUL << USBD_WLENGTHH_WLENGTHH_Pos) /*!< Bit mask of WLENGTHH field. */ + +/* Register: USBD_SIZE_EPOUT */ +/* Description: Description collection[n]: Number of bytes received last in the data stage of this OUT endpoint */ + +/* Bits 6..0 : Number of bytes received last in the data stage of this OUT endpoint */ +#define USBD_SIZE_EPOUT_SIZE_Pos (0UL) /*!< Position of SIZE field. */ +#define USBD_SIZE_EPOUT_SIZE_Msk (0x7FUL << USBD_SIZE_EPOUT_SIZE_Pos) /*!< Bit mask of SIZE field. */ + +/* Register: USBD_SIZE_ISOOUT */ +/* Description: Number of bytes received last on this ISO OUT data endpoint */ + +/* Bit 16 : Zero-length data packet received */ +#define USBD_SIZE_ISOOUT_ZERO_Pos (16UL) /*!< Position of ZERO field. */ +#define USBD_SIZE_ISOOUT_ZERO_Msk (0x1UL << USBD_SIZE_ISOOUT_ZERO_Pos) /*!< Bit mask of ZERO field. */ +#define USBD_SIZE_ISOOUT_ZERO_Normal (0UL) /*!< No zero-length data received, use value in SIZE */ +#define USBD_SIZE_ISOOUT_ZERO_ZeroData (1UL) /*!< Zero-length data received, ignore value in SIZE */ + +/* Bits 9..0 : Number of bytes received last on this ISO OUT data endpoint */ +#define USBD_SIZE_ISOOUT_SIZE_Pos (0UL) /*!< Position of SIZE field. */ +#define USBD_SIZE_ISOOUT_SIZE_Msk (0x3FFUL << USBD_SIZE_ISOOUT_SIZE_Pos) /*!< Bit mask of SIZE field. */ + +/* Register: USBD_ENABLE */ +/* Description: Enable USB */ + +/* Bit 0 : Enable USB */ +#define USBD_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define USBD_ENABLE_ENABLE_Msk (0x1UL << USBD_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define USBD_ENABLE_ENABLE_Disabled (0UL) /*!< USB peripheral is disabled */ +#define USBD_ENABLE_ENABLE_Enabled (1UL) /*!< USB peripheral is enabled */ + +/* Register: USBD_USBPULLUP */ +/* Description: Control of the USB pull-up */ + +/* Bit 0 : Control of the USB pull-up on the D+ line */ +#define USBD_USBPULLUP_CONNECT_Pos (0UL) /*!< Position of CONNECT field. */ +#define USBD_USBPULLUP_CONNECT_Msk (0x1UL << USBD_USBPULLUP_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define USBD_USBPULLUP_CONNECT_Disabled (0UL) /*!< Pull-up is disconnected */ +#define USBD_USBPULLUP_CONNECT_Enabled (1UL) /*!< Pull-up is connected to D+ */ + +/* Register: USBD_DPDMVALUE */ +/* Description: State D+ and D- lines will be forced into by the DPDMDRIVE task. The DPDMNODRIVE task reverts the control of the lines to MAC IP (no forcing). */ + +/* Bits 4..0 : State D+ and D- lines will be forced into by the DPDMDRIVE task */ +#define USBD_DPDMVALUE_STATE_Pos (0UL) /*!< Position of STATE field. */ +#define USBD_DPDMVALUE_STATE_Msk (0x1FUL << USBD_DPDMVALUE_STATE_Pos) /*!< Bit mask of STATE field. */ +#define USBD_DPDMVALUE_STATE_Resume (1UL) /*!< D+ forced low, D- forced high (K state) for a timing preset in hardware (50 us or 5 ms, depending on bus state) */ +#define USBD_DPDMVALUE_STATE_J (2UL) /*!< D+ forced high, D- forced low (J state) */ +#define USBD_DPDMVALUE_STATE_K (4UL) /*!< D+ forced low, D- forced high (K state) */ + +/* Register: USBD_DTOGGLE */ +/* Description: Data toggle control and status */ + +/* Bits 9..8 : Data toggle value */ +#define USBD_DTOGGLE_VALUE_Pos (8UL) /*!< Position of VALUE field. */ +#define USBD_DTOGGLE_VALUE_Msk (0x3UL << USBD_DTOGGLE_VALUE_Pos) /*!< Bit mask of VALUE field. */ +#define USBD_DTOGGLE_VALUE_Nop (0UL) /*!< No action on data toggle when writing the register with this value */ +#define USBD_DTOGGLE_VALUE_Data0 (1UL) /*!< Data toggle is DATA0 on endpoint set by EP and IO */ +#define USBD_DTOGGLE_VALUE_Data1 (2UL) /*!< Data toggle is DATA1 on endpoint set by EP and IO */ + +/* Bit 7 : Selects IN or OUT endpoint */ +#define USBD_DTOGGLE_IO_Pos (7UL) /*!< Position of IO field. */ +#define USBD_DTOGGLE_IO_Msk (0x1UL << USBD_DTOGGLE_IO_Pos) /*!< Bit mask of IO field. */ +#define USBD_DTOGGLE_IO_Out (0UL) /*!< Selects OUT endpoint */ +#define USBD_DTOGGLE_IO_In (1UL) /*!< Selects IN endpoint */ + +/* Bits 2..0 : Select bulk endpoint number */ +#define USBD_DTOGGLE_EP_Pos (0UL) /*!< Position of EP field. */ +#define USBD_DTOGGLE_EP_Msk (0x7UL << USBD_DTOGGLE_EP_Pos) /*!< Bit mask of EP field. */ + +/* Register: USBD_EPINEN */ +/* Description: Endpoint IN enable */ + +/* Bit 8 : Enable ISO IN endpoint */ +#define USBD_EPINEN_ISOIN_Pos (8UL) /*!< Position of ISOIN field. */ +#define USBD_EPINEN_ISOIN_Msk (0x1UL << USBD_EPINEN_ISOIN_Pos) /*!< Bit mask of ISOIN field. */ +#define USBD_EPINEN_ISOIN_Disable (0UL) /*!< Disable ISO IN endpoint 8 */ +#define USBD_EPINEN_ISOIN_Enable (1UL) /*!< Enable ISO IN endpoint 8 */ + +/* Bit 7 : Enable IN endpoint 7 */ +#define USBD_EPINEN_IN7_Pos (7UL) /*!< Position of IN7 field. */ +#define USBD_EPINEN_IN7_Msk (0x1UL << USBD_EPINEN_IN7_Pos) /*!< Bit mask of IN7 field. */ +#define USBD_EPINEN_IN7_Disable (0UL) /*!< Disable endpoint IN 7 (no response to IN tokens) */ +#define USBD_EPINEN_IN7_Enable (1UL) /*!< Enable endpoint IN 7 (response to IN tokens) */ + +/* Bit 6 : Enable IN endpoint 6 */ +#define USBD_EPINEN_IN6_Pos (6UL) /*!< Position of IN6 field. */ +#define USBD_EPINEN_IN6_Msk (0x1UL << USBD_EPINEN_IN6_Pos) /*!< Bit mask of IN6 field. */ +#define USBD_EPINEN_IN6_Disable (0UL) /*!< Disable endpoint IN 6 (no response to IN tokens) */ +#define USBD_EPINEN_IN6_Enable (1UL) /*!< Enable endpoint IN 6 (response to IN tokens) */ + +/* Bit 5 : Enable IN endpoint 5 */ +#define USBD_EPINEN_IN5_Pos (5UL) /*!< Position of IN5 field. */ +#define USBD_EPINEN_IN5_Msk (0x1UL << USBD_EPINEN_IN5_Pos) /*!< Bit mask of IN5 field. */ +#define USBD_EPINEN_IN5_Disable (0UL) /*!< Disable endpoint IN 5 (no response to IN tokens) */ +#define USBD_EPINEN_IN5_Enable (1UL) /*!< Enable endpoint IN 5 (response to IN tokens) */ + +/* Bit 4 : Enable IN endpoint 4 */ +#define USBD_EPINEN_IN4_Pos (4UL) /*!< Position of IN4 field. */ +#define USBD_EPINEN_IN4_Msk (0x1UL << USBD_EPINEN_IN4_Pos) /*!< Bit mask of IN4 field. */ +#define USBD_EPINEN_IN4_Disable (0UL) /*!< Disable endpoint IN 4 (no response to IN tokens) */ +#define USBD_EPINEN_IN4_Enable (1UL) /*!< Enable endpoint IN 4 (response to IN tokens) */ + +/* Bit 3 : Enable IN endpoint 3 */ +#define USBD_EPINEN_IN3_Pos (3UL) /*!< Position of IN3 field. */ +#define USBD_EPINEN_IN3_Msk (0x1UL << USBD_EPINEN_IN3_Pos) /*!< Bit mask of IN3 field. */ +#define USBD_EPINEN_IN3_Disable (0UL) /*!< Disable endpoint IN 3 (no response to IN tokens) */ +#define USBD_EPINEN_IN3_Enable (1UL) /*!< Enable endpoint IN 3 (response to IN tokens) */ + +/* Bit 2 : Enable IN endpoint 2 */ +#define USBD_EPINEN_IN2_Pos (2UL) /*!< Position of IN2 field. */ +#define USBD_EPINEN_IN2_Msk (0x1UL << USBD_EPINEN_IN2_Pos) /*!< Bit mask of IN2 field. */ +#define USBD_EPINEN_IN2_Disable (0UL) /*!< Disable endpoint IN 2 (no response to IN tokens) */ +#define USBD_EPINEN_IN2_Enable (1UL) /*!< Enable endpoint IN 2 (response to IN tokens) */ + +/* Bit 1 : Enable IN endpoint 1 */ +#define USBD_EPINEN_IN1_Pos (1UL) /*!< Position of IN1 field. */ +#define USBD_EPINEN_IN1_Msk (0x1UL << USBD_EPINEN_IN1_Pos) /*!< Bit mask of IN1 field. */ +#define USBD_EPINEN_IN1_Disable (0UL) /*!< Disable endpoint IN 1 (no response to IN tokens) */ +#define USBD_EPINEN_IN1_Enable (1UL) /*!< Enable endpoint IN 1 (response to IN tokens) */ + +/* Bit 0 : Enable IN endpoint 0 */ +#define USBD_EPINEN_IN0_Pos (0UL) /*!< Position of IN0 field. */ +#define USBD_EPINEN_IN0_Msk (0x1UL << USBD_EPINEN_IN0_Pos) /*!< Bit mask of IN0 field. */ +#define USBD_EPINEN_IN0_Disable (0UL) /*!< Disable endpoint IN 0 (no response to IN tokens) */ +#define USBD_EPINEN_IN0_Enable (1UL) /*!< Enable endpoint IN 0 (response to IN tokens) */ + +/* Register: USBD_EPOUTEN */ +/* Description: Endpoint OUT enable */ + +/* Bit 8 : Enable ISO OUT endpoint 8 */ +#define USBD_EPOUTEN_ISOOUT_Pos (8UL) /*!< Position of ISOOUT field. */ +#define USBD_EPOUTEN_ISOOUT_Msk (0x1UL << USBD_EPOUTEN_ISOOUT_Pos) /*!< Bit mask of ISOOUT field. */ +#define USBD_EPOUTEN_ISOOUT_Disable (0UL) /*!< Disable ISO OUT endpoint 8 */ +#define USBD_EPOUTEN_ISOOUT_Enable (1UL) /*!< Enable ISO OUT endpoint 8 */ + +/* Bit 7 : Enable OUT endpoint 7 */ +#define USBD_EPOUTEN_OUT7_Pos (7UL) /*!< Position of OUT7 field. */ +#define USBD_EPOUTEN_OUT7_Msk (0x1UL << USBD_EPOUTEN_OUT7_Pos) /*!< Bit mask of OUT7 field. */ +#define USBD_EPOUTEN_OUT7_Disable (0UL) /*!< Disable endpoint OUT 7 (no response to OUT tokens) */ +#define USBD_EPOUTEN_OUT7_Enable (1UL) /*!< Enable endpoint OUT 7 (response to OUT tokens) */ + +/* Bit 6 : Enable OUT endpoint 6 */ +#define USBD_EPOUTEN_OUT6_Pos (6UL) /*!< Position of OUT6 field. */ +#define USBD_EPOUTEN_OUT6_Msk (0x1UL << USBD_EPOUTEN_OUT6_Pos) /*!< Bit mask of OUT6 field. */ +#define USBD_EPOUTEN_OUT6_Disable (0UL) /*!< Disable endpoint OUT 6 (no response to OUT tokens) */ +#define USBD_EPOUTEN_OUT6_Enable (1UL) /*!< Enable endpoint OUT 6 (response to OUT tokens) */ + +/* Bit 5 : Enable OUT endpoint 5 */ +#define USBD_EPOUTEN_OUT5_Pos (5UL) /*!< Position of OUT5 field. */ +#define USBD_EPOUTEN_OUT5_Msk (0x1UL << USBD_EPOUTEN_OUT5_Pos) /*!< Bit mask of OUT5 field. */ +#define USBD_EPOUTEN_OUT5_Disable (0UL) /*!< Disable endpoint OUT 5 (no response to OUT tokens) */ +#define USBD_EPOUTEN_OUT5_Enable (1UL) /*!< Enable endpoint OUT 5 (response to OUT tokens) */ + +/* Bit 4 : Enable OUT endpoint 4 */ +#define USBD_EPOUTEN_OUT4_Pos (4UL) /*!< Position of OUT4 field. */ +#define USBD_EPOUTEN_OUT4_Msk (0x1UL << USBD_EPOUTEN_OUT4_Pos) /*!< Bit mask of OUT4 field. */ +#define USBD_EPOUTEN_OUT4_Disable (0UL) /*!< Disable endpoint OUT 4 (no response to OUT tokens) */ +#define USBD_EPOUTEN_OUT4_Enable (1UL) /*!< Enable endpoint OUT 4 (response to OUT tokens) */ + +/* Bit 3 : Enable OUT endpoint 3 */ +#define USBD_EPOUTEN_OUT3_Pos (3UL) /*!< Position of OUT3 field. */ +#define USBD_EPOUTEN_OUT3_Msk (0x1UL << USBD_EPOUTEN_OUT3_Pos) /*!< Bit mask of OUT3 field. */ +#define USBD_EPOUTEN_OUT3_Disable (0UL) /*!< Disable endpoint OUT 3 (no response to OUT tokens) */ +#define USBD_EPOUTEN_OUT3_Enable (1UL) /*!< Enable endpoint OUT 3 (response to OUT tokens) */ + +/* Bit 2 : Enable OUT endpoint 2 */ +#define USBD_EPOUTEN_OUT2_Pos (2UL) /*!< Position of OUT2 field. */ +#define USBD_EPOUTEN_OUT2_Msk (0x1UL << USBD_EPOUTEN_OUT2_Pos) /*!< Bit mask of OUT2 field. */ +#define USBD_EPOUTEN_OUT2_Disable (0UL) /*!< Disable endpoint OUT 2 (no response to OUT tokens) */ +#define USBD_EPOUTEN_OUT2_Enable (1UL) /*!< Enable endpoint OUT 2 (response to OUT tokens) */ + +/* Bit 1 : Enable OUT endpoint 1 */ +#define USBD_EPOUTEN_OUT1_Pos (1UL) /*!< Position of OUT1 field. */ +#define USBD_EPOUTEN_OUT1_Msk (0x1UL << USBD_EPOUTEN_OUT1_Pos) /*!< Bit mask of OUT1 field. */ +#define USBD_EPOUTEN_OUT1_Disable (0UL) /*!< Disable endpoint OUT 1 (no response to OUT tokens) */ +#define USBD_EPOUTEN_OUT1_Enable (1UL) /*!< Enable endpoint OUT 1 (response to OUT tokens) */ + +/* Bit 0 : Enable OUT endpoint 0 */ +#define USBD_EPOUTEN_OUT0_Pos (0UL) /*!< Position of OUT0 field. */ +#define USBD_EPOUTEN_OUT0_Msk (0x1UL << USBD_EPOUTEN_OUT0_Pos) /*!< Bit mask of OUT0 field. */ +#define USBD_EPOUTEN_OUT0_Disable (0UL) /*!< Disable endpoint OUT 0 (no response to OUT tokens) */ +#define USBD_EPOUTEN_OUT0_Enable (1UL) /*!< Enable endpoint OUT 0 (response to OUT tokens) */ + +/* Register: USBD_EPSTALL */ +/* Description: STALL endpoints */ + +/* Bit 8 : Stall selected endpoint */ +#define USBD_EPSTALL_STALL_Pos (8UL) /*!< Position of STALL field. */ +#define USBD_EPSTALL_STALL_Msk (0x1UL << USBD_EPSTALL_STALL_Pos) /*!< Bit mask of STALL field. */ +#define USBD_EPSTALL_STALL_UnStall (0UL) /*!< Don't stall selected endpoint */ +#define USBD_EPSTALL_STALL_Stall (1UL) /*!< Stall selected endpoint */ + +/* Bit 7 : Selects IN or OUT endpoint */ +#define USBD_EPSTALL_IO_Pos (7UL) /*!< Position of IO field. */ +#define USBD_EPSTALL_IO_Msk (0x1UL << USBD_EPSTALL_IO_Pos) /*!< Bit mask of IO field. */ +#define USBD_EPSTALL_IO_Out (0UL) /*!< Selects OUT endpoint */ +#define USBD_EPSTALL_IO_In (1UL) /*!< Selects IN endpoint */ + +/* Bits 2..0 : Select endpoint number */ +#define USBD_EPSTALL_EP_Pos (0UL) /*!< Position of EP field. */ +#define USBD_EPSTALL_EP_Msk (0x7UL << USBD_EPSTALL_EP_Pos) /*!< Bit mask of EP field. */ + +/* Register: USBD_ISOSPLIT */ +/* Description: Controls the split of ISO buffers */ + +/* Bits 15..0 : Controls the split of ISO buffers */ +#define USBD_ISOSPLIT_SPLIT_Pos (0UL) /*!< Position of SPLIT field. */ +#define USBD_ISOSPLIT_SPLIT_Msk (0xFFFFUL << USBD_ISOSPLIT_SPLIT_Pos) /*!< Bit mask of SPLIT field. */ +#define USBD_ISOSPLIT_SPLIT_OneDir (0x0000UL) /*!< Full buffer dedicated to either iso IN or OUT */ +#define USBD_ISOSPLIT_SPLIT_HalfIN (0x0080UL) /*!< Lower half for IN, upper half for OUT */ + +/* Register: USBD_FRAMECNTR */ +/* Description: Returns the current value of the start of frame counter */ + +/* Bits 10..0 : Returns the current value of the start of frame counter */ +#define USBD_FRAMECNTR_FRAMECNTR_Pos (0UL) /*!< Position of FRAMECNTR field. */ +#define USBD_FRAMECNTR_FRAMECNTR_Msk (0x7FFUL << USBD_FRAMECNTR_FRAMECNTR_Pos) /*!< Bit mask of FRAMECNTR field. */ + +/* Register: USBD_LOWPOWER */ +/* Description: Controls USBD peripheral low power mode during USB suspend */ + +/* Bit 0 : Controls USBD peripheral low-power mode during USB suspend */ +#define USBD_LOWPOWER_LOWPOWER_Pos (0UL) /*!< Position of LOWPOWER field. */ +#define USBD_LOWPOWER_LOWPOWER_Msk (0x1UL << USBD_LOWPOWER_LOWPOWER_Pos) /*!< Bit mask of LOWPOWER field. */ +#define USBD_LOWPOWER_LOWPOWER_ForceNormal (0UL) /*!< Software must write this value to exit low power mode and before performing a remote wake-up */ +#define USBD_LOWPOWER_LOWPOWER_LowPower (1UL) /*!< Software must write this value to enter low power mode after DMA and software have finished interacting with the USB peripheral */ + +/* Register: USBD_ISOINCONFIG */ +/* Description: Controls the response of the ISO IN endpoint to an IN token when no data is ready to be sent */ + +/* Bit 0 : Controls the response of the ISO IN endpoint to an IN token when no data is ready to be sent */ +#define USBD_ISOINCONFIG_RESPONSE_Pos (0UL) /*!< Position of RESPONSE field. */ +#define USBD_ISOINCONFIG_RESPONSE_Msk (0x1UL << USBD_ISOINCONFIG_RESPONSE_Pos) /*!< Bit mask of RESPONSE field. */ +#define USBD_ISOINCONFIG_RESPONSE_NoResp (0UL) /*!< Endpoint does not respond in that case */ +#define USBD_ISOINCONFIG_RESPONSE_ZeroData (1UL) /*!< Endpoint responds with a zero-length data packet in that case */ + +/* Register: USBD_EPIN_PTR */ +/* Description: Description cluster[n]: Data pointer */ + +/* Bits 31..0 : Data pointer. Accepts any address in Data RAM. */ +#define USBD_EPIN_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define USBD_EPIN_PTR_PTR_Msk (0xFFFFFFFFUL << USBD_EPIN_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: USBD_EPIN_MAXCNT */ +/* Description: Description cluster[n]: Maximum number of bytes to transfer */ + +/* Bits 6..0 : Maximum number of bytes to transfer */ +#define USBD_EPIN_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define USBD_EPIN_MAXCNT_MAXCNT_Msk (0x7FUL << USBD_EPIN_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: USBD_EPIN_AMOUNT */ +/* Description: Description cluster[n]: Number of bytes transferred in the last transaction */ + +/* Bits 6..0 : Number of bytes transferred in the last transaction */ +#define USBD_EPIN_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define USBD_EPIN_AMOUNT_AMOUNT_Msk (0x7FUL << USBD_EPIN_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: USBD_ISOIN_PTR */ +/* Description: Data pointer */ + +/* Bits 31..0 : Data pointer. Accepts any address in Data RAM. */ +#define USBD_ISOIN_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define USBD_ISOIN_PTR_PTR_Msk (0xFFFFFFFFUL << USBD_ISOIN_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: USBD_ISOIN_MAXCNT */ +/* Description: Maximum number of bytes to transfer */ + +/* Bits 9..0 : Maximum number of bytes to transfer */ +#define USBD_ISOIN_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define USBD_ISOIN_MAXCNT_MAXCNT_Msk (0x3FFUL << USBD_ISOIN_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: USBD_ISOIN_AMOUNT */ +/* Description: Number of bytes transferred in the last transaction */ + +/* Bits 9..0 : Number of bytes transferred in the last transaction */ +#define USBD_ISOIN_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define USBD_ISOIN_AMOUNT_AMOUNT_Msk (0x3FFUL << USBD_ISOIN_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: USBD_EPOUT_PTR */ +/* Description: Description cluster[n]: Data pointer */ + +/* Bits 31..0 : Data pointer. Accepts any address in Data RAM. */ +#define USBD_EPOUT_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define USBD_EPOUT_PTR_PTR_Msk (0xFFFFFFFFUL << USBD_EPOUT_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: USBD_EPOUT_MAXCNT */ +/* Description: Description cluster[n]: Maximum number of bytes to transfer */ + +/* Bits 6..0 : Maximum number of bytes to transfer */ +#define USBD_EPOUT_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define USBD_EPOUT_MAXCNT_MAXCNT_Msk (0x7FUL << USBD_EPOUT_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: USBD_EPOUT_AMOUNT */ +/* Description: Description cluster[n]: Number of bytes transferred in the last transaction */ + +/* Bits 6..0 : Number of bytes transferred in the last transaction */ +#define USBD_EPOUT_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define USBD_EPOUT_AMOUNT_AMOUNT_Msk (0x7FUL << USBD_EPOUT_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: USBD_ISOOUT_PTR */ +/* Description: Data pointer */ + +/* Bits 31..0 : Data pointer. Accepts any address in Data RAM. */ +#define USBD_ISOOUT_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define USBD_ISOOUT_PTR_PTR_Msk (0xFFFFFFFFUL << USBD_ISOOUT_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: USBD_ISOOUT_MAXCNT */ +/* Description: Maximum number of bytes to transfer */ + +/* Bits 9..0 : Maximum number of bytes to transfer */ +#define USBD_ISOOUT_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define USBD_ISOOUT_MAXCNT_MAXCNT_Msk (0x3FFUL << USBD_ISOOUT_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: USBD_ISOOUT_AMOUNT */ +/* Description: Number of bytes transferred in the last transaction */ + +/* Bits 9..0 : Number of bytes transferred in the last transaction */ +#define USBD_ISOOUT_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define USBD_ISOOUT_AMOUNT_AMOUNT_Msk (0x3FFUL << USBD_ISOOUT_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + + +/* Peripheral: WDT */ +/* Description: Watchdog Timer */ + +/* Register: WDT_TASKS_START */ +/* Description: Start the watchdog */ + +/* Bit 0 : */ +#define WDT_TASKS_START_TASKS_START_Pos (0UL) /*!< Position of TASKS_START field. */ +#define WDT_TASKS_START_TASKS_START_Msk (0x1UL << WDT_TASKS_START_TASKS_START_Pos) /*!< Bit mask of TASKS_START field. */ + +/* Register: WDT_EVENTS_TIMEOUT */ +/* Description: Watchdog timeout */ + +/* Bit 0 : */ +#define WDT_EVENTS_TIMEOUT_EVENTS_TIMEOUT_Pos (0UL) /*!< Position of EVENTS_TIMEOUT field. */ +#define WDT_EVENTS_TIMEOUT_EVENTS_TIMEOUT_Msk (0x1UL << WDT_EVENTS_TIMEOUT_EVENTS_TIMEOUT_Pos) /*!< Bit mask of EVENTS_TIMEOUT field. */ + +/* Register: WDT_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 0 : Write '1' to enable interrupt for TIMEOUT event */ +#define WDT_INTENSET_TIMEOUT_Pos (0UL) /*!< Position of TIMEOUT field. */ +#define WDT_INTENSET_TIMEOUT_Msk (0x1UL << WDT_INTENSET_TIMEOUT_Pos) /*!< Bit mask of TIMEOUT field. */ +#define WDT_INTENSET_TIMEOUT_Disabled (0UL) /*!< Read: Disabled */ +#define WDT_INTENSET_TIMEOUT_Enabled (1UL) /*!< Read: Enabled */ +#define WDT_INTENSET_TIMEOUT_Set (1UL) /*!< Enable */ + +/* Register: WDT_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 0 : Write '1' to disable interrupt for TIMEOUT event */ +#define WDT_INTENCLR_TIMEOUT_Pos (0UL) /*!< Position of TIMEOUT field. */ +#define WDT_INTENCLR_TIMEOUT_Msk (0x1UL << WDT_INTENCLR_TIMEOUT_Pos) /*!< Bit mask of TIMEOUT field. */ +#define WDT_INTENCLR_TIMEOUT_Disabled (0UL) /*!< Read: Disabled */ +#define WDT_INTENCLR_TIMEOUT_Enabled (1UL) /*!< Read: Enabled */ +#define WDT_INTENCLR_TIMEOUT_Clear (1UL) /*!< Disable */ + +/* Register: WDT_RUNSTATUS */ +/* Description: Run status */ + +/* Bit 0 : Indicates whether or not the watchdog is running */ +#define WDT_RUNSTATUS_RUNSTATUS_Pos (0UL) /*!< Position of RUNSTATUS field. */ +#define WDT_RUNSTATUS_RUNSTATUS_Msk (0x1UL << WDT_RUNSTATUS_RUNSTATUS_Pos) /*!< Bit mask of RUNSTATUS field. */ +#define WDT_RUNSTATUS_RUNSTATUS_NotRunning (0UL) /*!< Watchdog not running */ +#define WDT_RUNSTATUS_RUNSTATUS_Running (1UL) /*!< Watchdog is running */ + +/* Register: WDT_REQSTATUS */ +/* Description: Request status */ + +/* Bit 7 : Request status for RR[7] register */ +#define WDT_REQSTATUS_RR7_Pos (7UL) /*!< Position of RR7 field. */ +#define WDT_REQSTATUS_RR7_Msk (0x1UL << WDT_REQSTATUS_RR7_Pos) /*!< Bit mask of RR7 field. */ +#define WDT_REQSTATUS_RR7_DisabledOrRequested (0UL) /*!< RR[7] register is not enabled, or are already requesting reload */ +#define WDT_REQSTATUS_RR7_EnabledAndUnrequested (1UL) /*!< RR[7] register is enabled, and are not yet requesting reload */ + +/* Bit 6 : Request status for RR[6] register */ +#define WDT_REQSTATUS_RR6_Pos (6UL) /*!< Position of RR6 field. */ +#define WDT_REQSTATUS_RR6_Msk (0x1UL << WDT_REQSTATUS_RR6_Pos) /*!< Bit mask of RR6 field. */ +#define WDT_REQSTATUS_RR6_DisabledOrRequested (0UL) /*!< RR[6] register is not enabled, or are already requesting reload */ +#define WDT_REQSTATUS_RR6_EnabledAndUnrequested (1UL) /*!< RR[6] register is enabled, and are not yet requesting reload */ + +/* Bit 5 : Request status for RR[5] register */ +#define WDT_REQSTATUS_RR5_Pos (5UL) /*!< Position of RR5 field. */ +#define WDT_REQSTATUS_RR5_Msk (0x1UL << WDT_REQSTATUS_RR5_Pos) /*!< Bit mask of RR5 field. */ +#define WDT_REQSTATUS_RR5_DisabledOrRequested (0UL) /*!< RR[5] register is not enabled, or are already requesting reload */ +#define WDT_REQSTATUS_RR5_EnabledAndUnrequested (1UL) /*!< RR[5] register is enabled, and are not yet requesting reload */ + +/* Bit 4 : Request status for RR[4] register */ +#define WDT_REQSTATUS_RR4_Pos (4UL) /*!< Position of RR4 field. */ +#define WDT_REQSTATUS_RR4_Msk (0x1UL << WDT_REQSTATUS_RR4_Pos) /*!< Bit mask of RR4 field. */ +#define WDT_REQSTATUS_RR4_DisabledOrRequested (0UL) /*!< RR[4] register is not enabled, or are already requesting reload */ +#define WDT_REQSTATUS_RR4_EnabledAndUnrequested (1UL) /*!< RR[4] register is enabled, and are not yet requesting reload */ + +/* Bit 3 : Request status for RR[3] register */ +#define WDT_REQSTATUS_RR3_Pos (3UL) /*!< Position of RR3 field. */ +#define WDT_REQSTATUS_RR3_Msk (0x1UL << WDT_REQSTATUS_RR3_Pos) /*!< Bit mask of RR3 field. */ +#define WDT_REQSTATUS_RR3_DisabledOrRequested (0UL) /*!< RR[3] register is not enabled, or are already requesting reload */ +#define WDT_REQSTATUS_RR3_EnabledAndUnrequested (1UL) /*!< RR[3] register is enabled, and are not yet requesting reload */ + +/* Bit 2 : Request status for RR[2] register */ +#define WDT_REQSTATUS_RR2_Pos (2UL) /*!< Position of RR2 field. */ +#define WDT_REQSTATUS_RR2_Msk (0x1UL << WDT_REQSTATUS_RR2_Pos) /*!< Bit mask of RR2 field. */ +#define WDT_REQSTATUS_RR2_DisabledOrRequested (0UL) /*!< RR[2] register is not enabled, or are already requesting reload */ +#define WDT_REQSTATUS_RR2_EnabledAndUnrequested (1UL) /*!< RR[2] register is enabled, and are not yet requesting reload */ + +/* Bit 1 : Request status for RR[1] register */ +#define WDT_REQSTATUS_RR1_Pos (1UL) /*!< Position of RR1 field. */ +#define WDT_REQSTATUS_RR1_Msk (0x1UL << WDT_REQSTATUS_RR1_Pos) /*!< Bit mask of RR1 field. */ +#define WDT_REQSTATUS_RR1_DisabledOrRequested (0UL) /*!< RR[1] register is not enabled, or are already requesting reload */ +#define WDT_REQSTATUS_RR1_EnabledAndUnrequested (1UL) /*!< RR[1] register is enabled, and are not yet requesting reload */ + +/* Bit 0 : Request status for RR[0] register */ +#define WDT_REQSTATUS_RR0_Pos (0UL) /*!< Position of RR0 field. */ +#define WDT_REQSTATUS_RR0_Msk (0x1UL << WDT_REQSTATUS_RR0_Pos) /*!< Bit mask of RR0 field. */ +#define WDT_REQSTATUS_RR0_DisabledOrRequested (0UL) /*!< RR[0] register is not enabled, or are already requesting reload */ +#define WDT_REQSTATUS_RR0_EnabledAndUnrequested (1UL) /*!< RR[0] register is enabled, and are not yet requesting reload */ + +/* Register: WDT_CRV */ +/* Description: Counter reload value */ + +/* Bits 31..0 : Counter reload value in number of cycles of the 32.768 kHz clock */ +#define WDT_CRV_CRV_Pos (0UL) /*!< Position of CRV field. */ +#define WDT_CRV_CRV_Msk (0xFFFFFFFFUL << WDT_CRV_CRV_Pos) /*!< Bit mask of CRV field. */ + +/* Register: WDT_RREN */ +/* Description: Enable register for reload request registers */ + +/* Bit 7 : Enable or disable RR[7] register */ +#define WDT_RREN_RR7_Pos (7UL) /*!< Position of RR7 field. */ +#define WDT_RREN_RR7_Msk (0x1UL << WDT_RREN_RR7_Pos) /*!< Bit mask of RR7 field. */ +#define WDT_RREN_RR7_Disabled (0UL) /*!< Disable RR[7] register */ +#define WDT_RREN_RR7_Enabled (1UL) /*!< Enable RR[7] register */ + +/* Bit 6 : Enable or disable RR[6] register */ +#define WDT_RREN_RR6_Pos (6UL) /*!< Position of RR6 field. */ +#define WDT_RREN_RR6_Msk (0x1UL << WDT_RREN_RR6_Pos) /*!< Bit mask of RR6 field. */ +#define WDT_RREN_RR6_Disabled (0UL) /*!< Disable RR[6] register */ +#define WDT_RREN_RR6_Enabled (1UL) /*!< Enable RR[6] register */ + +/* Bit 5 : Enable or disable RR[5] register */ +#define WDT_RREN_RR5_Pos (5UL) /*!< Position of RR5 field. */ +#define WDT_RREN_RR5_Msk (0x1UL << WDT_RREN_RR5_Pos) /*!< Bit mask of RR5 field. */ +#define WDT_RREN_RR5_Disabled (0UL) /*!< Disable RR[5] register */ +#define WDT_RREN_RR5_Enabled (1UL) /*!< Enable RR[5] register */ + +/* Bit 4 : Enable or disable RR[4] register */ +#define WDT_RREN_RR4_Pos (4UL) /*!< Position of RR4 field. */ +#define WDT_RREN_RR4_Msk (0x1UL << WDT_RREN_RR4_Pos) /*!< Bit mask of RR4 field. */ +#define WDT_RREN_RR4_Disabled (0UL) /*!< Disable RR[4] register */ +#define WDT_RREN_RR4_Enabled (1UL) /*!< Enable RR[4] register */ + +/* Bit 3 : Enable or disable RR[3] register */ +#define WDT_RREN_RR3_Pos (3UL) /*!< Position of RR3 field. */ +#define WDT_RREN_RR3_Msk (0x1UL << WDT_RREN_RR3_Pos) /*!< Bit mask of RR3 field. */ +#define WDT_RREN_RR3_Disabled (0UL) /*!< Disable RR[3] register */ +#define WDT_RREN_RR3_Enabled (1UL) /*!< Enable RR[3] register */ + +/* Bit 2 : Enable or disable RR[2] register */ +#define WDT_RREN_RR2_Pos (2UL) /*!< Position of RR2 field. */ +#define WDT_RREN_RR2_Msk (0x1UL << WDT_RREN_RR2_Pos) /*!< Bit mask of RR2 field. */ +#define WDT_RREN_RR2_Disabled (0UL) /*!< Disable RR[2] register */ +#define WDT_RREN_RR2_Enabled (1UL) /*!< Enable RR[2] register */ + +/* Bit 1 : Enable or disable RR[1] register */ +#define WDT_RREN_RR1_Pos (1UL) /*!< Position of RR1 field. */ +#define WDT_RREN_RR1_Msk (0x1UL << WDT_RREN_RR1_Pos) /*!< Bit mask of RR1 field. */ +#define WDT_RREN_RR1_Disabled (0UL) /*!< Disable RR[1] register */ +#define WDT_RREN_RR1_Enabled (1UL) /*!< Enable RR[1] register */ + +/* Bit 0 : Enable or disable RR[0] register */ +#define WDT_RREN_RR0_Pos (0UL) /*!< Position of RR0 field. */ +#define WDT_RREN_RR0_Msk (0x1UL << WDT_RREN_RR0_Pos) /*!< Bit mask of RR0 field. */ +#define WDT_RREN_RR0_Disabled (0UL) /*!< Disable RR[0] register */ +#define WDT_RREN_RR0_Enabled (1UL) /*!< Enable RR[0] register */ + +/* Register: WDT_CONFIG */ +/* Description: Configuration register */ + +/* Bit 3 : Configure the watchdog to either be paused, or kept running, while the CPU is halted by the debugger */ +#define WDT_CONFIG_HALT_Pos (3UL) /*!< Position of HALT field. */ +#define WDT_CONFIG_HALT_Msk (0x1UL << WDT_CONFIG_HALT_Pos) /*!< Bit mask of HALT field. */ +#define WDT_CONFIG_HALT_Pause (0UL) /*!< Pause watchdog while the CPU is halted by the debugger */ +#define WDT_CONFIG_HALT_Run (1UL) /*!< Keep the watchdog running while the CPU is halted by the debugger */ + +/* Bit 0 : Configure the watchdog to either be paused, or kept running, while the CPU is sleeping */ +#define WDT_CONFIG_SLEEP_Pos (0UL) /*!< Position of SLEEP field. */ +#define WDT_CONFIG_SLEEP_Msk (0x1UL << WDT_CONFIG_SLEEP_Pos) /*!< Bit mask of SLEEP field. */ +#define WDT_CONFIG_SLEEP_Pause (0UL) /*!< Pause watchdog while the CPU is sleeping */ +#define WDT_CONFIG_SLEEP_Run (1UL) /*!< Keep the watchdog running while the CPU is sleeping */ + +/* Register: WDT_RR */ +/* Description: Description collection[n]: Reload request n */ + +/* Bits 31..0 : Reload request register */ +#define WDT_RR_RR_Pos (0UL) /*!< Position of RR field. */ +#define WDT_RR_RR_Msk (0xFFFFFFFFUL << WDT_RR_RR_Pos) /*!< Bit mask of RR field. */ +#define WDT_RR_RR_Reload (0x6E524635UL) /*!< Value to request a reload of the watchdog timer */ + + +/*lint --flb "Leave library region" */ +#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52840_peripherals.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52840_peripherals.h new file mode 100644 index 00000000000..5f18f58f9ae --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52840_peripherals.h @@ -0,0 +1,310 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +#ifndef _NRF52840_PERIPHERALS_H +#define _NRF52840_PERIPHERALS_H + + +/* Power Peripheral */ +#define POWER_PRESENT +#define POWER_COUNT 1 + +#define POWER_FEATURE_RAM_REGISTERS_PRESENT +#define POWER_FEATURE_RAM_REGISTERS_COUNT 9 + +#define POWER_FEATURE_VDDH_PRESENT + +/* Floating Point Unit */ +#define FPU_PRESENT +#define FPU_COUNT 1 + +/* Systick timer */ +#define SYSTICK_PRESENT +#define SYSTICK_COUNT 1 + +/* Software Interrupts */ +#define SWI_PRESENT +#define SWI_COUNT 6 + +/* Memory Watch Unit */ +#define MWU_PRESENT +#define MWU_COUNT 1 + +/* GPIO */ +#define GPIO_PRESENT +#define GPIO_COUNT 2 + +#define P0_PIN_NUM 32 +#define P1_PIN_NUM 16 + +/* ACL */ +#define ACL_PRESENT + +#define ACL_REGIONS_COUNT 8 + +/* Radio */ +#define RADIO_PRESENT +#define RADIO_COUNT 1 + +#define RADIO_EASYDMA_MAXCNT_SIZE 8 + +/* Accelerated Address Resolver */ +#define AAR_PRESENT +#define AAR_COUNT 1 + +#define AAR_MAX_IRK_NUM 16 + +/* AES Electronic CodeBook mode encryption */ +#define ECB_PRESENT +#define ECB_COUNT 1 + +/* AES CCM mode encryption */ +#define CCM_PRESENT +#define CCM_COUNT 1 + +/* NFC Tag */ +#define NFCT_PRESENT +#define NFCT_COUNT 1 + +#define NFCT_EASYDMA_MAXCNT_SIZE 9 + +/* Peripheral to Peripheral Interconnect */ +#define PPI_PRESENT +#define PPI_COUNT 1 + +#define PPI_CH_NUM 20 +#define PPI_FIXED_CH_NUM 12 +#define PPI_GROUP_NUM 6 +#define PPI_FEATURE_FORKS_PRESENT + +/* Event Generator Unit */ +#define EGU_PRESENT +#define EGU_COUNT 6 + +#define EGU0_CH_NUM 16 +#define EGU1_CH_NUM 16 +#define EGU2_CH_NUM 16 +#define EGU3_CH_NUM 16 +#define EGU4_CH_NUM 16 +#define EGU5_CH_NUM 16 + +/* Timer/Counter */ +#define TIMER_PRESENT +#define TIMER_COUNT 5 + +#define TIMER0_MAX_SIZE 32 +#define TIMER1_MAX_SIZE 32 +#define TIMER2_MAX_SIZE 32 +#define TIMER3_MAX_SIZE 32 +#define TIMER4_MAX_SIZE 32 + +#define TIMER0_CC_NUM 4 +#define TIMER1_CC_NUM 4 +#define TIMER2_CC_NUM 4 +#define TIMER3_CC_NUM 6 +#define TIMER4_CC_NUM 6 + +/* Real Time Counter */ +#define RTC_PRESENT +#define RTC_COUNT 3 + +#define RTC0_CC_NUM 3 +#define RTC1_CC_NUM 4 +#define RTC2_CC_NUM 4 + +/* RNG */ +#define RNG_PRESENT +#define RNG_COUNT 1 + +/* Watchdog Timer */ +#define WDT_PRESENT +#define WDT_COUNT 1 + +/* Temperature Sensor */ +#define TEMP_PRESENT +#define TEMP_COUNT 1 + +/* Serial Peripheral Interface Master */ +#define SPI_PRESENT +#define SPI_COUNT 3 + +/* Serial Peripheral Interface Master with DMA */ +#define SPIM_PRESENT +#define SPIM_COUNT 4 + +#define SPIM0_MAX_DATARATE 8 +#define SPIM1_MAX_DATARATE 8 +#define SPIM2_MAX_DATARATE 8 +#define SPIM3_MAX_DATARATE 32 + +#define SPIM0_FEATURE_HARDWARE_CSN_PRESENT 0 +#define SPIM1_FEATURE_HARDWARE_CSN_PRESENT 0 +#define SPIM2_FEATURE_HARDWARE_CSN_PRESENT 0 +#define SPIM3_FEATURE_HARDWARE_CSN_PRESENT 1 + +#define SPIM0_FEATURE_DCX_PRESENT 0 +#define SPIM1_FEATURE_DCX_PRESENT 0 +#define SPIM2_FEATURE_DCX_PRESENT 0 +#define SPIM3_FEATURE_DCX_PRESENT 1 + +#define SPIM0_FEATURE_RXDELAY_PRESENT 0 +#define SPIM1_FEATURE_RXDELAY_PRESENT 0 +#define SPIM2_FEATURE_RXDELAY_PRESENT 0 +#define SPIM3_FEATURE_RXDELAY_PRESENT 1 + +#define SPIM0_EASYDMA_MAXCNT_SIZE 16 +#define SPIM1_EASYDMA_MAXCNT_SIZE 16 +#define SPIM2_EASYDMA_MAXCNT_SIZE 16 +#define SPIM3_EASYDMA_MAXCNT_SIZE 16 + +/* Serial Peripheral Interface Slave with DMA*/ +#define SPIS_PRESENT +#define SPIS_COUNT 3 + +#define SPIS0_EASYDMA_MAXCNT_SIZE 16 +#define SPIS1_EASYDMA_MAXCNT_SIZE 16 +#define SPIS2_EASYDMA_MAXCNT_SIZE 16 + +/* Two Wire Interface Master */ +#define TWI_PRESENT +#define TWI_COUNT 2 + +/* Two Wire Interface Master with DMA */ +#define TWIM_PRESENT +#define TWIM_COUNT 2 + +#define TWIM0_EASYDMA_MAXCNT_SIZE 16 +#define TWIM1_EASYDMA_MAXCNT_SIZE 16 + +/* Two Wire Interface Slave with DMA */ +#define TWIS_PRESENT +#define TWIS_COUNT 2 + +#define TWIS0_EASYDMA_MAXCNT_SIZE 16 +#define TWIS1_EASYDMA_MAXCNT_SIZE 16 + +/* Universal Asynchronous Receiver-Transmitter */ +#define UART_PRESENT +#define UART_COUNT 1 + +/* Universal Asynchronous Receiver-Transmitter with DMA */ +#define UARTE_PRESENT +#define UARTE_COUNT 2 + +#define UARTE0_EASYDMA_MAXCNT_SIZE 16 +#define UARTE1_EASYDMA_MAXCNT_SIZE 16 + +/* Quadrature Decoder */ +#define QDEC_PRESENT +#define QDEC_COUNT 1 + +/* Successive Approximation Analog to Digital Converter */ +#define SAADC_PRESENT +#define SAADC_COUNT 1 + +#define SAADC_EASYDMA_MAXCNT_SIZE 15 + +#define SAADC_CH_NUM 8 + +/* GPIO Tasks and Events */ +#define GPIOTE_PRESENT +#define GPIOTE_COUNT 1 + +#define GPIOTE_CH_NUM 8 + +#define GPIOTE_FEATURE_SET_PRESENT +#define GPIOTE_FEATURE_CLR_PRESENT + +/* Low Power Comparator */ +#define LPCOMP_PRESENT +#define LPCOMP_COUNT 1 + +#define LPCOMP_REFSEL_RESOLUTION 16 + +#define LPCOMP_FEATURE_HYST_PRESENT + +/* Comparator */ +#define COMP_PRESENT +#define COMP_COUNT 1 + +/* Pulse Width Modulator */ +#define PWM_PRESENT +#define PWM_COUNT 4 + +#define PWM0_CH_NUM 4 +#define PWM1_CH_NUM 4 +#define PWM2_CH_NUM 4 +#define PWM3_CH_NUM 4 + +#define PWM0_EASYDMA_MAXCNT_SIZE 15 +#define PWM1_EASYDMA_MAXCNT_SIZE 15 +#define PWM2_EASYDMA_MAXCNT_SIZE 15 +#define PWM3_EASYDMA_MAXCNT_SIZE 15 + +/* Pulse Density Modulator */ +#define PDM_PRESENT +#define PDM_COUNT 1 + +#define PDM_EASYDMA_MAXCNT_SIZE 15 + +/* Inter-IC Sound Interface */ +#define I2S_PRESENT +#define I2S_COUNT 1 + +#define I2S_EASYDMA_MAXCNT_SIZE 14 + +/* Universal Serial Bus Device */ +#define USBD_PRESENT +#define USBD_COUNT 1 + +#define USBD_EASYDMA_MAXCNT_SIZE 7 + +/* ARM TrustZone Cryptocell 310 */ +#define CRYPTOCELL_PRESENT +#define CRYPTOCELL_COUNT 1 + +/* Quad SPI */ +#define QSPI_PRESENT +#define QSPI_COUNT 1 + +#define QSPI_EASYDMA_MAXCNT_SIZE 20 + +#endif // _NRF52840_PERIPHERALS_H diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52_bitfields.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52_bitfields.h new file mode 100644 index 00000000000..21753cc93a5 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52_bitfields.h @@ -0,0 +1,12663 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +#ifndef __NRF52_BITS_H +#define __NRF52_BITS_H + +/*lint ++flb "Enter library region" */ + +/* Peripheral: AAR */ +/* Description: Accelerated Address Resolver */ + +/* Register: AAR_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 2 : Write '1' to Enable interrupt for NOTRESOLVED event */ +#define AAR_INTENSET_NOTRESOLVED_Pos (2UL) /*!< Position of NOTRESOLVED field. */ +#define AAR_INTENSET_NOTRESOLVED_Msk (0x1UL << AAR_INTENSET_NOTRESOLVED_Pos) /*!< Bit mask of NOTRESOLVED field. */ +#define AAR_INTENSET_NOTRESOLVED_Disabled (0UL) /*!< Read: Disabled */ +#define AAR_INTENSET_NOTRESOLVED_Enabled (1UL) /*!< Read: Enabled */ +#define AAR_INTENSET_NOTRESOLVED_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for RESOLVED event */ +#define AAR_INTENSET_RESOLVED_Pos (1UL) /*!< Position of RESOLVED field. */ +#define AAR_INTENSET_RESOLVED_Msk (0x1UL << AAR_INTENSET_RESOLVED_Pos) /*!< Bit mask of RESOLVED field. */ +#define AAR_INTENSET_RESOLVED_Disabled (0UL) /*!< Read: Disabled */ +#define AAR_INTENSET_RESOLVED_Enabled (1UL) /*!< Read: Enabled */ +#define AAR_INTENSET_RESOLVED_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for END event */ +#define AAR_INTENSET_END_Pos (0UL) /*!< Position of END field. */ +#define AAR_INTENSET_END_Msk (0x1UL << AAR_INTENSET_END_Pos) /*!< Bit mask of END field. */ +#define AAR_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ +#define AAR_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ +#define AAR_INTENSET_END_Set (1UL) /*!< Enable */ + +/* Register: AAR_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 2 : Write '1' to Disable interrupt for NOTRESOLVED event */ +#define AAR_INTENCLR_NOTRESOLVED_Pos (2UL) /*!< Position of NOTRESOLVED field. */ +#define AAR_INTENCLR_NOTRESOLVED_Msk (0x1UL << AAR_INTENCLR_NOTRESOLVED_Pos) /*!< Bit mask of NOTRESOLVED field. */ +#define AAR_INTENCLR_NOTRESOLVED_Disabled (0UL) /*!< Read: Disabled */ +#define AAR_INTENCLR_NOTRESOLVED_Enabled (1UL) /*!< Read: Enabled */ +#define AAR_INTENCLR_NOTRESOLVED_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for RESOLVED event */ +#define AAR_INTENCLR_RESOLVED_Pos (1UL) /*!< Position of RESOLVED field. */ +#define AAR_INTENCLR_RESOLVED_Msk (0x1UL << AAR_INTENCLR_RESOLVED_Pos) /*!< Bit mask of RESOLVED field. */ +#define AAR_INTENCLR_RESOLVED_Disabled (0UL) /*!< Read: Disabled */ +#define AAR_INTENCLR_RESOLVED_Enabled (1UL) /*!< Read: Enabled */ +#define AAR_INTENCLR_RESOLVED_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for END event */ +#define AAR_INTENCLR_END_Pos (0UL) /*!< Position of END field. */ +#define AAR_INTENCLR_END_Msk (0x1UL << AAR_INTENCLR_END_Pos) /*!< Bit mask of END field. */ +#define AAR_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ +#define AAR_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ +#define AAR_INTENCLR_END_Clear (1UL) /*!< Disable */ + +/* Register: AAR_STATUS */ +/* Description: Resolution status */ + +/* Bits 3..0 : The IRK that was used last time an address was resolved */ +#define AAR_STATUS_STATUS_Pos (0UL) /*!< Position of STATUS field. */ +#define AAR_STATUS_STATUS_Msk (0xFUL << AAR_STATUS_STATUS_Pos) /*!< Bit mask of STATUS field. */ + +/* Register: AAR_ENABLE */ +/* Description: Enable AAR */ + +/* Bits 1..0 : Enable or disable AAR */ +#define AAR_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define AAR_ENABLE_ENABLE_Msk (0x3UL << AAR_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define AAR_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ +#define AAR_ENABLE_ENABLE_Enabled (3UL) /*!< Enable */ + +/* Register: AAR_NIRK */ +/* Description: Number of IRKs */ + +/* Bits 4..0 : Number of Identity root keys available in the IRK data structure */ +#define AAR_NIRK_NIRK_Pos (0UL) /*!< Position of NIRK field. */ +#define AAR_NIRK_NIRK_Msk (0x1FUL << AAR_NIRK_NIRK_Pos) /*!< Bit mask of NIRK field. */ + +/* Register: AAR_IRKPTR */ +/* Description: Pointer to IRK data structure */ + +/* Bits 31..0 : Pointer to the IRK data structure */ +#define AAR_IRKPTR_IRKPTR_Pos (0UL) /*!< Position of IRKPTR field. */ +#define AAR_IRKPTR_IRKPTR_Msk (0xFFFFFFFFUL << AAR_IRKPTR_IRKPTR_Pos) /*!< Bit mask of IRKPTR field. */ + +/* Register: AAR_ADDRPTR */ +/* Description: Pointer to the resolvable address */ + +/* Bits 31..0 : Pointer to the resolvable address (6-bytes) */ +#define AAR_ADDRPTR_ADDRPTR_Pos (0UL) /*!< Position of ADDRPTR field. */ +#define AAR_ADDRPTR_ADDRPTR_Msk (0xFFFFFFFFUL << AAR_ADDRPTR_ADDRPTR_Pos) /*!< Bit mask of ADDRPTR field. */ + +/* Register: AAR_SCRATCHPTR */ +/* Description: Pointer to data area used for temporary storage */ + +/* Bits 31..0 : Pointer to a scratch data area used for temporary storage during resolution.A space of minimum 3 bytes must be reserved. */ +#define AAR_SCRATCHPTR_SCRATCHPTR_Pos (0UL) /*!< Position of SCRATCHPTR field. */ +#define AAR_SCRATCHPTR_SCRATCHPTR_Msk (0xFFFFFFFFUL << AAR_SCRATCHPTR_SCRATCHPTR_Pos) /*!< Bit mask of SCRATCHPTR field. */ + + +/* Peripheral: BPROT */ +/* Description: Block Protect */ + +/* Register: BPROT_CONFIG0 */ +/* Description: Block protect configuration register 0 */ + +/* Bit 31 : Enable protection for region 31. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION31_Pos (31UL) /*!< Position of REGION31 field. */ +#define BPROT_CONFIG0_REGION31_Msk (0x1UL << BPROT_CONFIG0_REGION31_Pos) /*!< Bit mask of REGION31 field. */ +#define BPROT_CONFIG0_REGION31_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION31_Enabled (1UL) /*!< Protection enable */ + +/* Bit 30 : Enable protection for region 30. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION30_Pos (30UL) /*!< Position of REGION30 field. */ +#define BPROT_CONFIG0_REGION30_Msk (0x1UL << BPROT_CONFIG0_REGION30_Pos) /*!< Bit mask of REGION30 field. */ +#define BPROT_CONFIG0_REGION30_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION30_Enabled (1UL) /*!< Protection enable */ + +/* Bit 29 : Enable protection for region 29. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION29_Pos (29UL) /*!< Position of REGION29 field. */ +#define BPROT_CONFIG0_REGION29_Msk (0x1UL << BPROT_CONFIG0_REGION29_Pos) /*!< Bit mask of REGION29 field. */ +#define BPROT_CONFIG0_REGION29_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION29_Enabled (1UL) /*!< Protection enable */ + +/* Bit 28 : Enable protection for region 28. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION28_Pos (28UL) /*!< Position of REGION28 field. */ +#define BPROT_CONFIG0_REGION28_Msk (0x1UL << BPROT_CONFIG0_REGION28_Pos) /*!< Bit mask of REGION28 field. */ +#define BPROT_CONFIG0_REGION28_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION28_Enabled (1UL) /*!< Protection enable */ + +/* Bit 27 : Enable protection for region 27. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION27_Pos (27UL) /*!< Position of REGION27 field. */ +#define BPROT_CONFIG0_REGION27_Msk (0x1UL << BPROT_CONFIG0_REGION27_Pos) /*!< Bit mask of REGION27 field. */ +#define BPROT_CONFIG0_REGION27_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION27_Enabled (1UL) /*!< Protection enable */ + +/* Bit 26 : Enable protection for region 26. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION26_Pos (26UL) /*!< Position of REGION26 field. */ +#define BPROT_CONFIG0_REGION26_Msk (0x1UL << BPROT_CONFIG0_REGION26_Pos) /*!< Bit mask of REGION26 field. */ +#define BPROT_CONFIG0_REGION26_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION26_Enabled (1UL) /*!< Protection enable */ + +/* Bit 25 : Enable protection for region 25. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION25_Pos (25UL) /*!< Position of REGION25 field. */ +#define BPROT_CONFIG0_REGION25_Msk (0x1UL << BPROT_CONFIG0_REGION25_Pos) /*!< Bit mask of REGION25 field. */ +#define BPROT_CONFIG0_REGION25_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION25_Enabled (1UL) /*!< Protection enable */ + +/* Bit 24 : Enable protection for region 24. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION24_Pos (24UL) /*!< Position of REGION24 field. */ +#define BPROT_CONFIG0_REGION24_Msk (0x1UL << BPROT_CONFIG0_REGION24_Pos) /*!< Bit mask of REGION24 field. */ +#define BPROT_CONFIG0_REGION24_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION24_Enabled (1UL) /*!< Protection enable */ + +/* Bit 23 : Enable protection for region 23. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION23_Pos (23UL) /*!< Position of REGION23 field. */ +#define BPROT_CONFIG0_REGION23_Msk (0x1UL << BPROT_CONFIG0_REGION23_Pos) /*!< Bit mask of REGION23 field. */ +#define BPROT_CONFIG0_REGION23_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION23_Enabled (1UL) /*!< Protection enable */ + +/* Bit 22 : Enable protection for region 22. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION22_Pos (22UL) /*!< Position of REGION22 field. */ +#define BPROT_CONFIG0_REGION22_Msk (0x1UL << BPROT_CONFIG0_REGION22_Pos) /*!< Bit mask of REGION22 field. */ +#define BPROT_CONFIG0_REGION22_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION22_Enabled (1UL) /*!< Protection enable */ + +/* Bit 21 : Enable protection for region 21. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION21_Pos (21UL) /*!< Position of REGION21 field. */ +#define BPROT_CONFIG0_REGION21_Msk (0x1UL << BPROT_CONFIG0_REGION21_Pos) /*!< Bit mask of REGION21 field. */ +#define BPROT_CONFIG0_REGION21_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION21_Enabled (1UL) /*!< Protection enable */ + +/* Bit 20 : Enable protection for region 20. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION20_Pos (20UL) /*!< Position of REGION20 field. */ +#define BPROT_CONFIG0_REGION20_Msk (0x1UL << BPROT_CONFIG0_REGION20_Pos) /*!< Bit mask of REGION20 field. */ +#define BPROT_CONFIG0_REGION20_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION20_Enabled (1UL) /*!< Protection enable */ + +/* Bit 19 : Enable protection for region 19. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION19_Pos (19UL) /*!< Position of REGION19 field. */ +#define BPROT_CONFIG0_REGION19_Msk (0x1UL << BPROT_CONFIG0_REGION19_Pos) /*!< Bit mask of REGION19 field. */ +#define BPROT_CONFIG0_REGION19_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION19_Enabled (1UL) /*!< Protection enable */ + +/* Bit 18 : Enable protection for region 18. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION18_Pos (18UL) /*!< Position of REGION18 field. */ +#define BPROT_CONFIG0_REGION18_Msk (0x1UL << BPROT_CONFIG0_REGION18_Pos) /*!< Bit mask of REGION18 field. */ +#define BPROT_CONFIG0_REGION18_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION18_Enabled (1UL) /*!< Protection enable */ + +/* Bit 17 : Enable protection for region 17. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION17_Pos (17UL) /*!< Position of REGION17 field. */ +#define BPROT_CONFIG0_REGION17_Msk (0x1UL << BPROT_CONFIG0_REGION17_Pos) /*!< Bit mask of REGION17 field. */ +#define BPROT_CONFIG0_REGION17_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION17_Enabled (1UL) /*!< Protection enable */ + +/* Bit 16 : Enable protection for region 16. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION16_Pos (16UL) /*!< Position of REGION16 field. */ +#define BPROT_CONFIG0_REGION16_Msk (0x1UL << BPROT_CONFIG0_REGION16_Pos) /*!< Bit mask of REGION16 field. */ +#define BPROT_CONFIG0_REGION16_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION16_Enabled (1UL) /*!< Protection enable */ + +/* Bit 15 : Enable protection for region 15. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION15_Pos (15UL) /*!< Position of REGION15 field. */ +#define BPROT_CONFIG0_REGION15_Msk (0x1UL << BPROT_CONFIG0_REGION15_Pos) /*!< Bit mask of REGION15 field. */ +#define BPROT_CONFIG0_REGION15_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION15_Enabled (1UL) /*!< Protection enable */ + +/* Bit 14 : Enable protection for region 14. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION14_Pos (14UL) /*!< Position of REGION14 field. */ +#define BPROT_CONFIG0_REGION14_Msk (0x1UL << BPROT_CONFIG0_REGION14_Pos) /*!< Bit mask of REGION14 field. */ +#define BPROT_CONFIG0_REGION14_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION14_Enabled (1UL) /*!< Protection enable */ + +/* Bit 13 : Enable protection for region 13. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION13_Pos (13UL) /*!< Position of REGION13 field. */ +#define BPROT_CONFIG0_REGION13_Msk (0x1UL << BPROT_CONFIG0_REGION13_Pos) /*!< Bit mask of REGION13 field. */ +#define BPROT_CONFIG0_REGION13_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION13_Enabled (1UL) /*!< Protection enable */ + +/* Bit 12 : Enable protection for region 12. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION12_Pos (12UL) /*!< Position of REGION12 field. */ +#define BPROT_CONFIG0_REGION12_Msk (0x1UL << BPROT_CONFIG0_REGION12_Pos) /*!< Bit mask of REGION12 field. */ +#define BPROT_CONFIG0_REGION12_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION12_Enabled (1UL) /*!< Protection enable */ + +/* Bit 11 : Enable protection for region 11. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION11_Pos (11UL) /*!< Position of REGION11 field. */ +#define BPROT_CONFIG0_REGION11_Msk (0x1UL << BPROT_CONFIG0_REGION11_Pos) /*!< Bit mask of REGION11 field. */ +#define BPROT_CONFIG0_REGION11_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION11_Enabled (1UL) /*!< Protection enable */ + +/* Bit 10 : Enable protection for region 10. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION10_Pos (10UL) /*!< Position of REGION10 field. */ +#define BPROT_CONFIG0_REGION10_Msk (0x1UL << BPROT_CONFIG0_REGION10_Pos) /*!< Bit mask of REGION10 field. */ +#define BPROT_CONFIG0_REGION10_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION10_Enabled (1UL) /*!< Protection enable */ + +/* Bit 9 : Enable protection for region 9. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION9_Pos (9UL) /*!< Position of REGION9 field. */ +#define BPROT_CONFIG0_REGION9_Msk (0x1UL << BPROT_CONFIG0_REGION9_Pos) /*!< Bit mask of REGION9 field. */ +#define BPROT_CONFIG0_REGION9_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION9_Enabled (1UL) /*!< Protection enable */ + +/* Bit 8 : Enable protection for region 8. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION8_Pos (8UL) /*!< Position of REGION8 field. */ +#define BPROT_CONFIG0_REGION8_Msk (0x1UL << BPROT_CONFIG0_REGION8_Pos) /*!< Bit mask of REGION8 field. */ +#define BPROT_CONFIG0_REGION8_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION8_Enabled (1UL) /*!< Protection enable */ + +/* Bit 7 : Enable protection for region 7. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION7_Pos (7UL) /*!< Position of REGION7 field. */ +#define BPROT_CONFIG0_REGION7_Msk (0x1UL << BPROT_CONFIG0_REGION7_Pos) /*!< Bit mask of REGION7 field. */ +#define BPROT_CONFIG0_REGION7_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION7_Enabled (1UL) /*!< Protection enable */ + +/* Bit 6 : Enable protection for region 6. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION6_Pos (6UL) /*!< Position of REGION6 field. */ +#define BPROT_CONFIG0_REGION6_Msk (0x1UL << BPROT_CONFIG0_REGION6_Pos) /*!< Bit mask of REGION6 field. */ +#define BPROT_CONFIG0_REGION6_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION6_Enabled (1UL) /*!< Protection enable */ + +/* Bit 5 : Enable protection for region 5. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION5_Pos (5UL) /*!< Position of REGION5 field. */ +#define BPROT_CONFIG0_REGION5_Msk (0x1UL << BPROT_CONFIG0_REGION5_Pos) /*!< Bit mask of REGION5 field. */ +#define BPROT_CONFIG0_REGION5_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION5_Enabled (1UL) /*!< Protection enable */ + +/* Bit 4 : Enable protection for region 4. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION4_Pos (4UL) /*!< Position of REGION4 field. */ +#define BPROT_CONFIG0_REGION4_Msk (0x1UL << BPROT_CONFIG0_REGION4_Pos) /*!< Bit mask of REGION4 field. */ +#define BPROT_CONFIG0_REGION4_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION4_Enabled (1UL) /*!< Protection enable */ + +/* Bit 3 : Enable protection for region 3. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION3_Pos (3UL) /*!< Position of REGION3 field. */ +#define BPROT_CONFIG0_REGION3_Msk (0x1UL << BPROT_CONFIG0_REGION3_Pos) /*!< Bit mask of REGION3 field. */ +#define BPROT_CONFIG0_REGION3_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION3_Enabled (1UL) /*!< Protection enable */ + +/* Bit 2 : Enable protection for region 2. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION2_Pos (2UL) /*!< Position of REGION2 field. */ +#define BPROT_CONFIG0_REGION2_Msk (0x1UL << BPROT_CONFIG0_REGION2_Pos) /*!< Bit mask of REGION2 field. */ +#define BPROT_CONFIG0_REGION2_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION2_Enabled (1UL) /*!< Protection enable */ + +/* Bit 1 : Enable protection for region 1. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION1_Pos (1UL) /*!< Position of REGION1 field. */ +#define BPROT_CONFIG0_REGION1_Msk (0x1UL << BPROT_CONFIG0_REGION1_Pos) /*!< Bit mask of REGION1 field. */ +#define BPROT_CONFIG0_REGION1_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION1_Enabled (1UL) /*!< Protection enable */ + +/* Bit 0 : Enable protection for region 0. Write '0' has no effect. */ +#define BPROT_CONFIG0_REGION0_Pos (0UL) /*!< Position of REGION0 field. */ +#define BPROT_CONFIG0_REGION0_Msk (0x1UL << BPROT_CONFIG0_REGION0_Pos) /*!< Bit mask of REGION0 field. */ +#define BPROT_CONFIG0_REGION0_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG0_REGION0_Enabled (1UL) /*!< Protection enable */ + +/* Register: BPROT_CONFIG1 */ +/* Description: Block protect configuration register 1 */ + +/* Bit 31 : Enable protection for region 63. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION63_Pos (31UL) /*!< Position of REGION63 field. */ +#define BPROT_CONFIG1_REGION63_Msk (0x1UL << BPROT_CONFIG1_REGION63_Pos) /*!< Bit mask of REGION63 field. */ +#define BPROT_CONFIG1_REGION63_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION63_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 30 : Enable protection for region 62. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION62_Pos (30UL) /*!< Position of REGION62 field. */ +#define BPROT_CONFIG1_REGION62_Msk (0x1UL << BPROT_CONFIG1_REGION62_Pos) /*!< Bit mask of REGION62 field. */ +#define BPROT_CONFIG1_REGION62_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION62_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 29 : Enable protection for region 61. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION61_Pos (29UL) /*!< Position of REGION61 field. */ +#define BPROT_CONFIG1_REGION61_Msk (0x1UL << BPROT_CONFIG1_REGION61_Pos) /*!< Bit mask of REGION61 field. */ +#define BPROT_CONFIG1_REGION61_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION61_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 28 : Enable protection for region 60. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION60_Pos (28UL) /*!< Position of REGION60 field. */ +#define BPROT_CONFIG1_REGION60_Msk (0x1UL << BPROT_CONFIG1_REGION60_Pos) /*!< Bit mask of REGION60 field. */ +#define BPROT_CONFIG1_REGION60_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION60_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 27 : Enable protection for region 59. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION59_Pos (27UL) /*!< Position of REGION59 field. */ +#define BPROT_CONFIG1_REGION59_Msk (0x1UL << BPROT_CONFIG1_REGION59_Pos) /*!< Bit mask of REGION59 field. */ +#define BPROT_CONFIG1_REGION59_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION59_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 26 : Enable protection for region 58. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION58_Pos (26UL) /*!< Position of REGION58 field. */ +#define BPROT_CONFIG1_REGION58_Msk (0x1UL << BPROT_CONFIG1_REGION58_Pos) /*!< Bit mask of REGION58 field. */ +#define BPROT_CONFIG1_REGION58_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION58_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 25 : Enable protection for region 57. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION57_Pos (25UL) /*!< Position of REGION57 field. */ +#define BPROT_CONFIG1_REGION57_Msk (0x1UL << BPROT_CONFIG1_REGION57_Pos) /*!< Bit mask of REGION57 field. */ +#define BPROT_CONFIG1_REGION57_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION57_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 24 : Enable protection for region 56. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION56_Pos (24UL) /*!< Position of REGION56 field. */ +#define BPROT_CONFIG1_REGION56_Msk (0x1UL << BPROT_CONFIG1_REGION56_Pos) /*!< Bit mask of REGION56 field. */ +#define BPROT_CONFIG1_REGION56_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION56_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 23 : Enable protection for region 55. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION55_Pos (23UL) /*!< Position of REGION55 field. */ +#define BPROT_CONFIG1_REGION55_Msk (0x1UL << BPROT_CONFIG1_REGION55_Pos) /*!< Bit mask of REGION55 field. */ +#define BPROT_CONFIG1_REGION55_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION55_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 22 : Enable protection for region 54. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION54_Pos (22UL) /*!< Position of REGION54 field. */ +#define BPROT_CONFIG1_REGION54_Msk (0x1UL << BPROT_CONFIG1_REGION54_Pos) /*!< Bit mask of REGION54 field. */ +#define BPROT_CONFIG1_REGION54_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION54_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 21 : Enable protection for region 53. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION53_Pos (21UL) /*!< Position of REGION53 field. */ +#define BPROT_CONFIG1_REGION53_Msk (0x1UL << BPROT_CONFIG1_REGION53_Pos) /*!< Bit mask of REGION53 field. */ +#define BPROT_CONFIG1_REGION53_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION53_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 20 : Enable protection for region 52. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION52_Pos (20UL) /*!< Position of REGION52 field. */ +#define BPROT_CONFIG1_REGION52_Msk (0x1UL << BPROT_CONFIG1_REGION52_Pos) /*!< Bit mask of REGION52 field. */ +#define BPROT_CONFIG1_REGION52_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION52_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 19 : Enable protection for region 51. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION51_Pos (19UL) /*!< Position of REGION51 field. */ +#define BPROT_CONFIG1_REGION51_Msk (0x1UL << BPROT_CONFIG1_REGION51_Pos) /*!< Bit mask of REGION51 field. */ +#define BPROT_CONFIG1_REGION51_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION51_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 18 : Enable protection for region 50. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION50_Pos (18UL) /*!< Position of REGION50 field. */ +#define BPROT_CONFIG1_REGION50_Msk (0x1UL << BPROT_CONFIG1_REGION50_Pos) /*!< Bit mask of REGION50 field. */ +#define BPROT_CONFIG1_REGION50_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION50_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 17 : Enable protection for region 49. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION49_Pos (17UL) /*!< Position of REGION49 field. */ +#define BPROT_CONFIG1_REGION49_Msk (0x1UL << BPROT_CONFIG1_REGION49_Pos) /*!< Bit mask of REGION49 field. */ +#define BPROT_CONFIG1_REGION49_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION49_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 16 : Enable protection for region 48. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION48_Pos (16UL) /*!< Position of REGION48 field. */ +#define BPROT_CONFIG1_REGION48_Msk (0x1UL << BPROT_CONFIG1_REGION48_Pos) /*!< Bit mask of REGION48 field. */ +#define BPROT_CONFIG1_REGION48_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION48_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 15 : Enable protection for region 47. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION47_Pos (15UL) /*!< Position of REGION47 field. */ +#define BPROT_CONFIG1_REGION47_Msk (0x1UL << BPROT_CONFIG1_REGION47_Pos) /*!< Bit mask of REGION47 field. */ +#define BPROT_CONFIG1_REGION47_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION47_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 14 : Enable protection for region 46. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION46_Pos (14UL) /*!< Position of REGION46 field. */ +#define BPROT_CONFIG1_REGION46_Msk (0x1UL << BPROT_CONFIG1_REGION46_Pos) /*!< Bit mask of REGION46 field. */ +#define BPROT_CONFIG1_REGION46_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION46_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 13 : Enable protection for region 45. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION45_Pos (13UL) /*!< Position of REGION45 field. */ +#define BPROT_CONFIG1_REGION45_Msk (0x1UL << BPROT_CONFIG1_REGION45_Pos) /*!< Bit mask of REGION45 field. */ +#define BPROT_CONFIG1_REGION45_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION45_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 12 : Enable protection for region 44. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION44_Pos (12UL) /*!< Position of REGION44 field. */ +#define BPROT_CONFIG1_REGION44_Msk (0x1UL << BPROT_CONFIG1_REGION44_Pos) /*!< Bit mask of REGION44 field. */ +#define BPROT_CONFIG1_REGION44_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION44_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 11 : Enable protection for region 43. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION43_Pos (11UL) /*!< Position of REGION43 field. */ +#define BPROT_CONFIG1_REGION43_Msk (0x1UL << BPROT_CONFIG1_REGION43_Pos) /*!< Bit mask of REGION43 field. */ +#define BPROT_CONFIG1_REGION43_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION43_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 10 : Enable protection for region 42. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION42_Pos (10UL) /*!< Position of REGION42 field. */ +#define BPROT_CONFIG1_REGION42_Msk (0x1UL << BPROT_CONFIG1_REGION42_Pos) /*!< Bit mask of REGION42 field. */ +#define BPROT_CONFIG1_REGION42_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION42_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 9 : Enable protection for region 41. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION41_Pos (9UL) /*!< Position of REGION41 field. */ +#define BPROT_CONFIG1_REGION41_Msk (0x1UL << BPROT_CONFIG1_REGION41_Pos) /*!< Bit mask of REGION41 field. */ +#define BPROT_CONFIG1_REGION41_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION41_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 8 : Enable protection for region 40. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION40_Pos (8UL) /*!< Position of REGION40 field. */ +#define BPROT_CONFIG1_REGION40_Msk (0x1UL << BPROT_CONFIG1_REGION40_Pos) /*!< Bit mask of REGION40 field. */ +#define BPROT_CONFIG1_REGION40_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION40_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 7 : Enable protection for region 39. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION39_Pos (7UL) /*!< Position of REGION39 field. */ +#define BPROT_CONFIG1_REGION39_Msk (0x1UL << BPROT_CONFIG1_REGION39_Pos) /*!< Bit mask of REGION39 field. */ +#define BPROT_CONFIG1_REGION39_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION39_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 6 : Enable protection for region 38. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION38_Pos (6UL) /*!< Position of REGION38 field. */ +#define BPROT_CONFIG1_REGION38_Msk (0x1UL << BPROT_CONFIG1_REGION38_Pos) /*!< Bit mask of REGION38 field. */ +#define BPROT_CONFIG1_REGION38_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION38_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 5 : Enable protection for region 37. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION37_Pos (5UL) /*!< Position of REGION37 field. */ +#define BPROT_CONFIG1_REGION37_Msk (0x1UL << BPROT_CONFIG1_REGION37_Pos) /*!< Bit mask of REGION37 field. */ +#define BPROT_CONFIG1_REGION37_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION37_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 4 : Enable protection for region 36. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION36_Pos (4UL) /*!< Position of REGION36 field. */ +#define BPROT_CONFIG1_REGION36_Msk (0x1UL << BPROT_CONFIG1_REGION36_Pos) /*!< Bit mask of REGION36 field. */ +#define BPROT_CONFIG1_REGION36_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION36_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 3 : Enable protection for region 35. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION35_Pos (3UL) /*!< Position of REGION35 field. */ +#define BPROT_CONFIG1_REGION35_Msk (0x1UL << BPROT_CONFIG1_REGION35_Pos) /*!< Bit mask of REGION35 field. */ +#define BPROT_CONFIG1_REGION35_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION35_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 2 : Enable protection for region 34. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION34_Pos (2UL) /*!< Position of REGION34 field. */ +#define BPROT_CONFIG1_REGION34_Msk (0x1UL << BPROT_CONFIG1_REGION34_Pos) /*!< Bit mask of REGION34 field. */ +#define BPROT_CONFIG1_REGION34_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION34_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 1 : Enable protection for region 33. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION33_Pos (1UL) /*!< Position of REGION33 field. */ +#define BPROT_CONFIG1_REGION33_Msk (0x1UL << BPROT_CONFIG1_REGION33_Pos) /*!< Bit mask of REGION33 field. */ +#define BPROT_CONFIG1_REGION33_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION33_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 0 : Enable protection for region 32. Write '0' has no effect. */ +#define BPROT_CONFIG1_REGION32_Pos (0UL) /*!< Position of REGION32 field. */ +#define BPROT_CONFIG1_REGION32_Msk (0x1UL << BPROT_CONFIG1_REGION32_Pos) /*!< Bit mask of REGION32 field. */ +#define BPROT_CONFIG1_REGION32_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG1_REGION32_Enabled (1UL) /*!< Protection enabled */ + +/* Register: BPROT_DISABLEINDEBUG */ +/* Description: Disable protection mechanism in debug interface mode */ + +/* Bit 0 : Disable the protection mechanism for NVM regions while in debug interface mode. This register will only disable the protection mechanism if the device is in debug interface mode. */ +#define BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Pos (0UL) /*!< Position of DISABLEINDEBUG field. */ +#define BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Msk (0x1UL << BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Pos) /*!< Bit mask of DISABLEINDEBUG field. */ +#define BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Enabled (0UL) /*!< Enable in debug */ +#define BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Disabled (1UL) /*!< Disable in debug */ + +/* Register: BPROT_CONFIG2 */ +/* Description: Block protect configuration register 2 */ + +/* Bit 31 : Enable protection for region 95. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION95_Pos (31UL) /*!< Position of REGION95 field. */ +#define BPROT_CONFIG2_REGION95_Msk (0x1UL << BPROT_CONFIG2_REGION95_Pos) /*!< Bit mask of REGION95 field. */ +#define BPROT_CONFIG2_REGION95_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION95_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 30 : Enable protection for region 94. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION94_Pos (30UL) /*!< Position of REGION94 field. */ +#define BPROT_CONFIG2_REGION94_Msk (0x1UL << BPROT_CONFIG2_REGION94_Pos) /*!< Bit mask of REGION94 field. */ +#define BPROT_CONFIG2_REGION94_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION94_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 29 : Enable protection for region 93. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION93_Pos (29UL) /*!< Position of REGION93 field. */ +#define BPROT_CONFIG2_REGION93_Msk (0x1UL << BPROT_CONFIG2_REGION93_Pos) /*!< Bit mask of REGION93 field. */ +#define BPROT_CONFIG2_REGION93_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION93_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 28 : Enable protection for region 92. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION92_Pos (28UL) /*!< Position of REGION92 field. */ +#define BPROT_CONFIG2_REGION92_Msk (0x1UL << BPROT_CONFIG2_REGION92_Pos) /*!< Bit mask of REGION92 field. */ +#define BPROT_CONFIG2_REGION92_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION92_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 27 : Enable protection for region 91. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION91_Pos (27UL) /*!< Position of REGION91 field. */ +#define BPROT_CONFIG2_REGION91_Msk (0x1UL << BPROT_CONFIG2_REGION91_Pos) /*!< Bit mask of REGION91 field. */ +#define BPROT_CONFIG2_REGION91_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION91_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 26 : Enable protection for region 90. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION90_Pos (26UL) /*!< Position of REGION90 field. */ +#define BPROT_CONFIG2_REGION90_Msk (0x1UL << BPROT_CONFIG2_REGION90_Pos) /*!< Bit mask of REGION90 field. */ +#define BPROT_CONFIG2_REGION90_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION90_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 25 : Enable protection for region 89. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION89_Pos (25UL) /*!< Position of REGION89 field. */ +#define BPROT_CONFIG2_REGION89_Msk (0x1UL << BPROT_CONFIG2_REGION89_Pos) /*!< Bit mask of REGION89 field. */ +#define BPROT_CONFIG2_REGION89_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION89_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 24 : Enable protection for region 88. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION88_Pos (24UL) /*!< Position of REGION88 field. */ +#define BPROT_CONFIG2_REGION88_Msk (0x1UL << BPROT_CONFIG2_REGION88_Pos) /*!< Bit mask of REGION88 field. */ +#define BPROT_CONFIG2_REGION88_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION88_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 23 : Enable protection for region 87. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION87_Pos (23UL) /*!< Position of REGION87 field. */ +#define BPROT_CONFIG2_REGION87_Msk (0x1UL << BPROT_CONFIG2_REGION87_Pos) /*!< Bit mask of REGION87 field. */ +#define BPROT_CONFIG2_REGION87_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION87_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 22 : Enable protection for region 86. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION86_Pos (22UL) /*!< Position of REGION86 field. */ +#define BPROT_CONFIG2_REGION86_Msk (0x1UL << BPROT_CONFIG2_REGION86_Pos) /*!< Bit mask of REGION86 field. */ +#define BPROT_CONFIG2_REGION86_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION86_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 21 : Enable protection for region 85. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION85_Pos (21UL) /*!< Position of REGION85 field. */ +#define BPROT_CONFIG2_REGION85_Msk (0x1UL << BPROT_CONFIG2_REGION85_Pos) /*!< Bit mask of REGION85 field. */ +#define BPROT_CONFIG2_REGION85_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION85_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 20 : Enable protection for region 84. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION84_Pos (20UL) /*!< Position of REGION84 field. */ +#define BPROT_CONFIG2_REGION84_Msk (0x1UL << BPROT_CONFIG2_REGION84_Pos) /*!< Bit mask of REGION84 field. */ +#define BPROT_CONFIG2_REGION84_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION84_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 19 : Enable protection for region 83. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION83_Pos (19UL) /*!< Position of REGION83 field. */ +#define BPROT_CONFIG2_REGION83_Msk (0x1UL << BPROT_CONFIG2_REGION83_Pos) /*!< Bit mask of REGION83 field. */ +#define BPROT_CONFIG2_REGION83_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION83_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 18 : Enable protection for region 82. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION82_Pos (18UL) /*!< Position of REGION82 field. */ +#define BPROT_CONFIG2_REGION82_Msk (0x1UL << BPROT_CONFIG2_REGION82_Pos) /*!< Bit mask of REGION82 field. */ +#define BPROT_CONFIG2_REGION82_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION82_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 17 : Enable protection for region 81. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION81_Pos (17UL) /*!< Position of REGION81 field. */ +#define BPROT_CONFIG2_REGION81_Msk (0x1UL << BPROT_CONFIG2_REGION81_Pos) /*!< Bit mask of REGION81 field. */ +#define BPROT_CONFIG2_REGION81_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION81_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 16 : Enable protection for region 80. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION80_Pos (16UL) /*!< Position of REGION80 field. */ +#define BPROT_CONFIG2_REGION80_Msk (0x1UL << BPROT_CONFIG2_REGION80_Pos) /*!< Bit mask of REGION80 field. */ +#define BPROT_CONFIG2_REGION80_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION80_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 15 : Enable protection for region 79. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION79_Pos (15UL) /*!< Position of REGION79 field. */ +#define BPROT_CONFIG2_REGION79_Msk (0x1UL << BPROT_CONFIG2_REGION79_Pos) /*!< Bit mask of REGION79 field. */ +#define BPROT_CONFIG2_REGION79_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION79_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 14 : Enable protection for region 78. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION78_Pos (14UL) /*!< Position of REGION78 field. */ +#define BPROT_CONFIG2_REGION78_Msk (0x1UL << BPROT_CONFIG2_REGION78_Pos) /*!< Bit mask of REGION78 field. */ +#define BPROT_CONFIG2_REGION78_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION78_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 13 : Enable protection for region 77. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION77_Pos (13UL) /*!< Position of REGION77 field. */ +#define BPROT_CONFIG2_REGION77_Msk (0x1UL << BPROT_CONFIG2_REGION77_Pos) /*!< Bit mask of REGION77 field. */ +#define BPROT_CONFIG2_REGION77_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION77_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 12 : Enable protection for region 76. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION76_Pos (12UL) /*!< Position of REGION76 field. */ +#define BPROT_CONFIG2_REGION76_Msk (0x1UL << BPROT_CONFIG2_REGION76_Pos) /*!< Bit mask of REGION76 field. */ +#define BPROT_CONFIG2_REGION76_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION76_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 11 : Enable protection for region 75. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION75_Pos (11UL) /*!< Position of REGION75 field. */ +#define BPROT_CONFIG2_REGION75_Msk (0x1UL << BPROT_CONFIG2_REGION75_Pos) /*!< Bit mask of REGION75 field. */ +#define BPROT_CONFIG2_REGION75_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION75_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 10 : Enable protection for region 74. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION74_Pos (10UL) /*!< Position of REGION74 field. */ +#define BPROT_CONFIG2_REGION74_Msk (0x1UL << BPROT_CONFIG2_REGION74_Pos) /*!< Bit mask of REGION74 field. */ +#define BPROT_CONFIG2_REGION74_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION74_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 9 : Enable protection for region 73. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION73_Pos (9UL) /*!< Position of REGION73 field. */ +#define BPROT_CONFIG2_REGION73_Msk (0x1UL << BPROT_CONFIG2_REGION73_Pos) /*!< Bit mask of REGION73 field. */ +#define BPROT_CONFIG2_REGION73_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION73_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 8 : Enable protection for region 72. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION72_Pos (8UL) /*!< Position of REGION72 field. */ +#define BPROT_CONFIG2_REGION72_Msk (0x1UL << BPROT_CONFIG2_REGION72_Pos) /*!< Bit mask of REGION72 field. */ +#define BPROT_CONFIG2_REGION72_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION72_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 7 : Enable protection for region 71. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION71_Pos (7UL) /*!< Position of REGION71 field. */ +#define BPROT_CONFIG2_REGION71_Msk (0x1UL << BPROT_CONFIG2_REGION71_Pos) /*!< Bit mask of REGION71 field. */ +#define BPROT_CONFIG2_REGION71_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION71_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 6 : Enable protection for region 70. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION70_Pos (6UL) /*!< Position of REGION70 field. */ +#define BPROT_CONFIG2_REGION70_Msk (0x1UL << BPROT_CONFIG2_REGION70_Pos) /*!< Bit mask of REGION70 field. */ +#define BPROT_CONFIG2_REGION70_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION70_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 5 : Enable protection for region 69. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION69_Pos (5UL) /*!< Position of REGION69 field. */ +#define BPROT_CONFIG2_REGION69_Msk (0x1UL << BPROT_CONFIG2_REGION69_Pos) /*!< Bit mask of REGION69 field. */ +#define BPROT_CONFIG2_REGION69_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION69_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 4 : Enable protection for region 68. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION68_Pos (4UL) /*!< Position of REGION68 field. */ +#define BPROT_CONFIG2_REGION68_Msk (0x1UL << BPROT_CONFIG2_REGION68_Pos) /*!< Bit mask of REGION68 field. */ +#define BPROT_CONFIG2_REGION68_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION68_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 3 : Enable protection for region 67. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION67_Pos (3UL) /*!< Position of REGION67 field. */ +#define BPROT_CONFIG2_REGION67_Msk (0x1UL << BPROT_CONFIG2_REGION67_Pos) /*!< Bit mask of REGION67 field. */ +#define BPROT_CONFIG2_REGION67_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION67_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 2 : Enable protection for region 66. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION66_Pos (2UL) /*!< Position of REGION66 field. */ +#define BPROT_CONFIG2_REGION66_Msk (0x1UL << BPROT_CONFIG2_REGION66_Pos) /*!< Bit mask of REGION66 field. */ +#define BPROT_CONFIG2_REGION66_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION66_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 1 : Enable protection for region 65. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION65_Pos (1UL) /*!< Position of REGION65 field. */ +#define BPROT_CONFIG2_REGION65_Msk (0x1UL << BPROT_CONFIG2_REGION65_Pos) /*!< Bit mask of REGION65 field. */ +#define BPROT_CONFIG2_REGION65_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION65_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 0 : Enable protection for region 64. Write '0' has no effect. */ +#define BPROT_CONFIG2_REGION64_Pos (0UL) /*!< Position of REGION64 field. */ +#define BPROT_CONFIG2_REGION64_Msk (0x1UL << BPROT_CONFIG2_REGION64_Pos) /*!< Bit mask of REGION64 field. */ +#define BPROT_CONFIG2_REGION64_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG2_REGION64_Enabled (1UL) /*!< Protection enabled */ + +/* Register: BPROT_CONFIG3 */ +/* Description: Block protect configuration register 3 */ + +/* Bit 31 : Enable protection for region 127. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION127_Pos (31UL) /*!< Position of REGION127 field. */ +#define BPROT_CONFIG3_REGION127_Msk (0x1UL << BPROT_CONFIG3_REGION127_Pos) /*!< Bit mask of REGION127 field. */ +#define BPROT_CONFIG3_REGION127_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION127_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 30 : Enable protection for region 126. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION126_Pos (30UL) /*!< Position of REGION126 field. */ +#define BPROT_CONFIG3_REGION126_Msk (0x1UL << BPROT_CONFIG3_REGION126_Pos) /*!< Bit mask of REGION126 field. */ +#define BPROT_CONFIG3_REGION126_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION126_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 29 : Enable protection for region 125. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION125_Pos (29UL) /*!< Position of REGION125 field. */ +#define BPROT_CONFIG3_REGION125_Msk (0x1UL << BPROT_CONFIG3_REGION125_Pos) /*!< Bit mask of REGION125 field. */ +#define BPROT_CONFIG3_REGION125_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION125_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 28 : Enable protection for region 124. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION124_Pos (28UL) /*!< Position of REGION124 field. */ +#define BPROT_CONFIG3_REGION124_Msk (0x1UL << BPROT_CONFIG3_REGION124_Pos) /*!< Bit mask of REGION124 field. */ +#define BPROT_CONFIG3_REGION124_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION124_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 27 : Enable protection for region 123. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION123_Pos (27UL) /*!< Position of REGION123 field. */ +#define BPROT_CONFIG3_REGION123_Msk (0x1UL << BPROT_CONFIG3_REGION123_Pos) /*!< Bit mask of REGION123 field. */ +#define BPROT_CONFIG3_REGION123_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION123_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 26 : Enable protection for region 122. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION122_Pos (26UL) /*!< Position of REGION122 field. */ +#define BPROT_CONFIG3_REGION122_Msk (0x1UL << BPROT_CONFIG3_REGION122_Pos) /*!< Bit mask of REGION122 field. */ +#define BPROT_CONFIG3_REGION122_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION122_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 25 : Enable protection for region 121. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION121_Pos (25UL) /*!< Position of REGION121 field. */ +#define BPROT_CONFIG3_REGION121_Msk (0x1UL << BPROT_CONFIG3_REGION121_Pos) /*!< Bit mask of REGION121 field. */ +#define BPROT_CONFIG3_REGION121_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION121_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 24 : Enable protection for region 120. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION120_Pos (24UL) /*!< Position of REGION120 field. */ +#define BPROT_CONFIG3_REGION120_Msk (0x1UL << BPROT_CONFIG3_REGION120_Pos) /*!< Bit mask of REGION120 field. */ +#define BPROT_CONFIG3_REGION120_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION120_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 23 : Enable protection for region 119. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION119_Pos (23UL) /*!< Position of REGION119 field. */ +#define BPROT_CONFIG3_REGION119_Msk (0x1UL << BPROT_CONFIG3_REGION119_Pos) /*!< Bit mask of REGION119 field. */ +#define BPROT_CONFIG3_REGION119_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION119_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 22 : Enable protection for region 118. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION118_Pos (22UL) /*!< Position of REGION118 field. */ +#define BPROT_CONFIG3_REGION118_Msk (0x1UL << BPROT_CONFIG3_REGION118_Pos) /*!< Bit mask of REGION118 field. */ +#define BPROT_CONFIG3_REGION118_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION118_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 21 : Enable protection for region 117. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION117_Pos (21UL) /*!< Position of REGION117 field. */ +#define BPROT_CONFIG3_REGION117_Msk (0x1UL << BPROT_CONFIG3_REGION117_Pos) /*!< Bit mask of REGION117 field. */ +#define BPROT_CONFIG3_REGION117_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION117_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 20 : Enable protection for region 116. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION116_Pos (20UL) /*!< Position of REGION116 field. */ +#define BPROT_CONFIG3_REGION116_Msk (0x1UL << BPROT_CONFIG3_REGION116_Pos) /*!< Bit mask of REGION116 field. */ +#define BPROT_CONFIG3_REGION116_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION116_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 19 : Enable protection for region 115. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION115_Pos (19UL) /*!< Position of REGION115 field. */ +#define BPROT_CONFIG3_REGION115_Msk (0x1UL << BPROT_CONFIG3_REGION115_Pos) /*!< Bit mask of REGION115 field. */ +#define BPROT_CONFIG3_REGION115_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION115_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 18 : Enable protection for region 114. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION114_Pos (18UL) /*!< Position of REGION114 field. */ +#define BPROT_CONFIG3_REGION114_Msk (0x1UL << BPROT_CONFIG3_REGION114_Pos) /*!< Bit mask of REGION114 field. */ +#define BPROT_CONFIG3_REGION114_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION114_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 17 : Enable protection for region 113. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION113_Pos (17UL) /*!< Position of REGION113 field. */ +#define BPROT_CONFIG3_REGION113_Msk (0x1UL << BPROT_CONFIG3_REGION113_Pos) /*!< Bit mask of REGION113 field. */ +#define BPROT_CONFIG3_REGION113_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION113_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 16 : Enable protection for region 112. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION112_Pos (16UL) /*!< Position of REGION112 field. */ +#define BPROT_CONFIG3_REGION112_Msk (0x1UL << BPROT_CONFIG3_REGION112_Pos) /*!< Bit mask of REGION112 field. */ +#define BPROT_CONFIG3_REGION112_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION112_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 15 : Enable protection for region 111. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION111_Pos (15UL) /*!< Position of REGION111 field. */ +#define BPROT_CONFIG3_REGION111_Msk (0x1UL << BPROT_CONFIG3_REGION111_Pos) /*!< Bit mask of REGION111 field. */ +#define BPROT_CONFIG3_REGION111_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION111_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 14 : Enable protection for region 110. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION110_Pos (14UL) /*!< Position of REGION110 field. */ +#define BPROT_CONFIG3_REGION110_Msk (0x1UL << BPROT_CONFIG3_REGION110_Pos) /*!< Bit mask of REGION110 field. */ +#define BPROT_CONFIG3_REGION110_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION110_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 13 : Enable protection for region 109. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION109_Pos (13UL) /*!< Position of REGION109 field. */ +#define BPROT_CONFIG3_REGION109_Msk (0x1UL << BPROT_CONFIG3_REGION109_Pos) /*!< Bit mask of REGION109 field. */ +#define BPROT_CONFIG3_REGION109_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION109_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 12 : Enable protection for region 108. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION108_Pos (12UL) /*!< Position of REGION108 field. */ +#define BPROT_CONFIG3_REGION108_Msk (0x1UL << BPROT_CONFIG3_REGION108_Pos) /*!< Bit mask of REGION108 field. */ +#define BPROT_CONFIG3_REGION108_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION108_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 11 : Enable protection for region 107. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION107_Pos (11UL) /*!< Position of REGION107 field. */ +#define BPROT_CONFIG3_REGION107_Msk (0x1UL << BPROT_CONFIG3_REGION107_Pos) /*!< Bit mask of REGION107 field. */ +#define BPROT_CONFIG3_REGION107_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION107_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 10 : Enable protection for region 106. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION106_Pos (10UL) /*!< Position of REGION106 field. */ +#define BPROT_CONFIG3_REGION106_Msk (0x1UL << BPROT_CONFIG3_REGION106_Pos) /*!< Bit mask of REGION106 field. */ +#define BPROT_CONFIG3_REGION106_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION106_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 9 : Enable protection for region 105. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION105_Pos (9UL) /*!< Position of REGION105 field. */ +#define BPROT_CONFIG3_REGION105_Msk (0x1UL << BPROT_CONFIG3_REGION105_Pos) /*!< Bit mask of REGION105 field. */ +#define BPROT_CONFIG3_REGION105_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION105_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 8 : Enable protection for region 104. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION104_Pos (8UL) /*!< Position of REGION104 field. */ +#define BPROT_CONFIG3_REGION104_Msk (0x1UL << BPROT_CONFIG3_REGION104_Pos) /*!< Bit mask of REGION104 field. */ +#define BPROT_CONFIG3_REGION104_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION104_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 7 : Enable protection for region 103. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION103_Pos (7UL) /*!< Position of REGION103 field. */ +#define BPROT_CONFIG3_REGION103_Msk (0x1UL << BPROT_CONFIG3_REGION103_Pos) /*!< Bit mask of REGION103 field. */ +#define BPROT_CONFIG3_REGION103_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION103_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 6 : Enable protection for region 102. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION102_Pos (6UL) /*!< Position of REGION102 field. */ +#define BPROT_CONFIG3_REGION102_Msk (0x1UL << BPROT_CONFIG3_REGION102_Pos) /*!< Bit mask of REGION102 field. */ +#define BPROT_CONFIG3_REGION102_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION102_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 5 : Enable protection for region 101. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION101_Pos (5UL) /*!< Position of REGION101 field. */ +#define BPROT_CONFIG3_REGION101_Msk (0x1UL << BPROT_CONFIG3_REGION101_Pos) /*!< Bit mask of REGION101 field. */ +#define BPROT_CONFIG3_REGION101_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION101_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 4 : Enable protection for region 100. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION100_Pos (4UL) /*!< Position of REGION100 field. */ +#define BPROT_CONFIG3_REGION100_Msk (0x1UL << BPROT_CONFIG3_REGION100_Pos) /*!< Bit mask of REGION100 field. */ +#define BPROT_CONFIG3_REGION100_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION100_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 3 : Enable protection for region 99. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION99_Pos (3UL) /*!< Position of REGION99 field. */ +#define BPROT_CONFIG3_REGION99_Msk (0x1UL << BPROT_CONFIG3_REGION99_Pos) /*!< Bit mask of REGION99 field. */ +#define BPROT_CONFIG3_REGION99_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION99_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 2 : Enable protection for region 98. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION98_Pos (2UL) /*!< Position of REGION98 field. */ +#define BPROT_CONFIG3_REGION98_Msk (0x1UL << BPROT_CONFIG3_REGION98_Pos) /*!< Bit mask of REGION98 field. */ +#define BPROT_CONFIG3_REGION98_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION98_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 1 : Enable protection for region 97. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION97_Pos (1UL) /*!< Position of REGION97 field. */ +#define BPROT_CONFIG3_REGION97_Msk (0x1UL << BPROT_CONFIG3_REGION97_Pos) /*!< Bit mask of REGION97 field. */ +#define BPROT_CONFIG3_REGION97_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION97_Enabled (1UL) /*!< Protection enabled */ + +/* Bit 0 : Enable protection for region 96. Write '0' has no effect. */ +#define BPROT_CONFIG3_REGION96_Pos (0UL) /*!< Position of REGION96 field. */ +#define BPROT_CONFIG3_REGION96_Msk (0x1UL << BPROT_CONFIG3_REGION96_Pos) /*!< Bit mask of REGION96 field. */ +#define BPROT_CONFIG3_REGION96_Disabled (0UL) /*!< Protection disabled */ +#define BPROT_CONFIG3_REGION96_Enabled (1UL) /*!< Protection enabled */ + + +/* Peripheral: CCM */ +/* Description: AES CCM Mode Encryption */ + +/* Register: CCM_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 0 : Shortcut between ENDKSGEN event and CRYPT task */ +#define CCM_SHORTS_ENDKSGEN_CRYPT_Pos (0UL) /*!< Position of ENDKSGEN_CRYPT field. */ +#define CCM_SHORTS_ENDKSGEN_CRYPT_Msk (0x1UL << CCM_SHORTS_ENDKSGEN_CRYPT_Pos) /*!< Bit mask of ENDKSGEN_CRYPT field. */ +#define CCM_SHORTS_ENDKSGEN_CRYPT_Disabled (0UL) /*!< Disable shortcut */ +#define CCM_SHORTS_ENDKSGEN_CRYPT_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: CCM_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 2 : Write '1' to Enable interrupt for ERROR event */ +#define CCM_INTENSET_ERROR_Pos (2UL) /*!< Position of ERROR field. */ +#define CCM_INTENSET_ERROR_Msk (0x1UL << CCM_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define CCM_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define CCM_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define CCM_INTENSET_ERROR_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for ENDCRYPT event */ +#define CCM_INTENSET_ENDCRYPT_Pos (1UL) /*!< Position of ENDCRYPT field. */ +#define CCM_INTENSET_ENDCRYPT_Msk (0x1UL << CCM_INTENSET_ENDCRYPT_Pos) /*!< Bit mask of ENDCRYPT field. */ +#define CCM_INTENSET_ENDCRYPT_Disabled (0UL) /*!< Read: Disabled */ +#define CCM_INTENSET_ENDCRYPT_Enabled (1UL) /*!< Read: Enabled */ +#define CCM_INTENSET_ENDCRYPT_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for ENDKSGEN event */ +#define CCM_INTENSET_ENDKSGEN_Pos (0UL) /*!< Position of ENDKSGEN field. */ +#define CCM_INTENSET_ENDKSGEN_Msk (0x1UL << CCM_INTENSET_ENDKSGEN_Pos) /*!< Bit mask of ENDKSGEN field. */ +#define CCM_INTENSET_ENDKSGEN_Disabled (0UL) /*!< Read: Disabled */ +#define CCM_INTENSET_ENDKSGEN_Enabled (1UL) /*!< Read: Enabled */ +#define CCM_INTENSET_ENDKSGEN_Set (1UL) /*!< Enable */ + +/* Register: CCM_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 2 : Write '1' to Disable interrupt for ERROR event */ +#define CCM_INTENCLR_ERROR_Pos (2UL) /*!< Position of ERROR field. */ +#define CCM_INTENCLR_ERROR_Msk (0x1UL << CCM_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define CCM_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define CCM_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define CCM_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for ENDCRYPT event */ +#define CCM_INTENCLR_ENDCRYPT_Pos (1UL) /*!< Position of ENDCRYPT field. */ +#define CCM_INTENCLR_ENDCRYPT_Msk (0x1UL << CCM_INTENCLR_ENDCRYPT_Pos) /*!< Bit mask of ENDCRYPT field. */ +#define CCM_INTENCLR_ENDCRYPT_Disabled (0UL) /*!< Read: Disabled */ +#define CCM_INTENCLR_ENDCRYPT_Enabled (1UL) /*!< Read: Enabled */ +#define CCM_INTENCLR_ENDCRYPT_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for ENDKSGEN event */ +#define CCM_INTENCLR_ENDKSGEN_Pos (0UL) /*!< Position of ENDKSGEN field. */ +#define CCM_INTENCLR_ENDKSGEN_Msk (0x1UL << CCM_INTENCLR_ENDKSGEN_Pos) /*!< Bit mask of ENDKSGEN field. */ +#define CCM_INTENCLR_ENDKSGEN_Disabled (0UL) /*!< Read: Disabled */ +#define CCM_INTENCLR_ENDKSGEN_Enabled (1UL) /*!< Read: Enabled */ +#define CCM_INTENCLR_ENDKSGEN_Clear (1UL) /*!< Disable */ + +/* Register: CCM_MICSTATUS */ +/* Description: MIC check result */ + +/* Bit 0 : The result of the MIC check performed during the previous decryption operation */ +#define CCM_MICSTATUS_MICSTATUS_Pos (0UL) /*!< Position of MICSTATUS field. */ +#define CCM_MICSTATUS_MICSTATUS_Msk (0x1UL << CCM_MICSTATUS_MICSTATUS_Pos) /*!< Bit mask of MICSTATUS field. */ +#define CCM_MICSTATUS_MICSTATUS_CheckFailed (0UL) /*!< MIC check failed */ +#define CCM_MICSTATUS_MICSTATUS_CheckPassed (1UL) /*!< MIC check passed */ + +/* Register: CCM_ENABLE */ +/* Description: Enable */ + +/* Bits 1..0 : Enable or disable CCM */ +#define CCM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define CCM_ENABLE_ENABLE_Msk (0x3UL << CCM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define CCM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ +#define CCM_ENABLE_ENABLE_Enabled (2UL) /*!< Enable */ + +/* Register: CCM_MODE */ +/* Description: Operation mode */ + +/* Bit 24 : Packet length configuration */ +#define CCM_MODE_LENGTH_Pos (24UL) /*!< Position of LENGTH field. */ +#define CCM_MODE_LENGTH_Msk (0x1UL << CCM_MODE_LENGTH_Pos) /*!< Bit mask of LENGTH field. */ +#define CCM_MODE_LENGTH_Default (0UL) /*!< Default length. Effective length of LENGTH field is 5-bit */ +#define CCM_MODE_LENGTH_Extended (1UL) /*!< Extended length. Effective length of LENGTH field is 8-bit */ + +/* Bit 16 : Data rate that the CCM shall run in synch with */ +#define CCM_MODE_DATARATE_Pos (16UL) /*!< Position of DATARATE field. */ +#define CCM_MODE_DATARATE_Msk (0x1UL << CCM_MODE_DATARATE_Pos) /*!< Bit mask of DATARATE field. */ +#define CCM_MODE_DATARATE_1Mbit (0UL) /*!< In synch with 1 Mbit data rate */ +#define CCM_MODE_DATARATE_2Mbit (1UL) /*!< In synch with 2 Mbit data rate */ + +/* Bit 0 : The mode of operation to be used */ +#define CCM_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ +#define CCM_MODE_MODE_Msk (0x1UL << CCM_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ +#define CCM_MODE_MODE_Encryption (0UL) /*!< AES CCM packet encryption mode */ +#define CCM_MODE_MODE_Decryption (1UL) /*!< AES CCM packet decryption mode */ + +/* Register: CCM_CNFPTR */ +/* Description: Pointer to data structure holding AES key and NONCE vector */ + +/* Bits 31..0 : Pointer to the data structure holding the AES key and the CCM NONCE vector (see Table 1 CCM data structure overview) */ +#define CCM_CNFPTR_CNFPTR_Pos (0UL) /*!< Position of CNFPTR field. */ +#define CCM_CNFPTR_CNFPTR_Msk (0xFFFFFFFFUL << CCM_CNFPTR_CNFPTR_Pos) /*!< Bit mask of CNFPTR field. */ + +/* Register: CCM_INPTR */ +/* Description: Input pointer */ + +/* Bits 31..0 : Input pointer */ +#define CCM_INPTR_INPTR_Pos (0UL) /*!< Position of INPTR field. */ +#define CCM_INPTR_INPTR_Msk (0xFFFFFFFFUL << CCM_INPTR_INPTR_Pos) /*!< Bit mask of INPTR field. */ + +/* Register: CCM_OUTPTR */ +/* Description: Output pointer */ + +/* Bits 31..0 : Output pointer */ +#define CCM_OUTPTR_OUTPTR_Pos (0UL) /*!< Position of OUTPTR field. */ +#define CCM_OUTPTR_OUTPTR_Msk (0xFFFFFFFFUL << CCM_OUTPTR_OUTPTR_Pos) /*!< Bit mask of OUTPTR field. */ + +/* Register: CCM_SCRATCHPTR */ +/* Description: Pointer to data area used for temporary storage */ + +/* Bits 31..0 : Pointer to a scratch data area used for temporary storage during key-stream generation, MIC generation and encryption/decryption. */ +#define CCM_SCRATCHPTR_SCRATCHPTR_Pos (0UL) /*!< Position of SCRATCHPTR field. */ +#define CCM_SCRATCHPTR_SCRATCHPTR_Msk (0xFFFFFFFFUL << CCM_SCRATCHPTR_SCRATCHPTR_Pos) /*!< Bit mask of SCRATCHPTR field. */ + + +/* Peripheral: CLOCK */ +/* Description: Clock control */ + +/* Register: CLOCK_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 4 : Write '1' to Enable interrupt for CTTO event */ +#define CLOCK_INTENSET_CTTO_Pos (4UL) /*!< Position of CTTO field. */ +#define CLOCK_INTENSET_CTTO_Msk (0x1UL << CLOCK_INTENSET_CTTO_Pos) /*!< Bit mask of CTTO field. */ +#define CLOCK_INTENSET_CTTO_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENSET_CTTO_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENSET_CTTO_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to Enable interrupt for DONE event */ +#define CLOCK_INTENSET_DONE_Pos (3UL) /*!< Position of DONE field. */ +#define CLOCK_INTENSET_DONE_Msk (0x1UL << CLOCK_INTENSET_DONE_Pos) /*!< Bit mask of DONE field. */ +#define CLOCK_INTENSET_DONE_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENSET_DONE_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENSET_DONE_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for LFCLKSTARTED event */ +#define CLOCK_INTENSET_LFCLKSTARTED_Pos (1UL) /*!< Position of LFCLKSTARTED field. */ +#define CLOCK_INTENSET_LFCLKSTARTED_Msk (0x1UL << CLOCK_INTENSET_LFCLKSTARTED_Pos) /*!< Bit mask of LFCLKSTARTED field. */ +#define CLOCK_INTENSET_LFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENSET_LFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENSET_LFCLKSTARTED_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for HFCLKSTARTED event */ +#define CLOCK_INTENSET_HFCLKSTARTED_Pos (0UL) /*!< Position of HFCLKSTARTED field. */ +#define CLOCK_INTENSET_HFCLKSTARTED_Msk (0x1UL << CLOCK_INTENSET_HFCLKSTARTED_Pos) /*!< Bit mask of HFCLKSTARTED field. */ +#define CLOCK_INTENSET_HFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENSET_HFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENSET_HFCLKSTARTED_Set (1UL) /*!< Enable */ + +/* Register: CLOCK_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 4 : Write '1' to Disable interrupt for CTTO event */ +#define CLOCK_INTENCLR_CTTO_Pos (4UL) /*!< Position of CTTO field. */ +#define CLOCK_INTENCLR_CTTO_Msk (0x1UL << CLOCK_INTENCLR_CTTO_Pos) /*!< Bit mask of CTTO field. */ +#define CLOCK_INTENCLR_CTTO_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENCLR_CTTO_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENCLR_CTTO_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to Disable interrupt for DONE event */ +#define CLOCK_INTENCLR_DONE_Pos (3UL) /*!< Position of DONE field. */ +#define CLOCK_INTENCLR_DONE_Msk (0x1UL << CLOCK_INTENCLR_DONE_Pos) /*!< Bit mask of DONE field. */ +#define CLOCK_INTENCLR_DONE_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENCLR_DONE_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENCLR_DONE_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for LFCLKSTARTED event */ +#define CLOCK_INTENCLR_LFCLKSTARTED_Pos (1UL) /*!< Position of LFCLKSTARTED field. */ +#define CLOCK_INTENCLR_LFCLKSTARTED_Msk (0x1UL << CLOCK_INTENCLR_LFCLKSTARTED_Pos) /*!< Bit mask of LFCLKSTARTED field. */ +#define CLOCK_INTENCLR_LFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENCLR_LFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENCLR_LFCLKSTARTED_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for HFCLKSTARTED event */ +#define CLOCK_INTENCLR_HFCLKSTARTED_Pos (0UL) /*!< Position of HFCLKSTARTED field. */ +#define CLOCK_INTENCLR_HFCLKSTARTED_Msk (0x1UL << CLOCK_INTENCLR_HFCLKSTARTED_Pos) /*!< Bit mask of HFCLKSTARTED field. */ +#define CLOCK_INTENCLR_HFCLKSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define CLOCK_INTENCLR_HFCLKSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define CLOCK_INTENCLR_HFCLKSTARTED_Clear (1UL) /*!< Disable */ + +/* Register: CLOCK_HFCLKRUN */ +/* Description: Status indicating that HFCLKSTART task has been triggered */ + +/* Bit 0 : HFCLKSTART task triggered or not */ +#define CLOCK_HFCLKRUN_STATUS_Pos (0UL) /*!< Position of STATUS field. */ +#define CLOCK_HFCLKRUN_STATUS_Msk (0x1UL << CLOCK_HFCLKRUN_STATUS_Pos) /*!< Bit mask of STATUS field. */ +#define CLOCK_HFCLKRUN_STATUS_NotTriggered (0UL) /*!< Task not triggered */ +#define CLOCK_HFCLKRUN_STATUS_Triggered (1UL) /*!< Task triggered */ + +/* Register: CLOCK_HFCLKSTAT */ +/* Description: HFCLK status */ + +/* Bit 16 : HFCLK state */ +#define CLOCK_HFCLKSTAT_STATE_Pos (16UL) /*!< Position of STATE field. */ +#define CLOCK_HFCLKSTAT_STATE_Msk (0x1UL << CLOCK_HFCLKSTAT_STATE_Pos) /*!< Bit mask of STATE field. */ +#define CLOCK_HFCLKSTAT_STATE_NotRunning (0UL) /*!< HFCLK not running */ +#define CLOCK_HFCLKSTAT_STATE_Running (1UL) /*!< HFCLK running */ + +/* Bit 0 : Source of HFCLK */ +#define CLOCK_HFCLKSTAT_SRC_Pos (0UL) /*!< Position of SRC field. */ +#define CLOCK_HFCLKSTAT_SRC_Msk (0x1UL << CLOCK_HFCLKSTAT_SRC_Pos) /*!< Bit mask of SRC field. */ +#define CLOCK_HFCLKSTAT_SRC_RC (0UL) /*!< 64 MHz internal oscillator (HFINT) */ +#define CLOCK_HFCLKSTAT_SRC_Xtal (1UL) /*!< 64 MHz crystal oscillator (HFXO) */ + +/* Register: CLOCK_LFCLKRUN */ +/* Description: Status indicating that LFCLKSTART task has been triggered */ + +/* Bit 0 : LFCLKSTART task triggered or not */ +#define CLOCK_LFCLKRUN_STATUS_Pos (0UL) /*!< Position of STATUS field. */ +#define CLOCK_LFCLKRUN_STATUS_Msk (0x1UL << CLOCK_LFCLKRUN_STATUS_Pos) /*!< Bit mask of STATUS field. */ +#define CLOCK_LFCLKRUN_STATUS_NotTriggered (0UL) /*!< Task not triggered */ +#define CLOCK_LFCLKRUN_STATUS_Triggered (1UL) /*!< Task triggered */ + +/* Register: CLOCK_LFCLKSTAT */ +/* Description: LFCLK status */ + +/* Bit 16 : LFCLK state */ +#define CLOCK_LFCLKSTAT_STATE_Pos (16UL) /*!< Position of STATE field. */ +#define CLOCK_LFCLKSTAT_STATE_Msk (0x1UL << CLOCK_LFCLKSTAT_STATE_Pos) /*!< Bit mask of STATE field. */ +#define CLOCK_LFCLKSTAT_STATE_NotRunning (0UL) /*!< LFCLK not running */ +#define CLOCK_LFCLKSTAT_STATE_Running (1UL) /*!< LFCLK running */ + +/* Bits 1..0 : Source of LFCLK */ +#define CLOCK_LFCLKSTAT_SRC_Pos (0UL) /*!< Position of SRC field. */ +#define CLOCK_LFCLKSTAT_SRC_Msk (0x3UL << CLOCK_LFCLKSTAT_SRC_Pos) /*!< Bit mask of SRC field. */ +#define CLOCK_LFCLKSTAT_SRC_RC (0UL) /*!< 32.768 kHz RC oscillator */ +#define CLOCK_LFCLKSTAT_SRC_Xtal (1UL) /*!< 32.768 kHz crystal oscillator */ +#define CLOCK_LFCLKSTAT_SRC_Synth (2UL) /*!< 32.768 kHz synthesized from HFCLK */ + +/* Register: CLOCK_LFCLKSRCCOPY */ +/* Description: Copy of LFCLKSRC register, set when LFCLKSTART task was triggered */ + +/* Bits 1..0 : Clock source */ +#define CLOCK_LFCLKSRCCOPY_SRC_Pos (0UL) /*!< Position of SRC field. */ +#define CLOCK_LFCLKSRCCOPY_SRC_Msk (0x3UL << CLOCK_LFCLKSRCCOPY_SRC_Pos) /*!< Bit mask of SRC field. */ +#define CLOCK_LFCLKSRCCOPY_SRC_RC (0UL) /*!< 32.768 kHz RC oscillator */ +#define CLOCK_LFCLKSRCCOPY_SRC_Xtal (1UL) /*!< 32.768 kHz crystal oscillator */ +#define CLOCK_LFCLKSRCCOPY_SRC_Synth (2UL) /*!< 32.768 kHz synthesized from HFCLK */ + +/* Register: CLOCK_LFCLKSRC */ +/* Description: Clock source for the LFCLK */ + +/* Bit 17 : Enable or disable external source for LFCLK */ +#define CLOCK_LFCLKSRC_EXTERNAL_Pos (17UL) /*!< Position of EXTERNAL field. */ +#define CLOCK_LFCLKSRC_EXTERNAL_Msk (0x1UL << CLOCK_LFCLKSRC_EXTERNAL_Pos) /*!< Bit mask of EXTERNAL field. */ +#define CLOCK_LFCLKSRC_EXTERNAL_Disabled (0UL) /*!< Disable external source (use with Xtal) */ +#define CLOCK_LFCLKSRC_EXTERNAL_Enabled (1UL) /*!< Enable use of external source instead of Xtal (SRC needs to be set to Xtal) */ + +/* Bit 16 : Enable or disable bypass of LFCLK crystal oscillator with external clock source */ +#define CLOCK_LFCLKSRC_BYPASS_Pos (16UL) /*!< Position of BYPASS field. */ +#define CLOCK_LFCLKSRC_BYPASS_Msk (0x1UL << CLOCK_LFCLKSRC_BYPASS_Pos) /*!< Bit mask of BYPASS field. */ +#define CLOCK_LFCLKSRC_BYPASS_Disabled (0UL) /*!< Disable (use with Xtal or low-swing external source) */ +#define CLOCK_LFCLKSRC_BYPASS_Enabled (1UL) /*!< Enable (use with rail-to-rail external source) */ + +/* Bits 1..0 : Clock source */ +#define CLOCK_LFCLKSRC_SRC_Pos (0UL) /*!< Position of SRC field. */ +#define CLOCK_LFCLKSRC_SRC_Msk (0x3UL << CLOCK_LFCLKSRC_SRC_Pos) /*!< Bit mask of SRC field. */ +#define CLOCK_LFCLKSRC_SRC_RC (0UL) /*!< 32.768 kHz RC oscillator */ +#define CLOCK_LFCLKSRC_SRC_Xtal (1UL) /*!< 32.768 kHz crystal oscillator */ +#define CLOCK_LFCLKSRC_SRC_Synth (2UL) /*!< 32.768 kHz synthesized from HFCLK */ + +/* Register: CLOCK_CTIV */ +/* Description: Calibration timer interval */ + +/* Bits 6..0 : Calibration timer interval in multiple of 0.25 seconds. Range: 0.25 seconds to 31.75 seconds. */ +#define CLOCK_CTIV_CTIV_Pos (0UL) /*!< Position of CTIV field. */ +#define CLOCK_CTIV_CTIV_Msk (0x7FUL << CLOCK_CTIV_CTIV_Pos) /*!< Bit mask of CTIV field. */ + +/* Register: CLOCK_TRACECONFIG */ +/* Description: Clocking options for the Trace Port debug interface */ + +/* Bits 17..16 : Pin multiplexing of trace signals. */ +#define CLOCK_TRACECONFIG_TRACEMUX_Pos (16UL) /*!< Position of TRACEMUX field. */ +#define CLOCK_TRACECONFIG_TRACEMUX_Msk (0x3UL << CLOCK_TRACECONFIG_TRACEMUX_Pos) /*!< Bit mask of TRACEMUX field. */ +#define CLOCK_TRACECONFIG_TRACEMUX_GPIO (0UL) /*!< GPIOs multiplexed onto all trace-pins */ +#define CLOCK_TRACECONFIG_TRACEMUX_Serial (1UL) /*!< SWO multiplexed onto P0.18, GPIO multiplexed onto other trace pins */ +#define CLOCK_TRACECONFIG_TRACEMUX_Parallel (2UL) /*!< TRACECLK and TRACEDATA multiplexed onto P0.20, P0.18, P0.16, P0.15 and P0.14. */ + +/* Bits 1..0 : Speed of Trace Port clock. Note that the TRACECLK pin will output this clock divided by two. */ +#define CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos (0UL) /*!< Position of TRACEPORTSPEED field. */ +#define CLOCK_TRACECONFIG_TRACEPORTSPEED_Msk (0x3UL << CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos) /*!< Bit mask of TRACEPORTSPEED field. */ +#define CLOCK_TRACECONFIG_TRACEPORTSPEED_32MHz (0UL) /*!< 32 MHz Trace Port clock (TRACECLK = 16 MHz) */ +#define CLOCK_TRACECONFIG_TRACEPORTSPEED_16MHz (1UL) /*!< 16 MHz Trace Port clock (TRACECLK = 8 MHz) */ +#define CLOCK_TRACECONFIG_TRACEPORTSPEED_8MHz (2UL) /*!< 8 MHz Trace Port clock (TRACECLK = 4 MHz) */ +#define CLOCK_TRACECONFIG_TRACEPORTSPEED_4MHz (3UL) /*!< 4 MHz Trace Port clock (TRACECLK = 2 MHz) */ + + +/* Peripheral: COMP */ +/* Description: Comparator */ + +/* Register: COMP_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 4 : Shortcut between CROSS event and STOP task */ +#define COMP_SHORTS_CROSS_STOP_Pos (4UL) /*!< Position of CROSS_STOP field. */ +#define COMP_SHORTS_CROSS_STOP_Msk (0x1UL << COMP_SHORTS_CROSS_STOP_Pos) /*!< Bit mask of CROSS_STOP field. */ +#define COMP_SHORTS_CROSS_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define COMP_SHORTS_CROSS_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 3 : Shortcut between UP event and STOP task */ +#define COMP_SHORTS_UP_STOP_Pos (3UL) /*!< Position of UP_STOP field. */ +#define COMP_SHORTS_UP_STOP_Msk (0x1UL << COMP_SHORTS_UP_STOP_Pos) /*!< Bit mask of UP_STOP field. */ +#define COMP_SHORTS_UP_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define COMP_SHORTS_UP_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 2 : Shortcut between DOWN event and STOP task */ +#define COMP_SHORTS_DOWN_STOP_Pos (2UL) /*!< Position of DOWN_STOP field. */ +#define COMP_SHORTS_DOWN_STOP_Msk (0x1UL << COMP_SHORTS_DOWN_STOP_Pos) /*!< Bit mask of DOWN_STOP field. */ +#define COMP_SHORTS_DOWN_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define COMP_SHORTS_DOWN_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 1 : Shortcut between READY event and STOP task */ +#define COMP_SHORTS_READY_STOP_Pos (1UL) /*!< Position of READY_STOP field. */ +#define COMP_SHORTS_READY_STOP_Msk (0x1UL << COMP_SHORTS_READY_STOP_Pos) /*!< Bit mask of READY_STOP field. */ +#define COMP_SHORTS_READY_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define COMP_SHORTS_READY_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 0 : Shortcut between READY event and SAMPLE task */ +#define COMP_SHORTS_READY_SAMPLE_Pos (0UL) /*!< Position of READY_SAMPLE field. */ +#define COMP_SHORTS_READY_SAMPLE_Msk (0x1UL << COMP_SHORTS_READY_SAMPLE_Pos) /*!< Bit mask of READY_SAMPLE field. */ +#define COMP_SHORTS_READY_SAMPLE_Disabled (0UL) /*!< Disable shortcut */ +#define COMP_SHORTS_READY_SAMPLE_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: COMP_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 3 : Enable or disable interrupt for CROSS event */ +#define COMP_INTEN_CROSS_Pos (3UL) /*!< Position of CROSS field. */ +#define COMP_INTEN_CROSS_Msk (0x1UL << COMP_INTEN_CROSS_Pos) /*!< Bit mask of CROSS field. */ +#define COMP_INTEN_CROSS_Disabled (0UL) /*!< Disable */ +#define COMP_INTEN_CROSS_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable interrupt for UP event */ +#define COMP_INTEN_UP_Pos (2UL) /*!< Position of UP field. */ +#define COMP_INTEN_UP_Msk (0x1UL << COMP_INTEN_UP_Pos) /*!< Bit mask of UP field. */ +#define COMP_INTEN_UP_Disabled (0UL) /*!< Disable */ +#define COMP_INTEN_UP_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for DOWN event */ +#define COMP_INTEN_DOWN_Pos (1UL) /*!< Position of DOWN field. */ +#define COMP_INTEN_DOWN_Msk (0x1UL << COMP_INTEN_DOWN_Pos) /*!< Bit mask of DOWN field. */ +#define COMP_INTEN_DOWN_Disabled (0UL) /*!< Disable */ +#define COMP_INTEN_DOWN_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable interrupt for READY event */ +#define COMP_INTEN_READY_Pos (0UL) /*!< Position of READY field. */ +#define COMP_INTEN_READY_Msk (0x1UL << COMP_INTEN_READY_Pos) /*!< Bit mask of READY field. */ +#define COMP_INTEN_READY_Disabled (0UL) /*!< Disable */ +#define COMP_INTEN_READY_Enabled (1UL) /*!< Enable */ + +/* Register: COMP_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 3 : Write '1' to Enable interrupt for CROSS event */ +#define COMP_INTENSET_CROSS_Pos (3UL) /*!< Position of CROSS field. */ +#define COMP_INTENSET_CROSS_Msk (0x1UL << COMP_INTENSET_CROSS_Pos) /*!< Bit mask of CROSS field. */ +#define COMP_INTENSET_CROSS_Disabled (0UL) /*!< Read: Disabled */ +#define COMP_INTENSET_CROSS_Enabled (1UL) /*!< Read: Enabled */ +#define COMP_INTENSET_CROSS_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable interrupt for UP event */ +#define COMP_INTENSET_UP_Pos (2UL) /*!< Position of UP field. */ +#define COMP_INTENSET_UP_Msk (0x1UL << COMP_INTENSET_UP_Pos) /*!< Bit mask of UP field. */ +#define COMP_INTENSET_UP_Disabled (0UL) /*!< Read: Disabled */ +#define COMP_INTENSET_UP_Enabled (1UL) /*!< Read: Enabled */ +#define COMP_INTENSET_UP_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for DOWN event */ +#define COMP_INTENSET_DOWN_Pos (1UL) /*!< Position of DOWN field. */ +#define COMP_INTENSET_DOWN_Msk (0x1UL << COMP_INTENSET_DOWN_Pos) /*!< Bit mask of DOWN field. */ +#define COMP_INTENSET_DOWN_Disabled (0UL) /*!< Read: Disabled */ +#define COMP_INTENSET_DOWN_Enabled (1UL) /*!< Read: Enabled */ +#define COMP_INTENSET_DOWN_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for READY event */ +#define COMP_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */ +#define COMP_INTENSET_READY_Msk (0x1UL << COMP_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ +#define COMP_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */ +#define COMP_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */ +#define COMP_INTENSET_READY_Set (1UL) /*!< Enable */ + +/* Register: COMP_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 3 : Write '1' to Disable interrupt for CROSS event */ +#define COMP_INTENCLR_CROSS_Pos (3UL) /*!< Position of CROSS field. */ +#define COMP_INTENCLR_CROSS_Msk (0x1UL << COMP_INTENCLR_CROSS_Pos) /*!< Bit mask of CROSS field. */ +#define COMP_INTENCLR_CROSS_Disabled (0UL) /*!< Read: Disabled */ +#define COMP_INTENCLR_CROSS_Enabled (1UL) /*!< Read: Enabled */ +#define COMP_INTENCLR_CROSS_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable interrupt for UP event */ +#define COMP_INTENCLR_UP_Pos (2UL) /*!< Position of UP field. */ +#define COMP_INTENCLR_UP_Msk (0x1UL << COMP_INTENCLR_UP_Pos) /*!< Bit mask of UP field. */ +#define COMP_INTENCLR_UP_Disabled (0UL) /*!< Read: Disabled */ +#define COMP_INTENCLR_UP_Enabled (1UL) /*!< Read: Enabled */ +#define COMP_INTENCLR_UP_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for DOWN event */ +#define COMP_INTENCLR_DOWN_Pos (1UL) /*!< Position of DOWN field. */ +#define COMP_INTENCLR_DOWN_Msk (0x1UL << COMP_INTENCLR_DOWN_Pos) /*!< Bit mask of DOWN field. */ +#define COMP_INTENCLR_DOWN_Disabled (0UL) /*!< Read: Disabled */ +#define COMP_INTENCLR_DOWN_Enabled (1UL) /*!< Read: Enabled */ +#define COMP_INTENCLR_DOWN_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for READY event */ +#define COMP_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */ +#define COMP_INTENCLR_READY_Msk (0x1UL << COMP_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ +#define COMP_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */ +#define COMP_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */ +#define COMP_INTENCLR_READY_Clear (1UL) /*!< Disable */ + +/* Register: COMP_RESULT */ +/* Description: Compare result */ + +/* Bit 0 : Result of last compare. Decision point SAMPLE task. */ +#define COMP_RESULT_RESULT_Pos (0UL) /*!< Position of RESULT field. */ +#define COMP_RESULT_RESULT_Msk (0x1UL << COMP_RESULT_RESULT_Pos) /*!< Bit mask of RESULT field. */ +#define COMP_RESULT_RESULT_Below (0UL) /*!< Input voltage is below the threshold (VIN+ < VIN-) */ +#define COMP_RESULT_RESULT_Above (1UL) /*!< Input voltage is above the threshold (VIN+ > VIN-) */ + +/* Register: COMP_ENABLE */ +/* Description: COMP enable */ + +/* Bits 1..0 : Enable or disable COMP */ +#define COMP_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define COMP_ENABLE_ENABLE_Msk (0x3UL << COMP_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define COMP_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ +#define COMP_ENABLE_ENABLE_Enabled (2UL) /*!< Enable */ + +/* Register: COMP_PSEL */ +/* Description: Pin select */ + +/* Bits 2..0 : Analog pin select */ +#define COMP_PSEL_PSEL_Pos (0UL) /*!< Position of PSEL field. */ +#define COMP_PSEL_PSEL_Msk (0x7UL << COMP_PSEL_PSEL_Pos) /*!< Bit mask of PSEL field. */ +#define COMP_PSEL_PSEL_AnalogInput0 (0UL) /*!< AIN0 selected as analog input */ +#define COMP_PSEL_PSEL_AnalogInput1 (1UL) /*!< AIN1 selected as analog input */ +#define COMP_PSEL_PSEL_AnalogInput2 (2UL) /*!< AIN2 selected as analog input */ +#define COMP_PSEL_PSEL_AnalogInput3 (3UL) /*!< AIN3 selected as analog input */ +#define COMP_PSEL_PSEL_AnalogInput4 (4UL) /*!< AIN4 selected as analog input */ +#define COMP_PSEL_PSEL_AnalogInput5 (5UL) /*!< AIN5 selected as analog input */ +#define COMP_PSEL_PSEL_AnalogInput6 (6UL) /*!< AIN6 selected as analog input */ +#define COMP_PSEL_PSEL_AnalogInput7 (7UL) /*!< AIN7 selected as analog input */ + +/* Register: COMP_REFSEL */ +/* Description: Reference source select for single-ended mode */ + +/* Bits 2..0 : Reference select */ +#define COMP_REFSEL_REFSEL_Pos (0UL) /*!< Position of REFSEL field. */ +#define COMP_REFSEL_REFSEL_Msk (0x7UL << COMP_REFSEL_REFSEL_Pos) /*!< Bit mask of REFSEL field. */ +#define COMP_REFSEL_REFSEL_Int1V2 (0UL) /*!< VREF = internal 1.2 V reference (VDD >= 1.7 V) */ +#define COMP_REFSEL_REFSEL_Int1V8 (1UL) /*!< VREF = internal 1.8 V reference (VDD >= VREF + 0.2 V) */ +#define COMP_REFSEL_REFSEL_Int2V4 (2UL) /*!< VREF = internal 2.4 V reference (VDD >= VREF + 0.2 V) */ +#define COMP_REFSEL_REFSEL_VDD (4UL) /*!< VREF = VDD */ +#define COMP_REFSEL_REFSEL_ARef (7UL) /*!< VREF = AREF (VDD >= VREF >= AREFMIN) */ + +/* Register: COMP_EXTREFSEL */ +/* Description: External reference select */ + +/* Bits 2..0 : External analog reference select */ +#define COMP_EXTREFSEL_EXTREFSEL_Pos (0UL) /*!< Position of EXTREFSEL field. */ +#define COMP_EXTREFSEL_EXTREFSEL_Msk (0x7UL << COMP_EXTREFSEL_EXTREFSEL_Pos) /*!< Bit mask of EXTREFSEL field. */ +#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference0 (0UL) /*!< Use AIN0 as external analog reference */ +#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference1 (1UL) /*!< Use AIN1 as external analog reference */ +#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference2 (2UL) /*!< Use AIN2 as external analog reference */ +#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference3 (3UL) /*!< Use AIN3 as external analog reference */ +#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference4 (4UL) /*!< Use AIN4 as external analog reference */ +#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference5 (5UL) /*!< Use AIN5 as external analog reference */ +#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference6 (6UL) /*!< Use AIN6 as external analog reference */ +#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference7 (7UL) /*!< Use AIN7 as external analog reference */ + +/* Register: COMP_TH */ +/* Description: Threshold configuration for hysteresis unit */ + +/* Bits 13..8 : VUP = (THUP+1)/64*VREF */ +#define COMP_TH_THUP_Pos (8UL) /*!< Position of THUP field. */ +#define COMP_TH_THUP_Msk (0x3FUL << COMP_TH_THUP_Pos) /*!< Bit mask of THUP field. */ + +/* Bits 5..0 : VDOWN = (THDOWN+1)/64*VREF */ +#define COMP_TH_THDOWN_Pos (0UL) /*!< Position of THDOWN field. */ +#define COMP_TH_THDOWN_Msk (0x3FUL << COMP_TH_THDOWN_Pos) /*!< Bit mask of THDOWN field. */ + +/* Register: COMP_MODE */ +/* Description: Mode configuration */ + +/* Bit 8 : Main operation modes */ +#define COMP_MODE_MAIN_Pos (8UL) /*!< Position of MAIN field. */ +#define COMP_MODE_MAIN_Msk (0x1UL << COMP_MODE_MAIN_Pos) /*!< Bit mask of MAIN field. */ +#define COMP_MODE_MAIN_SE (0UL) /*!< Single-ended mode */ +#define COMP_MODE_MAIN_Diff (1UL) /*!< Differential mode */ + +/* Bits 1..0 : Speed and power modes */ +#define COMP_MODE_SP_Pos (0UL) /*!< Position of SP field. */ +#define COMP_MODE_SP_Msk (0x3UL << COMP_MODE_SP_Pos) /*!< Bit mask of SP field. */ +#define COMP_MODE_SP_Low (0UL) /*!< Low-power mode */ +#define COMP_MODE_SP_Normal (1UL) /*!< Normal mode */ +#define COMP_MODE_SP_High (2UL) /*!< High-speed mode */ + +/* Register: COMP_HYST */ +/* Description: Comparator hysteresis enable */ + +/* Bit 0 : Comparator hysteresis */ +#define COMP_HYST_HYST_Pos (0UL) /*!< Position of HYST field. */ +#define COMP_HYST_HYST_Msk (0x1UL << COMP_HYST_HYST_Pos) /*!< Bit mask of HYST field. */ +#define COMP_HYST_HYST_NoHyst (0UL) /*!< Comparator hysteresis disabled */ +#define COMP_HYST_HYST_Hyst50mV (1UL) /*!< Comparator hysteresis enabled */ + +/* Register: COMP_ISOURCE */ +/* Description: Current source select on analog input */ + +/* Bits 1..0 : Comparator hysteresis */ +#define COMP_ISOURCE_ISOURCE_Pos (0UL) /*!< Position of ISOURCE field. */ +#define COMP_ISOURCE_ISOURCE_Msk (0x3UL << COMP_ISOURCE_ISOURCE_Pos) /*!< Bit mask of ISOURCE field. */ +#define COMP_ISOURCE_ISOURCE_Off (0UL) /*!< Current source disabled */ +#define COMP_ISOURCE_ISOURCE_Ien2mA5 (1UL) /*!< Current source enabled (+/- 2.5 uA) */ +#define COMP_ISOURCE_ISOURCE_Ien5mA (2UL) /*!< Current source enabled (+/- 5 uA) */ +#define COMP_ISOURCE_ISOURCE_Ien10mA (3UL) /*!< Current source enabled (+/- 10 uA) */ + + +/* Peripheral: ECB */ +/* Description: AES ECB Mode Encryption */ + +/* Register: ECB_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 1 : Write '1' to Enable interrupt for ERRORECB event */ +#define ECB_INTENSET_ERRORECB_Pos (1UL) /*!< Position of ERRORECB field. */ +#define ECB_INTENSET_ERRORECB_Msk (0x1UL << ECB_INTENSET_ERRORECB_Pos) /*!< Bit mask of ERRORECB field. */ +#define ECB_INTENSET_ERRORECB_Disabled (0UL) /*!< Read: Disabled */ +#define ECB_INTENSET_ERRORECB_Enabled (1UL) /*!< Read: Enabled */ +#define ECB_INTENSET_ERRORECB_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for ENDECB event */ +#define ECB_INTENSET_ENDECB_Pos (0UL) /*!< Position of ENDECB field. */ +#define ECB_INTENSET_ENDECB_Msk (0x1UL << ECB_INTENSET_ENDECB_Pos) /*!< Bit mask of ENDECB field. */ +#define ECB_INTENSET_ENDECB_Disabled (0UL) /*!< Read: Disabled */ +#define ECB_INTENSET_ENDECB_Enabled (1UL) /*!< Read: Enabled */ +#define ECB_INTENSET_ENDECB_Set (1UL) /*!< Enable */ + +/* Register: ECB_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 1 : Write '1' to Disable interrupt for ERRORECB event */ +#define ECB_INTENCLR_ERRORECB_Pos (1UL) /*!< Position of ERRORECB field. */ +#define ECB_INTENCLR_ERRORECB_Msk (0x1UL << ECB_INTENCLR_ERRORECB_Pos) /*!< Bit mask of ERRORECB field. */ +#define ECB_INTENCLR_ERRORECB_Disabled (0UL) /*!< Read: Disabled */ +#define ECB_INTENCLR_ERRORECB_Enabled (1UL) /*!< Read: Enabled */ +#define ECB_INTENCLR_ERRORECB_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for ENDECB event */ +#define ECB_INTENCLR_ENDECB_Pos (0UL) /*!< Position of ENDECB field. */ +#define ECB_INTENCLR_ENDECB_Msk (0x1UL << ECB_INTENCLR_ENDECB_Pos) /*!< Bit mask of ENDECB field. */ +#define ECB_INTENCLR_ENDECB_Disabled (0UL) /*!< Read: Disabled */ +#define ECB_INTENCLR_ENDECB_Enabled (1UL) /*!< Read: Enabled */ +#define ECB_INTENCLR_ENDECB_Clear (1UL) /*!< Disable */ + +/* Register: ECB_ECBDATAPTR */ +/* Description: ECB block encrypt memory pointers */ + +/* Bits 31..0 : Pointer to the ECB data structure (see Table 1 ECB data structure overview) */ +#define ECB_ECBDATAPTR_ECBDATAPTR_Pos (0UL) /*!< Position of ECBDATAPTR field. */ +#define ECB_ECBDATAPTR_ECBDATAPTR_Msk (0xFFFFFFFFUL << ECB_ECBDATAPTR_ECBDATAPTR_Pos) /*!< Bit mask of ECBDATAPTR field. */ + + +/* Peripheral: EGU */ +/* Description: Event Generator Unit 0 */ + +/* Register: EGU_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 15 : Enable or disable interrupt for TRIGGERED[15] event */ +#define EGU_INTEN_TRIGGERED15_Pos (15UL) /*!< Position of TRIGGERED15 field. */ +#define EGU_INTEN_TRIGGERED15_Msk (0x1UL << EGU_INTEN_TRIGGERED15_Pos) /*!< Bit mask of TRIGGERED15 field. */ +#define EGU_INTEN_TRIGGERED15_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED15_Enabled (1UL) /*!< Enable */ + +/* Bit 14 : Enable or disable interrupt for TRIGGERED[14] event */ +#define EGU_INTEN_TRIGGERED14_Pos (14UL) /*!< Position of TRIGGERED14 field. */ +#define EGU_INTEN_TRIGGERED14_Msk (0x1UL << EGU_INTEN_TRIGGERED14_Pos) /*!< Bit mask of TRIGGERED14 field. */ +#define EGU_INTEN_TRIGGERED14_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED14_Enabled (1UL) /*!< Enable */ + +/* Bit 13 : Enable or disable interrupt for TRIGGERED[13] event */ +#define EGU_INTEN_TRIGGERED13_Pos (13UL) /*!< Position of TRIGGERED13 field. */ +#define EGU_INTEN_TRIGGERED13_Msk (0x1UL << EGU_INTEN_TRIGGERED13_Pos) /*!< Bit mask of TRIGGERED13 field. */ +#define EGU_INTEN_TRIGGERED13_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED13_Enabled (1UL) /*!< Enable */ + +/* Bit 12 : Enable or disable interrupt for TRIGGERED[12] event */ +#define EGU_INTEN_TRIGGERED12_Pos (12UL) /*!< Position of TRIGGERED12 field. */ +#define EGU_INTEN_TRIGGERED12_Msk (0x1UL << EGU_INTEN_TRIGGERED12_Pos) /*!< Bit mask of TRIGGERED12 field. */ +#define EGU_INTEN_TRIGGERED12_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED12_Enabled (1UL) /*!< Enable */ + +/* Bit 11 : Enable or disable interrupt for TRIGGERED[11] event */ +#define EGU_INTEN_TRIGGERED11_Pos (11UL) /*!< Position of TRIGGERED11 field. */ +#define EGU_INTEN_TRIGGERED11_Msk (0x1UL << EGU_INTEN_TRIGGERED11_Pos) /*!< Bit mask of TRIGGERED11 field. */ +#define EGU_INTEN_TRIGGERED11_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED11_Enabled (1UL) /*!< Enable */ + +/* Bit 10 : Enable or disable interrupt for TRIGGERED[10] event */ +#define EGU_INTEN_TRIGGERED10_Pos (10UL) /*!< Position of TRIGGERED10 field. */ +#define EGU_INTEN_TRIGGERED10_Msk (0x1UL << EGU_INTEN_TRIGGERED10_Pos) /*!< Bit mask of TRIGGERED10 field. */ +#define EGU_INTEN_TRIGGERED10_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED10_Enabled (1UL) /*!< Enable */ + +/* Bit 9 : Enable or disable interrupt for TRIGGERED[9] event */ +#define EGU_INTEN_TRIGGERED9_Pos (9UL) /*!< Position of TRIGGERED9 field. */ +#define EGU_INTEN_TRIGGERED9_Msk (0x1UL << EGU_INTEN_TRIGGERED9_Pos) /*!< Bit mask of TRIGGERED9 field. */ +#define EGU_INTEN_TRIGGERED9_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED9_Enabled (1UL) /*!< Enable */ + +/* Bit 8 : Enable or disable interrupt for TRIGGERED[8] event */ +#define EGU_INTEN_TRIGGERED8_Pos (8UL) /*!< Position of TRIGGERED8 field. */ +#define EGU_INTEN_TRIGGERED8_Msk (0x1UL << EGU_INTEN_TRIGGERED8_Pos) /*!< Bit mask of TRIGGERED8 field. */ +#define EGU_INTEN_TRIGGERED8_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED8_Enabled (1UL) /*!< Enable */ + +/* Bit 7 : Enable or disable interrupt for TRIGGERED[7] event */ +#define EGU_INTEN_TRIGGERED7_Pos (7UL) /*!< Position of TRIGGERED7 field. */ +#define EGU_INTEN_TRIGGERED7_Msk (0x1UL << EGU_INTEN_TRIGGERED7_Pos) /*!< Bit mask of TRIGGERED7 field. */ +#define EGU_INTEN_TRIGGERED7_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED7_Enabled (1UL) /*!< Enable */ + +/* Bit 6 : Enable or disable interrupt for TRIGGERED[6] event */ +#define EGU_INTEN_TRIGGERED6_Pos (6UL) /*!< Position of TRIGGERED6 field. */ +#define EGU_INTEN_TRIGGERED6_Msk (0x1UL << EGU_INTEN_TRIGGERED6_Pos) /*!< Bit mask of TRIGGERED6 field. */ +#define EGU_INTEN_TRIGGERED6_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED6_Enabled (1UL) /*!< Enable */ + +/* Bit 5 : Enable or disable interrupt for TRIGGERED[5] event */ +#define EGU_INTEN_TRIGGERED5_Pos (5UL) /*!< Position of TRIGGERED5 field. */ +#define EGU_INTEN_TRIGGERED5_Msk (0x1UL << EGU_INTEN_TRIGGERED5_Pos) /*!< Bit mask of TRIGGERED5 field. */ +#define EGU_INTEN_TRIGGERED5_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED5_Enabled (1UL) /*!< Enable */ + +/* Bit 4 : Enable or disable interrupt for TRIGGERED[4] event */ +#define EGU_INTEN_TRIGGERED4_Pos (4UL) /*!< Position of TRIGGERED4 field. */ +#define EGU_INTEN_TRIGGERED4_Msk (0x1UL << EGU_INTEN_TRIGGERED4_Pos) /*!< Bit mask of TRIGGERED4 field. */ +#define EGU_INTEN_TRIGGERED4_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED4_Enabled (1UL) /*!< Enable */ + +/* Bit 3 : Enable or disable interrupt for TRIGGERED[3] event */ +#define EGU_INTEN_TRIGGERED3_Pos (3UL) /*!< Position of TRIGGERED3 field. */ +#define EGU_INTEN_TRIGGERED3_Msk (0x1UL << EGU_INTEN_TRIGGERED3_Pos) /*!< Bit mask of TRIGGERED3 field. */ +#define EGU_INTEN_TRIGGERED3_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED3_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable interrupt for TRIGGERED[2] event */ +#define EGU_INTEN_TRIGGERED2_Pos (2UL) /*!< Position of TRIGGERED2 field. */ +#define EGU_INTEN_TRIGGERED2_Msk (0x1UL << EGU_INTEN_TRIGGERED2_Pos) /*!< Bit mask of TRIGGERED2 field. */ +#define EGU_INTEN_TRIGGERED2_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED2_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for TRIGGERED[1] event */ +#define EGU_INTEN_TRIGGERED1_Pos (1UL) /*!< Position of TRIGGERED1 field. */ +#define EGU_INTEN_TRIGGERED1_Msk (0x1UL << EGU_INTEN_TRIGGERED1_Pos) /*!< Bit mask of TRIGGERED1 field. */ +#define EGU_INTEN_TRIGGERED1_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED1_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable interrupt for TRIGGERED[0] event */ +#define EGU_INTEN_TRIGGERED0_Pos (0UL) /*!< Position of TRIGGERED0 field. */ +#define EGU_INTEN_TRIGGERED0_Msk (0x1UL << EGU_INTEN_TRIGGERED0_Pos) /*!< Bit mask of TRIGGERED0 field. */ +#define EGU_INTEN_TRIGGERED0_Disabled (0UL) /*!< Disable */ +#define EGU_INTEN_TRIGGERED0_Enabled (1UL) /*!< Enable */ + +/* Register: EGU_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 15 : Write '1' to Enable interrupt for TRIGGERED[15] event */ +#define EGU_INTENSET_TRIGGERED15_Pos (15UL) /*!< Position of TRIGGERED15 field. */ +#define EGU_INTENSET_TRIGGERED15_Msk (0x1UL << EGU_INTENSET_TRIGGERED15_Pos) /*!< Bit mask of TRIGGERED15 field. */ +#define EGU_INTENSET_TRIGGERED15_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED15_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED15_Set (1UL) /*!< Enable */ + +/* Bit 14 : Write '1' to Enable interrupt for TRIGGERED[14] event */ +#define EGU_INTENSET_TRIGGERED14_Pos (14UL) /*!< Position of TRIGGERED14 field. */ +#define EGU_INTENSET_TRIGGERED14_Msk (0x1UL << EGU_INTENSET_TRIGGERED14_Pos) /*!< Bit mask of TRIGGERED14 field. */ +#define EGU_INTENSET_TRIGGERED14_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED14_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED14_Set (1UL) /*!< Enable */ + +/* Bit 13 : Write '1' to Enable interrupt for TRIGGERED[13] event */ +#define EGU_INTENSET_TRIGGERED13_Pos (13UL) /*!< Position of TRIGGERED13 field. */ +#define EGU_INTENSET_TRIGGERED13_Msk (0x1UL << EGU_INTENSET_TRIGGERED13_Pos) /*!< Bit mask of TRIGGERED13 field. */ +#define EGU_INTENSET_TRIGGERED13_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED13_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED13_Set (1UL) /*!< Enable */ + +/* Bit 12 : Write '1' to Enable interrupt for TRIGGERED[12] event */ +#define EGU_INTENSET_TRIGGERED12_Pos (12UL) /*!< Position of TRIGGERED12 field. */ +#define EGU_INTENSET_TRIGGERED12_Msk (0x1UL << EGU_INTENSET_TRIGGERED12_Pos) /*!< Bit mask of TRIGGERED12 field. */ +#define EGU_INTENSET_TRIGGERED12_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED12_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED12_Set (1UL) /*!< Enable */ + +/* Bit 11 : Write '1' to Enable interrupt for TRIGGERED[11] event */ +#define EGU_INTENSET_TRIGGERED11_Pos (11UL) /*!< Position of TRIGGERED11 field. */ +#define EGU_INTENSET_TRIGGERED11_Msk (0x1UL << EGU_INTENSET_TRIGGERED11_Pos) /*!< Bit mask of TRIGGERED11 field. */ +#define EGU_INTENSET_TRIGGERED11_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED11_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED11_Set (1UL) /*!< Enable */ + +/* Bit 10 : Write '1' to Enable interrupt for TRIGGERED[10] event */ +#define EGU_INTENSET_TRIGGERED10_Pos (10UL) /*!< Position of TRIGGERED10 field. */ +#define EGU_INTENSET_TRIGGERED10_Msk (0x1UL << EGU_INTENSET_TRIGGERED10_Pos) /*!< Bit mask of TRIGGERED10 field. */ +#define EGU_INTENSET_TRIGGERED10_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED10_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED10_Set (1UL) /*!< Enable */ + +/* Bit 9 : Write '1' to Enable interrupt for TRIGGERED[9] event */ +#define EGU_INTENSET_TRIGGERED9_Pos (9UL) /*!< Position of TRIGGERED9 field. */ +#define EGU_INTENSET_TRIGGERED9_Msk (0x1UL << EGU_INTENSET_TRIGGERED9_Pos) /*!< Bit mask of TRIGGERED9 field. */ +#define EGU_INTENSET_TRIGGERED9_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED9_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED9_Set (1UL) /*!< Enable */ + +/* Bit 8 : Write '1' to Enable interrupt for TRIGGERED[8] event */ +#define EGU_INTENSET_TRIGGERED8_Pos (8UL) /*!< Position of TRIGGERED8 field. */ +#define EGU_INTENSET_TRIGGERED8_Msk (0x1UL << EGU_INTENSET_TRIGGERED8_Pos) /*!< Bit mask of TRIGGERED8 field. */ +#define EGU_INTENSET_TRIGGERED8_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED8_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED8_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to Enable interrupt for TRIGGERED[7] event */ +#define EGU_INTENSET_TRIGGERED7_Pos (7UL) /*!< Position of TRIGGERED7 field. */ +#define EGU_INTENSET_TRIGGERED7_Msk (0x1UL << EGU_INTENSET_TRIGGERED7_Pos) /*!< Bit mask of TRIGGERED7 field. */ +#define EGU_INTENSET_TRIGGERED7_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED7_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED7_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to Enable interrupt for TRIGGERED[6] event */ +#define EGU_INTENSET_TRIGGERED6_Pos (6UL) /*!< Position of TRIGGERED6 field. */ +#define EGU_INTENSET_TRIGGERED6_Msk (0x1UL << EGU_INTENSET_TRIGGERED6_Pos) /*!< Bit mask of TRIGGERED6 field. */ +#define EGU_INTENSET_TRIGGERED6_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED6_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED6_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to Enable interrupt for TRIGGERED[5] event */ +#define EGU_INTENSET_TRIGGERED5_Pos (5UL) /*!< Position of TRIGGERED5 field. */ +#define EGU_INTENSET_TRIGGERED5_Msk (0x1UL << EGU_INTENSET_TRIGGERED5_Pos) /*!< Bit mask of TRIGGERED5 field. */ +#define EGU_INTENSET_TRIGGERED5_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED5_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED5_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to Enable interrupt for TRIGGERED[4] event */ +#define EGU_INTENSET_TRIGGERED4_Pos (4UL) /*!< Position of TRIGGERED4 field. */ +#define EGU_INTENSET_TRIGGERED4_Msk (0x1UL << EGU_INTENSET_TRIGGERED4_Pos) /*!< Bit mask of TRIGGERED4 field. */ +#define EGU_INTENSET_TRIGGERED4_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED4_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED4_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to Enable interrupt for TRIGGERED[3] event */ +#define EGU_INTENSET_TRIGGERED3_Pos (3UL) /*!< Position of TRIGGERED3 field. */ +#define EGU_INTENSET_TRIGGERED3_Msk (0x1UL << EGU_INTENSET_TRIGGERED3_Pos) /*!< Bit mask of TRIGGERED3 field. */ +#define EGU_INTENSET_TRIGGERED3_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED3_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED3_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable interrupt for TRIGGERED[2] event */ +#define EGU_INTENSET_TRIGGERED2_Pos (2UL) /*!< Position of TRIGGERED2 field. */ +#define EGU_INTENSET_TRIGGERED2_Msk (0x1UL << EGU_INTENSET_TRIGGERED2_Pos) /*!< Bit mask of TRIGGERED2 field. */ +#define EGU_INTENSET_TRIGGERED2_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED2_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED2_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for TRIGGERED[1] event */ +#define EGU_INTENSET_TRIGGERED1_Pos (1UL) /*!< Position of TRIGGERED1 field. */ +#define EGU_INTENSET_TRIGGERED1_Msk (0x1UL << EGU_INTENSET_TRIGGERED1_Pos) /*!< Bit mask of TRIGGERED1 field. */ +#define EGU_INTENSET_TRIGGERED1_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED1_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED1_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for TRIGGERED[0] event */ +#define EGU_INTENSET_TRIGGERED0_Pos (0UL) /*!< Position of TRIGGERED0 field. */ +#define EGU_INTENSET_TRIGGERED0_Msk (0x1UL << EGU_INTENSET_TRIGGERED0_Pos) /*!< Bit mask of TRIGGERED0 field. */ +#define EGU_INTENSET_TRIGGERED0_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENSET_TRIGGERED0_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENSET_TRIGGERED0_Set (1UL) /*!< Enable */ + +/* Register: EGU_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 15 : Write '1' to Disable interrupt for TRIGGERED[15] event */ +#define EGU_INTENCLR_TRIGGERED15_Pos (15UL) /*!< Position of TRIGGERED15 field. */ +#define EGU_INTENCLR_TRIGGERED15_Msk (0x1UL << EGU_INTENCLR_TRIGGERED15_Pos) /*!< Bit mask of TRIGGERED15 field. */ +#define EGU_INTENCLR_TRIGGERED15_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED15_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED15_Clear (1UL) /*!< Disable */ + +/* Bit 14 : Write '1' to Disable interrupt for TRIGGERED[14] event */ +#define EGU_INTENCLR_TRIGGERED14_Pos (14UL) /*!< Position of TRIGGERED14 field. */ +#define EGU_INTENCLR_TRIGGERED14_Msk (0x1UL << EGU_INTENCLR_TRIGGERED14_Pos) /*!< Bit mask of TRIGGERED14 field. */ +#define EGU_INTENCLR_TRIGGERED14_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED14_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED14_Clear (1UL) /*!< Disable */ + +/* Bit 13 : Write '1' to Disable interrupt for TRIGGERED[13] event */ +#define EGU_INTENCLR_TRIGGERED13_Pos (13UL) /*!< Position of TRIGGERED13 field. */ +#define EGU_INTENCLR_TRIGGERED13_Msk (0x1UL << EGU_INTENCLR_TRIGGERED13_Pos) /*!< Bit mask of TRIGGERED13 field. */ +#define EGU_INTENCLR_TRIGGERED13_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED13_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED13_Clear (1UL) /*!< Disable */ + +/* Bit 12 : Write '1' to Disable interrupt for TRIGGERED[12] event */ +#define EGU_INTENCLR_TRIGGERED12_Pos (12UL) /*!< Position of TRIGGERED12 field. */ +#define EGU_INTENCLR_TRIGGERED12_Msk (0x1UL << EGU_INTENCLR_TRIGGERED12_Pos) /*!< Bit mask of TRIGGERED12 field. */ +#define EGU_INTENCLR_TRIGGERED12_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED12_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED12_Clear (1UL) /*!< Disable */ + +/* Bit 11 : Write '1' to Disable interrupt for TRIGGERED[11] event */ +#define EGU_INTENCLR_TRIGGERED11_Pos (11UL) /*!< Position of TRIGGERED11 field. */ +#define EGU_INTENCLR_TRIGGERED11_Msk (0x1UL << EGU_INTENCLR_TRIGGERED11_Pos) /*!< Bit mask of TRIGGERED11 field. */ +#define EGU_INTENCLR_TRIGGERED11_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED11_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED11_Clear (1UL) /*!< Disable */ + +/* Bit 10 : Write '1' to Disable interrupt for TRIGGERED[10] event */ +#define EGU_INTENCLR_TRIGGERED10_Pos (10UL) /*!< Position of TRIGGERED10 field. */ +#define EGU_INTENCLR_TRIGGERED10_Msk (0x1UL << EGU_INTENCLR_TRIGGERED10_Pos) /*!< Bit mask of TRIGGERED10 field. */ +#define EGU_INTENCLR_TRIGGERED10_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED10_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED10_Clear (1UL) /*!< Disable */ + +/* Bit 9 : Write '1' to Disable interrupt for TRIGGERED[9] event */ +#define EGU_INTENCLR_TRIGGERED9_Pos (9UL) /*!< Position of TRIGGERED9 field. */ +#define EGU_INTENCLR_TRIGGERED9_Msk (0x1UL << EGU_INTENCLR_TRIGGERED9_Pos) /*!< Bit mask of TRIGGERED9 field. */ +#define EGU_INTENCLR_TRIGGERED9_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED9_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED9_Clear (1UL) /*!< Disable */ + +/* Bit 8 : Write '1' to Disable interrupt for TRIGGERED[8] event */ +#define EGU_INTENCLR_TRIGGERED8_Pos (8UL) /*!< Position of TRIGGERED8 field. */ +#define EGU_INTENCLR_TRIGGERED8_Msk (0x1UL << EGU_INTENCLR_TRIGGERED8_Pos) /*!< Bit mask of TRIGGERED8 field. */ +#define EGU_INTENCLR_TRIGGERED8_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED8_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED8_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to Disable interrupt for TRIGGERED[7] event */ +#define EGU_INTENCLR_TRIGGERED7_Pos (7UL) /*!< Position of TRIGGERED7 field. */ +#define EGU_INTENCLR_TRIGGERED7_Msk (0x1UL << EGU_INTENCLR_TRIGGERED7_Pos) /*!< Bit mask of TRIGGERED7 field. */ +#define EGU_INTENCLR_TRIGGERED7_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED7_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED7_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to Disable interrupt for TRIGGERED[6] event */ +#define EGU_INTENCLR_TRIGGERED6_Pos (6UL) /*!< Position of TRIGGERED6 field. */ +#define EGU_INTENCLR_TRIGGERED6_Msk (0x1UL << EGU_INTENCLR_TRIGGERED6_Pos) /*!< Bit mask of TRIGGERED6 field. */ +#define EGU_INTENCLR_TRIGGERED6_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED6_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED6_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to Disable interrupt for TRIGGERED[5] event */ +#define EGU_INTENCLR_TRIGGERED5_Pos (5UL) /*!< Position of TRIGGERED5 field. */ +#define EGU_INTENCLR_TRIGGERED5_Msk (0x1UL << EGU_INTENCLR_TRIGGERED5_Pos) /*!< Bit mask of TRIGGERED5 field. */ +#define EGU_INTENCLR_TRIGGERED5_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED5_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED5_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to Disable interrupt for TRIGGERED[4] event */ +#define EGU_INTENCLR_TRIGGERED4_Pos (4UL) /*!< Position of TRIGGERED4 field. */ +#define EGU_INTENCLR_TRIGGERED4_Msk (0x1UL << EGU_INTENCLR_TRIGGERED4_Pos) /*!< Bit mask of TRIGGERED4 field. */ +#define EGU_INTENCLR_TRIGGERED4_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED4_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED4_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to Disable interrupt for TRIGGERED[3] event */ +#define EGU_INTENCLR_TRIGGERED3_Pos (3UL) /*!< Position of TRIGGERED3 field. */ +#define EGU_INTENCLR_TRIGGERED3_Msk (0x1UL << EGU_INTENCLR_TRIGGERED3_Pos) /*!< Bit mask of TRIGGERED3 field. */ +#define EGU_INTENCLR_TRIGGERED3_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED3_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED3_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable interrupt for TRIGGERED[2] event */ +#define EGU_INTENCLR_TRIGGERED2_Pos (2UL) /*!< Position of TRIGGERED2 field. */ +#define EGU_INTENCLR_TRIGGERED2_Msk (0x1UL << EGU_INTENCLR_TRIGGERED2_Pos) /*!< Bit mask of TRIGGERED2 field. */ +#define EGU_INTENCLR_TRIGGERED2_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED2_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED2_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for TRIGGERED[1] event */ +#define EGU_INTENCLR_TRIGGERED1_Pos (1UL) /*!< Position of TRIGGERED1 field. */ +#define EGU_INTENCLR_TRIGGERED1_Msk (0x1UL << EGU_INTENCLR_TRIGGERED1_Pos) /*!< Bit mask of TRIGGERED1 field. */ +#define EGU_INTENCLR_TRIGGERED1_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED1_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED1_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for TRIGGERED[0] event */ +#define EGU_INTENCLR_TRIGGERED0_Pos (0UL) /*!< Position of TRIGGERED0 field. */ +#define EGU_INTENCLR_TRIGGERED0_Msk (0x1UL << EGU_INTENCLR_TRIGGERED0_Pos) /*!< Bit mask of TRIGGERED0 field. */ +#define EGU_INTENCLR_TRIGGERED0_Disabled (0UL) /*!< Read: Disabled */ +#define EGU_INTENCLR_TRIGGERED0_Enabled (1UL) /*!< Read: Enabled */ +#define EGU_INTENCLR_TRIGGERED0_Clear (1UL) /*!< Disable */ + + +/* Peripheral: FICR */ +/* Description: Factory Information Configuration Registers */ + +/* Register: FICR_CODEPAGESIZE */ +/* Description: Code memory page size */ + +/* Bits 31..0 : Code memory page size */ +#define FICR_CODEPAGESIZE_CODEPAGESIZE_Pos (0UL) /*!< Position of CODEPAGESIZE field. */ +#define FICR_CODEPAGESIZE_CODEPAGESIZE_Msk (0xFFFFFFFFUL << FICR_CODEPAGESIZE_CODEPAGESIZE_Pos) /*!< Bit mask of CODEPAGESIZE field. */ + +/* Register: FICR_CODESIZE */ +/* Description: Code memory size */ + +/* Bits 31..0 : Code memory size in number of pages */ +#define FICR_CODESIZE_CODESIZE_Pos (0UL) /*!< Position of CODESIZE field. */ +#define FICR_CODESIZE_CODESIZE_Msk (0xFFFFFFFFUL << FICR_CODESIZE_CODESIZE_Pos) /*!< Bit mask of CODESIZE field. */ + +/* Register: FICR_DEVICEID */ +/* Description: Description collection[0]: Device identifier */ + +/* Bits 31..0 : 64 bit unique device identifier */ +#define FICR_DEVICEID_DEVICEID_Pos (0UL) /*!< Position of DEVICEID field. */ +#define FICR_DEVICEID_DEVICEID_Msk (0xFFFFFFFFUL << FICR_DEVICEID_DEVICEID_Pos) /*!< Bit mask of DEVICEID field. */ + +/* Register: FICR_ER */ +/* Description: Description collection[0]: Encryption Root, word 0 */ + +/* Bits 31..0 : Encryption Root, word n */ +#define FICR_ER_ER_Pos (0UL) /*!< Position of ER field. */ +#define FICR_ER_ER_Msk (0xFFFFFFFFUL << FICR_ER_ER_Pos) /*!< Bit mask of ER field. */ + +/* Register: FICR_IR */ +/* Description: Description collection[0]: Identity Root, word 0 */ + +/* Bits 31..0 : Identity Root, word n */ +#define FICR_IR_IR_Pos (0UL) /*!< Position of IR field. */ +#define FICR_IR_IR_Msk (0xFFFFFFFFUL << FICR_IR_IR_Pos) /*!< Bit mask of IR field. */ + +/* Register: FICR_DEVICEADDRTYPE */ +/* Description: Device address type */ + +/* Bit 0 : Device address type */ +#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Pos (0UL) /*!< Position of DEVICEADDRTYPE field. */ +#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Msk (0x1UL << FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Pos) /*!< Bit mask of DEVICEADDRTYPE field. */ +#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Public (0UL) /*!< Public address */ +#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Random (1UL) /*!< Random address */ + +/* Register: FICR_DEVICEADDR */ +/* Description: Description collection[0]: Device address 0 */ + +/* Bits 31..0 : 48 bit device address */ +#define FICR_DEVICEADDR_DEVICEADDR_Pos (0UL) /*!< Position of DEVICEADDR field. */ +#define FICR_DEVICEADDR_DEVICEADDR_Msk (0xFFFFFFFFUL << FICR_DEVICEADDR_DEVICEADDR_Pos) /*!< Bit mask of DEVICEADDR field. */ + +/* Register: FICR_INFO_PART */ +/* Description: Part code */ + +/* Bits 31..0 : Part code */ +#define FICR_INFO_PART_PART_Pos (0UL) /*!< Position of PART field. */ +#define FICR_INFO_PART_PART_Msk (0xFFFFFFFFUL << FICR_INFO_PART_PART_Pos) /*!< Bit mask of PART field. */ +#define FICR_INFO_PART_PART_N52832 (0x52832UL) /*!< nRF52832 */ +#define FICR_INFO_PART_PART_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ + +/* Register: FICR_INFO_VARIANT */ +/* Description: Part Variant, Hardware version and Production configuration */ + +/* Bits 31..0 : Part Variant, Hardware version and Production configuration, encoded as ASCII */ +#define FICR_INFO_VARIANT_VARIANT_Pos (0UL) /*!< Position of VARIANT field. */ +#define FICR_INFO_VARIANT_VARIANT_Msk (0xFFFFFFFFUL << FICR_INFO_VARIANT_VARIANT_Pos) /*!< Bit mask of VARIANT field. */ +#define FICR_INFO_VARIANT_VARIANT_AAAA (0x41414141UL) /*!< AAAA */ +#define FICR_INFO_VARIANT_VARIANT_AAAB (0x41414142UL) /*!< AAAB */ +#define FICR_INFO_VARIANT_VARIANT_AAB0 (0x41414230UL) /*!< AAB0 */ +#define FICR_INFO_VARIANT_VARIANT_AABA (0x41414241UL) /*!< AABA */ +#define FICR_INFO_VARIANT_VARIANT_AABB (0x41414242UL) /*!< AABB */ +#define FICR_INFO_VARIANT_VARIANT_AAE0 (0x41414530UL) /*!< AAE0 */ +#define FICR_INFO_VARIANT_VARIANT_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ + +/* Register: FICR_INFO_PACKAGE */ +/* Description: Package option */ + +/* Bits 31..0 : Package option */ +#define FICR_INFO_PACKAGE_PACKAGE_Pos (0UL) /*!< Position of PACKAGE field. */ +#define FICR_INFO_PACKAGE_PACKAGE_Msk (0xFFFFFFFFUL << FICR_INFO_PACKAGE_PACKAGE_Pos) /*!< Bit mask of PACKAGE field. */ +#define FICR_INFO_PACKAGE_PACKAGE_QF (0x2000UL) /*!< QFxx - 48-pin QFN */ +#define FICR_INFO_PACKAGE_PACKAGE_CH (0x2001UL) /*!< CHxx - 7x8 WLCSP 56 balls */ +#define FICR_INFO_PACKAGE_PACKAGE_CI (0x2002UL) /*!< CIxx - 7x8 WLCSP 56 balls */ +#define FICR_INFO_PACKAGE_PACKAGE_CK (0x2005UL) /*!< CKxx - 7x8 WLCSP 56 balls with backside coating for light protection */ +#define FICR_INFO_PACKAGE_PACKAGE_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ + +/* Register: FICR_INFO_RAM */ +/* Description: RAM variant */ + +/* Bits 31..0 : RAM variant */ +#define FICR_INFO_RAM_RAM_Pos (0UL) /*!< Position of RAM field. */ +#define FICR_INFO_RAM_RAM_Msk (0xFFFFFFFFUL << FICR_INFO_RAM_RAM_Pos) /*!< Bit mask of RAM field. */ +#define FICR_INFO_RAM_RAM_K16 (0x10UL) /*!< 16 kByte RAM */ +#define FICR_INFO_RAM_RAM_K32 (0x20UL) /*!< 32 kByte RAM */ +#define FICR_INFO_RAM_RAM_K64 (0x40UL) /*!< 64 kByte RAM */ +#define FICR_INFO_RAM_RAM_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ + +/* Register: FICR_INFO_FLASH */ +/* Description: Flash variant */ + +/* Bits 31..0 : Flash variant */ +#define FICR_INFO_FLASH_FLASH_Pos (0UL) /*!< Position of FLASH field. */ +#define FICR_INFO_FLASH_FLASH_Msk (0xFFFFFFFFUL << FICR_INFO_FLASH_FLASH_Pos) /*!< Bit mask of FLASH field. */ +#define FICR_INFO_FLASH_FLASH_K128 (0x80UL) /*!< 128 kByte FLASH */ +#define FICR_INFO_FLASH_FLASH_K256 (0x100UL) /*!< 256 kByte FLASH */ +#define FICR_INFO_FLASH_FLASH_K512 (0x200UL) /*!< 512 kByte FLASH */ +#define FICR_INFO_FLASH_FLASH_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */ + +/* Register: FICR_TEMP_A0 */ +/* Description: Slope definition A0. */ + +/* Bits 11..0 : A (slope definition) register. */ +#define FICR_TEMP_A0_A_Pos (0UL) /*!< Position of A field. */ +#define FICR_TEMP_A0_A_Msk (0xFFFUL << FICR_TEMP_A0_A_Pos) /*!< Bit mask of A field. */ + +/* Register: FICR_TEMP_A1 */ +/* Description: Slope definition A1. */ + +/* Bits 11..0 : A (slope definition) register. */ +#define FICR_TEMP_A1_A_Pos (0UL) /*!< Position of A field. */ +#define FICR_TEMP_A1_A_Msk (0xFFFUL << FICR_TEMP_A1_A_Pos) /*!< Bit mask of A field. */ + +/* Register: FICR_TEMP_A2 */ +/* Description: Slope definition A2. */ + +/* Bits 11..0 : A (slope definition) register. */ +#define FICR_TEMP_A2_A_Pos (0UL) /*!< Position of A field. */ +#define FICR_TEMP_A2_A_Msk (0xFFFUL << FICR_TEMP_A2_A_Pos) /*!< Bit mask of A field. */ + +/* Register: FICR_TEMP_A3 */ +/* Description: Slope definition A3. */ + +/* Bits 11..0 : A (slope definition) register. */ +#define FICR_TEMP_A3_A_Pos (0UL) /*!< Position of A field. */ +#define FICR_TEMP_A3_A_Msk (0xFFFUL << FICR_TEMP_A3_A_Pos) /*!< Bit mask of A field. */ + +/* Register: FICR_TEMP_A4 */ +/* Description: Slope definition A4. */ + +/* Bits 11..0 : A (slope definition) register. */ +#define FICR_TEMP_A4_A_Pos (0UL) /*!< Position of A field. */ +#define FICR_TEMP_A4_A_Msk (0xFFFUL << FICR_TEMP_A4_A_Pos) /*!< Bit mask of A field. */ + +/* Register: FICR_TEMP_A5 */ +/* Description: Slope definition A5. */ + +/* Bits 11..0 : A (slope definition) register. */ +#define FICR_TEMP_A5_A_Pos (0UL) /*!< Position of A field. */ +#define FICR_TEMP_A5_A_Msk (0xFFFUL << FICR_TEMP_A5_A_Pos) /*!< Bit mask of A field. */ + +/* Register: FICR_TEMP_B0 */ +/* Description: y-intercept B0. */ + +/* Bits 13..0 : B (y-intercept) */ +#define FICR_TEMP_B0_B_Pos (0UL) /*!< Position of B field. */ +#define FICR_TEMP_B0_B_Msk (0x3FFFUL << FICR_TEMP_B0_B_Pos) /*!< Bit mask of B field. */ + +/* Register: FICR_TEMP_B1 */ +/* Description: y-intercept B1. */ + +/* Bits 13..0 : B (y-intercept) */ +#define FICR_TEMP_B1_B_Pos (0UL) /*!< Position of B field. */ +#define FICR_TEMP_B1_B_Msk (0x3FFFUL << FICR_TEMP_B1_B_Pos) /*!< Bit mask of B field. */ + +/* Register: FICR_TEMP_B2 */ +/* Description: y-intercept B2. */ + +/* Bits 13..0 : B (y-intercept) */ +#define FICR_TEMP_B2_B_Pos (0UL) /*!< Position of B field. */ +#define FICR_TEMP_B2_B_Msk (0x3FFFUL << FICR_TEMP_B2_B_Pos) /*!< Bit mask of B field. */ + +/* Register: FICR_TEMP_B3 */ +/* Description: y-intercept B3. */ + +/* Bits 13..0 : B (y-intercept) */ +#define FICR_TEMP_B3_B_Pos (0UL) /*!< Position of B field. */ +#define FICR_TEMP_B3_B_Msk (0x3FFFUL << FICR_TEMP_B3_B_Pos) /*!< Bit mask of B field. */ + +/* Register: FICR_TEMP_B4 */ +/* Description: y-intercept B4. */ + +/* Bits 13..0 : B (y-intercept) */ +#define FICR_TEMP_B4_B_Pos (0UL) /*!< Position of B field. */ +#define FICR_TEMP_B4_B_Msk (0x3FFFUL << FICR_TEMP_B4_B_Pos) /*!< Bit mask of B field. */ + +/* Register: FICR_TEMP_B5 */ +/* Description: y-intercept B5. */ + +/* Bits 13..0 : B (y-intercept) */ +#define FICR_TEMP_B5_B_Pos (0UL) /*!< Position of B field. */ +#define FICR_TEMP_B5_B_Msk (0x3FFFUL << FICR_TEMP_B5_B_Pos) /*!< Bit mask of B field. */ + +/* Register: FICR_TEMP_T0 */ +/* Description: Segment end T0. */ + +/* Bits 7..0 : T (segment end)register. */ +#define FICR_TEMP_T0_T_Pos (0UL) /*!< Position of T field. */ +#define FICR_TEMP_T0_T_Msk (0xFFUL << FICR_TEMP_T0_T_Pos) /*!< Bit mask of T field. */ + +/* Register: FICR_TEMP_T1 */ +/* Description: Segment end T1. */ + +/* Bits 7..0 : T (segment end)register. */ +#define FICR_TEMP_T1_T_Pos (0UL) /*!< Position of T field. */ +#define FICR_TEMP_T1_T_Msk (0xFFUL << FICR_TEMP_T1_T_Pos) /*!< Bit mask of T field. */ + +/* Register: FICR_TEMP_T2 */ +/* Description: Segment end T2. */ + +/* Bits 7..0 : T (segment end)register. */ +#define FICR_TEMP_T2_T_Pos (0UL) /*!< Position of T field. */ +#define FICR_TEMP_T2_T_Msk (0xFFUL << FICR_TEMP_T2_T_Pos) /*!< Bit mask of T field. */ + +/* Register: FICR_TEMP_T3 */ +/* Description: Segment end T3. */ + +/* Bits 7..0 : T (segment end)register. */ +#define FICR_TEMP_T3_T_Pos (0UL) /*!< Position of T field. */ +#define FICR_TEMP_T3_T_Msk (0xFFUL << FICR_TEMP_T3_T_Pos) /*!< Bit mask of T field. */ + +/* Register: FICR_TEMP_T4 */ +/* Description: Segment end T4. */ + +/* Bits 7..0 : T (segment end)register. */ +#define FICR_TEMP_T4_T_Pos (0UL) /*!< Position of T field. */ +#define FICR_TEMP_T4_T_Msk (0xFFUL << FICR_TEMP_T4_T_Pos) /*!< Bit mask of T field. */ + +/* Register: FICR_NFC_TAGHEADER0 */ +/* Description: Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ + +/* Bits 31..24 : Unique identifier byte 3 */ +#define FICR_NFC_TAGHEADER0_UD3_Pos (24UL) /*!< Position of UD3 field. */ +#define FICR_NFC_TAGHEADER0_UD3_Msk (0xFFUL << FICR_NFC_TAGHEADER0_UD3_Pos) /*!< Bit mask of UD3 field. */ + +/* Bits 23..16 : Unique identifier byte 2 */ +#define FICR_NFC_TAGHEADER0_UD2_Pos (16UL) /*!< Position of UD2 field. */ +#define FICR_NFC_TAGHEADER0_UD2_Msk (0xFFUL << FICR_NFC_TAGHEADER0_UD2_Pos) /*!< Bit mask of UD2 field. */ + +/* Bits 15..8 : Unique identifier byte 1 */ +#define FICR_NFC_TAGHEADER0_UD1_Pos (8UL) /*!< Position of UD1 field. */ +#define FICR_NFC_TAGHEADER0_UD1_Msk (0xFFUL << FICR_NFC_TAGHEADER0_UD1_Pos) /*!< Bit mask of UD1 field. */ + +/* Bits 7..0 : Default Manufacturer ID: Nordic Semiconductor ASA has ICM 0x5F */ +#define FICR_NFC_TAGHEADER0_MFGID_Pos (0UL) /*!< Position of MFGID field. */ +#define FICR_NFC_TAGHEADER0_MFGID_Msk (0xFFUL << FICR_NFC_TAGHEADER0_MFGID_Pos) /*!< Bit mask of MFGID field. */ + +/* Register: FICR_NFC_TAGHEADER1 */ +/* Description: Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ + +/* Bits 31..24 : Unique identifier byte 7 */ +#define FICR_NFC_TAGHEADER1_UD7_Pos (24UL) /*!< Position of UD7 field. */ +#define FICR_NFC_TAGHEADER1_UD7_Msk (0xFFUL << FICR_NFC_TAGHEADER1_UD7_Pos) /*!< Bit mask of UD7 field. */ + +/* Bits 23..16 : Unique identifier byte 6 */ +#define FICR_NFC_TAGHEADER1_UD6_Pos (16UL) /*!< Position of UD6 field. */ +#define FICR_NFC_TAGHEADER1_UD6_Msk (0xFFUL << FICR_NFC_TAGHEADER1_UD6_Pos) /*!< Bit mask of UD6 field. */ + +/* Bits 15..8 : Unique identifier byte 5 */ +#define FICR_NFC_TAGHEADER1_UD5_Pos (8UL) /*!< Position of UD5 field. */ +#define FICR_NFC_TAGHEADER1_UD5_Msk (0xFFUL << FICR_NFC_TAGHEADER1_UD5_Pos) /*!< Bit mask of UD5 field. */ + +/* Bits 7..0 : Unique identifier byte 4 */ +#define FICR_NFC_TAGHEADER1_UD4_Pos (0UL) /*!< Position of UD4 field. */ +#define FICR_NFC_TAGHEADER1_UD4_Msk (0xFFUL << FICR_NFC_TAGHEADER1_UD4_Pos) /*!< Bit mask of UD4 field. */ + +/* Register: FICR_NFC_TAGHEADER2 */ +/* Description: Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ + +/* Bits 31..24 : Unique identifier byte 11 */ +#define FICR_NFC_TAGHEADER2_UD11_Pos (24UL) /*!< Position of UD11 field. */ +#define FICR_NFC_TAGHEADER2_UD11_Msk (0xFFUL << FICR_NFC_TAGHEADER2_UD11_Pos) /*!< Bit mask of UD11 field. */ + +/* Bits 23..16 : Unique identifier byte 10 */ +#define FICR_NFC_TAGHEADER2_UD10_Pos (16UL) /*!< Position of UD10 field. */ +#define FICR_NFC_TAGHEADER2_UD10_Msk (0xFFUL << FICR_NFC_TAGHEADER2_UD10_Pos) /*!< Bit mask of UD10 field. */ + +/* Bits 15..8 : Unique identifier byte 9 */ +#define FICR_NFC_TAGHEADER2_UD9_Pos (8UL) /*!< Position of UD9 field. */ +#define FICR_NFC_TAGHEADER2_UD9_Msk (0xFFUL << FICR_NFC_TAGHEADER2_UD9_Pos) /*!< Bit mask of UD9 field. */ + +/* Bits 7..0 : Unique identifier byte 8 */ +#define FICR_NFC_TAGHEADER2_UD8_Pos (0UL) /*!< Position of UD8 field. */ +#define FICR_NFC_TAGHEADER2_UD8_Msk (0xFFUL << FICR_NFC_TAGHEADER2_UD8_Pos) /*!< Bit mask of UD8 field. */ + +/* Register: FICR_NFC_TAGHEADER3 */ +/* Description: Default header for NFC Tag. Software can read these values to populate NFCID1_3RD_LAST, NFCID1_2ND_LAST and NFCID1_LAST. */ + +/* Bits 31..24 : Unique identifier byte 15 */ +#define FICR_NFC_TAGHEADER3_UD15_Pos (24UL) /*!< Position of UD15 field. */ +#define FICR_NFC_TAGHEADER3_UD15_Msk (0xFFUL << FICR_NFC_TAGHEADER3_UD15_Pos) /*!< Bit mask of UD15 field. */ + +/* Bits 23..16 : Unique identifier byte 14 */ +#define FICR_NFC_TAGHEADER3_UD14_Pos (16UL) /*!< Position of UD14 field. */ +#define FICR_NFC_TAGHEADER3_UD14_Msk (0xFFUL << FICR_NFC_TAGHEADER3_UD14_Pos) /*!< Bit mask of UD14 field. */ + +/* Bits 15..8 : Unique identifier byte 13 */ +#define FICR_NFC_TAGHEADER3_UD13_Pos (8UL) /*!< Position of UD13 field. */ +#define FICR_NFC_TAGHEADER3_UD13_Msk (0xFFUL << FICR_NFC_TAGHEADER3_UD13_Pos) /*!< Bit mask of UD13 field. */ + +/* Bits 7..0 : Unique identifier byte 12 */ +#define FICR_NFC_TAGHEADER3_UD12_Pos (0UL) /*!< Position of UD12 field. */ +#define FICR_NFC_TAGHEADER3_UD12_Msk (0xFFUL << FICR_NFC_TAGHEADER3_UD12_Pos) /*!< Bit mask of UD12 field. */ + + +/* Peripheral: GPIOTE */ +/* Description: GPIO Tasks and Events */ + +/* Register: GPIOTE_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 31 : Write '1' to Enable interrupt for PORT event */ +#define GPIOTE_INTENSET_PORT_Pos (31UL) /*!< Position of PORT field. */ +#define GPIOTE_INTENSET_PORT_Msk (0x1UL << GPIOTE_INTENSET_PORT_Pos) /*!< Bit mask of PORT field. */ +#define GPIOTE_INTENSET_PORT_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_PORT_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_PORT_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to Enable interrupt for IN[7] event */ +#define GPIOTE_INTENSET_IN7_Pos (7UL) /*!< Position of IN7 field. */ +#define GPIOTE_INTENSET_IN7_Msk (0x1UL << GPIOTE_INTENSET_IN7_Pos) /*!< Bit mask of IN7 field. */ +#define GPIOTE_INTENSET_IN7_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_IN7_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_IN7_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to Enable interrupt for IN[6] event */ +#define GPIOTE_INTENSET_IN6_Pos (6UL) /*!< Position of IN6 field. */ +#define GPIOTE_INTENSET_IN6_Msk (0x1UL << GPIOTE_INTENSET_IN6_Pos) /*!< Bit mask of IN6 field. */ +#define GPIOTE_INTENSET_IN6_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_IN6_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_IN6_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to Enable interrupt for IN[5] event */ +#define GPIOTE_INTENSET_IN5_Pos (5UL) /*!< Position of IN5 field. */ +#define GPIOTE_INTENSET_IN5_Msk (0x1UL << GPIOTE_INTENSET_IN5_Pos) /*!< Bit mask of IN5 field. */ +#define GPIOTE_INTENSET_IN5_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_IN5_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_IN5_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to Enable interrupt for IN[4] event */ +#define GPIOTE_INTENSET_IN4_Pos (4UL) /*!< Position of IN4 field. */ +#define GPIOTE_INTENSET_IN4_Msk (0x1UL << GPIOTE_INTENSET_IN4_Pos) /*!< Bit mask of IN4 field. */ +#define GPIOTE_INTENSET_IN4_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_IN4_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_IN4_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to Enable interrupt for IN[3] event */ +#define GPIOTE_INTENSET_IN3_Pos (3UL) /*!< Position of IN3 field. */ +#define GPIOTE_INTENSET_IN3_Msk (0x1UL << GPIOTE_INTENSET_IN3_Pos) /*!< Bit mask of IN3 field. */ +#define GPIOTE_INTENSET_IN3_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_IN3_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_IN3_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable interrupt for IN[2] event */ +#define GPIOTE_INTENSET_IN2_Pos (2UL) /*!< Position of IN2 field. */ +#define GPIOTE_INTENSET_IN2_Msk (0x1UL << GPIOTE_INTENSET_IN2_Pos) /*!< Bit mask of IN2 field. */ +#define GPIOTE_INTENSET_IN2_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_IN2_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_IN2_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for IN[1] event */ +#define GPIOTE_INTENSET_IN1_Pos (1UL) /*!< Position of IN1 field. */ +#define GPIOTE_INTENSET_IN1_Msk (0x1UL << GPIOTE_INTENSET_IN1_Pos) /*!< Bit mask of IN1 field. */ +#define GPIOTE_INTENSET_IN1_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_IN1_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_IN1_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for IN[0] event */ +#define GPIOTE_INTENSET_IN0_Pos (0UL) /*!< Position of IN0 field. */ +#define GPIOTE_INTENSET_IN0_Msk (0x1UL << GPIOTE_INTENSET_IN0_Pos) /*!< Bit mask of IN0 field. */ +#define GPIOTE_INTENSET_IN0_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENSET_IN0_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENSET_IN0_Set (1UL) /*!< Enable */ + +/* Register: GPIOTE_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 31 : Write '1' to Disable interrupt for PORT event */ +#define GPIOTE_INTENCLR_PORT_Pos (31UL) /*!< Position of PORT field. */ +#define GPIOTE_INTENCLR_PORT_Msk (0x1UL << GPIOTE_INTENCLR_PORT_Pos) /*!< Bit mask of PORT field. */ +#define GPIOTE_INTENCLR_PORT_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_PORT_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_PORT_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to Disable interrupt for IN[7] event */ +#define GPIOTE_INTENCLR_IN7_Pos (7UL) /*!< Position of IN7 field. */ +#define GPIOTE_INTENCLR_IN7_Msk (0x1UL << GPIOTE_INTENCLR_IN7_Pos) /*!< Bit mask of IN7 field. */ +#define GPIOTE_INTENCLR_IN7_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_IN7_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_IN7_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to Disable interrupt for IN[6] event */ +#define GPIOTE_INTENCLR_IN6_Pos (6UL) /*!< Position of IN6 field. */ +#define GPIOTE_INTENCLR_IN6_Msk (0x1UL << GPIOTE_INTENCLR_IN6_Pos) /*!< Bit mask of IN6 field. */ +#define GPIOTE_INTENCLR_IN6_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_IN6_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_IN6_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to Disable interrupt for IN[5] event */ +#define GPIOTE_INTENCLR_IN5_Pos (5UL) /*!< Position of IN5 field. */ +#define GPIOTE_INTENCLR_IN5_Msk (0x1UL << GPIOTE_INTENCLR_IN5_Pos) /*!< Bit mask of IN5 field. */ +#define GPIOTE_INTENCLR_IN5_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_IN5_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_IN5_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to Disable interrupt for IN[4] event */ +#define GPIOTE_INTENCLR_IN4_Pos (4UL) /*!< Position of IN4 field. */ +#define GPIOTE_INTENCLR_IN4_Msk (0x1UL << GPIOTE_INTENCLR_IN4_Pos) /*!< Bit mask of IN4 field. */ +#define GPIOTE_INTENCLR_IN4_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_IN4_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_IN4_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to Disable interrupt for IN[3] event */ +#define GPIOTE_INTENCLR_IN3_Pos (3UL) /*!< Position of IN3 field. */ +#define GPIOTE_INTENCLR_IN3_Msk (0x1UL << GPIOTE_INTENCLR_IN3_Pos) /*!< Bit mask of IN3 field. */ +#define GPIOTE_INTENCLR_IN3_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_IN3_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_IN3_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable interrupt for IN[2] event */ +#define GPIOTE_INTENCLR_IN2_Pos (2UL) /*!< Position of IN2 field. */ +#define GPIOTE_INTENCLR_IN2_Msk (0x1UL << GPIOTE_INTENCLR_IN2_Pos) /*!< Bit mask of IN2 field. */ +#define GPIOTE_INTENCLR_IN2_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_IN2_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_IN2_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for IN[1] event */ +#define GPIOTE_INTENCLR_IN1_Pos (1UL) /*!< Position of IN1 field. */ +#define GPIOTE_INTENCLR_IN1_Msk (0x1UL << GPIOTE_INTENCLR_IN1_Pos) /*!< Bit mask of IN1 field. */ +#define GPIOTE_INTENCLR_IN1_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_IN1_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_IN1_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for IN[0] event */ +#define GPIOTE_INTENCLR_IN0_Pos (0UL) /*!< Position of IN0 field. */ +#define GPIOTE_INTENCLR_IN0_Msk (0x1UL << GPIOTE_INTENCLR_IN0_Pos) /*!< Bit mask of IN0 field. */ +#define GPIOTE_INTENCLR_IN0_Disabled (0UL) /*!< Read: Disabled */ +#define GPIOTE_INTENCLR_IN0_Enabled (1UL) /*!< Read: Enabled */ +#define GPIOTE_INTENCLR_IN0_Clear (1UL) /*!< Disable */ + +/* Register: GPIOTE_CONFIG */ +/* Description: Description collection[0]: Configuration for OUT[n], SET[n] and CLR[n] tasks and IN[n] event */ + +/* Bit 20 : When in task mode: Initial value of the output when the GPIOTE channel is configured. When in event mode: No effect. */ +#define GPIOTE_CONFIG_OUTINIT_Pos (20UL) /*!< Position of OUTINIT field. */ +#define GPIOTE_CONFIG_OUTINIT_Msk (0x1UL << GPIOTE_CONFIG_OUTINIT_Pos) /*!< Bit mask of OUTINIT field. */ +#define GPIOTE_CONFIG_OUTINIT_Low (0UL) /*!< Task mode: Initial value of pin before task triggering is low */ +#define GPIOTE_CONFIG_OUTINIT_High (1UL) /*!< Task mode: Initial value of pin before task triggering is high */ + +/* Bits 17..16 : When In task mode: Operation to be performed on output when OUT[n] task is triggered. When In event mode: Operation on input that shall trigger IN[n] event. */ +#define GPIOTE_CONFIG_POLARITY_Pos (16UL) /*!< Position of POLARITY field. */ +#define GPIOTE_CONFIG_POLARITY_Msk (0x3UL << GPIOTE_CONFIG_POLARITY_Pos) /*!< Bit mask of POLARITY field. */ +#define GPIOTE_CONFIG_POLARITY_None (0UL) /*!< Task mode: No effect on pin from OUT[n] task. Event mode: no IN[n] event generated on pin activity. */ +#define GPIOTE_CONFIG_POLARITY_LoToHi (1UL) /*!< Task mode: Set pin from OUT[n] task. Event mode: Generate IN[n] event when rising edge on pin. */ +#define GPIOTE_CONFIG_POLARITY_HiToLo (2UL) /*!< Task mode: Clear pin from OUT[n] task. Event mode: Generate IN[n] event when falling edge on pin. */ +#define GPIOTE_CONFIG_POLARITY_Toggle (3UL) /*!< Task mode: Toggle pin from OUT[n]. Event mode: Generate IN[n] when any change on pin. */ + +/* Bits 12..8 : GPIO number associated with SET[n], CLR[n] and OUT[n] tasks and IN[n] event */ +#define GPIOTE_CONFIG_PSEL_Pos (8UL) /*!< Position of PSEL field. */ +#define GPIOTE_CONFIG_PSEL_Msk (0x1FUL << GPIOTE_CONFIG_PSEL_Pos) /*!< Bit mask of PSEL field. */ + +/* Bits 1..0 : Mode */ +#define GPIOTE_CONFIG_MODE_Pos (0UL) /*!< Position of MODE field. */ +#define GPIOTE_CONFIG_MODE_Msk (0x3UL << GPIOTE_CONFIG_MODE_Pos) /*!< Bit mask of MODE field. */ +#define GPIOTE_CONFIG_MODE_Disabled (0UL) /*!< Disabled. Pin specified by PSEL will not be acquired by the GPIOTE module. */ +#define GPIOTE_CONFIG_MODE_Event (1UL) /*!< Event mode */ +#define GPIOTE_CONFIG_MODE_Task (3UL) /*!< Task mode */ + + +/* Peripheral: I2S */ +/* Description: Inter-IC Sound */ + +/* Register: I2S_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 5 : Enable or disable interrupt for TXPTRUPD event */ +#define I2S_INTEN_TXPTRUPD_Pos (5UL) /*!< Position of TXPTRUPD field. */ +#define I2S_INTEN_TXPTRUPD_Msk (0x1UL << I2S_INTEN_TXPTRUPD_Pos) /*!< Bit mask of TXPTRUPD field. */ +#define I2S_INTEN_TXPTRUPD_Disabled (0UL) /*!< Disable */ +#define I2S_INTEN_TXPTRUPD_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable interrupt for STOPPED event */ +#define I2S_INTEN_STOPPED_Pos (2UL) /*!< Position of STOPPED field. */ +#define I2S_INTEN_STOPPED_Msk (0x1UL << I2S_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define I2S_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ +#define I2S_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for RXPTRUPD event */ +#define I2S_INTEN_RXPTRUPD_Pos (1UL) /*!< Position of RXPTRUPD field. */ +#define I2S_INTEN_RXPTRUPD_Msk (0x1UL << I2S_INTEN_RXPTRUPD_Pos) /*!< Bit mask of RXPTRUPD field. */ +#define I2S_INTEN_RXPTRUPD_Disabled (0UL) /*!< Disable */ +#define I2S_INTEN_RXPTRUPD_Enabled (1UL) /*!< Enable */ + +/* Register: I2S_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 5 : Write '1' to Enable interrupt for TXPTRUPD event */ +#define I2S_INTENSET_TXPTRUPD_Pos (5UL) /*!< Position of TXPTRUPD field. */ +#define I2S_INTENSET_TXPTRUPD_Msk (0x1UL << I2S_INTENSET_TXPTRUPD_Pos) /*!< Bit mask of TXPTRUPD field. */ +#define I2S_INTENSET_TXPTRUPD_Disabled (0UL) /*!< Read: Disabled */ +#define I2S_INTENSET_TXPTRUPD_Enabled (1UL) /*!< Read: Enabled */ +#define I2S_INTENSET_TXPTRUPD_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable interrupt for STOPPED event */ +#define I2S_INTENSET_STOPPED_Pos (2UL) /*!< Position of STOPPED field. */ +#define I2S_INTENSET_STOPPED_Msk (0x1UL << I2S_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define I2S_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define I2S_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define I2S_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for RXPTRUPD event */ +#define I2S_INTENSET_RXPTRUPD_Pos (1UL) /*!< Position of RXPTRUPD field. */ +#define I2S_INTENSET_RXPTRUPD_Msk (0x1UL << I2S_INTENSET_RXPTRUPD_Pos) /*!< Bit mask of RXPTRUPD field. */ +#define I2S_INTENSET_RXPTRUPD_Disabled (0UL) /*!< Read: Disabled */ +#define I2S_INTENSET_RXPTRUPD_Enabled (1UL) /*!< Read: Enabled */ +#define I2S_INTENSET_RXPTRUPD_Set (1UL) /*!< Enable */ + +/* Register: I2S_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 5 : Write '1' to Disable interrupt for TXPTRUPD event */ +#define I2S_INTENCLR_TXPTRUPD_Pos (5UL) /*!< Position of TXPTRUPD field. */ +#define I2S_INTENCLR_TXPTRUPD_Msk (0x1UL << I2S_INTENCLR_TXPTRUPD_Pos) /*!< Bit mask of TXPTRUPD field. */ +#define I2S_INTENCLR_TXPTRUPD_Disabled (0UL) /*!< Read: Disabled */ +#define I2S_INTENCLR_TXPTRUPD_Enabled (1UL) /*!< Read: Enabled */ +#define I2S_INTENCLR_TXPTRUPD_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable interrupt for STOPPED event */ +#define I2S_INTENCLR_STOPPED_Pos (2UL) /*!< Position of STOPPED field. */ +#define I2S_INTENCLR_STOPPED_Msk (0x1UL << I2S_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define I2S_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define I2S_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define I2S_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for RXPTRUPD event */ +#define I2S_INTENCLR_RXPTRUPD_Pos (1UL) /*!< Position of RXPTRUPD field. */ +#define I2S_INTENCLR_RXPTRUPD_Msk (0x1UL << I2S_INTENCLR_RXPTRUPD_Pos) /*!< Bit mask of RXPTRUPD field. */ +#define I2S_INTENCLR_RXPTRUPD_Disabled (0UL) /*!< Read: Disabled */ +#define I2S_INTENCLR_RXPTRUPD_Enabled (1UL) /*!< Read: Enabled */ +#define I2S_INTENCLR_RXPTRUPD_Clear (1UL) /*!< Disable */ + +/* Register: I2S_ENABLE */ +/* Description: Enable I2S module. */ + +/* Bit 0 : Enable I2S module. */ +#define I2S_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define I2S_ENABLE_ENABLE_Msk (0x1UL << I2S_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define I2S_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ +#define I2S_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */ + +/* Register: I2S_CONFIG_MODE */ +/* Description: I2S mode. */ + +/* Bit 0 : I2S mode. */ +#define I2S_CONFIG_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ +#define I2S_CONFIG_MODE_MODE_Msk (0x1UL << I2S_CONFIG_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ +#define I2S_CONFIG_MODE_MODE_Master (0UL) /*!< Master mode. SCK and LRCK generated from internal master clcok (MCK) and output on pins defined by PSEL.xxx. */ +#define I2S_CONFIG_MODE_MODE_Slave (1UL) /*!< Slave mode. SCK and LRCK generated by external master and received on pins defined by PSEL.xxx */ + +/* Register: I2S_CONFIG_RXEN */ +/* Description: Reception (RX) enable. */ + +/* Bit 0 : Reception (RX) enable. */ +#define I2S_CONFIG_RXEN_RXEN_Pos (0UL) /*!< Position of RXEN field. */ +#define I2S_CONFIG_RXEN_RXEN_Msk (0x1UL << I2S_CONFIG_RXEN_RXEN_Pos) /*!< Bit mask of RXEN field. */ +#define I2S_CONFIG_RXEN_RXEN_Disabled (0UL) /*!< Reception disabled and now data will be written to the RXD.PTR address. */ +#define I2S_CONFIG_RXEN_RXEN_Enabled (1UL) /*!< Reception enabled. */ + +/* Register: I2S_CONFIG_TXEN */ +/* Description: Transmission (TX) enable. */ + +/* Bit 0 : Transmission (TX) enable. */ +#define I2S_CONFIG_TXEN_TXEN_Pos (0UL) /*!< Position of TXEN field. */ +#define I2S_CONFIG_TXEN_TXEN_Msk (0x1UL << I2S_CONFIG_TXEN_TXEN_Pos) /*!< Bit mask of TXEN field. */ +#define I2S_CONFIG_TXEN_TXEN_Disabled (0UL) /*!< Transmission disabled and now data will be read from the RXD.TXD address. */ +#define I2S_CONFIG_TXEN_TXEN_Enabled (1UL) /*!< Transmission enabled. */ + +/* Register: I2S_CONFIG_MCKEN */ +/* Description: Master clock generator enable. */ + +/* Bit 0 : Master clock generator enable. */ +#define I2S_CONFIG_MCKEN_MCKEN_Pos (0UL) /*!< Position of MCKEN field. */ +#define I2S_CONFIG_MCKEN_MCKEN_Msk (0x1UL << I2S_CONFIG_MCKEN_MCKEN_Pos) /*!< Bit mask of MCKEN field. */ +#define I2S_CONFIG_MCKEN_MCKEN_Disabled (0UL) /*!< Master clock generator disabled and PSEL.MCK not connected(available as GPIO). */ +#define I2S_CONFIG_MCKEN_MCKEN_Enabled (1UL) /*!< Master clock generator running and MCK output on PSEL.MCK. */ + +/* Register: I2S_CONFIG_MCKFREQ */ +/* Description: Master clock generator frequency. */ + +/* Bits 31..0 : Master clock generator frequency. */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_Pos (0UL) /*!< Position of MCKFREQ field. */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_Msk (0xFFFFFFFFUL << I2S_CONFIG_MCKFREQ_MCKFREQ_Pos) /*!< Bit mask of MCKFREQ field. */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV125 (0x020C0000UL) /*!< 32 MHz / 125 = 0.256 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV63 (0x04100000UL) /*!< 32 MHz / 63 = 0.5079365 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV42 (0x06000000UL) /*!< 32 MHz / 42 = 0.7619048 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV32 (0x08000000UL) /*!< 32 MHz / 32 = 1.0 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV31 (0x08400000UL) /*!< 32 MHz / 31 = 1.0322581 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV30 (0x08800000UL) /*!< 32 MHz / 30 = 1.0666667 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV23 (0x0B000000UL) /*!< 32 MHz / 23 = 1.3913043 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV21 (0x0C000000UL) /*!< 32 MHz / 21 = 1.5238095 */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV16 (0x10000000UL) /*!< 32 MHz / 16 = 2.0 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV15 (0x11000000UL) /*!< 32 MHz / 15 = 2.1333333 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV11 (0x16000000UL) /*!< 32 MHz / 11 = 2.9090909 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV10 (0x18000000UL) /*!< 32 MHz / 10 = 3.2 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV8 (0x20000000UL) /*!< 32 MHz / 8 = 4.0 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV6 (0x28000000UL) /*!< 32 MHz / 6 = 5.3333333 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV5 (0x30000000UL) /*!< 32 MHz / 5 = 6.4 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV4 (0x40000000UL) /*!< 32 MHz / 4 = 8.0 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV3 (0x50000000UL) /*!< 32 MHz / 3 = 10.6666667 MHz */ +#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV2 (0x80000000UL) /*!< 32 MHz / 2 = 16.0 MHz */ + +/* Register: I2S_CONFIG_RATIO */ +/* Description: MCK / LRCK ratio. */ + +/* Bits 3..0 : MCK / LRCK ratio. */ +#define I2S_CONFIG_RATIO_RATIO_Pos (0UL) /*!< Position of RATIO field. */ +#define I2S_CONFIG_RATIO_RATIO_Msk (0xFUL << I2S_CONFIG_RATIO_RATIO_Pos) /*!< Bit mask of RATIO field. */ +#define I2S_CONFIG_RATIO_RATIO_32X (0UL) /*!< LRCK = MCK / 32 */ +#define I2S_CONFIG_RATIO_RATIO_48X (1UL) /*!< LRCK = MCK / 48 */ +#define I2S_CONFIG_RATIO_RATIO_64X (2UL) /*!< LRCK = MCK / 64 */ +#define I2S_CONFIG_RATIO_RATIO_96X (3UL) /*!< LRCK = MCK / 96 */ +#define I2S_CONFIG_RATIO_RATIO_128X (4UL) /*!< LRCK = MCK / 128 */ +#define I2S_CONFIG_RATIO_RATIO_192X (5UL) /*!< LRCK = MCK / 192 */ +#define I2S_CONFIG_RATIO_RATIO_256X (6UL) /*!< LRCK = MCK / 256 */ +#define I2S_CONFIG_RATIO_RATIO_384X (7UL) /*!< LRCK = MCK / 384 */ +#define I2S_CONFIG_RATIO_RATIO_512X (8UL) /*!< LRCK = MCK / 512 */ + +/* Register: I2S_CONFIG_SWIDTH */ +/* Description: Sample width. */ + +/* Bits 1..0 : Sample width. */ +#define I2S_CONFIG_SWIDTH_SWIDTH_Pos (0UL) /*!< Position of SWIDTH field. */ +#define I2S_CONFIG_SWIDTH_SWIDTH_Msk (0x3UL << I2S_CONFIG_SWIDTH_SWIDTH_Pos) /*!< Bit mask of SWIDTH field. */ +#define I2S_CONFIG_SWIDTH_SWIDTH_8Bit (0UL) /*!< 8 bit. */ +#define I2S_CONFIG_SWIDTH_SWIDTH_16Bit (1UL) /*!< 16 bit. */ +#define I2S_CONFIG_SWIDTH_SWIDTH_24Bit (2UL) /*!< 24 bit. */ + +/* Register: I2S_CONFIG_ALIGN */ +/* Description: Alignment of sample within a frame. */ + +/* Bit 0 : Alignment of sample within a frame. */ +#define I2S_CONFIG_ALIGN_ALIGN_Pos (0UL) /*!< Position of ALIGN field. */ +#define I2S_CONFIG_ALIGN_ALIGN_Msk (0x1UL << I2S_CONFIG_ALIGN_ALIGN_Pos) /*!< Bit mask of ALIGN field. */ +#define I2S_CONFIG_ALIGN_ALIGN_Left (0UL) /*!< Left-aligned. */ +#define I2S_CONFIG_ALIGN_ALIGN_Right (1UL) /*!< Right-aligned. */ + +/* Register: I2S_CONFIG_FORMAT */ +/* Description: Frame format. */ + +/* Bit 0 : Frame format. */ +#define I2S_CONFIG_FORMAT_FORMAT_Pos (0UL) /*!< Position of FORMAT field. */ +#define I2S_CONFIG_FORMAT_FORMAT_Msk (0x1UL << I2S_CONFIG_FORMAT_FORMAT_Pos) /*!< Bit mask of FORMAT field. */ +#define I2S_CONFIG_FORMAT_FORMAT_I2S (0UL) /*!< Original I2S format. */ +#define I2S_CONFIG_FORMAT_FORMAT_Aligned (1UL) /*!< Alternate (left- or right-aligned) format. */ + +/* Register: I2S_CONFIG_CHANNELS */ +/* Description: Enable channels. */ + +/* Bits 1..0 : Enable channels. */ +#define I2S_CONFIG_CHANNELS_CHANNELS_Pos (0UL) /*!< Position of CHANNELS field. */ +#define I2S_CONFIG_CHANNELS_CHANNELS_Msk (0x3UL << I2S_CONFIG_CHANNELS_CHANNELS_Pos) /*!< Bit mask of CHANNELS field. */ +#define I2S_CONFIG_CHANNELS_CHANNELS_Stereo (0UL) /*!< Stereo. */ +#define I2S_CONFIG_CHANNELS_CHANNELS_Left (1UL) /*!< Left only. */ +#define I2S_CONFIG_CHANNELS_CHANNELS_Right (2UL) /*!< Right only. */ + +/* Register: I2S_RXD_PTR */ +/* Description: Receive buffer RAM start address. */ + +/* Bits 31..0 : Receive buffer Data RAM start address. When receiving, words containing samples will be written to this address. This address is a word aligned Data RAM address. */ +#define I2S_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define I2S_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << I2S_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: I2S_TXD_PTR */ +/* Description: Transmit buffer RAM start address. */ + +/* Bits 31..0 : Transmit buffer Data RAM start address. When transmitting, words containing samples will be fetched from this address. This address is a word aligned Data RAM address. */ +#define I2S_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define I2S_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << I2S_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: I2S_RXTXD_MAXCNT */ +/* Description: Size of RXD and TXD buffers. */ + +/* Bits 13..0 : Size of RXD and TXD buffers in number of 32 bit words. */ +#define I2S_RXTXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define I2S_RXTXD_MAXCNT_MAXCNT_Msk (0x3FFFUL << I2S_RXTXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: I2S_PSEL_MCK */ +/* Description: Pin select for MCK signal. */ + +/* Bit 31 : Connection */ +#define I2S_PSEL_MCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define I2S_PSEL_MCK_CONNECT_Msk (0x1UL << I2S_PSEL_MCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define I2S_PSEL_MCK_CONNECT_Connected (0UL) /*!< Connect */ +#define I2S_PSEL_MCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define I2S_PSEL_MCK_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define I2S_PSEL_MCK_PIN_Msk (0x1FUL << I2S_PSEL_MCK_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: I2S_PSEL_SCK */ +/* Description: Pin select for SCK signal. */ + +/* Bit 31 : Connection */ +#define I2S_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define I2S_PSEL_SCK_CONNECT_Msk (0x1UL << I2S_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define I2S_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */ +#define I2S_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define I2S_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define I2S_PSEL_SCK_PIN_Msk (0x1FUL << I2S_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: I2S_PSEL_LRCK */ +/* Description: Pin select for LRCK signal. */ + +/* Bit 31 : Connection */ +#define I2S_PSEL_LRCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define I2S_PSEL_LRCK_CONNECT_Msk (0x1UL << I2S_PSEL_LRCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define I2S_PSEL_LRCK_CONNECT_Connected (0UL) /*!< Connect */ +#define I2S_PSEL_LRCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define I2S_PSEL_LRCK_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define I2S_PSEL_LRCK_PIN_Msk (0x1FUL << I2S_PSEL_LRCK_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: I2S_PSEL_SDIN */ +/* Description: Pin select for SDIN signal. */ + +/* Bit 31 : Connection */ +#define I2S_PSEL_SDIN_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define I2S_PSEL_SDIN_CONNECT_Msk (0x1UL << I2S_PSEL_SDIN_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define I2S_PSEL_SDIN_CONNECT_Connected (0UL) /*!< Connect */ +#define I2S_PSEL_SDIN_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define I2S_PSEL_SDIN_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define I2S_PSEL_SDIN_PIN_Msk (0x1FUL << I2S_PSEL_SDIN_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: I2S_PSEL_SDOUT */ +/* Description: Pin select for SDOUT signal. */ + +/* Bit 31 : Connection */ +#define I2S_PSEL_SDOUT_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define I2S_PSEL_SDOUT_CONNECT_Msk (0x1UL << I2S_PSEL_SDOUT_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define I2S_PSEL_SDOUT_CONNECT_Connected (0UL) /*!< Connect */ +#define I2S_PSEL_SDOUT_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define I2S_PSEL_SDOUT_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define I2S_PSEL_SDOUT_PIN_Msk (0x1FUL << I2S_PSEL_SDOUT_PIN_Pos) /*!< Bit mask of PIN field. */ + + +/* Peripheral: LPCOMP */ +/* Description: Low Power Comparator */ + +/* Register: LPCOMP_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 4 : Shortcut between CROSS event and STOP task */ +#define LPCOMP_SHORTS_CROSS_STOP_Pos (4UL) /*!< Position of CROSS_STOP field. */ +#define LPCOMP_SHORTS_CROSS_STOP_Msk (0x1UL << LPCOMP_SHORTS_CROSS_STOP_Pos) /*!< Bit mask of CROSS_STOP field. */ +#define LPCOMP_SHORTS_CROSS_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define LPCOMP_SHORTS_CROSS_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 3 : Shortcut between UP event and STOP task */ +#define LPCOMP_SHORTS_UP_STOP_Pos (3UL) /*!< Position of UP_STOP field. */ +#define LPCOMP_SHORTS_UP_STOP_Msk (0x1UL << LPCOMP_SHORTS_UP_STOP_Pos) /*!< Bit mask of UP_STOP field. */ +#define LPCOMP_SHORTS_UP_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define LPCOMP_SHORTS_UP_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 2 : Shortcut between DOWN event and STOP task */ +#define LPCOMP_SHORTS_DOWN_STOP_Pos (2UL) /*!< Position of DOWN_STOP field. */ +#define LPCOMP_SHORTS_DOWN_STOP_Msk (0x1UL << LPCOMP_SHORTS_DOWN_STOP_Pos) /*!< Bit mask of DOWN_STOP field. */ +#define LPCOMP_SHORTS_DOWN_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define LPCOMP_SHORTS_DOWN_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 1 : Shortcut between READY event and STOP task */ +#define LPCOMP_SHORTS_READY_STOP_Pos (1UL) /*!< Position of READY_STOP field. */ +#define LPCOMP_SHORTS_READY_STOP_Msk (0x1UL << LPCOMP_SHORTS_READY_STOP_Pos) /*!< Bit mask of READY_STOP field. */ +#define LPCOMP_SHORTS_READY_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define LPCOMP_SHORTS_READY_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 0 : Shortcut between READY event and SAMPLE task */ +#define LPCOMP_SHORTS_READY_SAMPLE_Pos (0UL) /*!< Position of READY_SAMPLE field. */ +#define LPCOMP_SHORTS_READY_SAMPLE_Msk (0x1UL << LPCOMP_SHORTS_READY_SAMPLE_Pos) /*!< Bit mask of READY_SAMPLE field. */ +#define LPCOMP_SHORTS_READY_SAMPLE_Disabled (0UL) /*!< Disable shortcut */ +#define LPCOMP_SHORTS_READY_SAMPLE_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: LPCOMP_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 3 : Write '1' to Enable interrupt for CROSS event */ +#define LPCOMP_INTENSET_CROSS_Pos (3UL) /*!< Position of CROSS field. */ +#define LPCOMP_INTENSET_CROSS_Msk (0x1UL << LPCOMP_INTENSET_CROSS_Pos) /*!< Bit mask of CROSS field. */ +#define LPCOMP_INTENSET_CROSS_Disabled (0UL) /*!< Read: Disabled */ +#define LPCOMP_INTENSET_CROSS_Enabled (1UL) /*!< Read: Enabled */ +#define LPCOMP_INTENSET_CROSS_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable interrupt for UP event */ +#define LPCOMP_INTENSET_UP_Pos (2UL) /*!< Position of UP field. */ +#define LPCOMP_INTENSET_UP_Msk (0x1UL << LPCOMP_INTENSET_UP_Pos) /*!< Bit mask of UP field. */ +#define LPCOMP_INTENSET_UP_Disabled (0UL) /*!< Read: Disabled */ +#define LPCOMP_INTENSET_UP_Enabled (1UL) /*!< Read: Enabled */ +#define LPCOMP_INTENSET_UP_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for DOWN event */ +#define LPCOMP_INTENSET_DOWN_Pos (1UL) /*!< Position of DOWN field. */ +#define LPCOMP_INTENSET_DOWN_Msk (0x1UL << LPCOMP_INTENSET_DOWN_Pos) /*!< Bit mask of DOWN field. */ +#define LPCOMP_INTENSET_DOWN_Disabled (0UL) /*!< Read: Disabled */ +#define LPCOMP_INTENSET_DOWN_Enabled (1UL) /*!< Read: Enabled */ +#define LPCOMP_INTENSET_DOWN_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for READY event */ +#define LPCOMP_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */ +#define LPCOMP_INTENSET_READY_Msk (0x1UL << LPCOMP_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ +#define LPCOMP_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */ +#define LPCOMP_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */ +#define LPCOMP_INTENSET_READY_Set (1UL) /*!< Enable */ + +/* Register: LPCOMP_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 3 : Write '1' to Disable interrupt for CROSS event */ +#define LPCOMP_INTENCLR_CROSS_Pos (3UL) /*!< Position of CROSS field. */ +#define LPCOMP_INTENCLR_CROSS_Msk (0x1UL << LPCOMP_INTENCLR_CROSS_Pos) /*!< Bit mask of CROSS field. */ +#define LPCOMP_INTENCLR_CROSS_Disabled (0UL) /*!< Read: Disabled */ +#define LPCOMP_INTENCLR_CROSS_Enabled (1UL) /*!< Read: Enabled */ +#define LPCOMP_INTENCLR_CROSS_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable interrupt for UP event */ +#define LPCOMP_INTENCLR_UP_Pos (2UL) /*!< Position of UP field. */ +#define LPCOMP_INTENCLR_UP_Msk (0x1UL << LPCOMP_INTENCLR_UP_Pos) /*!< Bit mask of UP field. */ +#define LPCOMP_INTENCLR_UP_Disabled (0UL) /*!< Read: Disabled */ +#define LPCOMP_INTENCLR_UP_Enabled (1UL) /*!< Read: Enabled */ +#define LPCOMP_INTENCLR_UP_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for DOWN event */ +#define LPCOMP_INTENCLR_DOWN_Pos (1UL) /*!< Position of DOWN field. */ +#define LPCOMP_INTENCLR_DOWN_Msk (0x1UL << LPCOMP_INTENCLR_DOWN_Pos) /*!< Bit mask of DOWN field. */ +#define LPCOMP_INTENCLR_DOWN_Disabled (0UL) /*!< Read: Disabled */ +#define LPCOMP_INTENCLR_DOWN_Enabled (1UL) /*!< Read: Enabled */ +#define LPCOMP_INTENCLR_DOWN_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for READY event */ +#define LPCOMP_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */ +#define LPCOMP_INTENCLR_READY_Msk (0x1UL << LPCOMP_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ +#define LPCOMP_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */ +#define LPCOMP_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */ +#define LPCOMP_INTENCLR_READY_Clear (1UL) /*!< Disable */ + +/* Register: LPCOMP_RESULT */ +/* Description: Compare result */ + +/* Bit 0 : Result of last compare. Decision point SAMPLE task. */ +#define LPCOMP_RESULT_RESULT_Pos (0UL) /*!< Position of RESULT field. */ +#define LPCOMP_RESULT_RESULT_Msk (0x1UL << LPCOMP_RESULT_RESULT_Pos) /*!< Bit mask of RESULT field. */ +#define LPCOMP_RESULT_RESULT_Below (0UL) /*!< Input voltage is below the reference threshold (VIN+ < VIN-). */ +#define LPCOMP_RESULT_RESULT_Above (1UL) /*!< Input voltage is above the reference threshold (VIN+ > VIN-). */ + +/* Register: LPCOMP_ENABLE */ +/* Description: Enable LPCOMP */ + +/* Bits 1..0 : Enable or disable LPCOMP */ +#define LPCOMP_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define LPCOMP_ENABLE_ENABLE_Msk (0x3UL << LPCOMP_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define LPCOMP_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ +#define LPCOMP_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */ + +/* Register: LPCOMP_PSEL */ +/* Description: Input pin select */ + +/* Bits 2..0 : Analog pin select */ +#define LPCOMP_PSEL_PSEL_Pos (0UL) /*!< Position of PSEL field. */ +#define LPCOMP_PSEL_PSEL_Msk (0x7UL << LPCOMP_PSEL_PSEL_Pos) /*!< Bit mask of PSEL field. */ +#define LPCOMP_PSEL_PSEL_AnalogInput0 (0UL) /*!< AIN0 selected as analog input */ +#define LPCOMP_PSEL_PSEL_AnalogInput1 (1UL) /*!< AIN1 selected as analog input */ +#define LPCOMP_PSEL_PSEL_AnalogInput2 (2UL) /*!< AIN2 selected as analog input */ +#define LPCOMP_PSEL_PSEL_AnalogInput3 (3UL) /*!< AIN3 selected as analog input */ +#define LPCOMP_PSEL_PSEL_AnalogInput4 (4UL) /*!< AIN4 selected as analog input */ +#define LPCOMP_PSEL_PSEL_AnalogInput5 (5UL) /*!< AIN5 selected as analog input */ +#define LPCOMP_PSEL_PSEL_AnalogInput6 (6UL) /*!< AIN6 selected as analog input */ +#define LPCOMP_PSEL_PSEL_AnalogInput7 (7UL) /*!< AIN7 selected as analog input */ + +/* Register: LPCOMP_REFSEL */ +/* Description: Reference select */ + +/* Bits 3..0 : Reference select */ +#define LPCOMP_REFSEL_REFSEL_Pos (0UL) /*!< Position of REFSEL field. */ +#define LPCOMP_REFSEL_REFSEL_Msk (0xFUL << LPCOMP_REFSEL_REFSEL_Pos) /*!< Bit mask of REFSEL field. */ +#define LPCOMP_REFSEL_REFSEL_Ref1_8Vdd (0UL) /*!< VDD * 1/8 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref2_8Vdd (1UL) /*!< VDD * 2/8 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref3_8Vdd (2UL) /*!< VDD * 3/8 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref4_8Vdd (3UL) /*!< VDD * 4/8 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref5_8Vdd (4UL) /*!< VDD * 5/8 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref6_8Vdd (5UL) /*!< VDD * 6/8 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref7_8Vdd (6UL) /*!< VDD * 7/8 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_ARef (7UL) /*!< External analog reference selected */ +#define LPCOMP_REFSEL_REFSEL_Ref1_16Vdd (8UL) /*!< VDD * 1/16 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref3_16Vdd (9UL) /*!< VDD * 3/16 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref5_16Vdd (10UL) /*!< VDD * 5/16 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref7_16Vdd (11UL) /*!< VDD * 7/16 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref9_16Vdd (12UL) /*!< VDD * 9/16 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref11_16Vdd (13UL) /*!< VDD * 11/16 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref13_16Vdd (14UL) /*!< VDD * 13/16 selected as reference */ +#define LPCOMP_REFSEL_REFSEL_Ref15_16Vdd (15UL) /*!< VDD * 15/16 selected as reference */ + +/* Register: LPCOMP_EXTREFSEL */ +/* Description: External reference select */ + +/* Bit 0 : External analog reference select */ +#define LPCOMP_EXTREFSEL_EXTREFSEL_Pos (0UL) /*!< Position of EXTREFSEL field. */ +#define LPCOMP_EXTREFSEL_EXTREFSEL_Msk (0x1UL << LPCOMP_EXTREFSEL_EXTREFSEL_Pos) /*!< Bit mask of EXTREFSEL field. */ +#define LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference0 (0UL) /*!< Use AIN0 as external analog reference */ +#define LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference1 (1UL) /*!< Use AIN1 as external analog reference */ + +/* Register: LPCOMP_ANADETECT */ +/* Description: Analog detect configuration */ + +/* Bits 1..0 : Analog detect configuration */ +#define LPCOMP_ANADETECT_ANADETECT_Pos (0UL) /*!< Position of ANADETECT field. */ +#define LPCOMP_ANADETECT_ANADETECT_Msk (0x3UL << LPCOMP_ANADETECT_ANADETECT_Pos) /*!< Bit mask of ANADETECT field. */ +#define LPCOMP_ANADETECT_ANADETECT_Cross (0UL) /*!< Generate ANADETECT on crossing, both upward crossing and downward crossing */ +#define LPCOMP_ANADETECT_ANADETECT_Up (1UL) /*!< Generate ANADETECT on upward crossing only */ +#define LPCOMP_ANADETECT_ANADETECT_Down (2UL) /*!< Generate ANADETECT on downward crossing only */ + +/* Register: LPCOMP_HYST */ +/* Description: Comparator hysteresis enable */ + +/* Bit 0 : Comparator hysteresis enable */ +#define LPCOMP_HYST_HYST_Pos (0UL) /*!< Position of HYST field. */ +#define LPCOMP_HYST_HYST_Msk (0x1UL << LPCOMP_HYST_HYST_Pos) /*!< Bit mask of HYST field. */ +#define LPCOMP_HYST_HYST_NoHyst (0UL) /*!< Comparator hysteresis disabled */ +#define LPCOMP_HYST_HYST_Hyst50mV (1UL) /*!< Comparator hysteresis disabled (typ. 50 mV) */ + + +/* Peripheral: MWU */ +/* Description: Memory Watch Unit */ + +/* Register: MWU_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 27 : Enable or disable interrupt for PREGION[1].RA event */ +#define MWU_INTEN_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */ +#define MWU_INTEN_PREGION1RA_Msk (0x1UL << MWU_INTEN_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */ +#define MWU_INTEN_PREGION1RA_Disabled (0UL) /*!< Disable */ +#define MWU_INTEN_PREGION1RA_Enabled (1UL) /*!< Enable */ + +/* Bit 26 : Enable or disable interrupt for PREGION[1].WA event */ +#define MWU_INTEN_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */ +#define MWU_INTEN_PREGION1WA_Msk (0x1UL << MWU_INTEN_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */ +#define MWU_INTEN_PREGION1WA_Disabled (0UL) /*!< Disable */ +#define MWU_INTEN_PREGION1WA_Enabled (1UL) /*!< Enable */ + +/* Bit 25 : Enable or disable interrupt for PREGION[0].RA event */ +#define MWU_INTEN_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */ +#define MWU_INTEN_PREGION0RA_Msk (0x1UL << MWU_INTEN_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */ +#define MWU_INTEN_PREGION0RA_Disabled (0UL) /*!< Disable */ +#define MWU_INTEN_PREGION0RA_Enabled (1UL) /*!< Enable */ + +/* Bit 24 : Enable or disable interrupt for PREGION[0].WA event */ +#define MWU_INTEN_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */ +#define MWU_INTEN_PREGION0WA_Msk (0x1UL << MWU_INTEN_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */ +#define MWU_INTEN_PREGION0WA_Disabled (0UL) /*!< Disable */ +#define MWU_INTEN_PREGION0WA_Enabled (1UL) /*!< Enable */ + +/* Bit 7 : Enable or disable interrupt for REGION[3].RA event */ +#define MWU_INTEN_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */ +#define MWU_INTEN_REGION3RA_Msk (0x1UL << MWU_INTEN_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */ +#define MWU_INTEN_REGION3RA_Disabled (0UL) /*!< Disable */ +#define MWU_INTEN_REGION3RA_Enabled (1UL) /*!< Enable */ + +/* Bit 6 : Enable or disable interrupt for REGION[3].WA event */ +#define MWU_INTEN_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */ +#define MWU_INTEN_REGION3WA_Msk (0x1UL << MWU_INTEN_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */ +#define MWU_INTEN_REGION3WA_Disabled (0UL) /*!< Disable */ +#define MWU_INTEN_REGION3WA_Enabled (1UL) /*!< Enable */ + +/* Bit 5 : Enable or disable interrupt for REGION[2].RA event */ +#define MWU_INTEN_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */ +#define MWU_INTEN_REGION2RA_Msk (0x1UL << MWU_INTEN_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */ +#define MWU_INTEN_REGION2RA_Disabled (0UL) /*!< Disable */ +#define MWU_INTEN_REGION2RA_Enabled (1UL) /*!< Enable */ + +/* Bit 4 : Enable or disable interrupt for REGION[2].WA event */ +#define MWU_INTEN_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */ +#define MWU_INTEN_REGION2WA_Msk (0x1UL << MWU_INTEN_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */ +#define MWU_INTEN_REGION2WA_Disabled (0UL) /*!< Disable */ +#define MWU_INTEN_REGION2WA_Enabled (1UL) /*!< Enable */ + +/* Bit 3 : Enable or disable interrupt for REGION[1].RA event */ +#define MWU_INTEN_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */ +#define MWU_INTEN_REGION1RA_Msk (0x1UL << MWU_INTEN_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */ +#define MWU_INTEN_REGION1RA_Disabled (0UL) /*!< Disable */ +#define MWU_INTEN_REGION1RA_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable interrupt for REGION[1].WA event */ +#define MWU_INTEN_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */ +#define MWU_INTEN_REGION1WA_Msk (0x1UL << MWU_INTEN_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */ +#define MWU_INTEN_REGION1WA_Disabled (0UL) /*!< Disable */ +#define MWU_INTEN_REGION1WA_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for REGION[0].RA event */ +#define MWU_INTEN_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */ +#define MWU_INTEN_REGION0RA_Msk (0x1UL << MWU_INTEN_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */ +#define MWU_INTEN_REGION0RA_Disabled (0UL) /*!< Disable */ +#define MWU_INTEN_REGION0RA_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable interrupt for REGION[0].WA event */ +#define MWU_INTEN_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */ +#define MWU_INTEN_REGION0WA_Msk (0x1UL << MWU_INTEN_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */ +#define MWU_INTEN_REGION0WA_Disabled (0UL) /*!< Disable */ +#define MWU_INTEN_REGION0WA_Enabled (1UL) /*!< Enable */ + +/* Register: MWU_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 27 : Write '1' to Enable interrupt for PREGION[1].RA event */ +#define MWU_INTENSET_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */ +#define MWU_INTENSET_PREGION1RA_Msk (0x1UL << MWU_INTENSET_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */ +#define MWU_INTENSET_PREGION1RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENSET_PREGION1RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENSET_PREGION1RA_Set (1UL) /*!< Enable */ + +/* Bit 26 : Write '1' to Enable interrupt for PREGION[1].WA event */ +#define MWU_INTENSET_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */ +#define MWU_INTENSET_PREGION1WA_Msk (0x1UL << MWU_INTENSET_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */ +#define MWU_INTENSET_PREGION1WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENSET_PREGION1WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENSET_PREGION1WA_Set (1UL) /*!< Enable */ + +/* Bit 25 : Write '1' to Enable interrupt for PREGION[0].RA event */ +#define MWU_INTENSET_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */ +#define MWU_INTENSET_PREGION0RA_Msk (0x1UL << MWU_INTENSET_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */ +#define MWU_INTENSET_PREGION0RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENSET_PREGION0RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENSET_PREGION0RA_Set (1UL) /*!< Enable */ + +/* Bit 24 : Write '1' to Enable interrupt for PREGION[0].WA event */ +#define MWU_INTENSET_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */ +#define MWU_INTENSET_PREGION0WA_Msk (0x1UL << MWU_INTENSET_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */ +#define MWU_INTENSET_PREGION0WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENSET_PREGION0WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENSET_PREGION0WA_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to Enable interrupt for REGION[3].RA event */ +#define MWU_INTENSET_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */ +#define MWU_INTENSET_REGION3RA_Msk (0x1UL << MWU_INTENSET_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */ +#define MWU_INTENSET_REGION3RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENSET_REGION3RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENSET_REGION3RA_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to Enable interrupt for REGION[3].WA event */ +#define MWU_INTENSET_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */ +#define MWU_INTENSET_REGION3WA_Msk (0x1UL << MWU_INTENSET_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */ +#define MWU_INTENSET_REGION3WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENSET_REGION3WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENSET_REGION3WA_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to Enable interrupt for REGION[2].RA event */ +#define MWU_INTENSET_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */ +#define MWU_INTENSET_REGION2RA_Msk (0x1UL << MWU_INTENSET_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */ +#define MWU_INTENSET_REGION2RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENSET_REGION2RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENSET_REGION2RA_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to Enable interrupt for REGION[2].WA event */ +#define MWU_INTENSET_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */ +#define MWU_INTENSET_REGION2WA_Msk (0x1UL << MWU_INTENSET_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */ +#define MWU_INTENSET_REGION2WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENSET_REGION2WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENSET_REGION2WA_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to Enable interrupt for REGION[1].RA event */ +#define MWU_INTENSET_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */ +#define MWU_INTENSET_REGION1RA_Msk (0x1UL << MWU_INTENSET_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */ +#define MWU_INTENSET_REGION1RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENSET_REGION1RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENSET_REGION1RA_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable interrupt for REGION[1].WA event */ +#define MWU_INTENSET_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */ +#define MWU_INTENSET_REGION1WA_Msk (0x1UL << MWU_INTENSET_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */ +#define MWU_INTENSET_REGION1WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENSET_REGION1WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENSET_REGION1WA_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for REGION[0].RA event */ +#define MWU_INTENSET_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */ +#define MWU_INTENSET_REGION0RA_Msk (0x1UL << MWU_INTENSET_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */ +#define MWU_INTENSET_REGION0RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENSET_REGION0RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENSET_REGION0RA_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for REGION[0].WA event */ +#define MWU_INTENSET_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */ +#define MWU_INTENSET_REGION0WA_Msk (0x1UL << MWU_INTENSET_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */ +#define MWU_INTENSET_REGION0WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENSET_REGION0WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENSET_REGION0WA_Set (1UL) /*!< Enable */ + +/* Register: MWU_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 27 : Write '1' to Disable interrupt for PREGION[1].RA event */ +#define MWU_INTENCLR_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */ +#define MWU_INTENCLR_PREGION1RA_Msk (0x1UL << MWU_INTENCLR_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */ +#define MWU_INTENCLR_PREGION1RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENCLR_PREGION1RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENCLR_PREGION1RA_Clear (1UL) /*!< Disable */ + +/* Bit 26 : Write '1' to Disable interrupt for PREGION[1].WA event */ +#define MWU_INTENCLR_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */ +#define MWU_INTENCLR_PREGION1WA_Msk (0x1UL << MWU_INTENCLR_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */ +#define MWU_INTENCLR_PREGION1WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENCLR_PREGION1WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENCLR_PREGION1WA_Clear (1UL) /*!< Disable */ + +/* Bit 25 : Write '1' to Disable interrupt for PREGION[0].RA event */ +#define MWU_INTENCLR_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */ +#define MWU_INTENCLR_PREGION0RA_Msk (0x1UL << MWU_INTENCLR_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */ +#define MWU_INTENCLR_PREGION0RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENCLR_PREGION0RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENCLR_PREGION0RA_Clear (1UL) /*!< Disable */ + +/* Bit 24 : Write '1' to Disable interrupt for PREGION[0].WA event */ +#define MWU_INTENCLR_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */ +#define MWU_INTENCLR_PREGION0WA_Msk (0x1UL << MWU_INTENCLR_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */ +#define MWU_INTENCLR_PREGION0WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENCLR_PREGION0WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENCLR_PREGION0WA_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to Disable interrupt for REGION[3].RA event */ +#define MWU_INTENCLR_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */ +#define MWU_INTENCLR_REGION3RA_Msk (0x1UL << MWU_INTENCLR_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */ +#define MWU_INTENCLR_REGION3RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENCLR_REGION3RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENCLR_REGION3RA_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to Disable interrupt for REGION[3].WA event */ +#define MWU_INTENCLR_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */ +#define MWU_INTENCLR_REGION3WA_Msk (0x1UL << MWU_INTENCLR_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */ +#define MWU_INTENCLR_REGION3WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENCLR_REGION3WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENCLR_REGION3WA_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to Disable interrupt for REGION[2].RA event */ +#define MWU_INTENCLR_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */ +#define MWU_INTENCLR_REGION2RA_Msk (0x1UL << MWU_INTENCLR_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */ +#define MWU_INTENCLR_REGION2RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENCLR_REGION2RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENCLR_REGION2RA_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to Disable interrupt for REGION[2].WA event */ +#define MWU_INTENCLR_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */ +#define MWU_INTENCLR_REGION2WA_Msk (0x1UL << MWU_INTENCLR_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */ +#define MWU_INTENCLR_REGION2WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENCLR_REGION2WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENCLR_REGION2WA_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to Disable interrupt for REGION[1].RA event */ +#define MWU_INTENCLR_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */ +#define MWU_INTENCLR_REGION1RA_Msk (0x1UL << MWU_INTENCLR_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */ +#define MWU_INTENCLR_REGION1RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENCLR_REGION1RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENCLR_REGION1RA_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable interrupt for REGION[1].WA event */ +#define MWU_INTENCLR_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */ +#define MWU_INTENCLR_REGION1WA_Msk (0x1UL << MWU_INTENCLR_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */ +#define MWU_INTENCLR_REGION1WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENCLR_REGION1WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENCLR_REGION1WA_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for REGION[0].RA event */ +#define MWU_INTENCLR_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */ +#define MWU_INTENCLR_REGION0RA_Msk (0x1UL << MWU_INTENCLR_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */ +#define MWU_INTENCLR_REGION0RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENCLR_REGION0RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENCLR_REGION0RA_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for REGION[0].WA event */ +#define MWU_INTENCLR_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */ +#define MWU_INTENCLR_REGION0WA_Msk (0x1UL << MWU_INTENCLR_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */ +#define MWU_INTENCLR_REGION0WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_INTENCLR_REGION0WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_INTENCLR_REGION0WA_Clear (1UL) /*!< Disable */ + +/* Register: MWU_NMIEN */ +/* Description: Enable or disable non-maskable interrupt */ + +/* Bit 27 : Enable or disable non-maskable interrupt for PREGION[1].RA event */ +#define MWU_NMIEN_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */ +#define MWU_NMIEN_PREGION1RA_Msk (0x1UL << MWU_NMIEN_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */ +#define MWU_NMIEN_PREGION1RA_Disabled (0UL) /*!< Disable */ +#define MWU_NMIEN_PREGION1RA_Enabled (1UL) /*!< Enable */ + +/* Bit 26 : Enable or disable non-maskable interrupt for PREGION[1].WA event */ +#define MWU_NMIEN_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */ +#define MWU_NMIEN_PREGION1WA_Msk (0x1UL << MWU_NMIEN_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */ +#define MWU_NMIEN_PREGION1WA_Disabled (0UL) /*!< Disable */ +#define MWU_NMIEN_PREGION1WA_Enabled (1UL) /*!< Enable */ + +/* Bit 25 : Enable or disable non-maskable interrupt for PREGION[0].RA event */ +#define MWU_NMIEN_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */ +#define MWU_NMIEN_PREGION0RA_Msk (0x1UL << MWU_NMIEN_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */ +#define MWU_NMIEN_PREGION0RA_Disabled (0UL) /*!< Disable */ +#define MWU_NMIEN_PREGION0RA_Enabled (1UL) /*!< Enable */ + +/* Bit 24 : Enable or disable non-maskable interrupt for PREGION[0].WA event */ +#define MWU_NMIEN_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */ +#define MWU_NMIEN_PREGION0WA_Msk (0x1UL << MWU_NMIEN_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */ +#define MWU_NMIEN_PREGION0WA_Disabled (0UL) /*!< Disable */ +#define MWU_NMIEN_PREGION0WA_Enabled (1UL) /*!< Enable */ + +/* Bit 7 : Enable or disable non-maskable interrupt for REGION[3].RA event */ +#define MWU_NMIEN_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */ +#define MWU_NMIEN_REGION3RA_Msk (0x1UL << MWU_NMIEN_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */ +#define MWU_NMIEN_REGION3RA_Disabled (0UL) /*!< Disable */ +#define MWU_NMIEN_REGION3RA_Enabled (1UL) /*!< Enable */ + +/* Bit 6 : Enable or disable non-maskable interrupt for REGION[3].WA event */ +#define MWU_NMIEN_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */ +#define MWU_NMIEN_REGION3WA_Msk (0x1UL << MWU_NMIEN_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */ +#define MWU_NMIEN_REGION3WA_Disabled (0UL) /*!< Disable */ +#define MWU_NMIEN_REGION3WA_Enabled (1UL) /*!< Enable */ + +/* Bit 5 : Enable or disable non-maskable interrupt for REGION[2].RA event */ +#define MWU_NMIEN_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */ +#define MWU_NMIEN_REGION2RA_Msk (0x1UL << MWU_NMIEN_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */ +#define MWU_NMIEN_REGION2RA_Disabled (0UL) /*!< Disable */ +#define MWU_NMIEN_REGION2RA_Enabled (1UL) /*!< Enable */ + +/* Bit 4 : Enable or disable non-maskable interrupt for REGION[2].WA event */ +#define MWU_NMIEN_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */ +#define MWU_NMIEN_REGION2WA_Msk (0x1UL << MWU_NMIEN_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */ +#define MWU_NMIEN_REGION2WA_Disabled (0UL) /*!< Disable */ +#define MWU_NMIEN_REGION2WA_Enabled (1UL) /*!< Enable */ + +/* Bit 3 : Enable or disable non-maskable interrupt for REGION[1].RA event */ +#define MWU_NMIEN_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */ +#define MWU_NMIEN_REGION1RA_Msk (0x1UL << MWU_NMIEN_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */ +#define MWU_NMIEN_REGION1RA_Disabled (0UL) /*!< Disable */ +#define MWU_NMIEN_REGION1RA_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable non-maskable interrupt for REGION[1].WA event */ +#define MWU_NMIEN_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */ +#define MWU_NMIEN_REGION1WA_Msk (0x1UL << MWU_NMIEN_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */ +#define MWU_NMIEN_REGION1WA_Disabled (0UL) /*!< Disable */ +#define MWU_NMIEN_REGION1WA_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable non-maskable interrupt for REGION[0].RA event */ +#define MWU_NMIEN_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */ +#define MWU_NMIEN_REGION0RA_Msk (0x1UL << MWU_NMIEN_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */ +#define MWU_NMIEN_REGION0RA_Disabled (0UL) /*!< Disable */ +#define MWU_NMIEN_REGION0RA_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable non-maskable interrupt for REGION[0].WA event */ +#define MWU_NMIEN_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */ +#define MWU_NMIEN_REGION0WA_Msk (0x1UL << MWU_NMIEN_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */ +#define MWU_NMIEN_REGION0WA_Disabled (0UL) /*!< Disable */ +#define MWU_NMIEN_REGION0WA_Enabled (1UL) /*!< Enable */ + +/* Register: MWU_NMIENSET */ +/* Description: Enable non-maskable interrupt */ + +/* Bit 27 : Write '1' to Enable non-maskable interrupt for PREGION[1].RA event */ +#define MWU_NMIENSET_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */ +#define MWU_NMIENSET_PREGION1RA_Msk (0x1UL << MWU_NMIENSET_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */ +#define MWU_NMIENSET_PREGION1RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENSET_PREGION1RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENSET_PREGION1RA_Set (1UL) /*!< Enable */ + +/* Bit 26 : Write '1' to Enable non-maskable interrupt for PREGION[1].WA event */ +#define MWU_NMIENSET_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */ +#define MWU_NMIENSET_PREGION1WA_Msk (0x1UL << MWU_NMIENSET_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */ +#define MWU_NMIENSET_PREGION1WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENSET_PREGION1WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENSET_PREGION1WA_Set (1UL) /*!< Enable */ + +/* Bit 25 : Write '1' to Enable non-maskable interrupt for PREGION[0].RA event */ +#define MWU_NMIENSET_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */ +#define MWU_NMIENSET_PREGION0RA_Msk (0x1UL << MWU_NMIENSET_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */ +#define MWU_NMIENSET_PREGION0RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENSET_PREGION0RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENSET_PREGION0RA_Set (1UL) /*!< Enable */ + +/* Bit 24 : Write '1' to Enable non-maskable interrupt for PREGION[0].WA event */ +#define MWU_NMIENSET_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */ +#define MWU_NMIENSET_PREGION0WA_Msk (0x1UL << MWU_NMIENSET_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */ +#define MWU_NMIENSET_PREGION0WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENSET_PREGION0WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENSET_PREGION0WA_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to Enable non-maskable interrupt for REGION[3].RA event */ +#define MWU_NMIENSET_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */ +#define MWU_NMIENSET_REGION3RA_Msk (0x1UL << MWU_NMIENSET_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */ +#define MWU_NMIENSET_REGION3RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENSET_REGION3RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENSET_REGION3RA_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to Enable non-maskable interrupt for REGION[3].WA event */ +#define MWU_NMIENSET_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */ +#define MWU_NMIENSET_REGION3WA_Msk (0x1UL << MWU_NMIENSET_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */ +#define MWU_NMIENSET_REGION3WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENSET_REGION3WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENSET_REGION3WA_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to Enable non-maskable interrupt for REGION[2].RA event */ +#define MWU_NMIENSET_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */ +#define MWU_NMIENSET_REGION2RA_Msk (0x1UL << MWU_NMIENSET_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */ +#define MWU_NMIENSET_REGION2RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENSET_REGION2RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENSET_REGION2RA_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to Enable non-maskable interrupt for REGION[2].WA event */ +#define MWU_NMIENSET_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */ +#define MWU_NMIENSET_REGION2WA_Msk (0x1UL << MWU_NMIENSET_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */ +#define MWU_NMIENSET_REGION2WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENSET_REGION2WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENSET_REGION2WA_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to Enable non-maskable interrupt for REGION[1].RA event */ +#define MWU_NMIENSET_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */ +#define MWU_NMIENSET_REGION1RA_Msk (0x1UL << MWU_NMIENSET_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */ +#define MWU_NMIENSET_REGION1RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENSET_REGION1RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENSET_REGION1RA_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable non-maskable interrupt for REGION[1].WA event */ +#define MWU_NMIENSET_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */ +#define MWU_NMIENSET_REGION1WA_Msk (0x1UL << MWU_NMIENSET_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */ +#define MWU_NMIENSET_REGION1WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENSET_REGION1WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENSET_REGION1WA_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable non-maskable interrupt for REGION[0].RA event */ +#define MWU_NMIENSET_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */ +#define MWU_NMIENSET_REGION0RA_Msk (0x1UL << MWU_NMIENSET_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */ +#define MWU_NMIENSET_REGION0RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENSET_REGION0RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENSET_REGION0RA_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable non-maskable interrupt for REGION[0].WA event */ +#define MWU_NMIENSET_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */ +#define MWU_NMIENSET_REGION0WA_Msk (0x1UL << MWU_NMIENSET_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */ +#define MWU_NMIENSET_REGION0WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENSET_REGION0WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENSET_REGION0WA_Set (1UL) /*!< Enable */ + +/* Register: MWU_NMIENCLR */ +/* Description: Disable non-maskable interrupt */ + +/* Bit 27 : Write '1' to Disable non-maskable interrupt for PREGION[1].RA event */ +#define MWU_NMIENCLR_PREGION1RA_Pos (27UL) /*!< Position of PREGION1RA field. */ +#define MWU_NMIENCLR_PREGION1RA_Msk (0x1UL << MWU_NMIENCLR_PREGION1RA_Pos) /*!< Bit mask of PREGION1RA field. */ +#define MWU_NMIENCLR_PREGION1RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENCLR_PREGION1RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENCLR_PREGION1RA_Clear (1UL) /*!< Disable */ + +/* Bit 26 : Write '1' to Disable non-maskable interrupt for PREGION[1].WA event */ +#define MWU_NMIENCLR_PREGION1WA_Pos (26UL) /*!< Position of PREGION1WA field. */ +#define MWU_NMIENCLR_PREGION1WA_Msk (0x1UL << MWU_NMIENCLR_PREGION1WA_Pos) /*!< Bit mask of PREGION1WA field. */ +#define MWU_NMIENCLR_PREGION1WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENCLR_PREGION1WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENCLR_PREGION1WA_Clear (1UL) /*!< Disable */ + +/* Bit 25 : Write '1' to Disable non-maskable interrupt for PREGION[0].RA event */ +#define MWU_NMIENCLR_PREGION0RA_Pos (25UL) /*!< Position of PREGION0RA field. */ +#define MWU_NMIENCLR_PREGION0RA_Msk (0x1UL << MWU_NMIENCLR_PREGION0RA_Pos) /*!< Bit mask of PREGION0RA field. */ +#define MWU_NMIENCLR_PREGION0RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENCLR_PREGION0RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENCLR_PREGION0RA_Clear (1UL) /*!< Disable */ + +/* Bit 24 : Write '1' to Disable non-maskable interrupt for PREGION[0].WA event */ +#define MWU_NMIENCLR_PREGION0WA_Pos (24UL) /*!< Position of PREGION0WA field. */ +#define MWU_NMIENCLR_PREGION0WA_Msk (0x1UL << MWU_NMIENCLR_PREGION0WA_Pos) /*!< Bit mask of PREGION0WA field. */ +#define MWU_NMIENCLR_PREGION0WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENCLR_PREGION0WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENCLR_PREGION0WA_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to Disable non-maskable interrupt for REGION[3].RA event */ +#define MWU_NMIENCLR_REGION3RA_Pos (7UL) /*!< Position of REGION3RA field. */ +#define MWU_NMIENCLR_REGION3RA_Msk (0x1UL << MWU_NMIENCLR_REGION3RA_Pos) /*!< Bit mask of REGION3RA field. */ +#define MWU_NMIENCLR_REGION3RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENCLR_REGION3RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENCLR_REGION3RA_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to Disable non-maskable interrupt for REGION[3].WA event */ +#define MWU_NMIENCLR_REGION3WA_Pos (6UL) /*!< Position of REGION3WA field. */ +#define MWU_NMIENCLR_REGION3WA_Msk (0x1UL << MWU_NMIENCLR_REGION3WA_Pos) /*!< Bit mask of REGION3WA field. */ +#define MWU_NMIENCLR_REGION3WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENCLR_REGION3WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENCLR_REGION3WA_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to Disable non-maskable interrupt for REGION[2].RA event */ +#define MWU_NMIENCLR_REGION2RA_Pos (5UL) /*!< Position of REGION2RA field. */ +#define MWU_NMIENCLR_REGION2RA_Msk (0x1UL << MWU_NMIENCLR_REGION2RA_Pos) /*!< Bit mask of REGION2RA field. */ +#define MWU_NMIENCLR_REGION2RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENCLR_REGION2RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENCLR_REGION2RA_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to Disable non-maskable interrupt for REGION[2].WA event */ +#define MWU_NMIENCLR_REGION2WA_Pos (4UL) /*!< Position of REGION2WA field. */ +#define MWU_NMIENCLR_REGION2WA_Msk (0x1UL << MWU_NMIENCLR_REGION2WA_Pos) /*!< Bit mask of REGION2WA field. */ +#define MWU_NMIENCLR_REGION2WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENCLR_REGION2WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENCLR_REGION2WA_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to Disable non-maskable interrupt for REGION[1].RA event */ +#define MWU_NMIENCLR_REGION1RA_Pos (3UL) /*!< Position of REGION1RA field. */ +#define MWU_NMIENCLR_REGION1RA_Msk (0x1UL << MWU_NMIENCLR_REGION1RA_Pos) /*!< Bit mask of REGION1RA field. */ +#define MWU_NMIENCLR_REGION1RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENCLR_REGION1RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENCLR_REGION1RA_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable non-maskable interrupt for REGION[1].WA event */ +#define MWU_NMIENCLR_REGION1WA_Pos (2UL) /*!< Position of REGION1WA field. */ +#define MWU_NMIENCLR_REGION1WA_Msk (0x1UL << MWU_NMIENCLR_REGION1WA_Pos) /*!< Bit mask of REGION1WA field. */ +#define MWU_NMIENCLR_REGION1WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENCLR_REGION1WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENCLR_REGION1WA_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable non-maskable interrupt for REGION[0].RA event */ +#define MWU_NMIENCLR_REGION0RA_Pos (1UL) /*!< Position of REGION0RA field. */ +#define MWU_NMIENCLR_REGION0RA_Msk (0x1UL << MWU_NMIENCLR_REGION0RA_Pos) /*!< Bit mask of REGION0RA field. */ +#define MWU_NMIENCLR_REGION0RA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENCLR_REGION0RA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENCLR_REGION0RA_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable non-maskable interrupt for REGION[0].WA event */ +#define MWU_NMIENCLR_REGION0WA_Pos (0UL) /*!< Position of REGION0WA field. */ +#define MWU_NMIENCLR_REGION0WA_Msk (0x1UL << MWU_NMIENCLR_REGION0WA_Pos) /*!< Bit mask of REGION0WA field. */ +#define MWU_NMIENCLR_REGION0WA_Disabled (0UL) /*!< Read: Disabled */ +#define MWU_NMIENCLR_REGION0WA_Enabled (1UL) /*!< Read: Enabled */ +#define MWU_NMIENCLR_REGION0WA_Clear (1UL) /*!< Disable */ + +/* Register: MWU_PERREGION_SUBSTATWA */ +/* Description: Description cluster[0]: Source of event/interrupt in region 0, write access detected while corresponding subregion was enabled for watching */ + +/* Bit 31 : Subregion 31 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR31_Pos (31UL) /*!< Position of SR31 field. */ +#define MWU_PERREGION_SUBSTATWA_SR31_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR31_Pos) /*!< Bit mask of SR31 field. */ +#define MWU_PERREGION_SUBSTATWA_SR31_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR31_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 30 : Subregion 30 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR30_Pos (30UL) /*!< Position of SR30 field. */ +#define MWU_PERREGION_SUBSTATWA_SR30_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR30_Pos) /*!< Bit mask of SR30 field. */ +#define MWU_PERREGION_SUBSTATWA_SR30_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR30_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 29 : Subregion 29 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR29_Pos (29UL) /*!< Position of SR29 field. */ +#define MWU_PERREGION_SUBSTATWA_SR29_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR29_Pos) /*!< Bit mask of SR29 field. */ +#define MWU_PERREGION_SUBSTATWA_SR29_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR29_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 28 : Subregion 28 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR28_Pos (28UL) /*!< Position of SR28 field. */ +#define MWU_PERREGION_SUBSTATWA_SR28_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR28_Pos) /*!< Bit mask of SR28 field. */ +#define MWU_PERREGION_SUBSTATWA_SR28_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR28_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 27 : Subregion 27 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR27_Pos (27UL) /*!< Position of SR27 field. */ +#define MWU_PERREGION_SUBSTATWA_SR27_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR27_Pos) /*!< Bit mask of SR27 field. */ +#define MWU_PERREGION_SUBSTATWA_SR27_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR27_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 26 : Subregion 26 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR26_Pos (26UL) /*!< Position of SR26 field. */ +#define MWU_PERREGION_SUBSTATWA_SR26_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR26_Pos) /*!< Bit mask of SR26 field. */ +#define MWU_PERREGION_SUBSTATWA_SR26_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR26_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 25 : Subregion 25 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR25_Pos (25UL) /*!< Position of SR25 field. */ +#define MWU_PERREGION_SUBSTATWA_SR25_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR25_Pos) /*!< Bit mask of SR25 field. */ +#define MWU_PERREGION_SUBSTATWA_SR25_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR25_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 24 : Subregion 24 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR24_Pos (24UL) /*!< Position of SR24 field. */ +#define MWU_PERREGION_SUBSTATWA_SR24_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR24_Pos) /*!< Bit mask of SR24 field. */ +#define MWU_PERREGION_SUBSTATWA_SR24_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR24_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 23 : Subregion 23 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR23_Pos (23UL) /*!< Position of SR23 field. */ +#define MWU_PERREGION_SUBSTATWA_SR23_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR23_Pos) /*!< Bit mask of SR23 field. */ +#define MWU_PERREGION_SUBSTATWA_SR23_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR23_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 22 : Subregion 22 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR22_Pos (22UL) /*!< Position of SR22 field. */ +#define MWU_PERREGION_SUBSTATWA_SR22_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR22_Pos) /*!< Bit mask of SR22 field. */ +#define MWU_PERREGION_SUBSTATWA_SR22_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR22_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 21 : Subregion 21 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR21_Pos (21UL) /*!< Position of SR21 field. */ +#define MWU_PERREGION_SUBSTATWA_SR21_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR21_Pos) /*!< Bit mask of SR21 field. */ +#define MWU_PERREGION_SUBSTATWA_SR21_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR21_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 20 : Subregion 20 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR20_Pos (20UL) /*!< Position of SR20 field. */ +#define MWU_PERREGION_SUBSTATWA_SR20_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR20_Pos) /*!< Bit mask of SR20 field. */ +#define MWU_PERREGION_SUBSTATWA_SR20_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR20_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 19 : Subregion 19 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR19_Pos (19UL) /*!< Position of SR19 field. */ +#define MWU_PERREGION_SUBSTATWA_SR19_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR19_Pos) /*!< Bit mask of SR19 field. */ +#define MWU_PERREGION_SUBSTATWA_SR19_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR19_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 18 : Subregion 18 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR18_Pos (18UL) /*!< Position of SR18 field. */ +#define MWU_PERREGION_SUBSTATWA_SR18_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR18_Pos) /*!< Bit mask of SR18 field. */ +#define MWU_PERREGION_SUBSTATWA_SR18_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR18_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 17 : Subregion 17 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR17_Pos (17UL) /*!< Position of SR17 field. */ +#define MWU_PERREGION_SUBSTATWA_SR17_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR17_Pos) /*!< Bit mask of SR17 field. */ +#define MWU_PERREGION_SUBSTATWA_SR17_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR17_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 16 : Subregion 16 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR16_Pos (16UL) /*!< Position of SR16 field. */ +#define MWU_PERREGION_SUBSTATWA_SR16_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR16_Pos) /*!< Bit mask of SR16 field. */ +#define MWU_PERREGION_SUBSTATWA_SR16_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR16_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 15 : Subregion 15 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR15_Pos (15UL) /*!< Position of SR15 field. */ +#define MWU_PERREGION_SUBSTATWA_SR15_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR15_Pos) /*!< Bit mask of SR15 field. */ +#define MWU_PERREGION_SUBSTATWA_SR15_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR15_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 14 : Subregion 14 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR14_Pos (14UL) /*!< Position of SR14 field. */ +#define MWU_PERREGION_SUBSTATWA_SR14_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR14_Pos) /*!< Bit mask of SR14 field. */ +#define MWU_PERREGION_SUBSTATWA_SR14_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR14_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 13 : Subregion 13 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR13_Pos (13UL) /*!< Position of SR13 field. */ +#define MWU_PERREGION_SUBSTATWA_SR13_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR13_Pos) /*!< Bit mask of SR13 field. */ +#define MWU_PERREGION_SUBSTATWA_SR13_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR13_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 12 : Subregion 12 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR12_Pos (12UL) /*!< Position of SR12 field. */ +#define MWU_PERREGION_SUBSTATWA_SR12_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR12_Pos) /*!< Bit mask of SR12 field. */ +#define MWU_PERREGION_SUBSTATWA_SR12_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR12_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 11 : Subregion 11 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR11_Pos (11UL) /*!< Position of SR11 field. */ +#define MWU_PERREGION_SUBSTATWA_SR11_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR11_Pos) /*!< Bit mask of SR11 field. */ +#define MWU_PERREGION_SUBSTATWA_SR11_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR11_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 10 : Subregion 10 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR10_Pos (10UL) /*!< Position of SR10 field. */ +#define MWU_PERREGION_SUBSTATWA_SR10_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR10_Pos) /*!< Bit mask of SR10 field. */ +#define MWU_PERREGION_SUBSTATWA_SR10_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR10_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 9 : Subregion 9 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR9_Pos (9UL) /*!< Position of SR9 field. */ +#define MWU_PERREGION_SUBSTATWA_SR9_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR9_Pos) /*!< Bit mask of SR9 field. */ +#define MWU_PERREGION_SUBSTATWA_SR9_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR9_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 8 : Subregion 8 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR8_Pos (8UL) /*!< Position of SR8 field. */ +#define MWU_PERREGION_SUBSTATWA_SR8_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR8_Pos) /*!< Bit mask of SR8 field. */ +#define MWU_PERREGION_SUBSTATWA_SR8_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR8_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 7 : Subregion 7 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR7_Pos (7UL) /*!< Position of SR7 field. */ +#define MWU_PERREGION_SUBSTATWA_SR7_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR7_Pos) /*!< Bit mask of SR7 field. */ +#define MWU_PERREGION_SUBSTATWA_SR7_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR7_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 6 : Subregion 6 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR6_Pos (6UL) /*!< Position of SR6 field. */ +#define MWU_PERREGION_SUBSTATWA_SR6_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR6_Pos) /*!< Bit mask of SR6 field. */ +#define MWU_PERREGION_SUBSTATWA_SR6_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR6_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 5 : Subregion 5 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR5_Pos (5UL) /*!< Position of SR5 field. */ +#define MWU_PERREGION_SUBSTATWA_SR5_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR5_Pos) /*!< Bit mask of SR5 field. */ +#define MWU_PERREGION_SUBSTATWA_SR5_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR5_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 4 : Subregion 4 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR4_Pos (4UL) /*!< Position of SR4 field. */ +#define MWU_PERREGION_SUBSTATWA_SR4_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR4_Pos) /*!< Bit mask of SR4 field. */ +#define MWU_PERREGION_SUBSTATWA_SR4_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR4_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 3 : Subregion 3 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR3_Pos (3UL) /*!< Position of SR3 field. */ +#define MWU_PERREGION_SUBSTATWA_SR3_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR3_Pos) /*!< Bit mask of SR3 field. */ +#define MWU_PERREGION_SUBSTATWA_SR3_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR3_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 2 : Subregion 2 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR2_Pos (2UL) /*!< Position of SR2 field. */ +#define MWU_PERREGION_SUBSTATWA_SR2_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR2_Pos) /*!< Bit mask of SR2 field. */ +#define MWU_PERREGION_SUBSTATWA_SR2_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR2_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 1 : Subregion 1 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR1_Pos (1UL) /*!< Position of SR1 field. */ +#define MWU_PERREGION_SUBSTATWA_SR1_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR1_Pos) /*!< Bit mask of SR1 field. */ +#define MWU_PERREGION_SUBSTATWA_SR1_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR1_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Bit 0 : Subregion 0 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATWA_SR0_Pos (0UL) /*!< Position of SR0 field. */ +#define MWU_PERREGION_SUBSTATWA_SR0_Msk (0x1UL << MWU_PERREGION_SUBSTATWA_SR0_Pos) /*!< Bit mask of SR0 field. */ +#define MWU_PERREGION_SUBSTATWA_SR0_NoAccess (0UL) /*!< No write access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATWA_SR0_Access (1UL) /*!< Write access(es) occurred in this subregion */ + +/* Register: MWU_PERREGION_SUBSTATRA */ +/* Description: Description cluster[0]: Source of event/interrupt in region 0, read access detected while corresponding subregion was enabled for watching */ + +/* Bit 31 : Subregion 31 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR31_Pos (31UL) /*!< Position of SR31 field. */ +#define MWU_PERREGION_SUBSTATRA_SR31_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR31_Pos) /*!< Bit mask of SR31 field. */ +#define MWU_PERREGION_SUBSTATRA_SR31_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR31_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 30 : Subregion 30 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR30_Pos (30UL) /*!< Position of SR30 field. */ +#define MWU_PERREGION_SUBSTATRA_SR30_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR30_Pos) /*!< Bit mask of SR30 field. */ +#define MWU_PERREGION_SUBSTATRA_SR30_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR30_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 29 : Subregion 29 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR29_Pos (29UL) /*!< Position of SR29 field. */ +#define MWU_PERREGION_SUBSTATRA_SR29_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR29_Pos) /*!< Bit mask of SR29 field. */ +#define MWU_PERREGION_SUBSTATRA_SR29_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR29_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 28 : Subregion 28 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR28_Pos (28UL) /*!< Position of SR28 field. */ +#define MWU_PERREGION_SUBSTATRA_SR28_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR28_Pos) /*!< Bit mask of SR28 field. */ +#define MWU_PERREGION_SUBSTATRA_SR28_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR28_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 27 : Subregion 27 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR27_Pos (27UL) /*!< Position of SR27 field. */ +#define MWU_PERREGION_SUBSTATRA_SR27_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR27_Pos) /*!< Bit mask of SR27 field. */ +#define MWU_PERREGION_SUBSTATRA_SR27_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR27_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 26 : Subregion 26 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR26_Pos (26UL) /*!< Position of SR26 field. */ +#define MWU_PERREGION_SUBSTATRA_SR26_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR26_Pos) /*!< Bit mask of SR26 field. */ +#define MWU_PERREGION_SUBSTATRA_SR26_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR26_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 25 : Subregion 25 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR25_Pos (25UL) /*!< Position of SR25 field. */ +#define MWU_PERREGION_SUBSTATRA_SR25_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR25_Pos) /*!< Bit mask of SR25 field. */ +#define MWU_PERREGION_SUBSTATRA_SR25_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR25_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 24 : Subregion 24 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR24_Pos (24UL) /*!< Position of SR24 field. */ +#define MWU_PERREGION_SUBSTATRA_SR24_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR24_Pos) /*!< Bit mask of SR24 field. */ +#define MWU_PERREGION_SUBSTATRA_SR24_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR24_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 23 : Subregion 23 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR23_Pos (23UL) /*!< Position of SR23 field. */ +#define MWU_PERREGION_SUBSTATRA_SR23_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR23_Pos) /*!< Bit mask of SR23 field. */ +#define MWU_PERREGION_SUBSTATRA_SR23_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR23_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 22 : Subregion 22 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR22_Pos (22UL) /*!< Position of SR22 field. */ +#define MWU_PERREGION_SUBSTATRA_SR22_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR22_Pos) /*!< Bit mask of SR22 field. */ +#define MWU_PERREGION_SUBSTATRA_SR22_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR22_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 21 : Subregion 21 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR21_Pos (21UL) /*!< Position of SR21 field. */ +#define MWU_PERREGION_SUBSTATRA_SR21_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR21_Pos) /*!< Bit mask of SR21 field. */ +#define MWU_PERREGION_SUBSTATRA_SR21_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR21_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 20 : Subregion 20 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR20_Pos (20UL) /*!< Position of SR20 field. */ +#define MWU_PERREGION_SUBSTATRA_SR20_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR20_Pos) /*!< Bit mask of SR20 field. */ +#define MWU_PERREGION_SUBSTATRA_SR20_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR20_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 19 : Subregion 19 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR19_Pos (19UL) /*!< Position of SR19 field. */ +#define MWU_PERREGION_SUBSTATRA_SR19_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR19_Pos) /*!< Bit mask of SR19 field. */ +#define MWU_PERREGION_SUBSTATRA_SR19_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR19_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 18 : Subregion 18 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR18_Pos (18UL) /*!< Position of SR18 field. */ +#define MWU_PERREGION_SUBSTATRA_SR18_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR18_Pos) /*!< Bit mask of SR18 field. */ +#define MWU_PERREGION_SUBSTATRA_SR18_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR18_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 17 : Subregion 17 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR17_Pos (17UL) /*!< Position of SR17 field. */ +#define MWU_PERREGION_SUBSTATRA_SR17_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR17_Pos) /*!< Bit mask of SR17 field. */ +#define MWU_PERREGION_SUBSTATRA_SR17_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR17_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 16 : Subregion 16 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR16_Pos (16UL) /*!< Position of SR16 field. */ +#define MWU_PERREGION_SUBSTATRA_SR16_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR16_Pos) /*!< Bit mask of SR16 field. */ +#define MWU_PERREGION_SUBSTATRA_SR16_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR16_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 15 : Subregion 15 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR15_Pos (15UL) /*!< Position of SR15 field. */ +#define MWU_PERREGION_SUBSTATRA_SR15_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR15_Pos) /*!< Bit mask of SR15 field. */ +#define MWU_PERREGION_SUBSTATRA_SR15_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR15_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 14 : Subregion 14 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR14_Pos (14UL) /*!< Position of SR14 field. */ +#define MWU_PERREGION_SUBSTATRA_SR14_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR14_Pos) /*!< Bit mask of SR14 field. */ +#define MWU_PERREGION_SUBSTATRA_SR14_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR14_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 13 : Subregion 13 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR13_Pos (13UL) /*!< Position of SR13 field. */ +#define MWU_PERREGION_SUBSTATRA_SR13_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR13_Pos) /*!< Bit mask of SR13 field. */ +#define MWU_PERREGION_SUBSTATRA_SR13_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR13_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 12 : Subregion 12 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR12_Pos (12UL) /*!< Position of SR12 field. */ +#define MWU_PERREGION_SUBSTATRA_SR12_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR12_Pos) /*!< Bit mask of SR12 field. */ +#define MWU_PERREGION_SUBSTATRA_SR12_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR12_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 11 : Subregion 11 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR11_Pos (11UL) /*!< Position of SR11 field. */ +#define MWU_PERREGION_SUBSTATRA_SR11_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR11_Pos) /*!< Bit mask of SR11 field. */ +#define MWU_PERREGION_SUBSTATRA_SR11_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR11_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 10 : Subregion 10 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR10_Pos (10UL) /*!< Position of SR10 field. */ +#define MWU_PERREGION_SUBSTATRA_SR10_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR10_Pos) /*!< Bit mask of SR10 field. */ +#define MWU_PERREGION_SUBSTATRA_SR10_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR10_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 9 : Subregion 9 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR9_Pos (9UL) /*!< Position of SR9 field. */ +#define MWU_PERREGION_SUBSTATRA_SR9_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR9_Pos) /*!< Bit mask of SR9 field. */ +#define MWU_PERREGION_SUBSTATRA_SR9_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR9_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 8 : Subregion 8 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR8_Pos (8UL) /*!< Position of SR8 field. */ +#define MWU_PERREGION_SUBSTATRA_SR8_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR8_Pos) /*!< Bit mask of SR8 field. */ +#define MWU_PERREGION_SUBSTATRA_SR8_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR8_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 7 : Subregion 7 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR7_Pos (7UL) /*!< Position of SR7 field. */ +#define MWU_PERREGION_SUBSTATRA_SR7_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR7_Pos) /*!< Bit mask of SR7 field. */ +#define MWU_PERREGION_SUBSTATRA_SR7_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR7_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 6 : Subregion 6 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR6_Pos (6UL) /*!< Position of SR6 field. */ +#define MWU_PERREGION_SUBSTATRA_SR6_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR6_Pos) /*!< Bit mask of SR6 field. */ +#define MWU_PERREGION_SUBSTATRA_SR6_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR6_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 5 : Subregion 5 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR5_Pos (5UL) /*!< Position of SR5 field. */ +#define MWU_PERREGION_SUBSTATRA_SR5_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR5_Pos) /*!< Bit mask of SR5 field. */ +#define MWU_PERREGION_SUBSTATRA_SR5_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR5_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 4 : Subregion 4 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR4_Pos (4UL) /*!< Position of SR4 field. */ +#define MWU_PERREGION_SUBSTATRA_SR4_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR4_Pos) /*!< Bit mask of SR4 field. */ +#define MWU_PERREGION_SUBSTATRA_SR4_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR4_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 3 : Subregion 3 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR3_Pos (3UL) /*!< Position of SR3 field. */ +#define MWU_PERREGION_SUBSTATRA_SR3_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR3_Pos) /*!< Bit mask of SR3 field. */ +#define MWU_PERREGION_SUBSTATRA_SR3_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR3_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 2 : Subregion 2 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR2_Pos (2UL) /*!< Position of SR2 field. */ +#define MWU_PERREGION_SUBSTATRA_SR2_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR2_Pos) /*!< Bit mask of SR2 field. */ +#define MWU_PERREGION_SUBSTATRA_SR2_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR2_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 1 : Subregion 1 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR1_Pos (1UL) /*!< Position of SR1 field. */ +#define MWU_PERREGION_SUBSTATRA_SR1_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR1_Pos) /*!< Bit mask of SR1 field. */ +#define MWU_PERREGION_SUBSTATRA_SR1_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR1_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Bit 0 : Subregion 0 in region 0 (write '1' to clear) */ +#define MWU_PERREGION_SUBSTATRA_SR0_Pos (0UL) /*!< Position of SR0 field. */ +#define MWU_PERREGION_SUBSTATRA_SR0_Msk (0x1UL << MWU_PERREGION_SUBSTATRA_SR0_Pos) /*!< Bit mask of SR0 field. */ +#define MWU_PERREGION_SUBSTATRA_SR0_NoAccess (0UL) /*!< No read access occurred in this subregion */ +#define MWU_PERREGION_SUBSTATRA_SR0_Access (1UL) /*!< Read access(es) occurred in this subregion */ + +/* Register: MWU_REGIONEN */ +/* Description: Enable/disable regions watch */ + +/* Bit 27 : Enable/disable read access watch in PREGION[1] */ +#define MWU_REGIONEN_PRGN1RA_Pos (27UL) /*!< Position of PRGN1RA field. */ +#define MWU_REGIONEN_PRGN1RA_Msk (0x1UL << MWU_REGIONEN_PRGN1RA_Pos) /*!< Bit mask of PRGN1RA field. */ +#define MWU_REGIONEN_PRGN1RA_Disable (0UL) /*!< Disable read access watch in this PREGION */ +#define MWU_REGIONEN_PRGN1RA_Enable (1UL) /*!< Enable read access watch in this PREGION */ + +/* Bit 26 : Enable/disable write access watch in PREGION[1] */ +#define MWU_REGIONEN_PRGN1WA_Pos (26UL) /*!< Position of PRGN1WA field. */ +#define MWU_REGIONEN_PRGN1WA_Msk (0x1UL << MWU_REGIONEN_PRGN1WA_Pos) /*!< Bit mask of PRGN1WA field. */ +#define MWU_REGIONEN_PRGN1WA_Disable (0UL) /*!< Disable write access watch in this PREGION */ +#define MWU_REGIONEN_PRGN1WA_Enable (1UL) /*!< Enable write access watch in this PREGION */ + +/* Bit 25 : Enable/disable read access watch in PREGION[0] */ +#define MWU_REGIONEN_PRGN0RA_Pos (25UL) /*!< Position of PRGN0RA field. */ +#define MWU_REGIONEN_PRGN0RA_Msk (0x1UL << MWU_REGIONEN_PRGN0RA_Pos) /*!< Bit mask of PRGN0RA field. */ +#define MWU_REGIONEN_PRGN0RA_Disable (0UL) /*!< Disable read access watch in this PREGION */ +#define MWU_REGIONEN_PRGN0RA_Enable (1UL) /*!< Enable read access watch in this PREGION */ + +/* Bit 24 : Enable/disable write access watch in PREGION[0] */ +#define MWU_REGIONEN_PRGN0WA_Pos (24UL) /*!< Position of PRGN0WA field. */ +#define MWU_REGIONEN_PRGN0WA_Msk (0x1UL << MWU_REGIONEN_PRGN0WA_Pos) /*!< Bit mask of PRGN0WA field. */ +#define MWU_REGIONEN_PRGN0WA_Disable (0UL) /*!< Disable write access watch in this PREGION */ +#define MWU_REGIONEN_PRGN0WA_Enable (1UL) /*!< Enable write access watch in this PREGION */ + +/* Bit 7 : Enable/disable read access watch in region[3] */ +#define MWU_REGIONEN_RGN3RA_Pos (7UL) /*!< Position of RGN3RA field. */ +#define MWU_REGIONEN_RGN3RA_Msk (0x1UL << MWU_REGIONEN_RGN3RA_Pos) /*!< Bit mask of RGN3RA field. */ +#define MWU_REGIONEN_RGN3RA_Disable (0UL) /*!< Disable read access watch in this region */ +#define MWU_REGIONEN_RGN3RA_Enable (1UL) /*!< Enable read access watch in this region */ + +/* Bit 6 : Enable/disable write access watch in region[3] */ +#define MWU_REGIONEN_RGN3WA_Pos (6UL) /*!< Position of RGN3WA field. */ +#define MWU_REGIONEN_RGN3WA_Msk (0x1UL << MWU_REGIONEN_RGN3WA_Pos) /*!< Bit mask of RGN3WA field. */ +#define MWU_REGIONEN_RGN3WA_Disable (0UL) /*!< Disable write access watch in this region */ +#define MWU_REGIONEN_RGN3WA_Enable (1UL) /*!< Enable write access watch in this region */ + +/* Bit 5 : Enable/disable read access watch in region[2] */ +#define MWU_REGIONEN_RGN2RA_Pos (5UL) /*!< Position of RGN2RA field. */ +#define MWU_REGIONEN_RGN2RA_Msk (0x1UL << MWU_REGIONEN_RGN2RA_Pos) /*!< Bit mask of RGN2RA field. */ +#define MWU_REGIONEN_RGN2RA_Disable (0UL) /*!< Disable read access watch in this region */ +#define MWU_REGIONEN_RGN2RA_Enable (1UL) /*!< Enable read access watch in this region */ + +/* Bit 4 : Enable/disable write access watch in region[2] */ +#define MWU_REGIONEN_RGN2WA_Pos (4UL) /*!< Position of RGN2WA field. */ +#define MWU_REGIONEN_RGN2WA_Msk (0x1UL << MWU_REGIONEN_RGN2WA_Pos) /*!< Bit mask of RGN2WA field. */ +#define MWU_REGIONEN_RGN2WA_Disable (0UL) /*!< Disable write access watch in this region */ +#define MWU_REGIONEN_RGN2WA_Enable (1UL) /*!< Enable write access watch in this region */ + +/* Bit 3 : Enable/disable read access watch in region[1] */ +#define MWU_REGIONEN_RGN1RA_Pos (3UL) /*!< Position of RGN1RA field. */ +#define MWU_REGIONEN_RGN1RA_Msk (0x1UL << MWU_REGIONEN_RGN1RA_Pos) /*!< Bit mask of RGN1RA field. */ +#define MWU_REGIONEN_RGN1RA_Disable (0UL) /*!< Disable read access watch in this region */ +#define MWU_REGIONEN_RGN1RA_Enable (1UL) /*!< Enable read access watch in this region */ + +/* Bit 2 : Enable/disable write access watch in region[1] */ +#define MWU_REGIONEN_RGN1WA_Pos (2UL) /*!< Position of RGN1WA field. */ +#define MWU_REGIONEN_RGN1WA_Msk (0x1UL << MWU_REGIONEN_RGN1WA_Pos) /*!< Bit mask of RGN1WA field. */ +#define MWU_REGIONEN_RGN1WA_Disable (0UL) /*!< Disable write access watch in this region */ +#define MWU_REGIONEN_RGN1WA_Enable (1UL) /*!< Enable write access watch in this region */ + +/* Bit 1 : Enable/disable read access watch in region[0] */ +#define MWU_REGIONEN_RGN0RA_Pos (1UL) /*!< Position of RGN0RA field. */ +#define MWU_REGIONEN_RGN0RA_Msk (0x1UL << MWU_REGIONEN_RGN0RA_Pos) /*!< Bit mask of RGN0RA field. */ +#define MWU_REGIONEN_RGN0RA_Disable (0UL) /*!< Disable read access watch in this region */ +#define MWU_REGIONEN_RGN0RA_Enable (1UL) /*!< Enable read access watch in this region */ + +/* Bit 0 : Enable/disable write access watch in region[0] */ +#define MWU_REGIONEN_RGN0WA_Pos (0UL) /*!< Position of RGN0WA field. */ +#define MWU_REGIONEN_RGN0WA_Msk (0x1UL << MWU_REGIONEN_RGN0WA_Pos) /*!< Bit mask of RGN0WA field. */ +#define MWU_REGIONEN_RGN0WA_Disable (0UL) /*!< Disable write access watch in this region */ +#define MWU_REGIONEN_RGN0WA_Enable (1UL) /*!< Enable write access watch in this region */ + +/* Register: MWU_REGIONENSET */ +/* Description: Enable regions watch */ + +/* Bit 27 : Enable read access watch in PREGION[1] */ +#define MWU_REGIONENSET_PRGN1RA_Pos (27UL) /*!< Position of PRGN1RA field. */ +#define MWU_REGIONENSET_PRGN1RA_Msk (0x1UL << MWU_REGIONENSET_PRGN1RA_Pos) /*!< Bit mask of PRGN1RA field. */ +#define MWU_REGIONENSET_PRGN1RA_Disabled (0UL) /*!< Read access watch in this PREGION is disabled */ +#define MWU_REGIONENSET_PRGN1RA_Enabled (1UL) /*!< Read access watch in this PREGION is enabled */ +#define MWU_REGIONENSET_PRGN1RA_Set (1UL) /*!< Enable read access watch in this PREGION */ + +/* Bit 26 : Enable write access watch in PREGION[1] */ +#define MWU_REGIONENSET_PRGN1WA_Pos (26UL) /*!< Position of PRGN1WA field. */ +#define MWU_REGIONENSET_PRGN1WA_Msk (0x1UL << MWU_REGIONENSET_PRGN1WA_Pos) /*!< Bit mask of PRGN1WA field. */ +#define MWU_REGIONENSET_PRGN1WA_Disabled (0UL) /*!< Write access watch in this PREGION is disabled */ +#define MWU_REGIONENSET_PRGN1WA_Enabled (1UL) /*!< Write access watch in this PREGION is enabled */ +#define MWU_REGIONENSET_PRGN1WA_Set (1UL) /*!< Enable write access watch in this PREGION */ + +/* Bit 25 : Enable read access watch in PREGION[0] */ +#define MWU_REGIONENSET_PRGN0RA_Pos (25UL) /*!< Position of PRGN0RA field. */ +#define MWU_REGIONENSET_PRGN0RA_Msk (0x1UL << MWU_REGIONENSET_PRGN0RA_Pos) /*!< Bit mask of PRGN0RA field. */ +#define MWU_REGIONENSET_PRGN0RA_Disabled (0UL) /*!< Read access watch in this PREGION is disabled */ +#define MWU_REGIONENSET_PRGN0RA_Enabled (1UL) /*!< Read access watch in this PREGION is enabled */ +#define MWU_REGIONENSET_PRGN0RA_Set (1UL) /*!< Enable read access watch in this PREGION */ + +/* Bit 24 : Enable write access watch in PREGION[0] */ +#define MWU_REGIONENSET_PRGN0WA_Pos (24UL) /*!< Position of PRGN0WA field. */ +#define MWU_REGIONENSET_PRGN0WA_Msk (0x1UL << MWU_REGIONENSET_PRGN0WA_Pos) /*!< Bit mask of PRGN0WA field. */ +#define MWU_REGIONENSET_PRGN0WA_Disabled (0UL) /*!< Write access watch in this PREGION is disabled */ +#define MWU_REGIONENSET_PRGN0WA_Enabled (1UL) /*!< Write access watch in this PREGION is enabled */ +#define MWU_REGIONENSET_PRGN0WA_Set (1UL) /*!< Enable write access watch in this PREGION */ + +/* Bit 7 : Enable read access watch in region[3] */ +#define MWU_REGIONENSET_RGN3RA_Pos (7UL) /*!< Position of RGN3RA field. */ +#define MWU_REGIONENSET_RGN3RA_Msk (0x1UL << MWU_REGIONENSET_RGN3RA_Pos) /*!< Bit mask of RGN3RA field. */ +#define MWU_REGIONENSET_RGN3RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ +#define MWU_REGIONENSET_RGN3RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ +#define MWU_REGIONENSET_RGN3RA_Set (1UL) /*!< Enable read access watch in this region */ + +/* Bit 6 : Enable write access watch in region[3] */ +#define MWU_REGIONENSET_RGN3WA_Pos (6UL) /*!< Position of RGN3WA field. */ +#define MWU_REGIONENSET_RGN3WA_Msk (0x1UL << MWU_REGIONENSET_RGN3WA_Pos) /*!< Bit mask of RGN3WA field. */ +#define MWU_REGIONENSET_RGN3WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ +#define MWU_REGIONENSET_RGN3WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ +#define MWU_REGIONENSET_RGN3WA_Set (1UL) /*!< Enable write access watch in this region */ + +/* Bit 5 : Enable read access watch in region[2] */ +#define MWU_REGIONENSET_RGN2RA_Pos (5UL) /*!< Position of RGN2RA field. */ +#define MWU_REGIONENSET_RGN2RA_Msk (0x1UL << MWU_REGIONENSET_RGN2RA_Pos) /*!< Bit mask of RGN2RA field. */ +#define MWU_REGIONENSET_RGN2RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ +#define MWU_REGIONENSET_RGN2RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ +#define MWU_REGIONENSET_RGN2RA_Set (1UL) /*!< Enable read access watch in this region */ + +/* Bit 4 : Enable write access watch in region[2] */ +#define MWU_REGIONENSET_RGN2WA_Pos (4UL) /*!< Position of RGN2WA field. */ +#define MWU_REGIONENSET_RGN2WA_Msk (0x1UL << MWU_REGIONENSET_RGN2WA_Pos) /*!< Bit mask of RGN2WA field. */ +#define MWU_REGIONENSET_RGN2WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ +#define MWU_REGIONENSET_RGN2WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ +#define MWU_REGIONENSET_RGN2WA_Set (1UL) /*!< Enable write access watch in this region */ + +/* Bit 3 : Enable read access watch in region[1] */ +#define MWU_REGIONENSET_RGN1RA_Pos (3UL) /*!< Position of RGN1RA field. */ +#define MWU_REGIONENSET_RGN1RA_Msk (0x1UL << MWU_REGIONENSET_RGN1RA_Pos) /*!< Bit mask of RGN1RA field. */ +#define MWU_REGIONENSET_RGN1RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ +#define MWU_REGIONENSET_RGN1RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ +#define MWU_REGIONENSET_RGN1RA_Set (1UL) /*!< Enable read access watch in this region */ + +/* Bit 2 : Enable write access watch in region[1] */ +#define MWU_REGIONENSET_RGN1WA_Pos (2UL) /*!< Position of RGN1WA field. */ +#define MWU_REGIONENSET_RGN1WA_Msk (0x1UL << MWU_REGIONENSET_RGN1WA_Pos) /*!< Bit mask of RGN1WA field. */ +#define MWU_REGIONENSET_RGN1WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ +#define MWU_REGIONENSET_RGN1WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ +#define MWU_REGIONENSET_RGN1WA_Set (1UL) /*!< Enable write access watch in this region */ + +/* Bit 1 : Enable read access watch in region[0] */ +#define MWU_REGIONENSET_RGN0RA_Pos (1UL) /*!< Position of RGN0RA field. */ +#define MWU_REGIONENSET_RGN0RA_Msk (0x1UL << MWU_REGIONENSET_RGN0RA_Pos) /*!< Bit mask of RGN0RA field. */ +#define MWU_REGIONENSET_RGN0RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ +#define MWU_REGIONENSET_RGN0RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ +#define MWU_REGIONENSET_RGN0RA_Set (1UL) /*!< Enable read access watch in this region */ + +/* Bit 0 : Enable write access watch in region[0] */ +#define MWU_REGIONENSET_RGN0WA_Pos (0UL) /*!< Position of RGN0WA field. */ +#define MWU_REGIONENSET_RGN0WA_Msk (0x1UL << MWU_REGIONENSET_RGN0WA_Pos) /*!< Bit mask of RGN0WA field. */ +#define MWU_REGIONENSET_RGN0WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ +#define MWU_REGIONENSET_RGN0WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ +#define MWU_REGIONENSET_RGN0WA_Set (1UL) /*!< Enable write access watch in this region */ + +/* Register: MWU_REGIONENCLR */ +/* Description: Disable regions watch */ + +/* Bit 27 : Disable read access watch in PREGION[1] */ +#define MWU_REGIONENCLR_PRGN1RA_Pos (27UL) /*!< Position of PRGN1RA field. */ +#define MWU_REGIONENCLR_PRGN1RA_Msk (0x1UL << MWU_REGIONENCLR_PRGN1RA_Pos) /*!< Bit mask of PRGN1RA field. */ +#define MWU_REGIONENCLR_PRGN1RA_Disabled (0UL) /*!< Read access watch in this PREGION is disabled */ +#define MWU_REGIONENCLR_PRGN1RA_Enabled (1UL) /*!< Read access watch in this PREGION is enabled */ +#define MWU_REGIONENCLR_PRGN1RA_Clear (1UL) /*!< Disable read access watch in this PREGION */ + +/* Bit 26 : Disable write access watch in PREGION[1] */ +#define MWU_REGIONENCLR_PRGN1WA_Pos (26UL) /*!< Position of PRGN1WA field. */ +#define MWU_REGIONENCLR_PRGN1WA_Msk (0x1UL << MWU_REGIONENCLR_PRGN1WA_Pos) /*!< Bit mask of PRGN1WA field. */ +#define MWU_REGIONENCLR_PRGN1WA_Disabled (0UL) /*!< Write access watch in this PREGION is disabled */ +#define MWU_REGIONENCLR_PRGN1WA_Enabled (1UL) /*!< Write access watch in this PREGION is enabled */ +#define MWU_REGIONENCLR_PRGN1WA_Clear (1UL) /*!< Disable write access watch in this PREGION */ + +/* Bit 25 : Disable read access watch in PREGION[0] */ +#define MWU_REGIONENCLR_PRGN0RA_Pos (25UL) /*!< Position of PRGN0RA field. */ +#define MWU_REGIONENCLR_PRGN0RA_Msk (0x1UL << MWU_REGIONENCLR_PRGN0RA_Pos) /*!< Bit mask of PRGN0RA field. */ +#define MWU_REGIONENCLR_PRGN0RA_Disabled (0UL) /*!< Read access watch in this PREGION is disabled */ +#define MWU_REGIONENCLR_PRGN0RA_Enabled (1UL) /*!< Read access watch in this PREGION is enabled */ +#define MWU_REGIONENCLR_PRGN0RA_Clear (1UL) /*!< Disable read access watch in this PREGION */ + +/* Bit 24 : Disable write access watch in PREGION[0] */ +#define MWU_REGIONENCLR_PRGN0WA_Pos (24UL) /*!< Position of PRGN0WA field. */ +#define MWU_REGIONENCLR_PRGN0WA_Msk (0x1UL << MWU_REGIONENCLR_PRGN0WA_Pos) /*!< Bit mask of PRGN0WA field. */ +#define MWU_REGIONENCLR_PRGN0WA_Disabled (0UL) /*!< Write access watch in this PREGION is disabled */ +#define MWU_REGIONENCLR_PRGN0WA_Enabled (1UL) /*!< Write access watch in this PREGION is enabled */ +#define MWU_REGIONENCLR_PRGN0WA_Clear (1UL) /*!< Disable write access watch in this PREGION */ + +/* Bit 7 : Disable read access watch in region[3] */ +#define MWU_REGIONENCLR_RGN3RA_Pos (7UL) /*!< Position of RGN3RA field. */ +#define MWU_REGIONENCLR_RGN3RA_Msk (0x1UL << MWU_REGIONENCLR_RGN3RA_Pos) /*!< Bit mask of RGN3RA field. */ +#define MWU_REGIONENCLR_RGN3RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ +#define MWU_REGIONENCLR_RGN3RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ +#define MWU_REGIONENCLR_RGN3RA_Clear (1UL) /*!< Disable read access watch in this region */ + +/* Bit 6 : Disable write access watch in region[3] */ +#define MWU_REGIONENCLR_RGN3WA_Pos (6UL) /*!< Position of RGN3WA field. */ +#define MWU_REGIONENCLR_RGN3WA_Msk (0x1UL << MWU_REGIONENCLR_RGN3WA_Pos) /*!< Bit mask of RGN3WA field. */ +#define MWU_REGIONENCLR_RGN3WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ +#define MWU_REGIONENCLR_RGN3WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ +#define MWU_REGIONENCLR_RGN3WA_Clear (1UL) /*!< Disable write access watch in this region */ + +/* Bit 5 : Disable read access watch in region[2] */ +#define MWU_REGIONENCLR_RGN2RA_Pos (5UL) /*!< Position of RGN2RA field. */ +#define MWU_REGIONENCLR_RGN2RA_Msk (0x1UL << MWU_REGIONENCLR_RGN2RA_Pos) /*!< Bit mask of RGN2RA field. */ +#define MWU_REGIONENCLR_RGN2RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ +#define MWU_REGIONENCLR_RGN2RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ +#define MWU_REGIONENCLR_RGN2RA_Clear (1UL) /*!< Disable read access watch in this region */ + +/* Bit 4 : Disable write access watch in region[2] */ +#define MWU_REGIONENCLR_RGN2WA_Pos (4UL) /*!< Position of RGN2WA field. */ +#define MWU_REGIONENCLR_RGN2WA_Msk (0x1UL << MWU_REGIONENCLR_RGN2WA_Pos) /*!< Bit mask of RGN2WA field. */ +#define MWU_REGIONENCLR_RGN2WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ +#define MWU_REGIONENCLR_RGN2WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ +#define MWU_REGIONENCLR_RGN2WA_Clear (1UL) /*!< Disable write access watch in this region */ + +/* Bit 3 : Disable read access watch in region[1] */ +#define MWU_REGIONENCLR_RGN1RA_Pos (3UL) /*!< Position of RGN1RA field. */ +#define MWU_REGIONENCLR_RGN1RA_Msk (0x1UL << MWU_REGIONENCLR_RGN1RA_Pos) /*!< Bit mask of RGN1RA field. */ +#define MWU_REGIONENCLR_RGN1RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ +#define MWU_REGIONENCLR_RGN1RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ +#define MWU_REGIONENCLR_RGN1RA_Clear (1UL) /*!< Disable read access watch in this region */ + +/* Bit 2 : Disable write access watch in region[1] */ +#define MWU_REGIONENCLR_RGN1WA_Pos (2UL) /*!< Position of RGN1WA field. */ +#define MWU_REGIONENCLR_RGN1WA_Msk (0x1UL << MWU_REGIONENCLR_RGN1WA_Pos) /*!< Bit mask of RGN1WA field. */ +#define MWU_REGIONENCLR_RGN1WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ +#define MWU_REGIONENCLR_RGN1WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ +#define MWU_REGIONENCLR_RGN1WA_Clear (1UL) /*!< Disable write access watch in this region */ + +/* Bit 1 : Disable read access watch in region[0] */ +#define MWU_REGIONENCLR_RGN0RA_Pos (1UL) /*!< Position of RGN0RA field. */ +#define MWU_REGIONENCLR_RGN0RA_Msk (0x1UL << MWU_REGIONENCLR_RGN0RA_Pos) /*!< Bit mask of RGN0RA field. */ +#define MWU_REGIONENCLR_RGN0RA_Disabled (0UL) /*!< Read access watch in this region is disabled */ +#define MWU_REGIONENCLR_RGN0RA_Enabled (1UL) /*!< Read access watch in this region is enabled */ +#define MWU_REGIONENCLR_RGN0RA_Clear (1UL) /*!< Disable read access watch in this region */ + +/* Bit 0 : Disable write access watch in region[0] */ +#define MWU_REGIONENCLR_RGN0WA_Pos (0UL) /*!< Position of RGN0WA field. */ +#define MWU_REGIONENCLR_RGN0WA_Msk (0x1UL << MWU_REGIONENCLR_RGN0WA_Pos) /*!< Bit mask of RGN0WA field. */ +#define MWU_REGIONENCLR_RGN0WA_Disabled (0UL) /*!< Write access watch in this region is disabled */ +#define MWU_REGIONENCLR_RGN0WA_Enabled (1UL) /*!< Write access watch in this region is enabled */ +#define MWU_REGIONENCLR_RGN0WA_Clear (1UL) /*!< Disable write access watch in this region */ + +/* Register: MWU_REGION_START */ +/* Description: Description cluster[0]: Start address for region 0 */ + +/* Bits 31..0 : Start address for region */ +#define MWU_REGION_START_START_Pos (0UL) /*!< Position of START field. */ +#define MWU_REGION_START_START_Msk (0xFFFFFFFFUL << MWU_REGION_START_START_Pos) /*!< Bit mask of START field. */ + +/* Register: MWU_REGION_END */ +/* Description: Description cluster[0]: End address of region 0 */ + +/* Bits 31..0 : End address of region. */ +#define MWU_REGION_END_END_Pos (0UL) /*!< Position of END field. */ +#define MWU_REGION_END_END_Msk (0xFFFFFFFFUL << MWU_REGION_END_END_Pos) /*!< Bit mask of END field. */ + +/* Register: MWU_PREGION_START */ +/* Description: Description cluster[0]: Reserved for future use */ + +/* Bits 31..0 : Reserved for future use */ +#define MWU_PREGION_START_START_Pos (0UL) /*!< Position of START field. */ +#define MWU_PREGION_START_START_Msk (0xFFFFFFFFUL << MWU_PREGION_START_START_Pos) /*!< Bit mask of START field. */ + +/* Register: MWU_PREGION_END */ +/* Description: Description cluster[0]: Reserved for future use */ + +/* Bits 31..0 : Reserved for future use */ +#define MWU_PREGION_END_END_Pos (0UL) /*!< Position of END field. */ +#define MWU_PREGION_END_END_Msk (0xFFFFFFFFUL << MWU_PREGION_END_END_Pos) /*!< Bit mask of END field. */ + +/* Register: MWU_PREGION_SUBS */ +/* Description: Description cluster[0]: Subregions of region 0 */ + +/* Bit 31 : Include or exclude subregion 31 in region */ +#define MWU_PREGION_SUBS_SR31_Pos (31UL) /*!< Position of SR31 field. */ +#define MWU_PREGION_SUBS_SR31_Msk (0x1UL << MWU_PREGION_SUBS_SR31_Pos) /*!< Bit mask of SR31 field. */ +#define MWU_PREGION_SUBS_SR31_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR31_Include (1UL) /*!< Include */ + +/* Bit 30 : Include or exclude subregion 30 in region */ +#define MWU_PREGION_SUBS_SR30_Pos (30UL) /*!< Position of SR30 field. */ +#define MWU_PREGION_SUBS_SR30_Msk (0x1UL << MWU_PREGION_SUBS_SR30_Pos) /*!< Bit mask of SR30 field. */ +#define MWU_PREGION_SUBS_SR30_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR30_Include (1UL) /*!< Include */ + +/* Bit 29 : Include or exclude subregion 29 in region */ +#define MWU_PREGION_SUBS_SR29_Pos (29UL) /*!< Position of SR29 field. */ +#define MWU_PREGION_SUBS_SR29_Msk (0x1UL << MWU_PREGION_SUBS_SR29_Pos) /*!< Bit mask of SR29 field. */ +#define MWU_PREGION_SUBS_SR29_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR29_Include (1UL) /*!< Include */ + +/* Bit 28 : Include or exclude subregion 28 in region */ +#define MWU_PREGION_SUBS_SR28_Pos (28UL) /*!< Position of SR28 field. */ +#define MWU_PREGION_SUBS_SR28_Msk (0x1UL << MWU_PREGION_SUBS_SR28_Pos) /*!< Bit mask of SR28 field. */ +#define MWU_PREGION_SUBS_SR28_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR28_Include (1UL) /*!< Include */ + +/* Bit 27 : Include or exclude subregion 27 in region */ +#define MWU_PREGION_SUBS_SR27_Pos (27UL) /*!< Position of SR27 field. */ +#define MWU_PREGION_SUBS_SR27_Msk (0x1UL << MWU_PREGION_SUBS_SR27_Pos) /*!< Bit mask of SR27 field. */ +#define MWU_PREGION_SUBS_SR27_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR27_Include (1UL) /*!< Include */ + +/* Bit 26 : Include or exclude subregion 26 in region */ +#define MWU_PREGION_SUBS_SR26_Pos (26UL) /*!< Position of SR26 field. */ +#define MWU_PREGION_SUBS_SR26_Msk (0x1UL << MWU_PREGION_SUBS_SR26_Pos) /*!< Bit mask of SR26 field. */ +#define MWU_PREGION_SUBS_SR26_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR26_Include (1UL) /*!< Include */ + +/* Bit 25 : Include or exclude subregion 25 in region */ +#define MWU_PREGION_SUBS_SR25_Pos (25UL) /*!< Position of SR25 field. */ +#define MWU_PREGION_SUBS_SR25_Msk (0x1UL << MWU_PREGION_SUBS_SR25_Pos) /*!< Bit mask of SR25 field. */ +#define MWU_PREGION_SUBS_SR25_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR25_Include (1UL) /*!< Include */ + +/* Bit 24 : Include or exclude subregion 24 in region */ +#define MWU_PREGION_SUBS_SR24_Pos (24UL) /*!< Position of SR24 field. */ +#define MWU_PREGION_SUBS_SR24_Msk (0x1UL << MWU_PREGION_SUBS_SR24_Pos) /*!< Bit mask of SR24 field. */ +#define MWU_PREGION_SUBS_SR24_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR24_Include (1UL) /*!< Include */ + +/* Bit 23 : Include or exclude subregion 23 in region */ +#define MWU_PREGION_SUBS_SR23_Pos (23UL) /*!< Position of SR23 field. */ +#define MWU_PREGION_SUBS_SR23_Msk (0x1UL << MWU_PREGION_SUBS_SR23_Pos) /*!< Bit mask of SR23 field. */ +#define MWU_PREGION_SUBS_SR23_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR23_Include (1UL) /*!< Include */ + +/* Bit 22 : Include or exclude subregion 22 in region */ +#define MWU_PREGION_SUBS_SR22_Pos (22UL) /*!< Position of SR22 field. */ +#define MWU_PREGION_SUBS_SR22_Msk (0x1UL << MWU_PREGION_SUBS_SR22_Pos) /*!< Bit mask of SR22 field. */ +#define MWU_PREGION_SUBS_SR22_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR22_Include (1UL) /*!< Include */ + +/* Bit 21 : Include or exclude subregion 21 in region */ +#define MWU_PREGION_SUBS_SR21_Pos (21UL) /*!< Position of SR21 field. */ +#define MWU_PREGION_SUBS_SR21_Msk (0x1UL << MWU_PREGION_SUBS_SR21_Pos) /*!< Bit mask of SR21 field. */ +#define MWU_PREGION_SUBS_SR21_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR21_Include (1UL) /*!< Include */ + +/* Bit 20 : Include or exclude subregion 20 in region */ +#define MWU_PREGION_SUBS_SR20_Pos (20UL) /*!< Position of SR20 field. */ +#define MWU_PREGION_SUBS_SR20_Msk (0x1UL << MWU_PREGION_SUBS_SR20_Pos) /*!< Bit mask of SR20 field. */ +#define MWU_PREGION_SUBS_SR20_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR20_Include (1UL) /*!< Include */ + +/* Bit 19 : Include or exclude subregion 19 in region */ +#define MWU_PREGION_SUBS_SR19_Pos (19UL) /*!< Position of SR19 field. */ +#define MWU_PREGION_SUBS_SR19_Msk (0x1UL << MWU_PREGION_SUBS_SR19_Pos) /*!< Bit mask of SR19 field. */ +#define MWU_PREGION_SUBS_SR19_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR19_Include (1UL) /*!< Include */ + +/* Bit 18 : Include or exclude subregion 18 in region */ +#define MWU_PREGION_SUBS_SR18_Pos (18UL) /*!< Position of SR18 field. */ +#define MWU_PREGION_SUBS_SR18_Msk (0x1UL << MWU_PREGION_SUBS_SR18_Pos) /*!< Bit mask of SR18 field. */ +#define MWU_PREGION_SUBS_SR18_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR18_Include (1UL) /*!< Include */ + +/* Bit 17 : Include or exclude subregion 17 in region */ +#define MWU_PREGION_SUBS_SR17_Pos (17UL) /*!< Position of SR17 field. */ +#define MWU_PREGION_SUBS_SR17_Msk (0x1UL << MWU_PREGION_SUBS_SR17_Pos) /*!< Bit mask of SR17 field. */ +#define MWU_PREGION_SUBS_SR17_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR17_Include (1UL) /*!< Include */ + +/* Bit 16 : Include or exclude subregion 16 in region */ +#define MWU_PREGION_SUBS_SR16_Pos (16UL) /*!< Position of SR16 field. */ +#define MWU_PREGION_SUBS_SR16_Msk (0x1UL << MWU_PREGION_SUBS_SR16_Pos) /*!< Bit mask of SR16 field. */ +#define MWU_PREGION_SUBS_SR16_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR16_Include (1UL) /*!< Include */ + +/* Bit 15 : Include or exclude subregion 15 in region */ +#define MWU_PREGION_SUBS_SR15_Pos (15UL) /*!< Position of SR15 field. */ +#define MWU_PREGION_SUBS_SR15_Msk (0x1UL << MWU_PREGION_SUBS_SR15_Pos) /*!< Bit mask of SR15 field. */ +#define MWU_PREGION_SUBS_SR15_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR15_Include (1UL) /*!< Include */ + +/* Bit 14 : Include or exclude subregion 14 in region */ +#define MWU_PREGION_SUBS_SR14_Pos (14UL) /*!< Position of SR14 field. */ +#define MWU_PREGION_SUBS_SR14_Msk (0x1UL << MWU_PREGION_SUBS_SR14_Pos) /*!< Bit mask of SR14 field. */ +#define MWU_PREGION_SUBS_SR14_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR14_Include (1UL) /*!< Include */ + +/* Bit 13 : Include or exclude subregion 13 in region */ +#define MWU_PREGION_SUBS_SR13_Pos (13UL) /*!< Position of SR13 field. */ +#define MWU_PREGION_SUBS_SR13_Msk (0x1UL << MWU_PREGION_SUBS_SR13_Pos) /*!< Bit mask of SR13 field. */ +#define MWU_PREGION_SUBS_SR13_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR13_Include (1UL) /*!< Include */ + +/* Bit 12 : Include or exclude subregion 12 in region */ +#define MWU_PREGION_SUBS_SR12_Pos (12UL) /*!< Position of SR12 field. */ +#define MWU_PREGION_SUBS_SR12_Msk (0x1UL << MWU_PREGION_SUBS_SR12_Pos) /*!< Bit mask of SR12 field. */ +#define MWU_PREGION_SUBS_SR12_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR12_Include (1UL) /*!< Include */ + +/* Bit 11 : Include or exclude subregion 11 in region */ +#define MWU_PREGION_SUBS_SR11_Pos (11UL) /*!< Position of SR11 field. */ +#define MWU_PREGION_SUBS_SR11_Msk (0x1UL << MWU_PREGION_SUBS_SR11_Pos) /*!< Bit mask of SR11 field. */ +#define MWU_PREGION_SUBS_SR11_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR11_Include (1UL) /*!< Include */ + +/* Bit 10 : Include or exclude subregion 10 in region */ +#define MWU_PREGION_SUBS_SR10_Pos (10UL) /*!< Position of SR10 field. */ +#define MWU_PREGION_SUBS_SR10_Msk (0x1UL << MWU_PREGION_SUBS_SR10_Pos) /*!< Bit mask of SR10 field. */ +#define MWU_PREGION_SUBS_SR10_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR10_Include (1UL) /*!< Include */ + +/* Bit 9 : Include or exclude subregion 9 in region */ +#define MWU_PREGION_SUBS_SR9_Pos (9UL) /*!< Position of SR9 field. */ +#define MWU_PREGION_SUBS_SR9_Msk (0x1UL << MWU_PREGION_SUBS_SR9_Pos) /*!< Bit mask of SR9 field. */ +#define MWU_PREGION_SUBS_SR9_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR9_Include (1UL) /*!< Include */ + +/* Bit 8 : Include or exclude subregion 8 in region */ +#define MWU_PREGION_SUBS_SR8_Pos (8UL) /*!< Position of SR8 field. */ +#define MWU_PREGION_SUBS_SR8_Msk (0x1UL << MWU_PREGION_SUBS_SR8_Pos) /*!< Bit mask of SR8 field. */ +#define MWU_PREGION_SUBS_SR8_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR8_Include (1UL) /*!< Include */ + +/* Bit 7 : Include or exclude subregion 7 in region */ +#define MWU_PREGION_SUBS_SR7_Pos (7UL) /*!< Position of SR7 field. */ +#define MWU_PREGION_SUBS_SR7_Msk (0x1UL << MWU_PREGION_SUBS_SR7_Pos) /*!< Bit mask of SR7 field. */ +#define MWU_PREGION_SUBS_SR7_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR7_Include (1UL) /*!< Include */ + +/* Bit 6 : Include or exclude subregion 6 in region */ +#define MWU_PREGION_SUBS_SR6_Pos (6UL) /*!< Position of SR6 field. */ +#define MWU_PREGION_SUBS_SR6_Msk (0x1UL << MWU_PREGION_SUBS_SR6_Pos) /*!< Bit mask of SR6 field. */ +#define MWU_PREGION_SUBS_SR6_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR6_Include (1UL) /*!< Include */ + +/* Bit 5 : Include or exclude subregion 5 in region */ +#define MWU_PREGION_SUBS_SR5_Pos (5UL) /*!< Position of SR5 field. */ +#define MWU_PREGION_SUBS_SR5_Msk (0x1UL << MWU_PREGION_SUBS_SR5_Pos) /*!< Bit mask of SR5 field. */ +#define MWU_PREGION_SUBS_SR5_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR5_Include (1UL) /*!< Include */ + +/* Bit 4 : Include or exclude subregion 4 in region */ +#define MWU_PREGION_SUBS_SR4_Pos (4UL) /*!< Position of SR4 field. */ +#define MWU_PREGION_SUBS_SR4_Msk (0x1UL << MWU_PREGION_SUBS_SR4_Pos) /*!< Bit mask of SR4 field. */ +#define MWU_PREGION_SUBS_SR4_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR4_Include (1UL) /*!< Include */ + +/* Bit 3 : Include or exclude subregion 3 in region */ +#define MWU_PREGION_SUBS_SR3_Pos (3UL) /*!< Position of SR3 field. */ +#define MWU_PREGION_SUBS_SR3_Msk (0x1UL << MWU_PREGION_SUBS_SR3_Pos) /*!< Bit mask of SR3 field. */ +#define MWU_PREGION_SUBS_SR3_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR3_Include (1UL) /*!< Include */ + +/* Bit 2 : Include or exclude subregion 2 in region */ +#define MWU_PREGION_SUBS_SR2_Pos (2UL) /*!< Position of SR2 field. */ +#define MWU_PREGION_SUBS_SR2_Msk (0x1UL << MWU_PREGION_SUBS_SR2_Pos) /*!< Bit mask of SR2 field. */ +#define MWU_PREGION_SUBS_SR2_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR2_Include (1UL) /*!< Include */ + +/* Bit 1 : Include or exclude subregion 1 in region */ +#define MWU_PREGION_SUBS_SR1_Pos (1UL) /*!< Position of SR1 field. */ +#define MWU_PREGION_SUBS_SR1_Msk (0x1UL << MWU_PREGION_SUBS_SR1_Pos) /*!< Bit mask of SR1 field. */ +#define MWU_PREGION_SUBS_SR1_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR1_Include (1UL) /*!< Include */ + +/* Bit 0 : Include or exclude subregion 0 in region */ +#define MWU_PREGION_SUBS_SR0_Pos (0UL) /*!< Position of SR0 field. */ +#define MWU_PREGION_SUBS_SR0_Msk (0x1UL << MWU_PREGION_SUBS_SR0_Pos) /*!< Bit mask of SR0 field. */ +#define MWU_PREGION_SUBS_SR0_Exclude (0UL) /*!< Exclude */ +#define MWU_PREGION_SUBS_SR0_Include (1UL) /*!< Include */ + + +/* Peripheral: NFCT */ +/* Description: NFC-A compatible radio */ + +/* Register: NFCT_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 1 : Shortcut between FIELDLOST event and SENSE task */ +#define NFCT_SHORTS_FIELDLOST_SENSE_Pos (1UL) /*!< Position of FIELDLOST_SENSE field. */ +#define NFCT_SHORTS_FIELDLOST_SENSE_Msk (0x1UL << NFCT_SHORTS_FIELDLOST_SENSE_Pos) /*!< Bit mask of FIELDLOST_SENSE field. */ +#define NFCT_SHORTS_FIELDLOST_SENSE_Disabled (0UL) /*!< Disable shortcut */ +#define NFCT_SHORTS_FIELDLOST_SENSE_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 0 : Shortcut between FIELDDETECTED event and ACTIVATE task */ +#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Pos (0UL) /*!< Position of FIELDDETECTED_ACTIVATE field. */ +#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Msk (0x1UL << NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Pos) /*!< Bit mask of FIELDDETECTED_ACTIVATE field. */ +#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Disabled (0UL) /*!< Disable shortcut */ +#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: NFCT_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 20 : Enable or disable interrupt for STARTED event */ +#define NFCT_INTEN_STARTED_Pos (20UL) /*!< Position of STARTED field. */ +#define NFCT_INTEN_STARTED_Msk (0x1UL << NFCT_INTEN_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define NFCT_INTEN_STARTED_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_STARTED_Enabled (1UL) /*!< Enable */ + +/* Bit 19 : Enable or disable interrupt for SELECTED event */ +#define NFCT_INTEN_SELECTED_Pos (19UL) /*!< Position of SELECTED field. */ +#define NFCT_INTEN_SELECTED_Msk (0x1UL << NFCT_INTEN_SELECTED_Pos) /*!< Bit mask of SELECTED field. */ +#define NFCT_INTEN_SELECTED_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_SELECTED_Enabled (1UL) /*!< Enable */ + +/* Bit 18 : Enable or disable interrupt for COLLISION event */ +#define NFCT_INTEN_COLLISION_Pos (18UL) /*!< Position of COLLISION field. */ +#define NFCT_INTEN_COLLISION_Msk (0x1UL << NFCT_INTEN_COLLISION_Pos) /*!< Bit mask of COLLISION field. */ +#define NFCT_INTEN_COLLISION_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_COLLISION_Enabled (1UL) /*!< Enable */ + +/* Bit 14 : Enable or disable interrupt for AUTOCOLRESSTARTED event */ +#define NFCT_INTEN_AUTOCOLRESSTARTED_Pos (14UL) /*!< Position of AUTOCOLRESSTARTED field. */ +#define NFCT_INTEN_AUTOCOLRESSTARTED_Msk (0x1UL << NFCT_INTEN_AUTOCOLRESSTARTED_Pos) /*!< Bit mask of AUTOCOLRESSTARTED field. */ +#define NFCT_INTEN_AUTOCOLRESSTARTED_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_AUTOCOLRESSTARTED_Enabled (1UL) /*!< Enable */ + +/* Bit 12 : Enable or disable interrupt for ENDTX event */ +#define NFCT_INTEN_ENDTX_Pos (12UL) /*!< Position of ENDTX field. */ +#define NFCT_INTEN_ENDTX_Msk (0x1UL << NFCT_INTEN_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ +#define NFCT_INTEN_ENDTX_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_ENDTX_Enabled (1UL) /*!< Enable */ + +/* Bit 11 : Enable or disable interrupt for ENDRX event */ +#define NFCT_INTEN_ENDRX_Pos (11UL) /*!< Position of ENDRX field. */ +#define NFCT_INTEN_ENDRX_Msk (0x1UL << NFCT_INTEN_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define NFCT_INTEN_ENDRX_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_ENDRX_Enabled (1UL) /*!< Enable */ + +/* Bit 10 : Enable or disable interrupt for RXERROR event */ +#define NFCT_INTEN_RXERROR_Pos (10UL) /*!< Position of RXERROR field. */ +#define NFCT_INTEN_RXERROR_Msk (0x1UL << NFCT_INTEN_RXERROR_Pos) /*!< Bit mask of RXERROR field. */ +#define NFCT_INTEN_RXERROR_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_RXERROR_Enabled (1UL) /*!< Enable */ + +/* Bit 7 : Enable or disable interrupt for ERROR event */ +#define NFCT_INTEN_ERROR_Pos (7UL) /*!< Position of ERROR field. */ +#define NFCT_INTEN_ERROR_Msk (0x1UL << NFCT_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define NFCT_INTEN_ERROR_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_ERROR_Enabled (1UL) /*!< Enable */ + +/* Bit 6 : Enable or disable interrupt for RXFRAMEEND event */ +#define NFCT_INTEN_RXFRAMEEND_Pos (6UL) /*!< Position of RXFRAMEEND field. */ +#define NFCT_INTEN_RXFRAMEEND_Msk (0x1UL << NFCT_INTEN_RXFRAMEEND_Pos) /*!< Bit mask of RXFRAMEEND field. */ +#define NFCT_INTEN_RXFRAMEEND_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_RXFRAMEEND_Enabled (1UL) /*!< Enable */ + +/* Bit 5 : Enable or disable interrupt for RXFRAMESTART event */ +#define NFCT_INTEN_RXFRAMESTART_Pos (5UL) /*!< Position of RXFRAMESTART field. */ +#define NFCT_INTEN_RXFRAMESTART_Msk (0x1UL << NFCT_INTEN_RXFRAMESTART_Pos) /*!< Bit mask of RXFRAMESTART field. */ +#define NFCT_INTEN_RXFRAMESTART_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_RXFRAMESTART_Enabled (1UL) /*!< Enable */ + +/* Bit 4 : Enable or disable interrupt for TXFRAMEEND event */ +#define NFCT_INTEN_TXFRAMEEND_Pos (4UL) /*!< Position of TXFRAMEEND field. */ +#define NFCT_INTEN_TXFRAMEEND_Msk (0x1UL << NFCT_INTEN_TXFRAMEEND_Pos) /*!< Bit mask of TXFRAMEEND field. */ +#define NFCT_INTEN_TXFRAMEEND_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_TXFRAMEEND_Enabled (1UL) /*!< Enable */ + +/* Bit 3 : Enable or disable interrupt for TXFRAMESTART event */ +#define NFCT_INTEN_TXFRAMESTART_Pos (3UL) /*!< Position of TXFRAMESTART field. */ +#define NFCT_INTEN_TXFRAMESTART_Msk (0x1UL << NFCT_INTEN_TXFRAMESTART_Pos) /*!< Bit mask of TXFRAMESTART field. */ +#define NFCT_INTEN_TXFRAMESTART_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_TXFRAMESTART_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable interrupt for FIELDLOST event */ +#define NFCT_INTEN_FIELDLOST_Pos (2UL) /*!< Position of FIELDLOST field. */ +#define NFCT_INTEN_FIELDLOST_Msk (0x1UL << NFCT_INTEN_FIELDLOST_Pos) /*!< Bit mask of FIELDLOST field. */ +#define NFCT_INTEN_FIELDLOST_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_FIELDLOST_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for FIELDDETECTED event */ +#define NFCT_INTEN_FIELDDETECTED_Pos (1UL) /*!< Position of FIELDDETECTED field. */ +#define NFCT_INTEN_FIELDDETECTED_Msk (0x1UL << NFCT_INTEN_FIELDDETECTED_Pos) /*!< Bit mask of FIELDDETECTED field. */ +#define NFCT_INTEN_FIELDDETECTED_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_FIELDDETECTED_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable interrupt for READY event */ +#define NFCT_INTEN_READY_Pos (0UL) /*!< Position of READY field. */ +#define NFCT_INTEN_READY_Msk (0x1UL << NFCT_INTEN_READY_Pos) /*!< Bit mask of READY field. */ +#define NFCT_INTEN_READY_Disabled (0UL) /*!< Disable */ +#define NFCT_INTEN_READY_Enabled (1UL) /*!< Enable */ + +/* Register: NFCT_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 20 : Write '1' to Enable interrupt for STARTED event */ +#define NFCT_INTENSET_STARTED_Pos (20UL) /*!< Position of STARTED field. */ +#define NFCT_INTENSET_STARTED_Msk (0x1UL << NFCT_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define NFCT_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_STARTED_Set (1UL) /*!< Enable */ + +/* Bit 19 : Write '1' to Enable interrupt for SELECTED event */ +#define NFCT_INTENSET_SELECTED_Pos (19UL) /*!< Position of SELECTED field. */ +#define NFCT_INTENSET_SELECTED_Msk (0x1UL << NFCT_INTENSET_SELECTED_Pos) /*!< Bit mask of SELECTED field. */ +#define NFCT_INTENSET_SELECTED_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_SELECTED_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_SELECTED_Set (1UL) /*!< Enable */ + +/* Bit 18 : Write '1' to Enable interrupt for COLLISION event */ +#define NFCT_INTENSET_COLLISION_Pos (18UL) /*!< Position of COLLISION field. */ +#define NFCT_INTENSET_COLLISION_Msk (0x1UL << NFCT_INTENSET_COLLISION_Pos) /*!< Bit mask of COLLISION field. */ +#define NFCT_INTENSET_COLLISION_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_COLLISION_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_COLLISION_Set (1UL) /*!< Enable */ + +/* Bit 14 : Write '1' to Enable interrupt for AUTOCOLRESSTARTED event */ +#define NFCT_INTENSET_AUTOCOLRESSTARTED_Pos (14UL) /*!< Position of AUTOCOLRESSTARTED field. */ +#define NFCT_INTENSET_AUTOCOLRESSTARTED_Msk (0x1UL << NFCT_INTENSET_AUTOCOLRESSTARTED_Pos) /*!< Bit mask of AUTOCOLRESSTARTED field. */ +#define NFCT_INTENSET_AUTOCOLRESSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_AUTOCOLRESSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_AUTOCOLRESSTARTED_Set (1UL) /*!< Enable */ + +/* Bit 12 : Write '1' to Enable interrupt for ENDTX event */ +#define NFCT_INTENSET_ENDTX_Pos (12UL) /*!< Position of ENDTX field. */ +#define NFCT_INTENSET_ENDTX_Msk (0x1UL << NFCT_INTENSET_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ +#define NFCT_INTENSET_ENDTX_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_ENDTX_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_ENDTX_Set (1UL) /*!< Enable */ + +/* Bit 11 : Write '1' to Enable interrupt for ENDRX event */ +#define NFCT_INTENSET_ENDRX_Pos (11UL) /*!< Position of ENDRX field. */ +#define NFCT_INTENSET_ENDRX_Msk (0x1UL << NFCT_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define NFCT_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_ENDRX_Set (1UL) /*!< Enable */ + +/* Bit 10 : Write '1' to Enable interrupt for RXERROR event */ +#define NFCT_INTENSET_RXERROR_Pos (10UL) /*!< Position of RXERROR field. */ +#define NFCT_INTENSET_RXERROR_Msk (0x1UL << NFCT_INTENSET_RXERROR_Pos) /*!< Bit mask of RXERROR field. */ +#define NFCT_INTENSET_RXERROR_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_RXERROR_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_RXERROR_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to Enable interrupt for ERROR event */ +#define NFCT_INTENSET_ERROR_Pos (7UL) /*!< Position of ERROR field. */ +#define NFCT_INTENSET_ERROR_Msk (0x1UL << NFCT_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define NFCT_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_ERROR_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to Enable interrupt for RXFRAMEEND event */ +#define NFCT_INTENSET_RXFRAMEEND_Pos (6UL) /*!< Position of RXFRAMEEND field. */ +#define NFCT_INTENSET_RXFRAMEEND_Msk (0x1UL << NFCT_INTENSET_RXFRAMEEND_Pos) /*!< Bit mask of RXFRAMEEND field. */ +#define NFCT_INTENSET_RXFRAMEEND_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_RXFRAMEEND_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_RXFRAMEEND_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to Enable interrupt for RXFRAMESTART event */ +#define NFCT_INTENSET_RXFRAMESTART_Pos (5UL) /*!< Position of RXFRAMESTART field. */ +#define NFCT_INTENSET_RXFRAMESTART_Msk (0x1UL << NFCT_INTENSET_RXFRAMESTART_Pos) /*!< Bit mask of RXFRAMESTART field. */ +#define NFCT_INTENSET_RXFRAMESTART_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_RXFRAMESTART_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_RXFRAMESTART_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to Enable interrupt for TXFRAMEEND event */ +#define NFCT_INTENSET_TXFRAMEEND_Pos (4UL) /*!< Position of TXFRAMEEND field. */ +#define NFCT_INTENSET_TXFRAMEEND_Msk (0x1UL << NFCT_INTENSET_TXFRAMEEND_Pos) /*!< Bit mask of TXFRAMEEND field. */ +#define NFCT_INTENSET_TXFRAMEEND_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_TXFRAMEEND_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_TXFRAMEEND_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to Enable interrupt for TXFRAMESTART event */ +#define NFCT_INTENSET_TXFRAMESTART_Pos (3UL) /*!< Position of TXFRAMESTART field. */ +#define NFCT_INTENSET_TXFRAMESTART_Msk (0x1UL << NFCT_INTENSET_TXFRAMESTART_Pos) /*!< Bit mask of TXFRAMESTART field. */ +#define NFCT_INTENSET_TXFRAMESTART_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_TXFRAMESTART_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_TXFRAMESTART_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable interrupt for FIELDLOST event */ +#define NFCT_INTENSET_FIELDLOST_Pos (2UL) /*!< Position of FIELDLOST field. */ +#define NFCT_INTENSET_FIELDLOST_Msk (0x1UL << NFCT_INTENSET_FIELDLOST_Pos) /*!< Bit mask of FIELDLOST field. */ +#define NFCT_INTENSET_FIELDLOST_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_FIELDLOST_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_FIELDLOST_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for FIELDDETECTED event */ +#define NFCT_INTENSET_FIELDDETECTED_Pos (1UL) /*!< Position of FIELDDETECTED field. */ +#define NFCT_INTENSET_FIELDDETECTED_Msk (0x1UL << NFCT_INTENSET_FIELDDETECTED_Pos) /*!< Bit mask of FIELDDETECTED field. */ +#define NFCT_INTENSET_FIELDDETECTED_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_FIELDDETECTED_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_FIELDDETECTED_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for READY event */ +#define NFCT_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */ +#define NFCT_INTENSET_READY_Msk (0x1UL << NFCT_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ +#define NFCT_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENSET_READY_Set (1UL) /*!< Enable */ + +/* Register: NFCT_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 20 : Write '1' to Disable interrupt for STARTED event */ +#define NFCT_INTENCLR_STARTED_Pos (20UL) /*!< Position of STARTED field. */ +#define NFCT_INTENCLR_STARTED_Msk (0x1UL << NFCT_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define NFCT_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_STARTED_Clear (1UL) /*!< Disable */ + +/* Bit 19 : Write '1' to Disable interrupt for SELECTED event */ +#define NFCT_INTENCLR_SELECTED_Pos (19UL) /*!< Position of SELECTED field. */ +#define NFCT_INTENCLR_SELECTED_Msk (0x1UL << NFCT_INTENCLR_SELECTED_Pos) /*!< Bit mask of SELECTED field. */ +#define NFCT_INTENCLR_SELECTED_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_SELECTED_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_SELECTED_Clear (1UL) /*!< Disable */ + +/* Bit 18 : Write '1' to Disable interrupt for COLLISION event */ +#define NFCT_INTENCLR_COLLISION_Pos (18UL) /*!< Position of COLLISION field. */ +#define NFCT_INTENCLR_COLLISION_Msk (0x1UL << NFCT_INTENCLR_COLLISION_Pos) /*!< Bit mask of COLLISION field. */ +#define NFCT_INTENCLR_COLLISION_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_COLLISION_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_COLLISION_Clear (1UL) /*!< Disable */ + +/* Bit 14 : Write '1' to Disable interrupt for AUTOCOLRESSTARTED event */ +#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Pos (14UL) /*!< Position of AUTOCOLRESSTARTED field. */ +#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Msk (0x1UL << NFCT_INTENCLR_AUTOCOLRESSTARTED_Pos) /*!< Bit mask of AUTOCOLRESSTARTED field. */ +#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Clear (1UL) /*!< Disable */ + +/* Bit 12 : Write '1' to Disable interrupt for ENDTX event */ +#define NFCT_INTENCLR_ENDTX_Pos (12UL) /*!< Position of ENDTX field. */ +#define NFCT_INTENCLR_ENDTX_Msk (0x1UL << NFCT_INTENCLR_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ +#define NFCT_INTENCLR_ENDTX_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_ENDTX_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_ENDTX_Clear (1UL) /*!< Disable */ + +/* Bit 11 : Write '1' to Disable interrupt for ENDRX event */ +#define NFCT_INTENCLR_ENDRX_Pos (11UL) /*!< Position of ENDRX field. */ +#define NFCT_INTENCLR_ENDRX_Msk (0x1UL << NFCT_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define NFCT_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */ + +/* Bit 10 : Write '1' to Disable interrupt for RXERROR event */ +#define NFCT_INTENCLR_RXERROR_Pos (10UL) /*!< Position of RXERROR field. */ +#define NFCT_INTENCLR_RXERROR_Msk (0x1UL << NFCT_INTENCLR_RXERROR_Pos) /*!< Bit mask of RXERROR field. */ +#define NFCT_INTENCLR_RXERROR_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_RXERROR_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_RXERROR_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to Disable interrupt for ERROR event */ +#define NFCT_INTENCLR_ERROR_Pos (7UL) /*!< Position of ERROR field. */ +#define NFCT_INTENCLR_ERROR_Msk (0x1UL << NFCT_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define NFCT_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to Disable interrupt for RXFRAMEEND event */ +#define NFCT_INTENCLR_RXFRAMEEND_Pos (6UL) /*!< Position of RXFRAMEEND field. */ +#define NFCT_INTENCLR_RXFRAMEEND_Msk (0x1UL << NFCT_INTENCLR_RXFRAMEEND_Pos) /*!< Bit mask of RXFRAMEEND field. */ +#define NFCT_INTENCLR_RXFRAMEEND_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_RXFRAMEEND_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_RXFRAMEEND_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to Disable interrupt for RXFRAMESTART event */ +#define NFCT_INTENCLR_RXFRAMESTART_Pos (5UL) /*!< Position of RXFRAMESTART field. */ +#define NFCT_INTENCLR_RXFRAMESTART_Msk (0x1UL << NFCT_INTENCLR_RXFRAMESTART_Pos) /*!< Bit mask of RXFRAMESTART field. */ +#define NFCT_INTENCLR_RXFRAMESTART_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_RXFRAMESTART_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_RXFRAMESTART_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to Disable interrupt for TXFRAMEEND event */ +#define NFCT_INTENCLR_TXFRAMEEND_Pos (4UL) /*!< Position of TXFRAMEEND field. */ +#define NFCT_INTENCLR_TXFRAMEEND_Msk (0x1UL << NFCT_INTENCLR_TXFRAMEEND_Pos) /*!< Bit mask of TXFRAMEEND field. */ +#define NFCT_INTENCLR_TXFRAMEEND_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_TXFRAMEEND_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_TXFRAMEEND_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to Disable interrupt for TXFRAMESTART event */ +#define NFCT_INTENCLR_TXFRAMESTART_Pos (3UL) /*!< Position of TXFRAMESTART field. */ +#define NFCT_INTENCLR_TXFRAMESTART_Msk (0x1UL << NFCT_INTENCLR_TXFRAMESTART_Pos) /*!< Bit mask of TXFRAMESTART field. */ +#define NFCT_INTENCLR_TXFRAMESTART_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_TXFRAMESTART_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_TXFRAMESTART_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable interrupt for FIELDLOST event */ +#define NFCT_INTENCLR_FIELDLOST_Pos (2UL) /*!< Position of FIELDLOST field. */ +#define NFCT_INTENCLR_FIELDLOST_Msk (0x1UL << NFCT_INTENCLR_FIELDLOST_Pos) /*!< Bit mask of FIELDLOST field. */ +#define NFCT_INTENCLR_FIELDLOST_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_FIELDLOST_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_FIELDLOST_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for FIELDDETECTED event */ +#define NFCT_INTENCLR_FIELDDETECTED_Pos (1UL) /*!< Position of FIELDDETECTED field. */ +#define NFCT_INTENCLR_FIELDDETECTED_Msk (0x1UL << NFCT_INTENCLR_FIELDDETECTED_Pos) /*!< Bit mask of FIELDDETECTED field. */ +#define NFCT_INTENCLR_FIELDDETECTED_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_FIELDDETECTED_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_FIELDDETECTED_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for READY event */ +#define NFCT_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */ +#define NFCT_INTENCLR_READY_Msk (0x1UL << NFCT_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ +#define NFCT_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */ +#define NFCT_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */ +#define NFCT_INTENCLR_READY_Clear (1UL) /*!< Disable */ + +/* Register: NFCT_ERRORSTATUS */ +/* Description: NFC Error Status register */ + +/* Bit 3 : Field level is too low at min load resistance */ +#define NFCT_ERRORSTATUS_NFCFIELDTOOWEAK_Pos (3UL) /*!< Position of NFCFIELDTOOWEAK field. */ +#define NFCT_ERRORSTATUS_NFCFIELDTOOWEAK_Msk (0x1UL << NFCT_ERRORSTATUS_NFCFIELDTOOWEAK_Pos) /*!< Bit mask of NFCFIELDTOOWEAK field. */ + +/* Bit 2 : Field level is too high at max load resistance */ +#define NFCT_ERRORSTATUS_NFCFIELDTOOSTRONG_Pos (2UL) /*!< Position of NFCFIELDTOOSTRONG field. */ +#define NFCT_ERRORSTATUS_NFCFIELDTOOSTRONG_Msk (0x1UL << NFCT_ERRORSTATUS_NFCFIELDTOOSTRONG_Pos) /*!< Bit mask of NFCFIELDTOOSTRONG field. */ + +/* Bit 0 : No STARTTX task triggered before expiration of the time set in FRAMEDELAYMAX */ +#define NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Pos (0UL) /*!< Position of FRAMEDELAYTIMEOUT field. */ +#define NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Msk (0x1UL << NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Pos) /*!< Bit mask of FRAMEDELAYTIMEOUT field. */ + +/* Register: NFCT_FRAMESTATUS_RX */ +/* Description: Result of last incoming frames */ + +/* Bit 3 : Overrun detected */ +#define NFCT_FRAMESTATUS_RX_OVERRUN_Pos (3UL) /*!< Position of OVERRUN field. */ +#define NFCT_FRAMESTATUS_RX_OVERRUN_Msk (0x1UL << NFCT_FRAMESTATUS_RX_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ +#define NFCT_FRAMESTATUS_RX_OVERRUN_NoOverrun (0UL) /*!< No overrun detected */ +#define NFCT_FRAMESTATUS_RX_OVERRUN_Overrun (1UL) /*!< Overrun error */ + +/* Bit 2 : Parity status of received frame */ +#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_Pos (2UL) /*!< Position of PARITYSTATUS field. */ +#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_Msk (0x1UL << NFCT_FRAMESTATUS_RX_PARITYSTATUS_Pos) /*!< Bit mask of PARITYSTATUS field. */ +#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_ParityOK (0UL) /*!< Frame received with parity OK */ +#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_ParityError (1UL) /*!< Frame received with parity error */ + +/* Bit 0 : No valid End of Frame detected */ +#define NFCT_FRAMESTATUS_RX_CRCERROR_Pos (0UL) /*!< Position of CRCERROR field. */ +#define NFCT_FRAMESTATUS_RX_CRCERROR_Msk (0x1UL << NFCT_FRAMESTATUS_RX_CRCERROR_Pos) /*!< Bit mask of CRCERROR field. */ +#define NFCT_FRAMESTATUS_RX_CRCERROR_CRCCorrect (0UL) /*!< Valid CRC detected */ +#define NFCT_FRAMESTATUS_RX_CRCERROR_CRCError (1UL) /*!< CRC received does not match local check */ + +/* Register: NFCT_CURRENTLOADCTRL */ +/* Description: Current value driven to the NFC Load Control */ + +/* Bits 5..0 : Current value driven to the NFC Load Control */ +#define NFCT_CURRENTLOADCTRL_CURRENTLOADCTRL_Pos (0UL) /*!< Position of CURRENTLOADCTRL field. */ +#define NFCT_CURRENTLOADCTRL_CURRENTLOADCTRL_Msk (0x3FUL << NFCT_CURRENTLOADCTRL_CURRENTLOADCTRL_Pos) /*!< Bit mask of CURRENTLOADCTRL field. */ + +/* Register: NFCT_FIELDPRESENT */ +/* Description: Indicates the presence or not of a valid field */ + +/* Bit 1 : Indicates if the low level has locked to the field */ +#define NFCT_FIELDPRESENT_LOCKDETECT_Pos (1UL) /*!< Position of LOCKDETECT field. */ +#define NFCT_FIELDPRESENT_LOCKDETECT_Msk (0x1UL << NFCT_FIELDPRESENT_LOCKDETECT_Pos) /*!< Bit mask of LOCKDETECT field. */ +#define NFCT_FIELDPRESENT_LOCKDETECT_NotLocked (0UL) /*!< Not locked to field */ +#define NFCT_FIELDPRESENT_LOCKDETECT_Locked (1UL) /*!< Locked to field */ + +/* Bit 0 : Indicates the presence or not of a valid field. Available only in the activated state. */ +#define NFCT_FIELDPRESENT_FIELDPRESENT_Pos (0UL) /*!< Position of FIELDPRESENT field. */ +#define NFCT_FIELDPRESENT_FIELDPRESENT_Msk (0x1UL << NFCT_FIELDPRESENT_FIELDPRESENT_Pos) /*!< Bit mask of FIELDPRESENT field. */ +#define NFCT_FIELDPRESENT_FIELDPRESENT_NoField (0UL) /*!< No valid field detected */ +#define NFCT_FIELDPRESENT_FIELDPRESENT_FieldPresent (1UL) /*!< Valid field detected */ + +/* Register: NFCT_FRAMEDELAYMIN */ +/* Description: Minimum frame delay */ + +/* Bits 15..0 : Minimum frame delay in number of 13.56 MHz clocks */ +#define NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Pos (0UL) /*!< Position of FRAMEDELAYMIN field. */ +#define NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Msk (0xFFFFUL << NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Pos) /*!< Bit mask of FRAMEDELAYMIN field. */ + +/* Register: NFCT_FRAMEDELAYMAX */ +/* Description: Maximum frame delay */ + +/* Bits 15..0 : Maximum frame delay in number of 13.56 MHz clocks */ +#define NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Pos (0UL) /*!< Position of FRAMEDELAYMAX field. */ +#define NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Msk (0xFFFFUL << NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Pos) /*!< Bit mask of FRAMEDELAYMAX field. */ + +/* Register: NFCT_FRAMEDELAYMODE */ +/* Description: Configuration register for the Frame Delay Timer */ + +/* Bits 1..0 : Configuration register for the Frame Delay Timer */ +#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Pos (0UL) /*!< Position of FRAMEDELAYMODE field. */ +#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Msk (0x3UL << NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Pos) /*!< Bit mask of FRAMEDELAYMODE field. */ +#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_FreeRun (0UL) /*!< Transmission is independent of frame timer and will start when the STARTTX task is triggered. No timeout. */ +#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Window (1UL) /*!< Frame is transmitted between FRAMEDELAYMIN and FRAMEDELAYMAX */ +#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_ExactVal (2UL) /*!< Frame is transmitted exactly at FRAMEDELAYMAX */ +#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_WindowGrid (3UL) /*!< Frame is transmitted on a bit grid between FRAMEDELAYMIN and FRAMEDELAYMAX */ + +/* Register: NFCT_PACKETPTR */ +/* Description: Packet pointer for TXD and RXD data storage in Data RAM */ + +/* Bits 31..0 : Packet pointer for TXD and RXD data storage in Data RAM. This address is a byte aligned RAM address. */ +#define NFCT_PACKETPTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define NFCT_PACKETPTR_PTR_Msk (0xFFFFFFFFUL << NFCT_PACKETPTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: NFCT_MAXLEN */ +/* Description: Size of allocated for TXD and RXD data storage buffer in Data RAM */ + +/* Bits 8..0 : Size of allocated for TXD and RXD data storage buffer in Data RAM */ +#define NFCT_MAXLEN_MAXLEN_Pos (0UL) /*!< Position of MAXLEN field. */ +#define NFCT_MAXLEN_MAXLEN_Msk (0x1FFUL << NFCT_MAXLEN_MAXLEN_Pos) /*!< Bit mask of MAXLEN field. */ + +/* Register: NFCT_TXD_FRAMECONFIG */ +/* Description: Configuration of outgoing frames */ + +/* Bit 4 : CRC mode for outgoing frames */ +#define NFCT_TXD_FRAMECONFIG_CRCMODETX_Pos (4UL) /*!< Position of CRCMODETX field. */ +#define NFCT_TXD_FRAMECONFIG_CRCMODETX_Msk (0x1UL << NFCT_TXD_FRAMECONFIG_CRCMODETX_Pos) /*!< Bit mask of CRCMODETX field. */ +#define NFCT_TXD_FRAMECONFIG_CRCMODETX_NoCRCTX (0UL) /*!< CRC is not added to the frame */ +#define NFCT_TXD_FRAMECONFIG_CRCMODETX_CRC16TX (1UL) /*!< 16 bit CRC added to the frame based on all the data read from RAM that is used in the frame */ + +/* Bit 2 : Adding SoF or not in TX frames */ +#define NFCT_TXD_FRAMECONFIG_SOF_Pos (2UL) /*!< Position of SOF field. */ +#define NFCT_TXD_FRAMECONFIG_SOF_Msk (0x1UL << NFCT_TXD_FRAMECONFIG_SOF_Pos) /*!< Bit mask of SOF field. */ +#define NFCT_TXD_FRAMECONFIG_SOF_NoSoF (0UL) /*!< Start of Frame symbol not added */ +#define NFCT_TXD_FRAMECONFIG_SOF_SoF (1UL) /*!< Start of Frame symbol added */ + +/* Bit 1 : Discarding unused bits in start or at end of a Frame */ +#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_Pos (1UL) /*!< Position of DISCARDMODE field. */ +#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_Msk (0x1UL << NFCT_TXD_FRAMECONFIG_DISCARDMODE_Pos) /*!< Bit mask of DISCARDMODE field. */ +#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_DiscardEnd (0UL) /*!< Unused bits is discarded at end of frame */ +#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_DiscardStart (1UL) /*!< Unused bits is discarded at start of frame */ + +/* Bit 0 : Adding parity or not in the frame */ +#define NFCT_TXD_FRAMECONFIG_PARITY_Pos (0UL) /*!< Position of PARITY field. */ +#define NFCT_TXD_FRAMECONFIG_PARITY_Msk (0x1UL << NFCT_TXD_FRAMECONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */ +#define NFCT_TXD_FRAMECONFIG_PARITY_NoParity (0UL) /*!< Parity is not added in TX frames */ +#define NFCT_TXD_FRAMECONFIG_PARITY_Parity (1UL) /*!< Parity is added TX frames */ + +/* Register: NFCT_TXD_AMOUNT */ +/* Description: Size of outgoing frame */ + +/* Bits 11..3 : Number of complete bytes that shall be included in the frame, excluding CRC, parity and framing */ +#define NFCT_TXD_AMOUNT_TXDATABYTES_Pos (3UL) /*!< Position of TXDATABYTES field. */ +#define NFCT_TXD_AMOUNT_TXDATABYTES_Msk (0x1FFUL << NFCT_TXD_AMOUNT_TXDATABYTES_Pos) /*!< Bit mask of TXDATABYTES field. */ + +/* Bits 2..0 : Number of bits in the last or first byte read from RAM that shall be included in the frame (excluding parity bit). */ +#define NFCT_TXD_AMOUNT_TXDATABITS_Pos (0UL) /*!< Position of TXDATABITS field. */ +#define NFCT_TXD_AMOUNT_TXDATABITS_Msk (0x7UL << NFCT_TXD_AMOUNT_TXDATABITS_Pos) /*!< Bit mask of TXDATABITS field. */ + +/* Register: NFCT_RXD_FRAMECONFIG */ +/* Description: Configuration of incoming frames */ + +/* Bit 4 : CRC mode for incoming frames */ +#define NFCT_RXD_FRAMECONFIG_CRCMODERX_Pos (4UL) /*!< Position of CRCMODERX field. */ +#define NFCT_RXD_FRAMECONFIG_CRCMODERX_Msk (0x1UL << NFCT_RXD_FRAMECONFIG_CRCMODERX_Pos) /*!< Bit mask of CRCMODERX field. */ +#define NFCT_RXD_FRAMECONFIG_CRCMODERX_NoCRCRX (0UL) /*!< CRC is not expected in RX frames */ +#define NFCT_RXD_FRAMECONFIG_CRCMODERX_CRC16RX (1UL) /*!< Last 16 bits in RX frame is CRC, CRC is checked and CRCSTATUS updated */ + +/* Bit 2 : SoF expected or not in RX frames */ +#define NFCT_RXD_FRAMECONFIG_SOF_Pos (2UL) /*!< Position of SOF field. */ +#define NFCT_RXD_FRAMECONFIG_SOF_Msk (0x1UL << NFCT_RXD_FRAMECONFIG_SOF_Pos) /*!< Bit mask of SOF field. */ +#define NFCT_RXD_FRAMECONFIG_SOF_NoSoF (0UL) /*!< Start of Frame symbol is not expected in RX frames */ +#define NFCT_RXD_FRAMECONFIG_SOF_SoF (1UL) /*!< Start of Frame symbol is expected in RX frames */ + +/* Bit 0 : Parity expected or not in RX frame */ +#define NFCT_RXD_FRAMECONFIG_PARITY_Pos (0UL) /*!< Position of PARITY field. */ +#define NFCT_RXD_FRAMECONFIG_PARITY_Msk (0x1UL << NFCT_RXD_FRAMECONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */ +#define NFCT_RXD_FRAMECONFIG_PARITY_NoParity (0UL) /*!< Parity is not expected in RX frames */ +#define NFCT_RXD_FRAMECONFIG_PARITY_Parity (1UL) /*!< Parity is expected in RX frames */ + +/* Register: NFCT_RXD_AMOUNT */ +/* Description: Size of last incoming frame */ + +/* Bits 11..3 : Number of complete bytes received in the frame (including CRC, but excluding parity and SoF/EoF framing) */ +#define NFCT_RXD_AMOUNT_RXDATABYTES_Pos (3UL) /*!< Position of RXDATABYTES field. */ +#define NFCT_RXD_AMOUNT_RXDATABYTES_Msk (0x1FFUL << NFCT_RXD_AMOUNT_RXDATABYTES_Pos) /*!< Bit mask of RXDATABYTES field. */ + +/* Bits 2..0 : Number of bits in the last byte in the frame, if less than 8 (including CRC, but excluding parity and SoF/EoF framing). */ +#define NFCT_RXD_AMOUNT_RXDATABITS_Pos (0UL) /*!< Position of RXDATABITS field. */ +#define NFCT_RXD_AMOUNT_RXDATABITS_Msk (0x7UL << NFCT_RXD_AMOUNT_RXDATABITS_Pos) /*!< Bit mask of RXDATABITS field. */ + +/* Register: NFCT_NFCID1_LAST */ +/* Description: Last NFCID1 part (4, 7 or 10 bytes ID) */ + +/* Bits 31..24 : NFCID1 byte W */ +#define NFCT_NFCID1_LAST_NFCID1_W_Pos (24UL) /*!< Position of NFCID1_W field. */ +#define NFCT_NFCID1_LAST_NFCID1_W_Msk (0xFFUL << NFCT_NFCID1_LAST_NFCID1_W_Pos) /*!< Bit mask of NFCID1_W field. */ + +/* Bits 23..16 : NFCID1 byte X */ +#define NFCT_NFCID1_LAST_NFCID1_X_Pos (16UL) /*!< Position of NFCID1_X field. */ +#define NFCT_NFCID1_LAST_NFCID1_X_Msk (0xFFUL << NFCT_NFCID1_LAST_NFCID1_X_Pos) /*!< Bit mask of NFCID1_X field. */ + +/* Bits 15..8 : NFCID1 byte Y */ +#define NFCT_NFCID1_LAST_NFCID1_Y_Pos (8UL) /*!< Position of NFCID1_Y field. */ +#define NFCT_NFCID1_LAST_NFCID1_Y_Msk (0xFFUL << NFCT_NFCID1_LAST_NFCID1_Y_Pos) /*!< Bit mask of NFCID1_Y field. */ + +/* Bits 7..0 : NFCID1 byte Z (very last byte sent) */ +#define NFCT_NFCID1_LAST_NFCID1_Z_Pos (0UL) /*!< Position of NFCID1_Z field. */ +#define NFCT_NFCID1_LAST_NFCID1_Z_Msk (0xFFUL << NFCT_NFCID1_LAST_NFCID1_Z_Pos) /*!< Bit mask of NFCID1_Z field. */ + +/* Register: NFCT_NFCID1_2ND_LAST */ +/* Description: Second last NFCID1 part (7 or 10 bytes ID) */ + +/* Bits 23..16 : NFCID1 byte T */ +#define NFCT_NFCID1_2ND_LAST_NFCID1_T_Pos (16UL) /*!< Position of NFCID1_T field. */ +#define NFCT_NFCID1_2ND_LAST_NFCID1_T_Msk (0xFFUL << NFCT_NFCID1_2ND_LAST_NFCID1_T_Pos) /*!< Bit mask of NFCID1_T field. */ + +/* Bits 15..8 : NFCID1 byte U */ +#define NFCT_NFCID1_2ND_LAST_NFCID1_U_Pos (8UL) /*!< Position of NFCID1_U field. */ +#define NFCT_NFCID1_2ND_LAST_NFCID1_U_Msk (0xFFUL << NFCT_NFCID1_2ND_LAST_NFCID1_U_Pos) /*!< Bit mask of NFCID1_U field. */ + +/* Bits 7..0 : NFCID1 byte V */ +#define NFCT_NFCID1_2ND_LAST_NFCID1_V_Pos (0UL) /*!< Position of NFCID1_V field. */ +#define NFCT_NFCID1_2ND_LAST_NFCID1_V_Msk (0xFFUL << NFCT_NFCID1_2ND_LAST_NFCID1_V_Pos) /*!< Bit mask of NFCID1_V field. */ + +/* Register: NFCT_NFCID1_3RD_LAST */ +/* Description: Third last NFCID1 part (10 bytes ID) */ + +/* Bits 23..16 : NFCID1 byte Q */ +#define NFCT_NFCID1_3RD_LAST_NFCID1_Q_Pos (16UL) /*!< Position of NFCID1_Q field. */ +#define NFCT_NFCID1_3RD_LAST_NFCID1_Q_Msk (0xFFUL << NFCT_NFCID1_3RD_LAST_NFCID1_Q_Pos) /*!< Bit mask of NFCID1_Q field. */ + +/* Bits 15..8 : NFCID1 byte R */ +#define NFCT_NFCID1_3RD_LAST_NFCID1_R_Pos (8UL) /*!< Position of NFCID1_R field. */ +#define NFCT_NFCID1_3RD_LAST_NFCID1_R_Msk (0xFFUL << NFCT_NFCID1_3RD_LAST_NFCID1_R_Pos) /*!< Bit mask of NFCID1_R field. */ + +/* Bits 7..0 : NFCID1 byte S */ +#define NFCT_NFCID1_3RD_LAST_NFCID1_S_Pos (0UL) /*!< Position of NFCID1_S field. */ +#define NFCT_NFCID1_3RD_LAST_NFCID1_S_Msk (0xFFUL << NFCT_NFCID1_3RD_LAST_NFCID1_S_Pos) /*!< Bit mask of NFCID1_S field. */ + +/* Register: NFCT_SENSRES */ +/* Description: NFC-A SENS_RES auto-response settings */ + +/* Bits 15..12 : Reserved for future use. Shall be 0. */ +#define NFCT_SENSRES_RFU74_Pos (12UL) /*!< Position of RFU74 field. */ +#define NFCT_SENSRES_RFU74_Msk (0xFUL << NFCT_SENSRES_RFU74_Pos) /*!< Bit mask of RFU74 field. */ + +/* Bits 11..8 : Tag platform configuration as defined by the b4:b1 of byte 2 in SENS_RES response in the NFC Forum, NFC Digital Protocol Technical Specification */ +#define NFCT_SENSRES_PLATFCONFIG_Pos (8UL) /*!< Position of PLATFCONFIG field. */ +#define NFCT_SENSRES_PLATFCONFIG_Msk (0xFUL << NFCT_SENSRES_PLATFCONFIG_Pos) /*!< Bit mask of PLATFCONFIG field. */ + +/* Bits 7..6 : NFCID1 size. This value is used by the Auto collision resolution engine. */ +#define NFCT_SENSRES_NFCIDSIZE_Pos (6UL) /*!< Position of NFCIDSIZE field. */ +#define NFCT_SENSRES_NFCIDSIZE_Msk (0x3UL << NFCT_SENSRES_NFCIDSIZE_Pos) /*!< Bit mask of NFCIDSIZE field. */ +#define NFCT_SENSRES_NFCIDSIZE_NFCID1Single (0UL) /*!< NFCID1 size: single (4 bytes) */ +#define NFCT_SENSRES_NFCIDSIZE_NFCID1Double (1UL) /*!< NFCID1 size: double (7 bytes) */ +#define NFCT_SENSRES_NFCIDSIZE_NFCID1Triple (2UL) /*!< NFCID1 size: triple (10 bytes) */ + +/* Bit 5 : Reserved for future use. Shall be 0. */ +#define NFCT_SENSRES_RFU5_Pos (5UL) /*!< Position of RFU5 field. */ +#define NFCT_SENSRES_RFU5_Msk (0x1UL << NFCT_SENSRES_RFU5_Pos) /*!< Bit mask of RFU5 field. */ + +/* Bits 4..0 : Bit frame SDD as defined by the b5:b1 of byte 1 in SENS_RES response in the NFC Forum, NFC Digital Protocol Technical Specification */ +#define NFCT_SENSRES_BITFRAMESDD_Pos (0UL) /*!< Position of BITFRAMESDD field. */ +#define NFCT_SENSRES_BITFRAMESDD_Msk (0x1FUL << NFCT_SENSRES_BITFRAMESDD_Pos) /*!< Bit mask of BITFRAMESDD field. */ +#define NFCT_SENSRES_BITFRAMESDD_SDD00000 (0UL) /*!< SDD pattern 00000 */ +#define NFCT_SENSRES_BITFRAMESDD_SDD00001 (1UL) /*!< SDD pattern 00001 */ +#define NFCT_SENSRES_BITFRAMESDD_SDD00010 (2UL) /*!< SDD pattern 00010 */ +#define NFCT_SENSRES_BITFRAMESDD_SDD00100 (4UL) /*!< SDD pattern 00100 */ +#define NFCT_SENSRES_BITFRAMESDD_SDD01000 (8UL) /*!< SDD pattern 01000 */ +#define NFCT_SENSRES_BITFRAMESDD_SDD10000 (16UL) /*!< SDD pattern 10000 */ + +/* Register: NFCT_SELRES */ +/* Description: NFC-A SEL_RES auto-response settings */ + +/* Bit 7 : Reserved for future use. Shall be 0. */ +#define NFCT_SELRES_RFU7_Pos (7UL) /*!< Position of RFU7 field. */ +#define NFCT_SELRES_RFU7_Msk (0x1UL << NFCT_SELRES_RFU7_Pos) /*!< Bit mask of RFU7 field. */ + +/* Bits 6..5 : Protocol as defined by the b7:b6 of SEL_RES response in the NFC Forum, NFC Digital Protocol Technical Specification */ +#define NFCT_SELRES_PROTOCOL_Pos (5UL) /*!< Position of PROTOCOL field. */ +#define NFCT_SELRES_PROTOCOL_Msk (0x3UL << NFCT_SELRES_PROTOCOL_Pos) /*!< Bit mask of PROTOCOL field. */ + +/* Bits 4..3 : Reserved for future use. Shall be 0. */ +#define NFCT_SELRES_RFU43_Pos (3UL) /*!< Position of RFU43 field. */ +#define NFCT_SELRES_RFU43_Msk (0x3UL << NFCT_SELRES_RFU43_Pos) /*!< Bit mask of RFU43 field. */ + +/* Bit 2 : Cascade bit (controlled by hardware, write has no effect) */ +#define NFCT_SELRES_CASCADE_Pos (2UL) /*!< Position of CASCADE field. */ +#define NFCT_SELRES_CASCADE_Msk (0x1UL << NFCT_SELRES_CASCADE_Pos) /*!< Bit mask of CASCADE field. */ +#define NFCT_SELRES_CASCADE_Complete (0UL) /*!< NFCID1 complete */ +#define NFCT_SELRES_CASCADE_NotComplete (1UL) /*!< NFCID1 not complete */ + +/* Bits 1..0 : Reserved for future use. Shall be 0. */ +#define NFCT_SELRES_RFU10_Pos (0UL) /*!< Position of RFU10 field. */ +#define NFCT_SELRES_RFU10_Msk (0x3UL << NFCT_SELRES_RFU10_Pos) /*!< Bit mask of RFU10 field. */ + + +/* Peripheral: NVMC */ +/* Description: Non Volatile Memory Controller */ + +/* Register: NVMC_READY */ +/* Description: Ready flag */ + +/* Bit 0 : NVMC is ready or busy */ +#define NVMC_READY_READY_Pos (0UL) /*!< Position of READY field. */ +#define NVMC_READY_READY_Msk (0x1UL << NVMC_READY_READY_Pos) /*!< Bit mask of READY field. */ +#define NVMC_READY_READY_Busy (0UL) /*!< NVMC is busy (on-going write or erase operation) */ +#define NVMC_READY_READY_Ready (1UL) /*!< NVMC is ready */ + +/* Register: NVMC_CONFIG */ +/* Description: Configuration register */ + +/* Bits 1..0 : Program memory access mode. It is strongly recommended to only activate erase and write modes when they are actively used. Enabling write or erase will invalidate the cache and keep it invalidated. */ +#define NVMC_CONFIG_WEN_Pos (0UL) /*!< Position of WEN field. */ +#define NVMC_CONFIG_WEN_Msk (0x3UL << NVMC_CONFIG_WEN_Pos) /*!< Bit mask of WEN field. */ +#define NVMC_CONFIG_WEN_Ren (0UL) /*!< Read only access */ +#define NVMC_CONFIG_WEN_Wen (1UL) /*!< Write Enabled */ +#define NVMC_CONFIG_WEN_Een (2UL) /*!< Erase enabled */ + +/* Register: NVMC_ERASEPAGE */ +/* Description: Register for erasing a page in Code area */ + +/* Bits 31..0 : Register for starting erase of a page in Code area */ +#define NVMC_ERASEPAGE_ERASEPAGE_Pos (0UL) /*!< Position of ERASEPAGE field. */ +#define NVMC_ERASEPAGE_ERASEPAGE_Msk (0xFFFFFFFFUL << NVMC_ERASEPAGE_ERASEPAGE_Pos) /*!< Bit mask of ERASEPAGE field. */ + +/* Register: NVMC_ERASEPCR1 */ +/* Description: Deprecated register - Register for erasing a page in Code area. Equivalent to ERASEPAGE. */ + +/* Bits 31..0 : Register for erasing a page in Code area. Equivalent to ERASEPAGE. */ +#define NVMC_ERASEPCR1_ERASEPCR1_Pos (0UL) /*!< Position of ERASEPCR1 field. */ +#define NVMC_ERASEPCR1_ERASEPCR1_Msk (0xFFFFFFFFUL << NVMC_ERASEPCR1_ERASEPCR1_Pos) /*!< Bit mask of ERASEPCR1 field. */ + +/* Register: NVMC_ERASEALL */ +/* Description: Register for erasing all non-volatile user memory */ + +/* Bit 0 : Erase all non-volatile memory including UICR registers. Note that code erase has to be enabled by CONFIG.EEN before the UICR can be erased. */ +#define NVMC_ERASEALL_ERASEALL_Pos (0UL) /*!< Position of ERASEALL field. */ +#define NVMC_ERASEALL_ERASEALL_Msk (0x1UL << NVMC_ERASEALL_ERASEALL_Pos) /*!< Bit mask of ERASEALL field. */ +#define NVMC_ERASEALL_ERASEALL_NoOperation (0UL) /*!< No operation */ +#define NVMC_ERASEALL_ERASEALL_Erase (1UL) /*!< Start chip erase */ + +/* Register: NVMC_ERASEPCR0 */ +/* Description: Deprecated register - Register for erasing a page in Code area. Equivalent to ERASEPAGE. */ + +/* Bits 31..0 : Register for starting erase of a page in Code area. Equivalent to ERASEPAGE. */ +#define NVMC_ERASEPCR0_ERASEPCR0_Pos (0UL) /*!< Position of ERASEPCR0 field. */ +#define NVMC_ERASEPCR0_ERASEPCR0_Msk (0xFFFFFFFFUL << NVMC_ERASEPCR0_ERASEPCR0_Pos) /*!< Bit mask of ERASEPCR0 field. */ + +/* Register: NVMC_ERASEUICR */ +/* Description: Register for erasing User Information Configuration Registers */ + +/* Bit 0 : Register starting erase of all User Information Configuration Registers. Note that code erase has to be enabled by CONFIG.EEN before the UICR can be erased. */ +#define NVMC_ERASEUICR_ERASEUICR_Pos (0UL) /*!< Position of ERASEUICR field. */ +#define NVMC_ERASEUICR_ERASEUICR_Msk (0x1UL << NVMC_ERASEUICR_ERASEUICR_Pos) /*!< Bit mask of ERASEUICR field. */ +#define NVMC_ERASEUICR_ERASEUICR_NoOperation (0UL) /*!< No operation */ +#define NVMC_ERASEUICR_ERASEUICR_Erase (1UL) /*!< Start erase of UICR */ + +/* Register: NVMC_ICACHECNF */ +/* Description: I-Code cache configuration register. */ + +/* Bit 8 : Cache profiling enable */ +#define NVMC_ICACHECNF_CACHEPROFEN_Pos (8UL) /*!< Position of CACHEPROFEN field. */ +#define NVMC_ICACHECNF_CACHEPROFEN_Msk (0x1UL << NVMC_ICACHECNF_CACHEPROFEN_Pos) /*!< Bit mask of CACHEPROFEN field. */ +#define NVMC_ICACHECNF_CACHEPROFEN_Disabled (0UL) /*!< Disable cache profiling */ +#define NVMC_ICACHECNF_CACHEPROFEN_Enabled (1UL) /*!< Enable cache profiling */ + +/* Bit 0 : Cache enable */ +#define NVMC_ICACHECNF_CACHEEN_Pos (0UL) /*!< Position of CACHEEN field. */ +#define NVMC_ICACHECNF_CACHEEN_Msk (0x1UL << NVMC_ICACHECNF_CACHEEN_Pos) /*!< Bit mask of CACHEEN field. */ +#define NVMC_ICACHECNF_CACHEEN_Disabled (0UL) /*!< Disable cache. Invalidates all cache entries. */ +#define NVMC_ICACHECNF_CACHEEN_Enabled (1UL) /*!< Enable cache */ + +/* Register: NVMC_IHIT */ +/* Description: I-Code cache hit counter. */ + +/* Bits 31..0 : Number of cache hits */ +#define NVMC_IHIT_HITS_Pos (0UL) /*!< Position of HITS field. */ +#define NVMC_IHIT_HITS_Msk (0xFFFFFFFFUL << NVMC_IHIT_HITS_Pos) /*!< Bit mask of HITS field. */ + +/* Register: NVMC_IMISS */ +/* Description: I-Code cache miss counter. */ + +/* Bits 31..0 : Number of cache misses */ +#define NVMC_IMISS_MISSES_Pos (0UL) /*!< Position of MISSES field. */ +#define NVMC_IMISS_MISSES_Msk (0xFFFFFFFFUL << NVMC_IMISS_MISSES_Pos) /*!< Bit mask of MISSES field. */ + + +/* Peripheral: GPIO */ +/* Description: GPIO Port 1 */ + +/* Register: GPIO_OUT */ +/* Description: Write GPIO port */ + +/* Bit 31 : Pin 31 */ +#define GPIO_OUT_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_OUT_PIN31_Msk (0x1UL << GPIO_OUT_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_OUT_PIN31_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN31_High (1UL) /*!< Pin driver is high */ + +/* Bit 30 : Pin 30 */ +#define GPIO_OUT_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_OUT_PIN30_Msk (0x1UL << GPIO_OUT_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_OUT_PIN30_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN30_High (1UL) /*!< Pin driver is high */ + +/* Bit 29 : Pin 29 */ +#define GPIO_OUT_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_OUT_PIN29_Msk (0x1UL << GPIO_OUT_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_OUT_PIN29_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN29_High (1UL) /*!< Pin driver is high */ + +/* Bit 28 : Pin 28 */ +#define GPIO_OUT_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_OUT_PIN28_Msk (0x1UL << GPIO_OUT_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_OUT_PIN28_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN28_High (1UL) /*!< Pin driver is high */ + +/* Bit 27 : Pin 27 */ +#define GPIO_OUT_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_OUT_PIN27_Msk (0x1UL << GPIO_OUT_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_OUT_PIN27_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN27_High (1UL) /*!< Pin driver is high */ + +/* Bit 26 : Pin 26 */ +#define GPIO_OUT_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_OUT_PIN26_Msk (0x1UL << GPIO_OUT_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_OUT_PIN26_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN26_High (1UL) /*!< Pin driver is high */ + +/* Bit 25 : Pin 25 */ +#define GPIO_OUT_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_OUT_PIN25_Msk (0x1UL << GPIO_OUT_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_OUT_PIN25_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN25_High (1UL) /*!< Pin driver is high */ + +/* Bit 24 : Pin 24 */ +#define GPIO_OUT_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_OUT_PIN24_Msk (0x1UL << GPIO_OUT_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_OUT_PIN24_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN24_High (1UL) /*!< Pin driver is high */ + +/* Bit 23 : Pin 23 */ +#define GPIO_OUT_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_OUT_PIN23_Msk (0x1UL << GPIO_OUT_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_OUT_PIN23_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN23_High (1UL) /*!< Pin driver is high */ + +/* Bit 22 : Pin 22 */ +#define GPIO_OUT_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_OUT_PIN22_Msk (0x1UL << GPIO_OUT_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_OUT_PIN22_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN22_High (1UL) /*!< Pin driver is high */ + +/* Bit 21 : Pin 21 */ +#define GPIO_OUT_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_OUT_PIN21_Msk (0x1UL << GPIO_OUT_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_OUT_PIN21_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN21_High (1UL) /*!< Pin driver is high */ + +/* Bit 20 : Pin 20 */ +#define GPIO_OUT_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_OUT_PIN20_Msk (0x1UL << GPIO_OUT_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_OUT_PIN20_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN20_High (1UL) /*!< Pin driver is high */ + +/* Bit 19 : Pin 19 */ +#define GPIO_OUT_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_OUT_PIN19_Msk (0x1UL << GPIO_OUT_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_OUT_PIN19_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN19_High (1UL) /*!< Pin driver is high */ + +/* Bit 18 : Pin 18 */ +#define GPIO_OUT_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_OUT_PIN18_Msk (0x1UL << GPIO_OUT_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_OUT_PIN18_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN18_High (1UL) /*!< Pin driver is high */ + +/* Bit 17 : Pin 17 */ +#define GPIO_OUT_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_OUT_PIN17_Msk (0x1UL << GPIO_OUT_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_OUT_PIN17_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN17_High (1UL) /*!< Pin driver is high */ + +/* Bit 16 : Pin 16 */ +#define GPIO_OUT_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_OUT_PIN16_Msk (0x1UL << GPIO_OUT_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_OUT_PIN16_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN16_High (1UL) /*!< Pin driver is high */ + +/* Bit 15 : Pin 15 */ +#define GPIO_OUT_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_OUT_PIN15_Msk (0x1UL << GPIO_OUT_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_OUT_PIN15_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN15_High (1UL) /*!< Pin driver is high */ + +/* Bit 14 : Pin 14 */ +#define GPIO_OUT_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_OUT_PIN14_Msk (0x1UL << GPIO_OUT_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_OUT_PIN14_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN14_High (1UL) /*!< Pin driver is high */ + +/* Bit 13 : Pin 13 */ +#define GPIO_OUT_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_OUT_PIN13_Msk (0x1UL << GPIO_OUT_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_OUT_PIN13_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN13_High (1UL) /*!< Pin driver is high */ + +/* Bit 12 : Pin 12 */ +#define GPIO_OUT_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_OUT_PIN12_Msk (0x1UL << GPIO_OUT_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_OUT_PIN12_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN12_High (1UL) /*!< Pin driver is high */ + +/* Bit 11 : Pin 11 */ +#define GPIO_OUT_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_OUT_PIN11_Msk (0x1UL << GPIO_OUT_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_OUT_PIN11_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN11_High (1UL) /*!< Pin driver is high */ + +/* Bit 10 : Pin 10 */ +#define GPIO_OUT_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_OUT_PIN10_Msk (0x1UL << GPIO_OUT_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_OUT_PIN10_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN10_High (1UL) /*!< Pin driver is high */ + +/* Bit 9 : Pin 9 */ +#define GPIO_OUT_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_OUT_PIN9_Msk (0x1UL << GPIO_OUT_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_OUT_PIN9_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN9_High (1UL) /*!< Pin driver is high */ + +/* Bit 8 : Pin 8 */ +#define GPIO_OUT_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_OUT_PIN8_Msk (0x1UL << GPIO_OUT_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_OUT_PIN8_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN8_High (1UL) /*!< Pin driver is high */ + +/* Bit 7 : Pin 7 */ +#define GPIO_OUT_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_OUT_PIN7_Msk (0x1UL << GPIO_OUT_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_OUT_PIN7_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN7_High (1UL) /*!< Pin driver is high */ + +/* Bit 6 : Pin 6 */ +#define GPIO_OUT_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_OUT_PIN6_Msk (0x1UL << GPIO_OUT_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_OUT_PIN6_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN6_High (1UL) /*!< Pin driver is high */ + +/* Bit 5 : Pin 5 */ +#define GPIO_OUT_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_OUT_PIN5_Msk (0x1UL << GPIO_OUT_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_OUT_PIN5_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN5_High (1UL) /*!< Pin driver is high */ + +/* Bit 4 : Pin 4 */ +#define GPIO_OUT_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_OUT_PIN4_Msk (0x1UL << GPIO_OUT_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_OUT_PIN4_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN4_High (1UL) /*!< Pin driver is high */ + +/* Bit 3 : Pin 3 */ +#define GPIO_OUT_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_OUT_PIN3_Msk (0x1UL << GPIO_OUT_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_OUT_PIN3_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN3_High (1UL) /*!< Pin driver is high */ + +/* Bit 2 : Pin 2 */ +#define GPIO_OUT_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_OUT_PIN2_Msk (0x1UL << GPIO_OUT_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_OUT_PIN2_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN2_High (1UL) /*!< Pin driver is high */ + +/* Bit 1 : Pin 1 */ +#define GPIO_OUT_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_OUT_PIN1_Msk (0x1UL << GPIO_OUT_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_OUT_PIN1_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN1_High (1UL) /*!< Pin driver is high */ + +/* Bit 0 : Pin 0 */ +#define GPIO_OUT_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_OUT_PIN0_Msk (0x1UL << GPIO_OUT_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_OUT_PIN0_Low (0UL) /*!< Pin driver is low */ +#define GPIO_OUT_PIN0_High (1UL) /*!< Pin driver is high */ + +/* Register: GPIO_OUTSET */ +/* Description: Set individual bits in GPIO port */ + +/* Bit 31 : Pin 31 */ +#define GPIO_OUTSET_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_OUTSET_PIN31_Msk (0x1UL << GPIO_OUTSET_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_OUTSET_PIN31_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN31_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN31_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 30 : Pin 30 */ +#define GPIO_OUTSET_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_OUTSET_PIN30_Msk (0x1UL << GPIO_OUTSET_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_OUTSET_PIN30_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN30_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN30_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 29 : Pin 29 */ +#define GPIO_OUTSET_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_OUTSET_PIN29_Msk (0x1UL << GPIO_OUTSET_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_OUTSET_PIN29_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN29_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN29_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 28 : Pin 28 */ +#define GPIO_OUTSET_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_OUTSET_PIN28_Msk (0x1UL << GPIO_OUTSET_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_OUTSET_PIN28_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN28_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN28_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 27 : Pin 27 */ +#define GPIO_OUTSET_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_OUTSET_PIN27_Msk (0x1UL << GPIO_OUTSET_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_OUTSET_PIN27_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN27_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN27_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 26 : Pin 26 */ +#define GPIO_OUTSET_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_OUTSET_PIN26_Msk (0x1UL << GPIO_OUTSET_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_OUTSET_PIN26_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN26_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN26_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 25 : Pin 25 */ +#define GPIO_OUTSET_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_OUTSET_PIN25_Msk (0x1UL << GPIO_OUTSET_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_OUTSET_PIN25_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN25_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN25_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 24 : Pin 24 */ +#define GPIO_OUTSET_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_OUTSET_PIN24_Msk (0x1UL << GPIO_OUTSET_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_OUTSET_PIN24_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN24_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN24_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 23 : Pin 23 */ +#define GPIO_OUTSET_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_OUTSET_PIN23_Msk (0x1UL << GPIO_OUTSET_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_OUTSET_PIN23_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN23_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN23_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 22 : Pin 22 */ +#define GPIO_OUTSET_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_OUTSET_PIN22_Msk (0x1UL << GPIO_OUTSET_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_OUTSET_PIN22_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN22_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN22_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 21 : Pin 21 */ +#define GPIO_OUTSET_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_OUTSET_PIN21_Msk (0x1UL << GPIO_OUTSET_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_OUTSET_PIN21_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN21_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN21_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 20 : Pin 20 */ +#define GPIO_OUTSET_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_OUTSET_PIN20_Msk (0x1UL << GPIO_OUTSET_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_OUTSET_PIN20_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN20_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN20_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 19 : Pin 19 */ +#define GPIO_OUTSET_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_OUTSET_PIN19_Msk (0x1UL << GPIO_OUTSET_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_OUTSET_PIN19_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN19_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN19_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 18 : Pin 18 */ +#define GPIO_OUTSET_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_OUTSET_PIN18_Msk (0x1UL << GPIO_OUTSET_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_OUTSET_PIN18_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN18_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN18_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 17 : Pin 17 */ +#define GPIO_OUTSET_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_OUTSET_PIN17_Msk (0x1UL << GPIO_OUTSET_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_OUTSET_PIN17_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN17_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN17_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 16 : Pin 16 */ +#define GPIO_OUTSET_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_OUTSET_PIN16_Msk (0x1UL << GPIO_OUTSET_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_OUTSET_PIN16_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN16_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN16_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 15 : Pin 15 */ +#define GPIO_OUTSET_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_OUTSET_PIN15_Msk (0x1UL << GPIO_OUTSET_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_OUTSET_PIN15_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN15_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN15_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 14 : Pin 14 */ +#define GPIO_OUTSET_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_OUTSET_PIN14_Msk (0x1UL << GPIO_OUTSET_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_OUTSET_PIN14_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN14_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN14_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 13 : Pin 13 */ +#define GPIO_OUTSET_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_OUTSET_PIN13_Msk (0x1UL << GPIO_OUTSET_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_OUTSET_PIN13_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN13_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN13_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 12 : Pin 12 */ +#define GPIO_OUTSET_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_OUTSET_PIN12_Msk (0x1UL << GPIO_OUTSET_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_OUTSET_PIN12_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN12_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN12_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 11 : Pin 11 */ +#define GPIO_OUTSET_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_OUTSET_PIN11_Msk (0x1UL << GPIO_OUTSET_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_OUTSET_PIN11_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN11_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN11_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 10 : Pin 10 */ +#define GPIO_OUTSET_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_OUTSET_PIN10_Msk (0x1UL << GPIO_OUTSET_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_OUTSET_PIN10_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN10_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN10_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 9 : Pin 9 */ +#define GPIO_OUTSET_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_OUTSET_PIN9_Msk (0x1UL << GPIO_OUTSET_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_OUTSET_PIN9_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN9_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN9_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 8 : Pin 8 */ +#define GPIO_OUTSET_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_OUTSET_PIN8_Msk (0x1UL << GPIO_OUTSET_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_OUTSET_PIN8_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN8_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN8_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 7 : Pin 7 */ +#define GPIO_OUTSET_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_OUTSET_PIN7_Msk (0x1UL << GPIO_OUTSET_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_OUTSET_PIN7_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN7_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN7_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 6 : Pin 6 */ +#define GPIO_OUTSET_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_OUTSET_PIN6_Msk (0x1UL << GPIO_OUTSET_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_OUTSET_PIN6_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN6_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN6_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 5 : Pin 5 */ +#define GPIO_OUTSET_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_OUTSET_PIN5_Msk (0x1UL << GPIO_OUTSET_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_OUTSET_PIN5_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN5_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN5_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 4 : Pin 4 */ +#define GPIO_OUTSET_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_OUTSET_PIN4_Msk (0x1UL << GPIO_OUTSET_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_OUTSET_PIN4_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN4_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN4_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 3 : Pin 3 */ +#define GPIO_OUTSET_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_OUTSET_PIN3_Msk (0x1UL << GPIO_OUTSET_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_OUTSET_PIN3_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN3_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN3_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 2 : Pin 2 */ +#define GPIO_OUTSET_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_OUTSET_PIN2_Msk (0x1UL << GPIO_OUTSET_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_OUTSET_PIN2_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN2_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN2_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 1 : Pin 1 */ +#define GPIO_OUTSET_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_OUTSET_PIN1_Msk (0x1UL << GPIO_OUTSET_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_OUTSET_PIN1_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN1_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN1_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Bit 0 : Pin 0 */ +#define GPIO_OUTSET_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_OUTSET_PIN0_Msk (0x1UL << GPIO_OUTSET_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_OUTSET_PIN0_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTSET_PIN0_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTSET_PIN0_Set (1UL) /*!< Write: writing a '1' sets the pin high; writing a '0' has no effect */ + +/* Register: GPIO_OUTCLR */ +/* Description: Clear individual bits in GPIO port */ + +/* Bit 31 : Pin 31 */ +#define GPIO_OUTCLR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_OUTCLR_PIN31_Msk (0x1UL << GPIO_OUTCLR_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_OUTCLR_PIN31_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN31_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN31_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 30 : Pin 30 */ +#define GPIO_OUTCLR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_OUTCLR_PIN30_Msk (0x1UL << GPIO_OUTCLR_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_OUTCLR_PIN30_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN30_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN30_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 29 : Pin 29 */ +#define GPIO_OUTCLR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_OUTCLR_PIN29_Msk (0x1UL << GPIO_OUTCLR_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_OUTCLR_PIN29_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN29_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN29_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 28 : Pin 28 */ +#define GPIO_OUTCLR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_OUTCLR_PIN28_Msk (0x1UL << GPIO_OUTCLR_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_OUTCLR_PIN28_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN28_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN28_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 27 : Pin 27 */ +#define GPIO_OUTCLR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_OUTCLR_PIN27_Msk (0x1UL << GPIO_OUTCLR_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_OUTCLR_PIN27_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN27_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN27_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 26 : Pin 26 */ +#define GPIO_OUTCLR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_OUTCLR_PIN26_Msk (0x1UL << GPIO_OUTCLR_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_OUTCLR_PIN26_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN26_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN26_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 25 : Pin 25 */ +#define GPIO_OUTCLR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_OUTCLR_PIN25_Msk (0x1UL << GPIO_OUTCLR_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_OUTCLR_PIN25_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN25_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN25_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 24 : Pin 24 */ +#define GPIO_OUTCLR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_OUTCLR_PIN24_Msk (0x1UL << GPIO_OUTCLR_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_OUTCLR_PIN24_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN24_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN24_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 23 : Pin 23 */ +#define GPIO_OUTCLR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_OUTCLR_PIN23_Msk (0x1UL << GPIO_OUTCLR_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_OUTCLR_PIN23_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN23_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN23_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 22 : Pin 22 */ +#define GPIO_OUTCLR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_OUTCLR_PIN22_Msk (0x1UL << GPIO_OUTCLR_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_OUTCLR_PIN22_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN22_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN22_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 21 : Pin 21 */ +#define GPIO_OUTCLR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_OUTCLR_PIN21_Msk (0x1UL << GPIO_OUTCLR_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_OUTCLR_PIN21_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN21_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN21_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 20 : Pin 20 */ +#define GPIO_OUTCLR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_OUTCLR_PIN20_Msk (0x1UL << GPIO_OUTCLR_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_OUTCLR_PIN20_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN20_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN20_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 19 : Pin 19 */ +#define GPIO_OUTCLR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_OUTCLR_PIN19_Msk (0x1UL << GPIO_OUTCLR_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_OUTCLR_PIN19_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN19_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN19_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 18 : Pin 18 */ +#define GPIO_OUTCLR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_OUTCLR_PIN18_Msk (0x1UL << GPIO_OUTCLR_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_OUTCLR_PIN18_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN18_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN18_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 17 : Pin 17 */ +#define GPIO_OUTCLR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_OUTCLR_PIN17_Msk (0x1UL << GPIO_OUTCLR_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_OUTCLR_PIN17_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN17_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN17_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 16 : Pin 16 */ +#define GPIO_OUTCLR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_OUTCLR_PIN16_Msk (0x1UL << GPIO_OUTCLR_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_OUTCLR_PIN16_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN16_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN16_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 15 : Pin 15 */ +#define GPIO_OUTCLR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_OUTCLR_PIN15_Msk (0x1UL << GPIO_OUTCLR_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_OUTCLR_PIN15_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN15_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN15_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 14 : Pin 14 */ +#define GPIO_OUTCLR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_OUTCLR_PIN14_Msk (0x1UL << GPIO_OUTCLR_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_OUTCLR_PIN14_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN14_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN14_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 13 : Pin 13 */ +#define GPIO_OUTCLR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_OUTCLR_PIN13_Msk (0x1UL << GPIO_OUTCLR_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_OUTCLR_PIN13_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN13_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN13_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 12 : Pin 12 */ +#define GPIO_OUTCLR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_OUTCLR_PIN12_Msk (0x1UL << GPIO_OUTCLR_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_OUTCLR_PIN12_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN12_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN12_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 11 : Pin 11 */ +#define GPIO_OUTCLR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_OUTCLR_PIN11_Msk (0x1UL << GPIO_OUTCLR_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_OUTCLR_PIN11_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN11_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN11_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 10 : Pin 10 */ +#define GPIO_OUTCLR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_OUTCLR_PIN10_Msk (0x1UL << GPIO_OUTCLR_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_OUTCLR_PIN10_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN10_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN10_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 9 : Pin 9 */ +#define GPIO_OUTCLR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_OUTCLR_PIN9_Msk (0x1UL << GPIO_OUTCLR_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_OUTCLR_PIN9_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN9_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN9_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 8 : Pin 8 */ +#define GPIO_OUTCLR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_OUTCLR_PIN8_Msk (0x1UL << GPIO_OUTCLR_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_OUTCLR_PIN8_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN8_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN8_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 7 : Pin 7 */ +#define GPIO_OUTCLR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_OUTCLR_PIN7_Msk (0x1UL << GPIO_OUTCLR_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_OUTCLR_PIN7_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN7_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN7_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 6 : Pin 6 */ +#define GPIO_OUTCLR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_OUTCLR_PIN6_Msk (0x1UL << GPIO_OUTCLR_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_OUTCLR_PIN6_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN6_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN6_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 5 : Pin 5 */ +#define GPIO_OUTCLR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_OUTCLR_PIN5_Msk (0x1UL << GPIO_OUTCLR_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_OUTCLR_PIN5_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN5_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN5_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 4 : Pin 4 */ +#define GPIO_OUTCLR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_OUTCLR_PIN4_Msk (0x1UL << GPIO_OUTCLR_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_OUTCLR_PIN4_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN4_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN4_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 3 : Pin 3 */ +#define GPIO_OUTCLR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_OUTCLR_PIN3_Msk (0x1UL << GPIO_OUTCLR_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_OUTCLR_PIN3_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN3_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN3_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 2 : Pin 2 */ +#define GPIO_OUTCLR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_OUTCLR_PIN2_Msk (0x1UL << GPIO_OUTCLR_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_OUTCLR_PIN2_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN2_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN2_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 1 : Pin 1 */ +#define GPIO_OUTCLR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_OUTCLR_PIN1_Msk (0x1UL << GPIO_OUTCLR_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_OUTCLR_PIN1_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN1_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN1_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Bit 0 : Pin 0 */ +#define GPIO_OUTCLR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_OUTCLR_PIN0_Msk (0x1UL << GPIO_OUTCLR_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_OUTCLR_PIN0_Low (0UL) /*!< Read: pin driver is low */ +#define GPIO_OUTCLR_PIN0_High (1UL) /*!< Read: pin driver is high */ +#define GPIO_OUTCLR_PIN0_Clear (1UL) /*!< Write: writing a '1' sets the pin low; writing a '0' has no effect */ + +/* Register: GPIO_IN */ +/* Description: Read GPIO port */ + +/* Bit 31 : Pin 31 */ +#define GPIO_IN_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_IN_PIN31_Msk (0x1UL << GPIO_IN_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_IN_PIN31_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN31_High (1UL) /*!< Pin input is high */ + +/* Bit 30 : Pin 30 */ +#define GPIO_IN_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_IN_PIN30_Msk (0x1UL << GPIO_IN_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_IN_PIN30_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN30_High (1UL) /*!< Pin input is high */ + +/* Bit 29 : Pin 29 */ +#define GPIO_IN_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_IN_PIN29_Msk (0x1UL << GPIO_IN_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_IN_PIN29_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN29_High (1UL) /*!< Pin input is high */ + +/* Bit 28 : Pin 28 */ +#define GPIO_IN_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_IN_PIN28_Msk (0x1UL << GPIO_IN_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_IN_PIN28_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN28_High (1UL) /*!< Pin input is high */ + +/* Bit 27 : Pin 27 */ +#define GPIO_IN_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_IN_PIN27_Msk (0x1UL << GPIO_IN_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_IN_PIN27_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN27_High (1UL) /*!< Pin input is high */ + +/* Bit 26 : Pin 26 */ +#define GPIO_IN_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_IN_PIN26_Msk (0x1UL << GPIO_IN_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_IN_PIN26_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN26_High (1UL) /*!< Pin input is high */ + +/* Bit 25 : Pin 25 */ +#define GPIO_IN_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_IN_PIN25_Msk (0x1UL << GPIO_IN_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_IN_PIN25_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN25_High (1UL) /*!< Pin input is high */ + +/* Bit 24 : Pin 24 */ +#define GPIO_IN_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_IN_PIN24_Msk (0x1UL << GPIO_IN_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_IN_PIN24_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN24_High (1UL) /*!< Pin input is high */ + +/* Bit 23 : Pin 23 */ +#define GPIO_IN_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_IN_PIN23_Msk (0x1UL << GPIO_IN_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_IN_PIN23_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN23_High (1UL) /*!< Pin input is high */ + +/* Bit 22 : Pin 22 */ +#define GPIO_IN_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_IN_PIN22_Msk (0x1UL << GPIO_IN_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_IN_PIN22_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN22_High (1UL) /*!< Pin input is high */ + +/* Bit 21 : Pin 21 */ +#define GPIO_IN_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_IN_PIN21_Msk (0x1UL << GPIO_IN_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_IN_PIN21_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN21_High (1UL) /*!< Pin input is high */ + +/* Bit 20 : Pin 20 */ +#define GPIO_IN_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_IN_PIN20_Msk (0x1UL << GPIO_IN_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_IN_PIN20_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN20_High (1UL) /*!< Pin input is high */ + +/* Bit 19 : Pin 19 */ +#define GPIO_IN_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_IN_PIN19_Msk (0x1UL << GPIO_IN_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_IN_PIN19_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN19_High (1UL) /*!< Pin input is high */ + +/* Bit 18 : Pin 18 */ +#define GPIO_IN_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_IN_PIN18_Msk (0x1UL << GPIO_IN_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_IN_PIN18_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN18_High (1UL) /*!< Pin input is high */ + +/* Bit 17 : Pin 17 */ +#define GPIO_IN_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_IN_PIN17_Msk (0x1UL << GPIO_IN_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_IN_PIN17_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN17_High (1UL) /*!< Pin input is high */ + +/* Bit 16 : Pin 16 */ +#define GPIO_IN_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_IN_PIN16_Msk (0x1UL << GPIO_IN_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_IN_PIN16_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN16_High (1UL) /*!< Pin input is high */ + +/* Bit 15 : Pin 15 */ +#define GPIO_IN_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_IN_PIN15_Msk (0x1UL << GPIO_IN_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_IN_PIN15_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN15_High (1UL) /*!< Pin input is high */ + +/* Bit 14 : Pin 14 */ +#define GPIO_IN_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_IN_PIN14_Msk (0x1UL << GPIO_IN_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_IN_PIN14_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN14_High (1UL) /*!< Pin input is high */ + +/* Bit 13 : Pin 13 */ +#define GPIO_IN_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_IN_PIN13_Msk (0x1UL << GPIO_IN_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_IN_PIN13_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN13_High (1UL) /*!< Pin input is high */ + +/* Bit 12 : Pin 12 */ +#define GPIO_IN_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_IN_PIN12_Msk (0x1UL << GPIO_IN_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_IN_PIN12_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN12_High (1UL) /*!< Pin input is high */ + +/* Bit 11 : Pin 11 */ +#define GPIO_IN_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_IN_PIN11_Msk (0x1UL << GPIO_IN_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_IN_PIN11_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN11_High (1UL) /*!< Pin input is high */ + +/* Bit 10 : Pin 10 */ +#define GPIO_IN_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_IN_PIN10_Msk (0x1UL << GPIO_IN_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_IN_PIN10_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN10_High (1UL) /*!< Pin input is high */ + +/* Bit 9 : Pin 9 */ +#define GPIO_IN_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_IN_PIN9_Msk (0x1UL << GPIO_IN_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_IN_PIN9_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN9_High (1UL) /*!< Pin input is high */ + +/* Bit 8 : Pin 8 */ +#define GPIO_IN_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_IN_PIN8_Msk (0x1UL << GPIO_IN_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_IN_PIN8_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN8_High (1UL) /*!< Pin input is high */ + +/* Bit 7 : Pin 7 */ +#define GPIO_IN_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_IN_PIN7_Msk (0x1UL << GPIO_IN_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_IN_PIN7_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN7_High (1UL) /*!< Pin input is high */ + +/* Bit 6 : Pin 6 */ +#define GPIO_IN_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_IN_PIN6_Msk (0x1UL << GPIO_IN_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_IN_PIN6_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN6_High (1UL) /*!< Pin input is high */ + +/* Bit 5 : Pin 5 */ +#define GPIO_IN_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_IN_PIN5_Msk (0x1UL << GPIO_IN_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_IN_PIN5_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN5_High (1UL) /*!< Pin input is high */ + +/* Bit 4 : Pin 4 */ +#define GPIO_IN_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_IN_PIN4_Msk (0x1UL << GPIO_IN_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_IN_PIN4_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN4_High (1UL) /*!< Pin input is high */ + +/* Bit 3 : Pin 3 */ +#define GPIO_IN_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_IN_PIN3_Msk (0x1UL << GPIO_IN_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_IN_PIN3_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN3_High (1UL) /*!< Pin input is high */ + +/* Bit 2 : Pin 2 */ +#define GPIO_IN_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_IN_PIN2_Msk (0x1UL << GPIO_IN_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_IN_PIN2_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN2_High (1UL) /*!< Pin input is high */ + +/* Bit 1 : Pin 1 */ +#define GPIO_IN_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_IN_PIN1_Msk (0x1UL << GPIO_IN_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_IN_PIN1_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN1_High (1UL) /*!< Pin input is high */ + +/* Bit 0 : Pin 0 */ +#define GPIO_IN_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_IN_PIN0_Msk (0x1UL << GPIO_IN_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_IN_PIN0_Low (0UL) /*!< Pin input is low */ +#define GPIO_IN_PIN0_High (1UL) /*!< Pin input is high */ + +/* Register: GPIO_DIR */ +/* Description: Direction of GPIO pins */ + +/* Bit 31 : Pin 31 */ +#define GPIO_DIR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_DIR_PIN31_Msk (0x1UL << GPIO_DIR_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_DIR_PIN31_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN31_Output (1UL) /*!< Pin set as output */ + +/* Bit 30 : Pin 30 */ +#define GPIO_DIR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_DIR_PIN30_Msk (0x1UL << GPIO_DIR_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_DIR_PIN30_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN30_Output (1UL) /*!< Pin set as output */ + +/* Bit 29 : Pin 29 */ +#define GPIO_DIR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_DIR_PIN29_Msk (0x1UL << GPIO_DIR_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_DIR_PIN29_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN29_Output (1UL) /*!< Pin set as output */ + +/* Bit 28 : Pin 28 */ +#define GPIO_DIR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_DIR_PIN28_Msk (0x1UL << GPIO_DIR_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_DIR_PIN28_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN28_Output (1UL) /*!< Pin set as output */ + +/* Bit 27 : Pin 27 */ +#define GPIO_DIR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_DIR_PIN27_Msk (0x1UL << GPIO_DIR_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_DIR_PIN27_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN27_Output (1UL) /*!< Pin set as output */ + +/* Bit 26 : Pin 26 */ +#define GPIO_DIR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_DIR_PIN26_Msk (0x1UL << GPIO_DIR_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_DIR_PIN26_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN26_Output (1UL) /*!< Pin set as output */ + +/* Bit 25 : Pin 25 */ +#define GPIO_DIR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_DIR_PIN25_Msk (0x1UL << GPIO_DIR_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_DIR_PIN25_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN25_Output (1UL) /*!< Pin set as output */ + +/* Bit 24 : Pin 24 */ +#define GPIO_DIR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_DIR_PIN24_Msk (0x1UL << GPIO_DIR_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_DIR_PIN24_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN24_Output (1UL) /*!< Pin set as output */ + +/* Bit 23 : Pin 23 */ +#define GPIO_DIR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_DIR_PIN23_Msk (0x1UL << GPIO_DIR_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_DIR_PIN23_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN23_Output (1UL) /*!< Pin set as output */ + +/* Bit 22 : Pin 22 */ +#define GPIO_DIR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_DIR_PIN22_Msk (0x1UL << GPIO_DIR_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_DIR_PIN22_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN22_Output (1UL) /*!< Pin set as output */ + +/* Bit 21 : Pin 21 */ +#define GPIO_DIR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_DIR_PIN21_Msk (0x1UL << GPIO_DIR_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_DIR_PIN21_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN21_Output (1UL) /*!< Pin set as output */ + +/* Bit 20 : Pin 20 */ +#define GPIO_DIR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_DIR_PIN20_Msk (0x1UL << GPIO_DIR_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_DIR_PIN20_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN20_Output (1UL) /*!< Pin set as output */ + +/* Bit 19 : Pin 19 */ +#define GPIO_DIR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_DIR_PIN19_Msk (0x1UL << GPIO_DIR_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_DIR_PIN19_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN19_Output (1UL) /*!< Pin set as output */ + +/* Bit 18 : Pin 18 */ +#define GPIO_DIR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_DIR_PIN18_Msk (0x1UL << GPIO_DIR_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_DIR_PIN18_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN18_Output (1UL) /*!< Pin set as output */ + +/* Bit 17 : Pin 17 */ +#define GPIO_DIR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_DIR_PIN17_Msk (0x1UL << GPIO_DIR_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_DIR_PIN17_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN17_Output (1UL) /*!< Pin set as output */ + +/* Bit 16 : Pin 16 */ +#define GPIO_DIR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_DIR_PIN16_Msk (0x1UL << GPIO_DIR_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_DIR_PIN16_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN16_Output (1UL) /*!< Pin set as output */ + +/* Bit 15 : Pin 15 */ +#define GPIO_DIR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_DIR_PIN15_Msk (0x1UL << GPIO_DIR_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_DIR_PIN15_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN15_Output (1UL) /*!< Pin set as output */ + +/* Bit 14 : Pin 14 */ +#define GPIO_DIR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_DIR_PIN14_Msk (0x1UL << GPIO_DIR_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_DIR_PIN14_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN14_Output (1UL) /*!< Pin set as output */ + +/* Bit 13 : Pin 13 */ +#define GPIO_DIR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_DIR_PIN13_Msk (0x1UL << GPIO_DIR_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_DIR_PIN13_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN13_Output (1UL) /*!< Pin set as output */ + +/* Bit 12 : Pin 12 */ +#define GPIO_DIR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_DIR_PIN12_Msk (0x1UL << GPIO_DIR_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_DIR_PIN12_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN12_Output (1UL) /*!< Pin set as output */ + +/* Bit 11 : Pin 11 */ +#define GPIO_DIR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_DIR_PIN11_Msk (0x1UL << GPIO_DIR_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_DIR_PIN11_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN11_Output (1UL) /*!< Pin set as output */ + +/* Bit 10 : Pin 10 */ +#define GPIO_DIR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_DIR_PIN10_Msk (0x1UL << GPIO_DIR_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_DIR_PIN10_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN10_Output (1UL) /*!< Pin set as output */ + +/* Bit 9 : Pin 9 */ +#define GPIO_DIR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_DIR_PIN9_Msk (0x1UL << GPIO_DIR_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_DIR_PIN9_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN9_Output (1UL) /*!< Pin set as output */ + +/* Bit 8 : Pin 8 */ +#define GPIO_DIR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_DIR_PIN8_Msk (0x1UL << GPIO_DIR_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_DIR_PIN8_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN8_Output (1UL) /*!< Pin set as output */ + +/* Bit 7 : Pin 7 */ +#define GPIO_DIR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_DIR_PIN7_Msk (0x1UL << GPIO_DIR_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_DIR_PIN7_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN7_Output (1UL) /*!< Pin set as output */ + +/* Bit 6 : Pin 6 */ +#define GPIO_DIR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_DIR_PIN6_Msk (0x1UL << GPIO_DIR_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_DIR_PIN6_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN6_Output (1UL) /*!< Pin set as output */ + +/* Bit 5 : Pin 5 */ +#define GPIO_DIR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_DIR_PIN5_Msk (0x1UL << GPIO_DIR_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_DIR_PIN5_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN5_Output (1UL) /*!< Pin set as output */ + +/* Bit 4 : Pin 4 */ +#define GPIO_DIR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_DIR_PIN4_Msk (0x1UL << GPIO_DIR_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_DIR_PIN4_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN4_Output (1UL) /*!< Pin set as output */ + +/* Bit 3 : Pin 3 */ +#define GPIO_DIR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_DIR_PIN3_Msk (0x1UL << GPIO_DIR_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_DIR_PIN3_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN3_Output (1UL) /*!< Pin set as output */ + +/* Bit 2 : Pin 2 */ +#define GPIO_DIR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_DIR_PIN2_Msk (0x1UL << GPIO_DIR_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_DIR_PIN2_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN2_Output (1UL) /*!< Pin set as output */ + +/* Bit 1 : Pin 1 */ +#define GPIO_DIR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_DIR_PIN1_Msk (0x1UL << GPIO_DIR_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_DIR_PIN1_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN1_Output (1UL) /*!< Pin set as output */ + +/* Bit 0 : Pin 0 */ +#define GPIO_DIR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_DIR_PIN0_Msk (0x1UL << GPIO_DIR_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_DIR_PIN0_Input (0UL) /*!< Pin set as input */ +#define GPIO_DIR_PIN0_Output (1UL) /*!< Pin set as output */ + +/* Register: GPIO_DIRSET */ +/* Description: DIR set register */ + +/* Bit 31 : Set as output pin 31 */ +#define GPIO_DIRSET_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_DIRSET_PIN31_Msk (0x1UL << GPIO_DIRSET_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_DIRSET_PIN31_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN31_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN31_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 30 : Set as output pin 30 */ +#define GPIO_DIRSET_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_DIRSET_PIN30_Msk (0x1UL << GPIO_DIRSET_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_DIRSET_PIN30_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN30_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN30_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 29 : Set as output pin 29 */ +#define GPIO_DIRSET_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_DIRSET_PIN29_Msk (0x1UL << GPIO_DIRSET_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_DIRSET_PIN29_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN29_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN29_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 28 : Set as output pin 28 */ +#define GPIO_DIRSET_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_DIRSET_PIN28_Msk (0x1UL << GPIO_DIRSET_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_DIRSET_PIN28_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN28_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN28_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 27 : Set as output pin 27 */ +#define GPIO_DIRSET_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_DIRSET_PIN27_Msk (0x1UL << GPIO_DIRSET_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_DIRSET_PIN27_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN27_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN27_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 26 : Set as output pin 26 */ +#define GPIO_DIRSET_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_DIRSET_PIN26_Msk (0x1UL << GPIO_DIRSET_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_DIRSET_PIN26_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN26_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN26_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 25 : Set as output pin 25 */ +#define GPIO_DIRSET_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_DIRSET_PIN25_Msk (0x1UL << GPIO_DIRSET_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_DIRSET_PIN25_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN25_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN25_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 24 : Set as output pin 24 */ +#define GPIO_DIRSET_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_DIRSET_PIN24_Msk (0x1UL << GPIO_DIRSET_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_DIRSET_PIN24_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN24_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN24_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 23 : Set as output pin 23 */ +#define GPIO_DIRSET_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_DIRSET_PIN23_Msk (0x1UL << GPIO_DIRSET_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_DIRSET_PIN23_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN23_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN23_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 22 : Set as output pin 22 */ +#define GPIO_DIRSET_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_DIRSET_PIN22_Msk (0x1UL << GPIO_DIRSET_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_DIRSET_PIN22_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN22_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN22_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 21 : Set as output pin 21 */ +#define GPIO_DIRSET_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_DIRSET_PIN21_Msk (0x1UL << GPIO_DIRSET_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_DIRSET_PIN21_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN21_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN21_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 20 : Set as output pin 20 */ +#define GPIO_DIRSET_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_DIRSET_PIN20_Msk (0x1UL << GPIO_DIRSET_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_DIRSET_PIN20_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN20_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN20_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 19 : Set as output pin 19 */ +#define GPIO_DIRSET_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_DIRSET_PIN19_Msk (0x1UL << GPIO_DIRSET_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_DIRSET_PIN19_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN19_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN19_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 18 : Set as output pin 18 */ +#define GPIO_DIRSET_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_DIRSET_PIN18_Msk (0x1UL << GPIO_DIRSET_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_DIRSET_PIN18_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN18_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN18_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 17 : Set as output pin 17 */ +#define GPIO_DIRSET_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_DIRSET_PIN17_Msk (0x1UL << GPIO_DIRSET_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_DIRSET_PIN17_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN17_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN17_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 16 : Set as output pin 16 */ +#define GPIO_DIRSET_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_DIRSET_PIN16_Msk (0x1UL << GPIO_DIRSET_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_DIRSET_PIN16_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN16_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN16_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 15 : Set as output pin 15 */ +#define GPIO_DIRSET_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_DIRSET_PIN15_Msk (0x1UL << GPIO_DIRSET_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_DIRSET_PIN15_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN15_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN15_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 14 : Set as output pin 14 */ +#define GPIO_DIRSET_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_DIRSET_PIN14_Msk (0x1UL << GPIO_DIRSET_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_DIRSET_PIN14_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN14_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN14_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 13 : Set as output pin 13 */ +#define GPIO_DIRSET_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_DIRSET_PIN13_Msk (0x1UL << GPIO_DIRSET_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_DIRSET_PIN13_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN13_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN13_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 12 : Set as output pin 12 */ +#define GPIO_DIRSET_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_DIRSET_PIN12_Msk (0x1UL << GPIO_DIRSET_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_DIRSET_PIN12_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN12_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN12_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 11 : Set as output pin 11 */ +#define GPIO_DIRSET_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_DIRSET_PIN11_Msk (0x1UL << GPIO_DIRSET_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_DIRSET_PIN11_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN11_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN11_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 10 : Set as output pin 10 */ +#define GPIO_DIRSET_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_DIRSET_PIN10_Msk (0x1UL << GPIO_DIRSET_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_DIRSET_PIN10_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN10_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN10_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 9 : Set as output pin 9 */ +#define GPIO_DIRSET_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_DIRSET_PIN9_Msk (0x1UL << GPIO_DIRSET_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_DIRSET_PIN9_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN9_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN9_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 8 : Set as output pin 8 */ +#define GPIO_DIRSET_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_DIRSET_PIN8_Msk (0x1UL << GPIO_DIRSET_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_DIRSET_PIN8_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN8_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN8_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 7 : Set as output pin 7 */ +#define GPIO_DIRSET_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_DIRSET_PIN7_Msk (0x1UL << GPIO_DIRSET_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_DIRSET_PIN7_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN7_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN7_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 6 : Set as output pin 6 */ +#define GPIO_DIRSET_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_DIRSET_PIN6_Msk (0x1UL << GPIO_DIRSET_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_DIRSET_PIN6_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN6_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN6_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 5 : Set as output pin 5 */ +#define GPIO_DIRSET_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_DIRSET_PIN5_Msk (0x1UL << GPIO_DIRSET_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_DIRSET_PIN5_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN5_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN5_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 4 : Set as output pin 4 */ +#define GPIO_DIRSET_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_DIRSET_PIN4_Msk (0x1UL << GPIO_DIRSET_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_DIRSET_PIN4_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN4_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN4_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 3 : Set as output pin 3 */ +#define GPIO_DIRSET_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_DIRSET_PIN3_Msk (0x1UL << GPIO_DIRSET_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_DIRSET_PIN3_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN3_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN3_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 2 : Set as output pin 2 */ +#define GPIO_DIRSET_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_DIRSET_PIN2_Msk (0x1UL << GPIO_DIRSET_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_DIRSET_PIN2_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN2_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN2_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 1 : Set as output pin 1 */ +#define GPIO_DIRSET_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_DIRSET_PIN1_Msk (0x1UL << GPIO_DIRSET_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_DIRSET_PIN1_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN1_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN1_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Bit 0 : Set as output pin 0 */ +#define GPIO_DIRSET_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_DIRSET_PIN0_Msk (0x1UL << GPIO_DIRSET_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_DIRSET_PIN0_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRSET_PIN0_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRSET_PIN0_Set (1UL) /*!< Write: writing a '1' sets pin to output; writing a '0' has no effect */ + +/* Register: GPIO_DIRCLR */ +/* Description: DIR clear register */ + +/* Bit 31 : Set as input pin 31 */ +#define GPIO_DIRCLR_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_DIRCLR_PIN31_Msk (0x1UL << GPIO_DIRCLR_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_DIRCLR_PIN31_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN31_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN31_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 30 : Set as input pin 30 */ +#define GPIO_DIRCLR_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_DIRCLR_PIN30_Msk (0x1UL << GPIO_DIRCLR_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_DIRCLR_PIN30_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN30_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN30_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 29 : Set as input pin 29 */ +#define GPIO_DIRCLR_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_DIRCLR_PIN29_Msk (0x1UL << GPIO_DIRCLR_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_DIRCLR_PIN29_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN29_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN29_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 28 : Set as input pin 28 */ +#define GPIO_DIRCLR_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_DIRCLR_PIN28_Msk (0x1UL << GPIO_DIRCLR_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_DIRCLR_PIN28_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN28_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN28_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 27 : Set as input pin 27 */ +#define GPIO_DIRCLR_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_DIRCLR_PIN27_Msk (0x1UL << GPIO_DIRCLR_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_DIRCLR_PIN27_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN27_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN27_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 26 : Set as input pin 26 */ +#define GPIO_DIRCLR_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_DIRCLR_PIN26_Msk (0x1UL << GPIO_DIRCLR_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_DIRCLR_PIN26_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN26_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN26_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 25 : Set as input pin 25 */ +#define GPIO_DIRCLR_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_DIRCLR_PIN25_Msk (0x1UL << GPIO_DIRCLR_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_DIRCLR_PIN25_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN25_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN25_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 24 : Set as input pin 24 */ +#define GPIO_DIRCLR_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_DIRCLR_PIN24_Msk (0x1UL << GPIO_DIRCLR_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_DIRCLR_PIN24_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN24_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN24_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 23 : Set as input pin 23 */ +#define GPIO_DIRCLR_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_DIRCLR_PIN23_Msk (0x1UL << GPIO_DIRCLR_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_DIRCLR_PIN23_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN23_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN23_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 22 : Set as input pin 22 */ +#define GPIO_DIRCLR_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_DIRCLR_PIN22_Msk (0x1UL << GPIO_DIRCLR_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_DIRCLR_PIN22_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN22_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN22_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 21 : Set as input pin 21 */ +#define GPIO_DIRCLR_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_DIRCLR_PIN21_Msk (0x1UL << GPIO_DIRCLR_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_DIRCLR_PIN21_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN21_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN21_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 20 : Set as input pin 20 */ +#define GPIO_DIRCLR_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_DIRCLR_PIN20_Msk (0x1UL << GPIO_DIRCLR_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_DIRCLR_PIN20_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN20_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN20_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 19 : Set as input pin 19 */ +#define GPIO_DIRCLR_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_DIRCLR_PIN19_Msk (0x1UL << GPIO_DIRCLR_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_DIRCLR_PIN19_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN19_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN19_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 18 : Set as input pin 18 */ +#define GPIO_DIRCLR_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_DIRCLR_PIN18_Msk (0x1UL << GPIO_DIRCLR_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_DIRCLR_PIN18_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN18_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN18_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 17 : Set as input pin 17 */ +#define GPIO_DIRCLR_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_DIRCLR_PIN17_Msk (0x1UL << GPIO_DIRCLR_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_DIRCLR_PIN17_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN17_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN17_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 16 : Set as input pin 16 */ +#define GPIO_DIRCLR_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_DIRCLR_PIN16_Msk (0x1UL << GPIO_DIRCLR_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_DIRCLR_PIN16_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN16_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN16_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 15 : Set as input pin 15 */ +#define GPIO_DIRCLR_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_DIRCLR_PIN15_Msk (0x1UL << GPIO_DIRCLR_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_DIRCLR_PIN15_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN15_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN15_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 14 : Set as input pin 14 */ +#define GPIO_DIRCLR_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_DIRCLR_PIN14_Msk (0x1UL << GPIO_DIRCLR_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_DIRCLR_PIN14_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN14_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN14_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 13 : Set as input pin 13 */ +#define GPIO_DIRCLR_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_DIRCLR_PIN13_Msk (0x1UL << GPIO_DIRCLR_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_DIRCLR_PIN13_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN13_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN13_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 12 : Set as input pin 12 */ +#define GPIO_DIRCLR_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_DIRCLR_PIN12_Msk (0x1UL << GPIO_DIRCLR_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_DIRCLR_PIN12_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN12_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN12_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 11 : Set as input pin 11 */ +#define GPIO_DIRCLR_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_DIRCLR_PIN11_Msk (0x1UL << GPIO_DIRCLR_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_DIRCLR_PIN11_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN11_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN11_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 10 : Set as input pin 10 */ +#define GPIO_DIRCLR_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_DIRCLR_PIN10_Msk (0x1UL << GPIO_DIRCLR_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_DIRCLR_PIN10_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN10_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN10_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 9 : Set as input pin 9 */ +#define GPIO_DIRCLR_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_DIRCLR_PIN9_Msk (0x1UL << GPIO_DIRCLR_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_DIRCLR_PIN9_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN9_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN9_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 8 : Set as input pin 8 */ +#define GPIO_DIRCLR_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_DIRCLR_PIN8_Msk (0x1UL << GPIO_DIRCLR_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_DIRCLR_PIN8_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN8_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN8_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 7 : Set as input pin 7 */ +#define GPIO_DIRCLR_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_DIRCLR_PIN7_Msk (0x1UL << GPIO_DIRCLR_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_DIRCLR_PIN7_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN7_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN7_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 6 : Set as input pin 6 */ +#define GPIO_DIRCLR_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_DIRCLR_PIN6_Msk (0x1UL << GPIO_DIRCLR_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_DIRCLR_PIN6_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN6_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN6_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 5 : Set as input pin 5 */ +#define GPIO_DIRCLR_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_DIRCLR_PIN5_Msk (0x1UL << GPIO_DIRCLR_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_DIRCLR_PIN5_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN5_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN5_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 4 : Set as input pin 4 */ +#define GPIO_DIRCLR_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_DIRCLR_PIN4_Msk (0x1UL << GPIO_DIRCLR_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_DIRCLR_PIN4_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN4_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN4_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 3 : Set as input pin 3 */ +#define GPIO_DIRCLR_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_DIRCLR_PIN3_Msk (0x1UL << GPIO_DIRCLR_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_DIRCLR_PIN3_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN3_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN3_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 2 : Set as input pin 2 */ +#define GPIO_DIRCLR_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_DIRCLR_PIN2_Msk (0x1UL << GPIO_DIRCLR_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_DIRCLR_PIN2_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN2_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN2_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 1 : Set as input pin 1 */ +#define GPIO_DIRCLR_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_DIRCLR_PIN1_Msk (0x1UL << GPIO_DIRCLR_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_DIRCLR_PIN1_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN1_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN1_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Bit 0 : Set as input pin 0 */ +#define GPIO_DIRCLR_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_DIRCLR_PIN0_Msk (0x1UL << GPIO_DIRCLR_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_DIRCLR_PIN0_Input (0UL) /*!< Read: pin set as input */ +#define GPIO_DIRCLR_PIN0_Output (1UL) /*!< Read: pin set as output */ +#define GPIO_DIRCLR_PIN0_Clear (1UL) /*!< Write: writing a '1' sets pin to input; writing a '0' has no effect */ + +/* Register: GPIO_LATCH */ +/* Description: Latch register indicating what GPIO pins that have met the criteria set in the PIN_CNF[n].SENSE registers */ + +/* Bit 31 : Status on whether PIN31 has met criteria set in PIN_CNF31.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN31_Pos (31UL) /*!< Position of PIN31 field. */ +#define GPIO_LATCH_PIN31_Msk (0x1UL << GPIO_LATCH_PIN31_Pos) /*!< Bit mask of PIN31 field. */ +#define GPIO_LATCH_PIN31_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN31_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 30 : Status on whether PIN30 has met criteria set in PIN_CNF30.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN30_Pos (30UL) /*!< Position of PIN30 field. */ +#define GPIO_LATCH_PIN30_Msk (0x1UL << GPIO_LATCH_PIN30_Pos) /*!< Bit mask of PIN30 field. */ +#define GPIO_LATCH_PIN30_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN30_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 29 : Status on whether PIN29 has met criteria set in PIN_CNF29.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN29_Pos (29UL) /*!< Position of PIN29 field. */ +#define GPIO_LATCH_PIN29_Msk (0x1UL << GPIO_LATCH_PIN29_Pos) /*!< Bit mask of PIN29 field. */ +#define GPIO_LATCH_PIN29_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN29_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 28 : Status on whether PIN28 has met criteria set in PIN_CNF28.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN28_Pos (28UL) /*!< Position of PIN28 field. */ +#define GPIO_LATCH_PIN28_Msk (0x1UL << GPIO_LATCH_PIN28_Pos) /*!< Bit mask of PIN28 field. */ +#define GPIO_LATCH_PIN28_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN28_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 27 : Status on whether PIN27 has met criteria set in PIN_CNF27.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN27_Pos (27UL) /*!< Position of PIN27 field. */ +#define GPIO_LATCH_PIN27_Msk (0x1UL << GPIO_LATCH_PIN27_Pos) /*!< Bit mask of PIN27 field. */ +#define GPIO_LATCH_PIN27_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN27_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 26 : Status on whether PIN26 has met criteria set in PIN_CNF26.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN26_Pos (26UL) /*!< Position of PIN26 field. */ +#define GPIO_LATCH_PIN26_Msk (0x1UL << GPIO_LATCH_PIN26_Pos) /*!< Bit mask of PIN26 field. */ +#define GPIO_LATCH_PIN26_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN26_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 25 : Status on whether PIN25 has met criteria set in PIN_CNF25.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN25_Pos (25UL) /*!< Position of PIN25 field. */ +#define GPIO_LATCH_PIN25_Msk (0x1UL << GPIO_LATCH_PIN25_Pos) /*!< Bit mask of PIN25 field. */ +#define GPIO_LATCH_PIN25_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN25_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 24 : Status on whether PIN24 has met criteria set in PIN_CNF24.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN24_Pos (24UL) /*!< Position of PIN24 field. */ +#define GPIO_LATCH_PIN24_Msk (0x1UL << GPIO_LATCH_PIN24_Pos) /*!< Bit mask of PIN24 field. */ +#define GPIO_LATCH_PIN24_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN24_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 23 : Status on whether PIN23 has met criteria set in PIN_CNF23.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN23_Pos (23UL) /*!< Position of PIN23 field. */ +#define GPIO_LATCH_PIN23_Msk (0x1UL << GPIO_LATCH_PIN23_Pos) /*!< Bit mask of PIN23 field. */ +#define GPIO_LATCH_PIN23_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN23_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 22 : Status on whether PIN22 has met criteria set in PIN_CNF22.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN22_Pos (22UL) /*!< Position of PIN22 field. */ +#define GPIO_LATCH_PIN22_Msk (0x1UL << GPIO_LATCH_PIN22_Pos) /*!< Bit mask of PIN22 field. */ +#define GPIO_LATCH_PIN22_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN22_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 21 : Status on whether PIN21 has met criteria set in PIN_CNF21.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN21_Pos (21UL) /*!< Position of PIN21 field. */ +#define GPIO_LATCH_PIN21_Msk (0x1UL << GPIO_LATCH_PIN21_Pos) /*!< Bit mask of PIN21 field. */ +#define GPIO_LATCH_PIN21_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN21_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 20 : Status on whether PIN20 has met criteria set in PIN_CNF20.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN20_Pos (20UL) /*!< Position of PIN20 field. */ +#define GPIO_LATCH_PIN20_Msk (0x1UL << GPIO_LATCH_PIN20_Pos) /*!< Bit mask of PIN20 field. */ +#define GPIO_LATCH_PIN20_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN20_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 19 : Status on whether PIN19 has met criteria set in PIN_CNF19.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN19_Pos (19UL) /*!< Position of PIN19 field. */ +#define GPIO_LATCH_PIN19_Msk (0x1UL << GPIO_LATCH_PIN19_Pos) /*!< Bit mask of PIN19 field. */ +#define GPIO_LATCH_PIN19_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN19_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 18 : Status on whether PIN18 has met criteria set in PIN_CNF18.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN18_Pos (18UL) /*!< Position of PIN18 field. */ +#define GPIO_LATCH_PIN18_Msk (0x1UL << GPIO_LATCH_PIN18_Pos) /*!< Bit mask of PIN18 field. */ +#define GPIO_LATCH_PIN18_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN18_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 17 : Status on whether PIN17 has met criteria set in PIN_CNF17.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN17_Pos (17UL) /*!< Position of PIN17 field. */ +#define GPIO_LATCH_PIN17_Msk (0x1UL << GPIO_LATCH_PIN17_Pos) /*!< Bit mask of PIN17 field. */ +#define GPIO_LATCH_PIN17_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN17_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 16 : Status on whether PIN16 has met criteria set in PIN_CNF16.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN16_Pos (16UL) /*!< Position of PIN16 field. */ +#define GPIO_LATCH_PIN16_Msk (0x1UL << GPIO_LATCH_PIN16_Pos) /*!< Bit mask of PIN16 field. */ +#define GPIO_LATCH_PIN16_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN16_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 15 : Status on whether PIN15 has met criteria set in PIN_CNF15.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN15_Pos (15UL) /*!< Position of PIN15 field. */ +#define GPIO_LATCH_PIN15_Msk (0x1UL << GPIO_LATCH_PIN15_Pos) /*!< Bit mask of PIN15 field. */ +#define GPIO_LATCH_PIN15_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN15_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 14 : Status on whether PIN14 has met criteria set in PIN_CNF14.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN14_Pos (14UL) /*!< Position of PIN14 field. */ +#define GPIO_LATCH_PIN14_Msk (0x1UL << GPIO_LATCH_PIN14_Pos) /*!< Bit mask of PIN14 field. */ +#define GPIO_LATCH_PIN14_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN14_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 13 : Status on whether PIN13 has met criteria set in PIN_CNF13.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN13_Pos (13UL) /*!< Position of PIN13 field. */ +#define GPIO_LATCH_PIN13_Msk (0x1UL << GPIO_LATCH_PIN13_Pos) /*!< Bit mask of PIN13 field. */ +#define GPIO_LATCH_PIN13_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN13_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 12 : Status on whether PIN12 has met criteria set in PIN_CNF12.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN12_Pos (12UL) /*!< Position of PIN12 field. */ +#define GPIO_LATCH_PIN12_Msk (0x1UL << GPIO_LATCH_PIN12_Pos) /*!< Bit mask of PIN12 field. */ +#define GPIO_LATCH_PIN12_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN12_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 11 : Status on whether PIN11 has met criteria set in PIN_CNF11.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN11_Pos (11UL) /*!< Position of PIN11 field. */ +#define GPIO_LATCH_PIN11_Msk (0x1UL << GPIO_LATCH_PIN11_Pos) /*!< Bit mask of PIN11 field. */ +#define GPIO_LATCH_PIN11_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN11_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 10 : Status on whether PIN10 has met criteria set in PIN_CNF10.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN10_Pos (10UL) /*!< Position of PIN10 field. */ +#define GPIO_LATCH_PIN10_Msk (0x1UL << GPIO_LATCH_PIN10_Pos) /*!< Bit mask of PIN10 field. */ +#define GPIO_LATCH_PIN10_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN10_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 9 : Status on whether PIN9 has met criteria set in PIN_CNF9.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN9_Pos (9UL) /*!< Position of PIN9 field. */ +#define GPIO_LATCH_PIN9_Msk (0x1UL << GPIO_LATCH_PIN9_Pos) /*!< Bit mask of PIN9 field. */ +#define GPIO_LATCH_PIN9_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN9_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 8 : Status on whether PIN8 has met criteria set in PIN_CNF8.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN8_Pos (8UL) /*!< Position of PIN8 field. */ +#define GPIO_LATCH_PIN8_Msk (0x1UL << GPIO_LATCH_PIN8_Pos) /*!< Bit mask of PIN8 field. */ +#define GPIO_LATCH_PIN8_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN8_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 7 : Status on whether PIN7 has met criteria set in PIN_CNF7.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN7_Pos (7UL) /*!< Position of PIN7 field. */ +#define GPIO_LATCH_PIN7_Msk (0x1UL << GPIO_LATCH_PIN7_Pos) /*!< Bit mask of PIN7 field. */ +#define GPIO_LATCH_PIN7_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN7_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 6 : Status on whether PIN6 has met criteria set in PIN_CNF6.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN6_Pos (6UL) /*!< Position of PIN6 field. */ +#define GPIO_LATCH_PIN6_Msk (0x1UL << GPIO_LATCH_PIN6_Pos) /*!< Bit mask of PIN6 field. */ +#define GPIO_LATCH_PIN6_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN6_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 5 : Status on whether PIN5 has met criteria set in PIN_CNF5.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN5_Pos (5UL) /*!< Position of PIN5 field. */ +#define GPIO_LATCH_PIN5_Msk (0x1UL << GPIO_LATCH_PIN5_Pos) /*!< Bit mask of PIN5 field. */ +#define GPIO_LATCH_PIN5_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN5_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 4 : Status on whether PIN4 has met criteria set in PIN_CNF4.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN4_Pos (4UL) /*!< Position of PIN4 field. */ +#define GPIO_LATCH_PIN4_Msk (0x1UL << GPIO_LATCH_PIN4_Pos) /*!< Bit mask of PIN4 field. */ +#define GPIO_LATCH_PIN4_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN4_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 3 : Status on whether PIN3 has met criteria set in PIN_CNF3.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN3_Pos (3UL) /*!< Position of PIN3 field. */ +#define GPIO_LATCH_PIN3_Msk (0x1UL << GPIO_LATCH_PIN3_Pos) /*!< Bit mask of PIN3 field. */ +#define GPIO_LATCH_PIN3_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN3_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 2 : Status on whether PIN2 has met criteria set in PIN_CNF2.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN2_Pos (2UL) /*!< Position of PIN2 field. */ +#define GPIO_LATCH_PIN2_Msk (0x1UL << GPIO_LATCH_PIN2_Pos) /*!< Bit mask of PIN2 field. */ +#define GPIO_LATCH_PIN2_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN2_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 1 : Status on whether PIN1 has met criteria set in PIN_CNF1.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN1_Pos (1UL) /*!< Position of PIN1 field. */ +#define GPIO_LATCH_PIN1_Msk (0x1UL << GPIO_LATCH_PIN1_Pos) /*!< Bit mask of PIN1 field. */ +#define GPIO_LATCH_PIN1_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN1_Latched (1UL) /*!< Criteria has been met */ + +/* Bit 0 : Status on whether PIN0 has met criteria set in PIN_CNF0.SENSE register. Write '1' to clear. */ +#define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ +#define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. */ +#define GPIO_LATCH_PIN0_NotLatched (0UL) /*!< Criteria has not been met */ +#define GPIO_LATCH_PIN0_Latched (1UL) /*!< Criteria has been met */ + +/* Register: GPIO_DETECTMODE */ +/* Description: Select between default DETECT signal behaviour and LDETECT mode */ + +/* Bit 0 : Select between default DETECT signal behaviour and LDETECT mode */ +#define GPIO_DETECTMODE_DETECTMODE_Pos (0UL) /*!< Position of DETECTMODE field. */ +#define GPIO_DETECTMODE_DETECTMODE_Msk (0x1UL << GPIO_DETECTMODE_DETECTMODE_Pos) /*!< Bit mask of DETECTMODE field. */ +#define GPIO_DETECTMODE_DETECTMODE_Default (0UL) /*!< DETECT directly connected to PIN DETECT signals */ +#define GPIO_DETECTMODE_DETECTMODE_LDETECT (1UL) /*!< Use the latched LDETECT behaviour */ + +/* Register: GPIO_PIN_CNF */ +/* Description: Description collection[0]: Configuration of GPIO pins */ + +/* Bits 17..16 : Pin sensing mechanism */ +#define GPIO_PIN_CNF_SENSE_Pos (16UL) /*!< Position of SENSE field. */ +#define GPIO_PIN_CNF_SENSE_Msk (0x3UL << GPIO_PIN_CNF_SENSE_Pos) /*!< Bit mask of SENSE field. */ +#define GPIO_PIN_CNF_SENSE_Disabled (0UL) /*!< Disabled */ +#define GPIO_PIN_CNF_SENSE_High (2UL) /*!< Sense for high level */ +#define GPIO_PIN_CNF_SENSE_Low (3UL) /*!< Sense for low level */ + +/* Bits 10..8 : Drive configuration */ +#define GPIO_PIN_CNF_DRIVE_Pos (8UL) /*!< Position of DRIVE field. */ +#define GPIO_PIN_CNF_DRIVE_Msk (0x7UL << GPIO_PIN_CNF_DRIVE_Pos) /*!< Bit mask of DRIVE field. */ +#define GPIO_PIN_CNF_DRIVE_S0S1 (0UL) /*!< Standard '0', standard '1' */ +#define GPIO_PIN_CNF_DRIVE_H0S1 (1UL) /*!< High drive '0', standard '1' */ +#define GPIO_PIN_CNF_DRIVE_S0H1 (2UL) /*!< Standard '0', high drive '1' */ +#define GPIO_PIN_CNF_DRIVE_H0H1 (3UL) /*!< High drive '0', high 'drive '1'' */ +#define GPIO_PIN_CNF_DRIVE_D0S1 (4UL) /*!< Disconnect '0' standard '1' (normally used for wired-or connections) */ +#define GPIO_PIN_CNF_DRIVE_D0H1 (5UL) /*!< Disconnect '0', high drive '1' (normally used for wired-or connections) */ +#define GPIO_PIN_CNF_DRIVE_S0D1 (6UL) /*!< Standard '0'. disconnect '1' (normally used for wired-and connections) */ +#define GPIO_PIN_CNF_DRIVE_H0D1 (7UL) /*!< High drive '0', disconnect '1' (normally used for wired-and connections) */ + +/* Bits 3..2 : Pull configuration */ +#define GPIO_PIN_CNF_PULL_Pos (2UL) /*!< Position of PULL field. */ +#define GPIO_PIN_CNF_PULL_Msk (0x3UL << GPIO_PIN_CNF_PULL_Pos) /*!< Bit mask of PULL field. */ +#define GPIO_PIN_CNF_PULL_Disabled (0UL) /*!< No pull */ +#define GPIO_PIN_CNF_PULL_Pulldown (1UL) /*!< Pull down on pin */ +#define GPIO_PIN_CNF_PULL_Pullup (3UL) /*!< Pull up on pin */ + +/* Bit 1 : Connect or disconnect input buffer */ +#define GPIO_PIN_CNF_INPUT_Pos (1UL) /*!< Position of INPUT field. */ +#define GPIO_PIN_CNF_INPUT_Msk (0x1UL << GPIO_PIN_CNF_INPUT_Pos) /*!< Bit mask of INPUT field. */ +#define GPIO_PIN_CNF_INPUT_Connect (0UL) /*!< Connect input buffer */ +#define GPIO_PIN_CNF_INPUT_Disconnect (1UL) /*!< Disconnect input buffer */ + +/* Bit 0 : Pin direction. Same physical register as DIR register */ +#define GPIO_PIN_CNF_DIR_Pos (0UL) /*!< Position of DIR field. */ +#define GPIO_PIN_CNF_DIR_Msk (0x1UL << GPIO_PIN_CNF_DIR_Pos) /*!< Bit mask of DIR field. */ +#define GPIO_PIN_CNF_DIR_Input (0UL) /*!< Configure pin as an input pin */ +#define GPIO_PIN_CNF_DIR_Output (1UL) /*!< Configure pin as an output pin */ + + +/* Peripheral: PDM */ +/* Description: Pulse Density Modulation (Digital Microphone) Interface */ + +/* Register: PDM_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 2 : Enable or disable interrupt for END event */ +#define PDM_INTEN_END_Pos (2UL) /*!< Position of END field. */ +#define PDM_INTEN_END_Msk (0x1UL << PDM_INTEN_END_Pos) /*!< Bit mask of END field. */ +#define PDM_INTEN_END_Disabled (0UL) /*!< Disable */ +#define PDM_INTEN_END_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for STOPPED event */ +#define PDM_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define PDM_INTEN_STOPPED_Msk (0x1UL << PDM_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define PDM_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ +#define PDM_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable interrupt for STARTED event */ +#define PDM_INTEN_STARTED_Pos (0UL) /*!< Position of STARTED field. */ +#define PDM_INTEN_STARTED_Msk (0x1UL << PDM_INTEN_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define PDM_INTEN_STARTED_Disabled (0UL) /*!< Disable */ +#define PDM_INTEN_STARTED_Enabled (1UL) /*!< Enable */ + +/* Register: PDM_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 2 : Write '1' to Enable interrupt for END event */ +#define PDM_INTENSET_END_Pos (2UL) /*!< Position of END field. */ +#define PDM_INTENSET_END_Msk (0x1UL << PDM_INTENSET_END_Pos) /*!< Bit mask of END field. */ +#define PDM_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ +#define PDM_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ +#define PDM_INTENSET_END_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for STOPPED event */ +#define PDM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define PDM_INTENSET_STOPPED_Msk (0x1UL << PDM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define PDM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define PDM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define PDM_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for STARTED event */ +#define PDM_INTENSET_STARTED_Pos (0UL) /*!< Position of STARTED field. */ +#define PDM_INTENSET_STARTED_Msk (0x1UL << PDM_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define PDM_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */ +#define PDM_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */ +#define PDM_INTENSET_STARTED_Set (1UL) /*!< Enable */ + +/* Register: PDM_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 2 : Write '1' to Disable interrupt for END event */ +#define PDM_INTENCLR_END_Pos (2UL) /*!< Position of END field. */ +#define PDM_INTENCLR_END_Msk (0x1UL << PDM_INTENCLR_END_Pos) /*!< Bit mask of END field. */ +#define PDM_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ +#define PDM_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ +#define PDM_INTENCLR_END_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for STOPPED event */ +#define PDM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define PDM_INTENCLR_STOPPED_Msk (0x1UL << PDM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define PDM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define PDM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define PDM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for STARTED event */ +#define PDM_INTENCLR_STARTED_Pos (0UL) /*!< Position of STARTED field. */ +#define PDM_INTENCLR_STARTED_Msk (0x1UL << PDM_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define PDM_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */ +#define PDM_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */ +#define PDM_INTENCLR_STARTED_Clear (1UL) /*!< Disable */ + +/* Register: PDM_ENABLE */ +/* Description: PDM module enable register */ + +/* Bit 0 : Enable or disable PDM module */ +#define PDM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define PDM_ENABLE_ENABLE_Msk (0x1UL << PDM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define PDM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ +#define PDM_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */ + +/* Register: PDM_PDMCLKCTRL */ +/* Description: PDM clock generator control */ + +/* Bits 31..0 : PDM_CLK frequency */ +#define PDM_PDMCLKCTRL_FREQ_Pos (0UL) /*!< Position of FREQ field. */ +#define PDM_PDMCLKCTRL_FREQ_Msk (0xFFFFFFFFUL << PDM_PDMCLKCTRL_FREQ_Pos) /*!< Bit mask of FREQ field. */ +#define PDM_PDMCLKCTRL_FREQ_1000K (0x08000000UL) /*!< PDM_CLK = 32 MHz / 32 = 1.000 MHz */ +#define PDM_PDMCLKCTRL_FREQ_Default (0x08400000UL) /*!< PDM_CLK = 32 MHz / 31 = 1.032 MHz */ +#define PDM_PDMCLKCTRL_FREQ_1067K (0x08800000UL) /*!< PDM_CLK = 32 MHz / 30 = 1.067 MHz */ + +/* Register: PDM_MODE */ +/* Description: Defines the routing of the connected PDM microphones' signals */ + +/* Bit 1 : Defines on which PDM_CLK edge Left (or mono) is sampled */ +#define PDM_MODE_EDGE_Pos (1UL) /*!< Position of EDGE field. */ +#define PDM_MODE_EDGE_Msk (0x1UL << PDM_MODE_EDGE_Pos) /*!< Bit mask of EDGE field. */ +#define PDM_MODE_EDGE_LeftFalling (0UL) /*!< Left (or mono) is sampled on falling edge of PDM_CLK */ +#define PDM_MODE_EDGE_LeftRising (1UL) /*!< Left (or mono) is sampled on rising edge of PDM_CLK */ + +/* Bit 0 : Mono or stereo operation */ +#define PDM_MODE_OPERATION_Pos (0UL) /*!< Position of OPERATION field. */ +#define PDM_MODE_OPERATION_Msk (0x1UL << PDM_MODE_OPERATION_Pos) /*!< Bit mask of OPERATION field. */ +#define PDM_MODE_OPERATION_Stereo (0UL) /*!< Sample and store one pair (Left + Right) of 16bit samples per RAM word R=[31:16]; L=[15:0] */ +#define PDM_MODE_OPERATION_Mono (1UL) /*!< Sample and store two successive Left samples (16 bit each) per RAM word L1=[31:16]; L0=[15:0] */ + +/* Register: PDM_GAINL */ +/* Description: Left output gain adjustment */ + +/* Bits 6..0 : Left output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters) 0x00 -20 dB gain adjust 0x01 -19.5 dB gain adjust (...) 0x27 -0.5 dB gain adjust 0x28 0 dB gain adjust 0x29 +0.5 dB gain adjust (...) 0x4F +19.5 dB gain adjust 0x50 +20 dB gain adjust */ +#define PDM_GAINL_GAINL_Pos (0UL) /*!< Position of GAINL field. */ +#define PDM_GAINL_GAINL_Msk (0x7FUL << PDM_GAINL_GAINL_Pos) /*!< Bit mask of GAINL field. */ +#define PDM_GAINL_GAINL_MinGain (0x00UL) /*!< -20dB gain adjustment (minimum) */ +#define PDM_GAINL_GAINL_DefaultGain (0x28UL) /*!< 0dB gain adjustment ('2500 RMS' requirement) */ +#define PDM_GAINL_GAINL_MaxGain (0x50UL) /*!< +20dB gain adjustment (maximum) */ + +/* Register: PDM_GAINR */ +/* Description: Right output gain adjustment */ + +/* Bits 7..0 : Right output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters) */ +#define PDM_GAINR_GAINR_Pos (0UL) /*!< Position of GAINR field. */ +#define PDM_GAINR_GAINR_Msk (0xFFUL << PDM_GAINR_GAINR_Pos) /*!< Bit mask of GAINR field. */ +#define PDM_GAINR_GAINR_MinGain (0x00UL) /*!< -20dB gain adjustment (minimum) */ +#define PDM_GAINR_GAINR_DefaultGain (0x28UL) /*!< 0dB gain adjustment ('2500 RMS' requirement) */ +#define PDM_GAINR_GAINR_MaxGain (0x50UL) /*!< +20dB gain adjustment (maximum) */ + +/* Register: PDM_PSEL_CLK */ +/* Description: Pin number configuration for PDM CLK signal */ + +/* Bit 31 : Connection */ +#define PDM_PSEL_CLK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define PDM_PSEL_CLK_CONNECT_Msk (0x1UL << PDM_PSEL_CLK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define PDM_PSEL_CLK_CONNECT_Connected (0UL) /*!< Connect */ +#define PDM_PSEL_CLK_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define PDM_PSEL_CLK_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define PDM_PSEL_CLK_PIN_Msk (0x1FUL << PDM_PSEL_CLK_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: PDM_PSEL_DIN */ +/* Description: Pin number configuration for PDM DIN signal */ + +/* Bit 31 : Connection */ +#define PDM_PSEL_DIN_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define PDM_PSEL_DIN_CONNECT_Msk (0x1UL << PDM_PSEL_DIN_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define PDM_PSEL_DIN_CONNECT_Connected (0UL) /*!< Connect */ +#define PDM_PSEL_DIN_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define PDM_PSEL_DIN_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define PDM_PSEL_DIN_PIN_Msk (0x1FUL << PDM_PSEL_DIN_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: PDM_SAMPLE_PTR */ +/* Description: RAM address pointer to write samples to with EasyDMA */ + +/* Bits 31..0 : Address to write PDM samples to over DMA */ +#define PDM_SAMPLE_PTR_SAMPLEPTR_Pos (0UL) /*!< Position of SAMPLEPTR field. */ +#define PDM_SAMPLE_PTR_SAMPLEPTR_Msk (0xFFFFFFFFUL << PDM_SAMPLE_PTR_SAMPLEPTR_Pos) /*!< Bit mask of SAMPLEPTR field. */ + +/* Register: PDM_SAMPLE_MAXCNT */ +/* Description: Number of samples to allocate memory for in EasyDMA mode */ + +/* Bits 14..0 : Length of DMA RAM allocation in number of samples */ +#define PDM_SAMPLE_MAXCNT_BUFFSIZE_Pos (0UL) /*!< Position of BUFFSIZE field. */ +#define PDM_SAMPLE_MAXCNT_BUFFSIZE_Msk (0x7FFFUL << PDM_SAMPLE_MAXCNT_BUFFSIZE_Pos) /*!< Bit mask of BUFFSIZE field. */ + + +/* Peripheral: POWER */ +/* Description: Power control */ + +/* Register: POWER_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 6 : Write '1' to Enable interrupt for SLEEPEXIT event */ +#define POWER_INTENSET_SLEEPEXIT_Pos (6UL) /*!< Position of SLEEPEXIT field. */ +#define POWER_INTENSET_SLEEPEXIT_Msk (0x1UL << POWER_INTENSET_SLEEPEXIT_Pos) /*!< Bit mask of SLEEPEXIT field. */ +#define POWER_INTENSET_SLEEPEXIT_Disabled (0UL) /*!< Read: Disabled */ +#define POWER_INTENSET_SLEEPEXIT_Enabled (1UL) /*!< Read: Enabled */ +#define POWER_INTENSET_SLEEPEXIT_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to Enable interrupt for SLEEPENTER event */ +#define POWER_INTENSET_SLEEPENTER_Pos (5UL) /*!< Position of SLEEPENTER field. */ +#define POWER_INTENSET_SLEEPENTER_Msk (0x1UL << POWER_INTENSET_SLEEPENTER_Pos) /*!< Bit mask of SLEEPENTER field. */ +#define POWER_INTENSET_SLEEPENTER_Disabled (0UL) /*!< Read: Disabled */ +#define POWER_INTENSET_SLEEPENTER_Enabled (1UL) /*!< Read: Enabled */ +#define POWER_INTENSET_SLEEPENTER_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable interrupt for POFWARN event */ +#define POWER_INTENSET_POFWARN_Pos (2UL) /*!< Position of POFWARN field. */ +#define POWER_INTENSET_POFWARN_Msk (0x1UL << POWER_INTENSET_POFWARN_Pos) /*!< Bit mask of POFWARN field. */ +#define POWER_INTENSET_POFWARN_Disabled (0UL) /*!< Read: Disabled */ +#define POWER_INTENSET_POFWARN_Enabled (1UL) /*!< Read: Enabled */ +#define POWER_INTENSET_POFWARN_Set (1UL) /*!< Enable */ + +/* Register: POWER_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 6 : Write '1' to Disable interrupt for SLEEPEXIT event */ +#define POWER_INTENCLR_SLEEPEXIT_Pos (6UL) /*!< Position of SLEEPEXIT field. */ +#define POWER_INTENCLR_SLEEPEXIT_Msk (0x1UL << POWER_INTENCLR_SLEEPEXIT_Pos) /*!< Bit mask of SLEEPEXIT field. */ +#define POWER_INTENCLR_SLEEPEXIT_Disabled (0UL) /*!< Read: Disabled */ +#define POWER_INTENCLR_SLEEPEXIT_Enabled (1UL) /*!< Read: Enabled */ +#define POWER_INTENCLR_SLEEPEXIT_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to Disable interrupt for SLEEPENTER event */ +#define POWER_INTENCLR_SLEEPENTER_Pos (5UL) /*!< Position of SLEEPENTER field. */ +#define POWER_INTENCLR_SLEEPENTER_Msk (0x1UL << POWER_INTENCLR_SLEEPENTER_Pos) /*!< Bit mask of SLEEPENTER field. */ +#define POWER_INTENCLR_SLEEPENTER_Disabled (0UL) /*!< Read: Disabled */ +#define POWER_INTENCLR_SLEEPENTER_Enabled (1UL) /*!< Read: Enabled */ +#define POWER_INTENCLR_SLEEPENTER_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable interrupt for POFWARN event */ +#define POWER_INTENCLR_POFWARN_Pos (2UL) /*!< Position of POFWARN field. */ +#define POWER_INTENCLR_POFWARN_Msk (0x1UL << POWER_INTENCLR_POFWARN_Pos) /*!< Bit mask of POFWARN field. */ +#define POWER_INTENCLR_POFWARN_Disabled (0UL) /*!< Read: Disabled */ +#define POWER_INTENCLR_POFWARN_Enabled (1UL) /*!< Read: Enabled */ +#define POWER_INTENCLR_POFWARN_Clear (1UL) /*!< Disable */ + +/* Register: POWER_RESETREAS */ +/* Description: Reset reason */ + +/* Bit 19 : Reset due to wake up from System OFF mode by NFC field detect */ +#define POWER_RESETREAS_NFC_Pos (19UL) /*!< Position of NFC field. */ +#define POWER_RESETREAS_NFC_Msk (0x1UL << POWER_RESETREAS_NFC_Pos) /*!< Bit mask of NFC field. */ +#define POWER_RESETREAS_NFC_NotDetected (0UL) /*!< Not detected */ +#define POWER_RESETREAS_NFC_Detected (1UL) /*!< Detected */ + +/* Bit 18 : Reset due to wake up from System OFF mode when wakeup is triggered from entering into debug interface mode */ +#define POWER_RESETREAS_DIF_Pos (18UL) /*!< Position of DIF field. */ +#define POWER_RESETREAS_DIF_Msk (0x1UL << POWER_RESETREAS_DIF_Pos) /*!< Bit mask of DIF field. */ +#define POWER_RESETREAS_DIF_NotDetected (0UL) /*!< Not detected */ +#define POWER_RESETREAS_DIF_Detected (1UL) /*!< Detected */ + +/* Bit 17 : Reset due to wake up from System OFF mode when wakeup is triggered from ANADETECT signal from LPCOMP */ +#define POWER_RESETREAS_LPCOMP_Pos (17UL) /*!< Position of LPCOMP field. */ +#define POWER_RESETREAS_LPCOMP_Msk (0x1UL << POWER_RESETREAS_LPCOMP_Pos) /*!< Bit mask of LPCOMP field. */ +#define POWER_RESETREAS_LPCOMP_NotDetected (0UL) /*!< Not detected */ +#define POWER_RESETREAS_LPCOMP_Detected (1UL) /*!< Detected */ + +/* Bit 16 : Reset due to wake up from System OFF mode when wakeup is triggered from DETECT signal from GPIO */ +#define POWER_RESETREAS_OFF_Pos (16UL) /*!< Position of OFF field. */ +#define POWER_RESETREAS_OFF_Msk (0x1UL << POWER_RESETREAS_OFF_Pos) /*!< Bit mask of OFF field. */ +#define POWER_RESETREAS_OFF_NotDetected (0UL) /*!< Not detected */ +#define POWER_RESETREAS_OFF_Detected (1UL) /*!< Detected */ + +/* Bit 3 : Reset from CPU lock-up detected */ +#define POWER_RESETREAS_LOCKUP_Pos (3UL) /*!< Position of LOCKUP field. */ +#define POWER_RESETREAS_LOCKUP_Msk (0x1UL << POWER_RESETREAS_LOCKUP_Pos) /*!< Bit mask of LOCKUP field. */ +#define POWER_RESETREAS_LOCKUP_NotDetected (0UL) /*!< Not detected */ +#define POWER_RESETREAS_LOCKUP_Detected (1UL) /*!< Detected */ + +/* Bit 2 : Reset from soft reset detected */ +#define POWER_RESETREAS_SREQ_Pos (2UL) /*!< Position of SREQ field. */ +#define POWER_RESETREAS_SREQ_Msk (0x1UL << POWER_RESETREAS_SREQ_Pos) /*!< Bit mask of SREQ field. */ +#define POWER_RESETREAS_SREQ_NotDetected (0UL) /*!< Not detected */ +#define POWER_RESETREAS_SREQ_Detected (1UL) /*!< Detected */ + +/* Bit 1 : Reset from watchdog detected */ +#define POWER_RESETREAS_DOG_Pos (1UL) /*!< Position of DOG field. */ +#define POWER_RESETREAS_DOG_Msk (0x1UL << POWER_RESETREAS_DOG_Pos) /*!< Bit mask of DOG field. */ +#define POWER_RESETREAS_DOG_NotDetected (0UL) /*!< Not detected */ +#define POWER_RESETREAS_DOG_Detected (1UL) /*!< Detected */ + +/* Bit 0 : Reset from pin-reset detected */ +#define POWER_RESETREAS_RESETPIN_Pos (0UL) /*!< Position of RESETPIN field. */ +#define POWER_RESETREAS_RESETPIN_Msk (0x1UL << POWER_RESETREAS_RESETPIN_Pos) /*!< Bit mask of RESETPIN field. */ +#define POWER_RESETREAS_RESETPIN_NotDetected (0UL) /*!< Not detected */ +#define POWER_RESETREAS_RESETPIN_Detected (1UL) /*!< Detected */ + +/* Register: POWER_RAMSTATUS */ +/* Description: Deprecated register - RAM status register */ + +/* Bit 3 : RAM block 3 is on or off/powering up */ +#define POWER_RAMSTATUS_RAMBLOCK3_Pos (3UL) /*!< Position of RAMBLOCK3 field. */ +#define POWER_RAMSTATUS_RAMBLOCK3_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK3_Pos) /*!< Bit mask of RAMBLOCK3 field. */ +#define POWER_RAMSTATUS_RAMBLOCK3_Off (0UL) /*!< Off */ +#define POWER_RAMSTATUS_RAMBLOCK3_On (1UL) /*!< On */ + +/* Bit 2 : RAM block 2 is on or off/powering up */ +#define POWER_RAMSTATUS_RAMBLOCK2_Pos (2UL) /*!< Position of RAMBLOCK2 field. */ +#define POWER_RAMSTATUS_RAMBLOCK2_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK2_Pos) /*!< Bit mask of RAMBLOCK2 field. */ +#define POWER_RAMSTATUS_RAMBLOCK2_Off (0UL) /*!< Off */ +#define POWER_RAMSTATUS_RAMBLOCK2_On (1UL) /*!< On */ + +/* Bit 1 : RAM block 1 is on or off/powering up */ +#define POWER_RAMSTATUS_RAMBLOCK1_Pos (1UL) /*!< Position of RAMBLOCK1 field. */ +#define POWER_RAMSTATUS_RAMBLOCK1_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK1_Pos) /*!< Bit mask of RAMBLOCK1 field. */ +#define POWER_RAMSTATUS_RAMBLOCK1_Off (0UL) /*!< Off */ +#define POWER_RAMSTATUS_RAMBLOCK1_On (1UL) /*!< On */ + +/* Bit 0 : RAM block 0 is on or off/powering up */ +#define POWER_RAMSTATUS_RAMBLOCK0_Pos (0UL) /*!< Position of RAMBLOCK0 field. */ +#define POWER_RAMSTATUS_RAMBLOCK0_Msk (0x1UL << POWER_RAMSTATUS_RAMBLOCK0_Pos) /*!< Bit mask of RAMBLOCK0 field. */ +#define POWER_RAMSTATUS_RAMBLOCK0_Off (0UL) /*!< Off */ +#define POWER_RAMSTATUS_RAMBLOCK0_On (1UL) /*!< On */ + +/* Register: POWER_SYSTEMOFF */ +/* Description: System OFF register */ + +/* Bit 0 : Enable System OFF mode */ +#define POWER_SYSTEMOFF_SYSTEMOFF_Pos (0UL) /*!< Position of SYSTEMOFF field. */ +#define POWER_SYSTEMOFF_SYSTEMOFF_Msk (0x1UL << POWER_SYSTEMOFF_SYSTEMOFF_Pos) /*!< Bit mask of SYSTEMOFF field. */ +#define POWER_SYSTEMOFF_SYSTEMOFF_Enter (1UL) /*!< Enable System OFF mode */ + +/* Register: POWER_POFCON */ +/* Description: Power failure comparator configuration */ + +/* Bits 4..1 : Power failure comparator threshold setting */ +#define POWER_POFCON_THRESHOLD_Pos (1UL) /*!< Position of THRESHOLD field. */ +#define POWER_POFCON_THRESHOLD_Msk (0xFUL << POWER_POFCON_THRESHOLD_Pos) /*!< Bit mask of THRESHOLD field. */ +#define POWER_POFCON_THRESHOLD_V17 (4UL) /*!< Set threshold to 1.7 V */ +#define POWER_POFCON_THRESHOLD_V18 (5UL) /*!< Set threshold to 1.8 V */ +#define POWER_POFCON_THRESHOLD_V19 (6UL) /*!< Set threshold to 1.9 V */ +#define POWER_POFCON_THRESHOLD_V20 (7UL) /*!< Set threshold to 2.0 V */ +#define POWER_POFCON_THRESHOLD_V21 (8UL) /*!< Set threshold to 2.1 V */ +#define POWER_POFCON_THRESHOLD_V22 (9UL) /*!< Set threshold to 2.2 V */ +#define POWER_POFCON_THRESHOLD_V23 (10UL) /*!< Set threshold to 2.3 V */ +#define POWER_POFCON_THRESHOLD_V24 (11UL) /*!< Set threshold to 2.4 V */ +#define POWER_POFCON_THRESHOLD_V25 (12UL) /*!< Set threshold to 2.5 V */ +#define POWER_POFCON_THRESHOLD_V26 (13UL) /*!< Set threshold to 2.6 V */ +#define POWER_POFCON_THRESHOLD_V27 (14UL) /*!< Set threshold to 2.7 V */ +#define POWER_POFCON_THRESHOLD_V28 (15UL) /*!< Set threshold to 2.8 V */ + +/* Bit 0 : Enable or disable power failure comparator */ +#define POWER_POFCON_POF_Pos (0UL) /*!< Position of POF field. */ +#define POWER_POFCON_POF_Msk (0x1UL << POWER_POFCON_POF_Pos) /*!< Bit mask of POF field. */ +#define POWER_POFCON_POF_Disabled (0UL) /*!< Disable */ +#define POWER_POFCON_POF_Enabled (1UL) /*!< Enable */ + +/* Register: POWER_GPREGRET */ +/* Description: General purpose retention register */ + +/* Bits 7..0 : General purpose retention register */ +#define POWER_GPREGRET_GPREGRET_Pos (0UL) /*!< Position of GPREGRET field. */ +#define POWER_GPREGRET_GPREGRET_Msk (0xFFUL << POWER_GPREGRET_GPREGRET_Pos) /*!< Bit mask of GPREGRET field. */ + +/* Register: POWER_GPREGRET2 */ +/* Description: General purpose retention register */ + +/* Bits 7..0 : General purpose retention register */ +#define POWER_GPREGRET2_GPREGRET_Pos (0UL) /*!< Position of GPREGRET field. */ +#define POWER_GPREGRET2_GPREGRET_Msk (0xFFUL << POWER_GPREGRET2_GPREGRET_Pos) /*!< Bit mask of GPREGRET field. */ + +/* Register: POWER_RAMON */ +/* Description: Deprecated register - RAM on/off register (this register is retained) */ + +/* Bit 17 : Keep retention on RAM block 1 when RAM block is switched off */ +#define POWER_RAMON_OFFRAM1_Pos (17UL) /*!< Position of OFFRAM1 field. */ +#define POWER_RAMON_OFFRAM1_Msk (0x1UL << POWER_RAMON_OFFRAM1_Pos) /*!< Bit mask of OFFRAM1 field. */ +#define POWER_RAMON_OFFRAM1_RAM1Off (0UL) /*!< Off */ +#define POWER_RAMON_OFFRAM1_RAM1On (1UL) /*!< On */ + +/* Bit 16 : Keep retention on RAM block 0 when RAM block is switched off */ +#define POWER_RAMON_OFFRAM0_Pos (16UL) /*!< Position of OFFRAM0 field. */ +#define POWER_RAMON_OFFRAM0_Msk (0x1UL << POWER_RAMON_OFFRAM0_Pos) /*!< Bit mask of OFFRAM0 field. */ +#define POWER_RAMON_OFFRAM0_RAM0Off (0UL) /*!< Off */ +#define POWER_RAMON_OFFRAM0_RAM0On (1UL) /*!< On */ + +/* Bit 1 : Keep RAM block 1 on or off in system ON Mode */ +#define POWER_RAMON_ONRAM1_Pos (1UL) /*!< Position of ONRAM1 field. */ +#define POWER_RAMON_ONRAM1_Msk (0x1UL << POWER_RAMON_ONRAM1_Pos) /*!< Bit mask of ONRAM1 field. */ +#define POWER_RAMON_ONRAM1_RAM1Off (0UL) /*!< Off */ +#define POWER_RAMON_ONRAM1_RAM1On (1UL) /*!< On */ + +/* Bit 0 : Keep RAM block 0 on or off in system ON Mode */ +#define POWER_RAMON_ONRAM0_Pos (0UL) /*!< Position of ONRAM0 field. */ +#define POWER_RAMON_ONRAM0_Msk (0x1UL << POWER_RAMON_ONRAM0_Pos) /*!< Bit mask of ONRAM0 field. */ +#define POWER_RAMON_ONRAM0_RAM0Off (0UL) /*!< Off */ +#define POWER_RAMON_ONRAM0_RAM0On (1UL) /*!< On */ + +/* Register: POWER_RAMONB */ +/* Description: Deprecated register - RAM on/off register (this register is retained) */ + +/* Bit 17 : Keep retention on RAM block 3 when RAM block is switched off */ +#define POWER_RAMONB_OFFRAM3_Pos (17UL) /*!< Position of OFFRAM3 field. */ +#define POWER_RAMONB_OFFRAM3_Msk (0x1UL << POWER_RAMONB_OFFRAM3_Pos) /*!< Bit mask of OFFRAM3 field. */ +#define POWER_RAMONB_OFFRAM3_RAM3Off (0UL) /*!< Off */ +#define POWER_RAMONB_OFFRAM3_RAM3On (1UL) /*!< On */ + +/* Bit 16 : Keep retention on RAM block 2 when RAM block is switched off */ +#define POWER_RAMONB_OFFRAM2_Pos (16UL) /*!< Position of OFFRAM2 field. */ +#define POWER_RAMONB_OFFRAM2_Msk (0x1UL << POWER_RAMONB_OFFRAM2_Pos) /*!< Bit mask of OFFRAM2 field. */ +#define POWER_RAMONB_OFFRAM2_RAM2Off (0UL) /*!< Off */ +#define POWER_RAMONB_OFFRAM2_RAM2On (1UL) /*!< On */ + +/* Bit 1 : Keep RAM block 3 on or off in system ON Mode */ +#define POWER_RAMONB_ONRAM3_Pos (1UL) /*!< Position of ONRAM3 field. */ +#define POWER_RAMONB_ONRAM3_Msk (0x1UL << POWER_RAMONB_ONRAM3_Pos) /*!< Bit mask of ONRAM3 field. */ +#define POWER_RAMONB_ONRAM3_RAM3Off (0UL) /*!< Off */ +#define POWER_RAMONB_ONRAM3_RAM3On (1UL) /*!< On */ + +/* Bit 0 : Keep RAM block 2 on or off in system ON Mode */ +#define POWER_RAMONB_ONRAM2_Pos (0UL) /*!< Position of ONRAM2 field. */ +#define POWER_RAMONB_ONRAM2_Msk (0x1UL << POWER_RAMONB_ONRAM2_Pos) /*!< Bit mask of ONRAM2 field. */ +#define POWER_RAMONB_ONRAM2_RAM2Off (0UL) /*!< Off */ +#define POWER_RAMONB_ONRAM2_RAM2On (1UL) /*!< On */ + +/* Register: POWER_DCDCEN */ +/* Description: DC/DC enable register */ + +/* Bit 0 : Enable or disable DC/DC converter */ +#define POWER_DCDCEN_DCDCEN_Pos (0UL) /*!< Position of DCDCEN field. */ +#define POWER_DCDCEN_DCDCEN_Msk (0x1UL << POWER_DCDCEN_DCDCEN_Pos) /*!< Bit mask of DCDCEN field. */ +#define POWER_DCDCEN_DCDCEN_Disabled (0UL) /*!< Disable */ +#define POWER_DCDCEN_DCDCEN_Enabled (1UL) /*!< Enable */ + +/* Register: POWER_RAM_POWER */ +/* Description: Description cluster[0]: RAM0 power control register */ + +/* Bit 17 : Keep retention on RAM section S1 when RAM section is in OFF */ +#define POWER_RAM_POWER_S1RETENTION_Pos (17UL) /*!< Position of S1RETENTION field. */ +#define POWER_RAM_POWER_S1RETENTION_Msk (0x1UL << POWER_RAM_POWER_S1RETENTION_Pos) /*!< Bit mask of S1RETENTION field. */ +#define POWER_RAM_POWER_S1RETENTION_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S1RETENTION_On (1UL) /*!< On */ + +/* Bit 16 : Keep retention on RAM section S0 when RAM section is in OFF */ +#define POWER_RAM_POWER_S0RETENTION_Pos (16UL) /*!< Position of S0RETENTION field. */ +#define POWER_RAM_POWER_S0RETENTION_Msk (0x1UL << POWER_RAM_POWER_S0RETENTION_Pos) /*!< Bit mask of S0RETENTION field. */ +#define POWER_RAM_POWER_S0RETENTION_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S0RETENTION_On (1UL) /*!< On */ + +/* Bit 1 : Keep RAM section S1 ON or OFF in System ON mode. */ +#define POWER_RAM_POWER_S1POWER_Pos (1UL) /*!< Position of S1POWER field. */ +#define POWER_RAM_POWER_S1POWER_Msk (0x1UL << POWER_RAM_POWER_S1POWER_Pos) /*!< Bit mask of S1POWER field. */ +#define POWER_RAM_POWER_S1POWER_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S1POWER_On (1UL) /*!< On */ + +/* Bit 0 : Keep RAM section S0 ON or OFF in System ON mode. */ +#define POWER_RAM_POWER_S0POWER_Pos (0UL) /*!< Position of S0POWER field. */ +#define POWER_RAM_POWER_S0POWER_Msk (0x1UL << POWER_RAM_POWER_S0POWER_Pos) /*!< Bit mask of S0POWER field. */ +#define POWER_RAM_POWER_S0POWER_Off (0UL) /*!< Off */ +#define POWER_RAM_POWER_S0POWER_On (1UL) /*!< On */ + +/* Register: POWER_RAM_POWERSET */ +/* Description: Description cluster[0]: RAM0 power control set register */ + +/* Bit 17 : Keep retention on RAM section S1 when RAM section is switched off */ +#define POWER_RAM_POWERSET_S1RETENTION_Pos (17UL) /*!< Position of S1RETENTION field. */ +#define POWER_RAM_POWERSET_S1RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S1RETENTION_Pos) /*!< Bit mask of S1RETENTION field. */ +#define POWER_RAM_POWERSET_S1RETENTION_On (1UL) /*!< On */ + +/* Bit 16 : Keep retention on RAM section S0 when RAM section is switched off */ +#define POWER_RAM_POWERSET_S0RETENTION_Pos (16UL) /*!< Position of S0RETENTION field. */ +#define POWER_RAM_POWERSET_S0RETENTION_Msk (0x1UL << POWER_RAM_POWERSET_S0RETENTION_Pos) /*!< Bit mask of S0RETENTION field. */ +#define POWER_RAM_POWERSET_S0RETENTION_On (1UL) /*!< On */ + +/* Bit 1 : Keep RAM section S1 of RAM0 on or off in System ON mode */ +#define POWER_RAM_POWERSET_S1POWER_Pos (1UL) /*!< Position of S1POWER field. */ +#define POWER_RAM_POWERSET_S1POWER_Msk (0x1UL << POWER_RAM_POWERSET_S1POWER_Pos) /*!< Bit mask of S1POWER field. */ +#define POWER_RAM_POWERSET_S1POWER_On (1UL) /*!< On */ + +/* Bit 0 : Keep RAM section S0 of RAM0 on or off in System ON mode */ +#define POWER_RAM_POWERSET_S0POWER_Pos (0UL) /*!< Position of S0POWER field. */ +#define POWER_RAM_POWERSET_S0POWER_Msk (0x1UL << POWER_RAM_POWERSET_S0POWER_Pos) /*!< Bit mask of S0POWER field. */ +#define POWER_RAM_POWERSET_S0POWER_On (1UL) /*!< On */ + +/* Register: POWER_RAM_POWERCLR */ +/* Description: Description cluster[0]: RAM0 power control clear register */ + +/* Bit 17 : Keep retention on RAM section S1 when RAM section is switched off */ +#define POWER_RAM_POWERCLR_S1RETENTION_Pos (17UL) /*!< Position of S1RETENTION field. */ +#define POWER_RAM_POWERCLR_S1RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S1RETENTION_Pos) /*!< Bit mask of S1RETENTION field. */ +#define POWER_RAM_POWERCLR_S1RETENTION_Off (1UL) /*!< Off */ + +/* Bit 16 : Keep retention on RAM section S0 when RAM section is switched off */ +#define POWER_RAM_POWERCLR_S0RETENTION_Pos (16UL) /*!< Position of S0RETENTION field. */ +#define POWER_RAM_POWERCLR_S0RETENTION_Msk (0x1UL << POWER_RAM_POWERCLR_S0RETENTION_Pos) /*!< Bit mask of S0RETENTION field. */ +#define POWER_RAM_POWERCLR_S0RETENTION_Off (1UL) /*!< Off */ + +/* Bit 1 : Keep RAM section S1 of RAM0 on or off in System ON mode */ +#define POWER_RAM_POWERCLR_S1POWER_Pos (1UL) /*!< Position of S1POWER field. */ +#define POWER_RAM_POWERCLR_S1POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S1POWER_Pos) /*!< Bit mask of S1POWER field. */ +#define POWER_RAM_POWERCLR_S1POWER_Off (1UL) /*!< Off */ + +/* Bit 0 : Keep RAM section S0 of RAM0 on or off in System ON mode */ +#define POWER_RAM_POWERCLR_S0POWER_Pos (0UL) /*!< Position of S0POWER field. */ +#define POWER_RAM_POWERCLR_S0POWER_Msk (0x1UL << POWER_RAM_POWERCLR_S0POWER_Pos) /*!< Bit mask of S0POWER field. */ +#define POWER_RAM_POWERCLR_S0POWER_Off (1UL) /*!< Off */ + + +/* Peripheral: PPI */ +/* Description: Programmable Peripheral Interconnect */ + +/* Register: PPI_CHEN */ +/* Description: Channel enable register */ + +/* Bit 31 : Enable or disable channel 31 */ +#define PPI_CHEN_CH31_Pos (31UL) /*!< Position of CH31 field. */ +#define PPI_CHEN_CH31_Msk (0x1UL << PPI_CHEN_CH31_Pos) /*!< Bit mask of CH31 field. */ +#define PPI_CHEN_CH31_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH31_Enabled (1UL) /*!< Enable channel */ + +/* Bit 30 : Enable or disable channel 30 */ +#define PPI_CHEN_CH30_Pos (30UL) /*!< Position of CH30 field. */ +#define PPI_CHEN_CH30_Msk (0x1UL << PPI_CHEN_CH30_Pos) /*!< Bit mask of CH30 field. */ +#define PPI_CHEN_CH30_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH30_Enabled (1UL) /*!< Enable channel */ + +/* Bit 29 : Enable or disable channel 29 */ +#define PPI_CHEN_CH29_Pos (29UL) /*!< Position of CH29 field. */ +#define PPI_CHEN_CH29_Msk (0x1UL << PPI_CHEN_CH29_Pos) /*!< Bit mask of CH29 field. */ +#define PPI_CHEN_CH29_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH29_Enabled (1UL) /*!< Enable channel */ + +/* Bit 28 : Enable or disable channel 28 */ +#define PPI_CHEN_CH28_Pos (28UL) /*!< Position of CH28 field. */ +#define PPI_CHEN_CH28_Msk (0x1UL << PPI_CHEN_CH28_Pos) /*!< Bit mask of CH28 field. */ +#define PPI_CHEN_CH28_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH28_Enabled (1UL) /*!< Enable channel */ + +/* Bit 27 : Enable or disable channel 27 */ +#define PPI_CHEN_CH27_Pos (27UL) /*!< Position of CH27 field. */ +#define PPI_CHEN_CH27_Msk (0x1UL << PPI_CHEN_CH27_Pos) /*!< Bit mask of CH27 field. */ +#define PPI_CHEN_CH27_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH27_Enabled (1UL) /*!< Enable channel */ + +/* Bit 26 : Enable or disable channel 26 */ +#define PPI_CHEN_CH26_Pos (26UL) /*!< Position of CH26 field. */ +#define PPI_CHEN_CH26_Msk (0x1UL << PPI_CHEN_CH26_Pos) /*!< Bit mask of CH26 field. */ +#define PPI_CHEN_CH26_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH26_Enabled (1UL) /*!< Enable channel */ + +/* Bit 25 : Enable or disable channel 25 */ +#define PPI_CHEN_CH25_Pos (25UL) /*!< Position of CH25 field. */ +#define PPI_CHEN_CH25_Msk (0x1UL << PPI_CHEN_CH25_Pos) /*!< Bit mask of CH25 field. */ +#define PPI_CHEN_CH25_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH25_Enabled (1UL) /*!< Enable channel */ + +/* Bit 24 : Enable or disable channel 24 */ +#define PPI_CHEN_CH24_Pos (24UL) /*!< Position of CH24 field. */ +#define PPI_CHEN_CH24_Msk (0x1UL << PPI_CHEN_CH24_Pos) /*!< Bit mask of CH24 field. */ +#define PPI_CHEN_CH24_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH24_Enabled (1UL) /*!< Enable channel */ + +/* Bit 23 : Enable or disable channel 23 */ +#define PPI_CHEN_CH23_Pos (23UL) /*!< Position of CH23 field. */ +#define PPI_CHEN_CH23_Msk (0x1UL << PPI_CHEN_CH23_Pos) /*!< Bit mask of CH23 field. */ +#define PPI_CHEN_CH23_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH23_Enabled (1UL) /*!< Enable channel */ + +/* Bit 22 : Enable or disable channel 22 */ +#define PPI_CHEN_CH22_Pos (22UL) /*!< Position of CH22 field. */ +#define PPI_CHEN_CH22_Msk (0x1UL << PPI_CHEN_CH22_Pos) /*!< Bit mask of CH22 field. */ +#define PPI_CHEN_CH22_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH22_Enabled (1UL) /*!< Enable channel */ + +/* Bit 21 : Enable or disable channel 21 */ +#define PPI_CHEN_CH21_Pos (21UL) /*!< Position of CH21 field. */ +#define PPI_CHEN_CH21_Msk (0x1UL << PPI_CHEN_CH21_Pos) /*!< Bit mask of CH21 field. */ +#define PPI_CHEN_CH21_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH21_Enabled (1UL) /*!< Enable channel */ + +/* Bit 20 : Enable or disable channel 20 */ +#define PPI_CHEN_CH20_Pos (20UL) /*!< Position of CH20 field. */ +#define PPI_CHEN_CH20_Msk (0x1UL << PPI_CHEN_CH20_Pos) /*!< Bit mask of CH20 field. */ +#define PPI_CHEN_CH20_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH20_Enabled (1UL) /*!< Enable channel */ + +/* Bit 19 : Enable or disable channel 19 */ +#define PPI_CHEN_CH19_Pos (19UL) /*!< Position of CH19 field. */ +#define PPI_CHEN_CH19_Msk (0x1UL << PPI_CHEN_CH19_Pos) /*!< Bit mask of CH19 field. */ +#define PPI_CHEN_CH19_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH19_Enabled (1UL) /*!< Enable channel */ + +/* Bit 18 : Enable or disable channel 18 */ +#define PPI_CHEN_CH18_Pos (18UL) /*!< Position of CH18 field. */ +#define PPI_CHEN_CH18_Msk (0x1UL << PPI_CHEN_CH18_Pos) /*!< Bit mask of CH18 field. */ +#define PPI_CHEN_CH18_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH18_Enabled (1UL) /*!< Enable channel */ + +/* Bit 17 : Enable or disable channel 17 */ +#define PPI_CHEN_CH17_Pos (17UL) /*!< Position of CH17 field. */ +#define PPI_CHEN_CH17_Msk (0x1UL << PPI_CHEN_CH17_Pos) /*!< Bit mask of CH17 field. */ +#define PPI_CHEN_CH17_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH17_Enabled (1UL) /*!< Enable channel */ + +/* Bit 16 : Enable or disable channel 16 */ +#define PPI_CHEN_CH16_Pos (16UL) /*!< Position of CH16 field. */ +#define PPI_CHEN_CH16_Msk (0x1UL << PPI_CHEN_CH16_Pos) /*!< Bit mask of CH16 field. */ +#define PPI_CHEN_CH16_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH16_Enabled (1UL) /*!< Enable channel */ + +/* Bit 15 : Enable or disable channel 15 */ +#define PPI_CHEN_CH15_Pos (15UL) /*!< Position of CH15 field. */ +#define PPI_CHEN_CH15_Msk (0x1UL << PPI_CHEN_CH15_Pos) /*!< Bit mask of CH15 field. */ +#define PPI_CHEN_CH15_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH15_Enabled (1UL) /*!< Enable channel */ + +/* Bit 14 : Enable or disable channel 14 */ +#define PPI_CHEN_CH14_Pos (14UL) /*!< Position of CH14 field. */ +#define PPI_CHEN_CH14_Msk (0x1UL << PPI_CHEN_CH14_Pos) /*!< Bit mask of CH14 field. */ +#define PPI_CHEN_CH14_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH14_Enabled (1UL) /*!< Enable channel */ + +/* Bit 13 : Enable or disable channel 13 */ +#define PPI_CHEN_CH13_Pos (13UL) /*!< Position of CH13 field. */ +#define PPI_CHEN_CH13_Msk (0x1UL << PPI_CHEN_CH13_Pos) /*!< Bit mask of CH13 field. */ +#define PPI_CHEN_CH13_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH13_Enabled (1UL) /*!< Enable channel */ + +/* Bit 12 : Enable or disable channel 12 */ +#define PPI_CHEN_CH12_Pos (12UL) /*!< Position of CH12 field. */ +#define PPI_CHEN_CH12_Msk (0x1UL << PPI_CHEN_CH12_Pos) /*!< Bit mask of CH12 field. */ +#define PPI_CHEN_CH12_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH12_Enabled (1UL) /*!< Enable channel */ + +/* Bit 11 : Enable or disable channel 11 */ +#define PPI_CHEN_CH11_Pos (11UL) /*!< Position of CH11 field. */ +#define PPI_CHEN_CH11_Msk (0x1UL << PPI_CHEN_CH11_Pos) /*!< Bit mask of CH11 field. */ +#define PPI_CHEN_CH11_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH11_Enabled (1UL) /*!< Enable channel */ + +/* Bit 10 : Enable or disable channel 10 */ +#define PPI_CHEN_CH10_Pos (10UL) /*!< Position of CH10 field. */ +#define PPI_CHEN_CH10_Msk (0x1UL << PPI_CHEN_CH10_Pos) /*!< Bit mask of CH10 field. */ +#define PPI_CHEN_CH10_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH10_Enabled (1UL) /*!< Enable channel */ + +/* Bit 9 : Enable or disable channel 9 */ +#define PPI_CHEN_CH9_Pos (9UL) /*!< Position of CH9 field. */ +#define PPI_CHEN_CH9_Msk (0x1UL << PPI_CHEN_CH9_Pos) /*!< Bit mask of CH9 field. */ +#define PPI_CHEN_CH9_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH9_Enabled (1UL) /*!< Enable channel */ + +/* Bit 8 : Enable or disable channel 8 */ +#define PPI_CHEN_CH8_Pos (8UL) /*!< Position of CH8 field. */ +#define PPI_CHEN_CH8_Msk (0x1UL << PPI_CHEN_CH8_Pos) /*!< Bit mask of CH8 field. */ +#define PPI_CHEN_CH8_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH8_Enabled (1UL) /*!< Enable channel */ + +/* Bit 7 : Enable or disable channel 7 */ +#define PPI_CHEN_CH7_Pos (7UL) /*!< Position of CH7 field. */ +#define PPI_CHEN_CH7_Msk (0x1UL << PPI_CHEN_CH7_Pos) /*!< Bit mask of CH7 field. */ +#define PPI_CHEN_CH7_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH7_Enabled (1UL) /*!< Enable channel */ + +/* Bit 6 : Enable or disable channel 6 */ +#define PPI_CHEN_CH6_Pos (6UL) /*!< Position of CH6 field. */ +#define PPI_CHEN_CH6_Msk (0x1UL << PPI_CHEN_CH6_Pos) /*!< Bit mask of CH6 field. */ +#define PPI_CHEN_CH6_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH6_Enabled (1UL) /*!< Enable channel */ + +/* Bit 5 : Enable or disable channel 5 */ +#define PPI_CHEN_CH5_Pos (5UL) /*!< Position of CH5 field. */ +#define PPI_CHEN_CH5_Msk (0x1UL << PPI_CHEN_CH5_Pos) /*!< Bit mask of CH5 field. */ +#define PPI_CHEN_CH5_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH5_Enabled (1UL) /*!< Enable channel */ + +/* Bit 4 : Enable or disable channel 4 */ +#define PPI_CHEN_CH4_Pos (4UL) /*!< Position of CH4 field. */ +#define PPI_CHEN_CH4_Msk (0x1UL << PPI_CHEN_CH4_Pos) /*!< Bit mask of CH4 field. */ +#define PPI_CHEN_CH4_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH4_Enabled (1UL) /*!< Enable channel */ + +/* Bit 3 : Enable or disable channel 3 */ +#define PPI_CHEN_CH3_Pos (3UL) /*!< Position of CH3 field. */ +#define PPI_CHEN_CH3_Msk (0x1UL << PPI_CHEN_CH3_Pos) /*!< Bit mask of CH3 field. */ +#define PPI_CHEN_CH3_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH3_Enabled (1UL) /*!< Enable channel */ + +/* Bit 2 : Enable or disable channel 2 */ +#define PPI_CHEN_CH2_Pos (2UL) /*!< Position of CH2 field. */ +#define PPI_CHEN_CH2_Msk (0x1UL << PPI_CHEN_CH2_Pos) /*!< Bit mask of CH2 field. */ +#define PPI_CHEN_CH2_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH2_Enabled (1UL) /*!< Enable channel */ + +/* Bit 1 : Enable or disable channel 1 */ +#define PPI_CHEN_CH1_Pos (1UL) /*!< Position of CH1 field. */ +#define PPI_CHEN_CH1_Msk (0x1UL << PPI_CHEN_CH1_Pos) /*!< Bit mask of CH1 field. */ +#define PPI_CHEN_CH1_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH1_Enabled (1UL) /*!< Enable channel */ + +/* Bit 0 : Enable or disable channel 0 */ +#define PPI_CHEN_CH0_Pos (0UL) /*!< Position of CH0 field. */ +#define PPI_CHEN_CH0_Msk (0x1UL << PPI_CHEN_CH0_Pos) /*!< Bit mask of CH0 field. */ +#define PPI_CHEN_CH0_Disabled (0UL) /*!< Disable channel */ +#define PPI_CHEN_CH0_Enabled (1UL) /*!< Enable channel */ + +/* Register: PPI_CHENSET */ +/* Description: Channel enable set register */ + +/* Bit 31 : Channel 31 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH31_Pos (31UL) /*!< Position of CH31 field. */ +#define PPI_CHENSET_CH31_Msk (0x1UL << PPI_CHENSET_CH31_Pos) /*!< Bit mask of CH31 field. */ +#define PPI_CHENSET_CH31_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH31_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH31_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 30 : Channel 30 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH30_Pos (30UL) /*!< Position of CH30 field. */ +#define PPI_CHENSET_CH30_Msk (0x1UL << PPI_CHENSET_CH30_Pos) /*!< Bit mask of CH30 field. */ +#define PPI_CHENSET_CH30_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH30_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH30_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 29 : Channel 29 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH29_Pos (29UL) /*!< Position of CH29 field. */ +#define PPI_CHENSET_CH29_Msk (0x1UL << PPI_CHENSET_CH29_Pos) /*!< Bit mask of CH29 field. */ +#define PPI_CHENSET_CH29_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH29_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH29_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 28 : Channel 28 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH28_Pos (28UL) /*!< Position of CH28 field. */ +#define PPI_CHENSET_CH28_Msk (0x1UL << PPI_CHENSET_CH28_Pos) /*!< Bit mask of CH28 field. */ +#define PPI_CHENSET_CH28_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH28_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH28_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 27 : Channel 27 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH27_Pos (27UL) /*!< Position of CH27 field. */ +#define PPI_CHENSET_CH27_Msk (0x1UL << PPI_CHENSET_CH27_Pos) /*!< Bit mask of CH27 field. */ +#define PPI_CHENSET_CH27_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH27_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH27_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 26 : Channel 26 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH26_Pos (26UL) /*!< Position of CH26 field. */ +#define PPI_CHENSET_CH26_Msk (0x1UL << PPI_CHENSET_CH26_Pos) /*!< Bit mask of CH26 field. */ +#define PPI_CHENSET_CH26_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH26_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH26_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 25 : Channel 25 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH25_Pos (25UL) /*!< Position of CH25 field. */ +#define PPI_CHENSET_CH25_Msk (0x1UL << PPI_CHENSET_CH25_Pos) /*!< Bit mask of CH25 field. */ +#define PPI_CHENSET_CH25_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH25_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH25_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 24 : Channel 24 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH24_Pos (24UL) /*!< Position of CH24 field. */ +#define PPI_CHENSET_CH24_Msk (0x1UL << PPI_CHENSET_CH24_Pos) /*!< Bit mask of CH24 field. */ +#define PPI_CHENSET_CH24_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH24_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH24_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 23 : Channel 23 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH23_Pos (23UL) /*!< Position of CH23 field. */ +#define PPI_CHENSET_CH23_Msk (0x1UL << PPI_CHENSET_CH23_Pos) /*!< Bit mask of CH23 field. */ +#define PPI_CHENSET_CH23_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH23_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH23_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 22 : Channel 22 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH22_Pos (22UL) /*!< Position of CH22 field. */ +#define PPI_CHENSET_CH22_Msk (0x1UL << PPI_CHENSET_CH22_Pos) /*!< Bit mask of CH22 field. */ +#define PPI_CHENSET_CH22_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH22_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH22_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 21 : Channel 21 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH21_Pos (21UL) /*!< Position of CH21 field. */ +#define PPI_CHENSET_CH21_Msk (0x1UL << PPI_CHENSET_CH21_Pos) /*!< Bit mask of CH21 field. */ +#define PPI_CHENSET_CH21_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH21_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH21_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 20 : Channel 20 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH20_Pos (20UL) /*!< Position of CH20 field. */ +#define PPI_CHENSET_CH20_Msk (0x1UL << PPI_CHENSET_CH20_Pos) /*!< Bit mask of CH20 field. */ +#define PPI_CHENSET_CH20_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH20_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH20_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 19 : Channel 19 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH19_Pos (19UL) /*!< Position of CH19 field. */ +#define PPI_CHENSET_CH19_Msk (0x1UL << PPI_CHENSET_CH19_Pos) /*!< Bit mask of CH19 field. */ +#define PPI_CHENSET_CH19_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH19_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH19_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 18 : Channel 18 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH18_Pos (18UL) /*!< Position of CH18 field. */ +#define PPI_CHENSET_CH18_Msk (0x1UL << PPI_CHENSET_CH18_Pos) /*!< Bit mask of CH18 field. */ +#define PPI_CHENSET_CH18_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH18_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH18_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 17 : Channel 17 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH17_Pos (17UL) /*!< Position of CH17 field. */ +#define PPI_CHENSET_CH17_Msk (0x1UL << PPI_CHENSET_CH17_Pos) /*!< Bit mask of CH17 field. */ +#define PPI_CHENSET_CH17_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH17_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH17_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 16 : Channel 16 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH16_Pos (16UL) /*!< Position of CH16 field. */ +#define PPI_CHENSET_CH16_Msk (0x1UL << PPI_CHENSET_CH16_Pos) /*!< Bit mask of CH16 field. */ +#define PPI_CHENSET_CH16_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH16_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH16_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 15 : Channel 15 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH15_Pos (15UL) /*!< Position of CH15 field. */ +#define PPI_CHENSET_CH15_Msk (0x1UL << PPI_CHENSET_CH15_Pos) /*!< Bit mask of CH15 field. */ +#define PPI_CHENSET_CH15_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH15_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH15_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 14 : Channel 14 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH14_Pos (14UL) /*!< Position of CH14 field. */ +#define PPI_CHENSET_CH14_Msk (0x1UL << PPI_CHENSET_CH14_Pos) /*!< Bit mask of CH14 field. */ +#define PPI_CHENSET_CH14_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH14_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH14_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 13 : Channel 13 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH13_Pos (13UL) /*!< Position of CH13 field. */ +#define PPI_CHENSET_CH13_Msk (0x1UL << PPI_CHENSET_CH13_Pos) /*!< Bit mask of CH13 field. */ +#define PPI_CHENSET_CH13_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH13_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH13_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 12 : Channel 12 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH12_Pos (12UL) /*!< Position of CH12 field. */ +#define PPI_CHENSET_CH12_Msk (0x1UL << PPI_CHENSET_CH12_Pos) /*!< Bit mask of CH12 field. */ +#define PPI_CHENSET_CH12_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH12_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH12_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 11 : Channel 11 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH11_Pos (11UL) /*!< Position of CH11 field. */ +#define PPI_CHENSET_CH11_Msk (0x1UL << PPI_CHENSET_CH11_Pos) /*!< Bit mask of CH11 field. */ +#define PPI_CHENSET_CH11_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH11_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH11_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 10 : Channel 10 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH10_Pos (10UL) /*!< Position of CH10 field. */ +#define PPI_CHENSET_CH10_Msk (0x1UL << PPI_CHENSET_CH10_Pos) /*!< Bit mask of CH10 field. */ +#define PPI_CHENSET_CH10_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH10_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH10_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 9 : Channel 9 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH9_Pos (9UL) /*!< Position of CH9 field. */ +#define PPI_CHENSET_CH9_Msk (0x1UL << PPI_CHENSET_CH9_Pos) /*!< Bit mask of CH9 field. */ +#define PPI_CHENSET_CH9_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH9_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH9_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 8 : Channel 8 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH8_Pos (8UL) /*!< Position of CH8 field. */ +#define PPI_CHENSET_CH8_Msk (0x1UL << PPI_CHENSET_CH8_Pos) /*!< Bit mask of CH8 field. */ +#define PPI_CHENSET_CH8_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH8_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH8_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 7 : Channel 7 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH7_Pos (7UL) /*!< Position of CH7 field. */ +#define PPI_CHENSET_CH7_Msk (0x1UL << PPI_CHENSET_CH7_Pos) /*!< Bit mask of CH7 field. */ +#define PPI_CHENSET_CH7_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH7_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH7_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 6 : Channel 6 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH6_Pos (6UL) /*!< Position of CH6 field. */ +#define PPI_CHENSET_CH6_Msk (0x1UL << PPI_CHENSET_CH6_Pos) /*!< Bit mask of CH6 field. */ +#define PPI_CHENSET_CH6_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH6_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH6_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 5 : Channel 5 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH5_Pos (5UL) /*!< Position of CH5 field. */ +#define PPI_CHENSET_CH5_Msk (0x1UL << PPI_CHENSET_CH5_Pos) /*!< Bit mask of CH5 field. */ +#define PPI_CHENSET_CH5_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH5_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH5_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 4 : Channel 4 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH4_Pos (4UL) /*!< Position of CH4 field. */ +#define PPI_CHENSET_CH4_Msk (0x1UL << PPI_CHENSET_CH4_Pos) /*!< Bit mask of CH4 field. */ +#define PPI_CHENSET_CH4_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH4_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH4_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 3 : Channel 3 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH3_Pos (3UL) /*!< Position of CH3 field. */ +#define PPI_CHENSET_CH3_Msk (0x1UL << PPI_CHENSET_CH3_Pos) /*!< Bit mask of CH3 field. */ +#define PPI_CHENSET_CH3_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH3_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH3_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 2 : Channel 2 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH2_Pos (2UL) /*!< Position of CH2 field. */ +#define PPI_CHENSET_CH2_Msk (0x1UL << PPI_CHENSET_CH2_Pos) /*!< Bit mask of CH2 field. */ +#define PPI_CHENSET_CH2_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH2_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH2_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 1 : Channel 1 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH1_Pos (1UL) /*!< Position of CH1 field. */ +#define PPI_CHENSET_CH1_Msk (0x1UL << PPI_CHENSET_CH1_Pos) /*!< Bit mask of CH1 field. */ +#define PPI_CHENSET_CH1_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH1_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH1_Set (1UL) /*!< Write: Enable channel */ + +/* Bit 0 : Channel 0 enable set register. Writing '0' has no effect */ +#define PPI_CHENSET_CH0_Pos (0UL) /*!< Position of CH0 field. */ +#define PPI_CHENSET_CH0_Msk (0x1UL << PPI_CHENSET_CH0_Pos) /*!< Bit mask of CH0 field. */ +#define PPI_CHENSET_CH0_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENSET_CH0_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENSET_CH0_Set (1UL) /*!< Write: Enable channel */ + +/* Register: PPI_CHENCLR */ +/* Description: Channel enable clear register */ + +/* Bit 31 : Channel 31 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH31_Pos (31UL) /*!< Position of CH31 field. */ +#define PPI_CHENCLR_CH31_Msk (0x1UL << PPI_CHENCLR_CH31_Pos) /*!< Bit mask of CH31 field. */ +#define PPI_CHENCLR_CH31_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH31_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH31_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 30 : Channel 30 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH30_Pos (30UL) /*!< Position of CH30 field. */ +#define PPI_CHENCLR_CH30_Msk (0x1UL << PPI_CHENCLR_CH30_Pos) /*!< Bit mask of CH30 field. */ +#define PPI_CHENCLR_CH30_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH30_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH30_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 29 : Channel 29 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH29_Pos (29UL) /*!< Position of CH29 field. */ +#define PPI_CHENCLR_CH29_Msk (0x1UL << PPI_CHENCLR_CH29_Pos) /*!< Bit mask of CH29 field. */ +#define PPI_CHENCLR_CH29_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH29_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH29_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 28 : Channel 28 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH28_Pos (28UL) /*!< Position of CH28 field. */ +#define PPI_CHENCLR_CH28_Msk (0x1UL << PPI_CHENCLR_CH28_Pos) /*!< Bit mask of CH28 field. */ +#define PPI_CHENCLR_CH28_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH28_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH28_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 27 : Channel 27 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH27_Pos (27UL) /*!< Position of CH27 field. */ +#define PPI_CHENCLR_CH27_Msk (0x1UL << PPI_CHENCLR_CH27_Pos) /*!< Bit mask of CH27 field. */ +#define PPI_CHENCLR_CH27_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH27_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH27_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 26 : Channel 26 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH26_Pos (26UL) /*!< Position of CH26 field. */ +#define PPI_CHENCLR_CH26_Msk (0x1UL << PPI_CHENCLR_CH26_Pos) /*!< Bit mask of CH26 field. */ +#define PPI_CHENCLR_CH26_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH26_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH26_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 25 : Channel 25 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH25_Pos (25UL) /*!< Position of CH25 field. */ +#define PPI_CHENCLR_CH25_Msk (0x1UL << PPI_CHENCLR_CH25_Pos) /*!< Bit mask of CH25 field. */ +#define PPI_CHENCLR_CH25_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH25_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH25_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 24 : Channel 24 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH24_Pos (24UL) /*!< Position of CH24 field. */ +#define PPI_CHENCLR_CH24_Msk (0x1UL << PPI_CHENCLR_CH24_Pos) /*!< Bit mask of CH24 field. */ +#define PPI_CHENCLR_CH24_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH24_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH24_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 23 : Channel 23 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH23_Pos (23UL) /*!< Position of CH23 field. */ +#define PPI_CHENCLR_CH23_Msk (0x1UL << PPI_CHENCLR_CH23_Pos) /*!< Bit mask of CH23 field. */ +#define PPI_CHENCLR_CH23_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH23_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH23_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 22 : Channel 22 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH22_Pos (22UL) /*!< Position of CH22 field. */ +#define PPI_CHENCLR_CH22_Msk (0x1UL << PPI_CHENCLR_CH22_Pos) /*!< Bit mask of CH22 field. */ +#define PPI_CHENCLR_CH22_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH22_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH22_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 21 : Channel 21 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH21_Pos (21UL) /*!< Position of CH21 field. */ +#define PPI_CHENCLR_CH21_Msk (0x1UL << PPI_CHENCLR_CH21_Pos) /*!< Bit mask of CH21 field. */ +#define PPI_CHENCLR_CH21_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH21_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH21_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 20 : Channel 20 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH20_Pos (20UL) /*!< Position of CH20 field. */ +#define PPI_CHENCLR_CH20_Msk (0x1UL << PPI_CHENCLR_CH20_Pos) /*!< Bit mask of CH20 field. */ +#define PPI_CHENCLR_CH20_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH20_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH20_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 19 : Channel 19 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH19_Pos (19UL) /*!< Position of CH19 field. */ +#define PPI_CHENCLR_CH19_Msk (0x1UL << PPI_CHENCLR_CH19_Pos) /*!< Bit mask of CH19 field. */ +#define PPI_CHENCLR_CH19_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH19_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH19_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 18 : Channel 18 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH18_Pos (18UL) /*!< Position of CH18 field. */ +#define PPI_CHENCLR_CH18_Msk (0x1UL << PPI_CHENCLR_CH18_Pos) /*!< Bit mask of CH18 field. */ +#define PPI_CHENCLR_CH18_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH18_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH18_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 17 : Channel 17 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH17_Pos (17UL) /*!< Position of CH17 field. */ +#define PPI_CHENCLR_CH17_Msk (0x1UL << PPI_CHENCLR_CH17_Pos) /*!< Bit mask of CH17 field. */ +#define PPI_CHENCLR_CH17_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH17_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH17_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 16 : Channel 16 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH16_Pos (16UL) /*!< Position of CH16 field. */ +#define PPI_CHENCLR_CH16_Msk (0x1UL << PPI_CHENCLR_CH16_Pos) /*!< Bit mask of CH16 field. */ +#define PPI_CHENCLR_CH16_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH16_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH16_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 15 : Channel 15 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH15_Pos (15UL) /*!< Position of CH15 field. */ +#define PPI_CHENCLR_CH15_Msk (0x1UL << PPI_CHENCLR_CH15_Pos) /*!< Bit mask of CH15 field. */ +#define PPI_CHENCLR_CH15_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH15_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH15_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 14 : Channel 14 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH14_Pos (14UL) /*!< Position of CH14 field. */ +#define PPI_CHENCLR_CH14_Msk (0x1UL << PPI_CHENCLR_CH14_Pos) /*!< Bit mask of CH14 field. */ +#define PPI_CHENCLR_CH14_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH14_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH14_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 13 : Channel 13 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH13_Pos (13UL) /*!< Position of CH13 field. */ +#define PPI_CHENCLR_CH13_Msk (0x1UL << PPI_CHENCLR_CH13_Pos) /*!< Bit mask of CH13 field. */ +#define PPI_CHENCLR_CH13_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH13_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH13_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 12 : Channel 12 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH12_Pos (12UL) /*!< Position of CH12 field. */ +#define PPI_CHENCLR_CH12_Msk (0x1UL << PPI_CHENCLR_CH12_Pos) /*!< Bit mask of CH12 field. */ +#define PPI_CHENCLR_CH12_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH12_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH12_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 11 : Channel 11 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH11_Pos (11UL) /*!< Position of CH11 field. */ +#define PPI_CHENCLR_CH11_Msk (0x1UL << PPI_CHENCLR_CH11_Pos) /*!< Bit mask of CH11 field. */ +#define PPI_CHENCLR_CH11_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH11_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH11_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 10 : Channel 10 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH10_Pos (10UL) /*!< Position of CH10 field. */ +#define PPI_CHENCLR_CH10_Msk (0x1UL << PPI_CHENCLR_CH10_Pos) /*!< Bit mask of CH10 field. */ +#define PPI_CHENCLR_CH10_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH10_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH10_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 9 : Channel 9 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH9_Pos (9UL) /*!< Position of CH9 field. */ +#define PPI_CHENCLR_CH9_Msk (0x1UL << PPI_CHENCLR_CH9_Pos) /*!< Bit mask of CH9 field. */ +#define PPI_CHENCLR_CH9_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH9_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH9_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 8 : Channel 8 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH8_Pos (8UL) /*!< Position of CH8 field. */ +#define PPI_CHENCLR_CH8_Msk (0x1UL << PPI_CHENCLR_CH8_Pos) /*!< Bit mask of CH8 field. */ +#define PPI_CHENCLR_CH8_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH8_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH8_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 7 : Channel 7 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH7_Pos (7UL) /*!< Position of CH7 field. */ +#define PPI_CHENCLR_CH7_Msk (0x1UL << PPI_CHENCLR_CH7_Pos) /*!< Bit mask of CH7 field. */ +#define PPI_CHENCLR_CH7_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH7_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH7_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 6 : Channel 6 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH6_Pos (6UL) /*!< Position of CH6 field. */ +#define PPI_CHENCLR_CH6_Msk (0x1UL << PPI_CHENCLR_CH6_Pos) /*!< Bit mask of CH6 field. */ +#define PPI_CHENCLR_CH6_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH6_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH6_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 5 : Channel 5 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH5_Pos (5UL) /*!< Position of CH5 field. */ +#define PPI_CHENCLR_CH5_Msk (0x1UL << PPI_CHENCLR_CH5_Pos) /*!< Bit mask of CH5 field. */ +#define PPI_CHENCLR_CH5_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH5_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH5_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 4 : Channel 4 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH4_Pos (4UL) /*!< Position of CH4 field. */ +#define PPI_CHENCLR_CH4_Msk (0x1UL << PPI_CHENCLR_CH4_Pos) /*!< Bit mask of CH4 field. */ +#define PPI_CHENCLR_CH4_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH4_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH4_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 3 : Channel 3 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH3_Pos (3UL) /*!< Position of CH3 field. */ +#define PPI_CHENCLR_CH3_Msk (0x1UL << PPI_CHENCLR_CH3_Pos) /*!< Bit mask of CH3 field. */ +#define PPI_CHENCLR_CH3_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH3_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH3_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 2 : Channel 2 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH2_Pos (2UL) /*!< Position of CH2 field. */ +#define PPI_CHENCLR_CH2_Msk (0x1UL << PPI_CHENCLR_CH2_Pos) /*!< Bit mask of CH2 field. */ +#define PPI_CHENCLR_CH2_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH2_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH2_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 1 : Channel 1 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH1_Pos (1UL) /*!< Position of CH1 field. */ +#define PPI_CHENCLR_CH1_Msk (0x1UL << PPI_CHENCLR_CH1_Pos) /*!< Bit mask of CH1 field. */ +#define PPI_CHENCLR_CH1_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH1_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH1_Clear (1UL) /*!< Write: disable channel */ + +/* Bit 0 : Channel 0 enable clear register. Writing '0' has no effect */ +#define PPI_CHENCLR_CH0_Pos (0UL) /*!< Position of CH0 field. */ +#define PPI_CHENCLR_CH0_Msk (0x1UL << PPI_CHENCLR_CH0_Pos) /*!< Bit mask of CH0 field. */ +#define PPI_CHENCLR_CH0_Disabled (0UL) /*!< Read: channel disabled */ +#define PPI_CHENCLR_CH0_Enabled (1UL) /*!< Read: channel enabled */ +#define PPI_CHENCLR_CH0_Clear (1UL) /*!< Write: disable channel */ + +/* Register: PPI_CH_EEP */ +/* Description: Description cluster[0]: Channel 0 event end-point */ + +/* Bits 31..0 : Pointer to event register. Accepts only addresses to registers from the Event group. */ +#define PPI_CH_EEP_EEP_Pos (0UL) /*!< Position of EEP field. */ +#define PPI_CH_EEP_EEP_Msk (0xFFFFFFFFUL << PPI_CH_EEP_EEP_Pos) /*!< Bit mask of EEP field. */ + +/* Register: PPI_CH_TEP */ +/* Description: Description cluster[0]: Channel 0 task end-point */ + +/* Bits 31..0 : Pointer to task register. Accepts only addresses to registers from the Task group. */ +#define PPI_CH_TEP_TEP_Pos (0UL) /*!< Position of TEP field. */ +#define PPI_CH_TEP_TEP_Msk (0xFFFFFFFFUL << PPI_CH_TEP_TEP_Pos) /*!< Bit mask of TEP field. */ + +/* Register: PPI_CHG */ +/* Description: Description collection[0]: Channel group 0 */ + +/* Bit 31 : Include or exclude channel 31 */ +#define PPI_CHG_CH31_Pos (31UL) /*!< Position of CH31 field. */ +#define PPI_CHG_CH31_Msk (0x1UL << PPI_CHG_CH31_Pos) /*!< Bit mask of CH31 field. */ +#define PPI_CHG_CH31_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH31_Included (1UL) /*!< Include */ + +/* Bit 30 : Include or exclude channel 30 */ +#define PPI_CHG_CH30_Pos (30UL) /*!< Position of CH30 field. */ +#define PPI_CHG_CH30_Msk (0x1UL << PPI_CHG_CH30_Pos) /*!< Bit mask of CH30 field. */ +#define PPI_CHG_CH30_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH30_Included (1UL) /*!< Include */ + +/* Bit 29 : Include or exclude channel 29 */ +#define PPI_CHG_CH29_Pos (29UL) /*!< Position of CH29 field. */ +#define PPI_CHG_CH29_Msk (0x1UL << PPI_CHG_CH29_Pos) /*!< Bit mask of CH29 field. */ +#define PPI_CHG_CH29_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH29_Included (1UL) /*!< Include */ + +/* Bit 28 : Include or exclude channel 28 */ +#define PPI_CHG_CH28_Pos (28UL) /*!< Position of CH28 field. */ +#define PPI_CHG_CH28_Msk (0x1UL << PPI_CHG_CH28_Pos) /*!< Bit mask of CH28 field. */ +#define PPI_CHG_CH28_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH28_Included (1UL) /*!< Include */ + +/* Bit 27 : Include or exclude channel 27 */ +#define PPI_CHG_CH27_Pos (27UL) /*!< Position of CH27 field. */ +#define PPI_CHG_CH27_Msk (0x1UL << PPI_CHG_CH27_Pos) /*!< Bit mask of CH27 field. */ +#define PPI_CHG_CH27_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH27_Included (1UL) /*!< Include */ + +/* Bit 26 : Include or exclude channel 26 */ +#define PPI_CHG_CH26_Pos (26UL) /*!< Position of CH26 field. */ +#define PPI_CHG_CH26_Msk (0x1UL << PPI_CHG_CH26_Pos) /*!< Bit mask of CH26 field. */ +#define PPI_CHG_CH26_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH26_Included (1UL) /*!< Include */ + +/* Bit 25 : Include or exclude channel 25 */ +#define PPI_CHG_CH25_Pos (25UL) /*!< Position of CH25 field. */ +#define PPI_CHG_CH25_Msk (0x1UL << PPI_CHG_CH25_Pos) /*!< Bit mask of CH25 field. */ +#define PPI_CHG_CH25_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH25_Included (1UL) /*!< Include */ + +/* Bit 24 : Include or exclude channel 24 */ +#define PPI_CHG_CH24_Pos (24UL) /*!< Position of CH24 field. */ +#define PPI_CHG_CH24_Msk (0x1UL << PPI_CHG_CH24_Pos) /*!< Bit mask of CH24 field. */ +#define PPI_CHG_CH24_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH24_Included (1UL) /*!< Include */ + +/* Bit 23 : Include or exclude channel 23 */ +#define PPI_CHG_CH23_Pos (23UL) /*!< Position of CH23 field. */ +#define PPI_CHG_CH23_Msk (0x1UL << PPI_CHG_CH23_Pos) /*!< Bit mask of CH23 field. */ +#define PPI_CHG_CH23_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH23_Included (1UL) /*!< Include */ + +/* Bit 22 : Include or exclude channel 22 */ +#define PPI_CHG_CH22_Pos (22UL) /*!< Position of CH22 field. */ +#define PPI_CHG_CH22_Msk (0x1UL << PPI_CHG_CH22_Pos) /*!< Bit mask of CH22 field. */ +#define PPI_CHG_CH22_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH22_Included (1UL) /*!< Include */ + +/* Bit 21 : Include or exclude channel 21 */ +#define PPI_CHG_CH21_Pos (21UL) /*!< Position of CH21 field. */ +#define PPI_CHG_CH21_Msk (0x1UL << PPI_CHG_CH21_Pos) /*!< Bit mask of CH21 field. */ +#define PPI_CHG_CH21_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH21_Included (1UL) /*!< Include */ + +/* Bit 20 : Include or exclude channel 20 */ +#define PPI_CHG_CH20_Pos (20UL) /*!< Position of CH20 field. */ +#define PPI_CHG_CH20_Msk (0x1UL << PPI_CHG_CH20_Pos) /*!< Bit mask of CH20 field. */ +#define PPI_CHG_CH20_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH20_Included (1UL) /*!< Include */ + +/* Bit 19 : Include or exclude channel 19 */ +#define PPI_CHG_CH19_Pos (19UL) /*!< Position of CH19 field. */ +#define PPI_CHG_CH19_Msk (0x1UL << PPI_CHG_CH19_Pos) /*!< Bit mask of CH19 field. */ +#define PPI_CHG_CH19_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH19_Included (1UL) /*!< Include */ + +/* Bit 18 : Include or exclude channel 18 */ +#define PPI_CHG_CH18_Pos (18UL) /*!< Position of CH18 field. */ +#define PPI_CHG_CH18_Msk (0x1UL << PPI_CHG_CH18_Pos) /*!< Bit mask of CH18 field. */ +#define PPI_CHG_CH18_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH18_Included (1UL) /*!< Include */ + +/* Bit 17 : Include or exclude channel 17 */ +#define PPI_CHG_CH17_Pos (17UL) /*!< Position of CH17 field. */ +#define PPI_CHG_CH17_Msk (0x1UL << PPI_CHG_CH17_Pos) /*!< Bit mask of CH17 field. */ +#define PPI_CHG_CH17_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH17_Included (1UL) /*!< Include */ + +/* Bit 16 : Include or exclude channel 16 */ +#define PPI_CHG_CH16_Pos (16UL) /*!< Position of CH16 field. */ +#define PPI_CHG_CH16_Msk (0x1UL << PPI_CHG_CH16_Pos) /*!< Bit mask of CH16 field. */ +#define PPI_CHG_CH16_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH16_Included (1UL) /*!< Include */ + +/* Bit 15 : Include or exclude channel 15 */ +#define PPI_CHG_CH15_Pos (15UL) /*!< Position of CH15 field. */ +#define PPI_CHG_CH15_Msk (0x1UL << PPI_CHG_CH15_Pos) /*!< Bit mask of CH15 field. */ +#define PPI_CHG_CH15_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH15_Included (1UL) /*!< Include */ + +/* Bit 14 : Include or exclude channel 14 */ +#define PPI_CHG_CH14_Pos (14UL) /*!< Position of CH14 field. */ +#define PPI_CHG_CH14_Msk (0x1UL << PPI_CHG_CH14_Pos) /*!< Bit mask of CH14 field. */ +#define PPI_CHG_CH14_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH14_Included (1UL) /*!< Include */ + +/* Bit 13 : Include or exclude channel 13 */ +#define PPI_CHG_CH13_Pos (13UL) /*!< Position of CH13 field. */ +#define PPI_CHG_CH13_Msk (0x1UL << PPI_CHG_CH13_Pos) /*!< Bit mask of CH13 field. */ +#define PPI_CHG_CH13_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH13_Included (1UL) /*!< Include */ + +/* Bit 12 : Include or exclude channel 12 */ +#define PPI_CHG_CH12_Pos (12UL) /*!< Position of CH12 field. */ +#define PPI_CHG_CH12_Msk (0x1UL << PPI_CHG_CH12_Pos) /*!< Bit mask of CH12 field. */ +#define PPI_CHG_CH12_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH12_Included (1UL) /*!< Include */ + +/* Bit 11 : Include or exclude channel 11 */ +#define PPI_CHG_CH11_Pos (11UL) /*!< Position of CH11 field. */ +#define PPI_CHG_CH11_Msk (0x1UL << PPI_CHG_CH11_Pos) /*!< Bit mask of CH11 field. */ +#define PPI_CHG_CH11_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH11_Included (1UL) /*!< Include */ + +/* Bit 10 : Include or exclude channel 10 */ +#define PPI_CHG_CH10_Pos (10UL) /*!< Position of CH10 field. */ +#define PPI_CHG_CH10_Msk (0x1UL << PPI_CHG_CH10_Pos) /*!< Bit mask of CH10 field. */ +#define PPI_CHG_CH10_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH10_Included (1UL) /*!< Include */ + +/* Bit 9 : Include or exclude channel 9 */ +#define PPI_CHG_CH9_Pos (9UL) /*!< Position of CH9 field. */ +#define PPI_CHG_CH9_Msk (0x1UL << PPI_CHG_CH9_Pos) /*!< Bit mask of CH9 field. */ +#define PPI_CHG_CH9_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH9_Included (1UL) /*!< Include */ + +/* Bit 8 : Include or exclude channel 8 */ +#define PPI_CHG_CH8_Pos (8UL) /*!< Position of CH8 field. */ +#define PPI_CHG_CH8_Msk (0x1UL << PPI_CHG_CH8_Pos) /*!< Bit mask of CH8 field. */ +#define PPI_CHG_CH8_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH8_Included (1UL) /*!< Include */ + +/* Bit 7 : Include or exclude channel 7 */ +#define PPI_CHG_CH7_Pos (7UL) /*!< Position of CH7 field. */ +#define PPI_CHG_CH7_Msk (0x1UL << PPI_CHG_CH7_Pos) /*!< Bit mask of CH7 field. */ +#define PPI_CHG_CH7_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH7_Included (1UL) /*!< Include */ + +/* Bit 6 : Include or exclude channel 6 */ +#define PPI_CHG_CH6_Pos (6UL) /*!< Position of CH6 field. */ +#define PPI_CHG_CH6_Msk (0x1UL << PPI_CHG_CH6_Pos) /*!< Bit mask of CH6 field. */ +#define PPI_CHG_CH6_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH6_Included (1UL) /*!< Include */ + +/* Bit 5 : Include or exclude channel 5 */ +#define PPI_CHG_CH5_Pos (5UL) /*!< Position of CH5 field. */ +#define PPI_CHG_CH5_Msk (0x1UL << PPI_CHG_CH5_Pos) /*!< Bit mask of CH5 field. */ +#define PPI_CHG_CH5_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH5_Included (1UL) /*!< Include */ + +/* Bit 4 : Include or exclude channel 4 */ +#define PPI_CHG_CH4_Pos (4UL) /*!< Position of CH4 field. */ +#define PPI_CHG_CH4_Msk (0x1UL << PPI_CHG_CH4_Pos) /*!< Bit mask of CH4 field. */ +#define PPI_CHG_CH4_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH4_Included (1UL) /*!< Include */ + +/* Bit 3 : Include or exclude channel 3 */ +#define PPI_CHG_CH3_Pos (3UL) /*!< Position of CH3 field. */ +#define PPI_CHG_CH3_Msk (0x1UL << PPI_CHG_CH3_Pos) /*!< Bit mask of CH3 field. */ +#define PPI_CHG_CH3_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH3_Included (1UL) /*!< Include */ + +/* Bit 2 : Include or exclude channel 2 */ +#define PPI_CHG_CH2_Pos (2UL) /*!< Position of CH2 field. */ +#define PPI_CHG_CH2_Msk (0x1UL << PPI_CHG_CH2_Pos) /*!< Bit mask of CH2 field. */ +#define PPI_CHG_CH2_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH2_Included (1UL) /*!< Include */ + +/* Bit 1 : Include or exclude channel 1 */ +#define PPI_CHG_CH1_Pos (1UL) /*!< Position of CH1 field. */ +#define PPI_CHG_CH1_Msk (0x1UL << PPI_CHG_CH1_Pos) /*!< Bit mask of CH1 field. */ +#define PPI_CHG_CH1_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH1_Included (1UL) /*!< Include */ + +/* Bit 0 : Include or exclude channel 0 */ +#define PPI_CHG_CH0_Pos (0UL) /*!< Position of CH0 field. */ +#define PPI_CHG_CH0_Msk (0x1UL << PPI_CHG_CH0_Pos) /*!< Bit mask of CH0 field. */ +#define PPI_CHG_CH0_Excluded (0UL) /*!< Exclude */ +#define PPI_CHG_CH0_Included (1UL) /*!< Include */ + +/* Register: PPI_FORK_TEP */ +/* Description: Description cluster[0]: Channel 0 task end-point */ + +/* Bits 31..0 : Pointer to task register */ +#define PPI_FORK_TEP_TEP_Pos (0UL) /*!< Position of TEP field. */ +#define PPI_FORK_TEP_TEP_Msk (0xFFFFFFFFUL << PPI_FORK_TEP_TEP_Pos) /*!< Bit mask of TEP field. */ + + +/* Peripheral: PWM */ +/* Description: Pulse Width Modulation Unit 0 */ + +/* Register: PWM_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 4 : Shortcut between LOOPSDONE event and STOP task */ +#define PWM_SHORTS_LOOPSDONE_STOP_Pos (4UL) /*!< Position of LOOPSDONE_STOP field. */ +#define PWM_SHORTS_LOOPSDONE_STOP_Msk (0x1UL << PWM_SHORTS_LOOPSDONE_STOP_Pos) /*!< Bit mask of LOOPSDONE_STOP field. */ +#define PWM_SHORTS_LOOPSDONE_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define PWM_SHORTS_LOOPSDONE_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 3 : Shortcut between LOOPSDONE event and SEQSTART[1] task */ +#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Pos (3UL) /*!< Position of LOOPSDONE_SEQSTART1 field. */ +#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Msk (0x1UL << PWM_SHORTS_LOOPSDONE_SEQSTART1_Pos) /*!< Bit mask of LOOPSDONE_SEQSTART1 field. */ +#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Disabled (0UL) /*!< Disable shortcut */ +#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 2 : Shortcut between LOOPSDONE event and SEQSTART[0] task */ +#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Pos (2UL) /*!< Position of LOOPSDONE_SEQSTART0 field. */ +#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Msk (0x1UL << PWM_SHORTS_LOOPSDONE_SEQSTART0_Pos) /*!< Bit mask of LOOPSDONE_SEQSTART0 field. */ +#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Disabled (0UL) /*!< Disable shortcut */ +#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 1 : Shortcut between SEQEND[1] event and STOP task */ +#define PWM_SHORTS_SEQEND1_STOP_Pos (1UL) /*!< Position of SEQEND1_STOP field. */ +#define PWM_SHORTS_SEQEND1_STOP_Msk (0x1UL << PWM_SHORTS_SEQEND1_STOP_Pos) /*!< Bit mask of SEQEND1_STOP field. */ +#define PWM_SHORTS_SEQEND1_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define PWM_SHORTS_SEQEND1_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 0 : Shortcut between SEQEND[0] event and STOP task */ +#define PWM_SHORTS_SEQEND0_STOP_Pos (0UL) /*!< Position of SEQEND0_STOP field. */ +#define PWM_SHORTS_SEQEND0_STOP_Msk (0x1UL << PWM_SHORTS_SEQEND0_STOP_Pos) /*!< Bit mask of SEQEND0_STOP field. */ +#define PWM_SHORTS_SEQEND0_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define PWM_SHORTS_SEQEND0_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: PWM_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 7 : Enable or disable interrupt for LOOPSDONE event */ +#define PWM_INTEN_LOOPSDONE_Pos (7UL) /*!< Position of LOOPSDONE field. */ +#define PWM_INTEN_LOOPSDONE_Msk (0x1UL << PWM_INTEN_LOOPSDONE_Pos) /*!< Bit mask of LOOPSDONE field. */ +#define PWM_INTEN_LOOPSDONE_Disabled (0UL) /*!< Disable */ +#define PWM_INTEN_LOOPSDONE_Enabled (1UL) /*!< Enable */ + +/* Bit 6 : Enable or disable interrupt for PWMPERIODEND event */ +#define PWM_INTEN_PWMPERIODEND_Pos (6UL) /*!< Position of PWMPERIODEND field. */ +#define PWM_INTEN_PWMPERIODEND_Msk (0x1UL << PWM_INTEN_PWMPERIODEND_Pos) /*!< Bit mask of PWMPERIODEND field. */ +#define PWM_INTEN_PWMPERIODEND_Disabled (0UL) /*!< Disable */ +#define PWM_INTEN_PWMPERIODEND_Enabled (1UL) /*!< Enable */ + +/* Bit 5 : Enable or disable interrupt for SEQEND[1] event */ +#define PWM_INTEN_SEQEND1_Pos (5UL) /*!< Position of SEQEND1 field. */ +#define PWM_INTEN_SEQEND1_Msk (0x1UL << PWM_INTEN_SEQEND1_Pos) /*!< Bit mask of SEQEND1 field. */ +#define PWM_INTEN_SEQEND1_Disabled (0UL) /*!< Disable */ +#define PWM_INTEN_SEQEND1_Enabled (1UL) /*!< Enable */ + +/* Bit 4 : Enable or disable interrupt for SEQEND[0] event */ +#define PWM_INTEN_SEQEND0_Pos (4UL) /*!< Position of SEQEND0 field. */ +#define PWM_INTEN_SEQEND0_Msk (0x1UL << PWM_INTEN_SEQEND0_Pos) /*!< Bit mask of SEQEND0 field. */ +#define PWM_INTEN_SEQEND0_Disabled (0UL) /*!< Disable */ +#define PWM_INTEN_SEQEND0_Enabled (1UL) /*!< Enable */ + +/* Bit 3 : Enable or disable interrupt for SEQSTARTED[1] event */ +#define PWM_INTEN_SEQSTARTED1_Pos (3UL) /*!< Position of SEQSTARTED1 field. */ +#define PWM_INTEN_SEQSTARTED1_Msk (0x1UL << PWM_INTEN_SEQSTARTED1_Pos) /*!< Bit mask of SEQSTARTED1 field. */ +#define PWM_INTEN_SEQSTARTED1_Disabled (0UL) /*!< Disable */ +#define PWM_INTEN_SEQSTARTED1_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable interrupt for SEQSTARTED[0] event */ +#define PWM_INTEN_SEQSTARTED0_Pos (2UL) /*!< Position of SEQSTARTED0 field. */ +#define PWM_INTEN_SEQSTARTED0_Msk (0x1UL << PWM_INTEN_SEQSTARTED0_Pos) /*!< Bit mask of SEQSTARTED0 field. */ +#define PWM_INTEN_SEQSTARTED0_Disabled (0UL) /*!< Disable */ +#define PWM_INTEN_SEQSTARTED0_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for STOPPED event */ +#define PWM_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define PWM_INTEN_STOPPED_Msk (0x1UL << PWM_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define PWM_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ +#define PWM_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ + +/* Register: PWM_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 7 : Write '1' to Enable interrupt for LOOPSDONE event */ +#define PWM_INTENSET_LOOPSDONE_Pos (7UL) /*!< Position of LOOPSDONE field. */ +#define PWM_INTENSET_LOOPSDONE_Msk (0x1UL << PWM_INTENSET_LOOPSDONE_Pos) /*!< Bit mask of LOOPSDONE field. */ +#define PWM_INTENSET_LOOPSDONE_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENSET_LOOPSDONE_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENSET_LOOPSDONE_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to Enable interrupt for PWMPERIODEND event */ +#define PWM_INTENSET_PWMPERIODEND_Pos (6UL) /*!< Position of PWMPERIODEND field. */ +#define PWM_INTENSET_PWMPERIODEND_Msk (0x1UL << PWM_INTENSET_PWMPERIODEND_Pos) /*!< Bit mask of PWMPERIODEND field. */ +#define PWM_INTENSET_PWMPERIODEND_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENSET_PWMPERIODEND_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENSET_PWMPERIODEND_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to Enable interrupt for SEQEND[1] event */ +#define PWM_INTENSET_SEQEND1_Pos (5UL) /*!< Position of SEQEND1 field. */ +#define PWM_INTENSET_SEQEND1_Msk (0x1UL << PWM_INTENSET_SEQEND1_Pos) /*!< Bit mask of SEQEND1 field. */ +#define PWM_INTENSET_SEQEND1_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENSET_SEQEND1_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENSET_SEQEND1_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to Enable interrupt for SEQEND[0] event */ +#define PWM_INTENSET_SEQEND0_Pos (4UL) /*!< Position of SEQEND0 field. */ +#define PWM_INTENSET_SEQEND0_Msk (0x1UL << PWM_INTENSET_SEQEND0_Pos) /*!< Bit mask of SEQEND0 field. */ +#define PWM_INTENSET_SEQEND0_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENSET_SEQEND0_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENSET_SEQEND0_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to Enable interrupt for SEQSTARTED[1] event */ +#define PWM_INTENSET_SEQSTARTED1_Pos (3UL) /*!< Position of SEQSTARTED1 field. */ +#define PWM_INTENSET_SEQSTARTED1_Msk (0x1UL << PWM_INTENSET_SEQSTARTED1_Pos) /*!< Bit mask of SEQSTARTED1 field. */ +#define PWM_INTENSET_SEQSTARTED1_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENSET_SEQSTARTED1_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENSET_SEQSTARTED1_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable interrupt for SEQSTARTED[0] event */ +#define PWM_INTENSET_SEQSTARTED0_Pos (2UL) /*!< Position of SEQSTARTED0 field. */ +#define PWM_INTENSET_SEQSTARTED0_Msk (0x1UL << PWM_INTENSET_SEQSTARTED0_Pos) /*!< Bit mask of SEQSTARTED0 field. */ +#define PWM_INTENSET_SEQSTARTED0_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENSET_SEQSTARTED0_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENSET_SEQSTARTED0_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for STOPPED event */ +#define PWM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define PWM_INTENSET_STOPPED_Msk (0x1UL << PWM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define PWM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Register: PWM_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 7 : Write '1' to Disable interrupt for LOOPSDONE event */ +#define PWM_INTENCLR_LOOPSDONE_Pos (7UL) /*!< Position of LOOPSDONE field. */ +#define PWM_INTENCLR_LOOPSDONE_Msk (0x1UL << PWM_INTENCLR_LOOPSDONE_Pos) /*!< Bit mask of LOOPSDONE field. */ +#define PWM_INTENCLR_LOOPSDONE_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENCLR_LOOPSDONE_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENCLR_LOOPSDONE_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to Disable interrupt for PWMPERIODEND event */ +#define PWM_INTENCLR_PWMPERIODEND_Pos (6UL) /*!< Position of PWMPERIODEND field. */ +#define PWM_INTENCLR_PWMPERIODEND_Msk (0x1UL << PWM_INTENCLR_PWMPERIODEND_Pos) /*!< Bit mask of PWMPERIODEND field. */ +#define PWM_INTENCLR_PWMPERIODEND_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENCLR_PWMPERIODEND_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENCLR_PWMPERIODEND_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to Disable interrupt for SEQEND[1] event */ +#define PWM_INTENCLR_SEQEND1_Pos (5UL) /*!< Position of SEQEND1 field. */ +#define PWM_INTENCLR_SEQEND1_Msk (0x1UL << PWM_INTENCLR_SEQEND1_Pos) /*!< Bit mask of SEQEND1 field. */ +#define PWM_INTENCLR_SEQEND1_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENCLR_SEQEND1_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENCLR_SEQEND1_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to Disable interrupt for SEQEND[0] event */ +#define PWM_INTENCLR_SEQEND0_Pos (4UL) /*!< Position of SEQEND0 field. */ +#define PWM_INTENCLR_SEQEND0_Msk (0x1UL << PWM_INTENCLR_SEQEND0_Pos) /*!< Bit mask of SEQEND0 field. */ +#define PWM_INTENCLR_SEQEND0_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENCLR_SEQEND0_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENCLR_SEQEND0_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to Disable interrupt for SEQSTARTED[1] event */ +#define PWM_INTENCLR_SEQSTARTED1_Pos (3UL) /*!< Position of SEQSTARTED1 field. */ +#define PWM_INTENCLR_SEQSTARTED1_Msk (0x1UL << PWM_INTENCLR_SEQSTARTED1_Pos) /*!< Bit mask of SEQSTARTED1 field. */ +#define PWM_INTENCLR_SEQSTARTED1_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENCLR_SEQSTARTED1_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENCLR_SEQSTARTED1_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable interrupt for SEQSTARTED[0] event */ +#define PWM_INTENCLR_SEQSTARTED0_Pos (2UL) /*!< Position of SEQSTARTED0 field. */ +#define PWM_INTENCLR_SEQSTARTED0_Msk (0x1UL << PWM_INTENCLR_SEQSTARTED0_Pos) /*!< Bit mask of SEQSTARTED0 field. */ +#define PWM_INTENCLR_SEQSTARTED0_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENCLR_SEQSTARTED0_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENCLR_SEQSTARTED0_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for STOPPED event */ +#define PWM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define PWM_INTENCLR_STOPPED_Msk (0x1UL << PWM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define PWM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define PWM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define PWM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Register: PWM_ENABLE */ +/* Description: PWM module enable register */ + +/* Bit 0 : Enable or disable PWM module */ +#define PWM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define PWM_ENABLE_ENABLE_Msk (0x1UL << PWM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define PWM_ENABLE_ENABLE_Disabled (0UL) /*!< Disabled */ +#define PWM_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */ + +/* Register: PWM_MODE */ +/* Description: Selects operating mode of the wave counter */ + +/* Bit 0 : Selects up or up and down as wave counter mode */ +#define PWM_MODE_UPDOWN_Pos (0UL) /*!< Position of UPDOWN field. */ +#define PWM_MODE_UPDOWN_Msk (0x1UL << PWM_MODE_UPDOWN_Pos) /*!< Bit mask of UPDOWN field. */ +#define PWM_MODE_UPDOWN_Up (0UL) /*!< Up counter - edge aligned PWM duty-cycle */ +#define PWM_MODE_UPDOWN_UpAndDown (1UL) /*!< Up and down counter - center aligned PWM duty cycle */ + +/* Register: PWM_COUNTERTOP */ +/* Description: Value up to which the pulse generator counter counts */ + +/* Bits 14..0 : Value up to which the pulse generator counter counts. This register is ignored when DECODER.MODE=WaveForm and only values from RAM will be used. */ +#define PWM_COUNTERTOP_COUNTERTOP_Pos (0UL) /*!< Position of COUNTERTOP field. */ +#define PWM_COUNTERTOP_COUNTERTOP_Msk (0x7FFFUL << PWM_COUNTERTOP_COUNTERTOP_Pos) /*!< Bit mask of COUNTERTOP field. */ + +/* Register: PWM_PRESCALER */ +/* Description: Configuration for PWM_CLK */ + +/* Bits 2..0 : Pre-scaler of PWM_CLK */ +#define PWM_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */ +#define PWM_PRESCALER_PRESCALER_Msk (0x7UL << PWM_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */ +#define PWM_PRESCALER_PRESCALER_DIV_1 (0UL) /*!< Divide by 1 (16MHz) */ +#define PWM_PRESCALER_PRESCALER_DIV_2 (1UL) /*!< Divide by 2 ( 8MHz) */ +#define PWM_PRESCALER_PRESCALER_DIV_4 (2UL) /*!< Divide by 4 ( 4MHz) */ +#define PWM_PRESCALER_PRESCALER_DIV_8 (3UL) /*!< Divide by 8 ( 2MHz) */ +#define PWM_PRESCALER_PRESCALER_DIV_16 (4UL) /*!< Divide by 16 ( 1MHz) */ +#define PWM_PRESCALER_PRESCALER_DIV_32 (5UL) /*!< Divide by 32 ( 500kHz) */ +#define PWM_PRESCALER_PRESCALER_DIV_64 (6UL) /*!< Divide by 64 ( 250kHz) */ +#define PWM_PRESCALER_PRESCALER_DIV_128 (7UL) /*!< Divide by 128 ( 125kHz) */ + +/* Register: PWM_DECODER */ +/* Description: Configuration of the decoder */ + +/* Bit 8 : Selects source for advancing the active sequence */ +#define PWM_DECODER_MODE_Pos (8UL) /*!< Position of MODE field. */ +#define PWM_DECODER_MODE_Msk (0x1UL << PWM_DECODER_MODE_Pos) /*!< Bit mask of MODE field. */ +#define PWM_DECODER_MODE_RefreshCount (0UL) /*!< SEQ[n].REFRESH is used to determine loading internal compare registers */ +#define PWM_DECODER_MODE_NextStep (1UL) /*!< NEXTSTEP task causes a new value to be loaded to internal compare registers */ + +/* Bits 1..0 : How a sequence is read from RAM and spread to the compare register */ +#define PWM_DECODER_LOAD_Pos (0UL) /*!< Position of LOAD field. */ +#define PWM_DECODER_LOAD_Msk (0x3UL << PWM_DECODER_LOAD_Pos) /*!< Bit mask of LOAD field. */ +#define PWM_DECODER_LOAD_Common (0UL) /*!< 1st half word (16-bit) used in all PWM channels 0..3 */ +#define PWM_DECODER_LOAD_Grouped (1UL) /*!< 1st half word (16-bit) used in channel 0..1; 2nd word in channel 2..3 */ +#define PWM_DECODER_LOAD_Individual (2UL) /*!< 1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in ch.3 */ +#define PWM_DECODER_LOAD_WaveForm (3UL) /*!< 1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in COUNTERTOP */ + +/* Register: PWM_LOOP */ +/* Description: Amount of playback of a loop */ + +/* Bits 15..0 : Amount of playback of pattern cycles */ +#define PWM_LOOP_CNT_Pos (0UL) /*!< Position of CNT field. */ +#define PWM_LOOP_CNT_Msk (0xFFFFUL << PWM_LOOP_CNT_Pos) /*!< Bit mask of CNT field. */ +#define PWM_LOOP_CNT_Disabled (0UL) /*!< Looping disabled (stop at the end of the sequence) */ + +/* Register: PWM_SEQ_PTR */ +/* Description: Description cluster[0]: Beginning address in Data RAM of this sequence */ + +/* Bits 31..0 : Beginning address in Data RAM of this sequence */ +#define PWM_SEQ_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define PWM_SEQ_PTR_PTR_Msk (0xFFFFFFFFUL << PWM_SEQ_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: PWM_SEQ_CNT */ +/* Description: Description cluster[0]: Amount of values (duty cycles) in this sequence */ + +/* Bits 14..0 : Amount of values (duty cycles) in this sequence */ +#define PWM_SEQ_CNT_CNT_Pos (0UL) /*!< Position of CNT field. */ +#define PWM_SEQ_CNT_CNT_Msk (0x7FFFUL << PWM_SEQ_CNT_CNT_Pos) /*!< Bit mask of CNT field. */ +#define PWM_SEQ_CNT_CNT_Disabled (0UL) /*!< Sequence is disabled, and shall not be started as it is empty */ + +/* Register: PWM_SEQ_REFRESH */ +/* Description: Description cluster[0]: Amount of additional PWM periods between samples loaded into compare register */ + +/* Bits 23..0 : Amount of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods) */ +#define PWM_SEQ_REFRESH_CNT_Pos (0UL) /*!< Position of CNT field. */ +#define PWM_SEQ_REFRESH_CNT_Msk (0xFFFFFFUL << PWM_SEQ_REFRESH_CNT_Pos) /*!< Bit mask of CNT field. */ +#define PWM_SEQ_REFRESH_CNT_Continuous (0UL) /*!< Update every PWM period */ + +/* Register: PWM_SEQ_ENDDELAY */ +/* Description: Description cluster[0]: Time added after the sequence */ + +/* Bits 23..0 : Time added after the sequence in PWM periods */ +#define PWM_SEQ_ENDDELAY_CNT_Pos (0UL) /*!< Position of CNT field. */ +#define PWM_SEQ_ENDDELAY_CNT_Msk (0xFFFFFFUL << PWM_SEQ_ENDDELAY_CNT_Pos) /*!< Bit mask of CNT field. */ + +/* Register: PWM_PSEL_OUT */ +/* Description: Description collection[0]: Output pin select for PWM channel 0 */ + +/* Bit 31 : Connection */ +#define PWM_PSEL_OUT_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define PWM_PSEL_OUT_CONNECT_Msk (0x1UL << PWM_PSEL_OUT_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define PWM_PSEL_OUT_CONNECT_Connected (0UL) /*!< Connect */ +#define PWM_PSEL_OUT_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define PWM_PSEL_OUT_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define PWM_PSEL_OUT_PIN_Msk (0x1FUL << PWM_PSEL_OUT_PIN_Pos) /*!< Bit mask of PIN field. */ + + +/* Peripheral: QDEC */ +/* Description: Quadrature Decoder */ + +/* Register: QDEC_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 6 : Shortcut between SAMPLERDY event and READCLRACC task */ +#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Pos (6UL) /*!< Position of SAMPLERDY_READCLRACC field. */ +#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Msk (0x1UL << QDEC_SHORTS_SAMPLERDY_READCLRACC_Pos) /*!< Bit mask of SAMPLERDY_READCLRACC field. */ +#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Disabled (0UL) /*!< Disable shortcut */ +#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 5 : Shortcut between DBLRDY event and STOP task */ +#define QDEC_SHORTS_DBLRDY_STOP_Pos (5UL) /*!< Position of DBLRDY_STOP field. */ +#define QDEC_SHORTS_DBLRDY_STOP_Msk (0x1UL << QDEC_SHORTS_DBLRDY_STOP_Pos) /*!< Bit mask of DBLRDY_STOP field. */ +#define QDEC_SHORTS_DBLRDY_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define QDEC_SHORTS_DBLRDY_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 4 : Shortcut between DBLRDY event and RDCLRDBL task */ +#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Pos (4UL) /*!< Position of DBLRDY_RDCLRDBL field. */ +#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Msk (0x1UL << QDEC_SHORTS_DBLRDY_RDCLRDBL_Pos) /*!< Bit mask of DBLRDY_RDCLRDBL field. */ +#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Disabled (0UL) /*!< Disable shortcut */ +#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 3 : Shortcut between REPORTRDY event and STOP task */ +#define QDEC_SHORTS_REPORTRDY_STOP_Pos (3UL) /*!< Position of REPORTRDY_STOP field. */ +#define QDEC_SHORTS_REPORTRDY_STOP_Msk (0x1UL << QDEC_SHORTS_REPORTRDY_STOP_Pos) /*!< Bit mask of REPORTRDY_STOP field. */ +#define QDEC_SHORTS_REPORTRDY_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define QDEC_SHORTS_REPORTRDY_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 2 : Shortcut between REPORTRDY event and RDCLRACC task */ +#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Pos (2UL) /*!< Position of REPORTRDY_RDCLRACC field. */ +#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Msk (0x1UL << QDEC_SHORTS_REPORTRDY_RDCLRACC_Pos) /*!< Bit mask of REPORTRDY_RDCLRACC field. */ +#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Disabled (0UL) /*!< Disable shortcut */ +#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 1 : Shortcut between SAMPLERDY event and STOP task */ +#define QDEC_SHORTS_SAMPLERDY_STOP_Pos (1UL) /*!< Position of SAMPLERDY_STOP field. */ +#define QDEC_SHORTS_SAMPLERDY_STOP_Msk (0x1UL << QDEC_SHORTS_SAMPLERDY_STOP_Pos) /*!< Bit mask of SAMPLERDY_STOP field. */ +#define QDEC_SHORTS_SAMPLERDY_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define QDEC_SHORTS_SAMPLERDY_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 0 : Shortcut between REPORTRDY event and READCLRACC task */ +#define QDEC_SHORTS_REPORTRDY_READCLRACC_Pos (0UL) /*!< Position of REPORTRDY_READCLRACC field. */ +#define QDEC_SHORTS_REPORTRDY_READCLRACC_Msk (0x1UL << QDEC_SHORTS_REPORTRDY_READCLRACC_Pos) /*!< Bit mask of REPORTRDY_READCLRACC field. */ +#define QDEC_SHORTS_REPORTRDY_READCLRACC_Disabled (0UL) /*!< Disable shortcut */ +#define QDEC_SHORTS_REPORTRDY_READCLRACC_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: QDEC_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 4 : Write '1' to Enable interrupt for STOPPED event */ +#define QDEC_INTENSET_STOPPED_Pos (4UL) /*!< Position of STOPPED field. */ +#define QDEC_INTENSET_STOPPED_Msk (0x1UL << QDEC_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define QDEC_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to Enable interrupt for DBLRDY event */ +#define QDEC_INTENSET_DBLRDY_Pos (3UL) /*!< Position of DBLRDY field. */ +#define QDEC_INTENSET_DBLRDY_Msk (0x1UL << QDEC_INTENSET_DBLRDY_Pos) /*!< Bit mask of DBLRDY field. */ +#define QDEC_INTENSET_DBLRDY_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENSET_DBLRDY_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENSET_DBLRDY_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable interrupt for ACCOF event */ +#define QDEC_INTENSET_ACCOF_Pos (2UL) /*!< Position of ACCOF field. */ +#define QDEC_INTENSET_ACCOF_Msk (0x1UL << QDEC_INTENSET_ACCOF_Pos) /*!< Bit mask of ACCOF field. */ +#define QDEC_INTENSET_ACCOF_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENSET_ACCOF_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENSET_ACCOF_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for REPORTRDY event */ +#define QDEC_INTENSET_REPORTRDY_Pos (1UL) /*!< Position of REPORTRDY field. */ +#define QDEC_INTENSET_REPORTRDY_Msk (0x1UL << QDEC_INTENSET_REPORTRDY_Pos) /*!< Bit mask of REPORTRDY field. */ +#define QDEC_INTENSET_REPORTRDY_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENSET_REPORTRDY_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENSET_REPORTRDY_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for SAMPLERDY event */ +#define QDEC_INTENSET_SAMPLERDY_Pos (0UL) /*!< Position of SAMPLERDY field. */ +#define QDEC_INTENSET_SAMPLERDY_Msk (0x1UL << QDEC_INTENSET_SAMPLERDY_Pos) /*!< Bit mask of SAMPLERDY field. */ +#define QDEC_INTENSET_SAMPLERDY_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENSET_SAMPLERDY_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENSET_SAMPLERDY_Set (1UL) /*!< Enable */ + +/* Register: QDEC_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 4 : Write '1' to Disable interrupt for STOPPED event */ +#define QDEC_INTENCLR_STOPPED_Pos (4UL) /*!< Position of STOPPED field. */ +#define QDEC_INTENCLR_STOPPED_Msk (0x1UL << QDEC_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define QDEC_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to Disable interrupt for DBLRDY event */ +#define QDEC_INTENCLR_DBLRDY_Pos (3UL) /*!< Position of DBLRDY field. */ +#define QDEC_INTENCLR_DBLRDY_Msk (0x1UL << QDEC_INTENCLR_DBLRDY_Pos) /*!< Bit mask of DBLRDY field. */ +#define QDEC_INTENCLR_DBLRDY_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENCLR_DBLRDY_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENCLR_DBLRDY_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable interrupt for ACCOF event */ +#define QDEC_INTENCLR_ACCOF_Pos (2UL) /*!< Position of ACCOF field. */ +#define QDEC_INTENCLR_ACCOF_Msk (0x1UL << QDEC_INTENCLR_ACCOF_Pos) /*!< Bit mask of ACCOF field. */ +#define QDEC_INTENCLR_ACCOF_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENCLR_ACCOF_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENCLR_ACCOF_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for REPORTRDY event */ +#define QDEC_INTENCLR_REPORTRDY_Pos (1UL) /*!< Position of REPORTRDY field. */ +#define QDEC_INTENCLR_REPORTRDY_Msk (0x1UL << QDEC_INTENCLR_REPORTRDY_Pos) /*!< Bit mask of REPORTRDY field. */ +#define QDEC_INTENCLR_REPORTRDY_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENCLR_REPORTRDY_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENCLR_REPORTRDY_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for SAMPLERDY event */ +#define QDEC_INTENCLR_SAMPLERDY_Pos (0UL) /*!< Position of SAMPLERDY field. */ +#define QDEC_INTENCLR_SAMPLERDY_Msk (0x1UL << QDEC_INTENCLR_SAMPLERDY_Pos) /*!< Bit mask of SAMPLERDY field. */ +#define QDEC_INTENCLR_SAMPLERDY_Disabled (0UL) /*!< Read: Disabled */ +#define QDEC_INTENCLR_SAMPLERDY_Enabled (1UL) /*!< Read: Enabled */ +#define QDEC_INTENCLR_SAMPLERDY_Clear (1UL) /*!< Disable */ + +/* Register: QDEC_ENABLE */ +/* Description: Enable the quadrature decoder */ + +/* Bit 0 : Enable or disable the quadrature decoder */ +#define QDEC_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define QDEC_ENABLE_ENABLE_Msk (0x1UL << QDEC_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define QDEC_ENABLE_ENABLE_Disabled (0UL) /*!< Disable */ +#define QDEC_ENABLE_ENABLE_Enabled (1UL) /*!< Enable */ + +/* Register: QDEC_LEDPOL */ +/* Description: LED output pin polarity */ + +/* Bit 0 : LED output pin polarity */ +#define QDEC_LEDPOL_LEDPOL_Pos (0UL) /*!< Position of LEDPOL field. */ +#define QDEC_LEDPOL_LEDPOL_Msk (0x1UL << QDEC_LEDPOL_LEDPOL_Pos) /*!< Bit mask of LEDPOL field. */ +#define QDEC_LEDPOL_LEDPOL_ActiveLow (0UL) /*!< Led active on output pin low */ +#define QDEC_LEDPOL_LEDPOL_ActiveHigh (1UL) /*!< Led active on output pin high */ + +/* Register: QDEC_SAMPLEPER */ +/* Description: Sample period */ + +/* Bits 3..0 : Sample period. The SAMPLE register will be updated for every new sample */ +#define QDEC_SAMPLEPER_SAMPLEPER_Pos (0UL) /*!< Position of SAMPLEPER field. */ +#define QDEC_SAMPLEPER_SAMPLEPER_Msk (0xFUL << QDEC_SAMPLEPER_SAMPLEPER_Pos) /*!< Bit mask of SAMPLEPER field. */ +#define QDEC_SAMPLEPER_SAMPLEPER_128us (0UL) /*!< 128 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_256us (1UL) /*!< 256 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_512us (2UL) /*!< 512 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_1024us (3UL) /*!< 1024 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_2048us (4UL) /*!< 2048 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_4096us (5UL) /*!< 4096 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_8192us (6UL) /*!< 8192 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_16384us (7UL) /*!< 16384 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_32ms (8UL) /*!< 32768 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_65ms (9UL) /*!< 65536 us */ +#define QDEC_SAMPLEPER_SAMPLEPER_131ms (10UL) /*!< 131072 us */ + +/* Register: QDEC_SAMPLE */ +/* Description: Motion sample value */ + +/* Bits 31..0 : Last motion sample */ +#define QDEC_SAMPLE_SAMPLE_Pos (0UL) /*!< Position of SAMPLE field. */ +#define QDEC_SAMPLE_SAMPLE_Msk (0xFFFFFFFFUL << QDEC_SAMPLE_SAMPLE_Pos) /*!< Bit mask of SAMPLE field. */ + +/* Register: QDEC_REPORTPER */ +/* Description: Number of samples to be taken before REPORTRDY and DBLRDY events can be generated */ + +/* Bits 3..0 : Specifies the number of samples to be accumulated in the ACC register before the REPORTRDY and DBLRDY events can be generated */ +#define QDEC_REPORTPER_REPORTPER_Pos (0UL) /*!< Position of REPORTPER field. */ +#define QDEC_REPORTPER_REPORTPER_Msk (0xFUL << QDEC_REPORTPER_REPORTPER_Pos) /*!< Bit mask of REPORTPER field. */ +#define QDEC_REPORTPER_REPORTPER_10Smpl (0UL) /*!< 10 samples / report */ +#define QDEC_REPORTPER_REPORTPER_40Smpl (1UL) /*!< 40 samples / report */ +#define QDEC_REPORTPER_REPORTPER_80Smpl (2UL) /*!< 80 samples / report */ +#define QDEC_REPORTPER_REPORTPER_120Smpl (3UL) /*!< 120 samples / report */ +#define QDEC_REPORTPER_REPORTPER_160Smpl (4UL) /*!< 160 samples / report */ +#define QDEC_REPORTPER_REPORTPER_200Smpl (5UL) /*!< 200 samples / report */ +#define QDEC_REPORTPER_REPORTPER_240Smpl (6UL) /*!< 240 samples / report */ +#define QDEC_REPORTPER_REPORTPER_280Smpl (7UL) /*!< 280 samples / report */ +#define QDEC_REPORTPER_REPORTPER_1Smpl (8UL) /*!< 1 sample / report */ + +/* Register: QDEC_ACC */ +/* Description: Register accumulating the valid transitions */ + +/* Bits 31..0 : Register accumulating all valid samples (not double transition) read from the SAMPLE register */ +#define QDEC_ACC_ACC_Pos (0UL) /*!< Position of ACC field. */ +#define QDEC_ACC_ACC_Msk (0xFFFFFFFFUL << QDEC_ACC_ACC_Pos) /*!< Bit mask of ACC field. */ + +/* Register: QDEC_ACCREAD */ +/* Description: Snapshot of the ACC register, updated by the READCLRACC or RDCLRACC task */ + +/* Bits 31..0 : Snapshot of the ACC register. */ +#define QDEC_ACCREAD_ACCREAD_Pos (0UL) /*!< Position of ACCREAD field. */ +#define QDEC_ACCREAD_ACCREAD_Msk (0xFFFFFFFFUL << QDEC_ACCREAD_ACCREAD_Pos) /*!< Bit mask of ACCREAD field. */ + +/* Register: QDEC_PSEL_LED */ +/* Description: Pin select for LED signal */ + +/* Bit 31 : Connection */ +#define QDEC_PSEL_LED_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define QDEC_PSEL_LED_CONNECT_Msk (0x1UL << QDEC_PSEL_LED_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define QDEC_PSEL_LED_CONNECT_Connected (0UL) /*!< Connect */ +#define QDEC_PSEL_LED_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define QDEC_PSEL_LED_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define QDEC_PSEL_LED_PIN_Msk (0x1FUL << QDEC_PSEL_LED_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: QDEC_PSEL_A */ +/* Description: Pin select for A signal */ + +/* Bit 31 : Connection */ +#define QDEC_PSEL_A_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define QDEC_PSEL_A_CONNECT_Msk (0x1UL << QDEC_PSEL_A_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define QDEC_PSEL_A_CONNECT_Connected (0UL) /*!< Connect */ +#define QDEC_PSEL_A_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define QDEC_PSEL_A_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define QDEC_PSEL_A_PIN_Msk (0x1FUL << QDEC_PSEL_A_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: QDEC_PSEL_B */ +/* Description: Pin select for B signal */ + +/* Bit 31 : Connection */ +#define QDEC_PSEL_B_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define QDEC_PSEL_B_CONNECT_Msk (0x1UL << QDEC_PSEL_B_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define QDEC_PSEL_B_CONNECT_Connected (0UL) /*!< Connect */ +#define QDEC_PSEL_B_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define QDEC_PSEL_B_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define QDEC_PSEL_B_PIN_Msk (0x1FUL << QDEC_PSEL_B_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: QDEC_DBFEN */ +/* Description: Enable input debounce filters */ + +/* Bit 0 : Enable input debounce filters */ +#define QDEC_DBFEN_DBFEN_Pos (0UL) /*!< Position of DBFEN field. */ +#define QDEC_DBFEN_DBFEN_Msk (0x1UL << QDEC_DBFEN_DBFEN_Pos) /*!< Bit mask of DBFEN field. */ +#define QDEC_DBFEN_DBFEN_Disabled (0UL) /*!< Debounce input filters disabled */ +#define QDEC_DBFEN_DBFEN_Enabled (1UL) /*!< Debounce input filters enabled */ + +/* Register: QDEC_LEDPRE */ +/* Description: Time period the LED is switched ON prior to sampling */ + +/* Bits 8..0 : Period in us the LED is switched on prior to sampling */ +#define QDEC_LEDPRE_LEDPRE_Pos (0UL) /*!< Position of LEDPRE field. */ +#define QDEC_LEDPRE_LEDPRE_Msk (0x1FFUL << QDEC_LEDPRE_LEDPRE_Pos) /*!< Bit mask of LEDPRE field. */ + +/* Register: QDEC_ACCDBL */ +/* Description: Register accumulating the number of detected double transitions */ + +/* Bits 3..0 : Register accumulating the number of detected double or illegal transitions. ( SAMPLE = 2 ). */ +#define QDEC_ACCDBL_ACCDBL_Pos (0UL) /*!< Position of ACCDBL field. */ +#define QDEC_ACCDBL_ACCDBL_Msk (0xFUL << QDEC_ACCDBL_ACCDBL_Pos) /*!< Bit mask of ACCDBL field. */ + +/* Register: QDEC_ACCDBLREAD */ +/* Description: Snapshot of the ACCDBL, updated by the READCLRACC or RDCLRDBL task */ + +/* Bits 3..0 : Snapshot of the ACCDBL register. This field is updated when the READCLRACC or RDCLRDBL task is triggered. */ +#define QDEC_ACCDBLREAD_ACCDBLREAD_Pos (0UL) /*!< Position of ACCDBLREAD field. */ +#define QDEC_ACCDBLREAD_ACCDBLREAD_Msk (0xFUL << QDEC_ACCDBLREAD_ACCDBLREAD_Pos) /*!< Bit mask of ACCDBLREAD field. */ + + +/* Peripheral: RADIO */ +/* Description: 2.4 GHz Radio */ + +/* Register: RADIO_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 8 : Shortcut between DISABLED event and RSSISTOP task */ +#define RADIO_SHORTS_DISABLED_RSSISTOP_Pos (8UL) /*!< Position of DISABLED_RSSISTOP field. */ +#define RADIO_SHORTS_DISABLED_RSSISTOP_Msk (0x1UL << RADIO_SHORTS_DISABLED_RSSISTOP_Pos) /*!< Bit mask of DISABLED_RSSISTOP field. */ +#define RADIO_SHORTS_DISABLED_RSSISTOP_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_DISABLED_RSSISTOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 6 : Shortcut between ADDRESS event and BCSTART task */ +#define RADIO_SHORTS_ADDRESS_BCSTART_Pos (6UL) /*!< Position of ADDRESS_BCSTART field. */ +#define RADIO_SHORTS_ADDRESS_BCSTART_Msk (0x1UL << RADIO_SHORTS_ADDRESS_BCSTART_Pos) /*!< Bit mask of ADDRESS_BCSTART field. */ +#define RADIO_SHORTS_ADDRESS_BCSTART_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_ADDRESS_BCSTART_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 5 : Shortcut between END event and START task */ +#define RADIO_SHORTS_END_START_Pos (5UL) /*!< Position of END_START field. */ +#define RADIO_SHORTS_END_START_Msk (0x1UL << RADIO_SHORTS_END_START_Pos) /*!< Bit mask of END_START field. */ +#define RADIO_SHORTS_END_START_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_END_START_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 4 : Shortcut between ADDRESS event and RSSISTART task */ +#define RADIO_SHORTS_ADDRESS_RSSISTART_Pos (4UL) /*!< Position of ADDRESS_RSSISTART field. */ +#define RADIO_SHORTS_ADDRESS_RSSISTART_Msk (0x1UL << RADIO_SHORTS_ADDRESS_RSSISTART_Pos) /*!< Bit mask of ADDRESS_RSSISTART field. */ +#define RADIO_SHORTS_ADDRESS_RSSISTART_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_ADDRESS_RSSISTART_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 3 : Shortcut between DISABLED event and RXEN task */ +#define RADIO_SHORTS_DISABLED_RXEN_Pos (3UL) /*!< Position of DISABLED_RXEN field. */ +#define RADIO_SHORTS_DISABLED_RXEN_Msk (0x1UL << RADIO_SHORTS_DISABLED_RXEN_Pos) /*!< Bit mask of DISABLED_RXEN field. */ +#define RADIO_SHORTS_DISABLED_RXEN_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_DISABLED_RXEN_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 2 : Shortcut between DISABLED event and TXEN task */ +#define RADIO_SHORTS_DISABLED_TXEN_Pos (2UL) /*!< Position of DISABLED_TXEN field. */ +#define RADIO_SHORTS_DISABLED_TXEN_Msk (0x1UL << RADIO_SHORTS_DISABLED_TXEN_Pos) /*!< Bit mask of DISABLED_TXEN field. */ +#define RADIO_SHORTS_DISABLED_TXEN_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_DISABLED_TXEN_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 1 : Shortcut between END event and DISABLE task */ +#define RADIO_SHORTS_END_DISABLE_Pos (1UL) /*!< Position of END_DISABLE field. */ +#define RADIO_SHORTS_END_DISABLE_Msk (0x1UL << RADIO_SHORTS_END_DISABLE_Pos) /*!< Bit mask of END_DISABLE field. */ +#define RADIO_SHORTS_END_DISABLE_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_END_DISABLE_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 0 : Shortcut between READY event and START task */ +#define RADIO_SHORTS_READY_START_Pos (0UL) /*!< Position of READY_START field. */ +#define RADIO_SHORTS_READY_START_Msk (0x1UL << RADIO_SHORTS_READY_START_Pos) /*!< Bit mask of READY_START field. */ +#define RADIO_SHORTS_READY_START_Disabled (0UL) /*!< Disable shortcut */ +#define RADIO_SHORTS_READY_START_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: RADIO_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 13 : Write '1' to Enable interrupt for CRCERROR event */ +#define RADIO_INTENSET_CRCERROR_Pos (13UL) /*!< Position of CRCERROR field. */ +#define RADIO_INTENSET_CRCERROR_Msk (0x1UL << RADIO_INTENSET_CRCERROR_Pos) /*!< Bit mask of CRCERROR field. */ +#define RADIO_INTENSET_CRCERROR_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_CRCERROR_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_CRCERROR_Set (1UL) /*!< Enable */ + +/* Bit 12 : Write '1' to Enable interrupt for CRCOK event */ +#define RADIO_INTENSET_CRCOK_Pos (12UL) /*!< Position of CRCOK field. */ +#define RADIO_INTENSET_CRCOK_Msk (0x1UL << RADIO_INTENSET_CRCOK_Pos) /*!< Bit mask of CRCOK field. */ +#define RADIO_INTENSET_CRCOK_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_CRCOK_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_CRCOK_Set (1UL) /*!< Enable */ + +/* Bit 10 : Write '1' to Enable interrupt for BCMATCH event */ +#define RADIO_INTENSET_BCMATCH_Pos (10UL) /*!< Position of BCMATCH field. */ +#define RADIO_INTENSET_BCMATCH_Msk (0x1UL << RADIO_INTENSET_BCMATCH_Pos) /*!< Bit mask of BCMATCH field. */ +#define RADIO_INTENSET_BCMATCH_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_BCMATCH_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_BCMATCH_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to Enable interrupt for RSSIEND event */ +#define RADIO_INTENSET_RSSIEND_Pos (7UL) /*!< Position of RSSIEND field. */ +#define RADIO_INTENSET_RSSIEND_Msk (0x1UL << RADIO_INTENSET_RSSIEND_Pos) /*!< Bit mask of RSSIEND field. */ +#define RADIO_INTENSET_RSSIEND_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_RSSIEND_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_RSSIEND_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to Enable interrupt for DEVMISS event */ +#define RADIO_INTENSET_DEVMISS_Pos (6UL) /*!< Position of DEVMISS field. */ +#define RADIO_INTENSET_DEVMISS_Msk (0x1UL << RADIO_INTENSET_DEVMISS_Pos) /*!< Bit mask of DEVMISS field. */ +#define RADIO_INTENSET_DEVMISS_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_DEVMISS_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_DEVMISS_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to Enable interrupt for DEVMATCH event */ +#define RADIO_INTENSET_DEVMATCH_Pos (5UL) /*!< Position of DEVMATCH field. */ +#define RADIO_INTENSET_DEVMATCH_Msk (0x1UL << RADIO_INTENSET_DEVMATCH_Pos) /*!< Bit mask of DEVMATCH field. */ +#define RADIO_INTENSET_DEVMATCH_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_DEVMATCH_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_DEVMATCH_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to Enable interrupt for DISABLED event */ +#define RADIO_INTENSET_DISABLED_Pos (4UL) /*!< Position of DISABLED field. */ +#define RADIO_INTENSET_DISABLED_Msk (0x1UL << RADIO_INTENSET_DISABLED_Pos) /*!< Bit mask of DISABLED field. */ +#define RADIO_INTENSET_DISABLED_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_DISABLED_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_DISABLED_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to Enable interrupt for END event */ +#define RADIO_INTENSET_END_Pos (3UL) /*!< Position of END field. */ +#define RADIO_INTENSET_END_Msk (0x1UL << RADIO_INTENSET_END_Pos) /*!< Bit mask of END field. */ +#define RADIO_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_END_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable interrupt for PAYLOAD event */ +#define RADIO_INTENSET_PAYLOAD_Pos (2UL) /*!< Position of PAYLOAD field. */ +#define RADIO_INTENSET_PAYLOAD_Msk (0x1UL << RADIO_INTENSET_PAYLOAD_Pos) /*!< Bit mask of PAYLOAD field. */ +#define RADIO_INTENSET_PAYLOAD_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_PAYLOAD_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_PAYLOAD_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for ADDRESS event */ +#define RADIO_INTENSET_ADDRESS_Pos (1UL) /*!< Position of ADDRESS field. */ +#define RADIO_INTENSET_ADDRESS_Msk (0x1UL << RADIO_INTENSET_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ +#define RADIO_INTENSET_ADDRESS_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_ADDRESS_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_ADDRESS_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for READY event */ +#define RADIO_INTENSET_READY_Pos (0UL) /*!< Position of READY field. */ +#define RADIO_INTENSET_READY_Msk (0x1UL << RADIO_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ +#define RADIO_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENSET_READY_Set (1UL) /*!< Enable */ + +/* Register: RADIO_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 13 : Write '1' to Disable interrupt for CRCERROR event */ +#define RADIO_INTENCLR_CRCERROR_Pos (13UL) /*!< Position of CRCERROR field. */ +#define RADIO_INTENCLR_CRCERROR_Msk (0x1UL << RADIO_INTENCLR_CRCERROR_Pos) /*!< Bit mask of CRCERROR field. */ +#define RADIO_INTENCLR_CRCERROR_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_CRCERROR_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_CRCERROR_Clear (1UL) /*!< Disable */ + +/* Bit 12 : Write '1' to Disable interrupt for CRCOK event */ +#define RADIO_INTENCLR_CRCOK_Pos (12UL) /*!< Position of CRCOK field. */ +#define RADIO_INTENCLR_CRCOK_Msk (0x1UL << RADIO_INTENCLR_CRCOK_Pos) /*!< Bit mask of CRCOK field. */ +#define RADIO_INTENCLR_CRCOK_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_CRCOK_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_CRCOK_Clear (1UL) /*!< Disable */ + +/* Bit 10 : Write '1' to Disable interrupt for BCMATCH event */ +#define RADIO_INTENCLR_BCMATCH_Pos (10UL) /*!< Position of BCMATCH field. */ +#define RADIO_INTENCLR_BCMATCH_Msk (0x1UL << RADIO_INTENCLR_BCMATCH_Pos) /*!< Bit mask of BCMATCH field. */ +#define RADIO_INTENCLR_BCMATCH_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_BCMATCH_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_BCMATCH_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to Disable interrupt for RSSIEND event */ +#define RADIO_INTENCLR_RSSIEND_Pos (7UL) /*!< Position of RSSIEND field. */ +#define RADIO_INTENCLR_RSSIEND_Msk (0x1UL << RADIO_INTENCLR_RSSIEND_Pos) /*!< Bit mask of RSSIEND field. */ +#define RADIO_INTENCLR_RSSIEND_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_RSSIEND_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_RSSIEND_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to Disable interrupt for DEVMISS event */ +#define RADIO_INTENCLR_DEVMISS_Pos (6UL) /*!< Position of DEVMISS field. */ +#define RADIO_INTENCLR_DEVMISS_Msk (0x1UL << RADIO_INTENCLR_DEVMISS_Pos) /*!< Bit mask of DEVMISS field. */ +#define RADIO_INTENCLR_DEVMISS_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_DEVMISS_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_DEVMISS_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to Disable interrupt for DEVMATCH event */ +#define RADIO_INTENCLR_DEVMATCH_Pos (5UL) /*!< Position of DEVMATCH field. */ +#define RADIO_INTENCLR_DEVMATCH_Msk (0x1UL << RADIO_INTENCLR_DEVMATCH_Pos) /*!< Bit mask of DEVMATCH field. */ +#define RADIO_INTENCLR_DEVMATCH_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_DEVMATCH_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_DEVMATCH_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to Disable interrupt for DISABLED event */ +#define RADIO_INTENCLR_DISABLED_Pos (4UL) /*!< Position of DISABLED field. */ +#define RADIO_INTENCLR_DISABLED_Msk (0x1UL << RADIO_INTENCLR_DISABLED_Pos) /*!< Bit mask of DISABLED field. */ +#define RADIO_INTENCLR_DISABLED_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_DISABLED_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_DISABLED_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to Disable interrupt for END event */ +#define RADIO_INTENCLR_END_Pos (3UL) /*!< Position of END field. */ +#define RADIO_INTENCLR_END_Msk (0x1UL << RADIO_INTENCLR_END_Pos) /*!< Bit mask of END field. */ +#define RADIO_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_END_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable interrupt for PAYLOAD event */ +#define RADIO_INTENCLR_PAYLOAD_Pos (2UL) /*!< Position of PAYLOAD field. */ +#define RADIO_INTENCLR_PAYLOAD_Msk (0x1UL << RADIO_INTENCLR_PAYLOAD_Pos) /*!< Bit mask of PAYLOAD field. */ +#define RADIO_INTENCLR_PAYLOAD_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_PAYLOAD_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_PAYLOAD_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for ADDRESS event */ +#define RADIO_INTENCLR_ADDRESS_Pos (1UL) /*!< Position of ADDRESS field. */ +#define RADIO_INTENCLR_ADDRESS_Msk (0x1UL << RADIO_INTENCLR_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ +#define RADIO_INTENCLR_ADDRESS_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_ADDRESS_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_ADDRESS_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for READY event */ +#define RADIO_INTENCLR_READY_Pos (0UL) /*!< Position of READY field. */ +#define RADIO_INTENCLR_READY_Msk (0x1UL << RADIO_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ +#define RADIO_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */ +#define RADIO_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */ +#define RADIO_INTENCLR_READY_Clear (1UL) /*!< Disable */ + +/* Register: RADIO_CRCSTATUS */ +/* Description: CRC status */ + +/* Bit 0 : CRC status of packet received */ +#define RADIO_CRCSTATUS_CRCSTATUS_Pos (0UL) /*!< Position of CRCSTATUS field. */ +#define RADIO_CRCSTATUS_CRCSTATUS_Msk (0x1UL << RADIO_CRCSTATUS_CRCSTATUS_Pos) /*!< Bit mask of CRCSTATUS field. */ +#define RADIO_CRCSTATUS_CRCSTATUS_CRCError (0UL) /*!< Packet received with CRC error */ +#define RADIO_CRCSTATUS_CRCSTATUS_CRCOk (1UL) /*!< Packet received with CRC ok */ + +/* Register: RADIO_RXMATCH */ +/* Description: Received address */ + +/* Bits 2..0 : Received address */ +#define RADIO_RXMATCH_RXMATCH_Pos (0UL) /*!< Position of RXMATCH field. */ +#define RADIO_RXMATCH_RXMATCH_Msk (0x7UL << RADIO_RXMATCH_RXMATCH_Pos) /*!< Bit mask of RXMATCH field. */ + +/* Register: RADIO_RXCRC */ +/* Description: CRC field of previously received packet */ + +/* Bits 23..0 : CRC field of previously received packet */ +#define RADIO_RXCRC_RXCRC_Pos (0UL) /*!< Position of RXCRC field. */ +#define RADIO_RXCRC_RXCRC_Msk (0xFFFFFFUL << RADIO_RXCRC_RXCRC_Pos) /*!< Bit mask of RXCRC field. */ + +/* Register: RADIO_DAI */ +/* Description: Device address match index */ + +/* Bits 2..0 : Device address match index */ +#define RADIO_DAI_DAI_Pos (0UL) /*!< Position of DAI field. */ +#define RADIO_DAI_DAI_Msk (0x7UL << RADIO_DAI_DAI_Pos) /*!< Bit mask of DAI field. */ + +/* Register: RADIO_PACKETPTR */ +/* Description: Packet pointer */ + +/* Bits 31..0 : Packet pointer */ +#define RADIO_PACKETPTR_PACKETPTR_Pos (0UL) /*!< Position of PACKETPTR field. */ +#define RADIO_PACKETPTR_PACKETPTR_Msk (0xFFFFFFFFUL << RADIO_PACKETPTR_PACKETPTR_Pos) /*!< Bit mask of PACKETPTR field. */ + +/* Register: RADIO_FREQUENCY */ +/* Description: Frequency */ + +/* Bit 8 : Channel map selection. */ +#define RADIO_FREQUENCY_MAP_Pos (8UL) /*!< Position of MAP field. */ +#define RADIO_FREQUENCY_MAP_Msk (0x1UL << RADIO_FREQUENCY_MAP_Pos) /*!< Bit mask of MAP field. */ +#define RADIO_FREQUENCY_MAP_Default (0UL) /*!< Channel map between 2400 MHZ .. 2500 MHz */ +#define RADIO_FREQUENCY_MAP_Low (1UL) /*!< Channel map between 2360 MHZ .. 2460 MHz */ + +/* Bits 6..0 : Radio channel frequency */ +#define RADIO_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ +#define RADIO_FREQUENCY_FREQUENCY_Msk (0x7FUL << RADIO_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ + +/* Register: RADIO_TXPOWER */ +/* Description: Output power */ + +/* Bits 7..0 : RADIO output power. */ +#define RADIO_TXPOWER_TXPOWER_Pos (0UL) /*!< Position of TXPOWER field. */ +#define RADIO_TXPOWER_TXPOWER_Msk (0xFFUL << RADIO_TXPOWER_TXPOWER_Pos) /*!< Bit mask of TXPOWER field. */ +#define RADIO_TXPOWER_TXPOWER_0dBm (0x00UL) /*!< 0 dBm */ +#define RADIO_TXPOWER_TXPOWER_Pos3dBm (0x03UL) /*!< +3 dBm */ +#define RADIO_TXPOWER_TXPOWER_Pos4dBm (0x04UL) /*!< +4 dBm */ +#define RADIO_TXPOWER_TXPOWER_Neg30dBm (0xD8UL) /*!< Deprecated enumerator - -40 dBm */ +#define RADIO_TXPOWER_TXPOWER_Neg40dBm (0xD8UL) /*!< -40 dBm */ +#define RADIO_TXPOWER_TXPOWER_Neg20dBm (0xECUL) /*!< -20 dBm */ +#define RADIO_TXPOWER_TXPOWER_Neg16dBm (0xF0UL) /*!< -16 dBm */ +#define RADIO_TXPOWER_TXPOWER_Neg12dBm (0xF4UL) /*!< -12 dBm */ +#define RADIO_TXPOWER_TXPOWER_Neg8dBm (0xF8UL) /*!< -8 dBm */ +#define RADIO_TXPOWER_TXPOWER_Neg4dBm (0xFCUL) /*!< -4 dBm */ + +/* Register: RADIO_MODE */ +/* Description: Data rate and modulation */ + +/* Bits 3..0 : Radio data rate and modulation setting. The radio supports Frequency-shift Keying (FSK) modulation. */ +#define RADIO_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ +#define RADIO_MODE_MODE_Msk (0xFUL << RADIO_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ +#define RADIO_MODE_MODE_Nrf_1Mbit (0UL) /*!< 1 Mbit/s Nordic proprietary radio mode */ +#define RADIO_MODE_MODE_Nrf_2Mbit (1UL) /*!< 2 Mbit/s Nordic proprietary radio mode */ +#define RADIO_MODE_MODE_Nrf_250Kbit (2UL) /*!< Deprecated enumerator - 250 kbit/s Nordic proprietary radio mode */ +#define RADIO_MODE_MODE_Ble_1Mbit (3UL) /*!< 1 Mbit/s Bluetooth Low Energy */ +#define RADIO_MODE_MODE_Ble_2Mbit (4UL) /*!< 2 Mbit/s Bluetooth Low Energy */ + +/* Register: RADIO_PCNF0 */ +/* Description: Packet configuration register 0 */ + +/* Bit 24 : Length of preamble on air. Decision point: TASKS_START task */ +#define RADIO_PCNF0_PLEN_Pos (24UL) /*!< Position of PLEN field. */ +#define RADIO_PCNF0_PLEN_Msk (0x1UL << RADIO_PCNF0_PLEN_Pos) /*!< Bit mask of PLEN field. */ +#define RADIO_PCNF0_PLEN_8bit (0UL) /*!< 8-bit preamble */ +#define RADIO_PCNF0_PLEN_16bit (1UL) /*!< 16-bit preamble */ + +/* Bit 20 : Include or exclude S1 field in RAM */ +#define RADIO_PCNF0_S1INCL_Pos (20UL) /*!< Position of S1INCL field. */ +#define RADIO_PCNF0_S1INCL_Msk (0x1UL << RADIO_PCNF0_S1INCL_Pos) /*!< Bit mask of S1INCL field. */ +#define RADIO_PCNF0_S1INCL_Automatic (0UL) /*!< Include S1 field in RAM only if S1LEN > 0 */ +#define RADIO_PCNF0_S1INCL_Include (1UL) /*!< Always include S1 field in RAM independent of S1LEN */ + +/* Bits 19..16 : Length on air of S1 field in number of bits. */ +#define RADIO_PCNF0_S1LEN_Pos (16UL) /*!< Position of S1LEN field. */ +#define RADIO_PCNF0_S1LEN_Msk (0xFUL << RADIO_PCNF0_S1LEN_Pos) /*!< Bit mask of S1LEN field. */ + +/* Bit 8 : Length on air of S0 field in number of bytes. */ +#define RADIO_PCNF0_S0LEN_Pos (8UL) /*!< Position of S0LEN field. */ +#define RADIO_PCNF0_S0LEN_Msk (0x1UL << RADIO_PCNF0_S0LEN_Pos) /*!< Bit mask of S0LEN field. */ + +/* Bits 3..0 : Length on air of LENGTH field in number of bits. */ +#define RADIO_PCNF0_LFLEN_Pos (0UL) /*!< Position of LFLEN field. */ +#define RADIO_PCNF0_LFLEN_Msk (0xFUL << RADIO_PCNF0_LFLEN_Pos) /*!< Bit mask of LFLEN field. */ + +/* Register: RADIO_PCNF1 */ +/* Description: Packet configuration register 1 */ + +/* Bit 25 : Enable or disable packet whitening */ +#define RADIO_PCNF1_WHITEEN_Pos (25UL) /*!< Position of WHITEEN field. */ +#define RADIO_PCNF1_WHITEEN_Msk (0x1UL << RADIO_PCNF1_WHITEEN_Pos) /*!< Bit mask of WHITEEN field. */ +#define RADIO_PCNF1_WHITEEN_Disabled (0UL) /*!< Disable */ +#define RADIO_PCNF1_WHITEEN_Enabled (1UL) /*!< Enable */ + +/* Bit 24 : On air endianness of packet, this applies to the S0, LENGTH, S1 and the PAYLOAD fields. */ +#define RADIO_PCNF1_ENDIAN_Pos (24UL) /*!< Position of ENDIAN field. */ +#define RADIO_PCNF1_ENDIAN_Msk (0x1UL << RADIO_PCNF1_ENDIAN_Pos) /*!< Bit mask of ENDIAN field. */ +#define RADIO_PCNF1_ENDIAN_Little (0UL) /*!< Least Significant bit on air first */ +#define RADIO_PCNF1_ENDIAN_Big (1UL) /*!< Most significant bit on air first */ + +/* Bits 18..16 : Base address length in number of bytes */ +#define RADIO_PCNF1_BALEN_Pos (16UL) /*!< Position of BALEN field. */ +#define RADIO_PCNF1_BALEN_Msk (0x7UL << RADIO_PCNF1_BALEN_Pos) /*!< Bit mask of BALEN field. */ + +/* Bits 15..8 : Static length in number of bytes */ +#define RADIO_PCNF1_STATLEN_Pos (8UL) /*!< Position of STATLEN field. */ +#define RADIO_PCNF1_STATLEN_Msk (0xFFUL << RADIO_PCNF1_STATLEN_Pos) /*!< Bit mask of STATLEN field. */ + +/* Bits 7..0 : Maximum length of packet payload. If the packet payload is larger than MAXLEN, the radio will truncate the payload to MAXLEN. */ +#define RADIO_PCNF1_MAXLEN_Pos (0UL) /*!< Position of MAXLEN field. */ +#define RADIO_PCNF1_MAXLEN_Msk (0xFFUL << RADIO_PCNF1_MAXLEN_Pos) /*!< Bit mask of MAXLEN field. */ + +/* Register: RADIO_BASE0 */ +/* Description: Base address 0 */ + +/* Bits 31..0 : Base address 0 */ +#define RADIO_BASE0_BASE0_Pos (0UL) /*!< Position of BASE0 field. */ +#define RADIO_BASE0_BASE0_Msk (0xFFFFFFFFUL << RADIO_BASE0_BASE0_Pos) /*!< Bit mask of BASE0 field. */ + +/* Register: RADIO_BASE1 */ +/* Description: Base address 1 */ + +/* Bits 31..0 : Base address 1 */ +#define RADIO_BASE1_BASE1_Pos (0UL) /*!< Position of BASE1 field. */ +#define RADIO_BASE1_BASE1_Msk (0xFFFFFFFFUL << RADIO_BASE1_BASE1_Pos) /*!< Bit mask of BASE1 field. */ + +/* Register: RADIO_PREFIX0 */ +/* Description: Prefixes bytes for logical addresses 0-3 */ + +/* Bits 31..24 : Address prefix 3. */ +#define RADIO_PREFIX0_AP3_Pos (24UL) /*!< Position of AP3 field. */ +#define RADIO_PREFIX0_AP3_Msk (0xFFUL << RADIO_PREFIX0_AP3_Pos) /*!< Bit mask of AP3 field. */ + +/* Bits 23..16 : Address prefix 2. */ +#define RADIO_PREFIX0_AP2_Pos (16UL) /*!< Position of AP2 field. */ +#define RADIO_PREFIX0_AP2_Msk (0xFFUL << RADIO_PREFIX0_AP2_Pos) /*!< Bit mask of AP2 field. */ + +/* Bits 15..8 : Address prefix 1. */ +#define RADIO_PREFIX0_AP1_Pos (8UL) /*!< Position of AP1 field. */ +#define RADIO_PREFIX0_AP1_Msk (0xFFUL << RADIO_PREFIX0_AP1_Pos) /*!< Bit mask of AP1 field. */ + +/* Bits 7..0 : Address prefix 0. */ +#define RADIO_PREFIX0_AP0_Pos (0UL) /*!< Position of AP0 field. */ +#define RADIO_PREFIX0_AP0_Msk (0xFFUL << RADIO_PREFIX0_AP0_Pos) /*!< Bit mask of AP0 field. */ + +/* Register: RADIO_PREFIX1 */ +/* Description: Prefixes bytes for logical addresses 4-7 */ + +/* Bits 31..24 : Address prefix 7. */ +#define RADIO_PREFIX1_AP7_Pos (24UL) /*!< Position of AP7 field. */ +#define RADIO_PREFIX1_AP7_Msk (0xFFUL << RADIO_PREFIX1_AP7_Pos) /*!< Bit mask of AP7 field. */ + +/* Bits 23..16 : Address prefix 6. */ +#define RADIO_PREFIX1_AP6_Pos (16UL) /*!< Position of AP6 field. */ +#define RADIO_PREFIX1_AP6_Msk (0xFFUL << RADIO_PREFIX1_AP6_Pos) /*!< Bit mask of AP6 field. */ + +/* Bits 15..8 : Address prefix 5. */ +#define RADIO_PREFIX1_AP5_Pos (8UL) /*!< Position of AP5 field. */ +#define RADIO_PREFIX1_AP5_Msk (0xFFUL << RADIO_PREFIX1_AP5_Pos) /*!< Bit mask of AP5 field. */ + +/* Bits 7..0 : Address prefix 4. */ +#define RADIO_PREFIX1_AP4_Pos (0UL) /*!< Position of AP4 field. */ +#define RADIO_PREFIX1_AP4_Msk (0xFFUL << RADIO_PREFIX1_AP4_Pos) /*!< Bit mask of AP4 field. */ + +/* Register: RADIO_TXADDRESS */ +/* Description: Transmit address select */ + +/* Bits 2..0 : Transmit address select */ +#define RADIO_TXADDRESS_TXADDRESS_Pos (0UL) /*!< Position of TXADDRESS field. */ +#define RADIO_TXADDRESS_TXADDRESS_Msk (0x7UL << RADIO_TXADDRESS_TXADDRESS_Pos) /*!< Bit mask of TXADDRESS field. */ + +/* Register: RADIO_RXADDRESSES */ +/* Description: Receive address select */ + +/* Bit 7 : Enable or disable reception on logical address 7. */ +#define RADIO_RXADDRESSES_ADDR7_Pos (7UL) /*!< Position of ADDR7 field. */ +#define RADIO_RXADDRESSES_ADDR7_Msk (0x1UL << RADIO_RXADDRESSES_ADDR7_Pos) /*!< Bit mask of ADDR7 field. */ +#define RADIO_RXADDRESSES_ADDR7_Disabled (0UL) /*!< Disable */ +#define RADIO_RXADDRESSES_ADDR7_Enabled (1UL) /*!< Enable */ + +/* Bit 6 : Enable or disable reception on logical address 6. */ +#define RADIO_RXADDRESSES_ADDR6_Pos (6UL) /*!< Position of ADDR6 field. */ +#define RADIO_RXADDRESSES_ADDR6_Msk (0x1UL << RADIO_RXADDRESSES_ADDR6_Pos) /*!< Bit mask of ADDR6 field. */ +#define RADIO_RXADDRESSES_ADDR6_Disabled (0UL) /*!< Disable */ +#define RADIO_RXADDRESSES_ADDR6_Enabled (1UL) /*!< Enable */ + +/* Bit 5 : Enable or disable reception on logical address 5. */ +#define RADIO_RXADDRESSES_ADDR5_Pos (5UL) /*!< Position of ADDR5 field. */ +#define RADIO_RXADDRESSES_ADDR5_Msk (0x1UL << RADIO_RXADDRESSES_ADDR5_Pos) /*!< Bit mask of ADDR5 field. */ +#define RADIO_RXADDRESSES_ADDR5_Disabled (0UL) /*!< Disable */ +#define RADIO_RXADDRESSES_ADDR5_Enabled (1UL) /*!< Enable */ + +/* Bit 4 : Enable or disable reception on logical address 4. */ +#define RADIO_RXADDRESSES_ADDR4_Pos (4UL) /*!< Position of ADDR4 field. */ +#define RADIO_RXADDRESSES_ADDR4_Msk (0x1UL << RADIO_RXADDRESSES_ADDR4_Pos) /*!< Bit mask of ADDR4 field. */ +#define RADIO_RXADDRESSES_ADDR4_Disabled (0UL) /*!< Disable */ +#define RADIO_RXADDRESSES_ADDR4_Enabled (1UL) /*!< Enable */ + +/* Bit 3 : Enable or disable reception on logical address 3. */ +#define RADIO_RXADDRESSES_ADDR3_Pos (3UL) /*!< Position of ADDR3 field. */ +#define RADIO_RXADDRESSES_ADDR3_Msk (0x1UL << RADIO_RXADDRESSES_ADDR3_Pos) /*!< Bit mask of ADDR3 field. */ +#define RADIO_RXADDRESSES_ADDR3_Disabled (0UL) /*!< Disable */ +#define RADIO_RXADDRESSES_ADDR3_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable reception on logical address 2. */ +#define RADIO_RXADDRESSES_ADDR2_Pos (2UL) /*!< Position of ADDR2 field. */ +#define RADIO_RXADDRESSES_ADDR2_Msk (0x1UL << RADIO_RXADDRESSES_ADDR2_Pos) /*!< Bit mask of ADDR2 field. */ +#define RADIO_RXADDRESSES_ADDR2_Disabled (0UL) /*!< Disable */ +#define RADIO_RXADDRESSES_ADDR2_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable reception on logical address 1. */ +#define RADIO_RXADDRESSES_ADDR1_Pos (1UL) /*!< Position of ADDR1 field. */ +#define RADIO_RXADDRESSES_ADDR1_Msk (0x1UL << RADIO_RXADDRESSES_ADDR1_Pos) /*!< Bit mask of ADDR1 field. */ +#define RADIO_RXADDRESSES_ADDR1_Disabled (0UL) /*!< Disable */ +#define RADIO_RXADDRESSES_ADDR1_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable reception on logical address 0. */ +#define RADIO_RXADDRESSES_ADDR0_Pos (0UL) /*!< Position of ADDR0 field. */ +#define RADIO_RXADDRESSES_ADDR0_Msk (0x1UL << RADIO_RXADDRESSES_ADDR0_Pos) /*!< Bit mask of ADDR0 field. */ +#define RADIO_RXADDRESSES_ADDR0_Disabled (0UL) /*!< Disable */ +#define RADIO_RXADDRESSES_ADDR0_Enabled (1UL) /*!< Enable */ + +/* Register: RADIO_CRCCNF */ +/* Description: CRC configuration */ + +/* Bit 8 : Include or exclude packet address field out of CRC calculation. */ +#define RADIO_CRCCNF_SKIPADDR_Pos (8UL) /*!< Position of SKIPADDR field. */ +#define RADIO_CRCCNF_SKIPADDR_Msk (0x1UL << RADIO_CRCCNF_SKIPADDR_Pos) /*!< Bit mask of SKIPADDR field. */ +#define RADIO_CRCCNF_SKIPADDR_Include (0UL) /*!< CRC calculation includes address field */ +#define RADIO_CRCCNF_SKIPADDR_Skip (1UL) /*!< CRC calculation does not include address field. The CRC calculation will start at the first byte after the address. */ + +/* Bits 1..0 : CRC length in number of bytes. */ +#define RADIO_CRCCNF_LEN_Pos (0UL) /*!< Position of LEN field. */ +#define RADIO_CRCCNF_LEN_Msk (0x3UL << RADIO_CRCCNF_LEN_Pos) /*!< Bit mask of LEN field. */ +#define RADIO_CRCCNF_LEN_Disabled (0UL) /*!< CRC length is zero and CRC calculation is disabled */ +#define RADIO_CRCCNF_LEN_One (1UL) /*!< CRC length is one byte and CRC calculation is enabled */ +#define RADIO_CRCCNF_LEN_Two (2UL) /*!< CRC length is two bytes and CRC calculation is enabled */ +#define RADIO_CRCCNF_LEN_Three (3UL) /*!< CRC length is three bytes and CRC calculation is enabled */ + +/* Register: RADIO_CRCPOLY */ +/* Description: CRC polynomial */ + +/* Bits 23..0 : CRC polynomial */ +#define RADIO_CRCPOLY_CRCPOLY_Pos (0UL) /*!< Position of CRCPOLY field. */ +#define RADIO_CRCPOLY_CRCPOLY_Msk (0xFFFFFFUL << RADIO_CRCPOLY_CRCPOLY_Pos) /*!< Bit mask of CRCPOLY field. */ + +/* Register: RADIO_CRCINIT */ +/* Description: CRC initial value */ + +/* Bits 23..0 : CRC initial value */ +#define RADIO_CRCINIT_CRCINIT_Pos (0UL) /*!< Position of CRCINIT field. */ +#define RADIO_CRCINIT_CRCINIT_Msk (0xFFFFFFUL << RADIO_CRCINIT_CRCINIT_Pos) /*!< Bit mask of CRCINIT field. */ + +/* Register: RADIO_TIFS */ +/* Description: Inter Frame Spacing in us */ + +/* Bits 7..0 : Inter Frame Spacing in us */ +#define RADIO_TIFS_TIFS_Pos (0UL) /*!< Position of TIFS field. */ +#define RADIO_TIFS_TIFS_Msk (0xFFUL << RADIO_TIFS_TIFS_Pos) /*!< Bit mask of TIFS field. */ + +/* Register: RADIO_RSSISAMPLE */ +/* Description: RSSI sample */ + +/* Bits 6..0 : RSSI sample */ +#define RADIO_RSSISAMPLE_RSSISAMPLE_Pos (0UL) /*!< Position of RSSISAMPLE field. */ +#define RADIO_RSSISAMPLE_RSSISAMPLE_Msk (0x7FUL << RADIO_RSSISAMPLE_RSSISAMPLE_Pos) /*!< Bit mask of RSSISAMPLE field. */ + +/* Register: RADIO_STATE */ +/* Description: Current radio state */ + +/* Bits 3..0 : Current radio state */ +#define RADIO_STATE_STATE_Pos (0UL) /*!< Position of STATE field. */ +#define RADIO_STATE_STATE_Msk (0xFUL << RADIO_STATE_STATE_Pos) /*!< Bit mask of STATE field. */ +#define RADIO_STATE_STATE_Disabled (0UL) /*!< RADIO is in the Disabled state */ +#define RADIO_STATE_STATE_RxRu (1UL) /*!< RADIO is in the RXRU state */ +#define RADIO_STATE_STATE_RxIdle (2UL) /*!< RADIO is in the RXIDLE state */ +#define RADIO_STATE_STATE_Rx (3UL) /*!< RADIO is in the RX state */ +#define RADIO_STATE_STATE_RxDisable (4UL) /*!< RADIO is in the RXDISABLED state */ +#define RADIO_STATE_STATE_TxRu (9UL) /*!< RADIO is in the TXRU state */ +#define RADIO_STATE_STATE_TxIdle (10UL) /*!< RADIO is in the TXIDLE state */ +#define RADIO_STATE_STATE_Tx (11UL) /*!< RADIO is in the TX state */ +#define RADIO_STATE_STATE_TxDisable (12UL) /*!< RADIO is in the TXDISABLED state */ + +/* Register: RADIO_DATAWHITEIV */ +/* Description: Data whitening initial value */ + +/* Bits 6..0 : Data whitening initial value. Bit 6 is hard-wired to '1', writing '0' to it has no effect, and it will always be read back and used by the device as '1'. */ +#define RADIO_DATAWHITEIV_DATAWHITEIV_Pos (0UL) /*!< Position of DATAWHITEIV field. */ +#define RADIO_DATAWHITEIV_DATAWHITEIV_Msk (0x7FUL << RADIO_DATAWHITEIV_DATAWHITEIV_Pos) /*!< Bit mask of DATAWHITEIV field. */ + +/* Register: RADIO_BCC */ +/* Description: Bit counter compare */ + +/* Bits 31..0 : Bit counter compare */ +#define RADIO_BCC_BCC_Pos (0UL) /*!< Position of BCC field. */ +#define RADIO_BCC_BCC_Msk (0xFFFFFFFFUL << RADIO_BCC_BCC_Pos) /*!< Bit mask of BCC field. */ + +/* Register: RADIO_DAB */ +/* Description: Description collection[0]: Device address base segment 0 */ + +/* Bits 31..0 : Device address base segment 0 */ +#define RADIO_DAB_DAB_Pos (0UL) /*!< Position of DAB field. */ +#define RADIO_DAB_DAB_Msk (0xFFFFFFFFUL << RADIO_DAB_DAB_Pos) /*!< Bit mask of DAB field. */ + +/* Register: RADIO_DAP */ +/* Description: Description collection[0]: Device address prefix 0 */ + +/* Bits 15..0 : Device address prefix 0 */ +#define RADIO_DAP_DAP_Pos (0UL) /*!< Position of DAP field. */ +#define RADIO_DAP_DAP_Msk (0xFFFFUL << RADIO_DAP_DAP_Pos) /*!< Bit mask of DAP field. */ + +/* Register: RADIO_DACNF */ +/* Description: Device address match configuration */ + +/* Bit 15 : TxAdd for device address 7 */ +#define RADIO_DACNF_TXADD7_Pos (15UL) /*!< Position of TXADD7 field. */ +#define RADIO_DACNF_TXADD7_Msk (0x1UL << RADIO_DACNF_TXADD7_Pos) /*!< Bit mask of TXADD7 field. */ + +/* Bit 14 : TxAdd for device address 6 */ +#define RADIO_DACNF_TXADD6_Pos (14UL) /*!< Position of TXADD6 field. */ +#define RADIO_DACNF_TXADD6_Msk (0x1UL << RADIO_DACNF_TXADD6_Pos) /*!< Bit mask of TXADD6 field. */ + +/* Bit 13 : TxAdd for device address 5 */ +#define RADIO_DACNF_TXADD5_Pos (13UL) /*!< Position of TXADD5 field. */ +#define RADIO_DACNF_TXADD5_Msk (0x1UL << RADIO_DACNF_TXADD5_Pos) /*!< Bit mask of TXADD5 field. */ + +/* Bit 12 : TxAdd for device address 4 */ +#define RADIO_DACNF_TXADD4_Pos (12UL) /*!< Position of TXADD4 field. */ +#define RADIO_DACNF_TXADD4_Msk (0x1UL << RADIO_DACNF_TXADD4_Pos) /*!< Bit mask of TXADD4 field. */ + +/* Bit 11 : TxAdd for device address 3 */ +#define RADIO_DACNF_TXADD3_Pos (11UL) /*!< Position of TXADD3 field. */ +#define RADIO_DACNF_TXADD3_Msk (0x1UL << RADIO_DACNF_TXADD3_Pos) /*!< Bit mask of TXADD3 field. */ + +/* Bit 10 : TxAdd for device address 2 */ +#define RADIO_DACNF_TXADD2_Pos (10UL) /*!< Position of TXADD2 field. */ +#define RADIO_DACNF_TXADD2_Msk (0x1UL << RADIO_DACNF_TXADD2_Pos) /*!< Bit mask of TXADD2 field. */ + +/* Bit 9 : TxAdd for device address 1 */ +#define RADIO_DACNF_TXADD1_Pos (9UL) /*!< Position of TXADD1 field. */ +#define RADIO_DACNF_TXADD1_Msk (0x1UL << RADIO_DACNF_TXADD1_Pos) /*!< Bit mask of TXADD1 field. */ + +/* Bit 8 : TxAdd for device address 0 */ +#define RADIO_DACNF_TXADD0_Pos (8UL) /*!< Position of TXADD0 field. */ +#define RADIO_DACNF_TXADD0_Msk (0x1UL << RADIO_DACNF_TXADD0_Pos) /*!< Bit mask of TXADD0 field. */ + +/* Bit 7 : Enable or disable device address matching using device address 7 */ +#define RADIO_DACNF_ENA7_Pos (7UL) /*!< Position of ENA7 field. */ +#define RADIO_DACNF_ENA7_Msk (0x1UL << RADIO_DACNF_ENA7_Pos) /*!< Bit mask of ENA7 field. */ +#define RADIO_DACNF_ENA7_Disabled (0UL) /*!< Disabled */ +#define RADIO_DACNF_ENA7_Enabled (1UL) /*!< Enabled */ + +/* Bit 6 : Enable or disable device address matching using device address 6 */ +#define RADIO_DACNF_ENA6_Pos (6UL) /*!< Position of ENA6 field. */ +#define RADIO_DACNF_ENA6_Msk (0x1UL << RADIO_DACNF_ENA6_Pos) /*!< Bit mask of ENA6 field. */ +#define RADIO_DACNF_ENA6_Disabled (0UL) /*!< Disabled */ +#define RADIO_DACNF_ENA6_Enabled (1UL) /*!< Enabled */ + +/* Bit 5 : Enable or disable device address matching using device address 5 */ +#define RADIO_DACNF_ENA5_Pos (5UL) /*!< Position of ENA5 field. */ +#define RADIO_DACNF_ENA5_Msk (0x1UL << RADIO_DACNF_ENA5_Pos) /*!< Bit mask of ENA5 field. */ +#define RADIO_DACNF_ENA5_Disabled (0UL) /*!< Disabled */ +#define RADIO_DACNF_ENA5_Enabled (1UL) /*!< Enabled */ + +/* Bit 4 : Enable or disable device address matching using device address 4 */ +#define RADIO_DACNF_ENA4_Pos (4UL) /*!< Position of ENA4 field. */ +#define RADIO_DACNF_ENA4_Msk (0x1UL << RADIO_DACNF_ENA4_Pos) /*!< Bit mask of ENA4 field. */ +#define RADIO_DACNF_ENA4_Disabled (0UL) /*!< Disabled */ +#define RADIO_DACNF_ENA4_Enabled (1UL) /*!< Enabled */ + +/* Bit 3 : Enable or disable device address matching using device address 3 */ +#define RADIO_DACNF_ENA3_Pos (3UL) /*!< Position of ENA3 field. */ +#define RADIO_DACNF_ENA3_Msk (0x1UL << RADIO_DACNF_ENA3_Pos) /*!< Bit mask of ENA3 field. */ +#define RADIO_DACNF_ENA3_Disabled (0UL) /*!< Disabled */ +#define RADIO_DACNF_ENA3_Enabled (1UL) /*!< Enabled */ + +/* Bit 2 : Enable or disable device address matching using device address 2 */ +#define RADIO_DACNF_ENA2_Pos (2UL) /*!< Position of ENA2 field. */ +#define RADIO_DACNF_ENA2_Msk (0x1UL << RADIO_DACNF_ENA2_Pos) /*!< Bit mask of ENA2 field. */ +#define RADIO_DACNF_ENA2_Disabled (0UL) /*!< Disabled */ +#define RADIO_DACNF_ENA2_Enabled (1UL) /*!< Enabled */ + +/* Bit 1 : Enable or disable device address matching using device address 1 */ +#define RADIO_DACNF_ENA1_Pos (1UL) /*!< Position of ENA1 field. */ +#define RADIO_DACNF_ENA1_Msk (0x1UL << RADIO_DACNF_ENA1_Pos) /*!< Bit mask of ENA1 field. */ +#define RADIO_DACNF_ENA1_Disabled (0UL) /*!< Disabled */ +#define RADIO_DACNF_ENA1_Enabled (1UL) /*!< Enabled */ + +/* Bit 0 : Enable or disable device address matching using device address 0 */ +#define RADIO_DACNF_ENA0_Pos (0UL) /*!< Position of ENA0 field. */ +#define RADIO_DACNF_ENA0_Msk (0x1UL << RADIO_DACNF_ENA0_Pos) /*!< Bit mask of ENA0 field. */ +#define RADIO_DACNF_ENA0_Disabled (0UL) /*!< Disabled */ +#define RADIO_DACNF_ENA0_Enabled (1UL) /*!< Enabled */ + +/* Register: RADIO_MODECNF0 */ +/* Description: Radio mode configuration register 0 */ + +/* Bits 9..8 : Default TX value */ +#define RADIO_MODECNF0_DTX_Pos (8UL) /*!< Position of DTX field. */ +#define RADIO_MODECNF0_DTX_Msk (0x3UL << RADIO_MODECNF0_DTX_Pos) /*!< Bit mask of DTX field. */ +#define RADIO_MODECNF0_DTX_B1 (0UL) /*!< Transmit '1' */ +#define RADIO_MODECNF0_DTX_B0 (1UL) /*!< Transmit '0' */ +#define RADIO_MODECNF0_DTX_Center (2UL) /*!< Transmit center frequency */ + +/* Bit 0 : Radio ramp-up time */ +#define RADIO_MODECNF0_RU_Pos (0UL) /*!< Position of RU field. */ +#define RADIO_MODECNF0_RU_Msk (0x1UL << RADIO_MODECNF0_RU_Pos) /*!< Bit mask of RU field. */ +#define RADIO_MODECNF0_RU_Default (0UL) /*!< Default ramp-up time (tRXEN), compatible with firmware written for nRF51 */ +#define RADIO_MODECNF0_RU_Fast (1UL) /*!< Fast ramp-up (tRXEN,FAST), see electrical specification for more information */ + +/* Register: RADIO_POWER */ +/* Description: Peripheral power control */ + +/* Bit 0 : Peripheral power control. The peripheral and its registers will be reset to its initial state by switching the peripheral off and then back on again. */ +#define RADIO_POWER_POWER_Pos (0UL) /*!< Position of POWER field. */ +#define RADIO_POWER_POWER_Msk (0x1UL << RADIO_POWER_POWER_Pos) /*!< Bit mask of POWER field. */ +#define RADIO_POWER_POWER_Disabled (0UL) /*!< Peripheral is powered off */ +#define RADIO_POWER_POWER_Enabled (1UL) /*!< Peripheral is powered on */ + + +/* Peripheral: RNG */ +/* Description: Random Number Generator */ + +/* Register: RNG_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 0 : Shortcut between VALRDY event and STOP task */ +#define RNG_SHORTS_VALRDY_STOP_Pos (0UL) /*!< Position of VALRDY_STOP field. */ +#define RNG_SHORTS_VALRDY_STOP_Msk (0x1UL << RNG_SHORTS_VALRDY_STOP_Pos) /*!< Bit mask of VALRDY_STOP field. */ +#define RNG_SHORTS_VALRDY_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define RNG_SHORTS_VALRDY_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: RNG_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 0 : Write '1' to Enable interrupt for VALRDY event */ +#define RNG_INTENSET_VALRDY_Pos (0UL) /*!< Position of VALRDY field. */ +#define RNG_INTENSET_VALRDY_Msk (0x1UL << RNG_INTENSET_VALRDY_Pos) /*!< Bit mask of VALRDY field. */ +#define RNG_INTENSET_VALRDY_Disabled (0UL) /*!< Read: Disabled */ +#define RNG_INTENSET_VALRDY_Enabled (1UL) /*!< Read: Enabled */ +#define RNG_INTENSET_VALRDY_Set (1UL) /*!< Enable */ + +/* Register: RNG_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 0 : Write '1' to Disable interrupt for VALRDY event */ +#define RNG_INTENCLR_VALRDY_Pos (0UL) /*!< Position of VALRDY field. */ +#define RNG_INTENCLR_VALRDY_Msk (0x1UL << RNG_INTENCLR_VALRDY_Pos) /*!< Bit mask of VALRDY field. */ +#define RNG_INTENCLR_VALRDY_Disabled (0UL) /*!< Read: Disabled */ +#define RNG_INTENCLR_VALRDY_Enabled (1UL) /*!< Read: Enabled */ +#define RNG_INTENCLR_VALRDY_Clear (1UL) /*!< Disable */ + +/* Register: RNG_CONFIG */ +/* Description: Configuration register */ + +/* Bit 0 : Bias correction */ +#define RNG_CONFIG_DERCEN_Pos (0UL) /*!< Position of DERCEN field. */ +#define RNG_CONFIG_DERCEN_Msk (0x1UL << RNG_CONFIG_DERCEN_Pos) /*!< Bit mask of DERCEN field. */ +#define RNG_CONFIG_DERCEN_Disabled (0UL) /*!< Disabled */ +#define RNG_CONFIG_DERCEN_Enabled (1UL) /*!< Enabled */ + +/* Register: RNG_VALUE */ +/* Description: Output random number */ + +/* Bits 7..0 : Generated random number */ +#define RNG_VALUE_VALUE_Pos (0UL) /*!< Position of VALUE field. */ +#define RNG_VALUE_VALUE_Msk (0xFFUL << RNG_VALUE_VALUE_Pos) /*!< Bit mask of VALUE field. */ + + +/* Peripheral: RTC */ +/* Description: Real time counter 0 */ + +/* Register: RTC_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 19 : Write '1' to Enable interrupt for COMPARE[3] event */ +#define RTC_INTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define RTC_INTENSET_COMPARE3_Msk (0x1UL << RTC_INTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define RTC_INTENSET_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENSET_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENSET_COMPARE3_Set (1UL) /*!< Enable */ + +/* Bit 18 : Write '1' to Enable interrupt for COMPARE[2] event */ +#define RTC_INTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define RTC_INTENSET_COMPARE2_Msk (0x1UL << RTC_INTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define RTC_INTENSET_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENSET_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENSET_COMPARE2_Set (1UL) /*!< Enable */ + +/* Bit 17 : Write '1' to Enable interrupt for COMPARE[1] event */ +#define RTC_INTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define RTC_INTENSET_COMPARE1_Msk (0x1UL << RTC_INTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define RTC_INTENSET_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENSET_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENSET_COMPARE1_Set (1UL) /*!< Enable */ + +/* Bit 16 : Write '1' to Enable interrupt for COMPARE[0] event */ +#define RTC_INTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define RTC_INTENSET_COMPARE0_Msk (0x1UL << RTC_INTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define RTC_INTENSET_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENSET_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENSET_COMPARE0_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for OVRFLW event */ +#define RTC_INTENSET_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ +#define RTC_INTENSET_OVRFLW_Msk (0x1UL << RTC_INTENSET_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ +#define RTC_INTENSET_OVRFLW_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENSET_OVRFLW_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENSET_OVRFLW_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for TICK event */ +#define RTC_INTENSET_TICK_Pos (0UL) /*!< Position of TICK field. */ +#define RTC_INTENSET_TICK_Msk (0x1UL << RTC_INTENSET_TICK_Pos) /*!< Bit mask of TICK field. */ +#define RTC_INTENSET_TICK_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENSET_TICK_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENSET_TICK_Set (1UL) /*!< Enable */ + +/* Register: RTC_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 19 : Write '1' to Disable interrupt for COMPARE[3] event */ +#define RTC_INTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define RTC_INTENCLR_COMPARE3_Msk (0x1UL << RTC_INTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define RTC_INTENCLR_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENCLR_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENCLR_COMPARE3_Clear (1UL) /*!< Disable */ + +/* Bit 18 : Write '1' to Disable interrupt for COMPARE[2] event */ +#define RTC_INTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define RTC_INTENCLR_COMPARE2_Msk (0x1UL << RTC_INTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define RTC_INTENCLR_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENCLR_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENCLR_COMPARE2_Clear (1UL) /*!< Disable */ + +/* Bit 17 : Write '1' to Disable interrupt for COMPARE[1] event */ +#define RTC_INTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define RTC_INTENCLR_COMPARE1_Msk (0x1UL << RTC_INTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define RTC_INTENCLR_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENCLR_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENCLR_COMPARE1_Clear (1UL) /*!< Disable */ + +/* Bit 16 : Write '1' to Disable interrupt for COMPARE[0] event */ +#define RTC_INTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define RTC_INTENCLR_COMPARE0_Msk (0x1UL << RTC_INTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define RTC_INTENCLR_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENCLR_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENCLR_COMPARE0_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for OVRFLW event */ +#define RTC_INTENCLR_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ +#define RTC_INTENCLR_OVRFLW_Msk (0x1UL << RTC_INTENCLR_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ +#define RTC_INTENCLR_OVRFLW_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENCLR_OVRFLW_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENCLR_OVRFLW_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for TICK event */ +#define RTC_INTENCLR_TICK_Pos (0UL) /*!< Position of TICK field. */ +#define RTC_INTENCLR_TICK_Msk (0x1UL << RTC_INTENCLR_TICK_Pos) /*!< Bit mask of TICK field. */ +#define RTC_INTENCLR_TICK_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_INTENCLR_TICK_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_INTENCLR_TICK_Clear (1UL) /*!< Disable */ + +/* Register: RTC_EVTEN */ +/* Description: Enable or disable event routing */ + +/* Bit 19 : Enable or disable event routing for COMPARE[3] event */ +#define RTC_EVTEN_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define RTC_EVTEN_COMPARE3_Msk (0x1UL << RTC_EVTEN_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define RTC_EVTEN_COMPARE3_Disabled (0UL) /*!< Disable */ +#define RTC_EVTEN_COMPARE3_Enabled (1UL) /*!< Enable */ + +/* Bit 18 : Enable or disable event routing for COMPARE[2] event */ +#define RTC_EVTEN_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define RTC_EVTEN_COMPARE2_Msk (0x1UL << RTC_EVTEN_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define RTC_EVTEN_COMPARE2_Disabled (0UL) /*!< Disable */ +#define RTC_EVTEN_COMPARE2_Enabled (1UL) /*!< Enable */ + +/* Bit 17 : Enable or disable event routing for COMPARE[1] event */ +#define RTC_EVTEN_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define RTC_EVTEN_COMPARE1_Msk (0x1UL << RTC_EVTEN_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define RTC_EVTEN_COMPARE1_Disabled (0UL) /*!< Disable */ +#define RTC_EVTEN_COMPARE1_Enabled (1UL) /*!< Enable */ + +/* Bit 16 : Enable or disable event routing for COMPARE[0] event */ +#define RTC_EVTEN_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define RTC_EVTEN_COMPARE0_Msk (0x1UL << RTC_EVTEN_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define RTC_EVTEN_COMPARE0_Disabled (0UL) /*!< Disable */ +#define RTC_EVTEN_COMPARE0_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable event routing for OVRFLW event */ +#define RTC_EVTEN_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ +#define RTC_EVTEN_OVRFLW_Msk (0x1UL << RTC_EVTEN_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ +#define RTC_EVTEN_OVRFLW_Disabled (0UL) /*!< Disable */ +#define RTC_EVTEN_OVRFLW_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable event routing for TICK event */ +#define RTC_EVTEN_TICK_Pos (0UL) /*!< Position of TICK field. */ +#define RTC_EVTEN_TICK_Msk (0x1UL << RTC_EVTEN_TICK_Pos) /*!< Bit mask of TICK field. */ +#define RTC_EVTEN_TICK_Disabled (0UL) /*!< Disable */ +#define RTC_EVTEN_TICK_Enabled (1UL) /*!< Enable */ + +/* Register: RTC_EVTENSET */ +/* Description: Enable event routing */ + +/* Bit 19 : Write '1' to Enable event routing for COMPARE[3] event */ +#define RTC_EVTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define RTC_EVTENSET_COMPARE3_Msk (0x1UL << RTC_EVTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define RTC_EVTENSET_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENSET_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENSET_COMPARE3_Set (1UL) /*!< Enable */ + +/* Bit 18 : Write '1' to Enable event routing for COMPARE[2] event */ +#define RTC_EVTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define RTC_EVTENSET_COMPARE2_Msk (0x1UL << RTC_EVTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define RTC_EVTENSET_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENSET_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENSET_COMPARE2_Set (1UL) /*!< Enable */ + +/* Bit 17 : Write '1' to Enable event routing for COMPARE[1] event */ +#define RTC_EVTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define RTC_EVTENSET_COMPARE1_Msk (0x1UL << RTC_EVTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define RTC_EVTENSET_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENSET_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENSET_COMPARE1_Set (1UL) /*!< Enable */ + +/* Bit 16 : Write '1' to Enable event routing for COMPARE[0] event */ +#define RTC_EVTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define RTC_EVTENSET_COMPARE0_Msk (0x1UL << RTC_EVTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define RTC_EVTENSET_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENSET_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENSET_COMPARE0_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable event routing for OVRFLW event */ +#define RTC_EVTENSET_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ +#define RTC_EVTENSET_OVRFLW_Msk (0x1UL << RTC_EVTENSET_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ +#define RTC_EVTENSET_OVRFLW_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENSET_OVRFLW_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENSET_OVRFLW_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable event routing for TICK event */ +#define RTC_EVTENSET_TICK_Pos (0UL) /*!< Position of TICK field. */ +#define RTC_EVTENSET_TICK_Msk (0x1UL << RTC_EVTENSET_TICK_Pos) /*!< Bit mask of TICK field. */ +#define RTC_EVTENSET_TICK_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENSET_TICK_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENSET_TICK_Set (1UL) /*!< Enable */ + +/* Register: RTC_EVTENCLR */ +/* Description: Disable event routing */ + +/* Bit 19 : Write '1' to Disable event routing for COMPARE[3] event */ +#define RTC_EVTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define RTC_EVTENCLR_COMPARE3_Msk (0x1UL << RTC_EVTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define RTC_EVTENCLR_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENCLR_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENCLR_COMPARE3_Clear (1UL) /*!< Disable */ + +/* Bit 18 : Write '1' to Disable event routing for COMPARE[2] event */ +#define RTC_EVTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define RTC_EVTENCLR_COMPARE2_Msk (0x1UL << RTC_EVTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define RTC_EVTENCLR_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENCLR_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENCLR_COMPARE2_Clear (1UL) /*!< Disable */ + +/* Bit 17 : Write '1' to Disable event routing for COMPARE[1] event */ +#define RTC_EVTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define RTC_EVTENCLR_COMPARE1_Msk (0x1UL << RTC_EVTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define RTC_EVTENCLR_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENCLR_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENCLR_COMPARE1_Clear (1UL) /*!< Disable */ + +/* Bit 16 : Write '1' to Disable event routing for COMPARE[0] event */ +#define RTC_EVTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define RTC_EVTENCLR_COMPARE0_Msk (0x1UL << RTC_EVTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define RTC_EVTENCLR_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENCLR_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENCLR_COMPARE0_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable event routing for OVRFLW event */ +#define RTC_EVTENCLR_OVRFLW_Pos (1UL) /*!< Position of OVRFLW field. */ +#define RTC_EVTENCLR_OVRFLW_Msk (0x1UL << RTC_EVTENCLR_OVRFLW_Pos) /*!< Bit mask of OVRFLW field. */ +#define RTC_EVTENCLR_OVRFLW_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENCLR_OVRFLW_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENCLR_OVRFLW_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable event routing for TICK event */ +#define RTC_EVTENCLR_TICK_Pos (0UL) /*!< Position of TICK field. */ +#define RTC_EVTENCLR_TICK_Msk (0x1UL << RTC_EVTENCLR_TICK_Pos) /*!< Bit mask of TICK field. */ +#define RTC_EVTENCLR_TICK_Disabled (0UL) /*!< Read: Disabled */ +#define RTC_EVTENCLR_TICK_Enabled (1UL) /*!< Read: Enabled */ +#define RTC_EVTENCLR_TICK_Clear (1UL) /*!< Disable */ + +/* Register: RTC_COUNTER */ +/* Description: Current COUNTER value */ + +/* Bits 23..0 : Counter value */ +#define RTC_COUNTER_COUNTER_Pos (0UL) /*!< Position of COUNTER field. */ +#define RTC_COUNTER_COUNTER_Msk (0xFFFFFFUL << RTC_COUNTER_COUNTER_Pos) /*!< Bit mask of COUNTER field. */ + +/* Register: RTC_PRESCALER */ +/* Description: 12 bit prescaler for COUNTER frequency (32768/(PRESCALER+1)).Must be written when RTC is stopped */ + +/* Bits 11..0 : Prescaler value */ +#define RTC_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */ +#define RTC_PRESCALER_PRESCALER_Msk (0xFFFUL << RTC_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */ + +/* Register: RTC_CC */ +/* Description: Description collection[0]: Compare register 0 */ + +/* Bits 23..0 : Compare value */ +#define RTC_CC_COMPARE_Pos (0UL) /*!< Position of COMPARE field. */ +#define RTC_CC_COMPARE_Msk (0xFFFFFFUL << RTC_CC_COMPARE_Pos) /*!< Bit mask of COMPARE field. */ + + +/* Peripheral: SAADC */ +/* Description: Analog to Digital Converter */ + +/* Register: SAADC_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 21 : Enable or disable interrupt for CH[7].LIMITL event */ +#define SAADC_INTEN_CH7LIMITL_Pos (21UL) /*!< Position of CH7LIMITL field. */ +#define SAADC_INTEN_CH7LIMITL_Msk (0x1UL << SAADC_INTEN_CH7LIMITL_Pos) /*!< Bit mask of CH7LIMITL field. */ +#define SAADC_INTEN_CH7LIMITL_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH7LIMITL_Enabled (1UL) /*!< Enable */ + +/* Bit 20 : Enable or disable interrupt for CH[7].LIMITH event */ +#define SAADC_INTEN_CH7LIMITH_Pos (20UL) /*!< Position of CH7LIMITH field. */ +#define SAADC_INTEN_CH7LIMITH_Msk (0x1UL << SAADC_INTEN_CH7LIMITH_Pos) /*!< Bit mask of CH7LIMITH field. */ +#define SAADC_INTEN_CH7LIMITH_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH7LIMITH_Enabled (1UL) /*!< Enable */ + +/* Bit 19 : Enable or disable interrupt for CH[6].LIMITL event */ +#define SAADC_INTEN_CH6LIMITL_Pos (19UL) /*!< Position of CH6LIMITL field. */ +#define SAADC_INTEN_CH6LIMITL_Msk (0x1UL << SAADC_INTEN_CH6LIMITL_Pos) /*!< Bit mask of CH6LIMITL field. */ +#define SAADC_INTEN_CH6LIMITL_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH6LIMITL_Enabled (1UL) /*!< Enable */ + +/* Bit 18 : Enable or disable interrupt for CH[6].LIMITH event */ +#define SAADC_INTEN_CH6LIMITH_Pos (18UL) /*!< Position of CH6LIMITH field. */ +#define SAADC_INTEN_CH6LIMITH_Msk (0x1UL << SAADC_INTEN_CH6LIMITH_Pos) /*!< Bit mask of CH6LIMITH field. */ +#define SAADC_INTEN_CH6LIMITH_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH6LIMITH_Enabled (1UL) /*!< Enable */ + +/* Bit 17 : Enable or disable interrupt for CH[5].LIMITL event */ +#define SAADC_INTEN_CH5LIMITL_Pos (17UL) /*!< Position of CH5LIMITL field. */ +#define SAADC_INTEN_CH5LIMITL_Msk (0x1UL << SAADC_INTEN_CH5LIMITL_Pos) /*!< Bit mask of CH5LIMITL field. */ +#define SAADC_INTEN_CH5LIMITL_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH5LIMITL_Enabled (1UL) /*!< Enable */ + +/* Bit 16 : Enable or disable interrupt for CH[5].LIMITH event */ +#define SAADC_INTEN_CH5LIMITH_Pos (16UL) /*!< Position of CH5LIMITH field. */ +#define SAADC_INTEN_CH5LIMITH_Msk (0x1UL << SAADC_INTEN_CH5LIMITH_Pos) /*!< Bit mask of CH5LIMITH field. */ +#define SAADC_INTEN_CH5LIMITH_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH5LIMITH_Enabled (1UL) /*!< Enable */ + +/* Bit 15 : Enable or disable interrupt for CH[4].LIMITL event */ +#define SAADC_INTEN_CH4LIMITL_Pos (15UL) /*!< Position of CH4LIMITL field. */ +#define SAADC_INTEN_CH4LIMITL_Msk (0x1UL << SAADC_INTEN_CH4LIMITL_Pos) /*!< Bit mask of CH4LIMITL field. */ +#define SAADC_INTEN_CH4LIMITL_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH4LIMITL_Enabled (1UL) /*!< Enable */ + +/* Bit 14 : Enable or disable interrupt for CH[4].LIMITH event */ +#define SAADC_INTEN_CH4LIMITH_Pos (14UL) /*!< Position of CH4LIMITH field. */ +#define SAADC_INTEN_CH4LIMITH_Msk (0x1UL << SAADC_INTEN_CH4LIMITH_Pos) /*!< Bit mask of CH4LIMITH field. */ +#define SAADC_INTEN_CH4LIMITH_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH4LIMITH_Enabled (1UL) /*!< Enable */ + +/* Bit 13 : Enable or disable interrupt for CH[3].LIMITL event */ +#define SAADC_INTEN_CH3LIMITL_Pos (13UL) /*!< Position of CH3LIMITL field. */ +#define SAADC_INTEN_CH3LIMITL_Msk (0x1UL << SAADC_INTEN_CH3LIMITL_Pos) /*!< Bit mask of CH3LIMITL field. */ +#define SAADC_INTEN_CH3LIMITL_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH3LIMITL_Enabled (1UL) /*!< Enable */ + +/* Bit 12 : Enable or disable interrupt for CH[3].LIMITH event */ +#define SAADC_INTEN_CH3LIMITH_Pos (12UL) /*!< Position of CH3LIMITH field. */ +#define SAADC_INTEN_CH3LIMITH_Msk (0x1UL << SAADC_INTEN_CH3LIMITH_Pos) /*!< Bit mask of CH3LIMITH field. */ +#define SAADC_INTEN_CH3LIMITH_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH3LIMITH_Enabled (1UL) /*!< Enable */ + +/* Bit 11 : Enable or disable interrupt for CH[2].LIMITL event */ +#define SAADC_INTEN_CH2LIMITL_Pos (11UL) /*!< Position of CH2LIMITL field. */ +#define SAADC_INTEN_CH2LIMITL_Msk (0x1UL << SAADC_INTEN_CH2LIMITL_Pos) /*!< Bit mask of CH2LIMITL field. */ +#define SAADC_INTEN_CH2LIMITL_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH2LIMITL_Enabled (1UL) /*!< Enable */ + +/* Bit 10 : Enable or disable interrupt for CH[2].LIMITH event */ +#define SAADC_INTEN_CH2LIMITH_Pos (10UL) /*!< Position of CH2LIMITH field. */ +#define SAADC_INTEN_CH2LIMITH_Msk (0x1UL << SAADC_INTEN_CH2LIMITH_Pos) /*!< Bit mask of CH2LIMITH field. */ +#define SAADC_INTEN_CH2LIMITH_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH2LIMITH_Enabled (1UL) /*!< Enable */ + +/* Bit 9 : Enable or disable interrupt for CH[1].LIMITL event */ +#define SAADC_INTEN_CH1LIMITL_Pos (9UL) /*!< Position of CH1LIMITL field. */ +#define SAADC_INTEN_CH1LIMITL_Msk (0x1UL << SAADC_INTEN_CH1LIMITL_Pos) /*!< Bit mask of CH1LIMITL field. */ +#define SAADC_INTEN_CH1LIMITL_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH1LIMITL_Enabled (1UL) /*!< Enable */ + +/* Bit 8 : Enable or disable interrupt for CH[1].LIMITH event */ +#define SAADC_INTEN_CH1LIMITH_Pos (8UL) /*!< Position of CH1LIMITH field. */ +#define SAADC_INTEN_CH1LIMITH_Msk (0x1UL << SAADC_INTEN_CH1LIMITH_Pos) /*!< Bit mask of CH1LIMITH field. */ +#define SAADC_INTEN_CH1LIMITH_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH1LIMITH_Enabled (1UL) /*!< Enable */ + +/* Bit 7 : Enable or disable interrupt for CH[0].LIMITL event */ +#define SAADC_INTEN_CH0LIMITL_Pos (7UL) /*!< Position of CH0LIMITL field. */ +#define SAADC_INTEN_CH0LIMITL_Msk (0x1UL << SAADC_INTEN_CH0LIMITL_Pos) /*!< Bit mask of CH0LIMITL field. */ +#define SAADC_INTEN_CH0LIMITL_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH0LIMITL_Enabled (1UL) /*!< Enable */ + +/* Bit 6 : Enable or disable interrupt for CH[0].LIMITH event */ +#define SAADC_INTEN_CH0LIMITH_Pos (6UL) /*!< Position of CH0LIMITH field. */ +#define SAADC_INTEN_CH0LIMITH_Msk (0x1UL << SAADC_INTEN_CH0LIMITH_Pos) /*!< Bit mask of CH0LIMITH field. */ +#define SAADC_INTEN_CH0LIMITH_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CH0LIMITH_Enabled (1UL) /*!< Enable */ + +/* Bit 5 : Enable or disable interrupt for STOPPED event */ +#define SAADC_INTEN_STOPPED_Pos (5UL) /*!< Position of STOPPED field. */ +#define SAADC_INTEN_STOPPED_Msk (0x1UL << SAADC_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define SAADC_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ + +/* Bit 4 : Enable or disable interrupt for CALIBRATEDONE event */ +#define SAADC_INTEN_CALIBRATEDONE_Pos (4UL) /*!< Position of CALIBRATEDONE field. */ +#define SAADC_INTEN_CALIBRATEDONE_Msk (0x1UL << SAADC_INTEN_CALIBRATEDONE_Pos) /*!< Bit mask of CALIBRATEDONE field. */ +#define SAADC_INTEN_CALIBRATEDONE_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_CALIBRATEDONE_Enabled (1UL) /*!< Enable */ + +/* Bit 3 : Enable or disable interrupt for RESULTDONE event */ +#define SAADC_INTEN_RESULTDONE_Pos (3UL) /*!< Position of RESULTDONE field. */ +#define SAADC_INTEN_RESULTDONE_Msk (0x1UL << SAADC_INTEN_RESULTDONE_Pos) /*!< Bit mask of RESULTDONE field. */ +#define SAADC_INTEN_RESULTDONE_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_RESULTDONE_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable interrupt for DONE event */ +#define SAADC_INTEN_DONE_Pos (2UL) /*!< Position of DONE field. */ +#define SAADC_INTEN_DONE_Msk (0x1UL << SAADC_INTEN_DONE_Pos) /*!< Bit mask of DONE field. */ +#define SAADC_INTEN_DONE_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_DONE_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for END event */ +#define SAADC_INTEN_END_Pos (1UL) /*!< Position of END field. */ +#define SAADC_INTEN_END_Msk (0x1UL << SAADC_INTEN_END_Pos) /*!< Bit mask of END field. */ +#define SAADC_INTEN_END_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_END_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable interrupt for STARTED event */ +#define SAADC_INTEN_STARTED_Pos (0UL) /*!< Position of STARTED field. */ +#define SAADC_INTEN_STARTED_Msk (0x1UL << SAADC_INTEN_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define SAADC_INTEN_STARTED_Disabled (0UL) /*!< Disable */ +#define SAADC_INTEN_STARTED_Enabled (1UL) /*!< Enable */ + +/* Register: SAADC_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 21 : Write '1' to Enable interrupt for CH[7].LIMITL event */ +#define SAADC_INTENSET_CH7LIMITL_Pos (21UL) /*!< Position of CH7LIMITL field. */ +#define SAADC_INTENSET_CH7LIMITL_Msk (0x1UL << SAADC_INTENSET_CH7LIMITL_Pos) /*!< Bit mask of CH7LIMITL field. */ +#define SAADC_INTENSET_CH7LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH7LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH7LIMITL_Set (1UL) /*!< Enable */ + +/* Bit 20 : Write '1' to Enable interrupt for CH[7].LIMITH event */ +#define SAADC_INTENSET_CH7LIMITH_Pos (20UL) /*!< Position of CH7LIMITH field. */ +#define SAADC_INTENSET_CH7LIMITH_Msk (0x1UL << SAADC_INTENSET_CH7LIMITH_Pos) /*!< Bit mask of CH7LIMITH field. */ +#define SAADC_INTENSET_CH7LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH7LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH7LIMITH_Set (1UL) /*!< Enable */ + +/* Bit 19 : Write '1' to Enable interrupt for CH[6].LIMITL event */ +#define SAADC_INTENSET_CH6LIMITL_Pos (19UL) /*!< Position of CH6LIMITL field. */ +#define SAADC_INTENSET_CH6LIMITL_Msk (0x1UL << SAADC_INTENSET_CH6LIMITL_Pos) /*!< Bit mask of CH6LIMITL field. */ +#define SAADC_INTENSET_CH6LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH6LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH6LIMITL_Set (1UL) /*!< Enable */ + +/* Bit 18 : Write '1' to Enable interrupt for CH[6].LIMITH event */ +#define SAADC_INTENSET_CH6LIMITH_Pos (18UL) /*!< Position of CH6LIMITH field. */ +#define SAADC_INTENSET_CH6LIMITH_Msk (0x1UL << SAADC_INTENSET_CH6LIMITH_Pos) /*!< Bit mask of CH6LIMITH field. */ +#define SAADC_INTENSET_CH6LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH6LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH6LIMITH_Set (1UL) /*!< Enable */ + +/* Bit 17 : Write '1' to Enable interrupt for CH[5].LIMITL event */ +#define SAADC_INTENSET_CH5LIMITL_Pos (17UL) /*!< Position of CH5LIMITL field. */ +#define SAADC_INTENSET_CH5LIMITL_Msk (0x1UL << SAADC_INTENSET_CH5LIMITL_Pos) /*!< Bit mask of CH5LIMITL field. */ +#define SAADC_INTENSET_CH5LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH5LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH5LIMITL_Set (1UL) /*!< Enable */ + +/* Bit 16 : Write '1' to Enable interrupt for CH[5].LIMITH event */ +#define SAADC_INTENSET_CH5LIMITH_Pos (16UL) /*!< Position of CH5LIMITH field. */ +#define SAADC_INTENSET_CH5LIMITH_Msk (0x1UL << SAADC_INTENSET_CH5LIMITH_Pos) /*!< Bit mask of CH5LIMITH field. */ +#define SAADC_INTENSET_CH5LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH5LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH5LIMITH_Set (1UL) /*!< Enable */ + +/* Bit 15 : Write '1' to Enable interrupt for CH[4].LIMITL event */ +#define SAADC_INTENSET_CH4LIMITL_Pos (15UL) /*!< Position of CH4LIMITL field. */ +#define SAADC_INTENSET_CH4LIMITL_Msk (0x1UL << SAADC_INTENSET_CH4LIMITL_Pos) /*!< Bit mask of CH4LIMITL field. */ +#define SAADC_INTENSET_CH4LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH4LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH4LIMITL_Set (1UL) /*!< Enable */ + +/* Bit 14 : Write '1' to Enable interrupt for CH[4].LIMITH event */ +#define SAADC_INTENSET_CH4LIMITH_Pos (14UL) /*!< Position of CH4LIMITH field. */ +#define SAADC_INTENSET_CH4LIMITH_Msk (0x1UL << SAADC_INTENSET_CH4LIMITH_Pos) /*!< Bit mask of CH4LIMITH field. */ +#define SAADC_INTENSET_CH4LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH4LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH4LIMITH_Set (1UL) /*!< Enable */ + +/* Bit 13 : Write '1' to Enable interrupt for CH[3].LIMITL event */ +#define SAADC_INTENSET_CH3LIMITL_Pos (13UL) /*!< Position of CH3LIMITL field. */ +#define SAADC_INTENSET_CH3LIMITL_Msk (0x1UL << SAADC_INTENSET_CH3LIMITL_Pos) /*!< Bit mask of CH3LIMITL field. */ +#define SAADC_INTENSET_CH3LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH3LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH3LIMITL_Set (1UL) /*!< Enable */ + +/* Bit 12 : Write '1' to Enable interrupt for CH[3].LIMITH event */ +#define SAADC_INTENSET_CH3LIMITH_Pos (12UL) /*!< Position of CH3LIMITH field. */ +#define SAADC_INTENSET_CH3LIMITH_Msk (0x1UL << SAADC_INTENSET_CH3LIMITH_Pos) /*!< Bit mask of CH3LIMITH field. */ +#define SAADC_INTENSET_CH3LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH3LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH3LIMITH_Set (1UL) /*!< Enable */ + +/* Bit 11 : Write '1' to Enable interrupt for CH[2].LIMITL event */ +#define SAADC_INTENSET_CH2LIMITL_Pos (11UL) /*!< Position of CH2LIMITL field. */ +#define SAADC_INTENSET_CH2LIMITL_Msk (0x1UL << SAADC_INTENSET_CH2LIMITL_Pos) /*!< Bit mask of CH2LIMITL field. */ +#define SAADC_INTENSET_CH2LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH2LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH2LIMITL_Set (1UL) /*!< Enable */ + +/* Bit 10 : Write '1' to Enable interrupt for CH[2].LIMITH event */ +#define SAADC_INTENSET_CH2LIMITH_Pos (10UL) /*!< Position of CH2LIMITH field. */ +#define SAADC_INTENSET_CH2LIMITH_Msk (0x1UL << SAADC_INTENSET_CH2LIMITH_Pos) /*!< Bit mask of CH2LIMITH field. */ +#define SAADC_INTENSET_CH2LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH2LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH2LIMITH_Set (1UL) /*!< Enable */ + +/* Bit 9 : Write '1' to Enable interrupt for CH[1].LIMITL event */ +#define SAADC_INTENSET_CH1LIMITL_Pos (9UL) /*!< Position of CH1LIMITL field. */ +#define SAADC_INTENSET_CH1LIMITL_Msk (0x1UL << SAADC_INTENSET_CH1LIMITL_Pos) /*!< Bit mask of CH1LIMITL field. */ +#define SAADC_INTENSET_CH1LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH1LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH1LIMITL_Set (1UL) /*!< Enable */ + +/* Bit 8 : Write '1' to Enable interrupt for CH[1].LIMITH event */ +#define SAADC_INTENSET_CH1LIMITH_Pos (8UL) /*!< Position of CH1LIMITH field. */ +#define SAADC_INTENSET_CH1LIMITH_Msk (0x1UL << SAADC_INTENSET_CH1LIMITH_Pos) /*!< Bit mask of CH1LIMITH field. */ +#define SAADC_INTENSET_CH1LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH1LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH1LIMITH_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to Enable interrupt for CH[0].LIMITL event */ +#define SAADC_INTENSET_CH0LIMITL_Pos (7UL) /*!< Position of CH0LIMITL field. */ +#define SAADC_INTENSET_CH0LIMITL_Msk (0x1UL << SAADC_INTENSET_CH0LIMITL_Pos) /*!< Bit mask of CH0LIMITL field. */ +#define SAADC_INTENSET_CH0LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH0LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH0LIMITL_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to Enable interrupt for CH[0].LIMITH event */ +#define SAADC_INTENSET_CH0LIMITH_Pos (6UL) /*!< Position of CH0LIMITH field. */ +#define SAADC_INTENSET_CH0LIMITH_Msk (0x1UL << SAADC_INTENSET_CH0LIMITH_Pos) /*!< Bit mask of CH0LIMITH field. */ +#define SAADC_INTENSET_CH0LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CH0LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CH0LIMITH_Set (1UL) /*!< Enable */ + +/* Bit 5 : Write '1' to Enable interrupt for STOPPED event */ +#define SAADC_INTENSET_STOPPED_Pos (5UL) /*!< Position of STOPPED field. */ +#define SAADC_INTENSET_STOPPED_Msk (0x1UL << SAADC_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define SAADC_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to Enable interrupt for CALIBRATEDONE event */ +#define SAADC_INTENSET_CALIBRATEDONE_Pos (4UL) /*!< Position of CALIBRATEDONE field. */ +#define SAADC_INTENSET_CALIBRATEDONE_Msk (0x1UL << SAADC_INTENSET_CALIBRATEDONE_Pos) /*!< Bit mask of CALIBRATEDONE field. */ +#define SAADC_INTENSET_CALIBRATEDONE_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_CALIBRATEDONE_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_CALIBRATEDONE_Set (1UL) /*!< Enable */ + +/* Bit 3 : Write '1' to Enable interrupt for RESULTDONE event */ +#define SAADC_INTENSET_RESULTDONE_Pos (3UL) /*!< Position of RESULTDONE field. */ +#define SAADC_INTENSET_RESULTDONE_Msk (0x1UL << SAADC_INTENSET_RESULTDONE_Pos) /*!< Bit mask of RESULTDONE field. */ +#define SAADC_INTENSET_RESULTDONE_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_RESULTDONE_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_RESULTDONE_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable interrupt for DONE event */ +#define SAADC_INTENSET_DONE_Pos (2UL) /*!< Position of DONE field. */ +#define SAADC_INTENSET_DONE_Msk (0x1UL << SAADC_INTENSET_DONE_Pos) /*!< Bit mask of DONE field. */ +#define SAADC_INTENSET_DONE_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_DONE_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_DONE_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for END event */ +#define SAADC_INTENSET_END_Pos (1UL) /*!< Position of END field. */ +#define SAADC_INTENSET_END_Msk (0x1UL << SAADC_INTENSET_END_Pos) /*!< Bit mask of END field. */ +#define SAADC_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_END_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for STARTED event */ +#define SAADC_INTENSET_STARTED_Pos (0UL) /*!< Position of STARTED field. */ +#define SAADC_INTENSET_STARTED_Msk (0x1UL << SAADC_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define SAADC_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENSET_STARTED_Set (1UL) /*!< Enable */ + +/* Register: SAADC_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 21 : Write '1' to Disable interrupt for CH[7].LIMITL event */ +#define SAADC_INTENCLR_CH7LIMITL_Pos (21UL) /*!< Position of CH7LIMITL field. */ +#define SAADC_INTENCLR_CH7LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH7LIMITL_Pos) /*!< Bit mask of CH7LIMITL field. */ +#define SAADC_INTENCLR_CH7LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH7LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH7LIMITL_Clear (1UL) /*!< Disable */ + +/* Bit 20 : Write '1' to Disable interrupt for CH[7].LIMITH event */ +#define SAADC_INTENCLR_CH7LIMITH_Pos (20UL) /*!< Position of CH7LIMITH field. */ +#define SAADC_INTENCLR_CH7LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH7LIMITH_Pos) /*!< Bit mask of CH7LIMITH field. */ +#define SAADC_INTENCLR_CH7LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH7LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH7LIMITH_Clear (1UL) /*!< Disable */ + +/* Bit 19 : Write '1' to Disable interrupt for CH[6].LIMITL event */ +#define SAADC_INTENCLR_CH6LIMITL_Pos (19UL) /*!< Position of CH6LIMITL field. */ +#define SAADC_INTENCLR_CH6LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH6LIMITL_Pos) /*!< Bit mask of CH6LIMITL field. */ +#define SAADC_INTENCLR_CH6LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH6LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH6LIMITL_Clear (1UL) /*!< Disable */ + +/* Bit 18 : Write '1' to Disable interrupt for CH[6].LIMITH event */ +#define SAADC_INTENCLR_CH6LIMITH_Pos (18UL) /*!< Position of CH6LIMITH field. */ +#define SAADC_INTENCLR_CH6LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH6LIMITH_Pos) /*!< Bit mask of CH6LIMITH field. */ +#define SAADC_INTENCLR_CH6LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH6LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH6LIMITH_Clear (1UL) /*!< Disable */ + +/* Bit 17 : Write '1' to Disable interrupt for CH[5].LIMITL event */ +#define SAADC_INTENCLR_CH5LIMITL_Pos (17UL) /*!< Position of CH5LIMITL field. */ +#define SAADC_INTENCLR_CH5LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH5LIMITL_Pos) /*!< Bit mask of CH5LIMITL field. */ +#define SAADC_INTENCLR_CH5LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH5LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH5LIMITL_Clear (1UL) /*!< Disable */ + +/* Bit 16 : Write '1' to Disable interrupt for CH[5].LIMITH event */ +#define SAADC_INTENCLR_CH5LIMITH_Pos (16UL) /*!< Position of CH5LIMITH field. */ +#define SAADC_INTENCLR_CH5LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH5LIMITH_Pos) /*!< Bit mask of CH5LIMITH field. */ +#define SAADC_INTENCLR_CH5LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH5LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH5LIMITH_Clear (1UL) /*!< Disable */ + +/* Bit 15 : Write '1' to Disable interrupt for CH[4].LIMITL event */ +#define SAADC_INTENCLR_CH4LIMITL_Pos (15UL) /*!< Position of CH4LIMITL field. */ +#define SAADC_INTENCLR_CH4LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH4LIMITL_Pos) /*!< Bit mask of CH4LIMITL field. */ +#define SAADC_INTENCLR_CH4LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH4LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH4LIMITL_Clear (1UL) /*!< Disable */ + +/* Bit 14 : Write '1' to Disable interrupt for CH[4].LIMITH event */ +#define SAADC_INTENCLR_CH4LIMITH_Pos (14UL) /*!< Position of CH4LIMITH field. */ +#define SAADC_INTENCLR_CH4LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH4LIMITH_Pos) /*!< Bit mask of CH4LIMITH field. */ +#define SAADC_INTENCLR_CH4LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH4LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH4LIMITH_Clear (1UL) /*!< Disable */ + +/* Bit 13 : Write '1' to Disable interrupt for CH[3].LIMITL event */ +#define SAADC_INTENCLR_CH3LIMITL_Pos (13UL) /*!< Position of CH3LIMITL field. */ +#define SAADC_INTENCLR_CH3LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH3LIMITL_Pos) /*!< Bit mask of CH3LIMITL field. */ +#define SAADC_INTENCLR_CH3LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH3LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH3LIMITL_Clear (1UL) /*!< Disable */ + +/* Bit 12 : Write '1' to Disable interrupt for CH[3].LIMITH event */ +#define SAADC_INTENCLR_CH3LIMITH_Pos (12UL) /*!< Position of CH3LIMITH field. */ +#define SAADC_INTENCLR_CH3LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH3LIMITH_Pos) /*!< Bit mask of CH3LIMITH field. */ +#define SAADC_INTENCLR_CH3LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH3LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH3LIMITH_Clear (1UL) /*!< Disable */ + +/* Bit 11 : Write '1' to Disable interrupt for CH[2].LIMITL event */ +#define SAADC_INTENCLR_CH2LIMITL_Pos (11UL) /*!< Position of CH2LIMITL field. */ +#define SAADC_INTENCLR_CH2LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH2LIMITL_Pos) /*!< Bit mask of CH2LIMITL field. */ +#define SAADC_INTENCLR_CH2LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH2LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH2LIMITL_Clear (1UL) /*!< Disable */ + +/* Bit 10 : Write '1' to Disable interrupt for CH[2].LIMITH event */ +#define SAADC_INTENCLR_CH2LIMITH_Pos (10UL) /*!< Position of CH2LIMITH field. */ +#define SAADC_INTENCLR_CH2LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH2LIMITH_Pos) /*!< Bit mask of CH2LIMITH field. */ +#define SAADC_INTENCLR_CH2LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH2LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH2LIMITH_Clear (1UL) /*!< Disable */ + +/* Bit 9 : Write '1' to Disable interrupt for CH[1].LIMITL event */ +#define SAADC_INTENCLR_CH1LIMITL_Pos (9UL) /*!< Position of CH1LIMITL field. */ +#define SAADC_INTENCLR_CH1LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH1LIMITL_Pos) /*!< Bit mask of CH1LIMITL field. */ +#define SAADC_INTENCLR_CH1LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH1LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH1LIMITL_Clear (1UL) /*!< Disable */ + +/* Bit 8 : Write '1' to Disable interrupt for CH[1].LIMITH event */ +#define SAADC_INTENCLR_CH1LIMITH_Pos (8UL) /*!< Position of CH1LIMITH field. */ +#define SAADC_INTENCLR_CH1LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH1LIMITH_Pos) /*!< Bit mask of CH1LIMITH field. */ +#define SAADC_INTENCLR_CH1LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH1LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH1LIMITH_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to Disable interrupt for CH[0].LIMITL event */ +#define SAADC_INTENCLR_CH0LIMITL_Pos (7UL) /*!< Position of CH0LIMITL field. */ +#define SAADC_INTENCLR_CH0LIMITL_Msk (0x1UL << SAADC_INTENCLR_CH0LIMITL_Pos) /*!< Bit mask of CH0LIMITL field. */ +#define SAADC_INTENCLR_CH0LIMITL_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH0LIMITL_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH0LIMITL_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to Disable interrupt for CH[0].LIMITH event */ +#define SAADC_INTENCLR_CH0LIMITH_Pos (6UL) /*!< Position of CH0LIMITH field. */ +#define SAADC_INTENCLR_CH0LIMITH_Msk (0x1UL << SAADC_INTENCLR_CH0LIMITH_Pos) /*!< Bit mask of CH0LIMITH field. */ +#define SAADC_INTENCLR_CH0LIMITH_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CH0LIMITH_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CH0LIMITH_Clear (1UL) /*!< Disable */ + +/* Bit 5 : Write '1' to Disable interrupt for STOPPED event */ +#define SAADC_INTENCLR_STOPPED_Pos (5UL) /*!< Position of STOPPED field. */ +#define SAADC_INTENCLR_STOPPED_Msk (0x1UL << SAADC_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define SAADC_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to Disable interrupt for CALIBRATEDONE event */ +#define SAADC_INTENCLR_CALIBRATEDONE_Pos (4UL) /*!< Position of CALIBRATEDONE field. */ +#define SAADC_INTENCLR_CALIBRATEDONE_Msk (0x1UL << SAADC_INTENCLR_CALIBRATEDONE_Pos) /*!< Bit mask of CALIBRATEDONE field. */ +#define SAADC_INTENCLR_CALIBRATEDONE_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_CALIBRATEDONE_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_CALIBRATEDONE_Clear (1UL) /*!< Disable */ + +/* Bit 3 : Write '1' to Disable interrupt for RESULTDONE event */ +#define SAADC_INTENCLR_RESULTDONE_Pos (3UL) /*!< Position of RESULTDONE field. */ +#define SAADC_INTENCLR_RESULTDONE_Msk (0x1UL << SAADC_INTENCLR_RESULTDONE_Pos) /*!< Bit mask of RESULTDONE field. */ +#define SAADC_INTENCLR_RESULTDONE_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_RESULTDONE_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_RESULTDONE_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable interrupt for DONE event */ +#define SAADC_INTENCLR_DONE_Pos (2UL) /*!< Position of DONE field. */ +#define SAADC_INTENCLR_DONE_Msk (0x1UL << SAADC_INTENCLR_DONE_Pos) /*!< Bit mask of DONE field. */ +#define SAADC_INTENCLR_DONE_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_DONE_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_DONE_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for END event */ +#define SAADC_INTENCLR_END_Pos (1UL) /*!< Position of END field. */ +#define SAADC_INTENCLR_END_Msk (0x1UL << SAADC_INTENCLR_END_Pos) /*!< Bit mask of END field. */ +#define SAADC_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_END_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for STARTED event */ +#define SAADC_INTENCLR_STARTED_Pos (0UL) /*!< Position of STARTED field. */ +#define SAADC_INTENCLR_STARTED_Msk (0x1UL << SAADC_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define SAADC_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */ +#define SAADC_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */ +#define SAADC_INTENCLR_STARTED_Clear (1UL) /*!< Disable */ + +/* Register: SAADC_STATUS */ +/* Description: Status */ + +/* Bit 0 : Status */ +#define SAADC_STATUS_STATUS_Pos (0UL) /*!< Position of STATUS field. */ +#define SAADC_STATUS_STATUS_Msk (0x1UL << SAADC_STATUS_STATUS_Pos) /*!< Bit mask of STATUS field. */ +#define SAADC_STATUS_STATUS_Ready (0UL) /*!< ADC is ready. No on-going conversion. */ +#define SAADC_STATUS_STATUS_Busy (1UL) /*!< ADC is busy. Conversion in progress. */ + +/* Register: SAADC_ENABLE */ +/* Description: Enable or disable ADC */ + +/* Bit 0 : Enable or disable ADC */ +#define SAADC_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define SAADC_ENABLE_ENABLE_Msk (0x1UL << SAADC_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define SAADC_ENABLE_ENABLE_Disabled (0UL) /*!< Disable ADC */ +#define SAADC_ENABLE_ENABLE_Enabled (1UL) /*!< Enable ADC */ + +/* Register: SAADC_CH_PSELP */ +/* Description: Description cluster[0]: Input positive pin selection for CH[0] */ + +/* Bits 4..0 : Analog positive input channel */ +#define SAADC_CH_PSELP_PSELP_Pos (0UL) /*!< Position of PSELP field. */ +#define SAADC_CH_PSELP_PSELP_Msk (0x1FUL << SAADC_CH_PSELP_PSELP_Pos) /*!< Bit mask of PSELP field. */ +#define SAADC_CH_PSELP_PSELP_NC (0UL) /*!< Not connected */ +#define SAADC_CH_PSELP_PSELP_AnalogInput0 (1UL) /*!< AIN0 */ +#define SAADC_CH_PSELP_PSELP_AnalogInput1 (2UL) /*!< AIN1 */ +#define SAADC_CH_PSELP_PSELP_AnalogInput2 (3UL) /*!< AIN2 */ +#define SAADC_CH_PSELP_PSELP_AnalogInput3 (4UL) /*!< AIN3 */ +#define SAADC_CH_PSELP_PSELP_AnalogInput4 (5UL) /*!< AIN4 */ +#define SAADC_CH_PSELP_PSELP_AnalogInput5 (6UL) /*!< AIN5 */ +#define SAADC_CH_PSELP_PSELP_AnalogInput6 (7UL) /*!< AIN6 */ +#define SAADC_CH_PSELP_PSELP_AnalogInput7 (8UL) /*!< AIN7 */ +#define SAADC_CH_PSELP_PSELP_VDD (9UL) /*!< VDD */ + +/* Register: SAADC_CH_PSELN */ +/* Description: Description cluster[0]: Input negative pin selection for CH[0] */ + +/* Bits 4..0 : Analog negative input, enables differential channel */ +#define SAADC_CH_PSELN_PSELN_Pos (0UL) /*!< Position of PSELN field. */ +#define SAADC_CH_PSELN_PSELN_Msk (0x1FUL << SAADC_CH_PSELN_PSELN_Pos) /*!< Bit mask of PSELN field. */ +#define SAADC_CH_PSELN_PSELN_NC (0UL) /*!< Not connected */ +#define SAADC_CH_PSELN_PSELN_AnalogInput0 (1UL) /*!< AIN0 */ +#define SAADC_CH_PSELN_PSELN_AnalogInput1 (2UL) /*!< AIN1 */ +#define SAADC_CH_PSELN_PSELN_AnalogInput2 (3UL) /*!< AIN2 */ +#define SAADC_CH_PSELN_PSELN_AnalogInput3 (4UL) /*!< AIN3 */ +#define SAADC_CH_PSELN_PSELN_AnalogInput4 (5UL) /*!< AIN4 */ +#define SAADC_CH_PSELN_PSELN_AnalogInput5 (6UL) /*!< AIN5 */ +#define SAADC_CH_PSELN_PSELN_AnalogInput6 (7UL) /*!< AIN6 */ +#define SAADC_CH_PSELN_PSELN_AnalogInput7 (8UL) /*!< AIN7 */ +#define SAADC_CH_PSELN_PSELN_VDD (9UL) /*!< VDD */ + +/* Register: SAADC_CH_CONFIG */ +/* Description: Description cluster[0]: Input configuration for CH[0] */ + +/* Bit 24 : Enable burst mode */ +#define SAADC_CH_CONFIG_BURST_Pos (24UL) /*!< Position of BURST field. */ +#define SAADC_CH_CONFIG_BURST_Msk (0x1UL << SAADC_CH_CONFIG_BURST_Pos) /*!< Bit mask of BURST field. */ +#define SAADC_CH_CONFIG_BURST_Disabled (0UL) /*!< Burst mode is disabled (normal operation) */ +#define SAADC_CH_CONFIG_BURST_Enabled (1UL) /*!< Burst mode is enabled. SAADC takes 2^OVERSAMPLE number of samples as fast as it can, and sends the average to Data RAM. */ + +/* Bit 20 : Enable differential mode */ +#define SAADC_CH_CONFIG_MODE_Pos (20UL) /*!< Position of MODE field. */ +#define SAADC_CH_CONFIG_MODE_Msk (0x1UL << SAADC_CH_CONFIG_MODE_Pos) /*!< Bit mask of MODE field. */ +#define SAADC_CH_CONFIG_MODE_SE (0UL) /*!< Single ended, PSELN will be ignored, negative input to ADC shorted to GND */ +#define SAADC_CH_CONFIG_MODE_Diff (1UL) /*!< Differential */ + +/* Bits 18..16 : Acquisition time, the time the ADC uses to sample the input voltage */ +#define SAADC_CH_CONFIG_TACQ_Pos (16UL) /*!< Position of TACQ field. */ +#define SAADC_CH_CONFIG_TACQ_Msk (0x7UL << SAADC_CH_CONFIG_TACQ_Pos) /*!< Bit mask of TACQ field. */ +#define SAADC_CH_CONFIG_TACQ_3us (0UL) /*!< 3 us */ +#define SAADC_CH_CONFIG_TACQ_5us (1UL) /*!< 5 us */ +#define SAADC_CH_CONFIG_TACQ_10us (2UL) /*!< 10 us */ +#define SAADC_CH_CONFIG_TACQ_15us (3UL) /*!< 15 us */ +#define SAADC_CH_CONFIG_TACQ_20us (4UL) /*!< 20 us */ +#define SAADC_CH_CONFIG_TACQ_40us (5UL) /*!< 40 us */ + +/* Bit 12 : Reference control */ +#define SAADC_CH_CONFIG_REFSEL_Pos (12UL) /*!< Position of REFSEL field. */ +#define SAADC_CH_CONFIG_REFSEL_Msk (0x1UL << SAADC_CH_CONFIG_REFSEL_Pos) /*!< Bit mask of REFSEL field. */ +#define SAADC_CH_CONFIG_REFSEL_Internal (0UL) /*!< Internal reference (0.6 V) */ +#define SAADC_CH_CONFIG_REFSEL_VDD1_4 (1UL) /*!< VDD/4 as reference */ + +/* Bits 10..8 : Gain control */ +#define SAADC_CH_CONFIG_GAIN_Pos (8UL) /*!< Position of GAIN field. */ +#define SAADC_CH_CONFIG_GAIN_Msk (0x7UL << SAADC_CH_CONFIG_GAIN_Pos) /*!< Bit mask of GAIN field. */ +#define SAADC_CH_CONFIG_GAIN_Gain1_6 (0UL) /*!< 1/6 */ +#define SAADC_CH_CONFIG_GAIN_Gain1_5 (1UL) /*!< 1/5 */ +#define SAADC_CH_CONFIG_GAIN_Gain1_4 (2UL) /*!< 1/4 */ +#define SAADC_CH_CONFIG_GAIN_Gain1_3 (3UL) /*!< 1/3 */ +#define SAADC_CH_CONFIG_GAIN_Gain1_2 (4UL) /*!< 1/2 */ +#define SAADC_CH_CONFIG_GAIN_Gain1 (5UL) /*!< 1 */ +#define SAADC_CH_CONFIG_GAIN_Gain2 (6UL) /*!< 2 */ +#define SAADC_CH_CONFIG_GAIN_Gain4 (7UL) /*!< 4 */ + +/* Bits 5..4 : Negative channel resistor control */ +#define SAADC_CH_CONFIG_RESN_Pos (4UL) /*!< Position of RESN field. */ +#define SAADC_CH_CONFIG_RESN_Msk (0x3UL << SAADC_CH_CONFIG_RESN_Pos) /*!< Bit mask of RESN field. */ +#define SAADC_CH_CONFIG_RESN_Bypass (0UL) /*!< Bypass resistor ladder */ +#define SAADC_CH_CONFIG_RESN_Pulldown (1UL) /*!< Pull-down to GND */ +#define SAADC_CH_CONFIG_RESN_Pullup (2UL) /*!< Pull-up to VDD */ +#define SAADC_CH_CONFIG_RESN_VDD1_2 (3UL) /*!< Set input at VDD/2 */ + +/* Bits 1..0 : Positive channel resistor control */ +#define SAADC_CH_CONFIG_RESP_Pos (0UL) /*!< Position of RESP field. */ +#define SAADC_CH_CONFIG_RESP_Msk (0x3UL << SAADC_CH_CONFIG_RESP_Pos) /*!< Bit mask of RESP field. */ +#define SAADC_CH_CONFIG_RESP_Bypass (0UL) /*!< Bypass resistor ladder */ +#define SAADC_CH_CONFIG_RESP_Pulldown (1UL) /*!< Pull-down to GND */ +#define SAADC_CH_CONFIG_RESP_Pullup (2UL) /*!< Pull-up to VDD */ +#define SAADC_CH_CONFIG_RESP_VDD1_2 (3UL) /*!< Set input at VDD/2 */ + +/* Register: SAADC_CH_LIMIT */ +/* Description: Description cluster[0]: High/low limits for event monitoring a channel */ + +/* Bits 31..16 : High level limit */ +#define SAADC_CH_LIMIT_HIGH_Pos (16UL) /*!< Position of HIGH field. */ +#define SAADC_CH_LIMIT_HIGH_Msk (0xFFFFUL << SAADC_CH_LIMIT_HIGH_Pos) /*!< Bit mask of HIGH field. */ + +/* Bits 15..0 : Low level limit */ +#define SAADC_CH_LIMIT_LOW_Pos (0UL) /*!< Position of LOW field. */ +#define SAADC_CH_LIMIT_LOW_Msk (0xFFFFUL << SAADC_CH_LIMIT_LOW_Pos) /*!< Bit mask of LOW field. */ + +/* Register: SAADC_RESOLUTION */ +/* Description: Resolution configuration */ + +/* Bits 2..0 : Set the resolution */ +#define SAADC_RESOLUTION_VAL_Pos (0UL) /*!< Position of VAL field. */ +#define SAADC_RESOLUTION_VAL_Msk (0x7UL << SAADC_RESOLUTION_VAL_Pos) /*!< Bit mask of VAL field. */ +#define SAADC_RESOLUTION_VAL_8bit (0UL) /*!< 8 bit */ +#define SAADC_RESOLUTION_VAL_10bit (1UL) /*!< 10 bit */ +#define SAADC_RESOLUTION_VAL_12bit (2UL) /*!< 12 bit */ +#define SAADC_RESOLUTION_VAL_14bit (3UL) /*!< 14 bit */ + +/* Register: SAADC_OVERSAMPLE */ +/* Description: Oversampling configuration. OVERSAMPLE should not be combined with SCAN. The RESOLUTION is applied before averaging, thus for high OVERSAMPLE a higher RESOLUTION should be used. */ + +/* Bits 3..0 : Oversample control */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Pos (0UL) /*!< Position of OVERSAMPLE field. */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Msk (0xFUL << SAADC_OVERSAMPLE_OVERSAMPLE_Pos) /*!< Bit mask of OVERSAMPLE field. */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Bypass (0UL) /*!< Bypass oversampling */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Over2x (1UL) /*!< Oversample 2x */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Over4x (2UL) /*!< Oversample 4x */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Over8x (3UL) /*!< Oversample 8x */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Over16x (4UL) /*!< Oversample 16x */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Over32x (5UL) /*!< Oversample 32x */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Over64x (6UL) /*!< Oversample 64x */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Over128x (7UL) /*!< Oversample 128x */ +#define SAADC_OVERSAMPLE_OVERSAMPLE_Over256x (8UL) /*!< Oversample 256x */ + +/* Register: SAADC_SAMPLERATE */ +/* Description: Controls normal or continuous sample rate */ + +/* Bit 12 : Select mode for sample rate control */ +#define SAADC_SAMPLERATE_MODE_Pos (12UL) /*!< Position of MODE field. */ +#define SAADC_SAMPLERATE_MODE_Msk (0x1UL << SAADC_SAMPLERATE_MODE_Pos) /*!< Bit mask of MODE field. */ +#define SAADC_SAMPLERATE_MODE_Task (0UL) /*!< Rate is controlled from SAMPLE task */ +#define SAADC_SAMPLERATE_MODE_Timers (1UL) /*!< Rate is controlled from local timer (use CC to control the rate) */ + +/* Bits 10..0 : Capture and compare value. Sample rate is 16 MHz/CC */ +#define SAADC_SAMPLERATE_CC_Pos (0UL) /*!< Position of CC field. */ +#define SAADC_SAMPLERATE_CC_Msk (0x7FFUL << SAADC_SAMPLERATE_CC_Pos) /*!< Bit mask of CC field. */ + +/* Register: SAADC_RESULT_PTR */ +/* Description: Data pointer */ + +/* Bits 31..0 : Data pointer */ +#define SAADC_RESULT_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define SAADC_RESULT_PTR_PTR_Msk (0xFFFFFFFFUL << SAADC_RESULT_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: SAADC_RESULT_MAXCNT */ +/* Description: Maximum number of buffer words to transfer */ + +/* Bits 14..0 : Maximum number of buffer words to transfer */ +#define SAADC_RESULT_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define SAADC_RESULT_MAXCNT_MAXCNT_Msk (0x7FFFUL << SAADC_RESULT_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: SAADC_RESULT_AMOUNT */ +/* Description: Number of buffer words transferred since last START */ + +/* Bits 14..0 : Number of buffer words transferred since last START. This register can be read after an END or STOPPED event. */ +#define SAADC_RESULT_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define SAADC_RESULT_AMOUNT_AMOUNT_Msk (0x7FFFUL << SAADC_RESULT_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + + +/* Peripheral: SPI */ +/* Description: Serial Peripheral Interface 0 */ + +/* Register: SPI_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 2 : Write '1' to Enable interrupt for READY event */ +#define SPI_INTENSET_READY_Pos (2UL) /*!< Position of READY field. */ +#define SPI_INTENSET_READY_Msk (0x1UL << SPI_INTENSET_READY_Pos) /*!< Bit mask of READY field. */ +#define SPI_INTENSET_READY_Disabled (0UL) /*!< Read: Disabled */ +#define SPI_INTENSET_READY_Enabled (1UL) /*!< Read: Enabled */ +#define SPI_INTENSET_READY_Set (1UL) /*!< Enable */ + +/* Register: SPI_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 2 : Write '1' to Disable interrupt for READY event */ +#define SPI_INTENCLR_READY_Pos (2UL) /*!< Position of READY field. */ +#define SPI_INTENCLR_READY_Msk (0x1UL << SPI_INTENCLR_READY_Pos) /*!< Bit mask of READY field. */ +#define SPI_INTENCLR_READY_Disabled (0UL) /*!< Read: Disabled */ +#define SPI_INTENCLR_READY_Enabled (1UL) /*!< Read: Enabled */ +#define SPI_INTENCLR_READY_Clear (1UL) /*!< Disable */ + +/* Register: SPI_ENABLE */ +/* Description: Enable SPI */ + +/* Bits 3..0 : Enable or disable SPI */ +#define SPI_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define SPI_ENABLE_ENABLE_Msk (0xFUL << SPI_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define SPI_ENABLE_ENABLE_Disabled (0UL) /*!< Disable SPI */ +#define SPI_ENABLE_ENABLE_Enabled (1UL) /*!< Enable SPI */ + +/* Register: SPI_PSEL_SCK */ +/* Description: Pin select for SCK */ + +/* Bits 31..0 : Pin number configuration for SPI SCK signal */ +#define SPI_PSEL_SCK_PSELSCK_Pos (0UL) /*!< Position of PSELSCK field. */ +#define SPI_PSEL_SCK_PSELSCK_Msk (0xFFFFFFFFUL << SPI_PSEL_SCK_PSELSCK_Pos) /*!< Bit mask of PSELSCK field. */ +#define SPI_PSEL_SCK_PSELSCK_Disconnected (0xFFFFFFFFUL) /*!< Disconnect */ + +/* Register: SPI_PSEL_MOSI */ +/* Description: Pin select for MOSI */ + +/* Bits 31..0 : Pin number configuration for SPI MOSI signal */ +#define SPI_PSEL_MOSI_PSELMOSI_Pos (0UL) /*!< Position of PSELMOSI field. */ +#define SPI_PSEL_MOSI_PSELMOSI_Msk (0xFFFFFFFFUL << SPI_PSEL_MOSI_PSELMOSI_Pos) /*!< Bit mask of PSELMOSI field. */ +#define SPI_PSEL_MOSI_PSELMOSI_Disconnected (0xFFFFFFFFUL) /*!< Disconnect */ + +/* Register: SPI_PSEL_MISO */ +/* Description: Pin select for MISO */ + +/* Bits 31..0 : Pin number configuration for SPI MISO signal */ +#define SPI_PSEL_MISO_PSELMISO_Pos (0UL) /*!< Position of PSELMISO field. */ +#define SPI_PSEL_MISO_PSELMISO_Msk (0xFFFFFFFFUL << SPI_PSEL_MISO_PSELMISO_Pos) /*!< Bit mask of PSELMISO field. */ +#define SPI_PSEL_MISO_PSELMISO_Disconnected (0xFFFFFFFFUL) /*!< Disconnect */ + +/* Register: SPI_RXD */ +/* Description: RXD register */ + +/* Bits 7..0 : RX data received. Double buffered */ +#define SPI_RXD_RXD_Pos (0UL) /*!< Position of RXD field. */ +#define SPI_RXD_RXD_Msk (0xFFUL << SPI_RXD_RXD_Pos) /*!< Bit mask of RXD field. */ + +/* Register: SPI_TXD */ +/* Description: TXD register */ + +/* Bits 7..0 : TX data to send. Double buffered */ +#define SPI_TXD_TXD_Pos (0UL) /*!< Position of TXD field. */ +#define SPI_TXD_TXD_Msk (0xFFUL << SPI_TXD_TXD_Pos) /*!< Bit mask of TXD field. */ + +/* Register: SPI_FREQUENCY */ +/* Description: SPI frequency */ + +/* Bits 31..0 : SPI master data rate */ +#define SPI_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ +#define SPI_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << SPI_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ +#define SPI_FREQUENCY_FREQUENCY_K125 (0x02000000UL) /*!< 125 kbps */ +#define SPI_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */ +#define SPI_FREQUENCY_FREQUENCY_K500 (0x08000000UL) /*!< 500 kbps */ +#define SPI_FREQUENCY_FREQUENCY_M1 (0x10000000UL) /*!< 1 Mbps */ +#define SPI_FREQUENCY_FREQUENCY_M2 (0x20000000UL) /*!< 2 Mbps */ +#define SPI_FREQUENCY_FREQUENCY_M4 (0x40000000UL) /*!< 4 Mbps */ +#define SPI_FREQUENCY_FREQUENCY_M8 (0x80000000UL) /*!< 8 Mbps */ + +/* Register: SPI_CONFIG */ +/* Description: Configuration register */ + +/* Bit 2 : Serial clock (SCK) polarity */ +#define SPI_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */ +#define SPI_CONFIG_CPOL_Msk (0x1UL << SPI_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */ +#define SPI_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high */ +#define SPI_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low */ + +/* Bit 1 : Serial clock (SCK) phase */ +#define SPI_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */ +#define SPI_CONFIG_CPHA_Msk (0x1UL << SPI_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */ +#define SPI_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of clock, shift serial data on trailing edge */ +#define SPI_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of clock, shift serial data on leading edge */ + +/* Bit 0 : Bit order */ +#define SPI_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */ +#define SPI_CONFIG_ORDER_Msk (0x1UL << SPI_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */ +#define SPI_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit shifted out first */ +#define SPI_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit shifted out first */ + + +/* Peripheral: SPIM */ +/* Description: Serial Peripheral Interface Master with EasyDMA 0 */ + +/* Register: SPIM_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 17 : Shortcut between END event and START task */ +#define SPIM_SHORTS_END_START_Pos (17UL) /*!< Position of END_START field. */ +#define SPIM_SHORTS_END_START_Msk (0x1UL << SPIM_SHORTS_END_START_Pos) /*!< Bit mask of END_START field. */ +#define SPIM_SHORTS_END_START_Disabled (0UL) /*!< Disable shortcut */ +#define SPIM_SHORTS_END_START_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: SPIM_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 19 : Write '1' to Enable interrupt for STARTED event */ +#define SPIM_INTENSET_STARTED_Pos (19UL) /*!< Position of STARTED field. */ +#define SPIM_INTENSET_STARTED_Msk (0x1UL << SPIM_INTENSET_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define SPIM_INTENSET_STARTED_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENSET_STARTED_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENSET_STARTED_Set (1UL) /*!< Enable */ + +/* Bit 8 : Write '1' to Enable interrupt for ENDTX event */ +#define SPIM_INTENSET_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ +#define SPIM_INTENSET_ENDTX_Msk (0x1UL << SPIM_INTENSET_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ +#define SPIM_INTENSET_ENDTX_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENSET_ENDTX_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENSET_ENDTX_Set (1UL) /*!< Enable */ + +/* Bit 6 : Write '1' to Enable interrupt for END event */ +#define SPIM_INTENSET_END_Pos (6UL) /*!< Position of END field. */ +#define SPIM_INTENSET_END_Msk (0x1UL << SPIM_INTENSET_END_Pos) /*!< Bit mask of END field. */ +#define SPIM_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENSET_END_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to Enable interrupt for ENDRX event */ +#define SPIM_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ +#define SPIM_INTENSET_ENDRX_Msk (0x1UL << SPIM_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define SPIM_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENSET_ENDRX_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for STOPPED event */ +#define SPIM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define SPIM_INTENSET_STOPPED_Msk (0x1UL << SPIM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define SPIM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Register: SPIM_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 19 : Write '1' to Disable interrupt for STARTED event */ +#define SPIM_INTENCLR_STARTED_Pos (19UL) /*!< Position of STARTED field. */ +#define SPIM_INTENCLR_STARTED_Msk (0x1UL << SPIM_INTENCLR_STARTED_Pos) /*!< Bit mask of STARTED field. */ +#define SPIM_INTENCLR_STARTED_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENCLR_STARTED_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENCLR_STARTED_Clear (1UL) /*!< Disable */ + +/* Bit 8 : Write '1' to Disable interrupt for ENDTX event */ +#define SPIM_INTENCLR_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ +#define SPIM_INTENCLR_ENDTX_Msk (0x1UL << SPIM_INTENCLR_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ +#define SPIM_INTENCLR_ENDTX_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENCLR_ENDTX_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENCLR_ENDTX_Clear (1UL) /*!< Disable */ + +/* Bit 6 : Write '1' to Disable interrupt for END event */ +#define SPIM_INTENCLR_END_Pos (6UL) /*!< Position of END field. */ +#define SPIM_INTENCLR_END_Msk (0x1UL << SPIM_INTENCLR_END_Pos) /*!< Bit mask of END field. */ +#define SPIM_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENCLR_END_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to Disable interrupt for ENDRX event */ +#define SPIM_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ +#define SPIM_INTENCLR_ENDRX_Msk (0x1UL << SPIM_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define SPIM_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for STOPPED event */ +#define SPIM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define SPIM_INTENCLR_STOPPED_Msk (0x1UL << SPIM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define SPIM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define SPIM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define SPIM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Register: SPIM_ENABLE */ +/* Description: Enable SPIM */ + +/* Bits 3..0 : Enable or disable SPIM */ +#define SPIM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define SPIM_ENABLE_ENABLE_Msk (0xFUL << SPIM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define SPIM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable SPIM */ +#define SPIM_ENABLE_ENABLE_Enabled (7UL) /*!< Enable SPIM */ + +/* Register: SPIM_PSEL_SCK */ +/* Description: Pin select for SCK */ + +/* Bit 31 : Connection */ +#define SPIM_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPIM_PSEL_SCK_CONNECT_Msk (0x1UL << SPIM_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPIM_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */ +#define SPIM_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define SPIM_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPIM_PSEL_SCK_PIN_Msk (0x1FUL << SPIM_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPIM_PSEL_MOSI */ +/* Description: Pin select for MOSI signal */ + +/* Bit 31 : Connection */ +#define SPIM_PSEL_MOSI_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPIM_PSEL_MOSI_CONNECT_Msk (0x1UL << SPIM_PSEL_MOSI_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPIM_PSEL_MOSI_CONNECT_Connected (0UL) /*!< Connect */ +#define SPIM_PSEL_MOSI_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define SPIM_PSEL_MOSI_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPIM_PSEL_MOSI_PIN_Msk (0x1FUL << SPIM_PSEL_MOSI_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPIM_PSEL_MISO */ +/* Description: Pin select for MISO signal */ + +/* Bit 31 : Connection */ +#define SPIM_PSEL_MISO_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPIM_PSEL_MISO_CONNECT_Msk (0x1UL << SPIM_PSEL_MISO_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPIM_PSEL_MISO_CONNECT_Connected (0UL) /*!< Connect */ +#define SPIM_PSEL_MISO_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define SPIM_PSEL_MISO_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPIM_PSEL_MISO_PIN_Msk (0x1FUL << SPIM_PSEL_MISO_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPIM_FREQUENCY */ +/* Description: SPI frequency. Accuracy depends on the HFCLK source selected. */ + +/* Bits 31..0 : SPI master data rate */ +#define SPIM_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ +#define SPIM_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << SPIM_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ +#define SPIM_FREQUENCY_FREQUENCY_K125 (0x02000000UL) /*!< 125 kbps */ +#define SPIM_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */ +#define SPIM_FREQUENCY_FREQUENCY_K500 (0x08000000UL) /*!< 500 kbps */ +#define SPIM_FREQUENCY_FREQUENCY_M1 (0x10000000UL) /*!< 1 Mbps */ +#define SPIM_FREQUENCY_FREQUENCY_M2 (0x20000000UL) /*!< 2 Mbps */ +#define SPIM_FREQUENCY_FREQUENCY_M4 (0x40000000UL) /*!< 4 Mbps */ +#define SPIM_FREQUENCY_FREQUENCY_M8 (0x80000000UL) /*!< 8 Mbps */ + +/* Register: SPIM_RXD_PTR */ +/* Description: Data pointer */ + +/* Bits 31..0 : Data pointer */ +#define SPIM_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define SPIM_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIM_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: SPIM_RXD_MAXCNT */ +/* Description: Maximum number of bytes in receive buffer */ + +/* Bits 7..0 : Maximum number of bytes in receive buffer */ +#define SPIM_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define SPIM_RXD_MAXCNT_MAXCNT_Msk (0xFFUL << SPIM_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: SPIM_RXD_AMOUNT */ +/* Description: Number of bytes transferred in the last transaction */ + +/* Bits 7..0 : Number of bytes transferred in the last transaction */ +#define SPIM_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define SPIM_RXD_AMOUNT_AMOUNT_Msk (0xFFUL << SPIM_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: SPIM_RXD_LIST */ +/* Description: EasyDMA list type */ + +/* Bits 2..0 : List type */ +#define SPIM_RXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */ +#define SPIM_RXD_LIST_LIST_Msk (0x7UL << SPIM_RXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */ +#define SPIM_RXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */ +#define SPIM_RXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */ + +/* Register: SPIM_TXD_PTR */ +/* Description: Data pointer */ + +/* Bits 31..0 : Data pointer */ +#define SPIM_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define SPIM_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIM_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: SPIM_TXD_MAXCNT */ +/* Description: Maximum number of bytes in transmit buffer */ + +/* Bits 7..0 : Maximum number of bytes in transmit buffer */ +#define SPIM_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define SPIM_TXD_MAXCNT_MAXCNT_Msk (0xFFUL << SPIM_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: SPIM_TXD_AMOUNT */ +/* Description: Number of bytes transferred in the last transaction */ + +/* Bits 7..0 : Number of bytes transferred in the last transaction */ +#define SPIM_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define SPIM_TXD_AMOUNT_AMOUNT_Msk (0xFFUL << SPIM_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: SPIM_TXD_LIST */ +/* Description: EasyDMA list type */ + +/* Bits 2..0 : List type */ +#define SPIM_TXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */ +#define SPIM_TXD_LIST_LIST_Msk (0x7UL << SPIM_TXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */ +#define SPIM_TXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */ +#define SPIM_TXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */ + +/* Register: SPIM_CONFIG */ +/* Description: Configuration register */ + +/* Bit 2 : Serial clock (SCK) polarity */ +#define SPIM_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */ +#define SPIM_CONFIG_CPOL_Msk (0x1UL << SPIM_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */ +#define SPIM_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high */ +#define SPIM_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low */ + +/* Bit 1 : Serial clock (SCK) phase */ +#define SPIM_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */ +#define SPIM_CONFIG_CPHA_Msk (0x1UL << SPIM_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */ +#define SPIM_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of clock, shift serial data on trailing edge */ +#define SPIM_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of clock, shift serial data on leading edge */ + +/* Bit 0 : Bit order */ +#define SPIM_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */ +#define SPIM_CONFIG_ORDER_Msk (0x1UL << SPIM_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */ +#define SPIM_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit shifted out first */ +#define SPIM_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit shifted out first */ + +/* Register: SPIM_ORC */ +/* Description: Over-read character. Character clocked out in case and over-read of the TXD buffer. */ + +/* Bits 7..0 : Over-read character. Character clocked out in case and over-read of the TXD buffer. */ +#define SPIM_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */ +#define SPIM_ORC_ORC_Msk (0xFFUL << SPIM_ORC_ORC_Pos) /*!< Bit mask of ORC field. */ + + +/* Peripheral: SPIS */ +/* Description: SPI Slave 0 */ + +/* Register: SPIS_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 2 : Shortcut between END event and ACQUIRE task */ +#define SPIS_SHORTS_END_ACQUIRE_Pos (2UL) /*!< Position of END_ACQUIRE field. */ +#define SPIS_SHORTS_END_ACQUIRE_Msk (0x1UL << SPIS_SHORTS_END_ACQUIRE_Pos) /*!< Bit mask of END_ACQUIRE field. */ +#define SPIS_SHORTS_END_ACQUIRE_Disabled (0UL) /*!< Disable shortcut */ +#define SPIS_SHORTS_END_ACQUIRE_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: SPIS_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 10 : Write '1' to Enable interrupt for ACQUIRED event */ +#define SPIS_INTENSET_ACQUIRED_Pos (10UL) /*!< Position of ACQUIRED field. */ +#define SPIS_INTENSET_ACQUIRED_Msk (0x1UL << SPIS_INTENSET_ACQUIRED_Pos) /*!< Bit mask of ACQUIRED field. */ +#define SPIS_INTENSET_ACQUIRED_Disabled (0UL) /*!< Read: Disabled */ +#define SPIS_INTENSET_ACQUIRED_Enabled (1UL) /*!< Read: Enabled */ +#define SPIS_INTENSET_ACQUIRED_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to Enable interrupt for ENDRX event */ +#define SPIS_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ +#define SPIS_INTENSET_ENDRX_Msk (0x1UL << SPIS_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define SPIS_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */ +#define SPIS_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */ +#define SPIS_INTENSET_ENDRX_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for END event */ +#define SPIS_INTENSET_END_Pos (1UL) /*!< Position of END field. */ +#define SPIS_INTENSET_END_Msk (0x1UL << SPIS_INTENSET_END_Pos) /*!< Bit mask of END field. */ +#define SPIS_INTENSET_END_Disabled (0UL) /*!< Read: Disabled */ +#define SPIS_INTENSET_END_Enabled (1UL) /*!< Read: Enabled */ +#define SPIS_INTENSET_END_Set (1UL) /*!< Enable */ + +/* Register: SPIS_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 10 : Write '1' to Disable interrupt for ACQUIRED event */ +#define SPIS_INTENCLR_ACQUIRED_Pos (10UL) /*!< Position of ACQUIRED field. */ +#define SPIS_INTENCLR_ACQUIRED_Msk (0x1UL << SPIS_INTENCLR_ACQUIRED_Pos) /*!< Bit mask of ACQUIRED field. */ +#define SPIS_INTENCLR_ACQUIRED_Disabled (0UL) /*!< Read: Disabled */ +#define SPIS_INTENCLR_ACQUIRED_Enabled (1UL) /*!< Read: Enabled */ +#define SPIS_INTENCLR_ACQUIRED_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to Disable interrupt for ENDRX event */ +#define SPIS_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ +#define SPIS_INTENCLR_ENDRX_Msk (0x1UL << SPIS_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define SPIS_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */ +#define SPIS_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */ +#define SPIS_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for END event */ +#define SPIS_INTENCLR_END_Pos (1UL) /*!< Position of END field. */ +#define SPIS_INTENCLR_END_Msk (0x1UL << SPIS_INTENCLR_END_Pos) /*!< Bit mask of END field. */ +#define SPIS_INTENCLR_END_Disabled (0UL) /*!< Read: Disabled */ +#define SPIS_INTENCLR_END_Enabled (1UL) /*!< Read: Enabled */ +#define SPIS_INTENCLR_END_Clear (1UL) /*!< Disable */ + +/* Register: SPIS_SEMSTAT */ +/* Description: Semaphore status register */ + +/* Bits 1..0 : Semaphore status */ +#define SPIS_SEMSTAT_SEMSTAT_Pos (0UL) /*!< Position of SEMSTAT field. */ +#define SPIS_SEMSTAT_SEMSTAT_Msk (0x3UL << SPIS_SEMSTAT_SEMSTAT_Pos) /*!< Bit mask of SEMSTAT field. */ +#define SPIS_SEMSTAT_SEMSTAT_Free (0UL) /*!< Semaphore is free */ +#define SPIS_SEMSTAT_SEMSTAT_CPU (1UL) /*!< Semaphore is assigned to CPU */ +#define SPIS_SEMSTAT_SEMSTAT_SPIS (2UL) /*!< Semaphore is assigned to SPI slave */ +#define SPIS_SEMSTAT_SEMSTAT_CPUPending (3UL) /*!< Semaphore is assigned to SPI but a handover to the CPU is pending */ + +/* Register: SPIS_STATUS */ +/* Description: Status from last transaction */ + +/* Bit 1 : RX buffer overflow detected, and prevented */ +#define SPIS_STATUS_OVERFLOW_Pos (1UL) /*!< Position of OVERFLOW field. */ +#define SPIS_STATUS_OVERFLOW_Msk (0x1UL << SPIS_STATUS_OVERFLOW_Pos) /*!< Bit mask of OVERFLOW field. */ +#define SPIS_STATUS_OVERFLOW_NotPresent (0UL) /*!< Read: error not present */ +#define SPIS_STATUS_OVERFLOW_Present (1UL) /*!< Read: error present */ +#define SPIS_STATUS_OVERFLOW_Clear (1UL) /*!< Write: clear error on writing '1' */ + +/* Bit 0 : TX buffer over-read detected, and prevented */ +#define SPIS_STATUS_OVERREAD_Pos (0UL) /*!< Position of OVERREAD field. */ +#define SPIS_STATUS_OVERREAD_Msk (0x1UL << SPIS_STATUS_OVERREAD_Pos) /*!< Bit mask of OVERREAD field. */ +#define SPIS_STATUS_OVERREAD_NotPresent (0UL) /*!< Read: error not present */ +#define SPIS_STATUS_OVERREAD_Present (1UL) /*!< Read: error present */ +#define SPIS_STATUS_OVERREAD_Clear (1UL) /*!< Write: clear error on writing '1' */ + +/* Register: SPIS_ENABLE */ +/* Description: Enable SPI slave */ + +/* Bits 3..0 : Enable or disable SPI slave */ +#define SPIS_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define SPIS_ENABLE_ENABLE_Msk (0xFUL << SPIS_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define SPIS_ENABLE_ENABLE_Disabled (0UL) /*!< Disable SPI slave */ +#define SPIS_ENABLE_ENABLE_Enabled (2UL) /*!< Enable SPI slave */ + +/* Register: SPIS_PSEL_SCK */ +/* Description: Pin select for SCK */ + +/* Bit 31 : Connection */ +#define SPIS_PSEL_SCK_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPIS_PSEL_SCK_CONNECT_Msk (0x1UL << SPIS_PSEL_SCK_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPIS_PSEL_SCK_CONNECT_Connected (0UL) /*!< Connect */ +#define SPIS_PSEL_SCK_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define SPIS_PSEL_SCK_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPIS_PSEL_SCK_PIN_Msk (0x1FUL << SPIS_PSEL_SCK_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPIS_PSEL_MISO */ +/* Description: Pin select for MISO signal */ + +/* Bit 31 : Connection */ +#define SPIS_PSEL_MISO_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPIS_PSEL_MISO_CONNECT_Msk (0x1UL << SPIS_PSEL_MISO_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPIS_PSEL_MISO_CONNECT_Connected (0UL) /*!< Connect */ +#define SPIS_PSEL_MISO_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define SPIS_PSEL_MISO_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPIS_PSEL_MISO_PIN_Msk (0x1FUL << SPIS_PSEL_MISO_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPIS_PSEL_MOSI */ +/* Description: Pin select for MOSI signal */ + +/* Bit 31 : Connection */ +#define SPIS_PSEL_MOSI_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPIS_PSEL_MOSI_CONNECT_Msk (0x1UL << SPIS_PSEL_MOSI_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPIS_PSEL_MOSI_CONNECT_Connected (0UL) /*!< Connect */ +#define SPIS_PSEL_MOSI_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define SPIS_PSEL_MOSI_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPIS_PSEL_MOSI_PIN_Msk (0x1FUL << SPIS_PSEL_MOSI_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPIS_PSEL_CSN */ +/* Description: Pin select for CSN signal */ + +/* Bit 31 : Connection */ +#define SPIS_PSEL_CSN_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define SPIS_PSEL_CSN_CONNECT_Msk (0x1UL << SPIS_PSEL_CSN_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define SPIS_PSEL_CSN_CONNECT_Connected (0UL) /*!< Connect */ +#define SPIS_PSEL_CSN_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define SPIS_PSEL_CSN_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define SPIS_PSEL_CSN_PIN_Msk (0x1FUL << SPIS_PSEL_CSN_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: SPIS_RXD_PTR */ +/* Description: RXD data pointer */ + +/* Bits 31..0 : RXD data pointer */ +#define SPIS_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define SPIS_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIS_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: SPIS_RXD_MAXCNT */ +/* Description: Maximum number of bytes in receive buffer */ + +/* Bits 7..0 : Maximum number of bytes in receive buffer */ +#define SPIS_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define SPIS_RXD_MAXCNT_MAXCNT_Msk (0xFFUL << SPIS_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: SPIS_RXD_AMOUNT */ +/* Description: Number of bytes received in last granted transaction */ + +/* Bits 7..0 : Number of bytes received in the last granted transaction */ +#define SPIS_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define SPIS_RXD_AMOUNT_AMOUNT_Msk (0xFFUL << SPIS_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: SPIS_TXD_PTR */ +/* Description: TXD data pointer */ + +/* Bits 31..0 : TXD data pointer */ +#define SPIS_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define SPIS_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << SPIS_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: SPIS_TXD_MAXCNT */ +/* Description: Maximum number of bytes in transmit buffer */ + +/* Bits 7..0 : Maximum number of bytes in transmit buffer */ +#define SPIS_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define SPIS_TXD_MAXCNT_MAXCNT_Msk (0xFFUL << SPIS_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: SPIS_TXD_AMOUNT */ +/* Description: Number of bytes transmitted in last granted transaction */ + +/* Bits 7..0 : Number of bytes transmitted in last granted transaction */ +#define SPIS_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define SPIS_TXD_AMOUNT_AMOUNT_Msk (0xFFUL << SPIS_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: SPIS_CONFIG */ +/* Description: Configuration register */ + +/* Bit 2 : Serial clock (SCK) polarity */ +#define SPIS_CONFIG_CPOL_Pos (2UL) /*!< Position of CPOL field. */ +#define SPIS_CONFIG_CPOL_Msk (0x1UL << SPIS_CONFIG_CPOL_Pos) /*!< Bit mask of CPOL field. */ +#define SPIS_CONFIG_CPOL_ActiveHigh (0UL) /*!< Active high */ +#define SPIS_CONFIG_CPOL_ActiveLow (1UL) /*!< Active low */ + +/* Bit 1 : Serial clock (SCK) phase */ +#define SPIS_CONFIG_CPHA_Pos (1UL) /*!< Position of CPHA field. */ +#define SPIS_CONFIG_CPHA_Msk (0x1UL << SPIS_CONFIG_CPHA_Pos) /*!< Bit mask of CPHA field. */ +#define SPIS_CONFIG_CPHA_Leading (0UL) /*!< Sample on leading edge of clock, shift serial data on trailing edge */ +#define SPIS_CONFIG_CPHA_Trailing (1UL) /*!< Sample on trailing edge of clock, shift serial data on leading edge */ + +/* Bit 0 : Bit order */ +#define SPIS_CONFIG_ORDER_Pos (0UL) /*!< Position of ORDER field. */ +#define SPIS_CONFIG_ORDER_Msk (0x1UL << SPIS_CONFIG_ORDER_Pos) /*!< Bit mask of ORDER field. */ +#define SPIS_CONFIG_ORDER_MsbFirst (0UL) /*!< Most significant bit shifted out first */ +#define SPIS_CONFIG_ORDER_LsbFirst (1UL) /*!< Least significant bit shifted out first */ + +/* Register: SPIS_DEF */ +/* Description: Default character. Character clocked out in case of an ignored transaction. */ + +/* Bits 7..0 : Default character. Character clocked out in case of an ignored transaction. */ +#define SPIS_DEF_DEF_Pos (0UL) /*!< Position of DEF field. */ +#define SPIS_DEF_DEF_Msk (0xFFUL << SPIS_DEF_DEF_Pos) /*!< Bit mask of DEF field. */ + +/* Register: SPIS_ORC */ +/* Description: Over-read character */ + +/* Bits 7..0 : Over-read character. Character clocked out after an over-read of the transmit buffer. */ +#define SPIS_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */ +#define SPIS_ORC_ORC_Msk (0xFFUL << SPIS_ORC_ORC_Pos) /*!< Bit mask of ORC field. */ + + +/* Peripheral: TEMP */ +/* Description: Temperature Sensor */ + +/* Register: TEMP_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 0 : Write '1' to Enable interrupt for DATARDY event */ +#define TEMP_INTENSET_DATARDY_Pos (0UL) /*!< Position of DATARDY field. */ +#define TEMP_INTENSET_DATARDY_Msk (0x1UL << TEMP_INTENSET_DATARDY_Pos) /*!< Bit mask of DATARDY field. */ +#define TEMP_INTENSET_DATARDY_Disabled (0UL) /*!< Read: Disabled */ +#define TEMP_INTENSET_DATARDY_Enabled (1UL) /*!< Read: Enabled */ +#define TEMP_INTENSET_DATARDY_Set (1UL) /*!< Enable */ + +/* Register: TEMP_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 0 : Write '1' to Disable interrupt for DATARDY event */ +#define TEMP_INTENCLR_DATARDY_Pos (0UL) /*!< Position of DATARDY field. */ +#define TEMP_INTENCLR_DATARDY_Msk (0x1UL << TEMP_INTENCLR_DATARDY_Pos) /*!< Bit mask of DATARDY field. */ +#define TEMP_INTENCLR_DATARDY_Disabled (0UL) /*!< Read: Disabled */ +#define TEMP_INTENCLR_DATARDY_Enabled (1UL) /*!< Read: Enabled */ +#define TEMP_INTENCLR_DATARDY_Clear (1UL) /*!< Disable */ + +/* Register: TEMP_TEMP */ +/* Description: Temperature in degC (0.25deg steps) */ + +/* Bits 31..0 : Temperature in degC (0.25deg steps) */ +#define TEMP_TEMP_TEMP_Pos (0UL) /*!< Position of TEMP field. */ +#define TEMP_TEMP_TEMP_Msk (0xFFFFFFFFUL << TEMP_TEMP_TEMP_Pos) /*!< Bit mask of TEMP field. */ + +/* Register: TEMP_A0 */ +/* Description: Slope of 1st piece wise linear function */ + +/* Bits 11..0 : Slope of 1st piece wise linear function */ +#define TEMP_A0_A0_Pos (0UL) /*!< Position of A0 field. */ +#define TEMP_A0_A0_Msk (0xFFFUL << TEMP_A0_A0_Pos) /*!< Bit mask of A0 field. */ + +/* Register: TEMP_A1 */ +/* Description: Slope of 2nd piece wise linear function */ + +/* Bits 11..0 : Slope of 2nd piece wise linear function */ +#define TEMP_A1_A1_Pos (0UL) /*!< Position of A1 field. */ +#define TEMP_A1_A1_Msk (0xFFFUL << TEMP_A1_A1_Pos) /*!< Bit mask of A1 field. */ + +/* Register: TEMP_A2 */ +/* Description: Slope of 3rd piece wise linear function */ + +/* Bits 11..0 : Slope of 3rd piece wise linear function */ +#define TEMP_A2_A2_Pos (0UL) /*!< Position of A2 field. */ +#define TEMP_A2_A2_Msk (0xFFFUL << TEMP_A2_A2_Pos) /*!< Bit mask of A2 field. */ + +/* Register: TEMP_A3 */ +/* Description: Slope of 4th piece wise linear function */ + +/* Bits 11..0 : Slope of 4th piece wise linear function */ +#define TEMP_A3_A3_Pos (0UL) /*!< Position of A3 field. */ +#define TEMP_A3_A3_Msk (0xFFFUL << TEMP_A3_A3_Pos) /*!< Bit mask of A3 field. */ + +/* Register: TEMP_A4 */ +/* Description: Slope of 5th piece wise linear function */ + +/* Bits 11..0 : Slope of 5th piece wise linear function */ +#define TEMP_A4_A4_Pos (0UL) /*!< Position of A4 field. */ +#define TEMP_A4_A4_Msk (0xFFFUL << TEMP_A4_A4_Pos) /*!< Bit mask of A4 field. */ + +/* Register: TEMP_A5 */ +/* Description: Slope of 6th piece wise linear function */ + +/* Bits 11..0 : Slope of 6th piece wise linear function */ +#define TEMP_A5_A5_Pos (0UL) /*!< Position of A5 field. */ +#define TEMP_A5_A5_Msk (0xFFFUL << TEMP_A5_A5_Pos) /*!< Bit mask of A5 field. */ + +/* Register: TEMP_B0 */ +/* Description: y-intercept of 1st piece wise linear function */ + +/* Bits 13..0 : y-intercept of 1st piece wise linear function */ +#define TEMP_B0_B0_Pos (0UL) /*!< Position of B0 field. */ +#define TEMP_B0_B0_Msk (0x3FFFUL << TEMP_B0_B0_Pos) /*!< Bit mask of B0 field. */ + +/* Register: TEMP_B1 */ +/* Description: y-intercept of 2nd piece wise linear function */ + +/* Bits 13..0 : y-intercept of 2nd piece wise linear function */ +#define TEMP_B1_B1_Pos (0UL) /*!< Position of B1 field. */ +#define TEMP_B1_B1_Msk (0x3FFFUL << TEMP_B1_B1_Pos) /*!< Bit mask of B1 field. */ + +/* Register: TEMP_B2 */ +/* Description: y-intercept of 3rd piece wise linear function */ + +/* Bits 13..0 : y-intercept of 3rd piece wise linear function */ +#define TEMP_B2_B2_Pos (0UL) /*!< Position of B2 field. */ +#define TEMP_B2_B2_Msk (0x3FFFUL << TEMP_B2_B2_Pos) /*!< Bit mask of B2 field. */ + +/* Register: TEMP_B3 */ +/* Description: y-intercept of 4th piece wise linear function */ + +/* Bits 13..0 : y-intercept of 4th piece wise linear function */ +#define TEMP_B3_B3_Pos (0UL) /*!< Position of B3 field. */ +#define TEMP_B3_B3_Msk (0x3FFFUL << TEMP_B3_B3_Pos) /*!< Bit mask of B3 field. */ + +/* Register: TEMP_B4 */ +/* Description: y-intercept of 5th piece wise linear function */ + +/* Bits 13..0 : y-intercept of 5th piece wise linear function */ +#define TEMP_B4_B4_Pos (0UL) /*!< Position of B4 field. */ +#define TEMP_B4_B4_Msk (0x3FFFUL << TEMP_B4_B4_Pos) /*!< Bit mask of B4 field. */ + +/* Register: TEMP_B5 */ +/* Description: y-intercept of 6th piece wise linear function */ + +/* Bits 13..0 : y-intercept of 6th piece wise linear function */ +#define TEMP_B5_B5_Pos (0UL) /*!< Position of B5 field. */ +#define TEMP_B5_B5_Msk (0x3FFFUL << TEMP_B5_B5_Pos) /*!< Bit mask of B5 field. */ + +/* Register: TEMP_T0 */ +/* Description: End point of 1st piece wise linear function */ + +/* Bits 7..0 : End point of 1st piece wise linear function */ +#define TEMP_T0_T0_Pos (0UL) /*!< Position of T0 field. */ +#define TEMP_T0_T0_Msk (0xFFUL << TEMP_T0_T0_Pos) /*!< Bit mask of T0 field. */ + +/* Register: TEMP_T1 */ +/* Description: End point of 2nd piece wise linear function */ + +/* Bits 7..0 : End point of 2nd piece wise linear function */ +#define TEMP_T1_T1_Pos (0UL) /*!< Position of T1 field. */ +#define TEMP_T1_T1_Msk (0xFFUL << TEMP_T1_T1_Pos) /*!< Bit mask of T1 field. */ + +/* Register: TEMP_T2 */ +/* Description: End point of 3rd piece wise linear function */ + +/* Bits 7..0 : End point of 3rd piece wise linear function */ +#define TEMP_T2_T2_Pos (0UL) /*!< Position of T2 field. */ +#define TEMP_T2_T2_Msk (0xFFUL << TEMP_T2_T2_Pos) /*!< Bit mask of T2 field. */ + +/* Register: TEMP_T3 */ +/* Description: End point of 4th piece wise linear function */ + +/* Bits 7..0 : End point of 4th piece wise linear function */ +#define TEMP_T3_T3_Pos (0UL) /*!< Position of T3 field. */ +#define TEMP_T3_T3_Msk (0xFFUL << TEMP_T3_T3_Pos) /*!< Bit mask of T3 field. */ + +/* Register: TEMP_T4 */ +/* Description: End point of 5th piece wise linear function */ + +/* Bits 7..0 : End point of 5th piece wise linear function */ +#define TEMP_T4_T4_Pos (0UL) /*!< Position of T4 field. */ +#define TEMP_T4_T4_Msk (0xFFUL << TEMP_T4_T4_Pos) /*!< Bit mask of T4 field. */ + + +/* Peripheral: TIMER */ +/* Description: Timer/Counter 0 */ + +/* Register: TIMER_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 13 : Shortcut between COMPARE[5] event and STOP task */ +#define TIMER_SHORTS_COMPARE5_STOP_Pos (13UL) /*!< Position of COMPARE5_STOP field. */ +#define TIMER_SHORTS_COMPARE5_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE5_STOP_Pos) /*!< Bit mask of COMPARE5_STOP field. */ +#define TIMER_SHORTS_COMPARE5_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE5_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 12 : Shortcut between COMPARE[4] event and STOP task */ +#define TIMER_SHORTS_COMPARE4_STOP_Pos (12UL) /*!< Position of COMPARE4_STOP field. */ +#define TIMER_SHORTS_COMPARE4_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE4_STOP_Pos) /*!< Bit mask of COMPARE4_STOP field. */ +#define TIMER_SHORTS_COMPARE4_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE4_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 11 : Shortcut between COMPARE[3] event and STOP task */ +#define TIMER_SHORTS_COMPARE3_STOP_Pos (11UL) /*!< Position of COMPARE3_STOP field. */ +#define TIMER_SHORTS_COMPARE3_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE3_STOP_Pos) /*!< Bit mask of COMPARE3_STOP field. */ +#define TIMER_SHORTS_COMPARE3_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE3_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 10 : Shortcut between COMPARE[2] event and STOP task */ +#define TIMER_SHORTS_COMPARE2_STOP_Pos (10UL) /*!< Position of COMPARE2_STOP field. */ +#define TIMER_SHORTS_COMPARE2_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE2_STOP_Pos) /*!< Bit mask of COMPARE2_STOP field. */ +#define TIMER_SHORTS_COMPARE2_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE2_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 9 : Shortcut between COMPARE[1] event and STOP task */ +#define TIMER_SHORTS_COMPARE1_STOP_Pos (9UL) /*!< Position of COMPARE1_STOP field. */ +#define TIMER_SHORTS_COMPARE1_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE1_STOP_Pos) /*!< Bit mask of COMPARE1_STOP field. */ +#define TIMER_SHORTS_COMPARE1_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE1_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 8 : Shortcut between COMPARE[0] event and STOP task */ +#define TIMER_SHORTS_COMPARE0_STOP_Pos (8UL) /*!< Position of COMPARE0_STOP field. */ +#define TIMER_SHORTS_COMPARE0_STOP_Msk (0x1UL << TIMER_SHORTS_COMPARE0_STOP_Pos) /*!< Bit mask of COMPARE0_STOP field. */ +#define TIMER_SHORTS_COMPARE0_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE0_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 5 : Shortcut between COMPARE[5] event and CLEAR task */ +#define TIMER_SHORTS_COMPARE5_CLEAR_Pos (5UL) /*!< Position of COMPARE5_CLEAR field. */ +#define TIMER_SHORTS_COMPARE5_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE5_CLEAR_Pos) /*!< Bit mask of COMPARE5_CLEAR field. */ +#define TIMER_SHORTS_COMPARE5_CLEAR_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE5_CLEAR_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 4 : Shortcut between COMPARE[4] event and CLEAR task */ +#define TIMER_SHORTS_COMPARE4_CLEAR_Pos (4UL) /*!< Position of COMPARE4_CLEAR field. */ +#define TIMER_SHORTS_COMPARE4_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE4_CLEAR_Pos) /*!< Bit mask of COMPARE4_CLEAR field. */ +#define TIMER_SHORTS_COMPARE4_CLEAR_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE4_CLEAR_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 3 : Shortcut between COMPARE[3] event and CLEAR task */ +#define TIMER_SHORTS_COMPARE3_CLEAR_Pos (3UL) /*!< Position of COMPARE3_CLEAR field. */ +#define TIMER_SHORTS_COMPARE3_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE3_CLEAR_Pos) /*!< Bit mask of COMPARE3_CLEAR field. */ +#define TIMER_SHORTS_COMPARE3_CLEAR_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE3_CLEAR_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 2 : Shortcut between COMPARE[2] event and CLEAR task */ +#define TIMER_SHORTS_COMPARE2_CLEAR_Pos (2UL) /*!< Position of COMPARE2_CLEAR field. */ +#define TIMER_SHORTS_COMPARE2_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE2_CLEAR_Pos) /*!< Bit mask of COMPARE2_CLEAR field. */ +#define TIMER_SHORTS_COMPARE2_CLEAR_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE2_CLEAR_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 1 : Shortcut between COMPARE[1] event and CLEAR task */ +#define TIMER_SHORTS_COMPARE1_CLEAR_Pos (1UL) /*!< Position of COMPARE1_CLEAR field. */ +#define TIMER_SHORTS_COMPARE1_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE1_CLEAR_Pos) /*!< Bit mask of COMPARE1_CLEAR field. */ +#define TIMER_SHORTS_COMPARE1_CLEAR_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE1_CLEAR_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 0 : Shortcut between COMPARE[0] event and CLEAR task */ +#define TIMER_SHORTS_COMPARE0_CLEAR_Pos (0UL) /*!< Position of COMPARE0_CLEAR field. */ +#define TIMER_SHORTS_COMPARE0_CLEAR_Msk (0x1UL << TIMER_SHORTS_COMPARE0_CLEAR_Pos) /*!< Bit mask of COMPARE0_CLEAR field. */ +#define TIMER_SHORTS_COMPARE0_CLEAR_Disabled (0UL) /*!< Disable shortcut */ +#define TIMER_SHORTS_COMPARE0_CLEAR_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: TIMER_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 21 : Write '1' to Enable interrupt for COMPARE[5] event */ +#define TIMER_INTENSET_COMPARE5_Pos (21UL) /*!< Position of COMPARE5 field. */ +#define TIMER_INTENSET_COMPARE5_Msk (0x1UL << TIMER_INTENSET_COMPARE5_Pos) /*!< Bit mask of COMPARE5 field. */ +#define TIMER_INTENSET_COMPARE5_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENSET_COMPARE5_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENSET_COMPARE5_Set (1UL) /*!< Enable */ + +/* Bit 20 : Write '1' to Enable interrupt for COMPARE[4] event */ +#define TIMER_INTENSET_COMPARE4_Pos (20UL) /*!< Position of COMPARE4 field. */ +#define TIMER_INTENSET_COMPARE4_Msk (0x1UL << TIMER_INTENSET_COMPARE4_Pos) /*!< Bit mask of COMPARE4 field. */ +#define TIMER_INTENSET_COMPARE4_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENSET_COMPARE4_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENSET_COMPARE4_Set (1UL) /*!< Enable */ + +/* Bit 19 : Write '1' to Enable interrupt for COMPARE[3] event */ +#define TIMER_INTENSET_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define TIMER_INTENSET_COMPARE3_Msk (0x1UL << TIMER_INTENSET_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define TIMER_INTENSET_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENSET_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENSET_COMPARE3_Set (1UL) /*!< Enable */ + +/* Bit 18 : Write '1' to Enable interrupt for COMPARE[2] event */ +#define TIMER_INTENSET_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define TIMER_INTENSET_COMPARE2_Msk (0x1UL << TIMER_INTENSET_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define TIMER_INTENSET_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENSET_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENSET_COMPARE2_Set (1UL) /*!< Enable */ + +/* Bit 17 : Write '1' to Enable interrupt for COMPARE[1] event */ +#define TIMER_INTENSET_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define TIMER_INTENSET_COMPARE1_Msk (0x1UL << TIMER_INTENSET_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define TIMER_INTENSET_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENSET_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENSET_COMPARE1_Set (1UL) /*!< Enable */ + +/* Bit 16 : Write '1' to Enable interrupt for COMPARE[0] event */ +#define TIMER_INTENSET_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define TIMER_INTENSET_COMPARE0_Msk (0x1UL << TIMER_INTENSET_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define TIMER_INTENSET_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENSET_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENSET_COMPARE0_Set (1UL) /*!< Enable */ + +/* Register: TIMER_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 21 : Write '1' to Disable interrupt for COMPARE[5] event */ +#define TIMER_INTENCLR_COMPARE5_Pos (21UL) /*!< Position of COMPARE5 field. */ +#define TIMER_INTENCLR_COMPARE5_Msk (0x1UL << TIMER_INTENCLR_COMPARE5_Pos) /*!< Bit mask of COMPARE5 field. */ +#define TIMER_INTENCLR_COMPARE5_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENCLR_COMPARE5_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENCLR_COMPARE5_Clear (1UL) /*!< Disable */ + +/* Bit 20 : Write '1' to Disable interrupt for COMPARE[4] event */ +#define TIMER_INTENCLR_COMPARE4_Pos (20UL) /*!< Position of COMPARE4 field. */ +#define TIMER_INTENCLR_COMPARE4_Msk (0x1UL << TIMER_INTENCLR_COMPARE4_Pos) /*!< Bit mask of COMPARE4 field. */ +#define TIMER_INTENCLR_COMPARE4_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENCLR_COMPARE4_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENCLR_COMPARE4_Clear (1UL) /*!< Disable */ + +/* Bit 19 : Write '1' to Disable interrupt for COMPARE[3] event */ +#define TIMER_INTENCLR_COMPARE3_Pos (19UL) /*!< Position of COMPARE3 field. */ +#define TIMER_INTENCLR_COMPARE3_Msk (0x1UL << TIMER_INTENCLR_COMPARE3_Pos) /*!< Bit mask of COMPARE3 field. */ +#define TIMER_INTENCLR_COMPARE3_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENCLR_COMPARE3_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENCLR_COMPARE3_Clear (1UL) /*!< Disable */ + +/* Bit 18 : Write '1' to Disable interrupt for COMPARE[2] event */ +#define TIMER_INTENCLR_COMPARE2_Pos (18UL) /*!< Position of COMPARE2 field. */ +#define TIMER_INTENCLR_COMPARE2_Msk (0x1UL << TIMER_INTENCLR_COMPARE2_Pos) /*!< Bit mask of COMPARE2 field. */ +#define TIMER_INTENCLR_COMPARE2_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENCLR_COMPARE2_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENCLR_COMPARE2_Clear (1UL) /*!< Disable */ + +/* Bit 17 : Write '1' to Disable interrupt for COMPARE[1] event */ +#define TIMER_INTENCLR_COMPARE1_Pos (17UL) /*!< Position of COMPARE1 field. */ +#define TIMER_INTENCLR_COMPARE1_Msk (0x1UL << TIMER_INTENCLR_COMPARE1_Pos) /*!< Bit mask of COMPARE1 field. */ +#define TIMER_INTENCLR_COMPARE1_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENCLR_COMPARE1_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENCLR_COMPARE1_Clear (1UL) /*!< Disable */ + +/* Bit 16 : Write '1' to Disable interrupt for COMPARE[0] event */ +#define TIMER_INTENCLR_COMPARE0_Pos (16UL) /*!< Position of COMPARE0 field. */ +#define TIMER_INTENCLR_COMPARE0_Msk (0x1UL << TIMER_INTENCLR_COMPARE0_Pos) /*!< Bit mask of COMPARE0 field. */ +#define TIMER_INTENCLR_COMPARE0_Disabled (0UL) /*!< Read: Disabled */ +#define TIMER_INTENCLR_COMPARE0_Enabled (1UL) /*!< Read: Enabled */ +#define TIMER_INTENCLR_COMPARE0_Clear (1UL) /*!< Disable */ + +/* Register: TIMER_MODE */ +/* Description: Timer mode selection */ + +/* Bits 1..0 : Timer mode */ +#define TIMER_MODE_MODE_Pos (0UL) /*!< Position of MODE field. */ +#define TIMER_MODE_MODE_Msk (0x3UL << TIMER_MODE_MODE_Pos) /*!< Bit mask of MODE field. */ +#define TIMER_MODE_MODE_Timer (0UL) /*!< Select Timer mode */ +#define TIMER_MODE_MODE_Counter (1UL) /*!< Deprecated enumerator - Select Counter mode */ +#define TIMER_MODE_MODE_LowPowerCounter (2UL) /*!< Select Low Power Counter mode */ + +/* Register: TIMER_BITMODE */ +/* Description: Configure the number of bits used by the TIMER */ + +/* Bits 1..0 : Timer bit width */ +#define TIMER_BITMODE_BITMODE_Pos (0UL) /*!< Position of BITMODE field. */ +#define TIMER_BITMODE_BITMODE_Msk (0x3UL << TIMER_BITMODE_BITMODE_Pos) /*!< Bit mask of BITMODE field. */ +#define TIMER_BITMODE_BITMODE_16Bit (0UL) /*!< 16 bit timer bit width */ +#define TIMER_BITMODE_BITMODE_08Bit (1UL) /*!< 8 bit timer bit width */ +#define TIMER_BITMODE_BITMODE_24Bit (2UL) /*!< 24 bit timer bit width */ +#define TIMER_BITMODE_BITMODE_32Bit (3UL) /*!< 32 bit timer bit width */ + +/* Register: TIMER_PRESCALER */ +/* Description: Timer prescaler register */ + +/* Bits 3..0 : Prescaler value */ +#define TIMER_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */ +#define TIMER_PRESCALER_PRESCALER_Msk (0xFUL << TIMER_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */ + +/* Register: TIMER_CC */ +/* Description: Description collection[0]: Capture/Compare register 0 */ + +/* Bits 31..0 : Capture/Compare value */ +#define TIMER_CC_CC_Pos (0UL) /*!< Position of CC field. */ +#define TIMER_CC_CC_Msk (0xFFFFFFFFUL << TIMER_CC_CC_Pos) /*!< Bit mask of CC field. */ + + +/* Peripheral: TWI */ +/* Description: I2C compatible Two-Wire Interface 0 */ + +/* Register: TWI_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 1 : Shortcut between BB event and STOP task */ +#define TWI_SHORTS_BB_STOP_Pos (1UL) /*!< Position of BB_STOP field. */ +#define TWI_SHORTS_BB_STOP_Msk (0x1UL << TWI_SHORTS_BB_STOP_Pos) /*!< Bit mask of BB_STOP field. */ +#define TWI_SHORTS_BB_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TWI_SHORTS_BB_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 0 : Shortcut between BB event and SUSPEND task */ +#define TWI_SHORTS_BB_SUSPEND_Pos (0UL) /*!< Position of BB_SUSPEND field. */ +#define TWI_SHORTS_BB_SUSPEND_Msk (0x1UL << TWI_SHORTS_BB_SUSPEND_Pos) /*!< Bit mask of BB_SUSPEND field. */ +#define TWI_SHORTS_BB_SUSPEND_Disabled (0UL) /*!< Disable shortcut */ +#define TWI_SHORTS_BB_SUSPEND_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: TWI_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 18 : Write '1' to Enable interrupt for SUSPENDED event */ +#define TWI_INTENSET_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ +#define TWI_INTENSET_SUSPENDED_Msk (0x1UL << TWI_INTENSET_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ +#define TWI_INTENSET_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */ +#define TWI_INTENSET_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */ +#define TWI_INTENSET_SUSPENDED_Set (1UL) /*!< Enable */ + +/* Bit 14 : Write '1' to Enable interrupt for BB event */ +#define TWI_INTENSET_BB_Pos (14UL) /*!< Position of BB field. */ +#define TWI_INTENSET_BB_Msk (0x1UL << TWI_INTENSET_BB_Pos) /*!< Bit mask of BB field. */ +#define TWI_INTENSET_BB_Disabled (0UL) /*!< Read: Disabled */ +#define TWI_INTENSET_BB_Enabled (1UL) /*!< Read: Enabled */ +#define TWI_INTENSET_BB_Set (1UL) /*!< Enable */ + +/* Bit 9 : Write '1' to Enable interrupt for ERROR event */ +#define TWI_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define TWI_INTENSET_ERROR_Msk (0x1UL << TWI_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define TWI_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define TWI_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define TWI_INTENSET_ERROR_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to Enable interrupt for TXDSENT event */ +#define TWI_INTENSET_TXDSENT_Pos (7UL) /*!< Position of TXDSENT field. */ +#define TWI_INTENSET_TXDSENT_Msk (0x1UL << TWI_INTENSET_TXDSENT_Pos) /*!< Bit mask of TXDSENT field. */ +#define TWI_INTENSET_TXDSENT_Disabled (0UL) /*!< Read: Disabled */ +#define TWI_INTENSET_TXDSENT_Enabled (1UL) /*!< Read: Enabled */ +#define TWI_INTENSET_TXDSENT_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable interrupt for RXDREADY event */ +#define TWI_INTENSET_RXDREADY_Pos (2UL) /*!< Position of RXDREADY field. */ +#define TWI_INTENSET_RXDREADY_Msk (0x1UL << TWI_INTENSET_RXDREADY_Pos) /*!< Bit mask of RXDREADY field. */ +#define TWI_INTENSET_RXDREADY_Disabled (0UL) /*!< Read: Disabled */ +#define TWI_INTENSET_RXDREADY_Enabled (1UL) /*!< Read: Enabled */ +#define TWI_INTENSET_RXDREADY_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for STOPPED event */ +#define TWI_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define TWI_INTENSET_STOPPED_Msk (0x1UL << TWI_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define TWI_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define TWI_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define TWI_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Register: TWI_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 18 : Write '1' to Disable interrupt for SUSPENDED event */ +#define TWI_INTENCLR_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ +#define TWI_INTENCLR_SUSPENDED_Msk (0x1UL << TWI_INTENCLR_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ +#define TWI_INTENCLR_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */ +#define TWI_INTENCLR_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */ +#define TWI_INTENCLR_SUSPENDED_Clear (1UL) /*!< Disable */ + +/* Bit 14 : Write '1' to Disable interrupt for BB event */ +#define TWI_INTENCLR_BB_Pos (14UL) /*!< Position of BB field. */ +#define TWI_INTENCLR_BB_Msk (0x1UL << TWI_INTENCLR_BB_Pos) /*!< Bit mask of BB field. */ +#define TWI_INTENCLR_BB_Disabled (0UL) /*!< Read: Disabled */ +#define TWI_INTENCLR_BB_Enabled (1UL) /*!< Read: Enabled */ +#define TWI_INTENCLR_BB_Clear (1UL) /*!< Disable */ + +/* Bit 9 : Write '1' to Disable interrupt for ERROR event */ +#define TWI_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define TWI_INTENCLR_ERROR_Msk (0x1UL << TWI_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define TWI_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define TWI_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define TWI_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to Disable interrupt for TXDSENT event */ +#define TWI_INTENCLR_TXDSENT_Pos (7UL) /*!< Position of TXDSENT field. */ +#define TWI_INTENCLR_TXDSENT_Msk (0x1UL << TWI_INTENCLR_TXDSENT_Pos) /*!< Bit mask of TXDSENT field. */ +#define TWI_INTENCLR_TXDSENT_Disabled (0UL) /*!< Read: Disabled */ +#define TWI_INTENCLR_TXDSENT_Enabled (1UL) /*!< Read: Enabled */ +#define TWI_INTENCLR_TXDSENT_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable interrupt for RXDREADY event */ +#define TWI_INTENCLR_RXDREADY_Pos (2UL) /*!< Position of RXDREADY field. */ +#define TWI_INTENCLR_RXDREADY_Msk (0x1UL << TWI_INTENCLR_RXDREADY_Pos) /*!< Bit mask of RXDREADY field. */ +#define TWI_INTENCLR_RXDREADY_Disabled (0UL) /*!< Read: Disabled */ +#define TWI_INTENCLR_RXDREADY_Enabled (1UL) /*!< Read: Enabled */ +#define TWI_INTENCLR_RXDREADY_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for STOPPED event */ +#define TWI_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define TWI_INTENCLR_STOPPED_Msk (0x1UL << TWI_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define TWI_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define TWI_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define TWI_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Register: TWI_ERRORSRC */ +/* Description: Error source */ + +/* Bit 2 : NACK received after sending a data byte (write '1' to clear) */ +#define TWI_ERRORSRC_DNACK_Pos (2UL) /*!< Position of DNACK field. */ +#define TWI_ERRORSRC_DNACK_Msk (0x1UL << TWI_ERRORSRC_DNACK_Pos) /*!< Bit mask of DNACK field. */ +#define TWI_ERRORSRC_DNACK_NotPresent (0UL) /*!< Read: error not present */ +#define TWI_ERRORSRC_DNACK_Present (1UL) /*!< Read: error present */ +#define TWI_ERRORSRC_DNACK_Clear (1UL) /*!< Write: clear error on writing '1' */ + +/* Bit 1 : NACK received after sending the address (write '1' to clear) */ +#define TWI_ERRORSRC_ANACK_Pos (1UL) /*!< Position of ANACK field. */ +#define TWI_ERRORSRC_ANACK_Msk (0x1UL << TWI_ERRORSRC_ANACK_Pos) /*!< Bit mask of ANACK field. */ +#define TWI_ERRORSRC_ANACK_NotPresent (0UL) /*!< Read: error not present */ +#define TWI_ERRORSRC_ANACK_Present (1UL) /*!< Read: error present */ +#define TWI_ERRORSRC_ANACK_Clear (1UL) /*!< Write: clear error on writing '1' */ + +/* Bit 0 : Overrun error */ +#define TWI_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */ +#define TWI_ERRORSRC_OVERRUN_Msk (0x1UL << TWI_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ +#define TWI_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: no overrun occured */ +#define TWI_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: overrun occured */ +#define TWI_ERRORSRC_OVERRUN_Clear (1UL) /*!< Write: clear error on writing '1' */ + +/* Register: TWI_ENABLE */ +/* Description: Enable TWI */ + +/* Bits 3..0 : Enable or disable TWI */ +#define TWI_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define TWI_ENABLE_ENABLE_Msk (0xFUL << TWI_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define TWI_ENABLE_ENABLE_Disabled (0UL) /*!< Disable TWI */ +#define TWI_ENABLE_ENABLE_Enabled (5UL) /*!< Enable TWI */ + +/* Register: TWI_PSELSCL */ +/* Description: Pin select for SCL */ + +/* Bits 31..0 : Pin number configuration for TWI SCL signal */ +#define TWI_PSELSCL_PSELSCL_Pos (0UL) /*!< Position of PSELSCL field. */ +#define TWI_PSELSCL_PSELSCL_Msk (0xFFFFFFFFUL << TWI_PSELSCL_PSELSCL_Pos) /*!< Bit mask of PSELSCL field. */ +#define TWI_PSELSCL_PSELSCL_Disconnected (0xFFFFFFFFUL) /*!< Disconnect */ + +/* Register: TWI_PSELSDA */ +/* Description: Pin select for SDA */ + +/* Bits 31..0 : Pin number configuration for TWI SDA signal */ +#define TWI_PSELSDA_PSELSDA_Pos (0UL) /*!< Position of PSELSDA field. */ +#define TWI_PSELSDA_PSELSDA_Msk (0xFFFFFFFFUL << TWI_PSELSDA_PSELSDA_Pos) /*!< Bit mask of PSELSDA field. */ +#define TWI_PSELSDA_PSELSDA_Disconnected (0xFFFFFFFFUL) /*!< Disconnect */ + +/* Register: TWI_RXD */ +/* Description: RXD register */ + +/* Bits 7..0 : RXD register */ +#define TWI_RXD_RXD_Pos (0UL) /*!< Position of RXD field. */ +#define TWI_RXD_RXD_Msk (0xFFUL << TWI_RXD_RXD_Pos) /*!< Bit mask of RXD field. */ + +/* Register: TWI_TXD */ +/* Description: TXD register */ + +/* Bits 7..0 : TXD register */ +#define TWI_TXD_TXD_Pos (0UL) /*!< Position of TXD field. */ +#define TWI_TXD_TXD_Msk (0xFFUL << TWI_TXD_TXD_Pos) /*!< Bit mask of TXD field. */ + +/* Register: TWI_FREQUENCY */ +/* Description: TWI frequency */ + +/* Bits 31..0 : TWI master clock frequency */ +#define TWI_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ +#define TWI_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << TWI_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ +#define TWI_FREQUENCY_FREQUENCY_K100 (0x01980000UL) /*!< 100 kbps */ +#define TWI_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */ +#define TWI_FREQUENCY_FREQUENCY_K400 (0x06680000UL) /*!< 400 kbps (actual rate 410.256 kbps) */ + +/* Register: TWI_ADDRESS */ +/* Description: Address used in the TWI transfer */ + +/* Bits 6..0 : Address used in the TWI transfer */ +#define TWI_ADDRESS_ADDRESS_Pos (0UL) /*!< Position of ADDRESS field. */ +#define TWI_ADDRESS_ADDRESS_Msk (0x7FUL << TWI_ADDRESS_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ + + +/* Peripheral: TWIM */ +/* Description: I2C compatible Two-Wire Master Interface with EasyDMA 0 */ + +/* Register: TWIM_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 12 : Shortcut between LASTRX event and STOP task */ +#define TWIM_SHORTS_LASTRX_STOP_Pos (12UL) /*!< Position of LASTRX_STOP field. */ +#define TWIM_SHORTS_LASTRX_STOP_Msk (0x1UL << TWIM_SHORTS_LASTRX_STOP_Pos) /*!< Bit mask of LASTRX_STOP field. */ +#define TWIM_SHORTS_LASTRX_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TWIM_SHORTS_LASTRX_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 10 : Shortcut between LASTRX event and STARTTX task */ +#define TWIM_SHORTS_LASTRX_STARTTX_Pos (10UL) /*!< Position of LASTRX_STARTTX field. */ +#define TWIM_SHORTS_LASTRX_STARTTX_Msk (0x1UL << TWIM_SHORTS_LASTRX_STARTTX_Pos) /*!< Bit mask of LASTRX_STARTTX field. */ +#define TWIM_SHORTS_LASTRX_STARTTX_Disabled (0UL) /*!< Disable shortcut */ +#define TWIM_SHORTS_LASTRX_STARTTX_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 9 : Shortcut between LASTTX event and STOP task */ +#define TWIM_SHORTS_LASTTX_STOP_Pos (9UL) /*!< Position of LASTTX_STOP field. */ +#define TWIM_SHORTS_LASTTX_STOP_Msk (0x1UL << TWIM_SHORTS_LASTTX_STOP_Pos) /*!< Bit mask of LASTTX_STOP field. */ +#define TWIM_SHORTS_LASTTX_STOP_Disabled (0UL) /*!< Disable shortcut */ +#define TWIM_SHORTS_LASTTX_STOP_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 8 : Shortcut between LASTTX event and SUSPEND task */ +#define TWIM_SHORTS_LASTTX_SUSPEND_Pos (8UL) /*!< Position of LASTTX_SUSPEND field. */ +#define TWIM_SHORTS_LASTTX_SUSPEND_Msk (0x1UL << TWIM_SHORTS_LASTTX_SUSPEND_Pos) /*!< Bit mask of LASTTX_SUSPEND field. */ +#define TWIM_SHORTS_LASTTX_SUSPEND_Disabled (0UL) /*!< Disable shortcut */ +#define TWIM_SHORTS_LASTTX_SUSPEND_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 7 : Shortcut between LASTTX event and STARTRX task */ +#define TWIM_SHORTS_LASTTX_STARTRX_Pos (7UL) /*!< Position of LASTTX_STARTRX field. */ +#define TWIM_SHORTS_LASTTX_STARTRX_Msk (0x1UL << TWIM_SHORTS_LASTTX_STARTRX_Pos) /*!< Bit mask of LASTTX_STARTRX field. */ +#define TWIM_SHORTS_LASTTX_STARTRX_Disabled (0UL) /*!< Disable shortcut */ +#define TWIM_SHORTS_LASTTX_STARTRX_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: TWIM_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 24 : Enable or disable interrupt for LASTTX event */ +#define TWIM_INTEN_LASTTX_Pos (24UL) /*!< Position of LASTTX field. */ +#define TWIM_INTEN_LASTTX_Msk (0x1UL << TWIM_INTEN_LASTTX_Pos) /*!< Bit mask of LASTTX field. */ +#define TWIM_INTEN_LASTTX_Disabled (0UL) /*!< Disable */ +#define TWIM_INTEN_LASTTX_Enabled (1UL) /*!< Enable */ + +/* Bit 23 : Enable or disable interrupt for LASTRX event */ +#define TWIM_INTEN_LASTRX_Pos (23UL) /*!< Position of LASTRX field. */ +#define TWIM_INTEN_LASTRX_Msk (0x1UL << TWIM_INTEN_LASTRX_Pos) /*!< Bit mask of LASTRX field. */ +#define TWIM_INTEN_LASTRX_Disabled (0UL) /*!< Disable */ +#define TWIM_INTEN_LASTRX_Enabled (1UL) /*!< Enable */ + +/* Bit 20 : Enable or disable interrupt for TXSTARTED event */ +#define TWIM_INTEN_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define TWIM_INTEN_TXSTARTED_Msk (0x1UL << TWIM_INTEN_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define TWIM_INTEN_TXSTARTED_Disabled (0UL) /*!< Disable */ +#define TWIM_INTEN_TXSTARTED_Enabled (1UL) /*!< Enable */ + +/* Bit 19 : Enable or disable interrupt for RXSTARTED event */ +#define TWIM_INTEN_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define TWIM_INTEN_RXSTARTED_Msk (0x1UL << TWIM_INTEN_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define TWIM_INTEN_RXSTARTED_Disabled (0UL) /*!< Disable */ +#define TWIM_INTEN_RXSTARTED_Enabled (1UL) /*!< Enable */ + +/* Bit 18 : Enable or disable interrupt for SUSPENDED event */ +#define TWIM_INTEN_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ +#define TWIM_INTEN_SUSPENDED_Msk (0x1UL << TWIM_INTEN_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ +#define TWIM_INTEN_SUSPENDED_Disabled (0UL) /*!< Disable */ +#define TWIM_INTEN_SUSPENDED_Enabled (1UL) /*!< Enable */ + +/* Bit 9 : Enable or disable interrupt for ERROR event */ +#define TWIM_INTEN_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define TWIM_INTEN_ERROR_Msk (0x1UL << TWIM_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define TWIM_INTEN_ERROR_Disabled (0UL) /*!< Disable */ +#define TWIM_INTEN_ERROR_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for STOPPED event */ +#define TWIM_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define TWIM_INTEN_STOPPED_Msk (0x1UL << TWIM_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define TWIM_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ +#define TWIM_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ + +/* Register: TWIM_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 24 : Write '1' to Enable interrupt for LASTTX event */ +#define TWIM_INTENSET_LASTTX_Pos (24UL) /*!< Position of LASTTX field. */ +#define TWIM_INTENSET_LASTTX_Msk (0x1UL << TWIM_INTENSET_LASTTX_Pos) /*!< Bit mask of LASTTX field. */ +#define TWIM_INTENSET_LASTTX_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENSET_LASTTX_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENSET_LASTTX_Set (1UL) /*!< Enable */ + +/* Bit 23 : Write '1' to Enable interrupt for LASTRX event */ +#define TWIM_INTENSET_LASTRX_Pos (23UL) /*!< Position of LASTRX field. */ +#define TWIM_INTENSET_LASTRX_Msk (0x1UL << TWIM_INTENSET_LASTRX_Pos) /*!< Bit mask of LASTRX field. */ +#define TWIM_INTENSET_LASTRX_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENSET_LASTRX_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENSET_LASTRX_Set (1UL) /*!< Enable */ + +/* Bit 20 : Write '1' to Enable interrupt for TXSTARTED event */ +#define TWIM_INTENSET_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define TWIM_INTENSET_TXSTARTED_Msk (0x1UL << TWIM_INTENSET_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define TWIM_INTENSET_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENSET_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENSET_TXSTARTED_Set (1UL) /*!< Enable */ + +/* Bit 19 : Write '1' to Enable interrupt for RXSTARTED event */ +#define TWIM_INTENSET_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define TWIM_INTENSET_RXSTARTED_Msk (0x1UL << TWIM_INTENSET_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define TWIM_INTENSET_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENSET_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENSET_RXSTARTED_Set (1UL) /*!< Enable */ + +/* Bit 18 : Write '1' to Enable interrupt for SUSPENDED event */ +#define TWIM_INTENSET_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ +#define TWIM_INTENSET_SUSPENDED_Msk (0x1UL << TWIM_INTENSET_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ +#define TWIM_INTENSET_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENSET_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENSET_SUSPENDED_Set (1UL) /*!< Enable */ + +/* Bit 9 : Write '1' to Enable interrupt for ERROR event */ +#define TWIM_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define TWIM_INTENSET_ERROR_Msk (0x1UL << TWIM_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define TWIM_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENSET_ERROR_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for STOPPED event */ +#define TWIM_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define TWIM_INTENSET_STOPPED_Msk (0x1UL << TWIM_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define TWIM_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Register: TWIM_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 24 : Write '1' to Disable interrupt for LASTTX event */ +#define TWIM_INTENCLR_LASTTX_Pos (24UL) /*!< Position of LASTTX field. */ +#define TWIM_INTENCLR_LASTTX_Msk (0x1UL << TWIM_INTENCLR_LASTTX_Pos) /*!< Bit mask of LASTTX field. */ +#define TWIM_INTENCLR_LASTTX_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENCLR_LASTTX_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENCLR_LASTTX_Clear (1UL) /*!< Disable */ + +/* Bit 23 : Write '1' to Disable interrupt for LASTRX event */ +#define TWIM_INTENCLR_LASTRX_Pos (23UL) /*!< Position of LASTRX field. */ +#define TWIM_INTENCLR_LASTRX_Msk (0x1UL << TWIM_INTENCLR_LASTRX_Pos) /*!< Bit mask of LASTRX field. */ +#define TWIM_INTENCLR_LASTRX_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENCLR_LASTRX_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENCLR_LASTRX_Clear (1UL) /*!< Disable */ + +/* Bit 20 : Write '1' to Disable interrupt for TXSTARTED event */ +#define TWIM_INTENCLR_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define TWIM_INTENCLR_TXSTARTED_Msk (0x1UL << TWIM_INTENCLR_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define TWIM_INTENCLR_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENCLR_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENCLR_TXSTARTED_Clear (1UL) /*!< Disable */ + +/* Bit 19 : Write '1' to Disable interrupt for RXSTARTED event */ +#define TWIM_INTENCLR_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define TWIM_INTENCLR_RXSTARTED_Msk (0x1UL << TWIM_INTENCLR_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define TWIM_INTENCLR_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENCLR_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENCLR_RXSTARTED_Clear (1UL) /*!< Disable */ + +/* Bit 18 : Write '1' to Disable interrupt for SUSPENDED event */ +#define TWIM_INTENCLR_SUSPENDED_Pos (18UL) /*!< Position of SUSPENDED field. */ +#define TWIM_INTENCLR_SUSPENDED_Msk (0x1UL << TWIM_INTENCLR_SUSPENDED_Pos) /*!< Bit mask of SUSPENDED field. */ +#define TWIM_INTENCLR_SUSPENDED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENCLR_SUSPENDED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENCLR_SUSPENDED_Clear (1UL) /*!< Disable */ + +/* Bit 9 : Write '1' to Disable interrupt for ERROR event */ +#define TWIM_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define TWIM_INTENCLR_ERROR_Msk (0x1UL << TWIM_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define TWIM_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for STOPPED event */ +#define TWIM_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define TWIM_INTENCLR_STOPPED_Msk (0x1UL << TWIM_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define TWIM_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIM_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIM_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Register: TWIM_ERRORSRC */ +/* Description: Error source */ + +/* Bit 2 : NACK received after sending a data byte (write '1' to clear) */ +#define TWIM_ERRORSRC_DNACK_Pos (2UL) /*!< Position of DNACK field. */ +#define TWIM_ERRORSRC_DNACK_Msk (0x1UL << TWIM_ERRORSRC_DNACK_Pos) /*!< Bit mask of DNACK field. */ +#define TWIM_ERRORSRC_DNACK_NotReceived (0UL) /*!< Error did not occur */ +#define TWIM_ERRORSRC_DNACK_Received (1UL) /*!< Error occurred */ + +/* Bit 1 : NACK received after sending the address (write '1' to clear) */ +#define TWIM_ERRORSRC_ANACK_Pos (1UL) /*!< Position of ANACK field. */ +#define TWIM_ERRORSRC_ANACK_Msk (0x1UL << TWIM_ERRORSRC_ANACK_Pos) /*!< Bit mask of ANACK field. */ +#define TWIM_ERRORSRC_ANACK_NotReceived (0UL) /*!< Error did not occur */ +#define TWIM_ERRORSRC_ANACK_Received (1UL) /*!< Error occurred */ + +/* Bit 0 : Overrun error */ +#define TWIM_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */ +#define TWIM_ERRORSRC_OVERRUN_Msk (0x1UL << TWIM_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ +#define TWIM_ERRORSRC_OVERRUN_NotReceived (0UL) /*!< Error did not occur */ +#define TWIM_ERRORSRC_OVERRUN_Received (1UL) /*!< Error occurred */ + +/* Register: TWIM_ENABLE */ +/* Description: Enable TWIM */ + +/* Bits 3..0 : Enable or disable TWIM */ +#define TWIM_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define TWIM_ENABLE_ENABLE_Msk (0xFUL << TWIM_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define TWIM_ENABLE_ENABLE_Disabled (0UL) /*!< Disable TWIM */ +#define TWIM_ENABLE_ENABLE_Enabled (6UL) /*!< Enable TWIM */ + +/* Register: TWIM_PSEL_SCL */ +/* Description: Pin select for SCL signal */ + +/* Bit 31 : Connection */ +#define TWIM_PSEL_SCL_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define TWIM_PSEL_SCL_CONNECT_Msk (0x1UL << TWIM_PSEL_SCL_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define TWIM_PSEL_SCL_CONNECT_Connected (0UL) /*!< Connect */ +#define TWIM_PSEL_SCL_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define TWIM_PSEL_SCL_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define TWIM_PSEL_SCL_PIN_Msk (0x1FUL << TWIM_PSEL_SCL_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: TWIM_PSEL_SDA */ +/* Description: Pin select for SDA signal */ + +/* Bit 31 : Connection */ +#define TWIM_PSEL_SDA_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define TWIM_PSEL_SDA_CONNECT_Msk (0x1UL << TWIM_PSEL_SDA_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define TWIM_PSEL_SDA_CONNECT_Connected (0UL) /*!< Connect */ +#define TWIM_PSEL_SDA_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define TWIM_PSEL_SDA_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define TWIM_PSEL_SDA_PIN_Msk (0x1FUL << TWIM_PSEL_SDA_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: TWIM_FREQUENCY */ +/* Description: TWI frequency */ + +/* Bits 31..0 : TWI master clock frequency */ +#define TWIM_FREQUENCY_FREQUENCY_Pos (0UL) /*!< Position of FREQUENCY field. */ +#define TWIM_FREQUENCY_FREQUENCY_Msk (0xFFFFFFFFUL << TWIM_FREQUENCY_FREQUENCY_Pos) /*!< Bit mask of FREQUENCY field. */ +#define TWIM_FREQUENCY_FREQUENCY_K100 (0x01980000UL) /*!< 100 kbps */ +#define TWIM_FREQUENCY_FREQUENCY_K250 (0x04000000UL) /*!< 250 kbps */ +#define TWIM_FREQUENCY_FREQUENCY_K400 (0x06400000UL) /*!< 400 kbps */ + +/* Register: TWIM_RXD_PTR */ +/* Description: Data pointer */ + +/* Bits 31..0 : Data pointer */ +#define TWIM_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define TWIM_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIM_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: TWIM_RXD_MAXCNT */ +/* Description: Maximum number of bytes in receive buffer */ + +/* Bits 7..0 : Maximum number of bytes in receive buffer */ +#define TWIM_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define TWIM_RXD_MAXCNT_MAXCNT_Msk (0xFFUL << TWIM_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: TWIM_RXD_AMOUNT */ +/* Description: Number of bytes transferred in the last transaction */ + +/* Bits 7..0 : Number of bytes transferred in the last transaction. In case of NACK error, includes the NACK'ed byte. */ +#define TWIM_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define TWIM_RXD_AMOUNT_AMOUNT_Msk (0xFFUL << TWIM_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: TWIM_RXD_LIST */ +/* Description: EasyDMA list type */ + +/* Bits 2..0 : List type */ +#define TWIM_RXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */ +#define TWIM_RXD_LIST_LIST_Msk (0x7UL << TWIM_RXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */ +#define TWIM_RXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */ +#define TWIM_RXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */ + +/* Register: TWIM_TXD_PTR */ +/* Description: Data pointer */ + +/* Bits 31..0 : Data pointer */ +#define TWIM_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define TWIM_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIM_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: TWIM_TXD_MAXCNT */ +/* Description: Maximum number of bytes in transmit buffer */ + +/* Bits 7..0 : Maximum number of bytes in transmit buffer */ +#define TWIM_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define TWIM_TXD_MAXCNT_MAXCNT_Msk (0xFFUL << TWIM_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: TWIM_TXD_AMOUNT */ +/* Description: Number of bytes transferred in the last transaction */ + +/* Bits 7..0 : Number of bytes transferred in the last transaction. In case of NACK error, includes the NACK'ed byte. */ +#define TWIM_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define TWIM_TXD_AMOUNT_AMOUNT_Msk (0xFFUL << TWIM_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: TWIM_TXD_LIST */ +/* Description: EasyDMA list type */ + +/* Bits 2..0 : List type */ +#define TWIM_TXD_LIST_LIST_Pos (0UL) /*!< Position of LIST field. */ +#define TWIM_TXD_LIST_LIST_Msk (0x7UL << TWIM_TXD_LIST_LIST_Pos) /*!< Bit mask of LIST field. */ +#define TWIM_TXD_LIST_LIST_Disabled (0UL) /*!< Disable EasyDMA list */ +#define TWIM_TXD_LIST_LIST_ArrayList (1UL) /*!< Use array list */ + +/* Register: TWIM_ADDRESS */ +/* Description: Address used in the TWI transfer */ + +/* Bits 6..0 : Address used in the TWI transfer */ +#define TWIM_ADDRESS_ADDRESS_Pos (0UL) /*!< Position of ADDRESS field. */ +#define TWIM_ADDRESS_ADDRESS_Msk (0x7FUL << TWIM_ADDRESS_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ + + +/* Peripheral: TWIS */ +/* Description: I2C compatible Two-Wire Slave Interface with EasyDMA 0 */ + +/* Register: TWIS_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 14 : Shortcut between READ event and SUSPEND task */ +#define TWIS_SHORTS_READ_SUSPEND_Pos (14UL) /*!< Position of READ_SUSPEND field. */ +#define TWIS_SHORTS_READ_SUSPEND_Msk (0x1UL << TWIS_SHORTS_READ_SUSPEND_Pos) /*!< Bit mask of READ_SUSPEND field. */ +#define TWIS_SHORTS_READ_SUSPEND_Disabled (0UL) /*!< Disable shortcut */ +#define TWIS_SHORTS_READ_SUSPEND_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 13 : Shortcut between WRITE event and SUSPEND task */ +#define TWIS_SHORTS_WRITE_SUSPEND_Pos (13UL) /*!< Position of WRITE_SUSPEND field. */ +#define TWIS_SHORTS_WRITE_SUSPEND_Msk (0x1UL << TWIS_SHORTS_WRITE_SUSPEND_Pos) /*!< Bit mask of WRITE_SUSPEND field. */ +#define TWIS_SHORTS_WRITE_SUSPEND_Disabled (0UL) /*!< Disable shortcut */ +#define TWIS_SHORTS_WRITE_SUSPEND_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: TWIS_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 26 : Enable or disable interrupt for READ event */ +#define TWIS_INTEN_READ_Pos (26UL) /*!< Position of READ field. */ +#define TWIS_INTEN_READ_Msk (0x1UL << TWIS_INTEN_READ_Pos) /*!< Bit mask of READ field. */ +#define TWIS_INTEN_READ_Disabled (0UL) /*!< Disable */ +#define TWIS_INTEN_READ_Enabled (1UL) /*!< Enable */ + +/* Bit 25 : Enable or disable interrupt for WRITE event */ +#define TWIS_INTEN_WRITE_Pos (25UL) /*!< Position of WRITE field. */ +#define TWIS_INTEN_WRITE_Msk (0x1UL << TWIS_INTEN_WRITE_Pos) /*!< Bit mask of WRITE field. */ +#define TWIS_INTEN_WRITE_Disabled (0UL) /*!< Disable */ +#define TWIS_INTEN_WRITE_Enabled (1UL) /*!< Enable */ + +/* Bit 20 : Enable or disable interrupt for TXSTARTED event */ +#define TWIS_INTEN_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define TWIS_INTEN_TXSTARTED_Msk (0x1UL << TWIS_INTEN_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define TWIS_INTEN_TXSTARTED_Disabled (0UL) /*!< Disable */ +#define TWIS_INTEN_TXSTARTED_Enabled (1UL) /*!< Enable */ + +/* Bit 19 : Enable or disable interrupt for RXSTARTED event */ +#define TWIS_INTEN_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define TWIS_INTEN_RXSTARTED_Msk (0x1UL << TWIS_INTEN_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define TWIS_INTEN_RXSTARTED_Disabled (0UL) /*!< Disable */ +#define TWIS_INTEN_RXSTARTED_Enabled (1UL) /*!< Enable */ + +/* Bit 9 : Enable or disable interrupt for ERROR event */ +#define TWIS_INTEN_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define TWIS_INTEN_ERROR_Msk (0x1UL << TWIS_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define TWIS_INTEN_ERROR_Disabled (0UL) /*!< Disable */ +#define TWIS_INTEN_ERROR_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for STOPPED event */ +#define TWIS_INTEN_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define TWIS_INTEN_STOPPED_Msk (0x1UL << TWIS_INTEN_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define TWIS_INTEN_STOPPED_Disabled (0UL) /*!< Disable */ +#define TWIS_INTEN_STOPPED_Enabled (1UL) /*!< Enable */ + +/* Register: TWIS_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 26 : Write '1' to Enable interrupt for READ event */ +#define TWIS_INTENSET_READ_Pos (26UL) /*!< Position of READ field. */ +#define TWIS_INTENSET_READ_Msk (0x1UL << TWIS_INTENSET_READ_Pos) /*!< Bit mask of READ field. */ +#define TWIS_INTENSET_READ_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENSET_READ_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENSET_READ_Set (1UL) /*!< Enable */ + +/* Bit 25 : Write '1' to Enable interrupt for WRITE event */ +#define TWIS_INTENSET_WRITE_Pos (25UL) /*!< Position of WRITE field. */ +#define TWIS_INTENSET_WRITE_Msk (0x1UL << TWIS_INTENSET_WRITE_Pos) /*!< Bit mask of WRITE field. */ +#define TWIS_INTENSET_WRITE_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENSET_WRITE_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENSET_WRITE_Set (1UL) /*!< Enable */ + +/* Bit 20 : Write '1' to Enable interrupt for TXSTARTED event */ +#define TWIS_INTENSET_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define TWIS_INTENSET_TXSTARTED_Msk (0x1UL << TWIS_INTENSET_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define TWIS_INTENSET_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENSET_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENSET_TXSTARTED_Set (1UL) /*!< Enable */ + +/* Bit 19 : Write '1' to Enable interrupt for RXSTARTED event */ +#define TWIS_INTENSET_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define TWIS_INTENSET_RXSTARTED_Msk (0x1UL << TWIS_INTENSET_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define TWIS_INTENSET_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENSET_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENSET_RXSTARTED_Set (1UL) /*!< Enable */ + +/* Bit 9 : Write '1' to Enable interrupt for ERROR event */ +#define TWIS_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define TWIS_INTENSET_ERROR_Msk (0x1UL << TWIS_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define TWIS_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENSET_ERROR_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for STOPPED event */ +#define TWIS_INTENSET_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define TWIS_INTENSET_STOPPED_Msk (0x1UL << TWIS_INTENSET_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define TWIS_INTENSET_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENSET_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENSET_STOPPED_Set (1UL) /*!< Enable */ + +/* Register: TWIS_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 26 : Write '1' to Disable interrupt for READ event */ +#define TWIS_INTENCLR_READ_Pos (26UL) /*!< Position of READ field. */ +#define TWIS_INTENCLR_READ_Msk (0x1UL << TWIS_INTENCLR_READ_Pos) /*!< Bit mask of READ field. */ +#define TWIS_INTENCLR_READ_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENCLR_READ_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENCLR_READ_Clear (1UL) /*!< Disable */ + +/* Bit 25 : Write '1' to Disable interrupt for WRITE event */ +#define TWIS_INTENCLR_WRITE_Pos (25UL) /*!< Position of WRITE field. */ +#define TWIS_INTENCLR_WRITE_Msk (0x1UL << TWIS_INTENCLR_WRITE_Pos) /*!< Bit mask of WRITE field. */ +#define TWIS_INTENCLR_WRITE_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENCLR_WRITE_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENCLR_WRITE_Clear (1UL) /*!< Disable */ + +/* Bit 20 : Write '1' to Disable interrupt for TXSTARTED event */ +#define TWIS_INTENCLR_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define TWIS_INTENCLR_TXSTARTED_Msk (0x1UL << TWIS_INTENCLR_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define TWIS_INTENCLR_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENCLR_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENCLR_TXSTARTED_Clear (1UL) /*!< Disable */ + +/* Bit 19 : Write '1' to Disable interrupt for RXSTARTED event */ +#define TWIS_INTENCLR_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define TWIS_INTENCLR_RXSTARTED_Msk (0x1UL << TWIS_INTENCLR_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define TWIS_INTENCLR_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENCLR_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENCLR_RXSTARTED_Clear (1UL) /*!< Disable */ + +/* Bit 9 : Write '1' to Disable interrupt for ERROR event */ +#define TWIS_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define TWIS_INTENCLR_ERROR_Msk (0x1UL << TWIS_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define TWIS_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for STOPPED event */ +#define TWIS_INTENCLR_STOPPED_Pos (1UL) /*!< Position of STOPPED field. */ +#define TWIS_INTENCLR_STOPPED_Msk (0x1UL << TWIS_INTENCLR_STOPPED_Pos) /*!< Bit mask of STOPPED field. */ +#define TWIS_INTENCLR_STOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define TWIS_INTENCLR_STOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define TWIS_INTENCLR_STOPPED_Clear (1UL) /*!< Disable */ + +/* Register: TWIS_ERRORSRC */ +/* Description: Error source */ + +/* Bit 3 : TX buffer over-read detected, and prevented */ +#define TWIS_ERRORSRC_OVERREAD_Pos (3UL) /*!< Position of OVERREAD field. */ +#define TWIS_ERRORSRC_OVERREAD_Msk (0x1UL << TWIS_ERRORSRC_OVERREAD_Pos) /*!< Bit mask of OVERREAD field. */ +#define TWIS_ERRORSRC_OVERREAD_NotDetected (0UL) /*!< Error did not occur */ +#define TWIS_ERRORSRC_OVERREAD_Detected (1UL) /*!< Error occurred */ + +/* Bit 2 : NACK sent after receiving a data byte */ +#define TWIS_ERRORSRC_DNACK_Pos (2UL) /*!< Position of DNACK field. */ +#define TWIS_ERRORSRC_DNACK_Msk (0x1UL << TWIS_ERRORSRC_DNACK_Pos) /*!< Bit mask of DNACK field. */ +#define TWIS_ERRORSRC_DNACK_NotReceived (0UL) /*!< Error did not occur */ +#define TWIS_ERRORSRC_DNACK_Received (1UL) /*!< Error occurred */ + +/* Bit 0 : RX buffer overflow detected, and prevented */ +#define TWIS_ERRORSRC_OVERFLOW_Pos (0UL) /*!< Position of OVERFLOW field. */ +#define TWIS_ERRORSRC_OVERFLOW_Msk (0x1UL << TWIS_ERRORSRC_OVERFLOW_Pos) /*!< Bit mask of OVERFLOW field. */ +#define TWIS_ERRORSRC_OVERFLOW_NotDetected (0UL) /*!< Error did not occur */ +#define TWIS_ERRORSRC_OVERFLOW_Detected (1UL) /*!< Error occurred */ + +/* Register: TWIS_MATCH */ +/* Description: Status register indicating which address had a match */ + +/* Bit 0 : Which of the addresses in {ADDRESS} matched the incoming address */ +#define TWIS_MATCH_MATCH_Pos (0UL) /*!< Position of MATCH field. */ +#define TWIS_MATCH_MATCH_Msk (0x1UL << TWIS_MATCH_MATCH_Pos) /*!< Bit mask of MATCH field. */ + +/* Register: TWIS_ENABLE */ +/* Description: Enable TWIS */ + +/* Bits 3..0 : Enable or disable TWIS */ +#define TWIS_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define TWIS_ENABLE_ENABLE_Msk (0xFUL << TWIS_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define TWIS_ENABLE_ENABLE_Disabled (0UL) /*!< Disable TWIS */ +#define TWIS_ENABLE_ENABLE_Enabled (9UL) /*!< Enable TWIS */ + +/* Register: TWIS_PSEL_SCL */ +/* Description: Pin select for SCL signal */ + +/* Bit 31 : Connection */ +#define TWIS_PSEL_SCL_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define TWIS_PSEL_SCL_CONNECT_Msk (0x1UL << TWIS_PSEL_SCL_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define TWIS_PSEL_SCL_CONNECT_Connected (0UL) /*!< Connect */ +#define TWIS_PSEL_SCL_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define TWIS_PSEL_SCL_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define TWIS_PSEL_SCL_PIN_Msk (0x1FUL << TWIS_PSEL_SCL_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: TWIS_PSEL_SDA */ +/* Description: Pin select for SDA signal */ + +/* Bit 31 : Connection */ +#define TWIS_PSEL_SDA_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define TWIS_PSEL_SDA_CONNECT_Msk (0x1UL << TWIS_PSEL_SDA_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define TWIS_PSEL_SDA_CONNECT_Connected (0UL) /*!< Connect */ +#define TWIS_PSEL_SDA_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define TWIS_PSEL_SDA_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define TWIS_PSEL_SDA_PIN_Msk (0x1FUL << TWIS_PSEL_SDA_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: TWIS_RXD_PTR */ +/* Description: RXD Data pointer */ + +/* Bits 31..0 : RXD Data pointer */ +#define TWIS_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define TWIS_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIS_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: TWIS_RXD_MAXCNT */ +/* Description: Maximum number of bytes in RXD buffer */ + +/* Bits 7..0 : Maximum number of bytes in RXD buffer */ +#define TWIS_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define TWIS_RXD_MAXCNT_MAXCNT_Msk (0xFFUL << TWIS_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: TWIS_RXD_AMOUNT */ +/* Description: Number of bytes transferred in the last RXD transaction */ + +/* Bits 7..0 : Number of bytes transferred in the last RXD transaction */ +#define TWIS_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define TWIS_RXD_AMOUNT_AMOUNT_Msk (0xFFUL << TWIS_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: TWIS_TXD_PTR */ +/* Description: TXD Data pointer */ + +/* Bits 31..0 : TXD Data pointer */ +#define TWIS_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define TWIS_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << TWIS_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: TWIS_TXD_MAXCNT */ +/* Description: Maximum number of bytes in TXD buffer */ + +/* Bits 7..0 : Maximum number of bytes in TXD buffer */ +#define TWIS_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define TWIS_TXD_MAXCNT_MAXCNT_Msk (0xFFUL << TWIS_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: TWIS_TXD_AMOUNT */ +/* Description: Number of bytes transferred in the last TXD transaction */ + +/* Bits 7..0 : Number of bytes transferred in the last TXD transaction */ +#define TWIS_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define TWIS_TXD_AMOUNT_AMOUNT_Msk (0xFFUL << TWIS_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: TWIS_ADDRESS */ +/* Description: Description collection[0]: TWI slave address 0 */ + +/* Bits 6..0 : TWI slave address */ +#define TWIS_ADDRESS_ADDRESS_Pos (0UL) /*!< Position of ADDRESS field. */ +#define TWIS_ADDRESS_ADDRESS_Msk (0x7FUL << TWIS_ADDRESS_ADDRESS_Pos) /*!< Bit mask of ADDRESS field. */ + +/* Register: TWIS_CONFIG */ +/* Description: Configuration register for the address match mechanism */ + +/* Bit 1 : Enable or disable address matching on ADDRESS[1] */ +#define TWIS_CONFIG_ADDRESS1_Pos (1UL) /*!< Position of ADDRESS1 field. */ +#define TWIS_CONFIG_ADDRESS1_Msk (0x1UL << TWIS_CONFIG_ADDRESS1_Pos) /*!< Bit mask of ADDRESS1 field. */ +#define TWIS_CONFIG_ADDRESS1_Disabled (0UL) /*!< Disabled */ +#define TWIS_CONFIG_ADDRESS1_Enabled (1UL) /*!< Enabled */ + +/* Bit 0 : Enable or disable address matching on ADDRESS[0] */ +#define TWIS_CONFIG_ADDRESS0_Pos (0UL) /*!< Position of ADDRESS0 field. */ +#define TWIS_CONFIG_ADDRESS0_Msk (0x1UL << TWIS_CONFIG_ADDRESS0_Pos) /*!< Bit mask of ADDRESS0 field. */ +#define TWIS_CONFIG_ADDRESS0_Disabled (0UL) /*!< Disabled */ +#define TWIS_CONFIG_ADDRESS0_Enabled (1UL) /*!< Enabled */ + +/* Register: TWIS_ORC */ +/* Description: Over-read character. Character sent out in case of an over-read of the transmit buffer. */ + +/* Bits 7..0 : Over-read character. Character sent out in case of an over-read of the transmit buffer. */ +#define TWIS_ORC_ORC_Pos (0UL) /*!< Position of ORC field. */ +#define TWIS_ORC_ORC_Msk (0xFFUL << TWIS_ORC_ORC_Pos) /*!< Bit mask of ORC field. */ + + +/* Peripheral: UART */ +/* Description: Universal Asynchronous Receiver/Transmitter */ + +/* Register: UART_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 4 : Shortcut between NCTS event and STOPRX task */ +#define UART_SHORTS_NCTS_STOPRX_Pos (4UL) /*!< Position of NCTS_STOPRX field. */ +#define UART_SHORTS_NCTS_STOPRX_Msk (0x1UL << UART_SHORTS_NCTS_STOPRX_Pos) /*!< Bit mask of NCTS_STOPRX field. */ +#define UART_SHORTS_NCTS_STOPRX_Disabled (0UL) /*!< Disable shortcut */ +#define UART_SHORTS_NCTS_STOPRX_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 3 : Shortcut between CTS event and STARTRX task */ +#define UART_SHORTS_CTS_STARTRX_Pos (3UL) /*!< Position of CTS_STARTRX field. */ +#define UART_SHORTS_CTS_STARTRX_Msk (0x1UL << UART_SHORTS_CTS_STARTRX_Pos) /*!< Bit mask of CTS_STARTRX field. */ +#define UART_SHORTS_CTS_STARTRX_Disabled (0UL) /*!< Disable shortcut */ +#define UART_SHORTS_CTS_STARTRX_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: UART_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 17 : Write '1' to Enable interrupt for RXTO event */ +#define UART_INTENSET_RXTO_Pos (17UL) /*!< Position of RXTO field. */ +#define UART_INTENSET_RXTO_Msk (0x1UL << UART_INTENSET_RXTO_Pos) /*!< Bit mask of RXTO field. */ +#define UART_INTENSET_RXTO_Disabled (0UL) /*!< Read: Disabled */ +#define UART_INTENSET_RXTO_Enabled (1UL) /*!< Read: Enabled */ +#define UART_INTENSET_RXTO_Set (1UL) /*!< Enable */ + +/* Bit 9 : Write '1' to Enable interrupt for ERROR event */ +#define UART_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define UART_INTENSET_ERROR_Msk (0x1UL << UART_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define UART_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define UART_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define UART_INTENSET_ERROR_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to Enable interrupt for TXDRDY event */ +#define UART_INTENSET_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ +#define UART_INTENSET_TXDRDY_Msk (0x1UL << UART_INTENSET_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ +#define UART_INTENSET_TXDRDY_Disabled (0UL) /*!< Read: Disabled */ +#define UART_INTENSET_TXDRDY_Enabled (1UL) /*!< Read: Enabled */ +#define UART_INTENSET_TXDRDY_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable interrupt for RXDRDY event */ +#define UART_INTENSET_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ +#define UART_INTENSET_RXDRDY_Msk (0x1UL << UART_INTENSET_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ +#define UART_INTENSET_RXDRDY_Disabled (0UL) /*!< Read: Disabled */ +#define UART_INTENSET_RXDRDY_Enabled (1UL) /*!< Read: Enabled */ +#define UART_INTENSET_RXDRDY_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for NCTS event */ +#define UART_INTENSET_NCTS_Pos (1UL) /*!< Position of NCTS field. */ +#define UART_INTENSET_NCTS_Msk (0x1UL << UART_INTENSET_NCTS_Pos) /*!< Bit mask of NCTS field. */ +#define UART_INTENSET_NCTS_Disabled (0UL) /*!< Read: Disabled */ +#define UART_INTENSET_NCTS_Enabled (1UL) /*!< Read: Enabled */ +#define UART_INTENSET_NCTS_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for CTS event */ +#define UART_INTENSET_CTS_Pos (0UL) /*!< Position of CTS field. */ +#define UART_INTENSET_CTS_Msk (0x1UL << UART_INTENSET_CTS_Pos) /*!< Bit mask of CTS field. */ +#define UART_INTENSET_CTS_Disabled (0UL) /*!< Read: Disabled */ +#define UART_INTENSET_CTS_Enabled (1UL) /*!< Read: Enabled */ +#define UART_INTENSET_CTS_Set (1UL) /*!< Enable */ + +/* Register: UART_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 17 : Write '1' to Disable interrupt for RXTO event */ +#define UART_INTENCLR_RXTO_Pos (17UL) /*!< Position of RXTO field. */ +#define UART_INTENCLR_RXTO_Msk (0x1UL << UART_INTENCLR_RXTO_Pos) /*!< Bit mask of RXTO field. */ +#define UART_INTENCLR_RXTO_Disabled (0UL) /*!< Read: Disabled */ +#define UART_INTENCLR_RXTO_Enabled (1UL) /*!< Read: Enabled */ +#define UART_INTENCLR_RXTO_Clear (1UL) /*!< Disable */ + +/* Bit 9 : Write '1' to Disable interrupt for ERROR event */ +#define UART_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define UART_INTENCLR_ERROR_Msk (0x1UL << UART_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define UART_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define UART_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define UART_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to Disable interrupt for TXDRDY event */ +#define UART_INTENCLR_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ +#define UART_INTENCLR_TXDRDY_Msk (0x1UL << UART_INTENCLR_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ +#define UART_INTENCLR_TXDRDY_Disabled (0UL) /*!< Read: Disabled */ +#define UART_INTENCLR_TXDRDY_Enabled (1UL) /*!< Read: Enabled */ +#define UART_INTENCLR_TXDRDY_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable interrupt for RXDRDY event */ +#define UART_INTENCLR_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ +#define UART_INTENCLR_RXDRDY_Msk (0x1UL << UART_INTENCLR_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ +#define UART_INTENCLR_RXDRDY_Disabled (0UL) /*!< Read: Disabled */ +#define UART_INTENCLR_RXDRDY_Enabled (1UL) /*!< Read: Enabled */ +#define UART_INTENCLR_RXDRDY_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for NCTS event */ +#define UART_INTENCLR_NCTS_Pos (1UL) /*!< Position of NCTS field. */ +#define UART_INTENCLR_NCTS_Msk (0x1UL << UART_INTENCLR_NCTS_Pos) /*!< Bit mask of NCTS field. */ +#define UART_INTENCLR_NCTS_Disabled (0UL) /*!< Read: Disabled */ +#define UART_INTENCLR_NCTS_Enabled (1UL) /*!< Read: Enabled */ +#define UART_INTENCLR_NCTS_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for CTS event */ +#define UART_INTENCLR_CTS_Pos (0UL) /*!< Position of CTS field. */ +#define UART_INTENCLR_CTS_Msk (0x1UL << UART_INTENCLR_CTS_Pos) /*!< Bit mask of CTS field. */ +#define UART_INTENCLR_CTS_Disabled (0UL) /*!< Read: Disabled */ +#define UART_INTENCLR_CTS_Enabled (1UL) /*!< Read: Enabled */ +#define UART_INTENCLR_CTS_Clear (1UL) /*!< Disable */ + +/* Register: UART_ERRORSRC */ +/* Description: Error source */ + +/* Bit 3 : Break condition */ +#define UART_ERRORSRC_BREAK_Pos (3UL) /*!< Position of BREAK field. */ +#define UART_ERRORSRC_BREAK_Msk (0x1UL << UART_ERRORSRC_BREAK_Pos) /*!< Bit mask of BREAK field. */ +#define UART_ERRORSRC_BREAK_NotPresent (0UL) /*!< Read: error not present */ +#define UART_ERRORSRC_BREAK_Present (1UL) /*!< Read: error present */ + +/* Bit 2 : Framing error occurred */ +#define UART_ERRORSRC_FRAMING_Pos (2UL) /*!< Position of FRAMING field. */ +#define UART_ERRORSRC_FRAMING_Msk (0x1UL << UART_ERRORSRC_FRAMING_Pos) /*!< Bit mask of FRAMING field. */ +#define UART_ERRORSRC_FRAMING_NotPresent (0UL) /*!< Read: error not present */ +#define UART_ERRORSRC_FRAMING_Present (1UL) /*!< Read: error present */ + +/* Bit 1 : Parity error */ +#define UART_ERRORSRC_PARITY_Pos (1UL) /*!< Position of PARITY field. */ +#define UART_ERRORSRC_PARITY_Msk (0x1UL << UART_ERRORSRC_PARITY_Pos) /*!< Bit mask of PARITY field. */ +#define UART_ERRORSRC_PARITY_NotPresent (0UL) /*!< Read: error not present */ +#define UART_ERRORSRC_PARITY_Present (1UL) /*!< Read: error present */ + +/* Bit 0 : Overrun error */ +#define UART_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */ +#define UART_ERRORSRC_OVERRUN_Msk (0x1UL << UART_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ +#define UART_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: error not present */ +#define UART_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: error present */ + +/* Register: UART_ENABLE */ +/* Description: Enable UART */ + +/* Bits 3..0 : Enable or disable UART */ +#define UART_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define UART_ENABLE_ENABLE_Msk (0xFUL << UART_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define UART_ENABLE_ENABLE_Disabled (0UL) /*!< Disable UART */ +#define UART_ENABLE_ENABLE_Enabled (4UL) /*!< Enable UART */ + +/* Register: UART_PSELRTS */ +/* Description: Pin select for RTS */ + +/* Bits 31..0 : Pin number configuration for UART RTS signal */ +#define UART_PSELRTS_PSELRTS_Pos (0UL) /*!< Position of PSELRTS field. */ +#define UART_PSELRTS_PSELRTS_Msk (0xFFFFFFFFUL << UART_PSELRTS_PSELRTS_Pos) /*!< Bit mask of PSELRTS field. */ +#define UART_PSELRTS_PSELRTS_Disconnected (0xFFFFFFFFUL) /*!< Disconnect */ + +/* Register: UART_PSELTXD */ +/* Description: Pin select for TXD */ + +/* Bits 31..0 : Pin number configuration for UART TXD signal */ +#define UART_PSELTXD_PSELTXD_Pos (0UL) /*!< Position of PSELTXD field. */ +#define UART_PSELTXD_PSELTXD_Msk (0xFFFFFFFFUL << UART_PSELTXD_PSELTXD_Pos) /*!< Bit mask of PSELTXD field. */ +#define UART_PSELTXD_PSELTXD_Disconnected (0xFFFFFFFFUL) /*!< Disconnect */ + +/* Register: UART_PSELCTS */ +/* Description: Pin select for CTS */ + +/* Bits 31..0 : Pin number configuration for UART CTS signal */ +#define UART_PSELCTS_PSELCTS_Pos (0UL) /*!< Position of PSELCTS field. */ +#define UART_PSELCTS_PSELCTS_Msk (0xFFFFFFFFUL << UART_PSELCTS_PSELCTS_Pos) /*!< Bit mask of PSELCTS field. */ +#define UART_PSELCTS_PSELCTS_Disconnected (0xFFFFFFFFUL) /*!< Disconnect */ + +/* Register: UART_PSELRXD */ +/* Description: Pin select for RXD */ + +/* Bits 31..0 : Pin number configuration for UART RXD signal */ +#define UART_PSELRXD_PSELRXD_Pos (0UL) /*!< Position of PSELRXD field. */ +#define UART_PSELRXD_PSELRXD_Msk (0xFFFFFFFFUL << UART_PSELRXD_PSELRXD_Pos) /*!< Bit mask of PSELRXD field. */ +#define UART_PSELRXD_PSELRXD_Disconnected (0xFFFFFFFFUL) /*!< Disconnect */ + +/* Register: UART_RXD */ +/* Description: RXD register */ + +/* Bits 7..0 : RX data received in previous transfers, double buffered */ +#define UART_RXD_RXD_Pos (0UL) /*!< Position of RXD field. */ +#define UART_RXD_RXD_Msk (0xFFUL << UART_RXD_RXD_Pos) /*!< Bit mask of RXD field. */ + +/* Register: UART_TXD */ +/* Description: TXD register */ + +/* Bits 7..0 : TX data to be transferred */ +#define UART_TXD_TXD_Pos (0UL) /*!< Position of TXD field. */ +#define UART_TXD_TXD_Msk (0xFFUL << UART_TXD_TXD_Pos) /*!< Bit mask of TXD field. */ + +/* Register: UART_BAUDRATE */ +/* Description: Baud rate */ + +/* Bits 31..0 : Baud rate */ +#define UART_BAUDRATE_BAUDRATE_Pos (0UL) /*!< Position of BAUDRATE field. */ +#define UART_BAUDRATE_BAUDRATE_Msk (0xFFFFFFFFUL << UART_BAUDRATE_BAUDRATE_Pos) /*!< Bit mask of BAUDRATE field. */ +#define UART_BAUDRATE_BAUDRATE_Baud1200 (0x0004F000UL) /*!< 1200 baud (actual rate: 1205) */ +#define UART_BAUDRATE_BAUDRATE_Baud2400 (0x0009D000UL) /*!< 2400 baud (actual rate: 2396) */ +#define UART_BAUDRATE_BAUDRATE_Baud4800 (0x0013B000UL) /*!< 4800 baud (actual rate: 4808) */ +#define UART_BAUDRATE_BAUDRATE_Baud9600 (0x00275000UL) /*!< 9600 baud (actual rate: 9598) */ +#define UART_BAUDRATE_BAUDRATE_Baud14400 (0x003B0000UL) /*!< 14400 baud (actual rate: 14414) */ +#define UART_BAUDRATE_BAUDRATE_Baud19200 (0x004EA000UL) /*!< 19200 baud (actual rate: 19208) */ +#define UART_BAUDRATE_BAUDRATE_Baud28800 (0x0075F000UL) /*!< 28800 baud (actual rate: 28829) */ +#define UART_BAUDRATE_BAUDRATE_Baud31250 (0x00800000UL) /*!< 31250 baud */ +#define UART_BAUDRATE_BAUDRATE_Baud38400 (0x009D5000UL) /*!< 38400 baud (actual rate: 38462) */ +#define UART_BAUDRATE_BAUDRATE_Baud56000 (0x00E50000UL) /*!< 56000 baud (actual rate: 55944) */ +#define UART_BAUDRATE_BAUDRATE_Baud57600 (0x00EBF000UL) /*!< 57600 baud (actual rate: 57762) */ +#define UART_BAUDRATE_BAUDRATE_Baud76800 (0x013A9000UL) /*!< 76800 baud (actual rate: 76923) */ +#define UART_BAUDRATE_BAUDRATE_Baud115200 (0x01D7E000UL) /*!< 115200 baud (actual rate: 115942) */ +#define UART_BAUDRATE_BAUDRATE_Baud230400 (0x03AFB000UL) /*!< 230400 baud (actual rate: 231884) */ +#define UART_BAUDRATE_BAUDRATE_Baud250000 (0x04000000UL) /*!< 250000 baud */ +#define UART_BAUDRATE_BAUDRATE_Baud460800 (0x075F7000UL) /*!< 460800 baud (actual rate: 470588) */ +#define UART_BAUDRATE_BAUDRATE_Baud921600 (0x0EBED000UL) /*!< 921600 baud (actual rate: 941176) */ +#define UART_BAUDRATE_BAUDRATE_Baud1M (0x10000000UL) /*!< 1Mega baud */ + +/* Register: UART_CONFIG */ +/* Description: Configuration of parity and hardware flow control */ + +/* Bits 3..1 : Parity */ +#define UART_CONFIG_PARITY_Pos (1UL) /*!< Position of PARITY field. */ +#define UART_CONFIG_PARITY_Msk (0x7UL << UART_CONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */ +#define UART_CONFIG_PARITY_Excluded (0x0UL) /*!< Exclude parity bit */ +#define UART_CONFIG_PARITY_Included (0x7UL) /*!< Include parity bit */ + +/* Bit 0 : Hardware flow control */ +#define UART_CONFIG_HWFC_Pos (0UL) /*!< Position of HWFC field. */ +#define UART_CONFIG_HWFC_Msk (0x1UL << UART_CONFIG_HWFC_Pos) /*!< Bit mask of HWFC field. */ +#define UART_CONFIG_HWFC_Disabled (0UL) /*!< Disabled */ +#define UART_CONFIG_HWFC_Enabled (1UL) /*!< Enabled */ + + +/* Peripheral: UARTE */ +/* Description: UART with EasyDMA */ + +/* Register: UARTE_SHORTS */ +/* Description: Shortcut register */ + +/* Bit 6 : Shortcut between ENDRX event and STOPRX task */ +#define UARTE_SHORTS_ENDRX_STOPRX_Pos (6UL) /*!< Position of ENDRX_STOPRX field. */ +#define UARTE_SHORTS_ENDRX_STOPRX_Msk (0x1UL << UARTE_SHORTS_ENDRX_STOPRX_Pos) /*!< Bit mask of ENDRX_STOPRX field. */ +#define UARTE_SHORTS_ENDRX_STOPRX_Disabled (0UL) /*!< Disable shortcut */ +#define UARTE_SHORTS_ENDRX_STOPRX_Enabled (1UL) /*!< Enable shortcut */ + +/* Bit 5 : Shortcut between ENDRX event and STARTRX task */ +#define UARTE_SHORTS_ENDRX_STARTRX_Pos (5UL) /*!< Position of ENDRX_STARTRX field. */ +#define UARTE_SHORTS_ENDRX_STARTRX_Msk (0x1UL << UARTE_SHORTS_ENDRX_STARTRX_Pos) /*!< Bit mask of ENDRX_STARTRX field. */ +#define UARTE_SHORTS_ENDRX_STARTRX_Disabled (0UL) /*!< Disable shortcut */ +#define UARTE_SHORTS_ENDRX_STARTRX_Enabled (1UL) /*!< Enable shortcut */ + +/* Register: UARTE_INTEN */ +/* Description: Enable or disable interrupt */ + +/* Bit 22 : Enable or disable interrupt for TXSTOPPED event */ +#define UARTE_INTEN_TXSTOPPED_Pos (22UL) /*!< Position of TXSTOPPED field. */ +#define UARTE_INTEN_TXSTOPPED_Msk (0x1UL << UARTE_INTEN_TXSTOPPED_Pos) /*!< Bit mask of TXSTOPPED field. */ +#define UARTE_INTEN_TXSTOPPED_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_TXSTOPPED_Enabled (1UL) /*!< Enable */ + +/* Bit 20 : Enable or disable interrupt for TXSTARTED event */ +#define UARTE_INTEN_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define UARTE_INTEN_TXSTARTED_Msk (0x1UL << UARTE_INTEN_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define UARTE_INTEN_TXSTARTED_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_TXSTARTED_Enabled (1UL) /*!< Enable */ + +/* Bit 19 : Enable or disable interrupt for RXSTARTED event */ +#define UARTE_INTEN_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define UARTE_INTEN_RXSTARTED_Msk (0x1UL << UARTE_INTEN_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define UARTE_INTEN_RXSTARTED_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_RXSTARTED_Enabled (1UL) /*!< Enable */ + +/* Bit 17 : Enable or disable interrupt for RXTO event */ +#define UARTE_INTEN_RXTO_Pos (17UL) /*!< Position of RXTO field. */ +#define UARTE_INTEN_RXTO_Msk (0x1UL << UARTE_INTEN_RXTO_Pos) /*!< Bit mask of RXTO field. */ +#define UARTE_INTEN_RXTO_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_RXTO_Enabled (1UL) /*!< Enable */ + +/* Bit 9 : Enable or disable interrupt for ERROR event */ +#define UARTE_INTEN_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define UARTE_INTEN_ERROR_Msk (0x1UL << UARTE_INTEN_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define UARTE_INTEN_ERROR_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_ERROR_Enabled (1UL) /*!< Enable */ + +/* Bit 8 : Enable or disable interrupt for ENDTX event */ +#define UARTE_INTEN_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ +#define UARTE_INTEN_ENDTX_Msk (0x1UL << UARTE_INTEN_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ +#define UARTE_INTEN_ENDTX_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_ENDTX_Enabled (1UL) /*!< Enable */ + +/* Bit 7 : Enable or disable interrupt for TXDRDY event */ +#define UARTE_INTEN_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ +#define UARTE_INTEN_TXDRDY_Msk (0x1UL << UARTE_INTEN_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ +#define UARTE_INTEN_TXDRDY_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_TXDRDY_Enabled (1UL) /*!< Enable */ + +/* Bit 4 : Enable or disable interrupt for ENDRX event */ +#define UARTE_INTEN_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ +#define UARTE_INTEN_ENDRX_Msk (0x1UL << UARTE_INTEN_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define UARTE_INTEN_ENDRX_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_ENDRX_Enabled (1UL) /*!< Enable */ + +/* Bit 2 : Enable or disable interrupt for RXDRDY event */ +#define UARTE_INTEN_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ +#define UARTE_INTEN_RXDRDY_Msk (0x1UL << UARTE_INTEN_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ +#define UARTE_INTEN_RXDRDY_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_RXDRDY_Enabled (1UL) /*!< Enable */ + +/* Bit 1 : Enable or disable interrupt for NCTS event */ +#define UARTE_INTEN_NCTS_Pos (1UL) /*!< Position of NCTS field. */ +#define UARTE_INTEN_NCTS_Msk (0x1UL << UARTE_INTEN_NCTS_Pos) /*!< Bit mask of NCTS field. */ +#define UARTE_INTEN_NCTS_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_NCTS_Enabled (1UL) /*!< Enable */ + +/* Bit 0 : Enable or disable interrupt for CTS event */ +#define UARTE_INTEN_CTS_Pos (0UL) /*!< Position of CTS field. */ +#define UARTE_INTEN_CTS_Msk (0x1UL << UARTE_INTEN_CTS_Pos) /*!< Bit mask of CTS field. */ +#define UARTE_INTEN_CTS_Disabled (0UL) /*!< Disable */ +#define UARTE_INTEN_CTS_Enabled (1UL) /*!< Enable */ + +/* Register: UARTE_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 22 : Write '1' to Enable interrupt for TXSTOPPED event */ +#define UARTE_INTENSET_TXSTOPPED_Pos (22UL) /*!< Position of TXSTOPPED field. */ +#define UARTE_INTENSET_TXSTOPPED_Msk (0x1UL << UARTE_INTENSET_TXSTOPPED_Pos) /*!< Bit mask of TXSTOPPED field. */ +#define UARTE_INTENSET_TXSTOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_TXSTOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_TXSTOPPED_Set (1UL) /*!< Enable */ + +/* Bit 20 : Write '1' to Enable interrupt for TXSTARTED event */ +#define UARTE_INTENSET_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define UARTE_INTENSET_TXSTARTED_Msk (0x1UL << UARTE_INTENSET_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define UARTE_INTENSET_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_TXSTARTED_Set (1UL) /*!< Enable */ + +/* Bit 19 : Write '1' to Enable interrupt for RXSTARTED event */ +#define UARTE_INTENSET_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define UARTE_INTENSET_RXSTARTED_Msk (0x1UL << UARTE_INTENSET_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define UARTE_INTENSET_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_RXSTARTED_Set (1UL) /*!< Enable */ + +/* Bit 17 : Write '1' to Enable interrupt for RXTO event */ +#define UARTE_INTENSET_RXTO_Pos (17UL) /*!< Position of RXTO field. */ +#define UARTE_INTENSET_RXTO_Msk (0x1UL << UARTE_INTENSET_RXTO_Pos) /*!< Bit mask of RXTO field. */ +#define UARTE_INTENSET_RXTO_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_RXTO_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_RXTO_Set (1UL) /*!< Enable */ + +/* Bit 9 : Write '1' to Enable interrupt for ERROR event */ +#define UARTE_INTENSET_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define UARTE_INTENSET_ERROR_Msk (0x1UL << UARTE_INTENSET_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define UARTE_INTENSET_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_ERROR_Set (1UL) /*!< Enable */ + +/* Bit 8 : Write '1' to Enable interrupt for ENDTX event */ +#define UARTE_INTENSET_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ +#define UARTE_INTENSET_ENDTX_Msk (0x1UL << UARTE_INTENSET_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ +#define UARTE_INTENSET_ENDTX_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_ENDTX_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_ENDTX_Set (1UL) /*!< Enable */ + +/* Bit 7 : Write '1' to Enable interrupt for TXDRDY event */ +#define UARTE_INTENSET_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ +#define UARTE_INTENSET_TXDRDY_Msk (0x1UL << UARTE_INTENSET_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ +#define UARTE_INTENSET_TXDRDY_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_TXDRDY_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_TXDRDY_Set (1UL) /*!< Enable */ + +/* Bit 4 : Write '1' to Enable interrupt for ENDRX event */ +#define UARTE_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ +#define UARTE_INTENSET_ENDRX_Msk (0x1UL << UARTE_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define UARTE_INTENSET_ENDRX_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_ENDRX_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_ENDRX_Set (1UL) /*!< Enable */ + +/* Bit 2 : Write '1' to Enable interrupt for RXDRDY event */ +#define UARTE_INTENSET_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ +#define UARTE_INTENSET_RXDRDY_Msk (0x1UL << UARTE_INTENSET_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ +#define UARTE_INTENSET_RXDRDY_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_RXDRDY_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_RXDRDY_Set (1UL) /*!< Enable */ + +/* Bit 1 : Write '1' to Enable interrupt for NCTS event */ +#define UARTE_INTENSET_NCTS_Pos (1UL) /*!< Position of NCTS field. */ +#define UARTE_INTENSET_NCTS_Msk (0x1UL << UARTE_INTENSET_NCTS_Pos) /*!< Bit mask of NCTS field. */ +#define UARTE_INTENSET_NCTS_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_NCTS_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_NCTS_Set (1UL) /*!< Enable */ + +/* Bit 0 : Write '1' to Enable interrupt for CTS event */ +#define UARTE_INTENSET_CTS_Pos (0UL) /*!< Position of CTS field. */ +#define UARTE_INTENSET_CTS_Msk (0x1UL << UARTE_INTENSET_CTS_Pos) /*!< Bit mask of CTS field. */ +#define UARTE_INTENSET_CTS_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENSET_CTS_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENSET_CTS_Set (1UL) /*!< Enable */ + +/* Register: UARTE_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 22 : Write '1' to Disable interrupt for TXSTOPPED event */ +#define UARTE_INTENCLR_TXSTOPPED_Pos (22UL) /*!< Position of TXSTOPPED field. */ +#define UARTE_INTENCLR_TXSTOPPED_Msk (0x1UL << UARTE_INTENCLR_TXSTOPPED_Pos) /*!< Bit mask of TXSTOPPED field. */ +#define UARTE_INTENCLR_TXSTOPPED_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_TXSTOPPED_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_TXSTOPPED_Clear (1UL) /*!< Disable */ + +/* Bit 20 : Write '1' to Disable interrupt for TXSTARTED event */ +#define UARTE_INTENCLR_TXSTARTED_Pos (20UL) /*!< Position of TXSTARTED field. */ +#define UARTE_INTENCLR_TXSTARTED_Msk (0x1UL << UARTE_INTENCLR_TXSTARTED_Pos) /*!< Bit mask of TXSTARTED field. */ +#define UARTE_INTENCLR_TXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_TXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_TXSTARTED_Clear (1UL) /*!< Disable */ + +/* Bit 19 : Write '1' to Disable interrupt for RXSTARTED event */ +#define UARTE_INTENCLR_RXSTARTED_Pos (19UL) /*!< Position of RXSTARTED field. */ +#define UARTE_INTENCLR_RXSTARTED_Msk (0x1UL << UARTE_INTENCLR_RXSTARTED_Pos) /*!< Bit mask of RXSTARTED field. */ +#define UARTE_INTENCLR_RXSTARTED_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_RXSTARTED_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_RXSTARTED_Clear (1UL) /*!< Disable */ + +/* Bit 17 : Write '1' to Disable interrupt for RXTO event */ +#define UARTE_INTENCLR_RXTO_Pos (17UL) /*!< Position of RXTO field. */ +#define UARTE_INTENCLR_RXTO_Msk (0x1UL << UARTE_INTENCLR_RXTO_Pos) /*!< Bit mask of RXTO field. */ +#define UARTE_INTENCLR_RXTO_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_RXTO_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_RXTO_Clear (1UL) /*!< Disable */ + +/* Bit 9 : Write '1' to Disable interrupt for ERROR event */ +#define UARTE_INTENCLR_ERROR_Pos (9UL) /*!< Position of ERROR field. */ +#define UARTE_INTENCLR_ERROR_Msk (0x1UL << UARTE_INTENCLR_ERROR_Pos) /*!< Bit mask of ERROR field. */ +#define UARTE_INTENCLR_ERROR_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_ERROR_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_ERROR_Clear (1UL) /*!< Disable */ + +/* Bit 8 : Write '1' to Disable interrupt for ENDTX event */ +#define UARTE_INTENCLR_ENDTX_Pos (8UL) /*!< Position of ENDTX field. */ +#define UARTE_INTENCLR_ENDTX_Msk (0x1UL << UARTE_INTENCLR_ENDTX_Pos) /*!< Bit mask of ENDTX field. */ +#define UARTE_INTENCLR_ENDTX_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_ENDTX_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_ENDTX_Clear (1UL) /*!< Disable */ + +/* Bit 7 : Write '1' to Disable interrupt for TXDRDY event */ +#define UARTE_INTENCLR_TXDRDY_Pos (7UL) /*!< Position of TXDRDY field. */ +#define UARTE_INTENCLR_TXDRDY_Msk (0x1UL << UARTE_INTENCLR_TXDRDY_Pos) /*!< Bit mask of TXDRDY field. */ +#define UARTE_INTENCLR_TXDRDY_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_TXDRDY_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_TXDRDY_Clear (1UL) /*!< Disable */ + +/* Bit 4 : Write '1' to Disable interrupt for ENDRX event */ +#define UARTE_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */ +#define UARTE_INTENCLR_ENDRX_Msk (0x1UL << UARTE_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */ +#define UARTE_INTENCLR_ENDRX_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_ENDRX_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_ENDRX_Clear (1UL) /*!< Disable */ + +/* Bit 2 : Write '1' to Disable interrupt for RXDRDY event */ +#define UARTE_INTENCLR_RXDRDY_Pos (2UL) /*!< Position of RXDRDY field. */ +#define UARTE_INTENCLR_RXDRDY_Msk (0x1UL << UARTE_INTENCLR_RXDRDY_Pos) /*!< Bit mask of RXDRDY field. */ +#define UARTE_INTENCLR_RXDRDY_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_RXDRDY_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_RXDRDY_Clear (1UL) /*!< Disable */ + +/* Bit 1 : Write '1' to Disable interrupt for NCTS event */ +#define UARTE_INTENCLR_NCTS_Pos (1UL) /*!< Position of NCTS field. */ +#define UARTE_INTENCLR_NCTS_Msk (0x1UL << UARTE_INTENCLR_NCTS_Pos) /*!< Bit mask of NCTS field. */ +#define UARTE_INTENCLR_NCTS_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_NCTS_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_NCTS_Clear (1UL) /*!< Disable */ + +/* Bit 0 : Write '1' to Disable interrupt for CTS event */ +#define UARTE_INTENCLR_CTS_Pos (0UL) /*!< Position of CTS field. */ +#define UARTE_INTENCLR_CTS_Msk (0x1UL << UARTE_INTENCLR_CTS_Pos) /*!< Bit mask of CTS field. */ +#define UARTE_INTENCLR_CTS_Disabled (0UL) /*!< Read: Disabled */ +#define UARTE_INTENCLR_CTS_Enabled (1UL) /*!< Read: Enabled */ +#define UARTE_INTENCLR_CTS_Clear (1UL) /*!< Disable */ + +/* Register: UARTE_ERRORSRC */ +/* Description: Error source */ + +/* Bit 3 : Break condition */ +#define UARTE_ERRORSRC_BREAK_Pos (3UL) /*!< Position of BREAK field. */ +#define UARTE_ERRORSRC_BREAK_Msk (0x1UL << UARTE_ERRORSRC_BREAK_Pos) /*!< Bit mask of BREAK field. */ +#define UARTE_ERRORSRC_BREAK_NotPresent (0UL) /*!< Read: error not present */ +#define UARTE_ERRORSRC_BREAK_Present (1UL) /*!< Read: error present */ + +/* Bit 2 : Framing error occurred */ +#define UARTE_ERRORSRC_FRAMING_Pos (2UL) /*!< Position of FRAMING field. */ +#define UARTE_ERRORSRC_FRAMING_Msk (0x1UL << UARTE_ERRORSRC_FRAMING_Pos) /*!< Bit mask of FRAMING field. */ +#define UARTE_ERRORSRC_FRAMING_NotPresent (0UL) /*!< Read: error not present */ +#define UARTE_ERRORSRC_FRAMING_Present (1UL) /*!< Read: error present */ + +/* Bit 1 : Parity error */ +#define UARTE_ERRORSRC_PARITY_Pos (1UL) /*!< Position of PARITY field. */ +#define UARTE_ERRORSRC_PARITY_Msk (0x1UL << UARTE_ERRORSRC_PARITY_Pos) /*!< Bit mask of PARITY field. */ +#define UARTE_ERRORSRC_PARITY_NotPresent (0UL) /*!< Read: error not present */ +#define UARTE_ERRORSRC_PARITY_Present (1UL) /*!< Read: error present */ + +/* Bit 0 : Overrun error */ +#define UARTE_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */ +#define UARTE_ERRORSRC_OVERRUN_Msk (0x1UL << UARTE_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ +#define UARTE_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: error not present */ +#define UARTE_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: error present */ + +/* Register: UARTE_ENABLE */ +/* Description: Enable UART */ + +/* Bits 3..0 : Enable or disable UARTE */ +#define UARTE_ENABLE_ENABLE_Pos (0UL) /*!< Position of ENABLE field. */ +#define UARTE_ENABLE_ENABLE_Msk (0xFUL << UARTE_ENABLE_ENABLE_Pos) /*!< Bit mask of ENABLE field. */ +#define UARTE_ENABLE_ENABLE_Disabled (0UL) /*!< Disable UARTE */ +#define UARTE_ENABLE_ENABLE_Enabled (8UL) /*!< Enable UARTE */ + +/* Register: UARTE_PSEL_RTS */ +/* Description: Pin select for RTS signal */ + +/* Bit 31 : Connection */ +#define UARTE_PSEL_RTS_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define UARTE_PSEL_RTS_CONNECT_Msk (0x1UL << UARTE_PSEL_RTS_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define UARTE_PSEL_RTS_CONNECT_Connected (0UL) /*!< Connect */ +#define UARTE_PSEL_RTS_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define UARTE_PSEL_RTS_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define UARTE_PSEL_RTS_PIN_Msk (0x1FUL << UARTE_PSEL_RTS_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: UARTE_PSEL_TXD */ +/* Description: Pin select for TXD signal */ + +/* Bit 31 : Connection */ +#define UARTE_PSEL_TXD_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define UARTE_PSEL_TXD_CONNECT_Msk (0x1UL << UARTE_PSEL_TXD_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define UARTE_PSEL_TXD_CONNECT_Connected (0UL) /*!< Connect */ +#define UARTE_PSEL_TXD_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define UARTE_PSEL_TXD_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define UARTE_PSEL_TXD_PIN_Msk (0x1FUL << UARTE_PSEL_TXD_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: UARTE_PSEL_CTS */ +/* Description: Pin select for CTS signal */ + +/* Bit 31 : Connection */ +#define UARTE_PSEL_CTS_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define UARTE_PSEL_CTS_CONNECT_Msk (0x1UL << UARTE_PSEL_CTS_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define UARTE_PSEL_CTS_CONNECT_Connected (0UL) /*!< Connect */ +#define UARTE_PSEL_CTS_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define UARTE_PSEL_CTS_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define UARTE_PSEL_CTS_PIN_Msk (0x1FUL << UARTE_PSEL_CTS_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: UARTE_PSEL_RXD */ +/* Description: Pin select for RXD signal */ + +/* Bit 31 : Connection */ +#define UARTE_PSEL_RXD_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define UARTE_PSEL_RXD_CONNECT_Msk (0x1UL << UARTE_PSEL_RXD_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define UARTE_PSEL_RXD_CONNECT_Connected (0UL) /*!< Connect */ +#define UARTE_PSEL_RXD_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 4..0 : Pin number */ +#define UARTE_PSEL_RXD_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define UARTE_PSEL_RXD_PIN_Msk (0x1FUL << UARTE_PSEL_RXD_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: UARTE_BAUDRATE */ +/* Description: Baud rate. Accuracy depends on the HFCLK source selected. */ + +/* Bits 31..0 : Baud rate */ +#define UARTE_BAUDRATE_BAUDRATE_Pos (0UL) /*!< Position of BAUDRATE field. */ +#define UARTE_BAUDRATE_BAUDRATE_Msk (0xFFFFFFFFUL << UARTE_BAUDRATE_BAUDRATE_Pos) /*!< Bit mask of BAUDRATE field. */ +#define UARTE_BAUDRATE_BAUDRATE_Baud1200 (0x0004F000UL) /*!< 1200 baud (actual rate: 1205) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud2400 (0x0009D000UL) /*!< 2400 baud (actual rate: 2396) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud4800 (0x0013B000UL) /*!< 4800 baud (actual rate: 4808) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud9600 (0x00275000UL) /*!< 9600 baud (actual rate: 9598) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud14400 (0x003AF000UL) /*!< 14400 baud (actual rate: 14401) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud19200 (0x004EA000UL) /*!< 19200 baud (actual rate: 19208) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud28800 (0x0075C000UL) /*!< 28800 baud (actual rate: 28777) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud31250 (0x00800000UL) /*!< 31250 baud */ +#define UARTE_BAUDRATE_BAUDRATE_Baud38400 (0x009D0000UL) /*!< 38400 baud (actual rate: 38369) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud56000 (0x00E50000UL) /*!< 56000 baud (actual rate: 55944) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud57600 (0x00EB0000UL) /*!< 57600 baud (actual rate: 57554) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud76800 (0x013A9000UL) /*!< 76800 baud (actual rate: 76923) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud115200 (0x01D60000UL) /*!< 115200 baud (actual rate: 115108) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud230400 (0x03B00000UL) /*!< 230400 baud (actual rate: 231884) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud250000 (0x04000000UL) /*!< 250000 baud */ +#define UARTE_BAUDRATE_BAUDRATE_Baud460800 (0x07400000UL) /*!< 460800 baud (actual rate: 457143) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud921600 (0x0F000000UL) /*!< 921600 baud (actual rate: 941176) */ +#define UARTE_BAUDRATE_BAUDRATE_Baud1M (0x10000000UL) /*!< 1Mega baud */ + +/* Register: UARTE_RXD_PTR */ +/* Description: Data pointer */ + +/* Bits 31..0 : Data pointer */ +#define UARTE_RXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define UARTE_RXD_PTR_PTR_Msk (0xFFFFFFFFUL << UARTE_RXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: UARTE_RXD_MAXCNT */ +/* Description: Maximum number of bytes in receive buffer */ + +/* Bits 7..0 : Maximum number of bytes in receive buffer */ +#define UARTE_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define UARTE_RXD_MAXCNT_MAXCNT_Msk (0xFFUL << UARTE_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: UARTE_RXD_AMOUNT */ +/* Description: Number of bytes transferred in the last transaction */ + +/* Bits 7..0 : Number of bytes transferred in the last transaction */ +#define UARTE_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define UARTE_RXD_AMOUNT_AMOUNT_Msk (0xFFUL << UARTE_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: UARTE_TXD_PTR */ +/* Description: Data pointer */ + +/* Bits 31..0 : Data pointer */ +#define UARTE_TXD_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */ +#define UARTE_TXD_PTR_PTR_Msk (0xFFFFFFFFUL << UARTE_TXD_PTR_PTR_Pos) /*!< Bit mask of PTR field. */ + +/* Register: UARTE_TXD_MAXCNT */ +/* Description: Maximum number of bytes in transmit buffer */ + +/* Bits 7..0 : Maximum number of bytes in transmit buffer */ +#define UARTE_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */ +#define UARTE_TXD_MAXCNT_MAXCNT_Msk (0xFFUL << UARTE_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */ + +/* Register: UARTE_TXD_AMOUNT */ +/* Description: Number of bytes transferred in the last transaction */ + +/* Bits 7..0 : Number of bytes transferred in the last transaction */ +#define UARTE_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */ +#define UARTE_TXD_AMOUNT_AMOUNT_Msk (0xFFUL << UARTE_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */ + +/* Register: UARTE_CONFIG */ +/* Description: Configuration of parity and hardware flow control */ + +/* Bits 3..1 : Parity */ +#define UARTE_CONFIG_PARITY_Pos (1UL) /*!< Position of PARITY field. */ +#define UARTE_CONFIG_PARITY_Msk (0x7UL << UARTE_CONFIG_PARITY_Pos) /*!< Bit mask of PARITY field. */ +#define UARTE_CONFIG_PARITY_Excluded (0x0UL) /*!< Exclude parity bit */ +#define UARTE_CONFIG_PARITY_Included (0x7UL) /*!< Include parity bit */ + +/* Bit 0 : Hardware flow control */ +#define UARTE_CONFIG_HWFC_Pos (0UL) /*!< Position of HWFC field. */ +#define UARTE_CONFIG_HWFC_Msk (0x1UL << UARTE_CONFIG_HWFC_Pos) /*!< Bit mask of HWFC field. */ +#define UARTE_CONFIG_HWFC_Disabled (0UL) /*!< Disabled */ +#define UARTE_CONFIG_HWFC_Enabled (1UL) /*!< Enabled */ + + +/* Peripheral: UICR */ +/* Description: User Information Configuration Registers */ + +/* Register: UICR_NRFFW */ +/* Description: Description collection[0]: Reserved for Nordic firmware design */ + +/* Bits 31..0 : Reserved for Nordic firmware design */ +#define UICR_NRFFW_NRFFW_Pos (0UL) /*!< Position of NRFFW field. */ +#define UICR_NRFFW_NRFFW_Msk (0xFFFFFFFFUL << UICR_NRFFW_NRFFW_Pos) /*!< Bit mask of NRFFW field. */ + +/* Register: UICR_NRFHW */ +/* Description: Description collection[0]: Reserved for Nordic hardware design */ + +/* Bits 31..0 : Reserved for Nordic hardware design */ +#define UICR_NRFHW_NRFHW_Pos (0UL) /*!< Position of NRFHW field. */ +#define UICR_NRFHW_NRFHW_Msk (0xFFFFFFFFUL << UICR_NRFHW_NRFHW_Pos) /*!< Bit mask of NRFHW field. */ + +/* Register: UICR_CUSTOMER */ +/* Description: Description collection[0]: Reserved for customer */ + +/* Bits 31..0 : Reserved for customer */ +#define UICR_CUSTOMER_CUSTOMER_Pos (0UL) /*!< Position of CUSTOMER field. */ +#define UICR_CUSTOMER_CUSTOMER_Msk (0xFFFFFFFFUL << UICR_CUSTOMER_CUSTOMER_Pos) /*!< Bit mask of CUSTOMER field. */ + +/* Register: UICR_PSELRESET */ +/* Description: Description collection[0]: Mapping of the nRESET function (see POWER chapter for details) */ + +/* Bit 31 : Connection */ +#define UICR_PSELRESET_CONNECT_Pos (31UL) /*!< Position of CONNECT field. */ +#define UICR_PSELRESET_CONNECT_Msk (0x1UL << UICR_PSELRESET_CONNECT_Pos) /*!< Bit mask of CONNECT field. */ +#define UICR_PSELRESET_CONNECT_Connected (0UL) /*!< Connect */ +#define UICR_PSELRESET_CONNECT_Disconnected (1UL) /*!< Disconnect */ + +/* Bits 5..0 : GPIO number P0.n onto which Reset is exposed */ +#define UICR_PSELRESET_PIN_Pos (0UL) /*!< Position of PIN field. */ +#define UICR_PSELRESET_PIN_Msk (0x3FUL << UICR_PSELRESET_PIN_Pos) /*!< Bit mask of PIN field. */ + +/* Register: UICR_APPROTECT */ +/* Description: Access Port protection */ + +/* Bits 7..0 : Enable or disable Access Port protection. Any other value than 0xFF being written to this field will enable protection. */ +#define UICR_APPROTECT_PALL_Pos (0UL) /*!< Position of PALL field. */ +#define UICR_APPROTECT_PALL_Msk (0xFFUL << UICR_APPROTECT_PALL_Pos) /*!< Bit mask of PALL field. */ +#define UICR_APPROTECT_PALL_Enabled (0x00UL) /*!< Enable */ +#define UICR_APPROTECT_PALL_Disabled (0xFFUL) /*!< Disable */ + +/* Register: UICR_NFCPINS */ +/* Description: Setting of pins dedicated to NFC functionality: NFC antenna or GPIO */ + +/* Bit 0 : Setting of pins dedicated to NFC functionality */ +#define UICR_NFCPINS_PROTECT_Pos (0UL) /*!< Position of PROTECT field. */ +#define UICR_NFCPINS_PROTECT_Msk (0x1UL << UICR_NFCPINS_PROTECT_Pos) /*!< Bit mask of PROTECT field. */ +#define UICR_NFCPINS_PROTECT_Disabled (0UL) /*!< Operation as GPIO pins. Same protection as normal GPIO pins */ +#define UICR_NFCPINS_PROTECT_NFC (1UL) /*!< Operation as NFC antenna pins. Configures the protection for NFC operation */ + + +/* Peripheral: WDT */ +/* Description: Watchdog Timer */ + +/* Register: WDT_INTENSET */ +/* Description: Enable interrupt */ + +/* Bit 0 : Write '1' to Enable interrupt for TIMEOUT event */ +#define WDT_INTENSET_TIMEOUT_Pos (0UL) /*!< Position of TIMEOUT field. */ +#define WDT_INTENSET_TIMEOUT_Msk (0x1UL << WDT_INTENSET_TIMEOUT_Pos) /*!< Bit mask of TIMEOUT field. */ +#define WDT_INTENSET_TIMEOUT_Disabled (0UL) /*!< Read: Disabled */ +#define WDT_INTENSET_TIMEOUT_Enabled (1UL) /*!< Read: Enabled */ +#define WDT_INTENSET_TIMEOUT_Set (1UL) /*!< Enable */ + +/* Register: WDT_INTENCLR */ +/* Description: Disable interrupt */ + +/* Bit 0 : Write '1' to Disable interrupt for TIMEOUT event */ +#define WDT_INTENCLR_TIMEOUT_Pos (0UL) /*!< Position of TIMEOUT field. */ +#define WDT_INTENCLR_TIMEOUT_Msk (0x1UL << WDT_INTENCLR_TIMEOUT_Pos) /*!< Bit mask of TIMEOUT field. */ +#define WDT_INTENCLR_TIMEOUT_Disabled (0UL) /*!< Read: Disabled */ +#define WDT_INTENCLR_TIMEOUT_Enabled (1UL) /*!< Read: Enabled */ +#define WDT_INTENCLR_TIMEOUT_Clear (1UL) /*!< Disable */ + +/* Register: WDT_RUNSTATUS */ +/* Description: Run status */ + +/* Bit 0 : Indicates whether or not the watchdog is running */ +#define WDT_RUNSTATUS_RUNSTATUS_Pos (0UL) /*!< Position of RUNSTATUS field. */ +#define WDT_RUNSTATUS_RUNSTATUS_Msk (0x1UL << WDT_RUNSTATUS_RUNSTATUS_Pos) /*!< Bit mask of RUNSTATUS field. */ +#define WDT_RUNSTATUS_RUNSTATUS_NotRunning (0UL) /*!< Watchdog not running */ +#define WDT_RUNSTATUS_RUNSTATUS_Running (1UL) /*!< Watchdog is running */ + +/* Register: WDT_REQSTATUS */ +/* Description: Request status */ + +/* Bit 7 : Request status for RR[7] register */ +#define WDT_REQSTATUS_RR7_Pos (7UL) /*!< Position of RR7 field. */ +#define WDT_REQSTATUS_RR7_Msk (0x1UL << WDT_REQSTATUS_RR7_Pos) /*!< Bit mask of RR7 field. */ +#define WDT_REQSTATUS_RR7_DisabledOrRequested (0UL) /*!< RR[7] register is not enabled, or are already requesting reload */ +#define WDT_REQSTATUS_RR7_EnabledAndUnrequested (1UL) /*!< RR[7] register is enabled, and are not yet requesting reload */ + +/* Bit 6 : Request status for RR[6] register */ +#define WDT_REQSTATUS_RR6_Pos (6UL) /*!< Position of RR6 field. */ +#define WDT_REQSTATUS_RR6_Msk (0x1UL << WDT_REQSTATUS_RR6_Pos) /*!< Bit mask of RR6 field. */ +#define WDT_REQSTATUS_RR6_DisabledOrRequested (0UL) /*!< RR[6] register is not enabled, or are already requesting reload */ +#define WDT_REQSTATUS_RR6_EnabledAndUnrequested (1UL) /*!< RR[6] register is enabled, and are not yet requesting reload */ + +/* Bit 5 : Request status for RR[5] register */ +#define WDT_REQSTATUS_RR5_Pos (5UL) /*!< Position of RR5 field. */ +#define WDT_REQSTATUS_RR5_Msk (0x1UL << WDT_REQSTATUS_RR5_Pos) /*!< Bit mask of RR5 field. */ +#define WDT_REQSTATUS_RR5_DisabledOrRequested (0UL) /*!< RR[5] register is not enabled, or are already requesting reload */ +#define WDT_REQSTATUS_RR5_EnabledAndUnrequested (1UL) /*!< RR[5] register is enabled, and are not yet requesting reload */ + +/* Bit 4 : Request status for RR[4] register */ +#define WDT_REQSTATUS_RR4_Pos (4UL) /*!< Position of RR4 field. */ +#define WDT_REQSTATUS_RR4_Msk (0x1UL << WDT_REQSTATUS_RR4_Pos) /*!< Bit mask of RR4 field. */ +#define WDT_REQSTATUS_RR4_DisabledOrRequested (0UL) /*!< RR[4] register is not enabled, or are already requesting reload */ +#define WDT_REQSTATUS_RR4_EnabledAndUnrequested (1UL) /*!< RR[4] register is enabled, and are not yet requesting reload */ + +/* Bit 3 : Request status for RR[3] register */ +#define WDT_REQSTATUS_RR3_Pos (3UL) /*!< Position of RR3 field. */ +#define WDT_REQSTATUS_RR3_Msk (0x1UL << WDT_REQSTATUS_RR3_Pos) /*!< Bit mask of RR3 field. */ +#define WDT_REQSTATUS_RR3_DisabledOrRequested (0UL) /*!< RR[3] register is not enabled, or are already requesting reload */ +#define WDT_REQSTATUS_RR3_EnabledAndUnrequested (1UL) /*!< RR[3] register is enabled, and are not yet requesting reload */ + +/* Bit 2 : Request status for RR[2] register */ +#define WDT_REQSTATUS_RR2_Pos (2UL) /*!< Position of RR2 field. */ +#define WDT_REQSTATUS_RR2_Msk (0x1UL << WDT_REQSTATUS_RR2_Pos) /*!< Bit mask of RR2 field. */ +#define WDT_REQSTATUS_RR2_DisabledOrRequested (0UL) /*!< RR[2] register is not enabled, or are already requesting reload */ +#define WDT_REQSTATUS_RR2_EnabledAndUnrequested (1UL) /*!< RR[2] register is enabled, and are not yet requesting reload */ + +/* Bit 1 : Request status for RR[1] register */ +#define WDT_REQSTATUS_RR1_Pos (1UL) /*!< Position of RR1 field. */ +#define WDT_REQSTATUS_RR1_Msk (0x1UL << WDT_REQSTATUS_RR1_Pos) /*!< Bit mask of RR1 field. */ +#define WDT_REQSTATUS_RR1_DisabledOrRequested (0UL) /*!< RR[1] register is not enabled, or are already requesting reload */ +#define WDT_REQSTATUS_RR1_EnabledAndUnrequested (1UL) /*!< RR[1] register is enabled, and are not yet requesting reload */ + +/* Bit 0 : Request status for RR[0] register */ +#define WDT_REQSTATUS_RR0_Pos (0UL) /*!< Position of RR0 field. */ +#define WDT_REQSTATUS_RR0_Msk (0x1UL << WDT_REQSTATUS_RR0_Pos) /*!< Bit mask of RR0 field. */ +#define WDT_REQSTATUS_RR0_DisabledOrRequested (0UL) /*!< RR[0] register is not enabled, or are already requesting reload */ +#define WDT_REQSTATUS_RR0_EnabledAndUnrequested (1UL) /*!< RR[0] register is enabled, and are not yet requesting reload */ + +/* Register: WDT_CRV */ +/* Description: Counter reload value */ + +/* Bits 31..0 : Counter reload value in number of cycles of the 32.768 kHz clock */ +#define WDT_CRV_CRV_Pos (0UL) /*!< Position of CRV field. */ +#define WDT_CRV_CRV_Msk (0xFFFFFFFFUL << WDT_CRV_CRV_Pos) /*!< Bit mask of CRV field. */ + +/* Register: WDT_RREN */ +/* Description: Enable register for reload request registers */ + +/* Bit 7 : Enable or disable RR[7] register */ +#define WDT_RREN_RR7_Pos (7UL) /*!< Position of RR7 field. */ +#define WDT_RREN_RR7_Msk (0x1UL << WDT_RREN_RR7_Pos) /*!< Bit mask of RR7 field. */ +#define WDT_RREN_RR7_Disabled (0UL) /*!< Disable RR[7] register */ +#define WDT_RREN_RR7_Enabled (1UL) /*!< Enable RR[7] register */ + +/* Bit 6 : Enable or disable RR[6] register */ +#define WDT_RREN_RR6_Pos (6UL) /*!< Position of RR6 field. */ +#define WDT_RREN_RR6_Msk (0x1UL << WDT_RREN_RR6_Pos) /*!< Bit mask of RR6 field. */ +#define WDT_RREN_RR6_Disabled (0UL) /*!< Disable RR[6] register */ +#define WDT_RREN_RR6_Enabled (1UL) /*!< Enable RR[6] register */ + +/* Bit 5 : Enable or disable RR[5] register */ +#define WDT_RREN_RR5_Pos (5UL) /*!< Position of RR5 field. */ +#define WDT_RREN_RR5_Msk (0x1UL << WDT_RREN_RR5_Pos) /*!< Bit mask of RR5 field. */ +#define WDT_RREN_RR5_Disabled (0UL) /*!< Disable RR[5] register */ +#define WDT_RREN_RR5_Enabled (1UL) /*!< Enable RR[5] register */ + +/* Bit 4 : Enable or disable RR[4] register */ +#define WDT_RREN_RR4_Pos (4UL) /*!< Position of RR4 field. */ +#define WDT_RREN_RR4_Msk (0x1UL << WDT_RREN_RR4_Pos) /*!< Bit mask of RR4 field. */ +#define WDT_RREN_RR4_Disabled (0UL) /*!< Disable RR[4] register */ +#define WDT_RREN_RR4_Enabled (1UL) /*!< Enable RR[4] register */ + +/* Bit 3 : Enable or disable RR[3] register */ +#define WDT_RREN_RR3_Pos (3UL) /*!< Position of RR3 field. */ +#define WDT_RREN_RR3_Msk (0x1UL << WDT_RREN_RR3_Pos) /*!< Bit mask of RR3 field. */ +#define WDT_RREN_RR3_Disabled (0UL) /*!< Disable RR[3] register */ +#define WDT_RREN_RR3_Enabled (1UL) /*!< Enable RR[3] register */ + +/* Bit 2 : Enable or disable RR[2] register */ +#define WDT_RREN_RR2_Pos (2UL) /*!< Position of RR2 field. */ +#define WDT_RREN_RR2_Msk (0x1UL << WDT_RREN_RR2_Pos) /*!< Bit mask of RR2 field. */ +#define WDT_RREN_RR2_Disabled (0UL) /*!< Disable RR[2] register */ +#define WDT_RREN_RR2_Enabled (1UL) /*!< Enable RR[2] register */ + +/* Bit 1 : Enable or disable RR[1] register */ +#define WDT_RREN_RR1_Pos (1UL) /*!< Position of RR1 field. */ +#define WDT_RREN_RR1_Msk (0x1UL << WDT_RREN_RR1_Pos) /*!< Bit mask of RR1 field. */ +#define WDT_RREN_RR1_Disabled (0UL) /*!< Disable RR[1] register */ +#define WDT_RREN_RR1_Enabled (1UL) /*!< Enable RR[1] register */ + +/* Bit 0 : Enable or disable RR[0] register */ +#define WDT_RREN_RR0_Pos (0UL) /*!< Position of RR0 field. */ +#define WDT_RREN_RR0_Msk (0x1UL << WDT_RREN_RR0_Pos) /*!< Bit mask of RR0 field. */ +#define WDT_RREN_RR0_Disabled (0UL) /*!< Disable RR[0] register */ +#define WDT_RREN_RR0_Enabled (1UL) /*!< Enable RR[0] register */ + +/* Register: WDT_CONFIG */ +/* Description: Configuration register */ + +/* Bit 3 : Configure the watchdog to either be paused, or kept running, while the CPU is halted by the debugger */ +#define WDT_CONFIG_HALT_Pos (3UL) /*!< Position of HALT field. */ +#define WDT_CONFIG_HALT_Msk (0x1UL << WDT_CONFIG_HALT_Pos) /*!< Bit mask of HALT field. */ +#define WDT_CONFIG_HALT_Pause (0UL) /*!< Pause watchdog while the CPU is halted by the debugger */ +#define WDT_CONFIG_HALT_Run (1UL) /*!< Keep the watchdog running while the CPU is halted by the debugger */ + +/* Bit 0 : Configure the watchdog to either be paused, or kept running, while the CPU is sleeping */ +#define WDT_CONFIG_SLEEP_Pos (0UL) /*!< Position of SLEEP field. */ +#define WDT_CONFIG_SLEEP_Msk (0x1UL << WDT_CONFIG_SLEEP_Pos) /*!< Bit mask of SLEEP field. */ +#define WDT_CONFIG_SLEEP_Pause (0UL) /*!< Pause watchdog while the CPU is sleeping */ +#define WDT_CONFIG_SLEEP_Run (1UL) /*!< Keep the watchdog running while the CPU is sleeping */ + +/* Register: WDT_RR */ +/* Description: Description collection[0]: Reload request 0 */ + +/* Bits 31..0 : Reload request register */ +#define WDT_RR_RR_Pos (0UL) /*!< Position of RR field. */ +#define WDT_RR_RR_Msk (0xFFFFFFFFUL << WDT_RR_RR_Pos) /*!< Bit mask of RR field. */ +#define WDT_RR_RR_Reload (0x6E524635UL) /*!< Value to request a reload of the watchdog timer */ + + +/*lint --flb "Leave library region" */ +#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52_name_change.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52_name_change.h new file mode 100644 index 00000000000..3d44efc1559 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52_name_change.h @@ -0,0 +1,81 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +#ifndef NRF52_NAME_CHANGE_H +#define NRF52_NAME_CHANGE_H + +/*lint ++flb "Enter library region */ + +/* This file is given to prevent your SW from not compiling with the updates made to nrf52.h and + * nrf52_bitfields.h. The macros defined in this file were available previously. Do not use these + * macros on purpose. Use the ones defined in nrf52.h and nrf52_bitfields.h instead. + */ + +/* I2S */ +/* Several enumerations changed case. Adding old macros to keep compilation compatibility. */ +#define I2S_ENABLE_ENABLE_DISABLE I2S_ENABLE_ENABLE_Disabled +#define I2S_ENABLE_ENABLE_ENABLE I2S_ENABLE_ENABLE_Enabled +#define I2S_CONFIG_MODE_MODE_MASTER I2S_CONFIG_MODE_MODE_Master +#define I2S_CONFIG_MODE_MODE_SLAVE I2S_CONFIG_MODE_MODE_Slave +#define I2S_CONFIG_RXEN_RXEN_DISABLE I2S_CONFIG_RXEN_RXEN_Disabled +#define I2S_CONFIG_RXEN_RXEN_ENABLE I2S_CONFIG_RXEN_RXEN_Enabled +#define I2S_CONFIG_TXEN_TXEN_DISABLE I2S_CONFIG_TXEN_TXEN_Disabled +#define I2S_CONFIG_TXEN_TXEN_ENABLE I2S_CONFIG_TXEN_TXEN_Enabled +#define I2S_CONFIG_MCKEN_MCKEN_DISABLE I2S_CONFIG_MCKEN_MCKEN_Disabled +#define I2S_CONFIG_MCKEN_MCKEN_ENABLE I2S_CONFIG_MCKEN_MCKEN_Enabled +#define I2S_CONFIG_SWIDTH_SWIDTH_8BIT I2S_CONFIG_SWIDTH_SWIDTH_8Bit +#define I2S_CONFIG_SWIDTH_SWIDTH_16BIT I2S_CONFIG_SWIDTH_SWIDTH_16Bit +#define I2S_CONFIG_SWIDTH_SWIDTH_24BIT I2S_CONFIG_SWIDTH_SWIDTH_24Bit +#define I2S_CONFIG_ALIGN_ALIGN_LEFT I2S_CONFIG_ALIGN_ALIGN_Left +#define I2S_CONFIG_ALIGN_ALIGN_RIGHT I2S_CONFIG_ALIGN_ALIGN_Right +#define I2S_CONFIG_FORMAT_FORMAT_ALIGNED I2S_CONFIG_FORMAT_FORMAT_Aligned +#define I2S_CONFIG_CHANNELS_CHANNELS_STEREO I2S_CONFIG_CHANNELS_CHANNELS_Stereo +#define I2S_CONFIG_CHANNELS_CHANNELS_LEFT I2S_CONFIG_CHANNELS_CHANNELS_Left +#define I2S_CONFIG_CHANNELS_CHANNELS_RIGHT I2S_CONFIG_CHANNELS_CHANNELS_Right + +/* LPCOMP */ +/* Corrected typo in RESULT register. */ +#define LPCOMP_RESULT_RESULT_Bellow LPCOMP_RESULT_RESULT_Below + +/*lint --flb "Leave library region" */ + +#endif /* NRF52_NAME_CHANGE_H */ + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52_to_nrf52810.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52_to_nrf52810.h new file mode 100644 index 00000000000..4a248df9d48 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52_to_nrf52810.h @@ -0,0 +1,105 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +#ifndef NRF52_TO_NRF52810_H +#define NRF52_TO_NRF52810_H + +/*lint ++flb "Enter library region */ + +/* This file is given to prevent your SW from not compiling with the name changes between nRF51 or nRF52832 and nRF52840 devices. + * It redefines the old nRF51 or nRF52832 names into the new ones as long as the functionality is still supported. If the + * functionality is gone, there old names are not defined, so compilation will fail. Note that also includes macros + * from the nrf52_namechange.h file. */ + +/* Differences between latest nRF52 headers and nRF52810 headers. */ + +/* Interrupt service routines handlers. Note that handlers SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler and + SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler are not redefined since functionality is not equivalent. */ +#define UARTE0_UART0_IRQHandler UARTE0_IRQHandler +#define COMP_LPCOMP_IRQHandler COMP_IRQHandler +#define SWI2_EGU2_IRQHandler SWI2_IRQHandler +#define SWI3_EGU3_IRQHandler SWI3_IRQHandler +#define SWI4_EGU4_IRQHandler SWI4_IRQHandler +#define SWI5_EGU5_IRQHandler SWI5_IRQHandler + +/* Interrupt service routines index. Note that indexes SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn and + SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn are not redefined since functionality is not equivalent. */ +#define UARTE0_UART0_IRQn UARTE0_IRQn +#define COMP_LPCOMP_IRQn COMP_IRQn +#define SWI2_EGU2_IRQn SWI2_IRQn +#define SWI3_EGU3_IRQn SWI3_IRQn +#define SWI4_EGU4_IRQn SWI4_IRQn +#define SWI5_EGU5_IRQn SWI5_IRQn + + +/* From nrf52_name_change.h. Several macros changed in different versions of nRF52 headers. By defining the following, any code written for any version of nRF52 headers will still compile. */ + +/* I2S */ +/* Several enumerations changed case. Adding old macros to keep compilation compatibility. */ +#define I2S_ENABLE_ENABLE_DISABLE I2S_ENABLE_ENABLE_Disabled +#define I2S_ENABLE_ENABLE_ENABLE I2S_ENABLE_ENABLE_Enabled +#define I2S_CONFIG_MODE_MODE_MASTER I2S_CONFIG_MODE_MODE_Master +#define I2S_CONFIG_MODE_MODE_SLAVE I2S_CONFIG_MODE_MODE_Slave +#define I2S_CONFIG_RXEN_RXEN_DISABLE I2S_CONFIG_RXEN_RXEN_Disabled +#define I2S_CONFIG_RXEN_RXEN_ENABLE I2S_CONFIG_RXEN_RXEN_Enabled +#define I2S_CONFIG_TXEN_TXEN_DISABLE I2S_CONFIG_TXEN_TXEN_Disabled +#define I2S_CONFIG_TXEN_TXEN_ENABLE I2S_CONFIG_TXEN_TXEN_Enabled +#define I2S_CONFIG_MCKEN_MCKEN_DISABLE I2S_CONFIG_MCKEN_MCKEN_Disabled +#define I2S_CONFIG_MCKEN_MCKEN_ENABLE I2S_CONFIG_MCKEN_MCKEN_Enabled +#define I2S_CONFIG_SWIDTH_SWIDTH_8BIT I2S_CONFIG_SWIDTH_SWIDTH_8Bit +#define I2S_CONFIG_SWIDTH_SWIDTH_16BIT I2S_CONFIG_SWIDTH_SWIDTH_16Bit +#define I2S_CONFIG_SWIDTH_SWIDTH_24BIT I2S_CONFIG_SWIDTH_SWIDTH_24Bit +#define I2S_CONFIG_ALIGN_ALIGN_LEFT I2S_CONFIG_ALIGN_ALIGN_Left +#define I2S_CONFIG_ALIGN_ALIGN_RIGHT I2S_CONFIG_ALIGN_ALIGN_Right +#define I2S_CONFIG_FORMAT_FORMAT_ALIGNED I2S_CONFIG_FORMAT_FORMAT_Aligned +#define I2S_CONFIG_CHANNELS_CHANNELS_STEREO I2S_CONFIG_CHANNELS_CHANNELS_Stereo +#define I2S_CONFIG_CHANNELS_CHANNELS_LEFT I2S_CONFIG_CHANNELS_CHANNELS_Left +#define I2S_CONFIG_CHANNELS_CHANNELS_RIGHT I2S_CONFIG_CHANNELS_CHANNELS_Right + +/* LPCOMP */ +/* Corrected typo in RESULT register. */ +#define LPCOMP_RESULT_RESULT_Bellow LPCOMP_RESULT_RESULT_Below + + +/*lint --flb "Leave library region" */ + +#endif /* NRF51_TO_NRF52810_H */ + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52_to_nrf52840.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52_to_nrf52840.h new file mode 100644 index 00000000000..bb87d6fc5b4 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf52_to_nrf52840.h @@ -0,0 +1,105 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +#ifndef NRF52_TO_NRF52840_H +#define NRF52_TO_NRF52840_H + +/*lint ++flb "Enter library region */ + +/* This file is given to prevent your SW from not compiling with the name changes between nRF51 or nRF52832 and nRF52840 devices. + * It redefines the old nRF51 or nRF52832 names into the new ones as long as the functionality is still supported. If the + * functionality is gone, there old names are not defined, so compilation will fail. Note that also includes macros + * from the nrf52_namechange.h file. */ + +/* Differences between latest nRF52 headers and nRF52840 headers. */ + +/* UART */ +/* The registers PSELRTS, PSELTXD, PSELCTS, PSELRXD were restructured into a struct. */ +#define PSELRTS PSEL.RTS +#define PSELTXD PSEL.TXD +#define PSELCTS PSEL.CTS +#define PSELRXD PSEL.RXD + +/* TWI */ +/* The registers PSELSCL, PSELSDA were restructured into a struct. */ +#define PSELSCL PSEL.SCL +#define PSELSDA PSEL.SDA + + +/* LPCOMP */ +/* The hysteresis control enumerated values has changed name for nRF52840 devices. */ +#define LPCOMP_HYST_HYST_NoHyst LPCOMP_HYST_HYST_Disabled +#define LPCOMP_HYST_HYST_Hyst50mV LPCOMP_HYST_HYST_Enabled + + +/* From nrf52_name_change.h. Several macros changed in different versions of nRF52 headers. By defining the following, any code written for any version of nRF52 headers will still compile. */ + +/* I2S */ +/* Several enumerations changed case. Adding old macros to keep compilation compatibility. */ +#define I2S_ENABLE_ENABLE_DISABLE I2S_ENABLE_ENABLE_Disabled +#define I2S_ENABLE_ENABLE_ENABLE I2S_ENABLE_ENABLE_Enabled +#define I2S_CONFIG_MODE_MODE_MASTER I2S_CONFIG_MODE_MODE_Master +#define I2S_CONFIG_MODE_MODE_SLAVE I2S_CONFIG_MODE_MODE_Slave +#define I2S_CONFIG_RXEN_RXEN_DISABLE I2S_CONFIG_RXEN_RXEN_Disabled +#define I2S_CONFIG_RXEN_RXEN_ENABLE I2S_CONFIG_RXEN_RXEN_Enabled +#define I2S_CONFIG_TXEN_TXEN_DISABLE I2S_CONFIG_TXEN_TXEN_Disabled +#define I2S_CONFIG_TXEN_TXEN_ENABLE I2S_CONFIG_TXEN_TXEN_Enabled +#define I2S_CONFIG_MCKEN_MCKEN_DISABLE I2S_CONFIG_MCKEN_MCKEN_Disabled +#define I2S_CONFIG_MCKEN_MCKEN_ENABLE I2S_CONFIG_MCKEN_MCKEN_Enabled +#define I2S_CONFIG_SWIDTH_SWIDTH_8BIT I2S_CONFIG_SWIDTH_SWIDTH_8Bit +#define I2S_CONFIG_SWIDTH_SWIDTH_16BIT I2S_CONFIG_SWIDTH_SWIDTH_16Bit +#define I2S_CONFIG_SWIDTH_SWIDTH_24BIT I2S_CONFIG_SWIDTH_SWIDTH_24Bit +#define I2S_CONFIG_ALIGN_ALIGN_LEFT I2S_CONFIG_ALIGN_ALIGN_Left +#define I2S_CONFIG_ALIGN_ALIGN_RIGHT I2S_CONFIG_ALIGN_ALIGN_Right +#define I2S_CONFIG_FORMAT_FORMAT_ALIGNED I2S_CONFIG_FORMAT_FORMAT_Aligned +#define I2S_CONFIG_CHANNELS_CHANNELS_STEREO I2S_CONFIG_CHANNELS_CHANNELS_Stereo +#define I2S_CONFIG_CHANNELS_CHANNELS_LEFT I2S_CONFIG_CHANNELS_CHANNELS_Left +#define I2S_CONFIG_CHANNELS_CHANNELS_RIGHT I2S_CONFIG_CHANNELS_CHANNELS_Right + +/* LPCOMP */ +/* Corrected typo in RESULT register. */ +#define LPCOMP_RESULT_RESULT_Bellow LPCOMP_RESULT_RESULT_Below + + +/*lint --flb "Leave library region" */ + +#endif /* NRF51_TO_NRF52840_H */ + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf_peripherals.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf_peripherals.h new file mode 100644 index 00000000000..3b98c5c00a4 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/nrf_peripherals.h @@ -0,0 +1,72 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +#ifndef NRF_PERIPHERALS_H__ +#define NRF_PERIPHERALS_H__ + +/*lint ++flb "Enter library region */ + +#if defined(_WIN32) + /* Do not include nrf specific files when building for PC host */ +#elif defined(__unix) + /* Do not include nrf specific files when building for PC host */ +#elif defined(__APPLE__) + /* Do not include nrf specific files when building for PC host */ +#else + + #if defined(NRF51) + #include "nrf51_peripherals.h" + + #elif defined(NRF52810_XXAA) + #include "nrf52810_peripherals.h" + #elif defined(NRF52832_XXAA) || defined(NRF52832_XXAB) + #include "nrf52832_peripherals.h" + #elif defined(NRF52840_XXAA) + #include "nrf52840_peripherals.h" + + #else + #error "Device must be defined. See nrf.h." + #endif +#endif + +/*lint --flb "Leave library region" */ + +#endif // NRF_PERIPHERALS_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/startup_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/startup_config.h new file mode 100644 index 00000000000..7dd3b42acd4 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/startup_config.h @@ -0,0 +1,60 @@ +/* + +Copyright (c) 2010 - 2018, Nordic Semiconductor ASA + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +/* Configure stack size, stack alignement and heap size with a header file instead of project settings or modification of Nordic provided assembler files. Modify this file as needed. */ + +/* In order to make use this file, + 1. For Keil uVision IDE, in the Options for Target -> Asm tab, define symbol __STARTUP_CONFIG and use the additional assembler option --cpreproc in Misc Control text box. + 2. For GCC compiling, add extra assembly option -D__STARTUP_CONFIG. + 3. For IAR Embedded Workbench define symbol __STARTUP_CONFIG in the Assembler options and define symbol __STARTUP_CONFIG=1 in the linker options. +*/ + +/* This file is a template and should be copied to the project directory. */ + +/* Define size of stack. Size must be multiple of 4. */ +#define __STARTUP_CONFIG_STACK_SIZE 0x1000 + +/* Define alignement of stack. Alignment will be 2 to the power of __STARTUP_CONFIG_STACK_ALIGNEMENT. Since calling convention requires that the stack is aligned to 8-bytes when a function is called, the minimum __STARTUP_CONFIG_STACK_ALIGNEMENT is therefore 3. */ +#define __STARTUP_CONFIG_STACK_ALIGNEMENT 3 + +/* Define size of heap. Size must be multiple of 4. */ +#define __STARTUP_CONFIG_HEAP_SIZE 0x1000 + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/system_nrf51.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/system_nrf51.h new file mode 100644 index 00000000000..3227cafc8cd --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/system_nrf51.h @@ -0,0 +1,61 @@ +/* + +Copyright (c) 2009-2018 ARM Limited. All rights reserved. + + SPDX-License-Identifier: Apache-2.0 + +Licensed under the Apache License, Version 2.0 (the License); you may +not use this file except in compliance with the License. +You may obtain a copy of the License at + + www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an AS IS BASIS, WITHOUT +WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. + +NOTICE: This file has been modified by Nordic Semiconductor ASA. + +*/ + +#ifndef SYSTEM_NRF51_H +#define SYSTEM_NRF51_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include + + +extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ + +/** + * Initialize the system + * + * @param none + * @return none + * + * @brief Setup the microcontroller system. + * Initialize the System and update the SystemCoreClock variable. + */ +extern void SystemInit (void); + +/** + * Update SystemCoreClock variable + * + * @param none + * @return none + * + * @brief Updates the SystemCoreClock with current core Clock + * retrieved from cpu registers. + */ +extern void SystemCoreClockUpdate (void); + +#ifdef __cplusplus +} +#endif + +#endif /* SYSTEM_NRF51_H */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/system_nrf52.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/system_nrf52.h new file mode 100644 index 00000000000..d05316c1d15 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/system_nrf52.h @@ -0,0 +1,61 @@ +/* + +Copyright (c) 2009-2018 ARM Limited. All rights reserved. + + SPDX-License-Identifier: Apache-2.0 + +Licensed under the Apache License, Version 2.0 (the License); you may +not use this file except in compliance with the License. +You may obtain a copy of the License at + + www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an AS IS BASIS, WITHOUT +WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. + +NOTICE: This file has been modified by Nordic Semiconductor ASA. + +*/ + +#ifndef SYSTEM_NRF52_H +#define SYSTEM_NRF52_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include + + +extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ + +/** + * Initialize the system + * + * @param none + * @return none + * + * @brief Setup the microcontroller system. + * Initialize the System and update the SystemCoreClock variable. + */ +extern void SystemInit (void); + +/** + * Update SystemCoreClock variable + * + * @param none + * @return none + * + * @brief Updates the SystemCoreClock with current core Clock + * retrieved from cpu registers. + */ +extern void SystemCoreClockUpdate (void); + +#ifdef __cplusplus +} +#endif + +#endif /* SYSTEM_NRF52_H */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/system_nrf52810.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/system_nrf52810.h new file mode 100644 index 00000000000..e395ee996da --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/system_nrf52810.h @@ -0,0 +1,61 @@ +/* + +Copyright (c) 2009-2018 ARM Limited. All rights reserved. + + SPDX-License-Identifier: Apache-2.0 + +Licensed under the Apache License, Version 2.0 (the License); you may +not use this file except in compliance with the License. +You may obtain a copy of the License at + + www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an AS IS BASIS, WITHOUT +WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. + +NOTICE: This file has been modified by Nordic Semiconductor ASA. + +*/ + +#ifndef SYSTEM_NRF52810_H +#define SYSTEM_NRF52810_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include + + +extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ + +/** + * Initialize the system + * + * @param none + * @return none + * + * @brief Setup the microcontroller system. + * Initialize the System and update the SystemCoreClock variable. + */ +extern void SystemInit (void); + +/** + * Update SystemCoreClock variable + * + * @param none + * @return none + * + * @brief Updates the SystemCoreClock with current core Clock + * retrieved from cpu registers. + */ +extern void SystemCoreClockUpdate (void); + +#ifdef __cplusplus +} +#endif + +#endif /* SYSTEM_NRF52810_H */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/system_nrf52840.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/system_nrf52840.h new file mode 100644 index 00000000000..28b3151bfbd --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/mdk/system_nrf52840.h @@ -0,0 +1,61 @@ +/* + +Copyright (c) 2009-2018 ARM Limited. All rights reserved. + + SPDX-License-Identifier: Apache-2.0 + +Licensed under the Apache License, Version 2.0 (the License); you may +not use this file except in compliance with the License. +You may obtain a copy of the License at + + www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an AS IS BASIS, WITHOUT +WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. + +NOTICE: This file has been modified by Nordic Semiconductor ASA. + +*/ + +#ifndef SYSTEM_NRF52840_H +#define SYSTEM_NRF52840_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include + + +extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ + +/** + * Initialize the system + * + * @param none + * @return none + * + * @brief Setup the microcontroller system. + * Initialize the System and update the SystemCoreClock variable. + */ +extern void SystemInit (void); + +/** + * Update SystemCoreClock variable + * + * @param none + * @return none + * + * @brief Updates the SystemCoreClock with current core Clock + * retrieved from cpu registers. + */ +extern void SystemCoreClockUpdate (void); + +#ifdef __cplusplus +} +#endif + +#endif /* SYSTEM_NRF52840_H */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/nrfx.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/nrfx.h new file mode 100644 index 00000000000..37e3c8de5bc --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/nrfx.h @@ -0,0 +1,49 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_H__ +#define NRFX_H__ + +#include +#include +#include +#include + +#endif // NRFX_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/soc/nrfx_coredep.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/soc/nrfx_coredep.h new file mode 100644 index 00000000000..fddf052682d --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/soc/nrfx_coredep.h @@ -0,0 +1,171 @@ +/** + * Copyright (c) 2018 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_COREDEP_H__ +#define NRFX_COREDEP_H__ + +/** + * @defgroup nrfx_coredep Core-dependent functionality + * @{ + * @ingroup nrfx + * @brief Module containing functions with core-dependent implementation, like delay. + */ + +#if defined(__NRFX_DOXYGEN__) + +/** @brief Core frequency (in MHz). */ +#define NRFX_DELAY_CPU_FREQ_MHZ +/** @brief Availability of DWT unit in the given SoC. */ +#define NRFX_DELAY_DWT_PRESENT + +#elif defined(NRF51) + #define NRFX_DELAY_CPU_FREQ_MHZ 16 + #define NRFX_DELAY_DWT_PRESENT 0 +#elif defined(NRF52810_XXAA) + #define NRFX_DELAY_CPU_FREQ_MHZ 64 + #define NRFX_DELAY_DWT_PRESENT 0 +#elif defined(NRF52832_XXAA) || defined (NRF52832_XXAB) + #define NRFX_DELAY_CPU_FREQ_MHZ 64 + #define NRFX_DELAY_DWT_PRESENT 1 +#elif defined(NRF52840_XXAA) + #define NRFX_DELAY_CPU_FREQ_MHZ 64 + #define NRFX_DELAY_DWT_PRESENT 1 +#else + #error "Unknown device." +#endif + +/** + * @brief Function for delaying execution for a number of microseconds. + * + * The value of @p time_us is multiplied by the frequency in MHz. Therefore, the delay is limited to + * maximum uint32_t capacity divided by frequency. For example: + * - For SoCs working at 64MHz: 0xFFFFFFFF/64 = 0x03FFFFFF (67108863 microseconds) + * - For SoCs working at 16MHz: 0xFFFFFFFF/16 = 0x0FFFFFFF (268435455 microseconds) + * + * @param time_us Number of microseconds to wait. + */ +__STATIC_INLINE void nrfx_coredep_delay_us(uint32_t time_us); + +/** @} */ + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +#if NRFX_CHECK(NRFX_DELAY_DWT_BASED) + +#if !NRFX_DELAY_DWT_PRESENT +#error "DWT unit not present in the SoC that is used." +#endif + +__STATIC_INLINE void nrfx_coredep_delay_us(uint32_t time_us) +{ + if (time_us == 0) + { + return; + } + uint32_t time_cycles = time_us * NRFX_DELAY_CPU_FREQ_MHZ; + + // Save the current state of the DEMCR register to be able to restore it before exiting + // this function. Enable the trace and debug blocks (DWT is one of them). + uint32_t core_debug = CoreDebug->DEMCR; + CoreDebug->DEMCR = core_debug | CoreDebug_DEMCR_TRCENA_Msk; + + // Save the current state of the CTRL register in DWT block. Make sure + // that cycle counter is enabled. + uint32_t dwt_ctrl = DWT->CTRL; + DWT->CTRL = dwt_ctrl | DWT_CTRL_CYCCNTENA_Msk; + + // Store start value of cycle counter. + uint32_t cyccnt_initial = DWT->CYCCNT; + + // Delay required time. + while ((DWT->CYCCNT - cyccnt_initial) < time_cycles) + {} + + // Restore preserved registers. + DWT->CTRL = dwt_ctrl; + CoreDebug->DEMCR = core_debug; +} +#else // NRFX_CHECK(NRFX_DELAY_DWT_BASED) + + +__STATIC_INLINE void nrfx_coredep_delay_us(uint32_t time_us) +{ + if (time_us == 0) + { + return; + } + + #if defined(NRF51) + // The loop takes 4 cycles: 1 for SUBS and 3 for BHI. + static const uint16_t delay_bytecode[] = { + 0x3804, // SUBS r0, #4 + 0xd8fd, // BHI .-2 + 0x4770 // BX LR + }; + #elif defined(NRF52810_XXAA) + // The loop takes 7 cycles: 1 for SUBS and 2 for BHI and 2 for flash wait states. + static const uint16_t delay_bytecode[] = { + 0x3807, // SUBS r0, #7 + 0xd8fd, // BHI .-2 + 0x4770 // BX LR + }; + #elif defined(NRF52832_XXAA) || defined (NRF52832_XXAB) || defined(NRF52840_XXAA) + // The loop takes 3 cycles: 1 for SUBS and 2 for BHI. + // Make sure that code will be cached properly, so that no extra wait states appear. + __ALIGN(16) + static const uint16_t delay_bytecode[] = { + 0x3803, // SUBS r0, #3 + 0xd8fd, // BHI .-2 + 0x4770 // BX LR + }; + #endif + + typedef void (* delay_func_t)(uint32_t); + // Set LSB to 1 to execute code in Thumb mode. + const delay_func_t delay_cycles = (delay_func_t)((((uint32_t)delay_bytecode) | 1)); + uint32_t cycles = time_us * NRFX_DELAY_CPU_FREQ_MHZ; + delay_cycles(cycles); +} + +#endif // !NRFX_CHECK(NRFX_DELAY_DWT_BASED_DELAY) + +#endif // SUPPRESS_INLINE_IMPLEMENTATION + +#endif // NRFX_COREDEP_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/soc/nrfx_irqs.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/soc/nrfx_irqs.h new file mode 100644 index 00000000000..60fd4a25c5e --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/soc/nrfx_irqs.h @@ -0,0 +1,56 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_IRQS_H__ +#define NRFX_IRQS_H__ + +#if defined(NRF51) + #include +#elif defined(NRF52810_XXAA) + #include +#elif defined(NRF52832_XXAA) || defined (NRF52832_XXAB) + #include +#elif defined(NRF52840_XXAA) + #include +#else + #error "Unknown device." +#endif + +#endif // NRFX_IRQS_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/soc/nrfx_irqs_nrf51.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/soc/nrfx_irqs_nrf51.h new file mode 100644 index 00000000000..0a204533e35 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/soc/nrfx_irqs_nrf51.h @@ -0,0 +1,136 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_IRQS_NRF51_H__ +#define NRFX_IRQS_NRF51_H__ + +#ifdef __cplusplus +extern "C" { +#endif + + +// POWER_CLOCK_IRQn +#define nrfx_power_clock_irq_handler POWER_CLOCK_IRQHandler + +// RADIO_IRQn + +// UART0_IRQn +#define nrfx_uart_0_irq_handler UART0_IRQHandler + +// SPI0_TWI0_IRQn +#if NRFX_CHECK(NRFX_PRS_ENABLED) && NRFX_CHECK(NRFX_PRS_BOX_0_ENABLED) +#define nrfx_prs_box_0_irq_handler SPI0_TWI0_IRQHandler +#else +#define nrfx_spi_0_irq_handler SPI0_TWI0_IRQHandler +#define nrfx_twi_0_irq_handler SPI0_TWI0_IRQHandler +#endif + +// SPI1_TWI1_IRQn +#if NRFX_CHECK(NRFX_PRS_ENABLED) && NRFX_CHECK(NRFX_PRS_BOX_1_ENABLED) +#define nrfx_prs_box_1_irq_handler SPI1_TWI1_IRQHandler +#else +#define nrfx_spi_1_irq_handler SPI1_TWI1_IRQHandler +#define nrfx_spis_1_irq_handler SPI1_TWI1_IRQHandler +#define nrfx_twi_1_irq_handler SPI1_TWI1_IRQHandler +#endif + +// GPIOTE_IRQn +#define nrfx_gpiote_irq_handler GPIOTE_IRQHandler + +// ADC_IRQn +#define nrfx_adc_irq_handler ADC_IRQHandler + +// TIMER0_IRQn +#define nrfx_timer_0_irq_handler TIMER0_IRQHandler + +// TIMER1_IRQn +#define nrfx_timer_1_irq_handler TIMER1_IRQHandler + +// TIMER2_IRQn +#define nrfx_timer_2_irq_handler TIMER2_IRQHandler + +// RTC0_IRQn +#define nrfx_rtc_0_irq_handler RTC0_IRQHandler + +// TEMP_IRQn + +// RNG_IRQn +#define nrfx_rng_irq_handler RNG_IRQHandler + +// ECB_IRQn + +// CCM_AAR_IRQn + +// WDT_IRQn +#define nrfx_wdt_irq_handler WDT_IRQHandler + +// RTC1_IRQn +#define nrfx_rtc_1_irq_handler RTC1_IRQHandler + +// QDEC_IRQn +#define nrfx_qdec_irq_handler QDEC_IRQHandler + +// LPCOMP_IRQn +#define nrfx_lpcomp_irq_handler LPCOMP_IRQHandler + +// SWI0_IRQn +#define nrfx_swi_0_irq_handler SWI0_IRQHandler + +// SWI1_IRQn +#define nrfx_swi_1_irq_handler SWI1_IRQHandler + +// SWI2_IRQn +#define nrfx_swi_2_irq_handler SWI2_IRQHandler + +// SWI3_IRQn +#define nrfx_swi_3_irq_handler SWI3_IRQHandler + +// SWI4_IRQn +#define nrfx_swi_4_irq_handler SWI4_IRQHandler + +// SWI5_IRQn +#define nrfx_swi_5_irq_handler SWI5_IRQHandler + + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_IRQS_NRF51_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/soc/nrfx_irqs_nrf52810.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/soc/nrfx_irqs_nrf52810.h new file mode 100644 index 00000000000..7934854b7ee --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/soc/nrfx_irqs_nrf52810.h @@ -0,0 +1,141 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_IRQS_NRF52832_H__ +#define NRFX_IRQS_NRF52832_H__ + +#ifdef __cplusplus +extern "C" { +#endif + + +// POWER_CLOCK_IRQn +#define nrfx_power_clock_irq_handler POWER_CLOCK_IRQHandler + +// RADIO_IRQn + +// UARTE0_IRQn +#define nrfx_uarte_0_irq_handler UARTE0_IRQHandler + +// TWIM0_TWIS0_IRQn +#if NRFX_CHECK(NRFX_PRS_BOX_0_ENABLED) +#define nrfx_prs_box_0_irq_handler TWIM0_TWIS0_IRQHandler +#else +#define nrfx_twim_0_irq_handler TWIM0_TWIS0_IRQHandler +#define nrfx_twis_0_irq_handler TWIM0_TWIS0_IRQHandler +#endif + +// SPIM1_SPIS1_IRQn +#if NRFX_CHECK(NRFX_PRS_BOX_1_ENABLED) +#define nrfx_prs_box_1_irq_handler SPIM1_SPIS1_IRQHandler +#else +#define nrfx_spim_1_irq_handler SPIM1_SPIS1_IRQHandler +#define nrfx_spis_1_irq_handler SPIM1_SPIS1_IRQHandler +#endif + +// GPIOTE_IRQn +#define nrfx_gpiote_irq_handler GPIOTE_IRQHandler + +// SAADC_IRQn +#define nrfx_saadc_irq_handler SAADC_IRQHandler + +// TIMER0_IRQn +#define nrfx_timer_0_irq_handler TIMER0_IRQHandler + +// TIMER1_IRQn +#define nrfx_timer_1_irq_handler TIMER1_IRQHandler + +// TIMER2_IRQn +#define nrfx_timer_2_irq_handler TIMER2_IRQHandler + +// RTC0_IRQn +#define nrfx_rtc_0_irq_handler RTC0_IRQHandler + +// TEMP_IRQn + +// RNG_IRQn +#define nrfx_rng_irq_handler RNG_IRQHandler + +// ECB_IRQn + +// CCM_AAR_IRQn + +// WDT_IRQn +#define nrfx_wdt_irq_handler WDT_IRQHandler + +// RTC1_IRQn +#define nrfx_rtc_1_irq_handler RTC1_IRQHandler + +// QDEC_IRQn +#define nrfx_qdec_irq_handler QDEC_IRQHandler + +// COMP_IRQn +#define nrfx_comp_irq_handler COMP_IRQHandler + +// SWI0_EGU0_IRQn +#define nrfx_swi_0_irq_handler SWI0_EGU0_IRQHandler + +// SWI1_EGU1_IRQn +#define nrfx_swi_1_irq_handler SWI1_EGU1_IRQHandler + +// SWI2_IRQn +#define nrfx_swi_2_irq_handler SWI2_IRQHandler + +// SWI3_IRQn +#define nrfx_swi_3_irq_handler SWI3_IRQHandler + +// SWI4_IRQn +#define nrfx_swi_4_irq_handler SWI4_IRQHandler + +// SWI5_IRQn +#define nrfx_swi_5_irq_handler SWI5_IRQHandler + +// PWM0_IRQn +#define nrfx_pwm_0_irq_handler PWM0_IRQHandler + +// PDM_IRQn +#define nrfx_pdm_irq_handler PDM_IRQHandler + + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_IRQS_NRF52832_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/soc/nrfx_irqs_nrf52832.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/soc/nrfx_irqs_nrf52832.h new file mode 100644 index 00000000000..b947bdc2bf2 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/soc/nrfx_irqs_nrf52832.h @@ -0,0 +1,192 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_IRQS_NRF52832_H__ +#define NRFX_IRQS_NRF52832_H__ + +#ifdef __cplusplus +extern "C" { +#endif + + +// POWER_CLOCK_IRQn +#define nrfx_power_clock_irq_handler POWER_CLOCK_IRQHandler + +// RADIO_IRQn + +// UARTE0_UART0_IRQn +#if NRFX_CHECK(NRFX_PRS_ENABLED) && NRFX_CHECK(NRFX_PRS_BOX_4_ENABLED) +#define nrfx_prs_box_4_irq_handler UARTE0_UART0_IRQHandler +#else +#define nrfx_uarte_0_irq_handler UARTE0_UART0_IRQHandler +#define nrfx_uart_0_irq_handler UARTE0_UART0_IRQHandler +#endif + +// SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn +#if NRFX_CHECK(NRFX_PRS_ENABLED) && NRFX_CHECK(NRFX_PRS_BOX_0_ENABLED) +#define nrfx_prs_box_0_irq_handler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler +#else +#define nrfx_spim_0_irq_handler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler +#define nrfx_spis_0_irq_handler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler +#define nrfx_twim_0_irq_handler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler +#define nrfx_twis_0_irq_handler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler +#define nrfx_spi_0_irq_handler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler +#define nrfx_twi_0_irq_handler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler +#endif + +// SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn +#if NRFX_CHECK(NRFX_PRS_ENABLED) && NRFX_CHECK(NRFX_PRS_BOX_1_ENABLED) +#define nrfx_prs_box_1_irq_handler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler +#else +#define nrfx_spim_1_irq_handler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler +#define nrfx_spis_1_irq_handler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler +#define nrfx_twim_1_irq_handler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler +#define nrfx_twis_1_irq_handler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler +#define nrfx_spi_1_irq_handler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler +#define nrfx_twi_1_irq_handler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler +#endif + +// NFCT_IRQn + +// GPIOTE_IRQn +#define nrfx_gpiote_irq_handler GPIOTE_IRQHandler + +// SAADC_IRQn +#define nrfx_saadc_irq_handler SAADC_IRQHandler + +// TIMER0_IRQn +#define nrfx_timer_0_irq_handler TIMER0_IRQHandler + +// TIMER1_IRQn +#define nrfx_timer_1_irq_handler TIMER1_IRQHandler + +// TIMER2_IRQn +#define nrfx_timer_2_irq_handler TIMER2_IRQHandler + +// RTC0_IRQn +#define nrfx_rtc_0_irq_handler RTC0_IRQHandler + +// TEMP_IRQn + +// RNG_IRQn +#define nrfx_rng_irq_handler RNG_IRQHandler + +// ECB_IRQn + +// CCM_AAR_IRQn + +// WDT_IRQn +#define nrfx_wdt_irq_handler WDT_IRQHandler + +// RTC1_IRQn +#define nrfx_rtc_1_irq_handler RTC1_IRQHandler + +// QDEC_IRQn +#define nrfx_qdec_irq_handler QDEC_IRQHandler + +// COMP_LPCOMP_IRQn +#if NRFX_CHECK(NRFX_PRS_ENABLED) && NRFX_CHECK(NRFX_PRS_BOX_3_ENABLED) +#define nrfx_prs_box_3_irq_handler COMP_LPCOMP_IRQHandler +#else +#define nrfx_comp_irq_handler COMP_LPCOMP_IRQHandler +#define nrfx_lpcomp_irq_handler COMP_LPCOMP_IRQHandler +#endif + +// SWI0_EGU0_IRQn +#define nrfx_swi_0_irq_handler SWI0_EGU0_IRQHandler + +// SWI1_EGU1_IRQn +#define nrfx_swi_1_irq_handler SWI1_EGU1_IRQHandler + +// SWI2_EGU2_IRQn +#define nrfx_swi_2_irq_handler SWI2_EGU2_IRQHandler + +// SWI3_EGU3_IRQn +#define nrfx_swi_3_irq_handler SWI3_EGU3_IRQHandler + +// SWI4_EGU4_IRQn +#define nrfx_swi_4_irq_handler SWI4_EGU4_IRQHandler + +// SWI5_EGU5_IRQn +#define nrfx_swi_5_irq_handler SWI5_EGU5_IRQHandler + +// TIMER3_IRQn +#define nrfx_timer_3_irq_handler TIMER3_IRQHandler + +// TIMER4_IRQn +#define nrfx_timer_4_irq_handler TIMER4_IRQHandler + +// PWM0_IRQn +#define nrfx_pwm_0_irq_handler PWM0_IRQHandler + +// PDM_IRQn +#define nrfx_pdm_irq_handler PDM_IRQHandler + +// MWU_IRQn + +// PWM1_IRQn +#define nrfx_pwm_1_irq_handler PWM1_IRQHandler + +// PWM2_IRQn +#define nrfx_pwm_2_irq_handler PWM2_IRQHandler + +// SPIM2_SPIS2_SPI2_IRQn +#if NRFX_CHECK(NRFX_PRS_ENABLED) && NRFX_CHECK(NRFX_PRS_BOX_2_ENABLED) +#define nrfx_prs_box_2_irq_handler SPIM2_SPIS2_SPI2_IRQHandler +#else +#define nrfx_spim_2_irq_handler SPIM2_SPIS2_SPI2_IRQHandler +#define nrfx_spis_2_irq_handler SPIM2_SPIS2_SPI2_IRQHandler +#define nrfx_spi_2_irq_handler SPIM2_SPIS2_SPI2_IRQHandler +#endif + +// RTC2_IRQn +#define nrfx_rtc_2_irq_handler RTC2_IRQHandler + +// I2S_IRQn +#define nrfx_i2s_irq_handler I2S_IRQHandler + +// FPU_IRQn + + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_IRQS_NRF52832_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/soc/nrfx_irqs_nrf52840.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/soc/nrfx_irqs_nrf52840.h new file mode 100644 index 00000000000..ecb7e1dc345 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/soc/nrfx_irqs_nrf52840.h @@ -0,0 +1,208 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRFX_IRQS_NRF52840_H__ +#define NRFX_IRQS_NRF52840_H__ + +#ifdef __cplusplus +extern "C" { +#endif + + +// POWER_CLOCK_IRQn +#define nrfx_power_clock_irq_handler POWER_CLOCK_IRQHandler + +// RADIO_IRQn + +// UARTE0_UART0_IRQn +#if NRFX_CHECK(NRFX_PRS_ENABLED) && NRFX_CHECK(NRFX_PRS_BOX_4_ENABLED) +#define nrfx_prs_box_4_irq_handler UARTE0_UART0_IRQHandler +#else +#define nrfx_uarte_0_irq_handler UARTE0_UART0_IRQHandler +#define nrfx_uart_0_irq_handler UARTE0_UART0_IRQHandler +#endif + +// SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn +#if NRFX_CHECK(NRFX_PRS_ENABLED) && NRFX_CHECK(NRFX_PRS_BOX_0_ENABLED) +#define nrfx_prs_box_0_irq_handler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler +#else +#define nrfx_spim_0_irq_handler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler +#define nrfx_spis_0_irq_handler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler +#define nrfx_twim_0_irq_handler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler +#define nrfx_twis_0_irq_handler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler +#define nrfx_spi_0_irq_handler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler +#define nrfx_twi_0_irq_handler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler +#endif + +// SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn +#if NRFX_CHECK(NRFX_PRS_ENABLED) && NRFX_CHECK(NRFX_PRS_BOX_1_ENABLED) +#define nrfx_prs_box_1_irq_handler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler +#else +#define nrfx_spim_1_irq_handler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler +#define nrfx_spis_1_irq_handler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler +#define nrfx_twim_1_irq_handler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler +#define nrfx_twis_1_irq_handler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler +#define nrfx_spi_1_irq_handler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler +#define nrfx_twi_1_irq_handler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler +#endif + +// NFCT_IRQn + +// GPIOTE_IRQn +#define nrfx_gpiote_irq_handler GPIOTE_IRQHandler + +// SAADC_IRQn +#define nrfx_saadc_irq_handler SAADC_IRQHandler + +// TIMER0_IRQn +#define nrfx_timer_0_irq_handler TIMER0_IRQHandler + +// TIMER1_IRQn +#define nrfx_timer_1_irq_handler TIMER1_IRQHandler + +// TIMER2_IRQn +#define nrfx_timer_2_irq_handler TIMER2_IRQHandler + +// RTC0_IRQn +#define nrfx_rtc_0_irq_handler RTC0_IRQHandler + +// TEMP_IRQn + +// RNG_IRQn +#define nrfx_rng_irq_handler RNG_IRQHandler + +// ECB_IRQn + +// CCM_AAR_IRQn + +// WDT_IRQn +#define nrfx_wdt_irq_handler WDT_IRQHandler + +// RTC1_IRQn +#define nrfx_rtc_1_irq_handler RTC1_IRQHandler + +// QDEC_IRQn +#define nrfx_qdec_irq_handler QDEC_IRQHandler + +// COMP_LPCOMP_IRQn +#if NRFX_CHECK(NRFX_PRS_ENABLED) && NRFX_CHECK(NRFX_PRS_BOX_3_ENABLED) +#define nrfx_prs_box_3_irq_handler COMP_LPCOMP_IRQHandler +#else +#define nrfx_comp_irq_handler COMP_LPCOMP_IRQHandler +#define nrfx_lpcomp_irq_handler COMP_LPCOMP_IRQHandler +#endif + +// SWI0_EGU0_IRQn +#define nrfx_swi_0_irq_handler SWI0_EGU0_IRQHandler + +// SWI1_EGU1_IRQn +#define nrfx_swi_1_irq_handler SWI1_EGU1_IRQHandler + +// SWI2_EGU2_IRQn +#define nrfx_swi_2_irq_handler SWI2_EGU2_IRQHandler + +// SWI3_EGU3_IRQn +#define nrfx_swi_3_irq_handler SWI3_EGU3_IRQHandler + +// SWI4_EGU4_IRQn +#define nrfx_swi_4_irq_handler SWI4_EGU4_IRQHandler + +// SWI5_EGU5_IRQn +#define nrfx_swi_5_irq_handler SWI5_EGU5_IRQHandler + +// TIMER3_IRQn +#define nrfx_timer_3_irq_handler TIMER3_IRQHandler + +// TIMER4_IRQn +#define nrfx_timer_4_irq_handler TIMER4_IRQHandler + +// PWM0_IRQn +#define nrfx_pwm_0_irq_handler PWM0_IRQHandler + +// PDM_IRQn +#define nrfx_pdm_irq_handler PDM_IRQHandler + +// MWU_IRQn + +// PWM1_IRQn +#define nrfx_pwm_1_irq_handler PWM1_IRQHandler + +// PWM2_IRQn +#define nrfx_pwm_2_irq_handler PWM2_IRQHandler + +// SPIM2_SPIS2_SPI2_IRQn +#if NRFX_CHECK(NRFX_PRS_ENABLED) && NRFX_CHECK(NRFX_PRS_BOX_2_ENABLED) +#define nrfx_prs_box_2_irq_handler SPIM2_SPIS2_SPI2_IRQHandler +#else +#define nrfx_spim_2_irq_handler SPIM2_SPIS2_SPI2_IRQHandler +#define nrfx_spis_2_irq_handler SPIM2_SPIS2_SPI2_IRQHandler +#define nrfx_spi_2_irq_handler SPIM2_SPIS2_SPI2_IRQHandler +#endif + +// RTC2_IRQn +#define nrfx_rtc_2_irq_handler RTC2_IRQHandler + +// I2S_IRQn +#define nrfx_i2s_irq_handler I2S_IRQHandler + +// FPU_IRQn + +// USBD_IRQn + +// UARTE1_IRQn +#define nrfx_uarte_1_irq_handler UARTE1_IRQHandler + +// QSPI_IRQn +#define nrfx_qspi_irq_handler QSPI_IRQHandler + +// CRYPTOCELL_IRQn + +// PWM3_IRQn +#define nrfx_pwm_3_irq_handler PWM3_IRQHandler + +// SPIM3_IRQn +#define nrfx_spim_3_irq_handler SPIM3_IRQHandler + + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_IRQS_NRF52840_H__ From a21e4e4f25d152376f7dba237f3d317d6fa606ff Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Tue, 26 Jun 2018 16:42:18 -0500 Subject: [PATCH 431/488] Mods for baseline 15.0 support --- .../TARGET_MCU_NRF52840/config/sdk_config.h | 12896 ++++++++++------ .../TARGET_NRF5x/TARGET_NRF52/i2c_api.c | 3 +- .../TARGET_NRF5x/TARGET_NRF52/serial_api.c | 9 - targets/targets.json | 6 +- 4 files changed, 8074 insertions(+), 4840 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h index d193187f9e0..8559dd30e9d 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h @@ -1,5 +1,5 @@ /** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA * * All rights reserved. * @@ -21,10 +21,10 @@ * * 4. This software, with or without modification, must only be used with a * Nordic Semiconductor ASA integrated circuit. - * + * * 5. Any software provided in binary form under this license must not be reverse * engineered, decompiled, modified and/or disassembled. - * + * * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE @@ -35,1583 +35,3838 @@ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * + * */ - - #ifndef SDK_CONFIG_H #define SDK_CONFIG_H // <<< Use Configuration Wizard in Context Menu >>>\n #ifdef USE_APP_CONFIG #include "app_config.h" #endif -// Board Support -// Enable NRF Asserts when Mbed NDEBUG is not set -#if !defined(NDEBUG) && !defined(DEBUG_NRF_USER) -#define DEBUG_NRF_USER -#endif + +// nRF_BLE //========================================================== -// BSP_BTN_BLE_ENABLED - bsp_btn_ble - Button Control for BLE +// BLE_ADVERTISING_ENABLED - ble_advertising - Advertising module + +#ifndef BLE_ADVERTISING_ENABLED +#define BLE_ADVERTISING_ENABLED 0 +#endif + +// BLE_DTM_ENABLED - ble_dtm - Module for testing RF/PHY using DTM commands + -#ifndef BSP_BTN_BLE_ENABLED -#define BSP_BTN_BLE_ENABLED 0 +#ifndef BLE_DTM_ENABLED +#define BLE_DTM_ENABLED 0 #endif -// -//========================================================== +// BLE_RACP_ENABLED - ble_racp - Record Access Control Point library + -// nRF_ANT +#ifndef BLE_RACP_ENABLED +#define BLE_RACP_ENABLED 0 +#endif +// NRF_BLE_QWR_ENABLED - nrf_ble_qwr - Queued writes support module (prepare/execute write) //========================================================== -// ANTFS_ENABLED - ant_fs - ANT File Share module. +#ifndef NRF_BLE_QWR_ENABLED +#define NRF_BLE_QWR_ENABLED 0 +#endif +// NRF_BLE_QWR_MAX_ATTR - Maximum number of attribute handles that can be registered. This number must be adjusted according to the number of attributes for which Queued Writes will be enabled. If it is zero, the module will reject all Queued Write requests. +#ifndef NRF_BLE_QWR_MAX_ATTR +#define NRF_BLE_QWR_MAX_ATTR 0 +#endif + +// + +// PEER_MANAGER_ENABLED - peer_manager - Peer Manager //========================================================== -#ifndef ANTFS_ENABLED -#define ANTFS_ENABLED 0 +#ifndef PEER_MANAGER_ENABLED +#define PEER_MANAGER_ENABLED 0 +#endif +// PM_MAX_REGISTRANTS - Number of event handlers that can be registered. +#ifndef PM_MAX_REGISTRANTS +#define PM_MAX_REGISTRANTS 3 +#endif + +// PM_FLASH_BUFFERS - Number of internal buffers for flash operations. +// Decrease this value to lower RAM usage. + +#ifndef PM_FLASH_BUFFERS +#define PM_FLASH_BUFFERS 2 +#endif + +// PM_CENTRAL_ENABLED - Enable/disable central-specific Peer Manager functionality. + + +// Enable/disable central-specific Peer Manager functionality. + +#ifndef PM_CENTRAL_ENABLED +#define PM_CENTRAL_ENABLED 1 +#endif + +// PM_SERVICE_CHANGED_ENABLED - Enable/disable the service changed management for GATT server in Peer Manager. + + +// If not using a GATT server, or using a server wihout a service changed characteristic, +// disable this to save code space. + +#ifndef PM_SERVICE_CHANGED_ENABLED +#define PM_SERVICE_CHANGED_ENABLED 1 #endif -// ANTFS_CONFIG_NETWORK_NUMBER - ANT-FS network number. -#ifndef ANTFS_CONFIG_NETWORK_NUMBER -#define ANTFS_CONFIG_NETWORK_NUMBER 0 + +// PM_PEER_RANKS_ENABLED - Enable/disable the peer rank management in Peer Manager. + + +// Set this to false to save code space if not using the peer rank API. + +#ifndef PM_PEER_RANKS_ENABLED +#define PM_PEER_RANKS_ENABLED 1 #endif -// ANTFS_CONFIG_CHANNEL_NUMBER - ANT-FS channel number. -#ifndef ANTFS_CONFIG_CHANNEL_NUMBER -#define ANTFS_CONFIG_CHANNEL_NUMBER 0 +// + +// +//========================================================== + +// nRF_BLE_Services + +//========================================================== +// BLE_ANCS_C_ENABLED - ble_ancs_c - Apple Notification Service Client + + +#ifndef BLE_ANCS_C_ENABLED +#define BLE_ANCS_C_ENABLED 0 #endif -// ANTFS_CONFIG_PAIRING_TIMEOUT - Pairing timeout - how long the UI will wait for a response to a pairing request before switching to the link layer, in seconds. -#ifndef ANTFS_CONFIG_PAIRING_TIMEOUT -#define ANTFS_CONFIG_PAIRING_TIMEOUT 120 +// BLE_ANS_C_ENABLED - ble_ans_c - Alert Notification Service Client + + +#ifndef BLE_ANS_C_ENABLED +#define BLE_ANS_C_ENABLED 0 #endif -// ANTFS_CONFIG_LINK_COMMAND_TIMEOUT - Command timeout - how long the client will wait without receiving any commands before switching to the link layer, in seconds. -#ifndef ANTFS_CONFIG_LINK_COMMAND_TIMEOUT -#define ANTFS_CONFIG_LINK_COMMAND_TIMEOUT 10 +// BLE_BAS_C_ENABLED - ble_bas_c - Battery Service Client + + +#ifndef BLE_BAS_C_ENABLED +#define BLE_BAS_C_ENABLED 0 #endif -// ANTFS_CONFIG_TRANS_TYPE - ANT-FS Transmission Type. -#ifndef ANTFS_CONFIG_TRANS_TYPE -#define ANTFS_CONFIG_TRANS_TYPE 10 +// BLE_BAS_ENABLED - ble_bas - Battery Service +//========================================================== +#ifndef BLE_BAS_ENABLED +#define BLE_BAS_ENABLED 0 +#endif +// BLE_BAS_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef BLE_BAS_CONFIG_LOG_ENABLED +#define BLE_BAS_CONFIG_LOG_ENABLED 0 #endif +// BLE_BAS_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -// ANTFS_CONFIG_DEVICE_TYPE - ANT device type for channel configuration. -#ifndef ANTFS_CONFIG_DEVICE_TYPE -#define ANTFS_CONFIG_DEVICE_TYPE 1 +#ifndef BLE_BAS_CONFIG_LOG_LEVEL +#define BLE_BAS_CONFIG_LOG_LEVEL 3 #endif -// ANTFS_CONFIG_BEACON_STATUS_PERIOD - ANT-FS Beacon Message Period. +// BLE_BAS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// <0=> 0.5 Hz -// <1=> 1 Hz -// <2=> 2 Hz -// <3=> 4 Hz -// <4=> 8 Hz +#ifndef BLE_BAS_CONFIG_INFO_COLOR +#define BLE_BAS_CONFIG_INFO_COLOR 0 +#endif + +// BLE_BAS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef ANTFS_CONFIG_BEACON_STATUS_PERIOD -#define ANTFS_CONFIG_BEACON_STATUS_PERIOD 3 +#ifndef BLE_BAS_CONFIG_DEBUG_COLOR +#define BLE_BAS_CONFIG_DEBUG_COLOR 0 #endif -// ANTFS_CONFIG_TRANSMIT_POWER - ANT Transmit Power. +// + +// -// <0=> Lowest ANT Tx power level setting. (-20dBm) -// <1=> ANT Tx power > Lvl 0. (-12dBm) -// <2=> ANT Tx power > Lvl 1. (-4dBm) -// <3=> ANT Tx power > Lvl 2. Default tx power level. (0dBm) -// <4=> ANT Tx power > Lvl 3. (+4dBm) -// <128=> Custom tx power selection +// BLE_CSCS_ENABLED - ble_cscs - Cycling Speed and Cadence Service + -#ifndef ANTFS_CONFIG_TRANSMIT_POWER -#define ANTFS_CONFIG_TRANSMIT_POWER 3 +#ifndef BLE_CSCS_ENABLED +#define BLE_CSCS_ENABLED 0 #endif -// ANTFS_CONFIG_CUSTOM_TRANSMIT_POWER - ANT Custom Transmit Power. -#ifndef ANTFS_CONFIG_CUSTOM_TRANSMIT_POWER -#define ANTFS_CONFIG_CUSTOM_TRANSMIT_POWER 0 +// BLE_CTS_C_ENABLED - ble_cts_c - Current Time Service Client + + +#ifndef BLE_CTS_C_ENABLED +#define BLE_CTS_C_ENABLED 0 #endif -// ANTFS_CONFIG_AUTH_TYPE_PAIRING_ENABLED - Use pairing and key exchange authentication. +// BLE_DIS_ENABLED - ble_dis - Device Information Service + + +#ifndef BLE_DIS_ENABLED +#define BLE_DIS_ENABLED 0 +#endif +// BLE_GLS_ENABLED - ble_gls - Glucose Service + -#ifndef ANTFS_CONFIG_AUTH_TYPE_PAIRING_ENABLED -#define ANTFS_CONFIG_AUTH_TYPE_PAIRING_ENABLED 0 +#ifndef BLE_GLS_ENABLED +#define BLE_GLS_ENABLED 0 #endif -// ANTFS_CONFIG_AUTH_TYPE_PASSKEY_ENABLED - Use passkey authentication. +// BLE_HIDS_ENABLED - ble_hids - Human Interface Device Service + + +#ifndef BLE_HIDS_ENABLED +#define BLE_HIDS_ENABLED 0 +#endif +// BLE_HRS_C_ENABLED - ble_hrs_c - Heart Rate Service Client + -#ifndef ANTFS_CONFIG_AUTH_TYPE_PASSKEY_ENABLED -#define ANTFS_CONFIG_AUTH_TYPE_PASSKEY_ENABLED 0 +#ifndef BLE_HRS_C_ENABLED +#define BLE_HRS_C_ENABLED 0 #endif -// ANTFS_CONFIG_AUTH_TYPE_PASSTHROUGH_ENABLED - Allow host to bypass authentication. +// BLE_HRS_ENABLED - ble_hrs - Heart Rate Service + + +#ifndef BLE_HRS_ENABLED +#define BLE_HRS_ENABLED 0 +#endif +// BLE_HTS_ENABLED - ble_hts - Health Thermometer Service + -#ifndef ANTFS_CONFIG_AUTH_TYPE_PASSTHROUGH_ENABLED -#define ANTFS_CONFIG_AUTH_TYPE_PASSTHROUGH_ENABLED 0 +#ifndef BLE_HTS_ENABLED +#define BLE_HTS_ENABLED 0 #endif -// ANTFS_CONFIG_UPLOAD_ENABLED - Support upload operation. +// BLE_IAS_C_ENABLED - ble_ias_c - Immediate Alert Service Client + + +#ifndef BLE_IAS_C_ENABLED +#define BLE_IAS_C_ENABLED 0 +#endif +// BLE_IAS_ENABLED - ble_ias - Immediate Alert Service +//========================================================== +#ifndef BLE_IAS_ENABLED +#define BLE_IAS_ENABLED 0 +#endif +// BLE_IAS_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef BLE_IAS_CONFIG_LOG_ENABLED +#define BLE_IAS_CONFIG_LOG_ENABLED 0 +#endif +// BLE_IAS_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -#ifndef ANTFS_CONFIG_UPLOAD_ENABLED -#define ANTFS_CONFIG_UPLOAD_ENABLED 0 +#ifndef BLE_IAS_CONFIG_LOG_LEVEL +#define BLE_IAS_CONFIG_LOG_LEVEL 3 #endif -// ANTFS_CONFIG_DEBUG_LED_ENABLED - Enables LED debug in the module. +// BLE_IAS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef BLE_IAS_CONFIG_INFO_COLOR +#define BLE_IAS_CONFIG_INFO_COLOR 0 +#endif +// BLE_IAS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef ANTFS_CONFIG_DEBUG_LED_ENABLED -#define ANTFS_CONFIG_DEBUG_LED_ENABLED 0 +#ifndef BLE_IAS_CONFIG_DEBUG_COLOR +#define BLE_IAS_CONFIG_DEBUG_COLOR 0 #endif // -// ANT_BPWR_ENABLED - ant_bpwr - Bicycle Power Profile +// + +// BLE_LBS_C_ENABLED - ble_lbs_c - Nordic LED Button Service Client + + +#ifndef BLE_LBS_C_ENABLED +#define BLE_LBS_C_ENABLED 0 +#endif + +// BLE_LBS_ENABLED - ble_lbs - LED Button Service + + +#ifndef BLE_LBS_ENABLED +#define BLE_LBS_ENABLED 0 +#endif + +// BLE_LLS_ENABLED - ble_lls - Link Loss Service + + +#ifndef BLE_LLS_ENABLED +#define BLE_LLS_ENABLED 0 +#endif + +// BLE_NUS_C_ENABLED - ble_nus_c - Nordic UART Central Service + + +#ifndef BLE_NUS_C_ENABLED +#define BLE_NUS_C_ENABLED 0 +#endif + +// BLE_NUS_ENABLED - ble_nus - Nordic UART Service //========================================================== -#ifndef ANT_BPWR_ENABLED -#define ANT_BPWR_ENABLED 0 +#ifndef BLE_NUS_ENABLED +#define BLE_NUS_ENABLED 0 #endif -// ANT_BPWR_LOG_ENABLED - Enables general logging in the module. +// BLE_NUS_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== -#ifndef ANT_BPWR_LOG_ENABLED -#define ANT_BPWR_LOG_ENABLED 0 +#ifndef BLE_NUS_CONFIG_LOG_ENABLED +#define BLE_NUS_CONFIG_LOG_ENABLED 0 #endif -// ANT_BPWR_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// BLE_NUS_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -#ifndef ANT_BPWR_LOG_LEVEL -#define ANT_BPWR_LOG_LEVEL 3 +#ifndef BLE_NUS_CONFIG_LOG_LEVEL +#define BLE_NUS_CONFIG_LOG_LEVEL 3 #endif -// ANT_BPWR_INFO_COLOR - ANSI escape code prefix. +// BLE_NUS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef BLE_NUS_CONFIG_INFO_COLOR +#define BLE_NUS_CONFIG_INFO_COLOR 0 +#endif + +// BLE_NUS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef ANT_BPWR_INFO_COLOR -#define ANT_BPWR_INFO_COLOR 0 +#ifndef BLE_NUS_CONFIG_DEBUG_COLOR +#define BLE_NUS_CONFIG_DEBUG_COLOR 0 #endif // -// ANT_BPWR_COMMON_LOG_ENABLED - Enables logging of BPWR tracing common data. -//========================================================== -#ifndef ANT_BPWR_COMMON_LOG_ENABLED -#define ANT_BPWR_COMMON_LOG_ENABLED 0 +// + +// BLE_RSCS_C_ENABLED - ble_rscs_c - Running Speed and Cadence Client + + +#ifndef BLE_RSCS_C_ENABLED +#define BLE_RSCS_C_ENABLED 0 #endif -// ANT_BPWR_COMMON_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// BLE_RSCS_ENABLED - ble_rscs - Running Speed and Cadence Service + -#ifndef ANT_BPWR_COMMON_LOG_LEVEL -#define ANT_BPWR_COMMON_LOG_LEVEL 3 +#ifndef BLE_RSCS_ENABLED +#define BLE_RSCS_ENABLED 0 #endif -// ANT_BPWR_COMMON_INFO_COLOR - ANSI escape code prefix. +// BLE_TPS_ENABLED - ble_tps - TX Power Service + -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef BLE_TPS_ENABLED +#define BLE_TPS_ENABLED 0 +#endif + +// +//========================================================== + +// nRF_Core + +//========================================================== +// NRF_MPU_ENABLED - nrf_mpu - Module for MPU +//========================================================== +#ifndef NRF_MPU_ENABLED +#define NRF_MPU_ENABLED 0 +#endif +// NRF_MPU_CLI_CMDS - Enable CLI commands specific to the module + -#ifndef ANT_BPWR_COMMON_INFO_COLOR -#define ANT_BPWR_COMMON_INFO_COLOR 0 +#ifndef NRF_MPU_CLI_CMDS +#define NRF_MPU_CLI_CMDS 0 #endif // -// ANT_BPWR_PAGE_TORQUE_LOG_ENABLED - Enables logging of BPWR torque page in the module. +// NRF_STACK_GUARD_ENABLED - nrf_stack_guard - Module for Protecting Stack //========================================================== -#ifndef ANT_BPWR_PAGE_TORQUE_LOG_ENABLED -#define ANT_BPWR_PAGE_TORQUE_LOG_ENABLED 0 +#ifndef NRF_STACK_GUARD_ENABLED +#define NRF_STACK_GUARD_ENABLED 0 #endif -// ANT_BPWR_PAGE_TORQUE_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRF_STACK_GUARD_CONFIG_SIZE - Size of stack guard + +// <5=> 32 bytes +// <6=> 64 bytes +// <7=> 128 bytes +// <8=> 256 bytes +// <9=> 512 bytes +// <10=> 1024 bytes +// <11=> 2048 bytes +// <12=> 4096 bytes -#ifndef ANT_BPWR_PAGE_TORQUE_LOG_LEVEL -#define ANT_BPWR_PAGE_TORQUE_LOG_LEVEL 3 +#ifndef NRF_STACK_GUARD_CONFIG_SIZE +#define NRF_STACK_GUARD_CONFIG_SIZE 7 #endif -// ANT_BPWR_PAGE_TORQUE_INFO_COLOR - ANSI escape code prefix. +// -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +// +//========================================================== + +// nRF_Crypto + +//========================================================== +// NRF_CRYPTO_ENABLED - nrf_crypto - Cryptography library +//========================================================== +#ifndef NRF_CRYPTO_ENABLED +#define NRF_CRYPTO_ENABLED 1 +#endif +// NRF_CRYPTO_ALLOCATOR - Memory allocator + -#ifndef ANT_BPWR_PAGE_TORQUE_INFO_COLOR -#define ANT_BPWR_PAGE_TORQUE_INFO_COLOR 0 +// Choose memory allocator used by nrf_crypto. Default is alloca if possible or nrf_malloc otherwise. If 'User macros' are selected then user have to create 'nrf_crypto_allocator.h' file containing NRF_CRYPTO_ALLOC, NRF_CRYPTO_FREE and NRF_CRYPTO_ALLOC_ON_STACK +// <0=> Default +// <1=> User macros +// <2=> On stack (alloca) +// <3=> C dynamic memory (malloc) +// <4=> SDK Memory Manager (nrf_malloc) + +#ifndef NRF_CRYPTO_ALLOCATOR +#define NRF_CRYPTO_ALLOCATOR 0 #endif -// +// NRF_CRYPTO_BACKEND_CC310_BL_ENABLED - Enable the ARM Cryptocell CC310 reduced backend. -// ANT_BPWR_PAGE_1_LOG_ENABLED - Enables logging of BPWR page 1 in the module. +// The CC310 hardware-accelerated cryptography backend with reduced functionality and footprint (only available on nRF52840). //========================================================== -#ifndef ANT_BPWR_PAGE_1_LOG_ENABLED -#define ANT_BPWR_PAGE_1_LOG_ENABLED 0 +#ifndef NRF_CRYPTO_BACKEND_CC310_BL_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_BL_ENABLED 0 #endif -// ANT_BPWR_PAGE_1_LOG_LEVEL - Default Severity level +// NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP224R1_ENABLED - Enable the secp224r1 elliptic curve support using CC310_BL. + -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +#ifndef NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP224R1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP224R1_ENABLED 0 +#endif -#ifndef ANT_BPWR_PAGE_1_LOG_LEVEL -#define ANT_BPWR_PAGE_1_LOG_LEVEL 3 +// NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP256R1_ENABLED - Enable the secp256r1 elliptic curve support using CC310_BL. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP256R1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP256R1_ENABLED 1 #endif -// ANT_BPWR_PAGE_1_INFO_COLOR - ANSI escape code prefix. +// NRF_CRYPTO_BACKEND_CC310_BL_HASH_SHA256_ENABLED - CC310_BL SHA-256 hash functionality. + -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +// CC310_BL backend implementation for hardware-accelerated SHA-256. + +#ifndef NRF_CRYPTO_BACKEND_CC310_BL_HASH_SHA256_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_BL_HASH_SHA256_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_BL_HASH_LITTLE_ENDIAN_DIGEST_ENABLED - nrf_cc310_bl hash outputs digests in little endian + + +// Makes the nRF SH hash functions output digests in little endian format. Only for use in nRF SDK DFU! + +#ifndef NRF_CRYPTO_BACKEND_CC310_BL_HASH_LITTLE_ENDIAN_DIGEST_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_BL_HASH_LITTLE_ENDIAN_DIGEST_ENABLED 0 +#endif + +// NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_ENABLED - nrf_cc310_bl buffers to RAM before running hash operation + + +// Enabling this makes hashing of addresses in FLASH range possible. Size of buffer allocated for hashing is set by NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE + +#ifndef NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_ENABLED 0 +#endif + +// NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE - nrf_cc310_bl hash outputs digests in little endian +// Makes the nrf_cc310_bl hash functions output digests in little endian format. Only for use in nRF SDK DFU! + +#ifndef NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE +#define NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE 4096 +#endif + +// NRF_CRYPTO_BACKEND_CC310_BL_ECC_LITTLE_ENDIAN_ENABLED - Enable non-standard little endian byte order in nrf_cc310_bl ECC functions. + + +// This affects parameters for all nrf_cc310_bl ECC APIs (raw keys, signature, digest). Only for use in nRF SDK DFU! + +#ifndef NRF_CRYPTO_BACKEND_CC310_BL_ECC_LITTLE_ENDIAN_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_BL_ECC_LITTLE_ENDIAN_ENABLED 0 +#endif + +// + +// NRF_CRYPTO_BACKEND_CC310_ENABLED - Enable the ARM Cryptocell CC310 backend. + +// The CC310 hardware-accelerated cryptography backend (only available on nRF52840). +//========================================================== +#ifndef NRF_CRYPTO_BACKEND_CC310_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ENABLED 0 +#endif +// NRF_CRYPTO_BACKEND_CC310_AES_CBC_ENABLED - Enable the AES CBC mode using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CBC_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_AES_CBC_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_AES_CTR_ENABLED - Enable the AES CTR mode using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CTR_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_AES_CTR_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_AES_ECB_ENABLED - Enable the AES ECB mode using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_AES_ECB_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_AES_ECB_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_AES_CBC_MAC_ENABLED - Enable the AES CBC_MAC mode using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CBC_MAC_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_AES_CBC_MAC_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_AES_CMAC_ENABLED - Enable the AES CMAC mode using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CMAC_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_AES_CMAC_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_AES_CCM_ENABLED - Enable the AES CCM mode using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CCM_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_AES_CCM_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_AES_CCM_STAR_ENABLED - Enable the AES CCM* mode using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CCM_STAR_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_AES_CCM_STAR_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_CHACHA_POLY_ENABLED - Enable the CHACHA-POLY mode using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_CHACHA_POLY_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_CHACHA_POLY_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R1_ENABLED - Enable the secp160r1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R2_ENABLED - Enable the secp160r2 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R2_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R2_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP192R1_ENABLED - Enable the secp192r1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP192R1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP192R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP224R1_ENABLED - Enable the secp224r1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP224R1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP224R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP256R1_ENABLED - Enable the secp256r1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP256R1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP256R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP384R1_ENABLED - Enable the secp384r1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP384R1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP384R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP521R1_ENABLED - Enable the secp521r1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP521R1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP521R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP160K1_ENABLED - Enable the secp160k1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP160K1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP160K1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP192K1_ENABLED - Enable the secp192k1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP192K1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP192K1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP224K1_ENABLED - Enable the secp224k1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP224K1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP224K1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP256K1_ENABLED - Enable the secp256k1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP256K1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP256K1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_HASH_SHA256_ENABLED - CC310 SHA-256 hash functionality. + + +// CC310 backend implementation for hardware-accelerated SHA-256. + +#ifndef NRF_CRYPTO_BACKEND_CC310_HASH_SHA256_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_HASH_SHA256_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_HASH_SHA512_ENABLED - CC310 SHA-512 hash functionality + + +// CC310 backend implementation for SHA-512 (in software). + +#ifndef NRF_CRYPTO_BACKEND_CC310_HASH_SHA512_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_HASH_SHA512_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_HMAC_SHA256_ENABLED - CC310 HMAC using SHA-256 + + +// CC310 backend implementation for HMAC using hardware-accelerated SHA-256. + +#ifndef NRF_CRYPTO_BACKEND_CC310_HMAC_SHA256_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_HMAC_SHA256_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_HMAC_SHA512_ENABLED - CC310 HMAC using SHA-512 + + +// CC310 backend implementation for HMAC using SHA-512 (in software). + +#ifndef NRF_CRYPTO_BACKEND_CC310_HMAC_SHA512_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_HMAC_SHA512_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_RNG_ENABLED - Enable RNG support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_RNG_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_RNG_ENABLED 1 +#endif + +// + +// NRF_CRYPTO_BACKEND_CIFRA_ENABLED - Enable the Cifra backend. +//========================================================== +#ifndef NRF_CRYPTO_BACKEND_CIFRA_ENABLED +#define NRF_CRYPTO_BACKEND_CIFRA_ENABLED 0 +#endif +// NRF_CRYPTO_BACKEND_CIFRA_AES_EAX_ENABLED - Enable the AES EAX mode using Cifra. + + +#ifndef NRF_CRYPTO_BACKEND_CIFRA_AES_EAX_ENABLED +#define NRF_CRYPTO_BACKEND_CIFRA_AES_EAX_ENABLED 1 +#endif + +// + +// NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED - Enable the mbed TLS backend. +//========================================================== +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED 0 +#endif +// NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_ENABLED - Enable the AES CBC mode mbed TLS. + + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_AES_CTR_ENABLED - Enable the AES CTR mode using mbed TLS. + + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CTR_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CTR_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_AES_CFB_ENABLED - Enable the AES CFB mode using mbed TLS. + + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CFB_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CFB_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_AES_ECB_ENABLED - Enable the AES ECB mode using mbed TLS. + + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_ECB_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_ECB_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_MAC_ENABLED - Enable the AES CBC MAC mode using mbed TLS. + + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_MAC_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_MAC_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_AES_CMAC_ENABLED - Enable the AES CMAC mode using mbed TLS. + + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CMAC_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CMAC_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_AES_CCM_ENABLED - Enable the AES CCM mode using mbed TLS. + + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CCM_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CCM_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_AES_GCM_ENABLED - Enable the AES GCM mode using mbed TLS. + + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_GCM_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_GCM_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192R1_ENABLED - Enable secp192r1 (NIST 192-bit) curve + + +// Enable this setting if you need secp192r1 (NIST 192-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192R1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED - Enable secp224r1 (NIST 224-bit) curve + + +// Enable this setting if you need secp224r1 (NIST 224-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED - Enable secp256r1 (NIST 256-bit) curve + + +// Enable this setting if you need secp256r1 (NIST 256-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED - Enable secp384r1 (NIST 384-bit) curve + + +// Enable this setting if you need secp384r1 (NIST 384-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED - Enable secp521r1 (NIST 521-bit) curve + + +// Enable this setting if you need secp521r1 (NIST 521-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED - Enable secp192k1 (Koblitz 192-bit) curve + + +// Enable this setting if you need secp192k1 (Koblitz 192-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED - Enable secp224k1 (Koblitz 224-bit) curve + + +// Enable this setting if you need secp224k1 (Koblitz 224-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED - Enable secp256k1 (Koblitz 256-bit) curve + + +// Enable this setting if you need secp256k1 (Koblitz 256-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED - Enable bp256r1 (Brainpool 256-bit) curve + + +// Enable this setting if you need bp256r1 (Brainpool 256-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED - Enable bp384r1 (Brainpool 384-bit) curve + + +// Enable this setting if you need bp384r1 (Brainpool 384-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED - Enable bp512r1 (Brainpool 512-bit) curve + + +// Enable this setting if you need bp512r1 (Brainpool 512-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED - Enable Curve25519 curve + + +// Enable this setting if you need Curve25519 support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA256_ENABLED - Enable mbed TLS SHA-256 hash functionality. + + +// mbed TLS backend implementation for SHA-256. + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA256_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA256_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED - Enable mbed TLS SHA-512 hash functionality. + + +// mbed TLS backend implementation for SHA-512. + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA256_ENABLED - Enable mbed TLS HMAC using SHA-256. + + +// mbed TLS backend implementation for HMAC using SHA-256. + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA256_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA256_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED - Enable mbed TLS HMAC using SHA-512. + + +// mbed TLS backend implementation for HMAC using SHA-512. + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED 1 +#endif + +// + +// NRF_CRYPTO_BACKEND_MICRO_ECC_ENABLED - Enable the micro-ecc backend. +//========================================================== +#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ENABLED +#define NRF_CRYPTO_BACKEND_MICRO_ECC_ENABLED 0 +#endif +// NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP192R1_ENABLED - Enable secp192r1 (NIST 192-bit) curve + + +// Enable this setting if you need secp192r1 (NIST 192-bit) support using micro-ecc + +#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP192R1_ENABLED +#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP192R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP224R1_ENABLED - Enable secp224r1 (NIST 224-bit) curve + + +// Enable this setting if you need secp224r1 (NIST 224-bit) support using micro-ecc + +#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP224R1_ENABLED +#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP224R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256R1_ENABLED - Enable secp256r1 (NIST 256-bit) curve + + +// Enable this setting if you need secp256r1 (NIST 256-bit) support using micro-ecc + +#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256R1_ENABLED +#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256K1_ENABLED - Enable secp256k1 (Koblitz 256-bit) curve + + +// Enable this setting if you need secp256k1 (Koblitz 256-bit) support using micro-ecc + +#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256K1_ENABLED +#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256K1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MICRO_ECC_PUBLIC_KEY_TRUSTED_ENABLED - Always trust raw public key (it will cause a security issue if the public key comes from an untrusted source) + + +// Enable this setting if you want to reduce flash usage. Only for use in nRF SDK DFU! Never enable it if the raw public key comes from an untrusted source. + +#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_PUBLIC_KEY_TRUSTED_ENABLED +#define NRF_CRYPTO_BACKEND_MICRO_ECC_PUBLIC_KEY_TRUSTED_ENABLED 0 +#endif + +// NRF_CRYPTO_BACKEND_MICRO_ECC_LITTLE_ENDIAN_ENABLED - Enable non-standard little endian byte order. + + +// This affects parameters for all ECC API (raw keys, signature, digest, shared secret). Only for use in nRF SDK DFU! + +#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_LITTLE_ENDIAN_ENABLED +#define NRF_CRYPTO_BACKEND_MICRO_ECC_LITTLE_ENDIAN_ENABLED 0 +#endif + +// + +// NRF_CRYPTO_BACKEND_NRF_HW_RNG_ENABLED - Enable the nRF HW RNG backend. + +// The nRF HW backend provide access to RNG peripheral in nRF5x devices. +//========================================================== +#ifndef NRF_CRYPTO_BACKEND_NRF_HW_RNG_ENABLED +#define NRF_CRYPTO_BACKEND_NRF_HW_RNG_ENABLED 0 +#endif +// NRF_CRYPTO_BACKEND_NRF_HW_RNG_MBEDTLS_CTR_DRBG_ENABLED - Enable mbed TLS CTR-DRBG algorithm. + + +// Enable mbed TLS CTR-DRBG standardized by NIST (NIST SP 800-90A Rev. 1). The nRF HW RNG is used as an entropy source for seeding. + +#ifndef NRF_CRYPTO_BACKEND_NRF_HW_RNG_MBEDTLS_CTR_DRBG_ENABLED +#define NRF_CRYPTO_BACKEND_NRF_HW_RNG_MBEDTLS_CTR_DRBG_ENABLED 1 +#endif + +// + +// NRF_CRYPTO_BACKEND_NRF_SW_ENABLED - Enable the legacy nRFx sw for crypto. + +// The nRF SW cryptography backend (only used in bootloader context). +//========================================================== +#ifndef NRF_CRYPTO_BACKEND_NRF_SW_ENABLED +#define NRF_CRYPTO_BACKEND_NRF_SW_ENABLED 0 +#endif +// NRF_CRYPTO_BACKEND_NRF_SW_HASH_SHA256_ENABLED - nRF SW hash backend support for SHA-256 + + +// The nRF SW backend provide access to nRF SDK legacy hash implementation of SHA-256. + +#ifndef NRF_CRYPTO_BACKEND_NRF_SW_HASH_SHA256_ENABLED +#define NRF_CRYPTO_BACKEND_NRF_SW_HASH_SHA256_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_NRF_SW_HASH_LITTLE_ENDIAN_DIGEST_ENABLED - nRF SW hash outputs digests in little endian + + +// Makes the nRF SH hash functions output digests in little endian format. Only for use in nRF SDK DFU! + +#ifndef NRF_CRYPTO_BACKEND_NRF_SW_HASH_LITTLE_ENDIAN_DIGEST_ENABLED +#define NRF_CRYPTO_BACKEND_NRF_SW_HASH_LITTLE_ENDIAN_DIGEST_ENABLED 1 +#endif + +// + +// NRF_CRYPTO_BACKEND_OBERON_ENABLED - Enable the Oberon backend + +// The Oberon backend +//========================================================== +#ifndef NRF_CRYPTO_BACKEND_OBERON_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_ENABLED 0 +#endif +// NRF_CRYPTO_BACKEND_OBERON_CHACHA_POLY_ENABLED - Enable the CHACHA-POLY mode using Oberon. + + +#ifndef NRF_CRYPTO_BACKEND_OBERON_CHACHA_POLY_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_CHACHA_POLY_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_OBERON_ECC_SECP256R1_ENABLED - Enable secp256r1 curve + + +// Enable this setting if you need secp256r1 curve support using Oberon library + +#ifndef NRF_CRYPTO_BACKEND_OBERON_ECC_SECP256R1_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_ECC_SECP256R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_OBERON_ECC_CURVE25519_ENABLED - Enable Curve25519 ECDH + + +// Enable this setting if you need Curve25519 ECDH support using Oberon library + +#ifndef NRF_CRYPTO_BACKEND_OBERON_ECC_CURVE25519_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_ECC_CURVE25519_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_OBERON_ECC_ED25519_ENABLED - Enable Ed25519 signature scheme + + +// Enable this setting if you need Ed25519 support using Oberon library + +#ifndef NRF_CRYPTO_BACKEND_OBERON_ECC_ED25519_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_ECC_ED25519_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_OBERON_HASH_SHA256_ENABLED - Oberon SHA-256 hash functionality + + +// Oberon backend implementation for SHA-256. + +#ifndef NRF_CRYPTO_BACKEND_OBERON_HASH_SHA256_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_HASH_SHA256_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_OBERON_HASH_SHA512_ENABLED - Oberon SHA-512 hash functionality + + +// Oberon backend implementation for SHA-512. + +#ifndef NRF_CRYPTO_BACKEND_OBERON_HASH_SHA512_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_HASH_SHA512_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA256_ENABLED - Oberon HMAC using SHA-256 + + +// Oberon backend implementation for HMAC using SHA-256. + +#ifndef NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA256_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA256_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA512_ENABLED - Oberon HMAC using SHA-512 + + +// Oberon backend implementation for HMAC using SHA-512. + +#ifndef NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA512_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA512_ENABLED 1 +#endif + +// + +// + +// +//========================================================== + +// nRF_DFU + +//========================================================== +// ble_dfu - Device Firmware Update + +//========================================================== +// BLE_DFU_ENABLED - Enable DFU Service. + + +#ifndef BLE_DFU_ENABLED +#define BLE_DFU_ENABLED 0 +#endif + +// NRF_DFU_BLE_BUTTONLESS_SUPPORTS_BONDS - Buttonless DFU supports bonds. + + +#ifndef NRF_DFU_BLE_BUTTONLESS_SUPPORTS_BONDS +#define NRF_DFU_BLE_BUTTONLESS_SUPPORTS_BONDS 0 +#endif + +// +//========================================================== + +// +//========================================================== + +// nRF_Drivers + +//========================================================== +// CLOCK_ENABLED - nrf_drv_clock - CLOCK peripheral driver - legacy layer +//========================================================== +#ifndef CLOCK_ENABLED +#define CLOCK_ENABLED 0 +#endif +// CLOCK_CONFIG_LF_SRC - LF Clock Source + +// <0=> RC +// <1=> XTAL +// <2=> Synth + +#ifndef CLOCK_CONFIG_LF_SRC +#define CLOCK_CONFIG_LF_SRC 1 +#endif + +// CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef CLOCK_CONFIG_IRQ_PRIORITY +#define CLOCK_CONFIG_IRQ_PRIORITY 7 +#endif + +// + +// COMP_ENABLED - nrf_drv_comp - COMP peripheral driver - legacy layer +//========================================================== +#ifndef COMP_ENABLED +#define COMP_ENABLED 0 +#endif +// COMP_CONFIG_REF - Reference voltage + +// <0=> Internal 1.2V +// <1=> Internal 1.8V +// <2=> Internal 2.4V +// <4=> VDD +// <7=> ARef + +#ifndef COMP_CONFIG_REF +#define COMP_CONFIG_REF 1 +#endif + +// COMP_CONFIG_MAIN_MODE - Main mode + +// <0=> Single ended +// <1=> Differential + +#ifndef COMP_CONFIG_MAIN_MODE +#define COMP_CONFIG_MAIN_MODE 0 +#endif + +// COMP_CONFIG_SPEED_MODE - Speed mode + +// <0=> Low power +// <1=> Normal +// <2=> High speed + +#ifndef COMP_CONFIG_SPEED_MODE +#define COMP_CONFIG_SPEED_MODE 2 +#endif + +// COMP_CONFIG_HYST - Hystheresis + +// <0=> No +// <1=> 50mV + +#ifndef COMP_CONFIG_HYST +#define COMP_CONFIG_HYST 0 +#endif + +// COMP_CONFIG_ISOURCE - Current Source + +// <0=> Off +// <1=> 2.5 uA +// <2=> 5 uA +// <3=> 10 uA + +#ifndef COMP_CONFIG_ISOURCE +#define COMP_CONFIG_ISOURCE 0 +#endif + +// COMP_CONFIG_INPUT - Analog input + +// <0=> 0 +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef COMP_CONFIG_INPUT +#define COMP_CONFIG_INPUT 0 +#endif + +// COMP_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef COMP_CONFIG_IRQ_PRIORITY +#define COMP_CONFIG_IRQ_PRIORITY 7 +#endif + +// + +// EGU_ENABLED - nrf_drv_swi - SWI(EGU) peripheral driver - legacy layer + + +#ifndef EGU_ENABLED +#define EGU_ENABLED 0 +#endif + +// GPIOTE_ENABLED - nrf_drv_gpiote - GPIOTE peripheral driver - legacy layer +//========================================================== +#ifndef GPIOTE_ENABLED +#define GPIOTE_ENABLED 1 +#endif +// GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins +#ifndef GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS +#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1 +#endif + +// GPIOTE_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef GPIOTE_CONFIG_IRQ_PRIORITY +#define GPIOTE_CONFIG_IRQ_PRIORITY 7 +#endif + +// + +// I2S_ENABLED - nrf_drv_i2s - I2S peripheral driver - legacy layer +//========================================================== +#ifndef I2S_ENABLED +#define I2S_ENABLED 0 +#endif +// I2S_CONFIG_SCK_PIN - SCK pin <0-31> + + +#ifndef I2S_CONFIG_SCK_PIN +#define I2S_CONFIG_SCK_PIN 31 +#endif + +// I2S_CONFIG_LRCK_PIN - LRCK pin <1-31> + + +#ifndef I2S_CONFIG_LRCK_PIN +#define I2S_CONFIG_LRCK_PIN 30 +#endif + +// I2S_CONFIG_MCK_PIN - MCK pin +#ifndef I2S_CONFIG_MCK_PIN +#define I2S_CONFIG_MCK_PIN 255 +#endif + +// I2S_CONFIG_SDOUT_PIN - SDOUT pin <0-31> + + +#ifndef I2S_CONFIG_SDOUT_PIN +#define I2S_CONFIG_SDOUT_PIN 29 +#endif + +// I2S_CONFIG_SDIN_PIN - SDIN pin <0-31> + + +#ifndef I2S_CONFIG_SDIN_PIN +#define I2S_CONFIG_SDIN_PIN 28 +#endif + +// I2S_CONFIG_MASTER - Mode + +// <0=> Master +// <1=> Slave + +#ifndef I2S_CONFIG_MASTER +#define I2S_CONFIG_MASTER 0 +#endif + +// I2S_CONFIG_FORMAT - Format + +// <0=> I2S +// <1=> Aligned + +#ifndef I2S_CONFIG_FORMAT +#define I2S_CONFIG_FORMAT 0 +#endif + +// I2S_CONFIG_ALIGN - Alignment + +// <0=> Left +// <1=> Right + +#ifndef I2S_CONFIG_ALIGN +#define I2S_CONFIG_ALIGN 0 +#endif + +// I2S_CONFIG_SWIDTH - Sample width (bits) + +// <0=> 8 +// <1=> 16 +// <2=> 24 + +#ifndef I2S_CONFIG_SWIDTH +#define I2S_CONFIG_SWIDTH 1 +#endif + +// I2S_CONFIG_CHANNELS - Channels + +// <0=> Stereo +// <1=> Left +// <2=> Right + +#ifndef I2S_CONFIG_CHANNELS +#define I2S_CONFIG_CHANNELS 1 +#endif + +// I2S_CONFIG_MCK_SETUP - MCK behavior + +// <0=> Disabled +// <2147483648=> 32MHz/2 +// <1342177280=> 32MHz/3 +// <1073741824=> 32MHz/4 +// <805306368=> 32MHz/5 +// <671088640=> 32MHz/6 +// <536870912=> 32MHz/8 +// <402653184=> 32MHz/10 +// <369098752=> 32MHz/11 +// <285212672=> 32MHz/15 +// <268435456=> 32MHz/16 +// <201326592=> 32MHz/21 +// <184549376=> 32MHz/23 +// <142606336=> 32MHz/30 +// <138412032=> 32MHz/31 +// <134217728=> 32MHz/32 +// <100663296=> 32MHz/42 +// <68157440=> 32MHz/63 +// <34340864=> 32MHz/125 + +#ifndef I2S_CONFIG_MCK_SETUP +#define I2S_CONFIG_MCK_SETUP 536870912 +#endif + +// I2S_CONFIG_RATIO - MCK/LRCK ratio + +// <0=> 32x +// <1=> 48x +// <2=> 64x +// <3=> 96x +// <4=> 128x +// <5=> 192x +// <6=> 256x +// <7=> 384x +// <8=> 512x + +#ifndef I2S_CONFIG_RATIO +#define I2S_CONFIG_RATIO 2000 +#endif + +// I2S_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef I2S_CONFIG_IRQ_PRIORITY +#define I2S_CONFIG_IRQ_PRIORITY 7 +#endif + +// I2S_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef I2S_CONFIG_LOG_ENABLED +#define I2S_CONFIG_LOG_ENABLED 0 +#endif +// I2S_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef I2S_CONFIG_LOG_LEVEL +#define I2S_CONFIG_LOG_LEVEL 3 +#endif + +// I2S_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef I2S_CONFIG_INFO_COLOR +#define I2S_CONFIG_INFO_COLOR 0 +#endif + +// I2S_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef I2S_CONFIG_DEBUG_COLOR +#define I2S_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// LPCOMP_ENABLED - nrf_drv_lpcomp - LPCOMP peripheral driver - legacy layer +//========================================================== +#ifndef LPCOMP_ENABLED +#define LPCOMP_ENABLED 0 +#endif +// LPCOMP_CONFIG_REFERENCE - Reference voltage + +// <0=> Supply 1/8 +// <1=> Supply 2/8 +// <2=> Supply 3/8 +// <3=> Supply 4/8 +// <4=> Supply 5/8 +// <5=> Supply 6/8 +// <6=> Supply 7/8 +// <8=> Supply 1/16 (nRF52) +// <9=> Supply 3/16 (nRF52) +// <10=> Supply 5/16 (nRF52) +// <11=> Supply 7/16 (nRF52) +// <12=> Supply 9/16 (nRF52) +// <13=> Supply 11/16 (nRF52) +// <14=> Supply 13/16 (nRF52) +// <15=> Supply 15/16 (nRF52) +// <7=> External Ref 0 +// <65543=> External Ref 1 + +#ifndef LPCOMP_CONFIG_REFERENCE +#define LPCOMP_CONFIG_REFERENCE 3 +#endif + +// LPCOMP_CONFIG_DETECTION - Detection + +// <0=> Crossing +// <1=> Up +// <2=> Down + +#ifndef LPCOMP_CONFIG_DETECTION +#define LPCOMP_CONFIG_DETECTION 2 +#endif + +// LPCOMP_CONFIG_INPUT - Analog input + +// <0=> 0 +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef LPCOMP_CONFIG_INPUT +#define LPCOMP_CONFIG_INPUT 0 +#endif + +// LPCOMP_CONFIG_HYST - Hysteresis + + +#ifndef LPCOMP_CONFIG_HYST +#define LPCOMP_CONFIG_HYST 0 +#endif + +// LPCOMP_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef LPCOMP_CONFIG_IRQ_PRIORITY +#define LPCOMP_CONFIG_IRQ_PRIORITY 7 +#endif + +// + +// NRFX_CLOCK_ENABLED - nrfx_clock - CLOCK peripheral driver +//========================================================== +#ifndef NRFX_CLOCK_ENABLED +#define NRFX_CLOCK_ENABLED 0 +#endif +// NRFX_CLOCK_CONFIG_LF_SRC - LF Clock Source + +// <0=> RC +// <1=> XTAL +// <2=> Synth + +#ifndef NRFX_CLOCK_CONFIG_LF_SRC +#define NRFX_CLOCK_CONFIG_LF_SRC 1 +#endif + +// NRFX_CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_CLOCK_CONFIG_IRQ_PRIORITY +#define NRFX_CLOCK_CONFIG_IRQ_PRIORITY 7 +#endif + +// NRFX_CLOCK_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_CLOCK_CONFIG_LOG_ENABLED +#define NRFX_CLOCK_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_CLOCK_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_CLOCK_CONFIG_LOG_LEVEL +#define NRFX_CLOCK_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_CLOCK_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_CLOCK_CONFIG_INFO_COLOR +#define NRFX_CLOCK_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_CLOCK_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_CLOCK_CONFIG_DEBUG_COLOR +#define NRFX_CLOCK_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_COMP_ENABLED - nrfx_comp - COMP peripheral driver +//========================================================== +#ifndef NRFX_COMP_ENABLED +#define NRFX_COMP_ENABLED 0 +#endif +// NRFX_COMP_CONFIG_REF - Reference voltage + +// <0=> Internal 1.2V +// <1=> Internal 1.8V +// <2=> Internal 2.4V +// <4=> VDD +// <7=> ARef + +#ifndef NRFX_COMP_CONFIG_REF +#define NRFX_COMP_CONFIG_REF 1 +#endif -#ifndef ANT_BPWR_PAGE_1_INFO_COLOR -#define ANT_BPWR_PAGE_1_INFO_COLOR 0 +// NRFX_COMP_CONFIG_MAIN_MODE - Main mode + +// <0=> Single ended +// <1=> Differential + +#ifndef NRFX_COMP_CONFIG_MAIN_MODE +#define NRFX_COMP_CONFIG_MAIN_MODE 0 #endif -// +// NRFX_COMP_CONFIG_SPEED_MODE - Speed mode + +// <0=> Low power +// <1=> Normal +// <2=> High speed -// ANT_BPWR_PAGE_16_LOG_ENABLED - Enables logging of BPWR page 16 in the module. -//========================================================== -#ifndef ANT_BPWR_PAGE_16_LOG_ENABLED -#define ANT_BPWR_PAGE_16_LOG_ENABLED 0 +#ifndef NRFX_COMP_CONFIG_SPEED_MODE +#define NRFX_COMP_CONFIG_SPEED_MODE 2 #endif -// ANT_BPWR_PAGE_16_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_COMP_CONFIG_HYST - Hystheresis + +// <0=> No +// <1=> 50mV -#ifndef ANT_BPWR_PAGE_16_LOG_LEVEL -#define ANT_BPWR_PAGE_16_LOG_LEVEL 3 +#ifndef NRFX_COMP_CONFIG_HYST +#define NRFX_COMP_CONFIG_HYST 0 #endif -// ANT_BPWR_PAGE_16_INFO_COLOR - ANSI escape code prefix. +// NRFX_COMP_CONFIG_ISOURCE - Current Source + +// <0=> Off +// <1=> 2.5 uA +// <2=> 5 uA +// <3=> 10 uA -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef NRFX_COMP_CONFIG_ISOURCE +#define NRFX_COMP_CONFIG_ISOURCE 0 +#endif -#ifndef ANT_BPWR_PAGE_16_INFO_COLOR -#define ANT_BPWR_PAGE_16_INFO_COLOR 0 +// NRFX_COMP_CONFIG_INPUT - Analog input + +// <0=> 0 +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_COMP_CONFIG_INPUT +#define NRFX_COMP_CONFIG_INPUT 0 #endif -// +// NRFX_COMP_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -// ANT_BPWR_PAGE_17_LOG_ENABLED - Enables logging of BPWR page 17 in the module. -//========================================================== -#ifndef ANT_BPWR_PAGE_17_LOG_ENABLED -#define ANT_BPWR_PAGE_17_LOG_ENABLED 0 +#ifndef NRFX_COMP_CONFIG_IRQ_PRIORITY +#define NRFX_COMP_CONFIG_IRQ_PRIORITY 7 #endif -// ANT_BPWR_PAGE_17_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_COMP_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_COMP_CONFIG_LOG_ENABLED +#define NRFX_COMP_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_COMP_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -#ifndef ANT_BPWR_PAGE_17_LOG_LEVEL -#define ANT_BPWR_PAGE_17_LOG_LEVEL 3 +#ifndef NRFX_COMP_CONFIG_LOG_LEVEL +#define NRFX_COMP_CONFIG_LOG_LEVEL 3 #endif -// ANT_BPWR_PAGE_17_INFO_COLOR - ANSI escape code prefix. +// NRFX_COMP_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef NRFX_COMP_CONFIG_INFO_COLOR +#define NRFX_COMP_CONFIG_INFO_COLOR 0 +#endif -#ifndef ANT_BPWR_PAGE_17_INFO_COLOR -#define ANT_BPWR_PAGE_17_INFO_COLOR 0 +// NRFX_COMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_COMP_CONFIG_DEBUG_COLOR +#define NRFX_COMP_CONFIG_DEBUG_COLOR 0 #endif // -// ANT_BPWR_PAGE_18_LOG_ENABLED - Enables logging of BPWR page 18 in the module. +// + +// NRFX_GPIOTE_ENABLED - nrfx_gpiote - GPIOTE peripheral driver //========================================================== -#ifndef ANT_BPWR_PAGE_18_LOG_ENABLED -#define ANT_BPWR_PAGE_18_LOG_ENABLED 0 +#ifndef NRFX_GPIOTE_ENABLED +#define NRFX_GPIOTE_ENABLED 0 +#endif +// NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins +#ifndef NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS +#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1 #endif -// ANT_BPWR_PAGE_18_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_GPIOTE_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_GPIOTE_CONFIG_IRQ_PRIORITY +#define NRFX_GPIOTE_CONFIG_IRQ_PRIORITY 7 +#endif -#ifndef ANT_BPWR_PAGE_18_LOG_LEVEL -#define ANT_BPWR_PAGE_18_LOG_LEVEL 3 +// NRFX_GPIOTE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED +#define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0 #endif +// NRFX_GPIOTE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -// ANT_BPWR_PAGE_18_INFO_COLOR - ANSI escape code prefix. +#ifndef NRFX_GPIOTE_CONFIG_LOG_LEVEL +#define NRFX_GPIOTE_CONFIG_LOG_LEVEL 3 +#endif -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +// NRFX_GPIOTE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef ANT_BPWR_PAGE_18_INFO_COLOR -#define ANT_BPWR_PAGE_18_INFO_COLOR 0 +#ifndef NRFX_GPIOTE_CONFIG_INFO_COLOR +#define NRFX_GPIOTE_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_GPIOTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_GPIOTE_CONFIG_DEBUG_COLOR +#define NRFX_GPIOTE_CONFIG_DEBUG_COLOR 0 #endif // // -// ANT_BSC_ENABLED - ant_bsc - Bicycle Speed and Cadence Profile -//========================================================== -#ifndef ANT_BSC_ENABLED -#define ANT_BSC_ENABLED 0 -#endif -// ANT_BSC_LOG_ENABLED - Enables general logging in the module. +// NRFX_I2S_ENABLED - nrfx_i2s - I2S peripheral driver //========================================================== -#ifndef ANT_BSC_LOG_ENABLED -#define ANT_BSC_LOG_ENABLED 0 +#ifndef NRFX_I2S_ENABLED +#define NRFX_I2S_ENABLED 0 #endif -// ANT_BSC_LOG_LEVEL - Default Severity level +// NRFX_I2S_CONFIG_SCK_PIN - SCK pin <0-31> -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug -#ifndef ANT_BSC_LOG_LEVEL -#define ANT_BSC_LOG_LEVEL 3 +#ifndef NRFX_I2S_CONFIG_SCK_PIN +#define NRFX_I2S_CONFIG_SCK_PIN 31 #endif -// ANT_BSC_INFO_COLOR - ANSI escape code prefix. +// NRFX_I2S_CONFIG_LRCK_PIN - LRCK pin <1-31> -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White -#ifndef ANT_BSC_INFO_COLOR -#define ANT_BSC_INFO_COLOR 0 +#ifndef NRFX_I2S_CONFIG_LRCK_PIN +#define NRFX_I2S_CONFIG_LRCK_PIN 30 #endif -// - -// ANT_BSC_COMBINED_PAGE_0_LOG_ENABLED - Enables logging of BSC Combined page 0 in the module. -//========================================================== -#ifndef ANT_BSC_COMBINED_PAGE_0_LOG_ENABLED -#define ANT_BSC_COMBINED_PAGE_0_LOG_ENABLED 0 +// NRFX_I2S_CONFIG_MCK_PIN - MCK pin +#ifndef NRFX_I2S_CONFIG_MCK_PIN +#define NRFX_I2S_CONFIG_MCK_PIN 255 #endif -// ANT_BSC_COMBINED_PAGE_0_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_I2S_CONFIG_SDOUT_PIN - SDOUT pin <0-31> + -#ifndef ANT_BSC_COMBINED_PAGE_0_LOG_LEVEL -#define ANT_BSC_COMBINED_PAGE_0_LOG_LEVEL 3 +#ifndef NRFX_I2S_CONFIG_SDOUT_PIN +#define NRFX_I2S_CONFIG_SDOUT_PIN 29 #endif -// ANT_BSC_COMBINED_PAGE_0_INFO_COLOR - ANSI escape code prefix. +// NRFX_I2S_CONFIG_SDIN_PIN - SDIN pin <0-31> -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White -#ifndef ANT_BSC_COMBINED_PAGE_0_INFO_COLOR -#define ANT_BSC_COMBINED_PAGE_0_INFO_COLOR 0 +#ifndef NRFX_I2S_CONFIG_SDIN_PIN +#define NRFX_I2S_CONFIG_SDIN_PIN 28 #endif -// +// NRFX_I2S_CONFIG_MASTER - Mode + +// <0=> Master +// <1=> Slave -// ANT_BSC_PAGE_0_LOG_ENABLED - Enables logging of BSC page 0 in the module. -//========================================================== -#ifndef ANT_BSC_PAGE_0_LOG_ENABLED -#define ANT_BSC_PAGE_0_LOG_ENABLED 0 +#ifndef NRFX_I2S_CONFIG_MASTER +#define NRFX_I2S_CONFIG_MASTER 0 #endif -// ANT_BSC_PAGE_0_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_I2S_CONFIG_FORMAT - Format + +// <0=> I2S +// <1=> Aligned -#ifndef ANT_BSC_PAGE_0_LOG_LEVEL -#define ANT_BSC_PAGE_0_LOG_LEVEL 3 +#ifndef NRFX_I2S_CONFIG_FORMAT +#define NRFX_I2S_CONFIG_FORMAT 0 #endif -// ANT_BSC_PAGE_0_INFO_COLOR - ANSI escape code prefix. +// NRFX_I2S_CONFIG_ALIGN - Alignment + +// <0=> Left +// <1=> Right -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef NRFX_I2S_CONFIG_ALIGN +#define NRFX_I2S_CONFIG_ALIGN 0 +#endif -#ifndef ANT_BSC_PAGE_0_INFO_COLOR -#define ANT_BSC_PAGE_0_INFO_COLOR 0 +// NRFX_I2S_CONFIG_SWIDTH - Sample width (bits) + +// <0=> 8 +// <1=> 16 +// <2=> 24 + +#ifndef NRFX_I2S_CONFIG_SWIDTH +#define NRFX_I2S_CONFIG_SWIDTH 1 #endif -// +// NRFX_I2S_CONFIG_CHANNELS - Channels + +// <0=> Stereo +// <1=> Left +// <2=> Right -// ANT_BSC_PAGE_1_LOG_ENABLED - Enables logging of BSC page 1 in the module. -//========================================================== -#ifndef ANT_BSC_PAGE_1_LOG_ENABLED -#define ANT_BSC_PAGE_1_LOG_ENABLED 0 +#ifndef NRFX_I2S_CONFIG_CHANNELS +#define NRFX_I2S_CONFIG_CHANNELS 1 #endif -// ANT_BSC_PAGE_1_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_I2S_CONFIG_MCK_SETUP - MCK behavior + +// <0=> Disabled +// <2147483648=> 32MHz/2 +// <1342177280=> 32MHz/3 +// <1073741824=> 32MHz/4 +// <805306368=> 32MHz/5 +// <671088640=> 32MHz/6 +// <536870912=> 32MHz/8 +// <402653184=> 32MHz/10 +// <369098752=> 32MHz/11 +// <285212672=> 32MHz/15 +// <268435456=> 32MHz/16 +// <201326592=> 32MHz/21 +// <184549376=> 32MHz/23 +// <142606336=> 32MHz/30 +// <138412032=> 32MHz/31 +// <134217728=> 32MHz/32 +// <100663296=> 32MHz/42 +// <68157440=> 32MHz/63 +// <34340864=> 32MHz/125 -#ifndef ANT_BSC_PAGE_1_LOG_LEVEL -#define ANT_BSC_PAGE_1_LOG_LEVEL 3 +#ifndef NRFX_I2S_CONFIG_MCK_SETUP +#define NRFX_I2S_CONFIG_MCK_SETUP 536870912 #endif -// ANT_BSC_PAGE_1_INFO_COLOR - ANSI escape code prefix. +// NRFX_I2S_CONFIG_RATIO - MCK/LRCK ratio + +// <0=> 32x +// <1=> 48x +// <2=> 64x +// <3=> 96x +// <4=> 128x +// <5=> 192x +// <6=> 256x +// <7=> 384x +// <8=> 512x -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef NRFX_I2S_CONFIG_RATIO +#define NRFX_I2S_CONFIG_RATIO 2000 +#endif -#ifndef ANT_BSC_PAGE_1_INFO_COLOR -#define ANT_BSC_PAGE_1_INFO_COLOR 0 +// NRFX_I2S_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_I2S_CONFIG_IRQ_PRIORITY +#define NRFX_I2S_CONFIG_IRQ_PRIORITY 7 +#endif + +// NRFX_I2S_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_I2S_CONFIG_LOG_ENABLED +#define NRFX_I2S_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_I2S_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_I2S_CONFIG_LOG_LEVEL +#define NRFX_I2S_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_I2S_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_I2S_CONFIG_INFO_COLOR +#define NRFX_I2S_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_I2S_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_I2S_CONFIG_DEBUG_COLOR +#define NRFX_I2S_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_LPCOMP_ENABLED - nrfx_lpcomp - LPCOMP peripheral driver +//========================================================== +#ifndef NRFX_LPCOMP_ENABLED +#define NRFX_LPCOMP_ENABLED 0 +#endif +// NRFX_LPCOMP_CONFIG_REFERENCE - Reference voltage + +// <0=> Supply 1/8 +// <1=> Supply 2/8 +// <2=> Supply 3/8 +// <3=> Supply 4/8 +// <4=> Supply 5/8 +// <5=> Supply 6/8 +// <6=> Supply 7/8 +// <8=> Supply 1/16 (nRF52) +// <9=> Supply 3/16 (nRF52) +// <10=> Supply 5/16 (nRF52) +// <11=> Supply 7/16 (nRF52) +// <12=> Supply 9/16 (nRF52) +// <13=> Supply 11/16 (nRF52) +// <14=> Supply 13/16 (nRF52) +// <15=> Supply 15/16 (nRF52) +// <7=> External Ref 0 +// <65543=> External Ref 1 + +#ifndef NRFX_LPCOMP_CONFIG_REFERENCE +#define NRFX_LPCOMP_CONFIG_REFERENCE 3 #endif -// +// NRFX_LPCOMP_CONFIG_DETECTION - Detection + +// <0=> Crossing +// <1=> Up +// <2=> Down -// ANT_BSC_PAGE_2_LOG_ENABLED - Enables logging of BSC page 2 in the module. -//========================================================== -#ifndef ANT_BSC_PAGE_2_LOG_ENABLED -#define ANT_BSC_PAGE_2_LOG_ENABLED 0 +#ifndef NRFX_LPCOMP_CONFIG_DETECTION +#define NRFX_LPCOMP_CONFIG_DETECTION 2 #endif -// ANT_BSC_PAGE_2_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_LPCOMP_CONFIG_INPUT - Analog input + +// <0=> 0 +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -#ifndef ANT_BSC_PAGE_2_LOG_LEVEL -#define ANT_BSC_PAGE_2_LOG_LEVEL 3 +#ifndef NRFX_LPCOMP_CONFIG_INPUT +#define NRFX_LPCOMP_CONFIG_INPUT 0 #endif -// ANT_BSC_PAGE_2_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +// NRFX_LPCOMP_CONFIG_HYST - Hysteresis + -#ifndef ANT_BSC_PAGE_2_INFO_COLOR -#define ANT_BSC_PAGE_2_INFO_COLOR 0 +#ifndef NRFX_LPCOMP_CONFIG_HYST +#define NRFX_LPCOMP_CONFIG_HYST 0 #endif -// +// NRFX_LPCOMP_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -// ANT_BSC_PAGE_3_LOG_ENABLED - Enables logging of BSC page 3 in the module. -//========================================================== -#ifndef ANT_BSC_PAGE_3_LOG_ENABLED -#define ANT_BSC_PAGE_3_LOG_ENABLED 0 +#ifndef NRFX_LPCOMP_CONFIG_IRQ_PRIORITY +#define NRFX_LPCOMP_CONFIG_IRQ_PRIORITY 7 #endif -// ANT_BSC_PAGE_3_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_LPCOMP_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_LPCOMP_CONFIG_LOG_ENABLED +#define NRFX_LPCOMP_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_LPCOMP_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -#ifndef ANT_BSC_PAGE_3_LOG_LEVEL -#define ANT_BSC_PAGE_3_LOG_LEVEL 3 +#ifndef NRFX_LPCOMP_CONFIG_LOG_LEVEL +#define NRFX_LPCOMP_CONFIG_LOG_LEVEL 3 #endif -// ANT_BSC_PAGE_3_INFO_COLOR - ANSI escape code prefix. +// NRFX_LPCOMP_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef NRFX_LPCOMP_CONFIG_INFO_COLOR +#define NRFX_LPCOMP_CONFIG_INFO_COLOR 0 +#endif -#ifndef ANT_BSC_PAGE_3_INFO_COLOR -#define ANT_BSC_PAGE_3_INFO_COLOR 0 +// NRFX_LPCOMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_LPCOMP_CONFIG_DEBUG_COLOR +#define NRFX_LPCOMP_CONFIG_DEBUG_COLOR 0 #endif // -// ANT_BSC_PAGE_4_LOG_ENABLED - Enables logging of BSC page 4 in the module. +// + +// NRFX_PDM_ENABLED - nrfx_pdm - PDM peripheral driver //========================================================== -#ifndef ANT_BSC_PAGE_4_LOG_ENABLED -#define ANT_BSC_PAGE_4_LOG_ENABLED 0 +#ifndef NRFX_PDM_ENABLED +#define NRFX_PDM_ENABLED 0 #endif -// ANT_BSC_PAGE_4_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_PDM_CONFIG_MODE - Mode + +// <0=> Stereo +// <1=> Mono -#ifndef ANT_BSC_PAGE_4_LOG_LEVEL -#define ANT_BSC_PAGE_4_LOG_LEVEL 3 +#ifndef NRFX_PDM_CONFIG_MODE +#define NRFX_PDM_CONFIG_MODE 1 #endif -// ANT_BSC_PAGE_4_INFO_COLOR - ANSI escape code prefix. +// NRFX_PDM_CONFIG_EDGE - Edge + +// <0=> Left falling +// <1=> Left rising -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef NRFX_PDM_CONFIG_EDGE +#define NRFX_PDM_CONFIG_EDGE 0 +#endif + +// NRFX_PDM_CONFIG_CLOCK_FREQ - Clock frequency + +// <134217728=> 1000k +// <138412032=> 1032k (default) +// <142606336=> 1067k -#ifndef ANT_BSC_PAGE_4_INFO_COLOR -#define ANT_BSC_PAGE_4_INFO_COLOR 0 +#ifndef NRFX_PDM_CONFIG_CLOCK_FREQ +#define NRFX_PDM_CONFIG_CLOCK_FREQ 138412032 #endif -// +// NRFX_PDM_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -// ANT_BSC_PAGE_5_LOG_ENABLED - Enables logging of BSC page 5 in the module. -//========================================================== -#ifndef ANT_BSC_PAGE_5_LOG_ENABLED -#define ANT_BSC_PAGE_5_LOG_ENABLED 0 +#ifndef NRFX_PDM_CONFIG_IRQ_PRIORITY +#define NRFX_PDM_CONFIG_IRQ_PRIORITY 7 #endif -// ANT_BSC_PAGE_5_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_PDM_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_PDM_CONFIG_LOG_ENABLED +#define NRFX_PDM_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_PDM_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -#ifndef ANT_BSC_PAGE_5_LOG_LEVEL -#define ANT_BSC_PAGE_5_LOG_LEVEL 3 +#ifndef NRFX_PDM_CONFIG_LOG_LEVEL +#define NRFX_PDM_CONFIG_LOG_LEVEL 3 #endif -// ANT_BSC_PAGE_5_INFO_COLOR - ANSI escape code prefix. +// NRFX_PDM_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef NRFX_PDM_CONFIG_INFO_COLOR +#define NRFX_PDM_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_PDM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef ANT_BSC_PAGE_5_INFO_COLOR -#define ANT_BSC_PAGE_5_INFO_COLOR 0 +#ifndef NRFX_PDM_CONFIG_DEBUG_COLOR +#define NRFX_PDM_CONFIG_DEBUG_COLOR 0 #endif // // -// ANT_CHANNEL_CONFIG_ENABLED - ant_channel_config - ANT common channel configuration +// NRFX_POWER_ENABLED - nrfx_power - POWER peripheral driver +//========================================================== +#ifndef NRFX_POWER_ENABLED +#define NRFX_POWER_ENABLED 0 +#endif +// NRFX_POWER_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_POWER_CONFIG_IRQ_PRIORITY +#define NRFX_POWER_CONFIG_IRQ_PRIORITY 7 +#endif + +// NRFX_POWER_CONFIG_DEFAULT_DCDCEN - The default configuration of main DCDC regulator + + +// This settings means only that components for DCDC regulator are installed and it can be enabled. + +#ifndef NRFX_POWER_CONFIG_DEFAULT_DCDCEN +#define NRFX_POWER_CONFIG_DEFAULT_DCDCEN 0 +#endif + +// NRFX_POWER_CONFIG_DEFAULT_DCDCENHV - The default configuration of High Voltage DCDC regulator + +// This settings means only that components for DCDC regulator are installed and it can be enabled. -#ifndef ANT_CHANNEL_CONFIG_ENABLED -#define ANT_CHANNEL_CONFIG_ENABLED 0 +#ifndef NRFX_POWER_CONFIG_DEFAULT_DCDCENHV +#define NRFX_POWER_CONFIG_DEFAULT_DCDCENHV 0 #endif -// ANT_COMMON_PAGE_70_ENABLED - ant_common_page_70 - ANT+ common page 70 +// + +// NRFX_PPI_ENABLED - nrfx_ppi - PPI peripheral allocator //========================================================== -#ifndef ANT_COMMON_PAGE_70_ENABLED -#define ANT_COMMON_PAGE_70_ENABLED 0 +#ifndef NRFX_PPI_ENABLED +#define NRFX_PPI_ENABLED 0 #endif -// ANT_COMMON_PAGE_70_LOG_ENABLED - Enables logging of common page 70 in the module. +// NRFX_PPI_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== -#ifndef ANT_COMMON_PAGE_70_LOG_ENABLED -#define ANT_COMMON_PAGE_70_LOG_ENABLED 0 +#ifndef NRFX_PPI_CONFIG_LOG_ENABLED +#define NRFX_PPI_CONFIG_LOG_ENABLED 0 #endif -// ANT_COMMON_PAGE_70_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_PPI_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -#ifndef ANT_COMMON_PAGE_70_LOG_LEVEL -#define ANT_COMMON_PAGE_70_LOG_LEVEL 3 +#ifndef NRFX_PPI_CONFIG_LOG_LEVEL +#define NRFX_PPI_CONFIG_LOG_LEVEL 3 #endif -// ANT_COMMON_PAGE_70_INFO_COLOR - ANSI escape code prefix. +// NRFX_PPI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef NRFX_PPI_CONFIG_INFO_COLOR +#define NRFX_PPI_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_PPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef ANT_COMMON_PAGE_70_INFO_COLOR -#define ANT_COMMON_PAGE_70_INFO_COLOR 0 +#ifndef NRFX_PPI_CONFIG_DEBUG_COLOR +#define NRFX_PPI_CONFIG_DEBUG_COLOR 0 #endif // // -// ANT_COMMON_PAGE_80_ENABLED - ant_common_page_80 - ANT+ common page 80 +// NRFX_PWM_ENABLED - nrfx_pwm - PWM peripheral driver //========================================================== -#ifndef ANT_COMMON_PAGE_80_ENABLED -#define ANT_COMMON_PAGE_80_ENABLED 0 +#ifndef NRFX_PWM_ENABLED +#define NRFX_PWM_ENABLED 0 #endif -// ANT_COMMON_PAGE_80_LOG_ENABLED - Enables logging of common page 80 in the module. -//========================================================== -#ifndef ANT_COMMON_PAGE_80_LOG_ENABLED -#define ANT_COMMON_PAGE_80_LOG_ENABLED 0 +// NRFX_PWM0_ENABLED - Enable PWM0 instance + + +#ifndef NRFX_PWM0_ENABLED +#define NRFX_PWM0_ENABLED 0 #endif -// ANT_COMMON_PAGE_80_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_PWM1_ENABLED - Enable PWM1 instance + -#ifndef ANT_COMMON_PAGE_80_LOG_LEVEL -#define ANT_COMMON_PAGE_80_LOG_LEVEL 3 +#ifndef NRFX_PWM1_ENABLED +#define NRFX_PWM1_ENABLED 0 #endif -// ANT_COMMON_PAGE_80_INFO_COLOR - ANSI escape code prefix. +// NRFX_PWM2_ENABLED - Enable PWM2 instance + -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef NRFX_PWM2_ENABLED +#define NRFX_PWM2_ENABLED 0 +#endif + +// NRFX_PWM3_ENABLED - Enable PWM3 instance + -#ifndef ANT_COMMON_PAGE_80_INFO_COLOR -#define ANT_COMMON_PAGE_80_INFO_COLOR 0 +#ifndef NRFX_PWM3_ENABLED +#define NRFX_PWM3_ENABLED 0 #endif -// +// NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN - Out0 pin <0-31> -// -// ANT_COMMON_PAGE_81_ENABLED - ant_common_page_81 - ANT+ common page 81 -//========================================================== -#ifndef ANT_COMMON_PAGE_81_ENABLED -#define ANT_COMMON_PAGE_81_ENABLED 0 -#endif -// ANT_COMMON_PAGE_81_LOG_ENABLED - Enables logging of common page 81 in the module. -//========================================================== -#ifndef ANT_COMMON_PAGE_81_LOG_ENABLED -#define ANT_COMMON_PAGE_81_LOG_ENABLED 0 +#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN +#define NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN 31 #endif -// ANT_COMMON_PAGE_81_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN - Out1 pin <0-31> -#ifndef ANT_COMMON_PAGE_81_LOG_LEVEL -#define ANT_COMMON_PAGE_81_LOG_LEVEL 3 + +#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN +#define NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN 31 #endif -// ANT_COMMON_PAGE_81_INFO_COLOR - ANSI escape code prefix. +// NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN - Out2 pin <0-31> -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White -#ifndef ANT_COMMON_PAGE_81_INFO_COLOR -#define ANT_COMMON_PAGE_81_INFO_COLOR 0 +#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN +#define NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN 31 #endif -// +// NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN - Out3 pin <0-31> -// -// ANT_ENCRYPT_CONFIG_ENABLED - ant_encrypt_config - Cryptographic ANT stack configuration +#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN +#define NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN 31 +#endif +// NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK - Base clock + +// <0=> 16 MHz +// <1=> 8 MHz +// <2=> 4 MHz +// <3=> 2 MHz +// <4=> 1 MHz +// <5=> 500 kHz +// <6=> 250 kHz +// <7=> 125 kHz -#ifndef ANT_ENCRYPT_CONFIG_ENABLED -#define ANT_ENCRYPT_CONFIG_ENABLED 0 +#ifndef NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK +#define NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK 4 #endif -// ANT_HRM_ENABLED - ant_hrm - Heart Rate Monitor Profile -//========================================================== -#ifndef ANT_HRM_ENABLED -#define ANT_HRM_ENABLED 0 +// NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE - Count mode + +// <0=> Up +// <1=> Up and Down + +#ifndef NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE +#define NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE 0 #endif -// ANT_HRM_LOG_ENABLED - Enables general logging in the module. -//========================================================== -#ifndef ANT_HRM_LOG_ENABLED -#define ANT_HRM_LOG_ENABLED 0 + +// NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE - Top value +#ifndef NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE +#define NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE 1000 #endif -// ANT_HRM_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE - Load mode + +// <0=> Common +// <1=> Grouped +// <2=> Individual +// <3=> Waveform -#ifndef ANT_HRM_LOG_LEVEL -#define ANT_HRM_LOG_LEVEL 3 +#ifndef NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE +#define NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE 0 #endif -// ANT_HRM_INFO_COLOR - ANSI escape code prefix. +// NRFX_PWM_DEFAULT_CONFIG_STEP_MODE - Step mode + +// <0=> Auto +// <1=> Triggered -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef ANT_HRM_INFO_COLOR -#define ANT_HRM_INFO_COLOR 0 +#ifndef NRFX_PWM_DEFAULT_CONFIG_STEP_MODE +#define NRFX_PWM_DEFAULT_CONFIG_STEP_MODE 0 #endif -// +// NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -// ANT_HRM_PAGE_0_LOG_ENABLED - Enables logging of HRM page 0 in the module. -//========================================================== -#ifndef ANT_HRM_PAGE_0_LOG_ENABLED -#define ANT_HRM_PAGE_0_LOG_ENABLED 0 +#ifndef NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif -// ANT_HRM_PAGE_0_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_PWM_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_PWM_CONFIG_LOG_ENABLED +#define NRFX_PWM_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_PWM_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -#ifndef ANT_HRM_PAGE_0_LOG_LEVEL -#define ANT_HRM_PAGE_0_LOG_LEVEL 3 +#ifndef NRFX_PWM_CONFIG_LOG_LEVEL +#define NRFX_PWM_CONFIG_LOG_LEVEL 3 #endif -// ANT_HRM_PAGE_0_INFO_COLOR - ANSI escape code prefix. +// NRFX_PWM_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef NRFX_PWM_CONFIG_INFO_COLOR +#define NRFX_PWM_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_PWM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef ANT_HRM_PAGE_0_INFO_COLOR -#define ANT_HRM_PAGE_0_INFO_COLOR 0 +#ifndef NRFX_PWM_CONFIG_DEBUG_COLOR +#define NRFX_PWM_CONFIG_DEBUG_COLOR 0 #endif // -// ANT_HRM_PAGE_1_LOG_ENABLED - Enables logging of HRM page 1 in the module. +// + +// NRFX_QDEC_ENABLED - nrfx_qdec - QDEC peripheral driver //========================================================== -#ifndef ANT_HRM_PAGE_1_LOG_ENABLED -#define ANT_HRM_PAGE_1_LOG_ENABLED 0 +#ifndef NRFX_QDEC_ENABLED +#define NRFX_QDEC_ENABLED 0 #endif -// ANT_HRM_PAGE_1_LOG_LEVEL - Default Severity level +// NRFX_QDEC_CONFIG_REPORTPER - Report period + +// <0=> 10 Samples +// <1=> 40 Samples +// <2=> 80 Samples +// <3=> 120 Samples +// <4=> 160 Samples +// <5=> 200 Samples +// <6=> 240 Samples +// <7=> 280 Samples -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +#ifndef NRFX_QDEC_CONFIG_REPORTPER +#define NRFX_QDEC_CONFIG_REPORTPER 0 +#endif -#ifndef ANT_HRM_PAGE_1_LOG_LEVEL -#define ANT_HRM_PAGE_1_LOG_LEVEL 3 +// NRFX_QDEC_CONFIG_SAMPLEPER - Sample period + +// <0=> 128 us +// <1=> 256 us +// <2=> 512 us +// <3=> 1024 us +// <4=> 2048 us +// <5=> 4096 us +// <6=> 8192 us +// <7=> 16384 us + +#ifndef NRFX_QDEC_CONFIG_SAMPLEPER +#define NRFX_QDEC_CONFIG_SAMPLEPER 7 #endif -// ANT_HRM_PAGE_1_INFO_COLOR - ANSI escape code prefix. +// NRFX_QDEC_CONFIG_PIO_A - A pin <0-31> -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White -#ifndef ANT_HRM_PAGE_1_INFO_COLOR -#define ANT_HRM_PAGE_1_INFO_COLOR 0 +#ifndef NRFX_QDEC_CONFIG_PIO_A +#define NRFX_QDEC_CONFIG_PIO_A 31 #endif -// +// NRFX_QDEC_CONFIG_PIO_B - B pin <0-31> -// ANT_HRM_PAGE_2_LOG_ENABLED - Enables logging of HRM page 2 in the module. -//========================================================== -#ifndef ANT_HRM_PAGE_2_LOG_ENABLED -#define ANT_HRM_PAGE_2_LOG_ENABLED 0 + +#ifndef NRFX_QDEC_CONFIG_PIO_B +#define NRFX_QDEC_CONFIG_PIO_B 31 #endif -// ANT_HRM_PAGE_2_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_QDEC_CONFIG_PIO_LED - LED pin <0-31> -#ifndef ANT_HRM_PAGE_2_LOG_LEVEL -#define ANT_HRM_PAGE_2_LOG_LEVEL 3 + +#ifndef NRFX_QDEC_CONFIG_PIO_LED +#define NRFX_QDEC_CONFIG_PIO_LED 31 #endif -// ANT_HRM_PAGE_2_INFO_COLOR - ANSI escape code prefix. +// NRFX_QDEC_CONFIG_LEDPRE - LED pre +#ifndef NRFX_QDEC_CONFIG_LEDPRE +#define NRFX_QDEC_CONFIG_LEDPRE 511 +#endif -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +// NRFX_QDEC_CONFIG_LEDPOL - LED polarity + +// <0=> Active low +// <1=> Active high -#ifndef ANT_HRM_PAGE_2_INFO_COLOR -#define ANT_HRM_PAGE_2_INFO_COLOR 0 +#ifndef NRFX_QDEC_CONFIG_LEDPOL +#define NRFX_QDEC_CONFIG_LEDPOL 1 #endif -// +// NRFX_QDEC_CONFIG_DBFEN - Debouncing enable + -// ANT_HRM_PAGE_3_LOG_ENABLED - Enables logging of HRM page 3 in the module. -//========================================================== -#ifndef ANT_HRM_PAGE_3_LOG_ENABLED -#define ANT_HRM_PAGE_3_LOG_ENABLED 0 +#ifndef NRFX_QDEC_CONFIG_DBFEN +#define NRFX_QDEC_CONFIG_DBFEN 0 #endif -// ANT_HRM_PAGE_3_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_QDEC_CONFIG_SAMPLE_INTEN - Sample ready interrupt enable + -#ifndef ANT_HRM_PAGE_3_LOG_LEVEL -#define ANT_HRM_PAGE_3_LOG_LEVEL 3 +#ifndef NRFX_QDEC_CONFIG_SAMPLE_INTEN +#define NRFX_QDEC_CONFIG_SAMPLE_INTEN 0 #endif -// ANT_HRM_PAGE_3_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +// NRFX_QDEC_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -#ifndef ANT_HRM_PAGE_3_INFO_COLOR -#define ANT_HRM_PAGE_3_INFO_COLOR 0 +#ifndef NRFX_QDEC_CONFIG_IRQ_PRIORITY +#define NRFX_QDEC_CONFIG_IRQ_PRIORITY 7 #endif -// - -// ANT_HRM_PAGE_4_LOG_ENABLED - Enables logging of HRM page 4 in the module. +// NRFX_QDEC_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== -#ifndef ANT_HRM_PAGE_4_LOG_ENABLED -#define ANT_HRM_PAGE_4_LOG_ENABLED 0 +#ifndef NRFX_QDEC_CONFIG_LOG_ENABLED +#define NRFX_QDEC_CONFIG_LOG_ENABLED 0 #endif -// ANT_HRM_PAGE_4_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_QDEC_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -#ifndef ANT_HRM_PAGE_4_LOG_LEVEL -#define ANT_HRM_PAGE_4_LOG_LEVEL 3 +#ifndef NRFX_QDEC_CONFIG_LOG_LEVEL +#define NRFX_QDEC_CONFIG_LOG_LEVEL 3 #endif -// ANT_HRM_PAGE_4_INFO_COLOR - ANSI escape code prefix. +// NRFX_QDEC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef NRFX_QDEC_CONFIG_INFO_COLOR +#define NRFX_QDEC_CONFIG_INFO_COLOR 0 +#endif -#ifndef ANT_HRM_PAGE_4_INFO_COLOR -#define ANT_HRM_PAGE_4_INFO_COLOR 0 +// NRFX_QDEC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_QDEC_CONFIG_DEBUG_COLOR +#define NRFX_QDEC_CONFIG_DEBUG_COLOR 0 #endif // // -// ANT_KEY_MANAGER_ENABLED - ant_key_manager - Software Component +// NRFX_QSPI_ENABLED - nrfx_qspi - QSPI peripheral driver +//========================================================== +#ifndef NRFX_QSPI_ENABLED +#define NRFX_QSPI_ENABLED 0 +#endif +// NRFX_QSPI_CONFIG_SCK_DELAY - tSHSL, tWHSL and tSHWL in number of 16 MHz periods (62.5 ns). <0-255> -#ifndef ANT_KEY_MANAGER_ENABLED -#define ANT_KEY_MANAGER_ENABLED 0 +#ifndef NRFX_QSPI_CONFIG_SCK_DELAY +#define NRFX_QSPI_CONFIG_SCK_DELAY 1 #endif -// ANT_REQUEST_CONTROLLER_ENABLED - ant_request_controller - ANT+ request controller +// NRFX_QSPI_CONFIG_XIP_OFFSET - Address offset in the external memory for Execute in Place operation. +#ifndef NRFX_QSPI_CONFIG_XIP_OFFSET +#define NRFX_QSPI_CONFIG_XIP_OFFSET 0 +#endif +// NRFX_QSPI_CONFIG_READOC - Number of data lines and opcode used for reading. + +// <0=> FastRead +// <1=> Read2O +// <2=> Read2IO +// <3=> Read4O +// <4=> Read4IO -#ifndef ANT_REQUEST_CONTROLLER_ENABLED -#define ANT_REQUEST_CONTROLLER_ENABLED 0 +#ifndef NRFX_QSPI_CONFIG_READOC +#define NRFX_QSPI_CONFIG_READOC 0 #endif -// ANT_SDM_ENABLED - ant_sdm - Stride Based Speed and Distance Monitor Profile -//========================================================== -#ifndef ANT_SDM_ENABLED -#define ANT_SDM_ENABLED 0 -#endif -// ANT_SDM_LOG_ENABLED - Enables general logging in the module. -//========================================================== -#ifndef ANT_SDM_LOG_ENABLED -#define ANT_SDM_LOG_ENABLED 0 +// NRFX_QSPI_CONFIG_WRITEOC - Number of data lines and opcode used for writing. + +// <0=> PP +// <1=> PP2O +// <2=> PP4O +// <3=> PP4IO + +#ifndef NRFX_QSPI_CONFIG_WRITEOC +#define NRFX_QSPI_CONFIG_WRITEOC 0 #endif -// ANT_SDM_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_QSPI_CONFIG_ADDRMODE - Addressing mode. + +// <0=> 24bit +// <1=> 32bit -#ifndef ANT_SDM_LOG_LEVEL -#define ANT_SDM_LOG_LEVEL 3 +#ifndef NRFX_QSPI_CONFIG_ADDRMODE +#define NRFX_QSPI_CONFIG_ADDRMODE 0 #endif -// ANT_SDM_INFO_COLOR - ANSI escape code prefix. +// NRFX_QSPI_CONFIG_MODE - SPI mode. + +// <0=> Mode 0 +// <1=> Mode 1 -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef NRFX_QSPI_CONFIG_MODE +#define NRFX_QSPI_CONFIG_MODE 0 +#endif + +// NRFX_QSPI_CONFIG_FREQUENCY - Frequency divider. + +// <0=> 32MHz/1 +// <1=> 32MHz/2 +// <2=> 32MHz/3 +// <3=> 32MHz/4 +// <4=> 32MHz/5 +// <5=> 32MHz/6 +// <6=> 32MHz/7 +// <7=> 32MHz/8 +// <8=> 32MHz/9 +// <9=> 32MHz/10 +// <10=> 32MHz/11 +// <11=> 32MHz/12 +// <12=> 32MHz/13 +// <13=> 32MHz/14 +// <14=> 32MHz/15 +// <15=> 32MHz/16 -#ifndef ANT_SDM_INFO_COLOR -#define ANT_SDM_INFO_COLOR 0 +#ifndef NRFX_QSPI_CONFIG_FREQUENCY +#define NRFX_QSPI_CONFIG_FREQUENCY 15 #endif -// +// NRFX_QSPI_PIN_SCK - SCK pin value. +#ifndef NRFX_QSPI_PIN_SCK +#define NRFX_QSPI_PIN_SCK NRF_QSPI_PIN_NOT_CONNECTED +#endif -// +// NRFX_QSPI_PIN_CSN - CSN pin value. +#ifndef NRFX_QSPI_PIN_CSN +#define NRFX_QSPI_PIN_CSN NRF_QSPI_PIN_NOT_CONNECTED +#endif -// ANT_SEARCH_CONFIG_ENABLED - ant_search_config - ANT common search configuration -//========================================================== -#ifndef ANT_SEARCH_CONFIG_ENABLED -#define ANT_SEARCH_CONFIG_ENABLED 0 +// NRFX_QSPI_PIN_IO0 - IO0 pin value. +#ifndef NRFX_QSPI_PIN_IO0 +#define NRFX_QSPI_PIN_IO0 NRF_QSPI_PIN_NOT_CONNECTED #endif -// ANT_DEFAULT_LOW_PRIORITY_TIMEOUT - Default low priority search time-out. <0-255> +// NRFX_QSPI_PIN_IO1 - IO1 pin value. +#ifndef NRFX_QSPI_PIN_IO1 +#define NRFX_QSPI_PIN_IO1 NRF_QSPI_PIN_NOT_CONNECTED +#endif -#ifndef ANT_DEFAULT_LOW_PRIORITY_TIMEOUT -#define ANT_DEFAULT_LOW_PRIORITY_TIMEOUT 2 +// NRFX_QSPI_PIN_IO2 - IO2 pin value. +#ifndef NRFX_QSPI_PIN_IO2 +#define NRFX_QSPI_PIN_IO2 NRF_QSPI_PIN_NOT_CONNECTED #endif -// ANT_DEFAULT_HIGH_PRIORITY_TIMEOUT - Default high priority search time-out. <0-255> +// NRFX_QSPI_PIN_IO3 - IO3 pin value. +#ifndef NRFX_QSPI_PIN_IO3 +#define NRFX_QSPI_PIN_IO3 NRF_QSPI_PIN_NOT_CONNECTED +#endif +// NRFX_QSPI_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -#ifndef ANT_DEFAULT_HIGH_PRIORITY_TIMEOUT -#define ANT_DEFAULT_HIGH_PRIORITY_TIMEOUT 10 +#ifndef NRFX_QSPI_CONFIG_IRQ_PRIORITY +#define NRFX_QSPI_CONFIG_IRQ_PRIORITY 7 #endif // -// ANT_STACK_CONFIG_ENABLED - ant_stack_config - Common ANT stack configuration +// NRFX_RNG_ENABLED - nrfx_rng - RNG peripheral driver //========================================================== -#ifndef ANT_STACK_CONFIG_ENABLED -#define ANT_STACK_CONFIG_ENABLED 0 +#ifndef NRFX_RNG_ENABLED +#define NRFX_RNG_ENABLED 0 #endif -// ANT_CONFIG_TOTAL_CHANNELS_ALLOCATED - Allocated ANT channels -#ifndef ANT_CONFIG_TOTAL_CHANNELS_ALLOCATED -#define ANT_CONFIG_TOTAL_CHANNELS_ALLOCATED 0 +// NRFX_RNG_CONFIG_ERROR_CORRECTION - Error correction + + +#ifndef NRFX_RNG_CONFIG_ERROR_CORRECTION +#define NRFX_RNG_CONFIG_ERROR_CORRECTION 1 #endif -// ANT_CONFIG_ENCRYPTED_CHANNELS - Encrypted ANT channels -#ifndef ANT_CONFIG_ENCRYPTED_CHANNELS -#define ANT_CONFIG_ENCRYPTED_CHANNELS 0 +// NRFX_RNG_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_RNG_CONFIG_IRQ_PRIORITY +#define NRFX_RNG_CONFIG_IRQ_PRIORITY 7 #endif -// ANT_CONFIG_EVENT_QUEUE_SIZE - Event queue size -#ifndef ANT_CONFIG_EVENT_QUEUE_SIZE -#define ANT_CONFIG_EVENT_QUEUE_SIZE 32 +// NRFX_RNG_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_RNG_CONFIG_LOG_ENABLED +#define NRFX_RNG_CONFIG_LOG_ENABLED 0 #endif +// NRFX_RNG_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -// ANT_CONFIG_BURST_QUEUE_SIZE - ANT burst queue size -#ifndef ANT_CONFIG_BURST_QUEUE_SIZE -#define ANT_CONFIG_BURST_QUEUE_SIZE 128 +#ifndef NRFX_RNG_CONFIG_LOG_LEVEL +#define NRFX_RNG_CONFIG_LOG_LEVEL 3 #endif -// +// NRFX_RNG_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// ANT_STATE_INDICATOR_ENABLED - ant_state_indicator - ANT state indicator using BSP -//========================================================== -#ifndef ANT_STATE_INDICATOR_ENABLED -#define ANT_STATE_INDICATOR_ENABLED 0 +#ifndef NRFX_RNG_CONFIG_INFO_COLOR +#define NRFX_RNG_CONFIG_INFO_COLOR 0 #endif -// ANT_STATE_INDICATOR_CONFIG_SHUTDOWN_HANDLER_PRIORITY - Shutdown observer priority. -#ifndef ANT_STATE_INDICATOR_CONFIG_SHUTDOWN_HANDLER_PRIORITY -#define ANT_STATE_INDICATOR_CONFIG_SHUTDOWN_HANDLER_PRIORITY 1 + +// NRFX_RNG_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_RNG_CONFIG_DEBUG_COLOR +#define NRFX_RNG_CONFIG_DEBUG_COLOR 0 #endif // -// +// + +// NRFX_RTC_ENABLED - nrfx_rtc - RTC peripheral driver //========================================================== +#ifndef NRFX_RTC_ENABLED +#define NRFX_RTC_ENABLED 0 +#endif +// NRFX_RTC0_ENABLED - Enable RTC0 instance + + +#ifndef NRFX_RTC0_ENABLED +#define NRFX_RTC0_ENABLED 0 +#endif -// nRF_BLE +// NRFX_RTC1_ENABLED - Enable RTC1 instance + -//========================================================== -// BLE_ADVERTISING_ENABLED - ble_advertising - Advertising module +#ifndef NRFX_RTC1_ENABLED +#define NRFX_RTC1_ENABLED 0 +#endif +// NRFX_RTC2_ENABLED - Enable RTC2 instance + -#ifndef BLE_ADVERTISING_ENABLED -#define BLE_ADVERTISING_ENABLED 0 +#ifndef NRFX_RTC2_ENABLED +#define NRFX_RTC2_ENABLED 0 #endif -// BLE_DTM_ENABLED - ble_dtm - Module for testing RF/PHY using DTM commands +// NRFX_RTC_MAXIMUM_LATENCY_US - Maximum possible time[us] in highest priority interrupt +#ifndef NRFX_RTC_MAXIMUM_LATENCY_US +#define NRFX_RTC_MAXIMUM_LATENCY_US 2000 +#endif +// NRFX_RTC_DEFAULT_CONFIG_FREQUENCY - Frequency <16-32768> -#ifndef BLE_DTM_ENABLED -#define BLE_DTM_ENABLED 0 + +#ifndef NRFX_RTC_DEFAULT_CONFIG_FREQUENCY +#define NRFX_RTC_DEFAULT_CONFIG_FREQUENCY 32768 #endif -// BLE_RACP_ENABLED - ble_racp - Record Access Control Point library +// NRFX_RTC_DEFAULT_CONFIG_RELIABLE - Ensures safe compare event triggering + +#ifndef NRFX_RTC_DEFAULT_CONFIG_RELIABLE +#define NRFX_RTC_DEFAULT_CONFIG_RELIABLE 0 +#endif -#ifndef BLE_RACP_ENABLED -#define BLE_RACP_ENABLED 0 +// NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif -// NRF_BLE_CONN_PARAMS_ENABLED - ble_conn_params - Initiating and executing a connection parameters negotiation procedure +// NRFX_RTC_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== -#ifndef NRF_BLE_CONN_PARAMS_ENABLED -#define NRF_BLE_CONN_PARAMS_ENABLED 0 +#ifndef NRFX_RTC_CONFIG_LOG_ENABLED +#define NRFX_RTC_CONFIG_LOG_ENABLED 0 #endif -// NRF_BLE_CONN_PARAMS_MAX_SLAVE_LATENCY_DEVIATION - The largest acceptable deviation in slave latency. -// The largest deviation (+ or -) from the requested slave latency that will not be renegotiated. +// NRFX_RTC_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -#ifndef NRF_BLE_CONN_PARAMS_MAX_SLAVE_LATENCY_DEVIATION -#define NRF_BLE_CONN_PARAMS_MAX_SLAVE_LATENCY_DEVIATION 499 +#ifndef NRFX_RTC_CONFIG_LOG_LEVEL +#define NRFX_RTC_CONFIG_LOG_LEVEL 3 #endif -// NRF_BLE_CONN_PARAMS_MAX_SUPERVISION_TIMEOUT_DEVIATION - The largest acceptable deviation (in 10 ms units) in supervision timeout. -// The largest deviation (+ or -, in 10 ms units) from the requested supervision timeout that will not be renegotiated. +// NRFX_RTC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef NRF_BLE_CONN_PARAMS_MAX_SUPERVISION_TIMEOUT_DEVIATION -#define NRF_BLE_CONN_PARAMS_MAX_SUPERVISION_TIMEOUT_DEVIATION 65535 +#ifndef NRFX_RTC_CONFIG_INFO_COLOR +#define NRFX_RTC_CONFIG_INFO_COLOR 0 #endif -// +// NRFX_RTC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// NRF_BLE_QWR_ENABLED - nrf_ble_qwr - Queued writes support module (prepare/execute write) +#ifndef NRFX_RTC_CONFIG_DEBUG_COLOR +#define NRFX_RTC_CONFIG_DEBUG_COLOR 0 +#endif +// -#ifndef NRF_BLE_QWR_ENABLED -#define NRF_BLE_QWR_ENABLED 0 -#endif +// -// PEER_MANAGER_ENABLED - peer_manager - Peer Manager +// NRFX_SAADC_ENABLED - nrfx_saadc - SAADC peripheral driver //========================================================== -#ifndef PEER_MANAGER_ENABLED -#define PEER_MANAGER_ENABLED 0 +#ifndef NRFX_SAADC_ENABLED +#define NRFX_SAADC_ENABLED 0 #endif -// PM_MAX_REGISTRANTS -// Number of event handlers that can be registered. +// NRFX_SAADC_CONFIG_RESOLUTION - Resolution + +// <0=> 8 bit +// <1=> 10 bit +// <2=> 12 bit +// <3=> 14 bit -#ifndef PM_MAX_REGISTRANTS -#define PM_MAX_REGISTRANTS 3 +#ifndef NRFX_SAADC_CONFIG_RESOLUTION +#define NRFX_SAADC_CONFIG_RESOLUTION 1 #endif -// PM_FLASH_BUFFERS -// Number of internal buffers for flash operations. -// Decrease this value to lower RAM usage. +// NRFX_SAADC_CONFIG_OVERSAMPLE - Sample period + +// <0=> Disabled +// <1=> 2x +// <2=> 4x +// <3=> 8x +// <4=> 16x +// <5=> 32x +// <6=> 64x +// <7=> 128x +// <8=> 256x -#ifndef PM_FLASH_BUFFERS -#define PM_FLASH_BUFFERS 8 +#ifndef NRFX_SAADC_CONFIG_OVERSAMPLE +#define NRFX_SAADC_CONFIG_OVERSAMPLE 0 #endif -// - -// -//========================================================== +// NRFX_SAADC_CONFIG_LP_MODE - Enabling low power mode + -// nRF_BLE_Services +#ifndef NRFX_SAADC_CONFIG_LP_MODE +#define NRFX_SAADC_CONFIG_LP_MODE 0 +#endif -//========================================================== -// BLE_ANCS_C_ENABLED - ble_ancs_c - Apple Notification Service Client +// NRFX_SAADC_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 +#ifndef NRFX_SAADC_CONFIG_IRQ_PRIORITY +#define NRFX_SAADC_CONFIG_IRQ_PRIORITY 7 +#endif -#ifndef BLE_ANCS_C_ENABLED -#define BLE_ANCS_C_ENABLED 0 +// NRFX_SAADC_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_SAADC_CONFIG_LOG_ENABLED +#define NRFX_SAADC_CONFIG_LOG_ENABLED 0 #endif +// NRFX_SAADC_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -// BLE_ANS_C_ENABLED - ble_ans_c - Alert Notification Service Client +#ifndef NRFX_SAADC_CONFIG_LOG_LEVEL +#define NRFX_SAADC_CONFIG_LOG_LEVEL 3 +#endif +// NRFX_SAADC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef BLE_ANS_C_ENABLED -#define BLE_ANS_C_ENABLED 0 +#ifndef NRFX_SAADC_CONFIG_INFO_COLOR +#define NRFX_SAADC_CONFIG_INFO_COLOR 0 #endif -// BLE_BAS_C_ENABLED - ble_bas_c - Battery Service Client - +// NRFX_SAADC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef BLE_BAS_C_ENABLED -#define BLE_BAS_C_ENABLED 0 +#ifndef NRFX_SAADC_CONFIG_DEBUG_COLOR +#define NRFX_SAADC_CONFIG_DEBUG_COLOR 0 #endif -// BLE_BAS_ENABLED - ble_bas - Battery Service +// +// -#ifndef BLE_BAS_ENABLED -#define BLE_BAS_ENABLED 0 -#endif +// needed to build +#define NRFX_SPIM0_ENABLED 1 +#define NRFX_SPIM1_ENABLED 1 +#define NRFX_SPIM2_ENABLED 1 -// BLE_CSCS_ENABLED - ble_cscs - Cycling Speed and Cadence Service +// NRFX_SPIM_ENABLED - nrfx_spim - SPIM peripheral driver +//========================================================== +#ifndef NRFX_SPIM_ENABLED +#define NRFX_SPIM_ENABLED 0 +#endif +// NRFX_SPIM0_ENABLED - Enable SPIM0 instance + -#ifndef BLE_CSCS_ENABLED -#define BLE_CSCS_ENABLED 0 +#ifndef NRFX_SPIM0_ENABLED +#define NRFX_SPIM0_ENABLED 0 #endif -// BLE_CTS_C_ENABLED - ble_cts_c - Current Time Service Client +// NRFX_SPIM1_ENABLED - Enable SPIM1 instance -#ifndef BLE_CTS_C_ENABLED -#define BLE_CTS_C_ENABLED 0 +#ifndef NRFX_SPIM1_ENABLED +#define NRFX_SPIM1_ENABLED 0 #endif -// BLE_DIS_ENABLED - ble_dis - Device Information Service +// NRFX_SPIM2_ENABLED - Enable SPIM2 instance + + +#ifndef NRFX_SPIM2_ENABLED +#define NRFX_SPIM2_ENABLED 0 +#endif +// NRFX_SPIM3_ENABLED - Enable SPIM3 instance + -#ifndef BLE_DIS_ENABLED -#define BLE_DIS_ENABLED 0 +#ifndef NRFX_SPIM3_ENABLED +#define NRFX_SPIM3_ENABLED 0 #endif -// BLE_GLS_ENABLED - ble_gls - Glucose Service +// NRFX_SPIM_EXTENDED_ENABLED - Enable extended SPIM features + +#ifndef NRFX_SPIM_EXTENDED_ENABLED +#define NRFX_SPIM_EXTENDED_ENABLED 0 +#endif -#ifndef BLE_GLS_ENABLED -#define BLE_GLS_ENABLED 0 +// NRFX_SPIM_MISO_PULL_CFG - MISO pin pull configuration. + +// <0=> NRF_GPIO_PIN_NOPULL +// <1=> NRF_GPIO_PIN_PULLDOWN +// <3=> NRF_GPIO_PIN_PULLUP + +#ifndef NRFX_SPIM_MISO_PULL_CFG +#define NRFX_SPIM_MISO_PULL_CFG 1 #endif -// BLE_HIDS_ENABLED - ble_hids - Human Interface Device Service +// NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 +#ifndef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif -#ifndef BLE_HIDS_ENABLED -#define BLE_HIDS_ENABLED 0 +// NRFX_SPIM_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_SPIM_CONFIG_LOG_ENABLED +#define NRFX_SPIM_CONFIG_LOG_ENABLED 0 #endif +// NRFX_SPIM_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -// BLE_HRS_C_ENABLED - ble_hrs_c - Heart Rate Service Client +#ifndef NRFX_SPIM_CONFIG_LOG_LEVEL +#define NRFX_SPIM_CONFIG_LOG_LEVEL 3 +#endif +// NRFX_SPIM_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef BLE_HRS_C_ENABLED -#define BLE_HRS_C_ENABLED 0 +#ifndef NRFX_SPIM_CONFIG_INFO_COLOR +#define NRFX_SPIM_CONFIG_INFO_COLOR 0 #endif -// BLE_HRS_ENABLED - ble_hrs - Heart Rate Service - +// NRFX_SPIM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef BLE_HRS_ENABLED -#define BLE_HRS_ENABLED 0 +#ifndef NRFX_SPIM_CONFIG_DEBUG_COLOR +#define NRFX_SPIM_CONFIG_DEBUG_COLOR 0 #endif -// BLE_HTS_ENABLED - ble_hts - Health Thermometer Service +// +// -#ifndef BLE_HTS_ENABLED -#define BLE_HTS_ENABLED 0 +// NRFX_SPIS_ENABLED - nrfx_spis - SPIS peripheral driver +//========================================================== +#ifndef NRFX_SPIS_ENABLED +#define NRFX_SPIS_ENABLED 0 #endif +// NRFX_SPIS0_ENABLED - Enable SPIS0 instance + -// BLE_IAS_C_ENABLED - ble_ias_c - Immediate Alert Service Client +#ifndef NRFX_SPIS0_ENABLED +#define NRFX_SPIS0_ENABLED 0 +#endif +// NRFX_SPIS1_ENABLED - Enable SPIS1 instance + -#ifndef BLE_IAS_C_ENABLED -#define BLE_IAS_C_ENABLED 0 +#ifndef NRFX_SPIS1_ENABLED +#define NRFX_SPIS1_ENABLED 0 #endif -// BLE_IAS_ENABLED - ble_ias - Immediate Alert Service +// NRFX_SPIS2_ENABLED - Enable SPIS2 instance + +#ifndef NRFX_SPIS2_ENABLED +#define NRFX_SPIS2_ENABLED 0 +#endif -#ifndef BLE_IAS_ENABLED -#define BLE_IAS_ENABLED 0 +// NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif -// BLE_LBS_C_ENABLED - ble_lbs_c - Nordic LED Button Service Client +// NRFX_SPIS_DEFAULT_DEF - SPIS default DEF character <0-255> -#ifndef BLE_LBS_C_ENABLED -#define BLE_LBS_C_ENABLED 0 +#ifndef NRFX_SPIS_DEFAULT_DEF +#define NRFX_SPIS_DEFAULT_DEF 255 #endif -// BLE_LBS_ENABLED - ble_lbs - LED Button Service +// NRFX_SPIS_DEFAULT_ORC - SPIS default ORC character <0-255> -#ifndef BLE_LBS_ENABLED -#define BLE_LBS_ENABLED 0 +#ifndef NRFX_SPIS_DEFAULT_ORC +#define NRFX_SPIS_DEFAULT_ORC 255 #endif -// BLE_LLS_ENABLED - ble_lls - Link Loss Service - +// NRFX_SPIS_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_SPIS_CONFIG_LOG_ENABLED +#define NRFX_SPIS_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_SPIS_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -#ifndef BLE_LLS_ENABLED -#define BLE_LLS_ENABLED 0 +#ifndef NRFX_SPIS_CONFIG_LOG_LEVEL +#define NRFX_SPIS_CONFIG_LOG_LEVEL 3 #endif -// BLE_NUS_C_ENABLED - ble_nus_c - Nordic UART Central Service +// NRFX_SPIS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White +#ifndef NRFX_SPIS_CONFIG_INFO_COLOR +#define NRFX_SPIS_CONFIG_INFO_COLOR 0 +#endif -#ifndef BLE_NUS_C_ENABLED -#define BLE_NUS_C_ENABLED 0 +// NRFX_SPIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_SPIS_CONFIG_DEBUG_COLOR +#define NRFX_SPIS_CONFIG_DEBUG_COLOR 0 #endif -// BLE_NUS_ENABLED - ble_nus - Nordic UART Service +// +// -#ifndef BLE_NUS_ENABLED -#define BLE_NUS_ENABLED 0 +// NRFX_SPI_ENABLED - nrfx_spi - SPI peripheral driver +//========================================================== +// needed these to build! +#define NRFX_SPI_ENABLED 1 +#define NRFX_SPI0_ENABLED 1 + +#ifndef NRFX_SPI_ENABLED +#define NRFX_SPI_ENABLED 0 #endif +// NRFX_SPI0_ENABLED - Enable SPI0 instance + -// BLE_RSCS_C_ENABLED - ble_rscs_c - Running Speed and Cadence Client +#ifndef NRFX_SPI0_ENABLED +#define NRFX_SPI0_ENABLED 0 +#endif +// NRFX_SPI1_ENABLED - Enable SPI1 instance + -#ifndef BLE_RSCS_C_ENABLED -#define BLE_RSCS_C_ENABLED 0 +#ifndef NRFX_SPI1_ENABLED +#define NRFX_SPI1_ENABLED 0 #endif -// BLE_RSCS_ENABLED - ble_rscs - Running Speed and Cadence Service - +// NRFX_SPI2_ENABLED - Enable SPI2 instance + -#ifndef BLE_RSCS_ENABLED -#define BLE_RSCS_ENABLED 0 +#ifndef NRFX_SPI2_ENABLED +#define NRFX_SPI2_ENABLED 0 #endif -// BLE_TPS_ENABLED - ble_tps - TX Power Service +// NRFX_SPI_MISO_PULL_CFG - MISO pin pull configuration. + +// <0=> NRF_GPIO_PIN_NOPULL +// <1=> NRF_GPIO_PIN_PULLDOWN +// <3=> NRF_GPIO_PIN_PULLUP +#ifndef NRFX_SPI_MISO_PULL_CFG +#define NRFX_SPI_MISO_PULL_CFG 1 +#endif -#ifndef BLE_TPS_ENABLED -#define BLE_TPS_ENABLED 0 +// NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif -// +// NRFX_SPI_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== +#ifndef NRFX_SPI_CONFIG_LOG_ENABLED +#define NRFX_SPI_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_SPI_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -// nRF_Core +#ifndef NRFX_SPI_CONFIG_LOG_LEVEL +#define NRFX_SPI_CONFIG_LOG_LEVEL 3 +#endif -//========================================================== -// NRF_MPU_ENABLED - nrf_mpu - Module for MPU -//========================================================== -#ifndef NRF_MPU_ENABLED -#define NRF_MPU_ENABLED 0 +// NRFX_SPI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_SPI_CONFIG_INFO_COLOR +#define NRFX_SPI_CONFIG_INFO_COLOR 0 #endif -// NRF_MPU_CLI_CMDS - Enable CLI commands specific to the module +// NRFX_SPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef NRF_MPU_CLI_CMDS -#define NRF_MPU_CLI_CMDS 1 +#ifndef NRFX_SPI_CONFIG_DEBUG_COLOR +#define NRFX_SPI_CONFIG_DEBUG_COLOR 0 #endif // -// NRF_STACK_GUARD_ENABLED - nrf_stack_guard - Module for Protecting Stack +// + +// NRFX_SWI_ENABLED - nrfx_swi - SWI/EGU peripheral allocator //========================================================== -#ifndef NRF_STACK_GUARD_ENABLED -#define NRF_STACK_GUARD_ENABLED 0 +#ifndef NRFX_SWI_ENABLED +#define NRFX_SWI_ENABLED 0 #endif -// NRF_STACK_GUARD_CONFIG_SIZE - Size of stack guard +// NRFX_EGU_ENABLED - Enable EGU support + -// <5=> 32 bytes -// <6=> 64 bytes -// <7=> 128 bytes -// <8=> 256 bytes -// <9=> 512 bytes -// <10=> 1024 bytes -// <11=> 2048 bytes -// <12=> 4096 bytes - -#ifndef NRF_STACK_GUARD_CONFIG_SIZE -#define NRF_STACK_GUARD_CONFIG_SIZE 7 +#ifndef NRFX_EGU_ENABLED +#define NRFX_EGU_ENABLED 0 #endif -// +// NRFX_SWI0_DISABLED - Exclude SWI0 from being utilized by the driver + -// -//========================================================== +#ifndef NRFX_SWI0_DISABLED +#define NRFX_SWI0_DISABLED 0 +#endif -// nRF_Crypto +// NRFX_SWI1_DISABLED - Exclude SWI1 from being utilized by the driver + -//========================================================== -// NRF_CRYPTO_ENABLED - nrf_crypto - Cryptography library -//========================================================== -#ifndef NRF_CRYPTO_ENABLED -#define NRF_CRYPTO_ENABLED 0 +#ifndef NRFX_SWI1_DISABLED +#define NRFX_SWI1_DISABLED 0 #endif -// NRF_CRYPTO_BACKEND_CC310_LIB - Enable the ARM Cryptocell CC310 backend +// NRFX_SWI2_DISABLED - Exclude SWI2 from being utilized by the driver + + +#ifndef NRFX_SWI2_DISABLED +#define NRFX_SWI2_DISABLED 0 +#endif -// The hardware-accelerated cryptography backend is available only on nRF52840. +// NRFX_SWI3_DISABLED - Exclude SWI3 from being utilized by the driver + -#ifndef NRF_CRYPTO_BACKEND_CC310_LIB -#define NRF_CRYPTO_BACKEND_CC310_LIB 1 +#ifndef NRFX_SWI3_DISABLED +#define NRFX_SWI3_DISABLED 0 #endif -// NRF_CRYPTO_BACKEND_MICRO_ECC - Enable the micro-ecc software backend +// NRFX_SWI4_DISABLED - Exclude SWI4 from being utilized by the driver + -// The micro-ecc library provides a software implementation of ECC cryptography for nRF5 Series devices. -//========================================================== -#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC -#define NRF_CRYPTO_BACKEND_MICRO_ECC 0 +#ifndef NRFX_SWI4_DISABLED +#define NRFX_SWI4_DISABLED 0 #endif -// NRF_CRYPTO_BACKEND_MICRO_ECC_SHA256 - Enable SHA256 +// NRFX_SWI5_DISABLED - Exclude SWI5 from being utilized by the driver + + +#ifndef NRFX_SWI5_DISABLED +#define NRFX_SWI5_DISABLED 0 +#endif -// Enable SHA256 cryptographic hash functionality. -// Enable this setting if you need SHA256 support, for example to verify signatures. +// NRFX_SWI_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_SWI_CONFIG_LOG_ENABLED +#define NRFX_SWI_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_SWI_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_SHA256 -#define NRF_CRYPTO_BACKEND_MICRO_ECC_SHA256 1 +#ifndef NRFX_SWI_CONFIG_LOG_LEVEL +#define NRFX_SWI_CONFIG_LOG_LEVEL 3 #endif -// NRF_CRYPTO_BACKEND_MICRO_ECC_RNG - Enable random number generator +// NRFX_SWI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White +#ifndef NRFX_SWI_CONFIG_INFO_COLOR +#define NRFX_SWI_CONFIG_INFO_COLOR 0 +#endif -// Enable random number generation. -// Enable this setting if you need to generate cryptographic keys. -// This setting requires the RNG peripheral driver to be present. +// NRFX_SWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_RNG -#define NRF_CRYPTO_BACKEND_MICRO_ECC_RNG 0 +#ifndef NRFX_SWI_CONFIG_DEBUG_COLOR +#define NRFX_SWI_CONFIG_DEBUG_COLOR 0 #endif // // -// +// NRFX_TIMER_ENABLED - nrfx_timer - TIMER periperal driver //========================================================== +#ifndef NRFX_TIMER_ENABLED +#define NRFX_TIMER_ENABLED 0 +#endif +// NRFX_TIMER0_ENABLED - Enable TIMER0 instance + -// nRF_DFU +#ifndef NRFX_TIMER0_ENABLED +#define NRFX_TIMER0_ENABLED 0 +#endif -//========================================================== -// ble_dfu - Device Firmware Update +// NRFX_TIMER1_ENABLED - Enable TIMER1 instance + -//========================================================== -// BLE_DFU_ENABLED - Enable DFU Service. +#ifndef NRFX_TIMER1_ENABLED +#define NRFX_TIMER1_ENABLED 0 +#endif +// NRFX_TIMER2_ENABLED - Enable TIMER2 instance + -#ifndef BLE_DFU_ENABLED -#define BLE_DFU_ENABLED 0 +#ifndef NRFX_TIMER2_ENABLED +#define NRFX_TIMER2_ENABLED 0 #endif -// NRF_DFU_BLE_BUTTONLESS_SUPPORTS_BONDS - Buttonless DFU supports bonds. +// NRFX_TIMER3_ENABLED - Enable TIMER3 instance + +#ifndef NRFX_TIMER3_ENABLED +#define NRFX_TIMER3_ENABLED 0 +#endif -#ifndef NRF_DFU_BLE_BUTTONLESS_SUPPORTS_BONDS -#define NRF_DFU_BLE_BUTTONLESS_SUPPORTS_BONDS 0 +// NRFX_TIMER4_ENABLED - Enable TIMER4 instance + + +#ifndef NRFX_TIMER4_ENABLED +#define NRFX_TIMER4_ENABLED 0 #endif -// -//========================================================== +// NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY - Timer frequency if in Timer mode + +// <0=> 16 MHz +// <1=> 8 MHz +// <2=> 4 MHz +// <3=> 2 MHz +// <4=> 1 MHz +// <5=> 500 kHz +// <6=> 250 kHz +// <7=> 125 kHz +// <8=> 62.5 kHz +// <9=> 31.25 kHz -// -//========================================================== +#ifndef NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY +#define NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY 0 +#endif -// nRF_Drivers +// NRFX_TIMER_DEFAULT_CONFIG_MODE - Timer mode or operation + +// <0=> Timer +// <1=> Counter -//========================================================== -// APP_USBD_ENABLED - app_usbd - USB Device library -//========================================================== -#ifndef APP_USBD_ENABLED -#define APP_USBD_ENABLED 0 +#ifndef NRFX_TIMER_DEFAULT_CONFIG_MODE +#define NRFX_TIMER_DEFAULT_CONFIG_MODE 0 #endif -// APP_USBD_VID - Vendor ID <0x0000-0xFFFF> +// NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH - Timer counter bit width + +// <0=> 16 bit +// <1=> 8 bit +// <2=> 24 bit +// <3=> 32 bit -// Vendor ID ordered from USB IF: http://www.usb.org/developers/vendor/ +#ifndef NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH +#define NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH 0 +#endif -#ifndef APP_USBD_VID -#define APP_USBD_VID 0 +// NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif -// APP_USBD_PID - Product ID <0x0000-0xFFFF> +// NRFX_TIMER_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_TIMER_CONFIG_LOG_ENABLED +#define NRFX_TIMER_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_TIMER_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug +#ifndef NRFX_TIMER_CONFIG_LOG_LEVEL +#define NRFX_TIMER_CONFIG_LOG_LEVEL 3 +#endif -// Selected Product ID +// NRFX_TIMER_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef APP_USBD_PID -#define APP_USBD_PID 0 +#ifndef NRFX_TIMER_CONFIG_INFO_COLOR +#define NRFX_TIMER_CONFIG_INFO_COLOR 0 #endif -// APP_USBD_DEVICE_VER_MAJOR - Device version, major part <0-99> +// NRFX_TIMER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White +#ifndef NRFX_TIMER_CONFIG_DEBUG_COLOR +#define NRFX_TIMER_CONFIG_DEBUG_COLOR 0 +#endif -// Device version, will be converted automatically to BCD notation. Use just decimal values. +// -#ifndef APP_USBD_DEVICE_VER_MAJOR -#define APP_USBD_DEVICE_VER_MAJOR 1 +// + +// NRFX_TWIM_ENABLED - nrfx_twim - TWIM peripheral driver +//========================================================== +#ifndef NRFX_TWIM_ENABLED +#define NRFX_TWIM_ENABLED 1 #endif +// NRFX_TWIM0_ENABLED - Enable TWIM0 instance + -// APP_USBD_DEVICE_VER_MINOR - Device version, minor part <0-99> +#ifndef NRFX_TWIM0_ENABLED +#define NRFX_TWIM0_ENABLED 1 +#endif +// NRFX_TWIM1_ENABLED - Enable TWIM1 instance -// Device version, will be converted automatically to BCD notation. Use just decimal values. -#ifndef APP_USBD_DEVICE_VER_MINOR -#define APP_USBD_DEVICE_VER_MINOR 0 +#ifndef NRFX_TWIM1_ENABLED +#define NRFX_TWIM1_ENABLED 1 #endif -// APP_USBD_EVENT_QUEUE_ENABLE - Enable event queue +// NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY - Frequency -// This is the default configuration when all the events are placed into internal queue. -// Disable it when external queue is used like app_scheduler or if you wish to process all events inside interrupts. -// Processing all events from the interrupt level adds requirement not to call any functions that modifies the USBD library state from the context higher than USB interrupt context. -// Functions that modify USBD state are functions for sleep, wakeup, start, stop, enable and disable. -//========================================================== -#ifndef APP_USBD_EVENT_QUEUE_ENABLE -#define APP_USBD_EVENT_QUEUE_ENABLE 1 +// <26738688=> 100k +// <67108864=> 250k +// <104857600=> 400k + +#ifndef NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY +#define NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY 26738688 #endif -// APP_USBD_EVENT_QUEUE_SIZE - The size of event queue <16-64> +// NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit -// The size of the queue for the events that would be processed in the main loop. -#ifndef APP_USBD_EVENT_QUEUE_SIZE -#define APP_USBD_EVENT_QUEUE_SIZE 32 +#ifndef NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT +#define NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0 #endif -// +// NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority -// APP_USBD_CONFIG_LOG_ENABLED - Enable logging in the module +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif + +// NRFX_TWIM_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== -#ifndef APP_USBD_CONFIG_LOG_ENABLED -#define APP_USBD_CONFIG_LOG_ENABLED 0 +#ifndef NRFX_TWIM_CONFIG_LOG_ENABLED +#define NRFX_TWIM_CONFIG_LOG_ENABLED 0 #endif -// APP_USBD_CONFIG_LOG_LEVEL - Default Severity level +// NRFX_TWIM_CONFIG_LOG_LEVEL - Default Severity level // <0=> Off // <1=> Error @@ -1619,11 +3874,11 @@ // <3=> Info // <4=> Debug -#ifndef APP_USBD_CONFIG_LOG_LEVEL -#define APP_USBD_CONFIG_LOG_LEVEL 3 +#ifndef NRFX_TWIM_CONFIG_LOG_LEVEL +#define NRFX_TWIM_CONFIG_LOG_LEVEL 3 #endif -// APP_USBD_CONFIG_INFO_COLOR - ANSI escape code prefix. +// NRFX_TWIM_CONFIG_INFO_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black @@ -1635,11 +3890,11 @@ // <7=> Cyan // <8=> White -#ifndef APP_USBD_CONFIG_INFO_COLOR -#define APP_USBD_CONFIG_INFO_COLOR 0 +#ifndef NRFX_TWIM_CONFIG_INFO_COLOR +#define NRFX_TWIM_CONFIG_INFO_COLOR 0 #endif -// APP_USBD_CONFIG_DEBUG_COLOR - ANSI escape code prefix. +// NRFX_TWIM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black @@ -1651,453 +3906,637 @@ // <7=> Cyan // <8=> White -#ifndef APP_USBD_CONFIG_DEBUG_COLOR -#define APP_USBD_CONFIG_DEBUG_COLOR 0 +#ifndef NRFX_TWIM_CONFIG_DEBUG_COLOR +#define NRFX_TWIM_CONFIG_DEBUG_COLOR 0 #endif // // -// CLOCK_ENABLED - nrf_drv_clock - CLOCK peripheral driver -//========================================================== -#ifndef CLOCK_ENABLED -#define CLOCK_ENABLED 0 -#endif -// CLOCK_CONFIG_XTAL_FREQ - HF XTAL Frequency - -// <0=> Default (64 MHz) - -#ifndef CLOCK_CONFIG_XTAL_FREQ -#define CLOCK_CONFIG_XTAL_FREQ 0 -#endif - -// CLOCK_CONFIG_LF_SRC - LF Clock Source - -// <0=> RC -// <1=> XTAL -// <2=> Synth - -#ifndef CLOCK_CONFIG_LF_SRC -#define CLOCK_CONFIG_LF_SRC 1 -#endif - -// CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef CLOCK_CONFIG_IRQ_PRIORITY -#define CLOCK_CONFIG_IRQ_PRIORITY 7 -#endif - -// - -// COMP_ENABLED - nrf_drv_comp - COMP peripheral driver +// NRFX_TWIS_ENABLED - nrfx_twis - TWIS peripheral driver //========================================================== -#ifndef COMP_ENABLED -#define COMP_ENABLED 0 -#endif -// COMP_CONFIG_REF - Reference voltage - -// <0=> Internal 1.2V -// <1=> Internal 1.8V -// <2=> Internal 2.4V -// <4=> VDD -// <7=> ARef - -#ifndef COMP_CONFIG_REF -#define COMP_CONFIG_REF 1 -#endif - -// COMP_CONFIG_MAIN_MODE - Main mode - -// <0=> Single ended -// <1=> Differential - -#ifndef COMP_CONFIG_MAIN_MODE -#define COMP_CONFIG_MAIN_MODE 0 +#ifndef NRFX_TWIS_ENABLED +#define NRFX_TWIS_ENABLED 0 #endif +// NRFX_TWIS0_ENABLED - Enable TWIS0 instance + -// COMP_CONFIG_SPEED_MODE - Speed mode - -// <0=> Low power -// <1=> Normal -// <2=> High speed - -#ifndef COMP_CONFIG_SPEED_MODE -#define COMP_CONFIG_SPEED_MODE 2 +#ifndef NRFX_TWIS0_ENABLED +#define NRFX_TWIS0_ENABLED 0 #endif -// COMP_CONFIG_HYST - Hystheresis - -// <0=> No -// <1=> 50mV +// NRFX_TWIS1_ENABLED - Enable TWIS1 instance + -#ifndef COMP_CONFIG_HYST -#define COMP_CONFIG_HYST 0 +#ifndef NRFX_TWIS1_ENABLED +#define NRFX_TWIS1_ENABLED 0 #endif -// COMP_CONFIG_ISOURCE - Current Source +// NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once + -// <0=> Off -// <1=> 2.5 uA -// <2=> 5 uA -// <3=> 10 uA +// Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code. -#ifndef COMP_CONFIG_ISOURCE -#define COMP_CONFIG_ISOURCE 0 +#ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY +#define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 #endif -// COMP_CONFIG_INPUT - Analog input +// NRFX_TWIS_NO_SYNC_MODE - Remove support for synchronous mode + -// <0=> 0 -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources. -#ifndef COMP_CONFIG_INPUT -#define COMP_CONFIG_INPUT 0 +#ifndef NRFX_TWIS_NO_SYNC_MODE +#define NRFX_TWIS_NO_SYNC_MODE 0 #endif -// COMP_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// NRFX_TWIS_DEFAULT_CONFIG_ADDR0 - Address0 +#ifndef NRFX_TWIS_DEFAULT_CONFIG_ADDR0 +#define NRFX_TWIS_DEFAULT_CONFIG_ADDR0 0 +#endif -#ifndef COMP_CONFIG_IRQ_PRIORITY -#define COMP_CONFIG_IRQ_PRIORITY 7 +// NRFX_TWIS_DEFAULT_CONFIG_ADDR1 - Address1 +#ifndef NRFX_TWIS_DEFAULT_CONFIG_ADDR1 +#define NRFX_TWIS_DEFAULT_CONFIG_ADDR1 0 #endif -// +// NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL - SCL pin pull configuration + +// <0=> Disabled +// <1=> Pull down +// <3=> Pull up -// EGU_ENABLED - nrf_drv_swi - SWI(EGU) peripheral driver +#ifndef NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL +#define NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL 0 +#endif +// NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL - SDA pin pull configuration + +// <0=> Disabled +// <1=> Pull down +// <3=> Pull up -#ifndef EGU_ENABLED -#define EGU_ENABLED 1 +#ifndef NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL +#define NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL 0 +#endif + +// NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif -// GPIOTE_ENABLED - nrf_drv_gpiote - GPIOTE peripheral driver +// NRFX_TWIS_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== -#ifndef GPIOTE_ENABLED -#define GPIOTE_ENABLED 1 +#ifndef NRFX_TWIS_CONFIG_LOG_ENABLED +#define NRFX_TWIS_CONFIG_LOG_ENABLED 0 #endif -// GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins -#ifndef GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS -#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 4 +// NRFX_TWIS_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_TWIS_CONFIG_LOG_LEVEL +#define NRFX_TWIS_CONFIG_LOG_LEVEL 3 #endif -// GPIOTE_CONFIG_IRQ_PRIORITY - Interrupt priority +// NRFX_TWIS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White +#ifndef NRFX_TWIS_CONFIG_INFO_COLOR +#define NRFX_TWIS_CONFIG_INFO_COLOR 0 +#endif -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// NRFX_TWIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef GPIOTE_CONFIG_IRQ_PRIORITY -#define GPIOTE_CONFIG_IRQ_PRIORITY 7 +#ifndef NRFX_TWIS_CONFIG_DEBUG_COLOR +#define NRFX_TWIS_CONFIG_DEBUG_COLOR 0 #endif // -// I2S_ENABLED - nrf_drv_i2s - I2S peripheral driver +// + +// NRFX_TWI_ENABLED - nrfx_twi - TWI peripheral driver //========================================================== -#ifndef I2S_ENABLED -#define I2S_ENABLED 0 + +#ifndef NRFX_TWI_ENABLED +#define NRFX_TWI_ENABLED 1 #endif -// I2S_CONFIG_SCK_PIN - SCK pin <0-31> +// NRFX_TWI0_ENABLED - Enable TWI0 instance -#ifndef I2S_CONFIG_SCK_PIN -#define I2S_CONFIG_SCK_PIN 31 +#ifndef NRFX_TWI0_ENABLED +#define NRFX_TWI0_ENABLED 1 #endif -// I2S_CONFIG_LRCK_PIN - LRCK pin <1-31> +// NRFX_TWI1_ENABLED - Enable TWI1 instance -#ifndef I2S_CONFIG_LRCK_PIN -#define I2S_CONFIG_LRCK_PIN 30 +#ifndef NRFX_TWI1_ENABLED +#define NRFX_TWI1_ENABLED 1 #endif -// I2S_CONFIG_MCK_PIN - MCK pin -#ifndef I2S_CONFIG_MCK_PIN -#define I2S_CONFIG_MCK_PIN 255 -#endif +// NRFX_TWI_DEFAULT_CONFIG_FREQUENCY - Frequency + +// <26738688=> 100k +// <67108864=> 250k +// <104857600=> 400k -// I2S_CONFIG_SDOUT_PIN - SDOUT pin <0-31> +#ifndef NRFX_TWI_DEFAULT_CONFIG_FREQUENCY +#define NRFX_TWI_DEFAULT_CONFIG_FREQUENCY 26738688 +#endif +// NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit + -#ifndef I2S_CONFIG_SDOUT_PIN -#define I2S_CONFIG_SDOUT_PIN 29 +#ifndef NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT +#define NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0 #endif -// I2S_CONFIG_SDIN_PIN - SDIN pin <0-31> +// NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 +#ifndef NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif -#ifndef I2S_CONFIG_SDIN_PIN -#define I2S_CONFIG_SDIN_PIN 28 +// NRFX_TWI_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_TWI_CONFIG_LOG_ENABLED +#define NRFX_TWI_CONFIG_LOG_ENABLED 0 #endif +// NRFX_TWI_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -// I2S_CONFIG_MASTER - Mode +#ifndef NRFX_TWI_CONFIG_LOG_LEVEL +#define NRFX_TWI_CONFIG_LOG_LEVEL 3 +#endif -// <0=> Master -// <1=> Slave +// NRFX_TWI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef I2S_CONFIG_MASTER -#define I2S_CONFIG_MASTER 0 +#ifndef NRFX_TWI_CONFIG_INFO_COLOR +#define NRFX_TWI_CONFIG_INFO_COLOR 0 #endif -// I2S_CONFIG_FORMAT - Format - -// <0=> I2S -// <1=> Aligned +// NRFX_TWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef I2S_CONFIG_FORMAT -#define I2S_CONFIG_FORMAT 0 +#ifndef NRFX_TWI_CONFIG_DEBUG_COLOR +#define NRFX_TWI_CONFIG_DEBUG_COLOR 0 #endif -// I2S_CONFIG_ALIGN - Alignment +// -// <0=> Left -// <1=> Right +// -#ifndef I2S_CONFIG_ALIGN -#define I2S_CONFIG_ALIGN 0 +// NRFX_UARTE_ENABLED - nrfx_uarte - UARTE peripheral driver +//========================================================== +#ifndef NRFX_UARTE_ENABLED +#define NRFX_UARTE_ENABLED 0 +#endif +// NRFX_UARTE0_ENABLED - Enable UARTE0 instance +#ifndef NRFX_UARTE0_ENABLED +#define NRFX_UARTE0_ENABLED 0 #endif -// I2S_CONFIG_SWIDTH - Sample width (bits) +// NRFX_UARTE1_ENABLED - Enable UARTE1 instance +#ifndef NRFX_UARTE1_ENABLED +#define NRFX_UARTE1_ENABLED 0 +#endif -// <0=> 8 -// <1=> 16 -// <2=> 24 +// NRFX_UARTE_DEFAULT_CONFIG_HWFC - Hardware Flow Control + +// <0=> Disabled +// <1=> Enabled -#ifndef I2S_CONFIG_SWIDTH -#define I2S_CONFIG_SWIDTH 1 +#ifndef NRFX_UARTE_DEFAULT_CONFIG_HWFC +#define NRFX_UARTE_DEFAULT_CONFIG_HWFC 0 #endif -// I2S_CONFIG_CHANNELS - Channels +// NRFX_UARTE_DEFAULT_CONFIG_PARITY - Parity + +// <0=> Excluded +// <14=> Included + +#ifndef NRFX_UARTE_DEFAULT_CONFIG_PARITY +#define NRFX_UARTE_DEFAULT_CONFIG_PARITY 0 +#endif -// <0=> Stereo -// <1=> Left -// <2=> Right +// NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE - Default Baudrate + +// <323584=> 1200 baud +// <643072=> 2400 baud +// <1290240=> 4800 baud +// <2576384=> 9600 baud +// <3862528=> 14400 baud +// <5152768=> 19200 baud +// <7716864=> 28800 baud +// <8388608=> 31250 baud +// <10289152=> 38400 baud +// <15007744=> 56000 baud +// <15400960=> 57600 baud +// <20615168=> 76800 baud +// <30801920=> 115200 baud +// <61865984=> 230400 baud +// <67108864=> 250000 baud +// <121634816=> 460800 baud +// <251658240=> 921600 baud +// <268435456=> 1000000 baud -#ifndef I2S_CONFIG_CHANNELS -#define I2S_CONFIG_CHANNELS 1 +#ifndef NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE +#define NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE 30801920 #endif -// I2S_CONFIG_MCK_SETUP - MCK behavior +// NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -// <0=> Disabled -// <2147483648=> 32MHz/2 -// <1342177280=> 32MHz/3 -// <1073741824=> 32MHz/4 -// <805306368=> 32MHz/5 -// <671088640=> 32MHz/6 -// <536870912=> 32MHz/8 -// <402653184=> 32MHz/10 -// <369098752=> 32MHz/11 -// <285212672=> 32MHz/15 -// <268435456=> 32MHz/16 -// <201326592=> 32MHz/21 -// <184549376=> 32MHz/23 -// <142606336=> 32MHz/30 -// <138412032=> 32MHz/31 -// <134217728=> 32MHz/32 -// <100663296=> 32MHz/42 -// <68157440=> 32MHz/63 -// <34340864=> 32MHz/125 +#ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif -#ifndef I2S_CONFIG_MCK_SETUP -#define I2S_CONFIG_MCK_SETUP 536870912 +// NRFX_UARTE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_UARTE_CONFIG_LOG_ENABLED +#define NRFX_UARTE_CONFIG_LOG_ENABLED 0 #endif +// NRFX_UARTE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -// I2S_CONFIG_RATIO - MCK/LRCK ratio +#ifndef NRFX_UARTE_CONFIG_LOG_LEVEL +#define NRFX_UARTE_CONFIG_LOG_LEVEL 3 +#endif -// <0=> 32x -// <1=> 48x -// <2=> 64x -// <3=> 96x -// <4=> 128x -// <5=> 192x -// <6=> 256x -// <7=> 384x -// <8=> 512x +// NRFX_UARTE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef I2S_CONFIG_RATIO -#define I2S_CONFIG_RATIO 2000 +#ifndef NRFX_UARTE_CONFIG_INFO_COLOR +#define NRFX_UARTE_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_UARTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_UARTE_CONFIG_DEBUG_COLOR +#define NRFX_UARTE_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_UART_ENABLED - nrfx_uart - UART peripheral driver +//========================================================== +#ifndef NRFX_UART_ENABLED +#define NRFX_UART_ENABLED 0 +#endif +// NRFX_UART0_ENABLED - Enable UART0 instance +#ifndef NRFX_UART0_ENABLED +#define NRFX_UART0_ENABLED 0 +#endif + +// NRFX_UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control + +// <0=> Disabled +// <1=> Enabled + +#ifndef NRFX_UART_DEFAULT_CONFIG_HWFC +#define NRFX_UART_DEFAULT_CONFIG_HWFC 0 #endif -// I2S_CONFIG_IRQ_PRIORITY - Interrupt priority +// NRFX_UART_DEFAULT_CONFIG_PARITY - Parity + +// <0=> Excluded +// <14=> Included +#ifndef NRFX_UART_DEFAULT_CONFIG_PARITY +#define NRFX_UART_DEFAULT_CONFIG_PARITY 0 +#endif -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// NRFX_UART_DEFAULT_CONFIG_BAUDRATE - Default Baudrate + +// <323584=> 1200 baud +// <643072=> 2400 baud +// <1290240=> 4800 baud +// <2576384=> 9600 baud +// <3866624=> 14400 baud +// <5152768=> 19200 baud +// <7729152=> 28800 baud +// <8388608=> 31250 baud +// <10309632=> 38400 baud +// <15007744=> 56000 baud +// <15462400=> 57600 baud +// <20615168=> 76800 baud +// <30924800=> 115200 baud +// <61845504=> 230400 baud +// <67108864=> 250000 baud +// <123695104=> 460800 baud +// <247386112=> 921600 baud +// <268435456=> 1000000 baud -#ifndef I2S_CONFIG_IRQ_PRIORITY -#define I2S_CONFIG_IRQ_PRIORITY 7 +#ifndef NRFX_UART_DEFAULT_CONFIG_BAUDRATE +#define NRFX_UART_DEFAULT_CONFIG_BAUDRATE 30924800 #endif -// +// NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif -// LPCOMP_ENABLED - nrf_drv_lpcomp - LPCOMP peripheral driver +// NRFX_UART_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== -#ifndef LPCOMP_ENABLED -#define LPCOMP_ENABLED 0 +#ifndef NRFX_UART_CONFIG_LOG_ENABLED +#define NRFX_UART_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_UART_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_UART_CONFIG_LOG_LEVEL +#define NRFX_UART_CONFIG_LOG_LEVEL 3 #endif -// LPCOMP_CONFIG_REFERENCE - Reference voltage -// <0=> Supply 1/8 -// <1=> Supply 2/8 -// <2=> Supply 3/8 -// <3=> Supply 4/8 -// <4=> Supply 5/8 -// <5=> Supply 6/8 -// <6=> Supply 7/8 -// <8=> Supply 1/16 (nRF52) -// <9=> Supply 3/16 (nRF52) -// <10=> Supply 5/16 (nRF52) -// <11=> Supply 7/16 (nRF52) -// <12=> Supply 9/16 (nRF52) -// <13=> Supply 11/16 (nRF52) -// <14=> Supply 13/16 (nRF52) -// <15=> Supply 15/16 (nRF52) -// <7=> External Ref 0 -// <65543=> External Ref 1 +// NRFX_UART_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef LPCOMP_CONFIG_REFERENCE -#define LPCOMP_CONFIG_REFERENCE 3 +#ifndef NRFX_UART_CONFIG_INFO_COLOR +#define NRFX_UART_CONFIG_INFO_COLOR 0 #endif -// LPCOMP_CONFIG_DETECTION - Detection +// NRFX_UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// <0=> Crossing -// <1=> Up -// <2=> Down +#ifndef NRFX_UART_CONFIG_DEBUG_COLOR +#define NRFX_UART_CONFIG_DEBUG_COLOR 0 +#endif -#ifndef LPCOMP_CONFIG_DETECTION -#define LPCOMP_CONFIG_DETECTION 2 +// + +// + +// NRFX_WDT_ENABLED - nrfx_wdt - WDT peripheral driver +//========================================================== +#ifndef NRFX_WDT_ENABLED +#define NRFX_WDT_ENABLED 0 #endif +// NRFX_WDT_CONFIG_BEHAVIOUR - WDT behavior in CPU SLEEP or HALT mode + +// <1=> Run in SLEEP, Pause in HALT +// <8=> Pause in SLEEP, Run in HALT +// <9=> Run in SLEEP and HALT +// <0=> Pause in SLEEP and HALT -// LPCOMP_CONFIG_INPUT - Analog input +#ifndef NRFX_WDT_CONFIG_BEHAVIOUR +#define NRFX_WDT_CONFIG_BEHAVIOUR 1 +#endif -// <0=> 0 -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// NRFX_WDT_CONFIG_RELOAD_VALUE - Reload value <15-4294967295> -#ifndef LPCOMP_CONFIG_INPUT -#define LPCOMP_CONFIG_INPUT 0 + +#ifndef NRFX_WDT_CONFIG_RELOAD_VALUE +#define NRFX_WDT_CONFIG_RELOAD_VALUE 2000 #endif -// LPCOMP_CONFIG_HYST - Hysteresis +// NRFX_WDT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 +#ifndef NRFX_WDT_CONFIG_IRQ_PRIORITY +#define NRFX_WDT_CONFIG_IRQ_PRIORITY 7 +#endif -#ifndef LPCOMP_CONFIG_HYST -#define LPCOMP_CONFIG_HYST 0 +// NRFX_WDT_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_WDT_CONFIG_LOG_ENABLED +#define NRFX_WDT_CONFIG_LOG_ENABLED 0 #endif +// NRFX_WDT_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -// LPCOMP_CONFIG_IRQ_PRIORITY - Interrupt priority +#ifndef NRFX_WDT_CONFIG_LOG_LEVEL +#define NRFX_WDT_CONFIG_LOG_LEVEL 3 +#endif +// NRFX_WDT_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +#ifndef NRFX_WDT_CONFIG_INFO_COLOR +#define NRFX_WDT_CONFIG_INFO_COLOR 0 +#endif -#ifndef LPCOMP_CONFIG_IRQ_PRIORITY -#define LPCOMP_CONFIG_IRQ_PRIORITY 7 +// NRFX_WDT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_WDT_CONFIG_DEBUG_COLOR +#define NRFX_WDT_CONFIG_DEBUG_COLOR 0 #endif // -// PDM_ENABLED - nrf_drv_pdm - PDM peripheral driver +// + +// PDM_ENABLED - nrf_drv_pdm - PDM peripheral driver - legacy layer //========================================================== #ifndef PDM_ENABLED #define PDM_ENABLED 0 #endif // PDM_CONFIG_MODE - Mode - -// <0=> Stereo -// <1=> Mono + +// <0=> Stereo +// <1=> Mono #ifndef PDM_CONFIG_MODE #define PDM_CONFIG_MODE 1 #endif // PDM_CONFIG_EDGE - Edge - -// <0=> Left falling -// <1=> Left rising + +// <0=> Left falling +// <1=> Left rising #ifndef PDM_CONFIG_EDGE #define PDM_CONFIG_EDGE 0 #endif // PDM_CONFIG_CLOCK_FREQ - Clock frequency - -// <134217728=> 1000k -// <138412032=> 1032k (default) -// <142606336=> 1067k + +// <134217728=> 1000k +// <138412032=> 1032k (default) +// <142606336=> 1067k #ifndef PDM_CONFIG_CLOCK_FREQ #define PDM_CONFIG_CLOCK_FREQ 138412032 #endif // PDM_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef PDM_CONFIG_IRQ_PRIORITY #define PDM_CONFIG_IRQ_PRIORITY 7 @@ -2105,37 +4544,30 @@ // -// PERIPHERAL_RESOURCE_SHARING_ENABLED - nrf_drv_common - Peripheral drivers common module - - -#ifndef PERIPHERAL_RESOURCE_SHARING_ENABLED -#define PERIPHERAL_RESOURCE_SHARING_ENABLED 1 -#endif - -// POWER_ENABLED - nrf_drv_power - POWER peripheral driver +// POWER_ENABLED - nrf_drv_power - POWER peripheral driver - legacy layer //========================================================== #ifndef POWER_ENABLED #define POWER_ENABLED 0 #endif // POWER_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef POWER_CONFIG_IRQ_PRIORITY #define POWER_CONFIG_IRQ_PRIORITY 7 #endif // POWER_CONFIG_DEFAULT_DCDCEN - The default configuration of main DCDC regulator - + // This settings means only that components for DCDC regulator are installed and it can be enabled. @@ -2144,7 +4576,7 @@ #endif // POWER_CONFIG_DEFAULT_DCDCENHV - The default configuration of High Voltage DCDC regulator - + // This settings means only that components for DCDC regulator are installed and it can be enabled. @@ -2154,40 +4586,40 @@ // -// PPI_ENABLED - nrf_drv_ppi - PPI peripheral driver - +// PPI_ENABLED - nrf_drv_ppi - PPI peripheral driver - legacy layer + #ifndef PPI_ENABLED #define PPI_ENABLED 1 #endif -// PWM_ENABLED - nrf_drv_pwm - PWM peripheral driver +// PWM_ENABLED - nrf_drv_pwm - PWM peripheral driver - legacy layer //========================================================== #ifndef PWM_ENABLED -#define PWM_ENABLED 1 +#define PWM_ENABLED 0 #endif -// PWM_DEFAULT_CONFIG_OUT0_PIN - Out0 pin <0-31> +// PWM_DEFAULT_CONFIG_OUT0_PIN - Out0 pin <0-31> #ifndef PWM_DEFAULT_CONFIG_OUT0_PIN #define PWM_DEFAULT_CONFIG_OUT0_PIN 31 #endif -// PWM_DEFAULT_CONFIG_OUT1_PIN - Out1 pin <0-31> +// PWM_DEFAULT_CONFIG_OUT1_PIN - Out1 pin <0-31> #ifndef PWM_DEFAULT_CONFIG_OUT1_PIN #define PWM_DEFAULT_CONFIG_OUT1_PIN 31 #endif -// PWM_DEFAULT_CONFIG_OUT2_PIN - Out2 pin <0-31> +// PWM_DEFAULT_CONFIG_OUT2_PIN - Out2 pin <0-31> #ifndef PWM_DEFAULT_CONFIG_OUT2_PIN #define PWM_DEFAULT_CONFIG_OUT2_PIN 31 #endif -// PWM_DEFAULT_CONFIG_OUT3_PIN - Out3 pin <0-31> +// PWM_DEFAULT_CONFIG_OUT3_PIN - Out3 pin <0-31> #ifndef PWM_DEFAULT_CONFIG_OUT3_PIN @@ -2195,233 +4627,363 @@ #endif // PWM_DEFAULT_CONFIG_BASE_CLOCK - Base clock - -// <0=> 16 MHz -// <1=> 8 MHz -// <2=> 4 MHz -// <3=> 2 MHz -// <4=> 1 MHz -// <5=> 500 kHz -// <6=> 250 kHz -// <7=> 125 kHz + +// <0=> 16 MHz +// <1=> 8 MHz +// <2=> 4 MHz +// <3=> 2 MHz +// <4=> 1 MHz +// <5=> 500 kHz +// <6=> 250 kHz +// <7=> 125 kHz #ifndef PWM_DEFAULT_CONFIG_BASE_CLOCK #define PWM_DEFAULT_CONFIG_BASE_CLOCK 4 #endif // PWM_DEFAULT_CONFIG_COUNT_MODE - Count mode - -// <0=> Up -// <1=> Up and Down + +// <0=> Up +// <1=> Up and Down #ifndef PWM_DEFAULT_CONFIG_COUNT_MODE #define PWM_DEFAULT_CONFIG_COUNT_MODE 0 #endif -// PWM_DEFAULT_CONFIG_TOP_VALUE - Top value +// PWM_DEFAULT_CONFIG_TOP_VALUE - Top value #ifndef PWM_DEFAULT_CONFIG_TOP_VALUE #define PWM_DEFAULT_CONFIG_TOP_VALUE 1000 #endif // PWM_DEFAULT_CONFIG_LOAD_MODE - Load mode - -// <0=> Common -// <1=> Grouped -// <2=> Individual -// <3=> Waveform + +// <0=> Common +// <1=> Grouped +// <2=> Individual +// <3=> Waveform #ifndef PWM_DEFAULT_CONFIG_LOAD_MODE #define PWM_DEFAULT_CONFIG_LOAD_MODE 0 #endif // PWM_DEFAULT_CONFIG_STEP_MODE - Step mode - -// <0=> Auto -// <1=> Triggered + +// <0=> Auto +// <1=> Triggered #ifndef PWM_DEFAULT_CONFIG_STEP_MODE #define PWM_DEFAULT_CONFIG_STEP_MODE 0 #endif // PWM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + - -// Priorities 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef PWM_DEFAULT_CONFIG_IRQ_PRIORITY #define PWM_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif // PWM0_ENABLED - Enable PWM0 instance - + #ifndef PWM0_ENABLED -#define PWM0_ENABLED 1 +#define PWM0_ENABLED 0 #endif // PWM1_ENABLED - Enable PWM1 instance - + #ifndef PWM1_ENABLED -#define PWM1_ENABLED 1 +#define PWM1_ENABLED 0 #endif // PWM2_ENABLED - Enable PWM2 instance - + #ifndef PWM2_ENABLED -#define PWM2_ENABLED 1 +#define PWM2_ENABLED 0 #endif // PWM3_ENABLED - Enable PWM3 instance - + #ifndef PWM3_ENABLED -#define PWM3_ENABLED 1 +#define PWM3_ENABLED 0 #endif // -// QDEC_ENABLED - nrf_drv_qdec - QDEC peripheral driver +// QDEC_ENABLED - nrf_drv_qdec - QDEC peripheral driver - legacy layer //========================================================== #ifndef QDEC_ENABLED #define QDEC_ENABLED 0 #endif // QDEC_CONFIG_REPORTPER - Report period - -// <0=> 10 Samples -// <1=> 40 Samples -// <2=> 80 Samples -// <3=> 120 Samples -// <4=> 160 Samples -// <5=> 200 Samples -// <6=> 240 Samples -// <7=> 280 Samples + +// <0=> 10 Samples +// <1=> 40 Samples +// <2=> 80 Samples +// <3=> 120 Samples +// <4=> 160 Samples +// <5=> 200 Samples +// <6=> 240 Samples +// <7=> 280 Samples #ifndef QDEC_CONFIG_REPORTPER #define QDEC_CONFIG_REPORTPER 0 #endif // QDEC_CONFIG_SAMPLEPER - Sample period - -// <0=> 128 us -// <1=> 256 us -// <2=> 512 us -// <3=> 1024 us -// <4=> 2048 us -// <5=> 4096 us -// <6=> 8192 us -// <7=> 16384 us + +// <0=> 128 us +// <1=> 256 us +// <2=> 512 us +// <3=> 1024 us +// <4=> 2048 us +// <5=> 4096 us +// <6=> 8192 us +// <7=> 16384 us #ifndef QDEC_CONFIG_SAMPLEPER #define QDEC_CONFIG_SAMPLEPER 7 #endif -// QDEC_CONFIG_PIO_A - A pin <0-31> +// QDEC_CONFIG_PIO_A - A pin <0-31> #ifndef QDEC_CONFIG_PIO_A #define QDEC_CONFIG_PIO_A 31 #endif -// QDEC_CONFIG_PIO_B - B pin <0-31> +// QDEC_CONFIG_PIO_B - B pin <0-31> #ifndef QDEC_CONFIG_PIO_B #define QDEC_CONFIG_PIO_B 31 #endif -// QDEC_CONFIG_PIO_LED - LED pin <0-31> +// QDEC_CONFIG_PIO_LED - LED pin <0-31> #ifndef QDEC_CONFIG_PIO_LED #define QDEC_CONFIG_PIO_LED 31 #endif -// QDEC_CONFIG_LEDPRE - LED pre +// QDEC_CONFIG_LEDPRE - LED pre #ifndef QDEC_CONFIG_LEDPRE #define QDEC_CONFIG_LEDPRE 511 #endif // QDEC_CONFIG_LEDPOL - LED polarity - -// <0=> Active low -// <1=> Active high + +// <0=> Active low +// <1=> Active high #ifndef QDEC_CONFIG_LEDPOL #define QDEC_CONFIG_LEDPOL 1 #endif // QDEC_CONFIG_DBFEN - Debouncing enable + + +#ifndef QDEC_CONFIG_DBFEN +#define QDEC_CONFIG_DBFEN 0 +#endif + +// QDEC_CONFIG_SAMPLE_INTEN - Sample ready interrupt enable + + +#ifndef QDEC_CONFIG_SAMPLE_INTEN +#define QDEC_CONFIG_SAMPLE_INTEN 0 +#endif + +// QDEC_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef QDEC_CONFIG_IRQ_PRIORITY +#define QDEC_CONFIG_IRQ_PRIORITY 7 +#endif + +// + +// QSPI_ENABLED - nrf_drv_qspi - QSPI peripheral driver - legacy layer +//========================================================== +#ifndef QSPI_ENABLED +#define QSPI_ENABLED 0 +#endif +// QSPI_CONFIG_SCK_DELAY - tSHSL, tWHSL and tSHWL in number of 16 MHz periods (62.5 ns). <0-255> + + +#ifndef QSPI_CONFIG_SCK_DELAY +#define QSPI_CONFIG_SCK_DELAY 1 +#endif +// QSPI_CONFIG_XIP_OFFSET - Address offset in the external memory for Execute in Place operation. +#ifndef QSPI_CONFIG_XIP_OFFSET +#define QSPI_CONFIG_XIP_OFFSET 0 +#endif + +// QSPI_CONFIG_READOC - Number of data lines and opcode used for reading. + +// <0=> FastRead +// <1=> Read2O +// <2=> Read2IO +// <3=> Read4O +// <4=> Read4IO + +#ifndef QSPI_CONFIG_READOC +#define QSPI_CONFIG_READOC 0 +#endif + +// QSPI_CONFIG_WRITEOC - Number of data lines and opcode used for writing. + +// <0=> PP +// <1=> PP2O +// <2=> PP4O +// <3=> PP4IO + +#ifndef QSPI_CONFIG_WRITEOC +#define QSPI_CONFIG_WRITEOC 0 +#endif + +// QSPI_CONFIG_ADDRMODE - Addressing mode. + +// <0=> 24bit +// <1=> 32bit + +#ifndef QSPI_CONFIG_ADDRMODE +#define QSPI_CONFIG_ADDRMODE 0 +#endif + +// QSPI_CONFIG_MODE - SPI mode. + +// <0=> Mode 0 +// <1=> Mode 1 + +#ifndef QSPI_CONFIG_MODE +#define QSPI_CONFIG_MODE 0 +#endif + +// QSPI_CONFIG_FREQUENCY - Frequency divider. + +// <0=> 32MHz/1 +// <1=> 32MHz/2 +// <2=> 32MHz/3 +// <3=> 32MHz/4 +// <4=> 32MHz/5 +// <5=> 32MHz/6 +// <6=> 32MHz/7 +// <7=> 32MHz/8 +// <8=> 32MHz/9 +// <9=> 32MHz/10 +// <10=> 32MHz/11 +// <11=> 32MHz/12 +// <12=> 32MHz/13 +// <13=> 32MHz/14 +// <14=> 32MHz/15 +// <15=> 32MHz/16 + +#ifndef QSPI_CONFIG_FREQUENCY +#define QSPI_CONFIG_FREQUENCY 15 +#endif + +// QSPI_PIN_SCK - SCK pin value. +#ifndef QSPI_PIN_SCK +#define QSPI_PIN_SCK NRF_QSPI_PIN_NOT_CONNECTED +#endif -#ifndef QDEC_CONFIG_DBFEN -#define QDEC_CONFIG_DBFEN 0 +// QSPI_PIN_CSN - CSN pin value. +#ifndef QSPI_PIN_CSN +#define QSPI_PIN_CSN NRF_QSPI_PIN_NOT_CONNECTED #endif -// QDEC_CONFIG_SAMPLE_INTEN - Sample ready interrupt enable +// QSPI_PIN_IO0 - IO0 pin value. +#ifndef QSPI_PIN_IO0 +#define QSPI_PIN_IO0 NRF_QSPI_PIN_NOT_CONNECTED +#endif +// QSPI_PIN_IO1 - IO1 pin value. +#ifndef QSPI_PIN_IO1 +#define QSPI_PIN_IO1 NRF_QSPI_PIN_NOT_CONNECTED +#endif -#ifndef QDEC_CONFIG_SAMPLE_INTEN -#define QDEC_CONFIG_SAMPLE_INTEN 0 +// QSPI_PIN_IO2 - IO2 pin value. +#ifndef QSPI_PIN_IO2 +#define QSPI_PIN_IO2 NRF_QSPI_PIN_NOT_CONNECTED #endif -// QDEC_CONFIG_IRQ_PRIORITY - Interrupt priority +// QSPI_PIN_IO3 - IO3 pin value. +#ifndef QSPI_PIN_IO3 +#define QSPI_PIN_IO3 NRF_QSPI_PIN_NOT_CONNECTED +#endif +// QSPI_CONFIG_IRQ_PRIORITY - Interrupt priority + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -#ifndef QDEC_CONFIG_IRQ_PRIORITY -#define QDEC_CONFIG_IRQ_PRIORITY 7 +#ifndef QSPI_CONFIG_IRQ_PRIORITY +#define QSPI_CONFIG_IRQ_PRIORITY 7 #endif // -// RNG_ENABLED - nrf_drv_rng - RNG peripheral driver +// RNG_ENABLED - nrf_drv_rng - RNG peripheral driver - legacy layer //========================================================== #ifndef RNG_ENABLED -#define RNG_ENABLED 1 +#define RNG_ENABLED 0 #endif // RNG_CONFIG_ERROR_CORRECTION - Error correction - + #ifndef RNG_CONFIG_ERROR_CORRECTION #define RNG_CONFIG_ERROR_CORRECTION 1 #endif -// RNG_CONFIG_POOL_SIZE - Pool size +// RNG_CONFIG_POOL_SIZE - Pool size #ifndef RNG_CONFIG_POOL_SIZE -#define RNG_CONFIG_POOL_SIZE 32 +#define RNG_CONFIG_POOL_SIZE 64 #endif // RNG_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef RNG_CONFIG_IRQ_PRIORITY #define RNG_CONFIG_IRQ_PRIORITY 7 @@ -2429,12 +4991,12 @@ // -// RTC_ENABLED - nrf_drv_rtc - RTC peripheral driver +// RTC_ENABLED - nrf_drv_rtc - RTC peripheral driver - legacy layer //========================================================== #ifndef RTC_ENABLED #define RTC_ENABLED 0 #endif -// RTC_DEFAULT_CONFIG_FREQUENCY - Frequency <16-32768> +// RTC_DEFAULT_CONFIG_FREQUENCY - Frequency <16-32768> #ifndef RTC_DEFAULT_CONFIG_FREQUENCY @@ -2442,108 +5004,108 @@ #endif // RTC_DEFAULT_CONFIG_RELIABLE - Ensures safe compare event triggering - + #ifndef RTC_DEFAULT_CONFIG_RELIABLE #define RTC_DEFAULT_CONFIG_RELIABLE 0 #endif // RTC_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef RTC_DEFAULT_CONFIG_IRQ_PRIORITY #define RTC_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif // RTC0_ENABLED - Enable RTC0 instance - + #ifndef RTC0_ENABLED #define RTC0_ENABLED 0 #endif // RTC1_ENABLED - Enable RTC1 instance - + #ifndef RTC1_ENABLED #define RTC1_ENABLED 0 #endif // RTC2_ENABLED - Enable RTC2 instance - + #ifndef RTC2_ENABLED #define RTC2_ENABLED 0 #endif -// NRF_MAXIMUM_LATENCY_US - Maximum possible time[us] in highest priority interrupt +// NRF_MAXIMUM_LATENCY_US - Maximum possible time[us] in highest priority interrupt #ifndef NRF_MAXIMUM_LATENCY_US #define NRF_MAXIMUM_LATENCY_US 2000 #endif // -// SAADC_ENABLED - nrf_drv_saadc - SAADC peripheral driver +// SAADC_ENABLED - nrf_drv_saadc - SAADC peripheral driver - legacy layer //========================================================== #ifndef SAADC_ENABLED -#define SAADC_ENABLED 1 +#define SAADC_ENABLED 0 #endif // SAADC_CONFIG_RESOLUTION - Resolution - -// <0=> 8 bit -// <1=> 10 bit -// <2=> 12 bit -// <3=> 14 bit + +// <0=> 8 bit +// <1=> 10 bit +// <2=> 12 bit +// <3=> 14 bit #ifndef SAADC_CONFIG_RESOLUTION -#define SAADC_CONFIG_RESOLUTION 2 +#define SAADC_CONFIG_RESOLUTION 1 #endif // SAADC_CONFIG_OVERSAMPLE - Sample period - -// <0=> Disabled -// <1=> 2x -// <2=> 4x -// <3=> 8x -// <4=> 16x -// <5=> 32x -// <6=> 64x -// <7=> 128x -// <8=> 256x + +// <0=> Disabled +// <1=> 2x +// <2=> 4x +// <3=> 8x +// <4=> 16x +// <5=> 32x +// <6=> 64x +// <7=> 128x +// <8=> 256x #ifndef SAADC_CONFIG_OVERSAMPLE #define SAADC_CONFIG_OVERSAMPLE 0 #endif // SAADC_CONFIG_LP_MODE - Enabling low power mode - + #ifndef SAADC_CONFIG_LP_MODE #define SAADC_CONFIG_LP_MODE 0 #endif // SAADC_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef SAADC_CONFIG_IRQ_PRIORITY #define SAADC_CONFIG_IRQ_PRIORITY 7 @@ -2551,56 +5113,56 @@ // -// SPIS_ENABLED - nrf_drv_spis - SPI Slave driver +// SPIS_ENABLED - nrf_drv_spis - SPIS peripheral driver - legacy layer //========================================================== #ifndef SPIS_ENABLED -#define SPIS_ENABLED 1 +#define SPIS_ENABLED 0 #endif // SPIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef SPIS_DEFAULT_CONFIG_IRQ_PRIORITY #define SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif // SPIS_DEFAULT_MODE - Mode - -// <0=> MODE_0 -// <1=> MODE_1 -// <2=> MODE_2 -// <3=> MODE_3 + +// <0=> MODE_0 +// <1=> MODE_1 +// <2=> MODE_2 +// <3=> MODE_3 #ifndef SPIS_DEFAULT_MODE #define SPIS_DEFAULT_MODE 0 #endif // SPIS_DEFAULT_BIT_ORDER - SPIS default bit order - -// <0=> MSB first -// <1=> LSB first + +// <0=> MSB first +// <1=> LSB first #ifndef SPIS_DEFAULT_BIT_ORDER #define SPIS_DEFAULT_BIT_ORDER 0 #endif -// SPIS_DEFAULT_DEF - SPIS default DEF character <0-255> +// SPIS_DEFAULT_DEF - SPIS default DEF character <0-255> #ifndef SPIS_DEFAULT_DEF #define SPIS_DEFAULT_DEF 255 #endif -// SPIS_DEFAULT_ORC - SPIS default ORC character <0-255> +// SPIS_DEFAULT_ORC - SPIS default ORC character <0-255> #ifndef SPIS_DEFAULT_ORC @@ -2608,21 +5170,21 @@ #endif // SPIS0_ENABLED - Enable SPIS0 instance - + #ifndef SPIS0_ENABLED -#define SPIS0_ENABLED 1 +#define SPIS0_ENABLED 0 #endif // SPIS1_ENABLED - Enable SPIS1 instance - + #ifndef SPIS1_ENABLED #define SPIS1_ENABLED 0 #endif // SPIS2_ENABLED - Enable SPIS2 instance - + #ifndef SPIS2_ENABLED #define SPIS2_ENABLED 0 @@ -2630,62 +5192,53 @@ // -// SPI_ENABLED - nrf_drv_spi - SPI/SPIM peripheral driver +// SPI_ENABLED - nrf_drv_spi - SPI/SPIM peripheral driver - legacy layer //========================================================== #ifndef SPI_ENABLED -#define SPI_ENABLED 1 +#define SPI_ENABLED 0 #endif // SPI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef SPI_DEFAULT_CONFIG_IRQ_PRIORITY #define SPI_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif // NRF_SPI_DRV_MISO_PULLUP_CFG - MISO PIN pull-up configuration. - -// <0=> NRF_GPIO_PIN_NOPULL -// <1=> NRF_GPIO_PIN_PULLDOWN -// <3=> NRF_GPIO_PIN_PULLUP + +// <0=> NRF_GPIO_PIN_NOPULL +// <1=> NRF_GPIO_PIN_PULLDOWN +// <3=> NRF_GPIO_PIN_PULLUP #ifndef NRF_SPI_DRV_MISO_PULLUP_CFG #define NRF_SPI_DRV_MISO_PULLUP_CFG 1 #endif +// needed these to build! +#define SPI0_ENABLED 1 +#define SPI1_ENABLED 1 +#define SPI2_ENABLED 1 + // SPI0_ENABLED - Enable SPI0 instance //========================================================== #ifndef SPI0_ENABLED -#define SPI0_ENABLED 1 +#define SPI0_ENABLED 0 #endif // SPI0_USE_EASY_DMA - Use EasyDMA - + #ifndef SPI0_USE_EASY_DMA -#define SPI0_USE_EASY_DMA 0 -#endif - -// SPI0_DEFAULT_FREQUENCY - SPI frequency - -// <33554432=> 125 kHz -// <67108864=> 250 kHz -// <134217728=> 500 kHz -// <268435456=> 1 MHz -// <536870912=> 2 MHz -// <1073741824=> 4 MHz -// <2147483648=> 8 MHz - -#ifndef SPI0_DEFAULT_FREQUENCY -#define SPI0_DEFAULT_FREQUENCY 1073741824 +#define SPI0_USE_EASY_DMA 1 #endif // @@ -2693,27 +5246,13 @@ // SPI1_ENABLED - Enable SPI1 instance //========================================================== #ifndef SPI1_ENABLED -#define SPI1_ENABLED 1 +#define SPI1_ENABLED 0 #endif // SPI1_USE_EASY_DMA - Use EasyDMA - + #ifndef SPI1_USE_EASY_DMA -#define SPI1_USE_EASY_DMA 0 -#endif - -// SPI1_DEFAULT_FREQUENCY - SPI frequency - -// <33554432=> 125 kHz -// <67108864=> 250 kHz -// <134217728=> 500 kHz -// <268435456=> 1 MHz -// <536870912=> 2 MHz -// <1073741824=> 4 MHz -// <2147483648=> 8 MHz - -#ifndef SPI1_DEFAULT_FREQUENCY -#define SPI1_DEFAULT_FREQUENCY 1073741824 +#define SPI1_USE_EASY_DMA 1 #endif // @@ -2721,386 +5260,242 @@ // SPI2_ENABLED - Enable SPI2 instance //========================================================== #ifndef SPI2_ENABLED -#define SPI2_ENABLED 1 +#define SPI2_ENABLED 0 #endif // SPI2_USE_EASY_DMA - Use EasyDMA - + #ifndef SPI2_USE_EASY_DMA -#define SPI2_USE_EASY_DMA 0 -#endif - -// SPI2_DEFAULT_FREQUENCY - SPI frequency - -// <33554432=> 125 kHz -// <67108864=> 250 kHz -// <134217728=> 500 kHz -// <268435456=> 1 MHz -// <536870912=> 2 MHz -// <1073741824=> 4 MHz -// <2147483648=> 8 MHz - -#ifndef SPI2_DEFAULT_FREQUENCY -#define SPI2_DEFAULT_FREQUENCY 1073741824 -#endif - -// - -// - -// QSPI_ENABLED - nrf_drv_qspi - QSPI peripheral driver. -//========================================================== -#ifndef QSPI_ENABLED -#define QSPI_ENABLED 1 -#endif -#if QSPI_ENABLED -// QSPI_CONFIG_SCK_DELAY - tSHSL, tWHSL and tSHWL in number of 16 MHz periods (62.5 ns). <0-255> - - -#ifndef QSPI_CONFIG_SCK_DELAY -#define QSPI_CONFIG_SCK_DELAY 1 -#endif - -// QSPI_CONFIG_READOC - Number of data lines and opcode used for reading. - -// <0=> FastRead -// <1=> Read2O -// <2=> Read2IO -// <3=> Read4O -// <4=> Read4IO - -#ifndef QSPI_CONFIG_READOC -#define QSPI_CONFIG_READOC 4 -#endif - -// QSPI_CONFIG_WRITEOC - Number of data lines and opcode used for writing. - -// <0=> PP -// <1=> PP2O -// <2=> PP4O -// <3=> PP4IO - -#ifndef QSPI_CONFIG_WRITEOC -#define QSPI_CONFIG_WRITEOC 3 -#endif - -// QSPI_CONFIG_ADDRMODE - Addressing mode. - -// <0=> 24bit -// <1=> 32bit - -#ifndef QSPI_CONFIG_ADDRMODE -#define QSPI_CONFIG_ADDRMODE 0 -#endif - -// QSPI_CONFIG_MODE - SPI mode. - -// <0=> Mode 0 -// <1=> Mode 1 - -#ifndef QSPI_CONFIG_MODE -#define QSPI_CONFIG_MODE 0 -#endif - -// QSPI_CONFIG_FREQUENCY - Frequency divider. - -// <0=> 32MHz/1 -// <1=> 32MHz/2 -// <2=> 32MHz/3 -// <3=> 32MHz/4 -// <4=> 32MHz/5 -// <5=> 32MHz/6 -// <6=> 32MHz/7 -// <7=> 32MHz/8 -// <8=> 32MHz/9 -// <9=> 32MHz/10 -// <10=> 32MHz/11 -// <11=> 32MHz/12 -// <12=> 32MHz/13 -// <13=> 32MHz/14 -// <14=> 32MHz/15 -// <15=> 32MHz/16 - -#ifndef QSPI_CONFIG_FREQUENCY -#define QSPI_CONFIG_FREQUENCY 1 -#endif - -// QSPI_PIN_SCK - SCK pin value. -#ifndef QSPI_PIN_SCK -#define QSPI_PIN_SCK NRF_QSPI_PIN_NOT_CONNECTED -#endif - -// QSPI_PIN_CSN - CSN pin value. -#ifndef QSPI_PIN_CSN -#define QSPI_PIN_CSN NRF_QSPI_PIN_NOT_CONNECTED -#endif - -// QSPI_PIN_IO0 - IO0 pin value. -#ifndef QSPI_PIN_IO0 -#define QSPI_PIN_IO0 NRF_QSPI_PIN_NOT_CONNECTED -#endif - -// QSPI_PIN_IO1 - IO1 pin value. -#ifndef QSPI_PIN_IO1 -#define QSPI_PIN_IO1 NRF_QSPI_PIN_NOT_CONNECTED -#endif - -// QSPI_PIN_IO2 - IO2 pin value. -#ifndef QSPI_PIN_IO2 -#define QSPI_PIN_IO2 NRF_QSPI_PIN_NOT_CONNECTED -#endif - -// QSPI_PIN_IO3 - IO3 pin value. -#ifndef QSPI_PIN_IO3 -#define QSPI_PIN_IO3 NRF_QSPI_PIN_NOT_CONNECTED -#endif - -// QSPI_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef QSPI_CONFIG_IRQ_PRIORITY -#define QSPI_CONFIG_IRQ_PRIORITY 7 +#define SPI2_USE_EASY_DMA 1 #endif -#endif //QSPI_ENABLED - // // -// TIMER_ENABLED - nrf_drv_timer - TIMER periperal driver +// TIMER_ENABLED - nrf_drv_timer - TIMER periperal driver - legacy layer //========================================================== #ifndef TIMER_ENABLED #define TIMER_ENABLED 0 #endif // TIMER_DEFAULT_CONFIG_FREQUENCY - Timer frequency if in Timer mode - -// <0=> 16 MHz -// <1=> 8 MHz -// <2=> 4 MHz -// <3=> 2 MHz -// <4=> 1 MHz -// <5=> 500 kHz -// <6=> 250 kHz -// <7=> 125 kHz -// <8=> 62.5 kHz -// <9=> 31.25 kHz + +// <0=> 16 MHz +// <1=> 8 MHz +// <2=> 4 MHz +// <3=> 2 MHz +// <4=> 1 MHz +// <5=> 500 kHz +// <6=> 250 kHz +// <7=> 125 kHz +// <8=> 62.5 kHz +// <9=> 31.25 kHz #ifndef TIMER_DEFAULT_CONFIG_FREQUENCY #define TIMER_DEFAULT_CONFIG_FREQUENCY 0 #endif // TIMER_DEFAULT_CONFIG_MODE - Timer mode or operation - -// <0=> Timer -// <1=> Counter + +// <0=> Timer +// <1=> Counter #ifndef TIMER_DEFAULT_CONFIG_MODE #define TIMER_DEFAULT_CONFIG_MODE 0 #endif // TIMER_DEFAULT_CONFIG_BIT_WIDTH - Timer counter bit width - -// <0=> 16 bit -// <1=> 8 bit -// <2=> 24 bit -// <3=> 32 bit + +// <0=> 16 bit +// <1=> 8 bit +// <2=> 24 bit +// <3=> 32 bit #ifndef TIMER_DEFAULT_CONFIG_BIT_WIDTH #define TIMER_DEFAULT_CONFIG_BIT_WIDTH 0 #endif // TIMER_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef TIMER_DEFAULT_CONFIG_IRQ_PRIORITY #define TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif // TIMER0_ENABLED - Enable TIMER0 instance - + #ifndef TIMER0_ENABLED #define TIMER0_ENABLED 0 #endif // TIMER1_ENABLED - Enable TIMER1 instance - + #ifndef TIMER1_ENABLED #define TIMER1_ENABLED 0 #endif -// TIMER2_ENABLED - Enable TIMER2 instance - +// TIMER2_ENABLED - Enable TIMER2 instance + + +#ifndef TIMER2_ENABLED +#define TIMER2_ENABLED 0 +#endif + +// TIMER3_ENABLED - Enable TIMER3 instance + + +#ifndef TIMER3_ENABLED +#define TIMER3_ENABLED 0 +#endif + +// TIMER4_ENABLED - Enable TIMER4 instance + + +#ifndef TIMER4_ENABLED +#define TIMER4_ENABLED 0 +#endif + +// + +// TWIS_ENABLED - nrf_drv_twis - TWIS peripheral driver - legacy layer +//========================================================== +#ifndef TWIS_ENABLED +#define TWIS_ENABLED 0 +#endif +// TWIS0_ENABLED - Enable TWIS0 instance + + +#ifndef TWIS0_ENABLED +#define TWIS0_ENABLED 0 +#endif + +// TWIS1_ENABLED - Enable TWIS1 instance + -#ifndef TIMER2_ENABLED -#define TIMER2_ENABLED 0 +#ifndef TWIS1_ENABLED +#define TWIS1_ENABLED 0 #endif -// TIMER3_ENABLED - Enable TIMER3 instance +// TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once + +// Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code. -#ifndef TIMER3_ENABLED -#define TIMER3_ENABLED 0 +#ifndef TWIS_ASSUME_INIT_AFTER_RESET_ONLY +#define TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 #endif -// TIMER4_ENABLED - Enable TIMER4 instance +// TWIS_NO_SYNC_MODE - Remove support for synchronous mode + +// Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources. -#ifndef TIMER4_ENABLED -#define TIMER4_ENABLED 0 +#ifndef TWIS_NO_SYNC_MODE +#define TWIS_NO_SYNC_MODE 0 #endif -// - -// TWIS_ENABLED - nrf_drv_twis - TWIS peripheral driver -//========================================================== -#ifndef TWIS_ENABLED -#define TWIS_ENABLED 0 -#endif -// TWIS_DEFAULT_CONFIG_ADDR0 - Address0 +// TWIS_DEFAULT_CONFIG_ADDR0 - Address0 #ifndef TWIS_DEFAULT_CONFIG_ADDR0 #define TWIS_DEFAULT_CONFIG_ADDR0 0 #endif -// TWIS_DEFAULT_CONFIG_ADDR1 - Address1 +// TWIS_DEFAULT_CONFIG_ADDR1 - Address1 #ifndef TWIS_DEFAULT_CONFIG_ADDR1 #define TWIS_DEFAULT_CONFIG_ADDR1 0 #endif // TWIS_DEFAULT_CONFIG_SCL_PULL - SCL pin pull configuration - -// <0=> Disabled -// <1=> Pull down -// <3=> Pull up + +// <0=> Disabled +// <1=> Pull down +// <3=> Pull up #ifndef TWIS_DEFAULT_CONFIG_SCL_PULL #define TWIS_DEFAULT_CONFIG_SCL_PULL 0 #endif // TWIS_DEFAULT_CONFIG_SDA_PULL - SDA pin pull configuration - -// <0=> Disabled -// <1=> Pull down -// <3=> Pull up + +// <0=> Disabled +// <1=> Pull down +// <3=> Pull up #ifndef TWIS_DEFAULT_CONFIG_SDA_PULL #define TWIS_DEFAULT_CONFIG_SDA_PULL 0 #endif // TWIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef TWIS_DEFAULT_CONFIG_IRQ_PRIORITY #define TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif -// TWIS0_ENABLED - Enable TWIS0 instance - - -#ifndef TWIS0_ENABLED -#define TWIS0_ENABLED 0 -#endif - -// TWIS1_ENABLED - Enable TWIS1 instance - - -#ifndef TWIS1_ENABLED -#define TWIS1_ENABLED 0 -#endif - -// TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once - - -// Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code. - -#ifndef TWIS_ASSUME_INIT_AFTER_RESET_ONLY -#define TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 -#endif - -// TWIS_NO_SYNC_MODE - Remove support for synchronous mode - - -// Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources. - -#ifndef TWIS_NO_SYNC_MODE -#define TWIS_NO_SYNC_MODE 0 -#endif - // -// TWI_ENABLED - nrf_drv_twi - TWI/TWIM peripheral driver +// TWI_ENABLED - nrf_drv_twi - TWI/TWIM peripheral driver - legacy layer //========================================================== #ifndef TWI_ENABLED #define TWI_ENABLED 1 #endif // TWI_DEFAULT_CONFIG_FREQUENCY - Frequency - -// <26738688=> 100k -// <67108864=> 250k -// <104857600=> 400k + +// <26738688=> 100k +// <67108864=> 250k +// <104857600=> 400k #ifndef TWI_DEFAULT_CONFIG_FREQUENCY #define TWI_DEFAULT_CONFIG_FREQUENCY 26738688 #endif // TWI_DEFAULT_CONFIG_CLR_BUS_INIT - Enables bus clearing procedure during init - + #ifndef TWI_DEFAULT_CONFIG_CLR_BUS_INIT #define TWI_DEFAULT_CONFIG_CLR_BUS_INIT 0 #endif // TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit - + #ifndef TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT #define TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0 #endif // TWI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef TWI_DEFAULT_CONFIG_IRQ_PRIORITY #define TWI_DEFAULT_CONFIG_IRQ_PRIORITY 7 @@ -3112,7 +5507,7 @@ #define TWI0_ENABLED 1 #endif // TWI0_USE_EASY_DMA - Use EasyDMA (if present) - + #ifndef TWI0_USE_EASY_DMA #define TWI0_USE_EASY_DMA 0 @@ -3126,7 +5521,7 @@ #define TWI1_ENABLED 1 #endif // TWI1_USE_EASY_DMA - Use EasyDMA (if present) - + #ifndef TWI1_USE_EASY_DMA #define TWI1_USE_EASY_DMA 0 @@ -3136,90 +5531,92 @@ // -// UART_ENABLED - nrf_drv_uart - UART/UARTE peripheral driver +// UART_ENABLED - nrf_drv_uart - UART/UARTE peripheral driver - legacy layer //========================================================== #ifndef UART_ENABLED #define UART_ENABLED 1 #endif // UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control - -// <0=> Disabled -// <1=> Enabled + +// <0=> Disabled +// <1=> Enabled #ifndef UART_DEFAULT_CONFIG_HWFC -#define UART_DEFAULT_CONFIG_HWFC 1 +#define UART_DEFAULT_CONFIG_HWFC 0 #endif // UART_DEFAULT_CONFIG_PARITY - Parity - -// <0=> Excluded -// <14=> Included + +// <0=> Excluded +// <14=> Included #ifndef UART_DEFAULT_CONFIG_PARITY #define UART_DEFAULT_CONFIG_PARITY 0 #endif // UART_DEFAULT_CONFIG_BAUDRATE - Default Baudrate - -// <323584=> 1200 baud -// <643072=> 2400 baud -// <1290240=> 4800 baud -// <2576384=> 9600 baud -// <3862528=> 14400 baud -// <5152768=> 19200 baud -// <7716864=> 28800 baud -// <10289152=> 38400 baud -// <15400960=> 57600 baud -// <20615168=> 76800 baud -// <30801920=> 115200 baud -// <61865984=> 230400 baud -// <67108864=> 250000 baud -// <121634816=> 460800 baud -// <251658240=> 921600 baud -// <268435456=> 1000000 baud + +// <323584=> 1200 baud +// <643072=> 2400 baud +// <1290240=> 4800 baud +// <2576384=> 9600 baud +// <3862528=> 14400 baud +// <5152768=> 19200 baud +// <7716864=> 28800 baud +// <10289152=> 38400 baud +// <15400960=> 57600 baud +// <20615168=> 76800 baud +// <30801920=> 115200 baud +// <61865984=> 230400 baud +// <67108864=> 250000 baud +// <121634816=> 460800 baud +// <251658240=> 921600 baud +// <268435456=> 1000000 baud #ifndef UART_DEFAULT_CONFIG_BAUDRATE -#define UART_DEFAULT_CONFIG_BAUDRATE 2576384 +#define UART_DEFAULT_CONFIG_BAUDRATE 30801920 #endif // UART_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef UART_DEFAULT_CONFIG_IRQ_PRIORITY #define UART_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif // UART_EASY_DMA_SUPPORT - Driver supporting EasyDMA - + #ifndef UART_EASY_DMA_SUPPORT #define UART_EASY_DMA_SUPPORT 1 #endif // UART_LEGACY_SUPPORT - Driver supporting Legacy mode - + #ifndef UART_LEGACY_SUPPORT #define UART_LEGACY_SUPPORT 1 #endif +// needed for Mbed build +#define UART0_ENABLED 1 // UART0_ENABLED - Enable UART0 instance //========================================================== #ifndef UART0_ENABLED -#define UART0_ENABLED 1 +#define UART0_ENABLED 0 #endif // UART0_CONFIG_USE_EASY_DMA - Default setting for using EasyDMA - + #ifndef UART0_CONFIG_USE_EASY_DMA #define UART0_CONFIG_USE_EASY_DMA 1 @@ -3230,15 +5627,8 @@ // UART1_ENABLED - Enable UART1 instance //========================================================== #ifndef UART1_ENABLED -#define UART1_ENABLED 1 +#define UART1_ENABLED 0 #endif -// UART1_CONFIG_USE_EASY_DMA - Default setting for using EasyDMA - - -#ifndef UART1_CONFIG_USE_EASY_DMA -#define UART1_CONFIG_USE_EASY_DMA 1 -#endif - // // @@ -3249,50 +5639,50 @@ #define USBD_ENABLED 0 #endif // USBD_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef USBD_CONFIG_IRQ_PRIORITY #define USBD_CONFIG_IRQ_PRIORITY 7 #endif -// NRF_DRV_USBD_DMASCHEDULER_MODE - USBD SMA scheduler working scheme - -// <0=> Prioritized access -// <1=> Round Robin +// USBD_CONFIG_DMASCHEDULER_MODE - USBD SMA scheduler working scheme + +// <0=> Prioritized access +// <1=> Round Robin -#ifndef NRF_DRV_USBD_DMASCHEDULER_MODE -#define NRF_DRV_USBD_DMASCHEDULER_MODE 0 +#ifndef USBD_CONFIG_DMASCHEDULER_MODE +#define USBD_CONFIG_DMASCHEDULER_MODE 0 #endif // -// WDT_ENABLED - nrf_drv_wdt - WDT peripheral driver +// WDT_ENABLED - nrf_drv_wdt - WDT peripheral driver - legacy layer //========================================================== #ifndef WDT_ENABLED #define WDT_ENABLED 0 #endif // WDT_CONFIG_BEHAVIOUR - WDT behavior in CPU SLEEP or HALT mode - -// <1=> Run in SLEEP, Pause in HALT -// <8=> Pause in SLEEP, Run in HALT -// <9=> Run in SLEEP and HALT -// <0=> Pause in SLEEP and HALT + +// <1=> Run in SLEEP, Pause in HALT +// <8=> Pause in SLEEP, Run in HALT +// <9=> Run in SLEEP and HALT +// <0=> Pause in SLEEP and HALT #ifndef WDT_CONFIG_BEHAVIOUR #define WDT_CONFIG_BEHAVIOUR 1 #endif -// WDT_CONFIG_RELOAD_VALUE - Reload value <15-4294967295> +// WDT_CONFIG_RELOAD_VALUE - Reload value <15-4294967295> #ifndef WDT_CONFIG_RELOAD_VALUE @@ -3300,17 +5690,17 @@ #endif // WDT_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef WDT_CONFIG_IRQ_PRIORITY #define WDT_CONFIG_IRQ_PRIORITY 7 @@ -3318,21 +5708,34 @@ // -// +// //========================================================== -// nRF_Libraries +// nRF_Drivers_External //========================================================== -// APP_GPIOTE_ENABLED - app_gpiote - GPIOTE events dispatcher +// NRF_TWI_SENSOR_ENABLED - nrf_twi_sensor - nRF TWI Sensor module + + +#ifndef NRF_TWI_SENSOR_ENABLED +#define NRF_TWI_SENSOR_ENABLED 0 +#endif + +// +//========================================================== + +// nRF_Libraries +//========================================================== +// APP_GPIOTE_ENABLED - app_gpiote - GPIOTE events dispatcher + #ifndef APP_GPIOTE_ENABLED #define APP_GPIOTE_ENABLED 0 #endif // APP_PWM_ENABLED - app_pwm - PWM functionality - + #ifndef APP_PWM_ENABLED #define APP_PWM_ENABLED 0 @@ -3344,14 +5747,14 @@ #define APP_SCHEDULER_ENABLED 0 #endif // APP_SCHEDULER_WITH_PAUSE - Enabling pause feature - + #ifndef APP_SCHEDULER_WITH_PAUSE #define APP_SCHEDULER_WITH_PAUSE 0 #endif // APP_SCHEDULER_WITH_PROFILER - Enabling scheduler profiling - + #ifndef APP_SCHEDULER_WITH_PROFILER #define APP_SCHEDULER_WITH_PROFILER 0 @@ -3359,42 +5762,87 @@ // +// APP_SDCARD_ENABLED - app_sdcard - SD/MMC card support using SPI +//========================================================== +#ifndef APP_SDCARD_ENABLED +#define APP_SDCARD_ENABLED 0 +#endif +// APP_SDCARD_SPI_INSTANCE - SPI instance used + +// <0=> 0 +// <1=> 1 +// <2=> 2 + +#ifndef APP_SDCARD_SPI_INSTANCE +#define APP_SDCARD_SPI_INSTANCE 0 +#endif + +// APP_SDCARD_FREQ_INIT - SPI frequency + +// <33554432=> 125 kHz +// <67108864=> 250 kHz +// <134217728=> 500 kHz +// <268435456=> 1 MHz +// <536870912=> 2 MHz +// <1073741824=> 4 MHz +// <2147483648=> 8 MHz + +#ifndef APP_SDCARD_FREQ_INIT +#define APP_SDCARD_FREQ_INIT 67108864 +#endif + +// APP_SDCARD_FREQ_DATA - SPI frequency + +// <33554432=> 125 kHz +// <67108864=> 250 kHz +// <134217728=> 500 kHz +// <268435456=> 1 MHz +// <536870912=> 2 MHz +// <1073741824=> 4 MHz +// <2147483648=> 8 MHz + +#ifndef APP_SDCARD_FREQ_DATA +#define APP_SDCARD_FREQ_DATA 1073741824 +#endif + +// + // APP_TIMER_ENABLED - app_timer - Application timer functionality //========================================================== #ifndef APP_TIMER_ENABLED #define APP_TIMER_ENABLED 0 #endif // APP_TIMER_CONFIG_RTC_FREQUENCY - Configure RTC prescaler. - -// <0=> 32768 Hz -// <1=> 16384 Hz -// <3=> 8192 Hz -// <7=> 4096 Hz -// <15=> 2048 Hz -// <31=> 1024 Hz + +// <0=> 32768 Hz +// <1=> 16384 Hz +// <3=> 8192 Hz +// <7=> 4096 Hz +// <15=> 2048 Hz +// <31=> 1024 Hz #ifndef APP_TIMER_CONFIG_RTC_FREQUENCY #define APP_TIMER_CONFIG_RTC_FREQUENCY 0 #endif // APP_TIMER_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef APP_TIMER_CONFIG_IRQ_PRIORITY #define APP_TIMER_CONFIG_IRQ_PRIORITY 7 #endif -// APP_TIMER_CONFIG_OP_QUEUE_SIZE - Capacity of timer requests queue. +// APP_TIMER_CONFIG_OP_QUEUE_SIZE - Capacity of timer requests queue. // Size of the queue depends on how many timers are used // in the system, how often timers are started and overall // system latency. If queue size is too small app_timer calls @@ -3405,21 +5853,14 @@ #endif // APP_TIMER_CONFIG_USE_SCHEDULER - Enable scheduling app_timer events to app_scheduler - + #ifndef APP_TIMER_CONFIG_USE_SCHEDULER #define APP_TIMER_CONFIG_USE_SCHEDULER 0 #endif -// APP_TIMER_WITH_PROFILER - Enable app_timer profiling - - -#ifndef APP_TIMER_WITH_PROFILER -#define APP_TIMER_WITH_PROFILER 0 -#endif - // APP_TIMER_KEEPS_RTC_ACTIVE - Enable RTC always on - + // If option is enabled RTC is kept running even if there is no active timers. // This option can be used when app_timer is used for timestamping. @@ -3428,111 +5869,259 @@ #define APP_TIMER_KEEPS_RTC_ACTIVE 0 #endif -// APP_TIMER_CONFIG_SWI_NUMBER - Configure SWI instance used. +// App Timer Legacy configuration - Legacy configuration. -// <0=> 0 -// <1=> 1 +//========================================================== +// APP_TIMER_WITH_PROFILER - Enable app_timer profiling + + +#ifndef APP_TIMER_WITH_PROFILER +#define APP_TIMER_WITH_PROFILER 0 +#endif + +// APP_TIMER_CONFIG_SWI_NUMBER - Configure SWI instance used. + #ifndef APP_TIMER_CONFIG_SWI_NUMBER #define APP_TIMER_CONFIG_SWI_NUMBER 0 #endif +// +//========================================================== + // -// NRF_TWI_MNGR_ENABLED - nrf_twi_mngr - TWI transaction manager +// APP_USBD_AUDIO_ENABLED - app_usbd_audio - USB AUDIO class + +#ifndef APP_USBD_AUDIO_ENABLED +#define APP_USBD_AUDIO_ENABLED 0 +#endif -#ifndef NRF_TWI_MNGR_ENABLED -#define NRF_TWI_MNGR_ENABLED 0 +// APP_USBD_CDC_ACM_ENABLED - app_usbd_cdc_acm - USB CDC ACM class + + +#ifndef APP_USBD_CDC_ACM_ENABLED +#define APP_USBD_CDC_ACM_ENABLED 0 +#endif + +// APP_USBD_ENABLED - app_usbd - USB Device library +//========================================================== +#ifndef APP_USBD_ENABLED +#define APP_USBD_ENABLED 0 +#endif +// APP_USBD_VID - Vendor ID <0x0000-0xFFFF> + + +// Vendor ID ordered from USB IF: http://www.usb.org/developers/vendor/ + +#ifndef APP_USBD_VID +#define APP_USBD_VID 0 +#endif + +// APP_USBD_PID - Product ID <0x0000-0xFFFF> + + +// Selected Product ID + +#ifndef APP_USBD_PID +#define APP_USBD_PID 0 +#endif + +// APP_USBD_DEVICE_VER_MAJOR - Device version, major part <0-99> + + +// Device version, will be converted automatically to BCD notation. Use just decimal values. + +#ifndef APP_USBD_DEVICE_VER_MAJOR +#define APP_USBD_DEVICE_VER_MAJOR 1 +#endif + +// APP_USBD_DEVICE_VER_MINOR - Device version, minor part <0-99> + + +// Device version, will be converted automatically to BCD notation. Use just decimal values. + +#ifndef APP_USBD_DEVICE_VER_MINOR +#define APP_USBD_DEVICE_VER_MINOR 0 +#endif + +// APP_USBD_CONFIG_SELF_POWERED - Self powered + + +#ifndef APP_USBD_CONFIG_SELF_POWERED +#define APP_USBD_CONFIG_SELF_POWERED 1 +#endif + +// APP_USBD_CONFIG_MAX_POWER - MaxPower field in configuration descriptor in milliamps <0-500> + + +#ifndef APP_USBD_CONFIG_MAX_POWER +#define APP_USBD_CONFIG_MAX_POWER 500 +#endif + +// APP_USBD_CONFIG_POWER_EVENTS_PROCESS - Process power events + + +// Enable processing power events in USB event handler. + +#ifndef APP_USBD_CONFIG_POWER_EVENTS_PROCESS +#define APP_USBD_CONFIG_POWER_EVENTS_PROCESS 1 +#endif + +// APP_USBD_CONFIG_EVENT_QUEUE_ENABLE - Enable event queue + +// This is the default configuration when all the events are placed into internal queue. +// Disable it when external queue is used like app_scheduler or if you wish to process all events inside interrupts. +// Processing all events from the interrupt level adds requirement not to call any functions that modifies the USBD library state from the context higher than USB interrupt context. +// Functions that modify USBD state are functions for sleep, wakeup, start, stop, enable and disable. +//========================================================== +#ifndef APP_USBD_CONFIG_EVENT_QUEUE_ENABLE +#define APP_USBD_CONFIG_EVENT_QUEUE_ENABLE 1 +#endif +// APP_USBD_CONFIG_EVENT_QUEUE_SIZE - The size of event queue <16-64> + + +// The size of the queue for the events that would be processed in the main loop. + +#ifndef APP_USBD_CONFIG_EVENT_QUEUE_SIZE +#define APP_USBD_CONFIG_EVENT_QUEUE_SIZE 32 +#endif + +// APP_USBD_CONFIG_SOF_HANDLING_MODE - Change SOF events handling mode. + + +// Normal queue - SOF events are pushed normally into event queue. +// Compress queue - SOF events are counted and binded with other events or executed when queue is empty. +// This prevents queue from filling with SOF events. +// Interrupt - SOF events are processed in interrupt. +// <0=> Normal queue +// <1=> Compress queue +// <2=> Interrupt + +#ifndef APP_USBD_CONFIG_SOF_HANDLING_MODE +#define APP_USBD_CONFIG_SOF_HANDLING_MODE 1 +#endif + +// + +// APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE - Provide a function that generates timestamps for logs based on the current SOF + + +// The function app_usbd_sof_timestamp_get will be implemented if the logger is enabled. +// Use it when initializing the logger. +// SOF processing will be always enabled when this configuration parameter is active. +// Notice that this option is configured outside of APP_USBD_CONFIG_LOG_ENABLED. +// This means that it will work even if the logging in this very module is disabled. + +#ifndef APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE +#define APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE 0 #endif -// APP_UART_ENABLED - app_uart - UART driver +// APP_USBD_CONFIG_LOG_ENABLED - Enable logging in the module //========================================================== -#ifndef APP_UART_ENABLED -#define APP_UART_ENABLED 0 +#ifndef APP_USBD_CONFIG_LOG_ENABLED +#define APP_USBD_CONFIG_LOG_ENABLED 0 #endif -// APP_UART_DRIVER_INSTANCE - UART instance used - -// <0=> 0 +// APP_USBD_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -#ifndef APP_UART_DRIVER_INSTANCE -#define APP_UART_DRIVER_INSTANCE 0 +#ifndef APP_USBD_CONFIG_LOG_LEVEL +#define APP_USBD_CONFIG_LOG_LEVEL 3 #endif -// - -// APP_USBD_CLASS_AUDIO_ENABLED - app_usbd_audio - USB AUDIO class - +// APP_USBD_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef APP_USBD_CLASS_AUDIO_ENABLED -#define APP_USBD_CLASS_AUDIO_ENABLED 0 +#ifndef APP_USBD_CONFIG_INFO_COLOR +#define APP_USBD_CONFIG_INFO_COLOR 0 #endif -// APP_USBD_CLASS_CDC_ACM_ENABLED - app_usbd_cdc_acm - USB CDC ACM class - +// APP_USBD_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef APP_USBD_CLASS_CDC_ACM_ENABLED -#define APP_USBD_CLASS_CDC_ACM_ENABLED 0 +#ifndef APP_USBD_CONFIG_DEBUG_COLOR +#define APP_USBD_CONFIG_DEBUG_COLOR 0 #endif -// APP_USBD_CLASS_HID_ENABLED - app_usbd_hid - USB HID class +// + +// +// APP_USBD_HID_ENABLED - app_usbd_hid - USB HID class + -#ifndef APP_USBD_CLASS_HID_ENABLED -#define APP_USBD_CLASS_HID_ENABLED 0 +#ifndef APP_USBD_HID_ENABLED +#define APP_USBD_HID_ENABLED 0 #endif // APP_USBD_HID_GENERIC_ENABLED - app_usbd_hid_generic - USB HID generic - + #ifndef APP_USBD_HID_GENERIC_ENABLED #define APP_USBD_HID_GENERIC_ENABLED 0 #endif // APP_USBD_HID_KBD_ENABLED - app_usbd_hid_kbd - USB HID keyboard - + #ifndef APP_USBD_HID_KBD_ENABLED #define APP_USBD_HID_KBD_ENABLED 0 #endif // APP_USBD_HID_MOUSE_ENABLED - app_usbd_hid_mouse - USB HID mouse - + #ifndef APP_USBD_HID_MOUSE_ENABLED #define APP_USBD_HID_MOUSE_ENABLED 0 #endif // APP_USBD_MSC_ENABLED - app_usbd_msc - USB MSC class - + #ifndef APP_USBD_MSC_ENABLED #define APP_USBD_MSC_ENABLED 0 #endif -// BUTTON_ENABLED - app_button - buttons handling module - - -#ifndef BUTTON_ENABLED -#define BUTTON_ENABLED 0 -#endif - // CRC16_ENABLED - crc16 - CRC16 calculation routines - + #ifndef CRC16_ENABLED #define CRC16_ENABLED 0 #endif // CRC32_ENABLED - crc32 - CRC32 calculation routines - + #ifndef CRC32_ENABLED #define CRC32_ENABLED 0 #endif // ECC_ENABLED - ecc - Elliptic Curve Cryptography Library - + #ifndef ECC_ENABLED #define ECC_ENABLED 0 @@ -3541,13 +6130,13 @@ // FDS_ENABLED - fds - Flash data storage module //========================================================== #ifndef FDS_ENABLED -#define FDS_ENABLED 1 +#define FDS_ENABLED 0 #endif // Pages - Virtual page settings // Configure the number of virtual pages to use and their size. //========================================================== -// FDS_VIRTUAL_PAGES - Number of virtual flash pages to use. +// FDS_VIRTUAL_PAGES - Number of virtual flash pages to use. // One of the virtual pages is reserved by the system for garbage collection. // Therefore, the minimum is two virtual pages: one page to store data and one page to be used by the system for garbage collection. // The total amount of flash memory that is used by FDS amounts to @ref FDS_VIRTUAL_PAGES * @ref FDS_VIRTUAL_PAGE_SIZE * 4 bytes. @@ -3557,19 +6146,19 @@ #endif // FDS_VIRTUAL_PAGE_SIZE - The size of a virtual flash page. - + // Expressed in number of 4-byte words. // By default, a virtual page is the same size as a physical page. // The size of a virtual page must be a multiple of the size of a physical page. -// <1024=> 1024 -// <2048=> 2048 +// <1024=> 1024 +// <2048=> 2048 #ifndef FDS_VIRTUAL_PAGE_SIZE #define FDS_VIRTUAL_PAGE_SIZE 1024 #endif -// +// //========================================================== // Backend - Backend configuration @@ -3577,31 +6166,31 @@ // Configure which nrf_fstorage backend is used by FDS to write to flash. //========================================================== // FDS_BACKEND - FDS flash backend. - + // NRF_FSTORAGE_SD uses the nrf_fstorage_sd backend implementation using the SoftDevice API. Use this if you have a SoftDevice present. // NRF_FSTORAGE_NVMC uses the nrf_fstorage_nvmc implementation. Use this setting if you don't use the SoftDevice. -// <1=> NRF_FSTORAGE_NVMC -// <2=> NRF_FSTORAGE_SD +// <1=> NRF_FSTORAGE_NVMC +// <2=> NRF_FSTORAGE_SD #ifndef FDS_BACKEND -#define FDS_BACKEND 1 +#define FDS_BACKEND 2 #endif -// +// //========================================================== // Queue - Queue settings //========================================================== -// FDS_OP_QUEUE_SIZE - Size of the internal queue. +// FDS_OP_QUEUE_SIZE - Size of the internal queue. // Increase this value if you frequently get synchronous FDS_ERR_NO_SPACE_IN_QUEUES errors. #ifndef FDS_OP_QUEUE_SIZE #define FDS_OP_QUEUE_SIZE 4 #endif -// +// //========================================================== // CRC - CRC functionality @@ -3617,12 +6206,12 @@ #define FDS_CRC_CHECK_ON_READ 0 #endif // FDS_CRC_CHECK_ON_WRITE - Perform a CRC check on newly written records. - + // Perform a CRC check on newly written records. // This setting can be used to make sure that the record data was not altered while being written to flash. -// <1=> Enabled -// <0=> Disabled +// <1=> Enabled +// <0=> Disabled #ifndef FDS_CRC_CHECK_ON_WRITE #define FDS_CRC_CHECK_ON_WRITE 0 @@ -3630,18 +6219,18 @@ // -// +// //========================================================== // Users - Number of users //========================================================== -// FDS_MAX_USERS - Maximum number of callbacks that can be registered. +// FDS_MAX_USERS - Maximum number of callbacks that can be registered. #ifndef FDS_MAX_USERS #define FDS_MAX_USERS 4 #endif -// +// //========================================================== // @@ -3652,7 +6241,7 @@ #define HARDFAULT_HANDLER_ENABLED 0 #endif // HARDFAULT_HANDLER_GDB_PSP_BACKTRACE - Bypass the GDB problem with multiple stack pointers backtrace - + // There is a known bug in GDB which causes it to incorrectly backtrace the code // when multiple stack pointers are used (main and process stack pointers). @@ -3673,17 +6262,17 @@ #ifndef HCI_MEM_POOL_ENABLED #define HCI_MEM_POOL_ENABLED 0 #endif -// HCI_TX_BUF_SIZE - TX buffer size in bytes. +// HCI_TX_BUF_SIZE - TX buffer size in bytes. #ifndef HCI_TX_BUF_SIZE #define HCI_TX_BUF_SIZE 600 #endif -// HCI_RX_BUF_SIZE - RX buffer size in bytes. +// HCI_RX_BUF_SIZE - RX buffer size in bytes. #ifndef HCI_RX_BUF_SIZE #define HCI_RX_BUF_SIZE 600 #endif -// HCI_RX_BUF_QUEUE_SIZE - RX buffer queue size. +// HCI_RX_BUF_QUEUE_SIZE - RX buffer queue size. #ifndef HCI_RX_BUF_QUEUE_SIZE #define HCI_RX_BUF_QUEUE_SIZE 4 #endif @@ -3696,55 +6285,55 @@ #define HCI_SLIP_ENABLED 0 #endif // HCI_UART_BAUDRATE - Default Baudrate - -// <323584=> 1200 baud -// <643072=> 2400 baud -// <1290240=> 4800 baud -// <2576384=> 9600 baud -// <3862528=> 14400 baud -// <5152768=> 19200 baud -// <7716864=> 28800 baud -// <10289152=> 38400 baud -// <15400960=> 57600 baud -// <20615168=> 76800 baud -// <30801920=> 115200 baud -// <61865984=> 230400 baud -// <67108864=> 250000 baud -// <121634816=> 460800 baud -// <251658240=> 921600 baud -// <268435456=> 1000000 baud + +// <323584=> 1200 baud +// <643072=> 2400 baud +// <1290240=> 4800 baud +// <2576384=> 9600 baud +// <3862528=> 14400 baud +// <5152768=> 19200 baud +// <7716864=> 28800 baud +// <10289152=> 38400 baud +// <15400960=> 57600 baud +// <20615168=> 76800 baud +// <30801920=> 115200 baud +// <61865984=> 230400 baud +// <67108864=> 250000 baud +// <121634816=> 460800 baud +// <251658240=> 921600 baud +// <268435456=> 1000000 baud #ifndef HCI_UART_BAUDRATE #define HCI_UART_BAUDRATE 30801920 #endif // HCI_UART_FLOW_CONTROL - Hardware Flow Control - -// <0=> Disabled -// <1=> Enabled + +// <0=> Disabled +// <1=> Enabled #ifndef HCI_UART_FLOW_CONTROL #define HCI_UART_FLOW_CONTROL 0 #endif -// HCI_UART_RX_PIN - UART RX pin +// HCI_UART_RX_PIN - UART RX pin #ifndef HCI_UART_RX_PIN -#define HCI_UART_RX_PIN 8 +#define HCI_UART_RX_PIN 31 #endif -// HCI_UART_TX_PIN - UART TX pin +// HCI_UART_TX_PIN - UART TX pin #ifndef HCI_UART_TX_PIN -#define HCI_UART_TX_PIN 6 +#define HCI_UART_TX_PIN 31 #endif -// HCI_UART_RTS_PIN - UART RTS pin +// HCI_UART_RTS_PIN - UART RTS pin #ifndef HCI_UART_RTS_PIN -#define HCI_UART_RTS_PIN 5 +#define HCI_UART_RTS_PIN 31 #endif -// HCI_UART_CTS_PIN - UART CTS pin +// HCI_UART_CTS_PIN - UART CTS pin #ifndef HCI_UART_CTS_PIN -#define HCI_UART_CTS_PIN 7 +#define HCI_UART_CTS_PIN 31 #endif // @@ -3754,7 +6343,7 @@ #ifndef HCI_TRANSPORT_ENABLED #define HCI_TRANSPORT_ENABLED 0 #endif -// HCI_MAX_PACKET_SIZE_IN_BITS - Maximum size of a single application packet in bits. +// HCI_MAX_PACKET_SIZE_IN_BITS - Maximum size of a single application packet in bits. #ifndef HCI_MAX_PACKET_SIZE_IN_BITS #define HCI_MAX_PACKET_SIZE_IN_BITS 8000 #endif @@ -3762,14 +6351,14 @@ // // LED_SOFTBLINK_ENABLED - led_softblink - led_softblink module - + #ifndef LED_SOFTBLINK_ENABLED #define LED_SOFTBLINK_ENABLED 0 #endif // LOW_POWER_PWM_ENABLED - low_power_pwm - low_power_pwm module - + #ifndef LOW_POWER_PWM_ENABLED #define LOW_POWER_PWM_ENABLED 0 @@ -3780,113 +6369,163 @@ #ifndef MEM_MANAGER_ENABLED #define MEM_MANAGER_ENABLED 0 #endif -// MEMORY_MANAGER_SMALL_BLOCK_COUNT - Size of each memory blocks identified as 'small' block. <0-255> +// MEMORY_MANAGER_SMALL_BLOCK_COUNT - Size of each memory blocks identified as 'small' block. <0-255> #ifndef MEMORY_MANAGER_SMALL_BLOCK_COUNT #define MEMORY_MANAGER_SMALL_BLOCK_COUNT 1 #endif -// MEMORY_MANAGER_SMALL_BLOCK_SIZE - Size of each memory blocks identified as 'small' block. +// MEMORY_MANAGER_SMALL_BLOCK_SIZE - Size of each memory blocks identified as 'small' block. // Size of each memory blocks identified as 'small' block. Memory block are recommended to be word-sized. #ifndef MEMORY_MANAGER_SMALL_BLOCK_SIZE #define MEMORY_MANAGER_SMALL_BLOCK_SIZE 32 #endif -// MEMORY_MANAGER_MEDIUM_BLOCK_COUNT - Size of each memory blocks identified as 'medium' block. <0-255> +// MEMORY_MANAGER_MEDIUM_BLOCK_COUNT - Size of each memory blocks identified as 'medium' block. <0-255> #ifndef MEMORY_MANAGER_MEDIUM_BLOCK_COUNT #define MEMORY_MANAGER_MEDIUM_BLOCK_COUNT 0 #endif -// MEMORY_MANAGER_MEDIUM_BLOCK_SIZE - Size of each memory blocks identified as 'medium' block. +// MEMORY_MANAGER_MEDIUM_BLOCK_SIZE - Size of each memory blocks identified as 'medium' block. // Size of each memory blocks identified as 'medium' block. Memory block are recommended to be word-sized. #ifndef MEMORY_MANAGER_MEDIUM_BLOCK_SIZE #define MEMORY_MANAGER_MEDIUM_BLOCK_SIZE 256 #endif -// MEMORY_MANAGER_LARGE_BLOCK_COUNT - Size of each memory blocks identified as 'large' block. <0-255> +// MEMORY_MANAGER_LARGE_BLOCK_COUNT - Size of each memory blocks identified as 'large' block. <0-255> #ifndef MEMORY_MANAGER_LARGE_BLOCK_COUNT #define MEMORY_MANAGER_LARGE_BLOCK_COUNT 0 #endif -// MEMORY_MANAGER_LARGE_BLOCK_SIZE - Size of each memory blocks identified as 'large' block. +// MEMORY_MANAGER_LARGE_BLOCK_SIZE - Size of each memory blocks identified as 'large' block. // Size of each memory blocks identified as 'large' block. Memory block are recommended to be word-sized. #ifndef MEMORY_MANAGER_LARGE_BLOCK_SIZE #define MEMORY_MANAGER_LARGE_BLOCK_SIZE 256 #endif -// MEMORY_MANAGER_XLARGE_BLOCK_COUNT - Size of each memory blocks identified as 'extra large' block. <0-255> +// MEMORY_MANAGER_XLARGE_BLOCK_COUNT - Size of each memory blocks identified as 'extra large' block. <0-255> #ifndef MEMORY_MANAGER_XLARGE_BLOCK_COUNT #define MEMORY_MANAGER_XLARGE_BLOCK_COUNT 0 #endif -// MEMORY_MANAGER_XLARGE_BLOCK_SIZE - Size of each memory blocks identified as 'extra large' block. +// MEMORY_MANAGER_XLARGE_BLOCK_SIZE - Size of each memory blocks identified as 'extra large' block. // Size of each memory blocks identified as 'extra large' block. Memory block are recommended to be word-sized. #ifndef MEMORY_MANAGER_XLARGE_BLOCK_SIZE #define MEMORY_MANAGER_XLARGE_BLOCK_SIZE 1320 #endif -// MEMORY_MANAGER_XXLARGE_BLOCK_COUNT - Size of each memory blocks identified as 'extra extra large' block. <0-255> +// MEMORY_MANAGER_XXLARGE_BLOCK_COUNT - Size of each memory blocks identified as 'extra extra large' block. <0-255> #ifndef MEMORY_MANAGER_XXLARGE_BLOCK_COUNT #define MEMORY_MANAGER_XXLARGE_BLOCK_COUNT 0 #endif -// MEMORY_MANAGER_XXLARGE_BLOCK_SIZE - Size of each memory blocks identified as 'extra extra large' block. +// MEMORY_MANAGER_XXLARGE_BLOCK_SIZE - Size of each memory blocks identified as 'extra extra large' block. // Size of each memory blocks identified as 'extra extra large' block. Memory block are recommended to be word-sized. #ifndef MEMORY_MANAGER_XXLARGE_BLOCK_SIZE #define MEMORY_MANAGER_XXLARGE_BLOCK_SIZE 3444 #endif -// MEMORY_MANAGER_XSMALL_BLOCK_COUNT - Size of each memory blocks identified as 'extra small' block. <0-255> +// MEMORY_MANAGER_XSMALL_BLOCK_COUNT - Size of each memory blocks identified as 'extra small' block. <0-255> #ifndef MEMORY_MANAGER_XSMALL_BLOCK_COUNT #define MEMORY_MANAGER_XSMALL_BLOCK_COUNT 0 #endif -// MEMORY_MANAGER_XSMALL_BLOCK_SIZE - Size of each memory blocks identified as 'extra small' block. +// MEMORY_MANAGER_XSMALL_BLOCK_SIZE - Size of each memory blocks identified as 'extra small' block. // Size of each memory blocks identified as 'extra large' block. Memory block are recommended to be word-sized. #ifndef MEMORY_MANAGER_XSMALL_BLOCK_SIZE #define MEMORY_MANAGER_XSMALL_BLOCK_SIZE 64 #endif -// MEMORY_MANAGER_XXSMALL_BLOCK_COUNT - Size of each memory blocks identified as 'extra extra small' block. <0-255> +// MEMORY_MANAGER_XXSMALL_BLOCK_COUNT - Size of each memory blocks identified as 'extra extra small' block. <0-255> #ifndef MEMORY_MANAGER_XXSMALL_BLOCK_COUNT #define MEMORY_MANAGER_XXSMALL_BLOCK_COUNT 0 #endif -// MEMORY_MANAGER_XXSMALL_BLOCK_SIZE - Size of each memory blocks identified as 'extra extra small' block. +// MEMORY_MANAGER_XXSMALL_BLOCK_SIZE - Size of each memory blocks identified as 'extra extra small' block. // Size of each memory blocks identified as 'extra extra small' block. Memory block are recommended to be word-sized. #ifndef MEMORY_MANAGER_XXSMALL_BLOCK_SIZE #define MEMORY_MANAGER_XXSMALL_BLOCK_SIZE 32 #endif -// MEM_MANAGER_DISABLE_API_PARAM_CHECK - Disable API parameter checks in the module. +// MEM_MANAGER_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef MEM_MANAGER_CONFIG_LOG_ENABLED +#define MEM_MANAGER_CONFIG_LOG_ENABLED 0 +#endif +// MEM_MANAGER_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef MEM_MANAGER_CONFIG_LOG_LEVEL +#define MEM_MANAGER_CONFIG_LOG_LEVEL 3 +#endif + +// MEM_MANAGER_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White +#ifndef MEM_MANAGER_CONFIG_INFO_COLOR +#define MEM_MANAGER_CONFIG_INFO_COLOR 0 +#endif + +// MEM_MANAGER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef MEM_MANAGER_CONFIG_DEBUG_COLOR +#define MEM_MANAGER_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// MEM_MANAGER_DISABLE_API_PARAM_CHECK - Disable API parameter checks in the module. + #ifndef MEM_MANAGER_DISABLE_API_PARAM_CHECK #define MEM_MANAGER_DISABLE_API_PARAM_CHECK 0 #endif // - // NRF_BALLOC_ENABLED - nrf_balloc - Block allocator module //========================================================== #ifndef NRF_BALLOC_ENABLED @@ -3897,14 +6536,14 @@ #ifndef NRF_BALLOC_CONFIG_DEBUG_ENABLED #define NRF_BALLOC_CONFIG_DEBUG_ENABLED 0 #endif -// NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS - Number of words used as head guard. <0-255> +// NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS - Number of words used as head guard. <0-255> #ifndef NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS #define NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS 1 #endif -// NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS - Number of words used as tail guard. <0-255> +// NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS - Number of words used as tail guard. <0-255> #ifndef NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS @@ -3912,26 +6551,33 @@ #endif // NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED - Enables basic checks in this module. - + #ifndef NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED #define NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED 0 #endif // NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED - Enables double memory free check in this module. - + #ifndef NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED #define NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED 0 #endif // NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED - Enables free memory corruption check in this module. - + #ifndef NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED #define NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED 0 #endif +// NRF_BALLOC_CLI_CMDS - Enable CLI commands specific to the module + + +#ifndef NRF_BALLOC_CLI_CMDS +#define NRF_BALLOC_CLI_CMDS 0 +#endif + // // @@ -3941,32 +6587,32 @@ #ifndef NRF_CSENSE_ENABLED #define NRF_CSENSE_ENABLED 0 #endif -// NRF_CSENSE_PAD_HYSTERESIS - Minimum value of change required to determine that a pad was touched. +// NRF_CSENSE_PAD_HYSTERESIS - Minimum value of change required to determine that a pad was touched. #ifndef NRF_CSENSE_PAD_HYSTERESIS #define NRF_CSENSE_PAD_HYSTERESIS 15 #endif -// NRF_CSENSE_PAD_DEVIATION - Minimum value measured on a pad required to take it into account while calculating the step. +// NRF_CSENSE_PAD_DEVIATION - Minimum value measured on a pad required to take it into account while calculating the step. #ifndef NRF_CSENSE_PAD_DEVIATION #define NRF_CSENSE_PAD_DEVIATION 70 #endif -// NRF_CSENSE_MIN_PAD_VALUE - Minimum normalized value on a pad required to take its value into account. +// NRF_CSENSE_MIN_PAD_VALUE - Minimum normalized value on a pad required to take its value into account. #ifndef NRF_CSENSE_MIN_PAD_VALUE #define NRF_CSENSE_MIN_PAD_VALUE 20 #endif -// NRF_CSENSE_MAX_PADS_NUMBER - Maximum number of pads used for one instance. +// NRF_CSENSE_MAX_PADS_NUMBER - Maximum number of pads used for one instance. #ifndef NRF_CSENSE_MAX_PADS_NUMBER #define NRF_CSENSE_MAX_PADS_NUMBER 20 #endif -// NRF_CSENSE_MAX_VALUE - Maximum normalized value obtained from measurement. +// NRF_CSENSE_MAX_VALUE - Maximum normalized value obtained from measurement. #ifndef NRF_CSENSE_MAX_VALUE #define NRF_CSENSE_MAX_VALUE 1000 #endif -// NRF_CSENSE_OUTPUT_PIN - Output pin used by the low-level module. +// NRF_CSENSE_OUTPUT_PIN - Output pin used by the low-level module. // This is used when capacitive sensor does not use COMP. #ifndef NRF_CSENSE_OUTPUT_PIN @@ -3987,17 +6633,17 @@ #ifndef USE_COMP #define USE_COMP 0 #endif -// TIMER0_FOR_CSENSE - First TIMER instance used by the driver (not used on nRF51). +// TIMER0_FOR_CSENSE - First TIMER instance used by the driver (not used on nRF51). #ifndef TIMER0_FOR_CSENSE #define TIMER0_FOR_CSENSE 1 #endif -// TIMER1_FOR_CSENSE - Second TIMER instance used by the driver (not used on nRF51). +// TIMER1_FOR_CSENSE - Second TIMER instance used by the driver (not used on nRF51). #ifndef TIMER1_FOR_CSENSE #define TIMER1_FOR_CSENSE 2 #endif -// MEASUREMENT_PERIOD - Single measurement period. +// MEASUREMENT_PERIOD - Single measurement period. // Time of a single measurement can be calculated as // T = (1/2)*MEASUREMENT_PERIOD*(1/f_OSC) where f_OSC = I_SOURCE / (2C*(VUP-VDOWN) ). // I_SOURCE, VUP, and VDOWN are values used to initialize COMP and C is the capacitance of the used pad. @@ -4011,29 +6657,47 @@ // // NRF_FPRINTF_ENABLED - nrf_fprintf - fprintf function. - + #ifndef NRF_FPRINTF_ENABLED -#define NRF_FPRINTF_ENABLED 0 +#define NRF_FPRINTF_ENABLED 1 #endif // NRF_FSTORAGE_ENABLED - nrf_fstorage - Flash abstraction library //========================================================== #ifndef NRF_FSTORAGE_ENABLED -#define NRF_FSTORAGE_ENABLED 1 +#define NRF_FSTORAGE_ENABLED 0 #endif -// nrf_fstorage_sd - Implementation using the SoftDevice. +// nrf_fstorage - Common settings -// Configuration options for the fstorage implementation using the SoftDevice. +// Common settings to all fstorage implementations //========================================================== -// NRF_FSTORAGE_SD_QUEUE_SIZE - Size of the internal queue of operations. +// NRF_FSTORAGE_PARAM_CHECK_DISABLED - Disable user input validation + + +// If selected, use ASSERT to validate user input. +// This effectively removes user input validation in production code. +// Recommended setting: OFF, only enable this setting if size is a major concern. + +#ifndef NRF_FSTORAGE_PARAM_CHECK_DISABLED +#define NRF_FSTORAGE_PARAM_CHECK_DISABLED 0 +#endif + +// +//========================================================== + +// nrf_fstorage_sd - Implementation using the SoftDevice + +// Configuration options for the fstorage implementation using the SoftDevice +//========================================================== +// NRF_FSTORAGE_SD_QUEUE_SIZE - Size of the internal queue of operations // Increase this value if API calls frequently return the error @ref NRF_ERROR_NO_MEM. #ifndef NRF_FSTORAGE_SD_QUEUE_SIZE #define NRF_FSTORAGE_SD_QUEUE_SIZE 4 #endif -// NRF_FSTORAGE_SD_MAX_RETRIES - Maximum number of attempts at executing an operation when the SoftDevice is busy. +// NRF_FSTORAGE_SD_MAX_RETRIES - Maximum number of attempts at executing an operation when the SoftDevice is busy // Increase this value if events frequently return the @ref NRF_ERROR_TIMEOUT error. // The SoftDevice might fail to schedule flash access due to high BLE activity. @@ -4041,7 +6705,7 @@ #define NRF_FSTORAGE_SD_MAX_RETRIES 8 #endif -// NRF_FSTORAGE_SD_MAX_WRITE_SIZE - Maximum number of bytes to be written to flash in a single operation. +// NRF_FSTORAGE_SD_MAX_WRITE_SIZE - Maximum number of bytes to be written to flash in a single operation // This value must be a multiple of four. // Lowering this value can increase the chances of the SoftDevice being able to execute flash operations in between radio activity. // This value is bound by the maximum number of bytes that can be written to flash in a single call to @ref sd_flash_write. @@ -4051,16 +6715,23 @@ #define NRF_FSTORAGE_SD_MAX_WRITE_SIZE 4096 #endif -// +// //========================================================== // -// NRF_MEMOBJ_ENABLED - nrf_memobj - Linked memory allocator module +// NRF_GFX_ENABLED - nrf_gfx - GFX module + + +#ifndef NRF_GFX_ENABLED +#define NRF_GFX_ENABLED 0 +#endif +// NRF_MEMOBJ_ENABLED - nrf_memobj - Linked memory allocator module + #ifndef NRF_MEMOBJ_ENABLED -#define NRF_MEMOBJ_ENABLED 0 +#define NRF_MEMOBJ_ENABLED 1 #endif // NRF_PWR_MGMT_ENABLED - nrf_pwr_mgmt - Power management module @@ -4076,56 +6747,56 @@ #define NRF_PWR_MGMT_CONFIG_DEBUG_PIN_ENABLED 0 #endif // NRF_PWR_MGMT_SLEEP_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef NRF_PWR_MGMT_SLEEP_DEBUG_PIN #define NRF_PWR_MGMT_SLEEP_DEBUG_PIN 31 @@ -4134,7 +6805,7 @@ // // NRF_PWR_MGMT_CONFIG_CPU_USAGE_MONITOR_ENABLED - Enables CPU usage monitor. - + // Module will trace percentage of CPU usage in one second intervals. @@ -4147,7 +6818,7 @@ #ifndef NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_ENABLED #define NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_ENABLED 0 #endif -// NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_S - Standby timeout (in seconds). +// NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_S - Standby timeout (in seconds). // Shutdown procedure will begin no earlier than after this number of seconds. #ifndef NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_S @@ -4157,27 +6828,27 @@ // // NRF_PWR_MGMT_CONFIG_FPU_SUPPORT_ENABLED - Enables FPU event cleaning. - + #ifndef NRF_PWR_MGMT_CONFIG_FPU_SUPPORT_ENABLED -#define NRF_PWR_MGMT_CONFIG_FPU_SUPPORT_ENABLED 1 +#define NRF_PWR_MGMT_CONFIG_FPU_SUPPORT_ENABLED 0 #endif // NRF_PWR_MGMT_CONFIG_AUTO_SHUTDOWN_RETRY - Blocked shutdown procedure will be retried every second. - + #ifndef NRF_PWR_MGMT_CONFIG_AUTO_SHUTDOWN_RETRY #define NRF_PWR_MGMT_CONFIG_AUTO_SHUTDOWN_RETRY 0 #endif // NRF_PWR_MGMT_CONFIG_USE_SCHEDULER - Module will use @ref app_scheduler. - + #ifndef NRF_PWR_MGMT_CONFIG_USE_SCHEDULER #define NRF_PWR_MGMT_CONFIG_USE_SCHEDULER 0 #endif -// NRF_PWR_MGMT_CONFIG_HANDLER_PRIORITY_COUNT - The number of priorities for module handlers. +// NRF_PWR_MGMT_CONFIG_HANDLER_PRIORITY_COUNT - The number of priorities for module handlers. // The number of stages of the shutdown process. #ifndef NRF_PWR_MGMT_CONFIG_HANDLER_PRIORITY_COUNT @@ -4186,29 +6857,57 @@ // -// NRF_QUEUE_ENABLED - nrf_queue - Queue module - - +// NRF_QUEUE_ENABLED - nrf_queue - Queue module +//========================================================== #ifndef NRF_QUEUE_ENABLED -#define NRF_QUEUE_ENABLED 1 +#define NRF_QUEUE_ENABLED 0 #endif +// NRF_QUEUE_CLI_CMDS - Enable CLI commands specific to the module + -// NRF_SECTION_ITER_ENABLED - nrf_section_iter - Section iterator +#ifndef NRF_QUEUE_CLI_CMDS +#define NRF_QUEUE_CLI_CMDS 0 +#endif + +// +// NRF_SECTION_ITER_ENABLED - nrf_section_iter - Section iterator + #ifndef NRF_SECTION_ITER_ENABLED #define NRF_SECTION_ITER_ENABLED 1 #endif -// NRF_STRERROR_ENABLED - nrf_strerror - Library for converting error code to string. +// NRF_SORTLIST_ENABLED - nrf_sortlist - Sorted list + + +#ifndef NRF_SORTLIST_ENABLED +#define NRF_SORTLIST_ENABLED 0 +#endif +// NRF_SPI_MNGR_ENABLED - nrf_spi_mngr - SPI transaction manager + + +#ifndef NRF_SPI_MNGR_ENABLED +#define NRF_SPI_MNGR_ENABLED 0 +#endif + +// NRF_STRERROR_ENABLED - nrf_strerror - Library for converting error code to string. + #ifndef NRF_STRERROR_ENABLED -#define NRF_STRERROR_ENABLED 0 +#define NRF_STRERROR_ENABLED 1 #endif -// SLIP_ENABLED - slip - SLIP encoding and decoding +// NRF_TWI_MNGR_ENABLED - nrf_twi_mngr - TWI transaction manager + + +#ifndef NRF_TWI_MNGR_ENABLED +#define NRF_TWI_MNGR_ENABLED 0 +#endif +// SLIP_ENABLED - slip - SLIP encoding and decoding + #ifndef SLIP_ENABLED #define SLIP_ENABLED 0 @@ -4220,37 +6919,37 @@ #define TASK_MANAGER_ENABLED 0 #endif // TASK_MANAGER_CLI_CMDS - Enable CLI commands specific to the module - + #ifndef TASK_MANAGER_CLI_CMDS -#define TASK_MANAGER_CLI_CMDS 1 +#define TASK_MANAGER_CLI_CMDS 0 #endif -// TASK_MANAGER_CONFIG_MAX_TASKS - Maximum number of tasks which can be created +// TASK_MANAGER_CONFIG_MAX_TASKS - Maximum number of tasks which can be created #ifndef TASK_MANAGER_CONFIG_MAX_TASKS #define TASK_MANAGER_CONFIG_MAX_TASKS 2 #endif -// TASK_MANAGER_CONFIG_STACK_SIZE - Stack size for every task (power of 2) +// TASK_MANAGER_CONFIG_STACK_SIZE - Stack size for every task (power of 2) #ifndef TASK_MANAGER_CONFIG_STACK_SIZE #define TASK_MANAGER_CONFIG_STACK_SIZE 1024 #endif // TASK_MANAGER_CONFIG_STACK_PROFILER_ENABLED - Enable stack profiling. - + #ifndef TASK_MANAGER_CONFIG_STACK_PROFILER_ENABLED #define TASK_MANAGER_CONFIG_STACK_PROFILER_ENABLED 1 #endif // TASK_MANAGER_CONFIG_STACK_GUARD - Configures stack guard. - -// <0=> Disabled -// <4=> 32 bytes -// <5=> 64 bytes -// <6=> 128 bytes -// <7=> 256 bytes -// <8=> 512 bytes + +// <0=> Disabled +// <4=> 32 bytes +// <5=> 64 bytes +// <6=> 128 bytes +// <7=> 256 bytes +// <8=> 512 bytes #ifndef TASK_MANAGER_CONFIG_STACK_GUARD #define TASK_MANAGER_CONFIG_STACK_GUARD 7 @@ -4258,34 +6957,68 @@ // -// nrf_cli - Command line interface. +// app_button - buttons handling module + +//========================================================== +// BUTTON_ENABLED - Enables Button module + + +#ifndef BUTTON_ENABLED +#define BUTTON_ENABLED 0 +#endif + +// BUTTON_HIGH_ACCURACY_ENABLED - Enables GPIOTE high accuracy for buttons + + +#ifndef BUTTON_HIGH_ACCURACY_ENABLED +#define BUTTON_HIGH_ACCURACY_ENABLED 0 +#endif +// //========================================================== -// NRF_CLI_ENABLED - Enable/disable CLI module. +// nrf_cli - Command line interface + +//========================================================== +// NRF_CLI_ENABLED - Enable/disable the CLI module. + #ifndef NRF_CLI_ENABLED #define NRF_CLI_ENABLED 0 #endif -// NRF_CLI_ARGC_MAX - Maximum number of parameters passed to command handler. +// NRF_CLI_ARGC_MAX - Maximum number of parameters passed to the command handler. #ifndef NRF_CLI_ARGC_MAX #define NRF_CLI_ARGC_MAX 12 #endif -// NRF_CLI_BUILD_IN_CMDS_ENABLED - CLI build in commands. - +// NRF_CLI_BUILD_IN_CMDS_ENABLED - CLI built-in commands. + #ifndef NRF_CLI_BUILD_IN_CMDS_ENABLED #define NRF_CLI_BUILD_IN_CMDS_ENABLED 1 #endif -// NRF_CLI_CMD_BUFF_SIZE - Maximum buffer size for single command. +// NRF_CLI_CMD_BUFF_SIZE - Maximum buffer size for a single command. #ifndef NRF_CLI_CMD_BUFF_SIZE #define NRF_CLI_CMD_BUFF_SIZE 128 #endif -// NRF_CLI_PRINTF_BUFF_SIZE - Maximum print buffer size. +// NRF_CLI_ECHO_STATUS - CLI echo status. If set, echo is ON. + + +#ifndef NRF_CLI_ECHO_STATUS +#define NRF_CLI_ECHO_STATUS 1 +#endif + +// NRF_CLI_WILDCARD_ENABLED - Enable wildcard functionality for CLI commands. + + +#ifndef NRF_CLI_WILDCARD_ENABLED +#define NRF_CLI_WILDCARD_ENABLED 0 +#endif + +// NRF_CLI_PRINTF_BUFF_SIZE - Maximum print buffer size. #ifndef NRF_CLI_PRINTF_BUFF_SIZE #define NRF_CLI_PRINTF_BUFF_SIZE 23 #endif @@ -4295,12 +7028,12 @@ #ifndef NRF_CLI_HISTORY_ENABLED #define NRF_CLI_HISTORY_ENABLED 1 #endif -// NRF_CLI_HISTORY_ELEMENT_SIZE - Size of one memory object reserved for CLI history +// NRF_CLI_HISTORY_ELEMENT_SIZE - Size of one memory object reserved for CLI history. #ifndef NRF_CLI_HISTORY_ELEMENT_SIZE #define NRF_CLI_HISTORY_ELEMENT_SIZE 32 #endif -// NRF_CLI_HISTORY_ELEMENT_COUNT - Number of history memory objects +// NRF_CLI_HISTORY_ELEMENT_COUNT - Number of history memory objects. #ifndef NRF_CLI_HISTORY_ELEMENT_COUNT #define NRF_CLI_HISTORY_ELEMENT_COUNT 8 #endif @@ -4308,116 +7041,50 @@ // // NRF_CLI_VT100_COLORS_ENABLED - CLI VT100 colors. - + #ifndef NRF_CLI_VT100_COLORS_ENABLED #define NRF_CLI_VT100_COLORS_ENABLED 1 #endif -// NRF_CLI_LOG_BACKEND - Enable logger backend interface. +// NRF_CLI_STATISTICS_ENABLED - Enable CLI statistics. + + +#ifndef NRF_CLI_STATISTICS_ENABLED +#define NRF_CLI_STATISTICS_ENABLED 1 +#endif +// NRF_CLI_LOG_BACKEND - Enable logger backend interface. + #ifndef NRF_CLI_LOG_BACKEND #define NRF_CLI_LOG_BACKEND 1 #endif // NRF_CLI_USES_TASK_MANAGER_ENABLED - Enable CLI to use task_manager - + #ifndef NRF_CLI_USES_TASK_MANAGER_ENABLED #define NRF_CLI_USES_TASK_MANAGER_ENABLED 0 #endif -// -//========================================================== - -// nrf_cli_rtt - RTT command line interface transport. - -//========================================================== -// NRF_CLI_RTT_ENABLED - Enable/disable CLI RTT module. - - -#ifndef NRF_CLI_RTT_ENABLED -#define NRF_CLI_RTT_ENABLED 0 -#endif - -// NRF_CLI_RTT_TERMINAL_ID - RTT terminal ID for CLI. -#ifndef NRF_CLI_RTT_TERMINAL_ID -#define NRF_CLI_RTT_TERMINAL_ID 0 -#endif - -// +// //========================================================== -// -//========================================================== - -// nRF_Log - -//========================================================== -// NRF_LOG_BACKEND_RTT_ENABLED - nrf_log_backend_rtt - Log RTT backend +// //========================================================== -#ifndef NRF_LOG_BACKEND_RTT_ENABLED -#define NRF_LOG_BACKEND_RTT_ENABLED 0 -#endif -// NRF_LOG_BACKEND_RTT_TEMP_BUFFER_SIZE - Size of buffer for partially processed strings. -// Size of the buffer is a trade-off between RAM usage and processing. -// if buffer is smaller then strings will often be fragmented. -// It is recommended to use size which will fit typical log and only the -// longer one will be fragmented. - -#ifndef NRF_LOG_BACKEND_RTT_TEMP_BUFFER_SIZE -#define NRF_LOG_BACKEND_RTT_TEMP_BUFFER_SIZE 64 -#endif -// +// nRF_Log -// NRF_LOG_BACKEND_UART_ENABLED - nrf_log_backend_uart - Log UART backend //========================================================== -#ifndef NRF_LOG_BACKEND_UART_ENABLED -#define NRF_LOG_BACKEND_UART_ENABLED 0 -#endif -// NRF_LOG_BACKEND_UART_TX_PIN - UART TX pin -#ifndef NRF_LOG_BACKEND_UART_TX_PIN -#define NRF_LOG_BACKEND_UART_TX_PIN 6 -#endif - -// NRF_LOG_BACKEND_UART_BAUDRATE - Default Baudrate - -// <323584=> 1200 baud -// <643072=> 2400 baud -// <1290240=> 4800 baud -// <2576384=> 9600 baud -// <3862528=> 14400 baud -// <5152768=> 19200 baud -// <7716864=> 28800 baud -// <10289152=> 38400 baud -// <15400960=> 57600 baud -// <20615168=> 76800 baud -// <30801920=> 115200 baud -// <61865984=> 230400 baud -// <67108864=> 250000 baud -// <121634816=> 460800 baud -// <251658240=> 921600 baud -// <268435456=> 1000000 baud +// NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED - nrf_log_str_formatter - Log string formatter + -#ifndef NRF_LOG_BACKEND_UART_BAUDRATE -#define NRF_LOG_BACKEND_UART_BAUDRATE 30801920 +#ifndef NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED +#define NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED 1 #endif -// NRF_LOG_BACKEND_UART_TEMP_BUFFER_SIZE - Size of buffer for partially processed strings. -// Size of the buffer is a trade-off between RAM usage and processing. -// if buffer is smaller then strings will often be fragmented. -// It is recommended to use size which will fit typical log and only the -// longer one will be fragmented. - -#ifndef NRF_LOG_BACKEND_UART_TEMP_BUFFER_SIZE -#define NRF_LOG_BACKEND_UART_TEMP_BUFFER_SIZE 64 -#endif - -// - -// nrf_log - Logging +// nrf_log - Logger //========================================================== // NRF_LOG_ENABLED - Logging module for nRF5 SDK @@ -4431,69 +7098,69 @@ #define NRF_LOG_USES_COLORS 0 #endif // NRF_LOG_COLOR_DEFAULT - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_LOG_COLOR_DEFAULT #define NRF_LOG_COLOR_DEFAULT 0 #endif // NRF_LOG_ERROR_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_LOG_ERROR_COLOR -#define NRF_LOG_ERROR_COLOR 0 +#define NRF_LOG_ERROR_COLOR 2 #endif // NRF_LOG_WARNING_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_LOG_WARNING_COLOR -#define NRF_LOG_WARNING_COLOR 0 +#define NRF_LOG_WARNING_COLOR 4 #endif // // NRF_LOG_DEFAULT_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NRF_LOG_DEFAULT_LEVEL #define NRF_LOG_DEFAULT_LEVEL 3 #endif // NRF_LOG_DEFERRED - Enable deffered logger. - + // Log data is buffered and can be processed in idle. @@ -4502,60 +7169,65 @@ #endif // NRF_LOG_BUFSIZE - Size of the buffer for storing logs (in bytes). - + // Must be power of 2 and multiple of 4. // If NRF_LOG_DEFERRED = 0 then buffer size can be reduced to minimum. -// <128=> 128 -// <256=> 256 -// <512=> 512 -// <1024=> 1024 -// <2048=> 2048 -// <4096=> 4096 -// <8192=> 8192 -// <16384=> 16384 +// <128=> 128 +// <256=> 256 +// <512=> 512 +// <1024=> 1024 +// <2048=> 2048 +// <4096=> 4096 +// <8192=> 8192 +// <16384=> 16384 #ifndef NRF_LOG_BUFSIZE #define NRF_LOG_BUFSIZE 1024 #endif // NRF_LOG_ALLOW_OVERFLOW - Configures behavior when circular buffer is full. + - -// If set then oldest logs are overwritten. Otherwise a +// If set then oldest logs are overwritten. Otherwise a // marker is injected informing about overflow. #ifndef NRF_LOG_ALLOW_OVERFLOW #define NRF_LOG_ALLOW_OVERFLOW 1 #endif -// NRF_LOG_USES_TIMESTAMP - Enable timestamping - +// NRF_LOG_USES_TIMESTAMP - Enable timestamping // Function for getting the timestamp is provided by the user - +//========================================================== #ifndef NRF_LOG_USES_TIMESTAMP #define NRF_LOG_USES_TIMESTAMP 0 #endif +// NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY - Default frequency of the timestamp (in Hz) +#ifndef NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY +#define NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY 32768 +#endif -// NRF_LOG_FILTERS_ENABLED - Enable dynamic filtering of logs. +// +// NRF_LOG_FILTERS_ENABLED - Enable dynamic filtering of logs. + #ifndef NRF_LOG_FILTERS_ENABLED -#define NRF_LOG_FILTERS_ENABLED 1 +#define NRF_LOG_FILTERS_ENABLED 0 #endif // NRF_LOG_CLI_CMDS - Enable CLI commands for the module. - + #ifndef NRF_LOG_CLI_CMDS -#define NRF_LOG_CLI_CMDS 1 +#define NRF_LOG_CLI_CMDS 0 #endif // Log message pool - Configuration of log message pool //========================================================== -// NRF_LOG_MSGPOOL_ELEMENT_SIZE - Size of a single element in the pool of memory objects. +// NRF_LOG_MSGPOOL_ELEMENT_SIZE - Size of a single element in the pool of memory objects. // If a small value is set, then performance of logs processing // is degraded because data is fragmented. Bigger value impacts // RAM memory utilization. The size is set to fit a message with @@ -4565,7 +7237,7 @@ #define NRF_LOG_MSGPOOL_ELEMENT_SIZE 20 #endif -// NRF_LOG_MSGPOOL_ELEMENT_COUNT - Number of elements in the pool of memory objects +// NRF_LOG_MSGPOOL_ELEMENT_COUNT - Number of elements in the pool of memory objects // If a small value is set, then it may lead to a deadlock // in certain cases if backend has high latency and holds // multiple messages for long time. Bigger value impacts @@ -4575,15 +7247,15 @@ #define NRF_LOG_MSGPOOL_ELEMENT_COUNT 8 #endif -// +// //========================================================== // -// nrf_log module configuration +// nrf_log module configuration //========================================================== -// nrf_log in nRF_Core +// nrf_log in nRF_Core //========================================================== // NRF_MPU_CONFIG_LOG_ENABLED - Enables logging in the module. @@ -4592,44 +7264,44 @@ #define NRF_MPU_CONFIG_LOG_ENABLED 0 #endif // NRF_MPU_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NRF_MPU_CONFIG_LOG_LEVEL #define NRF_MPU_CONFIG_LOG_LEVEL 3 #endif // NRF_MPU_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_MPU_CONFIG_INFO_COLOR #define NRF_MPU_CONFIG_INFO_COLOR 0 #endif // NRF_MPU_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_MPU_CONFIG_DEBUG_COLOR #define NRF_MPU_CONFIG_DEBUG_COLOR 0 @@ -4643,44 +7315,44 @@ #define NRF_STACK_GUARD_CONFIG_LOG_ENABLED 0 #endif // NRF_STACK_GUARD_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NRF_STACK_GUARD_CONFIG_LOG_LEVEL #define NRF_STACK_GUARD_CONFIG_LOG_LEVEL 3 #endif // NRF_STACK_GUARD_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_STACK_GUARD_CONFIG_INFO_COLOR #define NRF_STACK_GUARD_CONFIG_INFO_COLOR 0 #endif // NRF_STACK_GUARD_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_STACK_GUARD_CONFIG_DEBUG_COLOR #define NRF_STACK_GUARD_CONFIG_DEBUG_COLOR 0 @@ -4694,44 +7366,44 @@ #define TASK_MANAGER_CONFIG_LOG_ENABLED 0 #endif // TASK_MANAGER_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef TASK_MANAGER_CONFIG_LOG_LEVEL #define TASK_MANAGER_CONFIG_LOG_LEVEL 3 #endif // TASK_MANAGER_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef TASK_MANAGER_CONFIG_INFO_COLOR #define TASK_MANAGER_CONFIG_INFO_COLOR 0 #endif // TASK_MANAGER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef TASK_MANAGER_CONFIG_DEBUG_COLOR #define TASK_MANAGER_CONFIG_DEBUG_COLOR 0 @@ -4739,10 +7411,10 @@ // -// +// //========================================================== -// nrf_log in nRF_Drivers +// nrf_log in nRF_Drivers //========================================================== // CLOCK_CONFIG_LOG_ENABLED - Enables logging in the module. @@ -4751,44 +7423,44 @@ #define CLOCK_CONFIG_LOG_ENABLED 0 #endif // CLOCK_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef CLOCK_CONFIG_LOG_LEVEL #define CLOCK_CONFIG_LOG_LEVEL 3 #endif // CLOCK_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef CLOCK_CONFIG_INFO_COLOR #define CLOCK_CONFIG_INFO_COLOR 0 #endif // CLOCK_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef CLOCK_CONFIG_DEBUG_COLOR #define CLOCK_CONFIG_DEBUG_COLOR 0 @@ -4796,101 +7468,50 @@ // -// COMMON_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef COMMON_CONFIG_LOG_ENABLED -#define COMMON_CONFIG_LOG_ENABLED 0 -#endif -// COMMON_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef COMMON_CONFIG_LOG_LEVEL -#define COMMON_CONFIG_LOG_LEVEL 3 -#endif - -// COMMON_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef COMMON_CONFIG_INFO_COLOR -#define COMMON_CONFIG_INFO_COLOR 0 -#endif - -// COMMON_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef COMMON_CONFIG_DEBUG_COLOR -#define COMMON_CONFIG_DEBUG_COLOR 0 -#endif - -// - // COMP_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef COMP_CONFIG_LOG_ENABLED #define COMP_CONFIG_LOG_ENABLED 0 #endif // COMP_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef COMP_CONFIG_LOG_LEVEL #define COMP_CONFIG_LOG_LEVEL 3 #endif // COMP_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef COMP_CONFIG_INFO_COLOR #define COMP_CONFIG_INFO_COLOR 0 #endif // COMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef COMP_CONFIG_DEBUG_COLOR #define COMP_CONFIG_DEBUG_COLOR 0 @@ -4904,44 +7525,44 @@ #define GPIOTE_CONFIG_LOG_ENABLED 0 #endif // GPIOTE_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef GPIOTE_CONFIG_LOG_LEVEL #define GPIOTE_CONFIG_LOG_LEVEL 3 #endif // GPIOTE_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef GPIOTE_CONFIG_INFO_COLOR #define GPIOTE_CONFIG_INFO_COLOR 0 #endif // GPIOTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef GPIOTE_CONFIG_DEBUG_COLOR #define GPIOTE_CONFIG_DEBUG_COLOR 0 @@ -4949,101 +7570,50 @@ // -// I2S_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef I2S_CONFIG_LOG_ENABLED -#define I2S_CONFIG_LOG_ENABLED 0 -#endif -// I2S_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef I2S_CONFIG_LOG_LEVEL -#define I2S_CONFIG_LOG_LEVEL 3 -#endif - -// I2S_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef I2S_CONFIG_INFO_COLOR -#define I2S_CONFIG_INFO_COLOR 0 -#endif - -// I2S_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef I2S_CONFIG_DEBUG_COLOR -#define I2S_CONFIG_DEBUG_COLOR 0 -#endif - -// - // LPCOMP_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef LPCOMP_CONFIG_LOG_ENABLED #define LPCOMP_CONFIG_LOG_ENABLED 0 #endif // LPCOMP_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef LPCOMP_CONFIG_LOG_LEVEL #define LPCOMP_CONFIG_LOG_LEVEL 3 #endif // LPCOMP_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef LPCOMP_CONFIG_INFO_COLOR #define LPCOMP_CONFIG_INFO_COLOR 0 #endif // LPCOMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef LPCOMP_CONFIG_DEBUG_COLOR #define LPCOMP_CONFIG_DEBUG_COLOR 0 @@ -5057,44 +7627,44 @@ #define PDM_CONFIG_LOG_ENABLED 0 #endif // PDM_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef PDM_CONFIG_LOG_LEVEL #define PDM_CONFIG_LOG_LEVEL 3 #endif // PDM_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef PDM_CONFIG_INFO_COLOR #define PDM_CONFIG_INFO_COLOR 0 #endif // PDM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef PDM_CONFIG_DEBUG_COLOR #define PDM_CONFIG_DEBUG_COLOR 0 @@ -5104,48 +7674,48 @@ // PPI_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== -#ifndef PPI_CONFIG_LOG_ENABLED -#define PPI_CONFIG_LOG_ENABLED 0 -#endif -// PPI_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +#ifndef PPI_CONFIG_LOG_ENABLED +#define PPI_CONFIG_LOG_ENABLED 0 +#endif +// PPI_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef PPI_CONFIG_LOG_LEVEL #define PPI_CONFIG_LOG_LEVEL 3 #endif // PPI_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef PPI_CONFIG_INFO_COLOR #define PPI_CONFIG_INFO_COLOR 0 #endif // PPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef PPI_CONFIG_DEBUG_COLOR #define PPI_CONFIG_DEBUG_COLOR 0 @@ -5159,44 +7729,44 @@ #define PWM_CONFIG_LOG_ENABLED 0 #endif // PWM_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef PWM_CONFIG_LOG_LEVEL #define PWM_CONFIG_LOG_LEVEL 3 #endif // PWM_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef PWM_CONFIG_INFO_COLOR #define PWM_CONFIG_INFO_COLOR 0 #endif // PWM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef PWM_CONFIG_DEBUG_COLOR #define PWM_CONFIG_DEBUG_COLOR 0 @@ -5210,44 +7780,44 @@ #define QDEC_CONFIG_LOG_ENABLED 0 #endif // QDEC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef QDEC_CONFIG_LOG_LEVEL #define QDEC_CONFIG_LOG_LEVEL 3 #endif // QDEC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef QDEC_CONFIG_INFO_COLOR #define QDEC_CONFIG_INFO_COLOR 0 #endif // QDEC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef QDEC_CONFIG_DEBUG_COLOR #define QDEC_CONFIG_DEBUG_COLOR 0 @@ -5261,51 +7831,51 @@ #define RNG_CONFIG_LOG_ENABLED 0 #endif // RNG_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef RNG_CONFIG_LOG_LEVEL #define RNG_CONFIG_LOG_LEVEL 3 #endif // RNG_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef RNG_CONFIG_INFO_COLOR #define RNG_CONFIG_INFO_COLOR 0 #endif // RNG_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef RNG_CONFIG_DEBUG_COLOR #define RNG_CONFIG_DEBUG_COLOR 0 #endif // RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED - Enables logging of random numbers. - + #ifndef RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED #define RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED 0 @@ -5319,44 +7889,44 @@ #define RTC_CONFIG_LOG_ENABLED 0 #endif // RTC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef RTC_CONFIG_LOG_LEVEL #define RTC_CONFIG_LOG_LEVEL 3 #endif // RTC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef RTC_CONFIG_INFO_COLOR #define RTC_CONFIG_INFO_COLOR 0 #endif // RTC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef RTC_CONFIG_DEBUG_COLOR #define RTC_CONFIG_DEBUG_COLOR 0 @@ -5370,44 +7940,44 @@ #define SAADC_CONFIG_LOG_ENABLED 0 #endif // SAADC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef SAADC_CONFIG_LOG_LEVEL #define SAADC_CONFIG_LOG_LEVEL 3 #endif // SAADC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef SAADC_CONFIG_INFO_COLOR #define SAADC_CONFIG_INFO_COLOR 0 #endif // SAADC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef SAADC_CONFIG_DEBUG_COLOR #define SAADC_CONFIG_DEBUG_COLOR 0 @@ -5421,44 +7991,44 @@ #define SPIS_CONFIG_LOG_ENABLED 0 #endif // SPIS_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef SPIS_CONFIG_LOG_LEVEL #define SPIS_CONFIG_LOG_LEVEL 3 #endif // SPIS_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef SPIS_CONFIG_INFO_COLOR #define SPIS_CONFIG_INFO_COLOR 0 #endif // SPIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef SPIS_CONFIG_DEBUG_COLOR #define SPIS_CONFIG_DEBUG_COLOR 0 @@ -5472,98 +8042,47 @@ #define SPI_CONFIG_LOG_ENABLED 0 #endif // SPI_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef SPI_CONFIG_LOG_LEVEL #define SPI_CONFIG_LOG_LEVEL 3 #endif -// SPI_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef SPI_CONFIG_INFO_COLOR -#define SPI_CONFIG_INFO_COLOR 0 -#endif - -// SPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef SPI_CONFIG_DEBUG_COLOR -#define SPI_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// SWI_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef SWI_CONFIG_LOG_ENABLED -#define SWI_CONFIG_LOG_ENABLED 0 -#endif -// SWI_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef SWI_CONFIG_LOG_LEVEL -#define SWI_CONFIG_LOG_LEVEL 3 -#endif - -// SWI_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef SWI_CONFIG_INFO_COLOR -#define SWI_CONFIG_INFO_COLOR 0 -#endif - -// SWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef SWI_CONFIG_DEBUG_COLOR -#define SWI_CONFIG_DEBUG_COLOR 0 +// SPI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SPI_CONFIG_INFO_COLOR +#define SPI_CONFIG_INFO_COLOR 0 +#endif + +// SPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SPI_CONFIG_DEBUG_COLOR +#define SPI_CONFIG_DEBUG_COLOR 0 #endif // @@ -5574,44 +8093,44 @@ #define TIMER_CONFIG_LOG_ENABLED 0 #endif // TIMER_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef TIMER_CONFIG_LOG_LEVEL #define TIMER_CONFIG_LOG_LEVEL 3 #endif // TIMER_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef TIMER_CONFIG_INFO_COLOR #define TIMER_CONFIG_INFO_COLOR 0 #endif // TIMER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef TIMER_CONFIG_DEBUG_COLOR #define TIMER_CONFIG_DEBUG_COLOR 0 @@ -5625,44 +8144,44 @@ #define TWIS_CONFIG_LOG_ENABLED 0 #endif // TWIS_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef TWIS_CONFIG_LOG_LEVEL #define TWIS_CONFIG_LOG_LEVEL 3 #endif // TWIS_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef TWIS_CONFIG_INFO_COLOR #define TWIS_CONFIG_INFO_COLOR 0 #endif // TWIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef TWIS_CONFIG_DEBUG_COLOR #define TWIS_CONFIG_DEBUG_COLOR 0 @@ -5676,44 +8195,44 @@ #define TWI_CONFIG_LOG_ENABLED 0 #endif // TWI_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef TWI_CONFIG_LOG_LEVEL #define TWI_CONFIG_LOG_LEVEL 3 #endif // TWI_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef TWI_CONFIG_INFO_COLOR #define TWI_CONFIG_INFO_COLOR 0 #endif // TWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef TWI_CONFIG_DEBUG_COLOR #define TWI_CONFIG_DEBUG_COLOR 0 @@ -5727,44 +8246,44 @@ #define UART_CONFIG_LOG_ENABLED 0 #endif // UART_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef UART_CONFIG_LOG_LEVEL #define UART_CONFIG_LOG_LEVEL 3 #endif // UART_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef UART_CONFIG_INFO_COLOR #define UART_CONFIG_INFO_COLOR 0 #endif // UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef UART_CONFIG_DEBUG_COLOR #define UART_CONFIG_DEBUG_COLOR 0 @@ -5778,44 +8297,44 @@ #define USBD_CONFIG_LOG_ENABLED 0 #endif // USBD_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef USBD_CONFIG_LOG_LEVEL #define USBD_CONFIG_LOG_LEVEL 3 #endif // USBD_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef USBD_CONFIG_INFO_COLOR #define USBD_CONFIG_INFO_COLOR 0 #endif // USBD_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef USBD_CONFIG_DEBUG_COLOR #define USBD_CONFIG_DEBUG_COLOR 0 @@ -5829,44 +8348,44 @@ #define WDT_CONFIG_LOG_ENABLED 0 #endif // WDT_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef WDT_CONFIG_LOG_LEVEL #define WDT_CONFIG_LOG_LEVEL 3 #endif // WDT_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef WDT_CONFIG_INFO_COLOR #define WDT_CONFIG_INFO_COLOR 0 #endif // WDT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef WDT_CONFIG_DEBUG_COLOR #define WDT_CONFIG_DEBUG_COLOR 0 @@ -5874,56 +8393,123 @@ // -// +// //========================================================== -// nrf_log in nRF_Libraries +// nrf_log in nRF_Libraries //========================================================== +// APP_TIMER_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef APP_TIMER_CONFIG_LOG_ENABLED +#define APP_TIMER_CONFIG_LOG_ENABLED 0 +#endif +// APP_TIMER_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_TIMER_CONFIG_LOG_LEVEL +#define APP_TIMER_CONFIG_LOG_LEVEL 3 +#endif + +// APP_TIMER_CONFIG_INITIAL_LOG_LEVEL - Initial severity level if dynamic filtering is enabled. + + +// If module generates a lot of logs, initial log level can +// be decreased to prevent flooding. Severity level can be +// increased on instance basis. +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_TIMER_CONFIG_INITIAL_LOG_LEVEL +#define APP_TIMER_CONFIG_INITIAL_LOG_LEVEL 3 +#endif + +// APP_TIMER_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_TIMER_CONFIG_INFO_COLOR +#define APP_TIMER_CONFIG_INFO_COLOR 0 +#endif + +// APP_TIMER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_TIMER_CONFIG_DEBUG_COLOR +#define APP_TIMER_CONFIG_DEBUG_COLOR 0 +#endif + +// + // APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED #define APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED 0 #endif // APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL #define APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL 3 #endif // APP_USBD_CDC_ACM_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef APP_USBD_CDC_ACM_CONFIG_INFO_COLOR #define APP_USBD_CDC_ACM_CONFIG_INFO_COLOR 0 #endif // APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR #define APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR 0 @@ -5931,108 +8517,282 @@ // +// APP_USBD_DUMMY_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef APP_USBD_DUMMY_CONFIG_LOG_ENABLED +#define APP_USBD_DUMMY_CONFIG_LOG_ENABLED 0 +#endif +// APP_USBD_DUMMY_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_USBD_DUMMY_CONFIG_LOG_LEVEL +#define APP_USBD_DUMMY_CONFIG_LOG_LEVEL 3 +#endif + +// APP_USBD_DUMMY_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_DUMMY_CONFIG_INFO_COLOR +#define APP_USBD_DUMMY_CONFIG_INFO_COLOR 0 +#endif + +// APP_USBD_DUMMY_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_DUMMY_CONFIG_DEBUG_COLOR +#define APP_USBD_DUMMY_CONFIG_DEBUG_COLOR 0 +#endif + +// + // APP_USBD_MSC_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef APP_USBD_MSC_CONFIG_LOG_ENABLED #define APP_USBD_MSC_CONFIG_LOG_ENABLED 0 #endif // APP_USBD_MSC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef APP_USBD_MSC_CONFIG_LOG_LEVEL #define APP_USBD_MSC_CONFIG_LOG_LEVEL 3 #endif // APP_USBD_MSC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef APP_USBD_MSC_CONFIG_INFO_COLOR +#define APP_USBD_MSC_CONFIG_INFO_COLOR 0 +#endif + +// APP_USBD_MSC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_MSC_CONFIG_DEBUG_COLOR +#define APP_USBD_MSC_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED +#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED 0 +#endif +// APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL +#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL 3 +#endif + +// APP_USBD_NRF_DFU_TRIGGER_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_INFO_COLOR +#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_INFO_COLOR 0 +#endif -#ifndef APP_USBD_MSC_CONFIG_INFO_COLOR -#define APP_USBD_MSC_CONFIG_INFO_COLOR 0 +// APP_USBD_NRF_DFU_TRIGGER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_DEBUG_COLOR +#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_DEBUG_COLOR 0 #endif -// APP_USBD_MSC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. +// -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +// NRF_ATFIFO_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_ATFIFO_CONFIG_LOG_ENABLED +#define NRF_ATFIFO_CONFIG_LOG_ENABLED 0 +#endif +// NRF_ATFIFO_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -#ifndef APP_USBD_MSC_CONFIG_DEBUG_COLOR -#define APP_USBD_MSC_CONFIG_DEBUG_COLOR 0 +#ifndef NRF_ATFIFO_CONFIG_LOG_LEVEL +#define NRF_ATFIFO_CONFIG_LOG_LEVEL 3 #endif -// +// NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL - Initial severity level if dynamic filtering is enabled + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL +#define NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL 3 +#endif + +// NRF_ATFIFO_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// MEM_MANAGER_ENABLE_LOGS - Enable debug trace in the module. +#ifndef NRF_ATFIFO_CONFIG_INFO_COLOR +#define NRF_ATFIFO_CONFIG_INFO_COLOR 0 +#endif +// NRF_ATFIFO_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef MEM_MANAGER_ENABLE_LOGS -#define MEM_MANAGER_ENABLE_LOGS 0 +#ifndef NRF_ATFIFO_CONFIG_DEBUG_COLOR +#define NRF_ATFIFO_CONFIG_DEBUG_COLOR 0 #endif +// + // NRF_BALLOC_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef NRF_BALLOC_CONFIG_LOG_ENABLED #define NRF_BALLOC_CONFIG_LOG_ENABLED 0 #endif // NRF_BALLOC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NRF_BALLOC_CONFIG_LOG_LEVEL #define NRF_BALLOC_CONFIG_LOG_LEVEL 3 #endif -// NRF_BALLOC_CONFIG_INFO_COLOR - ANSI escape code prefix. +// NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL - Initial severity level if dynamic filtering is enabled. + -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +// If module generates a lot of logs, initial log level can +// be decreased to prevent flooding. Severity level can be +// increased on instance basis. +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL +#define NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL 3 +#endif + +// NRF_BALLOC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_BALLOC_CONFIG_INFO_COLOR #define NRF_BALLOC_CONFIG_INFO_COLOR 0 #endif // NRF_BALLOC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_BALLOC_CONFIG_DEBUG_COLOR #define NRF_BALLOC_CONFIG_DEBUG_COLOR 0 @@ -6046,44 +8806,44 @@ #define NRF_CLI_BLE_UART_CONFIG_LOG_ENABLED 0 #endif // NRF_CLI_BLE_UART_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NRF_CLI_BLE_UART_CONFIG_LOG_LEVEL #define NRF_CLI_BLE_UART_CONFIG_LOG_LEVEL 3 #endif // NRF_CLI_BLE_UART_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_CLI_BLE_UART_CONFIG_INFO_COLOR #define NRF_CLI_BLE_UART_CONFIG_INFO_COLOR 0 #endif // NRF_CLI_BLE_UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_CLI_BLE_UART_CONFIG_DEBUG_COLOR #define NRF_CLI_BLE_UART_CONFIG_DEBUG_COLOR 0 @@ -6091,50 +8851,101 @@ // +// NRF_CLI_LIBUARTE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_CLI_LIBUARTE_CONFIG_LOG_ENABLED +#define NRF_CLI_LIBUARTE_CONFIG_LOG_ENABLED 0 +#endif +// NRF_CLI_LIBUARTE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_CLI_LIBUARTE_CONFIG_LOG_LEVEL +#define NRF_CLI_LIBUARTE_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_CLI_LIBUARTE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_CLI_LIBUARTE_CONFIG_INFO_COLOR +#define NRF_CLI_LIBUARTE_CONFIG_INFO_COLOR 0 +#endif + +// NRF_CLI_LIBUARTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_CLI_LIBUARTE_CONFIG_DEBUG_COLOR +#define NRF_CLI_LIBUARTE_CONFIG_DEBUG_COLOR 0 +#endif + +// + // NRF_CLI_UART_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef NRF_CLI_UART_CONFIG_LOG_ENABLED #define NRF_CLI_UART_CONFIG_LOG_ENABLED 0 #endif // NRF_CLI_UART_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NRF_CLI_UART_CONFIG_LOG_LEVEL #define NRF_CLI_UART_CONFIG_LOG_LEVEL 3 #endif // NRF_CLI_UART_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_CLI_UART_CONFIG_INFO_COLOR #define NRF_CLI_UART_CONFIG_INFO_COLOR 0 #endif // NRF_CLI_UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_CLI_UART_CONFIG_DEBUG_COLOR #define NRF_CLI_UART_CONFIG_DEBUG_COLOR 0 @@ -6142,50 +8953,101 @@ // +// NRF_LIBUARTE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_LIBUARTE_CONFIG_LOG_ENABLED +#define NRF_LIBUARTE_CONFIG_LOG_ENABLED 0 +#endif +// NRF_LIBUARTE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_LIBUARTE_CONFIG_LOG_LEVEL +#define NRF_LIBUARTE_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_LIBUARTE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_LIBUARTE_CONFIG_INFO_COLOR +#define NRF_LIBUARTE_CONFIG_INFO_COLOR 0 +#endif + +// NRF_LIBUARTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_LIBUARTE_CONFIG_DEBUG_COLOR +#define NRF_LIBUARTE_CONFIG_DEBUG_COLOR 0 +#endif + +// + // NRF_MEMOBJ_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef NRF_MEMOBJ_CONFIG_LOG_ENABLED #define NRF_MEMOBJ_CONFIG_LOG_ENABLED 0 #endif // NRF_MEMOBJ_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NRF_MEMOBJ_CONFIG_LOG_LEVEL #define NRF_MEMOBJ_CONFIG_LOG_LEVEL 3 #endif // NRF_MEMOBJ_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_MEMOBJ_CONFIG_INFO_COLOR #define NRF_MEMOBJ_CONFIG_INFO_COLOR 0 #endif // NRF_MEMOBJ_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_MEMOBJ_CONFIG_DEBUG_COLOR #define NRF_MEMOBJ_CONFIG_DEBUG_COLOR 0 @@ -6199,44 +9061,44 @@ #define NRF_PWR_MGMT_CONFIG_LOG_ENABLED 0 #endif // NRF_PWR_MGMT_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NRF_PWR_MGMT_CONFIG_LOG_LEVEL #define NRF_PWR_MGMT_CONFIG_LOG_LEVEL 3 #endif // NRF_PWR_MGMT_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_PWR_MGMT_CONFIG_INFO_COLOR #define NRF_PWR_MGMT_CONFIG_INFO_COLOR 0 #endif // NRF_PWR_MGMT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_PWR_MGMT_CONFIG_DEBUG_COLOR #define NRF_PWR_MGMT_CONFIG_DEBUG_COLOR 0 @@ -6244,50 +9106,113 @@ // +// NRF_QUEUE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_QUEUE_CONFIG_LOG_ENABLED +#define NRF_QUEUE_CONFIG_LOG_ENABLED 0 +#endif +// NRF_QUEUE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_QUEUE_CONFIG_LOG_LEVEL +#define NRF_QUEUE_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL - Initial severity level if dynamic filtering is enabled + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL +#define NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL 3 +#endif + +// NRF_QUEUE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_QUEUE_CONFIG_INFO_COLOR +#define NRF_QUEUE_CONFIG_INFO_COLOR 0 +#endif + +// NRF_QUEUE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_QUEUE_CONFIG_DEBUG_COLOR +#define NRF_QUEUE_CONFIG_DEBUG_COLOR 0 +#endif + +// + // NRF_SDH_ANT_LOG_ENABLED - Enable logging in SoftDevice handler (ANT) module. //========================================================== #ifndef NRF_SDH_ANT_LOG_ENABLED -#define NRF_SDH_ANT_LOG_ENABLED 1 +#define NRF_SDH_ANT_LOG_ENABLED 0 #endif // NRF_SDH_ANT_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NRF_SDH_ANT_LOG_LEVEL #define NRF_SDH_ANT_LOG_LEVEL 3 #endif // NRF_SDH_ANT_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_SDH_ANT_INFO_COLOR #define NRF_SDH_ANT_INFO_COLOR 0 #endif // NRF_SDH_ANT_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_SDH_ANT_DEBUG_COLOR #define NRF_SDH_ANT_DEBUG_COLOR 0 @@ -6301,44 +9226,44 @@ #define NRF_SDH_BLE_LOG_ENABLED 1 #endif // NRF_SDH_BLE_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NRF_SDH_BLE_LOG_LEVEL #define NRF_SDH_BLE_LOG_LEVEL 3 #endif // NRF_SDH_BLE_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_SDH_BLE_INFO_COLOR #define NRF_SDH_BLE_INFO_COLOR 0 -#endif - -// NRF_SDH_BLE_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#endif + +// NRF_SDH_BLE_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_SDH_BLE_DEBUG_COLOR #define NRF_SDH_BLE_DEBUG_COLOR 0 @@ -6352,44 +9277,44 @@ #define NRF_SDH_LOG_ENABLED 1 #endif // NRF_SDH_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NRF_SDH_LOG_LEVEL #define NRF_SDH_LOG_LEVEL 3 #endif // NRF_SDH_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_SDH_INFO_COLOR #define NRF_SDH_INFO_COLOR 0 #endif // NRF_SDH_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_SDH_DEBUG_COLOR #define NRF_SDH_DEBUG_COLOR 0 @@ -6403,44 +9328,44 @@ #define NRF_SDH_SOC_LOG_ENABLED 1 #endif // NRF_SDH_SOC_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NRF_SDH_SOC_LOG_LEVEL #define NRF_SDH_SOC_LOG_LEVEL 3 #endif // NRF_SDH_SOC_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_SDH_SOC_INFO_COLOR #define NRF_SDH_SOC_INFO_COLOR 0 #endif // NRF_SDH_SOC_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_SDH_SOC_DEBUG_COLOR #define NRF_SDH_SOC_DEBUG_COLOR 0 @@ -6448,30 +9373,203 @@ // -// +// NRF_SORTLIST_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_SORTLIST_CONFIG_LOG_ENABLED +#define NRF_SORTLIST_CONFIG_LOG_ENABLED 0 +#endif +// NRF_SORTLIST_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_SORTLIST_CONFIG_LOG_LEVEL +#define NRF_SORTLIST_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_SORTLIST_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SORTLIST_CONFIG_INFO_COLOR +#define NRF_SORTLIST_CONFIG_INFO_COLOR 0 +#endif + +// NRF_SORTLIST_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SORTLIST_CONFIG_DEBUG_COLOR +#define NRF_SORTLIST_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// NRF_TWI_SENSOR_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_TWI_SENSOR_CONFIG_LOG_ENABLED +#define NRF_TWI_SENSOR_CONFIG_LOG_ENABLED 0 +#endif +// NRF_TWI_SENSOR_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_TWI_SENSOR_CONFIG_LOG_LEVEL +#define NRF_TWI_SENSOR_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_TWI_SENSOR_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_TWI_SENSOR_CONFIG_INFO_COLOR +#define NRF_TWI_SENSOR_CONFIG_INFO_COLOR 0 +#endif + +// NRF_TWI_SENSOR_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_TWI_SENSOR_CONFIG_DEBUG_COLOR +#define NRF_TWI_SENSOR_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// +//========================================================== + +// nrf_log in nRF_Serialization + +//========================================================== +// SER_HAL_TRANSPORT_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef SER_HAL_TRANSPORT_CONFIG_LOG_ENABLED +#define SER_HAL_TRANSPORT_CONFIG_LOG_ENABLED 0 +#endif +// SER_HAL_TRANSPORT_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef SER_HAL_TRANSPORT_CONFIG_LOG_LEVEL +#define SER_HAL_TRANSPORT_CONFIG_LOG_LEVEL 3 +#endif + +// SER_HAL_TRANSPORT_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SER_HAL_TRANSPORT_CONFIG_INFO_COLOR +#define SER_HAL_TRANSPORT_CONFIG_INFO_COLOR 0 +#endif + +// SER_HAL_TRANSPORT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SER_HAL_TRANSPORT_CONFIG_DEBUG_COLOR +#define SER_HAL_TRANSPORT_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// //========================================================== -// +// //========================================================== -// +// //========================================================== -// +// //========================================================== -// nRF_NFC +// nRF_NFC //========================================================== -// NFC_BLE_OOB_ADVDATA_ENABLED - nfc_ble_oob_advdata - Encoding the advertising data and/or scan response data which is specific for OOB pairing +// NFC_AC_REC_ENABLED - nfc_ac_rec - NFC NDEF Alternative Carrier record encoder + + +#ifndef NFC_AC_REC_ENABLED +#define NFC_AC_REC_ENABLED 0 +#endif + +// NFC_AC_REC_PARSER_ENABLED - nfc_ac_rec_parser - Alternative Carrier record parser + + +#ifndef NFC_AC_REC_PARSER_ENABLED +#define NFC_AC_REC_PARSER_ENABLED 0 +#endif + +// NFC_BLE_OOB_ADVDATA_ENABLED - nfc_ble_oob_advdata - AD data for OOB pairing encoder //========================================================== #ifndef NFC_BLE_OOB_ADVDATA_ENABLED #define NFC_BLE_OOB_ADVDATA_ENABLED 0 #endif // ADVANCED_ADVDATA_SUPPORT - Non-mandatory AD types for BLE OOB pairing are encoded inside the NDEF message (e.g. service UUIDs) - -// <1=> Enabled -// <0=> Disabled + +// <1=> Enabled +// <0=> Disabled #ifndef ADVANCED_ADVDATA_SUPPORT #define ADVANCED_ADVDATA_SUPPORT 0 @@ -6479,6 +9577,13 @@ // +// NFC_BLE_OOB_ADVDATA_PARSER_ENABLED - nfc_ble_oob_advdata_parser - BLE OOB pairing AD data parser + + +#ifndef NFC_BLE_OOB_ADVDATA_PARSER_ENABLED +#define NFC_BLE_OOB_ADVDATA_PARSER_ENABLED 0 +#endif + // NFC_BLE_PAIR_LIB_ENABLED - nfc_ble_pair_lib - Library parameters //========================================================== #ifndef NFC_BLE_PAIR_LIB_ENABLED @@ -6490,44 +9595,44 @@ #define NFC_BLE_PAIR_LIB_LOG_ENABLED 0 #endif // NFC_BLE_PAIR_LIB_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NFC_BLE_PAIR_LIB_LOG_LEVEL #define NFC_BLE_PAIR_LIB_LOG_LEVEL 3 #endif // NFC_BLE_PAIR_LIB_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NFC_BLE_PAIR_LIB_INFO_COLOR #define NFC_BLE_PAIR_LIB_INFO_COLOR 0 #endif // NFC_BLE_PAIR_LIB_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NFC_BLE_PAIR_LIB_DEBUG_COLOR #define NFC_BLE_PAIR_LIB_DEBUG_COLOR 0 @@ -6546,129 +9651,129 @@ #define BLE_NFC_SEC_PARAM_BOND 1 #endif // BLE_NFC_SEC_PARAM_KDIST_OWN_ENC - Enables Long Term Key and Master Identification distribution by device. - + #ifndef BLE_NFC_SEC_PARAM_KDIST_OWN_ENC #define BLE_NFC_SEC_PARAM_KDIST_OWN_ENC 1 #endif // BLE_NFC_SEC_PARAM_KDIST_OWN_ID - Enables Identity Resolving Key and Identity Address Information distribution by device. - + #ifndef BLE_NFC_SEC_PARAM_KDIST_OWN_ID #define BLE_NFC_SEC_PARAM_KDIST_OWN_ID 1 #endif // BLE_NFC_SEC_PARAM_KDIST_PEER_ENC - Enables Long Term Key and Master Identification distribution by peer. - + #ifndef BLE_NFC_SEC_PARAM_KDIST_PEER_ENC #define BLE_NFC_SEC_PARAM_KDIST_PEER_ENC 1 #endif // BLE_NFC_SEC_PARAM_KDIST_PEER_ID - Enables Identity Resolving Key and Identity Address Information distribution by peer. - + #ifndef BLE_NFC_SEC_PARAM_KDIST_PEER_ID #define BLE_NFC_SEC_PARAM_KDIST_PEER_ID 1 #endif -// BLE_NFC_SEC_PARAM_KDIST_OWN_ENC - Enables Long Term Key and Master Identification distribution by device. +// +// BLE_NFC_SEC_PARAM_MIN_KEY_SIZE - Minimal size of a security key. + +// <7=> 7 +// <8=> 8 +// <9=> 9 +// <10=> 10 +// <11=> 11 +// <12=> 12 +// <13=> 13 +// <14=> 14 +// <15=> 15 +// <16=> 16 -#ifndef BLE_NFC_SEC_PARAM_KDIST_OWN_ENC -#define BLE_NFC_SEC_PARAM_KDIST_OWN_ENC 1 +#ifndef BLE_NFC_SEC_PARAM_MIN_KEY_SIZE +#define BLE_NFC_SEC_PARAM_MIN_KEY_SIZE 7 #endif -// BLE_NFC_SEC_PARAM_KDIST_OWN_ID - Enables Identity Resolving Key and Identity Address Information distribution by device. - +// BLE_NFC_SEC_PARAM_MAX_KEY_SIZE - Maximal size of a security key. + +// <7=> 7 +// <8=> 8 +// <9=> 9 +// <10=> 10 +// <11=> 11 +// <12=> 12 +// <13=> 13 +// <14=> 14 +// <15=> 15 +// <16=> 16 -#ifndef BLE_NFC_SEC_PARAM_KDIST_OWN_ID -#define BLE_NFC_SEC_PARAM_KDIST_OWN_ID 1 +#ifndef BLE_NFC_SEC_PARAM_MAX_KEY_SIZE +#define BLE_NFC_SEC_PARAM_MAX_KEY_SIZE 16 #endif -// BLE_NFC_SEC_PARAM_KDIST_PEER_ENC - Enables Long Term Key and Master Identification distribution by peer. - - -#ifndef BLE_NFC_SEC_PARAM_KDIST_PEER_ENC -#define BLE_NFC_SEC_PARAM_KDIST_PEER_ENC 1 -#endif +// +//========================================================== -// BLE_NFC_SEC_PARAM_KDIST_PEER_ID - Enables Identity Resolving Key and Identity Address Information distribution by peer. +// +// NFC_BLE_PAIR_MSG_ENABLED - nfc_ble_pair_msg - NDEF message for OOB pairing encoder + -#ifndef BLE_NFC_SEC_PARAM_KDIST_PEER_ID -#define BLE_NFC_SEC_PARAM_KDIST_PEER_ID 1 +#ifndef NFC_BLE_PAIR_MSG_ENABLED +#define NFC_BLE_PAIR_MSG_ENABLED 0 #endif -// BLE_NFC_SEC_PARAM_KDIST_OWN_ENC - Enables Long Term Key and Master Identification distribution by device. - +// NFC_CH_COMMON_ENABLED - nfc_ble_pair_common - OOB pairing common data + -#ifndef BLE_NFC_SEC_PARAM_KDIST_OWN_ENC -#define BLE_NFC_SEC_PARAM_KDIST_OWN_ENC 1 +#ifndef NFC_CH_COMMON_ENABLED +#define NFC_CH_COMMON_ENABLED 0 #endif -// BLE_NFC_SEC_PARAM_KDIST_OWN_ID - Enables Identity Resolving Key and Identity Address Information distribution by device. - +// NFC_EP_OOB_REC_ENABLED - nfc_ep_oob_rec - EP record for BLE pairing encoder + -#ifndef BLE_NFC_SEC_PARAM_KDIST_OWN_ID -#define BLE_NFC_SEC_PARAM_KDIST_OWN_ID 1 +#ifndef NFC_EP_OOB_REC_ENABLED +#define NFC_EP_OOB_REC_ENABLED 0 #endif -// BLE_NFC_SEC_PARAM_KDIST_PEER_ENC - Enables Long Term Key and Master Identification distribution by peer. - +// NFC_HS_REC_ENABLED - nfc_hs_rec - Handover Select NDEF record encoder + -#ifndef BLE_NFC_SEC_PARAM_KDIST_PEER_ENC -#define BLE_NFC_SEC_PARAM_KDIST_PEER_ENC 1 +#ifndef NFC_HS_REC_ENABLED +#define NFC_HS_REC_ENABLED 0 #endif -// BLE_NFC_SEC_PARAM_KDIST_PEER_ID - Enables Identity Resolving Key and Identity Address Information distribution by peer. - +// NFC_LE_OOB_REC_ENABLED - nfc_le_oob_rec - LE record for BLE pairing encoder + -#ifndef BLE_NFC_SEC_PARAM_KDIST_PEER_ID -#define BLE_NFC_SEC_PARAM_KDIST_PEER_ID 1 +#ifndef NFC_LE_OOB_REC_ENABLED +#define NFC_LE_OOB_REC_ENABLED 0 #endif -// - -// BLE_NFC_SEC_PARAM_MIN_KEY_SIZE - Minimal size of a security key. - -// <7=> 7 -// <8=> 8 -// <9=> 9 -// <10=> 10 -// <11=> 11 -// <12=> 12 -// <13=> 13 -// <14=> 14 -// <15=> 15 -// <16=> 16 +// NFC_LE_OOB_REC_PARSER_ENABLED - nfc_le_oob_rec_parser - LE record parser + -#ifndef BLE_NFC_SEC_PARAM_MIN_KEY_SIZE -#define BLE_NFC_SEC_PARAM_MIN_KEY_SIZE 7 +#ifndef NFC_LE_OOB_REC_PARSER_ENABLED +#define NFC_LE_OOB_REC_PARSER_ENABLED 0 #endif -// BLE_NFC_SEC_PARAM_MAX_KEY_SIZE - Maximal size of a security key. - -// <7=> 7 -// <8=> 8 -// <9=> 9 -// <10=> 10 -// <11=> 11 -// <12=> 12 -// <13=> 13 -// <14=> 14 -// <15=> 15 -// <16=> 16 +// NFC_NDEF_LAUNCHAPP_MSG_ENABLED - nfc_launchapp_msg - Encoding data for NDEF Application Launching message for NFC Tag + -#ifndef BLE_NFC_SEC_PARAM_MAX_KEY_SIZE -#define BLE_NFC_SEC_PARAM_MAX_KEY_SIZE 16 +#ifndef NFC_NDEF_LAUNCHAPP_MSG_ENABLED +#define NFC_NDEF_LAUNCHAPP_MSG_ENABLED 0 #endif -// -//========================================================== +// NFC_NDEF_LAUNCHAPP_REC_ENABLED - nfc_launchapp_rec - Encoding data for NDEF Application Launching record for NFC Tag + -// +#ifndef NFC_NDEF_LAUNCHAPP_REC_ENABLED +#define NFC_NDEF_LAUNCHAPP_REC_ENABLED 0 +#endif // NFC_NDEF_MSG_ENABLED - nfc_ndef_msg - NFC NDEF Message generator module //========================================================== @@ -6676,9 +9781,9 @@ #define NFC_NDEF_MSG_ENABLED 0 #endif // NFC_NDEF_MSG_TAG_TYPE - NFC Tag Type - -// <2=> Type 2 Tag -// <4=> Type 4 Tag + +// <2=> Type 2 Tag +// <4=> Type 4 Tag #ifndef NFC_NDEF_MSG_TAG_TYPE #define NFC_NDEF_MSG_TAG_TYPE 2 @@ -6697,28 +9802,28 @@ #define NFC_NDEF_MSG_PARSER_LOG_ENABLED 0 #endif // NFC_NDEF_MSG_PARSER_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NFC_NDEF_MSG_PARSER_LOG_LEVEL #define NFC_NDEF_MSG_PARSER_LOG_LEVEL 3 #endif // NFC_NDEF_MSG_PARSER_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NFC_NDEF_MSG_PARSER_INFO_COLOR #define NFC_NDEF_MSG_PARSER_INFO_COLOR 0 @@ -6728,6 +9833,13 @@ // +// NFC_NDEF_RECORD_ENABLED - nfc_ndef_record - NFC NDEF Record generator module + + +#ifndef NFC_NDEF_RECORD_ENABLED +#define NFC_NDEF_RECORD_ENABLED 0 +#endif + // NFC_NDEF_RECORD_PARSER_ENABLED - nfc_ndef_record_parser - NFC NDEF Record parser module //========================================================== #ifndef NFC_NDEF_RECORD_PARSER_ENABLED @@ -6739,28 +9851,28 @@ #define NFC_NDEF_RECORD_PARSER_LOG_ENABLED 0 #endif // NFC_NDEF_RECORD_PARSER_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NFC_NDEF_RECORD_PARSER_LOG_LEVEL #define NFC_NDEF_RECORD_PARSER_LOG_LEVEL 3 #endif // NFC_NDEF_RECORD_PARSER_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NFC_NDEF_RECORD_PARSER_INFO_COLOR #define NFC_NDEF_RECORD_PARSER_INFO_COLOR 0 @@ -6770,23 +9882,44 @@ // +// NFC_NDEF_TEXT_RECORD_ENABLED - nfc_text_rec - Encoding data for a text record for NFC Tag + + +#ifndef NFC_NDEF_TEXT_RECORD_ENABLED +#define NFC_NDEF_TEXT_RECORD_ENABLED 0 +#endif + +// NFC_NDEF_URI_MSG_ENABLED - nfc_uri_msg - Encoding data for NDEF message with URI record for NFC Tag + + +#ifndef NFC_NDEF_URI_MSG_ENABLED +#define NFC_NDEF_URI_MSG_ENABLED 0 +#endif + +// NFC_NDEF_URI_REC_ENABLED - nfc_uri_rec - Encoding data for a URI record for NFC Tag + + +#ifndef NFC_NDEF_URI_REC_ENABLED +#define NFC_NDEF_URI_REC_ENABLED 0 +#endif + // NFC_T2T_HAL_ENABLED - nfc_t2t_hal - Hardware Abstraction Layer for NFC library. //========================================================== #ifndef NFC_T2T_HAL_ENABLED #define NFC_T2T_HAL_ENABLED 0 #endif // NFCT_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef NFCT_CONFIG_IRQ_PRIORITY #define NFCT_CONFIG_IRQ_PRIORITY 7 @@ -6798,88 +9931,88 @@ #define HAL_NFC_CONFIG_LOG_ENABLED 0 #endif // HAL_NFC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef HAL_NFC_CONFIG_LOG_LEVEL #define HAL_NFC_CONFIG_LOG_LEVEL 3 #endif // HAL_NFC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef HAL_NFC_CONFIG_INFO_COLOR #define HAL_NFC_CONFIG_INFO_COLOR 0 #endif // HAL_NFC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef HAL_NFC_CONFIG_DEBUG_COLOR #define HAL_NFC_CONFIG_DEBUG_COLOR 0 #endif // HAL_NFC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef HAL_NFC_CONFIG_LOG_LEVEL #define HAL_NFC_CONFIG_LOG_LEVEL 3 #endif // HAL_NFC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef HAL_NFC_CONFIG_INFO_COLOR #define HAL_NFC_CONFIG_INFO_COLOR 0 #endif // HAL_NFC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef HAL_NFC_CONFIG_DEBUG_COLOR #define HAL_NFC_CONFIG_DEBUG_COLOR 0 @@ -6893,560 +10026,560 @@ #define HAL_NFC_CONFIG_DEBUG_PIN_ENABLED 0 #endif // HAL_NFC_HCLOCK_ON_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_HCLOCK_ON_DEBUG_PIN #define HAL_NFC_HCLOCK_ON_DEBUG_PIN 11 #endif // HAL_NFC_HCLOCK_OFF_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_HCLOCK_OFF_DEBUG_PIN #define HAL_NFC_HCLOCK_OFF_DEBUG_PIN 12 #endif // HAL_NFC_NFC_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_NFC_EVENT_DEBUG_PIN #define HAL_NFC_NFC_EVENT_DEBUG_PIN 24 #endif // HAL_NFC_DETECT_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_DETECT_EVENT_DEBUG_PIN #define HAL_NFC_DETECT_EVENT_DEBUG_PIN 25 #endif // HAL_NFC_TIMER4_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_TIMER4_EVENT_DEBUG_PIN #define HAL_NFC_TIMER4_EVENT_DEBUG_PIN 28 #endif // HAL_NFC_HCLOCK_ON_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_HCLOCK_ON_DEBUG_PIN #define HAL_NFC_HCLOCK_ON_DEBUG_PIN 31 #endif // HAL_NFC_HCLOCK_OFF_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_HCLOCK_OFF_DEBUG_PIN #define HAL_NFC_HCLOCK_OFF_DEBUG_PIN 31 #endif // HAL_NFC_NFC_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_NFC_EVENT_DEBUG_PIN #define HAL_NFC_NFC_EVENT_DEBUG_PIN 31 #endif // HAL_NFC_DETECT_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_DETECT_EVENT_DEBUG_PIN #define HAL_NFC_DETECT_EVENT_DEBUG_PIN 31 #endif // HAL_NFC_TIMER4_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_TIMER4_EVENT_DEBUG_PIN #define HAL_NFC_TIMER4_EVENT_DEBUG_PIN 31 @@ -7456,23 +10589,149 @@ // +// NFC_T2T_PARSER_ENABLED - nfc_type_2_tag_parser - Parser for decoding Type 2 Tag data +//========================================================== +#ifndef NFC_T2T_PARSER_ENABLED +#define NFC_T2T_PARSER_ENABLED 0 +#endif +// NFC_T2T_PARSER_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NFC_T2T_PARSER_LOG_ENABLED +#define NFC_T2T_PARSER_LOG_ENABLED 0 +#endif +// NFC_T2T_PARSER_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NFC_T2T_PARSER_LOG_LEVEL +#define NFC_T2T_PARSER_LOG_LEVEL 3 +#endif + +// NFC_T2T_PARSER_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NFC_T2T_PARSER_INFO_COLOR +#define NFC_T2T_PARSER_INFO_COLOR 0 +#endif + +// + +// + +// NFC_T4T_APDU_ENABLED - nfc_t4t_apdu - APDU encoder/decoder for Type 4 Tag +//========================================================== +#ifndef NFC_T4T_APDU_ENABLED +#define NFC_T4T_APDU_ENABLED 0 +#endif +// NFC_T4T_APDU_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NFC_T4T_APDU_LOG_ENABLED +#define NFC_T4T_APDU_LOG_ENABLED 0 +#endif +// NFC_T4T_APDU_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NFC_T4T_APDU_LOG_LEVEL +#define NFC_T4T_APDU_LOG_LEVEL 3 +#endif + +// NFC_T4T_APDU_LOG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NFC_T4T_APDU_LOG_COLOR +#define NFC_T4T_APDU_LOG_COLOR 0 +#endif + +// + +// + +// NFC_T4T_CC_FILE_PARSER_ENABLED - nfc_t4t_cc_file - Capability Container file for Type 4 Tag +//========================================================== +#ifndef NFC_T4T_CC_FILE_PARSER_ENABLED +#define NFC_T4T_CC_FILE_PARSER_ENABLED 0 +#endif +// NFC_T4T_CC_FILE_PARSER_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NFC_T4T_CC_FILE_PARSER_LOG_ENABLED +#define NFC_T4T_CC_FILE_PARSER_LOG_ENABLED 0 +#endif +// NFC_T4T_CC_FILE_PARSER_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NFC_T4T_CC_FILE_PARSER_LOG_LEVEL +#define NFC_T4T_CC_FILE_PARSER_LOG_LEVEL 3 +#endif + +// NFC_T4T_CC_FILE_PARSER_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NFC_T4T_CC_FILE_PARSER_INFO_COLOR +#define NFC_T4T_CC_FILE_PARSER_INFO_COLOR 0 +#endif + +// + +// + // NFC_T4T_HAL_ENABLED - nfc_t4t_hal - Hardware Abstraction Layer for NFC library. //========================================================== #ifndef NFC_T4T_HAL_ENABLED #define NFC_T4T_HAL_ENABLED 0 #endif // NFCT_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef NFCT_CONFIG_IRQ_PRIORITY #define NFCT_CONFIG_IRQ_PRIORITY 7 @@ -7484,88 +10743,88 @@ #define HAL_NFC_CONFIG_LOG_ENABLED 0 #endif // HAL_NFC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef HAL_NFC_CONFIG_LOG_LEVEL #define HAL_NFC_CONFIG_LOG_LEVEL 3 #endif // HAL_NFC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef HAL_NFC_CONFIG_INFO_COLOR #define HAL_NFC_CONFIG_INFO_COLOR 0 #endif // HAL_NFC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef HAL_NFC_CONFIG_DEBUG_COLOR #define HAL_NFC_CONFIG_DEBUG_COLOR 0 #endif // HAL_NFC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef HAL_NFC_CONFIG_LOG_LEVEL #define HAL_NFC_CONFIG_LOG_LEVEL 3 #endif // HAL_NFC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef HAL_NFC_CONFIG_INFO_COLOR #define HAL_NFC_CONFIG_INFO_COLOR 0 #endif // HAL_NFC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef HAL_NFC_CONFIG_DEBUG_COLOR #define HAL_NFC_CONFIG_DEBUG_COLOR 0 @@ -7579,560 +10838,560 @@ #define HAL_NFC_CONFIG_DEBUG_PIN_ENABLED 0 #endif // HAL_NFC_HCLOCK_ON_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_HCLOCK_ON_DEBUG_PIN #define HAL_NFC_HCLOCK_ON_DEBUG_PIN 31 #endif // HAL_NFC_HCLOCK_OFF_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_HCLOCK_OFF_DEBUG_PIN #define HAL_NFC_HCLOCK_OFF_DEBUG_PIN 31 #endif // HAL_NFC_NFC_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_NFC_EVENT_DEBUG_PIN #define HAL_NFC_NFC_EVENT_DEBUG_PIN 31 #endif // HAL_NFC_DETECT_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_DETECT_EVENT_DEBUG_PIN #define HAL_NFC_DETECT_EVENT_DEBUG_PIN 31 #endif // HAL_NFC_TIMER4_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_TIMER4_EVENT_DEBUG_PIN #define HAL_NFC_TIMER4_EVENT_DEBUG_PIN 31 #endif // HAL_NFC_HCLOCK_ON_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_HCLOCK_ON_DEBUG_PIN #define HAL_NFC_HCLOCK_ON_DEBUG_PIN 31 #endif // HAL_NFC_HCLOCK_OFF_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_HCLOCK_OFF_DEBUG_PIN #define HAL_NFC_HCLOCK_OFF_DEBUG_PIN 31 #endif // HAL_NFC_NFC_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_NFC_EVENT_DEBUG_PIN #define HAL_NFC_NFC_EVENT_DEBUG_PIN 31 #endif // HAL_NFC_DETECT_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_DETECT_EVENT_DEBUG_PIN #define HAL_NFC_DETECT_EVENT_DEBUG_PIN 31 #endif // HAL_NFC_TIMER4_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_TIMER4_EVENT_DEBUG_PIN #define HAL_NFC_TIMER4_EVENT_DEBUG_PIN 31 @@ -8142,510 +11401,491 @@ // -// -//========================================================== - -// nRF_Segger_RTT - +// NFC_T4T_HL_DETECTION_PROCEDURES_ENABLED - nfc_t4t_hl_detection_procedures - NDEF Detection Procedure for Type 4 Tag //========================================================== -// segger_rtt - SEGGER RTT - +#ifndef NFC_T4T_HL_DETECTION_PROCEDURES_ENABLED +#define NFC_T4T_HL_DETECTION_PROCEDURES_ENABLED 0 +#endif +// NFC_T4T_HL_DETECTION_PROCEDURES_LOG_ENABLED - Enables logging in the module. //========================================================== -// SEGGER_RTT_CONFIG_BUFFER_SIZE_UP - Size of upstream buffer. -// Note that either @ref NRF_LOG_BACKEND_RTT_OUTPUT_BUFFER_SIZE -// or this value is actually used. It depends on which one is bigger. - -#ifndef SEGGER_RTT_CONFIG_BUFFER_SIZE_UP -#define SEGGER_RTT_CONFIG_BUFFER_SIZE_UP 512 +#ifndef NFC_T4T_HL_DETECTION_PROCEDURES_LOG_ENABLED +#define NFC_T4T_HL_DETECTION_PROCEDURES_LOG_ENABLED 0 #endif +// NFC_T4T_HL_DETECTION_PROCEDURES_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -// SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS - Size of upstream buffer. -#ifndef SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS -#define SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS 2 +#ifndef NFC_T4T_HL_DETECTION_PROCEDURES_LOG_LEVEL +#define NFC_T4T_HL_DETECTION_PROCEDURES_LOG_LEVEL 3 #endif -// SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN - Size of upstream buffer. -#ifndef SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN -#define SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN 16 -#endif +// NFC_T4T_HL_DETECTION_PROCEDURES_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS - Size of upstream buffer. -#ifndef SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS -#define SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS 2 +#ifndef NFC_T4T_HL_DETECTION_PROCEDURES_INFO_COLOR +#define NFC_T4T_HL_DETECTION_PROCEDURES_INFO_COLOR 0 #endif -// SEGGER_RTT_CONFIG_DEFAULT_MODE - RTT behavior if the buffer is full. - - -// The following modes are supported: -// - SKIP - Do not block, output nothing. -// - TRIM - Do not block, output as much as fits. -// - BLOCK - Wait until there is space in the buffer. -// <0=> SKIP -// <1=> TRIM -// <2=> BLOCK_IF_FIFO_FULL +// -#ifndef SEGGER_RTT_CONFIG_DEFAULT_MODE -#define SEGGER_RTT_CONFIG_DEFAULT_MODE 0 +// APDU_BUFF_SIZE - Size (in bytes) of the buffer for APDU storage +#ifndef APDU_BUFF_SIZE +#define APDU_BUFF_SIZE 250 #endif -// -//========================================================== - -// -//========================================================== +// CC_STORAGE_BUFF_SIZE - Size (in bytes) of the buffer for CC file storage +#ifndef CC_STORAGE_BUFF_SIZE +#define CC_STORAGE_BUFF_SIZE 64 +#endif -// nRF_SoftDevice +// +// NFC_T4T_TLV_BLOCK_PARSER_ENABLED - nfc_t4t_tlv_block - TLV block for Type 4 Tag //========================================================== -// NRF_SDH_ANT_ENABLED - nrf_sdh_ant - SoftDevice ANT event handler -//========================================================== -#ifndef NRF_SDH_ANT_ENABLED -#define NRF_SDH_ANT_ENABLED 0 +#ifndef NFC_T4T_TLV_BLOCK_PARSER_ENABLED +#define NFC_T4T_TLV_BLOCK_PARSER_ENABLED 0 #endif -// ANT Channels - +// NFC_T4T_TLV_BLOCK_PARSER_LOG_ENABLED - Enables logging in the module. //========================================================== -// NRF_SDH_ANT_TOTAL_CHANNELS_ALLOCATED - Allocated ANT channels. -#ifndef NRF_SDH_ANT_TOTAL_CHANNELS_ALLOCATED -#define NRF_SDH_ANT_TOTAL_CHANNELS_ALLOCATED 0 +#ifndef NFC_T4T_TLV_BLOCK_PARSER_LOG_ENABLED +#define NFC_T4T_TLV_BLOCK_PARSER_LOG_ENABLED 0 #endif +// NFC_T4T_TLV_BLOCK_PARSER_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -// NRF_SDH_ANT_ENCRYPTED_CHANNELS - Encrypted ANT channels. -#ifndef NRF_SDH_ANT_ENCRYPTED_CHANNELS -#define NRF_SDH_ANT_ENCRYPTED_CHANNELS 0 +#ifndef NFC_T4T_TLV_BLOCK_PARSER_LOG_LEVEL +#define NFC_T4T_TLV_BLOCK_PARSER_LOG_LEVEL 3 #endif -// -//========================================================== - -// ANT Queues +// NFC_T4T_TLV_BLOCK_PARSER_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -//========================================================== -// NRF_SDH_ANT_EVENT_QUEUE_SIZE - Event queue size. -#ifndef NRF_SDH_ANT_EVENT_QUEUE_SIZE -#define NRF_SDH_ANT_EVENT_QUEUE_SIZE 32 -#endif - -// NRF_SDH_ANT_BURST_QUEUE_SIZE - ANT burst queue size. -#ifndef NRF_SDH_ANT_BURST_QUEUE_SIZE -#define NRF_SDH_ANT_BURST_QUEUE_SIZE 128 +#ifndef NFC_T4T_TLV_BLOCK_PARSER_INFO_COLOR +#define NFC_T4T_TLV_BLOCK_PARSER_INFO_COLOR 0 #endif -// -//========================================================== +// -// ANT Observers - Observers and priority levels +// +// //========================================================== -// NRF_SDH_ANT_OBSERVER_PRIO_LEVELS - Total number of priority levels for ANT observers. -// This setting configures the number of priority levels available for the ANT event handlers. -// The priority level of a handler determines the order in which it receives events, with respect to other handlers. - -#ifndef NRF_SDH_ANT_OBSERVER_PRIO_LEVELS -#define NRF_SDH_ANT_OBSERVER_PRIO_LEVELS 2 -#endif -// ANT Observers priorities - Invididual priorities +// nRF_SoftDevice //========================================================== -// ANT_BPWR_ANT_OBSERVER_PRIO -// Priority with which ANT events are dispatched to the Bicycle Power Profile. - -#ifndef ANT_BPWR_ANT_OBSERVER_PRIO -#define ANT_BPWR_ANT_OBSERVER_PRIO 1 -#endif - -// ANT_BSC_ANT_OBSERVER_PRIO -// Priority with which ANT events are dispatched to the Bicycle Speed and Cadence Profile. - -#ifndef ANT_BSC_ANT_OBSERVER_PRIO -#define ANT_BSC_ANT_OBSERVER_PRIO 1 -#endif - -// ANT_ENCRYPT_ANT_OBSERVER_PRIO -// Priority with which ANT events are dispatched to the Cryptographic ANT stack configuration module. - -#ifndef ANT_ENCRYPT_ANT_OBSERVER_PRIO -#define ANT_ENCRYPT_ANT_OBSERVER_PRIO 1 -#endif - -// ANT_HRM_ANT_OBSERVER_PRIO -// Priority with which ANT events are dispatched to the Heart Rate Monitor. - -#ifndef ANT_HRM_ANT_OBSERVER_PRIO -#define ANT_HRM_ANT_OBSERVER_PRIO 1 -#endif - -// ANT_SDM_ANT_OBSERVER_PRIO -// Priority with which ANT events are dispatched to the Stride Based Speed and Distance Monitor Profile. - -#ifndef ANT_SDM_ANT_OBSERVER_PRIO -#define ANT_SDM_ANT_OBSERVER_PRIO 1 -#endif - -// ANT_STATE_INDICATOR_ANT_OBSERVER_PRIO -// Priority with which ANT events are dispatched to the ANT state indicator module. - -#ifndef ANT_STATE_INDICATOR_ANT_OBSERVER_PRIO -#define ANT_STATE_INDICATOR_ANT_OBSERVER_PRIO 1 -#endif - -// BSP_BTN_ANT_OBSERVER_PRIO -// Priority with which ANT events are dispatched to the Button Control module. - -#ifndef BSP_BTN_ANT_OBSERVER_PRIO -#define BSP_BTN_ANT_OBSERVER_PRIO 1 -#endif - -// +// NRF_SDH_BLE_ENABLED - nrf_sdh_ble - SoftDevice BLE event handler //========================================================== +#ifndef NRF_SDH_BLE_ENABLED +#define NRF_SDH_BLE_ENABLED 0 +#endif +// BLE Stack configuration - Stack configuration parameters -// +// The SoftDevice handler will configure the stack with these parameters when calling @ref nrf_sdh_ble_default_cfg_set. +// Other libraries might depend on these values; keep them up-to-date even if you are not explicitely calling @ref nrf_sdh_ble_default_cfg_set. //========================================================== +// NRF_SDH_BLE_GAP_DATA_LENGTH <27-251> -// +// Requested BLE GAP data length to be negotiated. -// NRF_SDH_BLE_ENABLED - nrf_sdh_ble - SoftDevice BLE event handler -//========================================================== -#ifndef NRF_SDH_BLE_ENABLED -#define NRF_SDH_BLE_ENABLED 1 +#ifndef NRF_SDH_BLE_GAP_DATA_LENGTH +#define NRF_SDH_BLE_GAP_DATA_LENGTH 27 #endif -// BLE Stack configuration - Stack configuration parameters -// These values are not used directly by the SoftDevice handler but the application or other libraries might depend on them. -// Keep them up-to-date with the desired configuration. -//========================================================== -// NRF_SDH_BLE_PERIPHERAL_LINK_COUNT - Maximum number of peripheral links. +// NRF_SDH_BLE_PERIPHERAL_LINK_COUNT - Maximum number of peripheral links. #ifndef NRF_SDH_BLE_PERIPHERAL_LINK_COUNT #define NRF_SDH_BLE_PERIPHERAL_LINK_COUNT 0 #endif -// NRF_SDH_BLE_CENTRAL_LINK_COUNT - Maximum number of central links. +// NRF_SDH_BLE_CENTRAL_LINK_COUNT - Maximum number of central links. #ifndef NRF_SDH_BLE_CENTRAL_LINK_COUNT #define NRF_SDH_BLE_CENTRAL_LINK_COUNT 0 #endif -// NRF_SDH_BLE_TOTAL_LINK_COUNT - Maximum number of total concurrent connections using the default configuration. +// NRF_SDH_BLE_TOTAL_LINK_COUNT - Total link count. +// Maximum number of total concurrent connections using the default configuration. + #ifndef NRF_SDH_BLE_TOTAL_LINK_COUNT #define NRF_SDH_BLE_TOTAL_LINK_COUNT 1 #endif -// NRF_SDH_BLE_GAP_EVENT_LENGTH - The time set aside for this connection on every connection interval in 1.25 ms units. +// NRF_SDH_BLE_GAP_EVENT_LENGTH - GAP event length. +// The time set aside for this connection on every connection interval in 1.25 ms units. + #ifndef NRF_SDH_BLE_GAP_EVENT_LENGTH -#define NRF_SDH_BLE_GAP_EVENT_LENGTH 3 +#define NRF_SDH_BLE_GAP_EVENT_LENGTH 6 #endif -// NRF_SDH_BLE_GATT_MAX_MTU_SIZE - Static maximum MTU size. +// NRF_SDH_BLE_GATT_MAX_MTU_SIZE - Static maximum MTU size. #ifndef NRF_SDH_BLE_GATT_MAX_MTU_SIZE #define NRF_SDH_BLE_GATT_MAX_MTU_SIZE 23 #endif -// NRF_SDH_BLE_GATTS_ATTR_TAB_SIZE - Attribute Table size in bytes. The size must be a multiple of 4. +// NRF_SDH_BLE_GATTS_ATTR_TAB_SIZE - Attribute Table size in bytes. The size must be a multiple of 4. #ifndef NRF_SDH_BLE_GATTS_ATTR_TAB_SIZE #define NRF_SDH_BLE_GATTS_ATTR_TAB_SIZE 1408 #endif -// NRF_SDH_BLE_VS_UUID_COUNT - The number of vendor-specific UUIDs. +// NRF_SDH_BLE_VS_UUID_COUNT - The number of vendor-specific UUIDs. #ifndef NRF_SDH_BLE_VS_UUID_COUNT #define NRF_SDH_BLE_VS_UUID_COUNT 0 #endif // NRF_SDH_BLE_SERVICE_CHANGED - Include the Service Changed characteristic in the Attribute Table. - + #ifndef NRF_SDH_BLE_SERVICE_CHANGED #define NRF_SDH_BLE_SERVICE_CHANGED 0 #endif -// +// //========================================================== // BLE Observers - Observers and priority levels //========================================================== -// NRF_SDH_BLE_OBSERVER_PRIO_LEVELS - Total number of priority levels for BLE observers. +// NRF_SDH_BLE_OBSERVER_PRIO_LEVELS - Total number of priority levels for BLE observers. // This setting configures the number of priority levels available for BLE event handlers. // The priority level of a handler determines the order in which it receives events, with respect to other handlers. #ifndef NRF_SDH_BLE_OBSERVER_PRIO_LEVELS -#define NRF_SDH_BLE_OBSERVER_PRIO_LEVELS 3 +#define NRF_SDH_BLE_OBSERVER_PRIO_LEVELS 4 #endif // BLE Observers priorities - Invididual priorities //========================================================== -// BLE_ADV_BLE_OBSERVER_PRIO +// BLE_ADV_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Advertising module. #ifndef BLE_ADV_BLE_OBSERVER_PRIO -#define BLE_ADV_BLE_OBSERVER_PRIO 2 +#define BLE_ADV_BLE_OBSERVER_PRIO 1 #endif -// BLE_ANCS_C_BLE_OBSERVER_PRIO +// BLE_ANCS_C_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Apple Notification Service Client. #ifndef BLE_ANCS_C_BLE_OBSERVER_PRIO #define BLE_ANCS_C_BLE_OBSERVER_PRIO 2 #endif -// BLE_ANS_C_BLE_OBSERVER_PRIO +// BLE_ANS_C_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Alert Notification Service Client. #ifndef BLE_ANS_C_BLE_OBSERVER_PRIO #define BLE_ANS_C_BLE_OBSERVER_PRIO 2 #endif -// BLE_BAS_BLE_OBSERVER_PRIO +// BLE_BAS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Battery Service. #ifndef BLE_BAS_BLE_OBSERVER_PRIO #define BLE_BAS_BLE_OBSERVER_PRIO 2 #endif -// BLE_BAS_C_BLE_OBSERVER_PRIO +// BLE_BAS_C_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Battery Service Client. #ifndef BLE_BAS_C_BLE_OBSERVER_PRIO #define BLE_BAS_C_BLE_OBSERVER_PRIO 2 #endif -// BLE_BPS_BLE_OBSERVER_PRIO +// BLE_BPS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Blood Pressure Service. #ifndef BLE_BPS_BLE_OBSERVER_PRIO #define BLE_BPS_BLE_OBSERVER_PRIO 2 #endif -// BLE_CONN_PARAMS_BLE_OBSERVER_PRIO +// BLE_CONN_PARAMS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Connection parameters module. #ifndef BLE_CONN_PARAMS_BLE_OBSERVER_PRIO -#define BLE_CONN_PARAMS_BLE_OBSERVER_PRIO 2 +#define BLE_CONN_PARAMS_BLE_OBSERVER_PRIO 1 #endif -// BLE_CONN_STATE_BLE_OBSERVER_PRIO +// BLE_CONN_STATE_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Connection State module. #ifndef BLE_CONN_STATE_BLE_OBSERVER_PRIO #define BLE_CONN_STATE_BLE_OBSERVER_PRIO 0 #endif -// BLE_CSCS_BLE_OBSERVER_PRIO +// BLE_CSCS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Cycling Speed and Cadence Service. #ifndef BLE_CSCS_BLE_OBSERVER_PRIO #define BLE_CSCS_BLE_OBSERVER_PRIO 2 #endif -// BLE_CTS_C_BLE_OBSERVER_PRIO +// BLE_CTS_C_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Current Time Service Client. #ifndef BLE_CTS_C_BLE_OBSERVER_PRIO #define BLE_CTS_C_BLE_OBSERVER_PRIO 2 #endif -// BLE_DB_DISC_BLE_OBSERVER_PRIO +// BLE_DB_DISC_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Database Discovery module. #ifndef BLE_DB_DISC_BLE_OBSERVER_PRIO #define BLE_DB_DISC_BLE_OBSERVER_PRIO 1 #endif -// BLE_DFU_BLE_OBSERVER_PRIO +// BLE_DFU_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the DFU Service. #ifndef BLE_DFU_BLE_OBSERVER_PRIO #define BLE_DFU_BLE_OBSERVER_PRIO 2 #endif -// BLE_GLS_BLE_OBSERVER_PRIO +// BLE_DIS_C_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Device Information Client. + +#ifndef BLE_DIS_C_BLE_OBSERVER_PRIO +#define BLE_DIS_C_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_GLS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Glucose Service. #ifndef BLE_GLS_BLE_OBSERVER_PRIO #define BLE_GLS_BLE_OBSERVER_PRIO 2 #endif -// BLE_HIDS_BLE_OBSERVER_PRIO +// BLE_HIDS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Human Interface Device Service. #ifndef BLE_HIDS_BLE_OBSERVER_PRIO #define BLE_HIDS_BLE_OBSERVER_PRIO 2 #endif -// BLE_HRS_BLE_OBSERVER_PRIO +// BLE_HRS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Heart Rate Service. #ifndef BLE_HRS_BLE_OBSERVER_PRIO #define BLE_HRS_BLE_OBSERVER_PRIO 2 #endif -// BLE_HRS_C_BLE_OBSERVER_PRIO +// BLE_HRS_C_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Heart Rate Service Client. #ifndef BLE_HRS_C_BLE_OBSERVER_PRIO #define BLE_HRS_C_BLE_OBSERVER_PRIO 2 #endif -// BLE_HTS_BLE_OBSERVER_PRIO +// BLE_HTS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Health Thermometer Service. #ifndef BLE_HTS_BLE_OBSERVER_PRIO #define BLE_HTS_BLE_OBSERVER_PRIO 2 #endif -// BLE_IAS_BLE_OBSERVER_PRIO +// BLE_IAS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Immediate Alert Service. #ifndef BLE_IAS_BLE_OBSERVER_PRIO #define BLE_IAS_BLE_OBSERVER_PRIO 2 #endif -// BLE_IAS_C_BLE_OBSERVER_PRIO +// BLE_IAS_C_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Immediate Alert Service Client. #ifndef BLE_IAS_C_BLE_OBSERVER_PRIO #define BLE_IAS_C_BLE_OBSERVER_PRIO 2 #endif -// BLE_LBS_BLE_OBSERVER_PRIO +// BLE_LBS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the LED Button Service. #ifndef BLE_LBS_BLE_OBSERVER_PRIO #define BLE_LBS_BLE_OBSERVER_PRIO 2 #endif -// BLE_LBS_C_BLE_OBSERVER_PRIO +// BLE_LBS_C_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the LED Button Service Client. #ifndef BLE_LBS_C_BLE_OBSERVER_PRIO #define BLE_LBS_C_BLE_OBSERVER_PRIO 2 #endif -// BLE_LLS_BLE_OBSERVER_PRIO +// BLE_LESC_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the BLE LESC module. + +#ifndef BLE_LESC_OBSERVER_PRIO +#define BLE_LESC_OBSERVER_PRIO 2 +#endif + +// BLE_LLS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Link Loss Service. #ifndef BLE_LLS_BLE_OBSERVER_PRIO #define BLE_LLS_BLE_OBSERVER_PRIO 2 #endif -// BLE_LNS_BLE_OBSERVER_PRIO +// BLE_LNS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Location Navigation Service. #ifndef BLE_LNS_BLE_OBSERVER_PRIO #define BLE_LNS_BLE_OBSERVER_PRIO 2 #endif -// BLE_NUS_BLE_OBSERVER_PRIO +// BLE_NUS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the UART Service. #ifndef BLE_NUS_BLE_OBSERVER_PRIO #define BLE_NUS_BLE_OBSERVER_PRIO 2 #endif -// BLE_NUS_C_BLE_OBSERVER_PRIO +// BLE_NUS_C_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the UART Central Service. #ifndef BLE_NUS_C_BLE_OBSERVER_PRIO #define BLE_NUS_C_BLE_OBSERVER_PRIO 2 #endif -// BLE_OTS_BLE_OBSERVER_PRIO +// BLE_OTS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Object transfer service. #ifndef BLE_OTS_BLE_OBSERVER_PRIO #define BLE_OTS_BLE_OBSERVER_PRIO 2 #endif -// BLE_OTS_C_BLE_OBSERVER_PRIO +// BLE_OTS_C_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Object transfer service client. #ifndef BLE_OTS_C_BLE_OBSERVER_PRIO #define BLE_OTS_C_BLE_OBSERVER_PRIO 2 #endif -// BLE_RSCS_BLE_OBSERVER_PRIO +// BLE_RSCS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Running Speed and Cadence Service. #ifndef BLE_RSCS_BLE_OBSERVER_PRIO #define BLE_RSCS_BLE_OBSERVER_PRIO 2 #endif -// BLE_RSCS_C_BLE_OBSERVER_PRIO +// BLE_RSCS_C_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Running Speed and Cadence Client. #ifndef BLE_RSCS_C_BLE_OBSERVER_PRIO #define BLE_RSCS_C_BLE_OBSERVER_PRIO 2 #endif -// BLE_TPS_BLE_OBSERVER_PRIO +// BLE_TPS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the TX Power Service. #ifndef BLE_TPS_BLE_OBSERVER_PRIO #define BLE_TPS_BLE_OBSERVER_PRIO 2 #endif -// BSP_BTN_BLE_OBSERVER_PRIO +// BSP_BTN_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Button Control module. #ifndef BSP_BTN_BLE_OBSERVER_PRIO #define BSP_BTN_BLE_OBSERVER_PRIO 1 #endif -// NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO +// NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the NFC pairing library. + +#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO +#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1 +#endif + +// NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the NFC pairing library. + +#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO +#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1 +#endif + +// NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the NFC pairing library. #ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO #define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1 #endif -// NRF_BLE_BMS_BLE_OBSERVER_PRIO +// NRF_BLE_BMS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Bond Management Service. #ifndef NRF_BLE_BMS_BLE_OBSERVER_PRIO #define NRF_BLE_BMS_BLE_OBSERVER_PRIO 2 #endif -// NRF_BLE_CGMS_BLE_OBSERVER_PRIO +// NRF_BLE_CGMS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Contiuon Glucose Monitoring Service. #ifndef NRF_BLE_CGMS_BLE_OBSERVER_PRIO #define NRF_BLE_CGMS_BLE_OBSERVER_PRIO 2 #endif -// NRF_BLE_GATTS_C_BLE_OBSERVER_PRIO +// NRF_BLE_ES_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Eddystone module. + +#ifndef NRF_BLE_ES_BLE_OBSERVER_PRIO +#define NRF_BLE_ES_BLE_OBSERVER_PRIO 2 +#endif + +// NRF_BLE_GATTS_C_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the GATT Service Client. #ifndef NRF_BLE_GATTS_C_BLE_OBSERVER_PRIO #define NRF_BLE_GATTS_C_BLE_OBSERVER_PRIO 2 #endif -// NRF_BLE_GATT_BLE_OBSERVER_PRIO +// NRF_BLE_GATT_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the GATT module. #ifndef NRF_BLE_GATT_BLE_OBSERVER_PRIO -#define NRF_BLE_GATT_BLE_OBSERVER_PRIO 2 +#define NRF_BLE_GATT_BLE_OBSERVER_PRIO 1 #endif -// NRF_BLE_QWR_BLE_OBSERVER_PRIO +// NRF_BLE_QWR_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Queued writes module. #ifndef NRF_BLE_QWR_BLE_OBSERVER_PRIO #define NRF_BLE_QWR_BLE_OBSERVER_PRIO 2 #endif -// PM_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Peer Manager module. - +// PM_BLE_OBSERVER_PRIO - Priority with which BLE events are dispatched to the Peer Manager module. #ifndef PM_BLE_OBSERVER_PRIO -#define PM_BLE_OBSERVER_PRIO 2 +#define PM_BLE_OBSERVER_PRIO 1 #endif -// +// //========================================================== -// +// //========================================================== @@ -8654,46 +11894,46 @@ // NRF_SDH_ENABLED - nrf_sdh - SoftDevice handler //========================================================== #ifndef NRF_SDH_ENABLED -#define NRF_SDH_ENABLED 1 +#define NRF_SDH_ENABLED 0 #endif -// Dispatch model +// Dispatch model // This setting configures how Stack events are dispatched to the application. //========================================================== // NRF_SDH_DISPATCH_MODEL - + // NRF_SDH_DISPATCH_MODEL_INTERRUPT: SoftDevice events are passed to the application from the interrupt context. // NRF_SDH_DISPATCH_MODEL_APPSH: SoftDevice events are scheduled using @ref app_scheduler. // NRF_SDH_DISPATCH_MODEL_POLLING: SoftDevice events are to be fetched manually. -// <0=> NRF_SDH_DISPATCH_MODEL_INTERRUPT -// <1=> NRF_SDH_DISPATCH_MODEL_APPSH -// <2=> NRF_SDH_DISPATCH_MODEL_POLLING +// <0=> NRF_SDH_DISPATCH_MODEL_INTERRUPT +// <1=> NRF_SDH_DISPATCH_MODEL_APPSH +// <2=> NRF_SDH_DISPATCH_MODEL_POLLING #ifndef NRF_SDH_DISPATCH_MODEL #define NRF_SDH_DISPATCH_MODEL 0 #endif -// +// //========================================================== // Clock - SoftDevice clock configuration //========================================================== // NRF_SDH_CLOCK_LF_SRC - SoftDevice clock source. - -// <0=> NRF_CLOCK_LF_SRC_RC -// <1=> NRF_CLOCK_LF_SRC_XTAL -// <2=> NRF_CLOCK_LF_SRC_SYNTH + +// <0=> NRF_CLOCK_LF_SRC_RC +// <1=> NRF_CLOCK_LF_SRC_XTAL +// <2=> NRF_CLOCK_LF_SRC_SYNTH #include "nrf5x_lf_clk_helper.h" -// NRF_SDH_CLOCK_LF_RC_CTIV - SoftDevice calibration timer interval. +// NRF_SDH_CLOCK_LF_RC_CTIV - SoftDevice calibration timer interval. #ifndef NRF_SDH_CLOCK_LF_RC_CTIV #define NRF_SDH_CLOCK_LF_RC_CTIV 0 #endif -// NRF_SDH_CLOCK_LF_RC_TEMP_CTIV - SoftDevice calibration timer interval under constant temperature. +// NRF_SDH_CLOCK_LF_RC_TEMP_CTIV - SoftDevice calibration timer interval under constant temperature. // How often (in number of calibration intervals) the RC oscillator shall be calibrated // if the temperature has not changed. @@ -8701,28 +11941,32 @@ #define NRF_SDH_CLOCK_LF_RC_TEMP_CTIV 0 #endif -// NRF_SDH_CLOCK_LF_XTAL_ACCURACY - External crystal clock accuracy used in the LL to compute timing windows. - -// <0=> NRF_CLOCK_LF_XTAL_ACCURACY_250_PPM -// <1=> NRF_CLOCK_LF_XTAL_ACCURACY_500_PPM -// <2=> NRF_CLOCK_LF_XTAL_ACCURACY_150_PPM -// <3=> NRF_CLOCK_LF_XTAL_ACCURACY_100_PPM -// <4=> NRF_CLOCK_LF_XTAL_ACCURACY_75_PPM -// <5=> NRF_CLOCK_LF_XTAL_ACCURACY_50_PPM -// <6=> NRF_CLOCK_LF_XTAL_ACCURACY_30_PPM -// <7=> NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM +// NRF_SDH_CLOCK_LF_ACCURACY - External clock accuracy used in the LL to compute timing. + +// <0=> NRF_CLOCK_LF_ACCURACY_250_PPM +// <1=> NRF_CLOCK_LF_ACCURACY_500_PPM +// <2=> NRF_CLOCK_LF_ACCURACY_150_PPM +// <3=> NRF_CLOCK_LF_ACCURACY_100_PPM +// <4=> NRF_CLOCK_LF_ACCURACY_75_PPM +// <5=> NRF_CLOCK_LF_ACCURACY_50_PPM +// <6=> NRF_CLOCK_LF_ACCURACY_30_PPM +// <7=> NRF_CLOCK_LF_ACCURACY_20_PPM +// <8=> NRF_CLOCK_LF_ACCURACY_10_PPM +// <9=> NRF_CLOCK_LF_ACCURACY_5_PPM +// <10=> NRF_CLOCK_LF_ACCURACY_2_PPM +// <11=> NRF_CLOCK_LF_ACCURACY_1_PPM -#ifndef NRF_SDH_CLOCK_LF_XTAL_ACCURACY -#define NRF_SDH_CLOCK_LF_XTAL_ACCURACY 7 +#ifndef NRF_SDH_CLOCK_LF_ACCURACY +#define NRF_SDH_CLOCK_LF_ACCURACY 7 #endif -// +// //========================================================== // SDH Observers - Observers and priority levels //========================================================== -// NRF_SDH_REQ_OBSERVER_PRIO_LEVELS - Total number of priority levels for request observers. +// NRF_SDH_REQ_OBSERVER_PRIO_LEVELS - Total number of priority levels for request observers. // This setting configures the number of priority levels available for the SoftDevice request event handlers. // The priority level of a handler determines the order in which it receives events, with respect to other handlers. @@ -8730,7 +11974,7 @@ #define NRF_SDH_REQ_OBSERVER_PRIO_LEVELS 2 #endif -// NRF_SDH_STATE_OBSERVER_PRIO_LEVELS - Total number of priority levels for state observers. +// NRF_SDH_STATE_OBSERVER_PRIO_LEVELS - Total number of priority levels for state observers. // This setting configures the number of priority levels available for the SoftDevice state event handlers. // The priority level of a handler determines the order in which it receives events, with respect to other handlers. @@ -8738,7 +11982,7 @@ #define NRF_SDH_STATE_OBSERVER_PRIO_LEVELS 2 #endif -// NRF_SDH_STACK_OBSERVER_PRIO_LEVELS - Total number of priority levels for stack event observers. +// NRF_SDH_STACK_OBSERVER_PRIO_LEVELS - Total number of priority levels for stack event observers. // This setting configures the number of priority levels available for the SoftDevice stack event handlers (ANT, BLE, SoC). // The priority level of a handler determines the order in which it receives events, with respect to other handlers. @@ -8750,34 +11994,34 @@ // State Observers priorities - Invididual priorities //========================================================== -// CLOCK_CONFIG_STATE_OBSERVER_PRIO +// CLOCK_CONFIG_STATE_OBSERVER_PRIO // Priority with which state events are dispatched to the Clock driver. #ifndef CLOCK_CONFIG_STATE_OBSERVER_PRIO #define CLOCK_CONFIG_STATE_OBSERVER_PRIO 0 #endif -// POWER_CONFIG_STATE_OBSERVER_PRIO +// POWER_CONFIG_STATE_OBSERVER_PRIO // Priority with which state events are dispatched to the Power driver. #ifndef POWER_CONFIG_STATE_OBSERVER_PRIO #define POWER_CONFIG_STATE_OBSERVER_PRIO 0 #endif -// RNG_CONFIG_STATE_OBSERVER_PRIO +// RNG_CONFIG_STATE_OBSERVER_PRIO // Priority with which state events are dispatched to this module. #ifndef RNG_CONFIG_STATE_OBSERVER_PRIO #define RNG_CONFIG_STATE_OBSERVER_PRIO 0 #endif -// +// //========================================================== // Stack Event Observers priorities - Invididual priorities //========================================================== -// NRF_SDH_ANT_STACK_OBSERVER_PRIO +// NRF_SDH_ANT_STACK_OBSERVER_PRIO // This setting configures the priority with which ANT events are processed with respect to other events coming from the stack. // Modify this setting if you need to have ANT events dispatched before or after other stack events, such as BLE or SoC. // Zero is the highest priority. @@ -8786,7 +12030,7 @@ #define NRF_SDH_ANT_STACK_OBSERVER_PRIO 0 #endif -// NRF_SDH_BLE_STACK_OBSERVER_PRIO +// NRF_SDH_BLE_STACK_OBSERVER_PRIO // This setting configures the priority with which BLE events are processed with respect to other events coming from the stack. // Modify this setting if you need to have BLE events dispatched before or after other stack events, such as ANT or SoC. // Zero is the highest priority. @@ -8795,7 +12039,7 @@ #define NRF_SDH_BLE_STACK_OBSERVER_PRIO 0 #endif -// NRF_SDH_SOC_STACK_OBSERVER_PRIO +// NRF_SDH_SOC_STACK_OBSERVER_PRIO // This setting configures the priority with which SoC events are processed with respect to other events coming from the stack. // Modify this setting if you need to have SoC events dispatched before or after other stack events, such as ANT or BLE. // Zero is the highest priority. @@ -8804,10 +12048,10 @@ #define NRF_SDH_SOC_STACK_OBSERVER_PRIO 0 #endif -// +// //========================================================== -// +// //========================================================== @@ -8821,7 +12065,7 @@ // SoC Observers - Observers and priority levels //========================================================== -// NRF_SDH_SOC_OBSERVER_PRIO_LEVELS - Total number of priority levels for SoC observers. +// NRF_SDH_SOC_OBSERVER_PRIO_LEVELS - Total number of priority levels for SoC observers. // This setting configures the number of priority levels available for the SoC event handlers. // The priority level of a handler determines the order in which it receives events, with respect to other handlers. @@ -8832,44 +12076,44 @@ // SoC Observers priorities - Invididual priorities //========================================================== -// BLE_ADV_SOC_OBSERVER_PRIO +// BLE_ADV_SOC_OBSERVER_PRIO // Priority with which SoC events are dispatched to the Advertising module. #ifndef BLE_ADV_SOC_OBSERVER_PRIO #define BLE_ADV_SOC_OBSERVER_PRIO 1 #endif -// BLE_DFU_SOC_OBSERVER_PRIO +// BLE_DFU_SOC_OBSERVER_PRIO // Priority with which BLE events are dispatched to the DFU Service. #ifndef BLE_DFU_SOC_OBSERVER_PRIO #define BLE_DFU_SOC_OBSERVER_PRIO 1 #endif -// CLOCK_CONFIG_SOC_OBSERVER_PRIO +// CLOCK_CONFIG_SOC_OBSERVER_PRIO // Priority with which SoC events are dispatched to the Clock driver. #ifndef CLOCK_CONFIG_SOC_OBSERVER_PRIO #define CLOCK_CONFIG_SOC_OBSERVER_PRIO 0 #endif -// POWER_CONFIG_SOC_OBSERVER_PRIO +// POWER_CONFIG_SOC_OBSERVER_PRIO // Priority with which SoC events are dispatched to the Power driver. #ifndef POWER_CONFIG_SOC_OBSERVER_PRIO #define POWER_CONFIG_SOC_OBSERVER_PRIO 0 #endif -// +// //========================================================== -// +// //========================================================== // -// +// //========================================================== // <<< end of configuration section >>> diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/i2c_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/i2c_api.c index b05573a1a5d..16ea14f9196 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/i2c_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/i2c_api.c @@ -576,7 +576,8 @@ static void i2c_configure_driver_instance(i2c_t *obj) config->mode = NORDIC_I2C_MODE_DRIVER; /* If the peripheral is already running, then disable it and use the driver API to uninitialize it.*/ - if (nordic_nrf5_instance[instance].reg.p_twi->ENABLE) { + // 15.0 - has additional "twi" structure level and had to rename to "u" from "reg" + if (nordic_nrf5_instance[instance].u.twi.p_twi->ENABLE) { nrf_drv_twi_disable(&nordic_nrf5_instance[instance]); nrf_drv_twi_uninit(&nordic_nrf5_instance[instance]); } diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c index 7849ecf6ce9..7a037398044 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c @@ -107,18 +107,9 @@ */ typedef enum { - NRF_UARTE_EVENT_RXDRDY = offsetof(NRF_UARTE_Type, EVENTS_RXDRDY), NRF_UARTE_EVENT_TXDRDY = offsetof(NRF_UARTE_Type, EVENTS_TXDRDY), } nrf_uarte_event_extra_t; -/** - * Missing interrupt masks. - */ -typedef enum -{ - NRF_UARTE_INT_RXDRDY_MASK = UARTE_INTENSET_RXDRDY_Msk, - NRF_UARTE_INT_TXDRDY_MASK = UARTE_INTENSET_TXDRDY_Msk, -} nrf_uarte_int_mask_extra_t; /** * Internal struct for storing each UARTE instance's state: diff --git a/targets/targets.json b/targets/targets.json index 83340a7c461..283c6ecc7c9 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -6782,8 +6782,7 @@ "NORDIC", "NRF5x", "NRF52", - "SDK_14_2", - "NORDIC_SOFTDEVICE", + "SDK_15_0", "SOFTDEVICE_COMMON", "SOFTDEVICE_S132_FULL" ], @@ -6909,8 +6908,7 @@ "NORDIC", "NRF5x", "NRF52", - "SDK_14_2", - "NORDIC_SOFTDEVICE", + "SDK_15_0", "SOFTDEVICE_COMMON", "SOFTDEVICE_S140_FULL" ], From ed4799cc3d2f4bfd63b7b4dc14be0d138f8e2905 Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Mon, 9 Jul 2018 13:57:57 -0500 Subject: [PATCH 432/488] Bringing in Softdevice but excluding BLE feature and improvements in feature defines --- .../ble_radio_notification.c | 87 + .../ble_radio_notification.h | 82 + .../libraries/bootloader/dfu/nrf_dfu_mbr.c | 109 + .../libraries/bootloader/dfu/nrf_dfu_mbr.h | 90 + .../libraries/bootloader/dfu/nrf_dfu_types.h | 302 +++ .../bootloader/nrf_bootloader_info.h | 188 ++ .../softdevice/common/nrf_sdh.c | 430 ++++ .../softdevice/common/nrf_sdh.h | 305 +++ .../softdevice/common/nrf_sdh_ant.c | 162 ++ .../softdevice/common/nrf_sdh_ant.h | 182 ++ .../softdevice/common/nrf_sdh_ble.c | 324 +++ .../softdevice/common/nrf_sdh_ble.h | 184 ++ .../softdevice/common/nrf_sdh_soc.c | 118 + .../softdevice/common/nrf_sdh_soc.h | 143 ++ .../headers/{ble.h => nrf_ble.h} | 0 .../TARGET_SOFTDEVICE_S140_FULL/mbed_lib.json | 38 + .../components/libraries/fds/fds.c | 2164 +++++++++++++++++ .../components/libraries/fds/fds.h | 700 ++++++ .../libraries/fds/fds_internal_defs.h | 327 +++ .../nrfx/legacy/ble_flash/ble_flash.c | 313 +++ .../nrfx/legacy/ble_flash/ble_flash.h | 178 ++ .../integration/nrfx/legacy/nrf_drv_twi.h | 4 +- .../integration/nrfx/nrfx_glue.h | 2 +- .../modules/nrfx/drivers/src/nrfx_uarte.c | 4 +- 24 files changed, 6431 insertions(+), 5 deletions(-) create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/ble/ble_radio_notification/ble_radio_notification.c create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/ble/ble_radio_notification/ble_radio_notification.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/dfu/nrf_dfu_mbr.c create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/dfu/nrf_dfu_mbr.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/dfu/nrf_dfu_types.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/nrf_bootloader_info.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh.c create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ant.c create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ant.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ble.c create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ble.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_soc.c create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_soc.h rename targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/{ble.h => nrf_ble.h} (100%) create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/mbed_lib.json create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fds/fds.c create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fds/fds.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fds/fds_internal_defs.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/ble_flash/ble_flash.c create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/ble_flash/ble_flash.h diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/ble/ble_radio_notification/ble_radio_notification.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/ble/ble_radio_notification/ble_radio_notification.c new file mode 100644 index 00000000000..44b2bf9ee82 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/ble/ble_radio_notification/ble_radio_notification.c @@ -0,0 +1,87 @@ +/** + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "ble_radio_notification.h" +#include + + +static bool m_radio_active = false; /**< Current radio state. */ +static ble_radio_notification_evt_handler_t m_evt_handler = NULL; /**< Application event handler for handling Radio Notification events. */ + + +void SWI1_IRQHandler(void) +{ + m_radio_active = !m_radio_active; + if (m_evt_handler != NULL) + { + m_evt_handler(m_radio_active); + } +} + + +uint32_t ble_radio_notification_init(uint32_t irq_priority, + uint8_t distance, + ble_radio_notification_evt_handler_t evt_handler) +{ + uint32_t err_code; + + m_evt_handler = evt_handler; + + // Initialize Radio Notification software interrupt + err_code = sd_nvic_ClearPendingIRQ(SWI1_IRQn); + if (err_code != NRF_SUCCESS) + { + return err_code; + } + + err_code = sd_nvic_SetPriority(SWI1_IRQn, irq_priority); + if (err_code != NRF_SUCCESS) + { + return err_code; + } + + err_code = sd_nvic_EnableIRQ(SWI1_IRQn); + if (err_code != NRF_SUCCESS) + { + return err_code; + } + + // Configure the event + return sd_radio_notification_cfg_set(NRF_RADIO_NOTIFICATION_TYPE_INT_ON_BOTH, distance); +} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/ble/ble_radio_notification/ble_radio_notification.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/ble/ble_radio_notification/ble_radio_notification.h new file mode 100644 index 00000000000..0f89b2f5dd5 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/ble/ble_radio_notification/ble_radio_notification.h @@ -0,0 +1,82 @@ +/** + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/** @file + * + * @defgroup ble_radio_notification Radio Notification Event Handler + * @{ + * @ingroup ble_sdk_lib + * @brief Module for propagating Radio Notification events to the application. + */ + +#ifndef BLE_RADIO_NOTIFICATION_H__ +#define BLE_RADIO_NOTIFICATION_H__ + +#include +#include +#include "nrf_soc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@brief Application radio notification event handler type. */ +typedef void (*ble_radio_notification_evt_handler_t) (bool radio_active); + +/**@brief Function for initializing the Radio Notification module. + * + * @param[in] irq_priority Interrupt priority for the Radio Notification interrupt handler. + * @param[in] distance The time from an Active event until the radio is activated. + * @param[in] evt_handler Handler to be executed when a radio notification event has been + * received. + * + * @return NRF_SUCCESS on successful initialization, otherwise an error code. + */ +uint32_t ble_radio_notification_init(uint32_t irq_priority, + uint8_t distance, + ble_radio_notification_evt_handler_t evt_handler); + + +#ifdef __cplusplus +} +#endif + +#endif // BLE_RADIO_NOTIFICATION_H__ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/dfu/nrf_dfu_mbr.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/dfu/nrf_dfu_mbr.c new file mode 100644 index 00000000000..974a46652f8 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/dfu/nrf_dfu_mbr.c @@ -0,0 +1,109 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "nrf_dfu_mbr.h" +#include "nrf_mbr.h" +#include "nrf_dfu_types.h" +#include "nrf_log.h" +#include "nrf_bootloader_info.h" + +#define MBR_IRQ_FORWARD_ADDRESS_ADDRESS (0x20000000) //!< The address of the variable that decides where the MBR forwards interrupts + +uint32_t nrf_dfu_mbr_copy_bl(uint32_t * p_src, uint32_t len) +{ + uint32_t ret_val; + uint32_t const len_words = len / sizeof(uint32_t); + + sd_mbr_command_t command = + { + .command = SD_MBR_COMMAND_COPY_BL, + .params.copy_bl.bl_src = p_src, + .params.copy_bl.bl_len = len_words + }; + + ret_val = sd_mbr_command(&command); + + return ret_val; +} + + +uint32_t nrf_dfu_mbr_init_sd(void) +{ + uint32_t ret_val; + + sd_mbr_command_t command = + { + .command = SD_MBR_COMMAND_INIT_SD + }; + + ret_val = sd_mbr_command(&command); + + return ret_val; +} + + +uint32_t nrf_dfu_mbr_irq_forward_address_set(void) +{ + uint32_t ret_val = NRF_ERROR_INVALID_PARAM; + uint32_t address = MBR_SIZE; + + NRF_LOG_DEBUG("running irq table set"); + +#ifndef BLE_STACK_SUPPORT_REQD + sd_mbr_command_t command = + { + .command = SD_MBR_COMMAND_IRQ_FORWARD_ADDRESS_SET, + .params.irq_forward_address_set.address = address, + }; + + ret_val = sd_mbr_command(&command); +#endif + + if (ret_val == NRF_ERROR_INVALID_PARAM) + { + // Manually set the forward address if this MBR doesn't have the command. + *(uint32_t *)(MBR_IRQ_FORWARD_ADDRESS_ADDRESS) = address; + + ret_val = NRF_SUCCESS; + } + + NRF_LOG_DEBUG("After running irq table set"); + + return ret_val; +} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/dfu/nrf_dfu_mbr.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/dfu/nrf_dfu_mbr.h new file mode 100644 index 00000000000..2fcd1b361d5 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/dfu/nrf_dfu_mbr.h @@ -0,0 +1,90 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/**@file + * + * @defgroup sdk_nrf_dfu_mbr MBR functions + * @{ + * @ingroup nrf_dfu + */ + +#ifndef NRF_DFU_MBR_H__ +#define NRF_DFU_MBR_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** @brief Function for copying the bootloader using an MBR command. + * + * @param[in] p_src Source address of the bootloader data to copy. + * @param[in] len Length of the data to copy in bytes. + * + * @return This function will return only if the command request could not be run. + * See @ref sd_mbr_command_copy_bl_t for possible return values. + */ +uint32_t nrf_dfu_mbr_copy_bl(uint32_t * p_src, uint32_t len); + + +/** @brief Function for initializing the SoftDevice using an MBR command. + * + * @retval NRF_SUCCESS If the SoftDevice was initialized successfully. + * Any other return value indicates that the SoftDevice + * could not be initialized. + */ +uint32_t nrf_dfu_mbr_init_sd(void); + + +/** @brief Function for setting the address of the IRQ table to the app's using an MBR command. + * + * @retval NRF_SUCCESS If the address of the new irq table was set. Any other + * return value indicates that the address could not be set. + */ +uint32_t nrf_dfu_mbr_irq_forward_address_set(void); + + +#ifdef __cplusplus +} +#endif + +#endif // NRF_DFU_MBR_H__ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/dfu/nrf_dfu_types.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/dfu/nrf_dfu_types.h new file mode 100644 index 00000000000..5ccd2901032 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/dfu/nrf_dfu_types.h @@ -0,0 +1,302 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/**@file + * + * @defgroup sdk_nrf_dfu_types DFU types + * @{ + * @ingroup nrf_dfu + */ + +#ifndef NRF_DFU_TYPES_H__ +#define NRF_DFU_TYPES_H__ + +#include +#include + +#include "nrf.h" +#include "nrf_mbr.h" +#include "app_util_platform.h" +#include "sdk_config.h" + +#if defined(NRF_DFU_TRANSPORT_BLE) && NRF_DFU_TRANSPORT_BLE +#include "ble_gap.h" +#define SYSTEM_SERVICE_ATT_SIZE 8 /**< Size of the system service attribute length including CRC-16 at the end. */ +#endif + +#ifdef __cplusplus +extern "C" { +#endif + + +#define INIT_COMMAND_MAX_SIZE 256 /**< Maximum size of the init command stored in dfu_settings. */ + +/** @brief Size of a flash page. This value is used for calculating the size of the reserved + * flash space in the bootloader region. + */ +#if defined(NRF51) + #define CODE_PAGE_SIZE (PAGE_SIZE_IN_WORDS * sizeof(uint32_t)) +#elif defined(NRF52) || defined(NRF52840_XXAA) + #define CODE_PAGE_SIZE (MBR_PAGE_SIZE_IN_WORDS * sizeof(uint32_t)) +#else + #error "Architecture not set." +#endif + +/** @brief Maximum size of a data object.*/ +#if defined(NRF51) + #define DATA_OBJECT_MAX_SIZE (CODE_PAGE_SIZE * 4) +#elif defined(NRF52_SERIES) || defined (__SDK_DOXYGEN__) + #define DATA_OBJECT_MAX_SIZE (CODE_PAGE_SIZE) +#else + #error "Architecture not set." +#endif + +/** @brief Page location of the bootloader settings address. + */ +#if defined (NRF51) + #define BOOTLOADER_SETTINGS_ADDRESS (0x0003FC00UL) +#elif defined( NRF52810_XXAA ) + #define BOOTLOADER_SETTINGS_ADDRESS (0x0002F000UL) +#elif defined( NRF52832_XXAA ) + #define BOOTLOADER_SETTINGS_ADDRESS (0x0007F000UL) +#elif defined(NRF52840_XXAA) + #define BOOTLOADER_SETTINGS_ADDRESS (0x000FF000UL) +#else + #error No valid target set for BOOTLOADER_SETTINGS_ADDRESS. +#endif + +#define BOOTLOADER_SETTINGS_PAGE_SIZE (CODE_PAGE_SIZE) + +/** + * @brief MBR parameters page in UICR. + * + * Register location in UICR where the page address of the MBR parameters page is stored (only used by the nRF52 MBR). + * + * @note If the value at the given location is 0xFFFFFFFF, no MBR parameters page is set. + */ +#define NRF_UICR_MBR_PARAMS_PAGE_ADDRESS (NRF_UICR_BASE + 0x18) +#define NRF_MBR_PARAMS_PAGE_SIZE (CODE_PAGE_SIZE) + +/** @brief Page location of the MBR parameters page address. + */ +#if defined(NRF52840_XXAA) || defined(NRF52840_XXAA_ENGA) + #define NRF_MBR_PARAMS_PAGE_ADDRESS (0x000FE000UL) +#elif defined(NRF52832_XXAA) + #define NRF_MBR_PARAMS_PAGE_ADDRESS (0x0007E000UL) +#elif defined(NRF52810_XXAA) + #define NRF_MBR_PARAMS_PAGE_ADDRESS (0x0002E000UL) +#endif + +/** @brief Size (in bytes) of the flash area reserved for application data. + * + * The area is found at the end of the application area, next to the start of + * the bootloader. This area will not be erased by the bootloader during a + * firmware upgrade. The default value is 3 pages which matches the size used + * in most SDK examples. + */ +#ifndef DFU_APP_DATA_RESERVED +#define DFU_APP_DATA_RESERVED (CODE_PAGE_SIZE * 3) +#endif + +/** @brief Total size of the region between the SoftDevice and the bootloader. + */ +#define DFU_REGION_END(bootloader_start_addr) ((bootloader_start_addr) - (DFU_APP_DATA_RESERVED)) + +#ifdef BLE_STACK_SUPPORT_REQD +#define DFU_REGION_START (nrf_dfu_bank0_start_addr()) +#else +#define DFU_REGION_START (MBR_SIZE) +#endif + +#define DFU_REGION_TOTAL_SIZE ((DFU_REGION_END) - (DFU_REGION_START)) + +#define NRF_DFU_CURRENT_BANK_0 0x00 +#define NRF_DFU_CURRENT_BANK_1 0x01 + +#define NRF_DFU_BANK_LAYOUT_DUAL 0x00 +#define NRF_DFU_BANK_LAYOUT_SINGLE 0x01 + +/** @brief DFU bank state codes. + * + * @details The DFU bank state indicates the content of a bank: + * A valid image of a certain type or an invalid image. + */ + +#define NRF_DFU_BANK_INVALID 0x00 /**< Invalid image. */ +#define NRF_DFU_BANK_VALID_APP 0x01 /**< Valid application. */ +#define NRF_DFU_BANK_VALID_SD 0xA5 /**< Valid SoftDevice. */ +#define NRF_DFU_BANK_VALID_BL 0xAA /**< Valid bootloader. */ +#define NRF_DFU_BANK_VALID_SD_BL 0xAC /**< Valid SoftDevice and bootloader. */ + +/** @brief Description of a single bank. */ +#pragma pack(4) +typedef struct +{ + uint32_t image_size; /**< Size of the image in the bank. */ + uint32_t image_crc; /**< CRC of the image. If set to 0, the CRC is ignored. */ + uint32_t bank_code; /**< Identifier code for the bank. */ +} nrf_dfu_bank_t; + +/**@brief DFU progress. + * + * Be aware of the difference between objects and firmware images. A firmware image consists of multiple objects, each of a maximum size @ref DATA_OBJECT_MAX_SIZE. + * + * @note The union inside this struct is cleared when CREATE_OBJECT of command type is executed, and when there is a valid post-validation. + * In DFU activation (after reset) the @ref dfu_progress_t::update_start_address will be used in case of a SD/SD+BL update. + */ +ANON_UNIONS_ENABLE; +typedef struct +{ + uint32_t command_size; /**< The size of the current init command stored in the DFU settings. */ + uint32_t command_offset; /**< The offset of the currently received init command data. The offset will increase as the init command is received. */ + uint32_t command_crc; /**< The calculated CRC of the init command (calculated after the transfer is completed). */ + uint32_t data_object_size; /**< The size of the last object created. Note that this size is not the size of the whole firmware image.*/ + union + { + struct + { + uint32_t firmware_image_crc; /**< CRC value of the current firmware (continuously calculated as data is received). */ + uint32_t firmware_image_crc_last; /**< The CRC of the last executed object. */ + uint32_t firmware_image_offset; /**< The offset of the current firmware image being transferred. Note that this offset is the offset in the entire firmware image and not only the current object. */ + uint32_t firmware_image_offset_last;/**< The offset of the last executed object from the start of the firmware image. */ + }; + struct + { + uint32_t update_start_address; /**< Value indicating the start address of the new firmware (before copy). It's always used, but it's most important for an SD/SD+BL update where the SD changes size or if the DFU process had a power loss when updating a SD with changed size. */ + }; + }; +} dfu_progress_t; +ANON_UNIONS_DISABLE; + +/** @brief Event types in the bootloader and DFU process. */ +typedef enum +{ + NRF_DFU_EVT_DFU_INITIALIZED, /**< Starting DFU. */ + NRF_DFU_EVT_TRANSPORT_ACTIVATED, /**< Transport activated (e.g. BLE connected, USB plugged in). */ + NRF_DFU_EVT_TRANSPORT_DEACTIVATED, /**< Transport deactivated (e.g. BLE disconnected, USB plugged out). */ + NRF_DFU_EVT_DFU_STARTED, /**< DFU process started. */ + NRF_DFU_EVT_OBJECT_RECEIVED, /**< A DFU data object has been received. */ + NRF_DFU_EVT_DFU_FAILED, /**< DFU process has failed, been interrupted, or hung. */ + NRF_DFU_EVT_DFU_COMPLETED, /**< DFU process completed. */ + NRF_DFU_EVT_DFU_ABORTED, /**< DFU process aborted. */ +} nrf_dfu_evt_type_t; + +/** + * @brief Function for notifying DFU state. + */ +typedef void (*nrf_dfu_observer_t)(nrf_dfu_evt_type_t notification); + + +#if defined(NRF_DFU_TRANSPORT_BLE) && NRF_DFU_TRANSPORT_BLE + +typedef struct +{ + uint32_t crc; /**< CRC of the rest of the parameters in this struct. */ + ble_gap_id_key_t ble_id; /**< BLE GAP identity key of the device that initiated the DFU process. */ + ble_gap_enc_key_t enc_key; /**< Encryption key structure containing encrypted diversifier and LTK for reestablishing the bond. */ + uint8_t sys_serv_attr[SYSTEM_SERVICE_ATT_SIZE]; /**< System service attributes for restoring of Service Changed Indication setting in DFU mode. */ +} nrf_dfu_peer_data_t; + +typedef enum +{ + DFU_PEER_DATA_STATE_INVALID = 0, + DFU_PEER_DATA_STATE_INITIALIZED = 1, + DFU_PEER_DATA_STATE_WRITE_REQUESTED = 2, + DFU_PEER_DATA_STATE_WRITE_FINISHED = 3, + DFU_PEER_DATA_STATE_WRITE_FAILED = 4, +} nrf_dfu_peer_data_state_t; + +typedef struct +{ + uint32_t crc; /**< CRC of the rest of the parameters in this struct. Calculated by the bootloader. */ + uint8_t name[20]; /**< New advertisement name to set. */ + uint32_t len; /**< Length of the advertisement name. */ +} nrf_dfu_adv_name_t; + +typedef enum +{ + DFU_ADV_NAME_STATE_INVALID = 0, + DFU_ADV_NAME_STATE_INITIALIZED = 1, + DFU_ADV_NAME_STATE_WRITE_REQUESTED = 2, + DFU_ADV_NAME_STATE_WRITE_FINISHED = 3, + DFU_ADV_NAME_STATE_WRITE_FAILED = 4, +} nrf_dfu_set_adv_name_state_t; + +#endif // NRF_DFU_TRANSPORT_BLE + + +/**@brief DFU settings for application and bank data. + */ +typedef struct +{ + uint32_t crc; /**< CRC for the stored DFU settings, not including the CRC itself. If 0xFFFFFFF, the CRC has never been calculated. */ + uint32_t settings_version; /**< Version of the current DFU settings struct layout. */ + uint32_t app_version; /**< Version of the last stored application. */ + uint32_t bootloader_version; /**< Version of the last stored bootloader. */ + + uint32_t bank_layout; /**< Bank layout: single bank or dual bank. This value can change. */ + uint32_t bank_current; /**< The bank that is currently used. */ + + nrf_dfu_bank_t bank_0; /**< Bank 0. */ + nrf_dfu_bank_t bank_1; /**< Bank 1. */ + + uint32_t write_offset; /**< Write offset for the current operation. */ + uint32_t sd_size; /**< Size of the SoftDevice. */ + + dfu_progress_t progress; /**< Current DFU progress. */ + + uint32_t enter_buttonless_dfu; + uint8_t init_command[INIT_COMMAND_MAX_SIZE]; /**< Buffer for storing the init command. */ + +#if defined(NRF_DFU_TRANSPORT_BLE) && NRF_DFU_TRANSPORT_BLE + nrf_dfu_peer_data_t peer_data; /**< Not included in calculated CRC. */ + nrf_dfu_adv_name_t adv_name; /**< Not included in calculated CRC. */ +#endif // NRF_DFU_TRANSPORT_BLE + +} nrf_dfu_settings_t; + +#pragma pack() // revert pack settings + +#ifdef __cplusplus +} +#endif + +#endif // NRF_DFU_TYPES_H__ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/nrf_bootloader_info.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/nrf_bootloader_info.h new file mode 100644 index 00000000000..812cddbf376 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/nrf_bootloader_info.h @@ -0,0 +1,188 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/**@file + * + * @defgroup nrf_bootloader_info Bootloader Information + * @{ + * @ingroup nrf_bootloader + */ + +#ifndef NRF_BOOTLOADER_INFO_H__ +#define NRF_BOOTLOADER_INFO_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "app_util.h" +#include "nrf.h" +#include "nrf_mbr.h" + +/** @brief Macro for getting the start address of the bootloader image. + * + * The macro is not a compile time symbol. It cannot be used as a + * constant expression, for example, inside a static assert or linker script + * at-placement. + */ +#ifndef BOOTLOADER_START_ADDR +#if (__LINT__ == 1) + #define BOOTLOADER_START_ADDR (0x3AC00) +#elif defined(CODE_START) + #define BOOTLOADER_START_ADDR (CODE_START) +#else + #error Not a valid compiler/linker for BOOTLOADER_START_ADDR. +#endif +#endif + + +/** @brief Macro for getting the size of the bootloader image. + */ +#ifndef BOOTLOADER_SIZE +#if defined ( NRF51 ) + #define BOOTLOADER_SIZE (BOOTLOADER_SETTINGS_ADDRESS - BOOTLOADER_START_ADDR) +#elif defined( NRF52_SERIES ) + #define BOOTLOADER_SIZE (NRF_MBR_PARAMS_PAGE_ADDRESS - BOOTLOADER_START_ADDR) +#elif (__LINT__ == 1) + #define BOOTLOADER_SIZE (0x6000) +#endif +#endif + + +/** + * @brief Bootloader start address in UICR. + * + * Register location in UICR where the bootloader start address is stored. + * + * @note If the value at the given location is 0xFFFFFFFF, the bootloader address is not set. + */ +#define NRF_UICR_BOOTLOADER_START_ADDRESS (NRF_UICR_BASE + 0x14) + + +// The following macros are for accessing the SoftDevice information structure, +// which is found inside the SoftDevice binary. + +/** @brief Macro for converting an offset inside the SoftDevice information struct to an absolute address. + */ +#define SD_INFO_ABS_OFFSET_GET(baseaddr, offset) ((baseaddr) + (SOFTDEVICE_INFO_STRUCT_OFFSET) + (offset)) + +/** @brief Macros for reading a byte or a word at a particular offset inside a SoftDevice information struct. + * Use MBR_SIZE as baseaddr when the SoftDevice is installed just above the MBR (the usual case). + */ +#define SD_OFFSET_GET_UINT32(baseaddr, offset) (*((uint32_t *) SD_INFO_ABS_OFFSET_GET(baseaddr, offset))) +#define SD_OFFSET_GET_UINT16(baseaddr, offset) (*((uint16_t *) SD_INFO_ABS_OFFSET_GET(baseaddr, offset))) +#define SD_OFFSET_GET_UINT8(baseaddr, offset) (*((uint8_t *) SD_INFO_ABS_OFFSET_GET(baseaddr, offset))) + + +#ifdef BLE_STACK_SUPPORT_REQD +#include "nrf_sdm.h" +#else +/** @brief The offset inside the SoftDevice at which the information struct is placed. + * To see the layout of the information struct, see the SoftDevice specification. + */ +#define SOFTDEVICE_INFO_STRUCT_OFFSET (0x2000) + +#define SD_INFO_STRUCT_SIZE(baseaddr) SD_OFFSET_GET_UINT8(baseaddr, 0x00) + +/** @brief Macro for reading the size of a SoftDevice at a given base address. + */ +#ifndef SD_SIZE_GET +#define SD_SIZE_GET(baseaddr) SD_OFFSET_GET_UINT32(baseaddr, 0x08) +#endif + +/** @brief Macro for reading the version of a SoftDevice at a given base address. + * This expression checks the length of the information struct to see if the version is present. + * The version number is constructed like this: + * major_version * 1000000 + minor_version * 1000 + bugfix_version + */ +#ifndef SD_VERSION_GET +#define SD_VERSION_GET(baseaddr) ((SD_INFO_STRUCT_SIZE(baseaddr) > (0x14)) \ + ? SD_OFFSET_GET_UINT32(baseaddr, 0x14) \ + : 0) +#endif +#endif + + +/** @brief Macro for reading the magic number of a SoftDevice at a given base address. + */ +#ifndef SD_MAGIC_NUMBER_GET +#define SD_MAGIC_NUMBER_GET(baseaddr) SD_OFFSET_GET_UINT32(baseaddr, 0x04) +#endif + +/** @brief Macro for getting the absolute address of the magic number. + */ +#define SD_MAGIC_NUMBER_ABS_OFFSET_GET(baseaddr) SD_INFO_ABS_OFFSET_GET(baseaddr, 0x04) + +/** @brief The number present at a specific location in all SoftDevices. + */ +#define SD_MAGIC_NUMBER ((uint32_t)0x51B1E5DB) + +/** @brief Whether a SoftDevice is at its regular location. + */ +#ifndef SD_PRESENT +#define SD_PRESENT ((SD_MAGIC_NUMBER_GET(MBR_SIZE)) == (SD_MAGIC_NUMBER)) +#endif + +/** @brief The multiplier for the major version of the SoftDevice. See \ref SD_VERSION_GET + */ +#define SD_MAJOR_VERSION_MULTIPLIER (1000000) + +/** @brief Read the major version of the SoftDevice from the raw version number. See \ref SD_VERSION_GET. + */ +#define SD_MAJOR_VERSION_EXTRACT(raw_version) ((raw_version)/SD_MAJOR_VERSION_MULTIPLIER) + + +#define BOOTLOADER_DFU_GPREGRET_MASK (0xB0) /**< Magic pattern written to GPREGRET register to signal between main app and DFU. The 3 lower bits are assumed to be used for signalling purposes.*/ +#define BOOTLOADER_DFU_START_BIT_MASK (0x01) /**< Bit mask to signal from main application to enter DFU mode using a buttonless service. */ + +#define BOOTLOADER_DFU_GPREGRET2_MASK (0xA8) /**< Magic pattern written to GPREGRET2 register to signal between main app and DFU. The 3 lower bits are assumed to be used for signalling purposes.*/ +#define BOOTLOADER_DFU_SKIP_CRC_BIT_MASK (0x01) /**< Bit mask to signal from main application that CRC-check is not needed for image verification. */ + + +#define BOOTLOADER_DFU_START (BOOTLOADER_DFU_GPREGRET_MASK | BOOTLOADER_DFU_START_BIT_MASK) /**< Magic number to signal that bootloader should enter DFU mode because of signal from Buttonless DFU in main app.*/ +#define BOOTLOADER_DFU_SKIP_CRC (BOOTLOADER_DFU_GPREGRET2_MASK | BOOTLOADER_DFU_SKIP_CRC_BIT_MASK) /**< Magic number to signal that CRC can be skipped due to low power modes.*/ + + + +#ifdef __cplusplus +} +#endif + +#endif // #ifndef NRF_BOOTLOADER_INFO_H__ +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh.c new file mode 100644 index 00000000000..39a861f8e0e --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh.c @@ -0,0 +1,430 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "sdk_common.h" +#if NRF_MODULE_ENABLED(NRF_SDH) + +#include "nrf_sdh.h" + +#include + +#include "nrf_sdm.h" +#include "nrf_nvic.h" +#include "sdk_config.h" +#include "app_error.h" +#include "app_util_platform.h" + + +#define NRF_LOG_MODULE_NAME nrf_sdh +#if NRF_SDH_LOG_ENABLED + #define NRF_LOG_LEVEL NRF_SDH_LOG_LEVEL + #define NRF_LOG_INFO_COLOR NRF_SDH_INFO_COLOR + #define NRF_LOG_DEBUG_COLOR NRF_SDH_DEBUG_COLOR +#else + #define NRF_LOG_LEVEL 0 +#endif // NRF_SDH_LOG_ENABLED +#include "nrf_log.h" +NRF_LOG_MODULE_REGISTER(); + + +// Validate configuration options. + +#if (NRF_SDH_DISPATCH_MODEL == NRF_SDH_DISPATCH_MODEL_APPSH) + #if (!APP_SCHEDULER_ENABLED) + #error app_scheduler is required when NRF_SDH_DISPATCH_MODEL is set to NRF_SDH_DISPATCH_MODEL_APPSH + #endif + #include "app_scheduler.h" +#endif + +#if ( (NRF_SDH_CLOCK_LF_SRC == NRF_CLOCK_LF_SRC_RC) \ + && (NRF_SDH_CLOCK_LF_ACCURACY != NRF_CLOCK_LF_ACCURACY_500_PPM)) + #warning Please select NRF_CLOCK_LF_ACCURACY_500_PPM when using NRF_CLOCK_LF_SRC_RC +#endif + + +// Create section "sdh_req_observers". +NRF_SECTION_SET_DEF(sdh_req_observers, nrf_sdh_req_observer_t, NRF_SDH_REQ_OBSERVER_PRIO_LEVELS); + +// Create section "sdh_state_observers". +NRF_SECTION_SET_DEF(sdh_state_observers, nrf_sdh_state_observer_t, NRF_SDH_STATE_OBSERVER_PRIO_LEVELS); + +// Create section "sdh_stack_observers". +NRF_SECTION_SET_DEF(sdh_stack_observers, nrf_sdh_stack_observer_t, NRF_SDH_STACK_OBSERVER_PRIO_LEVELS); + + +static bool m_nrf_sdh_enabled; /**< Variable to indicate whether the SoftDevice is enabled. */ +static bool m_nrf_sdh_suspended; /**< Variable to indicate whether this module is suspended. */ +static bool m_nrf_sdh_continue; /**< Variable to indicate whether enable/disable process was started. */ + + +/**@brief Function for notifying request observers. + * + * @param[in] evt Type of request event. + */ +static ret_code_t sdh_request_observer_notify(nrf_sdh_req_evt_t req) +{ + nrf_section_iter_t iter; + + NRF_LOG_DEBUG("State request: 0x%08X", req); + + for (nrf_section_iter_init(&iter, &sdh_req_observers); + nrf_section_iter_get(&iter) != NULL; + nrf_section_iter_next(&iter)) + { + nrf_sdh_req_observer_t * p_observer; + nrf_sdh_req_evt_handler_t handler; + + p_observer = (nrf_sdh_req_observer_t *) nrf_section_iter_get(&iter); + handler = p_observer->handler; + + if (handler(req, p_observer->p_context)) + { + NRF_LOG_DEBUG("Notify observer 0x%08X => ready", p_observer); + } + else + { + // Process is stopped. + NRF_LOG_DEBUG("Notify observer 0x%08X => blocking", p_observer); + return NRF_ERROR_BUSY; + } + } + return NRF_SUCCESS; +} + + +/**@brief Function for stage request observers. + * + * @param[in] evt Type of stage event. + */ +static void sdh_state_observer_notify(nrf_sdh_state_evt_t evt) +{ + nrf_section_iter_t iter; + + NRF_LOG_DEBUG("State change: 0x%08X", evt); + + for (nrf_section_iter_init(&iter, &sdh_state_observers); + nrf_section_iter_get(&iter) != NULL; + nrf_section_iter_next(&iter)) + { + nrf_sdh_state_observer_t * p_observer; + nrf_sdh_state_evt_handler_t handler; + + p_observer = (nrf_sdh_state_observer_t *) nrf_section_iter_get(&iter); + handler = p_observer->handler; + + handler(evt, p_observer->p_context); + } +} + + +static void softdevices_evt_irq_enable(void) +{ +#ifdef SOFTDEVICE_PRESENT + ret_code_t ret_code = sd_nvic_EnableIRQ((IRQn_Type)SD_EVT_IRQn); + APP_ERROR_CHECK(ret_code); +#else + // In case of serialization, NVIC must be accessed directly. + NVIC_EnableIRQ(SD_EVT_IRQn); +#endif +} + + +static void softdevice_evt_irq_disable(void) +{ +#ifdef SOFTDEVICE_PRESENT + ret_code_t ret_code = sd_nvic_DisableIRQ((IRQn_Type)SD_EVT_IRQn); + APP_ERROR_CHECK(ret_code); +#else + // In case of serialization, NVIC must be accessed directly. + NVIC_DisableIRQ(SD_EVT_IRQn); +#endif +} + + +#ifndef S140 +static void swi_interrupt_priority_workaround(void) +{ + // The priority of SoftDevice SWI SD_EVT_IRQn and RADIO_NOTIFICATION_IRQn in + // S132 v5.0.0, S112 v5.0.0, S212 v5.0.0 and S332 v5.0.0 is set to 6. + // Change it to APP_IRQ_PRIORITY_LOWEST (7) so that they do not preempt peripherals' interrupts. + +#ifdef SOFTDEVICE_PRESENT + ret_code_t ret_code; + ret_code = sd_nvic_SetPriority(SD_EVT_IRQn, APP_IRQ_PRIORITY_LOWEST); + APP_ERROR_CHECK(ret_code); + ret_code = sd_nvic_SetPriority(RADIO_NOTIFICATION_IRQn, APP_IRQ_PRIORITY_LOWEST); + APP_ERROR_CHECK(ret_code); +#else + // In case of serialization, NVIC must be accessed directly. + NVIC_SetPriority(SD_EVT_IRQn, APP_IRQ_PRIORITY_LOWEST); + NVIC_SetPriority(RADIO_NOTIFICATION_IRQn, APP_IRQ_PRIORITY_LOWEST); +#endif +} +#endif + + +ret_code_t nrf_sdh_enable_request(void) +{ + ret_code_t ret_code; + + if (m_nrf_sdh_enabled) + { + return NRF_ERROR_INVALID_STATE; + } + + m_nrf_sdh_continue = true; + + // Notify observers about SoftDevice enable request. + if (sdh_request_observer_notify(NRF_SDH_EVT_ENABLE_REQUEST) == NRF_ERROR_BUSY) + { + // Enable process was stopped. + return NRF_SUCCESS; + } + + // Notify observers about starting SoftDevice enable process. + sdh_state_observer_notify(NRF_SDH_EVT_STATE_ENABLE_PREPARE); + + nrf_clock_lf_cfg_t const clock_lf_cfg = + { + .source = NRF_SDH_CLOCK_LF_SRC, + .rc_ctiv = NRF_SDH_CLOCK_LF_RC_CTIV, + .rc_temp_ctiv = NRF_SDH_CLOCK_LF_RC_TEMP_CTIV, + .accuracy = NRF_SDH_CLOCK_LF_ACCURACY + }; + + CRITICAL_REGION_ENTER(); +#ifdef ANT_LICENSE_KEY + ret_code = sd_softdevice_enable(&clock_lf_cfg, app_error_fault_handler, ANT_LICENSE_KEY); +#else + ret_code = sd_softdevice_enable(&clock_lf_cfg, app_error_fault_handler); +#endif + m_nrf_sdh_enabled = (ret_code == NRF_SUCCESS); + CRITICAL_REGION_EXIT(); + + if (ret_code != NRF_SUCCESS) + { + return ret_code; + } + + m_nrf_sdh_continue = false; + m_nrf_sdh_suspended = false; + +#ifndef S140 + // Set the interrupt priority after enabling the SoftDevice, since + // sd_softdevice_enable() sets the SoftDevice interrupt priority. + swi_interrupt_priority_workaround(); +#endif + + // Enable event interrupt. + // Interrupt priority has already been set by the stack. + softdevices_evt_irq_enable(); + + // Notify observers about a finished SoftDevice enable process. + sdh_state_observer_notify(NRF_SDH_EVT_STATE_ENABLED); + + return NRF_SUCCESS; +} + + +ret_code_t nrf_sdh_disable_request(void) +{ + ret_code_t ret_code; + + if (!m_nrf_sdh_enabled) + { + return NRF_ERROR_INVALID_STATE; + } + + m_nrf_sdh_continue = true; + + // Notify observers about SoftDevice disable request. + if (sdh_request_observer_notify(NRF_SDH_EVT_DISABLE_REQUEST) == NRF_ERROR_BUSY) + { + // Disable process was stopped. + return NRF_SUCCESS; + } + + // Notify observers about starting SoftDevice disable process. + sdh_state_observer_notify(NRF_SDH_EVT_STATE_DISABLE_PREPARE); + + CRITICAL_REGION_ENTER(); + ret_code = sd_softdevice_disable(); + m_nrf_sdh_enabled = false; + CRITICAL_REGION_EXIT(); + + if (ret_code != NRF_SUCCESS) + { + return ret_code; + } + + m_nrf_sdh_continue = false; + + softdevice_evt_irq_disable(); + + // Notify observers about a finished SoftDevice enable process. + sdh_state_observer_notify(NRF_SDH_EVT_STATE_DISABLED); + + return NRF_SUCCESS; +} + + +ret_code_t nrf_sdh_request_continue(void) +{ + if (!m_nrf_sdh_continue) + { + return NRF_ERROR_INVALID_STATE; + } + + if (m_nrf_sdh_enabled) + { + return nrf_sdh_disable_request(); + } + else + { + return nrf_sdh_enable_request(); + } +} + + +bool nrf_sdh_is_enabled(void) +{ + return m_nrf_sdh_enabled; +} + + +void nrf_sdh_suspend(void) +{ + if (!m_nrf_sdh_enabled) + { + return; + } + + softdevice_evt_irq_disable(); + m_nrf_sdh_suspended = true; +} + + +void nrf_sdh_resume(void) +{ + if ((!m_nrf_sdh_suspended) || (!m_nrf_sdh_enabled)) + { + return; + } + + // Force calling ISR again to make sure that events not previously pulled have been processed. +#ifdef SOFTDEVICE_PRESENT + ret_code_t ret_code = sd_nvic_SetPendingIRQ((IRQn_Type)SD_EVT_IRQn); + APP_ERROR_CHECK(ret_code); +#else + NVIC_SetPendingIRQ((IRQn_Type)SD_EVT_IRQn); +#endif + + softdevices_evt_irq_enable(); + + m_nrf_sdh_suspended = false; +} + + +bool nrf_sdh_is_suspended(void) +{ + return (!m_nrf_sdh_enabled) || (m_nrf_sdh_suspended); +} + + +void nrf_sdh_evts_poll(void) +{ + nrf_section_iter_t iter; + + // Notify observers about pending SoftDevice event. + for (nrf_section_iter_init(&iter, &sdh_stack_observers); + nrf_section_iter_get(&iter) != NULL; + nrf_section_iter_next(&iter)) + { + nrf_sdh_stack_observer_t * p_observer; + nrf_sdh_stack_evt_handler_t handler; + + p_observer = (nrf_sdh_stack_observer_t *) nrf_section_iter_get(&iter); + handler = p_observer->handler; + + handler(p_observer->p_context); + } +} + + +#if (NRF_SDH_DISPATCH_MODEL == NRF_SDH_DISPATCH_MODEL_INTERRUPT) + +void SD_EVT_IRQHandler(void) +{ + nrf_sdh_evts_poll(); +} + +#elif (NRF_SDH_DISPATCH_MODEL == NRF_SDH_DISPATCH_MODEL_APPSH) + +/**@brief Function for polling SoftDevice events. + * + * @note This function is compatible with @ref app_sched_event_handler_t. + * + * @param[in] p_event_data Pointer to the event data. + * @param[in] event_size Size of the event data. + */ +static void appsh_events_poll(void * p_event_data, uint16_t event_size) +{ + UNUSED_PARAMETER(p_event_data); + UNUSED_PARAMETER(event_size); + + nrf_sdh_evts_poll(); +} + + +void SD_EVT_IRQHandler(void) +{ + ret_code_t ret_code = app_sched_event_put(NULL, 0, appsh_events_poll); + APP_ERROR_CHECK(ret_code); +} + +#elif (NRF_SDH_DISPATCH_MODEL == NRF_SDH_DISPATCH_MODEL_POLLING) + +#else + +#error "Unknown SoftDevice handler dispatch model." + +#endif // NRF_SDH_DISPATCH_MODEL + +#endif // NRF_MODULE_ENABLED(NRF_SDH) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh.h new file mode 100644 index 00000000000..a63e4cb7b3b --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh.h @@ -0,0 +1,305 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/** @file + * + * @defgroup nrf_sdh SoftDevice Handler + * @{ + * @ingroup app_common + * @brief API for initializing and disabling the SoftDevice. + */ + +#ifndef NRF_SDH_H__ +#define NRF_SDH_H__ + +#include +#include "sdk_config.h" +#include "sdk_errors.h" +#include "nrf_section_iter.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name Softdevice Handler dispatch models + * @{ + * @ingroup nrf_sdh */ + +/**@brief SoftDevice events are passed to the application from the interrupt context. */ +#define NRF_SDH_DISPATCH_MODEL_INTERRUPT 0 + +/**@brief SoftDevice events are passed to the application using @ref app_scheduler. + * + * @note @ref app_scheduler must be initialized before enabling the SoftDevice handler. + */ +#define NRF_SDH_DISPATCH_MODEL_APPSH 1 + +/**@brief SoftDevice events are polled manually using @ref nrf_sdh_evts_poll(). + * + * @note In this mode, a user application can also implement SD_EVT_IRQHandler() to receive a + * notification about incoming events. + */ +#define NRF_SDH_DISPATCH_MODEL_POLLING 2 + +/** @} */ + +/** + * @name SoftDevice Handler state change requests + * @{ + * @ingroup nrf_sdh */ + +/**@brief SoftDevice Handler state requests. */ +typedef enum +{ + NRF_SDH_EVT_ENABLE_REQUEST, //!< Request to enable the SoftDevice. + NRF_SDH_EVT_DISABLE_REQUEST, //!< Request to disable the SoftDevice. +} nrf_sdh_req_evt_t; + +/**@brief SoftDevice Handler state request handler. + * + * @retval true If ready for the SoftDevice to change state. + * @retval false If not ready for the SoftDevice to change state. + * If false is returned, the state change is aborted. + */ +typedef bool (*nrf_sdh_req_evt_handler_t)(nrf_sdh_req_evt_t request, void * p_context); + +/**@brief SoftDevice Handler state request observer. */ +typedef struct +{ + nrf_sdh_req_evt_handler_t handler; //!< Request handler. + void * p_context; //!< A parameter to the handler function. +} const nrf_sdh_req_observer_t; + +/**@brief Macro for registering a SoftDevice state change request observer. + * + * An observer of SoftDevice state change requests receives requests to change the state of the + * SoftDevice from enabled to disabled and vice versa. These requests may or may not be acknowledged + * by the observer, depending on the value returned by its request handler function. Thus, a + * request observer has the capability to defer the change of state of the SoftDevice. If it does + * so, it has the responsibility to call @ref nrf_sdh_request_continue when it is ready to let the + * SoftDevice change its state. If such capability is not necessary and you only need to be informed + * about changes of the SoftDevice state, use the @ref NRF_SDH_STATE_OBSERVER macro instead. + * + * @note This macro places the observer in a section named "sdh_req_observers". + * + * @param[in] _observer Name of the observer. + * @param[in] _prio Priority of the observer's event handler. + * The smaller the number, the higher the priority. + * @hideinitializer + */ +#define NRF_SDH_REQUEST_OBSERVER(_observer, _prio) \ +STATIC_ASSERT(NRF_SDH_ENABLED, "NRF_SDH_ENABLED not set!"); \ +STATIC_ASSERT(_prio < NRF_SDH_REQ_OBSERVER_PRIO_LEVELS, "Priority level unavailable."); \ +/*lint -esym(528,*_observer) -esym(529,*_observer) : Symbol not referenced. */ \ +NRF_SECTION_SET_ITEM_REGISTER(sdh_req_observers, _prio, nrf_sdh_req_observer_t const _observer) + +/** @} */ + +/** + * @name SoftDevice Handler state events + * @{ + * @ingroup nrf_sdh */ + +/**@brief SoftDevice Handler state events. */ +typedef enum +{ + NRF_SDH_EVT_STATE_ENABLE_PREPARE, //!< SoftDevice is going to be enabled. + NRF_SDH_EVT_STATE_ENABLED, //!< SoftDevice is enabled. + NRF_SDH_EVT_STATE_DISABLE_PREPARE, //!< SoftDevice is going to be disabled. + NRF_SDH_EVT_STATE_DISABLED, //!< SoftDevice is disabled. +} nrf_sdh_state_evt_t; + +/**@brief SoftDevice Handler state event handler. */ +typedef void (*nrf_sdh_state_evt_handler_t)(nrf_sdh_state_evt_t state, void * p_context); + +/**@brief SoftDevice Handler state observer. */ +typedef struct +{ + nrf_sdh_state_evt_handler_t handler; //!< State event handler. + void * p_context; //!< A parameter to the event handler. +} const nrf_sdh_state_observer_t; + +/**@brief Macro for registering a SoftDevice state observer. + * + * A SoftDevice state observer receives events when the SoftDevice state has changed or is + * about to change. These events are only meant to inform the state observer, which, contrary + * to a state change request observer, does not have the capability to defer the change of state. + * If such capability is required, use the @ref NRF_SDH_REQUEST_OBSERVER macro instead. + * + * This macro places the observer in a section named "sdh_state_observers". + * + * @param[in] _observer Name of the observer. + * @param[in] _prio Priority of the observer's event handler. + * The smaller the number, the higher the priority. + * @hideinitializer + */ +#define NRF_SDH_STATE_OBSERVER(_observer, _prio) \ +STATIC_ASSERT(NRF_SDH_ENABLED, "NRF_SDH_ENABLED not set!"); \ +STATIC_ASSERT(_prio < NRF_SDH_STATE_OBSERVER_PRIO_LEVELS, "Priority level unavailable."); \ +/*lint -esym(528,*_observer) -esym(529,*_observer) : Symbol not referenced. */ \ +NRF_SECTION_SET_ITEM_REGISTER(sdh_state_observers, _prio, static nrf_sdh_state_observer_t const _observer) + +/** @} */ + +/** + * @name SoftDevice stack events + * @{ + * @ingroup nrf_sdh */ + +/**@brief SoftDevice stack event handler. */ +typedef void (*nrf_sdh_stack_evt_handler_t)(void * p_evt); + +/**@brief SoftDevice stack event observer. */ +typedef struct +{ + nrf_sdh_stack_evt_handler_t handler; //!< SoftDevice event handler. + void * p_context; //!< A parameter to the event handler. +} const nrf_sdh_stack_observer_t; + +/**@brief Macro for registering a SoftDevice stack events observer. + * + * A SoftDevice stack event observer receives all events from the SoftDevice. These events can be + * either BLE, ANT, or SoC events. If you need to receive BLE, ANT, or SoC events separately, use the + * @ref NRF_SDH_BLE_OBSERVER, @ref NRF_SDH_ANT_OBSERVER, or @ref NRF_SDH_SOC_OBSERVER macros + * respectively. + * + * @note This macro places the observer in a section named "sdh_stack_observers". + * + * @param[in] _observer Name of the observer. + * @param[in] _prio Priority of the observer's event handler. + * The smaller the number, the higher the priority. + ** @hideinitializer + */ +#define NRF_SDH_STACK_OBSERVER(_observer, _prio) \ +STATIC_ASSERT(NRF_SDH_ENABLED, "NRF_SDH_ENABLED not set!"); \ +STATIC_ASSERT(_prio < NRF_SDH_STACK_OBSERVER_PRIO_LEVELS, "Priority level unavailable."); \ +/*lint -esym(528,*_observer) -esym(529,*_observer) : Symbol not referenced. */ \ +NRF_SECTION_SET_ITEM_REGISTER(sdh_stack_observers, _prio, static nrf_sdh_stack_observer_t const _observer) + +/** @} */ + +/**@brief Function for requesting to enable the SoftDevice. + * + * This function issues a @ref NRF_SDH_EVT_ENABLE_REQUEST request to all observers that + * were registered using the @ref NRF_SDH_REQUEST_OBSERVER macro. The observers may or + * may not acknowledge the request. If all observers acknowledge the request, the + * SoftDevice will be enabled. Otherwise, the process will be stopped and the observers + * that did not acknowledge have the responsibility to restart it by calling + * @ref nrf_sdh_request_continue when they are ready for the SoftDevice to change state. + * + * @retval NRF_SUCCESS The process is started. + * @retval NRF_ERROR_INVALID_STATE The SoftDevice is already enabled. + */ +ret_code_t nrf_sdh_enable_request(void); + + +/**@brief Function for requesting to disable the SoftDevice. + * + * This function issues a @ref NRF_SDH_EVT_DISABLE_REQUEST request to all observers that + * were registered using the @ref NRF_SDH_REQUEST_OBSERVER macro. The observers may or + * may not acknowledge the request. If all observers acknowledge the request, the + * SoftDevice will be disabled. Otherwise, the process will be stopped and the observers + * that did not acknowledge have the responsibility to restart it by calling + * @ref nrf_sdh_request_continue when they are ready for the SoftDevice to change state. + * + * @retval NRF_SUCCESS The process is started. + * @retval NRF_ERROR_INVALID_STATE The SoftDevice is already disabled. + */ +ret_code_t nrf_sdh_disable_request(void); + + +/**@brief Function for restarting the SoftDevice Enable/Disable process. + * + * Modules which did not acknowledge a @ref NRF_SDH_EVT_ENABLE_REQUEST or + * @ref NRF_SDH_EVT_DISABLE_REQUEST request must call this function to restart the + * SoftDevice state change process. + * + * @retval NRF_SUCCESS The process is restarted. + * @retval NRF_ERROR_INVALID_STATE No state change request was pending. + */ +ret_code_t nrf_sdh_request_continue(void); + + +/**@brief Function for retrieving the SoftDevice state. + * + * @retval true If the SoftDevice is enabled. + * @retval false If the SoftDevice is disabled. + */ +bool nrf_sdh_is_enabled(void); + + +/**@brief Function for stopping the incoming stack events. + * + * This function disables the SoftDevice interrupt. To resume polling for events, + * call @ref nrf_sdh_resume. + */ +void nrf_sdh_suspend(void); + + +/**@brief Function for resuming polling incoming events from the SoftDevice. */ +void nrf_sdh_resume(void); + + +/**@brief Function for retrieving the information about the module state. + * + * @retval true The SoftDevice handler is paused, and it will not fetch events from the stack. + * @retval false The SoftDevice handler is running, and it will fetch and dispatch events from + * the stack to the registered stack observers. + */ +bool nrf_sdh_is_suspended(void); + + +/**@brief Function for polling stack events from the SoftDevice. + * + * The events are passed to the application using the registered event handlers. + * + * @note @ref NRF_SDH_DISPATCH_MODEL_POLLING must be selected to use this function. + */ +void nrf_sdh_evts_poll(void); + + +#ifdef __cplusplus +} +#endif + +#endif // NRF_SDH_H__ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ant.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ant.c new file mode 100644 index 00000000000..27d1ed5ec61 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ant.c @@ -0,0 +1,162 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "sdk_common.h" +#if NRF_MODULE_ENABLED(NRF_SDH_ANT) + +#include "nrf_sdh_ant.h" + +#include "nrf_sdh.h" +#include "app_error.h" +#include "nrf_strerror.h" +#include "ant_interface.h" + + +#define NRF_LOG_MODULE_NAME nrf_sdh_ant +#if NRF_SDH_ANT_LOG_ENABLED + #define NRF_LOG_LEVEL NRF_SDH_ANT_LOG_LEVEL + #define NRF_LOG_INFO_COLOR NRF_SDH_ANT_INFO_COLOR + #define NRF_LOG_DEBUG_COLOR NRF_SDH_ANT_DEBUG_COLOR +#else + #define NRF_LOG_LEVEL 0 +#endif // NRF_SDH_ANT_LOG_ENABLED +#include "nrf_log.h" +NRF_LOG_MODULE_REGISTER(); + + +STATIC_ASSERT(NRF_SDH_ANT_TOTAL_CHANNELS_ALLOCATED <= MAX_ANT_CHANNELS); +STATIC_ASSERT(NRF_SDH_ANT_ENCRYPTED_CHANNELS <= NRF_SDH_ANT_TOTAL_CHANNELS_ALLOCATED); + +// Create section set "sdh_ant_observers". +NRF_SECTION_SET_DEF(sdh_ant_observers, nrf_sdh_ant_evt_observer_t, NRF_SDH_ANT_OBSERVER_PRIO_LEVELS); + +// Memory buffer provided in order to support channel configuration. +__ALIGN(4) static uint8_t m_ant_stack_buffer[NRF_SDH_ANT_BUF_SIZE]; + + +static bool m_stack_is_enabled; + + +ret_code_t nrf_sdh_ant_enable(void) +{ + ANT_ENABLE ant_enable_cfg = + { + .ucTotalNumberOfChannels = NRF_SDH_ANT_TOTAL_CHANNELS_ALLOCATED, + .ucNumberOfEncryptedChannels = NRF_SDH_ANT_ENCRYPTED_CHANNELS, + .usNumberOfEvents = NRF_SDH_ANT_EVENT_QUEUE_SIZE, + .pucMemoryBlockStartLocation = m_ant_stack_buffer, + .usMemoryBlockByteSize = sizeof(m_ant_stack_buffer), + }; + + ret_code_t ret_code = sd_ant_enable(&ant_enable_cfg); + if (ret_code == NRF_SUCCESS) + { + m_stack_is_enabled = true; + } + else + { + NRF_LOG_ERROR("sd_ant_enable() returned %s.", nrf_strerror_get(ret_code)); + } + + return ret_code; +} + + +/**@brief Function for polling ANT events. + * + * @param[in] p_context Context of the observer. + */ +static void nrf_sdh_ant_evts_poll(void * p_context) +{ + UNUSED_VARIABLE(p_context); + + ret_code_t ret_code; + +#ifndef SER_CONNECTIVITY + if (!m_stack_is_enabled) + { + return; + } +#else + UNUSED_VARIABLE(m_stack_is_enabled); +#endif // SER_CONNECTIVITY + + while (true) + { + ant_evt_t ant_evt; + + ret_code = sd_ant_event_get(&ant_evt.channel, &ant_evt.event, ant_evt.message.aucMessage); + if (ret_code != NRF_SUCCESS) + { + break; + } + + NRF_LOG_DEBUG("ANT Event 0x%02X Channel 0x%02X", ant_evt.event, ant_evt.channel); + + // Forward the event to ANT observers. + nrf_section_iter_t iter; + for (nrf_section_iter_init(&iter, &sdh_ant_observers); + nrf_section_iter_get(&iter) != NULL; + nrf_section_iter_next(&iter)) + { + nrf_sdh_ant_evt_observer_t * p_observer; + nrf_sdh_ant_evt_handler_t handler; + + p_observer = (nrf_sdh_ant_evt_observer_t *) nrf_section_iter_get(&iter); + handler = p_observer->handler; + + handler(&ant_evt, p_observer->p_context); + } + } + + if (ret_code != NRF_ERROR_NOT_FOUND) + { + APP_ERROR_HANDLER(ret_code); + } +} + + +NRF_SDH_STACK_OBSERVER(m_nrf_sdh_ant_evts_poll, NRF_SDH_ANT_STACK_OBSERVER_PRIO) = +{ + .handler = nrf_sdh_ant_evts_poll, + .p_context = NULL, +}; + +#endif // NRF_MODULE_ENABLED(NRF_SDH_ANT) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ant.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ant.h new file mode 100644 index 00000000000..10811d49a54 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ant.h @@ -0,0 +1,182 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/**@file + * + * @defgroup nrf_sdh_ant ANT support in SoftDevice Handler + * @{ + * @ingroup nrf_sdh + * @brief This file contains the declarations of types and functions required for ANT stack support. + */ + +#ifndef NRF_SDH_ANT_H__ +#define NRF_SDH_ANT_H__ + +#include "ant_parameters.h" +#include "app_util.h" +#include "nrf_section_iter.h" +#include "sdk_errors.h" + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#define NRF_SDH_ANT_EVT_CHANNEL_FIELD_SIZE 1 //!< Size of the channel field in ANT stack event +#define NRF_SDH_ANT_EVT_EVENT_FIELD_SIZE 1 //!< Size of the event field in ANT stack event + +/**@brief Size of the buffer provided to the ANT SoftDevice. + * @hideinitializer + */ +#define NRF_SDH_ANT_BUF_SIZE ANT_ENABLE_GET_REQUIRED_SPACE( \ + NRF_SDH_ANT_TOTAL_CHANNELS_ALLOCATED, \ + NRF_SDH_ANT_ENCRYPTED_CHANNELS, \ + NRF_SDH_ANT_BURST_QUEUE_SIZE, \ + NRF_SDH_ANT_EVENT_QUEUE_SIZE) + +/**@brief Size of the buffer provided to the ANT SoftDevice to receive ANT events. */ +#define NRF_SDH_ANT_MESSAGE_SIZE ((CEIL_DIV(MESG_BUFFER_SIZE, sizeof(uint32_t))) * sizeof(uint32_t)) + +/**@brief Size of the buffer provided to the Events Scheduler to hold ANT events. */ +#define NRF_SDH_ANT_EVT_BUF_SIZE ((CEIL_DIV(NRF_SDH_ANT_MESSAGE_SIZE + \ + NRF_SDH_ANT_EVT_CHANNEL_FIELD_SIZE + \ + NRF_SDH_ANT_EVT_EVENT_FIELD_SIZE, \ + sizeof(uint32_t))) * sizeof(uint32_t)) + + +#if !(defined(__LINT__)) +/**@brief Macro for registering an ANT observer. Modules that want to be + * notified about ANT events must register the handler using this macro. + * + * @details This macro places the observer in a section named "sdh_ant_observers". + * + * @param[in] _name Observer name. + * @param[in] _prio Priority of the observer event handler. + * The smaller the number, the higher the priority. + * @param[in] _handler ANT event handler. + * @param[in] _context Parameter to the event handler. + * @hideinitializer + */ +#define NRF_SDH_ANT_OBSERVER(_name, _prio, _handler, _context) \ +STATIC_ASSERT(NRF_SDH_ANT_ENABLED, "NRF_SDH_ANT_ENABLED not set!"); \ +STATIC_ASSERT(_prio < NRF_SDH_ANT_OBSERVER_PRIO_LEVELS, "Priority level unavailable."); \ +NRF_SECTION_SET_ITEM_REGISTER(sdh_ant_observers, _prio, static nrf_sdh_ant_evt_observer_t _name) = \ +{ \ + .handler = _handler, \ + .p_context = _context \ +} + +/**@brief Macro for registering an array of @ref nrf_sdh_ant_evt_observer_t. + * Modules that want to be notified about ANT events must register the handler using + * this macro. + * + * Each observer's handler will be dispatched an event with its relative context from @p _context. + * This macro places the observer in a section named "sdh_ant_observers". + * + * @param[in] _name Observer name. + * @param[in] _prio Priority of the observer event handler. + * The smaller the number, the higher the priority. + * @param[in] _handler ANT event handler. + * @param[in] _context An array of parameters to the event handler. + * @param[in] _cnt Number of observers to register. + * @hideinitializer + */ +#define NRF_SDH_ANT_OBSERVERS(_name, _prio, _handler, _context, _cnt) \ +STATIC_ASSERT(NRF_SDH_ANT_ENABLED, "NRF_SDH_ANT_ENABLED not set!"); \ +STATIC_ASSERT(_prio < NRF_SDH_ANT_OBSERVER_PRIO_LEVELS, "Priority level unavailable."); \ +NRF_SECTION_SET_ITEM_REGISTER(sdh_ant_observers, _prio, static nrf_sdh_ant_evt_observer_t _name[_cnt]) = \ +{ \ + MACRO_REPEAT_FOR(_cnt, HANDLER_SET, _handler, _context) \ +} + +#if !(defined(DOXYGEN)) +#define HANDLER_SET(_idx, _handler, _context) \ +{ \ + .handler = _handler, \ + .p_context = _context[_idx], \ +}, +#endif + +#else // __LINT__ + +/* Swallow semicolons */ +/*lint -save -esym(528, *) -esym(529, *) : Symbol not referenced. */ +#define NRF_SDH_ANT_OBSERVER(A, B, C, D) static int semicolon_swallow_##A +#define NRF_SDH_ANT_OBSERVERS(A, B, C, D, E) static int semicolon_swallow_##A +/*lint -restore */ + +#endif + + +/**@brief ANT stack event. */ +typedef struct +{ + ANT_MESSAGE message; //!< ANT Message. + uint8_t channel; //!< Channel number. + uint8_t event; //!< Event code. +} ant_evt_t; + +/**@brief ANT stack event handler. */ +typedef void (*nrf_sdh_ant_evt_handler_t)(ant_evt_t * p_ant_evt, void * p_context); + +/**@brief ANT event observer. */ +typedef struct +{ + nrf_sdh_ant_evt_handler_t handler; //!< ANT event handler. + void * p_context; //!< A parameter to the event handler. +} const nrf_sdh_ant_evt_observer_t; + + +/**@brief Function for configuring and enabling the ANT stack. + * + * @details The function sets the channel configuration for the stack using the parameters + * provided in the @c sdk_config file. It also assigns a correspondingly large + * buffer as a static resource. + */ +ret_code_t nrf_sdh_ant_enable(void); + +#ifdef __cplusplus +} +#endif + +#endif // NRF_SDH_ANT_H__ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ble.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ble.c new file mode 100644 index 00000000000..ed882dc88e2 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ble.c @@ -0,0 +1,324 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "sdk_common.h" +#if NRF_MODULE_ENABLED(NRF_SDH_BLE) + +#include "nrf_sdh_ble.h" + +#include "nrf_sdh.h" +#include "app_error.h" +#include "nrf_strerror.h" + + +#define NRF_LOG_MODULE_NAME nrf_sdh_ble +#if NRF_SDH_BLE_LOG_ENABLED + #define NRF_LOG_LEVEL NRF_SDH_BLE_LOG_LEVEL + #define NRF_LOG_INFO_COLOR NRF_SDH_BLE_INFO_COLOR + #define NRF_LOG_DEBUG_COLOR NRF_SDH_BLE_DEBUG_COLOR +#else + #define NRF_LOG_LEVEL 0 +#endif // NRF_SDH_BLE_LOG_ENABLED +#include "nrf_log.h" +NRF_LOG_MODULE_REGISTER(); + + +// Create section set "sdh_ble_observers". +NRF_SECTION_SET_DEF(sdh_ble_observers, nrf_sdh_ble_evt_observer_t, NRF_SDH_BLE_OBSERVER_PRIO_LEVELS); + + +//lint -save -e10 -e19 -e40 -e27 Illegal character (0x24) +#if defined(__CC_ARM) + extern uint32_t Image$$RW_IRAM1$$Base; + uint32_t const * const m_ram_start = &Image$$RW_IRAM1$$Base; +#elif defined(__ICCARM__) + extern uint32_t __ICFEDIT_region_RAM_start__; + uint32_t const * const m_ram_start = &__ICFEDIT_region_RAM_start__; +#elif defined(__SES_ARM) + extern uint32_t __app_ram_start__; + uint32_t const * const m_ram_start = &__app_ram_start__; +#elif defined(__GNUC__) + extern uint32_t __data_start__; + uint32_t const * const m_ram_start = &__data_start__; +#endif +//lint -restore + +#define RAM_START 0x20000000 +#define APP_RAM_START (uint32_t)m_ram_start + + +static bool m_stack_is_enabled; + + +ret_code_t nrf_sdh_ble_app_ram_start_get(uint32_t * p_app_ram_start) +{ + if (p_app_ram_start == NULL) + { + return NRF_ERROR_NULL; + } + + *p_app_ram_start = APP_RAM_START; + + return NRF_SUCCESS; +} + + +ret_code_t nrf_sdh_ble_default_cfg_set(uint8_t conn_cfg_tag, uint32_t * p_ram_start) +{ + uint32_t ret_code; + + ret_code = nrf_sdh_ble_app_ram_start_get(p_ram_start); + if (ret_code != NRF_SUCCESS) + { + return ret_code; + } + +#ifdef S112 + STATIC_ASSERT(NRF_SDH_BLE_CENTRAL_LINK_COUNT == 0, "When using s112, NRF_SDH_BLE_CENTRAL_LINK_COUNT must be 0."); +#endif + + // Overwrite some of the default settings of the BLE stack. + // If any of the calls to sd_ble_cfg_set() fail, log the error but carry on so that + // wrong RAM settings can be caught by nrf_sdh_ble_enable() and a meaningful error + // message will be printed to the user suggesting the correct value. + ble_cfg_t ble_cfg; + +#if (NRF_SDH_BLE_TOTAL_LINK_COUNT != 0) + // Configure the connection count. + memset(&ble_cfg, 0, sizeof(ble_cfg)); + ble_cfg.conn_cfg.conn_cfg_tag = conn_cfg_tag; + ble_cfg.conn_cfg.params.gap_conn_cfg.conn_count = NRF_SDH_BLE_TOTAL_LINK_COUNT; + ble_cfg.conn_cfg.params.gap_conn_cfg.event_length = NRF_SDH_BLE_GAP_EVENT_LENGTH; + + ret_code = sd_ble_cfg_set(BLE_CONN_CFG_GAP, &ble_cfg, *p_ram_start); + if (ret_code != NRF_SUCCESS) + { + NRF_LOG_ERROR("sd_ble_cfg_set() returned %s when attempting to set BLE_CONN_CFG_GAP.", + nrf_strerror_get(ret_code)); + } + + // Configure the connection roles. + memset(&ble_cfg, 0, sizeof(ble_cfg)); + ble_cfg.gap_cfg.role_count_cfg.periph_role_count = NRF_SDH_BLE_PERIPHERAL_LINK_COUNT; +#ifndef S112 + ble_cfg.gap_cfg.role_count_cfg.central_role_count = NRF_SDH_BLE_CENTRAL_LINK_COUNT; + ble_cfg.gap_cfg.role_count_cfg.central_sec_count = MIN(NRF_SDH_BLE_CENTRAL_LINK_COUNT, + BLE_GAP_ROLE_COUNT_CENTRAL_SEC_DEFAULT); +#endif + + ret_code = sd_ble_cfg_set(BLE_GAP_CFG_ROLE_COUNT, &ble_cfg, *p_ram_start); + if (ret_code != NRF_SUCCESS) + { + NRF_LOG_ERROR("sd_ble_cfg_set() returned %s when attempting to set BLE_GAP_CFG_ROLE_COUNT.", + nrf_strerror_get(ret_code)); + } + + // Configure the maximum ATT MTU. +#if (NRF_SDH_BLE_GATT_MAX_MTU_SIZE != 23) + memset(&ble_cfg, 0x00, sizeof(ble_cfg)); + ble_cfg.conn_cfg.conn_cfg_tag = conn_cfg_tag; + ble_cfg.conn_cfg.params.gatt_conn_cfg.att_mtu = NRF_SDH_BLE_GATT_MAX_MTU_SIZE; + + ret_code = sd_ble_cfg_set(BLE_CONN_CFG_GATT, &ble_cfg, *p_ram_start); + if (ret_code != NRF_SUCCESS) + { + NRF_LOG_ERROR("sd_ble_cfg_set() returned %s when attempting to set BLE_CONN_CFG_GATT.", + nrf_strerror_get(ret_code)); + } +#endif // NRF_SDH_BLE_GATT_MAX_MTU_SIZE != 23 +#endif // NRF_SDH_BLE_TOTAL_LINK_COUNT != 0 + + // Configure number of custom UUIDS. + memset(&ble_cfg, 0, sizeof(ble_cfg)); + ble_cfg.common_cfg.vs_uuid_cfg.vs_uuid_count = NRF_SDH_BLE_VS_UUID_COUNT; + + ret_code = sd_ble_cfg_set(BLE_COMMON_CFG_VS_UUID, &ble_cfg, *p_ram_start); + if (ret_code != NRF_SUCCESS) + { + NRF_LOG_ERROR("sd_ble_cfg_set() returned %s when attempting to set BLE_COMMON_CFG_VS_UUID.", + nrf_strerror_get(ret_code)); + } + + // Configure the GATTS attribute table. + memset(&ble_cfg, 0x00, sizeof(ble_cfg)); + ble_cfg.gatts_cfg.attr_tab_size.attr_tab_size = NRF_SDH_BLE_GATTS_ATTR_TAB_SIZE; + + ret_code = sd_ble_cfg_set(BLE_GATTS_CFG_ATTR_TAB_SIZE, &ble_cfg, *p_ram_start); + if (ret_code != NRF_SUCCESS) + { + NRF_LOG_ERROR("sd_ble_cfg_set() returned %s when attempting to set BLE_GATTS_CFG_ATTR_TAB_SIZE.", + nrf_strerror_get(ret_code)); + } + + // Configure Service Changed characteristic. + memset(&ble_cfg, 0x00, sizeof(ble_cfg)); + ble_cfg.gatts_cfg.service_changed.service_changed = NRF_SDH_BLE_SERVICE_CHANGED; + + ret_code = sd_ble_cfg_set(BLE_GATTS_CFG_SERVICE_CHANGED, &ble_cfg, *p_ram_start); + if (ret_code != NRF_SUCCESS) + { + NRF_LOG_ERROR("sd_ble_cfg_set() returned %s when attempting to set BLE_GATTS_CFG_SERVICE_CHANGED.", + nrf_strerror_get(ret_code)); + } + + return NRF_SUCCESS; +} + + +/**@brief Function for finding the end address of the RAM. */ +static uint32_t ram_end_address_get(void) +{ + uint32_t ram_total_size; + +#ifdef NRF51 + uint32_t block_size = NRF_FICR->SIZERAMBLOCKS; + ram_total_size = block_size * NRF_FICR->NUMRAMBLOCK; +#else + ram_total_size = NRF_FICR->INFO.RAM * 1024; +#endif + + return RAM_START + ram_total_size; +} + + +ret_code_t nrf_sdh_ble_enable(uint32_t * const p_app_ram_start) +{ + // Start of RAM, obtained from linker symbol. + uint32_t const app_ram_start_link = *p_app_ram_start; + + ret_code_t ret_code = sd_ble_enable(p_app_ram_start); + if (*p_app_ram_start > app_ram_start_link) + { + NRF_LOG_WARNING("Insufficient RAM allocated for the SoftDevice."); + + NRF_LOG_WARNING("Change the RAM start location from 0x%x to 0x%x.", + app_ram_start_link, *p_app_ram_start); + NRF_LOG_WARNING("Maximum RAM size for application is 0x%x.", + ram_end_address_get() - (*p_app_ram_start)); + } + else + { + NRF_LOG_DEBUG("RAM starts at 0x%x", app_ram_start_link); + if (*p_app_ram_start != app_ram_start_link) + { + NRF_LOG_DEBUG("RAM start location can be adjusted to 0x%x.", *p_app_ram_start); + + NRF_LOG_DEBUG("RAM size for application can be adjusted to 0x%x.", + ram_end_address_get() - (*p_app_ram_start)); + } + } + + if (ret_code == NRF_SUCCESS) + { + m_stack_is_enabled = true; + } + else + { + NRF_LOG_ERROR("sd_ble_enable() returned %s.", nrf_strerror_get(ret_code)); + } + + return ret_code; +} + + +/**@brief Function for polling BLE events. + * + * @param[in] p_context Context of the observer. + */ +static void nrf_sdh_ble_evts_poll(void * p_context) +{ + UNUSED_VARIABLE(p_context); + + ret_code_t ret_code; + + if (!m_stack_is_enabled) + { + return; + } + + while (true) + { + /*lint -save -e(587) */ + __ALIGN(4) uint8_t evt_buffer[NRF_SDH_BLE_EVT_BUF_SIZE]; + /*lint -restore */ + + ble_evt_t * p_ble_evt; + uint16_t evt_len = (uint16_t)sizeof(evt_buffer); + + ret_code = sd_ble_evt_get(evt_buffer, &evt_len); + if (ret_code != NRF_SUCCESS) + { + break; + } + + p_ble_evt = (ble_evt_t *)evt_buffer; + + NRF_LOG_DEBUG("BLE event: 0x%x.", p_ble_evt->header.evt_id); + + // Forward the event to BLE observers. + nrf_section_iter_t iter; + for (nrf_section_iter_init(&iter, &sdh_ble_observers); + nrf_section_iter_get(&iter) != NULL; + nrf_section_iter_next(&iter)) + { + nrf_sdh_ble_evt_observer_t * p_observer; + nrf_sdh_ble_evt_handler_t handler; + + p_observer = (nrf_sdh_ble_evt_observer_t *)nrf_section_iter_get(&iter); + handler = p_observer->handler; + + handler(p_ble_evt, p_observer->p_context); + } + } + + if (ret_code != NRF_ERROR_NOT_FOUND) + { + APP_ERROR_HANDLER(ret_code); + } +} + + +NRF_SDH_STACK_OBSERVER(m_nrf_sdh_ble_evts_poll, NRF_SDH_BLE_STACK_OBSERVER_PRIO) = +{ + .handler = nrf_sdh_ble_evts_poll, + .p_context = NULL, +}; + +#endif // NRF_MODULE_ENABLED(NRF_SDH_BLE) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ble.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ble.h new file mode 100644 index 00000000000..3693367f2f7 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ble.h @@ -0,0 +1,184 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/**@file + * + * @defgroup nrf_sdh_ble BLE support in SoftDevice Handler + * @{ + * @ingroup nrf_sdh + * @brief This file contains the declarations of types and functions required for BLE stack + * support. + */ + +#ifndef NRF_SDH_BLE_H__ +#define NRF_SDH_BLE_H__ + +#include "app_util.h" +#include "nrf_ble.h" +#include "nrf_section_iter.h" +#include "sdk_config.h" +#include "sdk_errors.h" + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** @brief Size of the buffer for a BLE event. */ +#define NRF_SDH_BLE_EVT_BUF_SIZE BLE_EVT_LEN_MAX(NRF_SDH_BLE_GATT_MAX_MTU_SIZE) + + +#if !(defined(__LINT__)) +/**@brief Macro for registering @ref nrf_sdh_soc_evt_observer_t. Modules that want to be + * notified about SoC events must register the handler using this macro. + * + * @details This macro places the observer in a section named "sdh_soc_observers". + * + * @param[in] _name Observer name. + * @param[in] _prio Priority of the observer event handler. + * The smaller the number, the higher the priority. + * @param[in] _handler BLE event handler. + * @param[in] _context Parameter to the event handler. + * @hideinitializer + */ +#define NRF_SDH_BLE_OBSERVER(_name, _prio, _handler, _context) \ +STATIC_ASSERT(NRF_SDH_BLE_ENABLED, "NRF_SDH_BLE_ENABLED not set!"); \ +STATIC_ASSERT(_prio < NRF_SDH_BLE_OBSERVER_PRIO_LEVELS, "Priority level unavailable."); \ +NRF_SECTION_SET_ITEM_REGISTER(sdh_ble_observers, _prio, static nrf_sdh_ble_evt_observer_t _name) = \ +{ \ + .handler = _handler, \ + .p_context = _context \ +} + +/**@brief Macro for registering an array of @ref nrf_sdh_ble_evt_observer_t. + * Modules that want to be notified about SoC events must register the handler using + * this macro. + * + * Each observer's handler will be dispatched an event with its relative context from @p _context. + * This macro places the observer in a section named "sdh_ble_observers". + * + * @param[in] _name Observer name. + * @param[in] _prio Priority of the observer event handler. + * The smaller the number, the higher the priority. + * @param[in] _handler BLE event handler. + * @param[in] _context An array of parameters to the event handler. + * @param[in] _cnt Number of observers to register. + * @hideinitializer + */ +#define NRF_SDH_BLE_OBSERVERS(_name, _prio, _handler, _context, _cnt) \ +STATIC_ASSERT(NRF_SDH_BLE_ENABLED, "NRF_SDH_BLE_ENABLED not set!"); \ +STATIC_ASSERT(_prio < NRF_SDH_BLE_OBSERVER_PRIO_LEVELS, "Priority level unavailable."); \ +NRF_SECTION_SET_ITEM_REGISTER(sdh_ble_observers, _prio, static nrf_sdh_ble_evt_observer_t _name[_cnt]) = \ +{ \ + MACRO_REPEAT_FOR(_cnt, HANDLER_SET, _handler, _context) \ +} + +#if !(defined(DOXYGEN)) +#define HANDLER_SET(_idx, _handler, _context) \ +{ \ + .handler = _handler, \ + .p_context = _context[_idx], \ +}, +#endif + +#else // __LINT__ + +/* Swallow semicolons */ +/*lint -save -esym(528, *) -esym(529, *) : Symbol not referenced. */ +#define NRF_SDH_BLE_OBSERVER(A, B, C, D) static int semicolon_swallow_##A +#define NRF_SDH_BLE_OBSERVERS(A, B, C, D, E) static int semicolon_swallow_##A +/*lint -restore */ + +#endif + + +/**@brief BLE stack event handler. */ +typedef void (*nrf_sdh_ble_evt_handler_t)(ble_evt_t const * p_ble_evt, void * p_context); + +/**@brief BLE event observer. */ +typedef struct +{ + nrf_sdh_ble_evt_handler_t handler; //!< BLE event handler. + void * p_context; //!< A parameter to the event handler. +} const nrf_sdh_ble_evt_observer_t; + + +/**@brief Function for retrieving the address of the start of application's RAM. + * + * @param[out] p_app_ram_start Address of the start of application's RAM. + * + * @retval NRF_SUCCESS If the address was successfully retrieved. + * @retval NRF_ERROR_NULL If @p p_app_ram_start was @c NULL. + */ +ret_code_t nrf_sdh_ble_app_ram_start_get(uint32_t * p_app_ram_start); + + +/**@brief Set the default BLE stack configuration. + * + * This function configures the BLE stack with the settings specified in the + * SoftDevice handler BLE configuration. The following configurations will be set: + * - Number of peripheral links + * - Number of central links + * - ATT MTU size (for the given connection) + * - Vendor specific UUID count + * - GATTS Attribute table size + * - Service changed + * + * @param[in] conn_cfg_tag The connection to configure. + * @param[out] p_ram_start Application RAM start address. + */ +ret_code_t nrf_sdh_ble_default_cfg_set(uint8_t conn_cfg_tag, uint32_t * p_ram_start); + + +/**@brief Function for configuring and enabling the BLE stack. + * + * @param[in] p_app_ram_start Address of the start of application's RAM. + */ +ret_code_t nrf_sdh_ble_enable(uint32_t * p_app_ram_start); + + +#ifdef __cplusplus +} +#endif + +#endif // NRF_SDH_BLE_H__ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_soc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_soc.c new file mode 100644 index 00000000000..496e731274f --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_soc.c @@ -0,0 +1,118 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "sdk_common.h" +#if NRF_MODULE_ENABLED(NRF_SDH_SOC) + +#include "nrf_sdh_soc.h" + +#include "nrf_sdh.h" +#include "nrf_soc.h" +#include "app_error.h" + + +#define NRF_LOG_MODULE_NAME nrf_sdh_soc +#if NRF_SDH_SOC_LOG_ENABLED + #define NRF_LOG_LEVEL NRF_SDH_SOC_LOG_LEVEL + #define NRF_LOG_INFO_COLOR NRF_SDH_SOC_INFO_COLOR + #define NRF_LOG_DEBUG_COLOR NRF_SDH_SOC_DEBUG_COLOR +#else + #define NRF_LOG_LEVEL 0 +#endif // NRF_SDH_SOC_LOG_ENABLED +#include "nrf_log.h" +NRF_LOG_MODULE_REGISTER(); + + +// Create section set "sdh_soc_observers". +NRF_SECTION_SET_DEF(sdh_soc_observers, nrf_sdh_soc_evt_observer_t, NRF_SDH_SOC_OBSERVER_PRIO_LEVELS); + + +/**@brief Function for polling SoC events. + * + * @param[in] p_context Context of the observer. + */ +static void nrf_sdh_soc_evts_poll(void * p_context) +{ + ret_code_t ret_code; + + UNUSED_VARIABLE(p_context); + + while (true) + { + uint32_t evt_id; + + ret_code = sd_evt_get(&evt_id); + if (ret_code != NRF_SUCCESS) + { + break; + } + + NRF_LOG_DEBUG("SoC event: 0x%x.", evt_id); + + // Forward the event to SoC observers. + nrf_section_iter_t iter; + for (nrf_section_iter_init(&iter, &sdh_soc_observers); + nrf_section_iter_get(&iter) != NULL; + nrf_section_iter_next(&iter)) + { + nrf_sdh_soc_evt_observer_t * p_observer; + nrf_sdh_soc_evt_handler_t handler; + + p_observer = (nrf_sdh_soc_evt_observer_t *) nrf_section_iter_get(&iter); + handler = p_observer->handler; + + handler(evt_id, p_observer->p_context); + } + } + + if (ret_code != NRF_ERROR_NOT_FOUND) + { + APP_ERROR_HANDLER(ret_code); + } +} + + +NRF_SDH_STACK_OBSERVER(m_nrf_sdh_soc_evts_poll, NRF_SDH_SOC_STACK_OBSERVER_PRIO) = +{ + .handler = nrf_sdh_soc_evts_poll, + .p_context = NULL, +}; + +#endif // NRF_MODULE_ENABLED(NRF_SDH_SOC) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_soc.h new file mode 100644 index 00000000000..295ce093662 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_soc.h @@ -0,0 +1,143 @@ +/** + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/**@file + * + * @defgroup nrf_sdh_soc SoC support in SoftDevice Handler + * @{ + * @ingroup nrf_sdh + * @brief This file contains the declarations of types and functions required for SoftDevice Handler + * SoC support. + */ + +#ifndef NRF_SDH_SOC_H__ +#define NRF_SDH_SOC_H__ + +#include "sdk_common.h" +#include "nrf_section_iter.h" +#include "nrf_soc.h" + +#ifdef __cplusplus +extern "C" { +#endif + + +#if !(defined(__LINT__)) +/**@brief Macro for registering @ref nrf_sdh_soc_evt_observer_t. Modules that want to be + * notified about SoC events must register the handler using this macro. + * + * @details This macro places the observer in a section named "sdh_soc_observers". + * + * @param[in] _name Observer name. + * @param[in] _prio Priority of the observer event handler. + * The smaller the number, the higher the priority. + * @param[in] _handler SoC event handler. + * @param[in] _context Parameter to the event handler. + * @hideinitializer + */ +#define NRF_SDH_SOC_OBSERVER(_name, _prio, _handler, _context) \ +STATIC_ASSERT(NRF_SDH_SOC_ENABLED, "NRF_SDH_SOC_ENABLED not set!"); \ +STATIC_ASSERT(_prio < NRF_SDH_SOC_OBSERVER_PRIO_LEVELS, "Priority level unavailable."); \ +NRF_SECTION_SET_ITEM_REGISTER(sdh_soc_observers, _prio, static nrf_sdh_soc_evt_observer_t _name) = \ +{ \ + .handler = _handler, \ + .p_context = _context \ +} + +/**@brief Macro for registering an array of @ref nrf_sdh_soc_evt_observer_t. + * Modules that want to be notified about SoC events must register the handler using + * this macro. + * + * Each observer's handler will be dispatched an event with its relative context from @p _context. + * This macro places the observer in a section named "sdh_soc_observers". + * + * @param[in] _name Observer name. + * @param[in] _prio Priority of the observer event handler. + * The smaller the number, the higher the priority. + * @param[in] _handler SoC event handler. + * @param[in] _context An array of parameters to the event handler. + * @param[in] _cnt Number of observers to register. + * @hideinitializer + */ +#define NRF_SDH_SOC_EVENT_OBSERVERS(_name, _prio, _handler, _context, _cnt) \ +STATIC_ASSERT(NRF_SDH_SOC_ENABLED, "NRF_SDH_SOC_ENABLED not set!"); \ +STATIC_ASSERT(_prio < NRF_SDH_SOC_OBSERVER_PRIO_LEVELS, "Priority level unavailable."); \ +NRF_SECTION_SET_ITEM_REGISTER(sdh_soc_observers, _prio, static nrf_sdh_soc_evt_observer_t _name[_cnt]) = \ +{ \ + MACRO_REPEAT_FOR(_cnt, HANDLER_SET, _handler, _context) \ +} + +#if !(defined(DOXYGEN)) +#define HANDLER_SET(_idx, _handler, _context) \ +{ \ + .handler = _handler, \ + .p_context = _context[_idx], \ +}, +#endif + +#else // __LINT__ + +/* Swallow semicolons */ +/*lint -save -esym(528, *) -esym(529, *) : Symbol not referenced. */ +#define NRF_SDH_SOC_OBSERVER(A, B, C, D) static int semicolon_swallow_##A +#define NRF_SDH_SOC_OBSERVERS(A, B, C, D, E) static int semicolon_swallow_##A +/*lint -restore */ + +#endif + + +/**@brief SoC event handler. */ +typedef void (*nrf_sdh_soc_evt_handler_t) (uint32_t evt_id, void * p_context); + +/**@brief SoC event observer. */ +typedef struct +{ + nrf_sdh_soc_evt_handler_t handler; //!< SoC event handler. + void * p_context; //!< A parameter to the event handler. +} const nrf_sdh_soc_evt_observer_t; + + +#ifdef __cplusplus +} +#endif + +#endif // NRF_SDH_SOC_H__ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_ble.h similarity index 100% rename from targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/ble.h rename to targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_ble.h diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/mbed_lib.json b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/mbed_lib.json new file mode 100644 index 00000000000..315f77a6fd3 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/mbed_lib.json @@ -0,0 +1,38 @@ +{ + "name": "softdevice", + "macros": [ + "SOFTDEVICE_PRESENT=1", + "S140", + "BLE_STACK_SUPPORT_REQD", + "NRF_SDH_CLOCK_LF_SRC=1", + "NRF_SDH_CLOCK_LF_RC_CTIV=0", + "NRF_SDH_CLOCK_LF_RC_TEMP_CTIV=0", + "NRF_SDH_CLOCK_LF_XTAL_ACCURACY=7", + "NRF_SD_BLE_API_VERSION=5", + "NRF_SDH_ENABLED=1", + "NRF_SDH_BLE_ENABLED=1", + "PEER_MANAGER_ENABLED=1", + "NRF_SDH_BLE_GATT_MAX_MTU_SIZE=23", + "NRF_SDH_BLE_OBSERVER_PRIO_LEVELS=4", + "NRF_SDH_BLE_GAP_EVENT_LENGTH=3", + "BLE_ADV_BLE_OBSERVER_PRIO=1", + "BLE_CONN_STATE_BLE_OBSERVER_PRIO=0", + "BLE_CONN_PARAMS_BLE_OBSERVER_PRIO=1", + "NRF_BLE_GATT_BLE_OBSERVER_PRIO=1", + "NRF_SDH_DISPATCH_MODEL=2", + "NRF_SDH_SOC_ENABLED=1", + "NRF_SDH_STACK_OBSERVER_PRIO_LEVELS=2", + "NRF_SDH_STATE_OBSERVER_PRIO_LEVELS=2", + "NRF_SDH_SOC_OBSERVER_PRIO_LEVELS=2", + "NRF_SDH_REQ_OBSERVER_PRIO_LEVELS=2", + "NRF_SDH_BLE_STACK_OBSERVER_PRIO=0", + "NRF_SDH_SOC_STACK_OBSERVER_PRIO=0", + "FDS_BACKEND=2", + "SWI_DISABLE1=1" + ], + "target_overrides": { + "*": { + "target.bootloader_img": "hex/s140_nrf52_6.0.0_softdevice.hex" + } + } +} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fds/fds.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fds/fds.c new file mode 100644 index 00000000000..99ddc669313 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fds/fds.c @@ -0,0 +1,2164 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "sdk_common.h" +#if NRF_MODULE_ENABLED(FDS) +#include "fds.h" +#include "fds_internal_defs.h" + +#include +#include +#include +#include "nrf_error.h" +#include "nrf_atomic.h" +#include "nrf_atfifo.h" + +#include "nrf_fstorage.h" +#if (FDS_BACKEND == NRF_FSTORAGE_SD) +#include "nrf_fstorage_sd.h" +#elif (FDS_BACKEND == NRF_FSTORAGE_NVMC) +#include "nrf_fstorage_nvmc.h" +#else +#error Invalid FDS backend. +#endif + +#if (FDS_CRC_CHECK_ON_READ) +#include "crc16.h" +#endif + + +static void fs_event_handler(nrf_fstorage_evt_t * evt); + +NRF_FSTORAGE_DEF(nrf_fstorage_t m_fs) = +{ + // The flash area boundaries are set in fds_init(). + .evt_handler = fs_event_handler, +}; + +// Internal status flags. +static struct +{ + bool volatile initialized; + nrf_atomic_flag_t initializing; +} m_flags; + +// The number of queued operations. +// Incremented by queue_start() and decremented by queue_has_next(). +static nrf_atomic_u32_t m_queued_op_cnt; + +// The number of registered users and their callback functions. +static nrf_atomic_u32_t m_users; +static fds_cb_t m_cb_table[FDS_MAX_USERS]; + +// The latest (largest) record ID written so far. +static nrf_atomic_u32_t m_latest_rec_id; + +// Queue of fds operations. +NRF_ATFIFO_DEF(m_queue, fds_op_t, FDS_OP_QUEUE_SIZE); + +// Structures used to hold informations about virtual pages. +static fds_page_t m_pages[FDS_DATA_PAGES]; +static fds_swap_page_t m_swap_page; + +// Garbage collection data. +static fds_gc_data_t m_gc; + + +static void event_send(fds_evt_t const * const p_evt) +{ + for (uint32_t user = 0; user < FDS_MAX_USERS; user++) + { + if (m_cb_table[user] != NULL) + { + m_cb_table[user](p_evt); + } + } +} + + +static void event_prepare(fds_op_t const * const p_op, fds_evt_t * const p_evt) +{ + switch (p_op->op_code) + { + case FDS_OP_INIT: + p_evt->id = FDS_EVT_INIT; + break; + + case FDS_OP_WRITE: + p_evt->id = FDS_EVT_WRITE; + p_evt->write.file_id = p_op->write.header.file_id; + p_evt->write.record_key = p_op->write.header.record_key; + p_evt->write.record_id = p_op->write.header.record_id; + p_evt->write.is_record_updated = 0; + break; + + case FDS_OP_UPDATE: + p_evt->id = FDS_EVT_UPDATE; + p_evt->write.file_id = p_op->write.header.file_id; + p_evt->write.record_key = p_op->write.header.record_key; + p_evt->write.record_id = p_op->write.header.record_id; + p_evt->write.is_record_updated = (p_op->write.step == FDS_OP_WRITE_DONE); + break; + + case FDS_OP_DEL_RECORD: + p_evt->id = FDS_EVT_DEL_RECORD; + p_evt->del.file_id = p_op->del.file_id; + p_evt->del.record_key = p_op->del.record_key; + p_evt->del.record_id = p_op->del.record_to_delete; + break; + + case FDS_OP_DEL_FILE: + p_evt->id = FDS_EVT_DEL_FILE; + p_evt->del.file_id = p_op->del.file_id; + p_evt->del.record_key = FDS_RECORD_KEY_DIRTY; + p_evt->del.record_id = 0; + break; + + case FDS_OP_GC: + p_evt->id = FDS_EVT_GC; + break; + + default: + // Should not happen. + break; + } +} + + +static bool header_has_next(fds_header_t const * p_hdr, uint32_t const * p_page_end) +{ + uint32_t const * const p_hdr32 = (uint32_t*)p_hdr; + return ( ( p_hdr32 < p_page_end) + && (*p_hdr32 != FDS_ERASED_WORD)); // Check last to be on the safe side (dereference) +} + + +// Jump to the next header. +static fds_header_t const * header_jump(fds_header_t const * const p_hdr) +{ + return (fds_header_t*)((uint32_t*)p_hdr + FDS_HEADER_SIZE + p_hdr->length_words); +} + + +static fds_header_status_t header_check(fds_header_t const * p_hdr, uint32_t const * p_page_end) +{ + if (((uint32_t*)header_jump(p_hdr) > p_page_end)) + { + // The length field would jump across the page boundary. + // FDS won't allow writing such a header, therefore it has been corrupted. + return FDS_HEADER_CORRUPT; + } + + if ( (p_hdr->file_id == FDS_FILE_ID_INVALID) + || (p_hdr->record_key == FDS_RECORD_KEY_DIRTY)) + { + return FDS_HEADER_DIRTY; + } + + return FDS_HEADER_VALID; +} + + +static bool address_is_valid(uint32_t const * const p_addr) +{ + return ((p_addr != NULL) && + (p_addr >= (uint32_t*)m_fs.start_addr) && + (p_addr <= (uint32_t*)m_fs.end_addr) && + (is_word_aligned(p_addr))); +} + + +// Reads a page tag, and determines if the page is used to store data or as swap. +static fds_page_type_t page_identify(uint32_t const * const p_page_addr) +{ + if ( (p_page_addr == NULL) // Should never happen. + || (p_page_addr[FDS_PAGE_TAG_WORD_0] != FDS_PAGE_TAG_MAGIC)) + { + return FDS_PAGE_UNDEFINED; + } + + switch (p_page_addr[FDS_PAGE_TAG_WORD_1]) + { + case FDS_PAGE_TAG_SWAP: + return FDS_PAGE_SWAP; + + case FDS_PAGE_TAG_DATA: + return FDS_PAGE_DATA; + + default: + return FDS_PAGE_UNDEFINED; + } +} + + +static bool page_is_erased(uint32_t const * const p_page_addr) +{ + for (uint32_t i = 0; i < FDS_PAGE_SIZE; i++) + { + if (*(p_page_addr + i) != FDS_ERASED_WORD) + { + return false; + } + } + + return true; +} + + +// NOTE: Must be called from within a critical section. +static bool page_has_space(uint16_t page, uint16_t length_words) +{ + length_words += m_pages[page].write_offset; + length_words += m_pages[page].words_reserved; + return (length_words < FDS_PAGE_SIZE); +} + + +// Given a pointer to a record, find the index of the page on which it is stored. +// Returns FDS_SUCCESS if the page is found, FDS_ERR_NOT_FOUND otherwise. +static ret_code_t page_from_record(uint16_t * const p_page, uint32_t const * const p_rec) +{ + ret_code_t ret = FDS_ERR_NOT_FOUND; + + CRITICAL_SECTION_ENTER(); + for (uint16_t i = 0; i < FDS_DATA_PAGES; i++) + { + if ((p_rec > m_pages[i].p_addr) && + (p_rec < m_pages[i].p_addr + FDS_PAGE_SIZE)) + { + ret = FDS_SUCCESS; + *p_page = i; + break; + } + } + CRITICAL_SECTION_EXIT(); + + return ret; +} + + +// Scan a page to determine how many words have been written to it. +// This information is used to set the page write offset during initialization. +// Additionally, this function updates the latest record ID as it proceeds. +// If an invalid record header is found, the can_gc argument is set to true. +static void page_scan(uint32_t const * p_addr, + uint16_t * const words_written, + bool * const can_gc) +{ + uint32_t const * const p_page_end = p_addr + FDS_PAGE_SIZE; + + p_addr += FDS_PAGE_TAG_SIZE; + *words_written = FDS_PAGE_TAG_SIZE; + + fds_header_t const * p_header = (fds_header_t*)p_addr; + + while (header_has_next(p_header, p_page_end)) + { + fds_header_status_t hdr = header_check(p_header, p_page_end); + + if (hdr == FDS_HEADER_VALID) + { + // Update the latest (largest) record ID. + if (p_header->record_id > m_latest_rec_id) + { + m_latest_rec_id = p_header->record_id; + } + } + else + { + if (can_gc != NULL) + { + *can_gc = true; + } + + if (hdr == FDS_HEADER_CORRUPT) + { + // It could happen that a record has a corrupt header which would set a + // wrong offset for this page. In such cases, update this value to its maximum, + // to ensure that no new records will be written to this page and to enable + // correct statistics reporting by fds_stat(). + *words_written = FDS_PAGE_SIZE; + + // We can't continue to scan this page. + return; + } + } + + *words_written += (FDS_HEADER_SIZE + p_header->length_words); + p_header = header_jump(p_header); + } +} + + +static void page_offsets_update(fds_page_t * const p_page, fds_op_t const * p_op) +{ + // If the first part of the header has been written correctly, update the offset as normal. + // Even if the record has not been written completely, fds is still able to continue normal + // operation. Incomplete records will be deleted the next time garbage collection is run. + // If we failed at the very beginning of the write operation, restore the offset + // to the previous value so that no holes will be left in the flash. + if (p_op->write.step > FDS_OP_WRITE_RECORD_ID) + { + p_page->write_offset += (FDS_HEADER_SIZE + p_op->write.header.length_words); + } + + p_page->words_reserved -= (FDS_HEADER_SIZE + p_op->write.header.length_words); +} + + +// Tags a page as swap, i.e., reserved for GC. +static ret_code_t page_tag_write_swap(void) +{ + // The tag needs to be statically allocated since it is not buffered by fstorage. + static uint32_t const page_tag_swap[] = {FDS_PAGE_TAG_MAGIC, FDS_PAGE_TAG_SWAP}; + return nrf_fstorage_write(&m_fs, (uint32_t)m_swap_page.p_addr, page_tag_swap, FDS_PAGE_TAG_SIZE * sizeof(uint32_t), NULL); +} + + +// Tags a page as data, i.e, ready for storage. +static ret_code_t page_tag_write_data(uint32_t const * const p_page_addr) +{ + // The tag needs to be statically allocated since it is not buffered by fstorage. + static uint32_t const page_tag_data[] = {FDS_PAGE_TAG_MAGIC, FDS_PAGE_TAG_DATA}; + return nrf_fstorage_write(&m_fs, (uint32_t)p_page_addr, page_tag_data, FDS_PAGE_TAG_SIZE * sizeof(uint32_t), NULL); +} + + +// Reserve space on a page. +// NOTE: this function takes into the account the space required for the record header. +static ret_code_t write_space_reserve(uint16_t length_words, uint16_t * p_page) +{ + bool space_reserved = false; + uint16_t const total_len_words = length_words + FDS_HEADER_SIZE; + + if (total_len_words >= FDS_PAGE_SIZE - FDS_PAGE_TAG_SIZE) + { + return FDS_ERR_RECORD_TOO_LARGE; + } + + CRITICAL_SECTION_ENTER(); + for (uint16_t page = 0; page < FDS_DATA_PAGES; page++) + { + if ((m_pages[page].page_type == FDS_PAGE_DATA) && + (page_has_space(page, total_len_words))) + { + space_reserved = true; + *p_page = page; + + m_pages[page].words_reserved += total_len_words; + break; + } + } + CRITICAL_SECTION_EXIT(); + + return (space_reserved) ? FDS_SUCCESS : FDS_ERR_NO_SPACE_IN_FLASH; +} + + +// Undo a write_space_reserve() call. +// NOTE: Must be called within a critical section. +static void write_space_free(uint16_t length_words, uint16_t page) +{ + m_pages[page].words_reserved -= (length_words + FDS_HEADER_SIZE); +} + + +static uint32_t record_id_new(void) +{ + return nrf_atomic_u32_add(&m_latest_rec_id, 1); +} + + +// Given a page and a record, find the next valid record on that page. +// If p_record is NULL, search from the beginning of the page, +// otherwise, resume searching from p_record. +// Return true if a record is found, false otherwise. +// If no record is found, p_record is unchanged. +static bool record_find_next(uint16_t page, uint32_t const ** p_record) +{ + uint32_t const * p_page_end = (m_pages[page].p_addr + FDS_PAGE_SIZE); + + // If this is the first call on this page, start searching from its beginning. + // Otherwise, jump to the next record. + fds_header_t const * p_header = (fds_header_t*)(*p_record); + + if (p_header != NULL) + { + p_header = header_jump(p_header); + } + else + { + p_header = (fds_header_t*)(m_pages[page].p_addr + FDS_PAGE_TAG_SIZE); + } + + // Read records from the page until: + // - a valid record is found or + // - the last record on a page is found + + while (header_has_next(p_header, p_page_end)) + { + switch (header_check(p_header, p_page_end)) + { + case FDS_HEADER_VALID: + *p_record = (uint32_t*)p_header; + return true; + + case FDS_HEADER_DIRTY: + p_header = header_jump(p_header); + break; + + case FDS_HEADER_CORRUPT: + // We can't reliably jump over this record. + // There is nothing more we can do on this page. + return false; + } + } + + // No more valid records on this page. + return false; +} + + +// Find a record given its descriptor and retrive the page in which the record is stored. +// NOTE: Do not pass NULL as an argument for p_page. +static bool record_find_by_desc(fds_record_desc_t * const p_desc, uint16_t * const p_page) +{ + // If the gc_run_count field in the descriptor matches our counter, then the record has + // not been moved. If the address is valid, and the record ID matches, there is no need + // to find the record again. Only lookup the page in which the record is stored. + + if ((address_is_valid(p_desc->p_record)) && + (p_desc->gc_run_count == m_gc.run_count) && + (p_desc->record_id == ((fds_header_t*)p_desc->p_record)->record_id)) + { + return (page_from_record(p_page, p_desc->p_record) == FDS_SUCCESS); + } + + // Otherwise, find the record in flash. + for (*p_page = 0; *p_page < FDS_DATA_PAGES; (*p_page)++) + { + // Set p_record to NULL to make record_find_next() search from the beginning of the page. + uint32_t const * p_record = NULL; + + while (record_find_next(*p_page, &p_record)) + { + fds_header_t const * const p_header = (fds_header_t*)p_record; + if (p_header->record_id == p_desc->record_id) + { + p_desc->p_record = p_record; + p_desc->gc_run_count = m_gc.run_count; + return true; + } + } + } + + return false; +} + + +// Search for a record and return its descriptor. +// If p_file_id is NULL, only the record key will be used for matching. +// If p_record_key is NULL, only the file ID will be used for matching. +// If both are NULL, it will iterate through all records. +static ret_code_t record_find(uint16_t const * p_file_id, + uint16_t const * p_record_key, + fds_record_desc_t * p_desc, + fds_find_token_t * p_token) +{ + if (!m_flags.initialized) + { + return FDS_ERR_NOT_INITIALIZED; + } + + if (p_desc == NULL || p_token == NULL) + { + return FDS_ERR_NULL_ARG; + } + + // Begin (or resume) searching for a record. + for (; p_token->page < FDS_DATA_PAGES; p_token->page++) + { + if (m_pages[p_token->page].page_type != FDS_PAGE_DATA) + { + // It might be that the page is FDS_PAGE_UNDEFINED. + // Skip this page. + continue; + } + + while (record_find_next(p_token->page, &p_token->p_addr)) + { + fds_header_t const * p_header = (fds_header_t*)p_token->p_addr; + + // A valid record was found, check its header for a match. + if ((p_file_id != NULL) && + (p_header->file_id != *p_file_id)) + { + continue; + } + + if ((p_record_key != NULL) && + (p_header->record_key != *p_record_key)) + { + continue; + } + + // Record found; update the descriptor. + p_desc->record_id = p_header->record_id; + p_desc->p_record = p_token->p_addr; + p_desc->gc_run_count = m_gc.run_count; + + return FDS_SUCCESS; + } + + // We have scanned an entire page. Set the address in the token to NULL + // so that it will be updated in the next iteration. + p_token->p_addr = NULL; + } + + return FDS_ERR_NOT_FOUND; +} + + +// Retrieve statistics about dirty records on a page. +static void records_stat(uint16_t page, + uint16_t * p_valid_records, + uint16_t * p_dirty_records, + uint16_t * p_freeable_words, + bool * p_corruption) +{ + fds_header_t const * p_header = (fds_header_t*)(m_pages[page].p_addr + FDS_PAGE_TAG_SIZE); + uint32_t const * const p_page_end = (m_pages[page].p_addr + FDS_PAGE_SIZE); + + while (header_has_next(p_header, p_page_end)) + { + switch (header_check(p_header, p_page_end)) + { + case FDS_HEADER_DIRTY: + *p_dirty_records += 1; + *p_freeable_words += FDS_HEADER_SIZE + p_header->length_words; + p_header = header_jump(p_header); + break; + + case FDS_HEADER_VALID: + *p_valid_records += 1; + p_header = header_jump(p_header); + break; + + case FDS_HEADER_CORRUPT: + { + *p_dirty_records += 1; + *p_freeable_words += (p_page_end - (uint32_t*)p_header); + *p_corruption = true; + // We can't continue on this page. + return; + } + + default: + break; + } + } +} + + +// Get a buffer on the queue of operations. +static fds_op_t * queue_buf_get(nrf_atfifo_item_put_t * p_iput_ctx) +{ + fds_op_t * const p_op = (fds_op_t*) nrf_atfifo_item_alloc(m_queue, p_iput_ctx); + + memset(p_op, 0x00, sizeof(fds_op_t)); + return p_op; +} + + +// Commit a buffer to the queue of operations. +static void queue_buf_store(nrf_atfifo_item_put_t * p_iput_ctx) +{ + (void) nrf_atfifo_item_put(m_queue, p_iput_ctx); +} + + +// Load the next operation from the queue. +static fds_op_t * queue_load(nrf_atfifo_item_get_t * p_iget_ctx) +{ + return (fds_op_t*) nrf_atfifo_item_get(m_queue, p_iget_ctx); +} + + +// Free the currently loaded operation. +static void queue_free(nrf_atfifo_item_get_t * p_iget_ctx) +{ + // Free the current queue element. + (void) nrf_atfifo_item_free(m_queue, p_iget_ctx); +} + + +static bool queue_has_next(void) +{ + // Decrement the number of queued operations. + ASSERT(m_queued_op_cnt != 0); + return nrf_atomic_u32_sub(&m_queued_op_cnt, 1); +} + + +// This function is called during initialization to setup the page structure (m_pages) and +// provide additional information regarding eventual further initialization steps. +static fds_init_opts_t pages_init(void) +{ + uint32_t ret = NO_PAGES; + uint16_t page = 0; + uint16_t total_pages_available = FDS_VIRTUAL_PAGES; + bool swap_set_but_not_found = false; + + for (uint16_t i = 0; i < FDS_VIRTUAL_PAGES; i++) + { + uint32_t const * const p_page_addr = (uint32_t*)m_fs.start_addr + (i * FDS_PAGE_SIZE); + fds_page_type_t const page_type = page_identify(p_page_addr); + + switch (page_type) + { + case FDS_PAGE_UNDEFINED: + { + if (page_is_erased(p_page_addr)) + { + if (m_swap_page.p_addr != NULL) + { + // If a swap page is already set, flag the page as erased (in m_pages) + // and try to tag it as data (in flash) later on during initialization. + m_pages[page].page_type = FDS_PAGE_ERASED; + m_pages[page].p_addr = p_page_addr; + m_pages[page].write_offset = FDS_PAGE_TAG_SIZE; + + // This is a candidate for a potential new swap page, in case the + // current swap is going to be promoted to complete a GC instance. + m_gc.cur_page = page; + page++; + } + else + { + // If there is no swap page yet, use this one. + m_swap_page.p_addr = p_page_addr; + m_swap_page.write_offset = FDS_PAGE_TAG_SIZE; + swap_set_but_not_found = true; + } + + ret |= PAGE_ERASED; + } + else + { + // The page contains non-FDS data. + // Do not initialize or use this page. + total_pages_available--; + m_pages[page].p_addr = p_page_addr; + m_pages[page].page_type = FDS_PAGE_UNDEFINED; + page++; + } + } break; + + case FDS_PAGE_DATA: + { + m_pages[page].page_type = FDS_PAGE_DATA; + m_pages[page].p_addr = p_page_addr; + + // Scan the page to compute its write offset and determine whether or not the page + // can be garbage collected. Additionally, update the latest kwown record ID. + page_scan(p_page_addr, &m_pages[page].write_offset, &m_pages[page].can_gc); + + ret |= PAGE_DATA; + page++; + } break; + + case FDS_PAGE_SWAP: + { + if (swap_set_but_not_found) + { + m_pages[page].page_type = FDS_PAGE_ERASED; + m_pages[page].p_addr = m_swap_page.p_addr; + m_pages[page].write_offset = FDS_PAGE_TAG_SIZE; + + page++; + } + + m_swap_page.p_addr = p_page_addr; + // If the swap is promoted, this offset should be kept, otherwise, + // it should be set to FDS_PAGE_TAG_SIZE. + page_scan(p_page_addr, &m_swap_page.write_offset, NULL); + + ret |= (m_swap_page.write_offset == FDS_PAGE_TAG_SIZE) ? + PAGE_SWAP_CLEAN : PAGE_SWAP_DIRTY; + } break; + + default: + // Shouldn't happen. + break; + } + } + + if (total_pages_available < 2) + { + ret &= NO_PAGES; + } + + return (fds_init_opts_t)ret; +} + + +// Write the first part of a record header (the key and length). +static ret_code_t record_header_write_begin(fds_op_t * const p_op, uint32_t * const p_addr) +{ + ret_code_t ret; + + // Write the record ID next. + p_op->write.step = FDS_OP_WRITE_RECORD_ID; + + ret = nrf_fstorage_write(&m_fs, (uint32_t)(p_addr + FDS_OFFSET_TL), + &p_op->write.header.record_key, FDS_HEADER_SIZE_TL * sizeof(uint32_t), NULL); + + return (ret == NRF_SUCCESS) ? FDS_SUCCESS : FDS_ERR_BUSY; +} + + +static ret_code_t record_header_write_id(fds_op_t * const p_op, uint32_t * const p_addr) +{ + ret_code_t ret; + + // If this record has no data, write the last part of the header directly. + // Otherwise, write the record data next. + p_op->write.step = (p_op->write.p_data != NULL) ? + FDS_OP_WRITE_DATA : FDS_OP_WRITE_HEADER_FINALIZE; + + ret = nrf_fstorage_write(&m_fs, (uint32_t)(p_addr + FDS_OFFSET_ID), + &p_op->write.header.record_id, FDS_HEADER_SIZE_ID * sizeof(uint32_t), NULL); + + return (ret == NRF_SUCCESS) ? FDS_SUCCESS : FDS_ERR_BUSY; +} + + +static ret_code_t record_header_write_finalize(fds_op_t * const p_op, uint32_t * const p_addr) +{ + ret_code_t ret; + + // If this is a simple write operation, then this is the last step. + // If this is an update instead, delete the old record next. + p_op->write.step = (p_op->op_code == FDS_OP_UPDATE) ? + FDS_OP_WRITE_FLAG_DIRTY : FDS_OP_WRITE_DONE; + + ret = nrf_fstorage_write(&m_fs, (uint32_t)(p_addr + FDS_OFFSET_IC), + &p_op->write.header.file_id, FDS_HEADER_SIZE_IC * sizeof(uint32_t), NULL); + + return (ret == NRF_SUCCESS) ? FDS_SUCCESS : FDS_ERR_BUSY; +} + + +static ret_code_t record_header_flag_dirty(uint32_t * const p_record, uint16_t page_to_gc) +{ + // Used to flag a record as dirty, i.e. ready for garbage collection. + // Must be statically allocated since it will be written to flash. + __ALIGN(4) static uint32_t const dirty_header = {0xFFFF0000}; + + // Flag the record as dirty. + ret_code_t ret; + + ret = nrf_fstorage_write(&m_fs, (uint32_t)p_record, + &dirty_header, FDS_HEADER_SIZE_TL * sizeof(uint32_t), NULL); + + if (ret != NRF_SUCCESS) + { + return FDS_ERR_BUSY; + } + + m_pages[page_to_gc].can_gc = true; + + return FDS_SUCCESS; +} + + +static ret_code_t record_find_and_delete(fds_op_t * const p_op) +{ + ret_code_t ret; + uint16_t page; + fds_record_desc_t desc = {0}; + + desc.record_id = p_op->del.record_to_delete; + + if (record_find_by_desc(&desc, &page)) + { + fds_header_t const * const p_header = (fds_header_t const *)desc.p_record; + + // Copy the record key and file ID, so that they can be returned in the event. + // In case this function is run as part of an update, there is no need to copy + // the file ID and record key since they are present in the header stored + // in the queue element. + + p_op->del.file_id = p_header->file_id; + p_op->del.record_key = p_header->record_key; + + // Flag the record as dirty. + ret = record_header_flag_dirty((uint32_t*)desc.p_record, page); + } + else + { + // The record never existed, or it has already been deleted. + ret = FDS_ERR_NOT_FOUND; + } + + return ret; +} + + +// Finds a record within a file and flags it as dirty. +static ret_code_t file_find_and_delete(fds_op_t * const p_op) +{ + ret_code_t ret; + fds_record_desc_t desc; + + // This token must persist across calls. + static fds_find_token_t tok = {0}; + + // Pass NULL to ignore the record key. + ret = record_find(&p_op->del.file_id, NULL, &desc, &tok); + + if (ret == FDS_SUCCESS) + { + // A record was found: flag it as dirty. + ret = record_header_flag_dirty((uint32_t*)desc.p_record, tok.page); + } + else // FDS_ERR_NOT_FOUND + { + // No more records were found. Zero the token, so that it can be reused. + memset(&tok, 0x00, sizeof(fds_find_token_t)); + } + + return ret; +} + + +// Writes record data to flash. +static ret_code_t record_write_data(fds_op_t * const p_op, uint32_t * const p_addr) +{ + ret_code_t ret; + + p_op->write.step = FDS_OP_WRITE_HEADER_FINALIZE; + + ret = nrf_fstorage_write(&m_fs, (uint32_t)(p_addr + FDS_OFFSET_DATA), + p_op->write.p_data, p_op->write.header.length_words * sizeof(uint32_t), NULL); + + return (ret == NRF_SUCCESS) ? FDS_SUCCESS : FDS_ERR_BUSY; +} + + +#if (FDS_CRC_CHECK_ON_READ) +static bool crc_verify_success(uint16_t crc, uint16_t len_words, uint32_t const * const p_data) +{ + uint16_t computed_crc; + + // The CRC is computed on the entire record, except the CRC field itself. + // The record header is 12 bytes, out of these we have to skip bytes 6 to 8 where the + // CRC itself is stored. Then we compute the CRC for the rest of the record, from byte 8 of + // the header (where the record ID begins) to the end of the record data. + computed_crc = crc16_compute((uint8_t const *)p_data, 6, NULL); + computed_crc = crc16_compute((uint8_t const *)p_data + 8, + (FDS_HEADER_SIZE_ID + len_words) * sizeof(uint32_t), + &computed_crc); + + return (computed_crc == crc); +} +#endif + + +static void gc_init(void) +{ + m_gc.run_count++; + m_gc.cur_page = 0; + m_gc.resume = false; + + // Setup which pages to GC. Defer checking for open records and the can_gc flag, + // as other operations might change those while GC is running. + for (uint16_t i = 0; i < FDS_DATA_PAGES; i++) + { + m_gc.do_gc_page[i] = (m_pages[i].page_type == FDS_PAGE_DATA); + } +} + + +// Obtain the next page to be garbage collected. +// Returns true if there are pages left to garbage collect, returns false otherwise. +static bool gc_page_next(uint16_t * const p_next_page) +{ + bool ret = false; + + for (uint16_t i = 0; i < FDS_DATA_PAGES; i++) + { + if (m_gc.do_gc_page[i]) + { + // Do not attempt to GC this page again. + m_gc.do_gc_page[i] = false; + + // Only GC pages with no open records and with some records which have been deleted. + if ((m_pages[i].records_open == 0) && (m_pages[i].can_gc == true)) + { + *p_next_page = i; + ret = true; + break; + } + } + } + + return ret; +} + + +static ret_code_t gc_swap_erase(void) +{ + m_gc.state = GC_DISCARD_SWAP; + m_swap_page.write_offset = FDS_PAGE_TAG_SIZE; + + return nrf_fstorage_erase(&m_fs, (uint32_t)m_swap_page.p_addr, FDS_PHY_PAGES_IN_VPAGE, NULL); +} + + +// Erase the page being garbage collected, or erase the swap in case there are any open +// records on the page being garbage collected. +static ret_code_t gc_page_erase(void) +{ + uint32_t ret; + uint16_t const gc = m_gc.cur_page; + + if (m_pages[gc].records_open == 0) + { + m_gc.state = GC_ERASE_PAGE; + + ret = nrf_fstorage_erase(&m_fs, (uint32_t)m_pages[gc].p_addr, FDS_PHY_PAGES_IN_VPAGE, NULL); + } + else + { + // If there are open records, stop garbage collection on this page. + // Discard the swap and try to garbage collect another page. + ret = gc_swap_erase(); + } + + return ret; +} + + +// Copy the current record to swap. +static ret_code_t gc_record_copy(void) +{ + fds_header_t const * const p_header = (fds_header_t*)m_gc.p_record_src; + uint32_t const * const p_dest = m_swap_page.p_addr + m_swap_page.write_offset; + uint16_t const record_len = FDS_HEADER_SIZE + p_header->length_words; + + m_gc.state = GC_COPY_RECORD; + + // Copy the record to swap; it is guaranteed to fit in the destination page, + // so there is no need to check its size. This will either succeed or timeout. + return nrf_fstorage_write(&m_fs, (uint32_t)p_dest, m_gc.p_record_src, + record_len * sizeof(uint32_t), + NULL); +} + + +static ret_code_t gc_record_find_next(void) +{ + ret_code_t ret; + + // Find the next valid record to copy. + if (record_find_next(m_gc.cur_page, &m_gc.p_record_src)) + { + ret = gc_record_copy(); + } + else + { + // No more records left to copy on this page; swap pages. + ret = gc_page_erase(); + } + + return ret; +} + + +// Promote the swap by tagging it as a data page. +static ret_code_t gc_swap_promote(void) +{ + m_gc.state = GC_PROMOTE_SWAP; + return page_tag_write_data(m_pages[m_gc.cur_page].p_addr); +} + + +// Tag the page just garbage collected as swap. +static ret_code_t gc_tag_new_swap(void) +{ + m_gc.state = GC_TAG_NEW_SWAP; + m_gc.p_record_src = NULL; + return page_tag_write_swap(); +} + + +static ret_code_t gc_next_page(void) +{ + if (!gc_page_next(&m_gc.cur_page)) + { + // No pages left to GC; GC has terminated. Reset the state. + m_gc.state = GC_BEGIN; + m_gc.cur_page = 0; + m_gc.p_record_src = NULL; + + return FDS_OP_COMPLETED; + } + + return gc_record_find_next(); +} + + +// Update the swap page offeset after a record has been successfully copied to it. +static void gc_update_swap_offset(void) +{ + fds_header_t const * const p_header = (fds_header_t*)m_gc.p_record_src; + uint16_t const record_len = FDS_HEADER_SIZE + p_header->length_words; + + m_swap_page.write_offset += record_len; +} + + +static void gc_swap_pages(void) +{ + // The page being garbage collected will be the new swap page, + // and the current swap will be used as a data page (promoted). + uint32_t const * const p_addr = m_swap_page.p_addr; + + m_swap_page.p_addr = m_pages[m_gc.cur_page].p_addr; + m_pages[m_gc.cur_page].p_addr = p_addr; + + // Keep the offset for this page, but reset it for the swap. + m_pages[m_gc.cur_page].write_offset = m_swap_page.write_offset; + m_swap_page.write_offset = FDS_PAGE_TAG_SIZE; +} + + +static void gc_state_advance(void) +{ + switch (m_gc.state) + { + case GC_BEGIN: + gc_init(); + m_gc.state = GC_NEXT_PAGE; + break; + + // A record was successfully copied. + case GC_COPY_RECORD: + gc_update_swap_offset(); + m_gc.state = GC_FIND_NEXT_RECORD; + break; + + // A page was successfully erased. Prepare to promote the swap. + case GC_ERASE_PAGE: + gc_swap_pages(); + m_gc.state = GC_PROMOTE_SWAP; + break; + + // Swap was discarded because the page being GC'ed had open records. + case GC_DISCARD_SWAP: + // Swap was successfully promoted. + case GC_PROMOTE_SWAP: + // Prepare to tag the page just GC'ed as swap. + m_gc.state = GC_TAG_NEW_SWAP; + break; + + case GC_TAG_NEW_SWAP: + m_gc.state = GC_NEXT_PAGE; + break; + + default: + // Should not happen. + break; + } +} + + +// Initialize the filesystem. +static ret_code_t init_execute(uint32_t prev_ret, fds_op_t * const p_op) +{ + ret_code_t ret = FDS_ERR_INTERNAL; + + if (prev_ret != NRF_SUCCESS) + { + // A previous operation has timed out. + m_flags.initializing = false; + return FDS_ERR_OPERATION_TIMEOUT; + } + + switch (p_op->init.step) + { + case FDS_OP_INIT_TAG_SWAP: + { + // The page write offset was determined previously by pages_init(). + p_op->init.step = FDS_OP_INIT_TAG_DATA; + ret = page_tag_write_swap(); + } break; + + case FDS_OP_INIT_TAG_DATA: + { + // Tag remaining erased pages as data. + bool write_reqd = false; + for (uint16_t i = 0; i < FDS_DATA_PAGES; i++) + { + if (m_pages[i].page_type == FDS_PAGE_ERASED) + { + m_pages[i].page_type = FDS_PAGE_DATA; + write_reqd = true; + ret = page_tag_write_data(m_pages[i].p_addr); + break; + } + } + if (!write_reqd) + { + m_flags.initialized = true; + m_flags.initializing = false; + return FDS_OP_COMPLETED; + } + } break; + + case FDS_OP_INIT_ERASE_SWAP: + { + // If the swap is going to be discarded then reset its write_offset. + p_op->init.step = FDS_OP_INIT_TAG_SWAP; + m_swap_page.write_offset = FDS_PAGE_TAG_SIZE; + + ret = nrf_fstorage_erase(&m_fs, (uint32_t)m_swap_page.p_addr, FDS_PHY_PAGES_IN_VPAGE, NULL); + } break; + + case FDS_OP_INIT_PROMOTE_SWAP: + { + p_op->init.step = FDS_OP_INIT_TAG_SWAP; + + // When promoting the swap, keep the write_offset set by pages_init(). + ret = page_tag_write_data(m_swap_page.p_addr); + + uint16_t const gc = m_gc.cur_page; + uint32_t const * const p_old_swap = m_swap_page.p_addr; + + // Execute the swap. + m_swap_page.p_addr = m_pages[gc].p_addr; + m_pages[gc].p_addr = p_old_swap; + + // Copy the offset from the swap to the new page. + m_pages[gc].write_offset = m_swap_page.write_offset; + m_swap_page.write_offset = FDS_PAGE_TAG_SIZE; + + m_pages[gc].page_type = FDS_PAGE_DATA; + } break; + + default: + // Should not happen. + break; + } + + if (ret != FDS_SUCCESS) + { + // fstorage queue was full. + m_flags.initializing = false; + return FDS_ERR_BUSY; + } + + return FDS_OP_EXECUTING; +} + + +// Executes write and update operations. +static ret_code_t write_execute(uint32_t prev_ret, fds_op_t * const p_op) +{ + ret_code_t ret; + uint32_t * p_write_addr; + fds_page_t * const p_page = &m_pages[p_op->write.page]; + + // This must persist across calls. + static fds_record_desc_t desc = {0}; + // When a record is updated, this variable will hold the page where the old + // copy was stored. This will be used to set the can_gc flag when the header is + // invalidated (FDS_OP_WRITE_FLAG_DIRTY). + static uint16_t page; + + if (prev_ret != NRF_SUCCESS) + { + // The previous operation has timed out, update offsets. + page_offsets_update(p_page, p_op); + return FDS_ERR_OPERATION_TIMEOUT; + } + + // Compute the address where to write data. + p_write_addr = (uint32_t*)(p_page->p_addr + p_page->write_offset); + + // Execute the current step of the operation, and set one to be executed next. + switch (p_op->write.step) + { + case FDS_OP_WRITE_FIND_RECORD: + { + // The first step of updating a record constists of locating the copy to be deleted. + // If the old copy couldn't be found for any reason then the update should fail. + // This prevents duplicates when queuing multiple updates of the same record. + desc.p_record = NULL; + desc.record_id = p_op->write.record_to_delete; + + if (!record_find_by_desc(&desc, &page)) + { + return FDS_ERR_NOT_FOUND; + } + // Setting the step is redundant since we are falling through. + } + // Fallthrough to FDS_OP_WRITE_HEADER_BEGIN. + + case FDS_OP_WRITE_HEADER_BEGIN: + ret = record_header_write_begin(p_op, p_write_addr); + break; + + case FDS_OP_WRITE_RECORD_ID: + ret = record_header_write_id(p_op, p_write_addr); + break; + + case FDS_OP_WRITE_DATA: + ret = record_write_data(p_op, p_write_addr); + break; + + case FDS_OP_WRITE_HEADER_FINALIZE: + ret = record_header_write_finalize(p_op, p_write_addr); + break; + + case FDS_OP_WRITE_FLAG_DIRTY: + p_op->write.step = FDS_OP_WRITE_DONE; + ret = record_header_flag_dirty((uint32_t*)desc.p_record, page); + break; + + case FDS_OP_WRITE_DONE: + ret = FDS_OP_COMPLETED; + +#if (FDS_CRC_CHECK_ON_WRITE) + if (!crc_verify_success(p_op->write.header.crc16, + p_op->write.header.length_words, + p_write_addr)) + { + ret = FDS_ERR_CRC_CHECK_FAILED; + } +#endif + break; + + default: + ret = FDS_ERR_INTERNAL; + break; + } + + // An operation has either completed or failed. It may have failed because fstorage + // ran out of memory, or because the user tried to delete a record which did not exist. + if (ret != FDS_OP_EXECUTING) + { + // There won't be another callback for this operation, so update the page offset now. + page_offsets_update(p_page, p_op); + } + + return ret; +} + + +static ret_code_t delete_execute(uint32_t prev_ret, fds_op_t * const p_op) +{ + ret_code_t ret; + + if (prev_ret != NRF_SUCCESS) + { + return FDS_ERR_OPERATION_TIMEOUT; + } + + switch (p_op->del.step) + { + case FDS_OP_DEL_RECORD_FLAG_DIRTY: + p_op->del.step = FDS_OP_DEL_DONE; + ret = record_find_and_delete(p_op); + break; + + case FDS_OP_DEL_FILE_FLAG_DIRTY: + ret = file_find_and_delete(p_op); + if (ret == FDS_ERR_NOT_FOUND) + { + // No more records could be found. + // There won't be another callback for this operation, so return now. + ret = FDS_OP_COMPLETED; + } + break; + + case FDS_OP_DEL_DONE: + ret = FDS_OP_COMPLETED; + break; + + default: + ret = FDS_ERR_INTERNAL; + break; + } + + return ret; +} + + +static ret_code_t gc_execute(uint32_t prev_ret) +{ + ret_code_t ret; + + if (prev_ret != NRF_SUCCESS) + { + return FDS_ERR_OPERATION_TIMEOUT; + } + + if (m_gc.resume) + { + m_gc.resume = false; + } + else + { + gc_state_advance(); + } + + switch (m_gc.state) + { + case GC_NEXT_PAGE: + ret = gc_next_page(); + break; + + case GC_FIND_NEXT_RECORD: + ret = gc_record_find_next(); + break; + + case GC_COPY_RECORD: + ret = gc_record_copy(); + break; + + case GC_ERASE_PAGE: + ret = gc_page_erase(); + break; + + case GC_PROMOTE_SWAP: + ret = gc_swap_promote(); + break; + + case GC_TAG_NEW_SWAP: + ret = gc_tag_new_swap(); + break; + + default: + // Should not happen. + ret = FDS_ERR_INTERNAL; + break; + } + + // Either FDS_OP_EXECUTING, FDS_OP_COMPLETED, FDS_ERR_BUSY or FDS_ERR_INTERNAL. + return ret; +} + + +static void queue_process(ret_code_t result) +{ + static fds_op_t * m_p_cur_op; // Current fds operation. + static nrf_atfifo_item_get_t m_iget_ctx; // Queue context for the current operation. + + while (true) + { + if (m_p_cur_op == NULL) + { + // Load the next from the queue if no operation is being executed. + m_p_cur_op = queue_load(&m_iget_ctx); + } + + /* We can reach here in three ways: + * from queue_start(): something was just queued + * from the fstorage event handler: an operation is being executed + * looping: we only loop if there are operations still in the queue + * + * In all these three cases, m_p_cur_op != NULL. + */ + ASSERT(m_p_cur_op != NULL); + + switch (m_p_cur_op->op_code) + { + case FDS_OP_INIT: + result = init_execute(result, m_p_cur_op); + break; + + case FDS_OP_WRITE: + case FDS_OP_UPDATE: + result = write_execute(result, m_p_cur_op); + break; + + case FDS_OP_DEL_RECORD: + case FDS_OP_DEL_FILE: + result = delete_execute(result, m_p_cur_op); + break; + + case FDS_OP_GC: + result = gc_execute(result); + break; + + default: + result = FDS_ERR_INTERNAL; + break; + } + + if (result == FDS_OP_EXECUTING) + { + // The operation has not completed yet. Wait for the next system event. + break; + } + + // The operation has completed (either successfully or with an error). + // - send an event to the user + // - free the operation buffer + // - execute any other queued operations + + fds_evt_t evt = + { + // The operation might have failed for one of the following reasons: + // FDS_ERR_BUSY - flash subsystem can't accept the operation + // FDS_ERR_OPERATION_TIMEOUT - flash subsystem timed out + // FDS_ERR_CRC_CHECK_FAILED - a CRC check failed + // FDS_ERR_NOT_FOUND - no record found (delete/update) + .result = (result == FDS_OP_COMPLETED) ? FDS_SUCCESS : result, + }; + + event_prepare(m_p_cur_op, &evt); + event_send(&evt); + + // Zero the pointer to the current operation so that this function + // will fetch a new one from the queue next time it is run. + m_p_cur_op = NULL; + + // The result of the operation must be reset upon re-entering the loop to ensure + // the next operation won't be affected by eventual errors in previous operations. + result = NRF_SUCCESS; + + // Free the queue element used by the current operation. + queue_free(&m_iget_ctx); + + if (!queue_has_next()) + { + // No more elements left. Nothing to do. + break; + } + } +} + + +static void queue_start(void) +{ + if (!nrf_atomic_u32_fetch_add(&m_queued_op_cnt, 1)) + { + queue_process(NRF_SUCCESS); + } +} + + +static void fs_event_handler(nrf_fstorage_evt_t * p_evt) +{ + queue_process(p_evt->result); +} + + +// Enqueues write and update operations. +static ret_code_t write_enqueue(fds_record_desc_t * const p_desc, + fds_record_t const * const p_record, + fds_reserve_token_t const * const p_tok, + fds_op_code_t op_code) +{ + ret_code_t ret; + uint16_t page; + uint16_t crc = 0; + uint16_t length_words = 0; + fds_op_t * p_op; + nrf_atfifo_item_put_t iput_ctx; + + if (!m_flags.initialized) + { + return FDS_ERR_NOT_INITIALIZED; + } + + if (p_record == NULL) + { + return FDS_ERR_NULL_ARG; + } + + if ((p_record->file_id == FDS_FILE_ID_INVALID) || + (p_record->key == FDS_RECORD_KEY_DIRTY)) + { + return FDS_ERR_INVALID_ARG; + } + + if (!is_word_aligned(p_record->data.p_data)) + { + return FDS_ERR_UNALIGNED_ADDR; + } + + // No space was previously reserved in flash for this operation. + if (p_tok == NULL) + { + // Find a page where to write data. + length_words = p_record->data.length_words; + ret = write_space_reserve(length_words, &page); + + if (ret != FDS_SUCCESS) + { + // There is either not enough space in flash (FDS_ERR_NO_SPACE_IN_FLASH) or + // the record exceeds the size of virtual page (FDS_ERR_RECORD_TOO_LARGE). + return ret; + } + } + else + { + page = p_tok->page; + length_words = p_tok->length_words; + } + + // Get a buffer on the queue of operations. + p_op = queue_buf_get(&iput_ctx); + if (p_op == NULL) + { + CRITICAL_SECTION_ENTER(); + write_space_free(length_words, page); + CRITICAL_SECTION_EXIT(); + return FDS_ERR_NO_SPACE_IN_QUEUES; + } + + // Initialize the operation. + p_op->op_code = op_code; + p_op->write.step = FDS_OP_WRITE_HEADER_BEGIN; + p_op->write.page = page; + p_op->write.p_data = p_record->data.p_data; + p_op->write.header.record_id = record_id_new(); + p_op->write.header.file_id = p_record->file_id; + p_op->write.header.record_key = p_record->key; + p_op->write.header.length_words = length_words; + + if (op_code == FDS_OP_UPDATE) + { + p_op->write.step = FDS_OP_WRITE_FIND_RECORD; + // Save the record ID of the record to be updated. + p_op->write.record_to_delete = p_desc->record_id; + } + +#if (FDS_CRC_CHECK_ON_READ) + // First, compute the CRC for the first 6 bytes of the header which contain the + // record key, length and file ID, then, compute the CRC of the record ID (4 bytes). + crc = crc16_compute((uint8_t*)&p_op->write.header, 6, NULL); + crc = crc16_compute((uint8_t*)&p_op->write.header.record_id, 4, &crc); + + // Compute the CRC for the record data. + crc = crc16_compute((uint8_t*)p_record->data.p_data, + p_record->data.length_words * sizeof(uint32_t), &crc); +#endif + + p_op->write.header.crc16 = crc; + + queue_buf_store(&iput_ctx); + + // Initialize the record descriptor, if provided. + if (p_desc != NULL) + { + p_desc->p_record = NULL; + // Don't invoke record_id_new() again ! + p_desc->record_id = p_op->write.header.record_id; + p_desc->record_is_open = false; + p_desc->gc_run_count = m_gc.run_count; + } + + // Start processing the queue, if necessary. + queue_start(); + + return FDS_SUCCESS; +} + + +ret_code_t fds_register(fds_cb_t cb) +{ + ret_code_t ret; + + if (m_users == FDS_MAX_USERS) + { + ret = FDS_ERR_USER_LIMIT_REACHED; + } + else + { + m_cb_table[m_users] = cb; + (void) nrf_atomic_u32_add(&m_users, 1); + + ret = FDS_SUCCESS; + } + + return ret; +} + + +static uint32_t flash_end_addr(void) +{ + uint32_t const bootloader_addr = NRF_UICR->NRFFW[0]; + uint32_t const page_sz = NRF_FICR->CODEPAGESIZE; +#ifndef NRF52810_XXAA + uint32_t const code_sz = NRF_FICR->CODESIZE; +#else + // Number of flash pages, necessary to emulate the NRF52810 on NRF52832. + uint32_t const code_sz = 48; +#endif + + return (bootloader_addr != 0xFFFFFFFF) ? bootloader_addr : (code_sz * page_sz); +} + + +static void flash_bounds_set(void) +{ + uint32_t flash_size = (FDS_PHY_PAGES * FDS_PHY_PAGE_SIZE * sizeof(uint32_t)); + m_fs.end_addr = flash_end_addr(); + m_fs.start_addr = m_fs.end_addr - flash_size; +} + + +static ret_code_t flash_subsystem_init(void) +{ + flash_bounds_set(); + + #if (FDS_BACKEND == NRF_FSTORAGE_SD) + return nrf_fstorage_init(&m_fs, &nrf_fstorage_sd, NULL); + #elif (FDS_BACKEND == NRF_FSTORAGE_NVMC) + return nrf_fstorage_init(&m_fs, &nrf_fstorage_nvmc, NULL); + #else + #error Invalid FDS_BACKEND. + #endif +} + + +static void queue_init(void) +{ + (void) NRF_ATFIFO_INIT(m_queue); +} + + +ret_code_t fds_init(void) +{ + ret_code_t ret; + fds_evt_t const evt_success = + { + .id = FDS_EVT_INIT, + .result = FDS_SUCCESS, + }; + + if (m_flags.initialized) + { + // No initialization is necessary. Notify the application immediately. + event_send(&evt_success); + return FDS_SUCCESS; + } + + if (nrf_atomic_flag_set_fetch(&m_flags.initializing)) + { + // If we were already initializing, return. + return FDS_SUCCESS; + } + + // Otherwise, the flag is set and we proceed to initialization. + + ret = flash_subsystem_init(); + if (ret != NRF_SUCCESS) + { + return ret; + } + + queue_init(); + + // Initialize the page structure (m_pages), and determine which + // initialization steps are required given the current state of the filesystem. + + fds_init_opts_t init_opts = pages_init(); + + switch (init_opts) + { + case NO_PAGES: + case NO_SWAP: + return FDS_ERR_NO_PAGES; + + case ALREADY_INSTALLED: + { + // No initialization is necessary. Notify the application immediately. + m_flags.initialized = true; + m_flags.initializing = false; + event_send(&evt_success); + return FDS_SUCCESS; + } + + default: + break; + } + + // A write operation is necessary to initialize the fileystem. + + nrf_atfifo_item_put_t iput_ctx; + + fds_op_t * p_op = queue_buf_get(&iput_ctx); + if (p_op == NULL) + { + return FDS_ERR_NO_SPACE_IN_QUEUES; + } + + p_op->op_code = FDS_OP_INIT; + + switch (init_opts) + { + case FRESH_INSTALL: + case TAG_SWAP: + p_op->init.step = FDS_OP_INIT_TAG_SWAP; + break; + + case PROMOTE_SWAP: + case PROMOTE_SWAP_INST: + p_op->init.step = FDS_OP_INIT_PROMOTE_SWAP; + break; + + case DISCARD_SWAP: + p_op->init.step = FDS_OP_INIT_ERASE_SWAP; + break; + + case TAG_DATA: + case TAG_DATA_INST: + p_op->init.step = FDS_OP_INIT_TAG_DATA; + break; + + default: + // Should not happen. + break; + } + + queue_buf_store(&iput_ctx); + queue_start(); + + return FDS_SUCCESS; +} + + +ret_code_t fds_record_open(fds_record_desc_t * const p_desc, + fds_flash_record_t * const p_flash_rec) +{ + uint16_t page; + + if ((p_desc == NULL) || (p_flash_rec == NULL)) + { + return FDS_ERR_NULL_ARG; + } + + // Find the record if necessary. + if (record_find_by_desc(p_desc, &page)) + { + fds_header_t const * const p_header = (fds_header_t*)p_desc->p_record; + +#if (FDS_CRC_CHECK_ON_READ) + if (!crc_verify_success(p_header->crc16, + p_header->length_words, + p_desc->p_record)) + { + return FDS_ERR_CRC_CHECK_FAILED; + } +#endif + + (void) nrf_atomic_u32_add(&m_pages[page].records_open, 1); + + // Initialize p_flash_rec. + p_flash_rec->p_header = p_header; + p_flash_rec->p_data = (p_desc->p_record + FDS_HEADER_SIZE); + + // Set the record as open in the descriptor. + p_desc->record_is_open = true; + + return FDS_SUCCESS; + } + + // The record could not be found. + // It either never existed or it has been deleted. + return FDS_ERR_NOT_FOUND; +} + + +ret_code_t fds_record_close(fds_record_desc_t * const p_desc) +{ + ret_code_t ret; + uint16_t page; + + if (p_desc == NULL) + { + return FDS_ERR_NULL_ARG; + } + + if (record_find_by_desc((fds_record_desc_t*)p_desc, &page)) + { + CRITICAL_SECTION_ENTER(); + if ((m_pages[page].records_open > 0) && (p_desc->record_is_open)) + { + + m_pages[page].records_open--; + p_desc->record_is_open = false; + + ret = FDS_SUCCESS; + } + else + { + ret = FDS_ERR_NO_OPEN_RECORDS; + } + CRITICAL_SECTION_EXIT(); + } + else + { + ret = FDS_ERR_NOT_FOUND; + } + + return ret; +} + + +ret_code_t fds_reserve(fds_reserve_token_t * const p_tok, uint16_t length_words) +{ + ret_code_t ret; + uint16_t page; + + if (!m_flags.initialized) + { + return FDS_ERR_NOT_INITIALIZED; + } + + if (p_tok == NULL) + { + return FDS_ERR_NULL_ARG; + } + + ret = write_space_reserve(length_words, &page); + + if (ret == FDS_SUCCESS) + { + p_tok->page = page; + p_tok->length_words = length_words; + } + + return ret; +} + + +ret_code_t fds_reserve_cancel(fds_reserve_token_t * const p_tok) +{ + ret_code_t ret; + + if (!m_flags.initialized) + { + return FDS_ERR_NOT_INITIALIZED; + } + + if (p_tok == NULL) + { + return FDS_ERR_NULL_ARG; + } + + if (p_tok->page > FDS_DATA_PAGES) + { + // The page does not exist. This shouldn't happen. + return FDS_ERR_INVALID_ARG; + } + + fds_page_t const * const p_page = &m_pages[p_tok->page]; + + CRITICAL_SECTION_ENTER(); + if ((FDS_HEADER_SIZE + p_tok->length_words) <= p_page->words_reserved) + { + // Free reserved space. + write_space_free(p_tok->length_words, p_tok->page); + + // Clean the token. + p_tok->page = 0; + p_tok->length_words = 0; + ret = FDS_SUCCESS; + } + else + { + // We are trying to cancel a reservation of more words than how many are + // currently reserved on the page. Clearly, this shouldn't happen. + ret = FDS_ERR_INVALID_ARG; + } + CRITICAL_SECTION_EXIT(); + + return ret; +} + + +ret_code_t fds_record_write(fds_record_desc_t * const p_desc, + fds_record_t const * const p_record) +{ + return write_enqueue(p_desc, p_record, NULL, FDS_OP_WRITE); +} + + +ret_code_t fds_record_write_reserved(fds_record_desc_t * const p_desc, + fds_record_t const * const p_record, + fds_reserve_token_t const * const p_tok) +{ + // A NULL token is not allowed when writing to a reserved space. + if (p_tok == NULL) + { + return FDS_ERR_NULL_ARG; + } + + return write_enqueue(p_desc, p_record, p_tok, FDS_OP_WRITE); +} + + +ret_code_t fds_record_update(fds_record_desc_t * const p_desc, + fds_record_t const * const p_record) +{ + // A NULL descriptor is not allowed when updating a record. + if (p_desc == NULL) + { + return FDS_ERR_NULL_ARG; + } + + return write_enqueue(p_desc, p_record, NULL, FDS_OP_UPDATE); +} + + +ret_code_t fds_record_delete(fds_record_desc_t * const p_desc) +{ + fds_op_t * p_op; + nrf_atfifo_item_put_t iput_ctx; + + if (!m_flags.initialized) + { + return FDS_ERR_NOT_INITIALIZED; + } + + if (p_desc == NULL) + { + return FDS_ERR_NULL_ARG; + } + + p_op = queue_buf_get(&iput_ctx); + if (p_op == NULL) + { + return FDS_ERR_NO_SPACE_IN_QUEUES; + } + + p_op->op_code = FDS_OP_DEL_RECORD; + p_op->del.step = FDS_OP_DEL_RECORD_FLAG_DIRTY; + p_op->del.record_to_delete = p_desc->record_id; + + queue_buf_store(&iput_ctx); + queue_start(); + + return FDS_SUCCESS; +} + + +ret_code_t fds_file_delete(uint16_t file_id) +{ + fds_op_t * p_op; + nrf_atfifo_item_put_t iput_ctx; + + if (!m_flags.initialized) + { + return FDS_ERR_NOT_INITIALIZED; + } + + if (file_id == FDS_FILE_ID_INVALID) + { + return FDS_ERR_INVALID_ARG; + } + + p_op = queue_buf_get(&iput_ctx); + if (p_op == NULL) + { + return FDS_ERR_NO_SPACE_IN_QUEUES; + } + + p_op->op_code = FDS_OP_DEL_FILE; + p_op->del.step = FDS_OP_DEL_FILE_FLAG_DIRTY; + p_op->del.file_id = file_id; + + queue_buf_store(&iput_ctx); + queue_start(); + + return FDS_SUCCESS; +} + + +ret_code_t fds_gc(void) +{ + fds_op_t * p_op; + nrf_atfifo_item_put_t iput_ctx; + + if (!m_flags.initialized) + { + return FDS_ERR_NOT_INITIALIZED; + } + + p_op = queue_buf_get(&iput_ctx); + if (p_op == NULL) + { + return FDS_ERR_NO_SPACE_IN_QUEUES; + } + + p_op->op_code = FDS_OP_GC; + + queue_buf_store(&iput_ctx); + + if (m_gc.state != GC_BEGIN) + { + // Resume GC by retrying the last step. + m_gc.resume = true; + } + + queue_start(); + + return FDS_SUCCESS; +} + + +ret_code_t fds_record_iterate(fds_record_desc_t * const p_desc, + fds_find_token_t * const p_token) +{ + return record_find(NULL, NULL, p_desc, p_token); +} + + +ret_code_t fds_record_find(uint16_t file_id, + uint16_t record_key, + fds_record_desc_t * const p_desc, + fds_find_token_t * const p_token) +{ + return record_find(&file_id, &record_key, p_desc, p_token); +} + + +ret_code_t fds_record_find_by_key(uint16_t record_key, + fds_record_desc_t * const p_desc, + fds_find_token_t * const p_token) +{ + return record_find(NULL, &record_key, p_desc, p_token); +} + + +ret_code_t fds_record_find_in_file(uint16_t file_id, + fds_record_desc_t * const p_desc, + fds_find_token_t * const p_token) +{ + return record_find(&file_id, NULL, p_desc, p_token); +} + + +ret_code_t fds_descriptor_from_rec_id(fds_record_desc_t * const p_desc, + uint32_t record_id) +{ + if (p_desc == NULL) + { + return FDS_ERR_NULL_ARG; + } + + // Zero the descriptor and set the record_id field. + memset(p_desc, 0x00, sizeof(fds_record_desc_t)); + p_desc->record_id = record_id; + + return FDS_SUCCESS; +} + + +ret_code_t fds_record_id_from_desc(fds_record_desc_t const * const p_desc, + uint32_t * const p_record_id) +{ + if ((p_desc == NULL) || (p_record_id == NULL)) + { + return FDS_ERR_NULL_ARG; + } + + *p_record_id = p_desc->record_id; + + return FDS_SUCCESS; +} + + +ret_code_t fds_stat(fds_stat_t * const p_stat) +{ + uint16_t const words_in_page = FDS_PAGE_SIZE; + // The largest number of free contiguous words on any page. + uint16_t contig_words = 0; + + if (!m_flags.initialized) + { + return FDS_ERR_NOT_INITIALIZED; + } + + if (p_stat == NULL) + { + return FDS_ERR_NULL_ARG; + } + + memset(p_stat, 0x00, sizeof(fds_stat_t)); + + p_stat->pages_available = FDS_VIRTUAL_PAGES; + + for (uint16_t page = 0; page < FDS_DATA_PAGES; page++) + { + uint16_t const words_used = m_pages[page].write_offset + m_pages[page].words_reserved; + + if (page_identify(m_pages[page].p_addr) == FDS_PAGE_UNDEFINED) + { + p_stat->pages_available--; + } + + p_stat->open_records += m_pages[page].records_open; + p_stat->words_reserved += m_pages[page].words_reserved; + p_stat->words_used += words_used; + + contig_words = (words_in_page - words_used); + if (contig_words > p_stat->largest_contig) + { + p_stat->largest_contig = contig_words; + } + + records_stat(page, + &p_stat->valid_records, + &p_stat->dirty_records, + &p_stat->freeable_words, + &p_stat->corruption); + } + + return FDS_SUCCESS; +} + +#endif //NRF_MODULE_ENABLED(FDS) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fds/fds.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fds/fds.h new file mode 100644 index 00000000000..09d1eea08f3 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fds/fds.h @@ -0,0 +1,700 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef FDS_H__ +#define FDS_H__ + +/** + * @defgroup fds Flash Data Storage + * @ingroup app_common + * @{ + * + * @brief Flash Data Storage (FDS). + * + * @details Flash Data Storage is a minimalistic, record-oriented file system for the on-chip + * flash. Files are stored as a collection of records of variable length. FDS supports + * synchronous read operations and asynchronous write operations (write, update, + * and delete). FDS can be used from multiple threads. + */ + +#include +#include +#include "sdk_errors.h" +#include "app_util_platform.h" + +#ifdef __cplusplus +extern "C" { +#endif + + +/**@brief Invalid file ID. + * + * This value must not be used as a file ID by the application. + */ +#define FDS_FILE_ID_INVALID (0xFFFF) + + +/**@brief Record key for deleted records. + * + * This key is used to flag a record as "dirty", which means that it should be removed during + * the next garbage collection. This value must not be used as a record key by the application. + */ +#define FDS_RECORD_KEY_DIRTY (0x0000) + + +/**@brief FDS return values. + */ +enum +{ + FDS_SUCCESS = NRF_SUCCESS, //!< The operation completed successfully. + FDS_ERR_OPERATION_TIMEOUT, //!< Error. The operation timed out. + FDS_ERR_NOT_INITIALIZED, //!< Error. The module has not been initialized. + FDS_ERR_UNALIGNED_ADDR, //!< Error. The input data is not aligned to a word boundary. + FDS_ERR_INVALID_ARG, //!< Error. The parameter contains invalid data. + FDS_ERR_NULL_ARG, //!< Error. The parameter is NULL. + FDS_ERR_NO_OPEN_RECORDS, //!< Error. The record is not open, so it cannot be closed. + FDS_ERR_NO_SPACE_IN_FLASH, //!< Error. There is no space in flash memory. + FDS_ERR_NO_SPACE_IN_QUEUES, //!< Error. There is no space in the internal queues. + FDS_ERR_RECORD_TOO_LARGE, //!< Error. The record exceeds the maximum allowed size. + FDS_ERR_NOT_FOUND, //!< Error. The record was not found. + FDS_ERR_NO_PAGES, //!< Error. No flash pages are available. + FDS_ERR_USER_LIMIT_REACHED, //!< Error. The maximum number of users has been reached. + FDS_ERR_CRC_CHECK_FAILED, //!< Error. The CRC check failed. + FDS_ERR_BUSY, //!< Error. The underlying flash subsystem was busy. + FDS_ERR_INTERNAL, //!< Error. An internal error occurred. +}; + + +/**@brief The record metadata as stored in flash. + * @warning Do not edit or reorder the fields in this structure. + */ +typedef struct +{ + uint16_t record_key; //!< The record key. + uint16_t length_words; //!< The length of the record data (in 4-byte words). + uint16_t file_id; //!< The ID of the file that the record belongs to. + uint16_t crc16; //!< CRC16-CCITT check value. + /* The CRC is calculated over the entire record as stored in flash, + * including the record metadata except the CRC field itself. + */ + uint32_t record_id; //!< The unique record ID (32 bits). +} fds_header_t; + + +/**@brief The record descriptor structure that is used to manipulate records. + * + * This structure is used by the FDS module. You must provide the descriptor to the module when + * you manipulate existing records. However, you should never modify it or use any of its fields. + * + * @note Never reuse the same descriptor for different records. + */ +typedef struct +{ + uint32_t record_id; //!< The unique record ID. + uint32_t const * p_record; //!< The last known location of the record in flash. + uint16_t gc_run_count; //!< Number of times garbage collection has been run. + bool record_is_open; //!< Whether the record is currently open. +} fds_record_desc_t; + + +/**@brief Structure that can be used to read the contents of a record stored in flash. + * + * This structure does not reflect the physical layout of a record in flash, but it points + * to the locations where the record header (metadata) and the record data are stored. + */ +typedef struct +{ + fds_header_t const * p_header; //!< Location of the record header in flash. + void const * p_data; //!< Location of the record data in flash. +} fds_flash_record_t; + + +/**@brief A record to be written to flash. */ +typedef struct +{ + uint16_t file_id; //!< The ID of the file that the record belongs to. + uint16_t key; //!< The record key. + struct + { + void const * p_data; + uint32_t length_words; + } data; +} fds_record_t; + + +/**@brief A token to a reserved space in flash, created by @ref fds_reserve. + * + * This token can be used to write the record in the reserved space (@ref fds_record_write_reserved) + * or to cancel the reservation (@ref fds_reserve_cancel). + */ +typedef struct +{ + uint16_t page; //!< The logical ID of the page where space was reserved. + uint16_t length_words; //!< The amount of space reserved (in 4-byte words). +} fds_reserve_token_t; + + +/**@brief A token to keep information about the progress of @ref fds_record_find, + * @ref fds_record_find_by_key, and @ref fds_record_find_in_file. + * + * @note Always zero-initialize the token before using it for the first time. + * @note Never reuse the same token to search for different records. + */ +typedef struct +{ + uint32_t const * p_addr; + uint16_t page; +} fds_find_token_t; + + +/**@brief FDS event IDs. + */ +typedef enum +{ + FDS_EVT_INIT, //!< Event for @ref fds_init. + FDS_EVT_WRITE, //!< Event for @ref fds_record_write and @ref fds_record_write_reserved. + FDS_EVT_UPDATE, //!< Event for @ref fds_record_update. + FDS_EVT_DEL_RECORD, //!< Event for @ref fds_record_delete. + FDS_EVT_DEL_FILE, //!< Event for @ref fds_file_delete. + FDS_EVT_GC //!< Event for @ref fds_gc. +} fds_evt_id_t; + + +ANON_UNIONS_ENABLE; + +/**@brief An FDS event. */ +typedef struct +{ + fds_evt_id_t id; //!< The event ID. See @ref fds_evt_id_t. + ret_code_t result; //!< The result of the operation related to this event. + union + { + struct + { + uint32_t record_id; + uint16_t file_id; + uint16_t record_key; + bool is_record_updated; + } write; //!< Information for @ref FDS_EVT_WRITE and @ref FDS_EVT_UPDATE events. + struct + { + uint32_t record_id; + uint16_t file_id; + uint16_t record_key; + } del; //!< Information for @ref FDS_EVT_DEL_RECORD and @ref FDS_EVT_DEL_FILE events. + }; +} fds_evt_t; + +ANON_UNIONS_DISABLE; + + +/**@brief File system statistics. */ +typedef struct +{ + uint16_t pages_available; //!< The number of pages available. + uint16_t open_records; //!< The number of open records. + uint16_t valid_records; //!< The number of valid records. + uint16_t dirty_records; //!< The number of deleted ("dirty") records. + uint16_t words_reserved; //!< The number of words reserved by @ref fds_reserve(). + + /**@brief The number of words written to flash, including those reserved for future writes. */ + uint16_t words_used; + + /**@brief The largest number of free contiguous words in the file system. + * + * This number indicates the largest record that can be stored by FDS. + * It takes into account all reservations for future writes. + */ + uint16_t largest_contig; + + /**@brief The largest number of words that can be reclaimed by garbage collection. + * + * The actual amount of space freed by garbage collection might be less than this value if + * records are open while garbage collection is run. + */ + uint16_t freeable_words; + + /**@brief Filesystem corruption has been detected. + * + * One or more corrupted records were detected. FDS will heal the filesystem automatically + * next time garbage collection is run, but some data may be lost. + * + * @note: This flag is unrelated to CRC failures. + */ + bool corruption; +} fds_stat_t; + + +/**@brief FDS event handler function prototype. + * + * @param p_evt The event. + */ +typedef void (*fds_cb_t)(fds_evt_t const * p_evt); + + +/**@brief Function for registering an FDS event handler. + * + * The maximum amount of handlers that can be registered can be configured by changing the value + * of @ref FDS_MAX_USERS in fds_config.h. + * + * @param[in] cb The event handler function. + * + * @retval FDS_SUCCESS If the event handler was registered successfully. + * @retval FDS_ERR_USER_LIMIT_REACHED If the maximum number of registered callbacks is reached. + */ +ret_code_t fds_register(fds_cb_t cb); + + +/**@brief Function for initializing the module. + * + * This function initializes the module and installs the file system (unless it is installed + * already). + * + * This function is asynchronous. Completion is reported through an event. Make sure to call + * @ref fds_register before calling @ref fds_init so that you receive the completion event. + * + * @retval FDS_SUCCESS If the operation was queued successfully. + * @retval FDS_ERR_NO_PAGES If there is no space available in flash memory to install the + * file system. + */ +ret_code_t fds_init(void); + + +/**@brief Function for writing a record to flash. + * + * There are no restrictions on the file ID and the record key, except that the record key must be + * different from @ref FDS_RECORD_KEY_DIRTY and the file ID must be different from + * @ref FDS_FILE_ID_INVALID. In particular, no restrictions are made regarding the uniqueness of + * the file ID or the record key. All records with the same file ID are grouped into one file. + * If no file with the specified ID exists, it is created. There can be multiple records with the + * same record key in a file. + * + * Some modules need exclusive use of certain file IDs and record keys. + * See @ref lib_fds_functionality_keys for details. + * + * Record data can consist of multiple chunks. The data must be aligned to a 4 byte boundary, and + * because it is not buffered internally, it must be kept in memory until the callback for the + * operation has been received. The length of the data must not exceed @ref FDS_VIRTUAL_PAGE_SIZE + * words minus 14 bytes. + * + * This function is asynchronous. Completion is reported through an event that is sent to + * the registered event handler function. + * + * @param[out] p_desc The descriptor of the record that was written. Pass NULL if you do not + * need the descriptor. + * @param[in] p_record The record to be written to flash. + * + * @retval FDS_SUCCESS If the operation was queued successfully. + * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. + * @retval FDS_ERR_NULL_ARG If @p p_record is NULL. + * @retval FDS_ERR_INVALID_ARG If the file ID or the record key is invalid. + * @retval FDS_ERR_UNALIGNED_ADDR If the record data is not aligned to a 4 byte boundary. + * @retval FDS_ERR_RECORD_TOO_LARGE If the record data exceeds the maximum length. + * @retval FDS_ERR_NO_SPACE_IN_QUEUES If the operation queue is full or there are more record + * chunks than can be buffered. + * @retval FDS_ERR_NO_SPACE_IN_FLASH If there is not enough free space in flash to store the + * record. + */ +ret_code_t fds_record_write(fds_record_desc_t * p_desc, + fds_record_t const * p_record); + + +/**@brief Function for reserving space in flash. + * + * This function can be used to reserve space in flash memory. To write a record into the reserved + * space, use @ref fds_record_write_reserved. Alternatively, use @ref fds_reserve_cancel to cancel + * a reservation. + * + * Note that this function does not write any data to flash. + * + * @param[out] p_token A token that can be used to write a record in the reserved space or + * cancel the reservation. + * @param[in] length_words The length of the record data (in 4-byte words). + * + * @retval FDS_SUCCESS If the flash space was reserved successfully. + * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. + * @retval FDS_ERR_NULL_ARG If @p p_token is NULL instead of a valid token address. + * @retval FDS_ERR_RECORD_TOO_LARGE If the record length exceeds the maximum length. + * @retval FDS_ERR_NO_SPACE_IN_FLASH If there is not enough free space in flash to store the + * record. + */ +ret_code_t fds_reserve(fds_reserve_token_t * p_token, uint16_t length_words); + + +/**@brief Function for canceling an @ref fds_reserve operation. + * + * @param[in] p_token The token that identifies the reservation, produced by @ref fds_reserve. + * + * @retval FDS_SUCCESS If the reservation was canceled. + * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. + * @retval FDS_ERR_NULL_ARG If @p p_token is NULL instead of a valid token address. + * @retval FDS_ERR_INVALID_ARG If @p p_token contains invalid data. + */ +ret_code_t fds_reserve_cancel(fds_reserve_token_t * p_token); + + +/**@brief Function for writing a record to a space in flash that was reserved using + * @ref fds_reserve. + * + * There are no restrictions on the file ID and the record key, except that the record key must be + * different from @ref FDS_RECORD_KEY_DIRTY and the file ID must be different from + * @ref FDS_FILE_ID_INVALID. In particular, no restrictions are made regarding the uniqueness of + * the file ID or the record key. All records with the same file ID are grouped into one file. + * If no file with the specified ID exists, it is created. There can be multiple records with the + * same record key in a file. + * + * Record data can consist of multiple chunks. The data must be aligned to a 4 byte boundary, and + * because it is not buffered internally, it must be kept in memory until the callback for the + * operation has been received. The length of the data must not exceed @ref FDS_VIRTUAL_PAGE_SIZE + * words minus 14 bytes. + * + * This function is asynchronous. Completion is reported through an event that is sent to the + * registered event handler function. + * + * @note + * This function behaves similarly to @ref fds_record_write, with the exception that it never + * fails with the error @ref FDS_ERR_NO_SPACE_IN_FLASH. + * + * @param[out] p_desc The descriptor of the record that was written. Pass NULL if you do not + * need the descriptor. + * @param[in] p_record The record to be written to flash. + * @param[in] p_token The token that identifies the space reserved in flash. + * + * @retval FDS_SUCCESS If the operation was queued successfully. + * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. + * @retval FDS_ERR_NULL_ARG If @p p_token is NULL instead of a valid token address. + * @retval FDS_ERR_INVALID_ARG If the file ID or the record key is invalid. + * @retval FDS_ERR_UNALIGNED_ADDR If the record data is not aligned to a 4 byte boundary. + * @retval FDS_ERR_RECORD_TOO_LARGE If the record data exceeds the maximum length. + * @retval FDS_ERR_NO_SPACE_IN_QUEUES If the operation queue is full or there are more record + * chunks than can be buffered. + */ +ret_code_t fds_record_write_reserved(fds_record_desc_t * p_desc, + fds_record_t const * p_record, + fds_reserve_token_t const * p_token); + + +/**@brief Function for deleting a record. + * + * Deleted records cannot be located using @ref fds_record_find, @ref fds_record_find_by_key, or + * @ref fds_record_find_in_file. Additionally, they can no longer be opened using + * @ref fds_record_open. + * + * Note that deleting a record does not free the space it occupies in flash memory. + * To reclaim flash space used by deleted records, call @ref fds_gc to run garbage collection. + * + * This function is asynchronous. Completion is reported through an event that is sent to the + * registered event handler function. + * + * @param[in] p_desc The descriptor of the record that should be deleted. + * + * @retval FDS_SUCCESS If the operation was queued successfully. + * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. + * @retval FDS_ERR_NULL_ARG If the specified record descriptor @p p_desc is NULL. + * @retval FDS_ERR_NO_SPACE_IN_QUEUES If the operation queue is full. + */ +ret_code_t fds_record_delete(fds_record_desc_t * p_desc); + + +/**@brief Function for deleting all records in a file. + * + * This function deletes a file, including all its records. Deleted records cannot be located + * using @ref fds_record_find, @ref fds_record_find_by_key, or @ref fds_record_find_in_file. + * Additionally, they can no longer be opened using @ref fds_record_open. + * + * Note that deleting records does not free the space they occupy in flash memory. + * To reclaim flash space used by deleted records, call @ref fds_gc to run garbage collection. + * + * This function is asynchronous. Completion is reported through an event that is sent to the + * registered event handler function. + * + * @param[in] file_id The ID of the file to be deleted. + * + * @retval FDS_SUCCESS If the operation was queued successfully. + * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. + * @retval FDS_ERR_INVALID_ARG If the specified @p file_id is invalid. + * @retval FDS_ERR_NO_SPACE_IN_QUEUES If the operation queue is full. + */ +ret_code_t fds_file_delete(uint16_t file_id); + + +/**@brief Function for updating a record. + * + * Updating a record first writes a new record (@p p_record) to flash and then deletes the + * old record (identified by @p p_desc). + * + * There are no restrictions on the file ID and the record key, except that the record key must be + * different from @ref FDS_RECORD_KEY_DIRTY and the file ID must be different from + * @ref FDS_FILE_ID_INVALID. In particular, no restrictions are made regarding the uniqueness of + * the file ID or the record key. All records with the same file ID are grouped into one file. + * If no file with the specified ID exists, it is created. There can be multiple records with the + * same record key in a file. + * + * Record data can consist of multiple chunks. The data must be aligned to a 4 byte boundary, and + * because it is not buffered internally, it must be kept in memory until the callback for the + * operation has been received. The length of the data must not exceed @ref FDS_VIRTUAL_PAGE_SIZE + * words minus 14 bytes. + * + * This function is asynchronous. Completion is reported through an event that is sent to the + * registered event handler function. + * + * @param[in, out] p_desc The descriptor of the record to update. When the function + * returns with FDS_SUCCESS, this parameter contains the + * descriptor of the newly written record. + * @param[in] p_record The updated record to be written to flash. + * + * @retval FDS_SUCCESS If the operation was queued successfully. + * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. + * @retval FDS_ERR_INVALID_ARG If the file ID or the record key is invalid. + * @retval FDS_ERR_UNALIGNED_ADDR If the record data is not aligned to a 4 byte boundary. + * @retval FDS_ERR_RECORD_TOO_LARGE If the record data exceeds the maximum length. + * @retval FDS_ERR_NO_SPACE_IN_QUEUES If the operation queue is full or there are more record + * chunks than can be buffered. + * @retval FDS_ERR_NO_SPACE_IN_FLASH If there is not enough free space in flash to store the + * updated record. + */ +ret_code_t fds_record_update(fds_record_desc_t * p_desc, + fds_record_t const * p_record); + + +/**@brief Function for iterating through all records in flash. + * + * To search for the next record, call the function again and supply the same @ref fds_find_token_t + * structure to resume searching from the last record that was found. + * + * Note that the order with which records are iterated is not defined. + * + * @param[out] p_desc The descriptor of the record that was found. + * @param[out] p_token A token containing information about the progress of the operation. + * + * @retval FDS_SUCCESS If a record was found. + * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. + * @retval FDS_ERR_NULL_ARG If @p p_desc or @p p_token is NULL. + * @retval FDS_ERR_NOT_FOUND If no matching record was found. + */ +ret_code_t fds_record_iterate(fds_record_desc_t * p_desc, + fds_find_token_t * p_token); + + +/**@brief Function for searching for records with a given record key in a file. + * + * This function finds the first record in a file that has the given record key. To search for the + * next record with the same key in the file, call the function again and supply the same + * @ref fds_find_token_t structure to resume searching from the last record that was found. + * + * @param[in] file_id The file ID. + * @param[in] record_key The record key. + * @param[out] p_desc The descriptor of the record that was found. + * @param[out] p_token A token containing information about the progress of the operation. + * + * @retval FDS_SUCCESS If a record was found. + * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. + * @retval FDS_ERR_NULL_ARG If @p p_desc or @p p_token is NULL. + * @retval FDS_ERR_NOT_FOUND If no matching record was found. + */ +ret_code_t fds_record_find(uint16_t file_id, + uint16_t record_key, + fds_record_desc_t * p_desc, + fds_find_token_t * p_token); + + +/**@brief Function for searching for records with a given record key. + * + * This function finds the first record with a given record key, independent of the file it + * belongs to. To search for the next record with the same key, call the function again and supply + * the same @ref fds_find_token_t structure to resume searching from the last record that was found. + * + * @param[in] record_key The record key. + * @param[out] p_desc The descriptor of the record that was found. + * @param[out] p_token A token containing information about the progress of the operation. + * + * @retval FDS_SUCCESS If a record was found. + * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. + * @retval FDS_ERR_NULL_ARG If @p p_desc or @p p_token is NULL. + * @retval FDS_ERR_NOT_FOUND If no record with the given key was found. + */ +ret_code_t fds_record_find_by_key(uint16_t record_key, + fds_record_desc_t * p_desc, + fds_find_token_t * p_token); + + +/**@brief Function for searching for any record in a file. + * + * This function finds the first record in a file, independent of its record key. + * To search for the next record in the same file, call the function again and supply the same + * @ref fds_find_token_t structure to resume searching from the last record that was found. + * + * @param[in] file_id The file ID. + * @param[out] p_desc The descriptor of the record that was found. + * @param[out] p_token A token containing information about the progress of the operation. + * + * @retval FDS_SUCCESS If a record was found. + * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. + * @retval FDS_ERR_NULL_ARG If @p p_desc or @p p_token is NULL. + * @retval FDS_ERR_NOT_FOUND If no matching record was found. + */ +ret_code_t fds_record_find_in_file(uint16_t file_id, + fds_record_desc_t * p_desc, + fds_find_token_t * p_token); + + +/**@brief Function for opening a record for reading. + * + * This function opens a record that is stored in flash, so that it can be read. The function + * initializes an @ref fds_flash_record_t structure, which can be used to access the record data as + * well as its associated metadata. The pointers provided in the @ref fds_flash_record_t structure + * are pointers to flash memory. + * + * Opening a record with @ref fds_record_open prevents garbage collection to run on the virtual + * flash page in which record is stored, so that the contents of the memory pointed by fields in + * @ref fds_flash_record_t are guaranteed to remain unmodified as long as the record is kept open. + * + * When you are done reading a record, call @ref fds_record_close to close it. Garbage collection + * can then reclaim space on the virtual page where the record is stored. Note that you must + * provide the same descriptor for @ref fds_record_close as you did for this function. + * + * @param[in] p_desc The descriptor of the record to open. + * @param[out] p_flash_record The record, as stored in flash. + * + * @retval FDS_SUCCESS If the record was opened successfully. + * @retval FDS_ERR_NULL_ARG If @p p_desc or @p p_flash_record is NULL. + * @retval FDS_ERR_NOT_FOUND If the record was not found. It might have been deleted, or + * it might not have been written yet. + * @retval FDS_ERR_CRC_CHECK_FAILED If the CRC check for the record failed. + */ +ret_code_t fds_record_open(fds_record_desc_t * p_desc, + fds_flash_record_t * p_flash_record); + + +/**@brief Function for closing a record. + * + * Closing a record allows garbage collection to run on the virtual page in which the record is + * stored (if no other records remain open on that page). The descriptor passed as an argument + * must be the same as the one used to open the record using @ref fds_record_open. + * + * Note that closing a record does not invalidate its descriptor. You can still supply the + * descriptor to all functions that accept a record descriptor as a parameter. + * + * @param[in] p_desc The descriptor of the record to close. + * + * @retval FDS_SUCCESS If the record was closed successfully. + * @retval FDS_ERR_NULL_ARG If @p p_desc is NULL. + * @retval FDS_ERR_NO_OPEN_RECORDS If the record is not open. + * @retval FDS_ERR_NOT_FOUND If the record could not be found. + */ +ret_code_t fds_record_close(fds_record_desc_t * p_desc); + + +/**@brief Function for running garbage collection. + * + * Garbage collection reclaims the flash space that is occupied by records that have been deleted, + * or that failed to be completely written due to, for example, a power loss. + * + * This function is asynchronous. Completion is reported through an event that is sent to the + * registered event handler function. + * + * @retval FDS_SUCCESS If the operation was queued successfully. + * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. + * @retval FDS_ERR_NO_SPACE_IN_QUEUES If the operation queue is full. + */ +ret_code_t fds_gc(void); + + +/**@brief Function for obtaining a descriptor from a record ID. + * + * This function can be used to reconstruct a descriptor from a record ID, like the one that is + * passed to the callback function. + * + * @note + * This function does not check whether a record with the given record ID exists. + * If a non-existing record ID is supplied, the resulting descriptor is invalid and will cause + * other functions to fail when it is supplied as parameter. + * + * @param[out] p_desc The descriptor of the record with the given record ID. + * @param[in] record_id The record ID for which a descriptor should be returned. + * + * @retval FDS_SUCCESS If a descriptor was returned. + * @retval FDS_ERR_NULL_ARG If @p p_desc is NULL. + */ +ret_code_t fds_descriptor_from_rec_id(fds_record_desc_t * p_desc, + uint32_t record_id); + + +/**@brief Function for obtaining a record ID from a record descriptor. + * + * This function can be used to extract a record ID from a descriptor. For example, you could use + * it in the callback function to compare the record ID of an event to the record IDs of the + * records for which you have a descriptor. + * + * @warning + * This function does not check whether the record descriptor is valid. If the descriptor is not + * initialized or has been tampered with, the resulting record ID might be invalid. + * + * @param[in] p_desc The descriptor from which the record ID should be extracted. + * @param[out] p_record_id The record ID that is contained in the given descriptor. + * + * @retval FDS_SUCCESS If a record ID was returned. + * @retval FDS_ERR_NULL_ARG If @p p_desc or @p p_record_id is NULL. + */ +ret_code_t fds_record_id_from_desc(fds_record_desc_t const * p_desc, + uint32_t * p_record_id); + + +/**@brief Function for retrieving file system statistics. + * + * This function retrieves file system statistics, such as the number of open records, the space + * that can be reclaimed by garbage collection, and others. + * + * @param[out] p_stat File system statistics. + * + * @retval FDS_SUCCESS If the statistics were returned successfully. + * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. + * @retval FDS_ERR_NULL_ARG If @p p_stat is NULL. + */ +ret_code_t fds_stat(fds_stat_t * p_stat); + + +/** @} */ + + +#ifdef __cplusplus +} +#endif + +#endif // FDS_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fds/fds_internal_defs.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fds/fds_internal_defs.h new file mode 100644 index 00000000000..7502b437505 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fds/fds_internal_defs.h @@ -0,0 +1,327 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef FDS_INTERNAL_DEFS_H__ +#define FDS_INTERNAL_DEFS_H__ +#include "sdk_config.h" +#include +#include + +#if defined (FDS_THREADS) + #include "nrf_soc.h" + #include "app_util_platform.h" +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +#define FDS_PAGE_TAG_SIZE (2) // Page tag size, in 4-byte words. +#define FDS_PAGE_TAG_WORD_0 (0) // Offset of the first word in the page tag from the page address. +#define FDS_PAGE_TAG_WORD_1 (1) // Offset of the second word in the page tag from the page address. + +// Page tag constants +#define FDS_PAGE_TAG_MAGIC (0xDEADC0DE) +#define FDS_PAGE_TAG_SWAP (0xF11E01FF) +#define FDS_PAGE_TAG_DATA (0xF11E01FE) + +#define FDS_ERASED_WORD (0xFFFFFFFF) + +#define FDS_OFFSET_TL (0) // Offset of TL from the record base address, in 4-byte words. +#define FDS_OFFSET_IC (1) // Offset of IC from the record base address, in 4-byte words. +#define FDS_OFFSET_ID (2) // Offset of ID from the record base address, in 4-byte words. +#define FDS_OFFSET_DATA (3) // Offset of the data from the record base address, in 4-byte words. + +#define FDS_HEADER_SIZE_TL (1) // Size of the TL part of the header, in 4-byte words. +#define FDS_HEADER_SIZE_IC (1) // Size of the IC part of the header, in 4-byte words. +#define FDS_HEADER_SIZE_ID (1) // Size of the record ID in the header, in 4-byte words. +#define FDS_HEADER_SIZE (3) // Size of the whole header, in 4-byte words. + +#define FDS_OP_EXECUTING (NRF_SUCCESS) +#define FDS_OP_COMPLETED (0x1D1D) + +#define NRF_FSTORAGE_NVMC 1 +#define NRF_FSTORAGE_SD 2 + +// The size of a physical page, in 4-byte words. +#if defined(NRF51) + #define FDS_PHY_PAGE_SIZE (256) +#else + #define FDS_PHY_PAGE_SIZE (1024) +#endif + +// The number of physical pages to be used. This value is configured indirectly. +#define FDS_PHY_PAGES ((FDS_VIRTUAL_PAGES * FDS_VIRTUAL_PAGE_SIZE) / FDS_PHY_PAGE_SIZE) + +// The size of a virtual page, in number of physical pages. +#define FDS_PHY_PAGES_IN_VPAGE (FDS_VIRTUAL_PAGE_SIZE / FDS_PHY_PAGE_SIZE) + +// The number of pages available to store data; which is the total minus one (the swap). +#define FDS_DATA_PAGES (FDS_VIRTUAL_PAGES - 1) + + // Just a shorter name for the size, in words, of a virtual page. +#define FDS_PAGE_SIZE (FDS_VIRTUAL_PAGE_SIZE) + + +#if (FDS_VIRTUAL_PAGE_SIZE % FDS_PHY_PAGE_SIZE != 0) + #error "FDS_VIRTUAL_PAGE_SIZE must be a multiple of the size of a physical page." +#endif + +#if (FDS_VIRTUAL_PAGES < 2) + #error "FDS requires at least two virtual pages." +#endif + + +// Page types. +typedef enum +{ + FDS_PAGE_DATA, // Page is ready for storage. + FDS_PAGE_SWAP, // Page is reserved for garbage collection. + FDS_PAGE_ERASED, // Page is erased. + FDS_PAGE_UNDEFINED, // Undefined page type. +} fds_page_type_t; + + +typedef enum +{ + FDS_HEADER_VALID, // Valid header. + FDS_HEADER_DIRTY, // Header is incomplete, or record has been deleted. + FDS_HEADER_CORRUPT // Header contains corrupt information, not related to CRC. +} fds_header_status_t; + + +typedef struct +{ + fds_page_type_t page_type; // The page type. + uint32_t const * p_addr; // The address of the page. + uint16_t write_offset; // The page write offset, in 4-byte words. + uint16_t words_reserved; // The amount of words reserved. + uint32_t volatile records_open; // The number of open records. + bool can_gc; // Indicates that there are some records that have been deleted. +} fds_page_t; + + +typedef struct +{ + uint32_t const * p_addr; + uint16_t write_offset; +} fds_swap_page_t; + + +// FDS op-codes. +typedef enum +{ + FDS_OP_NONE, + FDS_OP_INIT, // Initialize the module. + FDS_OP_WRITE, // Write a record to flash. + FDS_OP_UPDATE, // Update a record. + FDS_OP_DEL_RECORD, // Delete a record. + FDS_OP_DEL_FILE, // Delete a file. + FDS_OP_GC // Run garbage collection. +} fds_op_code_t; + + +typedef enum +{ + FDS_OP_INIT_TAG_SWAP, + FDS_OP_INIT_TAG_DATA, + FDS_OP_INIT_ERASE_SWAP, + FDS_OP_INIT_PROMOTE_SWAP, +} fds_init_step_t; + + +typedef enum +{ + FDS_OP_WRITE_HEADER_BEGIN, // Write the record key and length. + FDS_OP_WRITE_HEADER_FINALIZE, // Write the file ID and CRC. + FDS_OP_WRITE_RECORD_ID, // Write the record ID. + FDS_OP_WRITE_DATA, // Write the record data. + FDS_OP_WRITE_FIND_RECORD, + FDS_OP_WRITE_FLAG_DIRTY, // Flag a record as dirty (as part of an update operation). + FDS_OP_WRITE_DONE, +} fds_write_step_t; + + +typedef enum +{ + FDS_OP_DEL_RECORD_FLAG_DIRTY, // Flag a record as dirty. + FDS_OP_DEL_FILE_FLAG_DIRTY, // Flag multiple records as dirty. + FDS_OP_DEL_DONE, +} fds_delete_step_t; + + +#if defined(__CC_ARM) + #pragma push + #pragma anon_unions +#elif defined(__ICCARM__) + #pragma language=extended +#elif defined(__GNUC__) + // anonymous unions are enabled by default +#endif + +typedef struct +{ + fds_op_code_t op_code; // The opcode for the operation. + union + { + struct + { + fds_init_step_t step; // The current step the operation is at. + } init; + struct + { + fds_header_t header; + void const * p_data; + uint16_t page; // The page the flash space for this command was reserved. + fds_write_step_t step; // The current step the operation is at. + uint32_t record_to_delete; // The record to delete in case this is an update. + } write; + struct + { + fds_delete_step_t step; + uint16_t file_id; + uint16_t record_key; + uint32_t record_to_delete; + } del; + }; +} fds_op_t; + +#if defined(__CC_ARM) + #pragma pop +#elif defined(__ICCARM__) + // leave anonymous unions enabled +#elif defined(__GNUC__) + // anonymous unions are enabled by default +#endif + + +enum +{ + PAGE_ERASED = 0x1, // One or more erased pages found. + PAGE_DATA = 0x2, // One or more data pages found. + PAGE_SWAP_CLEAN = 0x4, // A clean (empty) swap page was found. + PAGE_SWAP_DIRTY = 0x8, // A dirty (non-empty) swap page was found. +}; + + +typedef enum +{ + // No erased pages or FDS pages found. + // This is a fatal error. + NO_PAGES, + + // The filesystem can not be garbage collected. + // This is a fatal error. + NO_SWAP = (PAGE_DATA), + + // Perform a fresh installation. + FRESH_INSTALL = (PAGE_ERASED), + + // Tag an erased page as swap. + TAG_SWAP = (PAGE_ERASED | PAGE_DATA), + + // Tag all erased pages as data. + TAG_DATA = (PAGE_ERASED | PAGE_SWAP_CLEAN), + + // Tag all remaining erased pages as data. + TAG_DATA_INST = (PAGE_ERASED | PAGE_DATA | PAGE_SWAP_CLEAN), + + // The swap is dirty, likely because the device powered off during GC. + // Because there is also an erased page, assume that that page has been garbage collected. + // Hence, tag the swap as data (promote), an erased page as swap and remaining pages as data. + PROMOTE_SWAP = (PAGE_ERASED | PAGE_SWAP_DIRTY), + + // Tag the swap as data (promote), an erased page as swap and remaining pages as data. + PROMOTE_SWAP_INST = (PAGE_ERASED | PAGE_DATA | PAGE_SWAP_DIRTY), + + // The swap is dirty (written) and there are no erased pages. It is likely that the device + // powered off during GC. It is safe to discard (erase) the swap, since data that was + // swapped out still lies in one of the valid pages. + DISCARD_SWAP = (PAGE_DATA | PAGE_SWAP_DIRTY), + + // Do nothing. + ALREADY_INSTALLED = (PAGE_DATA | PAGE_SWAP_CLEAN), + +} fds_init_opts_t; + + +typedef enum +{ + GC_BEGIN, // Begin GC. + GC_NEXT_PAGE, // GC a page. + GC_FIND_NEXT_RECORD, // Find a valid record to copy. + GC_COPY_RECORD, // Copy a valid record to swap. + GC_ERASE_PAGE, // Erase the page being garbage collected. + GC_DISCARD_SWAP, // Erase (discard) the swap page. + GC_PROMOTE_SWAP, // Tag the swap as valid. + GC_TAG_NEW_SWAP // Tag a freshly erased (GCed) page as swap. +} fds_gc_state_t; + + +// Holds garbage collection status and related data. +typedef struct +{ + fds_gc_state_t state; // The current GC step. + uint16_t cur_page; // The current page being garbage collected. + uint32_t const * p_record_src; // The current record being copied to swap. + uint16_t run_count; // Total number of times GC was run. + bool do_gc_page[FDS_DATA_PAGES]; // Controls which pages to garbage collect. + bool resume; // Whether or not GC should be resumed. +} fds_gc_data_t; + + +// Macros to enable and disable application interrupts. +#if defined (FDS_THREADS) + + #define CRITICAL_SECTION_ENTER() CRITICAL_REGION_ENTER() + #define CRITICAL_SECTION_EXIT() CRITICAL_REGION_EXIT() + +#else + + #define CRITICAL_SECTION_ENTER() + #define CRITICAL_SECTION_EXIT() + +#endif + + +#ifdef __cplusplus +} +#endif + +#endif // FDS_INTERNAL_DEFS_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/ble_flash/ble_flash.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/ble_flash/ble_flash.c new file mode 100644 index 00000000000..25368adaee7 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/ble_flash/ble_flash.c @@ -0,0 +1,313 @@ +/** + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "ble_flash.h" +#include +#include +#include +#include "nrf_soc.h" +#include "nordic_common.h" +#include "nrf_error.h" +#include "nrf.h" +#include "app_util.h" + + +static volatile bool m_radio_active = false; /**< TRUE if radio is active (or about to become active), FALSE otherwise. */ + + +uint16_t ble_flash_crc16_compute(uint8_t * p_data, uint16_t size, uint16_t * p_crc) +{ + uint16_t i; + uint16_t crc = (p_crc == NULL) ? 0xffff : *p_crc; + + for (i = 0; i < size; i++) + { + crc = (unsigned char)(crc >> 8) | (crc << 8); + crc ^= p_data[i]; + crc ^= (unsigned char)(crc & 0xff) >> 4; + crc ^= (crc << 8) << 4; + crc ^= ((crc & 0xff) << 4) << 1; + } + return crc; +} + + +/**@brief Function for erasing a page in flash. + * + * @param[in] p_page Pointer to first word in page to be erased. + */ +static void flash_page_erase(uint32_t * p_page) +{ + // Turn on flash erase enable and wait until the NVMC is ready. + NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Een << NVMC_CONFIG_WEN_Pos); + while (NRF_NVMC->READY == NVMC_READY_READY_Busy) + { + // Do nothing. + } + + // Erase page. + NRF_NVMC->ERASEPAGE = (uint32_t)p_page; + while (NRF_NVMC->READY == NVMC_READY_READY_Busy) + { + // Do nothing. + } + + // Turn off flash erase enable and wait until the NVMC is ready. + NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos); + while (NRF_NVMC->READY == NVMC_READY_READY_Busy) + { + // Do nothing + } +} + + +/**@brief Function for writing one word to flash. Unprotected write, which can interfere with radio communication. + * + * @details This function DOES NOT use the m_radio_active variable, but will force the write even + * when the radio is active. To be used only from @ref ble_flash_page_write. + * + * @note Flash location to be written must have been erased previously. + * + * @param[in] p_address Pointer to flash location to be written. + * @param[in] value Value to write to flash. + */ +static void flash_word_unprotected_write(uint32_t * p_address, uint32_t value) +{ + // Turn on flash write enable and wait until the NVMC is ready. + NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos); + while (NRF_NVMC->READY == NVMC_READY_READY_Busy) + { + // Do nothing. + } + *p_address = value; + + // Wait flash write to finish + while (NRF_NVMC->READY == NVMC_READY_READY_Busy) + { + // Do nothing. + } + + // Turn off flash write enable and wait until the NVMC is ready. + NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos); + while (NRF_NVMC->READY == NVMC_READY_READY_Busy) + { + // Do nothing. + } +} + + +/**@brief Function for writing one word to flash. + * + * @note Flash location to be written must have been erased previously. + * + * @param[in] p_address Pointer to flash location to be written. + * @param[in] value Value to write to flash. + */ +static void flash_word_write(uint32_t * p_address, uint32_t value) +{ + // If radio is active, wait for it to become inactive. + while (m_radio_active) + { + // Do nothing (just wait for radio to become inactive). + (void) sd_app_evt_wait(); + } + + // Turn on flash write enable and wait until the NVMC is ready. + NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos); + while (NRF_NVMC->READY == NVMC_READY_READY_Busy) + { + // Do nothing. + } + + *p_address = value; + // Wait flash write to finish + while (NRF_NVMC->READY == NVMC_READY_READY_Busy) + { + // Do nothing. + } + // Turn off flash write enable and wait until the NVMC is ready. + NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos); + while (NRF_NVMC->READY == NVMC_READY_READY_Busy) + { + // Do nothing + } +} + + +uint32_t ble_flash_word_write(uint32_t * p_address, uint32_t value) +{ + flash_word_write(p_address, value); + return NRF_SUCCESS; +} + + +uint32_t ble_flash_block_write(uint32_t * p_address, uint32_t * p_in_array, uint16_t word_count) +{ + uint16_t i; + + for (i = 0; i < word_count; i++) + { + flash_word_write(p_address, p_in_array[i]); + p_address++; + } + + return NRF_SUCCESS; +} + + +uint32_t ble_flash_page_erase(uint8_t page_num) +{ + uint32_t * p_page = (uint32_t *)(BLE_FLASH_PAGE_SIZE * page_num); + flash_page_erase(p_page); + + return NRF_SUCCESS; +} + + +uint32_t ble_flash_page_write(uint8_t page_num, uint32_t * p_in_array, uint8_t word_count) +{ + int i; + uint32_t * p_page; + uint32_t * p_curr_addr; + uint16_t in_data_crc; + uint16_t flash_crc; + uint32_t flash_header; + + p_page = (uint32_t *)(BLE_FLASH_PAGE_SIZE * page_num); + p_curr_addr = p_page; + + // Calculate CRC of the data to write. + in_data_crc = ble_flash_crc16_compute((uint8_t *)p_in_array, + word_count * sizeof(uint32_t), + NULL); + + // Compare the calculated to the one in flash. + flash_header = *p_curr_addr; + flash_crc = (uint16_t)flash_header; + + if (flash_crc == in_data_crc) + { + // Data is the same as the data already stored in flash, return without modifying flash. + return NRF_SUCCESS; + } + + // Erase flash page + flash_page_erase(p_page); + + // Reserve space for magic number (for detecting if flash content is valid). + p_curr_addr++; + + // Reserve space for saving word_count. + p_curr_addr++; + + // Write data + for (i = 0; i < word_count; i++) + { + flash_word_unprotected_write(p_curr_addr, p_in_array[i]); + p_curr_addr++; + } + + // Write number of elements. + flash_word_write(p_page + 1, (uint32_t)(word_count)); + + // Write magic number and CRC to indicate that flash content is valid. + flash_header = BLE_FLASH_MAGIC_NUMBER | (uint32_t)in_data_crc; + flash_word_write(p_page, flash_header); + + return NRF_SUCCESS; +} + + +uint32_t ble_flash_page_read(uint8_t page_num, uint32_t * p_out_array, uint8_t * p_word_count) +{ + int byte_count; + uint32_t * p_page; + uint32_t * p_curr_addr; + uint32_t flash_header; + uint32_t calc_header; + uint16_t calc_crc; + uint32_t tmp; + + p_page = (uint32_t *)(BLE_FLASH_PAGE_SIZE * page_num); + p_curr_addr = p_page; + + // Check if block is valid + flash_header = *p_curr_addr; + tmp = flash_header & 0xFFFF0000; + if (tmp != BLE_FLASH_MAGIC_NUMBER) + { + *p_word_count = 0; + return NRF_ERROR_NOT_FOUND; + } + p_curr_addr++; + + // Read number of elements + *p_word_count = (uint8_t)(*(p_curr_addr)); + p_curr_addr++; + + // Read data + byte_count = (*p_word_count) * sizeof(uint32_t); + memcpy(p_out_array, p_curr_addr, byte_count); + + // Check CRC + calc_crc = ble_flash_crc16_compute((uint8_t *)p_out_array, + (*p_word_count) * sizeof(uint32_t), + NULL); + calc_header = BLE_FLASH_MAGIC_NUMBER | (uint32_t)calc_crc; + + if (calc_header != flash_header) + { + return NRF_ERROR_NOT_FOUND; + } + + return NRF_SUCCESS; +} + + +uint32_t ble_flash_page_addr(uint8_t page_num, uint32_t ** pp_page_addr) +{ + *pp_page_addr = (uint32_t *)(BLE_FLASH_PAGE_SIZE * page_num); + return NRF_SUCCESS; +} + + +void ble_flash_on_radio_active_evt(bool radio_active) +{ + m_radio_active = radio_active; +} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/ble_flash/ble_flash.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/ble_flash/ble_flash.h new file mode 100644 index 00000000000..8fffeb62a7c --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/ble_flash/ble_flash.h @@ -0,0 +1,178 @@ +/** + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/** @file + * + * @defgroup ble_flash_module Flash Manager + * @{ + * @ingroup ble_sdk_lib + * @brief Module for accessing flash memory. + * + * @details It contains functions for reading, writing and erasing one page in flash. + * + * The module uses the first 32 bits of the flash page to write a magic number in order to + * determine if the page has been written or not. + * + * @note Be careful not to use a page number in the SoftDevice area (which currently occupies the + * range 0 to 127), or in your application space! In both cases, this would end up + * with a hard fault. + */ + +#ifndef BLE_FLASH_H__ +#define BLE_FLASH_H__ + +#include +#include +#include "nrf.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define BLE_FLASH_PAGE_SIZE ((uint16_t)NRF_FICR->CODEPAGESIZE) /**< Size of one flash page. */ +#define BLE_FLASH_MAGIC_NUMBER 0x45DE0000 /**< Magic value to identify if flash contains valid data. */ +#define BLE_FLASH_EMPTY_MASK 0xFFFFFFFF /**< Bit mask that defines an empty address in flash. */ + + +/**@brief Macro for getting the end of the flash available for application. + * + * @details The result flash page number indicates the end boundary of the flash available + * to the application. If a bootloader is used, the end will be the start of the + * bootloader region. Otherwise, the end will be the size of the flash. + */ +#define BLE_FLASH_PAGE_END \ + ((NRF_UICR->NRFFW[0] != BLE_FLASH_EMPTY_MASK) \ + ? (NRF_UICR->NRFFW[0] / BLE_FLASH_PAGE_SIZE) \ + : NRF_FICR->CODESIZE) + +/**@brief Function for erasing the specified flash page, and then writes the given data to this page. + * + * @warning This operation blocks the CPU. DO NOT use while in a connection! + * + * @param[in] page_num Page number to update. + * @param[in] p_in_array Pointer to a RAM area containing the elements to write in flash. + * This area has to be 32 bits aligned. + * @param[in] word_count Number of 32 bits words to write in flash. + * + * @return NRF_SUCCESS on successful flash write, otherwise an error code. + */ +uint32_t ble_flash_page_write(uint8_t page_num, uint32_t * p_in_array, uint8_t word_count); + +/**@brief Function for reading data from flash to RAM. + * + * @param[in] page_num Page number to read. + * @param[out] p_out_array Pointer to a RAM area where the found data will be written. + * This area has to be 32 bits aligned. + * @param[out] p_word_count Number of 32 bits words read. + * + * @return NRF_SUCCESS on successful upload, NRF_ERROR_NOT_FOUND if no valid data has been found + * in flash (first 32 bits not equal to the MAGIC_NUMBER + CRC). + */ +uint32_t ble_flash_page_read(uint8_t page_num, uint32_t * p_out_array, uint8_t * p_word_count); + +/**@brief Function for erasing a flash page. + * + * @note This operation blocks the CPU, so it should not be done while the radio is running! + * + * @param[in] page_num Page number to erase. + * + * @return NRF_SUCCESS on success, an error_code otherwise. + */ +uint32_t ble_flash_page_erase(uint8_t page_num); + +/**@brief Function for writing one word to flash. + * + * @note Flash location to be written must have been erased previously. + * + * @param[in] p_address Pointer to flash location to be written. + * @param[in] value Value to write to flash. + * + * @return NRF_SUCCESS. + */ +uint32_t ble_flash_word_write(uint32_t * p_address, uint32_t value); + +/**@brief Function for writing a data block to flash. + * + * @note Flash locations to be written must have been erased previously. + * + * @param[in] p_address Pointer to start of flash location to be written. + * @param[in] p_in_array Pointer to start of flash block to be written. + * @param[in] word_count Number of words to be written. + * + * @return NRF_SUCCESS. + */ +uint32_t ble_flash_block_write(uint32_t * p_address, uint32_t * p_in_array, uint16_t word_count); + +/**@brief Function for computing pointer to start of specified flash page. + * + * @param[in] page_num Page number. + * @param[out] pp_page_addr Pointer to start of flash page. + * + * @return NRF_SUCCESS. + */ +uint32_t ble_flash_page_addr(uint8_t page_num, uint32_t ** pp_page_addr); + +/**@brief Function for calculating a 16 bit CRC using the CRC-16-CCITT scheme. + * + * @param[in] p_data Pointer to data on which the CRC is to be calculated. + * @param[in] size Number of bytes on which the CRC is to be calculated. + * @param[in] p_crc Initial CRC value (if NULL, a preset value is used as the initial value). + * + * @return Calculated CRC. + */ +uint16_t ble_flash_crc16_compute(uint8_t * p_data, uint16_t size, uint16_t * p_crc); + +/**@brief Function for handling flashing module Radio Notification event. + * + * @note For flash writing to work safely while in a connection or while advertising, this function + * MUST be called from the Radio Notification module's event handler (see + * @ref ble_radio_notification for details). + * + * @param[in] radio_active TRUE if radio is active (or about to become active), FALSE otherwise. + */ +void ble_flash_on_radio_active_evt(bool radio_active); + + +#ifdef __cplusplus +} +#endif + +#endif // BLE_FLASH_H__ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_twi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_twi.h index a876a9c8121..b0a2cd89466 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_twi.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_twi.h @@ -135,8 +135,8 @@ typedef struct * @brief Macro for creating a TWI master driver instance. */ // Mbed - need these -#define NRF_TWIM0_ENABLED 1 -#define NRF_TWIM1_ENABLED 1 +//#define NRF_TWIM0_ENABLED 1 +//#define NRF_TWIM1_ENABLED 1 #define NRF_DRV_TWI_INSTANCE(id) NRF_DRV_TWI_INSTANCE_(id) #define NRF_DRV_TWI_INSTANCE_(id) NRF_DRV_TWI_INSTANCE_ ## id diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/nrfx_glue.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/nrfx_glue.h index 464c6ee79bc..673b98de9c6 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/nrfx_glue.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/nrfx_glue.h @@ -55,7 +55,7 @@ extern "C" { */ // RF - remove the legacy layer... this is preventing driver instances from being generated -//#include +#include #include diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_uarte.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_uarte.c index 1d5bf090aed..cfe40ba5b0c 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_uarte.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_uarte.c @@ -1,6 +1,6 @@ /** * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA - * + * * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification, @@ -566,7 +566,7 @@ static void uarte_irq_handler(NRF_UARTE_Type * p_uarte, } } -#if NRFX_CHECK(NRFX_UARTE0_ENABLED) +#if ( NRFX_CHECK(NRFX_UARTE0_ENABLED) && !(NRFX_CHECK(NRFX_UART0_ENABLED))) void nrfx_uarte_0_irq_handler(void) { uarte_irq_handler(NRF_UARTE0, &m_cb[NRFX_UARTE0_INST_IDX]); From 365add4254b29a6b79afd7ffccd8fbb391190dad Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Thu, 26 Jul 2018 16:50:17 -0500 Subject: [PATCH 433/488] First porting effort covered by JIRA IOTDEV-1572: - top level files ported from TARGET_NORDIC/TARGET_NRF5x/ Also addressed: - fixed linking issue for gcc - added support for nRF52-DK builds, but reverted to using nRF52840 sdk_config.h (must be updated) - introduced "RTC" to targets.json (might need to be removed eventually) --- .../TARGET_MCU_NRF52832/config/sdk_config.h | 12782 ++++++++++------ .../TARGET_MCU_NRF52840/config/sdk_config.h | 50 +- .../TARGET_NRF5x/TARGET_NRF52/i2c_api.c | 11 +- .../TARGET_NRF5x/TARGET_NRF52/serial_api.c | 35 +- .../s132_nrf52_6.0.0_licence-agreement.txt | 35 + .../s132_nrf52_6.0.0_migration-document.pdf | Bin 0 -> 133032 bytes .../doc/s132_nrf52_6.0.0_release-notes.pdf | Bin 0 -> 50680 bytes .../headers/ble_err.h | 93 + .../headers/ble_gap.h | 2653 ++++ .../headers/ble_gatt.h | 228 + .../headers/ble_gattc.h | 715 + .../headers/ble_gatts.h | 845 + .../headers/ble_hci.h | 135 + .../headers/ble_l2cap.h | 506 + .../headers/ble_ranges.h | 156 + .../headers/ble_types.h | 215 + .../headers/nrf52/nrf_mbr.h | 241 + .../headers/nrf_ble.h | 622 + .../headers/nrf_error.h | 90 + .../headers/nrf_error_sdm.h | 70 + .../headers/nrf_error_soc.h | 85 + .../headers/nrf_nvic.h | 486 + .../headers/nrf_sd_def.h | 59 + .../headers/nrf_sdm.h | 358 + .../headers/nrf_soc.h | 964 ++ .../headers/nrf_svc.h | 90 + .../s132_nrf52_6.0.0_licence-agreement.txt | 35 + .../hex/s132_nrf52_6.0.0_softdevice.hex | 9278 +++++++++++ .../TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json | 42 + .../integration/nrfx/legacy/nrf_drv_rng.h | 115 + .../integration/nrfx/nrfx_glue.h | 2 - .../TARGET_NORDIC/TARGET_NRF5x/common_rtc.c | 4 +- targets/TARGET_NORDIC/TARGET_NRF5x/gpio_api.c | 28 +- targets/TARGET_NORDIC/TARGET_NRF5x/rtc_api.c | 6 +- .../TARGET_NORDIC/TARGET_NRF5x/us_ticker.c | 4 +- targets/targets.json | 1 + 36 files changed, 26269 insertions(+), 4770 deletions(-) create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/doc/s132_nrf52_6.0.0_licence-agreement.txt create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/doc/s132_nrf52_6.0.0_migration-document.pdf create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/doc/s132_nrf52_6.0.0_release-notes.pdf create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_err.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gap.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gatt.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gattc.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gatts.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_hci.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_l2cap.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_ranges.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_types.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf52/nrf_mbr.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_ble.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_error.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_error_sdm.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_error_soc.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_nvic.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_sd_def.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_sdm.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_soc.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_svc.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/hex/s132_nrf52_6.0.0_licence-agreement.txt create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/hex/s132_nrf52_6.0.0_softdevice.hex create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_rng.h diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h index 2d3127b9f7b..58c0cc4608e 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h @@ -1,5 +1,5 @@ /** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA + * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA * * All rights reserved. * @@ -21,10 +21,10 @@ * * 4. This software, with or without modification, must only be used with a * Nordic Semiconductor ASA integrated circuit. - * + * * 5. Any software provided in binary form under this license must not be reverse * engineered, decompiled, modified and/or disassembled. - * + * * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE @@ -35,1583 +35,3835 @@ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * + * */ - - #ifndef SDK_CONFIG_H #define SDK_CONFIG_H // <<< Use Configuration Wizard in Context Menu >>>\n #ifdef USE_APP_CONFIG #include "app_config.h" #endif -// Board Support -// Enable NRF Asserts when Mbed NDEBUG is not set -#if !defined(NDEBUG) && !defined(DEBUG_NRF_USER) -#define DEBUG_NRF_USER -#endif -//========================================================== -// BSP_BTN_BLE_ENABLED - bsp_btn_ble - Button Control for BLE +// nRF_BLE + +//========================================================== +// BLE_ADVERTISING_ENABLED - ble_advertising - Advertising module + + +#ifndef BLE_ADVERTISING_ENABLED +#define BLE_ADVERTISING_ENABLED 0 +#endif + +// BLE_DTM_ENABLED - ble_dtm - Module for testing RF/PHY using DTM commands + + +#ifndef BLE_DTM_ENABLED +#define BLE_DTM_ENABLED 0 +#endif + +// BLE_RACP_ENABLED - ble_racp - Record Access Control Point library + + +#ifndef BLE_RACP_ENABLED +#define BLE_RACP_ENABLED 0 +#endif + +// NRF_BLE_QWR_ENABLED - nrf_ble_qwr - Queued writes support module (prepare/execute write) +//========================================================== +#ifndef NRF_BLE_QWR_ENABLED +#define NRF_BLE_QWR_ENABLED 0 +#endif +// NRF_BLE_QWR_MAX_ATTR - Maximum number of attribute handles that can be registered. This number must be adjusted according to the number of attributes for which Queued Writes will be enabled. If it is zero, the module will reject all Queued Write requests. +#ifndef NRF_BLE_QWR_MAX_ATTR +#define NRF_BLE_QWR_MAX_ATTR 0 +#endif + +// + +// PEER_MANAGER_ENABLED - peer_manager - Peer Manager +//========================================================== +#ifndef PEER_MANAGER_ENABLED +#define PEER_MANAGER_ENABLED 0 +#endif +// PM_MAX_REGISTRANTS - Number of event handlers that can be registered. +#ifndef PM_MAX_REGISTRANTS +#define PM_MAX_REGISTRANTS 3 +#endif + +// PM_FLASH_BUFFERS - Number of internal buffers for flash operations. +// Decrease this value to lower RAM usage. + +#ifndef PM_FLASH_BUFFERS +#define PM_FLASH_BUFFERS 2 +#endif + +// PM_CENTRAL_ENABLED - Enable/disable central-specific Peer Manager functionality. + + +// Enable/disable central-specific Peer Manager functionality. + +#ifndef PM_CENTRAL_ENABLED +#define PM_CENTRAL_ENABLED 1 +#endif + +// PM_SERVICE_CHANGED_ENABLED - Enable/disable the service changed management for GATT server in Peer Manager. + + +// If not using a GATT server, or using a server wihout a service changed characteristic, +// disable this to save code space. + +#ifndef PM_SERVICE_CHANGED_ENABLED +#define PM_SERVICE_CHANGED_ENABLED 1 +#endif + +// PM_PEER_RANKS_ENABLED - Enable/disable the peer rank management in Peer Manager. + + +// Set this to false to save code space if not using the peer rank API. + +#ifndef PM_PEER_RANKS_ENABLED +#define PM_PEER_RANKS_ENABLED 1 +#endif + +// + +// +//========================================================== + +// nRF_BLE_Services + +//========================================================== +// BLE_ANCS_C_ENABLED - ble_ancs_c - Apple Notification Service Client + + +#ifndef BLE_ANCS_C_ENABLED +#define BLE_ANCS_C_ENABLED 0 +#endif + +// BLE_ANS_C_ENABLED - ble_ans_c - Alert Notification Service Client + + +#ifndef BLE_ANS_C_ENABLED +#define BLE_ANS_C_ENABLED 0 +#endif + +// BLE_BAS_C_ENABLED - ble_bas_c - Battery Service Client + + +#ifndef BLE_BAS_C_ENABLED +#define BLE_BAS_C_ENABLED 0 +#endif + +// BLE_BAS_ENABLED - ble_bas - Battery Service +//========================================================== +#ifndef BLE_BAS_ENABLED +#define BLE_BAS_ENABLED 0 +#endif +// BLE_BAS_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef BLE_BAS_CONFIG_LOG_ENABLED +#define BLE_BAS_CONFIG_LOG_ENABLED 0 +#endif +// BLE_BAS_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef BLE_BAS_CONFIG_LOG_LEVEL +#define BLE_BAS_CONFIG_LOG_LEVEL 3 +#endif + +// BLE_BAS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef BLE_BAS_CONFIG_INFO_COLOR +#define BLE_BAS_CONFIG_INFO_COLOR 0 +#endif + +// BLE_BAS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef BLE_BAS_CONFIG_DEBUG_COLOR +#define BLE_BAS_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// BLE_CSCS_ENABLED - ble_cscs - Cycling Speed and Cadence Service + + +#ifndef BLE_CSCS_ENABLED +#define BLE_CSCS_ENABLED 0 +#endif + +// BLE_CTS_C_ENABLED - ble_cts_c - Current Time Service Client + + +#ifndef BLE_CTS_C_ENABLED +#define BLE_CTS_C_ENABLED 0 +#endif + +// BLE_DIS_ENABLED - ble_dis - Device Information Service + + +#ifndef BLE_DIS_ENABLED +#define BLE_DIS_ENABLED 0 +#endif + +// BLE_GLS_ENABLED - ble_gls - Glucose Service + + +#ifndef BLE_GLS_ENABLED +#define BLE_GLS_ENABLED 0 +#endif + +// BLE_HIDS_ENABLED - ble_hids - Human Interface Device Service + + +#ifndef BLE_HIDS_ENABLED +#define BLE_HIDS_ENABLED 0 +#endif + +// BLE_HRS_C_ENABLED - ble_hrs_c - Heart Rate Service Client + + +#ifndef BLE_HRS_C_ENABLED +#define BLE_HRS_C_ENABLED 0 +#endif + +// BLE_HRS_ENABLED - ble_hrs - Heart Rate Service + + +#ifndef BLE_HRS_ENABLED +#define BLE_HRS_ENABLED 0 +#endif + +// BLE_HTS_ENABLED - ble_hts - Health Thermometer Service + + +#ifndef BLE_HTS_ENABLED +#define BLE_HTS_ENABLED 0 +#endif + +// BLE_IAS_C_ENABLED - ble_ias_c - Immediate Alert Service Client + + +#ifndef BLE_IAS_C_ENABLED +#define BLE_IAS_C_ENABLED 0 +#endif + +// BLE_IAS_ENABLED - ble_ias - Immediate Alert Service +//========================================================== +#ifndef BLE_IAS_ENABLED +#define BLE_IAS_ENABLED 0 +#endif +// BLE_IAS_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef BLE_IAS_CONFIG_LOG_ENABLED +#define BLE_IAS_CONFIG_LOG_ENABLED 0 +#endif +// BLE_IAS_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef BLE_IAS_CONFIG_LOG_LEVEL +#define BLE_IAS_CONFIG_LOG_LEVEL 3 +#endif + +// BLE_IAS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef BLE_IAS_CONFIG_INFO_COLOR +#define BLE_IAS_CONFIG_INFO_COLOR 0 +#endif + +// BLE_IAS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef BLE_IAS_CONFIG_DEBUG_COLOR +#define BLE_IAS_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// BLE_LBS_C_ENABLED - ble_lbs_c - Nordic LED Button Service Client + + +#ifndef BLE_LBS_C_ENABLED +#define BLE_LBS_C_ENABLED 0 +#endif + +// BLE_LBS_ENABLED - ble_lbs - LED Button Service + + +#ifndef BLE_LBS_ENABLED +#define BLE_LBS_ENABLED 0 +#endif + +// BLE_LLS_ENABLED - ble_lls - Link Loss Service + + +#ifndef BLE_LLS_ENABLED +#define BLE_LLS_ENABLED 0 +#endif + +// BLE_NUS_C_ENABLED - ble_nus_c - Nordic UART Central Service + + +#ifndef BLE_NUS_C_ENABLED +#define BLE_NUS_C_ENABLED 0 +#endif + +// BLE_NUS_ENABLED - ble_nus - Nordic UART Service +//========================================================== +#ifndef BLE_NUS_ENABLED +#define BLE_NUS_ENABLED 0 +#endif +// BLE_NUS_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef BLE_NUS_CONFIG_LOG_ENABLED +#define BLE_NUS_CONFIG_LOG_ENABLED 0 +#endif +// BLE_NUS_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef BLE_NUS_CONFIG_LOG_LEVEL +#define BLE_NUS_CONFIG_LOG_LEVEL 3 +#endif + +// BLE_NUS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef BLE_NUS_CONFIG_INFO_COLOR +#define BLE_NUS_CONFIG_INFO_COLOR 0 +#endif + +// BLE_NUS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef BLE_NUS_CONFIG_DEBUG_COLOR +#define BLE_NUS_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// BLE_RSCS_C_ENABLED - ble_rscs_c - Running Speed and Cadence Client + + +#ifndef BLE_RSCS_C_ENABLED +#define BLE_RSCS_C_ENABLED 0 +#endif + +// BLE_RSCS_ENABLED - ble_rscs - Running Speed and Cadence Service + + +#ifndef BLE_RSCS_ENABLED +#define BLE_RSCS_ENABLED 0 +#endif + +// BLE_TPS_ENABLED - ble_tps - TX Power Service + + +#ifndef BLE_TPS_ENABLED +#define BLE_TPS_ENABLED 0 +#endif + +// +//========================================================== + +// nRF_Core + +//========================================================== +// NRF_MPU_ENABLED - nrf_mpu - Module for MPU +//========================================================== +#ifndef NRF_MPU_ENABLED +#define NRF_MPU_ENABLED 0 +#endif +// NRF_MPU_CLI_CMDS - Enable CLI commands specific to the module + + +#ifndef NRF_MPU_CLI_CMDS +#define NRF_MPU_CLI_CMDS 0 +#endif + +// + +// NRF_STACK_GUARD_ENABLED - nrf_stack_guard - Module for Protecting Stack +//========================================================== +#ifndef NRF_STACK_GUARD_ENABLED +#define NRF_STACK_GUARD_ENABLED 0 +#endif +// NRF_STACK_GUARD_CONFIG_SIZE - Size of stack guard + +// <5=> 32 bytes +// <6=> 64 bytes +// <7=> 128 bytes +// <8=> 256 bytes +// <9=> 512 bytes +// <10=> 1024 bytes +// <11=> 2048 bytes +// <12=> 4096 bytes + +#ifndef NRF_STACK_GUARD_CONFIG_SIZE +#define NRF_STACK_GUARD_CONFIG_SIZE 7 +#endif + +// + +// +//========================================================== + +// nRF_Crypto + +//========================================================== +// NRF_CRYPTO_ENABLED - nrf_crypto - Cryptography library +//========================================================== +#ifndef NRF_CRYPTO_ENABLED +#define NRF_CRYPTO_ENABLED 1 +#endif +// NRF_CRYPTO_ALLOCATOR - Memory allocator + + +// Choose memory allocator used by nrf_crypto. Default is alloca if possible or nrf_malloc otherwise. If 'User macros' are selected then user have to create 'nrf_crypto_allocator.h' file containing NRF_CRYPTO_ALLOC, NRF_CRYPTO_FREE and NRF_CRYPTO_ALLOC_ON_STACK +// <0=> Default +// <1=> User macros +// <2=> On stack (alloca) +// <3=> C dynamic memory (malloc) +// <4=> SDK Memory Manager (nrf_malloc) + +#ifndef NRF_CRYPTO_ALLOCATOR +#define NRF_CRYPTO_ALLOCATOR 0 +#endif + +// NRF_CRYPTO_BACKEND_CC310_BL_ENABLED - Enable the ARM Cryptocell CC310 reduced backend. + +// The CC310 hardware-accelerated cryptography backend with reduced functionality and footprint (only available on nRF52840). +//========================================================== +#ifndef NRF_CRYPTO_BACKEND_CC310_BL_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_BL_ENABLED 0 +#endif +// NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP224R1_ENABLED - Enable the secp224r1 elliptic curve support using CC310_BL. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP224R1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP224R1_ENABLED 0 +#endif + +// NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP256R1_ENABLED - Enable the secp256r1 elliptic curve support using CC310_BL. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP256R1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP256R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_BL_HASH_SHA256_ENABLED - CC310_BL SHA-256 hash functionality. + + +// CC310_BL backend implementation for hardware-accelerated SHA-256. + +#ifndef NRF_CRYPTO_BACKEND_CC310_BL_HASH_SHA256_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_BL_HASH_SHA256_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_BL_HASH_LITTLE_ENDIAN_DIGEST_ENABLED - nrf_cc310_bl hash outputs digests in little endian + + +// Makes the nRF SH hash functions output digests in little endian format. Only for use in nRF SDK DFU! + +#ifndef NRF_CRYPTO_BACKEND_CC310_BL_HASH_LITTLE_ENDIAN_DIGEST_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_BL_HASH_LITTLE_ENDIAN_DIGEST_ENABLED 0 +#endif + +// NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_ENABLED - nrf_cc310_bl buffers to RAM before running hash operation + + +// Enabling this makes hashing of addresses in FLASH range possible. Size of buffer allocated for hashing is set by NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE + +#ifndef NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_ENABLED 0 +#endif + +// NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE - nrf_cc310_bl hash outputs digests in little endian +// Makes the nrf_cc310_bl hash functions output digests in little endian format. Only for use in nRF SDK DFU! + +#ifndef NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE +#define NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE 4096 +#endif + +// NRF_CRYPTO_BACKEND_CC310_BL_ECC_LITTLE_ENDIAN_ENABLED - Enable non-standard little endian byte order in nrf_cc310_bl ECC functions. + + +// This affects parameters for all nrf_cc310_bl ECC APIs (raw keys, signature, digest). Only for use in nRF SDK DFU! + +#ifndef NRF_CRYPTO_BACKEND_CC310_BL_ECC_LITTLE_ENDIAN_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_BL_ECC_LITTLE_ENDIAN_ENABLED 0 +#endif + +// + +// NRF_CRYPTO_BACKEND_CC310_ENABLED - Enable the ARM Cryptocell CC310 backend. + +// The CC310 hardware-accelerated cryptography backend (only available on nRF52840). +//========================================================== +#ifndef NRF_CRYPTO_BACKEND_CC310_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ENABLED 0 +#endif +// NRF_CRYPTO_BACKEND_CC310_AES_CBC_ENABLED - Enable the AES CBC mode using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CBC_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_AES_CBC_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_AES_CTR_ENABLED - Enable the AES CTR mode using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CTR_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_AES_CTR_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_AES_ECB_ENABLED - Enable the AES ECB mode using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_AES_ECB_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_AES_ECB_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_AES_CBC_MAC_ENABLED - Enable the AES CBC_MAC mode using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CBC_MAC_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_AES_CBC_MAC_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_AES_CMAC_ENABLED - Enable the AES CMAC mode using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CMAC_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_AES_CMAC_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_AES_CCM_ENABLED - Enable the AES CCM mode using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CCM_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_AES_CCM_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_AES_CCM_STAR_ENABLED - Enable the AES CCM* mode using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CCM_STAR_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_AES_CCM_STAR_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_CHACHA_POLY_ENABLED - Enable the CHACHA-POLY mode using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_CHACHA_POLY_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_CHACHA_POLY_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R1_ENABLED - Enable the secp160r1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R2_ENABLED - Enable the secp160r2 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R2_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R2_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP192R1_ENABLED - Enable the secp192r1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP192R1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP192R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP224R1_ENABLED - Enable the secp224r1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP224R1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP224R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP256R1_ENABLED - Enable the secp256r1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP256R1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP256R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP384R1_ENABLED - Enable the secp384r1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP384R1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP384R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP521R1_ENABLED - Enable the secp521r1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP521R1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP521R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP160K1_ENABLED - Enable the secp160k1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP160K1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP160K1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP192K1_ENABLED - Enable the secp192k1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP192K1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP192K1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP224K1_ENABLED - Enable the secp224k1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP224K1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP224K1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_ECC_SECP256K1_ENABLED - Enable the secp256k1 elliptic curve support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP256K1_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP256K1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_HASH_SHA256_ENABLED - CC310 SHA-256 hash functionality. + + +// CC310 backend implementation for hardware-accelerated SHA-256. + +#ifndef NRF_CRYPTO_BACKEND_CC310_HASH_SHA256_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_HASH_SHA256_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_HASH_SHA512_ENABLED - CC310 SHA-512 hash functionality + + +// CC310 backend implementation for SHA-512 (in software). + +#ifndef NRF_CRYPTO_BACKEND_CC310_HASH_SHA512_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_HASH_SHA512_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_HMAC_SHA256_ENABLED - CC310 HMAC using SHA-256 + + +// CC310 backend implementation for HMAC using hardware-accelerated SHA-256. + +#ifndef NRF_CRYPTO_BACKEND_CC310_HMAC_SHA256_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_HMAC_SHA256_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_HMAC_SHA512_ENABLED - CC310 HMAC using SHA-512 + + +// CC310 backend implementation for HMAC using SHA-512 (in software). + +#ifndef NRF_CRYPTO_BACKEND_CC310_HMAC_SHA512_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_HMAC_SHA512_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_CC310_RNG_ENABLED - Enable RNG support using CC310. + + +#ifndef NRF_CRYPTO_BACKEND_CC310_RNG_ENABLED +#define NRF_CRYPTO_BACKEND_CC310_RNG_ENABLED 1 +#endif + +// + +// NRF_CRYPTO_BACKEND_CIFRA_ENABLED - Enable the Cifra backend. +//========================================================== +#ifndef NRF_CRYPTO_BACKEND_CIFRA_ENABLED +#define NRF_CRYPTO_BACKEND_CIFRA_ENABLED 0 +#endif +// NRF_CRYPTO_BACKEND_CIFRA_AES_EAX_ENABLED - Enable the AES EAX mode using Cifra. + + +#ifndef NRF_CRYPTO_BACKEND_CIFRA_AES_EAX_ENABLED +#define NRF_CRYPTO_BACKEND_CIFRA_AES_EAX_ENABLED 1 +#endif + +// + +// NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED - Enable the mbed TLS backend. +//========================================================== +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED 0 +#endif +// NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_ENABLED - Enable the AES CBC mode mbed TLS. + + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_AES_CTR_ENABLED - Enable the AES CTR mode using mbed TLS. + + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CTR_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CTR_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_AES_CFB_ENABLED - Enable the AES CFB mode using mbed TLS. + + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CFB_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CFB_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_AES_ECB_ENABLED - Enable the AES ECB mode using mbed TLS. + + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_ECB_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_ECB_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_MAC_ENABLED - Enable the AES CBC MAC mode using mbed TLS. + + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_MAC_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_MAC_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_AES_CMAC_ENABLED - Enable the AES CMAC mode using mbed TLS. + + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CMAC_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CMAC_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_AES_CCM_ENABLED - Enable the AES CCM mode using mbed TLS. + + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CCM_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CCM_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_AES_GCM_ENABLED - Enable the AES GCM mode using mbed TLS. + + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_GCM_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_GCM_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192R1_ENABLED - Enable secp192r1 (NIST 192-bit) curve + + +// Enable this setting if you need secp192r1 (NIST 192-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192R1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED - Enable secp224r1 (NIST 224-bit) curve + + +// Enable this setting if you need secp224r1 (NIST 224-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED - Enable secp256r1 (NIST 256-bit) curve + + +// Enable this setting if you need secp256r1 (NIST 256-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED - Enable secp384r1 (NIST 384-bit) curve + + +// Enable this setting if you need secp384r1 (NIST 384-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED - Enable secp521r1 (NIST 521-bit) curve + + +// Enable this setting if you need secp521r1 (NIST 521-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED - Enable secp192k1 (Koblitz 192-bit) curve + + +// Enable this setting if you need secp192k1 (Koblitz 192-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED - Enable secp224k1 (Koblitz 224-bit) curve + + +// Enable this setting if you need secp224k1 (Koblitz 224-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED - Enable secp256k1 (Koblitz 256-bit) curve + + +// Enable this setting if you need secp256k1 (Koblitz 256-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED - Enable bp256r1 (Brainpool 256-bit) curve + + +// Enable this setting if you need bp256r1 (Brainpool 256-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED - Enable bp384r1 (Brainpool 384-bit) curve + + +// Enable this setting if you need bp384r1 (Brainpool 384-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED - Enable bp512r1 (Brainpool 512-bit) curve + + +// Enable this setting if you need bp512r1 (Brainpool 512-bit) support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED - Enable Curve25519 curve + + +// Enable this setting if you need Curve25519 support using MBEDTLS + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA256_ENABLED - Enable mbed TLS SHA-256 hash functionality. + + +// mbed TLS backend implementation for SHA-256. + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA256_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA256_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED - Enable mbed TLS SHA-512 hash functionality. + + +// mbed TLS backend implementation for SHA-512. + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA256_ENABLED - Enable mbed TLS HMAC using SHA-256. + + +// mbed TLS backend implementation for HMAC using SHA-256. + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA256_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA256_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED - Enable mbed TLS HMAC using SHA-512. + + +// mbed TLS backend implementation for HMAC using SHA-512. + +#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED +#define NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED 1 +#endif + +// + +// NRF_CRYPTO_BACKEND_MICRO_ECC_ENABLED - Enable the micro-ecc backend. +//========================================================== +#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ENABLED +#define NRF_CRYPTO_BACKEND_MICRO_ECC_ENABLED 0 +#endif +// NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP192R1_ENABLED - Enable secp192r1 (NIST 192-bit) curve + + +// Enable this setting if you need secp192r1 (NIST 192-bit) support using micro-ecc + +#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP192R1_ENABLED +#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP192R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP224R1_ENABLED - Enable secp224r1 (NIST 224-bit) curve + + +// Enable this setting if you need secp224r1 (NIST 224-bit) support using micro-ecc + +#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP224R1_ENABLED +#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP224R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256R1_ENABLED - Enable secp256r1 (NIST 256-bit) curve + + +// Enable this setting if you need secp256r1 (NIST 256-bit) support using micro-ecc + +#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256R1_ENABLED +#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256K1_ENABLED - Enable secp256k1 (Koblitz 256-bit) curve + + +// Enable this setting if you need secp256k1 (Koblitz 256-bit) support using micro-ecc + +#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256K1_ENABLED +#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256K1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_MICRO_ECC_PUBLIC_KEY_TRUSTED_ENABLED - Always trust raw public key (it will cause a security issue if the public key comes from an untrusted source) + + +// Enable this setting if you want to reduce flash usage. Only for use in nRF SDK DFU! Never enable it if the raw public key comes from an untrusted source. + +#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_PUBLIC_KEY_TRUSTED_ENABLED +#define NRF_CRYPTO_BACKEND_MICRO_ECC_PUBLIC_KEY_TRUSTED_ENABLED 0 +#endif + +// NRF_CRYPTO_BACKEND_MICRO_ECC_LITTLE_ENDIAN_ENABLED - Enable non-standard little endian byte order. + + +// This affects parameters for all ECC API (raw keys, signature, digest, shared secret). Only for use in nRF SDK DFU! + +#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_LITTLE_ENDIAN_ENABLED +#define NRF_CRYPTO_BACKEND_MICRO_ECC_LITTLE_ENDIAN_ENABLED 0 +#endif + +// + +// NRF_CRYPTO_BACKEND_NRF_HW_RNG_ENABLED - Enable the nRF HW RNG backend. + +// The nRF HW backend provide access to RNG peripheral in nRF5x devices. +//========================================================== +#ifndef NRF_CRYPTO_BACKEND_NRF_HW_RNG_ENABLED +#define NRF_CRYPTO_BACKEND_NRF_HW_RNG_ENABLED 0 +#endif +// NRF_CRYPTO_BACKEND_NRF_HW_RNG_MBEDTLS_CTR_DRBG_ENABLED - Enable mbed TLS CTR-DRBG algorithm. + + +// Enable mbed TLS CTR-DRBG standardized by NIST (NIST SP 800-90A Rev. 1). The nRF HW RNG is used as an entropy source for seeding. + +#ifndef NRF_CRYPTO_BACKEND_NRF_HW_RNG_MBEDTLS_CTR_DRBG_ENABLED +#define NRF_CRYPTO_BACKEND_NRF_HW_RNG_MBEDTLS_CTR_DRBG_ENABLED 1 +#endif + +// + +// NRF_CRYPTO_BACKEND_NRF_SW_ENABLED - Enable the legacy nRFx sw for crypto. + +// The nRF SW cryptography backend (only used in bootloader context). +//========================================================== +#ifndef NRF_CRYPTO_BACKEND_NRF_SW_ENABLED +#define NRF_CRYPTO_BACKEND_NRF_SW_ENABLED 0 +#endif +// NRF_CRYPTO_BACKEND_NRF_SW_HASH_SHA256_ENABLED - nRF SW hash backend support for SHA-256 + + +// The nRF SW backend provide access to nRF SDK legacy hash implementation of SHA-256. + +#ifndef NRF_CRYPTO_BACKEND_NRF_SW_HASH_SHA256_ENABLED +#define NRF_CRYPTO_BACKEND_NRF_SW_HASH_SHA256_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_NRF_SW_HASH_LITTLE_ENDIAN_DIGEST_ENABLED - nRF SW hash outputs digests in little endian + + +// Makes the nRF SH hash functions output digests in little endian format. Only for use in nRF SDK DFU! + +#ifndef NRF_CRYPTO_BACKEND_NRF_SW_HASH_LITTLE_ENDIAN_DIGEST_ENABLED +#define NRF_CRYPTO_BACKEND_NRF_SW_HASH_LITTLE_ENDIAN_DIGEST_ENABLED 1 +#endif + +// + +// NRF_CRYPTO_BACKEND_OBERON_ENABLED - Enable the Oberon backend + +// The Oberon backend +//========================================================== +#ifndef NRF_CRYPTO_BACKEND_OBERON_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_ENABLED 0 +#endif +// NRF_CRYPTO_BACKEND_OBERON_CHACHA_POLY_ENABLED - Enable the CHACHA-POLY mode using Oberon. + + +#ifndef NRF_CRYPTO_BACKEND_OBERON_CHACHA_POLY_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_CHACHA_POLY_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_OBERON_ECC_SECP256R1_ENABLED - Enable secp256r1 curve + + +// Enable this setting if you need secp256r1 curve support using Oberon library + +#ifndef NRF_CRYPTO_BACKEND_OBERON_ECC_SECP256R1_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_ECC_SECP256R1_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_OBERON_ECC_CURVE25519_ENABLED - Enable Curve25519 ECDH + + +// Enable this setting if you need Curve25519 ECDH support using Oberon library + +#ifndef NRF_CRYPTO_BACKEND_OBERON_ECC_CURVE25519_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_ECC_CURVE25519_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_OBERON_ECC_ED25519_ENABLED - Enable Ed25519 signature scheme + + +// Enable this setting if you need Ed25519 support using Oberon library + +#ifndef NRF_CRYPTO_BACKEND_OBERON_ECC_ED25519_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_ECC_ED25519_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_OBERON_HASH_SHA256_ENABLED - Oberon SHA-256 hash functionality + + +// Oberon backend implementation for SHA-256. + +#ifndef NRF_CRYPTO_BACKEND_OBERON_HASH_SHA256_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_HASH_SHA256_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_OBERON_HASH_SHA512_ENABLED - Oberon SHA-512 hash functionality + + +// Oberon backend implementation for SHA-512. + +#ifndef NRF_CRYPTO_BACKEND_OBERON_HASH_SHA512_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_HASH_SHA512_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA256_ENABLED - Oberon HMAC using SHA-256 + + +// Oberon backend implementation for HMAC using SHA-256. + +#ifndef NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA256_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA256_ENABLED 1 +#endif + +// NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA512_ENABLED - Oberon HMAC using SHA-512 + + +// Oberon backend implementation for HMAC using SHA-512. + +#ifndef NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA512_ENABLED +#define NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA512_ENABLED 1 +#endif + +// + +// + +// +//========================================================== + +// nRF_DFU + +//========================================================== +// ble_dfu - Device Firmware Update + +//========================================================== +// BLE_DFU_ENABLED - Enable DFU Service. + + +#ifndef BLE_DFU_ENABLED +#define BLE_DFU_ENABLED 0 +#endif + +// NRF_DFU_BLE_BUTTONLESS_SUPPORTS_BONDS - Buttonless DFU supports bonds. + + +#ifndef NRF_DFU_BLE_BUTTONLESS_SUPPORTS_BONDS +#define NRF_DFU_BLE_BUTTONLESS_SUPPORTS_BONDS 0 +#endif + +// +//========================================================== + +// +//========================================================== + +// nRF_Drivers + +//========================================================== +// CLOCK_ENABLED - nrf_drv_clock - CLOCK peripheral driver - legacy layer +//========================================================== +#ifndef CLOCK_ENABLED +#define CLOCK_ENABLED 0 +#endif +// CLOCK_CONFIG_LF_SRC - LF Clock Source + +// <0=> RC +// <1=> XTAL +// <2=> Synth + +#ifndef CLOCK_CONFIG_LF_SRC +#define CLOCK_CONFIG_LF_SRC 1 +#endif + +// CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef CLOCK_CONFIG_IRQ_PRIORITY +#define CLOCK_CONFIG_IRQ_PRIORITY 7 +#endif + +// + +// COMP_ENABLED - nrf_drv_comp - COMP peripheral driver - legacy layer +//========================================================== +#ifndef COMP_ENABLED +#define COMP_ENABLED 0 +#endif +// COMP_CONFIG_REF - Reference voltage + +// <0=> Internal 1.2V +// <1=> Internal 1.8V +// <2=> Internal 2.4V +// <4=> VDD +// <7=> ARef + +#ifndef COMP_CONFIG_REF +#define COMP_CONFIG_REF 1 +#endif + +// COMP_CONFIG_MAIN_MODE - Main mode + +// <0=> Single ended +// <1=> Differential + +#ifndef COMP_CONFIG_MAIN_MODE +#define COMP_CONFIG_MAIN_MODE 0 +#endif + +// COMP_CONFIG_SPEED_MODE - Speed mode + +// <0=> Low power +// <1=> Normal +// <2=> High speed + +#ifndef COMP_CONFIG_SPEED_MODE +#define COMP_CONFIG_SPEED_MODE 2 +#endif + +// COMP_CONFIG_HYST - Hystheresis + +// <0=> No +// <1=> 50mV + +#ifndef COMP_CONFIG_HYST +#define COMP_CONFIG_HYST 0 +#endif + +// COMP_CONFIG_ISOURCE - Current Source + +// <0=> Off +// <1=> 2.5 uA +// <2=> 5 uA +// <3=> 10 uA + +#ifndef COMP_CONFIG_ISOURCE +#define COMP_CONFIG_ISOURCE 0 +#endif + +// COMP_CONFIG_INPUT - Analog input + +// <0=> 0 +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef COMP_CONFIG_INPUT +#define COMP_CONFIG_INPUT 0 +#endif + +// COMP_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef COMP_CONFIG_IRQ_PRIORITY +#define COMP_CONFIG_IRQ_PRIORITY 7 +#endif + +// + +// EGU_ENABLED - nrf_drv_swi - SWI(EGU) peripheral driver - legacy layer + + +#ifndef EGU_ENABLED +#define EGU_ENABLED 0 +#endif + +// GPIOTE_ENABLED - nrf_drv_gpiote - GPIOTE peripheral driver - legacy layer +//========================================================== +#ifndef GPIOTE_ENABLED +#define GPIOTE_ENABLED 1 +#endif +// GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins +#ifndef GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS +#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1 +#endif + +// GPIOTE_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef GPIOTE_CONFIG_IRQ_PRIORITY +#define GPIOTE_CONFIG_IRQ_PRIORITY 7 +#endif + +// + +// I2S_ENABLED - nrf_drv_i2s - I2S peripheral driver - legacy layer +//========================================================== +#ifndef I2S_ENABLED +#define I2S_ENABLED 0 +#endif +// I2S_CONFIG_SCK_PIN - SCK pin <0-31> + + +#ifndef I2S_CONFIG_SCK_PIN +#define I2S_CONFIG_SCK_PIN 31 +#endif + +// I2S_CONFIG_LRCK_PIN - LRCK pin <1-31> + + +#ifndef I2S_CONFIG_LRCK_PIN +#define I2S_CONFIG_LRCK_PIN 30 +#endif + +// I2S_CONFIG_MCK_PIN - MCK pin +#ifndef I2S_CONFIG_MCK_PIN +#define I2S_CONFIG_MCK_PIN 255 +#endif + +// I2S_CONFIG_SDOUT_PIN - SDOUT pin <0-31> + + +#ifndef I2S_CONFIG_SDOUT_PIN +#define I2S_CONFIG_SDOUT_PIN 29 +#endif + +// I2S_CONFIG_SDIN_PIN - SDIN pin <0-31> + + +#ifndef I2S_CONFIG_SDIN_PIN +#define I2S_CONFIG_SDIN_PIN 28 +#endif + +// I2S_CONFIG_MASTER - Mode + +// <0=> Master +// <1=> Slave + +#ifndef I2S_CONFIG_MASTER +#define I2S_CONFIG_MASTER 0 +#endif + +// I2S_CONFIG_FORMAT - Format + +// <0=> I2S +// <1=> Aligned + +#ifndef I2S_CONFIG_FORMAT +#define I2S_CONFIG_FORMAT 0 +#endif +// I2S_CONFIG_ALIGN - Alignment + +// <0=> Left +// <1=> Right -#ifndef BSP_BTN_BLE_ENABLED -#define BSP_BTN_BLE_ENABLED 0 +#ifndef I2S_CONFIG_ALIGN +#define I2S_CONFIG_ALIGN 0 #endif -// -//========================================================== - -// nRF_ANT +// I2S_CONFIG_SWIDTH - Sample width (bits) + +// <0=> 8 +// <1=> 16 +// <2=> 24 -//========================================================== -// ANTFS_ENABLED - ant_fs - ANT File Share module. -//========================================================== -#ifndef ANTFS_ENABLED -#define ANTFS_ENABLED 0 -#endif -// ANTFS_CONFIG_NETWORK_NUMBER - ANT-FS network number. -#ifndef ANTFS_CONFIG_NETWORK_NUMBER -#define ANTFS_CONFIG_NETWORK_NUMBER 0 +#ifndef I2S_CONFIG_SWIDTH +#define I2S_CONFIG_SWIDTH 1 #endif -// ANTFS_CONFIG_CHANNEL_NUMBER - ANT-FS channel number. -#ifndef ANTFS_CONFIG_CHANNEL_NUMBER -#define ANTFS_CONFIG_CHANNEL_NUMBER 0 -#endif +// I2S_CONFIG_CHANNELS - Channels + +// <0=> Stereo +// <1=> Left +// <2=> Right -// ANTFS_CONFIG_PAIRING_TIMEOUT - Pairing timeout - how long the UI will wait for a response to a pairing request before switching to the link layer, in seconds. -#ifndef ANTFS_CONFIG_PAIRING_TIMEOUT -#define ANTFS_CONFIG_PAIRING_TIMEOUT 120 +#ifndef I2S_CONFIG_CHANNELS +#define I2S_CONFIG_CHANNELS 1 #endif -// ANTFS_CONFIG_LINK_COMMAND_TIMEOUT - Command timeout - how long the client will wait without receiving any commands before switching to the link layer, in seconds. -#ifndef ANTFS_CONFIG_LINK_COMMAND_TIMEOUT -#define ANTFS_CONFIG_LINK_COMMAND_TIMEOUT 10 -#endif +// I2S_CONFIG_MCK_SETUP - MCK behavior + +// <0=> Disabled +// <2147483648=> 32MHz/2 +// <1342177280=> 32MHz/3 +// <1073741824=> 32MHz/4 +// <805306368=> 32MHz/5 +// <671088640=> 32MHz/6 +// <536870912=> 32MHz/8 +// <402653184=> 32MHz/10 +// <369098752=> 32MHz/11 +// <285212672=> 32MHz/15 +// <268435456=> 32MHz/16 +// <201326592=> 32MHz/21 +// <184549376=> 32MHz/23 +// <142606336=> 32MHz/30 +// <138412032=> 32MHz/31 +// <134217728=> 32MHz/32 +// <100663296=> 32MHz/42 +// <68157440=> 32MHz/63 +// <34340864=> 32MHz/125 -// ANTFS_CONFIG_TRANS_TYPE - ANT-FS Transmission Type. -#ifndef ANTFS_CONFIG_TRANS_TYPE -#define ANTFS_CONFIG_TRANS_TYPE 10 +#ifndef I2S_CONFIG_MCK_SETUP +#define I2S_CONFIG_MCK_SETUP 536870912 #endif -// ANTFS_CONFIG_DEVICE_TYPE - ANT device type for channel configuration. -#ifndef ANTFS_CONFIG_DEVICE_TYPE -#define ANTFS_CONFIG_DEVICE_TYPE 1 +// I2S_CONFIG_RATIO - MCK/LRCK ratio + +// <0=> 32x +// <1=> 48x +// <2=> 64x +// <3=> 96x +// <4=> 128x +// <5=> 192x +// <6=> 256x +// <7=> 384x +// <8=> 512x + +#ifndef I2S_CONFIG_RATIO +#define I2S_CONFIG_RATIO 2000 #endif -// ANTFS_CONFIG_BEACON_STATUS_PERIOD - ANT-FS Beacon Message Period. +// I2S_CONFIG_IRQ_PRIORITY - Interrupt priority + -// <0=> 0.5 Hz -// <1=> 1 Hz -// <2=> 2 Hz -// <3=> 4 Hz -// <4=> 8 Hz +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -#ifndef ANTFS_CONFIG_BEACON_STATUS_PERIOD -#define ANTFS_CONFIG_BEACON_STATUS_PERIOD 3 +#ifndef I2S_CONFIG_IRQ_PRIORITY +#define I2S_CONFIG_IRQ_PRIORITY 7 #endif -// ANTFS_CONFIG_TRANSMIT_POWER - ANT Transmit Power. - -// <0=> Lowest ANT Tx power level setting. (-20dBm) -// <1=> ANT Tx power > Lvl 0. (-12dBm) -// <2=> ANT Tx power > Lvl 1. (-4dBm) -// <3=> ANT Tx power > Lvl 2. Default tx power level. (0dBm) -// <4=> ANT Tx power > Lvl 3. (+4dBm) -// <128=> Custom tx power selection - -#ifndef ANTFS_CONFIG_TRANSMIT_POWER -#define ANTFS_CONFIG_TRANSMIT_POWER 3 +// I2S_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef I2S_CONFIG_LOG_ENABLED +#define I2S_CONFIG_LOG_ENABLED 0 #endif +// I2S_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -// ANTFS_CONFIG_CUSTOM_TRANSMIT_POWER - ANT Custom Transmit Power. -#ifndef ANTFS_CONFIG_CUSTOM_TRANSMIT_POWER -#define ANTFS_CONFIG_CUSTOM_TRANSMIT_POWER 0 +#ifndef I2S_CONFIG_LOG_LEVEL +#define I2S_CONFIG_LOG_LEVEL 3 #endif -// ANTFS_CONFIG_AUTH_TYPE_PAIRING_ENABLED - Use pairing and key exchange authentication. +// I2S_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef I2S_CONFIG_INFO_COLOR +#define I2S_CONFIG_INFO_COLOR 0 +#endif +// I2S_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef ANTFS_CONFIG_AUTH_TYPE_PAIRING_ENABLED -#define ANTFS_CONFIG_AUTH_TYPE_PAIRING_ENABLED 0 +#ifndef I2S_CONFIG_DEBUG_COLOR +#define I2S_CONFIG_DEBUG_COLOR 0 #endif -// ANTFS_CONFIG_AUTH_TYPE_PASSKEY_ENABLED - Use passkey authentication. +// +// -#ifndef ANTFS_CONFIG_AUTH_TYPE_PASSKEY_ENABLED -#define ANTFS_CONFIG_AUTH_TYPE_PASSKEY_ENABLED 0 +// LPCOMP_ENABLED - nrf_drv_lpcomp - LPCOMP peripheral driver - legacy layer +//========================================================== +#ifndef LPCOMP_ENABLED +#define LPCOMP_ENABLED 0 #endif +// LPCOMP_CONFIG_REFERENCE - Reference voltage + +// <0=> Supply 1/8 +// <1=> Supply 2/8 +// <2=> Supply 3/8 +// <3=> Supply 4/8 +// <4=> Supply 5/8 +// <5=> Supply 6/8 +// <6=> Supply 7/8 +// <8=> Supply 1/16 (nRF52) +// <9=> Supply 3/16 (nRF52) +// <10=> Supply 5/16 (nRF52) +// <11=> Supply 7/16 (nRF52) +// <12=> Supply 9/16 (nRF52) +// <13=> Supply 11/16 (nRF52) +// <14=> Supply 13/16 (nRF52) +// <15=> Supply 15/16 (nRF52) +// <7=> External Ref 0 +// <65543=> External Ref 1 -// ANTFS_CONFIG_AUTH_TYPE_PASSTHROUGH_ENABLED - Allow host to bypass authentication. +#ifndef LPCOMP_CONFIG_REFERENCE +#define LPCOMP_CONFIG_REFERENCE 3 +#endif +// LPCOMP_CONFIG_DETECTION - Detection + +// <0=> Crossing +// <1=> Up +// <2=> Down -#ifndef ANTFS_CONFIG_AUTH_TYPE_PASSTHROUGH_ENABLED -#define ANTFS_CONFIG_AUTH_TYPE_PASSTHROUGH_ENABLED 0 +#ifndef LPCOMP_CONFIG_DETECTION +#define LPCOMP_CONFIG_DETECTION 2 #endif -// ANTFS_CONFIG_UPLOAD_ENABLED - Support upload operation. +// LPCOMP_CONFIG_INPUT - Analog input + +// <0=> 0 +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef LPCOMP_CONFIG_INPUT +#define LPCOMP_CONFIG_INPUT 0 +#endif +// LPCOMP_CONFIG_HYST - Hysteresis + -#ifndef ANTFS_CONFIG_UPLOAD_ENABLED -#define ANTFS_CONFIG_UPLOAD_ENABLED 0 +#ifndef LPCOMP_CONFIG_HYST +#define LPCOMP_CONFIG_HYST 0 #endif -// ANTFS_CONFIG_DEBUG_LED_ENABLED - Enables LED debug in the module. +// LPCOMP_CONFIG_IRQ_PRIORITY - Interrupt priority + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -#ifndef ANTFS_CONFIG_DEBUG_LED_ENABLED -#define ANTFS_CONFIG_DEBUG_LED_ENABLED 0 +#ifndef LPCOMP_CONFIG_IRQ_PRIORITY +#define LPCOMP_CONFIG_IRQ_PRIORITY 7 #endif // -// ANT_BPWR_ENABLED - ant_bpwr - Bicycle Power Profile -//========================================================== -#ifndef ANT_BPWR_ENABLED -#define ANT_BPWR_ENABLED 0 -#endif -// ANT_BPWR_LOG_ENABLED - Enables general logging in the module. +// NRFX_CLOCK_ENABLED - nrfx_clock - CLOCK peripheral driver //========================================================== -#ifndef ANT_BPWR_LOG_ENABLED -#define ANT_BPWR_LOG_ENABLED 0 +#ifndef NRFX_CLOCK_ENABLED +#define NRFX_CLOCK_ENABLED 0 #endif -// ANT_BPWR_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_CLOCK_CONFIG_LF_SRC - LF Clock Source + +// <0=> RC +// <1=> XTAL +// <2=> Synth -#ifndef ANT_BPWR_LOG_LEVEL -#define ANT_BPWR_LOG_LEVEL 3 +#ifndef NRFX_CLOCK_CONFIG_LF_SRC +#define NRFX_CLOCK_CONFIG_LF_SRC 1 #endif -// ANT_BPWR_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +// NRFX_CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -#ifndef ANT_BPWR_INFO_COLOR -#define ANT_BPWR_INFO_COLOR 0 +#ifndef NRFX_CLOCK_CONFIG_IRQ_PRIORITY +#define NRFX_CLOCK_CONFIG_IRQ_PRIORITY 7 #endif -// - -// ANT_BPWR_COMMON_LOG_ENABLED - Enables logging of BPWR tracing common data. +// NRFX_CLOCK_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== -#ifndef ANT_BPWR_COMMON_LOG_ENABLED -#define ANT_BPWR_COMMON_LOG_ENABLED 0 +#ifndef NRFX_CLOCK_CONFIG_LOG_ENABLED +#define NRFX_CLOCK_CONFIG_LOG_ENABLED 0 #endif -// ANT_BPWR_COMMON_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_CLOCK_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -#ifndef ANT_BPWR_COMMON_LOG_LEVEL -#define ANT_BPWR_COMMON_LOG_LEVEL 3 +#ifndef NRFX_CLOCK_CONFIG_LOG_LEVEL +#define NRFX_CLOCK_CONFIG_LOG_LEVEL 3 #endif -// ANT_BPWR_COMMON_INFO_COLOR - ANSI escape code prefix. +// NRFX_CLOCK_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef NRFX_CLOCK_CONFIG_INFO_COLOR +#define NRFX_CLOCK_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_CLOCK_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef ANT_BPWR_COMMON_INFO_COLOR -#define ANT_BPWR_COMMON_INFO_COLOR 0 +#ifndef NRFX_CLOCK_CONFIG_DEBUG_COLOR +#define NRFX_CLOCK_CONFIG_DEBUG_COLOR 0 #endif // -// ANT_BPWR_PAGE_TORQUE_LOG_ENABLED - Enables logging of BPWR torque page in the module. +// + +// NRFX_COMP_ENABLED - nrfx_comp - COMP peripheral driver //========================================================== -#ifndef ANT_BPWR_PAGE_TORQUE_LOG_ENABLED -#define ANT_BPWR_PAGE_TORQUE_LOG_ENABLED 0 +#ifndef NRFX_COMP_ENABLED +#define NRFX_COMP_ENABLED 0 #endif -// ANT_BPWR_PAGE_TORQUE_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_COMP_CONFIG_REF - Reference voltage + +// <0=> Internal 1.2V +// <1=> Internal 1.8V +// <2=> Internal 2.4V +// <4=> VDD +// <7=> ARef -#ifndef ANT_BPWR_PAGE_TORQUE_LOG_LEVEL -#define ANT_BPWR_PAGE_TORQUE_LOG_LEVEL 3 +#ifndef NRFX_COMP_CONFIG_REF +#define NRFX_COMP_CONFIG_REF 1 #endif -// ANT_BPWR_PAGE_TORQUE_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +// NRFX_COMP_CONFIG_MAIN_MODE - Main mode + +// <0=> Single ended +// <1=> Differential -#ifndef ANT_BPWR_PAGE_TORQUE_INFO_COLOR -#define ANT_BPWR_PAGE_TORQUE_INFO_COLOR 0 +#ifndef NRFX_COMP_CONFIG_MAIN_MODE +#define NRFX_COMP_CONFIG_MAIN_MODE 0 #endif -// +// NRFX_COMP_CONFIG_SPEED_MODE - Speed mode + +// <0=> Low power +// <1=> Normal +// <2=> High speed -// ANT_BPWR_PAGE_1_LOG_ENABLED - Enables logging of BPWR page 1 in the module. -//========================================================== -#ifndef ANT_BPWR_PAGE_1_LOG_ENABLED -#define ANT_BPWR_PAGE_1_LOG_ENABLED 0 +#ifndef NRFX_COMP_CONFIG_SPEED_MODE +#define NRFX_COMP_CONFIG_SPEED_MODE 2 #endif -// ANT_BPWR_PAGE_1_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_COMP_CONFIG_HYST - Hystheresis + +// <0=> No +// <1=> 50mV -#ifndef ANT_BPWR_PAGE_1_LOG_LEVEL -#define ANT_BPWR_PAGE_1_LOG_LEVEL 3 +#ifndef NRFX_COMP_CONFIG_HYST +#define NRFX_COMP_CONFIG_HYST 0 #endif -// ANT_BPWR_PAGE_1_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +// NRFX_COMP_CONFIG_ISOURCE - Current Source + +// <0=> Off +// <1=> 2.5 uA +// <2=> 5 uA +// <3=> 10 uA -#ifndef ANT_BPWR_PAGE_1_INFO_COLOR -#define ANT_BPWR_PAGE_1_INFO_COLOR 0 +#ifndef NRFX_COMP_CONFIG_ISOURCE +#define NRFX_COMP_CONFIG_ISOURCE 0 #endif -// +// NRFX_COMP_CONFIG_INPUT - Analog input + +// <0=> 0 +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -// ANT_BPWR_PAGE_16_LOG_ENABLED - Enables logging of BPWR page 16 in the module. -//========================================================== -#ifndef ANT_BPWR_PAGE_16_LOG_ENABLED -#define ANT_BPWR_PAGE_16_LOG_ENABLED 0 +#ifndef NRFX_COMP_CONFIG_INPUT +#define NRFX_COMP_CONFIG_INPUT 0 #endif -// ANT_BPWR_PAGE_16_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_COMP_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -#ifndef ANT_BPWR_PAGE_16_LOG_LEVEL -#define ANT_BPWR_PAGE_16_LOG_LEVEL 3 +#ifndef NRFX_COMP_CONFIG_IRQ_PRIORITY +#define NRFX_COMP_CONFIG_IRQ_PRIORITY 7 #endif -// ANT_BPWR_PAGE_16_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +// NRFX_COMP_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_COMP_CONFIG_LOG_ENABLED +#define NRFX_COMP_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_COMP_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -#ifndef ANT_BPWR_PAGE_16_INFO_COLOR -#define ANT_BPWR_PAGE_16_INFO_COLOR 0 +#ifndef NRFX_COMP_CONFIG_LOG_LEVEL +#define NRFX_COMP_CONFIG_LOG_LEVEL 3 #endif -// +// NRFX_COMP_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// ANT_BPWR_PAGE_17_LOG_ENABLED - Enables logging of BPWR page 17 in the module. -//========================================================== -#ifndef ANT_BPWR_PAGE_17_LOG_ENABLED -#define ANT_BPWR_PAGE_17_LOG_ENABLED 0 +#ifndef NRFX_COMP_CONFIG_INFO_COLOR +#define NRFX_COMP_CONFIG_INFO_COLOR 0 #endif -// ANT_BPWR_PAGE_17_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_COMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef ANT_BPWR_PAGE_17_LOG_LEVEL -#define ANT_BPWR_PAGE_17_LOG_LEVEL 3 +#ifndef NRFX_COMP_CONFIG_DEBUG_COLOR +#define NRFX_COMP_CONFIG_DEBUG_COLOR 0 #endif -// ANT_BPWR_PAGE_17_INFO_COLOR - ANSI escape code prefix. +// -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +// -#ifndef ANT_BPWR_PAGE_17_INFO_COLOR -#define ANT_BPWR_PAGE_17_INFO_COLOR 0 +// NRFX_GPIOTE_ENABLED - nrfx_gpiote - GPIOTE peripheral driver +//========================================================== +#ifndef NRFX_GPIOTE_ENABLED +#define NRFX_GPIOTE_ENABLED 0 +#endif +// NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins +#ifndef NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS +#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1 #endif -// +// NRFX_GPIOTE_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -// ANT_BPWR_PAGE_18_LOG_ENABLED - Enables logging of BPWR page 18 in the module. -//========================================================== -#ifndef ANT_BPWR_PAGE_18_LOG_ENABLED -#define ANT_BPWR_PAGE_18_LOG_ENABLED 0 +#ifndef NRFX_GPIOTE_CONFIG_IRQ_PRIORITY +#define NRFX_GPIOTE_CONFIG_IRQ_PRIORITY 7 #endif -// ANT_BPWR_PAGE_18_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_GPIOTE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED +#define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_GPIOTE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -#ifndef ANT_BPWR_PAGE_18_LOG_LEVEL -#define ANT_BPWR_PAGE_18_LOG_LEVEL 3 +#ifndef NRFX_GPIOTE_CONFIG_LOG_LEVEL +#define NRFX_GPIOTE_CONFIG_LOG_LEVEL 3 #endif -// ANT_BPWR_PAGE_18_INFO_COLOR - ANSI escape code prefix. +// NRFX_GPIOTE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef NRFX_GPIOTE_CONFIG_INFO_COLOR +#define NRFX_GPIOTE_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_GPIOTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef ANT_BPWR_PAGE_18_INFO_COLOR -#define ANT_BPWR_PAGE_18_INFO_COLOR 0 +#ifndef NRFX_GPIOTE_CONFIG_DEBUG_COLOR +#define NRFX_GPIOTE_CONFIG_DEBUG_COLOR 0 #endif // // -// ANT_BSC_ENABLED - ant_bsc - Bicycle Speed and Cadence Profile -//========================================================== -#ifndef ANT_BSC_ENABLED -#define ANT_BSC_ENABLED 0 -#endif -// ANT_BSC_LOG_ENABLED - Enables general logging in the module. +// NRFX_I2S_ENABLED - nrfx_i2s - I2S peripheral driver //========================================================== -#ifndef ANT_BSC_LOG_ENABLED -#define ANT_BSC_LOG_ENABLED 0 +#ifndef NRFX_I2S_ENABLED +#define NRFX_I2S_ENABLED 0 #endif -// ANT_BSC_LOG_LEVEL - Default Severity level +// NRFX_I2S_CONFIG_SCK_PIN - SCK pin <0-31> -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug -#ifndef ANT_BSC_LOG_LEVEL -#define ANT_BSC_LOG_LEVEL 3 +#ifndef NRFX_I2S_CONFIG_SCK_PIN +#define NRFX_I2S_CONFIG_SCK_PIN 31 #endif -// ANT_BSC_INFO_COLOR - ANSI escape code prefix. +// NRFX_I2S_CONFIG_LRCK_PIN - LRCK pin <1-31> -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White -#ifndef ANT_BSC_INFO_COLOR -#define ANT_BSC_INFO_COLOR 0 +#ifndef NRFX_I2S_CONFIG_LRCK_PIN +#define NRFX_I2S_CONFIG_LRCK_PIN 30 #endif -// - -// ANT_BSC_COMBINED_PAGE_0_LOG_ENABLED - Enables logging of BSC Combined page 0 in the module. -//========================================================== -#ifndef ANT_BSC_COMBINED_PAGE_0_LOG_ENABLED -#define ANT_BSC_COMBINED_PAGE_0_LOG_ENABLED 0 +// NRFX_I2S_CONFIG_MCK_PIN - MCK pin +#ifndef NRFX_I2S_CONFIG_MCK_PIN +#define NRFX_I2S_CONFIG_MCK_PIN 255 #endif -// ANT_BSC_COMBINED_PAGE_0_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_I2S_CONFIG_SDOUT_PIN - SDOUT pin <0-31> -#ifndef ANT_BSC_COMBINED_PAGE_0_LOG_LEVEL -#define ANT_BSC_COMBINED_PAGE_0_LOG_LEVEL 3 + +#ifndef NRFX_I2S_CONFIG_SDOUT_PIN +#define NRFX_I2S_CONFIG_SDOUT_PIN 29 #endif -// ANT_BSC_COMBINED_PAGE_0_INFO_COLOR - ANSI escape code prefix. +// NRFX_I2S_CONFIG_SDIN_PIN - SDIN pin <0-31> -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White -#ifndef ANT_BSC_COMBINED_PAGE_0_INFO_COLOR -#define ANT_BSC_COMBINED_PAGE_0_INFO_COLOR 0 +#ifndef NRFX_I2S_CONFIG_SDIN_PIN +#define NRFX_I2S_CONFIG_SDIN_PIN 28 #endif -// +// NRFX_I2S_CONFIG_MASTER - Mode + +// <0=> Master +// <1=> Slave -// ANT_BSC_PAGE_0_LOG_ENABLED - Enables logging of BSC page 0 in the module. -//========================================================== -#ifndef ANT_BSC_PAGE_0_LOG_ENABLED -#define ANT_BSC_PAGE_0_LOG_ENABLED 0 +#ifndef NRFX_I2S_CONFIG_MASTER +#define NRFX_I2S_CONFIG_MASTER 0 #endif -// ANT_BSC_PAGE_0_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_I2S_CONFIG_FORMAT - Format + +// <0=> I2S +// <1=> Aligned -#ifndef ANT_BSC_PAGE_0_LOG_LEVEL -#define ANT_BSC_PAGE_0_LOG_LEVEL 3 +#ifndef NRFX_I2S_CONFIG_FORMAT +#define NRFX_I2S_CONFIG_FORMAT 0 #endif -// ANT_BSC_PAGE_0_INFO_COLOR - ANSI escape code prefix. +// NRFX_I2S_CONFIG_ALIGN - Alignment + +// <0=> Left +// <1=> Right -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef NRFX_I2S_CONFIG_ALIGN +#define NRFX_I2S_CONFIG_ALIGN 0 +#endif + +// NRFX_I2S_CONFIG_SWIDTH - Sample width (bits) + +// <0=> 8 +// <1=> 16 +// <2=> 24 -#ifndef ANT_BSC_PAGE_0_INFO_COLOR -#define ANT_BSC_PAGE_0_INFO_COLOR 0 +#ifndef NRFX_I2S_CONFIG_SWIDTH +#define NRFX_I2S_CONFIG_SWIDTH 1 #endif -// +// NRFX_I2S_CONFIG_CHANNELS - Channels + +// <0=> Stereo +// <1=> Left +// <2=> Right -// ANT_BSC_PAGE_1_LOG_ENABLED - Enables logging of BSC page 1 in the module. -//========================================================== -#ifndef ANT_BSC_PAGE_1_LOG_ENABLED -#define ANT_BSC_PAGE_1_LOG_ENABLED 0 +#ifndef NRFX_I2S_CONFIG_CHANNELS +#define NRFX_I2S_CONFIG_CHANNELS 1 #endif -// ANT_BSC_PAGE_1_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_I2S_CONFIG_MCK_SETUP - MCK behavior + +// <0=> Disabled +// <2147483648=> 32MHz/2 +// <1342177280=> 32MHz/3 +// <1073741824=> 32MHz/4 +// <805306368=> 32MHz/5 +// <671088640=> 32MHz/6 +// <536870912=> 32MHz/8 +// <402653184=> 32MHz/10 +// <369098752=> 32MHz/11 +// <285212672=> 32MHz/15 +// <268435456=> 32MHz/16 +// <201326592=> 32MHz/21 +// <184549376=> 32MHz/23 +// <142606336=> 32MHz/30 +// <138412032=> 32MHz/31 +// <134217728=> 32MHz/32 +// <100663296=> 32MHz/42 +// <68157440=> 32MHz/63 +// <34340864=> 32MHz/125 -#ifndef ANT_BSC_PAGE_1_LOG_LEVEL -#define ANT_BSC_PAGE_1_LOG_LEVEL 3 +#ifndef NRFX_I2S_CONFIG_MCK_SETUP +#define NRFX_I2S_CONFIG_MCK_SETUP 536870912 #endif -// ANT_BSC_PAGE_1_INFO_COLOR - ANSI escape code prefix. +// NRFX_I2S_CONFIG_RATIO - MCK/LRCK ratio + +// <0=> 32x +// <1=> 48x +// <2=> 64x +// <3=> 96x +// <4=> 128x +// <5=> 192x +// <6=> 256x +// <7=> 384x +// <8=> 512x -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef NRFX_I2S_CONFIG_RATIO +#define NRFX_I2S_CONFIG_RATIO 2000 +#endif -#ifndef ANT_BSC_PAGE_1_INFO_COLOR -#define ANT_BSC_PAGE_1_INFO_COLOR 0 +// NRFX_I2S_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_I2S_CONFIG_IRQ_PRIORITY +#define NRFX_I2S_CONFIG_IRQ_PRIORITY 7 +#endif + +// NRFX_I2S_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_I2S_CONFIG_LOG_ENABLED +#define NRFX_I2S_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_I2S_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_I2S_CONFIG_LOG_LEVEL +#define NRFX_I2S_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_I2S_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_I2S_CONFIG_INFO_COLOR +#define NRFX_I2S_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_I2S_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_I2S_CONFIG_DEBUG_COLOR +#define NRFX_I2S_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_LPCOMP_ENABLED - nrfx_lpcomp - LPCOMP peripheral driver +//========================================================== +#ifndef NRFX_LPCOMP_ENABLED +#define NRFX_LPCOMP_ENABLED 0 +#endif +// NRFX_LPCOMP_CONFIG_REFERENCE - Reference voltage + +// <0=> Supply 1/8 +// <1=> Supply 2/8 +// <2=> Supply 3/8 +// <3=> Supply 4/8 +// <4=> Supply 5/8 +// <5=> Supply 6/8 +// <6=> Supply 7/8 +// <8=> Supply 1/16 (nRF52) +// <9=> Supply 3/16 (nRF52) +// <10=> Supply 5/16 (nRF52) +// <11=> Supply 7/16 (nRF52) +// <12=> Supply 9/16 (nRF52) +// <13=> Supply 11/16 (nRF52) +// <14=> Supply 13/16 (nRF52) +// <15=> Supply 15/16 (nRF52) +// <7=> External Ref 0 +// <65543=> External Ref 1 + +#ifndef NRFX_LPCOMP_CONFIG_REFERENCE +#define NRFX_LPCOMP_CONFIG_REFERENCE 3 #endif -// +// NRFX_LPCOMP_CONFIG_DETECTION - Detection + +// <0=> Crossing +// <1=> Up +// <2=> Down -// ANT_BSC_PAGE_2_LOG_ENABLED - Enables logging of BSC page 2 in the module. -//========================================================== -#ifndef ANT_BSC_PAGE_2_LOG_ENABLED -#define ANT_BSC_PAGE_2_LOG_ENABLED 0 +#ifndef NRFX_LPCOMP_CONFIG_DETECTION +#define NRFX_LPCOMP_CONFIG_DETECTION 2 #endif -// ANT_BSC_PAGE_2_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_LPCOMP_CONFIG_INPUT - Analog input + +// <0=> 0 +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -#ifndef ANT_BSC_PAGE_2_LOG_LEVEL -#define ANT_BSC_PAGE_2_LOG_LEVEL 3 +#ifndef NRFX_LPCOMP_CONFIG_INPUT +#define NRFX_LPCOMP_CONFIG_INPUT 0 #endif -// ANT_BSC_PAGE_2_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +// NRFX_LPCOMP_CONFIG_HYST - Hysteresis + -#ifndef ANT_BSC_PAGE_2_INFO_COLOR -#define ANT_BSC_PAGE_2_INFO_COLOR 0 +#ifndef NRFX_LPCOMP_CONFIG_HYST +#define NRFX_LPCOMP_CONFIG_HYST 0 #endif -// +// NRFX_LPCOMP_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -// ANT_BSC_PAGE_3_LOG_ENABLED - Enables logging of BSC page 3 in the module. -//========================================================== -#ifndef ANT_BSC_PAGE_3_LOG_ENABLED -#define ANT_BSC_PAGE_3_LOG_ENABLED 0 +#ifndef NRFX_LPCOMP_CONFIG_IRQ_PRIORITY +#define NRFX_LPCOMP_CONFIG_IRQ_PRIORITY 7 #endif -// ANT_BSC_PAGE_3_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_LPCOMP_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_LPCOMP_CONFIG_LOG_ENABLED +#define NRFX_LPCOMP_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_LPCOMP_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -#ifndef ANT_BSC_PAGE_3_LOG_LEVEL -#define ANT_BSC_PAGE_3_LOG_LEVEL 3 +#ifndef NRFX_LPCOMP_CONFIG_LOG_LEVEL +#define NRFX_LPCOMP_CONFIG_LOG_LEVEL 3 #endif -// ANT_BSC_PAGE_3_INFO_COLOR - ANSI escape code prefix. +// NRFX_LPCOMP_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef NRFX_LPCOMP_CONFIG_INFO_COLOR +#define NRFX_LPCOMP_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_LPCOMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef ANT_BSC_PAGE_3_INFO_COLOR -#define ANT_BSC_PAGE_3_INFO_COLOR 0 +#ifndef NRFX_LPCOMP_CONFIG_DEBUG_COLOR +#define NRFX_LPCOMP_CONFIG_DEBUG_COLOR 0 #endif // -// ANT_BSC_PAGE_4_LOG_ENABLED - Enables logging of BSC page 4 in the module. +// + +// NRFX_PDM_ENABLED - nrfx_pdm - PDM peripheral driver //========================================================== -#ifndef ANT_BSC_PAGE_4_LOG_ENABLED -#define ANT_BSC_PAGE_4_LOG_ENABLED 0 +#ifndef NRFX_PDM_ENABLED +#define NRFX_PDM_ENABLED 0 #endif -// ANT_BSC_PAGE_4_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_PDM_CONFIG_MODE - Mode + +// <0=> Stereo +// <1=> Mono -#ifndef ANT_BSC_PAGE_4_LOG_LEVEL -#define ANT_BSC_PAGE_4_LOG_LEVEL 3 +#ifndef NRFX_PDM_CONFIG_MODE +#define NRFX_PDM_CONFIG_MODE 1 #endif -// ANT_BSC_PAGE_4_INFO_COLOR - ANSI escape code prefix. +// NRFX_PDM_CONFIG_EDGE - Edge + +// <0=> Left falling +// <1=> Left rising -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef NRFX_PDM_CONFIG_EDGE +#define NRFX_PDM_CONFIG_EDGE 0 +#endif -#ifndef ANT_BSC_PAGE_4_INFO_COLOR -#define ANT_BSC_PAGE_4_INFO_COLOR 0 +// NRFX_PDM_CONFIG_CLOCK_FREQ - Clock frequency + +// <134217728=> 1000k +// <138412032=> 1032k (default) +// <142606336=> 1067k + +#ifndef NRFX_PDM_CONFIG_CLOCK_FREQ +#define NRFX_PDM_CONFIG_CLOCK_FREQ 138412032 #endif -// +// NRFX_PDM_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -// ANT_BSC_PAGE_5_LOG_ENABLED - Enables logging of BSC page 5 in the module. -//========================================================== -#ifndef ANT_BSC_PAGE_5_LOG_ENABLED -#define ANT_BSC_PAGE_5_LOG_ENABLED 0 +#ifndef NRFX_PDM_CONFIG_IRQ_PRIORITY +#define NRFX_PDM_CONFIG_IRQ_PRIORITY 7 #endif -// ANT_BSC_PAGE_5_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_PDM_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_PDM_CONFIG_LOG_ENABLED +#define NRFX_PDM_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_PDM_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -#ifndef ANT_BSC_PAGE_5_LOG_LEVEL -#define ANT_BSC_PAGE_5_LOG_LEVEL 3 +#ifndef NRFX_PDM_CONFIG_LOG_LEVEL +#define NRFX_PDM_CONFIG_LOG_LEVEL 3 #endif -// ANT_BSC_PAGE_5_INFO_COLOR - ANSI escape code prefix. +// NRFX_PDM_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef NRFX_PDM_CONFIG_INFO_COLOR +#define NRFX_PDM_CONFIG_INFO_COLOR 0 +#endif -#ifndef ANT_BSC_PAGE_5_INFO_COLOR -#define ANT_BSC_PAGE_5_INFO_COLOR 0 +// NRFX_PDM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_PDM_CONFIG_DEBUG_COLOR +#define NRFX_PDM_CONFIG_DEBUG_COLOR 0 #endif // // -// ANT_CHANNEL_CONFIG_ENABLED - ant_channel_config - ANT common channel configuration - - -#ifndef ANT_CHANNEL_CONFIG_ENABLED -#define ANT_CHANNEL_CONFIG_ENABLED 0 -#endif - -// ANT_COMMON_PAGE_70_ENABLED - ant_common_page_70 - ANT+ common page 70 +// NRFX_POWER_ENABLED - nrfx_power - POWER peripheral driver //========================================================== -#ifndef ANT_COMMON_PAGE_70_ENABLED -#define ANT_COMMON_PAGE_70_ENABLED 0 +#ifndef NRFX_POWER_ENABLED +#define NRFX_POWER_ENABLED 0 #endif -// ANT_COMMON_PAGE_70_LOG_ENABLED - Enables logging of common page 70 in the module. -//========================================================== -#ifndef ANT_COMMON_PAGE_70_LOG_ENABLED -#define ANT_COMMON_PAGE_70_LOG_ENABLED 0 +// NRFX_POWER_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_POWER_CONFIG_IRQ_PRIORITY +#define NRFX_POWER_CONFIG_IRQ_PRIORITY 7 #endif -// ANT_COMMON_PAGE_70_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_POWER_CONFIG_DEFAULT_DCDCEN - The default configuration of main DCDC regulator + + +// This settings means only that components for DCDC regulator are installed and it can be enabled. -#ifndef ANT_COMMON_PAGE_70_LOG_LEVEL -#define ANT_COMMON_PAGE_70_LOG_LEVEL 3 +#ifndef NRFX_POWER_CONFIG_DEFAULT_DCDCEN +#define NRFX_POWER_CONFIG_DEFAULT_DCDCEN 0 #endif -// ANT_COMMON_PAGE_70_INFO_COLOR - ANSI escape code prefix. +// NRFX_POWER_CONFIG_DEFAULT_DCDCENHV - The default configuration of High Voltage DCDC regulator + -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +// This settings means only that components for DCDC regulator are installed and it can be enabled. -#ifndef ANT_COMMON_PAGE_70_INFO_COLOR -#define ANT_COMMON_PAGE_70_INFO_COLOR 0 +#ifndef NRFX_POWER_CONFIG_DEFAULT_DCDCENHV +#define NRFX_POWER_CONFIG_DEFAULT_DCDCENHV 0 #endif // -// - -// ANT_COMMON_PAGE_80_ENABLED - ant_common_page_80 - ANT+ common page 80 +// NRFX_PPI_ENABLED - nrfx_ppi - PPI peripheral allocator //========================================================== -#ifndef ANT_COMMON_PAGE_80_ENABLED -#define ANT_COMMON_PAGE_80_ENABLED 0 +#ifndef NRFX_PPI_ENABLED +#define NRFX_PPI_ENABLED 0 #endif -// ANT_COMMON_PAGE_80_LOG_ENABLED - Enables logging of common page 80 in the module. +// NRFX_PPI_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== -#ifndef ANT_COMMON_PAGE_80_LOG_ENABLED -#define ANT_COMMON_PAGE_80_LOG_ENABLED 0 +#ifndef NRFX_PPI_CONFIG_LOG_ENABLED +#define NRFX_PPI_CONFIG_LOG_ENABLED 0 #endif -// ANT_COMMON_PAGE_80_LOG_LEVEL - Default Severity level +// NRFX_PPI_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef ANT_COMMON_PAGE_80_LOG_LEVEL -#define ANT_COMMON_PAGE_80_LOG_LEVEL 3 +#ifndef NRFX_PPI_CONFIG_LOG_LEVEL +#define NRFX_PPI_CONFIG_LOG_LEVEL 3 #endif -// ANT_COMMON_PAGE_80_INFO_COLOR - ANSI escape code prefix. +// NRFX_PPI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef NRFX_PPI_CONFIG_INFO_COLOR +#define NRFX_PPI_CONFIG_INFO_COLOR 0 +#endif -#ifndef ANT_COMMON_PAGE_80_INFO_COLOR -#define ANT_COMMON_PAGE_80_INFO_COLOR 0 +// NRFX_PPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_PPI_CONFIG_DEBUG_COLOR +#define NRFX_PPI_CONFIG_DEBUG_COLOR 0 #endif // // -// ANT_COMMON_PAGE_81_ENABLED - ant_common_page_81 - ANT+ common page 81 +// NRFX_PWM_ENABLED - nrfx_pwm - PWM peripheral driver //========================================================== -#ifndef ANT_COMMON_PAGE_81_ENABLED -#define ANT_COMMON_PAGE_81_ENABLED 0 +#ifndef NRFX_PWM_ENABLED +#define NRFX_PWM_ENABLED 0 #endif -// ANT_COMMON_PAGE_81_LOG_ENABLED - Enables logging of common page 81 in the module. -//========================================================== -#ifndef ANT_COMMON_PAGE_81_LOG_ENABLED -#define ANT_COMMON_PAGE_81_LOG_ENABLED 0 +// NRFX_PWM0_ENABLED - Enable PWM0 instance + + +#ifndef NRFX_PWM0_ENABLED +#define NRFX_PWM0_ENABLED 0 #endif -// ANT_COMMON_PAGE_81_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_PWM1_ENABLED - Enable PWM1 instance + -#ifndef ANT_COMMON_PAGE_81_LOG_LEVEL -#define ANT_COMMON_PAGE_81_LOG_LEVEL 3 +#ifndef NRFX_PWM1_ENABLED +#define NRFX_PWM1_ENABLED 0 #endif -// ANT_COMMON_PAGE_81_INFO_COLOR - ANSI escape code prefix. +// NRFX_PWM2_ENABLED - Enable PWM2 instance + -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef ANT_COMMON_PAGE_81_INFO_COLOR -#define ANT_COMMON_PAGE_81_INFO_COLOR 0 +#ifndef NRFX_PWM2_ENABLED +#define NRFX_PWM2_ENABLED 0 #endif -// +// NRFX_PWM3_ENABLED - Enable PWM3 instance + -// +#ifndef NRFX_PWM3_ENABLED +#define NRFX_PWM3_ENABLED 0 +#endif -// ANT_ENCRYPT_CONFIG_ENABLED - ant_encrypt_config - Cryptographic ANT stack configuration +// NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN - Out0 pin <0-31> -#ifndef ANT_ENCRYPT_CONFIG_ENABLED -#define ANT_ENCRYPT_CONFIG_ENABLED 0 +#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN +#define NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN 31 #endif -// ANT_HRM_ENABLED - ant_hrm - Heart Rate Monitor Profile -//========================================================== -#ifndef ANT_HRM_ENABLED -#define ANT_HRM_ENABLED 0 -#endif -// ANT_HRM_LOG_ENABLED - Enables general logging in the module. -//========================================================== -#ifndef ANT_HRM_LOG_ENABLED -#define ANT_HRM_LOG_ENABLED 0 +// NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN - Out1 pin <0-31> + + +#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN +#define NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN 31 #endif -// ANT_HRM_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN - Out2 pin <0-31> + -#ifndef ANT_HRM_LOG_LEVEL -#define ANT_HRM_LOG_LEVEL 3 +#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN +#define NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN 31 #endif -// ANT_HRM_INFO_COLOR - ANSI escape code prefix. +// NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN - Out3 pin <0-31> -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White -#ifndef ANT_HRM_INFO_COLOR -#define ANT_HRM_INFO_COLOR 0 +#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN +#define NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN 31 #endif -// +// NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK - Base clock + +// <0=> 16 MHz +// <1=> 8 MHz +// <2=> 4 MHz +// <3=> 2 MHz +// <4=> 1 MHz +// <5=> 500 kHz +// <6=> 250 kHz +// <7=> 125 kHz -// ANT_HRM_PAGE_0_LOG_ENABLED - Enables logging of HRM page 0 in the module. -//========================================================== -#ifndef ANT_HRM_PAGE_0_LOG_ENABLED -#define ANT_HRM_PAGE_0_LOG_ENABLED 0 +#ifndef NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK +#define NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK 4 #endif -// ANT_HRM_PAGE_0_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE - Count mode + +// <0=> Up +// <1=> Up and Down -#ifndef ANT_HRM_PAGE_0_LOG_LEVEL -#define ANT_HRM_PAGE_0_LOG_LEVEL 3 +#ifndef NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE +#define NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE 0 #endif -// ANT_HRM_PAGE_0_INFO_COLOR - ANSI escape code prefix. +// NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE - Top value +#ifndef NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE +#define NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE 1000 +#endif -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +// NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE - Load mode + +// <0=> Common +// <1=> Grouped +// <2=> Individual +// <3=> Waveform -#ifndef ANT_HRM_PAGE_0_INFO_COLOR -#define ANT_HRM_PAGE_0_INFO_COLOR 0 +#ifndef NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE +#define NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE 0 #endif -// +// NRFX_PWM_DEFAULT_CONFIG_STEP_MODE - Step mode + +// <0=> Auto +// <1=> Triggered -// ANT_HRM_PAGE_1_LOG_ENABLED - Enables logging of HRM page 1 in the module. -//========================================================== -#ifndef ANT_HRM_PAGE_1_LOG_ENABLED -#define ANT_HRM_PAGE_1_LOG_ENABLED 0 +#ifndef NRFX_PWM_DEFAULT_CONFIG_STEP_MODE +#define NRFX_PWM_DEFAULT_CONFIG_STEP_MODE 0 #endif -// ANT_HRM_PAGE_1_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -#ifndef ANT_HRM_PAGE_1_LOG_LEVEL -#define ANT_HRM_PAGE_1_LOG_LEVEL 3 +#ifndef NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif -// ANT_HRM_PAGE_1_INFO_COLOR - ANSI escape code prefix. +// NRFX_PWM_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_PWM_CONFIG_LOG_ENABLED +#define NRFX_PWM_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_PWM_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef NRFX_PWM_CONFIG_LOG_LEVEL +#define NRFX_PWM_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_PWM_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_PWM_CONFIG_INFO_COLOR +#define NRFX_PWM_CONFIG_INFO_COLOR 0 +#endif -#ifndef ANT_HRM_PAGE_1_INFO_COLOR -#define ANT_HRM_PAGE_1_INFO_COLOR 0 +// NRFX_PWM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_PWM_CONFIG_DEBUG_COLOR +#define NRFX_PWM_CONFIG_DEBUG_COLOR 0 #endif // -// ANT_HRM_PAGE_2_LOG_ENABLED - Enables logging of HRM page 2 in the module. +// + +// NRFX_QDEC_ENABLED - nrfx_qdec - QDEC peripheral driver //========================================================== -#ifndef ANT_HRM_PAGE_2_LOG_ENABLED -#define ANT_HRM_PAGE_2_LOG_ENABLED 0 +#ifndef NRFX_QDEC_ENABLED +#define NRFX_QDEC_ENABLED 0 #endif -// ANT_HRM_PAGE_2_LOG_LEVEL - Default Severity level +// NRFX_QDEC_CONFIG_REPORTPER - Report period + +// <0=> 10 Samples +// <1=> 40 Samples +// <2=> 80 Samples +// <3=> 120 Samples +// <4=> 160 Samples +// <5=> 200 Samples +// <6=> 240 Samples +// <7=> 280 Samples -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +#ifndef NRFX_QDEC_CONFIG_REPORTPER +#define NRFX_QDEC_CONFIG_REPORTPER 0 +#endif + +// NRFX_QDEC_CONFIG_SAMPLEPER - Sample period + +// <0=> 128 us +// <1=> 256 us +// <2=> 512 us +// <3=> 1024 us +// <4=> 2048 us +// <5=> 4096 us +// <6=> 8192 us +// <7=> 16384 us -#ifndef ANT_HRM_PAGE_2_LOG_LEVEL -#define ANT_HRM_PAGE_2_LOG_LEVEL 3 +#ifndef NRFX_QDEC_CONFIG_SAMPLEPER +#define NRFX_QDEC_CONFIG_SAMPLEPER 7 #endif -// ANT_HRM_PAGE_2_INFO_COLOR - ANSI escape code prefix. +// NRFX_QDEC_CONFIG_PIO_A - A pin <0-31> -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White -#ifndef ANT_HRM_PAGE_2_INFO_COLOR -#define ANT_HRM_PAGE_2_INFO_COLOR 0 +#ifndef NRFX_QDEC_CONFIG_PIO_A +#define NRFX_QDEC_CONFIG_PIO_A 31 #endif -// +// NRFX_QDEC_CONFIG_PIO_B - B pin <0-31> -// ANT_HRM_PAGE_3_LOG_ENABLED - Enables logging of HRM page 3 in the module. -//========================================================== -#ifndef ANT_HRM_PAGE_3_LOG_ENABLED -#define ANT_HRM_PAGE_3_LOG_ENABLED 0 + +#ifndef NRFX_QDEC_CONFIG_PIO_B +#define NRFX_QDEC_CONFIG_PIO_B 31 #endif -// ANT_HRM_PAGE_3_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_QDEC_CONFIG_PIO_LED - LED pin <0-31> + -#ifndef ANT_HRM_PAGE_3_LOG_LEVEL -#define ANT_HRM_PAGE_3_LOG_LEVEL 3 +#ifndef NRFX_QDEC_CONFIG_PIO_LED +#define NRFX_QDEC_CONFIG_PIO_LED 31 #endif -// ANT_HRM_PAGE_3_INFO_COLOR - ANSI escape code prefix. +// NRFX_QDEC_CONFIG_LEDPRE - LED pre +#ifndef NRFX_QDEC_CONFIG_LEDPRE +#define NRFX_QDEC_CONFIG_LEDPRE 511 +#endif -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +// NRFX_QDEC_CONFIG_LEDPOL - LED polarity + +// <0=> Active low +// <1=> Active high + +#ifndef NRFX_QDEC_CONFIG_LEDPOL +#define NRFX_QDEC_CONFIG_LEDPOL 1 +#endif -#ifndef ANT_HRM_PAGE_3_INFO_COLOR -#define ANT_HRM_PAGE_3_INFO_COLOR 0 +// NRFX_QDEC_CONFIG_DBFEN - Debouncing enable + + +#ifndef NRFX_QDEC_CONFIG_DBFEN +#define NRFX_QDEC_CONFIG_DBFEN 0 #endif -// +// NRFX_QDEC_CONFIG_SAMPLE_INTEN - Sample ready interrupt enable + -// ANT_HRM_PAGE_4_LOG_ENABLED - Enables logging of HRM page 4 in the module. -//========================================================== -#ifndef ANT_HRM_PAGE_4_LOG_ENABLED -#define ANT_HRM_PAGE_4_LOG_ENABLED 0 +#ifndef NRFX_QDEC_CONFIG_SAMPLE_INTEN +#define NRFX_QDEC_CONFIG_SAMPLE_INTEN 0 #endif -// ANT_HRM_PAGE_4_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_QDEC_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -#ifndef ANT_HRM_PAGE_4_LOG_LEVEL -#define ANT_HRM_PAGE_4_LOG_LEVEL 3 +#ifndef NRFX_QDEC_CONFIG_IRQ_PRIORITY +#define NRFX_QDEC_CONFIG_IRQ_PRIORITY 7 #endif -// ANT_HRM_PAGE_4_INFO_COLOR - ANSI escape code prefix. +// NRFX_QDEC_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_QDEC_CONFIG_LOG_ENABLED +#define NRFX_QDEC_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_QDEC_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef NRFX_QDEC_CONFIG_LOG_LEVEL +#define NRFX_QDEC_CONFIG_LOG_LEVEL 3 +#endif + +// NRFX_QDEC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_QDEC_CONFIG_INFO_COLOR +#define NRFX_QDEC_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_QDEC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef ANT_HRM_PAGE_4_INFO_COLOR -#define ANT_HRM_PAGE_4_INFO_COLOR 0 +#ifndef NRFX_QDEC_CONFIG_DEBUG_COLOR +#define NRFX_QDEC_CONFIG_DEBUG_COLOR 0 #endif // // -// ANT_KEY_MANAGER_ENABLED - ant_key_manager - Software Component +// NRFX_QSPI_ENABLED - nrfx_qspi - QSPI peripheral driver +//========================================================== +#ifndef NRFX_QSPI_ENABLED +#define NRFX_QSPI_ENABLED 0 +#endif +// NRFX_QSPI_CONFIG_SCK_DELAY - tSHSL, tWHSL and tSHWL in number of 16 MHz periods (62.5 ns). <0-255> -#ifndef ANT_KEY_MANAGER_ENABLED -#define ANT_KEY_MANAGER_ENABLED 0 +#ifndef NRFX_QSPI_CONFIG_SCK_DELAY +#define NRFX_QSPI_CONFIG_SCK_DELAY 1 #endif -// ANT_REQUEST_CONTROLLER_ENABLED - ant_request_controller - ANT+ request controller +// NRFX_QSPI_CONFIG_XIP_OFFSET - Address offset in the external memory for Execute in Place operation. +#ifndef NRFX_QSPI_CONFIG_XIP_OFFSET +#define NRFX_QSPI_CONFIG_XIP_OFFSET 0 +#endif +// NRFX_QSPI_CONFIG_READOC - Number of data lines and opcode used for reading. + +// <0=> FastRead +// <1=> Read2O +// <2=> Read2IO +// <3=> Read4O +// <4=> Read4IO -#ifndef ANT_REQUEST_CONTROLLER_ENABLED -#define ANT_REQUEST_CONTROLLER_ENABLED 0 +#ifndef NRFX_QSPI_CONFIG_READOC +#define NRFX_QSPI_CONFIG_READOC 0 #endif -// ANT_SDM_ENABLED - ant_sdm - Stride Based Speed and Distance Monitor Profile -//========================================================== -#ifndef ANT_SDM_ENABLED -#define ANT_SDM_ENABLED 0 -#endif -// ANT_SDM_LOG_ENABLED - Enables general logging in the module. -//========================================================== -#ifndef ANT_SDM_LOG_ENABLED -#define ANT_SDM_LOG_ENABLED 0 +// NRFX_QSPI_CONFIG_WRITEOC - Number of data lines and opcode used for writing. + +// <0=> PP +// <1=> PP2O +// <2=> PP4O +// <3=> PP4IO + +#ifndef NRFX_QSPI_CONFIG_WRITEOC +#define NRFX_QSPI_CONFIG_WRITEOC 0 #endif -// ANT_SDM_LOG_LEVEL - Default Severity level -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +// NRFX_QSPI_CONFIG_ADDRMODE - Addressing mode. + +// <0=> 24bit +// <1=> 32bit -#ifndef ANT_SDM_LOG_LEVEL -#define ANT_SDM_LOG_LEVEL 3 +#ifndef NRFX_QSPI_CONFIG_ADDRMODE +#define NRFX_QSPI_CONFIG_ADDRMODE 0 #endif -// ANT_SDM_INFO_COLOR - ANSI escape code prefix. +// NRFX_QSPI_CONFIG_MODE - SPI mode. + +// <0=> Mode 0 +// <1=> Mode 1 -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef NRFX_QSPI_CONFIG_MODE +#define NRFX_QSPI_CONFIG_MODE 0 +#endif -#ifndef ANT_SDM_INFO_COLOR -#define ANT_SDM_INFO_COLOR 0 +// NRFX_QSPI_CONFIG_FREQUENCY - Frequency divider. + +// <0=> 32MHz/1 +// <1=> 32MHz/2 +// <2=> 32MHz/3 +// <3=> 32MHz/4 +// <4=> 32MHz/5 +// <5=> 32MHz/6 +// <6=> 32MHz/7 +// <7=> 32MHz/8 +// <8=> 32MHz/9 +// <9=> 32MHz/10 +// <10=> 32MHz/11 +// <11=> 32MHz/12 +// <12=> 32MHz/13 +// <13=> 32MHz/14 +// <14=> 32MHz/15 +// <15=> 32MHz/16 + +#ifndef NRFX_QSPI_CONFIG_FREQUENCY +#define NRFX_QSPI_CONFIG_FREQUENCY 15 #endif -// +// NRFX_QSPI_PIN_SCK - SCK pin value. +#ifndef NRFX_QSPI_PIN_SCK +#define NRFX_QSPI_PIN_SCK NRF_QSPI_PIN_NOT_CONNECTED +#endif -// +// NRFX_QSPI_PIN_CSN - CSN pin value. +#ifndef NRFX_QSPI_PIN_CSN +#define NRFX_QSPI_PIN_CSN NRF_QSPI_PIN_NOT_CONNECTED +#endif -// ANT_SEARCH_CONFIG_ENABLED - ant_search_config - ANT common search configuration -//========================================================== -#ifndef ANT_SEARCH_CONFIG_ENABLED -#define ANT_SEARCH_CONFIG_ENABLED 0 +// NRFX_QSPI_PIN_IO0 - IO0 pin value. +#ifndef NRFX_QSPI_PIN_IO0 +#define NRFX_QSPI_PIN_IO0 NRF_QSPI_PIN_NOT_CONNECTED #endif -// ANT_DEFAULT_LOW_PRIORITY_TIMEOUT - Default low priority search time-out. <0-255> +// NRFX_QSPI_PIN_IO1 - IO1 pin value. +#ifndef NRFX_QSPI_PIN_IO1 +#define NRFX_QSPI_PIN_IO1 NRF_QSPI_PIN_NOT_CONNECTED +#endif -#ifndef ANT_DEFAULT_LOW_PRIORITY_TIMEOUT -#define ANT_DEFAULT_LOW_PRIORITY_TIMEOUT 2 +// NRFX_QSPI_PIN_IO2 - IO2 pin value. +#ifndef NRFX_QSPI_PIN_IO2 +#define NRFX_QSPI_PIN_IO2 NRF_QSPI_PIN_NOT_CONNECTED #endif -// ANT_DEFAULT_HIGH_PRIORITY_TIMEOUT - Default high priority search time-out. <0-255> +// NRFX_QSPI_PIN_IO3 - IO3 pin value. +#ifndef NRFX_QSPI_PIN_IO3 +#define NRFX_QSPI_PIN_IO3 NRF_QSPI_PIN_NOT_CONNECTED +#endif +// NRFX_QSPI_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -#ifndef ANT_DEFAULT_HIGH_PRIORITY_TIMEOUT -#define ANT_DEFAULT_HIGH_PRIORITY_TIMEOUT 10 +#ifndef NRFX_QSPI_CONFIG_IRQ_PRIORITY +#define NRFX_QSPI_CONFIG_IRQ_PRIORITY 7 #endif // -// ANT_STACK_CONFIG_ENABLED - ant_stack_config - Common ANT stack configuration +// NRFX_RNG_ENABLED - nrfx_rng - RNG peripheral driver //========================================================== -#ifndef ANT_STACK_CONFIG_ENABLED -#define ANT_STACK_CONFIG_ENABLED 0 +#ifndef NRFX_RNG_ENABLED +#define NRFX_RNG_ENABLED 0 #endif -// ANT_CONFIG_TOTAL_CHANNELS_ALLOCATED - Allocated ANT channels -#ifndef ANT_CONFIG_TOTAL_CHANNELS_ALLOCATED -#define ANT_CONFIG_TOTAL_CHANNELS_ALLOCATED 0 +// NRFX_RNG_CONFIG_ERROR_CORRECTION - Error correction + + +#ifndef NRFX_RNG_CONFIG_ERROR_CORRECTION +#define NRFX_RNG_CONFIG_ERROR_CORRECTION 1 #endif -// ANT_CONFIG_ENCRYPTED_CHANNELS - Encrypted ANT channels -#ifndef ANT_CONFIG_ENCRYPTED_CHANNELS -#define ANT_CONFIG_ENCRYPTED_CHANNELS 0 +// NRFX_RNG_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_RNG_CONFIG_IRQ_PRIORITY +#define NRFX_RNG_CONFIG_IRQ_PRIORITY 7 #endif -// ANT_CONFIG_EVENT_QUEUE_SIZE - Event queue size -#ifndef ANT_CONFIG_EVENT_QUEUE_SIZE -#define ANT_CONFIG_EVENT_QUEUE_SIZE 32 +// NRFX_RNG_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_RNG_CONFIG_LOG_ENABLED +#define NRFX_RNG_CONFIG_LOG_ENABLED 0 #endif +// NRFX_RNG_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -// ANT_CONFIG_BURST_QUEUE_SIZE - ANT burst queue size -#ifndef ANT_CONFIG_BURST_QUEUE_SIZE -#define ANT_CONFIG_BURST_QUEUE_SIZE 128 +#ifndef NRFX_RNG_CONFIG_LOG_LEVEL +#define NRFX_RNG_CONFIG_LOG_LEVEL 3 #endif -// +// NRFX_RNG_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// ANT_STATE_INDICATOR_ENABLED - ant_state_indicator - ANT state indicator using BSP -//========================================================== -#ifndef ANT_STATE_INDICATOR_ENABLED -#define ANT_STATE_INDICATOR_ENABLED 0 +#ifndef NRFX_RNG_CONFIG_INFO_COLOR +#define NRFX_RNG_CONFIG_INFO_COLOR 0 #endif -// ANT_STATE_INDICATOR_CONFIG_SHUTDOWN_HANDLER_PRIORITY - Shutdown observer priority. -#ifndef ANT_STATE_INDICATOR_CONFIG_SHUTDOWN_HANDLER_PRIORITY -#define ANT_STATE_INDICATOR_CONFIG_SHUTDOWN_HANDLER_PRIORITY 1 + +// NRFX_RNG_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_RNG_CONFIG_DEBUG_COLOR +#define NRFX_RNG_CONFIG_DEBUG_COLOR 0 #endif // -// +// + +// NRFX_RTC_ENABLED - nrfx_rtc - RTC peripheral driver //========================================================== +#ifndef NRFX_RTC_ENABLED +#define NRFX_RTC_ENABLED 0 +#endif +// NRFX_RTC0_ENABLED - Enable RTC0 instance + -// nRF_BLE +#ifndef NRFX_RTC0_ENABLED +#define NRFX_RTC0_ENABLED 0 +#endif -//========================================================== -// BLE_ADVERTISING_ENABLED - ble_advertising - Advertising module +// NRFX_RTC1_ENABLED - Enable RTC1 instance + + +#ifndef NRFX_RTC1_ENABLED +#define NRFX_RTC1_ENABLED 0 +#endif +// NRFX_RTC2_ENABLED - Enable RTC2 instance + -#ifndef BLE_ADVERTISING_ENABLED -#define BLE_ADVERTISING_ENABLED 0 +#ifndef NRFX_RTC2_ENABLED +#define NRFX_RTC2_ENABLED 0 #endif -// BLE_DTM_ENABLED - ble_dtm - Module for testing RF/PHY using DTM commands +// NRFX_RTC_MAXIMUM_LATENCY_US - Maximum possible time[us] in highest priority interrupt +#ifndef NRFX_RTC_MAXIMUM_LATENCY_US +#define NRFX_RTC_MAXIMUM_LATENCY_US 2000 +#endif +// NRFX_RTC_DEFAULT_CONFIG_FREQUENCY - Frequency <16-32768> -#ifndef BLE_DTM_ENABLED -#define BLE_DTM_ENABLED 0 + +#ifndef NRFX_RTC_DEFAULT_CONFIG_FREQUENCY +#define NRFX_RTC_DEFAULT_CONFIG_FREQUENCY 32768 #endif -// BLE_RACP_ENABLED - ble_racp - Record Access Control Point library +// NRFX_RTC_DEFAULT_CONFIG_RELIABLE - Ensures safe compare event triggering + +#ifndef NRFX_RTC_DEFAULT_CONFIG_RELIABLE +#define NRFX_RTC_DEFAULT_CONFIG_RELIABLE 0 +#endif -#ifndef BLE_RACP_ENABLED -#define BLE_RACP_ENABLED 0 +// NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif -// NRF_BLE_CONN_PARAMS_ENABLED - ble_conn_params - Initiating and executing a connection parameters negotiation procedure +// NRFX_RTC_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== -#ifndef NRF_BLE_CONN_PARAMS_ENABLED -#define NRF_BLE_CONN_PARAMS_ENABLED 0 +#ifndef NRFX_RTC_CONFIG_LOG_ENABLED +#define NRFX_RTC_CONFIG_LOG_ENABLED 0 #endif -// NRF_BLE_CONN_PARAMS_MAX_SLAVE_LATENCY_DEVIATION - The largest acceptable deviation in slave latency. -// The largest deviation (+ or -) from the requested slave latency that will not be renegotiated. +// NRFX_RTC_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -#ifndef NRF_BLE_CONN_PARAMS_MAX_SLAVE_LATENCY_DEVIATION -#define NRF_BLE_CONN_PARAMS_MAX_SLAVE_LATENCY_DEVIATION 499 +#ifndef NRFX_RTC_CONFIG_LOG_LEVEL +#define NRFX_RTC_CONFIG_LOG_LEVEL 3 #endif -// NRF_BLE_CONN_PARAMS_MAX_SUPERVISION_TIMEOUT_DEVIATION - The largest acceptable deviation (in 10 ms units) in supervision timeout. -// The largest deviation (+ or -, in 10 ms units) from the requested supervision timeout that will not be renegotiated. +// NRFX_RTC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef NRF_BLE_CONN_PARAMS_MAX_SUPERVISION_TIMEOUT_DEVIATION -#define NRF_BLE_CONN_PARAMS_MAX_SUPERVISION_TIMEOUT_DEVIATION 65535 +#ifndef NRFX_RTC_CONFIG_INFO_COLOR +#define NRFX_RTC_CONFIG_INFO_COLOR 0 #endif -// +// NRFX_RTC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// NRF_BLE_QWR_ENABLED - nrf_ble_qwr - Queued writes support module (prepare/execute write) +#ifndef NRFX_RTC_CONFIG_DEBUG_COLOR +#define NRFX_RTC_CONFIG_DEBUG_COLOR 0 +#endif +// -#ifndef NRF_BLE_QWR_ENABLED -#define NRF_BLE_QWR_ENABLED 0 -#endif +// -// PEER_MANAGER_ENABLED - peer_manager - Peer Manager +// NRFX_SAADC_ENABLED - nrfx_saadc - SAADC peripheral driver //========================================================== -#ifndef PEER_MANAGER_ENABLED -#define PEER_MANAGER_ENABLED 0 +#ifndef NRFX_SAADC_ENABLED +#define NRFX_SAADC_ENABLED 0 #endif -// PM_MAX_REGISTRANTS -// Number of event handlers that can be registered. +// NRFX_SAADC_CONFIG_RESOLUTION - Resolution + +// <0=> 8 bit +// <1=> 10 bit +// <2=> 12 bit +// <3=> 14 bit -#ifndef PM_MAX_REGISTRANTS -#define PM_MAX_REGISTRANTS 3 +#ifndef NRFX_SAADC_CONFIG_RESOLUTION +#define NRFX_SAADC_CONFIG_RESOLUTION 1 #endif -// PM_FLASH_BUFFERS -// Number of internal buffers for flash operations. -// Decrease this value to lower RAM usage. +// NRFX_SAADC_CONFIG_OVERSAMPLE - Sample period + +// <0=> Disabled +// <1=> 2x +// <2=> 4x +// <3=> 8x +// <4=> 16x +// <5=> 32x +// <6=> 64x +// <7=> 128x +// <8=> 256x -#ifndef PM_FLASH_BUFFERS -#define PM_FLASH_BUFFERS 8 +#ifndef NRFX_SAADC_CONFIG_OVERSAMPLE +#define NRFX_SAADC_CONFIG_OVERSAMPLE 0 #endif -// - -// -//========================================================== +// NRFX_SAADC_CONFIG_LP_MODE - Enabling low power mode + -// nRF_BLE_Services +#ifndef NRFX_SAADC_CONFIG_LP_MODE +#define NRFX_SAADC_CONFIG_LP_MODE 0 +#endif -//========================================================== -// BLE_ANCS_C_ENABLED - ble_ancs_c - Apple Notification Service Client +// NRFX_SAADC_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 +#ifndef NRFX_SAADC_CONFIG_IRQ_PRIORITY +#define NRFX_SAADC_CONFIG_IRQ_PRIORITY 7 +#endif -#ifndef BLE_ANCS_C_ENABLED -#define BLE_ANCS_C_ENABLED 0 +// NRFX_SAADC_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_SAADC_CONFIG_LOG_ENABLED +#define NRFX_SAADC_CONFIG_LOG_ENABLED 0 #endif +// NRFX_SAADC_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -// BLE_ANS_C_ENABLED - ble_ans_c - Alert Notification Service Client +#ifndef NRFX_SAADC_CONFIG_LOG_LEVEL +#define NRFX_SAADC_CONFIG_LOG_LEVEL 3 +#endif +// NRFX_SAADC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef BLE_ANS_C_ENABLED -#define BLE_ANS_C_ENABLED 0 +#ifndef NRFX_SAADC_CONFIG_INFO_COLOR +#define NRFX_SAADC_CONFIG_INFO_COLOR 0 #endif -// BLE_BAS_C_ENABLED - ble_bas_c - Battery Service Client - +// NRFX_SAADC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef BLE_BAS_C_ENABLED -#define BLE_BAS_C_ENABLED 0 +#ifndef NRFX_SAADC_CONFIG_DEBUG_COLOR +#define NRFX_SAADC_CONFIG_DEBUG_COLOR 0 #endif -// BLE_BAS_ENABLED - ble_bas - Battery Service +// +// -#ifndef BLE_BAS_ENABLED -#define BLE_BAS_ENABLED 0 -#endif +// needed to build +#define NRFX_SPIM0_ENABLED 1 +#define NRFX_SPIM1_ENABLED 1 +#define NRFX_SPIM2_ENABLED 1 -// BLE_CSCS_ENABLED - ble_cscs - Cycling Speed and Cadence Service +// NRFX_SPIM_ENABLED - nrfx_spim - SPIM peripheral driver +//========================================================== +#ifndef NRFX_SPIM_ENABLED +#define NRFX_SPIM_ENABLED 0 +#endif +// NRFX_SPIM0_ENABLED - Enable SPIM0 instance + -#ifndef BLE_CSCS_ENABLED -#define BLE_CSCS_ENABLED 0 +#ifndef NRFX_SPIM0_ENABLED +#define NRFX_SPIM0_ENABLED 0 #endif -// BLE_CTS_C_ENABLED - ble_cts_c - Current Time Service Client +// NRFX_SPIM1_ENABLED - Enable SPIM1 instance -#ifndef BLE_CTS_C_ENABLED -#define BLE_CTS_C_ENABLED 0 +#ifndef NRFX_SPIM1_ENABLED +#define NRFX_SPIM1_ENABLED 0 #endif -// BLE_DIS_ENABLED - ble_dis - Device Information Service +// NRFX_SPIM2_ENABLED - Enable SPIM2 instance + +#ifndef NRFX_SPIM2_ENABLED +#define NRFX_SPIM2_ENABLED 0 +#endif -#ifndef BLE_DIS_ENABLED -#define BLE_DIS_ENABLED 0 +// NRFX_SPIM3_ENABLED - Enable SPIM3 instance + + +#ifndef NRFX_SPIM3_ENABLED +#define NRFX_SPIM3_ENABLED 0 #endif -// BLE_GLS_ENABLED - ble_gls - Glucose Service +// NRFX_SPIM_EXTENDED_ENABLED - Enable extended SPIM features + +#ifndef NRFX_SPIM_EXTENDED_ENABLED +#define NRFX_SPIM_EXTENDED_ENABLED 0 +#endif -#ifndef BLE_GLS_ENABLED -#define BLE_GLS_ENABLED 0 +// NRFX_SPIM_MISO_PULL_CFG - MISO pin pull configuration. + +// <0=> NRF_GPIO_PIN_NOPULL +// <1=> NRF_GPIO_PIN_PULLDOWN +// <3=> NRF_GPIO_PIN_PULLUP + +#ifndef NRFX_SPIM_MISO_PULL_CFG +#define NRFX_SPIM_MISO_PULL_CFG 1 #endif -// BLE_HIDS_ENABLED - ble_hids - Human Interface Device Service +// NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 +#ifndef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif -#ifndef BLE_HIDS_ENABLED -#define BLE_HIDS_ENABLED 0 +// NRFX_SPIM_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_SPIM_CONFIG_LOG_ENABLED +#define NRFX_SPIM_CONFIG_LOG_ENABLED 0 #endif +// NRFX_SPIM_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -// BLE_HRS_C_ENABLED - ble_hrs_c - Heart Rate Service Client +#ifndef NRFX_SPIM_CONFIG_LOG_LEVEL +#define NRFX_SPIM_CONFIG_LOG_LEVEL 3 +#endif +// NRFX_SPIM_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef BLE_HRS_C_ENABLED -#define BLE_HRS_C_ENABLED 0 +#ifndef NRFX_SPIM_CONFIG_INFO_COLOR +#define NRFX_SPIM_CONFIG_INFO_COLOR 0 #endif -// BLE_HRS_ENABLED - ble_hrs - Heart Rate Service - +// NRFX_SPIM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef BLE_HRS_ENABLED -#define BLE_HRS_ENABLED 0 +#ifndef NRFX_SPIM_CONFIG_DEBUG_COLOR +#define NRFX_SPIM_CONFIG_DEBUG_COLOR 0 #endif -// BLE_HTS_ENABLED - ble_hts - Health Thermometer Service +// +// -#ifndef BLE_HTS_ENABLED -#define BLE_HTS_ENABLED 0 +// NRFX_SPIS_ENABLED - nrfx_spis - SPIS peripheral driver +//========================================================== +#ifndef NRFX_SPIS_ENABLED +#define NRFX_SPIS_ENABLED 0 #endif +// NRFX_SPIS0_ENABLED - Enable SPIS0 instance + -// BLE_IAS_C_ENABLED - ble_ias_c - Immediate Alert Service Client +#ifndef NRFX_SPIS0_ENABLED +#define NRFX_SPIS0_ENABLED 0 +#endif +// NRFX_SPIS1_ENABLED - Enable SPIS1 instance + -#ifndef BLE_IAS_C_ENABLED -#define BLE_IAS_C_ENABLED 0 +#ifndef NRFX_SPIS1_ENABLED +#define NRFX_SPIS1_ENABLED 0 #endif -// BLE_IAS_ENABLED - ble_ias - Immediate Alert Service +// NRFX_SPIS2_ENABLED - Enable SPIS2 instance + +#ifndef NRFX_SPIS2_ENABLED +#define NRFX_SPIS2_ENABLED 0 +#endif -#ifndef BLE_IAS_ENABLED -#define BLE_IAS_ENABLED 0 +// NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif -// BLE_LBS_C_ENABLED - ble_lbs_c - Nordic LED Button Service Client +// NRFX_SPIS_DEFAULT_DEF - SPIS default DEF character <0-255> -#ifndef BLE_LBS_C_ENABLED -#define BLE_LBS_C_ENABLED 0 +#ifndef NRFX_SPIS_DEFAULT_DEF +#define NRFX_SPIS_DEFAULT_DEF 255 #endif -// BLE_LBS_ENABLED - ble_lbs - LED Button Service +// NRFX_SPIS_DEFAULT_ORC - SPIS default ORC character <0-255> -#ifndef BLE_LBS_ENABLED -#define BLE_LBS_ENABLED 0 +#ifndef NRFX_SPIS_DEFAULT_ORC +#define NRFX_SPIS_DEFAULT_ORC 255 #endif -// BLE_LLS_ENABLED - ble_lls - Link Loss Service - +// NRFX_SPIS_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_SPIS_CONFIG_LOG_ENABLED +#define NRFX_SPIS_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_SPIS_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -#ifndef BLE_LLS_ENABLED -#define BLE_LLS_ENABLED 0 +#ifndef NRFX_SPIS_CONFIG_LOG_LEVEL +#define NRFX_SPIS_CONFIG_LOG_LEVEL 3 #endif -// BLE_NUS_C_ENABLED - ble_nus_c - Nordic UART Central Service +// NRFX_SPIS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White +#ifndef NRFX_SPIS_CONFIG_INFO_COLOR +#define NRFX_SPIS_CONFIG_INFO_COLOR 0 +#endif -#ifndef BLE_NUS_C_ENABLED -#define BLE_NUS_C_ENABLED 0 +// NRFX_SPIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_SPIS_CONFIG_DEBUG_COLOR +#define NRFX_SPIS_CONFIG_DEBUG_COLOR 0 #endif -// BLE_NUS_ENABLED - ble_nus - Nordic UART Service +// + +// +// NRFX_SPI_ENABLED - nrfx_spi - SPI peripheral driver +//========================================================== -#ifndef BLE_NUS_ENABLED -#define BLE_NUS_ENABLED 0 +#ifndef NRFX_SPI_ENABLED +#define NRFX_SPI_ENABLED 1 #endif - -// BLE_RSCS_C_ENABLED - ble_rscs_c - Running Speed and Cadence Client +// NRFX_SPI0_ENABLED - Enable SPI0 instance -#ifndef BLE_RSCS_C_ENABLED -#define BLE_RSCS_C_ENABLED 0 +#ifndef NRFX_SPI0_ENABLED +#define NRFX_SPI0_ENABLED 1 #endif -// BLE_RSCS_ENABLED - ble_rscs - Running Speed and Cadence Service +// NRFX_SPI1_ENABLED - Enable SPI1 instance + +#ifndef NRFX_SPI1_ENABLED +#define NRFX_SPI1_ENABLED 0 +#endif -#ifndef BLE_RSCS_ENABLED -#define BLE_RSCS_ENABLED 0 +// NRFX_SPI2_ENABLED - Enable SPI2 instance + + +#ifndef NRFX_SPI2_ENABLED +#define NRFX_SPI2_ENABLED 0 #endif -// BLE_TPS_ENABLED - ble_tps - TX Power Service +// NRFX_SPI_MISO_PULL_CFG - MISO pin pull configuration. + +// <0=> NRF_GPIO_PIN_NOPULL +// <1=> NRF_GPIO_PIN_PULLDOWN +// <3=> NRF_GPIO_PIN_PULLUP +#ifndef NRFX_SPI_MISO_PULL_CFG +#define NRFX_SPI_MISO_PULL_CFG 1 +#endif -#ifndef BLE_TPS_ENABLED -#define BLE_TPS_ENABLED 0 +// NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif -// +// NRFX_SPI_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== +#ifndef NRFX_SPI_CONFIG_LOG_ENABLED +#define NRFX_SPI_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_SPI_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -// nRF_Core +#ifndef NRFX_SPI_CONFIG_LOG_LEVEL +#define NRFX_SPI_CONFIG_LOG_LEVEL 3 +#endif -//========================================================== -// NRF_MPU_ENABLED - nrf_mpu - Module for MPU -//========================================================== -#ifndef NRF_MPU_ENABLED -#define NRF_MPU_ENABLED 0 +// NRFX_SPI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_SPI_CONFIG_INFO_COLOR +#define NRFX_SPI_CONFIG_INFO_COLOR 0 #endif -// NRF_MPU_CLI_CMDS - Enable CLI commands specific to the module +// NRFX_SPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef NRF_MPU_CLI_CMDS -#define NRF_MPU_CLI_CMDS 1 +#ifndef NRFX_SPI_CONFIG_DEBUG_COLOR +#define NRFX_SPI_CONFIG_DEBUG_COLOR 0 #endif // -// NRF_STACK_GUARD_ENABLED - nrf_stack_guard - Module for Protecting Stack +// + +// NRFX_SWI_ENABLED - nrfx_swi - SWI/EGU peripheral allocator //========================================================== -#ifndef NRF_STACK_GUARD_ENABLED -#define NRF_STACK_GUARD_ENABLED 0 +#ifndef NRFX_SWI_ENABLED +#define NRFX_SWI_ENABLED 0 #endif -// NRF_STACK_GUARD_CONFIG_SIZE - Size of stack guard +// NRFX_EGU_ENABLED - Enable EGU support + -// <5=> 32 bytes -// <6=> 64 bytes -// <7=> 128 bytes -// <8=> 256 bytes -// <9=> 512 bytes -// <10=> 1024 bytes -// <11=> 2048 bytes -// <12=> 4096 bytes - -#ifndef NRF_STACK_GUARD_CONFIG_SIZE -#define NRF_STACK_GUARD_CONFIG_SIZE 7 +#ifndef NRFX_EGU_ENABLED +#define NRFX_EGU_ENABLED 0 #endif -// +// NRFX_SWI0_DISABLED - Exclude SWI0 from being utilized by the driver + -// -//========================================================== +#ifndef NRFX_SWI0_DISABLED +#define NRFX_SWI0_DISABLED 0 +#endif -// nRF_Crypto +// NRFX_SWI1_DISABLED - Exclude SWI1 from being utilized by the driver + -//========================================================== -// NRF_CRYPTO_ENABLED - nrf_crypto - Cryptography library -//========================================================== -#ifndef NRF_CRYPTO_ENABLED -#define NRF_CRYPTO_ENABLED 0 +#ifndef NRFX_SWI1_DISABLED +#define NRFX_SWI1_DISABLED 0 #endif -// NRF_CRYPTO_BACKEND_CC310_LIB - Enable the ARM Cryptocell CC310 backend +// NRFX_SWI2_DISABLED - Exclude SWI2 from being utilized by the driver + -// The hardware-accelerated cryptography backend is available only on nRF52840. +#ifndef NRFX_SWI2_DISABLED +#define NRFX_SWI2_DISABLED 0 +#endif + +// NRFX_SWI3_DISABLED - Exclude SWI3 from being utilized by the driver + -#ifndef NRF_CRYPTO_BACKEND_CC310_LIB -#define NRF_CRYPTO_BACKEND_CC310_LIB 1 +#ifndef NRFX_SWI3_DISABLED +#define NRFX_SWI3_DISABLED 0 #endif -// NRF_CRYPTO_BACKEND_MICRO_ECC - Enable the micro-ecc software backend +// NRFX_SWI4_DISABLED - Exclude SWI4 from being utilized by the driver + -// The micro-ecc library provides a software implementation of ECC cryptography for nRF5 Series devices. -//========================================================== -#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC -#define NRF_CRYPTO_BACKEND_MICRO_ECC 0 +#ifndef NRFX_SWI4_DISABLED +#define NRFX_SWI4_DISABLED 0 #endif -// NRF_CRYPTO_BACKEND_MICRO_ECC_SHA256 - Enable SHA256 +// NRFX_SWI5_DISABLED - Exclude SWI5 from being utilized by the driver + + +#ifndef NRFX_SWI5_DISABLED +#define NRFX_SWI5_DISABLED 0 +#endif -// Enable SHA256 cryptographic hash functionality. -// Enable this setting if you need SHA256 support, for example to verify signatures. +// NRFX_SWI_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_SWI_CONFIG_LOG_ENABLED +#define NRFX_SWI_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_SWI_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_SHA256 -#define NRF_CRYPTO_BACKEND_MICRO_ECC_SHA256 1 +#ifndef NRFX_SWI_CONFIG_LOG_LEVEL +#define NRFX_SWI_CONFIG_LOG_LEVEL 3 #endif -// NRF_CRYPTO_BACKEND_MICRO_ECC_RNG - Enable random number generator +// NRFX_SWI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White +#ifndef NRFX_SWI_CONFIG_INFO_COLOR +#define NRFX_SWI_CONFIG_INFO_COLOR 0 +#endif -// Enable random number generation. -// Enable this setting if you need to generate cryptographic keys. -// This setting requires the RNG peripheral driver to be present. +// NRFX_SWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_RNG -#define NRF_CRYPTO_BACKEND_MICRO_ECC_RNG 0 +#ifndef NRFX_SWI_CONFIG_DEBUG_COLOR +#define NRFX_SWI_CONFIG_DEBUG_COLOR 0 #endif // // -// +// NRFX_TIMER_ENABLED - nrfx_timer - TIMER periperal driver //========================================================== +#ifndef NRFX_TIMER_ENABLED +#define NRFX_TIMER_ENABLED 0 +#endif +// NRFX_TIMER0_ENABLED - Enable TIMER0 instance + -// nRF_DFU +#ifndef NRFX_TIMER0_ENABLED +#define NRFX_TIMER0_ENABLED 0 +#endif -//========================================================== -// ble_dfu - Device Firmware Update +// NRFX_TIMER1_ENABLED - Enable TIMER1 instance + -//========================================================== -// BLE_DFU_ENABLED - Enable DFU Service. +#ifndef NRFX_TIMER1_ENABLED +#define NRFX_TIMER1_ENABLED 0 +#endif +// NRFX_TIMER2_ENABLED - Enable TIMER2 instance + -#ifndef BLE_DFU_ENABLED -#define BLE_DFU_ENABLED 0 +#ifndef NRFX_TIMER2_ENABLED +#define NRFX_TIMER2_ENABLED 0 #endif -// NRF_DFU_BLE_BUTTONLESS_SUPPORTS_BONDS - Buttonless DFU supports bonds. +// NRFX_TIMER3_ENABLED - Enable TIMER3 instance + +#ifndef NRFX_TIMER3_ENABLED +#define NRFX_TIMER3_ENABLED 0 +#endif -#ifndef NRF_DFU_BLE_BUTTONLESS_SUPPORTS_BONDS -#define NRF_DFU_BLE_BUTTONLESS_SUPPORTS_BONDS 0 +// NRFX_TIMER4_ENABLED - Enable TIMER4 instance + + +#ifndef NRFX_TIMER4_ENABLED +#define NRFX_TIMER4_ENABLED 0 +#endif + +// NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY - Timer frequency if in Timer mode + +// <0=> 16 MHz +// <1=> 8 MHz +// <2=> 4 MHz +// <3=> 2 MHz +// <4=> 1 MHz +// <5=> 500 kHz +// <6=> 250 kHz +// <7=> 125 kHz +// <8=> 62.5 kHz +// <9=> 31.25 kHz + +#ifndef NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY +#define NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY 0 +#endif + +// NRFX_TIMER_DEFAULT_CONFIG_MODE - Timer mode or operation + +// <0=> Timer +// <1=> Counter + +#ifndef NRFX_TIMER_DEFAULT_CONFIG_MODE +#define NRFX_TIMER_DEFAULT_CONFIG_MODE 0 #endif -// -//========================================================== +// NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH - Timer counter bit width + +// <0=> 16 bit +// <1=> 8 bit +// <2=> 24 bit +// <3=> 32 bit -// -//========================================================== +#ifndef NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH +#define NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH 0 +#endif -// nRF_Drivers +// NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 +#ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif + +// NRFX_TIMER_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== -// APP_USBD_ENABLED - app_usbd - USB Device library -//========================================================== -#ifndef APP_USBD_ENABLED -#define APP_USBD_ENABLED 0 +#ifndef NRFX_TIMER_CONFIG_LOG_ENABLED +#define NRFX_TIMER_CONFIG_LOG_ENABLED 0 #endif -// APP_USBD_VID - Vendor ID <0x0000-0xFFFF> +// NRFX_TIMER_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug +#ifndef NRFX_TIMER_CONFIG_LOG_LEVEL +#define NRFX_TIMER_CONFIG_LOG_LEVEL 3 +#endif -// Vendor ID ordered from USB IF: http://www.usb.org/developers/vendor/ +// NRFX_TIMER_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef APP_USBD_VID -#define APP_USBD_VID 0 +#ifndef NRFX_TIMER_CONFIG_INFO_COLOR +#define NRFX_TIMER_CONFIG_INFO_COLOR 0 #endif -// APP_USBD_PID - Product ID <0x0000-0xFFFF> +// NRFX_TIMER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White +#ifndef NRFX_TIMER_CONFIG_DEBUG_COLOR +#define NRFX_TIMER_CONFIG_DEBUG_COLOR 0 +#endif -// Selected Product ID +// -#ifndef APP_USBD_PID -#define APP_USBD_PID 0 +// + +// NRFX_TWIM_ENABLED - nrfx_twim - TWIM peripheral driver +//========================================================== +#ifndef NRFX_TWIM_ENABLED +#define NRFX_TWIM_ENABLED 1 #endif +// NRFX_TWIM0_ENABLED - Enable TWIM0 instance -// APP_USBD_DEVICE_VER_MAJOR - Device version, major part <0-99> +#ifndef NRFX_TWIM0_ENABLED +#define NRFX_TWIM0_ENABLED 1 +#endif -// Device version, will be converted automatically to BCD notation. Use just decimal values. +// NRFX_TWIM1_ENABLED - Enable TWIM1 instance -#ifndef APP_USBD_DEVICE_VER_MAJOR -#define APP_USBD_DEVICE_VER_MAJOR 1 -#endif -// APP_USBD_DEVICE_VER_MINOR - Device version, minor part <0-99> +#ifndef NRFX_TWIM1_ENABLED +#define NRFX_TWIM1_ENABLED 1 +#endif +// NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY - Frequency -// Device version, will be converted automatically to BCD notation. Use just decimal values. +// <26738688=> 100k +// <67108864=> 250k +// <104857600=> 400k -#ifndef APP_USBD_DEVICE_VER_MINOR -#define APP_USBD_DEVICE_VER_MINOR 0 +#ifndef NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY +#define NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY 26738688 #endif -// APP_USBD_EVENT_QUEUE_ENABLE - Enable event queue +// NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit -// This is the default configuration when all the events are placed into internal queue. -// Disable it when external queue is used like app_scheduler or if you wish to process all events inside interrupts. -// Processing all events from the interrupt level adds requirement not to call any functions that modifies the USBD library state from the context higher than USB interrupt context. -// Functions that modify USBD state are functions for sleep, wakeup, start, stop, enable and disable. -//========================================================== -#ifndef APP_USBD_EVENT_QUEUE_ENABLE -#define APP_USBD_EVENT_QUEUE_ENABLE 1 + +#ifndef NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT +#define NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0 #endif -// APP_USBD_EVENT_QUEUE_SIZE - The size of event queue <16-64> +// NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority -// The size of the queue for the events that would be processed in the main loop. +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -#ifndef APP_USBD_EVENT_QUEUE_SIZE -#define APP_USBD_EVENT_QUEUE_SIZE 32 +#ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif -// - -// APP_USBD_CONFIG_LOG_ENABLED - Enable logging in the module +// NRFX_TWIM_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== -#ifndef APP_USBD_CONFIG_LOG_ENABLED -#define APP_USBD_CONFIG_LOG_ENABLED 0 +#ifndef NRFX_TWIM_CONFIG_LOG_ENABLED +#define NRFX_TWIM_CONFIG_LOG_ENABLED 0 #endif -// APP_USBD_CONFIG_LOG_LEVEL - Default Severity level +// NRFX_TWIM_CONFIG_LOG_LEVEL - Default Severity level // <0=> Off // <1=> Error @@ -1619,11 +3871,11 @@ // <3=> Info // <4=> Debug -#ifndef APP_USBD_CONFIG_LOG_LEVEL -#define APP_USBD_CONFIG_LOG_LEVEL 3 +#ifndef NRFX_TWIM_CONFIG_LOG_LEVEL +#define NRFX_TWIM_CONFIG_LOG_LEVEL 3 #endif -// APP_USBD_CONFIG_INFO_COLOR - ANSI escape code prefix. +// NRFX_TWIM_CONFIG_INFO_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black @@ -1635,11 +3887,11 @@ // <7=> Cyan // <8=> White -#ifndef APP_USBD_CONFIG_INFO_COLOR -#define APP_USBD_CONFIG_INFO_COLOR 0 +#ifndef NRFX_TWIM_CONFIG_INFO_COLOR +#define NRFX_TWIM_CONFIG_INFO_COLOR 0 #endif -// APP_USBD_CONFIG_DEBUG_COLOR - ANSI escape code prefix. +// NRFX_TWIM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black @@ -1651,453 +3903,637 @@ // <7=> Cyan // <8=> White -#ifndef APP_USBD_CONFIG_DEBUG_COLOR -#define APP_USBD_CONFIG_DEBUG_COLOR 0 +#ifndef NRFX_TWIM_CONFIG_DEBUG_COLOR +#define NRFX_TWIM_CONFIG_DEBUG_COLOR 0 #endif // // -// CLOCK_ENABLED - nrf_drv_clock - CLOCK peripheral driver +// NRFX_TWIS_ENABLED - nrfx_twis - TWIS peripheral driver //========================================================== -#ifndef CLOCK_ENABLED -#define CLOCK_ENABLED 0 +#ifndef NRFX_TWIS_ENABLED +#define NRFX_TWIS_ENABLED 0 #endif -// CLOCK_CONFIG_XTAL_FREQ - HF XTAL Frequency +// NRFX_TWIS0_ENABLED - Enable TWIS0 instance + -// <0=> Default (64 MHz) +#ifndef NRFX_TWIS0_ENABLED +#define NRFX_TWIS0_ENABLED 0 +#endif + +// NRFX_TWIS1_ENABLED - Enable TWIS1 instance + -#ifndef CLOCK_CONFIG_XTAL_FREQ -#define CLOCK_CONFIG_XTAL_FREQ 0 +#ifndef NRFX_TWIS1_ENABLED +#define NRFX_TWIS1_ENABLED 0 #endif -// CLOCK_CONFIG_LF_SRC - LF Clock Source +// NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once + -// <0=> RC -// <1=> XTAL -// <2=> Synth +// Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code. -#ifndef CLOCK_CONFIG_LF_SRC -#define CLOCK_CONFIG_LF_SRC 1 +#ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY +#define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 #endif -// CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority +// NRFX_TWIS_NO_SYNC_MODE - Remove support for synchronous mode + +// Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources. -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +#ifndef NRFX_TWIS_NO_SYNC_MODE +#define NRFX_TWIS_NO_SYNC_MODE 0 +#endif -#ifndef CLOCK_CONFIG_IRQ_PRIORITY -#define CLOCK_CONFIG_IRQ_PRIORITY 7 +// NRFX_TWIS_DEFAULT_CONFIG_ADDR0 - Address0 +#ifndef NRFX_TWIS_DEFAULT_CONFIG_ADDR0 +#define NRFX_TWIS_DEFAULT_CONFIG_ADDR0 0 #endif -// +// NRFX_TWIS_DEFAULT_CONFIG_ADDR1 - Address1 +#ifndef NRFX_TWIS_DEFAULT_CONFIG_ADDR1 +#define NRFX_TWIS_DEFAULT_CONFIG_ADDR1 0 +#endif -// COMP_ENABLED - nrf_drv_comp - COMP peripheral driver -//========================================================== -#ifndef COMP_ENABLED -#define COMP_ENABLED 0 +// NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL - SCL pin pull configuration + +// <0=> Disabled +// <1=> Pull down +// <3=> Pull up + +#ifndef NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL +#define NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL 0 #endif -// COMP_CONFIG_REF - Reference voltage -// <0=> Internal 1.2V -// <1=> Internal 1.8V -// <2=> Internal 2.4V -// <4=> VDD -// <7=> ARef +// NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL - SDA pin pull configuration + +// <0=> Disabled +// <1=> Pull down +// <3=> Pull up -#ifndef COMP_CONFIG_REF -#define COMP_CONFIG_REF 1 +#ifndef NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL +#define NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL 0 #endif -// COMP_CONFIG_MAIN_MODE - Main mode +// NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -// <0=> Single ended -// <1=> Differential +#ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif -#ifndef COMP_CONFIG_MAIN_MODE -#define COMP_CONFIG_MAIN_MODE 0 +// NRFX_TWIS_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_TWIS_CONFIG_LOG_ENABLED +#define NRFX_TWIS_CONFIG_LOG_ENABLED 0 #endif +// NRFX_TWIS_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -// COMP_CONFIG_SPEED_MODE - Speed mode +#ifndef NRFX_TWIS_CONFIG_LOG_LEVEL +#define NRFX_TWIS_CONFIG_LOG_LEVEL 3 +#endif -// <0=> Low power -// <1=> Normal -// <2=> High speed +// NRFX_TWIS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef COMP_CONFIG_SPEED_MODE -#define COMP_CONFIG_SPEED_MODE 2 +#ifndef NRFX_TWIS_CONFIG_INFO_COLOR +#define NRFX_TWIS_CONFIG_INFO_COLOR 0 #endif -// COMP_CONFIG_HYST - Hystheresis - -// <0=> No -// <1=> 50mV +// NRFX_TWIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef COMP_CONFIG_HYST -#define COMP_CONFIG_HYST 0 +#ifndef NRFX_TWIS_CONFIG_DEBUG_COLOR +#define NRFX_TWIS_CONFIG_DEBUG_COLOR 0 #endif -// COMP_CONFIG_ISOURCE - Current Source +// -// <0=> Off -// <1=> 2.5 uA -// <2=> 5 uA -// <3=> 10 uA +// -#ifndef COMP_CONFIG_ISOURCE -#define COMP_CONFIG_ISOURCE 0 -#endif +// NRFX_TWI_ENABLED - nrfx_twi - TWI peripheral driver +//========================================================== -// COMP_CONFIG_INPUT - Analog input +#ifndef NRFX_TWI_ENABLED +#define NRFX_TWI_ENABLED 1 +#endif +// NRFX_TWI0_ENABLED - Enable TWI0 instance -// <0=> 0 -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 -#ifndef COMP_CONFIG_INPUT -#define COMP_CONFIG_INPUT 0 +#ifndef NRFX_TWI0_ENABLED +#define NRFX_TWI0_ENABLED 1 #endif -// COMP_CONFIG_IRQ_PRIORITY - Interrupt priority +// NRFX_TWI1_ENABLED - Enable TWI1 instance -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +#ifndef NRFX_TWI1_ENABLED +#define NRFX_TWI1_ENABLED 1 +#endif -#ifndef COMP_CONFIG_IRQ_PRIORITY -#define COMP_CONFIG_IRQ_PRIORITY 7 +// NRFX_TWI_DEFAULT_CONFIG_FREQUENCY - Frequency + +// <26738688=> 100k +// <67108864=> 250k +// <104857600=> 400k + +#ifndef NRFX_TWI_DEFAULT_CONFIG_FREQUENCY +#define NRFX_TWI_DEFAULT_CONFIG_FREQUENCY 26738688 #endif -// +// NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit + -// EGU_ENABLED - nrf_drv_swi - SWI(EGU) peripheral driver +#ifndef NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT +#define NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0 +#endif +// NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -#ifndef EGU_ENABLED -#define EGU_ENABLED 1 +#ifndef NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif -// GPIOTE_ENABLED - nrf_drv_gpiote - GPIOTE peripheral driver +// NRFX_TWI_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== -#ifndef GPIOTE_ENABLED -#define GPIOTE_ENABLED 1 -#endif -// GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins -#ifndef GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS -#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 4 +#ifndef NRFX_TWI_CONFIG_LOG_ENABLED +#define NRFX_TWI_CONFIG_LOG_ENABLED 0 #endif +// NRFX_TWI_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -// GPIOTE_CONFIG_IRQ_PRIORITY - Interrupt priority - - -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 - -#ifndef GPIOTE_CONFIG_IRQ_PRIORITY -#define GPIOTE_CONFIG_IRQ_PRIORITY 7 +#ifndef NRFX_TWI_CONFIG_LOG_LEVEL +#define NRFX_TWI_CONFIG_LOG_LEVEL 3 #endif -// +// NRFX_TWI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// I2S_ENABLED - nrf_drv_i2s - I2S peripheral driver -//========================================================== -#ifndef I2S_ENABLED -#define I2S_ENABLED 0 +#ifndef NRFX_TWI_CONFIG_INFO_COLOR +#define NRFX_TWI_CONFIG_INFO_COLOR 0 #endif -// I2S_CONFIG_SCK_PIN - SCK pin <0-31> +// NRFX_TWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef I2S_CONFIG_SCK_PIN -#define I2S_CONFIG_SCK_PIN 31 +#ifndef NRFX_TWI_CONFIG_DEBUG_COLOR +#define NRFX_TWI_CONFIG_DEBUG_COLOR 0 #endif -// I2S_CONFIG_LRCK_PIN - LRCK pin <1-31> +// +// -#ifndef I2S_CONFIG_LRCK_PIN -#define I2S_CONFIG_LRCK_PIN 30 +// NRFX_UARTE_ENABLED - nrfx_uarte - UARTE peripheral driver +//========================================================== +#ifndef NRFX_UARTE_ENABLED +#define NRFX_UARTE_ENABLED 0 #endif - -// I2S_CONFIG_MCK_PIN - MCK pin -#ifndef I2S_CONFIG_MCK_PIN -#define I2S_CONFIG_MCK_PIN 255 +// NRFX_UARTE0_ENABLED - Enable UARTE0 instance +#ifndef NRFX_UARTE0_ENABLED +#define NRFX_UARTE0_ENABLED 0 #endif -// I2S_CONFIG_SDOUT_PIN - SDOUT pin <0-31> +// NRFX_UARTE1_ENABLED - Enable UARTE1 instance +#ifndef NRFX_UARTE1_ENABLED +#define NRFX_UARTE1_ENABLED 0 +#endif +// NRFX_UARTE_DEFAULT_CONFIG_HWFC - Hardware Flow Control + +// <0=> Disabled +// <1=> Enabled -#ifndef I2S_CONFIG_SDOUT_PIN -#define I2S_CONFIG_SDOUT_PIN 29 +#ifndef NRFX_UARTE_DEFAULT_CONFIG_HWFC +#define NRFX_UARTE_DEFAULT_CONFIG_HWFC 0 #endif -// I2S_CONFIG_SDIN_PIN - SDIN pin <0-31> +// NRFX_UARTE_DEFAULT_CONFIG_PARITY - Parity + +// <0=> Excluded +// <14=> Included - -#ifndef I2S_CONFIG_SDIN_PIN -#define I2S_CONFIG_SDIN_PIN 28 +#ifndef NRFX_UARTE_DEFAULT_CONFIG_PARITY +#define NRFX_UARTE_DEFAULT_CONFIG_PARITY 0 #endif -// I2S_CONFIG_MASTER - Mode - -// <0=> Master -// <1=> Slave +// NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE - Default Baudrate + +// <323584=> 1200 baud +// <643072=> 2400 baud +// <1290240=> 4800 baud +// <2576384=> 9600 baud +// <3862528=> 14400 baud +// <5152768=> 19200 baud +// <7716864=> 28800 baud +// <8388608=> 31250 baud +// <10289152=> 38400 baud +// <15007744=> 56000 baud +// <15400960=> 57600 baud +// <20615168=> 76800 baud +// <30801920=> 115200 baud +// <61865984=> 230400 baud +// <67108864=> 250000 baud +// <121634816=> 460800 baud +// <251658240=> 921600 baud +// <268435456=> 1000000 baud -#ifndef I2S_CONFIG_MASTER -#define I2S_CONFIG_MASTER 0 +#ifndef NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE +#define NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE 30801920 #endif -// I2S_CONFIG_FORMAT - Format +// NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -// <0=> I2S -// <1=> Aligned +#ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif -#ifndef I2S_CONFIG_FORMAT -#define I2S_CONFIG_FORMAT 0 +// NRFX_UARTE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_UARTE_CONFIG_LOG_ENABLED +#define NRFX_UARTE_CONFIG_LOG_ENABLED 0 #endif +// NRFX_UARTE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -// I2S_CONFIG_ALIGN - Alignment +#ifndef NRFX_UARTE_CONFIG_LOG_LEVEL +#define NRFX_UARTE_CONFIG_LOG_LEVEL 3 +#endif -// <0=> Left -// <1=> Right +// NRFX_UARTE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef I2S_CONFIG_ALIGN -#define I2S_CONFIG_ALIGN 0 +#ifndef NRFX_UARTE_CONFIG_INFO_COLOR +#define NRFX_UARTE_CONFIG_INFO_COLOR 0 +#endif + +// NRFX_UARTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_UARTE_CONFIG_DEBUG_COLOR +#define NRFX_UARTE_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// + +// NRFX_UART_ENABLED - nrfx_uart - UART peripheral driver +//========================================================== +#ifndef NRFX_UART_ENABLED +#define NRFX_UART_ENABLED 0 +#endif +// NRFX_UART0_ENABLED - Enable UART0 instance +#ifndef NRFX_UART0_ENABLED +#define NRFX_UART0_ENABLED 0 +#endif + +// NRFX_UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control + +// <0=> Disabled +// <1=> Enabled + +#ifndef NRFX_UART_DEFAULT_CONFIG_HWFC +#define NRFX_UART_DEFAULT_CONFIG_HWFC 0 #endif -// I2S_CONFIG_SWIDTH - Sample width (bits) - -// <0=> 8 -// <1=> 16 -// <2=> 24 +// NRFX_UART_DEFAULT_CONFIG_PARITY - Parity + +// <0=> Excluded +// <14=> Included -#ifndef I2S_CONFIG_SWIDTH -#define I2S_CONFIG_SWIDTH 1 +#ifndef NRFX_UART_DEFAULT_CONFIG_PARITY +#define NRFX_UART_DEFAULT_CONFIG_PARITY 0 #endif -// I2S_CONFIG_CHANNELS - Channels - -// <0=> Stereo -// <1=> Left -// <2=> Right +// NRFX_UART_DEFAULT_CONFIG_BAUDRATE - Default Baudrate + +// <323584=> 1200 baud +// <643072=> 2400 baud +// <1290240=> 4800 baud +// <2576384=> 9600 baud +// <3866624=> 14400 baud +// <5152768=> 19200 baud +// <7729152=> 28800 baud +// <8388608=> 31250 baud +// <10309632=> 38400 baud +// <15007744=> 56000 baud +// <15462400=> 57600 baud +// <20615168=> 76800 baud +// <30924800=> 115200 baud +// <61845504=> 230400 baud +// <67108864=> 250000 baud +// <123695104=> 460800 baud +// <247386112=> 921600 baud +// <268435456=> 1000000 baud -#ifndef I2S_CONFIG_CHANNELS -#define I2S_CONFIG_CHANNELS 1 +#ifndef NRFX_UART_DEFAULT_CONFIG_BAUDRATE +#define NRFX_UART_DEFAULT_CONFIG_BAUDRATE 30924800 #endif -// I2S_CONFIG_MCK_SETUP - MCK behavior - -// <0=> Disabled -// <2147483648=> 32MHz/2 -// <1342177280=> 32MHz/3 -// <1073741824=> 32MHz/4 -// <805306368=> 32MHz/5 -// <671088640=> 32MHz/6 -// <536870912=> 32MHz/8 -// <402653184=> 32MHz/10 -// <369098752=> 32MHz/11 -// <285212672=> 32MHz/15 -// <268435456=> 32MHz/16 -// <201326592=> 32MHz/21 -// <184549376=> 32MHz/23 -// <142606336=> 32MHz/30 -// <138412032=> 32MHz/31 -// <134217728=> 32MHz/32 -// <100663296=> 32MHz/42 -// <68157440=> 32MHz/63 -// <34340864=> 32MHz/125 +// NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -#ifndef I2S_CONFIG_MCK_SETUP -#define I2S_CONFIG_MCK_SETUP 536870912 +#ifndef NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif -// I2S_CONFIG_RATIO - MCK/LRCK ratio - -// <0=> 32x -// <1=> 48x -// <2=> 64x -// <3=> 96x -// <4=> 128x -// <5=> 192x -// <6=> 256x -// <7=> 384x -// <8=> 512x +// NRFX_UART_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_UART_CONFIG_LOG_ENABLED +#define NRFX_UART_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_UART_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -#ifndef I2S_CONFIG_RATIO -#define I2S_CONFIG_RATIO 2000 +#ifndef NRFX_UART_CONFIG_LOG_LEVEL +#define NRFX_UART_CONFIG_LOG_LEVEL 3 #endif -// I2S_CONFIG_IRQ_PRIORITY - Interrupt priority +// NRFX_UART_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White +#ifndef NRFX_UART_CONFIG_INFO_COLOR +#define NRFX_UART_CONFIG_INFO_COLOR 0 +#endif -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// NRFX_UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef I2S_CONFIG_IRQ_PRIORITY -#define I2S_CONFIG_IRQ_PRIORITY 7 +#ifndef NRFX_UART_CONFIG_DEBUG_COLOR +#define NRFX_UART_CONFIG_DEBUG_COLOR 0 #endif // -// LPCOMP_ENABLED - nrf_drv_lpcomp - LPCOMP peripheral driver +// + +// NRFX_WDT_ENABLED - nrfx_wdt - WDT peripheral driver //========================================================== -#ifndef LPCOMP_ENABLED -#define LPCOMP_ENABLED 0 +#ifndef NRFX_WDT_ENABLED +#define NRFX_WDT_ENABLED 0 #endif -// LPCOMP_CONFIG_REFERENCE - Reference voltage +// NRFX_WDT_CONFIG_BEHAVIOUR - WDT behavior in CPU SLEEP or HALT mode + +// <1=> Run in SLEEP, Pause in HALT +// <8=> Pause in SLEEP, Run in HALT +// <9=> Run in SLEEP and HALT +// <0=> Pause in SLEEP and HALT -// <0=> Supply 1/8 -// <1=> Supply 2/8 -// <2=> Supply 3/8 -// <3=> Supply 4/8 -// <4=> Supply 5/8 -// <5=> Supply 6/8 -// <6=> Supply 7/8 -// <8=> Supply 1/16 (nRF52) -// <9=> Supply 3/16 (nRF52) -// <10=> Supply 5/16 (nRF52) -// <11=> Supply 7/16 (nRF52) -// <12=> Supply 9/16 (nRF52) -// <13=> Supply 11/16 (nRF52) -// <14=> Supply 13/16 (nRF52) -// <15=> Supply 15/16 (nRF52) -// <7=> External Ref 0 -// <65543=> External Ref 1 - -#ifndef LPCOMP_CONFIG_REFERENCE -#define LPCOMP_CONFIG_REFERENCE 3 +#ifndef NRFX_WDT_CONFIG_BEHAVIOUR +#define NRFX_WDT_CONFIG_BEHAVIOUR 1 #endif -// LPCOMP_CONFIG_DETECTION - Detection +// NRFX_WDT_CONFIG_RELOAD_VALUE - Reload value <15-4294967295> -// <0=> Crossing -// <1=> Up -// <2=> Down -#ifndef LPCOMP_CONFIG_DETECTION -#define LPCOMP_CONFIG_DETECTION 2 +#ifndef NRFX_WDT_CONFIG_RELOAD_VALUE +#define NRFX_WDT_CONFIG_RELOAD_VALUE 2000 #endif -// LPCOMP_CONFIG_INPUT - Analog input - -// <0=> 0 -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// NRFX_WDT_CONFIG_IRQ_PRIORITY - Interrupt priority + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 -#ifndef LPCOMP_CONFIG_INPUT -#define LPCOMP_CONFIG_INPUT 0 +#ifndef NRFX_WDT_CONFIG_IRQ_PRIORITY +#define NRFX_WDT_CONFIG_IRQ_PRIORITY 7 #endif -// LPCOMP_CONFIG_HYST - Hysteresis - - -#ifndef LPCOMP_CONFIG_HYST -#define LPCOMP_CONFIG_HYST 0 +// NRFX_WDT_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_WDT_CONFIG_LOG_ENABLED +#define NRFX_WDT_CONFIG_LOG_ENABLED 0 +#endif +// NRFX_WDT_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_WDT_CONFIG_LOG_LEVEL +#define NRFX_WDT_CONFIG_LOG_LEVEL 3 #endif -// LPCOMP_CONFIG_IRQ_PRIORITY - Interrupt priority +// NRFX_WDT_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White +#ifndef NRFX_WDT_CONFIG_INFO_COLOR +#define NRFX_WDT_CONFIG_INFO_COLOR 0 +#endif -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// NRFX_WDT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef LPCOMP_CONFIG_IRQ_PRIORITY -#define LPCOMP_CONFIG_IRQ_PRIORITY 7 +#ifndef NRFX_WDT_CONFIG_DEBUG_COLOR +#define NRFX_WDT_CONFIG_DEBUG_COLOR 0 #endif // -// PDM_ENABLED - nrf_drv_pdm - PDM peripheral driver +// + +// PDM_ENABLED - nrf_drv_pdm - PDM peripheral driver - legacy layer //========================================================== #ifndef PDM_ENABLED #define PDM_ENABLED 0 #endif // PDM_CONFIG_MODE - Mode - -// <0=> Stereo -// <1=> Mono + +// <0=> Stereo +// <1=> Mono #ifndef PDM_CONFIG_MODE #define PDM_CONFIG_MODE 1 #endif // PDM_CONFIG_EDGE - Edge - -// <0=> Left falling -// <1=> Left rising + +// <0=> Left falling +// <1=> Left rising #ifndef PDM_CONFIG_EDGE #define PDM_CONFIG_EDGE 0 #endif // PDM_CONFIG_CLOCK_FREQ - Clock frequency - -// <134217728=> 1000k -// <138412032=> 1032k (default) -// <142606336=> 1067k + +// <134217728=> 1000k +// <138412032=> 1032k (default) +// <142606336=> 1067k #ifndef PDM_CONFIG_CLOCK_FREQ #define PDM_CONFIG_CLOCK_FREQ 138412032 #endif // PDM_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef PDM_CONFIG_IRQ_PRIORITY #define PDM_CONFIG_IRQ_PRIORITY 7 @@ -2105,37 +4541,30 @@ // -// PERIPHERAL_RESOURCE_SHARING_ENABLED - nrf_drv_common - Peripheral drivers common module - - -#ifndef PERIPHERAL_RESOURCE_SHARING_ENABLED -#define PERIPHERAL_RESOURCE_SHARING_ENABLED 1 -#endif - -// POWER_ENABLED - nrf_drv_power - POWER peripheral driver +// POWER_ENABLED - nrf_drv_power - POWER peripheral driver - legacy layer //========================================================== #ifndef POWER_ENABLED #define POWER_ENABLED 0 #endif // POWER_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef POWER_CONFIG_IRQ_PRIORITY #define POWER_CONFIG_IRQ_PRIORITY 7 #endif // POWER_CONFIG_DEFAULT_DCDCEN - The default configuration of main DCDC regulator - + // This settings means only that components for DCDC regulator are installed and it can be enabled. @@ -2144,7 +4573,7 @@ #endif // POWER_CONFIG_DEFAULT_DCDCENHV - The default configuration of High Voltage DCDC regulator - + // This settings means only that components for DCDC regulator are installed and it can be enabled. @@ -2154,40 +4583,40 @@ // -// PPI_ENABLED - nrf_drv_ppi - PPI peripheral driver - +// PPI_ENABLED - nrf_drv_ppi - PPI peripheral driver - legacy layer + #ifndef PPI_ENABLED #define PPI_ENABLED 1 #endif -// PWM_ENABLED - nrf_drv_pwm - PWM peripheral driver +// PWM_ENABLED - nrf_drv_pwm - PWM peripheral driver - legacy layer //========================================================== #ifndef PWM_ENABLED -#define PWM_ENABLED 1 +#define PWM_ENABLED 0 #endif -// PWM_DEFAULT_CONFIG_OUT0_PIN - Out0 pin <0-31> +// PWM_DEFAULT_CONFIG_OUT0_PIN - Out0 pin <0-31> #ifndef PWM_DEFAULT_CONFIG_OUT0_PIN #define PWM_DEFAULT_CONFIG_OUT0_PIN 31 #endif -// PWM_DEFAULT_CONFIG_OUT1_PIN - Out1 pin <0-31> +// PWM_DEFAULT_CONFIG_OUT1_PIN - Out1 pin <0-31> #ifndef PWM_DEFAULT_CONFIG_OUT1_PIN #define PWM_DEFAULT_CONFIG_OUT1_PIN 31 #endif -// PWM_DEFAULT_CONFIG_OUT2_PIN - Out2 pin <0-31> +// PWM_DEFAULT_CONFIG_OUT2_PIN - Out2 pin <0-31> #ifndef PWM_DEFAULT_CONFIG_OUT2_PIN #define PWM_DEFAULT_CONFIG_OUT2_PIN 31 #endif -// PWM_DEFAULT_CONFIG_OUT3_PIN - Out3 pin <0-31> +// PWM_DEFAULT_CONFIG_OUT3_PIN - Out3 pin <0-31> #ifndef PWM_DEFAULT_CONFIG_OUT3_PIN @@ -2195,94 +4624,94 @@ #endif // PWM_DEFAULT_CONFIG_BASE_CLOCK - Base clock - -// <0=> 16 MHz -// <1=> 8 MHz -// <2=> 4 MHz -// <3=> 2 MHz -// <4=> 1 MHz -// <5=> 500 kHz -// <6=> 250 kHz -// <7=> 125 kHz + +// <0=> 16 MHz +// <1=> 8 MHz +// <2=> 4 MHz +// <3=> 2 MHz +// <4=> 1 MHz +// <5=> 500 kHz +// <6=> 250 kHz +// <7=> 125 kHz #ifndef PWM_DEFAULT_CONFIG_BASE_CLOCK #define PWM_DEFAULT_CONFIG_BASE_CLOCK 4 #endif // PWM_DEFAULT_CONFIG_COUNT_MODE - Count mode - -// <0=> Up -// <1=> Up and Down + +// <0=> Up +// <1=> Up and Down #ifndef PWM_DEFAULT_CONFIG_COUNT_MODE #define PWM_DEFAULT_CONFIG_COUNT_MODE 0 #endif -// PWM_DEFAULT_CONFIG_TOP_VALUE - Top value +// PWM_DEFAULT_CONFIG_TOP_VALUE - Top value #ifndef PWM_DEFAULT_CONFIG_TOP_VALUE #define PWM_DEFAULT_CONFIG_TOP_VALUE 1000 #endif // PWM_DEFAULT_CONFIG_LOAD_MODE - Load mode - -// <0=> Common -// <1=> Grouped -// <2=> Individual -// <3=> Waveform + +// <0=> Common +// <1=> Grouped +// <2=> Individual +// <3=> Waveform #ifndef PWM_DEFAULT_CONFIG_LOAD_MODE #define PWM_DEFAULT_CONFIG_LOAD_MODE 0 #endif // PWM_DEFAULT_CONFIG_STEP_MODE - Step mode - -// <0=> Auto -// <1=> Triggered + +// <0=> Auto +// <1=> Triggered #ifndef PWM_DEFAULT_CONFIG_STEP_MODE #define PWM_DEFAULT_CONFIG_STEP_MODE 0 #endif // PWM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + - -// Priorities 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef PWM_DEFAULT_CONFIG_IRQ_PRIORITY #define PWM_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif // PWM0_ENABLED - Enable PWM0 instance - + #ifndef PWM0_ENABLED -#define PWM0_ENABLED 1 +#define PWM0_ENABLED 0 #endif // PWM1_ENABLED - Enable PWM1 instance - + #ifndef PWM1_ENABLED -#define PWM1_ENABLED 1 +#define PWM1_ENABLED 0 #endif // PWM2_ENABLED - Enable PWM2 instance - + #ifndef PWM2_ENABLED -#define PWM2_ENABLED 1 +#define PWM2_ENABLED 0 #endif // PWM3_ENABLED - Enable PWM3 instance - + #ifndef PWM3_ENABLED #define PWM3_ENABLED 0 @@ -2290,102 +4719,102 @@ // -// QDEC_ENABLED - nrf_drv_qdec - QDEC peripheral driver +// QDEC_ENABLED - nrf_drv_qdec - QDEC peripheral driver - legacy layer //========================================================== #ifndef QDEC_ENABLED #define QDEC_ENABLED 0 #endif // QDEC_CONFIG_REPORTPER - Report period - -// <0=> 10 Samples -// <1=> 40 Samples -// <2=> 80 Samples -// <3=> 120 Samples -// <4=> 160 Samples -// <5=> 200 Samples -// <6=> 240 Samples -// <7=> 280 Samples + +// <0=> 10 Samples +// <1=> 40 Samples +// <2=> 80 Samples +// <3=> 120 Samples +// <4=> 160 Samples +// <5=> 200 Samples +// <6=> 240 Samples +// <7=> 280 Samples #ifndef QDEC_CONFIG_REPORTPER #define QDEC_CONFIG_REPORTPER 0 #endif // QDEC_CONFIG_SAMPLEPER - Sample period - -// <0=> 128 us -// <1=> 256 us -// <2=> 512 us -// <3=> 1024 us -// <4=> 2048 us -// <5=> 4096 us -// <6=> 8192 us -// <7=> 16384 us + +// <0=> 128 us +// <1=> 256 us +// <2=> 512 us +// <3=> 1024 us +// <4=> 2048 us +// <5=> 4096 us +// <6=> 8192 us +// <7=> 16384 us #ifndef QDEC_CONFIG_SAMPLEPER #define QDEC_CONFIG_SAMPLEPER 7 #endif -// QDEC_CONFIG_PIO_A - A pin <0-31> +// QDEC_CONFIG_PIO_A - A pin <0-31> #ifndef QDEC_CONFIG_PIO_A #define QDEC_CONFIG_PIO_A 31 #endif -// QDEC_CONFIG_PIO_B - B pin <0-31> +// QDEC_CONFIG_PIO_B - B pin <0-31> #ifndef QDEC_CONFIG_PIO_B #define QDEC_CONFIG_PIO_B 31 #endif -// QDEC_CONFIG_PIO_LED - LED pin <0-31> +// QDEC_CONFIG_PIO_LED - LED pin <0-31> #ifndef QDEC_CONFIG_PIO_LED #define QDEC_CONFIG_PIO_LED 31 #endif -// QDEC_CONFIG_LEDPRE - LED pre +// QDEC_CONFIG_LEDPRE - LED pre #ifndef QDEC_CONFIG_LEDPRE #define QDEC_CONFIG_LEDPRE 511 #endif // QDEC_CONFIG_LEDPOL - LED polarity - -// <0=> Active low -// <1=> Active high + +// <0=> Active low +// <1=> Active high #ifndef QDEC_CONFIG_LEDPOL #define QDEC_CONFIG_LEDPOL 1 #endif // QDEC_CONFIG_DBFEN - Debouncing enable - + #ifndef QDEC_CONFIG_DBFEN #define QDEC_CONFIG_DBFEN 0 #endif // QDEC_CONFIG_SAMPLE_INTEN - Sample ready interrupt enable - + #ifndef QDEC_CONFIG_SAMPLE_INTEN #define QDEC_CONFIG_SAMPLE_INTEN 0 #endif // QDEC_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef QDEC_CONFIG_IRQ_PRIORITY #define QDEC_CONFIG_IRQ_PRIORITY 7 @@ -2393,35 +4822,165 @@ // -// RNG_ENABLED - nrf_drv_rng - RNG peripheral driver +// QSPI_ENABLED - nrf_drv_qspi - QSPI peripheral driver - legacy layer +//========================================================== +#ifndef QSPI_ENABLED +#define QSPI_ENABLED 0 +#endif +// QSPI_CONFIG_SCK_DELAY - tSHSL, tWHSL and tSHWL in number of 16 MHz periods (62.5 ns). <0-255> + + +#ifndef QSPI_CONFIG_SCK_DELAY +#define QSPI_CONFIG_SCK_DELAY 1 +#endif + +// QSPI_CONFIG_XIP_OFFSET - Address offset in the external memory for Execute in Place operation. +#ifndef QSPI_CONFIG_XIP_OFFSET +#define QSPI_CONFIG_XIP_OFFSET 0 +#endif + +// QSPI_CONFIG_READOC - Number of data lines and opcode used for reading. + +// <0=> FastRead +// <1=> Read2O +// <2=> Read2IO +// <3=> Read4O +// <4=> Read4IO + +#ifndef QSPI_CONFIG_READOC +#define QSPI_CONFIG_READOC 0 +#endif + +// QSPI_CONFIG_WRITEOC - Number of data lines and opcode used for writing. + +// <0=> PP +// <1=> PP2O +// <2=> PP4O +// <3=> PP4IO + +#ifndef QSPI_CONFIG_WRITEOC +#define QSPI_CONFIG_WRITEOC 0 +#endif + +// QSPI_CONFIG_ADDRMODE - Addressing mode. + +// <0=> 24bit +// <1=> 32bit + +#ifndef QSPI_CONFIG_ADDRMODE +#define QSPI_CONFIG_ADDRMODE 0 +#endif + +// QSPI_CONFIG_MODE - SPI mode. + +// <0=> Mode 0 +// <1=> Mode 1 + +#ifndef QSPI_CONFIG_MODE +#define QSPI_CONFIG_MODE 0 +#endif + +// QSPI_CONFIG_FREQUENCY - Frequency divider. + +// <0=> 32MHz/1 +// <1=> 32MHz/2 +// <2=> 32MHz/3 +// <3=> 32MHz/4 +// <4=> 32MHz/5 +// <5=> 32MHz/6 +// <6=> 32MHz/7 +// <7=> 32MHz/8 +// <8=> 32MHz/9 +// <9=> 32MHz/10 +// <10=> 32MHz/11 +// <11=> 32MHz/12 +// <12=> 32MHz/13 +// <13=> 32MHz/14 +// <14=> 32MHz/15 +// <15=> 32MHz/16 + +#ifndef QSPI_CONFIG_FREQUENCY +#define QSPI_CONFIG_FREQUENCY 15 +#endif + +// QSPI_PIN_SCK - SCK pin value. +#ifndef QSPI_PIN_SCK +#define QSPI_PIN_SCK NRF_QSPI_PIN_NOT_CONNECTED +#endif + +// QSPI_PIN_CSN - CSN pin value. +#ifndef QSPI_PIN_CSN +#define QSPI_PIN_CSN NRF_QSPI_PIN_NOT_CONNECTED +#endif + +// QSPI_PIN_IO0 - IO0 pin value. +#ifndef QSPI_PIN_IO0 +#define QSPI_PIN_IO0 NRF_QSPI_PIN_NOT_CONNECTED +#endif + +// QSPI_PIN_IO1 - IO1 pin value. +#ifndef QSPI_PIN_IO1 +#define QSPI_PIN_IO1 NRF_QSPI_PIN_NOT_CONNECTED +#endif + +// QSPI_PIN_IO2 - IO2 pin value. +#ifndef QSPI_PIN_IO2 +#define QSPI_PIN_IO2 NRF_QSPI_PIN_NOT_CONNECTED +#endif + +// QSPI_PIN_IO3 - IO3 pin value. +#ifndef QSPI_PIN_IO3 +#define QSPI_PIN_IO3 NRF_QSPI_PIN_NOT_CONNECTED +#endif + +// QSPI_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef QSPI_CONFIG_IRQ_PRIORITY +#define QSPI_CONFIG_IRQ_PRIORITY 7 +#endif + +// + +// RNG_ENABLED - nrf_drv_rng - RNG peripheral driver - legacy layer //========================================================== #ifndef RNG_ENABLED -#define RNG_ENABLED 1 +#define RNG_ENABLED 0 #endif // RNG_CONFIG_ERROR_CORRECTION - Error correction - + #ifndef RNG_CONFIG_ERROR_CORRECTION #define RNG_CONFIG_ERROR_CORRECTION 1 #endif -// RNG_CONFIG_POOL_SIZE - Pool size +// RNG_CONFIG_POOL_SIZE - Pool size #ifndef RNG_CONFIG_POOL_SIZE #define RNG_CONFIG_POOL_SIZE 64 #endif // RNG_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef RNG_CONFIG_IRQ_PRIORITY #define RNG_CONFIG_IRQ_PRIORITY 7 @@ -2429,12 +4988,12 @@ // -// RTC_ENABLED - nrf_drv_rtc - RTC peripheral driver +// RTC_ENABLED - nrf_drv_rtc - RTC peripheral driver - legacy layer //========================================================== #ifndef RTC_ENABLED #define RTC_ENABLED 0 #endif -// RTC_DEFAULT_CONFIG_FREQUENCY - Frequency <16-32768> +// RTC_DEFAULT_CONFIG_FREQUENCY - Frequency <16-32768> #ifndef RTC_DEFAULT_CONFIG_FREQUENCY @@ -2442,108 +5001,108 @@ #endif // RTC_DEFAULT_CONFIG_RELIABLE - Ensures safe compare event triggering - + #ifndef RTC_DEFAULT_CONFIG_RELIABLE #define RTC_DEFAULT_CONFIG_RELIABLE 0 #endif // RTC_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef RTC_DEFAULT_CONFIG_IRQ_PRIORITY #define RTC_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif // RTC0_ENABLED - Enable RTC0 instance - + #ifndef RTC0_ENABLED #define RTC0_ENABLED 0 #endif // RTC1_ENABLED - Enable RTC1 instance - + #ifndef RTC1_ENABLED #define RTC1_ENABLED 0 #endif // RTC2_ENABLED - Enable RTC2 instance - + #ifndef RTC2_ENABLED #define RTC2_ENABLED 0 #endif -// NRF_MAXIMUM_LATENCY_US - Maximum possible time[us] in highest priority interrupt +// NRF_MAXIMUM_LATENCY_US - Maximum possible time[us] in highest priority interrupt #ifndef NRF_MAXIMUM_LATENCY_US #define NRF_MAXIMUM_LATENCY_US 2000 #endif // -// SAADC_ENABLED - nrf_drv_saadc - SAADC peripheral driver +// SAADC_ENABLED - nrf_drv_saadc - SAADC peripheral driver - legacy layer //========================================================== #ifndef SAADC_ENABLED -#define SAADC_ENABLED 1 +#define SAADC_ENABLED 0 #endif // SAADC_CONFIG_RESOLUTION - Resolution - -// <0=> 8 bit -// <1=> 10 bit -// <2=> 12 bit -// <3=> 14 bit + +// <0=> 8 bit +// <1=> 10 bit +// <2=> 12 bit +// <3=> 14 bit #ifndef SAADC_CONFIG_RESOLUTION -#define SAADC_CONFIG_RESOLUTION 2 +#define SAADC_CONFIG_RESOLUTION 1 #endif // SAADC_CONFIG_OVERSAMPLE - Sample period - -// <0=> Disabled -// <1=> 2x -// <2=> 4x -// <3=> 8x -// <4=> 16x -// <5=> 32x -// <6=> 64x -// <7=> 128x -// <8=> 256x + +// <0=> Disabled +// <1=> 2x +// <2=> 4x +// <3=> 8x +// <4=> 16x +// <5=> 32x +// <6=> 64x +// <7=> 128x +// <8=> 256x #ifndef SAADC_CONFIG_OVERSAMPLE #define SAADC_CONFIG_OVERSAMPLE 0 #endif // SAADC_CONFIG_LP_MODE - Enabling low power mode - + #ifndef SAADC_CONFIG_LP_MODE #define SAADC_CONFIG_LP_MODE 0 #endif // SAADC_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef SAADC_CONFIG_IRQ_PRIORITY #define SAADC_CONFIG_IRQ_PRIORITY 7 @@ -2551,56 +5110,56 @@ // -// SPIS_ENABLED - nrf_drv_spis - SPI Slave driver +// SPIS_ENABLED - nrf_drv_spis - SPIS peripheral driver - legacy layer //========================================================== #ifndef SPIS_ENABLED -#define SPIS_ENABLED 1 +#define SPIS_ENABLED 0 #endif // SPIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef SPIS_DEFAULT_CONFIG_IRQ_PRIORITY #define SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif // SPIS_DEFAULT_MODE - Mode - -// <0=> MODE_0 -// <1=> MODE_1 -// <2=> MODE_2 -// <3=> MODE_3 + +// <0=> MODE_0 +// <1=> MODE_1 +// <2=> MODE_2 +// <3=> MODE_3 #ifndef SPIS_DEFAULT_MODE #define SPIS_DEFAULT_MODE 0 #endif // SPIS_DEFAULT_BIT_ORDER - SPIS default bit order - -// <0=> MSB first -// <1=> LSB first + +// <0=> MSB first +// <1=> LSB first #ifndef SPIS_DEFAULT_BIT_ORDER #define SPIS_DEFAULT_BIT_ORDER 0 #endif -// SPIS_DEFAULT_DEF - SPIS default DEF character <0-255> +// SPIS_DEFAULT_DEF - SPIS default DEF character <0-255> #ifndef SPIS_DEFAULT_DEF #define SPIS_DEFAULT_DEF 255 #endif -// SPIS_DEFAULT_ORC - SPIS default ORC character <0-255> +// SPIS_DEFAULT_ORC - SPIS default ORC character <0-255> #ifndef SPIS_DEFAULT_ORC @@ -2608,21 +5167,21 @@ #endif // SPIS0_ENABLED - Enable SPIS0 instance - + #ifndef SPIS0_ENABLED -#define SPIS0_ENABLED 1 +#define SPIS0_ENABLED 0 #endif // SPIS1_ENABLED - Enable SPIS1 instance - + #ifndef SPIS1_ENABLED #define SPIS1_ENABLED 0 #endif // SPIS2_ENABLED - Enable SPIS2 instance - + #ifndef SPIS2_ENABLED #define SPIS2_ENABLED 0 @@ -2630,62 +5189,53 @@ // -// SPI_ENABLED - nrf_drv_spi - SPI/SPIM peripheral driver +// SPI_ENABLED - nrf_drv_spi - SPI/SPIM peripheral driver - legacy layer //========================================================== #ifndef SPI_ENABLED -#define SPI_ENABLED 1 +#define SPI_ENABLED 0 #endif // SPI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef SPI_DEFAULT_CONFIG_IRQ_PRIORITY #define SPI_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif // NRF_SPI_DRV_MISO_PULLUP_CFG - MISO PIN pull-up configuration. - -// <0=> NRF_GPIO_PIN_NOPULL -// <1=> NRF_GPIO_PIN_PULLDOWN -// <3=> NRF_GPIO_PIN_PULLUP + +// <0=> NRF_GPIO_PIN_NOPULL +// <1=> NRF_GPIO_PIN_PULLDOWN +// <3=> NRF_GPIO_PIN_PULLUP #ifndef NRF_SPI_DRV_MISO_PULLUP_CFG #define NRF_SPI_DRV_MISO_PULLUP_CFG 1 #endif +// needed these to build! +#define SPI0_ENABLED 1 +#define SPI1_ENABLED 1 +#define SPI2_ENABLED 1 + // SPI0_ENABLED - Enable SPI0 instance //========================================================== #ifndef SPI0_ENABLED -#define SPI0_ENABLED 1 +#define SPI0_ENABLED 0 #endif // SPI0_USE_EASY_DMA - Use EasyDMA - + #ifndef SPI0_USE_EASY_DMA -#define SPI0_USE_EASY_DMA 0 -#endif - -// SPI0_DEFAULT_FREQUENCY - SPI frequency - -// <33554432=> 125 kHz -// <67108864=> 250 kHz -// <134217728=> 500 kHz -// <268435456=> 1 MHz -// <536870912=> 2 MHz -// <1073741824=> 4 MHz -// <2147483648=> 8 MHz - -#ifndef SPI0_DEFAULT_FREQUENCY -#define SPI0_DEFAULT_FREQUENCY 1073741824 +#define SPI0_USE_EASY_DMA 1 #endif // @@ -2693,27 +5243,13 @@ // SPI1_ENABLED - Enable SPI1 instance //========================================================== #ifndef SPI1_ENABLED -#define SPI1_ENABLED 1 +#define SPI1_ENABLED 0 #endif // SPI1_USE_EASY_DMA - Use EasyDMA - + #ifndef SPI1_USE_EASY_DMA -#define SPI1_USE_EASY_DMA 0 -#endif - -// SPI1_DEFAULT_FREQUENCY - SPI frequency - -// <33554432=> 125 kHz -// <67108864=> 250 kHz -// <134217728=> 500 kHz -// <268435456=> 1 MHz -// <536870912=> 2 MHz -// <1073741824=> 4 MHz -// <2147483648=> 8 MHz - -#ifndef SPI1_DEFAULT_FREQUENCY -#define SPI1_DEFAULT_FREQUENCY 1073741824 +#define SPI1_USE_EASY_DMA 1 #endif // @@ -2721,197 +5257,136 @@ // SPI2_ENABLED - Enable SPI2 instance //========================================================== #ifndef SPI2_ENABLED -#define SPI2_ENABLED 1 +#define SPI2_ENABLED 0 #endif // SPI2_USE_EASY_DMA - Use EasyDMA - + #ifndef SPI2_USE_EASY_DMA -#define SPI2_USE_EASY_DMA 0 -#endif - -// SPI2_DEFAULT_FREQUENCY - SPI frequency - -// <33554432=> 125 kHz -// <67108864=> 250 kHz -// <134217728=> 500 kHz -// <268435456=> 1 MHz -// <536870912=> 2 MHz -// <1073741824=> 4 MHz -// <2147483648=> 8 MHz - -#ifndef SPI2_DEFAULT_FREQUENCY -#define SPI2_DEFAULT_FREQUENCY 1073741824 +#define SPI2_USE_EASY_DMA 1 #endif // // -// TIMER_ENABLED - nrf_drv_timer - TIMER periperal driver +// TIMER_ENABLED - nrf_drv_timer - TIMER periperal driver - legacy layer //========================================================== #ifndef TIMER_ENABLED #define TIMER_ENABLED 0 #endif // TIMER_DEFAULT_CONFIG_FREQUENCY - Timer frequency if in Timer mode - -// <0=> 16 MHz -// <1=> 8 MHz -// <2=> 4 MHz -// <3=> 2 MHz -// <4=> 1 MHz -// <5=> 500 kHz -// <6=> 250 kHz -// <7=> 125 kHz -// <8=> 62.5 kHz -// <9=> 31.25 kHz + +// <0=> 16 MHz +// <1=> 8 MHz +// <2=> 4 MHz +// <3=> 2 MHz +// <4=> 1 MHz +// <5=> 500 kHz +// <6=> 250 kHz +// <7=> 125 kHz +// <8=> 62.5 kHz +// <9=> 31.25 kHz #ifndef TIMER_DEFAULT_CONFIG_FREQUENCY #define TIMER_DEFAULT_CONFIG_FREQUENCY 0 #endif // TIMER_DEFAULT_CONFIG_MODE - Timer mode or operation - -// <0=> Timer -// <1=> Counter + +// <0=> Timer +// <1=> Counter #ifndef TIMER_DEFAULT_CONFIG_MODE #define TIMER_DEFAULT_CONFIG_MODE 0 #endif // TIMER_DEFAULT_CONFIG_BIT_WIDTH - Timer counter bit width - -// <0=> 16 bit -// <1=> 8 bit -// <2=> 24 bit -// <3=> 32 bit + +// <0=> 16 bit +// <1=> 8 bit +// <2=> 24 bit +// <3=> 32 bit #ifndef TIMER_DEFAULT_CONFIG_BIT_WIDTH #define TIMER_DEFAULT_CONFIG_BIT_WIDTH 0 #endif // TIMER_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef TIMER_DEFAULT_CONFIG_IRQ_PRIORITY #define TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif // TIMER0_ENABLED - Enable TIMER0 instance - + #ifndef TIMER0_ENABLED #define TIMER0_ENABLED 0 #endif -// TIMER1_ENABLED - Enable TIMER1 instance - - -#ifndef TIMER1_ENABLED -#define TIMER1_ENABLED 0 -#endif - -// TIMER2_ENABLED - Enable TIMER2 instance - - -#ifndef TIMER2_ENABLED -#define TIMER2_ENABLED 0 -#endif - -// TIMER3_ENABLED - Enable TIMER3 instance - - -#ifndef TIMER3_ENABLED -#define TIMER3_ENABLED 0 -#endif - -// TIMER4_ENABLED - Enable TIMER4 instance - - -#ifndef TIMER4_ENABLED -#define TIMER4_ENABLED 0 -#endif - -// - -// TWIS_ENABLED - nrf_drv_twis - TWIS peripheral driver -//========================================================== -#ifndef TWIS_ENABLED -#define TWIS_ENABLED 0 -#endif -// TWIS_DEFAULT_CONFIG_ADDR0 - Address0 -#ifndef TWIS_DEFAULT_CONFIG_ADDR0 -#define TWIS_DEFAULT_CONFIG_ADDR0 0 -#endif - -// TWIS_DEFAULT_CONFIG_ADDR1 - Address1 -#ifndef TWIS_DEFAULT_CONFIG_ADDR1 -#define TWIS_DEFAULT_CONFIG_ADDR1 0 -#endif - -// TWIS_DEFAULT_CONFIG_SCL_PULL - SCL pin pull configuration - -// <0=> Disabled -// <1=> Pull down -// <3=> Pull up +// TIMER1_ENABLED - Enable TIMER1 instance + -#ifndef TWIS_DEFAULT_CONFIG_SCL_PULL -#define TWIS_DEFAULT_CONFIG_SCL_PULL 0 +#ifndef TIMER1_ENABLED +#define TIMER1_ENABLED 0 #endif -// TWIS_DEFAULT_CONFIG_SDA_PULL - SDA pin pull configuration - -// <0=> Disabled -// <1=> Pull down -// <3=> Pull up +// TIMER2_ENABLED - Enable TIMER2 instance + -#ifndef TWIS_DEFAULT_CONFIG_SDA_PULL -#define TWIS_DEFAULT_CONFIG_SDA_PULL 0 +#ifndef TIMER2_ENABLED +#define TIMER2_ENABLED 0 #endif -// TWIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority +// TIMER3_ENABLED - Enable TIMER3 instance + +#ifndef TIMER3_ENABLED +#define TIMER3_ENABLED 0 +#endif -// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// TIMER4_ENABLED - Enable TIMER4 instance + -#ifndef TWIS_DEFAULT_CONFIG_IRQ_PRIORITY -#define TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#ifndef TIMER4_ENABLED +#define TIMER4_ENABLED 0 #endif -// TWIS0_ENABLED - Enable TWIS0 instance +// +// TWIS_ENABLED - nrf_drv_twis - TWIS peripheral driver - legacy layer +//========================================================== +#ifndef TWIS_ENABLED +#define TWIS_ENABLED 0 +#endif +// TWIS0_ENABLED - Enable TWIS0 instance + #ifndef TWIS0_ENABLED #define TWIS0_ENABLED 0 #endif // TWIS1_ENABLED - Enable TWIS1 instance - + #ifndef TWIS1_ENABLED #define TWIS1_ENABLED 0 #endif // TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once - + // Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code. @@ -2920,7 +5395,7 @@ #endif // TWIS_NO_SYNC_MODE - Remove support for synchronous mode - + // Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources. @@ -2928,49 +5403,96 @@ #define TWIS_NO_SYNC_MODE 0 #endif +// TWIS_DEFAULT_CONFIG_ADDR0 - Address0 +#ifndef TWIS_DEFAULT_CONFIG_ADDR0 +#define TWIS_DEFAULT_CONFIG_ADDR0 0 +#endif + +// TWIS_DEFAULT_CONFIG_ADDR1 - Address1 +#ifndef TWIS_DEFAULT_CONFIG_ADDR1 +#define TWIS_DEFAULT_CONFIG_ADDR1 0 +#endif + +// TWIS_DEFAULT_CONFIG_SCL_PULL - SCL pin pull configuration + +// <0=> Disabled +// <1=> Pull down +// <3=> Pull up + +#ifndef TWIS_DEFAULT_CONFIG_SCL_PULL +#define TWIS_DEFAULT_CONFIG_SCL_PULL 0 +#endif + +// TWIS_DEFAULT_CONFIG_SDA_PULL - SDA pin pull configuration + +// <0=> Disabled +// <1=> Pull down +// <3=> Pull up + +#ifndef TWIS_DEFAULT_CONFIG_SDA_PULL +#define TWIS_DEFAULT_CONFIG_SDA_PULL 0 +#endif + +// TWIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority + + +// Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef TWIS_DEFAULT_CONFIG_IRQ_PRIORITY +#define TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif + // -// TWI_ENABLED - nrf_drv_twi - TWI/TWIM peripheral driver +// TWI_ENABLED - nrf_drv_twi - TWI/TWIM peripheral driver - legacy layer //========================================================== #ifndef TWI_ENABLED #define TWI_ENABLED 1 #endif // TWI_DEFAULT_CONFIG_FREQUENCY - Frequency - -// <26738688=> 100k -// <67108864=> 250k -// <104857600=> 400k + +// <26738688=> 100k +// <67108864=> 250k +// <104857600=> 400k #ifndef TWI_DEFAULT_CONFIG_FREQUENCY #define TWI_DEFAULT_CONFIG_FREQUENCY 26738688 #endif // TWI_DEFAULT_CONFIG_CLR_BUS_INIT - Enables bus clearing procedure during init - + #ifndef TWI_DEFAULT_CONFIG_CLR_BUS_INIT #define TWI_DEFAULT_CONFIG_CLR_BUS_INIT 0 #endif // TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit - + #ifndef TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT #define TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0 #endif // TWI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef TWI_DEFAULT_CONFIG_IRQ_PRIORITY #define TWI_DEFAULT_CONFIG_IRQ_PRIORITY 7 @@ -2982,7 +5504,7 @@ #define TWI0_ENABLED 1 #endif // TWI0_USE_EASY_DMA - Use EasyDMA (if present) - + #ifndef TWI0_USE_EASY_DMA #define TWI0_USE_EASY_DMA 0 @@ -2996,7 +5518,7 @@ #define TWI1_ENABLED 1 #endif // TWI1_USE_EASY_DMA - Use EasyDMA (if present) - + #ifndef TWI1_USE_EASY_DMA #define TWI1_USE_EASY_DMA 0 @@ -3006,90 +5528,92 @@ // -// UART_ENABLED - nrf_drv_uart - UART/UARTE peripheral driver +// UART_ENABLED - nrf_drv_uart - UART/UARTE peripheral driver - legacy layer //========================================================== #ifndef UART_ENABLED #define UART_ENABLED 1 #endif // UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control - -// <0=> Disabled -// <1=> Enabled + +// <0=> Disabled +// <1=> Enabled #ifndef UART_DEFAULT_CONFIG_HWFC -#define UART_DEFAULT_CONFIG_HWFC 1 +#define UART_DEFAULT_CONFIG_HWFC 0 #endif // UART_DEFAULT_CONFIG_PARITY - Parity - -// <0=> Excluded -// <14=> Included + +// <0=> Excluded +// <14=> Included #ifndef UART_DEFAULT_CONFIG_PARITY #define UART_DEFAULT_CONFIG_PARITY 0 #endif // UART_DEFAULT_CONFIG_BAUDRATE - Default Baudrate - -// <323584=> 1200 baud -// <643072=> 2400 baud -// <1290240=> 4800 baud -// <2576384=> 9600 baud -// <3862528=> 14400 baud -// <5152768=> 19200 baud -// <7716864=> 28800 baud -// <10289152=> 38400 baud -// <15400960=> 57600 baud -// <20615168=> 76800 baud -// <30801920=> 115200 baud -// <61865984=> 230400 baud -// <67108864=> 250000 baud -// <121634816=> 460800 baud -// <251658240=> 921600 baud -// <268435456=> 1000000 baud + +// <323584=> 1200 baud +// <643072=> 2400 baud +// <1290240=> 4800 baud +// <2576384=> 9600 baud +// <3862528=> 14400 baud +// <5152768=> 19200 baud +// <7716864=> 28800 baud +// <10289152=> 38400 baud +// <15400960=> 57600 baud +// <20615168=> 76800 baud +// <30801920=> 115200 baud +// <61865984=> 230400 baud +// <67108864=> 250000 baud +// <121634816=> 460800 baud +// <251658240=> 921600 baud +// <268435456=> 1000000 baud #ifndef UART_DEFAULT_CONFIG_BAUDRATE -#define UART_DEFAULT_CONFIG_BAUDRATE 2576384 +#define UART_DEFAULT_CONFIG_BAUDRATE 30801920 #endif // UART_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef UART_DEFAULT_CONFIG_IRQ_PRIORITY #define UART_DEFAULT_CONFIG_IRQ_PRIORITY 7 #endif // UART_EASY_DMA_SUPPORT - Driver supporting EasyDMA - + #ifndef UART_EASY_DMA_SUPPORT #define UART_EASY_DMA_SUPPORT 1 #endif // UART_LEGACY_SUPPORT - Driver supporting Legacy mode - + #ifndef UART_LEGACY_SUPPORT #define UART_LEGACY_SUPPORT 1 #endif +// needed for Mbed build +#define UART0_ENABLED 1 // UART0_ENABLED - Enable UART0 instance //========================================================== #ifndef UART0_ENABLED -#define UART0_ENABLED 1 +#define UART0_ENABLED 0 #endif // UART0_CONFIG_USE_EASY_DMA - Default setting for using EasyDMA - + #ifndef UART0_CONFIG_USE_EASY_DMA #define UART0_CONFIG_USE_EASY_DMA 1 @@ -3102,13 +5626,6 @@ #ifndef UART1_ENABLED #define UART1_ENABLED 0 #endif -// UART1_CONFIG_USE_EASY_DMA - Default setting for using EasyDMA - - -#ifndef UART1_CONFIG_USE_EASY_DMA -#define UART1_CONFIG_USE_EASY_DMA 1 -#endif - // // @@ -3119,50 +5636,50 @@ #define USBD_ENABLED 0 #endif // USBD_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef USBD_CONFIG_IRQ_PRIORITY #define USBD_CONFIG_IRQ_PRIORITY 7 #endif -// NRF_DRV_USBD_DMASCHEDULER_MODE - USBD SMA scheduler working scheme +// USBD_CONFIG_DMASCHEDULER_MODE - USBD SMA scheduler working scheme + +// <0=> Prioritized access +// <1=> Round Robin -// <0=> Prioritized access -// <1=> Round Robin - -#ifndef NRF_DRV_USBD_DMASCHEDULER_MODE -#define NRF_DRV_USBD_DMASCHEDULER_MODE 0 +#ifndef USBD_CONFIG_DMASCHEDULER_MODE +#define USBD_CONFIG_DMASCHEDULER_MODE 0 #endif // -// WDT_ENABLED - nrf_drv_wdt - WDT peripheral driver +// WDT_ENABLED - nrf_drv_wdt - WDT peripheral driver - legacy layer //========================================================== #ifndef WDT_ENABLED #define WDT_ENABLED 0 #endif // WDT_CONFIG_BEHAVIOUR - WDT behavior in CPU SLEEP or HALT mode - -// <1=> Run in SLEEP, Pause in HALT -// <8=> Pause in SLEEP, Run in HALT -// <9=> Run in SLEEP and HALT -// <0=> Pause in SLEEP and HALT + +// <1=> Run in SLEEP, Pause in HALT +// <8=> Pause in SLEEP, Run in HALT +// <9=> Run in SLEEP and HALT +// <0=> Pause in SLEEP and HALT #ifndef WDT_CONFIG_BEHAVIOUR #define WDT_CONFIG_BEHAVIOUR 1 #endif -// WDT_CONFIG_RELOAD_VALUE - Reload value <15-4294967295> +// WDT_CONFIG_RELOAD_VALUE - Reload value <15-4294967295> #ifndef WDT_CONFIG_RELOAD_VALUE @@ -3170,17 +5687,17 @@ #endif // WDT_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef WDT_CONFIG_IRQ_PRIORITY #define WDT_CONFIG_IRQ_PRIORITY 7 @@ -3188,21 +5705,34 @@ // -// +// //========================================================== -// nRF_Libraries +// nRF_Drivers_External //========================================================== -// APP_GPIOTE_ENABLED - app_gpiote - GPIOTE events dispatcher +// NRF_TWI_SENSOR_ENABLED - nrf_twi_sensor - nRF TWI Sensor module + +#ifndef NRF_TWI_SENSOR_ENABLED +#define NRF_TWI_SENSOR_ENABLED 0 +#endif + +// +//========================================================== + +// nRF_Libraries + +//========================================================== +// APP_GPIOTE_ENABLED - app_gpiote - GPIOTE events dispatcher + #ifndef APP_GPIOTE_ENABLED #define APP_GPIOTE_ENABLED 0 #endif // APP_PWM_ENABLED - app_pwm - PWM functionality - + #ifndef APP_PWM_ENABLED #define APP_PWM_ENABLED 0 @@ -3214,14 +5744,14 @@ #define APP_SCHEDULER_ENABLED 0 #endif // APP_SCHEDULER_WITH_PAUSE - Enabling pause feature - + #ifndef APP_SCHEDULER_WITH_PAUSE #define APP_SCHEDULER_WITH_PAUSE 0 #endif // APP_SCHEDULER_WITH_PROFILER - Enabling scheduler profiling - + #ifndef APP_SCHEDULER_WITH_PROFILER #define APP_SCHEDULER_WITH_PROFILER 0 @@ -3229,42 +5759,87 @@ // +// APP_SDCARD_ENABLED - app_sdcard - SD/MMC card support using SPI +//========================================================== +#ifndef APP_SDCARD_ENABLED +#define APP_SDCARD_ENABLED 0 +#endif +// APP_SDCARD_SPI_INSTANCE - SPI instance used + +// <0=> 0 +// <1=> 1 +// <2=> 2 + +#ifndef APP_SDCARD_SPI_INSTANCE +#define APP_SDCARD_SPI_INSTANCE 0 +#endif + +// APP_SDCARD_FREQ_INIT - SPI frequency + +// <33554432=> 125 kHz +// <67108864=> 250 kHz +// <134217728=> 500 kHz +// <268435456=> 1 MHz +// <536870912=> 2 MHz +// <1073741824=> 4 MHz +// <2147483648=> 8 MHz + +#ifndef APP_SDCARD_FREQ_INIT +#define APP_SDCARD_FREQ_INIT 67108864 +#endif + +// APP_SDCARD_FREQ_DATA - SPI frequency + +// <33554432=> 125 kHz +// <67108864=> 250 kHz +// <134217728=> 500 kHz +// <268435456=> 1 MHz +// <536870912=> 2 MHz +// <1073741824=> 4 MHz +// <2147483648=> 8 MHz + +#ifndef APP_SDCARD_FREQ_DATA +#define APP_SDCARD_FREQ_DATA 1073741824 +#endif + +// + // APP_TIMER_ENABLED - app_timer - Application timer functionality //========================================================== #ifndef APP_TIMER_ENABLED #define APP_TIMER_ENABLED 0 #endif // APP_TIMER_CONFIG_RTC_FREQUENCY - Configure RTC prescaler. - -// <0=> 32768 Hz -// <1=> 16384 Hz -// <3=> 8192 Hz -// <7=> 4096 Hz -// <15=> 2048 Hz -// <31=> 1024 Hz + +// <0=> 32768 Hz +// <1=> 16384 Hz +// <3=> 8192 Hz +// <7=> 4096 Hz +// <15=> 2048 Hz +// <31=> 1024 Hz #ifndef APP_TIMER_CONFIG_RTC_FREQUENCY #define APP_TIMER_CONFIG_RTC_FREQUENCY 0 #endif // APP_TIMER_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef APP_TIMER_CONFIG_IRQ_PRIORITY #define APP_TIMER_CONFIG_IRQ_PRIORITY 7 #endif -// APP_TIMER_CONFIG_OP_QUEUE_SIZE - Capacity of timer requests queue. +// APP_TIMER_CONFIG_OP_QUEUE_SIZE - Capacity of timer requests queue. // Size of the queue depends on how many timers are used // in the system, how often timers are started and overall // system latency. If queue size is too small app_timer calls @@ -3275,21 +5850,14 @@ #endif // APP_TIMER_CONFIG_USE_SCHEDULER - Enable scheduling app_timer events to app_scheduler - + #ifndef APP_TIMER_CONFIG_USE_SCHEDULER #define APP_TIMER_CONFIG_USE_SCHEDULER 0 #endif -// APP_TIMER_WITH_PROFILER - Enable app_timer profiling - - -#ifndef APP_TIMER_WITH_PROFILER -#define APP_TIMER_WITH_PROFILER 0 -#endif - // APP_TIMER_KEEPS_RTC_ACTIVE - Enable RTC always on - + // If option is enabled RTC is kept running even if there is no active timers. // This option can be used when app_timer is used for timestamping. @@ -3298,111 +5866,259 @@ #define APP_TIMER_KEEPS_RTC_ACTIVE 0 #endif -// APP_TIMER_CONFIG_SWI_NUMBER - Configure SWI instance used. +// App Timer Legacy configuration - Legacy configuration. -// <0=> 0 -// <1=> 1 +//========================================================== +// APP_TIMER_WITH_PROFILER - Enable app_timer profiling + + +#ifndef APP_TIMER_WITH_PROFILER +#define APP_TIMER_WITH_PROFILER 0 +#endif + +// APP_TIMER_CONFIG_SWI_NUMBER - Configure SWI instance used. + #ifndef APP_TIMER_CONFIG_SWI_NUMBER #define APP_TIMER_CONFIG_SWI_NUMBER 0 #endif +// +//========================================================== + // -// NRF_TWI_MNGR_ENABLED - nrf_twi_mngr - TWI transaction manager +// APP_USBD_AUDIO_ENABLED - app_usbd_audio - USB AUDIO class + +#ifndef APP_USBD_AUDIO_ENABLED +#define APP_USBD_AUDIO_ENABLED 0 +#endif -#ifndef NRF_TWI_MNGR_ENABLED -#define NRF_TWI_MNGR_ENABLED 0 +// APP_USBD_CDC_ACM_ENABLED - app_usbd_cdc_acm - USB CDC ACM class + + +#ifndef APP_USBD_CDC_ACM_ENABLED +#define APP_USBD_CDC_ACM_ENABLED 0 +#endif + +// APP_USBD_ENABLED - app_usbd - USB Device library +//========================================================== +#ifndef APP_USBD_ENABLED +#define APP_USBD_ENABLED 0 +#endif +// APP_USBD_VID - Vendor ID <0x0000-0xFFFF> + + +// Vendor ID ordered from USB IF: http://www.usb.org/developers/vendor/ + +#ifndef APP_USBD_VID +#define APP_USBD_VID 0 +#endif + +// APP_USBD_PID - Product ID <0x0000-0xFFFF> + + +// Selected Product ID + +#ifndef APP_USBD_PID +#define APP_USBD_PID 0 +#endif + +// APP_USBD_DEVICE_VER_MAJOR - Device version, major part <0-99> + + +// Device version, will be converted automatically to BCD notation. Use just decimal values. + +#ifndef APP_USBD_DEVICE_VER_MAJOR +#define APP_USBD_DEVICE_VER_MAJOR 1 +#endif + +// APP_USBD_DEVICE_VER_MINOR - Device version, minor part <0-99> + + +// Device version, will be converted automatically to BCD notation. Use just decimal values. + +#ifndef APP_USBD_DEVICE_VER_MINOR +#define APP_USBD_DEVICE_VER_MINOR 0 +#endif + +// APP_USBD_CONFIG_SELF_POWERED - Self powered + + +#ifndef APP_USBD_CONFIG_SELF_POWERED +#define APP_USBD_CONFIG_SELF_POWERED 1 +#endif + +// APP_USBD_CONFIG_MAX_POWER - MaxPower field in configuration descriptor in milliamps <0-500> + + +#ifndef APP_USBD_CONFIG_MAX_POWER +#define APP_USBD_CONFIG_MAX_POWER 500 +#endif + +// APP_USBD_CONFIG_POWER_EVENTS_PROCESS - Process power events + + +// Enable processing power events in USB event handler. + +#ifndef APP_USBD_CONFIG_POWER_EVENTS_PROCESS +#define APP_USBD_CONFIG_POWER_EVENTS_PROCESS 1 +#endif + +// APP_USBD_CONFIG_EVENT_QUEUE_ENABLE - Enable event queue + +// This is the default configuration when all the events are placed into internal queue. +// Disable it when external queue is used like app_scheduler or if you wish to process all events inside interrupts. +// Processing all events from the interrupt level adds requirement not to call any functions that modifies the USBD library state from the context higher than USB interrupt context. +// Functions that modify USBD state are functions for sleep, wakeup, start, stop, enable and disable. +//========================================================== +#ifndef APP_USBD_CONFIG_EVENT_QUEUE_ENABLE +#define APP_USBD_CONFIG_EVENT_QUEUE_ENABLE 1 +#endif +// APP_USBD_CONFIG_EVENT_QUEUE_SIZE - The size of event queue <16-64> + + +// The size of the queue for the events that would be processed in the main loop. + +#ifndef APP_USBD_CONFIG_EVENT_QUEUE_SIZE +#define APP_USBD_CONFIG_EVENT_QUEUE_SIZE 32 +#endif + +// APP_USBD_CONFIG_SOF_HANDLING_MODE - Change SOF events handling mode. + + +// Normal queue - SOF events are pushed normally into event queue. +// Compress queue - SOF events are counted and binded with other events or executed when queue is empty. +// This prevents queue from filling with SOF events. +// Interrupt - SOF events are processed in interrupt. +// <0=> Normal queue +// <1=> Compress queue +// <2=> Interrupt + +#ifndef APP_USBD_CONFIG_SOF_HANDLING_MODE +#define APP_USBD_CONFIG_SOF_HANDLING_MODE 1 +#endif + +// + +// APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE - Provide a function that generates timestamps for logs based on the current SOF + + +// The function app_usbd_sof_timestamp_get will be implemented if the logger is enabled. +// Use it when initializing the logger. +// SOF processing will be always enabled when this configuration parameter is active. +// Notice that this option is configured outside of APP_USBD_CONFIG_LOG_ENABLED. +// This means that it will work even if the logging in this very module is disabled. + +#ifndef APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE +#define APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE 0 #endif -// APP_UART_ENABLED - app_uart - UART driver +// APP_USBD_CONFIG_LOG_ENABLED - Enable logging in the module //========================================================== -#ifndef APP_UART_ENABLED -#define APP_UART_ENABLED 0 +#ifndef APP_USBD_CONFIG_LOG_ENABLED +#define APP_USBD_CONFIG_LOG_ENABLED 0 #endif -// APP_UART_DRIVER_INSTANCE - UART instance used - -// <0=> 0 +// APP_USBD_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -#ifndef APP_UART_DRIVER_INSTANCE -#define APP_UART_DRIVER_INSTANCE 0 +#ifndef APP_USBD_CONFIG_LOG_LEVEL +#define APP_USBD_CONFIG_LOG_LEVEL 3 #endif -// - -// APP_USBD_CLASS_AUDIO_ENABLED - app_usbd_audio - USB AUDIO class - +// APP_USBD_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef APP_USBD_CLASS_AUDIO_ENABLED -#define APP_USBD_CLASS_AUDIO_ENABLED 0 +#ifndef APP_USBD_CONFIG_INFO_COLOR +#define APP_USBD_CONFIG_INFO_COLOR 0 #endif -// APP_USBD_CLASS_CDC_ACM_ENABLED - app_usbd_cdc_acm - USB CDC ACM class - +// APP_USBD_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef APP_USBD_CLASS_CDC_ACM_ENABLED -#define APP_USBD_CLASS_CDC_ACM_ENABLED 0 +#ifndef APP_USBD_CONFIG_DEBUG_COLOR +#define APP_USBD_CONFIG_DEBUG_COLOR 0 #endif -// APP_USBD_CLASS_HID_ENABLED - app_usbd_hid - USB HID class +// + +// +// APP_USBD_HID_ENABLED - app_usbd_hid - USB HID class + -#ifndef APP_USBD_CLASS_HID_ENABLED -#define APP_USBD_CLASS_HID_ENABLED 0 +#ifndef APP_USBD_HID_ENABLED +#define APP_USBD_HID_ENABLED 0 #endif // APP_USBD_HID_GENERIC_ENABLED - app_usbd_hid_generic - USB HID generic - + #ifndef APP_USBD_HID_GENERIC_ENABLED #define APP_USBD_HID_GENERIC_ENABLED 0 #endif // APP_USBD_HID_KBD_ENABLED - app_usbd_hid_kbd - USB HID keyboard - + #ifndef APP_USBD_HID_KBD_ENABLED #define APP_USBD_HID_KBD_ENABLED 0 #endif // APP_USBD_HID_MOUSE_ENABLED - app_usbd_hid_mouse - USB HID mouse - + #ifndef APP_USBD_HID_MOUSE_ENABLED #define APP_USBD_HID_MOUSE_ENABLED 0 #endif // APP_USBD_MSC_ENABLED - app_usbd_msc - USB MSC class - + #ifndef APP_USBD_MSC_ENABLED #define APP_USBD_MSC_ENABLED 0 #endif -// BUTTON_ENABLED - app_button - buttons handling module - - -#ifndef BUTTON_ENABLED -#define BUTTON_ENABLED 0 -#endif - // CRC16_ENABLED - crc16 - CRC16 calculation routines - + #ifndef CRC16_ENABLED #define CRC16_ENABLED 0 #endif // CRC32_ENABLED - crc32 - CRC32 calculation routines - + #ifndef CRC32_ENABLED #define CRC32_ENABLED 0 #endif // ECC_ENABLED - ecc - Elliptic Curve Cryptography Library - + #ifndef ECC_ENABLED #define ECC_ENABLED 0 @@ -3411,13 +6127,13 @@ // FDS_ENABLED - fds - Flash data storage module //========================================================== #ifndef FDS_ENABLED -#define FDS_ENABLED 1 +#define FDS_ENABLED 0 #endif // Pages - Virtual page settings // Configure the number of virtual pages to use and their size. //========================================================== -// FDS_VIRTUAL_PAGES - Number of virtual flash pages to use. +// FDS_VIRTUAL_PAGES - Number of virtual flash pages to use. // One of the virtual pages is reserved by the system for garbage collection. // Therefore, the minimum is two virtual pages: one page to store data and one page to be used by the system for garbage collection. // The total amount of flash memory that is used by FDS amounts to @ref FDS_VIRTUAL_PAGES * @ref FDS_VIRTUAL_PAGE_SIZE * 4 bytes. @@ -3427,19 +6143,19 @@ #endif // FDS_VIRTUAL_PAGE_SIZE - The size of a virtual flash page. - + // Expressed in number of 4-byte words. // By default, a virtual page is the same size as a physical page. // The size of a virtual page must be a multiple of the size of a physical page. -// <1024=> 1024 -// <2048=> 2048 +// <1024=> 1024 +// <2048=> 2048 #ifndef FDS_VIRTUAL_PAGE_SIZE #define FDS_VIRTUAL_PAGE_SIZE 1024 #endif -// +// //========================================================== // Backend - Backend configuration @@ -3447,31 +6163,31 @@ // Configure which nrf_fstorage backend is used by FDS to write to flash. //========================================================== // FDS_BACKEND - FDS flash backend. - + // NRF_FSTORAGE_SD uses the nrf_fstorage_sd backend implementation using the SoftDevice API. Use this if you have a SoftDevice present. // NRF_FSTORAGE_NVMC uses the nrf_fstorage_nvmc implementation. Use this setting if you don't use the SoftDevice. -// <1=> NRF_FSTORAGE_NVMC -// <2=> NRF_FSTORAGE_SD +// <1=> NRF_FSTORAGE_NVMC +// <2=> NRF_FSTORAGE_SD #ifndef FDS_BACKEND -#define FDS_BACKEND 1 +#define FDS_BACKEND 2 #endif -// +// //========================================================== // Queue - Queue settings //========================================================== -// FDS_OP_QUEUE_SIZE - Size of the internal queue. +// FDS_OP_QUEUE_SIZE - Size of the internal queue. // Increase this value if you frequently get synchronous FDS_ERR_NO_SPACE_IN_QUEUES errors. #ifndef FDS_OP_QUEUE_SIZE #define FDS_OP_QUEUE_SIZE 4 #endif -// +// //========================================================== // CRC - CRC functionality @@ -3487,12 +6203,12 @@ #define FDS_CRC_CHECK_ON_READ 0 #endif // FDS_CRC_CHECK_ON_WRITE - Perform a CRC check on newly written records. - + // Perform a CRC check on newly written records. // This setting can be used to make sure that the record data was not altered while being written to flash. -// <1=> Enabled -// <0=> Disabled +// <1=> Enabled +// <0=> Disabled #ifndef FDS_CRC_CHECK_ON_WRITE #define FDS_CRC_CHECK_ON_WRITE 0 @@ -3500,18 +6216,18 @@ // -// +// //========================================================== // Users - Number of users //========================================================== -// FDS_MAX_USERS - Maximum number of callbacks that can be registered. +// FDS_MAX_USERS - Maximum number of callbacks that can be registered. #ifndef FDS_MAX_USERS #define FDS_MAX_USERS 4 #endif -// +// //========================================================== // @@ -3522,7 +6238,7 @@ #define HARDFAULT_HANDLER_ENABLED 0 #endif // HARDFAULT_HANDLER_GDB_PSP_BACKTRACE - Bypass the GDB problem with multiple stack pointers backtrace - + // There is a known bug in GDB which causes it to incorrectly backtrace the code // when multiple stack pointers are used (main and process stack pointers). @@ -3543,17 +6259,17 @@ #ifndef HCI_MEM_POOL_ENABLED #define HCI_MEM_POOL_ENABLED 0 #endif -// HCI_TX_BUF_SIZE - TX buffer size in bytes. +// HCI_TX_BUF_SIZE - TX buffer size in bytes. #ifndef HCI_TX_BUF_SIZE #define HCI_TX_BUF_SIZE 600 #endif -// HCI_RX_BUF_SIZE - RX buffer size in bytes. +// HCI_RX_BUF_SIZE - RX buffer size in bytes. #ifndef HCI_RX_BUF_SIZE #define HCI_RX_BUF_SIZE 600 #endif -// HCI_RX_BUF_QUEUE_SIZE - RX buffer queue size. +// HCI_RX_BUF_QUEUE_SIZE - RX buffer queue size. #ifndef HCI_RX_BUF_QUEUE_SIZE #define HCI_RX_BUF_QUEUE_SIZE 4 #endif @@ -3566,55 +6282,55 @@ #define HCI_SLIP_ENABLED 0 #endif // HCI_UART_BAUDRATE - Default Baudrate - -// <323584=> 1200 baud -// <643072=> 2400 baud -// <1290240=> 4800 baud -// <2576384=> 9600 baud -// <3862528=> 14400 baud -// <5152768=> 19200 baud -// <7716864=> 28800 baud -// <10289152=> 38400 baud -// <15400960=> 57600 baud -// <20615168=> 76800 baud -// <30801920=> 115200 baud -// <61865984=> 230400 baud -// <67108864=> 250000 baud -// <121634816=> 460800 baud -// <251658240=> 921600 baud -// <268435456=> 1000000 baud + +// <323584=> 1200 baud +// <643072=> 2400 baud +// <1290240=> 4800 baud +// <2576384=> 9600 baud +// <3862528=> 14400 baud +// <5152768=> 19200 baud +// <7716864=> 28800 baud +// <10289152=> 38400 baud +// <15400960=> 57600 baud +// <20615168=> 76800 baud +// <30801920=> 115200 baud +// <61865984=> 230400 baud +// <67108864=> 250000 baud +// <121634816=> 460800 baud +// <251658240=> 921600 baud +// <268435456=> 1000000 baud #ifndef HCI_UART_BAUDRATE #define HCI_UART_BAUDRATE 30801920 #endif // HCI_UART_FLOW_CONTROL - Hardware Flow Control - -// <0=> Disabled -// <1=> Enabled + +// <0=> Disabled +// <1=> Enabled #ifndef HCI_UART_FLOW_CONTROL #define HCI_UART_FLOW_CONTROL 0 #endif -// HCI_UART_RX_PIN - UART RX pin +// HCI_UART_RX_PIN - UART RX pin #ifndef HCI_UART_RX_PIN -#define HCI_UART_RX_PIN 8 +#define HCI_UART_RX_PIN 31 #endif -// HCI_UART_TX_PIN - UART TX pin +// HCI_UART_TX_PIN - UART TX pin #ifndef HCI_UART_TX_PIN -#define HCI_UART_TX_PIN 6 +#define HCI_UART_TX_PIN 31 #endif -// HCI_UART_RTS_PIN - UART RTS pin +// HCI_UART_RTS_PIN - UART RTS pin #ifndef HCI_UART_RTS_PIN -#define HCI_UART_RTS_PIN 5 +#define HCI_UART_RTS_PIN 31 #endif -// HCI_UART_CTS_PIN - UART CTS pin +// HCI_UART_CTS_PIN - UART CTS pin #ifndef HCI_UART_CTS_PIN -#define HCI_UART_CTS_PIN 7 +#define HCI_UART_CTS_PIN 31 #endif // @@ -3624,7 +6340,7 @@ #ifndef HCI_TRANSPORT_ENABLED #define HCI_TRANSPORT_ENABLED 0 #endif -// HCI_MAX_PACKET_SIZE_IN_BITS - Maximum size of a single application packet in bits. +// HCI_MAX_PACKET_SIZE_IN_BITS - Maximum size of a single application packet in bits. #ifndef HCI_MAX_PACKET_SIZE_IN_BITS #define HCI_MAX_PACKET_SIZE_IN_BITS 8000 #endif @@ -3632,14 +6348,14 @@ // // LED_SOFTBLINK_ENABLED - led_softblink - led_softblink module - + #ifndef LED_SOFTBLINK_ENABLED #define LED_SOFTBLINK_ENABLED 0 #endif // LOW_POWER_PWM_ENABLED - low_power_pwm - low_power_pwm module - + #ifndef LOW_POWER_PWM_ENABLED #define LOW_POWER_PWM_ENABLED 0 @@ -3650,113 +6366,163 @@ #ifndef MEM_MANAGER_ENABLED #define MEM_MANAGER_ENABLED 0 #endif -// MEMORY_MANAGER_SMALL_BLOCK_COUNT - Size of each memory blocks identified as 'small' block. <0-255> +// MEMORY_MANAGER_SMALL_BLOCK_COUNT - Size of each memory blocks identified as 'small' block. <0-255> #ifndef MEMORY_MANAGER_SMALL_BLOCK_COUNT #define MEMORY_MANAGER_SMALL_BLOCK_COUNT 1 #endif -// MEMORY_MANAGER_SMALL_BLOCK_SIZE - Size of each memory blocks identified as 'small' block. +// MEMORY_MANAGER_SMALL_BLOCK_SIZE - Size of each memory blocks identified as 'small' block. // Size of each memory blocks identified as 'small' block. Memory block are recommended to be word-sized. #ifndef MEMORY_MANAGER_SMALL_BLOCK_SIZE #define MEMORY_MANAGER_SMALL_BLOCK_SIZE 32 #endif -// MEMORY_MANAGER_MEDIUM_BLOCK_COUNT - Size of each memory blocks identified as 'medium' block. <0-255> +// MEMORY_MANAGER_MEDIUM_BLOCK_COUNT - Size of each memory blocks identified as 'medium' block. <0-255> #ifndef MEMORY_MANAGER_MEDIUM_BLOCK_COUNT #define MEMORY_MANAGER_MEDIUM_BLOCK_COUNT 0 #endif -// MEMORY_MANAGER_MEDIUM_BLOCK_SIZE - Size of each memory blocks identified as 'medium' block. +// MEMORY_MANAGER_MEDIUM_BLOCK_SIZE - Size of each memory blocks identified as 'medium' block. // Size of each memory blocks identified as 'medium' block. Memory block are recommended to be word-sized. #ifndef MEMORY_MANAGER_MEDIUM_BLOCK_SIZE #define MEMORY_MANAGER_MEDIUM_BLOCK_SIZE 256 #endif -// MEMORY_MANAGER_LARGE_BLOCK_COUNT - Size of each memory blocks identified as 'large' block. <0-255> +// MEMORY_MANAGER_LARGE_BLOCK_COUNT - Size of each memory blocks identified as 'large' block. <0-255> #ifndef MEMORY_MANAGER_LARGE_BLOCK_COUNT #define MEMORY_MANAGER_LARGE_BLOCK_COUNT 0 #endif -// MEMORY_MANAGER_LARGE_BLOCK_SIZE - Size of each memory blocks identified as 'large' block. +// MEMORY_MANAGER_LARGE_BLOCK_SIZE - Size of each memory blocks identified as 'large' block. // Size of each memory blocks identified as 'large' block. Memory block are recommended to be word-sized. #ifndef MEMORY_MANAGER_LARGE_BLOCK_SIZE #define MEMORY_MANAGER_LARGE_BLOCK_SIZE 256 #endif -// MEMORY_MANAGER_XLARGE_BLOCK_COUNT - Size of each memory blocks identified as 'extra large' block. <0-255> +// MEMORY_MANAGER_XLARGE_BLOCK_COUNT - Size of each memory blocks identified as 'extra large' block. <0-255> #ifndef MEMORY_MANAGER_XLARGE_BLOCK_COUNT #define MEMORY_MANAGER_XLARGE_BLOCK_COUNT 0 #endif -// MEMORY_MANAGER_XLARGE_BLOCK_SIZE - Size of each memory blocks identified as 'extra large' block. +// MEMORY_MANAGER_XLARGE_BLOCK_SIZE - Size of each memory blocks identified as 'extra large' block. // Size of each memory blocks identified as 'extra large' block. Memory block are recommended to be word-sized. #ifndef MEMORY_MANAGER_XLARGE_BLOCK_SIZE #define MEMORY_MANAGER_XLARGE_BLOCK_SIZE 1320 #endif -// MEMORY_MANAGER_XXLARGE_BLOCK_COUNT - Size of each memory blocks identified as 'extra extra large' block. <0-255> +// MEMORY_MANAGER_XXLARGE_BLOCK_COUNT - Size of each memory blocks identified as 'extra extra large' block. <0-255> #ifndef MEMORY_MANAGER_XXLARGE_BLOCK_COUNT #define MEMORY_MANAGER_XXLARGE_BLOCK_COUNT 0 #endif -// MEMORY_MANAGER_XXLARGE_BLOCK_SIZE - Size of each memory blocks identified as 'extra extra large' block. +// MEMORY_MANAGER_XXLARGE_BLOCK_SIZE - Size of each memory blocks identified as 'extra extra large' block. // Size of each memory blocks identified as 'extra extra large' block. Memory block are recommended to be word-sized. #ifndef MEMORY_MANAGER_XXLARGE_BLOCK_SIZE #define MEMORY_MANAGER_XXLARGE_BLOCK_SIZE 3444 #endif -// MEMORY_MANAGER_XSMALL_BLOCK_COUNT - Size of each memory blocks identified as 'extra small' block. <0-255> +// MEMORY_MANAGER_XSMALL_BLOCK_COUNT - Size of each memory blocks identified as 'extra small' block. <0-255> #ifndef MEMORY_MANAGER_XSMALL_BLOCK_COUNT #define MEMORY_MANAGER_XSMALL_BLOCK_COUNT 0 #endif -// MEMORY_MANAGER_XSMALL_BLOCK_SIZE - Size of each memory blocks identified as 'extra small' block. +// MEMORY_MANAGER_XSMALL_BLOCK_SIZE - Size of each memory blocks identified as 'extra small' block. // Size of each memory blocks identified as 'extra large' block. Memory block are recommended to be word-sized. #ifndef MEMORY_MANAGER_XSMALL_BLOCK_SIZE #define MEMORY_MANAGER_XSMALL_BLOCK_SIZE 64 #endif -// MEMORY_MANAGER_XXSMALL_BLOCK_COUNT - Size of each memory blocks identified as 'extra extra small' block. <0-255> +// MEMORY_MANAGER_XXSMALL_BLOCK_COUNT - Size of each memory blocks identified as 'extra extra small' block. <0-255> #ifndef MEMORY_MANAGER_XXSMALL_BLOCK_COUNT #define MEMORY_MANAGER_XXSMALL_BLOCK_COUNT 0 #endif -// MEMORY_MANAGER_XXSMALL_BLOCK_SIZE - Size of each memory blocks identified as 'extra extra small' block. +// MEMORY_MANAGER_XXSMALL_BLOCK_SIZE - Size of each memory blocks identified as 'extra extra small' block. // Size of each memory blocks identified as 'extra extra small' block. Memory block are recommended to be word-sized. #ifndef MEMORY_MANAGER_XXSMALL_BLOCK_SIZE #define MEMORY_MANAGER_XXSMALL_BLOCK_SIZE 32 #endif -// MEM_MANAGER_DISABLE_API_PARAM_CHECK - Disable API parameter checks in the module. +// MEM_MANAGER_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef MEM_MANAGER_CONFIG_LOG_ENABLED +#define MEM_MANAGER_CONFIG_LOG_ENABLED 0 +#endif +// MEM_MANAGER_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef MEM_MANAGER_CONFIG_LOG_LEVEL +#define MEM_MANAGER_CONFIG_LOG_LEVEL 3 +#endif + +// MEM_MANAGER_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef MEM_MANAGER_CONFIG_INFO_COLOR +#define MEM_MANAGER_CONFIG_INFO_COLOR 0 +#endif + +// MEM_MANAGER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef MEM_MANAGER_CONFIG_DEBUG_COLOR +#define MEM_MANAGER_CONFIG_DEBUG_COLOR 0 +#endif +// + +// MEM_MANAGER_DISABLE_API_PARAM_CHECK - Disable API parameter checks in the module. + #ifndef MEM_MANAGER_DISABLE_API_PARAM_CHECK #define MEM_MANAGER_DISABLE_API_PARAM_CHECK 0 #endif // - // NRF_BALLOC_ENABLED - nrf_balloc - Block allocator module //========================================================== #ifndef NRF_BALLOC_ENABLED @@ -3767,14 +6533,14 @@ #ifndef NRF_BALLOC_CONFIG_DEBUG_ENABLED #define NRF_BALLOC_CONFIG_DEBUG_ENABLED 0 #endif -// NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS - Number of words used as head guard. <0-255> +// NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS - Number of words used as head guard. <0-255> #ifndef NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS #define NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS 1 #endif -// NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS - Number of words used as tail guard. <0-255> +// NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS - Number of words used as tail guard. <0-255> #ifndef NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS @@ -3782,26 +6548,33 @@ #endif // NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED - Enables basic checks in this module. - + #ifndef NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED #define NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED 0 #endif // NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED - Enables double memory free check in this module. - + #ifndef NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED #define NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED 0 #endif // NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED - Enables free memory corruption check in this module. - + #ifndef NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED #define NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED 0 #endif +// NRF_BALLOC_CLI_CMDS - Enable CLI commands specific to the module + + +#ifndef NRF_BALLOC_CLI_CMDS +#define NRF_BALLOC_CLI_CMDS 0 +#endif + // // @@ -3811,32 +6584,32 @@ #ifndef NRF_CSENSE_ENABLED #define NRF_CSENSE_ENABLED 0 #endif -// NRF_CSENSE_PAD_HYSTERESIS - Minimum value of change required to determine that a pad was touched. +// NRF_CSENSE_PAD_HYSTERESIS - Minimum value of change required to determine that a pad was touched. #ifndef NRF_CSENSE_PAD_HYSTERESIS #define NRF_CSENSE_PAD_HYSTERESIS 15 #endif -// NRF_CSENSE_PAD_DEVIATION - Minimum value measured on a pad required to take it into account while calculating the step. +// NRF_CSENSE_PAD_DEVIATION - Minimum value measured on a pad required to take it into account while calculating the step. #ifndef NRF_CSENSE_PAD_DEVIATION #define NRF_CSENSE_PAD_DEVIATION 70 #endif -// NRF_CSENSE_MIN_PAD_VALUE - Minimum normalized value on a pad required to take its value into account. +// NRF_CSENSE_MIN_PAD_VALUE - Minimum normalized value on a pad required to take its value into account. #ifndef NRF_CSENSE_MIN_PAD_VALUE #define NRF_CSENSE_MIN_PAD_VALUE 20 #endif -// NRF_CSENSE_MAX_PADS_NUMBER - Maximum number of pads used for one instance. +// NRF_CSENSE_MAX_PADS_NUMBER - Maximum number of pads used for one instance. #ifndef NRF_CSENSE_MAX_PADS_NUMBER #define NRF_CSENSE_MAX_PADS_NUMBER 20 #endif -// NRF_CSENSE_MAX_VALUE - Maximum normalized value obtained from measurement. +// NRF_CSENSE_MAX_VALUE - Maximum normalized value obtained from measurement. #ifndef NRF_CSENSE_MAX_VALUE #define NRF_CSENSE_MAX_VALUE 1000 #endif -// NRF_CSENSE_OUTPUT_PIN - Output pin used by the low-level module. +// NRF_CSENSE_OUTPUT_PIN - Output pin used by the low-level module. // This is used when capacitive sensor does not use COMP. #ifndef NRF_CSENSE_OUTPUT_PIN @@ -3857,17 +6630,17 @@ #ifndef USE_COMP #define USE_COMP 0 #endif -// TIMER0_FOR_CSENSE - First TIMER instance used by the driver (not used on nRF51). +// TIMER0_FOR_CSENSE - First TIMER instance used by the driver (not used on nRF51). #ifndef TIMER0_FOR_CSENSE #define TIMER0_FOR_CSENSE 1 #endif -// TIMER1_FOR_CSENSE - Second TIMER instance used by the driver (not used on nRF51). +// TIMER1_FOR_CSENSE - Second TIMER instance used by the driver (not used on nRF51). #ifndef TIMER1_FOR_CSENSE #define TIMER1_FOR_CSENSE 2 #endif -// MEASUREMENT_PERIOD - Single measurement period. +// MEASUREMENT_PERIOD - Single measurement period. // Time of a single measurement can be calculated as // T = (1/2)*MEASUREMENT_PERIOD*(1/f_OSC) where f_OSC = I_SOURCE / (2C*(VUP-VDOWN) ). // I_SOURCE, VUP, and VDOWN are values used to initialize COMP and C is the capacitance of the used pad. @@ -3881,29 +6654,47 @@ // // NRF_FPRINTF_ENABLED - nrf_fprintf - fprintf function. - + #ifndef NRF_FPRINTF_ENABLED -#define NRF_FPRINTF_ENABLED 0 +#define NRF_FPRINTF_ENABLED 1 #endif // NRF_FSTORAGE_ENABLED - nrf_fstorage - Flash abstraction library //========================================================== #ifndef NRF_FSTORAGE_ENABLED -#define NRF_FSTORAGE_ENABLED 1 +#define NRF_FSTORAGE_ENABLED 0 +#endif +// nrf_fstorage - Common settings + +// Common settings to all fstorage implementations +//========================================================== +// NRF_FSTORAGE_PARAM_CHECK_DISABLED - Disable user input validation + + +// If selected, use ASSERT to validate user input. +// This effectively removes user input validation in production code. +// Recommended setting: OFF, only enable this setting if size is a major concern. + +#ifndef NRF_FSTORAGE_PARAM_CHECK_DISABLED +#define NRF_FSTORAGE_PARAM_CHECK_DISABLED 0 #endif -// nrf_fstorage_sd - Implementation using the SoftDevice. -// Configuration options for the fstorage implementation using the SoftDevice. +// //========================================================== -// NRF_FSTORAGE_SD_QUEUE_SIZE - Size of the internal queue of operations. + +// nrf_fstorage_sd - Implementation using the SoftDevice + +// Configuration options for the fstorage implementation using the SoftDevice +//========================================================== +// NRF_FSTORAGE_SD_QUEUE_SIZE - Size of the internal queue of operations // Increase this value if API calls frequently return the error @ref NRF_ERROR_NO_MEM. #ifndef NRF_FSTORAGE_SD_QUEUE_SIZE #define NRF_FSTORAGE_SD_QUEUE_SIZE 4 #endif -// NRF_FSTORAGE_SD_MAX_RETRIES - Maximum number of attempts at executing an operation when the SoftDevice is busy. +// NRF_FSTORAGE_SD_MAX_RETRIES - Maximum number of attempts at executing an operation when the SoftDevice is busy // Increase this value if events frequently return the @ref NRF_ERROR_TIMEOUT error. // The SoftDevice might fail to schedule flash access due to high BLE activity. @@ -3911,7 +6702,7 @@ #define NRF_FSTORAGE_SD_MAX_RETRIES 8 #endif -// NRF_FSTORAGE_SD_MAX_WRITE_SIZE - Maximum number of bytes to be written to flash in a single operation. +// NRF_FSTORAGE_SD_MAX_WRITE_SIZE - Maximum number of bytes to be written to flash in a single operation // This value must be a multiple of four. // Lowering this value can increase the chances of the SoftDevice being able to execute flash operations in between radio activity. // This value is bound by the maximum number of bytes that can be written to flash in a single call to @ref sd_flash_write. @@ -3921,16 +6712,23 @@ #define NRF_FSTORAGE_SD_MAX_WRITE_SIZE 4096 #endif -// +// //========================================================== // -// NRF_MEMOBJ_ENABLED - nrf_memobj - Linked memory allocator module +// NRF_GFX_ENABLED - nrf_gfx - GFX module + +#ifndef NRF_GFX_ENABLED +#define NRF_GFX_ENABLED 0 +#endif + +// NRF_MEMOBJ_ENABLED - nrf_memobj - Linked memory allocator module + #ifndef NRF_MEMOBJ_ENABLED -#define NRF_MEMOBJ_ENABLED 0 +#define NRF_MEMOBJ_ENABLED 1 #endif // NRF_PWR_MGMT_ENABLED - nrf_pwr_mgmt - Power management module @@ -3946,56 +6744,56 @@ #define NRF_PWR_MGMT_CONFIG_DEBUG_PIN_ENABLED 0 #endif // NRF_PWR_MGMT_SLEEP_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef NRF_PWR_MGMT_SLEEP_DEBUG_PIN #define NRF_PWR_MGMT_SLEEP_DEBUG_PIN 31 @@ -4004,7 +6802,7 @@ // // NRF_PWR_MGMT_CONFIG_CPU_USAGE_MONITOR_ENABLED - Enables CPU usage monitor. - + // Module will trace percentage of CPU usage in one second intervals. @@ -4017,7 +6815,7 @@ #ifndef NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_ENABLED #define NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_ENABLED 0 #endif -// NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_S - Standby timeout (in seconds). +// NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_S - Standby timeout (in seconds). // Shutdown procedure will begin no earlier than after this number of seconds. #ifndef NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_S @@ -4027,27 +6825,27 @@ // // NRF_PWR_MGMT_CONFIG_FPU_SUPPORT_ENABLED - Enables FPU event cleaning. - + #ifndef NRF_PWR_MGMT_CONFIG_FPU_SUPPORT_ENABLED -#define NRF_PWR_MGMT_CONFIG_FPU_SUPPORT_ENABLED 1 +#define NRF_PWR_MGMT_CONFIG_FPU_SUPPORT_ENABLED 0 #endif // NRF_PWR_MGMT_CONFIG_AUTO_SHUTDOWN_RETRY - Blocked shutdown procedure will be retried every second. - + #ifndef NRF_PWR_MGMT_CONFIG_AUTO_SHUTDOWN_RETRY #define NRF_PWR_MGMT_CONFIG_AUTO_SHUTDOWN_RETRY 0 #endif // NRF_PWR_MGMT_CONFIG_USE_SCHEDULER - Module will use @ref app_scheduler. - + #ifndef NRF_PWR_MGMT_CONFIG_USE_SCHEDULER #define NRF_PWR_MGMT_CONFIG_USE_SCHEDULER 0 #endif -// NRF_PWR_MGMT_CONFIG_HANDLER_PRIORITY_COUNT - The number of priorities for module handlers. +// NRF_PWR_MGMT_CONFIG_HANDLER_PRIORITY_COUNT - The number of priorities for module handlers. // The number of stages of the shutdown process. #ifndef NRF_PWR_MGMT_CONFIG_HANDLER_PRIORITY_COUNT @@ -4056,29 +6854,57 @@ // -// NRF_QUEUE_ENABLED - nrf_queue - Queue module - - +// NRF_QUEUE_ENABLED - nrf_queue - Queue module +//========================================================== #ifndef NRF_QUEUE_ENABLED -#define NRF_QUEUE_ENABLED 1 +#define NRF_QUEUE_ENABLED 0 #endif +// NRF_QUEUE_CLI_CMDS - Enable CLI commands specific to the module + -// NRF_SECTION_ITER_ENABLED - nrf_section_iter - Section iterator +#ifndef NRF_QUEUE_CLI_CMDS +#define NRF_QUEUE_CLI_CMDS 0 +#endif + +// +// NRF_SECTION_ITER_ENABLED - nrf_section_iter - Section iterator + #ifndef NRF_SECTION_ITER_ENABLED #define NRF_SECTION_ITER_ENABLED 1 #endif -// NRF_STRERROR_ENABLED - nrf_strerror - Library for converting error code to string. +// NRF_SORTLIST_ENABLED - nrf_sortlist - Sorted list + + +#ifndef NRF_SORTLIST_ENABLED +#define NRF_SORTLIST_ENABLED 0 +#endif + +// NRF_SPI_MNGR_ENABLED - nrf_spi_mngr - SPI transaction manager + +#ifndef NRF_SPI_MNGR_ENABLED +#define NRF_SPI_MNGR_ENABLED 0 +#endif + +// NRF_STRERROR_ENABLED - nrf_strerror - Library for converting error code to string. + #ifndef NRF_STRERROR_ENABLED -#define NRF_STRERROR_ENABLED 0 +#define NRF_STRERROR_ENABLED 1 #endif -// SLIP_ENABLED - slip - SLIP encoding and decoding +// NRF_TWI_MNGR_ENABLED - nrf_twi_mngr - TWI transaction manager + + +#ifndef NRF_TWI_MNGR_ENABLED +#define NRF_TWI_MNGR_ENABLED 0 +#endif +// SLIP_ENABLED - slip - SLIP encoding and decoding + #ifndef SLIP_ENABLED #define SLIP_ENABLED 0 @@ -4090,37 +6916,37 @@ #define TASK_MANAGER_ENABLED 0 #endif // TASK_MANAGER_CLI_CMDS - Enable CLI commands specific to the module - + #ifndef TASK_MANAGER_CLI_CMDS -#define TASK_MANAGER_CLI_CMDS 1 +#define TASK_MANAGER_CLI_CMDS 0 #endif -// TASK_MANAGER_CONFIG_MAX_TASKS - Maximum number of tasks which can be created +// TASK_MANAGER_CONFIG_MAX_TASKS - Maximum number of tasks which can be created #ifndef TASK_MANAGER_CONFIG_MAX_TASKS #define TASK_MANAGER_CONFIG_MAX_TASKS 2 #endif -// TASK_MANAGER_CONFIG_STACK_SIZE - Stack size for every task (power of 2) +// TASK_MANAGER_CONFIG_STACK_SIZE - Stack size for every task (power of 2) #ifndef TASK_MANAGER_CONFIG_STACK_SIZE #define TASK_MANAGER_CONFIG_STACK_SIZE 1024 #endif // TASK_MANAGER_CONFIG_STACK_PROFILER_ENABLED - Enable stack profiling. - + #ifndef TASK_MANAGER_CONFIG_STACK_PROFILER_ENABLED #define TASK_MANAGER_CONFIG_STACK_PROFILER_ENABLED 1 #endif // TASK_MANAGER_CONFIG_STACK_GUARD - Configures stack guard. - -// <0=> Disabled -// <4=> 32 bytes -// <5=> 64 bytes -// <6=> 128 bytes -// <7=> 256 bytes -// <8=> 512 bytes + +// <0=> Disabled +// <4=> 32 bytes +// <5=> 64 bytes +// <6=> 128 bytes +// <7=> 256 bytes +// <8=> 512 bytes #ifndef TASK_MANAGER_CONFIG_STACK_GUARD #define TASK_MANAGER_CONFIG_STACK_GUARD 7 @@ -4128,34 +6954,68 @@ // -// nrf_cli - Command line interface. +// app_button - buttons handling module + +//========================================================== +// BUTTON_ENABLED - Enables Button module + + +#ifndef BUTTON_ENABLED +#define BUTTON_ENABLED 0 +#endif + +// BUTTON_HIGH_ACCURACY_ENABLED - Enables GPIOTE high accuracy for buttons + +#ifndef BUTTON_HIGH_ACCURACY_ENABLED +#define BUTTON_HIGH_ACCURACY_ENABLED 0 +#endif + +// //========================================================== -// NRF_CLI_ENABLED - Enable/disable CLI module. +// nrf_cli - Command line interface + +//========================================================== +// NRF_CLI_ENABLED - Enable/disable the CLI module. + #ifndef NRF_CLI_ENABLED #define NRF_CLI_ENABLED 0 #endif -// NRF_CLI_ARGC_MAX - Maximum number of parameters passed to command handler. +// NRF_CLI_ARGC_MAX - Maximum number of parameters passed to the command handler. #ifndef NRF_CLI_ARGC_MAX #define NRF_CLI_ARGC_MAX 12 #endif -// NRF_CLI_BUILD_IN_CMDS_ENABLED - CLI build in commands. - +// NRF_CLI_BUILD_IN_CMDS_ENABLED - CLI built-in commands. + #ifndef NRF_CLI_BUILD_IN_CMDS_ENABLED #define NRF_CLI_BUILD_IN_CMDS_ENABLED 1 #endif -// NRF_CLI_CMD_BUFF_SIZE - Maximum buffer size for single command. +// NRF_CLI_CMD_BUFF_SIZE - Maximum buffer size for a single command. #ifndef NRF_CLI_CMD_BUFF_SIZE #define NRF_CLI_CMD_BUFF_SIZE 128 #endif -// NRF_CLI_PRINTF_BUFF_SIZE - Maximum print buffer size. +// NRF_CLI_ECHO_STATUS - CLI echo status. If set, echo is ON. + + +#ifndef NRF_CLI_ECHO_STATUS +#define NRF_CLI_ECHO_STATUS 1 +#endif + +// NRF_CLI_WILDCARD_ENABLED - Enable wildcard functionality for CLI commands. + + +#ifndef NRF_CLI_WILDCARD_ENABLED +#define NRF_CLI_WILDCARD_ENABLED 0 +#endif + +// NRF_CLI_PRINTF_BUFF_SIZE - Maximum print buffer size. #ifndef NRF_CLI_PRINTF_BUFF_SIZE #define NRF_CLI_PRINTF_BUFF_SIZE 23 #endif @@ -4165,12 +7025,12 @@ #ifndef NRF_CLI_HISTORY_ENABLED #define NRF_CLI_HISTORY_ENABLED 1 #endif -// NRF_CLI_HISTORY_ELEMENT_SIZE - Size of one memory object reserved for CLI history +// NRF_CLI_HISTORY_ELEMENT_SIZE - Size of one memory object reserved for CLI history. #ifndef NRF_CLI_HISTORY_ELEMENT_SIZE #define NRF_CLI_HISTORY_ELEMENT_SIZE 32 #endif -// NRF_CLI_HISTORY_ELEMENT_COUNT - Number of history memory objects +// NRF_CLI_HISTORY_ELEMENT_COUNT - Number of history memory objects. #ifndef NRF_CLI_HISTORY_ELEMENT_COUNT #define NRF_CLI_HISTORY_ELEMENT_COUNT 8 #endif @@ -4178,121 +7038,54 @@ // // NRF_CLI_VT100_COLORS_ENABLED - CLI VT100 colors. - + #ifndef NRF_CLI_VT100_COLORS_ENABLED #define NRF_CLI_VT100_COLORS_ENABLED 1 #endif -// NRF_CLI_LOG_BACKEND - Enable logger backend interface. +// NRF_CLI_STATISTICS_ENABLED - Enable CLI statistics. + + +#ifndef NRF_CLI_STATISTICS_ENABLED +#define NRF_CLI_STATISTICS_ENABLED 1 +#endif +// NRF_CLI_LOG_BACKEND - Enable logger backend interface. + #ifndef NRF_CLI_LOG_BACKEND #define NRF_CLI_LOG_BACKEND 1 #endif // NRF_CLI_USES_TASK_MANAGER_ENABLED - Enable CLI to use task_manager - + #ifndef NRF_CLI_USES_TASK_MANAGER_ENABLED #define NRF_CLI_USES_TASK_MANAGER_ENABLED 0 #endif -// -//========================================================== - -// nrf_cli_rtt - RTT command line interface transport. - -//========================================================== -// NRF_CLI_RTT_ENABLED - Enable/disable CLI RTT module. - - -#ifndef NRF_CLI_RTT_ENABLED -#define NRF_CLI_RTT_ENABLED 0 -#endif - -// NRF_CLI_RTT_TERMINAL_ID - RTT terminal ID for CLI. -#ifndef NRF_CLI_RTT_TERMINAL_ID -#define NRF_CLI_RTT_TERMINAL_ID 0 -#endif - -// -//========================================================== - -// +// //========================================================== -// nRF_Log - +// //========================================================== -// NRF_LOG_BACKEND_RTT_ENABLED - nrf_log_backend_rtt - Log RTT backend -//========================================================== -#ifndef NRF_LOG_BACKEND_RTT_ENABLED -#define NRF_LOG_BACKEND_RTT_ENABLED 0 -#endif -// NRF_LOG_BACKEND_RTT_TEMP_BUFFER_SIZE - Size of buffer for partially processed strings. -// Size of the buffer is a trade-off between RAM usage and processing. -// if buffer is smaller then strings will often be fragmented. -// It is recommended to use size which will fit typical log and only the -// longer one will be fragmented. -#ifndef NRF_LOG_BACKEND_RTT_TEMP_BUFFER_SIZE -#define NRF_LOG_BACKEND_RTT_TEMP_BUFFER_SIZE 64 -#endif - -// +// nRF_Log -// NRF_LOG_BACKEND_UART_ENABLED - nrf_log_backend_uart - Log UART backend //========================================================== -#ifndef NRF_LOG_BACKEND_UART_ENABLED -#define NRF_LOG_BACKEND_UART_ENABLED 0 -#endif -// NRF_LOG_BACKEND_UART_TX_PIN - UART TX pin -#ifndef NRF_LOG_BACKEND_UART_TX_PIN -#define NRF_LOG_BACKEND_UART_TX_PIN 6 -#endif - -// NRF_LOG_BACKEND_UART_BAUDRATE - Default Baudrate - -// <323584=> 1200 baud -// <643072=> 2400 baud -// <1290240=> 4800 baud -// <2576384=> 9600 baud -// <3862528=> 14400 baud -// <5152768=> 19200 baud -// <7716864=> 28800 baud -// <10289152=> 38400 baud -// <15400960=> 57600 baud -// <20615168=> 76800 baud -// <30801920=> 115200 baud -// <61865984=> 230400 baud -// <67108864=> 250000 baud -// <121634816=> 460800 baud -// <251658240=> 921600 baud -// <268435456=> 1000000 baud - -#ifndef NRF_LOG_BACKEND_UART_BAUDRATE -#define NRF_LOG_BACKEND_UART_BAUDRATE 30801920 -#endif - -// NRF_LOG_BACKEND_UART_TEMP_BUFFER_SIZE - Size of buffer for partially processed strings. -// Size of the buffer is a trade-off between RAM usage and processing. -// if buffer is smaller then strings will often be fragmented. -// It is recommended to use size which will fit typical log and only the -// longer one will be fragmented. +// NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED - nrf_log_str_formatter - Log string formatter + -#ifndef NRF_LOG_BACKEND_UART_TEMP_BUFFER_SIZE -#define NRF_LOG_BACKEND_UART_TEMP_BUFFER_SIZE 64 +#ifndef NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED +#define NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED 1 #endif -// - -// nrf_log - Logging +// nrf_log - Logger //========================================================== // NRF_LOG_ENABLED - Logging module for nRF5 SDK //========================================================== - #ifndef NRF_LOG_ENABLED #define NRF_LOG_ENABLED 0 #endif @@ -4302,69 +7095,69 @@ #define NRF_LOG_USES_COLORS 0 #endif // NRF_LOG_COLOR_DEFAULT - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_LOG_COLOR_DEFAULT #define NRF_LOG_COLOR_DEFAULT 0 #endif // NRF_LOG_ERROR_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_LOG_ERROR_COLOR -#define NRF_LOG_ERROR_COLOR 0 +#define NRF_LOG_ERROR_COLOR 2 #endif // NRF_LOG_WARNING_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_LOG_WARNING_COLOR -#define NRF_LOG_WARNING_COLOR 0 +#define NRF_LOG_WARNING_COLOR 4 #endif // // NRF_LOG_DEFAULT_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NRF_LOG_DEFAULT_LEVEL #define NRF_LOG_DEFAULT_LEVEL 3 #endif // NRF_LOG_DEFERRED - Enable deffered logger. - + // Log data is buffered and can be processed in idle. @@ -4373,60 +7166,65 @@ #endif // NRF_LOG_BUFSIZE - Size of the buffer for storing logs (in bytes). - + // Must be power of 2 and multiple of 4. // If NRF_LOG_DEFERRED = 0 then buffer size can be reduced to minimum. -// <128=> 128 -// <256=> 256 -// <512=> 512 -// <1024=> 1024 -// <2048=> 2048 -// <4096=> 4096 -// <8192=> 8192 -// <16384=> 16384 +// <128=> 128 +// <256=> 256 +// <512=> 512 +// <1024=> 1024 +// <2048=> 2048 +// <4096=> 4096 +// <8192=> 8192 +// <16384=> 16384 #ifndef NRF_LOG_BUFSIZE #define NRF_LOG_BUFSIZE 1024 #endif // NRF_LOG_ALLOW_OVERFLOW - Configures behavior when circular buffer is full. + - -// If set then oldest logs are overwritten. Otherwise a +// If set then oldest logs are overwritten. Otherwise a // marker is injected informing about overflow. #ifndef NRF_LOG_ALLOW_OVERFLOW #define NRF_LOG_ALLOW_OVERFLOW 1 #endif -// NRF_LOG_USES_TIMESTAMP - Enable timestamping - +// NRF_LOG_USES_TIMESTAMP - Enable timestamping // Function for getting the timestamp is provided by the user - +//========================================================== #ifndef NRF_LOG_USES_TIMESTAMP #define NRF_LOG_USES_TIMESTAMP 0 #endif +// NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY - Default frequency of the timestamp (in Hz) +#ifndef NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY +#define NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY 32768 +#endif -// NRF_LOG_FILTERS_ENABLED - Enable dynamic filtering of logs. +// +// NRF_LOG_FILTERS_ENABLED - Enable dynamic filtering of logs. + #ifndef NRF_LOG_FILTERS_ENABLED -#define NRF_LOG_FILTERS_ENABLED 1 +#define NRF_LOG_FILTERS_ENABLED 0 #endif // NRF_LOG_CLI_CMDS - Enable CLI commands for the module. - + #ifndef NRF_LOG_CLI_CMDS -#define NRF_LOG_CLI_CMDS 1 +#define NRF_LOG_CLI_CMDS 0 #endif // Log message pool - Configuration of log message pool //========================================================== -// NRF_LOG_MSGPOOL_ELEMENT_SIZE - Size of a single element in the pool of memory objects. +// NRF_LOG_MSGPOOL_ELEMENT_SIZE - Size of a single element in the pool of memory objects. // If a small value is set, then performance of logs processing // is degraded because data is fragmented. Bigger value impacts // RAM memory utilization. The size is set to fit a message with @@ -4436,7 +7234,7 @@ #define NRF_LOG_MSGPOOL_ELEMENT_SIZE 20 #endif -// NRF_LOG_MSGPOOL_ELEMENT_COUNT - Number of elements in the pool of memory objects +// NRF_LOG_MSGPOOL_ELEMENT_COUNT - Number of elements in the pool of memory objects // If a small value is set, then it may lead to a deadlock // in certain cases if backend has high latency and holds // multiple messages for long time. Bigger value impacts @@ -4446,15 +7244,15 @@ #define NRF_LOG_MSGPOOL_ELEMENT_COUNT 8 #endif -// +// //========================================================== // -// nrf_log module configuration +// nrf_log module configuration //========================================================== -// nrf_log in nRF_Core +// nrf_log in nRF_Core //========================================================== // NRF_MPU_CONFIG_LOG_ENABLED - Enables logging in the module. @@ -4463,44 +7261,44 @@ #define NRF_MPU_CONFIG_LOG_ENABLED 0 #endif // NRF_MPU_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NRF_MPU_CONFIG_LOG_LEVEL #define NRF_MPU_CONFIG_LOG_LEVEL 3 #endif // NRF_MPU_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_MPU_CONFIG_INFO_COLOR #define NRF_MPU_CONFIG_INFO_COLOR 0 #endif // NRF_MPU_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_MPU_CONFIG_DEBUG_COLOR #define NRF_MPU_CONFIG_DEBUG_COLOR 0 @@ -4514,44 +7312,44 @@ #define NRF_STACK_GUARD_CONFIG_LOG_ENABLED 0 #endif // NRF_STACK_GUARD_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NRF_STACK_GUARD_CONFIG_LOG_LEVEL #define NRF_STACK_GUARD_CONFIG_LOG_LEVEL 3 #endif // NRF_STACK_GUARD_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_STACK_GUARD_CONFIG_INFO_COLOR #define NRF_STACK_GUARD_CONFIG_INFO_COLOR 0 #endif // NRF_STACK_GUARD_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_STACK_GUARD_CONFIG_DEBUG_COLOR #define NRF_STACK_GUARD_CONFIG_DEBUG_COLOR 0 @@ -4565,44 +7363,44 @@ #define TASK_MANAGER_CONFIG_LOG_ENABLED 0 #endif // TASK_MANAGER_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef TASK_MANAGER_CONFIG_LOG_LEVEL #define TASK_MANAGER_CONFIG_LOG_LEVEL 3 #endif // TASK_MANAGER_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef TASK_MANAGER_CONFIG_INFO_COLOR #define TASK_MANAGER_CONFIG_INFO_COLOR 0 #endif // TASK_MANAGER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef TASK_MANAGER_CONFIG_DEBUG_COLOR #define TASK_MANAGER_CONFIG_DEBUG_COLOR 0 @@ -4610,10 +7408,10 @@ // -// +// //========================================================== -// nrf_log in nRF_Drivers +// nrf_log in nRF_Drivers //========================================================== // CLOCK_CONFIG_LOG_ENABLED - Enables logging in the module. @@ -4622,44 +7420,44 @@ #define CLOCK_CONFIG_LOG_ENABLED 0 #endif // CLOCK_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef CLOCK_CONFIG_LOG_LEVEL #define CLOCK_CONFIG_LOG_LEVEL 3 #endif // CLOCK_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef CLOCK_CONFIG_INFO_COLOR #define CLOCK_CONFIG_INFO_COLOR 0 #endif // CLOCK_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef CLOCK_CONFIG_DEBUG_COLOR #define CLOCK_CONFIG_DEBUG_COLOR 0 @@ -4667,101 +7465,50 @@ // -// COMMON_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef COMMON_CONFIG_LOG_ENABLED -#define COMMON_CONFIG_LOG_ENABLED 0 -#endif -// COMMON_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef COMMON_CONFIG_LOG_LEVEL -#define COMMON_CONFIG_LOG_LEVEL 3 -#endif - -// COMMON_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef COMMON_CONFIG_INFO_COLOR -#define COMMON_CONFIG_INFO_COLOR 0 -#endif - -// COMMON_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef COMMON_CONFIG_DEBUG_COLOR -#define COMMON_CONFIG_DEBUG_COLOR 0 -#endif - -// - // COMP_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef COMP_CONFIG_LOG_ENABLED #define COMP_CONFIG_LOG_ENABLED 0 #endif // COMP_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef COMP_CONFIG_LOG_LEVEL #define COMP_CONFIG_LOG_LEVEL 3 #endif // COMP_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef COMP_CONFIG_INFO_COLOR #define COMP_CONFIG_INFO_COLOR 0 #endif // COMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef COMP_CONFIG_DEBUG_COLOR #define COMP_CONFIG_DEBUG_COLOR 0 @@ -4775,44 +7522,44 @@ #define GPIOTE_CONFIG_LOG_ENABLED 0 #endif // GPIOTE_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef GPIOTE_CONFIG_LOG_LEVEL #define GPIOTE_CONFIG_LOG_LEVEL 3 #endif // GPIOTE_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef GPIOTE_CONFIG_INFO_COLOR #define GPIOTE_CONFIG_INFO_COLOR 0 #endif // GPIOTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef GPIOTE_CONFIG_DEBUG_COLOR #define GPIOTE_CONFIG_DEBUG_COLOR 0 @@ -4820,101 +7567,50 @@ // -// I2S_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef I2S_CONFIG_LOG_ENABLED -#define I2S_CONFIG_LOG_ENABLED 0 -#endif -// I2S_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef I2S_CONFIG_LOG_LEVEL -#define I2S_CONFIG_LOG_LEVEL 3 -#endif - -// I2S_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef I2S_CONFIG_INFO_COLOR -#define I2S_CONFIG_INFO_COLOR 0 -#endif - -// I2S_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef I2S_CONFIG_DEBUG_COLOR -#define I2S_CONFIG_DEBUG_COLOR 0 -#endif - -// - // LPCOMP_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef LPCOMP_CONFIG_LOG_ENABLED #define LPCOMP_CONFIG_LOG_ENABLED 0 #endif // LPCOMP_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef LPCOMP_CONFIG_LOG_LEVEL #define LPCOMP_CONFIG_LOG_LEVEL 3 #endif // LPCOMP_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef LPCOMP_CONFIG_INFO_COLOR #define LPCOMP_CONFIG_INFO_COLOR 0 #endif // LPCOMP_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef LPCOMP_CONFIG_DEBUG_COLOR #define LPCOMP_CONFIG_DEBUG_COLOR 0 @@ -4928,44 +7624,44 @@ #define PDM_CONFIG_LOG_ENABLED 0 #endif // PDM_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef PDM_CONFIG_LOG_LEVEL #define PDM_CONFIG_LOG_LEVEL 3 #endif // PDM_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef PDM_CONFIG_INFO_COLOR #define PDM_CONFIG_INFO_COLOR 0 #endif // PDM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef PDM_CONFIG_DEBUG_COLOR #define PDM_CONFIG_DEBUG_COLOR 0 @@ -4975,48 +7671,48 @@ // PPI_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== -#ifndef PPI_CONFIG_LOG_ENABLED -#define PPI_CONFIG_LOG_ENABLED 0 -#endif -// PPI_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug +#ifndef PPI_CONFIG_LOG_ENABLED +#define PPI_CONFIG_LOG_ENABLED 0 +#endif +// PPI_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef PPI_CONFIG_LOG_LEVEL #define PPI_CONFIG_LOG_LEVEL 3 #endif // PPI_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef PPI_CONFIG_INFO_COLOR #define PPI_CONFIG_INFO_COLOR 0 #endif // PPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef PPI_CONFIG_DEBUG_COLOR #define PPI_CONFIG_DEBUG_COLOR 0 @@ -5030,44 +7726,44 @@ #define PWM_CONFIG_LOG_ENABLED 0 #endif // PWM_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef PWM_CONFIG_LOG_LEVEL #define PWM_CONFIG_LOG_LEVEL 3 #endif // PWM_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef PWM_CONFIG_INFO_COLOR #define PWM_CONFIG_INFO_COLOR 0 #endif // PWM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef PWM_CONFIG_DEBUG_COLOR #define PWM_CONFIG_DEBUG_COLOR 0 @@ -5081,44 +7777,44 @@ #define QDEC_CONFIG_LOG_ENABLED 0 #endif // QDEC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef QDEC_CONFIG_LOG_LEVEL #define QDEC_CONFIG_LOG_LEVEL 3 #endif // QDEC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef QDEC_CONFIG_INFO_COLOR #define QDEC_CONFIG_INFO_COLOR 0 #endif // QDEC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef QDEC_CONFIG_DEBUG_COLOR #define QDEC_CONFIG_DEBUG_COLOR 0 @@ -5132,51 +7828,51 @@ #define RNG_CONFIG_LOG_ENABLED 0 #endif // RNG_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef RNG_CONFIG_LOG_LEVEL #define RNG_CONFIG_LOG_LEVEL 3 #endif // RNG_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef RNG_CONFIG_INFO_COLOR #define RNG_CONFIG_INFO_COLOR 0 #endif // RNG_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef RNG_CONFIG_DEBUG_COLOR #define RNG_CONFIG_DEBUG_COLOR 0 #endif // RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED - Enables logging of random numbers. - + #ifndef RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED #define RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED 0 @@ -5190,44 +7886,44 @@ #define RTC_CONFIG_LOG_ENABLED 0 #endif // RTC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef RTC_CONFIG_LOG_LEVEL #define RTC_CONFIG_LOG_LEVEL 3 #endif // RTC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef RTC_CONFIG_INFO_COLOR #define RTC_CONFIG_INFO_COLOR 0 #endif // RTC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef RTC_CONFIG_DEBUG_COLOR #define RTC_CONFIG_DEBUG_COLOR 0 @@ -5241,44 +7937,44 @@ #define SAADC_CONFIG_LOG_ENABLED 0 #endif // SAADC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef SAADC_CONFIG_LOG_LEVEL #define SAADC_CONFIG_LOG_LEVEL 3 #endif // SAADC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef SAADC_CONFIG_INFO_COLOR #define SAADC_CONFIG_INFO_COLOR 0 #endif // SAADC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef SAADC_CONFIG_DEBUG_COLOR #define SAADC_CONFIG_DEBUG_COLOR 0 @@ -5292,44 +7988,44 @@ #define SPIS_CONFIG_LOG_ENABLED 0 #endif // SPIS_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef SPIS_CONFIG_LOG_LEVEL #define SPIS_CONFIG_LOG_LEVEL 3 #endif // SPIS_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef SPIS_CONFIG_INFO_COLOR #define SPIS_CONFIG_INFO_COLOR 0 #endif // SPIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef SPIS_CONFIG_DEBUG_COLOR #define SPIS_CONFIG_DEBUG_COLOR 0 @@ -5343,98 +8039,47 @@ #define SPI_CONFIG_LOG_ENABLED 0 #endif // SPI_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef SPI_CONFIG_LOG_LEVEL #define SPI_CONFIG_LOG_LEVEL 3 #endif -// SPI_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef SPI_CONFIG_INFO_COLOR -#define SPI_CONFIG_INFO_COLOR 0 -#endif - -// SPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef SPI_CONFIG_DEBUG_COLOR -#define SPI_CONFIG_DEBUG_COLOR 0 -#endif - -// - -// SWI_CONFIG_LOG_ENABLED - Enables logging in the module. -//========================================================== -#ifndef SWI_CONFIG_LOG_ENABLED -#define SWI_CONFIG_LOG_ENABLED 0 -#endif -// SWI_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug - -#ifndef SWI_CONFIG_LOG_LEVEL -#define SWI_CONFIG_LOG_LEVEL 3 -#endif - -// SWI_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef SWI_CONFIG_INFO_COLOR -#define SWI_CONFIG_INFO_COLOR 0 -#endif - -// SWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White - -#ifndef SWI_CONFIG_DEBUG_COLOR -#define SWI_CONFIG_DEBUG_COLOR 0 +// SPI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SPI_CONFIG_INFO_COLOR +#define SPI_CONFIG_INFO_COLOR 0 +#endif + +// SPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SPI_CONFIG_DEBUG_COLOR +#define SPI_CONFIG_DEBUG_COLOR 0 #endif // @@ -5445,44 +8090,44 @@ #define TIMER_CONFIG_LOG_ENABLED 0 #endif // TIMER_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef TIMER_CONFIG_LOG_LEVEL #define TIMER_CONFIG_LOG_LEVEL 3 #endif // TIMER_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef TIMER_CONFIG_INFO_COLOR #define TIMER_CONFIG_INFO_COLOR 0 #endif // TIMER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef TIMER_CONFIG_DEBUG_COLOR #define TIMER_CONFIG_DEBUG_COLOR 0 @@ -5496,44 +8141,44 @@ #define TWIS_CONFIG_LOG_ENABLED 0 #endif // TWIS_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef TWIS_CONFIG_LOG_LEVEL #define TWIS_CONFIG_LOG_LEVEL 3 #endif // TWIS_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef TWIS_CONFIG_INFO_COLOR #define TWIS_CONFIG_INFO_COLOR 0 #endif // TWIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef TWIS_CONFIG_DEBUG_COLOR #define TWIS_CONFIG_DEBUG_COLOR 0 @@ -5547,44 +8192,44 @@ #define TWI_CONFIG_LOG_ENABLED 0 #endif // TWI_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef TWI_CONFIG_LOG_LEVEL #define TWI_CONFIG_LOG_LEVEL 3 #endif // TWI_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef TWI_CONFIG_INFO_COLOR #define TWI_CONFIG_INFO_COLOR 0 #endif // TWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef TWI_CONFIG_DEBUG_COLOR #define TWI_CONFIG_DEBUG_COLOR 0 @@ -5598,44 +8243,44 @@ #define UART_CONFIG_LOG_ENABLED 0 #endif // UART_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef UART_CONFIG_LOG_LEVEL #define UART_CONFIG_LOG_LEVEL 3 #endif // UART_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef UART_CONFIG_INFO_COLOR #define UART_CONFIG_INFO_COLOR 0 #endif // UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef UART_CONFIG_DEBUG_COLOR #define UART_CONFIG_DEBUG_COLOR 0 @@ -5649,44 +8294,44 @@ #define USBD_CONFIG_LOG_ENABLED 0 #endif // USBD_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef USBD_CONFIG_LOG_LEVEL #define USBD_CONFIG_LOG_LEVEL 3 #endif // USBD_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef USBD_CONFIG_INFO_COLOR #define USBD_CONFIG_INFO_COLOR 0 #endif // USBD_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef USBD_CONFIG_DEBUG_COLOR #define USBD_CONFIG_DEBUG_COLOR 0 @@ -5700,44 +8345,44 @@ #define WDT_CONFIG_LOG_ENABLED 0 #endif // WDT_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef WDT_CONFIG_LOG_LEVEL #define WDT_CONFIG_LOG_LEVEL 3 #endif // WDT_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef WDT_CONFIG_INFO_COLOR #define WDT_CONFIG_INFO_COLOR 0 #endif // WDT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef WDT_CONFIG_DEBUG_COLOR #define WDT_CONFIG_DEBUG_COLOR 0 @@ -5745,56 +8390,123 @@ // -// +// //========================================================== -// nrf_log in nRF_Libraries +// nrf_log in nRF_Libraries //========================================================== +// APP_TIMER_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef APP_TIMER_CONFIG_LOG_ENABLED +#define APP_TIMER_CONFIG_LOG_ENABLED 0 +#endif +// APP_TIMER_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_TIMER_CONFIG_LOG_LEVEL +#define APP_TIMER_CONFIG_LOG_LEVEL 3 +#endif + +// APP_TIMER_CONFIG_INITIAL_LOG_LEVEL - Initial severity level if dynamic filtering is enabled. + + +// If module generates a lot of logs, initial log level can +// be decreased to prevent flooding. Severity level can be +// increased on instance basis. +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_TIMER_CONFIG_INITIAL_LOG_LEVEL +#define APP_TIMER_CONFIG_INITIAL_LOG_LEVEL 3 +#endif + +// APP_TIMER_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_TIMER_CONFIG_INFO_COLOR +#define APP_TIMER_CONFIG_INFO_COLOR 0 +#endif + +// APP_TIMER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_TIMER_CONFIG_DEBUG_COLOR +#define APP_TIMER_CONFIG_DEBUG_COLOR 0 +#endif + +// + // APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED #define APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED 0 #endif // APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL #define APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL 3 #endif // APP_USBD_CDC_ACM_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef APP_USBD_CDC_ACM_CONFIG_INFO_COLOR #define APP_USBD_CDC_ACM_CONFIG_INFO_COLOR 0 #endif // APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR #define APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR 0 @@ -5802,108 +8514,282 @@ // +// APP_USBD_DUMMY_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef APP_USBD_DUMMY_CONFIG_LOG_ENABLED +#define APP_USBD_DUMMY_CONFIG_LOG_ENABLED 0 +#endif +// APP_USBD_DUMMY_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_USBD_DUMMY_CONFIG_LOG_LEVEL +#define APP_USBD_DUMMY_CONFIG_LOG_LEVEL 3 +#endif + +// APP_USBD_DUMMY_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_DUMMY_CONFIG_INFO_COLOR +#define APP_USBD_DUMMY_CONFIG_INFO_COLOR 0 +#endif + +// APP_USBD_DUMMY_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_DUMMY_CONFIG_DEBUG_COLOR +#define APP_USBD_DUMMY_CONFIG_DEBUG_COLOR 0 +#endif + +// + // APP_USBD_MSC_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef APP_USBD_MSC_CONFIG_LOG_ENABLED #define APP_USBD_MSC_CONFIG_LOG_ENABLED 0 #endif // APP_USBD_MSC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef APP_USBD_MSC_CONFIG_LOG_LEVEL #define APP_USBD_MSC_CONFIG_LOG_LEVEL 3 #endif // APP_USBD_MSC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#ifndef APP_USBD_MSC_CONFIG_INFO_COLOR +#define APP_USBD_MSC_CONFIG_INFO_COLOR 0 +#endif + +// APP_USBD_MSC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_MSC_CONFIG_DEBUG_COLOR +#define APP_USBD_MSC_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED +#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED 0 +#endif +// APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL +#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL 3 +#endif + +// APP_USBD_NRF_DFU_TRIGGER_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_INFO_COLOR +#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_INFO_COLOR 0 +#endif -#ifndef APP_USBD_MSC_CONFIG_INFO_COLOR -#define APP_USBD_MSC_CONFIG_INFO_COLOR 0 +// APP_USBD_NRF_DFU_TRIGGER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_DEBUG_COLOR +#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_DEBUG_COLOR 0 #endif -// APP_USBD_MSC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. +// -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +// NRF_ATFIFO_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_ATFIFO_CONFIG_LOG_ENABLED +#define NRF_ATFIFO_CONFIG_LOG_ENABLED 0 +#endif +// NRF_ATFIFO_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -#ifndef APP_USBD_MSC_CONFIG_DEBUG_COLOR -#define APP_USBD_MSC_CONFIG_DEBUG_COLOR 0 +#ifndef NRF_ATFIFO_CONFIG_LOG_LEVEL +#define NRF_ATFIFO_CONFIG_LOG_LEVEL 3 #endif -// +// NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL - Initial severity level if dynamic filtering is enabled + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL +#define NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL 3 +#endif + +// NRF_ATFIFO_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// MEM_MANAGER_ENABLE_LOGS - Enable debug trace in the module. +#ifndef NRF_ATFIFO_CONFIG_INFO_COLOR +#define NRF_ATFIFO_CONFIG_INFO_COLOR 0 +#endif +// NRF_ATFIFO_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -#ifndef MEM_MANAGER_ENABLE_LOGS -#define MEM_MANAGER_ENABLE_LOGS 0 +#ifndef NRF_ATFIFO_CONFIG_DEBUG_COLOR +#define NRF_ATFIFO_CONFIG_DEBUG_COLOR 0 #endif +// + // NRF_BALLOC_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef NRF_BALLOC_CONFIG_LOG_ENABLED #define NRF_BALLOC_CONFIG_LOG_ENABLED 0 #endif // NRF_BALLOC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NRF_BALLOC_CONFIG_LOG_LEVEL #define NRF_BALLOC_CONFIG_LOG_LEVEL 3 #endif -// NRF_BALLOC_CONFIG_INFO_COLOR - ANSI escape code prefix. +// NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL - Initial severity level if dynamic filtering is enabled. + -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +// If module generates a lot of logs, initial log level can +// be decreased to prevent flooding. Severity level can be +// increased on instance basis. +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL +#define NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL 3 +#endif + +// NRF_BALLOC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_BALLOC_CONFIG_INFO_COLOR #define NRF_BALLOC_CONFIG_INFO_COLOR 0 #endif // NRF_BALLOC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_BALLOC_CONFIG_DEBUG_COLOR #define NRF_BALLOC_CONFIG_DEBUG_COLOR 0 @@ -5917,44 +8803,44 @@ #define NRF_CLI_BLE_UART_CONFIG_LOG_ENABLED 0 #endif // NRF_CLI_BLE_UART_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NRF_CLI_BLE_UART_CONFIG_LOG_LEVEL #define NRF_CLI_BLE_UART_CONFIG_LOG_LEVEL 3 #endif // NRF_CLI_BLE_UART_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_CLI_BLE_UART_CONFIG_INFO_COLOR #define NRF_CLI_BLE_UART_CONFIG_INFO_COLOR 0 #endif // NRF_CLI_BLE_UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_CLI_BLE_UART_CONFIG_DEBUG_COLOR #define NRF_CLI_BLE_UART_CONFIG_DEBUG_COLOR 0 @@ -5962,50 +8848,101 @@ // +// NRF_CLI_LIBUARTE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_CLI_LIBUARTE_CONFIG_LOG_ENABLED +#define NRF_CLI_LIBUARTE_CONFIG_LOG_ENABLED 0 +#endif +// NRF_CLI_LIBUARTE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_CLI_LIBUARTE_CONFIG_LOG_LEVEL +#define NRF_CLI_LIBUARTE_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_CLI_LIBUARTE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_CLI_LIBUARTE_CONFIG_INFO_COLOR +#define NRF_CLI_LIBUARTE_CONFIG_INFO_COLOR 0 +#endif + +// NRF_CLI_LIBUARTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_CLI_LIBUARTE_CONFIG_DEBUG_COLOR +#define NRF_CLI_LIBUARTE_CONFIG_DEBUG_COLOR 0 +#endif + +// + // NRF_CLI_UART_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef NRF_CLI_UART_CONFIG_LOG_ENABLED #define NRF_CLI_UART_CONFIG_LOG_ENABLED 0 #endif // NRF_CLI_UART_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NRF_CLI_UART_CONFIG_LOG_LEVEL #define NRF_CLI_UART_CONFIG_LOG_LEVEL 3 #endif // NRF_CLI_UART_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_CLI_UART_CONFIG_INFO_COLOR #define NRF_CLI_UART_CONFIG_INFO_COLOR 0 #endif // NRF_CLI_UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_CLI_UART_CONFIG_DEBUG_COLOR #define NRF_CLI_UART_CONFIG_DEBUG_COLOR 0 @@ -6013,50 +8950,101 @@ // +// NRF_LIBUARTE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_LIBUARTE_CONFIG_LOG_ENABLED +#define NRF_LIBUARTE_CONFIG_LOG_ENABLED 0 +#endif +// NRF_LIBUARTE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_LIBUARTE_CONFIG_LOG_LEVEL +#define NRF_LIBUARTE_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_LIBUARTE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_LIBUARTE_CONFIG_INFO_COLOR +#define NRF_LIBUARTE_CONFIG_INFO_COLOR 0 +#endif + +// NRF_LIBUARTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_LIBUARTE_CONFIG_DEBUG_COLOR +#define NRF_LIBUARTE_CONFIG_DEBUG_COLOR 0 +#endif + +// + // NRF_MEMOBJ_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef NRF_MEMOBJ_CONFIG_LOG_ENABLED #define NRF_MEMOBJ_CONFIG_LOG_ENABLED 0 #endif // NRF_MEMOBJ_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NRF_MEMOBJ_CONFIG_LOG_LEVEL #define NRF_MEMOBJ_CONFIG_LOG_LEVEL 3 #endif // NRF_MEMOBJ_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_MEMOBJ_CONFIG_INFO_COLOR #define NRF_MEMOBJ_CONFIG_INFO_COLOR 0 #endif // NRF_MEMOBJ_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_MEMOBJ_CONFIG_DEBUG_COLOR #define NRF_MEMOBJ_CONFIG_DEBUG_COLOR 0 @@ -6070,44 +9058,44 @@ #define NRF_PWR_MGMT_CONFIG_LOG_ENABLED 0 #endif // NRF_PWR_MGMT_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NRF_PWR_MGMT_CONFIG_LOG_LEVEL #define NRF_PWR_MGMT_CONFIG_LOG_LEVEL 3 #endif // NRF_PWR_MGMT_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_PWR_MGMT_CONFIG_INFO_COLOR #define NRF_PWR_MGMT_CONFIG_INFO_COLOR 0 #endif // NRF_PWR_MGMT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_PWR_MGMT_CONFIG_DEBUG_COLOR #define NRF_PWR_MGMT_CONFIG_DEBUG_COLOR 0 @@ -6115,50 +9103,113 @@ // +// NRF_QUEUE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_QUEUE_CONFIG_LOG_ENABLED +#define NRF_QUEUE_CONFIG_LOG_ENABLED 0 +#endif +// NRF_QUEUE_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_QUEUE_CONFIG_LOG_LEVEL +#define NRF_QUEUE_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL - Initial severity level if dynamic filtering is enabled + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL +#define NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL 3 +#endif + +// NRF_QUEUE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_QUEUE_CONFIG_INFO_COLOR +#define NRF_QUEUE_CONFIG_INFO_COLOR 0 +#endif + +// NRF_QUEUE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_QUEUE_CONFIG_DEBUG_COLOR +#define NRF_QUEUE_CONFIG_DEBUG_COLOR 0 +#endif + +// + // NRF_SDH_ANT_LOG_ENABLED - Enable logging in SoftDevice handler (ANT) module. //========================================================== #ifndef NRF_SDH_ANT_LOG_ENABLED -#define NRF_SDH_ANT_LOG_ENABLED 1 +#define NRF_SDH_ANT_LOG_ENABLED 0 #endif // NRF_SDH_ANT_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NRF_SDH_ANT_LOG_LEVEL #define NRF_SDH_ANT_LOG_LEVEL 3 #endif // NRF_SDH_ANT_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_SDH_ANT_INFO_COLOR #define NRF_SDH_ANT_INFO_COLOR 0 #endif // NRF_SDH_ANT_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_SDH_ANT_DEBUG_COLOR #define NRF_SDH_ANT_DEBUG_COLOR 0 @@ -6172,44 +9223,44 @@ #define NRF_SDH_BLE_LOG_ENABLED 1 #endif // NRF_SDH_BLE_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NRF_SDH_BLE_LOG_LEVEL #define NRF_SDH_BLE_LOG_LEVEL 3 #endif // NRF_SDH_BLE_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_SDH_BLE_INFO_COLOR #define NRF_SDH_BLE_INFO_COLOR 0 -#endif - -// NRF_SDH_BLE_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White +#endif + +// NRF_SDH_BLE_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_SDH_BLE_DEBUG_COLOR #define NRF_SDH_BLE_DEBUG_COLOR 0 @@ -6223,44 +9274,44 @@ #define NRF_SDH_LOG_ENABLED 1 #endif // NRF_SDH_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NRF_SDH_LOG_LEVEL #define NRF_SDH_LOG_LEVEL 3 #endif // NRF_SDH_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_SDH_INFO_COLOR #define NRF_SDH_INFO_COLOR 0 #endif // NRF_SDH_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_SDH_DEBUG_COLOR #define NRF_SDH_DEBUG_COLOR 0 @@ -6274,44 +9325,44 @@ #define NRF_SDH_SOC_LOG_ENABLED 1 #endif // NRF_SDH_SOC_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NRF_SDH_SOC_LOG_LEVEL #define NRF_SDH_SOC_LOG_LEVEL 3 #endif // NRF_SDH_SOC_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_SDH_SOC_INFO_COLOR #define NRF_SDH_SOC_INFO_COLOR 0 #endif // NRF_SDH_SOC_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NRF_SDH_SOC_DEBUG_COLOR #define NRF_SDH_SOC_DEBUG_COLOR 0 @@ -6319,30 +9370,203 @@ // -// +// NRF_SORTLIST_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_SORTLIST_CONFIG_LOG_ENABLED +#define NRF_SORTLIST_CONFIG_LOG_ENABLED 0 +#endif +// NRF_SORTLIST_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_SORTLIST_CONFIG_LOG_LEVEL +#define NRF_SORTLIST_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_SORTLIST_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SORTLIST_CONFIG_INFO_COLOR +#define NRF_SORTLIST_CONFIG_INFO_COLOR 0 +#endif + +// NRF_SORTLIST_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_SORTLIST_CONFIG_DEBUG_COLOR +#define NRF_SORTLIST_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// NRF_TWI_SENSOR_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRF_TWI_SENSOR_CONFIG_LOG_ENABLED +#define NRF_TWI_SENSOR_CONFIG_LOG_ENABLED 0 +#endif +// NRF_TWI_SENSOR_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRF_TWI_SENSOR_CONFIG_LOG_LEVEL +#define NRF_TWI_SENSOR_CONFIG_LOG_LEVEL 3 +#endif + +// NRF_TWI_SENSOR_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_TWI_SENSOR_CONFIG_INFO_COLOR +#define NRF_TWI_SENSOR_CONFIG_INFO_COLOR 0 +#endif + +// NRF_TWI_SENSOR_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRF_TWI_SENSOR_CONFIG_DEBUG_COLOR +#define NRF_TWI_SENSOR_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// +//========================================================== + +// nrf_log in nRF_Serialization + +//========================================================== +// SER_HAL_TRANSPORT_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef SER_HAL_TRANSPORT_CONFIG_LOG_ENABLED +#define SER_HAL_TRANSPORT_CONFIG_LOG_ENABLED 0 +#endif +// SER_HAL_TRANSPORT_CONFIG_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef SER_HAL_TRANSPORT_CONFIG_LOG_LEVEL +#define SER_HAL_TRANSPORT_CONFIG_LOG_LEVEL 3 +#endif + +// SER_HAL_TRANSPORT_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SER_HAL_TRANSPORT_CONFIG_INFO_COLOR +#define SER_HAL_TRANSPORT_CONFIG_INFO_COLOR 0 +#endif + +// SER_HAL_TRANSPORT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef SER_HAL_TRANSPORT_CONFIG_DEBUG_COLOR +#define SER_HAL_TRANSPORT_CONFIG_DEBUG_COLOR 0 +#endif + +// + +// //========================================================== -// +// //========================================================== -// +// //========================================================== -// +// //========================================================== -// nRF_NFC +// nRF_NFC //========================================================== -// NFC_BLE_OOB_ADVDATA_ENABLED - nfc_ble_oob_advdata - Encoding the advertising data and/or scan response data which is specific for OOB pairing +// NFC_AC_REC_ENABLED - nfc_ac_rec - NFC NDEF Alternative Carrier record encoder + + +#ifndef NFC_AC_REC_ENABLED +#define NFC_AC_REC_ENABLED 0 +#endif + +// NFC_AC_REC_PARSER_ENABLED - nfc_ac_rec_parser - Alternative Carrier record parser + + +#ifndef NFC_AC_REC_PARSER_ENABLED +#define NFC_AC_REC_PARSER_ENABLED 0 +#endif + +// NFC_BLE_OOB_ADVDATA_ENABLED - nfc_ble_oob_advdata - AD data for OOB pairing encoder //========================================================== #ifndef NFC_BLE_OOB_ADVDATA_ENABLED #define NFC_BLE_OOB_ADVDATA_ENABLED 0 #endif // ADVANCED_ADVDATA_SUPPORT - Non-mandatory AD types for BLE OOB pairing are encoded inside the NDEF message (e.g. service UUIDs) - -// <1=> Enabled -// <0=> Disabled + +// <1=> Enabled +// <0=> Disabled #ifndef ADVANCED_ADVDATA_SUPPORT #define ADVANCED_ADVDATA_SUPPORT 0 @@ -6350,6 +9574,13 @@ // +// NFC_BLE_OOB_ADVDATA_PARSER_ENABLED - nfc_ble_oob_advdata_parser - BLE OOB pairing AD data parser + + +#ifndef NFC_BLE_OOB_ADVDATA_PARSER_ENABLED +#define NFC_BLE_OOB_ADVDATA_PARSER_ENABLED 0 +#endif + // NFC_BLE_PAIR_LIB_ENABLED - nfc_ble_pair_lib - Library parameters //========================================================== #ifndef NFC_BLE_PAIR_LIB_ENABLED @@ -6361,44 +9592,44 @@ #define NFC_BLE_PAIR_LIB_LOG_ENABLED 0 #endif // NFC_BLE_PAIR_LIB_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NFC_BLE_PAIR_LIB_LOG_LEVEL #define NFC_BLE_PAIR_LIB_LOG_LEVEL 3 #endif // NFC_BLE_PAIR_LIB_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NFC_BLE_PAIR_LIB_INFO_COLOR #define NFC_BLE_PAIR_LIB_INFO_COLOR 0 #endif // NFC_BLE_PAIR_LIB_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NFC_BLE_PAIR_LIB_DEBUG_COLOR #define NFC_BLE_PAIR_LIB_DEBUG_COLOR 0 @@ -6417,129 +9648,129 @@ #define BLE_NFC_SEC_PARAM_BOND 1 #endif // BLE_NFC_SEC_PARAM_KDIST_OWN_ENC - Enables Long Term Key and Master Identification distribution by device. - + #ifndef BLE_NFC_SEC_PARAM_KDIST_OWN_ENC #define BLE_NFC_SEC_PARAM_KDIST_OWN_ENC 1 #endif // BLE_NFC_SEC_PARAM_KDIST_OWN_ID - Enables Identity Resolving Key and Identity Address Information distribution by device. - + #ifndef BLE_NFC_SEC_PARAM_KDIST_OWN_ID #define BLE_NFC_SEC_PARAM_KDIST_OWN_ID 1 #endif // BLE_NFC_SEC_PARAM_KDIST_PEER_ENC - Enables Long Term Key and Master Identification distribution by peer. - + #ifndef BLE_NFC_SEC_PARAM_KDIST_PEER_ENC #define BLE_NFC_SEC_PARAM_KDIST_PEER_ENC 1 #endif // BLE_NFC_SEC_PARAM_KDIST_PEER_ID - Enables Identity Resolving Key and Identity Address Information distribution by peer. - + #ifndef BLE_NFC_SEC_PARAM_KDIST_PEER_ID #define BLE_NFC_SEC_PARAM_KDIST_PEER_ID 1 #endif -// BLE_NFC_SEC_PARAM_KDIST_OWN_ENC - Enables Long Term Key and Master Identification distribution by device. +// +// BLE_NFC_SEC_PARAM_MIN_KEY_SIZE - Minimal size of a security key. + +// <7=> 7 +// <8=> 8 +// <9=> 9 +// <10=> 10 +// <11=> 11 +// <12=> 12 +// <13=> 13 +// <14=> 14 +// <15=> 15 +// <16=> 16 -#ifndef BLE_NFC_SEC_PARAM_KDIST_OWN_ENC -#define BLE_NFC_SEC_PARAM_KDIST_OWN_ENC 1 +#ifndef BLE_NFC_SEC_PARAM_MIN_KEY_SIZE +#define BLE_NFC_SEC_PARAM_MIN_KEY_SIZE 7 #endif -// BLE_NFC_SEC_PARAM_KDIST_OWN_ID - Enables Identity Resolving Key and Identity Address Information distribution by device. - +// BLE_NFC_SEC_PARAM_MAX_KEY_SIZE - Maximal size of a security key. + +// <7=> 7 +// <8=> 8 +// <9=> 9 +// <10=> 10 +// <11=> 11 +// <12=> 12 +// <13=> 13 +// <14=> 14 +// <15=> 15 +// <16=> 16 -#ifndef BLE_NFC_SEC_PARAM_KDIST_OWN_ID -#define BLE_NFC_SEC_PARAM_KDIST_OWN_ID 1 +#ifndef BLE_NFC_SEC_PARAM_MAX_KEY_SIZE +#define BLE_NFC_SEC_PARAM_MAX_KEY_SIZE 16 #endif -// BLE_NFC_SEC_PARAM_KDIST_PEER_ENC - Enables Long Term Key and Master Identification distribution by peer. - - -#ifndef BLE_NFC_SEC_PARAM_KDIST_PEER_ENC -#define BLE_NFC_SEC_PARAM_KDIST_PEER_ENC 1 -#endif +// +//========================================================== -// BLE_NFC_SEC_PARAM_KDIST_PEER_ID - Enables Identity Resolving Key and Identity Address Information distribution by peer. +// +// NFC_BLE_PAIR_MSG_ENABLED - nfc_ble_pair_msg - NDEF message for OOB pairing encoder + -#ifndef BLE_NFC_SEC_PARAM_KDIST_PEER_ID -#define BLE_NFC_SEC_PARAM_KDIST_PEER_ID 1 +#ifndef NFC_BLE_PAIR_MSG_ENABLED +#define NFC_BLE_PAIR_MSG_ENABLED 0 #endif -// BLE_NFC_SEC_PARAM_KDIST_OWN_ENC - Enables Long Term Key and Master Identification distribution by device. - +// NFC_CH_COMMON_ENABLED - nfc_ble_pair_common - OOB pairing common data + -#ifndef BLE_NFC_SEC_PARAM_KDIST_OWN_ENC -#define BLE_NFC_SEC_PARAM_KDIST_OWN_ENC 1 +#ifndef NFC_CH_COMMON_ENABLED +#define NFC_CH_COMMON_ENABLED 0 #endif -// BLE_NFC_SEC_PARAM_KDIST_OWN_ID - Enables Identity Resolving Key and Identity Address Information distribution by device. - +// NFC_EP_OOB_REC_ENABLED - nfc_ep_oob_rec - EP record for BLE pairing encoder + -#ifndef BLE_NFC_SEC_PARAM_KDIST_OWN_ID -#define BLE_NFC_SEC_PARAM_KDIST_OWN_ID 1 +#ifndef NFC_EP_OOB_REC_ENABLED +#define NFC_EP_OOB_REC_ENABLED 0 #endif -// BLE_NFC_SEC_PARAM_KDIST_PEER_ENC - Enables Long Term Key and Master Identification distribution by peer. - +// NFC_HS_REC_ENABLED - nfc_hs_rec - Handover Select NDEF record encoder + -#ifndef BLE_NFC_SEC_PARAM_KDIST_PEER_ENC -#define BLE_NFC_SEC_PARAM_KDIST_PEER_ENC 1 +#ifndef NFC_HS_REC_ENABLED +#define NFC_HS_REC_ENABLED 0 #endif -// BLE_NFC_SEC_PARAM_KDIST_PEER_ID - Enables Identity Resolving Key and Identity Address Information distribution by peer. - +// NFC_LE_OOB_REC_ENABLED - nfc_le_oob_rec - LE record for BLE pairing encoder + -#ifndef BLE_NFC_SEC_PARAM_KDIST_PEER_ID -#define BLE_NFC_SEC_PARAM_KDIST_PEER_ID 1 +#ifndef NFC_LE_OOB_REC_ENABLED +#define NFC_LE_OOB_REC_ENABLED 0 #endif -// - -// BLE_NFC_SEC_PARAM_MIN_KEY_SIZE - Minimal size of a security key. - -// <7=> 7 -// <8=> 8 -// <9=> 9 -// <10=> 10 -// <11=> 11 -// <12=> 12 -// <13=> 13 -// <14=> 14 -// <15=> 15 -// <16=> 16 +// NFC_LE_OOB_REC_PARSER_ENABLED - nfc_le_oob_rec_parser - LE record parser + -#ifndef BLE_NFC_SEC_PARAM_MIN_KEY_SIZE -#define BLE_NFC_SEC_PARAM_MIN_KEY_SIZE 7 +#ifndef NFC_LE_OOB_REC_PARSER_ENABLED +#define NFC_LE_OOB_REC_PARSER_ENABLED 0 #endif -// BLE_NFC_SEC_PARAM_MAX_KEY_SIZE - Maximal size of a security key. - -// <7=> 7 -// <8=> 8 -// <9=> 9 -// <10=> 10 -// <11=> 11 -// <12=> 12 -// <13=> 13 -// <14=> 14 -// <15=> 15 -// <16=> 16 +// NFC_NDEF_LAUNCHAPP_MSG_ENABLED - nfc_launchapp_msg - Encoding data for NDEF Application Launching message for NFC Tag + -#ifndef BLE_NFC_SEC_PARAM_MAX_KEY_SIZE -#define BLE_NFC_SEC_PARAM_MAX_KEY_SIZE 16 +#ifndef NFC_NDEF_LAUNCHAPP_MSG_ENABLED +#define NFC_NDEF_LAUNCHAPP_MSG_ENABLED 0 #endif -// -//========================================================== +// NFC_NDEF_LAUNCHAPP_REC_ENABLED - nfc_launchapp_rec - Encoding data for NDEF Application Launching record for NFC Tag + -// +#ifndef NFC_NDEF_LAUNCHAPP_REC_ENABLED +#define NFC_NDEF_LAUNCHAPP_REC_ENABLED 0 +#endif // NFC_NDEF_MSG_ENABLED - nfc_ndef_msg - NFC NDEF Message generator module //========================================================== @@ -6547,9 +9778,9 @@ #define NFC_NDEF_MSG_ENABLED 0 #endif // NFC_NDEF_MSG_TAG_TYPE - NFC Tag Type - -// <2=> Type 2 Tag -// <4=> Type 4 Tag + +// <2=> Type 2 Tag +// <4=> Type 4 Tag #ifndef NFC_NDEF_MSG_TAG_TYPE #define NFC_NDEF_MSG_TAG_TYPE 2 @@ -6568,28 +9799,28 @@ #define NFC_NDEF_MSG_PARSER_LOG_ENABLED 0 #endif // NFC_NDEF_MSG_PARSER_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NFC_NDEF_MSG_PARSER_LOG_LEVEL #define NFC_NDEF_MSG_PARSER_LOG_LEVEL 3 #endif // NFC_NDEF_MSG_PARSER_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NFC_NDEF_MSG_PARSER_INFO_COLOR #define NFC_NDEF_MSG_PARSER_INFO_COLOR 0 @@ -6599,6 +9830,13 @@ // +// NFC_NDEF_RECORD_ENABLED - nfc_ndef_record - NFC NDEF Record generator module + + +#ifndef NFC_NDEF_RECORD_ENABLED +#define NFC_NDEF_RECORD_ENABLED 0 +#endif + // NFC_NDEF_RECORD_PARSER_ENABLED - nfc_ndef_record_parser - NFC NDEF Record parser module //========================================================== #ifndef NFC_NDEF_RECORD_PARSER_ENABLED @@ -6610,28 +9848,28 @@ #define NFC_NDEF_RECORD_PARSER_LOG_ENABLED 0 #endif // NFC_NDEF_RECORD_PARSER_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef NFC_NDEF_RECORD_PARSER_LOG_LEVEL #define NFC_NDEF_RECORD_PARSER_LOG_LEVEL 3 #endif // NFC_NDEF_RECORD_PARSER_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef NFC_NDEF_RECORD_PARSER_INFO_COLOR #define NFC_NDEF_RECORD_PARSER_INFO_COLOR 0 @@ -6641,23 +9879,44 @@ // +// NFC_NDEF_TEXT_RECORD_ENABLED - nfc_text_rec - Encoding data for a text record for NFC Tag + + +#ifndef NFC_NDEF_TEXT_RECORD_ENABLED +#define NFC_NDEF_TEXT_RECORD_ENABLED 0 +#endif + +// NFC_NDEF_URI_MSG_ENABLED - nfc_uri_msg - Encoding data for NDEF message with URI record for NFC Tag + + +#ifndef NFC_NDEF_URI_MSG_ENABLED +#define NFC_NDEF_URI_MSG_ENABLED 0 +#endif + +// NFC_NDEF_URI_REC_ENABLED - nfc_uri_rec - Encoding data for a URI record for NFC Tag + + +#ifndef NFC_NDEF_URI_REC_ENABLED +#define NFC_NDEF_URI_REC_ENABLED 0 +#endif + // NFC_T2T_HAL_ENABLED - nfc_t2t_hal - Hardware Abstraction Layer for NFC library. //========================================================== #ifndef NFC_T2T_HAL_ENABLED #define NFC_T2T_HAL_ENABLED 0 #endif // NFCT_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef NFCT_CONFIG_IRQ_PRIORITY #define NFCT_CONFIG_IRQ_PRIORITY 7 @@ -6669,88 +9928,88 @@ #define HAL_NFC_CONFIG_LOG_ENABLED 0 #endif // HAL_NFC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef HAL_NFC_CONFIG_LOG_LEVEL #define HAL_NFC_CONFIG_LOG_LEVEL 3 #endif // HAL_NFC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef HAL_NFC_CONFIG_INFO_COLOR #define HAL_NFC_CONFIG_INFO_COLOR 0 #endif // HAL_NFC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef HAL_NFC_CONFIG_DEBUG_COLOR #define HAL_NFC_CONFIG_DEBUG_COLOR 0 #endif // HAL_NFC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef HAL_NFC_CONFIG_LOG_LEVEL #define HAL_NFC_CONFIG_LOG_LEVEL 3 #endif // HAL_NFC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef HAL_NFC_CONFIG_INFO_COLOR #define HAL_NFC_CONFIG_INFO_COLOR 0 #endif // HAL_NFC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef HAL_NFC_CONFIG_DEBUG_COLOR #define HAL_NFC_CONFIG_DEBUG_COLOR 0 @@ -6764,560 +10023,560 @@ #define HAL_NFC_CONFIG_DEBUG_PIN_ENABLED 0 #endif // HAL_NFC_HCLOCK_ON_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_HCLOCK_ON_DEBUG_PIN #define HAL_NFC_HCLOCK_ON_DEBUG_PIN 11 #endif // HAL_NFC_HCLOCK_OFF_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_HCLOCK_OFF_DEBUG_PIN #define HAL_NFC_HCLOCK_OFF_DEBUG_PIN 12 #endif // HAL_NFC_NFC_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_NFC_EVENT_DEBUG_PIN #define HAL_NFC_NFC_EVENT_DEBUG_PIN 24 #endif // HAL_NFC_DETECT_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_DETECT_EVENT_DEBUG_PIN #define HAL_NFC_DETECT_EVENT_DEBUG_PIN 25 #endif // HAL_NFC_TIMER4_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_TIMER4_EVENT_DEBUG_PIN #define HAL_NFC_TIMER4_EVENT_DEBUG_PIN 28 #endif // HAL_NFC_HCLOCK_ON_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_HCLOCK_ON_DEBUG_PIN #define HAL_NFC_HCLOCK_ON_DEBUG_PIN 31 #endif // HAL_NFC_HCLOCK_OFF_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_HCLOCK_OFF_DEBUG_PIN #define HAL_NFC_HCLOCK_OFF_DEBUG_PIN 31 #endif // HAL_NFC_NFC_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_NFC_EVENT_DEBUG_PIN #define HAL_NFC_NFC_EVENT_DEBUG_PIN 31 #endif // HAL_NFC_DETECT_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_DETECT_EVENT_DEBUG_PIN #define HAL_NFC_DETECT_EVENT_DEBUG_PIN 31 #endif // HAL_NFC_TIMER4_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_TIMER4_EVENT_DEBUG_PIN #define HAL_NFC_TIMER4_EVENT_DEBUG_PIN 31 @@ -7327,23 +10586,149 @@ // +// NFC_T2T_PARSER_ENABLED - nfc_type_2_tag_parser - Parser for decoding Type 2 Tag data +//========================================================== +#ifndef NFC_T2T_PARSER_ENABLED +#define NFC_T2T_PARSER_ENABLED 0 +#endif +// NFC_T2T_PARSER_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NFC_T2T_PARSER_LOG_ENABLED +#define NFC_T2T_PARSER_LOG_ENABLED 0 +#endif +// NFC_T2T_PARSER_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NFC_T2T_PARSER_LOG_LEVEL +#define NFC_T2T_PARSER_LOG_LEVEL 3 +#endif + +// NFC_T2T_PARSER_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NFC_T2T_PARSER_INFO_COLOR +#define NFC_T2T_PARSER_INFO_COLOR 0 +#endif + +// + +// + +// NFC_T4T_APDU_ENABLED - nfc_t4t_apdu - APDU encoder/decoder for Type 4 Tag +//========================================================== +#ifndef NFC_T4T_APDU_ENABLED +#define NFC_T4T_APDU_ENABLED 0 +#endif +// NFC_T4T_APDU_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NFC_T4T_APDU_LOG_ENABLED +#define NFC_T4T_APDU_LOG_ENABLED 0 +#endif +// NFC_T4T_APDU_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NFC_T4T_APDU_LOG_LEVEL +#define NFC_T4T_APDU_LOG_LEVEL 3 +#endif + +// NFC_T4T_APDU_LOG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NFC_T4T_APDU_LOG_COLOR +#define NFC_T4T_APDU_LOG_COLOR 0 +#endif + +// + +// + +// NFC_T4T_CC_FILE_PARSER_ENABLED - nfc_t4t_cc_file - Capability Container file for Type 4 Tag +//========================================================== +#ifndef NFC_T4T_CC_FILE_PARSER_ENABLED +#define NFC_T4T_CC_FILE_PARSER_ENABLED 0 +#endif +// NFC_T4T_CC_FILE_PARSER_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NFC_T4T_CC_FILE_PARSER_LOG_ENABLED +#define NFC_T4T_CC_FILE_PARSER_LOG_ENABLED 0 +#endif +// NFC_T4T_CC_FILE_PARSER_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NFC_T4T_CC_FILE_PARSER_LOG_LEVEL +#define NFC_T4T_CC_FILE_PARSER_LOG_LEVEL 3 +#endif + +// NFC_T4T_CC_FILE_PARSER_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NFC_T4T_CC_FILE_PARSER_INFO_COLOR +#define NFC_T4T_CC_FILE_PARSER_INFO_COLOR 0 +#endif + +// + +// + // NFC_T4T_HAL_ENABLED - nfc_t4t_hal - Hardware Abstraction Layer for NFC library. //========================================================== #ifndef NFC_T4T_HAL_ENABLED #define NFC_T4T_HAL_ENABLED 0 #endif // NFCT_CONFIG_IRQ_PRIORITY - Interrupt priority - + // Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice -// <0=> 0 (highest) -// <1=> 1 -// <2=> 2 -// <3=> 3 -// <4=> 4 -// <5=> 5 -// <6=> 6 -// <7=> 7 +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 #ifndef NFCT_CONFIG_IRQ_PRIORITY #define NFCT_CONFIG_IRQ_PRIORITY 7 @@ -7355,88 +10740,88 @@ #define HAL_NFC_CONFIG_LOG_ENABLED 0 #endif // HAL_NFC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef HAL_NFC_CONFIG_LOG_LEVEL #define HAL_NFC_CONFIG_LOG_LEVEL 3 #endif // HAL_NFC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef HAL_NFC_CONFIG_INFO_COLOR #define HAL_NFC_CONFIG_INFO_COLOR 0 #endif // HAL_NFC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef HAL_NFC_CONFIG_DEBUG_COLOR #define HAL_NFC_CONFIG_DEBUG_COLOR 0 #endif // HAL_NFC_CONFIG_LOG_LEVEL - Default Severity level - -// <0=> Off -// <1=> Error -// <2=> Warning -// <3=> Info -// <4=> Debug + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug #ifndef HAL_NFC_CONFIG_LOG_LEVEL #define HAL_NFC_CONFIG_LOG_LEVEL 3 #endif // HAL_NFC_CONFIG_INFO_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef HAL_NFC_CONFIG_INFO_COLOR #define HAL_NFC_CONFIG_INFO_COLOR 0 #endif // HAL_NFC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. - -// <0=> Default -// <1=> Black -// <2=> Red -// <3=> Green -// <4=> Yellow -// <5=> Blue -// <6=> Magenta -// <7=> Cyan -// <8=> White + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White #ifndef HAL_NFC_CONFIG_DEBUG_COLOR #define HAL_NFC_CONFIG_DEBUG_COLOR 0 @@ -7450,560 +10835,560 @@ #define HAL_NFC_CONFIG_DEBUG_PIN_ENABLED 0 #endif // HAL_NFC_HCLOCK_ON_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_HCLOCK_ON_DEBUG_PIN #define HAL_NFC_HCLOCK_ON_DEBUG_PIN 31 #endif // HAL_NFC_HCLOCK_OFF_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_HCLOCK_OFF_DEBUG_PIN #define HAL_NFC_HCLOCK_OFF_DEBUG_PIN 31 #endif // HAL_NFC_NFC_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_NFC_EVENT_DEBUG_PIN #define HAL_NFC_NFC_EVENT_DEBUG_PIN 31 #endif // HAL_NFC_DETECT_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_DETECT_EVENT_DEBUG_PIN #define HAL_NFC_DETECT_EVENT_DEBUG_PIN 31 #endif // HAL_NFC_TIMER4_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_TIMER4_EVENT_DEBUG_PIN #define HAL_NFC_TIMER4_EVENT_DEBUG_PIN 31 #endif // HAL_NFC_HCLOCK_ON_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_HCLOCK_ON_DEBUG_PIN #define HAL_NFC_HCLOCK_ON_DEBUG_PIN 31 #endif // HAL_NFC_HCLOCK_OFF_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_HCLOCK_OFF_DEBUG_PIN #define HAL_NFC_HCLOCK_OFF_DEBUG_PIN 31 #endif // HAL_NFC_NFC_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_NFC_EVENT_DEBUG_PIN #define HAL_NFC_NFC_EVENT_DEBUG_PIN 31 #endif // HAL_NFC_DETECT_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_DETECT_EVENT_DEBUG_PIN #define HAL_NFC_DETECT_EVENT_DEBUG_PIN 31 #endif // HAL_NFC_TIMER4_EVENT_DEBUG_PIN - Pin number - -// <0=> 0 (P0.0) -// <1=> 1 (P0.1) -// <2=> 2 (P0.2) -// <3=> 3 (P0.3) -// <4=> 4 (P0.4) -// <5=> 5 (P0.5) -// <6=> 6 (P0.6) -// <7=> 7 (P0.7) -// <8=> 8 (P0.8) -// <9=> 9 (P0.9) -// <10=> 10 (P0.10) -// <11=> 11 (P0.11) -// <12=> 12 (P0.12) -// <13=> 13 (P0.13) -// <14=> 14 (P0.14) -// <15=> 15 (P0.15) -// <16=> 16 (P0.16) -// <17=> 17 (P0.17) -// <18=> 18 (P0.18) -// <19=> 19 (P0.19) -// <20=> 20 (P0.20) -// <21=> 21 (P0.21) -// <22=> 22 (P0.22) -// <23=> 23 (P0.23) -// <24=> 24 (P0.24) -// <25=> 25 (P0.25) -// <26=> 26 (P0.26) -// <27=> 27 (P0.27) -// <28=> 28 (P0.28) -// <29=> 29 (P0.29) -// <30=> 30 (P0.30) -// <31=> 31 (P0.31) -// <32=> 32 (P1.0) -// <33=> 33 (P1.1) -// <34=> 34 (P1.2) -// <35=> 35 (P1.3) -// <36=> 36 (P1.4) -// <37=> 37 (P1.5) -// <38=> 38 (P1.6) -// <39=> 39 (P1.7) -// <40=> 40 (P1.8) -// <41=> 41 (P1.9) -// <42=> 42 (P1.10) -// <43=> 43 (P1.11) -// <44=> 44 (P1.12) -// <45=> 45 (P1.13) -// <46=> 46 (P1.14) -// <47=> 47 (P1.15) -// <4294967295=> Not connected + +// <0=> 0 (P0.0) +// <1=> 1 (P0.1) +// <2=> 2 (P0.2) +// <3=> 3 (P0.3) +// <4=> 4 (P0.4) +// <5=> 5 (P0.5) +// <6=> 6 (P0.6) +// <7=> 7 (P0.7) +// <8=> 8 (P0.8) +// <9=> 9 (P0.9) +// <10=> 10 (P0.10) +// <11=> 11 (P0.11) +// <12=> 12 (P0.12) +// <13=> 13 (P0.13) +// <14=> 14 (P0.14) +// <15=> 15 (P0.15) +// <16=> 16 (P0.16) +// <17=> 17 (P0.17) +// <18=> 18 (P0.18) +// <19=> 19 (P0.19) +// <20=> 20 (P0.20) +// <21=> 21 (P0.21) +// <22=> 22 (P0.22) +// <23=> 23 (P0.23) +// <24=> 24 (P0.24) +// <25=> 25 (P0.25) +// <26=> 26 (P0.26) +// <27=> 27 (P0.27) +// <28=> 28 (P0.28) +// <29=> 29 (P0.29) +// <30=> 30 (P0.30) +// <31=> 31 (P0.31) +// <32=> 32 (P1.0) +// <33=> 33 (P1.1) +// <34=> 34 (P1.2) +// <35=> 35 (P1.3) +// <36=> 36 (P1.4) +// <37=> 37 (P1.5) +// <38=> 38 (P1.6) +// <39=> 39 (P1.7) +// <40=> 40 (P1.8) +// <41=> 41 (P1.9) +// <42=> 42 (P1.10) +// <43=> 43 (P1.11) +// <44=> 44 (P1.12) +// <45=> 45 (P1.13) +// <46=> 46 (P1.14) +// <47=> 47 (P1.15) +// <4294967295=> Not connected #ifndef HAL_NFC_TIMER4_EVENT_DEBUG_PIN #define HAL_NFC_TIMER4_EVENT_DEBUG_PIN 31 @@ -8013,510 +11398,491 @@ // -// -//========================================================== - -// nRF_Segger_RTT - +// NFC_T4T_HL_DETECTION_PROCEDURES_ENABLED - nfc_t4t_hl_detection_procedures - NDEF Detection Procedure for Type 4 Tag //========================================================== -// segger_rtt - SEGGER RTT - +#ifndef NFC_T4T_HL_DETECTION_PROCEDURES_ENABLED +#define NFC_T4T_HL_DETECTION_PROCEDURES_ENABLED 0 +#endif +// NFC_T4T_HL_DETECTION_PROCEDURES_LOG_ENABLED - Enables logging in the module. //========================================================== -// SEGGER_RTT_CONFIG_BUFFER_SIZE_UP - Size of upstream buffer. -// Note that either @ref NRF_LOG_BACKEND_RTT_OUTPUT_BUFFER_SIZE -// or this value is actually used. It depends on which one is bigger. - -#ifndef SEGGER_RTT_CONFIG_BUFFER_SIZE_UP -#define SEGGER_RTT_CONFIG_BUFFER_SIZE_UP 512 +#ifndef NFC_T4T_HL_DETECTION_PROCEDURES_LOG_ENABLED +#define NFC_T4T_HL_DETECTION_PROCEDURES_LOG_ENABLED 0 #endif +// NFC_T4T_HL_DETECTION_PROCEDURES_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -// SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS - Size of upstream buffer. -#ifndef SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS -#define SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS 2 +#ifndef NFC_T4T_HL_DETECTION_PROCEDURES_LOG_LEVEL +#define NFC_T4T_HL_DETECTION_PROCEDURES_LOG_LEVEL 3 #endif -// SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN - Size of upstream buffer. -#ifndef SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN -#define SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN 16 -#endif +// NFC_T4T_HL_DETECTION_PROCEDURES_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -// SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS - Size of upstream buffer. -#ifndef SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS -#define SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS 2 +#ifndef NFC_T4T_HL_DETECTION_PROCEDURES_INFO_COLOR +#define NFC_T4T_HL_DETECTION_PROCEDURES_INFO_COLOR 0 #endif -// SEGGER_RTT_CONFIG_DEFAULT_MODE - RTT behavior if the buffer is full. - - -// The following modes are supported: -// - SKIP - Do not block, output nothing. -// - TRIM - Do not block, output as much as fits. -// - BLOCK - Wait until there is space in the buffer. -// <0=> SKIP -// <1=> TRIM -// <2=> BLOCK_IF_FIFO_FULL +// -#ifndef SEGGER_RTT_CONFIG_DEFAULT_MODE -#define SEGGER_RTT_CONFIG_DEFAULT_MODE 0 +// APDU_BUFF_SIZE - Size (in bytes) of the buffer for APDU storage +#ifndef APDU_BUFF_SIZE +#define APDU_BUFF_SIZE 250 #endif -// -//========================================================== - -// -//========================================================== +// CC_STORAGE_BUFF_SIZE - Size (in bytes) of the buffer for CC file storage +#ifndef CC_STORAGE_BUFF_SIZE +#define CC_STORAGE_BUFF_SIZE 64 +#endif -// nRF_SoftDevice +// +// NFC_T4T_TLV_BLOCK_PARSER_ENABLED - nfc_t4t_tlv_block - TLV block for Type 4 Tag //========================================================== -// NRF_SDH_ANT_ENABLED - nrf_sdh_ant - SoftDevice ANT event handler -//========================================================== -#ifndef NRF_SDH_ANT_ENABLED -#define NRF_SDH_ANT_ENABLED 0 +#ifndef NFC_T4T_TLV_BLOCK_PARSER_ENABLED +#define NFC_T4T_TLV_BLOCK_PARSER_ENABLED 0 #endif -// ANT Channels - +// NFC_T4T_TLV_BLOCK_PARSER_LOG_ENABLED - Enables logging in the module. //========================================================== -// NRF_SDH_ANT_TOTAL_CHANNELS_ALLOCATED - Allocated ANT channels. -#ifndef NRF_SDH_ANT_TOTAL_CHANNELS_ALLOCATED -#define NRF_SDH_ANT_TOTAL_CHANNELS_ALLOCATED 0 +#ifndef NFC_T4T_TLV_BLOCK_PARSER_LOG_ENABLED +#define NFC_T4T_TLV_BLOCK_PARSER_LOG_ENABLED 0 #endif +// NFC_T4T_TLV_BLOCK_PARSER_LOG_LEVEL - Default Severity level + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug -// NRF_SDH_ANT_ENCRYPTED_CHANNELS - Encrypted ANT channels. -#ifndef NRF_SDH_ANT_ENCRYPTED_CHANNELS -#define NRF_SDH_ANT_ENCRYPTED_CHANNELS 0 +#ifndef NFC_T4T_TLV_BLOCK_PARSER_LOG_LEVEL +#define NFC_T4T_TLV_BLOCK_PARSER_LOG_LEVEL 3 #endif -// -//========================================================== - -// ANT Queues +// NFC_T4T_TLV_BLOCK_PARSER_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White -//========================================================== -// NRF_SDH_ANT_EVENT_QUEUE_SIZE - Event queue size. -#ifndef NRF_SDH_ANT_EVENT_QUEUE_SIZE -#define NRF_SDH_ANT_EVENT_QUEUE_SIZE 32 -#endif - -// NRF_SDH_ANT_BURST_QUEUE_SIZE - ANT burst queue size. -#ifndef NRF_SDH_ANT_BURST_QUEUE_SIZE -#define NRF_SDH_ANT_BURST_QUEUE_SIZE 128 +#ifndef NFC_T4T_TLV_BLOCK_PARSER_INFO_COLOR +#define NFC_T4T_TLV_BLOCK_PARSER_INFO_COLOR 0 #endif -// -//========================================================== +// -// ANT Observers - Observers and priority levels +// +// //========================================================== -// NRF_SDH_ANT_OBSERVER_PRIO_LEVELS - Total number of priority levels for ANT observers. -// This setting configures the number of priority levels available for the ANT event handlers. -// The priority level of a handler determines the order in which it receives events, with respect to other handlers. - -#ifndef NRF_SDH_ANT_OBSERVER_PRIO_LEVELS -#define NRF_SDH_ANT_OBSERVER_PRIO_LEVELS 2 -#endif -// ANT Observers priorities - Invididual priorities +// nRF_SoftDevice //========================================================== -// ANT_BPWR_ANT_OBSERVER_PRIO -// Priority with which ANT events are dispatched to the Bicycle Power Profile. - -#ifndef ANT_BPWR_ANT_OBSERVER_PRIO -#define ANT_BPWR_ANT_OBSERVER_PRIO 1 -#endif - -// ANT_BSC_ANT_OBSERVER_PRIO -// Priority with which ANT events are dispatched to the Bicycle Speed and Cadence Profile. - -#ifndef ANT_BSC_ANT_OBSERVER_PRIO -#define ANT_BSC_ANT_OBSERVER_PRIO 1 -#endif - -// ANT_ENCRYPT_ANT_OBSERVER_PRIO -// Priority with which ANT events are dispatched to the Cryptographic ANT stack configuration module. - -#ifndef ANT_ENCRYPT_ANT_OBSERVER_PRIO -#define ANT_ENCRYPT_ANT_OBSERVER_PRIO 1 -#endif - -// ANT_HRM_ANT_OBSERVER_PRIO -// Priority with which ANT events are dispatched to the Heart Rate Monitor. - -#ifndef ANT_HRM_ANT_OBSERVER_PRIO -#define ANT_HRM_ANT_OBSERVER_PRIO 1 -#endif - -// ANT_SDM_ANT_OBSERVER_PRIO -// Priority with which ANT events are dispatched to the Stride Based Speed and Distance Monitor Profile. - -#ifndef ANT_SDM_ANT_OBSERVER_PRIO -#define ANT_SDM_ANT_OBSERVER_PRIO 1 -#endif - -// ANT_STATE_INDICATOR_ANT_OBSERVER_PRIO -// Priority with which ANT events are dispatched to the ANT state indicator module. - -#ifndef ANT_STATE_INDICATOR_ANT_OBSERVER_PRIO -#define ANT_STATE_INDICATOR_ANT_OBSERVER_PRIO 1 -#endif - -// BSP_BTN_ANT_OBSERVER_PRIO -// Priority with which ANT events are dispatched to the Button Control module. - -#ifndef BSP_BTN_ANT_OBSERVER_PRIO -#define BSP_BTN_ANT_OBSERVER_PRIO 1 -#endif - -// +// NRF_SDH_BLE_ENABLED - nrf_sdh_ble - SoftDevice BLE event handler //========================================================== +#ifndef NRF_SDH_BLE_ENABLED +#define NRF_SDH_BLE_ENABLED 0 +#endif +// BLE Stack configuration - Stack configuration parameters -// +// The SoftDevice handler will configure the stack with these parameters when calling @ref nrf_sdh_ble_default_cfg_set. +// Other libraries might depend on these values; keep them up-to-date even if you are not explicitely calling @ref nrf_sdh_ble_default_cfg_set. //========================================================== +// NRF_SDH_BLE_GAP_DATA_LENGTH <27-251> -// +// Requested BLE GAP data length to be negotiated. -// NRF_SDH_BLE_ENABLED - nrf_sdh_ble - SoftDevice BLE event handler -//========================================================== -#ifndef NRF_SDH_BLE_ENABLED -#define NRF_SDH_BLE_ENABLED 1 +#ifndef NRF_SDH_BLE_GAP_DATA_LENGTH +#define NRF_SDH_BLE_GAP_DATA_LENGTH 27 #endif -// BLE Stack configuration - Stack configuration parameters -// These values are not used directly by the SoftDevice handler but the application or other libraries might depend on them. -// Keep them up-to-date with the desired configuration. -//========================================================== -// NRF_SDH_BLE_PERIPHERAL_LINK_COUNT - Maximum number of peripheral links. +// NRF_SDH_BLE_PERIPHERAL_LINK_COUNT - Maximum number of peripheral links. #ifndef NRF_SDH_BLE_PERIPHERAL_LINK_COUNT #define NRF_SDH_BLE_PERIPHERAL_LINK_COUNT 0 #endif -// NRF_SDH_BLE_CENTRAL_LINK_COUNT - Maximum number of central links. +// NRF_SDH_BLE_CENTRAL_LINK_COUNT - Maximum number of central links. #ifndef NRF_SDH_BLE_CENTRAL_LINK_COUNT #define NRF_SDH_BLE_CENTRAL_LINK_COUNT 0 #endif -// NRF_SDH_BLE_TOTAL_LINK_COUNT - Maximum number of total concurrent connections using the default configuration. +// NRF_SDH_BLE_TOTAL_LINK_COUNT - Total link count. +// Maximum number of total concurrent connections using the default configuration. + #ifndef NRF_SDH_BLE_TOTAL_LINK_COUNT #define NRF_SDH_BLE_TOTAL_LINK_COUNT 1 #endif -// NRF_SDH_BLE_GAP_EVENT_LENGTH - The time set aside for this connection on every connection interval in 1.25 ms units. +// NRF_SDH_BLE_GAP_EVENT_LENGTH - GAP event length. +// The time set aside for this connection on every connection interval in 1.25 ms units. + #ifndef NRF_SDH_BLE_GAP_EVENT_LENGTH -#define NRF_SDH_BLE_GAP_EVENT_LENGTH 3 +#define NRF_SDH_BLE_GAP_EVENT_LENGTH 6 #endif -// NRF_SDH_BLE_GATT_MAX_MTU_SIZE - Static maximum MTU size. +// NRF_SDH_BLE_GATT_MAX_MTU_SIZE - Static maximum MTU size. #ifndef NRF_SDH_BLE_GATT_MAX_MTU_SIZE #define NRF_SDH_BLE_GATT_MAX_MTU_SIZE 23 #endif -// NRF_SDH_BLE_GATTS_ATTR_TAB_SIZE - Attribute Table size in bytes. The size must be a multiple of 4. +// NRF_SDH_BLE_GATTS_ATTR_TAB_SIZE - Attribute Table size in bytes. The size must be a multiple of 4. #ifndef NRF_SDH_BLE_GATTS_ATTR_TAB_SIZE #define NRF_SDH_BLE_GATTS_ATTR_TAB_SIZE 1408 #endif -// NRF_SDH_BLE_VS_UUID_COUNT - The number of vendor-specific UUIDs. +// NRF_SDH_BLE_VS_UUID_COUNT - The number of vendor-specific UUIDs. #ifndef NRF_SDH_BLE_VS_UUID_COUNT #define NRF_SDH_BLE_VS_UUID_COUNT 0 #endif // NRF_SDH_BLE_SERVICE_CHANGED - Include the Service Changed characteristic in the Attribute Table. - + #ifndef NRF_SDH_BLE_SERVICE_CHANGED #define NRF_SDH_BLE_SERVICE_CHANGED 0 #endif -// +// //========================================================== // BLE Observers - Observers and priority levels //========================================================== -// NRF_SDH_BLE_OBSERVER_PRIO_LEVELS - Total number of priority levels for BLE observers. +// NRF_SDH_BLE_OBSERVER_PRIO_LEVELS - Total number of priority levels for BLE observers. // This setting configures the number of priority levels available for BLE event handlers. // The priority level of a handler determines the order in which it receives events, with respect to other handlers. #ifndef NRF_SDH_BLE_OBSERVER_PRIO_LEVELS -#define NRF_SDH_BLE_OBSERVER_PRIO_LEVELS 3 +#define NRF_SDH_BLE_OBSERVER_PRIO_LEVELS 4 #endif // BLE Observers priorities - Invididual priorities //========================================================== -// BLE_ADV_BLE_OBSERVER_PRIO +// BLE_ADV_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Advertising module. #ifndef BLE_ADV_BLE_OBSERVER_PRIO -#define BLE_ADV_BLE_OBSERVER_PRIO 2 +#define BLE_ADV_BLE_OBSERVER_PRIO 1 #endif -// BLE_ANCS_C_BLE_OBSERVER_PRIO +// BLE_ANCS_C_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Apple Notification Service Client. #ifndef BLE_ANCS_C_BLE_OBSERVER_PRIO #define BLE_ANCS_C_BLE_OBSERVER_PRIO 2 #endif -// BLE_ANS_C_BLE_OBSERVER_PRIO +// BLE_ANS_C_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Alert Notification Service Client. #ifndef BLE_ANS_C_BLE_OBSERVER_PRIO #define BLE_ANS_C_BLE_OBSERVER_PRIO 2 #endif -// BLE_BAS_BLE_OBSERVER_PRIO +// BLE_BAS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Battery Service. #ifndef BLE_BAS_BLE_OBSERVER_PRIO #define BLE_BAS_BLE_OBSERVER_PRIO 2 #endif -// BLE_BAS_C_BLE_OBSERVER_PRIO +// BLE_BAS_C_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Battery Service Client. #ifndef BLE_BAS_C_BLE_OBSERVER_PRIO #define BLE_BAS_C_BLE_OBSERVER_PRIO 2 #endif -// BLE_BPS_BLE_OBSERVER_PRIO +// BLE_BPS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Blood Pressure Service. #ifndef BLE_BPS_BLE_OBSERVER_PRIO #define BLE_BPS_BLE_OBSERVER_PRIO 2 #endif -// BLE_CONN_PARAMS_BLE_OBSERVER_PRIO +// BLE_CONN_PARAMS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Connection parameters module. #ifndef BLE_CONN_PARAMS_BLE_OBSERVER_PRIO -#define BLE_CONN_PARAMS_BLE_OBSERVER_PRIO 2 +#define BLE_CONN_PARAMS_BLE_OBSERVER_PRIO 1 #endif -// BLE_CONN_STATE_BLE_OBSERVER_PRIO +// BLE_CONN_STATE_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Connection State module. #ifndef BLE_CONN_STATE_BLE_OBSERVER_PRIO #define BLE_CONN_STATE_BLE_OBSERVER_PRIO 0 #endif -// BLE_CSCS_BLE_OBSERVER_PRIO +// BLE_CSCS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Cycling Speed and Cadence Service. #ifndef BLE_CSCS_BLE_OBSERVER_PRIO #define BLE_CSCS_BLE_OBSERVER_PRIO 2 #endif -// BLE_CTS_C_BLE_OBSERVER_PRIO +// BLE_CTS_C_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Current Time Service Client. #ifndef BLE_CTS_C_BLE_OBSERVER_PRIO #define BLE_CTS_C_BLE_OBSERVER_PRIO 2 #endif -// BLE_DB_DISC_BLE_OBSERVER_PRIO +// BLE_DB_DISC_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Database Discovery module. #ifndef BLE_DB_DISC_BLE_OBSERVER_PRIO #define BLE_DB_DISC_BLE_OBSERVER_PRIO 1 #endif -// BLE_DFU_BLE_OBSERVER_PRIO +// BLE_DFU_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the DFU Service. #ifndef BLE_DFU_BLE_OBSERVER_PRIO #define BLE_DFU_BLE_OBSERVER_PRIO 2 #endif -// BLE_GLS_BLE_OBSERVER_PRIO +// BLE_DIS_C_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Device Information Client. + +#ifndef BLE_DIS_C_BLE_OBSERVER_PRIO +#define BLE_DIS_C_BLE_OBSERVER_PRIO 2 +#endif + +// BLE_GLS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Glucose Service. #ifndef BLE_GLS_BLE_OBSERVER_PRIO #define BLE_GLS_BLE_OBSERVER_PRIO 2 #endif -// BLE_HIDS_BLE_OBSERVER_PRIO +// BLE_HIDS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Human Interface Device Service. #ifndef BLE_HIDS_BLE_OBSERVER_PRIO #define BLE_HIDS_BLE_OBSERVER_PRIO 2 #endif -// BLE_HRS_BLE_OBSERVER_PRIO +// BLE_HRS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Heart Rate Service. #ifndef BLE_HRS_BLE_OBSERVER_PRIO #define BLE_HRS_BLE_OBSERVER_PRIO 2 #endif -// BLE_HRS_C_BLE_OBSERVER_PRIO +// BLE_HRS_C_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Heart Rate Service Client. #ifndef BLE_HRS_C_BLE_OBSERVER_PRIO #define BLE_HRS_C_BLE_OBSERVER_PRIO 2 #endif -// BLE_HTS_BLE_OBSERVER_PRIO +// BLE_HTS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Health Thermometer Service. #ifndef BLE_HTS_BLE_OBSERVER_PRIO #define BLE_HTS_BLE_OBSERVER_PRIO 2 #endif -// BLE_IAS_BLE_OBSERVER_PRIO +// BLE_IAS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Immediate Alert Service. #ifndef BLE_IAS_BLE_OBSERVER_PRIO #define BLE_IAS_BLE_OBSERVER_PRIO 2 #endif -// BLE_IAS_C_BLE_OBSERVER_PRIO +// BLE_IAS_C_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Immediate Alert Service Client. #ifndef BLE_IAS_C_BLE_OBSERVER_PRIO #define BLE_IAS_C_BLE_OBSERVER_PRIO 2 #endif -// BLE_LBS_BLE_OBSERVER_PRIO +// BLE_LBS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the LED Button Service. #ifndef BLE_LBS_BLE_OBSERVER_PRIO #define BLE_LBS_BLE_OBSERVER_PRIO 2 #endif -// BLE_LBS_C_BLE_OBSERVER_PRIO +// BLE_LBS_C_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the LED Button Service Client. #ifndef BLE_LBS_C_BLE_OBSERVER_PRIO #define BLE_LBS_C_BLE_OBSERVER_PRIO 2 #endif -// BLE_LLS_BLE_OBSERVER_PRIO +// BLE_LESC_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the BLE LESC module. + +#ifndef BLE_LESC_OBSERVER_PRIO +#define BLE_LESC_OBSERVER_PRIO 2 +#endif + +// BLE_LLS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Link Loss Service. #ifndef BLE_LLS_BLE_OBSERVER_PRIO #define BLE_LLS_BLE_OBSERVER_PRIO 2 #endif -// BLE_LNS_BLE_OBSERVER_PRIO +// BLE_LNS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Location Navigation Service. #ifndef BLE_LNS_BLE_OBSERVER_PRIO #define BLE_LNS_BLE_OBSERVER_PRIO 2 #endif -// BLE_NUS_BLE_OBSERVER_PRIO +// BLE_NUS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the UART Service. #ifndef BLE_NUS_BLE_OBSERVER_PRIO #define BLE_NUS_BLE_OBSERVER_PRIO 2 #endif -// BLE_NUS_C_BLE_OBSERVER_PRIO +// BLE_NUS_C_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the UART Central Service. #ifndef BLE_NUS_C_BLE_OBSERVER_PRIO #define BLE_NUS_C_BLE_OBSERVER_PRIO 2 #endif -// BLE_OTS_BLE_OBSERVER_PRIO +// BLE_OTS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Object transfer service. #ifndef BLE_OTS_BLE_OBSERVER_PRIO #define BLE_OTS_BLE_OBSERVER_PRIO 2 #endif -// BLE_OTS_C_BLE_OBSERVER_PRIO +// BLE_OTS_C_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Object transfer service client. #ifndef BLE_OTS_C_BLE_OBSERVER_PRIO #define BLE_OTS_C_BLE_OBSERVER_PRIO 2 #endif -// BLE_RSCS_BLE_OBSERVER_PRIO +// BLE_RSCS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Running Speed and Cadence Service. #ifndef BLE_RSCS_BLE_OBSERVER_PRIO #define BLE_RSCS_BLE_OBSERVER_PRIO 2 #endif -// BLE_RSCS_C_BLE_OBSERVER_PRIO +// BLE_RSCS_C_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Running Speed and Cadence Client. #ifndef BLE_RSCS_C_BLE_OBSERVER_PRIO #define BLE_RSCS_C_BLE_OBSERVER_PRIO 2 #endif -// BLE_TPS_BLE_OBSERVER_PRIO +// BLE_TPS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the TX Power Service. #ifndef BLE_TPS_BLE_OBSERVER_PRIO #define BLE_TPS_BLE_OBSERVER_PRIO 2 #endif -// BSP_BTN_BLE_OBSERVER_PRIO +// BSP_BTN_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Button Control module. #ifndef BSP_BTN_BLE_OBSERVER_PRIO #define BSP_BTN_BLE_OBSERVER_PRIO 1 #endif -// NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO +// NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the NFC pairing library. + +#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO +#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1 +#endif + +// NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the NFC pairing library. + +#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO +#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1 +#endif + +// NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the NFC pairing library. #ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO #define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1 #endif -// NRF_BLE_BMS_BLE_OBSERVER_PRIO +// NRF_BLE_BMS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Bond Management Service. #ifndef NRF_BLE_BMS_BLE_OBSERVER_PRIO #define NRF_BLE_BMS_BLE_OBSERVER_PRIO 2 #endif -// NRF_BLE_CGMS_BLE_OBSERVER_PRIO +// NRF_BLE_CGMS_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Contiuon Glucose Monitoring Service. #ifndef NRF_BLE_CGMS_BLE_OBSERVER_PRIO #define NRF_BLE_CGMS_BLE_OBSERVER_PRIO 2 #endif -// NRF_BLE_GATTS_C_BLE_OBSERVER_PRIO +// NRF_BLE_ES_BLE_OBSERVER_PRIO +// Priority with which BLE events are dispatched to the Eddystone module. + +#ifndef NRF_BLE_ES_BLE_OBSERVER_PRIO +#define NRF_BLE_ES_BLE_OBSERVER_PRIO 2 +#endif + +// NRF_BLE_GATTS_C_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the GATT Service Client. #ifndef NRF_BLE_GATTS_C_BLE_OBSERVER_PRIO #define NRF_BLE_GATTS_C_BLE_OBSERVER_PRIO 2 #endif -// NRF_BLE_GATT_BLE_OBSERVER_PRIO +// NRF_BLE_GATT_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the GATT module. #ifndef NRF_BLE_GATT_BLE_OBSERVER_PRIO -#define NRF_BLE_GATT_BLE_OBSERVER_PRIO 2 +#define NRF_BLE_GATT_BLE_OBSERVER_PRIO 1 #endif -// NRF_BLE_QWR_BLE_OBSERVER_PRIO +// NRF_BLE_QWR_BLE_OBSERVER_PRIO // Priority with which BLE events are dispatched to the Queued writes module. #ifndef NRF_BLE_QWR_BLE_OBSERVER_PRIO #define NRF_BLE_QWR_BLE_OBSERVER_PRIO 2 #endif -// PM_BLE_OBSERVER_PRIO -// Priority with which BLE events are dispatched to the Peer Manager module. - +// PM_BLE_OBSERVER_PRIO - Priority with which BLE events are dispatched to the Peer Manager module. #ifndef PM_BLE_OBSERVER_PRIO -#define PM_BLE_OBSERVER_PRIO 2 +#define PM_BLE_OBSERVER_PRIO 1 #endif -// +// //========================================================== -// +// //========================================================== @@ -8525,46 +11891,46 @@ // NRF_SDH_ENABLED - nrf_sdh - SoftDevice handler //========================================================== #ifndef NRF_SDH_ENABLED -#define NRF_SDH_ENABLED 1 +#define NRF_SDH_ENABLED 0 #endif -// Dispatch model +// Dispatch model // This setting configures how Stack events are dispatched to the application. //========================================================== // NRF_SDH_DISPATCH_MODEL - + // NRF_SDH_DISPATCH_MODEL_INTERRUPT: SoftDevice events are passed to the application from the interrupt context. // NRF_SDH_DISPATCH_MODEL_APPSH: SoftDevice events are scheduled using @ref app_scheduler. // NRF_SDH_DISPATCH_MODEL_POLLING: SoftDevice events are to be fetched manually. -// <0=> NRF_SDH_DISPATCH_MODEL_INTERRUPT -// <1=> NRF_SDH_DISPATCH_MODEL_APPSH -// <2=> NRF_SDH_DISPATCH_MODEL_POLLING +// <0=> NRF_SDH_DISPATCH_MODEL_INTERRUPT +// <1=> NRF_SDH_DISPATCH_MODEL_APPSH +// <2=> NRF_SDH_DISPATCH_MODEL_POLLING #ifndef NRF_SDH_DISPATCH_MODEL #define NRF_SDH_DISPATCH_MODEL 0 #endif -// +// //========================================================== // Clock - SoftDevice clock configuration //========================================================== // NRF_SDH_CLOCK_LF_SRC - SoftDevice clock source. - -// <0=> NRF_CLOCK_LF_SRC_RC -// <1=> NRF_CLOCK_LF_SRC_XTAL -// <2=> NRF_CLOCK_LF_SRC_SYNTH + +// <0=> NRF_CLOCK_LF_SRC_RC +// <1=> NRF_CLOCK_LF_SRC_XTAL +// <2=> NRF_CLOCK_LF_SRC_SYNTH #include "nrf5x_lf_clk_helper.h" -// NRF_SDH_CLOCK_LF_RC_CTIV - SoftDevice calibration timer interval. +// NRF_SDH_CLOCK_LF_RC_CTIV - SoftDevice calibration timer interval. #ifndef NRF_SDH_CLOCK_LF_RC_CTIV #define NRF_SDH_CLOCK_LF_RC_CTIV 0 #endif -// NRF_SDH_CLOCK_LF_RC_TEMP_CTIV - SoftDevice calibration timer interval under constant temperature. +// NRF_SDH_CLOCK_LF_RC_TEMP_CTIV - SoftDevice calibration timer interval under constant temperature. // How often (in number of calibration intervals) the RC oscillator shall be calibrated // if the temperature has not changed. @@ -8572,28 +11938,32 @@ #define NRF_SDH_CLOCK_LF_RC_TEMP_CTIV 0 #endif -// NRF_SDH_CLOCK_LF_XTAL_ACCURACY - External crystal clock accuracy used in the LL to compute timing windows. - -// <0=> NRF_CLOCK_LF_XTAL_ACCURACY_250_PPM -// <1=> NRF_CLOCK_LF_XTAL_ACCURACY_500_PPM -// <2=> NRF_CLOCK_LF_XTAL_ACCURACY_150_PPM -// <3=> NRF_CLOCK_LF_XTAL_ACCURACY_100_PPM -// <4=> NRF_CLOCK_LF_XTAL_ACCURACY_75_PPM -// <5=> NRF_CLOCK_LF_XTAL_ACCURACY_50_PPM -// <6=> NRF_CLOCK_LF_XTAL_ACCURACY_30_PPM -// <7=> NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM +// NRF_SDH_CLOCK_LF_ACCURACY - External clock accuracy used in the LL to compute timing. + +// <0=> NRF_CLOCK_LF_ACCURACY_250_PPM +// <1=> NRF_CLOCK_LF_ACCURACY_500_PPM +// <2=> NRF_CLOCK_LF_ACCURACY_150_PPM +// <3=> NRF_CLOCK_LF_ACCURACY_100_PPM +// <4=> NRF_CLOCK_LF_ACCURACY_75_PPM +// <5=> NRF_CLOCK_LF_ACCURACY_50_PPM +// <6=> NRF_CLOCK_LF_ACCURACY_30_PPM +// <7=> NRF_CLOCK_LF_ACCURACY_20_PPM +// <8=> NRF_CLOCK_LF_ACCURACY_10_PPM +// <9=> NRF_CLOCK_LF_ACCURACY_5_PPM +// <10=> NRF_CLOCK_LF_ACCURACY_2_PPM +// <11=> NRF_CLOCK_LF_ACCURACY_1_PPM -#ifndef NRF_SDH_CLOCK_LF_XTAL_ACCURACY -#define NRF_SDH_CLOCK_LF_XTAL_ACCURACY 7 +#ifndef NRF_SDH_CLOCK_LF_ACCURACY +#define NRF_SDH_CLOCK_LF_ACCURACY 7 #endif -// +// //========================================================== // SDH Observers - Observers and priority levels //========================================================== -// NRF_SDH_REQ_OBSERVER_PRIO_LEVELS - Total number of priority levels for request observers. +// NRF_SDH_REQ_OBSERVER_PRIO_LEVELS - Total number of priority levels for request observers. // This setting configures the number of priority levels available for the SoftDevice request event handlers. // The priority level of a handler determines the order in which it receives events, with respect to other handlers. @@ -8601,7 +11971,7 @@ #define NRF_SDH_REQ_OBSERVER_PRIO_LEVELS 2 #endif -// NRF_SDH_STATE_OBSERVER_PRIO_LEVELS - Total number of priority levels for state observers. +// NRF_SDH_STATE_OBSERVER_PRIO_LEVELS - Total number of priority levels for state observers. // This setting configures the number of priority levels available for the SoftDevice state event handlers. // The priority level of a handler determines the order in which it receives events, with respect to other handlers. @@ -8609,7 +11979,7 @@ #define NRF_SDH_STATE_OBSERVER_PRIO_LEVELS 2 #endif -// NRF_SDH_STACK_OBSERVER_PRIO_LEVELS - Total number of priority levels for stack event observers. +// NRF_SDH_STACK_OBSERVER_PRIO_LEVELS - Total number of priority levels for stack event observers. // This setting configures the number of priority levels available for the SoftDevice stack event handlers (ANT, BLE, SoC). // The priority level of a handler determines the order in which it receives events, with respect to other handlers. @@ -8621,34 +11991,34 @@ // State Observers priorities - Invididual priorities //========================================================== -// CLOCK_CONFIG_STATE_OBSERVER_PRIO +// CLOCK_CONFIG_STATE_OBSERVER_PRIO // Priority with which state events are dispatched to the Clock driver. #ifndef CLOCK_CONFIG_STATE_OBSERVER_PRIO #define CLOCK_CONFIG_STATE_OBSERVER_PRIO 0 #endif -// POWER_CONFIG_STATE_OBSERVER_PRIO +// POWER_CONFIG_STATE_OBSERVER_PRIO // Priority with which state events are dispatched to the Power driver. #ifndef POWER_CONFIG_STATE_OBSERVER_PRIO #define POWER_CONFIG_STATE_OBSERVER_PRIO 0 #endif -// RNG_CONFIG_STATE_OBSERVER_PRIO +// RNG_CONFIG_STATE_OBSERVER_PRIO // Priority with which state events are dispatched to this module. #ifndef RNG_CONFIG_STATE_OBSERVER_PRIO #define RNG_CONFIG_STATE_OBSERVER_PRIO 0 #endif -// +// //========================================================== // Stack Event Observers priorities - Invididual priorities //========================================================== -// NRF_SDH_ANT_STACK_OBSERVER_PRIO +// NRF_SDH_ANT_STACK_OBSERVER_PRIO // This setting configures the priority with which ANT events are processed with respect to other events coming from the stack. // Modify this setting if you need to have ANT events dispatched before or after other stack events, such as BLE or SoC. // Zero is the highest priority. @@ -8657,7 +12027,7 @@ #define NRF_SDH_ANT_STACK_OBSERVER_PRIO 0 #endif -// NRF_SDH_BLE_STACK_OBSERVER_PRIO +// NRF_SDH_BLE_STACK_OBSERVER_PRIO // This setting configures the priority with which BLE events are processed with respect to other events coming from the stack. // Modify this setting if you need to have BLE events dispatched before or after other stack events, such as ANT or SoC. // Zero is the highest priority. @@ -8666,7 +12036,7 @@ #define NRF_SDH_BLE_STACK_OBSERVER_PRIO 0 #endif -// NRF_SDH_SOC_STACK_OBSERVER_PRIO +// NRF_SDH_SOC_STACK_OBSERVER_PRIO // This setting configures the priority with which SoC events are processed with respect to other events coming from the stack. // Modify this setting if you need to have SoC events dispatched before or after other stack events, such as ANT or BLE. // Zero is the highest priority. @@ -8675,10 +12045,10 @@ #define NRF_SDH_SOC_STACK_OBSERVER_PRIO 0 #endif -// +// //========================================================== -// +// //========================================================== @@ -8692,7 +12062,7 @@ // SoC Observers - Observers and priority levels //========================================================== -// NRF_SDH_SOC_OBSERVER_PRIO_LEVELS - Total number of priority levels for SoC observers. +// NRF_SDH_SOC_OBSERVER_PRIO_LEVELS - Total number of priority levels for SoC observers. // This setting configures the number of priority levels available for the SoC event handlers. // The priority level of a handler determines the order in which it receives events, with respect to other handlers. @@ -8703,44 +12073,44 @@ // SoC Observers priorities - Invididual priorities //========================================================== -// BLE_ADV_SOC_OBSERVER_PRIO +// BLE_ADV_SOC_OBSERVER_PRIO // Priority with which SoC events are dispatched to the Advertising module. #ifndef BLE_ADV_SOC_OBSERVER_PRIO #define BLE_ADV_SOC_OBSERVER_PRIO 1 #endif -// BLE_DFU_SOC_OBSERVER_PRIO +// BLE_DFU_SOC_OBSERVER_PRIO // Priority with which BLE events are dispatched to the DFU Service. #ifndef BLE_DFU_SOC_OBSERVER_PRIO #define BLE_DFU_SOC_OBSERVER_PRIO 1 #endif -// CLOCK_CONFIG_SOC_OBSERVER_PRIO +// CLOCK_CONFIG_SOC_OBSERVER_PRIO // Priority with which SoC events are dispatched to the Clock driver. #ifndef CLOCK_CONFIG_SOC_OBSERVER_PRIO #define CLOCK_CONFIG_SOC_OBSERVER_PRIO 0 #endif -// POWER_CONFIG_SOC_OBSERVER_PRIO +// POWER_CONFIG_SOC_OBSERVER_PRIO // Priority with which SoC events are dispatched to the Power driver. #ifndef POWER_CONFIG_SOC_OBSERVER_PRIO #define POWER_CONFIG_SOC_OBSERVER_PRIO 0 #endif -// +// //========================================================== -// +// //========================================================== // -// +// //========================================================== // <<< end of configuration section >>> diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h index 8559dd30e9d..bef4c0ee365 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h @@ -3218,40 +3218,34 @@ // -// needed to build -#define NRFX_SPIM0_ENABLED 1 -#define NRFX_SPIM1_ENABLED 1 -#define NRFX_SPIM2_ENABLED 1 - - // NRFX_SPIM_ENABLED - nrfx_spim - SPIM peripheral driver //========================================================== #ifndef NRFX_SPIM_ENABLED -#define NRFX_SPIM_ENABLED 0 +#define NRFX_SPIM_ENABLED 1 #endif // NRFX_SPIM0_ENABLED - Enable SPIM0 instance - + #ifndef NRFX_SPIM0_ENABLED -#define NRFX_SPIM0_ENABLED 0 +#define NRFX_SPIM0_ENABLED 1 #endif // NRFX_SPIM1_ENABLED - Enable SPIM1 instance #ifndef NRFX_SPIM1_ENABLED -#define NRFX_SPIM1_ENABLED 0 +#define NRFX_SPIM1_ENABLED 1 #endif // NRFX_SPIM2_ENABLED - Enable SPIM2 instance - + #ifndef NRFX_SPIM2_ENABLED -#define NRFX_SPIM2_ENABLED 0 +#define NRFX_SPIM2_ENABLED 1 #endif // NRFX_SPIM3_ENABLED - Enable SPIM3 instance - + #ifndef NRFX_SPIM3_ENABLED #define NRFX_SPIM3_ENABLED 0 @@ -3452,18 +3446,15 @@ // NRFX_SPI_ENABLED - nrfx_spi - SPI peripheral driver //========================================================== -// needed these to build! -#define NRFX_SPI_ENABLED 1 -#define NRFX_SPI0_ENABLED 1 #ifndef NRFX_SPI_ENABLED -#define NRFX_SPI_ENABLED 0 +#define NRFX_SPI_ENABLED 1 #endif // NRFX_SPI0_ENABLED - Enable SPI0 instance - + #ifndef NRFX_SPI0_ENABLED -#define NRFX_SPI0_ENABLED 0 +#define NRFX_SPI0_ENABLED 1 #endif // NRFX_SPI1_ENABLED - Enable SPI1 instance @@ -5224,18 +5215,13 @@ #define NRF_SPI_DRV_MISO_PULLUP_CFG 1 #endif -// needed these to build! -#define SPI0_ENABLED 1 -#define SPI1_ENABLED 1 -#define SPI2_ENABLED 1 - // SPI0_ENABLED - Enable SPI0 instance //========================================================== #ifndef SPI0_ENABLED -#define SPI0_ENABLED 0 +#define SPI0_ENABLED 1 #endif // SPI0_USE_EASY_DMA - Use EasyDMA - + #ifndef SPI0_USE_EASY_DMA #define SPI0_USE_EASY_DMA 1 @@ -5246,10 +5232,10 @@ // SPI1_ENABLED - Enable SPI1 instance //========================================================== #ifndef SPI1_ENABLED -#define SPI1_ENABLED 0 +#define SPI1_ENABLED 1 #endif // SPI1_USE_EASY_DMA - Use EasyDMA - + #ifndef SPI1_USE_EASY_DMA #define SPI1_USE_EASY_DMA 1 @@ -5260,10 +5246,10 @@ // SPI2_ENABLED - Enable SPI2 instance //========================================================== #ifndef SPI2_ENABLED -#define SPI2_ENABLED 0 +#define SPI2_ENABLED 1 #endif // SPI2_USE_EASY_DMA - Use EasyDMA - + #ifndef SPI2_USE_EASY_DMA #define SPI2_USE_EASY_DMA 1 @@ -5608,12 +5594,10 @@ #define UART_LEGACY_SUPPORT 1 #endif -// needed for Mbed build -#define UART0_ENABLED 1 // UART0_ENABLED - Enable UART0 instance //========================================================== #ifndef UART0_ENABLED -#define UART0_ENABLED 0 +#define UART0_ENABLED 1 #endif // UART0_CONFIG_USE_EASY_DMA - Default setting for using EasyDMA diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/i2c_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/i2c_api.c index 16ea14f9196..e84078e0a9b 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/i2c_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/i2c_api.c @@ -252,8 +252,10 @@ void i2c_configure_twi_instance(i2c_t *obj) /* Force resource release. This is necessary because mbed drivers don't * deinitialize on object destruction. */ - nrf_drv_common_irq_disable(nrf_drv_get_IRQn((void *) nordic_nrf5_twi_register[instance])); - nrf_drv_common_per_res_release(nordic_nrf5_twi_register[instance]); + NRFX_IRQ_DISABLE((nrfx_get_irq_number((void const*)nordic_nrf5_twi_register[instance]))); +// RF - there doesn't appear to be a replacement for nrf_drv_common_per_res_release() ! +// futher investigation required +// nrf_drv_common_per_res_release(nordic_nrf5_twi_register[instance]); /* Reset shorts register. */ nrf_twi_shorts_set(nordic_nrf5_twi_register[instance], 0); @@ -585,8 +587,9 @@ static void i2c_configure_driver_instance(i2c_t *obj) /* Force resource release. This is necessary because mbed drivers don't * deinitialize on object destruction. */ - nrf_drv_common_irq_disable(nrf_drv_get_IRQn((void *) nordic_nrf5_twi_register[instance])); - nrf_drv_common_per_res_release(nordic_nrf5_twi_register[instance]); + NRFX_IRQ_DISABLE((nrfx_get_irq_number((void const*)nordic_nrf5_twi_register[instance]))); +// RF - there doesn't appear to be a replacement for nrf_drv_common_per_res_release() ! +// nrf_drv_common_per_res_release(nordic_nrf5_twi_register[instance]); /* Configure driver with new settings. */ nrf_drv_twi_config_t twi_config = { diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c index 7a037398044..435b896cbcc 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c @@ -46,9 +46,7 @@ #include "nrf_atfifo.h" #include "app_util_platform.h" #include "pinmap_ex.h" -#include "nrf_drv_ppi.h" -#include "nrf_drv_gpiote.h" -#include "PeripheralPins.h" +#include "nrfx_glue.h" #include "platform/mbed_critical.h" @@ -849,9 +847,32 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) nrf_drv_gpiote_init(); } + /* Register RTC2 ISR. */ + NVIC_SetVector(RTC2_IRQn, (uint32_t) nordic_nrf5_rtc2_handler); + + /* Clear RTC2 channel events. */ + nrf_rtc_event_clear(NRF_RTC2, NRF_RTC_EVENT_COMPARE_0); + nrf_rtc_event_clear(NRF_RTC2, NRF_RTC_EVENT_COMPARE_1); + + /* Enable interrupts for all four RTC2 channels. */ + nrf_rtc_event_enable(NRF_RTC2, + NRF_RTC_INT_COMPARE0_MASK | + NRF_RTC_INT_COMPARE1_MASK); + + /* Enable RTC2 IRQ. Priority is set to highest so that the UARTE ISR can't interrupt it. */ + NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number((void const*)RTC2_IRQn), APP_IRQ_PRIORITY_HIGHEST); + NRFX_IRQ_ENABLE(nrfx_get_irq_number((void const*)RTC2_IRQn)); + + + /* Start RTC2. According to the datasheet the added power consumption is neglible so + * the RTC2 will run forever. + */ + nrf_rtc_task_trigger(NRF_RTC2, NRF_RTC_TASK_START); + /* Enable interrupts for SWI. */ NVIC_SetVector(SWI0_EGU0_IRQn, (uint32_t) nordic_nrf5_uart_swi0); - nrf_drv_common_irq_enable(SWI0_EGU0_IRQn, APP_IRQ_PRIORITY_LOWEST); + NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number((void const*)SWI0_EGU0_IRQn), APP_IRQ_PRIORITY_LOWEST); + NRFX_IRQ_ENABLE(nrfx_get_irq_number((void const*)SWI0_EGU0_IRQn)); /* Initialize FIFO buffer for UARTE0. */ NRF_ATFIFO_INIT(nordic_nrf5_uart_fifo_0); @@ -871,7 +892,8 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) nrf_uarte_int_disable(nordic_nrf5_uart_register[0], 0xFFFFFFFF); NVIC_SetVector(UARTE0_UART0_IRQn, (uint32_t) nordic_nrf5_uart0_handler); - nrf_drv_common_irq_enable(UARTE0_UART0_IRQn, APP_IRQ_PRIORITY_HIGHEST); + NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number((void const*)UARTE0_UART0_IRQn), APP_IRQ_PRIORITY_HIGHEST); + NRFX_IRQ_ENABLE(nrfx_get_irq_number((void const*)UARTE0_UART0_IRQn)); #if UART1_ENABLED /* Initialize FIFO buffer for UARTE1. */ @@ -892,7 +914,8 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) nrf_uarte_int_disable(nordic_nrf5_uart_register[1], 0xFFFFFFFF); NVIC_SetVector(UARTE1_IRQn, (uint32_t) nordic_nrf5_uart1_handler); - nrf_drv_common_irq_enable(UARTE1_IRQn, APP_IRQ_PRIORITY_HIGHEST); + NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(UARTE1_IRQn), APP_IRQ_PRIORITY_HIGHEST); + NRFX_IRQ_ENABLE(nrfx_get_irq_number(UARTE1_IRQn)); #endif } diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/doc/s132_nrf52_6.0.0_licence-agreement.txt b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/doc/s132_nrf52_6.0.0_licence-agreement.txt new file mode 100644 index 00000000000..a71adee7b9b --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/doc/s132_nrf52_6.0.0_licence-agreement.txt @@ -0,0 +1,35 @@ +Copyright (c) 2007 - 2018, Nordic Semiconductor ASA +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/doc/s132_nrf52_6.0.0_migration-document.pdf b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/doc/s132_nrf52_6.0.0_migration-document.pdf new file mode 100644 index 0000000000000000000000000000000000000000..e88cd69f04013d7025d510d0cc9133c58c9d965b GIT binary patch literal 133032 zcmdqJbyOYQvM-7R*Wm6RU@e@5!@}L&9fAe-;1b;3J-BOvySoK~Yj6k-m+bF5`|NYi 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Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON + @{ + @addtogroup nrf_error + @{ + @ingroup BLE_COMMON + @} + + @defgroup ble_err General error codes + @{ + + @brief General error code definitions for the BLE API. + + @ingroup BLE_COMMON +*/ +#ifndef NRF_BLE_ERR_H__ +#define NRF_BLE_ERR_H__ + +#include "nrf_error.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* @defgroup BLE_ERRORS Error Codes + * @{ */ +#define BLE_ERROR_NOT_ENABLED (NRF_ERROR_STK_BASE_NUM+0x001) /**< @ref sd_ble_enable has not been called. */ +#define BLE_ERROR_INVALID_CONN_HANDLE (NRF_ERROR_STK_BASE_NUM+0x002) /**< Invalid connection handle. */ +#define BLE_ERROR_INVALID_ATTR_HANDLE (NRF_ERROR_STK_BASE_NUM+0x003) /**< Invalid attribute handle. */ +#define BLE_ERROR_INVALID_ADV_HANDLE (NRF_ERROR_STK_BASE_NUM+0x004) /**< Invalid advertising handle. */ +#define BLE_ERROR_INVALID_ROLE (NRF_ERROR_STK_BASE_NUM+0x005) /**< Invalid role. */ +#define BLE_ERROR_BLOCKED_BY_OTHER_LINKS (NRF_ERROR_STK_BASE_NUM+0x006) /**< The attempt to change link settings failed due to the scheduling of other links. */ +/** @} */ + + +/** @defgroup BLE_ERROR_SUBRANGES Module specific error code subranges + * @brief Assignment of subranges for module specific error codes. + * @note For specific error codes, see ble_.h or ble_error_.h. + * @{ */ +#define NRF_L2CAP_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x100) /**< L2CAP specific errors. */ +#define NRF_GAP_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x200) /**< GAP specific errors. */ +#define NRF_GATTC_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x300) /**< GATT client specific errors. */ +#define NRF_GATTS_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x400) /**< GATT server specific errors. */ +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif + + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gap.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gap.h new file mode 100644 index 00000000000..8b138161066 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gap.h @@ -0,0 +1,2653 @@ +/* + * Copyright (c) 2011 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_GAP Generic Access Profile (GAP) + @{ + @brief Definitions and prototypes for the GAP interface. + */ + +#ifndef BLE_GAP_H__ +#define BLE_GAP_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_hci.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@addtogroup BLE_GAP_ENUMERATIONS Enumerations + * @{ */ + +/**@brief GAP API SVC numbers. + */ +enum BLE_GAP_SVCS +{ + SD_BLE_GAP_ADDR_SET = BLE_GAP_SVC_BASE, /**< Set own Bluetooth Address. */ + SD_BLE_GAP_ADDR_GET = BLE_GAP_SVC_BASE + 1, /**< Get own Bluetooth Address. */ + SD_BLE_GAP_WHITELIST_SET = BLE_GAP_SVC_BASE + 2, /**< Set active whitelist. */ + SD_BLE_GAP_DEVICE_IDENTITIES_SET = BLE_GAP_SVC_BASE + 3, /**< Set device identity list. */ + SD_BLE_GAP_PRIVACY_SET = BLE_GAP_SVC_BASE + 4, /**< Set Privacy settings*/ + SD_BLE_GAP_PRIVACY_GET = BLE_GAP_SVC_BASE + 5, /**< Get Privacy settings*/ + SD_BLE_GAP_ADV_SET_CONFIGURE = BLE_GAP_SVC_BASE + 6, /**< Configure an advertising set. */ + SD_BLE_GAP_ADV_START = BLE_GAP_SVC_BASE + 7, /**< Start Advertising. */ + SD_BLE_GAP_ADV_STOP = BLE_GAP_SVC_BASE + 8, /**< Stop Advertising. */ + SD_BLE_GAP_CONN_PARAM_UPDATE = BLE_GAP_SVC_BASE + 9, /**< Connection Parameter Update. */ + SD_BLE_GAP_DISCONNECT = BLE_GAP_SVC_BASE + 10, /**< Disconnect. */ + SD_BLE_GAP_TX_POWER_SET = BLE_GAP_SVC_BASE + 11, /**< Set TX Power. */ + SD_BLE_GAP_APPEARANCE_SET = BLE_GAP_SVC_BASE + 12, /**< Set Appearance. */ + SD_BLE_GAP_APPEARANCE_GET = BLE_GAP_SVC_BASE + 13, /**< Get Appearance. */ + SD_BLE_GAP_PPCP_SET = BLE_GAP_SVC_BASE + 14, /**< Set PPCP. */ + SD_BLE_GAP_PPCP_GET = BLE_GAP_SVC_BASE + 15, /**< Get PPCP. */ + SD_BLE_GAP_DEVICE_NAME_SET = BLE_GAP_SVC_BASE + 16, /**< Set Device Name. */ + SD_BLE_GAP_DEVICE_NAME_GET = BLE_GAP_SVC_BASE + 17, /**< Get Device Name. */ + SD_BLE_GAP_AUTHENTICATE = BLE_GAP_SVC_BASE + 18, /**< Initiate Pairing/Bonding. */ + SD_BLE_GAP_SEC_PARAMS_REPLY = BLE_GAP_SVC_BASE + 19, /**< Reply with Security Parameters. */ + SD_BLE_GAP_AUTH_KEY_REPLY = BLE_GAP_SVC_BASE + 20, /**< Reply with an authentication key. */ + SD_BLE_GAP_LESC_DHKEY_REPLY = BLE_GAP_SVC_BASE + 21, /**< Reply with an LE Secure Connections DHKey. */ + SD_BLE_GAP_KEYPRESS_NOTIFY = BLE_GAP_SVC_BASE + 22, /**< Notify of a keypress during an authentication procedure. */ + SD_BLE_GAP_LESC_OOB_DATA_GET = BLE_GAP_SVC_BASE + 23, /**< Get the local LE Secure Connections OOB data. */ + SD_BLE_GAP_LESC_OOB_DATA_SET = BLE_GAP_SVC_BASE + 24, /**< Set the remote LE Secure Connections OOB data. */ + SD_BLE_GAP_ENCRYPT = BLE_GAP_SVC_BASE + 25, /**< Initiate encryption procedure. */ + SD_BLE_GAP_SEC_INFO_REPLY = BLE_GAP_SVC_BASE + 26, /**< Reply with Security Information. */ + SD_BLE_GAP_CONN_SEC_GET = BLE_GAP_SVC_BASE + 27, /**< Obtain connection security level. */ + SD_BLE_GAP_RSSI_START = BLE_GAP_SVC_BASE + 28, /**< Start reporting of changes in RSSI. */ + SD_BLE_GAP_RSSI_STOP = BLE_GAP_SVC_BASE + 29, /**< Stop reporting of changes in RSSI. */ + SD_BLE_GAP_SCAN_START = BLE_GAP_SVC_BASE + 30, /**< Start Scanning. */ + SD_BLE_GAP_SCAN_STOP = BLE_GAP_SVC_BASE + 31, /**< Stop Scanning. */ + SD_BLE_GAP_CONNECT = BLE_GAP_SVC_BASE + 32, /**< Connect. */ + SD_BLE_GAP_CONNECT_CANCEL = BLE_GAP_SVC_BASE + 33, /**< Cancel ongoing connection procedure. */ + SD_BLE_GAP_RSSI_GET = BLE_GAP_SVC_BASE + 34, /**< Get the last RSSI sample. */ + SD_BLE_GAP_PHY_UPDATE = BLE_GAP_SVC_BASE + 35, /**< Initiate or respond to a PHY Update Procedure. */ + SD_BLE_GAP_DATA_LENGTH_UPDATE = BLE_GAP_SVC_BASE + 36, /**< Initiate or respond to a Data Length Update Procedure. */ + SD_BLE_GAP_QOS_CHANNEL_SURVEY_START = BLE_GAP_SVC_BASE + 37, /**< Start Quality of Service (QoS) channel survey module. */ + SD_BLE_GAP_QOS_CHANNEL_SURVEY_STOP = BLE_GAP_SVC_BASE + 38, /**< Stop Quality of Service (QoS) channel survey module. */ +}; + +/**@brief GAP Event IDs. + * IDs that uniquely identify an event coming from the stack to the application. + */ +enum BLE_GAP_EVTS +{ + BLE_GAP_EVT_CONNECTED = BLE_GAP_EVT_BASE, + BLE_GAP_EVT_DISCONNECTED = BLE_GAP_EVT_BASE + 1, /**< Disconnected from peer. \n See @ref ble_gap_evt_disconnected_t. */ + BLE_GAP_EVT_CONN_PARAM_UPDATE = BLE_GAP_EVT_BASE + 2, /**< Connection Parameters updated. \n See @ref ble_gap_evt_conn_param_update_t. */ + BLE_GAP_EVT_SEC_PARAMS_REQUEST = BLE_GAP_EVT_BASE + 3, /**< Request to provide security parameters. \n Reply with @ref sd_ble_gap_sec_params_reply. \n See @ref ble_gap_evt_sec_params_request_t. */ + BLE_GAP_EVT_SEC_INFO_REQUEST = BLE_GAP_EVT_BASE + 4, /**< Request to provide security information. \n Reply with @ref sd_ble_gap_sec_info_reply. \n See @ref ble_gap_evt_sec_info_request_t. */ + BLE_GAP_EVT_PASSKEY_DISPLAY = BLE_GAP_EVT_BASE + 5, /**< Request to display a passkey to the user. \n In LESC Numeric Comparison, reply with @ref sd_ble_gap_auth_key_reply. \n See @ref ble_gap_evt_passkey_display_t. */ + BLE_GAP_EVT_KEY_PRESSED = BLE_GAP_EVT_BASE + 6, /**< Notification of a keypress on the remote device.\n See @ref ble_gap_evt_key_pressed_t */ + BLE_GAP_EVT_AUTH_KEY_REQUEST = BLE_GAP_EVT_BASE + 7, /**< Request to provide an authentication key. \n Reply with @ref sd_ble_gap_auth_key_reply. \n See @ref ble_gap_evt_auth_key_request_t. */ + BLE_GAP_EVT_LESC_DHKEY_REQUEST = BLE_GAP_EVT_BASE + 8, /**< Request to calculate an LE Secure Connections DHKey. \n Reply with @ref sd_ble_gap_lesc_dhkey_reply. \n See @ref ble_gap_evt_lesc_dhkey_request_t */ + BLE_GAP_EVT_AUTH_STATUS = BLE_GAP_EVT_BASE + 9, /**< Authentication procedure completed with status. \n See @ref ble_gap_evt_auth_status_t. */ + BLE_GAP_EVT_CONN_SEC_UPDATE = BLE_GAP_EVT_BASE + 10, /**< Connection security updated. \n See @ref ble_gap_evt_conn_sec_update_t. */ + BLE_GAP_EVT_TIMEOUT = BLE_GAP_EVT_BASE + 11, /**< Timeout expired. \n See @ref ble_gap_evt_timeout_t. */ + BLE_GAP_EVT_RSSI_CHANGED = BLE_GAP_EVT_BASE + 12, /**< RSSI report. \n See @ref ble_gap_evt_rssi_changed_t. */ + BLE_GAP_EVT_ADV_REPORT = BLE_GAP_EVT_BASE + 13, /**< Advertising report. \n See @ref ble_gap_evt_adv_report_t. */ + BLE_GAP_EVT_SEC_REQUEST = BLE_GAP_EVT_BASE + 14, /**< Security Request. \n See @ref ble_gap_evt_sec_request_t. */ + BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST = BLE_GAP_EVT_BASE + 15, /**< Connection Parameter Update Request. \n Reply with @ref sd_ble_gap_conn_param_update. \n See @ref ble_gap_evt_conn_param_update_request_t. */ + BLE_GAP_EVT_SCAN_REQ_REPORT = BLE_GAP_EVT_BASE + 16, /**< Scan request report. \n See @ref ble_gap_evt_scan_req_report_t. */ + BLE_GAP_EVT_PHY_UPDATE_REQUEST = BLE_GAP_EVT_BASE + 17, /**< PHY Update Request. \n Reply with @ref sd_ble_gap_phy_update. \n See @ref ble_gap_evt_phy_update_request_t. */ + BLE_GAP_EVT_PHY_UPDATE = BLE_GAP_EVT_BASE + 18, /**< PHY Update Procedure is complete. \n See @ref ble_gap_evt_phy_update_t. */ + BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST = BLE_GAP_EVT_BASE + 19, /**< Data Length Update Request. \n Reply with @ref sd_ble_gap_data_length_update.\n See @ref ble_gap_evt_data_length_update_request_t. */ + BLE_GAP_EVT_DATA_LENGTH_UPDATE = BLE_GAP_EVT_BASE + 20, /**< LL Data Channel PDU payload length updated. \n See @ref ble_gap_evt_data_length_update_t. */ + BLE_GAP_EVT_QOS_CHANNEL_SURVEY_REPORT = BLE_GAP_EVT_BASE + 21, /**< Channel survey report. \n See @ref ble_gap_evt_qos_channel_survey_report_t. */ + BLE_GAP_EVT_ADV_SET_TERMINATED = BLE_GAP_EVT_BASE + 22, /**< Advertising set terminated. \n See @ref ble_gap_evt_adv_set_terminated_t. */ +}; + +/**@brief GAP Option IDs. + * IDs that uniquely identify a GAP option. + */ +enum BLE_GAP_OPTS +{ + BLE_GAP_OPT_CH_MAP = BLE_GAP_OPT_BASE, /**< Channel Map. @ref ble_gap_opt_ch_map_t */ + BLE_GAP_OPT_LOCAL_CONN_LATENCY = BLE_GAP_OPT_BASE + 1, /**< Local connection latency. @ref ble_gap_opt_local_conn_latency_t */ + BLE_GAP_OPT_PASSKEY = BLE_GAP_OPT_BASE + 2, /**< Set passkey. @ref ble_gap_opt_passkey_t */ + BLE_GAP_OPT_COMPAT_MODE_1 = BLE_GAP_OPT_BASE + 3, /**< Compatibility mode. @ref ble_gap_opt_compat_mode_1_t */ + BLE_GAP_OPT_AUTH_PAYLOAD_TIMEOUT = BLE_GAP_OPT_BASE + 4, /**< Set Authenticated payload timeout. @ref ble_gap_opt_auth_payload_timeout_t */ + BLE_GAP_OPT_SLAVE_LATENCY_DISABLE = BLE_GAP_OPT_BASE + 5, /**< Disable slave latency. @ref ble_gap_opt_slave_latency_disable_t */ +}; + +/**@brief GAP Configuration IDs. + * + * IDs that uniquely identify a GAP configuration. + */ +enum BLE_GAP_CFGS +{ + BLE_GAP_CFG_ROLE_COUNT = BLE_GAP_CFG_BASE, /**< Role count configuration. */ + BLE_GAP_CFG_DEVICE_NAME = BLE_GAP_CFG_BASE + 1, /**< Device name configuration. */ +}; + +/**@brief GAP TX Power roles. + */ +enum BLE_GAP_TX_POWER_ROLES +{ + BLE_GAP_TX_POWER_ROLE_ADV = 1, /**< Advertiser role. */ + BLE_GAP_TX_POWER_ROLE_SCAN_INIT = 2, /**< Scanner and initiator role. */ + BLE_GAP_TX_POWER_ROLE_CONN = 3, /**< Connection role. */ +}; + +/** @} */ + +/**@addtogroup BLE_GAP_DEFINES Defines + * @{ */ + +/**@defgroup BLE_ERRORS_GAP SVC return values specific to GAP + * @{ */ +#define BLE_ERROR_GAP_UUID_LIST_MISMATCH (NRF_GAP_ERR_BASE + 0x000) /**< UUID list does not contain an integral number of UUIDs. */ +#define BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST (NRF_GAP_ERR_BASE + 0x001) /**< Use of Whitelist not permitted with discoverable advertising. */ +#define BLE_ERROR_GAP_INVALID_BLE_ADDR (NRF_GAP_ERR_BASE + 0x002) /**< The upper two bits of the address do not correspond to the specified address type. */ +#define BLE_ERROR_GAP_WHITELIST_IN_USE (NRF_GAP_ERR_BASE + 0x003) /**< Attempt to modify the whitelist while already in use by another operation. */ +#define BLE_ERROR_GAP_DEVICE_IDENTITIES_IN_USE (NRF_GAP_ERR_BASE + 0x004) /**< Attempt to modify the device identity list while already in use by another operation. */ +#define BLE_ERROR_GAP_DEVICE_IDENTITIES_DUPLICATE (NRF_GAP_ERR_BASE + 0x005) /**< The device identity list contains entries with duplicate identity addresses. */ +/**@} */ + + +/**@defgroup BLE_GAP_ROLES GAP Roles + * @{ */ +#define BLE_GAP_ROLE_INVALID 0x0 /**< Invalid Role. */ +#define BLE_GAP_ROLE_PERIPH 0x1 /**< Peripheral Role. */ +#define BLE_GAP_ROLE_CENTRAL 0x2 /**< Central Role. */ +/**@} */ + + +/**@defgroup BLE_GAP_TIMEOUT_SOURCES GAP Timeout sources + * @{ */ +#define BLE_GAP_TIMEOUT_SRC_SCAN 0x01 /**< Scanning timeout. */ +#define BLE_GAP_TIMEOUT_SRC_CONN 0x02 /**< Connection timeout. */ +#define BLE_GAP_TIMEOUT_SRC_AUTH_PAYLOAD 0x03 /**< Authenticated payload timeout. */ +/**@} */ + + +/**@defgroup BLE_GAP_ADDR_TYPES GAP Address types + * @{ */ +#define BLE_GAP_ADDR_TYPE_PUBLIC 0x00 /**< Public (identity) address.*/ +#define BLE_GAP_ADDR_TYPE_RANDOM_STATIC 0x01 /**< Random static (identity) address. */ +#define BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE 0x02 /**< Random private resolvable address. */ +#define BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE 0x03 /**< Random private non-resolvable address. */ +#define BLE_GAP_ADDR_TYPE_ANONYMOUS 0x7F /**< An advertiser may advertise without its address. + This type of advertising is called anonymous. */ +/**@} */ + + +/**@brief The default interval in seconds at which a private address is refreshed. */ +#define BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S (900) /* 15 minutes. */ +/**@brief The maximum interval in seconds at which a private address can be refreshed. */ +#define BLE_GAP_MAX_PRIVATE_ADDR_CYCLE_INTERVAL_S (41400) /* 11 hours 30 minutes. */ + + +/** @brief BLE address length. */ +#define BLE_GAP_ADDR_LEN (6) + +/**@defgroup BLE_GAP_PRIVACY_MODES Privacy modes + * @{ */ +#define BLE_GAP_PRIVACY_MODE_OFF 0x00 /**< Device will send and accept its identity address for its own address. */ +#define BLE_GAP_PRIVACY_MODE_DEVICE_PRIVACY 0x01 /**< Device will send and accept only private addresses for its own address. */ +#define BLE_GAP_PRIVACY_MODE_NETWORK_PRIVACY 0x02 /**< Device will send and accept only private addresses for its own address, + and will not accept a peer using identity address as sender address when + the peer IRK is exchanged, non-zero and added to the identity list. */ +/**@} */ + +/** @brief Invalid power level. */ +#define BLE_GAP_POWER_LEVEL_INVALID 127 + +/** @brief Advertising set handle not set. */ +#define BLE_GAP_ADV_SET_HANDLE_NOT_SET (0xFF) + +/** @brief The default number of advertising sets. */ +#define BLE_GAP_ADV_SET_COUNT_DEFAULT (1) + +/** @brief The maximum number of advertising sets supported by this SoftDevice. */ +#define BLE_GAP_ADV_SET_COUNT_MAX (1) + +/**@defgroup BLE_GAP_ADV_SET_DATA_SIZES Advertising data sizes. + * @{ */ +#define BLE_GAP_ADV_SET_DATA_SIZE_MAX (31) /**< Maximum data length for an advertising set. */ +/**@}. */ + +/** @brief Set ID not available in advertising report. */ +#define BLE_GAP_ADV_REPORT_SET_ID_NOT_AVAILABLE 0xFF + +/**@defgroup BLE_GAP_EVT_ADV_SET_TERMINATED_REASON GAP Advertising Set Terminated reasons + * @{ */ +#define BLE_GAP_EVT_ADV_SET_TERMINATED_REASON_TIMEOUT 0x01 /**< Timeout value reached. */ +#define BLE_GAP_EVT_ADV_SET_TERMINATED_REASON_LIMIT_REACHED 0x02 /**< @ref ble_gap_adv_params_t::max_adv_evts was reached. */ +/**@} */ + +/**@defgroup BLE_GAP_AD_TYPE_DEFINITIONS GAP Advertising and Scan Response Data format + * @note Found at https://www.bluetooth.org/Technical/AssignedNumbers/generic_access_profile.htm + * @{ */ +#define BLE_GAP_AD_TYPE_FLAGS 0x01 /**< Flags for discoverability. */ +#define BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_MORE_AVAILABLE 0x02 /**< Partial list of 16 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_COMPLETE 0x03 /**< Complete list of 16 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_MORE_AVAILABLE 0x04 /**< Partial list of 32 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_COMPLETE 0x05 /**< Complete list of 32 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_MORE_AVAILABLE 0x06 /**< Partial list of 128 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_COMPLETE 0x07 /**< Complete list of 128 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_SHORT_LOCAL_NAME 0x08 /**< Short local device name. */ +#define BLE_GAP_AD_TYPE_COMPLETE_LOCAL_NAME 0x09 /**< Complete local device name. */ +#define BLE_GAP_AD_TYPE_TX_POWER_LEVEL 0x0A /**< Transmit power level. */ +#define BLE_GAP_AD_TYPE_CLASS_OF_DEVICE 0x0D /**< Class of device. */ +#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C 0x0E /**< Simple Pairing Hash C. */ +#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R 0x0F /**< Simple Pairing Randomizer R. */ +#define BLE_GAP_AD_TYPE_SECURITY_MANAGER_TK_VALUE 0x10 /**< Security Manager TK Value. */ +#define BLE_GAP_AD_TYPE_SECURITY_MANAGER_OOB_FLAGS 0x11 /**< Security Manager Out Of Band Flags. */ +#define BLE_GAP_AD_TYPE_SLAVE_CONNECTION_INTERVAL_RANGE 0x12 /**< Slave Connection Interval Range. */ +#define BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_16BIT 0x14 /**< List of 16-bit Service Solicitation UUIDs. */ +#define BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_128BIT 0x15 /**< List of 128-bit Service Solicitation UUIDs. */ +#define BLE_GAP_AD_TYPE_SERVICE_DATA 0x16 /**< Service Data - 16-bit UUID. */ +#define BLE_GAP_AD_TYPE_PUBLIC_TARGET_ADDRESS 0x17 /**< Public Target Address. */ +#define BLE_GAP_AD_TYPE_RANDOM_TARGET_ADDRESS 0x18 /**< Random Target Address. */ +#define BLE_GAP_AD_TYPE_APPEARANCE 0x19 /**< Appearance. */ +#define BLE_GAP_AD_TYPE_ADVERTISING_INTERVAL 0x1A /**< Advertising Interval. */ +#define BLE_GAP_AD_TYPE_LE_BLUETOOTH_DEVICE_ADDRESS 0x1B /**< LE Bluetooth Device Address. */ +#define BLE_GAP_AD_TYPE_LE_ROLE 0x1C /**< LE Role. */ +#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C256 0x1D /**< Simple Pairing Hash C-256. */ +#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R256 0x1E /**< Simple Pairing Randomizer R-256. */ +#define BLE_GAP_AD_TYPE_SERVICE_DATA_32BIT_UUID 0x20 /**< Service Data - 32-bit UUID. */ +#define BLE_GAP_AD_TYPE_SERVICE_DATA_128BIT_UUID 0x21 /**< Service Data - 128-bit UUID. */ +#define BLE_GAP_AD_TYPE_LESC_CONFIRMATION_VALUE 0x22 /**< LE Secure Connections Confirmation Value */ +#define BLE_GAP_AD_TYPE_LESC_RANDOM_VALUE 0x23 /**< LE Secure Connections Random Value */ +#define BLE_GAP_AD_TYPE_URI 0x24 /**< URI */ +#define BLE_GAP_AD_TYPE_3D_INFORMATION_DATA 0x3D /**< 3D Information Data. */ +#define BLE_GAP_AD_TYPE_MANUFACTURER_SPECIFIC_DATA 0xFF /**< Manufacturer Specific Data. */ +/**@} */ + + +/**@defgroup BLE_GAP_ADV_FLAGS GAP Advertisement Flags + * @{ */ +#define BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE (0x01) /**< LE Limited Discoverable Mode. */ +#define BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE (0x02) /**< LE General Discoverable Mode. */ +#define BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED (0x04) /**< BR/EDR not supported. */ +#define BLE_GAP_ADV_FLAG_LE_BR_EDR_CONTROLLER (0x08) /**< Simultaneous LE and BR/EDR, Controller. */ +#define BLE_GAP_ADV_FLAG_LE_BR_EDR_HOST (0x10) /**< Simultaneous LE and BR/EDR, Host. */ +#define BLE_GAP_ADV_FLAGS_LE_ONLY_LIMITED_DISC_MODE (BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE | BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED) /**< LE Limited Discoverable Mode, BR/EDR not supported. */ +#define BLE_GAP_ADV_FLAGS_LE_ONLY_GENERAL_DISC_MODE (BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE | BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED) /**< LE General Discoverable Mode, BR/EDR not supported. */ +/**@} */ + + +/**@defgroup BLE_GAP_ADV_INTERVALS GAP Advertising interval max and min + * @{ */ +#define BLE_GAP_ADV_INTERVAL_MIN 0x000020 /**< Minimum Advertising interval in 625 us units, i.e. 20 ms. */ +#define BLE_GAP_ADV_INTERVAL_MAX 0x004000 /**< Maximum Advertising interval in 625 us units, i.e. 10.24 s. + @note Support for values above @ref BLE_GAP_ADV_INTERVAL_MAX + is experimental. Values above 0xFFFFFF, i.e 10,485.759375 s + are not supported. */ + /**@} */ + + +/**@defgroup BLE_GAP_SCAN_INTERVALS GAP Scan interval max and min + * @{ */ +#define BLE_GAP_SCAN_INTERVAL_MIN 0x0004 /**< Minimum Scan interval in 625 us units, i.e. 2.5 ms. */ +#define BLE_GAP_SCAN_INTERVAL_MAX 0xFFFF /**< Maximum Scan interval in 625 us units, i.e. 40,959.375 s. */ + /** @} */ + + +/**@defgroup BLE_GAP_SCAN_WINDOW GAP Scan window max and min + * @{ */ +#define BLE_GAP_SCAN_WINDOW_MIN 0x0004 /**< Minimum Scan window in 625 us units, i.e. 2.5 ms. */ +#define BLE_GAP_SCAN_WINDOW_MAX 0xFFFF /**< Maximum Scan window in 625 us units, i.e. 40,959.375 s. */ + /** @} */ + + +/**@defgroup BLE_GAP_SCAN_TIMEOUT GAP Scan timeout max and min + * @{ */ +#define BLE_GAP_SCAN_TIMEOUT_MIN 0x0001 /**< Minimum Scan timeout in 10 ms units, i.e 10 ms. */ +#define BLE_GAP_SCAN_TIMEOUT_UNLIMITED 0x0000 /**< Continue to scan forever. */ + /** @} */ + +/**@defgroup BLE_GAP_SCAN_BUFFER_SIZE GAP Minimum scanner buffer size + * + * Scan buffers are used for storing advertising data received from an advertiser. + * If ble_gap_scan_params_t::extended is set to 0, @ref BLE_GAP_SCAN_BUFFER_MIN is the minimum scan buffer length. + * else the minimum scan buffer size is @ref BLE_GAP_SCAN_BUFFER_EXTENDED_MIN. + * @{ */ +#define BLE_GAP_SCAN_BUFFER_MIN (31) /**< Minimum data length for an + advertising set. */ +#define BLE_GAP_SCAN_BUFFER_MAX (31) /**< Maximum data length for an + advertising set. */ +#define BLE_GAP_SCAN_BUFFER_EXTENDED_MIN (255) /**< Minimum data length for an + extended advertising set. */ +#define BLE_GAP_SCAN_BUFFER_EXTENDED_MAX (1650) /**< Maximum data length for an + extended advertising set. + @note Extended scanning is only + supported as an experimental + feature in this SoftDevice. + The scanner will only receive + advertising data up to 31 bytes. */ +/** @} */ + +/**@defgroup BLE_GAP_ADV_TYPES GAP Advertising types + * + * Advertising types defined in Bluetooth Core Specification v5.0, Vol 6, Part B, Section 4.4.2. + * + * The maximum advertising data length is defined by @ref BLE_GAP_ADV_SET_DATA_SIZE_MAX. + * Note that some of the advertising types do not support advertising data. Non-scannable types do not support + * scan response data. + * + * @{ */ +#define BLE_GAP_ADV_TYPE_CONNECTABLE_SCANNABLE_UNDIRECTED 0x01 /**< Connectable and scannable undirected + advertising events. */ +#define BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED_HIGH_DUTY_CYCLE 0x02 /**< Connectable non-scannable directed advertising + events. Advertising interval is less that 3.75 ms. + Use this type for fast reconnections. + @note Advertising data is not supported. */ +#define BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED 0x03 /**< Connectable non-scannable directed advertising + events. + @note Advertising data is not supported. */ +#define BLE_GAP_ADV_TYPE_NONCONNECTABLE_SCANNABLE_UNDIRECTED 0x04 /**< Non-connectable scannable undirected + advertising events. */ +#define BLE_GAP_ADV_TYPE_NONCONNECTABLE_NONSCANNABLE_UNDIRECTED 0x05 /**< Non-connectable non-scannable undirected + advertising events. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_CONNECTABLE_NONSCANNABLE_UNDIRECTED 0x06 /**< Connectable non-scannable undirected advertising + events using extended advertising PDUs. + @note Extended advertising types are only + supported as experimental features in this + SoftDevice. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_CONNECTABLE_NONSCANNABLE_DIRECTED 0x07 /**< Connectable non-scannable directed advertising + events using extended advertising PDUs. + @note Extended advertising types are only + supported as experimental features in this + SoftDevice. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_SCANNABLE_UNDIRECTED 0x08 /**< Non-connectable scannable undirected advertising + events using extended advertising PDUs. + @note Only scan response data is supported. + @note Extended advertising types are only + supported as experimental features in this + SoftDevice. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_SCANNABLE_DIRECTED 0x09 /**< Non-connectable scannable directed advertising + events using extended advertising PDUs. + @note Only scan response data is supported. + @note Extended advertising types are only + supported as experimental features in this + SoftDevice. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_NONSCANNABLE_UNDIRECTED 0x0A /**< Non-connectable non-scannable undirected advertising + events using extended advertising PDUs. + @note Extended advertising types are only + supported as experimental features in this + SoftDevice. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_NONSCANNABLE_DIRECTED 0x0B /**< Non-connectable non-scannable directed advertising + events using extended advertising PDUs. + @note Extended advertising types are only + supported as experimental features in this + SoftDevice. */ +/**@} */ + +/**@defgroup BLE_GAP_ADV_FILTER_POLICIES GAP Advertising filter policies + * @{ */ +#define BLE_GAP_ADV_FP_ANY 0x00 /**< Allow scan requests and connect requests from any device. */ +#define BLE_GAP_ADV_FP_FILTER_SCANREQ 0x01 /**< Filter scan requests with whitelist. */ +#define BLE_GAP_ADV_FP_FILTER_CONNREQ 0x02 /**< Filter connect requests with whitelist. */ +#define BLE_GAP_ADV_FP_FILTER_BOTH 0x03 /**< Filter both scan and connect requests with whitelist. */ +/**@} */ + +/**@defgroup BLE_GAP_ADV_DATA_STATUS GAP Advertising data status + * @{ */ +#define BLE_GAP_ADV_DATA_STATUS_COMPLETE 0x00 /**< All data in the advertising event have been received. */ +#define BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA 0x01 /**< More data to be received. */ +#define BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_TRUNCATED 0x02 /**< Incomplete data. Buffer size insufficient to receive more. */ +#define BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MISSED 0x03 /**< Failed to receive the remaining data. */ +/**@} */ + +/**@defgroup BLE_GAP_SCAN_FILTER_POLICIES GAP Scanner filter policies + * @{ */ +#define BLE_GAP_SCAN_FP_ACCEPT_ALL 0x00 /**< Accept all advertising packets except directed advertising packets + not addressed to this device. */ +#define BLE_GAP_SCAN_FP_WHITELIST 0x01 /**< Accept advertising packets from devices in the whitelist except directed + packets not addressed to this device. */ +#define BLE_GAP_SCAN_FP_ALL_NOT_RESOLVED_DIRECTED 0x02 /**< Accept all advertising packets specified in @ref BLE_GAP_SCAN_FP_ACCEPT_ALL. + In addition, accept directed advertising packets, where the advertiser's + address is a resolvable private address that cannot be resolved. */ +#define BLE_GAP_SCAN_FP_WHITELIST_NOT_RESOLVED_DIRECTED 0x03 /**< Accept all advertising packets specified in @ref BLE_GAP_SCAN_FP_WHITELIST. + In addition, accept directed advertising packets, where the advertiser's + address is a resolvable private address that cannot be resolved. */ +/**@} */ + +/**@defgroup BLE_GAP_ADV_TIMEOUT_VALUES GAP Advertising timeout values in 10 ms units + * @{ */ +#define BLE_GAP_ADV_TIMEOUT_HIGH_DUTY_MAX (128) /**< Maximum high duty advertising time in 10 ms units. Corresponds to 1.28 s. */ +#define BLE_GAP_ADV_TIMEOUT_LIMITED_MAX (18000) /**< Maximum advertising time in 10 ms units corresponding to TGAP(lim_adv_timeout) = 180 s in limited discoverable mode. */ +#define BLE_GAP_ADV_TIMEOUT_GENERAL_UNLIMITED (0) /**< Unlimited advertising in general discoverable mode. + For high duty cycle advertising, this corresponds to @ref BLE_GAP_ADV_TIMEOUT_HIGH_DUTY_MAX. */ +/**@} */ + + +/**@defgroup BLE_GAP_DISC_MODES GAP Discovery modes + * @{ */ +#define BLE_GAP_DISC_MODE_NOT_DISCOVERABLE 0x00 /**< Not discoverable discovery Mode. */ +#define BLE_GAP_DISC_MODE_LIMITED 0x01 /**< Limited Discovery Mode. */ +#define BLE_GAP_DISC_MODE_GENERAL 0x02 /**< General Discovery Mode. */ +/**@} */ + + +/**@defgroup BLE_GAP_IO_CAPS GAP IO Capabilities + * @{ */ +#define BLE_GAP_IO_CAPS_DISPLAY_ONLY 0x00 /**< Display Only. */ +#define BLE_GAP_IO_CAPS_DISPLAY_YESNO 0x01 /**< Display and Yes/No entry. */ +#define BLE_GAP_IO_CAPS_KEYBOARD_ONLY 0x02 /**< Keyboard Only. */ +#define BLE_GAP_IO_CAPS_NONE 0x03 /**< No I/O capabilities. */ +#define BLE_GAP_IO_CAPS_KEYBOARD_DISPLAY 0x04 /**< Keyboard and Display. */ +/**@} */ + + +/**@defgroup BLE_GAP_AUTH_KEY_TYPES GAP Authentication Key Types + * @{ */ +#define BLE_GAP_AUTH_KEY_TYPE_NONE 0x00 /**< No key (may be used to reject). */ +#define BLE_GAP_AUTH_KEY_TYPE_PASSKEY 0x01 /**< 6-digit Passkey. */ +#define BLE_GAP_AUTH_KEY_TYPE_OOB 0x02 /**< Out Of Band data. */ +/**@} */ + + +/**@defgroup BLE_GAP_KP_NOT_TYPES GAP Keypress Notification Types + * @{ */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_START 0x00 /**< Passkey entry started. */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_DIGIT_IN 0x01 /**< Passkey digit entered. */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_DIGIT_OUT 0x02 /**< Passkey digit erased. */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_CLEAR 0x03 /**< Passkey cleared. */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_END 0x04 /**< Passkey entry completed. */ +/**@} */ + + +/**@defgroup BLE_GAP_SEC_STATUS GAP Security status + * @{ */ +#define BLE_GAP_SEC_STATUS_SUCCESS 0x00 /**< Procedure completed with success. */ +#define BLE_GAP_SEC_STATUS_TIMEOUT 0x01 /**< Procedure timed out. */ +#define BLE_GAP_SEC_STATUS_PDU_INVALID 0x02 /**< Invalid PDU received. */ +#define BLE_GAP_SEC_STATUS_RFU_RANGE1_BEGIN 0x03 /**< Reserved for Future Use range #1 begin. */ +#define BLE_GAP_SEC_STATUS_RFU_RANGE1_END 0x80 /**< Reserved for Future Use range #1 end. */ +#define BLE_GAP_SEC_STATUS_PASSKEY_ENTRY_FAILED 0x81 /**< Passkey entry failed (user canceled or other). */ +#define BLE_GAP_SEC_STATUS_OOB_NOT_AVAILABLE 0x82 /**< Out of Band Key not available. */ +#define BLE_GAP_SEC_STATUS_AUTH_REQ 0x83 /**< Authentication requirements not met. */ +#define BLE_GAP_SEC_STATUS_CONFIRM_VALUE 0x84 /**< Confirm value failed. */ +#define BLE_GAP_SEC_STATUS_PAIRING_NOT_SUPP 0x85 /**< Pairing not supported. */ +#define BLE_GAP_SEC_STATUS_ENC_KEY_SIZE 0x86 /**< Encryption key size. */ +#define BLE_GAP_SEC_STATUS_SMP_CMD_UNSUPPORTED 0x87 /**< Unsupported SMP command. */ +#define BLE_GAP_SEC_STATUS_UNSPECIFIED 0x88 /**< Unspecified reason. */ +#define BLE_GAP_SEC_STATUS_REPEATED_ATTEMPTS 0x89 /**< Too little time elapsed since last attempt. */ +#define BLE_GAP_SEC_STATUS_INVALID_PARAMS 0x8A /**< Invalid parameters. */ +#define BLE_GAP_SEC_STATUS_DHKEY_FAILURE 0x8B /**< DHKey check failure. */ +#define BLE_GAP_SEC_STATUS_NUM_COMP_FAILURE 0x8C /**< Numeric Comparison failure. */ +#define BLE_GAP_SEC_STATUS_BR_EDR_IN_PROG 0x8D /**< BR/EDR pairing in progress. */ +#define BLE_GAP_SEC_STATUS_X_TRANS_KEY_DISALLOWED 0x8E /**< BR/EDR Link Key cannot be used for LE keys. */ +#define BLE_GAP_SEC_STATUS_RFU_RANGE2_BEGIN 0x8F /**< Reserved for Future Use range #2 begin. */ +#define BLE_GAP_SEC_STATUS_RFU_RANGE2_END 0xFF /**< Reserved for Future Use range #2 end. */ +/**@} */ + + +/**@defgroup BLE_GAP_SEC_STATUS_SOURCES GAP Security status sources + * @{ */ +#define BLE_GAP_SEC_STATUS_SOURCE_LOCAL 0x00 /**< Local failure. */ +#define BLE_GAP_SEC_STATUS_SOURCE_REMOTE 0x01 /**< Remote failure. */ +/**@} */ + + +/**@defgroup BLE_GAP_CP_LIMITS GAP Connection Parameters Limits + * @{ */ +#define BLE_GAP_CP_MIN_CONN_INTVL_NONE 0xFFFF /**< No new minimum connection interval specified in connect parameters. */ +#define BLE_GAP_CP_MIN_CONN_INTVL_MIN 0x0006 /**< Lowest minimum connection interval permitted, in units of 1.25 ms, i.e. 7.5 ms. */ +#define BLE_GAP_CP_MIN_CONN_INTVL_MAX 0x0C80 /**< Highest minimum connection interval permitted, in units of 1.25 ms, i.e. 4 s. */ +#define BLE_GAP_CP_MAX_CONN_INTVL_NONE 0xFFFF /**< No new maximum connection interval specified in connect parameters. */ +#define BLE_GAP_CP_MAX_CONN_INTVL_MIN 0x0006 /**< Lowest maximum connection interval permitted, in units of 1.25 ms, i.e. 7.5 ms. */ +#define BLE_GAP_CP_MAX_CONN_INTVL_MAX 0x0C80 /**< Highest maximum connection interval permitted, in units of 1.25 ms, i.e. 4 s. */ +#define BLE_GAP_CP_SLAVE_LATENCY_MAX 0x01F3 /**< Highest slave latency permitted, in connection events. */ +#define BLE_GAP_CP_CONN_SUP_TIMEOUT_NONE 0xFFFF /**< No new supervision timeout specified in connect parameters. */ +#define BLE_GAP_CP_CONN_SUP_TIMEOUT_MIN 0x000A /**< Lowest supervision timeout permitted, in units of 10 ms, i.e. 100 ms. */ +#define BLE_GAP_CP_CONN_SUP_TIMEOUT_MAX 0x0C80 /**< Highest supervision timeout permitted, in units of 10 ms, i.e. 32 s. */ +/**@} */ + + +/**@defgroup BLE_GAP_DEVNAME GAP device name defines. + * @{ */ +#define BLE_GAP_DEVNAME_DEFAULT "nRF5x" /**< Default device name value. */ +#define BLE_GAP_DEVNAME_DEFAULT_LEN 31 /**< Default number of octets in device name. */ +#define BLE_GAP_DEVNAME_MAX_LEN 248 /**< Maximum number of octets in device name. */ +/**@} */ + + +/**@brief Disable RSSI events for connections */ +#define BLE_GAP_RSSI_THRESHOLD_INVALID 0xFF + +/**@defgroup BLE_GAP_PHYS GAP PHYs + * @{ */ +#define BLE_GAP_PHY_AUTO 0x00 /**< Automatic PHY selection. Refer @ref sd_ble_gap_phy_update for more information.*/ +#define BLE_GAP_PHY_1MBPS 0x01 /**< 1 Mbps PHY. */ +#define BLE_GAP_PHY_2MBPS 0x02 /**< 2 Mbps PHY. */ +#define BLE_GAP_PHY_CODED 0x04 /**< Coded PHY. */ +#define BLE_GAP_PHY_NOT_SET 0xFF /**< PHY is not configured. */ + +/**@brief Supported PHYs in connections, for scanning, and for advertising. */ +#define BLE_GAP_PHYS_SUPPORTED (BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS) /**< All PHYs except @ref BLE_GAP_PHY_CODED are supported. */ + +/**@} */ + +/**@defgroup BLE_GAP_CONN_SEC_MODE_SET_MACROS GAP attribute security requirement setters + * + * See @ref ble_gap_conn_sec_mode_t. + * @{ */ +/**@brief Set sec_mode pointed to by ptr to have no access rights.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_NO_ACCESS(ptr) do {(ptr)->sm = 0; (ptr)->lv = 0;} while(0) +/**@brief Set sec_mode pointed to by ptr to require no protection, open link.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_OPEN(ptr) do {(ptr)->sm = 1; (ptr)->lv = 1;} while(0) +/**@brief Set sec_mode pointed to by ptr to require encryption, but no MITM protection.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_ENC_NO_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 2;} while(0) +/**@brief Set sec_mode pointed to by ptr to require encryption and MITM protection.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_ENC_WITH_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 3;} while(0) +/**@brief Set sec_mode pointed to by ptr to require LESC encryption and MITM protection.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_LESC_ENC_WITH_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 4;} while(0) +/**@brief Set sec_mode pointed to by ptr to require signing or encryption, no MITM protection needed.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_SIGNED_NO_MITM(ptr) do {(ptr)->sm = 2; (ptr)->lv = 1;} while(0) +/**@brief Set sec_mode pointed to by ptr to require signing or encryption with MITM protection.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_SIGNED_WITH_MITM(ptr) do {(ptr)->sm = 2; (ptr)->lv = 2;} while(0) +/**@} */ + + +/**@brief GAP Security Random Number Length. */ +#define BLE_GAP_SEC_RAND_LEN 8 + + +/**@brief GAP Security Key Length. */ +#define BLE_GAP_SEC_KEY_LEN 16 + + +/**@brief GAP LE Secure Connections Elliptic Curve Diffie-Hellman P-256 Public Key Length. */ +#define BLE_GAP_LESC_P256_PK_LEN 64 + + +/**@brief GAP LE Secure Connections Elliptic Curve Diffie-Hellman DHKey Length. */ +#define BLE_GAP_LESC_DHKEY_LEN 32 + + +/**@brief GAP Passkey Length. */ +#define BLE_GAP_PASSKEY_LEN 6 + + +/**@brief Maximum amount of addresses in the whitelist. */ +#define BLE_GAP_WHITELIST_ADDR_MAX_COUNT (8) + + +/**@brief Maximum amount of identities in the device identities list. */ +#define BLE_GAP_DEVICE_IDENTITIES_MAX_COUNT (8) + + +/**@brief Default connection count for a configuration. */ +#define BLE_GAP_CONN_COUNT_DEFAULT (1) + + +/**@defgroup BLE_GAP_EVENT_LENGTH GAP event length defines. + * @{ */ +#define BLE_GAP_EVENT_LENGTH_MIN (2) /**< Minimum event length, in 1.25 ms units. */ +#define BLE_GAP_EVENT_LENGTH_DEFAULT (3) /**< Default event length, in 1.25 ms units. */ +/**@} */ + + +/**@defgroup BLE_GAP_ROLE_COUNT GAP concurrent connection count defines. + * @{ */ +#define BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT (1) /**< Default maximum number of connections concurrently acting as peripherals. */ +#define BLE_GAP_ROLE_COUNT_CENTRAL_DEFAULT (3) /**< Default maximum number of connections concurrently acting as centrals. */ +#define BLE_GAP_ROLE_COUNT_CENTRAL_SEC_DEFAULT (1) /**< Default number of SMP instances shared between all connections acting as centrals. */ +#define BLE_GAP_ROLE_COUNT_COMBINED_MAX (20) /**< Maximum supported number of concurrent connections in the peripheral and central roles combined. */ + +/**@} */ + +/**@brief Automatic data length parameter. */ +#define BLE_GAP_DATA_LENGTH_AUTO 0 + +/**@defgroup BLE_GAP_AUTH_PAYLOAD_TIMEOUT Authenticated payload timeout defines. + * @{ */ +#define BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MAX (48000) /**< Maximum authenticated payload timeout in 10 ms units, i.e. 8 minutes. */ +#define BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MIN (1) /**< Minimum authenticated payload timeout in 10 ms units, i.e. 10 ms. */ +/**@} */ + +/**@defgroup GAP_SEC_MODES GAP Security Modes + * @{ */ +#define BLE_GAP_SEC_MODE 0x00 /**< No key (may be used to reject). */ +/**@} */ + +/**@brief The total number of channels in Bluetooth Low Energy. */ +#define BLE_GAP_CHANNEL_COUNT (40) + +/**@defgroup BLE_GAP_QOS_CHANNEL_SURVEY_INTERVALS Quality of Service (QoS) Channel survey interval defines + * @{ */ +#define BLE_GAP_QOS_CHANNEL_SURVEY_INTERVAL_CONTINUOUS (0) /**< Continuous channel survey. */ +#define BLE_GAP_QOS_CHANNEL_SURVEY_INTERVAL_MIN_US (7500) /**< Minimum channel survey interval in microseconds (7.5 ms). */ +#define BLE_GAP_QOS_CHANNEL_SURVEY_INTERVAL_MAX_US (4000000) /**< Maximum channel survey interval in microseconds (4 s). */ + /**@} */ + +/** @} */ + + +/**@addtogroup BLE_GAP_STRUCTURES Structures + * @{ */ + +/**@brief Advertising event properties. */ +typedef struct +{ + uint8_t type; /**< Advertising type. See @ref BLE_GAP_ADV_TYPES. */ + uint8_t anonymous : 1; /**< Omit advertiser's address from all PDUs. + @note Anonymous advertising is only available for + @ref BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_NONSCANNABLE_UNDIRECTED and + @ref BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_NONSCANNABLE_DIRECTED. */ + uint8_t include_tx_power : 1; /**< Include TxPower set by @ref sd_ble_gap_tx_power_set in the extended header + of the advertising PDU. + @note TxPower can only be added to the extended header when @ref type is an extended advertising type. */ +} ble_gap_adv_properties_t; + + +/**@brief Advertising report type. */ +typedef struct +{ + uint16_t connectable : 1; /**< Connectable advertising event type. */ + uint16_t scannable : 1; /**< Scannable advertising event type. */ + uint16_t directed : 1; /**< Directed advertising event type. */ + uint16_t scan_response : 1; /**< Received a scan response. */ + uint16_t extended_pdu : 1; /**< Received an extended advertising set. */ + uint16_t status : 2; /**< Data status. See @ref BLE_GAP_ADV_DATA_STATUS. */ + uint16_t reserved : 9; /**< Reserved for future use. */ +} ble_gap_adv_report_type_t; + +/**@brief Advertising Auxiliary Pointer. */ +typedef struct +{ + uint16_t aux_offset; /**< Time offset from the beginning of advertising packet to the auxiliary packet in 100 us units. */ + uint8_t aux_phy; /**< Indicates the PHY on which the auxiliary advertising packet is sent. See @ref BLE_GAP_PHYS. */ +} ble_gap_aux_pointer_t; + +/**@brief Bluetooth Low Energy address. */ +typedef struct +{ + uint8_t addr_id_peer : 1; /**< Only valid for peer addresses. + Reference to peer in device identities list (as set with @ref sd_ble_gap_device_identities_set) when peer is using privacy. */ + uint8_t addr_type : 7; /**< See @ref BLE_GAP_ADDR_TYPES. */ + uint8_t addr[BLE_GAP_ADDR_LEN]; /**< 48-bit address, LSB format. + addr is not used if addr_type is @ref BLE_GAP_ADDR_TYPE_ANONYMOUS. */ +} ble_gap_addr_t; + + +/**@brief GAP connection parameters. + * + * @note When ble_conn_params_t is received in an event, both min_conn_interval and + * max_conn_interval will be equal to the connection interval set by the central. + * + * @note If both conn_sup_timeout and max_conn_interval are specified, then the following constraint applies: + * conn_sup_timeout * 4 > (1 + slave_latency) * max_conn_interval + * that corresponds to the following Bluetooth Spec requirement: + * The Supervision_Timeout in milliseconds shall be larger than + * (1 + Conn_Latency) * Conn_Interval_Max * 2, where Conn_Interval_Max is given in milliseconds. + */ +typedef struct +{ + uint16_t min_conn_interval; /**< Minimum Connection Interval in 1.25 ms units, see @ref BLE_GAP_CP_LIMITS.*/ + uint16_t max_conn_interval; /**< Maximum Connection Interval in 1.25 ms units, see @ref BLE_GAP_CP_LIMITS.*/ + uint16_t slave_latency; /**< Slave Latency in number of connection events, see @ref BLE_GAP_CP_LIMITS.*/ + uint16_t conn_sup_timeout; /**< Connection Supervision Timeout in 10 ms units, see @ref BLE_GAP_CP_LIMITS.*/ +} ble_gap_conn_params_t; + + +/**@brief GAP connection security modes. + * + * Security Mode 0 Level 0: No access permissions at all (this level is not defined by the Bluetooth Core specification).\n + * Security Mode 1 Level 1: No security is needed (aka open link).\n + * Security Mode 1 Level 2: Encrypted link required, MITM protection not necessary.\n + * Security Mode 1 Level 3: MITM protected encrypted link required.\n + * Security Mode 1 Level 4: LESC MITM protected encrypted link using a 128-bit strength encryption key required.\n + * Security Mode 2 Level 1: Signing or encryption required, MITM protection not necessary.\n + * Security Mode 2 Level 2: MITM protected signing required, unless link is MITM protected encrypted.\n + */ +typedef struct +{ + uint8_t sm : 4; /**< Security Mode (1 or 2), 0 for no permissions at all. */ + uint8_t lv : 4; /**< Level (1, 2, 3 or 4), 0 for no permissions at all. */ + +} ble_gap_conn_sec_mode_t; + + +/**@brief GAP connection security status.*/ +typedef struct +{ + ble_gap_conn_sec_mode_t sec_mode; /**< Currently active security mode for this connection.*/ + uint8_t encr_key_size; /**< Length of currently active encryption key, 7 to 16 octets (only applicable for bonding procedures). */ +} ble_gap_conn_sec_t; + +/**@brief Identity Resolving Key. */ +typedef struct +{ + uint8_t irk[BLE_GAP_SEC_KEY_LEN]; /**< Array containing IRK. */ +} ble_gap_irk_t; + + +/**@brief Channel mask (40 bits). + * Every channel is represented with a bit positioned as per channel index defined in Bluetooth Core Specification v5.0, + * Vol 6, Part B, Section 1.4.1. The LSB contained in array element 0 represents channel index 0, and bit 39 represents + * channel index 39. If a bit is set to 1, the channel is not used. + */ +typedef uint8_t ble_gap_ch_mask_t[5]; + + +/**@brief GAP advertising parameters. */ +typedef struct +{ + ble_gap_adv_properties_t properties; /**< The properties of the advertising events. */ + ble_gap_addr_t const *p_peer_addr; /**< Address of a known peer. + @note ble_gap_addr_t::addr_type cannot be + @ref BLE_GAP_ADDR_TYPE_ANONYMOUS. + - When privacy is enabled and the local device uses + @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE addresses, + the device identity list is searched for a matching entry. If + the local IRK for that device identity is set, the local IRK + for that device will be used to generate the advertiser address + field in the advertising packet. + - If @ref ble_gap_adv_properties_t::type is directed, this must be + set to the targeted scanner or initiator. If the peer address is + in the device identity list, the peer IRK for that device will be + used to generate @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE + target addresses used in the advertising event PDUs. */ + uint32_t interval; /**< Advertising interval in 625 us units. @sa BLE_GAP_ADV_INTERVALS. + @note If @ref ble_gap_adv_properties_t::type is set to + @ref BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED_HIGH_DUTY_CYCLE + advertising, this parameter is ignored. */ + uint16_t duration; /**< Advertising duration in 10 ms units. When timeout is reached, + an event of type @ref BLE_GAP_EVT_ADV_SET_TERMINATED is raised. + @sa BLE_GAP_ADV_TIMEOUT_VALUES. */ + uint8_t max_adv_evts; /**< Maximum advertising events that shall be sent prior to disabling + advertising. Setting the value to 0 disables the limitation. When + the count of advertising events specified by this parameter + (if not 0) is reached, advertising will be automatically stopped + and an event of type @ref BLE_GAP_EVT_ADV_SET_TERMINATED is raised + @note If @ref ble_gap_adv_properties_t::type is set to + @ref BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED_HIGH_DUTY_CYCLE, + this parameter is ignored. + @note Setting max_adv_evts to a values not equal to 0 is only supported + as an experimental feature in this SoftDevice. */ + ble_gap_ch_mask_t channel_mask; /**< Channel mask for primary and secondary advertising channels. + At least one of the primary channels, that is channel index 37-39, must be used. + Masking away secondary advertising channels is not supported. */ + uint8_t filter_policy; /**< Filter Policy. @sa BLE_GAP_ADV_FILTER_POLICIES. */ + uint8_t primary_phy; /**< Indicates the PHY on which the primary advertising channel packets + are transmitted. If set to @ref BLE_GAP_PHY_AUTO, @ref BLE_GAP_PHY_1MBPS + will be used. + The only supported value by this SoftDevice is @ref BLE_GAP_PHY_1MBPS. */ + uint8_t secondary_phy; /**< Indicates the PHY on which the secondary advertising channel packets + are transmitted. + If set to @ref BLE_GAP_PHY_AUTO, @ref BLE_GAP_PHY_1MBPS will be used. + Valid values are + @ref BLE_GAP_PHY_1MBPS and @ref BLE_GAP_PHY_2MBPS. @ref BLE_GAP_PHY_CODED + is not supported by this SoftDevice. + If @ref ble_gap_adv_properties_t::type is an extended advertising type + and connectable, this is the PHY that will be used to establish a + connection and send AUX_ADV_IND packets on. + @note This parameter will be ignored when + @ref ble_gap_adv_properties_t::type is not an extended advertising type. */ + uint8_t set_id:4; /**< The advertising set identifier distinguishes this advertising set from other + advertising sets transmitted by this and other devices. + @note This parameter will be ignored when + @ref ble_gap_adv_properties_t::type is not an extended advertising type. */ + uint8_t scan_req_notification:1; /**< Enable scan request notifications for this advertising set. When a + scan request is received and the scanner address is allowed + by the filter policy, @ref BLE_GAP_EVT_SCAN_REQ_REPORT is raised. + @note This parameter will be ignored when + @ref ble_gap_adv_properties_t::type is a non-scannable + advertising type. */ +} ble_gap_adv_params_t; + + +/**@brief GAP advertising data buffers. + * + * The application must provide the buffers for advertisement. The memory shall reside in application RAM, and + * shall never be modified while advertising. The data shall be kept alive until either: + * - @ref BLE_GAP_EVT_ADV_SET_TERMINATED is raised. + * - @ref BLE_GAP_EVT_CONNECTED is raised with @ref ble_gap_evt_connected_t::adv_handle set to the corresponding + * advertising handle. + * - Advertising is stopped. + * - Advertising data is changed. + * To update advertising data while advertising, provide new buffers to @ref sd_ble_gap_adv_set_configure. */ +typedef struct +{ + ble_data_t adv_data; /**< Advertising data. + @note + Advertising data can only be specified for a @ref ble_gap_adv_properties_t::type + that is allowed to contain advertising data. */ + ble_data_t scan_rsp_data; /**< Scan response data. + @note + Scan response data can only be specified for a @ref ble_gap_adv_properties_t::type + that is scannable. */ +} ble_gap_adv_data_t; + + +/**@brief GAP scanning parameters. */ +typedef struct +{ + uint8_t extended : 1; /**< If 1, the scanner will accept extended advertising packets. + If set to 0, the scanner will not receive advertising packets + on secondary advertising channels, and will not be able + to receive long advertising PDUs. + @note Extended scanning is only supported as an experimental feature in this + SoftDevice. */ + uint8_t report_incomplete_evts : 1; /**< If 1, events of type @ref ble_gap_evt_adv_report_t may have + @ref ble_gap_adv_report_type_t::status set to + @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA. + This parameter is ignored when used with @ref sd_ble_gap_connect + @note This may be used to abort receiving more packets from an extended + advertising event, and is only available for extended + scanning, see @ref sd_ble_gap_scan_start. + @note This feature is not supported by this SoftDevice. */ + uint8_t active : 1; /**< If 1, perform active scanning by sending scan requests. + This parameter is ignored when used with @ref sd_ble_gap_connect. */ + uint8_t filter_policy : 2; /**< Scanning filter policy. @sa BLE_GAP_SCAN_FILTER_POLICIES. + @note Only @ref BLE_GAP_SCAN_FP_ACCEPT_ALL and + @ref BLE_GAP_SCAN_FP_WHITELIST are valid when used with + @ref sd_ble_gap_connect */ + uint8_t scan_phys; /**< Bitfield of PHYs to scan on. If set to @ref BLE_GAP_PHY_AUTO, + scan_phys will default to @ref BLE_GAP_PHY_1MBPS. + - If @ref ble_gap_scan_params_t::extended is set to 0, the only + supported PHY is @ref BLE_GAP_PHY_1MBPS. + - When used with @ref sd_ble_gap_scan_start, + the bitfield indicates the PHYs the scanner will use for scanning + on primary advertising channels. The scanner will accept + @ref BLE_GAP_PHYS_SUPPORTED as secondary advertising channel PHYs. + - When used with @ref sd_ble_gap_connect, the + bitfield indicates the PHYs on where a connection may be initiated. + If scan_phys contains @ref BLE_GAP_PHY_1MBPS and/or @ref BLE_GAP_PHY_2MBPS, + the primary scan PHY is @ref BLE_GAP_PHY_1MBPS. */ + uint16_t interval; /**< Scan interval in 625 us units. @sa BLE_GAP_SCAN_INTERVALS. */ + uint16_t window; /**< Scan window in 625 us units. @sa BLE_GAP_SCAN_WINDOW. */ + uint16_t timeout; /**< Scan timeout in 10 ms units. @sa BLE_GAP_SCAN_TIMEOUT. */ + ble_gap_ch_mask_t channel_mask; /**< Channel mask for primary and secondary advertising channels. + At least one of the primary channels, that is channel index 37-39, must be + set to 0. + Masking away secondary channels is not supported. */ +} ble_gap_scan_params_t; + + +/**@brief Privacy. + * + * The privacy feature provides a way for the device to avoid being tracked over a period of time. + * The privacy feature, when enabled, hides the local device identity and replaces it with a private address + * that is automatically refreshed at a specified interval. + * + * If a device still wants to be recognized by other peers, it needs to share it's Identity Resolving Key (IRK). + * With this key, a device can generate a random private address that can only be recognized by peers in possession of that key, + * and devices can establish connections without revealing their real identities. + * + * Both network privacy (@ref BLE_GAP_PRIVACY_MODE_NETWORK_PRIVACY) and device privacy (@ref BLE_GAP_PRIVACY_MODE_DEVICE_PRIVACY) + * are supported. + * + * @note If the device IRK is updated, the new IRK becomes the one to be distributed in all + * bonding procedures performed after @ref sd_ble_gap_privacy_set returns. + * The IRK distributed during bonding procedure is the device IRK that is active when @ref sd_ble_gap_sec_params_reply is called. + */ +typedef struct +{ + uint8_t privacy_mode; /**< Privacy mode, see @ref BLE_GAP_PRIVACY_MODES. Default is @ref BLE_GAP_PRIVACY_MODE_OFF. */ + uint8_t private_addr_type; /**< The private address type must be either @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE or @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE. */ + uint16_t private_addr_cycle_s; /**< Private address cycle interval in seconds. Providing an address cycle value of 0 will use the default value defined by @ref BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S. */ + ble_gap_irk_t *p_device_irk; /**< When used as input, pointer to IRK structure that will be used as the default IRK. If NULL, the device default IRK will be used. + When used as output, pointer to IRK structure where the current default IRK will be written to. If NULL, this argument is ignored. + By default, the default IRK is used to generate random private resolvable addresses for the local device unless instructed otherwise. */ +} ble_gap_privacy_params_t; + + +/**@brief PHY preferences for TX and RX + * @note tx_phys and rx_phys are bit fields. Multiple bits can be set in them to indicate multiple preferred PHYs for each direction. + * @code + * p_gap_phys->tx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; + * p_gap_phys->rx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; + * @endcode + * + */ +typedef struct +{ + uint8_t tx_phys; /**< Preferred transmit PHYs, see @ref BLE_GAP_PHYS. */ + uint8_t rx_phys; /**< Preferred receive PHYs, see @ref BLE_GAP_PHYS. */ +} ble_gap_phys_t; + +/** @brief Keys that can be exchanged during a bonding procedure. */ +typedef struct +{ + uint8_t enc : 1; /**< Long Term Key and Master Identification. */ + uint8_t id : 1; /**< Identity Resolving Key and Identity Address Information. */ + uint8_t sign : 1; /**< Connection Signature Resolving Key. */ + uint8_t link : 1; /**< Derive the Link Key from the LTK. */ +} ble_gap_sec_kdist_t; + + +/**@brief GAP security parameters. */ +typedef struct +{ + uint8_t bond : 1; /**< Perform bonding. */ + uint8_t mitm : 1; /**< Enable Man In The Middle protection. */ + uint8_t lesc : 1; /**< Enable LE Secure Connection pairing. */ + uint8_t keypress : 1; /**< Enable generation of keypress notifications. */ + uint8_t io_caps : 3; /**< IO capabilities, see @ref BLE_GAP_IO_CAPS. */ + uint8_t oob : 1; /**< The OOB data flag. + - In LE legacy pairing, this flag is set if a device has out of band authentication data. + The OOB method is used if both of the devices have out of band authentication data. + - In LE Secure Connections pairing, this flag is set if a device has the peer device's out of band authentication data. + The OOB method is used if at least one device has the peer device's OOB data available. */ + uint8_t min_key_size; /**< Minimum encryption key size in octets between 7 and 16. If 0 then not applicable in this instance. */ + uint8_t max_key_size; /**< Maximum encryption key size in octets between min_key_size and 16. */ + ble_gap_sec_kdist_t kdist_own; /**< Key distribution bitmap: keys that the local device will distribute. */ + ble_gap_sec_kdist_t kdist_peer; /**< Key distribution bitmap: keys that the remote device will distribute. */ +} ble_gap_sec_params_t; + + +/**@brief GAP Encryption Information. */ +typedef struct +{ + uint8_t ltk[BLE_GAP_SEC_KEY_LEN]; /**< Long Term Key. */ + uint8_t lesc : 1; /**< Key generated using LE Secure Connections. */ + uint8_t auth : 1; /**< Authenticated Key. */ + uint8_t ltk_len : 6; /**< LTK length in octets. */ +} ble_gap_enc_info_t; + + +/**@brief GAP Master Identification. */ +typedef struct +{ + uint16_t ediv; /**< Encrypted Diversifier. */ + uint8_t rand[BLE_GAP_SEC_RAND_LEN]; /**< Random Number. */ +} ble_gap_master_id_t; + + +/**@brief GAP Signing Information. */ +typedef struct +{ + uint8_t csrk[BLE_GAP_SEC_KEY_LEN]; /**< Connection Signature Resolving Key. */ +} ble_gap_sign_info_t; + + +/**@brief GAP LE Secure Connections P-256 Public Key. */ +typedef struct +{ + uint8_t pk[BLE_GAP_LESC_P256_PK_LEN]; /**< LE Secure Connections Elliptic Curve Diffie-Hellman P-256 Public Key. Stored in the standard SMP protocol format: {X,Y} both in little-endian. */ +} ble_gap_lesc_p256_pk_t; + + +/**@brief GAP LE Secure Connections DHKey. */ +typedef struct +{ + uint8_t key[BLE_GAP_LESC_DHKEY_LEN]; /**< LE Secure Connections Elliptic Curve Diffie-Hellman Key. Stored in little-endian. */ +} ble_gap_lesc_dhkey_t; + + +/**@brief GAP LE Secure Connections OOB data. */ +typedef struct +{ + ble_gap_addr_t addr; /**< Bluetooth address of the device. */ + uint8_t r[BLE_GAP_SEC_KEY_LEN]; /**< Random Number. */ + uint8_t c[BLE_GAP_SEC_KEY_LEN]; /**< Confirm Value. */ +} ble_gap_lesc_oob_data_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_CONNECTED. */ +typedef struct +{ + ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 + and the address is the device's identity address. */ + uint8_t role; /**< BLE role for this connection, see @ref BLE_GAP_ROLES */ + ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ + uint8_t adv_handle; /**< Advertising handle in which advertising has ended. + This variable is only set if role is set to @ref BLE_GAP_ROLE_PERIPH. */ + ble_gap_adv_data_t adv_data; /**< Advertising buffers corresponding to the terminated + advertising set. The advertising buffers provided in + @ref sd_ble_gap_adv_set_configure are now released. + This variable is only set if role is set to @ref BLE_GAP_ROLE_PERIPH. */ +} ble_gap_evt_connected_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_DISCONNECTED. */ +typedef struct +{ + uint8_t reason; /**< HCI error code, see @ref BLE_HCI_STATUS_CODES. */ +} ble_gap_evt_disconnected_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_CONN_PARAM_UPDATE. */ +typedef struct +{ + ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ +} ble_gap_evt_conn_param_update_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_PHY_UPDATE_REQUEST. */ +typedef struct +{ + ble_gap_phys_t peer_preferred_phys; /**< The PHYs the peer prefers to use. */ +} ble_gap_evt_phy_update_request_t; + +/**@brief Event Structure for @ref BLE_GAP_EVT_PHY_UPDATE. */ +typedef struct +{ + uint8_t status; /**< Status of the procedure, see @ref BLE_HCI_STATUS_CODES.*/ + uint8_t tx_phy; /**< TX PHY for this connection, see @ref BLE_GAP_PHYS. */ + uint8_t rx_phy; /**< RX PHY for this connection, see @ref BLE_GAP_PHYS. */ +} ble_gap_evt_phy_update_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST. */ +typedef struct +{ + ble_gap_sec_params_t peer_params; /**< Initiator Security Parameters. */ +} ble_gap_evt_sec_params_request_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_SEC_INFO_REQUEST. */ +typedef struct +{ + ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. */ + ble_gap_master_id_t master_id; /**< Master Identification for LTK lookup. */ + uint8_t enc_info : 1; /**< If 1, Encryption Information required. */ + uint8_t id_info : 1; /**< If 1, Identity Information required. */ + uint8_t sign_info : 1; /**< If 1, Signing Information required. */ +} ble_gap_evt_sec_info_request_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_PASSKEY_DISPLAY. */ +typedef struct +{ + uint8_t passkey[BLE_GAP_PASSKEY_LEN]; /**< 6-digit passkey in ASCII ('0'-'9' digits only). */ + uint8_t match_request : 1; /**< If 1 requires the application to report the match using @ref sd_ble_gap_auth_key_reply + with either @ref BLE_GAP_AUTH_KEY_TYPE_NONE if there is no match or + @ref BLE_GAP_AUTH_KEY_TYPE_PASSKEY if there is a match. */ +} ble_gap_evt_passkey_display_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_KEY_PRESSED. */ +typedef struct +{ + uint8_t kp_not; /**< Keypress notification type, see @ref BLE_GAP_KP_NOT_TYPES. */ +} ble_gap_evt_key_pressed_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_AUTH_KEY_REQUEST. */ +typedef struct +{ + uint8_t key_type; /**< See @ref BLE_GAP_AUTH_KEY_TYPES. */ +} ble_gap_evt_auth_key_request_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST. */ +typedef struct +{ + ble_gap_lesc_p256_pk_t *p_pk_peer; /**< LE Secure Connections remote P-256 Public Key. This will point to the application-supplied memory + inside the keyset during the call to @ref sd_ble_gap_sec_params_reply. */ + uint8_t oobd_req :1; /**< LESC OOB data required. A call to @ref sd_ble_gap_lesc_oob_data_set is required to complete the procedure. */ +} ble_gap_evt_lesc_dhkey_request_t; + + +/**@brief Security levels supported. + * @note See Bluetooth Specification Version 4.2 Volume 3, Part C, Chapter 10, Section 10.2.1. +*/ +typedef struct +{ + uint8_t lv1 : 1; /**< If 1: Level 1 is supported. */ + uint8_t lv2 : 1; /**< If 1: Level 2 is supported. */ + uint8_t lv3 : 1; /**< If 1: Level 3 is supported. */ + uint8_t lv4 : 1; /**< If 1: Level 4 is supported. */ +} ble_gap_sec_levels_t; + + +/**@brief Encryption Key. */ +typedef struct +{ + ble_gap_enc_info_t enc_info; /**< Encryption Information. */ + ble_gap_master_id_t master_id; /**< Master Identification. */ +} ble_gap_enc_key_t; + + +/**@brief Identity Key. */ +typedef struct +{ + ble_gap_irk_t id_info; /**< Identity Resolving Key. */ + ble_gap_addr_t id_addr_info; /**< Identity Address. */ +} ble_gap_id_key_t; + + +/**@brief Security Keys. */ +typedef struct +{ + ble_gap_enc_key_t *p_enc_key; /**< Encryption Key, or NULL. */ + ble_gap_id_key_t *p_id_key; /**< Identity Key, or NULL. */ + ble_gap_sign_info_t *p_sign_key; /**< Signing Key, or NULL. */ + ble_gap_lesc_p256_pk_t *p_pk; /**< LE Secure Connections P-256 Public Key. When in debug mode the application must use the value defined + in the Core Bluetooth Specification v4.2 Vol.3, Part H, Section 2.3.5.6.1 */ +} ble_gap_sec_keys_t; + + +/**@brief Security key set for both local and peer keys. */ +typedef struct +{ + ble_gap_sec_keys_t keys_own; /**< Keys distributed by the local device. For LE Secure Connections the encryption key will be generated locally and will always be stored if bonding. */ + ble_gap_sec_keys_t keys_peer; /**< Keys distributed by the remote device. For LE Secure Connections, p_enc_key must always be NULL. */ +} ble_gap_sec_keyset_t; + + +/**@brief Data Length Update Procedure parameters. */ +typedef struct +{ + uint16_t max_tx_octets; /**< Maximum number of payload octets that a Controller supports for transmission of a single Link Layer Data Channel PDU. */ + uint16_t max_rx_octets; /**< Maximum number of payload octets that a Controller supports for reception of a single Link Layer Data Channel PDU. */ + uint16_t max_tx_time_us; /**< Maximum time, in microseconds, that a Controller supports for transmission of a single Link Layer Data Channel PDU. */ + uint16_t max_rx_time_us; /**< Maximum time, in microseconds, that a Controller supports for reception of a single Link Layer Data Channel PDU. */ +} ble_gap_data_length_params_t; + + +/**@brief Data Length Update Procedure local limitation. */ +typedef struct +{ + uint16_t tx_payload_limited_octets; /**< If > 0, the requested TX packet length is too long by this many octets. */ + uint16_t rx_payload_limited_octets; /**< If > 0, the requested RX packet length is too long by this many octets. */ + uint16_t tx_rx_time_limited_us; /**< If > 0, the requested combination of TX and RX packet lengths is too long by this many microseconds. */ +} ble_gap_data_length_limitation_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_AUTH_STATUS. */ +typedef struct +{ + uint8_t auth_status; /**< Authentication status, see @ref BLE_GAP_SEC_STATUS. */ + uint8_t error_src : 2; /**< On error, source that caused the failure, see @ref BLE_GAP_SEC_STATUS_SOURCES. */ + uint8_t bonded : 1; /**< Procedure resulted in a bond. */ + uint8_t lesc : 1; /**< Procedure resulted in a LE Secure Connection. */ + ble_gap_sec_levels_t sm1_levels; /**< Levels supported in Security Mode 1. */ + ble_gap_sec_levels_t sm2_levels; /**< Levels supported in Security Mode 2. */ + ble_gap_sec_kdist_t kdist_own; /**< Bitmap stating which keys were exchanged (distributed) by the local device. If bonding with LE Secure Connections, the enc bit will be always set. */ + ble_gap_sec_kdist_t kdist_peer; /**< Bitmap stating which keys were exchanged (distributed) by the remote device. If bonding with LE Secure Connections, the enc bit will never be set. */ +} ble_gap_evt_auth_status_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_CONN_SEC_UPDATE. */ +typedef struct +{ + ble_gap_conn_sec_t conn_sec; /**< Connection security level. */ +} ble_gap_evt_conn_sec_update_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_TIMEOUT. */ +typedef struct +{ + uint8_t src; /**< Source of timeout event, see @ref BLE_GAP_TIMEOUT_SOURCES. */ + union + { + ble_data_t adv_report_buffer; /**< If source is set to @ref BLE_GAP_TIMEOUT_SRC_SCAN, the released + scan buffer is contained in this field. */ + } params; /**< Event Parameters. */ +} ble_gap_evt_timeout_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_RSSI_CHANGED. */ +typedef struct +{ + int8_t rssi; /**< Received Signal Strength Indication in dBm. */ + uint8_t ch_index; /**< Data Channel Index on which the Signal Strength is measured (0-36). */ +} ble_gap_evt_rssi_changed_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_ADV_SET_TERMINATED */ +typedef struct +{ + uint8_t reason; /**< Reason for why the advertising set terminated. See + @ref BLE_GAP_EVT_ADV_SET_TERMINATED_REASON. */ + uint8_t adv_handle; /**< Advertising handle in which advertising has ended. */ + uint8_t num_completed_adv_events; /**< If @ref ble_gap_adv_params_t::max_adv_evts was not set to 0, + this field indicates the number of completed advertising events. */ + ble_gap_adv_data_t adv_data; /**< Advertising buffers corresponding to the terminated + advertising set. The advertising buffers provided in + @ref sd_ble_gap_adv_set_configure are now released. */ +} ble_gap_evt_adv_set_terminated_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_ADV_REPORT. + * + * @note If @ref ble_gap_adv_report_type_t::status is set to @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA, + * not all fields in the advertising report may be available. + * + * @note When ble_gap_adv_report_type_t::status is not set to @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA, + * scanning will be paused. To continue scanning, call @ref sd_ble_gap_scan_start. + */ +typedef struct +{ + ble_gap_adv_report_type_t type; /**< Advertising report type. See @ref ble_gap_adv_report_type_t. */ + ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr is resolved: + @ref ble_gap_addr_t::addr_id_peer is set to 1 and the address is the + peer's identity address. */ + ble_gap_addr_t direct_addr; /**< Contains the target address of the advertising event if + @ref ble_gap_adv_report_type_t::directed is set to 1. If the + SoftDevice was able to resolve the address, + @ref ble_gap_addr_t::addr_id_peer is set to 1 and the direct_addr + contains the local identity address. If the target address of the + advertising event is @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE, + and the SoftDevice was unable to resolve it, the application may try + to resolve this address to find out if the advertising event was + directed to us. */ + uint8_t primary_phy; /**< Indicates the PHY on which the primary advertising packet was received on. + See @ref BLE_GAP_PHYS. */ + uint8_t secondary_phy; /**< Indicates the PHY on which the secondary advertising packet was received on. + See @ref BLE_GAP_PHYS. This field is to 0 if no packets where received on + a secondary advertising channel. */ + int8_t tx_power; /**< TX Power reported by the advertiser in the last packet header received. + This field is set to @ref BLE_GAP_POWER_LEVEL_INVALID if the + last received packet did not contain the Tx Power field. + @note TX Power is only included in extended advertising packets. */ + int8_t rssi; /**< Received Signal Strength Indication in dBm of the last packet received. */ + uint8_t ch_index; /**< Channel Index on which the last advertising packet is received (0-39). */ + uint8_t set_id; /**< Set ID of the received advertising data. Set ID is not present + if set to @ref BLE_GAP_ADV_REPORT_SET_ID_NOT_AVAILABLE. */ + uint16_t data_id:12; /**< The advertising data ID of the received advertising data. Data ID + is not present if @ref ble_gap_evt_adv_report_t::set_id is set to + @ref BLE_GAP_ADV_REPORT_SET_ID_NOT_AVAILABLE. */ + ble_data_t data; /**< Received advertising or scan response data. If + @ref ble_gap_adv_report_type_t::status is not set to + @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA, the data buffer provided + in @ref sd_ble_gap_scan_start is now released. */ + ble_gap_aux_pointer_t aux_pointer; /**< The offset and PHY of the next advertising packet in this extended advertising + event. @note This field is only set if @ref ble_gap_adv_report_type_t::status + is set to @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA. */ +} ble_gap_evt_adv_report_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_SEC_REQUEST. */ +typedef struct +{ + uint8_t bond : 1; /**< Perform bonding. */ + uint8_t mitm : 1; /**< Man In The Middle protection requested. */ + uint8_t lesc : 1; /**< LE Secure Connections requested. */ + uint8_t keypress : 1; /**< Generation of keypress notifications requested. */ +} ble_gap_evt_sec_request_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST. */ +typedef struct +{ + ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ +} ble_gap_evt_conn_param_update_request_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_SCAN_REQ_REPORT. */ +typedef struct +{ + uint8_t adv_handle; /**< Advertising handle for the advertising set which received the Scan Request */ + int8_t rssi; /**< Received Signal Strength Indication in dBm. */ + ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 + and the address is the device's identity address. */ +} ble_gap_evt_scan_req_report_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST. */ +typedef struct +{ + ble_gap_data_length_params_t peer_params; /**< Peer data length parameters. */ +} ble_gap_evt_data_length_update_request_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE. */ +typedef struct +{ + ble_gap_data_length_params_t effective_params; /**< The effective data length parameters. */ +} ble_gap_evt_data_length_update_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_QOS_CHANNEL_SURVEY_REPORT. */ +typedef struct +{ + int8_t channel_energy[BLE_GAP_CHANNEL_COUNT]; /**< The measured energy on the Bluetooth Low Energy + channels, in dBm, indexed by Channel Index. + If no measurement is available for the given channel, channel_energy is set to + @ref BLE_GAP_POWER_LEVEL_INVALID. */ +} ble_gap_evt_qos_channel_survey_report_t; + +/**@brief GAP event structure. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which event occurred. */ + union /**< union alternative identified by evt_id in enclosing struct. */ + { + ble_gap_evt_connected_t connected; /**< Connected Event Parameters. */ + ble_gap_evt_disconnected_t disconnected; /**< Disconnected Event Parameters. */ + ble_gap_evt_conn_param_update_t conn_param_update; /**< Connection Parameter Update Parameters. */ + ble_gap_evt_sec_params_request_t sec_params_request; /**< Security Parameters Request Event Parameters. */ + ble_gap_evt_sec_info_request_t sec_info_request; /**< Security Information Request Event Parameters. */ + ble_gap_evt_passkey_display_t passkey_display; /**< Passkey Display Event Parameters. */ + ble_gap_evt_key_pressed_t key_pressed; /**< Key Pressed Event Parameters. */ + ble_gap_evt_auth_key_request_t auth_key_request; /**< Authentication Key Request Event Parameters. */ + ble_gap_evt_lesc_dhkey_request_t lesc_dhkey_request; /**< LE Secure Connections DHKey calculation request. */ + ble_gap_evt_auth_status_t auth_status; /**< Authentication Status Event Parameters. */ + ble_gap_evt_conn_sec_update_t conn_sec_update; /**< Connection Security Update Event Parameters. */ + ble_gap_evt_timeout_t timeout; /**< Timeout Event Parameters. */ + ble_gap_evt_rssi_changed_t rssi_changed; /**< RSSI Event Parameters. */ + ble_gap_evt_adv_report_t adv_report; /**< Advertising Report Event Parameters. */ + ble_gap_evt_adv_set_terminated_t adv_set_terminated; /**< Advertising Set Terminated Event Parameters. */ + ble_gap_evt_sec_request_t sec_request; /**< Security Request Event Parameters. */ + ble_gap_evt_conn_param_update_request_t conn_param_update_request; /**< Connection Parameter Update Parameters. */ + ble_gap_evt_scan_req_report_t scan_req_report; /**< Scan Request Report Parameters. */ + ble_gap_evt_phy_update_request_t phy_update_request; /**< PHY Update Request Event Parameters. */ + ble_gap_evt_phy_update_t phy_update; /**< PHY Update Parameters. */ + ble_gap_evt_data_length_update_request_t data_length_update_request; /**< Data Length Update Request Event Parameters. */ + ble_gap_evt_data_length_update_t data_length_update; /**< Data Length Update Event Parameters. */ + ble_gap_evt_qos_channel_survey_report_t qos_channel_survey_report; /**< Quality of Service (QoS) Channel Survey Report Parameters. */ + } params; /**< Event Parameters. */ +} ble_gap_evt_t; + + +/** + * @brief BLE GAP connection configuration parameters, set with @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_CONN_COUNT The connection count for the connection configurations is zero. + * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: + * - The sum of conn_count for all connection configurations combined exceeds UINT8_MAX. + * - The event length is smaller than @ref BLE_GAP_EVENT_LENGTH_MIN. + */ +typedef struct +{ + uint8_t conn_count; /**< The number of concurrent connections the application can create with this configuration. + The default and minimum value is @ref BLE_GAP_CONN_COUNT_DEFAULT. */ + uint16_t event_length; /**< The time set aside for this connection on every connection interval in 1.25 ms units. + The default value is @ref BLE_GAP_EVENT_LENGTH_DEFAULT, the minimum value is @ref BLE_GAP_EVENT_LENGTH_MIN. + The event length and the connection interval are the primary parameters + for setting the throughput of a connection. + See the SoftDevice Specification for details on throughput. */ +} ble_gap_conn_cfg_t; + + +/** + * @brief Configuration of maximum concurrent connections in the different connected roles, set with + * @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_CONN_COUNT The sum of periph_role_count and central_role_count is too + * large. The maximum supported sum of concurrent connections is + * @ref BLE_GAP_ROLE_COUNT_COMBINED_MAX. + * @retval ::NRF_ERROR_INVALID_PARAM central_sec_count is larger than central_role_count. + * @retval ::NRF_ERROR_RESOURCES The adv_set_count is too large. The maximum + * supported advertising handles is + * @ref BLE_GAP_ADV_SET_COUNT_MAX. + */ +typedef struct +{ + uint8_t adv_set_count; /**< Maximum number of advertising sets. Default value is @ref BLE_GAP_ADV_SET_COUNT_DEFAULT. */ + uint8_t periph_role_count; /**< Maximum number of connections concurrently acting as a peripheral. Default value is @ref BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT. */ + uint8_t central_role_count; /**< Maximum number of connections concurrently acting as a central. Default value is @ref BLE_GAP_ROLE_COUNT_CENTRAL_DEFAULT. */ + uint8_t central_sec_count; /**< Number of SMP instances shared between all connections acting as a central. Default value is @ref BLE_GAP_ROLE_COUNT_CENTRAL_SEC_DEFAULT. */ + uint8_t qos_channel_survey_role_available:1; /**< If set, the Quality of Service (QoS) channel survey module is available to the + application using @ref sd_ble_gap_qos_channel_survey_start. */ +} ble_gap_cfg_role_count_t; + + +/** + * @brief Device name and its properties, set with @ref sd_ble_cfg_set. + * + * @note If the device name is not configured, the default device name will be + * @ref BLE_GAP_DEVNAME_DEFAULT, the maximum device name length will be + * @ref BLE_GAP_DEVNAME_DEFAULT_LEN, vloc will be set to @ref BLE_GATTS_VLOC_STACK and the device name + * will have no write access. + * + * @note If @ref max_len is more than @ref BLE_GAP_DEVNAME_DEFAULT_LEN and vloc is set to @ref BLE_GATTS_VLOC_STACK, + * the attribute table size must be increased to have room for the longer device name (see + * @ref sd_ble_cfg_set and @ref ble_gatts_cfg_attr_tab_size_t). + * + * @note If vloc is @ref BLE_GATTS_VLOC_STACK : + * - p_value must point to non-volatile memory (flash) or be NULL. + * - If p_value is NULL, the device name will initially be empty. + * + * @note If vloc is @ref BLE_GATTS_VLOC_USER : + * - p_value cannot be NULL. + * - If the device name is writable, p_value must point to volatile memory (RAM). + * + * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: + * - Invalid device name location (vloc). + * - Invalid device name security mode. + * @retval ::NRF_ERROR_INVALID_LENGTH One or more of the following is true: + * - The device name length is invalid (must be between 0 and @ref BLE_GAP_DEVNAME_MAX_LEN). + * - The device name length is too long for the given Attribute Table. + * @retval ::NRF_ERROR_NOT_SUPPORTED Device name security mode is not supported. + */ +typedef struct +{ + ble_gap_conn_sec_mode_t write_perm; /**< Write permissions. */ + uint8_t vloc:2; /**< Value location, see @ref BLE_GATTS_VLOCS.*/ + uint8_t *p_value; /**< Pointer to where the value (device name) is stored or will be stored. */ + uint16_t current_len; /**< Current length in bytes of the memory pointed to by p_value.*/ + uint16_t max_len; /**< Maximum length in bytes of the memory pointed to by p_value.*/ +} ble_gap_cfg_device_name_t; + + +/**@brief Configuration structure for GAP configurations. */ +typedef union +{ + ble_gap_cfg_role_count_t role_count_cfg; /**< Role count configuration, cfg_id is @ref BLE_GAP_CFG_ROLE_COUNT. */ + ble_gap_cfg_device_name_t device_name_cfg; /**< Device name configuration, cfg_id is @ref BLE_GAP_CFG_DEVICE_NAME. */ +} ble_gap_cfg_t; + + +/**@brief Channel Map option. + * + * @details Used with @ref sd_ble_opt_get to get the current channel map + * or @ref sd_ble_opt_set to set a new channel map. When setting the + * channel map, it applies to all current and future connections. When getting the + * current channel map, it applies to a single connection and the connection handle + * must be supplied. + * + * @note Setting the channel map may take some time, depending on connection parameters. + * The time taken may be different for each connection and the get operation will + * return the previous channel map until the new one has taken effect. + * + * @note After setting the channel map, by spec it can not be set again until at least 1 s has passed. + * See Bluetooth Specification Version 4.1 Volume 2, Part E, Section 7.3.46. + * + * @retval ::NRF_SUCCESS Get or set successful. + * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: + * - Less then two bits in @ref ch_map are set. + * - Bits for primary advertising channels (37-39) are set. + * @retval ::NRF_ERROR_BUSY Channel map was set again before enough time had passed. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied for get. + * + */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle (only applicable for get) */ + uint8_t ch_map[5]; /**< Channel Map (37-bit). */ +} ble_gap_opt_ch_map_t; + + +/**@brief Local connection latency option. + * + * @details Local connection latency is a feature which enables the slave to improve + * current consumption by ignoring the slave latency set by the peer. The + * local connection latency can only be set to a multiple of the slave latency, + * and cannot be longer than half of the supervision timeout. + * + * @details Used with @ref sd_ble_opt_set to set the local connection latency. The + * @ref sd_ble_opt_get is not supported for this option, but the actual + * local connection latency (unless set to NULL) is set as a return parameter + * when setting the option. + * + * @note The latency set will be truncated down to the closest slave latency event + * multiple, or the nearest multiple before half of the supervision timeout. + * + * @note The local connection latency is disabled by default, and needs to be enabled for new + * connections and whenever the connection is updated. + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_NOT_SUPPORTED Get is not supported. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. + */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle */ + uint16_t requested_latency; /**< Requested local connection latency. */ + uint16_t * p_actual_latency; /**< Pointer to storage for the actual local connection latency (can be set to NULL to skip return value). */ +} ble_gap_opt_local_conn_latency_t; + +/**@brief Disable slave latency + * + * @details Used with @ref sd_ble_opt_set to temporarily disable slave latency of a peripheral connection + * (see @ref ble_gap_conn_params_t::slave_latency). And to re-enable it again. When disabled, the + * peripheral will ignore the slave_latency set by the central. + * + * @note Shall only be called on peripheral links. + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_NOT_SUPPORTED Get is not supported. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. + */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle */ + uint8_t disable : 1; /**< Set to 1 to disable slave latency. Set to 0 enable it again.*/ +} ble_gap_opt_slave_latency_disable_t; + +/**@brief Passkey Option. + * + * @details Structure containing the passkey to be used during pairing. This can be used with @ref + * sd_ble_opt_set to make the SoftDevice use a preprogrammed passkey for authentication + * instead of generating a random one. + * + * @note Repeated pairing attempts using the same preprogrammed passkey makes pairing vulnerable to MITM attacks. + * + * @note @ref sd_ble_opt_get is not supported for this option. + * + */ +typedef struct +{ + uint8_t const * p_passkey; /**< Pointer to 6-digit ASCII string (digit 0..9 only, no NULL termination) passkey to be used during pairing. If this is NULL, the SoftDevice will generate a random passkey if required.*/ +} ble_gap_opt_passkey_t; + + +/**@brief Compatibility mode 1 option. + * + * @details This can be used with @ref sd_ble_opt_set to enable and disable + * compatibility mode 1. Compatibility mode 1 is disabled by default. + * + * @note Compatibility mode 1 enables interoperability with devices that do not support a value of + * 0 for the WinOffset parameter in the Link Layer CONNECT_IND packet. This applies to a + * limited set of legacy peripheral devices from another vendor. Enabling this compatibility + * mode will only have an effect if the local device will act as a central device and + * initiate a connection to a peripheral device. In that case it may lead to the connection + * creation taking up to one connection interval longer to complete for all connections. + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_INVALID_STATE When connection creation is ongoing while mode 1 is set. + */ +typedef struct +{ + uint8_t enable : 1; /**< Enable compatibility mode 1.*/ +} ble_gap_opt_compat_mode_1_t; + + +/**@brief Authenticated payload timeout option. + * + * @details This can be used with @ref sd_ble_opt_set to change the Authenticated payload timeout to a value other + * than the default of @ref BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MAX. + * + * @note The authenticated payload timeout event ::BLE_GAP_TIMEOUT_SRC_AUTH_PAYLOAD will be generated + * if auth_payload_timeout time has elapsed without receiving a packet with a valid MIC on an encrypted + * link. + * + * @note The LE ping procedure will be initiated before the timer expires to give the peer a chance + * to reset the timer. In addition the stack will try to prioritize running of LE ping over other + * activities to increase chances of finishing LE ping before timer expires. To avoid side-effects + * on other activities, it is recommended to use high timeout values. + * Recommended timeout > 2*(connInterval * (6 + connSlaveLatency)). + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. auth_payload_timeout was outside of allowed range. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. + */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle */ + uint16_t auth_payload_timeout; /**< Requested timeout in 10 ms unit, see @ref BLE_GAP_AUTH_PAYLOAD_TIMEOUT. */ +} ble_gap_opt_auth_payload_timeout_t; + +/**@brief Option structure for GAP options. */ +typedef union +{ + ble_gap_opt_ch_map_t ch_map; /**< Parameters for the Channel Map option. */ + ble_gap_opt_local_conn_latency_t local_conn_latency; /**< Parameters for the Local connection latency option */ + ble_gap_opt_passkey_t passkey; /**< Parameters for the Passkey option.*/ + ble_gap_opt_compat_mode_1_t compat_mode_1; /**< Parameters for the compatibility mode 1 option.*/ + ble_gap_opt_auth_payload_timeout_t auth_payload_timeout; /**< Parameters for the authenticated payload timeout option.*/ + ble_gap_opt_slave_latency_disable_t slave_latency_disable; /**< Parameters for the Disable slave latency option */ +} ble_gap_opt_t; +/**@} */ + + +/**@addtogroup BLE_GAP_FUNCTIONS Functions + * @{ */ + +/**@brief Set the local Bluetooth identity address. + * + * The local Bluetooth identity address is the address that identifies this device to other peers. + * The address type must be either @ref BLE_GAP_ADDR_TYPE_PUBLIC or @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC. + * + * @note The identity address cannot be changed while advertising, scanning or creating a connection. + * + * @note This address will be distributed to the peer during bonding. + * If the address changes, the address stored in the peer device will not be valid and the ability to + * reconnect using the old address will be lost. + * + * @note By default the SoftDevice will set an address of type @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC upon being + * enabled. The address is a random number populated during the IC manufacturing process and remains unchanged + * for the lifetime of each IC. + * + * @mscs + * @mmsc{@ref BLE_GAP_ADV_MSC} + * @endmscs + * + * @param[in] p_addr Pointer to address structure. + * + * @retval ::NRF_SUCCESS Address successfully set. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::NRF_ERROR_INVALID_STATE The identity address cannot be changed while advertising, + * scanning or creating a connection. + */ +SVCALL(SD_BLE_GAP_ADDR_SET, uint32_t, sd_ble_gap_addr_set(ble_gap_addr_t const *p_addr)); + + +/**@brief Get local Bluetooth identity address. + * + * @note This will always return the identity address irrespective of the privacy settings, + * i.e. the address type will always be either @ref BLE_GAP_ADDR_TYPE_PUBLIC or @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC. + * + * @param[out] p_addr Pointer to address structure to be filled in. + * + * @retval ::NRF_SUCCESS Address successfully retrieved. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. + */ +SVCALL(SD_BLE_GAP_ADDR_GET, uint32_t, sd_ble_gap_addr_get(ble_gap_addr_t *p_addr)); + + +/**@brief Set the active whitelist in the SoftDevice. + * + * @note Only one whitelist can be used at a time and the whitelist is shared between the BLE roles. + * The whitelist cannot be set if a BLE role is using the whitelist. + * + * @note If an address is resolved using the information in the device identity list, then the whitelist + * filter policy applies to the peer identity address and not the resolvable address sent on air. + * + * @mscs + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_PRIVATE_SCAN_MSC} + * @endmscs + * + * @param[in] pp_wl_addrs Pointer to a whitelist of peer addresses, if NULL the whitelist will be cleared. + * @param[in] len Length of the whitelist, maximum @ref BLE_GAP_WHITELIST_ADDR_MAX_COUNT. + * + * @retval ::NRF_SUCCESS The whitelist is successfully set/cleared. + * @retval ::NRF_ERROR_INVALID_ADDR The whitelist (or one of its entries) provided is invalid. + * @retval ::BLE_ERROR_GAP_WHITELIST_IN_USE The whitelist is in use by a BLE role and cannot be set or cleared. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. + * @retval ::NRF_ERROR_DATA_SIZE The given whitelist size is invalid (zero or too large); this can only return when + * pp_wl_addrs is not NULL. + */ +SVCALL(SD_BLE_GAP_WHITELIST_SET, uint32_t, sd_ble_gap_whitelist_set(ble_gap_addr_t const * const * pp_wl_addrs, uint8_t len)); + + +/**@brief Set device identity list. + * + * @note Only one device identity list can be used at a time and the list is shared between the BLE roles. + * The device identity list cannot be set if a BLE role is using the list. + * + * @param[in] pp_id_keys Pointer to an array of peer identity addresses and peer IRKs, if NULL the device identity list will be cleared. + * @param[in] pp_local_irks Pointer to an array of local IRKs. Each entry in the array maps to the entry in pp_id_keys at the same index. + * To fill in the list with the currently set device IRK for all peers, set to NULL. + * @param[in] len Length of the device identity list, maximum @ref BLE_GAP_DEVICE_IDENTITIES_MAX_COUNT. + * + * @mscs + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_PRIVATE_SCAN_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_CONN_PRIV_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_CONN_PRIV_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS The device identity list successfully set/cleared. + * @retval ::NRF_ERROR_INVALID_ADDR The device identity list (or one of its entries) provided is invalid. + * This code may be returned if the local IRK list also has an invalid entry. + * @retval ::BLE_ERROR_GAP_DEVICE_IDENTITIES_IN_USE The device identity list is in use and cannot be set or cleared. + * @retval ::BLE_ERROR_GAP_DEVICE_IDENTITIES_DUPLICATE The device identity list contains multiple entries with the same identity address. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. + * @retval ::NRF_ERROR_DATA_SIZE The given device identity list size invalid (zero or too large); this can + * only return when pp_id_keys is not NULL. + */ +SVCALL(SD_BLE_GAP_DEVICE_IDENTITIES_SET, uint32_t, sd_ble_gap_device_identities_set(ble_gap_id_key_t const * const * pp_id_keys, ble_gap_irk_t const * const * pp_local_irks, uint8_t len)); + + +/**@brief Set privacy settings. + * + * @note Privacy settings cannot be changed while advertising, scanning or creating a connection. + * + * @param[in] p_privacy_params Privacy settings. + * + * @mscs + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. + * @retval ::NRF_ERROR_INVALID_ADDR The pointer to privacy settings is NULL or invalid. + * Otherwise, the p_device_irk pointer in privacy parameter is an invalid pointer. + * @retval ::NRF_ERROR_INVALID_PARAM Out of range parameters are provided. + * @retval ::NRF_ERROR_INVALID_STATE Privacy settings cannot be changed while advertising, scanning + * or creating a connection. + */ +SVCALL(SD_BLE_GAP_PRIVACY_SET, uint32_t, sd_ble_gap_privacy_set(ble_gap_privacy_params_t const *p_privacy_params)); + + +/**@brief Get privacy settings. + * + * @note ::ble_gap_privacy_params_t::p_device_irk must be initialized to NULL or a valid address before this function is called. + * If it is initialized to a valid address, the address pointed to will contain the current device IRK on return. + * + * @param[in,out] p_privacy_params Privacy settings. + * + * @retval ::NRF_SUCCESS Privacy settings read. + * @retval ::NRF_ERROR_INVALID_ADDR The pointer given for returning the privacy settings may be NULL or invalid. + * Otherwise, the p_device_irk pointer in privacy parameter is an invalid pointer. + */ +SVCALL(SD_BLE_GAP_PRIVACY_GET, uint32_t, sd_ble_gap_privacy_get(ble_gap_privacy_params_t *p_privacy_params)); + + +/**@brief Configure an advertising set. Set, clear or update advertising and scan response data. + * + * @note The format of the advertising data will be checked by this call to ensure interoperability. + * Limitations imposed by this API call to the data provided include having a flags data type in the scan response data and + * duplicating the local name in the advertising data and scan response data. + * + * @note In order to update advertising data while advertising, new advertising buffers must be provided. + * + * @mscs + * @mmsc{@ref BLE_GAP_ADV_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @param[in,out] p_adv_handle Provide a pointer to a handle containing @ref BLE_GAP_ADV_SET_HANDLE_NOT_SET to configure + * a new advertising set. On success, a new handle is then returned through the pointer. + * Provide a pointer to an existing advertising handle to configure an existing advertising set. + * @param[in] p_adv_data Advertising data. If set to NULL, no advertising data will be used. See @ref ble_gap_adv_data_t. + * @param[in] p_adv_params Advertising parameters. When this function is used to update advertising data while advertising, + * this parameter must be NULL. See @ref ble_gap_adv_params_t. + * + * @retval ::NRF_SUCCESS Advertising set successfully configured. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied: + * - Invalid advertising data configuration specified. See @ref ble_gap_adv_data_t. + * - Invalid configuration of p_adv_params. See @ref ble_gap_adv_params_t. + * - Use of whitelist requested but whitelist has not been set, + * see @ref sd_ble_gap_whitelist_set. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR ble_gap_adv_params_t::p_peer_addr is invalid. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * - It is invalid to provide non-NULL advertising set parameters while advertising. + * - It is invalid to provide the same data buffers while advertising. To update + * advertising data, provide new advertising buffers. + * @retval ::BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST Discoverable mode and whitelist incompatible. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE The provided advertising handle was not found. Use @ref BLE_GAP_ADV_SET_HANDLE_NOT_SET to + * configure a new advertising handle. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_FLAGS Invalid combination of advertising flags supplied. + * @retval ::NRF_ERROR_INVALID_DATA Invalid data type(s) supplied. Check the advertising data format specification + * given in Bluetooth Specification Version 5.0, Volume 3, Part C, Chapter 11. + * @retval ::NRF_ERROR_INVALID_LENGTH Invalid data length(s) supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported data length or advertising parameter configuration. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to configure a new advertising handle. Update an + * existing advertising handle instead. + * @retval ::BLE_ERROR_GAP_UUID_LIST_MISMATCH Invalid UUID list supplied. + */ +SVCALL(SD_BLE_GAP_ADV_SET_CONFIGURE, uint32_t, sd_ble_gap_adv_set_configure(uint8_t *p_adv_handle, ble_gap_adv_data_t const *p_adv_data, ble_gap_adv_params_t const *p_adv_params)); + + +/**@brief Start advertising (GAP Discoverable, Connectable modes, Broadcast Procedure). + * + * @note Only one advertiser may be active at any time. + * + * @events + * @event{@ref BLE_GAP_EVT_CONNECTED, Generated after connection has been established through connectable advertising.} + * @event{@ref BLE_GAP_EVT_ADV_SET_TERMINATED, Advertising set has terminated.} + * @event{@ref BLE_GAP_EVT_SCAN_REQ_REPORT, A scan request was received.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_ADV_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_CONN_PRIV_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @param[in] adv_handle Advertising handle to advertise on, received from @ref sd_ble_gap_adv_set_configure. + * @param[in] conn_cfg_tag Tag identifying a configuration set by @ref sd_ble_cfg_set or + * @ref BLE_CONN_CFG_TAG_DEFAULT to use the default connection configuration. For non-connectable + * advertising, this is ignored. + * + * @retval ::NRF_SUCCESS The BLE stack has started advertising. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. adv_handle is not configured or already advertising. + * @retval ::NRF_ERROR_CONN_COUNT The limit of available connections has been reached; connectable advertiser cannot be started. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE Advertising handle not found. Configure a new adveriting handle with @ref sd_ble_gap_adv_set_configure. + * @retval ::NRF_ERROR_NOT_FOUND conn_cfg_tag not found. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied: + * - Invalid configuration of p_adv_params. See @ref ble_gap_adv_params_t. + * - Use of whitelist requested but whitelist has not been set, see @ref sd_ble_gap_whitelist_set. + * @retval ::NRF_ERROR_RESOURCES Either: + * - adv_handle is configured with connectable advertising, but the event_length parameter + * associated with conn_cfg_tag is too small to be able to establish a connection on + * the selected advertising phys. Use @ref sd_ble_cfg_set to increase the event length. + * - Not enough BLE role slots available. + Stop one or more currently active roles (Central, Peripheral, Broadcaster or Observer) and try again. + * - p_adv_params is configured with connectable advertising, but the event_length parameter + * associated with conn_cfg_tag is too small to be able to establish a connection on + * the selected advertising phys. Use @ref sd_ble_cfg_set to increase the event length. + * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported PHYs supplied to the call. + */ +SVCALL(SD_BLE_GAP_ADV_START, uint32_t, sd_ble_gap_adv_start(uint8_t adv_handle, uint8_t conn_cfg_tag)); + + +/**@brief Stop advertising (GAP Discoverable, Connectable modes, Broadcast Procedure). + * + * @mscs + * @mmsc{@ref BLE_GAP_ADV_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @param[in] adv_handle The advertising handle that should stop advertising. + * + * @retval ::NRF_SUCCESS The BLE stack has stopped advertising. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE Invalid advertising handle. + * @retval ::NRF_ERROR_INVALID_STATE The advertising handle is not advertising. + */ +SVCALL(SD_BLE_GAP_ADV_STOP, uint32_t, sd_ble_gap_adv_stop(uint8_t adv_handle)); + + + +/**@brief Update connection parameters. + * + * @details In the central role this will initiate a Link Layer connection parameter update procedure, + * otherwise in the peripheral role, this will send the corresponding L2CAP request and wait for + * the central to perform the procedure. In both cases, and regardless of success or failure, the application + * will be informed of the result with a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE event. + * + * @details This function can be used as a central both to reply to a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST or to start the procedure unrequested. + * + * @events + * @event{@ref BLE_GAP_EVT_CONN_PARAM_UPDATE, Result of the connection parameter update procedure.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CPU_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} + * @mmsc{@ref BLE_GAP_MULTILINK_CPU_MSC} + * @mmsc{@ref BLE_GAP_MULTILINK_CTRL_PROC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_CPU_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_conn_params Pointer to desired connection parameters. If NULL is provided on a peripheral role, + * the parameters in the PPCP characteristic of the GAP service will be used instead. + * If NULL is provided on a central role and in response to a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST, the peripheral request will be rejected + * + * @retval ::NRF_SUCCESS The Connection Update procedure has been started successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::NRF_ERROR_BUSY Procedure already in progress, wait for pending procedures to complete and retry. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + */ +SVCALL(SD_BLE_GAP_CONN_PARAM_UPDATE, uint32_t, sd_ble_gap_conn_param_update(uint16_t conn_handle, ble_gap_conn_params_t const *p_conn_params)); + + +/**@brief Disconnect (GAP Link Termination). + * + * @details This call initiates the disconnection procedure, and its completion will be communicated to the application + * with a @ref BLE_GAP_EVT_DISCONNECTED event. + * + * @events + * @event{@ref BLE_GAP_EVT_DISCONNECTED, Generated when disconnection procedure is complete.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CONN_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] hci_status_code HCI status code, see @ref BLE_HCI_STATUS_CODES (accepted values are @ref BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION and @ref BLE_HCI_CONN_INTERVAL_UNACCEPTABLE). + * + * @retval ::NRF_SUCCESS The disconnection procedure has been started successfully. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation (disconnection is already in progress). + */ +SVCALL(SD_BLE_GAP_DISCONNECT, uint32_t, sd_ble_gap_disconnect(uint16_t conn_handle, uint8_t hci_status_code)); + + +/**@brief Set the radio's transmit power. + * + * @param[in] role The role to set the transmit power for, see @ref BLE_GAP_TX_POWER_ROLES for + * possible roles. + * @param[in] handle The handle parameter is interpreted depending on role: + * - If role is @ref BLE_GAP_TX_POWER_ROLE_CONN, this value is the specific connection handle. + * - If role is @ref BLE_GAP_TX_POWER_ROLE_ADV, the advertising set identified with the advertising handle, + * will use the specified transmit power, and include it in the advertising packet headers if + * @ref ble_gap_adv_properties_t::include_tx_power set. + * - For all other roles handle is ignored. + * @param[in] tx_power Radio transmit power in dBm (see note for accepted values). + * + * @note Supported tx_power values: -40dBm, -20dBm, -16dBm, -12dBm, -8dBm, -4dBm, 0dBm, +3dBm and +4dBm. + * @note The initiator will have the same transmit power as the scanner. + * @note When a connection is created it will inherit the transmit power from the initiator or + * advertiser leading to the connection. + * + * @retval ::NRF_SUCCESS Successfully changed the transmit power. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE Advertising handle not found. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_TX_POWER_SET, uint32_t, sd_ble_gap_tx_power_set(uint8_t role, uint16_t handle, int8_t tx_power)); + + +/**@brief Set GAP Appearance value. + * + * @param[in] appearance Appearance (16-bit), see @ref BLE_APPEARANCES. + * + * @retval ::NRF_SUCCESS Appearance value set successfully. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + */ +SVCALL(SD_BLE_GAP_APPEARANCE_SET, uint32_t, sd_ble_gap_appearance_set(uint16_t appearance)); + + +/**@brief Get GAP Appearance value. + * + * @param[out] p_appearance Pointer to appearance (16-bit) to be filled in, see @ref BLE_APPEARANCES. + * + * @retval ::NRF_SUCCESS Appearance value retrieved successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + */ +SVCALL(SD_BLE_GAP_APPEARANCE_GET, uint32_t, sd_ble_gap_appearance_get(uint16_t *p_appearance)); + + +/**@brief Set GAP Peripheral Preferred Connection Parameters. + * + * @param[in] p_conn_params Pointer to a @ref ble_gap_conn_params_t structure with the desired parameters. + * + * @retval ::NRF_SUCCESS Peripheral Preferred Connection Parameters set successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + */ +SVCALL(SD_BLE_GAP_PPCP_SET, uint32_t, sd_ble_gap_ppcp_set(ble_gap_conn_params_t const *p_conn_params)); + + +/**@brief Get GAP Peripheral Preferred Connection Parameters. + * + * @param[out] p_conn_params Pointer to a @ref ble_gap_conn_params_t structure where the parameters will be stored. + * + * @retval ::NRF_SUCCESS Peripheral Preferred Connection Parameters retrieved successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + */ +SVCALL(SD_BLE_GAP_PPCP_GET, uint32_t, sd_ble_gap_ppcp_get(ble_gap_conn_params_t *p_conn_params)); + + +/**@brief Set GAP device name. + * + * @note If the device name is located in application flash memory (see @ref ble_gap_cfg_device_name_t), + * it cannot be changed. Then @ref NRF_ERROR_FORBIDDEN will be returned. + * + * @param[in] p_write_perm Write permissions for the Device Name characteristic, see @ref ble_gap_conn_sec_mode_t. + * @param[in] p_dev_name Pointer to a UTF-8 encoded, non NULL-terminated string. + * @param[in] len Length of the UTF-8, non NULL-terminated string pointed to by p_dev_name in octets (must be smaller or equal than @ref BLE_GAP_DEVNAME_MAX_LEN). + * + * @retval ::NRF_SUCCESS GAP device name and permissions set successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. + * @retval ::NRF_ERROR_FORBIDDEN Device name is not writable. + */ +SVCALL(SD_BLE_GAP_DEVICE_NAME_SET, uint32_t, sd_ble_gap_device_name_set(ble_gap_conn_sec_mode_t const *p_write_perm, uint8_t const *p_dev_name, uint16_t len)); + + +/**@brief Get GAP device name. + * + * @note If the device name is longer than the size of the supplied buffer, + * p_len will return the complete device name length, + * and not the number of bytes actually returned in p_dev_name. + * The application may use this information to allocate a suitable buffer size. + * + * @param[out] p_dev_name Pointer to an empty buffer where the UTF-8 non NULL-terminated string will be placed. Set to NULL to obtain the complete device name length. + * @param[in,out] p_len Length of the buffer pointed by p_dev_name, complete device name length on output. + * + * @retval ::NRF_SUCCESS GAP device name retrieved successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. + */ +SVCALL(SD_BLE_GAP_DEVICE_NAME_GET, uint32_t, sd_ble_gap_device_name_get(uint8_t *p_dev_name, uint16_t *p_len)); + + +/**@brief Initiate the GAP Authentication procedure. + * + * @details In the central role, this function will send an SMP Pairing Request (or an SMP Pairing Failed if rejected), + * otherwise in the peripheral role, an SMP Security Request will be sent. + * + * @events + * @event{Depending on the security parameters set and the packet exchanges with the peer\, the following events may be generated:} + * @event{@ref BLE_GAP_EVT_SEC_PARAMS_REQUEST} + * @event{@ref BLE_GAP_EVT_SEC_INFO_REQUEST} + * @event{@ref BLE_GAP_EVT_PASSKEY_DISPLAY} + * @event{@ref BLE_GAP_EVT_KEY_PRESSED} + * @event{@ref BLE_GAP_EVT_AUTH_KEY_REQUEST} + * @event{@ref BLE_GAP_EVT_LESC_DHKEY_REQUEST} + * @event{@ref BLE_GAP_EVT_CONN_SEC_UPDATE} + * @event{@ref BLE_GAP_EVT_AUTH_STATUS} + * @event{@ref BLE_GAP_EVT_TIMEOUT} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_SEC_REQ_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_SEC_REQ_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_sec_params Pointer to the @ref ble_gap_sec_params_t structure with the security parameters to be used during the pairing or bonding procedure. + * In the peripheral role, only the bond, mitm, lesc and keypress fields of this structure are used. + * In the central role, this pointer may be NULL to reject a Security Request. + * + * @retval ::NRF_SUCCESS Successfully initiated authentication procedure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::NRF_ERROR_NO_MEM The maximum number of authentication procedures that can run in parallel for the given role is reached. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED Setting of sign or link fields in @ref ble_gap_sec_kdist_t not supported. + * @retval ::NRF_ERROR_TIMEOUT A SMP timeout has occurred, and further SMP operations on this link is prohibited. + */ +SVCALL(SD_BLE_GAP_AUTHENTICATE, uint32_t, sd_ble_gap_authenticate(uint16_t conn_handle, ble_gap_sec_params_t const *p_sec_params)); + + +/**@brief Reply with GAP security parameters. + * + * @details This function is only used to reply to a @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. + * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. + * + * @events + * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_JW_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_PERIPH_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_CENTRAL_OOB_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_CONFIRM_FAIL_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_KS_TOO_SMALL_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_APP_ERROR_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_REMOTE_PAIRING_FAIL_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_TIMEOUT_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] sec_status Security status, see @ref BLE_GAP_SEC_STATUS. + * @param[in] p_sec_params Pointer to a @ref ble_gap_sec_params_t security parameters structure. In the central role this must be set to NULL, as the parameters have + * already been provided during a previous call to @ref sd_ble_gap_authenticate. + * @param[in,out] p_sec_keyset Pointer to a @ref ble_gap_sec_keyset_t security keyset structure. Any keys generated and/or distributed as a result of the ongoing security procedure + * will be stored into the memory referenced by the pointers inside this structure. The keys will be stored and available to the application + * upon reception of a @ref BLE_GAP_EVT_AUTH_STATUS event. + * Note that the SoftDevice expects the application to provide memory for storing the + * peer's keys. So it must be ensured that the relevant pointers inside this structure are not NULL. The pointers to the local key + * can, however, be NULL, in which case, the local key data will not be available to the application upon reception of the + * @ref BLE_GAP_EVT_AUTH_STATUS event. + * + * @retval ::NRF_SUCCESS Successfully accepted security parameter from the application. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED Setting of sign or link fields in @ref ble_gap_sec_kdist_t not supported. + */ +SVCALL(SD_BLE_GAP_SEC_PARAMS_REPLY, uint32_t, sd_ble_gap_sec_params_reply(uint16_t conn_handle, uint8_t sec_status, ble_gap_sec_params_t const *p_sec_params, ble_gap_sec_keyset_t const *p_sec_keyset)); + + +/**@brief Reply with an authentication key. + * + * @details This function is only used to reply to a @ref BLE_GAP_EVT_AUTH_KEY_REQUEST or a @ref BLE_GAP_EVT_PASSKEY_DISPLAY, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. + * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. + * + * @events + * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_CENTRAL_OOB_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] key_type See @ref BLE_GAP_AUTH_KEY_TYPES. + * @param[in] p_key If key type is @ref BLE_GAP_AUTH_KEY_TYPE_NONE, then NULL. + * If key type is @ref BLE_GAP_AUTH_KEY_TYPE_PASSKEY, then a 6-byte ASCII string (digit 0..9 only, no NULL termination) + * or NULL when confirming LE Secure Connections Numeric Comparison. + * If key type is @ref BLE_GAP_AUTH_KEY_TYPE_OOB, then a 16-byte OOB key value in little-endian format. + * + * @retval ::NRF_SUCCESS Authentication key successfully set. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_AUTH_KEY_REPLY, uint32_t, sd_ble_gap_auth_key_reply(uint16_t conn_handle, uint8_t key_type, uint8_t const *p_key)); + + +/**@brief Reply with an LE Secure connections DHKey. + * + * @details This function is only used to reply to a @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. + * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. + * + * @events + * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_dhkey LE Secure Connections DHKey. + * + * @retval ::NRF_SUCCESS DHKey successfully set. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_LESC_DHKEY_REPLY, uint32_t, sd_ble_gap_lesc_dhkey_reply(uint16_t conn_handle, ble_gap_lesc_dhkey_t const *p_dhkey)); + + +/**@brief Notify the peer of a local keypress. + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] kp_not See @ref BLE_GAP_KP_NOT_TYPES. + * + * @retval ::NRF_SUCCESS Keypress notification successfully queued for transmission. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Either not entering a passkey or keypresses have not been enabled by both peers. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_BUSY The BLE stack is busy. Retry at later time. + */ +SVCALL(SD_BLE_GAP_KEYPRESS_NOTIFY, uint32_t, sd_ble_gap_keypress_notify(uint16_t conn_handle, uint8_t kp_not)); + + +/**@brief Generate a set of OOB data to send to a peer out of band. + * + * @note The @ref ble_gap_addr_t included in the OOB data returned will be the currently active one (or, if a connection has already been established, + * the one used during connection setup). The application may manually overwrite it with an updated value. + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. Can be @ref BLE_CONN_HANDLE_INVALID if a BLE connection has not been established yet. + * @param[in] p_pk_own LE Secure Connections local P-256 Public Key. + * @param[out] p_oobd_own The OOB data to be sent out of band to a peer. + * + * @retval ::NRF_SUCCESS OOB data successfully generated. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_LESC_OOB_DATA_GET, uint32_t, sd_ble_gap_lesc_oob_data_get(uint16_t conn_handle, ble_gap_lesc_p256_pk_t const *p_pk_own, ble_gap_lesc_oob_data_t *p_oobd_own)); + +/**@brief Provide the OOB data sent/received out of band. + * + * @note An authentication procedure with OOB selected as an algorithm must be in progress when calling this function. + * @note A @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST event with the oobd_req set to 1 must have been received prior to calling this function. + * + * @events + * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_oobd_own The OOB data sent out of band to a peer or NULL if the peer has not received OOB data. + * Must correspond to @ref ble_gap_sec_params_t::oob flag in @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST. + * @param[in] p_oobd_peer The OOB data received out of band from a peer or NULL if none received. + * Must correspond to @ref ble_gap_sec_params_t::oob flag in @ref sd_ble_gap_authenticate in the central role + * or @ref sd_ble_gap_sec_params_reply in the peripheral role. + * + * @retval ::NRF_SUCCESS OOB data accepted. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_LESC_OOB_DATA_SET, uint32_t, sd_ble_gap_lesc_oob_data_set(uint16_t conn_handle, ble_gap_lesc_oob_data_t const *p_oobd_own, ble_gap_lesc_oob_data_t const *p_oobd_peer)); + + +/**@brief Initiate GAP Encryption procedure. + * + * @details In the central role, this function will initiate the encryption procedure using the encryption information provided. + * + * @events + * @event{@ref BLE_GAP_EVT_CONN_SEC_UPDATE, The connection security has been updated.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_ENC_MSC} + * @mmsc{@ref BLE_GAP_MULTILINK_CTRL_PROC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_SEC_REQ_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_master_id Pointer to a @ref ble_gap_master_id_t master identification structure. + * @param[in] p_enc_info Pointer to a @ref ble_gap_enc_info_t encryption information structure. + * + * @retval ::NRF_SUCCESS Successfully initiated authentication procedure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::BLE_ERROR_INVALID_ROLE Operation is not supported in the Peripheral role. + * @retval ::NRF_ERROR_BUSY Procedure already in progress or not allowed at this time, wait for pending procedures to complete and retry. + */ +SVCALL(SD_BLE_GAP_ENCRYPT, uint32_t, sd_ble_gap_encrypt(uint16_t conn_handle, ble_gap_master_id_t const *p_master_id, ble_gap_enc_info_t const *p_enc_info)); + + +/**@brief Reply with GAP security information. + * + * @details This function is only used to reply to a @ref BLE_GAP_EVT_SEC_INFO_REQUEST, calling it at other times will result in @ref NRF_ERROR_INVALID_STATE. + * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. + * @note Data signing is not yet supported, and p_sign_info must therefore be NULL. + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_ENC_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_enc_info Pointer to a @ref ble_gap_enc_info_t encryption information structure. May be NULL to signal none is available. + * @param[in] p_id_info Pointer to a @ref ble_gap_irk_t identity information structure. May be NULL to signal none is available. + * @param[in] p_sign_info Pointer to a @ref ble_gap_sign_info_t signing information structure. May be NULL to signal none is available. + * + * @retval ::NRF_SUCCESS Successfully accepted security information. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_SEC_INFO_REPLY, uint32_t, sd_ble_gap_sec_info_reply(uint16_t conn_handle, ble_gap_enc_info_t const *p_enc_info, ble_gap_irk_t const *p_id_info, ble_gap_sign_info_t const *p_sign_info)); + + +/**@brief Get the current connection security. + * + * @param[in] conn_handle Connection handle. + * @param[out] p_conn_sec Pointer to a @ref ble_gap_conn_sec_t structure to be filled in. + * + * @retval ::NRF_SUCCESS Current connection security successfully retrieved. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_CONN_SEC_GET, uint32_t, sd_ble_gap_conn_sec_get(uint16_t conn_handle, ble_gap_conn_sec_t *p_conn_sec)); + + +/**@brief Start reporting the received signal strength to the application. + * + * A new event is reported whenever the RSSI value changes, until @ref sd_ble_gap_rssi_stop is called. + * + * @events + * @event{@ref BLE_GAP_EVT_RSSI_CHANGED, New RSSI data available. How often the event is generated is + * dependent on the settings of the threshold_dbm + * and skip_count input parameters.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} + * @mmsc{@ref BLE_GAP_RSSI_FILT_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] threshold_dbm Minimum change in dBm before triggering the @ref BLE_GAP_EVT_RSSI_CHANGED event. Events are disabled if threshold_dbm equals @ref BLE_GAP_RSSI_THRESHOLD_INVALID. + * @param[in] skip_count Number of RSSI samples with a change of threshold_dbm or more before sending a new @ref BLE_GAP_EVT_RSSI_CHANGED event. + * + * @retval ::NRF_SUCCESS Successfully activated RSSI reporting. + * @retval ::NRF_ERROR_INVALID_STATE RSSI reporting is already ongoing. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_RSSI_START, uint32_t, sd_ble_gap_rssi_start(uint16_t conn_handle, uint8_t threshold_dbm, uint8_t skip_count)); + + +/**@brief Stop reporting the received signal strength. + * + * @note An RSSI change detected before the call but not yet received by the application + * may be reported after @ref sd_ble_gap_rssi_stop has been called. + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} + * @mmsc{@ref BLE_GAP_RSSI_FILT_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * + * @retval ::NRF_SUCCESS Successfully deactivated RSSI reporting. + * @retval ::NRF_ERROR_INVALID_STATE RSSI reporting is not ongoing. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_RSSI_STOP, uint32_t, sd_ble_gap_rssi_stop(uint16_t conn_handle)); + + +/**@brief Get the received signal strength for the last connection event. + * + * @ref sd_ble_gap_rssi_start must be called to start reporting RSSI before using this function. @ref NRF_ERROR_NOT_FOUND + * will be returned until RSSI was sampled for the first time after calling @ref sd_ble_gap_rssi_start. + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[out] p_rssi Pointer to the location where the RSSI measurement shall be stored. + * @param[out] p_ch_index Pointer to the location where Channel Index for the RSSI measurement shall be stored. + * + * @retval ::NRF_SUCCESS Successfully read the RSSI. + * @retval ::NRF_ERROR_NOT_FOUND No sample is available. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_INVALID_STATE RSSI reporting is not ongoing. + */ +SVCALL(SD_BLE_GAP_RSSI_GET, uint32_t, sd_ble_gap_rssi_get(uint16_t conn_handle, int8_t *p_rssi, uint8_t *p_ch_index)); + + +/**@brief Start or continue scanning (GAP Discovery procedure, Observer Procedure). + * + * @note A call to this function will require the application to keep the memory pointed by + * p_adv_report_buffer alive until the buffer is released. The buffer is released when the scanner is stopped + * or when this function is called with another buffer. + * + * @note The scanner will automatically stop in the following cases: + * - @ref sd_ble_gap_scan_stop is called. + * - @ref sd_ble_gap_connect is called. + * - A @ref BLE_GAP_EVT_TIMEOUT with source set to @ref BLE_GAP_TIMEOUT_SRC_SCAN is received. + * - When a @ref BLE_GAP_EVT_ADV_REPORT event is received and @ref ble_gap_adv_report_type_t::status is not set to + * @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA. In this case scanning is only paused to let the application + * access received data. The application must call this function to continue scanning, or call @ref sd_ble_gap_scan_stop + * to stop scanning. + * + * @note If a @ref BLE_GAP_EVT_ADV_REPORT event is received with @ref ble_gap_adv_report_type_t::status set to + * @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA, the scanner will continue scanning, and the application will + * receive more reports from this advertising event. The following reports will include the old and new received data. + * The application can stop the scanner from receiving more packets from this advertising event by calling this function. + * This might be useful when receiving data from extended advertising events where @ref ble_gap_evt_adv_report_t::aux_pointer + * is large. + * + * @events + * @event{@ref BLE_GAP_EVT_ADV_REPORT, An advertising or scan response packet has been received.} + * @event{@ref BLE_GAP_EVT_TIMEOUT, Scanner has timed out.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_SCAN_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @param[in] p_scan_params Pointer to scan parameters structure. When this function is used to continue + * scanning, this parameter must be NULL. + * @param[in] p_adv_report_buffer Pointer to buffer used to store incoming advertising data. + * The memory pointed to should be kept alive until the scanning is stopped. + * See @ref BLE_GAP_SCAN_BUFFER_SIZE for minimum and maximum buffer size. + * If the scanner receives advertising data larger than can be stored in the buffer, + * a @ref BLE_GAP_EVT_ADV_REPORT will be raised with @ref ble_gap_adv_report_type_t::status + * set to @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_TRUNCATED. + * + * @retval ::NRF_SUCCESS Successfully initiated scanning procedure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Either: + * - Scanning is already ongoing and p_scan_params was not NULL + * - Scanning is not running and p_scan_params was NULL. + * - The scanner has timed out when this function is called to continue scanning. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. See @ref ble_gap_scan_params_t. + * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported parameters supplied. See @ref ble_gap_scan_params_t. + * @retval ::NRF_ERROR_INVALID_LENGTH The provided buffer length is invalid. See @ref BLE_GAP_SCAN_BUFFER_MIN. + * @retval ::NRF_ERROR_RESOURCES Not enough BLE role slots available. + * Stop one or more currently active roles (Central, Peripheral or Broadcaster) and try again + * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported PHYs supplied to the call. + */ +SVCALL(SD_BLE_GAP_SCAN_START, uint32_t, sd_ble_gap_scan_start(ble_gap_scan_params_t const *p_scan_params, ble_data_t const * p_adv_report_buffer)); + + +/**@brief Stop scanning (GAP Discovery procedure, Observer Procedure). + * + * @note The buffer provided in @ref sd_ble_gap_scan_start is released. + * + * @mscs + * @mmsc{@ref BLE_GAP_SCAN_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Successfully stopped scanning procedure. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Not in the scanning state. + */ +SVCALL(SD_BLE_GAP_SCAN_STOP, uint32_t, sd_ble_gap_scan_stop(void)); + + +/**@brief Create a connection (GAP Link Establishment). + * + * @note If a scanning procedure is currently in progress it will be automatically stopped when calling this function. + * The scanning procedure will be stopped even if the function returns an error. + * + * @mscs + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_CONN_PRIV_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_CONN_MSC} + * @endmscs + * + * @param[in] p_peer_addr Pointer to peer identity address. If @ref ble_gap_scan_params_t::filter_policy is set to use + * whitelist, then p_peer_addr is ignored. + * @param[in] p_scan_params Pointer to scan parameters structure. + * @param[in] p_conn_params Pointer to desired connection parameters. + * @param[in] conn_cfg_tag Tag identifying a configuration set by @ref sd_ble_cfg_set or + * @ref BLE_CONN_CFG_TAG_DEFAULT to use the default connection configuration. + * + * @retval ::NRF_SUCCESS Successfully initiated connection procedure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid parameter(s) pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * - Invalid parameter(s) in p_scan_params or p_conn_params. + * - Use of whitelist requested but whitelist has not been set, see @ref sd_ble_gap_whitelist_set. + * - Peer address was not present in the device identity list, see @ref sd_ble_gap_device_identities_set. + * @retval ::NRF_ERROR_NOT_FOUND conn_cfg_tag not found. + * @retval ::NRF_ERROR_INVALID_STATE The SoftDevice is in an invalid state to perform this operation. This may be due to an + * existing locally initiated connect procedure, which must complete before initiating again. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid Peer address. + * @retval ::NRF_ERROR_CONN_COUNT The limit of available connections has been reached. + * @retval ::NRF_ERROR_RESOURCES Either: + * - Not enough BLE role slots available. + * Stop one or more currently active roles (Central, Peripheral or Observer) and try again. + * - The event_length parameter associated with conn_cfg_tag is too small to be able to + * establish a connection on the selected @ref ble_gap_scan_params_t::scan_phys. + * Use @ref sd_ble_cfg_set to increase the event length. + * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported PHYs supplied to the call. + */ +SVCALL(SD_BLE_GAP_CONNECT, uint32_t, sd_ble_gap_connect(ble_gap_addr_t const *p_peer_addr, ble_gap_scan_params_t const *p_scan_params, ble_gap_conn_params_t const *p_conn_params, uint8_t conn_cfg_tag)); + + +/**@brief Cancel a connection establishment. + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_CONN_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Successfully canceled an ongoing connection procedure. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + */ +SVCALL(SD_BLE_GAP_CONNECT_CANCEL, uint32_t, sd_ble_gap_connect_cancel(void)); + + +/**@brief Initiate or respond to a PHY Update Procedure + * + * @details This function is used to initiate or respond to a PHY Update Procedure. It will always + * generate a @ref BLE_GAP_EVT_PHY_UPDATE event if successfully executed. + * If this function is used to initiate a PHY Update procedure and the only option + * provided in @ref ble_gap_phys_t::tx_phys and @ref ble_gap_phys_t::rx_phys is the + * currently active PHYs in the respective directions, the SoftDevice will generate a + * @ref BLE_GAP_EVT_PHY_UPDATE with the current PHYs set and will not initiate the + * procedure in the Link Layer. + * + * If @ref ble_gap_phys_t::tx_phys or @ref ble_gap_phys_t::rx_phys is @ref BLE_GAP_PHY_AUTO, + * then the stack will select PHYs based on the peer's PHY preferences and the local link + * configuration. The PHY Update procedure will for this case result in a PHY combination + * that respects the time constraints configured with @ref sd_ble_cfg_set and the current + * link layer data length. + * + * When acting as a central, the SoftDevice will select the fastest common PHY in each direction. + * + * If the peer does not support the PHY Update Procedure, then the resulting + * @ref BLE_GAP_EVT_PHY_UPDATE event will have a status set to + * @ref BLE_HCI_UNSUPPORTED_REMOTE_FEATURE. + * + * If the PHY procedure was rejected by the peer due to a procedure collision, the status + * will be @ref BLE_HCI_STATUS_CODE_LMP_ERROR_TRANSACTION_COLLISION or + * @ref BLE_HCI_DIFFERENT_TRANSACTION_COLLISION. + * If the peer responds to the PHY Update procedure with invalid parameters, the status + * will be @ref BLE_HCI_STATUS_CODE_INVALID_LMP_PARAMETERS. + * If the PHY procedure was rejected by the peer for a different reason, the status will + * contain the reason as specified by the peer. + * + * @events + * @event{@ref BLE_GAP_EVT_PHY_UPDATE, Result of the PHY Update Procedure.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_PHY_UPDATE} + * @mmsc{@ref BLE_GAP_PERIPHERAL_PHY_UPDATE} + * @endmscs + * + * @param[in] conn_handle Connection handle to indicate the connection for which the PHY Update is requested. + * @param[in] p_gap_phys Pointer to PHY structure. + * + * @retval ::NRF_SUCCESS Successfully requested a PHY Update. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported PHYs supplied to the call. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::NRF_ERROR_BUSY Procedure is already in progress or not allowed at this time. Process pending events and wait for the pending procedure to complete and retry. + * + */ +SVCALL(SD_BLE_GAP_PHY_UPDATE, uint32_t, sd_ble_gap_phy_update(uint16_t conn_handle, ble_gap_phys_t const *p_gap_phys)); + + +/**@brief Initiate or respond to a Data Length Update Procedure. + * + * @note If the application uses @ref BLE_GAP_DATA_LENGTH_AUTO for one or more members of + * p_dl_params, the SoftDevice will choose the highest value supported in current + * configuration and connection parameters. + * + * @param[in] conn_handle Connection handle. + * @param[in] p_dl_params Pointer to local parameters to be used in Data Length Update + * Procedure. Set any member to @ref BLE_GAP_DATA_LENGTH_AUTO to let + * the SoftDevice automatically decide the value for that member. + * Set to NULL to use automatic values for all members. + * @param[out] p_dl_limitation Pointer to limitation to be written when local device does not + * have enough resources or does not support the requested Data Length + * Update parameters. Ignored if NULL. + * + * @mscs + * @mmsc{@ref BLE_GAP_DATA_LENGTH_UPDATE_PROCEDURE_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Successfully set Data Length Extension initiation/response parameters. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameters supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED The requested parameters are not supported by the SoftDevice. Inspect + * p_dl_limitation to see which parameter is not supported. + * @retval ::NRF_ERROR_RESOURCES The connection event length configured for this link is not sufficient for the requested parameters. + * Use @ref sd_ble_cfg_set with @ref BLE_CONN_CFG_GAP to increase the connection event length. + * Inspect p_dl_limitation to see where the limitation is. + * @retval ::NRF_ERROR_BUSY Peer has already initiated a Data Length Update Procedure. Process the + * pending @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST event to respond. + */ +SVCALL(SD_BLE_GAP_DATA_LENGTH_UPDATE, uint32_t, sd_ble_gap_data_length_update(uint16_t conn_handle, ble_gap_data_length_params_t const *p_dl_params, ble_gap_data_length_limitation_t *p_dl_limitation)); + +/**@brief Start the Quality of Service (QoS) channel survey module. + * + * @details The channel survey module provides measurements of the energy levels on + * the Bluetooth Low Energy channels. When the module is enabled, @ref BLE_GAP_EVT_QOS_CHANNEL_SURVEY_REPORT + * events will periodically report the measured energy levels for each channel. + * + * @note The measurements are scheduled with lower priority than other Bluetooth Low Energy roles, + * Radio Timeslot API events and Flash API events. + * + * @note The channel survey module will attempt to do measurements so that the average interval + * between measurements will be interval_us. However due to the channel survey module + * having the lowest priority of all roles and modules, this may not be possible. In that + * case fewer than expected channel survey reports may be given. + * + * @note In order to use the channel survey module, @ref ble_gap_cfg_role_count_t::qos_channel_survey_role_available + * must be set. This is done using @ref sd_ble_cfg_set. + * + * @param[in] interval_us Requested average interval for the measurements and reports. See + * @ref BLE_GAP_QOS_CHANNEL_SURVEY_INTERVALS for valid ranges. If set + * to @ref BLE_GAP_QOS_CHANNEL_SURVEY_INTERVAL_CONTINUOUS, the channel + * survey role will be scheduled at every available opportunity. + * + * @retval ::NRF_SUCCESS The module is successfully started. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter supplied. interval_us is out of the + * allowed range. + * @retval ::NRF_ERROR_INVALID_STATE Trying to start the module when already running. + * @retval ::NRF_ERROR_RESOURCES The channel survey module is not available to the application. + * Set @ref ble_gap_cfg_role_count_t::qos_channel_survey_role_available using + * @ref sd_ble_cfg_set. + */ +SVCALL(SD_BLE_GAP_QOS_CHANNEL_SURVEY_START, uint32_t, sd_ble_gap_qos_channel_survey_start(uint32_t interval_us)); + +/**@brief Stop the Quality of Service (QoS) channel survey module. + * + * @retval ::NRF_SUCCESS The module is successfully stopped. + * @retval ::NRF_ERROR_INVALID_STATE Trying to stop the module when it is not running. + */ +SVCALL(SD_BLE_GAP_QOS_CHANNEL_SURVEY_STOP, uint32_t, sd_ble_gap_qos_channel_survey_stop(void)); + + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // BLE_GAP_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gatt.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gatt.h new file mode 100644 index 00000000000..98a7a150bfc --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gatt.h @@ -0,0 +1,228 @@ +/* + * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_GATT Generic Attribute Profile (GATT) Common + @{ + @brief Common definitions and prototypes for the GATT interfaces. + */ + +#ifndef BLE_GATT_H__ +#define BLE_GATT_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_hci.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_GATT_DEFINES Defines + * @{ */ + +/** @brief Default ATT MTU, in bytes. */ +#define BLE_GATT_ATT_MTU_DEFAULT 23 + +/**@brief Invalid Attribute Handle. */ +#define BLE_GATT_HANDLE_INVALID 0x0000 + +/**@brief First Attribute Handle. */ +#define BLE_GATT_HANDLE_START 0x0001 + +/**@brief Last Attribute Handle. */ +#define BLE_GATT_HANDLE_END 0xFFFF + +/** @defgroup BLE_GATT_TIMEOUT_SOURCES GATT Timeout sources + * @{ */ +#define BLE_GATT_TIMEOUT_SRC_PROTOCOL 0x00 /**< ATT Protocol timeout. */ +/** @} */ + +/** @defgroup BLE_GATT_WRITE_OPS GATT Write operations + * @{ */ +#define BLE_GATT_OP_INVALID 0x00 /**< Invalid Operation. */ +#define BLE_GATT_OP_WRITE_REQ 0x01 /**< Write Request. */ +#define BLE_GATT_OP_WRITE_CMD 0x02 /**< Write Command. */ +#define BLE_GATT_OP_SIGN_WRITE_CMD 0x03 /**< Signed Write Command. */ +#define BLE_GATT_OP_PREP_WRITE_REQ 0x04 /**< Prepare Write Request. */ +#define BLE_GATT_OP_EXEC_WRITE_REQ 0x05 /**< Execute Write Request. */ +/** @} */ + +/** @defgroup BLE_GATT_EXEC_WRITE_FLAGS GATT Execute Write flags + * @{ */ +#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_CANCEL 0x00 /**< Cancel prepared write. */ +#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_WRITE 0x01 /**< Execute prepared write. */ +/** @} */ + +/** @defgroup BLE_GATT_HVX_TYPES GATT Handle Value operations + * @{ */ +#define BLE_GATT_HVX_INVALID 0x00 /**< Invalid Operation. */ +#define BLE_GATT_HVX_NOTIFICATION 0x01 /**< Handle Value Notification. */ +#define BLE_GATT_HVX_INDICATION 0x02 /**< Handle Value Indication. */ +/** @} */ + +/** @defgroup BLE_GATT_STATUS_CODES GATT Status Codes + * @{ */ +#define BLE_GATT_STATUS_SUCCESS 0x0000 /**< Success. */ +#define BLE_GATT_STATUS_UNKNOWN 0x0001 /**< Unknown or not applicable status. */ +#define BLE_GATT_STATUS_ATTERR_INVALID 0x0100 /**< ATT Error: Invalid Error Code. */ +#define BLE_GATT_STATUS_ATTERR_INVALID_HANDLE 0x0101 /**< ATT Error: Invalid Attribute Handle. */ +#define BLE_GATT_STATUS_ATTERR_READ_NOT_PERMITTED 0x0102 /**< ATT Error: Read not permitted. */ +#define BLE_GATT_STATUS_ATTERR_WRITE_NOT_PERMITTED 0x0103 /**< ATT Error: Write not permitted. */ +#define BLE_GATT_STATUS_ATTERR_INVALID_PDU 0x0104 /**< ATT Error: Used in ATT as Invalid PDU. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHENTICATION 0x0105 /**< ATT Error: Authenticated link required. */ +#define BLE_GATT_STATUS_ATTERR_REQUEST_NOT_SUPPORTED 0x0106 /**< ATT Error: Used in ATT as Request Not Supported. */ +#define BLE_GATT_STATUS_ATTERR_INVALID_OFFSET 0x0107 /**< ATT Error: Offset specified was past the end of the attribute. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHORIZATION 0x0108 /**< ATT Error: Used in ATT as Insufficient Authorization. */ +#define BLE_GATT_STATUS_ATTERR_PREPARE_QUEUE_FULL 0x0109 /**< ATT Error: Used in ATT as Prepare Queue Full. */ +#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_FOUND 0x010A /**< ATT Error: Used in ATT as Attribute not found. */ +#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_LONG 0x010B /**< ATT Error: Attribute cannot be read or written using read/write blob requests. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_ENC_KEY_SIZE 0x010C /**< ATT Error: Encryption key size used is insufficient. */ +#define BLE_GATT_STATUS_ATTERR_INVALID_ATT_VAL_LENGTH 0x010D /**< ATT Error: Invalid value size. */ +#define BLE_GATT_STATUS_ATTERR_UNLIKELY_ERROR 0x010E /**< ATT Error: Very unlikely error. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_ENCRYPTION 0x010F /**< ATT Error: Encrypted link required. */ +#define BLE_GATT_STATUS_ATTERR_UNSUPPORTED_GROUP_TYPE 0x0110 /**< ATT Error: Attribute type is not a supported grouping attribute. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_RESOURCES 0x0111 /**< ATT Error: Encrypted link required. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_BEGIN 0x0112 /**< ATT Error: Reserved for Future Use range #1 begin. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_END 0x017F /**< ATT Error: Reserved for Future Use range #1 end. */ +#define BLE_GATT_STATUS_ATTERR_APP_BEGIN 0x0180 /**< ATT Error: Application range begin. */ +#define BLE_GATT_STATUS_ATTERR_APP_END 0x019F /**< ATT Error: Application range end. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_BEGIN 0x01A0 /**< ATT Error: Reserved for Future Use range #2 begin. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_END 0x01DF /**< ATT Error: Reserved for Future Use range #2 end. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_BEGIN 0x01E0 /**< ATT Error: Reserved for Future Use range #3 begin. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_END 0x01FC /**< ATT Error: Reserved for Future Use range #3 end. */ +#define BLE_GATT_STATUS_ATTERR_CPS_CCCD_CONFIG_ERROR 0x01FD /**< ATT Common Profile and Service Error: Client Characteristic Configuration Descriptor improperly configured. */ +#define BLE_GATT_STATUS_ATTERR_CPS_PROC_ALR_IN_PROG 0x01FE /**< ATT Common Profile and Service Error: Procedure Already in Progress. */ +#define BLE_GATT_STATUS_ATTERR_CPS_OUT_OF_RANGE 0x01FF /**< ATT Common Profile and Service Error: Out Of Range. */ +/** @} */ + + +/** @defgroup BLE_GATT_CPF_FORMATS Characteristic Presentation Formats + * @note Found at http://developer.bluetooth.org/gatt/descriptors/Pages/DescriptorViewer.aspx?u=org.bluetooth.descriptor.gatt.characteristic_presentation_format.xml + * @{ */ +#define BLE_GATT_CPF_FORMAT_RFU 0x00 /**< Reserved For Future Use. */ +#define BLE_GATT_CPF_FORMAT_BOOLEAN 0x01 /**< Boolean. */ +#define BLE_GATT_CPF_FORMAT_2BIT 0x02 /**< Unsigned 2-bit integer. */ +#define BLE_GATT_CPF_FORMAT_NIBBLE 0x03 /**< Unsigned 4-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT8 0x04 /**< Unsigned 8-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT12 0x05 /**< Unsigned 12-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT16 0x06 /**< Unsigned 16-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT24 0x07 /**< Unsigned 24-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT32 0x08 /**< Unsigned 32-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT48 0x09 /**< Unsigned 48-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT64 0x0A /**< Unsigned 64-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT128 0x0B /**< Unsigned 128-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT8 0x0C /**< Signed 2-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT12 0x0D /**< Signed 12-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT16 0x0E /**< Signed 16-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT24 0x0F /**< Signed 24-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT32 0x10 /**< Signed 32-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT48 0x11 /**< Signed 48-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT64 0x12 /**< Signed 64-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT128 0x13 /**< Signed 128-bit integer. */ +#define BLE_GATT_CPF_FORMAT_FLOAT32 0x14 /**< IEEE-754 32-bit floating point. */ +#define BLE_GATT_CPF_FORMAT_FLOAT64 0x15 /**< IEEE-754 64-bit floating point. */ +#define BLE_GATT_CPF_FORMAT_SFLOAT 0x16 /**< IEEE-11073 16-bit SFLOAT. */ +#define BLE_GATT_CPF_FORMAT_FLOAT 0x17 /**< IEEE-11073 32-bit FLOAT. */ +#define BLE_GATT_CPF_FORMAT_DUINT16 0x18 /**< IEEE-20601 format. */ +#define BLE_GATT_CPF_FORMAT_UTF8S 0x19 /**< UTF-8 string. */ +#define BLE_GATT_CPF_FORMAT_UTF16S 0x1A /**< UTF-16 string. */ +#define BLE_GATT_CPF_FORMAT_STRUCT 0x1B /**< Opaque Structure. */ +/** @} */ + +/** @defgroup BLE_GATT_CPF_NAMESPACES GATT Bluetooth Namespaces + * @{ + */ +#define BLE_GATT_CPF_NAMESPACE_BTSIG 0x01 /**< Bluetooth SIG defined Namespace. */ +#define BLE_GATT_CPF_NAMESPACE_DESCRIPTION_UNKNOWN 0x0000 /**< Namespace Description Unknown. */ +/** @} */ + +/** @} */ + +/** @addtogroup BLE_GATT_STRUCTURES Structures + * @{ */ + +/** + * @brief BLE GATT connection configuration parameters, set with @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_INVALID_PARAM att_mtu is smaller than @ref BLE_GATT_ATT_MTU_DEFAULT. + */ +typedef struct +{ + uint16_t att_mtu; /**< Maximum size of ATT packet the SoftDevice can send or receive. + The default and minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. + @mscs + @mmsc{@ref BLE_GATTC_MTU_EXCHANGE} + @mmsc{@ref BLE_GATTS_MTU_EXCHANGE} + @endmscs + */ +} ble_gatt_conn_cfg_t; + +/**@brief GATT Characteristic Properties. */ +typedef struct +{ + /* Standard properties */ + uint8_t broadcast :1; /**< Broadcasting of the value permitted. */ + uint8_t read :1; /**< Reading the value permitted. */ + uint8_t write_wo_resp :1; /**< Writing the value with Write Command permitted. */ + uint8_t write :1; /**< Writing the value with Write Request permitted. */ + uint8_t notify :1; /**< Notification of the value permitted. */ + uint8_t indicate :1; /**< Indications of the value permitted. */ + uint8_t auth_signed_wr :1; /**< Writing the value with Signed Write Command permitted. */ +} ble_gatt_char_props_t; + +/**@brief GATT Characteristic Extended Properties. */ +typedef struct +{ + /* Extended properties */ + uint8_t reliable_wr :1; /**< Writing the value with Queued Write operations permitted. */ + uint8_t wr_aux :1; /**< Writing the Characteristic User Description descriptor permitted. */ +} ble_gatt_char_ext_props_t; + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // BLE_GATT_H__ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gattc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gattc.h new file mode 100644 index 00000000000..7fb3920244d --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gattc.h @@ -0,0 +1,715 @@ +/* + * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_GATTC Generic Attribute Profile (GATT) Client + @{ + @brief Definitions and prototypes for the GATT Client interface. + */ + +#ifndef BLE_GATTC_H__ +#define BLE_GATTC_H__ + +#include +#include "nrf.h" +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" +#include "ble_gatt.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_GATTC_ENUMERATIONS Enumerations + * @{ */ + +/**@brief GATTC API SVC numbers. */ +enum BLE_GATTC_SVCS +{ + SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER = BLE_GATTC_SVC_BASE, /**< Primary Service Discovery. */ + SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, /**< Relationship Discovery. */ + SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, /**< Characteristic Discovery. */ + SD_BLE_GATTC_DESCRIPTORS_DISCOVER, /**< Characteristic Descriptor Discovery. */ + SD_BLE_GATTC_ATTR_INFO_DISCOVER, /**< Attribute Information Discovery. */ + SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, /**< Read Characteristic Value by UUID. */ + SD_BLE_GATTC_READ, /**< Generic read. */ + SD_BLE_GATTC_CHAR_VALUES_READ, /**< Read multiple Characteristic Values. */ + SD_BLE_GATTC_WRITE, /**< Generic write. */ + SD_BLE_GATTC_HV_CONFIRM, /**< Handle Value Confirmation. */ + SD_BLE_GATTC_EXCHANGE_MTU_REQUEST, /**< Exchange MTU Request. */ +}; + +/** + * @brief GATT Client Event IDs. + */ +enum BLE_GATTC_EVTS +{ + BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP = BLE_GATTC_EVT_BASE, /**< Primary Service Discovery Response event. \n See @ref ble_gattc_evt_prim_srvc_disc_rsp_t. */ + BLE_GATTC_EVT_REL_DISC_RSP, /**< Relationship Discovery Response event. \n See @ref ble_gattc_evt_rel_disc_rsp_t. */ + BLE_GATTC_EVT_CHAR_DISC_RSP, /**< Characteristic Discovery Response event. \n See @ref ble_gattc_evt_char_disc_rsp_t. */ + BLE_GATTC_EVT_DESC_DISC_RSP, /**< Descriptor Discovery Response event. \n See @ref ble_gattc_evt_desc_disc_rsp_t. */ + BLE_GATTC_EVT_ATTR_INFO_DISC_RSP, /**< Attribute Information Response event. \n See @ref ble_gattc_evt_attr_info_disc_rsp_t. */ + BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP, /**< Read By UUID Response event. \n See @ref ble_gattc_evt_char_val_by_uuid_read_rsp_t. */ + BLE_GATTC_EVT_READ_RSP, /**< Read Response event. \n See @ref ble_gattc_evt_read_rsp_t. */ + BLE_GATTC_EVT_CHAR_VALS_READ_RSP, /**< Read multiple Response event. \n See @ref ble_gattc_evt_char_vals_read_rsp_t. */ + BLE_GATTC_EVT_WRITE_RSP, /**< Write Response event. \n See @ref ble_gattc_evt_write_rsp_t. */ + BLE_GATTC_EVT_HVX, /**< Handle Value Notification or Indication event. \n Confirm indication with @ref sd_ble_gattc_hv_confirm. \n See @ref ble_gattc_evt_hvx_t. */ + BLE_GATTC_EVT_EXCHANGE_MTU_RSP, /**< Exchange MTU Response event. \n See @ref ble_gattc_evt_exchange_mtu_rsp_t. */ + BLE_GATTC_EVT_TIMEOUT, /**< Timeout event. \n See @ref ble_gattc_evt_timeout_t. */ + BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE /**< Write without Response transmission complete. \n See @ref ble_gattc_evt_write_cmd_tx_complete_t. */ +}; + +/** @} */ + +/** @addtogroup BLE_GATTC_DEFINES Defines + * @{ */ + +/** @defgroup BLE_ERRORS_GATTC SVC return values specific to GATTC + * @{ */ +#define BLE_ERROR_GATTC_PROC_NOT_PERMITTED (NRF_GATTC_ERR_BASE + 0x000) /**< Procedure not Permitted. */ +/** @} */ + +/** @defgroup BLE_GATTC_ATTR_INFO_FORMAT Attribute Information Formats + * @{ */ +#define BLE_GATTC_ATTR_INFO_FORMAT_16BIT 1 /**< 16-bit Attribute Information Format. */ +#define BLE_GATTC_ATTR_INFO_FORMAT_128BIT 2 /**< 128-bit Attribute Information Format. */ +/** @} */ + +/** @defgroup BLE_GATTC_DEFAULTS GATT Client defaults + * @{ */ +#define BLE_GATTC_WRITE_CMD_TX_QUEUE_SIZE_DEFAULT 1 /**< Default number of Write without Response that can be queued for transmission. */ +/** @} */ + +/** @} */ + +/** @addtogroup BLE_GATTC_STRUCTURES Structures + * @{ */ + +/** + * @brief BLE GATTC connection configuration parameters, set with @ref sd_ble_cfg_set. + */ +typedef struct +{ + uint8_t write_cmd_tx_queue_size; /**< The guaranteed minimum number of Write without Response that can be queued for transmission. + The default value is @ref BLE_GATTC_WRITE_CMD_TX_QUEUE_SIZE_DEFAULT */ +} ble_gattc_conn_cfg_t; + +/**@brief Operation Handle Range. */ +typedef struct +{ + uint16_t start_handle; /**< Start Handle. */ + uint16_t end_handle; /**< End Handle. */ +} ble_gattc_handle_range_t; + + +/**@brief GATT service. */ +typedef struct +{ + ble_uuid_t uuid; /**< Service UUID. */ + ble_gattc_handle_range_t handle_range; /**< Service Handle Range. */ +} ble_gattc_service_t; + + +/**@brief GATT include. */ +typedef struct +{ + uint16_t handle; /**< Include Handle. */ + ble_gattc_service_t included_srvc; /**< Handle of the included service. */ +} ble_gattc_include_t; + + +/**@brief GATT characteristic. */ +typedef struct +{ + ble_uuid_t uuid; /**< Characteristic UUID. */ + ble_gatt_char_props_t char_props; /**< Characteristic Properties. */ + uint8_t char_ext_props : 1; /**< Extended properties present. */ + uint16_t handle_decl; /**< Handle of the Characteristic Declaration. */ + uint16_t handle_value; /**< Handle of the Characteristic Value. */ +} ble_gattc_char_t; + + +/**@brief GATT descriptor. */ +typedef struct +{ + uint16_t handle; /**< Descriptor Handle. */ + ble_uuid_t uuid; /**< Descriptor UUID. */ +} ble_gattc_desc_t; + + +/**@brief Write Parameters. */ +typedef struct +{ + uint8_t write_op; /**< Write Operation to be performed, see @ref BLE_GATT_WRITE_OPS. */ + uint8_t flags; /**< Flags, see @ref BLE_GATT_EXEC_WRITE_FLAGS. */ + uint16_t handle; /**< Handle to the attribute to be written. */ + uint16_t offset; /**< Offset in bytes. @note For WRITE_CMD and WRITE_REQ, offset must be 0. */ + uint16_t len; /**< Length of data in bytes. */ + uint8_t const *p_value; /**< Pointer to the value data. */ +} ble_gattc_write_params_t; + +/**@brief Attribute Information for 16-bit Attribute UUID. */ +typedef struct +{ + uint16_t handle; /**< Attribute handle. */ + ble_uuid_t uuid; /**< 16-bit Attribute UUID. */ +} ble_gattc_attr_info16_t; + +/**@brief Attribute Information for 128-bit Attribute UUID. */ +typedef struct +{ + uint16_t handle; /**< Attribute handle. */ + ble_uuid128_t uuid; /**< 128-bit Attribute UUID. */ +} ble_gattc_attr_info128_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Service count. */ + ble_gattc_service_t services[1]; /**< Service data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_prim_srvc_disc_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_REL_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Include count. */ + ble_gattc_include_t includes[1]; /**< Include data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_rel_disc_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Characteristic count. */ + ble_gattc_char_t chars[1]; /**< Characteristic data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_char_disc_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_DESC_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Descriptor count. */ + ble_gattc_desc_t descs[1]; /**< Descriptor data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_desc_disc_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_ATTR_INFO_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Attribute count. */ + uint8_t format; /**< Attribute information format, see @ref BLE_GATTC_ATTR_INFO_FORMAT. */ + union { + ble_gattc_attr_info16_t attr_info16[1]; /**< Attribute information for 16-bit Attribute UUID. + @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ + ble_gattc_attr_info128_t attr_info128[1]; /**< Attribute information for 128-bit Attribute UUID. + @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ + } info; /**< Attribute information union. */ +} ble_gattc_evt_attr_info_disc_rsp_t; + +/**@brief GATT read by UUID handle value pair. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + uint8_t *p_value; /**< Pointer to the Attribute Value, length is available in @ref ble_gattc_evt_char_val_by_uuid_read_rsp_t::value_len. */ +} ble_gattc_handle_value_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP. */ +typedef struct +{ + uint16_t count; /**< Handle-Value Pair Count. */ + uint16_t value_len; /**< Length of the value in Handle-Value(s) list. */ + uint8_t handle_value[1]; /**< Handle-Value(s) list. To iterate through the list use @ref sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter. + @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_char_val_by_uuid_read_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_READ_RSP. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + uint16_t offset; /**< Offset of the attribute data. */ + uint16_t len; /**< Attribute data length. */ + uint8_t data[1]; /**< Attribute data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_read_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_VALS_READ_RSP. */ +typedef struct +{ + uint16_t len; /**< Concatenated Attribute values length. */ + uint8_t values[1]; /**< Attribute values. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_char_vals_read_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_WRITE_RSP. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + uint8_t write_op; /**< Type of write operation, see @ref BLE_GATT_WRITE_OPS. */ + uint16_t offset; /**< Data offset. */ + uint16_t len; /**< Data length. */ + uint8_t data[1]; /**< Data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_write_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_HVX. */ +typedef struct +{ + uint16_t handle; /**< Handle to which the HVx operation applies. */ + uint8_t type; /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */ + uint16_t len; /**< Attribute data length. */ + uint8_t data[1]; /**< Attribute data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_hvx_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP. */ +typedef struct +{ + uint16_t server_rx_mtu; /**< Server RX MTU size. */ +} ble_gattc_evt_exchange_mtu_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_TIMEOUT. */ +typedef struct +{ + uint8_t src; /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */ +} ble_gattc_evt_timeout_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE. */ +typedef struct +{ + uint8_t count; /**< Number of write without response transmissions completed. */ +} ble_gattc_evt_write_cmd_tx_complete_t; + +/**@brief GATTC event structure. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which event occurred. */ + uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ + uint16_t error_handle; /**< In case of error: The handle causing the error. In all other cases @ref BLE_GATT_HANDLE_INVALID. */ + union + { + ble_gattc_evt_prim_srvc_disc_rsp_t prim_srvc_disc_rsp; /**< Primary Service Discovery Response Event Parameters. */ + ble_gattc_evt_rel_disc_rsp_t rel_disc_rsp; /**< Relationship Discovery Response Event Parameters. */ + ble_gattc_evt_char_disc_rsp_t char_disc_rsp; /**< Characteristic Discovery Response Event Parameters. */ + ble_gattc_evt_desc_disc_rsp_t desc_disc_rsp; /**< Descriptor Discovery Response Event Parameters. */ + ble_gattc_evt_char_val_by_uuid_read_rsp_t char_val_by_uuid_read_rsp; /**< Characteristic Value Read by UUID Response Event Parameters. */ + ble_gattc_evt_read_rsp_t read_rsp; /**< Read Response Event Parameters. */ + ble_gattc_evt_char_vals_read_rsp_t char_vals_read_rsp; /**< Characteristic Values Read Response Event Parameters. */ + ble_gattc_evt_write_rsp_t write_rsp; /**< Write Response Event Parameters. */ + ble_gattc_evt_hvx_t hvx; /**< Handle Value Notification/Indication Event Parameters. */ + ble_gattc_evt_exchange_mtu_rsp_t exchange_mtu_rsp; /**< Exchange MTU Response Event Parameters. */ + ble_gattc_evt_timeout_t timeout; /**< Timeout Event Parameters. */ + ble_gattc_evt_attr_info_disc_rsp_t attr_info_disc_rsp; /**< Attribute Information Discovery Event Parameters. */ + ble_gattc_evt_write_cmd_tx_complete_t write_cmd_tx_complete; /**< Write without Response transmission complete Event Parameters. */ + } params; /**< Event Parameters. @note Only valid if @ref gatt_status == @ref BLE_GATT_STATUS_SUCCESS. */ +} ble_gattc_evt_t; +/** @} */ + +/** @addtogroup BLE_GATTC_FUNCTIONS Functions + * @{ */ + +/**@brief Initiate or continue a GATT Primary Service Discovery procedure. + * + * @details This function initiates or resumes a Primary Service discovery procedure, starting from the supplied handle. + * If the last service has not been reached, this function must be called again with an updated start handle value to continue the search. + * + * @note If any of the discovered services have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with + * type @ref BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event. + * + * @events + * @event{@ref BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_PRIM_SRVC_DISC_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] start_handle Handle to start searching from. + * @param[in] p_srvc_uuid Pointer to the service UUID to be found. If it is NULL, all primary services will be returned. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Primary Service Discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER, uint32_t, sd_ble_gattc_primary_services_discover(uint16_t conn_handle, uint16_t start_handle, ble_uuid_t const *p_srvc_uuid)); + + +/**@brief Initiate or continue a GATT Relationship Discovery procedure. + * + * @details This function initiates or resumes the Find Included Services sub-procedure. If the last included service has not been reached, + * this must be called again with an updated handle range to continue the search. + * + * @events + * @event{@ref BLE_GATTC_EVT_REL_DISC_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_REL_DISC_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Relationship Discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, uint32_t, sd_ble_gattc_relationships_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); + + +/**@brief Initiate or continue a GATT Characteristic Discovery procedure. + * + * @details This function initiates or resumes a Characteristic discovery procedure. If the last Characteristic has not been reached, + * this must be called again with an updated handle range to continue the discovery. + * + * @note If any of the discovered characteristics have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with + * type @ref BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event. + * + * @events + * @event{@ref BLE_GATTC_EVT_CHAR_DISC_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_CHAR_DISC_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Characteristic Discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, uint32_t, sd_ble_gattc_characteristics_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); + + +/**@brief Initiate or continue a GATT Characteristic Descriptor Discovery procedure. + * + * @details This function initiates or resumes a Characteristic Descriptor discovery procedure. If the last Descriptor has not been reached, + * this must be called again with an updated handle range to continue the discovery. + * + * @events + * @event{@ref BLE_GATTC_EVT_DESC_DISC_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_DESC_DISC_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handle_range A pointer to the range of handles of the Characteristic to perform this procedure on. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Descriptor Discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_DESCRIPTORS_DISCOVER, uint32_t, sd_ble_gattc_descriptors_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); + + +/**@brief Initiate or continue a GATT Read using Characteristic UUID procedure. + * + * @details This function initiates or resumes a Read using Characteristic UUID procedure. If the last Characteristic has not been reached, + * this must be called again with an updated handle range to continue the discovery. + * + * @events + * @event{@ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_READ_UUID_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_uuid Pointer to a Characteristic value UUID to read. + * @param[in] p_handle_range A pointer to the range of handles to perform this procedure on. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Read using Characteristic UUID procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, uint32_t, sd_ble_gattc_char_value_by_uuid_read(uint16_t conn_handle, ble_uuid_t const *p_uuid, ble_gattc_handle_range_t const *p_handle_range)); + + +/**@brief Initiate or continue a GATT Read (Long) Characteristic or Descriptor procedure. + * + * @details This function initiates or resumes a GATT Read (Long) Characteristic or Descriptor procedure. If the Characteristic or Descriptor + * to be read is longer than ATT_MTU - 1, this function must be called multiple times with appropriate offset to read the + * complete value. + * + * @events + * @event{@ref BLE_GATTC_EVT_READ_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_VALUE_READ_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] handle The handle of the attribute to be read. + * @param[in] offset Offset into the attribute value to be read. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Read (Long) procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_READ, uint32_t, sd_ble_gattc_read(uint16_t conn_handle, uint16_t handle, uint16_t offset)); + + +/**@brief Initiate a GATT Read Multiple Characteristic Values procedure. + * + * @details This function initiates a GATT Read Multiple Characteristic Values procedure. + * + * @events + * @event{@ref BLE_GATTC_EVT_CHAR_VALS_READ_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_READ_MULT_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handles A pointer to the handle(s) of the attribute(s) to be read. + * @param[in] handle_count The number of handles in p_handles. + * + * @retval ::NRF_SUCCESS Successfully started the Read Multiple Characteristic Values procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_CHAR_VALUES_READ, uint32_t, sd_ble_gattc_char_values_read(uint16_t conn_handle, uint16_t const *p_handles, uint16_t handle_count)); + + +/**@brief Perform a Write (Characteristic Value or Descriptor, with or without response, signed or not, long or reliable) procedure. + * + * @details This function can perform all write procedures described in GATT. + * + * @note Only one write with response procedure can be ongoing per connection at a time. + * If the application tries to write with response while another write with response procedure is ongoing, + * the function call will return @ref NRF_ERROR_BUSY. + * A @ref BLE_GATTC_EVT_WRITE_RSP event will be issued as soon as the write response arrives from the peer. + * + * @note The number of Write without Response that can be queued is configured by @ref ble_gattc_conn_cfg_t::write_cmd_tx_queue_size + * When the queue is full, the function call will return @ref NRF_ERROR_RESOURCES. + * A @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event will be issued as soon as the transmission of the write without response is complete. + * + * @note The application can keep track of the available queue element count for writes without responses by following the procedure below: + * - Store initial queue element count in a variable. + * - Decrement the variable, which stores the currently available queue element count, by one when a call to this function returns @ref NRF_SUCCESS. + * - Increment the variable, which stores the current available queue element count, by the count variable in @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event. + * + * @events + * @event{@ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE, Write without response transmission complete.} + * @event{@ref BLE_GATTC_EVT_WRITE_RSP, Write response received from the peer.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_VALUE_WRITE_WITHOUT_RESP_MSC} + * @mmsc{@ref BLE_GATTC_VALUE_WRITE_MSC} + * @mmsc{@ref BLE_GATTC_VALUE_LONG_WRITE_MSC} + * @mmsc{@ref BLE_GATTC_VALUE_RELIABLE_WRITE_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_write_params A pointer to a write parameters structure. + * + * @retval ::NRF_SUCCESS Successfully started the Write procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. + * @retval ::NRF_ERROR_BUSY For write with response, procedure already in progress. Wait for a @ref BLE_GATTC_EVT_WRITE_RSP event and retry. + * @retval ::NRF_ERROR_RESOURCES Too many writes without responses queued. + * Wait for a @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event and retry. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_WRITE, uint32_t, sd_ble_gattc_write(uint16_t conn_handle, ble_gattc_write_params_t const *p_write_params)); + + +/**@brief Send a Handle Value Confirmation to the GATT Server. + * + * @mscs + * @mmsc{@ref BLE_GATTC_HVI_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] handle The handle of the attribute in the indication. + * + * @retval ::NRF_SUCCESS Successfully queued the Handle Value Confirmation for transmission. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no Indication pending to be confirmed. + * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_HV_CONFIRM, uint32_t, sd_ble_gattc_hv_confirm(uint16_t conn_handle, uint16_t handle)); + +/**@brief Discovers information about a range of attributes on a GATT server. + * + * @events + * @event{@ref BLE_GATTC_EVT_ATTR_INFO_DISC_RSP, Generated when information about a range of attributes has been received.} + * @endevents + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handle_range The range of handles to request information about. + * + * @retval ::NRF_SUCCESS Successfully started an attribute information discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid connection state + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_ATTR_INFO_DISCOVER, uint32_t, sd_ble_gattc_attr_info_discover(uint16_t conn_handle, ble_gattc_handle_range_t const * p_handle_range)); + +/**@brief Start an ATT_MTU exchange by sending an Exchange MTU Request to the server. + * + * @details The SoftDevice sets ATT_MTU to the minimum of: + * - The Client RX MTU value, and + * - The Server RX MTU value from @ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP. + * + * However, the SoftDevice never sets ATT_MTU lower than @ref BLE_GATT_ATT_MTU_DEFAULT. + * + * @events + * @event{@ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_MTU_EXCHANGE} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] client_rx_mtu Client RX MTU size. + * - The minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. + * - The maximum value is @ref ble_gatt_conn_cfg_t::att_mtu in the connection configuration + used for this connection. + * - The value must be equal to Server RX MTU size given in @ref sd_ble_gatts_exchange_mtu_reply + * if an ATT_MTU exchange has already been performed in the other direction. + * + * @retval ::NRF_SUCCESS Successfully sent request to the server. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid connection state or an ATT_MTU exchange was already requested once. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid Client RX MTU size supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_EXCHANGE_MTU_REQUEST, uint32_t, sd_ble_gattc_exchange_mtu_request(uint16_t conn_handle, uint16_t client_rx_mtu)); + +/**@brief Iterate through Handle-Value(s) list in @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP event. + * + * @param[in] p_gattc_evt Pointer to event buffer containing @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP event. + * @note If the buffer contains different event, behavior is undefined. + * @param[in,out] p_iter Iterator, points to @ref ble_gattc_handle_value_t structure that will be filled in with + * the next Handle-Value pair in each iteration. If the function returns other than + * @ref NRF_SUCCESS, it will not be changed. + * - To start iteration, initialize the structure to zero. + * - To continue, pass the value from previous iteration. + * + * \code + * ble_gattc_handle_value_t iter; + * memset(&iter, 0, sizeof(ble_gattc_handle_value_t)); + * while (sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(&ble_evt.evt.gattc_evt, &iter) == NRF_SUCCESS) + * { + * app_handle = iter.handle; + * memcpy(app_value, iter.p_value, ble_evt.evt.gattc_evt.params.char_val_by_uuid_read_rsp.value_len); + * } + * \endcode + * + * @retval ::NRF_SUCCESS Successfully retrieved the next Handle-Value pair. + * @retval ::NRF_ERROR_NOT_FOUND No more Handle-Value pairs available in the list. + */ +__STATIC_INLINE uint32_t sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(ble_gattc_evt_t *p_gattc_evt, ble_gattc_handle_value_t *p_iter); + +/** @} */ + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE uint32_t sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(ble_gattc_evt_t *p_gattc_evt, ble_gattc_handle_value_t *p_iter) +{ + uint32_t value_len = p_gattc_evt->params.char_val_by_uuid_read_rsp.value_len; + uint8_t *p_first = p_gattc_evt->params.char_val_by_uuid_read_rsp.handle_value; + uint8_t *p_next = p_iter->p_value ? p_iter->p_value + value_len : p_first; + + if ((p_next - p_first) / (sizeof(uint16_t) + value_len) < p_gattc_evt->params.char_val_by_uuid_read_rsp.count) + { + p_iter->handle = (uint16_t)p_next[1] << 8 | p_next[0]; + p_iter->p_value = p_next + sizeof(uint16_t); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_NOT_FOUND; + } +} + +#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ + +#ifdef __cplusplus +} +#endif +#endif /* BLE_GATTC_H__ */ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gatts.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gatts.h new file mode 100644 index 00000000000..e437b6e0767 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gatts.h @@ -0,0 +1,845 @@ +/* + * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_GATTS Generic Attribute Profile (GATT) Server + @{ + @brief Definitions and prototypes for the GATTS interface. + */ + +#ifndef BLE_GATTS_H__ +#define BLE_GATTS_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_hci.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" +#include "ble_gatt.h" +#include "ble_gap.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_GATTS_ENUMERATIONS Enumerations + * @{ */ + +/** + * @brief GATTS API SVC numbers. + */ +enum BLE_GATTS_SVCS +{ + SD_BLE_GATTS_SERVICE_ADD = BLE_GATTS_SVC_BASE, /**< Add a service. */ + SD_BLE_GATTS_INCLUDE_ADD, /**< Add an included service. */ + SD_BLE_GATTS_CHARACTERISTIC_ADD, /**< Add a characteristic. */ + SD_BLE_GATTS_DESCRIPTOR_ADD, /**< Add a generic attribute. */ + SD_BLE_GATTS_VALUE_SET, /**< Set an attribute value. */ + SD_BLE_GATTS_VALUE_GET, /**< Get an attribute value. */ + SD_BLE_GATTS_HVX, /**< Handle Value Notification or Indication. */ + SD_BLE_GATTS_SERVICE_CHANGED, /**< Perform a Service Changed Indication to one or more peers. */ + SD_BLE_GATTS_RW_AUTHORIZE_REPLY, /**< Reply to an authorization request for a read or write operation on one or more attributes. */ + SD_BLE_GATTS_SYS_ATTR_SET, /**< Set the persistent system attributes for a connection. */ + SD_BLE_GATTS_SYS_ATTR_GET, /**< Retrieve the persistent system attributes. */ + SD_BLE_GATTS_INITIAL_USER_HANDLE_GET, /**< Retrieve the first valid user handle. */ + SD_BLE_GATTS_ATTR_GET, /**< Retrieve the UUID and/or metadata of an attribute. */ + SD_BLE_GATTS_EXCHANGE_MTU_REPLY /**< Reply to Exchange MTU Request. */ +}; + +/** + * @brief GATT Server Event IDs. + */ +enum BLE_GATTS_EVTS +{ + BLE_GATTS_EVT_WRITE = BLE_GATTS_EVT_BASE, /**< Write operation performed. \n See @ref ble_gatts_evt_write_t. */ + BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST, /**< Read/Write Authorization request. \n Reply with @ref sd_ble_gatts_rw_authorize_reply. \n See @ref ble_gatts_evt_rw_authorize_request_t. */ + BLE_GATTS_EVT_SYS_ATTR_MISSING, /**< A persistent system attribute access is pending. \n Respond with @ref sd_ble_gatts_sys_attr_set. \n See @ref ble_gatts_evt_sys_attr_missing_t. */ + BLE_GATTS_EVT_HVC, /**< Handle Value Confirmation. \n See @ref ble_gatts_evt_hvc_t. */ + BLE_GATTS_EVT_SC_CONFIRM, /**< Service Changed Confirmation. \n No additional event structure applies. */ + BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST, /**< Exchange MTU Request. \n Reply with @ref sd_ble_gatts_exchange_mtu_reply. \n See @ref ble_gatts_evt_exchange_mtu_request_t. */ + BLE_GATTS_EVT_TIMEOUT, /**< Peer failed to respond to an ATT request in time. \n See @ref ble_gatts_evt_timeout_t. */ + BLE_GATTS_EVT_HVN_TX_COMPLETE /**< Handle Value Notification transmission complete. \n See @ref ble_gatts_evt_hvn_tx_complete_t. */ +}; + +/**@brief GATTS Configuration IDs. + * + * IDs that uniquely identify a GATTS configuration. + */ +enum BLE_GATTS_CFGS +{ + BLE_GATTS_CFG_SERVICE_CHANGED = BLE_GATTS_CFG_BASE, /**< Service changed configuration. */ + BLE_GATTS_CFG_ATTR_TAB_SIZE, /**< Attribute table size configuration. */ +}; + +/** @} */ + +/** @addtogroup BLE_GATTS_DEFINES Defines + * @{ */ + +/** @defgroup BLE_ERRORS_GATTS SVC return values specific to GATTS + * @{ */ +#define BLE_ERROR_GATTS_INVALID_ATTR_TYPE (NRF_GATTS_ERR_BASE + 0x000) /**< Invalid attribute type. */ +#define BLE_ERROR_GATTS_SYS_ATTR_MISSING (NRF_GATTS_ERR_BASE + 0x001) /**< System Attributes missing. */ +/** @} */ + +/** @defgroup BLE_GATTS_ATTR_LENS_MAX Maximum attribute lengths + * @{ */ +#define BLE_GATTS_FIX_ATTR_LEN_MAX (510) /**< Maximum length for fixed length Attribute Values. */ +#define BLE_GATTS_VAR_ATTR_LEN_MAX (512) /**< Maximum length for variable length Attribute Values. */ +/** @} */ + +/** @defgroup BLE_GATTS_SRVC_TYPES GATT Server Service Types + * @{ */ +#define BLE_GATTS_SRVC_TYPE_INVALID 0x00 /**< Invalid Service Type. */ +#define BLE_GATTS_SRVC_TYPE_PRIMARY 0x01 /**< Primary Service. */ +#define BLE_GATTS_SRVC_TYPE_SECONDARY 0x02 /**< Secondary Type. */ +/** @} */ + + +/** @defgroup BLE_GATTS_ATTR_TYPES GATT Server Attribute Types + * @{ */ +#define BLE_GATTS_ATTR_TYPE_INVALID 0x00 /**< Invalid Attribute Type. */ +#define BLE_GATTS_ATTR_TYPE_PRIM_SRVC_DECL 0x01 /**< Primary Service Declaration. */ +#define BLE_GATTS_ATTR_TYPE_SEC_SRVC_DECL 0x02 /**< Secondary Service Declaration. */ +#define BLE_GATTS_ATTR_TYPE_INC_DECL 0x03 /**< Include Declaration. */ +#define BLE_GATTS_ATTR_TYPE_CHAR_DECL 0x04 /**< Characteristic Declaration. */ +#define BLE_GATTS_ATTR_TYPE_CHAR_VAL 0x05 /**< Characteristic Value. */ +#define BLE_GATTS_ATTR_TYPE_DESC 0x06 /**< Descriptor. */ +#define BLE_GATTS_ATTR_TYPE_OTHER 0x07 /**< Other, non-GATT specific type. */ +/** @} */ + + +/** @defgroup BLE_GATTS_OPS GATT Server Operations + * @{ */ +#define BLE_GATTS_OP_INVALID 0x00 /**< Invalid Operation. */ +#define BLE_GATTS_OP_WRITE_REQ 0x01 /**< Write Request. */ +#define BLE_GATTS_OP_WRITE_CMD 0x02 /**< Write Command. */ +#define BLE_GATTS_OP_SIGN_WRITE_CMD 0x03 /**< Signed Write Command. */ +#define BLE_GATTS_OP_PREP_WRITE_REQ 0x04 /**< Prepare Write Request. */ +#define BLE_GATTS_OP_EXEC_WRITE_REQ_CANCEL 0x05 /**< Execute Write Request: Cancel all prepared writes. */ +#define BLE_GATTS_OP_EXEC_WRITE_REQ_NOW 0x06 /**< Execute Write Request: Immediately execute all prepared writes. */ +/** @} */ + +/** @defgroup BLE_GATTS_VLOCS GATT Value Locations + * @{ */ +#define BLE_GATTS_VLOC_INVALID 0x00 /**< Invalid Location. */ +#define BLE_GATTS_VLOC_STACK 0x01 /**< Attribute Value is located in stack memory, no user memory is required. */ +#define BLE_GATTS_VLOC_USER 0x02 /**< Attribute Value is located in user memory. This requires the user to maintain a valid buffer through the lifetime of the attribute, since the stack + will read and write directly to the memory using the pointer provided in the APIs. There are no alignment requirements for the buffer. */ +/** @} */ + +/** @defgroup BLE_GATTS_AUTHORIZE_TYPES GATT Server Authorization Types + * @{ */ +#define BLE_GATTS_AUTHORIZE_TYPE_INVALID 0x00 /**< Invalid Type. */ +#define BLE_GATTS_AUTHORIZE_TYPE_READ 0x01 /**< Authorize a Read Operation. */ +#define BLE_GATTS_AUTHORIZE_TYPE_WRITE 0x02 /**< Authorize a Write Request Operation. */ +/** @} */ + +/** @defgroup BLE_GATTS_SYS_ATTR_FLAGS System Attribute Flags + * @{ */ +#define BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS (1 << 0) /**< Restrict system attributes to system services only. */ +#define BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS (1 << 1) /**< Restrict system attributes to user services only. */ +/** @} */ + +/** @defgroup BLE_GATTS_SERVICE_CHANGED Service Changed Inclusion Values + * @{ + */ +#define BLE_GATTS_SERVICE_CHANGED_DEFAULT (1) /**< Default is to include the Service Changed characteristic in the Attribute Table. */ +/** @} */ + +/** @defgroup BLE_GATTS_ATTR_TAB_SIZE Attribute Table size + * @{ + */ +#define BLE_GATTS_ATTR_TAB_SIZE_MIN (248) /**< Minimum Attribute Table size */ +#define BLE_GATTS_ATTR_TAB_SIZE_DEFAULT (1408) /**< Default Attribute Table size. */ +/** @} */ + +/** @defgroup BLE_GATTS_DEFAULTS GATT Server defaults + * @{ + */ +#define BLE_GATTS_HVN_TX_QUEUE_SIZE_DEFAULT 1 /**< Default number of Handle Value Notifications that can be queued for transmission. */ +/** @} */ + +/** @} */ + +/** @addtogroup BLE_GATTS_STRUCTURES Structures + * @{ */ + +/** + * @brief BLE GATTS connection configuration parameters, set with @ref sd_ble_cfg_set. + */ +typedef struct +{ + uint8_t hvn_tx_queue_size; /**< Minimum guaranteed number of Handle Value Notifications that can be queued for transmission. + The default value is @ref BLE_GATTS_HVN_TX_QUEUE_SIZE_DEFAULT */ +} ble_gatts_conn_cfg_t; + +/**@brief Attribute metadata. */ +typedef struct +{ + ble_gap_conn_sec_mode_t read_perm; /**< Read permissions. */ + ble_gap_conn_sec_mode_t write_perm; /**< Write permissions. */ + uint8_t vlen :1; /**< Variable length attribute. */ + uint8_t vloc :2; /**< Value location, see @ref BLE_GATTS_VLOCS.*/ + uint8_t rd_auth :1; /**< Read authorization and value will be requested from the application on every read operation. */ + uint8_t wr_auth :1; /**< Write authorization will be requested from the application on every Write Request operation (but not Write Command). */ +} ble_gatts_attr_md_t; + + +/**@brief GATT Attribute. */ +typedef struct +{ + ble_uuid_t const *p_uuid; /**< Pointer to the attribute UUID. */ + ble_gatts_attr_md_t const *p_attr_md; /**< Pointer to the attribute metadata structure. */ + uint16_t init_len; /**< Initial attribute value length in bytes. */ + uint16_t init_offs; /**< Initial attribute value offset in bytes. If different from zero, the first init_offs bytes of the attribute value will be left uninitialized. */ + uint16_t max_len; /**< Maximum attribute value length in bytes, see @ref BLE_GATTS_ATTR_LENS_MAX for maximum values. */ + uint8_t *p_value; /**< Pointer to the attribute data. Please note that if the @ref BLE_GATTS_VLOC_USER value location is selected in the attribute metadata, this will have to point to a buffer + that remains valid through the lifetime of the attribute. This excludes usage of automatic variables that may go out of scope or any other temporary location. + The stack may access that memory directly without the application's knowledge. For writable characteristics, this value must not be a location in flash memory.*/ +} ble_gatts_attr_t; + +/**@brief GATT Attribute Value. */ +typedef struct +{ + uint16_t len; /**< Length in bytes to be written or read. Length in bytes written or read after successful return.*/ + uint16_t offset; /**< Attribute value offset. */ + uint8_t *p_value; /**< Pointer to where value is stored or will be stored. + If value is stored in user memory, only the attribute length is updated when p_value == NULL. + Set to NULL when reading to obtain the complete length of the attribute value */ +} ble_gatts_value_t; + + +/**@brief GATT Characteristic Presentation Format. */ +typedef struct +{ + uint8_t format; /**< Format of the value, see @ref BLE_GATT_CPF_FORMATS. */ + int8_t exponent; /**< Exponent for integer data types. */ + uint16_t unit; /**< Unit from Bluetooth Assigned Numbers. */ + uint8_t name_space; /**< Namespace from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */ + uint16_t desc; /**< Namespace description from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */ +} ble_gatts_char_pf_t; + + +/**@brief GATT Characteristic metadata. */ +typedef struct +{ + ble_gatt_char_props_t char_props; /**< Characteristic Properties. */ + ble_gatt_char_ext_props_t char_ext_props; /**< Characteristic Extended Properties. */ + uint8_t const *p_char_user_desc; /**< Pointer to a UTF-8 encoded string (non-NULL terminated), NULL if the descriptor is not required. */ + uint16_t char_user_desc_max_size; /**< The maximum size in bytes of the user description descriptor. */ + uint16_t char_user_desc_size; /**< The size of the user description, must be smaller or equal to char_user_desc_max_size. */ + ble_gatts_char_pf_t const *p_char_pf; /**< Pointer to a presentation format structure or NULL if the CPF descriptor is not required. */ + ble_gatts_attr_md_t const *p_user_desc_md; /**< Attribute metadata for the User Description descriptor, or NULL for default values. */ + ble_gatts_attr_md_t const *p_cccd_md; /**< Attribute metadata for the Client Characteristic Configuration Descriptor, or NULL for default values. */ + ble_gatts_attr_md_t const *p_sccd_md; /**< Attribute metadata for the Server Characteristic Configuration Descriptor, or NULL for default values. */ +} ble_gatts_char_md_t; + + +/**@brief GATT Characteristic Definition Handles. */ +typedef struct +{ + uint16_t value_handle; /**< Handle to the characteristic value. */ + uint16_t user_desc_handle; /**< Handle to the User Description descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ + uint16_t cccd_handle; /**< Handle to the Client Characteristic Configuration Descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ + uint16_t sccd_handle; /**< Handle to the Server Characteristic Configuration Descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ +} ble_gatts_char_handles_t; + + +/**@brief GATT HVx parameters. */ +typedef struct +{ + uint16_t handle; /**< Characteristic Value Handle. */ + uint8_t type; /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */ + uint16_t offset; /**< Offset within the attribute value. */ + uint16_t *p_len; /**< Length in bytes to be written, length in bytes written after return. */ + uint8_t const *p_data; /**< Actual data content, use NULL to use the current attribute value. */ +} ble_gatts_hvx_params_t; + +/**@brief GATT Authorization parameters. */ +typedef struct +{ + uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ + uint8_t update : 1; /**< If set, data supplied in p_data will be used to update the attribute value. + Please note that for @ref BLE_GATTS_AUTHORIZE_TYPE_WRITE operations this bit must always be set, + as the data to be written needs to be stored and later provided by the application. */ + uint16_t offset; /**< Offset of the attribute value being updated. */ + uint16_t len; /**< Length in bytes of the value in p_data pointer, see @ref BLE_GATTS_ATTR_LENS_MAX. */ + uint8_t const *p_data; /**< Pointer to new value used to update the attribute value. */ +} ble_gatts_authorize_params_t; + +/**@brief GATT Read or Write Authorize Reply parameters. */ +typedef struct +{ + uint8_t type; /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */ + union { + ble_gatts_authorize_params_t read; /**< Read authorization parameters. */ + ble_gatts_authorize_params_t write; /**< Write authorization parameters. */ + } params; /**< Reply Parameters. */ +} ble_gatts_rw_authorize_reply_params_t; + +/**@brief Service Changed Inclusion configuration parameters, set with @ref sd_ble_cfg_set. */ +typedef struct +{ + uint8_t service_changed : 1; /**< If 1, include the Service Changed characteristic in the Attribute Table. Default is @ref BLE_GATTS_SERVICE_CHANGED_DEFAULT. */ +} ble_gatts_cfg_service_changed_t; + +/**@brief Attribute table size configuration parameters, set with @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_INVALID_LENGTH One or more of the following is true: + * - The specified Attribute Table size is too small. + * The minimum acceptable size is defined by @ref BLE_GATTS_ATTR_TAB_SIZE_MIN. + * - The specified Attribute Table size is not a multiple of 4. + */ +typedef struct +{ + uint32_t attr_tab_size; /**< Attribute table size. Default is @ref BLE_GATTS_ATTR_TAB_SIZE_DEFAULT, minimum is @ref BLE_GATTS_ATTR_TAB_SIZE_MIN. */ +} ble_gatts_cfg_attr_tab_size_t; + +/**@brief Config structure for GATTS configurations. */ +typedef union +{ + ble_gatts_cfg_service_changed_t service_changed; /**< Include service changed characteristic, cfg_id is @ref BLE_GATTS_CFG_SERVICE_CHANGED. */ + ble_gatts_cfg_attr_tab_size_t attr_tab_size; /**< Attribute table size, cfg_id is @ref BLE_GATTS_CFG_ATTR_TAB_SIZE. */ +} ble_gatts_cfg_t; + + +/**@brief Event structure for @ref BLE_GATTS_EVT_WRITE. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + ble_uuid_t uuid; /**< Attribute UUID. */ + uint8_t op; /**< Type of write operation, see @ref BLE_GATTS_OPS. */ + uint8_t auth_required; /**< Writing operation deferred due to authorization requirement. Application may use @ref sd_ble_gatts_value_set to finalize the writing operation. */ + uint16_t offset; /**< Offset for the write operation. */ + uint16_t len; /**< Length of the received data. */ + uint8_t data[1]; /**< Received data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gatts_evt_write_t; + +/**@brief Event substructure for authorized read requests, see @ref ble_gatts_evt_rw_authorize_request_t. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + ble_uuid_t uuid; /**< Attribute UUID. */ + uint16_t offset; /**< Offset for the read operation. */ +} ble_gatts_evt_read_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST. */ +typedef struct +{ + uint8_t type; /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */ + union { + ble_gatts_evt_read_t read; /**< Attribute Read Parameters. */ + ble_gatts_evt_write_t write; /**< Attribute Write Parameters. */ + } request; /**< Request Parameters. */ +} ble_gatts_evt_rw_authorize_request_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_SYS_ATTR_MISSING. */ +typedef struct +{ + uint8_t hint; /**< Hint (currently unused). */ +} ble_gatts_evt_sys_attr_missing_t; + + +/**@brief Event structure for @ref BLE_GATTS_EVT_HVC. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ +} ble_gatts_evt_hvc_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST. */ +typedef struct +{ + uint16_t client_rx_mtu; /**< Client RX MTU size. */ +} ble_gatts_evt_exchange_mtu_request_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_TIMEOUT. */ +typedef struct +{ + uint8_t src; /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */ +} ble_gatts_evt_timeout_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_HVN_TX_COMPLETE. */ +typedef struct +{ + uint8_t count; /**< Number of notification transmissions completed. */ +} ble_gatts_evt_hvn_tx_complete_t; + +/**@brief GATTS event structure. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which the event occurred. */ + union + { + ble_gatts_evt_write_t write; /**< Write Event Parameters. */ + ble_gatts_evt_rw_authorize_request_t authorize_request; /**< Read or Write Authorize Request Parameters. */ + ble_gatts_evt_sys_attr_missing_t sys_attr_missing; /**< System attributes missing. */ + ble_gatts_evt_hvc_t hvc; /**< Handle Value Confirmation Event Parameters. */ + ble_gatts_evt_exchange_mtu_request_t exchange_mtu_request; /**< Exchange MTU Request Event Parameters. */ + ble_gatts_evt_timeout_t timeout; /**< Timeout Event. */ + ble_gatts_evt_hvn_tx_complete_t hvn_tx_complete; /**< Handle Value Notification transmission complete Event Parameters. */ + } params; /**< Event Parameters. */ +} ble_gatts_evt_t; + +/** @} */ + +/** @addtogroup BLE_GATTS_FUNCTIONS Functions + * @{ */ + +/**@brief Add a service declaration to the Attribute Table. + * + * @note Secondary Services are only relevant in the context of the entity that references them, it is therefore forbidden to + * add a secondary service declaration that is not referenced by another service later in the Attribute Table. + * + * @mscs + * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} + * @endmscs + * + * @param[in] type Toggles between primary and secondary services, see @ref BLE_GATTS_SRVC_TYPES. + * @param[in] p_uuid Pointer to service UUID. + * @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored. + * + * @retval ::NRF_SUCCESS Successfully added a service declaration. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, Vendor Specific UUIDs need to be present in the table. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + */ +SVCALL(SD_BLE_GATTS_SERVICE_ADD, uint32_t, sd_ble_gatts_service_add(uint8_t type, ble_uuid_t const *p_uuid, uint16_t *p_handle)); + + +/**@brief Add an include declaration to the Attribute Table. + * + * @note It is currently only possible to add an include declaration to the last added service (i.e. only sequential population is supported at this time). + * + * @note The included service must already be present in the Attribute Table prior to this call. + * + * @mscs + * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} + * @endmscs + * + * @param[in] service_handle Handle of the service where the included service is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. + * @param[in] inc_srvc_handle Handle of the included service. + * @param[out] p_include_handle Pointer to a 16-bit word where the assigned handle will be stored. + * + * @retval ::NRF_SUCCESS Successfully added an include declaration. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, handle values need to match previously added services. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::NRF_ERROR_NOT_SUPPORTED Feature is not supported, service_handle must be that of the last added service. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, self inclusions are not allowed. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. + */ +SVCALL(SD_BLE_GATTS_INCLUDE_ADD, uint32_t, sd_ble_gatts_include_add(uint16_t service_handle, uint16_t inc_srvc_handle, uint16_t *p_include_handle)); + + +/**@brief Add a characteristic declaration, a characteristic value declaration and optional characteristic descriptor declarations to the Attribute Table. + * + * @note It is currently only possible to add a characteristic to the last added service (i.e. only sequential population is supported at this time). + * + * @note Several restrictions apply to the parameters, such as matching permissions between the user description descriptor and the writable auxiliaries bits, + * readable (no security) and writable (selectable) CCCDs and SCCDs and valid presentation format values. + * + * @note If no metadata is provided for the optional descriptors, their permissions will be derived from the characteristic permissions. + * + * @mscs + * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} + * @endmscs + * + * @param[in] service_handle Handle of the service where the characteristic is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. + * @param[in] p_char_md Characteristic metadata. + * @param[in] p_attr_char_value Pointer to the attribute structure corresponding to the characteristic value. + * @param[out] p_handles Pointer to the structure where the assigned handles will be stored. + * + * @retval ::NRF_SUCCESS Successfully added a characteristic. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, service handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a service context is required. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. + */ +SVCALL(SD_BLE_GATTS_CHARACTERISTIC_ADD, uint32_t, sd_ble_gatts_characteristic_add(uint16_t service_handle, ble_gatts_char_md_t const *p_char_md, ble_gatts_attr_t const *p_attr_char_value, ble_gatts_char_handles_t *p_handles)); + + +/**@brief Add a descriptor to the Attribute Table. + * + * @note It is currently only possible to add a descriptor to the last added characteristic (i.e. only sequential population is supported at this time). + * + * @mscs + * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} + * @endmscs + * + * @param[in] char_handle Handle of the characteristic where the descriptor is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. + * @param[in] p_attr Pointer to the attribute structure. + * @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored. + * + * @retval ::NRF_SUCCESS Successfully added a descriptor. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, characteristic handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a characteristic context is required. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. + */ +SVCALL(SD_BLE_GATTS_DESCRIPTOR_ADD, uint32_t, sd_ble_gatts_descriptor_add(uint16_t char_handle, ble_gatts_attr_t const *p_attr, uint16_t *p_handle)); + +/**@brief Set the value of a given attribute. + * + * @note Values other than system attributes can be set at any time, regardless of whether any active connections exist. + * + * @mscs + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. Ignored if the value does not belong to a system attribute. + * @param[in] handle Attribute handle. + * @param[in,out] p_value Attribute value information. + * + * @retval ::NRF_SUCCESS Successfully set the value of the attribute. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden handle supplied, certain attributes are not modifiable by the application. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied on a system attribute. + */ +SVCALL(SD_BLE_GATTS_VALUE_SET, uint32_t, sd_ble_gatts_value_set(uint16_t conn_handle, uint16_t handle, ble_gatts_value_t *p_value)); + +/**@brief Get the value of a given attribute. + * + * @note If the attribute value is longer than the size of the supplied buffer, + * @ref ble_gatts_value_t::len will return the total attribute value length (excluding offset), + * and not the number of bytes actually returned in @ref ble_gatts_value_t::p_value. + * The application may use this information to allocate a suitable buffer size. + * + * @note When retrieving system attribute values with this function, the connection handle + * may refer to an already disconnected connection. Refer to the documentation of + * @ref sd_ble_gatts_sys_attr_get for further information. + * + * @param[in] conn_handle Connection handle. Ignored if the value does not belong to a system attribute. + * @param[in] handle Attribute handle. + * @param[in,out] p_value Attribute value information. + * + * @retval ::NRF_SUCCESS Successfully retrieved the value of the attribute. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid attribute offset supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied on a system attribute. + * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. + */ +SVCALL(SD_BLE_GATTS_VALUE_GET, uint32_t, sd_ble_gatts_value_get(uint16_t conn_handle, uint16_t handle, ble_gatts_value_t *p_value)); + +/**@brief Notify or Indicate an attribute value. + * + * @details This function checks for the relevant Client Characteristic Configuration descriptor value to verify that the relevant operation + * (notification or indication) has been enabled by the client. It is also able to update the attribute value before issuing the PDU, so that + * the application can atomically perform a value update and a server initiated transaction with a single API call. + * + * @note The local attribute value may be updated even if an outgoing packet is not sent to the peer due to an error during execution. + * The Attribute Table has been updated if one of the following error codes is returned: @ref NRF_ERROR_INVALID_STATE, @ref NRF_ERROR_BUSY, + * @ref NRF_ERROR_FORBIDDEN, @ref BLE_ERROR_GATTS_SYS_ATTR_MISSING and @ref NRF_ERROR_RESOURCES. + * The caller can check whether the value has been updated by looking at the contents of *(@ref ble_gatts_hvx_params_t::p_len). + * + * @note Only one indication procedure can be ongoing per connection at a time. + * If the application tries to indicate an attribute value while another indication procedure is ongoing, + * the function call will return @ref NRF_ERROR_BUSY. + * A @ref BLE_GATTS_EVT_HVC event will be issued as soon as the confirmation arrives from the peer. + * + * @note The number of Handle Value Notifications that can be queued is configured by @ref ble_gatts_conn_cfg_t::hvn_tx_queue_size + * When the queue is full, the function call will return @ref NRF_ERROR_RESOURCES. + * A @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event will be issued as soon as the transmission of the notification is complete. + * + * @note The application can keep track of the available queue element count for notifications by following the procedure below: + * - Store initial queue element count in a variable. + * - Decrement the variable, which stores the currently available queue element count, by one when a call to this function returns @ref NRF_SUCCESS. + * - Increment the variable, which stores the current available queue element count, by the count variable in @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event. + * + * @events + * @event{@ref BLE_GATTS_EVT_HVN_TX_COMPLETE, Notification transmission complete.} + * @event{@ref BLE_GATTS_EVT_HVC, Confirmation received from the peer.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC} + * @mmsc{@ref BLE_GATTS_HVN_MSC} + * @mmsc{@ref BLE_GATTS_HVI_MSC} + * @mmsc{@ref BLE_GATTS_HVX_DISABLED_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in,out] p_hvx_params Pointer to an HVx parameters structure. If @ref ble_gatts_hvx_params_t::p_data + * contains a non-NULL pointer the attribute value will be updated with the contents + * pointed by it before sending the notification or indication. If the attribute value + * is updated, @ref ble_gatts_hvx_params_t::p_len is updated by the SoftDevice to + * contain the number of actual bytes written, else it will be set to 0. + * + * @retval ::NRF_SUCCESS Successfully queued a notification or indication for transmission, and optionally updated the attribute value. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE One or more of the following is true: + * - Invalid Connection State + * - Notifications and/or indications not enabled in the CCCD + * - An ATT_MTU exchange is ongoing + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied. Only attributes added directly by the application are available to notify and indicate. + * @retval ::BLE_ERROR_GATTS_INVALID_ATTR_TYPE Invalid attribute type(s) supplied, only characteristic values may be notified and indicated. + * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. + * @retval ::NRF_ERROR_FORBIDDEN The connection's current security level is lower than the one required by the write permissions of the CCCD associated with this characteristic. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. + * @retval ::NRF_ERROR_BUSY For @ref BLE_GATT_HVX_INDICATION Procedure already in progress. Wait for a @ref BLE_GATTS_EVT_HVC event and retry. + * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. + * @retval ::NRF_ERROR_RESOURCES Too many notifications queued. + * Wait for a @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event and retry. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTS_HVX, uint32_t, sd_ble_gatts_hvx(uint16_t conn_handle, ble_gatts_hvx_params_t const *p_hvx_params)); + +/**@brief Indicate the Service Changed attribute value. + * + * @details This call will send a Handle Value Indication to one or more peers connected to inform them that the Attribute + * Table layout has changed. As soon as the peer has confirmed the indication, a @ref BLE_GATTS_EVT_SC_CONFIRM event will + * be issued. + * + * @note Some of the restrictions and limitations that apply to @ref sd_ble_gatts_hvx also apply here. + * + * @events + * @event{@ref BLE_GATTS_EVT_SC_CONFIRM, Confirmation of attribute table change received from peer.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTS_SC_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] start_handle Start of affected attribute handle range. + * @param[in] end_handle End of affected attribute handle range. + * + * @retval ::NRF_SUCCESS Successfully queued the Service Changed indication for transmission. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_NOT_SUPPORTED Service Changed not enabled at initialization. See @ref + * sd_ble_cfg_set and @ref ble_gatts_cfg_service_changed_t. + * @retval ::NRF_ERROR_INVALID_STATE One or more of the following is true: + * - Invalid Connection State + * - Notifications and/or indications not enabled in the CCCD + * - An ATT_MTU exchange is ongoing + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied, handles must be in the range populated by the application. + * @retval ::NRF_ERROR_BUSY Procedure already in progress. + * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTS_SERVICE_CHANGED, uint32_t, sd_ble_gatts_service_changed(uint16_t conn_handle, uint16_t start_handle, uint16_t end_handle)); + +/**@brief Respond to a Read/Write authorization request. + * + * @note This call should only be used as a response to a @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST event issued to the application. + * + * @mscs + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} + * @mmsc{@ref BLE_GATTS_READ_REQ_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_WRITE_REQ_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_PEER_CANCEL_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_rw_authorize_reply_params Pointer to a structure with the attribute provided by the application. + * + * @note @ref ble_gatts_authorize_params_t::p_data is ignored when this function is used to respond + * to a @ref BLE_GATTS_AUTHORIZE_TYPE_READ event if @ref ble_gatts_authorize_params_t::update + * is set to 0. + * + * @retval ::NRF_SUCCESS Successfully queued a response to the peer, and in the case of a write operation, Attribute Table updated. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no authorization request pending. + * @retval ::NRF_ERROR_INVALID_PARAM Authorization op invalid, + * handle supplied does not match requested handle, + * or invalid data to be written provided by the application. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTS_RW_AUTHORIZE_REPLY, uint32_t, sd_ble_gatts_rw_authorize_reply(uint16_t conn_handle, ble_gatts_rw_authorize_reply_params_t const *p_rw_authorize_reply_params)); + + +/**@brief Update persistent system attribute information. + * + * @details Supply information about persistent system attributes to the stack, + * previously obtained using @ref sd_ble_gatts_sys_attr_get. + * This call is only allowed for active connections, and is usually + * made immediately after a connection is established with an known bonded device, + * often as a response to a @ref BLE_GATTS_EVT_SYS_ATTR_MISSING. + * + * p_sysattrs may point directly to the application's stored copy of the system attributes + * obtained using @ref sd_ble_gatts_sys_attr_get. + * If the pointer is NULL, the system attribute info is initialized, assuming that + * the application does not have any previously saved system attribute data for this device. + * + * @note The state of persistent system attributes is reset upon connection establishment and then remembered for its duration. + * + * @note If this call returns with an error code different from @ref NRF_SUCCESS, the storage of persistent system attributes may have been completed only partially. + * This means that the state of the attribute table is undefined, and the application should either provide a new set of attributes using this same call or + * reset the SoftDevice to return to a known state. + * + * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS is used with this function, only the system attributes included in system services will be modified. + * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS is used with this function, only the system attributes included in user services will be modified. + * + * @mscs + * @mmsc{@ref BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC} + * @mmsc{@ref BLE_GATTS_SYS_ATTRS_UNK_PEER_MSC} + * @mmsc{@ref BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_sys_attr_data Pointer to a saved copy of system attributes supplied to the stack, or NULL. + * @param[in] len Size of data pointed by p_sys_attr_data, in octets. + * @param[in] flags Optional additional flags, see @ref BLE_GATTS_SYS_ATTR_FLAGS + * + * @retval ::NRF_SUCCESS Successfully set the system attribute information. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid flags supplied. + * @retval ::NRF_ERROR_INVALID_DATA Invalid data supplied, the data should be exactly the same as retrieved with @ref sd_ble_gatts_sys_attr_get. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + */ +SVCALL(SD_BLE_GATTS_SYS_ATTR_SET, uint32_t, sd_ble_gatts_sys_attr_set(uint16_t conn_handle, uint8_t const *p_sys_attr_data, uint16_t len, uint32_t flags)); + + +/**@brief Retrieve persistent system attribute information from the stack. + * + * @details This call is used to retrieve information about values to be stored persistently by the application + * during the lifetime of a connection or after it has been terminated. When a new connection is established with the same bonded device, + * the system attribute information retrieved with this function should be restored using using @ref sd_ble_gatts_sys_attr_set. + * If retrieved after disconnection, the data should be read before a new connection established. The connection handle for + * the previous, now disconnected, connection will remain valid until a new one is created to allow this API call to refer to it. + * Connection handles belonging to active connections can be used as well, but care should be taken since the system attributes + * may be written to at any time by the peer during a connection's lifetime. + * + * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS is used with this function, only the system attributes included in system services will be returned. + * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS is used with this function, only the system attributes included in user services will be returned. + * + * @mscs + * @mmsc{@ref BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle of the recently terminated connection. + * @param[out] p_sys_attr_data Pointer to a buffer where updated information about system attributes will be filled in. The format of the data is described + * in @ref BLE_GATTS_SYS_ATTRS_FORMAT. NULL can be provided to obtain the length of the data. + * @param[in,out] p_len Size of application buffer if p_sys_attr_data is not NULL. Unconditionally updated to actual length of system attribute data. + * @param[in] flags Optional additional flags, see @ref BLE_GATTS_SYS_ATTR_FLAGS + * + * @retval ::NRF_SUCCESS Successfully retrieved the system attribute information. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid flags supplied. + * @retval ::NRF_ERROR_DATA_SIZE The system attribute information did not fit into the provided buffer. + * @retval ::NRF_ERROR_NOT_FOUND No system attributes found. + */ +SVCALL(SD_BLE_GATTS_SYS_ATTR_GET, uint32_t, sd_ble_gatts_sys_attr_get(uint16_t conn_handle, uint8_t *p_sys_attr_data, uint16_t *p_len, uint32_t flags)); + + +/**@brief Retrieve the first valid user attribute handle. + * + * @param[out] p_handle Pointer to an integer where the handle will be stored. + * + * @retval ::NRF_SUCCESS Successfully retrieved the handle. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + */ +SVCALL(SD_BLE_GATTS_INITIAL_USER_HANDLE_GET, uint32_t, sd_ble_gatts_initial_user_handle_get(uint16_t *p_handle)); + +/**@brief Retrieve the attribute UUID and/or metadata. + * + * @param[in] handle Attribute handle + * @param[out] p_uuid UUID of the attribute. Use NULL to omit this field. + * @param[out] p_md Metadata of the attribute. Use NULL to omit this field. + * + * @retval ::NRF_SUCCESS Successfully retrieved the attribute metadata, + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameters supplied. Returned when both @c p_uuid and @c p_md are NULL. + * @retval ::NRF_ERROR_NOT_FOUND Attribute was not found. + */ +SVCALL(SD_BLE_GATTS_ATTR_GET, uint32_t, sd_ble_gatts_attr_get(uint16_t handle, ble_uuid_t * p_uuid, ble_gatts_attr_md_t * p_md)); + +/**@brief Reply to an ATT_MTU exchange request by sending an Exchange MTU Response to the client. + * + * @details This function is only used to reply to a @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST event. + * + * @details The SoftDevice sets ATT_MTU to the minimum of: + * - The Client RX MTU value from @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST, and + * - The Server RX MTU value. + * + * However, the SoftDevice never sets ATT_MTU lower than @ref BLE_GATT_ATT_MTU_DEFAULT. + * + * @mscs + * @mmsc{@ref BLE_GATTS_MTU_EXCHANGE} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] server_rx_mtu Server RX MTU size. + * - The minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. + * - The maximum value is @ref ble_gatt_conn_cfg_t::att_mtu in the connection configuration + * used for this connection. + * - The value must be equal to Client RX MTU size given in @ref sd_ble_gattc_exchange_mtu_request + * if an ATT_MTU exchange has already been performed in the other direction. + * + * @retval ::NRF_SUCCESS Successfully sent response to the client. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no ATT_MTU exchange request pending. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid Server RX MTU size supplied. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTS_EXCHANGE_MTU_REPLY, uint32_t, sd_ble_gatts_exchange_mtu_reply(uint16_t conn_handle, uint16_t server_rx_mtu)); +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // BLE_GATTS_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_hci.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_hci.h new file mode 100644 index 00000000000..f0dde9a03ad --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_hci.h @@ -0,0 +1,135 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON + @{ +*/ + + +#ifndef BLE_HCI_H__ +#define BLE_HCI_H__ +#ifdef __cplusplus +extern "C" { +#endif + +/** @defgroup BLE_HCI_STATUS_CODES Bluetooth status codes + * @{ */ + +#define BLE_HCI_STATUS_CODE_SUCCESS 0x00 /**< Success. */ +#define BLE_HCI_STATUS_CODE_UNKNOWN_BTLE_COMMAND 0x01 /**< Unknown BLE Command. */ +#define BLE_HCI_STATUS_CODE_UNKNOWN_CONNECTION_IDENTIFIER 0x02 /**< Unknown Connection Identifier. */ +/*0x03 Hardware Failure +0x04 Page Timeout +*/ +#define BLE_HCI_AUTHENTICATION_FAILURE 0x05 /**< Authentication Failure. */ +#define BLE_HCI_STATUS_CODE_PIN_OR_KEY_MISSING 0x06 /**< Pin or Key missing. */ +#define BLE_HCI_MEMORY_CAPACITY_EXCEEDED 0x07 /**< Memory Capacity Exceeded. */ +#define BLE_HCI_CONNECTION_TIMEOUT 0x08 /**< Connection Timeout. */ +/*0x09 Connection Limit Exceeded +0x0A Synchronous Connection Limit To A Device Exceeded +0x0B ACL Connection Already Exists*/ +#define BLE_HCI_STATUS_CODE_COMMAND_DISALLOWED 0x0C /**< Command Disallowed. */ +/*0x0D Connection Rejected due to Limited Resources +0x0E Connection Rejected Due To Security Reasons +0x0F Connection Rejected due to Unacceptable BD_ADDR +0x10 Connection Accept Timeout Exceeded +0x11 Unsupported Feature or Parameter Value*/ +#define BLE_HCI_STATUS_CODE_INVALID_BTLE_COMMAND_PARAMETERS 0x12 /**< Invalid BLE Command Parameters. */ +#define BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION 0x13 /**< Remote User Terminated Connection. */ +#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_LOW_RESOURCES 0x14 /**< Remote Device Terminated Connection due to low resources.*/ +#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_POWER_OFF 0x15 /**< Remote Device Terminated Connection due to power off. */ +#define BLE_HCI_LOCAL_HOST_TERMINATED_CONNECTION 0x16 /**< Local Host Terminated Connection. */ +/* +0x17 Repeated Attempts +0x18 Pairing Not Allowed +0x19 Unknown LMP PDU +*/ +#define BLE_HCI_UNSUPPORTED_REMOTE_FEATURE 0x1A /**< Unsupported Remote Feature. */ +/* +0x1B SCO Offset Rejected +0x1C SCO Interval Rejected +0x1D SCO Air Mode Rejected*/ +#define BLE_HCI_STATUS_CODE_INVALID_LMP_PARAMETERS 0x1E /**< Invalid LMP Parameters. */ +#define BLE_HCI_STATUS_CODE_UNSPECIFIED_ERROR 0x1F /**< Unspecified Error. */ +/*0x20 Unsupported LMP Parameter Value +0x21 Role Change Not Allowed +*/ +#define BLE_HCI_STATUS_CODE_LMP_RESPONSE_TIMEOUT 0x22 /**< LMP Response Timeout. */ +#define BLE_HCI_STATUS_CODE_LMP_ERROR_TRANSACTION_COLLISION 0x23 /**< LMP Error Transaction Collision/LL Procedure Collision. */ +#define BLE_HCI_STATUS_CODE_LMP_PDU_NOT_ALLOWED 0x24 /**< LMP PDU Not Allowed. */ +/*0x25 Encryption Mode Not Acceptable +0x26 Link Key Can Not be Changed +0x27 Requested QoS Not Supported +*/ +#define BLE_HCI_INSTANT_PASSED 0x28 /**< Instant Passed. */ +#define BLE_HCI_PAIRING_WITH_UNIT_KEY_UNSUPPORTED 0x29 /**< Pairing with Unit Key Unsupported. */ +#define BLE_HCI_DIFFERENT_TRANSACTION_COLLISION 0x2A /**< Different Transaction Collision. */ +/* +0x2B Reserved +0x2C QoS Unacceptable Parameter +0x2D QoS Rejected +0x2E Channel Classification Not Supported +0x2F Insufficient Security +*/ +#define BLE_HCI_PARAMETER_OUT_OF_MANDATORY_RANGE 0x30 /**< Parameter Out Of Mandatory Range. */ +/* +0x31 Reserved +0x32 Role Switch Pending +0x33 Reserved +0x34 Reserved Slot Violation +0x35 Role Switch Failed +0x36 Extended Inquiry Response Too Large +0x37 Secure Simple Pairing Not Supported By Host. +0x38 Host Busy - Pairing +0x39 Connection Rejected due to No Suitable Channel Found*/ +#define BLE_HCI_CONTROLLER_BUSY 0x3A /**< Controller Busy. */ +#define BLE_HCI_CONN_INTERVAL_UNACCEPTABLE 0x3B /**< Connection Interval Unacceptable. */ +#define BLE_HCI_DIRECTED_ADVERTISER_TIMEOUT 0x3C /**< Directed Advertisement Timeout. */ +#define BLE_HCI_CONN_TERMINATED_DUE_TO_MIC_FAILURE 0x3D /**< Connection Terminated due to MIC Failure. */ +#define BLE_HCI_CONN_FAILED_TO_BE_ESTABLISHED 0x3E /**< Connection Failed to be Established. */ + +/** @} */ + + +#ifdef __cplusplus +} +#endif +#endif // BLE_HCI_H__ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_l2cap.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_l2cap.h new file mode 100644 index 00000000000..eaeb4b7d281 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_l2cap.h @@ -0,0 +1,506 @@ +/* + * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_L2CAP Logical Link Control and Adaptation Protocol (L2CAP) + @{ + @brief Definitions and prototypes for the L2CAP interface. + */ + +#ifndef BLE_L2CAP_H__ +#define BLE_L2CAP_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@addtogroup BLE_L2CAP_TERMINOLOGY Terminology + * @{ + * @details + * + * L2CAP SDU + * - A data unit that the application can send/receive to/from a peer. + * + * L2CAP PDU + * - A data unit that is exchanged between local and remote L2CAP entities. + * It consists of L2CAP protocol control information and payload fields. + * The payload field can contain an L2CAP SDU or a part of an L2CAP SDU. + * + * L2CAP MTU + * - The maximum length of an L2CAP SDU. + * + * L2CAP MPS + * - The maximum length of an L2CAP PDU payload field. + * + * Credits + * - A value indicating the number of L2CAP PDUs that the receiver of the credit can send to the peer. + * @} */ + +/**@addtogroup BLE_L2CAP_ENUMERATIONS Enumerations + * @{ */ + +/**@brief L2CAP API SVC numbers. */ +enum BLE_L2CAP_SVCS +{ + SD_BLE_L2CAP_CH_SETUP = BLE_L2CAP_SVC_BASE + 0, /**< Set up an L2CAP channel. */ + SD_BLE_L2CAP_CH_RELEASE = BLE_L2CAP_SVC_BASE + 1, /**< Release an L2CAP channel. */ + SD_BLE_L2CAP_CH_RX = BLE_L2CAP_SVC_BASE + 2, /**< Receive an SDU on an L2CAP channel. */ + SD_BLE_L2CAP_CH_TX = BLE_L2CAP_SVC_BASE + 3, /**< Transmit an SDU on an L2CAP channel. */ + SD_BLE_L2CAP_CH_FLOW_CONTROL = BLE_L2CAP_SVC_BASE + 4, /**< Advanced SDU reception flow control. */ +}; + +/**@brief L2CAP Event IDs. */ +enum BLE_L2CAP_EVTS +{ + BLE_L2CAP_EVT_CH_SETUP_REQUEST = BLE_L2CAP_EVT_BASE + 0, /**< L2CAP Channel Setup Request event. + \n See @ref ble_l2cap_evt_ch_setup_request_t. */ + BLE_L2CAP_EVT_CH_SETUP_REFUSED = BLE_L2CAP_EVT_BASE + 1, /**< L2CAP Channel Setup Refused event. + \n See @ref ble_l2cap_evt_ch_setup_refused_t. */ + BLE_L2CAP_EVT_CH_SETUP = BLE_L2CAP_EVT_BASE + 2, /**< L2CAP Channel Setup Completed event. + \n See @ref ble_l2cap_evt_ch_setup_t. */ + BLE_L2CAP_EVT_CH_RELEASED = BLE_L2CAP_EVT_BASE + 3, /**< L2CAP Channel Released event. + \n No additional event structure applies. */ + BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED = BLE_L2CAP_EVT_BASE + 4, /**< L2CAP Channel SDU data buffer released event. + \n See @ref ble_l2cap_evt_ch_sdu_buf_released_t. */ + BLE_L2CAP_EVT_CH_CREDIT = BLE_L2CAP_EVT_BASE + 5, /**< L2CAP Channel Credit received. + \n See @ref ble_l2cap_evt_ch_credit_t. */ + BLE_L2CAP_EVT_CH_RX = BLE_L2CAP_EVT_BASE + 6, /**< L2CAP Channel SDU received. + \n See @ref ble_l2cap_evt_ch_rx_t. */ + BLE_L2CAP_EVT_CH_TX = BLE_L2CAP_EVT_BASE + 7, /**< L2CAP Channel SDU transmitted. + \n See @ref ble_l2cap_evt_ch_tx_t. */ +}; + +/** @} */ + +/**@addtogroup BLE_L2CAP_DEFINES Defines + * @{ */ + +/**@brief Maximum number of L2CAP channels per connection. */ +#define BLE_L2CAP_CH_COUNT_MAX (64) + +/**@brief Minimum L2CAP MTU, in bytes. */ +#define BLE_L2CAP_MTU_MIN (23) + +/**@brief Minimum L2CAP MPS, in bytes. */ +#define BLE_L2CAP_MPS_MIN (23) + +/**@brief Invalid CID. */ +#define BLE_L2CAP_CID_INVALID (0x0000) + +/**@brief Default number of credits for @ref sd_ble_l2cap_ch_flow_control. */ +#define BLE_L2CAP_CREDITS_DEFAULT (1) + +/**@defgroup BLE_L2CAP_CH_SETUP_REFUSED_SRCS L2CAP channel setup refused sources + * @{ */ +#define BLE_L2CAP_CH_SETUP_REFUSED_SRC_LOCAL (0x01) /**< Local. */ +#define BLE_L2CAP_CH_SETUP_REFUSED_SRC_REMOTE (0x02) /**< Remote. */ + /** @} */ + + /** @defgroup BLE_L2CAP_CH_STATUS_CODES L2CAP channel status codes + * @{ */ +#define BLE_L2CAP_CH_STATUS_CODE_SUCCESS (0x0000) /**< Success. */ +#define BLE_L2CAP_CH_STATUS_CODE_LE_PSM_NOT_SUPPORTED (0x0002) /**< LE_PSM not supported. */ +#define BLE_L2CAP_CH_STATUS_CODE_NO_RESOURCES (0x0004) /**< No resources available. */ +#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_AUTHENTICATION (0x0005) /**< Insufficient authentication. */ +#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_AUTHORIZATION (0x0006) /**< Insufficient authorization. */ +#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_ENC_KEY_SIZE (0x0007) /**< Insufficient encryption key size. */ +#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_ENC (0x0008) /**< Insufficient encryption. */ +#define BLE_L2CAP_CH_STATUS_CODE_INVALID_SCID (0x0009) /**< Invalid Source CID. */ +#define BLE_L2CAP_CH_STATUS_CODE_SCID_ALLOCATED (0x000A) /**< Source CID already allocated. */ +#define BLE_L2CAP_CH_STATUS_CODE_UNACCEPTABLE_PARAMS (0x000B) /**< Unacceptable parameters. */ +#define BLE_L2CAP_CH_STATUS_CODE_NOT_UNDERSTOOD (0x8000) /**< Command Reject received instead of LE Credit Based Connection Response. */ +#define BLE_L2CAP_CH_STATUS_CODE_TIMEOUT (0xC000) /**< Operation timed out. */ +/** @} */ + +/** @} */ + +/**@addtogroup BLE_L2CAP_STRUCTURES Structures + * @{ */ + +/** + * @brief BLE L2CAP connection configuration parameters, set with @ref sd_ble_cfg_set. + * + * @note These parameters are set per connection, so all L2CAP channels created on this connection + * will have the same parameters. + * + * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: + * - rx_mps is smaller than @ref BLE_L2CAP_MPS_MIN. + * - tx_mps is smaller than @ref BLE_L2CAP_MPS_MIN. + * - ch_count is greater than @ref BLE_L2CAP_CH_COUNT_MAX. + * @retval ::NRF_ERROR_NO_MEM rx_mps or tx_mps is set too high. + */ +typedef struct +{ + uint16_t rx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP shall + be able to receive on L2CAP channels on connections with this + configuration. The minimum value is @ref BLE_L2CAP_MPS_MIN. */ + uint16_t tx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP shall + be able to transmit on L2CAP channels on connections with this + configuration. The minimum value is @ref BLE_L2CAP_MPS_MIN. */ + uint8_t rx_queue_size; /**< Number of SDU data buffers that can be queued for reception per + L2CAP channel. The minimum value is one. */ + uint8_t tx_queue_size; /**< Number of SDU data buffers that can be queued for transmission + per L2CAP channel. The minimum value is one. */ + uint8_t ch_count; /**< Number of L2CAP channels the application can create per connection + with this configuration. The default value is zero, the maximum + value is @ref BLE_L2CAP_CH_COUNT_MAX. + @note if this parameter is set to zero, all other parameters in + @ref ble_l2cap_conn_cfg_t are ignored. */ +} ble_l2cap_conn_cfg_t; + +/**@brief L2CAP channel RX parameters. */ +typedef struct +{ + uint16_t rx_mtu; /**< The maximum L2CAP SDU size, in bytes, that L2CAP shall be able to + receive on this L2CAP channel. + - Must be equal to or greater than @ref BLE_L2CAP_MTU_MIN. */ + uint16_t rx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP shall be + able to receive on this L2CAP channel. + - Must be equal to or greater than @ref BLE_L2CAP_MPS_MIN. + - Must be equal to or less than @ref ble_l2cap_conn_cfg_t::rx_mps. */ + ble_data_t sdu_buf; /**< SDU data buffer for reception. + - If @ref ble_data_t::p_data is non-NULL, initial credits are + issued to the peer. + - If @ref ble_data_t::p_data is NULL, no initial credits are + issued to the peer. */ +} ble_l2cap_ch_rx_params_t; + +/**@brief L2CAP channel setup parameters. */ +typedef struct +{ + ble_l2cap_ch_rx_params_t rx_params; /**< L2CAP channel RX parameters. */ + uint16_t le_psm; /**< LE Protocol/Service Multiplexer. Used when requesting + setup of an L2CAP channel, ignored otherwise. */ + uint16_t status; /**< Status code, see @ref BLE_L2CAP_CH_STATUS_CODES. + Used when replying to a setup request of an L2CAP + channel, ignored otherwise. */ +} ble_l2cap_ch_setup_params_t; + +/**@brief L2CAP channel TX parameters. */ +typedef struct +{ + uint16_t tx_mtu; /**< The maximum L2CAP SDU size, in bytes, that L2CAP is able to + transmit on this L2CAP channel. */ + uint16_t peer_mps; /**< The maximum L2CAP PDU payload size, in bytes, that the peer is + able to receive on this L2CAP channel. */ + uint16_t tx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP is able + to transmit on this L2CAP channel. This is effective tx_mps, + selected by the SoftDevice as + MIN( @ref ble_l2cap_ch_tx_params_t::peer_mps, @ref ble_l2cap_conn_cfg_t::tx_mps ) */ + uint16_t credits; /**< Initial credits given by the peer. */ +} ble_l2cap_ch_tx_params_t; + +/**@brief L2CAP Channel Setup Request event. */ +typedef struct +{ + ble_l2cap_ch_tx_params_t tx_params; /**< L2CAP channel TX parameters. */ + uint16_t le_psm; /**< LE Protocol/Service Multiplexer. */ +} ble_l2cap_evt_ch_setup_request_t; + +/**@brief L2CAP Channel Setup Refused event. */ +typedef struct +{ + uint8_t source; /**< Source, see @ref BLE_L2CAP_CH_SETUP_REFUSED_SRCS */ + uint16_t status; /**< Status code, see @ref BLE_L2CAP_CH_STATUS_CODES */ +} ble_l2cap_evt_ch_setup_refused_t; + +/**@brief L2CAP Channel Setup Completed event. */ +typedef struct +{ + ble_l2cap_ch_tx_params_t tx_params; /**< L2CAP channel TX parameters. */ +} ble_l2cap_evt_ch_setup_t; + +/**@brief L2CAP Channel SDU Data Duffer Released event. */ +typedef struct +{ + ble_data_t sdu_buf; /**< Returned reception or transmission SDU data buffer. The SoftDevice + returns SDU data buffers supplied by the application, which have + not yet been returned previously via a @ref BLE_L2CAP_EVT_CH_RX or + @ref BLE_L2CAP_EVT_CH_TX event. */ +} ble_l2cap_evt_ch_sdu_buf_released_t; + +/**@brief L2CAP Channel Credit received event. */ +typedef struct +{ + uint16_t credits; /**< Additional credits given by the peer. */ +} ble_l2cap_evt_ch_credit_t; + +/**@brief L2CAP Channel received SDU event. */ +typedef struct +{ + uint16_t sdu_len; /**< Total SDU length, in bytes. */ + ble_data_t sdu_buf; /**< SDU data buffer. + @note If there is not enough space in the buffer + (sdu_buf.len < sdu_len) then the rest of the SDU will be + silently discarded by the SoftDevice. */ +} ble_l2cap_evt_ch_rx_t; + +/**@brief L2CAP Channel transmitted SDU event. */ +typedef struct +{ + ble_data_t sdu_buf; /**< SDU data buffer. */ +} ble_l2cap_evt_ch_tx_t; + +/**@brief L2CAP event structure. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which the event occured. */ + uint16_t local_cid; /**< Local Channel ID of the L2CAP channel, or + @ref BLE_L2CAP_CID_INVALID if not present. */ + union + { + ble_l2cap_evt_ch_setup_request_t ch_setup_request; /**< L2CAP Channel Setup Request Event Parameters. */ + ble_l2cap_evt_ch_setup_refused_t ch_setup_refused; /**< L2CAP Channel Setup Refused Event Parameters. */ + ble_l2cap_evt_ch_setup_t ch_setup; /**< L2CAP Channel Setup Completed Event Parameters. */ + ble_l2cap_evt_ch_sdu_buf_released_t ch_sdu_buf_released;/**< L2CAP Channel SDU Data Buffer Released Event Parameters. */ + ble_l2cap_evt_ch_credit_t credit; /**< L2CAP Channel Credit Received Event Parameters. */ + ble_l2cap_evt_ch_rx_t rx; /**< L2CAP Channel SDU Received Event Parameters. */ + ble_l2cap_evt_ch_tx_t tx; /**< L2CAP Channel SDU Transmitted Event Parameters. */ + } params; /**< Event Parameters. */ +} ble_l2cap_evt_t; + +/** @} */ + +/**@addtogroup BLE_L2CAP_FUNCTIONS Functions + * @{ */ + +/**@brief Set up an L2CAP channel. + * + * @details This function is used to: + * - Request setup of an L2CAP channel: sends an LE Credit Based Connection Request packet to a peer. + * - Reply to a setup request of an L2CAP channel (if called in response to a + * @ref BLE_L2CAP_EVT_CH_SETUP_REQUEST event): sends an LE Credit Based Connection + * Response packet to a peer. + * + * @note A call to this function will require the application to keep the SDU data buffer alive + * until the SDU data buffer is returned in @ref BLE_L2CAP_EVT_CH_RX or + * @ref BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED event. + * + * @events + * @event{@ref BLE_L2CAP_EVT_CH_SETUP, Setup successful.} + * @event{@ref BLE_L2CAP_EVT_CH_SETUP_REFUSED, Setup failed.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_SETUP_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in,out] p_local_cid Pointer to a uint16_t containing Local Channel ID of the L2CAP channel: + * - As input: @ref BLE_L2CAP_CID_INVALID when requesting setup of an L2CAP + * channel or local_cid provided in the @ref BLE_L2CAP_EVT_CH_SETUP_REQUEST + * event when replying to a setup request of an L2CAP channel. + * - As output: local_cid for this channel. + * @param[in] p_params L2CAP channel parameters. + * + * @retval ::NRF_SUCCESS Successfully queued request or response for transmission. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_LENGTH Supplied higher rx_mps than has been configured on this link. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (L2CAP channel already set up). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + * @retval ::NRF_ERROR_RESOURCES The limit has been reached for available L2CAP channels, + * see @ref ble_l2cap_conn_cfg_t::ch_count. + */ +SVCALL(SD_BLE_L2CAP_CH_SETUP, uint32_t, sd_ble_l2cap_ch_setup(uint16_t conn_handle, uint16_t *p_local_cid, ble_l2cap_ch_setup_params_t const *p_params)); + +/**@brief Release an L2CAP channel. + * + * @details This sends a Disconnection Request packet to a peer. + * + * @events + * @event{@ref BLE_L2CAP_EVT_CH_RELEASED, Release complete.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_RELEASE_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in] local_cid Local Channel ID of the L2CAP channel. + * + * @retval ::NRF_SUCCESS Successfully queued request for transmission. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is + * in progress for the L2CAP channel). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + */ +SVCALL(SD_BLE_L2CAP_CH_RELEASE, uint32_t, sd_ble_l2cap_ch_release(uint16_t conn_handle, uint16_t local_cid)); + +/**@brief Receive an SDU on an L2CAP channel. + * + * @details This may issue additional credits to the peer using an LE Flow Control Credit packet. + * + * @note A call to this function will require the application to keep the memory pointed by + * @ref ble_data_t::p_data alive until the SDU data buffer is returned in @ref BLE_L2CAP_EVT_CH_RX + * or @ref BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED event. + * + * @note The SoftDevice can queue up to @ref ble_l2cap_conn_cfg_t::rx_queue_size SDU data buffers + * for reception per L2CAP channel. + * + * @events + * @event{@ref BLE_L2CAP_EVT_CH_RX, The SDU is received.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_RX_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in] local_cid Local Channel ID of the L2CAP channel. + * @param[in] p_sdu_buf Pointer to the SDU data buffer. + * + * @retval ::NRF_SUCCESS Buffer accepted. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is + * in progress for an L2CAP channel). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + * @retval ::NRF_ERROR_RESOURCES Too many SDU data buffers supplied. Wait for a + * @ref BLE_L2CAP_EVT_CH_RX event and retry. + */ +SVCALL(SD_BLE_L2CAP_CH_RX, uint32_t, sd_ble_l2cap_ch_rx(uint16_t conn_handle, uint16_t local_cid, ble_data_t const *p_sdu_buf)); + +/**@brief Transmit an SDU on an L2CAP channel. + * + * @note A call to this function will require the application to keep the memory pointed by + * @ref ble_data_t::p_data alive until the SDU data buffer is returned in @ref BLE_L2CAP_EVT_CH_TX + * or @ref BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED event. + * + * @note The SoftDevice can queue up to @ref ble_l2cap_conn_cfg_t::tx_queue_size SDUs for + * transmission per L2CAP channel. + * + * @note The application can keep track of the available credits for transmission by following + * the procedure below: + * - Store initial credits given by the peer in a variable. + * (Initial credits are provided in a @ref BLE_L2CAP_EVT_CH_SETUP event.) + * - Decrement the variable, which stores the currently available credits, by + * ceiling((@ref ble_data_t::len + 2) / tx_mps) when a call to this function returns + * @ref NRF_SUCCESS. (tx_mps is provided in a @ref BLE_L2CAP_EVT_CH_SETUP event.) + * - Increment the variable, which stores the currently available credits, by additional + * credits given by the peer in a @ref BLE_L2CAP_EVT_CH_CREDIT event. + * + * @events + * @event{@ref BLE_L2CAP_EVT_CH_TX, The SDU is transmitted.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_TX_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in] local_cid Local Channel ID of the L2CAP channel. + * @param[in] p_sdu_buf Pointer to the SDU data buffer. + * + * @retval ::NRF_SUCCESS Successfully queued L2CAP SDU for transmission. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is + * in progress for the L2CAP channel). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + * @retval ::NRF_ERROR_DATA_SIZE Invalid SDU length supplied, must not be more than + * @ref ble_l2cap_ch_tx_params_t::tx_mtu provided in + * @ref BLE_L2CAP_EVT_CH_SETUP event. + * @retval ::NRF_ERROR_RESOURCES Too many SDUs queued for transmission. Wait for a + * @ref BLE_L2CAP_EVT_CH_TX event and retry. + */ +SVCALL(SD_BLE_L2CAP_CH_TX, uint32_t, sd_ble_l2cap_ch_tx(uint16_t conn_handle, uint16_t local_cid, ble_data_t const *p_sdu_buf)); + +/**@brief Advanced SDU reception flow control. + * + * @details Adjust the way the SoftDevice issues credits to the peer. + * This may issue additional credits to the peer using an LE Flow Control Credit packet. + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_FLOW_CONTROL_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in] local_cid Local Channel ID of the L2CAP channel or @ref BLE_L2CAP_CID_INVALID to set + * the value that will be used for newly created channels. + * @param[in] credits Number of credits that the SoftDevice will make sure the peer has every + * time it starts using a new reception buffer. + * - @ref BLE_L2CAP_CREDITS_DEFAULT is the default value the SoftDevice will + * use if this function is not called. + * - If set to zero, the SoftDevice will stop issuing credits for new reception + * buffers the application provides or has provided. SDU reception that is + * currently ongoing will be allowed to complete. + * @param[out] p_credits NULL or pointer to a uint16_t. If a valid pointer is provided, it will be + * written by the SoftDevice with the number of credits that is or will be + * available to the peer. If the value written by the SoftDevice is 0 when + * credits parameter was set to 0, the peer will not be able to send more + * data until more credits are provided by calling this function again with + * credits > 0. This parameter is ignored when local_cid is set to + * @ref BLE_L2CAP_CID_INVALID. + * + * @note Application should take care when setting number of credits higher than default value. In + * this case the application must make sure that the SoftDevice always has reception buffers + * available (see @ref sd_ble_l2cap_ch_rx) for that channel. If the SoftDevice does not have + * such buffers available, packets may be NACKed on the Link Layer and all Bluetooth traffic + * on the connection handle may be stalled until the SoftDevice again has an available + * reception buffer. This applies even if the application has used this call to set the + * credits back to default, or zero. + * + * @retval ::NRF_SUCCESS Flow control parameters accepted. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is + * in progress for an L2CAP channel). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + */ +SVCALL(SD_BLE_L2CAP_CH_FLOW_CONTROL, uint32_t, sd_ble_l2cap_ch_flow_control(uint16_t conn_handle, uint16_t local_cid, uint16_t credits, uint16_t *p_credits)); + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // BLE_L2CAP_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_ranges.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_ranges.h new file mode 100644 index 00000000000..0935bca0710 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_ranges.h @@ -0,0 +1,156 @@ +/* + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON + @{ + @defgroup ble_ranges Module specific SVC, event and option number subranges + @{ + + @brief Definition of SVC, event and option number subranges for each API module. + + @note + SVCs, event and option numbers are split into subranges for each API module. + Each module receives its entire allocated range of SVC calls, whether implemented or not, + but return BLE_ERROR_NOT_SUPPORTED for unimplemented or undefined calls in its range. + + Note that the symbols BLE__SVC_LAST is the end of the allocated SVC range, + rather than the last SVC function call actually defined and implemented. + + Specific SVC, event and option values are defined in each module's ble_.h file, + which defines names of each individual SVC code based on the range start value. +*/ + +#ifndef BLE_RANGES_H__ +#define BLE_RANGES_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#define BLE_SVC_BASE 0x60 /**< Common BLE SVC base. */ +#define BLE_SVC_LAST 0x6B /**< Common BLE SVC last. */ + +#define BLE_GAP_SVC_BASE 0x6C /**< GAP BLE SVC base. */ +#define BLE_GAP_SVC_LAST 0x9A /**< GAP BLE SVC last. */ + +#define BLE_GATTC_SVC_BASE 0x9B /**< GATTC BLE SVC base. */ +#define BLE_GATTC_SVC_LAST 0xA7 /**< GATTC BLE SVC last. */ + +#define BLE_GATTS_SVC_BASE 0xA8 /**< GATTS BLE SVC base. */ +#define BLE_GATTS_SVC_LAST 0xB7 /**< GATTS BLE SVC last. */ + +#define BLE_L2CAP_SVC_BASE 0xB8 /**< L2CAP BLE SVC base. */ +#define BLE_L2CAP_SVC_LAST 0xBF /**< L2CAP BLE SVC last. */ + + +#define BLE_EVT_INVALID 0x00 /**< Invalid BLE Event. */ + +#define BLE_EVT_BASE 0x01 /**< Common BLE Event base. */ +#define BLE_EVT_LAST 0x0F /**< Common BLE Event last. */ + +#define BLE_GAP_EVT_BASE 0x10 /**< GAP BLE Event base. */ +#define BLE_GAP_EVT_LAST 0x2F /**< GAP BLE Event last. */ + +#define BLE_GATTC_EVT_BASE 0x30 /**< GATTC BLE Event base. */ +#define BLE_GATTC_EVT_LAST 0x4F /**< GATTC BLE Event last. */ + +#define BLE_GATTS_EVT_BASE 0x50 /**< GATTS BLE Event base. */ +#define BLE_GATTS_EVT_LAST 0x6F /**< GATTS BLE Event last. */ + +#define BLE_L2CAP_EVT_BASE 0x70 /**< L2CAP BLE Event base. */ +#define BLE_L2CAP_EVT_LAST 0x8F /**< L2CAP BLE Event last. */ + + +#define BLE_OPT_INVALID 0x00 /**< Invalid BLE Option. */ + +#define BLE_OPT_BASE 0x01 /**< Common BLE Option base. */ +#define BLE_OPT_LAST 0x1F /**< Common BLE Option last. */ + +#define BLE_GAP_OPT_BASE 0x20 /**< GAP BLE Option base. */ +#define BLE_GAP_OPT_LAST 0x3F /**< GAP BLE Option last. */ + +#define BLE_GATT_OPT_BASE 0x40 /**< GATT BLE Option base. */ +#define BLE_GATT_OPT_LAST 0x5F /**< GATT BLE Option last. */ + +#define BLE_GATTC_OPT_BASE 0x60 /**< GATTC BLE Option base. */ +#define BLE_GATTC_OPT_LAST 0x7F /**< GATTC BLE Option last. */ + +#define BLE_GATTS_OPT_BASE 0x80 /**< GATTS BLE Option base. */ +#define BLE_GATTS_OPT_LAST 0x9F /**< GATTS BLE Option last. */ + +#define BLE_L2CAP_OPT_BASE 0xA0 /**< L2CAP BLE Option base. */ +#define BLE_L2CAP_OPT_LAST 0xBF /**< L2CAP BLE Option last. */ + + +#define BLE_CFG_INVALID 0x00 /**< Invalid BLE configuration. */ + +#define BLE_CFG_BASE 0x01 /**< Common BLE configuration base. */ +#define BLE_CFG_LAST 0x1F /**< Common BLE configuration last. */ + +#define BLE_CONN_CFG_BASE 0x20 /**< BLE connection configuration base. */ +#define BLE_CONN_CFG_LAST 0x3F /**< BLE connection configuration last. */ + +#define BLE_GAP_CFG_BASE 0x40 /**< GAP BLE configuration base. */ +#define BLE_GAP_CFG_LAST 0x5F /**< GAP BLE configuration last. */ + +#define BLE_GATT_CFG_BASE 0x60 /**< GATT BLE configuration base. */ +#define BLE_GATT_CFG_LAST 0x7F /**< GATT BLE configuration last. */ + +#define BLE_GATTC_CFG_BASE 0x80 /**< GATTC BLE configuration base. */ +#define BLE_GATTC_CFG_LAST 0x9F /**< GATTC BLE configuration last. */ + +#define BLE_GATTS_CFG_BASE 0xA0 /**< GATTS BLE configuration base. */ +#define BLE_GATTS_CFG_LAST 0xBF /**< GATTS BLE configuration last. */ + +#define BLE_L2CAP_CFG_BASE 0xC0 /**< L2CAP BLE configuration base. */ +#define BLE_L2CAP_CFG_LAST 0xDF /**< L2CAP BLE configuration last. */ + + + + + +#ifdef __cplusplus +} +#endif +#endif /* BLE_RANGES_H__ */ + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_types.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_types.h new file mode 100644 index 00000000000..88c93180c83 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/ble_types.h @@ -0,0 +1,215 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON + @{ + @defgroup ble_types Common types and macro definitions + @{ + + @brief Common types and macro definitions for the BLE SoftDevice. + */ + +#ifndef BLE_TYPES_H__ +#define BLE_TYPES_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_TYPES_DEFINES Defines + * @{ */ + +/** @defgroup BLE_CONN_HANDLES BLE Connection Handles + * @{ */ +#define BLE_CONN_HANDLE_INVALID 0xFFFF /**< Invalid Connection Handle. */ +#define BLE_CONN_HANDLE_ALL 0xFFFE /**< Applies to all Connection Handles. */ +/** @} */ + + +/** @defgroup BLE_UUID_VALUES Assigned Values for BLE UUIDs + * @{ */ +/* Generic UUIDs, applicable to all services */ +#define BLE_UUID_UNKNOWN 0x0000 /**< Reserved UUID. */ +#define BLE_UUID_SERVICE_PRIMARY 0x2800 /**< Primary Service. */ +#define BLE_UUID_SERVICE_SECONDARY 0x2801 /**< Secondary Service. */ +#define BLE_UUID_SERVICE_INCLUDE 0x2802 /**< Include. */ +#define BLE_UUID_CHARACTERISTIC 0x2803 /**< Characteristic. */ +#define BLE_UUID_DESCRIPTOR_CHAR_EXT_PROP 0x2900 /**< Characteristic Extended Properties Descriptor. */ +#define BLE_UUID_DESCRIPTOR_CHAR_USER_DESC 0x2901 /**< Characteristic User Description Descriptor. */ +#define BLE_UUID_DESCRIPTOR_CLIENT_CHAR_CONFIG 0x2902 /**< Client Characteristic Configuration Descriptor. */ +#define BLE_UUID_DESCRIPTOR_SERVER_CHAR_CONFIG 0x2903 /**< Server Characteristic Configuration Descriptor. */ +#define BLE_UUID_DESCRIPTOR_CHAR_PRESENTATION_FORMAT 0x2904 /**< Characteristic Presentation Format Descriptor. */ +#define BLE_UUID_DESCRIPTOR_CHAR_AGGREGATE_FORMAT 0x2905 /**< Characteristic Aggregate Format Descriptor. */ +/* GATT specific UUIDs */ +#define BLE_UUID_GATT 0x1801 /**< Generic Attribute Profile. */ +#define BLE_UUID_GATT_CHARACTERISTIC_SERVICE_CHANGED 0x2A05 /**< Service Changed Characteristic. */ +/* GAP specific UUIDs */ +#define BLE_UUID_GAP 0x1800 /**< Generic Access Profile. */ +#define BLE_UUID_GAP_CHARACTERISTIC_DEVICE_NAME 0x2A00 /**< Device Name Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_APPEARANCE 0x2A01 /**< Appearance Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_RECONN_ADDR 0x2A03 /**< Reconnection Address Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_PPCP 0x2A04 /**< Peripheral Preferred Connection Parameters Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_CAR 0x2AA6 /**< Central Address Resolution Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_RPA_ONLY 0x2AC9 /**< Resolvable Private Address Only Characteristic. */ +/** @} */ + + +/** @defgroup BLE_UUID_TYPES Types of UUID + * @{ */ +#define BLE_UUID_TYPE_UNKNOWN 0x00 /**< Invalid UUID type. */ +#define BLE_UUID_TYPE_BLE 0x01 /**< Bluetooth SIG UUID (16-bit). */ +#define BLE_UUID_TYPE_VENDOR_BEGIN 0x02 /**< Vendor UUID types start at this index (128-bit). */ +/** @} */ + + +/** @defgroup BLE_APPEARANCES Bluetooth Appearance values + * @note Retrieved from http://developer.bluetooth.org/gatt/characteristics/Pages/CharacteristicViewer.aspx?u=org.bluetooth.characteristic.gap.appearance.xml + * @{ */ +#define BLE_APPEARANCE_UNKNOWN 0 /**< Unknown. */ +#define BLE_APPEARANCE_GENERIC_PHONE 64 /**< Generic Phone. */ +#define BLE_APPEARANCE_GENERIC_COMPUTER 128 /**< Generic Computer. */ +#define BLE_APPEARANCE_GENERIC_WATCH 192 /**< Generic Watch. */ +#define BLE_APPEARANCE_WATCH_SPORTS_WATCH 193 /**< Watch: Sports Watch. */ +#define BLE_APPEARANCE_GENERIC_CLOCK 256 /**< Generic Clock. */ +#define BLE_APPEARANCE_GENERIC_DISPLAY 320 /**< Generic Display. */ +#define BLE_APPEARANCE_GENERIC_REMOTE_CONTROL 384 /**< Generic Remote Control. */ +#define BLE_APPEARANCE_GENERIC_EYE_GLASSES 448 /**< Generic Eye-glasses. */ +#define BLE_APPEARANCE_GENERIC_TAG 512 /**< Generic Tag. */ +#define BLE_APPEARANCE_GENERIC_KEYRING 576 /**< Generic Keyring. */ +#define BLE_APPEARANCE_GENERIC_MEDIA_PLAYER 640 /**< Generic Media Player. */ +#define BLE_APPEARANCE_GENERIC_BARCODE_SCANNER 704 /**< Generic Barcode Scanner. */ +#define BLE_APPEARANCE_GENERIC_THERMOMETER 768 /**< Generic Thermometer. */ +#define BLE_APPEARANCE_THERMOMETER_EAR 769 /**< Thermometer: Ear. */ +#define BLE_APPEARANCE_GENERIC_HEART_RATE_SENSOR 832 /**< Generic Heart rate Sensor. */ +#define BLE_APPEARANCE_HEART_RATE_SENSOR_HEART_RATE_BELT 833 /**< Heart Rate Sensor: Heart Rate Belt. */ +#define BLE_APPEARANCE_GENERIC_BLOOD_PRESSURE 896 /**< Generic Blood Pressure. */ +#define BLE_APPEARANCE_BLOOD_PRESSURE_ARM 897 /**< Blood Pressure: Arm. */ +#define BLE_APPEARANCE_BLOOD_PRESSURE_WRIST 898 /**< Blood Pressure: Wrist. */ +#define BLE_APPEARANCE_GENERIC_HID 960 /**< Human Interface Device (HID). */ +#define BLE_APPEARANCE_HID_KEYBOARD 961 /**< Keyboard (HID Subtype). */ +#define BLE_APPEARANCE_HID_MOUSE 962 /**< Mouse (HID Subtype). */ +#define BLE_APPEARANCE_HID_JOYSTICK 963 /**< Joystick (HID Subtype). */ +#define BLE_APPEARANCE_HID_GAMEPAD 964 /**< Gamepad (HID Subtype). */ +#define BLE_APPEARANCE_HID_DIGITIZERSUBTYPE 965 /**< Digitizer Tablet (HID Subtype). */ +#define BLE_APPEARANCE_HID_CARD_READER 966 /**< Card Reader (HID Subtype). */ +#define BLE_APPEARANCE_HID_DIGITAL_PEN 967 /**< Digital Pen (HID Subtype). */ +#define BLE_APPEARANCE_HID_BARCODE 968 /**< Barcode Scanner (HID Subtype). */ +#define BLE_APPEARANCE_GENERIC_GLUCOSE_METER 1024 /**< Generic Glucose Meter. */ +#define BLE_APPEARANCE_GENERIC_RUNNING_WALKING_SENSOR 1088 /**< Generic Running Walking Sensor. */ +#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_IN_SHOE 1089 /**< Running Walking Sensor: In-Shoe. */ +#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_SHOE 1090 /**< Running Walking Sensor: On-Shoe. */ +#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_HIP 1091 /**< Running Walking Sensor: On-Hip. */ +#define BLE_APPEARANCE_GENERIC_CYCLING 1152 /**< Generic Cycling. */ +#define BLE_APPEARANCE_CYCLING_CYCLING_COMPUTER 1153 /**< Cycling: Cycling Computer. */ +#define BLE_APPEARANCE_CYCLING_SPEED_SENSOR 1154 /**< Cycling: Speed Sensor. */ +#define BLE_APPEARANCE_CYCLING_CADENCE_SENSOR 1155 /**< Cycling: Cadence Sensor. */ +#define BLE_APPEARANCE_CYCLING_POWER_SENSOR 1156 /**< Cycling: Power Sensor. */ +#define BLE_APPEARANCE_CYCLING_SPEED_CADENCE_SENSOR 1157 /**< Cycling: Speed and Cadence Sensor. */ +#define BLE_APPEARANCE_GENERIC_PULSE_OXIMETER 3136 /**< Generic Pulse Oximeter. */ +#define BLE_APPEARANCE_PULSE_OXIMETER_FINGERTIP 3137 /**< Fingertip (Pulse Oximeter subtype). */ +#define BLE_APPEARANCE_PULSE_OXIMETER_WRIST_WORN 3138 /**< Wrist Worn(Pulse Oximeter subtype). */ +#define BLE_APPEARANCE_GENERIC_WEIGHT_SCALE 3200 /**< Generic Weight Scale. */ +#define BLE_APPEARANCE_GENERIC_OUTDOOR_SPORTS_ACT 5184 /**< Generic Outdoor Sports Activity. */ +#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_DISP 5185 /**< Location Display Device (Outdoor Sports Activity subtype). */ +#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_DISP 5186 /**< Location and Navigation Display Device (Outdoor Sports Activity subtype). */ +#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_POD 5187 /**< Location Pod (Outdoor Sports Activity subtype). */ +#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_POD 5188 /**< Location and Navigation Pod (Outdoor Sports Activity subtype). */ +/** @} */ + +/** @brief Set .type and .uuid fields of ble_uuid_struct to specified UUID value. */ +#define BLE_UUID_BLE_ASSIGN(instance, value) do {\ + instance.type = BLE_UUID_TYPE_BLE; \ + instance.uuid = value;} while(0) + +/** @brief Copy type and uuid members from src to dst ble_uuid_t pointer. Both pointers must be valid/non-null. */ +#define BLE_UUID_COPY_PTR(dst, src) do {\ + (dst)->type = (src)->type; \ + (dst)->uuid = (src)->uuid;} while(0) + +/** @brief Copy type and uuid members from src to dst ble_uuid_t struct. */ +#define BLE_UUID_COPY_INST(dst, src) do {\ + (dst).type = (src).type; \ + (dst).uuid = (src).uuid;} while(0) + +/** @brief Compare for equality both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */ +#define BLE_UUID_EQ(p_uuid1, p_uuid2) \ + (((p_uuid1)->type == (p_uuid2)->type) && ((p_uuid1)->uuid == (p_uuid2)->uuid)) + +/** @brief Compare for difference both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */ +#define BLE_UUID_NEQ(p_uuid1, p_uuid2) \ + (((p_uuid1)->type != (p_uuid2)->type) || ((p_uuid1)->uuid != (p_uuid2)->uuid)) + +/** @} */ + +/** @addtogroup BLE_TYPES_STRUCTURES Structures + * @{ */ + +/** @brief 128 bit UUID values. */ +typedef struct +{ + uint8_t uuid128[16]; /**< Little-Endian UUID bytes. */ +} ble_uuid128_t; + +/** @brief Bluetooth Low Energy UUID type, encapsulates both 16-bit and 128-bit UUIDs. */ +typedef struct +{ + uint16_t uuid; /**< 16-bit UUID value or octets 12-13 of 128-bit UUID. */ + uint8_t type; /**< UUID type, see @ref BLE_UUID_TYPES. If type is @ref BLE_UUID_TYPE_UNKNOWN, the value of uuid is undefined. */ +} ble_uuid_t; + +/**@brief Data structure. */ +typedef struct +{ + uint8_t *p_data; /**< Pointer to the data buffer provided to/from the application. */ + uint16_t len; /**< Length of the data buffer, in bytes. */ +} ble_data_t; + +/** @} */ +#ifdef __cplusplus +} +#endif + +#endif /* BLE_TYPES_H__ */ + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf52/nrf_mbr.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf52/nrf_mbr.h new file mode 100644 index 00000000000..cc5971c7a3d --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf52/nrf_mbr.h @@ -0,0 +1,241 @@ +/* + * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @defgroup nrf_mbr_api Master Boot Record API + @{ + + @brief APIs for updating SoftDevice and BootLoader + +*/ + +#ifndef NRF_MBR_H__ +#define NRF_MBR_H__ + +#include "nrf_svc.h" +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup NRF_MBR_DEFINES Defines + * @{ */ + +/**@brief MBR SVC Base number. */ +#define MBR_SVC_BASE (0x18) + +/**@brief Page size in words. */ +#define MBR_PAGE_SIZE_IN_WORDS (1024) + +/** @brief The size that must be reserved for the MBR when a SoftDevice is written to flash. +This is the offset where the first byte of the SoftDevice hex file is written.*/ +#define MBR_SIZE (0x1000) + +/** @} */ + +/** @addtogroup NRF_MBR_ENUMS Enumerations + * @{ */ + +/**@brief nRF Master Boot Record API SVC numbers. */ +enum NRF_MBR_SVCS +{ + SD_MBR_COMMAND = MBR_SVC_BASE, /**< ::sd_mbr_command */ +}; + +/**@brief Possible values for ::sd_mbr_command_t.command */ +enum NRF_MBR_COMMANDS +{ + SD_MBR_COMMAND_COPY_BL, /**< Copy a new BootLoader. @see ::sd_mbr_command_copy_bl_t*/ + SD_MBR_COMMAND_COPY_SD, /**< Copy a new SoftDevice. @see ::sd_mbr_command_copy_sd_t*/ + SD_MBR_COMMAND_INIT_SD, /**< Initialize forwarding interrupts to SD, and run reset function in SD. Does not require any parameters in ::sd_mbr_command_t params.*/ + SD_MBR_COMMAND_COMPARE, /**< This command works like memcmp. @see ::sd_mbr_command_compare_t*/ + SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET, /**< Change the address the MBR starts after a reset. @see ::sd_mbr_command_vector_table_base_set_t*/ + SD_MBR_COMMAND_RESERVED, + SD_MBR_COMMAND_IRQ_FORWARD_ADDRESS_SET, /**< Start forwarding all interrupts to this address. @see ::sd_mbr_command_irq_forward_address_set_t*/ +}; + +/** @} */ + +/** @addtogroup NRF_MBR_TYPES Types + * @{ */ + +/**@brief This command copies part of a new SoftDevice + * + * The destination area is erased before copying. + * If dst is in the middle of a flash page, that whole flash page will be erased. + * If (dst+len) is in the middle of a flash page, that whole flash page will be erased. + * + * The user of this function is responsible for setting the BPROT registers. + * + * @retval ::NRF_SUCCESS indicates that the contents of the memory blocks where copied correctly. + * @retval ::NRF_ERROR_INTERNAL indicates that the contents of the memory blocks where not verified correctly after copying. + */ +typedef struct +{ + uint32_t *src; /**< Pointer to the source of data to be copied.*/ + uint32_t *dst; /**< Pointer to the destination where the content is to be copied.*/ + uint32_t len; /**< Number of 32 bit words to copy. Must be a multiple of @ref MBR_PAGE_SIZE_IN_WORDS words.*/ +} sd_mbr_command_copy_sd_t; + + +/**@brief This command works like memcmp, but takes the length in words. + * + * @retval ::NRF_SUCCESS indicates that the contents of both memory blocks are equal. + * @retval ::NRF_ERROR_NULL indicates that the contents of the memory blocks are not equal. + */ +typedef struct +{ + uint32_t *ptr1; /**< Pointer to block of memory. */ + uint32_t *ptr2; /**< Pointer to block of memory. */ + uint32_t len; /**< Number of 32 bit words to compare.*/ +} sd_mbr_command_compare_t; + + +/**@brief This command copies a new BootLoader. + * + * With this command, destination of BootLoader is always the address written in + * NRF_UICR->BOOTADDR. + * + * Destination is erased by this function. + * If (destination+bl_len) is in the middle of a flash page, that whole flash page will be erased. + * + * This function will use PROTENSET to protect the flash that is not intended to be written. + * + * On success, this function will not return. It will start the new BootLoader from reset-vector as normal. + * + * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. + * @retval ::NRF_ERROR_FORBIDDEN if NRF_UICR->BOOTADDR is not set. + * @retval ::NRF_ERROR_INVALID_LENGTH if parameters attempts to read or write outside flash area. + * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) + */ +typedef struct +{ + uint32_t *bl_src; /**< Pointer to the source of the Bootloader to be be copied.*/ + uint32_t bl_len; /**< Number of 32 bit words to copy for BootLoader. */ +} sd_mbr_command_copy_bl_t; + +/**@brief Change the address the MBR starts after a reset + * + * Once this function has been called, this address is where the MBR will start to forward + * interrupts to after a reset. + * + * To restore default forwarding this function should be called with @ref address set to 0. The + * MBR will then start forwarding interrupts to the address in NFR_UICR->BOOTADDR or to the + * SoftDevice if the BOOTADDR is not set. + * + * On success, this function will not return. It will reset the device. + * + * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. + * @retval ::NRF_ERROR_INVALID_ADDR if parameter address is outside of the flash size. + * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) + */ +typedef struct +{ + uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ +} sd_mbr_command_vector_table_base_set_t; + +/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the MBR + * + * Unlike sd_mbr_command_vector_table_base_set_t, this function does not reset, and it does not + * change where the MBR starts after reset. + * + * @retval ::NRF_SUCCESS + */ +typedef struct +{ + uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ +} sd_mbr_command_irq_forward_address_set_t; + +/**@brief Input structure containing data used when calling ::sd_mbr_command + * + * Depending on what command value that is set, the corresponding params value type must also be + * set. See @ref NRF_MBR_COMMANDS for command types and corresponding params value type. If command + * @ref SD_MBR_COMMAND_INIT_SD is set, it is not necessary to set any values under params. + */ +typedef struct +{ + uint32_t command; /**< Type of command to be issued. See @ref NRF_MBR_COMMANDS. */ + union + { + sd_mbr_command_copy_sd_t copy_sd; /**< Parameters for copy SoftDevice.*/ + sd_mbr_command_compare_t compare; /**< Parameters for verify.*/ + sd_mbr_command_copy_bl_t copy_bl; /**< Parameters for copy BootLoader. Requires parameter page. */ + sd_mbr_command_vector_table_base_set_t base_set; /**< Parameters for vector table base set. Requires parameter page.*/ + sd_mbr_command_irq_forward_address_set_t irq_forward_address_set; /**< Parameters for irq forward address set*/ + } params; /**< Command parameters. */ +} sd_mbr_command_t; + +/** @} */ + +/** @addtogroup NRF_MBR_FUNCTIONS Functions + * @{ */ + +/**@brief Issue Master Boot Record commands + * + * Commands used when updating a SoftDevice and bootloader. + * + * The @ref SD_MBR_COMMAND_COPY_BL and @ref SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET requires + * parameters to be retained by the MBR when resetting the IC. This is done in a separate flash + * page provided by the application. The UICR register UICR.NRFFW[1] must be set to an address + * corresponding to a page in the application flash space. This page will be cleared by the MBR and + * used to store the command before reset. When the UICR.NRFFW[1] field is set the page it refers + * to must not be used by the application. If the UICR.NRFFW[1] is set to 0xFFFFFFFF (the default) + * MBR commands which use flash will be unavailable and return @ref NRF_ERROR_NO_MEM. + * + * @param[in] param Pointer to a struct describing the command. + * + * @note For return values, see ::sd_mbr_command_copy_sd_t, ::sd_mbr_command_copy_bl_t, + * ::sd_mbr_command_compare_t, ::sd_mbr_command_vector_table_base_set_t, + * ::sd_mbr_command_irq_forward_address_set_t + * + * @retval ::NRF_ERROR_NO_MEM if UICR.NRFFW[1] is not set (i.e. is 0xFFFFFFFF). + * @retval ::NRF_ERROR_INVALID_PARAM if an invalid command is given. +*/ +SVCALL(SD_MBR_COMMAND, uint32_t, sd_mbr_command(sd_mbr_command_t* param)); + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // NRF_MBR_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_ble.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_ble.h new file mode 100644 index 00000000000..9ebb41f5383 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_ble.h @@ -0,0 +1,622 @@ +/* + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON BLE SoftDevice Common + @{ + @defgroup ble_api Events, type definitions and API calls + @{ + + @brief Module independent events, type definitions and API calls for the BLE SoftDevice. + + */ + +#ifndef BLE_H__ +#define BLE_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_err.h" +#include "ble_gap.h" +#include "ble_l2cap.h" +#include "ble_gatt.h" +#include "ble_gattc.h" +#include "ble_gatts.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_COMMON_ENUMERATIONS Enumerations + * @{ */ + +/** + * @brief Common API SVC numbers. + */ +enum BLE_COMMON_SVCS +{ + SD_BLE_ENABLE = BLE_SVC_BASE, /**< Enable and initialize the BLE stack */ + SD_BLE_EVT_GET, /**< Get an event from the pending events queue. */ + SD_BLE_UUID_VS_ADD, /**< Add a Vendor Specific UUID. */ + SD_BLE_UUID_DECODE, /**< Decode UUID bytes. */ + SD_BLE_UUID_ENCODE, /**< Encode UUID bytes. */ + SD_BLE_VERSION_GET, /**< Get the local version information (company ID, Link Layer Version, Link Layer Subversion). */ + SD_BLE_USER_MEM_REPLY, /**< User Memory Reply. */ + SD_BLE_OPT_SET, /**< Set a BLE option. */ + SD_BLE_OPT_GET, /**< Get a BLE option. */ + SD_BLE_CFG_SET, /**< Add a configuration to the BLE stack. */ +}; + +/** + * @brief BLE Module Independent Event IDs. + */ +enum BLE_COMMON_EVTS +{ + BLE_EVT_USER_MEM_REQUEST = BLE_EVT_BASE + 0, /**< User Memory request. @ref ble_evt_user_mem_request_t */ + BLE_EVT_USER_MEM_RELEASE = BLE_EVT_BASE + 1, /**< User Memory release. @ref ble_evt_user_mem_release_t */ +}; + +/**@brief BLE Connection Configuration IDs. + * + * IDs that uniquely identify a connection configuration. + */ +enum BLE_CONN_CFGS +{ + BLE_CONN_CFG_GAP = BLE_CONN_CFG_BASE + 0, /**< BLE GAP specific connection configuration. */ + BLE_CONN_CFG_GATTC = BLE_CONN_CFG_BASE + 1, /**< BLE GATTC specific connection configuration. */ + BLE_CONN_CFG_GATTS = BLE_CONN_CFG_BASE + 2, /**< BLE GATTS specific connection configuration. */ + BLE_CONN_CFG_GATT = BLE_CONN_CFG_BASE + 3, /**< BLE GATT specific connection configuration. */ + BLE_CONN_CFG_L2CAP = BLE_CONN_CFG_BASE + 4, /**< BLE L2CAP specific connection configuration. */ +}; + +/**@brief BLE Common Configuration IDs. + * + * IDs that uniquely identify a common configuration. + */ +enum BLE_COMMON_CFGS +{ + BLE_COMMON_CFG_VS_UUID = BLE_CFG_BASE, /**< Vendor specific UUID configuration */ +}; + +/**@brief Common Option IDs. + * IDs that uniquely identify a common option. + */ +enum BLE_COMMON_OPTS +{ + BLE_COMMON_OPT_PA_LNA = BLE_OPT_BASE + 0, /**< PA and LNA options */ + BLE_COMMON_OPT_CONN_EVT_EXT = BLE_OPT_BASE + 1, /**< Extended connection events option */ +}; + +/** @} */ + +/** @addtogroup BLE_COMMON_DEFINES Defines + * @{ */ + +/** @brief Required pointer alignment for BLE Events. +*/ +#define BLE_EVT_PTR_ALIGNMENT 4 + +/** @brief Leaves the maximum of the two arguments. +*/ +#define BLE_MAX(a, b) ((a) < (b) ? (b) : (a)) + +/** @brief Maximum possible length for BLE Events. + * @note The highest value used for @ref ble_gatt_conn_cfg_t::att_mtu in any connection configuration shall be used as a parameter. + * If that value has not been configured for any connections then @ref BLE_GATT_ATT_MTU_DEFAULT must be used instead. +*/ +#define BLE_EVT_LEN_MAX(ATT_MTU) ( \ + offsetof(ble_evt_t, evt.gattc_evt.params.prim_srvc_disc_rsp.services) + ((ATT_MTU) - 1) / 4 * sizeof(ble_gattc_service_t) \ +) + +/** @defgroup BLE_USER_MEM_TYPES User Memory Types + * @{ */ +#define BLE_USER_MEM_TYPE_INVALID 0x00 /**< Invalid User Memory Types. */ +#define BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES 0x01 /**< User Memory for GATTS queued writes. */ +/** @} */ + +/** @defgroup BLE_UUID_VS_COUNTS Vendor Specific UUID counts + * @{ + */ +#define BLE_UUID_VS_COUNT_DEFAULT 10 /**< Default VS UUID count. */ +#define BLE_UUID_VS_COUNT_MAX 254 /**< Maximum VS UUID count. */ +/** @} */ + +/** @defgroup BLE_COMMON_CFG_DEFAULTS Configuration defaults. + * @{ + */ +#define BLE_CONN_CFG_TAG_DEFAULT 0 /**< Default configuration tag, SoftDevice default connection configuration. */ + +/** @} */ + +/** @} */ + +/** @addtogroup BLE_COMMON_STRUCTURES Structures + * @{ */ + +/**@brief User Memory Block. */ +typedef struct +{ + uint8_t *p_mem; /**< Pointer to the start of the user memory block. */ + uint16_t len; /**< Length in bytes of the user memory block. */ +} ble_user_mem_block_t; + +/**@brief Event structure for @ref BLE_EVT_USER_MEM_REQUEST. */ +typedef struct +{ + uint8_t type; /**< User memory type, see @ref BLE_USER_MEM_TYPES. */ +} ble_evt_user_mem_request_t; + +/**@brief Event structure for @ref BLE_EVT_USER_MEM_RELEASE. */ +typedef struct +{ + uint8_t type; /**< User memory type, see @ref BLE_USER_MEM_TYPES. */ + ble_user_mem_block_t mem_block; /**< User memory block */ +} ble_evt_user_mem_release_t; + +/**@brief Event structure for events not associated with a specific function module. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which this event occurred. */ + union + { + ble_evt_user_mem_request_t user_mem_request; /**< User Memory Request Event Parameters. */ + ble_evt_user_mem_release_t user_mem_release; /**< User Memory Release Event Parameters. */ + } params; /**< Event parameter union. */ +} ble_common_evt_t; + +/**@brief BLE Event header. */ +typedef struct +{ + uint16_t evt_id; /**< Value from a BLE__EVT series. */ + uint16_t evt_len; /**< Length in octets including this header. */ +} ble_evt_hdr_t; + +/**@brief Common BLE Event type, wrapping the module specific event reports. */ +typedef struct +{ + ble_evt_hdr_t header; /**< Event header. */ + union + { + ble_common_evt_t common_evt; /**< Common Event, evt_id in BLE_EVT_* series. */ + ble_gap_evt_t gap_evt; /**< GAP originated event, evt_id in BLE_GAP_EVT_* series. */ + ble_gattc_evt_t gattc_evt; /**< GATT client originated event, evt_id in BLE_GATTC_EVT* series. */ + ble_gatts_evt_t gatts_evt; /**< GATT server originated event, evt_id in BLE_GATTS_EVT* series. */ + ble_l2cap_evt_t l2cap_evt; /**< L2CAP originated event, evt_id in BLE_L2CAP_EVT* series. */ + } evt; /**< Event union. */ +} ble_evt_t; + + +/** + * @brief Version Information. + */ +typedef struct +{ + uint8_t version_number; /**< Link Layer Version number. See https://www.bluetooth.org/en-us/specification/assigned-numbers/link-layer for assigned values. */ + uint16_t company_id; /**< Company ID, Nordic Semiconductor's company ID is 89 (0x0059) (https://www.bluetooth.org/apps/content/Default.aspx?doc_id=49708). */ + uint16_t subversion_number; /**< Link Layer Sub Version number, corresponds to the SoftDevice Config ID or Firmware ID (FWID). */ +} ble_version_t; + +/** + * @brief Configuration parameters for the PA and LNA. + */ +typedef struct +{ + uint8_t enable :1; /**< Enable toggling for this amplifier */ + uint8_t active_high :1; /**< Set the pin to be active high */ + uint8_t gpio_pin :6; /**< The GPIO pin to toggle for this amplifier */ +} ble_pa_lna_cfg_t; + +/** + * @brief PA & LNA GPIO toggle configuration + * + * This option configures the SoftDevice to toggle pins when the radio is active for use with a power amplifier and/or + * a low noise amplifier. + * + * Toggling the pins is achieved by using two PPI channels and a GPIOTE channel. The hardware channel IDs are provided + * by the application and should be regarded as reserved as long as any PA/LNA toggling is enabled. + * + * @note @ref sd_ble_opt_get is not supported for this option. + * @note Setting this option while the radio is in use (i.e. any of the roles are active) may have undefined consequences + * and must be avoided by the application. + */ +typedef struct +{ + ble_pa_lna_cfg_t pa_cfg; /**< Power Amplifier configuration */ + ble_pa_lna_cfg_t lna_cfg; /**< Low Noise Amplifier configuration */ + + uint8_t ppi_ch_id_set; /**< PPI channel used for radio pin setting */ + uint8_t ppi_ch_id_clr; /**< PPI channel used for radio pin clearing */ + uint8_t gpiote_ch_id; /**< GPIOTE channel used for radio pin toggling */ +} ble_common_opt_pa_lna_t; + +/** + * @brief Configuration of extended BLE connection events. + * + * When enabled the SoftDevice will dynamically extend the connection event when possible. + * + * The connection event length is controlled by the connection configuration as set by @ref ble_gap_conn_cfg_t::event_length. + * The connection event can be extended if there is time to send another packet pair before the start of the next connection interval, + * and if there are no conflicts with other BLE roles requesting radio time. + * + * @note @ref sd_ble_opt_get is not supported for this option. + */ +typedef struct +{ + uint8_t enable : 1; /**< Enable extended BLE connection events, disabled by default. */ +} ble_common_opt_conn_evt_ext_t; + +/**@brief Option structure for common options. */ +typedef union +{ + ble_common_opt_pa_lna_t pa_lna; /**< Parameters for controlling PA and LNA pin toggling. */ + ble_common_opt_conn_evt_ext_t conn_evt_ext; /**< Parameters for enabling extended connection events. */ +} ble_common_opt_t; + +/**@brief Common BLE Option type, wrapping the module specific options. */ +typedef union +{ + ble_common_opt_t common_opt; /**< COMMON options, opt_id in @ref BLE_COMMON_OPTS series. */ + ble_gap_opt_t gap_opt; /**< GAP option, opt_id in @ref BLE_GAP_OPTS series. */ +} ble_opt_t; + +/**@brief BLE connection configuration type, wrapping the module specific configurations, set with + * @ref sd_ble_cfg_set. + * + * @note Connection configurations don't have to be set. + * In the case that no configurations has been set, or fewer connection configurations has been set than enabled connections, + * the default connection configuration will be automatically added for the remaining connections. + * When creating connections with the default configuration, @ref BLE_CONN_CFG_TAG_DEFAULT should be used in + * place of @ref ble_conn_cfg_t::conn_cfg_tag. + * + * @sa sd_ble_gap_adv_start() + * @sa sd_ble_gap_connect() + * + * @mscs + * @mmsc{@ref BLE_CONN_CFG} + * @endmscs + + */ +typedef struct +{ + uint8_t conn_cfg_tag; /**< The application chosen tag it can use with the + @ref sd_ble_gap_adv_start() and @ref sd_ble_gap_connect() calls + to select this configuration when creating a connection. + Must be different for all connection configurations added and not @ref BLE_CONN_CFG_TAG_DEFAULT. */ + union { + ble_gap_conn_cfg_t gap_conn_cfg; /**< GAP connection configuration, cfg_id is @ref BLE_CONN_CFG_GAP. */ + ble_gattc_conn_cfg_t gattc_conn_cfg; /**< GATTC connection configuration, cfg_id is @ref BLE_CONN_CFG_GATTC. */ + ble_gatts_conn_cfg_t gatts_conn_cfg; /**< GATTS connection configuration, cfg_id is @ref BLE_CONN_CFG_GATTS. */ + ble_gatt_conn_cfg_t gatt_conn_cfg; /**< GATT connection configuration, cfg_id is @ref BLE_CONN_CFG_GATT. */ + ble_l2cap_conn_cfg_t l2cap_conn_cfg; /**< L2CAP connection configuration, cfg_id is @ref BLE_CONN_CFG_L2CAP. */ + } params; /**< Connection configuration union. */ +} ble_conn_cfg_t; + +/** + * @brief Configuration of Vendor Specific UUIDs, set with @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_INVALID_PARAM Too many UUIDs configured. + */ +typedef struct +{ + uint8_t vs_uuid_count; /**< Number of 128-bit Vendor Specific UUID bases to allocate memory for. + Default value is @ref BLE_UUID_VS_COUNT_DEFAULT. Maximum value is + @ref BLE_UUID_VS_COUNT_MAX. */ +} ble_common_cfg_vs_uuid_t; + +/**@brief Common BLE Configuration type, wrapping the common configurations. */ +typedef union +{ + ble_common_cfg_vs_uuid_t vs_uuid_cfg; /**< Vendor specific UUID configuration, cfg_id is @ref BLE_COMMON_CFG_VS_UUID. */ +} ble_common_cfg_t; + +/**@brief BLE Configuration type, wrapping the module specific configurations. */ +typedef union +{ + ble_conn_cfg_t conn_cfg; /**< Connection specific configurations, cfg_id in @ref BLE_CONN_CFGS series. */ + ble_common_cfg_t common_cfg; /**< Global common configurations, cfg_id in @ref BLE_COMMON_CFGS series. */ + ble_gap_cfg_t gap_cfg; /**< Global GAP configurations, cfg_id in @ref BLE_GAP_CFGS series. */ + ble_gatts_cfg_t gatts_cfg; /**< Global GATTS configuration, cfg_id in @ref BLE_GATTS_CFGS series. */ +} ble_cfg_t; + +/** @} */ + +/** @addtogroup BLE_COMMON_FUNCTIONS Functions + * @{ */ + +/**@brief Enable the BLE stack + * + * @param[in, out] p_app_ram_base Pointer to a variable containing the start address of the + * application RAM region (APP_RAM_BASE). On return, this will + * contain the minimum start address of the application RAM region + * required by the SoftDevice for this configuration. + * + * @note The memory requirement for a specific configuration will not increase between SoftDevices + * with the same major version number. + * + * @note The value of *p_app_ram_base when the app has done no custom configuration of the + * SoftDevice, i.e. the app has not called @ref sd_ble_cfg_set before @ref sd_ble_enable, can + * be found in the release notes. + * + * @note At runtime the IC's RAM is split into 2 regions: The SoftDevice RAM region is located + * between 0x20000000 and APP_RAM_BASE-1 and the application's RAM region is located between + * APP_RAM_BASE and the start of the call stack. + * + * @details This call initializes the BLE stack, no BLE related function other than @ref + * sd_ble_cfg_set can be called before this one. + * + * @mscs + * @mmsc{@ref BLE_COMMON_ENABLE} + * @endmscs + * + * @retval ::NRF_SUCCESS The BLE stack has been initialized successfully. + * @retval ::NRF_ERROR_INVALID_STATE The BLE stack had already been initialized and cannot be reinitialized. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. + * @retval ::NRF_ERROR_NO_MEM The amount of memory assigned to the SoftDevice by *p_app_ram_base is not + * large enough to fit this configuration's memory requirement. Check *p_app_ram_base + * and set the start address of the application RAM region accordingly. + */ +SVCALL(SD_BLE_ENABLE, uint32_t, sd_ble_enable(uint32_t * p_app_ram_base)); + +/**@brief Add configurations for the BLE stack + * + * @param[in] cfg_id Config ID, see @ref BLE_CONN_CFGS, @ref BLE_COMMON_CFGS, @ref + * BLE_GAP_CFGS or @ref BLE_GATTS_CFGS. + * @param[in] p_cfg Pointer to a ble_cfg_t structure containing the configuration value. + * @param[in] app_ram_base The start address of the application RAM region (APP_RAM_BASE). + * See @ref sd_ble_enable for details about APP_RAM_BASE. + * + * @note The memory requirement for a specific configuration will not increase between SoftDevices + * with the same major version number. + * + * @note If a configuration is set more than once, the last one set is the one that takes effect on + * @ref sd_ble_enable. + * + * @note Any part of the BLE stack that is NOT configured with @ref sd_ble_cfg_set will have default + * configuration. + * + * @note @ref sd_ble_cfg_set may be called at any time when the SoftDevice is enabled (see @ref + * sd_softdevice_enable) while the BLE part of the SoftDevice is not enabled (see @ref + * sd_ble_enable). + * + * @note Error codes for the configurations are described in the configuration structs. + * + * @mscs + * @mmsc{@ref BLE_COMMON_ENABLE} + * @endmscs + * + * @retval ::NRF_SUCCESS The configuration has been added successfully. + * @retval ::NRF_ERROR_INVALID_STATE The BLE stack had already been initialized. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid cfg_id supplied. + * @retval ::NRF_ERROR_NO_MEM The amount of memory assigned to the SoftDevice by app_ram_base is not + * large enough to fit this configuration's memory requirement. + */ +SVCALL(SD_BLE_CFG_SET, uint32_t, sd_ble_cfg_set(uint32_t cfg_id, ble_cfg_t const * p_cfg, uint32_t app_ram_base)); + +/**@brief Get an event from the pending events queue. + * + * @param[out] p_dest Pointer to buffer to be filled in with an event, or NULL to retrieve the event length. + * This buffer must be aligned to the extend defined by @ref BLE_EVT_PTR_ALIGNMENT. + * The buffer should be interpreted as a @ref ble_evt_t struct. + * @param[in, out] p_len Pointer the length of the buffer, on return it is filled with the event length. + * + * @details This call allows the application to pull a BLE event from the BLE stack. The application is signaled that + * an event is available from the BLE stack by the triggering of the SD_EVT_IRQn interrupt. + * The application is free to choose whether to call this function from thread mode (main context) or directly from the + * Interrupt Service Routine that maps to SD_EVT_IRQn. In any case however, and because the BLE stack runs at a higher + * priority than the application, this function should be called in a loop (until @ref NRF_ERROR_NOT_FOUND is returned) + * every time SD_EVT_IRQn is raised to ensure that all available events are pulled from the BLE stack. Failure to do so + * could potentially leave events in the internal queue without the application being aware of this fact. + * + * Sizing the p_dest buffer is equally important, since the application needs to provide all the memory necessary for the event to + * be copied into application memory. If the buffer provided is not large enough to fit the entire contents of the event, + * @ref NRF_ERROR_DATA_SIZE will be returned and the application can then call again with a larger buffer size. + * The maximum possible event length is defined by @ref BLE_EVT_LEN_MAX. The application may also "peek" the event length + * by providing p_dest as a NULL pointer and inspecting the value of *p_len upon return: + * + * \code + * uint16_t len; + * errcode = sd_ble_evt_get(NULL, &len); + * \endcode + * + * @mscs + * @mmsc{@ref BLE_COMMON_IRQ_EVT_MSC} + * @mmsc{@ref BLE_COMMON_THREAD_EVT_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Event pulled and stored into the supplied buffer. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. + * @retval ::NRF_ERROR_NOT_FOUND No events ready to be pulled. + * @retval ::NRF_ERROR_DATA_SIZE Event ready but could not fit into the supplied buffer. + */ +SVCALL(SD_BLE_EVT_GET, uint32_t, sd_ble_evt_get(uint8_t *p_dest, uint16_t *p_len)); + + +/**@brief Add a Vendor Specific base UUID. + * + * @details This call enables the application to add a vendor specific base UUID to the BLE stack's table, for later + * use with all other modules and APIs. This then allows the application to use the shorter, 24-bit @ref ble_uuid_t + * format when dealing with both 16-bit and 128-bit UUIDs without having to check for lengths and having split code + * paths. This is accomplished by extending the grouping mechanism that the Bluetooth SIG standard base UUID uses + * for all other 128-bit UUIDs. The type field in the @ref ble_uuid_t structure is an index (relative to + * @ref BLE_UUID_TYPE_VENDOR_BEGIN) to the table populated by multiple calls to this function, and the UUID field + * in the same structure contains the 2 bytes at indexes 12 and 13. The number of possible 128-bit UUIDs available to + * the application is therefore the number of Vendor Specific UUIDs added with the help of this function times 65536, + * although restricted to modifying bytes 12 and 13 for each of the entries in the supplied array. + * + * @note Bytes 12 and 13 of the provided UUID will not be used internally, since those are always replaced by + * the 16-bit uuid field in @ref ble_uuid_t. + * + * @note If a UUID is already present in the BLE stack's internal table, the corresponding index will be returned in + * p_uuid_type along with an @ref NRF_SUCCESS error code. + * + * @param[in] p_vs_uuid Pointer to a 16-octet (128-bit) little endian Vendor Specific UUID disregarding + * bytes 12 and 13. + * @param[out] p_uuid_type Pointer to a uint8_t where the type field in @ref ble_uuid_t corresponding to this UUID will be stored. + * + * @retval ::NRF_SUCCESS Successfully added the Vendor Specific UUID. + * @retval ::NRF_ERROR_INVALID_ADDR If p_vs_uuid or p_uuid_type is NULL or invalid. + * @retval ::NRF_ERROR_NO_MEM If there are no more free slots for VS UUIDs. + */ +SVCALL(SD_BLE_UUID_VS_ADD, uint32_t, sd_ble_uuid_vs_add(ble_uuid128_t const *p_vs_uuid, uint8_t *p_uuid_type)); + + +/** @brief Decode little endian raw UUID bytes (16-bit or 128-bit) into a 24 bit @ref ble_uuid_t structure. + * + * @details The raw UUID bytes excluding bytes 12 and 13 (i.e. bytes 0-11 and 14-15) of p_uuid_le are compared + * to the corresponding ones in each entry of the table of vendor specific UUIDs populated with @ref sd_ble_uuid_vs_add + * to look for a match. If there is such a match, bytes 12 and 13 are returned as p_uuid->uuid and the index + * relative to @ref BLE_UUID_TYPE_VENDOR_BEGIN as p_uuid->type. + * + * @note If the UUID length supplied is 2, then the type set by this call will always be @ref BLE_UUID_TYPE_BLE. + * + * @param[in] uuid_le_len Length in bytes of the buffer pointed to by p_uuid_le (must be 2 or 16 bytes). + * @param[in] p_uuid_le Pointer pointing to little endian raw UUID bytes. + * @param[out] p_uuid Pointer to a @ref ble_uuid_t structure to be filled in. + * + * @retval ::NRF_SUCCESS Successfully decoded into the @ref ble_uuid_t structure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_LENGTH Invalid UUID length. + * @retval ::NRF_ERROR_NOT_FOUND For a 128-bit UUID, no match in the populated table of UUIDs. + */ +SVCALL(SD_BLE_UUID_DECODE, uint32_t, sd_ble_uuid_decode(uint8_t uuid_le_len, uint8_t const *p_uuid_le, ble_uuid_t *p_uuid)); + + +/** @brief Encode a @ref ble_uuid_t structure into little endian raw UUID bytes (16-bit or 128-bit). + * + * @note The pointer to the destination buffer p_uuid_le may be NULL, in which case only the validity and size of p_uuid is computed. + * + * @param[in] p_uuid Pointer to a @ref ble_uuid_t structure that will be encoded into bytes. + * @param[out] p_uuid_le_len Pointer to a uint8_t that will be filled with the encoded length (2 or 16 bytes). + * @param[out] p_uuid_le Pointer to a buffer where the little endian raw UUID bytes (2 or 16) will be stored. + * + * @retval ::NRF_SUCCESS Successfully encoded into the buffer. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid UUID type. + */ +SVCALL(SD_BLE_UUID_ENCODE, uint32_t, sd_ble_uuid_encode(ble_uuid_t const *p_uuid, uint8_t *p_uuid_le_len, uint8_t *p_uuid_le)); + + +/**@brief Get Version Information. + * + * @details This call allows the application to get the BLE stack version information. + * + * @param[out] p_version Pointer to a ble_version_t structure to be filled in. + * + * @retval ::NRF_SUCCESS Version information stored successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY The BLE stack is busy (typically doing a locally-initiated disconnection procedure). + */ +SVCALL(SD_BLE_VERSION_GET, uint32_t, sd_ble_version_get(ble_version_t *p_version)); + + +/**@brief Provide a user memory block. + * + * @note This call can only be used as a response to a @ref BLE_EVT_USER_MEM_REQUEST event issued to the application. + * + * @param[in] conn_handle Connection handle. + * @param[in] p_block Pointer to a user memory block structure or NULL if memory is managed by the application. + * + * @mscs + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_PEER_CANCEL_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_NOAUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Successfully queued a response to the peer. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_LENGTH Invalid user memory block length supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection state or no user memory request pending. + */ +SVCALL(SD_BLE_USER_MEM_REPLY, uint32_t, sd_ble_user_mem_reply(uint16_t conn_handle, ble_user_mem_block_t const *p_block)); + +/**@brief Set a BLE option. + * + * @details This call allows the application to set the value of an option. + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC} + * @endmscs + * + * @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS. + * @param[in] p_opt Pointer to a ble_opt_t structure containing the option value. + * + * @retval ::NRF_SUCCESS Option set successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. + * @retval ::NRF_ERROR_INVALID_STATE Unable to set the parameter at this time. + * @retval ::NRF_ERROR_BUSY The BLE stack is busy or the previous procedure has not completed. + */ +SVCALL(SD_BLE_OPT_SET, uint32_t, sd_ble_opt_set(uint32_t opt_id, ble_opt_t const *p_opt)); + + +/**@brief Get a BLE option. + * + * @details This call allows the application to retrieve the value of an option. + * + * @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS. + * @param[out] p_opt Pointer to a ble_opt_t structure to be filled in. + * + * @retval ::NRF_SUCCESS Option retrieved successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. + * @retval ::NRF_ERROR_INVALID_STATE Unable to retrieve the parameter at this time. + * @retval ::NRF_ERROR_BUSY The BLE stack is busy or the previous procedure has not completed. + * @retval ::NRF_ERROR_NOT_SUPPORTED This option is not supported. + * + */ +SVCALL(SD_BLE_OPT_GET, uint32_t, sd_ble_opt_get(uint32_t opt_id, ble_opt_t *p_opt)); + +/** @} */ +#ifdef __cplusplus +} +#endif +#endif /* BLE_H__ */ + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_error.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_error.h new file mode 100644 index 00000000000..6badee98e56 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_error.h @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** + @defgroup nrf_error SoftDevice Global Error Codes + @{ + + @brief Global Error definitions +*/ + +/* Header guard */ +#ifndef NRF_ERROR_H__ +#define NRF_ERROR_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/** @defgroup NRF_ERRORS_BASE Error Codes Base number definitions + * @{ */ +#define NRF_ERROR_BASE_NUM (0x0) ///< Global error base +#define NRF_ERROR_SDM_BASE_NUM (0x1000) ///< SDM error base +#define NRF_ERROR_SOC_BASE_NUM (0x2000) ///< SoC error base +#define NRF_ERROR_STK_BASE_NUM (0x3000) ///< STK error base +/** @} */ + +#define NRF_SUCCESS (NRF_ERROR_BASE_NUM + 0) ///< Successful command +#define NRF_ERROR_SVC_HANDLER_MISSING (NRF_ERROR_BASE_NUM + 1) ///< SVC handler is missing +#define NRF_ERROR_SOFTDEVICE_NOT_ENABLED (NRF_ERROR_BASE_NUM + 2) ///< SoftDevice has not been enabled +#define NRF_ERROR_INTERNAL (NRF_ERROR_BASE_NUM + 3) ///< Internal Error +#define NRF_ERROR_NO_MEM (NRF_ERROR_BASE_NUM + 4) ///< No Memory for operation +#define NRF_ERROR_NOT_FOUND (NRF_ERROR_BASE_NUM + 5) ///< Not found +#define NRF_ERROR_NOT_SUPPORTED (NRF_ERROR_BASE_NUM + 6) ///< Not supported +#define NRF_ERROR_INVALID_PARAM (NRF_ERROR_BASE_NUM + 7) ///< Invalid Parameter +#define NRF_ERROR_INVALID_STATE (NRF_ERROR_BASE_NUM + 8) ///< Invalid state, operation disallowed in this state +#define NRF_ERROR_INVALID_LENGTH (NRF_ERROR_BASE_NUM + 9) ///< Invalid Length +#define NRF_ERROR_INVALID_FLAGS (NRF_ERROR_BASE_NUM + 10) ///< Invalid Flags +#define NRF_ERROR_INVALID_DATA (NRF_ERROR_BASE_NUM + 11) ///< Invalid Data +#define NRF_ERROR_DATA_SIZE (NRF_ERROR_BASE_NUM + 12) ///< Invalid Data size +#define NRF_ERROR_TIMEOUT (NRF_ERROR_BASE_NUM + 13) ///< Operation timed out +#define NRF_ERROR_NULL (NRF_ERROR_BASE_NUM + 14) ///< Null Pointer +#define NRF_ERROR_FORBIDDEN (NRF_ERROR_BASE_NUM + 15) ///< Forbidden Operation +#define NRF_ERROR_INVALID_ADDR (NRF_ERROR_BASE_NUM + 16) ///< Bad Memory Address +#define NRF_ERROR_BUSY (NRF_ERROR_BASE_NUM + 17) ///< Busy +#define NRF_ERROR_CONN_COUNT (NRF_ERROR_BASE_NUM + 18) ///< Maximum connection count exceeded. +#define NRF_ERROR_RESOURCES (NRF_ERROR_BASE_NUM + 19) ///< Not enough resources for operation + +#ifdef __cplusplus +} +#endif +#endif // NRF_ERROR_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_error_sdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_error_sdm.h new file mode 100644 index 00000000000..530959b9d67 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_error_sdm.h @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** + @addtogroup nrf_sdm_api + @{ + @defgroup nrf_sdm_error SoftDevice Manager Error Codes + @{ + + @brief Error definitions for the SDM API +*/ + +/* Header guard */ +#ifndef NRF_ERROR_SDM_H__ +#define NRF_ERROR_SDM_H__ + +#include "nrf_error.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN (NRF_ERROR_SDM_BASE_NUM + 0) ///< Unknown LFCLK source. +#define NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION (NRF_ERROR_SDM_BASE_NUM + 1) ///< Incorrect interrupt configuration (can be caused by using illegal priority levels, or having enabled SoftDevice interrupts). +#define NRF_ERROR_SDM_INCORRECT_CLENR0 (NRF_ERROR_SDM_BASE_NUM + 2) ///< Incorrect CLENR0 (can be caused by erroneous SoftDevice flashing). + +#ifdef __cplusplus +} +#endif +#endif // NRF_ERROR_SDM_H__ + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_error_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_error_soc.h new file mode 100644 index 00000000000..1e784b8db38 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_error_soc.h @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup nrf_soc_api + @{ + @defgroup nrf_soc_error SoC Library Error Codes + @{ + + @brief Error definitions for the SoC library + +*/ + +/* Header guard */ +#ifndef NRF_ERROR_SOC_H__ +#define NRF_ERROR_SOC_H__ + +#include "nrf_error.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* Mutex Errors */ +#define NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN (NRF_ERROR_SOC_BASE_NUM + 0) ///< Mutex already taken + +/* NVIC errors */ +#define NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE (NRF_ERROR_SOC_BASE_NUM + 1) ///< NVIC interrupt not available +#define NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED (NRF_ERROR_SOC_BASE_NUM + 2) ///< NVIC interrupt priority not allowed +#define NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN (NRF_ERROR_SOC_BASE_NUM + 3) ///< NVIC should not return + +/* Power errors */ +#define NRF_ERROR_SOC_POWER_MODE_UNKNOWN (NRF_ERROR_SOC_BASE_NUM + 4) ///< Power mode unknown +#define NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN (NRF_ERROR_SOC_BASE_NUM + 5) ///< Power POF threshold unknown +#define NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN (NRF_ERROR_SOC_BASE_NUM + 6) ///< Power off should not return + +/* Rand errors */ +#define NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES (NRF_ERROR_SOC_BASE_NUM + 7) ///< RAND not enough values + +/* PPI errors */ +#define NRF_ERROR_SOC_PPI_INVALID_CHANNEL (NRF_ERROR_SOC_BASE_NUM + 8) ///< Invalid PPI Channel +#define NRF_ERROR_SOC_PPI_INVALID_GROUP (NRF_ERROR_SOC_BASE_NUM + 9) ///< Invalid PPI Group + +#ifdef __cplusplus +} +#endif +#endif // NRF_ERROR_SOC_H__ +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_nvic.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_nvic.h new file mode 100644 index 00000000000..f5c7e8e0286 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_nvic.h @@ -0,0 +1,486 @@ +/* + * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @defgroup nrf_nvic_api SoftDevice NVIC API + * @{ + * + * @note In order to use this module, the following code has to be added to a .c file: + * \code + * nrf_nvic_state_t nrf_nvic_state = {0}; + * \endcode + * + * @note Definitions and declarations starting with __ (double underscore) in this header file are + * not intended for direct use by the application. + * + * @brief APIs for the accessing NVIC when using a SoftDevice. + * + */ + +#ifndef NRF_NVIC_H__ +#define NRF_NVIC_H__ + +#include +#include "nrf.h" +#include "nrf_svc.h" +#include "nrf_error.h" +#include "nrf_error_soc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@addtogroup NRF_NVIC_DEFINES Defines + * @{ */ + +/**@defgroup NRF_NVIC_ISER_DEFINES SoftDevice NVIC internal definitions + * @{ */ + +#define __NRF_NVIC_NVMC_IRQn (30) /**< The peripheral ID of the NVMC. IRQ numbers are used to identify peripherals, but the NVMC doesn't have an IRQ number in the MDK. */ + +#define __NRF_NVIC_ISER_COUNT (2) /**< The number of ISER/ICER registers in the NVIC that are used. */ + +/**@brief Interrupts used by the SoftDevice, with IRQn in the range 0-31. */ +#define __NRF_NVIC_SD_IRQS_0 ((uint32_t)( \ + (1U << POWER_CLOCK_IRQn) \ + | (1U << RADIO_IRQn) \ + | (1U << RTC0_IRQn) \ + | (1U << TIMER0_IRQn) \ + | (1U << RNG_IRQn) \ + | (1U << ECB_IRQn) \ + | (1U << CCM_AAR_IRQn) \ + | (1U << TEMP_IRQn) \ + | (1U << __NRF_NVIC_NVMC_IRQn) \ + | (1U << (uint32_t)SWI5_IRQn) \ + )) + +/**@brief Interrupts used by the SoftDevice, with IRQn in the range 32-63. */ +#define __NRF_NVIC_SD_IRQS_1 ((uint32_t)0) + +/**@brief Interrupts available for to application, with IRQn in the range 0-31. */ +#define __NRF_NVIC_APP_IRQS_0 (~__NRF_NVIC_SD_IRQS_0) + +/**@brief Interrupts available for to application, with IRQn in the range 32-63. */ +#define __NRF_NVIC_APP_IRQS_1 (~__NRF_NVIC_SD_IRQS_1) + +/**@} */ + +/**@} */ + +/**@addtogroup NRF_NVIC_VARIABLES Variables + * @{ */ + +/**@brief Type representing the state struct for the SoftDevice NVIC module. */ +typedef struct +{ + uint32_t volatile __irq_masks[__NRF_NVIC_ISER_COUNT]; /**< IRQs enabled by the application in the NVIC. */ + uint32_t volatile __cr_flag; /**< Non-zero if already in a critical region */ +} nrf_nvic_state_t; + +/**@brief Variable keeping the state for the SoftDevice NVIC module. This must be declared in an + * application source file. */ +extern nrf_nvic_state_t nrf_nvic_state; + +/**@} */ + +/**@addtogroup NRF_NVIC_INTERNAL_FUNCTIONS SoftDevice NVIC internal functions + * @{ */ + +/**@brief Disables IRQ interrupts globally, including the SoftDevice's interrupts. + * + * @retval The value of PRIMASK prior to disabling the interrupts. + */ +__STATIC_INLINE int __sd_nvic_irq_disable(void); + +/**@brief Enables IRQ interrupts globally, including the SoftDevice's interrupts. + */ +__STATIC_INLINE void __sd_nvic_irq_enable(void); + +/**@brief Checks if IRQn is available to application + * @param[in] IRQn IRQ to check + * + * @retval 1 (true) if the IRQ to check is available to the application + */ +__STATIC_INLINE uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn); + +/**@brief Checks if priority is available to application + * @param[in] priority priority to check + * + * @retval 1 (true) if the priority to check is available to the application + */ +__STATIC_INLINE uint32_t __sd_nvic_is_app_accessible_priority(uint32_t priority); + +/**@} */ + +/**@addtogroup NRF_NVIC_FUNCTIONS SoftDevice NVIC public functions + * @{ */ + +/**@brief Enable External Interrupt. + * @note Corresponds to NVIC_EnableIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_EnableIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt was enabled. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt has a priority not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn); + +/**@brief Disable External Interrupt. + * @note Corresponds to NVIC_DisableIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_DisableIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt was disabled. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn); + +/**@brief Get Pending Interrupt. + * @note Corresponds to NVIC_GetPendingIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_GetPendingIRQ documentation in CMSIS. + * @param[out] p_pending_irq Return value from NVIC_GetPendingIRQ. + * + * @retval ::NRF_SUCCESS The interrupt is available for the application. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq); + +/**@brief Set Pending Interrupt. + * @note Corresponds to NVIC_SetPendingIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_SetPendingIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt is set pending. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn); + +/**@brief Clear Pending Interrupt. + * @note Corresponds to NVIC_ClearPendingIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_ClearPendingIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt pending flag is cleared. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn); + +/**@brief Set Interrupt Priority. + * @note Corresponds to NVIC_SetPriority in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * @pre Priority is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_SetPriority documentation in CMSIS. + * @param[in] priority A valid IRQ priority for use by the application. + * + * @retval ::NRF_SUCCESS The interrupt and priority level is available for the application. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt priority is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority); + +/**@brief Get Interrupt Priority. + * @note Corresponds to NVIC_GetPriority in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_GetPriority documentation in CMSIS. + * @param[out] p_priority Return value from NVIC_GetPriority. + * + * @retval ::NRF_SUCCESS The interrupt priority is returned in p_priority. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE - IRQn is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority); + +/**@brief System Reset. + * @note Corresponds to NVIC_SystemReset in CMSIS. + * + * @retval ::NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN + */ +__STATIC_INLINE uint32_t sd_nvic_SystemReset(void); + +/**@brief Enter critical region. + * + * @post Application interrupts will be disabled. + * @note sd_nvic_critical_region_enter() and ::sd_nvic_critical_region_exit() must be called in matching pairs inside each + * execution context + * @sa sd_nvic_critical_region_exit + * + * @param[out] p_is_nested_critical_region If 1, the application is now in a nested critical region. + * + * @retval ::NRF_SUCCESS + */ +__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region); + +/**@brief Exit critical region. + * + * @pre Application has entered a critical region using ::sd_nvic_critical_region_enter. + * @post If not in a nested critical region, the application interrupts will restored to the state before ::sd_nvic_critical_region_enter was called. + * + * @param[in] is_nested_critical_region If this is set to 1, the critical region won't be exited. @sa sd_nvic_critical_region_enter. + * + * @retval ::NRF_SUCCESS + */ +__STATIC_INLINE uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region); + +/**@} */ + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE int __sd_nvic_irq_disable(void) +{ + int pm = __get_PRIMASK(); + __disable_irq(); + return pm; +} + +__STATIC_INLINE void __sd_nvic_irq_enable(void) +{ + __enable_irq(); +} + +__STATIC_INLINE uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn) +{ + if (IRQn < 32) + { + return ((1UL<= (1 << __NVIC_PRIO_BITS)) + { + return 0; + } + if( priority == 0 + || priority == 1 + || priority == 4 + ) + { + return 0; + } + return 1; +} + + +__STATIC_INLINE uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn) +{ + if (!__sd_nvic_app_accessible_irq(IRQn)) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } + if (!__sd_nvic_is_app_accessible_priority(NVIC_GetPriority(IRQn))) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED; + } + + if (nrf_nvic_state.__cr_flag) + { + nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] |= (uint32_t)(1 << ((uint32_t)((int32_t)IRQn) & (uint32_t)0x1F)); + } + else + { + NVIC_EnableIRQ(IRQn); + } + return NRF_SUCCESS; +} + +__STATIC_INLINE uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn) +{ + if (!__sd_nvic_app_accessible_irq(IRQn)) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } + + if (nrf_nvic_state.__cr_flag) + { + nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] &= ~(1UL << ((uint32_t)(IRQn) & 0x1F)); + } + else + { + NVIC_DisableIRQ(IRQn); + } + + return NRF_SUCCESS; +} + +__STATIC_INLINE uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq) +{ + if (__sd_nvic_app_accessible_irq(IRQn)) + { + *p_pending_irq = NVIC_GetPendingIRQ(IRQn); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } +} + +__STATIC_INLINE uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn) +{ + if (__sd_nvic_app_accessible_irq(IRQn)) + { + NVIC_SetPendingIRQ(IRQn); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } +} + +__STATIC_INLINE uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn) +{ + if (__sd_nvic_app_accessible_irq(IRQn)) + { + NVIC_ClearPendingIRQ(IRQn); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } +} + +__STATIC_INLINE uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if (!__sd_nvic_app_accessible_irq(IRQn)) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } + + if (!__sd_nvic_is_app_accessible_priority(priority)) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED; + } + + NVIC_SetPriority(IRQn, (uint32_t)priority); + return NRF_SUCCESS; +} + +__STATIC_INLINE uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority) +{ + if (__sd_nvic_app_accessible_irq(IRQn)) + { + *p_priority = (NVIC_GetPriority(IRQn) & 0xFF); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } +} + +__STATIC_INLINE uint32_t sd_nvic_SystemReset(void) +{ + NVIC_SystemReset(); + return NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN; +} + +__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region) +{ + int was_masked = __sd_nvic_irq_disable(); + if (!nrf_nvic_state.__cr_flag) + { + nrf_nvic_state.__cr_flag = 1; + nrf_nvic_state.__irq_masks[0] = ( NVIC->ICER[0] & __NRF_NVIC_APP_IRQS_0 ); + NVIC->ICER[0] = __NRF_NVIC_APP_IRQS_0; + nrf_nvic_state.__irq_masks[1] = ( NVIC->ICER[1] & __NRF_NVIC_APP_IRQS_1 ); + NVIC->ICER[1] = __NRF_NVIC_APP_IRQS_1; + *p_is_nested_critical_region = 0; + } + else + { + *p_is_nested_critical_region = 1; + } + if (!was_masked) + { + __sd_nvic_irq_enable(); + } + return NRF_SUCCESS; +} + +__STATIC_INLINE uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region) +{ + if (nrf_nvic_state.__cr_flag && (is_nested_critical_region == 0)) + { + int was_masked = __sd_nvic_irq_disable(); + NVIC->ISER[0] = nrf_nvic_state.__irq_masks[0]; + NVIC->ISER[1] = nrf_nvic_state.__irq_masks[1]; + nrf_nvic_state.__cr_flag = 0; + if (!was_masked) + { + __sd_nvic_irq_enable(); + } + } + + return NRF_SUCCESS; +} + +#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_NVIC_H__ + +/**@} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_sd_def.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_sd_def.h new file mode 100644 index 00000000000..c9ab241872e --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_sd_def.h @@ -0,0 +1,59 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_SD_DEF_H__ +#define NRF_SD_DEF_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#define SD_PPI_CHANNELS_USED 0xFFFE0000uL /**< PPI channels utilized by SotfDevice (not available to the application). */ +#define SD_PPI_GROUPS_USED 0x0000000CuL /**< PPI groups utilized by SoftDevice (not available to the application). */ +#define SD_TIMERS_USED 0x00000001uL /**< Timers used by SoftDevice. */ +#define SD_SWI_USED 0x0000003CuL /**< Software interrupts used by SoftDevice */ + + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_SD_DEF_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_sdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_sdm.h new file mode 100644 index 00000000000..8c48d936786 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_sdm.h @@ -0,0 +1,358 @@ +/* + * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @defgroup nrf_sdm_api SoftDevice Manager API + @{ + + @brief APIs for SoftDevice management. + +*/ + +#ifndef NRF_SDM_H__ +#define NRF_SDM_H__ + +#include +#include "nrf.h" +#include "nrf_svc.h" +#include "nrf_error.h" +#include "nrf_error_sdm.h" +#include "nrf_soc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup NRF_SDM_DEFINES Defines + * @{ */ +#ifdef NRFSOC_DOXYGEN +/// Declared in nrf_mbr.h +#define MBR_SIZE 0 +#warning test +#endif + +/** @brief The major version for the SoftDevice binary distributed with this header file. */ +#define SD_MAJOR_VERSION (6) + +/** @brief The minor version for the SoftDevice binary distributed with this header file. */ +#define SD_MINOR_VERSION (0) + +/** @brief The bugfix version for the SoftDevice binary distributed with this header file. */ +#define SD_BUGFIX_VERSION (0) + +/** @brief The full version number for the SoftDevice binary this header file was distributed + * with, as a decimal number in the form Mmmmbbb, where: + * - M is major version (one or more digits) + * - mmm is minor version (three digits) + * - bbb is bugfix version (three digits). */ +#define SD_VERSION (SD_MAJOR_VERSION * 1000000 + SD_MINOR_VERSION * 1000 + SD_BUGFIX_VERSION) + +/** @brief SoftDevice Manager SVC Base number. */ +#define SDM_SVC_BASE 0x10 + +/** @brief SoftDevice unique string size in bytes. */ +#define SD_UNIQUE_STR_SIZE 20 + +/** @brief Invalid info field. Returned when an info field does not exist. */ +#define SDM_INFO_FIELD_INVALID (0) + +/** @brief Defines the SoftDevice Information Structure location (address) as an offset from +the start of the SoftDevice (without MBR)*/ +#define SOFTDEVICE_INFO_STRUCT_OFFSET (0x2000) + +/** @brief Defines the absolute SoftDevice Information Structure location (address) when the + * SoftDevice is installed just above the MBR (the usual case). */ +#define SOFTDEVICE_INFO_STRUCT_ADDRESS (SOFTDEVICE_INFO_STRUCT_OFFSET + MBR_SIZE) + +/** @brief Defines the offset for the SoftDevice Information Structure size value relative to the + * SoftDevice base address. The size value is of type uint8_t. */ +#define SD_INFO_STRUCT_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET) + +/** @brief Defines the offset for the SoftDevice size value relative to the SoftDevice base address. + * The size value is of type uint32_t. */ +#define SD_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x08) + +/** @brief Defines the offset for FWID value relative to the SoftDevice base address. The FWID value + * is of type uint16_t. */ +#define SD_FWID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x0C) + +/** @brief Defines the offset for the SoftDevice ID relative to the SoftDevice base address. The ID + * is of type uint32_t. */ +#define SD_ID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x10) + +/** @brief Defines the offset for the SoftDevice version relative to the SoftDevice base address in + * the same format as @ref SD_VERSION, stored as an uint32_t. */ +#define SD_VERSION_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x14) + +/** @brief Defines the offset for the SoftDevice unique string relative to the SoftDevice base address. + * The SD_UNIQUE_STR is stored as an array of uint8_t. The size of array is @ref SD_UNIQUE_STR_SIZE. + */ +#define SD_UNIQUE_STR_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x18) + +/** @brief Defines a macro for retrieving the actual SoftDevice Information Structure size value + * from a given base address. Use @ref MBR_SIZE as the argument when the SoftDevice is + * installed just above the MBR (the usual case). */ +#define SD_INFO_STRUCT_SIZE_GET(baseaddr) (*((uint8_t *) ((baseaddr) + SD_INFO_STRUCT_SIZE_OFFSET))) + +/** @brief Defines a macro for retrieving the actual SoftDevice size value from a given base + * address. Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above + * the MBR (the usual case). */ +#define SD_SIZE_GET(baseaddr) (*((uint32_t *) ((baseaddr) + SD_SIZE_OFFSET))) + +/** @brief Defines a macro for retrieving the actual FWID value from a given base address. Use + * @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the usual + * case). */ +#define SD_FWID_GET(baseaddr) (*((uint16_t *) ((baseaddr) + SD_FWID_OFFSET))) + +/** @brief Defines a macro for retrieving the actual SoftDevice ID from a given base address. Use + * @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the + * usual case). */ +#define SD_ID_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_ID_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ + ? (*((uint32_t *) ((baseaddr) + SD_ID_OFFSET))) : SDM_INFO_FIELD_INVALID) + +/** @brief Defines a macro for retrieving the actual SoftDevice version from a given base address. + * Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR + * (the usual case). */ +#define SD_VERSION_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_VERSION_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ + ? (*((uint32_t *) ((baseaddr) + SD_VERSION_OFFSET))) : SDM_INFO_FIELD_INVALID) + +/** @brief Defines a macro for retrieving the address of SoftDevice unique str based on a given base address. + * Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR + * (the usual case). */ +#define SD_UNIQUE_STR_ADDR_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_UNIQUE_STR_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ + ? (((uint8_t *) ((baseaddr) + SD_UNIQUE_STR_OFFSET))) : SDM_INFO_FIELD_INVALID) + +/**@defgroup NRF_FAULT_ID_RANGES Fault ID ranges + * @{ */ +#define NRF_FAULT_ID_SD_RANGE_START 0x00000000 /**< SoftDevice ID range start. */ +#define NRF_FAULT_ID_APP_RANGE_START 0x00001000 /**< Application ID range start. */ +/**@} */ + +/**@defgroup NRF_FAULT_IDS Fault ID types + * @{ */ +#define NRF_FAULT_ID_SD_ASSERT (NRF_FAULT_ID_SD_RANGE_START + 1) /**< SoftDevice assertion. The info parameter is reserved for future used. */ +#define NRF_FAULT_ID_APP_MEMACC (NRF_FAULT_ID_APP_RANGE_START + 1) /**< Application invalid memory access. The info parameter will contain 0x00000000, + in case of SoftDevice RAM access violation. In case of SoftDevice peripheral + register violation the info parameter will contain the sub-region number of + PREGION[0], on whose address range the disallowed write access caused the + memory access fault. */ +/**@} */ + +/** @} */ + +/** @addtogroup NRF_SDM_ENUMS Enumerations + * @{ */ + +/**@brief nRF SoftDevice Manager API SVC numbers. */ +enum NRF_SD_SVCS +{ + SD_SOFTDEVICE_ENABLE = SDM_SVC_BASE, /**< ::sd_softdevice_enable */ + SD_SOFTDEVICE_DISABLE, /**< ::sd_softdevice_disable */ + SD_SOFTDEVICE_IS_ENABLED, /**< ::sd_softdevice_is_enabled */ + SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, /**< ::sd_softdevice_vector_table_base_set */ + SVC_SDM_LAST /**< Placeholder for last SDM SVC */ +}; + +/** @} */ + +/** @addtogroup NRF_SDM_DEFINES Defines + * @{ */ + +/**@defgroup NRF_CLOCK_LF_ACCURACY Clock accuracy + * @{ */ + +#define NRF_CLOCK_LF_ACCURACY_250_PPM (0) /**< Default: 250 ppm */ +#define NRF_CLOCK_LF_ACCURACY_500_PPM (1) /**< 500 ppm */ +#define NRF_CLOCK_LF_ACCURACY_150_PPM (2) /**< 150 ppm */ +#define NRF_CLOCK_LF_ACCURACY_100_PPM (3) /**< 100 ppm */ +#define NRF_CLOCK_LF_ACCURACY_75_PPM (4) /**< 75 ppm */ +#define NRF_CLOCK_LF_ACCURACY_50_PPM (5) /**< 50 ppm */ +#define NRF_CLOCK_LF_ACCURACY_30_PPM (6) /**< 30 ppm */ +#define NRF_CLOCK_LF_ACCURACY_20_PPM (7) /**< 20 ppm */ +#define NRF_CLOCK_LF_ACCURACY_10_PPM (8) /**< 10 ppm */ +#define NRF_CLOCK_LF_ACCURACY_5_PPM (9) /**< 5 ppm */ +#define NRF_CLOCK_LF_ACCURACY_2_PPM (10) /**< 2 ppm */ +#define NRF_CLOCK_LF_ACCURACY_1_PPM (11) /**< 1 ppm */ + +/** @} */ + +/**@defgroup NRF_CLOCK_LF_SRC Possible LFCLK oscillator sources + * @{ */ + +#define NRF_CLOCK_LF_SRC_RC (0) /**< LFCLK RC oscillator. */ +#define NRF_CLOCK_LF_SRC_XTAL (1) /**< LFCLK crystal oscillator. */ +#define NRF_CLOCK_LF_SRC_SYNTH (2) /**< LFCLK Synthesized from HFCLK. */ + +/** @} */ + +/** @} */ + +/** @addtogroup NRF_SDM_TYPES Types + * @{ */ + +/**@brief Type representing LFCLK oscillator source. */ +typedef struct +{ + uint8_t source; /**< LF oscillator clock source, see @ref NRF_CLOCK_LF_SRC. */ + uint8_t rc_ctiv; /**< Only for ::NRF_CLOCK_LF_SRC_RC: Calibration timer interval in 1/4 second + units (nRF52: 1-32). + @note To avoid excessive clock drift, 0.5 degrees Celsius is the + maximum temperature change allowed in one calibration timer + interval. The interval should be selected to ensure this. + + @note Must be 0 if source is not ::NRF_CLOCK_LF_SRC_RC. */ + uint8_t rc_temp_ctiv; /**< Only for ::NRF_CLOCK_LF_SRC_RC: How often (in number of calibration + intervals) the RC oscillator shall be calibrated if the temperature + hasn't changed. + 0: Always calibrate even if the temperature hasn't changed. + 1: Only calibrate if the temperature has changed (legacy - nRF51 only). + 2-33: Check the temperature and only calibrate if it has changed, + however calibration will take place every rc_temp_ctiv + intervals in any case. + + @note Must be 0 if source is not ::NRF_CLOCK_LF_SRC_RC. + + @note For nRF52, the application must ensure calibration at least once + every 8 seconds to ensure +/-500 ppm clock stability. The + recommended configuration for ::NRF_CLOCK_LF_SRC_RC on nRF52 is + rc_ctiv=16 and rc_temp_ctiv=2. This will ensure calibration at + least once every 8 seconds and for temperature changes of 0.5 + degrees Celsius every 4 seconds. See the Product Specification + for the nRF52 device being used for more information.*/ + uint8_t accuracy; /**< External clock accuracy used in the LL to compute timing + windows, see @ref NRF_CLOCK_LF_ACCURACY.*/ +} nrf_clock_lf_cfg_t; + +/**@brief Fault Handler type. + * + * When certain unrecoverable errors occur within the application or SoftDevice the fault handler will be called back. + * The protocol stack will be in an undefined state when this happens and the only way to recover will be to + * perform a reset, using e.g. CMSIS NVIC_SystemReset(). + * If the application returns from the fault handler the SoftDevice will call NVIC_SystemReset(). + * + * @note This callback is executed in HardFault context, thus SVC functions cannot be called from the fault callback. + * + * @param[in] id Fault identifier. See @ref NRF_FAULT_IDS. + * @param[in] pc The program counter of the instruction that triggered the fault. + * @param[in] info Optional additional information regarding the fault. Refer to each Fault identifier for details. + * + * @note When id is set to @ref NRF_FAULT_ID_APP_MEMACC, pc will contain the address of the instruction being executed at the time when + * the fault is detected by the CPU. The CPU program counter may have advanced up to 2 instructions (no branching) after the one that triggered the fault. + */ +typedef void (*nrf_fault_handler_t)(uint32_t id, uint32_t pc, uint32_t info); + +/** @} */ + +/** @addtogroup NRF_SDM_FUNCTIONS Functions + * @{ */ + +/**@brief Enables the SoftDevice and by extension the protocol stack. + * + * @note Some care must be taken if a low frequency clock source is already running when calling this function: + * If the LF clock has a different source then the one currently running, it will be stopped. Then, the new + * clock source will be started. + * + * @note This function has no effect when returning with an error. + * + * @post If return code is ::NRF_SUCCESS + * - SoC library and protocol stack APIs are made available. + * - A portion of RAM will be unavailable (see relevant SDS documentation). + * - Some peripherals will be unavailable or available only through the SoC API (see relevant SDS documentation). + * - Interrupts will not arrive from protected peripherals or interrupts. + * - nrf_nvic_ functions must be used instead of CMSIS NVIC_ functions for reliable usage of the SoftDevice. + * - Interrupt latency may be affected by the SoftDevice (see relevant SDS documentation). + * - Chosen low frequency clock source will be running. + * + * @param p_clock_lf_cfg Low frequency clock source and accuracy. + If NULL the clock will be configured as an RC source with rc_ctiv = 16 and .rc_temp_ctiv = 2 + In the case of XTAL source, the PPM accuracy of the chosen clock source must be greater than or equal to the actual characteristics of your XTAL clock. + * @param fault_handler Callback to be invoked in case of fault, cannot be NULL. + * + * @retval ::NRF_SUCCESS + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE SoftDevice is already enabled, and the clock source and fault handler cannot be updated. + * @retval ::NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION SoftDevice interrupt is already enabled, or an enabled interrupt has an illegal priority level. + * @retval ::NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN Unknown low frequency clock source selected. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid clock source configuration supplied in p_clock_lf_cfg. + */ +SVCALL(SD_SOFTDEVICE_ENABLE, uint32_t, sd_softdevice_enable(nrf_clock_lf_cfg_t const * p_clock_lf_cfg, nrf_fault_handler_t fault_handler)); + + +/**@brief Disables the SoftDevice and by extension the protocol stack. + * + * Idempotent function to disable the SoftDevice. + * + * @post SoC library and protocol stack APIs are made unavailable. + * @post All interrupts that was protected by the SoftDevice will be disabled and initialized to priority 0 (highest). + * @post All peripherals used by the SoftDevice will be reset to default values. + * @post All of RAM become available. + * @post All interrupts are forwarded to the application. + * @post LFCLK source chosen in ::sd_softdevice_enable will be left running. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_SOFTDEVICE_DISABLE, uint32_t, sd_softdevice_disable(void)); + +/**@brief Check if the SoftDevice is enabled. + * + * @param[out] p_softdevice_enabled If the SoftDevice is enabled: 1 else 0. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_SOFTDEVICE_IS_ENABLED, uint32_t, sd_softdevice_is_enabled(uint8_t * p_softdevice_enabled)); + +/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the SoftDevice + * + * This function is only intended to be called when a bootloader is enabled. + * + * @param[in] address The base address of the interrupt vector table for forwarded interrupts. + + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, uint32_t, sd_softdevice_vector_table_base_set(uint32_t address)); + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // NRF_SDM_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_soc.h new file mode 100644 index 00000000000..2c4d958750c --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_soc.h @@ -0,0 +1,964 @@ +/* + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @defgroup nrf_soc_api SoC Library API + * @{ + * + * @brief APIs for the SoC library. + * + */ + +#ifndef NRF_SOC_H__ +#define NRF_SOC_H__ + +#include +#include "nrf.h" +#include "nrf_svc.h" +#include "nrf_error.h" +#include "nrf_error_soc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@addtogroup NRF_SOC_DEFINES Defines + * @{ */ + +/**@brief The number of the lowest SVC number reserved for the SoC library. */ +#define SOC_SVC_BASE (0x20) /**< Base value for SVCs that are available when the SoftDevice is disabled. */ +#define SOC_SVC_BASE_NOT_AVAILABLE (0x2C) /**< Base value for SVCs that are not available when the SoftDevice is disabled. */ + +/**@brief Guaranteed time for application to process radio inactive notification. */ +#define NRF_RADIO_NOTIFICATION_INACTIVE_GUARANTEED_TIME_US (62) + +/**@brief The minimum allowed timeslot extension time. */ +#define NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US (200) + +/**@brief The maximum processing time to handle a timeslot extension. */ +#define NRF_RADIO_MAX_EXTENSION_PROCESSING_TIME_US (17) + +/**@brief The latest time before the end of a timeslot the timeslot can be extended. */ +#define NRF_RADIO_MIN_EXTENSION_MARGIN_US (79) + +#define SOC_ECB_KEY_LENGTH (16) /**< ECB key length. */ +#define SOC_ECB_CLEARTEXT_LENGTH (16) /**< ECB cleartext length. */ +#define SOC_ECB_CIPHERTEXT_LENGTH (SOC_ECB_CLEARTEXT_LENGTH) /**< ECB ciphertext length. */ + +#define SD_EVT_IRQn (SWI2_IRQn) /**< SoftDevice Event IRQ number. Used for both protocol events and SoC events. */ +#define SD_EVT_IRQHandler (SWI2_IRQHandler) /**< SoftDevice Event IRQ handler. Used for both protocol events and SoC events. + The default interrupt priority for this handler is set to 4 */ +#define RADIO_NOTIFICATION_IRQn (SWI1_IRQn) /**< The radio notification IRQ number. */ +#define RADIO_NOTIFICATION_IRQHandler (SWI1_IRQHandler) /**< The radio notification IRQ handler. + The default interrupt priority for this handler is set to 4 */ +#define NRF_RADIO_LENGTH_MIN_US (100) /**< The shortest allowed radio timeslot, in microseconds. */ +#define NRF_RADIO_LENGTH_MAX_US (100000) /**< The longest allowed radio timeslot, in microseconds. */ + +#define NRF_RADIO_DISTANCE_MAX_US (128000000UL - 1UL) /**< The longest timeslot distance, in microseconds, allowed for the distance parameter (see @ref nrf_radio_request_normal_t) in the request. */ + +#define NRF_RADIO_EARLIEST_TIMEOUT_MAX_US (128000000UL - 1UL) /**< The longest timeout, in microseconds, allowed when requesting the earliest possible timeslot. */ + +#define NRF_RADIO_START_JITTER_US (2) /**< The maximum jitter in @ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START relative to the requested start time. */ + +/**@} */ + +/**@addtogroup NRF_SOC_ENUMS Enumerations + * @{ */ + +/**@brief The SVC numbers used by the SVC functions in the SoC library. */ +enum NRF_SOC_SVCS +{ + SD_PPI_CHANNEL_ENABLE_GET = SOC_SVC_BASE, + SD_PPI_CHANNEL_ENABLE_SET = SOC_SVC_BASE + 1, + SD_PPI_CHANNEL_ENABLE_CLR = SOC_SVC_BASE + 2, + SD_PPI_CHANNEL_ASSIGN = SOC_SVC_BASE + 3, + SD_PPI_GROUP_TASK_ENABLE = SOC_SVC_BASE + 4, + SD_PPI_GROUP_TASK_DISABLE = SOC_SVC_BASE + 5, + SD_PPI_GROUP_ASSIGN = SOC_SVC_BASE + 6, + SD_PPI_GROUP_GET = SOC_SVC_BASE + 7, + SD_FLASH_PAGE_ERASE = SOC_SVC_BASE + 8, + SD_FLASH_WRITE = SOC_SVC_BASE + 9, + SD_FLASH_PROTECT = SOC_SVC_BASE + 10, + SD_PROTECTED_REGISTER_WRITE = SOC_SVC_BASE + 11, + SD_MUTEX_NEW = SOC_SVC_BASE_NOT_AVAILABLE, + SD_MUTEX_ACQUIRE = SOC_SVC_BASE_NOT_AVAILABLE + 1, + SD_MUTEX_RELEASE = SOC_SVC_BASE_NOT_AVAILABLE + 2, + SD_RAND_APPLICATION_POOL_CAPACITY_GET = SOC_SVC_BASE_NOT_AVAILABLE + 3, + SD_RAND_APPLICATION_BYTES_AVAILABLE_GET = SOC_SVC_BASE_NOT_AVAILABLE + 4, + SD_RAND_APPLICATION_VECTOR_GET = SOC_SVC_BASE_NOT_AVAILABLE + 5, + SD_POWER_MODE_SET = SOC_SVC_BASE_NOT_AVAILABLE + 6, + SD_POWER_SYSTEM_OFF = SOC_SVC_BASE_NOT_AVAILABLE + 7, + SD_POWER_RESET_REASON_GET = SOC_SVC_BASE_NOT_AVAILABLE + 8, + SD_POWER_RESET_REASON_CLR = SOC_SVC_BASE_NOT_AVAILABLE + 9, + SD_POWER_POF_ENABLE = SOC_SVC_BASE_NOT_AVAILABLE + 10, + SD_POWER_POF_THRESHOLD_SET = SOC_SVC_BASE_NOT_AVAILABLE + 11, + SD_POWER_RAM_POWER_SET = SOC_SVC_BASE_NOT_AVAILABLE + 13, + SD_POWER_RAM_POWER_CLR = SOC_SVC_BASE_NOT_AVAILABLE + 14, + SD_POWER_RAM_POWER_GET = SOC_SVC_BASE_NOT_AVAILABLE + 15, + SD_POWER_GPREGRET_SET = SOC_SVC_BASE_NOT_AVAILABLE + 16, + SD_POWER_GPREGRET_CLR = SOC_SVC_BASE_NOT_AVAILABLE + 17, + SD_POWER_GPREGRET_GET = SOC_SVC_BASE_NOT_AVAILABLE + 18, + SD_POWER_DCDC_MODE_SET = SOC_SVC_BASE_NOT_AVAILABLE + 19, + SD_APP_EVT_WAIT = SOC_SVC_BASE_NOT_AVAILABLE + 21, + SD_CLOCK_HFCLK_REQUEST = SOC_SVC_BASE_NOT_AVAILABLE + 22, + SD_CLOCK_HFCLK_RELEASE = SOC_SVC_BASE_NOT_AVAILABLE + 23, + SD_CLOCK_HFCLK_IS_RUNNING = SOC_SVC_BASE_NOT_AVAILABLE + 24, + SD_RADIO_NOTIFICATION_CFG_SET = SOC_SVC_BASE_NOT_AVAILABLE + 25, + SD_ECB_BLOCK_ENCRYPT = SOC_SVC_BASE_NOT_AVAILABLE + 26, + SD_ECB_BLOCKS_ENCRYPT = SOC_SVC_BASE_NOT_AVAILABLE + 27, + SD_RADIO_SESSION_OPEN = SOC_SVC_BASE_NOT_AVAILABLE + 28, + SD_RADIO_SESSION_CLOSE = SOC_SVC_BASE_NOT_AVAILABLE + 29, + SD_RADIO_REQUEST = SOC_SVC_BASE_NOT_AVAILABLE + 30, + SD_EVT_GET = SOC_SVC_BASE_NOT_AVAILABLE + 31, + SD_TEMP_GET = SOC_SVC_BASE_NOT_AVAILABLE + 32, + SVC_SOC_LAST = SOC_SVC_BASE_NOT_AVAILABLE + 37 +}; + +/**@brief Possible values of a ::nrf_mutex_t. */ +enum NRF_MUTEX_VALUES +{ + NRF_MUTEX_FREE, + NRF_MUTEX_TAKEN +}; + +/**@brief Power modes. */ +enum NRF_POWER_MODES +{ + NRF_POWER_MODE_CONSTLAT, /**< Constant latency mode. See power management in the reference manual. */ + NRF_POWER_MODE_LOWPWR /**< Low power mode. See power management in the reference manual. */ +}; + + +/**@brief Power failure thresholds */ +enum NRF_POWER_THRESHOLDS +{ + NRF_POWER_THRESHOLD_V17 = 4UL, /**< 1.7 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V18, /**< 1.8 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V19, /**< 1.9 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V20, /**< 2.0 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V21, /**< 2.1 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V22, /**< 2.2 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V23, /**< 2.3 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V24, /**< 2.4 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V25, /**< 2.5 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V26, /**< 2.6 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V27, /**< 2.7 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V28 /**< 2.8 Volts power failure threshold. */ +}; + + + +/**@brief DC/DC converter modes. */ +enum NRF_POWER_DCDC_MODES +{ + NRF_POWER_DCDC_DISABLE, /**< The DCDC is disabled. */ + NRF_POWER_DCDC_ENABLE /**< The DCDC is enabled. */ +}; + +/**@brief Radio notification distances. */ +enum NRF_RADIO_NOTIFICATION_DISTANCES +{ + NRF_RADIO_NOTIFICATION_DISTANCE_NONE = 0, /**< The event does not have a notification. */ + NRF_RADIO_NOTIFICATION_DISTANCE_800US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_1740US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_2680US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_3620US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_4560US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_5500US /**< The distance from the active notification to start of radio activity. */ +}; + + +/**@brief Radio notification types. */ +enum NRF_RADIO_NOTIFICATION_TYPES +{ + NRF_RADIO_NOTIFICATION_TYPE_NONE = 0, /**< The event does not have a radio notification signal. */ + NRF_RADIO_NOTIFICATION_TYPE_INT_ON_ACTIVE, /**< Using interrupt for notification when the radio will be enabled. */ + NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE, /**< Using interrupt for notification when the radio has been disabled. */ + NRF_RADIO_NOTIFICATION_TYPE_INT_ON_BOTH, /**< Using interrupt for notification both when the radio will be enabled and disabled. */ +}; + +/**@brief The Radio signal callback types. */ +enum NRF_RADIO_CALLBACK_SIGNAL_TYPE +{ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_START, /**< This signal indicates the start of the radio timeslot. */ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_TIMER0, /**< This signal indicates the NRF_TIMER0 interrupt. */ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_RADIO, /**< This signal indicates the NRF_RADIO interrupt. */ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_EXTEND_FAILED, /**< This signal indicates extend action failed. */ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_EXTEND_SUCCEEDED /**< This signal indicates extend action succeeded. */ +}; + +/**@brief The actions requested by the signal callback. + * + * This code gives the SOC instructions about what action to take when the signal callback has + * returned. + */ +enum NRF_RADIO_SIGNAL_CALLBACK_ACTION +{ + NRF_RADIO_SIGNAL_CALLBACK_ACTION_NONE, /**< Return without action. */ + NRF_RADIO_SIGNAL_CALLBACK_ACTION_EXTEND, /**< Request an extension of the current + timeslot. Maximum execution time for this action: + @ref NRF_RADIO_MAX_EXTENSION_PROCESSING_TIME_US. + This action must be started at least + @ref NRF_RADIO_MIN_EXTENSION_MARGIN_US before + the end of the timeslot. */ + NRF_RADIO_SIGNAL_CALLBACK_ACTION_END, /**< End the current radio timeslot. */ + NRF_RADIO_SIGNAL_CALLBACK_ACTION_REQUEST_AND_END /**< Request a new radio timeslot and end the current timeslot. */ +}; + +/**@brief Radio timeslot high frequency clock source configuration. */ +enum NRF_RADIO_HFCLK_CFG +{ + NRF_RADIO_HFCLK_CFG_XTAL_GUARANTEED, /**< The SoftDevice will guarantee that the high frequency clock source is the + external crystal for the whole duration of the timeslot. This should be the + preferred option for events that use the radio or require high timing accuracy. + @note The SoftDevice will automatically turn on and off the external crystal, + at the beginning and end of the timeslot, respectively. The crystal may also + intentionally be left running after the timeslot, in cases where it is needed + by the SoftDevice shortly after the end of the timeslot. */ + NRF_RADIO_HFCLK_CFG_NO_GUARANTEE /**< This configuration allows for earlier and tighter scheduling of timeslots. + The RC oscillator may be the clock source in part or for the whole duration of the timeslot. + The RC oscillator's accuracy must therefore be taken into consideration. + @note If the application will use the radio peripheral in timeslots with this configuration, + it must make sure that the crystal is running and stable before starting the radio. */ +}; + +/**@brief Radio timeslot priorities. */ +enum NRF_RADIO_PRIORITY +{ + NRF_RADIO_PRIORITY_HIGH, /**< High (equal priority as the normal connection priority of the SoftDevice stack(s)). */ + NRF_RADIO_PRIORITY_NORMAL, /**< Normal (equal priority as the priority of secondary activities of the SoftDevice stack(s)). */ +}; + +/**@brief Radio timeslot request type. */ +enum NRF_RADIO_REQUEST_TYPE +{ + NRF_RADIO_REQ_TYPE_EARLIEST, /**< Request radio timeslot as early as possible. This should always be used for the first request in a session. */ + NRF_RADIO_REQ_TYPE_NORMAL /**< Normal radio timeslot request. */ +}; + +/**@brief SoC Events. */ +enum NRF_SOC_EVTS +{ + NRF_EVT_HFCLKSTARTED, /**< Event indicating that the HFCLK has started. */ + NRF_EVT_POWER_FAILURE_WARNING, /**< Event indicating that a power failure warning has occurred. */ + NRF_EVT_FLASH_OPERATION_SUCCESS, /**< Event indicating that the ongoing flash operation has completed successfully. */ + NRF_EVT_FLASH_OPERATION_ERROR, /**< Event indicating that the ongoing flash operation has timed out with an error. */ + NRF_EVT_RADIO_BLOCKED, /**< Event indicating that a radio timeslot was blocked. */ + NRF_EVT_RADIO_CANCELED, /**< Event indicating that a radio timeslot was canceled by SoftDevice. */ + NRF_EVT_RADIO_SIGNAL_CALLBACK_INVALID_RETURN, /**< Event indicating that a radio timeslot signal callback handler return was invalid. */ + NRF_EVT_RADIO_SESSION_IDLE, /**< Event indicating that a radio timeslot session is idle. */ + NRF_EVT_RADIO_SESSION_CLOSED, /**< Event indicating that a radio timeslot session is closed. */ + NRF_EVT_NUMBER_OF_EVTS +}; + +/**@} */ + + +/**@addtogroup NRF_SOC_STRUCTURES Structures + * @{ */ + +/**@brief Represents a mutex for use with the nrf_mutex functions. + * @note Accessing the value directly is not safe, use the mutex functions! + */ +typedef volatile uint8_t nrf_mutex_t; + +/**@brief Parameters for a request for a timeslot as early as possible. */ +typedef struct +{ + uint8_t hfclk; /**< High frequency clock source, see @ref NRF_RADIO_HFCLK_CFG. */ + uint8_t priority; /**< The radio timeslot priority, see @ref NRF_RADIO_PRIORITY. */ + uint32_t length_us; /**< The radio timeslot length (in the range 100 to 100,000] microseconds). */ + uint32_t timeout_us; /**< Longest acceptable delay until the start of the requested timeslot (up to @ref NRF_RADIO_EARLIEST_TIMEOUT_MAX_US microseconds). */ +} nrf_radio_request_earliest_t; + +/**@brief Parameters for a normal radio timeslot request. */ +typedef struct +{ + uint8_t hfclk; /**< High frequency clock source, see @ref NRF_RADIO_HFCLK_CFG. */ + uint8_t priority; /**< The radio timeslot priority, see @ref NRF_RADIO_PRIORITY. */ + uint32_t distance_us; /**< Distance from the start of the previous radio timeslot (up to @ref NRF_RADIO_DISTANCE_MAX_US microseconds). */ + uint32_t length_us; /**< The radio timeslot length (in the range [100..100,000] microseconds). */ +} nrf_radio_request_normal_t; + +/**@brief Radio timeslot request parameters. */ +typedef struct +{ + uint8_t request_type; /**< Type of request, see @ref NRF_RADIO_REQUEST_TYPE. */ + union + { + nrf_radio_request_earliest_t earliest; /**< Parameters for requesting a radio timeslot as early as possible. */ + nrf_radio_request_normal_t normal; /**< Parameters for requesting a normal radio timeslot. */ + } params; /**< Parameter union. */ +} nrf_radio_request_t; + +/**@brief Return parameters of the radio timeslot signal callback. */ +typedef struct +{ + uint8_t callback_action; /**< The action requested by the application when returning from the signal callback, see @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION. */ + union + { + struct + { + nrf_radio_request_t * p_next; /**< The request parameters for the next radio timeslot. */ + } request; /**< Additional parameters for return_code @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION_REQUEST_AND_END. */ + struct + { + uint32_t length_us; /**< Requested extension of the radio timeslot duration (microseconds) (for minimum time see @ref NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US). */ + } extend; /**< Additional parameters for return_code @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION_EXTEND. */ + } params; /**< Parameter union. */ +} nrf_radio_signal_callback_return_param_t; + +/**@brief The radio timeslot signal callback type. + * + * @note In case of invalid return parameters, the radio timeslot will automatically end + * immediately after returning from the signal callback and the + * @ref NRF_EVT_RADIO_SIGNAL_CALLBACK_INVALID_RETURN event will be sent. + * @note The returned struct pointer must remain valid after the signal callback + * function returns. For instance, this means that it must not point to a stack variable. + * + * @param[in] signal_type Type of signal, see @ref NRF_RADIO_CALLBACK_SIGNAL_TYPE. + * + * @return Pointer to structure containing action requested by the application. + */ +typedef nrf_radio_signal_callback_return_param_t * (*nrf_radio_signal_callback_t) (uint8_t signal_type); + +/**@brief AES ECB parameter typedefs */ +typedef uint8_t soc_ecb_key_t[SOC_ECB_KEY_LENGTH]; /**< Encryption key type. */ +typedef uint8_t soc_ecb_cleartext_t[SOC_ECB_CLEARTEXT_LENGTH]; /**< Cleartext data type. */ +typedef uint8_t soc_ecb_ciphertext_t[SOC_ECB_CIPHERTEXT_LENGTH]; /**< Ciphertext data type. */ + +/**@brief AES ECB data structure */ +typedef struct +{ + soc_ecb_key_t key; /**< Encryption key. */ + soc_ecb_cleartext_t cleartext; /**< Cleartext data. */ + soc_ecb_ciphertext_t ciphertext; /**< Ciphertext data. */ +} nrf_ecb_hal_data_t; + +/**@brief AES ECB block. Used to provide multiple blocks in a single call + to @ref sd_ecb_blocks_encrypt.*/ +typedef struct +{ + soc_ecb_key_t const * p_key; /**< Pointer to the Encryption key. */ + soc_ecb_cleartext_t const * p_cleartext; /**< Pointer to the Cleartext data. */ + soc_ecb_ciphertext_t * p_ciphertext; /**< Pointer to the Ciphertext data. */ +} nrf_ecb_hal_data_block_t; + +/**@} */ + +/**@addtogroup NRF_SOC_FUNCTIONS Functions + * @{ */ + +/**@brief Initialize a mutex. + * + * @param[in] p_mutex Pointer to the mutex to initialize. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_MUTEX_NEW, uint32_t, sd_mutex_new(nrf_mutex_t * p_mutex)); + +/**@brief Attempt to acquire a mutex. + * + * @param[in] p_mutex Pointer to the mutex to acquire. + * + * @retval ::NRF_SUCCESS The mutex was successfully acquired. + * @retval ::NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN The mutex could not be acquired. + */ +SVCALL(SD_MUTEX_ACQUIRE, uint32_t, sd_mutex_acquire(nrf_mutex_t * p_mutex)); + +/**@brief Release a mutex. + * + * @param[in] p_mutex Pointer to the mutex to release. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_MUTEX_RELEASE, uint32_t, sd_mutex_release(nrf_mutex_t * p_mutex)); + +/**@brief Query the capacity of the application random pool. + * + * @param[out] p_pool_capacity The capacity of the pool. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_RAND_APPLICATION_POOL_CAPACITY_GET, uint32_t, sd_rand_application_pool_capacity_get(uint8_t * p_pool_capacity)); + +/**@brief Get number of random bytes available to the application. + * + * @param[out] p_bytes_available The number of bytes currently available in the pool. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_RAND_APPLICATION_BYTES_AVAILABLE_GET, uint32_t, sd_rand_application_bytes_available_get(uint8_t * p_bytes_available)); + +/**@brief Get random bytes from the application pool. + * + * @param[out] p_buff Pointer to unit8_t buffer for storing the bytes. + * @param[in] length Number of bytes to take from pool and place in p_buff. + * + * @retval ::NRF_SUCCESS The requested bytes were written to p_buff. + * @retval ::NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES No bytes were written to the buffer, because there were not enough bytes available. +*/ +SVCALL(SD_RAND_APPLICATION_VECTOR_GET, uint32_t, sd_rand_application_vector_get(uint8_t * p_buff, uint8_t length)); + +/**@brief Gets the reset reason register. + * + * @param[out] p_reset_reason Contents of the NRF_POWER->RESETREAS register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RESET_REASON_GET, uint32_t, sd_power_reset_reason_get(uint32_t * p_reset_reason)); + +/**@brief Clears the bits of the reset reason register. + * + * @param[in] reset_reason_clr_msk Contains the bits to clear from the reset reason register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RESET_REASON_CLR, uint32_t, sd_power_reset_reason_clr(uint32_t reset_reason_clr_msk)); + +/**@brief Sets the power mode when in CPU sleep. + * + * @param[in] power_mode The power mode to use when in CPU sleep, see @ref NRF_POWER_MODES. @sa sd_app_evt_wait + * + * @retval ::NRF_SUCCESS The power mode was set. + * @retval ::NRF_ERROR_SOC_POWER_MODE_UNKNOWN The power mode was unknown. + */ +SVCALL(SD_POWER_MODE_SET, uint32_t, sd_power_mode_set(uint8_t power_mode)); + +/**@brief Puts the chip in System OFF mode. + * + * @retval ::NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN + */ +SVCALL(SD_POWER_SYSTEM_OFF, uint32_t, sd_power_system_off(void)); + +/**@brief Enables or disables the power-fail comparator. + * + * Enabling this will give a SoftDevice event (NRF_EVT_POWER_FAILURE_WARNING) when the power failure warning occurs. + * The event can be retrieved with sd_evt_get(); + * + * @param[in] pof_enable True if the power-fail comparator should be enabled, false if it should be disabled. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_POF_ENABLE, uint32_t, sd_power_pof_enable(uint8_t pof_enable)); + + +/**@brief Sets the power failure comparator threshold value. + * + * + * @param[in] threshold The power-fail threshold value to use, see @ref NRF_POWER_THRESHOLDS. + * + * @retval ::NRF_SUCCESS The power failure threshold was set. + * @retval ::NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN The power failure threshold is unknown. + */ +SVCALL(SD_POWER_POF_THRESHOLD_SET, uint32_t, sd_power_pof_threshold_set(uint8_t threshold)); + + +/**@brief Writes the NRF_POWER->RAM[index].POWERSET register. + * + * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWERSET register to write to. + * @param[in] ram_powerset Contains the word to write to the NRF_POWER->RAM[index].POWERSET register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RAM_POWER_SET, uint32_t, sd_power_ram_power_set(uint8_t index, uint32_t ram_powerset)); + +/**@brief Writes the NRF_POWER->RAM[index].POWERCLR register. + * + * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWERCLR register to write to. + * @param[in] ram_powerclr Contains the word to write to the NRF_POWER->RAM[index].POWERCLR register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RAM_POWER_CLR, uint32_t, sd_power_ram_power_clr(uint8_t index, uint32_t ram_powerclr)); + +/**@brief Get contents of NRF_POWER->RAM[index].POWER register, indicates power status of RAM[index] blocks. + * + * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWER register to read from. + * @param[out] p_ram_power Content of NRF_POWER->RAM[index].POWER register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RAM_POWER_GET, uint32_t, sd_power_ram_power_get(uint8_t index, uint32_t * p_ram_power)); + +/**@brief Set bits in the general purpose retention registers (NRF_POWER->GPREGRET*). + * + * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. + * @param[in] gpregret_msk Bits to be set in the GPREGRET register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_GPREGRET_SET, uint32_t, sd_power_gpregret_set(uint32_t gpregret_id, uint32_t gpregret_msk)); + +/**@brief Clear bits in the general purpose retention registers (NRF_POWER->GPREGRET*). + * + * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. + * @param[in] gpregret_msk Bits to be clear in the GPREGRET register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_GPREGRET_CLR, uint32_t, sd_power_gpregret_clr(uint32_t gpregret_id, uint32_t gpregret_msk)); + +/**@brief Get contents of the general purpose retention registers (NRF_POWER->GPREGRET*). + * + * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. + * @param[out] p_gpregret Contents of the GPREGRET register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_GPREGRET_GET, uint32_t, sd_power_gpregret_get(uint32_t gpregret_id, uint32_t *p_gpregret)); + +/**@brief Enable or disable the DC/DC regulator. + * + * @param[in] dcdc_mode The mode of the DCDC, see @ref NRF_POWER_DCDC_MODES. + * + * @retval ::NRF_SUCCESS + * @retval ::NRF_ERROR_INVALID_PARAM The DCDC mode is invalid. + */ +SVCALL(SD_POWER_DCDC_MODE_SET, uint32_t, sd_power_dcdc_mode_set(uint8_t dcdc_mode)); + + +/**@brief Request the high frequency crystal oscillator. + * + * Will start the high frequency crystal oscillator, the startup time of the crystal varies + * and the ::sd_clock_hfclk_is_running function can be polled to check if it has started. + * + * @see sd_clock_hfclk_is_running + * @see sd_clock_hfclk_release + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_CLOCK_HFCLK_REQUEST, uint32_t, sd_clock_hfclk_request(void)); + +/**@brief Releases the high frequency crystal oscillator. + * + * Will stop the high frequency crystal oscillator, this happens immediately. + * + * @see sd_clock_hfclk_is_running + * @see sd_clock_hfclk_request + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_CLOCK_HFCLK_RELEASE, uint32_t, sd_clock_hfclk_release(void)); + +/**@brief Checks if the high frequency crystal oscillator is running. + * + * @see sd_clock_hfclk_request + * @see sd_clock_hfclk_release + * + * @param[out] p_is_running 1 if the external crystal oscillator is running, 0 if not. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_CLOCK_HFCLK_IS_RUNNING, uint32_t, sd_clock_hfclk_is_running(uint32_t * p_is_running)); + +/**@brief Waits for an application event. + * + * An application event is either an application interrupt or a pended interrupt when the interrupt + * is disabled. + * + * When the application waits for an application event by calling this function, an interrupt that + * is enabled will be taken immediately on pending since this function will wait in thread mode, + * then the execution will return in the application's main thread. + * + * In order to wake up from disabled interrupts, the SEVONPEND flag has to be set in the Cortex-M + * MCU's System Control Register (SCR), CMSIS_SCB. In that case, when a disabled interrupt gets + * pended, this function will return to the application's main thread. + * + * @note The application must ensure that the pended flag is cleared using ::sd_nvic_ClearPendingIRQ + * in order to sleep using this function. This is only necessary for disabled interrupts, as + * the interrupt handler will clear the pending flag automatically for enabled interrupts. + * + * @note If an application interrupt has happened since the last time sd_app_evt_wait was + * called this function will return immediately and not go to sleep. This is to avoid race + * conditions that can occur when a flag is updated in the interrupt handler and processed + * in the main loop. + * + * @post An application interrupt has happened or a interrupt pending flag is set. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_APP_EVT_WAIT, uint32_t, sd_app_evt_wait(void)); + +/**@brief Get PPI channel enable register contents. + * + * @param[out] p_channel_enable The contents of the PPI CHEN register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_CHANNEL_ENABLE_GET, uint32_t, sd_ppi_channel_enable_get(uint32_t * p_channel_enable)); + +/**@brief Set PPI channel enable register. + * + * @param[in] channel_enable_set_msk Mask containing the bits to set in the PPI CHEN register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_CHANNEL_ENABLE_SET, uint32_t, sd_ppi_channel_enable_set(uint32_t channel_enable_set_msk)); + +/**@brief Clear PPI channel enable register. + * + * @param[in] channel_enable_clr_msk Mask containing the bits to clear in the PPI CHEN register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_CHANNEL_ENABLE_CLR, uint32_t, sd_ppi_channel_enable_clr(uint32_t channel_enable_clr_msk)); + +/**@brief Assign endpoints to a PPI channel. + * + * @param[in] channel_num Number of the PPI channel to assign. + * @param[in] evt_endpoint Event endpoint of the PPI channel. + * @param[in] task_endpoint Task endpoint of the PPI channel. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_CHANNEL The channel number is invalid. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_CHANNEL_ASSIGN, uint32_t, sd_ppi_channel_assign(uint8_t channel_num, const volatile void * evt_endpoint, const volatile void * task_endpoint)); + +/**@brief Task to enable a channel group. + * + * @param[in] group_num Number of the channel group. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_GROUP_TASK_ENABLE, uint32_t, sd_ppi_group_task_enable(uint8_t group_num)); + +/**@brief Task to disable a channel group. + * + * @param[in] group_num Number of the PPI group. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_GROUP_TASK_DISABLE, uint32_t, sd_ppi_group_task_disable(uint8_t group_num)); + +/**@brief Assign PPI channels to a channel group. + * + * @param[in] group_num Number of the channel group. + * @param[in] channel_msk Mask of the channels to assign to the group. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_GROUP_ASSIGN, uint32_t, sd_ppi_group_assign(uint8_t group_num, uint32_t channel_msk)); + +/**@brief Gets the PPI channels of a channel group. + * + * @param[in] group_num Number of the channel group. + * @param[out] p_channel_msk Mask of the channels assigned to the group. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_GROUP_GET, uint32_t, sd_ppi_group_get(uint8_t group_num, uint32_t * p_channel_msk)); + +/**@brief Configures the Radio Notification signal. + * + * @note + * - The notification signal latency depends on the interrupt priority settings of SWI used + * for notification signal. + * - To ensure that the radio notification signal behaves in a consistent way, the radio + * notifications must be configured when there is no protocol stack or other SoftDevice + * activity in progress. It is recommended that the radio notification signal is + * configured directly after the SoftDevice has been enabled. + * - In the period between the ACTIVE signal and the start of the Radio Event, the SoftDevice + * will interrupt the application to do Radio Event preparation. + * - Using the Radio Notification feature may limit the bandwidth, as the SoftDevice may have + * to shorten the connection events to have time for the Radio Notification signals. + * + * @param[in] type Type of notification signal, see @ref NRF_RADIO_NOTIFICATION_TYPES. + * @ref NRF_RADIO_NOTIFICATION_TYPE_NONE shall be used to turn off radio + * notification. Using @ref NRF_RADIO_NOTIFICATION_DISTANCE_NONE is + * recommended (but not required) to be used with + * @ref NRF_RADIO_NOTIFICATION_TYPE_NONE. + * + * @param[in] distance Distance between the notification signal and start of radio activity, see @ref NRF_RADIO_NOTIFICATION_DISTANCES. + * This parameter is ignored when @ref NRF_RADIO_NOTIFICATION_TYPE_NONE or + * @ref NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE is used. + * + * @retval ::NRF_ERROR_INVALID_PARAM The group number is invalid. + * @retval ::NRF_ERROR_INVALID_STATE A protocol stack or other SoftDevice is running. Stop all + * running activities and retry. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_RADIO_NOTIFICATION_CFG_SET, uint32_t, sd_radio_notification_cfg_set(uint8_t type, uint8_t distance)); + +/**@brief Encrypts a block according to the specified parameters. + * + * 128-bit AES encryption. + * + * @note: + * - The application may set the SEVONPEND bit in the SCR to 1 to make the SoftDevice sleep while + * the ECB is running. The SEVONPEND bit should only be cleared (set to 0) from application + * main or low interrupt level. + * + * @param[in, out] p_ecb_data Pointer to the ECB parameters' struct (two input + * parameters and one output parameter). + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_ECB_BLOCK_ENCRYPT, uint32_t, sd_ecb_block_encrypt(nrf_ecb_hal_data_t * p_ecb_data)); + +/**@brief Encrypts multiple data blocks provided as an array of data block structures. + * + * @details: Performs 128-bit AES encryption on multiple data blocks + * + * @note: + * - The application may set the SEVONPEND bit in the SCR to 1 to make the SoftDevice sleep while + * the ECB is running. The SEVONPEND bit should only be cleared (set to 0) from application + * main or low interrupt level. + * + * @param[in] block_count Count of blocks in the p_data_blocks array. + * @param[in,out] p_data_blocks Pointer to the first entry in a contiguous array of + * @ref nrf_ecb_hal_data_block_t structures. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_ECB_BLOCKS_ENCRYPT, uint32_t, sd_ecb_blocks_encrypt(uint8_t block_count, nrf_ecb_hal_data_block_t * p_data_blocks)); + +/**@brief Gets any pending events generated by the SoC API. + * + * The application should keep calling this function to get events, until ::NRF_ERROR_NOT_FOUND is returned. + * + * @param[out] p_evt_id Set to one of the values in @ref NRF_SOC_EVTS, if any events are pending. + * + * @retval ::NRF_SUCCESS An event was pending. The event id is written in the p_evt_id parameter. + * @retval ::NRF_ERROR_NOT_FOUND No pending events. + */ +SVCALL(SD_EVT_GET, uint32_t, sd_evt_get(uint32_t * p_evt_id)); + +/**@brief Get the temperature measured on the chip + * + * This function will block until the temperature measurement is done. + * It takes around 50 us from call to return. + * + * @param[out] p_temp Result of temperature measurement. Die temperature in 0.25 degrees Celsius. + * + * @retval ::NRF_SUCCESS A temperature measurement was done, and the temperature was written to temp + */ +SVCALL(SD_TEMP_GET, uint32_t, sd_temp_get(int32_t * p_temp)); + +/**@brief Flash Write +* +* Commands to write a buffer to flash +* +* If the SoftDevice is enabled: +* This call initiates the flash access command, and its completion will be communicated to the +* application with exactly one of the following events: +* - @ref NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed. +* - @ref NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started. +* +* If the SoftDevice is not enabled no event will be generated, and this call will return @ref NRF_SUCCESS when the + * write has been completed +* +* @note +* - This call takes control over the radio and the CPU during flash erase and write to make sure that +* they will not interfere with the flash access. This means that all interrupts will be blocked +* for a predictable time (depending on the NVMC specification in the device's Product Specification +* and the command parameters). +* - The data in the p_src buffer should not be modified before the @ref NRF_EVT_FLASH_OPERATION_SUCCESS +* or the @ref NRF_EVT_FLASH_OPERATION_ERROR have been received if the SoftDevice is enabled. +* - This call will make the SoftDevice trigger a hardfault when the page is written, if it is +* protected. +* +* +* @param[in] p_dst Pointer to start of flash location to be written. +* @param[in] p_src Pointer to buffer with data to be written. +* @param[in] size Number of 32-bit words to write. Maximum size is the number of words in one +* flash page. See the device's Product Specification for details. +* +* @retval ::NRF_ERROR_INVALID_ADDR Tried to write to a non existing flash address, or p_dst or p_src was unaligned. +* @retval ::NRF_ERROR_BUSY The previous command has not yet completed. +* @retval ::NRF_ERROR_INVALID_LENGTH Size was 0, or higher than the maximum allowed size. +* @retval ::NRF_ERROR_FORBIDDEN Tried to write to an address outside the application flash area. +* @retval ::NRF_SUCCESS The command was accepted. +*/ +SVCALL(SD_FLASH_WRITE, uint32_t, sd_flash_write(uint32_t * p_dst, uint32_t const * p_src, uint32_t size)); + + +/**@brief Flash Erase page +* +* Commands to erase a flash page +* If the SoftDevice is enabled: +* This call initiates the flash access command, and its completion will be communicated to the +* application with exactly one of the following events: +* - @ref NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed. +* - @ref NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started. +* +* If the SoftDevice is not enabled no event will be generated, and this call will return @ref NRF_SUCCESS when the +* erase has been completed +* +* @note +* - This call takes control over the radio and the CPU during flash erase and write to make sure that +* they will not interfere with the flash access. This means that all interrupts will be blocked +* for a predictable time (depending on the NVMC specification in the device's Product Specification +* and the command parameters). +* - This call will make the SoftDevice trigger a hardfault when the page is erased, if it is +* protected. +* +* +* @param[in] page_number Page number of the page to erase +* +* @retval ::NRF_ERROR_INTERNAL If a new session could not be opened due to an internal error. +* @retval ::NRF_ERROR_INVALID_ADDR Tried to erase to a non existing flash page. +* @retval ::NRF_ERROR_BUSY The previous command has not yet completed. +* @retval ::NRF_ERROR_FORBIDDEN Tried to erase a page outside the application flash area. +* @retval ::NRF_SUCCESS The command was accepted. +*/ +SVCALL(SD_FLASH_PAGE_ERASE, uint32_t, sd_flash_page_erase(uint32_t page_number)); + + +/**@brief Flash Protection set + * + * Commands to set the flash protection configuration registers. + This sets the CONFIGx registers of the BPROT peripheral. + * + * @note Not all parameters are valid for all products. Some bits in each parameter may not be + * valid for your product. Please refer your Product Specification for more details. + * + * @note To read the values read them directly. They are only write-protected. + * + * @note It is possible to use @ref sd_protected_register_write instead of this function. + * + * @param[in] block_cfg0 Value to be written to the configuration register. + * @param[in] block_cfg1 Value to be written to the configuration register. + * @param[in] block_cfg2 Value to be written to the configuration register. + * @param[in] block_cfg3 Value to be written to the configuration register. + * + * @retval ::NRF_ERROR_NOT_SUPPORTED Non-zero value supplied to one or more of the unsupported parameters. + * @retval ::NRF_SUCCESS Values successfully written to configuration registers. + */ +SVCALL(SD_FLASH_PROTECT, uint32_t, sd_flash_protect(uint32_t block_cfg0, uint32_t block_cfg1, uint32_t block_cfg2, uint32_t block_cfg3)); + +/**@brief Opens a session for radio timeslot requests. + * + * @note Only one session can be open at a time. + * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START) will be called when the radio timeslot + * starts. From this point the NRF_RADIO and NRF_TIMER0 peripherals can be freely accessed + * by the application. + * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_TIMER0) is called whenever the NRF_TIMER0 + * interrupt occurs. + * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_RADIO) is called whenever the NRF_RADIO + * interrupt occurs. + * @note p_radio_signal_callback() will be called at ARM interrupt priority level 0. This + * implies that none of the sd_* API calls can be used from p_radio_signal_callback(). + * + * @param[in] p_radio_signal_callback The signal callback. + * + * @retval ::NRF_ERROR_INVALID_ADDR p_radio_signal_callback is an invalid function pointer. + * @retval ::NRF_ERROR_BUSY If session cannot be opened. + * @retval ::NRF_ERROR_INTERNAL If a new session could not be opened due to an internal error. + * @retval ::NRF_SUCCESS Otherwise. + */ + SVCALL(SD_RADIO_SESSION_OPEN, uint32_t, sd_radio_session_open(nrf_radio_signal_callback_t p_radio_signal_callback)); + +/**@brief Closes a session for radio timeslot requests. + * + * @note Any current radio timeslot will be finished before the session is closed. + * @note If a radio timeslot is scheduled when the session is closed, it will be canceled. + * @note The application cannot consider the session closed until the @ref NRF_EVT_RADIO_SESSION_CLOSED + * event is received. + * + * @retval ::NRF_ERROR_FORBIDDEN If session not opened. + * @retval ::NRF_ERROR_BUSY If session is currently being closed. + * @retval ::NRF_SUCCESS Otherwise. + */ + SVCALL(SD_RADIO_SESSION_CLOSE, uint32_t, sd_radio_session_close(void)); + +/**@brief Requests a radio timeslot. + * + * @note The request type is determined by p_request->request_type, and can be one of @ref NRF_RADIO_REQ_TYPE_EARLIEST + * and @ref NRF_RADIO_REQ_TYPE_NORMAL. The first request in a session must always be of type @ref NRF_RADIO_REQ_TYPE_EARLIEST. + * @note For a normal request (@ref NRF_RADIO_REQ_TYPE_NORMAL), the start time of a radio timeslot is specified by + * p_request->distance_us and is given relative to the start of the previous timeslot. + * @note A too small p_request->distance_us will lead to a @ref NRF_EVT_RADIO_BLOCKED event. + * @note Timeslots scheduled too close will lead to a @ref NRF_EVT_RADIO_BLOCKED event. + * @note See the SoftDevice Specification for more on radio timeslot scheduling, distances and lengths. + * @note If an opportunity for the first radio timeslot is not found before 100 ms after the call to this + * function, it is not scheduled, and instead a @ref NRF_EVT_RADIO_BLOCKED event is sent. + * The application may then try to schedule the first radio timeslot again. + * @note Successful requests will result in nrf_radio_signal_callback_t(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START). + * Unsuccessful requests will result in a @ref NRF_EVT_RADIO_BLOCKED event, see @ref NRF_SOC_EVTS. + * @note The jitter in the start time of the radio timeslots is +/- @ref NRF_RADIO_START_JITTER_US us. + * @note The nrf_radio_signal_callback_t(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START) call has a latency relative to the + * specified radio timeslot start, but this does not affect the actual start time of the timeslot. + * @note NRF_TIMER0 is reset at the start of the radio timeslot, and is clocked at 1MHz from the high frequency + * (16 MHz) clock source. If p_request->hfclk_force_xtal is true, the high frequency clock is + * guaranteed to be clocked from the external crystal. + * @note The SoftDevice will neither access the NRF_RADIO peripheral nor the NRF_TIMER0 peripheral + * during the radio timeslot. + * + * @param[in] p_request Pointer to the request parameters. + * + * @retval ::NRF_ERROR_FORBIDDEN If session not opened or the session is not IDLE. + * @retval ::NRF_ERROR_INVALID_ADDR If the p_request pointer is invalid. + * @retval ::NRF_ERROR_INVALID_PARAM If the parameters of p_request are not valid. + * @retval ::NRF_SUCCESS Otherwise. + */ + SVCALL(SD_RADIO_REQUEST, uint32_t, sd_radio_request(nrf_radio_request_t const * p_request)); + +/**@brief Write register protected by the SoftDevice + * + * This function writes to a register that is write-protected by the SoftDevice. Please refer to your + * SoftDevice Specification for more details about which registers that are protected by SoftDevice. + * This function can write to the following protected peripheral: + * - BPROT + * + * @note Protected registers may be read directly. + * @note Register that are write-once will return @ref NRF_SUCCESS on second set, even the value in + * the register has not changed. See the Product Specification for more details about register + * properties. + * + * @param[in] p_register Pointer to register to be written. + * @param[in] value Value to be written to the register. + * + * @retval ::NRF_ERROR_INVALID_ADDR This function can not write to the reguested register. + * @retval ::NRF_SUCCESS Value successfully written to register. + * + */ +SVCALL(SD_PROTECTED_REGISTER_WRITE, uint32_t, sd_protected_register_write(volatile uint32_t * p_register, uint32_t value)); + +/**@} */ + +#ifdef __cplusplus +} +#endif +#endif // NRF_SOC_H__ + +/**@} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_svc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_svc.h new file mode 100644 index 00000000000..292c6929828 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_svc.h @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef NRF_SVC__ +#define NRF_SVC__ + +#include "stdint.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef SVCALL_AS_NORMAL_FUNCTION +#define SVCALL(number, return_type, signature) return_type signature +#else + +#ifndef SVCALL +#if defined (__CC_ARM) +#define SVCALL(number, return_type, signature) return_type __svc(number) signature +#elif defined (__GNUC__) +#ifdef __cplusplus +#define GCC_CAST_CPP (uint16_t) +#else +#define GCC_CAST_CPP +#endif +#define SVCALL(number, return_type, signature) \ + _Pragma("GCC diagnostic push") \ + _Pragma("GCC diagnostic ignored \"-Wreturn-type\"") \ + __attribute__((naked)) \ + __attribute__((unused)) \ + static return_type signature \ + { \ + __asm( \ + "svc %0\n" \ + "bx r14" : : "I" (GCC_CAST_CPP number) : "r0" \ + ); \ + } \ + _Pragma("GCC diagnostic pop") + +#elif defined (__ICCARM__) +#define PRAGMA(x) _Pragma(#x) +#define SVCALL(number, return_type, signature) \ +PRAGMA(swi_number = (number)) \ + __swi return_type signature; +#else +#define SVCALL(number, return_type, signature) return_type signature +#endif +#endif // SVCALL + +#endif // SVCALL_AS_NORMAL_FUNCTION + +#ifdef __cplusplus +} +#endif +#endif // NRF_SVC__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/hex/s132_nrf52_6.0.0_licence-agreement.txt b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/hex/s132_nrf52_6.0.0_licence-agreement.txt new file mode 100644 index 00000000000..a71adee7b9b --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/hex/s132_nrf52_6.0.0_licence-agreement.txt @@ -0,0 +1,35 @@ +Copyright (c) 2007 - 2018, Nordic Semiconductor ASA +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/hex/s132_nrf52_6.0.0_softdevice.hex b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/hex/s132_nrf52_6.0.0_softdevice.hex new file mode 100644 index 00000000000..f30de085008 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/hex/s132_nrf52_6.0.0_softdevice.hex @@ -0,0 +1,9278 @@ +:020000040000FA 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+:104950009F330200CD33020003340200B52E020063 +:1049600023340200313402003F3402004F3402008D +:10497000673402007F34020095340200B52E020035 +:104980000000000077B90000CDB90000E3B90000D5 +:10499000813C0200E12E0200A72F02000B40020022 +:1049A000434002006D400200493B0100C93E010046 +:1049B000B52E0200B52E0200B52E0200B52E020063 +:1049C0001C0500402005004000100200EC490200D8 +:1049D00008000020D001000044110000244A020019 +:1049E000D801002008110000A0110000011813C810 +:1049F000140250201A0102227C2720FB349B5F8086 +:104A00001280021A10138B091B2048041ACE0401CD +:104A1000200B50A40AAC01300912CB637F010B6854 +:044A2000CC10A00016 +:00000001FF diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json new file mode 100644 index 00000000000..23292cb7432 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json @@ -0,0 +1,42 @@ +{ + "name": "softdevice", + "macros": [ + "SOFTDEVICE_PRESENT=1", + "S132", + "BLE_STACK_SUPPORT_REQD", + "NRF_SDH_CLOCK_LF_SRC=1", + "NRF_SDH_CLOCK_LF_RC_CTIV=0", + "NRF_SDH_CLOCK_LF_RC_TEMP_CTIV=0", + "NRF_SDH_CLOCK_LF_XTAL_ACCURACY=7", + "NRF_SD_BLE_API_VERSION=5", + "NRF_SDH_ENABLED=1", + "NRF_SDH_BLE_ENABLED=1", + "PEER_MANAGER_ENABLED=1", + "NRF_SDH_BLE_GATT_MAX_MTU_SIZE=23", + "NRF_SDH_BLE_OBSERVER_PRIO_LEVELS=4", + "NRF_SDH_BLE_GAP_EVENT_LENGTH=3", + "BLE_ADV_BLE_OBSERVER_PRIO=1", + "BLE_CONN_STATE_BLE_OBSERVER_PRIO=0", + "BLE_CONN_PARAMS_BLE_OBSERVER_PRIO=1", + "NRF_BLE_GATT_BLE_OBSERVER_PRIO=1", + "NRF_SDH_DISPATCH_MODEL=2", + "NRF_SDH_SOC_ENABLED=1", + "NRF_SDH_STACK_OBSERVER_PRIO_LEVELS=2", + "NRF_SDH_STATE_OBSERVER_PRIO_LEVELS=2", + "NRF_SDH_SOC_OBSERVER_PRIO_LEVELS=2", + "NRF_SDH_REQ_OBSERVER_PRIO_LEVELS=2", + "NRF_SDH_BLE_STACK_OBSERVER_PRIO=0", + "NRF_SDH_SOC_STACK_OBSERVER_PRIO=0", + "FDS_BACKEND=2", + "SWI_DISABLE1", + "SWI_DISABLE2", + "SWI_DISABLE3", + "SWI_DISABLE4", + "SWI_DISABLE5" + ], + "target_overrides": { + "*": { + "target.bootloader_img": "hex/s132_nrf52_6.0.0_softdevice.hex" + } + } +} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_rng.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_rng.h new file mode 100644 index 00000000000..3a4b306225c --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_rng.h @@ -0,0 +1,115 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_DRV_RNG_H__ +#define NRF_DRV_RNG_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_drv_rng RNG driver - legacy layer + * @{ + * @ingroup nrf_rng + * + * @brief Layer providing compatibility with the former API. + */ + +/** @brief Type definition for forwarding the new implementation. */ +typedef nrfx_rng_config_t nrf_drv_rng_config_t; + +/** @brief Macro for forwarding the new implementation. */ +#define NRF_DRV_RNG_DEFAULT_CONFIG NRFX_RNG_DEFAULT_CONFIG + +/** + * @brief Function for initializing the nrf_drv_rng module. + * + * @param[in] p_config Initial configuration. + * + * @retval NRF_SUCCESS Driver was successfully initialized. + * @retval NRF_ERROR_MODULE_ALREADY_INITIALIZED Driver was already initialized. + */ +ret_code_t nrf_drv_rng_init(nrf_drv_rng_config_t const * p_config); + +/** + * @brief Function for uninitializing the nrf_drv_rng module. + */ +void nrf_drv_rng_uninit(void); + +/** + * @brief Function for getting the number of currently available random bytes. + * + * @param[out] p_bytes_available The number of bytes currently available in the pool. + */ +void nrf_drv_rng_bytes_available(uint8_t * p_bytes_available); + +/** + * @brief Function for getting the vector of random numbers. + * + * @param[out] p_buff Pointer to uint8_t buffer for storing the bytes. + * @param[in] length Number of bytes to take from the pool and place in p_buff. + * + * @retval NRF_SUCCESS If the requested bytes were written to p_buff. + * @retval NRF_ERROR_NOT_FOUND If no bytes were written to the buffer because there were + * not enough bytes available in the pool. + */ +ret_code_t nrf_drv_rng_rand(uint8_t * p_buff, uint8_t length); + +/** + * @brief Blocking function for getting an arbitrary array of random numbers. + * + * @note This function may execute for a substantial amount of time depending on the length + * of the buffer required and on the state of the current internal pool of random numbers. + * + * @param[out] p_buff Pointer to uint8_t buffer for storing the bytes. + * @param[in] length Number of bytes place in p_buff. + */ +void nrf_drv_rng_block_rand(uint8_t * p_buff, uint32_t length); + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_DRV_RNG_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/nrfx_glue.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/nrfx_glue.h index 673b98de9c6..8f1f58fdda2 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/nrfx_glue.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/nrfx_glue.h @@ -54,9 +54,7 @@ extern "C" { * the needs of the host environment into which @em nrfx is integrated. */ -// RF - remove the legacy layer... this is preventing driver instances from being generated #include - #include //------------------------------------------------------------------------------ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/common_rtc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/common_rtc.c index 126c33f2086..c5600ab5e5e 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/common_rtc.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/common_rtc.c @@ -42,6 +42,7 @@ #include "nrf_drv_common.h" #include "lp_ticker_api.h" #include "mbed_critical.h" +#include "nrfx_glue.h" #if defined(NRF52_PAN_20) /* Macro for testing if the SoftDevice is active, regardless of whether the @@ -173,7 +174,8 @@ void common_rtc_init(void) nrf_rtc_int_disable(COMMON_RTC_INSTANCE, LP_TICKER_INT_MASK); #endif - nrf_drv_common_irq_enable(nrf_drv_get_IRQn(COMMON_RTC_INSTANCE), APP_IRQ_PRIORITY_HIGH); + NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(COMMON_RTC_INSTANCE), APP_IRQ_PRIORITY_HIGH); + NRFX_IRQ_ENABLE(nrfx_get_irq_number(COMMON_RTC_INSTANCE)); nrf_rtc_task_trigger(COMMON_RTC_INSTANCE, NRF_RTC_TASK_START); diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/gpio_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/gpio_api.c index 0aa2504b0e9..9addff70f58 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/gpio_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/gpio_api.c @@ -17,7 +17,7 @@ #include "gpio_api.h" #include "gpio_irq_api.h" #include "pinmap.h" -#include "nrf_drv_gpiote.h" +#include "nrfx_gpiote.h" #if defined(TARGET_MCU_NRF51822) @@ -58,7 +58,7 @@ static uint32_t m_channel_ids[GPIO_PIN_COUNT] = {0}; static gpio_mask_t m_gpio_irq_enabled; -static void gpiote_irq_handler(nrf_drv_gpiote_pin_t pin, nrf_gpiote_polarity_t action) +static void gpiote_irq_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) { nrf_gpio_pin_sense_t sense = nrf_gpio_pin_sense_get(pin); gpio_irq_event event = (sense == NRF_GPIO_PIN_SENSE_LOW) ? IRQ_RISE : IRQ_FALL; @@ -83,7 +83,7 @@ void gpio_init(gpio_t *obj, PinName pin) NVIC_SetVector(GPIOTE_IRQn, (uint32_t) GPIOTE_IRQHandler); - (void) nrf_drv_gpiote_init(); + (void) nrfx_gpiote_init(); m_gpio_cfg[obj->pin].used_as_gpio = true; } @@ -110,9 +110,9 @@ static void gpiote_pin_uninit(uint8_t pin) { if (m_gpio_initialized & ((gpio_mask_t)1UL << pin)) { if ((m_gpio_cfg[pin].direction == PIN_OUTPUT) && (!m_gpio_cfg[pin].used_as_irq)) { - nrf_drv_gpiote_out_uninit(pin); + nrfx_gpiote_out_uninit(pin); } else if (m_gpio_cfg[pin].used_as_irq) { - nrf_drv_gpiote_in_uninit(pin); + nrfx_gpiote_in_uninit(pin); } } } @@ -123,7 +123,7 @@ static void gpio_apply_config(uint8_t pin) if ((m_gpio_cfg[pin].direction == PIN_INPUT) || (m_gpio_cfg[pin].used_as_irq)) { //Configure as input. - nrf_drv_gpiote_in_config_t cfg; + nrfx_gpiote_in_config_t cfg; cfg.hi_accuracy = false; cfg.is_watcher = false; @@ -140,18 +140,18 @@ static void gpio_apply_config(uint8_t pin) break; } if (m_gpio_cfg[pin].used_as_irq) { - nrf_drv_gpiote_in_init(pin, &cfg, gpiote_irq_handler); + nrfx_gpiote_in_init(pin, &cfg, gpiote_irq_handler); if ((m_gpio_irq_enabled & ((gpio_mask_t)1 << pin)) && (m_gpio_cfg[pin].irq_rise || m_gpio_cfg[pin].irq_fall)) { - nrf_drv_gpiote_in_event_enable(pin, true); + nrfx_gpiote_in_event_enable(pin, true); } } else { nrf_gpio_cfg_input(pin, cfg.pull); } } else { // Configure as output. - nrf_drv_gpiote_out_config_t cfg = GPIOTE_CONFIG_OUT_SIMPLE(nrf_gpio_pin_out_read(pin)); - nrf_drv_gpiote_out_init(pin, &cfg); + nrfx_gpiote_out_config_t cfg = NRFX_GPIOTE_CONFIG_OUT_SIMPLE(nrf_gpio_pin_out_read(pin)); + nrfx_gpiote_out_init(pin, &cfg); } m_gpio_initialized |= ((gpio_mask_t)1UL << pin); } else { @@ -192,7 +192,7 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32 return -1; } MBED_ASSERT((uint32_t)pin < GPIO_PIN_COUNT); - (void) nrf_drv_gpiote_init(); + (void) nrfx_gpiote_init(); gpiote_pin_uninit(pin); // try to uninitialize gpio before a change. @@ -210,7 +210,7 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32 void gpio_irq_free(gpio_irq_t *obj) { - nrf_drv_gpiote_in_uninit(obj->ch); + nrfx_gpiote_in_uninit(obj->ch); m_gpio_cfg[obj->ch].used_as_irq = false; m_channel_ids[obj->ch] = 0; @@ -247,7 +247,7 @@ void gpio_irq_enable(gpio_irq_t *obj) { m_gpio_irq_enabled |= ((gpio_mask_t)1 << obj->ch); if (m_gpio_cfg[obj->ch].irq_rise || m_gpio_cfg[obj->ch].irq_fall) { - nrf_drv_gpiote_in_event_enable(obj->ch, true); + nrfx_gpiote_in_event_enable(obj->ch, true); } } @@ -255,5 +255,5 @@ void gpio_irq_enable(gpio_irq_t *obj) void gpio_irq_disable(gpio_irq_t *obj) { m_gpio_irq_enabled &= ~((gpio_mask_t)1 << obj->ch); - nrf_drv_gpiote_in_event_disable(obj->ch); + nrfx_gpiote_in_event_disable(obj->ch); } diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/rtc_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/rtc_api.c index cc4d0f118f9..104eebb13b5 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/rtc_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/rtc_api.c @@ -1,4 +1,4 @@ -/* +/* * Copyright (c) 2013 Nordic Semiconductor ASA * All rights reserved. * @@ -21,7 +21,7 @@ * Nordic Semiconductor ASA integrated circuit. * * 5. Any software provided in binary or object form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. + * engineered, decompiled, modified and/or disassembled. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED @@ -41,7 +41,7 @@ #if DEVICE_RTC #include "common_rtc.h" -#include "nrf_drv_clock.h" +#include "nrf_rtc.h" #include "app_util_platform.h" static time_t m_time_base; diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/us_ticker.c b/targets/TARGET_NORDIC/TARGET_NRF5x/us_ticker.c index 7ab6b2f6109..9a8b8cb5e92 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/us_ticker.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/us_ticker.c @@ -43,6 +43,7 @@ #include "app_util_platform.h" #include "nrf_drv_common.h" #include "mbed_critical.h" +#include "nrfx_glue.h" bool us_ticker_initialized = false; @@ -89,7 +90,8 @@ void us_ticker_init(void) NVIC_SetVector(TIMER1_IRQn, (uint32_t)us_ticker_irq_handler); - nrf_drv_common_irq_enable(TIMER1_IRQn, APP_IRQ_PRIORITY_HIGH); + NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number((void const*)TIMER1_IRQn), APP_IRQ_PRIORITY_HIGH); + NRFX_IRQ_ENABLE(nrfx_get_irq_number((void const*)TIMER1_IRQn)); nrf_timer_task_trigger(NRF_TIMER1, NRF_TIMER_TASK_START); diff --git a/targets/targets.json b/targets/targets.json index 283c6ecc7c9..560565b3a71 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -6893,6 +6893,7 @@ "PORTINOUT", "PORTOUT", "PWMOUT", + "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", From b0f5f065617ca1068ba8d8ad03e4182343043c05 Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Wed, 8 Aug 2018 12:08:41 -0500 Subject: [PATCH 434/488] Ported analogin and pwm_out for IOTDEV-1573. Also addressed: - removed dependency on legacy config (excluded apply_old_config.h) - removed legacy pwm and saadc headers - Arm Compiler 5 linking issue (a band-aid for now... needs to be properly addressed for peripheral sharing) - added missing header in SoftDevice file --- .../TARGET_MCU_NRF52840/config/sdk_config.h | 40 ++--- .../TARGET_NRF5x/TARGET_NRF52/analogin_api.c | 28 ++-- .../TARGET_NRF5x/TARGET_NRF52/i2c_api.c | 27 ++-- .../TARGET_NRF5x/TARGET_NRF52/pwmout_api.c | 49 +++--- .../TARGET_NRF5x/TARGET_NRF52/spi_api.c | 8 +- .../ble_radio_notification.c | 1 + .../integration/nrfx/legacy/nrf_drv_pwm.h | 135 ----------------- .../integration/nrfx/legacy/nrf_drv_saadc.h | 143 ------------------ .../integration/nrfx/nrfx_glue.h | 2 +- .../modules/nrfx/drivers/src/nrfx_spim.c | 2 + .../modules/nrfx/drivers/src/nrfx_twi.c | 4 + .../modules/nrfx/drivers/src/nrfx_twim.c | 4 + targets/targets.json | 1 + 13 files changed, 92 insertions(+), 352 deletions(-) delete mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_pwm.h delete mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_saadc.h diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h index bef4c0ee365..7904fdd6c37 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h @@ -46,7 +46,7 @@ #endif -// nRF_BLE +// nRF_BLE //========================================================== // BLE_ADVERTISING_ENABLED - ble_advertising - Advertising module @@ -187,7 +187,7 @@ // <4=> Yellow // <5=> Blue // <6=> Magenta -// <7=> Cyan +// <7=> Cyan // <8=> White #ifndef BLE_BAS_CONFIG_INFO_COLOR @@ -1862,7 +1862,7 @@ // NRFX_GPIOTE_ENABLED - nrfx_gpiote - GPIOTE peripheral driver //========================================================== #ifndef NRFX_GPIOTE_ENABLED -#define NRFX_GPIOTE_ENABLED 0 +#define NRFX_GPIOTE_ENABLED 1 #endif // NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins #ifndef NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS @@ -2463,34 +2463,34 @@ // NRFX_PWM_ENABLED - nrfx_pwm - PWM peripheral driver //========================================================== #ifndef NRFX_PWM_ENABLED -#define NRFX_PWM_ENABLED 0 +#define NRFX_PWM_ENABLED 1 #endif // NRFX_PWM0_ENABLED - Enable PWM0 instance - + #ifndef NRFX_PWM0_ENABLED -#define NRFX_PWM0_ENABLED 0 +#define NRFX_PWM0_ENABLED 1 #endif // NRFX_PWM1_ENABLED - Enable PWM1 instance - + #ifndef NRFX_PWM1_ENABLED -#define NRFX_PWM1_ENABLED 0 +#define NRFX_PWM1_ENABLED 1 #endif // NRFX_PWM2_ENABLED - Enable PWM2 instance #ifndef NRFX_PWM2_ENABLED -#define NRFX_PWM2_ENABLED 0 +#define NRFX_PWM2_ENABLED 1 #endif // NRFX_PWM3_ENABLED - Enable PWM3 instance - + #ifndef NRFX_PWM3_ENABLED -#define NRFX_PWM3_ENABLED 0 +#define NRFX_PWM3_ENABLED 1 #endif // NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN - Out0 pin <0-31> @@ -3114,7 +3114,7 @@ // NRFX_SAADC_ENABLED - nrfx_saadc - SAADC peripheral driver //========================================================== #ifndef NRFX_SAADC_ENABLED -#define NRFX_SAADC_ENABLED 0 +#define NRFX_SAADC_ENABLED 1 #endif // NRFX_SAADC_CONFIG_RESOLUTION - Resolution @@ -3454,14 +3454,14 @@ #ifndef NRFX_SPI0_ENABLED -#define NRFX_SPI0_ENABLED 1 +#define NRFX_SPI0_ENABLED 0 #endif // NRFX_SPI1_ENABLED - Enable SPI1 instance - + #ifndef NRFX_SPI1_ENABLED -#define NRFX_SPI1_ENABLED 0 +#define NRFX_SPI1_ENABLED 1 #endif // NRFX_SPI2_ENABLED - Enable SPI2 instance @@ -5026,7 +5026,7 @@ #endif // RTC1_ENABLED - Enable RTC1 instance - + #ifndef RTC1_ENABLED #define RTC1_ENABLED 0 @@ -5049,7 +5049,7 @@ // SAADC_ENABLED - nrf_drv_saadc - SAADC peripheral driver - legacy layer //========================================================== #ifndef SAADC_ENABLED -#define SAADC_ENABLED 0 +#define SAADC_ENABLED 1 #endif // SAADC_CONFIG_RESOLUTION - Resolution @@ -6114,7 +6114,7 @@ // FDS_ENABLED - fds - Flash data storage module //========================================================== #ifndef FDS_ENABLED -#define FDS_ENABLED 0 +#define FDS_ENABLED 1 #endif // Pages - Virtual page settings @@ -6158,7 +6158,7 @@ // <2=> NRF_FSTORAGE_SD #ifndef FDS_BACKEND -#define FDS_BACKEND 2 +#define FDS_BACKEND 1 #endif // @@ -6650,7 +6650,7 @@ // NRF_FSTORAGE_ENABLED - nrf_fstorage - Flash abstraction library //========================================================== #ifndef NRF_FSTORAGE_ENABLED -#define NRF_FSTORAGE_ENABLED 0 +#define NRF_FSTORAGE_ENABLED 1 #endif // nrf_fstorage - Common settings diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/analogin_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/analogin_api.c index 2b5b0bd06ef..1bb73a57940 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/analogin_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/analogin_api.c @@ -15,23 +15,27 @@ */ #if DEVICE_ANALOGIN + #include "hal/analogin_api.h" #include "pinmap.h" #include "PeripheralPins.h" -#include "nrf_drv_saadc.h" +#include "nrfx_saadc.h" +#include "nrfx_errors.h" +#include "sdk_config.h" #define ADC_12BIT_RANGE 0x0FFF #define ADC_16BIT_RANGE 0xFFFF /* Unused event handler but driver requires one. */ -static void analog_in_event_handler(nrf_drv_saadc_evt_t const *p_event) +static void analog_in_event_handler(nrfx_saadc_evt_t const *p_event) { (void) p_event; + } -/* Interrupt handler implemented in nrf_drv_saadc.c. */ +/* Interrupt handler implemented in nrfx_saadc.c. */ void SAADC_IRQHandler(void); /** Initialize the analogin peripheral @@ -41,7 +45,7 @@ void SAADC_IRQHandler(void); * @param pin The analogin pin name */ void analogin_init(analogin_t *obj, PinName pin) -{ +{ MBED_ASSERT(obj); /* Only initialize SAADC on first pin. */ @@ -52,21 +56,21 @@ void analogin_init(analogin_t *obj, PinName pin) first_init = false; /* Use configuration from sdk_config.h. - * Default is: + * Default is: * - 12 bit. * - No oversampling. * - Priority 7 (lowest). * - No low power mode. */ - nrf_drv_saadc_config_t adc_config = { + nrfx_saadc_config_t adc_config = { .resolution = (nrf_saadc_resolution_t)SAADC_CONFIG_RESOLUTION, .oversample = (nrf_saadc_oversample_t)SAADC_CONFIG_OVERSAMPLE, .interrupt_priority = SAADC_CONFIG_IRQ_PRIORITY, .low_power_mode = SAADC_CONFIG_LP_MODE }; - ret_code_t result = nrf_drv_saadc_init(&adc_config, analog_in_event_handler); - MBED_ASSERT(result == NRF_SUCCESS); + ret_code_t result = nrfx_saadc_init(&adc_config, analog_in_event_handler); + MBED_ASSERT(result == NRFX_SUCCESS); /* Register interrupt handler in vector table. */ NVIC_SetVector(SAADC_IRQn, (uint32_t)SAADC_IRQHandler); @@ -94,8 +98,8 @@ void analogin_init(analogin_t *obj, PinName pin) .pin_n = NRF_SAADC_INPUT_DISABLED }; - ret_code_t result = nrf_drv_saadc_channel_init(channel, &channel_config); - MBED_ASSERT(result == NRF_SUCCESS); + ret_code_t result = nrfx_saadc_channel_init(channel, &channel_config); + MBED_ASSERT(result == NRFX_SUCCESS); /* Store channel in ADC object. */ obj->channel = channel; @@ -116,10 +120,10 @@ uint16_t analogin_read_u16(analogin_t *obj) /* Read single channel, blocking. */ nrf_saadc_value_t value = { 0 }; - ret_code_t result = nrf_drv_saadc_sample_convert(obj->channel, &value); + ret_code_t result = nrfx_saadc_sample_convert(obj->channel, &value); /* nrf_saadc_value_t is a signed integer. Only take the absolute value. */ - if ((result == NRF_SUCCESS) && (value > 0)) { + if ((result == NRFX_SUCCESS) && (value > 0)) { /* Normalize 12 bit ADC value to 16 bit Mbed ADC range. */ uint32_t normalized = value; diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/i2c_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/i2c_api.c index e84078e0a9b..a7fb4745903 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/i2c_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/i2c_api.c @@ -588,7 +588,8 @@ static void i2c_configure_driver_instance(i2c_t *obj) * deinitialize on object destruction. */ NRFX_IRQ_DISABLE((nrfx_get_irq_number((void const*)nordic_nrf5_twi_register[instance]))); -// RF - there doesn't appear to be a replacement for nrf_drv_common_per_res_release() ! +// RF - there doesn't appear to be a replacement for nrf_drv_common_per_res_release() +// RF - check how this is now handled // nrf_drv_common_per_res_release(nordic_nrf5_twi_register[instance]); /* Configure driver with new settings. */ @@ -606,24 +607,24 @@ static void i2c_configure_driver_instance(i2c_t *obj) if (config->handler) { /* Initialze driver in non-blocking mode. */ - nrf_drv_twi_init(&nordic_nrf5_instance[instance], - &twi_config, - nordic_nrf5_twi_event_handler, - obj); + nrfx_twi_init(&nordic_nrf5_instance[instance], + &twi_config, + nordic_nrf5_twi_event_handler, + obj); } else { /* Initialze driver in blocking mode. */ - nrf_drv_twi_init(&nordic_nrf5_instance[instance], - &twi_config, - NULL, - NULL); + nrfx_twi_init(&nordic_nrf5_instance[instance], + &twi_config, + NULL, + NULL); } #else /* Initialze driver in blocking mode. */ - nrf_drv_twi_init(&nordic_nrf5_instance[instance], - &twi_config, - NULL, - NULL); + nrfx_twi_init(&nordic_nrf5_instance[instance], + &twi_config, + NULL, + NULL); #endif /* Enable peripheral. */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/pwmout_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/pwmout_api.c index 767f0a8ee58..87460681fb2 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/pwmout_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/pwmout_api.c @@ -39,10 +39,8 @@ #if DEVICE_PWMOUT #include "hal/pwmout_api.h" - #include "pinmap_ex.h" -#include "nrf_drv_pwm.h" -#include "PeripheralPins.h" +#include "nrfx_pwm.h" #if 0 #define DEBUG_PRINTF(...) do { printf(__VA_ARGS__); } while(0) @@ -62,7 +60,7 @@ #define SEQ_POLARITY_BIT (0x8000) /* Allocate PWM instances. */ -static nrf_drv_pwm_t nordic_nrf5_pwm_instance[] = { +static nrfx_pwm_t nordic_nrf5_pwm_instance[] = { #if PWM0_ENABLED NRF_DRV_PWM_INSTANCE(0), #endif @@ -87,12 +85,12 @@ static void nordic_pwm_init(pwmout_t *obj) * 1 pin per instance, otherwise they would share base count. * 1 MHz clock source to match the 1 us resolution. */ - nrf_drv_pwm_config_t config = { + nrfx_pwm_config_t config = { .output_pins = { obj->pin, - NRF_DRV_PWM_PIN_NOT_USED, - NRF_DRV_PWM_PIN_NOT_USED, - NRF_DRV_PWM_PIN_NOT_USED, + NRFX_PWM_PIN_NOT_USED, + NRFX_PWM_PIN_NOT_USED, + NRFX_PWM_PIN_NOT_USED, }, .irq_priority = PWM_DEFAULT_CONFIG_IRQ_PRIORITY, .base_clock = NRF_PWM_CLK_1MHz, @@ -102,12 +100,15 @@ static void nordic_pwm_init(pwmout_t *obj) .step_mode = NRF_PWM_STEP_AUTO, }; + /* Make sure PWM instance is not running before making changes. */ + nrfx_pwm_uninit(&nordic_nrf5_pwm_instance[obj->instance]); + /* Initialize instance with new configuration. */ - ret_code_t result = nrf_drv_pwm_init(&nordic_nrf5_pwm_instance[obj->instance], - &config, - NULL); + ret_code_t result = nrfx_pwm_init(&nordic_nrf5_pwm_instance[obj->instance], + &config, + NULL); - MBED_ASSERT(result == NRF_SUCCESS); + MBED_ASSERT(result == NRFX_SUCCESS); } /* Helper function for reinitializing the PWM instance and setting the duty-cycle. */ @@ -122,12 +123,12 @@ static void nordic_pwm_restart(pwmout_t *obj) nordic_pwm_init(obj); /* Set duty-cycle from object. */ - ret_code_t result = nrf_drv_pwm_simple_playback(&nordic_nrf5_pwm_instance[obj->instance], - &obj->sequence, - 1, - NRF_DRV_PWM_FLAG_LOOP); + ret_code_t result = nrfx_pwm_simple_playback(&nordic_nrf5_pwm_instance[obj->instance], + &obj->sequence, + 1, + NRFX_PWM_FLAG_LOOP); - MBED_ASSERT(result == NRF_SUCCESS); + MBED_ASSERT(result == NRFX_SUCCESS); } /** Initialize the pwm out peripheral and configure the pin @@ -144,7 +145,7 @@ void pwmout_init(pwmout_t *obj, PinName pin) /* Get hardware instance from pinmap. */ int instance = pin_instance_pwm(pin); - MBED_ASSERT(instance < (int) (sizeof(nordic_nrf5_pwm_instance) / sizeof(nrf_drv_pwm_t))); + MBED_ASSERT(instance < (int)(sizeof(nordic_nrf5_pwm_instance) / sizeof(nrfx_pwm_t))); /* Populate PWM object with default values. */ obj->instance = instance; @@ -175,7 +176,7 @@ void pwmout_free(pwmout_t *obj) MBED_ASSERT(obj); /* Uninitialize PWM instance. */ - nrf_drv_pwm_uninit(&nordic_nrf5_pwm_instance[obj->instance]); + nrfx_pwm_uninit(&nordic_nrf5_pwm_instance[obj->instance]); } /** Set the output duty-cycle in range <0.0f, 1.0f> @@ -201,12 +202,12 @@ void pwmout_write(pwmout_t *obj, float percent) obj->percent = percent; /* Set new duty-cycle. */ - ret_code_t result = nrf_drv_pwm_simple_playback(&nordic_nrf5_pwm_instance[obj->instance], - &obj->sequence, - 1, - NRF_DRV_PWM_FLAG_LOOP); + ret_code_t result = nrfx_pwm_simple_playback(&nordic_nrf5_pwm_instance[obj->instance], + &obj->sequence, + 1, + NRFX_PWM_FLAG_LOOP); - MBED_ASSERT(result == NRF_SUCCESS); + MBED_ASSERT(result == NRFX_SUCCESS); } /** Read the current float-point output duty-cycle diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/spi_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/spi_api.c index 4651e1700ba..68bc038d637 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/spi_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/spi_api.c @@ -44,7 +44,7 @@ #include "pinmap_ex.h" #include "PeripheralPins.h" -#include "nrf_drv_spi.h" +#include "nrfx_spi.h" /* Pre-allocate instances and share them globally. */ static const nrf_drv_spi_t nordic_nrf5_spi_instance[3] = { @@ -105,13 +105,13 @@ static void spi_configure_driver_instance(spi_t *obj) #if DEVICE_SPI_ASYNCH /* Set callback handler in asynchronous mode. */ if (spi_inst->handler) { - nrf_drv_spi_init(&nordic_nrf5_spi_instance[instance], &(spi_inst->config), nordic_nrf5_spi_event_handler, obj); + nrfx_spi_init(&nordic_nrf5_spi_instance[instance], &(spi_inst->config), nordic_nrf5_spi_event_handler, obj); } else { - nrf_drv_spi_init(&nordic_nrf5_spi_instance[instance], &(spi_inst->config), NULL, NULL); + nrfx_spi_init(&nordic_nrf5_spi_instance[instance], &(spi_inst->config), NULL, NULL); } #else /* Set callback handler to NULL in synchronous mode. */ - nrf_drv_spi_init(&nordic_nrf5_spi_instance[instance], &(spi_inst->config), NULL, NULL); + nrfx_spi_init(&nordic_nrf5_spi_instance[instance], &(spi_inst->config), NULL, NULL); #endif /* Mark instance as initialized. */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/ble/ble_radio_notification/ble_radio_notification.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/ble/ble_radio_notification/ble_radio_notification.c index 44b2bf9ee82..b6dc48d6a91 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/ble/ble_radio_notification/ble_radio_notification.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/ble/ble_radio_notification/ble_radio_notification.c @@ -38,6 +38,7 @@ * */ #include "ble_radio_notification.h" +#include "nrf_nvic.h" #include diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_pwm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_pwm.h deleted file mode 100644 index 396afecb1c2..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_pwm.h +++ /dev/null @@ -1,135 +0,0 @@ -/** - * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef NRF_DRV_PWM_H__ -#define NRF_DRV_PWM_H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup nrf_drv_pwm PWM driver - legacy layer - * @{ - * @ingroup nrf_pwm - * - * @brief @tagAPI52 Layer providing compatibility with the former API. - */ - -/** @brief Type definition for forwarding the new implementation. */ -typedef nrfx_pwm_t nrf_drv_pwm_t; -/** @brief Type definition for forwarding the new implementation. */ -typedef nrfx_pwm_config_t nrf_drv_pwm_config_t; - -/** @brief Macro for forwarding the new implementation. */ -#define NRF_DRV_PWM_INSTANCE NRFX_PWM_INSTANCE -/** @brief Macro for forwarding the new implementation. */ -#define NRF_DRV_PWM_PIN_NOT_USED NRFX_PWM_PIN_NOT_USED -/** @brief Macro for forwarding the new implementation. */ -#define NRF_DRV_PWM_PIN_INVERTED NRFX_PWM_PIN_INVERTED -/** @brief Macro for forwarding the new implementation. */ -#define NRF_DRV_PWM_DEFAULT_CONFIG NRFX_PWM_DEFAULT_CONFIG - -/** @brief Macro for forwarding the new implementation. */ -#define NRF_DRV_PWM_FLAG_STOP NRFX_PWM_FLAG_STOP -/** @brief Macro for forwarding the new implementation. */ -#define NRF_DRV_PWM_FLAG_LOOP NRFX_PWM_FLAG_LOOP -/** @brief Macro for forwarding the new implementation. */ -#define NRF_DRV_PWM_FLAG_SIGNAL_END_SEQ0 NRFX_PWM_FLAG_SIGNAL_END_SEQ0 -/** @brief Macro for forwarding the new implementation. */ -#define NRF_DRV_PWM_FLAG_SIGNAL_END_SEQ1 NRFX_PWM_FLAG_SIGNAL_END_SEQ1 -/** @brief Macro for forwarding the new implementation. */ -#define NRF_DRV_PWM_FLAG_NO_EVT_FINISHED NRFX_PWM_FLAG_NO_EVT_FINISHED -/** @brief Macro for forwarding the new implementation. */ -#define NRF_DRV_PWM_FLAG_START_VIA_TASK NRFX_PWM_FLAG_START_VIA_TASK -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_pwm_flag_t nrfx_pwm_flag_t -/** @brief Macro for forwarding the new implementation. */ -#define NRF_DRV_PWM_EVT_FINISHED NRFX_PWM_EVT_FINISHED -/** @brief Macro for forwarding the new implementation. */ -#define NRF_DRV_PWM_EVT_END_SEQ0 NRFX_PWM_EVT_END_SEQ0 -/** @brief Macro for forwarding the new implementation. */ -#define NRF_DRV_PWM_EVT_END_SEQ1 NRFX_PWM_EVT_END_SEQ1 -/** @brief Macro for forwarding the new implementation. */ -#define NRF_DRV_PWM_EVT_STOPPED NRFX_PWM_EVT_STOPPED -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_pwm_evt_type_t nrfx_pwm_evt_type_t -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_pwm_handler_t nrfx_pwm_handler_t - -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_pwm_init nrfx_pwm_init -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_pwm_uninit nrfx_pwm_uninit -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_pwm_simple_playback nrfx_pwm_simple_playback -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_pwm_complex_playback nrfx_pwm_complex_playback -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_pwm_step nrfx_pwm_step -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_pwm_stop nrfx_pwm_stop -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_pwm_is_stopped nrfx_pwm_is_stopped -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_pwm_sequence_update nrfx_pwm_sequence_update -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_pwm_sequence_values_update nrfx_pwm_sequence_values_update -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_pwm_sequence_length_update nrfx_pwm_sequence_length_update -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_pwm_sequence_repeats_update nrfx_pwm_sequence_repeats_update -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_pwm_sequence_end_delay_update nrfx_pwm_sequence_end_delay_update - -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_pwm_task_address_get nrfx_pwm_task_address_get -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_pwm_event_address_get nrfx_pwm_event_address_get - -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif // NRF_DRV_PWM_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_saadc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_saadc.h deleted file mode 100644 index 8c25b063e86..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_saadc.h +++ /dev/null @@ -1,143 +0,0 @@ -/** - * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef NRF_DRV_SAADC_H__ -#define NRF_DRV_SAADC_H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup nrf_drv_saadc SAADC driver - legacy layer - * @{ - * @ingroup nrf_saadc - * - * @brief @tagAPI52 Layer providing compatibility with the former API. - */ - -/** @brief Type definition for forwarding the new implementation. */ -typedef nrfx_saadc_config_t nrf_drv_saadc_config_t; - -/** @brief Macro for forwarding the new implementation. */ -#define NRF_DRV_SAADC_EVT_DONE NRFX_SAADC_EVT_DONE -/** @brief Macro for forwarding the new implementation. */ -#define NRF_DRV_SAADC_EVT_LIMIT NRFX_SAADC_EVT_LIMIT -/** @brief Macro for forwarding the new implementation. */ -#define NRF_DRV_SAADC_EVT_CALIBRATEDONE NRFX_SAADC_EVT_CALIBRATEDONE -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_saadc_evt_type_t nrfx_saadc_evt_type_t -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_saadc_done_evt_t nrfx_saadc_done_evt_t -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_saadc_limit_evt_t nrfx_saadc_limit_evt_t -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_saadc_evt_t nrfx_saadc_evt_t -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_saadc_event_handler_t nrfx_saadc_event_handler_t - -/** @brief Macro for forwarding the new implementation. */ -#define NRF_DRV_SAADC_LIMITH_DISABLED NRFX_SAADC_LIMITH_DISABLED -/** @brief Macro for forwarding the new implementation. */ -#define NRF_DRV_SAADC_LIMITL_DISABLED NRFX_SAADC_LIMITL_DISABLED -/** @brief Macro for forwarding the new implementation. */ -#define NRF_DRV_SAADC_DEFAULT_CONFIG NRFX_SAADC_DEFAULT_CONFIG -/** @brief Macro for forwarding the new implementation. */ -#define NRF_DRV_SAADC_DEFAULT_CHANNEL_CONFIG_SE \ - NRFX_SAADC_DEFAULT_CHANNEL_CONFIG_SE -/** @brief Macro for forwarding the new implementation. */ -#define NRF_DRV_SAADC_DEFAULT_CHANNEL_CONFIG_DIFFERENTIAL \ - NRFX_SAADC_DEFAULT_CHANNEL_CONFIG_DIFFERENTIAL - -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_saadc_uninit nrfx_saadc_uninit -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_saadc_channel_init nrfx_saadc_channel_init -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_saadc_channel_uninit nrfx_saadc_channel_uninit -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_saadc_sample nrfx_saadc_sample -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_saadc_sample_convert nrfx_saadc_sample_convert -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_saadc_buffer_convert nrfx_saadc_buffer_convert -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_saadc_calibrate_offset nrfx_saadc_calibrate_offset -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_saadc_is_busy nrfx_saadc_is_busy -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_saadc_abort nrfx_saadc_abort -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_saadc_limits_set nrfx_saadc_limits_set - -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_saadc_sample_task_get nrfx_saadc_sample_task_get - -/** - * @brief Function for initializing the SAADC. - * - * @param[in] p_config Pointer to the structure with initial configuration. - * If NULL, the default one is used. - * @param[in] event_handler Event handler provided by the user. - * - * @retval NRF_SUCCESS If initialization was successful. - * @retval NRF_ERROR_INVALID_STATE If the driver is already initialized. - * @retval NRF_ERROR_INVALID_PARAM If event_handler is NULL. - */ -__STATIC_INLINE ret_code_t nrf_drv_saadc_init(nrf_drv_saadc_config_t const * p_config, - nrf_drv_saadc_event_handler_t event_handler) -{ - if (p_config == NULL) - { - static const nrfx_saadc_config_t default_config = NRFX_SAADC_DEFAULT_CONFIG; - p_config = &default_config; - } - return nrfx_saadc_init(p_config, event_handler); -} - -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif // NRF_DRV_SAADC_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/nrfx_glue.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/nrfx_glue.h index 8f1f58fdda2..8b1ad38aeb7 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/nrfx_glue.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/nrfx_glue.h @@ -54,7 +54,7 @@ extern "C" { * the needs of the host environment into which @em nrfx is integrated. */ -#include +//#include #include //------------------------------------------------------------------------------ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_spim.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_spim.c index cf16e26bc2c..6e89e820982 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_spim.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_spim.c @@ -664,12 +664,14 @@ void nrfx_spim_0_irq_handler(void) } #endif +#if 0 #if NRFX_CHECK(NRFX_SPIM1_ENABLED) void nrfx_spim_1_irq_handler(void) { irq_handler(NRF_SPIM1, &m_cb[NRFX_SPIM1_INST_IDX]); } #endif +#endif #if NRFX_CHECK(NRFX_SPIM2_ENABLED) void nrfx_spim_2_irq_handler(void) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_twi.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_twi.c index c7492bd4ee2..5860eb750cb 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_twi.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_twi.c @@ -706,18 +706,22 @@ static void twi_irq_handler(NRF_TWI_Type * p_twi, twi_control_block_t * p_cb) } +#if 0 #if NRFX_CHECK(NRFX_TWI0_ENABLED) void nrfx_twi_0_irq_handler(void) { twi_irq_handler(NRF_TWI0, &m_cb[NRFX_TWI0_INST_IDX]); } #endif +#endif +#if 0 #if NRFX_CHECK(NRFX_TWI1_ENABLED) void nrfx_twi_1_irq_handler(void) { twi_irq_handler(NRF_TWI1, &m_cb[NRFX_TWI1_INST_IDX]); } #endif +#endif #endif // NRFX_CHECK(NRFX_TWI_ENABLED) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_twim.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_twim.c index 7d9cb36001e..75b714fba4f 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_twim.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/src/nrfx_twim.c @@ -647,18 +647,22 @@ static void twim_irq_handler(NRF_TWIM_Type * p_twim, twim_control_block_t * p_cb p_cb->handler(&event, p_cb->p_context); } +#if 0 #if NRFX_CHECK(NRFX_TWIM0_ENABLED) void nrfx_twim_0_irq_handler(void) { twim_irq_handler(NRF_TWIM0, &m_cb[NRFX_TWIM0_INST_IDX]); } #endif +#endif +#if 0 #if NRFX_CHECK(NRFX_TWIM1_ENABLED) void nrfx_twim_1_irq_handler(void) { twim_irq_handler(NRF_TWIM1, &m_cb[NRFX_TWIM1_INST_IDX]); } #endif +#endif #endif // NRFX_CHECK(NRFX_TWIM_ENABLED) diff --git a/targets/targets.json b/targets/targets.json index 560565b3a71..4ab8f63b444 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -4755,6 +4755,7 @@ "PORTINOUT", "PORTOUT", "PWMOUT", + "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", From 3b7432b0d214b386b6477cdcf6b0403bf3fe75ba Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Thu, 23 Aug 2018 15:23:57 -0500 Subject: [PATCH 435/488] Updates to PWM for IOTDEV-1573 - Missed some NRFX defines that needed to changed - Set PWM base clock to 125kHz (needs to be reverted back to 1 MHz) - Updated sdk_config.h for nRF52_DK builds - Brought in updates from PR7779 (fix for nRF52 PWM issues) --- .../TARGET_MCU_NRF52832/config/sdk_config.h | 83 ++++++++----------- .../TARGET_NRF5x/TARGET_NRF52/pwmout_api.c | 28 ++++--- 2 files changed, 50 insertions(+), 61 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h index 58c0cc4608e..f4d927b90ea 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h @@ -46,7 +46,7 @@ #endif -// nRF_BLE +// nRF_BLE //========================================================== // BLE_ADVERTISING_ENABLED - ble_advertising - Advertising module @@ -187,7 +187,7 @@ // <4=> Yellow // <5=> Blue // <6=> Magenta -// <7=> Cyan +// <7=> Cyan // <8=> White #ifndef BLE_BAS_CONFIG_INFO_COLOR @@ -1862,7 +1862,7 @@ // NRFX_GPIOTE_ENABLED - nrfx_gpiote - GPIOTE peripheral driver //========================================================== #ifndef NRFX_GPIOTE_ENABLED -#define NRFX_GPIOTE_ENABLED 0 +#define NRFX_GPIOTE_ENABLED 1 #endif // NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins #ifndef NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS @@ -2463,31 +2463,31 @@ // NRFX_PWM_ENABLED - nrfx_pwm - PWM peripheral driver //========================================================== #ifndef NRFX_PWM_ENABLED -#define NRFX_PWM_ENABLED 0 +#define NRFX_PWM_ENABLED 1 #endif // NRFX_PWM0_ENABLED - Enable PWM0 instance - + #ifndef NRFX_PWM0_ENABLED -#define NRFX_PWM0_ENABLED 0 +#define NRFX_PWM0_ENABLED 1 #endif // NRFX_PWM1_ENABLED - Enable PWM1 instance - + #ifndef NRFX_PWM1_ENABLED -#define NRFX_PWM1_ENABLED 0 +#define NRFX_PWM1_ENABLED 1 #endif // NRFX_PWM2_ENABLED - Enable PWM2 instance #ifndef NRFX_PWM2_ENABLED -#define NRFX_PWM2_ENABLED 0 +#define NRFX_PWM2_ENABLED 1 #endif // NRFX_PWM3_ENABLED - Enable PWM3 instance - + #ifndef NRFX_PWM3_ENABLED #define NRFX_PWM3_ENABLED 0 @@ -2921,7 +2921,7 @@ // NRFX_RNG_ENABLED - nrfx_rng - RNG peripheral driver //========================================================== #ifndef NRFX_RNG_ENABLED -#define NRFX_RNG_ENABLED 0 +#define NRFX_RNG_ENABLED 1 #endif // NRFX_RNG_CONFIG_ERROR_CORRECTION - Error correction @@ -3114,7 +3114,7 @@ // NRFX_SAADC_ENABLED - nrfx_saadc - SAADC peripheral driver //========================================================== #ifndef NRFX_SAADC_ENABLED -#define NRFX_SAADC_ENABLED 0 +#define NRFX_SAADC_ENABLED 1 #endif // NRFX_SAADC_CONFIG_RESOLUTION - Resolution @@ -3218,40 +3218,34 @@ // -// needed to build -#define NRFX_SPIM0_ENABLED 1 -#define NRFX_SPIM1_ENABLED 1 -#define NRFX_SPIM2_ENABLED 1 - - // NRFX_SPIM_ENABLED - nrfx_spim - SPIM peripheral driver //========================================================== #ifndef NRFX_SPIM_ENABLED -#define NRFX_SPIM_ENABLED 0 +#define NRFX_SPIM_ENABLED 1 #endif // NRFX_SPIM0_ENABLED - Enable SPIM0 instance - + #ifndef NRFX_SPIM0_ENABLED -#define NRFX_SPIM0_ENABLED 0 +#define NRFX_SPIM0_ENABLED 1 #endif // NRFX_SPIM1_ENABLED - Enable SPIM1 instance #ifndef NRFX_SPIM1_ENABLED -#define NRFX_SPIM1_ENABLED 0 +#define NRFX_SPIM1_ENABLED 1 #endif // NRFX_SPIM2_ENABLED - Enable SPIM2 instance - + #ifndef NRFX_SPIM2_ENABLED -#define NRFX_SPIM2_ENABLED 0 +#define NRFX_SPIM2_ENABLED 1 #endif // NRFX_SPIM3_ENABLED - Enable SPIM3 instance - + #ifndef NRFX_SPIM3_ENABLED #define NRFX_SPIM3_ENABLED 0 @@ -3460,14 +3454,14 @@ #ifndef NRFX_SPI0_ENABLED -#define NRFX_SPI0_ENABLED 1 +#define NRFX_SPI0_ENABLED 0 #endif // NRFX_SPI1_ENABLED - Enable SPI1 instance - + #ifndef NRFX_SPI1_ENABLED -#define NRFX_SPI1_ENABLED 0 +#define NRFX_SPI1_ENABLED 1 #endif // NRFX_SPI2_ENABLED - Enable SPI2 instance @@ -5032,7 +5026,7 @@ #endif // RTC1_ENABLED - Enable RTC1 instance - + #ifndef RTC1_ENABLED #define RTC1_ENABLED 0 @@ -5055,7 +5049,7 @@ // SAADC_ENABLED - nrf_drv_saadc - SAADC peripheral driver - legacy layer //========================================================== #ifndef SAADC_ENABLED -#define SAADC_ENABLED 0 +#define SAADC_ENABLED 1 #endif // SAADC_CONFIG_RESOLUTION - Resolution @@ -5074,7 +5068,7 @@ // <1=> 2x // <2=> 4x // <3=> 8x -// <4=> 16x +// <4=> 16x // <5=> 32x // <6=> 64x // <7=> 128x @@ -5221,18 +5215,13 @@ #define NRF_SPI_DRV_MISO_PULLUP_CFG 1 #endif -// needed these to build! -#define SPI0_ENABLED 1 -#define SPI1_ENABLED 1 -#define SPI2_ENABLED 1 - // SPI0_ENABLED - Enable SPI0 instance //========================================================== #ifndef SPI0_ENABLED -#define SPI0_ENABLED 0 +#define SPI0_ENABLED 1 #endif // SPI0_USE_EASY_DMA - Use EasyDMA - + #ifndef SPI0_USE_EASY_DMA #define SPI0_USE_EASY_DMA 1 @@ -5243,10 +5232,10 @@ // SPI1_ENABLED - Enable SPI1 instance //========================================================== #ifndef SPI1_ENABLED -#define SPI1_ENABLED 0 +#define SPI1_ENABLED 1 #endif // SPI1_USE_EASY_DMA - Use EasyDMA - + #ifndef SPI1_USE_EASY_DMA #define SPI1_USE_EASY_DMA 1 @@ -5257,10 +5246,10 @@ // SPI2_ENABLED - Enable SPI2 instance //========================================================== #ifndef SPI2_ENABLED -#define SPI2_ENABLED 0 +#define SPI2_ENABLED 1 #endif // SPI2_USE_EASY_DMA - Use EasyDMA - + #ifndef SPI2_USE_EASY_DMA #define SPI2_USE_EASY_DMA 1 @@ -5605,12 +5594,10 @@ #define UART_LEGACY_SUPPORT 1 #endif -// needed for Mbed build -#define UART0_ENABLED 1 // UART0_ENABLED - Enable UART0 instance //========================================================== #ifndef UART0_ENABLED -#define UART0_ENABLED 0 +#define UART0_ENABLED 1 #endif // UART0_CONFIG_USE_EASY_DMA - Default setting for using EasyDMA @@ -6127,7 +6114,7 @@ // FDS_ENABLED - fds - Flash data storage module //========================================================== #ifndef FDS_ENABLED -#define FDS_ENABLED 0 +#define FDS_ENABLED 1 #endif // Pages - Virtual page settings @@ -6171,7 +6158,7 @@ // <2=> NRF_FSTORAGE_SD #ifndef FDS_BACKEND -#define FDS_BACKEND 2 +#define FDS_BACKEND 1 #endif // @@ -6663,7 +6650,7 @@ // NRF_FSTORAGE_ENABLED - nrf_fstorage - Flash abstraction library //========================================================== #ifndef NRF_FSTORAGE_ENABLED -#define NRF_FSTORAGE_ENABLED 0 +#define NRF_FSTORAGE_ENABLED 1 #endif // nrf_fstorage - Common settings diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/pwmout_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/pwmout_api.c index 87460681fb2..11f6428a22a 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/pwmout_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/pwmout_api.c @@ -39,6 +39,7 @@ #if DEVICE_PWMOUT #include "hal/pwmout_api.h" +#include "PeripheralPins.h" #include "pinmap_ex.h" #include "nrfx_pwm.h" @@ -61,17 +62,17 @@ /* Allocate PWM instances. */ static nrfx_pwm_t nordic_nrf5_pwm_instance[] = { -#if PWM0_ENABLED - NRF_DRV_PWM_INSTANCE(0), +#if NRFX_PWM0_ENABLED + NRFX_PWM_INSTANCE(0), #endif -#if PWM1_ENABLED - NRF_DRV_PWM_INSTANCE(1), +#if NRFX_PWM1_ENABLED + NRFX_PWM_INSTANCE(1), #endif -#if PWM2_ENABLED - NRF_DRV_PWM_INSTANCE(2), +#if NRFX_PWM2_ENABLED + NRFX_PWM_INSTANCE(2), #endif -#if PWM3_ENABLED - NRF_DRV_PWM_INSTANCE(3), +#if NRFX_PWM3_ENABLED + NRFX_PWM_INSTANCE(3), #endif }; @@ -100,8 +101,8 @@ static void nordic_pwm_init(pwmout_t *obj) .step_mode = NRF_PWM_STEP_AUTO, }; - /* Make sure PWM instance is not running before making changes. */ - nrfx_pwm_uninit(&nordic_nrf5_pwm_instance[obj->instance]); + // RF - test slowest prescalar setting (125kHz) + config.base_clock = NRF_PWM_CLK_125kHz; /* Initialize instance with new configuration. */ ret_code_t result = nrfx_pwm_init(&nordic_nrf5_pwm_instance[obj->instance], @@ -116,8 +117,8 @@ static void nordic_pwm_restart(pwmout_t *obj) { MBED_ASSERT(obj); - /* Uninitialize PWM instace */ - nrf_drv_pwm_uninit(&nordic_nrf5_pwm_instance[obj->instance]); + /* Uninitialize PWM instance */ + nrfx_pwm_uninit(&nordic_nrf5_pwm_instance[obj->instance]); /* (Re)initialize PWM instance. */ nordic_pwm_init(obj); @@ -145,7 +146,7 @@ void pwmout_init(pwmout_t *obj, PinName pin) /* Get hardware instance from pinmap. */ int instance = pin_instance_pwm(pin); - MBED_ASSERT(instance < (int)(sizeof(nordic_nrf5_pwm_instance) / sizeof(nrfx_pwm_t))); + MBED_ASSERT(instance < (int) (sizeof(nordic_nrf5_pwm_instance) / sizeof(nrfx_pwm_t))); /* Populate PWM object with default values. */ obj->instance = instance; @@ -356,3 +357,4 @@ const PinMap *pwmout_pinmap() } #endif // DEVICE_PWMOUT + From 8633087a9471069a07fa705a80fc2e1f545a93af Mon Sep 17 00:00:00 2001 From: Naveen Kaje Date: Sun, 19 Aug 2018 13:40:01 -0500 Subject: [PATCH 436/488] serial_api: Fixes to compile with SDK15.0 --- .../TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c index 435b896cbcc..394f52d715b 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c @@ -41,8 +41,7 @@ #include "hal/serial_api.h" #include "nrf_uarte.h" -#include "nrf_drv_uart.h" -#include "nrf_drv_common.h" +#include "nrfx_uart.h" #include "nrf_atfifo.h" #include "app_util_platform.h" #include "pinmap_ex.h" @@ -164,12 +163,12 @@ typedef enum { /** * UARTE state. One for each instance. */ -static nordic_uart_state_t nordic_nrf5_uart_state[UART_ENABLED_COUNT] = { 0 }; +static nordic_uart_state_t nordic_nrf5_uart_state[NRFX_UART_ENABLED_COUNT] = { 0 }; /** * Array with UARTE register pointers for easy access. */ -static NRF_UARTE_Type *nordic_nrf5_uart_register[UART_ENABLED_COUNT] = { +static NRF_UARTE_Type *nordic_nrf5_uart_register[NRFX_UART_ENABLED_COUNT] = { NRF_UARTE0, #if UART1_ENABLED NRF_UARTE1, From 5643d717f4f3883c00a8780abc7173e546177ece Mon Sep 17 00:00:00 2001 From: Naveen Kaje Date: Thu, 16 Aug 2018 15:39:12 -0500 Subject: [PATCH 437/488] serial_api: add changes to port from Softdevice 14.2 to 15.0 --- .../TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c index 394f52d715b..0e195d585ce 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c @@ -1503,13 +1503,13 @@ int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx */ if (instance == 0) { - if (nrf_drv_is_in_RAM(tx) || (tx_length <= UART0_FIFO_BUFFER_SIZE)) { + if (nrfx_is_in_ram(tx) || (tx_length <= UART0_FIFO_BUFFER_SIZE)) { valid = true; } } #if UART1_ENABLED else { - if (nrf_drv_is_in_RAM(tx) || (tx_length <= UART1_FIFO_BUFFER_SIZE)) { + if (nrfx_is_in_ram(tx) || (tx_length <= UART1_FIFO_BUFFER_SIZE)) { valid = true; } } @@ -1521,7 +1521,7 @@ int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx uint8_t *buffer = NULL; /* Tx buffer is in RAM. */ - if (nrf_drv_is_in_RAM(tx)) { + if (nrfx_is_in_ram(tx)) { buffer = (uint8_t *) tx; } else { From cce4399c60eda9b8bcbef9cd8c69780095d2b940 Mon Sep 17 00:00:00 2001 From: Naveen Kaje Date: Fri, 24 Aug 2018 14:51:42 -0500 Subject: [PATCH 438/488] Nordic sdk_config: Configure UART instances Enable UART interfaces to enable serial debug prints. --- .../TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h index 7904fdd6c37..7b6c2a425f6 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h @@ -3558,7 +3558,7 @@ #ifndef NRFX_EGU_ENABLED -#define NRFX_EGU_ENABLED 0 +#define NRFX_EGU_ENABLED 1 #endif // NRFX_SWI0_DISABLED - Exclude SWI0 from being utilized by the driver @@ -4274,11 +4274,11 @@ // NRFX_UART_ENABLED - nrfx_uart - UART peripheral driver //========================================================== #ifndef NRFX_UART_ENABLED -#define NRFX_UART_ENABLED 0 +#define NRFX_UART_ENABLED 1 #endif // NRFX_UART0_ENABLED - Enable UART0 instance #ifndef NRFX_UART0_ENABLED -#define NRFX_UART0_ENABLED 0 +#define NRFX_UART0_ENABLED 1 #endif // NRFX_UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control @@ -5520,7 +5520,7 @@ // UART_ENABLED - nrf_drv_uart - UART/UARTE peripheral driver - legacy layer //========================================================== #ifndef UART_ENABLED -#define UART_ENABLED 1 +#define UART_ENABLED 0 #endif // UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control From 18d307d70c2795772b100686cc6415c3b41f1c67 Mon Sep 17 00:00:00 2001 From: Naveen Kaje Date: Fri, 24 Aug 2018 14:53:05 -0500 Subject: [PATCH 439/488] serial_api: Fix the interrupt registration for Nordic Serial Device Using the nrfx_get_irq_number only works with the handle. Since we know the IRQ numbers for UART0, RTC2 and EGU0, use them directly. --- .../TARGET_NRF5x/TARGET_NRF52/serial_api.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c index 0e195d585ce..4842722a020 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c @@ -859,8 +859,8 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) NRF_RTC_INT_COMPARE1_MASK); /* Enable RTC2 IRQ. Priority is set to highest so that the UARTE ISR can't interrupt it. */ - NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number((void const*)RTC2_IRQn), APP_IRQ_PRIORITY_HIGHEST); - NRFX_IRQ_ENABLE(nrfx_get_irq_number((void const*)RTC2_IRQn)); + NRFX_IRQ_PRIORITY_SET(RTC2_IRQn, APP_IRQ_PRIORITY_HIGHEST); + NRFX_IRQ_ENABLE(RTC2_IRQn); /* Start RTC2. According to the datasheet the added power consumption is neglible so @@ -870,8 +870,8 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) /* Enable interrupts for SWI. */ NVIC_SetVector(SWI0_EGU0_IRQn, (uint32_t) nordic_nrf5_uart_swi0); - NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number((void const*)SWI0_EGU0_IRQn), APP_IRQ_PRIORITY_LOWEST); - NRFX_IRQ_ENABLE(nrfx_get_irq_number((void const*)SWI0_EGU0_IRQn)); + NRFX_IRQ_PRIORITY_SET(SWI0_EGU0_IRQn, APP_IRQ_PRIORITY_LOWEST); + NRFX_IRQ_ENABLE(SWI0_EGU0_IRQn); /* Initialize FIFO buffer for UARTE0. */ NRF_ATFIFO_INIT(nordic_nrf5_uart_fifo_0); @@ -891,8 +891,8 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) nrf_uarte_int_disable(nordic_nrf5_uart_register[0], 0xFFFFFFFF); NVIC_SetVector(UARTE0_UART0_IRQn, (uint32_t) nordic_nrf5_uart0_handler); - NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number((void const*)UARTE0_UART0_IRQn), APP_IRQ_PRIORITY_HIGHEST); - NRFX_IRQ_ENABLE(nrfx_get_irq_number((void const*)UARTE0_UART0_IRQn)); + NRFX_IRQ_PRIORITY_SET(UARTE0_UART0_IRQn, APP_IRQ_PRIORITY_HIGHEST); + NRFX_IRQ_ENABLE(UARTE0_UART0_IRQn); #if UART1_ENABLED /* Initialize FIFO buffer for UARTE1. */ From 5ebe9c9f6ba6cb40760c8425683d28749b5c705b Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Fri, 21 Sep 2018 17:49:10 -0500 Subject: [PATCH 440/488] Updates for IOTDEV-1575 and nRF52_DK builds - Use new NRFX header file - Fix nRF52832 linker script/ld files (hardcoded addresses for now) - Temporarily remove DEVICE_TRNG for nRF52832 (which broke the build) - Improve serial_putc() fix so we don't rely on "extra" functions --- .../device/TOOLCHAIN_ARM_STD/nRF52832.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/NRF52832.ld | 4 ++-- targets/TARGET_NORDIC/TARGET_NRF5x/us_ticker.c | 4 ++-- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct index 06d9dbddc24..069c784ad46 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct @@ -14,7 +14,7 @@ /* If softdevice is present, set aside space for it */ #if !defined(MBED_RAM_START) #if defined(SOFTDEVICE_PRESENT) - #define MBED_RAM_START 0x200031D0 + #define MBED_RAM_START 0x20001D70 #define MBED_RAM_SIZE 0xCE30 #else #define MBED_RAM_START 0x20000000 @@ -27,8 +27,8 @@ #define MBED_RAM1_START (MBED_RAM_START + MBED_RAM0_SIZE) #define MBED_RAM1_SIZE (MBED_RAM_SIZE - MBED_RAM0_SIZE) -LR_IROM1 MBED_APP_START MBED_APP_SIZE { - ER_IROM1 MBED_APP_START MBED_APP_SIZE { +LR_IROM1 0x26000 MBED_APP_SIZE { + ER_IROM1 0x26000 MBED_APP_SIZE { *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld index fba4b46f7d0..67a25fe5f52 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld @@ -28,7 +28,7 @@ /* If softdevice is present, set aside space for it */ #if !defined(MBED_RAM_START) #if defined(SOFTDEVICE_PRESENT) - #define MBED_RAM_START 0x200031D0 + #define MBED_RAM_START 0x20001D70 #define MBED_RAM_SIZE 0xCE30 #else #define MBED_RAM_START 0x20000000 @@ -47,7 +47,7 @@ MEMORY { - FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE + FLASH (rx) : ORIGIN = 0x26000, LENGTH = MBED_APP_SIZE RAM_NVIC (rwx) : ORIGIN = MBED_RAM0_START, LENGTH = MBED_RAM0_SIZE RAM (rwx) : ORIGIN = MBED_RAM1_START, LENGTH = MBED_RAM1_SIZE } diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/us_ticker.c b/targets/TARGET_NORDIC/TARGET_NRF5x/us_ticker.c index 9a8b8cb5e92..f6cdc050bf8 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/us_ticker.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/us_ticker.c @@ -41,13 +41,13 @@ #include "us_ticker_api.h" #include "nrf_timer.h" #include "app_util_platform.h" -#include "nrf_drv_common.h" +#include "nrfx_common.h" #include "mbed_critical.h" #include "nrfx_glue.h" bool us_ticker_initialized = false; -/* us ticker is driven by 1MHz clock and counter length is 16 bits. */ +/* us ticker is driven by 1MHz clock and counter length is 32 bits for nRF52 */ const ticker_info_t* us_ticker_get_info() { static const ticker_info_t info = { From e0a2a27938c4ac136e82d425f343926a1b31d681 Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Fri, 5 Oct 2018 18:16:14 -0500 Subject: [PATCH 441/488] Updates for IOTDEV-1576 (only TRNG API) - Added legacy nrf_drv_rng.c as there is no merit in fully adopting nrfx_rng.c - Added nrf_queue library component - Removed apply_old_config.h (unused for some time now) - Updated sdk_config.h for queue and RNG support for nRF52832 - Brought back RNG into targets.json for nRF52832 Note: nRF52840 still uses CryptoCell 310 for TRNG --- .../TARGET_MCU_NRF52832/config/sdk_config.h | 4 +- .../components/libraries/queue/nrf_queue.c | 547 +++++++ .../components/libraries/queue/nrf_queue.h | 429 +++++ .../nrfx/legacy/apply_old_config.h | 1385 ----------------- .../integration/nrfx/legacy/nrf_drv_rng.c | 283 ++++ 5 files changed, 1261 insertions(+), 1387 deletions(-) create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/queue/nrf_queue.c create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/queue/nrf_queue.h delete mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/apply_old_config.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_rng.c diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h index f4d927b90ea..f2a12bddbdf 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h @@ -4949,7 +4949,7 @@ // RNG_ENABLED - nrf_drv_rng - RNG peripheral driver - legacy layer //========================================================== #ifndef RNG_ENABLED -#define RNG_ENABLED 0 +#define RNG_ENABLED 1 #endif // RNG_CONFIG_ERROR_CORRECTION - Error correction @@ -6844,7 +6844,7 @@ // NRF_QUEUE_ENABLED - nrf_queue - Queue module //========================================================== #ifndef NRF_QUEUE_ENABLED -#define NRF_QUEUE_ENABLED 0 +#define NRF_QUEUE_ENABLED 1 #endif // NRF_QUEUE_CLI_CMDS - Enable CLI commands specific to the module diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/queue/nrf_queue.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/queue/nrf_queue.c new file mode 100644 index 00000000000..9afc16ca8a5 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/queue/nrf_queue.c @@ -0,0 +1,547 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "sdk_common.h" +#if NRF_MODULE_ENABLED(NRF_QUEUE) +#include "nrf_queue.h" +#include "app_util_platform.h" + +#if NRF_QUEUE_CONFIG_LOG_ENABLED + #define NRF_LOG_LEVEL NRF_QUEUE_CONFIG_LOG_LEVEL + #define NRF_LOG_INIT_FILTER_LEVEL NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL + #define NRF_LOG_INFO_COLOR NRF_QUEUE_CONFIG_INFO_COLOR + #define NRF_LOG_DEBUG_COLOR NRF_QUEUE_CONFIG_DEBUG_COLOR +#else + #define NRF_LOG_LEVEL 0 +#endif // NRF_QUEUE_CONFIG_LOG_ENABLED +#include "nrf_log.h" + +NRF_SECTION_DEF(nrf_queue, nrf_queue_t); + +#if NRF_QUEUE_CLI_CMDS +#include "nrf_cli.h" + +static void nrf_queue_status(nrf_cli_t const * p_cli, size_t argc, char **argv) +{ + UNUSED_PARAMETER(argv); + + if (nrf_cli_help_requested(p_cli)) + { + nrf_cli_help_print(p_cli, NULL, 0); + return; + } + + if (argc > 1) + { + nrf_cli_fprintf(p_cli, NRF_CLI_ERROR, "Bad argument count"); + return; + } + + uint32_t num_of_instances = NRF_SECTION_ITEM_COUNT(nrf_queue, nrf_queue_t); + uint32_t i; + + for (i = 0; i < num_of_instances; i++) + { + const nrf_queue_t * p_instance = NRF_SECTION_ITEM_GET(nrf_queue, nrf_queue_t, i); + + uint32_t element_size = p_instance->element_size; + uint32_t size = p_instance->size; + uint32_t max_util = nrf_queue_max_utilization_get(p_instance); + uint32_t util = nrf_queue_utilization_get(p_instance); + const char * p_name = p_instance->p_name; + nrf_cli_fprintf(p_cli, NRF_CLI_NORMAL, + "%s\r\n\t- Element size:\t%d\r\n" + "\t- Usage:\t%u%% (%u out of %u elements)\r\n" + "\t- Maximum:\t%u%% (%u out of %u elements)\r\n" + "\t- Mode:\t\t%s\r\n\r\n", + p_name, element_size, + 100ul * util/size, util,size, + 100ul * max_util/size, max_util,size, + (p_instance->mode == NRF_QUEUE_MODE_OVERFLOW) ? "Overflow" : "No overflow"); + + } +} +// Register "queue" command and its subcommands in CLI. +NRF_CLI_CREATE_STATIC_SUBCMD_SET(nrf_queue_commands) +{ + NRF_CLI_CMD(status, NULL, "Print status of queue instances.", nrf_queue_status), + NRF_CLI_SUBCMD_SET_END +}; + +NRF_CLI_CMD_REGISTER(queue, &nrf_queue_commands, "Commands for BALLOC management", nrf_queue_status); +#endif //NRF_QUEUE_CLI_CMDS + +/**@brief Get next element index. + * + * @param[in] p_queue Pointer to the queue instance. + * @param[in] idx Current index. + * + * @return Next element index. + */ +__STATIC_INLINE size_t nrf_queue_next_idx(nrf_queue_t const * p_queue, size_t idx) +{ + ASSERT(p_queue != NULL); + return (idx < p_queue->size) ? (idx + 1) : 0; +} + +/**@brief Get current queue utilization. This function assumes that this process will not be interrupted. + * + * @param[in] p_queue Pointer to the queue instance. + * + * @return Current queue utilization. + */ +__STATIC_INLINE size_t queue_utilization_get(nrf_queue_t const * p_queue) +{ + size_t front = p_queue->p_cb->front; + size_t back = p_queue->p_cb->back; + return (back >= front) ? (back - front) : (p_queue->size + 1 - front + back); +} + +bool nrf_queue_is_full(nrf_queue_t const * p_queue) +{ + ASSERT(p_queue != NULL); + size_t front = p_queue->p_cb->front; + size_t back = p_queue->p_cb->back; + + return (nrf_queue_next_idx(p_queue, back) == front); +} + +ret_code_t nrf_queue_push(nrf_queue_t const * p_queue, void const * p_element) +{ + ret_code_t status = NRF_SUCCESS; + + ASSERT(p_queue != NULL); + ASSERT(p_element != NULL); + + CRITICAL_REGION_ENTER(); + bool is_full = nrf_queue_is_full(p_queue); + + if (!is_full || (p_queue->mode == NRF_QUEUE_MODE_OVERFLOW)) + { + // Get write position. + size_t write_pos = p_queue->p_cb->back; + p_queue->p_cb->back = nrf_queue_next_idx(p_queue, p_queue->p_cb->back); + if (is_full) + { + // Overwrite the oldest element. + NRF_LOG_INST_WARNING(p_queue->p_log, "Queue full. Overwriting oldest element."); + p_queue->p_cb->front = nrf_queue_next_idx(p_queue, p_queue->p_cb->front); + } + + // Write a new element. + switch (p_queue->element_size) + { + case sizeof(uint8_t): + ((uint8_t *)p_queue->p_buffer)[write_pos] = *((uint8_t *)p_element); + break; + + case sizeof(uint16_t): + ((uint16_t *)p_queue->p_buffer)[write_pos] = *((uint16_t *)p_element); + break; + + case sizeof(uint32_t): + ((uint32_t *)p_queue->p_buffer)[write_pos] = *((uint32_t *)p_element); + break; + + case sizeof(uint64_t): + ((uint64_t *)p_queue->p_buffer)[write_pos] = *((uint64_t *)p_element); + break; + + default: + memcpy((void *)((size_t)p_queue->p_buffer + write_pos * p_queue->element_size), + p_element, + p_queue->element_size); + break; + } + + // Update utilization. + size_t utilization = queue_utilization_get(p_queue); + if (p_queue->p_cb->max_utilization < utilization) + { + p_queue->p_cb->max_utilization = utilization; + } + } + else + { + status = NRF_ERROR_NO_MEM; + } + + CRITICAL_REGION_EXIT(); + + NRF_LOG_INST_DEBUG(p_queue->p_log, "pushed element 0x%08X, status:%d", p_element, status); + return status; +} + +ret_code_t nrf_queue_generic_pop(nrf_queue_t const * p_queue, + void * p_element, + bool just_peek) +{ + ret_code_t status = NRF_SUCCESS; + + ASSERT(p_queue != NULL); + ASSERT(p_element != NULL); + + CRITICAL_REGION_ENTER(); + + if (!nrf_queue_is_empty(p_queue)) + { + // Get read position. + size_t read_pos = p_queue->p_cb->front; + + // Update next read position. + if (!just_peek) + { + p_queue->p_cb->front = nrf_queue_next_idx(p_queue, p_queue->p_cb->front); + } + + // Read element. + switch (p_queue->element_size) + { + case sizeof(uint8_t): + *((uint8_t *)p_element) = ((uint8_t *)p_queue->p_buffer)[read_pos]; + break; + + case sizeof(uint16_t): + *((uint16_t *)p_element) = ((uint16_t *)p_queue->p_buffer)[read_pos]; + break; + + case sizeof(uint32_t): + *((uint32_t *)p_element) = ((uint32_t *)p_queue->p_buffer)[read_pos]; + break; + + case sizeof(uint64_t): + *((uint64_t *)p_element) = ((uint64_t *)p_queue->p_buffer)[read_pos]; + break; + + default: + memcpy(p_element, + (void const *)((size_t)p_queue->p_buffer + read_pos * p_queue->element_size), + p_queue->element_size); + break; + } + } + else + { + status = NRF_ERROR_NOT_FOUND; + } + + CRITICAL_REGION_EXIT(); + NRF_LOG_INST_DEBUG(p_queue->p_log, "%s element 0x%08X, status:%d", + just_peek ? "peeked" : "popped", p_element, status); + return status; +} + +/**@brief Write elements to the queue. This function assumes that there is enough room in the queue + * to write the requested number of elements and that this process will not be interrupted. + * + * @param[in] p_queue Pointer to the nrf_queue_t instance. + * @param[in] p_data Pointer to the buffer with elements to write. + * @param[in] element_count Number of elements to write. + */ +static void queue_write(nrf_queue_t const * p_queue, void const * p_data, uint32_t element_count) +{ + size_t prev_available = nrf_queue_available_get(p_queue); + size_t continuous = p_queue->size + 1 - p_queue->p_cb->back; + void * p_write_ptr = (void *)((size_t)p_queue->p_buffer + + p_queue->p_cb->back * p_queue->element_size); + if (element_count <= continuous) + { + memcpy(p_write_ptr, + p_data, + element_count * p_queue->element_size); + + p_queue->p_cb->back = ((p_queue->p_cb->back + element_count) <= p_queue->size) + ? (p_queue->p_cb->back + element_count) + : 0; + } + else + { + size_t first_write_length = continuous * p_queue->element_size; + memcpy(p_write_ptr, + p_data, + first_write_length); + + size_t elements_left = element_count - continuous; + memcpy(p_queue->p_buffer, + (void const *)((size_t)p_data + first_write_length), + elements_left * p_queue->element_size); + + p_queue->p_cb->back = elements_left; + if (prev_available < element_count) + { + // Overwrite the oldest elements. + p_queue->p_cb->front = nrf_queue_next_idx(p_queue, p_queue->p_cb->back); + } + } + + // Update utilization. + size_t utilization = queue_utilization_get(p_queue); + if (p_queue->p_cb->max_utilization < utilization) + { + p_queue->p_cb->max_utilization = utilization; + } +} + +ret_code_t nrf_queue_write(nrf_queue_t const * p_queue, + void const * p_data, + size_t element_count) +{ + ret_code_t status = NRF_SUCCESS; + + ASSERT(p_queue != NULL); + ASSERT(p_data != NULL); + ASSERT(element_count <= p_queue->size); + + if (element_count == 0) + { + return NRF_SUCCESS; + } + + CRITICAL_REGION_ENTER(); + + if ((nrf_queue_available_get(p_queue) >= element_count) + || (p_queue->mode == NRF_QUEUE_MODE_OVERFLOW)) + { + queue_write(p_queue, p_data, element_count); + } + else + { + status = NRF_ERROR_NO_MEM; + } + + CRITICAL_REGION_EXIT(); + + NRF_LOG_INST_DEBUG(p_queue->p_log, "Write %d elements (start address: 0x%08X), status:%d", + element_count, p_data, status); + return status; +} + + +size_t nrf_queue_in(nrf_queue_t const * p_queue, + void const * p_data, + size_t element_count) +{ + ASSERT(p_queue != NULL); + ASSERT(p_data != NULL); + + size_t req_element_count = element_count; + + if (element_count == 0) + { + return 0; + } + + CRITICAL_REGION_ENTER(); + + if (p_queue->mode == NRF_QUEUE_MODE_OVERFLOW) + { + element_count = MIN(element_count, p_queue->size); + } + else + { + size_t available = nrf_queue_available_get(p_queue); + element_count = MIN(element_count, available); + } + + queue_write(p_queue, p_data, element_count); + + CRITICAL_REGION_EXIT(); + + NRF_LOG_INST_DEBUG(p_queue->p_log, "Put in %d elements (start address: 0x%08X), requested :%d", + element_count, p_data, req_element_count); + + return element_count; +} + +/**@brief Read elements from the queue. This function assumes that there are enough elements + * in the queue to read and that this process will not be interrupted. + * + * @param[in] p_queue Pointer to the nrf_queue_t instance. + * @param[out] p_data Pointer to the buffer where elements will be copied. + * @param[in] element_count Number of elements to read. + */ +static void queue_read(nrf_queue_t const * p_queue, void * p_data, uint32_t element_count) +{ + size_t front = p_queue->p_cb->front; + size_t back = p_queue->p_cb->back; + size_t continuous = (front <= back) ? (back - front) : (p_queue->size + 1 - front); + void const * p_read_ptr = (void const *)((size_t)p_queue->p_buffer + + front * p_queue->element_size); + + if (element_count <= continuous) + { + memcpy(p_data, + p_read_ptr, + element_count * p_queue->element_size); + + p_queue->p_cb->front = ((front + element_count) <= p_queue->size) + ? (front + element_count) + : 0; + } + else + { + size_t first_read_length = continuous * p_queue->element_size; + memcpy(p_data, + p_read_ptr, + first_read_length); + + size_t elements_left = element_count - continuous; + memcpy((void *)((size_t)p_data + first_read_length), + p_queue->p_buffer, + elements_left * p_queue->element_size); + + p_queue->p_cb->front = elements_left; + } +} + +ret_code_t nrf_queue_read(nrf_queue_t const * p_queue, + void * p_data, + size_t element_count) +{ + ret_code_t status = NRF_SUCCESS; + + ASSERT(p_queue != NULL); + ASSERT(p_data != NULL); + + if (element_count == 0) + { + return NRF_SUCCESS; + } + + CRITICAL_REGION_ENTER(); + + if (element_count <= queue_utilization_get(p_queue)) + { + queue_read(p_queue, p_data, element_count); + } + else + { + status = NRF_ERROR_NOT_FOUND; + } + + CRITICAL_REGION_EXIT(); + + NRF_LOG_INST_DEBUG(p_queue->p_log, "Read %d elements (start address: 0x%08X), status :%d", + element_count, p_data, status); + return status; +} + +size_t nrf_queue_out(nrf_queue_t const * p_queue, + void * p_data, + size_t element_count) +{ + ASSERT(p_queue != NULL); + ASSERT(p_data != NULL); + + size_t req_element_count = element_count; + + if (element_count == 0) + { + return 0; + } + + CRITICAL_REGION_ENTER(); + + size_t utilization = queue_utilization_get(p_queue); + element_count = MIN(element_count, utilization); + + queue_read(p_queue, p_data, element_count); + + CRITICAL_REGION_EXIT(); + + NRF_LOG_INST_DEBUG(p_queue->p_log, "Out %d elements (start address: 0x%08X), requested :%d", + element_count, p_data, req_element_count); + return element_count; +} + +void nrf_queue_reset(nrf_queue_t const * p_queue) +{ + ASSERT(p_queue != NULL); + + CRITICAL_REGION_ENTER(); + + memset(p_queue->p_cb, 0, sizeof(nrf_queue_cb_t)); + + CRITICAL_REGION_EXIT(); + + NRF_LOG_INST_DEBUG(p_queue->p_log, "Reset"); +} + +size_t nrf_queue_utilization_get(nrf_queue_t const * p_queue) +{ + size_t utilization; + ASSERT(p_queue != NULL); + + CRITICAL_REGION_ENTER(); + + utilization = queue_utilization_get(p_queue); + + CRITICAL_REGION_EXIT(); + + return utilization; +} + +bool nrf_queue_is_empty(nrf_queue_t const * p_queue) +{ + ASSERT(p_queue != NULL); + size_t front = p_queue->p_cb->front; + size_t back = p_queue->p_cb->back; + return (front == back); +} + +size_t nrf_queue_available_get(nrf_queue_t const * p_queue) +{ + ASSERT(p_queue != NULL); + return p_queue->size - nrf_queue_utilization_get(p_queue); +} + +size_t nrf_queue_max_utilization_get(nrf_queue_t const * p_queue) +{ + ASSERT(p_queue != NULL); + return p_queue->p_cb->max_utilization; +} + +void nrf_queue_max_utilization_reset(nrf_queue_t const * p_queue) +{ + ASSERT(p_queue != NULL); + p_queue->p_cb->max_utilization = 0; +} + + +#endif // NRF_MODULE_ENABLED(NRF_QUEUE) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/queue/nrf_queue.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/queue/nrf_queue.h new file mode 100644 index 00000000000..1ba2a9272bd --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/queue/nrf_queue.h @@ -0,0 +1,429 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/** +* @defgroup nrf_queue Queue module +* @{ +* @ingroup app_common +* @brief Functions that handle the queue instances. +*/ + +#ifndef NRF_QUEUE_H__ +#define NRF_QUEUE_H__ + +#include +#include +#include +#include "nrf_assert.h" +#include "sdk_errors.h" +#include "app_util.h" +#include "app_util_platform.h" +#include "nrf_log_instance.h" +#include "nrf_section.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @brief Name of the module used for logger messaging. + */ +#define NRF_QUEUE_LOG_NAME queue + +/**@brief Queue control block. */ +typedef struct +{ + volatile size_t front; //!< Queue front index. + volatile size_t back; //!< Queue back index. + size_t max_utilization; //!< Maximum utilization of the queue. +} nrf_queue_cb_t; + +/**@brief Supported queue modes. */ +typedef enum +{ + NRF_QUEUE_MODE_OVERFLOW, //!< If the queue is full, new element will overwrite the oldest. + NRF_QUEUE_MODE_NO_OVERFLOW, //!< If the queue is full, new element will not be accepted. +} nrf_queue_mode_t; + +/**@brief Instance of the queue. */ +typedef struct +{ + nrf_queue_cb_t * p_cb; //!< Pointer to the instance control block. + void * p_buffer; //!< Pointer to the memory that is used as storage. + size_t size; //!< Size of the queue. + size_t element_size; //!< Size of one element. + nrf_queue_mode_t mode; //!< Mode of the queue. +#if NRF_QUEUE_CLI_CMDS + const char * p_name; //!< Pointer to string with queue name. +#endif + NRF_LOG_INSTANCE_PTR_DECLARE(p_log) //!< Pointer to instance of the logger object (Conditionally compiled). +} nrf_queue_t; + +#if NRF_QUEUE_CLI_CMDS +#define __NRF_QUEUE_ASSIGN_POOL_NAME(_name) .p_name = STRINGIFY(_name), +#else +#define __NRF_QUEUE_ASSIGN_POOL_NAME(_name) +#endif +/**@brief Create a queue instance. + * + * @note This macro reserves memory for the given queue instance. + * + * @param[in] _type Type which is stored. + * @param[in] _name Name of the queue. + * @param[in] _size Size of the queue. + * @param[in] _mode Mode of the queue. + */ +#define NRF_QUEUE_DEF(_type, _name, _size, _mode) \ + static _type CONCAT_2(_name, _nrf_queue_buffer[(_size) + 1]); \ + static nrf_queue_cb_t CONCAT_2(_name, _nrf_queue_cb); \ + NRF_LOG_INSTANCE_REGISTER(NRF_QUEUE_LOG_NAME, _name, \ + NRF_QUEUE_CONFIG_INFO_COLOR, \ + NRF_QUEUE_CONFIG_DEBUG_COLOR, \ + NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL, \ + NRF_QUEUE_CONFIG_LOG_ENABLED ? \ + NRF_QUEUE_CONFIG_LOG_LEVEL : NRF_LOG_SEVERITY_NONE); \ + NRF_SECTION_ITEM_REGISTER(nrf_queue, const nrf_queue_t _name) = \ + { \ + .p_cb = &CONCAT_2(_name, _nrf_queue_cb), \ + .p_buffer = CONCAT_2(_name,_nrf_queue_buffer), \ + .size = (_size), \ + .element_size = sizeof(_type), \ + .mode = _mode, \ + __NRF_QUEUE_ASSIGN_POOL_NAME(_name) \ + NRF_LOG_INSTANCE_PTR_INIT(p_log, NRF_QUEUE_LOG_NAME, _name) \ + } + +/**@brief Declare a queue interface. + * + * @param[in] _type Type which is stored. + * @param[in] _name Name of the queue. + */ +#define NRF_QUEUE_INTERFACE_DEC(_type, _name) \ + ret_code_t _name##_push(_type const * p_element); \ + ret_code_t _name##_pop(_type * p_element); \ + ret_code_t _name##_peek(_type * p_element); \ + ret_code_t _name##_write(_type const * p_data, \ + size_t element_count); \ + ret_code_t _name##_read(_type * p_data, \ + size_t element_count); \ + size_t _name##_out(_type * p_data, \ + size_t element_count); \ + size_t _name##_in(_type const * p_data, \ + size_t element_count); \ + bool _name##_is_full(void); \ + bool _name##_is_empty(void); \ + size_t _name##_utilization_get(void); \ + size_t _name##_available_get(void); \ + size_t _name##_max_utilization_get(void); \ + void _name##_reset(void) + +/**@brief Define a queue interface. + * + * @param[in] _type Type which is stored. + * @param[in] _name Name of the queue. + * @param[in] _p_queue Queue instance. + */ +#define NRF_QUEUE_INTERFACE_DEF(_type, _name, _p_queue) \ + ret_code_t _name##_push(_type const * p_element) \ + { \ + GCC_PRAGMA("GCC diagnostic push") \ + GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ + ASSERT((_p_queue) != NULL); \ + ASSERT((_p_queue)->element_size == sizeof(_type)); \ + GCC_PRAGMA("GCC diagnostic pop") \ + return nrf_queue_push((_p_queue), p_element); \ + } \ + ret_code_t _name##_pop(_type * p_element) \ + { \ + GCC_PRAGMA("GCC diagnostic push") \ + GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ + ASSERT((_p_queue) != NULL); \ + ASSERT((_p_queue)->element_size == sizeof(_type)); \ + GCC_PRAGMA("GCC diagnostic pop") \ + return nrf_queue_pop((_p_queue), p_element); \ + } \ + ret_code_t _name##_peek(_type * p_element) \ + { \ + GCC_PRAGMA("GCC diagnostic push") \ + GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ + ASSERT((_p_queue) != NULL); \ + ASSERT((_p_queue)->element_size == sizeof(_type)); \ + GCC_PRAGMA("GCC diagnostic pop") \ + return nrf_queue_peek((_p_queue), p_element); \ + } \ + ret_code_t _name##_write(_type const * p_data, \ + size_t element_count) \ + { \ + GCC_PRAGMA("GCC diagnostic push") \ + GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ + ASSERT((_p_queue) != NULL); \ + ASSERT((_p_queue)->element_size == sizeof(_type)); \ + GCC_PRAGMA("GCC diagnostic pop") \ + return nrf_queue_write((_p_queue), p_data, element_count); \ + } \ + ret_code_t _name##_read(_type * p_data, \ + size_t element_count) \ + { \ + GCC_PRAGMA("GCC diagnostic push") \ + GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ + ASSERT((_p_queue) != NULL); \ + ASSERT((_p_queue)->element_size == sizeof(_type)); \ + GCC_PRAGMA("GCC diagnostic pop") \ + return nrf_queue_read((_p_queue), p_data, element_count); \ + } \ + size_t _name##_in(_type const * p_data, \ + size_t element_count) \ + { \ + GCC_PRAGMA("GCC diagnostic push") \ + GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ + ASSERT((_p_queue) != NULL); \ + ASSERT((_p_queue)->element_size == sizeof(_type)); \ + GCC_PRAGMA("GCC diagnostic pop") \ + return nrf_queue_in((_p_queue), p_data, element_count); \ + } \ + size_t _name##_out(_type * p_data, \ + size_t element_count) \ + { \ + GCC_PRAGMA("GCC diagnostic push") \ + GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ + ASSERT((_p_queue) != NULL); \ + ASSERT((_p_queue)->element_size == sizeof(_type)); \ + GCC_PRAGMA("GCC diagnostic pop") \ + return nrf_queue_out((_p_queue), p_data, element_count); \ + } \ + bool _name##_is_full(void) \ + { \ + GCC_PRAGMA("GCC diagnostic push") \ + GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ + ASSERT((_p_queue) != NULL); \ + return nrf_queue_is_full(_p_queue); \ + GCC_PRAGMA("GCC diagnostic pop") \ + } \ + bool _name##_is_empty(void) \ + { \ + GCC_PRAGMA("GCC diagnostic push") \ + GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ + ASSERT((_p_queue) != NULL); \ + GCC_PRAGMA("GCC diagnostic pop") \ + return nrf_queue_is_empty(_p_queue); \ + } \ + size_t _name##_utilization_get(void) \ + { \ + GCC_PRAGMA("GCC diagnostic push") \ + GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ + ASSERT((_p_queue) != NULL); \ + GCC_PRAGMA("GCC diagnostic pop") \ + return nrf_queue_utilization_get(_p_queue); \ + } \ + size_t _name##_available_get(void) \ + { \ + GCC_PRAGMA("GCC diagnostic push") \ + GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ + ASSERT((_p_queue) != NULL); \ + GCC_PRAGMA("GCC diagnostic pop") \ + return nrf_queue_available_get(_p_queue); \ + } \ + size_t _name##_max_utilization_get(void) \ + { \ + GCC_PRAGMA("GCC diagnostic push") \ + GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ + ASSERT((_p_queue) != NULL); \ + GCC_PRAGMA("GCC diagnostic pop") \ + return nrf_queue_max_utilization_get(_p_queue); \ + } \ + void _name##_reset(void) \ + { \ + GCC_PRAGMA("GCC diagnostic push") \ + GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ + ASSERT((_p_queue) != NULL); \ + GCC_PRAGMA("GCC diagnostic pop") \ + nrf_queue_reset(_p_queue); \ + } + +/**@brief Function for pushing an element to the end of queue. + * + * @param[in] p_queue Pointer to the nrf_queue_t instance. + * @param[in] p_element Pointer to the element that will be stored in the queue. + * + * @return NRF_SUCCESS If an element has been successfully added. + * @return NRF_ERROR_NO_MEM If the queue is full (only in @ref NRF_QUEUE_MODE_NO_OVERFLOW). + */ +ret_code_t nrf_queue_push(nrf_queue_t const * p_queue, void const * p_element); + +/**@brief Generic pop implementation. + * + * @param[in] p_queue Pointer to the nrf_queue_t instance. + * @param[out] p_element Pointer where the element will be copied. + * @param[out] just_peek If true, the returned element will not be removed from queue. + * + * @return NRF_SUCCESS If an element was returned. + * @return NRF_ERROR_NOT_FOUND If there are no more elements in the queue. + */ +ret_code_t nrf_queue_generic_pop(nrf_queue_t const * p_queue, + void * p_element, + bool just_peek); + +/**@brief Pop element from the front of the queue. + * + * @param[in] _p_queue Pointer to the nrf_queue_t instance. + * @param[out] _p_element Pointer where the element will be copied. + * + * @return NRF_SUCCESS If an element was returned. + * @return NRF_ERROR_NOT_FOUND If there are no more elements in the queue. + */ +#define nrf_queue_pop(_p_queue, _p_element) nrf_queue_generic_pop((_p_queue), (_p_element), false) + +/**@brief Peek element from the front of the queue. + * + * @param[in] _p_queue Pointer to the nrf_queue_t instance. + * @param[out] _p_element Pointer where the element will be copied. + * + * @return NRF_SUCCESS If an element was returned. + * @return NRF_ERROR_NOT_FOUND If there are no more elements in the queue. + */ +#define nrf_queue_peek(_p_queue, _p_element) nrf_queue_generic_pop((_p_queue), (_p_element), true) + +/**@brief Function for writing elements to the queue. + * + * @param[in] p_queue Pointer to the nrf_queue_t instance. + * @param[in] p_data Pointer to the buffer with elements to write. + * @param[in] element_count Number of elements to write. + * + * @return NRF_SUCCESS If an element was written. + * @return NRF_ERROR_NO_MEM There is not enough space in the queue. No element was written. + */ +ret_code_t nrf_queue_write(nrf_queue_t const * p_queue, + void const * p_data, + size_t element_count); + +/**@brief Function for writing a portion of elements to the queue. + * + * @param[in] p_queue Pointer to the nrf_queue_t instance. + * @param[in] p_data Pointer to the buffer with elements to write. + * @param[in] element_count Number of elements to write. + * + * @return The number of added elements. + */ +size_t nrf_queue_in(nrf_queue_t const * p_queue, + void const * p_data, + size_t element_count); + +/**@brief Function for reading elements from the queue. + * + * @param[in] p_queue Pointer to the nrf_queue_t instance. + * @param[out] p_data Pointer to the buffer where elements will be copied. + * @param[in] element_count Number of elements to read. + * + * @return NRF_SUCCESS If an element was returned. + * @return NRF_ERROR_NOT_FOUND There is not enough elements in the queue. + */ +ret_code_t nrf_queue_read(nrf_queue_t const * p_queue, + void * p_data, + size_t element_count); + +/**@brief Function for reading a portion of elements from the queue. + * + * @param[in] p_queue Pointer to the nrf_queue_t instance. + * @param[out] p_data Pointer to the buffer where elements will be copied. + * @param[in] element_count Number of elements to read. + * + * @return The number of read elements. + */ +size_t nrf_queue_out(nrf_queue_t const * p_queue, + void * p_data, + size_t element_count); + +/**@brief Function for checking if the queue is full. + * + * @param[in] p_queue Pointer to the queue instance. + * + * @return True if the queue is full. + */ +bool nrf_queue_is_full(nrf_queue_t const * p_queue); + +/**@brief Function for checking if the queue is empty. + * + * @param[in] p_queue Pointer to the queue instance. + * + * @return True if the queue is empty. + */ +bool nrf_queue_is_empty(nrf_queue_t const * p_queue); + +/**@brief Function for getting the current queue utilization. + * + * @param[in] p_queue Pointer to the queue instance. + * + * @return Current queue utilization. + */ +size_t nrf_queue_utilization_get(nrf_queue_t const * p_queue); + +/**@brief Function for getting the size of available space. + * + * @param[in] p_queue Pointer to the queue instance. + * + * @return Size of available space. + */ +size_t nrf_queue_available_get(nrf_queue_t const * p_queue); + +/**@brief Function for getting the maximal queue utilization. + * + * @param[in] p_queue Pointer to the queue instance. + * + * @return Maximal queue utilization. + */ +size_t nrf_queue_max_utilization_get(nrf_queue_t const * p_queue); + +/**@brief Function for resetting the maximal queue utilization. + * + * @param[in] p_queue Pointer to the queue instance. + * + */ +void nrf_queue_max_utilization_reset(nrf_queue_t const * p_queue); + +/**@brief Function for resetting the queue state. + * + * @param[in] p_queue Pointer to the queue instance. + */ +void nrf_queue_reset(nrf_queue_t const * p_queue); + +#ifdef __cplusplus +} +#endif + +#endif // NRF_QUEUE_H__ +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/apply_old_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/apply_old_config.h deleted file mode 100644 index 62ef4755fa2..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/apply_old_config.h +++ /dev/null @@ -1,1385 +0,0 @@ -/** - * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - - -#ifndef APPLY_OLD_CONFIG_H__ -#define APPLY_OLD_CONFIG_H__ - -//------------------------------------------------------------------------------ -// Peripheral Resource Sharing (PRS) - -#if defined(PERIPHERAL_RESOURCE_SHARING_ENABLED) - -#define NRFX_PRS_ENABLED PERIPHERAL_RESOURCE_SHARING_ENABLED -#define NRFX_PRS_BOX_0_ENABLED PERIPHERAL_RESOURCE_SHARING_ENABLED -#define NRFX_PRS_BOX_1_ENABLED PERIPHERAL_RESOURCE_SHARING_ENABLED -#define NRFX_PRS_BOX_2_ENABLED PERIPHERAL_RESOURCE_SHARING_ENABLED -#define NRFX_PRS_BOX_3_ENABLED PERIPHERAL_RESOURCE_SHARING_ENABLED -#define NRFX_PRS_BOX_4_ENABLED PERIPHERAL_RESOURCE_SHARING_ENABLED - -#if defined(COMMON_CONFIG_LOG_ENABLED) -#undef NRFX_PRS_CONFIG_LOG_ENABLED -#define NRFX_PRS_CONFIG_LOG_ENABLED COMMON_CONFIG_LOG_ENABLED -#endif -#if defined(COMMON_CONFIG_LOG_LEVEL) -#undef NRFX_PRS_CONFIG_LOG_LEVEL -#define NRFX_PRS_CONFIG_LOG_LEVEL COMMON_CONFIG_LOG_LEVEL -#endif -#if defined(COMMON_CONFIG_INFO_COLOR) -#undef NRFX_PRS_CONFIG_INFO_COLOR -#define NRFX_PRS_CONFIG_INFO_COLOR COMMON_CONFIG_INFO_COLOR -#endif -#if defined(COMMON_CONFIG_DEBUG_COLOR) -#undef NRFX_PRS_CONFIG_DEBUG_COLOR -#define NRFX_PRS_CONFIG_DEBUG_COLOR COMMON_CONFIG_DEBUG_COLOR -#endif - -#endif // defined(PERIPHERAL_RESOURCE_SHARING_ENABLED) - -//------------------------------------------------------------------------------ -// CLOCK - -#if defined(CLOCK_ENABLED) - -#undef NRFX_CLOCK_ENABLED -#define NRFX_CLOCK_ENABLED CLOCK_ENABLED - -#if defined(CLOCK_CONFIG_LF_SRC) -#undef NRFX_CLOCK_CONFIG_LF_SRC -#define NRFX_CLOCK_CONFIG_LF_SRC CLOCK_CONFIG_LF_SRC -#endif -#if defined(CLOCK_CONFIG_IRQ_PRIORITY) -#undef NRFX_CLOCK_CONFIG_IRQ_PRIORITY -#define NRFX_CLOCK_CONFIG_IRQ_PRIORITY CLOCK_CONFIG_IRQ_PRIORITY -#endif - -#if defined(CLOCK_CONFIG_LOG_ENABLED) -#undef NRFX_CLOCK_CONFIG_LOG_ENABLED -#define NRFX_CLOCK_CONFIG_LOG_ENABLED CLOCK_CONFIG_LOG_ENABLED -#endif -#if defined(CLOCK_CONFIG_LOG_LEVEL) -#undef NRFX_CLOCK_CONFIG_LOG_LEVEL -#define NRFX_CLOCK_CONFIG_LOG_LEVEL CLOCK_CONFIG_LOG_LEVEL -#endif -#if defined(CLOCK_CONFIG_INFO_COLOR) -#undef NRFX_CLOCK_CONFIG_INFO_COLOR -#define NRFX_CLOCK_CONFIG_INFO_COLOR CLOCK_CONFIG_INFO_COLOR -#endif -#if defined(CLOCK_CONFIG_DEBUG_COLOR) -#undef NRFX_CLOCK_CONFIG_DEBUG_COLOR -#define NRFX_CLOCK_CONFIG_DEBUG_COLOR CLOCK_CONFIG_DEBUG_COLOR -#endif - -#endif // defined(CLOCK_ENABLED) - -//------------------------------------------------------------------------------ -// COMP - -#if defined(COMP_ENABLED) - -#undef NRFX_COMP_ENABLED -#define NRFX_COMP_ENABLED COMP_ENABLED - -#if defined(COMP_CONFIG_REF) -#undef NRFX_COMP_CONFIG_REF -#define NRFX_COMP_CONFIG_REF COMP_CONFIG_REF -#endif -#if defined(COMP_CONFIG_MAIN_MODE) -#undef NRFX_COMP_CONFIG_MAIN_MODE -#define NRFX_COMP_CONFIG_MAIN_MODE COMP_CONFIG_MAIN_MODE -#endif -#if defined(COMP_CONFIG_SPEED_MODE) -#undef NRFX_COMP_CONFIG_SPEED_MODE -#define NRFX_COMP_CONFIG_SPEED_MODE COMP_CONFIG_SPEED_MODE -#endif -#if defined(COMP_CONFIG_HYST) -#undef NRFX_COMP_CONFIG_HYST -#define NRFX_COMP_CONFIG_HYST COMP_CONFIG_HYST -#endif -#if defined(COMP_CONFIG_ISOURCE) -#undef NRFX_COMP_CONFIG_ISOURCE -#define NRFX_COMP_CONFIG_ISOURCE COMP_CONFIG_ISOURCE -#endif -#if defined(COMP_CONFIG_INPUT) -#undef NRFX_COMP_CONFIG_INPUT -#define NRFX_COMP_CONFIG_INPUT COMP_CONFIG_INPUT -#endif -#if defined(COMP_CONFIG_IRQ_PRIORITY) -#undef NRFX_COMP_CONFIG_IRQ_PRIORITY -#define NRFX_COMP_CONFIG_IRQ_PRIORITY COMP_CONFIG_IRQ_PRIORITY -#endif - -#if defined(COMP_CONFIG_LOG_ENABLED) -#undef NRFX_COMP_CONFIG_LOG_ENABLED -#define NRFX_COMP_CONFIG_LOG_ENABLED COMP_CONFIG_LOG_ENABLED -#endif -#if defined(COMP_CONFIG_LOG_LEVEL) -#undef NRFX_COMP_CONFIG_LOG_LEVEL -#define NRFX_COMP_CONFIG_LOG_LEVEL COMP_CONFIG_LOG_LEVEL -#endif -#if defined(COMP_CONFIG_INFO_COLOR) -#undef NRFX_COMP_CONFIG_INFO_COLOR -#define NRFX_COMP_CONFIG_INFO_COLOR COMP_CONFIG_INFO_COLOR -#endif -#if defined(COMP_CONFIG_DEBUG_COLOR) -#undef NRFX_COMP_CONFIG_DEBUG_COLOR -#define NRFX_COMP_CONFIG_DEBUG_COLOR COMP_CONFIG_DEBUG_COLOR -#endif - -#endif // defined(COMP_ENABLED) - -//------------------------------------------------------------------------------ -// GPIOTE - -#if defined(GPIOTE_ENABLED) - -#undef NRFX_GPIOTE_ENABLED -#define NRFX_GPIOTE_ENABLED GPIOTE_ENABLED - -#if defined(GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS) -#undef NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS -#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS -#endif - -#if defined(GPIOTE_CONFIG_IRQ_PRIORITY) -#undef NRFX_GPIOTE_CONFIG_IRQ_PRIORITY -#define NRFX_GPIOTE_CONFIG_IRQ_PRIORITY GPIOTE_CONFIG_IRQ_PRIORITY -#endif - -#if defined(GPIOTE_CONFIG_LOG_ENABLED) -#undef NRFX_GPIOTE_CONFIG_LOG_ENABLED -#define NRFX_GPIOTE_CONFIG_LOG_ENABLED GPIOTE_CONFIG_LOG_ENABLED -#endif -#if defined(GPIOTE_CONFIG_LOG_LEVEL) -#undef NRFX_GPIOTE_CONFIG_LOG_LEVEL -#define NRFX_GPIOTE_CONFIG_LOG_LEVEL GPIOTE_CONFIG_LOG_LEVEL -#endif -#if defined(GPIOTE_CONFIG_INFO_COLOR) -#undef NRFX_GPIOTE_CONFIG_INFO_COLOR -#define NRFX_GPIOTE_CONFIG_INFO_COLOR GPIOTE_CONFIG_INFO_COLOR -#endif -#if defined(GPIOTE_CONFIG_DEBUG_COLOR) -#undef NRFX_GPIOTE_CONFIG_DEBUG_COLOR -#define NRFX_GPIOTE_CONFIG_DEBUG_COLOR GPIOTE_CONFIG_DEBUG_COLOR -#endif - -#endif // defined(GPIOTE_ENABLED) - -//------------------------------------------------------------------------------ -// I2S - -#if defined(I2S_ENABLED) - -#undef NRFX_I2S_ENABLED -#define NRFX_I2S_ENABLED I2S_ENABLED - -#if defined(I2S_CONFIG_SCK_PIN) -#undef NRFX_I2S_CONFIG_SCK_PIN -#define NRFX_I2S_CONFIG_SCK_PIN I2S_CONFIG_SCK_PIN -#endif -#if defined(I2S_CONFIG_LRCK_PIN) -#undef NRFX_I2S_CONFIG_LRCK_PIN -#define NRFX_I2S_CONFIG_LRCK_PIN I2S_CONFIG_LRCK_PIN -#endif -#if defined(I2S_CONFIG_MCK_PIN) -#undef NRFX_I2S_CONFIG_MCK_PIN -#define NRFX_I2S_CONFIG_MCK_PIN I2S_CONFIG_MCK_PIN -#endif -#if defined(I2S_CONFIG_SDOUT_PIN) -#undef NRFX_I2S_CONFIG_SDOUT_PIN -#define NRFX_I2S_CONFIG_SDOUT_PIN I2S_CONFIG_SDOUT_PIN -#endif -#if defined(I2S_CONFIG_SDIN_PIN) -#undef NRFX_I2S_CONFIG_SDIN_PIN -#define NRFX_I2S_CONFIG_SDIN_PIN I2S_CONFIG_SDIN_PIN -#endif - -#if defined(I2S_CONFIG_MASTER) -#undef NRFX_I2S_CONFIG_MASTER -#define NRFX_I2S_CONFIG_MASTER I2S_CONFIG_MASTER -#endif -#if defined(I2S_CONFIG_FORMAT) -#undef NRFX_I2S_CONFIG_FORMAT -#define NRFX_I2S_CONFIG_FORMAT I2S_CONFIG_FORMAT -#endif -#if defined(I2S_CONFIG_ALIGN) -#undef NRFX_I2S_CONFIG_ALIGN -#define NRFX_I2S_CONFIG_ALIGN I2S_CONFIG_ALIGN -#endif -#if defined(I2S_CONFIG_SWIDTH) -#undef NRFX_I2S_CONFIG_SWIDTH -#define NRFX_I2S_CONFIG_SWIDTH I2S_CONFIG_SWIDTH -#endif -#if defined(I2S_CONFIG_CHANNELS) -#undef NRFX_I2S_CONFIG_CHANNELS -#define NRFX_I2S_CONFIG_CHANNELS I2S_CONFIG_CHANNELS -#endif -#if defined(I2S_CONFIG_MCK_SETUP) -#undef NRFX_I2S_CONFIG_MCK_SETUP -#define NRFX_I2S_CONFIG_MCK_SETUP I2S_CONFIG_MCK_SETUP -#endif -#if defined(I2S_CONFIG_RATIO) -#undef NRFX_I2S_CONFIG_RATIO -#define NRFX_I2S_CONFIG_RATIO I2S_CONFIG_RATIO -#endif -#if defined(I2S_CONFIG_IRQ_PRIORITY) -#undef NRFX_I2S_CONFIG_IRQ_PRIORITY -#define NRFX_I2S_CONFIG_IRQ_PRIORITY I2S_CONFIG_IRQ_PRIORITY -#endif - -#if defined(I2S_CONFIG_LOG_ENABLED) -#undef NRFX_I2S_CONFIG_LOG_ENABLED -#define NRFX_I2S_CONFIG_LOG_ENABLED I2S_CONFIG_LOG_ENABLED -#endif -#if defined(I2S_CONFIG_LOG_LEVEL) -#undef NRFX_I2S_CONFIG_LOG_LEVEL -#define NRFX_I2S_CONFIG_LOG_LEVEL I2S_CONFIG_LOG_LEVEL -#endif -#if defined(I2S_CONFIG_INFO_COLOR) -#undef NRFX_I2S_CONFIG_INFO_COLOR -#define NRFX_I2S_CONFIG_INFO_COLOR I2S_CONFIG_INFO_COLOR -#endif -#if defined(I2S_CONFIG_DEBUG_COLOR) -#undef NRFX_I2S_CONFIG_DEBUG_COLOR -#define NRFX_I2S_CONFIG_DEBUG_COLOR I2S_CONFIG_DEBUG_COLOR -#endif - -#endif // defined(I2S_ENABLED) - -//------------------------------------------------------------------------------ -// LPCOMP - -#if defined(LPCOMP_ENABLED) - -#undef NRFX_LPCOMP_ENABLED -#define NRFX_LPCOMP_ENABLED LPCOMP_ENABLED - -#if defined(LPCOMP_CONFIG_REFERENCE) -#undef NRFX_LPCOMP_CONFIG_REFERENCE -#define NRFX_LPCOMP_CONFIG_REFERENCE LPCOMP_CONFIG_REFERENCE -#endif -#if defined(LPCOMP_CONFIG_DETECTION) -#undef NRFX_LPCOMP_CONFIG_DETECTION -#define NRFX_LPCOMP_CONFIG_DETECTION LPCOMP_CONFIG_DETECTION -#endif -#if defined(LPCOMP_CONFIG_INPUT) -#undef NRFX_LPCOMP_CONFIG_INPUT -#define NRFX_LPCOMP_CONFIG_INPUT LPCOMP_CONFIG_INPUT -#endif -#if defined(LPCOMP_CONFIG_HYST) -#undef NRFX_LPCOMP_CONFIG_HYST -#define NRFX_LPCOMP_CONFIG_HYST LPCOMP_CONFIG_HYST -#endif -#if defined(LPCOMP_CONFIG_IRQ_PRIORITY) -#undef NRFX_LPCOMP_CONFIG_IRQ_PRIORITY -#define NRFX_LPCOMP_CONFIG_IRQ_PRIORITY LPCOMP_CONFIG_IRQ_PRIORITY -#endif - -#if defined(LPCOMP_CONFIG_LOG_ENABLED) -#undef NRFX_LPCOMP_CONFIG_LOG_ENABLED -#define NRFX_LPCOMP_CONFIG_LOG_ENABLED LPCOMP_CONFIG_LOG_ENABLED -#endif -#if defined(LPCOMP_CONFIG_LOG_LEVEL) -#undef NRFX_LPCOMP_CONFIG_LOG_LEVEL -#define NRFX_LPCOMP_CONFIG_LOG_LEVEL LPCOMP_CONFIG_LOG_LEVEL -#endif -#if defined(LPCOMP_CONFIG_INFO_COLOR) -#undef NRFX_LPCOMP_CONFIG_INFO_COLOR -#define NRFX_LPCOMP_CONFIG_INFO_COLOR LPCOMP_CONFIG_INFO_COLOR -#endif -#if defined(LPCOMP_CONFIG_DEBUG_COLOR) -#undef NRFX_LPCOMP_CONFIG_DEBUG_COLOR -#define NRFX_LPCOMP_CONFIG_DEBUG_COLOR LPCOMP_CONFIG_DEBUG_COLOR -#endif - -#endif // defined(LPCOMP_ENABLED) - -//------------------------------------------------------------------------------ -// PDM - -#if defined(PDM_ENABLED) - -#undef NRFX_PDM_ENABLED -#define NRFX_PDM_ENABLED PDM_ENABLED - -#if defined(PDM_CONFIG_MODE) -#undef NRFX_PDM_CONFIG_MODE -#define NRFX_PDM_CONFIG_MODE PDM_CONFIG_MODE -#endif -#if defined(PDM_CONFIG_EDGE) -#undef NRFX_PDM_CONFIG_EDGE -#define NRFX_PDM_CONFIG_EDGE PDM_CONFIG_EDGE -#endif -#if defined(PDM_CONFIG_CLOCK_FREQ) -#undef NRFX_PDM_CONFIG_CLOCK_FREQ -#define NRFX_PDM_CONFIG_CLOCK_FREQ PDM_CONFIG_CLOCK_FREQ -#endif -#if defined(PDM_CONFIG_IRQ_PRIORITY) -#undef NRFX_PDM_CONFIG_IRQ_PRIORITY -#define NRFX_PDM_CONFIG_IRQ_PRIORITY PDM_CONFIG_IRQ_PRIORITY -#endif - -#if defined(PDM_CONFIG_LOG_ENABLED) -#undef NRFX_PDM_CONFIG_LOG_ENABLED -#define NRFX_PDM_CONFIG_LOG_ENABLED PDM_CONFIG_LOG_ENABLED -#endif -#if defined(PDM_CONFIG_LOG_LEVEL) -#undef NRFX_PDM_CONFIG_LOG_LEVEL -#define NRFX_PDM_CONFIG_LOG_LEVEL PDM_CONFIG_LOG_LEVEL -#endif -#if defined(PDM_CONFIG_INFO_COLOR) -#undef NRFX_PDM_CONFIG_INFO_COLOR -#define NRFX_PDM_CONFIG_INFO_COLOR PDM_CONFIG_INFO_COLOR -#endif -#if defined(PDM_CONFIG_DEBUG_COLOR) -#undef NRFX_PDM_CONFIG_DEBUG_COLOR -#define NRFX_PDM_CONFIG_DEBUG_COLOR PDM_CONFIG_DEBUG_COLOR -#endif - -#endif // defined(PDM_ENABLED) - -//------------------------------------------------------------------------------ -// POWER - -#if defined(POWER_ENABLED) - -#undef NRFX_POWER_ENABLED -#define NRFX_POWER_ENABLED POWER_ENABLED - -#if defined(POWER_CONFIG_IRQ_PRIORITY) -#undef NRFX_POWER_CONFIG_IRQ_PRIORITY -#define NRFX_POWER_CONFIG_IRQ_PRIORITY POWER_CONFIG_IRQ_PRIORITY -#endif - -#if defined(POWER_CONFIG_DEFAULT_DCDCEN) -#undef NRFX_POWER_CONFIG_DEFAULT_DCDCEN -#define NRFX_POWER_CONFIG_DEFAULT_DCDCEN POWER_CONFIG_DEFAULT_DCDCEN -#endif -#if defined(POWER_CONFIG_DEFAULT_DCDCENHV) -#undef NRFX_POWER_CONFIG_DEFAULT_DCDCENHV -#define NRFX_POWER_CONFIG_DEFAULT_DCDCENHV POWER_CONFIG_DEFAULT_DCDCENHV -#endif - -#endif // defined(POWER_ENABLED) - -//------------------------------------------------------------------------------ -// PPI - -#if defined(PPI_ENABLED) - -#undef NRFX_PPI_ENABLED -#define NRFX_PPI_ENABLED PPI_ENABLED - -#if defined(PPI_CONFIG_LOG_ENABLED) -#undef NRFX_PPI_CONFIG_LOG_ENABLED -#define NRFX_PPI_CONFIG_LOG_ENABLED PPI_CONFIG_LOG_ENABLED -#endif -#if defined(PPI_CONFIG_LOG_LEVEL) -#undef NRFX_PPI_CONFIG_LOG_LEVEL -#define NRFX_PPI_CONFIG_LOG_LEVEL PPI_CONFIG_LOG_LEVEL -#endif -#if defined(PPI_CONFIG_INFO_COLOR) -#undef NRFX_PPI_CONFIG_INFO_COLOR -#define NRFX_PPI_CONFIG_INFO_COLOR PPI_CONFIG_INFO_COLOR -#endif -#if defined(PPI_CONFIG_DEBUG_COLOR) -#undef NRFX_PPI_CONFIG_DEBUG_COLOR -#define NRFX_PPI_CONFIG_DEBUG_COLOR PPI_CONFIG_DEBUG_COLOR -#endif - -#endif // defined(PPI_ENABLED) - -//------------------------------------------------------------------------------ -// PWM - -#if defined(PWM_ENABLED) - -#undef NRFX_PWM_ENABLED -#define NRFX_PWM_ENABLED PWM_ENABLED - -#if defined(PWM0_ENABLED) -#undef NRFX_PWM0_ENABLED -#define NRFX_PWM0_ENABLED PWM0_ENABLED -#endif -#if defined(PWM1_ENABLED) -#undef NRFX_PWM1_ENABLED -#define NRFX_PWM1_ENABLED PWM1_ENABLED -#endif -#if defined(PWM2_ENABLED) -#undef NRFX_PWM2_ENABLED -#define NRFX_PWM2_ENABLED PWM2_ENABLED -#endif -#if defined(PWM3_ENABLED) -#undef NRFX_PWM3_ENABLED -#define NRFX_PWM3_ENABLED PWM3_ENABLED -#endif - -#if defined(PWM_DEFAULT_CONFIG_OUT0_PIN) -#undef NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN -#define NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN PWM_DEFAULT_CONFIG_OUT0_PIN -#endif -#if defined(PWM_DEFAULT_CONFIG_OUT1_PIN) -#undef NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN -#define NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN PWM_DEFAULT_CONFIG_OUT1_PIN -#endif -#if defined(PWM_DEFAULT_CONFIG_OUT2_PIN) -#undef NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN -#define NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN PWM_DEFAULT_CONFIG_OUT2_PIN -#endif -#if defined(PWM_DEFAULT_CONFIG_OUT3_PIN) -#undef NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN -#define NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN PWM_DEFAULT_CONFIG_OUT3_PIN -#endif -#if defined(PWM_DEFAULT_CONFIG_BASE_CLOCK) -#undef NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK -#define NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK PWM_DEFAULT_CONFIG_BASE_CLOCK -#endif -#if defined(PWM_DEFAULT_CONFIG_COUNT_MODE) -#undef NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE -#define NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE PWM_DEFAULT_CONFIG_COUNT_MODE -#endif -#if defined(PWM_DEFAULT_CONFIG_TOP_VALUE) -#undef NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE -#define NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE PWM_DEFAULT_CONFIG_TOP_VALUE -#endif -#if defined(PWM_DEFAULT_CONFIG_LOAD_MODE) -#undef NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE -#define NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE PWM_DEFAULT_CONFIG_LOAD_MODE -#endif -#if defined(PWM_DEFAULT_CONFIG_STEP_MODE) -#undef NRFX_PWM_DEFAULT_CONFIG_STEP_MODE -#define NRFX_PWM_DEFAULT_CONFIG_STEP_MODE PWM_DEFAULT_CONFIG_STEP_MODE -#endif -#if defined(PWM_DEFAULT_CONFIG_IRQ_PRIORITY) -#undef NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY -#define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY PWM_DEFAULT_CONFIG_IRQ_PRIORITY -#endif - -#if defined(PWM_CONFIG_LOG_ENABLED) -#undef NRFX_PWM_CONFIG_LOG_ENABLED -#define NRFX_PWM_CONFIG_LOG_ENABLED PWM_CONFIG_LOG_ENABLED -#endif -#if defined(PWM_CONFIG_LOG_LEVEL) -#undef NRFX_PWM_CONFIG_LOG_LEVEL -#define NRFX_PWM_CONFIG_LOG_LEVEL PWM_CONFIG_LOG_LEVEL -#endif -#if defined(PWM_CONFIG_INFO_COLOR) -#undef NRFX_PWM_CONFIG_INFO_COLOR -#define NRFX_PWM_CONFIG_INFO_COLOR PWM_CONFIG_INFO_COLOR -#endif -#if defined(PWM_CONFIG_DEBUG_COLOR) -#undef NRFX_PWM_CONFIG_DEBUG_COLOR -#define NRFX_PWM_CONFIG_DEBUG_COLOR PWM_CONFIG_DEBUG_COLOR -#endif - -#if defined(PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED) -#undef NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED -#define NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED -#endif -#if defined(PWM_NRF52_ANOMALY_109_EGU_INSTANCE) -#undef NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE -#define NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE PWM_NRF52_ANOMALY_109_EGU_INSTANCE -#endif - -#endif // defined(PWM_ENABLED) - -//------------------------------------------------------------------------------ -// QDEC - -#if defined(QDEC_ENABLED) - -#undef NRFX_QDEC_ENABLED -#define NRFX_QDEC_ENABLED QDEC_ENABLED - -#if defined(QDEC_CONFIG_REPORTPER) -#undef NRFX_QDEC_CONFIG_REPORTPER -#define NRFX_QDEC_CONFIG_REPORTPER QDEC_CONFIG_REPORTPER -#endif -#if defined(QDEC_CONFIG_SAMPLEPER) -#undef NRFX_QDEC_CONFIG_SAMPLEPER -#define NRFX_QDEC_CONFIG_SAMPLEPER QDEC_CONFIG_SAMPLEPER -#endif -#if defined(QDEC_CONFIG_PIO_A) -#undef NRFX_QDEC_CONFIG_PIO_A -#define NRFX_QDEC_CONFIG_PIO_A QDEC_CONFIG_PIO_A -#endif -#if defined(QDEC_CONFIG_PIO_B) -#undef NRFX_QDEC_CONFIG_PIO_B -#define NRFX_QDEC_CONFIG_PIO_B QDEC_CONFIG_PIO_B -#endif -#if defined(QDEC_CONFIG_PIO_LED) -#undef NRFX_QDEC_CONFIG_PIO_LED -#define NRFX_QDEC_CONFIG_PIO_LED QDEC_CONFIG_PIO_LED -#endif -#if defined(QDEC_CONFIG_LEDPRE) -#undef NRFX_QDEC_CONFIG_LEDPRE -#define NRFX_QDEC_CONFIG_LEDPRE QDEC_CONFIG_LEDPRE -#endif -#if defined(QDEC_CONFIG_LEDPOL) -#undef NRFX_QDEC_CONFIG_LEDPOL -#define NRFX_QDEC_CONFIG_LEDPOL QDEC_CONFIG_LEDPOL -#endif -#if defined(QDEC_CONFIG_DBFEN) -#undef NRFX_QDEC_CONFIG_DBFEN -#define NRFX_QDEC_CONFIG_DBFEN QDEC_CONFIG_DBFEN -#endif -#if defined(QDEC_CONFIG_SAMPLE_INTEN) -#undef NRFX_QDEC_CONFIG_SAMPLE_INTEN -#define NRFX_QDEC_CONFIG_SAMPLE_INTEN QDEC_CONFIG_SAMPLE_INTEN -#endif -#if defined(QDEC_CONFIG_IRQ_PRIORITY) -#undef NRFX_QDEC_CONFIG_IRQ_PRIORITY -#define NRFX_QDEC_CONFIG_IRQ_PRIORITY QDEC_CONFIG_IRQ_PRIORITY -#endif - -#if defined(QDEC_CONFIG_LOG_ENABLED) -#undef NRFX_QDEC_CONFIG_LOG_ENABLED -#define NRFX_QDEC_CONFIG_LOG_ENABLED QDEC_CONFIG_LOG_ENABLED -#endif -#if defined(QDEC_CONFIG_LOG_LEVEL) -#undef NRFX_QDEC_CONFIG_LOG_LEVEL -#define NRFX_QDEC_CONFIG_LOG_LEVEL QDEC_CONFIG_LOG_LEVEL -#endif -#if defined(QDEC_CONFIG_INFO_COLOR) -#undef NRFX_QDEC_CONFIG_INFO_COLOR -#define NRFX_QDEC_CONFIG_INFO_COLOR QDEC_CONFIG_INFO_COLOR -#endif -#if defined(QDEC_CONFIG_DEBUG_COLOR) -#undef NRFX_QDEC_CONFIG_DEBUG_COLOR -#define NRFX_QDEC_CONFIG_DEBUG_COLOR QDEC_CONFIG_DEBUG_COLOR -#endif - -#endif // defined(QDEC_ENABLED) - -//------------------------------------------------------------------------------ -// QSPI - -#if defined(QSPI_ENABLED) - -#undef NRFX_QSPI_ENABLED -#define NRFX_QSPI_ENABLED QSPI_ENABLED - -#if defined(QSPI_CONFIG_SCK_DELAY) -#undef NRFX_QSPI_CONFIG_SCK_DELAY -#define NRFX_QSPI_CONFIG_SCK_DELAY QSPI_CONFIG_SCK_DELAY -#endif -#if defined(QSPI_CONFIG_XIP_OFFSET) -#undef NRFX_QSPI_CONFIG_XIP_OFFSET -#define NRFX_QSPI_CONFIG_XIP_OFFSET QSPI_CONFIG_XIP_OFFSET -#endif -#if defined(QSPI_CONFIG_READOC) -#undef NRFX_QSPI_CONFIG_READOC -#define NRFX_QSPI_CONFIG_READOC QSPI_CONFIG_READOC -#endif -#if defined(QSPI_CONFIG_WRITEOC) -#undef NRFX_QSPI_CONFIG_WRITEOC -#define NRFX_QSPI_CONFIG_WRITEOC QSPI_CONFIG_WRITEOC -#endif -#if defined(QSPI_CONFIG_ADDRMODE) -#undef NRFX_QSPI_CONFIG_ADDRMODE -#define NRFX_QSPI_CONFIG_ADDRMODE QSPI_CONFIG_ADDRMODE -#endif -#if defined(QSPI_CONFIG_MODE) -#undef NRFX_QSPI_CONFIG_MODE -#define NRFX_QSPI_CONFIG_MODE QSPI_CONFIG_MODE -#endif -#if defined(QSPI_CONFIG_FREQUENCY) -#undef NRFX_QSPI_CONFIG_FREQUENCY -#define NRFX_QSPI_CONFIG_FREQUENCY QSPI_CONFIG_FREQUENCY -#endif -#if defined(QSPI_CONFIG_IRQ_PRIORITY) -#undef NRFX_QSPI_CONFIG_IRQ_PRIORITY -#define NRFX_QSPI_CONFIG_IRQ_PRIORITY QSPI_CONFIG_IRQ_PRIORITY -#endif - -#if defined(QSPI_PIN_SCK) -#undef NRFX_QSPI_PIN_SCK -#define NRFX_QSPI_PIN_SCK QSPI_PIN_SCK -#endif -#if defined(QSPI_PIN_CSN) -#undef NRFX_QSPI_PIN_CSN -#define NRFX_QSPI_PIN_CSN QSPI_PIN_CSN -#endif -#if defined(QSPI_PIN_IO0) -#undef NRFX_QSPI_PIN_IO0 -#define NRFX_QSPI_PIN_IO0 QSPI_PIN_IO0 -#endif -#if defined(QSPI_PIN_IO0) -#undef NRFX_QSPI_PIN_IO0 -#define NRFX_QSPI_PIN_IO0 QSPI_PIN_IO0 -#endif -#if defined(QSPI_PIN_IO1) -#undef NRFX_QSPI_PIN_IO1 -#define NRFX_QSPI_PIN_IO1 QSPI_PIN_IO1 -#endif -#if defined(QSPI_PIN_IO2) -#undef NRFX_QSPI_PIN_IO2 -#define NRFX_QSPI_PIN_IO2 QSPI_PIN_IO2 -#endif -#if defined(QSPI_PIN_IO3) -#undef NRFX_QSPI_PIN_IO3 -#define NRFX_QSPI_PIN_IO3 QSPI_PIN_IO3 -#endif - -#endif // defined(QSPI_ENABLED) - -//------------------------------------------------------------------------------ -// RNG - -#if defined(RNG_ENABLED) - -#undef NRFX_RNG_ENABLED -#define NRFX_RNG_ENABLED RNG_ENABLED - -#if defined(RNG_CONFIG_ERROR_CORRECTION) -#undef NRFX_RNG_CONFIG_ERROR_CORRECTION -#define NRFX_RNG_CONFIG_ERROR_CORRECTION RNG_CONFIG_ERROR_CORRECTION -#endif - -#if defined(RNG_CONFIG_IRQ_PRIORITY) -#undef NRFX_RNG_CONFIG_IRQ_PRIORITY -#define NRFX_RNG_CONFIG_IRQ_PRIORITY RNG_CONFIG_IRQ_PRIORITY -#endif - -#if defined(RNG_CONFIG_LOG_ENABLED) -#undef NRFX_RNG_CONFIG_LOG_ENABLED -#define NRFX_RNG_CONFIG_LOG_ENABLED RNG_CONFIG_LOG_ENABLED -#endif -#if defined(RNG_CONFIG_LOG_LEVEL) -#undef NRFX_RNG_CONFIG_LOG_LEVEL -#define NRFX_RNG_CONFIG_LOG_LEVEL RNG_CONFIG_LOG_LEVEL -#endif -#if defined(RNG_CONFIG_INFO_COLOR) -#undef NRFX_RNG_CONFIG_INFO_COLOR -#define NRFX_RNG_CONFIG_INFO_COLOR RNG_CONFIG_INFO_COLOR -#endif -#if defined(RNG_CONFIG_DEBUG_COLOR) -#undef NRFX_RNG_CONFIG_DEBUG_COLOR -#define NRFX_RNG_CONFIG_DEBUG_COLOR RNG_CONFIG_DEBUG_COLOR -#endif - -#endif // defined(RNG_ENABLED) - -//------------------------------------------------------------------------------ -// RTC - -#if defined(RTC_ENABLED) - -#undef NRFX_RTC_ENABLED -#define NRFX_RTC_ENABLED RTC_ENABLED - -#if defined(RTC0_ENABLED) -#undef NRFX_RTC0_ENABLED -#define NRFX_RTC0_ENABLED RTC0_ENABLED -#endif -#if defined(RTC1_ENABLED) -#undef NRFX_RTC1_ENABLED -#define NRFX_RTC1_ENABLED RTC1_ENABLED -#endif -#if defined(RTC2_ENABLED) -#undef NRFX_RTC2_ENABLED -#define NRFX_RTC2_ENABLED RTC2_ENABLED -#endif - -#if defined(RTC_DEFAULT_CONFIG_FREQUENCY) -#undef NRFX_RTC_DEFAULT_CONFIG_FREQUENCY -#define NRFX_RTC_DEFAULT_CONFIG_FREQUENCY RTC_DEFAULT_CONFIG_FREQUENCY -#endif -#if defined(RTC_DEFAULT_CONFIG_RELIABLE) -#undef NRFX_RTC_DEFAULT_CONFIG_RELIABLE -#define NRFX_RTC_DEFAULT_CONFIG_RELIABLE RTC_DEFAULT_CONFIG_RELIABLE -#endif -#if defined(RTC_DEFAULT_CONFIG_IRQ_PRIORITY) -#undef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY -#define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY RTC_DEFAULT_CONFIG_IRQ_PRIORITY -#endif - -#if defined(NRF_MAXIMUM_LATENCY_US) -#undef NRFX_RTC_MAXIMUM_LATENCY_US -#define NRFX_RTC_MAXIMUM_LATENCY_US NRF_MAXIMUM_LATENCY_US -#endif - -#if defined(RTC_CONFIG_LOG_ENABLED) -#undef NRFX_RTC_CONFIG_LOG_ENABLED -#define NRFX_RTC_CONFIG_LOG_ENABLED RTC_CONFIG_LOG_ENABLED -#endif -#if defined(RTC_CONFIG_LOG_LEVEL) -#undef NRFX_RTC_CONFIG_LOG_LEVEL -#define NRFX_RTC_CONFIG_LOG_LEVEL RTC_CONFIG_LOG_LEVEL -#endif -#if defined(RTC_CONFIG_INFO_COLOR) -#undef NRFX_RTC_CONFIG_INFO_COLOR -#define NRFX_RTC_CONFIG_INFO_COLOR RTC_CONFIG_INFO_COLOR -#endif -#if defined(RTC_CONFIG_DEBUG_COLOR) -#undef NRFX_RTC_CONFIG_DEBUG_COLOR -#define NRFX_RTC_CONFIG_DEBUG_COLOR RTC_CONFIG_DEBUG_COLOR -#endif - -#endif // defined(RTC_ENABLED) - -//------------------------------------------------------------------------------ -// SAADC - -#if defined(SAADC_ENABLED) - -#undef NRFX_SAADC_ENABLED -#define NRFX_SAADC_ENABLED SAADC_ENABLED - -#if defined(SAADC_CONFIG_RESOLUTION) -#undef NRFX_SAADC_CONFIG_RESOLUTION -#define NRFX_SAADC_CONFIG_RESOLUTION SAADC_CONFIG_RESOLUTION -#endif -#if defined(SAADC_CONFIG_OVERSAMPLE) -#undef NRFX_SAADC_CONFIG_OVERSAMPLE -#define NRFX_SAADC_CONFIG_OVERSAMPLE SAADC_CONFIG_OVERSAMPLE -#endif -#if defined(SAADC_CONFIG_LP_MODE) -#undef NRFX_SAADC_CONFIG_LP_MODE -#define NRFX_SAADC_CONFIG_LP_MODE SAADC_CONFIG_LP_MODE -#endif -#if defined(SAADC_CONFIG_IRQ_PRIORITY) -#undef NRFX_SAADC_CONFIG_IRQ_PRIORITY -#define NRFX_SAADC_CONFIG_IRQ_PRIORITY SAADC_CONFIG_IRQ_PRIORITY -#endif - -#if defined(SAADC_CONFIG_LOG_ENABLED) -#undef NRFX_SAADC_CONFIG_LOG_ENABLED -#define NRFX_SAADC_CONFIG_LOG_ENABLED SAADC_CONFIG_LOG_ENABLED -#endif -#if defined(SAADC_CONFIG_LOG_LEVEL) -#undef NRFX_SAADC_CONFIG_LOG_LEVEL -#define NRFX_SAADC_CONFIG_LOG_LEVEL SAADC_CONFIG_LOG_LEVEL -#endif -#if defined(SAADC_CONFIG_INFO_COLOR) -#undef NRFX_SAADC_CONFIG_INFO_COLOR -#define NRFX_SAADC_CONFIG_INFO_COLOR SAADC_CONFIG_INFO_COLOR -#endif -#if defined(SAADC_CONFIG_DEBUG_COLOR) -#undef NRFX_SAADC_CONFIG_DEBUG_COLOR -#define NRFX_SAADC_CONFIG_DEBUG_COLOR SAADC_CONFIG_DEBUG_COLOR -#endif - -#endif // defined(SAADC_ENABLED) - -//------------------------------------------------------------------------------ -// SPI - -#if defined(SPI_ENABLED) - -#undef NRFX_SPI_ENABLED -#define NRFX_SPI_ENABLED \ - (SPI_ENABLED && (NRFX_SPI0_ENABLED || NRFX_SPI1_ENABLED || NRFX_SPI2_ENABLED)) -#undef NRFX_SPIM_ENABLED -#define NRFX_SPIM_ENABLED \ - (SPI_ENABLED && (NRFX_SPIM0_ENABLED || NRFX_SPIM1_ENABLED || NRFX_SPIM2_ENABLED)) - -#if defined(SPI_PRESENT) && !defined(SPIM_PRESENT) - -#undef NRFX_SPI0_ENABLED -#define NRFX_SPI0_ENABLED SPI0_ENABLED -#undef NRFX_SPIM0_ENABLED -#define NRFX_SPIM0_ENABLED 0 - -#undef NRFX_SPI1_ENABLED -#define NRFX_SPI1_ENABLED SPI1_ENABLED -#undef NRFX_SPIM1_ENABLED -#define NRFX_SPIM1_ENABLED 0 - -#undef NRFX_SPI2_ENABLED -#define NRFX_SPI2_ENABLED SPI2_ENABLED -#undef NRFX_SPIM2_ENABLED -#define NRFX_SPIM2_ENABLED 0 - -#elif !defined(SPI_PRESENT) && defined(SPIM_PRESENT) - -#undef NRFX_SPI0_ENABLED -#define NRFX_SPI0_ENABLED 0 -#undef NRFX_SPIM0_ENABLED -#define NRFX_SPIM0_ENABLED SPI0_ENABLED - -#undef NRFX_SPI1_ENABLED -#define NRFX_SPI1_ENABLED 0 -#undef NRFX_SPIM1_ENABLED -#define NRFX_SPIM1_ENABLED SPI1_ENABLED - -#undef NRFX_SPI2_ENABLED -#define NRFX_SPI2_ENABLED 0 -#undef NRFX_SPIM2_ENABLED -#define NRFX_SPIM2_ENABLED SPI2_ENABLED - -#else // -> defined(SPI_PRESENT) && defined(SPIM_PRESENT) - -#undef NRFX_SPI0_ENABLED -#define NRFX_SPI0_ENABLED (SPI0_ENABLED && !SPI0_USE_EASY_DMA) -#undef NRFX_SPIM0_ENABLED -#define NRFX_SPIM0_ENABLED (SPI0_ENABLED && SPI0_USE_EASY_DMA) - -#undef NRFX_SPI1_ENABLED -#define NRFX_SPI1_ENABLED (SPI1_ENABLED && !SPI1_USE_EASY_DMA) -#undef NRFX_SPIM1_ENABLED -#define NRFX_SPIM1_ENABLED (SPI1_ENABLED && SPI1_USE_EASY_DMA) - -#undef NRFX_SPI2_ENABLED -#define NRFX_SPI2_ENABLED (SPI2_ENABLED && !SPI2_USE_EASY_DMA) -#undef NRFX_SPIM2_ENABLED -#define NRFX_SPIM2_ENABLED (SPI2_ENABLED && SPI2_USE_EASY_DMA) - -#endif // -> defined(SPI_PRESENT) && defined(SPIM_PRESENT) - -#if defined(NRF_SPI_DRV_MISO_PULLUP_CFG) -#undef NRFX_SPI_MISO_PULL_CFG -#define NRFX_SPI_MISO_PULL_CFG NRF_SPI_DRV_MISO_PULLUP_CFG -#undef NRFX_SPIM_MISO_PULL_CFG -#define NRFX_SPIM_MISO_PULL_CFG NRF_SPI_DRV_MISO_PULLUP_CFG -#endif - -#if defined(SPI_DEFAULT_CONFIG_IRQ_PRIORITY) -#undef NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY -#define NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY SPI_DEFAULT_CONFIG_IRQ_PRIORITY -#undef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY -#define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY SPI_DEFAULT_CONFIG_IRQ_PRIORITY -#endif - -#if defined(SPI_CONFIG_LOG_ENABLED) -#undef NRFX_SPI_CONFIG_LOG_ENABLED -#define NRFX_SPI_CONFIG_LOG_ENABLED SPI_CONFIG_LOG_ENABLED -#undef NRFX_SPIM_CONFIG_LOG_ENABLED -#define NRFX_SPIM_CONFIG_LOG_ENABLED SPI_CONFIG_LOG_ENABLED -#endif -#if defined(SPI_CONFIG_LOG_LEVEL) -#undef NRFX_SPI_CONFIG_LOG_LEVEL -#define NRFX_SPI_CONFIG_LOG_LEVEL SPI_CONFIG_LOG_LEVEL -#undef NRFX_SPIM_CONFIG_LOG_LEVEL -#define NRFX_SPIM_CONFIG_LOG_LEVEL SPI_CONFIG_LOG_LEVEL -#endif -#if defined(SPI_CONFIG_INFO_COLOR) -#undef NRFX_SPI_CONFIG_INFO_COLOR -#define NRFX_SPI_CONFIG_INFO_COLOR SPI_CONFIG_INFO_COLOR -#undef NRFX_SPIM_CONFIG_INFO_COLOR -#define NRFX_SPIM_CONFIG_INFO_COLOR SPI_CONFIG_INFO_COLOR -#endif -#if defined(SPI_CONFIG_DEBUG_COLOR) -#undef NRFX_SPI_CONFIG_DEBUG_COLOR -#define NRFX_SPI_CONFIG_DEBUG_COLOR SPI_CONFIG_DEBUG_COLOR -#undef NRFX_SPIM_CONFIG_DEBUG_COLOR -#define NRFX_SPIM_CONFIG_DEBUG_COLOR SPI_CONFIG_DEBUG_COLOR -#endif - -#if defined(SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED) -#undef NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED -#define NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED -#endif - -#endif // defined(SPI_ENABLED) - -//------------------------------------------------------------------------------ -// SPIS - -#if defined(SPIS_ENABLED) - -#undef NRFX_SPIS_ENABLED -#define NRFX_SPIS_ENABLED SPIS_ENABLED - -#if defined(SPIS0_ENABLED) -#undef NRFX_SPIS0_ENABLED -#define NRFX_SPIS0_ENABLED SPIS0_ENABLED -#endif -#if defined(SPIS1_ENABLED) -#undef NRFX_SPIS1_ENABLED -#define NRFX_SPIS1_ENABLED SPIS1_ENABLED -#endif -#if defined(SPIS2_ENABLED) -#undef NRFX_SPIS2_ENABLED -#define NRFX_SPIS2_ENABLED SPIS2_ENABLED -#endif - -#if defined(SPIS_DEFAULT_CONFIG_IRQ_PRIORITY) -#undef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY -#define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY SPIS_DEFAULT_CONFIG_IRQ_PRIORITY -#endif -#if defined(SPIS_DEFAULT_MODE) -#undef NRFX_SPIS_DEFAULT_MODE -#define NRFX_SPIS_DEFAULT_MODE SPIS_DEFAULT_MODE -#endif -#if defined(SPIS_DEFAULT_BIT_ORDER) -#undef NRFX_SPIS_DEFAULT_BIT_ORDER -#define NRFX_SPIS_DEFAULT_BIT_ORDER SPIS_DEFAULT_BIT_ORDER -#endif -#if defined(SPIS_DEFAULT_DEF) -#undef NRFX_SPIS_DEFAULT_DEF -#define NRFX_SPIS_DEFAULT_DEF SPIS_DEFAULT_DEF -#endif -#if defined(SPIS_DEFAULT_ORC) -#undef NRFX_SPIS_DEFAULT_ORC -#define NRFX_SPIS_DEFAULT_ORC SPIS_DEFAULT_ORC -#endif - -#if defined(SPIS_CONFIG_LOG_ENABLED) -#undef NRFX_SPIS_CONFIG_LOG_ENABLED -#define NRFX_SPIS_CONFIG_LOG_ENABLED SPIS_CONFIG_LOG_ENABLED -#endif -#if defined(SPIS_CONFIG_LOG_LEVEL) -#undef NRFX_SPIS_CONFIG_LOG_LEVEL -#define NRFX_SPIS_CONFIG_LOG_LEVEL SPIS_CONFIG_LOG_LEVEL -#endif -#if defined(SPIS_CONFIG_INFO_COLOR) -#undef NRFX_SPIS_CONFIG_INFO_COLOR -#define NRFX_SPIS_CONFIG_INFO_COLOR SPIS_CONFIG_INFO_COLOR -#endif -#if defined(SPIS_CONFIG_DEBUG_COLOR) -#undef NRFX_SPIS_CONFIG_DEBUG_COLOR -#define NRFX_SPIS_CONFIG_DEBUG_COLOR SPIS_CONFIG_DEBUG_COLOR -#endif - -#if defined(SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED) -#undef NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED -#define NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED -#endif - -#endif // defined(SPIS_ENABLED) - -//------------------------------------------------------------------------------ -// SWI - -#if defined(SWI_DISABLE0) -#undef NRFX_SWI0_DISABLED -#define NRFX_SWI0_DISABLED 1 -#endif -#if defined(SWI_DISABLE1) -#undef NRFX_SWI1_DISABLED -#define NRFX_SWI1_DISABLED 1 -#endif -#if defined(SWI_DISABLE2) -#undef NRFX_SWI2_DISABLED -#define NRFX_SWI2_DISABLED 1 -#endif -#if defined(SWI_DISABLE3) -#undef NRFX_SWI3_DISABLED -#define NRFX_SWI3_DISABLED 1 -#endif -#if defined(SWI_DISABLE4) -#undef NRFX_SWI4_DISABLED -#define NRFX_SWI4_DISABLED 1 -#endif -#if defined(SWI_DISABLE5) -#undef NRFX_SWI5_DISABLED -#define NRFX_SWI5_DISABLED 1 -#endif - -#if defined(EGU_ENABLED) -#undef NRFX_EGU_ENABLED -#define NRFX_EGU_ENABLED EGU_ENABLED -#endif - -#if defined(SWI_CONFIG_LOG_ENABLED) -#undef NRFX_SWI_CONFIG_LOG_ENABLED -#define NRFX_SWI_CONFIG_LOG_ENABLED SWI_CONFIG_LOG_ENABLED -#endif -#if defined(SWI_CONFIG_LOG_LEVEL) -#undef NRFX_SWI_CONFIG_LOG_LEVEL -#define NRFX_SWI_CONFIG_LOG_LEVEL SWI_CONFIG_LOG_LEVEL -#endif -#if defined(SWI_CONFIG_INFO_COLOR) -#undef NRFX_SWI_CONFIG_INFO_COLOR -#define NRFX_SWI_CONFIG_INFO_COLOR SWI_CONFIG_INFO_COLOR -#endif -#if defined(SWI_CONFIG_DEBUG_COLOR) -#undef NRFX_SWI_CONFIG_DEBUG_COLOR -#define NRFX_SWI_CONFIG_DEBUG_COLOR SWI_CONFIG_DEBUG_COLOR -#endif - -//------------------------------------------------------------------------------ -// SysTick - -#if defined(SYSTICK_ENABLED) - -#undef NRFX_SYSTICK_ENABLED -#define NRFX_SYSTICK_ENABLED SYSTICK_ENABLED - -#endif // defined(SYSTICK_ENABLED) - -//------------------------------------------------------------------------------ -// TIMER - -#if defined(TIMER_ENABLED) - -#undef NRFX_TIMER_ENABLED -#define NRFX_TIMER_ENABLED TIMER_ENABLED - -#if defined(TIMER0_ENABLED) -#undef NRFX_TIMER0_ENABLED -#define NRFX_TIMER0_ENABLED TIMER0_ENABLED -#endif -#if defined(TIMER1_ENABLED) -#undef NRFX_TIMER1_ENABLED -#define NRFX_TIMER1_ENABLED TIMER1_ENABLED -#endif -#if defined(TIMER2_ENABLED) -#undef NRFX_TIMER2_ENABLED -#define NRFX_TIMER2_ENABLED TIMER2_ENABLED -#endif -#if defined(TIMER3_ENABLED) -#undef NRFX_TIMER3_ENABLED -#define NRFX_TIMER3_ENABLED TIMER3_ENABLED -#endif -#if defined(TIMER4_ENABLED) -#undef NRFX_TIMER4_ENABLED -#define NRFX_TIMER4_ENABLED TIMER4_ENABLED -#endif - -#if defined(TIMER_DEFAULT_CONFIG_FREQUENCY) -#undef NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY -#define NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY TIMER_DEFAULT_CONFIG_FREQUENCY -#endif -#if defined(TIMER_DEFAULT_CONFIG_MODE) -#undef NRFX_TIMER_DEFAULT_CONFIG_MODE -#define NRFX_TIMER_DEFAULT_CONFIG_MODE TIMER_DEFAULT_CONFIG_MODE -#endif -#if defined(TIMER_DEFAULT_CONFIG_BIT_WIDTH) -#undef NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH -#define NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH TIMER_DEFAULT_CONFIG_BIT_WIDTH -#endif -#if defined(TIMER_DEFAULT_CONFIG_IRQ_PRIORITY) -#undef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY -#define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY TIMER_DEFAULT_CONFIG_IRQ_PRIORITY -#endif - -#if defined(TIMER_CONFIG_LOG_ENABLED) -#undef NRFX_TIMER_CONFIG_LOG_ENABLED -#define NRFX_TIMER_CONFIG_LOG_ENABLED TIMER_CONFIG_LOG_ENABLED -#endif -#if defined(TIMER_CONFIG_LOG_LEVEL) -#undef NRFX_TIMER_CONFIG_LOG_LEVEL -#define NRFX_TIMER_CONFIG_LOG_LEVEL TIMER_CONFIG_LOG_LEVEL -#endif -#if defined(TIMER_CONFIG_INFO_COLOR) -#undef NRFX_TIMER_CONFIG_INFO_COLOR -#define NRFX_TIMER_CONFIG_INFO_COLOR TIMER_CONFIG_INFO_COLOR -#endif -#if defined(TIMER_CONFIG_DEBUG_COLOR) -#undef NRFX_TIMER_CONFIG_DEBUG_COLOR -#define NRFX_TIMER_CONFIG_DEBUG_COLOR TIMER_CONFIG_DEBUG_COLOR -#endif - -#endif // defined(TIMER_ENABLED) - -//------------------------------------------------------------------------------ -// TWI -#define TWI_ONLY ( defined(TWI_PRESENT) && !defined(TWIM_PRESENT)) -#define TWIM_ONLY (!defined(TWI_PRESENT) && defined(TWIM_PRESENT)) -#define TWI_AND_TWIM ( defined(TWI_PRESENT) && defined(TWIM_PRESENT)) - -#if defined(TWI_ENABLED) - -#undef NRFX_TWI_ENABLED -#define NRFX_TWI_ENABLED (TWI_ENABLED && (NRFX_TWI0_ENABLED || NRFX_TWI1_ENABLED)) -#undef NRFX_TWIM_ENABLED -#define NRFX_TWIM_ENABLED (TWI_ENABLED && (NRFX_TWIM0_ENABLED || NRFX_TWIM1_ENABLED)) - -#if defined(TWI_PRESENT) && !defined(TWIM_PRESENT) - -#undef NRFX_TWI0_ENABLED -#define NRFX_TWI0_ENABLED TWI0_ENABLED -#undef NRFX_TWIM0_ENABLED -#define NRFX_TWIM0_ENABLED 0 - -#undef NRFX_TWI1_ENABLED -#define NRFX_TWI1_ENABLED TWI1_ENABLED -#undef NRFX_TWIM1_ENABLED -#define NRFX_TWIM1_ENABLED 0 - -#elif !defined(TWI_PRESENT) && defined(TWIM_PRESENT) - -#undef NRFX_TWI0_ENABLED -#define NRFX_TWI0_ENABLED 0 -#undef NRFX_TWIM0_ENABLED -#define NRFX_TWIM0_ENABLED TWI0_ENABLED - -#undef NRFX_TWI1_ENABLED -#define NRFX_TWI1_ENABLED 0 -#undef NRFX_TWIM1_ENABLED -#define NRFX_TWIM1_ENABLED TWI1_ENABLED - -#else // -> defined(TWI_PRESENT) && defined(TWIM_PRESENT) - -#undef NRFX_TWI0_ENABLED -#define NRFX_TWI0_ENABLED (TWI0_ENABLED && !TWI0_USE_EASY_DMA) -#undef NRFX_TWIM0_ENABLED -#define NRFX_TWIM0_ENABLED (TWI0_ENABLED && TWI0_USE_EASY_DMA) - -#undef NRFX_TWI1_ENABLED -#define NRFX_TWI1_ENABLED (TWI1_ENABLED && !TWI1_USE_EASY_DMA) -#undef NRFX_TWIM1_ENABLED -#define NRFX_TWIM1_ENABLED (TWI1_ENABLED && TWI1_USE_EASY_DMA) - -#endif // -> defined(TWI_PRESENT) && defined(TWIM_PRESENT) - -#if defined(TWI_DEFAULT_CONFIG_FREQUENCY) -#undef NRFX_TWI_DEFAULT_CONFIG_FREQUENCY -#define NRFX_TWI_DEFAULT_CONFIG_FREQUENCY TWI_DEFAULT_CONFIG_FREQUENCY -#undef NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY -#define NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY TWI_DEFAULT_CONFIG_FREQUENCY -#endif -#if defined(TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT) -#undef NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT -#define NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT -#undef NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT -#define NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT -#endif -#if defined(TWI_DEFAULT_CONFIG_IRQ_PRIORITY) -#undef NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY -#define NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY TWI_DEFAULT_CONFIG_IRQ_PRIORITY -#undef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY -#define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY TWI_DEFAULT_CONFIG_IRQ_PRIORITY -#endif - -#if defined(TWI_CONFIG_LOG_ENABLED) -#undef NRFX_TWI_CONFIG_LOG_ENABLED -#define NRFX_TWI_CONFIG_LOG_ENABLED TWI_CONFIG_LOG_ENABLED -#undef NRFX_TWIM_CONFIG_LOG_ENABLED -#define NRFX_TWIM_CONFIG_LOG_ENABLED TWI_CONFIG_LOG_ENABLED -#endif -#if defined(TWI_CONFIG_LOG_LEVEL) -#undef NRFX_TWI_CONFIG_LOG_LEVEL -#define NRFX_TWI_CONFIG_LOG_LEVEL TWI_CONFIG_LOG_LEVEL -#undef NRFX_TWIM_CONFIG_LOG_LEVEL -#define NRFX_TWIM_CONFIG_LOG_LEVEL TWI_CONFIG_LOG_LEVEL -#endif -#if defined(TWI_CONFIG_INFO_COLOR) -#undef NRFX_TWI_CONFIG_INFO_COLOR -#define NRFX_TWI_CONFIG_INFO_COLOR TWI_CONFIG_INFO_COLOR -#undef NRFX_TWIM_CONFIG_INFO_COLOR -#define NRFX_TWIM_CONFIG_INFO_COLOR TWI_CONFIG_INFO_COLOR -#endif -#if defined(TWI_CONFIG_DEBUG_COLOR) -#undef NRFX_TWI_CONFIG_DEBUG_COLOR -#define NRFX_TWI_CONFIG_DEBUG_COLOR TWI_CONFIG_DEBUG_COLOR -#undef NRFX_TWIM_CONFIG_DEBUG_COLOR -#define NRFX_TWIM_CONFIG_DEBUG_COLOR TWI_CONFIG_DEBUG_COLOR -#endif - -#if defined(TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED) -#undef NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED -#define NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED -#endif - -#endif // defined(TWI_ENABLED) - -//------------------------------------------------------------------------------ -// TWIS - -#if defined(TWIS_ENABLED) - -#undef NRFX_TWIS_ENABLED -#define NRFX_TWIS_ENABLED TWIS_ENABLED - -#if defined(TWIS0_ENABLED) -#undef NRFX_TWIS0_ENABLED -#define NRFX_TWIS0_ENABLED TWIS0_ENABLED -#endif -#if defined(TWIS1_ENABLED) -#undef NRFX_TWIS1_ENABLED -#define NRFX_TWIS1_ENABLED TWIS1_ENABLED -#endif - -#if defined(TWIS_ASSUME_INIT_AFTER_RESET_ONLY) -#undef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY -#define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY TWIS_ASSUME_INIT_AFTER_RESET_ONLY -#endif -#if defined(TWIS_NO_SYNC_MODE) -#undef NRFX_TWIS_NO_SYNC_MODE -#define NRFX_TWIS_NO_SYNC_MODE TWIS_NO_SYNC_MODE -#endif - -#if defined(TWIS_DEFAULT_CONFIG_ADDR0) -#undef NRFX_TWIS_DEFAULT_CONFIG_ADDR0 -#define NRFX_TWIS_DEFAULT_CONFIG_ADDR0 TWIS_DEFAULT_CONFIG_ADDR0 -#endif -#if defined(TWIS_DEFAULT_CONFIG_ADDR1) -#undef NRFX_TWIS_DEFAULT_CONFIG_ADDR1 -#define NRFX_TWIS_DEFAULT_CONFIG_ADDR1 TWIS_DEFAULT_CONFIG_ADDR1 -#endif -#if defined(TWIS_DEFAULT_CONFIG_SCL_PULL) -#undef NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL -#define NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL TWIS_DEFAULT_CONFIG_SCL_PULL -#endif -#if defined(TWIS_DEFAULT_CONFIG_SDA_PULL) -#undef NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL -#define NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL TWIS_DEFAULT_CONFIG_SDA_PULL -#endif -#if defined(TWIS_DEFAULT_CONFIG_IRQ_PRIORITY) -#undef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY -#define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY TWIS_DEFAULT_CONFIG_IRQ_PRIORITY -#endif - -#if defined(TWIS_CONFIG_LOG_ENABLED) -#undef NRFX_TWIS_CONFIG_LOG_ENABLED -#define NRFX_TWIS_CONFIG_LOG_ENABLED TWIS_CONFIG_LOG_ENABLED -#endif -#if defined(TWIS_CONFIG_LOG_LEVEL) -#undef NRFX_TWIS_CONFIG_LOG_LEVEL -#define NRFX_TWIS_CONFIG_LOG_LEVEL TWIS_CONFIG_LOG_LEVEL -#endif -#if defined(TWIS_CONFIG_INFO_COLOR) -#undef NRFX_TWIS_CONFIG_INFO_COLOR -#define NRFX_TWIS_CONFIG_INFO_COLOR TWIS_CONFIG_INFO_COLOR -#endif -#if defined(TWIS_CONFIG_DEBUG_COLOR) -#undef NRFX_TWIS_CONFIG_DEBUG_COLOR -#define NRFX_TWIS_CONFIG_DEBUG_COLOR TWIS_CONFIG_DEBUG_COLOR -#endif - -#endif // defined(TWIS_ENABLED) - -//------------------------------------------------------------------------------ -// UART - -#if defined(UART_ENABLED) - -#undef NRFX_UART_ENABLED -#define NRFX_UART_ENABLED (UART_ENABLED && NRFX_UART0_ENABLED) -#undef NRFX_UARTE_ENABLED -#define NRFX_UARTE_ENABLED (UART_ENABLED && (NRFX_UARTE0_ENABLED || NRFX_UARTE1_ENABLED)) - -#if defined(UART0_ENABLED) -#undef NRFX_UART0_ENABLED -#define NRFX_UART0_ENABLED (UART0_ENABLED && UART_LEGACY_SUPPORT) -#undef NRFX_UARTE0_ENABLED -#define NRFX_UARTE0_ENABLED (UART0_ENABLED && UART_EASY_DMA_SUPPORT) -#endif -#if defined(UART1_ENABLED) -#undef NRFX_UARTE1_ENABLED -#define NRFX_UARTE1_ENABLED (UART1_ENABLED && UART_EASY_DMA_SUPPORT) -#endif - -#if defined(UART_DEFAULT_CONFIG_HWFC) -#undef NRFX_UART_DEFAULT_CONFIG_HWFC -#define NRFX_UART_DEFAULT_CONFIG_HWFC UART_DEFAULT_CONFIG_HWFC -#undef NRFX_UARTE_DEFAULT_CONFIG_HWFC -#define NRFX_UARTE_DEFAULT_CONFIG_HWFC UART_DEFAULT_CONFIG_HWFC -#endif -#if defined(UART_DEFAULT_CONFIG_PARITY) -#undef NRFX_UART_DEFAULT_CONFIG_PARITY -#define NRFX_UART_DEFAULT_CONFIG_PARITY UART_DEFAULT_CONFIG_PARITY -#undef NRFX_UARTE_DEFAULT_CONFIG_PARITY -#define NRFX_UARTE_DEFAULT_CONFIG_PARITY UART_DEFAULT_CONFIG_PARITY -#endif -#if defined(UART_DEFAULT_CONFIG_BAUDRATE) -#undef NRFX_UART_DEFAULT_CONFIG_BAUDRATE -#define NRFX_UART_DEFAULT_CONFIG_BAUDRATE UART_DEFAULT_CONFIG_BAUDRATE -#undef NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE -#define NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE UART_DEFAULT_CONFIG_BAUDRATE -#endif -#if defined(UART_DEFAULT_CONFIG_IRQ_PRIORITY) -#undef NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY -#define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY UART_DEFAULT_CONFIG_IRQ_PRIORITY -#undef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY -#define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY UART_DEFAULT_CONFIG_IRQ_PRIORITY -#endif - -#if defined(UART_CONFIG_LOG_ENABLED) -#undef NRFX_UART_CONFIG_LOG_ENABLED -#define NRFX_UART_CONFIG_LOG_ENABLED UART_CONFIG_LOG_ENABLED -#undef NRFX_UARTE_CONFIG_LOG_ENABLED -#define NRFX_UARTE_CONFIG_LOG_ENABLED UART_CONFIG_LOG_ENABLED -#endif -#if defined(UART_CONFIG_LOG_LEVEL) -#undef NRFX_UART_CONFIG_LOG_LEVEL -#define NRFX_UART_CONFIG_LOG_LEVEL UART_CONFIG_LOG_LEVEL -#undef NRFX_UARTE_CONFIG_LOG_LEVEL -#define NRFX_UARTE_CONFIG_LOG_LEVEL UART_CONFIG_LOG_LEVEL -#endif -#if defined(UART_CONFIG_INFO_COLOR) -#undef NRFX_UART_CONFIG_INFO_COLOR -#define NRFX_UART_CONFIG_INFO_COLOR UART_CONFIG_INFO_COLOR -#undef NRFX_UARTE_CONFIG_INFO_COLOR -#define NRFX_UARTE_CONFIG_INFO_COLOR UART_CONFIG_INFO_COLOR -#endif -#if defined(UART_CONFIG_DEBUG_COLOR) -#undef NRFX_UART_CONFIG_DEBUG_COLOR -#define NRFX_UART_CONFIG_DEBUG_COLOR UART_CONFIG_DEBUG_COLOR -#undef NRFX_UARTE_CONFIG_DEBUG_COLOR -#define NRFX_UARTE_CONFIG_DEBUG_COLOR UART_CONFIG_DEBUG_COLOR -#endif - -#endif // defined(UART_ENABLED) - -//------------------------------------------------------------------------------ -// WDT - -#if defined(WDT_ENABLED) - -#undef NRFX_WDT_ENABLED -#define NRFX_WDT_ENABLED WDT_ENABLED - -#if defined(WDT_CONFIG_BEHAVIOUR) -#undef NRFX_WDT_CONFIG_BEHAVIOUR -#define NRFX_WDT_CONFIG_BEHAVIOUR WDT_CONFIG_BEHAVIOUR -#endif -#if defined(WDT_CONFIG_RELOAD_VALUE) -#undef NRFX_WDT_CONFIG_RELOAD_VALUE -#define NRFX_WDT_CONFIG_RELOAD_VALUE WDT_CONFIG_RELOAD_VALUE -#endif -#if defined(WDT_CONFIG_IRQ_PRIORITY) -#undef NRFX_WDT_CONFIG_IRQ_PRIORITY -#define NRFX_WDT_CONFIG_IRQ_PRIORITY WDT_CONFIG_IRQ_PRIORITY -#endif - -#if defined(WDT_CONFIG_LOG_ENABLED) -#undef NRFX_WDT_CONFIG_LOG_ENABLED -#define NRFX_WDT_CONFIG_LOG_ENABLED WDT_CONFIG_LOG_ENABLED -#endif -#if defined(WDT_CONFIG_LOG_LEVEL) -#undef NRFX_WDT_CONFIG_LOG_LEVEL -#define NRFX_WDT_CONFIG_LOG_LEVEL WDT_CONFIG_LOG_LEVEL -#endif -#if defined(WDT_CONFIG_INFO_COLOR) -#undef NRFX_WDT_CONFIG_INFO_COLOR -#define NRFX_WDT_CONFIG_INFO_COLOR WDT_CONFIG_INFO_COLOR -#endif -#if defined(WDT_CONFIG_DEBUG_COLOR) -#undef NRFX_WDT_CONFIG_DEBUG_COLOR -#define NRFX_WDT_CONFIG_DEBUG_COLOR WDT_CONFIG_DEBUG_COLOR -#endif - -#endif // defined(WDT_ENABLED) - -#endif // APPLY_OLD_CONFIG_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_rng.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_rng.c new file mode 100644 index 00000000000..a3aed4bf868 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_rng.c @@ -0,0 +1,283 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "sdk_common.h" +#if NRF_MODULE_ENABLED(RNG) + +#include +#include +#include "nrf_drv_rng.h" +#include "nordic_common.h" +#include "app_util_platform.h" +#include "nrf_assert.h" +#include "nrf_queue.h" + +#ifdef SOFTDEVICE_PRESENT + #include "nrf_sdh.h" +#endif // SOFTDEVICE_PRESENT + +#define NRF_LOG_MODULE_NAME rng + +#if RNG_CONFIG_LOG_ENABLED + #define NRF_LOG_LEVEL RNG_CONFIG_LOG_LEVEL + #define NRF_LOG_INFO_COLOR RNG_CONFIG_INFO_COLOR + #define NRF_LOG_DEBUG_COLOR RNG_CONFIG_DEBUG_COLOR +#else //RNG_CONFIG_LOG_ENABLED + #define NRF_LOG_LEVEL 0 +#endif //RNG_CONFIG_LOG_ENABLED +#include "nrf_log.h" +NRF_LOG_MODULE_REGISTER(); + +typedef struct +{ + nrfx_drv_state_t state; + nrf_drv_rng_config_t config; +} nrf_drv_rng_cb_t; + +static nrf_drv_rng_cb_t m_rng_cb; +NRF_QUEUE_DEF(uint8_t, m_rand_pool, RNG_CONFIG_POOL_SIZE, NRF_QUEUE_MODE_OVERFLOW); +static const nrf_drv_rng_config_t m_default_config = NRF_DRV_RNG_DEFAULT_CONFIG; + +#ifdef SOFTDEVICE_PRESENT + #define SD_RAND_POOL_SIZE (64) + + STATIC_ASSERT(RNG_CONFIG_POOL_SIZE == SD_RAND_POOL_SIZE); + + #define NRF_DRV_RNG_LOCK() CRITICAL_REGION_ENTER() + #define NRF_DRV_RNG_RELEASE() CRITICAL_REGION_EXIT() + #define NRF_DRV_RNG_SD_IS_ENABLED() nrf_sdh_is_enabled() +#else + #define NRF_DRV_RNG_LOCK() do { } while (0) + #define NRF_DRV_RNG_RELEASE() do { } while (0) + #define NRF_DRV_RNG_SD_IS_ENABLED() false +#endif // SOFTDEVICE_PRESENT + + +static void nrfx_rng_handler(uint8_t rng_val) +{ + NRF_DRV_RNG_LOCK(); + if (!NRF_DRV_RNG_SD_IS_ENABLED()) + { + UNUSED_RETURN_VALUE(nrf_queue_push(&m_rand_pool, &rng_val)); + + if (nrf_queue_is_full(&m_rand_pool)) + { + nrfx_rng_stop(); + } + + NRF_LOG_DEBUG("Event: NRF_RNG_EVENT_VALRDY."); + } + NRF_DRV_RNG_RELEASE(); + +} + +ret_code_t nrf_drv_rng_init(nrf_drv_rng_config_t const * p_config) +{ + ret_code_t err_code = NRF_SUCCESS; + if (m_rng_cb.state != NRFX_DRV_STATE_UNINITIALIZED) + { + return NRF_ERROR_MODULE_ALREADY_INITIALIZED; + } + + if (p_config == NULL) + { + p_config = &m_default_config; + } + m_rng_cb.config = *p_config; + + NRF_DRV_RNG_LOCK(); + + if (!NRF_DRV_RNG_SD_IS_ENABLED()) + { + err_code = nrfx_rng_init(&m_rng_cb.config, nrfx_rng_handler); + if (err_code != NRF_SUCCESS) + { + return err_code; + } + nrfx_rng_start(); + } + m_rng_cb.state = NRFX_DRV_STATE_INITIALIZED; + + NRF_DRV_RNG_RELEASE(); + + return err_code; +} + +void nrf_drv_rng_uninit(void) +{ + ASSERT(m_rng_cb.state == NRFX_DRV_STATE_INITIALIZED); + + NRF_DRV_RNG_LOCK(); + + if (!NRF_DRV_RNG_SD_IS_ENABLED()) + { + nrfx_rng_stop(); + nrfx_rng_uninit(); + } + + NRF_DRV_RNG_RELEASE(); + + nrf_queue_reset(&m_rand_pool); + m_rng_cb.state = NRFX_DRV_STATE_UNINITIALIZED; + NRF_LOG_INFO("Uninitialized."); +} + +void nrf_drv_rng_bytes_available(uint8_t * p_bytes_available) +{ + ASSERT(m_rng_cb.state == NRFX_DRV_STATE_INITIALIZED); + +#ifdef SOFTDEVICE_PRESENT + if (NRF_DRV_RNG_SD_IS_ENABLED()) + { + if (NRF_SUCCESS == sd_rand_application_bytes_available_get(p_bytes_available)) + { + return; + } + } +#endif // SOFTDEVICE_PRESENT + + *p_bytes_available = nrf_queue_utilization_get(&m_rand_pool); + + NRF_LOG_INFO("Function: %s, available bytes: %d.", (uint32_t)__func__, *p_bytes_available); +} + +ret_code_t nrf_drv_rng_rand(uint8_t * p_buff, uint8_t length) +{ + ret_code_t err_code = NRF_SUCCESS; + ASSERT(m_rng_cb.state == NRFX_DRV_STATE_INITIALIZED); + +#ifdef SOFTDEVICE_PRESENT + do { + bool sd_is_enabled; + NRF_DRV_RNG_LOCK(); + sd_is_enabled = NRF_DRV_RNG_SD_IS_ENABLED(); + if (!sd_is_enabled) +#endif // SOFTDEVICE_PRESENT + { + err_code = nrf_queue_read(&m_rand_pool, p_buff, (uint32_t)length); + nrfx_rng_start(); + } +#ifdef SOFTDEVICE_PRESENT + NRF_DRV_RNG_RELEASE(); + + if (sd_is_enabled) + { + err_code = sd_rand_application_vector_get(p_buff, length); + if (err_code == NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES) + { + err_code = NRF_ERROR_NOT_FOUND; + } + } + } while (err_code == NRF_ERROR_SOFTDEVICE_NOT_ENABLED); +#endif // SOFTDEVICE_PRESENT + ASSERT((err_code == NRF_SUCCESS) || (err_code == NRF_ERROR_NOT_FOUND)); + +#if defined(RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED) && (RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED != 0) + NRF_LOG_DEBUG("Rand buffer data:"); + NRF_LOG_HEXDUMP_DEBUG((uint8_t *)p_buff, length); +#endif // RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED + NRF_LOG_WARNING("Function: %s, error code: %s.", + (uint32_t)__func__, + (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); + + return err_code; +} + +void nrf_drv_rng_block_rand(uint8_t * p_buff, uint32_t length) +{ + ASSERT(m_rng_cb.state == NRFX_DRV_STATE_INITIALIZED); + + while (length) + { + uint32_t len = MIN(length, RNG_CONFIG_POOL_SIZE); + ret_code_t err_code; + + do { + err_code = nrf_drv_rng_rand(p_buff, len); + } while (err_code != NRF_SUCCESS); + + length -= len; + p_buff += len; + } + + NRF_LOG_DEBUG("Rand buffer data:"); + NRF_LOG_HEXDUMP_DEBUG((uint8_t *)p_buff, length); +} + +#ifdef SOFTDEVICE_PRESENT +static void sd_state_evt_handler(nrf_sdh_state_evt_t state, void * p_context) +{ + switch (state) + { + case NRF_SDH_EVT_STATE_ENABLE_PREPARE: + if (m_rng_cb.state == NRFX_DRV_STATE_INITIALIZED) + { + nrfx_rng_stop(); + nrfx_rng_uninit(); + } + break; + + case NRF_SDH_EVT_STATE_DISABLED: + NRF_DRV_RNG_LOCK(); + if (m_rng_cb.state == NRFX_DRV_STATE_INITIALIZED) + { + ret_code_t err_code = nrfx_rng_init(&m_rng_cb.config, nrfx_rng_handler); + if (err_code != NRF_SUCCESS) + { + ASSERT(false); + } + nrfx_rng_start(); + } + NRF_DRV_RNG_RELEASE(); + break; + + default: + break; + } +} + +NRF_SDH_STATE_OBSERVER(m_sd_state_observer, RNG_CONFIG_STATE_OBSERVER_PRIO) = +{ + .handler = sd_state_evt_handler, + .p_context = NULL, +}; + +#endif // SOFTDEVICE_PRESENT + +#endif // NRF_MODULE_ENABLED(RNG) From 4a7027bdad9b4798e4c230b8eea48afabd16df36 Mon Sep 17 00:00:00 2001 From: Naveen Kaje Date: Tue, 14 Aug 2018 13:39:42 -0500 Subject: [PATCH 442/488] NRF52: spi_api: port from Softdevice 14.2 to 15.0 --- .../TARGET_MCU_NRF52832/config/sdk_config.h | 14 +-- .../TARGET_MCU_NRF52840/config/sdk_config.h | 12 +- .../TARGET_NRF5x/TARGET_NRF52/objects.h | 4 +- .../TARGET_NRF5x/TARGET_NRF52/spi_api.c | 109 ++++++++++-------- 4 files changed, 79 insertions(+), 60 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h index f2a12bddbdf..a0fa6934dc8 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h @@ -2921,7 +2921,7 @@ // NRFX_RNG_ENABLED - nrfx_rng - RNG peripheral driver //========================================================== #ifndef NRFX_RNG_ENABLED -#define NRFX_RNG_ENABLED 1 +#define NRFX_RNG_ENABLED 0 #endif // NRFX_RNG_CONFIG_ERROR_CORRECTION - Error correction @@ -3221,27 +3221,27 @@ // NRFX_SPIM_ENABLED - nrfx_spim - SPIM peripheral driver //========================================================== #ifndef NRFX_SPIM_ENABLED -#define NRFX_SPIM_ENABLED 1 +#define NRFX_SPIM_ENABLED 0 #endif // NRFX_SPIM0_ENABLED - Enable SPIM0 instance #ifndef NRFX_SPIM0_ENABLED -#define NRFX_SPIM0_ENABLED 1 +#define NRFX_SPIM0_ENABLED 0 #endif // NRFX_SPIM1_ENABLED - Enable SPIM1 instance #ifndef NRFX_SPIM1_ENABLED -#define NRFX_SPIM1_ENABLED 1 +#define NRFX_SPIM1_ENABLED 0 #endif // NRFX_SPIM2_ENABLED - Enable SPIM2 instance #ifndef NRFX_SPIM2_ENABLED -#define NRFX_SPIM2_ENABLED 1 +#define NRFX_SPIM2_ENABLED 0 #endif // NRFX_SPIM3_ENABLED - Enable SPIM3 instance @@ -3454,7 +3454,7 @@ #ifndef NRFX_SPI0_ENABLED -#define NRFX_SPI0_ENABLED 0 +#define NRFX_SPI0_ENABLED 1 #endif // NRFX_SPI1_ENABLED - Enable SPI1 instance @@ -3468,7 +3468,7 @@ #ifndef NRFX_SPI2_ENABLED -#define NRFX_SPI2_ENABLED 0 +#define NRFX_SPI2_ENABLED 1 #endif // NRFX_SPI_MISO_PULL_CFG - MISO pin pull configuration. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h index 7b6c2a425f6..bdc3b79788d 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h @@ -3221,27 +3221,27 @@ // NRFX_SPIM_ENABLED - nrfx_spim - SPIM peripheral driver //========================================================== #ifndef NRFX_SPIM_ENABLED -#define NRFX_SPIM_ENABLED 1 +#define NRFX_SPIM_ENABLED 0 #endif // NRFX_SPIM0_ENABLED - Enable SPIM0 instance #ifndef NRFX_SPIM0_ENABLED -#define NRFX_SPIM0_ENABLED 1 +#define NRFX_SPIM0_ENABLED 0 #endif // NRFX_SPIM1_ENABLED - Enable SPIM1 instance #ifndef NRFX_SPIM1_ENABLED -#define NRFX_SPIM1_ENABLED 1 +#define NRFX_SPIM1_ENABLED 0 #endif // NRFX_SPIM2_ENABLED - Enable SPIM2 instance #ifndef NRFX_SPIM2_ENABLED -#define NRFX_SPIM2_ENABLED 1 +#define NRFX_SPIM2_ENABLED 0 #endif // NRFX_SPIM3_ENABLED - Enable SPIM3 instance @@ -3454,7 +3454,7 @@ #ifndef NRFX_SPI0_ENABLED -#define NRFX_SPI0_ENABLED 0 +#define NRFX_SPI0_ENABLED 1 #endif // NRFX_SPI1_ENABLED - Enable SPI1 instance @@ -3468,7 +3468,7 @@ #ifndef NRFX_SPI2_ENABLED -#define NRFX_SPI2_ENABLED 0 +#define NRFX_SPI2_ENABLED 1 #endif // NRFX_SPI_MISO_PULL_CFG - MISO pin pull configuration. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/objects.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/objects.h index 39c4b60f678..a9c93ff61f4 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/objects.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/objects.h @@ -43,7 +43,7 @@ #include "PortNames.h" #include "PeripheralNames.h" #include "PinNames.h" -#include "nrf_drv_spi.h" +#include "nrfx_spi.h" #include "nrf_twi.h" #include "nrf_pwm.h" @@ -90,7 +90,7 @@ struct serial_s { struct spi_s { int instance; PinName cs; - nrf_drv_spi_config_t config; + nrfx_spi_config_t config; bool update; #if DEVICE_SPI_ASYNCH diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/spi_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/spi_api.c index 68bc038d637..e16ae414e0a 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/spi_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/spi_api.c @@ -46,11 +46,17 @@ #include "nrfx_spi.h" +#if 0 +#define DEBUG_PRINTF(...) printf(__VA_ARGS__) +#else +#define DEBUG_PRINTF(...) +#endif + /* Pre-allocate instances and share them globally. */ -static const nrf_drv_spi_t nordic_nrf5_spi_instance[3] = { - NRF_DRV_SPI_INSTANCE(0), - NRF_DRV_SPI_INSTANCE(1), - NRF_DRV_SPI_INSTANCE(2) +static const nrfx_spi_t nordic_nrf5_spi_instance[3] = { + NRFX_SPI_INSTANCE(0), + NRFX_SPI_INSTANCE(1), + NRFX_SPI_INSTANCE(2) }; /* Keep track of which instance has been initialized. */ @@ -58,7 +64,7 @@ static bool nordic_nrf5_spi_initialized[3] = { false, false, false }; /* Forware declare interrupt handler. */ #if DEVICE_SPI_ASYNCH -static void nordic_nrf5_spi_event_handler(nrf_drv_spi_evt_t const *p_event, void *p_context); +static void nordic_nrf5_spi_event_handler(nrfx_spi_evt_t const *p_event, void *p_context); #endif /* Forward declaration. These functions are implemented in the driver but not @@ -99,7 +105,7 @@ static void spi_configure_driver_instance(spi_t *obj) /* Clean up and uninitialize peripheral if already initialized. */ if (nordic_nrf5_spi_initialized[instance]) { - nrf_drv_spi_uninit(&nordic_nrf5_spi_instance[instance]); + nrfx_spi_uninit(&nordic_nrf5_spi_instance[instance]); } #if DEVICE_SPI_ASYNCH @@ -141,7 +147,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel /* Get instance based on requested pins. */ spi_inst->instance = pin_instance_spi(mosi, miso, sclk); - MBED_ASSERT(spi_inst->instance < ENABLED_SPI_COUNT); + MBED_ASSERT(spi_inst->instance < NRFX_SPI_ENABLED_COUNT); /* Store chip select separately for manual enabling. */ spi_inst->cs = ssel; @@ -150,14 +156,14 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel spi_inst->config.sck_pin = sclk; spi_inst->config.mosi_pin = mosi; spi_inst->config.miso_pin = miso; - spi_inst->config.ss_pin = NRF_DRV_SPI_PIN_NOT_USED; + spi_inst->config.ss_pin = NRFX_SPI_PIN_NOT_USED; /* Use the default config. */ spi_inst->config.irq_priority = SPI_DEFAULT_CONFIG_IRQ_PRIORITY; spi_inst->config.orc = SPI_FILL_CHAR; - spi_inst->config.frequency = NRF_DRV_SPI_FREQ_1M; - spi_inst->config.mode = NRF_DRV_SPI_MODE_0; - spi_inst->config.bit_order = NRF_DRV_SPI_BIT_ORDER_MSB_FIRST; + spi_inst->config.frequency = NRF_SPI_FREQ_4M; + spi_inst->config.mode = NRF_SPI_MODE_0; + spi_inst->config.bit_order = NRF_SPI_BIT_ORDER_MSB_FIRST; #if DEVICE_SPI_ASYNCH /* Set default values for asynchronous variables. */ @@ -210,7 +216,7 @@ void spi_free(spi_t *obj) int instance = spi_inst->instance; /* Use driver uninit to free instance. */ - nrf_drv_spi_uninit(&nordic_nrf5_spi_instance[instance]); + nrfx_spi_uninit(&nordic_nrf5_spi_instance[instance]); /* Mark instance as uninitialized. */ nordic_nrf5_spi_initialized[instance] = false; @@ -238,17 +244,17 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) struct spi_s *spi_inst = obj; #endif - nrf_drv_spi_mode_t new_mode = NRF_DRV_SPI_MODE_0; + nrf_spi_mode_t new_mode = NRF_SPI_MODE_0; /* Convert Mbed HAL mode to Nordic mode. */ if(mode == 0) { - new_mode = NRF_DRV_SPI_MODE_0; + new_mode = NRF_SPI_MODE_0; } else if(mode == 1) { - new_mode = NRF_DRV_SPI_MODE_1; + new_mode = NRF_SPI_MODE_1; } else if(mode == 2) { - new_mode = NRF_DRV_SPI_MODE_2; + new_mode = NRF_SPI_MODE_2; } else if(mode == 3) { - new_mode = NRF_DRV_SPI_MODE_3; + new_mode = NRF_SPI_MODE_3; } /* Check if configuration has changed. */ @@ -280,23 +286,23 @@ void spi_frequency(spi_t *obj, int hz) struct spi_s *spi_inst = obj; #endif - nrf_drv_spi_frequency_t new_frequency = NRF_DRV_SPI_FREQ_1M; + nrf_spi_frequency_t new_frequency = NRF_SPI_FREQ_1M; /* Convert frequency to Nordic enum type. */ if (hz < 250000) { - new_frequency = NRF_DRV_SPI_FREQ_125K; + new_frequency = NRF_SPI_FREQ_125K; } else if (hz < 500000) { - new_frequency = NRF_DRV_SPI_FREQ_250K; + new_frequency = NRF_SPI_FREQ_250K; } else if (hz < 1000000) { - new_frequency = NRF_DRV_SPI_FREQ_500K; + new_frequency = NRF_SPI_FREQ_500K; } else if (hz < 2000000) { - new_frequency = NRF_DRV_SPI_FREQ_1M; + new_frequency = NRF_SPI_FREQ_1M; } else if (hz < 4000000) { - new_frequency = NRF_DRV_SPI_FREQ_2M; + new_frequency = NRF_SPI_FREQ_2M; } else if (hz < 8000000) { - new_frequency = NRF_DRV_SPI_FREQ_4M; + new_frequency = NRF_SPI_FREQ_4M; } else { - new_frequency = NRF_DRV_SPI_FREQ_8M; + new_frequency = NRF_SPI_FREQ_8M; } /* Check if configuration has changed. */ @@ -316,6 +322,8 @@ void spi_frequency(spi_t *obj, int hz) */ int spi_master_write(spi_t *obj, int value) { + nrfx_err_t ret; + nrfx_spi_xfer_desc_t desc; #if DEVICE_SPI_ASYNCH struct spi_s *spi_inst = &obj->spi; #else @@ -337,7 +345,14 @@ int spi_master_write(spi_t *obj, int value) } /* Transfer 1 byte. */ - nrf_drv_spi_transfer(&nordic_nrf5_spi_instance[instance], &tx_buff, 1, &rx_buff, 1); + desc.p_tx_buffer = &tx_buff; + desc.p_rx_buffer = &rx_buff; + desc.tx_length = 1; + desc.rx_length = 1; + ret = nrfx_spi_xfer(&nordic_nrf5_spi_instance[instance], &desc, 0); + + if (ret != NRFX_SUCCESS) + DEBUG_PRINTF("%d error returned from nrf_spi_xfer\n\r"); /* Manually set chip select pin if defined. */ if (spi_inst->cs != NC) { @@ -365,6 +380,7 @@ int spi_master_write(spi_t *obj, int value) */ int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length, char write_fill) { + nrfx_spi_xfer_desc_t desc; #if DEVICE_SPI_ASYNCH struct spi_s *spi_inst = &obj->spi; #else @@ -396,10 +412,10 @@ int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, cha int tx_offset = 0; int rx_offset = 0; - ret_code_t result = NRF_SUCCESS; + ret_code_t result = NRFX_SUCCESS; /* Loop until all data is sent and received. */ - while (((tx_length > 0) || (rx_length > 0)) && (result == NRF_SUCCESS)) { + while (((tx_length > 0) || (rx_length > 0)) && (result == NRFX_SUCCESS)) { /* Check if tx_length is larger than 255 and if so, limit to 255. */ int tx_actual_length = (tx_length > 255) ? 255 : tx_length; @@ -418,11 +434,12 @@ int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, cha NULL; /* Blocking transfer. */ - result = nrf_drv_spi_transfer(&nordic_nrf5_spi_instance[instance], - tx_actual_buffer, - tx_actual_length, - rx_actual_buffer, - rx_actual_length); + desc.p_tx_buffer = tx_actual_buffer; + desc.p_rx_buffer = rx_actual_buffer; + desc.tx_length = tx_actual_length; + desc.rx_length = rx_actual_length; + result = nrfx_spi_xfer(&nordic_nrf5_spi_instance[instance], + &desc, 0); /* Update loop variables. */ tx_length -= tx_actual_length; @@ -558,6 +575,7 @@ void spi_slave_write(spi_t *obj, int value) static ret_code_t spi_master_transfer_async_continue(spi_t *obj) { + nrfx_spi_xfer_desc_t desc; /* Remaining data to be transferred. */ size_t tx_length = obj->tx_buff.length - obj->tx_buff.pos; size_t rx_length = obj->rx_buff.length - obj->rx_buff.pos; @@ -572,17 +590,18 @@ static ret_code_t spi_master_transfer_async_continue(spi_t *obj) rx_length = 255; } - ret_code_t result = nrf_drv_spi_transfer(&nordic_nrf5_spi_instance[obj->spi.instance], - ((const uint8_t *)(obj->tx_buff.buffer) + obj->tx_buff.pos), - tx_length, - ((uint8_t *)(obj->rx_buff.buffer) + obj->rx_buff.pos), - rx_length); + desc.p_tx_buffer = ((const uint8_t *)(obj->tx_buff.buffer) + obj->tx_buff.pos); + desc.p_rx_buffer = ((uint8_t *)(obj->rx_buff.buffer) + obj->rx_buff.pos); + desc.tx_length = tx_length; + desc.rx_length = rx_length; + ret_code_t result = nrfx_spi_xfer(&nordic_nrf5_spi_instance[obj->spi.instance], + &desc, 0); return result; } /* Callback function for driver calls. This is called from ISR context. */ -static void nordic_nrf5_spi_event_handler(nrf_drv_spi_evt_t const *p_event, void *p_context) +static void nordic_nrf5_spi_event_handler(nrfx_spi_evt_t const *p_event, void *p_context) { // Only safe to use with mbed-printf. //DEBUG_PRINTF("nordic_nrf5_twi_event_handler: %d %p\r\n", p_event->type, p_context); @@ -593,11 +612,11 @@ static void nordic_nrf5_spi_event_handler(nrf_drv_spi_evt_t const *p_event, void spi_t *obj = (spi_t *) p_context; struct spi_s *spi_inst = &obj->spi; - if (p_event->type == NRF_DRV_SPI_EVENT_DONE) { + if (p_event->type == NRFX_SPI_EVENT_DONE) { /* Update buffers with new positions. */ - obj->tx_buff.pos += p_event->data.done.tx_length; - obj->rx_buff.pos += p_event->data.done.rx_length; + obj->tx_buff.pos += p_event->xfer_desc.tx_length; + obj->rx_buff.pos += p_event->xfer_desc.rx_length; /* Setup a new transfer if more data is pending. */ if ((obj->tx_buff.pos < obj->tx_buff.length) || (obj->rx_buff.pos < obj->tx_buff.length)) { @@ -606,7 +625,7 @@ static void nordic_nrf5_spi_event_handler(nrf_drv_spi_evt_t const *p_event, void ret_code_t result = spi_master_transfer_async_continue(obj); /* Abort if transfer wasn't accepted. */ - if (result != NRF_SUCCESS) { + if (result != NRFX_SUCCESS) { /* Signal callback handler that transfer failed. */ signal_error = true; @@ -736,7 +755,7 @@ void spi_master_transfer(spi_t *obj, ret_code_t result = spi_master_transfer_async_continue(obj); /* Signal error if event mask matches and event handler is set. */ - if ((result != NRF_SUCCESS) && (mask & SPI_EVENT_ERROR) && handler) { + if ((result != NRFX_SUCCESS) && (mask & SPI_EVENT_ERROR) && handler) { /* Cast handler to callback function pointer. */ void (*callback)(void) = (void (*)(void)) handler; @@ -792,7 +811,7 @@ void spi_abort_asynch(spi_t *obj) int instance = obj->spi.instance; /* Abort transfer. */ - nrf_drv_spi_abort(&nordic_nrf5_spi_instance[instance]); + nrfx_spi_abort(&nordic_nrf5_spi_instance[instance]); /* Force reconfiguration. */ object_owner_spi2c_set(instance, NULL); From 6752ae79b7c5983bc2a1b2d38eb711fad3b9179d Mon Sep 17 00:00:00 2001 From: Naveen Kaje Date: Mon, 13 Aug 2018 16:04:40 -0500 Subject: [PATCH 443/488] NRF52: i2c_api: port from Softdevice 14.2 to 15.0 --- .../TARGET_NRF5x/TARGET_NRF52/i2c_api.c | 118 ++++++++++-------- 1 file changed, 67 insertions(+), 51 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/i2c_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/i2c_api.c index a7fb4745903..f1dcb6c1838 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/i2c_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/i2c_api.c @@ -55,9 +55,9 @@ #include "pinmap_ex.h" #include "PeripheralPins.h" -#include "nrf_drv_twi.h" -#include "nrf_drv_common.h" +#include "nrfx_twi.h" #include "app_util_platform.h" +#include "prs/nrfx_prs.h" #if 0 #define DEBUG_PRINTF(...) printf(__VA_ARGS__) @@ -108,7 +108,7 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl) /* Get instance from pin configuration. */ int instance = pin_instance_i2c(sda, scl); - MBED_ASSERT(instance < ENABLED_TWI_COUNT); + MBED_ASSERT(instance < NRFX_TWI_ENABLED_COUNT); /* Initialize i2c_t object */ config->instance = instance; @@ -228,6 +228,15 @@ void i2c_configure_twi_instance(i2c_t *obj) struct i2c_s *config = obj; #endif + static nrfx_irq_handler_t const irq_handlers[NRFX_TWI_ENABLED_COUNT] = { + #if NRFX_CHECK(NRFX_TWI0_ENABLED) + nrfx_twi_0_irq_handler, + #endif + #if NRFX_CHECK(NRFX_TWI1_ENABLED) + nrfx_twi_1_irq_handler, + #endif + }; + int instance = config->instance; /* Get pointer to object of the current owner of the peripheral. */ @@ -253,9 +262,21 @@ void i2c_configure_twi_instance(i2c_t *obj) * deinitialize on object destruction. */ NRFX_IRQ_DISABLE((nrfx_get_irq_number((void const*)nordic_nrf5_twi_register[instance]))); -// RF - there doesn't appear to be a replacement for nrf_drv_common_per_res_release() ! -// futher investigation required -// nrf_drv_common_per_res_release(nordic_nrf5_twi_register[instance]); + /* Release and re-initialize the irq handlers. + * observation: based on call flow, this is called only during i2c_reset and i2c_byte_write + * The nrfx_prs_acquire is normally called in nrfx_twi_init which is part of the i2c_configure_driver_instance, + * not i2c_configure_twi_intance. Hence I think the release and acquire is not doing any useful work here. + * Keeping for reference and should clean up after testing if found not useful. + */ + + nrfx_prs_release(nordic_nrf5_twi_register[instance]); + if (nrfx_prs_acquire(nordic_nrf5_twi_register[instance], + irq_handlers[instance]) != NRFX_SUCCESS) + { + DEBUG_PRINTF("Function: %s, nrfx_prs_acquire error code: %s.", + __func__, + err_code); + } /* Reset shorts register. */ nrf_twi_shorts_set(nordic_nrf5_twi_register[instance], 0); @@ -372,30 +393,29 @@ int i2c_byte_write(i2c_t *obj, int data) if (error & NRF_TWI_ERROR_ADDRESS_NACK) { result = 0; // set NACK - } - } else { - - /* Normal write. Send next byte after clearing event flag. */ - nrf_twi_event_clear(nordic_nrf5_twi_register[instance], NRF_TWI_EVENT_TXDSENT); - nrf_twi_txd_set(nordic_nrf5_twi_register[instance], data); - - /* Setup stop watch for timeout. */ - uint32_t start_us = lp_ticker_read(); - uint32_t now_us = start_us; - - /* Block until timeout or the byte has been sent. */ - while (((now_us - start_us) < MAXIMUM_TIMEOUT_US) && - !(nrf_twi_event_check(nordic_nrf5_twi_register[instance], NRF_TWI_EVENT_TXDSENT))) { - now_us = lp_ticker_read(); - } - - /* Check the error code to see if the byte was acknowledged. */ - uint32_t error = nrf_twi_errorsrc_get_and_clear(nordic_nrf5_twi_register[instance]); - - if (error & NRF_TWI_ERROR_DATA_NACK) { - result = 0; // set NACK - } else if (now_us - start_us >= MAXIMUM_TIMEOUT_US) { - result = 2; // set timeout + } else { + /* Normal write. Send next byte after clearing event flag. */ + nrf_twi_event_clear(nordic_nrf5_twi_register[instance], NRF_TWI_EVENT_TXDSENT); + nrf_twi_txd_set(nordic_nrf5_twi_register[instance], data); + + /* Setup stop watch for timeout. */ + uint32_t start_us = lp_ticker_read(); + uint32_t now_us = start_us; + + /* Block until timeout or the byte has been sent. */ + while (((now_us - start_us) < MAXIMUM_TIMEOUT_US) && + !(nrf_twi_event_check(nordic_nrf5_twi_register[instance], NRF_TWI_EVENT_TXDSENT))) { + now_us = lp_ticker_read(); + } + + /* Check the error code to see if the byte was acknowledged. */ + uint32_t error = nrf_twi_errorsrc_get_and_clear(nordic_nrf5_twi_register[instance]); + + if (error & NRF_TWI_ERROR_DATA_NACK) { + result = 0; // set NACK + } else if (now_us - start_us >= MAXIMUM_TIMEOUT_US) { + result = 2; // set timeout + } } } @@ -533,11 +553,11 @@ void i2c_reset(i2c_t *obj) */ /* Global array holding driver configuration for easy access. */ -static const nrf_drv_twi_t nordic_nrf5_instance[2] = { NRF_DRV_TWI_INSTANCE(0), NRF_DRV_TWI_INSTANCE(1) }; +static const nrfx_twi_t nordic_nrf5_instance[2] = { NRFX_TWI_INSTANCE(0), NRFX_TWI_INSTANCE(1) }; /* Forward declare interrupt handler. */ #if DEVICE_I2C_ASYNCH -static void nordic_nrf5_twi_event_handler(nrf_drv_twi_evt_t const *p_event, void *p_context); +static void nordic_nrf5_twi_event_handler(nrfx_twi_evt_t const *p_event, void *p_context); #endif /** @@ -579,26 +599,22 @@ static void i2c_configure_driver_instance(i2c_t *obj) /* If the peripheral is already running, then disable it and use the driver API to uninitialize it.*/ // 15.0 - has additional "twi" structure level and had to rename to "u" from "reg" - if (nordic_nrf5_instance[instance].u.twi.p_twi->ENABLE) { - nrf_drv_twi_disable(&nordic_nrf5_instance[instance]); - nrf_drv_twi_uninit(&nordic_nrf5_instance[instance]); + if (nordic_nrf5_instance[instance].p_twi->ENABLE) { + nrfx_twi_disable(&nordic_nrf5_instance[instance]); + nrfx_twi_uninit(&nordic_nrf5_instance[instance]); } /* Force resource release. This is necessary because mbed drivers don't * deinitialize on object destruction. */ NRFX_IRQ_DISABLE((nrfx_get_irq_number((void const*)nordic_nrf5_twi_register[instance]))); -// RF - there doesn't appear to be a replacement for nrf_drv_common_per_res_release() -// RF - check how this is now handled -// nrf_drv_common_per_res_release(nordic_nrf5_twi_register[instance]); /* Configure driver with new settings. */ - nrf_drv_twi_config_t twi_config = { + nrfx_twi_config_t twi_config = { .scl = config->scl, .sda = config->sda, .frequency = config->frequency, .interrupt_priority = APP_IRQ_PRIORITY_LOWEST, - .clear_bus_init = false, .hold_bus_uninit = false }; @@ -628,7 +644,7 @@ static void i2c_configure_driver_instance(i2c_t *obj) #endif /* Enable peripheral. */ - nrf_drv_twi_enable(&nordic_nrf5_instance[instance]); + nrfx_twi_enable(&nordic_nrf5_instance[instance]); } } @@ -659,7 +675,7 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) i2c_configure_driver_instance(obj); /* Initialize transaction. */ - ret_code_t retval = nrf_drv_twi_rx(&nordic_nrf5_instance[instance], + ret_code_t retval = nrfx_twi_rx(&nordic_nrf5_instance[instance], address >> 1, (uint8_t *) data, length); @@ -703,7 +719,7 @@ int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) i2c_configure_driver_instance(obj); /* Initialize transaction. */ - ret_code_t retval = nrf_drv_twi_tx(&nordic_nrf5_instance[instance], + ret_code_t retval = nrfx_twi_tx(&nordic_nrf5_instance[instance], address >> 1, (const uint8_t *) data, length, @@ -734,7 +750,7 @@ int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) */ /* Callback function for driver calls. This is called from ISR context. */ -static void nordic_nrf5_twi_event_handler(nrf_drv_twi_evt_t const *p_event, void *p_context) +static void nordic_nrf5_twi_event_handler(nrfx_twi_evt_t const *p_event, void *p_context) { // Only safe to use with mbed-printf. //DEBUG_PRINTF("nordic_nrf5_twi_event_handler: %d %p\r\n", p_event->type, p_context); @@ -746,17 +762,17 @@ static void nordic_nrf5_twi_event_handler(nrf_drv_twi_evt_t const *p_event, void switch (p_event->type) { /* Transfer completed event. */ - case NRF_DRV_TWI_EVT_DONE: + case NRFX_TWI_EVT_DONE: config->event = I2C_EVENT_TRANSFER_COMPLETE; break; /* Error event: NACK received after sending the address. */ - case NRF_DRV_TWI_EVT_ADDRESS_NACK: + case NRFX_TWI_EVT_ADDRESS_NACK: config->event = I2C_EVENT_ERROR_NO_SLAVE; break; /* Error event: NACK received after sending a data byte. */ - case NRF_DRV_TWI_EVT_DATA_NACK: + case NRFX_TWI_EVT_DATA_NACK: config->event = I2C_EVENT_TRANSFER_EARLY_NACK; break; @@ -824,16 +840,16 @@ void i2c_transfer_asynch(i2c_t *obj, i2c_configure_driver_instance(obj); /* Configure TWI transfer. */ - const nrf_drv_twi_xfer_desc_t twi_config = NRF_DRV_TWI_XFER_DESC_TXRX(address >> 1, + const nrfx_twi_xfer_desc_t twi_config = NRFX_TWI_XFER_DESC_TXRX(address >> 1, (uint8_t*) tx, tx_length, rx, rx_length); - uint32_t flags = (stop) ? 0 : NRF_DRV_TWI_FLAG_TX_NO_STOP; + uint32_t flags = (stop) ? 0 : NRFX_TWI_FLAG_TX_NO_STOP; /* Initiate TWI transfer using NRF driver. */ - ret_code_t result = nrf_drv_twi_xfer(&nordic_nrf5_instance[instance], + ret_code_t result = nrfx_twi_xfer(&nordic_nrf5_instance[instance], &twi_config, flags); @@ -878,7 +894,7 @@ uint8_t i2c_active(i2c_t *obj) DEBUG_PRINTF("i2c_active\r\n"); /* Query NRF driver if transaction is in progress. */ - return nrf_drv_twi_is_busy(&nordic_nrf5_instance[obj->i2c.instance]); + return nrfx_twi_is_busy(&nordic_nrf5_instance[obj->i2c.instance]); } /** Abort asynchronous transfer From 44ac5db98c878b0717105f9eaaeaf51222cb7e84 Mon Sep 17 00:00:00 2001 From: Naveen Kaje Date: Fri, 28 Sep 2018 12:38:34 -0500 Subject: [PATCH 444/488] NRF: enable PRS (Peripheral Resource Sharing) for NRF52832 and NRF52840 --- .../TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h | 4 ++++ .../TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h index a0fa6934dc8..535e2cec44a 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h @@ -4038,6 +4038,10 @@ // +#ifndef NRFX_PRS_ENABLED +#define NRFX_PRS_ENABLED 1 +#endif + // // NRFX_TWI_ENABLED - nrfx_twi - TWI peripheral driver diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h index bdc3b79788d..cf224cd4303 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h @@ -4040,6 +4040,10 @@ // +#ifndef NRFX_PRS_ENABLED +#define NRFX_PRS_ENABLED 1 +#endif + // NRFX_TWI_ENABLED - nrfx_twi - TWI peripheral driver //========================================================== From 8313a2d9850f526074547f469e5def0ea81e8e08 Mon Sep 17 00:00:00 2001 From: Naveen Kaje Date: Thu, 27 Sep 2018 15:06:23 -0500 Subject: [PATCH 445/488] NRF52832: enable UART --- .../TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h index 535e2cec44a..4d84c098896 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h @@ -3558,7 +3558,7 @@ #ifndef NRFX_EGU_ENABLED -#define NRFX_EGU_ENABLED 0 +#define NRFX_EGU_ENABLED 1 #endif // NRFX_SWI0_DISABLED - Exclude SWI0 from being utilized by the driver @@ -4278,11 +4278,11 @@ // NRFX_UART_ENABLED - nrfx_uart - UART peripheral driver //========================================================== #ifndef NRFX_UART_ENABLED -#define NRFX_UART_ENABLED 0 +#define NRFX_UART_ENABLED 1 #endif // NRFX_UART0_ENABLED - Enable UART0 instance #ifndef NRFX_UART0_ENABLED -#define NRFX_UART0_ENABLED 0 +#define NRFX_UART0_ENABLED 1 #endif // NRFX_UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control @@ -5524,7 +5524,7 @@ // UART_ENABLED - nrf_drv_uart - UART/UARTE peripheral driver - legacy layer //========================================================== #ifndef UART_ENABLED -#define UART_ENABLED 1 +#define UART_ENABLED 0 #endif // UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control From d613667f82564a5f3616b6ac365b5da39f8a5aca Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Mon, 8 Oct 2018 16:24:18 -0500 Subject: [PATCH 446/488] nRF52832 needs NRFX_RNG_ENABLED to use the legacy driver --- .../TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h index 4d84c098896..a5ff1865839 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h @@ -2921,7 +2921,7 @@ // NRFX_RNG_ENABLED - nrfx_rng - RNG peripheral driver //========================================================== #ifndef NRFX_RNG_ENABLED -#define NRFX_RNG_ENABLED 0 +#define NRFX_RNG_ENABLED 1 #endif // NRFX_RNG_CONFIG_ERROR_CORRECTION - Error correction From 6579b56eb0007afb1444538751cf6a807740982e Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Tue, 16 Oct 2018 12:46:41 -0500 Subject: [PATCH 447/488] nRF52_DK: Use mbed_lib.json to set app_offset (MBED_APP_START) When the SoftDevice (SD) is enabled we need to set the app_offset to 0x26000 to make room for the SoftDevice. If we let the build tools self-manage this, MBED_APP_START is coming out at 0x25000 which is not correct for the Nordic 15.0 SDK. The app_offset value is translated to MBED_APP_START by the build infrastructure. We were hard coding MBED_APP_START in the scatter and ld files as a temporary measure while testing. This now sets it properly if the SD is being brought in. --- .../device/TOOLCHAIN_ARM_STD/nRF52832.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/NRF52832.ld | 4 ++-- .../TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json | 3 ++- 3 files changed, 7 insertions(+), 6 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct index 069c784ad46..5d3cbe09c98 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct @@ -15,7 +15,7 @@ #if !defined(MBED_RAM_START) #if defined(SOFTDEVICE_PRESENT) #define MBED_RAM_START 0x20001D70 - #define MBED_RAM_SIZE 0xCE30 + #define MBED_RAM_SIZE 0xE290 #else #define MBED_RAM_START 0x20000000 #define MBED_RAM_SIZE 0x10000 @@ -27,8 +27,8 @@ #define MBED_RAM1_START (MBED_RAM_START + MBED_RAM0_SIZE) #define MBED_RAM1_SIZE (MBED_RAM_SIZE - MBED_RAM0_SIZE) -LR_IROM1 0x26000 MBED_APP_SIZE { - ER_IROM1 0x26000 MBED_APP_SIZE { +LR_IROM1 MBED_APP_START MBED_APP_SIZE { + ER_IROM1 MBED_APP_START MBED_APP_SIZE { *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld index 67a25fe5f52..d6ab2818c82 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld @@ -29,7 +29,7 @@ #if !defined(MBED_RAM_START) #if defined(SOFTDEVICE_PRESENT) #define MBED_RAM_START 0x20001D70 - #define MBED_RAM_SIZE 0xCE30 + #define MBED_RAM_SIZE 0xE290 #else #define MBED_RAM_START 0x20000000 #define MBED_RAM_SIZE 0x10000 @@ -47,7 +47,7 @@ MEMORY { - FLASH (rx) : ORIGIN = 0x26000, LENGTH = MBED_APP_SIZE + FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE RAM_NVIC (rwx) : ORIGIN = MBED_RAM0_START, LENGTH = MBED_RAM0_SIZE RAM (rwx) : ORIGIN = MBED_RAM1_START, LENGTH = MBED_RAM1_SIZE } diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json index 23292cb7432..85e879cbc65 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json @@ -36,7 +36,8 @@ ], "target_overrides": { "*": { - "target.bootloader_img": "hex/s132_nrf52_6.0.0_softdevice.hex" + "target.bootloader_img": "hex/s132_nrf52_6.0.0_softdevice.hex", + "target.app_offset": "0x26000" } } } From 19871429278d34908e932654e2af8951368170ae Mon Sep 17 00:00:00 2001 From: Naveen Kaje Date: Wed, 26 Sep 2018 15:26:45 -0500 Subject: [PATCH 448/488] NRF52: Fix vector table Ensure that vector table gets initialized properly. The table that we initialize in startup_nrf52840.S gets wiped out as the section is declared as noinit. Fix this by implementing the weak function mbed_sdk_init that inits the vector table. --- .../TARGET_NRF5x/TARGET_NRF52/reloc_vector_table.c | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/reloc_vector_table.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/reloc_vector_table.c index 23f87ea7ddd..b1a5d442d1c 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/reloc_vector_table.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/reloc_vector_table.c @@ -47,15 +47,7 @@ #include "nrf_dfu_mbr.h" #endif -#if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) - __attribute__ ((section(".bss.nvictable"),zero_init)) - uint32_t nrf_dispatch_vector[NVIC_NUM_VECTORS]; -#elif defined(__GNUC__) - __attribute__ ((section(".nvictable"))) - uint32_t nrf_dispatch_vector[NVIC_NUM_VECTORS]; -#elif defined(__ICCARM__) - uint32_t nrf_dispatch_vector[NVIC_NUM_VECTORS] @ ".nvictable"; -#endif +uint32_t nrf_dispatch_vector[NVIC_NUM_VECTORS]; extern uint32_t __Vectors[]; @@ -113,7 +105,6 @@ void nrf_reloc_vector_table(void) #endif } - void mbed_sdk_init(void) { if (STDIO_UART_RTS != NC) { From 2cffbd2170522e17eba26fde6283392207eefcab Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Tue, 16 Oct 2018 18:22:40 -0500 Subject: [PATCH 449/488] Updates after rebase with Mbed master (circa OS v5.10.1) * Remove NRF_SDH_CLOCK parameters from mbed_lib.json * Bring in QSPI for nRF52840 * Migrate legacy QSPI driver to SDK v15 (nrfx_qspi.h) * Remove outdated comment in i2c_api.c --- .../TARGET_MCU_NRF52840/config/sdk_config.h | 2 +- .../TARGET_NRF5x/TARGET_NRF52/i2c_api.c | 1 - .../TARGET_NRF5x/TARGET_NRF52/objects.h | 4 ++-- .../TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json | 3 --- .../TARGET_SOFTDEVICE_S140_FULL/mbed_lib.json | 3 --- .../components/libraries/util/app_util.h | 2 +- targets/TARGET_NORDIC/TARGET_NRF5x/qspi_api.c | 18 +++++++++--------- 7 files changed, 13 insertions(+), 20 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h index cf224cd4303..89cd62fcec2 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h @@ -2793,7 +2793,7 @@ // NRFX_QSPI_ENABLED - nrfx_qspi - QSPI peripheral driver //========================================================== #ifndef NRFX_QSPI_ENABLED -#define NRFX_QSPI_ENABLED 0 +#define NRFX_QSPI_ENABLED 1 #endif // NRFX_QSPI_CONFIG_SCK_DELAY - tSHSL, tWHSL and tSHWL in number of 16 MHz periods (62.5 ns). <0-255> diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/i2c_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/i2c_api.c index f1dcb6c1838..31fa23848cc 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/i2c_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/i2c_api.c @@ -598,7 +598,6 @@ static void i2c_configure_driver_instance(i2c_t *obj) config->mode = NORDIC_I2C_MODE_DRIVER; /* If the peripheral is already running, then disable it and use the driver API to uninitialize it.*/ - // 15.0 - has additional "twi" structure level and had to rename to "u" from "reg" if (nordic_nrf5_instance[instance].p_twi->ENABLE) { nrfx_twi_disable(&nordic_nrf5_instance[instance]); nrfx_twi_uninit(&nordic_nrf5_instance[instance]); diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/objects.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/objects.h index a9c93ff61f4..d048efe1d70 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/objects.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/objects.h @@ -144,11 +144,11 @@ struct flash_s { #if DEVICE_QSPI -#include "nrf_drv_qspi.h" +#include "nrfx_qspi.h" struct qspi_s { uint32_t placeholder; - //nrf_drv_qspi_config_t config; + //nrfx_qspi_config_t config; }; #endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json index 85e879cbc65..4bdf39dbdb5 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json @@ -4,9 +4,6 @@ "SOFTDEVICE_PRESENT=1", "S132", "BLE_STACK_SUPPORT_REQD", - "NRF_SDH_CLOCK_LF_SRC=1", - "NRF_SDH_CLOCK_LF_RC_CTIV=0", - "NRF_SDH_CLOCK_LF_RC_TEMP_CTIV=0", "NRF_SDH_CLOCK_LF_XTAL_ACCURACY=7", "NRF_SD_BLE_API_VERSION=5", "NRF_SDH_ENABLED=1", diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/mbed_lib.json b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/mbed_lib.json index 315f77a6fd3..444d257e445 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/mbed_lib.json +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/mbed_lib.json @@ -4,9 +4,6 @@ "SOFTDEVICE_PRESENT=1", "S140", "BLE_STACK_SUPPORT_REQD", - "NRF_SDH_CLOCK_LF_SRC=1", - "NRF_SDH_CLOCK_LF_RC_CTIV=0", - "NRF_SDH_CLOCK_LF_RC_TEMP_CTIV=0", "NRF_SDH_CLOCK_LF_XTAL_ACCURACY=7", "NRF_SD_BLE_API_VERSION=5", "NRF_SDH_ENABLED=1", diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_util.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_util.h index 2330d390ecc..e046c0d24e8 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_util.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_util.h @@ -98,7 +98,7 @@ extern uint32_t __StackLimit; #elif defined ( __CC_ARM ) extern char Load$$LR$$LR_IROM1$$Base; extern char Load$$LR$$LR_IROM1$$Length; -extern char Load$$LR$$LR_IROM1$$Limit; +extern uint32_t Load$$LR$$LR_IROM1$$Limit[]; #define CODE_START ((uint32_t)&Load$$LR$$LR_IROM1$$Base) #define CODE_END ((uint32_t)&Load$$LR$$LR_IROM1$$Limit) #define CODE_SIZE ((uint32_t)&Load$$LR$$LR_IROM1$$Length) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/qspi_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/qspi_api.c index 01c524edac4..01661d1899b 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/qspi_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/qspi_api.c @@ -41,8 +41,8 @@ #if DEVICE_QSPI #include "nrf_drv_common.h" -#include "nrf_drv_qspi.h" #include "PeripheralPins.h" +#include "nrfx_qspi.h" /* TODO @@ -80,7 +80,7 @@ TODO #define SFDP_READ_LEN 8 // 8 SFDP bytes can be read at a time #define SFDP_READ_MAX (SFDP_DATA_LEN / SFDP_READ_LEN) -static nrf_drv_qspi_config_t config; +static nrfx_qspi_config_t config; // Private helper function to track initialization static ret_code_t _qspi_drv_init(void); @@ -195,8 +195,8 @@ qspi_status_t qspi_prepare_command(qspi_t *obj, const qspi_command_t *command, b //Configure QSPI with new command format ret_code_t ret_status = _qspi_drv_init(); - if (ret_status != NRF_SUCCESS ) { - if (ret_status == NRF_ERROR_INVALID_PARAM) { + if (ret_status != NRFX_SUCCESS ) { + if (ret_status == NRFX_ERROR_INVALID_PARAM) { return QSPI_STATUS_INVALID_PARAMETER; } else { return QSPI_STATUS_ERROR; @@ -252,7 +252,7 @@ qspi_status_t qspi_frequency(qspi_t *obj, int hz) // use sync version, no handler ret_code_t ret = _qspi_drv_init(); - if (ret == NRF_SUCCESS ) { + if (ret == NRFX_SUCCESS ) { return QSPI_STATUS_OK; } else if (ret == NRF_ERROR_INVALID_PARAM) { return QSPI_STATUS_INVALID_PARAMETER; @@ -323,7 +323,7 @@ qspi_status_t qspi_read(qspi_t *obj, const qspi_command_t *command, void *data, } } - ret_code_t ret = nrf_drv_qspi_read(data, *length, command->address.value); + ret_code_t ret = nrfx_qspi_read(data, *length, command->address.value); if (ret == NRF_SUCCESS ) { return QSPI_STATUS_OK; } else { @@ -368,7 +368,7 @@ qspi_status_t qspi_command_transfer(qspi_t *obj, const qspi_command_t *command, return QSPI_STATUS_ERROR; } - ret_code = nrf_drv_qspi_cinstr_xfer(&qspi_cinstr_config, data, data); + ret_code = nrfx_qspi_cinstr_xfer(&qspi_cinstr_config, data, data); if (ret_code != NRF_SUCCESS) { return QSPI_STATUS_ERROR; } @@ -391,9 +391,9 @@ static ret_code_t _qspi_drv_init(void) if(_initialized) { //NRF implementation prevents calling init again. But we need to call init again to program the new command settings in the IFCONFIG registers. //So, we have to uninit qspi first and call init again. - nrf_drv_qspi_uninit(); + nrfx_qspi_uninit(); } - ret = nrf_drv_qspi_init(&config, NULL , NULL); + ret = nrfx_qspi_init(&config, NULL , NULL); if( ret == NRF_SUCCESS ) _initialized = true; return ret; From 6dae896c6e1777364afe823c9923ebccf2e33277 Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Mon, 22 Oct 2018 12:38:18 -0500 Subject: [PATCH 450/488] Fix build for nRF51 (fewer common files with nRF52) The 15.0 SDK doesn't support the nRF51 so it must continue to use the legacy NRF drivers. Thus the original common_rtc.c, gpio_api.c and us_ticker.c are restored and placed under TARGET_NRF5x/TARGET_NRF51. Likewise the modified common_rtc.c, gpio_api.c and us_ticker.c are moved to TARGET_NRF5x/TARGET_NRF52 so they are excluded from nRF51 builds. --- .../TARGET_NRF5x/TARGET_NRF51/common_rtc.c | 253 +++++++++++++++++ .../{ => TARGET_NRF51}/common_rtc.h | 0 .../TARGET_NRF5x/TARGET_NRF51/gpio_api.c | 259 ++++++++++++++++++ .../TARGET_NRF5x/TARGET_NRF51/us_ticker.c | 146 ++++++++++ .../{ => TARGET_NRF52}/common_rtc.c | 0 .../TARGET_NRF5x/TARGET_NRF52/common_rtc.h | 53 ++++ .../{ => TARGET_NRF52}/gpio_api.c | 0 .../{ => TARGET_NRF52}/us_ticker.c | 0 8 files changed, 711 insertions(+) create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/common_rtc.c rename targets/TARGET_NORDIC/TARGET_NRF5x/{ => TARGET_NRF51}/common_rtc.h (100%) create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/gpio_api.c create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/us_ticker.c rename targets/TARGET_NORDIC/TARGET_NRF5x/{ => TARGET_NRF52}/common_rtc.c (100%) create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/common_rtc.h rename targets/TARGET_NORDIC/TARGET_NRF5x/{ => TARGET_NRF52}/gpio_api.c (100%) rename targets/TARGET_NORDIC/TARGET_NRF5x/{ => TARGET_NRF52}/us_ticker.c (100%) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/common_rtc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/common_rtc.c new file mode 100644 index 00000000000..126c33f2086 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/common_rtc.c @@ -0,0 +1,253 @@ +/* + * Copyright (c) 2013 Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list + * of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA + * integrated circuit in a product or a software update for such product, must reproduce + * the above copyright notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be + * used to endorse or promote products derived from this software without specific prior + * written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary or object form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "us_ticker_api.h" +#include "common_rtc.h" +#include "app_util.h" +#include "nrf_drv_common.h" +#include "lp_ticker_api.h" +#include "mbed_critical.h" + +#if defined(NRF52_PAN_20) +/* Macro for testing if the SoftDevice is active, regardless of whether the + * application is build with the SoftDevice or not. + */ +#if defined(SOFTDEVICE_PRESENT) +#include "nrf_sdh.h" +#define NRF_HAL_SD_IS_ENABLED() nrf_sdh_is_enabled() +#else +#define NRF_HAL_SD_IS_ENABLED() 0 +#endif +#endif + + +//------------------------------------------------------------------------------ +// Common stuff used also by lp_ticker and rtc_api (see "common_rtc.h"). +// +#include "app_util_platform.h" + +bool m_common_rtc_enabled = false; +uint32_t volatile m_common_rtc_overflows = 0; +bool volatile lp_ticker_interrupt_fire = false; + +__STATIC_INLINE void rtc_ovf_event_check(void) +{ + if (nrf_rtc_event_pending(COMMON_RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW)) { + nrf_rtc_event_clear(COMMON_RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW); + /* Don't disable this event. It shall occur periodically. + * It is needed for RTC. */ + + ++m_common_rtc_overflows; + } +} + +#if defined(TARGET_MCU_NRF51822) +void common_rtc_irq_handler(void) +#else +void COMMON_RTC_IRQ_HANDLER(void) +#endif +{ + rtc_ovf_event_check(); + +#if DEVICE_LPTICKER + if (nrf_rtc_event_pending(COMMON_RTC_INSTANCE, LP_TICKER_EVENT) || + lp_ticker_interrupt_fire) { + + if (lp_ticker_interrupt_fire) { + lp_ticker_interrupt_fire = false; + } + + lp_ticker_irq_handler(); + } +#endif +} + +/* Function for fix errata 20: RTC Register values are invalid. */ +__STATIC_INLINE void errata_20(void) +{ +#if defined(NRF52_PAN_20) + if (!NRF_HAL_SD_IS_ENABLED()) + { + NRF_CLOCK->EVENTS_LFCLKSTARTED = 0; + NRF_CLOCK->TASKS_LFCLKSTART = 1; + + while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0) + { + } + } + NRF_RTC1->TASKS_STOP = 0; +#endif +} + +void RTC1_IRQHandler(void); + +void common_rtc_init(void) +{ + if (m_common_rtc_enabled) { +#if DEVICE_LPTICKER + nrf_rtc_event_clear(COMMON_RTC_INSTANCE, LP_TICKER_EVENT); + nrf_rtc_int_disable(COMMON_RTC_INSTANCE, LP_TICKER_INT_MASK); +#endif + return; + } + + errata_20(); + + nrf_rtc_task_trigger(COMMON_RTC_INSTANCE, NRF_RTC_TASK_STOP); + + NVIC_SetVector(RTC1_IRQn, (uint32_t)RTC1_IRQHandler); + + /* RTC is driven by the low frequency (32.768 kHz) clock, a proper request + * must be made to have it running. + * Currently this clock is started in 'SystemInit' (see "system_nrf51.c" + * or "system_nrf52.c", respectively). + */ + + nrf_rtc_prescaler_set(COMMON_RTC_INSTANCE, 0); + + /* Clear all RTC events. */ +#if defined(TARGET_MCU_NRF51822) + nrf_rtc_event_clear(COMMON_RTC_INSTANCE, OS_TICK_EVENT); +#endif +#if DEVICE_LPTICKER + nrf_rtc_event_clear(COMMON_RTC_INSTANCE, LP_TICKER_EVENT); +#endif + nrf_rtc_event_clear(COMMON_RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW); + + /* Disable all RTC events (According to NRF_51 Reference Manual + * RTC events can not be used to control RTC interrupts). + * IRQ signal to NVIC is provided if interrupt is enabled. + */ + + nrf_rtc_event_disable(COMMON_RTC_INSTANCE, NRF_RTC_INT_OVERFLOW_MASK +#if defined(TARGET_MCU_NRF51822) + | OS_TICK_INT_MASK +#endif +#if DEVICE_LPTICKER + | LP_TICKER_INT_MASK +#endif + ); + + /* This interrupt is enabled permanently, since overflow indications are needed + * continuously. + */ + nrf_rtc_int_enable(COMMON_RTC_INSTANCE, NRF_RTC_INT_OVERFLOW_MASK); + + /* Disable LP ticker interrupt for now. */ +#if DEVICE_LPTICKER + nrf_rtc_int_disable(COMMON_RTC_INSTANCE, LP_TICKER_INT_MASK); +#endif + + nrf_drv_common_irq_enable(nrf_drv_get_IRQn(COMMON_RTC_INSTANCE), APP_IRQ_PRIORITY_HIGH); + + nrf_rtc_task_trigger(COMMON_RTC_INSTANCE, NRF_RTC_TASK_START); + + m_common_rtc_enabled = true; +} + +void common_rtc_free() +{ + nrf_rtc_task_trigger(COMMON_RTC_INSTANCE, NRF_RTC_TASK_STOP); + nrf_rtc_int_disable(COMMON_RTC_INSTANCE, LP_TICKER_INT_MASK); + NVIC_DisableIRQ(nrf_drv_get_IRQn(COMMON_RTC_INSTANCE)); + + m_common_rtc_enabled = false; +} + +void common_rtc_set_interrupt(uint32_t ticks_count, uint32_t cc_channel, + uint32_t int_mask) +{ + /* Set ticks value when interrupt should be fired. + * Interrupt scheduling is performed in upper layers. */ + + core_util_critical_section_enter(); + + /* Wrap ticks_count before comparisons. */ + ticks_count = RTC_WRAP(ticks_count); + + /* COMPARE occurs when a CC register is N and the COUNTER value transitions from N-1 to N. + * If the COUNTER is N, writing N+2 to a CC register is guaranteed to trigger a + * COMPARE event at N+2. + */ + const uint32_t now = nrf_rtc_counter_get(COMMON_RTC_INSTANCE); + + if (now == ticks_count || + RTC_WRAP(now + 1) == ticks_count) { + ticks_count = RTC_WRAP(ticks_count + 2); + } + + nrf_rtc_cc_set(COMMON_RTC_INSTANCE, cc_channel, ticks_count); + + if (!nrf_rtc_int_is_enabled(COMMON_RTC_INSTANCE, int_mask)) { + nrf_rtc_event_clear(COMMON_RTC_INSTANCE, LP_TICKER_EVENT); + nrf_rtc_int_enable(COMMON_RTC_INSTANCE, int_mask); + } + + core_util_critical_section_exit(); +} + +/* Since there is no SysTick on NRF51, the RTC1 channel 0 is used as an + * alternative source of RTOS ticks. + */ +#if defined(TARGET_MCU_NRF51822) + +#include "mbed_toolchain.h" + + +#define MAX_RTC_COUNTER_VAL ((1uL << RTC_COUNTER_BITS) - 1) + +#ifndef RTC1_CONFIG_FREQUENCY + #define RTC1_CONFIG_FREQUENCY 32678 // [Hz] +#endif + + + +void COMMON_RTC_IRQ_HANDLER(void) +{ + if(!nrf_rtc_event_pending(COMMON_RTC_INSTANCE, OS_TICK_EVENT)) { + common_rtc_irq_handler(); + } +} + +IRQn_Type mbed_get_m0_tick_irqn() +{ + return SWI3_IRQn; +} + + +#endif // defined(TARGET_MCU_NRF51822) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/common_rtc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/common_rtc.h similarity index 100% rename from targets/TARGET_NORDIC/TARGET_NRF5x/common_rtc.h rename to targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/common_rtc.h diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/gpio_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/gpio_api.c new file mode 100644 index 00000000000..0aa2504b0e9 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/gpio_api.c @@ -0,0 +1,259 @@ +/* mbed Microcontroller Library + * Copyright (c) 2006-2013 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include "mbed_assert.h" +#include "gpio_api.h" +#include "gpio_irq_api.h" +#include "pinmap.h" +#include "nrf_drv_gpiote.h" + + +#if defined(TARGET_MCU_NRF51822) +#define GPIO_PIN_COUNT 31 +#elif defined(TARGET_MCU_NRF52832) +#define GPIO_PIN_COUNT 32 +#elif defined(TARGET_MCU_NRF52840) +#define GPIO_PIN_COUNT 48 +#else +#error not recognized gpio count for mcu +#endif + +typedef struct { + bool used_as_gpio : 1; + PinDirection direction : 1; + PinMode pull : 2; + bool used_as_irq : 1; + bool irq_fall : 1; + bool irq_rise : 1; +} gpio_cfg_t; + +#if GPIO_PIN_COUNT > 32 +typedef uint64_t gpio_mask_t; +#else +typedef uint32_t gpio_mask_t; +#endif + +static gpio_mask_t m_gpio_initialized; +static gpio_cfg_t m_gpio_cfg[GPIO_PIN_COUNT]; + + +/*********** + GPIO IRQ +***********/ + +static gpio_irq_handler m_irq_handler; +static uint32_t m_channel_ids[GPIO_PIN_COUNT] = {0}; +static gpio_mask_t m_gpio_irq_enabled; + + +static void gpiote_irq_handler(nrf_drv_gpiote_pin_t pin, nrf_gpiote_polarity_t action) +{ + nrf_gpio_pin_sense_t sense = nrf_gpio_pin_sense_get(pin); + gpio_irq_event event = (sense == NRF_GPIO_PIN_SENSE_LOW) ? IRQ_RISE : IRQ_FALL; + + if (m_gpio_irq_enabled & ((gpio_mask_t)1 << pin)) { + if (((event == IRQ_RISE) && m_gpio_cfg[pin].irq_rise) + || ((event == IRQ_FALL) && m_gpio_cfg[pin].irq_fall)) { + m_irq_handler(m_channel_ids[pin], event); + } + } +} + +void GPIOTE_IRQHandler(void);// exported from nrf_drv_gpiote.c + +void gpio_init(gpio_t *obj, PinName pin) +{ + obj->pin = pin; + if (pin == (PinName)NC) { + return; + } + MBED_ASSERT((uint32_t)pin < GPIO_PIN_COUNT); + + NVIC_SetVector(GPIOTE_IRQn, (uint32_t) GPIOTE_IRQHandler); + + (void) nrf_drv_gpiote_init(); + + m_gpio_cfg[obj->pin].used_as_gpio = true; +} + +#ifdef TARGET_SDK_11 +// implement polyfill of gpio hal for the nRF5 SDK v11 +__STATIC_INLINE uint32_t nrf_gpio_pin_out_read(uint32_t pin) +{ + return (NRF_GPIO->OUTSET & (1UL << (pin))); +} +#endif + +int gpio_read(gpio_t *obj) +{ + MBED_ASSERT(obj->pin != (PinName)NC); + if (m_gpio_cfg[obj->pin].direction == PIN_OUTPUT) { + return (nrf_gpio_pin_out_read(obj->pin) ? 1 : 0); + } else { + return nrf_gpio_pin_read(obj->pin); + } +} + +static void gpiote_pin_uninit(uint8_t pin) +{ + if (m_gpio_initialized & ((gpio_mask_t)1UL << pin)) { + if ((m_gpio_cfg[pin].direction == PIN_OUTPUT) && (!m_gpio_cfg[pin].used_as_irq)) { + nrf_drv_gpiote_out_uninit(pin); + } else if (m_gpio_cfg[pin].used_as_irq) { + nrf_drv_gpiote_in_uninit(pin); + } + } +} + +static void gpio_apply_config(uint8_t pin) +{ + if (m_gpio_cfg[pin].used_as_gpio || m_gpio_cfg[pin].used_as_irq) { + if ((m_gpio_cfg[pin].direction == PIN_INPUT) + || (m_gpio_cfg[pin].used_as_irq)) { + //Configure as input. + nrf_drv_gpiote_in_config_t cfg; + + cfg.hi_accuracy = false; + cfg.is_watcher = false; + cfg.sense = NRF_GPIOTE_POLARITY_TOGGLE; + switch (m_gpio_cfg[pin].pull) { + case PullUp: + cfg.pull = NRF_GPIO_PIN_PULLUP; + break; + case PullDown: + cfg.pull = NRF_GPIO_PIN_PULLDOWN; + break; + default: + cfg.pull = NRF_GPIO_PIN_NOPULL; + break; + } + if (m_gpio_cfg[pin].used_as_irq) { + nrf_drv_gpiote_in_init(pin, &cfg, gpiote_irq_handler); + if ((m_gpio_irq_enabled & ((gpio_mask_t)1 << pin)) + && (m_gpio_cfg[pin].irq_rise || m_gpio_cfg[pin].irq_fall)) { + nrf_drv_gpiote_in_event_enable(pin, true); + } + } else { + nrf_gpio_cfg_input(pin, cfg.pull); + } + } else { + // Configure as output. + nrf_drv_gpiote_out_config_t cfg = GPIOTE_CONFIG_OUT_SIMPLE(nrf_gpio_pin_out_read(pin)); + nrf_drv_gpiote_out_init(pin, &cfg); + } + m_gpio_initialized |= ((gpio_mask_t)1UL << pin); + } else { + m_gpio_initialized &= ~((gpio_mask_t)1UL << pin); + } +} + + +void gpio_mode(gpio_t *obj, PinMode mode) +{ + MBED_ASSERT(obj->pin != (PinName)NC); + + gpiote_pin_uninit(obj->pin); // try to uninitialize gpio before a change. + + m_gpio_cfg[obj->pin].pull = mode; + gpio_apply_config(obj->pin); +} + + +void gpio_dir(gpio_t *obj, PinDirection direction) +{ + MBED_ASSERT(obj->pin != (PinName)NC); + + gpiote_pin_uninit(obj->pin); // try to uninitialize gpio before a change. + + m_gpio_cfg[obj->pin].direction = direction; + gpio_apply_config(obj->pin); +} + + +/*********** + GPIO IRQ +***********/ + +int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) +{ + if (pin == NC) { + return -1; + } + MBED_ASSERT((uint32_t)pin < GPIO_PIN_COUNT); + (void) nrf_drv_gpiote_init(); + + gpiote_pin_uninit(pin); // try to uninitialize gpio before a change. + + m_gpio_cfg[pin].used_as_irq = true; + m_gpio_cfg[pin].pull = PullNone; + m_channel_ids[pin] = id; + obj->ch = pin; + m_irq_handler = handler; + m_channel_ids[pin] = id; + + gpio_apply_config(pin); + return 1; +} + + +void gpio_irq_free(gpio_irq_t *obj) +{ + nrf_drv_gpiote_in_uninit(obj->ch); + m_gpio_cfg[obj->ch].used_as_irq = false; + m_channel_ids[obj->ch] = 0; + + gpio_apply_config(obj->ch); +} + + +void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) +{ + gpio_cfg_t *cfg = &m_gpio_cfg[obj->ch]; + bool irq_enabled_before = + (m_gpio_irq_enabled & ((gpio_mask_t)1 << obj->ch)) && + (cfg->irq_rise || cfg->irq_fall); + + if (event == IRQ_RISE) { + cfg->irq_rise = enable ? true : false; + } else if (event == IRQ_FALL) { + cfg->irq_fall = enable ? true : false; + } + + bool irq_enabled_after = cfg->irq_rise || cfg->irq_fall; + + if (irq_enabled_before != irq_enabled_after) { + if (irq_enabled_after) { + gpio_irq_enable(obj); + } else { + gpio_irq_disable(obj); + } + } +} + + +void gpio_irq_enable(gpio_irq_t *obj) +{ + m_gpio_irq_enabled |= ((gpio_mask_t)1 << obj->ch); + if (m_gpio_cfg[obj->ch].irq_rise || m_gpio_cfg[obj->ch].irq_fall) { + nrf_drv_gpiote_in_event_enable(obj->ch, true); + } +} + + +void gpio_irq_disable(gpio_irq_t *obj) +{ + m_gpio_irq_enabled &= ~((gpio_mask_t)1 << obj->ch); + nrf_drv_gpiote_in_event_disable(obj->ch); +} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/us_ticker.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/us_ticker.c new file mode 100644 index 00000000000..7ab6b2f6109 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/us_ticker.c @@ -0,0 +1,146 @@ +/* + * Copyright (c) 2013 Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list + * of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA + * integrated circuit in a product or a software update for such product, must reproduce + * the above copyright notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be + * used to endorse or promote products derived from this software without specific prior + * written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary or object form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "us_ticker.h" + +#include "us_ticker_api.h" +#include "nrf_timer.h" +#include "app_util_platform.h" +#include "nrf_drv_common.h" +#include "mbed_critical.h" + +bool us_ticker_initialized = false; + +/* us ticker is driven by 1MHz clock and counter length is 16 bits. */ +const ticker_info_t* us_ticker_get_info() +{ + static const ticker_info_t info = { + US_TICKER_FREQ, + US_TICKER_COUNTER_BITS + }; + return &info; +} + +void us_ticker_init(void) +{ + if (us_ticker_initialized) { + nrf_timer_event_clear(NRF_TIMER1, NRF_TIMER_EVENT_COMPARE0); + nrf_timer_int_disable(NRF_TIMER1, nrf_timer_compare_int_get(NRF_TIMER_CC_CHANNEL0)); + return; + } + + nrf_timer_task_trigger(NRF_TIMER1, NRF_TIMER_TASK_STOP); + + nrf_timer_int_disable(NRF_TIMER1, nrf_timer_compare_int_get(NRF_TIMER_CC_CHANNEL0)); + + /* Configure timer as follows: + * - timer mode, + * - timer width 16 bits for NRF51 and 32 bits for NRF52, + * - timer freq 1 MHz. + */ + nrf_timer_mode_set(NRF_TIMER1, NRF_TIMER_MODE_TIMER); + + nrf_timer_frequency_set(NRF_TIMER1, NRF_TIMER_FREQ_1MHz); + +#ifdef TARGET_NRF52 + nrf_timer_bit_width_set(NRF_TIMER1, NRF_TIMER_BIT_WIDTH_32); +#else + nrf_timer_bit_width_set(NRF_TIMER1, NRF_TIMER_BIT_WIDTH_16); +#endif + + nrf_timer_cc_write(NRF_TIMER1, NRF_TIMER_CC_CHANNEL0, 0); + + nrf_timer_event_clear(NRF_TIMER1, NRF_TIMER_EVENT_COMPARE0); + + NVIC_SetVector(TIMER1_IRQn, (uint32_t)us_ticker_irq_handler); + + nrf_drv_common_irq_enable(TIMER1_IRQn, APP_IRQ_PRIORITY_HIGH); + + nrf_timer_task_trigger(NRF_TIMER1, NRF_TIMER_TASK_START); + + /* Bug fix. First value can't be trusted. */ + nrf_timer_task_trigger(NRF_TIMER1, NRF_TIMER_TASK_CAPTURE1); + + us_ticker_initialized = true; +} + +uint32_t us_ticker_read() +{ + nrf_timer_task_trigger(NRF_TIMER1, NRF_TIMER_TASK_CAPTURE1); + + return nrf_timer_cc_read(NRF_TIMER1, NRF_TIMER_CC_CHANNEL1); +} + +void us_ticker_set_interrupt(timestamp_t timestamp) +{ + core_util_critical_section_enter(); + + const uint32_t counter_mask = ((1ULL << US_TICKER_COUNTER_BITS) - 1); + + nrf_timer_cc_write(NRF_TIMER1, NRF_TIMER_CC_CHANNEL0, timestamp & counter_mask); + + if (!nrf_timer_int_enable_check(NRF_TIMER1, nrf_timer_compare_int_get(NRF_TIMER_CC_CHANNEL0))) { + nrf_timer_event_clear(NRF_TIMER1, NRF_TIMER_EVENT_COMPARE0); + nrf_timer_int_enable(NRF_TIMER1, nrf_timer_compare_int_get(NRF_TIMER_CC_CHANNEL0)); + } + + core_util_critical_section_exit(); +} + +void us_ticker_fire_interrupt(void) +{ + NVIC_SetPendingIRQ(TIMER1_IRQn); +} + +void us_ticker_disable_interrupt(void) +{ + nrf_timer_int_disable(NRF_TIMER1, nrf_timer_compare_int_get(NRF_TIMER_CC_CHANNEL0)); +} + +void us_ticker_clear_interrupt(void) +{ + nrf_timer_event_clear(NRF_TIMER1, NRF_TIMER_EVENT_COMPARE0); +} + +void us_ticker_free(void) +{ + nrf_timer_task_trigger(NRF_TIMER1, NRF_TIMER_TASK_STOP); + nrf_timer_int_disable(NRF_TIMER1, nrf_timer_compare_int_get(NRF_TIMER_CC_CHANNEL0)); + NVIC_DisableIRQ(TIMER1_IRQn); + us_ticker_initialized = false; +} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/common_rtc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/common_rtc.c similarity index 100% rename from targets/TARGET_NORDIC/TARGET_NRF5x/common_rtc.c rename to targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/common_rtc.c diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/common_rtc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/common_rtc.h new file mode 100644 index 00000000000..dae27b263c4 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/common_rtc.h @@ -0,0 +1,53 @@ +/* mbed Microcontroller Library + * Copyright (c) 2015 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef COMMON_RTC_H +#define COMMON_RTC_H + +#include "nrf_rtc.h" + +#define RTC_COUNTER_BITS 24u +#define RTC_FREQ 32768u + +// Instance 0 is reserved for SoftDevice. +// Instance 1 is used as a common one for lp_ticker and (in case +// of NRF51) as an alternative tick source for RTOS. +#define COMMON_RTC_INSTANCE NRF_RTC1 +#define COMMON_RTC_IRQ_HANDLER RTC1_IRQHandler +#define OS_TICK_CC_CHANNEL 0 +#define LP_TICKER_CC_CHANNEL 1 + +#define COMMON_RTC_EVENT_COMPARE(channel) \ + CONCAT_2(NRF_RTC_EVENT_COMPARE_, channel) +#define COMMON_RTC_INT_COMPARE_MASK(channel) \ + CONCAT_3(NRF_RTC_INT_COMPARE, channel, _MASK) + +#define OS_TICK_EVENT COMMON_RTC_EVENT_COMPARE(OS_TICK_CC_CHANNEL) +#define OS_TICK_INT_MASK COMMON_RTC_INT_COMPARE_MASK(OS_TICK_CC_CHANNEL) +#define LP_TICKER_EVENT COMMON_RTC_EVENT_COMPARE(LP_TICKER_CC_CHANNEL) +#define LP_TICKER_INT_MASK COMMON_RTC_INT_COMPARE_MASK(LP_TICKER_CC_CHANNEL) + +extern bool m_common_rtc_enabled; +extern uint32_t volatile m_common_rtc_overflows; +extern bool volatile lp_ticker_interrupt_fire; + +void common_rtc_init(void); +uint32_t common_rtc_32bit_ticks_get(void); +uint64_t common_rtc_64bit_us_get(void); +void common_rtc_set_interrupt(uint32_t us_timestamp, uint32_t cc_channel, + uint32_t int_mask); + +#endif // COMMON_RTC_H diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/gpio_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/gpio_api.c similarity index 100% rename from targets/TARGET_NORDIC/TARGET_NRF5x/gpio_api.c rename to targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/gpio_api.c diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/us_ticker.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/us_ticker.c similarity index 100% rename from targets/TARGET_NORDIC/TARGET_NRF5x/us_ticker.c rename to targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/us_ticker.c From 31be9c3cd2a24ba1be7ddde906755231c4d7ec09 Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Mon, 22 Oct 2018 14:15:14 -0500 Subject: [PATCH 451/488] Remove dead #define PORT_SHIFT nRF5x PinNames.h never utilized PORT_SHIFT so removed for clarity after user commented on it. --- .../TARGET_DELTA_DFCM_NNN50/PinNames.h | 2 -- .../TARGET_MTB_LAIRD_BL600/PinNames.h | 2 -- .../TARGET_MCU_NRF51822_UNIFIED/TARGET_NRF51_DK/PinNames.h | 4 +--- .../TARGET_NRF51_DONGLE/PinNames.h | 2 -- .../TARGET_MCU_NRF51822_UNIFIED/TARGET_OSHCHIP/PinNames.h | 2 -- .../TARGET_MCU_NRF51822_UNIFIED/TARGET_SDT51822B/PinNames.h | 1 - .../TARGET_MCU_NRF51822_UNIFIED/TARGET_TY51822R3/PinNames.h | 2 -- .../TARGET_MCU_NRF51822_UNIFIED/TARGET_VBLUNO51/PinNames.h | 2 -- .../TARGET_MCU_NRF52832/TARGET_DELTA_DFBM_NQ620/PinNames.h | 2 -- .../TARGET_MCU_NRF52832/TARGET_MTB_LAIRD_BL652/PinNames.h | 2 -- .../TARGET_MCU_NRF52832/TARGET_MTB_UBLOX_NINA_B1/PinNames.h | 2 -- .../TARGET_MCU_NRF52832/TARGET_NRF52_DK/PinNames.h | 2 -- .../TARGET_MCU_NRF52832/TARGET_RBLAB_BLENANO2/PinNames.h | 2 -- .../TARGET_MCU_NRF52832/TARGET_SDT52832B/PinNames.h | 1 - .../TARGET_MCU_NRF52832/TARGET_UBLOX_EVA_NINA/PinNames.h | 2 -- .../TARGET_MCU_NRF52832/TARGET_UBLOX_EVK_NINA_B1/PinNames.h | 2 -- .../TARGET_MCU_NRF52832/TARGET_VBLUNO52/PinNames.h | 2 -- .../TARGET_MCU_NRF52840/TARGET_NRF52840_DK/PinNames.h | 2 -- 18 files changed, 1 insertion(+), 35 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_DELTA_DFCM_NNN50/PinNames.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_DELTA_DFCM_NNN50/PinNames.h index 443256790bf..50392287591 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_DELTA_DFCM_NNN50/PinNames.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_DELTA_DFCM_NNN50/PinNames.h @@ -27,8 +27,6 @@ typedef enum { PIN_OUTPUT } PinDirection; -#define PORT_SHIFT 3 - typedef enum { p0 = 0, p1 = 1, diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_MTB_LAIRD_BL600/PinNames.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_MTB_LAIRD_BL600/PinNames.h index 84e8afa6bd3..9faa5133716 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_MTB_LAIRD_BL600/PinNames.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_MTB_LAIRD_BL600/PinNames.h @@ -27,8 +27,6 @@ typedef enum { PIN_OUTPUT } PinDirection; -#define PORT_SHIFT 3 - typedef enum { p0 = 0, p1 = 1, diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_NRF51_DK/PinNames.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_NRF51_DK/PinNames.h index a7cfe580abc..aca5d880f59 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_NRF51_DK/PinNames.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_NRF51_DK/PinNames.h @@ -1,4 +1,4 @@ -/* +/* * Copyright (c) 2013 Nordic Semiconductor ASA * All rights reserved. * @@ -50,8 +50,6 @@ typedef enum { PIN_OUTPUT } PinDirection; -#define PORT_SHIFT 3 - typedef enum { p0 = 0, p1 = 1, diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_NRF51_DONGLE/PinNames.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_NRF51_DONGLE/PinNames.h index b8187eba8c7..a4e71d75f0c 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_NRF51_DONGLE/PinNames.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_NRF51_DONGLE/PinNames.h @@ -27,8 +27,6 @@ typedef enum { PIN_OUTPUT } PinDirection; -#define PORT_SHIFT 3 - typedef enum { p0 = 0, p1 = 1, diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_OSHCHIP/PinNames.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_OSHCHIP/PinNames.h index 05a451e04ec..7d67c76c52f 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_OSHCHIP/PinNames.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_OSHCHIP/PinNames.h @@ -50,8 +50,6 @@ typedef enum { PIN_OUTPUT } PinDirection; -#define PORT_SHIFT 3 - typedef enum { p0 = 0, p1 = 1, diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_SDT51822B/PinNames.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_SDT51822B/PinNames.h index 46005eaf526..1b8c3140dc2 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_SDT51822B/PinNames.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_SDT51822B/PinNames.h @@ -51,7 +51,6 @@ typedef enum { } PinDirection; #define NOT_CONNECTED (int)0xFFFFFFFF -#define PORT_SHIFT 3 typedef enum { p0 = 0, diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_TY51822R3/PinNames.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_TY51822R3/PinNames.h index 76e1958aeeb..0a0e547938b 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_TY51822R3/PinNames.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_TY51822R3/PinNames.h @@ -27,8 +27,6 @@ typedef enum { PIN_OUTPUT } PinDirection; -#define PORT_SHIFT 3 - typedef enum { p0 = 0, p1 = 1, diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_VBLUNO51/PinNames.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_VBLUNO51/PinNames.h index f9d96300805..92f2a8a9ffb 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_VBLUNO51/PinNames.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_VBLUNO51/PinNames.h @@ -31,8 +31,6 @@ typedef enum { PIN_OUTPUT } PinDirection; -#define PORT_SHIFT 3 - typedef enum { p0 = 0, p1 = 1, diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_DELTA_DFBM_NQ620/PinNames.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_DELTA_DFBM_NQ620/PinNames.h index 807e2d532f9..510ebfbbd92 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_DELTA_DFBM_NQ620/PinNames.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_DELTA_DFBM_NQ620/PinNames.h @@ -50,8 +50,6 @@ typedef enum { PIN_OUTPUT } PinDirection; -#define PORT_SHIFT 3 - typedef enum { p0 = 0, p1 = 1, diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_MTB_LAIRD_BL652/PinNames.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_MTB_LAIRD_BL652/PinNames.h index 8ce74b23564..42495b6928e 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_MTB_LAIRD_BL652/PinNames.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_MTB_LAIRD_BL652/PinNames.h @@ -27,8 +27,6 @@ typedef enum { PIN_OUTPUT } PinDirection; -#define PORT_SHIFT 3 - typedef enum { p0 = 0, p1 = 1, diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_MTB_UBLOX_NINA_B1/PinNames.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_MTB_UBLOX_NINA_B1/PinNames.h index eeaba6ee7c0..ee77cb57c54 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_MTB_UBLOX_NINA_B1/PinNames.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_MTB_UBLOX_NINA_B1/PinNames.h @@ -28,8 +28,6 @@ typedef enum { PIN_OUTPUT } PinDirection; -#define PORT_SHIFT 3 - typedef enum { // nRF52 pin names p0 = 0, diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_NRF52_DK/PinNames.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_NRF52_DK/PinNames.h index 72ec717547c..0cd18ba7b9c 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_NRF52_DK/PinNames.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_NRF52_DK/PinNames.h @@ -50,8 +50,6 @@ typedef enum { PIN_OUTPUT } PinDirection; -#define PORT_SHIFT 3 - typedef enum { p0 = 0, p1 = 1, diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_RBLAB_BLENANO2/PinNames.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_RBLAB_BLENANO2/PinNames.h index 16bdafaabcd..7efa2311c47 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_RBLAB_BLENANO2/PinNames.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_RBLAB_BLENANO2/PinNames.h @@ -50,8 +50,6 @@ typedef enum { PIN_OUTPUT } PinDirection; -#define PORT_SHIFT 3 - typedef enum { p0 = 0, p1 = 1, diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_SDT52832B/PinNames.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_SDT52832B/PinNames.h index 3d0c4461c9b..b6d1d3e20c8 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_SDT52832B/PinNames.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_SDT52832B/PinNames.h @@ -51,7 +51,6 @@ typedef enum { } PinDirection; #define NOT_CONNECTED (int)0xFFFFFFFF -#define PORT_SHIFT 3 typedef enum { p0 = 0, diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_UBLOX_EVA_NINA/PinNames.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_UBLOX_EVA_NINA/PinNames.h index 26cf4384c7b..2674aa51d68 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_UBLOX_EVA_NINA/PinNames.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_UBLOX_EVA_NINA/PinNames.h @@ -12,8 +12,6 @@ typedef enum { PIN_OUTPUT } PinDirection; -#define PORT_SHIFT 3 - typedef enum { // nRF52 pin names p0 = 0, diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_UBLOX_EVK_NINA_B1/PinNames.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_UBLOX_EVK_NINA_B1/PinNames.h index 8d83928e459..5291a343d58 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_UBLOX_EVK_NINA_B1/PinNames.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_UBLOX_EVK_NINA_B1/PinNames.h @@ -12,8 +12,6 @@ typedef enum { PIN_OUTPUT } PinDirection; -#define PORT_SHIFT 3 - typedef enum { // nRF52 pin names p0 = 0, diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_VBLUNO52/PinNames.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_VBLUNO52/PinNames.h index bd6fae90bfe..55817dfa49d 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_VBLUNO52/PinNames.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_VBLUNO52/PinNames.h @@ -53,8 +53,6 @@ typedef enum { PIN_OUTPUT } PinDirection; -#define PORT_SHIFT 3 - typedef enum { p0 = 0, p1 = 1, diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/TARGET_NRF52840_DK/PinNames.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/TARGET_NRF52840_DK/PinNames.h index 5730e040c15..94eed0112b1 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/TARGET_NRF52840_DK/PinNames.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/TARGET_NRF52840_DK/PinNames.h @@ -51,8 +51,6 @@ typedef enum { PIN_OUTPUT } PinDirection; -#define PORT_SHIFT 3 - ///> define macro producing for example Px_y = NRF_GPIO_PIN_MAP(x, y) #define PinDef(port_num, pin_num) P##port_num##_##pin_num = NRF_GPIO_PIN_MAP(port_num, pin_num) From 30308eb4140c277f3974155ad02c9f31213719d6 Mon Sep 17 00:00:00 2001 From: Ralph F Date: Mon, 29 Oct 2018 08:08:35 -0500 Subject: [PATCH 452/488] Add missing SoftDevice build support (MBR, NONE, OTA) - Add MBR, NONE and OTA SoftDevice build options for S132 and S140 - Add S112 SoftDevice (single build option) - Some folder restructuring in TARGET_SOFTDEVICE_COMMON was required --- .../TARGET_SOFTDEVICE_COMMON/README.md | 20 + .../libraries/fstorage/nrf_fstorage_sd.c | 0 .../libraries/fstorage/nrf_fstorage_sd.h | 0 .../libraries/fstorage/nrf_fstorage_nvmc.c | 215 + .../libraries/fstorage/nrf_fstorage_nvmc.h | 75 + .../nrf_soc_nosd/nrf_error.h | 87 + .../nrf_soc_nosd/nrf_nvic.c | 123 + .../nrf_soc_nosd/nrf_nvic.h | 166 + .../nrf_soc_nosd/nrf_soc.c | 48 + .../nrf_soc_nosd/nrf_soc.h | 80 + .../s112_nrf52_6.0.0_licence-agreement.txt | 35 + .../s112_nrf52_6.0.0_migration-document.pdf | Bin 0 -> 18085 bytes .../doc/s112_nrf52_6.0.0_release-notes.pdf | Bin 0 -> 21906 bytes .../TARGET_SOFTDEVICE_S112/headers/ble.h | 617 ++ .../TARGET_SOFTDEVICE_S112/headers/ble_err.h | 93 + .../TARGET_SOFTDEVICE_S112/headers/ble_gap.h | 2023 ++++ .../TARGET_SOFTDEVICE_S112/headers/ble_gatt.h | 228 + .../headers/ble_gattc.h | 715 ++ .../headers/ble_gatts.h | 845 ++ .../TARGET_SOFTDEVICE_S112/headers/ble_hci.h | 135 + .../headers/ble_ranges.h | 148 + .../headers/ble_types.h | 215 + .../headers/nrf52/nrf_mbr.h | 241 + .../headers/nrf_error.h | 90 + .../headers/nrf_error_sdm.h | 70 + .../headers/nrf_error_soc.h | 85 + .../TARGET_SOFTDEVICE_S112/headers/nrf_nvic.h | 486 + .../headers/nrf_sd_def.h | 59 + .../TARGET_SOFTDEVICE_S112/headers/nrf_sdm.h | 358 + .../TARGET_SOFTDEVICE_S112/headers/nrf_soc.h | 964 ++ .../TARGET_SOFTDEVICE_S112/headers/nrf_svc.h | 90 + .../s112_nrf52_6.0.0_licence-agreement.txt | 35 + .../hex/s112_nrf52_6.0.0_softdevice.hex | 6143 +++++++++++ .../headers/nrf_mbr.h | 241 + .../headers/nrf_svc.h | 90 + .../hex/mbr_nrf52_2.2.2_licence-agreement.txt | 35 + .../hex/mbr_nrf52_2.2.2_mbr.hex | 154 + .../libraries/fstorage/nrf_fstorage_nvmc.c | 0 .../libraries/fstorage/nrf_fstorage_nvmc.h | 0 .../TARGET_SOFTDEVICE_S132_MBR/mbed_lib.json | 8 + .../nrf_soc_nosd/nrf_error.h | 95 + .../nrf_soc_nosd/nrf_nvic.c | 123 + .../nrf_soc_nosd/nrf_nvic.h | 166 + .../nrf_soc_nosd/nrf_sdm.h | 56 + .../nrf_soc_nosd/nrf_soc.c | 48 + .../nrf_soc_nosd/nrf_soc.h | 80 + .../s132_nrf52_6.0.0_licence-agreement.txt | 35 + .../s132_nrf52_6.0.0_migration-document.pdf | Bin 0 -> 133032 bytes .../doc/s132_nrf52_6.0.0_release-notes.pdf | Bin 0 -> 50680 bytes .../headers/ble_err.h | 93 + .../headers/ble_gap.h | 2653 +++++ .../headers/ble_gatt.h | 228 + .../headers/ble_gattc.h | 715 ++ .../headers/ble_gatts.h | 845 ++ .../headers/ble_hci.h | 135 + .../headers/ble_l2cap.h | 506 + .../headers/ble_ranges.h | 156 + .../headers/ble_types.h | 215 + .../headers/nrf52/nrf_mbr.h | 241 + .../headers/nrf_ble.h | 622 ++ .../headers/nrf_error.h | 90 + .../headers/nrf_error_sdm.h | 70 + .../headers/nrf_error_soc.h | 85 + .../headers/nrf_nvic.h | 486 + .../headers/nrf_sd_def.h | 59 + .../headers/nrf_sdm.h | 358 + .../headers/nrf_soc.h | 964 ++ .../headers/nrf_svc.h | 90 + .../s132_nrf52_6.0.0_licence-agreement.txt | 35 + .../hex/s132_nrf52_6.0.0_softdevice.hex | 9127 ++++++++++++++++ .../TARGET_SOFTDEVICE_S132_OTA/mbed_lib.json | 39 + .../headers/nrf_mbr.h | 242 + .../headers/nrf_svc.h | 90 + .../hex/mbr_nrf52_2.3.0_licence-agreement.txt | 35 + .../hex/mbr_nrf52_2.3.0_mbr.hex | 165 + .../libraries/fstorage/nrf_fstorage_nvmc.c | 217 + .../libraries/fstorage/nrf_fstorage_nvmc.h | 75 + .../TARGET_SOFTDEVICE_S140_MBR/mbed_lib.json | 8 + .../nrf_soc_nosd/nrf_error.h | 95 + .../nrf_soc_nosd/nrf_nvic.c | 123 + .../nrf_soc_nosd/nrf_nvic.h | 166 + .../nrf_soc_nosd/nrf_sdm.h | 56 + .../nrf_soc_nosd/nrf_soc.c | 48 + .../nrf_soc_nosd/nrf_soc.h | 80 + .../s140_nrf52_6.0.0_licence-agreement.txt | 35 + .../s140_nrf52_6.0.0_migration-document.pdf | Bin 0 -> 71009 bytes .../doc/s140_nrf52_6.0.0_release-notes.pdf | Bin 0 -> 64894 bytes .../headers/ble_err.h | 93 + .../headers/ble_gap.h | 2669 +++++ .../headers/ble_gatt.h | 228 + .../headers/ble_gattc.h | 715 ++ .../headers/ble_gatts.h | 845 ++ .../headers/ble_hci.h | 135 + .../headers/ble_l2cap.h | 506 + .../headers/ble_ranges.h | 156 + .../headers/ble_types.h | 215 + .../headers/nrf52/nrf_mbr.h | 242 + .../headers/nrf_ble.h | 622 ++ .../headers/nrf_error.h | 90 + .../headers/nrf_error_sdm.h | 70 + .../headers/nrf_error_soc.h | 85 + .../headers/nrf_nvic.h | 486 + .../headers/nrf_sd_def.h | 59 + .../headers/nrf_sdm.h | 358 + .../headers/nrf_soc.h | 1036 ++ .../headers/nrf_svc.h | 90 + .../s140_nrf52_6.0.0_licence-agreement.txt | 35 + .../hex/s140_nrf52_6.0.0_softdevice.hex | 9281 +++++++++++++++++ .../TARGET_SOFTDEVICE_S140_OTA/mbed_lib.json | 35 + .../components/libraries/README.md | 52 + .../softdevice/common/nrf_sdh.c | 0 .../softdevice/common/nrf_sdh.h | 0 .../softdevice/common/nrf_sdh_ant.c | 0 .../softdevice/common/nrf_sdh_ant.h | 0 .../softdevice/common/nrf_sdh_ble.c | 0 .../softdevice/common/nrf_sdh_ble.h | 0 .../softdevice/common/nrf_sdh_soc.c | 0 .../softdevice/common/nrf_sdh_soc.h | 0 118 files changed, 52970 insertions(+) create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/README.md rename targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/{components => TARGET_SOFTDEVICE_COMMON}/libraries/fstorage/nrf_fstorage_sd.c (100%) rename targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/{components => TARGET_SOFTDEVICE_COMMON}/libraries/fstorage/nrf_fstorage_sd.h (100%) create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/libraries/fstorage/nrf_fstorage_nvmc.c create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/libraries/fstorage/nrf_fstorage_nvmc.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_error.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_nvic.c create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_nvic.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_soc.c create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_soc.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/doc/s112_nrf52_6.0.0_licence-agreement.txt create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/doc/s112_nrf52_6.0.0_migration-document.pdf create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/doc/s112_nrf52_6.0.0_release-notes.pdf create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_err.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_gap.h create mode 100644 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targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_sdm.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_soc.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_svc.h create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/hex/s140_nrf52_6.0.0_licence-agreement.txt create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/hex/s140_nrf52_6.0.0_softdevice.hex create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/mbed_lib.json create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/README.md rename targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/{TARGET_SOFTDEVICE_COMMON => modules}/softdevice/common/nrf_sdh.c (100%) rename targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/{TARGET_SOFTDEVICE_COMMON => modules}/softdevice/common/nrf_sdh.h (100%) rename targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/{TARGET_SOFTDEVICE_COMMON => modules}/softdevice/common/nrf_sdh_ant.c (100%) rename targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/{TARGET_SOFTDEVICE_COMMON => modules}/softdevice/common/nrf_sdh_ant.h (100%) rename targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/{TARGET_SOFTDEVICE_COMMON => modules}/softdevice/common/nrf_sdh_ble.c (100%) rename targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/{TARGET_SOFTDEVICE_COMMON => modules}/softdevice/common/nrf_sdh_ble.h (100%) rename targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/{TARGET_SOFTDEVICE_COMMON => modules}/softdevice/common/nrf_sdh_soc.c (100%) rename targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/{TARGET_SOFTDEVICE_COMMON => modules}/softdevice/common/nrf_sdh_soc.h (100%) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/README.md b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/README.md new file mode 100644 index 00000000000..7abc1642e64 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/README.md @@ -0,0 +1,20 @@ +# Folder origin + +components/softdevice + +# Modifications + +Removed: + * common/nrf_sdh_freertos.c + * common/nrf_sdh_freertos.h + * s212/* + +Moved: + * mbr/nrf52832/ to ../TARGET_SOFTDEVICE_S132_MBR + * mbr/nrf52840/ to ../TARGET_SOFTDEVICE_S140_MBR + * s112/ to ../TARGET_SOFTDEVICE_S112 + * s132/ to ../TARGET_SOFTDEVICE_S132 + * s140/ to ../TARGET_SOFTDEVICE_S140 + +Renamed: + * ble.h to nrf_ble.h diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage_sd.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/libraries/fstorage/nrf_fstorage_sd.c similarity index 100% rename from targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage_sd.c rename to targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/libraries/fstorage/nrf_fstorage_sd.c diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage_sd.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/libraries/fstorage/nrf_fstorage_sd.h similarity index 100% rename from targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage_sd.h rename to targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/libraries/fstorage/nrf_fstorage_sd.h diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/libraries/fstorage/nrf_fstorage_nvmc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/libraries/fstorage/nrf_fstorage_nvmc.c new file mode 100644 index 00000000000..b7c1ac01f6e --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/libraries/fstorage/nrf_fstorage_nvmc.c @@ -0,0 +1,215 @@ +/** + * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "sdk_common.h" + +#if NRF_MODULE_ENABLED(NRF_FSTORAGE) + +#include "nrf_fstorage_nvmc.h" +#include +#include +#include +#include "nrf_nvmc.h" +#include "nrf_atomic.h" + + +static nrf_fstorage_info_t m_flash_info = +{ +#if defined(NRF51) + .erase_unit = 1024, +#elif defined(NRF52_SERIES) + .erase_unit = 4096, +#endif + .program_unit = 4, + .rmap = true, + .wmap = false, +}; + + + /* An operation initiated by fstorage is ongoing. */ +static nrf_atomic_flag_t m_flash_operation_ongoing; + + +/* Send event to the event handler. */ +static void event_send(nrf_fstorage_t const * p_fs, + nrf_fstorage_evt_id_t evt_id, + uint32_t addr, + uint32_t len, + void * p_param) +{ + if (p_fs->evt_handler == NULL) + { + /* Nothing to do. */ + return; + } + + nrf_fstorage_evt_t evt = + { + .result = NRF_SUCCESS, + .id = evt_id, + .addr = addr, + .len = len, + .p_param = p_param, + }; + + p_fs->evt_handler(&evt); +} + + +static ret_code_t init(nrf_fstorage_t * p_fs, void * p_param) +{ + UNUSED_PARAMETER(p_param); + + p_fs->p_flash_info = &m_flash_info; + + return NRF_SUCCESS; +} + + +static ret_code_t uninit(nrf_fstorage_t * p_fs, void * p_param) +{ + UNUSED_PARAMETER(p_fs); + UNUSED_PARAMETER(p_param); + + (void) nrf_atomic_flag_clear(&m_flash_operation_ongoing); + + return NRF_SUCCESS; +} + + +static ret_code_t read(nrf_fstorage_t const * p_fs, uint32_t src, void * p_dest, uint32_t len) +{ + UNUSED_PARAMETER(p_fs); + + memcpy(p_dest, (uint32_t*)src, len); + + return NRF_SUCCESS; +} + + +static ret_code_t write(nrf_fstorage_t const * p_fs, + uint32_t dest, + void const * p_src, + uint32_t len, + void * p_param) +{ + if (nrf_atomic_flag_set_fetch(&m_flash_operation_ongoing)) + { + return NRF_ERROR_BUSY; + } + + nrf_nvmc_write_words(dest, (uint32_t*)p_src, (len / m_flash_info.program_unit)); + + /* Clear the flag before sending the event, to allow API calls in the event context. */ + (void) nrf_atomic_flag_clear(&m_flash_operation_ongoing); + + event_send(p_fs, NRF_FSTORAGE_EVT_WRITE_RESULT, dest, len, p_param); + + return NRF_SUCCESS; +} + + +static ret_code_t erase(nrf_fstorage_t const * p_fs, + uint32_t page_addr, + uint32_t len, + void * p_param) +{ + uint32_t progress = 0; + + if (nrf_atomic_flag_set_fetch(&m_flash_operation_ongoing)) + { + return NRF_ERROR_BUSY; + } + + while (progress != len) + { + nrf_nvmc_page_erase(page_addr + (progress * m_flash_info.erase_unit)); + progress++; + } + + /* Clear the flag before sending the event, to allow API calls in the event context. */ + (void) nrf_atomic_flag_clear(&m_flash_operation_ongoing); + + event_send(p_fs, NRF_FSTORAGE_EVT_ERASE_RESULT, page_addr, len, p_param); + + return NRF_SUCCESS; +} + + +static uint8_t const * rmap(nrf_fstorage_t const * p_fs, uint32_t addr) +{ + UNUSED_PARAMETER(p_fs); + + return (uint8_t*)addr; +} + + +static uint8_t * wmap(nrf_fstorage_t const * p_fs, uint32_t addr) +{ + UNUSED_PARAMETER(p_fs); + UNUSED_PARAMETER(addr); + + /* Not supported. */ + return NULL; +} + + +static bool is_busy(nrf_fstorage_t const * p_fs) +{ + UNUSED_PARAMETER(p_fs); + + return m_flash_operation_ongoing; +} + + +/* The exported API. */ +nrf_fstorage_api_t nrf_fstorage_nvmc = +{ + .init = init, + .uninit = uninit, + .read = read, + .write = write, + .erase = erase, + .rmap = rmap, + .wmap = wmap, + .is_busy = is_busy +}; + + +#endif // NRF_FSTORAGE_ENABLED diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/libraries/fstorage/nrf_fstorage_nvmc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/libraries/fstorage/nrf_fstorage_nvmc.h new file mode 100644 index 00000000000..be3477556cc --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/libraries/fstorage/nrf_fstorage_nvmc.h @@ -0,0 +1,75 @@ +/** + * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/** + * @file + * + * @defgroup nrf_fstorage_nvmc NVMC implementation + * @ingroup nrf_fstorage + * @{ + * + * @brief API implementation of fstorage that uses the non-volatile memory controller (NVMC). +*/ + +#ifndef NRF_FSTORAGE_NVMC_H__ +#define NRF_FSTORAGE_NVMC_H__ + +#include "nrf_fstorage.h" + +#ifdef __cplusplus +extern "C" { +#endif + + +/**@brief API implementation that uses the non-volatile memory controller. + * + * @details An fstorage instance with this API implementation can be initialized by providing + * this structure as a parameter to @ref nrf_fstorage_init. + * The structure is defined in @c nrf_fstorage_nvmc.c. + */ +extern nrf_fstorage_api_t nrf_fstorage_nvmc; + + +#ifdef __cplusplus +} +#endif + +#endif // NRF_FSTORAGE_NVMC_H__ +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_error.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_error.h new file mode 100644 index 00000000000..6ae2c9b52ac --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_error.h @@ -0,0 +1,87 @@ +/** + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/* Header guard */ +#ifndef NRF_ERROR_H__ +#define NRF_ERROR_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/// @cond Make doxygen skip this file + +/** @defgroup NRF_ERRORS_BASE Error Codes Base number definitions + * @{ */ +#define NRF_ERROR_BASE_NUM (0x0) ///< Global error base +#define NRF_ERROR_SDM_BASE_NUM (0x1000) ///< SDM error base +#define NRF_ERROR_SOC_BASE_NUM (0x2000) ///< SoC error base +#define NRF_ERROR_STK_BASE_NUM (0x3000) ///< STK error base +/** @} */ + +#define NRF_SUCCESS (NRF_ERROR_BASE_NUM + 0) ///< Successful command +#define NRF_ERROR_SVC_HANDLER_MISSING (NRF_ERROR_BASE_NUM + 1) ///< SVC handler is missing +#define NRF_ERROR_SOFTDEVICE_NOT_ENABLED (NRF_ERROR_BASE_NUM + 2) ///< SoftDevice has not been enabled +#define NRF_ERROR_INTERNAL (NRF_ERROR_BASE_NUM + 3) ///< Internal Error +#define NRF_ERROR_NO_MEM (NRF_ERROR_BASE_NUM + 4) ///< No Memory for operation +#define NRF_ERROR_NOT_FOUND (NRF_ERROR_BASE_NUM + 5) ///< Not found +#define NRF_ERROR_NOT_SUPPORTED (NRF_ERROR_BASE_NUM + 6) ///< Not supported +#define NRF_ERROR_INVALID_PARAM (NRF_ERROR_BASE_NUM + 7) ///< Invalid Parameter +#define NRF_ERROR_INVALID_STATE (NRF_ERROR_BASE_NUM + 8) ///< Invalid state, operation disallowed in this state +#define NRF_ERROR_INVALID_LENGTH (NRF_ERROR_BASE_NUM + 9) ///< Invalid Length +#define NRF_ERROR_INVALID_FLAGS (NRF_ERROR_BASE_NUM + 10) ///< Invalid Flags +#define NRF_ERROR_INVALID_DATA (NRF_ERROR_BASE_NUM + 11) ///< Invalid Data +#define NRF_ERROR_DATA_SIZE (NRF_ERROR_BASE_NUM + 12) ///< Data size exceeds limit +#define NRF_ERROR_TIMEOUT (NRF_ERROR_BASE_NUM + 13) ///< Operation timed out +#define NRF_ERROR_NULL (NRF_ERROR_BASE_NUM + 14) ///< Null Pointer +#define NRF_ERROR_FORBIDDEN (NRF_ERROR_BASE_NUM + 15) ///< Forbidden Operation +#define NRF_ERROR_INVALID_ADDR (NRF_ERROR_BASE_NUM + 16) ///< Bad Memory Address +#define NRF_ERROR_BUSY (NRF_ERROR_BASE_NUM + 17) ///< Busy + + +#ifdef __cplusplus +} +#endif + +#endif // NRF_ERROR_H__ + +/// @endcond +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_nvic.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_nvic.c new file mode 100644 index 00000000000..45803bf61a8 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_nvic.c @@ -0,0 +1,123 @@ +/** + * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include +#include "nrf_soc.h" +#include "nrf_error.h" + +static uint8_t m_in_critical_region = 0; + +uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn) +{ + NVIC_EnableIRQ(IRQn); + return NRF_SUCCESS; +} + +uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn) +{ + NVIC_DisableIRQ(IRQn); + return NRF_SUCCESS; +} + +uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq) +{ + if (p_pending_irq != NULL) + { + *p_pending_irq = NVIC_GetPendingIRQ(IRQn); + return NRF_SUCCESS; + } + return NRF_ERROR_NULL; +} + +uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn) +{ + NVIC_SetPendingIRQ(IRQn); + return NRF_SUCCESS; +} + +uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn) +{ + NVIC_ClearPendingIRQ(IRQn); + return NRF_SUCCESS; +} + +uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + NVIC_SetPriority(IRQn, priority); + return NRF_SUCCESS; +} + +uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority) +{ + if (p_priority != NULL) + { + *p_priority = NVIC_GetPriority(IRQn); + return NRF_SUCCESS; + } + + return NRF_ERROR_NULL; +} + +uint32_t sd_nvic_SystemReset(void) +{ + NVIC_SystemReset(); + return NRF_SUCCESS; +} + +uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region) +{ + __disable_irq(); + + *p_is_nested_critical_region = (m_in_critical_region != 0); + m_in_critical_region++; + + return NRF_SUCCESS; +} + +uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region) +{ + m_in_critical_region--; + + if (is_nested_critical_region == 0) + { + m_in_critical_region = 0; + __enable_irq(); + } + return NRF_SUCCESS; +} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_nvic.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_nvic.h new file mode 100644 index 00000000000..3ab15d66d10 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_nvic.h @@ -0,0 +1,166 @@ +/** + * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_NVIC_H__ +#define NRF_NVIC_H__ + +#include +#include "nrf.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@brief Enable External Interrupt. + * @note Corresponds to NVIC_EnableIRQ in CMSIS. + * + * @pre{IRQn is valid and not reserved by the stack} + * + * @param[in] IRQn See the NVIC_EnableIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt was enabled. + */ +uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn); + +/**@brief Disable External Interrupt. + * @note Corresponds to NVIC_DisableIRQ in CMSIS. + * + * @pre{IRQn is valid and not reserved by the stack} + * + * @param[in] IRQn See the NVIC_DisableIRQ documentation in CMSIS + * + * @retval ::NRF_SUCCESS The interrupt was disabled. + */ +uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn); + +/**@brief Get Pending Interrupt. + * @note Corresponds to NVIC_GetPendingIRQ in CMSIS. + * + * @pre{IRQn is valid and not reserved by the stack} + * + * @param[in] IRQn See the NVIC_GetPendingIRQ documentation in CMSIS. + * @param[out] p_pending_irq Return value from NVIC_GetPendingIRQ. + * + * @retval ::NRF_SUCCESS The interrupt is available for the application. + */ +uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq); + +/**@brief Set Pending Interrupt. + * @note Corresponds to NVIC_SetPendingIRQ in CMSIS. + * + * @pre{IRQn is valid and not reserved by the stack} + * + * @param[in] IRQn See the NVIC_SetPendingIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt is set pending. + */ +uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn); + +/**@brief Clear Pending Interrupt. + * @note Corresponds to NVIC_ClearPendingIRQ in CMSIS. + * + * @pre{IRQn is valid and not reserved by the stack} + * + * @param[in] IRQn See the NVIC_ClearPendingIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt pending flag is cleared. + */ +uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn); + +/**@brief Set Interrupt Priority. + * @note Corresponds to NVIC_SetPriority in CMSIS. + * + * @pre{IRQn is valid and not reserved by the stack} + * @pre{priority is valid and not reserved by the stack} + * + * @param[in] IRQn See the NVIC_SetPriority documentation in CMSIS. + * @param[in] priority A valid IRQ priority for use by the application. + * + * @retval ::NRF_SUCCESS The interrupt and priority level is available for the application. + */ +uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority); + +/**@brief Get Interrupt Priority. + * @note Corresponds to NVIC_GetPriority in CMSIS. + * + * @pre{IRQn is valid and not reserved by the stack} + * + * @param[in] IRQn See the NVIC_GetPriority documentation in CMSIS. + * @param[out] p_priority Return value from NVIC_GetPriority. + * + * @retval ::NRF_SUCCESS The interrupt priority is returned in p_priority. + */ +uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority); + +/**@brief System Reset. + * @note Corresponds to NVIC_SystemReset in CMSIS. + * + * @retval ::NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN + */ +uint32_t sd_nvic_SystemReset(void); + +/**@brief Enters critical region. + * + * @post Application interrupts will be disabled. + * @sa sd_nvic_critical_region_exit + * + * @param[out] p_is_nested_critical_region 1: If in a nested critical region. + * 0: Otherwise. + * + * @retval ::NRF_SUCCESS + */ +uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region); + +/**@brief Exit critical region. + * + * @pre Application has entered a critical region using ::sd_nvic_critical_region_enter. + * @post If not in a nested critical region, the application interrupts will restored to the state before ::sd_nvic_critical_region_enter was called. + * + * @param[in] is_nested_critical_region If this is set to 1, the critical region won't be exited. @sa sd_nvic_critical_region_enter. + * + * @retval ::NRF_SUCCESS + */ +uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region); + + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_NVIC_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_soc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_soc.c new file mode 100644 index 00000000000..8b273d74bf5 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_soc.c @@ -0,0 +1,48 @@ +/** + * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include +#include "nrf_soc.h" +#include "nrf_error.h" + +uint32_t sd_app_evt_wait(void) +{ + __WFE(); + return NRF_SUCCESS; +} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_soc.h new file mode 100644 index 00000000000..3119ada366f --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_soc.h @@ -0,0 +1,80 @@ +/** + * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_SOC_H__ +#define NRF_SOC_H__ + +#include +#include "nrf.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@brief Waits for an application event. + * + * An application event is either an application interrupt or a pended interrupt when the + * interrupt is disabled. When the interrupt is enabled it will be taken immediately since + * this function will wait in thread mode, then the execution will return in the application's + * main thread. When an interrupt is disabled and gets pended it will return to the application's + * thread main. The application must ensure that the pended flag is cleared using + * ::sd_nvic_ClearPendingIRQ in order to sleep using this function. This is only necessary for + * disabled interrupts, as the interrupt handler will clear the pending flag automatically for + * enabled interrupts. + * + * In order to wake up from disabled interrupts, the SEVONPEND flag has to be set in the Cortex-M0 + * System Control Register (SCR). @sa CMSIS_SCB + * + * @note If an application interrupt has happened since the last time sd_app_evt_wait was + * called this function will return immediately and not go to sleep. This is to avoid race + * conditions that can occur when a flag is updated in the interrupt handler and processed + * in the main loop. + * + * @post An application interrupt has happened or a interrupt pending flag is set. + * + * @retval ::NRF_SUCCESS + */ +uint32_t sd_app_evt_wait(void); + + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_SOC_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/doc/s112_nrf52_6.0.0_licence-agreement.txt b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/doc/s112_nrf52_6.0.0_licence-agreement.txt new file mode 100644 index 00000000000..a71adee7b9b --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/doc/s112_nrf52_6.0.0_licence-agreement.txt @@ -0,0 +1,35 @@ +Copyright (c) 2007 - 2018, Nordic Semiconductor ASA +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/doc/s112_nrf52_6.0.0_migration-document.pdf b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/doc/s112_nrf52_6.0.0_migration-document.pdf new file mode 100644 index 0000000000000000000000000000000000000000..642779343494a66543a84954d539d4a1e700c348 GIT binary patch literal 18085 zcmeIa1yogA*Dwqc(jY1&$RVXq(B0i7jU3?6dFWE<29<8<79^!hq#J3J2BoD-zJu3$ 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Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON BLE SoftDevice Common + @{ + @defgroup ble_api Events, type definitions and API calls + @{ + + @brief Module independent events, type definitions and API calls for the BLE SoftDevice. + + */ + +#ifndef BLE_H__ +#define BLE_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_err.h" +#include "ble_gap.h" +#include "ble_gatt.h" +#include "ble_gattc.h" +#include "ble_gatts.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_COMMON_ENUMERATIONS Enumerations + * @{ */ + +/** + * @brief Common API SVC numbers. + */ +enum BLE_COMMON_SVCS +{ + SD_BLE_ENABLE = BLE_SVC_BASE, /**< Enable and initialize the BLE stack */ + SD_BLE_EVT_GET, /**< Get an event from the pending events queue. */ + SD_BLE_UUID_VS_ADD, /**< Add a Vendor Specific UUID. */ + SD_BLE_UUID_DECODE, /**< Decode UUID bytes. */ + SD_BLE_UUID_ENCODE, /**< Encode UUID bytes. */ + SD_BLE_VERSION_GET, /**< Get the local version information (company ID, Link Layer Version, Link Layer Subversion). */ + SD_BLE_USER_MEM_REPLY, /**< User Memory Reply. */ + SD_BLE_OPT_SET, /**< Set a BLE option. */ + SD_BLE_OPT_GET, /**< Get a BLE option. */ + SD_BLE_CFG_SET, /**< Add a configuration to the BLE stack. */ +}; + +/** + * @brief BLE Module Independent Event IDs. + */ +enum BLE_COMMON_EVTS +{ + BLE_EVT_USER_MEM_REQUEST = BLE_EVT_BASE + 0, /**< User Memory request. @ref ble_evt_user_mem_request_t */ + BLE_EVT_USER_MEM_RELEASE = BLE_EVT_BASE + 1, /**< User Memory release. @ref ble_evt_user_mem_release_t */ +}; + +/**@brief BLE Connection Configuration IDs. + * + * IDs that uniquely identify a connection configuration. + */ +enum BLE_CONN_CFGS +{ + BLE_CONN_CFG_GAP = BLE_CONN_CFG_BASE + 0, /**< BLE GAP specific connection configuration. */ + BLE_CONN_CFG_GATTC = BLE_CONN_CFG_BASE + 1, /**< BLE GATTC specific connection configuration. */ + BLE_CONN_CFG_GATTS = BLE_CONN_CFG_BASE + 2, /**< BLE GATTS specific connection configuration. */ + BLE_CONN_CFG_GATT = BLE_CONN_CFG_BASE + 3, /**< BLE GATT specific connection configuration. */ +}; + +/**@brief BLE Common Configuration IDs. + * + * IDs that uniquely identify a common configuration. + */ +enum BLE_COMMON_CFGS +{ + BLE_COMMON_CFG_VS_UUID = BLE_CFG_BASE, /**< Vendor specific UUID configuration */ +}; + +/**@brief Common Option IDs. + * IDs that uniquely identify a common option. + */ +enum BLE_COMMON_OPTS +{ + BLE_COMMON_OPT_PA_LNA = BLE_OPT_BASE + 0, /**< PA and LNA options */ + BLE_COMMON_OPT_CONN_EVT_EXT = BLE_OPT_BASE + 1, /**< Extended connection events option */ +}; + +/** @} */ + +/** @addtogroup BLE_COMMON_DEFINES Defines + * @{ */ + +/** @brief Required pointer alignment for BLE Events. +*/ +#define BLE_EVT_PTR_ALIGNMENT 4 + +/** @brief Leaves the maximum of the two arguments. +*/ +#define BLE_MAX(a, b) ((a) < (b) ? (b) : (a)) + +/** @brief Maximum possible length for BLE Events. + * @note The highest value used for @ref ble_gatt_conn_cfg_t::att_mtu in any connection configuration shall be used as a parameter. + * If that value has not been configured for any connections then @ref BLE_GATT_ATT_MTU_DEFAULT must be used instead. +*/ +#define BLE_EVT_LEN_MAX(ATT_MTU) ( \ + offsetof(ble_evt_t, evt.gattc_evt.params.prim_srvc_disc_rsp.services) + ((ATT_MTU) - 1) / 4 * sizeof(ble_gattc_service_t) \ +) + +/** @defgroup BLE_USER_MEM_TYPES User Memory Types + * @{ */ +#define BLE_USER_MEM_TYPE_INVALID 0x00 /**< Invalid User Memory Types. */ +#define BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES 0x01 /**< User Memory for GATTS queued writes. */ +/** @} */ + +/** @defgroup BLE_UUID_VS_COUNTS Vendor Specific UUID counts + * @{ + */ +#define BLE_UUID_VS_COUNT_DEFAULT 10 /**< Default VS UUID count. */ +#define BLE_UUID_VS_COUNT_MAX 254 /**< Maximum VS UUID count. */ +/** @} */ + +/** @defgroup BLE_COMMON_CFG_DEFAULTS Configuration defaults. + * @{ + */ +#define BLE_CONN_CFG_TAG_DEFAULT 0 /**< Default configuration tag, SoftDevice default connection configuration. */ + +/** @} */ + +/** @} */ + +/** @addtogroup BLE_COMMON_STRUCTURES Structures + * @{ */ + +/**@brief User Memory Block. */ +typedef struct +{ + uint8_t *p_mem; /**< Pointer to the start of the user memory block. */ + uint16_t len; /**< Length in bytes of the user memory block. */ +} ble_user_mem_block_t; + +/**@brief Event structure for @ref BLE_EVT_USER_MEM_REQUEST. */ +typedef struct +{ + uint8_t type; /**< User memory type, see @ref BLE_USER_MEM_TYPES. */ +} ble_evt_user_mem_request_t; + +/**@brief Event structure for @ref BLE_EVT_USER_MEM_RELEASE. */ +typedef struct +{ + uint8_t type; /**< User memory type, see @ref BLE_USER_MEM_TYPES. */ + ble_user_mem_block_t mem_block; /**< User memory block */ +} ble_evt_user_mem_release_t; + +/**@brief Event structure for events not associated with a specific function module. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which this event occurred. */ + union + { + ble_evt_user_mem_request_t user_mem_request; /**< User Memory Request Event Parameters. */ + ble_evt_user_mem_release_t user_mem_release; /**< User Memory Release Event Parameters. */ + } params; /**< Event parameter union. */ +} ble_common_evt_t; + +/**@brief BLE Event header. */ +typedef struct +{ + uint16_t evt_id; /**< Value from a BLE__EVT series. */ + uint16_t evt_len; /**< Length in octets including this header. */ +} ble_evt_hdr_t; + +/**@brief Common BLE Event type, wrapping the module specific event reports. */ +typedef struct +{ + ble_evt_hdr_t header; /**< Event header. */ + union + { + ble_common_evt_t common_evt; /**< Common Event, evt_id in BLE_EVT_* series. */ + ble_gap_evt_t gap_evt; /**< GAP originated event, evt_id in BLE_GAP_EVT_* series. */ + ble_gattc_evt_t gattc_evt; /**< GATT client originated event, evt_id in BLE_GATTC_EVT* series. */ + ble_gatts_evt_t gatts_evt; /**< GATT server originated event, evt_id in BLE_GATTS_EVT* series. */ + } evt; /**< Event union. */ +} ble_evt_t; + + +/** + * @brief Version Information. + */ +typedef struct +{ + uint8_t version_number; /**< Link Layer Version number. See https://www.bluetooth.org/en-us/specification/assigned-numbers/link-layer for assigned values. */ + uint16_t company_id; /**< Company ID, Nordic Semiconductor's company ID is 89 (0x0059) (https://www.bluetooth.org/apps/content/Default.aspx?doc_id=49708). */ + uint16_t subversion_number; /**< Link Layer Sub Version number, corresponds to the SoftDevice Config ID or Firmware ID (FWID). */ +} ble_version_t; + +/** + * @brief Configuration parameters for the PA and LNA. + */ +typedef struct +{ + uint8_t enable :1; /**< Enable toggling for this amplifier */ + uint8_t active_high :1; /**< Set the pin to be active high */ + uint8_t gpio_pin :6; /**< The GPIO pin to toggle for this amplifier */ +} ble_pa_lna_cfg_t; + +/** + * @brief PA & LNA GPIO toggle configuration + * + * This option configures the SoftDevice to toggle pins when the radio is active for use with a power amplifier and/or + * a low noise amplifier. + * + * Toggling the pins is achieved by using two PPI channels and a GPIOTE channel. The hardware channel IDs are provided + * by the application and should be regarded as reserved as long as any PA/LNA toggling is enabled. + * + * @note @ref sd_ble_opt_get is not supported for this option. + * @note Setting this option while the radio is in use (i.e. any of the roles are active) may have undefined consequences + * and must be avoided by the application. + */ +typedef struct +{ + ble_pa_lna_cfg_t pa_cfg; /**< Power Amplifier configuration */ + ble_pa_lna_cfg_t lna_cfg; /**< Low Noise Amplifier configuration */ + + uint8_t ppi_ch_id_set; /**< PPI channel used for radio pin setting */ + uint8_t ppi_ch_id_clr; /**< PPI channel used for radio pin clearing */ + uint8_t gpiote_ch_id; /**< GPIOTE channel used for radio pin toggling */ +} ble_common_opt_pa_lna_t; + +/** + * @brief Configuration of extended BLE connection events. + * + * When enabled the SoftDevice will dynamically extend the connection event when possible. + * + * The connection event length is controlled by the connection configuration as set by @ref ble_gap_conn_cfg_t::event_length. + * The connection event can be extended if there is time to send another packet pair before the start of the next connection interval, + * and if there are no conflicts with other BLE roles requesting radio time. + * + * @note @ref sd_ble_opt_get is not supported for this option. + */ +typedef struct +{ + uint8_t enable : 1; /**< Enable extended BLE connection events, disabled by default. */ +} ble_common_opt_conn_evt_ext_t; + +/**@brief Option structure for common options. */ +typedef union +{ + ble_common_opt_pa_lna_t pa_lna; /**< Parameters for controlling PA and LNA pin toggling. */ + ble_common_opt_conn_evt_ext_t conn_evt_ext; /**< Parameters for enabling extended connection events. */ +} ble_common_opt_t; + +/**@brief Common BLE Option type, wrapping the module specific options. */ +typedef union +{ + ble_common_opt_t common_opt; /**< COMMON options, opt_id in @ref BLE_COMMON_OPTS series. */ + ble_gap_opt_t gap_opt; /**< GAP option, opt_id in @ref BLE_GAP_OPTS series. */ +} ble_opt_t; + +/**@brief BLE connection configuration type, wrapping the module specific configurations, set with + * @ref sd_ble_cfg_set. + * + * @note Connection configurations don't have to be set. + * In the case that no configurations has been set, or fewer connection configurations has been set than enabled connections, + * the default connection configuration will be automatically added for the remaining connections. + * When creating connections with the default configuration, @ref BLE_CONN_CFG_TAG_DEFAULT should be used in + * place of @ref ble_conn_cfg_t::conn_cfg_tag. + * + * @sa sd_ble_gap_adv_start() + * + * @mscs + * @mmsc{@ref BLE_CONN_CFG} + * @endmscs + + */ +typedef struct +{ + uint8_t conn_cfg_tag; /**< The application chosen tag it can use with the + @ref sd_ble_gap_adv_start() call + to select this configuration when creating a connection. + Must be different for all connection configurations added and not @ref BLE_CONN_CFG_TAG_DEFAULT. */ + union { + ble_gap_conn_cfg_t gap_conn_cfg; /**< GAP connection configuration, cfg_id is @ref BLE_CONN_CFG_GAP. */ + ble_gattc_conn_cfg_t gattc_conn_cfg; /**< GATTC connection configuration, cfg_id is @ref BLE_CONN_CFG_GATTC. */ + ble_gatts_conn_cfg_t gatts_conn_cfg; /**< GATTS connection configuration, cfg_id is @ref BLE_CONN_CFG_GATTS. */ + ble_gatt_conn_cfg_t gatt_conn_cfg; /**< GATT connection configuration, cfg_id is @ref BLE_CONN_CFG_GATT. */ + } params; /**< Connection configuration union. */ +} ble_conn_cfg_t; + +/** + * @brief Configuration of Vendor Specific UUIDs, set with @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_INVALID_PARAM Too many UUIDs configured. + */ +typedef struct +{ + uint8_t vs_uuid_count; /**< Number of 128-bit Vendor Specific UUID bases to allocate memory for. + Default value is @ref BLE_UUID_VS_COUNT_DEFAULT. Maximum value is + @ref BLE_UUID_VS_COUNT_MAX. */ +} ble_common_cfg_vs_uuid_t; + +/**@brief Common BLE Configuration type, wrapping the common configurations. */ +typedef union +{ + ble_common_cfg_vs_uuid_t vs_uuid_cfg; /**< Vendor specific UUID configuration, cfg_id is @ref BLE_COMMON_CFG_VS_UUID. */ +} ble_common_cfg_t; + +/**@brief BLE Configuration type, wrapping the module specific configurations. */ +typedef union +{ + ble_conn_cfg_t conn_cfg; /**< Connection specific configurations, cfg_id in @ref BLE_CONN_CFGS series. */ + ble_common_cfg_t common_cfg; /**< Global common configurations, cfg_id in @ref BLE_COMMON_CFGS series. */ + ble_gap_cfg_t gap_cfg; /**< Global GAP configurations, cfg_id in @ref BLE_GAP_CFGS series. */ + ble_gatts_cfg_t gatts_cfg; /**< Global GATTS configuration, cfg_id in @ref BLE_GATTS_CFGS series. */ +} ble_cfg_t; + +/** @} */ + +/** @addtogroup BLE_COMMON_FUNCTIONS Functions + * @{ */ + +/**@brief Enable the BLE stack + * + * @param[in, out] p_app_ram_base Pointer to a variable containing the start address of the + * application RAM region (APP_RAM_BASE). On return, this will + * contain the minimum start address of the application RAM region + * required by the SoftDevice for this configuration. + * + * @note The memory requirement for a specific configuration will not increase between SoftDevices + * with the same major version number. + * + * @note The value of *p_app_ram_base when the app has done no custom configuration of the + * SoftDevice, i.e. the app has not called @ref sd_ble_cfg_set before @ref sd_ble_enable, can + * be found in the release notes. + * + * @note At runtime the IC's RAM is split into 2 regions: The SoftDevice RAM region is located + * between 0x20000000 and APP_RAM_BASE-1 and the application's RAM region is located between + * APP_RAM_BASE and the start of the call stack. + * + * @details This call initializes the BLE stack, no BLE related function other than @ref + * sd_ble_cfg_set can be called before this one. + * + * @mscs + * @mmsc{@ref BLE_COMMON_ENABLE} + * @endmscs + * + * @retval ::NRF_SUCCESS The BLE stack has been initialized successfully. + * @retval ::NRF_ERROR_INVALID_STATE The BLE stack had already been initialized and cannot be reinitialized. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. + * @retval ::NRF_ERROR_NO_MEM The amount of memory assigned to the SoftDevice by *p_app_ram_base is not + * large enough to fit this configuration's memory requirement. Check *p_app_ram_base + * and set the start address of the application RAM region accordingly. + */ +SVCALL(SD_BLE_ENABLE, uint32_t, sd_ble_enable(uint32_t * p_app_ram_base)); + +/**@brief Add configurations for the BLE stack + * + * @param[in] cfg_id Config ID, see @ref BLE_CONN_CFGS, @ref BLE_COMMON_CFGS, @ref + * BLE_GAP_CFGS or @ref BLE_GATTS_CFGS. + * @param[in] p_cfg Pointer to a ble_cfg_t structure containing the configuration value. + * @param[in] app_ram_base The start address of the application RAM region (APP_RAM_BASE). + * See @ref sd_ble_enable for details about APP_RAM_BASE. + * + * @note The memory requirement for a specific configuration will not increase between SoftDevices + * with the same major version number. + * + * @note If a configuration is set more than once, the last one set is the one that takes effect on + * @ref sd_ble_enable. + * + * @note Any part of the BLE stack that is NOT configured with @ref sd_ble_cfg_set will have default + * configuration. + * + * @note @ref sd_ble_cfg_set may be called at any time when the SoftDevice is enabled (see @ref + * sd_softdevice_enable) while the BLE part of the SoftDevice is not enabled (see @ref + * sd_ble_enable). + * + * @note Error codes for the configurations are described in the configuration structs. + * + * @mscs + * @mmsc{@ref BLE_COMMON_ENABLE} + * @endmscs + * + * @retval ::NRF_SUCCESS The configuration has been added successfully. + * @retval ::NRF_ERROR_INVALID_STATE The BLE stack had already been initialized. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid cfg_id supplied. + * @retval ::NRF_ERROR_NO_MEM The amount of memory assigned to the SoftDevice by app_ram_base is not + * large enough to fit this configuration's memory requirement. + */ +SVCALL(SD_BLE_CFG_SET, uint32_t, sd_ble_cfg_set(uint32_t cfg_id, ble_cfg_t const * p_cfg, uint32_t app_ram_base)); + +/**@brief Get an event from the pending events queue. + * + * @param[out] p_dest Pointer to buffer to be filled in with an event, or NULL to retrieve the event length. + * This buffer must be aligned to the extend defined by @ref BLE_EVT_PTR_ALIGNMENT. + * The buffer should be interpreted as a @ref ble_evt_t struct. + * @param[in, out] p_len Pointer the length of the buffer, on return it is filled with the event length. + * + * @details This call allows the application to pull a BLE event from the BLE stack. The application is signaled that + * an event is available from the BLE stack by the triggering of the SD_EVT_IRQn interrupt. + * The application is free to choose whether to call this function from thread mode (main context) or directly from the + * Interrupt Service Routine that maps to SD_EVT_IRQn. In any case however, and because the BLE stack runs at a higher + * priority than the application, this function should be called in a loop (until @ref NRF_ERROR_NOT_FOUND is returned) + * every time SD_EVT_IRQn is raised to ensure that all available events are pulled from the BLE stack. Failure to do so + * could potentially leave events in the internal queue without the application being aware of this fact. + * + * Sizing the p_dest buffer is equally important, since the application needs to provide all the memory necessary for the event to + * be copied into application memory. If the buffer provided is not large enough to fit the entire contents of the event, + * @ref NRF_ERROR_DATA_SIZE will be returned and the application can then call again with a larger buffer size. + * The maximum possible event length is defined by @ref BLE_EVT_LEN_MAX. The application may also "peek" the event length + * by providing p_dest as a NULL pointer and inspecting the value of *p_len upon return: + * + * \code + * uint16_t len; + * errcode = sd_ble_evt_get(NULL, &len); + * \endcode + * + * @mscs + * @mmsc{@ref BLE_COMMON_IRQ_EVT_MSC} + * @mmsc{@ref BLE_COMMON_THREAD_EVT_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Event pulled and stored into the supplied buffer. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. + * @retval ::NRF_ERROR_NOT_FOUND No events ready to be pulled. + * @retval ::NRF_ERROR_DATA_SIZE Event ready but could not fit into the supplied buffer. + */ +SVCALL(SD_BLE_EVT_GET, uint32_t, sd_ble_evt_get(uint8_t *p_dest, uint16_t *p_len)); + + +/**@brief Add a Vendor Specific base UUID. + * + * @details This call enables the application to add a vendor specific base UUID to the BLE stack's table, for later + * use with all other modules and APIs. This then allows the application to use the shorter, 24-bit @ref ble_uuid_t + * format when dealing with both 16-bit and 128-bit UUIDs without having to check for lengths and having split code + * paths. This is accomplished by extending the grouping mechanism that the Bluetooth SIG standard base UUID uses + * for all other 128-bit UUIDs. The type field in the @ref ble_uuid_t structure is an index (relative to + * @ref BLE_UUID_TYPE_VENDOR_BEGIN) to the table populated by multiple calls to this function, and the UUID field + * in the same structure contains the 2 bytes at indexes 12 and 13. The number of possible 128-bit UUIDs available to + * the application is therefore the number of Vendor Specific UUIDs added with the help of this function times 65536, + * although restricted to modifying bytes 12 and 13 for each of the entries in the supplied array. + * + * @note Bytes 12 and 13 of the provided UUID will not be used internally, since those are always replaced by + * the 16-bit uuid field in @ref ble_uuid_t. + * + * @note If a UUID is already present in the BLE stack's internal table, the corresponding index will be returned in + * p_uuid_type along with an @ref NRF_SUCCESS error code. + * + * @param[in] p_vs_uuid Pointer to a 16-octet (128-bit) little endian Vendor Specific UUID disregarding + * bytes 12 and 13. + * @param[out] p_uuid_type Pointer to a uint8_t where the type field in @ref ble_uuid_t corresponding to this UUID will be stored. + * + * @retval ::NRF_SUCCESS Successfully added the Vendor Specific UUID. + * @retval ::NRF_ERROR_INVALID_ADDR If p_vs_uuid or p_uuid_type is NULL or invalid. + * @retval ::NRF_ERROR_NO_MEM If there are no more free slots for VS UUIDs. + */ +SVCALL(SD_BLE_UUID_VS_ADD, uint32_t, sd_ble_uuid_vs_add(ble_uuid128_t const *p_vs_uuid, uint8_t *p_uuid_type)); + + +/** @brief Decode little endian raw UUID bytes (16-bit or 128-bit) into a 24 bit @ref ble_uuid_t structure. + * + * @details The raw UUID bytes excluding bytes 12 and 13 (i.e. bytes 0-11 and 14-15) of p_uuid_le are compared + * to the corresponding ones in each entry of the table of vendor specific UUIDs populated with @ref sd_ble_uuid_vs_add + * to look for a match. If there is such a match, bytes 12 and 13 are returned as p_uuid->uuid and the index + * relative to @ref BLE_UUID_TYPE_VENDOR_BEGIN as p_uuid->type. + * + * @note If the UUID length supplied is 2, then the type set by this call will always be @ref BLE_UUID_TYPE_BLE. + * + * @param[in] uuid_le_len Length in bytes of the buffer pointed to by p_uuid_le (must be 2 or 16 bytes). + * @param[in] p_uuid_le Pointer pointing to little endian raw UUID bytes. + * @param[out] p_uuid Pointer to a @ref ble_uuid_t structure to be filled in. + * + * @retval ::NRF_SUCCESS Successfully decoded into the @ref ble_uuid_t structure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_LENGTH Invalid UUID length. + * @retval ::NRF_ERROR_NOT_FOUND For a 128-bit UUID, no match in the populated table of UUIDs. + */ +SVCALL(SD_BLE_UUID_DECODE, uint32_t, sd_ble_uuid_decode(uint8_t uuid_le_len, uint8_t const *p_uuid_le, ble_uuid_t *p_uuid)); + + +/** @brief Encode a @ref ble_uuid_t structure into little endian raw UUID bytes (16-bit or 128-bit). + * + * @note The pointer to the destination buffer p_uuid_le may be NULL, in which case only the validity and size of p_uuid is computed. + * + * @param[in] p_uuid Pointer to a @ref ble_uuid_t structure that will be encoded into bytes. + * @param[out] p_uuid_le_len Pointer to a uint8_t that will be filled with the encoded length (2 or 16 bytes). + * @param[out] p_uuid_le Pointer to a buffer where the little endian raw UUID bytes (2 or 16) will be stored. + * + * @retval ::NRF_SUCCESS Successfully encoded into the buffer. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid UUID type. + */ +SVCALL(SD_BLE_UUID_ENCODE, uint32_t, sd_ble_uuid_encode(ble_uuid_t const *p_uuid, uint8_t *p_uuid_le_len, uint8_t *p_uuid_le)); + + +/**@brief Get Version Information. + * + * @details This call allows the application to get the BLE stack version information. + * + * @param[out] p_version Pointer to a ble_version_t structure to be filled in. + * + * @retval ::NRF_SUCCESS Version information stored successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY The BLE stack is busy (typically doing a locally-initiated disconnection procedure). + */ +SVCALL(SD_BLE_VERSION_GET, uint32_t, sd_ble_version_get(ble_version_t *p_version)); + + +/**@brief Provide a user memory block. + * + * @note This call can only be used as a response to a @ref BLE_EVT_USER_MEM_REQUEST event issued to the application. + * + * @param[in] conn_handle Connection handle. + * @param[in] p_block Pointer to a user memory block structure or NULL if memory is managed by the application. + * + * @mscs + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_PEER_CANCEL_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_NOAUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Successfully queued a response to the peer. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_LENGTH Invalid user memory block length supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection state or no user memory request pending. + */ +SVCALL(SD_BLE_USER_MEM_REPLY, uint32_t, sd_ble_user_mem_reply(uint16_t conn_handle, ble_user_mem_block_t const *p_block)); + +/**@brief Set a BLE option. + * + * @details This call allows the application to set the value of an option. + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC} + * @endmscs + * + * @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS. + * @param[in] p_opt Pointer to a ble_opt_t structure containing the option value. + * + * @retval ::NRF_SUCCESS Option set successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. + * @retval ::NRF_ERROR_INVALID_STATE Unable to set the parameter at this time. + * @retval ::NRF_ERROR_BUSY The BLE stack is busy or the previous procedure has not completed. + */ +SVCALL(SD_BLE_OPT_SET, uint32_t, sd_ble_opt_set(uint32_t opt_id, ble_opt_t const *p_opt)); + + +/**@brief Get a BLE option. + * + * @details This call allows the application to retrieve the value of an option. + * + * @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS. + * @param[out] p_opt Pointer to a ble_opt_t structure to be filled in. + * + * @retval ::NRF_SUCCESS Option retrieved successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. + * @retval ::NRF_ERROR_INVALID_STATE Unable to retrieve the parameter at this time. + * @retval ::NRF_ERROR_BUSY The BLE stack is busy or the previous procedure has not completed. + * @retval ::NRF_ERROR_NOT_SUPPORTED This option is not supported. + * + */ +SVCALL(SD_BLE_OPT_GET, uint32_t, sd_ble_opt_get(uint32_t opt_id, ble_opt_t *p_opt)); + +/** @} */ +#ifdef __cplusplus +} +#endif +#endif /* BLE_H__ */ + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_err.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_err.h new file mode 100644 index 00000000000..1b4820dc3d6 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_err.h @@ -0,0 +1,93 @@ +/* + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON + @{ + @addtogroup nrf_error + @{ + @ingroup BLE_COMMON + @} + + @defgroup ble_err General error codes + @{ + + @brief General error code definitions for the BLE API. + + @ingroup BLE_COMMON +*/ +#ifndef NRF_BLE_ERR_H__ +#define NRF_BLE_ERR_H__ + +#include "nrf_error.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* @defgroup BLE_ERRORS Error Codes + * @{ */ +#define BLE_ERROR_NOT_ENABLED (NRF_ERROR_STK_BASE_NUM+0x001) /**< @ref sd_ble_enable has not been called. */ +#define BLE_ERROR_INVALID_CONN_HANDLE (NRF_ERROR_STK_BASE_NUM+0x002) /**< Invalid connection handle. */ +#define BLE_ERROR_INVALID_ATTR_HANDLE (NRF_ERROR_STK_BASE_NUM+0x003) /**< Invalid attribute handle. */ +#define BLE_ERROR_INVALID_ADV_HANDLE (NRF_ERROR_STK_BASE_NUM+0x004) /**< Invalid advertising handle. */ +#define BLE_ERROR_INVALID_ROLE (NRF_ERROR_STK_BASE_NUM+0x005) /**< Invalid role. */ +#define BLE_ERROR_BLOCKED_BY_OTHER_LINKS (NRF_ERROR_STK_BASE_NUM+0x006) /**< The attempt to change link settings failed due to the scheduling of other links. */ +/** @} */ + + +/** @defgroup BLE_ERROR_SUBRANGES Module specific error code subranges + * @brief Assignment of subranges for module specific error codes. + * @note For specific error codes, see ble_.h or ble_error_.h. + * @{ */ +#define NRF_L2CAP_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x100) /**< L2CAP specific errors. */ +#define NRF_GAP_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x200) /**< GAP specific errors. */ +#define NRF_GATTC_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x300) /**< GATT client specific errors. */ +#define NRF_GATTS_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x400) /**< GATT server specific errors. */ +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif + + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_gap.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_gap.h new file mode 100644 index 00000000000..2bf80e2d106 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_gap.h @@ -0,0 +1,2023 @@ +/* + * Copyright (c) 2011 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_GAP Generic Access Profile (GAP) + @{ + @brief Definitions and prototypes for the GAP interface. + */ + +#ifndef BLE_GAP_H__ +#define BLE_GAP_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_hci.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@addtogroup BLE_GAP_ENUMERATIONS Enumerations + * @{ */ + +/**@brief GAP API SVC numbers. + */ +enum BLE_GAP_SVCS +{ + SD_BLE_GAP_ADDR_SET = BLE_GAP_SVC_BASE, /**< Set own Bluetooth Address. */ + SD_BLE_GAP_ADDR_GET = BLE_GAP_SVC_BASE + 1, /**< Get own Bluetooth Address. */ + SD_BLE_GAP_WHITELIST_SET = BLE_GAP_SVC_BASE + 2, /**< Set active whitelist. */ + SD_BLE_GAP_DEVICE_IDENTITIES_SET = BLE_GAP_SVC_BASE + 3, /**< Set device identity list. */ + SD_BLE_GAP_PRIVACY_SET = BLE_GAP_SVC_BASE + 4, /**< Set Privacy settings*/ + SD_BLE_GAP_PRIVACY_GET = BLE_GAP_SVC_BASE + 5, /**< Get Privacy settings*/ + SD_BLE_GAP_ADV_SET_CONFIGURE = BLE_GAP_SVC_BASE + 6, /**< Configure an advertising set. */ + SD_BLE_GAP_ADV_START = BLE_GAP_SVC_BASE + 7, /**< Start Advertising. */ + SD_BLE_GAP_ADV_STOP = BLE_GAP_SVC_BASE + 8, /**< Stop Advertising. */ + SD_BLE_GAP_CONN_PARAM_UPDATE = BLE_GAP_SVC_BASE + 9, /**< Connection Parameter Update. */ + SD_BLE_GAP_DISCONNECT = BLE_GAP_SVC_BASE + 10, /**< Disconnect. */ + SD_BLE_GAP_TX_POWER_SET = BLE_GAP_SVC_BASE + 11, /**< Set TX Power. */ + SD_BLE_GAP_APPEARANCE_SET = BLE_GAP_SVC_BASE + 12, /**< Set Appearance. */ + SD_BLE_GAP_APPEARANCE_GET = BLE_GAP_SVC_BASE + 13, /**< Get Appearance. */ + SD_BLE_GAP_PPCP_SET = BLE_GAP_SVC_BASE + 14, /**< Set PPCP. */ + SD_BLE_GAP_PPCP_GET = BLE_GAP_SVC_BASE + 15, /**< Get PPCP. */ + SD_BLE_GAP_DEVICE_NAME_SET = BLE_GAP_SVC_BASE + 16, /**< Set Device Name. */ + SD_BLE_GAP_DEVICE_NAME_GET = BLE_GAP_SVC_BASE + 17, /**< Get Device Name. */ + SD_BLE_GAP_AUTHENTICATE = BLE_GAP_SVC_BASE + 18, /**< Initiate Pairing/Bonding. */ + SD_BLE_GAP_SEC_PARAMS_REPLY = BLE_GAP_SVC_BASE + 19, /**< Reply with Security Parameters. */ + SD_BLE_GAP_AUTH_KEY_REPLY = BLE_GAP_SVC_BASE + 20, /**< Reply with an authentication key. */ + SD_BLE_GAP_LESC_DHKEY_REPLY = BLE_GAP_SVC_BASE + 21, /**< Reply with an LE Secure Connections DHKey. */ + SD_BLE_GAP_KEYPRESS_NOTIFY = BLE_GAP_SVC_BASE + 22, /**< Notify of a keypress during an authentication procedure. */ + SD_BLE_GAP_LESC_OOB_DATA_GET = BLE_GAP_SVC_BASE + 23, /**< Get the local LE Secure Connections OOB data. */ + SD_BLE_GAP_LESC_OOB_DATA_SET = BLE_GAP_SVC_BASE + 24, /**< Set the remote LE Secure Connections OOB data. */ + SD_BLE_GAP_SEC_INFO_REPLY = BLE_GAP_SVC_BASE + 26, /**< Reply with Security Information. */ + SD_BLE_GAP_CONN_SEC_GET = BLE_GAP_SVC_BASE + 27, /**< Obtain connection security level. */ + SD_BLE_GAP_RSSI_START = BLE_GAP_SVC_BASE + 28, /**< Start reporting of changes in RSSI. */ + SD_BLE_GAP_RSSI_STOP = BLE_GAP_SVC_BASE + 29, /**< Stop reporting of changes in RSSI. */ + SD_BLE_GAP_RSSI_GET = BLE_GAP_SVC_BASE + 34, /**< Get the last RSSI sample. */ + SD_BLE_GAP_PHY_UPDATE = BLE_GAP_SVC_BASE + 35, /**< Initiate or respond to a PHY Update Procedure. */ +}; + +/**@brief GAP Event IDs. + * IDs that uniquely identify an event coming from the stack to the application. + */ +enum BLE_GAP_EVTS +{ + BLE_GAP_EVT_CONNECTED = BLE_GAP_EVT_BASE, + BLE_GAP_EVT_DISCONNECTED = BLE_GAP_EVT_BASE + 1, /**< Disconnected from peer. \n See @ref ble_gap_evt_disconnected_t. */ + BLE_GAP_EVT_CONN_PARAM_UPDATE = BLE_GAP_EVT_BASE + 2, /**< Connection Parameters updated. \n See @ref ble_gap_evt_conn_param_update_t. */ + BLE_GAP_EVT_SEC_PARAMS_REQUEST = BLE_GAP_EVT_BASE + 3, /**< Request to provide security parameters. \n Reply with @ref sd_ble_gap_sec_params_reply. \n See @ref ble_gap_evt_sec_params_request_t. */ + BLE_GAP_EVT_SEC_INFO_REQUEST = BLE_GAP_EVT_BASE + 4, /**< Request to provide security information. \n Reply with @ref sd_ble_gap_sec_info_reply. \n See @ref ble_gap_evt_sec_info_request_t. */ + BLE_GAP_EVT_PASSKEY_DISPLAY = BLE_GAP_EVT_BASE + 5, /**< Request to display a passkey to the user. \n In LESC Numeric Comparison, reply with @ref sd_ble_gap_auth_key_reply. \n See @ref ble_gap_evt_passkey_display_t. */ + BLE_GAP_EVT_KEY_PRESSED = BLE_GAP_EVT_BASE + 6, /**< Notification of a keypress on the remote device.\n See @ref ble_gap_evt_key_pressed_t */ + BLE_GAP_EVT_AUTH_KEY_REQUEST = BLE_GAP_EVT_BASE + 7, /**< Request to provide an authentication key. \n Reply with @ref sd_ble_gap_auth_key_reply. \n See @ref ble_gap_evt_auth_key_request_t. */ + BLE_GAP_EVT_LESC_DHKEY_REQUEST = BLE_GAP_EVT_BASE + 8, /**< Request to calculate an LE Secure Connections DHKey. \n Reply with @ref sd_ble_gap_lesc_dhkey_reply. \n See @ref ble_gap_evt_lesc_dhkey_request_t */ + BLE_GAP_EVT_AUTH_STATUS = BLE_GAP_EVT_BASE + 9, /**< Authentication procedure completed with status. \n See @ref ble_gap_evt_auth_status_t. */ + BLE_GAP_EVT_CONN_SEC_UPDATE = BLE_GAP_EVT_BASE + 10, /**< Connection security updated. \n See @ref ble_gap_evt_conn_sec_update_t. */ + BLE_GAP_EVT_TIMEOUT = BLE_GAP_EVT_BASE + 11, /**< Timeout expired. \n See @ref ble_gap_evt_timeout_t. */ + BLE_GAP_EVT_RSSI_CHANGED = BLE_GAP_EVT_BASE + 12, /**< RSSI report. \n See @ref ble_gap_evt_rssi_changed_t. */ + BLE_GAP_EVT_SEC_REQUEST = BLE_GAP_EVT_BASE + 14, /**< Security Request. \n See @ref ble_gap_evt_sec_request_t. */ + BLE_GAP_EVT_SCAN_REQ_REPORT = BLE_GAP_EVT_BASE + 16, /**< Scan request report. \n See @ref ble_gap_evt_scan_req_report_t. */ + BLE_GAP_EVT_PHY_UPDATE_REQUEST = BLE_GAP_EVT_BASE + 17, /**< PHY Update Request. \n Reply with @ref sd_ble_gap_phy_update. \n See @ref ble_gap_evt_phy_update_request_t. */ + BLE_GAP_EVT_PHY_UPDATE = BLE_GAP_EVT_BASE + 18, /**< PHY Update Procedure is complete. \n See @ref ble_gap_evt_phy_update_t. */ + BLE_GAP_EVT_ADV_SET_TERMINATED = BLE_GAP_EVT_BASE + 22, /**< Advertising set terminated. \n See @ref ble_gap_evt_adv_set_terminated_t. */ +}; + +/**@brief GAP Option IDs. + * IDs that uniquely identify a GAP option. + */ +enum BLE_GAP_OPTS +{ + BLE_GAP_OPT_CH_MAP = BLE_GAP_OPT_BASE, /**< Channel Map. @ref ble_gap_opt_ch_map_t */ + BLE_GAP_OPT_LOCAL_CONN_LATENCY = BLE_GAP_OPT_BASE + 1, /**< Local connection latency. @ref ble_gap_opt_local_conn_latency_t */ + BLE_GAP_OPT_PASSKEY = BLE_GAP_OPT_BASE + 2, /**< Set passkey. @ref ble_gap_opt_passkey_t */ + BLE_GAP_OPT_AUTH_PAYLOAD_TIMEOUT = BLE_GAP_OPT_BASE + 4, /**< Set Authenticated payload timeout. @ref ble_gap_opt_auth_payload_timeout_t */ + BLE_GAP_OPT_SLAVE_LATENCY_DISABLE = BLE_GAP_OPT_BASE + 5, /**< Disable slave latency. @ref ble_gap_opt_slave_latency_disable_t */ +}; + +/**@brief GAP Configuration IDs. + * + * IDs that uniquely identify a GAP configuration. + */ +enum BLE_GAP_CFGS +{ + BLE_GAP_CFG_ROLE_COUNT = BLE_GAP_CFG_BASE, /**< Role count configuration. */ + BLE_GAP_CFG_DEVICE_NAME = BLE_GAP_CFG_BASE + 1, /**< Device name configuration. */ +}; + +/**@brief GAP TX Power roles. + */ +enum BLE_GAP_TX_POWER_ROLES +{ + BLE_GAP_TX_POWER_ROLE_ADV = 1, /**< Advertiser role. */ + BLE_GAP_TX_POWER_ROLE_CONN = 3, /**< Connection role. */ +}; + +/** @} */ + +/**@addtogroup BLE_GAP_DEFINES Defines + * @{ */ + +/**@defgroup BLE_ERRORS_GAP SVC return values specific to GAP + * @{ */ +#define BLE_ERROR_GAP_UUID_LIST_MISMATCH (NRF_GAP_ERR_BASE + 0x000) /**< UUID list does not contain an integral number of UUIDs. */ +#define BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST (NRF_GAP_ERR_BASE + 0x001) /**< Use of Whitelist not permitted with discoverable advertising. */ +#define BLE_ERROR_GAP_INVALID_BLE_ADDR (NRF_GAP_ERR_BASE + 0x002) /**< The upper two bits of the address do not correspond to the specified address type. */ +#define BLE_ERROR_GAP_WHITELIST_IN_USE (NRF_GAP_ERR_BASE + 0x003) /**< Attempt to modify the whitelist while already in use by another operation. */ +#define BLE_ERROR_GAP_DEVICE_IDENTITIES_IN_USE (NRF_GAP_ERR_BASE + 0x004) /**< Attempt to modify the device identity list while already in use by another operation. */ +#define BLE_ERROR_GAP_DEVICE_IDENTITIES_DUPLICATE (NRF_GAP_ERR_BASE + 0x005) /**< The device identity list contains entries with duplicate identity addresses. */ +/**@} */ + + +/**@defgroup BLE_GAP_ROLES GAP Roles + * @{ */ +#define BLE_GAP_ROLE_INVALID 0x0 /**< Invalid Role. */ +#define BLE_GAP_ROLE_PERIPH 0x1 /**< Peripheral Role. */ +/**@} */ + + +/**@defgroup BLE_GAP_TIMEOUT_SOURCES GAP Timeout sources + * @{ */ +#define BLE_GAP_TIMEOUT_SRC_CONN 0x02 /**< Connection timeout. */ +#define BLE_GAP_TIMEOUT_SRC_AUTH_PAYLOAD 0x03 /**< Authenticated payload timeout. */ +/**@} */ + + +/**@defgroup BLE_GAP_ADDR_TYPES GAP Address types + * @{ */ +#define BLE_GAP_ADDR_TYPE_PUBLIC 0x00 /**< Public (identity) address.*/ +#define BLE_GAP_ADDR_TYPE_RANDOM_STATIC 0x01 /**< Random static (identity) address. */ +#define BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE 0x02 /**< Random private resolvable address. */ +#define BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE 0x03 /**< Random private non-resolvable address. */ +/**@} */ + + +/**@brief The default interval in seconds at which a private address is refreshed. */ +#define BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S (900) /* 15 minutes. */ +/**@brief The maximum interval in seconds at which a private address can be refreshed. */ +#define BLE_GAP_MAX_PRIVATE_ADDR_CYCLE_INTERVAL_S (41400) /* 11 hours 30 minutes. */ + + +/** @brief BLE address length. */ +#define BLE_GAP_ADDR_LEN (6) + +/**@defgroup BLE_GAP_PRIVACY_MODES Privacy modes + * @{ */ +#define BLE_GAP_PRIVACY_MODE_OFF 0x00 /**< Device will send and accept its identity address for its own address. */ +#define BLE_GAP_PRIVACY_MODE_DEVICE_PRIVACY 0x01 /**< Device will send and accept only private addresses for its own address. */ +#define BLE_GAP_PRIVACY_MODE_NETWORK_PRIVACY 0x02 /**< Device will send and accept only private addresses for its own address, + and will not accept a peer using identity address as sender address when + the peer IRK is exchanged, non-zero and added to the identity list. */ +/**@} */ + +/** @brief Invalid power level. */ +#define BLE_GAP_POWER_LEVEL_INVALID 127 + +/** @brief Advertising set handle not set. */ +#define BLE_GAP_ADV_SET_HANDLE_NOT_SET (0xFF) + +/** @brief The default number of advertising sets. */ +#define BLE_GAP_ADV_SET_COUNT_DEFAULT (1) + +/** @brief The maximum number of advertising sets supported by this SoftDevice. */ +#define BLE_GAP_ADV_SET_COUNT_MAX (1) + +/**@defgroup BLE_GAP_ADV_SET_DATA_SIZES Advertising data sizes. + * @{ */ +#define BLE_GAP_ADV_SET_DATA_SIZE_MAX (31) /**< Maximum data length for an advertising set. */ +/**@}. */ + +/** @brief Set ID not available in advertising report. */ +#define BLE_GAP_ADV_REPORT_SET_ID_NOT_AVAILABLE 0xFF + +/**@defgroup BLE_GAP_EVT_ADV_SET_TERMINATED_REASON GAP Advertising Set Terminated reasons + * @{ */ +#define BLE_GAP_EVT_ADV_SET_TERMINATED_REASON_TIMEOUT 0x01 /**< Timeout value reached. */ +#define BLE_GAP_EVT_ADV_SET_TERMINATED_REASON_LIMIT_REACHED 0x02 /**< @ref ble_gap_adv_params_t::max_adv_evts was reached. */ +/**@} */ + +/**@defgroup BLE_GAP_AD_TYPE_DEFINITIONS GAP Advertising and Scan Response Data format + * @note Found at https://www.bluetooth.org/Technical/AssignedNumbers/generic_access_profile.htm + * @{ */ +#define BLE_GAP_AD_TYPE_FLAGS 0x01 /**< Flags for discoverability. */ +#define BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_MORE_AVAILABLE 0x02 /**< Partial list of 16 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_COMPLETE 0x03 /**< Complete list of 16 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_MORE_AVAILABLE 0x04 /**< Partial list of 32 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_COMPLETE 0x05 /**< Complete list of 32 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_MORE_AVAILABLE 0x06 /**< Partial list of 128 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_COMPLETE 0x07 /**< Complete list of 128 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_SHORT_LOCAL_NAME 0x08 /**< Short local device name. */ +#define BLE_GAP_AD_TYPE_COMPLETE_LOCAL_NAME 0x09 /**< Complete local device name. */ +#define BLE_GAP_AD_TYPE_TX_POWER_LEVEL 0x0A /**< Transmit power level. */ +#define BLE_GAP_AD_TYPE_CLASS_OF_DEVICE 0x0D /**< Class of device. */ +#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C 0x0E /**< Simple Pairing Hash C. */ +#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R 0x0F /**< Simple Pairing Randomizer R. */ +#define BLE_GAP_AD_TYPE_SECURITY_MANAGER_TK_VALUE 0x10 /**< Security Manager TK Value. */ +#define BLE_GAP_AD_TYPE_SECURITY_MANAGER_OOB_FLAGS 0x11 /**< Security Manager Out Of Band Flags. */ +#define BLE_GAP_AD_TYPE_SLAVE_CONNECTION_INTERVAL_RANGE 0x12 /**< Slave Connection Interval Range. */ +#define BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_16BIT 0x14 /**< List of 16-bit Service Solicitation UUIDs. */ +#define BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_128BIT 0x15 /**< List of 128-bit Service Solicitation UUIDs. */ +#define BLE_GAP_AD_TYPE_SERVICE_DATA 0x16 /**< Service Data - 16-bit UUID. */ +#define BLE_GAP_AD_TYPE_PUBLIC_TARGET_ADDRESS 0x17 /**< Public Target Address. */ +#define BLE_GAP_AD_TYPE_RANDOM_TARGET_ADDRESS 0x18 /**< Random Target Address. */ +#define BLE_GAP_AD_TYPE_APPEARANCE 0x19 /**< Appearance. */ +#define BLE_GAP_AD_TYPE_ADVERTISING_INTERVAL 0x1A /**< Advertising Interval. */ +#define BLE_GAP_AD_TYPE_LE_BLUETOOTH_DEVICE_ADDRESS 0x1B /**< LE Bluetooth Device Address. */ +#define BLE_GAP_AD_TYPE_LE_ROLE 0x1C /**< LE Role. */ +#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C256 0x1D /**< Simple Pairing Hash C-256. */ +#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R256 0x1E /**< Simple Pairing Randomizer R-256. */ +#define BLE_GAP_AD_TYPE_SERVICE_DATA_32BIT_UUID 0x20 /**< Service Data - 32-bit UUID. */ +#define BLE_GAP_AD_TYPE_SERVICE_DATA_128BIT_UUID 0x21 /**< Service Data - 128-bit UUID. */ +#define BLE_GAP_AD_TYPE_LESC_CONFIRMATION_VALUE 0x22 /**< LE Secure Connections Confirmation Value */ +#define BLE_GAP_AD_TYPE_LESC_RANDOM_VALUE 0x23 /**< LE Secure Connections Random Value */ +#define BLE_GAP_AD_TYPE_URI 0x24 /**< URI */ +#define BLE_GAP_AD_TYPE_3D_INFORMATION_DATA 0x3D /**< 3D Information Data. */ +#define BLE_GAP_AD_TYPE_MANUFACTURER_SPECIFIC_DATA 0xFF /**< Manufacturer Specific Data. */ +/**@} */ + + +/**@defgroup BLE_GAP_ADV_FLAGS GAP Advertisement Flags + * @{ */ +#define BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE (0x01) /**< LE Limited Discoverable Mode. */ +#define BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE (0x02) /**< LE General Discoverable Mode. */ +#define BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED (0x04) /**< BR/EDR not supported. */ +#define BLE_GAP_ADV_FLAG_LE_BR_EDR_CONTROLLER (0x08) /**< Simultaneous LE and BR/EDR, Controller. */ +#define BLE_GAP_ADV_FLAG_LE_BR_EDR_HOST (0x10) /**< Simultaneous LE and BR/EDR, Host. */ +#define BLE_GAP_ADV_FLAGS_LE_ONLY_LIMITED_DISC_MODE (BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE | BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED) /**< LE Limited Discoverable Mode, BR/EDR not supported. */ +#define BLE_GAP_ADV_FLAGS_LE_ONLY_GENERAL_DISC_MODE (BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE | BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED) /**< LE General Discoverable Mode, BR/EDR not supported. */ +/**@} */ + + +/**@defgroup BLE_GAP_ADV_INTERVALS GAP Advertising interval max and min + * @{ */ +#define BLE_GAP_ADV_INTERVAL_MIN 0x000020 /**< Minimum Advertising interval in 625 us units, i.e. 20 ms. */ +#define BLE_GAP_ADV_INTERVAL_MAX 0x004000 /**< Maximum Advertising interval in 625 us units, i.e. 10.24 s. + @note Support for values above @ref BLE_GAP_ADV_INTERVAL_MAX + is experimental. Values above 0xFFFFFF, i.e 10,485.759375 s + are not supported. */ + /**@} */ + + + +/**@defgroup BLE_GAP_ADV_TYPES GAP Advertising types + * + * Advertising types defined in Bluetooth Core Specification v5.0, Vol 6, Part B, Section 4.4.2. + * + * The maximum advertising data length is defined by @ref BLE_GAP_ADV_SET_DATA_SIZE_MAX. + * Note that some of the advertising types do not support advertising data. Non-scannable types do not support + * scan response data. + * + * @note Extended advertising is not supported in this SoftDevice. + * @{ */ +#define BLE_GAP_ADV_TYPE_CONNECTABLE_SCANNABLE_UNDIRECTED 0x01 /**< Connectable and scannable undirected + advertising events. */ +#define BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED_HIGH_DUTY_CYCLE 0x02 /**< Connectable non-scannable directed advertising + events. Advertising interval is less that 3.75 ms. + Use this type for fast reconnections. + @note Advertising data is not supported. */ +#define BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED 0x03 /**< Connectable non-scannable directed advertising + events. + @note Advertising data is not supported. */ +#define BLE_GAP_ADV_TYPE_NONCONNECTABLE_SCANNABLE_UNDIRECTED 0x04 /**< Non-connectable scannable undirected + advertising events. */ +#define BLE_GAP_ADV_TYPE_NONCONNECTABLE_NONSCANNABLE_UNDIRECTED 0x05 /**< Non-connectable non-scannable undirected + advertising events. */ +/**@} */ + +/**@defgroup BLE_GAP_ADV_FILTER_POLICIES GAP Advertising filter policies + * @{ */ +#define BLE_GAP_ADV_FP_ANY 0x00 /**< Allow scan requests and connect requests from any device. */ +#define BLE_GAP_ADV_FP_FILTER_SCANREQ 0x01 /**< Filter scan requests with whitelist. */ +#define BLE_GAP_ADV_FP_FILTER_CONNREQ 0x02 /**< Filter connect requests with whitelist. */ +#define BLE_GAP_ADV_FP_FILTER_BOTH 0x03 /**< Filter both scan and connect requests with whitelist. */ +/**@} */ + + +/**@defgroup BLE_GAP_ADV_TIMEOUT_VALUES GAP Advertising timeout values in 10 ms units + * @{ */ +#define BLE_GAP_ADV_TIMEOUT_HIGH_DUTY_MAX (128) /**< Maximum high duty advertising time in 10 ms units. Corresponds to 1.28 s. */ +#define BLE_GAP_ADV_TIMEOUT_LIMITED_MAX (18000) /**< Maximum advertising time in 10 ms units corresponding to TGAP(lim_adv_timeout) = 180 s in limited discoverable mode. */ +#define BLE_GAP_ADV_TIMEOUT_GENERAL_UNLIMITED (0) /**< Unlimited advertising in general discoverable mode. + For high duty cycle advertising, this corresponds to @ref BLE_GAP_ADV_TIMEOUT_HIGH_DUTY_MAX. */ +/**@} */ + + +/**@defgroup BLE_GAP_DISC_MODES GAP Discovery modes + * @{ */ +#define BLE_GAP_DISC_MODE_NOT_DISCOVERABLE 0x00 /**< Not discoverable discovery Mode. */ +#define BLE_GAP_DISC_MODE_LIMITED 0x01 /**< Limited Discovery Mode. */ +#define BLE_GAP_DISC_MODE_GENERAL 0x02 /**< General Discovery Mode. */ +/**@} */ + + +/**@defgroup BLE_GAP_IO_CAPS GAP IO Capabilities + * @{ */ +#define BLE_GAP_IO_CAPS_DISPLAY_ONLY 0x00 /**< Display Only. */ +#define BLE_GAP_IO_CAPS_DISPLAY_YESNO 0x01 /**< Display and Yes/No entry. */ +#define BLE_GAP_IO_CAPS_KEYBOARD_ONLY 0x02 /**< Keyboard Only. */ +#define BLE_GAP_IO_CAPS_NONE 0x03 /**< No I/O capabilities. */ +#define BLE_GAP_IO_CAPS_KEYBOARD_DISPLAY 0x04 /**< Keyboard and Display. */ +/**@} */ + + +/**@defgroup BLE_GAP_AUTH_KEY_TYPES GAP Authentication Key Types + * @{ */ +#define BLE_GAP_AUTH_KEY_TYPE_NONE 0x00 /**< No key (may be used to reject). */ +#define BLE_GAP_AUTH_KEY_TYPE_PASSKEY 0x01 /**< 6-digit Passkey. */ +#define BLE_GAP_AUTH_KEY_TYPE_OOB 0x02 /**< Out Of Band data. */ +/**@} */ + + +/**@defgroup BLE_GAP_KP_NOT_TYPES GAP Keypress Notification Types + * @{ */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_START 0x00 /**< Passkey entry started. */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_DIGIT_IN 0x01 /**< Passkey digit entered. */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_DIGIT_OUT 0x02 /**< Passkey digit erased. */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_CLEAR 0x03 /**< Passkey cleared. */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_END 0x04 /**< Passkey entry completed. */ +/**@} */ + + +/**@defgroup BLE_GAP_SEC_STATUS GAP Security status + * @{ */ +#define BLE_GAP_SEC_STATUS_SUCCESS 0x00 /**< Procedure completed with success. */ +#define BLE_GAP_SEC_STATUS_TIMEOUT 0x01 /**< Procedure timed out. */ +#define BLE_GAP_SEC_STATUS_PDU_INVALID 0x02 /**< Invalid PDU received. */ +#define BLE_GAP_SEC_STATUS_RFU_RANGE1_BEGIN 0x03 /**< Reserved for Future Use range #1 begin. */ +#define BLE_GAP_SEC_STATUS_RFU_RANGE1_END 0x80 /**< Reserved for Future Use range #1 end. */ +#define BLE_GAP_SEC_STATUS_PASSKEY_ENTRY_FAILED 0x81 /**< Passkey entry failed (user canceled or other). */ +#define BLE_GAP_SEC_STATUS_OOB_NOT_AVAILABLE 0x82 /**< Out of Band Key not available. */ +#define BLE_GAP_SEC_STATUS_AUTH_REQ 0x83 /**< Authentication requirements not met. */ +#define BLE_GAP_SEC_STATUS_CONFIRM_VALUE 0x84 /**< Confirm value failed. */ +#define BLE_GAP_SEC_STATUS_PAIRING_NOT_SUPP 0x85 /**< Pairing not supported. */ +#define BLE_GAP_SEC_STATUS_ENC_KEY_SIZE 0x86 /**< Encryption key size. */ +#define BLE_GAP_SEC_STATUS_SMP_CMD_UNSUPPORTED 0x87 /**< Unsupported SMP command. */ +#define BLE_GAP_SEC_STATUS_UNSPECIFIED 0x88 /**< Unspecified reason. */ +#define BLE_GAP_SEC_STATUS_REPEATED_ATTEMPTS 0x89 /**< Too little time elapsed since last attempt. */ +#define BLE_GAP_SEC_STATUS_INVALID_PARAMS 0x8A /**< Invalid parameters. */ +#define BLE_GAP_SEC_STATUS_DHKEY_FAILURE 0x8B /**< DHKey check failure. */ +#define BLE_GAP_SEC_STATUS_NUM_COMP_FAILURE 0x8C /**< Numeric Comparison failure. */ +#define BLE_GAP_SEC_STATUS_BR_EDR_IN_PROG 0x8D /**< BR/EDR pairing in progress. */ +#define BLE_GAP_SEC_STATUS_X_TRANS_KEY_DISALLOWED 0x8E /**< BR/EDR Link Key cannot be used for LE keys. */ +#define BLE_GAP_SEC_STATUS_RFU_RANGE2_BEGIN 0x8F /**< Reserved for Future Use range #2 begin. */ +#define BLE_GAP_SEC_STATUS_RFU_RANGE2_END 0xFF /**< Reserved for Future Use range #2 end. */ +/**@} */ + + +/**@defgroup BLE_GAP_SEC_STATUS_SOURCES GAP Security status sources + * @{ */ +#define BLE_GAP_SEC_STATUS_SOURCE_LOCAL 0x00 /**< Local failure. */ +#define BLE_GAP_SEC_STATUS_SOURCE_REMOTE 0x01 /**< Remote failure. */ +/**@} */ + + +/**@defgroup BLE_GAP_CP_LIMITS GAP Connection Parameters Limits + * @{ */ +#define BLE_GAP_CP_MIN_CONN_INTVL_NONE 0xFFFF /**< No new minimum connection interval specified in connect parameters. */ +#define BLE_GAP_CP_MIN_CONN_INTVL_MIN 0x0006 /**< Lowest minimum connection interval permitted, in units of 1.25 ms, i.e. 7.5 ms. */ +#define BLE_GAP_CP_MIN_CONN_INTVL_MAX 0x0C80 /**< Highest minimum connection interval permitted, in units of 1.25 ms, i.e. 4 s. */ +#define BLE_GAP_CP_MAX_CONN_INTVL_NONE 0xFFFF /**< No new maximum connection interval specified in connect parameters. */ +#define BLE_GAP_CP_MAX_CONN_INTVL_MIN 0x0006 /**< Lowest maximum connection interval permitted, in units of 1.25 ms, i.e. 7.5 ms. */ +#define BLE_GAP_CP_MAX_CONN_INTVL_MAX 0x0C80 /**< Highest maximum connection interval permitted, in units of 1.25 ms, i.e. 4 s. */ +#define BLE_GAP_CP_SLAVE_LATENCY_MAX 0x01F3 /**< Highest slave latency permitted, in connection events. */ +#define BLE_GAP_CP_CONN_SUP_TIMEOUT_NONE 0xFFFF /**< No new supervision timeout specified in connect parameters. */ +#define BLE_GAP_CP_CONN_SUP_TIMEOUT_MIN 0x000A /**< Lowest supervision timeout permitted, in units of 10 ms, i.e. 100 ms. */ +#define BLE_GAP_CP_CONN_SUP_TIMEOUT_MAX 0x0C80 /**< Highest supervision timeout permitted, in units of 10 ms, i.e. 32 s. */ +/**@} */ + + +/**@defgroup BLE_GAP_DEVNAME GAP device name defines. + * @{ */ +#define BLE_GAP_DEVNAME_DEFAULT "nRF5x" /**< Default device name value. */ +#define BLE_GAP_DEVNAME_DEFAULT_LEN 31 /**< Default number of octets in device name. */ +#define BLE_GAP_DEVNAME_MAX_LEN 248 /**< Maximum number of octets in device name. */ +/**@} */ + + +/**@brief Disable RSSI events for connections */ +#define BLE_GAP_RSSI_THRESHOLD_INVALID 0xFF + +/**@defgroup BLE_GAP_PHYS GAP PHYs + * @{ */ +#define BLE_GAP_PHY_AUTO 0x00 /**< Automatic PHY selection. Refer @ref sd_ble_gap_phy_update for more information.*/ +#define BLE_GAP_PHY_1MBPS 0x01 /**< 1 Mbps PHY. */ +#define BLE_GAP_PHY_2MBPS 0x02 /**< 2 Mbps PHY. */ +#define BLE_GAP_PHY_CODED 0x04 /**< Coded PHY. */ +#define BLE_GAP_PHY_NOT_SET 0xFF /**< PHY is not configured. */ + +/**@brief Supported PHYs in connections and for advertising. */ +#define BLE_GAP_PHYS_SUPPORTED (BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS) /**< All PHYs except @ref BLE_GAP_PHY_CODED are supported. */ + +/**@} */ + +/**@defgroup BLE_GAP_CONN_SEC_MODE_SET_MACROS GAP attribute security requirement setters + * + * See @ref ble_gap_conn_sec_mode_t. + * @{ */ +/**@brief Set sec_mode pointed to by ptr to have no access rights.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_NO_ACCESS(ptr) do {(ptr)->sm = 0; (ptr)->lv = 0;} while(0) +/**@brief Set sec_mode pointed to by ptr to require no protection, open link.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_OPEN(ptr) do {(ptr)->sm = 1; (ptr)->lv = 1;} while(0) +/**@brief Set sec_mode pointed to by ptr to require encryption, but no MITM protection.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_ENC_NO_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 2;} while(0) +/**@brief Set sec_mode pointed to by ptr to require encryption and MITM protection.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_ENC_WITH_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 3;} while(0) +/**@brief Set sec_mode pointed to by ptr to require LESC encryption and MITM protection.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_LESC_ENC_WITH_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 4;} while(0) +/**@brief Set sec_mode pointed to by ptr to require signing or encryption, no MITM protection needed.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_SIGNED_NO_MITM(ptr) do {(ptr)->sm = 2; (ptr)->lv = 1;} while(0) +/**@brief Set sec_mode pointed to by ptr to require signing or encryption with MITM protection.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_SIGNED_WITH_MITM(ptr) do {(ptr)->sm = 2; (ptr)->lv = 2;} while(0) +/**@} */ + + +/**@brief GAP Security Random Number Length. */ +#define BLE_GAP_SEC_RAND_LEN 8 + + +/**@brief GAP Security Key Length. */ +#define BLE_GAP_SEC_KEY_LEN 16 + + +/**@brief GAP LE Secure Connections Elliptic Curve Diffie-Hellman P-256 Public Key Length. */ +#define BLE_GAP_LESC_P256_PK_LEN 64 + + +/**@brief GAP LE Secure Connections Elliptic Curve Diffie-Hellman DHKey Length. */ +#define BLE_GAP_LESC_DHKEY_LEN 32 + + +/**@brief GAP Passkey Length. */ +#define BLE_GAP_PASSKEY_LEN 6 + + +/**@brief Maximum amount of addresses in the whitelist. */ +#define BLE_GAP_WHITELIST_ADDR_MAX_COUNT (8) + + +/**@brief Maximum amount of identities in the device identities list. */ +#define BLE_GAP_DEVICE_IDENTITIES_MAX_COUNT (8) + + +/**@brief Default connection count for a configuration. */ +#define BLE_GAP_CONN_COUNT_DEFAULT (1) + + +/**@defgroup BLE_GAP_EVENT_LENGTH GAP event length defines. + * @{ */ +#define BLE_GAP_EVENT_LENGTH_MIN (2) /**< Minimum event length, in 1.25 ms units. */ +#define BLE_GAP_EVENT_LENGTH_DEFAULT (3) /**< Default event length, in 1.25 ms units. */ +/**@} */ + + +/**@defgroup BLE_GAP_ROLE_COUNT GAP concurrent connection count defines. + * @{ */ +#define BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT (1) /**< Default maximum number of connections concurrently acting as peripherals. */ +#define BLE_GAP_ROLE_COUNT_COMBINED_MAX (20) /**< Maximum supported number of concurrent connections in the peripheral roles. */ + +/**@} */ + + +/**@defgroup BLE_GAP_AUTH_PAYLOAD_TIMEOUT Authenticated payload timeout defines. + * @{ */ +#define BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MAX (48000) /**< Maximum authenticated payload timeout in 10 ms units, i.e. 8 minutes. */ +#define BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MIN (1) /**< Minimum authenticated payload timeout in 10 ms units, i.e. 10 ms. */ +/**@} */ + +/**@defgroup GAP_SEC_MODES GAP Security Modes + * @{ */ +#define BLE_GAP_SEC_MODE 0x00 /**< No key (may be used to reject). */ +/**@} */ + +/** @} */ + + +/**@addtogroup BLE_GAP_STRUCTURES Structures + * @{ */ + +/**@brief Advertising event properties. */ +typedef struct +{ + uint8_t type; /**< Advertising type. See @ref BLE_GAP_ADV_TYPES. */ + uint8_t anonymous : 1; /**< This feature is not supported on this SoftDevice. */ + uint8_t include_tx_power : 1; /**< This feature is not supported on this SoftDevice. */ +} ble_gap_adv_properties_t; + + + +/**@brief Bluetooth Low Energy address. */ +typedef struct +{ + uint8_t addr_id_peer : 1; /**< Only valid for peer addresses. + Reference to peer in device identities list (as set with @ref sd_ble_gap_device_identities_set) when peer is using privacy. */ + uint8_t addr_type : 7; /**< See @ref BLE_GAP_ADDR_TYPES. */ + uint8_t addr[BLE_GAP_ADDR_LEN]; /**< 48-bit address, LSB format. */ +} ble_gap_addr_t; + + +/**@brief GAP connection parameters. + * + * @note When ble_conn_params_t is received in an event, both min_conn_interval and + * max_conn_interval will be equal to the connection interval set by the central. + * + * @note If both conn_sup_timeout and max_conn_interval are specified, then the following constraint applies: + * conn_sup_timeout * 4 > (1 + slave_latency) * max_conn_interval + * that corresponds to the following Bluetooth Spec requirement: + * The Supervision_Timeout in milliseconds shall be larger than + * (1 + Conn_Latency) * Conn_Interval_Max * 2, where Conn_Interval_Max is given in milliseconds. + */ +typedef struct +{ + uint16_t min_conn_interval; /**< Minimum Connection Interval in 1.25 ms units, see @ref BLE_GAP_CP_LIMITS.*/ + uint16_t max_conn_interval; /**< Maximum Connection Interval in 1.25 ms units, see @ref BLE_GAP_CP_LIMITS.*/ + uint16_t slave_latency; /**< Slave Latency in number of connection events, see @ref BLE_GAP_CP_LIMITS.*/ + uint16_t conn_sup_timeout; /**< Connection Supervision Timeout in 10 ms units, see @ref BLE_GAP_CP_LIMITS.*/ +} ble_gap_conn_params_t; + + +/**@brief GAP connection security modes. + * + * Security Mode 0 Level 0: No access permissions at all (this level is not defined by the Bluetooth Core specification).\n + * Security Mode 1 Level 1: No security is needed (aka open link).\n + * Security Mode 1 Level 2: Encrypted link required, MITM protection not necessary.\n + * Security Mode 1 Level 3: MITM protected encrypted link required.\n + * Security Mode 1 Level 4: LESC MITM protected encrypted link using a 128-bit strength encryption key required.\n + * Security Mode 2 Level 1: Signing or encryption required, MITM protection not necessary.\n + * Security Mode 2 Level 2: MITM protected signing required, unless link is MITM protected encrypted.\n + */ +typedef struct +{ + uint8_t sm : 4; /**< Security Mode (1 or 2), 0 for no permissions at all. */ + uint8_t lv : 4; /**< Level (1, 2, 3 or 4), 0 for no permissions at all. */ + +} ble_gap_conn_sec_mode_t; + + +/**@brief GAP connection security status.*/ +typedef struct +{ + ble_gap_conn_sec_mode_t sec_mode; /**< Currently active security mode for this connection.*/ + uint8_t encr_key_size; /**< Length of currently active encryption key, 7 to 16 octets (only applicable for bonding procedures). */ +} ble_gap_conn_sec_t; + +/**@brief Identity Resolving Key. */ +typedef struct +{ + uint8_t irk[BLE_GAP_SEC_KEY_LEN]; /**< Array containing IRK. */ +} ble_gap_irk_t; + + +/**@brief Channel mask (40 bits). + * Every channel is represented with a bit positioned as per channel index defined in Bluetooth Core Specification v5.0, + * Vol 6, Part B, Section 1.4.1. The LSB contained in array element 0 represents channel index 0, and bit 39 represents + * channel index 39. If a bit is set to 1, the channel is not used. + */ +typedef uint8_t ble_gap_ch_mask_t[5]; + + +/**@brief GAP advertising parameters. */ +typedef struct +{ + ble_gap_adv_properties_t properties; /**< The properties of the advertising events. */ + ble_gap_addr_t const *p_peer_addr; /**< Address of a known peer. + - When privacy is enabled and the local device uses + @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE addresses, + the device identity list is searched for a matching entry. If + the local IRK for that device identity is set, the local IRK + for that device will be used to generate the advertiser address + field in the advertising packet. + - If @ref ble_gap_adv_properties_t::type is directed, this must be + set to the targeted scanner or initiator. If the peer address is + in the device identity list, the peer IRK for that device will be + used to generate @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE + target addresses used in the advertising event PDUs. */ + uint32_t interval; /**< Advertising interval in 625 us units. @sa BLE_GAP_ADV_INTERVALS. + @note If @ref ble_gap_adv_properties_t::type is set to + @ref BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED_HIGH_DUTY_CYCLE + advertising, this parameter is ignored. */ + uint16_t duration; /**< Advertising duration in 10 ms units. When timeout is reached, + an event of type @ref BLE_GAP_EVT_ADV_SET_TERMINATED is raised. + @sa BLE_GAP_ADV_TIMEOUT_VALUES. */ + uint8_t max_adv_evts; /**< Maximum advertising events that shall be sent prior to disabling + advertising. Setting the value to 0 disables the limitation. When + the count of advertising events specified by this parameter + (if not 0) is reached, advertising will be automatically stopped + and an event of type @ref BLE_GAP_EVT_ADV_SET_TERMINATED is raised + @note If @ref ble_gap_adv_properties_t::type is set to + @ref BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED_HIGH_DUTY_CYCLE, + this parameter is ignored. + @note Setting max_adv_evts to a values not equal to 0 is only supported + as an experimental feature in this SoftDevice. */ + ble_gap_ch_mask_t channel_mask; /**< Channel mask for primary channels. + At least one of the primary channels, that is channel index 37-39, must be used. */ + uint8_t filter_policy; /**< Filter Policy. @sa BLE_GAP_ADV_FILTER_POLICIES. */ + uint8_t primary_phy; /**< Indicates the PHY on which the primary advertising channel packets + are transmitted. If set to @ref BLE_GAP_PHY_AUTO, @ref BLE_GAP_PHY_1MBPS + will be used. + The only supported value by this SoftDevice is @ref BLE_GAP_PHY_1MBPS. */ + uint8_t secondary_phy; /**< This field is ignored on this SoftDevice. */ + uint8_t set_id:4; /**< This field is ignored on this SoftDevice. */ + uint8_t scan_req_notification:1; /**< Enable scan request notifications for this advertising set. When a + scan request is received and the scanner address is allowed + by the filter policy, @ref BLE_GAP_EVT_SCAN_REQ_REPORT is raised. + @note This parameter will be ignored when + @ref ble_gap_adv_properties_t::type is a non-scannable + advertising type. */ +} ble_gap_adv_params_t; + + +/**@brief GAP advertising data buffers. + * + * The application must provide the buffers for advertisement. The memory shall reside in application RAM, and + * shall never be modified while advertising. The data shall be kept alive until either: + * - @ref BLE_GAP_EVT_ADV_SET_TERMINATED is raised. + * - @ref BLE_GAP_EVT_CONNECTED is raised with @ref ble_gap_evt_connected_t::adv_handle set to the corresponding + * advertising handle. + * - Advertising is stopped. + * - Advertising data is changed. + * To update advertising data while advertising, provide new buffers to @ref sd_ble_gap_adv_set_configure. */ +typedef struct +{ + ble_data_t adv_data; /**< Advertising data. + @note + Advertising data can only be specified for a @ref ble_gap_adv_properties_t::type + that is allowed to contain advertising data. */ + ble_data_t scan_rsp_data; /**< Scan response data. + @note + Scan response data can only be specified for a @ref ble_gap_adv_properties_t::type + that is scannable. */ +} ble_gap_adv_data_t; + + +/**@brief Privacy. + * + * The privacy feature provides a way for the device to avoid being tracked over a period of time. + * The privacy feature, when enabled, hides the local device identity and replaces it with a private address + * that is automatically refreshed at a specified interval. + * + * If a device still wants to be recognized by other peers, it needs to share it's Identity Resolving Key (IRK). + * With this key, a device can generate a random private address that can only be recognized by peers in possession of that key, + * and devices can establish connections without revealing their real identities. + * + * Both network privacy (@ref BLE_GAP_PRIVACY_MODE_NETWORK_PRIVACY) and device privacy (@ref BLE_GAP_PRIVACY_MODE_DEVICE_PRIVACY) + * are supported. + * + * @note If the device IRK is updated, the new IRK becomes the one to be distributed in all + * bonding procedures performed after @ref sd_ble_gap_privacy_set returns. + * The IRK distributed during bonding procedure is the device IRK that is active when @ref sd_ble_gap_sec_params_reply is called. + */ +typedef struct +{ + uint8_t privacy_mode; /**< Privacy mode, see @ref BLE_GAP_PRIVACY_MODES. Default is @ref BLE_GAP_PRIVACY_MODE_OFF. */ + uint8_t private_addr_type; /**< The private address type must be either @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE or @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE. */ + uint16_t private_addr_cycle_s; /**< Private address cycle interval in seconds. Providing an address cycle value of 0 will use the default value defined by @ref BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S. */ + ble_gap_irk_t *p_device_irk; /**< When used as input, pointer to IRK structure that will be used as the default IRK. If NULL, the device default IRK will be used. + When used as output, pointer to IRK structure where the current default IRK will be written to. If NULL, this argument is ignored. + By default, the default IRK is used to generate random private resolvable addresses for the local device unless instructed otherwise. */ +} ble_gap_privacy_params_t; + + +/**@brief PHY preferences for TX and RX + * @note tx_phys and rx_phys are bit fields. Multiple bits can be set in them to indicate multiple preferred PHYs for each direction. + * @code + * p_gap_phys->tx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; + * p_gap_phys->rx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; + * @endcode + * + */ +typedef struct +{ + uint8_t tx_phys; /**< Preferred transmit PHYs, see @ref BLE_GAP_PHYS. */ + uint8_t rx_phys; /**< Preferred receive PHYs, see @ref BLE_GAP_PHYS. */ +} ble_gap_phys_t; + +/** @brief Keys that can be exchanged during a bonding procedure. */ +typedef struct +{ + uint8_t enc : 1; /**< Long Term Key and Master Identification. */ + uint8_t id : 1; /**< Identity Resolving Key and Identity Address Information. */ + uint8_t sign : 1; /**< Connection Signature Resolving Key. */ + uint8_t link : 1; /**< Derive the Link Key from the LTK. */ +} ble_gap_sec_kdist_t; + + +/**@brief GAP security parameters. */ +typedef struct +{ + uint8_t bond : 1; /**< Perform bonding. */ + uint8_t mitm : 1; /**< Enable Man In The Middle protection. */ + uint8_t lesc : 1; /**< Enable LE Secure Connection pairing. */ + uint8_t keypress : 1; /**< Enable generation of keypress notifications. */ + uint8_t io_caps : 3; /**< IO capabilities, see @ref BLE_GAP_IO_CAPS. */ + uint8_t oob : 1; /**< The OOB data flag. + - In LE legacy pairing, this flag is set if a device has out of band authentication data. + The OOB method is used if both of the devices have out of band authentication data. + - In LE Secure Connections pairing, this flag is set if a device has the peer device's out of band authentication data. + The OOB method is used if at least one device has the peer device's OOB data available. */ + uint8_t min_key_size; /**< Minimum encryption key size in octets between 7 and 16. If 0 then not applicable in this instance. */ + uint8_t max_key_size; /**< Maximum encryption key size in octets between min_key_size and 16. */ + ble_gap_sec_kdist_t kdist_own; /**< Key distribution bitmap: keys that the local device will distribute. */ + ble_gap_sec_kdist_t kdist_peer; /**< Key distribution bitmap: keys that the remote device will distribute. */ +} ble_gap_sec_params_t; + + +/**@brief GAP Encryption Information. */ +typedef struct +{ + uint8_t ltk[BLE_GAP_SEC_KEY_LEN]; /**< Long Term Key. */ + uint8_t lesc : 1; /**< Key generated using LE Secure Connections. */ + uint8_t auth : 1; /**< Authenticated Key. */ + uint8_t ltk_len : 6; /**< LTK length in octets. */ +} ble_gap_enc_info_t; + + +/**@brief GAP Master Identification. */ +typedef struct +{ + uint16_t ediv; /**< Encrypted Diversifier. */ + uint8_t rand[BLE_GAP_SEC_RAND_LEN]; /**< Random Number. */ +} ble_gap_master_id_t; + + +/**@brief GAP Signing Information. */ +typedef struct +{ + uint8_t csrk[BLE_GAP_SEC_KEY_LEN]; /**< Connection Signature Resolving Key. */ +} ble_gap_sign_info_t; + + +/**@brief GAP LE Secure Connections P-256 Public Key. */ +typedef struct +{ + uint8_t pk[BLE_GAP_LESC_P256_PK_LEN]; /**< LE Secure Connections Elliptic Curve Diffie-Hellman P-256 Public Key. Stored in the standard SMP protocol format: {X,Y} both in little-endian. */ +} ble_gap_lesc_p256_pk_t; + + +/**@brief GAP LE Secure Connections DHKey. */ +typedef struct +{ + uint8_t key[BLE_GAP_LESC_DHKEY_LEN]; /**< LE Secure Connections Elliptic Curve Diffie-Hellman Key. Stored in little-endian. */ +} ble_gap_lesc_dhkey_t; + + +/**@brief GAP LE Secure Connections OOB data. */ +typedef struct +{ + ble_gap_addr_t addr; /**< Bluetooth address of the device. */ + uint8_t r[BLE_GAP_SEC_KEY_LEN]; /**< Random Number. */ + uint8_t c[BLE_GAP_SEC_KEY_LEN]; /**< Confirm Value. */ +} ble_gap_lesc_oob_data_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_CONNECTED. */ +typedef struct +{ + ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 + and the address is the device's identity address. */ + uint8_t role; /**< BLE role for this connection, see @ref BLE_GAP_ROLES */ + ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ + uint8_t adv_handle; /**< Advertising handle in which advertising has ended. + This variable is only set if role is set to @ref BLE_GAP_ROLE_PERIPH. */ + ble_gap_adv_data_t adv_data; /**< Advertising buffers corresponding to the terminated + advertising set. The advertising buffers provided in + @ref sd_ble_gap_adv_set_configure are now released. + This variable is only set if role is set to @ref BLE_GAP_ROLE_PERIPH. */ +} ble_gap_evt_connected_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_DISCONNECTED. */ +typedef struct +{ + uint8_t reason; /**< HCI error code, see @ref BLE_HCI_STATUS_CODES. */ +} ble_gap_evt_disconnected_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_CONN_PARAM_UPDATE. */ +typedef struct +{ + ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ +} ble_gap_evt_conn_param_update_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_PHY_UPDATE_REQUEST. */ +typedef struct +{ + ble_gap_phys_t peer_preferred_phys; /**< The PHYs the peer prefers to use. */ +} ble_gap_evt_phy_update_request_t; + +/**@brief Event Structure for @ref BLE_GAP_EVT_PHY_UPDATE. */ +typedef struct +{ + uint8_t status; /**< Status of the procedure, see @ref BLE_HCI_STATUS_CODES.*/ + uint8_t tx_phy; /**< TX PHY for this connection, see @ref BLE_GAP_PHYS. */ + uint8_t rx_phy; /**< RX PHY for this connection, see @ref BLE_GAP_PHYS. */ +} ble_gap_evt_phy_update_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST. */ +typedef struct +{ + ble_gap_sec_params_t peer_params; /**< Initiator Security Parameters. */ +} ble_gap_evt_sec_params_request_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_SEC_INFO_REQUEST. */ +typedef struct +{ + ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. */ + ble_gap_master_id_t master_id; /**< Master Identification for LTK lookup. */ + uint8_t enc_info : 1; /**< If 1, Encryption Information required. */ + uint8_t id_info : 1; /**< If 1, Identity Information required. */ + uint8_t sign_info : 1; /**< If 1, Signing Information required. */ +} ble_gap_evt_sec_info_request_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_PASSKEY_DISPLAY. */ +typedef struct +{ + uint8_t passkey[BLE_GAP_PASSKEY_LEN]; /**< 6-digit passkey in ASCII ('0'-'9' digits only). */ + uint8_t match_request : 1; /**< If 1 requires the application to report the match using @ref sd_ble_gap_auth_key_reply + with either @ref BLE_GAP_AUTH_KEY_TYPE_NONE if there is no match or + @ref BLE_GAP_AUTH_KEY_TYPE_PASSKEY if there is a match. */ +} ble_gap_evt_passkey_display_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_KEY_PRESSED. */ +typedef struct +{ + uint8_t kp_not; /**< Keypress notification type, see @ref BLE_GAP_KP_NOT_TYPES. */ +} ble_gap_evt_key_pressed_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_AUTH_KEY_REQUEST. */ +typedef struct +{ + uint8_t key_type; /**< See @ref BLE_GAP_AUTH_KEY_TYPES. */ +} ble_gap_evt_auth_key_request_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST. */ +typedef struct +{ + ble_gap_lesc_p256_pk_t *p_pk_peer; /**< LE Secure Connections remote P-256 Public Key. This will point to the application-supplied memory + inside the keyset during the call to @ref sd_ble_gap_sec_params_reply. */ + uint8_t oobd_req :1; /**< LESC OOB data required. A call to @ref sd_ble_gap_lesc_oob_data_set is required to complete the procedure. */ +} ble_gap_evt_lesc_dhkey_request_t; + + +/**@brief Security levels supported. + * @note See Bluetooth Specification Version 4.2 Volume 3, Part C, Chapter 10, Section 10.2.1. +*/ +typedef struct +{ + uint8_t lv1 : 1; /**< If 1: Level 1 is supported. */ + uint8_t lv2 : 1; /**< If 1: Level 2 is supported. */ + uint8_t lv3 : 1; /**< If 1: Level 3 is supported. */ + uint8_t lv4 : 1; /**< If 1: Level 4 is supported. */ +} ble_gap_sec_levels_t; + + +/**@brief Encryption Key. */ +typedef struct +{ + ble_gap_enc_info_t enc_info; /**< Encryption Information. */ + ble_gap_master_id_t master_id; /**< Master Identification. */ +} ble_gap_enc_key_t; + + +/**@brief Identity Key. */ +typedef struct +{ + ble_gap_irk_t id_info; /**< Identity Resolving Key. */ + ble_gap_addr_t id_addr_info; /**< Identity Address. */ +} ble_gap_id_key_t; + + +/**@brief Security Keys. */ +typedef struct +{ + ble_gap_enc_key_t *p_enc_key; /**< Encryption Key, or NULL. */ + ble_gap_id_key_t *p_id_key; /**< Identity Key, or NULL. */ + ble_gap_sign_info_t *p_sign_key; /**< Signing Key, or NULL. */ + ble_gap_lesc_p256_pk_t *p_pk; /**< LE Secure Connections P-256 Public Key. When in debug mode the application must use the value defined + in the Core Bluetooth Specification v4.2 Vol.3, Part H, Section 2.3.5.6.1 */ +} ble_gap_sec_keys_t; + + +/**@brief Security key set for both local and peer keys. */ +typedef struct +{ + ble_gap_sec_keys_t keys_own; /**< Keys distributed by the local device. For LE Secure Connections the encryption key will be generated locally and will always be stored if bonding. */ + ble_gap_sec_keys_t keys_peer; /**< Keys distributed by the remote device. For LE Secure Connections, p_enc_key must always be NULL. */ +} ble_gap_sec_keyset_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_AUTH_STATUS. */ +typedef struct +{ + uint8_t auth_status; /**< Authentication status, see @ref BLE_GAP_SEC_STATUS. */ + uint8_t error_src : 2; /**< On error, source that caused the failure, see @ref BLE_GAP_SEC_STATUS_SOURCES. */ + uint8_t bonded : 1; /**< Procedure resulted in a bond. */ + uint8_t lesc : 1; /**< Procedure resulted in a LE Secure Connection. */ + ble_gap_sec_levels_t sm1_levels; /**< Levels supported in Security Mode 1. */ + ble_gap_sec_levels_t sm2_levels; /**< Levels supported in Security Mode 2. */ + ble_gap_sec_kdist_t kdist_own; /**< Bitmap stating which keys were exchanged (distributed) by the local device. If bonding with LE Secure Connections, the enc bit will be always set. */ + ble_gap_sec_kdist_t kdist_peer; /**< Bitmap stating which keys were exchanged (distributed) by the remote device. If bonding with LE Secure Connections, the enc bit will never be set. */ +} ble_gap_evt_auth_status_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_CONN_SEC_UPDATE. */ +typedef struct +{ + ble_gap_conn_sec_t conn_sec; /**< Connection security level. */ +} ble_gap_evt_conn_sec_update_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_TIMEOUT. */ +typedef struct +{ + uint8_t src; /**< Source of timeout event, see @ref BLE_GAP_TIMEOUT_SOURCES. */ +} ble_gap_evt_timeout_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_RSSI_CHANGED. */ +typedef struct +{ + int8_t rssi; /**< Received Signal Strength Indication in dBm. */ + uint8_t ch_index; /**< Data Channel Index on which the Signal Strength is measured (0-36). */ +} ble_gap_evt_rssi_changed_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_ADV_SET_TERMINATED */ +typedef struct +{ + uint8_t reason; /**< Reason for why the advertising set terminated. See + @ref BLE_GAP_EVT_ADV_SET_TERMINATED_REASON. */ + uint8_t adv_handle; /**< Advertising handle in which advertising has ended. */ + uint8_t num_completed_adv_events; /**< If @ref ble_gap_adv_params_t::max_adv_evts was not set to 0, + this field indicates the number of completed advertising events. */ + ble_gap_adv_data_t adv_data; /**< Advertising buffers corresponding to the terminated + advertising set. The advertising buffers provided in + @ref sd_ble_gap_adv_set_configure are now released. */ +} ble_gap_evt_adv_set_terminated_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_SEC_REQUEST. */ +typedef struct +{ + uint8_t bond : 1; /**< Perform bonding. */ + uint8_t mitm : 1; /**< Man In The Middle protection requested. */ + uint8_t lesc : 1; /**< LE Secure Connections requested. */ + uint8_t keypress : 1; /**< Generation of keypress notifications requested. */ +} ble_gap_evt_sec_request_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_SCAN_REQ_REPORT. */ +typedef struct +{ + uint8_t adv_handle; /**< Advertising handle for the advertising set which received the Scan Request */ + int8_t rssi; /**< Received Signal Strength Indication in dBm. */ + ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 + and the address is the device's identity address. */ +} ble_gap_evt_scan_req_report_t; + + + +/**@brief GAP event structure. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which event occurred. */ + union /**< union alternative identified by evt_id in enclosing struct. */ + { + ble_gap_evt_connected_t connected; /**< Connected Event Parameters. */ + ble_gap_evt_disconnected_t disconnected; /**< Disconnected Event Parameters. */ + ble_gap_evt_conn_param_update_t conn_param_update; /**< Connection Parameter Update Parameters. */ + ble_gap_evt_sec_params_request_t sec_params_request; /**< Security Parameters Request Event Parameters. */ + ble_gap_evt_sec_info_request_t sec_info_request; /**< Security Information Request Event Parameters. */ + ble_gap_evt_passkey_display_t passkey_display; /**< Passkey Display Event Parameters. */ + ble_gap_evt_key_pressed_t key_pressed; /**< Key Pressed Event Parameters. */ + ble_gap_evt_auth_key_request_t auth_key_request; /**< Authentication Key Request Event Parameters. */ + ble_gap_evt_lesc_dhkey_request_t lesc_dhkey_request; /**< LE Secure Connections DHKey calculation request. */ + ble_gap_evt_auth_status_t auth_status; /**< Authentication Status Event Parameters. */ + ble_gap_evt_conn_sec_update_t conn_sec_update; /**< Connection Security Update Event Parameters. */ + ble_gap_evt_timeout_t timeout; /**< Timeout Event Parameters. */ + ble_gap_evt_rssi_changed_t rssi_changed; /**< RSSI Event Parameters. */ + ble_gap_evt_adv_set_terminated_t adv_set_terminated; /**< Advertising Set Terminated Event Parameters. */ + ble_gap_evt_sec_request_t sec_request; /**< Security Request Event Parameters. */ + ble_gap_evt_scan_req_report_t scan_req_report; /**< Scan Request Report Parameters. */ + ble_gap_evt_phy_update_request_t phy_update_request; /**< PHY Update Request Event Parameters. */ + ble_gap_evt_phy_update_t phy_update; /**< PHY Update Parameters. */ + } params; /**< Event Parameters. */ +} ble_gap_evt_t; + + +/** + * @brief BLE GAP connection configuration parameters, set with @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_CONN_COUNT The connection count for the connection configurations is zero. + * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: + * - The sum of conn_count for all connection configurations combined exceeds UINT8_MAX. + * - The event length is smaller than @ref BLE_GAP_EVENT_LENGTH_MIN. + */ +typedef struct +{ + uint8_t conn_count; /**< The number of concurrent connections the application can create with this configuration. + The default and minimum value is @ref BLE_GAP_CONN_COUNT_DEFAULT. */ + uint16_t event_length; /**< The time set aside for this connection on every connection interval in 1.25 ms units. + The default value is @ref BLE_GAP_EVENT_LENGTH_DEFAULT, the minimum value is @ref BLE_GAP_EVENT_LENGTH_MIN. + The event length and the connection interval are the primary parameters + for setting the throughput of a connection. + See the SoftDevice Specification for details on throughput. */ +} ble_gap_conn_cfg_t; + + +/** + * @brief Configuration of maximum concurrent connections in the peripheral role, set with + * @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_CONN_COUNT The periph_role_count is too large. The maximum + * supported sum of concurrent connections is + * @ref BLE_GAP_ROLE_COUNT_COMBINED_MAX. + * @retval ::NRF_ERROR_RESOURCES The adv_set_count is too large. The maximum + * supported advertising handles is + * @ref BLE_GAP_ADV_SET_COUNT_MAX. + */ +typedef struct +{ + uint8_t adv_set_count; /**< Maximum number of advertising sets. Default value is @ref BLE_GAP_ADV_SET_COUNT_DEFAULT. */ + uint8_t periph_role_count; /**< Maximum number of connections concurrently acting as a peripheral. Default value is @ref BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT. */ +} ble_gap_cfg_role_count_t; + + +/** + * @brief Device name and its properties, set with @ref sd_ble_cfg_set. + * + * @note If the device name is not configured, the default device name will be + * @ref BLE_GAP_DEVNAME_DEFAULT, the maximum device name length will be + * @ref BLE_GAP_DEVNAME_DEFAULT_LEN, vloc will be set to @ref BLE_GATTS_VLOC_STACK and the device name + * will have no write access. + * + * @note If @ref max_len is more than @ref BLE_GAP_DEVNAME_DEFAULT_LEN and vloc is set to @ref BLE_GATTS_VLOC_STACK, + * the attribute table size must be increased to have room for the longer device name (see + * @ref sd_ble_cfg_set and @ref ble_gatts_cfg_attr_tab_size_t). + * + * @note If vloc is @ref BLE_GATTS_VLOC_STACK : + * - p_value must point to non-volatile memory (flash) or be NULL. + * - If p_value is NULL, the device name will initially be empty. + * + * @note If vloc is @ref BLE_GATTS_VLOC_USER : + * - p_value cannot be NULL. + * - If the device name is writable, p_value must point to volatile memory (RAM). + * + * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: + * - Invalid device name location (vloc). + * - Invalid device name security mode. + * @retval ::NRF_ERROR_INVALID_LENGTH One or more of the following is true: + * - The device name length is invalid (must be between 0 and @ref BLE_GAP_DEVNAME_MAX_LEN). + * - The device name length is too long for the given Attribute Table. + * @retval ::NRF_ERROR_NOT_SUPPORTED Device name security mode is not supported. + */ +typedef struct +{ + ble_gap_conn_sec_mode_t write_perm; /**< Write permissions. */ + uint8_t vloc:2; /**< Value location, see @ref BLE_GATTS_VLOCS.*/ + uint8_t *p_value; /**< Pointer to where the value (device name) is stored or will be stored. */ + uint16_t current_len; /**< Current length in bytes of the memory pointed to by p_value.*/ + uint16_t max_len; /**< Maximum length in bytes of the memory pointed to by p_value.*/ +} ble_gap_cfg_device_name_t; + + +/**@brief Configuration structure for GAP configurations. */ +typedef union +{ + ble_gap_cfg_role_count_t role_count_cfg; /**< Role count configuration, cfg_id is @ref BLE_GAP_CFG_ROLE_COUNT. */ + ble_gap_cfg_device_name_t device_name_cfg; /**< Device name configuration, cfg_id is @ref BLE_GAP_CFG_DEVICE_NAME. */ +} ble_gap_cfg_t; + + +/**@brief Channel Map option. + * + * @details Used with @ref sd_ble_opt_get to get the current channel map + * or @ref sd_ble_opt_set to set a new channel map. When setting the + * channel map, it applies to all current and future connections. When getting the + * current channel map, it applies to a single connection and the connection handle + * must be supplied. + * + * @note Setting the channel map may take some time, depending on connection parameters. + * The time taken may be different for each connection and the get operation will + * return the previous channel map until the new one has taken effect. + * + * @note After setting the channel map, by spec it can not be set again until at least 1 s has passed. + * See Bluetooth Specification Version 4.1 Volume 2, Part E, Section 7.3.46. + * + * @retval ::NRF_SUCCESS Get or set successful. + * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: + * - Less then two bits in @ref ch_map are set. + * - Bits for primary advertising channels (37-39) are set. + * @retval ::NRF_ERROR_BUSY Channel map was set again before enough time had passed. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied for get. + * @retval ::NRF_ERROR_NOT_SUPPORTED Returned by @ref sd_ble_opt_set in peripheral-only SoftDevices. + * + */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle (only applicable for get) */ + uint8_t ch_map[5]; /**< Channel Map (37-bit). */ +} ble_gap_opt_ch_map_t; + + +/**@brief Local connection latency option. + * + * @details Local connection latency is a feature which enables the slave to improve + * current consumption by ignoring the slave latency set by the peer. The + * local connection latency can only be set to a multiple of the slave latency, + * and cannot be longer than half of the supervision timeout. + * + * @details Used with @ref sd_ble_opt_set to set the local connection latency. The + * @ref sd_ble_opt_get is not supported for this option, but the actual + * local connection latency (unless set to NULL) is set as a return parameter + * when setting the option. + * + * @note The latency set will be truncated down to the closest slave latency event + * multiple, or the nearest multiple before half of the supervision timeout. + * + * @note The local connection latency is disabled by default, and needs to be enabled for new + * connections and whenever the connection is updated. + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_NOT_SUPPORTED Get is not supported. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. + */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle */ + uint16_t requested_latency; /**< Requested local connection latency. */ + uint16_t * p_actual_latency; /**< Pointer to storage for the actual local connection latency (can be set to NULL to skip return value). */ +} ble_gap_opt_local_conn_latency_t; + +/**@brief Disable slave latency + * + * @details Used with @ref sd_ble_opt_set to temporarily disable slave latency of a peripheral connection + * (see @ref ble_gap_conn_params_t::slave_latency). And to re-enable it again. When disabled, the + * peripheral will ignore the slave_latency set by the central. + * + * @note Shall only be called on peripheral links. + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_NOT_SUPPORTED Get is not supported. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. + */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle */ + uint8_t disable : 1; /**< Set to 1 to disable slave latency. Set to 0 enable it again.*/ +} ble_gap_opt_slave_latency_disable_t; + +/**@brief Passkey Option. + * + * @details Structure containing the passkey to be used during pairing. This can be used with @ref + * sd_ble_opt_set to make the SoftDevice use a preprogrammed passkey for authentication + * instead of generating a random one. + * + * @note Repeated pairing attempts using the same preprogrammed passkey makes pairing vulnerable to MITM attacks. + * + * @note @ref sd_ble_opt_get is not supported for this option. + * + */ +typedef struct +{ + uint8_t const * p_passkey; /**< Pointer to 6-digit ASCII string (digit 0..9 only, no NULL termination) passkey to be used during pairing. If this is NULL, the SoftDevice will generate a random passkey if required.*/ +} ble_gap_opt_passkey_t; + + +/**@brief Authenticated payload timeout option. + * + * @details This can be used with @ref sd_ble_opt_set to change the Authenticated payload timeout to a value other + * than the default of @ref BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MAX. + * + * @note The authenticated payload timeout event ::BLE_GAP_TIMEOUT_SRC_AUTH_PAYLOAD will be generated + * if auth_payload_timeout time has elapsed without receiving a packet with a valid MIC on an encrypted + * link. + * + * @note The LE ping procedure will be initiated before the timer expires to give the peer a chance + * to reset the timer. In addition the stack will try to prioritize running of LE ping over other + * activities to increase chances of finishing LE ping before timer expires. To avoid side-effects + * on other activities, it is recommended to use high timeout values. + * Recommended timeout > 2*(connInterval * (6 + connSlaveLatency)). + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. auth_payload_timeout was outside of allowed range. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. + */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle */ + uint16_t auth_payload_timeout; /**< Requested timeout in 10 ms unit, see @ref BLE_GAP_AUTH_PAYLOAD_TIMEOUT. */ +} ble_gap_opt_auth_payload_timeout_t; + +/**@brief Option structure for GAP options. */ +typedef union +{ + ble_gap_opt_ch_map_t ch_map; /**< Parameters for the Channel Map option. */ + ble_gap_opt_local_conn_latency_t local_conn_latency; /**< Parameters for the Local connection latency option */ + ble_gap_opt_passkey_t passkey; /**< Parameters for the Passkey option.*/ + ble_gap_opt_auth_payload_timeout_t auth_payload_timeout; /**< Parameters for the authenticated payload timeout option.*/ + ble_gap_opt_slave_latency_disable_t slave_latency_disable; /**< Parameters for the Disable slave latency option */ +} ble_gap_opt_t; +/**@} */ + + +/**@addtogroup BLE_GAP_FUNCTIONS Functions + * @{ */ + +/**@brief Set the local Bluetooth identity address. + * + * The local Bluetooth identity address is the address that identifies this device to other peers. + * The address type must be either @ref BLE_GAP_ADDR_TYPE_PUBLIC or @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC. + * + * @note The identity address cannot be changed while advertising. + * + * @note This address will be distributed to the peer during bonding. + * If the address changes, the address stored in the peer device will not be valid and the ability to + * reconnect using the old address will be lost. + * + * @note By default the SoftDevice will set an address of type @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC upon being + * enabled. The address is a random number populated during the IC manufacturing process and remains unchanged + * for the lifetime of each IC. + * + * @mscs + * @mmsc{@ref BLE_GAP_ADV_MSC} + * @endmscs + * + * @param[in] p_addr Pointer to address structure. + * + * @retval ::NRF_SUCCESS Address successfully set. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::NRF_ERROR_INVALID_STATE The identity address cannot be changed while advertising. + */ +SVCALL(SD_BLE_GAP_ADDR_SET, uint32_t, sd_ble_gap_addr_set(ble_gap_addr_t const *p_addr)); + + +/**@brief Get local Bluetooth identity address. + * + * @note This will always return the identity address irrespective of the privacy settings, + * i.e. the address type will always be either @ref BLE_GAP_ADDR_TYPE_PUBLIC or @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC. + * + * @param[out] p_addr Pointer to address structure to be filled in. + * + * @retval ::NRF_SUCCESS Address successfully retrieved. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. + */ +SVCALL(SD_BLE_GAP_ADDR_GET, uint32_t, sd_ble_gap_addr_get(ble_gap_addr_t *p_addr)); + + +/**@brief Set the active whitelist in the SoftDevice. + * + * @note Only one whitelist can be used at a time and the whitelist is shared between the BLE roles. + * The whitelist cannot be set if a BLE role is using the whitelist. + * + * @note If an address is resolved using the information in the device identity list, then the whitelist + * filter policy applies to the peer identity address and not the resolvable address sent on air. + * + * @param[in] pp_wl_addrs Pointer to a whitelist of peer addresses, if NULL the whitelist will be cleared. + * @param[in] len Length of the whitelist, maximum @ref BLE_GAP_WHITELIST_ADDR_MAX_COUNT. + * + * @retval ::NRF_SUCCESS The whitelist is successfully set/cleared. + * @retval ::NRF_ERROR_INVALID_ADDR The whitelist (or one of its entries) provided is invalid. + * @retval ::BLE_ERROR_GAP_WHITELIST_IN_USE The whitelist is in use by a BLE role and cannot be set or cleared. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. + * @retval ::NRF_ERROR_DATA_SIZE The given whitelist size is invalid (zero or too large); this can only return when + * pp_wl_addrs is not NULL. + */ +SVCALL(SD_BLE_GAP_WHITELIST_SET, uint32_t, sd_ble_gap_whitelist_set(ble_gap_addr_t const * const * pp_wl_addrs, uint8_t len)); + + +/**@brief Set device identity list. + * + * @note Only one device identity list can be used at a time and the list is shared between the BLE roles. + * The device identity list cannot be set if a BLE role is using the list. + * + * @param[in] pp_id_keys Pointer to an array of peer identity addresses and peer IRKs, if NULL the device identity list will be cleared. + * @param[in] pp_local_irks Pointer to an array of local IRKs. Each entry in the array maps to the entry in pp_id_keys at the same index. + * To fill in the list with the currently set device IRK for all peers, set to NULL. + * @param[in] len Length of the device identity list, maximum @ref BLE_GAP_DEVICE_IDENTITIES_MAX_COUNT. + * + * @mscs + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_CONN_PRIV_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS The device identity list successfully set/cleared. + * @retval ::NRF_ERROR_INVALID_ADDR The device identity list (or one of its entries) provided is invalid. + * This code may be returned if the local IRK list also has an invalid entry. + * @retval ::BLE_ERROR_GAP_DEVICE_IDENTITIES_IN_USE The device identity list is in use and cannot be set or cleared. + * @retval ::BLE_ERROR_GAP_DEVICE_IDENTITIES_DUPLICATE The device identity list contains multiple entries with the same identity address. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. + * @retval ::NRF_ERROR_DATA_SIZE The given device identity list size invalid (zero or too large); this can + * only return when pp_id_keys is not NULL. + */ +SVCALL(SD_BLE_GAP_DEVICE_IDENTITIES_SET, uint32_t, sd_ble_gap_device_identities_set(ble_gap_id_key_t const * const * pp_id_keys, ble_gap_irk_t const * const * pp_local_irks, uint8_t len)); + + +/**@brief Set privacy settings. + * + * @note Privacy settings cannot be changed while advertising. + * + * @param[in] p_privacy_params Privacy settings. + * + * @mscs + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. + * @retval ::NRF_ERROR_INVALID_ADDR The pointer to privacy settings is NULL or invalid. + * Otherwise, the p_device_irk pointer in privacy parameter is an invalid pointer. + * @retval ::NRF_ERROR_INVALID_PARAM Out of range parameters are provided. + * @retval ::NRF_ERROR_INVALID_STATE Privacy settings cannot be changed while advertising. + */ +SVCALL(SD_BLE_GAP_PRIVACY_SET, uint32_t, sd_ble_gap_privacy_set(ble_gap_privacy_params_t const *p_privacy_params)); + + +/**@brief Get privacy settings. + * + * @note ::ble_gap_privacy_params_t::p_device_irk must be initialized to NULL or a valid address before this function is called. + * If it is initialized to a valid address, the address pointed to will contain the current device IRK on return. + * + * @param[in,out] p_privacy_params Privacy settings. + * + * @retval ::NRF_SUCCESS Privacy settings read. + * @retval ::NRF_ERROR_INVALID_ADDR The pointer given for returning the privacy settings may be NULL or invalid. + * Otherwise, the p_device_irk pointer in privacy parameter is an invalid pointer. + */ +SVCALL(SD_BLE_GAP_PRIVACY_GET, uint32_t, sd_ble_gap_privacy_get(ble_gap_privacy_params_t *p_privacy_params)); + + +/**@brief Configure an advertising set. Set, clear or update advertising and scan response data. + * + * @note The format of the advertising data will be checked by this call to ensure interoperability. + * Limitations imposed by this API call to the data provided include having a flags data type in the scan response data and + * duplicating the local name in the advertising data and scan response data. + * + * @note In order to update advertising data while advertising, new advertising buffers must be provided. + * + * @mscs + * @mmsc{@ref BLE_GAP_ADV_MSC} + * @endmscs + * + * @param[in,out] p_adv_handle Provide a pointer to a handle containing @ref BLE_GAP_ADV_SET_HANDLE_NOT_SET to configure + * a new advertising set. On success, a new handle is then returned through the pointer. + * Provide a pointer to an existing advertising handle to configure an existing advertising set. + * @param[in] p_adv_data Advertising data. If set to NULL, no advertising data will be used. See @ref ble_gap_adv_data_t. + * @param[in] p_adv_params Advertising parameters. When this function is used to update advertising data while advertising, + * this parameter must be NULL. See @ref ble_gap_adv_params_t. + * + * @retval ::NRF_SUCCESS Advertising set successfully configured. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied: + * - Invalid advertising data configuration specified. See @ref ble_gap_adv_data_t. + * - Invalid configuration of p_adv_params. See @ref ble_gap_adv_params_t. + * - Use of whitelist requested but whitelist has not been set, + * see @ref sd_ble_gap_whitelist_set. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR ble_gap_adv_params_t::p_peer_addr is invalid. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * - It is invalid to provide non-NULL advertising set parameters while advertising. + * - It is invalid to provide the same data buffers while advertising. To update + * advertising data, provide new advertising buffers. + * @retval ::BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST Discoverable mode and whitelist incompatible. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE The provided advertising handle was not found. Use @ref BLE_GAP_ADV_SET_HANDLE_NOT_SET to + * configure a new advertising handle. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_FLAGS Invalid combination of advertising flags supplied. + * @retval ::NRF_ERROR_INVALID_DATA Invalid data type(s) supplied. Check the advertising data format specification + * given in Bluetooth Specification Version 5.0, Volume 3, Part C, Chapter 11. + * @retval ::NRF_ERROR_INVALID_LENGTH Invalid data length(s) supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported data length or advertising parameter configuration. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to configure a new advertising handle. Update an + * existing advertising handle instead. + * @retval ::BLE_ERROR_GAP_UUID_LIST_MISMATCH Invalid UUID list supplied. + */ +SVCALL(SD_BLE_GAP_ADV_SET_CONFIGURE, uint32_t, sd_ble_gap_adv_set_configure(uint8_t *p_adv_handle, ble_gap_adv_data_t const *p_adv_data, ble_gap_adv_params_t const *p_adv_params)); + + +/**@brief Start advertising (GAP Discoverable, Connectable modes, Broadcast Procedure). + * + * @note Only one advertiser may be active at any time. + * + * @events + * @event{@ref BLE_GAP_EVT_CONNECTED, Generated after connection has been established through connectable advertising.} + * @event{@ref BLE_GAP_EVT_ADV_SET_TERMINATED, Advertising set has terminated.} + * @event{@ref BLE_GAP_EVT_SCAN_REQ_REPORT, A scan request was received.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_ADV_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_CONN_PRIV_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} + * @endmscs + * + * @param[in] adv_handle Advertising handle to advertise on, received from @ref sd_ble_gap_adv_set_configure. + * @param[in] conn_cfg_tag Tag identifying a configuration set by @ref sd_ble_cfg_set or + * @ref BLE_CONN_CFG_TAG_DEFAULT to use the default connection configuration. For non-connectable + * advertising, this is ignored. + * + * @retval ::NRF_SUCCESS The BLE stack has started advertising. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. adv_handle is not configured or already advertising. + * @retval ::NRF_ERROR_CONN_COUNT The limit of available connections has been reached; connectable advertiser cannot be started. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE Advertising handle not found. Configure a new adveriting handle with @ref sd_ble_gap_adv_set_configure. + * @retval ::NRF_ERROR_NOT_FOUND conn_cfg_tag not found. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied: + * - Invalid configuration of p_adv_params. See @ref ble_gap_adv_params_t. + * - Use of whitelist requested but whitelist has not been set, see @ref sd_ble_gap_whitelist_set. + * @retval ::NRF_ERROR_RESOURCES Either: + * - adv_handle is configured with connectable advertising, but the event_length parameter + * associated with conn_cfg_tag is too small to be able to establish a connection on + * the selected advertising phys. Use @ref sd_ble_cfg_set to increase the event length. + * - Not enough BLE role slots available. + * Stop one or more currently active roles (Peripheral or Broadcaster) and try again + * - p_adv_params is configured with connectable advertising, but the event_length parameter + * associated with conn_cfg_tag is too small to be able to establish a connection on + * the selected advertising phys. Use @ref sd_ble_cfg_set to increase the event length. + * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported PHYs supplied to the call. + */ +SVCALL(SD_BLE_GAP_ADV_START, uint32_t, sd_ble_gap_adv_start(uint8_t adv_handle, uint8_t conn_cfg_tag)); + + +/**@brief Stop advertising (GAP Discoverable, Connectable modes, Broadcast Procedure). + * + * @mscs + * @mmsc{@ref BLE_GAP_ADV_MSC} + * @endmscs + * + * @param[in] adv_handle The advertising handle that should stop advertising. + * + * @retval ::NRF_SUCCESS The BLE stack has stopped advertising. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE Invalid advertising handle. + * @retval ::NRF_ERROR_INVALID_STATE The advertising handle is not advertising. + */ +SVCALL(SD_BLE_GAP_ADV_STOP, uint32_t, sd_ble_gap_adv_stop(uint8_t adv_handle)); + + + +/**@brief Update connection parameters. + * + * @details In the peripheral role, this will send the corresponding L2CAP request and wait for + * the central to perform the procedure. Regardless of success or failure, the application + * will be informed of the result with a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE event. + * + * @events + * @event{@ref BLE_GAP_EVT_CONN_PARAM_UPDATE, Result of the connection parameter update procedure.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CPU_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_conn_params Pointer to desired connection parameters. If NULL is provided on a peripheral role, + * the parameters in the PPCP characteristic of the GAP service will be used instead. + * + * @retval ::NRF_SUCCESS The Connection Update procedure has been started successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::NRF_ERROR_BUSY Procedure already in progress, wait for pending procedures to complete and retry. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + */ +SVCALL(SD_BLE_GAP_CONN_PARAM_UPDATE, uint32_t, sd_ble_gap_conn_param_update(uint16_t conn_handle, ble_gap_conn_params_t const *p_conn_params)); + + +/**@brief Disconnect (GAP Link Termination). + * + * @details This call initiates the disconnection procedure, and its completion will be communicated to the application + * with a @ref BLE_GAP_EVT_DISCONNECTED event. + * + * @events + * @event{@ref BLE_GAP_EVT_DISCONNECTED, Generated when disconnection procedure is complete.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CONN_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] hci_status_code HCI status code, see @ref BLE_HCI_STATUS_CODES (accepted values are @ref BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION and @ref BLE_HCI_CONN_INTERVAL_UNACCEPTABLE). + * + * @retval ::NRF_SUCCESS The disconnection procedure has been started successfully. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation (disconnection is already in progress). + */ +SVCALL(SD_BLE_GAP_DISCONNECT, uint32_t, sd_ble_gap_disconnect(uint16_t conn_handle, uint8_t hci_status_code)); + + +/**@brief Set the radio's transmit power. + * + * @param[in] role The role to set the transmit power for, see @ref BLE_GAP_TX_POWER_ROLES for + * possible roles. + * @param[in] handle The handle parameter is interpreted depending on role: + * - If role is @ref BLE_GAP_TX_POWER_ROLE_CONN, this value is the specific connection handle. + * - If role is @ref BLE_GAP_TX_POWER_ROLE_ADV, the advertising set identified with the advertising handle, + * will use the specified transmit power, and include it in the advertising packet headers if + * @ref ble_gap_adv_properties_t::include_tx_power set. + * - For all other roles handle is ignored. + * @param[in] tx_power Radio transmit power in dBm (see note for accepted values). + * + * @note Supported tx_power values: -40dBm, -20dBm, -16dBm, -12dBm, -8dBm, -4dBm, 0dBm, +3dBm and +4dBm. + * @note The initiator will have the same transmit power as the scanner. + * @note When a connection is created it will inherit the transmit power from the initiator or + * advertiser leading to the connection. + * + * @retval ::NRF_SUCCESS Successfully changed the transmit power. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE Advertising handle not found. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_TX_POWER_SET, uint32_t, sd_ble_gap_tx_power_set(uint8_t role, uint16_t handle, int8_t tx_power)); + + +/**@brief Set GAP Appearance value. + * + * @param[in] appearance Appearance (16-bit), see @ref BLE_APPEARANCES. + * + * @retval ::NRF_SUCCESS Appearance value set successfully. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + */ +SVCALL(SD_BLE_GAP_APPEARANCE_SET, uint32_t, sd_ble_gap_appearance_set(uint16_t appearance)); + + +/**@brief Get GAP Appearance value. + * + * @param[out] p_appearance Pointer to appearance (16-bit) to be filled in, see @ref BLE_APPEARANCES. + * + * @retval ::NRF_SUCCESS Appearance value retrieved successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + */ +SVCALL(SD_BLE_GAP_APPEARANCE_GET, uint32_t, sd_ble_gap_appearance_get(uint16_t *p_appearance)); + + +/**@brief Set GAP Peripheral Preferred Connection Parameters. + * + * @param[in] p_conn_params Pointer to a @ref ble_gap_conn_params_t structure with the desired parameters. + * + * @retval ::NRF_SUCCESS Peripheral Preferred Connection Parameters set successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + */ +SVCALL(SD_BLE_GAP_PPCP_SET, uint32_t, sd_ble_gap_ppcp_set(ble_gap_conn_params_t const *p_conn_params)); + + +/**@brief Get GAP Peripheral Preferred Connection Parameters. + * + * @param[out] p_conn_params Pointer to a @ref ble_gap_conn_params_t structure where the parameters will be stored. + * + * @retval ::NRF_SUCCESS Peripheral Preferred Connection Parameters retrieved successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + */ +SVCALL(SD_BLE_GAP_PPCP_GET, uint32_t, sd_ble_gap_ppcp_get(ble_gap_conn_params_t *p_conn_params)); + + +/**@brief Set GAP device name. + * + * @note If the device name is located in application flash memory (see @ref ble_gap_cfg_device_name_t), + * it cannot be changed. Then @ref NRF_ERROR_FORBIDDEN will be returned. + * + * @param[in] p_write_perm Write permissions for the Device Name characteristic, see @ref ble_gap_conn_sec_mode_t. + * @param[in] p_dev_name Pointer to a UTF-8 encoded, non NULL-terminated string. + * @param[in] len Length of the UTF-8, non NULL-terminated string pointed to by p_dev_name in octets (must be smaller or equal than @ref BLE_GAP_DEVNAME_MAX_LEN). + * + * @retval ::NRF_SUCCESS GAP device name and permissions set successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. + * @retval ::NRF_ERROR_FORBIDDEN Device name is not writable. + */ +SVCALL(SD_BLE_GAP_DEVICE_NAME_SET, uint32_t, sd_ble_gap_device_name_set(ble_gap_conn_sec_mode_t const *p_write_perm, uint8_t const *p_dev_name, uint16_t len)); + + +/**@brief Get GAP device name. + * + * @note If the device name is longer than the size of the supplied buffer, + * p_len will return the complete device name length, + * and not the number of bytes actually returned in p_dev_name. + * The application may use this information to allocate a suitable buffer size. + * + * @param[out] p_dev_name Pointer to an empty buffer where the UTF-8 non NULL-terminated string will be placed. Set to NULL to obtain the complete device name length. + * @param[in,out] p_len Length of the buffer pointed by p_dev_name, complete device name length on output. + * + * @retval ::NRF_SUCCESS GAP device name retrieved successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. + */ +SVCALL(SD_BLE_GAP_DEVICE_NAME_GET, uint32_t, sd_ble_gap_device_name_get(uint8_t *p_dev_name, uint16_t *p_len)); + + +/**@brief Initiate the GAP Authentication procedure. + * + * @details In the peripheral role, this function will send an SMP Security Request. + * + * @events + * @event{Depending on the security parameters set and the packet exchanges with the peer\, the following events may be generated:} + * @event{@ref BLE_GAP_EVT_SEC_PARAMS_REQUEST} + * @event{@ref BLE_GAP_EVT_SEC_INFO_REQUEST} + * @event{@ref BLE_GAP_EVT_PASSKEY_DISPLAY} + * @event{@ref BLE_GAP_EVT_KEY_PRESSED} + * @event{@ref BLE_GAP_EVT_AUTH_KEY_REQUEST} + * @event{@ref BLE_GAP_EVT_LESC_DHKEY_REQUEST} + * @event{@ref BLE_GAP_EVT_CONN_SEC_UPDATE} + * @event{@ref BLE_GAP_EVT_AUTH_STATUS} + * @event{@ref BLE_GAP_EVT_TIMEOUT} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_SEC_REQ_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_sec_params Pointer to the @ref ble_gap_sec_params_t structure with the security parameters to be used during the pairing or bonding procedure. + * In the peripheral role, only the bond, mitm, lesc and keypress fields of this structure are used. + * + * @retval ::NRF_SUCCESS Successfully initiated authentication procedure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::NRF_ERROR_NO_MEM The maximum number of authentication procedures that can run in parallel for the given role is reached. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_AUTHENTICATE, uint32_t, sd_ble_gap_authenticate(uint16_t conn_handle, ble_gap_sec_params_t const *p_sec_params)); + + +/**@brief Reply with GAP security parameters. + * + * @details This function is only used to reply to a @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. + * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. + * + * @events + * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_JW_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_PERIPH_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_CENTRAL_OOB_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_CONFIRM_FAIL_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_KS_TOO_SMALL_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_APP_ERROR_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_REMOTE_PAIRING_FAIL_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_TIMEOUT_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] sec_status Security status, see @ref BLE_GAP_SEC_STATUS. + * @param[in] p_sec_params Pointer to a @ref ble_gap_sec_params_t security parameters structure. + * @param[in,out] p_sec_keyset Pointer to a @ref ble_gap_sec_keyset_t security keyset structure. Any keys generated and/or distributed as a result of the ongoing security procedure + * will be stored into the memory referenced by the pointers inside this structure. The keys will be stored and available to the application + * upon reception of a @ref BLE_GAP_EVT_AUTH_STATUS event. + * Note that the SoftDevice expects the application to provide memory for storing the + * peer's keys. So it must be ensured that the relevant pointers inside this structure are not NULL. The pointers to the local key + * can, however, be NULL, in which case, the local key data will not be available to the application upon reception of the + * @ref BLE_GAP_EVT_AUTH_STATUS event. + * + * @retval ::NRF_SUCCESS Successfully accepted security parameter from the application. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED Setting of sign or link fields in @ref ble_gap_sec_kdist_t not supported. + */ +SVCALL(SD_BLE_GAP_SEC_PARAMS_REPLY, uint32_t, sd_ble_gap_sec_params_reply(uint16_t conn_handle, uint8_t sec_status, ble_gap_sec_params_t const *p_sec_params, ble_gap_sec_keyset_t const *p_sec_keyset)); + + +/**@brief Reply with an authentication key. + * + * @details This function is only used to reply to a @ref BLE_GAP_EVT_AUTH_KEY_REQUEST or a @ref BLE_GAP_EVT_PASSKEY_DISPLAY, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. + * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. + * + * @events + * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_CENTRAL_OOB_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] key_type See @ref BLE_GAP_AUTH_KEY_TYPES. + * @param[in] p_key If key type is @ref BLE_GAP_AUTH_KEY_TYPE_NONE, then NULL. + * If key type is @ref BLE_GAP_AUTH_KEY_TYPE_PASSKEY, then a 6-byte ASCII string (digit 0..9 only, no NULL termination) + * or NULL when confirming LE Secure Connections Numeric Comparison. + * If key type is @ref BLE_GAP_AUTH_KEY_TYPE_OOB, then a 16-byte OOB key value in little-endian format. + * + * @retval ::NRF_SUCCESS Authentication key successfully set. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_AUTH_KEY_REPLY, uint32_t, sd_ble_gap_auth_key_reply(uint16_t conn_handle, uint8_t key_type, uint8_t const *p_key)); + + +/**@brief Reply with an LE Secure connections DHKey. + * + * @details This function is only used to reply to a @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. + * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. + * + * @events + * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_dhkey LE Secure Connections DHKey. + * + * @retval ::NRF_SUCCESS DHKey successfully set. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_LESC_DHKEY_REPLY, uint32_t, sd_ble_gap_lesc_dhkey_reply(uint16_t conn_handle, ble_gap_lesc_dhkey_t const *p_dhkey)); + + +/**@brief Notify the peer of a local keypress. + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] kp_not See @ref BLE_GAP_KP_NOT_TYPES. + * + * @retval ::NRF_SUCCESS Keypress notification successfully queued for transmission. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Either not entering a passkey or keypresses have not been enabled by both peers. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_BUSY The BLE stack is busy. Retry at later time. + */ +SVCALL(SD_BLE_GAP_KEYPRESS_NOTIFY, uint32_t, sd_ble_gap_keypress_notify(uint16_t conn_handle, uint8_t kp_not)); + + +/**@brief Generate a set of OOB data to send to a peer out of band. + * + * @note The @ref ble_gap_addr_t included in the OOB data returned will be the currently active one (or, if a connection has already been established, + * the one used during connection setup). The application may manually overwrite it with an updated value. + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. Can be @ref BLE_CONN_HANDLE_INVALID if a BLE connection has not been established yet. + * @param[in] p_pk_own LE Secure Connections local P-256 Public Key. + * @param[out] p_oobd_own The OOB data to be sent out of band to a peer. + * + * @retval ::NRF_SUCCESS OOB data successfully generated. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_LESC_OOB_DATA_GET, uint32_t, sd_ble_gap_lesc_oob_data_get(uint16_t conn_handle, ble_gap_lesc_p256_pk_t const *p_pk_own, ble_gap_lesc_oob_data_t *p_oobd_own)); + +/**@brief Provide the OOB data sent/received out of band. + * + * @note An authentication procedure with OOB selected as an algorithm must be in progress when calling this function. + * @note A @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST event with the oobd_req set to 1 must have been received prior to calling this function. + * + * @events + * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_oobd_own The OOB data sent out of band to a peer or NULL if the peer has not received OOB data. + * Must correspond to @ref ble_gap_sec_params_t::oob flag in @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST. + * @param[in] p_oobd_peer The OOB data received out of band from a peer or NULL if none received. + * Must correspond to @ref sd_ble_gap_sec_params_reply in the peripheral role. + * + * @retval ::NRF_SUCCESS OOB data accepted. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_LESC_OOB_DATA_SET, uint32_t, sd_ble_gap_lesc_oob_data_set(uint16_t conn_handle, ble_gap_lesc_oob_data_t const *p_oobd_own, ble_gap_lesc_oob_data_t const *p_oobd_peer)); + + +/**@brief Reply with GAP security information. + * + * @details This function is only used to reply to a @ref BLE_GAP_EVT_SEC_INFO_REQUEST, calling it at other times will result in @ref NRF_ERROR_INVALID_STATE. + * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. + * @note Data signing is not yet supported, and p_sign_info must therefore be NULL. + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_ENC_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_enc_info Pointer to a @ref ble_gap_enc_info_t encryption information structure. May be NULL to signal none is available. + * @param[in] p_id_info Pointer to a @ref ble_gap_irk_t identity information structure. May be NULL to signal none is available. + * @param[in] p_sign_info Pointer to a @ref ble_gap_sign_info_t signing information structure. May be NULL to signal none is available. + * + * @retval ::NRF_SUCCESS Successfully accepted security information. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_SEC_INFO_REPLY, uint32_t, sd_ble_gap_sec_info_reply(uint16_t conn_handle, ble_gap_enc_info_t const *p_enc_info, ble_gap_irk_t const *p_id_info, ble_gap_sign_info_t const *p_sign_info)); + + +/**@brief Get the current connection security. + * + * @param[in] conn_handle Connection handle. + * @param[out] p_conn_sec Pointer to a @ref ble_gap_conn_sec_t structure to be filled in. + * + * @retval ::NRF_SUCCESS Current connection security successfully retrieved. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_CONN_SEC_GET, uint32_t, sd_ble_gap_conn_sec_get(uint16_t conn_handle, ble_gap_conn_sec_t *p_conn_sec)); + + +/**@brief Start reporting the received signal strength to the application. + * + * A new event is reported whenever the RSSI value changes, until @ref sd_ble_gap_rssi_stop is called. + * + * @events + * @event{@ref BLE_GAP_EVT_RSSI_CHANGED, New RSSI data available. How often the event is generated is + * dependent on the settings of the threshold_dbm + * and skip_count input parameters.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} + * @mmsc{@ref BLE_GAP_RSSI_FILT_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] threshold_dbm Minimum change in dBm before triggering the @ref BLE_GAP_EVT_RSSI_CHANGED event. Events are disabled if threshold_dbm equals @ref BLE_GAP_RSSI_THRESHOLD_INVALID. + * @param[in] skip_count Number of RSSI samples with a change of threshold_dbm or more before sending a new @ref BLE_GAP_EVT_RSSI_CHANGED event. + * + * @retval ::NRF_SUCCESS Successfully activated RSSI reporting. + * @retval ::NRF_ERROR_INVALID_STATE RSSI reporting is already ongoing. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_RSSI_START, uint32_t, sd_ble_gap_rssi_start(uint16_t conn_handle, uint8_t threshold_dbm, uint8_t skip_count)); + + +/**@brief Stop reporting the received signal strength. + * + * @note An RSSI change detected before the call but not yet received by the application + * may be reported after @ref sd_ble_gap_rssi_stop has been called. + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} + * @mmsc{@ref BLE_GAP_RSSI_FILT_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * + * @retval ::NRF_SUCCESS Successfully deactivated RSSI reporting. + * @retval ::NRF_ERROR_INVALID_STATE RSSI reporting is not ongoing. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_RSSI_STOP, uint32_t, sd_ble_gap_rssi_stop(uint16_t conn_handle)); + + +/**@brief Get the received signal strength for the last connection event. + * + * @ref sd_ble_gap_rssi_start must be called to start reporting RSSI before using this function. @ref NRF_ERROR_NOT_FOUND + * will be returned until RSSI was sampled for the first time after calling @ref sd_ble_gap_rssi_start. + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[out] p_rssi Pointer to the location where the RSSI measurement shall be stored. + * @param[out] p_ch_index Pointer to the location where Channel Index for the RSSI measurement shall be stored. + * + * @retval ::NRF_SUCCESS Successfully read the RSSI. + * @retval ::NRF_ERROR_NOT_FOUND No sample is available. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_INVALID_STATE RSSI reporting is not ongoing. + */ +SVCALL(SD_BLE_GAP_RSSI_GET, uint32_t, sd_ble_gap_rssi_get(uint16_t conn_handle, int8_t *p_rssi, uint8_t *p_ch_index)); + + +/**@brief Initiate or respond to a PHY Update Procedure + * + * @details This function is used to initiate or respond to a PHY Update Procedure. It will always + * generate a @ref BLE_GAP_EVT_PHY_UPDATE event if successfully executed. + * If this function is used to initiate a PHY Update procedure and the only option + * provided in @ref ble_gap_phys_t::tx_phys and @ref ble_gap_phys_t::rx_phys is the + * currently active PHYs in the respective directions, the SoftDevice will generate a + * @ref BLE_GAP_EVT_PHY_UPDATE with the current PHYs set and will not initiate the + * procedure in the Link Layer. + * + * If @ref ble_gap_phys_t::tx_phys or @ref ble_gap_phys_t::rx_phys is @ref BLE_GAP_PHY_AUTO, + * then the stack will select PHYs based on the peer's PHY preferences and the local link + * configuration. The PHY Update procedure will for this case result in a PHY combination + * that respects the time constraints configured with @ref sd_ble_cfg_set and the current + * link layer data length. + * + * If the peer does not support the PHY Update Procedure, then the resulting + * @ref BLE_GAP_EVT_PHY_UPDATE event will have a status set to + * @ref BLE_HCI_UNSUPPORTED_REMOTE_FEATURE. + * + * If the PHY procedure was rejected by the peer due to a procedure collision, the status + * will be @ref BLE_HCI_STATUS_CODE_LMP_ERROR_TRANSACTION_COLLISION or + * @ref BLE_HCI_DIFFERENT_TRANSACTION_COLLISION. + * If the peer responds to the PHY Update procedure with invalid parameters, the status + * will be @ref BLE_HCI_STATUS_CODE_INVALID_LMP_PARAMETERS. + * If the PHY procedure was rejected by the peer for a different reason, the status will + * contain the reason as specified by the peer. + * + * @events + * @event{@ref BLE_GAP_EVT_PHY_UPDATE, Result of the PHY Update Procedure.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPHERAL_PHY_UPDATE} + * @endmscs + * + * @param[in] conn_handle Connection handle to indicate the connection for which the PHY Update is requested. + * @param[in] p_gap_phys Pointer to PHY structure. + * + * @retval ::NRF_SUCCESS Successfully requested a PHY Update. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported PHYs supplied to the call. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::NRF_ERROR_BUSY Procedure is already in progress or not allowed at this time. Process pending events and wait for the pending procedure to complete and retry. + * + */ +SVCALL(SD_BLE_GAP_PHY_UPDATE, uint32_t, sd_ble_gap_phy_update(uint16_t conn_handle, ble_gap_phys_t const *p_gap_phys)); + + + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // BLE_GAP_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_gatt.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_gatt.h new file mode 100644 index 00000000000..98a7a150bfc --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_gatt.h @@ -0,0 +1,228 @@ +/* + * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_GATT Generic Attribute Profile (GATT) Common + @{ + @brief Common definitions and prototypes for the GATT interfaces. + */ + +#ifndef BLE_GATT_H__ +#define BLE_GATT_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_hci.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_GATT_DEFINES Defines + * @{ */ + +/** @brief Default ATT MTU, in bytes. */ +#define BLE_GATT_ATT_MTU_DEFAULT 23 + +/**@brief Invalid Attribute Handle. */ +#define BLE_GATT_HANDLE_INVALID 0x0000 + +/**@brief First Attribute Handle. */ +#define BLE_GATT_HANDLE_START 0x0001 + +/**@brief Last Attribute Handle. */ +#define BLE_GATT_HANDLE_END 0xFFFF + +/** @defgroup BLE_GATT_TIMEOUT_SOURCES GATT Timeout sources + * @{ */ +#define BLE_GATT_TIMEOUT_SRC_PROTOCOL 0x00 /**< ATT Protocol timeout. */ +/** @} */ + +/** @defgroup BLE_GATT_WRITE_OPS GATT Write operations + * @{ */ +#define BLE_GATT_OP_INVALID 0x00 /**< Invalid Operation. */ +#define BLE_GATT_OP_WRITE_REQ 0x01 /**< Write Request. */ +#define BLE_GATT_OP_WRITE_CMD 0x02 /**< Write Command. */ +#define BLE_GATT_OP_SIGN_WRITE_CMD 0x03 /**< Signed Write Command. */ +#define BLE_GATT_OP_PREP_WRITE_REQ 0x04 /**< Prepare Write Request. */ +#define BLE_GATT_OP_EXEC_WRITE_REQ 0x05 /**< Execute Write Request. */ +/** @} */ + +/** @defgroup BLE_GATT_EXEC_WRITE_FLAGS GATT Execute Write flags + * @{ */ +#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_CANCEL 0x00 /**< Cancel prepared write. */ +#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_WRITE 0x01 /**< Execute prepared write. */ +/** @} */ + +/** @defgroup BLE_GATT_HVX_TYPES GATT Handle Value operations + * @{ */ +#define BLE_GATT_HVX_INVALID 0x00 /**< Invalid Operation. */ +#define BLE_GATT_HVX_NOTIFICATION 0x01 /**< Handle Value Notification. */ +#define BLE_GATT_HVX_INDICATION 0x02 /**< Handle Value Indication. */ +/** @} */ + +/** @defgroup BLE_GATT_STATUS_CODES GATT Status Codes + * @{ */ +#define BLE_GATT_STATUS_SUCCESS 0x0000 /**< Success. */ +#define BLE_GATT_STATUS_UNKNOWN 0x0001 /**< Unknown or not applicable status. */ +#define BLE_GATT_STATUS_ATTERR_INVALID 0x0100 /**< ATT Error: Invalid Error Code. */ +#define BLE_GATT_STATUS_ATTERR_INVALID_HANDLE 0x0101 /**< ATT Error: Invalid Attribute Handle. */ +#define BLE_GATT_STATUS_ATTERR_READ_NOT_PERMITTED 0x0102 /**< ATT Error: Read not permitted. */ +#define BLE_GATT_STATUS_ATTERR_WRITE_NOT_PERMITTED 0x0103 /**< ATT Error: Write not permitted. */ +#define BLE_GATT_STATUS_ATTERR_INVALID_PDU 0x0104 /**< ATT Error: Used in ATT as Invalid PDU. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHENTICATION 0x0105 /**< ATT Error: Authenticated link required. */ +#define BLE_GATT_STATUS_ATTERR_REQUEST_NOT_SUPPORTED 0x0106 /**< ATT Error: Used in ATT as Request Not Supported. */ +#define BLE_GATT_STATUS_ATTERR_INVALID_OFFSET 0x0107 /**< ATT Error: Offset specified was past the end of the attribute. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHORIZATION 0x0108 /**< ATT Error: Used in ATT as Insufficient Authorization. */ +#define BLE_GATT_STATUS_ATTERR_PREPARE_QUEUE_FULL 0x0109 /**< ATT Error: Used in ATT as Prepare Queue Full. */ +#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_FOUND 0x010A /**< ATT Error: Used in ATT as Attribute not found. */ +#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_LONG 0x010B /**< ATT Error: Attribute cannot be read or written using read/write blob requests. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_ENC_KEY_SIZE 0x010C /**< ATT Error: Encryption key size used is insufficient. */ +#define BLE_GATT_STATUS_ATTERR_INVALID_ATT_VAL_LENGTH 0x010D /**< ATT Error: Invalid value size. */ +#define BLE_GATT_STATUS_ATTERR_UNLIKELY_ERROR 0x010E /**< ATT Error: Very unlikely error. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_ENCRYPTION 0x010F /**< ATT Error: Encrypted link required. */ +#define BLE_GATT_STATUS_ATTERR_UNSUPPORTED_GROUP_TYPE 0x0110 /**< ATT Error: Attribute type is not a supported grouping attribute. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_RESOURCES 0x0111 /**< ATT Error: Encrypted link required. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_BEGIN 0x0112 /**< ATT Error: Reserved for Future Use range #1 begin. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_END 0x017F /**< ATT Error: Reserved for Future Use range #1 end. */ +#define BLE_GATT_STATUS_ATTERR_APP_BEGIN 0x0180 /**< ATT Error: Application range begin. */ +#define BLE_GATT_STATUS_ATTERR_APP_END 0x019F /**< ATT Error: Application range end. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_BEGIN 0x01A0 /**< ATT Error: Reserved for Future Use range #2 begin. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_END 0x01DF /**< ATT Error: Reserved for Future Use range #2 end. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_BEGIN 0x01E0 /**< ATT Error: Reserved for Future Use range #3 begin. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_END 0x01FC /**< ATT Error: Reserved for Future Use range #3 end. */ +#define BLE_GATT_STATUS_ATTERR_CPS_CCCD_CONFIG_ERROR 0x01FD /**< ATT Common Profile and Service Error: Client Characteristic Configuration Descriptor improperly configured. */ +#define BLE_GATT_STATUS_ATTERR_CPS_PROC_ALR_IN_PROG 0x01FE /**< ATT Common Profile and Service Error: Procedure Already in Progress. */ +#define BLE_GATT_STATUS_ATTERR_CPS_OUT_OF_RANGE 0x01FF /**< ATT Common Profile and Service Error: Out Of Range. */ +/** @} */ + + +/** @defgroup BLE_GATT_CPF_FORMATS Characteristic Presentation Formats + * @note Found at http://developer.bluetooth.org/gatt/descriptors/Pages/DescriptorViewer.aspx?u=org.bluetooth.descriptor.gatt.characteristic_presentation_format.xml + * @{ */ +#define BLE_GATT_CPF_FORMAT_RFU 0x00 /**< Reserved For Future Use. */ +#define BLE_GATT_CPF_FORMAT_BOOLEAN 0x01 /**< Boolean. */ +#define BLE_GATT_CPF_FORMAT_2BIT 0x02 /**< Unsigned 2-bit integer. */ +#define BLE_GATT_CPF_FORMAT_NIBBLE 0x03 /**< Unsigned 4-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT8 0x04 /**< Unsigned 8-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT12 0x05 /**< Unsigned 12-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT16 0x06 /**< Unsigned 16-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT24 0x07 /**< Unsigned 24-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT32 0x08 /**< Unsigned 32-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT48 0x09 /**< Unsigned 48-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT64 0x0A /**< Unsigned 64-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT128 0x0B /**< Unsigned 128-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT8 0x0C /**< Signed 2-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT12 0x0D /**< Signed 12-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT16 0x0E /**< Signed 16-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT24 0x0F /**< Signed 24-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT32 0x10 /**< Signed 32-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT48 0x11 /**< Signed 48-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT64 0x12 /**< Signed 64-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT128 0x13 /**< Signed 128-bit integer. */ +#define BLE_GATT_CPF_FORMAT_FLOAT32 0x14 /**< IEEE-754 32-bit floating point. */ +#define BLE_GATT_CPF_FORMAT_FLOAT64 0x15 /**< IEEE-754 64-bit floating point. */ +#define BLE_GATT_CPF_FORMAT_SFLOAT 0x16 /**< IEEE-11073 16-bit SFLOAT. */ +#define BLE_GATT_CPF_FORMAT_FLOAT 0x17 /**< IEEE-11073 32-bit FLOAT. */ +#define BLE_GATT_CPF_FORMAT_DUINT16 0x18 /**< IEEE-20601 format. */ +#define BLE_GATT_CPF_FORMAT_UTF8S 0x19 /**< UTF-8 string. */ +#define BLE_GATT_CPF_FORMAT_UTF16S 0x1A /**< UTF-16 string. */ +#define BLE_GATT_CPF_FORMAT_STRUCT 0x1B /**< Opaque Structure. */ +/** @} */ + +/** @defgroup BLE_GATT_CPF_NAMESPACES GATT Bluetooth Namespaces + * @{ + */ +#define BLE_GATT_CPF_NAMESPACE_BTSIG 0x01 /**< Bluetooth SIG defined Namespace. */ +#define BLE_GATT_CPF_NAMESPACE_DESCRIPTION_UNKNOWN 0x0000 /**< Namespace Description Unknown. */ +/** @} */ + +/** @} */ + +/** @addtogroup BLE_GATT_STRUCTURES Structures + * @{ */ + +/** + * @brief BLE GATT connection configuration parameters, set with @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_INVALID_PARAM att_mtu is smaller than @ref BLE_GATT_ATT_MTU_DEFAULT. + */ +typedef struct +{ + uint16_t att_mtu; /**< Maximum size of ATT packet the SoftDevice can send or receive. + The default and minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. + @mscs + @mmsc{@ref BLE_GATTC_MTU_EXCHANGE} + @mmsc{@ref BLE_GATTS_MTU_EXCHANGE} + @endmscs + */ +} ble_gatt_conn_cfg_t; + +/**@brief GATT Characteristic Properties. */ +typedef struct +{ + /* Standard properties */ + uint8_t broadcast :1; /**< Broadcasting of the value permitted. */ + uint8_t read :1; /**< Reading the value permitted. */ + uint8_t write_wo_resp :1; /**< Writing the value with Write Command permitted. */ + uint8_t write :1; /**< Writing the value with Write Request permitted. */ + uint8_t notify :1; /**< Notification of the value permitted. */ + uint8_t indicate :1; /**< Indications of the value permitted. */ + uint8_t auth_signed_wr :1; /**< Writing the value with Signed Write Command permitted. */ +} ble_gatt_char_props_t; + +/**@brief GATT Characteristic Extended Properties. */ +typedef struct +{ + /* Extended properties */ + uint8_t reliable_wr :1; /**< Writing the value with Queued Write operations permitted. */ + uint8_t wr_aux :1; /**< Writing the Characteristic User Description descriptor permitted. */ +} ble_gatt_char_ext_props_t; + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // BLE_GATT_H__ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_gattc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_gattc.h new file mode 100644 index 00000000000..7fb3920244d --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_gattc.h @@ -0,0 +1,715 @@ +/* + * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_GATTC Generic Attribute Profile (GATT) Client + @{ + @brief Definitions and prototypes for the GATT Client interface. + */ + +#ifndef BLE_GATTC_H__ +#define BLE_GATTC_H__ + +#include +#include "nrf.h" +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" +#include "ble_gatt.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_GATTC_ENUMERATIONS Enumerations + * @{ */ + +/**@brief GATTC API SVC numbers. */ +enum BLE_GATTC_SVCS +{ + SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER = BLE_GATTC_SVC_BASE, /**< Primary Service Discovery. */ + SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, /**< Relationship Discovery. */ + SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, /**< Characteristic Discovery. */ + SD_BLE_GATTC_DESCRIPTORS_DISCOVER, /**< Characteristic Descriptor Discovery. */ + SD_BLE_GATTC_ATTR_INFO_DISCOVER, /**< Attribute Information Discovery. */ + SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, /**< Read Characteristic Value by UUID. */ + SD_BLE_GATTC_READ, /**< Generic read. */ + SD_BLE_GATTC_CHAR_VALUES_READ, /**< Read multiple Characteristic Values. */ + SD_BLE_GATTC_WRITE, /**< Generic write. */ + SD_BLE_GATTC_HV_CONFIRM, /**< Handle Value Confirmation. */ + SD_BLE_GATTC_EXCHANGE_MTU_REQUEST, /**< Exchange MTU Request. */ +}; + +/** + * @brief GATT Client Event IDs. + */ +enum BLE_GATTC_EVTS +{ + BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP = BLE_GATTC_EVT_BASE, /**< Primary Service Discovery Response event. \n See @ref ble_gattc_evt_prim_srvc_disc_rsp_t. */ + BLE_GATTC_EVT_REL_DISC_RSP, /**< Relationship Discovery Response event. \n See @ref ble_gattc_evt_rel_disc_rsp_t. */ + BLE_GATTC_EVT_CHAR_DISC_RSP, /**< Characteristic Discovery Response event. \n See @ref ble_gattc_evt_char_disc_rsp_t. */ + BLE_GATTC_EVT_DESC_DISC_RSP, /**< Descriptor Discovery Response event. \n See @ref ble_gattc_evt_desc_disc_rsp_t. */ + BLE_GATTC_EVT_ATTR_INFO_DISC_RSP, /**< Attribute Information Response event. \n See @ref ble_gattc_evt_attr_info_disc_rsp_t. */ + BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP, /**< Read By UUID Response event. \n See @ref ble_gattc_evt_char_val_by_uuid_read_rsp_t. */ + BLE_GATTC_EVT_READ_RSP, /**< Read Response event. \n See @ref ble_gattc_evt_read_rsp_t. */ + BLE_GATTC_EVT_CHAR_VALS_READ_RSP, /**< Read multiple Response event. \n See @ref ble_gattc_evt_char_vals_read_rsp_t. */ + BLE_GATTC_EVT_WRITE_RSP, /**< Write Response event. \n See @ref ble_gattc_evt_write_rsp_t. */ + BLE_GATTC_EVT_HVX, /**< Handle Value Notification or Indication event. \n Confirm indication with @ref sd_ble_gattc_hv_confirm. \n See @ref ble_gattc_evt_hvx_t. */ + BLE_GATTC_EVT_EXCHANGE_MTU_RSP, /**< Exchange MTU Response event. \n See @ref ble_gattc_evt_exchange_mtu_rsp_t. */ + BLE_GATTC_EVT_TIMEOUT, /**< Timeout event. \n See @ref ble_gattc_evt_timeout_t. */ + BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE /**< Write without Response transmission complete. \n See @ref ble_gattc_evt_write_cmd_tx_complete_t. */ +}; + +/** @} */ + +/** @addtogroup BLE_GATTC_DEFINES Defines + * @{ */ + +/** @defgroup BLE_ERRORS_GATTC SVC return values specific to GATTC + * @{ */ +#define BLE_ERROR_GATTC_PROC_NOT_PERMITTED (NRF_GATTC_ERR_BASE + 0x000) /**< Procedure not Permitted. */ +/** @} */ + +/** @defgroup BLE_GATTC_ATTR_INFO_FORMAT Attribute Information Formats + * @{ */ +#define BLE_GATTC_ATTR_INFO_FORMAT_16BIT 1 /**< 16-bit Attribute Information Format. */ +#define BLE_GATTC_ATTR_INFO_FORMAT_128BIT 2 /**< 128-bit Attribute Information Format. */ +/** @} */ + +/** @defgroup BLE_GATTC_DEFAULTS GATT Client defaults + * @{ */ +#define BLE_GATTC_WRITE_CMD_TX_QUEUE_SIZE_DEFAULT 1 /**< Default number of Write without Response that can be queued for transmission. */ +/** @} */ + +/** @} */ + +/** @addtogroup BLE_GATTC_STRUCTURES Structures + * @{ */ + +/** + * @brief BLE GATTC connection configuration parameters, set with @ref sd_ble_cfg_set. + */ +typedef struct +{ + uint8_t write_cmd_tx_queue_size; /**< The guaranteed minimum number of Write without Response that can be queued for transmission. + The default value is @ref BLE_GATTC_WRITE_CMD_TX_QUEUE_SIZE_DEFAULT */ +} ble_gattc_conn_cfg_t; + +/**@brief Operation Handle Range. */ +typedef struct +{ + uint16_t start_handle; /**< Start Handle. */ + uint16_t end_handle; /**< End Handle. */ +} ble_gattc_handle_range_t; + + +/**@brief GATT service. */ +typedef struct +{ + ble_uuid_t uuid; /**< Service UUID. */ + ble_gattc_handle_range_t handle_range; /**< Service Handle Range. */ +} ble_gattc_service_t; + + +/**@brief GATT include. */ +typedef struct +{ + uint16_t handle; /**< Include Handle. */ + ble_gattc_service_t included_srvc; /**< Handle of the included service. */ +} ble_gattc_include_t; + + +/**@brief GATT characteristic. */ +typedef struct +{ + ble_uuid_t uuid; /**< Characteristic UUID. */ + ble_gatt_char_props_t char_props; /**< Characteristic Properties. */ + uint8_t char_ext_props : 1; /**< Extended properties present. */ + uint16_t handle_decl; /**< Handle of the Characteristic Declaration. */ + uint16_t handle_value; /**< Handle of the Characteristic Value. */ +} ble_gattc_char_t; + + +/**@brief GATT descriptor. */ +typedef struct +{ + uint16_t handle; /**< Descriptor Handle. */ + ble_uuid_t uuid; /**< Descriptor UUID. */ +} ble_gattc_desc_t; + + +/**@brief Write Parameters. */ +typedef struct +{ + uint8_t write_op; /**< Write Operation to be performed, see @ref BLE_GATT_WRITE_OPS. */ + uint8_t flags; /**< Flags, see @ref BLE_GATT_EXEC_WRITE_FLAGS. */ + uint16_t handle; /**< Handle to the attribute to be written. */ + uint16_t offset; /**< Offset in bytes. @note For WRITE_CMD and WRITE_REQ, offset must be 0. */ + uint16_t len; /**< Length of data in bytes. */ + uint8_t const *p_value; /**< Pointer to the value data. */ +} ble_gattc_write_params_t; + +/**@brief Attribute Information for 16-bit Attribute UUID. */ +typedef struct +{ + uint16_t handle; /**< Attribute handle. */ + ble_uuid_t uuid; /**< 16-bit Attribute UUID. */ +} ble_gattc_attr_info16_t; + +/**@brief Attribute Information for 128-bit Attribute UUID. */ +typedef struct +{ + uint16_t handle; /**< Attribute handle. */ + ble_uuid128_t uuid; /**< 128-bit Attribute UUID. */ +} ble_gattc_attr_info128_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Service count. */ + ble_gattc_service_t services[1]; /**< Service data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_prim_srvc_disc_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_REL_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Include count. */ + ble_gattc_include_t includes[1]; /**< Include data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_rel_disc_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Characteristic count. */ + ble_gattc_char_t chars[1]; /**< Characteristic data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_char_disc_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_DESC_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Descriptor count. */ + ble_gattc_desc_t descs[1]; /**< Descriptor data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_desc_disc_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_ATTR_INFO_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Attribute count. */ + uint8_t format; /**< Attribute information format, see @ref BLE_GATTC_ATTR_INFO_FORMAT. */ + union { + ble_gattc_attr_info16_t attr_info16[1]; /**< Attribute information for 16-bit Attribute UUID. + @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ + ble_gattc_attr_info128_t attr_info128[1]; /**< Attribute information for 128-bit Attribute UUID. + @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ + } info; /**< Attribute information union. */ +} ble_gattc_evt_attr_info_disc_rsp_t; + +/**@brief GATT read by UUID handle value pair. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + uint8_t *p_value; /**< Pointer to the Attribute Value, length is available in @ref ble_gattc_evt_char_val_by_uuid_read_rsp_t::value_len. */ +} ble_gattc_handle_value_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP. */ +typedef struct +{ + uint16_t count; /**< Handle-Value Pair Count. */ + uint16_t value_len; /**< Length of the value in Handle-Value(s) list. */ + uint8_t handle_value[1]; /**< Handle-Value(s) list. To iterate through the list use @ref sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter. + @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_char_val_by_uuid_read_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_READ_RSP. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + uint16_t offset; /**< Offset of the attribute data. */ + uint16_t len; /**< Attribute data length. */ + uint8_t data[1]; /**< Attribute data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_read_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_VALS_READ_RSP. */ +typedef struct +{ + uint16_t len; /**< Concatenated Attribute values length. */ + uint8_t values[1]; /**< Attribute values. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_char_vals_read_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_WRITE_RSP. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + uint8_t write_op; /**< Type of write operation, see @ref BLE_GATT_WRITE_OPS. */ + uint16_t offset; /**< Data offset. */ + uint16_t len; /**< Data length. */ + uint8_t data[1]; /**< Data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_write_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_HVX. */ +typedef struct +{ + uint16_t handle; /**< Handle to which the HVx operation applies. */ + uint8_t type; /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */ + uint16_t len; /**< Attribute data length. */ + uint8_t data[1]; /**< Attribute data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_hvx_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP. */ +typedef struct +{ + uint16_t server_rx_mtu; /**< Server RX MTU size. */ +} ble_gattc_evt_exchange_mtu_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_TIMEOUT. */ +typedef struct +{ + uint8_t src; /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */ +} ble_gattc_evt_timeout_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE. */ +typedef struct +{ + uint8_t count; /**< Number of write without response transmissions completed. */ +} ble_gattc_evt_write_cmd_tx_complete_t; + +/**@brief GATTC event structure. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which event occurred. */ + uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ + uint16_t error_handle; /**< In case of error: The handle causing the error. In all other cases @ref BLE_GATT_HANDLE_INVALID. */ + union + { + ble_gattc_evt_prim_srvc_disc_rsp_t prim_srvc_disc_rsp; /**< Primary Service Discovery Response Event Parameters. */ + ble_gattc_evt_rel_disc_rsp_t rel_disc_rsp; /**< Relationship Discovery Response Event Parameters. */ + ble_gattc_evt_char_disc_rsp_t char_disc_rsp; /**< Characteristic Discovery Response Event Parameters. */ + ble_gattc_evt_desc_disc_rsp_t desc_disc_rsp; /**< Descriptor Discovery Response Event Parameters. */ + ble_gattc_evt_char_val_by_uuid_read_rsp_t char_val_by_uuid_read_rsp; /**< Characteristic Value Read by UUID Response Event Parameters. */ + ble_gattc_evt_read_rsp_t read_rsp; /**< Read Response Event Parameters. */ + ble_gattc_evt_char_vals_read_rsp_t char_vals_read_rsp; /**< Characteristic Values Read Response Event Parameters. */ + ble_gattc_evt_write_rsp_t write_rsp; /**< Write Response Event Parameters. */ + ble_gattc_evt_hvx_t hvx; /**< Handle Value Notification/Indication Event Parameters. */ + ble_gattc_evt_exchange_mtu_rsp_t exchange_mtu_rsp; /**< Exchange MTU Response Event Parameters. */ + ble_gattc_evt_timeout_t timeout; /**< Timeout Event Parameters. */ + ble_gattc_evt_attr_info_disc_rsp_t attr_info_disc_rsp; /**< Attribute Information Discovery Event Parameters. */ + ble_gattc_evt_write_cmd_tx_complete_t write_cmd_tx_complete; /**< Write without Response transmission complete Event Parameters. */ + } params; /**< Event Parameters. @note Only valid if @ref gatt_status == @ref BLE_GATT_STATUS_SUCCESS. */ +} ble_gattc_evt_t; +/** @} */ + +/** @addtogroup BLE_GATTC_FUNCTIONS Functions + * @{ */ + +/**@brief Initiate or continue a GATT Primary Service Discovery procedure. + * + * @details This function initiates or resumes a Primary Service discovery procedure, starting from the supplied handle. + * If the last service has not been reached, this function must be called again with an updated start handle value to continue the search. + * + * @note If any of the discovered services have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with + * type @ref BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event. + * + * @events + * @event{@ref BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_PRIM_SRVC_DISC_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] start_handle Handle to start searching from. + * @param[in] p_srvc_uuid Pointer to the service UUID to be found. If it is NULL, all primary services will be returned. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Primary Service Discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER, uint32_t, sd_ble_gattc_primary_services_discover(uint16_t conn_handle, uint16_t start_handle, ble_uuid_t const *p_srvc_uuid)); + + +/**@brief Initiate or continue a GATT Relationship Discovery procedure. + * + * @details This function initiates or resumes the Find Included Services sub-procedure. If the last included service has not been reached, + * this must be called again with an updated handle range to continue the search. + * + * @events + * @event{@ref BLE_GATTC_EVT_REL_DISC_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_REL_DISC_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Relationship Discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, uint32_t, sd_ble_gattc_relationships_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); + + +/**@brief Initiate or continue a GATT Characteristic Discovery procedure. + * + * @details This function initiates or resumes a Characteristic discovery procedure. If the last Characteristic has not been reached, + * this must be called again with an updated handle range to continue the discovery. + * + * @note If any of the discovered characteristics have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with + * type @ref BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event. + * + * @events + * @event{@ref BLE_GATTC_EVT_CHAR_DISC_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_CHAR_DISC_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Characteristic Discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, uint32_t, sd_ble_gattc_characteristics_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); + + +/**@brief Initiate or continue a GATT Characteristic Descriptor Discovery procedure. + * + * @details This function initiates or resumes a Characteristic Descriptor discovery procedure. If the last Descriptor has not been reached, + * this must be called again with an updated handle range to continue the discovery. + * + * @events + * @event{@ref BLE_GATTC_EVT_DESC_DISC_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_DESC_DISC_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handle_range A pointer to the range of handles of the Characteristic to perform this procedure on. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Descriptor Discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_DESCRIPTORS_DISCOVER, uint32_t, sd_ble_gattc_descriptors_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); + + +/**@brief Initiate or continue a GATT Read using Characteristic UUID procedure. + * + * @details This function initiates or resumes a Read using Characteristic UUID procedure. If the last Characteristic has not been reached, + * this must be called again with an updated handle range to continue the discovery. + * + * @events + * @event{@ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_READ_UUID_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_uuid Pointer to a Characteristic value UUID to read. + * @param[in] p_handle_range A pointer to the range of handles to perform this procedure on. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Read using Characteristic UUID procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, uint32_t, sd_ble_gattc_char_value_by_uuid_read(uint16_t conn_handle, ble_uuid_t const *p_uuid, ble_gattc_handle_range_t const *p_handle_range)); + + +/**@brief Initiate or continue a GATT Read (Long) Characteristic or Descriptor procedure. + * + * @details This function initiates or resumes a GATT Read (Long) Characteristic or Descriptor procedure. If the Characteristic or Descriptor + * to be read is longer than ATT_MTU - 1, this function must be called multiple times with appropriate offset to read the + * complete value. + * + * @events + * @event{@ref BLE_GATTC_EVT_READ_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_VALUE_READ_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] handle The handle of the attribute to be read. + * @param[in] offset Offset into the attribute value to be read. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Read (Long) procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_READ, uint32_t, sd_ble_gattc_read(uint16_t conn_handle, uint16_t handle, uint16_t offset)); + + +/**@brief Initiate a GATT Read Multiple Characteristic Values procedure. + * + * @details This function initiates a GATT Read Multiple Characteristic Values procedure. + * + * @events + * @event{@ref BLE_GATTC_EVT_CHAR_VALS_READ_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_READ_MULT_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handles A pointer to the handle(s) of the attribute(s) to be read. + * @param[in] handle_count The number of handles in p_handles. + * + * @retval ::NRF_SUCCESS Successfully started the Read Multiple Characteristic Values procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_CHAR_VALUES_READ, uint32_t, sd_ble_gattc_char_values_read(uint16_t conn_handle, uint16_t const *p_handles, uint16_t handle_count)); + + +/**@brief Perform a Write (Characteristic Value or Descriptor, with or without response, signed or not, long or reliable) procedure. + * + * @details This function can perform all write procedures described in GATT. + * + * @note Only one write with response procedure can be ongoing per connection at a time. + * If the application tries to write with response while another write with response procedure is ongoing, + * the function call will return @ref NRF_ERROR_BUSY. + * A @ref BLE_GATTC_EVT_WRITE_RSP event will be issued as soon as the write response arrives from the peer. + * + * @note The number of Write without Response that can be queued is configured by @ref ble_gattc_conn_cfg_t::write_cmd_tx_queue_size + * When the queue is full, the function call will return @ref NRF_ERROR_RESOURCES. + * A @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event will be issued as soon as the transmission of the write without response is complete. + * + * @note The application can keep track of the available queue element count for writes without responses by following the procedure below: + * - Store initial queue element count in a variable. + * - Decrement the variable, which stores the currently available queue element count, by one when a call to this function returns @ref NRF_SUCCESS. + * - Increment the variable, which stores the current available queue element count, by the count variable in @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event. + * + * @events + * @event{@ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE, Write without response transmission complete.} + * @event{@ref BLE_GATTC_EVT_WRITE_RSP, Write response received from the peer.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_VALUE_WRITE_WITHOUT_RESP_MSC} + * @mmsc{@ref BLE_GATTC_VALUE_WRITE_MSC} + * @mmsc{@ref BLE_GATTC_VALUE_LONG_WRITE_MSC} + * @mmsc{@ref BLE_GATTC_VALUE_RELIABLE_WRITE_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_write_params A pointer to a write parameters structure. + * + * @retval ::NRF_SUCCESS Successfully started the Write procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. + * @retval ::NRF_ERROR_BUSY For write with response, procedure already in progress. Wait for a @ref BLE_GATTC_EVT_WRITE_RSP event and retry. + * @retval ::NRF_ERROR_RESOURCES Too many writes without responses queued. + * Wait for a @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event and retry. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_WRITE, uint32_t, sd_ble_gattc_write(uint16_t conn_handle, ble_gattc_write_params_t const *p_write_params)); + + +/**@brief Send a Handle Value Confirmation to the GATT Server. + * + * @mscs + * @mmsc{@ref BLE_GATTC_HVI_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] handle The handle of the attribute in the indication. + * + * @retval ::NRF_SUCCESS Successfully queued the Handle Value Confirmation for transmission. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no Indication pending to be confirmed. + * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_HV_CONFIRM, uint32_t, sd_ble_gattc_hv_confirm(uint16_t conn_handle, uint16_t handle)); + +/**@brief Discovers information about a range of attributes on a GATT server. + * + * @events + * @event{@ref BLE_GATTC_EVT_ATTR_INFO_DISC_RSP, Generated when information about a range of attributes has been received.} + * @endevents + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handle_range The range of handles to request information about. + * + * @retval ::NRF_SUCCESS Successfully started an attribute information discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid connection state + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_ATTR_INFO_DISCOVER, uint32_t, sd_ble_gattc_attr_info_discover(uint16_t conn_handle, ble_gattc_handle_range_t const * p_handle_range)); + +/**@brief Start an ATT_MTU exchange by sending an Exchange MTU Request to the server. + * + * @details The SoftDevice sets ATT_MTU to the minimum of: + * - The Client RX MTU value, and + * - The Server RX MTU value from @ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP. + * + * However, the SoftDevice never sets ATT_MTU lower than @ref BLE_GATT_ATT_MTU_DEFAULT. + * + * @events + * @event{@ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_MTU_EXCHANGE} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] client_rx_mtu Client RX MTU size. + * - The minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. + * - The maximum value is @ref ble_gatt_conn_cfg_t::att_mtu in the connection configuration + used for this connection. + * - The value must be equal to Server RX MTU size given in @ref sd_ble_gatts_exchange_mtu_reply + * if an ATT_MTU exchange has already been performed in the other direction. + * + * @retval ::NRF_SUCCESS Successfully sent request to the server. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid connection state or an ATT_MTU exchange was already requested once. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid Client RX MTU size supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_EXCHANGE_MTU_REQUEST, uint32_t, sd_ble_gattc_exchange_mtu_request(uint16_t conn_handle, uint16_t client_rx_mtu)); + +/**@brief Iterate through Handle-Value(s) list in @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP event. + * + * @param[in] p_gattc_evt Pointer to event buffer containing @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP event. + * @note If the buffer contains different event, behavior is undefined. + * @param[in,out] p_iter Iterator, points to @ref ble_gattc_handle_value_t structure that will be filled in with + * the next Handle-Value pair in each iteration. If the function returns other than + * @ref NRF_SUCCESS, it will not be changed. + * - To start iteration, initialize the structure to zero. + * - To continue, pass the value from previous iteration. + * + * \code + * ble_gattc_handle_value_t iter; + * memset(&iter, 0, sizeof(ble_gattc_handle_value_t)); + * while (sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(&ble_evt.evt.gattc_evt, &iter) == NRF_SUCCESS) + * { + * app_handle = iter.handle; + * memcpy(app_value, iter.p_value, ble_evt.evt.gattc_evt.params.char_val_by_uuid_read_rsp.value_len); + * } + * \endcode + * + * @retval ::NRF_SUCCESS Successfully retrieved the next Handle-Value pair. + * @retval ::NRF_ERROR_NOT_FOUND No more Handle-Value pairs available in the list. + */ +__STATIC_INLINE uint32_t sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(ble_gattc_evt_t *p_gattc_evt, ble_gattc_handle_value_t *p_iter); + +/** @} */ + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE uint32_t sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(ble_gattc_evt_t *p_gattc_evt, ble_gattc_handle_value_t *p_iter) +{ + uint32_t value_len = p_gattc_evt->params.char_val_by_uuid_read_rsp.value_len; + uint8_t *p_first = p_gattc_evt->params.char_val_by_uuid_read_rsp.handle_value; + uint8_t *p_next = p_iter->p_value ? p_iter->p_value + value_len : p_first; + + if ((p_next - p_first) / (sizeof(uint16_t) + value_len) < p_gattc_evt->params.char_val_by_uuid_read_rsp.count) + { + p_iter->handle = (uint16_t)p_next[1] << 8 | p_next[0]; + p_iter->p_value = p_next + sizeof(uint16_t); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_NOT_FOUND; + } +} + +#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ + +#ifdef __cplusplus +} +#endif +#endif /* BLE_GATTC_H__ */ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_gatts.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_gatts.h new file mode 100644 index 00000000000..e437b6e0767 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_gatts.h @@ -0,0 +1,845 @@ +/* + * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_GATTS Generic Attribute Profile (GATT) Server + @{ + @brief Definitions and prototypes for the GATTS interface. + */ + +#ifndef BLE_GATTS_H__ +#define BLE_GATTS_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_hci.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" +#include "ble_gatt.h" +#include "ble_gap.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_GATTS_ENUMERATIONS Enumerations + * @{ */ + +/** + * @brief GATTS API SVC numbers. + */ +enum BLE_GATTS_SVCS +{ + SD_BLE_GATTS_SERVICE_ADD = BLE_GATTS_SVC_BASE, /**< Add a service. */ + SD_BLE_GATTS_INCLUDE_ADD, /**< Add an included service. */ + SD_BLE_GATTS_CHARACTERISTIC_ADD, /**< Add a characteristic. */ + SD_BLE_GATTS_DESCRIPTOR_ADD, /**< Add a generic attribute. */ + SD_BLE_GATTS_VALUE_SET, /**< Set an attribute value. */ + SD_BLE_GATTS_VALUE_GET, /**< Get an attribute value. */ + SD_BLE_GATTS_HVX, /**< Handle Value Notification or Indication. */ + SD_BLE_GATTS_SERVICE_CHANGED, /**< Perform a Service Changed Indication to one or more peers. */ + SD_BLE_GATTS_RW_AUTHORIZE_REPLY, /**< Reply to an authorization request for a read or write operation on one or more attributes. */ + SD_BLE_GATTS_SYS_ATTR_SET, /**< Set the persistent system attributes for a connection. */ + SD_BLE_GATTS_SYS_ATTR_GET, /**< Retrieve the persistent system attributes. */ + SD_BLE_GATTS_INITIAL_USER_HANDLE_GET, /**< Retrieve the first valid user handle. */ + SD_BLE_GATTS_ATTR_GET, /**< Retrieve the UUID and/or metadata of an attribute. */ + SD_BLE_GATTS_EXCHANGE_MTU_REPLY /**< Reply to Exchange MTU Request. */ +}; + +/** + * @brief GATT Server Event IDs. + */ +enum BLE_GATTS_EVTS +{ + BLE_GATTS_EVT_WRITE = BLE_GATTS_EVT_BASE, /**< Write operation performed. \n See @ref ble_gatts_evt_write_t. */ + BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST, /**< Read/Write Authorization request. \n Reply with @ref sd_ble_gatts_rw_authorize_reply. \n See @ref ble_gatts_evt_rw_authorize_request_t. */ + BLE_GATTS_EVT_SYS_ATTR_MISSING, /**< A persistent system attribute access is pending. \n Respond with @ref sd_ble_gatts_sys_attr_set. \n See @ref ble_gatts_evt_sys_attr_missing_t. */ + BLE_GATTS_EVT_HVC, /**< Handle Value Confirmation. \n See @ref ble_gatts_evt_hvc_t. */ + BLE_GATTS_EVT_SC_CONFIRM, /**< Service Changed Confirmation. \n No additional event structure applies. */ + BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST, /**< Exchange MTU Request. \n Reply with @ref sd_ble_gatts_exchange_mtu_reply. \n See @ref ble_gatts_evt_exchange_mtu_request_t. */ + BLE_GATTS_EVT_TIMEOUT, /**< Peer failed to respond to an ATT request in time. \n See @ref ble_gatts_evt_timeout_t. */ + BLE_GATTS_EVT_HVN_TX_COMPLETE /**< Handle Value Notification transmission complete. \n See @ref ble_gatts_evt_hvn_tx_complete_t. */ +}; + +/**@brief GATTS Configuration IDs. + * + * IDs that uniquely identify a GATTS configuration. + */ +enum BLE_GATTS_CFGS +{ + BLE_GATTS_CFG_SERVICE_CHANGED = BLE_GATTS_CFG_BASE, /**< Service changed configuration. */ + BLE_GATTS_CFG_ATTR_TAB_SIZE, /**< Attribute table size configuration. */ +}; + +/** @} */ + +/** @addtogroup BLE_GATTS_DEFINES Defines + * @{ */ + +/** @defgroup BLE_ERRORS_GATTS SVC return values specific to GATTS + * @{ */ +#define BLE_ERROR_GATTS_INVALID_ATTR_TYPE (NRF_GATTS_ERR_BASE + 0x000) /**< Invalid attribute type. */ +#define BLE_ERROR_GATTS_SYS_ATTR_MISSING (NRF_GATTS_ERR_BASE + 0x001) /**< System Attributes missing. */ +/** @} */ + +/** @defgroup BLE_GATTS_ATTR_LENS_MAX Maximum attribute lengths + * @{ */ +#define BLE_GATTS_FIX_ATTR_LEN_MAX (510) /**< Maximum length for fixed length Attribute Values. */ +#define BLE_GATTS_VAR_ATTR_LEN_MAX (512) /**< Maximum length for variable length Attribute Values. */ +/** @} */ + +/** @defgroup BLE_GATTS_SRVC_TYPES GATT Server Service Types + * @{ */ +#define BLE_GATTS_SRVC_TYPE_INVALID 0x00 /**< Invalid Service Type. */ +#define BLE_GATTS_SRVC_TYPE_PRIMARY 0x01 /**< Primary Service. */ +#define BLE_GATTS_SRVC_TYPE_SECONDARY 0x02 /**< Secondary Type. */ +/** @} */ + + +/** @defgroup BLE_GATTS_ATTR_TYPES GATT Server Attribute Types + * @{ */ +#define BLE_GATTS_ATTR_TYPE_INVALID 0x00 /**< Invalid Attribute Type. */ +#define BLE_GATTS_ATTR_TYPE_PRIM_SRVC_DECL 0x01 /**< Primary Service Declaration. */ +#define BLE_GATTS_ATTR_TYPE_SEC_SRVC_DECL 0x02 /**< Secondary Service Declaration. */ +#define BLE_GATTS_ATTR_TYPE_INC_DECL 0x03 /**< Include Declaration. */ +#define BLE_GATTS_ATTR_TYPE_CHAR_DECL 0x04 /**< Characteristic Declaration. */ +#define BLE_GATTS_ATTR_TYPE_CHAR_VAL 0x05 /**< Characteristic Value. */ +#define BLE_GATTS_ATTR_TYPE_DESC 0x06 /**< Descriptor. */ +#define BLE_GATTS_ATTR_TYPE_OTHER 0x07 /**< Other, non-GATT specific type. */ +/** @} */ + + +/** @defgroup BLE_GATTS_OPS GATT Server Operations + * @{ */ +#define BLE_GATTS_OP_INVALID 0x00 /**< Invalid Operation. */ +#define BLE_GATTS_OP_WRITE_REQ 0x01 /**< Write Request. */ +#define BLE_GATTS_OP_WRITE_CMD 0x02 /**< Write Command. */ +#define BLE_GATTS_OP_SIGN_WRITE_CMD 0x03 /**< Signed Write Command. */ +#define BLE_GATTS_OP_PREP_WRITE_REQ 0x04 /**< Prepare Write Request. */ +#define BLE_GATTS_OP_EXEC_WRITE_REQ_CANCEL 0x05 /**< Execute Write Request: Cancel all prepared writes. */ +#define BLE_GATTS_OP_EXEC_WRITE_REQ_NOW 0x06 /**< Execute Write Request: Immediately execute all prepared writes. */ +/** @} */ + +/** @defgroup BLE_GATTS_VLOCS GATT Value Locations + * @{ */ +#define BLE_GATTS_VLOC_INVALID 0x00 /**< Invalid Location. */ +#define BLE_GATTS_VLOC_STACK 0x01 /**< Attribute Value is located in stack memory, no user memory is required. */ +#define BLE_GATTS_VLOC_USER 0x02 /**< Attribute Value is located in user memory. This requires the user to maintain a valid buffer through the lifetime of the attribute, since the stack + will read and write directly to the memory using the pointer provided in the APIs. There are no alignment requirements for the buffer. */ +/** @} */ + +/** @defgroup BLE_GATTS_AUTHORIZE_TYPES GATT Server Authorization Types + * @{ */ +#define BLE_GATTS_AUTHORIZE_TYPE_INVALID 0x00 /**< Invalid Type. */ +#define BLE_GATTS_AUTHORIZE_TYPE_READ 0x01 /**< Authorize a Read Operation. */ +#define BLE_GATTS_AUTHORIZE_TYPE_WRITE 0x02 /**< Authorize a Write Request Operation. */ +/** @} */ + +/** @defgroup BLE_GATTS_SYS_ATTR_FLAGS System Attribute Flags + * @{ */ +#define BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS (1 << 0) /**< Restrict system attributes to system services only. */ +#define BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS (1 << 1) /**< Restrict system attributes to user services only. */ +/** @} */ + +/** @defgroup BLE_GATTS_SERVICE_CHANGED Service Changed Inclusion Values + * @{ + */ +#define BLE_GATTS_SERVICE_CHANGED_DEFAULT (1) /**< Default is to include the Service Changed characteristic in the Attribute Table. */ +/** @} */ + +/** @defgroup BLE_GATTS_ATTR_TAB_SIZE Attribute Table size + * @{ + */ +#define BLE_GATTS_ATTR_TAB_SIZE_MIN (248) /**< Minimum Attribute Table size */ +#define BLE_GATTS_ATTR_TAB_SIZE_DEFAULT (1408) /**< Default Attribute Table size. */ +/** @} */ + +/** @defgroup BLE_GATTS_DEFAULTS GATT Server defaults + * @{ + */ +#define BLE_GATTS_HVN_TX_QUEUE_SIZE_DEFAULT 1 /**< Default number of Handle Value Notifications that can be queued for transmission. */ +/** @} */ + +/** @} */ + +/** @addtogroup BLE_GATTS_STRUCTURES Structures + * @{ */ + +/** + * @brief BLE GATTS connection configuration parameters, set with @ref sd_ble_cfg_set. + */ +typedef struct +{ + uint8_t hvn_tx_queue_size; /**< Minimum guaranteed number of Handle Value Notifications that can be queued for transmission. + The default value is @ref BLE_GATTS_HVN_TX_QUEUE_SIZE_DEFAULT */ +} ble_gatts_conn_cfg_t; + +/**@brief Attribute metadata. */ +typedef struct +{ + ble_gap_conn_sec_mode_t read_perm; /**< Read permissions. */ + ble_gap_conn_sec_mode_t write_perm; /**< Write permissions. */ + uint8_t vlen :1; /**< Variable length attribute. */ + uint8_t vloc :2; /**< Value location, see @ref BLE_GATTS_VLOCS.*/ + uint8_t rd_auth :1; /**< Read authorization and value will be requested from the application on every read operation. */ + uint8_t wr_auth :1; /**< Write authorization will be requested from the application on every Write Request operation (but not Write Command). */ +} ble_gatts_attr_md_t; + + +/**@brief GATT Attribute. */ +typedef struct +{ + ble_uuid_t const *p_uuid; /**< Pointer to the attribute UUID. */ + ble_gatts_attr_md_t const *p_attr_md; /**< Pointer to the attribute metadata structure. */ + uint16_t init_len; /**< Initial attribute value length in bytes. */ + uint16_t init_offs; /**< Initial attribute value offset in bytes. If different from zero, the first init_offs bytes of the attribute value will be left uninitialized. */ + uint16_t max_len; /**< Maximum attribute value length in bytes, see @ref BLE_GATTS_ATTR_LENS_MAX for maximum values. */ + uint8_t *p_value; /**< Pointer to the attribute data. Please note that if the @ref BLE_GATTS_VLOC_USER value location is selected in the attribute metadata, this will have to point to a buffer + that remains valid through the lifetime of the attribute. This excludes usage of automatic variables that may go out of scope or any other temporary location. + The stack may access that memory directly without the application's knowledge. For writable characteristics, this value must not be a location in flash memory.*/ +} ble_gatts_attr_t; + +/**@brief GATT Attribute Value. */ +typedef struct +{ + uint16_t len; /**< Length in bytes to be written or read. Length in bytes written or read after successful return.*/ + uint16_t offset; /**< Attribute value offset. */ + uint8_t *p_value; /**< Pointer to where value is stored or will be stored. + If value is stored in user memory, only the attribute length is updated when p_value == NULL. + Set to NULL when reading to obtain the complete length of the attribute value */ +} ble_gatts_value_t; + + +/**@brief GATT Characteristic Presentation Format. */ +typedef struct +{ + uint8_t format; /**< Format of the value, see @ref BLE_GATT_CPF_FORMATS. */ + int8_t exponent; /**< Exponent for integer data types. */ + uint16_t unit; /**< Unit from Bluetooth Assigned Numbers. */ + uint8_t name_space; /**< Namespace from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */ + uint16_t desc; /**< Namespace description from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */ +} ble_gatts_char_pf_t; + + +/**@brief GATT Characteristic metadata. */ +typedef struct +{ + ble_gatt_char_props_t char_props; /**< Characteristic Properties. */ + ble_gatt_char_ext_props_t char_ext_props; /**< Characteristic Extended Properties. */ + uint8_t const *p_char_user_desc; /**< Pointer to a UTF-8 encoded string (non-NULL terminated), NULL if the descriptor is not required. */ + uint16_t char_user_desc_max_size; /**< The maximum size in bytes of the user description descriptor. */ + uint16_t char_user_desc_size; /**< The size of the user description, must be smaller or equal to char_user_desc_max_size. */ + ble_gatts_char_pf_t const *p_char_pf; /**< Pointer to a presentation format structure or NULL if the CPF descriptor is not required. */ + ble_gatts_attr_md_t const *p_user_desc_md; /**< Attribute metadata for the User Description descriptor, or NULL for default values. */ + ble_gatts_attr_md_t const *p_cccd_md; /**< Attribute metadata for the Client Characteristic Configuration Descriptor, or NULL for default values. */ + ble_gatts_attr_md_t const *p_sccd_md; /**< Attribute metadata for the Server Characteristic Configuration Descriptor, or NULL for default values. */ +} ble_gatts_char_md_t; + + +/**@brief GATT Characteristic Definition Handles. */ +typedef struct +{ + uint16_t value_handle; /**< Handle to the characteristic value. */ + uint16_t user_desc_handle; /**< Handle to the User Description descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ + uint16_t cccd_handle; /**< Handle to the Client Characteristic Configuration Descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ + uint16_t sccd_handle; /**< Handle to the Server Characteristic Configuration Descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ +} ble_gatts_char_handles_t; + + +/**@brief GATT HVx parameters. */ +typedef struct +{ + uint16_t handle; /**< Characteristic Value Handle. */ + uint8_t type; /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */ + uint16_t offset; /**< Offset within the attribute value. */ + uint16_t *p_len; /**< Length in bytes to be written, length in bytes written after return. */ + uint8_t const *p_data; /**< Actual data content, use NULL to use the current attribute value. */ +} ble_gatts_hvx_params_t; + +/**@brief GATT Authorization parameters. */ +typedef struct +{ + uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ + uint8_t update : 1; /**< If set, data supplied in p_data will be used to update the attribute value. + Please note that for @ref BLE_GATTS_AUTHORIZE_TYPE_WRITE operations this bit must always be set, + as the data to be written needs to be stored and later provided by the application. */ + uint16_t offset; /**< Offset of the attribute value being updated. */ + uint16_t len; /**< Length in bytes of the value in p_data pointer, see @ref BLE_GATTS_ATTR_LENS_MAX. */ + uint8_t const *p_data; /**< Pointer to new value used to update the attribute value. */ +} ble_gatts_authorize_params_t; + +/**@brief GATT Read or Write Authorize Reply parameters. */ +typedef struct +{ + uint8_t type; /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */ + union { + ble_gatts_authorize_params_t read; /**< Read authorization parameters. */ + ble_gatts_authorize_params_t write; /**< Write authorization parameters. */ + } params; /**< Reply Parameters. */ +} ble_gatts_rw_authorize_reply_params_t; + +/**@brief Service Changed Inclusion configuration parameters, set with @ref sd_ble_cfg_set. */ +typedef struct +{ + uint8_t service_changed : 1; /**< If 1, include the Service Changed characteristic in the Attribute Table. Default is @ref BLE_GATTS_SERVICE_CHANGED_DEFAULT. */ +} ble_gatts_cfg_service_changed_t; + +/**@brief Attribute table size configuration parameters, set with @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_INVALID_LENGTH One or more of the following is true: + * - The specified Attribute Table size is too small. + * The minimum acceptable size is defined by @ref BLE_GATTS_ATTR_TAB_SIZE_MIN. + * - The specified Attribute Table size is not a multiple of 4. + */ +typedef struct +{ + uint32_t attr_tab_size; /**< Attribute table size. Default is @ref BLE_GATTS_ATTR_TAB_SIZE_DEFAULT, minimum is @ref BLE_GATTS_ATTR_TAB_SIZE_MIN. */ +} ble_gatts_cfg_attr_tab_size_t; + +/**@brief Config structure for GATTS configurations. */ +typedef union +{ + ble_gatts_cfg_service_changed_t service_changed; /**< Include service changed characteristic, cfg_id is @ref BLE_GATTS_CFG_SERVICE_CHANGED. */ + ble_gatts_cfg_attr_tab_size_t attr_tab_size; /**< Attribute table size, cfg_id is @ref BLE_GATTS_CFG_ATTR_TAB_SIZE. */ +} ble_gatts_cfg_t; + + +/**@brief Event structure for @ref BLE_GATTS_EVT_WRITE. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + ble_uuid_t uuid; /**< Attribute UUID. */ + uint8_t op; /**< Type of write operation, see @ref BLE_GATTS_OPS. */ + uint8_t auth_required; /**< Writing operation deferred due to authorization requirement. Application may use @ref sd_ble_gatts_value_set to finalize the writing operation. */ + uint16_t offset; /**< Offset for the write operation. */ + uint16_t len; /**< Length of the received data. */ + uint8_t data[1]; /**< Received data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gatts_evt_write_t; + +/**@brief Event substructure for authorized read requests, see @ref ble_gatts_evt_rw_authorize_request_t. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + ble_uuid_t uuid; /**< Attribute UUID. */ + uint16_t offset; /**< Offset for the read operation. */ +} ble_gatts_evt_read_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST. */ +typedef struct +{ + uint8_t type; /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */ + union { + ble_gatts_evt_read_t read; /**< Attribute Read Parameters. */ + ble_gatts_evt_write_t write; /**< Attribute Write Parameters. */ + } request; /**< Request Parameters. */ +} ble_gatts_evt_rw_authorize_request_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_SYS_ATTR_MISSING. */ +typedef struct +{ + uint8_t hint; /**< Hint (currently unused). */ +} ble_gatts_evt_sys_attr_missing_t; + + +/**@brief Event structure for @ref BLE_GATTS_EVT_HVC. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ +} ble_gatts_evt_hvc_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST. */ +typedef struct +{ + uint16_t client_rx_mtu; /**< Client RX MTU size. */ +} ble_gatts_evt_exchange_mtu_request_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_TIMEOUT. */ +typedef struct +{ + uint8_t src; /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */ +} ble_gatts_evt_timeout_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_HVN_TX_COMPLETE. */ +typedef struct +{ + uint8_t count; /**< Number of notification transmissions completed. */ +} ble_gatts_evt_hvn_tx_complete_t; + +/**@brief GATTS event structure. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which the event occurred. */ + union + { + ble_gatts_evt_write_t write; /**< Write Event Parameters. */ + ble_gatts_evt_rw_authorize_request_t authorize_request; /**< Read or Write Authorize Request Parameters. */ + ble_gatts_evt_sys_attr_missing_t sys_attr_missing; /**< System attributes missing. */ + ble_gatts_evt_hvc_t hvc; /**< Handle Value Confirmation Event Parameters. */ + ble_gatts_evt_exchange_mtu_request_t exchange_mtu_request; /**< Exchange MTU Request Event Parameters. */ + ble_gatts_evt_timeout_t timeout; /**< Timeout Event. */ + ble_gatts_evt_hvn_tx_complete_t hvn_tx_complete; /**< Handle Value Notification transmission complete Event Parameters. */ + } params; /**< Event Parameters. */ +} ble_gatts_evt_t; + +/** @} */ + +/** @addtogroup BLE_GATTS_FUNCTIONS Functions + * @{ */ + +/**@brief Add a service declaration to the Attribute Table. + * + * @note Secondary Services are only relevant in the context of the entity that references them, it is therefore forbidden to + * add a secondary service declaration that is not referenced by another service later in the Attribute Table. + * + * @mscs + * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} + * @endmscs + * + * @param[in] type Toggles between primary and secondary services, see @ref BLE_GATTS_SRVC_TYPES. + * @param[in] p_uuid Pointer to service UUID. + * @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored. + * + * @retval ::NRF_SUCCESS Successfully added a service declaration. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, Vendor Specific UUIDs need to be present in the table. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + */ +SVCALL(SD_BLE_GATTS_SERVICE_ADD, uint32_t, sd_ble_gatts_service_add(uint8_t type, ble_uuid_t const *p_uuid, uint16_t *p_handle)); + + +/**@brief Add an include declaration to the Attribute Table. + * + * @note It is currently only possible to add an include declaration to the last added service (i.e. only sequential population is supported at this time). + * + * @note The included service must already be present in the Attribute Table prior to this call. + * + * @mscs + * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} + * @endmscs + * + * @param[in] service_handle Handle of the service where the included service is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. + * @param[in] inc_srvc_handle Handle of the included service. + * @param[out] p_include_handle Pointer to a 16-bit word where the assigned handle will be stored. + * + * @retval ::NRF_SUCCESS Successfully added an include declaration. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, handle values need to match previously added services. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::NRF_ERROR_NOT_SUPPORTED Feature is not supported, service_handle must be that of the last added service. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, self inclusions are not allowed. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. + */ +SVCALL(SD_BLE_GATTS_INCLUDE_ADD, uint32_t, sd_ble_gatts_include_add(uint16_t service_handle, uint16_t inc_srvc_handle, uint16_t *p_include_handle)); + + +/**@brief Add a characteristic declaration, a characteristic value declaration and optional characteristic descriptor declarations to the Attribute Table. + * + * @note It is currently only possible to add a characteristic to the last added service (i.e. only sequential population is supported at this time). + * + * @note Several restrictions apply to the parameters, such as matching permissions between the user description descriptor and the writable auxiliaries bits, + * readable (no security) and writable (selectable) CCCDs and SCCDs and valid presentation format values. + * + * @note If no metadata is provided for the optional descriptors, their permissions will be derived from the characteristic permissions. + * + * @mscs + * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} + * @endmscs + * + * @param[in] service_handle Handle of the service where the characteristic is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. + * @param[in] p_char_md Characteristic metadata. + * @param[in] p_attr_char_value Pointer to the attribute structure corresponding to the characteristic value. + * @param[out] p_handles Pointer to the structure where the assigned handles will be stored. + * + * @retval ::NRF_SUCCESS Successfully added a characteristic. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, service handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a service context is required. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. + */ +SVCALL(SD_BLE_GATTS_CHARACTERISTIC_ADD, uint32_t, sd_ble_gatts_characteristic_add(uint16_t service_handle, ble_gatts_char_md_t const *p_char_md, ble_gatts_attr_t const *p_attr_char_value, ble_gatts_char_handles_t *p_handles)); + + +/**@brief Add a descriptor to the Attribute Table. + * + * @note It is currently only possible to add a descriptor to the last added characteristic (i.e. only sequential population is supported at this time). + * + * @mscs + * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} + * @endmscs + * + * @param[in] char_handle Handle of the characteristic where the descriptor is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. + * @param[in] p_attr Pointer to the attribute structure. + * @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored. + * + * @retval ::NRF_SUCCESS Successfully added a descriptor. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, characteristic handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a characteristic context is required. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. + */ +SVCALL(SD_BLE_GATTS_DESCRIPTOR_ADD, uint32_t, sd_ble_gatts_descriptor_add(uint16_t char_handle, ble_gatts_attr_t const *p_attr, uint16_t *p_handle)); + +/**@brief Set the value of a given attribute. + * + * @note Values other than system attributes can be set at any time, regardless of whether any active connections exist. + * + * @mscs + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. Ignored if the value does not belong to a system attribute. + * @param[in] handle Attribute handle. + * @param[in,out] p_value Attribute value information. + * + * @retval ::NRF_SUCCESS Successfully set the value of the attribute. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden handle supplied, certain attributes are not modifiable by the application. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied on a system attribute. + */ +SVCALL(SD_BLE_GATTS_VALUE_SET, uint32_t, sd_ble_gatts_value_set(uint16_t conn_handle, uint16_t handle, ble_gatts_value_t *p_value)); + +/**@brief Get the value of a given attribute. + * + * @note If the attribute value is longer than the size of the supplied buffer, + * @ref ble_gatts_value_t::len will return the total attribute value length (excluding offset), + * and not the number of bytes actually returned in @ref ble_gatts_value_t::p_value. + * The application may use this information to allocate a suitable buffer size. + * + * @note When retrieving system attribute values with this function, the connection handle + * may refer to an already disconnected connection. Refer to the documentation of + * @ref sd_ble_gatts_sys_attr_get for further information. + * + * @param[in] conn_handle Connection handle. Ignored if the value does not belong to a system attribute. + * @param[in] handle Attribute handle. + * @param[in,out] p_value Attribute value information. + * + * @retval ::NRF_SUCCESS Successfully retrieved the value of the attribute. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid attribute offset supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied on a system attribute. + * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. + */ +SVCALL(SD_BLE_GATTS_VALUE_GET, uint32_t, sd_ble_gatts_value_get(uint16_t conn_handle, uint16_t handle, ble_gatts_value_t *p_value)); + +/**@brief Notify or Indicate an attribute value. + * + * @details This function checks for the relevant Client Characteristic Configuration descriptor value to verify that the relevant operation + * (notification or indication) has been enabled by the client. It is also able to update the attribute value before issuing the PDU, so that + * the application can atomically perform a value update and a server initiated transaction with a single API call. + * + * @note The local attribute value may be updated even if an outgoing packet is not sent to the peer due to an error during execution. + * The Attribute Table has been updated if one of the following error codes is returned: @ref NRF_ERROR_INVALID_STATE, @ref NRF_ERROR_BUSY, + * @ref NRF_ERROR_FORBIDDEN, @ref BLE_ERROR_GATTS_SYS_ATTR_MISSING and @ref NRF_ERROR_RESOURCES. + * The caller can check whether the value has been updated by looking at the contents of *(@ref ble_gatts_hvx_params_t::p_len). + * + * @note Only one indication procedure can be ongoing per connection at a time. + * If the application tries to indicate an attribute value while another indication procedure is ongoing, + * the function call will return @ref NRF_ERROR_BUSY. + * A @ref BLE_GATTS_EVT_HVC event will be issued as soon as the confirmation arrives from the peer. + * + * @note The number of Handle Value Notifications that can be queued is configured by @ref ble_gatts_conn_cfg_t::hvn_tx_queue_size + * When the queue is full, the function call will return @ref NRF_ERROR_RESOURCES. + * A @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event will be issued as soon as the transmission of the notification is complete. + * + * @note The application can keep track of the available queue element count for notifications by following the procedure below: + * - Store initial queue element count in a variable. + * - Decrement the variable, which stores the currently available queue element count, by one when a call to this function returns @ref NRF_SUCCESS. + * - Increment the variable, which stores the current available queue element count, by the count variable in @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event. + * + * @events + * @event{@ref BLE_GATTS_EVT_HVN_TX_COMPLETE, Notification transmission complete.} + * @event{@ref BLE_GATTS_EVT_HVC, Confirmation received from the peer.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC} + * @mmsc{@ref BLE_GATTS_HVN_MSC} + * @mmsc{@ref BLE_GATTS_HVI_MSC} + * @mmsc{@ref BLE_GATTS_HVX_DISABLED_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in,out] p_hvx_params Pointer to an HVx parameters structure. If @ref ble_gatts_hvx_params_t::p_data + * contains a non-NULL pointer the attribute value will be updated with the contents + * pointed by it before sending the notification or indication. If the attribute value + * is updated, @ref ble_gatts_hvx_params_t::p_len is updated by the SoftDevice to + * contain the number of actual bytes written, else it will be set to 0. + * + * @retval ::NRF_SUCCESS Successfully queued a notification or indication for transmission, and optionally updated the attribute value. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE One or more of the following is true: + * - Invalid Connection State + * - Notifications and/or indications not enabled in the CCCD + * - An ATT_MTU exchange is ongoing + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied. Only attributes added directly by the application are available to notify and indicate. + * @retval ::BLE_ERROR_GATTS_INVALID_ATTR_TYPE Invalid attribute type(s) supplied, only characteristic values may be notified and indicated. + * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. + * @retval ::NRF_ERROR_FORBIDDEN The connection's current security level is lower than the one required by the write permissions of the CCCD associated with this characteristic. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. + * @retval ::NRF_ERROR_BUSY For @ref BLE_GATT_HVX_INDICATION Procedure already in progress. Wait for a @ref BLE_GATTS_EVT_HVC event and retry. + * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. + * @retval ::NRF_ERROR_RESOURCES Too many notifications queued. + * Wait for a @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event and retry. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTS_HVX, uint32_t, sd_ble_gatts_hvx(uint16_t conn_handle, ble_gatts_hvx_params_t const *p_hvx_params)); + +/**@brief Indicate the Service Changed attribute value. + * + * @details This call will send a Handle Value Indication to one or more peers connected to inform them that the Attribute + * Table layout has changed. As soon as the peer has confirmed the indication, a @ref BLE_GATTS_EVT_SC_CONFIRM event will + * be issued. + * + * @note Some of the restrictions and limitations that apply to @ref sd_ble_gatts_hvx also apply here. + * + * @events + * @event{@ref BLE_GATTS_EVT_SC_CONFIRM, Confirmation of attribute table change received from peer.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTS_SC_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] start_handle Start of affected attribute handle range. + * @param[in] end_handle End of affected attribute handle range. + * + * @retval ::NRF_SUCCESS Successfully queued the Service Changed indication for transmission. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_NOT_SUPPORTED Service Changed not enabled at initialization. See @ref + * sd_ble_cfg_set and @ref ble_gatts_cfg_service_changed_t. + * @retval ::NRF_ERROR_INVALID_STATE One or more of the following is true: + * - Invalid Connection State + * - Notifications and/or indications not enabled in the CCCD + * - An ATT_MTU exchange is ongoing + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied, handles must be in the range populated by the application. + * @retval ::NRF_ERROR_BUSY Procedure already in progress. + * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTS_SERVICE_CHANGED, uint32_t, sd_ble_gatts_service_changed(uint16_t conn_handle, uint16_t start_handle, uint16_t end_handle)); + +/**@brief Respond to a Read/Write authorization request. + * + * @note This call should only be used as a response to a @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST event issued to the application. + * + * @mscs + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} + * @mmsc{@ref BLE_GATTS_READ_REQ_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_WRITE_REQ_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_PEER_CANCEL_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_rw_authorize_reply_params Pointer to a structure with the attribute provided by the application. + * + * @note @ref ble_gatts_authorize_params_t::p_data is ignored when this function is used to respond + * to a @ref BLE_GATTS_AUTHORIZE_TYPE_READ event if @ref ble_gatts_authorize_params_t::update + * is set to 0. + * + * @retval ::NRF_SUCCESS Successfully queued a response to the peer, and in the case of a write operation, Attribute Table updated. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no authorization request pending. + * @retval ::NRF_ERROR_INVALID_PARAM Authorization op invalid, + * handle supplied does not match requested handle, + * or invalid data to be written provided by the application. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTS_RW_AUTHORIZE_REPLY, uint32_t, sd_ble_gatts_rw_authorize_reply(uint16_t conn_handle, ble_gatts_rw_authorize_reply_params_t const *p_rw_authorize_reply_params)); + + +/**@brief Update persistent system attribute information. + * + * @details Supply information about persistent system attributes to the stack, + * previously obtained using @ref sd_ble_gatts_sys_attr_get. + * This call is only allowed for active connections, and is usually + * made immediately after a connection is established with an known bonded device, + * often as a response to a @ref BLE_GATTS_EVT_SYS_ATTR_MISSING. + * + * p_sysattrs may point directly to the application's stored copy of the system attributes + * obtained using @ref sd_ble_gatts_sys_attr_get. + * If the pointer is NULL, the system attribute info is initialized, assuming that + * the application does not have any previously saved system attribute data for this device. + * + * @note The state of persistent system attributes is reset upon connection establishment and then remembered for its duration. + * + * @note If this call returns with an error code different from @ref NRF_SUCCESS, the storage of persistent system attributes may have been completed only partially. + * This means that the state of the attribute table is undefined, and the application should either provide a new set of attributes using this same call or + * reset the SoftDevice to return to a known state. + * + * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS is used with this function, only the system attributes included in system services will be modified. + * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS is used with this function, only the system attributes included in user services will be modified. + * + * @mscs + * @mmsc{@ref BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC} + * @mmsc{@ref BLE_GATTS_SYS_ATTRS_UNK_PEER_MSC} + * @mmsc{@ref BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_sys_attr_data Pointer to a saved copy of system attributes supplied to the stack, or NULL. + * @param[in] len Size of data pointed by p_sys_attr_data, in octets. + * @param[in] flags Optional additional flags, see @ref BLE_GATTS_SYS_ATTR_FLAGS + * + * @retval ::NRF_SUCCESS Successfully set the system attribute information. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid flags supplied. + * @retval ::NRF_ERROR_INVALID_DATA Invalid data supplied, the data should be exactly the same as retrieved with @ref sd_ble_gatts_sys_attr_get. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + */ +SVCALL(SD_BLE_GATTS_SYS_ATTR_SET, uint32_t, sd_ble_gatts_sys_attr_set(uint16_t conn_handle, uint8_t const *p_sys_attr_data, uint16_t len, uint32_t flags)); + + +/**@brief Retrieve persistent system attribute information from the stack. + * + * @details This call is used to retrieve information about values to be stored persistently by the application + * during the lifetime of a connection or after it has been terminated. When a new connection is established with the same bonded device, + * the system attribute information retrieved with this function should be restored using using @ref sd_ble_gatts_sys_attr_set. + * If retrieved after disconnection, the data should be read before a new connection established. The connection handle for + * the previous, now disconnected, connection will remain valid until a new one is created to allow this API call to refer to it. + * Connection handles belonging to active connections can be used as well, but care should be taken since the system attributes + * may be written to at any time by the peer during a connection's lifetime. + * + * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS is used with this function, only the system attributes included in system services will be returned. + * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS is used with this function, only the system attributes included in user services will be returned. + * + * @mscs + * @mmsc{@ref BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle of the recently terminated connection. + * @param[out] p_sys_attr_data Pointer to a buffer where updated information about system attributes will be filled in. The format of the data is described + * in @ref BLE_GATTS_SYS_ATTRS_FORMAT. NULL can be provided to obtain the length of the data. + * @param[in,out] p_len Size of application buffer if p_sys_attr_data is not NULL. Unconditionally updated to actual length of system attribute data. + * @param[in] flags Optional additional flags, see @ref BLE_GATTS_SYS_ATTR_FLAGS + * + * @retval ::NRF_SUCCESS Successfully retrieved the system attribute information. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid flags supplied. + * @retval ::NRF_ERROR_DATA_SIZE The system attribute information did not fit into the provided buffer. + * @retval ::NRF_ERROR_NOT_FOUND No system attributes found. + */ +SVCALL(SD_BLE_GATTS_SYS_ATTR_GET, uint32_t, sd_ble_gatts_sys_attr_get(uint16_t conn_handle, uint8_t *p_sys_attr_data, uint16_t *p_len, uint32_t flags)); + + +/**@brief Retrieve the first valid user attribute handle. + * + * @param[out] p_handle Pointer to an integer where the handle will be stored. + * + * @retval ::NRF_SUCCESS Successfully retrieved the handle. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + */ +SVCALL(SD_BLE_GATTS_INITIAL_USER_HANDLE_GET, uint32_t, sd_ble_gatts_initial_user_handle_get(uint16_t *p_handle)); + +/**@brief Retrieve the attribute UUID and/or metadata. + * + * @param[in] handle Attribute handle + * @param[out] p_uuid UUID of the attribute. Use NULL to omit this field. + * @param[out] p_md Metadata of the attribute. Use NULL to omit this field. + * + * @retval ::NRF_SUCCESS Successfully retrieved the attribute metadata, + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameters supplied. Returned when both @c p_uuid and @c p_md are NULL. + * @retval ::NRF_ERROR_NOT_FOUND Attribute was not found. + */ +SVCALL(SD_BLE_GATTS_ATTR_GET, uint32_t, sd_ble_gatts_attr_get(uint16_t handle, ble_uuid_t * p_uuid, ble_gatts_attr_md_t * p_md)); + +/**@brief Reply to an ATT_MTU exchange request by sending an Exchange MTU Response to the client. + * + * @details This function is only used to reply to a @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST event. + * + * @details The SoftDevice sets ATT_MTU to the minimum of: + * - The Client RX MTU value from @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST, and + * - The Server RX MTU value. + * + * However, the SoftDevice never sets ATT_MTU lower than @ref BLE_GATT_ATT_MTU_DEFAULT. + * + * @mscs + * @mmsc{@ref BLE_GATTS_MTU_EXCHANGE} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] server_rx_mtu Server RX MTU size. + * - The minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. + * - The maximum value is @ref ble_gatt_conn_cfg_t::att_mtu in the connection configuration + * used for this connection. + * - The value must be equal to Client RX MTU size given in @ref sd_ble_gattc_exchange_mtu_request + * if an ATT_MTU exchange has already been performed in the other direction. + * + * @retval ::NRF_SUCCESS Successfully sent response to the client. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no ATT_MTU exchange request pending. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid Server RX MTU size supplied. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTS_EXCHANGE_MTU_REPLY, uint32_t, sd_ble_gatts_exchange_mtu_reply(uint16_t conn_handle, uint16_t server_rx_mtu)); +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // BLE_GATTS_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_hci.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_hci.h new file mode 100644 index 00000000000..f0dde9a03ad --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_hci.h @@ -0,0 +1,135 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON + @{ +*/ + + +#ifndef BLE_HCI_H__ +#define BLE_HCI_H__ +#ifdef __cplusplus +extern "C" { +#endif + +/** @defgroup BLE_HCI_STATUS_CODES Bluetooth status codes + * @{ */ + +#define BLE_HCI_STATUS_CODE_SUCCESS 0x00 /**< Success. */ +#define BLE_HCI_STATUS_CODE_UNKNOWN_BTLE_COMMAND 0x01 /**< Unknown BLE Command. */ +#define BLE_HCI_STATUS_CODE_UNKNOWN_CONNECTION_IDENTIFIER 0x02 /**< Unknown Connection Identifier. */ +/*0x03 Hardware Failure +0x04 Page Timeout +*/ +#define BLE_HCI_AUTHENTICATION_FAILURE 0x05 /**< Authentication Failure. */ +#define BLE_HCI_STATUS_CODE_PIN_OR_KEY_MISSING 0x06 /**< Pin or Key missing. */ +#define BLE_HCI_MEMORY_CAPACITY_EXCEEDED 0x07 /**< Memory Capacity Exceeded. */ +#define BLE_HCI_CONNECTION_TIMEOUT 0x08 /**< Connection Timeout. */ +/*0x09 Connection Limit Exceeded +0x0A Synchronous Connection Limit To A Device Exceeded +0x0B ACL Connection Already Exists*/ +#define BLE_HCI_STATUS_CODE_COMMAND_DISALLOWED 0x0C /**< Command Disallowed. */ +/*0x0D Connection Rejected due to Limited Resources +0x0E Connection Rejected Due To Security Reasons +0x0F Connection Rejected due to Unacceptable BD_ADDR +0x10 Connection Accept Timeout Exceeded +0x11 Unsupported Feature or Parameter Value*/ +#define BLE_HCI_STATUS_CODE_INVALID_BTLE_COMMAND_PARAMETERS 0x12 /**< Invalid BLE Command Parameters. */ +#define BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION 0x13 /**< Remote User Terminated Connection. */ +#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_LOW_RESOURCES 0x14 /**< Remote Device Terminated Connection due to low resources.*/ +#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_POWER_OFF 0x15 /**< Remote Device Terminated Connection due to power off. */ +#define BLE_HCI_LOCAL_HOST_TERMINATED_CONNECTION 0x16 /**< Local Host Terminated Connection. */ +/* +0x17 Repeated Attempts +0x18 Pairing Not Allowed +0x19 Unknown LMP PDU +*/ +#define BLE_HCI_UNSUPPORTED_REMOTE_FEATURE 0x1A /**< Unsupported Remote Feature. */ +/* +0x1B SCO Offset Rejected +0x1C SCO Interval Rejected +0x1D SCO Air Mode Rejected*/ +#define BLE_HCI_STATUS_CODE_INVALID_LMP_PARAMETERS 0x1E /**< Invalid LMP Parameters. */ +#define BLE_HCI_STATUS_CODE_UNSPECIFIED_ERROR 0x1F /**< Unspecified Error. */ +/*0x20 Unsupported LMP Parameter Value +0x21 Role Change Not Allowed +*/ +#define BLE_HCI_STATUS_CODE_LMP_RESPONSE_TIMEOUT 0x22 /**< LMP Response Timeout. */ +#define BLE_HCI_STATUS_CODE_LMP_ERROR_TRANSACTION_COLLISION 0x23 /**< LMP Error Transaction Collision/LL Procedure Collision. */ +#define BLE_HCI_STATUS_CODE_LMP_PDU_NOT_ALLOWED 0x24 /**< LMP PDU Not Allowed. */ +/*0x25 Encryption Mode Not Acceptable +0x26 Link Key Can Not be Changed +0x27 Requested QoS Not Supported +*/ +#define BLE_HCI_INSTANT_PASSED 0x28 /**< Instant Passed. */ +#define BLE_HCI_PAIRING_WITH_UNIT_KEY_UNSUPPORTED 0x29 /**< Pairing with Unit Key Unsupported. */ +#define BLE_HCI_DIFFERENT_TRANSACTION_COLLISION 0x2A /**< Different Transaction Collision. */ +/* +0x2B Reserved +0x2C QoS Unacceptable Parameter +0x2D QoS Rejected +0x2E Channel Classification Not Supported +0x2F Insufficient Security +*/ +#define BLE_HCI_PARAMETER_OUT_OF_MANDATORY_RANGE 0x30 /**< Parameter Out Of Mandatory Range. */ +/* +0x31 Reserved +0x32 Role Switch Pending +0x33 Reserved +0x34 Reserved Slot Violation +0x35 Role Switch Failed +0x36 Extended Inquiry Response Too Large +0x37 Secure Simple Pairing Not Supported By Host. +0x38 Host Busy - Pairing +0x39 Connection Rejected due to No Suitable Channel Found*/ +#define BLE_HCI_CONTROLLER_BUSY 0x3A /**< Controller Busy. */ +#define BLE_HCI_CONN_INTERVAL_UNACCEPTABLE 0x3B /**< Connection Interval Unacceptable. */ +#define BLE_HCI_DIRECTED_ADVERTISER_TIMEOUT 0x3C /**< Directed Advertisement Timeout. */ +#define BLE_HCI_CONN_TERMINATED_DUE_TO_MIC_FAILURE 0x3D /**< Connection Terminated due to MIC Failure. */ +#define BLE_HCI_CONN_FAILED_TO_BE_ESTABLISHED 0x3E /**< Connection Failed to be Established. */ + +/** @} */ + + +#ifdef __cplusplus +} +#endif +#endif // BLE_HCI_H__ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_ranges.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_ranges.h new file mode 100644 index 00000000000..493dd43eb53 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_ranges.h @@ -0,0 +1,148 @@ +/* + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON + @{ + @defgroup ble_ranges Module specific SVC, event and option number subranges + @{ + + @brief Definition of SVC, event and option number subranges for each API module. + + @note + SVCs, event and option numbers are split into subranges for each API module. + Each module receives its entire allocated range of SVC calls, whether implemented or not, + but return BLE_ERROR_NOT_SUPPORTED for unimplemented or undefined calls in its range. + + Note that the symbols BLE__SVC_LAST is the end of the allocated SVC range, + rather than the last SVC function call actually defined and implemented. + + Specific SVC, event and option values are defined in each module's ble_.h file, + which defines names of each individual SVC code based on the range start value. +*/ + +#ifndef BLE_RANGES_H__ +#define BLE_RANGES_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#define BLE_SVC_BASE 0x60 /**< Common BLE SVC base. */ +#define BLE_SVC_LAST 0x6B /**< Common BLE SVC last. */ + +#define BLE_GAP_SVC_BASE 0x6C /**< GAP BLE SVC base. */ +#define BLE_GAP_SVC_LAST 0x9A /**< GAP BLE SVC last. */ + +#define BLE_GATTC_SVC_BASE 0x9B /**< GATTC BLE SVC base. */ +#define BLE_GATTC_SVC_LAST 0xA7 /**< GATTC BLE SVC last. */ + +#define BLE_GATTS_SVC_BASE 0xA8 /**< GATTS BLE SVC base. */ +#define BLE_GATTS_SVC_LAST 0xB7 /**< GATTS BLE SVC last. */ + + + +#define BLE_EVT_INVALID 0x00 /**< Invalid BLE Event. */ + +#define BLE_EVT_BASE 0x01 /**< Common BLE Event base. */ +#define BLE_EVT_LAST 0x0F /**< Common BLE Event last. */ + +#define BLE_GAP_EVT_BASE 0x10 /**< GAP BLE Event base. */ +#define BLE_GAP_EVT_LAST 0x2F /**< GAP BLE Event last. */ + +#define BLE_GATTC_EVT_BASE 0x30 /**< GATTC BLE Event base. */ +#define BLE_GATTC_EVT_LAST 0x4F /**< GATTC BLE Event last. */ + +#define BLE_GATTS_EVT_BASE 0x50 /**< GATTS BLE Event base. */ +#define BLE_GATTS_EVT_LAST 0x6F /**< GATTS BLE Event last. */ + + + +#define BLE_OPT_INVALID 0x00 /**< Invalid BLE Option. */ + +#define BLE_OPT_BASE 0x01 /**< Common BLE Option base. */ +#define BLE_OPT_LAST 0x1F /**< Common BLE Option last. */ + +#define BLE_GAP_OPT_BASE 0x20 /**< GAP BLE Option base. */ +#define BLE_GAP_OPT_LAST 0x3F /**< GAP BLE Option last. */ + +#define BLE_GATT_OPT_BASE 0x40 /**< GATT BLE Option base. */ +#define BLE_GATT_OPT_LAST 0x5F /**< GATT BLE Option last. */ + +#define BLE_GATTC_OPT_BASE 0x60 /**< GATTC BLE Option base. */ +#define BLE_GATTC_OPT_LAST 0x7F /**< GATTC BLE Option last. */ + +#define BLE_GATTS_OPT_BASE 0x80 /**< GATTS BLE Option base. */ +#define BLE_GATTS_OPT_LAST 0x9F /**< GATTS BLE Option last. */ + + + +#define BLE_CFG_INVALID 0x00 /**< Invalid BLE configuration. */ + +#define BLE_CFG_BASE 0x01 /**< Common BLE configuration base. */ +#define BLE_CFG_LAST 0x1F /**< Common BLE configuration last. */ + +#define BLE_CONN_CFG_BASE 0x20 /**< BLE connection configuration base. */ +#define BLE_CONN_CFG_LAST 0x3F /**< BLE connection configuration last. */ + +#define BLE_GAP_CFG_BASE 0x40 /**< GAP BLE configuration base. */ +#define BLE_GAP_CFG_LAST 0x5F /**< GAP BLE configuration last. */ + +#define BLE_GATT_CFG_BASE 0x60 /**< GATT BLE configuration base. */ +#define BLE_GATT_CFG_LAST 0x7F /**< GATT BLE configuration last. */ + +#define BLE_GATTC_CFG_BASE 0x80 /**< GATTC BLE configuration base. */ +#define BLE_GATTC_CFG_LAST 0x9F /**< GATTC BLE configuration last. */ + +#define BLE_GATTS_CFG_BASE 0xA0 /**< GATTS BLE configuration base. */ +#define BLE_GATTS_CFG_LAST 0xBF /**< GATTS BLE configuration last. */ + + + + + + +#ifdef __cplusplus +} +#endif +#endif /* BLE_RANGES_H__ */ + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_types.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_types.h new file mode 100644 index 00000000000..88c93180c83 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble_types.h @@ -0,0 +1,215 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON + @{ + @defgroup ble_types Common types and macro definitions + @{ + + @brief Common types and macro definitions for the BLE SoftDevice. + */ + +#ifndef BLE_TYPES_H__ +#define BLE_TYPES_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_TYPES_DEFINES Defines + * @{ */ + +/** @defgroup BLE_CONN_HANDLES BLE Connection Handles + * @{ */ +#define BLE_CONN_HANDLE_INVALID 0xFFFF /**< Invalid Connection Handle. */ +#define BLE_CONN_HANDLE_ALL 0xFFFE /**< Applies to all Connection Handles. */ +/** @} */ + + +/** @defgroup BLE_UUID_VALUES Assigned Values for BLE UUIDs + * @{ */ +/* Generic UUIDs, applicable to all services */ +#define BLE_UUID_UNKNOWN 0x0000 /**< Reserved UUID. */ +#define BLE_UUID_SERVICE_PRIMARY 0x2800 /**< Primary Service. */ +#define BLE_UUID_SERVICE_SECONDARY 0x2801 /**< Secondary Service. */ +#define BLE_UUID_SERVICE_INCLUDE 0x2802 /**< Include. */ +#define BLE_UUID_CHARACTERISTIC 0x2803 /**< Characteristic. */ +#define BLE_UUID_DESCRIPTOR_CHAR_EXT_PROP 0x2900 /**< Characteristic Extended Properties Descriptor. */ +#define BLE_UUID_DESCRIPTOR_CHAR_USER_DESC 0x2901 /**< Characteristic User Description Descriptor. */ +#define BLE_UUID_DESCRIPTOR_CLIENT_CHAR_CONFIG 0x2902 /**< Client Characteristic Configuration Descriptor. */ +#define BLE_UUID_DESCRIPTOR_SERVER_CHAR_CONFIG 0x2903 /**< Server Characteristic Configuration Descriptor. */ +#define BLE_UUID_DESCRIPTOR_CHAR_PRESENTATION_FORMAT 0x2904 /**< Characteristic Presentation Format Descriptor. */ +#define BLE_UUID_DESCRIPTOR_CHAR_AGGREGATE_FORMAT 0x2905 /**< Characteristic Aggregate Format Descriptor. */ +/* GATT specific UUIDs */ +#define BLE_UUID_GATT 0x1801 /**< Generic Attribute Profile. */ +#define BLE_UUID_GATT_CHARACTERISTIC_SERVICE_CHANGED 0x2A05 /**< Service Changed Characteristic. */ +/* GAP specific UUIDs */ +#define BLE_UUID_GAP 0x1800 /**< Generic Access Profile. */ +#define BLE_UUID_GAP_CHARACTERISTIC_DEVICE_NAME 0x2A00 /**< Device Name Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_APPEARANCE 0x2A01 /**< Appearance Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_RECONN_ADDR 0x2A03 /**< Reconnection Address Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_PPCP 0x2A04 /**< Peripheral Preferred Connection Parameters Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_CAR 0x2AA6 /**< Central Address Resolution Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_RPA_ONLY 0x2AC9 /**< Resolvable Private Address Only Characteristic. */ +/** @} */ + + +/** @defgroup BLE_UUID_TYPES Types of UUID + * @{ */ +#define BLE_UUID_TYPE_UNKNOWN 0x00 /**< Invalid UUID type. */ +#define BLE_UUID_TYPE_BLE 0x01 /**< Bluetooth SIG UUID (16-bit). */ +#define BLE_UUID_TYPE_VENDOR_BEGIN 0x02 /**< Vendor UUID types start at this index (128-bit). */ +/** @} */ + + +/** @defgroup BLE_APPEARANCES Bluetooth Appearance values + * @note Retrieved from http://developer.bluetooth.org/gatt/characteristics/Pages/CharacteristicViewer.aspx?u=org.bluetooth.characteristic.gap.appearance.xml + * @{ */ +#define BLE_APPEARANCE_UNKNOWN 0 /**< Unknown. */ +#define BLE_APPEARANCE_GENERIC_PHONE 64 /**< Generic Phone. */ +#define BLE_APPEARANCE_GENERIC_COMPUTER 128 /**< Generic Computer. */ +#define BLE_APPEARANCE_GENERIC_WATCH 192 /**< Generic Watch. */ +#define BLE_APPEARANCE_WATCH_SPORTS_WATCH 193 /**< Watch: Sports Watch. */ +#define BLE_APPEARANCE_GENERIC_CLOCK 256 /**< Generic Clock. */ +#define BLE_APPEARANCE_GENERIC_DISPLAY 320 /**< Generic Display. */ +#define BLE_APPEARANCE_GENERIC_REMOTE_CONTROL 384 /**< Generic Remote Control. */ +#define BLE_APPEARANCE_GENERIC_EYE_GLASSES 448 /**< Generic Eye-glasses. */ +#define BLE_APPEARANCE_GENERIC_TAG 512 /**< Generic Tag. */ +#define BLE_APPEARANCE_GENERIC_KEYRING 576 /**< Generic Keyring. */ +#define BLE_APPEARANCE_GENERIC_MEDIA_PLAYER 640 /**< Generic Media Player. */ +#define BLE_APPEARANCE_GENERIC_BARCODE_SCANNER 704 /**< Generic Barcode Scanner. */ +#define BLE_APPEARANCE_GENERIC_THERMOMETER 768 /**< Generic Thermometer. */ +#define BLE_APPEARANCE_THERMOMETER_EAR 769 /**< Thermometer: Ear. */ +#define BLE_APPEARANCE_GENERIC_HEART_RATE_SENSOR 832 /**< Generic Heart rate Sensor. */ +#define BLE_APPEARANCE_HEART_RATE_SENSOR_HEART_RATE_BELT 833 /**< Heart Rate Sensor: Heart Rate Belt. */ +#define BLE_APPEARANCE_GENERIC_BLOOD_PRESSURE 896 /**< Generic Blood Pressure. */ +#define BLE_APPEARANCE_BLOOD_PRESSURE_ARM 897 /**< Blood Pressure: Arm. */ +#define BLE_APPEARANCE_BLOOD_PRESSURE_WRIST 898 /**< Blood Pressure: Wrist. */ +#define BLE_APPEARANCE_GENERIC_HID 960 /**< Human Interface Device (HID). */ +#define BLE_APPEARANCE_HID_KEYBOARD 961 /**< Keyboard (HID Subtype). */ +#define BLE_APPEARANCE_HID_MOUSE 962 /**< Mouse (HID Subtype). */ +#define BLE_APPEARANCE_HID_JOYSTICK 963 /**< Joystick (HID Subtype). */ +#define BLE_APPEARANCE_HID_GAMEPAD 964 /**< Gamepad (HID Subtype). */ +#define BLE_APPEARANCE_HID_DIGITIZERSUBTYPE 965 /**< Digitizer Tablet (HID Subtype). */ +#define BLE_APPEARANCE_HID_CARD_READER 966 /**< Card Reader (HID Subtype). */ +#define BLE_APPEARANCE_HID_DIGITAL_PEN 967 /**< Digital Pen (HID Subtype). */ +#define BLE_APPEARANCE_HID_BARCODE 968 /**< Barcode Scanner (HID Subtype). */ +#define BLE_APPEARANCE_GENERIC_GLUCOSE_METER 1024 /**< Generic Glucose Meter. */ +#define BLE_APPEARANCE_GENERIC_RUNNING_WALKING_SENSOR 1088 /**< Generic Running Walking Sensor. */ +#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_IN_SHOE 1089 /**< Running Walking Sensor: In-Shoe. */ +#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_SHOE 1090 /**< Running Walking Sensor: On-Shoe. */ +#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_HIP 1091 /**< Running Walking Sensor: On-Hip. */ +#define BLE_APPEARANCE_GENERIC_CYCLING 1152 /**< Generic Cycling. */ +#define BLE_APPEARANCE_CYCLING_CYCLING_COMPUTER 1153 /**< Cycling: Cycling Computer. */ +#define BLE_APPEARANCE_CYCLING_SPEED_SENSOR 1154 /**< Cycling: Speed Sensor. */ +#define BLE_APPEARANCE_CYCLING_CADENCE_SENSOR 1155 /**< Cycling: Cadence Sensor. */ +#define BLE_APPEARANCE_CYCLING_POWER_SENSOR 1156 /**< Cycling: Power Sensor. */ +#define BLE_APPEARANCE_CYCLING_SPEED_CADENCE_SENSOR 1157 /**< Cycling: Speed and Cadence Sensor. */ +#define BLE_APPEARANCE_GENERIC_PULSE_OXIMETER 3136 /**< Generic Pulse Oximeter. */ +#define BLE_APPEARANCE_PULSE_OXIMETER_FINGERTIP 3137 /**< Fingertip (Pulse Oximeter subtype). */ +#define BLE_APPEARANCE_PULSE_OXIMETER_WRIST_WORN 3138 /**< Wrist Worn(Pulse Oximeter subtype). */ +#define BLE_APPEARANCE_GENERIC_WEIGHT_SCALE 3200 /**< Generic Weight Scale. */ +#define BLE_APPEARANCE_GENERIC_OUTDOOR_SPORTS_ACT 5184 /**< Generic Outdoor Sports Activity. */ +#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_DISP 5185 /**< Location Display Device (Outdoor Sports Activity subtype). */ +#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_DISP 5186 /**< Location and Navigation Display Device (Outdoor Sports Activity subtype). */ +#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_POD 5187 /**< Location Pod (Outdoor Sports Activity subtype). */ +#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_POD 5188 /**< Location and Navigation Pod (Outdoor Sports Activity subtype). */ +/** @} */ + +/** @brief Set .type and .uuid fields of ble_uuid_struct to specified UUID value. */ +#define BLE_UUID_BLE_ASSIGN(instance, value) do {\ + instance.type = BLE_UUID_TYPE_BLE; \ + instance.uuid = value;} while(0) + +/** @brief Copy type and uuid members from src to dst ble_uuid_t pointer. Both pointers must be valid/non-null. */ +#define BLE_UUID_COPY_PTR(dst, src) do {\ + (dst)->type = (src)->type; \ + (dst)->uuid = (src)->uuid;} while(0) + +/** @brief Copy type and uuid members from src to dst ble_uuid_t struct. */ +#define BLE_UUID_COPY_INST(dst, src) do {\ + (dst).type = (src).type; \ + (dst).uuid = (src).uuid;} while(0) + +/** @brief Compare for equality both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */ +#define BLE_UUID_EQ(p_uuid1, p_uuid2) \ + (((p_uuid1)->type == (p_uuid2)->type) && ((p_uuid1)->uuid == (p_uuid2)->uuid)) + +/** @brief Compare for difference both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */ +#define BLE_UUID_NEQ(p_uuid1, p_uuid2) \ + (((p_uuid1)->type != (p_uuid2)->type) || ((p_uuid1)->uuid != (p_uuid2)->uuid)) + +/** @} */ + +/** @addtogroup BLE_TYPES_STRUCTURES Structures + * @{ */ + +/** @brief 128 bit UUID values. */ +typedef struct +{ + uint8_t uuid128[16]; /**< Little-Endian UUID bytes. */ +} ble_uuid128_t; + +/** @brief Bluetooth Low Energy UUID type, encapsulates both 16-bit and 128-bit UUIDs. */ +typedef struct +{ + uint16_t uuid; /**< 16-bit UUID value or octets 12-13 of 128-bit UUID. */ + uint8_t type; /**< UUID type, see @ref BLE_UUID_TYPES. If type is @ref BLE_UUID_TYPE_UNKNOWN, the value of uuid is undefined. */ +} ble_uuid_t; + +/**@brief Data structure. */ +typedef struct +{ + uint8_t *p_data; /**< Pointer to the data buffer provided to/from the application. */ + uint16_t len; /**< Length of the data buffer, in bytes. */ +} ble_data_t; + +/** @} */ +#ifdef __cplusplus +} +#endif + +#endif /* BLE_TYPES_H__ */ + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf52/nrf_mbr.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf52/nrf_mbr.h new file mode 100644 index 00000000000..cc5971c7a3d --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf52/nrf_mbr.h @@ -0,0 +1,241 @@ +/* + * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @defgroup nrf_mbr_api Master Boot Record API + @{ + + @brief APIs for updating SoftDevice and BootLoader + +*/ + +#ifndef NRF_MBR_H__ +#define NRF_MBR_H__ + +#include "nrf_svc.h" +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup NRF_MBR_DEFINES Defines + * @{ */ + +/**@brief MBR SVC Base number. */ +#define MBR_SVC_BASE (0x18) + +/**@brief Page size in words. */ +#define MBR_PAGE_SIZE_IN_WORDS (1024) + +/** @brief The size that must be reserved for the MBR when a SoftDevice is written to flash. +This is the offset where the first byte of the SoftDevice hex file is written.*/ +#define MBR_SIZE (0x1000) + +/** @} */ + +/** @addtogroup NRF_MBR_ENUMS Enumerations + * @{ */ + +/**@brief nRF Master Boot Record API SVC numbers. */ +enum NRF_MBR_SVCS +{ + SD_MBR_COMMAND = MBR_SVC_BASE, /**< ::sd_mbr_command */ +}; + +/**@brief Possible values for ::sd_mbr_command_t.command */ +enum NRF_MBR_COMMANDS +{ + SD_MBR_COMMAND_COPY_BL, /**< Copy a new BootLoader. @see ::sd_mbr_command_copy_bl_t*/ + SD_MBR_COMMAND_COPY_SD, /**< Copy a new SoftDevice. @see ::sd_mbr_command_copy_sd_t*/ + SD_MBR_COMMAND_INIT_SD, /**< Initialize forwarding interrupts to SD, and run reset function in SD. Does not require any parameters in ::sd_mbr_command_t params.*/ + SD_MBR_COMMAND_COMPARE, /**< This command works like memcmp. @see ::sd_mbr_command_compare_t*/ + SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET, /**< Change the address the MBR starts after a reset. @see ::sd_mbr_command_vector_table_base_set_t*/ + SD_MBR_COMMAND_RESERVED, + SD_MBR_COMMAND_IRQ_FORWARD_ADDRESS_SET, /**< Start forwarding all interrupts to this address. @see ::sd_mbr_command_irq_forward_address_set_t*/ +}; + +/** @} */ + +/** @addtogroup NRF_MBR_TYPES Types + * @{ */ + +/**@brief This command copies part of a new SoftDevice + * + * The destination area is erased before copying. + * If dst is in the middle of a flash page, that whole flash page will be erased. + * If (dst+len) is in the middle of a flash page, that whole flash page will be erased. + * + * The user of this function is responsible for setting the BPROT registers. + * + * @retval ::NRF_SUCCESS indicates that the contents of the memory blocks where copied correctly. + * @retval ::NRF_ERROR_INTERNAL indicates that the contents of the memory blocks where not verified correctly after copying. + */ +typedef struct +{ + uint32_t *src; /**< Pointer to the source of data to be copied.*/ + uint32_t *dst; /**< Pointer to the destination where the content is to be copied.*/ + uint32_t len; /**< Number of 32 bit words to copy. Must be a multiple of @ref MBR_PAGE_SIZE_IN_WORDS words.*/ +} sd_mbr_command_copy_sd_t; + + +/**@brief This command works like memcmp, but takes the length in words. + * + * @retval ::NRF_SUCCESS indicates that the contents of both memory blocks are equal. + * @retval ::NRF_ERROR_NULL indicates that the contents of the memory blocks are not equal. + */ +typedef struct +{ + uint32_t *ptr1; /**< Pointer to block of memory. */ + uint32_t *ptr2; /**< Pointer to block of memory. */ + uint32_t len; /**< Number of 32 bit words to compare.*/ +} sd_mbr_command_compare_t; + + +/**@brief This command copies a new BootLoader. + * + * With this command, destination of BootLoader is always the address written in + * NRF_UICR->BOOTADDR. + * + * Destination is erased by this function. + * If (destination+bl_len) is in the middle of a flash page, that whole flash page will be erased. + * + * This function will use PROTENSET to protect the flash that is not intended to be written. + * + * On success, this function will not return. It will start the new BootLoader from reset-vector as normal. + * + * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. + * @retval ::NRF_ERROR_FORBIDDEN if NRF_UICR->BOOTADDR is not set. + * @retval ::NRF_ERROR_INVALID_LENGTH if parameters attempts to read or write outside flash area. + * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) + */ +typedef struct +{ + uint32_t *bl_src; /**< Pointer to the source of the Bootloader to be be copied.*/ + uint32_t bl_len; /**< Number of 32 bit words to copy for BootLoader. */ +} sd_mbr_command_copy_bl_t; + +/**@brief Change the address the MBR starts after a reset + * + * Once this function has been called, this address is where the MBR will start to forward + * interrupts to after a reset. + * + * To restore default forwarding this function should be called with @ref address set to 0. The + * MBR will then start forwarding interrupts to the address in NFR_UICR->BOOTADDR or to the + * SoftDevice if the BOOTADDR is not set. + * + * On success, this function will not return. It will reset the device. + * + * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. + * @retval ::NRF_ERROR_INVALID_ADDR if parameter address is outside of the flash size. + * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) + */ +typedef struct +{ + uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ +} sd_mbr_command_vector_table_base_set_t; + +/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the MBR + * + * Unlike sd_mbr_command_vector_table_base_set_t, this function does not reset, and it does not + * change where the MBR starts after reset. + * + * @retval ::NRF_SUCCESS + */ +typedef struct +{ + uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ +} sd_mbr_command_irq_forward_address_set_t; + +/**@brief Input structure containing data used when calling ::sd_mbr_command + * + * Depending on what command value that is set, the corresponding params value type must also be + * set. See @ref NRF_MBR_COMMANDS for command types and corresponding params value type. If command + * @ref SD_MBR_COMMAND_INIT_SD is set, it is not necessary to set any values under params. + */ +typedef struct +{ + uint32_t command; /**< Type of command to be issued. See @ref NRF_MBR_COMMANDS. */ + union + { + sd_mbr_command_copy_sd_t copy_sd; /**< Parameters for copy SoftDevice.*/ + sd_mbr_command_compare_t compare; /**< Parameters for verify.*/ + sd_mbr_command_copy_bl_t copy_bl; /**< Parameters for copy BootLoader. Requires parameter page. */ + sd_mbr_command_vector_table_base_set_t base_set; /**< Parameters for vector table base set. Requires parameter page.*/ + sd_mbr_command_irq_forward_address_set_t irq_forward_address_set; /**< Parameters for irq forward address set*/ + } params; /**< Command parameters. */ +} sd_mbr_command_t; + +/** @} */ + +/** @addtogroup NRF_MBR_FUNCTIONS Functions + * @{ */ + +/**@brief Issue Master Boot Record commands + * + * Commands used when updating a SoftDevice and bootloader. + * + * The @ref SD_MBR_COMMAND_COPY_BL and @ref SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET requires + * parameters to be retained by the MBR when resetting the IC. This is done in a separate flash + * page provided by the application. The UICR register UICR.NRFFW[1] must be set to an address + * corresponding to a page in the application flash space. This page will be cleared by the MBR and + * used to store the command before reset. When the UICR.NRFFW[1] field is set the page it refers + * to must not be used by the application. If the UICR.NRFFW[1] is set to 0xFFFFFFFF (the default) + * MBR commands which use flash will be unavailable and return @ref NRF_ERROR_NO_MEM. + * + * @param[in] param Pointer to a struct describing the command. + * + * @note For return values, see ::sd_mbr_command_copy_sd_t, ::sd_mbr_command_copy_bl_t, + * ::sd_mbr_command_compare_t, ::sd_mbr_command_vector_table_base_set_t, + * ::sd_mbr_command_irq_forward_address_set_t + * + * @retval ::NRF_ERROR_NO_MEM if UICR.NRFFW[1] is not set (i.e. is 0xFFFFFFFF). + * @retval ::NRF_ERROR_INVALID_PARAM if an invalid command is given. +*/ +SVCALL(SD_MBR_COMMAND, uint32_t, sd_mbr_command(sd_mbr_command_t* param)); + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // NRF_MBR_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_error.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_error.h new file mode 100644 index 00000000000..6badee98e56 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_error.h @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** + @defgroup nrf_error SoftDevice Global Error Codes + @{ + + @brief Global Error definitions +*/ + +/* Header guard */ +#ifndef NRF_ERROR_H__ +#define NRF_ERROR_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/** @defgroup NRF_ERRORS_BASE Error Codes Base number definitions + * @{ */ +#define NRF_ERROR_BASE_NUM (0x0) ///< Global error base +#define NRF_ERROR_SDM_BASE_NUM (0x1000) ///< SDM error base +#define NRF_ERROR_SOC_BASE_NUM (0x2000) ///< SoC error base +#define NRF_ERROR_STK_BASE_NUM (0x3000) ///< STK error base +/** @} */ + +#define NRF_SUCCESS (NRF_ERROR_BASE_NUM + 0) ///< Successful command +#define NRF_ERROR_SVC_HANDLER_MISSING (NRF_ERROR_BASE_NUM + 1) ///< SVC handler is missing +#define NRF_ERROR_SOFTDEVICE_NOT_ENABLED (NRF_ERROR_BASE_NUM + 2) ///< SoftDevice has not been enabled +#define NRF_ERROR_INTERNAL (NRF_ERROR_BASE_NUM + 3) ///< Internal Error +#define NRF_ERROR_NO_MEM (NRF_ERROR_BASE_NUM + 4) ///< No Memory for operation +#define NRF_ERROR_NOT_FOUND (NRF_ERROR_BASE_NUM + 5) ///< Not found +#define NRF_ERROR_NOT_SUPPORTED (NRF_ERROR_BASE_NUM + 6) ///< Not supported +#define NRF_ERROR_INVALID_PARAM (NRF_ERROR_BASE_NUM + 7) ///< Invalid Parameter +#define NRF_ERROR_INVALID_STATE (NRF_ERROR_BASE_NUM + 8) ///< Invalid state, operation disallowed in this state +#define NRF_ERROR_INVALID_LENGTH (NRF_ERROR_BASE_NUM + 9) ///< Invalid Length +#define NRF_ERROR_INVALID_FLAGS (NRF_ERROR_BASE_NUM + 10) ///< Invalid Flags +#define NRF_ERROR_INVALID_DATA (NRF_ERROR_BASE_NUM + 11) ///< Invalid Data +#define NRF_ERROR_DATA_SIZE (NRF_ERROR_BASE_NUM + 12) ///< Invalid Data size +#define NRF_ERROR_TIMEOUT (NRF_ERROR_BASE_NUM + 13) ///< Operation timed out +#define NRF_ERROR_NULL (NRF_ERROR_BASE_NUM + 14) ///< Null Pointer +#define NRF_ERROR_FORBIDDEN (NRF_ERROR_BASE_NUM + 15) ///< Forbidden Operation +#define NRF_ERROR_INVALID_ADDR (NRF_ERROR_BASE_NUM + 16) ///< Bad Memory Address +#define NRF_ERROR_BUSY (NRF_ERROR_BASE_NUM + 17) ///< Busy +#define NRF_ERROR_CONN_COUNT (NRF_ERROR_BASE_NUM + 18) ///< Maximum connection count exceeded. +#define NRF_ERROR_RESOURCES (NRF_ERROR_BASE_NUM + 19) ///< Not enough resources for operation + +#ifdef __cplusplus +} +#endif +#endif // NRF_ERROR_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_error_sdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_error_sdm.h new file mode 100644 index 00000000000..530959b9d67 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_error_sdm.h @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** + @addtogroup nrf_sdm_api + @{ + @defgroup nrf_sdm_error SoftDevice Manager Error Codes + @{ + + @brief Error definitions for the SDM API +*/ + +/* Header guard */ +#ifndef NRF_ERROR_SDM_H__ +#define NRF_ERROR_SDM_H__ + +#include "nrf_error.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN (NRF_ERROR_SDM_BASE_NUM + 0) ///< Unknown LFCLK source. +#define NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION (NRF_ERROR_SDM_BASE_NUM + 1) ///< Incorrect interrupt configuration (can be caused by using illegal priority levels, or having enabled SoftDevice interrupts). +#define NRF_ERROR_SDM_INCORRECT_CLENR0 (NRF_ERROR_SDM_BASE_NUM + 2) ///< Incorrect CLENR0 (can be caused by erroneous SoftDevice flashing). + +#ifdef __cplusplus +} +#endif +#endif // NRF_ERROR_SDM_H__ + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_error_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_error_soc.h new file mode 100644 index 00000000000..1e784b8db38 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_error_soc.h @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup nrf_soc_api + @{ + @defgroup nrf_soc_error SoC Library Error Codes + @{ + + @brief Error definitions for the SoC library + +*/ + +/* Header guard */ +#ifndef NRF_ERROR_SOC_H__ +#define NRF_ERROR_SOC_H__ + +#include "nrf_error.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* Mutex Errors */ +#define NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN (NRF_ERROR_SOC_BASE_NUM + 0) ///< Mutex already taken + +/* NVIC errors */ +#define NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE (NRF_ERROR_SOC_BASE_NUM + 1) ///< NVIC interrupt not available +#define NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED (NRF_ERROR_SOC_BASE_NUM + 2) ///< NVIC interrupt priority not allowed +#define NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN (NRF_ERROR_SOC_BASE_NUM + 3) ///< NVIC should not return + +/* Power errors */ +#define NRF_ERROR_SOC_POWER_MODE_UNKNOWN (NRF_ERROR_SOC_BASE_NUM + 4) ///< Power mode unknown +#define NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN (NRF_ERROR_SOC_BASE_NUM + 5) ///< Power POF threshold unknown +#define NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN (NRF_ERROR_SOC_BASE_NUM + 6) ///< Power off should not return + +/* Rand errors */ +#define NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES (NRF_ERROR_SOC_BASE_NUM + 7) ///< RAND not enough values + +/* PPI errors */ +#define NRF_ERROR_SOC_PPI_INVALID_CHANNEL (NRF_ERROR_SOC_BASE_NUM + 8) ///< Invalid PPI Channel +#define NRF_ERROR_SOC_PPI_INVALID_GROUP (NRF_ERROR_SOC_BASE_NUM + 9) ///< Invalid PPI Group + +#ifdef __cplusplus +} +#endif +#endif // NRF_ERROR_SOC_H__ +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_nvic.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_nvic.h new file mode 100644 index 00000000000..f5c7e8e0286 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_nvic.h @@ -0,0 +1,486 @@ +/* + * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @defgroup nrf_nvic_api SoftDevice NVIC API + * @{ + * + * @note In order to use this module, the following code has to be added to a .c file: + * \code + * nrf_nvic_state_t nrf_nvic_state = {0}; + * \endcode + * + * @note Definitions and declarations starting with __ (double underscore) in this header file are + * not intended for direct use by the application. + * + * @brief APIs for the accessing NVIC when using a SoftDevice. + * + */ + +#ifndef NRF_NVIC_H__ +#define NRF_NVIC_H__ + +#include +#include "nrf.h" +#include "nrf_svc.h" +#include "nrf_error.h" +#include "nrf_error_soc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@addtogroup NRF_NVIC_DEFINES Defines + * @{ */ + +/**@defgroup NRF_NVIC_ISER_DEFINES SoftDevice NVIC internal definitions + * @{ */ + +#define __NRF_NVIC_NVMC_IRQn (30) /**< The peripheral ID of the NVMC. IRQ numbers are used to identify peripherals, but the NVMC doesn't have an IRQ number in the MDK. */ + +#define __NRF_NVIC_ISER_COUNT (2) /**< The number of ISER/ICER registers in the NVIC that are used. */ + +/**@brief Interrupts used by the SoftDevice, with IRQn in the range 0-31. */ +#define __NRF_NVIC_SD_IRQS_0 ((uint32_t)( \ + (1U << POWER_CLOCK_IRQn) \ + | (1U << RADIO_IRQn) \ + | (1U << RTC0_IRQn) \ + | (1U << TIMER0_IRQn) \ + | (1U << RNG_IRQn) \ + | (1U << ECB_IRQn) \ + | (1U << CCM_AAR_IRQn) \ + | (1U << TEMP_IRQn) \ + | (1U << __NRF_NVIC_NVMC_IRQn) \ + | (1U << (uint32_t)SWI5_IRQn) \ + )) + +/**@brief Interrupts used by the SoftDevice, with IRQn in the range 32-63. */ +#define __NRF_NVIC_SD_IRQS_1 ((uint32_t)0) + +/**@brief Interrupts available for to application, with IRQn in the range 0-31. */ +#define __NRF_NVIC_APP_IRQS_0 (~__NRF_NVIC_SD_IRQS_0) + +/**@brief Interrupts available for to application, with IRQn in the range 32-63. */ +#define __NRF_NVIC_APP_IRQS_1 (~__NRF_NVIC_SD_IRQS_1) + +/**@} */ + +/**@} */ + +/**@addtogroup NRF_NVIC_VARIABLES Variables + * @{ */ + +/**@brief Type representing the state struct for the SoftDevice NVIC module. */ +typedef struct +{ + uint32_t volatile __irq_masks[__NRF_NVIC_ISER_COUNT]; /**< IRQs enabled by the application in the NVIC. */ + uint32_t volatile __cr_flag; /**< Non-zero if already in a critical region */ +} nrf_nvic_state_t; + +/**@brief Variable keeping the state for the SoftDevice NVIC module. This must be declared in an + * application source file. */ +extern nrf_nvic_state_t nrf_nvic_state; + +/**@} */ + +/**@addtogroup NRF_NVIC_INTERNAL_FUNCTIONS SoftDevice NVIC internal functions + * @{ */ + +/**@brief Disables IRQ interrupts globally, including the SoftDevice's interrupts. + * + * @retval The value of PRIMASK prior to disabling the interrupts. + */ +__STATIC_INLINE int __sd_nvic_irq_disable(void); + +/**@brief Enables IRQ interrupts globally, including the SoftDevice's interrupts. + */ +__STATIC_INLINE void __sd_nvic_irq_enable(void); + +/**@brief Checks if IRQn is available to application + * @param[in] IRQn IRQ to check + * + * @retval 1 (true) if the IRQ to check is available to the application + */ +__STATIC_INLINE uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn); + +/**@brief Checks if priority is available to application + * @param[in] priority priority to check + * + * @retval 1 (true) if the priority to check is available to the application + */ +__STATIC_INLINE uint32_t __sd_nvic_is_app_accessible_priority(uint32_t priority); + +/**@} */ + +/**@addtogroup NRF_NVIC_FUNCTIONS SoftDevice NVIC public functions + * @{ */ + +/**@brief Enable External Interrupt. + * @note Corresponds to NVIC_EnableIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_EnableIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt was enabled. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt has a priority not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn); + +/**@brief Disable External Interrupt. + * @note Corresponds to NVIC_DisableIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_DisableIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt was disabled. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn); + +/**@brief Get Pending Interrupt. + * @note Corresponds to NVIC_GetPendingIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_GetPendingIRQ documentation in CMSIS. + * @param[out] p_pending_irq Return value from NVIC_GetPendingIRQ. + * + * @retval ::NRF_SUCCESS The interrupt is available for the application. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq); + +/**@brief Set Pending Interrupt. + * @note Corresponds to NVIC_SetPendingIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_SetPendingIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt is set pending. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn); + +/**@brief Clear Pending Interrupt. + * @note Corresponds to NVIC_ClearPendingIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_ClearPendingIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt pending flag is cleared. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn); + +/**@brief Set Interrupt Priority. + * @note Corresponds to NVIC_SetPriority in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * @pre Priority is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_SetPriority documentation in CMSIS. + * @param[in] priority A valid IRQ priority for use by the application. + * + * @retval ::NRF_SUCCESS The interrupt and priority level is available for the application. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt priority is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority); + +/**@brief Get Interrupt Priority. + * @note Corresponds to NVIC_GetPriority in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_GetPriority documentation in CMSIS. + * @param[out] p_priority Return value from NVIC_GetPriority. + * + * @retval ::NRF_SUCCESS The interrupt priority is returned in p_priority. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE - IRQn is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority); + +/**@brief System Reset. + * @note Corresponds to NVIC_SystemReset in CMSIS. + * + * @retval ::NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN + */ +__STATIC_INLINE uint32_t sd_nvic_SystemReset(void); + +/**@brief Enter critical region. + * + * @post Application interrupts will be disabled. + * @note sd_nvic_critical_region_enter() and ::sd_nvic_critical_region_exit() must be called in matching pairs inside each + * execution context + * @sa sd_nvic_critical_region_exit + * + * @param[out] p_is_nested_critical_region If 1, the application is now in a nested critical region. + * + * @retval ::NRF_SUCCESS + */ +__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region); + +/**@brief Exit critical region. + * + * @pre Application has entered a critical region using ::sd_nvic_critical_region_enter. + * @post If not in a nested critical region, the application interrupts will restored to the state before ::sd_nvic_critical_region_enter was called. + * + * @param[in] is_nested_critical_region If this is set to 1, the critical region won't be exited. @sa sd_nvic_critical_region_enter. + * + * @retval ::NRF_SUCCESS + */ +__STATIC_INLINE uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region); + +/**@} */ + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE int __sd_nvic_irq_disable(void) +{ + int pm = __get_PRIMASK(); + __disable_irq(); + return pm; +} + +__STATIC_INLINE void __sd_nvic_irq_enable(void) +{ + __enable_irq(); +} + +__STATIC_INLINE uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn) +{ + if (IRQn < 32) + { + return ((1UL<= (1 << __NVIC_PRIO_BITS)) + { + return 0; + } + if( priority == 0 + || priority == 1 + || priority == 4 + ) + { + return 0; + } + return 1; +} + + +__STATIC_INLINE uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn) +{ + if (!__sd_nvic_app_accessible_irq(IRQn)) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } + if (!__sd_nvic_is_app_accessible_priority(NVIC_GetPriority(IRQn))) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED; + } + + if (nrf_nvic_state.__cr_flag) + { + nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] |= (uint32_t)(1 << ((uint32_t)((int32_t)IRQn) & (uint32_t)0x1F)); + } + else + { + NVIC_EnableIRQ(IRQn); + } + return NRF_SUCCESS; +} + +__STATIC_INLINE uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn) +{ + if (!__sd_nvic_app_accessible_irq(IRQn)) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } + + if (nrf_nvic_state.__cr_flag) + { + nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] &= ~(1UL << ((uint32_t)(IRQn) & 0x1F)); + } + else + { + NVIC_DisableIRQ(IRQn); + } + + return NRF_SUCCESS; +} + +__STATIC_INLINE uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq) +{ + if (__sd_nvic_app_accessible_irq(IRQn)) + { + *p_pending_irq = NVIC_GetPendingIRQ(IRQn); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } +} + +__STATIC_INLINE uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn) +{ + if (__sd_nvic_app_accessible_irq(IRQn)) + { + NVIC_SetPendingIRQ(IRQn); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } +} + +__STATIC_INLINE uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn) +{ + if (__sd_nvic_app_accessible_irq(IRQn)) + { + NVIC_ClearPendingIRQ(IRQn); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } +} + +__STATIC_INLINE uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if (!__sd_nvic_app_accessible_irq(IRQn)) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } + + if (!__sd_nvic_is_app_accessible_priority(priority)) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED; + } + + NVIC_SetPriority(IRQn, (uint32_t)priority); + return NRF_SUCCESS; +} + +__STATIC_INLINE uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority) +{ + if (__sd_nvic_app_accessible_irq(IRQn)) + { + *p_priority = (NVIC_GetPriority(IRQn) & 0xFF); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } +} + +__STATIC_INLINE uint32_t sd_nvic_SystemReset(void) +{ + NVIC_SystemReset(); + return NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN; +} + +__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region) +{ + int was_masked = __sd_nvic_irq_disable(); + if (!nrf_nvic_state.__cr_flag) + { + nrf_nvic_state.__cr_flag = 1; + nrf_nvic_state.__irq_masks[0] = ( NVIC->ICER[0] & __NRF_NVIC_APP_IRQS_0 ); + NVIC->ICER[0] = __NRF_NVIC_APP_IRQS_0; + nrf_nvic_state.__irq_masks[1] = ( NVIC->ICER[1] & __NRF_NVIC_APP_IRQS_1 ); + NVIC->ICER[1] = __NRF_NVIC_APP_IRQS_1; + *p_is_nested_critical_region = 0; + } + else + { + *p_is_nested_critical_region = 1; + } + if (!was_masked) + { + __sd_nvic_irq_enable(); + } + return NRF_SUCCESS; +} + +__STATIC_INLINE uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region) +{ + if (nrf_nvic_state.__cr_flag && (is_nested_critical_region == 0)) + { + int was_masked = __sd_nvic_irq_disable(); + NVIC->ISER[0] = nrf_nvic_state.__irq_masks[0]; + NVIC->ISER[1] = nrf_nvic_state.__irq_masks[1]; + nrf_nvic_state.__cr_flag = 0; + if (!was_masked) + { + __sd_nvic_irq_enable(); + } + } + + return NRF_SUCCESS; +} + +#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_NVIC_H__ + +/**@} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_sd_def.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_sd_def.h new file mode 100644 index 00000000000..c9ab241872e --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_sd_def.h @@ -0,0 +1,59 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_SD_DEF_H__ +#define NRF_SD_DEF_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#define SD_PPI_CHANNELS_USED 0xFFFE0000uL /**< PPI channels utilized by SotfDevice (not available to the application). */ +#define SD_PPI_GROUPS_USED 0x0000000CuL /**< PPI groups utilized by SoftDevice (not available to the application). */ +#define SD_TIMERS_USED 0x00000001uL /**< Timers used by SoftDevice. */ +#define SD_SWI_USED 0x0000003CuL /**< Software interrupts used by SoftDevice */ + + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_SD_DEF_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_sdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_sdm.h new file mode 100644 index 00000000000..8c48d936786 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_sdm.h @@ -0,0 +1,358 @@ +/* + * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @defgroup nrf_sdm_api SoftDevice Manager API + @{ + + @brief APIs for SoftDevice management. + +*/ + +#ifndef NRF_SDM_H__ +#define NRF_SDM_H__ + +#include +#include "nrf.h" +#include "nrf_svc.h" +#include "nrf_error.h" +#include "nrf_error_sdm.h" +#include "nrf_soc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup NRF_SDM_DEFINES Defines + * @{ */ +#ifdef NRFSOC_DOXYGEN +/// Declared in nrf_mbr.h +#define MBR_SIZE 0 +#warning test +#endif + +/** @brief The major version for the SoftDevice binary distributed with this header file. */ +#define SD_MAJOR_VERSION (6) + +/** @brief The minor version for the SoftDevice binary distributed with this header file. */ +#define SD_MINOR_VERSION (0) + +/** @brief The bugfix version for the SoftDevice binary distributed with this header file. */ +#define SD_BUGFIX_VERSION (0) + +/** @brief The full version number for the SoftDevice binary this header file was distributed + * with, as a decimal number in the form Mmmmbbb, where: + * - M is major version (one or more digits) + * - mmm is minor version (three digits) + * - bbb is bugfix version (three digits). */ +#define SD_VERSION (SD_MAJOR_VERSION * 1000000 + SD_MINOR_VERSION * 1000 + SD_BUGFIX_VERSION) + +/** @brief SoftDevice Manager SVC Base number. */ +#define SDM_SVC_BASE 0x10 + +/** @brief SoftDevice unique string size in bytes. */ +#define SD_UNIQUE_STR_SIZE 20 + +/** @brief Invalid info field. Returned when an info field does not exist. */ +#define SDM_INFO_FIELD_INVALID (0) + +/** @brief Defines the SoftDevice Information Structure location (address) as an offset from +the start of the SoftDevice (without MBR)*/ +#define SOFTDEVICE_INFO_STRUCT_OFFSET (0x2000) + +/** @brief Defines the absolute SoftDevice Information Structure location (address) when the + * SoftDevice is installed just above the MBR (the usual case). */ +#define SOFTDEVICE_INFO_STRUCT_ADDRESS (SOFTDEVICE_INFO_STRUCT_OFFSET + MBR_SIZE) + +/** @brief Defines the offset for the SoftDevice Information Structure size value relative to the + * SoftDevice base address. The size value is of type uint8_t. */ +#define SD_INFO_STRUCT_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET) + +/** @brief Defines the offset for the SoftDevice size value relative to the SoftDevice base address. + * The size value is of type uint32_t. */ +#define SD_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x08) + +/** @brief Defines the offset for FWID value relative to the SoftDevice base address. The FWID value + * is of type uint16_t. */ +#define SD_FWID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x0C) + +/** @brief Defines the offset for the SoftDevice ID relative to the SoftDevice base address. The ID + * is of type uint32_t. */ +#define SD_ID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x10) + +/** @brief Defines the offset for the SoftDevice version relative to the SoftDevice base address in + * the same format as @ref SD_VERSION, stored as an uint32_t. */ +#define SD_VERSION_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x14) + +/** @brief Defines the offset for the SoftDevice unique string relative to the SoftDevice base address. + * The SD_UNIQUE_STR is stored as an array of uint8_t. The size of array is @ref SD_UNIQUE_STR_SIZE. + */ +#define SD_UNIQUE_STR_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x18) + +/** @brief Defines a macro for retrieving the actual SoftDevice Information Structure size value + * from a given base address. Use @ref MBR_SIZE as the argument when the SoftDevice is + * installed just above the MBR (the usual case). */ +#define SD_INFO_STRUCT_SIZE_GET(baseaddr) (*((uint8_t *) ((baseaddr) + SD_INFO_STRUCT_SIZE_OFFSET))) + +/** @brief Defines a macro for retrieving the actual SoftDevice size value from a given base + * address. Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above + * the MBR (the usual case). */ +#define SD_SIZE_GET(baseaddr) (*((uint32_t *) ((baseaddr) + SD_SIZE_OFFSET))) + +/** @brief Defines a macro for retrieving the actual FWID value from a given base address. Use + * @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the usual + * case). */ +#define SD_FWID_GET(baseaddr) (*((uint16_t *) ((baseaddr) + SD_FWID_OFFSET))) + +/** @brief Defines a macro for retrieving the actual SoftDevice ID from a given base address. Use + * @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the + * usual case). */ +#define SD_ID_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_ID_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ + ? (*((uint32_t *) ((baseaddr) + SD_ID_OFFSET))) : SDM_INFO_FIELD_INVALID) + +/** @brief Defines a macro for retrieving the actual SoftDevice version from a given base address. + * Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR + * (the usual case). */ +#define SD_VERSION_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_VERSION_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ + ? (*((uint32_t *) ((baseaddr) + SD_VERSION_OFFSET))) : SDM_INFO_FIELD_INVALID) + +/** @brief Defines a macro for retrieving the address of SoftDevice unique str based on a given base address. + * Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR + * (the usual case). */ +#define SD_UNIQUE_STR_ADDR_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_UNIQUE_STR_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ + ? (((uint8_t *) ((baseaddr) + SD_UNIQUE_STR_OFFSET))) : SDM_INFO_FIELD_INVALID) + +/**@defgroup NRF_FAULT_ID_RANGES Fault ID ranges + * @{ */ +#define NRF_FAULT_ID_SD_RANGE_START 0x00000000 /**< SoftDevice ID range start. */ +#define NRF_FAULT_ID_APP_RANGE_START 0x00001000 /**< Application ID range start. */ +/**@} */ + +/**@defgroup NRF_FAULT_IDS Fault ID types + * @{ */ +#define NRF_FAULT_ID_SD_ASSERT (NRF_FAULT_ID_SD_RANGE_START + 1) /**< SoftDevice assertion. The info parameter is reserved for future used. */ +#define NRF_FAULT_ID_APP_MEMACC (NRF_FAULT_ID_APP_RANGE_START + 1) /**< Application invalid memory access. The info parameter will contain 0x00000000, + in case of SoftDevice RAM access violation. In case of SoftDevice peripheral + register violation the info parameter will contain the sub-region number of + PREGION[0], on whose address range the disallowed write access caused the + memory access fault. */ +/**@} */ + +/** @} */ + +/** @addtogroup NRF_SDM_ENUMS Enumerations + * @{ */ + +/**@brief nRF SoftDevice Manager API SVC numbers. */ +enum NRF_SD_SVCS +{ + SD_SOFTDEVICE_ENABLE = SDM_SVC_BASE, /**< ::sd_softdevice_enable */ + SD_SOFTDEVICE_DISABLE, /**< ::sd_softdevice_disable */ + SD_SOFTDEVICE_IS_ENABLED, /**< ::sd_softdevice_is_enabled */ + SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, /**< ::sd_softdevice_vector_table_base_set */ + SVC_SDM_LAST /**< Placeholder for last SDM SVC */ +}; + +/** @} */ + +/** @addtogroup NRF_SDM_DEFINES Defines + * @{ */ + +/**@defgroup NRF_CLOCK_LF_ACCURACY Clock accuracy + * @{ */ + +#define NRF_CLOCK_LF_ACCURACY_250_PPM (0) /**< Default: 250 ppm */ +#define NRF_CLOCK_LF_ACCURACY_500_PPM (1) /**< 500 ppm */ +#define NRF_CLOCK_LF_ACCURACY_150_PPM (2) /**< 150 ppm */ +#define NRF_CLOCK_LF_ACCURACY_100_PPM (3) /**< 100 ppm */ +#define NRF_CLOCK_LF_ACCURACY_75_PPM (4) /**< 75 ppm */ +#define NRF_CLOCK_LF_ACCURACY_50_PPM (5) /**< 50 ppm */ +#define NRF_CLOCK_LF_ACCURACY_30_PPM (6) /**< 30 ppm */ +#define NRF_CLOCK_LF_ACCURACY_20_PPM (7) /**< 20 ppm */ +#define NRF_CLOCK_LF_ACCURACY_10_PPM (8) /**< 10 ppm */ +#define NRF_CLOCK_LF_ACCURACY_5_PPM (9) /**< 5 ppm */ +#define NRF_CLOCK_LF_ACCURACY_2_PPM (10) /**< 2 ppm */ +#define NRF_CLOCK_LF_ACCURACY_1_PPM (11) /**< 1 ppm */ + +/** @} */ + +/**@defgroup NRF_CLOCK_LF_SRC Possible LFCLK oscillator sources + * @{ */ + +#define NRF_CLOCK_LF_SRC_RC (0) /**< LFCLK RC oscillator. */ +#define NRF_CLOCK_LF_SRC_XTAL (1) /**< LFCLK crystal oscillator. */ +#define NRF_CLOCK_LF_SRC_SYNTH (2) /**< LFCLK Synthesized from HFCLK. */ + +/** @} */ + +/** @} */ + +/** @addtogroup NRF_SDM_TYPES Types + * @{ */ + +/**@brief Type representing LFCLK oscillator source. */ +typedef struct +{ + uint8_t source; /**< LF oscillator clock source, see @ref NRF_CLOCK_LF_SRC. */ + uint8_t rc_ctiv; /**< Only for ::NRF_CLOCK_LF_SRC_RC: Calibration timer interval in 1/4 second + units (nRF52: 1-32). + @note To avoid excessive clock drift, 0.5 degrees Celsius is the + maximum temperature change allowed in one calibration timer + interval. The interval should be selected to ensure this. + + @note Must be 0 if source is not ::NRF_CLOCK_LF_SRC_RC. */ + uint8_t rc_temp_ctiv; /**< Only for ::NRF_CLOCK_LF_SRC_RC: How often (in number of calibration + intervals) the RC oscillator shall be calibrated if the temperature + hasn't changed. + 0: Always calibrate even if the temperature hasn't changed. + 1: Only calibrate if the temperature has changed (legacy - nRF51 only). + 2-33: Check the temperature and only calibrate if it has changed, + however calibration will take place every rc_temp_ctiv + intervals in any case. + + @note Must be 0 if source is not ::NRF_CLOCK_LF_SRC_RC. + + @note For nRF52, the application must ensure calibration at least once + every 8 seconds to ensure +/-500 ppm clock stability. The + recommended configuration for ::NRF_CLOCK_LF_SRC_RC on nRF52 is + rc_ctiv=16 and rc_temp_ctiv=2. This will ensure calibration at + least once every 8 seconds and for temperature changes of 0.5 + degrees Celsius every 4 seconds. See the Product Specification + for the nRF52 device being used for more information.*/ + uint8_t accuracy; /**< External clock accuracy used in the LL to compute timing + windows, see @ref NRF_CLOCK_LF_ACCURACY.*/ +} nrf_clock_lf_cfg_t; + +/**@brief Fault Handler type. + * + * When certain unrecoverable errors occur within the application or SoftDevice the fault handler will be called back. + * The protocol stack will be in an undefined state when this happens and the only way to recover will be to + * perform a reset, using e.g. CMSIS NVIC_SystemReset(). + * If the application returns from the fault handler the SoftDevice will call NVIC_SystemReset(). + * + * @note This callback is executed in HardFault context, thus SVC functions cannot be called from the fault callback. + * + * @param[in] id Fault identifier. See @ref NRF_FAULT_IDS. + * @param[in] pc The program counter of the instruction that triggered the fault. + * @param[in] info Optional additional information regarding the fault. Refer to each Fault identifier for details. + * + * @note When id is set to @ref NRF_FAULT_ID_APP_MEMACC, pc will contain the address of the instruction being executed at the time when + * the fault is detected by the CPU. The CPU program counter may have advanced up to 2 instructions (no branching) after the one that triggered the fault. + */ +typedef void (*nrf_fault_handler_t)(uint32_t id, uint32_t pc, uint32_t info); + +/** @} */ + +/** @addtogroup NRF_SDM_FUNCTIONS Functions + * @{ */ + +/**@brief Enables the SoftDevice and by extension the protocol stack. + * + * @note Some care must be taken if a low frequency clock source is already running when calling this function: + * If the LF clock has a different source then the one currently running, it will be stopped. Then, the new + * clock source will be started. + * + * @note This function has no effect when returning with an error. + * + * @post If return code is ::NRF_SUCCESS + * - SoC library and protocol stack APIs are made available. + * - A portion of RAM will be unavailable (see relevant SDS documentation). + * - Some peripherals will be unavailable or available only through the SoC API (see relevant SDS documentation). + * - Interrupts will not arrive from protected peripherals or interrupts. + * - nrf_nvic_ functions must be used instead of CMSIS NVIC_ functions for reliable usage of the SoftDevice. + * - Interrupt latency may be affected by the SoftDevice (see relevant SDS documentation). + * - Chosen low frequency clock source will be running. + * + * @param p_clock_lf_cfg Low frequency clock source and accuracy. + If NULL the clock will be configured as an RC source with rc_ctiv = 16 and .rc_temp_ctiv = 2 + In the case of XTAL source, the PPM accuracy of the chosen clock source must be greater than or equal to the actual characteristics of your XTAL clock. + * @param fault_handler Callback to be invoked in case of fault, cannot be NULL. + * + * @retval ::NRF_SUCCESS + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE SoftDevice is already enabled, and the clock source and fault handler cannot be updated. + * @retval ::NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION SoftDevice interrupt is already enabled, or an enabled interrupt has an illegal priority level. + * @retval ::NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN Unknown low frequency clock source selected. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid clock source configuration supplied in p_clock_lf_cfg. + */ +SVCALL(SD_SOFTDEVICE_ENABLE, uint32_t, sd_softdevice_enable(nrf_clock_lf_cfg_t const * p_clock_lf_cfg, nrf_fault_handler_t fault_handler)); + + +/**@brief Disables the SoftDevice and by extension the protocol stack. + * + * Idempotent function to disable the SoftDevice. + * + * @post SoC library and protocol stack APIs are made unavailable. + * @post All interrupts that was protected by the SoftDevice will be disabled and initialized to priority 0 (highest). + * @post All peripherals used by the SoftDevice will be reset to default values. + * @post All of RAM become available. + * @post All interrupts are forwarded to the application. + * @post LFCLK source chosen in ::sd_softdevice_enable will be left running. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_SOFTDEVICE_DISABLE, uint32_t, sd_softdevice_disable(void)); + +/**@brief Check if the SoftDevice is enabled. + * + * @param[out] p_softdevice_enabled If the SoftDevice is enabled: 1 else 0. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_SOFTDEVICE_IS_ENABLED, uint32_t, sd_softdevice_is_enabled(uint8_t * p_softdevice_enabled)); + +/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the SoftDevice + * + * This function is only intended to be called when a bootloader is enabled. + * + * @param[in] address The base address of the interrupt vector table for forwarded interrupts. + + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, uint32_t, sd_softdevice_vector_table_base_set(uint32_t address)); + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // NRF_SDM_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_soc.h new file mode 100644 index 00000000000..2c4d958750c --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_soc.h @@ -0,0 +1,964 @@ +/* + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @defgroup nrf_soc_api SoC Library API + * @{ + * + * @brief APIs for the SoC library. + * + */ + +#ifndef NRF_SOC_H__ +#define NRF_SOC_H__ + +#include +#include "nrf.h" +#include "nrf_svc.h" +#include "nrf_error.h" +#include "nrf_error_soc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@addtogroup NRF_SOC_DEFINES Defines + * @{ */ + +/**@brief The number of the lowest SVC number reserved for the SoC library. */ +#define SOC_SVC_BASE (0x20) /**< Base value for SVCs that are available when the SoftDevice is disabled. */ +#define SOC_SVC_BASE_NOT_AVAILABLE (0x2C) /**< Base value for SVCs that are not available when the SoftDevice is disabled. */ + +/**@brief Guaranteed time for application to process radio inactive notification. */ +#define NRF_RADIO_NOTIFICATION_INACTIVE_GUARANTEED_TIME_US (62) + +/**@brief The minimum allowed timeslot extension time. */ +#define NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US (200) + +/**@brief The maximum processing time to handle a timeslot extension. */ +#define NRF_RADIO_MAX_EXTENSION_PROCESSING_TIME_US (17) + +/**@brief The latest time before the end of a timeslot the timeslot can be extended. */ +#define NRF_RADIO_MIN_EXTENSION_MARGIN_US (79) + +#define SOC_ECB_KEY_LENGTH (16) /**< ECB key length. */ +#define SOC_ECB_CLEARTEXT_LENGTH (16) /**< ECB cleartext length. */ +#define SOC_ECB_CIPHERTEXT_LENGTH (SOC_ECB_CLEARTEXT_LENGTH) /**< ECB ciphertext length. */ + +#define SD_EVT_IRQn (SWI2_IRQn) /**< SoftDevice Event IRQ number. Used for both protocol events and SoC events. */ +#define SD_EVT_IRQHandler (SWI2_IRQHandler) /**< SoftDevice Event IRQ handler. Used for both protocol events and SoC events. + The default interrupt priority for this handler is set to 4 */ +#define RADIO_NOTIFICATION_IRQn (SWI1_IRQn) /**< The radio notification IRQ number. */ +#define RADIO_NOTIFICATION_IRQHandler (SWI1_IRQHandler) /**< The radio notification IRQ handler. + The default interrupt priority for this handler is set to 4 */ +#define NRF_RADIO_LENGTH_MIN_US (100) /**< The shortest allowed radio timeslot, in microseconds. */ +#define NRF_RADIO_LENGTH_MAX_US (100000) /**< The longest allowed radio timeslot, in microseconds. */ + +#define NRF_RADIO_DISTANCE_MAX_US (128000000UL - 1UL) /**< The longest timeslot distance, in microseconds, allowed for the distance parameter (see @ref nrf_radio_request_normal_t) in the request. */ + +#define NRF_RADIO_EARLIEST_TIMEOUT_MAX_US (128000000UL - 1UL) /**< The longest timeout, in microseconds, allowed when requesting the earliest possible timeslot. */ + +#define NRF_RADIO_START_JITTER_US (2) /**< The maximum jitter in @ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START relative to the requested start time. */ + +/**@} */ + +/**@addtogroup NRF_SOC_ENUMS Enumerations + * @{ */ + +/**@brief The SVC numbers used by the SVC functions in the SoC library. */ +enum NRF_SOC_SVCS +{ + SD_PPI_CHANNEL_ENABLE_GET = SOC_SVC_BASE, + SD_PPI_CHANNEL_ENABLE_SET = SOC_SVC_BASE + 1, + SD_PPI_CHANNEL_ENABLE_CLR = SOC_SVC_BASE + 2, + SD_PPI_CHANNEL_ASSIGN = SOC_SVC_BASE + 3, + SD_PPI_GROUP_TASK_ENABLE = SOC_SVC_BASE + 4, + SD_PPI_GROUP_TASK_DISABLE = SOC_SVC_BASE + 5, + SD_PPI_GROUP_ASSIGN = SOC_SVC_BASE + 6, + SD_PPI_GROUP_GET = SOC_SVC_BASE + 7, + SD_FLASH_PAGE_ERASE = SOC_SVC_BASE + 8, + SD_FLASH_WRITE = SOC_SVC_BASE + 9, + SD_FLASH_PROTECT = SOC_SVC_BASE + 10, + SD_PROTECTED_REGISTER_WRITE = SOC_SVC_BASE + 11, + SD_MUTEX_NEW = SOC_SVC_BASE_NOT_AVAILABLE, + SD_MUTEX_ACQUIRE = SOC_SVC_BASE_NOT_AVAILABLE + 1, + SD_MUTEX_RELEASE = SOC_SVC_BASE_NOT_AVAILABLE + 2, + SD_RAND_APPLICATION_POOL_CAPACITY_GET = SOC_SVC_BASE_NOT_AVAILABLE + 3, + SD_RAND_APPLICATION_BYTES_AVAILABLE_GET = SOC_SVC_BASE_NOT_AVAILABLE + 4, + SD_RAND_APPLICATION_VECTOR_GET = SOC_SVC_BASE_NOT_AVAILABLE + 5, + SD_POWER_MODE_SET = SOC_SVC_BASE_NOT_AVAILABLE + 6, + SD_POWER_SYSTEM_OFF = SOC_SVC_BASE_NOT_AVAILABLE + 7, + SD_POWER_RESET_REASON_GET = SOC_SVC_BASE_NOT_AVAILABLE + 8, + SD_POWER_RESET_REASON_CLR = SOC_SVC_BASE_NOT_AVAILABLE + 9, + SD_POWER_POF_ENABLE = SOC_SVC_BASE_NOT_AVAILABLE + 10, + SD_POWER_POF_THRESHOLD_SET = SOC_SVC_BASE_NOT_AVAILABLE + 11, + SD_POWER_RAM_POWER_SET = SOC_SVC_BASE_NOT_AVAILABLE + 13, + SD_POWER_RAM_POWER_CLR = SOC_SVC_BASE_NOT_AVAILABLE + 14, + SD_POWER_RAM_POWER_GET = SOC_SVC_BASE_NOT_AVAILABLE + 15, + SD_POWER_GPREGRET_SET = SOC_SVC_BASE_NOT_AVAILABLE + 16, + SD_POWER_GPREGRET_CLR = SOC_SVC_BASE_NOT_AVAILABLE + 17, + SD_POWER_GPREGRET_GET = SOC_SVC_BASE_NOT_AVAILABLE + 18, + SD_POWER_DCDC_MODE_SET = SOC_SVC_BASE_NOT_AVAILABLE + 19, + SD_APP_EVT_WAIT = SOC_SVC_BASE_NOT_AVAILABLE + 21, + SD_CLOCK_HFCLK_REQUEST = SOC_SVC_BASE_NOT_AVAILABLE + 22, + SD_CLOCK_HFCLK_RELEASE = SOC_SVC_BASE_NOT_AVAILABLE + 23, + SD_CLOCK_HFCLK_IS_RUNNING = SOC_SVC_BASE_NOT_AVAILABLE + 24, + SD_RADIO_NOTIFICATION_CFG_SET = SOC_SVC_BASE_NOT_AVAILABLE + 25, + SD_ECB_BLOCK_ENCRYPT = SOC_SVC_BASE_NOT_AVAILABLE + 26, + SD_ECB_BLOCKS_ENCRYPT = SOC_SVC_BASE_NOT_AVAILABLE + 27, + SD_RADIO_SESSION_OPEN = SOC_SVC_BASE_NOT_AVAILABLE + 28, + SD_RADIO_SESSION_CLOSE = SOC_SVC_BASE_NOT_AVAILABLE + 29, + SD_RADIO_REQUEST = SOC_SVC_BASE_NOT_AVAILABLE + 30, + SD_EVT_GET = SOC_SVC_BASE_NOT_AVAILABLE + 31, + SD_TEMP_GET = SOC_SVC_BASE_NOT_AVAILABLE + 32, + SVC_SOC_LAST = SOC_SVC_BASE_NOT_AVAILABLE + 37 +}; + +/**@brief Possible values of a ::nrf_mutex_t. */ +enum NRF_MUTEX_VALUES +{ + NRF_MUTEX_FREE, + NRF_MUTEX_TAKEN +}; + +/**@brief Power modes. */ +enum NRF_POWER_MODES +{ + NRF_POWER_MODE_CONSTLAT, /**< Constant latency mode. See power management in the reference manual. */ + NRF_POWER_MODE_LOWPWR /**< Low power mode. See power management in the reference manual. */ +}; + + +/**@brief Power failure thresholds */ +enum NRF_POWER_THRESHOLDS +{ + NRF_POWER_THRESHOLD_V17 = 4UL, /**< 1.7 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V18, /**< 1.8 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V19, /**< 1.9 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V20, /**< 2.0 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V21, /**< 2.1 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V22, /**< 2.2 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V23, /**< 2.3 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V24, /**< 2.4 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V25, /**< 2.5 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V26, /**< 2.6 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V27, /**< 2.7 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V28 /**< 2.8 Volts power failure threshold. */ +}; + + + +/**@brief DC/DC converter modes. */ +enum NRF_POWER_DCDC_MODES +{ + NRF_POWER_DCDC_DISABLE, /**< The DCDC is disabled. */ + NRF_POWER_DCDC_ENABLE /**< The DCDC is enabled. */ +}; + +/**@brief Radio notification distances. */ +enum NRF_RADIO_NOTIFICATION_DISTANCES +{ + NRF_RADIO_NOTIFICATION_DISTANCE_NONE = 0, /**< The event does not have a notification. */ + NRF_RADIO_NOTIFICATION_DISTANCE_800US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_1740US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_2680US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_3620US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_4560US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_5500US /**< The distance from the active notification to start of radio activity. */ +}; + + +/**@brief Radio notification types. */ +enum NRF_RADIO_NOTIFICATION_TYPES +{ + NRF_RADIO_NOTIFICATION_TYPE_NONE = 0, /**< The event does not have a radio notification signal. */ + NRF_RADIO_NOTIFICATION_TYPE_INT_ON_ACTIVE, /**< Using interrupt for notification when the radio will be enabled. */ + NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE, /**< Using interrupt for notification when the radio has been disabled. */ + NRF_RADIO_NOTIFICATION_TYPE_INT_ON_BOTH, /**< Using interrupt for notification both when the radio will be enabled and disabled. */ +}; + +/**@brief The Radio signal callback types. */ +enum NRF_RADIO_CALLBACK_SIGNAL_TYPE +{ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_START, /**< This signal indicates the start of the radio timeslot. */ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_TIMER0, /**< This signal indicates the NRF_TIMER0 interrupt. */ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_RADIO, /**< This signal indicates the NRF_RADIO interrupt. */ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_EXTEND_FAILED, /**< This signal indicates extend action failed. */ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_EXTEND_SUCCEEDED /**< This signal indicates extend action succeeded. */ +}; + +/**@brief The actions requested by the signal callback. + * + * This code gives the SOC instructions about what action to take when the signal callback has + * returned. + */ +enum NRF_RADIO_SIGNAL_CALLBACK_ACTION +{ + NRF_RADIO_SIGNAL_CALLBACK_ACTION_NONE, /**< Return without action. */ + NRF_RADIO_SIGNAL_CALLBACK_ACTION_EXTEND, /**< Request an extension of the current + timeslot. Maximum execution time for this action: + @ref NRF_RADIO_MAX_EXTENSION_PROCESSING_TIME_US. + This action must be started at least + @ref NRF_RADIO_MIN_EXTENSION_MARGIN_US before + the end of the timeslot. */ + NRF_RADIO_SIGNAL_CALLBACK_ACTION_END, /**< End the current radio timeslot. */ + NRF_RADIO_SIGNAL_CALLBACK_ACTION_REQUEST_AND_END /**< Request a new radio timeslot and end the current timeslot. */ +}; + +/**@brief Radio timeslot high frequency clock source configuration. */ +enum NRF_RADIO_HFCLK_CFG +{ + NRF_RADIO_HFCLK_CFG_XTAL_GUARANTEED, /**< The SoftDevice will guarantee that the high frequency clock source is the + external crystal for the whole duration of the timeslot. This should be the + preferred option for events that use the radio or require high timing accuracy. + @note The SoftDevice will automatically turn on and off the external crystal, + at the beginning and end of the timeslot, respectively. The crystal may also + intentionally be left running after the timeslot, in cases where it is needed + by the SoftDevice shortly after the end of the timeslot. */ + NRF_RADIO_HFCLK_CFG_NO_GUARANTEE /**< This configuration allows for earlier and tighter scheduling of timeslots. + The RC oscillator may be the clock source in part or for the whole duration of the timeslot. + The RC oscillator's accuracy must therefore be taken into consideration. + @note If the application will use the radio peripheral in timeslots with this configuration, + it must make sure that the crystal is running and stable before starting the radio. */ +}; + +/**@brief Radio timeslot priorities. */ +enum NRF_RADIO_PRIORITY +{ + NRF_RADIO_PRIORITY_HIGH, /**< High (equal priority as the normal connection priority of the SoftDevice stack(s)). */ + NRF_RADIO_PRIORITY_NORMAL, /**< Normal (equal priority as the priority of secondary activities of the SoftDevice stack(s)). */ +}; + +/**@brief Radio timeslot request type. */ +enum NRF_RADIO_REQUEST_TYPE +{ + NRF_RADIO_REQ_TYPE_EARLIEST, /**< Request radio timeslot as early as possible. This should always be used for the first request in a session. */ + NRF_RADIO_REQ_TYPE_NORMAL /**< Normal radio timeslot request. */ +}; + +/**@brief SoC Events. */ +enum NRF_SOC_EVTS +{ + NRF_EVT_HFCLKSTARTED, /**< Event indicating that the HFCLK has started. */ + NRF_EVT_POWER_FAILURE_WARNING, /**< Event indicating that a power failure warning has occurred. */ + NRF_EVT_FLASH_OPERATION_SUCCESS, /**< Event indicating that the ongoing flash operation has completed successfully. */ + NRF_EVT_FLASH_OPERATION_ERROR, /**< Event indicating that the ongoing flash operation has timed out with an error. */ + NRF_EVT_RADIO_BLOCKED, /**< Event indicating that a radio timeslot was blocked. */ + NRF_EVT_RADIO_CANCELED, /**< Event indicating that a radio timeslot was canceled by SoftDevice. */ + NRF_EVT_RADIO_SIGNAL_CALLBACK_INVALID_RETURN, /**< Event indicating that a radio timeslot signal callback handler return was invalid. */ + NRF_EVT_RADIO_SESSION_IDLE, /**< Event indicating that a radio timeslot session is idle. */ + NRF_EVT_RADIO_SESSION_CLOSED, /**< Event indicating that a radio timeslot session is closed. */ + NRF_EVT_NUMBER_OF_EVTS +}; + +/**@} */ + + +/**@addtogroup NRF_SOC_STRUCTURES Structures + * @{ */ + +/**@brief Represents a mutex for use with the nrf_mutex functions. + * @note Accessing the value directly is not safe, use the mutex functions! + */ +typedef volatile uint8_t nrf_mutex_t; + +/**@brief Parameters for a request for a timeslot as early as possible. */ +typedef struct +{ + uint8_t hfclk; /**< High frequency clock source, see @ref NRF_RADIO_HFCLK_CFG. */ + uint8_t priority; /**< The radio timeslot priority, see @ref NRF_RADIO_PRIORITY. */ + uint32_t length_us; /**< The radio timeslot length (in the range 100 to 100,000] microseconds). */ + uint32_t timeout_us; /**< Longest acceptable delay until the start of the requested timeslot (up to @ref NRF_RADIO_EARLIEST_TIMEOUT_MAX_US microseconds). */ +} nrf_radio_request_earliest_t; + +/**@brief Parameters for a normal radio timeslot request. */ +typedef struct +{ + uint8_t hfclk; /**< High frequency clock source, see @ref NRF_RADIO_HFCLK_CFG. */ + uint8_t priority; /**< The radio timeslot priority, see @ref NRF_RADIO_PRIORITY. */ + uint32_t distance_us; /**< Distance from the start of the previous radio timeslot (up to @ref NRF_RADIO_DISTANCE_MAX_US microseconds). */ + uint32_t length_us; /**< The radio timeslot length (in the range [100..100,000] microseconds). */ +} nrf_radio_request_normal_t; + +/**@brief Radio timeslot request parameters. */ +typedef struct +{ + uint8_t request_type; /**< Type of request, see @ref NRF_RADIO_REQUEST_TYPE. */ + union + { + nrf_radio_request_earliest_t earliest; /**< Parameters for requesting a radio timeslot as early as possible. */ + nrf_radio_request_normal_t normal; /**< Parameters for requesting a normal radio timeslot. */ + } params; /**< Parameter union. */ +} nrf_radio_request_t; + +/**@brief Return parameters of the radio timeslot signal callback. */ +typedef struct +{ + uint8_t callback_action; /**< The action requested by the application when returning from the signal callback, see @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION. */ + union + { + struct + { + nrf_radio_request_t * p_next; /**< The request parameters for the next radio timeslot. */ + } request; /**< Additional parameters for return_code @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION_REQUEST_AND_END. */ + struct + { + uint32_t length_us; /**< Requested extension of the radio timeslot duration (microseconds) (for minimum time see @ref NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US). */ + } extend; /**< Additional parameters for return_code @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION_EXTEND. */ + } params; /**< Parameter union. */ +} nrf_radio_signal_callback_return_param_t; + +/**@brief The radio timeslot signal callback type. + * + * @note In case of invalid return parameters, the radio timeslot will automatically end + * immediately after returning from the signal callback and the + * @ref NRF_EVT_RADIO_SIGNAL_CALLBACK_INVALID_RETURN event will be sent. + * @note The returned struct pointer must remain valid after the signal callback + * function returns. For instance, this means that it must not point to a stack variable. + * + * @param[in] signal_type Type of signal, see @ref NRF_RADIO_CALLBACK_SIGNAL_TYPE. + * + * @return Pointer to structure containing action requested by the application. + */ +typedef nrf_radio_signal_callback_return_param_t * (*nrf_radio_signal_callback_t) (uint8_t signal_type); + +/**@brief AES ECB parameter typedefs */ +typedef uint8_t soc_ecb_key_t[SOC_ECB_KEY_LENGTH]; /**< Encryption key type. */ +typedef uint8_t soc_ecb_cleartext_t[SOC_ECB_CLEARTEXT_LENGTH]; /**< Cleartext data type. */ +typedef uint8_t soc_ecb_ciphertext_t[SOC_ECB_CIPHERTEXT_LENGTH]; /**< Ciphertext data type. */ + +/**@brief AES ECB data structure */ +typedef struct +{ + soc_ecb_key_t key; /**< Encryption key. */ + soc_ecb_cleartext_t cleartext; /**< Cleartext data. */ + soc_ecb_ciphertext_t ciphertext; /**< Ciphertext data. */ +} nrf_ecb_hal_data_t; + +/**@brief AES ECB block. Used to provide multiple blocks in a single call + to @ref sd_ecb_blocks_encrypt.*/ +typedef struct +{ + soc_ecb_key_t const * p_key; /**< Pointer to the Encryption key. */ + soc_ecb_cleartext_t const * p_cleartext; /**< Pointer to the Cleartext data. */ + soc_ecb_ciphertext_t * p_ciphertext; /**< Pointer to the Ciphertext data. */ +} nrf_ecb_hal_data_block_t; + +/**@} */ + +/**@addtogroup NRF_SOC_FUNCTIONS Functions + * @{ */ + +/**@brief Initialize a mutex. + * + * @param[in] p_mutex Pointer to the mutex to initialize. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_MUTEX_NEW, uint32_t, sd_mutex_new(nrf_mutex_t * p_mutex)); + +/**@brief Attempt to acquire a mutex. + * + * @param[in] p_mutex Pointer to the mutex to acquire. + * + * @retval ::NRF_SUCCESS The mutex was successfully acquired. + * @retval ::NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN The mutex could not be acquired. + */ +SVCALL(SD_MUTEX_ACQUIRE, uint32_t, sd_mutex_acquire(nrf_mutex_t * p_mutex)); + +/**@brief Release a mutex. + * + * @param[in] p_mutex Pointer to the mutex to release. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_MUTEX_RELEASE, uint32_t, sd_mutex_release(nrf_mutex_t * p_mutex)); + +/**@brief Query the capacity of the application random pool. + * + * @param[out] p_pool_capacity The capacity of the pool. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_RAND_APPLICATION_POOL_CAPACITY_GET, uint32_t, sd_rand_application_pool_capacity_get(uint8_t * p_pool_capacity)); + +/**@brief Get number of random bytes available to the application. + * + * @param[out] p_bytes_available The number of bytes currently available in the pool. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_RAND_APPLICATION_BYTES_AVAILABLE_GET, uint32_t, sd_rand_application_bytes_available_get(uint8_t * p_bytes_available)); + +/**@brief Get random bytes from the application pool. + * + * @param[out] p_buff Pointer to unit8_t buffer for storing the bytes. + * @param[in] length Number of bytes to take from pool and place in p_buff. + * + * @retval ::NRF_SUCCESS The requested bytes were written to p_buff. + * @retval ::NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES No bytes were written to the buffer, because there were not enough bytes available. +*/ +SVCALL(SD_RAND_APPLICATION_VECTOR_GET, uint32_t, sd_rand_application_vector_get(uint8_t * p_buff, uint8_t length)); + +/**@brief Gets the reset reason register. + * + * @param[out] p_reset_reason Contents of the NRF_POWER->RESETREAS register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RESET_REASON_GET, uint32_t, sd_power_reset_reason_get(uint32_t * p_reset_reason)); + +/**@brief Clears the bits of the reset reason register. + * + * @param[in] reset_reason_clr_msk Contains the bits to clear from the reset reason register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RESET_REASON_CLR, uint32_t, sd_power_reset_reason_clr(uint32_t reset_reason_clr_msk)); + +/**@brief Sets the power mode when in CPU sleep. + * + * @param[in] power_mode The power mode to use when in CPU sleep, see @ref NRF_POWER_MODES. @sa sd_app_evt_wait + * + * @retval ::NRF_SUCCESS The power mode was set. + * @retval ::NRF_ERROR_SOC_POWER_MODE_UNKNOWN The power mode was unknown. + */ +SVCALL(SD_POWER_MODE_SET, uint32_t, sd_power_mode_set(uint8_t power_mode)); + +/**@brief Puts the chip in System OFF mode. + * + * @retval ::NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN + */ +SVCALL(SD_POWER_SYSTEM_OFF, uint32_t, sd_power_system_off(void)); + +/**@brief Enables or disables the power-fail comparator. + * + * Enabling this will give a SoftDevice event (NRF_EVT_POWER_FAILURE_WARNING) when the power failure warning occurs. + * The event can be retrieved with sd_evt_get(); + * + * @param[in] pof_enable True if the power-fail comparator should be enabled, false if it should be disabled. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_POF_ENABLE, uint32_t, sd_power_pof_enable(uint8_t pof_enable)); + + +/**@brief Sets the power failure comparator threshold value. + * + * + * @param[in] threshold The power-fail threshold value to use, see @ref NRF_POWER_THRESHOLDS. + * + * @retval ::NRF_SUCCESS The power failure threshold was set. + * @retval ::NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN The power failure threshold is unknown. + */ +SVCALL(SD_POWER_POF_THRESHOLD_SET, uint32_t, sd_power_pof_threshold_set(uint8_t threshold)); + + +/**@brief Writes the NRF_POWER->RAM[index].POWERSET register. + * + * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWERSET register to write to. + * @param[in] ram_powerset Contains the word to write to the NRF_POWER->RAM[index].POWERSET register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RAM_POWER_SET, uint32_t, sd_power_ram_power_set(uint8_t index, uint32_t ram_powerset)); + +/**@brief Writes the NRF_POWER->RAM[index].POWERCLR register. + * + * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWERCLR register to write to. + * @param[in] ram_powerclr Contains the word to write to the NRF_POWER->RAM[index].POWERCLR register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RAM_POWER_CLR, uint32_t, sd_power_ram_power_clr(uint8_t index, uint32_t ram_powerclr)); + +/**@brief Get contents of NRF_POWER->RAM[index].POWER register, indicates power status of RAM[index] blocks. + * + * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWER register to read from. + * @param[out] p_ram_power Content of NRF_POWER->RAM[index].POWER register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RAM_POWER_GET, uint32_t, sd_power_ram_power_get(uint8_t index, uint32_t * p_ram_power)); + +/**@brief Set bits in the general purpose retention registers (NRF_POWER->GPREGRET*). + * + * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. + * @param[in] gpregret_msk Bits to be set in the GPREGRET register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_GPREGRET_SET, uint32_t, sd_power_gpregret_set(uint32_t gpregret_id, uint32_t gpregret_msk)); + +/**@brief Clear bits in the general purpose retention registers (NRF_POWER->GPREGRET*). + * + * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. + * @param[in] gpregret_msk Bits to be clear in the GPREGRET register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_GPREGRET_CLR, uint32_t, sd_power_gpregret_clr(uint32_t gpregret_id, uint32_t gpregret_msk)); + +/**@brief Get contents of the general purpose retention registers (NRF_POWER->GPREGRET*). + * + * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. + * @param[out] p_gpregret Contents of the GPREGRET register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_GPREGRET_GET, uint32_t, sd_power_gpregret_get(uint32_t gpregret_id, uint32_t *p_gpregret)); + +/**@brief Enable or disable the DC/DC regulator. + * + * @param[in] dcdc_mode The mode of the DCDC, see @ref NRF_POWER_DCDC_MODES. + * + * @retval ::NRF_SUCCESS + * @retval ::NRF_ERROR_INVALID_PARAM The DCDC mode is invalid. + */ +SVCALL(SD_POWER_DCDC_MODE_SET, uint32_t, sd_power_dcdc_mode_set(uint8_t dcdc_mode)); + + +/**@brief Request the high frequency crystal oscillator. + * + * Will start the high frequency crystal oscillator, the startup time of the crystal varies + * and the ::sd_clock_hfclk_is_running function can be polled to check if it has started. + * + * @see sd_clock_hfclk_is_running + * @see sd_clock_hfclk_release + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_CLOCK_HFCLK_REQUEST, uint32_t, sd_clock_hfclk_request(void)); + +/**@brief Releases the high frequency crystal oscillator. + * + * Will stop the high frequency crystal oscillator, this happens immediately. + * + * @see sd_clock_hfclk_is_running + * @see sd_clock_hfclk_request + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_CLOCK_HFCLK_RELEASE, uint32_t, sd_clock_hfclk_release(void)); + +/**@brief Checks if the high frequency crystal oscillator is running. + * + * @see sd_clock_hfclk_request + * @see sd_clock_hfclk_release + * + * @param[out] p_is_running 1 if the external crystal oscillator is running, 0 if not. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_CLOCK_HFCLK_IS_RUNNING, uint32_t, sd_clock_hfclk_is_running(uint32_t * p_is_running)); + +/**@brief Waits for an application event. + * + * An application event is either an application interrupt or a pended interrupt when the interrupt + * is disabled. + * + * When the application waits for an application event by calling this function, an interrupt that + * is enabled will be taken immediately on pending since this function will wait in thread mode, + * then the execution will return in the application's main thread. + * + * In order to wake up from disabled interrupts, the SEVONPEND flag has to be set in the Cortex-M + * MCU's System Control Register (SCR), CMSIS_SCB. In that case, when a disabled interrupt gets + * pended, this function will return to the application's main thread. + * + * @note The application must ensure that the pended flag is cleared using ::sd_nvic_ClearPendingIRQ + * in order to sleep using this function. This is only necessary for disabled interrupts, as + * the interrupt handler will clear the pending flag automatically for enabled interrupts. + * + * @note If an application interrupt has happened since the last time sd_app_evt_wait was + * called this function will return immediately and not go to sleep. This is to avoid race + * conditions that can occur when a flag is updated in the interrupt handler and processed + * in the main loop. + * + * @post An application interrupt has happened or a interrupt pending flag is set. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_APP_EVT_WAIT, uint32_t, sd_app_evt_wait(void)); + +/**@brief Get PPI channel enable register contents. + * + * @param[out] p_channel_enable The contents of the PPI CHEN register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_CHANNEL_ENABLE_GET, uint32_t, sd_ppi_channel_enable_get(uint32_t * p_channel_enable)); + +/**@brief Set PPI channel enable register. + * + * @param[in] channel_enable_set_msk Mask containing the bits to set in the PPI CHEN register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_CHANNEL_ENABLE_SET, uint32_t, sd_ppi_channel_enable_set(uint32_t channel_enable_set_msk)); + +/**@brief Clear PPI channel enable register. + * + * @param[in] channel_enable_clr_msk Mask containing the bits to clear in the PPI CHEN register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_CHANNEL_ENABLE_CLR, uint32_t, sd_ppi_channel_enable_clr(uint32_t channel_enable_clr_msk)); + +/**@brief Assign endpoints to a PPI channel. + * + * @param[in] channel_num Number of the PPI channel to assign. + * @param[in] evt_endpoint Event endpoint of the PPI channel. + * @param[in] task_endpoint Task endpoint of the PPI channel. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_CHANNEL The channel number is invalid. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_CHANNEL_ASSIGN, uint32_t, sd_ppi_channel_assign(uint8_t channel_num, const volatile void * evt_endpoint, const volatile void * task_endpoint)); + +/**@brief Task to enable a channel group. + * + * @param[in] group_num Number of the channel group. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_GROUP_TASK_ENABLE, uint32_t, sd_ppi_group_task_enable(uint8_t group_num)); + +/**@brief Task to disable a channel group. + * + * @param[in] group_num Number of the PPI group. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_GROUP_TASK_DISABLE, uint32_t, sd_ppi_group_task_disable(uint8_t group_num)); + +/**@brief Assign PPI channels to a channel group. + * + * @param[in] group_num Number of the channel group. + * @param[in] channel_msk Mask of the channels to assign to the group. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_GROUP_ASSIGN, uint32_t, sd_ppi_group_assign(uint8_t group_num, uint32_t channel_msk)); + +/**@brief Gets the PPI channels of a channel group. + * + * @param[in] group_num Number of the channel group. + * @param[out] p_channel_msk Mask of the channels assigned to the group. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_GROUP_GET, uint32_t, sd_ppi_group_get(uint8_t group_num, uint32_t * p_channel_msk)); + +/**@brief Configures the Radio Notification signal. + * + * @note + * - The notification signal latency depends on the interrupt priority settings of SWI used + * for notification signal. + * - To ensure that the radio notification signal behaves in a consistent way, the radio + * notifications must be configured when there is no protocol stack or other SoftDevice + * activity in progress. It is recommended that the radio notification signal is + * configured directly after the SoftDevice has been enabled. + * - In the period between the ACTIVE signal and the start of the Radio Event, the SoftDevice + * will interrupt the application to do Radio Event preparation. + * - Using the Radio Notification feature may limit the bandwidth, as the SoftDevice may have + * to shorten the connection events to have time for the Radio Notification signals. + * + * @param[in] type Type of notification signal, see @ref NRF_RADIO_NOTIFICATION_TYPES. + * @ref NRF_RADIO_NOTIFICATION_TYPE_NONE shall be used to turn off radio + * notification. Using @ref NRF_RADIO_NOTIFICATION_DISTANCE_NONE is + * recommended (but not required) to be used with + * @ref NRF_RADIO_NOTIFICATION_TYPE_NONE. + * + * @param[in] distance Distance between the notification signal and start of radio activity, see @ref NRF_RADIO_NOTIFICATION_DISTANCES. + * This parameter is ignored when @ref NRF_RADIO_NOTIFICATION_TYPE_NONE or + * @ref NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE is used. + * + * @retval ::NRF_ERROR_INVALID_PARAM The group number is invalid. + * @retval ::NRF_ERROR_INVALID_STATE A protocol stack or other SoftDevice is running. Stop all + * running activities and retry. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_RADIO_NOTIFICATION_CFG_SET, uint32_t, sd_radio_notification_cfg_set(uint8_t type, uint8_t distance)); + +/**@brief Encrypts a block according to the specified parameters. + * + * 128-bit AES encryption. + * + * @note: + * - The application may set the SEVONPEND bit in the SCR to 1 to make the SoftDevice sleep while + * the ECB is running. The SEVONPEND bit should only be cleared (set to 0) from application + * main or low interrupt level. + * + * @param[in, out] p_ecb_data Pointer to the ECB parameters' struct (two input + * parameters and one output parameter). + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_ECB_BLOCK_ENCRYPT, uint32_t, sd_ecb_block_encrypt(nrf_ecb_hal_data_t * p_ecb_data)); + +/**@brief Encrypts multiple data blocks provided as an array of data block structures. + * + * @details: Performs 128-bit AES encryption on multiple data blocks + * + * @note: + * - The application may set the SEVONPEND bit in the SCR to 1 to make the SoftDevice sleep while + * the ECB is running. The SEVONPEND bit should only be cleared (set to 0) from application + * main or low interrupt level. + * + * @param[in] block_count Count of blocks in the p_data_blocks array. + * @param[in,out] p_data_blocks Pointer to the first entry in a contiguous array of + * @ref nrf_ecb_hal_data_block_t structures. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_ECB_BLOCKS_ENCRYPT, uint32_t, sd_ecb_blocks_encrypt(uint8_t block_count, nrf_ecb_hal_data_block_t * p_data_blocks)); + +/**@brief Gets any pending events generated by the SoC API. + * + * The application should keep calling this function to get events, until ::NRF_ERROR_NOT_FOUND is returned. + * + * @param[out] p_evt_id Set to one of the values in @ref NRF_SOC_EVTS, if any events are pending. + * + * @retval ::NRF_SUCCESS An event was pending. The event id is written in the p_evt_id parameter. + * @retval ::NRF_ERROR_NOT_FOUND No pending events. + */ +SVCALL(SD_EVT_GET, uint32_t, sd_evt_get(uint32_t * p_evt_id)); + +/**@brief Get the temperature measured on the chip + * + * This function will block until the temperature measurement is done. + * It takes around 50 us from call to return. + * + * @param[out] p_temp Result of temperature measurement. Die temperature in 0.25 degrees Celsius. + * + * @retval ::NRF_SUCCESS A temperature measurement was done, and the temperature was written to temp + */ +SVCALL(SD_TEMP_GET, uint32_t, sd_temp_get(int32_t * p_temp)); + +/**@brief Flash Write +* +* Commands to write a buffer to flash +* +* If the SoftDevice is enabled: +* This call initiates the flash access command, and its completion will be communicated to the +* application with exactly one of the following events: +* - @ref NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed. +* - @ref NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started. +* +* If the SoftDevice is not enabled no event will be generated, and this call will return @ref NRF_SUCCESS when the + * write has been completed +* +* @note +* - This call takes control over the radio and the CPU during flash erase and write to make sure that +* they will not interfere with the flash access. This means that all interrupts will be blocked +* for a predictable time (depending on the NVMC specification in the device's Product Specification +* and the command parameters). +* - The data in the p_src buffer should not be modified before the @ref NRF_EVT_FLASH_OPERATION_SUCCESS +* or the @ref NRF_EVT_FLASH_OPERATION_ERROR have been received if the SoftDevice is enabled. +* - This call will make the SoftDevice trigger a hardfault when the page is written, if it is +* protected. +* +* +* @param[in] p_dst Pointer to start of flash location to be written. +* @param[in] p_src Pointer to buffer with data to be written. +* @param[in] size Number of 32-bit words to write. Maximum size is the number of words in one +* flash page. See the device's Product Specification for details. +* +* @retval ::NRF_ERROR_INVALID_ADDR Tried to write to a non existing flash address, or p_dst or p_src was unaligned. +* @retval ::NRF_ERROR_BUSY The previous command has not yet completed. +* @retval ::NRF_ERROR_INVALID_LENGTH Size was 0, or higher than the maximum allowed size. +* @retval ::NRF_ERROR_FORBIDDEN Tried to write to an address outside the application flash area. +* @retval ::NRF_SUCCESS The command was accepted. +*/ +SVCALL(SD_FLASH_WRITE, uint32_t, sd_flash_write(uint32_t * p_dst, uint32_t const * p_src, uint32_t size)); + + +/**@brief Flash Erase page +* +* Commands to erase a flash page +* If the SoftDevice is enabled: +* This call initiates the flash access command, and its completion will be communicated to the +* application with exactly one of the following events: +* - @ref NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed. +* - @ref NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started. +* +* If the SoftDevice is not enabled no event will be generated, and this call will return @ref NRF_SUCCESS when the +* erase has been completed +* +* @note +* - This call takes control over the radio and the CPU during flash erase and write to make sure that +* they will not interfere with the flash access. This means that all interrupts will be blocked +* for a predictable time (depending on the NVMC specification in the device's Product Specification +* and the command parameters). +* - This call will make the SoftDevice trigger a hardfault when the page is erased, if it is +* protected. +* +* +* @param[in] page_number Page number of the page to erase +* +* @retval ::NRF_ERROR_INTERNAL If a new session could not be opened due to an internal error. +* @retval ::NRF_ERROR_INVALID_ADDR Tried to erase to a non existing flash page. +* @retval ::NRF_ERROR_BUSY The previous command has not yet completed. +* @retval ::NRF_ERROR_FORBIDDEN Tried to erase a page outside the application flash area. +* @retval ::NRF_SUCCESS The command was accepted. +*/ +SVCALL(SD_FLASH_PAGE_ERASE, uint32_t, sd_flash_page_erase(uint32_t page_number)); + + +/**@brief Flash Protection set + * + * Commands to set the flash protection configuration registers. + This sets the CONFIGx registers of the BPROT peripheral. + * + * @note Not all parameters are valid for all products. Some bits in each parameter may not be + * valid for your product. Please refer your Product Specification for more details. + * + * @note To read the values read them directly. They are only write-protected. + * + * @note It is possible to use @ref sd_protected_register_write instead of this function. + * + * @param[in] block_cfg0 Value to be written to the configuration register. + * @param[in] block_cfg1 Value to be written to the configuration register. + * @param[in] block_cfg2 Value to be written to the configuration register. + * @param[in] block_cfg3 Value to be written to the configuration register. + * + * @retval ::NRF_ERROR_NOT_SUPPORTED Non-zero value supplied to one or more of the unsupported parameters. + * @retval ::NRF_SUCCESS Values successfully written to configuration registers. + */ +SVCALL(SD_FLASH_PROTECT, uint32_t, sd_flash_protect(uint32_t block_cfg0, uint32_t block_cfg1, uint32_t block_cfg2, uint32_t block_cfg3)); + +/**@brief Opens a session for radio timeslot requests. + * + * @note Only one session can be open at a time. + * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START) will be called when the radio timeslot + * starts. From this point the NRF_RADIO and NRF_TIMER0 peripherals can be freely accessed + * by the application. + * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_TIMER0) is called whenever the NRF_TIMER0 + * interrupt occurs. + * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_RADIO) is called whenever the NRF_RADIO + * interrupt occurs. + * @note p_radio_signal_callback() will be called at ARM interrupt priority level 0. This + * implies that none of the sd_* API calls can be used from p_radio_signal_callback(). + * + * @param[in] p_radio_signal_callback The signal callback. + * + * @retval ::NRF_ERROR_INVALID_ADDR p_radio_signal_callback is an invalid function pointer. + * @retval ::NRF_ERROR_BUSY If session cannot be opened. + * @retval ::NRF_ERROR_INTERNAL If a new session could not be opened due to an internal error. + * @retval ::NRF_SUCCESS Otherwise. + */ + SVCALL(SD_RADIO_SESSION_OPEN, uint32_t, sd_radio_session_open(nrf_radio_signal_callback_t p_radio_signal_callback)); + +/**@brief Closes a session for radio timeslot requests. + * + * @note Any current radio timeslot will be finished before the session is closed. + * @note If a radio timeslot is scheduled when the session is closed, it will be canceled. + * @note The application cannot consider the session closed until the @ref NRF_EVT_RADIO_SESSION_CLOSED + * event is received. + * + * @retval ::NRF_ERROR_FORBIDDEN If session not opened. + * @retval ::NRF_ERROR_BUSY If session is currently being closed. + * @retval ::NRF_SUCCESS Otherwise. + */ + SVCALL(SD_RADIO_SESSION_CLOSE, uint32_t, sd_radio_session_close(void)); + +/**@brief Requests a radio timeslot. + * + * @note The request type is determined by p_request->request_type, and can be one of @ref NRF_RADIO_REQ_TYPE_EARLIEST + * and @ref NRF_RADIO_REQ_TYPE_NORMAL. The first request in a session must always be of type @ref NRF_RADIO_REQ_TYPE_EARLIEST. + * @note For a normal request (@ref NRF_RADIO_REQ_TYPE_NORMAL), the start time of a radio timeslot is specified by + * p_request->distance_us and is given relative to the start of the previous timeslot. + * @note A too small p_request->distance_us will lead to a @ref NRF_EVT_RADIO_BLOCKED event. + * @note Timeslots scheduled too close will lead to a @ref NRF_EVT_RADIO_BLOCKED event. + * @note See the SoftDevice Specification for more on radio timeslot scheduling, distances and lengths. + * @note If an opportunity for the first radio timeslot is not found before 100 ms after the call to this + * function, it is not scheduled, and instead a @ref NRF_EVT_RADIO_BLOCKED event is sent. + * The application may then try to schedule the first radio timeslot again. + * @note Successful requests will result in nrf_radio_signal_callback_t(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START). + * Unsuccessful requests will result in a @ref NRF_EVT_RADIO_BLOCKED event, see @ref NRF_SOC_EVTS. + * @note The jitter in the start time of the radio timeslots is +/- @ref NRF_RADIO_START_JITTER_US us. + * @note The nrf_radio_signal_callback_t(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START) call has a latency relative to the + * specified radio timeslot start, but this does not affect the actual start time of the timeslot. + * @note NRF_TIMER0 is reset at the start of the radio timeslot, and is clocked at 1MHz from the high frequency + * (16 MHz) clock source. If p_request->hfclk_force_xtal is true, the high frequency clock is + * guaranteed to be clocked from the external crystal. + * @note The SoftDevice will neither access the NRF_RADIO peripheral nor the NRF_TIMER0 peripheral + * during the radio timeslot. + * + * @param[in] p_request Pointer to the request parameters. + * + * @retval ::NRF_ERROR_FORBIDDEN If session not opened or the session is not IDLE. + * @retval ::NRF_ERROR_INVALID_ADDR If the p_request pointer is invalid. + * @retval ::NRF_ERROR_INVALID_PARAM If the parameters of p_request are not valid. + * @retval ::NRF_SUCCESS Otherwise. + */ + SVCALL(SD_RADIO_REQUEST, uint32_t, sd_radio_request(nrf_radio_request_t const * p_request)); + +/**@brief Write register protected by the SoftDevice + * + * This function writes to a register that is write-protected by the SoftDevice. Please refer to your + * SoftDevice Specification for more details about which registers that are protected by SoftDevice. + * This function can write to the following protected peripheral: + * - BPROT + * + * @note Protected registers may be read directly. + * @note Register that are write-once will return @ref NRF_SUCCESS on second set, even the value in + * the register has not changed. See the Product Specification for more details about register + * properties. + * + * @param[in] p_register Pointer to register to be written. + * @param[in] value Value to be written to the register. + * + * @retval ::NRF_ERROR_INVALID_ADDR This function can not write to the reguested register. + * @retval ::NRF_SUCCESS Value successfully written to register. + * + */ +SVCALL(SD_PROTECTED_REGISTER_WRITE, uint32_t, sd_protected_register_write(volatile uint32_t * p_register, uint32_t value)); + +/**@} */ + +#ifdef __cplusplus +} +#endif +#endif // NRF_SOC_H__ + +/**@} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_svc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_svc.h new file mode 100644 index 00000000000..292c6929828 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_svc.h @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef NRF_SVC__ +#define NRF_SVC__ + +#include "stdint.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef SVCALL_AS_NORMAL_FUNCTION +#define SVCALL(number, return_type, signature) return_type signature +#else + +#ifndef SVCALL +#if defined (__CC_ARM) +#define SVCALL(number, return_type, signature) return_type __svc(number) signature +#elif defined (__GNUC__) +#ifdef __cplusplus +#define GCC_CAST_CPP (uint16_t) +#else +#define GCC_CAST_CPP +#endif +#define SVCALL(number, return_type, signature) \ + _Pragma("GCC diagnostic push") \ + _Pragma("GCC diagnostic ignored \"-Wreturn-type\"") \ + __attribute__((naked)) \ + __attribute__((unused)) \ + static return_type signature \ + { \ + __asm( \ + "svc %0\n" \ + "bx r14" : : "I" (GCC_CAST_CPP number) : "r0" \ + ); \ + } \ + _Pragma("GCC diagnostic pop") + +#elif defined (__ICCARM__) +#define PRAGMA(x) _Pragma(#x) +#define SVCALL(number, return_type, signature) \ +PRAGMA(swi_number = (number)) \ + __swi return_type signature; +#else +#define SVCALL(number, return_type, signature) return_type signature +#endif +#endif // SVCALL + +#endif // SVCALL_AS_NORMAL_FUNCTION + +#ifdef __cplusplus +} +#endif +#endif // NRF_SVC__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/hex/s112_nrf52_6.0.0_licence-agreement.txt b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/hex/s112_nrf52_6.0.0_licence-agreement.txt new file mode 100644 index 00000000000..a71adee7b9b --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/hex/s112_nrf52_6.0.0_licence-agreement.txt @@ -0,0 +1,35 @@ +Copyright (c) 2007 - 2018, Nordic Semiconductor ASA +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/hex/s112_nrf52_6.0.0_softdevice.hex b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/hex/s112_nrf52_6.0.0_softdevice.hex new file mode 100644 index 00000000000..07d4432d80d --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/hex/s112_nrf52_6.0.0_softdevice.hex @@ -0,0 +1,6143 @@ +:020000040000FA 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+:1086200000703720FB349B5F80041B8000100D21FD +:10863000F7070020B40700203A0800200581100940 +:088640000020024C10000000B4 +:00000001FF diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/headers/nrf_mbr.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/headers/nrf_mbr.h new file mode 100644 index 00000000000..cc5971c7a3d --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/headers/nrf_mbr.h @@ -0,0 +1,241 @@ +/* + * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @defgroup nrf_mbr_api Master Boot Record API + @{ + + @brief APIs for updating SoftDevice and BootLoader + +*/ + +#ifndef NRF_MBR_H__ +#define NRF_MBR_H__ + +#include "nrf_svc.h" +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup NRF_MBR_DEFINES Defines + * @{ */ + +/**@brief MBR SVC Base number. */ +#define MBR_SVC_BASE (0x18) + +/**@brief Page size in words. */ +#define MBR_PAGE_SIZE_IN_WORDS (1024) + +/** @brief The size that must be reserved for the MBR when a SoftDevice is written to flash. +This is the offset where the first byte of the SoftDevice hex file is written.*/ +#define MBR_SIZE (0x1000) + +/** @} */ + +/** @addtogroup NRF_MBR_ENUMS Enumerations + * @{ */ + +/**@brief nRF Master Boot Record API SVC numbers. */ +enum NRF_MBR_SVCS +{ + SD_MBR_COMMAND = MBR_SVC_BASE, /**< ::sd_mbr_command */ +}; + +/**@brief Possible values for ::sd_mbr_command_t.command */ +enum NRF_MBR_COMMANDS +{ + SD_MBR_COMMAND_COPY_BL, /**< Copy a new BootLoader. @see ::sd_mbr_command_copy_bl_t*/ + SD_MBR_COMMAND_COPY_SD, /**< Copy a new SoftDevice. @see ::sd_mbr_command_copy_sd_t*/ + SD_MBR_COMMAND_INIT_SD, /**< Initialize forwarding interrupts to SD, and run reset function in SD. Does not require any parameters in ::sd_mbr_command_t params.*/ + SD_MBR_COMMAND_COMPARE, /**< This command works like memcmp. @see ::sd_mbr_command_compare_t*/ + SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET, /**< Change the address the MBR starts after a reset. @see ::sd_mbr_command_vector_table_base_set_t*/ + SD_MBR_COMMAND_RESERVED, + SD_MBR_COMMAND_IRQ_FORWARD_ADDRESS_SET, /**< Start forwarding all interrupts to this address. @see ::sd_mbr_command_irq_forward_address_set_t*/ +}; + +/** @} */ + +/** @addtogroup NRF_MBR_TYPES Types + * @{ */ + +/**@brief This command copies part of a new SoftDevice + * + * The destination area is erased before copying. + * If dst is in the middle of a flash page, that whole flash page will be erased. + * If (dst+len) is in the middle of a flash page, that whole flash page will be erased. + * + * The user of this function is responsible for setting the BPROT registers. + * + * @retval ::NRF_SUCCESS indicates that the contents of the memory blocks where copied correctly. + * @retval ::NRF_ERROR_INTERNAL indicates that the contents of the memory blocks where not verified correctly after copying. + */ +typedef struct +{ + uint32_t *src; /**< Pointer to the source of data to be copied.*/ + uint32_t *dst; /**< Pointer to the destination where the content is to be copied.*/ + uint32_t len; /**< Number of 32 bit words to copy. Must be a multiple of @ref MBR_PAGE_SIZE_IN_WORDS words.*/ +} sd_mbr_command_copy_sd_t; + + +/**@brief This command works like memcmp, but takes the length in words. + * + * @retval ::NRF_SUCCESS indicates that the contents of both memory blocks are equal. + * @retval ::NRF_ERROR_NULL indicates that the contents of the memory blocks are not equal. + */ +typedef struct +{ + uint32_t *ptr1; /**< Pointer to block of memory. */ + uint32_t *ptr2; /**< Pointer to block of memory. */ + uint32_t len; /**< Number of 32 bit words to compare.*/ +} sd_mbr_command_compare_t; + + +/**@brief This command copies a new BootLoader. + * + * With this command, destination of BootLoader is always the address written in + * NRF_UICR->BOOTADDR. + * + * Destination is erased by this function. + * If (destination+bl_len) is in the middle of a flash page, that whole flash page will be erased. + * + * This function will use PROTENSET to protect the flash that is not intended to be written. + * + * On success, this function will not return. It will start the new BootLoader from reset-vector as normal. + * + * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. + * @retval ::NRF_ERROR_FORBIDDEN if NRF_UICR->BOOTADDR is not set. + * @retval ::NRF_ERROR_INVALID_LENGTH if parameters attempts to read or write outside flash area. + * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) + */ +typedef struct +{ + uint32_t *bl_src; /**< Pointer to the source of the Bootloader to be be copied.*/ + uint32_t bl_len; /**< Number of 32 bit words to copy for BootLoader. */ +} sd_mbr_command_copy_bl_t; + +/**@brief Change the address the MBR starts after a reset + * + * Once this function has been called, this address is where the MBR will start to forward + * interrupts to after a reset. + * + * To restore default forwarding this function should be called with @ref address set to 0. The + * MBR will then start forwarding interrupts to the address in NFR_UICR->BOOTADDR or to the + * SoftDevice if the BOOTADDR is not set. + * + * On success, this function will not return. It will reset the device. + * + * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. + * @retval ::NRF_ERROR_INVALID_ADDR if parameter address is outside of the flash size. + * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) + */ +typedef struct +{ + uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ +} sd_mbr_command_vector_table_base_set_t; + +/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the MBR + * + * Unlike sd_mbr_command_vector_table_base_set_t, this function does not reset, and it does not + * change where the MBR starts after reset. + * + * @retval ::NRF_SUCCESS + */ +typedef struct +{ + uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ +} sd_mbr_command_irq_forward_address_set_t; + +/**@brief Input structure containing data used when calling ::sd_mbr_command + * + * Depending on what command value that is set, the corresponding params value type must also be + * set. See @ref NRF_MBR_COMMANDS for command types and corresponding params value type. If command + * @ref SD_MBR_COMMAND_INIT_SD is set, it is not necessary to set any values under params. + */ +typedef struct +{ + uint32_t command; /**< Type of command to be issued. See @ref NRF_MBR_COMMANDS. */ + union + { + sd_mbr_command_copy_sd_t copy_sd; /**< Parameters for copy SoftDevice.*/ + sd_mbr_command_compare_t compare; /**< Parameters for verify.*/ + sd_mbr_command_copy_bl_t copy_bl; /**< Parameters for copy BootLoader. Requires parameter page. */ + sd_mbr_command_vector_table_base_set_t base_set; /**< Parameters for vector table base set. Requires parameter page.*/ + sd_mbr_command_irq_forward_address_set_t irq_forward_address_set; /**< Parameters for irq forward address set*/ + } params; /**< Command parameters. */ +} sd_mbr_command_t; + +/** @} */ + +/** @addtogroup NRF_MBR_FUNCTIONS Functions + * @{ */ + +/**@brief Issue Master Boot Record commands + * + * Commands used when updating a SoftDevice and bootloader. + * + * The @ref SD_MBR_COMMAND_COPY_BL and @ref SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET requires + * parameters to be retained by the MBR when resetting the IC. This is done in a separate flash + * page provided by the application. The UICR register UICR.NRFFW[1] must be set to an address + * corresponding to a page in the application flash space. This page will be cleared by the MBR and + * used to store the command before reset. When the UICR.NRFFW[1] field is set the page it refers + * to must not be used by the application. If the UICR.NRFFW[1] is set to 0xFFFFFFFF (the default) + * MBR commands which use flash will be unavailable and return @ref NRF_ERROR_NO_MEM. + * + * @param[in] param Pointer to a struct describing the command. + * + * @note For return values, see ::sd_mbr_command_copy_sd_t, ::sd_mbr_command_copy_bl_t, + * ::sd_mbr_command_compare_t, ::sd_mbr_command_vector_table_base_set_t, + * ::sd_mbr_command_irq_forward_address_set_t + * + * @retval ::NRF_ERROR_NO_MEM if UICR.NRFFW[1] is not set (i.e. is 0xFFFFFFFF). + * @retval ::NRF_ERROR_INVALID_PARAM if an invalid command is given. +*/ +SVCALL(SD_MBR_COMMAND, uint32_t, sd_mbr_command(sd_mbr_command_t* param)); + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // NRF_MBR_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/headers/nrf_svc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/headers/nrf_svc.h new file mode 100644 index 00000000000..292c6929828 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/headers/nrf_svc.h @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef NRF_SVC__ +#define NRF_SVC__ + +#include "stdint.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef SVCALL_AS_NORMAL_FUNCTION +#define SVCALL(number, return_type, signature) return_type signature +#else + +#ifndef SVCALL +#if defined (__CC_ARM) +#define SVCALL(number, return_type, signature) return_type __svc(number) signature +#elif defined (__GNUC__) +#ifdef __cplusplus +#define GCC_CAST_CPP (uint16_t) +#else +#define GCC_CAST_CPP +#endif +#define SVCALL(number, return_type, signature) \ + _Pragma("GCC diagnostic push") \ + _Pragma("GCC diagnostic ignored \"-Wreturn-type\"") \ + __attribute__((naked)) \ + __attribute__((unused)) \ + static return_type signature \ + { \ + __asm( \ + "svc %0\n" \ + "bx r14" : : "I" (GCC_CAST_CPP number) : "r0" \ + ); \ + } \ + _Pragma("GCC diagnostic pop") + +#elif defined (__ICCARM__) +#define PRAGMA(x) _Pragma(#x) +#define SVCALL(number, return_type, signature) \ +PRAGMA(swi_number = (number)) \ + __swi return_type signature; +#else +#define SVCALL(number, return_type, signature) return_type signature +#endif +#endif // SVCALL + +#endif // SVCALL_AS_NORMAL_FUNCTION + +#ifdef __cplusplus +} +#endif +#endif // NRF_SVC__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/hex/mbr_nrf52_2.2.2_licence-agreement.txt b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/hex/mbr_nrf52_2.2.2_licence-agreement.txt new file mode 100644 index 00000000000..a71adee7b9b --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/hex/mbr_nrf52_2.2.2_licence-agreement.txt @@ -0,0 +1,35 @@ +Copyright (c) 2007 - 2018, Nordic Semiconductor ASA +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/hex/mbr_nrf52_2.2.2_mbr.hex b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/hex/mbr_nrf52_2.2.2_mbr.hex new file mode 100644 index 00000000000..a8e5a7c9268 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/hex/mbr_nrf52_2.2.2_mbr.hex @@ -0,0 +1,154 @@ +:020000040000FA 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b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/libraries/fstorage/nrf_fstorage_nvmc.c similarity index 100% rename from targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage_nvmc.c rename to targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/libraries/fstorage/nrf_fstorage_nvmc.c diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage_nvmc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/libraries/fstorage/nrf_fstorage_nvmc.h similarity index 100% rename from targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/fstorage/nrf_fstorage_nvmc.h rename to targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/libraries/fstorage/nrf_fstorage_nvmc.h diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/mbed_lib.json b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/mbed_lib.json new file mode 100644 index 00000000000..bf28c4cb5b6 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/mbed_lib.json @@ -0,0 +1,8 @@ +{ + "name": "softdevice_mbr", + "target_overrides": { + "*": { + "target.bootloader_img": "hex/mbr_nrf52_2.2.2_mbr.hex" + } + } +} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_error.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_error.h new file mode 100644 index 00000000000..c673beb10dc --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_error.h @@ -0,0 +1,95 @@ +/** + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/* Header guard */ + +#ifndef SOFTDEVICE_PRESENT + +/** + @defgroup nrf_error Global Error Codes + @{ + + @brief Global Error definitions +*/ + +#ifndef NRF_ERROR_H__ +#define NRF_ERROR_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/** @defgroup NRF_ERRORS_BASE Error Codes Base number definitions + * @{ */ +#define NRF_ERROR_BASE_NUM (0x0) ///< Global error base +#define NRF_ERROR_SDM_BASE_NUM (0x1000) ///< SDM error base +#define NRF_ERROR_SOC_BASE_NUM (0x2000) ///< SoC error base +#define NRF_ERROR_STK_BASE_NUM (0x3000) ///< STK error base +/** @} */ + +#define NRF_SUCCESS (NRF_ERROR_BASE_NUM + 0) ///< Successful command +#define NRF_ERROR_SVC_HANDLER_MISSING (NRF_ERROR_BASE_NUM + 1) ///< SVC handler is missing +#define NRF_ERROR_SOFTDEVICE_NOT_ENABLED (NRF_ERROR_BASE_NUM + 2) ///< SoftDevice has not been enabled +#define NRF_ERROR_INTERNAL (NRF_ERROR_BASE_NUM + 3) ///< Internal Error +#define NRF_ERROR_NO_MEM (NRF_ERROR_BASE_NUM + 4) ///< No Memory for operation +#define NRF_ERROR_NOT_FOUND (NRF_ERROR_BASE_NUM + 5) ///< Not found +#define NRF_ERROR_NOT_SUPPORTED (NRF_ERROR_BASE_NUM + 6) ///< Not supported +#define NRF_ERROR_INVALID_PARAM (NRF_ERROR_BASE_NUM + 7) ///< Invalid Parameter +#define NRF_ERROR_INVALID_STATE (NRF_ERROR_BASE_NUM + 8) ///< Invalid state, operation disallowed in this state +#define NRF_ERROR_INVALID_LENGTH (NRF_ERROR_BASE_NUM + 9) ///< Invalid Length +#define NRF_ERROR_INVALID_FLAGS (NRF_ERROR_BASE_NUM + 10) ///< Invalid Flags +#define NRF_ERROR_INVALID_DATA (NRF_ERROR_BASE_NUM + 11) ///< Invalid Data +#define NRF_ERROR_DATA_SIZE (NRF_ERROR_BASE_NUM + 12) ///< Data size exceeds limit +#define NRF_ERROR_TIMEOUT (NRF_ERROR_BASE_NUM + 13) ///< Operation timed out +#define NRF_ERROR_NULL (NRF_ERROR_BASE_NUM + 14) ///< Null Pointer +#define NRF_ERROR_FORBIDDEN (NRF_ERROR_BASE_NUM + 15) ///< Forbidden Operation +#define NRF_ERROR_INVALID_ADDR (NRF_ERROR_BASE_NUM + 16) ///< Bad Memory Address +#define NRF_ERROR_BUSY (NRF_ERROR_BASE_NUM + 17) ///< Busy + +#ifdef __cplusplus +} +#endif + +#endif // NRF_ERROR_H__ + +/** + @} +*/ + +#endif // SOFTDEVICE_PRESENT diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_nvic.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_nvic.c new file mode 100644 index 00000000000..8fa8b2beb90 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_nvic.c @@ -0,0 +1,123 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include +#include "nrf_soc.h" +#include "nrf_error.h" + +static uint8_t m_in_critical_region = 0; + +uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn) +{ + NVIC_EnableIRQ(IRQn); + return NRF_SUCCESS; +} + +uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn) +{ + NVIC_DisableIRQ(IRQn); + return NRF_SUCCESS; +} + +uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq) +{ + if (p_pending_irq != NULL) + { + *p_pending_irq = NVIC_GetPendingIRQ(IRQn); + return NRF_SUCCESS; + } + return NRF_ERROR_NULL; +} + +uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn) +{ + NVIC_SetPendingIRQ(IRQn); + return NRF_SUCCESS; +} + +uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn) +{ + NVIC_ClearPendingIRQ(IRQn); + return NRF_SUCCESS; +} + +uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + NVIC_SetPriority(IRQn, priority); + return NRF_SUCCESS; +} + +uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority) +{ + if (p_priority != NULL) + { + *p_priority = NVIC_GetPriority(IRQn); + return NRF_SUCCESS; + } + + return NRF_ERROR_NULL; +} + +uint32_t sd_nvic_SystemReset(void) +{ + NVIC_SystemReset(); + return NRF_SUCCESS; +} + +uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region) +{ + __disable_irq(); + + *p_is_nested_critical_region = (m_in_critical_region != 0); + m_in_critical_region++; + + return NRF_SUCCESS; +} + +uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region) +{ + m_in_critical_region--; + + if (is_nested_critical_region == 0) + { + m_in_critical_region = 0; + __enable_irq(); + } + return NRF_SUCCESS; +} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_nvic.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_nvic.h new file mode 100644 index 00000000000..58dd0274eb5 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_nvic.h @@ -0,0 +1,166 @@ +/** + * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_NVIC_H__ +#define NRF_NVIC_H__ + +#include +#include "nrf.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@brief Enable External Interrupt. + * @note Corresponds to NVIC_EnableIRQ in CMSIS. + * + * @pre{IRQn is valid and not reserved by the stack} + * + * @param[in] IRQn See the NVIC_EnableIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt was enabled. + */ +uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn); + +/**@brief Disable External Interrupt. + * @note Corresponds to NVIC_DisableIRQ in CMSIS. + * + * @pre{IRQn is valid and not reserved by the stack} + * + * @param[in] IRQn See the NVIC_DisableIRQ documentation in CMSIS + * + * @retval ::NRF_SUCCESS The interrupt was disabled. + */ +uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn); + +/**@brief Get Pending Interrupt. + * @note Corresponds to NVIC_GetPendingIRQ in CMSIS. + * + * @pre{IRQn is valid and not reserved by the stack} + * + * @param[in] IRQn See the NVIC_GetPendingIRQ documentation in CMSIS. + * @param[out] p_pending_irq Return value from NVIC_GetPendingIRQ. + * + * @retval ::NRF_SUCCESS The interrupt is available for the application. + */ +uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq); + +/**@brief Set Pending Interrupt. + * @note Corresponds to NVIC_SetPendingIRQ in CMSIS. + * + * @pre{IRQn is valid and not reserved by the stack} + * + * @param[in] IRQn See the NVIC_SetPendingIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt is set pending. + */ +uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn); + +/**@brief Clear Pending Interrupt. + * @note Corresponds to NVIC_ClearPendingIRQ in CMSIS. + * + * @pre{IRQn is valid and not reserved by the stack} + * + * @param[in] IRQn See the NVIC_ClearPendingIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt pending flag is cleared. + */ +uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn); + +/**@brief Set Interrupt Priority. + * @note Corresponds to NVIC_SetPriority in CMSIS. + * + * @pre{IRQn is valid and not reserved by the stack} + * @pre{priority is valid and not reserved by the stack} + * + * @param[in] IRQn See the NVIC_SetPriority documentation in CMSIS. + * @param[in] priority A valid IRQ priority for use by the application. + * + * @retval ::NRF_SUCCESS The interrupt and priority level is available for the application. + */ +uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority); + +/**@brief Get Interrupt Priority. + * @note Corresponds to NVIC_GetPriority in CMSIS. + * + * @pre{IRQn is valid and not reserved by the stack} + * + * @param[in] IRQn See the NVIC_GetPriority documentation in CMSIS. + * @param[out] p_priority Return value from NVIC_GetPriority. + * + * @retval ::NRF_SUCCESS The interrupt priority is returned in p_priority. + */ +uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority); + +/**@brief System Reset. + * @note Corresponds to NVIC_SystemReset in CMSIS. + * + * @retval ::NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN + */ +uint32_t sd_nvic_SystemReset(void); + +/**@brief Enters critical region. + * + * @post Application interrupts will be disabled. + * @sa sd_nvic_critical_region_exit + * + * @param[out] p_is_nested_critical_region 1: If in a nested critical region. + * 0: Otherwise. + * + * @retval ::NRF_SUCCESS + */ +uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region); + +/**@brief Exit critical region. + * + * @pre Application has entered a critical region using ::sd_nvic_critical_region_enter. + * @post If not in a nested critical region, the application interrupts will restored to the state before ::sd_nvic_critical_region_enter was called. + * + * @param[in] is_nested_critical_region If this is set to 1, the critical region won't be exited. @sa sd_nvic_critical_region_enter. + * + * @retval ::NRF_SUCCESS + */ +uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region); + + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_NVIC_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_sdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_sdm.h new file mode 100644 index 00000000000..ec3f150fc6f --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_sdm.h @@ -0,0 +1,56 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_SDM_H__ +#define NRF_SDM_H__ + +#ifdef __cplusplus +extern "C" { +#endif + + +#define NRF_FAULT_ID_SD_RANGE_START 0x00000000 /**< SoftDevice ID range start. */ +#define NRF_FAULT_ID_APP_RANGE_START 0x00001000 /**< Application ID range start. */ + +#ifdef __cplusplus +} +#endif +#endif // NRF_SDM_H__ + + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_soc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_soc.c new file mode 100644 index 00000000000..da25fbbd32d --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_soc.c @@ -0,0 +1,48 @@ +/** + * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include +#include "nrf_soc.h" +#include "nrf_error.h" + +uint32_t sd_app_evt_wait(void) +{ + __WFE(); + return NRF_SUCCESS; +} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_soc.h new file mode 100644 index 00000000000..c1c9d044161 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_soc.h @@ -0,0 +1,80 @@ +/** + * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_SOC_H__ +#define NRF_SOC_H__ + +#include +#include "nrf.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@brief Waits for an application event. + * + * An application event is either an application interrupt or a pended interrupt when the + * interrupt is disabled. When the interrupt is enabled it will be taken immediately since + * this function will wait in thread mode, then the execution will return in the application's + * main thread. When an interrupt is disabled and gets pended it will return to the application's + * thread main. The application must ensure that the pended flag is cleared using + * ::sd_nvic_ClearPendingIRQ in order to sleep using this function. This is only necessary for + * disabled interrupts, as the interrupt handler will clear the pending flag automatically for + * enabled interrupts. + * + * In order to wake up from disabled interrupts, the SEVONPEND flag has to be set in the Cortex-M0 + * System Control Register (SCR). @sa CMSIS_SCB + * + * @note If an application interrupt has happened since the last time sd_app_evt_wait was + * called this function will return immediately and not go to sleep. This is to avoid race + * conditions that can occur when a flag is updated in the interrupt handler and processed + * in the main loop. + * + * @post An application interrupt has happened or a interrupt pending flag is set. + * + * @retval ::NRF_SUCCESS + */ +uint32_t sd_app_evt_wait(void); + + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_SOC_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/doc/s132_nrf52_6.0.0_licence-agreement.txt b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/doc/s132_nrf52_6.0.0_licence-agreement.txt new file mode 100644 index 00000000000..a71adee7b9b --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/doc/s132_nrf52_6.0.0_licence-agreement.txt @@ -0,0 +1,35 @@ +Copyright (c) 2007 - 2018, Nordic Semiconductor ASA +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/doc/s132_nrf52_6.0.0_migration-document.pdf b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/doc/s132_nrf52_6.0.0_migration-document.pdf new file mode 100644 index 0000000000000000000000000000000000000000..e88cd69f04013d7025d510d0cc9133c58c9d965b GIT binary patch literal 133032 zcmdqJbyOYQvM-7R*Wm6RU@e@5!@}L&9fAe-;1b;3J-BOvySoK~Yj6k-m+bF5`|NYi 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zpJwt88UzaBMwrJRH13}>@edjh$p6!f{z>BjaU;CPA2cxZPx*jQe%?R(asz=7ggySF zFEY6X z2owzYQx7nd`=>+yXJ06o@6UD+Fh9?q`XVw}!GFpJ;REp?R{cNtLHHm){rNv>{Jg+F z#~#AZ&-bSu5Pm-XKgSOOh5UT4^G|+I9^ik-4CUef&4%1uOswr-EAhFO@IfnlaFGcXVcvfx43B?Mx|XKn#Q0Bk}nfKXE)6b1z&7MvLm zgcr=s2ZfmPKtLu?7|4QG#DGi9(Gl_F`sD$+)UADBh=q!98?J69E^fb8E(FR4gkm!> JNhwQX|3Ak065{{> literal 0 HcmV?d00001 diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_err.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_err.h new file mode 100644 index 00000000000..1b4820dc3d6 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_err.h @@ -0,0 +1,93 @@ +/* + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON + @{ + @addtogroup nrf_error + @{ + @ingroup BLE_COMMON + @} + + @defgroup ble_err General error codes + @{ + + @brief General error code definitions for the BLE API. + + @ingroup BLE_COMMON +*/ +#ifndef NRF_BLE_ERR_H__ +#define NRF_BLE_ERR_H__ + +#include "nrf_error.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* @defgroup BLE_ERRORS Error Codes + * @{ */ +#define BLE_ERROR_NOT_ENABLED (NRF_ERROR_STK_BASE_NUM+0x001) /**< @ref sd_ble_enable has not been called. */ +#define BLE_ERROR_INVALID_CONN_HANDLE (NRF_ERROR_STK_BASE_NUM+0x002) /**< Invalid connection handle. */ +#define BLE_ERROR_INVALID_ATTR_HANDLE (NRF_ERROR_STK_BASE_NUM+0x003) /**< Invalid attribute handle. */ +#define BLE_ERROR_INVALID_ADV_HANDLE (NRF_ERROR_STK_BASE_NUM+0x004) /**< Invalid advertising handle. */ +#define BLE_ERROR_INVALID_ROLE (NRF_ERROR_STK_BASE_NUM+0x005) /**< Invalid role. */ +#define BLE_ERROR_BLOCKED_BY_OTHER_LINKS (NRF_ERROR_STK_BASE_NUM+0x006) /**< The attempt to change link settings failed due to the scheduling of other links. */ +/** @} */ + + +/** @defgroup BLE_ERROR_SUBRANGES Module specific error code subranges + * @brief Assignment of subranges for module specific error codes. + * @note For specific error codes, see ble_.h or ble_error_.h. + * @{ */ +#define NRF_L2CAP_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x100) /**< L2CAP specific errors. */ +#define NRF_GAP_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x200) /**< GAP specific errors. */ +#define NRF_GATTC_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x300) /**< GATT client specific errors. */ +#define NRF_GATTS_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x400) /**< GATT server specific errors. */ +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif + + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_gap.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_gap.h new file mode 100644 index 00000000000..8b138161066 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_gap.h @@ -0,0 +1,2653 @@ +/* + * Copyright (c) 2011 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_GAP Generic Access Profile (GAP) + @{ + @brief Definitions and prototypes for the GAP interface. + */ + +#ifndef BLE_GAP_H__ +#define BLE_GAP_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_hci.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@addtogroup BLE_GAP_ENUMERATIONS Enumerations + * @{ */ + +/**@brief GAP API SVC numbers. + */ +enum BLE_GAP_SVCS +{ + SD_BLE_GAP_ADDR_SET = BLE_GAP_SVC_BASE, /**< Set own Bluetooth Address. */ + SD_BLE_GAP_ADDR_GET = BLE_GAP_SVC_BASE + 1, /**< Get own Bluetooth Address. */ + SD_BLE_GAP_WHITELIST_SET = BLE_GAP_SVC_BASE + 2, /**< Set active whitelist. */ + SD_BLE_GAP_DEVICE_IDENTITIES_SET = BLE_GAP_SVC_BASE + 3, /**< Set device identity list. */ + SD_BLE_GAP_PRIVACY_SET = BLE_GAP_SVC_BASE + 4, /**< Set Privacy settings*/ + SD_BLE_GAP_PRIVACY_GET = BLE_GAP_SVC_BASE + 5, /**< Get Privacy settings*/ + SD_BLE_GAP_ADV_SET_CONFIGURE = BLE_GAP_SVC_BASE + 6, /**< Configure an advertising set. */ + SD_BLE_GAP_ADV_START = BLE_GAP_SVC_BASE + 7, /**< Start Advertising. */ + SD_BLE_GAP_ADV_STOP = BLE_GAP_SVC_BASE + 8, /**< Stop Advertising. */ + SD_BLE_GAP_CONN_PARAM_UPDATE = BLE_GAP_SVC_BASE + 9, /**< Connection Parameter Update. */ + SD_BLE_GAP_DISCONNECT = BLE_GAP_SVC_BASE + 10, /**< Disconnect. */ + SD_BLE_GAP_TX_POWER_SET = BLE_GAP_SVC_BASE + 11, /**< Set TX Power. */ + SD_BLE_GAP_APPEARANCE_SET = BLE_GAP_SVC_BASE + 12, /**< Set Appearance. */ + SD_BLE_GAP_APPEARANCE_GET = BLE_GAP_SVC_BASE + 13, /**< Get Appearance. */ + SD_BLE_GAP_PPCP_SET = BLE_GAP_SVC_BASE + 14, /**< Set PPCP. */ + SD_BLE_GAP_PPCP_GET = BLE_GAP_SVC_BASE + 15, /**< Get PPCP. */ + SD_BLE_GAP_DEVICE_NAME_SET = BLE_GAP_SVC_BASE + 16, /**< Set Device Name. */ + SD_BLE_GAP_DEVICE_NAME_GET = BLE_GAP_SVC_BASE + 17, /**< Get Device Name. */ + SD_BLE_GAP_AUTHENTICATE = BLE_GAP_SVC_BASE + 18, /**< Initiate Pairing/Bonding. */ + SD_BLE_GAP_SEC_PARAMS_REPLY = BLE_GAP_SVC_BASE + 19, /**< Reply with Security Parameters. */ + SD_BLE_GAP_AUTH_KEY_REPLY = BLE_GAP_SVC_BASE + 20, /**< Reply with an authentication key. */ + SD_BLE_GAP_LESC_DHKEY_REPLY = BLE_GAP_SVC_BASE + 21, /**< Reply with an LE Secure Connections DHKey. */ + SD_BLE_GAP_KEYPRESS_NOTIFY = BLE_GAP_SVC_BASE + 22, /**< Notify of a keypress during an authentication procedure. */ + SD_BLE_GAP_LESC_OOB_DATA_GET = BLE_GAP_SVC_BASE + 23, /**< Get the local LE Secure Connections OOB data. */ + SD_BLE_GAP_LESC_OOB_DATA_SET = BLE_GAP_SVC_BASE + 24, /**< Set the remote LE Secure Connections OOB data. */ + SD_BLE_GAP_ENCRYPT = BLE_GAP_SVC_BASE + 25, /**< Initiate encryption procedure. */ + SD_BLE_GAP_SEC_INFO_REPLY = BLE_GAP_SVC_BASE + 26, /**< Reply with Security Information. */ + SD_BLE_GAP_CONN_SEC_GET = BLE_GAP_SVC_BASE + 27, /**< Obtain connection security level. */ + SD_BLE_GAP_RSSI_START = BLE_GAP_SVC_BASE + 28, /**< Start reporting of changes in RSSI. */ + SD_BLE_GAP_RSSI_STOP = BLE_GAP_SVC_BASE + 29, /**< Stop reporting of changes in RSSI. */ + SD_BLE_GAP_SCAN_START = BLE_GAP_SVC_BASE + 30, /**< Start Scanning. */ + SD_BLE_GAP_SCAN_STOP = BLE_GAP_SVC_BASE + 31, /**< Stop Scanning. */ + SD_BLE_GAP_CONNECT = BLE_GAP_SVC_BASE + 32, /**< Connect. */ + SD_BLE_GAP_CONNECT_CANCEL = BLE_GAP_SVC_BASE + 33, /**< Cancel ongoing connection procedure. */ + SD_BLE_GAP_RSSI_GET = BLE_GAP_SVC_BASE + 34, /**< Get the last RSSI sample. */ + SD_BLE_GAP_PHY_UPDATE = BLE_GAP_SVC_BASE + 35, /**< Initiate or respond to a PHY Update Procedure. */ + SD_BLE_GAP_DATA_LENGTH_UPDATE = BLE_GAP_SVC_BASE + 36, /**< Initiate or respond to a Data Length Update Procedure. */ + SD_BLE_GAP_QOS_CHANNEL_SURVEY_START = BLE_GAP_SVC_BASE + 37, /**< Start Quality of Service (QoS) channel survey module. */ + SD_BLE_GAP_QOS_CHANNEL_SURVEY_STOP = BLE_GAP_SVC_BASE + 38, /**< Stop Quality of Service (QoS) channel survey module. */ +}; + +/**@brief GAP Event IDs. + * IDs that uniquely identify an event coming from the stack to the application. + */ +enum BLE_GAP_EVTS +{ + BLE_GAP_EVT_CONNECTED = BLE_GAP_EVT_BASE, + BLE_GAP_EVT_DISCONNECTED = BLE_GAP_EVT_BASE + 1, /**< Disconnected from peer. \n See @ref ble_gap_evt_disconnected_t. */ + BLE_GAP_EVT_CONN_PARAM_UPDATE = BLE_GAP_EVT_BASE + 2, /**< Connection Parameters updated. \n See @ref ble_gap_evt_conn_param_update_t. */ + BLE_GAP_EVT_SEC_PARAMS_REQUEST = BLE_GAP_EVT_BASE + 3, /**< Request to provide security parameters. \n Reply with @ref sd_ble_gap_sec_params_reply. \n See @ref ble_gap_evt_sec_params_request_t. */ + BLE_GAP_EVT_SEC_INFO_REQUEST = BLE_GAP_EVT_BASE + 4, /**< Request to provide security information. \n Reply with @ref sd_ble_gap_sec_info_reply. \n See @ref ble_gap_evt_sec_info_request_t. */ + BLE_GAP_EVT_PASSKEY_DISPLAY = BLE_GAP_EVT_BASE + 5, /**< Request to display a passkey to the user. \n In LESC Numeric Comparison, reply with @ref sd_ble_gap_auth_key_reply. \n See @ref ble_gap_evt_passkey_display_t. */ + BLE_GAP_EVT_KEY_PRESSED = BLE_GAP_EVT_BASE + 6, /**< Notification of a keypress on the remote device.\n See @ref ble_gap_evt_key_pressed_t */ + BLE_GAP_EVT_AUTH_KEY_REQUEST = BLE_GAP_EVT_BASE + 7, /**< Request to provide an authentication key. \n Reply with @ref sd_ble_gap_auth_key_reply. \n See @ref ble_gap_evt_auth_key_request_t. */ + BLE_GAP_EVT_LESC_DHKEY_REQUEST = BLE_GAP_EVT_BASE + 8, /**< Request to calculate an LE Secure Connections DHKey. \n Reply with @ref sd_ble_gap_lesc_dhkey_reply. \n See @ref ble_gap_evt_lesc_dhkey_request_t */ + BLE_GAP_EVT_AUTH_STATUS = BLE_GAP_EVT_BASE + 9, /**< Authentication procedure completed with status. \n See @ref ble_gap_evt_auth_status_t. */ + BLE_GAP_EVT_CONN_SEC_UPDATE = BLE_GAP_EVT_BASE + 10, /**< Connection security updated. \n See @ref ble_gap_evt_conn_sec_update_t. */ + BLE_GAP_EVT_TIMEOUT = BLE_GAP_EVT_BASE + 11, /**< Timeout expired. \n See @ref ble_gap_evt_timeout_t. */ + BLE_GAP_EVT_RSSI_CHANGED = BLE_GAP_EVT_BASE + 12, /**< RSSI report. \n See @ref ble_gap_evt_rssi_changed_t. */ + BLE_GAP_EVT_ADV_REPORT = BLE_GAP_EVT_BASE + 13, /**< Advertising report. \n See @ref ble_gap_evt_adv_report_t. */ + BLE_GAP_EVT_SEC_REQUEST = BLE_GAP_EVT_BASE + 14, /**< Security Request. \n See @ref ble_gap_evt_sec_request_t. */ + BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST = BLE_GAP_EVT_BASE + 15, /**< Connection Parameter Update Request. \n Reply with @ref sd_ble_gap_conn_param_update. \n See @ref ble_gap_evt_conn_param_update_request_t. */ + BLE_GAP_EVT_SCAN_REQ_REPORT = BLE_GAP_EVT_BASE + 16, /**< Scan request report. \n See @ref ble_gap_evt_scan_req_report_t. */ + BLE_GAP_EVT_PHY_UPDATE_REQUEST = BLE_GAP_EVT_BASE + 17, /**< PHY Update Request. \n Reply with @ref sd_ble_gap_phy_update. \n See @ref ble_gap_evt_phy_update_request_t. */ + BLE_GAP_EVT_PHY_UPDATE = BLE_GAP_EVT_BASE + 18, /**< PHY Update Procedure is complete. \n See @ref ble_gap_evt_phy_update_t. */ + BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST = BLE_GAP_EVT_BASE + 19, /**< Data Length Update Request. \n Reply with @ref sd_ble_gap_data_length_update.\n See @ref ble_gap_evt_data_length_update_request_t. */ + BLE_GAP_EVT_DATA_LENGTH_UPDATE = BLE_GAP_EVT_BASE + 20, /**< LL Data Channel PDU payload length updated. \n See @ref ble_gap_evt_data_length_update_t. */ + BLE_GAP_EVT_QOS_CHANNEL_SURVEY_REPORT = BLE_GAP_EVT_BASE + 21, /**< Channel survey report. \n See @ref ble_gap_evt_qos_channel_survey_report_t. */ + BLE_GAP_EVT_ADV_SET_TERMINATED = BLE_GAP_EVT_BASE + 22, /**< Advertising set terminated. \n See @ref ble_gap_evt_adv_set_terminated_t. */ +}; + +/**@brief GAP Option IDs. + * IDs that uniquely identify a GAP option. + */ +enum BLE_GAP_OPTS +{ + BLE_GAP_OPT_CH_MAP = BLE_GAP_OPT_BASE, /**< Channel Map. @ref ble_gap_opt_ch_map_t */ + BLE_GAP_OPT_LOCAL_CONN_LATENCY = BLE_GAP_OPT_BASE + 1, /**< Local connection latency. @ref ble_gap_opt_local_conn_latency_t */ + BLE_GAP_OPT_PASSKEY = BLE_GAP_OPT_BASE + 2, /**< Set passkey. @ref ble_gap_opt_passkey_t */ + BLE_GAP_OPT_COMPAT_MODE_1 = BLE_GAP_OPT_BASE + 3, /**< Compatibility mode. @ref ble_gap_opt_compat_mode_1_t */ + BLE_GAP_OPT_AUTH_PAYLOAD_TIMEOUT = BLE_GAP_OPT_BASE + 4, /**< Set Authenticated payload timeout. @ref ble_gap_opt_auth_payload_timeout_t */ + BLE_GAP_OPT_SLAVE_LATENCY_DISABLE = BLE_GAP_OPT_BASE + 5, /**< Disable slave latency. @ref ble_gap_opt_slave_latency_disable_t */ +}; + +/**@brief GAP Configuration IDs. + * + * IDs that uniquely identify a GAP configuration. + */ +enum BLE_GAP_CFGS +{ + BLE_GAP_CFG_ROLE_COUNT = BLE_GAP_CFG_BASE, /**< Role count configuration. */ + BLE_GAP_CFG_DEVICE_NAME = BLE_GAP_CFG_BASE + 1, /**< Device name configuration. */ +}; + +/**@brief GAP TX Power roles. + */ +enum BLE_GAP_TX_POWER_ROLES +{ + BLE_GAP_TX_POWER_ROLE_ADV = 1, /**< Advertiser role. */ + BLE_GAP_TX_POWER_ROLE_SCAN_INIT = 2, /**< Scanner and initiator role. */ + BLE_GAP_TX_POWER_ROLE_CONN = 3, /**< Connection role. */ +}; + +/** @} */ + +/**@addtogroup BLE_GAP_DEFINES Defines + * @{ */ + +/**@defgroup BLE_ERRORS_GAP SVC return values specific to GAP + * @{ */ +#define BLE_ERROR_GAP_UUID_LIST_MISMATCH (NRF_GAP_ERR_BASE + 0x000) /**< UUID list does not contain an integral number of UUIDs. */ +#define BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST (NRF_GAP_ERR_BASE + 0x001) /**< Use of Whitelist not permitted with discoverable advertising. */ +#define BLE_ERROR_GAP_INVALID_BLE_ADDR (NRF_GAP_ERR_BASE + 0x002) /**< The upper two bits of the address do not correspond to the specified address type. */ +#define BLE_ERROR_GAP_WHITELIST_IN_USE (NRF_GAP_ERR_BASE + 0x003) /**< Attempt to modify the whitelist while already in use by another operation. */ +#define BLE_ERROR_GAP_DEVICE_IDENTITIES_IN_USE (NRF_GAP_ERR_BASE + 0x004) /**< Attempt to modify the device identity list while already in use by another operation. */ +#define BLE_ERROR_GAP_DEVICE_IDENTITIES_DUPLICATE (NRF_GAP_ERR_BASE + 0x005) /**< The device identity list contains entries with duplicate identity addresses. */ +/**@} */ + + +/**@defgroup BLE_GAP_ROLES GAP Roles + * @{ */ +#define BLE_GAP_ROLE_INVALID 0x0 /**< Invalid Role. */ +#define BLE_GAP_ROLE_PERIPH 0x1 /**< Peripheral Role. */ +#define BLE_GAP_ROLE_CENTRAL 0x2 /**< Central Role. */ +/**@} */ + + +/**@defgroup BLE_GAP_TIMEOUT_SOURCES GAP Timeout sources + * @{ */ +#define BLE_GAP_TIMEOUT_SRC_SCAN 0x01 /**< Scanning timeout. */ +#define BLE_GAP_TIMEOUT_SRC_CONN 0x02 /**< Connection timeout. */ +#define BLE_GAP_TIMEOUT_SRC_AUTH_PAYLOAD 0x03 /**< Authenticated payload timeout. */ +/**@} */ + + +/**@defgroup BLE_GAP_ADDR_TYPES GAP Address types + * @{ */ +#define BLE_GAP_ADDR_TYPE_PUBLIC 0x00 /**< Public (identity) address.*/ +#define BLE_GAP_ADDR_TYPE_RANDOM_STATIC 0x01 /**< Random static (identity) address. */ +#define BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE 0x02 /**< Random private resolvable address. */ +#define BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE 0x03 /**< Random private non-resolvable address. */ +#define BLE_GAP_ADDR_TYPE_ANONYMOUS 0x7F /**< An advertiser may advertise without its address. + This type of advertising is called anonymous. */ +/**@} */ + + +/**@brief The default interval in seconds at which a private address is refreshed. */ +#define BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S (900) /* 15 minutes. */ +/**@brief The maximum interval in seconds at which a private address can be refreshed. */ +#define BLE_GAP_MAX_PRIVATE_ADDR_CYCLE_INTERVAL_S (41400) /* 11 hours 30 minutes. */ + + +/** @brief BLE address length. */ +#define BLE_GAP_ADDR_LEN (6) + +/**@defgroup BLE_GAP_PRIVACY_MODES Privacy modes + * @{ */ +#define BLE_GAP_PRIVACY_MODE_OFF 0x00 /**< Device will send and accept its identity address for its own address. */ +#define BLE_GAP_PRIVACY_MODE_DEVICE_PRIVACY 0x01 /**< Device will send and accept only private addresses for its own address. */ +#define BLE_GAP_PRIVACY_MODE_NETWORK_PRIVACY 0x02 /**< Device will send and accept only private addresses for its own address, + and will not accept a peer using identity address as sender address when + the peer IRK is exchanged, non-zero and added to the identity list. */ +/**@} */ + +/** @brief Invalid power level. */ +#define BLE_GAP_POWER_LEVEL_INVALID 127 + +/** @brief Advertising set handle not set. */ +#define BLE_GAP_ADV_SET_HANDLE_NOT_SET (0xFF) + +/** @brief The default number of advertising sets. */ +#define BLE_GAP_ADV_SET_COUNT_DEFAULT (1) + +/** @brief The maximum number of advertising sets supported by this SoftDevice. */ +#define BLE_GAP_ADV_SET_COUNT_MAX (1) + +/**@defgroup BLE_GAP_ADV_SET_DATA_SIZES Advertising data sizes. + * @{ */ +#define BLE_GAP_ADV_SET_DATA_SIZE_MAX (31) /**< Maximum data length for an advertising set. */ +/**@}. */ + +/** @brief Set ID not available in advertising report. */ +#define BLE_GAP_ADV_REPORT_SET_ID_NOT_AVAILABLE 0xFF + +/**@defgroup BLE_GAP_EVT_ADV_SET_TERMINATED_REASON GAP Advertising Set Terminated reasons + * @{ */ +#define BLE_GAP_EVT_ADV_SET_TERMINATED_REASON_TIMEOUT 0x01 /**< Timeout value reached. */ +#define BLE_GAP_EVT_ADV_SET_TERMINATED_REASON_LIMIT_REACHED 0x02 /**< @ref ble_gap_adv_params_t::max_adv_evts was reached. */ +/**@} */ + +/**@defgroup BLE_GAP_AD_TYPE_DEFINITIONS GAP Advertising and Scan Response Data format + * @note Found at https://www.bluetooth.org/Technical/AssignedNumbers/generic_access_profile.htm + * @{ */ +#define BLE_GAP_AD_TYPE_FLAGS 0x01 /**< Flags for discoverability. */ +#define BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_MORE_AVAILABLE 0x02 /**< Partial list of 16 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_COMPLETE 0x03 /**< Complete list of 16 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_MORE_AVAILABLE 0x04 /**< Partial list of 32 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_COMPLETE 0x05 /**< Complete list of 32 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_MORE_AVAILABLE 0x06 /**< Partial list of 128 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_COMPLETE 0x07 /**< Complete list of 128 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_SHORT_LOCAL_NAME 0x08 /**< Short local device name. */ +#define BLE_GAP_AD_TYPE_COMPLETE_LOCAL_NAME 0x09 /**< Complete local device name. */ +#define BLE_GAP_AD_TYPE_TX_POWER_LEVEL 0x0A /**< Transmit power level. */ +#define BLE_GAP_AD_TYPE_CLASS_OF_DEVICE 0x0D /**< Class of device. */ +#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C 0x0E /**< Simple Pairing Hash C. */ +#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R 0x0F /**< Simple Pairing Randomizer R. */ +#define BLE_GAP_AD_TYPE_SECURITY_MANAGER_TK_VALUE 0x10 /**< Security Manager TK Value. */ +#define BLE_GAP_AD_TYPE_SECURITY_MANAGER_OOB_FLAGS 0x11 /**< Security Manager Out Of Band Flags. */ +#define BLE_GAP_AD_TYPE_SLAVE_CONNECTION_INTERVAL_RANGE 0x12 /**< Slave Connection Interval Range. */ +#define BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_16BIT 0x14 /**< List of 16-bit Service Solicitation UUIDs. */ +#define BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_128BIT 0x15 /**< List of 128-bit Service Solicitation UUIDs. */ +#define BLE_GAP_AD_TYPE_SERVICE_DATA 0x16 /**< Service Data - 16-bit UUID. */ +#define BLE_GAP_AD_TYPE_PUBLIC_TARGET_ADDRESS 0x17 /**< Public Target Address. */ +#define BLE_GAP_AD_TYPE_RANDOM_TARGET_ADDRESS 0x18 /**< Random Target Address. */ +#define BLE_GAP_AD_TYPE_APPEARANCE 0x19 /**< Appearance. */ +#define BLE_GAP_AD_TYPE_ADVERTISING_INTERVAL 0x1A /**< Advertising Interval. */ +#define BLE_GAP_AD_TYPE_LE_BLUETOOTH_DEVICE_ADDRESS 0x1B /**< LE Bluetooth Device Address. */ +#define BLE_GAP_AD_TYPE_LE_ROLE 0x1C /**< LE Role. */ +#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C256 0x1D /**< Simple Pairing Hash C-256. */ +#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R256 0x1E /**< Simple Pairing Randomizer R-256. */ +#define BLE_GAP_AD_TYPE_SERVICE_DATA_32BIT_UUID 0x20 /**< Service Data - 32-bit UUID. */ +#define BLE_GAP_AD_TYPE_SERVICE_DATA_128BIT_UUID 0x21 /**< Service Data - 128-bit UUID. */ +#define BLE_GAP_AD_TYPE_LESC_CONFIRMATION_VALUE 0x22 /**< LE Secure Connections Confirmation Value */ +#define BLE_GAP_AD_TYPE_LESC_RANDOM_VALUE 0x23 /**< LE Secure Connections Random Value */ +#define BLE_GAP_AD_TYPE_URI 0x24 /**< URI */ +#define BLE_GAP_AD_TYPE_3D_INFORMATION_DATA 0x3D /**< 3D Information Data. */ +#define BLE_GAP_AD_TYPE_MANUFACTURER_SPECIFIC_DATA 0xFF /**< Manufacturer Specific Data. */ +/**@} */ + + +/**@defgroup BLE_GAP_ADV_FLAGS GAP Advertisement Flags + * @{ */ +#define BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE (0x01) /**< LE Limited Discoverable Mode. */ +#define BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE (0x02) /**< LE General Discoverable Mode. */ +#define BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED (0x04) /**< BR/EDR not supported. */ +#define BLE_GAP_ADV_FLAG_LE_BR_EDR_CONTROLLER (0x08) /**< Simultaneous LE and BR/EDR, Controller. */ +#define BLE_GAP_ADV_FLAG_LE_BR_EDR_HOST (0x10) /**< Simultaneous LE and BR/EDR, Host. */ +#define BLE_GAP_ADV_FLAGS_LE_ONLY_LIMITED_DISC_MODE (BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE | BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED) /**< LE Limited Discoverable Mode, BR/EDR not supported. */ +#define BLE_GAP_ADV_FLAGS_LE_ONLY_GENERAL_DISC_MODE (BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE | BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED) /**< LE General Discoverable Mode, BR/EDR not supported. */ +/**@} */ + + +/**@defgroup BLE_GAP_ADV_INTERVALS GAP Advertising interval max and min + * @{ */ +#define BLE_GAP_ADV_INTERVAL_MIN 0x000020 /**< Minimum Advertising interval in 625 us units, i.e. 20 ms. */ +#define BLE_GAP_ADV_INTERVAL_MAX 0x004000 /**< Maximum Advertising interval in 625 us units, i.e. 10.24 s. + @note Support for values above @ref BLE_GAP_ADV_INTERVAL_MAX + is experimental. Values above 0xFFFFFF, i.e 10,485.759375 s + are not supported. */ + /**@} */ + + +/**@defgroup BLE_GAP_SCAN_INTERVALS GAP Scan interval max and min + * @{ */ +#define BLE_GAP_SCAN_INTERVAL_MIN 0x0004 /**< Minimum Scan interval in 625 us units, i.e. 2.5 ms. */ +#define BLE_GAP_SCAN_INTERVAL_MAX 0xFFFF /**< Maximum Scan interval in 625 us units, i.e. 40,959.375 s. */ + /** @} */ + + +/**@defgroup BLE_GAP_SCAN_WINDOW GAP Scan window max and min + * @{ */ +#define BLE_GAP_SCAN_WINDOW_MIN 0x0004 /**< Minimum Scan window in 625 us units, i.e. 2.5 ms. */ +#define BLE_GAP_SCAN_WINDOW_MAX 0xFFFF /**< Maximum Scan window in 625 us units, i.e. 40,959.375 s. */ + /** @} */ + + +/**@defgroup BLE_GAP_SCAN_TIMEOUT GAP Scan timeout max and min + * @{ */ +#define BLE_GAP_SCAN_TIMEOUT_MIN 0x0001 /**< Minimum Scan timeout in 10 ms units, i.e 10 ms. */ +#define BLE_GAP_SCAN_TIMEOUT_UNLIMITED 0x0000 /**< Continue to scan forever. */ + /** @} */ + +/**@defgroup BLE_GAP_SCAN_BUFFER_SIZE GAP Minimum scanner buffer size + * + * Scan buffers are used for storing advertising data received from an advertiser. + * If ble_gap_scan_params_t::extended is set to 0, @ref BLE_GAP_SCAN_BUFFER_MIN is the minimum scan buffer length. + * else the minimum scan buffer size is @ref BLE_GAP_SCAN_BUFFER_EXTENDED_MIN. + * @{ */ +#define BLE_GAP_SCAN_BUFFER_MIN (31) /**< Minimum data length for an + advertising set. */ +#define BLE_GAP_SCAN_BUFFER_MAX (31) /**< Maximum data length for an + advertising set. */ +#define BLE_GAP_SCAN_BUFFER_EXTENDED_MIN (255) /**< Minimum data length for an + extended advertising set. */ +#define BLE_GAP_SCAN_BUFFER_EXTENDED_MAX (1650) /**< Maximum data length for an + extended advertising set. + @note Extended scanning is only + supported as an experimental + feature in this SoftDevice. + The scanner will only receive + advertising data up to 31 bytes. */ +/** @} */ + +/**@defgroup BLE_GAP_ADV_TYPES GAP Advertising types + * + * Advertising types defined in Bluetooth Core Specification v5.0, Vol 6, Part B, Section 4.4.2. + * + * The maximum advertising data length is defined by @ref BLE_GAP_ADV_SET_DATA_SIZE_MAX. + * Note that some of the advertising types do not support advertising data. Non-scannable types do not support + * scan response data. + * + * @{ */ +#define BLE_GAP_ADV_TYPE_CONNECTABLE_SCANNABLE_UNDIRECTED 0x01 /**< Connectable and scannable undirected + advertising events. */ +#define BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED_HIGH_DUTY_CYCLE 0x02 /**< Connectable non-scannable directed advertising + events. Advertising interval is less that 3.75 ms. + Use this type for fast reconnections. + @note Advertising data is not supported. */ +#define BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED 0x03 /**< Connectable non-scannable directed advertising + events. + @note Advertising data is not supported. */ +#define BLE_GAP_ADV_TYPE_NONCONNECTABLE_SCANNABLE_UNDIRECTED 0x04 /**< Non-connectable scannable undirected + advertising events. */ +#define BLE_GAP_ADV_TYPE_NONCONNECTABLE_NONSCANNABLE_UNDIRECTED 0x05 /**< Non-connectable non-scannable undirected + advertising events. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_CONNECTABLE_NONSCANNABLE_UNDIRECTED 0x06 /**< Connectable non-scannable undirected advertising + events using extended advertising PDUs. + @note Extended advertising types are only + supported as experimental features in this + SoftDevice. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_CONNECTABLE_NONSCANNABLE_DIRECTED 0x07 /**< Connectable non-scannable directed advertising + events using extended advertising PDUs. + @note Extended advertising types are only + supported as experimental features in this + SoftDevice. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_SCANNABLE_UNDIRECTED 0x08 /**< Non-connectable scannable undirected advertising + events using extended advertising PDUs. + @note Only scan response data is supported. + @note Extended advertising types are only + supported as experimental features in this + SoftDevice. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_SCANNABLE_DIRECTED 0x09 /**< Non-connectable scannable directed advertising + events using extended advertising PDUs. + @note Only scan response data is supported. + @note Extended advertising types are only + supported as experimental features in this + SoftDevice. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_NONSCANNABLE_UNDIRECTED 0x0A /**< Non-connectable non-scannable undirected advertising + events using extended advertising PDUs. + @note Extended advertising types are only + supported as experimental features in this + SoftDevice. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_NONSCANNABLE_DIRECTED 0x0B /**< Non-connectable non-scannable directed advertising + events using extended advertising PDUs. + @note Extended advertising types are only + supported as experimental features in this + SoftDevice. */ +/**@} */ + +/**@defgroup BLE_GAP_ADV_FILTER_POLICIES GAP Advertising filter policies + * @{ */ +#define BLE_GAP_ADV_FP_ANY 0x00 /**< Allow scan requests and connect requests from any device. */ +#define BLE_GAP_ADV_FP_FILTER_SCANREQ 0x01 /**< Filter scan requests with whitelist. */ +#define BLE_GAP_ADV_FP_FILTER_CONNREQ 0x02 /**< Filter connect requests with whitelist. */ +#define BLE_GAP_ADV_FP_FILTER_BOTH 0x03 /**< Filter both scan and connect requests with whitelist. */ +/**@} */ + +/**@defgroup BLE_GAP_ADV_DATA_STATUS GAP Advertising data status + * @{ */ +#define BLE_GAP_ADV_DATA_STATUS_COMPLETE 0x00 /**< All data in the advertising event have been received. */ +#define BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA 0x01 /**< More data to be received. */ +#define BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_TRUNCATED 0x02 /**< Incomplete data. Buffer size insufficient to receive more. */ +#define BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MISSED 0x03 /**< Failed to receive the remaining data. */ +/**@} */ + +/**@defgroup BLE_GAP_SCAN_FILTER_POLICIES GAP Scanner filter policies + * @{ */ +#define BLE_GAP_SCAN_FP_ACCEPT_ALL 0x00 /**< Accept all advertising packets except directed advertising packets + not addressed to this device. */ +#define BLE_GAP_SCAN_FP_WHITELIST 0x01 /**< Accept advertising packets from devices in the whitelist except directed + packets not addressed to this device. */ +#define BLE_GAP_SCAN_FP_ALL_NOT_RESOLVED_DIRECTED 0x02 /**< Accept all advertising packets specified in @ref BLE_GAP_SCAN_FP_ACCEPT_ALL. + In addition, accept directed advertising packets, where the advertiser's + address is a resolvable private address that cannot be resolved. */ +#define BLE_GAP_SCAN_FP_WHITELIST_NOT_RESOLVED_DIRECTED 0x03 /**< Accept all advertising packets specified in @ref BLE_GAP_SCAN_FP_WHITELIST. + In addition, accept directed advertising packets, where the advertiser's + address is a resolvable private address that cannot be resolved. */ +/**@} */ + +/**@defgroup BLE_GAP_ADV_TIMEOUT_VALUES GAP Advertising timeout values in 10 ms units + * @{ */ +#define BLE_GAP_ADV_TIMEOUT_HIGH_DUTY_MAX (128) /**< Maximum high duty advertising time in 10 ms units. Corresponds to 1.28 s. */ +#define BLE_GAP_ADV_TIMEOUT_LIMITED_MAX (18000) /**< Maximum advertising time in 10 ms units corresponding to TGAP(lim_adv_timeout) = 180 s in limited discoverable mode. */ +#define BLE_GAP_ADV_TIMEOUT_GENERAL_UNLIMITED (0) /**< Unlimited advertising in general discoverable mode. + For high duty cycle advertising, this corresponds to @ref BLE_GAP_ADV_TIMEOUT_HIGH_DUTY_MAX. */ +/**@} */ + + +/**@defgroup BLE_GAP_DISC_MODES GAP Discovery modes + * @{ */ +#define BLE_GAP_DISC_MODE_NOT_DISCOVERABLE 0x00 /**< Not discoverable discovery Mode. */ +#define BLE_GAP_DISC_MODE_LIMITED 0x01 /**< Limited Discovery Mode. */ +#define BLE_GAP_DISC_MODE_GENERAL 0x02 /**< General Discovery Mode. */ +/**@} */ + + +/**@defgroup BLE_GAP_IO_CAPS GAP IO Capabilities + * @{ */ +#define BLE_GAP_IO_CAPS_DISPLAY_ONLY 0x00 /**< Display Only. */ +#define BLE_GAP_IO_CAPS_DISPLAY_YESNO 0x01 /**< Display and Yes/No entry. */ +#define BLE_GAP_IO_CAPS_KEYBOARD_ONLY 0x02 /**< Keyboard Only. */ +#define BLE_GAP_IO_CAPS_NONE 0x03 /**< No I/O capabilities. */ +#define BLE_GAP_IO_CAPS_KEYBOARD_DISPLAY 0x04 /**< Keyboard and Display. */ +/**@} */ + + +/**@defgroup BLE_GAP_AUTH_KEY_TYPES GAP Authentication Key Types + * @{ */ +#define BLE_GAP_AUTH_KEY_TYPE_NONE 0x00 /**< No key (may be used to reject). */ +#define BLE_GAP_AUTH_KEY_TYPE_PASSKEY 0x01 /**< 6-digit Passkey. */ +#define BLE_GAP_AUTH_KEY_TYPE_OOB 0x02 /**< Out Of Band data. */ +/**@} */ + + +/**@defgroup BLE_GAP_KP_NOT_TYPES GAP Keypress Notification Types + * @{ */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_START 0x00 /**< Passkey entry started. */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_DIGIT_IN 0x01 /**< Passkey digit entered. */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_DIGIT_OUT 0x02 /**< Passkey digit erased. */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_CLEAR 0x03 /**< Passkey cleared. */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_END 0x04 /**< Passkey entry completed. */ +/**@} */ + + +/**@defgroup BLE_GAP_SEC_STATUS GAP Security status + * @{ */ +#define BLE_GAP_SEC_STATUS_SUCCESS 0x00 /**< Procedure completed with success. */ +#define BLE_GAP_SEC_STATUS_TIMEOUT 0x01 /**< Procedure timed out. */ +#define BLE_GAP_SEC_STATUS_PDU_INVALID 0x02 /**< Invalid PDU received. */ +#define BLE_GAP_SEC_STATUS_RFU_RANGE1_BEGIN 0x03 /**< Reserved for Future Use range #1 begin. */ +#define BLE_GAP_SEC_STATUS_RFU_RANGE1_END 0x80 /**< Reserved for Future Use range #1 end. */ +#define BLE_GAP_SEC_STATUS_PASSKEY_ENTRY_FAILED 0x81 /**< Passkey entry failed (user canceled or other). */ +#define BLE_GAP_SEC_STATUS_OOB_NOT_AVAILABLE 0x82 /**< Out of Band Key not available. */ +#define BLE_GAP_SEC_STATUS_AUTH_REQ 0x83 /**< Authentication requirements not met. */ +#define BLE_GAP_SEC_STATUS_CONFIRM_VALUE 0x84 /**< Confirm value failed. */ +#define BLE_GAP_SEC_STATUS_PAIRING_NOT_SUPP 0x85 /**< Pairing not supported. */ +#define BLE_GAP_SEC_STATUS_ENC_KEY_SIZE 0x86 /**< Encryption key size. */ +#define BLE_GAP_SEC_STATUS_SMP_CMD_UNSUPPORTED 0x87 /**< Unsupported SMP command. */ +#define BLE_GAP_SEC_STATUS_UNSPECIFIED 0x88 /**< Unspecified reason. */ +#define BLE_GAP_SEC_STATUS_REPEATED_ATTEMPTS 0x89 /**< Too little time elapsed since last attempt. */ +#define BLE_GAP_SEC_STATUS_INVALID_PARAMS 0x8A /**< Invalid parameters. */ +#define BLE_GAP_SEC_STATUS_DHKEY_FAILURE 0x8B /**< DHKey check failure. */ +#define BLE_GAP_SEC_STATUS_NUM_COMP_FAILURE 0x8C /**< Numeric Comparison failure. */ +#define BLE_GAP_SEC_STATUS_BR_EDR_IN_PROG 0x8D /**< BR/EDR pairing in progress. */ +#define BLE_GAP_SEC_STATUS_X_TRANS_KEY_DISALLOWED 0x8E /**< BR/EDR Link Key cannot be used for LE keys. */ +#define BLE_GAP_SEC_STATUS_RFU_RANGE2_BEGIN 0x8F /**< Reserved for Future Use range #2 begin. */ +#define BLE_GAP_SEC_STATUS_RFU_RANGE2_END 0xFF /**< Reserved for Future Use range #2 end. */ +/**@} */ + + +/**@defgroup BLE_GAP_SEC_STATUS_SOURCES GAP Security status sources + * @{ */ +#define BLE_GAP_SEC_STATUS_SOURCE_LOCAL 0x00 /**< Local failure. */ +#define BLE_GAP_SEC_STATUS_SOURCE_REMOTE 0x01 /**< Remote failure. */ +/**@} */ + + +/**@defgroup BLE_GAP_CP_LIMITS GAP Connection Parameters Limits + * @{ */ +#define BLE_GAP_CP_MIN_CONN_INTVL_NONE 0xFFFF /**< No new minimum connection interval specified in connect parameters. */ +#define BLE_GAP_CP_MIN_CONN_INTVL_MIN 0x0006 /**< Lowest minimum connection interval permitted, in units of 1.25 ms, i.e. 7.5 ms. */ +#define BLE_GAP_CP_MIN_CONN_INTVL_MAX 0x0C80 /**< Highest minimum connection interval permitted, in units of 1.25 ms, i.e. 4 s. */ +#define BLE_GAP_CP_MAX_CONN_INTVL_NONE 0xFFFF /**< No new maximum connection interval specified in connect parameters. */ +#define BLE_GAP_CP_MAX_CONN_INTVL_MIN 0x0006 /**< Lowest maximum connection interval permitted, in units of 1.25 ms, i.e. 7.5 ms. */ +#define BLE_GAP_CP_MAX_CONN_INTVL_MAX 0x0C80 /**< Highest maximum connection interval permitted, in units of 1.25 ms, i.e. 4 s. */ +#define BLE_GAP_CP_SLAVE_LATENCY_MAX 0x01F3 /**< Highest slave latency permitted, in connection events. */ +#define BLE_GAP_CP_CONN_SUP_TIMEOUT_NONE 0xFFFF /**< No new supervision timeout specified in connect parameters. */ +#define BLE_GAP_CP_CONN_SUP_TIMEOUT_MIN 0x000A /**< Lowest supervision timeout permitted, in units of 10 ms, i.e. 100 ms. */ +#define BLE_GAP_CP_CONN_SUP_TIMEOUT_MAX 0x0C80 /**< Highest supervision timeout permitted, in units of 10 ms, i.e. 32 s. */ +/**@} */ + + +/**@defgroup BLE_GAP_DEVNAME GAP device name defines. + * @{ */ +#define BLE_GAP_DEVNAME_DEFAULT "nRF5x" /**< Default device name value. */ +#define BLE_GAP_DEVNAME_DEFAULT_LEN 31 /**< Default number of octets in device name. */ +#define BLE_GAP_DEVNAME_MAX_LEN 248 /**< Maximum number of octets in device name. */ +/**@} */ + + +/**@brief Disable RSSI events for connections */ +#define BLE_GAP_RSSI_THRESHOLD_INVALID 0xFF + +/**@defgroup BLE_GAP_PHYS GAP PHYs + * @{ */ +#define BLE_GAP_PHY_AUTO 0x00 /**< Automatic PHY selection. Refer @ref sd_ble_gap_phy_update for more information.*/ +#define BLE_GAP_PHY_1MBPS 0x01 /**< 1 Mbps PHY. */ +#define BLE_GAP_PHY_2MBPS 0x02 /**< 2 Mbps PHY. */ +#define BLE_GAP_PHY_CODED 0x04 /**< Coded PHY. */ +#define BLE_GAP_PHY_NOT_SET 0xFF /**< PHY is not configured. */ + +/**@brief Supported PHYs in connections, for scanning, and for advertising. */ +#define BLE_GAP_PHYS_SUPPORTED (BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS) /**< All PHYs except @ref BLE_GAP_PHY_CODED are supported. */ + +/**@} */ + +/**@defgroup BLE_GAP_CONN_SEC_MODE_SET_MACROS GAP attribute security requirement setters + * + * See @ref ble_gap_conn_sec_mode_t. + * @{ */ +/**@brief Set sec_mode pointed to by ptr to have no access rights.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_NO_ACCESS(ptr) do {(ptr)->sm = 0; (ptr)->lv = 0;} while(0) +/**@brief Set sec_mode pointed to by ptr to require no protection, open link.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_OPEN(ptr) do {(ptr)->sm = 1; (ptr)->lv = 1;} while(0) +/**@brief Set sec_mode pointed to by ptr to require encryption, but no MITM protection.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_ENC_NO_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 2;} while(0) +/**@brief Set sec_mode pointed to by ptr to require encryption and MITM protection.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_ENC_WITH_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 3;} while(0) +/**@brief Set sec_mode pointed to by ptr to require LESC encryption and MITM protection.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_LESC_ENC_WITH_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 4;} while(0) +/**@brief Set sec_mode pointed to by ptr to require signing or encryption, no MITM protection needed.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_SIGNED_NO_MITM(ptr) do {(ptr)->sm = 2; (ptr)->lv = 1;} while(0) +/**@brief Set sec_mode pointed to by ptr to require signing or encryption with MITM protection.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_SIGNED_WITH_MITM(ptr) do {(ptr)->sm = 2; (ptr)->lv = 2;} while(0) +/**@} */ + + +/**@brief GAP Security Random Number Length. */ +#define BLE_GAP_SEC_RAND_LEN 8 + + +/**@brief GAP Security Key Length. */ +#define BLE_GAP_SEC_KEY_LEN 16 + + +/**@brief GAP LE Secure Connections Elliptic Curve Diffie-Hellman P-256 Public Key Length. */ +#define BLE_GAP_LESC_P256_PK_LEN 64 + + +/**@brief GAP LE Secure Connections Elliptic Curve Diffie-Hellman DHKey Length. */ +#define BLE_GAP_LESC_DHKEY_LEN 32 + + +/**@brief GAP Passkey Length. */ +#define BLE_GAP_PASSKEY_LEN 6 + + +/**@brief Maximum amount of addresses in the whitelist. */ +#define BLE_GAP_WHITELIST_ADDR_MAX_COUNT (8) + + +/**@brief Maximum amount of identities in the device identities list. */ +#define BLE_GAP_DEVICE_IDENTITIES_MAX_COUNT (8) + + +/**@brief Default connection count for a configuration. */ +#define BLE_GAP_CONN_COUNT_DEFAULT (1) + + +/**@defgroup BLE_GAP_EVENT_LENGTH GAP event length defines. + * @{ */ +#define BLE_GAP_EVENT_LENGTH_MIN (2) /**< Minimum event length, in 1.25 ms units. */ +#define BLE_GAP_EVENT_LENGTH_DEFAULT (3) /**< Default event length, in 1.25 ms units. */ +/**@} */ + + +/**@defgroup BLE_GAP_ROLE_COUNT GAP concurrent connection count defines. + * @{ */ +#define BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT (1) /**< Default maximum number of connections concurrently acting as peripherals. */ +#define BLE_GAP_ROLE_COUNT_CENTRAL_DEFAULT (3) /**< Default maximum number of connections concurrently acting as centrals. */ +#define BLE_GAP_ROLE_COUNT_CENTRAL_SEC_DEFAULT (1) /**< Default number of SMP instances shared between all connections acting as centrals. */ +#define BLE_GAP_ROLE_COUNT_COMBINED_MAX (20) /**< Maximum supported number of concurrent connections in the peripheral and central roles combined. */ + +/**@} */ + +/**@brief Automatic data length parameter. */ +#define BLE_GAP_DATA_LENGTH_AUTO 0 + +/**@defgroup BLE_GAP_AUTH_PAYLOAD_TIMEOUT Authenticated payload timeout defines. + * @{ */ +#define BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MAX (48000) /**< Maximum authenticated payload timeout in 10 ms units, i.e. 8 minutes. */ +#define BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MIN (1) /**< Minimum authenticated payload timeout in 10 ms units, i.e. 10 ms. */ +/**@} */ + +/**@defgroup GAP_SEC_MODES GAP Security Modes + * @{ */ +#define BLE_GAP_SEC_MODE 0x00 /**< No key (may be used to reject). */ +/**@} */ + +/**@brief The total number of channels in Bluetooth Low Energy. */ +#define BLE_GAP_CHANNEL_COUNT (40) + +/**@defgroup BLE_GAP_QOS_CHANNEL_SURVEY_INTERVALS Quality of Service (QoS) Channel survey interval defines + * @{ */ +#define BLE_GAP_QOS_CHANNEL_SURVEY_INTERVAL_CONTINUOUS (0) /**< Continuous channel survey. */ +#define BLE_GAP_QOS_CHANNEL_SURVEY_INTERVAL_MIN_US (7500) /**< Minimum channel survey interval in microseconds (7.5 ms). */ +#define BLE_GAP_QOS_CHANNEL_SURVEY_INTERVAL_MAX_US (4000000) /**< Maximum channel survey interval in microseconds (4 s). */ + /**@} */ + +/** @} */ + + +/**@addtogroup BLE_GAP_STRUCTURES Structures + * @{ */ + +/**@brief Advertising event properties. */ +typedef struct +{ + uint8_t type; /**< Advertising type. See @ref BLE_GAP_ADV_TYPES. */ + uint8_t anonymous : 1; /**< Omit advertiser's address from all PDUs. + @note Anonymous advertising is only available for + @ref BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_NONSCANNABLE_UNDIRECTED and + @ref BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_NONSCANNABLE_DIRECTED. */ + uint8_t include_tx_power : 1; /**< Include TxPower set by @ref sd_ble_gap_tx_power_set in the extended header + of the advertising PDU. + @note TxPower can only be added to the extended header when @ref type is an extended advertising type. */ +} ble_gap_adv_properties_t; + + +/**@brief Advertising report type. */ +typedef struct +{ + uint16_t connectable : 1; /**< Connectable advertising event type. */ + uint16_t scannable : 1; /**< Scannable advertising event type. */ + uint16_t directed : 1; /**< Directed advertising event type. */ + uint16_t scan_response : 1; /**< Received a scan response. */ + uint16_t extended_pdu : 1; /**< Received an extended advertising set. */ + uint16_t status : 2; /**< Data status. See @ref BLE_GAP_ADV_DATA_STATUS. */ + uint16_t reserved : 9; /**< Reserved for future use. */ +} ble_gap_adv_report_type_t; + +/**@brief Advertising Auxiliary Pointer. */ +typedef struct +{ + uint16_t aux_offset; /**< Time offset from the beginning of advertising packet to the auxiliary packet in 100 us units. */ + uint8_t aux_phy; /**< Indicates the PHY on which the auxiliary advertising packet is sent. See @ref BLE_GAP_PHYS. */ +} ble_gap_aux_pointer_t; + +/**@brief Bluetooth Low Energy address. */ +typedef struct +{ + uint8_t addr_id_peer : 1; /**< Only valid for peer addresses. + Reference to peer in device identities list (as set with @ref sd_ble_gap_device_identities_set) when peer is using privacy. */ + uint8_t addr_type : 7; /**< See @ref BLE_GAP_ADDR_TYPES. */ + uint8_t addr[BLE_GAP_ADDR_LEN]; /**< 48-bit address, LSB format. + addr is not used if addr_type is @ref BLE_GAP_ADDR_TYPE_ANONYMOUS. */ +} ble_gap_addr_t; + + +/**@brief GAP connection parameters. + * + * @note When ble_conn_params_t is received in an event, both min_conn_interval and + * max_conn_interval will be equal to the connection interval set by the central. + * + * @note If both conn_sup_timeout and max_conn_interval are specified, then the following constraint applies: + * conn_sup_timeout * 4 > (1 + slave_latency) * max_conn_interval + * that corresponds to the following Bluetooth Spec requirement: + * The Supervision_Timeout in milliseconds shall be larger than + * (1 + Conn_Latency) * Conn_Interval_Max * 2, where Conn_Interval_Max is given in milliseconds. + */ +typedef struct +{ + uint16_t min_conn_interval; /**< Minimum Connection Interval in 1.25 ms units, see @ref BLE_GAP_CP_LIMITS.*/ + uint16_t max_conn_interval; /**< Maximum Connection Interval in 1.25 ms units, see @ref BLE_GAP_CP_LIMITS.*/ + uint16_t slave_latency; /**< Slave Latency in number of connection events, see @ref BLE_GAP_CP_LIMITS.*/ + uint16_t conn_sup_timeout; /**< Connection Supervision Timeout in 10 ms units, see @ref BLE_GAP_CP_LIMITS.*/ +} ble_gap_conn_params_t; + + +/**@brief GAP connection security modes. + * + * Security Mode 0 Level 0: No access permissions at all (this level is not defined by the Bluetooth Core specification).\n + * Security Mode 1 Level 1: No security is needed (aka open link).\n + * Security Mode 1 Level 2: Encrypted link required, MITM protection not necessary.\n + * Security Mode 1 Level 3: MITM protected encrypted link required.\n + * Security Mode 1 Level 4: LESC MITM protected encrypted link using a 128-bit strength encryption key required.\n + * Security Mode 2 Level 1: Signing or encryption required, MITM protection not necessary.\n + * Security Mode 2 Level 2: MITM protected signing required, unless link is MITM protected encrypted.\n + */ +typedef struct +{ + uint8_t sm : 4; /**< Security Mode (1 or 2), 0 for no permissions at all. */ + uint8_t lv : 4; /**< Level (1, 2, 3 or 4), 0 for no permissions at all. */ + +} ble_gap_conn_sec_mode_t; + + +/**@brief GAP connection security status.*/ +typedef struct +{ + ble_gap_conn_sec_mode_t sec_mode; /**< Currently active security mode for this connection.*/ + uint8_t encr_key_size; /**< Length of currently active encryption key, 7 to 16 octets (only applicable for bonding procedures). */ +} ble_gap_conn_sec_t; + +/**@brief Identity Resolving Key. */ +typedef struct +{ + uint8_t irk[BLE_GAP_SEC_KEY_LEN]; /**< Array containing IRK. */ +} ble_gap_irk_t; + + +/**@brief Channel mask (40 bits). + * Every channel is represented with a bit positioned as per channel index defined in Bluetooth Core Specification v5.0, + * Vol 6, Part B, Section 1.4.1. The LSB contained in array element 0 represents channel index 0, and bit 39 represents + * channel index 39. If a bit is set to 1, the channel is not used. + */ +typedef uint8_t ble_gap_ch_mask_t[5]; + + +/**@brief GAP advertising parameters. */ +typedef struct +{ + ble_gap_adv_properties_t properties; /**< The properties of the advertising events. */ + ble_gap_addr_t const *p_peer_addr; /**< Address of a known peer. + @note ble_gap_addr_t::addr_type cannot be + @ref BLE_GAP_ADDR_TYPE_ANONYMOUS. + - When privacy is enabled and the local device uses + @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE addresses, + the device identity list is searched for a matching entry. If + the local IRK for that device identity is set, the local IRK + for that device will be used to generate the advertiser address + field in the advertising packet. + - If @ref ble_gap_adv_properties_t::type is directed, this must be + set to the targeted scanner or initiator. If the peer address is + in the device identity list, the peer IRK for that device will be + used to generate @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE + target addresses used in the advertising event PDUs. */ + uint32_t interval; /**< Advertising interval in 625 us units. @sa BLE_GAP_ADV_INTERVALS. + @note If @ref ble_gap_adv_properties_t::type is set to + @ref BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED_HIGH_DUTY_CYCLE + advertising, this parameter is ignored. */ + uint16_t duration; /**< Advertising duration in 10 ms units. When timeout is reached, + an event of type @ref BLE_GAP_EVT_ADV_SET_TERMINATED is raised. + @sa BLE_GAP_ADV_TIMEOUT_VALUES. */ + uint8_t max_adv_evts; /**< Maximum advertising events that shall be sent prior to disabling + advertising. Setting the value to 0 disables the limitation. When + the count of advertising events specified by this parameter + (if not 0) is reached, advertising will be automatically stopped + and an event of type @ref BLE_GAP_EVT_ADV_SET_TERMINATED is raised + @note If @ref ble_gap_adv_properties_t::type is set to + @ref BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED_HIGH_DUTY_CYCLE, + this parameter is ignored. + @note Setting max_adv_evts to a values not equal to 0 is only supported + as an experimental feature in this SoftDevice. */ + ble_gap_ch_mask_t channel_mask; /**< Channel mask for primary and secondary advertising channels. + At least one of the primary channels, that is channel index 37-39, must be used. + Masking away secondary advertising channels is not supported. */ + uint8_t filter_policy; /**< Filter Policy. @sa BLE_GAP_ADV_FILTER_POLICIES. */ + uint8_t primary_phy; /**< Indicates the PHY on which the primary advertising channel packets + are transmitted. If set to @ref BLE_GAP_PHY_AUTO, @ref BLE_GAP_PHY_1MBPS + will be used. + The only supported value by this SoftDevice is @ref BLE_GAP_PHY_1MBPS. */ + uint8_t secondary_phy; /**< Indicates the PHY on which the secondary advertising channel packets + are transmitted. + If set to @ref BLE_GAP_PHY_AUTO, @ref BLE_GAP_PHY_1MBPS will be used. + Valid values are + @ref BLE_GAP_PHY_1MBPS and @ref BLE_GAP_PHY_2MBPS. @ref BLE_GAP_PHY_CODED + is not supported by this SoftDevice. + If @ref ble_gap_adv_properties_t::type is an extended advertising type + and connectable, this is the PHY that will be used to establish a + connection and send AUX_ADV_IND packets on. + @note This parameter will be ignored when + @ref ble_gap_adv_properties_t::type is not an extended advertising type. */ + uint8_t set_id:4; /**< The advertising set identifier distinguishes this advertising set from other + advertising sets transmitted by this and other devices. + @note This parameter will be ignored when + @ref ble_gap_adv_properties_t::type is not an extended advertising type. */ + uint8_t scan_req_notification:1; /**< Enable scan request notifications for this advertising set. When a + scan request is received and the scanner address is allowed + by the filter policy, @ref BLE_GAP_EVT_SCAN_REQ_REPORT is raised. + @note This parameter will be ignored when + @ref ble_gap_adv_properties_t::type is a non-scannable + advertising type. */ +} ble_gap_adv_params_t; + + +/**@brief GAP advertising data buffers. + * + * The application must provide the buffers for advertisement. The memory shall reside in application RAM, and + * shall never be modified while advertising. The data shall be kept alive until either: + * - @ref BLE_GAP_EVT_ADV_SET_TERMINATED is raised. + * - @ref BLE_GAP_EVT_CONNECTED is raised with @ref ble_gap_evt_connected_t::adv_handle set to the corresponding + * advertising handle. + * - Advertising is stopped. + * - Advertising data is changed. + * To update advertising data while advertising, provide new buffers to @ref sd_ble_gap_adv_set_configure. */ +typedef struct +{ + ble_data_t adv_data; /**< Advertising data. + @note + Advertising data can only be specified for a @ref ble_gap_adv_properties_t::type + that is allowed to contain advertising data. */ + ble_data_t scan_rsp_data; /**< Scan response data. + @note + Scan response data can only be specified for a @ref ble_gap_adv_properties_t::type + that is scannable. */ +} ble_gap_adv_data_t; + + +/**@brief GAP scanning parameters. */ +typedef struct +{ + uint8_t extended : 1; /**< If 1, the scanner will accept extended advertising packets. + If set to 0, the scanner will not receive advertising packets + on secondary advertising channels, and will not be able + to receive long advertising PDUs. + @note Extended scanning is only supported as an experimental feature in this + SoftDevice. */ + uint8_t report_incomplete_evts : 1; /**< If 1, events of type @ref ble_gap_evt_adv_report_t may have + @ref ble_gap_adv_report_type_t::status set to + @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA. + This parameter is ignored when used with @ref sd_ble_gap_connect + @note This may be used to abort receiving more packets from an extended + advertising event, and is only available for extended + scanning, see @ref sd_ble_gap_scan_start. + @note This feature is not supported by this SoftDevice. */ + uint8_t active : 1; /**< If 1, perform active scanning by sending scan requests. + This parameter is ignored when used with @ref sd_ble_gap_connect. */ + uint8_t filter_policy : 2; /**< Scanning filter policy. @sa BLE_GAP_SCAN_FILTER_POLICIES. + @note Only @ref BLE_GAP_SCAN_FP_ACCEPT_ALL and + @ref BLE_GAP_SCAN_FP_WHITELIST are valid when used with + @ref sd_ble_gap_connect */ + uint8_t scan_phys; /**< Bitfield of PHYs to scan on. If set to @ref BLE_GAP_PHY_AUTO, + scan_phys will default to @ref BLE_GAP_PHY_1MBPS. + - If @ref ble_gap_scan_params_t::extended is set to 0, the only + supported PHY is @ref BLE_GAP_PHY_1MBPS. + - When used with @ref sd_ble_gap_scan_start, + the bitfield indicates the PHYs the scanner will use for scanning + on primary advertising channels. The scanner will accept + @ref BLE_GAP_PHYS_SUPPORTED as secondary advertising channel PHYs. + - When used with @ref sd_ble_gap_connect, the + bitfield indicates the PHYs on where a connection may be initiated. + If scan_phys contains @ref BLE_GAP_PHY_1MBPS and/or @ref BLE_GAP_PHY_2MBPS, + the primary scan PHY is @ref BLE_GAP_PHY_1MBPS. */ + uint16_t interval; /**< Scan interval in 625 us units. @sa BLE_GAP_SCAN_INTERVALS. */ + uint16_t window; /**< Scan window in 625 us units. @sa BLE_GAP_SCAN_WINDOW. */ + uint16_t timeout; /**< Scan timeout in 10 ms units. @sa BLE_GAP_SCAN_TIMEOUT. */ + ble_gap_ch_mask_t channel_mask; /**< Channel mask for primary and secondary advertising channels. + At least one of the primary channels, that is channel index 37-39, must be + set to 0. + Masking away secondary channels is not supported. */ +} ble_gap_scan_params_t; + + +/**@brief Privacy. + * + * The privacy feature provides a way for the device to avoid being tracked over a period of time. + * The privacy feature, when enabled, hides the local device identity and replaces it with a private address + * that is automatically refreshed at a specified interval. + * + * If a device still wants to be recognized by other peers, it needs to share it's Identity Resolving Key (IRK). + * With this key, a device can generate a random private address that can only be recognized by peers in possession of that key, + * and devices can establish connections without revealing their real identities. + * + * Both network privacy (@ref BLE_GAP_PRIVACY_MODE_NETWORK_PRIVACY) and device privacy (@ref BLE_GAP_PRIVACY_MODE_DEVICE_PRIVACY) + * are supported. + * + * @note If the device IRK is updated, the new IRK becomes the one to be distributed in all + * bonding procedures performed after @ref sd_ble_gap_privacy_set returns. + * The IRK distributed during bonding procedure is the device IRK that is active when @ref sd_ble_gap_sec_params_reply is called. + */ +typedef struct +{ + uint8_t privacy_mode; /**< Privacy mode, see @ref BLE_GAP_PRIVACY_MODES. Default is @ref BLE_GAP_PRIVACY_MODE_OFF. */ + uint8_t private_addr_type; /**< The private address type must be either @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE or @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE. */ + uint16_t private_addr_cycle_s; /**< Private address cycle interval in seconds. Providing an address cycle value of 0 will use the default value defined by @ref BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S. */ + ble_gap_irk_t *p_device_irk; /**< When used as input, pointer to IRK structure that will be used as the default IRK. If NULL, the device default IRK will be used. + When used as output, pointer to IRK structure where the current default IRK will be written to. If NULL, this argument is ignored. + By default, the default IRK is used to generate random private resolvable addresses for the local device unless instructed otherwise. */ +} ble_gap_privacy_params_t; + + +/**@brief PHY preferences for TX and RX + * @note tx_phys and rx_phys are bit fields. Multiple bits can be set in them to indicate multiple preferred PHYs for each direction. + * @code + * p_gap_phys->tx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; + * p_gap_phys->rx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; + * @endcode + * + */ +typedef struct +{ + uint8_t tx_phys; /**< Preferred transmit PHYs, see @ref BLE_GAP_PHYS. */ + uint8_t rx_phys; /**< Preferred receive PHYs, see @ref BLE_GAP_PHYS. */ +} ble_gap_phys_t; + +/** @brief Keys that can be exchanged during a bonding procedure. */ +typedef struct +{ + uint8_t enc : 1; /**< Long Term Key and Master Identification. */ + uint8_t id : 1; /**< Identity Resolving Key and Identity Address Information. */ + uint8_t sign : 1; /**< Connection Signature Resolving Key. */ + uint8_t link : 1; /**< Derive the Link Key from the LTK. */ +} ble_gap_sec_kdist_t; + + +/**@brief GAP security parameters. */ +typedef struct +{ + uint8_t bond : 1; /**< Perform bonding. */ + uint8_t mitm : 1; /**< Enable Man In The Middle protection. */ + uint8_t lesc : 1; /**< Enable LE Secure Connection pairing. */ + uint8_t keypress : 1; /**< Enable generation of keypress notifications. */ + uint8_t io_caps : 3; /**< IO capabilities, see @ref BLE_GAP_IO_CAPS. */ + uint8_t oob : 1; /**< The OOB data flag. + - In LE legacy pairing, this flag is set if a device has out of band authentication data. + The OOB method is used if both of the devices have out of band authentication data. + - In LE Secure Connections pairing, this flag is set if a device has the peer device's out of band authentication data. + The OOB method is used if at least one device has the peer device's OOB data available. */ + uint8_t min_key_size; /**< Minimum encryption key size in octets between 7 and 16. If 0 then not applicable in this instance. */ + uint8_t max_key_size; /**< Maximum encryption key size in octets between min_key_size and 16. */ + ble_gap_sec_kdist_t kdist_own; /**< Key distribution bitmap: keys that the local device will distribute. */ + ble_gap_sec_kdist_t kdist_peer; /**< Key distribution bitmap: keys that the remote device will distribute. */ +} ble_gap_sec_params_t; + + +/**@brief GAP Encryption Information. */ +typedef struct +{ + uint8_t ltk[BLE_GAP_SEC_KEY_LEN]; /**< Long Term Key. */ + uint8_t lesc : 1; /**< Key generated using LE Secure Connections. */ + uint8_t auth : 1; /**< Authenticated Key. */ + uint8_t ltk_len : 6; /**< LTK length in octets. */ +} ble_gap_enc_info_t; + + +/**@brief GAP Master Identification. */ +typedef struct +{ + uint16_t ediv; /**< Encrypted Diversifier. */ + uint8_t rand[BLE_GAP_SEC_RAND_LEN]; /**< Random Number. */ +} ble_gap_master_id_t; + + +/**@brief GAP Signing Information. */ +typedef struct +{ + uint8_t csrk[BLE_GAP_SEC_KEY_LEN]; /**< Connection Signature Resolving Key. */ +} ble_gap_sign_info_t; + + +/**@brief GAP LE Secure Connections P-256 Public Key. */ +typedef struct +{ + uint8_t pk[BLE_GAP_LESC_P256_PK_LEN]; /**< LE Secure Connections Elliptic Curve Diffie-Hellman P-256 Public Key. Stored in the standard SMP protocol format: {X,Y} both in little-endian. */ +} ble_gap_lesc_p256_pk_t; + + +/**@brief GAP LE Secure Connections DHKey. */ +typedef struct +{ + uint8_t key[BLE_GAP_LESC_DHKEY_LEN]; /**< LE Secure Connections Elliptic Curve Diffie-Hellman Key. Stored in little-endian. */ +} ble_gap_lesc_dhkey_t; + + +/**@brief GAP LE Secure Connections OOB data. */ +typedef struct +{ + ble_gap_addr_t addr; /**< Bluetooth address of the device. */ + uint8_t r[BLE_GAP_SEC_KEY_LEN]; /**< Random Number. */ + uint8_t c[BLE_GAP_SEC_KEY_LEN]; /**< Confirm Value. */ +} ble_gap_lesc_oob_data_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_CONNECTED. */ +typedef struct +{ + ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 + and the address is the device's identity address. */ + uint8_t role; /**< BLE role for this connection, see @ref BLE_GAP_ROLES */ + ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ + uint8_t adv_handle; /**< Advertising handle in which advertising has ended. + This variable is only set if role is set to @ref BLE_GAP_ROLE_PERIPH. */ + ble_gap_adv_data_t adv_data; /**< Advertising buffers corresponding to the terminated + advertising set. The advertising buffers provided in + @ref sd_ble_gap_adv_set_configure are now released. + This variable is only set if role is set to @ref BLE_GAP_ROLE_PERIPH. */ +} ble_gap_evt_connected_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_DISCONNECTED. */ +typedef struct +{ + uint8_t reason; /**< HCI error code, see @ref BLE_HCI_STATUS_CODES. */ +} ble_gap_evt_disconnected_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_CONN_PARAM_UPDATE. */ +typedef struct +{ + ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ +} ble_gap_evt_conn_param_update_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_PHY_UPDATE_REQUEST. */ +typedef struct +{ + ble_gap_phys_t peer_preferred_phys; /**< The PHYs the peer prefers to use. */ +} ble_gap_evt_phy_update_request_t; + +/**@brief Event Structure for @ref BLE_GAP_EVT_PHY_UPDATE. */ +typedef struct +{ + uint8_t status; /**< Status of the procedure, see @ref BLE_HCI_STATUS_CODES.*/ + uint8_t tx_phy; /**< TX PHY for this connection, see @ref BLE_GAP_PHYS. */ + uint8_t rx_phy; /**< RX PHY for this connection, see @ref BLE_GAP_PHYS. */ +} ble_gap_evt_phy_update_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST. */ +typedef struct +{ + ble_gap_sec_params_t peer_params; /**< Initiator Security Parameters. */ +} ble_gap_evt_sec_params_request_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_SEC_INFO_REQUEST. */ +typedef struct +{ + ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. */ + ble_gap_master_id_t master_id; /**< Master Identification for LTK lookup. */ + uint8_t enc_info : 1; /**< If 1, Encryption Information required. */ + uint8_t id_info : 1; /**< If 1, Identity Information required. */ + uint8_t sign_info : 1; /**< If 1, Signing Information required. */ +} ble_gap_evt_sec_info_request_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_PASSKEY_DISPLAY. */ +typedef struct +{ + uint8_t passkey[BLE_GAP_PASSKEY_LEN]; /**< 6-digit passkey in ASCII ('0'-'9' digits only). */ + uint8_t match_request : 1; /**< If 1 requires the application to report the match using @ref sd_ble_gap_auth_key_reply + with either @ref BLE_GAP_AUTH_KEY_TYPE_NONE if there is no match or + @ref BLE_GAP_AUTH_KEY_TYPE_PASSKEY if there is a match. */ +} ble_gap_evt_passkey_display_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_KEY_PRESSED. */ +typedef struct +{ + uint8_t kp_not; /**< Keypress notification type, see @ref BLE_GAP_KP_NOT_TYPES. */ +} ble_gap_evt_key_pressed_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_AUTH_KEY_REQUEST. */ +typedef struct +{ + uint8_t key_type; /**< See @ref BLE_GAP_AUTH_KEY_TYPES. */ +} ble_gap_evt_auth_key_request_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST. */ +typedef struct +{ + ble_gap_lesc_p256_pk_t *p_pk_peer; /**< LE Secure Connections remote P-256 Public Key. This will point to the application-supplied memory + inside the keyset during the call to @ref sd_ble_gap_sec_params_reply. */ + uint8_t oobd_req :1; /**< LESC OOB data required. A call to @ref sd_ble_gap_lesc_oob_data_set is required to complete the procedure. */ +} ble_gap_evt_lesc_dhkey_request_t; + + +/**@brief Security levels supported. + * @note See Bluetooth Specification Version 4.2 Volume 3, Part C, Chapter 10, Section 10.2.1. +*/ +typedef struct +{ + uint8_t lv1 : 1; /**< If 1: Level 1 is supported. */ + uint8_t lv2 : 1; /**< If 1: Level 2 is supported. */ + uint8_t lv3 : 1; /**< If 1: Level 3 is supported. */ + uint8_t lv4 : 1; /**< If 1: Level 4 is supported. */ +} ble_gap_sec_levels_t; + + +/**@brief Encryption Key. */ +typedef struct +{ + ble_gap_enc_info_t enc_info; /**< Encryption Information. */ + ble_gap_master_id_t master_id; /**< Master Identification. */ +} ble_gap_enc_key_t; + + +/**@brief Identity Key. */ +typedef struct +{ + ble_gap_irk_t id_info; /**< Identity Resolving Key. */ + ble_gap_addr_t id_addr_info; /**< Identity Address. */ +} ble_gap_id_key_t; + + +/**@brief Security Keys. */ +typedef struct +{ + ble_gap_enc_key_t *p_enc_key; /**< Encryption Key, or NULL. */ + ble_gap_id_key_t *p_id_key; /**< Identity Key, or NULL. */ + ble_gap_sign_info_t *p_sign_key; /**< Signing Key, or NULL. */ + ble_gap_lesc_p256_pk_t *p_pk; /**< LE Secure Connections P-256 Public Key. When in debug mode the application must use the value defined + in the Core Bluetooth Specification v4.2 Vol.3, Part H, Section 2.3.5.6.1 */ +} ble_gap_sec_keys_t; + + +/**@brief Security key set for both local and peer keys. */ +typedef struct +{ + ble_gap_sec_keys_t keys_own; /**< Keys distributed by the local device. For LE Secure Connections the encryption key will be generated locally and will always be stored if bonding. */ + ble_gap_sec_keys_t keys_peer; /**< Keys distributed by the remote device. For LE Secure Connections, p_enc_key must always be NULL. */ +} ble_gap_sec_keyset_t; + + +/**@brief Data Length Update Procedure parameters. */ +typedef struct +{ + uint16_t max_tx_octets; /**< Maximum number of payload octets that a Controller supports for transmission of a single Link Layer Data Channel PDU. */ + uint16_t max_rx_octets; /**< Maximum number of payload octets that a Controller supports for reception of a single Link Layer Data Channel PDU. */ + uint16_t max_tx_time_us; /**< Maximum time, in microseconds, that a Controller supports for transmission of a single Link Layer Data Channel PDU. */ + uint16_t max_rx_time_us; /**< Maximum time, in microseconds, that a Controller supports for reception of a single Link Layer Data Channel PDU. */ +} ble_gap_data_length_params_t; + + +/**@brief Data Length Update Procedure local limitation. */ +typedef struct +{ + uint16_t tx_payload_limited_octets; /**< If > 0, the requested TX packet length is too long by this many octets. */ + uint16_t rx_payload_limited_octets; /**< If > 0, the requested RX packet length is too long by this many octets. */ + uint16_t tx_rx_time_limited_us; /**< If > 0, the requested combination of TX and RX packet lengths is too long by this many microseconds. */ +} ble_gap_data_length_limitation_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_AUTH_STATUS. */ +typedef struct +{ + uint8_t auth_status; /**< Authentication status, see @ref BLE_GAP_SEC_STATUS. */ + uint8_t error_src : 2; /**< On error, source that caused the failure, see @ref BLE_GAP_SEC_STATUS_SOURCES. */ + uint8_t bonded : 1; /**< Procedure resulted in a bond. */ + uint8_t lesc : 1; /**< Procedure resulted in a LE Secure Connection. */ + ble_gap_sec_levels_t sm1_levels; /**< Levels supported in Security Mode 1. */ + ble_gap_sec_levels_t sm2_levels; /**< Levels supported in Security Mode 2. */ + ble_gap_sec_kdist_t kdist_own; /**< Bitmap stating which keys were exchanged (distributed) by the local device. If bonding with LE Secure Connections, the enc bit will be always set. */ + ble_gap_sec_kdist_t kdist_peer; /**< Bitmap stating which keys were exchanged (distributed) by the remote device. If bonding with LE Secure Connections, the enc bit will never be set. */ +} ble_gap_evt_auth_status_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_CONN_SEC_UPDATE. */ +typedef struct +{ + ble_gap_conn_sec_t conn_sec; /**< Connection security level. */ +} ble_gap_evt_conn_sec_update_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_TIMEOUT. */ +typedef struct +{ + uint8_t src; /**< Source of timeout event, see @ref BLE_GAP_TIMEOUT_SOURCES. */ + union + { + ble_data_t adv_report_buffer; /**< If source is set to @ref BLE_GAP_TIMEOUT_SRC_SCAN, the released + scan buffer is contained in this field. */ + } params; /**< Event Parameters. */ +} ble_gap_evt_timeout_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_RSSI_CHANGED. */ +typedef struct +{ + int8_t rssi; /**< Received Signal Strength Indication in dBm. */ + uint8_t ch_index; /**< Data Channel Index on which the Signal Strength is measured (0-36). */ +} ble_gap_evt_rssi_changed_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_ADV_SET_TERMINATED */ +typedef struct +{ + uint8_t reason; /**< Reason for why the advertising set terminated. See + @ref BLE_GAP_EVT_ADV_SET_TERMINATED_REASON. */ + uint8_t adv_handle; /**< Advertising handle in which advertising has ended. */ + uint8_t num_completed_adv_events; /**< If @ref ble_gap_adv_params_t::max_adv_evts was not set to 0, + this field indicates the number of completed advertising events. */ + ble_gap_adv_data_t adv_data; /**< Advertising buffers corresponding to the terminated + advertising set. The advertising buffers provided in + @ref sd_ble_gap_adv_set_configure are now released. */ +} ble_gap_evt_adv_set_terminated_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_ADV_REPORT. + * + * @note If @ref ble_gap_adv_report_type_t::status is set to @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA, + * not all fields in the advertising report may be available. + * + * @note When ble_gap_adv_report_type_t::status is not set to @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA, + * scanning will be paused. To continue scanning, call @ref sd_ble_gap_scan_start. + */ +typedef struct +{ + ble_gap_adv_report_type_t type; /**< Advertising report type. See @ref ble_gap_adv_report_type_t. */ + ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr is resolved: + @ref ble_gap_addr_t::addr_id_peer is set to 1 and the address is the + peer's identity address. */ + ble_gap_addr_t direct_addr; /**< Contains the target address of the advertising event if + @ref ble_gap_adv_report_type_t::directed is set to 1. If the + SoftDevice was able to resolve the address, + @ref ble_gap_addr_t::addr_id_peer is set to 1 and the direct_addr + contains the local identity address. If the target address of the + advertising event is @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE, + and the SoftDevice was unable to resolve it, the application may try + to resolve this address to find out if the advertising event was + directed to us. */ + uint8_t primary_phy; /**< Indicates the PHY on which the primary advertising packet was received on. + See @ref BLE_GAP_PHYS. */ + uint8_t secondary_phy; /**< Indicates the PHY on which the secondary advertising packet was received on. + See @ref BLE_GAP_PHYS. This field is to 0 if no packets where received on + a secondary advertising channel. */ + int8_t tx_power; /**< TX Power reported by the advertiser in the last packet header received. + This field is set to @ref BLE_GAP_POWER_LEVEL_INVALID if the + last received packet did not contain the Tx Power field. + @note TX Power is only included in extended advertising packets. */ + int8_t rssi; /**< Received Signal Strength Indication in dBm of the last packet received. */ + uint8_t ch_index; /**< Channel Index on which the last advertising packet is received (0-39). */ + uint8_t set_id; /**< Set ID of the received advertising data. Set ID is not present + if set to @ref BLE_GAP_ADV_REPORT_SET_ID_NOT_AVAILABLE. */ + uint16_t data_id:12; /**< The advertising data ID of the received advertising data. Data ID + is not present if @ref ble_gap_evt_adv_report_t::set_id is set to + @ref BLE_GAP_ADV_REPORT_SET_ID_NOT_AVAILABLE. */ + ble_data_t data; /**< Received advertising or scan response data. If + @ref ble_gap_adv_report_type_t::status is not set to + @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA, the data buffer provided + in @ref sd_ble_gap_scan_start is now released. */ + ble_gap_aux_pointer_t aux_pointer; /**< The offset and PHY of the next advertising packet in this extended advertising + event. @note This field is only set if @ref ble_gap_adv_report_type_t::status + is set to @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA. */ +} ble_gap_evt_adv_report_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_SEC_REQUEST. */ +typedef struct +{ + uint8_t bond : 1; /**< Perform bonding. */ + uint8_t mitm : 1; /**< Man In The Middle protection requested. */ + uint8_t lesc : 1; /**< LE Secure Connections requested. */ + uint8_t keypress : 1; /**< Generation of keypress notifications requested. */ +} ble_gap_evt_sec_request_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST. */ +typedef struct +{ + ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ +} ble_gap_evt_conn_param_update_request_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_SCAN_REQ_REPORT. */ +typedef struct +{ + uint8_t adv_handle; /**< Advertising handle for the advertising set which received the Scan Request */ + int8_t rssi; /**< Received Signal Strength Indication in dBm. */ + ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 + and the address is the device's identity address. */ +} ble_gap_evt_scan_req_report_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST. */ +typedef struct +{ + ble_gap_data_length_params_t peer_params; /**< Peer data length parameters. */ +} ble_gap_evt_data_length_update_request_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE. */ +typedef struct +{ + ble_gap_data_length_params_t effective_params; /**< The effective data length parameters. */ +} ble_gap_evt_data_length_update_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_QOS_CHANNEL_SURVEY_REPORT. */ +typedef struct +{ + int8_t channel_energy[BLE_GAP_CHANNEL_COUNT]; /**< The measured energy on the Bluetooth Low Energy + channels, in dBm, indexed by Channel Index. + If no measurement is available for the given channel, channel_energy is set to + @ref BLE_GAP_POWER_LEVEL_INVALID. */ +} ble_gap_evt_qos_channel_survey_report_t; + +/**@brief GAP event structure. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which event occurred. */ + union /**< union alternative identified by evt_id in enclosing struct. */ + { + ble_gap_evt_connected_t connected; /**< Connected Event Parameters. */ + ble_gap_evt_disconnected_t disconnected; /**< Disconnected Event Parameters. */ + ble_gap_evt_conn_param_update_t conn_param_update; /**< Connection Parameter Update Parameters. */ + ble_gap_evt_sec_params_request_t sec_params_request; /**< Security Parameters Request Event Parameters. */ + ble_gap_evt_sec_info_request_t sec_info_request; /**< Security Information Request Event Parameters. */ + ble_gap_evt_passkey_display_t passkey_display; /**< Passkey Display Event Parameters. */ + ble_gap_evt_key_pressed_t key_pressed; /**< Key Pressed Event Parameters. */ + ble_gap_evt_auth_key_request_t auth_key_request; /**< Authentication Key Request Event Parameters. */ + ble_gap_evt_lesc_dhkey_request_t lesc_dhkey_request; /**< LE Secure Connections DHKey calculation request. */ + ble_gap_evt_auth_status_t auth_status; /**< Authentication Status Event Parameters. */ + ble_gap_evt_conn_sec_update_t conn_sec_update; /**< Connection Security Update Event Parameters. */ + ble_gap_evt_timeout_t timeout; /**< Timeout Event Parameters. */ + ble_gap_evt_rssi_changed_t rssi_changed; /**< RSSI Event Parameters. */ + ble_gap_evt_adv_report_t adv_report; /**< Advertising Report Event Parameters. */ + ble_gap_evt_adv_set_terminated_t adv_set_terminated; /**< Advertising Set Terminated Event Parameters. */ + ble_gap_evt_sec_request_t sec_request; /**< Security Request Event Parameters. */ + ble_gap_evt_conn_param_update_request_t conn_param_update_request; /**< Connection Parameter Update Parameters. */ + ble_gap_evt_scan_req_report_t scan_req_report; /**< Scan Request Report Parameters. */ + ble_gap_evt_phy_update_request_t phy_update_request; /**< PHY Update Request Event Parameters. */ + ble_gap_evt_phy_update_t phy_update; /**< PHY Update Parameters. */ + ble_gap_evt_data_length_update_request_t data_length_update_request; /**< Data Length Update Request Event Parameters. */ + ble_gap_evt_data_length_update_t data_length_update; /**< Data Length Update Event Parameters. */ + ble_gap_evt_qos_channel_survey_report_t qos_channel_survey_report; /**< Quality of Service (QoS) Channel Survey Report Parameters. */ + } params; /**< Event Parameters. */ +} ble_gap_evt_t; + + +/** + * @brief BLE GAP connection configuration parameters, set with @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_CONN_COUNT The connection count for the connection configurations is zero. + * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: + * - The sum of conn_count for all connection configurations combined exceeds UINT8_MAX. + * - The event length is smaller than @ref BLE_GAP_EVENT_LENGTH_MIN. + */ +typedef struct +{ + uint8_t conn_count; /**< The number of concurrent connections the application can create with this configuration. + The default and minimum value is @ref BLE_GAP_CONN_COUNT_DEFAULT. */ + uint16_t event_length; /**< The time set aside for this connection on every connection interval in 1.25 ms units. + The default value is @ref BLE_GAP_EVENT_LENGTH_DEFAULT, the minimum value is @ref BLE_GAP_EVENT_LENGTH_MIN. + The event length and the connection interval are the primary parameters + for setting the throughput of a connection. + See the SoftDevice Specification for details on throughput. */ +} ble_gap_conn_cfg_t; + + +/** + * @brief Configuration of maximum concurrent connections in the different connected roles, set with + * @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_CONN_COUNT The sum of periph_role_count and central_role_count is too + * large. The maximum supported sum of concurrent connections is + * @ref BLE_GAP_ROLE_COUNT_COMBINED_MAX. + * @retval ::NRF_ERROR_INVALID_PARAM central_sec_count is larger than central_role_count. + * @retval ::NRF_ERROR_RESOURCES The adv_set_count is too large. The maximum + * supported advertising handles is + * @ref BLE_GAP_ADV_SET_COUNT_MAX. + */ +typedef struct +{ + uint8_t adv_set_count; /**< Maximum number of advertising sets. Default value is @ref BLE_GAP_ADV_SET_COUNT_DEFAULT. */ + uint8_t periph_role_count; /**< Maximum number of connections concurrently acting as a peripheral. Default value is @ref BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT. */ + uint8_t central_role_count; /**< Maximum number of connections concurrently acting as a central. Default value is @ref BLE_GAP_ROLE_COUNT_CENTRAL_DEFAULT. */ + uint8_t central_sec_count; /**< Number of SMP instances shared between all connections acting as a central. Default value is @ref BLE_GAP_ROLE_COUNT_CENTRAL_SEC_DEFAULT. */ + uint8_t qos_channel_survey_role_available:1; /**< If set, the Quality of Service (QoS) channel survey module is available to the + application using @ref sd_ble_gap_qos_channel_survey_start. */ +} ble_gap_cfg_role_count_t; + + +/** + * @brief Device name and its properties, set with @ref sd_ble_cfg_set. + * + * @note If the device name is not configured, the default device name will be + * @ref BLE_GAP_DEVNAME_DEFAULT, the maximum device name length will be + * @ref BLE_GAP_DEVNAME_DEFAULT_LEN, vloc will be set to @ref BLE_GATTS_VLOC_STACK and the device name + * will have no write access. + * + * @note If @ref max_len is more than @ref BLE_GAP_DEVNAME_DEFAULT_LEN and vloc is set to @ref BLE_GATTS_VLOC_STACK, + * the attribute table size must be increased to have room for the longer device name (see + * @ref sd_ble_cfg_set and @ref ble_gatts_cfg_attr_tab_size_t). + * + * @note If vloc is @ref BLE_GATTS_VLOC_STACK : + * - p_value must point to non-volatile memory (flash) or be NULL. + * - If p_value is NULL, the device name will initially be empty. + * + * @note If vloc is @ref BLE_GATTS_VLOC_USER : + * - p_value cannot be NULL. + * - If the device name is writable, p_value must point to volatile memory (RAM). + * + * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: + * - Invalid device name location (vloc). + * - Invalid device name security mode. + * @retval ::NRF_ERROR_INVALID_LENGTH One or more of the following is true: + * - The device name length is invalid (must be between 0 and @ref BLE_GAP_DEVNAME_MAX_LEN). + * - The device name length is too long for the given Attribute Table. + * @retval ::NRF_ERROR_NOT_SUPPORTED Device name security mode is not supported. + */ +typedef struct +{ + ble_gap_conn_sec_mode_t write_perm; /**< Write permissions. */ + uint8_t vloc:2; /**< Value location, see @ref BLE_GATTS_VLOCS.*/ + uint8_t *p_value; /**< Pointer to where the value (device name) is stored or will be stored. */ + uint16_t current_len; /**< Current length in bytes of the memory pointed to by p_value.*/ + uint16_t max_len; /**< Maximum length in bytes of the memory pointed to by p_value.*/ +} ble_gap_cfg_device_name_t; + + +/**@brief Configuration structure for GAP configurations. */ +typedef union +{ + ble_gap_cfg_role_count_t role_count_cfg; /**< Role count configuration, cfg_id is @ref BLE_GAP_CFG_ROLE_COUNT. */ + ble_gap_cfg_device_name_t device_name_cfg; /**< Device name configuration, cfg_id is @ref BLE_GAP_CFG_DEVICE_NAME. */ +} ble_gap_cfg_t; + + +/**@brief Channel Map option. + * + * @details Used with @ref sd_ble_opt_get to get the current channel map + * or @ref sd_ble_opt_set to set a new channel map. When setting the + * channel map, it applies to all current and future connections. When getting the + * current channel map, it applies to a single connection and the connection handle + * must be supplied. + * + * @note Setting the channel map may take some time, depending on connection parameters. + * The time taken may be different for each connection and the get operation will + * return the previous channel map until the new one has taken effect. + * + * @note After setting the channel map, by spec it can not be set again until at least 1 s has passed. + * See Bluetooth Specification Version 4.1 Volume 2, Part E, Section 7.3.46. + * + * @retval ::NRF_SUCCESS Get or set successful. + * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: + * - Less then two bits in @ref ch_map are set. + * - Bits for primary advertising channels (37-39) are set. + * @retval ::NRF_ERROR_BUSY Channel map was set again before enough time had passed. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied for get. + * + */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle (only applicable for get) */ + uint8_t ch_map[5]; /**< Channel Map (37-bit). */ +} ble_gap_opt_ch_map_t; + + +/**@brief Local connection latency option. + * + * @details Local connection latency is a feature which enables the slave to improve + * current consumption by ignoring the slave latency set by the peer. The + * local connection latency can only be set to a multiple of the slave latency, + * and cannot be longer than half of the supervision timeout. + * + * @details Used with @ref sd_ble_opt_set to set the local connection latency. The + * @ref sd_ble_opt_get is not supported for this option, but the actual + * local connection latency (unless set to NULL) is set as a return parameter + * when setting the option. + * + * @note The latency set will be truncated down to the closest slave latency event + * multiple, or the nearest multiple before half of the supervision timeout. + * + * @note The local connection latency is disabled by default, and needs to be enabled for new + * connections and whenever the connection is updated. + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_NOT_SUPPORTED Get is not supported. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. + */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle */ + uint16_t requested_latency; /**< Requested local connection latency. */ + uint16_t * p_actual_latency; /**< Pointer to storage for the actual local connection latency (can be set to NULL to skip return value). */ +} ble_gap_opt_local_conn_latency_t; + +/**@brief Disable slave latency + * + * @details Used with @ref sd_ble_opt_set to temporarily disable slave latency of a peripheral connection + * (see @ref ble_gap_conn_params_t::slave_latency). And to re-enable it again. When disabled, the + * peripheral will ignore the slave_latency set by the central. + * + * @note Shall only be called on peripheral links. + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_NOT_SUPPORTED Get is not supported. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. + */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle */ + uint8_t disable : 1; /**< Set to 1 to disable slave latency. Set to 0 enable it again.*/ +} ble_gap_opt_slave_latency_disable_t; + +/**@brief Passkey Option. + * + * @details Structure containing the passkey to be used during pairing. This can be used with @ref + * sd_ble_opt_set to make the SoftDevice use a preprogrammed passkey for authentication + * instead of generating a random one. + * + * @note Repeated pairing attempts using the same preprogrammed passkey makes pairing vulnerable to MITM attacks. + * + * @note @ref sd_ble_opt_get is not supported for this option. + * + */ +typedef struct +{ + uint8_t const * p_passkey; /**< Pointer to 6-digit ASCII string (digit 0..9 only, no NULL termination) passkey to be used during pairing. If this is NULL, the SoftDevice will generate a random passkey if required.*/ +} ble_gap_opt_passkey_t; + + +/**@brief Compatibility mode 1 option. + * + * @details This can be used with @ref sd_ble_opt_set to enable and disable + * compatibility mode 1. Compatibility mode 1 is disabled by default. + * + * @note Compatibility mode 1 enables interoperability with devices that do not support a value of + * 0 for the WinOffset parameter in the Link Layer CONNECT_IND packet. This applies to a + * limited set of legacy peripheral devices from another vendor. Enabling this compatibility + * mode will only have an effect if the local device will act as a central device and + * initiate a connection to a peripheral device. In that case it may lead to the connection + * creation taking up to one connection interval longer to complete for all connections. + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_INVALID_STATE When connection creation is ongoing while mode 1 is set. + */ +typedef struct +{ + uint8_t enable : 1; /**< Enable compatibility mode 1.*/ +} ble_gap_opt_compat_mode_1_t; + + +/**@brief Authenticated payload timeout option. + * + * @details This can be used with @ref sd_ble_opt_set to change the Authenticated payload timeout to a value other + * than the default of @ref BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MAX. + * + * @note The authenticated payload timeout event ::BLE_GAP_TIMEOUT_SRC_AUTH_PAYLOAD will be generated + * if auth_payload_timeout time has elapsed without receiving a packet with a valid MIC on an encrypted + * link. + * + * @note The LE ping procedure will be initiated before the timer expires to give the peer a chance + * to reset the timer. In addition the stack will try to prioritize running of LE ping over other + * activities to increase chances of finishing LE ping before timer expires. To avoid side-effects + * on other activities, it is recommended to use high timeout values. + * Recommended timeout > 2*(connInterval * (6 + connSlaveLatency)). + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. auth_payload_timeout was outside of allowed range. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. + */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle */ + uint16_t auth_payload_timeout; /**< Requested timeout in 10 ms unit, see @ref BLE_GAP_AUTH_PAYLOAD_TIMEOUT. */ +} ble_gap_opt_auth_payload_timeout_t; + +/**@brief Option structure for GAP options. */ +typedef union +{ + ble_gap_opt_ch_map_t ch_map; /**< Parameters for the Channel Map option. */ + ble_gap_opt_local_conn_latency_t local_conn_latency; /**< Parameters for the Local connection latency option */ + ble_gap_opt_passkey_t passkey; /**< Parameters for the Passkey option.*/ + ble_gap_opt_compat_mode_1_t compat_mode_1; /**< Parameters for the compatibility mode 1 option.*/ + ble_gap_opt_auth_payload_timeout_t auth_payload_timeout; /**< Parameters for the authenticated payload timeout option.*/ + ble_gap_opt_slave_latency_disable_t slave_latency_disable; /**< Parameters for the Disable slave latency option */ +} ble_gap_opt_t; +/**@} */ + + +/**@addtogroup BLE_GAP_FUNCTIONS Functions + * @{ */ + +/**@brief Set the local Bluetooth identity address. + * + * The local Bluetooth identity address is the address that identifies this device to other peers. + * The address type must be either @ref BLE_GAP_ADDR_TYPE_PUBLIC or @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC. + * + * @note The identity address cannot be changed while advertising, scanning or creating a connection. + * + * @note This address will be distributed to the peer during bonding. + * If the address changes, the address stored in the peer device will not be valid and the ability to + * reconnect using the old address will be lost. + * + * @note By default the SoftDevice will set an address of type @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC upon being + * enabled. The address is a random number populated during the IC manufacturing process and remains unchanged + * for the lifetime of each IC. + * + * @mscs + * @mmsc{@ref BLE_GAP_ADV_MSC} + * @endmscs + * + * @param[in] p_addr Pointer to address structure. + * + * @retval ::NRF_SUCCESS Address successfully set. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::NRF_ERROR_INVALID_STATE The identity address cannot be changed while advertising, + * scanning or creating a connection. + */ +SVCALL(SD_BLE_GAP_ADDR_SET, uint32_t, sd_ble_gap_addr_set(ble_gap_addr_t const *p_addr)); + + +/**@brief Get local Bluetooth identity address. + * + * @note This will always return the identity address irrespective of the privacy settings, + * i.e. the address type will always be either @ref BLE_GAP_ADDR_TYPE_PUBLIC or @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC. + * + * @param[out] p_addr Pointer to address structure to be filled in. + * + * @retval ::NRF_SUCCESS Address successfully retrieved. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. + */ +SVCALL(SD_BLE_GAP_ADDR_GET, uint32_t, sd_ble_gap_addr_get(ble_gap_addr_t *p_addr)); + + +/**@brief Set the active whitelist in the SoftDevice. + * + * @note Only one whitelist can be used at a time and the whitelist is shared between the BLE roles. + * The whitelist cannot be set if a BLE role is using the whitelist. + * + * @note If an address is resolved using the information in the device identity list, then the whitelist + * filter policy applies to the peer identity address and not the resolvable address sent on air. + * + * @mscs + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_PRIVATE_SCAN_MSC} + * @endmscs + * + * @param[in] pp_wl_addrs Pointer to a whitelist of peer addresses, if NULL the whitelist will be cleared. + * @param[in] len Length of the whitelist, maximum @ref BLE_GAP_WHITELIST_ADDR_MAX_COUNT. + * + * @retval ::NRF_SUCCESS The whitelist is successfully set/cleared. + * @retval ::NRF_ERROR_INVALID_ADDR The whitelist (or one of its entries) provided is invalid. + * @retval ::BLE_ERROR_GAP_WHITELIST_IN_USE The whitelist is in use by a BLE role and cannot be set or cleared. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. + * @retval ::NRF_ERROR_DATA_SIZE The given whitelist size is invalid (zero or too large); this can only return when + * pp_wl_addrs is not NULL. + */ +SVCALL(SD_BLE_GAP_WHITELIST_SET, uint32_t, sd_ble_gap_whitelist_set(ble_gap_addr_t const * const * pp_wl_addrs, uint8_t len)); + + +/**@brief Set device identity list. + * + * @note Only one device identity list can be used at a time and the list is shared between the BLE roles. + * The device identity list cannot be set if a BLE role is using the list. + * + * @param[in] pp_id_keys Pointer to an array of peer identity addresses and peer IRKs, if NULL the device identity list will be cleared. + * @param[in] pp_local_irks Pointer to an array of local IRKs. Each entry in the array maps to the entry in pp_id_keys at the same index. + * To fill in the list with the currently set device IRK for all peers, set to NULL. + * @param[in] len Length of the device identity list, maximum @ref BLE_GAP_DEVICE_IDENTITIES_MAX_COUNT. + * + * @mscs + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_PRIVATE_SCAN_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_CONN_PRIV_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_CONN_PRIV_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS The device identity list successfully set/cleared. + * @retval ::NRF_ERROR_INVALID_ADDR The device identity list (or one of its entries) provided is invalid. + * This code may be returned if the local IRK list also has an invalid entry. + * @retval ::BLE_ERROR_GAP_DEVICE_IDENTITIES_IN_USE The device identity list is in use and cannot be set or cleared. + * @retval ::BLE_ERROR_GAP_DEVICE_IDENTITIES_DUPLICATE The device identity list contains multiple entries with the same identity address. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. + * @retval ::NRF_ERROR_DATA_SIZE The given device identity list size invalid (zero or too large); this can + * only return when pp_id_keys is not NULL. + */ +SVCALL(SD_BLE_GAP_DEVICE_IDENTITIES_SET, uint32_t, sd_ble_gap_device_identities_set(ble_gap_id_key_t const * const * pp_id_keys, ble_gap_irk_t const * const * pp_local_irks, uint8_t len)); + + +/**@brief Set privacy settings. + * + * @note Privacy settings cannot be changed while advertising, scanning or creating a connection. + * + * @param[in] p_privacy_params Privacy settings. + * + * @mscs + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. + * @retval ::NRF_ERROR_INVALID_ADDR The pointer to privacy settings is NULL or invalid. + * Otherwise, the p_device_irk pointer in privacy parameter is an invalid pointer. + * @retval ::NRF_ERROR_INVALID_PARAM Out of range parameters are provided. + * @retval ::NRF_ERROR_INVALID_STATE Privacy settings cannot be changed while advertising, scanning + * or creating a connection. + */ +SVCALL(SD_BLE_GAP_PRIVACY_SET, uint32_t, sd_ble_gap_privacy_set(ble_gap_privacy_params_t const *p_privacy_params)); + + +/**@brief Get privacy settings. + * + * @note ::ble_gap_privacy_params_t::p_device_irk must be initialized to NULL or a valid address before this function is called. + * If it is initialized to a valid address, the address pointed to will contain the current device IRK on return. + * + * @param[in,out] p_privacy_params Privacy settings. + * + * @retval ::NRF_SUCCESS Privacy settings read. + * @retval ::NRF_ERROR_INVALID_ADDR The pointer given for returning the privacy settings may be NULL or invalid. + * Otherwise, the p_device_irk pointer in privacy parameter is an invalid pointer. + */ +SVCALL(SD_BLE_GAP_PRIVACY_GET, uint32_t, sd_ble_gap_privacy_get(ble_gap_privacy_params_t *p_privacy_params)); + + +/**@brief Configure an advertising set. Set, clear or update advertising and scan response data. + * + * @note The format of the advertising data will be checked by this call to ensure interoperability. + * Limitations imposed by this API call to the data provided include having a flags data type in the scan response data and + * duplicating the local name in the advertising data and scan response data. + * + * @note In order to update advertising data while advertising, new advertising buffers must be provided. + * + * @mscs + * @mmsc{@ref BLE_GAP_ADV_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @param[in,out] p_adv_handle Provide a pointer to a handle containing @ref BLE_GAP_ADV_SET_HANDLE_NOT_SET to configure + * a new advertising set. On success, a new handle is then returned through the pointer. + * Provide a pointer to an existing advertising handle to configure an existing advertising set. + * @param[in] p_adv_data Advertising data. If set to NULL, no advertising data will be used. See @ref ble_gap_adv_data_t. + * @param[in] p_adv_params Advertising parameters. When this function is used to update advertising data while advertising, + * this parameter must be NULL. See @ref ble_gap_adv_params_t. + * + * @retval ::NRF_SUCCESS Advertising set successfully configured. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied: + * - Invalid advertising data configuration specified. See @ref ble_gap_adv_data_t. + * - Invalid configuration of p_adv_params. See @ref ble_gap_adv_params_t. + * - Use of whitelist requested but whitelist has not been set, + * see @ref sd_ble_gap_whitelist_set. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR ble_gap_adv_params_t::p_peer_addr is invalid. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * - It is invalid to provide non-NULL advertising set parameters while advertising. + * - It is invalid to provide the same data buffers while advertising. To update + * advertising data, provide new advertising buffers. + * @retval ::BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST Discoverable mode and whitelist incompatible. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE The provided advertising handle was not found. Use @ref BLE_GAP_ADV_SET_HANDLE_NOT_SET to + * configure a new advertising handle. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_FLAGS Invalid combination of advertising flags supplied. + * @retval ::NRF_ERROR_INVALID_DATA Invalid data type(s) supplied. Check the advertising data format specification + * given in Bluetooth Specification Version 5.0, Volume 3, Part C, Chapter 11. + * @retval ::NRF_ERROR_INVALID_LENGTH Invalid data length(s) supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported data length or advertising parameter configuration. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to configure a new advertising handle. Update an + * existing advertising handle instead. + * @retval ::BLE_ERROR_GAP_UUID_LIST_MISMATCH Invalid UUID list supplied. + */ +SVCALL(SD_BLE_GAP_ADV_SET_CONFIGURE, uint32_t, sd_ble_gap_adv_set_configure(uint8_t *p_adv_handle, ble_gap_adv_data_t const *p_adv_data, ble_gap_adv_params_t const *p_adv_params)); + + +/**@brief Start advertising (GAP Discoverable, Connectable modes, Broadcast Procedure). + * + * @note Only one advertiser may be active at any time. + * + * @events + * @event{@ref BLE_GAP_EVT_CONNECTED, Generated after connection has been established through connectable advertising.} + * @event{@ref BLE_GAP_EVT_ADV_SET_TERMINATED, Advertising set has terminated.} + * @event{@ref BLE_GAP_EVT_SCAN_REQ_REPORT, A scan request was received.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_ADV_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_CONN_PRIV_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @param[in] adv_handle Advertising handle to advertise on, received from @ref sd_ble_gap_adv_set_configure. + * @param[in] conn_cfg_tag Tag identifying a configuration set by @ref sd_ble_cfg_set or + * @ref BLE_CONN_CFG_TAG_DEFAULT to use the default connection configuration. For non-connectable + * advertising, this is ignored. + * + * @retval ::NRF_SUCCESS The BLE stack has started advertising. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. adv_handle is not configured or already advertising. + * @retval ::NRF_ERROR_CONN_COUNT The limit of available connections has been reached; connectable advertiser cannot be started. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE Advertising handle not found. Configure a new adveriting handle with @ref sd_ble_gap_adv_set_configure. + * @retval ::NRF_ERROR_NOT_FOUND conn_cfg_tag not found. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied: + * - Invalid configuration of p_adv_params. See @ref ble_gap_adv_params_t. + * - Use of whitelist requested but whitelist has not been set, see @ref sd_ble_gap_whitelist_set. + * @retval ::NRF_ERROR_RESOURCES Either: + * - adv_handle is configured with connectable advertising, but the event_length parameter + * associated with conn_cfg_tag is too small to be able to establish a connection on + * the selected advertising phys. Use @ref sd_ble_cfg_set to increase the event length. + * - Not enough BLE role slots available. + Stop one or more currently active roles (Central, Peripheral, Broadcaster or Observer) and try again. + * - p_adv_params is configured with connectable advertising, but the event_length parameter + * associated with conn_cfg_tag is too small to be able to establish a connection on + * the selected advertising phys. Use @ref sd_ble_cfg_set to increase the event length. + * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported PHYs supplied to the call. + */ +SVCALL(SD_BLE_GAP_ADV_START, uint32_t, sd_ble_gap_adv_start(uint8_t adv_handle, uint8_t conn_cfg_tag)); + + +/**@brief Stop advertising (GAP Discoverable, Connectable modes, Broadcast Procedure). + * + * @mscs + * @mmsc{@ref BLE_GAP_ADV_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @param[in] adv_handle The advertising handle that should stop advertising. + * + * @retval ::NRF_SUCCESS The BLE stack has stopped advertising. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE Invalid advertising handle. + * @retval ::NRF_ERROR_INVALID_STATE The advertising handle is not advertising. + */ +SVCALL(SD_BLE_GAP_ADV_STOP, uint32_t, sd_ble_gap_adv_stop(uint8_t adv_handle)); + + + +/**@brief Update connection parameters. + * + * @details In the central role this will initiate a Link Layer connection parameter update procedure, + * otherwise in the peripheral role, this will send the corresponding L2CAP request and wait for + * the central to perform the procedure. In both cases, and regardless of success or failure, the application + * will be informed of the result with a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE event. + * + * @details This function can be used as a central both to reply to a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST or to start the procedure unrequested. + * + * @events + * @event{@ref BLE_GAP_EVT_CONN_PARAM_UPDATE, Result of the connection parameter update procedure.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CPU_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} + * @mmsc{@ref BLE_GAP_MULTILINK_CPU_MSC} + * @mmsc{@ref BLE_GAP_MULTILINK_CTRL_PROC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_CPU_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_conn_params Pointer to desired connection parameters. If NULL is provided on a peripheral role, + * the parameters in the PPCP characteristic of the GAP service will be used instead. + * If NULL is provided on a central role and in response to a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST, the peripheral request will be rejected + * + * @retval ::NRF_SUCCESS The Connection Update procedure has been started successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::NRF_ERROR_BUSY Procedure already in progress, wait for pending procedures to complete and retry. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + */ +SVCALL(SD_BLE_GAP_CONN_PARAM_UPDATE, uint32_t, sd_ble_gap_conn_param_update(uint16_t conn_handle, ble_gap_conn_params_t const *p_conn_params)); + + +/**@brief Disconnect (GAP Link Termination). + * + * @details This call initiates the disconnection procedure, and its completion will be communicated to the application + * with a @ref BLE_GAP_EVT_DISCONNECTED event. + * + * @events + * @event{@ref BLE_GAP_EVT_DISCONNECTED, Generated when disconnection procedure is complete.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CONN_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] hci_status_code HCI status code, see @ref BLE_HCI_STATUS_CODES (accepted values are @ref BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION and @ref BLE_HCI_CONN_INTERVAL_UNACCEPTABLE). + * + * @retval ::NRF_SUCCESS The disconnection procedure has been started successfully. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation (disconnection is already in progress). + */ +SVCALL(SD_BLE_GAP_DISCONNECT, uint32_t, sd_ble_gap_disconnect(uint16_t conn_handle, uint8_t hci_status_code)); + + +/**@brief Set the radio's transmit power. + * + * @param[in] role The role to set the transmit power for, see @ref BLE_GAP_TX_POWER_ROLES for + * possible roles. + * @param[in] handle The handle parameter is interpreted depending on role: + * - If role is @ref BLE_GAP_TX_POWER_ROLE_CONN, this value is the specific connection handle. + * - If role is @ref BLE_GAP_TX_POWER_ROLE_ADV, the advertising set identified with the advertising handle, + * will use the specified transmit power, and include it in the advertising packet headers if + * @ref ble_gap_adv_properties_t::include_tx_power set. + * - For all other roles handle is ignored. + * @param[in] tx_power Radio transmit power in dBm (see note for accepted values). + * + * @note Supported tx_power values: -40dBm, -20dBm, -16dBm, -12dBm, -8dBm, -4dBm, 0dBm, +3dBm and +4dBm. + * @note The initiator will have the same transmit power as the scanner. + * @note When a connection is created it will inherit the transmit power from the initiator or + * advertiser leading to the connection. + * + * @retval ::NRF_SUCCESS Successfully changed the transmit power. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE Advertising handle not found. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_TX_POWER_SET, uint32_t, sd_ble_gap_tx_power_set(uint8_t role, uint16_t handle, int8_t tx_power)); + + +/**@brief Set GAP Appearance value. + * + * @param[in] appearance Appearance (16-bit), see @ref BLE_APPEARANCES. + * + * @retval ::NRF_SUCCESS Appearance value set successfully. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + */ +SVCALL(SD_BLE_GAP_APPEARANCE_SET, uint32_t, sd_ble_gap_appearance_set(uint16_t appearance)); + + +/**@brief Get GAP Appearance value. + * + * @param[out] p_appearance Pointer to appearance (16-bit) to be filled in, see @ref BLE_APPEARANCES. + * + * @retval ::NRF_SUCCESS Appearance value retrieved successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + */ +SVCALL(SD_BLE_GAP_APPEARANCE_GET, uint32_t, sd_ble_gap_appearance_get(uint16_t *p_appearance)); + + +/**@brief Set GAP Peripheral Preferred Connection Parameters. + * + * @param[in] p_conn_params Pointer to a @ref ble_gap_conn_params_t structure with the desired parameters. + * + * @retval ::NRF_SUCCESS Peripheral Preferred Connection Parameters set successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + */ +SVCALL(SD_BLE_GAP_PPCP_SET, uint32_t, sd_ble_gap_ppcp_set(ble_gap_conn_params_t const *p_conn_params)); + + +/**@brief Get GAP Peripheral Preferred Connection Parameters. + * + * @param[out] p_conn_params Pointer to a @ref ble_gap_conn_params_t structure where the parameters will be stored. + * + * @retval ::NRF_SUCCESS Peripheral Preferred Connection Parameters retrieved successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + */ +SVCALL(SD_BLE_GAP_PPCP_GET, uint32_t, sd_ble_gap_ppcp_get(ble_gap_conn_params_t *p_conn_params)); + + +/**@brief Set GAP device name. + * + * @note If the device name is located in application flash memory (see @ref ble_gap_cfg_device_name_t), + * it cannot be changed. Then @ref NRF_ERROR_FORBIDDEN will be returned. + * + * @param[in] p_write_perm Write permissions for the Device Name characteristic, see @ref ble_gap_conn_sec_mode_t. + * @param[in] p_dev_name Pointer to a UTF-8 encoded, non NULL-terminated string. + * @param[in] len Length of the UTF-8, non NULL-terminated string pointed to by p_dev_name in octets (must be smaller or equal than @ref BLE_GAP_DEVNAME_MAX_LEN). + * + * @retval ::NRF_SUCCESS GAP device name and permissions set successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. + * @retval ::NRF_ERROR_FORBIDDEN Device name is not writable. + */ +SVCALL(SD_BLE_GAP_DEVICE_NAME_SET, uint32_t, sd_ble_gap_device_name_set(ble_gap_conn_sec_mode_t const *p_write_perm, uint8_t const *p_dev_name, uint16_t len)); + + +/**@brief Get GAP device name. + * + * @note If the device name is longer than the size of the supplied buffer, + * p_len will return the complete device name length, + * and not the number of bytes actually returned in p_dev_name. + * The application may use this information to allocate a suitable buffer size. + * + * @param[out] p_dev_name Pointer to an empty buffer where the UTF-8 non NULL-terminated string will be placed. Set to NULL to obtain the complete device name length. + * @param[in,out] p_len Length of the buffer pointed by p_dev_name, complete device name length on output. + * + * @retval ::NRF_SUCCESS GAP device name retrieved successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. + */ +SVCALL(SD_BLE_GAP_DEVICE_NAME_GET, uint32_t, sd_ble_gap_device_name_get(uint8_t *p_dev_name, uint16_t *p_len)); + + +/**@brief Initiate the GAP Authentication procedure. + * + * @details In the central role, this function will send an SMP Pairing Request (or an SMP Pairing Failed if rejected), + * otherwise in the peripheral role, an SMP Security Request will be sent. + * + * @events + * @event{Depending on the security parameters set and the packet exchanges with the peer\, the following events may be generated:} + * @event{@ref BLE_GAP_EVT_SEC_PARAMS_REQUEST} + * @event{@ref BLE_GAP_EVT_SEC_INFO_REQUEST} + * @event{@ref BLE_GAP_EVT_PASSKEY_DISPLAY} + * @event{@ref BLE_GAP_EVT_KEY_PRESSED} + * @event{@ref BLE_GAP_EVT_AUTH_KEY_REQUEST} + * @event{@ref BLE_GAP_EVT_LESC_DHKEY_REQUEST} + * @event{@ref BLE_GAP_EVT_CONN_SEC_UPDATE} + * @event{@ref BLE_GAP_EVT_AUTH_STATUS} + * @event{@ref BLE_GAP_EVT_TIMEOUT} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_SEC_REQ_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_SEC_REQ_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_sec_params Pointer to the @ref ble_gap_sec_params_t structure with the security parameters to be used during the pairing or bonding procedure. + * In the peripheral role, only the bond, mitm, lesc and keypress fields of this structure are used. + * In the central role, this pointer may be NULL to reject a Security Request. + * + * @retval ::NRF_SUCCESS Successfully initiated authentication procedure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::NRF_ERROR_NO_MEM The maximum number of authentication procedures that can run in parallel for the given role is reached. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED Setting of sign or link fields in @ref ble_gap_sec_kdist_t not supported. + * @retval ::NRF_ERROR_TIMEOUT A SMP timeout has occurred, and further SMP operations on this link is prohibited. + */ +SVCALL(SD_BLE_GAP_AUTHENTICATE, uint32_t, sd_ble_gap_authenticate(uint16_t conn_handle, ble_gap_sec_params_t const *p_sec_params)); + + +/**@brief Reply with GAP security parameters. + * + * @details This function is only used to reply to a @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. + * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. + * + * @events + * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_JW_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_PERIPH_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_CENTRAL_OOB_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_CONFIRM_FAIL_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_KS_TOO_SMALL_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_APP_ERROR_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_REMOTE_PAIRING_FAIL_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_TIMEOUT_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] sec_status Security status, see @ref BLE_GAP_SEC_STATUS. + * @param[in] p_sec_params Pointer to a @ref ble_gap_sec_params_t security parameters structure. In the central role this must be set to NULL, as the parameters have + * already been provided during a previous call to @ref sd_ble_gap_authenticate. + * @param[in,out] p_sec_keyset Pointer to a @ref ble_gap_sec_keyset_t security keyset structure. Any keys generated and/or distributed as a result of the ongoing security procedure + * will be stored into the memory referenced by the pointers inside this structure. The keys will be stored and available to the application + * upon reception of a @ref BLE_GAP_EVT_AUTH_STATUS event. + * Note that the SoftDevice expects the application to provide memory for storing the + * peer's keys. So it must be ensured that the relevant pointers inside this structure are not NULL. The pointers to the local key + * can, however, be NULL, in which case, the local key data will not be available to the application upon reception of the + * @ref BLE_GAP_EVT_AUTH_STATUS event. + * + * @retval ::NRF_SUCCESS Successfully accepted security parameter from the application. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED Setting of sign or link fields in @ref ble_gap_sec_kdist_t not supported. + */ +SVCALL(SD_BLE_GAP_SEC_PARAMS_REPLY, uint32_t, sd_ble_gap_sec_params_reply(uint16_t conn_handle, uint8_t sec_status, ble_gap_sec_params_t const *p_sec_params, ble_gap_sec_keyset_t const *p_sec_keyset)); + + +/**@brief Reply with an authentication key. + * + * @details This function is only used to reply to a @ref BLE_GAP_EVT_AUTH_KEY_REQUEST or a @ref BLE_GAP_EVT_PASSKEY_DISPLAY, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. + * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. + * + * @events + * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_CENTRAL_OOB_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] key_type See @ref BLE_GAP_AUTH_KEY_TYPES. + * @param[in] p_key If key type is @ref BLE_GAP_AUTH_KEY_TYPE_NONE, then NULL. + * If key type is @ref BLE_GAP_AUTH_KEY_TYPE_PASSKEY, then a 6-byte ASCII string (digit 0..9 only, no NULL termination) + * or NULL when confirming LE Secure Connections Numeric Comparison. + * If key type is @ref BLE_GAP_AUTH_KEY_TYPE_OOB, then a 16-byte OOB key value in little-endian format. + * + * @retval ::NRF_SUCCESS Authentication key successfully set. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_AUTH_KEY_REPLY, uint32_t, sd_ble_gap_auth_key_reply(uint16_t conn_handle, uint8_t key_type, uint8_t const *p_key)); + + +/**@brief Reply with an LE Secure connections DHKey. + * + * @details This function is only used to reply to a @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. + * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. + * + * @events + * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_dhkey LE Secure Connections DHKey. + * + * @retval ::NRF_SUCCESS DHKey successfully set. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_LESC_DHKEY_REPLY, uint32_t, sd_ble_gap_lesc_dhkey_reply(uint16_t conn_handle, ble_gap_lesc_dhkey_t const *p_dhkey)); + + +/**@brief Notify the peer of a local keypress. + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] kp_not See @ref BLE_GAP_KP_NOT_TYPES. + * + * @retval ::NRF_SUCCESS Keypress notification successfully queued for transmission. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Either not entering a passkey or keypresses have not been enabled by both peers. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_BUSY The BLE stack is busy. Retry at later time. + */ +SVCALL(SD_BLE_GAP_KEYPRESS_NOTIFY, uint32_t, sd_ble_gap_keypress_notify(uint16_t conn_handle, uint8_t kp_not)); + + +/**@brief Generate a set of OOB data to send to a peer out of band. + * + * @note The @ref ble_gap_addr_t included in the OOB data returned will be the currently active one (or, if a connection has already been established, + * the one used during connection setup). The application may manually overwrite it with an updated value. + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. Can be @ref BLE_CONN_HANDLE_INVALID if a BLE connection has not been established yet. + * @param[in] p_pk_own LE Secure Connections local P-256 Public Key. + * @param[out] p_oobd_own The OOB data to be sent out of band to a peer. + * + * @retval ::NRF_SUCCESS OOB data successfully generated. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_LESC_OOB_DATA_GET, uint32_t, sd_ble_gap_lesc_oob_data_get(uint16_t conn_handle, ble_gap_lesc_p256_pk_t const *p_pk_own, ble_gap_lesc_oob_data_t *p_oobd_own)); + +/**@brief Provide the OOB data sent/received out of band. + * + * @note An authentication procedure with OOB selected as an algorithm must be in progress when calling this function. + * @note A @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST event with the oobd_req set to 1 must have been received prior to calling this function. + * + * @events + * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_oobd_own The OOB data sent out of band to a peer or NULL if the peer has not received OOB data. + * Must correspond to @ref ble_gap_sec_params_t::oob flag in @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST. + * @param[in] p_oobd_peer The OOB data received out of band from a peer or NULL if none received. + * Must correspond to @ref ble_gap_sec_params_t::oob flag in @ref sd_ble_gap_authenticate in the central role + * or @ref sd_ble_gap_sec_params_reply in the peripheral role. + * + * @retval ::NRF_SUCCESS OOB data accepted. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_LESC_OOB_DATA_SET, uint32_t, sd_ble_gap_lesc_oob_data_set(uint16_t conn_handle, ble_gap_lesc_oob_data_t const *p_oobd_own, ble_gap_lesc_oob_data_t const *p_oobd_peer)); + + +/**@brief Initiate GAP Encryption procedure. + * + * @details In the central role, this function will initiate the encryption procedure using the encryption information provided. + * + * @events + * @event{@ref BLE_GAP_EVT_CONN_SEC_UPDATE, The connection security has been updated.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_ENC_MSC} + * @mmsc{@ref BLE_GAP_MULTILINK_CTRL_PROC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_SEC_REQ_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_master_id Pointer to a @ref ble_gap_master_id_t master identification structure. + * @param[in] p_enc_info Pointer to a @ref ble_gap_enc_info_t encryption information structure. + * + * @retval ::NRF_SUCCESS Successfully initiated authentication procedure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::BLE_ERROR_INVALID_ROLE Operation is not supported in the Peripheral role. + * @retval ::NRF_ERROR_BUSY Procedure already in progress or not allowed at this time, wait for pending procedures to complete and retry. + */ +SVCALL(SD_BLE_GAP_ENCRYPT, uint32_t, sd_ble_gap_encrypt(uint16_t conn_handle, ble_gap_master_id_t const *p_master_id, ble_gap_enc_info_t const *p_enc_info)); + + +/**@brief Reply with GAP security information. + * + * @details This function is only used to reply to a @ref BLE_GAP_EVT_SEC_INFO_REQUEST, calling it at other times will result in @ref NRF_ERROR_INVALID_STATE. + * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. + * @note Data signing is not yet supported, and p_sign_info must therefore be NULL. + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_ENC_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_enc_info Pointer to a @ref ble_gap_enc_info_t encryption information structure. May be NULL to signal none is available. + * @param[in] p_id_info Pointer to a @ref ble_gap_irk_t identity information structure. May be NULL to signal none is available. + * @param[in] p_sign_info Pointer to a @ref ble_gap_sign_info_t signing information structure. May be NULL to signal none is available. + * + * @retval ::NRF_SUCCESS Successfully accepted security information. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_SEC_INFO_REPLY, uint32_t, sd_ble_gap_sec_info_reply(uint16_t conn_handle, ble_gap_enc_info_t const *p_enc_info, ble_gap_irk_t const *p_id_info, ble_gap_sign_info_t const *p_sign_info)); + + +/**@brief Get the current connection security. + * + * @param[in] conn_handle Connection handle. + * @param[out] p_conn_sec Pointer to a @ref ble_gap_conn_sec_t structure to be filled in. + * + * @retval ::NRF_SUCCESS Current connection security successfully retrieved. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_CONN_SEC_GET, uint32_t, sd_ble_gap_conn_sec_get(uint16_t conn_handle, ble_gap_conn_sec_t *p_conn_sec)); + + +/**@brief Start reporting the received signal strength to the application. + * + * A new event is reported whenever the RSSI value changes, until @ref sd_ble_gap_rssi_stop is called. + * + * @events + * @event{@ref BLE_GAP_EVT_RSSI_CHANGED, New RSSI data available. How often the event is generated is + * dependent on the settings of the threshold_dbm + * and skip_count input parameters.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} + * @mmsc{@ref BLE_GAP_RSSI_FILT_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] threshold_dbm Minimum change in dBm before triggering the @ref BLE_GAP_EVT_RSSI_CHANGED event. Events are disabled if threshold_dbm equals @ref BLE_GAP_RSSI_THRESHOLD_INVALID. + * @param[in] skip_count Number of RSSI samples with a change of threshold_dbm or more before sending a new @ref BLE_GAP_EVT_RSSI_CHANGED event. + * + * @retval ::NRF_SUCCESS Successfully activated RSSI reporting. + * @retval ::NRF_ERROR_INVALID_STATE RSSI reporting is already ongoing. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_RSSI_START, uint32_t, sd_ble_gap_rssi_start(uint16_t conn_handle, uint8_t threshold_dbm, uint8_t skip_count)); + + +/**@brief Stop reporting the received signal strength. + * + * @note An RSSI change detected before the call but not yet received by the application + * may be reported after @ref sd_ble_gap_rssi_stop has been called. + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} + * @mmsc{@ref BLE_GAP_RSSI_FILT_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * + * @retval ::NRF_SUCCESS Successfully deactivated RSSI reporting. + * @retval ::NRF_ERROR_INVALID_STATE RSSI reporting is not ongoing. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_RSSI_STOP, uint32_t, sd_ble_gap_rssi_stop(uint16_t conn_handle)); + + +/**@brief Get the received signal strength for the last connection event. + * + * @ref sd_ble_gap_rssi_start must be called to start reporting RSSI before using this function. @ref NRF_ERROR_NOT_FOUND + * will be returned until RSSI was sampled for the first time after calling @ref sd_ble_gap_rssi_start. + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[out] p_rssi Pointer to the location where the RSSI measurement shall be stored. + * @param[out] p_ch_index Pointer to the location where Channel Index for the RSSI measurement shall be stored. + * + * @retval ::NRF_SUCCESS Successfully read the RSSI. + * @retval ::NRF_ERROR_NOT_FOUND No sample is available. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_INVALID_STATE RSSI reporting is not ongoing. + */ +SVCALL(SD_BLE_GAP_RSSI_GET, uint32_t, sd_ble_gap_rssi_get(uint16_t conn_handle, int8_t *p_rssi, uint8_t *p_ch_index)); + + +/**@brief Start or continue scanning (GAP Discovery procedure, Observer Procedure). + * + * @note A call to this function will require the application to keep the memory pointed by + * p_adv_report_buffer alive until the buffer is released. The buffer is released when the scanner is stopped + * or when this function is called with another buffer. + * + * @note The scanner will automatically stop in the following cases: + * - @ref sd_ble_gap_scan_stop is called. + * - @ref sd_ble_gap_connect is called. + * - A @ref BLE_GAP_EVT_TIMEOUT with source set to @ref BLE_GAP_TIMEOUT_SRC_SCAN is received. + * - When a @ref BLE_GAP_EVT_ADV_REPORT event is received and @ref ble_gap_adv_report_type_t::status is not set to + * @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA. In this case scanning is only paused to let the application + * access received data. The application must call this function to continue scanning, or call @ref sd_ble_gap_scan_stop + * to stop scanning. + * + * @note If a @ref BLE_GAP_EVT_ADV_REPORT event is received with @ref ble_gap_adv_report_type_t::status set to + * @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA, the scanner will continue scanning, and the application will + * receive more reports from this advertising event. The following reports will include the old and new received data. + * The application can stop the scanner from receiving more packets from this advertising event by calling this function. + * This might be useful when receiving data from extended advertising events where @ref ble_gap_evt_adv_report_t::aux_pointer + * is large. + * + * @events + * @event{@ref BLE_GAP_EVT_ADV_REPORT, An advertising or scan response packet has been received.} + * @event{@ref BLE_GAP_EVT_TIMEOUT, Scanner has timed out.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_SCAN_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @param[in] p_scan_params Pointer to scan parameters structure. When this function is used to continue + * scanning, this parameter must be NULL. + * @param[in] p_adv_report_buffer Pointer to buffer used to store incoming advertising data. + * The memory pointed to should be kept alive until the scanning is stopped. + * See @ref BLE_GAP_SCAN_BUFFER_SIZE for minimum and maximum buffer size. + * If the scanner receives advertising data larger than can be stored in the buffer, + * a @ref BLE_GAP_EVT_ADV_REPORT will be raised with @ref ble_gap_adv_report_type_t::status + * set to @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_TRUNCATED. + * + * @retval ::NRF_SUCCESS Successfully initiated scanning procedure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Either: + * - Scanning is already ongoing and p_scan_params was not NULL + * - Scanning is not running and p_scan_params was NULL. + * - The scanner has timed out when this function is called to continue scanning. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. See @ref ble_gap_scan_params_t. + * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported parameters supplied. See @ref ble_gap_scan_params_t. + * @retval ::NRF_ERROR_INVALID_LENGTH The provided buffer length is invalid. See @ref BLE_GAP_SCAN_BUFFER_MIN. + * @retval ::NRF_ERROR_RESOURCES Not enough BLE role slots available. + * Stop one or more currently active roles (Central, Peripheral or Broadcaster) and try again + * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported PHYs supplied to the call. + */ +SVCALL(SD_BLE_GAP_SCAN_START, uint32_t, sd_ble_gap_scan_start(ble_gap_scan_params_t const *p_scan_params, ble_data_t const * p_adv_report_buffer)); + + +/**@brief Stop scanning (GAP Discovery procedure, Observer Procedure). + * + * @note The buffer provided in @ref sd_ble_gap_scan_start is released. + * + * @mscs + * @mmsc{@ref BLE_GAP_SCAN_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Successfully stopped scanning procedure. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Not in the scanning state. + */ +SVCALL(SD_BLE_GAP_SCAN_STOP, uint32_t, sd_ble_gap_scan_stop(void)); + + +/**@brief Create a connection (GAP Link Establishment). + * + * @note If a scanning procedure is currently in progress it will be automatically stopped when calling this function. + * The scanning procedure will be stopped even if the function returns an error. + * + * @mscs + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_CONN_PRIV_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_CONN_MSC} + * @endmscs + * + * @param[in] p_peer_addr Pointer to peer identity address. If @ref ble_gap_scan_params_t::filter_policy is set to use + * whitelist, then p_peer_addr is ignored. + * @param[in] p_scan_params Pointer to scan parameters structure. + * @param[in] p_conn_params Pointer to desired connection parameters. + * @param[in] conn_cfg_tag Tag identifying a configuration set by @ref sd_ble_cfg_set or + * @ref BLE_CONN_CFG_TAG_DEFAULT to use the default connection configuration. + * + * @retval ::NRF_SUCCESS Successfully initiated connection procedure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid parameter(s) pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * - Invalid parameter(s) in p_scan_params or p_conn_params. + * - Use of whitelist requested but whitelist has not been set, see @ref sd_ble_gap_whitelist_set. + * - Peer address was not present in the device identity list, see @ref sd_ble_gap_device_identities_set. + * @retval ::NRF_ERROR_NOT_FOUND conn_cfg_tag not found. + * @retval ::NRF_ERROR_INVALID_STATE The SoftDevice is in an invalid state to perform this operation. This may be due to an + * existing locally initiated connect procedure, which must complete before initiating again. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid Peer address. + * @retval ::NRF_ERROR_CONN_COUNT The limit of available connections has been reached. + * @retval ::NRF_ERROR_RESOURCES Either: + * - Not enough BLE role slots available. + * Stop one or more currently active roles (Central, Peripheral or Observer) and try again. + * - The event_length parameter associated with conn_cfg_tag is too small to be able to + * establish a connection on the selected @ref ble_gap_scan_params_t::scan_phys. + * Use @ref sd_ble_cfg_set to increase the event length. + * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported PHYs supplied to the call. + */ +SVCALL(SD_BLE_GAP_CONNECT, uint32_t, sd_ble_gap_connect(ble_gap_addr_t const *p_peer_addr, ble_gap_scan_params_t const *p_scan_params, ble_gap_conn_params_t const *p_conn_params, uint8_t conn_cfg_tag)); + + +/**@brief Cancel a connection establishment. + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_CONN_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Successfully canceled an ongoing connection procedure. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + */ +SVCALL(SD_BLE_GAP_CONNECT_CANCEL, uint32_t, sd_ble_gap_connect_cancel(void)); + + +/**@brief Initiate or respond to a PHY Update Procedure + * + * @details This function is used to initiate or respond to a PHY Update Procedure. It will always + * generate a @ref BLE_GAP_EVT_PHY_UPDATE event if successfully executed. + * If this function is used to initiate a PHY Update procedure and the only option + * provided in @ref ble_gap_phys_t::tx_phys and @ref ble_gap_phys_t::rx_phys is the + * currently active PHYs in the respective directions, the SoftDevice will generate a + * @ref BLE_GAP_EVT_PHY_UPDATE with the current PHYs set and will not initiate the + * procedure in the Link Layer. + * + * If @ref ble_gap_phys_t::tx_phys or @ref ble_gap_phys_t::rx_phys is @ref BLE_GAP_PHY_AUTO, + * then the stack will select PHYs based on the peer's PHY preferences and the local link + * configuration. The PHY Update procedure will for this case result in a PHY combination + * that respects the time constraints configured with @ref sd_ble_cfg_set and the current + * link layer data length. + * + * When acting as a central, the SoftDevice will select the fastest common PHY in each direction. + * + * If the peer does not support the PHY Update Procedure, then the resulting + * @ref BLE_GAP_EVT_PHY_UPDATE event will have a status set to + * @ref BLE_HCI_UNSUPPORTED_REMOTE_FEATURE. + * + * If the PHY procedure was rejected by the peer due to a procedure collision, the status + * will be @ref BLE_HCI_STATUS_CODE_LMP_ERROR_TRANSACTION_COLLISION or + * @ref BLE_HCI_DIFFERENT_TRANSACTION_COLLISION. + * If the peer responds to the PHY Update procedure with invalid parameters, the status + * will be @ref BLE_HCI_STATUS_CODE_INVALID_LMP_PARAMETERS. + * If the PHY procedure was rejected by the peer for a different reason, the status will + * contain the reason as specified by the peer. + * + * @events + * @event{@ref BLE_GAP_EVT_PHY_UPDATE, Result of the PHY Update Procedure.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_PHY_UPDATE} + * @mmsc{@ref BLE_GAP_PERIPHERAL_PHY_UPDATE} + * @endmscs + * + * @param[in] conn_handle Connection handle to indicate the connection for which the PHY Update is requested. + * @param[in] p_gap_phys Pointer to PHY structure. + * + * @retval ::NRF_SUCCESS Successfully requested a PHY Update. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported PHYs supplied to the call. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::NRF_ERROR_BUSY Procedure is already in progress or not allowed at this time. Process pending events and wait for the pending procedure to complete and retry. + * + */ +SVCALL(SD_BLE_GAP_PHY_UPDATE, uint32_t, sd_ble_gap_phy_update(uint16_t conn_handle, ble_gap_phys_t const *p_gap_phys)); + + +/**@brief Initiate or respond to a Data Length Update Procedure. + * + * @note If the application uses @ref BLE_GAP_DATA_LENGTH_AUTO for one or more members of + * p_dl_params, the SoftDevice will choose the highest value supported in current + * configuration and connection parameters. + * + * @param[in] conn_handle Connection handle. + * @param[in] p_dl_params Pointer to local parameters to be used in Data Length Update + * Procedure. Set any member to @ref BLE_GAP_DATA_LENGTH_AUTO to let + * the SoftDevice automatically decide the value for that member. + * Set to NULL to use automatic values for all members. + * @param[out] p_dl_limitation Pointer to limitation to be written when local device does not + * have enough resources or does not support the requested Data Length + * Update parameters. Ignored if NULL. + * + * @mscs + * @mmsc{@ref BLE_GAP_DATA_LENGTH_UPDATE_PROCEDURE_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Successfully set Data Length Extension initiation/response parameters. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameters supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED The requested parameters are not supported by the SoftDevice. Inspect + * p_dl_limitation to see which parameter is not supported. + * @retval ::NRF_ERROR_RESOURCES The connection event length configured for this link is not sufficient for the requested parameters. + * Use @ref sd_ble_cfg_set with @ref BLE_CONN_CFG_GAP to increase the connection event length. + * Inspect p_dl_limitation to see where the limitation is. + * @retval ::NRF_ERROR_BUSY Peer has already initiated a Data Length Update Procedure. Process the + * pending @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST event to respond. + */ +SVCALL(SD_BLE_GAP_DATA_LENGTH_UPDATE, uint32_t, sd_ble_gap_data_length_update(uint16_t conn_handle, ble_gap_data_length_params_t const *p_dl_params, ble_gap_data_length_limitation_t *p_dl_limitation)); + +/**@brief Start the Quality of Service (QoS) channel survey module. + * + * @details The channel survey module provides measurements of the energy levels on + * the Bluetooth Low Energy channels. When the module is enabled, @ref BLE_GAP_EVT_QOS_CHANNEL_SURVEY_REPORT + * events will periodically report the measured energy levels for each channel. + * + * @note The measurements are scheduled with lower priority than other Bluetooth Low Energy roles, + * Radio Timeslot API events and Flash API events. + * + * @note The channel survey module will attempt to do measurements so that the average interval + * between measurements will be interval_us. However due to the channel survey module + * having the lowest priority of all roles and modules, this may not be possible. In that + * case fewer than expected channel survey reports may be given. + * + * @note In order to use the channel survey module, @ref ble_gap_cfg_role_count_t::qos_channel_survey_role_available + * must be set. This is done using @ref sd_ble_cfg_set. + * + * @param[in] interval_us Requested average interval for the measurements and reports. See + * @ref BLE_GAP_QOS_CHANNEL_SURVEY_INTERVALS for valid ranges. If set + * to @ref BLE_GAP_QOS_CHANNEL_SURVEY_INTERVAL_CONTINUOUS, the channel + * survey role will be scheduled at every available opportunity. + * + * @retval ::NRF_SUCCESS The module is successfully started. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter supplied. interval_us is out of the + * allowed range. + * @retval ::NRF_ERROR_INVALID_STATE Trying to start the module when already running. + * @retval ::NRF_ERROR_RESOURCES The channel survey module is not available to the application. + * Set @ref ble_gap_cfg_role_count_t::qos_channel_survey_role_available using + * @ref sd_ble_cfg_set. + */ +SVCALL(SD_BLE_GAP_QOS_CHANNEL_SURVEY_START, uint32_t, sd_ble_gap_qos_channel_survey_start(uint32_t interval_us)); + +/**@brief Stop the Quality of Service (QoS) channel survey module. + * + * @retval ::NRF_SUCCESS The module is successfully stopped. + * @retval ::NRF_ERROR_INVALID_STATE Trying to stop the module when it is not running. + */ +SVCALL(SD_BLE_GAP_QOS_CHANNEL_SURVEY_STOP, uint32_t, sd_ble_gap_qos_channel_survey_stop(void)); + + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // BLE_GAP_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_gatt.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_gatt.h new file mode 100644 index 00000000000..98a7a150bfc --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_gatt.h @@ -0,0 +1,228 @@ +/* + * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_GATT Generic Attribute Profile (GATT) Common + @{ + @brief Common definitions and prototypes for the GATT interfaces. + */ + +#ifndef BLE_GATT_H__ +#define BLE_GATT_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_hci.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_GATT_DEFINES Defines + * @{ */ + +/** @brief Default ATT MTU, in bytes. */ +#define BLE_GATT_ATT_MTU_DEFAULT 23 + +/**@brief Invalid Attribute Handle. */ +#define BLE_GATT_HANDLE_INVALID 0x0000 + +/**@brief First Attribute Handle. */ +#define BLE_GATT_HANDLE_START 0x0001 + +/**@brief Last Attribute Handle. */ +#define BLE_GATT_HANDLE_END 0xFFFF + +/** @defgroup BLE_GATT_TIMEOUT_SOURCES GATT Timeout sources + * @{ */ +#define BLE_GATT_TIMEOUT_SRC_PROTOCOL 0x00 /**< ATT Protocol timeout. */ +/** @} */ + +/** @defgroup BLE_GATT_WRITE_OPS GATT Write operations + * @{ */ +#define BLE_GATT_OP_INVALID 0x00 /**< Invalid Operation. */ +#define BLE_GATT_OP_WRITE_REQ 0x01 /**< Write Request. */ +#define BLE_GATT_OP_WRITE_CMD 0x02 /**< Write Command. */ +#define BLE_GATT_OP_SIGN_WRITE_CMD 0x03 /**< Signed Write Command. */ +#define BLE_GATT_OP_PREP_WRITE_REQ 0x04 /**< Prepare Write Request. */ +#define BLE_GATT_OP_EXEC_WRITE_REQ 0x05 /**< Execute Write Request. */ +/** @} */ + +/** @defgroup BLE_GATT_EXEC_WRITE_FLAGS GATT Execute Write flags + * @{ */ +#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_CANCEL 0x00 /**< Cancel prepared write. */ +#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_WRITE 0x01 /**< Execute prepared write. */ +/** @} */ + +/** @defgroup BLE_GATT_HVX_TYPES GATT Handle Value operations + * @{ */ +#define BLE_GATT_HVX_INVALID 0x00 /**< Invalid Operation. */ +#define BLE_GATT_HVX_NOTIFICATION 0x01 /**< Handle Value Notification. */ +#define BLE_GATT_HVX_INDICATION 0x02 /**< Handle Value Indication. */ +/** @} */ + +/** @defgroup BLE_GATT_STATUS_CODES GATT Status Codes + * @{ */ +#define BLE_GATT_STATUS_SUCCESS 0x0000 /**< Success. */ +#define BLE_GATT_STATUS_UNKNOWN 0x0001 /**< Unknown or not applicable status. */ +#define BLE_GATT_STATUS_ATTERR_INVALID 0x0100 /**< ATT Error: Invalid Error Code. */ +#define BLE_GATT_STATUS_ATTERR_INVALID_HANDLE 0x0101 /**< ATT Error: Invalid Attribute Handle. */ +#define BLE_GATT_STATUS_ATTERR_READ_NOT_PERMITTED 0x0102 /**< ATT Error: Read not permitted. */ +#define BLE_GATT_STATUS_ATTERR_WRITE_NOT_PERMITTED 0x0103 /**< ATT Error: Write not permitted. */ +#define BLE_GATT_STATUS_ATTERR_INVALID_PDU 0x0104 /**< ATT Error: Used in ATT as Invalid PDU. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHENTICATION 0x0105 /**< ATT Error: Authenticated link required. */ +#define BLE_GATT_STATUS_ATTERR_REQUEST_NOT_SUPPORTED 0x0106 /**< ATT Error: Used in ATT as Request Not Supported. */ +#define BLE_GATT_STATUS_ATTERR_INVALID_OFFSET 0x0107 /**< ATT Error: Offset specified was past the end of the attribute. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHORIZATION 0x0108 /**< ATT Error: Used in ATT as Insufficient Authorization. */ +#define BLE_GATT_STATUS_ATTERR_PREPARE_QUEUE_FULL 0x0109 /**< ATT Error: Used in ATT as Prepare Queue Full. */ +#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_FOUND 0x010A /**< ATT Error: Used in ATT as Attribute not found. */ +#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_LONG 0x010B /**< ATT Error: Attribute cannot be read or written using read/write blob requests. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_ENC_KEY_SIZE 0x010C /**< ATT Error: Encryption key size used is insufficient. */ +#define BLE_GATT_STATUS_ATTERR_INVALID_ATT_VAL_LENGTH 0x010D /**< ATT Error: Invalid value size. */ +#define BLE_GATT_STATUS_ATTERR_UNLIKELY_ERROR 0x010E /**< ATT Error: Very unlikely error. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_ENCRYPTION 0x010F /**< ATT Error: Encrypted link required. */ +#define BLE_GATT_STATUS_ATTERR_UNSUPPORTED_GROUP_TYPE 0x0110 /**< ATT Error: Attribute type is not a supported grouping attribute. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_RESOURCES 0x0111 /**< ATT Error: Encrypted link required. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_BEGIN 0x0112 /**< ATT Error: Reserved for Future Use range #1 begin. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_END 0x017F /**< ATT Error: Reserved for Future Use range #1 end. */ +#define BLE_GATT_STATUS_ATTERR_APP_BEGIN 0x0180 /**< ATT Error: Application range begin. */ +#define BLE_GATT_STATUS_ATTERR_APP_END 0x019F /**< ATT Error: Application range end. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_BEGIN 0x01A0 /**< ATT Error: Reserved for Future Use range #2 begin. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_END 0x01DF /**< ATT Error: Reserved for Future Use range #2 end. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_BEGIN 0x01E0 /**< ATT Error: Reserved for Future Use range #3 begin. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_END 0x01FC /**< ATT Error: Reserved for Future Use range #3 end. */ +#define BLE_GATT_STATUS_ATTERR_CPS_CCCD_CONFIG_ERROR 0x01FD /**< ATT Common Profile and Service Error: Client Characteristic Configuration Descriptor improperly configured. */ +#define BLE_GATT_STATUS_ATTERR_CPS_PROC_ALR_IN_PROG 0x01FE /**< ATT Common Profile and Service Error: Procedure Already in Progress. */ +#define BLE_GATT_STATUS_ATTERR_CPS_OUT_OF_RANGE 0x01FF /**< ATT Common Profile and Service Error: Out Of Range. */ +/** @} */ + + +/** @defgroup BLE_GATT_CPF_FORMATS Characteristic Presentation Formats + * @note Found at http://developer.bluetooth.org/gatt/descriptors/Pages/DescriptorViewer.aspx?u=org.bluetooth.descriptor.gatt.characteristic_presentation_format.xml + * @{ */ +#define BLE_GATT_CPF_FORMAT_RFU 0x00 /**< Reserved For Future Use. */ +#define BLE_GATT_CPF_FORMAT_BOOLEAN 0x01 /**< Boolean. */ +#define BLE_GATT_CPF_FORMAT_2BIT 0x02 /**< Unsigned 2-bit integer. */ +#define BLE_GATT_CPF_FORMAT_NIBBLE 0x03 /**< Unsigned 4-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT8 0x04 /**< Unsigned 8-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT12 0x05 /**< Unsigned 12-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT16 0x06 /**< Unsigned 16-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT24 0x07 /**< Unsigned 24-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT32 0x08 /**< Unsigned 32-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT48 0x09 /**< Unsigned 48-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT64 0x0A /**< Unsigned 64-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT128 0x0B /**< Unsigned 128-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT8 0x0C /**< Signed 2-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT12 0x0D /**< Signed 12-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT16 0x0E /**< Signed 16-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT24 0x0F /**< Signed 24-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT32 0x10 /**< Signed 32-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT48 0x11 /**< Signed 48-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT64 0x12 /**< Signed 64-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT128 0x13 /**< Signed 128-bit integer. */ +#define BLE_GATT_CPF_FORMAT_FLOAT32 0x14 /**< IEEE-754 32-bit floating point. */ +#define BLE_GATT_CPF_FORMAT_FLOAT64 0x15 /**< IEEE-754 64-bit floating point. */ +#define BLE_GATT_CPF_FORMAT_SFLOAT 0x16 /**< IEEE-11073 16-bit SFLOAT. */ +#define BLE_GATT_CPF_FORMAT_FLOAT 0x17 /**< IEEE-11073 32-bit FLOAT. */ +#define BLE_GATT_CPF_FORMAT_DUINT16 0x18 /**< IEEE-20601 format. */ +#define BLE_GATT_CPF_FORMAT_UTF8S 0x19 /**< UTF-8 string. */ +#define BLE_GATT_CPF_FORMAT_UTF16S 0x1A /**< UTF-16 string. */ +#define BLE_GATT_CPF_FORMAT_STRUCT 0x1B /**< Opaque Structure. */ +/** @} */ + +/** @defgroup BLE_GATT_CPF_NAMESPACES GATT Bluetooth Namespaces + * @{ + */ +#define BLE_GATT_CPF_NAMESPACE_BTSIG 0x01 /**< Bluetooth SIG defined Namespace. */ +#define BLE_GATT_CPF_NAMESPACE_DESCRIPTION_UNKNOWN 0x0000 /**< Namespace Description Unknown. */ +/** @} */ + +/** @} */ + +/** @addtogroup BLE_GATT_STRUCTURES Structures + * @{ */ + +/** + * @brief BLE GATT connection configuration parameters, set with @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_INVALID_PARAM att_mtu is smaller than @ref BLE_GATT_ATT_MTU_DEFAULT. + */ +typedef struct +{ + uint16_t att_mtu; /**< Maximum size of ATT packet the SoftDevice can send or receive. + The default and minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. + @mscs + @mmsc{@ref BLE_GATTC_MTU_EXCHANGE} + @mmsc{@ref BLE_GATTS_MTU_EXCHANGE} + @endmscs + */ +} ble_gatt_conn_cfg_t; + +/**@brief GATT Characteristic Properties. */ +typedef struct +{ + /* Standard properties */ + uint8_t broadcast :1; /**< Broadcasting of the value permitted. */ + uint8_t read :1; /**< Reading the value permitted. */ + uint8_t write_wo_resp :1; /**< Writing the value with Write Command permitted. */ + uint8_t write :1; /**< Writing the value with Write Request permitted. */ + uint8_t notify :1; /**< Notification of the value permitted. */ + uint8_t indicate :1; /**< Indications of the value permitted. */ + uint8_t auth_signed_wr :1; /**< Writing the value with Signed Write Command permitted. */ +} ble_gatt_char_props_t; + +/**@brief GATT Characteristic Extended Properties. */ +typedef struct +{ + /* Extended properties */ + uint8_t reliable_wr :1; /**< Writing the value with Queued Write operations permitted. */ + uint8_t wr_aux :1; /**< Writing the Characteristic User Description descriptor permitted. */ +} ble_gatt_char_ext_props_t; + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // BLE_GATT_H__ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_gattc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_gattc.h new file mode 100644 index 00000000000..7fb3920244d --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_gattc.h @@ -0,0 +1,715 @@ +/* + * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_GATTC Generic Attribute Profile (GATT) Client + @{ + @brief Definitions and prototypes for the GATT Client interface. + */ + +#ifndef BLE_GATTC_H__ +#define BLE_GATTC_H__ + +#include +#include "nrf.h" +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" +#include "ble_gatt.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_GATTC_ENUMERATIONS Enumerations + * @{ */ + +/**@brief GATTC API SVC numbers. */ +enum BLE_GATTC_SVCS +{ + SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER = BLE_GATTC_SVC_BASE, /**< Primary Service Discovery. */ + SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, /**< Relationship Discovery. */ + SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, /**< Characteristic Discovery. */ + SD_BLE_GATTC_DESCRIPTORS_DISCOVER, /**< Characteristic Descriptor Discovery. */ + SD_BLE_GATTC_ATTR_INFO_DISCOVER, /**< Attribute Information Discovery. */ + SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, /**< Read Characteristic Value by UUID. */ + SD_BLE_GATTC_READ, /**< Generic read. */ + SD_BLE_GATTC_CHAR_VALUES_READ, /**< Read multiple Characteristic Values. */ + SD_BLE_GATTC_WRITE, /**< Generic write. */ + SD_BLE_GATTC_HV_CONFIRM, /**< Handle Value Confirmation. */ + SD_BLE_GATTC_EXCHANGE_MTU_REQUEST, /**< Exchange MTU Request. */ +}; + +/** + * @brief GATT Client Event IDs. + */ +enum BLE_GATTC_EVTS +{ + BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP = BLE_GATTC_EVT_BASE, /**< Primary Service Discovery Response event. \n See @ref ble_gattc_evt_prim_srvc_disc_rsp_t. */ + BLE_GATTC_EVT_REL_DISC_RSP, /**< Relationship Discovery Response event. \n See @ref ble_gattc_evt_rel_disc_rsp_t. */ + BLE_GATTC_EVT_CHAR_DISC_RSP, /**< Characteristic Discovery Response event. \n See @ref ble_gattc_evt_char_disc_rsp_t. */ + BLE_GATTC_EVT_DESC_DISC_RSP, /**< Descriptor Discovery Response event. \n See @ref ble_gattc_evt_desc_disc_rsp_t. */ + BLE_GATTC_EVT_ATTR_INFO_DISC_RSP, /**< Attribute Information Response event. \n See @ref ble_gattc_evt_attr_info_disc_rsp_t. */ + BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP, /**< Read By UUID Response event. \n See @ref ble_gattc_evt_char_val_by_uuid_read_rsp_t. */ + BLE_GATTC_EVT_READ_RSP, /**< Read Response event. \n See @ref ble_gattc_evt_read_rsp_t. */ + BLE_GATTC_EVT_CHAR_VALS_READ_RSP, /**< Read multiple Response event. \n See @ref ble_gattc_evt_char_vals_read_rsp_t. */ + BLE_GATTC_EVT_WRITE_RSP, /**< Write Response event. \n See @ref ble_gattc_evt_write_rsp_t. */ + BLE_GATTC_EVT_HVX, /**< Handle Value Notification or Indication event. \n Confirm indication with @ref sd_ble_gattc_hv_confirm. \n See @ref ble_gattc_evt_hvx_t. */ + BLE_GATTC_EVT_EXCHANGE_MTU_RSP, /**< Exchange MTU Response event. \n See @ref ble_gattc_evt_exchange_mtu_rsp_t. */ + BLE_GATTC_EVT_TIMEOUT, /**< Timeout event. \n See @ref ble_gattc_evt_timeout_t. */ + BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE /**< Write without Response transmission complete. \n See @ref ble_gattc_evt_write_cmd_tx_complete_t. */ +}; + +/** @} */ + +/** @addtogroup BLE_GATTC_DEFINES Defines + * @{ */ + +/** @defgroup BLE_ERRORS_GATTC SVC return values specific to GATTC + * @{ */ +#define BLE_ERROR_GATTC_PROC_NOT_PERMITTED (NRF_GATTC_ERR_BASE + 0x000) /**< Procedure not Permitted. */ +/** @} */ + +/** @defgroup BLE_GATTC_ATTR_INFO_FORMAT Attribute Information Formats + * @{ */ +#define BLE_GATTC_ATTR_INFO_FORMAT_16BIT 1 /**< 16-bit Attribute Information Format. */ +#define BLE_GATTC_ATTR_INFO_FORMAT_128BIT 2 /**< 128-bit Attribute Information Format. */ +/** @} */ + +/** @defgroup BLE_GATTC_DEFAULTS GATT Client defaults + * @{ */ +#define BLE_GATTC_WRITE_CMD_TX_QUEUE_SIZE_DEFAULT 1 /**< Default number of Write without Response that can be queued for transmission. */ +/** @} */ + +/** @} */ + +/** @addtogroup BLE_GATTC_STRUCTURES Structures + * @{ */ + +/** + * @brief BLE GATTC connection configuration parameters, set with @ref sd_ble_cfg_set. + */ +typedef struct +{ + uint8_t write_cmd_tx_queue_size; /**< The guaranteed minimum number of Write without Response that can be queued for transmission. + The default value is @ref BLE_GATTC_WRITE_CMD_TX_QUEUE_SIZE_DEFAULT */ +} ble_gattc_conn_cfg_t; + +/**@brief Operation Handle Range. */ +typedef struct +{ + uint16_t start_handle; /**< Start Handle. */ + uint16_t end_handle; /**< End Handle. */ +} ble_gattc_handle_range_t; + + +/**@brief GATT service. */ +typedef struct +{ + ble_uuid_t uuid; /**< Service UUID. */ + ble_gattc_handle_range_t handle_range; /**< Service Handle Range. */ +} ble_gattc_service_t; + + +/**@brief GATT include. */ +typedef struct +{ + uint16_t handle; /**< Include Handle. */ + ble_gattc_service_t included_srvc; /**< Handle of the included service. */ +} ble_gattc_include_t; + + +/**@brief GATT characteristic. */ +typedef struct +{ + ble_uuid_t uuid; /**< Characteristic UUID. */ + ble_gatt_char_props_t char_props; /**< Characteristic Properties. */ + uint8_t char_ext_props : 1; /**< Extended properties present. */ + uint16_t handle_decl; /**< Handle of the Characteristic Declaration. */ + uint16_t handle_value; /**< Handle of the Characteristic Value. */ +} ble_gattc_char_t; + + +/**@brief GATT descriptor. */ +typedef struct +{ + uint16_t handle; /**< Descriptor Handle. */ + ble_uuid_t uuid; /**< Descriptor UUID. */ +} ble_gattc_desc_t; + + +/**@brief Write Parameters. */ +typedef struct +{ + uint8_t write_op; /**< Write Operation to be performed, see @ref BLE_GATT_WRITE_OPS. */ + uint8_t flags; /**< Flags, see @ref BLE_GATT_EXEC_WRITE_FLAGS. */ + uint16_t handle; /**< Handle to the attribute to be written. */ + uint16_t offset; /**< Offset in bytes. @note For WRITE_CMD and WRITE_REQ, offset must be 0. */ + uint16_t len; /**< Length of data in bytes. */ + uint8_t const *p_value; /**< Pointer to the value data. */ +} ble_gattc_write_params_t; + +/**@brief Attribute Information for 16-bit Attribute UUID. */ +typedef struct +{ + uint16_t handle; /**< Attribute handle. */ + ble_uuid_t uuid; /**< 16-bit Attribute UUID. */ +} ble_gattc_attr_info16_t; + +/**@brief Attribute Information for 128-bit Attribute UUID. */ +typedef struct +{ + uint16_t handle; /**< Attribute handle. */ + ble_uuid128_t uuid; /**< 128-bit Attribute UUID. */ +} ble_gattc_attr_info128_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Service count. */ + ble_gattc_service_t services[1]; /**< Service data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_prim_srvc_disc_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_REL_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Include count. */ + ble_gattc_include_t includes[1]; /**< Include data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_rel_disc_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Characteristic count. */ + ble_gattc_char_t chars[1]; /**< Characteristic data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_char_disc_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_DESC_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Descriptor count. */ + ble_gattc_desc_t descs[1]; /**< Descriptor data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_desc_disc_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_ATTR_INFO_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Attribute count. */ + uint8_t format; /**< Attribute information format, see @ref BLE_GATTC_ATTR_INFO_FORMAT. */ + union { + ble_gattc_attr_info16_t attr_info16[1]; /**< Attribute information for 16-bit Attribute UUID. + @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ + ble_gattc_attr_info128_t attr_info128[1]; /**< Attribute information for 128-bit Attribute UUID. + @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ + } info; /**< Attribute information union. */ +} ble_gattc_evt_attr_info_disc_rsp_t; + +/**@brief GATT read by UUID handle value pair. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + uint8_t *p_value; /**< Pointer to the Attribute Value, length is available in @ref ble_gattc_evt_char_val_by_uuid_read_rsp_t::value_len. */ +} ble_gattc_handle_value_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP. */ +typedef struct +{ + uint16_t count; /**< Handle-Value Pair Count. */ + uint16_t value_len; /**< Length of the value in Handle-Value(s) list. */ + uint8_t handle_value[1]; /**< Handle-Value(s) list. To iterate through the list use @ref sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter. + @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_char_val_by_uuid_read_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_READ_RSP. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + uint16_t offset; /**< Offset of the attribute data. */ + uint16_t len; /**< Attribute data length. */ + uint8_t data[1]; /**< Attribute data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_read_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_VALS_READ_RSP. */ +typedef struct +{ + uint16_t len; /**< Concatenated Attribute values length. */ + uint8_t values[1]; /**< Attribute values. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_char_vals_read_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_WRITE_RSP. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + uint8_t write_op; /**< Type of write operation, see @ref BLE_GATT_WRITE_OPS. */ + uint16_t offset; /**< Data offset. */ + uint16_t len; /**< Data length. */ + uint8_t data[1]; /**< Data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_write_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_HVX. */ +typedef struct +{ + uint16_t handle; /**< Handle to which the HVx operation applies. */ + uint8_t type; /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */ + uint16_t len; /**< Attribute data length. */ + uint8_t data[1]; /**< Attribute data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_hvx_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP. */ +typedef struct +{ + uint16_t server_rx_mtu; /**< Server RX MTU size. */ +} ble_gattc_evt_exchange_mtu_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_TIMEOUT. */ +typedef struct +{ + uint8_t src; /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */ +} ble_gattc_evt_timeout_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE. */ +typedef struct +{ + uint8_t count; /**< Number of write without response transmissions completed. */ +} ble_gattc_evt_write_cmd_tx_complete_t; + +/**@brief GATTC event structure. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which event occurred. */ + uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ + uint16_t error_handle; /**< In case of error: The handle causing the error. In all other cases @ref BLE_GATT_HANDLE_INVALID. */ + union + { + ble_gattc_evt_prim_srvc_disc_rsp_t prim_srvc_disc_rsp; /**< Primary Service Discovery Response Event Parameters. */ + ble_gattc_evt_rel_disc_rsp_t rel_disc_rsp; /**< Relationship Discovery Response Event Parameters. */ + ble_gattc_evt_char_disc_rsp_t char_disc_rsp; /**< Characteristic Discovery Response Event Parameters. */ + ble_gattc_evt_desc_disc_rsp_t desc_disc_rsp; /**< Descriptor Discovery Response Event Parameters. */ + ble_gattc_evt_char_val_by_uuid_read_rsp_t char_val_by_uuid_read_rsp; /**< Characteristic Value Read by UUID Response Event Parameters. */ + ble_gattc_evt_read_rsp_t read_rsp; /**< Read Response Event Parameters. */ + ble_gattc_evt_char_vals_read_rsp_t char_vals_read_rsp; /**< Characteristic Values Read Response Event Parameters. */ + ble_gattc_evt_write_rsp_t write_rsp; /**< Write Response Event Parameters. */ + ble_gattc_evt_hvx_t hvx; /**< Handle Value Notification/Indication Event Parameters. */ + ble_gattc_evt_exchange_mtu_rsp_t exchange_mtu_rsp; /**< Exchange MTU Response Event Parameters. */ + ble_gattc_evt_timeout_t timeout; /**< Timeout Event Parameters. */ + ble_gattc_evt_attr_info_disc_rsp_t attr_info_disc_rsp; /**< Attribute Information Discovery Event Parameters. */ + ble_gattc_evt_write_cmd_tx_complete_t write_cmd_tx_complete; /**< Write without Response transmission complete Event Parameters. */ + } params; /**< Event Parameters. @note Only valid if @ref gatt_status == @ref BLE_GATT_STATUS_SUCCESS. */ +} ble_gattc_evt_t; +/** @} */ + +/** @addtogroup BLE_GATTC_FUNCTIONS Functions + * @{ */ + +/**@brief Initiate or continue a GATT Primary Service Discovery procedure. + * + * @details This function initiates or resumes a Primary Service discovery procedure, starting from the supplied handle. + * If the last service has not been reached, this function must be called again with an updated start handle value to continue the search. + * + * @note If any of the discovered services have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with + * type @ref BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event. + * + * @events + * @event{@ref BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_PRIM_SRVC_DISC_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] start_handle Handle to start searching from. + * @param[in] p_srvc_uuid Pointer to the service UUID to be found. If it is NULL, all primary services will be returned. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Primary Service Discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER, uint32_t, sd_ble_gattc_primary_services_discover(uint16_t conn_handle, uint16_t start_handle, ble_uuid_t const *p_srvc_uuid)); + + +/**@brief Initiate or continue a GATT Relationship Discovery procedure. + * + * @details This function initiates or resumes the Find Included Services sub-procedure. If the last included service has not been reached, + * this must be called again with an updated handle range to continue the search. + * + * @events + * @event{@ref BLE_GATTC_EVT_REL_DISC_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_REL_DISC_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Relationship Discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, uint32_t, sd_ble_gattc_relationships_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); + + +/**@brief Initiate or continue a GATT Characteristic Discovery procedure. + * + * @details This function initiates or resumes a Characteristic discovery procedure. If the last Characteristic has not been reached, + * this must be called again with an updated handle range to continue the discovery. + * + * @note If any of the discovered characteristics have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with + * type @ref BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event. + * + * @events + * @event{@ref BLE_GATTC_EVT_CHAR_DISC_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_CHAR_DISC_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Characteristic Discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, uint32_t, sd_ble_gattc_characteristics_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); + + +/**@brief Initiate or continue a GATT Characteristic Descriptor Discovery procedure. + * + * @details This function initiates or resumes a Characteristic Descriptor discovery procedure. If the last Descriptor has not been reached, + * this must be called again with an updated handle range to continue the discovery. + * + * @events + * @event{@ref BLE_GATTC_EVT_DESC_DISC_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_DESC_DISC_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handle_range A pointer to the range of handles of the Characteristic to perform this procedure on. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Descriptor Discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_DESCRIPTORS_DISCOVER, uint32_t, sd_ble_gattc_descriptors_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); + + +/**@brief Initiate or continue a GATT Read using Characteristic UUID procedure. + * + * @details This function initiates or resumes a Read using Characteristic UUID procedure. If the last Characteristic has not been reached, + * this must be called again with an updated handle range to continue the discovery. + * + * @events + * @event{@ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_READ_UUID_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_uuid Pointer to a Characteristic value UUID to read. + * @param[in] p_handle_range A pointer to the range of handles to perform this procedure on. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Read using Characteristic UUID procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, uint32_t, sd_ble_gattc_char_value_by_uuid_read(uint16_t conn_handle, ble_uuid_t const *p_uuid, ble_gattc_handle_range_t const *p_handle_range)); + + +/**@brief Initiate or continue a GATT Read (Long) Characteristic or Descriptor procedure. + * + * @details This function initiates or resumes a GATT Read (Long) Characteristic or Descriptor procedure. If the Characteristic or Descriptor + * to be read is longer than ATT_MTU - 1, this function must be called multiple times with appropriate offset to read the + * complete value. + * + * @events + * @event{@ref BLE_GATTC_EVT_READ_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_VALUE_READ_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] handle The handle of the attribute to be read. + * @param[in] offset Offset into the attribute value to be read. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Read (Long) procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_READ, uint32_t, sd_ble_gattc_read(uint16_t conn_handle, uint16_t handle, uint16_t offset)); + + +/**@brief Initiate a GATT Read Multiple Characteristic Values procedure. + * + * @details This function initiates a GATT Read Multiple Characteristic Values procedure. + * + * @events + * @event{@ref BLE_GATTC_EVT_CHAR_VALS_READ_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_READ_MULT_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handles A pointer to the handle(s) of the attribute(s) to be read. + * @param[in] handle_count The number of handles in p_handles. + * + * @retval ::NRF_SUCCESS Successfully started the Read Multiple Characteristic Values procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_CHAR_VALUES_READ, uint32_t, sd_ble_gattc_char_values_read(uint16_t conn_handle, uint16_t const *p_handles, uint16_t handle_count)); + + +/**@brief Perform a Write (Characteristic Value or Descriptor, with or without response, signed or not, long or reliable) procedure. + * + * @details This function can perform all write procedures described in GATT. + * + * @note Only one write with response procedure can be ongoing per connection at a time. + * If the application tries to write with response while another write with response procedure is ongoing, + * the function call will return @ref NRF_ERROR_BUSY. + * A @ref BLE_GATTC_EVT_WRITE_RSP event will be issued as soon as the write response arrives from the peer. + * + * @note The number of Write without Response that can be queued is configured by @ref ble_gattc_conn_cfg_t::write_cmd_tx_queue_size + * When the queue is full, the function call will return @ref NRF_ERROR_RESOURCES. + * A @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event will be issued as soon as the transmission of the write without response is complete. + * + * @note The application can keep track of the available queue element count for writes without responses by following the procedure below: + * - Store initial queue element count in a variable. + * - Decrement the variable, which stores the currently available queue element count, by one when a call to this function returns @ref NRF_SUCCESS. + * - Increment the variable, which stores the current available queue element count, by the count variable in @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event. + * + * @events + * @event{@ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE, Write without response transmission complete.} + * @event{@ref BLE_GATTC_EVT_WRITE_RSP, Write response received from the peer.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_VALUE_WRITE_WITHOUT_RESP_MSC} + * @mmsc{@ref BLE_GATTC_VALUE_WRITE_MSC} + * @mmsc{@ref BLE_GATTC_VALUE_LONG_WRITE_MSC} + * @mmsc{@ref BLE_GATTC_VALUE_RELIABLE_WRITE_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_write_params A pointer to a write parameters structure. + * + * @retval ::NRF_SUCCESS Successfully started the Write procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. + * @retval ::NRF_ERROR_BUSY For write with response, procedure already in progress. Wait for a @ref BLE_GATTC_EVT_WRITE_RSP event and retry. + * @retval ::NRF_ERROR_RESOURCES Too many writes without responses queued. + * Wait for a @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event and retry. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_WRITE, uint32_t, sd_ble_gattc_write(uint16_t conn_handle, ble_gattc_write_params_t const *p_write_params)); + + +/**@brief Send a Handle Value Confirmation to the GATT Server. + * + * @mscs + * @mmsc{@ref BLE_GATTC_HVI_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] handle The handle of the attribute in the indication. + * + * @retval ::NRF_SUCCESS Successfully queued the Handle Value Confirmation for transmission. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no Indication pending to be confirmed. + * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_HV_CONFIRM, uint32_t, sd_ble_gattc_hv_confirm(uint16_t conn_handle, uint16_t handle)); + +/**@brief Discovers information about a range of attributes on a GATT server. + * + * @events + * @event{@ref BLE_GATTC_EVT_ATTR_INFO_DISC_RSP, Generated when information about a range of attributes has been received.} + * @endevents + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handle_range The range of handles to request information about. + * + * @retval ::NRF_SUCCESS Successfully started an attribute information discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid connection state + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_ATTR_INFO_DISCOVER, uint32_t, sd_ble_gattc_attr_info_discover(uint16_t conn_handle, ble_gattc_handle_range_t const * p_handle_range)); + +/**@brief Start an ATT_MTU exchange by sending an Exchange MTU Request to the server. + * + * @details The SoftDevice sets ATT_MTU to the minimum of: + * - The Client RX MTU value, and + * - The Server RX MTU value from @ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP. + * + * However, the SoftDevice never sets ATT_MTU lower than @ref BLE_GATT_ATT_MTU_DEFAULT. + * + * @events + * @event{@ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_MTU_EXCHANGE} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] client_rx_mtu Client RX MTU size. + * - The minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. + * - The maximum value is @ref ble_gatt_conn_cfg_t::att_mtu in the connection configuration + used for this connection. + * - The value must be equal to Server RX MTU size given in @ref sd_ble_gatts_exchange_mtu_reply + * if an ATT_MTU exchange has already been performed in the other direction. + * + * @retval ::NRF_SUCCESS Successfully sent request to the server. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid connection state or an ATT_MTU exchange was already requested once. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid Client RX MTU size supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_EXCHANGE_MTU_REQUEST, uint32_t, sd_ble_gattc_exchange_mtu_request(uint16_t conn_handle, uint16_t client_rx_mtu)); + +/**@brief Iterate through Handle-Value(s) list in @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP event. + * + * @param[in] p_gattc_evt Pointer to event buffer containing @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP event. + * @note If the buffer contains different event, behavior is undefined. + * @param[in,out] p_iter Iterator, points to @ref ble_gattc_handle_value_t structure that will be filled in with + * the next Handle-Value pair in each iteration. If the function returns other than + * @ref NRF_SUCCESS, it will not be changed. + * - To start iteration, initialize the structure to zero. + * - To continue, pass the value from previous iteration. + * + * \code + * ble_gattc_handle_value_t iter; + * memset(&iter, 0, sizeof(ble_gattc_handle_value_t)); + * while (sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(&ble_evt.evt.gattc_evt, &iter) == NRF_SUCCESS) + * { + * app_handle = iter.handle; + * memcpy(app_value, iter.p_value, ble_evt.evt.gattc_evt.params.char_val_by_uuid_read_rsp.value_len); + * } + * \endcode + * + * @retval ::NRF_SUCCESS Successfully retrieved the next Handle-Value pair. + * @retval ::NRF_ERROR_NOT_FOUND No more Handle-Value pairs available in the list. + */ +__STATIC_INLINE uint32_t sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(ble_gattc_evt_t *p_gattc_evt, ble_gattc_handle_value_t *p_iter); + +/** @} */ + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE uint32_t sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(ble_gattc_evt_t *p_gattc_evt, ble_gattc_handle_value_t *p_iter) +{ + uint32_t value_len = p_gattc_evt->params.char_val_by_uuid_read_rsp.value_len; + uint8_t *p_first = p_gattc_evt->params.char_val_by_uuid_read_rsp.handle_value; + uint8_t *p_next = p_iter->p_value ? p_iter->p_value + value_len : p_first; + + if ((p_next - p_first) / (sizeof(uint16_t) + value_len) < p_gattc_evt->params.char_val_by_uuid_read_rsp.count) + { + p_iter->handle = (uint16_t)p_next[1] << 8 | p_next[0]; + p_iter->p_value = p_next + sizeof(uint16_t); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_NOT_FOUND; + } +} + +#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ + +#ifdef __cplusplus +} +#endif +#endif /* BLE_GATTC_H__ */ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_gatts.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_gatts.h new file mode 100644 index 00000000000..e437b6e0767 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_gatts.h @@ -0,0 +1,845 @@ +/* + * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_GATTS Generic Attribute Profile (GATT) Server + @{ + @brief Definitions and prototypes for the GATTS interface. + */ + +#ifndef BLE_GATTS_H__ +#define BLE_GATTS_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_hci.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" +#include "ble_gatt.h" +#include "ble_gap.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_GATTS_ENUMERATIONS Enumerations + * @{ */ + +/** + * @brief GATTS API SVC numbers. + */ +enum BLE_GATTS_SVCS +{ + SD_BLE_GATTS_SERVICE_ADD = BLE_GATTS_SVC_BASE, /**< Add a service. */ + SD_BLE_GATTS_INCLUDE_ADD, /**< Add an included service. */ + SD_BLE_GATTS_CHARACTERISTIC_ADD, /**< Add a characteristic. */ + SD_BLE_GATTS_DESCRIPTOR_ADD, /**< Add a generic attribute. */ + SD_BLE_GATTS_VALUE_SET, /**< Set an attribute value. */ + SD_BLE_GATTS_VALUE_GET, /**< Get an attribute value. */ + SD_BLE_GATTS_HVX, /**< Handle Value Notification or Indication. */ + SD_BLE_GATTS_SERVICE_CHANGED, /**< Perform a Service Changed Indication to one or more peers. */ + SD_BLE_GATTS_RW_AUTHORIZE_REPLY, /**< Reply to an authorization request for a read or write operation on one or more attributes. */ + SD_BLE_GATTS_SYS_ATTR_SET, /**< Set the persistent system attributes for a connection. */ + SD_BLE_GATTS_SYS_ATTR_GET, /**< Retrieve the persistent system attributes. */ + SD_BLE_GATTS_INITIAL_USER_HANDLE_GET, /**< Retrieve the first valid user handle. */ + SD_BLE_GATTS_ATTR_GET, /**< Retrieve the UUID and/or metadata of an attribute. */ + SD_BLE_GATTS_EXCHANGE_MTU_REPLY /**< Reply to Exchange MTU Request. */ +}; + +/** + * @brief GATT Server Event IDs. + */ +enum BLE_GATTS_EVTS +{ + BLE_GATTS_EVT_WRITE = BLE_GATTS_EVT_BASE, /**< Write operation performed. \n See @ref ble_gatts_evt_write_t. */ + BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST, /**< Read/Write Authorization request. \n Reply with @ref sd_ble_gatts_rw_authorize_reply. \n See @ref ble_gatts_evt_rw_authorize_request_t. */ + BLE_GATTS_EVT_SYS_ATTR_MISSING, /**< A persistent system attribute access is pending. \n Respond with @ref sd_ble_gatts_sys_attr_set. \n See @ref ble_gatts_evt_sys_attr_missing_t. */ + BLE_GATTS_EVT_HVC, /**< Handle Value Confirmation. \n See @ref ble_gatts_evt_hvc_t. */ + BLE_GATTS_EVT_SC_CONFIRM, /**< Service Changed Confirmation. \n No additional event structure applies. */ + BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST, /**< Exchange MTU Request. \n Reply with @ref sd_ble_gatts_exchange_mtu_reply. \n See @ref ble_gatts_evt_exchange_mtu_request_t. */ + BLE_GATTS_EVT_TIMEOUT, /**< Peer failed to respond to an ATT request in time. \n See @ref ble_gatts_evt_timeout_t. */ + BLE_GATTS_EVT_HVN_TX_COMPLETE /**< Handle Value Notification transmission complete. \n See @ref ble_gatts_evt_hvn_tx_complete_t. */ +}; + +/**@brief GATTS Configuration IDs. + * + * IDs that uniquely identify a GATTS configuration. + */ +enum BLE_GATTS_CFGS +{ + BLE_GATTS_CFG_SERVICE_CHANGED = BLE_GATTS_CFG_BASE, /**< Service changed configuration. */ + BLE_GATTS_CFG_ATTR_TAB_SIZE, /**< Attribute table size configuration. */ +}; + +/** @} */ + +/** @addtogroup BLE_GATTS_DEFINES Defines + * @{ */ + +/** @defgroup BLE_ERRORS_GATTS SVC return values specific to GATTS + * @{ */ +#define BLE_ERROR_GATTS_INVALID_ATTR_TYPE (NRF_GATTS_ERR_BASE + 0x000) /**< Invalid attribute type. */ +#define BLE_ERROR_GATTS_SYS_ATTR_MISSING (NRF_GATTS_ERR_BASE + 0x001) /**< System Attributes missing. */ +/** @} */ + +/** @defgroup BLE_GATTS_ATTR_LENS_MAX Maximum attribute lengths + * @{ */ +#define BLE_GATTS_FIX_ATTR_LEN_MAX (510) /**< Maximum length for fixed length Attribute Values. */ +#define BLE_GATTS_VAR_ATTR_LEN_MAX (512) /**< Maximum length for variable length Attribute Values. */ +/** @} */ + +/** @defgroup BLE_GATTS_SRVC_TYPES GATT Server Service Types + * @{ */ +#define BLE_GATTS_SRVC_TYPE_INVALID 0x00 /**< Invalid Service Type. */ +#define BLE_GATTS_SRVC_TYPE_PRIMARY 0x01 /**< Primary Service. */ +#define BLE_GATTS_SRVC_TYPE_SECONDARY 0x02 /**< Secondary Type. */ +/** @} */ + + +/** @defgroup BLE_GATTS_ATTR_TYPES GATT Server Attribute Types + * @{ */ +#define BLE_GATTS_ATTR_TYPE_INVALID 0x00 /**< Invalid Attribute Type. */ +#define BLE_GATTS_ATTR_TYPE_PRIM_SRVC_DECL 0x01 /**< Primary Service Declaration. */ +#define BLE_GATTS_ATTR_TYPE_SEC_SRVC_DECL 0x02 /**< Secondary Service Declaration. */ +#define BLE_GATTS_ATTR_TYPE_INC_DECL 0x03 /**< Include Declaration. */ +#define BLE_GATTS_ATTR_TYPE_CHAR_DECL 0x04 /**< Characteristic Declaration. */ +#define BLE_GATTS_ATTR_TYPE_CHAR_VAL 0x05 /**< Characteristic Value. */ +#define BLE_GATTS_ATTR_TYPE_DESC 0x06 /**< Descriptor. */ +#define BLE_GATTS_ATTR_TYPE_OTHER 0x07 /**< Other, non-GATT specific type. */ +/** @} */ + + +/** @defgroup BLE_GATTS_OPS GATT Server Operations + * @{ */ +#define BLE_GATTS_OP_INVALID 0x00 /**< Invalid Operation. */ +#define BLE_GATTS_OP_WRITE_REQ 0x01 /**< Write Request. */ +#define BLE_GATTS_OP_WRITE_CMD 0x02 /**< Write Command. */ +#define BLE_GATTS_OP_SIGN_WRITE_CMD 0x03 /**< Signed Write Command. */ +#define BLE_GATTS_OP_PREP_WRITE_REQ 0x04 /**< Prepare Write Request. */ +#define BLE_GATTS_OP_EXEC_WRITE_REQ_CANCEL 0x05 /**< Execute Write Request: Cancel all prepared writes. */ +#define BLE_GATTS_OP_EXEC_WRITE_REQ_NOW 0x06 /**< Execute Write Request: Immediately execute all prepared writes. */ +/** @} */ + +/** @defgroup BLE_GATTS_VLOCS GATT Value Locations + * @{ */ +#define BLE_GATTS_VLOC_INVALID 0x00 /**< Invalid Location. */ +#define BLE_GATTS_VLOC_STACK 0x01 /**< Attribute Value is located in stack memory, no user memory is required. */ +#define BLE_GATTS_VLOC_USER 0x02 /**< Attribute Value is located in user memory. This requires the user to maintain a valid buffer through the lifetime of the attribute, since the stack + will read and write directly to the memory using the pointer provided in the APIs. There are no alignment requirements for the buffer. */ +/** @} */ + +/** @defgroup BLE_GATTS_AUTHORIZE_TYPES GATT Server Authorization Types + * @{ */ +#define BLE_GATTS_AUTHORIZE_TYPE_INVALID 0x00 /**< Invalid Type. */ +#define BLE_GATTS_AUTHORIZE_TYPE_READ 0x01 /**< Authorize a Read Operation. */ +#define BLE_GATTS_AUTHORIZE_TYPE_WRITE 0x02 /**< Authorize a Write Request Operation. */ +/** @} */ + +/** @defgroup BLE_GATTS_SYS_ATTR_FLAGS System Attribute Flags + * @{ */ +#define BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS (1 << 0) /**< Restrict system attributes to system services only. */ +#define BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS (1 << 1) /**< Restrict system attributes to user services only. */ +/** @} */ + +/** @defgroup BLE_GATTS_SERVICE_CHANGED Service Changed Inclusion Values + * @{ + */ +#define BLE_GATTS_SERVICE_CHANGED_DEFAULT (1) /**< Default is to include the Service Changed characteristic in the Attribute Table. */ +/** @} */ + +/** @defgroup BLE_GATTS_ATTR_TAB_SIZE Attribute Table size + * @{ + */ +#define BLE_GATTS_ATTR_TAB_SIZE_MIN (248) /**< Minimum Attribute Table size */ +#define BLE_GATTS_ATTR_TAB_SIZE_DEFAULT (1408) /**< Default Attribute Table size. */ +/** @} */ + +/** @defgroup BLE_GATTS_DEFAULTS GATT Server defaults + * @{ + */ +#define BLE_GATTS_HVN_TX_QUEUE_SIZE_DEFAULT 1 /**< Default number of Handle Value Notifications that can be queued for transmission. */ +/** @} */ + +/** @} */ + +/** @addtogroup BLE_GATTS_STRUCTURES Structures + * @{ */ + +/** + * @brief BLE GATTS connection configuration parameters, set with @ref sd_ble_cfg_set. + */ +typedef struct +{ + uint8_t hvn_tx_queue_size; /**< Minimum guaranteed number of Handle Value Notifications that can be queued for transmission. + The default value is @ref BLE_GATTS_HVN_TX_QUEUE_SIZE_DEFAULT */ +} ble_gatts_conn_cfg_t; + +/**@brief Attribute metadata. */ +typedef struct +{ + ble_gap_conn_sec_mode_t read_perm; /**< Read permissions. */ + ble_gap_conn_sec_mode_t write_perm; /**< Write permissions. */ + uint8_t vlen :1; /**< Variable length attribute. */ + uint8_t vloc :2; /**< Value location, see @ref BLE_GATTS_VLOCS.*/ + uint8_t rd_auth :1; /**< Read authorization and value will be requested from the application on every read operation. */ + uint8_t wr_auth :1; /**< Write authorization will be requested from the application on every Write Request operation (but not Write Command). */ +} ble_gatts_attr_md_t; + + +/**@brief GATT Attribute. */ +typedef struct +{ + ble_uuid_t const *p_uuid; /**< Pointer to the attribute UUID. */ + ble_gatts_attr_md_t const *p_attr_md; /**< Pointer to the attribute metadata structure. */ + uint16_t init_len; /**< Initial attribute value length in bytes. */ + uint16_t init_offs; /**< Initial attribute value offset in bytes. If different from zero, the first init_offs bytes of the attribute value will be left uninitialized. */ + uint16_t max_len; /**< Maximum attribute value length in bytes, see @ref BLE_GATTS_ATTR_LENS_MAX for maximum values. */ + uint8_t *p_value; /**< Pointer to the attribute data. Please note that if the @ref BLE_GATTS_VLOC_USER value location is selected in the attribute metadata, this will have to point to a buffer + that remains valid through the lifetime of the attribute. This excludes usage of automatic variables that may go out of scope or any other temporary location. + The stack may access that memory directly without the application's knowledge. For writable characteristics, this value must not be a location in flash memory.*/ +} ble_gatts_attr_t; + +/**@brief GATT Attribute Value. */ +typedef struct +{ + uint16_t len; /**< Length in bytes to be written or read. Length in bytes written or read after successful return.*/ + uint16_t offset; /**< Attribute value offset. */ + uint8_t *p_value; /**< Pointer to where value is stored or will be stored. + If value is stored in user memory, only the attribute length is updated when p_value == NULL. + Set to NULL when reading to obtain the complete length of the attribute value */ +} ble_gatts_value_t; + + +/**@brief GATT Characteristic Presentation Format. */ +typedef struct +{ + uint8_t format; /**< Format of the value, see @ref BLE_GATT_CPF_FORMATS. */ + int8_t exponent; /**< Exponent for integer data types. */ + uint16_t unit; /**< Unit from Bluetooth Assigned Numbers. */ + uint8_t name_space; /**< Namespace from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */ + uint16_t desc; /**< Namespace description from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */ +} ble_gatts_char_pf_t; + + +/**@brief GATT Characteristic metadata. */ +typedef struct +{ + ble_gatt_char_props_t char_props; /**< Characteristic Properties. */ + ble_gatt_char_ext_props_t char_ext_props; /**< Characteristic Extended Properties. */ + uint8_t const *p_char_user_desc; /**< Pointer to a UTF-8 encoded string (non-NULL terminated), NULL if the descriptor is not required. */ + uint16_t char_user_desc_max_size; /**< The maximum size in bytes of the user description descriptor. */ + uint16_t char_user_desc_size; /**< The size of the user description, must be smaller or equal to char_user_desc_max_size. */ + ble_gatts_char_pf_t const *p_char_pf; /**< Pointer to a presentation format structure or NULL if the CPF descriptor is not required. */ + ble_gatts_attr_md_t const *p_user_desc_md; /**< Attribute metadata for the User Description descriptor, or NULL for default values. */ + ble_gatts_attr_md_t const *p_cccd_md; /**< Attribute metadata for the Client Characteristic Configuration Descriptor, or NULL for default values. */ + ble_gatts_attr_md_t const *p_sccd_md; /**< Attribute metadata for the Server Characteristic Configuration Descriptor, or NULL for default values. */ +} ble_gatts_char_md_t; + + +/**@brief GATT Characteristic Definition Handles. */ +typedef struct +{ + uint16_t value_handle; /**< Handle to the characteristic value. */ + uint16_t user_desc_handle; /**< Handle to the User Description descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ + uint16_t cccd_handle; /**< Handle to the Client Characteristic Configuration Descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ + uint16_t sccd_handle; /**< Handle to the Server Characteristic Configuration Descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ +} ble_gatts_char_handles_t; + + +/**@brief GATT HVx parameters. */ +typedef struct +{ + uint16_t handle; /**< Characteristic Value Handle. */ + uint8_t type; /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */ + uint16_t offset; /**< Offset within the attribute value. */ + uint16_t *p_len; /**< Length in bytes to be written, length in bytes written after return. */ + uint8_t const *p_data; /**< Actual data content, use NULL to use the current attribute value. */ +} ble_gatts_hvx_params_t; + +/**@brief GATT Authorization parameters. */ +typedef struct +{ + uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ + uint8_t update : 1; /**< If set, data supplied in p_data will be used to update the attribute value. + Please note that for @ref BLE_GATTS_AUTHORIZE_TYPE_WRITE operations this bit must always be set, + as the data to be written needs to be stored and later provided by the application. */ + uint16_t offset; /**< Offset of the attribute value being updated. */ + uint16_t len; /**< Length in bytes of the value in p_data pointer, see @ref BLE_GATTS_ATTR_LENS_MAX. */ + uint8_t const *p_data; /**< Pointer to new value used to update the attribute value. */ +} ble_gatts_authorize_params_t; + +/**@brief GATT Read or Write Authorize Reply parameters. */ +typedef struct +{ + uint8_t type; /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */ + union { + ble_gatts_authorize_params_t read; /**< Read authorization parameters. */ + ble_gatts_authorize_params_t write; /**< Write authorization parameters. */ + } params; /**< Reply Parameters. */ +} ble_gatts_rw_authorize_reply_params_t; + +/**@brief Service Changed Inclusion configuration parameters, set with @ref sd_ble_cfg_set. */ +typedef struct +{ + uint8_t service_changed : 1; /**< If 1, include the Service Changed characteristic in the Attribute Table. Default is @ref BLE_GATTS_SERVICE_CHANGED_DEFAULT. */ +} ble_gatts_cfg_service_changed_t; + +/**@brief Attribute table size configuration parameters, set with @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_INVALID_LENGTH One or more of the following is true: + * - The specified Attribute Table size is too small. + * The minimum acceptable size is defined by @ref BLE_GATTS_ATTR_TAB_SIZE_MIN. + * - The specified Attribute Table size is not a multiple of 4. + */ +typedef struct +{ + uint32_t attr_tab_size; /**< Attribute table size. Default is @ref BLE_GATTS_ATTR_TAB_SIZE_DEFAULT, minimum is @ref BLE_GATTS_ATTR_TAB_SIZE_MIN. */ +} ble_gatts_cfg_attr_tab_size_t; + +/**@brief Config structure for GATTS configurations. */ +typedef union +{ + ble_gatts_cfg_service_changed_t service_changed; /**< Include service changed characteristic, cfg_id is @ref BLE_GATTS_CFG_SERVICE_CHANGED. */ + ble_gatts_cfg_attr_tab_size_t attr_tab_size; /**< Attribute table size, cfg_id is @ref BLE_GATTS_CFG_ATTR_TAB_SIZE. */ +} ble_gatts_cfg_t; + + +/**@brief Event structure for @ref BLE_GATTS_EVT_WRITE. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + ble_uuid_t uuid; /**< Attribute UUID. */ + uint8_t op; /**< Type of write operation, see @ref BLE_GATTS_OPS. */ + uint8_t auth_required; /**< Writing operation deferred due to authorization requirement. Application may use @ref sd_ble_gatts_value_set to finalize the writing operation. */ + uint16_t offset; /**< Offset for the write operation. */ + uint16_t len; /**< Length of the received data. */ + uint8_t data[1]; /**< Received data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gatts_evt_write_t; + +/**@brief Event substructure for authorized read requests, see @ref ble_gatts_evt_rw_authorize_request_t. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + ble_uuid_t uuid; /**< Attribute UUID. */ + uint16_t offset; /**< Offset for the read operation. */ +} ble_gatts_evt_read_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST. */ +typedef struct +{ + uint8_t type; /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */ + union { + ble_gatts_evt_read_t read; /**< Attribute Read Parameters. */ + ble_gatts_evt_write_t write; /**< Attribute Write Parameters. */ + } request; /**< Request Parameters. */ +} ble_gatts_evt_rw_authorize_request_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_SYS_ATTR_MISSING. */ +typedef struct +{ + uint8_t hint; /**< Hint (currently unused). */ +} ble_gatts_evt_sys_attr_missing_t; + + +/**@brief Event structure for @ref BLE_GATTS_EVT_HVC. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ +} ble_gatts_evt_hvc_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST. */ +typedef struct +{ + uint16_t client_rx_mtu; /**< Client RX MTU size. */ +} ble_gatts_evt_exchange_mtu_request_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_TIMEOUT. */ +typedef struct +{ + uint8_t src; /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */ +} ble_gatts_evt_timeout_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_HVN_TX_COMPLETE. */ +typedef struct +{ + uint8_t count; /**< Number of notification transmissions completed. */ +} ble_gatts_evt_hvn_tx_complete_t; + +/**@brief GATTS event structure. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which the event occurred. */ + union + { + ble_gatts_evt_write_t write; /**< Write Event Parameters. */ + ble_gatts_evt_rw_authorize_request_t authorize_request; /**< Read or Write Authorize Request Parameters. */ + ble_gatts_evt_sys_attr_missing_t sys_attr_missing; /**< System attributes missing. */ + ble_gatts_evt_hvc_t hvc; /**< Handle Value Confirmation Event Parameters. */ + ble_gatts_evt_exchange_mtu_request_t exchange_mtu_request; /**< Exchange MTU Request Event Parameters. */ + ble_gatts_evt_timeout_t timeout; /**< Timeout Event. */ + ble_gatts_evt_hvn_tx_complete_t hvn_tx_complete; /**< Handle Value Notification transmission complete Event Parameters. */ + } params; /**< Event Parameters. */ +} ble_gatts_evt_t; + +/** @} */ + +/** @addtogroup BLE_GATTS_FUNCTIONS Functions + * @{ */ + +/**@brief Add a service declaration to the Attribute Table. + * + * @note Secondary Services are only relevant in the context of the entity that references them, it is therefore forbidden to + * add a secondary service declaration that is not referenced by another service later in the Attribute Table. + * + * @mscs + * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} + * @endmscs + * + * @param[in] type Toggles between primary and secondary services, see @ref BLE_GATTS_SRVC_TYPES. + * @param[in] p_uuid Pointer to service UUID. + * @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored. + * + * @retval ::NRF_SUCCESS Successfully added a service declaration. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, Vendor Specific UUIDs need to be present in the table. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + */ +SVCALL(SD_BLE_GATTS_SERVICE_ADD, uint32_t, sd_ble_gatts_service_add(uint8_t type, ble_uuid_t const *p_uuid, uint16_t *p_handle)); + + +/**@brief Add an include declaration to the Attribute Table. + * + * @note It is currently only possible to add an include declaration to the last added service (i.e. only sequential population is supported at this time). + * + * @note The included service must already be present in the Attribute Table prior to this call. + * + * @mscs + * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} + * @endmscs + * + * @param[in] service_handle Handle of the service where the included service is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. + * @param[in] inc_srvc_handle Handle of the included service. + * @param[out] p_include_handle Pointer to a 16-bit word where the assigned handle will be stored. + * + * @retval ::NRF_SUCCESS Successfully added an include declaration. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, handle values need to match previously added services. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::NRF_ERROR_NOT_SUPPORTED Feature is not supported, service_handle must be that of the last added service. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, self inclusions are not allowed. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. + */ +SVCALL(SD_BLE_GATTS_INCLUDE_ADD, uint32_t, sd_ble_gatts_include_add(uint16_t service_handle, uint16_t inc_srvc_handle, uint16_t *p_include_handle)); + + +/**@brief Add a characteristic declaration, a characteristic value declaration and optional characteristic descriptor declarations to the Attribute Table. + * + * @note It is currently only possible to add a characteristic to the last added service (i.e. only sequential population is supported at this time). + * + * @note Several restrictions apply to the parameters, such as matching permissions between the user description descriptor and the writable auxiliaries bits, + * readable (no security) and writable (selectable) CCCDs and SCCDs and valid presentation format values. + * + * @note If no metadata is provided for the optional descriptors, their permissions will be derived from the characteristic permissions. + * + * @mscs + * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} + * @endmscs + * + * @param[in] service_handle Handle of the service where the characteristic is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. + * @param[in] p_char_md Characteristic metadata. + * @param[in] p_attr_char_value Pointer to the attribute structure corresponding to the characteristic value. + * @param[out] p_handles Pointer to the structure where the assigned handles will be stored. + * + * @retval ::NRF_SUCCESS Successfully added a characteristic. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, service handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a service context is required. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. + */ +SVCALL(SD_BLE_GATTS_CHARACTERISTIC_ADD, uint32_t, sd_ble_gatts_characteristic_add(uint16_t service_handle, ble_gatts_char_md_t const *p_char_md, ble_gatts_attr_t const *p_attr_char_value, ble_gatts_char_handles_t *p_handles)); + + +/**@brief Add a descriptor to the Attribute Table. + * + * @note It is currently only possible to add a descriptor to the last added characteristic (i.e. only sequential population is supported at this time). + * + * @mscs + * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} + * @endmscs + * + * @param[in] char_handle Handle of the characteristic where the descriptor is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. + * @param[in] p_attr Pointer to the attribute structure. + * @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored. + * + * @retval ::NRF_SUCCESS Successfully added a descriptor. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, characteristic handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a characteristic context is required. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. + */ +SVCALL(SD_BLE_GATTS_DESCRIPTOR_ADD, uint32_t, sd_ble_gatts_descriptor_add(uint16_t char_handle, ble_gatts_attr_t const *p_attr, uint16_t *p_handle)); + +/**@brief Set the value of a given attribute. + * + * @note Values other than system attributes can be set at any time, regardless of whether any active connections exist. + * + * @mscs + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. Ignored if the value does not belong to a system attribute. + * @param[in] handle Attribute handle. + * @param[in,out] p_value Attribute value information. + * + * @retval ::NRF_SUCCESS Successfully set the value of the attribute. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden handle supplied, certain attributes are not modifiable by the application. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied on a system attribute. + */ +SVCALL(SD_BLE_GATTS_VALUE_SET, uint32_t, sd_ble_gatts_value_set(uint16_t conn_handle, uint16_t handle, ble_gatts_value_t *p_value)); + +/**@brief Get the value of a given attribute. + * + * @note If the attribute value is longer than the size of the supplied buffer, + * @ref ble_gatts_value_t::len will return the total attribute value length (excluding offset), + * and not the number of bytes actually returned in @ref ble_gatts_value_t::p_value. + * The application may use this information to allocate a suitable buffer size. + * + * @note When retrieving system attribute values with this function, the connection handle + * may refer to an already disconnected connection. Refer to the documentation of + * @ref sd_ble_gatts_sys_attr_get for further information. + * + * @param[in] conn_handle Connection handle. Ignored if the value does not belong to a system attribute. + * @param[in] handle Attribute handle. + * @param[in,out] p_value Attribute value information. + * + * @retval ::NRF_SUCCESS Successfully retrieved the value of the attribute. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid attribute offset supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied on a system attribute. + * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. + */ +SVCALL(SD_BLE_GATTS_VALUE_GET, uint32_t, sd_ble_gatts_value_get(uint16_t conn_handle, uint16_t handle, ble_gatts_value_t *p_value)); + +/**@brief Notify or Indicate an attribute value. + * + * @details This function checks for the relevant Client Characteristic Configuration descriptor value to verify that the relevant operation + * (notification or indication) has been enabled by the client. It is also able to update the attribute value before issuing the PDU, so that + * the application can atomically perform a value update and a server initiated transaction with a single API call. + * + * @note The local attribute value may be updated even if an outgoing packet is not sent to the peer due to an error during execution. + * The Attribute Table has been updated if one of the following error codes is returned: @ref NRF_ERROR_INVALID_STATE, @ref NRF_ERROR_BUSY, + * @ref NRF_ERROR_FORBIDDEN, @ref BLE_ERROR_GATTS_SYS_ATTR_MISSING and @ref NRF_ERROR_RESOURCES. + * The caller can check whether the value has been updated by looking at the contents of *(@ref ble_gatts_hvx_params_t::p_len). + * + * @note Only one indication procedure can be ongoing per connection at a time. + * If the application tries to indicate an attribute value while another indication procedure is ongoing, + * the function call will return @ref NRF_ERROR_BUSY. + * A @ref BLE_GATTS_EVT_HVC event will be issued as soon as the confirmation arrives from the peer. + * + * @note The number of Handle Value Notifications that can be queued is configured by @ref ble_gatts_conn_cfg_t::hvn_tx_queue_size + * When the queue is full, the function call will return @ref NRF_ERROR_RESOURCES. + * A @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event will be issued as soon as the transmission of the notification is complete. + * + * @note The application can keep track of the available queue element count for notifications by following the procedure below: + * - Store initial queue element count in a variable. + * - Decrement the variable, which stores the currently available queue element count, by one when a call to this function returns @ref NRF_SUCCESS. + * - Increment the variable, which stores the current available queue element count, by the count variable in @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event. + * + * @events + * @event{@ref BLE_GATTS_EVT_HVN_TX_COMPLETE, Notification transmission complete.} + * @event{@ref BLE_GATTS_EVT_HVC, Confirmation received from the peer.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC} + * @mmsc{@ref BLE_GATTS_HVN_MSC} + * @mmsc{@ref BLE_GATTS_HVI_MSC} + * @mmsc{@ref BLE_GATTS_HVX_DISABLED_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in,out] p_hvx_params Pointer to an HVx parameters structure. If @ref ble_gatts_hvx_params_t::p_data + * contains a non-NULL pointer the attribute value will be updated with the contents + * pointed by it before sending the notification or indication. If the attribute value + * is updated, @ref ble_gatts_hvx_params_t::p_len is updated by the SoftDevice to + * contain the number of actual bytes written, else it will be set to 0. + * + * @retval ::NRF_SUCCESS Successfully queued a notification or indication for transmission, and optionally updated the attribute value. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE One or more of the following is true: + * - Invalid Connection State + * - Notifications and/or indications not enabled in the CCCD + * - An ATT_MTU exchange is ongoing + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied. Only attributes added directly by the application are available to notify and indicate. + * @retval ::BLE_ERROR_GATTS_INVALID_ATTR_TYPE Invalid attribute type(s) supplied, only characteristic values may be notified and indicated. + * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. + * @retval ::NRF_ERROR_FORBIDDEN The connection's current security level is lower than the one required by the write permissions of the CCCD associated with this characteristic. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. + * @retval ::NRF_ERROR_BUSY For @ref BLE_GATT_HVX_INDICATION Procedure already in progress. Wait for a @ref BLE_GATTS_EVT_HVC event and retry. + * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. + * @retval ::NRF_ERROR_RESOURCES Too many notifications queued. + * Wait for a @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event and retry. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTS_HVX, uint32_t, sd_ble_gatts_hvx(uint16_t conn_handle, ble_gatts_hvx_params_t const *p_hvx_params)); + +/**@brief Indicate the Service Changed attribute value. + * + * @details This call will send a Handle Value Indication to one or more peers connected to inform them that the Attribute + * Table layout has changed. As soon as the peer has confirmed the indication, a @ref BLE_GATTS_EVT_SC_CONFIRM event will + * be issued. + * + * @note Some of the restrictions and limitations that apply to @ref sd_ble_gatts_hvx also apply here. + * + * @events + * @event{@ref BLE_GATTS_EVT_SC_CONFIRM, Confirmation of attribute table change received from peer.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTS_SC_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] start_handle Start of affected attribute handle range. + * @param[in] end_handle End of affected attribute handle range. + * + * @retval ::NRF_SUCCESS Successfully queued the Service Changed indication for transmission. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_NOT_SUPPORTED Service Changed not enabled at initialization. See @ref + * sd_ble_cfg_set and @ref ble_gatts_cfg_service_changed_t. + * @retval ::NRF_ERROR_INVALID_STATE One or more of the following is true: + * - Invalid Connection State + * - Notifications and/or indications not enabled in the CCCD + * - An ATT_MTU exchange is ongoing + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied, handles must be in the range populated by the application. + * @retval ::NRF_ERROR_BUSY Procedure already in progress. + * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTS_SERVICE_CHANGED, uint32_t, sd_ble_gatts_service_changed(uint16_t conn_handle, uint16_t start_handle, uint16_t end_handle)); + +/**@brief Respond to a Read/Write authorization request. + * + * @note This call should only be used as a response to a @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST event issued to the application. + * + * @mscs + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} + * @mmsc{@ref BLE_GATTS_READ_REQ_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_WRITE_REQ_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_PEER_CANCEL_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_rw_authorize_reply_params Pointer to a structure with the attribute provided by the application. + * + * @note @ref ble_gatts_authorize_params_t::p_data is ignored when this function is used to respond + * to a @ref BLE_GATTS_AUTHORIZE_TYPE_READ event if @ref ble_gatts_authorize_params_t::update + * is set to 0. + * + * @retval ::NRF_SUCCESS Successfully queued a response to the peer, and in the case of a write operation, Attribute Table updated. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no authorization request pending. + * @retval ::NRF_ERROR_INVALID_PARAM Authorization op invalid, + * handle supplied does not match requested handle, + * or invalid data to be written provided by the application. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTS_RW_AUTHORIZE_REPLY, uint32_t, sd_ble_gatts_rw_authorize_reply(uint16_t conn_handle, ble_gatts_rw_authorize_reply_params_t const *p_rw_authorize_reply_params)); + + +/**@brief Update persistent system attribute information. + * + * @details Supply information about persistent system attributes to the stack, + * previously obtained using @ref sd_ble_gatts_sys_attr_get. + * This call is only allowed for active connections, and is usually + * made immediately after a connection is established with an known bonded device, + * often as a response to a @ref BLE_GATTS_EVT_SYS_ATTR_MISSING. + * + * p_sysattrs may point directly to the application's stored copy of the system attributes + * obtained using @ref sd_ble_gatts_sys_attr_get. + * If the pointer is NULL, the system attribute info is initialized, assuming that + * the application does not have any previously saved system attribute data for this device. + * + * @note The state of persistent system attributes is reset upon connection establishment and then remembered for its duration. + * + * @note If this call returns with an error code different from @ref NRF_SUCCESS, the storage of persistent system attributes may have been completed only partially. + * This means that the state of the attribute table is undefined, and the application should either provide a new set of attributes using this same call or + * reset the SoftDevice to return to a known state. + * + * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS is used with this function, only the system attributes included in system services will be modified. + * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS is used with this function, only the system attributes included in user services will be modified. + * + * @mscs + * @mmsc{@ref BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC} + * @mmsc{@ref BLE_GATTS_SYS_ATTRS_UNK_PEER_MSC} + * @mmsc{@ref BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_sys_attr_data Pointer to a saved copy of system attributes supplied to the stack, or NULL. + * @param[in] len Size of data pointed by p_sys_attr_data, in octets. + * @param[in] flags Optional additional flags, see @ref BLE_GATTS_SYS_ATTR_FLAGS + * + * @retval ::NRF_SUCCESS Successfully set the system attribute information. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid flags supplied. + * @retval ::NRF_ERROR_INVALID_DATA Invalid data supplied, the data should be exactly the same as retrieved with @ref sd_ble_gatts_sys_attr_get. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + */ +SVCALL(SD_BLE_GATTS_SYS_ATTR_SET, uint32_t, sd_ble_gatts_sys_attr_set(uint16_t conn_handle, uint8_t const *p_sys_attr_data, uint16_t len, uint32_t flags)); + + +/**@brief Retrieve persistent system attribute information from the stack. + * + * @details This call is used to retrieve information about values to be stored persistently by the application + * during the lifetime of a connection or after it has been terminated. When a new connection is established with the same bonded device, + * the system attribute information retrieved with this function should be restored using using @ref sd_ble_gatts_sys_attr_set. + * If retrieved after disconnection, the data should be read before a new connection established. The connection handle for + * the previous, now disconnected, connection will remain valid until a new one is created to allow this API call to refer to it. + * Connection handles belonging to active connections can be used as well, but care should be taken since the system attributes + * may be written to at any time by the peer during a connection's lifetime. + * + * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS is used with this function, only the system attributes included in system services will be returned. + * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS is used with this function, only the system attributes included in user services will be returned. + * + * @mscs + * @mmsc{@ref BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle of the recently terminated connection. + * @param[out] p_sys_attr_data Pointer to a buffer where updated information about system attributes will be filled in. The format of the data is described + * in @ref BLE_GATTS_SYS_ATTRS_FORMAT. NULL can be provided to obtain the length of the data. + * @param[in,out] p_len Size of application buffer if p_sys_attr_data is not NULL. Unconditionally updated to actual length of system attribute data. + * @param[in] flags Optional additional flags, see @ref BLE_GATTS_SYS_ATTR_FLAGS + * + * @retval ::NRF_SUCCESS Successfully retrieved the system attribute information. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid flags supplied. + * @retval ::NRF_ERROR_DATA_SIZE The system attribute information did not fit into the provided buffer. + * @retval ::NRF_ERROR_NOT_FOUND No system attributes found. + */ +SVCALL(SD_BLE_GATTS_SYS_ATTR_GET, uint32_t, sd_ble_gatts_sys_attr_get(uint16_t conn_handle, uint8_t *p_sys_attr_data, uint16_t *p_len, uint32_t flags)); + + +/**@brief Retrieve the first valid user attribute handle. + * + * @param[out] p_handle Pointer to an integer where the handle will be stored. + * + * @retval ::NRF_SUCCESS Successfully retrieved the handle. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + */ +SVCALL(SD_BLE_GATTS_INITIAL_USER_HANDLE_GET, uint32_t, sd_ble_gatts_initial_user_handle_get(uint16_t *p_handle)); + +/**@brief Retrieve the attribute UUID and/or metadata. + * + * @param[in] handle Attribute handle + * @param[out] p_uuid UUID of the attribute. Use NULL to omit this field. + * @param[out] p_md Metadata of the attribute. Use NULL to omit this field. + * + * @retval ::NRF_SUCCESS Successfully retrieved the attribute metadata, + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameters supplied. Returned when both @c p_uuid and @c p_md are NULL. + * @retval ::NRF_ERROR_NOT_FOUND Attribute was not found. + */ +SVCALL(SD_BLE_GATTS_ATTR_GET, uint32_t, sd_ble_gatts_attr_get(uint16_t handle, ble_uuid_t * p_uuid, ble_gatts_attr_md_t * p_md)); + +/**@brief Reply to an ATT_MTU exchange request by sending an Exchange MTU Response to the client. + * + * @details This function is only used to reply to a @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST event. + * + * @details The SoftDevice sets ATT_MTU to the minimum of: + * - The Client RX MTU value from @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST, and + * - The Server RX MTU value. + * + * However, the SoftDevice never sets ATT_MTU lower than @ref BLE_GATT_ATT_MTU_DEFAULT. + * + * @mscs + * @mmsc{@ref BLE_GATTS_MTU_EXCHANGE} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] server_rx_mtu Server RX MTU size. + * - The minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. + * - The maximum value is @ref ble_gatt_conn_cfg_t::att_mtu in the connection configuration + * used for this connection. + * - The value must be equal to Client RX MTU size given in @ref sd_ble_gattc_exchange_mtu_request + * if an ATT_MTU exchange has already been performed in the other direction. + * + * @retval ::NRF_SUCCESS Successfully sent response to the client. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no ATT_MTU exchange request pending. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid Server RX MTU size supplied. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTS_EXCHANGE_MTU_REPLY, uint32_t, sd_ble_gatts_exchange_mtu_reply(uint16_t conn_handle, uint16_t server_rx_mtu)); +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // BLE_GATTS_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_hci.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_hci.h new file mode 100644 index 00000000000..f0dde9a03ad --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_hci.h @@ -0,0 +1,135 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON + @{ +*/ + + +#ifndef BLE_HCI_H__ +#define BLE_HCI_H__ +#ifdef __cplusplus +extern "C" { +#endif + +/** @defgroup BLE_HCI_STATUS_CODES Bluetooth status codes + * @{ */ + +#define BLE_HCI_STATUS_CODE_SUCCESS 0x00 /**< Success. */ +#define BLE_HCI_STATUS_CODE_UNKNOWN_BTLE_COMMAND 0x01 /**< Unknown BLE Command. */ +#define BLE_HCI_STATUS_CODE_UNKNOWN_CONNECTION_IDENTIFIER 0x02 /**< Unknown Connection Identifier. */ +/*0x03 Hardware Failure +0x04 Page Timeout +*/ +#define BLE_HCI_AUTHENTICATION_FAILURE 0x05 /**< Authentication Failure. */ +#define BLE_HCI_STATUS_CODE_PIN_OR_KEY_MISSING 0x06 /**< Pin or Key missing. */ +#define BLE_HCI_MEMORY_CAPACITY_EXCEEDED 0x07 /**< Memory Capacity Exceeded. */ +#define BLE_HCI_CONNECTION_TIMEOUT 0x08 /**< Connection Timeout. */ +/*0x09 Connection Limit Exceeded +0x0A Synchronous Connection Limit To A Device Exceeded +0x0B ACL Connection Already Exists*/ +#define BLE_HCI_STATUS_CODE_COMMAND_DISALLOWED 0x0C /**< Command Disallowed. */ +/*0x0D Connection Rejected due to Limited Resources +0x0E Connection Rejected Due To Security Reasons +0x0F Connection Rejected due to Unacceptable BD_ADDR +0x10 Connection Accept Timeout Exceeded +0x11 Unsupported Feature or Parameter Value*/ +#define BLE_HCI_STATUS_CODE_INVALID_BTLE_COMMAND_PARAMETERS 0x12 /**< Invalid BLE Command Parameters. */ +#define BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION 0x13 /**< Remote User Terminated Connection. */ +#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_LOW_RESOURCES 0x14 /**< Remote Device Terminated Connection due to low resources.*/ +#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_POWER_OFF 0x15 /**< Remote Device Terminated Connection due to power off. */ +#define BLE_HCI_LOCAL_HOST_TERMINATED_CONNECTION 0x16 /**< Local Host Terminated Connection. */ +/* +0x17 Repeated Attempts +0x18 Pairing Not Allowed +0x19 Unknown LMP PDU +*/ +#define BLE_HCI_UNSUPPORTED_REMOTE_FEATURE 0x1A /**< Unsupported Remote Feature. */ +/* +0x1B SCO Offset Rejected +0x1C SCO Interval Rejected +0x1D SCO Air Mode Rejected*/ +#define BLE_HCI_STATUS_CODE_INVALID_LMP_PARAMETERS 0x1E /**< Invalid LMP Parameters. */ +#define BLE_HCI_STATUS_CODE_UNSPECIFIED_ERROR 0x1F /**< Unspecified Error. */ +/*0x20 Unsupported LMP Parameter Value +0x21 Role Change Not Allowed +*/ +#define BLE_HCI_STATUS_CODE_LMP_RESPONSE_TIMEOUT 0x22 /**< LMP Response Timeout. */ +#define BLE_HCI_STATUS_CODE_LMP_ERROR_TRANSACTION_COLLISION 0x23 /**< LMP Error Transaction Collision/LL Procedure Collision. */ +#define BLE_HCI_STATUS_CODE_LMP_PDU_NOT_ALLOWED 0x24 /**< LMP PDU Not Allowed. */ +/*0x25 Encryption Mode Not Acceptable +0x26 Link Key Can Not be Changed +0x27 Requested QoS Not Supported +*/ +#define BLE_HCI_INSTANT_PASSED 0x28 /**< Instant Passed. */ +#define BLE_HCI_PAIRING_WITH_UNIT_KEY_UNSUPPORTED 0x29 /**< Pairing with Unit Key Unsupported. */ +#define BLE_HCI_DIFFERENT_TRANSACTION_COLLISION 0x2A /**< Different Transaction Collision. */ +/* +0x2B Reserved +0x2C QoS Unacceptable Parameter +0x2D QoS Rejected +0x2E Channel Classification Not Supported +0x2F Insufficient Security +*/ +#define BLE_HCI_PARAMETER_OUT_OF_MANDATORY_RANGE 0x30 /**< Parameter Out Of Mandatory Range. */ +/* +0x31 Reserved +0x32 Role Switch Pending +0x33 Reserved +0x34 Reserved Slot Violation +0x35 Role Switch Failed +0x36 Extended Inquiry Response Too Large +0x37 Secure Simple Pairing Not Supported By Host. +0x38 Host Busy - Pairing +0x39 Connection Rejected due to No Suitable Channel Found*/ +#define BLE_HCI_CONTROLLER_BUSY 0x3A /**< Controller Busy. */ +#define BLE_HCI_CONN_INTERVAL_UNACCEPTABLE 0x3B /**< Connection Interval Unacceptable. */ +#define BLE_HCI_DIRECTED_ADVERTISER_TIMEOUT 0x3C /**< Directed Advertisement Timeout. */ +#define BLE_HCI_CONN_TERMINATED_DUE_TO_MIC_FAILURE 0x3D /**< Connection Terminated due to MIC Failure. */ +#define BLE_HCI_CONN_FAILED_TO_BE_ESTABLISHED 0x3E /**< Connection Failed to be Established. */ + +/** @} */ + + +#ifdef __cplusplus +} +#endif +#endif // BLE_HCI_H__ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_l2cap.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_l2cap.h new file mode 100644 index 00000000000..eaeb4b7d281 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_l2cap.h @@ -0,0 +1,506 @@ +/* + * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_L2CAP Logical Link Control and Adaptation Protocol (L2CAP) + @{ + @brief Definitions and prototypes for the L2CAP interface. + */ + +#ifndef BLE_L2CAP_H__ +#define BLE_L2CAP_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@addtogroup BLE_L2CAP_TERMINOLOGY Terminology + * @{ + * @details + * + * L2CAP SDU + * - A data unit that the application can send/receive to/from a peer. + * + * L2CAP PDU + * - A data unit that is exchanged between local and remote L2CAP entities. + * It consists of L2CAP protocol control information and payload fields. + * The payload field can contain an L2CAP SDU or a part of an L2CAP SDU. + * + * L2CAP MTU + * - The maximum length of an L2CAP SDU. + * + * L2CAP MPS + * - The maximum length of an L2CAP PDU payload field. + * + * Credits + * - A value indicating the number of L2CAP PDUs that the receiver of the credit can send to the peer. + * @} */ + +/**@addtogroup BLE_L2CAP_ENUMERATIONS Enumerations + * @{ */ + +/**@brief L2CAP API SVC numbers. */ +enum BLE_L2CAP_SVCS +{ + SD_BLE_L2CAP_CH_SETUP = BLE_L2CAP_SVC_BASE + 0, /**< Set up an L2CAP channel. */ + SD_BLE_L2CAP_CH_RELEASE = BLE_L2CAP_SVC_BASE + 1, /**< Release an L2CAP channel. */ + SD_BLE_L2CAP_CH_RX = BLE_L2CAP_SVC_BASE + 2, /**< Receive an SDU on an L2CAP channel. */ + SD_BLE_L2CAP_CH_TX = BLE_L2CAP_SVC_BASE + 3, /**< Transmit an SDU on an L2CAP channel. */ + SD_BLE_L2CAP_CH_FLOW_CONTROL = BLE_L2CAP_SVC_BASE + 4, /**< Advanced SDU reception flow control. */ +}; + +/**@brief L2CAP Event IDs. */ +enum BLE_L2CAP_EVTS +{ + BLE_L2CAP_EVT_CH_SETUP_REQUEST = BLE_L2CAP_EVT_BASE + 0, /**< L2CAP Channel Setup Request event. + \n See @ref ble_l2cap_evt_ch_setup_request_t. */ + BLE_L2CAP_EVT_CH_SETUP_REFUSED = BLE_L2CAP_EVT_BASE + 1, /**< L2CAP Channel Setup Refused event. + \n See @ref ble_l2cap_evt_ch_setup_refused_t. */ + BLE_L2CAP_EVT_CH_SETUP = BLE_L2CAP_EVT_BASE + 2, /**< L2CAP Channel Setup Completed event. + \n See @ref ble_l2cap_evt_ch_setup_t. */ + BLE_L2CAP_EVT_CH_RELEASED = BLE_L2CAP_EVT_BASE + 3, /**< L2CAP Channel Released event. + \n No additional event structure applies. */ + BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED = BLE_L2CAP_EVT_BASE + 4, /**< L2CAP Channel SDU data buffer released event. + \n See @ref ble_l2cap_evt_ch_sdu_buf_released_t. */ + BLE_L2CAP_EVT_CH_CREDIT = BLE_L2CAP_EVT_BASE + 5, /**< L2CAP Channel Credit received. + \n See @ref ble_l2cap_evt_ch_credit_t. */ + BLE_L2CAP_EVT_CH_RX = BLE_L2CAP_EVT_BASE + 6, /**< L2CAP Channel SDU received. + \n See @ref ble_l2cap_evt_ch_rx_t. */ + BLE_L2CAP_EVT_CH_TX = BLE_L2CAP_EVT_BASE + 7, /**< L2CAP Channel SDU transmitted. + \n See @ref ble_l2cap_evt_ch_tx_t. */ +}; + +/** @} */ + +/**@addtogroup BLE_L2CAP_DEFINES Defines + * @{ */ + +/**@brief Maximum number of L2CAP channels per connection. */ +#define BLE_L2CAP_CH_COUNT_MAX (64) + +/**@brief Minimum L2CAP MTU, in bytes. */ +#define BLE_L2CAP_MTU_MIN (23) + +/**@brief Minimum L2CAP MPS, in bytes. */ +#define BLE_L2CAP_MPS_MIN (23) + +/**@brief Invalid CID. */ +#define BLE_L2CAP_CID_INVALID (0x0000) + +/**@brief Default number of credits for @ref sd_ble_l2cap_ch_flow_control. */ +#define BLE_L2CAP_CREDITS_DEFAULT (1) + +/**@defgroup BLE_L2CAP_CH_SETUP_REFUSED_SRCS L2CAP channel setup refused sources + * @{ */ +#define BLE_L2CAP_CH_SETUP_REFUSED_SRC_LOCAL (0x01) /**< Local. */ +#define BLE_L2CAP_CH_SETUP_REFUSED_SRC_REMOTE (0x02) /**< Remote. */ + /** @} */ + + /** @defgroup BLE_L2CAP_CH_STATUS_CODES L2CAP channel status codes + * @{ */ +#define BLE_L2CAP_CH_STATUS_CODE_SUCCESS (0x0000) /**< Success. */ +#define BLE_L2CAP_CH_STATUS_CODE_LE_PSM_NOT_SUPPORTED (0x0002) /**< LE_PSM not supported. */ +#define BLE_L2CAP_CH_STATUS_CODE_NO_RESOURCES (0x0004) /**< No resources available. */ +#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_AUTHENTICATION (0x0005) /**< Insufficient authentication. */ +#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_AUTHORIZATION (0x0006) /**< Insufficient authorization. */ +#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_ENC_KEY_SIZE (0x0007) /**< Insufficient encryption key size. */ +#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_ENC (0x0008) /**< Insufficient encryption. */ +#define BLE_L2CAP_CH_STATUS_CODE_INVALID_SCID (0x0009) /**< Invalid Source CID. */ +#define BLE_L2CAP_CH_STATUS_CODE_SCID_ALLOCATED (0x000A) /**< Source CID already allocated. */ +#define BLE_L2CAP_CH_STATUS_CODE_UNACCEPTABLE_PARAMS (0x000B) /**< Unacceptable parameters. */ +#define BLE_L2CAP_CH_STATUS_CODE_NOT_UNDERSTOOD (0x8000) /**< Command Reject received instead of LE Credit Based Connection Response. */ +#define BLE_L2CAP_CH_STATUS_CODE_TIMEOUT (0xC000) /**< Operation timed out. */ +/** @} */ + +/** @} */ + +/**@addtogroup BLE_L2CAP_STRUCTURES Structures + * @{ */ + +/** + * @brief BLE L2CAP connection configuration parameters, set with @ref sd_ble_cfg_set. + * + * @note These parameters are set per connection, so all L2CAP channels created on this connection + * will have the same parameters. + * + * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: + * - rx_mps is smaller than @ref BLE_L2CAP_MPS_MIN. + * - tx_mps is smaller than @ref BLE_L2CAP_MPS_MIN. + * - ch_count is greater than @ref BLE_L2CAP_CH_COUNT_MAX. + * @retval ::NRF_ERROR_NO_MEM rx_mps or tx_mps is set too high. + */ +typedef struct +{ + uint16_t rx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP shall + be able to receive on L2CAP channels on connections with this + configuration. The minimum value is @ref BLE_L2CAP_MPS_MIN. */ + uint16_t tx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP shall + be able to transmit on L2CAP channels on connections with this + configuration. The minimum value is @ref BLE_L2CAP_MPS_MIN. */ + uint8_t rx_queue_size; /**< Number of SDU data buffers that can be queued for reception per + L2CAP channel. The minimum value is one. */ + uint8_t tx_queue_size; /**< Number of SDU data buffers that can be queued for transmission + per L2CAP channel. The minimum value is one. */ + uint8_t ch_count; /**< Number of L2CAP channels the application can create per connection + with this configuration. The default value is zero, the maximum + value is @ref BLE_L2CAP_CH_COUNT_MAX. + @note if this parameter is set to zero, all other parameters in + @ref ble_l2cap_conn_cfg_t are ignored. */ +} ble_l2cap_conn_cfg_t; + +/**@brief L2CAP channel RX parameters. */ +typedef struct +{ + uint16_t rx_mtu; /**< The maximum L2CAP SDU size, in bytes, that L2CAP shall be able to + receive on this L2CAP channel. + - Must be equal to or greater than @ref BLE_L2CAP_MTU_MIN. */ + uint16_t rx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP shall be + able to receive on this L2CAP channel. + - Must be equal to or greater than @ref BLE_L2CAP_MPS_MIN. + - Must be equal to or less than @ref ble_l2cap_conn_cfg_t::rx_mps. */ + ble_data_t sdu_buf; /**< SDU data buffer for reception. + - If @ref ble_data_t::p_data is non-NULL, initial credits are + issued to the peer. + - If @ref ble_data_t::p_data is NULL, no initial credits are + issued to the peer. */ +} ble_l2cap_ch_rx_params_t; + +/**@brief L2CAP channel setup parameters. */ +typedef struct +{ + ble_l2cap_ch_rx_params_t rx_params; /**< L2CAP channel RX parameters. */ + uint16_t le_psm; /**< LE Protocol/Service Multiplexer. Used when requesting + setup of an L2CAP channel, ignored otherwise. */ + uint16_t status; /**< Status code, see @ref BLE_L2CAP_CH_STATUS_CODES. + Used when replying to a setup request of an L2CAP + channel, ignored otherwise. */ +} ble_l2cap_ch_setup_params_t; + +/**@brief L2CAP channel TX parameters. */ +typedef struct +{ + uint16_t tx_mtu; /**< The maximum L2CAP SDU size, in bytes, that L2CAP is able to + transmit on this L2CAP channel. */ + uint16_t peer_mps; /**< The maximum L2CAP PDU payload size, in bytes, that the peer is + able to receive on this L2CAP channel. */ + uint16_t tx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP is able + to transmit on this L2CAP channel. This is effective tx_mps, + selected by the SoftDevice as + MIN( @ref ble_l2cap_ch_tx_params_t::peer_mps, @ref ble_l2cap_conn_cfg_t::tx_mps ) */ + uint16_t credits; /**< Initial credits given by the peer. */ +} ble_l2cap_ch_tx_params_t; + +/**@brief L2CAP Channel Setup Request event. */ +typedef struct +{ + ble_l2cap_ch_tx_params_t tx_params; /**< L2CAP channel TX parameters. */ + uint16_t le_psm; /**< LE Protocol/Service Multiplexer. */ +} ble_l2cap_evt_ch_setup_request_t; + +/**@brief L2CAP Channel Setup Refused event. */ +typedef struct +{ + uint8_t source; /**< Source, see @ref BLE_L2CAP_CH_SETUP_REFUSED_SRCS */ + uint16_t status; /**< Status code, see @ref BLE_L2CAP_CH_STATUS_CODES */ +} ble_l2cap_evt_ch_setup_refused_t; + +/**@brief L2CAP Channel Setup Completed event. */ +typedef struct +{ + ble_l2cap_ch_tx_params_t tx_params; /**< L2CAP channel TX parameters. */ +} ble_l2cap_evt_ch_setup_t; + +/**@brief L2CAP Channel SDU Data Duffer Released event. */ +typedef struct +{ + ble_data_t sdu_buf; /**< Returned reception or transmission SDU data buffer. The SoftDevice + returns SDU data buffers supplied by the application, which have + not yet been returned previously via a @ref BLE_L2CAP_EVT_CH_RX or + @ref BLE_L2CAP_EVT_CH_TX event. */ +} ble_l2cap_evt_ch_sdu_buf_released_t; + +/**@brief L2CAP Channel Credit received event. */ +typedef struct +{ + uint16_t credits; /**< Additional credits given by the peer. */ +} ble_l2cap_evt_ch_credit_t; + +/**@brief L2CAP Channel received SDU event. */ +typedef struct +{ + uint16_t sdu_len; /**< Total SDU length, in bytes. */ + ble_data_t sdu_buf; /**< SDU data buffer. + @note If there is not enough space in the buffer + (sdu_buf.len < sdu_len) then the rest of the SDU will be + silently discarded by the SoftDevice. */ +} ble_l2cap_evt_ch_rx_t; + +/**@brief L2CAP Channel transmitted SDU event. */ +typedef struct +{ + ble_data_t sdu_buf; /**< SDU data buffer. */ +} ble_l2cap_evt_ch_tx_t; + +/**@brief L2CAP event structure. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which the event occured. */ + uint16_t local_cid; /**< Local Channel ID of the L2CAP channel, or + @ref BLE_L2CAP_CID_INVALID if not present. */ + union + { + ble_l2cap_evt_ch_setup_request_t ch_setup_request; /**< L2CAP Channel Setup Request Event Parameters. */ + ble_l2cap_evt_ch_setup_refused_t ch_setup_refused; /**< L2CAP Channel Setup Refused Event Parameters. */ + ble_l2cap_evt_ch_setup_t ch_setup; /**< L2CAP Channel Setup Completed Event Parameters. */ + ble_l2cap_evt_ch_sdu_buf_released_t ch_sdu_buf_released;/**< L2CAP Channel SDU Data Buffer Released Event Parameters. */ + ble_l2cap_evt_ch_credit_t credit; /**< L2CAP Channel Credit Received Event Parameters. */ + ble_l2cap_evt_ch_rx_t rx; /**< L2CAP Channel SDU Received Event Parameters. */ + ble_l2cap_evt_ch_tx_t tx; /**< L2CAP Channel SDU Transmitted Event Parameters. */ + } params; /**< Event Parameters. */ +} ble_l2cap_evt_t; + +/** @} */ + +/**@addtogroup BLE_L2CAP_FUNCTIONS Functions + * @{ */ + +/**@brief Set up an L2CAP channel. + * + * @details This function is used to: + * - Request setup of an L2CAP channel: sends an LE Credit Based Connection Request packet to a peer. + * - Reply to a setup request of an L2CAP channel (if called in response to a + * @ref BLE_L2CAP_EVT_CH_SETUP_REQUEST event): sends an LE Credit Based Connection + * Response packet to a peer. + * + * @note A call to this function will require the application to keep the SDU data buffer alive + * until the SDU data buffer is returned in @ref BLE_L2CAP_EVT_CH_RX or + * @ref BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED event. + * + * @events + * @event{@ref BLE_L2CAP_EVT_CH_SETUP, Setup successful.} + * @event{@ref BLE_L2CAP_EVT_CH_SETUP_REFUSED, Setup failed.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_SETUP_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in,out] p_local_cid Pointer to a uint16_t containing Local Channel ID of the L2CAP channel: + * - As input: @ref BLE_L2CAP_CID_INVALID when requesting setup of an L2CAP + * channel or local_cid provided in the @ref BLE_L2CAP_EVT_CH_SETUP_REQUEST + * event when replying to a setup request of an L2CAP channel. + * - As output: local_cid for this channel. + * @param[in] p_params L2CAP channel parameters. + * + * @retval ::NRF_SUCCESS Successfully queued request or response for transmission. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_LENGTH Supplied higher rx_mps than has been configured on this link. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (L2CAP channel already set up). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + * @retval ::NRF_ERROR_RESOURCES The limit has been reached for available L2CAP channels, + * see @ref ble_l2cap_conn_cfg_t::ch_count. + */ +SVCALL(SD_BLE_L2CAP_CH_SETUP, uint32_t, sd_ble_l2cap_ch_setup(uint16_t conn_handle, uint16_t *p_local_cid, ble_l2cap_ch_setup_params_t const *p_params)); + +/**@brief Release an L2CAP channel. + * + * @details This sends a Disconnection Request packet to a peer. + * + * @events + * @event{@ref BLE_L2CAP_EVT_CH_RELEASED, Release complete.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_RELEASE_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in] local_cid Local Channel ID of the L2CAP channel. + * + * @retval ::NRF_SUCCESS Successfully queued request for transmission. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is + * in progress for the L2CAP channel). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + */ +SVCALL(SD_BLE_L2CAP_CH_RELEASE, uint32_t, sd_ble_l2cap_ch_release(uint16_t conn_handle, uint16_t local_cid)); + +/**@brief Receive an SDU on an L2CAP channel. + * + * @details This may issue additional credits to the peer using an LE Flow Control Credit packet. + * + * @note A call to this function will require the application to keep the memory pointed by + * @ref ble_data_t::p_data alive until the SDU data buffer is returned in @ref BLE_L2CAP_EVT_CH_RX + * or @ref BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED event. + * + * @note The SoftDevice can queue up to @ref ble_l2cap_conn_cfg_t::rx_queue_size SDU data buffers + * for reception per L2CAP channel. + * + * @events + * @event{@ref BLE_L2CAP_EVT_CH_RX, The SDU is received.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_RX_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in] local_cid Local Channel ID of the L2CAP channel. + * @param[in] p_sdu_buf Pointer to the SDU data buffer. + * + * @retval ::NRF_SUCCESS Buffer accepted. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is + * in progress for an L2CAP channel). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + * @retval ::NRF_ERROR_RESOURCES Too many SDU data buffers supplied. Wait for a + * @ref BLE_L2CAP_EVT_CH_RX event and retry. + */ +SVCALL(SD_BLE_L2CAP_CH_RX, uint32_t, sd_ble_l2cap_ch_rx(uint16_t conn_handle, uint16_t local_cid, ble_data_t const *p_sdu_buf)); + +/**@brief Transmit an SDU on an L2CAP channel. + * + * @note A call to this function will require the application to keep the memory pointed by + * @ref ble_data_t::p_data alive until the SDU data buffer is returned in @ref BLE_L2CAP_EVT_CH_TX + * or @ref BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED event. + * + * @note The SoftDevice can queue up to @ref ble_l2cap_conn_cfg_t::tx_queue_size SDUs for + * transmission per L2CAP channel. + * + * @note The application can keep track of the available credits for transmission by following + * the procedure below: + * - Store initial credits given by the peer in a variable. + * (Initial credits are provided in a @ref BLE_L2CAP_EVT_CH_SETUP event.) + * - Decrement the variable, which stores the currently available credits, by + * ceiling((@ref ble_data_t::len + 2) / tx_mps) when a call to this function returns + * @ref NRF_SUCCESS. (tx_mps is provided in a @ref BLE_L2CAP_EVT_CH_SETUP event.) + * - Increment the variable, which stores the currently available credits, by additional + * credits given by the peer in a @ref BLE_L2CAP_EVT_CH_CREDIT event. + * + * @events + * @event{@ref BLE_L2CAP_EVT_CH_TX, The SDU is transmitted.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_TX_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in] local_cid Local Channel ID of the L2CAP channel. + * @param[in] p_sdu_buf Pointer to the SDU data buffer. + * + * @retval ::NRF_SUCCESS Successfully queued L2CAP SDU for transmission. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is + * in progress for the L2CAP channel). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + * @retval ::NRF_ERROR_DATA_SIZE Invalid SDU length supplied, must not be more than + * @ref ble_l2cap_ch_tx_params_t::tx_mtu provided in + * @ref BLE_L2CAP_EVT_CH_SETUP event. + * @retval ::NRF_ERROR_RESOURCES Too many SDUs queued for transmission. Wait for a + * @ref BLE_L2CAP_EVT_CH_TX event and retry. + */ +SVCALL(SD_BLE_L2CAP_CH_TX, uint32_t, sd_ble_l2cap_ch_tx(uint16_t conn_handle, uint16_t local_cid, ble_data_t const *p_sdu_buf)); + +/**@brief Advanced SDU reception flow control. + * + * @details Adjust the way the SoftDevice issues credits to the peer. + * This may issue additional credits to the peer using an LE Flow Control Credit packet. + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_FLOW_CONTROL_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in] local_cid Local Channel ID of the L2CAP channel or @ref BLE_L2CAP_CID_INVALID to set + * the value that will be used for newly created channels. + * @param[in] credits Number of credits that the SoftDevice will make sure the peer has every + * time it starts using a new reception buffer. + * - @ref BLE_L2CAP_CREDITS_DEFAULT is the default value the SoftDevice will + * use if this function is not called. + * - If set to zero, the SoftDevice will stop issuing credits for new reception + * buffers the application provides or has provided. SDU reception that is + * currently ongoing will be allowed to complete. + * @param[out] p_credits NULL or pointer to a uint16_t. If a valid pointer is provided, it will be + * written by the SoftDevice with the number of credits that is or will be + * available to the peer. If the value written by the SoftDevice is 0 when + * credits parameter was set to 0, the peer will not be able to send more + * data until more credits are provided by calling this function again with + * credits > 0. This parameter is ignored when local_cid is set to + * @ref BLE_L2CAP_CID_INVALID. + * + * @note Application should take care when setting number of credits higher than default value. In + * this case the application must make sure that the SoftDevice always has reception buffers + * available (see @ref sd_ble_l2cap_ch_rx) for that channel. If the SoftDevice does not have + * such buffers available, packets may be NACKed on the Link Layer and all Bluetooth traffic + * on the connection handle may be stalled until the SoftDevice again has an available + * reception buffer. This applies even if the application has used this call to set the + * credits back to default, or zero. + * + * @retval ::NRF_SUCCESS Flow control parameters accepted. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is + * in progress for an L2CAP channel). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + */ +SVCALL(SD_BLE_L2CAP_CH_FLOW_CONTROL, uint32_t, sd_ble_l2cap_ch_flow_control(uint16_t conn_handle, uint16_t local_cid, uint16_t credits, uint16_t *p_credits)); + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // BLE_L2CAP_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_ranges.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_ranges.h new file mode 100644 index 00000000000..0935bca0710 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_ranges.h @@ -0,0 +1,156 @@ +/* + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON + @{ + @defgroup ble_ranges Module specific SVC, event and option number subranges + @{ + + @brief Definition of SVC, event and option number subranges for each API module. + + @note + SVCs, event and option numbers are split into subranges for each API module. + Each module receives its entire allocated range of SVC calls, whether implemented or not, + but return BLE_ERROR_NOT_SUPPORTED for unimplemented or undefined calls in its range. + + Note that the symbols BLE__SVC_LAST is the end of the allocated SVC range, + rather than the last SVC function call actually defined and implemented. + + Specific SVC, event and option values are defined in each module's ble_.h file, + which defines names of each individual SVC code based on the range start value. +*/ + +#ifndef BLE_RANGES_H__ +#define BLE_RANGES_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#define BLE_SVC_BASE 0x60 /**< Common BLE SVC base. */ +#define BLE_SVC_LAST 0x6B /**< Common BLE SVC last. */ + +#define BLE_GAP_SVC_BASE 0x6C /**< GAP BLE SVC base. */ +#define BLE_GAP_SVC_LAST 0x9A /**< GAP BLE SVC last. */ + +#define BLE_GATTC_SVC_BASE 0x9B /**< GATTC BLE SVC base. */ +#define BLE_GATTC_SVC_LAST 0xA7 /**< GATTC BLE SVC last. */ + +#define BLE_GATTS_SVC_BASE 0xA8 /**< GATTS BLE SVC base. */ +#define BLE_GATTS_SVC_LAST 0xB7 /**< GATTS BLE SVC last. */ + +#define BLE_L2CAP_SVC_BASE 0xB8 /**< L2CAP BLE SVC base. */ +#define BLE_L2CAP_SVC_LAST 0xBF /**< L2CAP BLE SVC last. */ + + +#define BLE_EVT_INVALID 0x00 /**< Invalid BLE Event. */ + +#define BLE_EVT_BASE 0x01 /**< Common BLE Event base. */ +#define BLE_EVT_LAST 0x0F /**< Common BLE Event last. */ + +#define BLE_GAP_EVT_BASE 0x10 /**< GAP BLE Event base. */ +#define BLE_GAP_EVT_LAST 0x2F /**< GAP BLE Event last. */ + +#define BLE_GATTC_EVT_BASE 0x30 /**< GATTC BLE Event base. */ +#define BLE_GATTC_EVT_LAST 0x4F /**< GATTC BLE Event last. */ + +#define BLE_GATTS_EVT_BASE 0x50 /**< GATTS BLE Event base. */ +#define BLE_GATTS_EVT_LAST 0x6F /**< GATTS BLE Event last. */ + +#define BLE_L2CAP_EVT_BASE 0x70 /**< L2CAP BLE Event base. */ +#define BLE_L2CAP_EVT_LAST 0x8F /**< L2CAP BLE Event last. */ + + +#define BLE_OPT_INVALID 0x00 /**< Invalid BLE Option. */ + +#define BLE_OPT_BASE 0x01 /**< Common BLE Option base. */ +#define BLE_OPT_LAST 0x1F /**< Common BLE Option last. */ + +#define BLE_GAP_OPT_BASE 0x20 /**< GAP BLE Option base. */ +#define BLE_GAP_OPT_LAST 0x3F /**< GAP BLE Option last. */ + +#define BLE_GATT_OPT_BASE 0x40 /**< GATT BLE Option base. */ +#define BLE_GATT_OPT_LAST 0x5F /**< GATT BLE Option last. */ + +#define BLE_GATTC_OPT_BASE 0x60 /**< GATTC BLE Option base. */ +#define BLE_GATTC_OPT_LAST 0x7F /**< GATTC BLE Option last. */ + +#define BLE_GATTS_OPT_BASE 0x80 /**< GATTS BLE Option base. */ +#define BLE_GATTS_OPT_LAST 0x9F /**< GATTS BLE Option last. */ + +#define BLE_L2CAP_OPT_BASE 0xA0 /**< L2CAP BLE Option base. */ +#define BLE_L2CAP_OPT_LAST 0xBF /**< L2CAP BLE Option last. */ + + +#define BLE_CFG_INVALID 0x00 /**< Invalid BLE configuration. */ + +#define BLE_CFG_BASE 0x01 /**< Common BLE configuration base. */ +#define BLE_CFG_LAST 0x1F /**< Common BLE configuration last. */ + +#define BLE_CONN_CFG_BASE 0x20 /**< BLE connection configuration base. */ +#define BLE_CONN_CFG_LAST 0x3F /**< BLE connection configuration last. */ + +#define BLE_GAP_CFG_BASE 0x40 /**< GAP BLE configuration base. */ +#define BLE_GAP_CFG_LAST 0x5F /**< GAP BLE configuration last. */ + +#define BLE_GATT_CFG_BASE 0x60 /**< GATT BLE configuration base. */ +#define BLE_GATT_CFG_LAST 0x7F /**< GATT BLE configuration last. */ + +#define BLE_GATTC_CFG_BASE 0x80 /**< GATTC BLE configuration base. */ +#define BLE_GATTC_CFG_LAST 0x9F /**< GATTC BLE configuration last. */ + +#define BLE_GATTS_CFG_BASE 0xA0 /**< GATTS BLE configuration base. */ +#define BLE_GATTS_CFG_LAST 0xBF /**< GATTS BLE configuration last. */ + +#define BLE_L2CAP_CFG_BASE 0xC0 /**< L2CAP BLE configuration base. */ +#define BLE_L2CAP_CFG_LAST 0xDF /**< L2CAP BLE configuration last. */ + + + + + +#ifdef __cplusplus +} +#endif +#endif /* BLE_RANGES_H__ */ + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_types.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_types.h new file mode 100644 index 00000000000..88c93180c83 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/ble_types.h @@ -0,0 +1,215 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON + @{ + @defgroup ble_types Common types and macro definitions + @{ + + @brief Common types and macro definitions for the BLE SoftDevice. + */ + +#ifndef BLE_TYPES_H__ +#define BLE_TYPES_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_TYPES_DEFINES Defines + * @{ */ + +/** @defgroup BLE_CONN_HANDLES BLE Connection Handles + * @{ */ +#define BLE_CONN_HANDLE_INVALID 0xFFFF /**< Invalid Connection Handle. */ +#define BLE_CONN_HANDLE_ALL 0xFFFE /**< Applies to all Connection Handles. */ +/** @} */ + + +/** @defgroup BLE_UUID_VALUES Assigned Values for BLE UUIDs + * @{ */ +/* Generic UUIDs, applicable to all services */ +#define BLE_UUID_UNKNOWN 0x0000 /**< Reserved UUID. */ +#define BLE_UUID_SERVICE_PRIMARY 0x2800 /**< Primary Service. */ +#define BLE_UUID_SERVICE_SECONDARY 0x2801 /**< Secondary Service. */ +#define BLE_UUID_SERVICE_INCLUDE 0x2802 /**< Include. */ +#define BLE_UUID_CHARACTERISTIC 0x2803 /**< Characteristic. */ +#define BLE_UUID_DESCRIPTOR_CHAR_EXT_PROP 0x2900 /**< Characteristic Extended Properties Descriptor. */ +#define BLE_UUID_DESCRIPTOR_CHAR_USER_DESC 0x2901 /**< Characteristic User Description Descriptor. */ +#define BLE_UUID_DESCRIPTOR_CLIENT_CHAR_CONFIG 0x2902 /**< Client Characteristic Configuration Descriptor. */ +#define BLE_UUID_DESCRIPTOR_SERVER_CHAR_CONFIG 0x2903 /**< Server Characteristic Configuration Descriptor. */ +#define BLE_UUID_DESCRIPTOR_CHAR_PRESENTATION_FORMAT 0x2904 /**< Characteristic Presentation Format Descriptor. */ +#define BLE_UUID_DESCRIPTOR_CHAR_AGGREGATE_FORMAT 0x2905 /**< Characteristic Aggregate Format Descriptor. */ +/* GATT specific UUIDs */ +#define BLE_UUID_GATT 0x1801 /**< Generic Attribute Profile. */ +#define BLE_UUID_GATT_CHARACTERISTIC_SERVICE_CHANGED 0x2A05 /**< Service Changed Characteristic. */ +/* GAP specific UUIDs */ +#define BLE_UUID_GAP 0x1800 /**< Generic Access Profile. */ +#define BLE_UUID_GAP_CHARACTERISTIC_DEVICE_NAME 0x2A00 /**< Device Name Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_APPEARANCE 0x2A01 /**< Appearance Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_RECONN_ADDR 0x2A03 /**< Reconnection Address Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_PPCP 0x2A04 /**< Peripheral Preferred Connection Parameters Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_CAR 0x2AA6 /**< Central Address Resolution Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_RPA_ONLY 0x2AC9 /**< Resolvable Private Address Only Characteristic. */ +/** @} */ + + +/** @defgroup BLE_UUID_TYPES Types of UUID + * @{ */ +#define BLE_UUID_TYPE_UNKNOWN 0x00 /**< Invalid UUID type. */ +#define BLE_UUID_TYPE_BLE 0x01 /**< Bluetooth SIG UUID (16-bit). */ +#define BLE_UUID_TYPE_VENDOR_BEGIN 0x02 /**< Vendor UUID types start at this index (128-bit). */ +/** @} */ + + +/** @defgroup BLE_APPEARANCES Bluetooth Appearance values + * @note Retrieved from http://developer.bluetooth.org/gatt/characteristics/Pages/CharacteristicViewer.aspx?u=org.bluetooth.characteristic.gap.appearance.xml + * @{ */ +#define BLE_APPEARANCE_UNKNOWN 0 /**< Unknown. */ +#define BLE_APPEARANCE_GENERIC_PHONE 64 /**< Generic Phone. */ +#define BLE_APPEARANCE_GENERIC_COMPUTER 128 /**< Generic Computer. */ +#define BLE_APPEARANCE_GENERIC_WATCH 192 /**< Generic Watch. */ +#define BLE_APPEARANCE_WATCH_SPORTS_WATCH 193 /**< Watch: Sports Watch. */ +#define BLE_APPEARANCE_GENERIC_CLOCK 256 /**< Generic Clock. */ +#define BLE_APPEARANCE_GENERIC_DISPLAY 320 /**< Generic Display. */ +#define BLE_APPEARANCE_GENERIC_REMOTE_CONTROL 384 /**< Generic Remote Control. */ +#define BLE_APPEARANCE_GENERIC_EYE_GLASSES 448 /**< Generic Eye-glasses. */ +#define BLE_APPEARANCE_GENERIC_TAG 512 /**< Generic Tag. */ +#define BLE_APPEARANCE_GENERIC_KEYRING 576 /**< Generic Keyring. */ +#define BLE_APPEARANCE_GENERIC_MEDIA_PLAYER 640 /**< Generic Media Player. */ +#define BLE_APPEARANCE_GENERIC_BARCODE_SCANNER 704 /**< Generic Barcode Scanner. */ +#define BLE_APPEARANCE_GENERIC_THERMOMETER 768 /**< Generic Thermometer. */ +#define BLE_APPEARANCE_THERMOMETER_EAR 769 /**< Thermometer: Ear. */ +#define BLE_APPEARANCE_GENERIC_HEART_RATE_SENSOR 832 /**< Generic Heart rate Sensor. */ +#define BLE_APPEARANCE_HEART_RATE_SENSOR_HEART_RATE_BELT 833 /**< Heart Rate Sensor: Heart Rate Belt. */ +#define BLE_APPEARANCE_GENERIC_BLOOD_PRESSURE 896 /**< Generic Blood Pressure. */ +#define BLE_APPEARANCE_BLOOD_PRESSURE_ARM 897 /**< Blood Pressure: Arm. */ +#define BLE_APPEARANCE_BLOOD_PRESSURE_WRIST 898 /**< Blood Pressure: Wrist. */ +#define BLE_APPEARANCE_GENERIC_HID 960 /**< Human Interface Device (HID). */ +#define BLE_APPEARANCE_HID_KEYBOARD 961 /**< Keyboard (HID Subtype). */ +#define BLE_APPEARANCE_HID_MOUSE 962 /**< Mouse (HID Subtype). */ +#define BLE_APPEARANCE_HID_JOYSTICK 963 /**< Joystick (HID Subtype). */ +#define BLE_APPEARANCE_HID_GAMEPAD 964 /**< Gamepad (HID Subtype). */ +#define BLE_APPEARANCE_HID_DIGITIZERSUBTYPE 965 /**< Digitizer Tablet (HID Subtype). */ +#define BLE_APPEARANCE_HID_CARD_READER 966 /**< Card Reader (HID Subtype). */ +#define BLE_APPEARANCE_HID_DIGITAL_PEN 967 /**< Digital Pen (HID Subtype). */ +#define BLE_APPEARANCE_HID_BARCODE 968 /**< Barcode Scanner (HID Subtype). */ +#define BLE_APPEARANCE_GENERIC_GLUCOSE_METER 1024 /**< Generic Glucose Meter. */ +#define BLE_APPEARANCE_GENERIC_RUNNING_WALKING_SENSOR 1088 /**< Generic Running Walking Sensor. */ +#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_IN_SHOE 1089 /**< Running Walking Sensor: In-Shoe. */ +#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_SHOE 1090 /**< Running Walking Sensor: On-Shoe. */ +#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_HIP 1091 /**< Running Walking Sensor: On-Hip. */ +#define BLE_APPEARANCE_GENERIC_CYCLING 1152 /**< Generic Cycling. */ +#define BLE_APPEARANCE_CYCLING_CYCLING_COMPUTER 1153 /**< Cycling: Cycling Computer. */ +#define BLE_APPEARANCE_CYCLING_SPEED_SENSOR 1154 /**< Cycling: Speed Sensor. */ +#define BLE_APPEARANCE_CYCLING_CADENCE_SENSOR 1155 /**< Cycling: Cadence Sensor. */ +#define BLE_APPEARANCE_CYCLING_POWER_SENSOR 1156 /**< Cycling: Power Sensor. */ +#define BLE_APPEARANCE_CYCLING_SPEED_CADENCE_SENSOR 1157 /**< Cycling: Speed and Cadence Sensor. */ +#define BLE_APPEARANCE_GENERIC_PULSE_OXIMETER 3136 /**< Generic Pulse Oximeter. */ +#define BLE_APPEARANCE_PULSE_OXIMETER_FINGERTIP 3137 /**< Fingertip (Pulse Oximeter subtype). */ +#define BLE_APPEARANCE_PULSE_OXIMETER_WRIST_WORN 3138 /**< Wrist Worn(Pulse Oximeter subtype). */ +#define BLE_APPEARANCE_GENERIC_WEIGHT_SCALE 3200 /**< Generic Weight Scale. */ +#define BLE_APPEARANCE_GENERIC_OUTDOOR_SPORTS_ACT 5184 /**< Generic Outdoor Sports Activity. */ +#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_DISP 5185 /**< Location Display Device (Outdoor Sports Activity subtype). */ +#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_DISP 5186 /**< Location and Navigation Display Device (Outdoor Sports Activity subtype). */ +#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_POD 5187 /**< Location Pod (Outdoor Sports Activity subtype). */ +#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_POD 5188 /**< Location and Navigation Pod (Outdoor Sports Activity subtype). */ +/** @} */ + +/** @brief Set .type and .uuid fields of ble_uuid_struct to specified UUID value. */ +#define BLE_UUID_BLE_ASSIGN(instance, value) do {\ + instance.type = BLE_UUID_TYPE_BLE; \ + instance.uuid = value;} while(0) + +/** @brief Copy type and uuid members from src to dst ble_uuid_t pointer. Both pointers must be valid/non-null. */ +#define BLE_UUID_COPY_PTR(dst, src) do {\ + (dst)->type = (src)->type; \ + (dst)->uuid = (src)->uuid;} while(0) + +/** @brief Copy type and uuid members from src to dst ble_uuid_t struct. */ +#define BLE_UUID_COPY_INST(dst, src) do {\ + (dst).type = (src).type; \ + (dst).uuid = (src).uuid;} while(0) + +/** @brief Compare for equality both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */ +#define BLE_UUID_EQ(p_uuid1, p_uuid2) \ + (((p_uuid1)->type == (p_uuid2)->type) && ((p_uuid1)->uuid == (p_uuid2)->uuid)) + +/** @brief Compare for difference both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */ +#define BLE_UUID_NEQ(p_uuid1, p_uuid2) \ + (((p_uuid1)->type != (p_uuid2)->type) || ((p_uuid1)->uuid != (p_uuid2)->uuid)) + +/** @} */ + +/** @addtogroup BLE_TYPES_STRUCTURES Structures + * @{ */ + +/** @brief 128 bit UUID values. */ +typedef struct +{ + uint8_t uuid128[16]; /**< Little-Endian UUID bytes. */ +} ble_uuid128_t; + +/** @brief Bluetooth Low Energy UUID type, encapsulates both 16-bit and 128-bit UUIDs. */ +typedef struct +{ + uint16_t uuid; /**< 16-bit UUID value or octets 12-13 of 128-bit UUID. */ + uint8_t type; /**< UUID type, see @ref BLE_UUID_TYPES. If type is @ref BLE_UUID_TYPE_UNKNOWN, the value of uuid is undefined. */ +} ble_uuid_t; + +/**@brief Data structure. */ +typedef struct +{ + uint8_t *p_data; /**< Pointer to the data buffer provided to/from the application. */ + uint16_t len; /**< Length of the data buffer, in bytes. */ +} ble_data_t; + +/** @} */ +#ifdef __cplusplus +} +#endif + +#endif /* BLE_TYPES_H__ */ + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf52/nrf_mbr.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf52/nrf_mbr.h new file mode 100644 index 00000000000..cc5971c7a3d --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf52/nrf_mbr.h @@ -0,0 +1,241 @@ +/* + * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @defgroup nrf_mbr_api Master Boot Record API + @{ + + @brief APIs for updating SoftDevice and BootLoader + +*/ + +#ifndef NRF_MBR_H__ +#define NRF_MBR_H__ + +#include "nrf_svc.h" +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup NRF_MBR_DEFINES Defines + * @{ */ + +/**@brief MBR SVC Base number. */ +#define MBR_SVC_BASE (0x18) + +/**@brief Page size in words. */ +#define MBR_PAGE_SIZE_IN_WORDS (1024) + +/** @brief The size that must be reserved for the MBR when a SoftDevice is written to flash. +This is the offset where the first byte of the SoftDevice hex file is written.*/ +#define MBR_SIZE (0x1000) + +/** @} */ + +/** @addtogroup NRF_MBR_ENUMS Enumerations + * @{ */ + +/**@brief nRF Master Boot Record API SVC numbers. */ +enum NRF_MBR_SVCS +{ + SD_MBR_COMMAND = MBR_SVC_BASE, /**< ::sd_mbr_command */ +}; + +/**@brief Possible values for ::sd_mbr_command_t.command */ +enum NRF_MBR_COMMANDS +{ + SD_MBR_COMMAND_COPY_BL, /**< Copy a new BootLoader. @see ::sd_mbr_command_copy_bl_t*/ + SD_MBR_COMMAND_COPY_SD, /**< Copy a new SoftDevice. @see ::sd_mbr_command_copy_sd_t*/ + SD_MBR_COMMAND_INIT_SD, /**< Initialize forwarding interrupts to SD, and run reset function in SD. Does not require any parameters in ::sd_mbr_command_t params.*/ + SD_MBR_COMMAND_COMPARE, /**< This command works like memcmp. @see ::sd_mbr_command_compare_t*/ + SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET, /**< Change the address the MBR starts after a reset. @see ::sd_mbr_command_vector_table_base_set_t*/ + SD_MBR_COMMAND_RESERVED, + SD_MBR_COMMAND_IRQ_FORWARD_ADDRESS_SET, /**< Start forwarding all interrupts to this address. @see ::sd_mbr_command_irq_forward_address_set_t*/ +}; + +/** @} */ + +/** @addtogroup NRF_MBR_TYPES Types + * @{ */ + +/**@brief This command copies part of a new SoftDevice + * + * The destination area is erased before copying. + * If dst is in the middle of a flash page, that whole flash page will be erased. + * If (dst+len) is in the middle of a flash page, that whole flash page will be erased. + * + * The user of this function is responsible for setting the BPROT registers. + * + * @retval ::NRF_SUCCESS indicates that the contents of the memory blocks where copied correctly. + * @retval ::NRF_ERROR_INTERNAL indicates that the contents of the memory blocks where not verified correctly after copying. + */ +typedef struct +{ + uint32_t *src; /**< Pointer to the source of data to be copied.*/ + uint32_t *dst; /**< Pointer to the destination where the content is to be copied.*/ + uint32_t len; /**< Number of 32 bit words to copy. Must be a multiple of @ref MBR_PAGE_SIZE_IN_WORDS words.*/ +} sd_mbr_command_copy_sd_t; + + +/**@brief This command works like memcmp, but takes the length in words. + * + * @retval ::NRF_SUCCESS indicates that the contents of both memory blocks are equal. + * @retval ::NRF_ERROR_NULL indicates that the contents of the memory blocks are not equal. + */ +typedef struct +{ + uint32_t *ptr1; /**< Pointer to block of memory. */ + uint32_t *ptr2; /**< Pointer to block of memory. */ + uint32_t len; /**< Number of 32 bit words to compare.*/ +} sd_mbr_command_compare_t; + + +/**@brief This command copies a new BootLoader. + * + * With this command, destination of BootLoader is always the address written in + * NRF_UICR->BOOTADDR. + * + * Destination is erased by this function. + * If (destination+bl_len) is in the middle of a flash page, that whole flash page will be erased. + * + * This function will use PROTENSET to protect the flash that is not intended to be written. + * + * On success, this function will not return. It will start the new BootLoader from reset-vector as normal. + * + * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. + * @retval ::NRF_ERROR_FORBIDDEN if NRF_UICR->BOOTADDR is not set. + * @retval ::NRF_ERROR_INVALID_LENGTH if parameters attempts to read or write outside flash area. + * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) + */ +typedef struct +{ + uint32_t *bl_src; /**< Pointer to the source of the Bootloader to be be copied.*/ + uint32_t bl_len; /**< Number of 32 bit words to copy for BootLoader. */ +} sd_mbr_command_copy_bl_t; + +/**@brief Change the address the MBR starts after a reset + * + * Once this function has been called, this address is where the MBR will start to forward + * interrupts to after a reset. + * + * To restore default forwarding this function should be called with @ref address set to 0. The + * MBR will then start forwarding interrupts to the address in NFR_UICR->BOOTADDR or to the + * SoftDevice if the BOOTADDR is not set. + * + * On success, this function will not return. It will reset the device. + * + * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. + * @retval ::NRF_ERROR_INVALID_ADDR if parameter address is outside of the flash size. + * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) + */ +typedef struct +{ + uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ +} sd_mbr_command_vector_table_base_set_t; + +/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the MBR + * + * Unlike sd_mbr_command_vector_table_base_set_t, this function does not reset, and it does not + * change where the MBR starts after reset. + * + * @retval ::NRF_SUCCESS + */ +typedef struct +{ + uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ +} sd_mbr_command_irq_forward_address_set_t; + +/**@brief Input structure containing data used when calling ::sd_mbr_command + * + * Depending on what command value that is set, the corresponding params value type must also be + * set. See @ref NRF_MBR_COMMANDS for command types and corresponding params value type. If command + * @ref SD_MBR_COMMAND_INIT_SD is set, it is not necessary to set any values under params. + */ +typedef struct +{ + uint32_t command; /**< Type of command to be issued. See @ref NRF_MBR_COMMANDS. */ + union + { + sd_mbr_command_copy_sd_t copy_sd; /**< Parameters for copy SoftDevice.*/ + sd_mbr_command_compare_t compare; /**< Parameters for verify.*/ + sd_mbr_command_copy_bl_t copy_bl; /**< Parameters for copy BootLoader. Requires parameter page. */ + sd_mbr_command_vector_table_base_set_t base_set; /**< Parameters for vector table base set. Requires parameter page.*/ + sd_mbr_command_irq_forward_address_set_t irq_forward_address_set; /**< Parameters for irq forward address set*/ + } params; /**< Command parameters. */ +} sd_mbr_command_t; + +/** @} */ + +/** @addtogroup NRF_MBR_FUNCTIONS Functions + * @{ */ + +/**@brief Issue Master Boot Record commands + * + * Commands used when updating a SoftDevice and bootloader. + * + * The @ref SD_MBR_COMMAND_COPY_BL and @ref SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET requires + * parameters to be retained by the MBR when resetting the IC. This is done in a separate flash + * page provided by the application. The UICR register UICR.NRFFW[1] must be set to an address + * corresponding to a page in the application flash space. This page will be cleared by the MBR and + * used to store the command before reset. When the UICR.NRFFW[1] field is set the page it refers + * to must not be used by the application. If the UICR.NRFFW[1] is set to 0xFFFFFFFF (the default) + * MBR commands which use flash will be unavailable and return @ref NRF_ERROR_NO_MEM. + * + * @param[in] param Pointer to a struct describing the command. + * + * @note For return values, see ::sd_mbr_command_copy_sd_t, ::sd_mbr_command_copy_bl_t, + * ::sd_mbr_command_compare_t, ::sd_mbr_command_vector_table_base_set_t, + * ::sd_mbr_command_irq_forward_address_set_t + * + * @retval ::NRF_ERROR_NO_MEM if UICR.NRFFW[1] is not set (i.e. is 0xFFFFFFFF). + * @retval ::NRF_ERROR_INVALID_PARAM if an invalid command is given. +*/ +SVCALL(SD_MBR_COMMAND, uint32_t, sd_mbr_command(sd_mbr_command_t* param)); + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // NRF_MBR_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_ble.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_ble.h new file mode 100644 index 00000000000..9ebb41f5383 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_ble.h @@ -0,0 +1,622 @@ +/* + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON BLE SoftDevice Common + @{ + @defgroup ble_api Events, type definitions and API calls + @{ + + @brief Module independent events, type definitions and API calls for the BLE SoftDevice. + + */ + +#ifndef BLE_H__ +#define BLE_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_err.h" +#include "ble_gap.h" +#include "ble_l2cap.h" +#include "ble_gatt.h" +#include "ble_gattc.h" +#include "ble_gatts.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_COMMON_ENUMERATIONS Enumerations + * @{ */ + +/** + * @brief Common API SVC numbers. + */ +enum BLE_COMMON_SVCS +{ + SD_BLE_ENABLE = BLE_SVC_BASE, /**< Enable and initialize the BLE stack */ + SD_BLE_EVT_GET, /**< Get an event from the pending events queue. */ + SD_BLE_UUID_VS_ADD, /**< Add a Vendor Specific UUID. */ + SD_BLE_UUID_DECODE, /**< Decode UUID bytes. */ + SD_BLE_UUID_ENCODE, /**< Encode UUID bytes. */ + SD_BLE_VERSION_GET, /**< Get the local version information (company ID, Link Layer Version, Link Layer Subversion). */ + SD_BLE_USER_MEM_REPLY, /**< User Memory Reply. */ + SD_BLE_OPT_SET, /**< Set a BLE option. */ + SD_BLE_OPT_GET, /**< Get a BLE option. */ + SD_BLE_CFG_SET, /**< Add a configuration to the BLE stack. */ +}; + +/** + * @brief BLE Module Independent Event IDs. + */ +enum BLE_COMMON_EVTS +{ + BLE_EVT_USER_MEM_REQUEST = BLE_EVT_BASE + 0, /**< User Memory request. @ref ble_evt_user_mem_request_t */ + BLE_EVT_USER_MEM_RELEASE = BLE_EVT_BASE + 1, /**< User Memory release. @ref ble_evt_user_mem_release_t */ +}; + +/**@brief BLE Connection Configuration IDs. + * + * IDs that uniquely identify a connection configuration. + */ +enum BLE_CONN_CFGS +{ + BLE_CONN_CFG_GAP = BLE_CONN_CFG_BASE + 0, /**< BLE GAP specific connection configuration. */ + BLE_CONN_CFG_GATTC = BLE_CONN_CFG_BASE + 1, /**< BLE GATTC specific connection configuration. */ + BLE_CONN_CFG_GATTS = BLE_CONN_CFG_BASE + 2, /**< BLE GATTS specific connection configuration. */ + BLE_CONN_CFG_GATT = BLE_CONN_CFG_BASE + 3, /**< BLE GATT specific connection configuration. */ + BLE_CONN_CFG_L2CAP = BLE_CONN_CFG_BASE + 4, /**< BLE L2CAP specific connection configuration. */ +}; + +/**@brief BLE Common Configuration IDs. + * + * IDs that uniquely identify a common configuration. + */ +enum BLE_COMMON_CFGS +{ + BLE_COMMON_CFG_VS_UUID = BLE_CFG_BASE, /**< Vendor specific UUID configuration */ +}; + +/**@brief Common Option IDs. + * IDs that uniquely identify a common option. + */ +enum BLE_COMMON_OPTS +{ + BLE_COMMON_OPT_PA_LNA = BLE_OPT_BASE + 0, /**< PA and LNA options */ + BLE_COMMON_OPT_CONN_EVT_EXT = BLE_OPT_BASE + 1, /**< Extended connection events option */ +}; + +/** @} */ + +/** @addtogroup BLE_COMMON_DEFINES Defines + * @{ */ + +/** @brief Required pointer alignment for BLE Events. +*/ +#define BLE_EVT_PTR_ALIGNMENT 4 + +/** @brief Leaves the maximum of the two arguments. +*/ +#define BLE_MAX(a, b) ((a) < (b) ? (b) : (a)) + +/** @brief Maximum possible length for BLE Events. + * @note The highest value used for @ref ble_gatt_conn_cfg_t::att_mtu in any connection configuration shall be used as a parameter. + * If that value has not been configured for any connections then @ref BLE_GATT_ATT_MTU_DEFAULT must be used instead. +*/ +#define BLE_EVT_LEN_MAX(ATT_MTU) ( \ + offsetof(ble_evt_t, evt.gattc_evt.params.prim_srvc_disc_rsp.services) + ((ATT_MTU) - 1) / 4 * sizeof(ble_gattc_service_t) \ +) + +/** @defgroup BLE_USER_MEM_TYPES User Memory Types + * @{ */ +#define BLE_USER_MEM_TYPE_INVALID 0x00 /**< Invalid User Memory Types. */ +#define BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES 0x01 /**< User Memory for GATTS queued writes. */ +/** @} */ + +/** @defgroup BLE_UUID_VS_COUNTS Vendor Specific UUID counts + * @{ + */ +#define BLE_UUID_VS_COUNT_DEFAULT 10 /**< Default VS UUID count. */ +#define BLE_UUID_VS_COUNT_MAX 254 /**< Maximum VS UUID count. */ +/** @} */ + +/** @defgroup BLE_COMMON_CFG_DEFAULTS Configuration defaults. + * @{ + */ +#define BLE_CONN_CFG_TAG_DEFAULT 0 /**< Default configuration tag, SoftDevice default connection configuration. */ + +/** @} */ + +/** @} */ + +/** @addtogroup BLE_COMMON_STRUCTURES Structures + * @{ */ + +/**@brief User Memory Block. */ +typedef struct +{ + uint8_t *p_mem; /**< Pointer to the start of the user memory block. */ + uint16_t len; /**< Length in bytes of the user memory block. */ +} ble_user_mem_block_t; + +/**@brief Event structure for @ref BLE_EVT_USER_MEM_REQUEST. */ +typedef struct +{ + uint8_t type; /**< User memory type, see @ref BLE_USER_MEM_TYPES. */ +} ble_evt_user_mem_request_t; + +/**@brief Event structure for @ref BLE_EVT_USER_MEM_RELEASE. */ +typedef struct +{ + uint8_t type; /**< User memory type, see @ref BLE_USER_MEM_TYPES. */ + ble_user_mem_block_t mem_block; /**< User memory block */ +} ble_evt_user_mem_release_t; + +/**@brief Event structure for events not associated with a specific function module. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which this event occurred. */ + union + { + ble_evt_user_mem_request_t user_mem_request; /**< User Memory Request Event Parameters. */ + ble_evt_user_mem_release_t user_mem_release; /**< User Memory Release Event Parameters. */ + } params; /**< Event parameter union. */ +} ble_common_evt_t; + +/**@brief BLE Event header. */ +typedef struct +{ + uint16_t evt_id; /**< Value from a BLE__EVT series. */ + uint16_t evt_len; /**< Length in octets including this header. */ +} ble_evt_hdr_t; + +/**@brief Common BLE Event type, wrapping the module specific event reports. */ +typedef struct +{ + ble_evt_hdr_t header; /**< Event header. */ + union + { + ble_common_evt_t common_evt; /**< Common Event, evt_id in BLE_EVT_* series. */ + ble_gap_evt_t gap_evt; /**< GAP originated event, evt_id in BLE_GAP_EVT_* series. */ + ble_gattc_evt_t gattc_evt; /**< GATT client originated event, evt_id in BLE_GATTC_EVT* series. */ + ble_gatts_evt_t gatts_evt; /**< GATT server originated event, evt_id in BLE_GATTS_EVT* series. */ + ble_l2cap_evt_t l2cap_evt; /**< L2CAP originated event, evt_id in BLE_L2CAP_EVT* series. */ + } evt; /**< Event union. */ +} ble_evt_t; + + +/** + * @brief Version Information. + */ +typedef struct +{ + uint8_t version_number; /**< Link Layer Version number. See https://www.bluetooth.org/en-us/specification/assigned-numbers/link-layer for assigned values. */ + uint16_t company_id; /**< Company ID, Nordic Semiconductor's company ID is 89 (0x0059) (https://www.bluetooth.org/apps/content/Default.aspx?doc_id=49708). */ + uint16_t subversion_number; /**< Link Layer Sub Version number, corresponds to the SoftDevice Config ID or Firmware ID (FWID). */ +} ble_version_t; + +/** + * @brief Configuration parameters for the PA and LNA. + */ +typedef struct +{ + uint8_t enable :1; /**< Enable toggling for this amplifier */ + uint8_t active_high :1; /**< Set the pin to be active high */ + uint8_t gpio_pin :6; /**< The GPIO pin to toggle for this amplifier */ +} ble_pa_lna_cfg_t; + +/** + * @brief PA & LNA GPIO toggle configuration + * + * This option configures the SoftDevice to toggle pins when the radio is active for use with a power amplifier and/or + * a low noise amplifier. + * + * Toggling the pins is achieved by using two PPI channels and a GPIOTE channel. The hardware channel IDs are provided + * by the application and should be regarded as reserved as long as any PA/LNA toggling is enabled. + * + * @note @ref sd_ble_opt_get is not supported for this option. + * @note Setting this option while the radio is in use (i.e. any of the roles are active) may have undefined consequences + * and must be avoided by the application. + */ +typedef struct +{ + ble_pa_lna_cfg_t pa_cfg; /**< Power Amplifier configuration */ + ble_pa_lna_cfg_t lna_cfg; /**< Low Noise Amplifier configuration */ + + uint8_t ppi_ch_id_set; /**< PPI channel used for radio pin setting */ + uint8_t ppi_ch_id_clr; /**< PPI channel used for radio pin clearing */ + uint8_t gpiote_ch_id; /**< GPIOTE channel used for radio pin toggling */ +} ble_common_opt_pa_lna_t; + +/** + * @brief Configuration of extended BLE connection events. + * + * When enabled the SoftDevice will dynamically extend the connection event when possible. + * + * The connection event length is controlled by the connection configuration as set by @ref ble_gap_conn_cfg_t::event_length. + * The connection event can be extended if there is time to send another packet pair before the start of the next connection interval, + * and if there are no conflicts with other BLE roles requesting radio time. + * + * @note @ref sd_ble_opt_get is not supported for this option. + */ +typedef struct +{ + uint8_t enable : 1; /**< Enable extended BLE connection events, disabled by default. */ +} ble_common_opt_conn_evt_ext_t; + +/**@brief Option structure for common options. */ +typedef union +{ + ble_common_opt_pa_lna_t pa_lna; /**< Parameters for controlling PA and LNA pin toggling. */ + ble_common_opt_conn_evt_ext_t conn_evt_ext; /**< Parameters for enabling extended connection events. */ +} ble_common_opt_t; + +/**@brief Common BLE Option type, wrapping the module specific options. */ +typedef union +{ + ble_common_opt_t common_opt; /**< COMMON options, opt_id in @ref BLE_COMMON_OPTS series. */ + ble_gap_opt_t gap_opt; /**< GAP option, opt_id in @ref BLE_GAP_OPTS series. */ +} ble_opt_t; + +/**@brief BLE connection configuration type, wrapping the module specific configurations, set with + * @ref sd_ble_cfg_set. + * + * @note Connection configurations don't have to be set. + * In the case that no configurations has been set, or fewer connection configurations has been set than enabled connections, + * the default connection configuration will be automatically added for the remaining connections. + * When creating connections with the default configuration, @ref BLE_CONN_CFG_TAG_DEFAULT should be used in + * place of @ref ble_conn_cfg_t::conn_cfg_tag. + * + * @sa sd_ble_gap_adv_start() + * @sa sd_ble_gap_connect() + * + * @mscs + * @mmsc{@ref BLE_CONN_CFG} + * @endmscs + + */ +typedef struct +{ + uint8_t conn_cfg_tag; /**< The application chosen tag it can use with the + @ref sd_ble_gap_adv_start() and @ref sd_ble_gap_connect() calls + to select this configuration when creating a connection. + Must be different for all connection configurations added and not @ref BLE_CONN_CFG_TAG_DEFAULT. */ + union { + ble_gap_conn_cfg_t gap_conn_cfg; /**< GAP connection configuration, cfg_id is @ref BLE_CONN_CFG_GAP. */ + ble_gattc_conn_cfg_t gattc_conn_cfg; /**< GATTC connection configuration, cfg_id is @ref BLE_CONN_CFG_GATTC. */ + ble_gatts_conn_cfg_t gatts_conn_cfg; /**< GATTS connection configuration, cfg_id is @ref BLE_CONN_CFG_GATTS. */ + ble_gatt_conn_cfg_t gatt_conn_cfg; /**< GATT connection configuration, cfg_id is @ref BLE_CONN_CFG_GATT. */ + ble_l2cap_conn_cfg_t l2cap_conn_cfg; /**< L2CAP connection configuration, cfg_id is @ref BLE_CONN_CFG_L2CAP. */ + } params; /**< Connection configuration union. */ +} ble_conn_cfg_t; + +/** + * @brief Configuration of Vendor Specific UUIDs, set with @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_INVALID_PARAM Too many UUIDs configured. + */ +typedef struct +{ + uint8_t vs_uuid_count; /**< Number of 128-bit Vendor Specific UUID bases to allocate memory for. + Default value is @ref BLE_UUID_VS_COUNT_DEFAULT. Maximum value is + @ref BLE_UUID_VS_COUNT_MAX. */ +} ble_common_cfg_vs_uuid_t; + +/**@brief Common BLE Configuration type, wrapping the common configurations. */ +typedef union +{ + ble_common_cfg_vs_uuid_t vs_uuid_cfg; /**< Vendor specific UUID configuration, cfg_id is @ref BLE_COMMON_CFG_VS_UUID. */ +} ble_common_cfg_t; + +/**@brief BLE Configuration type, wrapping the module specific configurations. */ +typedef union +{ + ble_conn_cfg_t conn_cfg; /**< Connection specific configurations, cfg_id in @ref BLE_CONN_CFGS series. */ + ble_common_cfg_t common_cfg; /**< Global common configurations, cfg_id in @ref BLE_COMMON_CFGS series. */ + ble_gap_cfg_t gap_cfg; /**< Global GAP configurations, cfg_id in @ref BLE_GAP_CFGS series. */ + ble_gatts_cfg_t gatts_cfg; /**< Global GATTS configuration, cfg_id in @ref BLE_GATTS_CFGS series. */ +} ble_cfg_t; + +/** @} */ + +/** @addtogroup BLE_COMMON_FUNCTIONS Functions + * @{ */ + +/**@brief Enable the BLE stack + * + * @param[in, out] p_app_ram_base Pointer to a variable containing the start address of the + * application RAM region (APP_RAM_BASE). On return, this will + * contain the minimum start address of the application RAM region + * required by the SoftDevice for this configuration. + * + * @note The memory requirement for a specific configuration will not increase between SoftDevices + * with the same major version number. + * + * @note The value of *p_app_ram_base when the app has done no custom configuration of the + * SoftDevice, i.e. the app has not called @ref sd_ble_cfg_set before @ref sd_ble_enable, can + * be found in the release notes. + * + * @note At runtime the IC's RAM is split into 2 regions: The SoftDevice RAM region is located + * between 0x20000000 and APP_RAM_BASE-1 and the application's RAM region is located between + * APP_RAM_BASE and the start of the call stack. + * + * @details This call initializes the BLE stack, no BLE related function other than @ref + * sd_ble_cfg_set can be called before this one. + * + * @mscs + * @mmsc{@ref BLE_COMMON_ENABLE} + * @endmscs + * + * @retval ::NRF_SUCCESS The BLE stack has been initialized successfully. + * @retval ::NRF_ERROR_INVALID_STATE The BLE stack had already been initialized and cannot be reinitialized. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. + * @retval ::NRF_ERROR_NO_MEM The amount of memory assigned to the SoftDevice by *p_app_ram_base is not + * large enough to fit this configuration's memory requirement. Check *p_app_ram_base + * and set the start address of the application RAM region accordingly. + */ +SVCALL(SD_BLE_ENABLE, uint32_t, sd_ble_enable(uint32_t * p_app_ram_base)); + +/**@brief Add configurations for the BLE stack + * + * @param[in] cfg_id Config ID, see @ref BLE_CONN_CFGS, @ref BLE_COMMON_CFGS, @ref + * BLE_GAP_CFGS or @ref BLE_GATTS_CFGS. + * @param[in] p_cfg Pointer to a ble_cfg_t structure containing the configuration value. + * @param[in] app_ram_base The start address of the application RAM region (APP_RAM_BASE). + * See @ref sd_ble_enable for details about APP_RAM_BASE. + * + * @note The memory requirement for a specific configuration will not increase between SoftDevices + * with the same major version number. + * + * @note If a configuration is set more than once, the last one set is the one that takes effect on + * @ref sd_ble_enable. + * + * @note Any part of the BLE stack that is NOT configured with @ref sd_ble_cfg_set will have default + * configuration. + * + * @note @ref sd_ble_cfg_set may be called at any time when the SoftDevice is enabled (see @ref + * sd_softdevice_enable) while the BLE part of the SoftDevice is not enabled (see @ref + * sd_ble_enable). + * + * @note Error codes for the configurations are described in the configuration structs. + * + * @mscs + * @mmsc{@ref BLE_COMMON_ENABLE} + * @endmscs + * + * @retval ::NRF_SUCCESS The configuration has been added successfully. + * @retval ::NRF_ERROR_INVALID_STATE The BLE stack had already been initialized. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid cfg_id supplied. + * @retval ::NRF_ERROR_NO_MEM The amount of memory assigned to the SoftDevice by app_ram_base is not + * large enough to fit this configuration's memory requirement. + */ +SVCALL(SD_BLE_CFG_SET, uint32_t, sd_ble_cfg_set(uint32_t cfg_id, ble_cfg_t const * p_cfg, uint32_t app_ram_base)); + +/**@brief Get an event from the pending events queue. + * + * @param[out] p_dest Pointer to buffer to be filled in with an event, or NULL to retrieve the event length. + * This buffer must be aligned to the extend defined by @ref BLE_EVT_PTR_ALIGNMENT. + * The buffer should be interpreted as a @ref ble_evt_t struct. + * @param[in, out] p_len Pointer the length of the buffer, on return it is filled with the event length. + * + * @details This call allows the application to pull a BLE event from the BLE stack. The application is signaled that + * an event is available from the BLE stack by the triggering of the SD_EVT_IRQn interrupt. + * The application is free to choose whether to call this function from thread mode (main context) or directly from the + * Interrupt Service Routine that maps to SD_EVT_IRQn. In any case however, and because the BLE stack runs at a higher + * priority than the application, this function should be called in a loop (until @ref NRF_ERROR_NOT_FOUND is returned) + * every time SD_EVT_IRQn is raised to ensure that all available events are pulled from the BLE stack. Failure to do so + * could potentially leave events in the internal queue without the application being aware of this fact. + * + * Sizing the p_dest buffer is equally important, since the application needs to provide all the memory necessary for the event to + * be copied into application memory. If the buffer provided is not large enough to fit the entire contents of the event, + * @ref NRF_ERROR_DATA_SIZE will be returned and the application can then call again with a larger buffer size. + * The maximum possible event length is defined by @ref BLE_EVT_LEN_MAX. The application may also "peek" the event length + * by providing p_dest as a NULL pointer and inspecting the value of *p_len upon return: + * + * \code + * uint16_t len; + * errcode = sd_ble_evt_get(NULL, &len); + * \endcode + * + * @mscs + * @mmsc{@ref BLE_COMMON_IRQ_EVT_MSC} + * @mmsc{@ref BLE_COMMON_THREAD_EVT_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Event pulled and stored into the supplied buffer. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. + * @retval ::NRF_ERROR_NOT_FOUND No events ready to be pulled. + * @retval ::NRF_ERROR_DATA_SIZE Event ready but could not fit into the supplied buffer. + */ +SVCALL(SD_BLE_EVT_GET, uint32_t, sd_ble_evt_get(uint8_t *p_dest, uint16_t *p_len)); + + +/**@brief Add a Vendor Specific base UUID. + * + * @details This call enables the application to add a vendor specific base UUID to the BLE stack's table, for later + * use with all other modules and APIs. This then allows the application to use the shorter, 24-bit @ref ble_uuid_t + * format when dealing with both 16-bit and 128-bit UUIDs without having to check for lengths and having split code + * paths. This is accomplished by extending the grouping mechanism that the Bluetooth SIG standard base UUID uses + * for all other 128-bit UUIDs. The type field in the @ref ble_uuid_t structure is an index (relative to + * @ref BLE_UUID_TYPE_VENDOR_BEGIN) to the table populated by multiple calls to this function, and the UUID field + * in the same structure contains the 2 bytes at indexes 12 and 13. The number of possible 128-bit UUIDs available to + * the application is therefore the number of Vendor Specific UUIDs added with the help of this function times 65536, + * although restricted to modifying bytes 12 and 13 for each of the entries in the supplied array. + * + * @note Bytes 12 and 13 of the provided UUID will not be used internally, since those are always replaced by + * the 16-bit uuid field in @ref ble_uuid_t. + * + * @note If a UUID is already present in the BLE stack's internal table, the corresponding index will be returned in + * p_uuid_type along with an @ref NRF_SUCCESS error code. + * + * @param[in] p_vs_uuid Pointer to a 16-octet (128-bit) little endian Vendor Specific UUID disregarding + * bytes 12 and 13. + * @param[out] p_uuid_type Pointer to a uint8_t where the type field in @ref ble_uuid_t corresponding to this UUID will be stored. + * + * @retval ::NRF_SUCCESS Successfully added the Vendor Specific UUID. + * @retval ::NRF_ERROR_INVALID_ADDR If p_vs_uuid or p_uuid_type is NULL or invalid. + * @retval ::NRF_ERROR_NO_MEM If there are no more free slots for VS UUIDs. + */ +SVCALL(SD_BLE_UUID_VS_ADD, uint32_t, sd_ble_uuid_vs_add(ble_uuid128_t const *p_vs_uuid, uint8_t *p_uuid_type)); + + +/** @brief Decode little endian raw UUID bytes (16-bit or 128-bit) into a 24 bit @ref ble_uuid_t structure. + * + * @details The raw UUID bytes excluding bytes 12 and 13 (i.e. bytes 0-11 and 14-15) of p_uuid_le are compared + * to the corresponding ones in each entry of the table of vendor specific UUIDs populated with @ref sd_ble_uuid_vs_add + * to look for a match. If there is such a match, bytes 12 and 13 are returned as p_uuid->uuid and the index + * relative to @ref BLE_UUID_TYPE_VENDOR_BEGIN as p_uuid->type. + * + * @note If the UUID length supplied is 2, then the type set by this call will always be @ref BLE_UUID_TYPE_BLE. + * + * @param[in] uuid_le_len Length in bytes of the buffer pointed to by p_uuid_le (must be 2 or 16 bytes). + * @param[in] p_uuid_le Pointer pointing to little endian raw UUID bytes. + * @param[out] p_uuid Pointer to a @ref ble_uuid_t structure to be filled in. + * + * @retval ::NRF_SUCCESS Successfully decoded into the @ref ble_uuid_t structure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_LENGTH Invalid UUID length. + * @retval ::NRF_ERROR_NOT_FOUND For a 128-bit UUID, no match in the populated table of UUIDs. + */ +SVCALL(SD_BLE_UUID_DECODE, uint32_t, sd_ble_uuid_decode(uint8_t uuid_le_len, uint8_t const *p_uuid_le, ble_uuid_t *p_uuid)); + + +/** @brief Encode a @ref ble_uuid_t structure into little endian raw UUID bytes (16-bit or 128-bit). + * + * @note The pointer to the destination buffer p_uuid_le may be NULL, in which case only the validity and size of p_uuid is computed. + * + * @param[in] p_uuid Pointer to a @ref ble_uuid_t structure that will be encoded into bytes. + * @param[out] p_uuid_le_len Pointer to a uint8_t that will be filled with the encoded length (2 or 16 bytes). + * @param[out] p_uuid_le Pointer to a buffer where the little endian raw UUID bytes (2 or 16) will be stored. + * + * @retval ::NRF_SUCCESS Successfully encoded into the buffer. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid UUID type. + */ +SVCALL(SD_BLE_UUID_ENCODE, uint32_t, sd_ble_uuid_encode(ble_uuid_t const *p_uuid, uint8_t *p_uuid_le_len, uint8_t *p_uuid_le)); + + +/**@brief Get Version Information. + * + * @details This call allows the application to get the BLE stack version information. + * + * @param[out] p_version Pointer to a ble_version_t structure to be filled in. + * + * @retval ::NRF_SUCCESS Version information stored successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY The BLE stack is busy (typically doing a locally-initiated disconnection procedure). + */ +SVCALL(SD_BLE_VERSION_GET, uint32_t, sd_ble_version_get(ble_version_t *p_version)); + + +/**@brief Provide a user memory block. + * + * @note This call can only be used as a response to a @ref BLE_EVT_USER_MEM_REQUEST event issued to the application. + * + * @param[in] conn_handle Connection handle. + * @param[in] p_block Pointer to a user memory block structure or NULL if memory is managed by the application. + * + * @mscs + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_PEER_CANCEL_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_NOAUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Successfully queued a response to the peer. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_LENGTH Invalid user memory block length supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection state or no user memory request pending. + */ +SVCALL(SD_BLE_USER_MEM_REPLY, uint32_t, sd_ble_user_mem_reply(uint16_t conn_handle, ble_user_mem_block_t const *p_block)); + +/**@brief Set a BLE option. + * + * @details This call allows the application to set the value of an option. + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC} + * @endmscs + * + * @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS. + * @param[in] p_opt Pointer to a ble_opt_t structure containing the option value. + * + * @retval ::NRF_SUCCESS Option set successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. + * @retval ::NRF_ERROR_INVALID_STATE Unable to set the parameter at this time. + * @retval ::NRF_ERROR_BUSY The BLE stack is busy or the previous procedure has not completed. + */ +SVCALL(SD_BLE_OPT_SET, uint32_t, sd_ble_opt_set(uint32_t opt_id, ble_opt_t const *p_opt)); + + +/**@brief Get a BLE option. + * + * @details This call allows the application to retrieve the value of an option. + * + * @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS. + * @param[out] p_opt Pointer to a ble_opt_t structure to be filled in. + * + * @retval ::NRF_SUCCESS Option retrieved successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. + * @retval ::NRF_ERROR_INVALID_STATE Unable to retrieve the parameter at this time. + * @retval ::NRF_ERROR_BUSY The BLE stack is busy or the previous procedure has not completed. + * @retval ::NRF_ERROR_NOT_SUPPORTED This option is not supported. + * + */ +SVCALL(SD_BLE_OPT_GET, uint32_t, sd_ble_opt_get(uint32_t opt_id, ble_opt_t *p_opt)); + +/** @} */ +#ifdef __cplusplus +} +#endif +#endif /* BLE_H__ */ + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_error.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_error.h new file mode 100644 index 00000000000..6badee98e56 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_error.h @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** + @defgroup nrf_error SoftDevice Global Error Codes + @{ + + @brief Global Error definitions +*/ + +/* Header guard */ +#ifndef NRF_ERROR_H__ +#define NRF_ERROR_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/** @defgroup NRF_ERRORS_BASE Error Codes Base number definitions + * @{ */ +#define NRF_ERROR_BASE_NUM (0x0) ///< Global error base +#define NRF_ERROR_SDM_BASE_NUM (0x1000) ///< SDM error base +#define NRF_ERROR_SOC_BASE_NUM (0x2000) ///< SoC error base +#define NRF_ERROR_STK_BASE_NUM (0x3000) ///< STK error base +/** @} */ + +#define NRF_SUCCESS (NRF_ERROR_BASE_NUM + 0) ///< Successful command +#define NRF_ERROR_SVC_HANDLER_MISSING (NRF_ERROR_BASE_NUM + 1) ///< SVC handler is missing +#define NRF_ERROR_SOFTDEVICE_NOT_ENABLED (NRF_ERROR_BASE_NUM + 2) ///< SoftDevice has not been enabled +#define NRF_ERROR_INTERNAL (NRF_ERROR_BASE_NUM + 3) ///< Internal Error +#define NRF_ERROR_NO_MEM (NRF_ERROR_BASE_NUM + 4) ///< No Memory for operation +#define NRF_ERROR_NOT_FOUND (NRF_ERROR_BASE_NUM + 5) ///< Not found +#define NRF_ERROR_NOT_SUPPORTED (NRF_ERROR_BASE_NUM + 6) ///< Not supported +#define NRF_ERROR_INVALID_PARAM (NRF_ERROR_BASE_NUM + 7) ///< Invalid Parameter +#define NRF_ERROR_INVALID_STATE (NRF_ERROR_BASE_NUM + 8) ///< Invalid state, operation disallowed in this state +#define NRF_ERROR_INVALID_LENGTH (NRF_ERROR_BASE_NUM + 9) ///< Invalid Length +#define NRF_ERROR_INVALID_FLAGS (NRF_ERROR_BASE_NUM + 10) ///< Invalid Flags +#define NRF_ERROR_INVALID_DATA (NRF_ERROR_BASE_NUM + 11) ///< Invalid Data +#define NRF_ERROR_DATA_SIZE (NRF_ERROR_BASE_NUM + 12) ///< Invalid Data size +#define NRF_ERROR_TIMEOUT (NRF_ERROR_BASE_NUM + 13) ///< Operation timed out +#define NRF_ERROR_NULL (NRF_ERROR_BASE_NUM + 14) ///< Null Pointer +#define NRF_ERROR_FORBIDDEN (NRF_ERROR_BASE_NUM + 15) ///< Forbidden Operation +#define NRF_ERROR_INVALID_ADDR (NRF_ERROR_BASE_NUM + 16) ///< Bad Memory Address +#define NRF_ERROR_BUSY (NRF_ERROR_BASE_NUM + 17) ///< Busy +#define NRF_ERROR_CONN_COUNT (NRF_ERROR_BASE_NUM + 18) ///< Maximum connection count exceeded. +#define NRF_ERROR_RESOURCES (NRF_ERROR_BASE_NUM + 19) ///< Not enough resources for operation + +#ifdef __cplusplus +} +#endif +#endif // NRF_ERROR_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_error_sdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_error_sdm.h new file mode 100644 index 00000000000..530959b9d67 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_error_sdm.h @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** + @addtogroup nrf_sdm_api + @{ + @defgroup nrf_sdm_error SoftDevice Manager Error Codes + @{ + + @brief Error definitions for the SDM API +*/ + +/* Header guard */ +#ifndef NRF_ERROR_SDM_H__ +#define NRF_ERROR_SDM_H__ + +#include "nrf_error.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN (NRF_ERROR_SDM_BASE_NUM + 0) ///< Unknown LFCLK source. +#define NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION (NRF_ERROR_SDM_BASE_NUM + 1) ///< Incorrect interrupt configuration (can be caused by using illegal priority levels, or having enabled SoftDevice interrupts). +#define NRF_ERROR_SDM_INCORRECT_CLENR0 (NRF_ERROR_SDM_BASE_NUM + 2) ///< Incorrect CLENR0 (can be caused by erroneous SoftDevice flashing). + +#ifdef __cplusplus +} +#endif +#endif // NRF_ERROR_SDM_H__ + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_error_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_error_soc.h new file mode 100644 index 00000000000..1e784b8db38 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_error_soc.h @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup nrf_soc_api + @{ + @defgroup nrf_soc_error SoC Library Error Codes + @{ + + @brief Error definitions for the SoC library + +*/ + +/* Header guard */ +#ifndef NRF_ERROR_SOC_H__ +#define NRF_ERROR_SOC_H__ + +#include "nrf_error.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* Mutex Errors */ +#define NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN (NRF_ERROR_SOC_BASE_NUM + 0) ///< Mutex already taken + +/* NVIC errors */ +#define NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE (NRF_ERROR_SOC_BASE_NUM + 1) ///< NVIC interrupt not available +#define NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED (NRF_ERROR_SOC_BASE_NUM + 2) ///< NVIC interrupt priority not allowed +#define NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN (NRF_ERROR_SOC_BASE_NUM + 3) ///< NVIC should not return + +/* Power errors */ +#define NRF_ERROR_SOC_POWER_MODE_UNKNOWN (NRF_ERROR_SOC_BASE_NUM + 4) ///< Power mode unknown +#define NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN (NRF_ERROR_SOC_BASE_NUM + 5) ///< Power POF threshold unknown +#define NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN (NRF_ERROR_SOC_BASE_NUM + 6) ///< Power off should not return + +/* Rand errors */ +#define NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES (NRF_ERROR_SOC_BASE_NUM + 7) ///< RAND not enough values + +/* PPI errors */ +#define NRF_ERROR_SOC_PPI_INVALID_CHANNEL (NRF_ERROR_SOC_BASE_NUM + 8) ///< Invalid PPI Channel +#define NRF_ERROR_SOC_PPI_INVALID_GROUP (NRF_ERROR_SOC_BASE_NUM + 9) ///< Invalid PPI Group + +#ifdef __cplusplus +} +#endif +#endif // NRF_ERROR_SOC_H__ +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_nvic.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_nvic.h new file mode 100644 index 00000000000..f5c7e8e0286 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_nvic.h @@ -0,0 +1,486 @@ +/* + * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @defgroup nrf_nvic_api SoftDevice NVIC API + * @{ + * + * @note In order to use this module, the following code has to be added to a .c file: + * \code + * nrf_nvic_state_t nrf_nvic_state = {0}; + * \endcode + * + * @note Definitions and declarations starting with __ (double underscore) in this header file are + * not intended for direct use by the application. + * + * @brief APIs for the accessing NVIC when using a SoftDevice. + * + */ + +#ifndef NRF_NVIC_H__ +#define NRF_NVIC_H__ + +#include +#include "nrf.h" +#include "nrf_svc.h" +#include "nrf_error.h" +#include "nrf_error_soc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@addtogroup NRF_NVIC_DEFINES Defines + * @{ */ + +/**@defgroup NRF_NVIC_ISER_DEFINES SoftDevice NVIC internal definitions + * @{ */ + +#define __NRF_NVIC_NVMC_IRQn (30) /**< The peripheral ID of the NVMC. IRQ numbers are used to identify peripherals, but the NVMC doesn't have an IRQ number in the MDK. */ + +#define __NRF_NVIC_ISER_COUNT (2) /**< The number of ISER/ICER registers in the NVIC that are used. */ + +/**@brief Interrupts used by the SoftDevice, with IRQn in the range 0-31. */ +#define __NRF_NVIC_SD_IRQS_0 ((uint32_t)( \ + (1U << POWER_CLOCK_IRQn) \ + | (1U << RADIO_IRQn) \ + | (1U << RTC0_IRQn) \ + | (1U << TIMER0_IRQn) \ + | (1U << RNG_IRQn) \ + | (1U << ECB_IRQn) \ + | (1U << CCM_AAR_IRQn) \ + | (1U << TEMP_IRQn) \ + | (1U << __NRF_NVIC_NVMC_IRQn) \ + | (1U << (uint32_t)SWI5_IRQn) \ + )) + +/**@brief Interrupts used by the SoftDevice, with IRQn in the range 32-63. */ +#define __NRF_NVIC_SD_IRQS_1 ((uint32_t)0) + +/**@brief Interrupts available for to application, with IRQn in the range 0-31. */ +#define __NRF_NVIC_APP_IRQS_0 (~__NRF_NVIC_SD_IRQS_0) + +/**@brief Interrupts available for to application, with IRQn in the range 32-63. */ +#define __NRF_NVIC_APP_IRQS_1 (~__NRF_NVIC_SD_IRQS_1) + +/**@} */ + +/**@} */ + +/**@addtogroup NRF_NVIC_VARIABLES Variables + * @{ */ + +/**@brief Type representing the state struct for the SoftDevice NVIC module. */ +typedef struct +{ + uint32_t volatile __irq_masks[__NRF_NVIC_ISER_COUNT]; /**< IRQs enabled by the application in the NVIC. */ + uint32_t volatile __cr_flag; /**< Non-zero if already in a critical region */ +} nrf_nvic_state_t; + +/**@brief Variable keeping the state for the SoftDevice NVIC module. This must be declared in an + * application source file. */ +extern nrf_nvic_state_t nrf_nvic_state; + +/**@} */ + +/**@addtogroup NRF_NVIC_INTERNAL_FUNCTIONS SoftDevice NVIC internal functions + * @{ */ + +/**@brief Disables IRQ interrupts globally, including the SoftDevice's interrupts. + * + * @retval The value of PRIMASK prior to disabling the interrupts. + */ +__STATIC_INLINE int __sd_nvic_irq_disable(void); + +/**@brief Enables IRQ interrupts globally, including the SoftDevice's interrupts. + */ +__STATIC_INLINE void __sd_nvic_irq_enable(void); + +/**@brief Checks if IRQn is available to application + * @param[in] IRQn IRQ to check + * + * @retval 1 (true) if the IRQ to check is available to the application + */ +__STATIC_INLINE uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn); + +/**@brief Checks if priority is available to application + * @param[in] priority priority to check + * + * @retval 1 (true) if the priority to check is available to the application + */ +__STATIC_INLINE uint32_t __sd_nvic_is_app_accessible_priority(uint32_t priority); + +/**@} */ + +/**@addtogroup NRF_NVIC_FUNCTIONS SoftDevice NVIC public functions + * @{ */ + +/**@brief Enable External Interrupt. + * @note Corresponds to NVIC_EnableIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_EnableIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt was enabled. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt has a priority not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn); + +/**@brief Disable External Interrupt. + * @note Corresponds to NVIC_DisableIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_DisableIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt was disabled. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn); + +/**@brief Get Pending Interrupt. + * @note Corresponds to NVIC_GetPendingIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_GetPendingIRQ documentation in CMSIS. + * @param[out] p_pending_irq Return value from NVIC_GetPendingIRQ. + * + * @retval ::NRF_SUCCESS The interrupt is available for the application. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq); + +/**@brief Set Pending Interrupt. + * @note Corresponds to NVIC_SetPendingIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_SetPendingIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt is set pending. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn); + +/**@brief Clear Pending Interrupt. + * @note Corresponds to NVIC_ClearPendingIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_ClearPendingIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt pending flag is cleared. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn); + +/**@brief Set Interrupt Priority. + * @note Corresponds to NVIC_SetPriority in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * @pre Priority is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_SetPriority documentation in CMSIS. + * @param[in] priority A valid IRQ priority for use by the application. + * + * @retval ::NRF_SUCCESS The interrupt and priority level is available for the application. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt priority is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority); + +/**@brief Get Interrupt Priority. + * @note Corresponds to NVIC_GetPriority in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_GetPriority documentation in CMSIS. + * @param[out] p_priority Return value from NVIC_GetPriority. + * + * @retval ::NRF_SUCCESS The interrupt priority is returned in p_priority. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE - IRQn is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority); + +/**@brief System Reset. + * @note Corresponds to NVIC_SystemReset in CMSIS. + * + * @retval ::NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN + */ +__STATIC_INLINE uint32_t sd_nvic_SystemReset(void); + +/**@brief Enter critical region. + * + * @post Application interrupts will be disabled. + * @note sd_nvic_critical_region_enter() and ::sd_nvic_critical_region_exit() must be called in matching pairs inside each + * execution context + * @sa sd_nvic_critical_region_exit + * + * @param[out] p_is_nested_critical_region If 1, the application is now in a nested critical region. + * + * @retval ::NRF_SUCCESS + */ +__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region); + +/**@brief Exit critical region. + * + * @pre Application has entered a critical region using ::sd_nvic_critical_region_enter. + * @post If not in a nested critical region, the application interrupts will restored to the state before ::sd_nvic_critical_region_enter was called. + * + * @param[in] is_nested_critical_region If this is set to 1, the critical region won't be exited. @sa sd_nvic_critical_region_enter. + * + * @retval ::NRF_SUCCESS + */ +__STATIC_INLINE uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region); + +/**@} */ + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE int __sd_nvic_irq_disable(void) +{ + int pm = __get_PRIMASK(); + __disable_irq(); + return pm; +} + +__STATIC_INLINE void __sd_nvic_irq_enable(void) +{ + __enable_irq(); +} + +__STATIC_INLINE uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn) +{ + if (IRQn < 32) + { + return ((1UL<= (1 << __NVIC_PRIO_BITS)) + { + return 0; + } + if( priority == 0 + || priority == 1 + || priority == 4 + ) + { + return 0; + } + return 1; +} + + +__STATIC_INLINE uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn) +{ + if (!__sd_nvic_app_accessible_irq(IRQn)) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } + if (!__sd_nvic_is_app_accessible_priority(NVIC_GetPriority(IRQn))) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED; + } + + if (nrf_nvic_state.__cr_flag) + { + nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] |= (uint32_t)(1 << ((uint32_t)((int32_t)IRQn) & (uint32_t)0x1F)); + } + else + { + NVIC_EnableIRQ(IRQn); + } + return NRF_SUCCESS; +} + +__STATIC_INLINE uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn) +{ + if (!__sd_nvic_app_accessible_irq(IRQn)) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } + + if (nrf_nvic_state.__cr_flag) + { + nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] &= ~(1UL << ((uint32_t)(IRQn) & 0x1F)); + } + else + { + NVIC_DisableIRQ(IRQn); + } + + return NRF_SUCCESS; +} + +__STATIC_INLINE uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq) +{ + if (__sd_nvic_app_accessible_irq(IRQn)) + { + *p_pending_irq = NVIC_GetPendingIRQ(IRQn); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } +} + +__STATIC_INLINE uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn) +{ + if (__sd_nvic_app_accessible_irq(IRQn)) + { + NVIC_SetPendingIRQ(IRQn); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } +} + +__STATIC_INLINE uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn) +{ + if (__sd_nvic_app_accessible_irq(IRQn)) + { + NVIC_ClearPendingIRQ(IRQn); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } +} + +__STATIC_INLINE uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if (!__sd_nvic_app_accessible_irq(IRQn)) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } + + if (!__sd_nvic_is_app_accessible_priority(priority)) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED; + } + + NVIC_SetPriority(IRQn, (uint32_t)priority); + return NRF_SUCCESS; +} + +__STATIC_INLINE uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority) +{ + if (__sd_nvic_app_accessible_irq(IRQn)) + { + *p_priority = (NVIC_GetPriority(IRQn) & 0xFF); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } +} + +__STATIC_INLINE uint32_t sd_nvic_SystemReset(void) +{ + NVIC_SystemReset(); + return NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN; +} + +__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region) +{ + int was_masked = __sd_nvic_irq_disable(); + if (!nrf_nvic_state.__cr_flag) + { + nrf_nvic_state.__cr_flag = 1; + nrf_nvic_state.__irq_masks[0] = ( NVIC->ICER[0] & __NRF_NVIC_APP_IRQS_0 ); + NVIC->ICER[0] = __NRF_NVIC_APP_IRQS_0; + nrf_nvic_state.__irq_masks[1] = ( NVIC->ICER[1] & __NRF_NVIC_APP_IRQS_1 ); + NVIC->ICER[1] = __NRF_NVIC_APP_IRQS_1; + *p_is_nested_critical_region = 0; + } + else + { + *p_is_nested_critical_region = 1; + } + if (!was_masked) + { + __sd_nvic_irq_enable(); + } + return NRF_SUCCESS; +} + +__STATIC_INLINE uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region) +{ + if (nrf_nvic_state.__cr_flag && (is_nested_critical_region == 0)) + { + int was_masked = __sd_nvic_irq_disable(); + NVIC->ISER[0] = nrf_nvic_state.__irq_masks[0]; + NVIC->ISER[1] = nrf_nvic_state.__irq_masks[1]; + nrf_nvic_state.__cr_flag = 0; + if (!was_masked) + { + __sd_nvic_irq_enable(); + } + } + + return NRF_SUCCESS; +} + +#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_NVIC_H__ + +/**@} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_sd_def.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_sd_def.h new file mode 100644 index 00000000000..c9ab241872e --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_sd_def.h @@ -0,0 +1,59 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_SD_DEF_H__ +#define NRF_SD_DEF_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#define SD_PPI_CHANNELS_USED 0xFFFE0000uL /**< PPI channels utilized by SotfDevice (not available to the application). */ +#define SD_PPI_GROUPS_USED 0x0000000CuL /**< PPI groups utilized by SoftDevice (not available to the application). */ +#define SD_TIMERS_USED 0x00000001uL /**< Timers used by SoftDevice. */ +#define SD_SWI_USED 0x0000003CuL /**< Software interrupts used by SoftDevice */ + + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_SD_DEF_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_sdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_sdm.h new file mode 100644 index 00000000000..8c48d936786 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_sdm.h @@ -0,0 +1,358 @@ +/* + * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @defgroup nrf_sdm_api SoftDevice Manager API + @{ + + @brief APIs for SoftDevice management. + +*/ + +#ifndef NRF_SDM_H__ +#define NRF_SDM_H__ + +#include +#include "nrf.h" +#include "nrf_svc.h" +#include "nrf_error.h" +#include "nrf_error_sdm.h" +#include "nrf_soc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup NRF_SDM_DEFINES Defines + * @{ */ +#ifdef NRFSOC_DOXYGEN +/// Declared in nrf_mbr.h +#define MBR_SIZE 0 +#warning test +#endif + +/** @brief The major version for the SoftDevice binary distributed with this header file. */ +#define SD_MAJOR_VERSION (6) + +/** @brief The minor version for the SoftDevice binary distributed with this header file. */ +#define SD_MINOR_VERSION (0) + +/** @brief The bugfix version for the SoftDevice binary distributed with this header file. */ +#define SD_BUGFIX_VERSION (0) + +/** @brief The full version number for the SoftDevice binary this header file was distributed + * with, as a decimal number in the form Mmmmbbb, where: + * - M is major version (one or more digits) + * - mmm is minor version (three digits) + * - bbb is bugfix version (three digits). */ +#define SD_VERSION (SD_MAJOR_VERSION * 1000000 + SD_MINOR_VERSION * 1000 + SD_BUGFIX_VERSION) + +/** @brief SoftDevice Manager SVC Base number. */ +#define SDM_SVC_BASE 0x10 + +/** @brief SoftDevice unique string size in bytes. */ +#define SD_UNIQUE_STR_SIZE 20 + +/** @brief Invalid info field. Returned when an info field does not exist. */ +#define SDM_INFO_FIELD_INVALID (0) + +/** @brief Defines the SoftDevice Information Structure location (address) as an offset from +the start of the SoftDevice (without MBR)*/ +#define SOFTDEVICE_INFO_STRUCT_OFFSET (0x2000) + +/** @brief Defines the absolute SoftDevice Information Structure location (address) when the + * SoftDevice is installed just above the MBR (the usual case). */ +#define SOFTDEVICE_INFO_STRUCT_ADDRESS (SOFTDEVICE_INFO_STRUCT_OFFSET + MBR_SIZE) + +/** @brief Defines the offset for the SoftDevice Information Structure size value relative to the + * SoftDevice base address. The size value is of type uint8_t. */ +#define SD_INFO_STRUCT_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET) + +/** @brief Defines the offset for the SoftDevice size value relative to the SoftDevice base address. + * The size value is of type uint32_t. */ +#define SD_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x08) + +/** @brief Defines the offset for FWID value relative to the SoftDevice base address. The FWID value + * is of type uint16_t. */ +#define SD_FWID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x0C) + +/** @brief Defines the offset for the SoftDevice ID relative to the SoftDevice base address. The ID + * is of type uint32_t. */ +#define SD_ID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x10) + +/** @brief Defines the offset for the SoftDevice version relative to the SoftDevice base address in + * the same format as @ref SD_VERSION, stored as an uint32_t. */ +#define SD_VERSION_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x14) + +/** @brief Defines the offset for the SoftDevice unique string relative to the SoftDevice base address. + * The SD_UNIQUE_STR is stored as an array of uint8_t. The size of array is @ref SD_UNIQUE_STR_SIZE. + */ +#define SD_UNIQUE_STR_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x18) + +/** @brief Defines a macro for retrieving the actual SoftDevice Information Structure size value + * from a given base address. Use @ref MBR_SIZE as the argument when the SoftDevice is + * installed just above the MBR (the usual case). */ +#define SD_INFO_STRUCT_SIZE_GET(baseaddr) (*((uint8_t *) ((baseaddr) + SD_INFO_STRUCT_SIZE_OFFSET))) + +/** @brief Defines a macro for retrieving the actual SoftDevice size value from a given base + * address. Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above + * the MBR (the usual case). */ +#define SD_SIZE_GET(baseaddr) (*((uint32_t *) ((baseaddr) + SD_SIZE_OFFSET))) + +/** @brief Defines a macro for retrieving the actual FWID value from a given base address. Use + * @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the usual + * case). */ +#define SD_FWID_GET(baseaddr) (*((uint16_t *) ((baseaddr) + SD_FWID_OFFSET))) + +/** @brief Defines a macro for retrieving the actual SoftDevice ID from a given base address. Use + * @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the + * usual case). */ +#define SD_ID_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_ID_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ + ? (*((uint32_t *) ((baseaddr) + SD_ID_OFFSET))) : SDM_INFO_FIELD_INVALID) + +/** @brief Defines a macro for retrieving the actual SoftDevice version from a given base address. + * Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR + * (the usual case). */ +#define SD_VERSION_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_VERSION_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ + ? (*((uint32_t *) ((baseaddr) + SD_VERSION_OFFSET))) : SDM_INFO_FIELD_INVALID) + +/** @brief Defines a macro for retrieving the address of SoftDevice unique str based on a given base address. + * Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR + * (the usual case). */ +#define SD_UNIQUE_STR_ADDR_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_UNIQUE_STR_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ + ? (((uint8_t *) ((baseaddr) + SD_UNIQUE_STR_OFFSET))) : SDM_INFO_FIELD_INVALID) + +/**@defgroup NRF_FAULT_ID_RANGES Fault ID ranges + * @{ */ +#define NRF_FAULT_ID_SD_RANGE_START 0x00000000 /**< SoftDevice ID range start. */ +#define NRF_FAULT_ID_APP_RANGE_START 0x00001000 /**< Application ID range start. */ +/**@} */ + +/**@defgroup NRF_FAULT_IDS Fault ID types + * @{ */ +#define NRF_FAULT_ID_SD_ASSERT (NRF_FAULT_ID_SD_RANGE_START + 1) /**< SoftDevice assertion. The info parameter is reserved for future used. */ +#define NRF_FAULT_ID_APP_MEMACC (NRF_FAULT_ID_APP_RANGE_START + 1) /**< Application invalid memory access. The info parameter will contain 0x00000000, + in case of SoftDevice RAM access violation. In case of SoftDevice peripheral + register violation the info parameter will contain the sub-region number of + PREGION[0], on whose address range the disallowed write access caused the + memory access fault. */ +/**@} */ + +/** @} */ + +/** @addtogroup NRF_SDM_ENUMS Enumerations + * @{ */ + +/**@brief nRF SoftDevice Manager API SVC numbers. */ +enum NRF_SD_SVCS +{ + SD_SOFTDEVICE_ENABLE = SDM_SVC_BASE, /**< ::sd_softdevice_enable */ + SD_SOFTDEVICE_DISABLE, /**< ::sd_softdevice_disable */ + SD_SOFTDEVICE_IS_ENABLED, /**< ::sd_softdevice_is_enabled */ + SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, /**< ::sd_softdevice_vector_table_base_set */ + SVC_SDM_LAST /**< Placeholder for last SDM SVC */ +}; + +/** @} */ + +/** @addtogroup NRF_SDM_DEFINES Defines + * @{ */ + +/**@defgroup NRF_CLOCK_LF_ACCURACY Clock accuracy + * @{ */ + +#define NRF_CLOCK_LF_ACCURACY_250_PPM (0) /**< Default: 250 ppm */ +#define NRF_CLOCK_LF_ACCURACY_500_PPM (1) /**< 500 ppm */ +#define NRF_CLOCK_LF_ACCURACY_150_PPM (2) /**< 150 ppm */ +#define NRF_CLOCK_LF_ACCURACY_100_PPM (3) /**< 100 ppm */ +#define NRF_CLOCK_LF_ACCURACY_75_PPM (4) /**< 75 ppm */ +#define NRF_CLOCK_LF_ACCURACY_50_PPM (5) /**< 50 ppm */ +#define NRF_CLOCK_LF_ACCURACY_30_PPM (6) /**< 30 ppm */ +#define NRF_CLOCK_LF_ACCURACY_20_PPM (7) /**< 20 ppm */ +#define NRF_CLOCK_LF_ACCURACY_10_PPM (8) /**< 10 ppm */ +#define NRF_CLOCK_LF_ACCURACY_5_PPM (9) /**< 5 ppm */ +#define NRF_CLOCK_LF_ACCURACY_2_PPM (10) /**< 2 ppm */ +#define NRF_CLOCK_LF_ACCURACY_1_PPM (11) /**< 1 ppm */ + +/** @} */ + +/**@defgroup NRF_CLOCK_LF_SRC Possible LFCLK oscillator sources + * @{ */ + +#define NRF_CLOCK_LF_SRC_RC (0) /**< LFCLK RC oscillator. */ +#define NRF_CLOCK_LF_SRC_XTAL (1) /**< LFCLK crystal oscillator. */ +#define NRF_CLOCK_LF_SRC_SYNTH (2) /**< LFCLK Synthesized from HFCLK. */ + +/** @} */ + +/** @} */ + +/** @addtogroup NRF_SDM_TYPES Types + * @{ */ + +/**@brief Type representing LFCLK oscillator source. */ +typedef struct +{ + uint8_t source; /**< LF oscillator clock source, see @ref NRF_CLOCK_LF_SRC. */ + uint8_t rc_ctiv; /**< Only for ::NRF_CLOCK_LF_SRC_RC: Calibration timer interval in 1/4 second + units (nRF52: 1-32). + @note To avoid excessive clock drift, 0.5 degrees Celsius is the + maximum temperature change allowed in one calibration timer + interval. The interval should be selected to ensure this. + + @note Must be 0 if source is not ::NRF_CLOCK_LF_SRC_RC. */ + uint8_t rc_temp_ctiv; /**< Only for ::NRF_CLOCK_LF_SRC_RC: How often (in number of calibration + intervals) the RC oscillator shall be calibrated if the temperature + hasn't changed. + 0: Always calibrate even if the temperature hasn't changed. + 1: Only calibrate if the temperature has changed (legacy - nRF51 only). + 2-33: Check the temperature and only calibrate if it has changed, + however calibration will take place every rc_temp_ctiv + intervals in any case. + + @note Must be 0 if source is not ::NRF_CLOCK_LF_SRC_RC. + + @note For nRF52, the application must ensure calibration at least once + every 8 seconds to ensure +/-500 ppm clock stability. The + recommended configuration for ::NRF_CLOCK_LF_SRC_RC on nRF52 is + rc_ctiv=16 and rc_temp_ctiv=2. This will ensure calibration at + least once every 8 seconds and for temperature changes of 0.5 + degrees Celsius every 4 seconds. See the Product Specification + for the nRF52 device being used for more information.*/ + uint8_t accuracy; /**< External clock accuracy used in the LL to compute timing + windows, see @ref NRF_CLOCK_LF_ACCURACY.*/ +} nrf_clock_lf_cfg_t; + +/**@brief Fault Handler type. + * + * When certain unrecoverable errors occur within the application or SoftDevice the fault handler will be called back. + * The protocol stack will be in an undefined state when this happens and the only way to recover will be to + * perform a reset, using e.g. CMSIS NVIC_SystemReset(). + * If the application returns from the fault handler the SoftDevice will call NVIC_SystemReset(). + * + * @note This callback is executed in HardFault context, thus SVC functions cannot be called from the fault callback. + * + * @param[in] id Fault identifier. See @ref NRF_FAULT_IDS. + * @param[in] pc The program counter of the instruction that triggered the fault. + * @param[in] info Optional additional information regarding the fault. Refer to each Fault identifier for details. + * + * @note When id is set to @ref NRF_FAULT_ID_APP_MEMACC, pc will contain the address of the instruction being executed at the time when + * the fault is detected by the CPU. The CPU program counter may have advanced up to 2 instructions (no branching) after the one that triggered the fault. + */ +typedef void (*nrf_fault_handler_t)(uint32_t id, uint32_t pc, uint32_t info); + +/** @} */ + +/** @addtogroup NRF_SDM_FUNCTIONS Functions + * @{ */ + +/**@brief Enables the SoftDevice and by extension the protocol stack. + * + * @note Some care must be taken if a low frequency clock source is already running when calling this function: + * If the LF clock has a different source then the one currently running, it will be stopped. Then, the new + * clock source will be started. + * + * @note This function has no effect when returning with an error. + * + * @post If return code is ::NRF_SUCCESS + * - SoC library and protocol stack APIs are made available. + * - A portion of RAM will be unavailable (see relevant SDS documentation). + * - Some peripherals will be unavailable or available only through the SoC API (see relevant SDS documentation). + * - Interrupts will not arrive from protected peripherals or interrupts. + * - nrf_nvic_ functions must be used instead of CMSIS NVIC_ functions for reliable usage of the SoftDevice. + * - Interrupt latency may be affected by the SoftDevice (see relevant SDS documentation). + * - Chosen low frequency clock source will be running. + * + * @param p_clock_lf_cfg Low frequency clock source and accuracy. + If NULL the clock will be configured as an RC source with rc_ctiv = 16 and .rc_temp_ctiv = 2 + In the case of XTAL source, the PPM accuracy of the chosen clock source must be greater than or equal to the actual characteristics of your XTAL clock. + * @param fault_handler Callback to be invoked in case of fault, cannot be NULL. + * + * @retval ::NRF_SUCCESS + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE SoftDevice is already enabled, and the clock source and fault handler cannot be updated. + * @retval ::NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION SoftDevice interrupt is already enabled, or an enabled interrupt has an illegal priority level. + * @retval ::NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN Unknown low frequency clock source selected. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid clock source configuration supplied in p_clock_lf_cfg. + */ +SVCALL(SD_SOFTDEVICE_ENABLE, uint32_t, sd_softdevice_enable(nrf_clock_lf_cfg_t const * p_clock_lf_cfg, nrf_fault_handler_t fault_handler)); + + +/**@brief Disables the SoftDevice and by extension the protocol stack. + * + * Idempotent function to disable the SoftDevice. + * + * @post SoC library and protocol stack APIs are made unavailable. + * @post All interrupts that was protected by the SoftDevice will be disabled and initialized to priority 0 (highest). + * @post All peripherals used by the SoftDevice will be reset to default values. + * @post All of RAM become available. + * @post All interrupts are forwarded to the application. + * @post LFCLK source chosen in ::sd_softdevice_enable will be left running. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_SOFTDEVICE_DISABLE, uint32_t, sd_softdevice_disable(void)); + +/**@brief Check if the SoftDevice is enabled. + * + * @param[out] p_softdevice_enabled If the SoftDevice is enabled: 1 else 0. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_SOFTDEVICE_IS_ENABLED, uint32_t, sd_softdevice_is_enabled(uint8_t * p_softdevice_enabled)); + +/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the SoftDevice + * + * This function is only intended to be called when a bootloader is enabled. + * + * @param[in] address The base address of the interrupt vector table for forwarded interrupts. + + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, uint32_t, sd_softdevice_vector_table_base_set(uint32_t address)); + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // NRF_SDM_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_soc.h new file mode 100644 index 00000000000..2c4d958750c --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_soc.h @@ -0,0 +1,964 @@ +/* + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @defgroup nrf_soc_api SoC Library API + * @{ + * + * @brief APIs for the SoC library. + * + */ + +#ifndef NRF_SOC_H__ +#define NRF_SOC_H__ + +#include +#include "nrf.h" +#include "nrf_svc.h" +#include "nrf_error.h" +#include "nrf_error_soc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@addtogroup NRF_SOC_DEFINES Defines + * @{ */ + +/**@brief The number of the lowest SVC number reserved for the SoC library. */ +#define SOC_SVC_BASE (0x20) /**< Base value for SVCs that are available when the SoftDevice is disabled. */ +#define SOC_SVC_BASE_NOT_AVAILABLE (0x2C) /**< Base value for SVCs that are not available when the SoftDevice is disabled. */ + +/**@brief Guaranteed time for application to process radio inactive notification. */ +#define NRF_RADIO_NOTIFICATION_INACTIVE_GUARANTEED_TIME_US (62) + +/**@brief The minimum allowed timeslot extension time. */ +#define NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US (200) + +/**@brief The maximum processing time to handle a timeslot extension. */ +#define NRF_RADIO_MAX_EXTENSION_PROCESSING_TIME_US (17) + +/**@brief The latest time before the end of a timeslot the timeslot can be extended. */ +#define NRF_RADIO_MIN_EXTENSION_MARGIN_US (79) + +#define SOC_ECB_KEY_LENGTH (16) /**< ECB key length. */ +#define SOC_ECB_CLEARTEXT_LENGTH (16) /**< ECB cleartext length. */ +#define SOC_ECB_CIPHERTEXT_LENGTH (SOC_ECB_CLEARTEXT_LENGTH) /**< ECB ciphertext length. */ + +#define SD_EVT_IRQn (SWI2_IRQn) /**< SoftDevice Event IRQ number. Used for both protocol events and SoC events. */ +#define SD_EVT_IRQHandler (SWI2_IRQHandler) /**< SoftDevice Event IRQ handler. Used for both protocol events and SoC events. + The default interrupt priority for this handler is set to 4 */ +#define RADIO_NOTIFICATION_IRQn (SWI1_IRQn) /**< The radio notification IRQ number. */ +#define RADIO_NOTIFICATION_IRQHandler (SWI1_IRQHandler) /**< The radio notification IRQ handler. + The default interrupt priority for this handler is set to 4 */ +#define NRF_RADIO_LENGTH_MIN_US (100) /**< The shortest allowed radio timeslot, in microseconds. */ +#define NRF_RADIO_LENGTH_MAX_US (100000) /**< The longest allowed radio timeslot, in microseconds. */ + +#define NRF_RADIO_DISTANCE_MAX_US (128000000UL - 1UL) /**< The longest timeslot distance, in microseconds, allowed for the distance parameter (see @ref nrf_radio_request_normal_t) in the request. */ + +#define NRF_RADIO_EARLIEST_TIMEOUT_MAX_US (128000000UL - 1UL) /**< The longest timeout, in microseconds, allowed when requesting the earliest possible timeslot. */ + +#define NRF_RADIO_START_JITTER_US (2) /**< The maximum jitter in @ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START relative to the requested start time. */ + +/**@} */ + +/**@addtogroup NRF_SOC_ENUMS Enumerations + * @{ */ + +/**@brief The SVC numbers used by the SVC functions in the SoC library. */ +enum NRF_SOC_SVCS +{ + SD_PPI_CHANNEL_ENABLE_GET = SOC_SVC_BASE, + SD_PPI_CHANNEL_ENABLE_SET = SOC_SVC_BASE + 1, + SD_PPI_CHANNEL_ENABLE_CLR = SOC_SVC_BASE + 2, + SD_PPI_CHANNEL_ASSIGN = SOC_SVC_BASE + 3, + SD_PPI_GROUP_TASK_ENABLE = SOC_SVC_BASE + 4, + SD_PPI_GROUP_TASK_DISABLE = SOC_SVC_BASE + 5, + SD_PPI_GROUP_ASSIGN = SOC_SVC_BASE + 6, + SD_PPI_GROUP_GET = SOC_SVC_BASE + 7, + SD_FLASH_PAGE_ERASE = SOC_SVC_BASE + 8, + SD_FLASH_WRITE = SOC_SVC_BASE + 9, + SD_FLASH_PROTECT = SOC_SVC_BASE + 10, + SD_PROTECTED_REGISTER_WRITE = SOC_SVC_BASE + 11, + SD_MUTEX_NEW = SOC_SVC_BASE_NOT_AVAILABLE, + SD_MUTEX_ACQUIRE = SOC_SVC_BASE_NOT_AVAILABLE + 1, + SD_MUTEX_RELEASE = SOC_SVC_BASE_NOT_AVAILABLE + 2, + SD_RAND_APPLICATION_POOL_CAPACITY_GET = SOC_SVC_BASE_NOT_AVAILABLE + 3, + SD_RAND_APPLICATION_BYTES_AVAILABLE_GET = SOC_SVC_BASE_NOT_AVAILABLE + 4, + SD_RAND_APPLICATION_VECTOR_GET = SOC_SVC_BASE_NOT_AVAILABLE + 5, + SD_POWER_MODE_SET = SOC_SVC_BASE_NOT_AVAILABLE + 6, + SD_POWER_SYSTEM_OFF = SOC_SVC_BASE_NOT_AVAILABLE + 7, + SD_POWER_RESET_REASON_GET = SOC_SVC_BASE_NOT_AVAILABLE + 8, + SD_POWER_RESET_REASON_CLR = SOC_SVC_BASE_NOT_AVAILABLE + 9, + SD_POWER_POF_ENABLE = SOC_SVC_BASE_NOT_AVAILABLE + 10, + SD_POWER_POF_THRESHOLD_SET = SOC_SVC_BASE_NOT_AVAILABLE + 11, + SD_POWER_RAM_POWER_SET = SOC_SVC_BASE_NOT_AVAILABLE + 13, + SD_POWER_RAM_POWER_CLR = SOC_SVC_BASE_NOT_AVAILABLE + 14, + SD_POWER_RAM_POWER_GET = SOC_SVC_BASE_NOT_AVAILABLE + 15, + SD_POWER_GPREGRET_SET = SOC_SVC_BASE_NOT_AVAILABLE + 16, + SD_POWER_GPREGRET_CLR = SOC_SVC_BASE_NOT_AVAILABLE + 17, + SD_POWER_GPREGRET_GET = SOC_SVC_BASE_NOT_AVAILABLE + 18, + SD_POWER_DCDC_MODE_SET = SOC_SVC_BASE_NOT_AVAILABLE + 19, + SD_APP_EVT_WAIT = SOC_SVC_BASE_NOT_AVAILABLE + 21, + SD_CLOCK_HFCLK_REQUEST = SOC_SVC_BASE_NOT_AVAILABLE + 22, + SD_CLOCK_HFCLK_RELEASE = SOC_SVC_BASE_NOT_AVAILABLE + 23, + SD_CLOCK_HFCLK_IS_RUNNING = SOC_SVC_BASE_NOT_AVAILABLE + 24, + SD_RADIO_NOTIFICATION_CFG_SET = SOC_SVC_BASE_NOT_AVAILABLE + 25, + SD_ECB_BLOCK_ENCRYPT = SOC_SVC_BASE_NOT_AVAILABLE + 26, + SD_ECB_BLOCKS_ENCRYPT = SOC_SVC_BASE_NOT_AVAILABLE + 27, + SD_RADIO_SESSION_OPEN = SOC_SVC_BASE_NOT_AVAILABLE + 28, + SD_RADIO_SESSION_CLOSE = SOC_SVC_BASE_NOT_AVAILABLE + 29, + SD_RADIO_REQUEST = SOC_SVC_BASE_NOT_AVAILABLE + 30, + SD_EVT_GET = SOC_SVC_BASE_NOT_AVAILABLE + 31, + SD_TEMP_GET = SOC_SVC_BASE_NOT_AVAILABLE + 32, + SVC_SOC_LAST = SOC_SVC_BASE_NOT_AVAILABLE + 37 +}; + +/**@brief Possible values of a ::nrf_mutex_t. */ +enum NRF_MUTEX_VALUES +{ + NRF_MUTEX_FREE, + NRF_MUTEX_TAKEN +}; + +/**@brief Power modes. */ +enum NRF_POWER_MODES +{ + NRF_POWER_MODE_CONSTLAT, /**< Constant latency mode. See power management in the reference manual. */ + NRF_POWER_MODE_LOWPWR /**< Low power mode. See power management in the reference manual. */ +}; + + +/**@brief Power failure thresholds */ +enum NRF_POWER_THRESHOLDS +{ + NRF_POWER_THRESHOLD_V17 = 4UL, /**< 1.7 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V18, /**< 1.8 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V19, /**< 1.9 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V20, /**< 2.0 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V21, /**< 2.1 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V22, /**< 2.2 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V23, /**< 2.3 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V24, /**< 2.4 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V25, /**< 2.5 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V26, /**< 2.6 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V27, /**< 2.7 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V28 /**< 2.8 Volts power failure threshold. */ +}; + + + +/**@brief DC/DC converter modes. */ +enum NRF_POWER_DCDC_MODES +{ + NRF_POWER_DCDC_DISABLE, /**< The DCDC is disabled. */ + NRF_POWER_DCDC_ENABLE /**< The DCDC is enabled. */ +}; + +/**@brief Radio notification distances. */ +enum NRF_RADIO_NOTIFICATION_DISTANCES +{ + NRF_RADIO_NOTIFICATION_DISTANCE_NONE = 0, /**< The event does not have a notification. */ + NRF_RADIO_NOTIFICATION_DISTANCE_800US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_1740US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_2680US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_3620US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_4560US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_5500US /**< The distance from the active notification to start of radio activity. */ +}; + + +/**@brief Radio notification types. */ +enum NRF_RADIO_NOTIFICATION_TYPES +{ + NRF_RADIO_NOTIFICATION_TYPE_NONE = 0, /**< The event does not have a radio notification signal. */ + NRF_RADIO_NOTIFICATION_TYPE_INT_ON_ACTIVE, /**< Using interrupt for notification when the radio will be enabled. */ + NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE, /**< Using interrupt for notification when the radio has been disabled. */ + NRF_RADIO_NOTIFICATION_TYPE_INT_ON_BOTH, /**< Using interrupt for notification both when the radio will be enabled and disabled. */ +}; + +/**@brief The Radio signal callback types. */ +enum NRF_RADIO_CALLBACK_SIGNAL_TYPE +{ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_START, /**< This signal indicates the start of the radio timeslot. */ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_TIMER0, /**< This signal indicates the NRF_TIMER0 interrupt. */ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_RADIO, /**< This signal indicates the NRF_RADIO interrupt. */ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_EXTEND_FAILED, /**< This signal indicates extend action failed. */ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_EXTEND_SUCCEEDED /**< This signal indicates extend action succeeded. */ +}; + +/**@brief The actions requested by the signal callback. + * + * This code gives the SOC instructions about what action to take when the signal callback has + * returned. + */ +enum NRF_RADIO_SIGNAL_CALLBACK_ACTION +{ + NRF_RADIO_SIGNAL_CALLBACK_ACTION_NONE, /**< Return without action. */ + NRF_RADIO_SIGNAL_CALLBACK_ACTION_EXTEND, /**< Request an extension of the current + timeslot. Maximum execution time for this action: + @ref NRF_RADIO_MAX_EXTENSION_PROCESSING_TIME_US. + This action must be started at least + @ref NRF_RADIO_MIN_EXTENSION_MARGIN_US before + the end of the timeslot. */ + NRF_RADIO_SIGNAL_CALLBACK_ACTION_END, /**< End the current radio timeslot. */ + NRF_RADIO_SIGNAL_CALLBACK_ACTION_REQUEST_AND_END /**< Request a new radio timeslot and end the current timeslot. */ +}; + +/**@brief Radio timeslot high frequency clock source configuration. */ +enum NRF_RADIO_HFCLK_CFG +{ + NRF_RADIO_HFCLK_CFG_XTAL_GUARANTEED, /**< The SoftDevice will guarantee that the high frequency clock source is the + external crystal for the whole duration of the timeslot. This should be the + preferred option for events that use the radio or require high timing accuracy. + @note The SoftDevice will automatically turn on and off the external crystal, + at the beginning and end of the timeslot, respectively. The crystal may also + intentionally be left running after the timeslot, in cases where it is needed + by the SoftDevice shortly after the end of the timeslot. */ + NRF_RADIO_HFCLK_CFG_NO_GUARANTEE /**< This configuration allows for earlier and tighter scheduling of timeslots. + The RC oscillator may be the clock source in part or for the whole duration of the timeslot. + The RC oscillator's accuracy must therefore be taken into consideration. + @note If the application will use the radio peripheral in timeslots with this configuration, + it must make sure that the crystal is running and stable before starting the radio. */ +}; + +/**@brief Radio timeslot priorities. */ +enum NRF_RADIO_PRIORITY +{ + NRF_RADIO_PRIORITY_HIGH, /**< High (equal priority as the normal connection priority of the SoftDevice stack(s)). */ + NRF_RADIO_PRIORITY_NORMAL, /**< Normal (equal priority as the priority of secondary activities of the SoftDevice stack(s)). */ +}; + +/**@brief Radio timeslot request type. */ +enum NRF_RADIO_REQUEST_TYPE +{ + NRF_RADIO_REQ_TYPE_EARLIEST, /**< Request radio timeslot as early as possible. This should always be used for the first request in a session. */ + NRF_RADIO_REQ_TYPE_NORMAL /**< Normal radio timeslot request. */ +}; + +/**@brief SoC Events. */ +enum NRF_SOC_EVTS +{ + NRF_EVT_HFCLKSTARTED, /**< Event indicating that the HFCLK has started. */ + NRF_EVT_POWER_FAILURE_WARNING, /**< Event indicating that a power failure warning has occurred. */ + NRF_EVT_FLASH_OPERATION_SUCCESS, /**< Event indicating that the ongoing flash operation has completed successfully. */ + NRF_EVT_FLASH_OPERATION_ERROR, /**< Event indicating that the ongoing flash operation has timed out with an error. */ + NRF_EVT_RADIO_BLOCKED, /**< Event indicating that a radio timeslot was blocked. */ + NRF_EVT_RADIO_CANCELED, /**< Event indicating that a radio timeslot was canceled by SoftDevice. */ + NRF_EVT_RADIO_SIGNAL_CALLBACK_INVALID_RETURN, /**< Event indicating that a radio timeslot signal callback handler return was invalid. */ + NRF_EVT_RADIO_SESSION_IDLE, /**< Event indicating that a radio timeslot session is idle. */ + NRF_EVT_RADIO_SESSION_CLOSED, /**< Event indicating that a radio timeslot session is closed. */ + NRF_EVT_NUMBER_OF_EVTS +}; + +/**@} */ + + +/**@addtogroup NRF_SOC_STRUCTURES Structures + * @{ */ + +/**@brief Represents a mutex for use with the nrf_mutex functions. + * @note Accessing the value directly is not safe, use the mutex functions! + */ +typedef volatile uint8_t nrf_mutex_t; + +/**@brief Parameters for a request for a timeslot as early as possible. */ +typedef struct +{ + uint8_t hfclk; /**< High frequency clock source, see @ref NRF_RADIO_HFCLK_CFG. */ + uint8_t priority; /**< The radio timeslot priority, see @ref NRF_RADIO_PRIORITY. */ + uint32_t length_us; /**< The radio timeslot length (in the range 100 to 100,000] microseconds). */ + uint32_t timeout_us; /**< Longest acceptable delay until the start of the requested timeslot (up to @ref NRF_RADIO_EARLIEST_TIMEOUT_MAX_US microseconds). */ +} nrf_radio_request_earliest_t; + +/**@brief Parameters for a normal radio timeslot request. */ +typedef struct +{ + uint8_t hfclk; /**< High frequency clock source, see @ref NRF_RADIO_HFCLK_CFG. */ + uint8_t priority; /**< The radio timeslot priority, see @ref NRF_RADIO_PRIORITY. */ + uint32_t distance_us; /**< Distance from the start of the previous radio timeslot (up to @ref NRF_RADIO_DISTANCE_MAX_US microseconds). */ + uint32_t length_us; /**< The radio timeslot length (in the range [100..100,000] microseconds). */ +} nrf_radio_request_normal_t; + +/**@brief Radio timeslot request parameters. */ +typedef struct +{ + uint8_t request_type; /**< Type of request, see @ref NRF_RADIO_REQUEST_TYPE. */ + union + { + nrf_radio_request_earliest_t earliest; /**< Parameters for requesting a radio timeslot as early as possible. */ + nrf_radio_request_normal_t normal; /**< Parameters for requesting a normal radio timeslot. */ + } params; /**< Parameter union. */ +} nrf_radio_request_t; + +/**@brief Return parameters of the radio timeslot signal callback. */ +typedef struct +{ + uint8_t callback_action; /**< The action requested by the application when returning from the signal callback, see @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION. */ + union + { + struct + { + nrf_radio_request_t * p_next; /**< The request parameters for the next radio timeslot. */ + } request; /**< Additional parameters for return_code @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION_REQUEST_AND_END. */ + struct + { + uint32_t length_us; /**< Requested extension of the radio timeslot duration (microseconds) (for minimum time see @ref NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US). */ + } extend; /**< Additional parameters for return_code @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION_EXTEND. */ + } params; /**< Parameter union. */ +} nrf_radio_signal_callback_return_param_t; + +/**@brief The radio timeslot signal callback type. + * + * @note In case of invalid return parameters, the radio timeslot will automatically end + * immediately after returning from the signal callback and the + * @ref NRF_EVT_RADIO_SIGNAL_CALLBACK_INVALID_RETURN event will be sent. + * @note The returned struct pointer must remain valid after the signal callback + * function returns. For instance, this means that it must not point to a stack variable. + * + * @param[in] signal_type Type of signal, see @ref NRF_RADIO_CALLBACK_SIGNAL_TYPE. + * + * @return Pointer to structure containing action requested by the application. + */ +typedef nrf_radio_signal_callback_return_param_t * (*nrf_radio_signal_callback_t) (uint8_t signal_type); + +/**@brief AES ECB parameter typedefs */ +typedef uint8_t soc_ecb_key_t[SOC_ECB_KEY_LENGTH]; /**< Encryption key type. */ +typedef uint8_t soc_ecb_cleartext_t[SOC_ECB_CLEARTEXT_LENGTH]; /**< Cleartext data type. */ +typedef uint8_t soc_ecb_ciphertext_t[SOC_ECB_CIPHERTEXT_LENGTH]; /**< Ciphertext data type. */ + +/**@brief AES ECB data structure */ +typedef struct +{ + soc_ecb_key_t key; /**< Encryption key. */ + soc_ecb_cleartext_t cleartext; /**< Cleartext data. */ + soc_ecb_ciphertext_t ciphertext; /**< Ciphertext data. */ +} nrf_ecb_hal_data_t; + +/**@brief AES ECB block. Used to provide multiple blocks in a single call + to @ref sd_ecb_blocks_encrypt.*/ +typedef struct +{ + soc_ecb_key_t const * p_key; /**< Pointer to the Encryption key. */ + soc_ecb_cleartext_t const * p_cleartext; /**< Pointer to the Cleartext data. */ + soc_ecb_ciphertext_t * p_ciphertext; /**< Pointer to the Ciphertext data. */ +} nrf_ecb_hal_data_block_t; + +/**@} */ + +/**@addtogroup NRF_SOC_FUNCTIONS Functions + * @{ */ + +/**@brief Initialize a mutex. + * + * @param[in] p_mutex Pointer to the mutex to initialize. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_MUTEX_NEW, uint32_t, sd_mutex_new(nrf_mutex_t * p_mutex)); + +/**@brief Attempt to acquire a mutex. + * + * @param[in] p_mutex Pointer to the mutex to acquire. + * + * @retval ::NRF_SUCCESS The mutex was successfully acquired. + * @retval ::NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN The mutex could not be acquired. + */ +SVCALL(SD_MUTEX_ACQUIRE, uint32_t, sd_mutex_acquire(nrf_mutex_t * p_mutex)); + +/**@brief Release a mutex. + * + * @param[in] p_mutex Pointer to the mutex to release. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_MUTEX_RELEASE, uint32_t, sd_mutex_release(nrf_mutex_t * p_mutex)); + +/**@brief Query the capacity of the application random pool. + * + * @param[out] p_pool_capacity The capacity of the pool. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_RAND_APPLICATION_POOL_CAPACITY_GET, uint32_t, sd_rand_application_pool_capacity_get(uint8_t * p_pool_capacity)); + +/**@brief Get number of random bytes available to the application. + * + * @param[out] p_bytes_available The number of bytes currently available in the pool. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_RAND_APPLICATION_BYTES_AVAILABLE_GET, uint32_t, sd_rand_application_bytes_available_get(uint8_t * p_bytes_available)); + +/**@brief Get random bytes from the application pool. + * + * @param[out] p_buff Pointer to unit8_t buffer for storing the bytes. + * @param[in] length Number of bytes to take from pool and place in p_buff. + * + * @retval ::NRF_SUCCESS The requested bytes were written to p_buff. + * @retval ::NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES No bytes were written to the buffer, because there were not enough bytes available. +*/ +SVCALL(SD_RAND_APPLICATION_VECTOR_GET, uint32_t, sd_rand_application_vector_get(uint8_t * p_buff, uint8_t length)); + +/**@brief Gets the reset reason register. + * + * @param[out] p_reset_reason Contents of the NRF_POWER->RESETREAS register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RESET_REASON_GET, uint32_t, sd_power_reset_reason_get(uint32_t * p_reset_reason)); + +/**@brief Clears the bits of the reset reason register. + * + * @param[in] reset_reason_clr_msk Contains the bits to clear from the reset reason register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RESET_REASON_CLR, uint32_t, sd_power_reset_reason_clr(uint32_t reset_reason_clr_msk)); + +/**@brief Sets the power mode when in CPU sleep. + * + * @param[in] power_mode The power mode to use when in CPU sleep, see @ref NRF_POWER_MODES. @sa sd_app_evt_wait + * + * @retval ::NRF_SUCCESS The power mode was set. + * @retval ::NRF_ERROR_SOC_POWER_MODE_UNKNOWN The power mode was unknown. + */ +SVCALL(SD_POWER_MODE_SET, uint32_t, sd_power_mode_set(uint8_t power_mode)); + +/**@brief Puts the chip in System OFF mode. + * + * @retval ::NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN + */ +SVCALL(SD_POWER_SYSTEM_OFF, uint32_t, sd_power_system_off(void)); + +/**@brief Enables or disables the power-fail comparator. + * + * Enabling this will give a SoftDevice event (NRF_EVT_POWER_FAILURE_WARNING) when the power failure warning occurs. + * The event can be retrieved with sd_evt_get(); + * + * @param[in] pof_enable True if the power-fail comparator should be enabled, false if it should be disabled. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_POF_ENABLE, uint32_t, sd_power_pof_enable(uint8_t pof_enable)); + + +/**@brief Sets the power failure comparator threshold value. + * + * + * @param[in] threshold The power-fail threshold value to use, see @ref NRF_POWER_THRESHOLDS. + * + * @retval ::NRF_SUCCESS The power failure threshold was set. + * @retval ::NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN The power failure threshold is unknown. + */ +SVCALL(SD_POWER_POF_THRESHOLD_SET, uint32_t, sd_power_pof_threshold_set(uint8_t threshold)); + + +/**@brief Writes the NRF_POWER->RAM[index].POWERSET register. + * + * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWERSET register to write to. + * @param[in] ram_powerset Contains the word to write to the NRF_POWER->RAM[index].POWERSET register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RAM_POWER_SET, uint32_t, sd_power_ram_power_set(uint8_t index, uint32_t ram_powerset)); + +/**@brief Writes the NRF_POWER->RAM[index].POWERCLR register. + * + * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWERCLR register to write to. + * @param[in] ram_powerclr Contains the word to write to the NRF_POWER->RAM[index].POWERCLR register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RAM_POWER_CLR, uint32_t, sd_power_ram_power_clr(uint8_t index, uint32_t ram_powerclr)); + +/**@brief Get contents of NRF_POWER->RAM[index].POWER register, indicates power status of RAM[index] blocks. + * + * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWER register to read from. + * @param[out] p_ram_power Content of NRF_POWER->RAM[index].POWER register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RAM_POWER_GET, uint32_t, sd_power_ram_power_get(uint8_t index, uint32_t * p_ram_power)); + +/**@brief Set bits in the general purpose retention registers (NRF_POWER->GPREGRET*). + * + * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. + * @param[in] gpregret_msk Bits to be set in the GPREGRET register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_GPREGRET_SET, uint32_t, sd_power_gpregret_set(uint32_t gpregret_id, uint32_t gpregret_msk)); + +/**@brief Clear bits in the general purpose retention registers (NRF_POWER->GPREGRET*). + * + * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. + * @param[in] gpregret_msk Bits to be clear in the GPREGRET register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_GPREGRET_CLR, uint32_t, sd_power_gpregret_clr(uint32_t gpregret_id, uint32_t gpregret_msk)); + +/**@brief Get contents of the general purpose retention registers (NRF_POWER->GPREGRET*). + * + * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. + * @param[out] p_gpregret Contents of the GPREGRET register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_GPREGRET_GET, uint32_t, sd_power_gpregret_get(uint32_t gpregret_id, uint32_t *p_gpregret)); + +/**@brief Enable or disable the DC/DC regulator. + * + * @param[in] dcdc_mode The mode of the DCDC, see @ref NRF_POWER_DCDC_MODES. + * + * @retval ::NRF_SUCCESS + * @retval ::NRF_ERROR_INVALID_PARAM The DCDC mode is invalid. + */ +SVCALL(SD_POWER_DCDC_MODE_SET, uint32_t, sd_power_dcdc_mode_set(uint8_t dcdc_mode)); + + +/**@brief Request the high frequency crystal oscillator. + * + * Will start the high frequency crystal oscillator, the startup time of the crystal varies + * and the ::sd_clock_hfclk_is_running function can be polled to check if it has started. + * + * @see sd_clock_hfclk_is_running + * @see sd_clock_hfclk_release + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_CLOCK_HFCLK_REQUEST, uint32_t, sd_clock_hfclk_request(void)); + +/**@brief Releases the high frequency crystal oscillator. + * + * Will stop the high frequency crystal oscillator, this happens immediately. + * + * @see sd_clock_hfclk_is_running + * @see sd_clock_hfclk_request + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_CLOCK_HFCLK_RELEASE, uint32_t, sd_clock_hfclk_release(void)); + +/**@brief Checks if the high frequency crystal oscillator is running. + * + * @see sd_clock_hfclk_request + * @see sd_clock_hfclk_release + * + * @param[out] p_is_running 1 if the external crystal oscillator is running, 0 if not. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_CLOCK_HFCLK_IS_RUNNING, uint32_t, sd_clock_hfclk_is_running(uint32_t * p_is_running)); + +/**@brief Waits for an application event. + * + * An application event is either an application interrupt or a pended interrupt when the interrupt + * is disabled. + * + * When the application waits for an application event by calling this function, an interrupt that + * is enabled will be taken immediately on pending since this function will wait in thread mode, + * then the execution will return in the application's main thread. + * + * In order to wake up from disabled interrupts, the SEVONPEND flag has to be set in the Cortex-M + * MCU's System Control Register (SCR), CMSIS_SCB. In that case, when a disabled interrupt gets + * pended, this function will return to the application's main thread. + * + * @note The application must ensure that the pended flag is cleared using ::sd_nvic_ClearPendingIRQ + * in order to sleep using this function. This is only necessary for disabled interrupts, as + * the interrupt handler will clear the pending flag automatically for enabled interrupts. + * + * @note If an application interrupt has happened since the last time sd_app_evt_wait was + * called this function will return immediately and not go to sleep. This is to avoid race + * conditions that can occur when a flag is updated in the interrupt handler and processed + * in the main loop. + * + * @post An application interrupt has happened or a interrupt pending flag is set. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_APP_EVT_WAIT, uint32_t, sd_app_evt_wait(void)); + +/**@brief Get PPI channel enable register contents. + * + * @param[out] p_channel_enable The contents of the PPI CHEN register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_CHANNEL_ENABLE_GET, uint32_t, sd_ppi_channel_enable_get(uint32_t * p_channel_enable)); + +/**@brief Set PPI channel enable register. + * + * @param[in] channel_enable_set_msk Mask containing the bits to set in the PPI CHEN register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_CHANNEL_ENABLE_SET, uint32_t, sd_ppi_channel_enable_set(uint32_t channel_enable_set_msk)); + +/**@brief Clear PPI channel enable register. + * + * @param[in] channel_enable_clr_msk Mask containing the bits to clear in the PPI CHEN register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_CHANNEL_ENABLE_CLR, uint32_t, sd_ppi_channel_enable_clr(uint32_t channel_enable_clr_msk)); + +/**@brief Assign endpoints to a PPI channel. + * + * @param[in] channel_num Number of the PPI channel to assign. + * @param[in] evt_endpoint Event endpoint of the PPI channel. + * @param[in] task_endpoint Task endpoint of the PPI channel. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_CHANNEL The channel number is invalid. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_CHANNEL_ASSIGN, uint32_t, sd_ppi_channel_assign(uint8_t channel_num, const volatile void * evt_endpoint, const volatile void * task_endpoint)); + +/**@brief Task to enable a channel group. + * + * @param[in] group_num Number of the channel group. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_GROUP_TASK_ENABLE, uint32_t, sd_ppi_group_task_enable(uint8_t group_num)); + +/**@brief Task to disable a channel group. + * + * @param[in] group_num Number of the PPI group. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_GROUP_TASK_DISABLE, uint32_t, sd_ppi_group_task_disable(uint8_t group_num)); + +/**@brief Assign PPI channels to a channel group. + * + * @param[in] group_num Number of the channel group. + * @param[in] channel_msk Mask of the channels to assign to the group. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_GROUP_ASSIGN, uint32_t, sd_ppi_group_assign(uint8_t group_num, uint32_t channel_msk)); + +/**@brief Gets the PPI channels of a channel group. + * + * @param[in] group_num Number of the channel group. + * @param[out] p_channel_msk Mask of the channels assigned to the group. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_GROUP_GET, uint32_t, sd_ppi_group_get(uint8_t group_num, uint32_t * p_channel_msk)); + +/**@brief Configures the Radio Notification signal. + * + * @note + * - The notification signal latency depends on the interrupt priority settings of SWI used + * for notification signal. + * - To ensure that the radio notification signal behaves in a consistent way, the radio + * notifications must be configured when there is no protocol stack or other SoftDevice + * activity in progress. It is recommended that the radio notification signal is + * configured directly after the SoftDevice has been enabled. + * - In the period between the ACTIVE signal and the start of the Radio Event, the SoftDevice + * will interrupt the application to do Radio Event preparation. + * - Using the Radio Notification feature may limit the bandwidth, as the SoftDevice may have + * to shorten the connection events to have time for the Radio Notification signals. + * + * @param[in] type Type of notification signal, see @ref NRF_RADIO_NOTIFICATION_TYPES. + * @ref NRF_RADIO_NOTIFICATION_TYPE_NONE shall be used to turn off radio + * notification. Using @ref NRF_RADIO_NOTIFICATION_DISTANCE_NONE is + * recommended (but not required) to be used with + * @ref NRF_RADIO_NOTIFICATION_TYPE_NONE. + * + * @param[in] distance Distance between the notification signal and start of radio activity, see @ref NRF_RADIO_NOTIFICATION_DISTANCES. + * This parameter is ignored when @ref NRF_RADIO_NOTIFICATION_TYPE_NONE or + * @ref NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE is used. + * + * @retval ::NRF_ERROR_INVALID_PARAM The group number is invalid. + * @retval ::NRF_ERROR_INVALID_STATE A protocol stack or other SoftDevice is running. Stop all + * running activities and retry. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_RADIO_NOTIFICATION_CFG_SET, uint32_t, sd_radio_notification_cfg_set(uint8_t type, uint8_t distance)); + +/**@brief Encrypts a block according to the specified parameters. + * + * 128-bit AES encryption. + * + * @note: + * - The application may set the SEVONPEND bit in the SCR to 1 to make the SoftDevice sleep while + * the ECB is running. The SEVONPEND bit should only be cleared (set to 0) from application + * main or low interrupt level. + * + * @param[in, out] p_ecb_data Pointer to the ECB parameters' struct (two input + * parameters and one output parameter). + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_ECB_BLOCK_ENCRYPT, uint32_t, sd_ecb_block_encrypt(nrf_ecb_hal_data_t * p_ecb_data)); + +/**@brief Encrypts multiple data blocks provided as an array of data block structures. + * + * @details: Performs 128-bit AES encryption on multiple data blocks + * + * @note: + * - The application may set the SEVONPEND bit in the SCR to 1 to make the SoftDevice sleep while + * the ECB is running. The SEVONPEND bit should only be cleared (set to 0) from application + * main or low interrupt level. + * + * @param[in] block_count Count of blocks in the p_data_blocks array. + * @param[in,out] p_data_blocks Pointer to the first entry in a contiguous array of + * @ref nrf_ecb_hal_data_block_t structures. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_ECB_BLOCKS_ENCRYPT, uint32_t, sd_ecb_blocks_encrypt(uint8_t block_count, nrf_ecb_hal_data_block_t * p_data_blocks)); + +/**@brief Gets any pending events generated by the SoC API. + * + * The application should keep calling this function to get events, until ::NRF_ERROR_NOT_FOUND is returned. + * + * @param[out] p_evt_id Set to one of the values in @ref NRF_SOC_EVTS, if any events are pending. + * + * @retval ::NRF_SUCCESS An event was pending. The event id is written in the p_evt_id parameter. + * @retval ::NRF_ERROR_NOT_FOUND No pending events. + */ +SVCALL(SD_EVT_GET, uint32_t, sd_evt_get(uint32_t * p_evt_id)); + +/**@brief Get the temperature measured on the chip + * + * This function will block until the temperature measurement is done. + * It takes around 50 us from call to return. + * + * @param[out] p_temp Result of temperature measurement. Die temperature in 0.25 degrees Celsius. + * + * @retval ::NRF_SUCCESS A temperature measurement was done, and the temperature was written to temp + */ +SVCALL(SD_TEMP_GET, uint32_t, sd_temp_get(int32_t * p_temp)); + +/**@brief Flash Write +* +* Commands to write a buffer to flash +* +* If the SoftDevice is enabled: +* This call initiates the flash access command, and its completion will be communicated to the +* application with exactly one of the following events: +* - @ref NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed. +* - @ref NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started. +* +* If the SoftDevice is not enabled no event will be generated, and this call will return @ref NRF_SUCCESS when the + * write has been completed +* +* @note +* - This call takes control over the radio and the CPU during flash erase and write to make sure that +* they will not interfere with the flash access. This means that all interrupts will be blocked +* for a predictable time (depending on the NVMC specification in the device's Product Specification +* and the command parameters). +* - The data in the p_src buffer should not be modified before the @ref NRF_EVT_FLASH_OPERATION_SUCCESS +* or the @ref NRF_EVT_FLASH_OPERATION_ERROR have been received if the SoftDevice is enabled. +* - This call will make the SoftDevice trigger a hardfault when the page is written, if it is +* protected. +* +* +* @param[in] p_dst Pointer to start of flash location to be written. +* @param[in] p_src Pointer to buffer with data to be written. +* @param[in] size Number of 32-bit words to write. Maximum size is the number of words in one +* flash page. See the device's Product Specification for details. +* +* @retval ::NRF_ERROR_INVALID_ADDR Tried to write to a non existing flash address, or p_dst or p_src was unaligned. +* @retval ::NRF_ERROR_BUSY The previous command has not yet completed. +* @retval ::NRF_ERROR_INVALID_LENGTH Size was 0, or higher than the maximum allowed size. +* @retval ::NRF_ERROR_FORBIDDEN Tried to write to an address outside the application flash area. +* @retval ::NRF_SUCCESS The command was accepted. +*/ +SVCALL(SD_FLASH_WRITE, uint32_t, sd_flash_write(uint32_t * p_dst, uint32_t const * p_src, uint32_t size)); + + +/**@brief Flash Erase page +* +* Commands to erase a flash page +* If the SoftDevice is enabled: +* This call initiates the flash access command, and its completion will be communicated to the +* application with exactly one of the following events: +* - @ref NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed. +* - @ref NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started. +* +* If the SoftDevice is not enabled no event will be generated, and this call will return @ref NRF_SUCCESS when the +* erase has been completed +* +* @note +* - This call takes control over the radio and the CPU during flash erase and write to make sure that +* they will not interfere with the flash access. This means that all interrupts will be blocked +* for a predictable time (depending on the NVMC specification in the device's Product Specification +* and the command parameters). +* - This call will make the SoftDevice trigger a hardfault when the page is erased, if it is +* protected. +* +* +* @param[in] page_number Page number of the page to erase +* +* @retval ::NRF_ERROR_INTERNAL If a new session could not be opened due to an internal error. +* @retval ::NRF_ERROR_INVALID_ADDR Tried to erase to a non existing flash page. +* @retval ::NRF_ERROR_BUSY The previous command has not yet completed. +* @retval ::NRF_ERROR_FORBIDDEN Tried to erase a page outside the application flash area. +* @retval ::NRF_SUCCESS The command was accepted. +*/ +SVCALL(SD_FLASH_PAGE_ERASE, uint32_t, sd_flash_page_erase(uint32_t page_number)); + + +/**@brief Flash Protection set + * + * Commands to set the flash protection configuration registers. + This sets the CONFIGx registers of the BPROT peripheral. + * + * @note Not all parameters are valid for all products. Some bits in each parameter may not be + * valid for your product. Please refer your Product Specification for more details. + * + * @note To read the values read them directly. They are only write-protected. + * + * @note It is possible to use @ref sd_protected_register_write instead of this function. + * + * @param[in] block_cfg0 Value to be written to the configuration register. + * @param[in] block_cfg1 Value to be written to the configuration register. + * @param[in] block_cfg2 Value to be written to the configuration register. + * @param[in] block_cfg3 Value to be written to the configuration register. + * + * @retval ::NRF_ERROR_NOT_SUPPORTED Non-zero value supplied to one or more of the unsupported parameters. + * @retval ::NRF_SUCCESS Values successfully written to configuration registers. + */ +SVCALL(SD_FLASH_PROTECT, uint32_t, sd_flash_protect(uint32_t block_cfg0, uint32_t block_cfg1, uint32_t block_cfg2, uint32_t block_cfg3)); + +/**@brief Opens a session for radio timeslot requests. + * + * @note Only one session can be open at a time. + * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START) will be called when the radio timeslot + * starts. From this point the NRF_RADIO and NRF_TIMER0 peripherals can be freely accessed + * by the application. + * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_TIMER0) is called whenever the NRF_TIMER0 + * interrupt occurs. + * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_RADIO) is called whenever the NRF_RADIO + * interrupt occurs. + * @note p_radio_signal_callback() will be called at ARM interrupt priority level 0. This + * implies that none of the sd_* API calls can be used from p_radio_signal_callback(). + * + * @param[in] p_radio_signal_callback The signal callback. + * + * @retval ::NRF_ERROR_INVALID_ADDR p_radio_signal_callback is an invalid function pointer. + * @retval ::NRF_ERROR_BUSY If session cannot be opened. + * @retval ::NRF_ERROR_INTERNAL If a new session could not be opened due to an internal error. + * @retval ::NRF_SUCCESS Otherwise. + */ + SVCALL(SD_RADIO_SESSION_OPEN, uint32_t, sd_radio_session_open(nrf_radio_signal_callback_t p_radio_signal_callback)); + +/**@brief Closes a session for radio timeslot requests. + * + * @note Any current radio timeslot will be finished before the session is closed. + * @note If a radio timeslot is scheduled when the session is closed, it will be canceled. + * @note The application cannot consider the session closed until the @ref NRF_EVT_RADIO_SESSION_CLOSED + * event is received. + * + * @retval ::NRF_ERROR_FORBIDDEN If session not opened. + * @retval ::NRF_ERROR_BUSY If session is currently being closed. + * @retval ::NRF_SUCCESS Otherwise. + */ + SVCALL(SD_RADIO_SESSION_CLOSE, uint32_t, sd_radio_session_close(void)); + +/**@brief Requests a radio timeslot. + * + * @note The request type is determined by p_request->request_type, and can be one of @ref NRF_RADIO_REQ_TYPE_EARLIEST + * and @ref NRF_RADIO_REQ_TYPE_NORMAL. The first request in a session must always be of type @ref NRF_RADIO_REQ_TYPE_EARLIEST. + * @note For a normal request (@ref NRF_RADIO_REQ_TYPE_NORMAL), the start time of a radio timeslot is specified by + * p_request->distance_us and is given relative to the start of the previous timeslot. + * @note A too small p_request->distance_us will lead to a @ref NRF_EVT_RADIO_BLOCKED event. + * @note Timeslots scheduled too close will lead to a @ref NRF_EVT_RADIO_BLOCKED event. + * @note See the SoftDevice Specification for more on radio timeslot scheduling, distances and lengths. + * @note If an opportunity for the first radio timeslot is not found before 100 ms after the call to this + * function, it is not scheduled, and instead a @ref NRF_EVT_RADIO_BLOCKED event is sent. + * The application may then try to schedule the first radio timeslot again. + * @note Successful requests will result in nrf_radio_signal_callback_t(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START). + * Unsuccessful requests will result in a @ref NRF_EVT_RADIO_BLOCKED event, see @ref NRF_SOC_EVTS. + * @note The jitter in the start time of the radio timeslots is +/- @ref NRF_RADIO_START_JITTER_US us. + * @note The nrf_radio_signal_callback_t(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START) call has a latency relative to the + * specified radio timeslot start, but this does not affect the actual start time of the timeslot. + * @note NRF_TIMER0 is reset at the start of the radio timeslot, and is clocked at 1MHz from the high frequency + * (16 MHz) clock source. If p_request->hfclk_force_xtal is true, the high frequency clock is + * guaranteed to be clocked from the external crystal. + * @note The SoftDevice will neither access the NRF_RADIO peripheral nor the NRF_TIMER0 peripheral + * during the radio timeslot. + * + * @param[in] p_request Pointer to the request parameters. + * + * @retval ::NRF_ERROR_FORBIDDEN If session not opened or the session is not IDLE. + * @retval ::NRF_ERROR_INVALID_ADDR If the p_request pointer is invalid. + * @retval ::NRF_ERROR_INVALID_PARAM If the parameters of p_request are not valid. + * @retval ::NRF_SUCCESS Otherwise. + */ + SVCALL(SD_RADIO_REQUEST, uint32_t, sd_radio_request(nrf_radio_request_t const * p_request)); + +/**@brief Write register protected by the SoftDevice + * + * This function writes to a register that is write-protected by the SoftDevice. Please refer to your + * SoftDevice Specification for more details about which registers that are protected by SoftDevice. + * This function can write to the following protected peripheral: + * - BPROT + * + * @note Protected registers may be read directly. + * @note Register that are write-once will return @ref NRF_SUCCESS on second set, even the value in + * the register has not changed. See the Product Specification for more details about register + * properties. + * + * @param[in] p_register Pointer to register to be written. + * @param[in] value Value to be written to the register. + * + * @retval ::NRF_ERROR_INVALID_ADDR This function can not write to the reguested register. + * @retval ::NRF_SUCCESS Value successfully written to register. + * + */ +SVCALL(SD_PROTECTED_REGISTER_WRITE, uint32_t, sd_protected_register_write(volatile uint32_t * p_register, uint32_t value)); + +/**@} */ + +#ifdef __cplusplus +} +#endif +#endif // NRF_SOC_H__ + +/**@} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_svc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_svc.h new file mode 100644 index 00000000000..292c6929828 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_svc.h @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef NRF_SVC__ +#define NRF_SVC__ + +#include "stdint.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef SVCALL_AS_NORMAL_FUNCTION +#define SVCALL(number, return_type, signature) return_type signature +#else + +#ifndef SVCALL +#if defined (__CC_ARM) +#define SVCALL(number, return_type, signature) return_type __svc(number) signature +#elif defined (__GNUC__) +#ifdef __cplusplus +#define GCC_CAST_CPP (uint16_t) +#else +#define GCC_CAST_CPP +#endif +#define SVCALL(number, return_type, signature) \ + _Pragma("GCC diagnostic push") \ + _Pragma("GCC diagnostic ignored \"-Wreturn-type\"") \ + __attribute__((naked)) \ + __attribute__((unused)) \ + static return_type signature \ + { \ + __asm( \ + "svc %0\n" \ + "bx r14" : : "I" (GCC_CAST_CPP number) : "r0" \ + ); \ + } \ + _Pragma("GCC diagnostic pop") + +#elif defined (__ICCARM__) +#define PRAGMA(x) _Pragma(#x) +#define SVCALL(number, return_type, signature) \ +PRAGMA(swi_number = (number)) \ + __swi return_type signature; +#else +#define SVCALL(number, return_type, signature) return_type signature +#endif +#endif // SVCALL + +#endif // SVCALL_AS_NORMAL_FUNCTION + +#ifdef __cplusplus +} +#endif +#endif // NRF_SVC__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/hex/s132_nrf52_6.0.0_licence-agreement.txt b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/hex/s132_nrf52_6.0.0_licence-agreement.txt new file mode 100644 index 00000000000..a71adee7b9b --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/hex/s132_nrf52_6.0.0_licence-agreement.txt @@ -0,0 +1,35 @@ +Copyright (c) 2007 - 2018, Nordic Semiconductor ASA +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/hex/s132_nrf52_6.0.0_softdevice.hex b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/hex/s132_nrf52_6.0.0_softdevice.hex new file mode 100644 index 00000000000..be148e30774 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/hex/s132_nrf52_6.0.0_softdevice.hex @@ -0,0 +1,9127 @@ +:020000040000FA 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00000000000..45304fcaa2d --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/mbed_lib.json @@ -0,0 +1,39 @@ +{ + "name": "softdevice", + "macros": [ + "SOFTDEVICE_PRESENT=1", + "S132", + "BLE_STACK_SUPPORT_REQD", + "NRF_SDH_CLOCK_LF_XTAL_ACCURACY=7", + "NRF_SD_BLE_API_VERSION=5", + "NRF_SDH_ENABLED=1", + "NRF_SDH_BLE_ENABLED=1", + "PEER_MANAGER_ENABLED=1", + "NRF_SDH_BLE_GATT_MAX_MTU_SIZE=23", + "NRF_SDH_BLE_OBSERVER_PRIO_LEVELS=4", + "NRF_SDH_BLE_GAP_EVENT_LENGTH=3", + "BLE_ADV_BLE_OBSERVER_PRIO=1", + "BLE_CONN_STATE_BLE_OBSERVER_PRIO=0", + "BLE_CONN_PARAMS_BLE_OBSERVER_PRIO=1", + "NRF_BLE_GATT_BLE_OBSERVER_PRIO=1", + "NRF_SDH_DISPATCH_MODEL=2", + "NRF_SDH_SOC_ENABLED=1", + "NRF_SDH_STACK_OBSERVER_PRIO_LEVELS=2", + "NRF_SDH_STATE_OBSERVER_PRIO_LEVELS=2", + "NRF_SDH_SOC_OBSERVER_PRIO_LEVELS=2", + "NRF_SDH_REQ_OBSERVER_PRIO_LEVELS=2", + "NRF_SDH_BLE_STACK_OBSERVER_PRIO=0", + "NRF_SDH_SOC_STACK_OBSERVER_PRIO=0", + "FDS_BACKEND=2", + "SWI_DISABLE1", + "SWI_DISABLE2", + "SWI_DISABLE3", + "SWI_DISABLE4", + "SWI_DISABLE5" + ], + "target_overrides": { + "*": { + "target.bootloader_img": "hex/s132_nrf52_6.0.0_softdevice.hex" + } + } +} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/headers/nrf_mbr.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/headers/nrf_mbr.h new file mode 100644 index 00000000000..e0c80e278c3 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/headers/nrf_mbr.h @@ -0,0 +1,242 @@ +/* + * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @defgroup nrf_mbr_api Master Boot Record API + @{ + + @brief APIs for updating SoftDevice and BootLoader + +*/ + +#ifndef NRF_MBR_H__ +#define NRF_MBR_H__ + +#include "nrf_svc.h" +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup NRF_MBR_DEFINES Defines + * @{ */ + +/**@brief MBR SVC Base number. */ +#define MBR_SVC_BASE (0x18) + +/**@brief Page size in words. */ +#define MBR_PAGE_SIZE_IN_WORDS (1024) + +/** @brief The size that must be reserved for the MBR when a SoftDevice is written to flash. +This is the offset where the first byte of the SoftDevice hex file is written.*/ +#define MBR_SIZE (0x1000) + +/** @} */ + +/** @addtogroup NRF_MBR_ENUMS Enumerations + * @{ */ + +/**@brief nRF Master Boot Record API SVC numbers. */ +enum NRF_MBR_SVCS +{ + SD_MBR_COMMAND = MBR_SVC_BASE, /**< ::sd_mbr_command */ +}; + +/**@brief Possible values for ::sd_mbr_command_t.command */ +enum NRF_MBR_COMMANDS +{ + SD_MBR_COMMAND_COPY_BL, /**< Copy a new BootLoader. @see ::sd_mbr_command_copy_bl_t*/ + SD_MBR_COMMAND_COPY_SD, /**< Copy a new SoftDevice. @see ::sd_mbr_command_copy_sd_t*/ + SD_MBR_COMMAND_INIT_SD, /**< Initialize forwarding interrupts to SD, and run reset function in SD. Does not require any parameters in ::sd_mbr_command_t params.*/ + SD_MBR_COMMAND_COMPARE, /**< This command works like memcmp. @see ::sd_mbr_command_compare_t*/ + SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET, /**< Change the address the MBR starts after a reset. @see ::sd_mbr_command_vector_table_base_set_t*/ + SD_MBR_COMMAND_RESERVED, + SD_MBR_COMMAND_IRQ_FORWARD_ADDRESS_SET, /**< Start forwarding all interrupts to this address. @see ::sd_mbr_command_irq_forward_address_set_t*/ +}; + +/** @} */ + +/** @addtogroup NRF_MBR_TYPES Types + * @{ */ + +/**@brief This command copies part of a new SoftDevice + * + * The destination area is erased before copying. + * If dst is in the middle of a flash page, that whole flash page will be erased. + * If (dst+len) is in the middle of a flash page, that whole flash page will be erased. + * + * The user of this function is responsible for setting the BPROT registers. + * + * @retval ::NRF_SUCCESS indicates that the contents of the memory blocks where copied correctly. + * @retval ::NRF_ERROR_INTERNAL indicates that the contents of the memory blocks where not verified correctly after copying. + */ +typedef struct +{ + uint32_t *src; /**< Pointer to the source of data to be copied.*/ + uint32_t *dst; /**< Pointer to the destination where the content is to be copied.*/ + uint32_t len; /**< Number of 32 bit words to copy. Must be a multiple of @ref MBR_PAGE_SIZE_IN_WORDS words.*/ +} sd_mbr_command_copy_sd_t; + + +/**@brief This command works like memcmp, but takes the length in words. + * + * @retval ::NRF_SUCCESS indicates that the contents of both memory blocks are equal. + * @retval ::NRF_ERROR_NULL indicates that the contents of the memory blocks are not equal. + */ +typedef struct +{ + uint32_t *ptr1; /**< Pointer to block of memory. */ + uint32_t *ptr2; /**< Pointer to block of memory. */ + uint32_t len; /**< Number of 32 bit words to compare.*/ +} sd_mbr_command_compare_t; + + +/**@brief This command copies a new BootLoader. + * + * With this command, destination of BootLoader is always the address written in + * NRF_UICR->BOOTADDR. + * + * Destination is erased by this function. + * If (destination+bl_len) is in the middle of a flash page, that whole flash page will be erased. + * + * This function will use the flash protect peripheral (BPROT or ACL) to protect the flash that is + * not intended to be written. + * + * On success, this function will not return. It will start the new BootLoader from reset-vector as normal. + * + * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. + * @retval ::NRF_ERROR_FORBIDDEN if NRF_UICR->BOOTADDR is not set. + * @retval ::NRF_ERROR_INVALID_LENGTH if parameters attempts to read or write outside flash area. + * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) + */ +typedef struct +{ + uint32_t *bl_src; /**< Pointer to the source of the Bootloader to be be copied.*/ + uint32_t bl_len; /**< Number of 32 bit words to copy for BootLoader. */ +} sd_mbr_command_copy_bl_t; + +/**@brief Change the address the MBR starts after a reset + * + * Once this function has been called, this address is where the MBR will start to forward + * interrupts to after a reset. + * + * To restore default forwarding this function should be called with @ref address set to 0. The + * MBR will then start forwarding interrupts to the address in NFR_UICR->BOOTADDR or to the + * SoftDevice if the BOOTADDR is not set. + * + * On success, this function will not return. It will reset the device. + * + * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. + * @retval ::NRF_ERROR_INVALID_ADDR if parameter address is outside of the flash size. + * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) + */ +typedef struct +{ + uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ +} sd_mbr_command_vector_table_base_set_t; + +/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the MBR + * + * Unlike sd_mbr_command_vector_table_base_set_t, this function does not reset, and it does not + * change where the MBR starts after reset. + * + * @retval ::NRF_SUCCESS + */ +typedef struct +{ + uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ +} sd_mbr_command_irq_forward_address_set_t; + +/**@brief Input structure containing data used when calling ::sd_mbr_command + * + * Depending on what command value that is set, the corresponding params value type must also be + * set. See @ref NRF_MBR_COMMANDS for command types and corresponding params value type. If command + * @ref SD_MBR_COMMAND_INIT_SD is set, it is not necessary to set any values under params. + */ +typedef struct +{ + uint32_t command; /**< Type of command to be issued. See @ref NRF_MBR_COMMANDS. */ + union + { + sd_mbr_command_copy_sd_t copy_sd; /**< Parameters for copy SoftDevice.*/ + sd_mbr_command_compare_t compare; /**< Parameters for verify.*/ + sd_mbr_command_copy_bl_t copy_bl; /**< Parameters for copy BootLoader. Requires parameter page. */ + sd_mbr_command_vector_table_base_set_t base_set; /**< Parameters for vector table base set. Requires parameter page.*/ + sd_mbr_command_irq_forward_address_set_t irq_forward_address_set; /**< Parameters for irq forward address set*/ + } params; /**< Command parameters. */ +} sd_mbr_command_t; + +/** @} */ + +/** @addtogroup NRF_MBR_FUNCTIONS Functions + * @{ */ + +/**@brief Issue Master Boot Record commands + * + * Commands used when updating a SoftDevice and bootloader. + * + * The @ref SD_MBR_COMMAND_COPY_BL and @ref SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET requires + * parameters to be retained by the MBR when resetting the IC. This is done in a separate flash + * page provided by the application. The UICR register UICR.NRFFW[1] must be set to an address + * corresponding to a page in the application flash space. This page will be cleared by the MBR and + * used to store the command before reset. When the UICR.NRFFW[1] field is set the page it refers + * to must not be used by the application. If the UICR.NRFFW[1] is set to 0xFFFFFFFF (the default) + * MBR commands which use flash will be unavailable and return @ref NRF_ERROR_NO_MEM. + * + * @param[in] param Pointer to a struct describing the command. + * + * @note For return values, see ::sd_mbr_command_copy_sd_t, ::sd_mbr_command_copy_bl_t, + * ::sd_mbr_command_compare_t, ::sd_mbr_command_vector_table_base_set_t, + * ::sd_mbr_command_irq_forward_address_set_t + * + * @retval ::NRF_ERROR_NO_MEM if UICR.NRFFW[1] is not set (i.e. is 0xFFFFFFFF). + * @retval ::NRF_ERROR_INVALID_PARAM if an invalid command is given. +*/ +SVCALL(SD_MBR_COMMAND, uint32_t, sd_mbr_command(sd_mbr_command_t* param)); + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // NRF_MBR_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/headers/nrf_svc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/headers/nrf_svc.h new file mode 100644 index 00000000000..292c6929828 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/headers/nrf_svc.h @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef NRF_SVC__ +#define NRF_SVC__ + +#include "stdint.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef SVCALL_AS_NORMAL_FUNCTION +#define SVCALL(number, return_type, signature) return_type signature +#else + +#ifndef SVCALL +#if defined (__CC_ARM) +#define SVCALL(number, return_type, signature) return_type __svc(number) signature +#elif defined (__GNUC__) +#ifdef __cplusplus +#define GCC_CAST_CPP (uint16_t) +#else +#define GCC_CAST_CPP +#endif +#define SVCALL(number, return_type, signature) \ + _Pragma("GCC diagnostic push") \ + _Pragma("GCC diagnostic ignored \"-Wreturn-type\"") \ + __attribute__((naked)) \ + __attribute__((unused)) \ + static return_type signature \ + { \ + __asm( \ + "svc %0\n" \ + "bx r14" : : "I" (GCC_CAST_CPP number) : "r0" \ + ); \ + } \ + _Pragma("GCC diagnostic pop") + +#elif defined (__ICCARM__) +#define PRAGMA(x) _Pragma(#x) +#define SVCALL(number, return_type, signature) \ +PRAGMA(swi_number = (number)) \ + __swi return_type signature; +#else +#define SVCALL(number, return_type, signature) return_type signature +#endif +#endif // SVCALL + +#endif // SVCALL_AS_NORMAL_FUNCTION + +#ifdef __cplusplus +} +#endif +#endif // NRF_SVC__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/hex/mbr_nrf52_2.3.0_licence-agreement.txt b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/hex/mbr_nrf52_2.3.0_licence-agreement.txt new file mode 100644 index 00000000000..a71adee7b9b --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/hex/mbr_nrf52_2.3.0_licence-agreement.txt @@ -0,0 +1,35 @@ +Copyright (c) 2007 - 2018, Nordic Semiconductor ASA +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/hex/mbr_nrf52_2.3.0_mbr.hex b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/hex/mbr_nrf52_2.3.0_mbr.hex new file mode 100644 index 00000000000..56225a4a9d2 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/hex/mbr_nrf52_2.3.0_mbr.hex @@ -0,0 +1,165 @@ +:020000040000FA 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+:1009A000016881F30888406800470000180A0000C9 +:1009B000180A0000F3020000000000201EF0040FDF +:1009C0000CBFEFF30881EFF30981886902380078E2 +:1009D000182803D100E00000074A1047074A1268B0 +:1009E0002C3212681047000000B5054B1B68054A01 +:1009F0009B58984700BD0000DB020000000000206B +:100A0000080A0000040000000010000000000000C0 +:080A100000FFFFFF0090D0037E +:040000050000099955 +:00000001FF diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/libraries/fstorage/nrf_fstorage_nvmc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/libraries/fstorage/nrf_fstorage_nvmc.c new file mode 100644 index 00000000000..14b1859c934 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/libraries/fstorage/nrf_fstorage_nvmc.c @@ -0,0 +1,217 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include "sdk_common.h" + +#if NRF_MODULE_ENABLED(NRF_FSTORAGE) + +#include "nrf_fstorage_nvmc.h" +#include +#include +#include +#include "nrf_nvmc.h" +#include "nrf_atomic.h" + + +static nrf_fstorage_info_t m_flash_info = +{ +#if defined(NRF51) + .erase_unit = 1024, +#elif defined(NRF52_SERIES) + .erase_unit = 4096, +#endif + .program_unit = 4, + .rmap = true, + .wmap = false, +}; + + + /* An operation initiated by fstorage is ongoing. */ +static nrf_atomic_flag_t m_flash_operation_ongoing; + + +/* Send event to the event handler. */ +static void event_send(nrf_fstorage_t const * p_fs, + nrf_fstorage_evt_id_t evt_id, + void const * p_src, + uint32_t addr, + uint32_t len, + void * p_param) +{ + if (p_fs->evt_handler == NULL) + { + /* Nothing to do. */ + return; + } + + nrf_fstorage_evt_t evt = + { + .result = NRF_SUCCESS, + .id = evt_id, + .addr = addr, + .p_src = p_src, + .len = len, + .p_param = p_param, + }; + + p_fs->evt_handler(&evt); +} + + +static ret_code_t init(nrf_fstorage_t * p_fs, void * p_param) +{ + UNUSED_PARAMETER(p_param); + + p_fs->p_flash_info = &m_flash_info; + + return NRF_SUCCESS; +} + + +static ret_code_t uninit(nrf_fstorage_t * p_fs, void * p_param) +{ + UNUSED_PARAMETER(p_fs); + UNUSED_PARAMETER(p_param); + + (void) nrf_atomic_flag_clear(&m_flash_operation_ongoing); + + return NRF_SUCCESS; +} + + +static ret_code_t read(nrf_fstorage_t const * p_fs, uint32_t src, void * p_dest, uint32_t len) +{ + UNUSED_PARAMETER(p_fs); + + memcpy(p_dest, (uint32_t*)src, len); + + return NRF_SUCCESS; +} + + +static ret_code_t write(nrf_fstorage_t const * p_fs, + uint32_t dest, + void const * p_src, + uint32_t len, + void * p_param) +{ + if (nrf_atomic_flag_set_fetch(&m_flash_operation_ongoing)) + { + return NRF_ERROR_BUSY; + } + + nrf_nvmc_write_words(dest, (uint32_t*)p_src, (len / m_flash_info.program_unit)); + + /* Clear the flag before sending the event, to allow API calls in the event context. */ + (void) nrf_atomic_flag_clear(&m_flash_operation_ongoing); + + event_send(p_fs, NRF_FSTORAGE_EVT_WRITE_RESULT, p_src, dest, len, p_param); + + return NRF_SUCCESS; +} + + +static ret_code_t erase(nrf_fstorage_t const * p_fs, + uint32_t page_addr, + uint32_t len, + void * p_param) +{ + uint32_t progress = 0; + + if (nrf_atomic_flag_set_fetch(&m_flash_operation_ongoing)) + { + return NRF_ERROR_BUSY; + } + + while (progress != len) + { + nrf_nvmc_page_erase(page_addr + (progress * m_flash_info.erase_unit)); + progress++; + } + + /* Clear the flag before sending the event, to allow API calls in the event context. */ + (void) nrf_atomic_flag_clear(&m_flash_operation_ongoing); + + event_send(p_fs, NRF_FSTORAGE_EVT_ERASE_RESULT, NULL, page_addr, len, p_param); + + return NRF_SUCCESS; +} + + +static uint8_t const * rmap(nrf_fstorage_t const * p_fs, uint32_t addr) +{ + UNUSED_PARAMETER(p_fs); + + return (uint8_t*)addr; +} + + +static uint8_t * wmap(nrf_fstorage_t const * p_fs, uint32_t addr) +{ + UNUSED_PARAMETER(p_fs); + UNUSED_PARAMETER(addr); + + /* Not supported. */ + return NULL; +} + + +static bool is_busy(nrf_fstorage_t const * p_fs) +{ + UNUSED_PARAMETER(p_fs); + + return m_flash_operation_ongoing; +} + + +/* The exported API. */ +nrf_fstorage_api_t nrf_fstorage_nvmc = +{ + .init = init, + .uninit = uninit, + .read = read, + .write = write, + .erase = erase, + .rmap = rmap, + .wmap = wmap, + .is_busy = is_busy +}; + + +#endif // NRF_FSTORAGE_ENABLED diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/libraries/fstorage/nrf_fstorage_nvmc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/libraries/fstorage/nrf_fstorage_nvmc.h new file mode 100644 index 00000000000..bacd7457e0a --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/libraries/fstorage/nrf_fstorage_nvmc.h @@ -0,0 +1,75 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/** + * @file + * + * @defgroup nrf_fstorage_nvmc NVMC implementation + * @ingroup nrf_fstorage + * @{ + * + * @brief API implementation of fstorage that uses the non-volatile memory controller (NVMC). +*/ + +#ifndef NRF_FSTORAGE_NVMC_H__ +#define NRF_FSTORAGE_NVMC_H__ + +#include "nrf_fstorage.h" + +#ifdef __cplusplus +extern "C" { +#endif + + +/**@brief API implementation that uses the non-volatile memory controller. + * + * @details An fstorage instance with this API implementation can be initialized by providing + * this structure as a parameter to @ref nrf_fstorage_init. + * The structure is defined in @c nrf_fstorage_nvmc.c. + */ +extern nrf_fstorage_api_t nrf_fstorage_nvmc; + + +#ifdef __cplusplus +} +#endif + +#endif // NRF_FSTORAGE_NVMC_H__ +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/mbed_lib.json b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/mbed_lib.json new file mode 100644 index 00000000000..f599d4a7e19 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/mbed_lib.json @@ -0,0 +1,8 @@ +{ + "name": "softdevice_mbr", + "target_overrides": { + "*": { + "target.bootloader_img": "hex/mbr_nrf52_2.3.0_mbr.hex" + } + } +} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_error.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_error.h new file mode 100644 index 00000000000..c673beb10dc --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_error.h @@ -0,0 +1,95 @@ +/** + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/* Header guard */ + +#ifndef SOFTDEVICE_PRESENT + +/** + @defgroup nrf_error Global Error Codes + @{ + + @brief Global Error definitions +*/ + +#ifndef NRF_ERROR_H__ +#define NRF_ERROR_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/** @defgroup NRF_ERRORS_BASE Error Codes Base number definitions + * @{ */ +#define NRF_ERROR_BASE_NUM (0x0) ///< Global error base +#define NRF_ERROR_SDM_BASE_NUM (0x1000) ///< SDM error base +#define NRF_ERROR_SOC_BASE_NUM (0x2000) ///< SoC error base +#define NRF_ERROR_STK_BASE_NUM (0x3000) ///< STK error base +/** @} */ + +#define NRF_SUCCESS (NRF_ERROR_BASE_NUM + 0) ///< Successful command +#define NRF_ERROR_SVC_HANDLER_MISSING (NRF_ERROR_BASE_NUM + 1) ///< SVC handler is missing +#define NRF_ERROR_SOFTDEVICE_NOT_ENABLED (NRF_ERROR_BASE_NUM + 2) ///< SoftDevice has not been enabled +#define NRF_ERROR_INTERNAL (NRF_ERROR_BASE_NUM + 3) ///< Internal Error +#define NRF_ERROR_NO_MEM (NRF_ERROR_BASE_NUM + 4) ///< No Memory for operation +#define NRF_ERROR_NOT_FOUND (NRF_ERROR_BASE_NUM + 5) ///< Not found +#define NRF_ERROR_NOT_SUPPORTED (NRF_ERROR_BASE_NUM + 6) ///< Not supported +#define NRF_ERROR_INVALID_PARAM (NRF_ERROR_BASE_NUM + 7) ///< Invalid Parameter +#define NRF_ERROR_INVALID_STATE (NRF_ERROR_BASE_NUM + 8) ///< Invalid state, operation disallowed in this state +#define NRF_ERROR_INVALID_LENGTH (NRF_ERROR_BASE_NUM + 9) ///< Invalid Length +#define NRF_ERROR_INVALID_FLAGS (NRF_ERROR_BASE_NUM + 10) ///< Invalid Flags +#define NRF_ERROR_INVALID_DATA (NRF_ERROR_BASE_NUM + 11) ///< Invalid Data +#define NRF_ERROR_DATA_SIZE (NRF_ERROR_BASE_NUM + 12) ///< Data size exceeds limit +#define NRF_ERROR_TIMEOUT (NRF_ERROR_BASE_NUM + 13) ///< Operation timed out +#define NRF_ERROR_NULL (NRF_ERROR_BASE_NUM + 14) ///< Null Pointer +#define NRF_ERROR_FORBIDDEN (NRF_ERROR_BASE_NUM + 15) ///< Forbidden Operation +#define NRF_ERROR_INVALID_ADDR (NRF_ERROR_BASE_NUM + 16) ///< Bad Memory Address +#define NRF_ERROR_BUSY (NRF_ERROR_BASE_NUM + 17) ///< Busy + +#ifdef __cplusplus +} +#endif + +#endif // NRF_ERROR_H__ + +/** + @} +*/ + +#endif // SOFTDEVICE_PRESENT diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_nvic.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_nvic.c new file mode 100644 index 00000000000..8fa8b2beb90 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_nvic.c @@ -0,0 +1,123 @@ +/** + * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include +#include "nrf_soc.h" +#include "nrf_error.h" + +static uint8_t m_in_critical_region = 0; + +uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn) +{ + NVIC_EnableIRQ(IRQn); + return NRF_SUCCESS; +} + +uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn) +{ + NVIC_DisableIRQ(IRQn); + return NRF_SUCCESS; +} + +uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq) +{ + if (p_pending_irq != NULL) + { + *p_pending_irq = NVIC_GetPendingIRQ(IRQn); + return NRF_SUCCESS; + } + return NRF_ERROR_NULL; +} + +uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn) +{ + NVIC_SetPendingIRQ(IRQn); + return NRF_SUCCESS; +} + +uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn) +{ + NVIC_ClearPendingIRQ(IRQn); + return NRF_SUCCESS; +} + +uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + NVIC_SetPriority(IRQn, priority); + return NRF_SUCCESS; +} + +uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority) +{ + if (p_priority != NULL) + { + *p_priority = NVIC_GetPriority(IRQn); + return NRF_SUCCESS; + } + + return NRF_ERROR_NULL; +} + +uint32_t sd_nvic_SystemReset(void) +{ + NVIC_SystemReset(); + return NRF_SUCCESS; +} + +uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region) +{ + __disable_irq(); + + *p_is_nested_critical_region = (m_in_critical_region != 0); + m_in_critical_region++; + + return NRF_SUCCESS; +} + +uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region) +{ + m_in_critical_region--; + + if (is_nested_critical_region == 0) + { + m_in_critical_region = 0; + __enable_irq(); + } + return NRF_SUCCESS; +} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_nvic.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_nvic.h new file mode 100644 index 00000000000..58dd0274eb5 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_nvic.h @@ -0,0 +1,166 @@ +/** + * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_NVIC_H__ +#define NRF_NVIC_H__ + +#include +#include "nrf.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@brief Enable External Interrupt. + * @note Corresponds to NVIC_EnableIRQ in CMSIS. + * + * @pre{IRQn is valid and not reserved by the stack} + * + * @param[in] IRQn See the NVIC_EnableIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt was enabled. + */ +uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn); + +/**@brief Disable External Interrupt. + * @note Corresponds to NVIC_DisableIRQ in CMSIS. + * + * @pre{IRQn is valid and not reserved by the stack} + * + * @param[in] IRQn See the NVIC_DisableIRQ documentation in CMSIS + * + * @retval ::NRF_SUCCESS The interrupt was disabled. + */ +uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn); + +/**@brief Get Pending Interrupt. + * @note Corresponds to NVIC_GetPendingIRQ in CMSIS. + * + * @pre{IRQn is valid and not reserved by the stack} + * + * @param[in] IRQn See the NVIC_GetPendingIRQ documentation in CMSIS. + * @param[out] p_pending_irq Return value from NVIC_GetPendingIRQ. + * + * @retval ::NRF_SUCCESS The interrupt is available for the application. + */ +uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq); + +/**@brief Set Pending Interrupt. + * @note Corresponds to NVIC_SetPendingIRQ in CMSIS. + * + * @pre{IRQn is valid and not reserved by the stack} + * + * @param[in] IRQn See the NVIC_SetPendingIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt is set pending. + */ +uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn); + +/**@brief Clear Pending Interrupt. + * @note Corresponds to NVIC_ClearPendingIRQ in CMSIS. + * + * @pre{IRQn is valid and not reserved by the stack} + * + * @param[in] IRQn See the NVIC_ClearPendingIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt pending flag is cleared. + */ +uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn); + +/**@brief Set Interrupt Priority. + * @note Corresponds to NVIC_SetPriority in CMSIS. + * + * @pre{IRQn is valid and not reserved by the stack} + * @pre{priority is valid and not reserved by the stack} + * + * @param[in] IRQn See the NVIC_SetPriority documentation in CMSIS. + * @param[in] priority A valid IRQ priority for use by the application. + * + * @retval ::NRF_SUCCESS The interrupt and priority level is available for the application. + */ +uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority); + +/**@brief Get Interrupt Priority. + * @note Corresponds to NVIC_GetPriority in CMSIS. + * + * @pre{IRQn is valid and not reserved by the stack} + * + * @param[in] IRQn See the NVIC_GetPriority documentation in CMSIS. + * @param[out] p_priority Return value from NVIC_GetPriority. + * + * @retval ::NRF_SUCCESS The interrupt priority is returned in p_priority. + */ +uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority); + +/**@brief System Reset. + * @note Corresponds to NVIC_SystemReset in CMSIS. + * + * @retval ::NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN + */ +uint32_t sd_nvic_SystemReset(void); + +/**@brief Enters critical region. + * + * @post Application interrupts will be disabled. + * @sa sd_nvic_critical_region_exit + * + * @param[out] p_is_nested_critical_region 1: If in a nested critical region. + * 0: Otherwise. + * + * @retval ::NRF_SUCCESS + */ +uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region); + +/**@brief Exit critical region. + * + * @pre Application has entered a critical region using ::sd_nvic_critical_region_enter. + * @post If not in a nested critical region, the application interrupts will restored to the state before ::sd_nvic_critical_region_enter was called. + * + * @param[in] is_nested_critical_region If this is set to 1, the critical region won't be exited. @sa sd_nvic_critical_region_enter. + * + * @retval ::NRF_SUCCESS + */ +uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region); + + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_NVIC_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_sdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_sdm.h new file mode 100644 index 00000000000..ec3f150fc6f --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_sdm.h @@ -0,0 +1,56 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_SDM_H__ +#define NRF_SDM_H__ + +#ifdef __cplusplus +extern "C" { +#endif + + +#define NRF_FAULT_ID_SD_RANGE_START 0x00000000 /**< SoftDevice ID range start. */ +#define NRF_FAULT_ID_APP_RANGE_START 0x00001000 /**< Application ID range start. */ + +#ifdef __cplusplus +} +#endif +#endif // NRF_SDM_H__ + + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_soc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_soc.c new file mode 100644 index 00000000000..da25fbbd32d --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_soc.c @@ -0,0 +1,48 @@ +/** + * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include +#include "nrf_soc.h" +#include "nrf_error.h" + +uint32_t sd_app_evt_wait(void) +{ + __WFE(); + return NRF_SUCCESS; +} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_soc.h new file mode 100644 index 00000000000..c1c9d044161 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_soc.h @@ -0,0 +1,80 @@ +/** + * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_SOC_H__ +#define NRF_SOC_H__ + +#include +#include "nrf.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@brief Waits for an application event. + * + * An application event is either an application interrupt or a pended interrupt when the + * interrupt is disabled. When the interrupt is enabled it will be taken immediately since + * this function will wait in thread mode, then the execution will return in the application's + * main thread. When an interrupt is disabled and gets pended it will return to the application's + * thread main. The application must ensure that the pended flag is cleared using + * ::sd_nvic_ClearPendingIRQ in order to sleep using this function. This is only necessary for + * disabled interrupts, as the interrupt handler will clear the pending flag automatically for + * enabled interrupts. + * + * In order to wake up from disabled interrupts, the SEVONPEND flag has to be set in the Cortex-M0 + * System Control Register (SCR). @sa CMSIS_SCB + * + * @note If an application interrupt has happened since the last time sd_app_evt_wait was + * called this function will return immediately and not go to sleep. This is to avoid race + * conditions that can occur when a flag is updated in the interrupt handler and processed + * in the main loop. + * + * @post An application interrupt has happened or a interrupt pending flag is set. + * + * @retval ::NRF_SUCCESS + */ +uint32_t sd_app_evt_wait(void); + + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_SOC_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/doc/s140_nrf52_6.0.0_licence-agreement.txt b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/doc/s140_nrf52_6.0.0_licence-agreement.txt new file mode 100644 index 00000000000..a71adee7b9b --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/doc/s140_nrf52_6.0.0_licence-agreement.txt @@ -0,0 +1,35 @@ +Copyright (c) 2007 - 2018, Nordic Semiconductor ASA +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/doc/s140_nrf52_6.0.0_migration-document.pdf b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/doc/s140_nrf52_6.0.0_migration-document.pdf new file mode 100644 index 0000000000000000000000000000000000000000..1379ecd581fe350004ea88531838f769efc8ef80 GIT binary patch literal 71009 zcmdqIWmp_tw=Ei+;O=h08@J#V+}*8#COC~IKyY^tF2UWM;O-vW-6c4eSN8Y4`|Q2% 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b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_err.h new file mode 100644 index 00000000000..1b4820dc3d6 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_err.h @@ -0,0 +1,93 @@ +/* + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON + @{ + @addtogroup nrf_error + @{ + @ingroup BLE_COMMON + @} + + @defgroup ble_err General error codes + @{ + + @brief General error code definitions for the BLE API. + + @ingroup BLE_COMMON +*/ +#ifndef NRF_BLE_ERR_H__ +#define NRF_BLE_ERR_H__ + +#include "nrf_error.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* @defgroup BLE_ERRORS Error Codes + * @{ */ +#define BLE_ERROR_NOT_ENABLED (NRF_ERROR_STK_BASE_NUM+0x001) /**< @ref sd_ble_enable has not been called. */ +#define BLE_ERROR_INVALID_CONN_HANDLE (NRF_ERROR_STK_BASE_NUM+0x002) /**< Invalid connection handle. */ +#define BLE_ERROR_INVALID_ATTR_HANDLE (NRF_ERROR_STK_BASE_NUM+0x003) /**< Invalid attribute handle. */ +#define BLE_ERROR_INVALID_ADV_HANDLE (NRF_ERROR_STK_BASE_NUM+0x004) /**< Invalid advertising handle. */ +#define BLE_ERROR_INVALID_ROLE (NRF_ERROR_STK_BASE_NUM+0x005) /**< Invalid role. */ +#define BLE_ERROR_BLOCKED_BY_OTHER_LINKS (NRF_ERROR_STK_BASE_NUM+0x006) /**< The attempt to change link settings failed due to the scheduling of other links. */ +/** @} */ + + +/** @defgroup BLE_ERROR_SUBRANGES Module specific error code subranges + * @brief Assignment of subranges for module specific error codes. + * @note For specific error codes, see ble_.h or ble_error_.h. + * @{ */ +#define NRF_L2CAP_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x100) /**< L2CAP specific errors. */ +#define NRF_GAP_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x200) /**< GAP specific errors. */ +#define NRF_GATTC_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x300) /**< GATT client specific errors. */ +#define NRF_GATTS_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x400) /**< GATT server specific errors. */ +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif + + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_gap.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_gap.h new file mode 100644 index 00000000000..6e6cae27549 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_gap.h @@ -0,0 +1,2669 @@ +/* + * Copyright (c) 2011 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_GAP Generic Access Profile (GAP) + @{ + @brief Definitions and prototypes for the GAP interface. + */ + +#ifndef BLE_GAP_H__ +#define BLE_GAP_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_hci.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@addtogroup BLE_GAP_ENUMERATIONS Enumerations + * @{ */ + +/**@brief GAP API SVC numbers. + */ +enum BLE_GAP_SVCS +{ + SD_BLE_GAP_ADDR_SET = BLE_GAP_SVC_BASE, /**< Set own Bluetooth Address. */ + SD_BLE_GAP_ADDR_GET = BLE_GAP_SVC_BASE + 1, /**< Get own Bluetooth Address. */ + SD_BLE_GAP_WHITELIST_SET = BLE_GAP_SVC_BASE + 2, /**< Set active whitelist. */ + SD_BLE_GAP_DEVICE_IDENTITIES_SET = BLE_GAP_SVC_BASE + 3, /**< Set device identity list. */ + SD_BLE_GAP_PRIVACY_SET = BLE_GAP_SVC_BASE + 4, /**< Set Privacy settings*/ + SD_BLE_GAP_PRIVACY_GET = BLE_GAP_SVC_BASE + 5, /**< Get Privacy settings*/ + SD_BLE_GAP_ADV_SET_CONFIGURE = BLE_GAP_SVC_BASE + 6, /**< Configure an advertising set. */ + SD_BLE_GAP_ADV_START = BLE_GAP_SVC_BASE + 7, /**< Start Advertising. */ + SD_BLE_GAP_ADV_STOP = BLE_GAP_SVC_BASE + 8, /**< Stop Advertising. */ + SD_BLE_GAP_CONN_PARAM_UPDATE = BLE_GAP_SVC_BASE + 9, /**< Connection Parameter Update. */ + SD_BLE_GAP_DISCONNECT = BLE_GAP_SVC_BASE + 10, /**< Disconnect. */ + SD_BLE_GAP_TX_POWER_SET = BLE_GAP_SVC_BASE + 11, /**< Set TX Power. */ + SD_BLE_GAP_APPEARANCE_SET = BLE_GAP_SVC_BASE + 12, /**< Set Appearance. */ + SD_BLE_GAP_APPEARANCE_GET = BLE_GAP_SVC_BASE + 13, /**< Get Appearance. */ + SD_BLE_GAP_PPCP_SET = BLE_GAP_SVC_BASE + 14, /**< Set PPCP. */ + SD_BLE_GAP_PPCP_GET = BLE_GAP_SVC_BASE + 15, /**< Get PPCP. */ + SD_BLE_GAP_DEVICE_NAME_SET = BLE_GAP_SVC_BASE + 16, /**< Set Device Name. */ + SD_BLE_GAP_DEVICE_NAME_GET = BLE_GAP_SVC_BASE + 17, /**< Get Device Name. */ + SD_BLE_GAP_AUTHENTICATE = BLE_GAP_SVC_BASE + 18, /**< Initiate Pairing/Bonding. */ + SD_BLE_GAP_SEC_PARAMS_REPLY = BLE_GAP_SVC_BASE + 19, /**< Reply with Security Parameters. */ + SD_BLE_GAP_AUTH_KEY_REPLY = BLE_GAP_SVC_BASE + 20, /**< Reply with an authentication key. */ + SD_BLE_GAP_LESC_DHKEY_REPLY = BLE_GAP_SVC_BASE + 21, /**< Reply with an LE Secure Connections DHKey. */ + SD_BLE_GAP_KEYPRESS_NOTIFY = BLE_GAP_SVC_BASE + 22, /**< Notify of a keypress during an authentication procedure. */ + SD_BLE_GAP_LESC_OOB_DATA_GET = BLE_GAP_SVC_BASE + 23, /**< Get the local LE Secure Connections OOB data. */ + SD_BLE_GAP_LESC_OOB_DATA_SET = BLE_GAP_SVC_BASE + 24, /**< Set the remote LE Secure Connections OOB data. */ + SD_BLE_GAP_ENCRYPT = BLE_GAP_SVC_BASE + 25, /**< Initiate encryption procedure. */ + SD_BLE_GAP_SEC_INFO_REPLY = BLE_GAP_SVC_BASE + 26, /**< Reply with Security Information. */ + SD_BLE_GAP_CONN_SEC_GET = BLE_GAP_SVC_BASE + 27, /**< Obtain connection security level. */ + SD_BLE_GAP_RSSI_START = BLE_GAP_SVC_BASE + 28, /**< Start reporting of changes in RSSI. */ + SD_BLE_GAP_RSSI_STOP = BLE_GAP_SVC_BASE + 29, /**< Stop reporting of changes in RSSI. */ + SD_BLE_GAP_SCAN_START = BLE_GAP_SVC_BASE + 30, /**< Start Scanning. */ + SD_BLE_GAP_SCAN_STOP = BLE_GAP_SVC_BASE + 31, /**< Stop Scanning. */ + SD_BLE_GAP_CONNECT = BLE_GAP_SVC_BASE + 32, /**< Connect. */ + SD_BLE_GAP_CONNECT_CANCEL = BLE_GAP_SVC_BASE + 33, /**< Cancel ongoing connection procedure. */ + SD_BLE_GAP_RSSI_GET = BLE_GAP_SVC_BASE + 34, /**< Get the last RSSI sample. */ + SD_BLE_GAP_PHY_UPDATE = BLE_GAP_SVC_BASE + 35, /**< Initiate or respond to a PHY Update Procedure. */ + SD_BLE_GAP_DATA_LENGTH_UPDATE = BLE_GAP_SVC_BASE + 36, /**< Initiate or respond to a Data Length Update Procedure. */ + SD_BLE_GAP_QOS_CHANNEL_SURVEY_START = BLE_GAP_SVC_BASE + 37, /**< Start Quality of Service (QoS) channel survey module. */ + SD_BLE_GAP_QOS_CHANNEL_SURVEY_STOP = BLE_GAP_SVC_BASE + 38, /**< Stop Quality of Service (QoS) channel survey module. */ +}; + +/**@brief GAP Event IDs. + * IDs that uniquely identify an event coming from the stack to the application. + */ +enum BLE_GAP_EVTS +{ + BLE_GAP_EVT_CONNECTED = BLE_GAP_EVT_BASE, + BLE_GAP_EVT_DISCONNECTED = BLE_GAP_EVT_BASE + 1, /**< Disconnected from peer. \n See @ref ble_gap_evt_disconnected_t. */ + BLE_GAP_EVT_CONN_PARAM_UPDATE = BLE_GAP_EVT_BASE + 2, /**< Connection Parameters updated. \n See @ref ble_gap_evt_conn_param_update_t. */ + BLE_GAP_EVT_SEC_PARAMS_REQUEST = BLE_GAP_EVT_BASE + 3, /**< Request to provide security parameters. \n Reply with @ref sd_ble_gap_sec_params_reply. \n See @ref ble_gap_evt_sec_params_request_t. */ + BLE_GAP_EVT_SEC_INFO_REQUEST = BLE_GAP_EVT_BASE + 4, /**< Request to provide security information. \n Reply with @ref sd_ble_gap_sec_info_reply. \n See @ref ble_gap_evt_sec_info_request_t. */ + BLE_GAP_EVT_PASSKEY_DISPLAY = BLE_GAP_EVT_BASE + 5, /**< Request to display a passkey to the user. \n In LESC Numeric Comparison, reply with @ref sd_ble_gap_auth_key_reply. \n See @ref ble_gap_evt_passkey_display_t. */ + BLE_GAP_EVT_KEY_PRESSED = BLE_GAP_EVT_BASE + 6, /**< Notification of a keypress on the remote device.\n See @ref ble_gap_evt_key_pressed_t */ + BLE_GAP_EVT_AUTH_KEY_REQUEST = BLE_GAP_EVT_BASE + 7, /**< Request to provide an authentication key. \n Reply with @ref sd_ble_gap_auth_key_reply. \n See @ref ble_gap_evt_auth_key_request_t. */ + BLE_GAP_EVT_LESC_DHKEY_REQUEST = BLE_GAP_EVT_BASE + 8, /**< Request to calculate an LE Secure Connections DHKey. \n Reply with @ref sd_ble_gap_lesc_dhkey_reply. \n See @ref ble_gap_evt_lesc_dhkey_request_t */ + BLE_GAP_EVT_AUTH_STATUS = BLE_GAP_EVT_BASE + 9, /**< Authentication procedure completed with status. \n See @ref ble_gap_evt_auth_status_t. */ + BLE_GAP_EVT_CONN_SEC_UPDATE = BLE_GAP_EVT_BASE + 10, /**< Connection security updated. \n See @ref ble_gap_evt_conn_sec_update_t. */ + BLE_GAP_EVT_TIMEOUT = BLE_GAP_EVT_BASE + 11, /**< Timeout expired. \n See @ref ble_gap_evt_timeout_t. */ + BLE_GAP_EVT_RSSI_CHANGED = BLE_GAP_EVT_BASE + 12, /**< RSSI report. \n See @ref ble_gap_evt_rssi_changed_t. */ + BLE_GAP_EVT_ADV_REPORT = BLE_GAP_EVT_BASE + 13, /**< Advertising report. \n See @ref ble_gap_evt_adv_report_t. */ + BLE_GAP_EVT_SEC_REQUEST = BLE_GAP_EVT_BASE + 14, /**< Security Request. \n See @ref ble_gap_evt_sec_request_t. */ + BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST = BLE_GAP_EVT_BASE + 15, /**< Connection Parameter Update Request. \n Reply with @ref sd_ble_gap_conn_param_update. \n See @ref ble_gap_evt_conn_param_update_request_t. */ + BLE_GAP_EVT_SCAN_REQ_REPORT = BLE_GAP_EVT_BASE + 16, /**< Scan request report. \n See @ref ble_gap_evt_scan_req_report_t. */ + BLE_GAP_EVT_PHY_UPDATE_REQUEST = BLE_GAP_EVT_BASE + 17, /**< PHY Update Request. \n Reply with @ref sd_ble_gap_phy_update. \n See @ref ble_gap_evt_phy_update_request_t. */ + BLE_GAP_EVT_PHY_UPDATE = BLE_GAP_EVT_BASE + 18, /**< PHY Update Procedure is complete. \n See @ref ble_gap_evt_phy_update_t. */ + BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST = BLE_GAP_EVT_BASE + 19, /**< Data Length Update Request. \n Reply with @ref sd_ble_gap_data_length_update.\n See @ref ble_gap_evt_data_length_update_request_t. */ + BLE_GAP_EVT_DATA_LENGTH_UPDATE = BLE_GAP_EVT_BASE + 20, /**< LL Data Channel PDU payload length updated. \n See @ref ble_gap_evt_data_length_update_t. */ + BLE_GAP_EVT_QOS_CHANNEL_SURVEY_REPORT = BLE_GAP_EVT_BASE + 21, /**< Channel survey report. \n See @ref ble_gap_evt_qos_channel_survey_report_t. */ + BLE_GAP_EVT_ADV_SET_TERMINATED = BLE_GAP_EVT_BASE + 22, /**< Advertising set terminated. \n See @ref ble_gap_evt_adv_set_terminated_t. */ +}; + +/**@brief GAP Option IDs. + * IDs that uniquely identify a GAP option. + */ +enum BLE_GAP_OPTS +{ + BLE_GAP_OPT_CH_MAP = BLE_GAP_OPT_BASE, /**< Channel Map. @ref ble_gap_opt_ch_map_t */ + BLE_GAP_OPT_LOCAL_CONN_LATENCY = BLE_GAP_OPT_BASE + 1, /**< Local connection latency. @ref ble_gap_opt_local_conn_latency_t */ + BLE_GAP_OPT_PASSKEY = BLE_GAP_OPT_BASE + 2, /**< Set passkey. @ref ble_gap_opt_passkey_t */ + BLE_GAP_OPT_COMPAT_MODE_1 = BLE_GAP_OPT_BASE + 3, /**< Compatibility mode. @ref ble_gap_opt_compat_mode_1_t */ + BLE_GAP_OPT_AUTH_PAYLOAD_TIMEOUT = BLE_GAP_OPT_BASE + 4, /**< Set Authenticated payload timeout. @ref ble_gap_opt_auth_payload_timeout_t */ + BLE_GAP_OPT_SLAVE_LATENCY_DISABLE = BLE_GAP_OPT_BASE + 5, /**< Disable slave latency. @ref ble_gap_opt_slave_latency_disable_t */ +}; + +/**@brief GAP Configuration IDs. + * + * IDs that uniquely identify a GAP configuration. + */ +enum BLE_GAP_CFGS +{ + BLE_GAP_CFG_ROLE_COUNT = BLE_GAP_CFG_BASE, /**< Role count configuration. */ + BLE_GAP_CFG_DEVICE_NAME = BLE_GAP_CFG_BASE + 1, /**< Device name configuration. */ +}; + +/**@brief GAP TX Power roles. + */ +enum BLE_GAP_TX_POWER_ROLES +{ + BLE_GAP_TX_POWER_ROLE_ADV = 1, /**< Advertiser role. */ + BLE_GAP_TX_POWER_ROLE_SCAN_INIT = 2, /**< Scanner and initiator role. */ + BLE_GAP_TX_POWER_ROLE_CONN = 3, /**< Connection role. */ +}; + +/** @} */ + +/**@addtogroup BLE_GAP_DEFINES Defines + * @{ */ + +/**@defgroup BLE_ERRORS_GAP SVC return values specific to GAP + * @{ */ +#define BLE_ERROR_GAP_UUID_LIST_MISMATCH (NRF_GAP_ERR_BASE + 0x000) /**< UUID list does not contain an integral number of UUIDs. */ +#define BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST (NRF_GAP_ERR_BASE + 0x001) /**< Use of Whitelist not permitted with discoverable advertising. */ +#define BLE_ERROR_GAP_INVALID_BLE_ADDR (NRF_GAP_ERR_BASE + 0x002) /**< The upper two bits of the address do not correspond to the specified address type. */ +#define BLE_ERROR_GAP_WHITELIST_IN_USE (NRF_GAP_ERR_BASE + 0x003) /**< Attempt to modify the whitelist while already in use by another operation. */ +#define BLE_ERROR_GAP_DEVICE_IDENTITIES_IN_USE (NRF_GAP_ERR_BASE + 0x004) /**< Attempt to modify the device identity list while already in use by another operation. */ +#define BLE_ERROR_GAP_DEVICE_IDENTITIES_DUPLICATE (NRF_GAP_ERR_BASE + 0x005) /**< The device identity list contains entries with duplicate identity addresses. */ +/**@} */ + + +/**@defgroup BLE_GAP_ROLES GAP Roles + * @{ */ +#define BLE_GAP_ROLE_INVALID 0x0 /**< Invalid Role. */ +#define BLE_GAP_ROLE_PERIPH 0x1 /**< Peripheral Role. */ +#define BLE_GAP_ROLE_CENTRAL 0x2 /**< Central Role. */ +/**@} */ + + +/**@defgroup BLE_GAP_TIMEOUT_SOURCES GAP Timeout sources + * @{ */ +#define BLE_GAP_TIMEOUT_SRC_SCAN 0x01 /**< Scanning timeout. */ +#define BLE_GAP_TIMEOUT_SRC_CONN 0x02 /**< Connection timeout. */ +#define BLE_GAP_TIMEOUT_SRC_AUTH_PAYLOAD 0x03 /**< Authenticated payload timeout. */ +/**@} */ + + +/**@defgroup BLE_GAP_ADDR_TYPES GAP Address types + * @{ */ +#define BLE_GAP_ADDR_TYPE_PUBLIC 0x00 /**< Public (identity) address.*/ +#define BLE_GAP_ADDR_TYPE_RANDOM_STATIC 0x01 /**< Random static (identity) address. */ +#define BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE 0x02 /**< Random private resolvable address. */ +#define BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE 0x03 /**< Random private non-resolvable address. */ +#define BLE_GAP_ADDR_TYPE_ANONYMOUS 0x7F /**< An advertiser may advertise without its address. + This type of advertising is called anonymous. */ +/**@} */ + + +/**@brief The default interval in seconds at which a private address is refreshed. */ +#define BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S (900) /* 15 minutes. */ +/**@brief The maximum interval in seconds at which a private address can be refreshed. */ +#define BLE_GAP_MAX_PRIVATE_ADDR_CYCLE_INTERVAL_S (41400) /* 11 hours 30 minutes. */ + + +/** @brief BLE address length. */ +#define BLE_GAP_ADDR_LEN (6) + +/**@defgroup BLE_GAP_PRIVACY_MODES Privacy modes + * @{ */ +#define BLE_GAP_PRIVACY_MODE_OFF 0x00 /**< Device will send and accept its identity address for its own address. */ +#define BLE_GAP_PRIVACY_MODE_DEVICE_PRIVACY 0x01 /**< Device will send and accept only private addresses for its own address. */ +#define BLE_GAP_PRIVACY_MODE_NETWORK_PRIVACY 0x02 /**< Device will send and accept only private addresses for its own address, + and will not accept a peer using identity address as sender address when + the peer IRK is exchanged, non-zero and added to the identity list. */ +/**@} */ + +/** @brief Invalid power level. */ +#define BLE_GAP_POWER_LEVEL_INVALID 127 + +/** @brief Advertising set handle not set. */ +#define BLE_GAP_ADV_SET_HANDLE_NOT_SET (0xFF) + +/** @brief The default number of advertising sets. */ +#define BLE_GAP_ADV_SET_COUNT_DEFAULT (1) + +/** @brief The maximum number of advertising sets supported by this SoftDevice. */ +#define BLE_GAP_ADV_SET_COUNT_MAX (1) + +/**@defgroup BLE_GAP_ADV_SET_DATA_SIZES Advertising data sizes. + * @{ */ +#define BLE_GAP_ADV_SET_DATA_SIZE_MAX (31) /**< Maximum data length for an advertising set. */ +/**@}. */ + +/** @brief Set ID not available in advertising report. */ +#define BLE_GAP_ADV_REPORT_SET_ID_NOT_AVAILABLE 0xFF + +/**@defgroup BLE_GAP_EVT_ADV_SET_TERMINATED_REASON GAP Advertising Set Terminated reasons + * @{ */ +#define BLE_GAP_EVT_ADV_SET_TERMINATED_REASON_TIMEOUT 0x01 /**< Timeout value reached. */ +#define BLE_GAP_EVT_ADV_SET_TERMINATED_REASON_LIMIT_REACHED 0x02 /**< @ref ble_gap_adv_params_t::max_adv_evts was reached. */ +/**@} */ + +/**@defgroup BLE_GAP_AD_TYPE_DEFINITIONS GAP Advertising and Scan Response Data format + * @note Found at https://www.bluetooth.org/Technical/AssignedNumbers/generic_access_profile.htm + * @{ */ +#define BLE_GAP_AD_TYPE_FLAGS 0x01 /**< Flags for discoverability. */ +#define BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_MORE_AVAILABLE 0x02 /**< Partial list of 16 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_COMPLETE 0x03 /**< Complete list of 16 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_MORE_AVAILABLE 0x04 /**< Partial list of 32 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_COMPLETE 0x05 /**< Complete list of 32 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_MORE_AVAILABLE 0x06 /**< Partial list of 128 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_COMPLETE 0x07 /**< Complete list of 128 bit service UUIDs. */ +#define BLE_GAP_AD_TYPE_SHORT_LOCAL_NAME 0x08 /**< Short local device name. */ +#define BLE_GAP_AD_TYPE_COMPLETE_LOCAL_NAME 0x09 /**< Complete local device name. */ +#define BLE_GAP_AD_TYPE_TX_POWER_LEVEL 0x0A /**< Transmit power level. */ +#define BLE_GAP_AD_TYPE_CLASS_OF_DEVICE 0x0D /**< Class of device. */ +#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C 0x0E /**< Simple Pairing Hash C. */ +#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R 0x0F /**< Simple Pairing Randomizer R. */ +#define BLE_GAP_AD_TYPE_SECURITY_MANAGER_TK_VALUE 0x10 /**< Security Manager TK Value. */ +#define BLE_GAP_AD_TYPE_SECURITY_MANAGER_OOB_FLAGS 0x11 /**< Security Manager Out Of Band Flags. */ +#define BLE_GAP_AD_TYPE_SLAVE_CONNECTION_INTERVAL_RANGE 0x12 /**< Slave Connection Interval Range. */ +#define BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_16BIT 0x14 /**< List of 16-bit Service Solicitation UUIDs. */ +#define BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_128BIT 0x15 /**< List of 128-bit Service Solicitation UUIDs. */ +#define BLE_GAP_AD_TYPE_SERVICE_DATA 0x16 /**< Service Data - 16-bit UUID. */ +#define BLE_GAP_AD_TYPE_PUBLIC_TARGET_ADDRESS 0x17 /**< Public Target Address. */ +#define BLE_GAP_AD_TYPE_RANDOM_TARGET_ADDRESS 0x18 /**< Random Target Address. */ +#define BLE_GAP_AD_TYPE_APPEARANCE 0x19 /**< Appearance. */ +#define BLE_GAP_AD_TYPE_ADVERTISING_INTERVAL 0x1A /**< Advertising Interval. */ +#define BLE_GAP_AD_TYPE_LE_BLUETOOTH_DEVICE_ADDRESS 0x1B /**< LE Bluetooth Device Address. */ +#define BLE_GAP_AD_TYPE_LE_ROLE 0x1C /**< LE Role. */ +#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C256 0x1D /**< Simple Pairing Hash C-256. */ +#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R256 0x1E /**< Simple Pairing Randomizer R-256. */ +#define BLE_GAP_AD_TYPE_SERVICE_DATA_32BIT_UUID 0x20 /**< Service Data - 32-bit UUID. */ +#define BLE_GAP_AD_TYPE_SERVICE_DATA_128BIT_UUID 0x21 /**< Service Data - 128-bit UUID. */ +#define BLE_GAP_AD_TYPE_LESC_CONFIRMATION_VALUE 0x22 /**< LE Secure Connections Confirmation Value */ +#define BLE_GAP_AD_TYPE_LESC_RANDOM_VALUE 0x23 /**< LE Secure Connections Random Value */ +#define BLE_GAP_AD_TYPE_URI 0x24 /**< URI */ +#define BLE_GAP_AD_TYPE_3D_INFORMATION_DATA 0x3D /**< 3D Information Data. */ +#define BLE_GAP_AD_TYPE_MANUFACTURER_SPECIFIC_DATA 0xFF /**< Manufacturer Specific Data. */ +/**@} */ + + +/**@defgroup BLE_GAP_ADV_FLAGS GAP Advertisement Flags + * @{ */ +#define BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE (0x01) /**< LE Limited Discoverable Mode. */ +#define BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE (0x02) /**< LE General Discoverable Mode. */ +#define BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED (0x04) /**< BR/EDR not supported. */ +#define BLE_GAP_ADV_FLAG_LE_BR_EDR_CONTROLLER (0x08) /**< Simultaneous LE and BR/EDR, Controller. */ +#define BLE_GAP_ADV_FLAG_LE_BR_EDR_HOST (0x10) /**< Simultaneous LE and BR/EDR, Host. */ +#define BLE_GAP_ADV_FLAGS_LE_ONLY_LIMITED_DISC_MODE (BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE | BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED) /**< LE Limited Discoverable Mode, BR/EDR not supported. */ +#define BLE_GAP_ADV_FLAGS_LE_ONLY_GENERAL_DISC_MODE (BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE | BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED) /**< LE General Discoverable Mode, BR/EDR not supported. */ +/**@} */ + + +/**@defgroup BLE_GAP_ADV_INTERVALS GAP Advertising interval max and min + * @{ */ +#define BLE_GAP_ADV_INTERVAL_MIN 0x000020 /**< Minimum Advertising interval in 625 us units, i.e. 20 ms. */ +#define BLE_GAP_ADV_INTERVAL_MAX 0x004000 /**< Maximum Advertising interval in 625 us units, i.e. 10.24 s. + @note Support for values above @ref BLE_GAP_ADV_INTERVAL_MAX + is experimental. Values above 0xFFFFFF, i.e 10,485.759375 s + are not supported. */ + /**@} */ + + +/**@defgroup BLE_GAP_SCAN_INTERVALS GAP Scan interval max and min + * @{ */ +#define BLE_GAP_SCAN_INTERVAL_MIN 0x0004 /**< Minimum Scan interval in 625 us units, i.e. 2.5 ms. */ +#define BLE_GAP_SCAN_INTERVAL_MAX 0xFFFF /**< Maximum Scan interval in 625 us units, i.e. 40,959.375 s. */ + /** @} */ + + +/**@defgroup BLE_GAP_SCAN_WINDOW GAP Scan window max and min + * @{ */ +#define BLE_GAP_SCAN_WINDOW_MIN 0x0004 /**< Minimum Scan window in 625 us units, i.e. 2.5 ms. */ +#define BLE_GAP_SCAN_WINDOW_MAX 0xFFFF /**< Maximum Scan window in 625 us units, i.e. 40,959.375 s. */ + /** @} */ + + +/**@defgroup BLE_GAP_SCAN_TIMEOUT GAP Scan timeout max and min + * @{ */ +#define BLE_GAP_SCAN_TIMEOUT_MIN 0x0001 /**< Minimum Scan timeout in 10 ms units, i.e 10 ms. */ +#define BLE_GAP_SCAN_TIMEOUT_UNLIMITED 0x0000 /**< Continue to scan forever. */ + /** @} */ + +/**@defgroup BLE_GAP_SCAN_BUFFER_SIZE GAP Minimum scanner buffer size + * + * Scan buffers are used for storing advertising data received from an advertiser. + * If ble_gap_scan_params_t::extended is set to 0, @ref BLE_GAP_SCAN_BUFFER_MIN is the minimum scan buffer length. + * else the minimum scan buffer size is @ref BLE_GAP_SCAN_BUFFER_EXTENDED_MIN. + * @{ */ +#define BLE_GAP_SCAN_BUFFER_MIN (31) /**< Minimum data length for an + advertising set. */ +#define BLE_GAP_SCAN_BUFFER_MAX (31) /**< Maximum data length for an + advertising set. */ +#define BLE_GAP_SCAN_BUFFER_EXTENDED_MIN (255) /**< Minimum data length for an + extended advertising set. */ +#define BLE_GAP_SCAN_BUFFER_EXTENDED_MAX (1650) /**< Maximum data length for an + extended advertising set. + @note Extended scanning is only + supported as an experimental + feature in this SoftDevice. + The scanner will only receive + advertising data up to 31 bytes. */ +/** @} */ + +/**@defgroup BLE_GAP_ADV_TYPES GAP Advertising types + * + * Advertising types defined in Bluetooth Core Specification v5.0, Vol 6, Part B, Section 4.4.2. + * + * The maximum advertising data length is defined by @ref BLE_GAP_ADV_SET_DATA_SIZE_MAX. + * Note that some of the advertising types do not support advertising data. Non-scannable types do not support + * scan response data. + * + * @{ */ +#define BLE_GAP_ADV_TYPE_CONNECTABLE_SCANNABLE_UNDIRECTED 0x01 /**< Connectable and scannable undirected + advertising events. */ +#define BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED_HIGH_DUTY_CYCLE 0x02 /**< Connectable non-scannable directed advertising + events. Advertising interval is less that 3.75 ms. + Use this type for fast reconnections. + @note Advertising data is not supported. */ +#define BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED 0x03 /**< Connectable non-scannable directed advertising + events. + @note Advertising data is not supported. */ +#define BLE_GAP_ADV_TYPE_NONCONNECTABLE_SCANNABLE_UNDIRECTED 0x04 /**< Non-connectable scannable undirected + advertising events. */ +#define BLE_GAP_ADV_TYPE_NONCONNECTABLE_NONSCANNABLE_UNDIRECTED 0x05 /**< Non-connectable non-scannable undirected + advertising events. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_CONNECTABLE_NONSCANNABLE_UNDIRECTED 0x06 /**< Connectable non-scannable undirected advertising + events using extended advertising PDUs. + @note Extended advertising types are only + supported as experimental features in this + SoftDevice. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_CONNECTABLE_NONSCANNABLE_DIRECTED 0x07 /**< Connectable non-scannable directed advertising + events using extended advertising PDUs. + @note Extended advertising types are only + supported as experimental features in this + SoftDevice. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_SCANNABLE_UNDIRECTED 0x08 /**< Non-connectable scannable undirected advertising + events using extended advertising PDUs. + @note Only scan response data is supported. + @note Extended advertising types are only + supported as experimental features in this + SoftDevice. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_SCANNABLE_DIRECTED 0x09 /**< Non-connectable scannable directed advertising + events using extended advertising PDUs. + @note Only scan response data is supported. + @note Extended advertising types are only + supported as experimental features in this + SoftDevice. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_NONSCANNABLE_UNDIRECTED 0x0A /**< Non-connectable non-scannable undirected advertising + events using extended advertising PDUs. + @note Extended advertising types are only + supported as experimental features in this + SoftDevice. */ +#define BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_NONSCANNABLE_DIRECTED 0x0B /**< Non-connectable non-scannable directed advertising + events using extended advertising PDUs. + @note Extended advertising types are only + supported as experimental features in this + SoftDevice. */ +/**@} */ + +/**@defgroup BLE_GAP_ADV_FILTER_POLICIES GAP Advertising filter policies + * @{ */ +#define BLE_GAP_ADV_FP_ANY 0x00 /**< Allow scan requests and connect requests from any device. */ +#define BLE_GAP_ADV_FP_FILTER_SCANREQ 0x01 /**< Filter scan requests with whitelist. */ +#define BLE_GAP_ADV_FP_FILTER_CONNREQ 0x02 /**< Filter connect requests with whitelist. */ +#define BLE_GAP_ADV_FP_FILTER_BOTH 0x03 /**< Filter both scan and connect requests with whitelist. */ +/**@} */ + +/**@defgroup BLE_GAP_ADV_DATA_STATUS GAP Advertising data status + * @{ */ +#define BLE_GAP_ADV_DATA_STATUS_COMPLETE 0x00 /**< All data in the advertising event have been received. */ +#define BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA 0x01 /**< More data to be received. */ +#define BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_TRUNCATED 0x02 /**< Incomplete data. Buffer size insufficient to receive more. */ +#define BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MISSED 0x03 /**< Failed to receive the remaining data. */ +/**@} */ + +/**@defgroup BLE_GAP_SCAN_FILTER_POLICIES GAP Scanner filter policies + * @{ */ +#define BLE_GAP_SCAN_FP_ACCEPT_ALL 0x00 /**< Accept all advertising packets except directed advertising packets + not addressed to this device. */ +#define BLE_GAP_SCAN_FP_WHITELIST 0x01 /**< Accept advertising packets from devices in the whitelist except directed + packets not addressed to this device. */ +#define BLE_GAP_SCAN_FP_ALL_NOT_RESOLVED_DIRECTED 0x02 /**< Accept all advertising packets specified in @ref BLE_GAP_SCAN_FP_ACCEPT_ALL. + In addition, accept directed advertising packets, where the advertiser's + address is a resolvable private address that cannot be resolved. */ +#define BLE_GAP_SCAN_FP_WHITELIST_NOT_RESOLVED_DIRECTED 0x03 /**< Accept all advertising packets specified in @ref BLE_GAP_SCAN_FP_WHITELIST. + In addition, accept directed advertising packets, where the advertiser's + address is a resolvable private address that cannot be resolved. */ +/**@} */ + +/**@defgroup BLE_GAP_ADV_TIMEOUT_VALUES GAP Advertising timeout values in 10 ms units + * @{ */ +#define BLE_GAP_ADV_TIMEOUT_HIGH_DUTY_MAX (128) /**< Maximum high duty advertising time in 10 ms units. Corresponds to 1.28 s. */ +#define BLE_GAP_ADV_TIMEOUT_LIMITED_MAX (18000) /**< Maximum advertising time in 10 ms units corresponding to TGAP(lim_adv_timeout) = 180 s in limited discoverable mode. */ +#define BLE_GAP_ADV_TIMEOUT_GENERAL_UNLIMITED (0) /**< Unlimited advertising in general discoverable mode. + For high duty cycle advertising, this corresponds to @ref BLE_GAP_ADV_TIMEOUT_HIGH_DUTY_MAX. */ +/**@} */ + + +/**@defgroup BLE_GAP_DISC_MODES GAP Discovery modes + * @{ */ +#define BLE_GAP_DISC_MODE_NOT_DISCOVERABLE 0x00 /**< Not discoverable discovery Mode. */ +#define BLE_GAP_DISC_MODE_LIMITED 0x01 /**< Limited Discovery Mode. */ +#define BLE_GAP_DISC_MODE_GENERAL 0x02 /**< General Discovery Mode. */ +/**@} */ + + +/**@defgroup BLE_GAP_IO_CAPS GAP IO Capabilities + * @{ */ +#define BLE_GAP_IO_CAPS_DISPLAY_ONLY 0x00 /**< Display Only. */ +#define BLE_GAP_IO_CAPS_DISPLAY_YESNO 0x01 /**< Display and Yes/No entry. */ +#define BLE_GAP_IO_CAPS_KEYBOARD_ONLY 0x02 /**< Keyboard Only. */ +#define BLE_GAP_IO_CAPS_NONE 0x03 /**< No I/O capabilities. */ +#define BLE_GAP_IO_CAPS_KEYBOARD_DISPLAY 0x04 /**< Keyboard and Display. */ +/**@} */ + + +/**@defgroup BLE_GAP_AUTH_KEY_TYPES GAP Authentication Key Types + * @{ */ +#define BLE_GAP_AUTH_KEY_TYPE_NONE 0x00 /**< No key (may be used to reject). */ +#define BLE_GAP_AUTH_KEY_TYPE_PASSKEY 0x01 /**< 6-digit Passkey. */ +#define BLE_GAP_AUTH_KEY_TYPE_OOB 0x02 /**< Out Of Band data. */ +/**@} */ + + +/**@defgroup BLE_GAP_KP_NOT_TYPES GAP Keypress Notification Types + * @{ */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_START 0x00 /**< Passkey entry started. */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_DIGIT_IN 0x01 /**< Passkey digit entered. */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_DIGIT_OUT 0x02 /**< Passkey digit erased. */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_CLEAR 0x03 /**< Passkey cleared. */ +#define BLE_GAP_KP_NOT_TYPE_PASSKEY_END 0x04 /**< Passkey entry completed. */ +/**@} */ + + +/**@defgroup BLE_GAP_SEC_STATUS GAP Security status + * @{ */ +#define BLE_GAP_SEC_STATUS_SUCCESS 0x00 /**< Procedure completed with success. */ +#define BLE_GAP_SEC_STATUS_TIMEOUT 0x01 /**< Procedure timed out. */ +#define BLE_GAP_SEC_STATUS_PDU_INVALID 0x02 /**< Invalid PDU received. */ +#define BLE_GAP_SEC_STATUS_RFU_RANGE1_BEGIN 0x03 /**< Reserved for Future Use range #1 begin. */ +#define BLE_GAP_SEC_STATUS_RFU_RANGE1_END 0x80 /**< Reserved for Future Use range #1 end. */ +#define BLE_GAP_SEC_STATUS_PASSKEY_ENTRY_FAILED 0x81 /**< Passkey entry failed (user canceled or other). */ +#define BLE_GAP_SEC_STATUS_OOB_NOT_AVAILABLE 0x82 /**< Out of Band Key not available. */ +#define BLE_GAP_SEC_STATUS_AUTH_REQ 0x83 /**< Authentication requirements not met. */ +#define BLE_GAP_SEC_STATUS_CONFIRM_VALUE 0x84 /**< Confirm value failed. */ +#define BLE_GAP_SEC_STATUS_PAIRING_NOT_SUPP 0x85 /**< Pairing not supported. */ +#define BLE_GAP_SEC_STATUS_ENC_KEY_SIZE 0x86 /**< Encryption key size. */ +#define BLE_GAP_SEC_STATUS_SMP_CMD_UNSUPPORTED 0x87 /**< Unsupported SMP command. */ +#define BLE_GAP_SEC_STATUS_UNSPECIFIED 0x88 /**< Unspecified reason. */ +#define BLE_GAP_SEC_STATUS_REPEATED_ATTEMPTS 0x89 /**< Too little time elapsed since last attempt. */ +#define BLE_GAP_SEC_STATUS_INVALID_PARAMS 0x8A /**< Invalid parameters. */ +#define BLE_GAP_SEC_STATUS_DHKEY_FAILURE 0x8B /**< DHKey check failure. */ +#define BLE_GAP_SEC_STATUS_NUM_COMP_FAILURE 0x8C /**< Numeric Comparison failure. */ +#define BLE_GAP_SEC_STATUS_BR_EDR_IN_PROG 0x8D /**< BR/EDR pairing in progress. */ +#define BLE_GAP_SEC_STATUS_X_TRANS_KEY_DISALLOWED 0x8E /**< BR/EDR Link Key cannot be used for LE keys. */ +#define BLE_GAP_SEC_STATUS_RFU_RANGE2_BEGIN 0x8F /**< Reserved for Future Use range #2 begin. */ +#define BLE_GAP_SEC_STATUS_RFU_RANGE2_END 0xFF /**< Reserved for Future Use range #2 end. */ +/**@} */ + + +/**@defgroup BLE_GAP_SEC_STATUS_SOURCES GAP Security status sources + * @{ */ +#define BLE_GAP_SEC_STATUS_SOURCE_LOCAL 0x00 /**< Local failure. */ +#define BLE_GAP_SEC_STATUS_SOURCE_REMOTE 0x01 /**< Remote failure. */ +/**@} */ + + +/**@defgroup BLE_GAP_CP_LIMITS GAP Connection Parameters Limits + * @{ */ +#define BLE_GAP_CP_MIN_CONN_INTVL_NONE 0xFFFF /**< No new minimum connection interval specified in connect parameters. */ +#define BLE_GAP_CP_MIN_CONN_INTVL_MIN 0x0006 /**< Lowest minimum connection interval permitted, in units of 1.25 ms, i.e. 7.5 ms. */ +#define BLE_GAP_CP_MIN_CONN_INTVL_MAX 0x0C80 /**< Highest minimum connection interval permitted, in units of 1.25 ms, i.e. 4 s. */ +#define BLE_GAP_CP_MAX_CONN_INTVL_NONE 0xFFFF /**< No new maximum connection interval specified in connect parameters. */ +#define BLE_GAP_CP_MAX_CONN_INTVL_MIN 0x0006 /**< Lowest maximum connection interval permitted, in units of 1.25 ms, i.e. 7.5 ms. */ +#define BLE_GAP_CP_MAX_CONN_INTVL_MAX 0x0C80 /**< Highest maximum connection interval permitted, in units of 1.25 ms, i.e. 4 s. */ +#define BLE_GAP_CP_SLAVE_LATENCY_MAX 0x01F3 /**< Highest slave latency permitted, in connection events. */ +#define BLE_GAP_CP_CONN_SUP_TIMEOUT_NONE 0xFFFF /**< No new supervision timeout specified in connect parameters. */ +#define BLE_GAP_CP_CONN_SUP_TIMEOUT_MIN 0x000A /**< Lowest supervision timeout permitted, in units of 10 ms, i.e. 100 ms. */ +#define BLE_GAP_CP_CONN_SUP_TIMEOUT_MAX 0x0C80 /**< Highest supervision timeout permitted, in units of 10 ms, i.e. 32 s. */ +/**@} */ + + +/**@defgroup BLE_GAP_DEVNAME GAP device name defines. + * @{ */ +#define BLE_GAP_DEVNAME_DEFAULT "nRF5x" /**< Default device name value. */ +#define BLE_GAP_DEVNAME_DEFAULT_LEN 31 /**< Default number of octets in device name. */ +#define BLE_GAP_DEVNAME_MAX_LEN 248 /**< Maximum number of octets in device name. */ +/**@} */ + + +/**@brief Disable RSSI events for connections */ +#define BLE_GAP_RSSI_THRESHOLD_INVALID 0xFF + +/**@defgroup BLE_GAP_PHYS GAP PHYs + * @{ */ +#define BLE_GAP_PHY_AUTO 0x00 /**< Automatic PHY selection. Refer @ref sd_ble_gap_phy_update for more information.*/ +#define BLE_GAP_PHY_1MBPS 0x01 /**< 1 Mbps PHY. */ +#define BLE_GAP_PHY_2MBPS 0x02 /**< 2 Mbps PHY. */ +#define BLE_GAP_PHY_CODED 0x04 /**< Coded PHY. */ +#define BLE_GAP_PHY_NOT_SET 0xFF /**< PHY is not configured. */ + +/**@brief Supported PHYs in connections, for scanning, and for advertising. */ +#define BLE_GAP_PHYS_SUPPORTED (BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS | BLE_GAP_PHY_CODED) /**< All PHYs are supported. + @note Coded PHY is only supported + as an experimental feature + in this SoftDevice. */ + +/**@} */ + +/**@defgroup BLE_GAP_CONN_SEC_MODE_SET_MACROS GAP attribute security requirement setters + * + * See @ref ble_gap_conn_sec_mode_t. + * @{ */ +/**@brief Set sec_mode pointed to by ptr to have no access rights.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_NO_ACCESS(ptr) do {(ptr)->sm = 0; (ptr)->lv = 0;} while(0) +/**@brief Set sec_mode pointed to by ptr to require no protection, open link.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_OPEN(ptr) do {(ptr)->sm = 1; (ptr)->lv = 1;} while(0) +/**@brief Set sec_mode pointed to by ptr to require encryption, but no MITM protection.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_ENC_NO_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 2;} while(0) +/**@brief Set sec_mode pointed to by ptr to require encryption and MITM protection.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_ENC_WITH_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 3;} while(0) +/**@brief Set sec_mode pointed to by ptr to require LESC encryption and MITM protection.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_LESC_ENC_WITH_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 4;} while(0) +/**@brief Set sec_mode pointed to by ptr to require signing or encryption, no MITM protection needed.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_SIGNED_NO_MITM(ptr) do {(ptr)->sm = 2; (ptr)->lv = 1;} while(0) +/**@brief Set sec_mode pointed to by ptr to require signing or encryption with MITM protection.*/ +#define BLE_GAP_CONN_SEC_MODE_SET_SIGNED_WITH_MITM(ptr) do {(ptr)->sm = 2; (ptr)->lv = 2;} while(0) +/**@} */ + + +/**@brief GAP Security Random Number Length. */ +#define BLE_GAP_SEC_RAND_LEN 8 + + +/**@brief GAP Security Key Length. */ +#define BLE_GAP_SEC_KEY_LEN 16 + + +/**@brief GAP LE Secure Connections Elliptic Curve Diffie-Hellman P-256 Public Key Length. */ +#define BLE_GAP_LESC_P256_PK_LEN 64 + + +/**@brief GAP LE Secure Connections Elliptic Curve Diffie-Hellman DHKey Length. */ +#define BLE_GAP_LESC_DHKEY_LEN 32 + + +/**@brief GAP Passkey Length. */ +#define BLE_GAP_PASSKEY_LEN 6 + + +/**@brief Maximum amount of addresses in the whitelist. */ +#define BLE_GAP_WHITELIST_ADDR_MAX_COUNT (8) + + +/**@brief Maximum amount of identities in the device identities list. */ +#define BLE_GAP_DEVICE_IDENTITIES_MAX_COUNT (8) + + +/**@brief Default connection count for a configuration. */ +#define BLE_GAP_CONN_COUNT_DEFAULT (1) + + +/**@defgroup BLE_GAP_EVENT_LENGTH GAP event length defines. + * @{ */ +#define BLE_GAP_EVENT_LENGTH_MIN (2) /**< Minimum event length, in 1.25 ms units. */ +#define BLE_GAP_EVENT_LENGTH_CODED_PHY_MIN (6) /**< The shortest event length in 1.25 ms units supporting LE Coded PHY. */ +#define BLE_GAP_EVENT_LENGTH_DEFAULT (3) /**< Default event length, in 1.25 ms units. */ +/**@} */ + + +/**@defgroup BLE_GAP_ROLE_COUNT GAP concurrent connection count defines. + * @{ */ +#define BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT (1) /**< Default maximum number of connections concurrently acting as peripherals. */ +#define BLE_GAP_ROLE_COUNT_CENTRAL_DEFAULT (3) /**< Default maximum number of connections concurrently acting as centrals. */ +#define BLE_GAP_ROLE_COUNT_CENTRAL_SEC_DEFAULT (1) /**< Default number of SMP instances shared between all connections acting as centrals. */ +#define BLE_GAP_ROLE_COUNT_COMBINED_MAX (20) /**< Maximum supported number of concurrent connections in the peripheral and central roles combined. */ + +/**@} */ + +/**@brief Automatic data length parameter. */ +#define BLE_GAP_DATA_LENGTH_AUTO 0 + +/**@defgroup BLE_GAP_AUTH_PAYLOAD_TIMEOUT Authenticated payload timeout defines. + * @{ */ +#define BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MAX (48000) /**< Maximum authenticated payload timeout in 10 ms units, i.e. 8 minutes. */ +#define BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MIN (1) /**< Minimum authenticated payload timeout in 10 ms units, i.e. 10 ms. */ +/**@} */ + +/**@defgroup GAP_SEC_MODES GAP Security Modes + * @{ */ +#define BLE_GAP_SEC_MODE 0x00 /**< No key (may be used to reject). */ +/**@} */ + +/**@brief The total number of channels in Bluetooth Low Energy. */ +#define BLE_GAP_CHANNEL_COUNT (40) + +/**@defgroup BLE_GAP_QOS_CHANNEL_SURVEY_INTERVALS Quality of Service (QoS) Channel survey interval defines + * @{ */ +#define BLE_GAP_QOS_CHANNEL_SURVEY_INTERVAL_CONTINUOUS (0) /**< Continuous channel survey. */ +#define BLE_GAP_QOS_CHANNEL_SURVEY_INTERVAL_MIN_US (7500) /**< Minimum channel survey interval in microseconds (7.5 ms). */ +#define BLE_GAP_QOS_CHANNEL_SURVEY_INTERVAL_MAX_US (4000000) /**< Maximum channel survey interval in microseconds (4 s). */ + /**@} */ + +/** @} */ + + +/**@addtogroup BLE_GAP_STRUCTURES Structures + * @{ */ + +/**@brief Advertising event properties. */ +typedef struct +{ + uint8_t type; /**< Advertising type. See @ref BLE_GAP_ADV_TYPES. */ + uint8_t anonymous : 1; /**< Omit advertiser's address from all PDUs. + @note Anonymous advertising is only available for + @ref BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_NONSCANNABLE_UNDIRECTED and + @ref BLE_GAP_ADV_TYPE_EXTENDED_NONCONNECTABLE_NONSCANNABLE_DIRECTED. */ + uint8_t include_tx_power : 1; /**< Include TxPower set by @ref sd_ble_gap_tx_power_set in the extended header + of the advertising PDU. + @note TxPower can only be added to the extended header when @ref type is an extended advertising type. */ +} ble_gap_adv_properties_t; + + +/**@brief Advertising report type. */ +typedef struct +{ + uint16_t connectable : 1; /**< Connectable advertising event type. */ + uint16_t scannable : 1; /**< Scannable advertising event type. */ + uint16_t directed : 1; /**< Directed advertising event type. */ + uint16_t scan_response : 1; /**< Received a scan response. */ + uint16_t extended_pdu : 1; /**< Received an extended advertising set. */ + uint16_t status : 2; /**< Data status. See @ref BLE_GAP_ADV_DATA_STATUS. */ + uint16_t reserved : 9; /**< Reserved for future use. */ +} ble_gap_adv_report_type_t; + +/**@brief Advertising Auxiliary Pointer. */ +typedef struct +{ + uint16_t aux_offset; /**< Time offset from the beginning of advertising packet to the auxiliary packet in 100 us units. */ + uint8_t aux_phy; /**< Indicates the PHY on which the auxiliary advertising packet is sent. See @ref BLE_GAP_PHYS. */ +} ble_gap_aux_pointer_t; + +/**@brief Bluetooth Low Energy address. */ +typedef struct +{ + uint8_t addr_id_peer : 1; /**< Only valid for peer addresses. + Reference to peer in device identities list (as set with @ref sd_ble_gap_device_identities_set) when peer is using privacy. */ + uint8_t addr_type : 7; /**< See @ref BLE_GAP_ADDR_TYPES. */ + uint8_t addr[BLE_GAP_ADDR_LEN]; /**< 48-bit address, LSB format. + addr is not used if addr_type is @ref BLE_GAP_ADDR_TYPE_ANONYMOUS. */ +} ble_gap_addr_t; + + +/**@brief GAP connection parameters. + * + * @note When ble_conn_params_t is received in an event, both min_conn_interval and + * max_conn_interval will be equal to the connection interval set by the central. + * + * @note If both conn_sup_timeout and max_conn_interval are specified, then the following constraint applies: + * conn_sup_timeout * 4 > (1 + slave_latency) * max_conn_interval + * that corresponds to the following Bluetooth Spec requirement: + * The Supervision_Timeout in milliseconds shall be larger than + * (1 + Conn_Latency) * Conn_Interval_Max * 2, where Conn_Interval_Max is given in milliseconds. + */ +typedef struct +{ + uint16_t min_conn_interval; /**< Minimum Connection Interval in 1.25 ms units, see @ref BLE_GAP_CP_LIMITS.*/ + uint16_t max_conn_interval; /**< Maximum Connection Interval in 1.25 ms units, see @ref BLE_GAP_CP_LIMITS.*/ + uint16_t slave_latency; /**< Slave Latency in number of connection events, see @ref BLE_GAP_CP_LIMITS.*/ + uint16_t conn_sup_timeout; /**< Connection Supervision Timeout in 10 ms units, see @ref BLE_GAP_CP_LIMITS.*/ +} ble_gap_conn_params_t; + + +/**@brief GAP connection security modes. + * + * Security Mode 0 Level 0: No access permissions at all (this level is not defined by the Bluetooth Core specification).\n + * Security Mode 1 Level 1: No security is needed (aka open link).\n + * Security Mode 1 Level 2: Encrypted link required, MITM protection not necessary.\n + * Security Mode 1 Level 3: MITM protected encrypted link required.\n + * Security Mode 1 Level 4: LESC MITM protected encrypted link using a 128-bit strength encryption key required.\n + * Security Mode 2 Level 1: Signing or encryption required, MITM protection not necessary.\n + * Security Mode 2 Level 2: MITM protected signing required, unless link is MITM protected encrypted.\n + */ +typedef struct +{ + uint8_t sm : 4; /**< Security Mode (1 or 2), 0 for no permissions at all. */ + uint8_t lv : 4; /**< Level (1, 2, 3 or 4), 0 for no permissions at all. */ + +} ble_gap_conn_sec_mode_t; + + +/**@brief GAP connection security status.*/ +typedef struct +{ + ble_gap_conn_sec_mode_t sec_mode; /**< Currently active security mode for this connection.*/ + uint8_t encr_key_size; /**< Length of currently active encryption key, 7 to 16 octets (only applicable for bonding procedures). */ +} ble_gap_conn_sec_t; + +/**@brief Identity Resolving Key. */ +typedef struct +{ + uint8_t irk[BLE_GAP_SEC_KEY_LEN]; /**< Array containing IRK. */ +} ble_gap_irk_t; + + +/**@brief Channel mask (40 bits). + * Every channel is represented with a bit positioned as per channel index defined in Bluetooth Core Specification v5.0, + * Vol 6, Part B, Section 1.4.1. The LSB contained in array element 0 represents channel index 0, and bit 39 represents + * channel index 39. If a bit is set to 1, the channel is not used. + */ +typedef uint8_t ble_gap_ch_mask_t[5]; + + +/**@brief GAP advertising parameters. */ +typedef struct +{ + ble_gap_adv_properties_t properties; /**< The properties of the advertising events. */ + ble_gap_addr_t const *p_peer_addr; /**< Address of a known peer. + @note ble_gap_addr_t::addr_type cannot be + @ref BLE_GAP_ADDR_TYPE_ANONYMOUS. + - When privacy is enabled and the local device uses + @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE addresses, + the device identity list is searched for a matching entry. If + the local IRK for that device identity is set, the local IRK + for that device will be used to generate the advertiser address + field in the advertising packet. + - If @ref ble_gap_adv_properties_t::type is directed, this must be + set to the targeted scanner or initiator. If the peer address is + in the device identity list, the peer IRK for that device will be + used to generate @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE + target addresses used in the advertising event PDUs. */ + uint32_t interval; /**< Advertising interval in 625 us units. @sa BLE_GAP_ADV_INTERVALS. + @note If @ref ble_gap_adv_properties_t::type is set to + @ref BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED_HIGH_DUTY_CYCLE + advertising, this parameter is ignored. */ + uint16_t duration; /**< Advertising duration in 10 ms units. When timeout is reached, + an event of type @ref BLE_GAP_EVT_ADV_SET_TERMINATED is raised. + @sa BLE_GAP_ADV_TIMEOUT_VALUES. */ + uint8_t max_adv_evts; /**< Maximum advertising events that shall be sent prior to disabling + advertising. Setting the value to 0 disables the limitation. When + the count of advertising events specified by this parameter + (if not 0) is reached, advertising will be automatically stopped + and an event of type @ref BLE_GAP_EVT_ADV_SET_TERMINATED is raised + @note If @ref ble_gap_adv_properties_t::type is set to + @ref BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED_HIGH_DUTY_CYCLE, + this parameter is ignored. + @note Setting max_adv_evts to a values not equal to 0 is only supported + as an experimental feature in this SoftDevice. */ + ble_gap_ch_mask_t channel_mask; /**< Channel mask for primary and secondary advertising channels. + At least one of the primary channels, that is channel index 37-39, must be used. + Masking away secondary advertising channels is not supported. */ + uint8_t filter_policy; /**< Filter Policy. @sa BLE_GAP_ADV_FILTER_POLICIES. */ + uint8_t primary_phy; /**< Indicates the PHY on which the primary advertising channel packets + are transmitted. If set to @ref BLE_GAP_PHY_AUTO, @ref BLE_GAP_PHY_1MBPS + will be used. + Valid values are @ref BLE_GAP_PHY_1MBPS and @ref BLE_GAP_PHY_CODED. + @note The primary_phy shall indicate @ref BLE_GAP_PHY_1MBPS if + @ref ble_gap_adv_properties_t::type is not an extended advertising type. */ + uint8_t secondary_phy; /**< Indicates the PHY on which the secondary advertising channel packets + are transmitted. + If set to @ref BLE_GAP_PHY_AUTO, @ref BLE_GAP_PHY_1MBPS will be used. + Valid values are + @ref BLE_GAP_PHY_1MBPS, @ref BLE_GAP_PHY_2MBPS, and @ref BLE_GAP_PHY_CODED. + If @ref ble_gap_adv_properties_t::type is an extended advertising type + and connectable, this is the PHY that will be used to establish a + connection and send AUX_ADV_IND packets on. + @note This parameter will be ignored when + @ref ble_gap_adv_properties_t::type is not an extended advertising type. */ + uint8_t set_id:4; /**< The advertising set identifier distinguishes this advertising set from other + advertising sets transmitted by this and other devices. + @note This parameter will be ignored when + @ref ble_gap_adv_properties_t::type is not an extended advertising type. */ + uint8_t scan_req_notification:1; /**< Enable scan request notifications for this advertising set. When a + scan request is received and the scanner address is allowed + by the filter policy, @ref BLE_GAP_EVT_SCAN_REQ_REPORT is raised. + @note This parameter will be ignored when + @ref ble_gap_adv_properties_t::type is a non-scannable + advertising type. */ +} ble_gap_adv_params_t; + + +/**@brief GAP advertising data buffers. + * + * The application must provide the buffers for advertisement. The memory shall reside in application RAM, and + * shall never be modified while advertising. The data shall be kept alive until either: + * - @ref BLE_GAP_EVT_ADV_SET_TERMINATED is raised. + * - @ref BLE_GAP_EVT_CONNECTED is raised with @ref ble_gap_evt_connected_t::adv_handle set to the corresponding + * advertising handle. + * - Advertising is stopped. + * - Advertising data is changed. + * To update advertising data while advertising, provide new buffers to @ref sd_ble_gap_adv_set_configure. */ +typedef struct +{ + ble_data_t adv_data; /**< Advertising data. + @note + Advertising data can only be specified for a @ref ble_gap_adv_properties_t::type + that is allowed to contain advertising data. */ + ble_data_t scan_rsp_data; /**< Scan response data. + @note + Scan response data can only be specified for a @ref ble_gap_adv_properties_t::type + that is scannable. */ +} ble_gap_adv_data_t; + + +/**@brief GAP scanning parameters. */ +typedef struct +{ + uint8_t extended : 1; /**< If 1, the scanner will accept extended advertising packets. + If set to 0, the scanner will not receive advertising packets + on secondary advertising channels, and will not be able + to receive long advertising PDUs. + @note Extended scanning is only supported as an experimental feature in this + SoftDevice. */ + uint8_t report_incomplete_evts : 1; /**< If 1, events of type @ref ble_gap_evt_adv_report_t may have + @ref ble_gap_adv_report_type_t::status set to + @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA. + This parameter is ignored when used with @ref sd_ble_gap_connect + @note This may be used to abort receiving more packets from an extended + advertising event, and is only available for extended + scanning, see @ref sd_ble_gap_scan_start. + @note This feature is not supported by this SoftDevice. */ + uint8_t active : 1; /**< If 1, perform active scanning by sending scan requests. + This parameter is ignored when used with @ref sd_ble_gap_connect. */ + uint8_t filter_policy : 2; /**< Scanning filter policy. @sa BLE_GAP_SCAN_FILTER_POLICIES. + @note Only @ref BLE_GAP_SCAN_FP_ACCEPT_ALL and + @ref BLE_GAP_SCAN_FP_WHITELIST are valid when used with + @ref sd_ble_gap_connect */ + uint8_t scan_phys; /**< Bitfield of PHYs to scan on. If set to @ref BLE_GAP_PHY_AUTO, + scan_phys will default to @ref BLE_GAP_PHY_1MBPS. + - If @ref ble_gap_scan_params_t::extended is set to 0, the only + supported PHY is @ref BLE_GAP_PHY_1MBPS. + - When used with @ref sd_ble_gap_scan_start, + the bitfield indicates the PHYs the scanner will use for scanning + on primary advertising channels. The scanner will accept + @ref BLE_GAP_PHYS_SUPPORTED as secondary advertising channel PHYs. + - When used with @ref sd_ble_gap_connect, the + bitfield indicates the PHYs on where a connection may be initiated. + If scan_phys contains @ref BLE_GAP_PHY_1MBPS and/or @ref BLE_GAP_PHY_2MBPS, + the primary scan PHY is @ref BLE_GAP_PHY_1MBPS. + If scan_phys also contains @ref BLE_GAP_PHY_CODED, the primary scan + PHY will also contain @ref BLE_GAP_PHY_CODED. If the only scan PHY is + @ref BLE_GAP_PHY_CODED, the primary scan PHY is + @ref BLE_GAP_PHY_CODED only. */ + uint16_t interval; /**< Scan interval in 625 us units. @sa BLE_GAP_SCAN_INTERVALS. */ + uint16_t window; /**< Scan window in 625 us units. @sa BLE_GAP_SCAN_WINDOW. */ + uint16_t timeout; /**< Scan timeout in 10 ms units. @sa BLE_GAP_SCAN_TIMEOUT. */ + ble_gap_ch_mask_t channel_mask; /**< Channel mask for primary and secondary advertising channels. + At least one of the primary channels, that is channel index 37-39, must be + set to 0. + Masking away secondary channels is not supported. */ +} ble_gap_scan_params_t; + + +/**@brief Privacy. + * + * The privacy feature provides a way for the device to avoid being tracked over a period of time. + * The privacy feature, when enabled, hides the local device identity and replaces it with a private address + * that is automatically refreshed at a specified interval. + * + * If a device still wants to be recognized by other peers, it needs to share it's Identity Resolving Key (IRK). + * With this key, a device can generate a random private address that can only be recognized by peers in possession of that key, + * and devices can establish connections without revealing their real identities. + * + * Both network privacy (@ref BLE_GAP_PRIVACY_MODE_NETWORK_PRIVACY) and device privacy (@ref BLE_GAP_PRIVACY_MODE_DEVICE_PRIVACY) + * are supported. + * + * @note If the device IRK is updated, the new IRK becomes the one to be distributed in all + * bonding procedures performed after @ref sd_ble_gap_privacy_set returns. + * The IRK distributed during bonding procedure is the device IRK that is active when @ref sd_ble_gap_sec_params_reply is called. + */ +typedef struct +{ + uint8_t privacy_mode; /**< Privacy mode, see @ref BLE_GAP_PRIVACY_MODES. Default is @ref BLE_GAP_PRIVACY_MODE_OFF. */ + uint8_t private_addr_type; /**< The private address type must be either @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE or @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE. */ + uint16_t private_addr_cycle_s; /**< Private address cycle interval in seconds. Providing an address cycle value of 0 will use the default value defined by @ref BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S. */ + ble_gap_irk_t *p_device_irk; /**< When used as input, pointer to IRK structure that will be used as the default IRK. If NULL, the device default IRK will be used. + When used as output, pointer to IRK structure where the current default IRK will be written to. If NULL, this argument is ignored. + By default, the default IRK is used to generate random private resolvable addresses for the local device unless instructed otherwise. */ +} ble_gap_privacy_params_t; + + +/**@brief PHY preferences for TX and RX + * @note tx_phys and rx_phys are bit fields. Multiple bits can be set in them to indicate multiple preferred PHYs for each direction. + * @code + * p_gap_phys->tx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; + * p_gap_phys->rx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; + * @endcode + * + */ +typedef struct +{ + uint8_t tx_phys; /**< Preferred transmit PHYs, see @ref BLE_GAP_PHYS. */ + uint8_t rx_phys; /**< Preferred receive PHYs, see @ref BLE_GAP_PHYS. */ +} ble_gap_phys_t; + +/** @brief Keys that can be exchanged during a bonding procedure. */ +typedef struct +{ + uint8_t enc : 1; /**< Long Term Key and Master Identification. */ + uint8_t id : 1; /**< Identity Resolving Key and Identity Address Information. */ + uint8_t sign : 1; /**< Connection Signature Resolving Key. */ + uint8_t link : 1; /**< Derive the Link Key from the LTK. */ +} ble_gap_sec_kdist_t; + + +/**@brief GAP security parameters. */ +typedef struct +{ + uint8_t bond : 1; /**< Perform bonding. */ + uint8_t mitm : 1; /**< Enable Man In The Middle protection. */ + uint8_t lesc : 1; /**< Enable LE Secure Connection pairing. */ + uint8_t keypress : 1; /**< Enable generation of keypress notifications. */ + uint8_t io_caps : 3; /**< IO capabilities, see @ref BLE_GAP_IO_CAPS. */ + uint8_t oob : 1; /**< The OOB data flag. + - In LE legacy pairing, this flag is set if a device has out of band authentication data. + The OOB method is used if both of the devices have out of band authentication data. + - In LE Secure Connections pairing, this flag is set if a device has the peer device's out of band authentication data. + The OOB method is used if at least one device has the peer device's OOB data available. */ + uint8_t min_key_size; /**< Minimum encryption key size in octets between 7 and 16. If 0 then not applicable in this instance. */ + uint8_t max_key_size; /**< Maximum encryption key size in octets between min_key_size and 16. */ + ble_gap_sec_kdist_t kdist_own; /**< Key distribution bitmap: keys that the local device will distribute. */ + ble_gap_sec_kdist_t kdist_peer; /**< Key distribution bitmap: keys that the remote device will distribute. */ +} ble_gap_sec_params_t; + + +/**@brief GAP Encryption Information. */ +typedef struct +{ + uint8_t ltk[BLE_GAP_SEC_KEY_LEN]; /**< Long Term Key. */ + uint8_t lesc : 1; /**< Key generated using LE Secure Connections. */ + uint8_t auth : 1; /**< Authenticated Key. */ + uint8_t ltk_len : 6; /**< LTK length in octets. */ +} ble_gap_enc_info_t; + + +/**@brief GAP Master Identification. */ +typedef struct +{ + uint16_t ediv; /**< Encrypted Diversifier. */ + uint8_t rand[BLE_GAP_SEC_RAND_LEN]; /**< Random Number. */ +} ble_gap_master_id_t; + + +/**@brief GAP Signing Information. */ +typedef struct +{ + uint8_t csrk[BLE_GAP_SEC_KEY_LEN]; /**< Connection Signature Resolving Key. */ +} ble_gap_sign_info_t; + + +/**@brief GAP LE Secure Connections P-256 Public Key. */ +typedef struct +{ + uint8_t pk[BLE_GAP_LESC_P256_PK_LEN]; /**< LE Secure Connections Elliptic Curve Diffie-Hellman P-256 Public Key. Stored in the standard SMP protocol format: {X,Y} both in little-endian. */ +} ble_gap_lesc_p256_pk_t; + + +/**@brief GAP LE Secure Connections DHKey. */ +typedef struct +{ + uint8_t key[BLE_GAP_LESC_DHKEY_LEN]; /**< LE Secure Connections Elliptic Curve Diffie-Hellman Key. Stored in little-endian. */ +} ble_gap_lesc_dhkey_t; + + +/**@brief GAP LE Secure Connections OOB data. */ +typedef struct +{ + ble_gap_addr_t addr; /**< Bluetooth address of the device. */ + uint8_t r[BLE_GAP_SEC_KEY_LEN]; /**< Random Number. */ + uint8_t c[BLE_GAP_SEC_KEY_LEN]; /**< Confirm Value. */ +} ble_gap_lesc_oob_data_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_CONNECTED. */ +typedef struct +{ + ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 + and the address is the device's identity address. */ + uint8_t role; /**< BLE role for this connection, see @ref BLE_GAP_ROLES */ + ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ + uint8_t adv_handle; /**< Advertising handle in which advertising has ended. + This variable is only set if role is set to @ref BLE_GAP_ROLE_PERIPH. */ + ble_gap_adv_data_t adv_data; /**< Advertising buffers corresponding to the terminated + advertising set. The advertising buffers provided in + @ref sd_ble_gap_adv_set_configure are now released. + This variable is only set if role is set to @ref BLE_GAP_ROLE_PERIPH. */ +} ble_gap_evt_connected_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_DISCONNECTED. */ +typedef struct +{ + uint8_t reason; /**< HCI error code, see @ref BLE_HCI_STATUS_CODES. */ +} ble_gap_evt_disconnected_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_CONN_PARAM_UPDATE. */ +typedef struct +{ + ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ +} ble_gap_evt_conn_param_update_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_PHY_UPDATE_REQUEST. */ +typedef struct +{ + ble_gap_phys_t peer_preferred_phys; /**< The PHYs the peer prefers to use. */ +} ble_gap_evt_phy_update_request_t; + +/**@brief Event Structure for @ref BLE_GAP_EVT_PHY_UPDATE. */ +typedef struct +{ + uint8_t status; /**< Status of the procedure, see @ref BLE_HCI_STATUS_CODES.*/ + uint8_t tx_phy; /**< TX PHY for this connection, see @ref BLE_GAP_PHYS. */ + uint8_t rx_phy; /**< RX PHY for this connection, see @ref BLE_GAP_PHYS. */ +} ble_gap_evt_phy_update_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST. */ +typedef struct +{ + ble_gap_sec_params_t peer_params; /**< Initiator Security Parameters. */ +} ble_gap_evt_sec_params_request_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_SEC_INFO_REQUEST. */ +typedef struct +{ + ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. */ + ble_gap_master_id_t master_id; /**< Master Identification for LTK lookup. */ + uint8_t enc_info : 1; /**< If 1, Encryption Information required. */ + uint8_t id_info : 1; /**< If 1, Identity Information required. */ + uint8_t sign_info : 1; /**< If 1, Signing Information required. */ +} ble_gap_evt_sec_info_request_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_PASSKEY_DISPLAY. */ +typedef struct +{ + uint8_t passkey[BLE_GAP_PASSKEY_LEN]; /**< 6-digit passkey in ASCII ('0'-'9' digits only). */ + uint8_t match_request : 1; /**< If 1 requires the application to report the match using @ref sd_ble_gap_auth_key_reply + with either @ref BLE_GAP_AUTH_KEY_TYPE_NONE if there is no match or + @ref BLE_GAP_AUTH_KEY_TYPE_PASSKEY if there is a match. */ +} ble_gap_evt_passkey_display_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_KEY_PRESSED. */ +typedef struct +{ + uint8_t kp_not; /**< Keypress notification type, see @ref BLE_GAP_KP_NOT_TYPES. */ +} ble_gap_evt_key_pressed_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_AUTH_KEY_REQUEST. */ +typedef struct +{ + uint8_t key_type; /**< See @ref BLE_GAP_AUTH_KEY_TYPES. */ +} ble_gap_evt_auth_key_request_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST. */ +typedef struct +{ + ble_gap_lesc_p256_pk_t *p_pk_peer; /**< LE Secure Connections remote P-256 Public Key. This will point to the application-supplied memory + inside the keyset during the call to @ref sd_ble_gap_sec_params_reply. */ + uint8_t oobd_req :1; /**< LESC OOB data required. A call to @ref sd_ble_gap_lesc_oob_data_set is required to complete the procedure. */ +} ble_gap_evt_lesc_dhkey_request_t; + + +/**@brief Security levels supported. + * @note See Bluetooth Specification Version 4.2 Volume 3, Part C, Chapter 10, Section 10.2.1. +*/ +typedef struct +{ + uint8_t lv1 : 1; /**< If 1: Level 1 is supported. */ + uint8_t lv2 : 1; /**< If 1: Level 2 is supported. */ + uint8_t lv3 : 1; /**< If 1: Level 3 is supported. */ + uint8_t lv4 : 1; /**< If 1: Level 4 is supported. */ +} ble_gap_sec_levels_t; + + +/**@brief Encryption Key. */ +typedef struct +{ + ble_gap_enc_info_t enc_info; /**< Encryption Information. */ + ble_gap_master_id_t master_id; /**< Master Identification. */ +} ble_gap_enc_key_t; + + +/**@brief Identity Key. */ +typedef struct +{ + ble_gap_irk_t id_info; /**< Identity Resolving Key. */ + ble_gap_addr_t id_addr_info; /**< Identity Address. */ +} ble_gap_id_key_t; + + +/**@brief Security Keys. */ +typedef struct +{ + ble_gap_enc_key_t *p_enc_key; /**< Encryption Key, or NULL. */ + ble_gap_id_key_t *p_id_key; /**< Identity Key, or NULL. */ + ble_gap_sign_info_t *p_sign_key; /**< Signing Key, or NULL. */ + ble_gap_lesc_p256_pk_t *p_pk; /**< LE Secure Connections P-256 Public Key. When in debug mode the application must use the value defined + in the Core Bluetooth Specification v4.2 Vol.3, Part H, Section 2.3.5.6.1 */ +} ble_gap_sec_keys_t; + + +/**@brief Security key set for both local and peer keys. */ +typedef struct +{ + ble_gap_sec_keys_t keys_own; /**< Keys distributed by the local device. For LE Secure Connections the encryption key will be generated locally and will always be stored if bonding. */ + ble_gap_sec_keys_t keys_peer; /**< Keys distributed by the remote device. For LE Secure Connections, p_enc_key must always be NULL. */ +} ble_gap_sec_keyset_t; + + +/**@brief Data Length Update Procedure parameters. */ +typedef struct +{ + uint16_t max_tx_octets; /**< Maximum number of payload octets that a Controller supports for transmission of a single Link Layer Data Channel PDU. */ + uint16_t max_rx_octets; /**< Maximum number of payload octets that a Controller supports for reception of a single Link Layer Data Channel PDU. */ + uint16_t max_tx_time_us; /**< Maximum time, in microseconds, that a Controller supports for transmission of a single Link Layer Data Channel PDU. */ + uint16_t max_rx_time_us; /**< Maximum time, in microseconds, that a Controller supports for reception of a single Link Layer Data Channel PDU. */ +} ble_gap_data_length_params_t; + + +/**@brief Data Length Update Procedure local limitation. */ +typedef struct +{ + uint16_t tx_payload_limited_octets; /**< If > 0, the requested TX packet length is too long by this many octets. */ + uint16_t rx_payload_limited_octets; /**< If > 0, the requested RX packet length is too long by this many octets. */ + uint16_t tx_rx_time_limited_us; /**< If > 0, the requested combination of TX and RX packet lengths is too long by this many microseconds. */ +} ble_gap_data_length_limitation_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_AUTH_STATUS. */ +typedef struct +{ + uint8_t auth_status; /**< Authentication status, see @ref BLE_GAP_SEC_STATUS. */ + uint8_t error_src : 2; /**< On error, source that caused the failure, see @ref BLE_GAP_SEC_STATUS_SOURCES. */ + uint8_t bonded : 1; /**< Procedure resulted in a bond. */ + uint8_t lesc : 1; /**< Procedure resulted in a LE Secure Connection. */ + ble_gap_sec_levels_t sm1_levels; /**< Levels supported in Security Mode 1. */ + ble_gap_sec_levels_t sm2_levels; /**< Levels supported in Security Mode 2. */ + ble_gap_sec_kdist_t kdist_own; /**< Bitmap stating which keys were exchanged (distributed) by the local device. If bonding with LE Secure Connections, the enc bit will be always set. */ + ble_gap_sec_kdist_t kdist_peer; /**< Bitmap stating which keys were exchanged (distributed) by the remote device. If bonding with LE Secure Connections, the enc bit will never be set. */ +} ble_gap_evt_auth_status_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_CONN_SEC_UPDATE. */ +typedef struct +{ + ble_gap_conn_sec_t conn_sec; /**< Connection security level. */ +} ble_gap_evt_conn_sec_update_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_TIMEOUT. */ +typedef struct +{ + uint8_t src; /**< Source of timeout event, see @ref BLE_GAP_TIMEOUT_SOURCES. */ + union + { + ble_data_t adv_report_buffer; /**< If source is set to @ref BLE_GAP_TIMEOUT_SRC_SCAN, the released + scan buffer is contained in this field. */ + } params; /**< Event Parameters. */ +} ble_gap_evt_timeout_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_RSSI_CHANGED. */ +typedef struct +{ + int8_t rssi; /**< Received Signal Strength Indication in dBm. + @note ERRATA-153 requires the rssi sample to be compensated based on a temperature measurement. */ + uint8_t ch_index; /**< Data Channel Index on which the Signal Strength is measured (0-36). */ +} ble_gap_evt_rssi_changed_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_ADV_SET_TERMINATED */ +typedef struct +{ + uint8_t reason; /**< Reason for why the advertising set terminated. See + @ref BLE_GAP_EVT_ADV_SET_TERMINATED_REASON. */ + uint8_t adv_handle; /**< Advertising handle in which advertising has ended. */ + uint8_t num_completed_adv_events; /**< If @ref ble_gap_adv_params_t::max_adv_evts was not set to 0, + this field indicates the number of completed advertising events. */ + ble_gap_adv_data_t adv_data; /**< Advertising buffers corresponding to the terminated + advertising set. The advertising buffers provided in + @ref sd_ble_gap_adv_set_configure are now released. */ +} ble_gap_evt_adv_set_terminated_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_ADV_REPORT. + * + * @note If @ref ble_gap_adv_report_type_t::status is set to @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA, + * not all fields in the advertising report may be available. + * + * @note When ble_gap_adv_report_type_t::status is not set to @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA, + * scanning will be paused. To continue scanning, call @ref sd_ble_gap_scan_start. + */ +typedef struct +{ + ble_gap_adv_report_type_t type; /**< Advertising report type. See @ref ble_gap_adv_report_type_t. */ + ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr is resolved: + @ref ble_gap_addr_t::addr_id_peer is set to 1 and the address is the + peer's identity address. */ + ble_gap_addr_t direct_addr; /**< Contains the target address of the advertising event if + @ref ble_gap_adv_report_type_t::directed is set to 1. If the + SoftDevice was able to resolve the address, + @ref ble_gap_addr_t::addr_id_peer is set to 1 and the direct_addr + contains the local identity address. If the target address of the + advertising event is @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE, + and the SoftDevice was unable to resolve it, the application may try + to resolve this address to find out if the advertising event was + directed to us. */ + uint8_t primary_phy; /**< Indicates the PHY on which the primary advertising packet was received on. + See @ref BLE_GAP_PHYS. */ + uint8_t secondary_phy; /**< Indicates the PHY on which the secondary advertising packet was received on. + See @ref BLE_GAP_PHYS. This field is to 0 if no packets where received on + a secondary advertising channel. */ + int8_t tx_power; /**< TX Power reported by the advertiser in the last packet header received. + This field is set to @ref BLE_GAP_POWER_LEVEL_INVALID if the + last received packet did not contain the Tx Power field. + @note TX Power is only included in extended advertising packets. */ + int8_t rssi; /**< Received Signal Strength Indication in dBm of the last packet received. + @note ERRATA-153 requires the rssi sample to be compensated based on a temperature measurement. */ + uint8_t ch_index; /**< Channel Index on which the last advertising packet is received (0-39). */ + uint8_t set_id; /**< Set ID of the received advertising data. Set ID is not present + if set to @ref BLE_GAP_ADV_REPORT_SET_ID_NOT_AVAILABLE. */ + uint16_t data_id:12; /**< The advertising data ID of the received advertising data. Data ID + is not present if @ref ble_gap_evt_adv_report_t::set_id is set to + @ref BLE_GAP_ADV_REPORT_SET_ID_NOT_AVAILABLE. */ + ble_data_t data; /**< Received advertising or scan response data. If + @ref ble_gap_adv_report_type_t::status is not set to + @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA, the data buffer provided + in @ref sd_ble_gap_scan_start is now released. */ + ble_gap_aux_pointer_t aux_pointer; /**< The offset and PHY of the next advertising packet in this extended advertising + event. @note This field is only set if @ref ble_gap_adv_report_type_t::status + is set to @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA. */ +} ble_gap_evt_adv_report_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_SEC_REQUEST. */ +typedef struct +{ + uint8_t bond : 1; /**< Perform bonding. */ + uint8_t mitm : 1; /**< Man In The Middle protection requested. */ + uint8_t lesc : 1; /**< LE Secure Connections requested. */ + uint8_t keypress : 1; /**< Generation of keypress notifications requested. */ +} ble_gap_evt_sec_request_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST. */ +typedef struct +{ + ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ +} ble_gap_evt_conn_param_update_request_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_SCAN_REQ_REPORT. */ +typedef struct +{ + uint8_t adv_handle; /**< Advertising handle for the advertising set which received the Scan Request */ + int8_t rssi; /**< Received Signal Strength Indication in dBm. + @note ERRATA-153 requires the rssi sample to be compensated based on a temperature measurement. */ + ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 + and the address is the device's identity address. */ +} ble_gap_evt_scan_req_report_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST. */ +typedef struct +{ + ble_gap_data_length_params_t peer_params; /**< Peer data length parameters. */ +} ble_gap_evt_data_length_update_request_t; + +/**@brief Event structure for @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE. */ +typedef struct +{ + ble_gap_data_length_params_t effective_params; /**< The effective data length parameters. */ +} ble_gap_evt_data_length_update_t; + + +/**@brief Event structure for @ref BLE_GAP_EVT_QOS_CHANNEL_SURVEY_REPORT. */ +typedef struct +{ + int8_t channel_energy[BLE_GAP_CHANNEL_COUNT]; /**< The measured energy on the Bluetooth Low Energy + channels, in dBm, indexed by Channel Index. + If no measurement is available for the given channel, channel_energy is set to + @ref BLE_GAP_POWER_LEVEL_INVALID. */ +} ble_gap_evt_qos_channel_survey_report_t; + +/**@brief GAP event structure. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which event occurred. */ + union /**< union alternative identified by evt_id in enclosing struct. */ + { + ble_gap_evt_connected_t connected; /**< Connected Event Parameters. */ + ble_gap_evt_disconnected_t disconnected; /**< Disconnected Event Parameters. */ + ble_gap_evt_conn_param_update_t conn_param_update; /**< Connection Parameter Update Parameters. */ + ble_gap_evt_sec_params_request_t sec_params_request; /**< Security Parameters Request Event Parameters. */ + ble_gap_evt_sec_info_request_t sec_info_request; /**< Security Information Request Event Parameters. */ + ble_gap_evt_passkey_display_t passkey_display; /**< Passkey Display Event Parameters. */ + ble_gap_evt_key_pressed_t key_pressed; /**< Key Pressed Event Parameters. */ + ble_gap_evt_auth_key_request_t auth_key_request; /**< Authentication Key Request Event Parameters. */ + ble_gap_evt_lesc_dhkey_request_t lesc_dhkey_request; /**< LE Secure Connections DHKey calculation request. */ + ble_gap_evt_auth_status_t auth_status; /**< Authentication Status Event Parameters. */ + ble_gap_evt_conn_sec_update_t conn_sec_update; /**< Connection Security Update Event Parameters. */ + ble_gap_evt_timeout_t timeout; /**< Timeout Event Parameters. */ + ble_gap_evt_rssi_changed_t rssi_changed; /**< RSSI Event Parameters. */ + ble_gap_evt_adv_report_t adv_report; /**< Advertising Report Event Parameters. */ + ble_gap_evt_adv_set_terminated_t adv_set_terminated; /**< Advertising Set Terminated Event Parameters. */ + ble_gap_evt_sec_request_t sec_request; /**< Security Request Event Parameters. */ + ble_gap_evt_conn_param_update_request_t conn_param_update_request; /**< Connection Parameter Update Parameters. */ + ble_gap_evt_scan_req_report_t scan_req_report; /**< Scan Request Report Parameters. */ + ble_gap_evt_phy_update_request_t phy_update_request; /**< PHY Update Request Event Parameters. */ + ble_gap_evt_phy_update_t phy_update; /**< PHY Update Parameters. */ + ble_gap_evt_data_length_update_request_t data_length_update_request; /**< Data Length Update Request Event Parameters. */ + ble_gap_evt_data_length_update_t data_length_update; /**< Data Length Update Event Parameters. */ + ble_gap_evt_qos_channel_survey_report_t qos_channel_survey_report; /**< Quality of Service (QoS) Channel Survey Report Parameters. */ + } params; /**< Event Parameters. */ +} ble_gap_evt_t; + + +/** + * @brief BLE GAP connection configuration parameters, set with @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_CONN_COUNT The connection count for the connection configurations is zero. + * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: + * - The sum of conn_count for all connection configurations combined exceeds UINT8_MAX. + * - The event length is smaller than @ref BLE_GAP_EVENT_LENGTH_MIN. + */ +typedef struct +{ + uint8_t conn_count; /**< The number of concurrent connections the application can create with this configuration. + The default and minimum value is @ref BLE_GAP_CONN_COUNT_DEFAULT. */ + uint16_t event_length; /**< The time set aside for this connection on every connection interval in 1.25 ms units. + The default value is @ref BLE_GAP_EVENT_LENGTH_DEFAULT, the minimum value is @ref BLE_GAP_EVENT_LENGTH_MIN. + The event length and the connection interval are the primary parameters + for setting the throughput of a connection. + See the SoftDevice Specification for details on throughput. */ +} ble_gap_conn_cfg_t; + + +/** + * @brief Configuration of maximum concurrent connections in the different connected roles, set with + * @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_CONN_COUNT The sum of periph_role_count and central_role_count is too + * large. The maximum supported sum of concurrent connections is + * @ref BLE_GAP_ROLE_COUNT_COMBINED_MAX. + * @retval ::NRF_ERROR_INVALID_PARAM central_sec_count is larger than central_role_count. + * @retval ::NRF_ERROR_RESOURCES The adv_set_count is too large. The maximum + * supported advertising handles is + * @ref BLE_GAP_ADV_SET_COUNT_MAX. + */ +typedef struct +{ + uint8_t adv_set_count; /**< Maximum number of advertising sets. Default value is @ref BLE_GAP_ADV_SET_COUNT_DEFAULT. */ + uint8_t periph_role_count; /**< Maximum number of connections concurrently acting as a peripheral. Default value is @ref BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT. */ + uint8_t central_role_count; /**< Maximum number of connections concurrently acting as a central. Default value is @ref BLE_GAP_ROLE_COUNT_CENTRAL_DEFAULT. */ + uint8_t central_sec_count; /**< Number of SMP instances shared between all connections acting as a central. Default value is @ref BLE_GAP_ROLE_COUNT_CENTRAL_SEC_DEFAULT. */ + uint8_t qos_channel_survey_role_available:1; /**< If set, the Quality of Service (QoS) channel survey module is available to the + application using @ref sd_ble_gap_qos_channel_survey_start. */ +} ble_gap_cfg_role_count_t; + + +/** + * @brief Device name and its properties, set with @ref sd_ble_cfg_set. + * + * @note If the device name is not configured, the default device name will be + * @ref BLE_GAP_DEVNAME_DEFAULT, the maximum device name length will be + * @ref BLE_GAP_DEVNAME_DEFAULT_LEN, vloc will be set to @ref BLE_GATTS_VLOC_STACK and the device name + * will have no write access. + * + * @note If @ref max_len is more than @ref BLE_GAP_DEVNAME_DEFAULT_LEN and vloc is set to @ref BLE_GATTS_VLOC_STACK, + * the attribute table size must be increased to have room for the longer device name (see + * @ref sd_ble_cfg_set and @ref ble_gatts_cfg_attr_tab_size_t). + * + * @note If vloc is @ref BLE_GATTS_VLOC_STACK : + * - p_value must point to non-volatile memory (flash) or be NULL. + * - If p_value is NULL, the device name will initially be empty. + * + * @note If vloc is @ref BLE_GATTS_VLOC_USER : + * - p_value cannot be NULL. + * - If the device name is writable, p_value must point to volatile memory (RAM). + * + * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: + * - Invalid device name location (vloc). + * - Invalid device name security mode. + * @retval ::NRF_ERROR_INVALID_LENGTH One or more of the following is true: + * - The device name length is invalid (must be between 0 and @ref BLE_GAP_DEVNAME_MAX_LEN). + * - The device name length is too long for the given Attribute Table. + * @retval ::NRF_ERROR_NOT_SUPPORTED Device name security mode is not supported. + */ +typedef struct +{ + ble_gap_conn_sec_mode_t write_perm; /**< Write permissions. */ + uint8_t vloc:2; /**< Value location, see @ref BLE_GATTS_VLOCS.*/ + uint8_t *p_value; /**< Pointer to where the value (device name) is stored or will be stored. */ + uint16_t current_len; /**< Current length in bytes of the memory pointed to by p_value.*/ + uint16_t max_len; /**< Maximum length in bytes of the memory pointed to by p_value.*/ +} ble_gap_cfg_device_name_t; + + +/**@brief Configuration structure for GAP configurations. */ +typedef union +{ + ble_gap_cfg_role_count_t role_count_cfg; /**< Role count configuration, cfg_id is @ref BLE_GAP_CFG_ROLE_COUNT. */ + ble_gap_cfg_device_name_t device_name_cfg; /**< Device name configuration, cfg_id is @ref BLE_GAP_CFG_DEVICE_NAME. */ +} ble_gap_cfg_t; + + +/**@brief Channel Map option. + * + * @details Used with @ref sd_ble_opt_get to get the current channel map + * or @ref sd_ble_opt_set to set a new channel map. When setting the + * channel map, it applies to all current and future connections. When getting the + * current channel map, it applies to a single connection and the connection handle + * must be supplied. + * + * @note Setting the channel map may take some time, depending on connection parameters. + * The time taken may be different for each connection and the get operation will + * return the previous channel map until the new one has taken effect. + * + * @note After setting the channel map, by spec it can not be set again until at least 1 s has passed. + * See Bluetooth Specification Version 4.1 Volume 2, Part E, Section 7.3.46. + * + * @retval ::NRF_SUCCESS Get or set successful. + * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: + * - Less then two bits in @ref ch_map are set. + * - Bits for primary advertising channels (37-39) are set. + * @retval ::NRF_ERROR_BUSY Channel map was set again before enough time had passed. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied for get. + * + */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle (only applicable for get) */ + uint8_t ch_map[5]; /**< Channel Map (37-bit). */ +} ble_gap_opt_ch_map_t; + + +/**@brief Local connection latency option. + * + * @details Local connection latency is a feature which enables the slave to improve + * current consumption by ignoring the slave latency set by the peer. The + * local connection latency can only be set to a multiple of the slave latency, + * and cannot be longer than half of the supervision timeout. + * + * @details Used with @ref sd_ble_opt_set to set the local connection latency. The + * @ref sd_ble_opt_get is not supported for this option, but the actual + * local connection latency (unless set to NULL) is set as a return parameter + * when setting the option. + * + * @note The latency set will be truncated down to the closest slave latency event + * multiple, or the nearest multiple before half of the supervision timeout. + * + * @note The local connection latency is disabled by default, and needs to be enabled for new + * connections and whenever the connection is updated. + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_NOT_SUPPORTED Get is not supported. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. + */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle */ + uint16_t requested_latency; /**< Requested local connection latency. */ + uint16_t * p_actual_latency; /**< Pointer to storage for the actual local connection latency (can be set to NULL to skip return value). */ +} ble_gap_opt_local_conn_latency_t; + +/**@brief Disable slave latency + * + * @details Used with @ref sd_ble_opt_set to temporarily disable slave latency of a peripheral connection + * (see @ref ble_gap_conn_params_t::slave_latency). And to re-enable it again. When disabled, the + * peripheral will ignore the slave_latency set by the central. + * + * @note Shall only be called on peripheral links. + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_NOT_SUPPORTED Get is not supported. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. + */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle */ + uint8_t disable : 1; /**< Set to 1 to disable slave latency. Set to 0 enable it again.*/ +} ble_gap_opt_slave_latency_disable_t; + +/**@brief Passkey Option. + * + * @details Structure containing the passkey to be used during pairing. This can be used with @ref + * sd_ble_opt_set to make the SoftDevice use a preprogrammed passkey for authentication + * instead of generating a random one. + * + * @note Repeated pairing attempts using the same preprogrammed passkey makes pairing vulnerable to MITM attacks. + * + * @note @ref sd_ble_opt_get is not supported for this option. + * + */ +typedef struct +{ + uint8_t const * p_passkey; /**< Pointer to 6-digit ASCII string (digit 0..9 only, no NULL termination) passkey to be used during pairing. If this is NULL, the SoftDevice will generate a random passkey if required.*/ +} ble_gap_opt_passkey_t; + + +/**@brief Compatibility mode 1 option. + * + * @details This can be used with @ref sd_ble_opt_set to enable and disable + * compatibility mode 1. Compatibility mode 1 is disabled by default. + * + * @note Compatibility mode 1 enables interoperability with devices that do not support a value of + * 0 for the WinOffset parameter in the Link Layer CONNECT_IND packet. This applies to a + * limited set of legacy peripheral devices from another vendor. Enabling this compatibility + * mode will only have an effect if the local device will act as a central device and + * initiate a connection to a peripheral device. In that case it may lead to the connection + * creation taking up to one connection interval longer to complete for all connections. + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_INVALID_STATE When connection creation is ongoing while mode 1 is set. + */ +typedef struct +{ + uint8_t enable : 1; /**< Enable compatibility mode 1.*/ +} ble_gap_opt_compat_mode_1_t; + + +/**@brief Authenticated payload timeout option. + * + * @details This can be used with @ref sd_ble_opt_set to change the Authenticated payload timeout to a value other + * than the default of @ref BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MAX. + * + * @note The authenticated payload timeout event ::BLE_GAP_TIMEOUT_SRC_AUTH_PAYLOAD will be generated + * if auth_payload_timeout time has elapsed without receiving a packet with a valid MIC on an encrypted + * link. + * + * @note The LE ping procedure will be initiated before the timer expires to give the peer a chance + * to reset the timer. In addition the stack will try to prioritize running of LE ping over other + * activities to increase chances of finishing LE ping before timer expires. To avoid side-effects + * on other activities, it is recommended to use high timeout values. + * Recommended timeout > 2*(connInterval * (6 + connSlaveLatency)). + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. auth_payload_timeout was outside of allowed range. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. + */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle */ + uint16_t auth_payload_timeout; /**< Requested timeout in 10 ms unit, see @ref BLE_GAP_AUTH_PAYLOAD_TIMEOUT. */ +} ble_gap_opt_auth_payload_timeout_t; + +/**@brief Option structure for GAP options. */ +typedef union +{ + ble_gap_opt_ch_map_t ch_map; /**< Parameters for the Channel Map option. */ + ble_gap_opt_local_conn_latency_t local_conn_latency; /**< Parameters for the Local connection latency option */ + ble_gap_opt_passkey_t passkey; /**< Parameters for the Passkey option.*/ + ble_gap_opt_compat_mode_1_t compat_mode_1; /**< Parameters for the compatibility mode 1 option.*/ + ble_gap_opt_auth_payload_timeout_t auth_payload_timeout; /**< Parameters for the authenticated payload timeout option.*/ + ble_gap_opt_slave_latency_disable_t slave_latency_disable; /**< Parameters for the Disable slave latency option */ +} ble_gap_opt_t; +/**@} */ + + +/**@addtogroup BLE_GAP_FUNCTIONS Functions + * @{ */ + +/**@brief Set the local Bluetooth identity address. + * + * The local Bluetooth identity address is the address that identifies this device to other peers. + * The address type must be either @ref BLE_GAP_ADDR_TYPE_PUBLIC or @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC. + * + * @note The identity address cannot be changed while advertising, scanning or creating a connection. + * + * @note This address will be distributed to the peer during bonding. + * If the address changes, the address stored in the peer device will not be valid and the ability to + * reconnect using the old address will be lost. + * + * @note By default the SoftDevice will set an address of type @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC upon being + * enabled. The address is a random number populated during the IC manufacturing process and remains unchanged + * for the lifetime of each IC. + * + * @mscs + * @mmsc{@ref BLE_GAP_ADV_MSC} + * @endmscs + * + * @param[in] p_addr Pointer to address structure. + * + * @retval ::NRF_SUCCESS Address successfully set. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::NRF_ERROR_INVALID_STATE The identity address cannot be changed while advertising, + * scanning or creating a connection. + */ +SVCALL(SD_BLE_GAP_ADDR_SET, uint32_t, sd_ble_gap_addr_set(ble_gap_addr_t const *p_addr)); + + +/**@brief Get local Bluetooth identity address. + * + * @note This will always return the identity address irrespective of the privacy settings, + * i.e. the address type will always be either @ref BLE_GAP_ADDR_TYPE_PUBLIC or @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC. + * + * @param[out] p_addr Pointer to address structure to be filled in. + * + * @retval ::NRF_SUCCESS Address successfully retrieved. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. + */ +SVCALL(SD_BLE_GAP_ADDR_GET, uint32_t, sd_ble_gap_addr_get(ble_gap_addr_t *p_addr)); + + +/**@brief Set the active whitelist in the SoftDevice. + * + * @note Only one whitelist can be used at a time and the whitelist is shared between the BLE roles. + * The whitelist cannot be set if a BLE role is using the whitelist. + * + * @note If an address is resolved using the information in the device identity list, then the whitelist + * filter policy applies to the peer identity address and not the resolvable address sent on air. + * + * @mscs + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_PRIVATE_SCAN_MSC} + * @endmscs + * + * @param[in] pp_wl_addrs Pointer to a whitelist of peer addresses, if NULL the whitelist will be cleared. + * @param[in] len Length of the whitelist, maximum @ref BLE_GAP_WHITELIST_ADDR_MAX_COUNT. + * + * @retval ::NRF_SUCCESS The whitelist is successfully set/cleared. + * @retval ::NRF_ERROR_INVALID_ADDR The whitelist (or one of its entries) provided is invalid. + * @retval ::BLE_ERROR_GAP_WHITELIST_IN_USE The whitelist is in use by a BLE role and cannot be set or cleared. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. + * @retval ::NRF_ERROR_DATA_SIZE The given whitelist size is invalid (zero or too large); this can only return when + * pp_wl_addrs is not NULL. + */ +SVCALL(SD_BLE_GAP_WHITELIST_SET, uint32_t, sd_ble_gap_whitelist_set(ble_gap_addr_t const * const * pp_wl_addrs, uint8_t len)); + + +/**@brief Set device identity list. + * + * @note Only one device identity list can be used at a time and the list is shared between the BLE roles. + * The device identity list cannot be set if a BLE role is using the list. + * + * @param[in] pp_id_keys Pointer to an array of peer identity addresses and peer IRKs, if NULL the device identity list will be cleared. + * @param[in] pp_local_irks Pointer to an array of local IRKs. Each entry in the array maps to the entry in pp_id_keys at the same index. + * To fill in the list with the currently set device IRK for all peers, set to NULL. + * @param[in] len Length of the device identity list, maximum @ref BLE_GAP_DEVICE_IDENTITIES_MAX_COUNT. + * + * @mscs + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_PRIVATE_SCAN_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_CONN_PRIV_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_CONN_PRIV_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS The device identity list successfully set/cleared. + * @retval ::NRF_ERROR_INVALID_ADDR The device identity list (or one of its entries) provided is invalid. + * This code may be returned if the local IRK list also has an invalid entry. + * @retval ::BLE_ERROR_GAP_DEVICE_IDENTITIES_IN_USE The device identity list is in use and cannot be set or cleared. + * @retval ::BLE_ERROR_GAP_DEVICE_IDENTITIES_DUPLICATE The device identity list contains multiple entries with the same identity address. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. + * @retval ::NRF_ERROR_DATA_SIZE The given device identity list size invalid (zero or too large); this can + * only return when pp_id_keys is not NULL. + */ +SVCALL(SD_BLE_GAP_DEVICE_IDENTITIES_SET, uint32_t, sd_ble_gap_device_identities_set(ble_gap_id_key_t const * const * pp_id_keys, ble_gap_irk_t const * const * pp_local_irks, uint8_t len)); + + +/**@brief Set privacy settings. + * + * @note Privacy settings cannot be changed while advertising, scanning or creating a connection. + * + * @param[in] p_privacy_params Privacy settings. + * + * @mscs + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Set successfully. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. + * @retval ::NRF_ERROR_INVALID_ADDR The pointer to privacy settings is NULL or invalid. + * Otherwise, the p_device_irk pointer in privacy parameter is an invalid pointer. + * @retval ::NRF_ERROR_INVALID_PARAM Out of range parameters are provided. + * @retval ::NRF_ERROR_INVALID_STATE Privacy settings cannot be changed while advertising, scanning + * or creating a connection. + */ +SVCALL(SD_BLE_GAP_PRIVACY_SET, uint32_t, sd_ble_gap_privacy_set(ble_gap_privacy_params_t const *p_privacy_params)); + + +/**@brief Get privacy settings. + * + * @note ::ble_gap_privacy_params_t::p_device_irk must be initialized to NULL or a valid address before this function is called. + * If it is initialized to a valid address, the address pointed to will contain the current device IRK on return. + * + * @param[in,out] p_privacy_params Privacy settings. + * + * @retval ::NRF_SUCCESS Privacy settings read. + * @retval ::NRF_ERROR_INVALID_ADDR The pointer given for returning the privacy settings may be NULL or invalid. + * Otherwise, the p_device_irk pointer in privacy parameter is an invalid pointer. + */ +SVCALL(SD_BLE_GAP_PRIVACY_GET, uint32_t, sd_ble_gap_privacy_get(ble_gap_privacy_params_t *p_privacy_params)); + + +/**@brief Configure an advertising set. Set, clear or update advertising and scan response data. + * + * @note The format of the advertising data will be checked by this call to ensure interoperability. + * Limitations imposed by this API call to the data provided include having a flags data type in the scan response data and + * duplicating the local name in the advertising data and scan response data. + * + * @note In order to update advertising data while advertising, new advertising buffers must be provided. + * + * @mscs + * @mmsc{@ref BLE_GAP_ADV_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @param[in,out] p_adv_handle Provide a pointer to a handle containing @ref BLE_GAP_ADV_SET_HANDLE_NOT_SET to configure + * a new advertising set. On success, a new handle is then returned through the pointer. + * Provide a pointer to an existing advertising handle to configure an existing advertising set. + * @param[in] p_adv_data Advertising data. If set to NULL, no advertising data will be used. See @ref ble_gap_adv_data_t. + * @param[in] p_adv_params Advertising parameters. When this function is used to update advertising data while advertising, + * this parameter must be NULL. See @ref ble_gap_adv_params_t. + * + * @retval ::NRF_SUCCESS Advertising set successfully configured. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied: + * - Invalid advertising data configuration specified. See @ref ble_gap_adv_data_t. + * - Invalid configuration of p_adv_params. See @ref ble_gap_adv_params_t. + * - Use of whitelist requested but whitelist has not been set, + * see @ref sd_ble_gap_whitelist_set. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR ble_gap_adv_params_t::p_peer_addr is invalid. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * - It is invalid to provide non-NULL advertising set parameters while advertising. + * - It is invalid to provide the same data buffers while advertising. To update + * advertising data, provide new advertising buffers. + * @retval ::BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST Discoverable mode and whitelist incompatible. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE The provided advertising handle was not found. Use @ref BLE_GAP_ADV_SET_HANDLE_NOT_SET to + * configure a new advertising handle. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_FLAGS Invalid combination of advertising flags supplied. + * @retval ::NRF_ERROR_INVALID_DATA Invalid data type(s) supplied. Check the advertising data format specification + * given in Bluetooth Specification Version 5.0, Volume 3, Part C, Chapter 11. + * @retval ::NRF_ERROR_INVALID_LENGTH Invalid data length(s) supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported data length or advertising parameter configuration. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to configure a new advertising handle. Update an + * existing advertising handle instead. + * @retval ::BLE_ERROR_GAP_UUID_LIST_MISMATCH Invalid UUID list supplied. + */ +SVCALL(SD_BLE_GAP_ADV_SET_CONFIGURE, uint32_t, sd_ble_gap_adv_set_configure(uint8_t *p_adv_handle, ble_gap_adv_data_t const *p_adv_data, ble_gap_adv_params_t const *p_adv_params)); + + +/**@brief Start advertising (GAP Discoverable, Connectable modes, Broadcast Procedure). + * + * @note Only one advertiser may be active at any time. + * + * @events + * @event{@ref BLE_GAP_EVT_CONNECTED, Generated after connection has been established through connectable advertising.} + * @event{@ref BLE_GAP_EVT_ADV_SET_TERMINATED, Advertising set has terminated.} + * @event{@ref BLE_GAP_EVT_SCAN_REQ_REPORT, A scan request was received.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_ADV_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_CONN_PRIV_MSC} + * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @param[in] adv_handle Advertising handle to advertise on, received from @ref sd_ble_gap_adv_set_configure. + * @param[in] conn_cfg_tag Tag identifying a configuration set by @ref sd_ble_cfg_set or + * @ref BLE_CONN_CFG_TAG_DEFAULT to use the default connection configuration. For non-connectable + * advertising, this is ignored. + * + * @retval ::NRF_SUCCESS The BLE stack has started advertising. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. adv_handle is not configured or already advertising. + * @retval ::NRF_ERROR_CONN_COUNT The limit of available connections has been reached; connectable advertiser cannot be started. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE Advertising handle not found. Configure a new adveriting handle with @ref sd_ble_gap_adv_set_configure. + * @retval ::NRF_ERROR_NOT_FOUND conn_cfg_tag not found. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied: + * - Invalid configuration of p_adv_params. See @ref ble_gap_adv_params_t. + * - Use of whitelist requested but whitelist has not been set, see @ref sd_ble_gap_whitelist_set. + * @retval ::NRF_ERROR_RESOURCES Either: + * - adv_handle is configured with connectable advertising, but the event_length parameter + * associated with conn_cfg_tag is too small to be able to establish a connection on + * the selected advertising phys. Use @ref sd_ble_cfg_set to increase the event length. + * - Not enough BLE role slots available. + Stop one or more currently active roles (Central, Peripheral, Broadcaster or Observer) and try again. + * - p_adv_params is configured with connectable advertising, but the event_length parameter + * associated with conn_cfg_tag is too small to be able to establish a connection on + * the selected advertising phys. Use @ref sd_ble_cfg_set to increase the event length. + */ +SVCALL(SD_BLE_GAP_ADV_START, uint32_t, sd_ble_gap_adv_start(uint8_t adv_handle, uint8_t conn_cfg_tag)); + + +/**@brief Stop advertising (GAP Discoverable, Connectable modes, Broadcast Procedure). + * + * @mscs + * @mmsc{@ref BLE_GAP_ADV_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @param[in] adv_handle The advertising handle that should stop advertising. + * + * @retval ::NRF_SUCCESS The BLE stack has stopped advertising. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE Invalid advertising handle. + * @retval ::NRF_ERROR_INVALID_STATE The advertising handle is not advertising. + */ +SVCALL(SD_BLE_GAP_ADV_STOP, uint32_t, sd_ble_gap_adv_stop(uint8_t adv_handle)); + + + +/**@brief Update connection parameters. + * + * @details In the central role this will initiate a Link Layer connection parameter update procedure, + * otherwise in the peripheral role, this will send the corresponding L2CAP request and wait for + * the central to perform the procedure. In both cases, and regardless of success or failure, the application + * will be informed of the result with a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE event. + * + * @details This function can be used as a central both to reply to a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST or to start the procedure unrequested. + * + * @events + * @event{@ref BLE_GAP_EVT_CONN_PARAM_UPDATE, Result of the connection parameter update procedure.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CPU_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} + * @mmsc{@ref BLE_GAP_MULTILINK_CPU_MSC} + * @mmsc{@ref BLE_GAP_MULTILINK_CTRL_PROC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_CPU_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_conn_params Pointer to desired connection parameters. If NULL is provided on a peripheral role, + * the parameters in the PPCP characteristic of the GAP service will be used instead. + * If NULL is provided on a central role and in response to a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST, the peripheral request will be rejected + * + * @retval ::NRF_SUCCESS The Connection Update procedure has been started successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::NRF_ERROR_BUSY Procedure already in progress, wait for pending procedures to complete and retry. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + */ +SVCALL(SD_BLE_GAP_CONN_PARAM_UPDATE, uint32_t, sd_ble_gap_conn_param_update(uint16_t conn_handle, ble_gap_conn_params_t const *p_conn_params)); + + +/**@brief Disconnect (GAP Link Termination). + * + * @details This call initiates the disconnection procedure, and its completion will be communicated to the application + * with a @ref BLE_GAP_EVT_DISCONNECTED event. + * + * @events + * @event{@ref BLE_GAP_EVT_DISCONNECTED, Generated when disconnection procedure is complete.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CONN_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] hci_status_code HCI status code, see @ref BLE_HCI_STATUS_CODES (accepted values are @ref BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION and @ref BLE_HCI_CONN_INTERVAL_UNACCEPTABLE). + * + * @retval ::NRF_SUCCESS The disconnection procedure has been started successfully. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation (disconnection is already in progress). + */ +SVCALL(SD_BLE_GAP_DISCONNECT, uint32_t, sd_ble_gap_disconnect(uint16_t conn_handle, uint8_t hci_status_code)); + + +/**@brief Set the radio's transmit power. + * + * @param[in] role The role to set the transmit power for, see @ref BLE_GAP_TX_POWER_ROLES for + * possible roles. + * @param[in] handle The handle parameter is interpreted depending on role: + * - If role is @ref BLE_GAP_TX_POWER_ROLE_CONN, this value is the specific connection handle. + * - If role is @ref BLE_GAP_TX_POWER_ROLE_ADV, the advertising set identified with the advertising handle, + * will use the specified transmit power, and include it in the advertising packet headers if + * @ref ble_gap_adv_properties_t::include_tx_power set. + * - For all other roles handle is ignored. + * @param[in] tx_power Radio transmit power in dBm (see note for accepted values). + * + * @note Supported tx_power values: -40dBm, -20dBm, -16dBm, -12dBm, -8dBm, -4dBm, 0dBm, +2dBm, +3dBm, +4dBm, +5dBm, +6dBm, +7dBm and +8dBm. + * @note The initiator will have the same transmit power as the scanner. + * @note When a connection is created it will inherit the transmit power from the initiator or + * advertiser leading to the connection. + * + * @retval ::NRF_SUCCESS Successfully changed the transmit power. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE Advertising handle not found. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_TX_POWER_SET, uint32_t, sd_ble_gap_tx_power_set(uint8_t role, uint16_t handle, int8_t tx_power)); + + +/**@brief Set GAP Appearance value. + * + * @param[in] appearance Appearance (16-bit), see @ref BLE_APPEARANCES. + * + * @retval ::NRF_SUCCESS Appearance value set successfully. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + */ +SVCALL(SD_BLE_GAP_APPEARANCE_SET, uint32_t, sd_ble_gap_appearance_set(uint16_t appearance)); + + +/**@brief Get GAP Appearance value. + * + * @param[out] p_appearance Pointer to appearance (16-bit) to be filled in, see @ref BLE_APPEARANCES. + * + * @retval ::NRF_SUCCESS Appearance value retrieved successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + */ +SVCALL(SD_BLE_GAP_APPEARANCE_GET, uint32_t, sd_ble_gap_appearance_get(uint16_t *p_appearance)); + + +/**@brief Set GAP Peripheral Preferred Connection Parameters. + * + * @param[in] p_conn_params Pointer to a @ref ble_gap_conn_params_t structure with the desired parameters. + * + * @retval ::NRF_SUCCESS Peripheral Preferred Connection Parameters set successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + */ +SVCALL(SD_BLE_GAP_PPCP_SET, uint32_t, sd_ble_gap_ppcp_set(ble_gap_conn_params_t const *p_conn_params)); + + +/**@brief Get GAP Peripheral Preferred Connection Parameters. + * + * @param[out] p_conn_params Pointer to a @ref ble_gap_conn_params_t structure where the parameters will be stored. + * + * @retval ::NRF_SUCCESS Peripheral Preferred Connection Parameters retrieved successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + */ +SVCALL(SD_BLE_GAP_PPCP_GET, uint32_t, sd_ble_gap_ppcp_get(ble_gap_conn_params_t *p_conn_params)); + + +/**@brief Set GAP device name. + * + * @note If the device name is located in application flash memory (see @ref ble_gap_cfg_device_name_t), + * it cannot be changed. Then @ref NRF_ERROR_FORBIDDEN will be returned. + * + * @param[in] p_write_perm Write permissions for the Device Name characteristic, see @ref ble_gap_conn_sec_mode_t. + * @param[in] p_dev_name Pointer to a UTF-8 encoded, non NULL-terminated string. + * @param[in] len Length of the UTF-8, non NULL-terminated string pointed to by p_dev_name in octets (must be smaller or equal than @ref BLE_GAP_DEVNAME_MAX_LEN). + * + * @retval ::NRF_SUCCESS GAP device name and permissions set successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. + * @retval ::NRF_ERROR_FORBIDDEN Device name is not writable. + */ +SVCALL(SD_BLE_GAP_DEVICE_NAME_SET, uint32_t, sd_ble_gap_device_name_set(ble_gap_conn_sec_mode_t const *p_write_perm, uint8_t const *p_dev_name, uint16_t len)); + + +/**@brief Get GAP device name. + * + * @note If the device name is longer than the size of the supplied buffer, + * p_len will return the complete device name length, + * and not the number of bytes actually returned in p_dev_name. + * The application may use this information to allocate a suitable buffer size. + * + * @param[out] p_dev_name Pointer to an empty buffer where the UTF-8 non NULL-terminated string will be placed. Set to NULL to obtain the complete device name length. + * @param[in,out] p_len Length of the buffer pointed by p_dev_name, complete device name length on output. + * + * @retval ::NRF_SUCCESS GAP device name retrieved successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. + */ +SVCALL(SD_BLE_GAP_DEVICE_NAME_GET, uint32_t, sd_ble_gap_device_name_get(uint8_t *p_dev_name, uint16_t *p_len)); + + +/**@brief Initiate the GAP Authentication procedure. + * + * @details In the central role, this function will send an SMP Pairing Request (or an SMP Pairing Failed if rejected), + * otherwise in the peripheral role, an SMP Security Request will be sent. + * + * @events + * @event{Depending on the security parameters set and the packet exchanges with the peer\, the following events may be generated:} + * @event{@ref BLE_GAP_EVT_SEC_PARAMS_REQUEST} + * @event{@ref BLE_GAP_EVT_SEC_INFO_REQUEST} + * @event{@ref BLE_GAP_EVT_PASSKEY_DISPLAY} + * @event{@ref BLE_GAP_EVT_KEY_PRESSED} + * @event{@ref BLE_GAP_EVT_AUTH_KEY_REQUEST} + * @event{@ref BLE_GAP_EVT_LESC_DHKEY_REQUEST} + * @event{@ref BLE_GAP_EVT_CONN_SEC_UPDATE} + * @event{@ref BLE_GAP_EVT_AUTH_STATUS} + * @event{@ref BLE_GAP_EVT_TIMEOUT} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_SEC_REQ_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_SEC_REQ_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_sec_params Pointer to the @ref ble_gap_sec_params_t structure with the security parameters to be used during the pairing or bonding procedure. + * In the peripheral role, only the bond, mitm, lesc and keypress fields of this structure are used. + * In the central role, this pointer may be NULL to reject a Security Request. + * + * @retval ::NRF_SUCCESS Successfully initiated authentication procedure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::NRF_ERROR_NO_MEM The maximum number of authentication procedures that can run in parallel for the given role is reached. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED Setting of sign or link fields in @ref ble_gap_sec_kdist_t not supported. + * @retval ::NRF_ERROR_TIMEOUT A SMP timeout has occurred, and further SMP operations on this link is prohibited. + */ +SVCALL(SD_BLE_GAP_AUTHENTICATE, uint32_t, sd_ble_gap_authenticate(uint16_t conn_handle, ble_gap_sec_params_t const *p_sec_params)); + + +/**@brief Reply with GAP security parameters. + * + * @details This function is only used to reply to a @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. + * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. + * + * @events + * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_JW_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_PERIPH_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_CENTRAL_OOB_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_CONFIRM_FAIL_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_KS_TOO_SMALL_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_APP_ERROR_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_REMOTE_PAIRING_FAIL_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_TIMEOUT_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] sec_status Security status, see @ref BLE_GAP_SEC_STATUS. + * @param[in] p_sec_params Pointer to a @ref ble_gap_sec_params_t security parameters structure. In the central role this must be set to NULL, as the parameters have + * already been provided during a previous call to @ref sd_ble_gap_authenticate. + * @param[in,out] p_sec_keyset Pointer to a @ref ble_gap_sec_keyset_t security keyset structure. Any keys generated and/or distributed as a result of the ongoing security procedure + * will be stored into the memory referenced by the pointers inside this structure. The keys will be stored and available to the application + * upon reception of a @ref BLE_GAP_EVT_AUTH_STATUS event. + * Note that the SoftDevice expects the application to provide memory for storing the + * peer's keys. So it must be ensured that the relevant pointers inside this structure are not NULL. The pointers to the local key + * can, however, be NULL, in which case, the local key data will not be available to the application upon reception of the + * @ref BLE_GAP_EVT_AUTH_STATUS event. + * + * @retval ::NRF_SUCCESS Successfully accepted security parameter from the application. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED Setting of sign or link fields in @ref ble_gap_sec_kdist_t not supported. + */ +SVCALL(SD_BLE_GAP_SEC_PARAMS_REPLY, uint32_t, sd_ble_gap_sec_params_reply(uint16_t conn_handle, uint8_t sec_status, ble_gap_sec_params_t const *p_sec_params, ble_gap_sec_keyset_t const *p_sec_keyset)); + + +/**@brief Reply with an authentication key. + * + * @details This function is only used to reply to a @ref BLE_GAP_EVT_AUTH_KEY_REQUEST or a @ref BLE_GAP_EVT_PASSKEY_DISPLAY, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. + * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. + * + * @events + * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_CENTRAL_OOB_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] key_type See @ref BLE_GAP_AUTH_KEY_TYPES. + * @param[in] p_key If key type is @ref BLE_GAP_AUTH_KEY_TYPE_NONE, then NULL. + * If key type is @ref BLE_GAP_AUTH_KEY_TYPE_PASSKEY, then a 6-byte ASCII string (digit 0..9 only, no NULL termination) + * or NULL when confirming LE Secure Connections Numeric Comparison. + * If key type is @ref BLE_GAP_AUTH_KEY_TYPE_OOB, then a 16-byte OOB key value in little-endian format. + * + * @retval ::NRF_SUCCESS Authentication key successfully set. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_AUTH_KEY_REPLY, uint32_t, sd_ble_gap_auth_key_reply(uint16_t conn_handle, uint8_t key_type, uint8_t const *p_key)); + + +/**@brief Reply with an LE Secure connections DHKey. + * + * @details This function is only used to reply to a @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. + * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. + * + * @events + * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_dhkey LE Secure Connections DHKey. + * + * @retval ::NRF_SUCCESS DHKey successfully set. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_LESC_DHKEY_REPLY, uint32_t, sd_ble_gap_lesc_dhkey_reply(uint16_t conn_handle, ble_gap_lesc_dhkey_t const *p_dhkey)); + + +/**@brief Notify the peer of a local keypress. + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] kp_not See @ref BLE_GAP_KP_NOT_TYPES. + * + * @retval ::NRF_SUCCESS Keypress notification successfully queued for transmission. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Either not entering a passkey or keypresses have not been enabled by both peers. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_BUSY The BLE stack is busy. Retry at later time. + */ +SVCALL(SD_BLE_GAP_KEYPRESS_NOTIFY, uint32_t, sd_ble_gap_keypress_notify(uint16_t conn_handle, uint8_t kp_not)); + + +/**@brief Generate a set of OOB data to send to a peer out of band. + * + * @note The @ref ble_gap_addr_t included in the OOB data returned will be the currently active one (or, if a connection has already been established, + * the one used during connection setup). The application may manually overwrite it with an updated value. + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. Can be @ref BLE_CONN_HANDLE_INVALID if a BLE connection has not been established yet. + * @param[in] p_pk_own LE Secure Connections local P-256 Public Key. + * @param[out] p_oobd_own The OOB data to be sent out of band to a peer. + * + * @retval ::NRF_SUCCESS OOB data successfully generated. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_LESC_OOB_DATA_GET, uint32_t, sd_ble_gap_lesc_oob_data_get(uint16_t conn_handle, ble_gap_lesc_p256_pk_t const *p_pk_own, ble_gap_lesc_oob_data_t *p_oobd_own)); + +/**@brief Provide the OOB data sent/received out of band. + * + * @note An authentication procedure with OOB selected as an algorithm must be in progress when calling this function. + * @note A @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST event with the oobd_req set to 1 must have been received prior to calling this function. + * + * @events + * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_oobd_own The OOB data sent out of band to a peer or NULL if the peer has not received OOB data. + * Must correspond to @ref ble_gap_sec_params_t::oob flag in @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST. + * @param[in] p_oobd_peer The OOB data received out of band from a peer or NULL if none received. + * Must correspond to @ref ble_gap_sec_params_t::oob flag in @ref sd_ble_gap_authenticate in the central role + * or @ref sd_ble_gap_sec_params_reply in the peripheral role. + * + * @retval ::NRF_SUCCESS OOB data accepted. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_LESC_OOB_DATA_SET, uint32_t, sd_ble_gap_lesc_oob_data_set(uint16_t conn_handle, ble_gap_lesc_oob_data_t const *p_oobd_own, ble_gap_lesc_oob_data_t const *p_oobd_peer)); + + +/**@brief Initiate GAP Encryption procedure. + * + * @details In the central role, this function will initiate the encryption procedure using the encryption information provided. + * + * @events + * @event{@ref BLE_GAP_EVT_CONN_SEC_UPDATE, The connection security has been updated.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_ENC_MSC} + * @mmsc{@ref BLE_GAP_MULTILINK_CTRL_PROC_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_SEC_REQ_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_master_id Pointer to a @ref ble_gap_master_id_t master identification structure. + * @param[in] p_enc_info Pointer to a @ref ble_gap_enc_info_t encryption information structure. + * + * @retval ::NRF_SUCCESS Successfully initiated authentication procedure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::BLE_ERROR_INVALID_ROLE Operation is not supported in the Peripheral role. + * @retval ::NRF_ERROR_BUSY Procedure already in progress or not allowed at this time, wait for pending procedures to complete and retry. + */ +SVCALL(SD_BLE_GAP_ENCRYPT, uint32_t, sd_ble_gap_encrypt(uint16_t conn_handle, ble_gap_master_id_t const *p_master_id, ble_gap_enc_info_t const *p_enc_info)); + + +/**@brief Reply with GAP security information. + * + * @details This function is only used to reply to a @ref BLE_GAP_EVT_SEC_INFO_REQUEST, calling it at other times will result in @ref NRF_ERROR_INVALID_STATE. + * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. + * @note Data signing is not yet supported, and p_sign_info must therefore be NULL. + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_ENC_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_enc_info Pointer to a @ref ble_gap_enc_info_t encryption information structure. May be NULL to signal none is available. + * @param[in] p_id_info Pointer to a @ref ble_gap_irk_t identity information structure. May be NULL to signal none is available. + * @param[in] p_sign_info Pointer to a @ref ble_gap_sign_info_t signing information structure. May be NULL to signal none is available. + * + * @retval ::NRF_SUCCESS Successfully accepted security information. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_SEC_INFO_REPLY, uint32_t, sd_ble_gap_sec_info_reply(uint16_t conn_handle, ble_gap_enc_info_t const *p_enc_info, ble_gap_irk_t const *p_id_info, ble_gap_sign_info_t const *p_sign_info)); + + +/**@brief Get the current connection security. + * + * @param[in] conn_handle Connection handle. + * @param[out] p_conn_sec Pointer to a @ref ble_gap_conn_sec_t structure to be filled in. + * + * @retval ::NRF_SUCCESS Current connection security successfully retrieved. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_CONN_SEC_GET, uint32_t, sd_ble_gap_conn_sec_get(uint16_t conn_handle, ble_gap_conn_sec_t *p_conn_sec)); + + +/**@brief Start reporting the received signal strength to the application. + * + * A new event is reported whenever the RSSI value changes, until @ref sd_ble_gap_rssi_stop is called. + * + * @events + * @event{@ref BLE_GAP_EVT_RSSI_CHANGED, New RSSI data available. How often the event is generated is + * dependent on the settings of the threshold_dbm + * and skip_count input parameters.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} + * @mmsc{@ref BLE_GAP_RSSI_FILT_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] threshold_dbm Minimum change in dBm before triggering the @ref BLE_GAP_EVT_RSSI_CHANGED event. Events are disabled if threshold_dbm equals @ref BLE_GAP_RSSI_THRESHOLD_INVALID. + * @param[in] skip_count Number of RSSI samples with a change of threshold_dbm or more before sending a new @ref BLE_GAP_EVT_RSSI_CHANGED event. + * + * @retval ::NRF_SUCCESS Successfully activated RSSI reporting. + * @retval ::NRF_ERROR_INVALID_STATE RSSI reporting is already ongoing. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_RSSI_START, uint32_t, sd_ble_gap_rssi_start(uint16_t conn_handle, uint8_t threshold_dbm, uint8_t skip_count)); + + +/**@brief Stop reporting the received signal strength. + * + * @note An RSSI change detected before the call but not yet received by the application + * may be reported after @ref sd_ble_gap_rssi_stop has been called. + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} + * @mmsc{@ref BLE_GAP_RSSI_FILT_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * + * @retval ::NRF_SUCCESS Successfully deactivated RSSI reporting. + * @retval ::NRF_ERROR_INVALID_STATE RSSI reporting is not ongoing. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + */ +SVCALL(SD_BLE_GAP_RSSI_STOP, uint32_t, sd_ble_gap_rssi_stop(uint16_t conn_handle)); + + +/**@brief Get the received signal strength for the last connection event. + * + * @ref sd_ble_gap_rssi_start must be called to start reporting RSSI before using this function. @ref NRF_ERROR_NOT_FOUND + * will be returned until RSSI was sampled for the first time after calling @ref sd_ble_gap_rssi_start. + * @note ERRATA-153 requires the rssi sample to be compensated based on a temperature measurement. + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[out] p_rssi Pointer to the location where the RSSI measurement shall be stored. + * @param[out] p_ch_index Pointer to the location where Channel Index for the RSSI measurement shall be stored. + * + * @retval ::NRF_SUCCESS Successfully read the RSSI. + * @retval ::NRF_ERROR_NOT_FOUND No sample is available. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_INVALID_STATE RSSI reporting is not ongoing. + */ +SVCALL(SD_BLE_GAP_RSSI_GET, uint32_t, sd_ble_gap_rssi_get(uint16_t conn_handle, int8_t *p_rssi, uint8_t *p_ch_index)); + + +/**@brief Start or continue scanning (GAP Discovery procedure, Observer Procedure). + * + * @note A call to this function will require the application to keep the memory pointed by + * p_adv_report_buffer alive until the buffer is released. The buffer is released when the scanner is stopped + * or when this function is called with another buffer. + * + * @note The scanner will automatically stop in the following cases: + * - @ref sd_ble_gap_scan_stop is called. + * - @ref sd_ble_gap_connect is called. + * - A @ref BLE_GAP_EVT_TIMEOUT with source set to @ref BLE_GAP_TIMEOUT_SRC_SCAN is received. + * - When a @ref BLE_GAP_EVT_ADV_REPORT event is received and @ref ble_gap_adv_report_type_t::status is not set to + * @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA. In this case scanning is only paused to let the application + * access received data. The application must call this function to continue scanning, or call @ref sd_ble_gap_scan_stop + * to stop scanning. + * + * @note If a @ref BLE_GAP_EVT_ADV_REPORT event is received with @ref ble_gap_adv_report_type_t::status set to + * @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA, the scanner will continue scanning, and the application will + * receive more reports from this advertising event. The following reports will include the old and new received data. + * The application can stop the scanner from receiving more packets from this advertising event by calling this function. + * This might be useful when receiving data from extended advertising events where @ref ble_gap_evt_adv_report_t::aux_pointer + * is large. + * + * @events + * @event{@ref BLE_GAP_EVT_ADV_REPORT, An advertising or scan response packet has been received.} + * @event{@ref BLE_GAP_EVT_TIMEOUT, Scanner has timed out.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_SCAN_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @param[in] p_scan_params Pointer to scan parameters structure. When this function is used to continue + * scanning, this parameter must be NULL. + * @param[in] p_adv_report_buffer Pointer to buffer used to store incoming advertising data. + * The memory pointed to should be kept alive until the scanning is stopped. + * See @ref BLE_GAP_SCAN_BUFFER_SIZE for minimum and maximum buffer size. + * If the scanner receives advertising data larger than can be stored in the buffer, + * a @ref BLE_GAP_EVT_ADV_REPORT will be raised with @ref ble_gap_adv_report_type_t::status + * set to @ref BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_TRUNCATED. + * + * @retval ::NRF_SUCCESS Successfully initiated scanning procedure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Either: + * - Scanning is already ongoing and p_scan_params was not NULL + * - Scanning is not running and p_scan_params was NULL. + * - The scanner has timed out when this function is called to continue scanning. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. See @ref ble_gap_scan_params_t. + * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported parameters supplied. See @ref ble_gap_scan_params_t. + * @retval ::NRF_ERROR_INVALID_LENGTH The provided buffer length is invalid. See @ref BLE_GAP_SCAN_BUFFER_MIN. + * @retval ::NRF_ERROR_RESOURCES Not enough BLE role slots available. + * Stop one or more currently active roles (Central, Peripheral or Broadcaster) and try again + */ +SVCALL(SD_BLE_GAP_SCAN_START, uint32_t, sd_ble_gap_scan_start(ble_gap_scan_params_t const *p_scan_params, ble_data_t const * p_adv_report_buffer)); + + +/**@brief Stop scanning (GAP Discovery procedure, Observer Procedure). + * + * @note The buffer provided in @ref sd_ble_gap_scan_start is released. + * + * @mscs + * @mmsc{@ref BLE_GAP_SCAN_MSC} + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Successfully stopped scanning procedure. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Not in the scanning state. + */ +SVCALL(SD_BLE_GAP_SCAN_STOP, uint32_t, sd_ble_gap_scan_stop(void)); + + +/**@brief Create a connection (GAP Link Establishment). + * + * @note If a scanning procedure is currently in progress it will be automatically stopped when calling this function. + * The scanning procedure will be stopped even if the function returns an error. + * + * @mscs + * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_CONN_PRIV_MSC} + * @mmsc{@ref BLE_GAP_CENTRAL_CONN_MSC} + * @endmscs + * + * @param[in] p_peer_addr Pointer to peer identity address. If @ref ble_gap_scan_params_t::filter_policy is set to use + * whitelist, then p_peer_addr is ignored. + * @param[in] p_scan_params Pointer to scan parameters structure. + * @param[in] p_conn_params Pointer to desired connection parameters. + * @param[in] conn_cfg_tag Tag identifying a configuration set by @ref sd_ble_cfg_set or + * @ref BLE_CONN_CFG_TAG_DEFAULT to use the default connection configuration. + * + * @retval ::NRF_SUCCESS Successfully initiated connection procedure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid parameter(s) pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * - Invalid parameter(s) in p_scan_params or p_conn_params. + * - Use of whitelist requested but whitelist has not been set, see @ref sd_ble_gap_whitelist_set. + * - Peer address was not present in the device identity list, see @ref sd_ble_gap_device_identities_set. + * @retval ::NRF_ERROR_NOT_FOUND conn_cfg_tag not found. + * @retval ::NRF_ERROR_INVALID_STATE The SoftDevice is in an invalid state to perform this operation. This may be due to an + * existing locally initiated connect procedure, which must complete before initiating again. + * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid Peer address. + * @retval ::NRF_ERROR_CONN_COUNT The limit of available connections has been reached. + * @retval ::NRF_ERROR_RESOURCES Either: + * - Not enough BLE role slots available. + * Stop one or more currently active roles (Central, Peripheral or Observer) and try again. + * - The event_length parameter associated with conn_cfg_tag is too small to be able to + * establish a connection on the selected @ref ble_gap_scan_params_t::scan_phys. + * Use @ref sd_ble_cfg_set to increase the event length. + */ +SVCALL(SD_BLE_GAP_CONNECT, uint32_t, sd_ble_gap_connect(ble_gap_addr_t const *p_peer_addr, ble_gap_scan_params_t const *p_scan_params, ble_gap_conn_params_t const *p_conn_params, uint8_t conn_cfg_tag)); + + +/**@brief Cancel a connection establishment. + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_CONN_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Successfully canceled an ongoing connection procedure. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + */ +SVCALL(SD_BLE_GAP_CONNECT_CANCEL, uint32_t, sd_ble_gap_connect_cancel(void)); + + +/**@brief Initiate or respond to a PHY Update Procedure + * + * @details This function is used to initiate or respond to a PHY Update Procedure. It will always + * generate a @ref BLE_GAP_EVT_PHY_UPDATE event if successfully executed. + * If this function is used to initiate a PHY Update procedure and the only option + * provided in @ref ble_gap_phys_t::tx_phys and @ref ble_gap_phys_t::rx_phys is the + * currently active PHYs in the respective directions, the SoftDevice will generate a + * @ref BLE_GAP_EVT_PHY_UPDATE with the current PHYs set and will not initiate the + * procedure in the Link Layer. + * + * If @ref ble_gap_phys_t::tx_phys or @ref ble_gap_phys_t::rx_phys is @ref BLE_GAP_PHY_AUTO, + * then the stack will select PHYs based on the peer's PHY preferences and the local link + * configuration. The PHY Update procedure will for this case result in a PHY combination + * that respects the time constraints configured with @ref sd_ble_cfg_set and the current + * link layer data length. + * + * When acting as a central, the SoftDevice will select the fastest common PHY in each direction. + * + * If the peer does not support the PHY Update Procedure, then the resulting + * @ref BLE_GAP_EVT_PHY_UPDATE event will have a status set to + * @ref BLE_HCI_UNSUPPORTED_REMOTE_FEATURE. + * + * If the PHY procedure was rejected by the peer due to a procedure collision, the status + * will be @ref BLE_HCI_STATUS_CODE_LMP_ERROR_TRANSACTION_COLLISION or + * @ref BLE_HCI_DIFFERENT_TRANSACTION_COLLISION. + * If the peer responds to the PHY Update procedure with invalid parameters, the status + * will be @ref BLE_HCI_STATUS_CODE_INVALID_LMP_PARAMETERS. + * If the PHY procedure was rejected by the peer for a different reason, the status will + * contain the reason as specified by the peer. + * + * @note @ref BLE_GAP_PHY_CODED is only supported as an experimental feature in this SoftDevice. + * When this function is used to reply to a PHY Update, depending on the peers preferences, + * @ref BLE_GAP_PHY_AUTO might result in the PHY to be changed to @ref BLE_GAP_PHY_CODED. + * + * @events + * @event{@ref BLE_GAP_EVT_PHY_UPDATE, Result of the PHY Update Procedure.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GAP_CENTRAL_PHY_UPDATE} + * @mmsc{@ref BLE_GAP_PERIPHERAL_PHY_UPDATE} + * @endmscs + * + * @param[in] conn_handle Connection handle to indicate the connection for which the PHY Update is requested. + * @param[in] p_gap_phys Pointer to PHY structure. + * + * @retval ::NRF_SUCCESS Successfully requested a PHY Update. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::NRF_ERROR_RESOURCES The connection event length configured for this link is not sufficient for the combination of + * @ref ble_gap_phys_t::tx_phys, @ref ble_gap_phys_t::rx_phys, and @ref ble_gap_data_length_params_t. + * The connection event length is configured with @ref BLE_CONN_CFG_GAP using @ref sd_ble_cfg_set. + * @retval ::NRF_ERROR_BUSY Procedure is already in progress or not allowed at this time. Process pending events and wait for the pending procedure to complete and retry. + * + */ +SVCALL(SD_BLE_GAP_PHY_UPDATE, uint32_t, sd_ble_gap_phy_update(uint16_t conn_handle, ble_gap_phys_t const *p_gap_phys)); + + +/**@brief Initiate or respond to a Data Length Update Procedure. + * + * @note If the application uses @ref BLE_GAP_DATA_LENGTH_AUTO for one or more members of + * p_dl_params, the SoftDevice will choose the highest value supported in current + * configuration and connection parameters. + * + * @param[in] conn_handle Connection handle. + * @param[in] p_dl_params Pointer to local parameters to be used in Data Length Update + * Procedure. Set any member to @ref BLE_GAP_DATA_LENGTH_AUTO to let + * the SoftDevice automatically decide the value for that member. + * Set to NULL to use automatic values for all members. + * @param[out] p_dl_limitation Pointer to limitation to be written when local device does not + * have enough resources or does not support the requested Data Length + * Update parameters. Ignored if NULL. + * + * @mscs + * @mmsc{@ref BLE_GAP_DATA_LENGTH_UPDATE_PROCEDURE_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Successfully set Data Length Extension initiation/response parameters. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameters supplied. + * @retval ::NRF_ERROR_NOT_SUPPORTED The requested parameters are not supported by the SoftDevice. Inspect + * p_dl_limitation to see which parameter is not supported. + * @retval ::NRF_ERROR_RESOURCES The connection event length configured for this link is not sufficient for the requested parameters. + * Use @ref sd_ble_cfg_set with @ref BLE_CONN_CFG_GAP to increase the connection event length. + * Inspect p_dl_limitation to see where the limitation is. + * @retval ::NRF_ERROR_BUSY Peer has already initiated a Data Length Update Procedure. Process the + * pending @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST event to respond. + */ +SVCALL(SD_BLE_GAP_DATA_LENGTH_UPDATE, uint32_t, sd_ble_gap_data_length_update(uint16_t conn_handle, ble_gap_data_length_params_t const *p_dl_params, ble_gap_data_length_limitation_t *p_dl_limitation)); + +/**@brief Start the Quality of Service (QoS) channel survey module. + * + * @details The channel survey module provides measurements of the energy levels on + * the Bluetooth Low Energy channels. When the module is enabled, @ref BLE_GAP_EVT_QOS_CHANNEL_SURVEY_REPORT + * events will periodically report the measured energy levels for each channel. + * + * @note The measurements are scheduled with lower priority than other Bluetooth Low Energy roles, + * Radio Timeslot API events and Flash API events. + * + * @note The channel survey module will attempt to do measurements so that the average interval + * between measurements will be interval_us. However due to the channel survey module + * having the lowest priority of all roles and modules, this may not be possible. In that + * case fewer than expected channel survey reports may be given. + * + * @note In order to use the channel survey module, @ref ble_gap_cfg_role_count_t::qos_channel_survey_role_available + * must be set. This is done using @ref sd_ble_cfg_set. + * + * @param[in] interval_us Requested average interval for the measurements and reports. See + * @ref BLE_GAP_QOS_CHANNEL_SURVEY_INTERVALS for valid ranges. If set + * to @ref BLE_GAP_QOS_CHANNEL_SURVEY_INTERVAL_CONTINUOUS, the channel + * survey role will be scheduled at every available opportunity. + * + * @retval ::NRF_SUCCESS The module is successfully started. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter supplied. interval_us is out of the + * allowed range. + * @retval ::NRF_ERROR_INVALID_STATE Trying to start the module when already running. + * @retval ::NRF_ERROR_RESOURCES The channel survey module is not available to the application. + * Set @ref ble_gap_cfg_role_count_t::qos_channel_survey_role_available using + * @ref sd_ble_cfg_set. + */ +SVCALL(SD_BLE_GAP_QOS_CHANNEL_SURVEY_START, uint32_t, sd_ble_gap_qos_channel_survey_start(uint32_t interval_us)); + +/**@brief Stop the Quality of Service (QoS) channel survey module. + * + * @retval ::NRF_SUCCESS The module is successfully stopped. + * @retval ::NRF_ERROR_INVALID_STATE Trying to stop the module when it is not running. + */ +SVCALL(SD_BLE_GAP_QOS_CHANNEL_SURVEY_STOP, uint32_t, sd_ble_gap_qos_channel_survey_stop(void)); + + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // BLE_GAP_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_gatt.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_gatt.h new file mode 100644 index 00000000000..98a7a150bfc --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_gatt.h @@ -0,0 +1,228 @@ +/* + * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_GATT Generic Attribute Profile (GATT) Common + @{ + @brief Common definitions and prototypes for the GATT interfaces. + */ + +#ifndef BLE_GATT_H__ +#define BLE_GATT_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_hci.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_GATT_DEFINES Defines + * @{ */ + +/** @brief Default ATT MTU, in bytes. */ +#define BLE_GATT_ATT_MTU_DEFAULT 23 + +/**@brief Invalid Attribute Handle. */ +#define BLE_GATT_HANDLE_INVALID 0x0000 + +/**@brief First Attribute Handle. */ +#define BLE_GATT_HANDLE_START 0x0001 + +/**@brief Last Attribute Handle. */ +#define BLE_GATT_HANDLE_END 0xFFFF + +/** @defgroup BLE_GATT_TIMEOUT_SOURCES GATT Timeout sources + * @{ */ +#define BLE_GATT_TIMEOUT_SRC_PROTOCOL 0x00 /**< ATT Protocol timeout. */ +/** @} */ + +/** @defgroup BLE_GATT_WRITE_OPS GATT Write operations + * @{ */ +#define BLE_GATT_OP_INVALID 0x00 /**< Invalid Operation. */ +#define BLE_GATT_OP_WRITE_REQ 0x01 /**< Write Request. */ +#define BLE_GATT_OP_WRITE_CMD 0x02 /**< Write Command. */ +#define BLE_GATT_OP_SIGN_WRITE_CMD 0x03 /**< Signed Write Command. */ +#define BLE_GATT_OP_PREP_WRITE_REQ 0x04 /**< Prepare Write Request. */ +#define BLE_GATT_OP_EXEC_WRITE_REQ 0x05 /**< Execute Write Request. */ +/** @} */ + +/** @defgroup BLE_GATT_EXEC_WRITE_FLAGS GATT Execute Write flags + * @{ */ +#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_CANCEL 0x00 /**< Cancel prepared write. */ +#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_WRITE 0x01 /**< Execute prepared write. */ +/** @} */ + +/** @defgroup BLE_GATT_HVX_TYPES GATT Handle Value operations + * @{ */ +#define BLE_GATT_HVX_INVALID 0x00 /**< Invalid Operation. */ +#define BLE_GATT_HVX_NOTIFICATION 0x01 /**< Handle Value Notification. */ +#define BLE_GATT_HVX_INDICATION 0x02 /**< Handle Value Indication. */ +/** @} */ + +/** @defgroup BLE_GATT_STATUS_CODES GATT Status Codes + * @{ */ +#define BLE_GATT_STATUS_SUCCESS 0x0000 /**< Success. */ +#define BLE_GATT_STATUS_UNKNOWN 0x0001 /**< Unknown or not applicable status. */ +#define BLE_GATT_STATUS_ATTERR_INVALID 0x0100 /**< ATT Error: Invalid Error Code. */ +#define BLE_GATT_STATUS_ATTERR_INVALID_HANDLE 0x0101 /**< ATT Error: Invalid Attribute Handle. */ +#define BLE_GATT_STATUS_ATTERR_READ_NOT_PERMITTED 0x0102 /**< ATT Error: Read not permitted. */ +#define BLE_GATT_STATUS_ATTERR_WRITE_NOT_PERMITTED 0x0103 /**< ATT Error: Write not permitted. */ +#define BLE_GATT_STATUS_ATTERR_INVALID_PDU 0x0104 /**< ATT Error: Used in ATT as Invalid PDU. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHENTICATION 0x0105 /**< ATT Error: Authenticated link required. */ +#define BLE_GATT_STATUS_ATTERR_REQUEST_NOT_SUPPORTED 0x0106 /**< ATT Error: Used in ATT as Request Not Supported. */ +#define BLE_GATT_STATUS_ATTERR_INVALID_OFFSET 0x0107 /**< ATT Error: Offset specified was past the end of the attribute. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHORIZATION 0x0108 /**< ATT Error: Used in ATT as Insufficient Authorization. */ +#define BLE_GATT_STATUS_ATTERR_PREPARE_QUEUE_FULL 0x0109 /**< ATT Error: Used in ATT as Prepare Queue Full. */ +#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_FOUND 0x010A /**< ATT Error: Used in ATT as Attribute not found. */ +#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_LONG 0x010B /**< ATT Error: Attribute cannot be read or written using read/write blob requests. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_ENC_KEY_SIZE 0x010C /**< ATT Error: Encryption key size used is insufficient. */ +#define BLE_GATT_STATUS_ATTERR_INVALID_ATT_VAL_LENGTH 0x010D /**< ATT Error: Invalid value size. */ +#define BLE_GATT_STATUS_ATTERR_UNLIKELY_ERROR 0x010E /**< ATT Error: Very unlikely error. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_ENCRYPTION 0x010F /**< ATT Error: Encrypted link required. */ +#define BLE_GATT_STATUS_ATTERR_UNSUPPORTED_GROUP_TYPE 0x0110 /**< ATT Error: Attribute type is not a supported grouping attribute. */ +#define BLE_GATT_STATUS_ATTERR_INSUF_RESOURCES 0x0111 /**< ATT Error: Encrypted link required. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_BEGIN 0x0112 /**< ATT Error: Reserved for Future Use range #1 begin. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_END 0x017F /**< ATT Error: Reserved for Future Use range #1 end. */ +#define BLE_GATT_STATUS_ATTERR_APP_BEGIN 0x0180 /**< ATT Error: Application range begin. */ +#define BLE_GATT_STATUS_ATTERR_APP_END 0x019F /**< ATT Error: Application range end. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_BEGIN 0x01A0 /**< ATT Error: Reserved for Future Use range #2 begin. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_END 0x01DF /**< ATT Error: Reserved for Future Use range #2 end. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_BEGIN 0x01E0 /**< ATT Error: Reserved for Future Use range #3 begin. */ +#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_END 0x01FC /**< ATT Error: Reserved for Future Use range #3 end. */ +#define BLE_GATT_STATUS_ATTERR_CPS_CCCD_CONFIG_ERROR 0x01FD /**< ATT Common Profile and Service Error: Client Characteristic Configuration Descriptor improperly configured. */ +#define BLE_GATT_STATUS_ATTERR_CPS_PROC_ALR_IN_PROG 0x01FE /**< ATT Common Profile and Service Error: Procedure Already in Progress. */ +#define BLE_GATT_STATUS_ATTERR_CPS_OUT_OF_RANGE 0x01FF /**< ATT Common Profile and Service Error: Out Of Range. */ +/** @} */ + + +/** @defgroup BLE_GATT_CPF_FORMATS Characteristic Presentation Formats + * @note Found at http://developer.bluetooth.org/gatt/descriptors/Pages/DescriptorViewer.aspx?u=org.bluetooth.descriptor.gatt.characteristic_presentation_format.xml + * @{ */ +#define BLE_GATT_CPF_FORMAT_RFU 0x00 /**< Reserved For Future Use. */ +#define BLE_GATT_CPF_FORMAT_BOOLEAN 0x01 /**< Boolean. */ +#define BLE_GATT_CPF_FORMAT_2BIT 0x02 /**< Unsigned 2-bit integer. */ +#define BLE_GATT_CPF_FORMAT_NIBBLE 0x03 /**< Unsigned 4-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT8 0x04 /**< Unsigned 8-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT12 0x05 /**< Unsigned 12-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT16 0x06 /**< Unsigned 16-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT24 0x07 /**< Unsigned 24-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT32 0x08 /**< Unsigned 32-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT48 0x09 /**< Unsigned 48-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT64 0x0A /**< Unsigned 64-bit integer. */ +#define BLE_GATT_CPF_FORMAT_UINT128 0x0B /**< Unsigned 128-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT8 0x0C /**< Signed 2-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT12 0x0D /**< Signed 12-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT16 0x0E /**< Signed 16-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT24 0x0F /**< Signed 24-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT32 0x10 /**< Signed 32-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT48 0x11 /**< Signed 48-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT64 0x12 /**< Signed 64-bit integer. */ +#define BLE_GATT_CPF_FORMAT_SINT128 0x13 /**< Signed 128-bit integer. */ +#define BLE_GATT_CPF_FORMAT_FLOAT32 0x14 /**< IEEE-754 32-bit floating point. */ +#define BLE_GATT_CPF_FORMAT_FLOAT64 0x15 /**< IEEE-754 64-bit floating point. */ +#define BLE_GATT_CPF_FORMAT_SFLOAT 0x16 /**< IEEE-11073 16-bit SFLOAT. */ +#define BLE_GATT_CPF_FORMAT_FLOAT 0x17 /**< IEEE-11073 32-bit FLOAT. */ +#define BLE_GATT_CPF_FORMAT_DUINT16 0x18 /**< IEEE-20601 format. */ +#define BLE_GATT_CPF_FORMAT_UTF8S 0x19 /**< UTF-8 string. */ +#define BLE_GATT_CPF_FORMAT_UTF16S 0x1A /**< UTF-16 string. */ +#define BLE_GATT_CPF_FORMAT_STRUCT 0x1B /**< Opaque Structure. */ +/** @} */ + +/** @defgroup BLE_GATT_CPF_NAMESPACES GATT Bluetooth Namespaces + * @{ + */ +#define BLE_GATT_CPF_NAMESPACE_BTSIG 0x01 /**< Bluetooth SIG defined Namespace. */ +#define BLE_GATT_CPF_NAMESPACE_DESCRIPTION_UNKNOWN 0x0000 /**< Namespace Description Unknown. */ +/** @} */ + +/** @} */ + +/** @addtogroup BLE_GATT_STRUCTURES Structures + * @{ */ + +/** + * @brief BLE GATT connection configuration parameters, set with @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_INVALID_PARAM att_mtu is smaller than @ref BLE_GATT_ATT_MTU_DEFAULT. + */ +typedef struct +{ + uint16_t att_mtu; /**< Maximum size of ATT packet the SoftDevice can send or receive. + The default and minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. + @mscs + @mmsc{@ref BLE_GATTC_MTU_EXCHANGE} + @mmsc{@ref BLE_GATTS_MTU_EXCHANGE} + @endmscs + */ +} ble_gatt_conn_cfg_t; + +/**@brief GATT Characteristic Properties. */ +typedef struct +{ + /* Standard properties */ + uint8_t broadcast :1; /**< Broadcasting of the value permitted. */ + uint8_t read :1; /**< Reading the value permitted. */ + uint8_t write_wo_resp :1; /**< Writing the value with Write Command permitted. */ + uint8_t write :1; /**< Writing the value with Write Request permitted. */ + uint8_t notify :1; /**< Notification of the value permitted. */ + uint8_t indicate :1; /**< Indications of the value permitted. */ + uint8_t auth_signed_wr :1; /**< Writing the value with Signed Write Command permitted. */ +} ble_gatt_char_props_t; + +/**@brief GATT Characteristic Extended Properties. */ +typedef struct +{ + /* Extended properties */ + uint8_t reliable_wr :1; /**< Writing the value with Queued Write operations permitted. */ + uint8_t wr_aux :1; /**< Writing the Characteristic User Description descriptor permitted. */ +} ble_gatt_char_ext_props_t; + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // BLE_GATT_H__ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_gattc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_gattc.h new file mode 100644 index 00000000000..7fb3920244d --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_gattc.h @@ -0,0 +1,715 @@ +/* + * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_GATTC Generic Attribute Profile (GATT) Client + @{ + @brief Definitions and prototypes for the GATT Client interface. + */ + +#ifndef BLE_GATTC_H__ +#define BLE_GATTC_H__ + +#include +#include "nrf.h" +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" +#include "ble_gatt.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_GATTC_ENUMERATIONS Enumerations + * @{ */ + +/**@brief GATTC API SVC numbers. */ +enum BLE_GATTC_SVCS +{ + SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER = BLE_GATTC_SVC_BASE, /**< Primary Service Discovery. */ + SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, /**< Relationship Discovery. */ + SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, /**< Characteristic Discovery. */ + SD_BLE_GATTC_DESCRIPTORS_DISCOVER, /**< Characteristic Descriptor Discovery. */ + SD_BLE_GATTC_ATTR_INFO_DISCOVER, /**< Attribute Information Discovery. */ + SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, /**< Read Characteristic Value by UUID. */ + SD_BLE_GATTC_READ, /**< Generic read. */ + SD_BLE_GATTC_CHAR_VALUES_READ, /**< Read multiple Characteristic Values. */ + SD_BLE_GATTC_WRITE, /**< Generic write. */ + SD_BLE_GATTC_HV_CONFIRM, /**< Handle Value Confirmation. */ + SD_BLE_GATTC_EXCHANGE_MTU_REQUEST, /**< Exchange MTU Request. */ +}; + +/** + * @brief GATT Client Event IDs. + */ +enum BLE_GATTC_EVTS +{ + BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP = BLE_GATTC_EVT_BASE, /**< Primary Service Discovery Response event. \n See @ref ble_gattc_evt_prim_srvc_disc_rsp_t. */ + BLE_GATTC_EVT_REL_DISC_RSP, /**< Relationship Discovery Response event. \n See @ref ble_gattc_evt_rel_disc_rsp_t. */ + BLE_GATTC_EVT_CHAR_DISC_RSP, /**< Characteristic Discovery Response event. \n See @ref ble_gattc_evt_char_disc_rsp_t. */ + BLE_GATTC_EVT_DESC_DISC_RSP, /**< Descriptor Discovery Response event. \n See @ref ble_gattc_evt_desc_disc_rsp_t. */ + BLE_GATTC_EVT_ATTR_INFO_DISC_RSP, /**< Attribute Information Response event. \n See @ref ble_gattc_evt_attr_info_disc_rsp_t. */ + BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP, /**< Read By UUID Response event. \n See @ref ble_gattc_evt_char_val_by_uuid_read_rsp_t. */ + BLE_GATTC_EVT_READ_RSP, /**< Read Response event. \n See @ref ble_gattc_evt_read_rsp_t. */ + BLE_GATTC_EVT_CHAR_VALS_READ_RSP, /**< Read multiple Response event. \n See @ref ble_gattc_evt_char_vals_read_rsp_t. */ + BLE_GATTC_EVT_WRITE_RSP, /**< Write Response event. \n See @ref ble_gattc_evt_write_rsp_t. */ + BLE_GATTC_EVT_HVX, /**< Handle Value Notification or Indication event. \n Confirm indication with @ref sd_ble_gattc_hv_confirm. \n See @ref ble_gattc_evt_hvx_t. */ + BLE_GATTC_EVT_EXCHANGE_MTU_RSP, /**< Exchange MTU Response event. \n See @ref ble_gattc_evt_exchange_mtu_rsp_t. */ + BLE_GATTC_EVT_TIMEOUT, /**< Timeout event. \n See @ref ble_gattc_evt_timeout_t. */ + BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE /**< Write without Response transmission complete. \n See @ref ble_gattc_evt_write_cmd_tx_complete_t. */ +}; + +/** @} */ + +/** @addtogroup BLE_GATTC_DEFINES Defines + * @{ */ + +/** @defgroup BLE_ERRORS_GATTC SVC return values specific to GATTC + * @{ */ +#define BLE_ERROR_GATTC_PROC_NOT_PERMITTED (NRF_GATTC_ERR_BASE + 0x000) /**< Procedure not Permitted. */ +/** @} */ + +/** @defgroup BLE_GATTC_ATTR_INFO_FORMAT Attribute Information Formats + * @{ */ +#define BLE_GATTC_ATTR_INFO_FORMAT_16BIT 1 /**< 16-bit Attribute Information Format. */ +#define BLE_GATTC_ATTR_INFO_FORMAT_128BIT 2 /**< 128-bit Attribute Information Format. */ +/** @} */ + +/** @defgroup BLE_GATTC_DEFAULTS GATT Client defaults + * @{ */ +#define BLE_GATTC_WRITE_CMD_TX_QUEUE_SIZE_DEFAULT 1 /**< Default number of Write without Response that can be queued for transmission. */ +/** @} */ + +/** @} */ + +/** @addtogroup BLE_GATTC_STRUCTURES Structures + * @{ */ + +/** + * @brief BLE GATTC connection configuration parameters, set with @ref sd_ble_cfg_set. + */ +typedef struct +{ + uint8_t write_cmd_tx_queue_size; /**< The guaranteed minimum number of Write without Response that can be queued for transmission. + The default value is @ref BLE_GATTC_WRITE_CMD_TX_QUEUE_SIZE_DEFAULT */ +} ble_gattc_conn_cfg_t; + +/**@brief Operation Handle Range. */ +typedef struct +{ + uint16_t start_handle; /**< Start Handle. */ + uint16_t end_handle; /**< End Handle. */ +} ble_gattc_handle_range_t; + + +/**@brief GATT service. */ +typedef struct +{ + ble_uuid_t uuid; /**< Service UUID. */ + ble_gattc_handle_range_t handle_range; /**< Service Handle Range. */ +} ble_gattc_service_t; + + +/**@brief GATT include. */ +typedef struct +{ + uint16_t handle; /**< Include Handle. */ + ble_gattc_service_t included_srvc; /**< Handle of the included service. */ +} ble_gattc_include_t; + + +/**@brief GATT characteristic. */ +typedef struct +{ + ble_uuid_t uuid; /**< Characteristic UUID. */ + ble_gatt_char_props_t char_props; /**< Characteristic Properties. */ + uint8_t char_ext_props : 1; /**< Extended properties present. */ + uint16_t handle_decl; /**< Handle of the Characteristic Declaration. */ + uint16_t handle_value; /**< Handle of the Characteristic Value. */ +} ble_gattc_char_t; + + +/**@brief GATT descriptor. */ +typedef struct +{ + uint16_t handle; /**< Descriptor Handle. */ + ble_uuid_t uuid; /**< Descriptor UUID. */ +} ble_gattc_desc_t; + + +/**@brief Write Parameters. */ +typedef struct +{ + uint8_t write_op; /**< Write Operation to be performed, see @ref BLE_GATT_WRITE_OPS. */ + uint8_t flags; /**< Flags, see @ref BLE_GATT_EXEC_WRITE_FLAGS. */ + uint16_t handle; /**< Handle to the attribute to be written. */ + uint16_t offset; /**< Offset in bytes. @note For WRITE_CMD and WRITE_REQ, offset must be 0. */ + uint16_t len; /**< Length of data in bytes. */ + uint8_t const *p_value; /**< Pointer to the value data. */ +} ble_gattc_write_params_t; + +/**@brief Attribute Information for 16-bit Attribute UUID. */ +typedef struct +{ + uint16_t handle; /**< Attribute handle. */ + ble_uuid_t uuid; /**< 16-bit Attribute UUID. */ +} ble_gattc_attr_info16_t; + +/**@brief Attribute Information for 128-bit Attribute UUID. */ +typedef struct +{ + uint16_t handle; /**< Attribute handle. */ + ble_uuid128_t uuid; /**< 128-bit Attribute UUID. */ +} ble_gattc_attr_info128_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Service count. */ + ble_gattc_service_t services[1]; /**< Service data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_prim_srvc_disc_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_REL_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Include count. */ + ble_gattc_include_t includes[1]; /**< Include data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_rel_disc_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Characteristic count. */ + ble_gattc_char_t chars[1]; /**< Characteristic data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_char_disc_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_DESC_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Descriptor count. */ + ble_gattc_desc_t descs[1]; /**< Descriptor data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_desc_disc_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_ATTR_INFO_DISC_RSP. */ +typedef struct +{ + uint16_t count; /**< Attribute count. */ + uint8_t format; /**< Attribute information format, see @ref BLE_GATTC_ATTR_INFO_FORMAT. */ + union { + ble_gattc_attr_info16_t attr_info16[1]; /**< Attribute information for 16-bit Attribute UUID. + @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ + ble_gattc_attr_info128_t attr_info128[1]; /**< Attribute information for 128-bit Attribute UUID. + @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ + } info; /**< Attribute information union. */ +} ble_gattc_evt_attr_info_disc_rsp_t; + +/**@brief GATT read by UUID handle value pair. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + uint8_t *p_value; /**< Pointer to the Attribute Value, length is available in @ref ble_gattc_evt_char_val_by_uuid_read_rsp_t::value_len. */ +} ble_gattc_handle_value_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP. */ +typedef struct +{ + uint16_t count; /**< Handle-Value Pair Count. */ + uint16_t value_len; /**< Length of the value in Handle-Value(s) list. */ + uint8_t handle_value[1]; /**< Handle-Value(s) list. To iterate through the list use @ref sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter. + @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_char_val_by_uuid_read_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_READ_RSP. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + uint16_t offset; /**< Offset of the attribute data. */ + uint16_t len; /**< Attribute data length. */ + uint8_t data[1]; /**< Attribute data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_read_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_VALS_READ_RSP. */ +typedef struct +{ + uint16_t len; /**< Concatenated Attribute values length. */ + uint8_t values[1]; /**< Attribute values. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_char_vals_read_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_WRITE_RSP. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + uint8_t write_op; /**< Type of write operation, see @ref BLE_GATT_WRITE_OPS. */ + uint16_t offset; /**< Data offset. */ + uint16_t len; /**< Data length. */ + uint8_t data[1]; /**< Data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_write_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_HVX. */ +typedef struct +{ + uint16_t handle; /**< Handle to which the HVx operation applies. */ + uint8_t type; /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */ + uint16_t len; /**< Attribute data length. */ + uint8_t data[1]; /**< Attribute data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gattc_evt_hvx_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP. */ +typedef struct +{ + uint16_t server_rx_mtu; /**< Server RX MTU size. */ +} ble_gattc_evt_exchange_mtu_rsp_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_TIMEOUT. */ +typedef struct +{ + uint8_t src; /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */ +} ble_gattc_evt_timeout_t; + +/**@brief Event structure for @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE. */ +typedef struct +{ + uint8_t count; /**< Number of write without response transmissions completed. */ +} ble_gattc_evt_write_cmd_tx_complete_t; + +/**@brief GATTC event structure. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which event occurred. */ + uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ + uint16_t error_handle; /**< In case of error: The handle causing the error. In all other cases @ref BLE_GATT_HANDLE_INVALID. */ + union + { + ble_gattc_evt_prim_srvc_disc_rsp_t prim_srvc_disc_rsp; /**< Primary Service Discovery Response Event Parameters. */ + ble_gattc_evt_rel_disc_rsp_t rel_disc_rsp; /**< Relationship Discovery Response Event Parameters. */ + ble_gattc_evt_char_disc_rsp_t char_disc_rsp; /**< Characteristic Discovery Response Event Parameters. */ + ble_gattc_evt_desc_disc_rsp_t desc_disc_rsp; /**< Descriptor Discovery Response Event Parameters. */ + ble_gattc_evt_char_val_by_uuid_read_rsp_t char_val_by_uuid_read_rsp; /**< Characteristic Value Read by UUID Response Event Parameters. */ + ble_gattc_evt_read_rsp_t read_rsp; /**< Read Response Event Parameters. */ + ble_gattc_evt_char_vals_read_rsp_t char_vals_read_rsp; /**< Characteristic Values Read Response Event Parameters. */ + ble_gattc_evt_write_rsp_t write_rsp; /**< Write Response Event Parameters. */ + ble_gattc_evt_hvx_t hvx; /**< Handle Value Notification/Indication Event Parameters. */ + ble_gattc_evt_exchange_mtu_rsp_t exchange_mtu_rsp; /**< Exchange MTU Response Event Parameters. */ + ble_gattc_evt_timeout_t timeout; /**< Timeout Event Parameters. */ + ble_gattc_evt_attr_info_disc_rsp_t attr_info_disc_rsp; /**< Attribute Information Discovery Event Parameters. */ + ble_gattc_evt_write_cmd_tx_complete_t write_cmd_tx_complete; /**< Write without Response transmission complete Event Parameters. */ + } params; /**< Event Parameters. @note Only valid if @ref gatt_status == @ref BLE_GATT_STATUS_SUCCESS. */ +} ble_gattc_evt_t; +/** @} */ + +/** @addtogroup BLE_GATTC_FUNCTIONS Functions + * @{ */ + +/**@brief Initiate or continue a GATT Primary Service Discovery procedure. + * + * @details This function initiates or resumes a Primary Service discovery procedure, starting from the supplied handle. + * If the last service has not been reached, this function must be called again with an updated start handle value to continue the search. + * + * @note If any of the discovered services have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with + * type @ref BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event. + * + * @events + * @event{@ref BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_PRIM_SRVC_DISC_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] start_handle Handle to start searching from. + * @param[in] p_srvc_uuid Pointer to the service UUID to be found. If it is NULL, all primary services will be returned. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Primary Service Discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER, uint32_t, sd_ble_gattc_primary_services_discover(uint16_t conn_handle, uint16_t start_handle, ble_uuid_t const *p_srvc_uuid)); + + +/**@brief Initiate or continue a GATT Relationship Discovery procedure. + * + * @details This function initiates or resumes the Find Included Services sub-procedure. If the last included service has not been reached, + * this must be called again with an updated handle range to continue the search. + * + * @events + * @event{@ref BLE_GATTC_EVT_REL_DISC_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_REL_DISC_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Relationship Discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, uint32_t, sd_ble_gattc_relationships_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); + + +/**@brief Initiate or continue a GATT Characteristic Discovery procedure. + * + * @details This function initiates or resumes a Characteristic discovery procedure. If the last Characteristic has not been reached, + * this must be called again with an updated handle range to continue the discovery. + * + * @note If any of the discovered characteristics have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with + * type @ref BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event. + * + * @events + * @event{@ref BLE_GATTC_EVT_CHAR_DISC_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_CHAR_DISC_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Characteristic Discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, uint32_t, sd_ble_gattc_characteristics_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); + + +/**@brief Initiate or continue a GATT Characteristic Descriptor Discovery procedure. + * + * @details This function initiates or resumes a Characteristic Descriptor discovery procedure. If the last Descriptor has not been reached, + * this must be called again with an updated handle range to continue the discovery. + * + * @events + * @event{@ref BLE_GATTC_EVT_DESC_DISC_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_DESC_DISC_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handle_range A pointer to the range of handles of the Characteristic to perform this procedure on. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Descriptor Discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_DESCRIPTORS_DISCOVER, uint32_t, sd_ble_gattc_descriptors_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); + + +/**@brief Initiate or continue a GATT Read using Characteristic UUID procedure. + * + * @details This function initiates or resumes a Read using Characteristic UUID procedure. If the last Characteristic has not been reached, + * this must be called again with an updated handle range to continue the discovery. + * + * @events + * @event{@ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_READ_UUID_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_uuid Pointer to a Characteristic value UUID to read. + * @param[in] p_handle_range A pointer to the range of handles to perform this procedure on. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Read using Characteristic UUID procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, uint32_t, sd_ble_gattc_char_value_by_uuid_read(uint16_t conn_handle, ble_uuid_t const *p_uuid, ble_gattc_handle_range_t const *p_handle_range)); + + +/**@brief Initiate or continue a GATT Read (Long) Characteristic or Descriptor procedure. + * + * @details This function initiates or resumes a GATT Read (Long) Characteristic or Descriptor procedure. If the Characteristic or Descriptor + * to be read is longer than ATT_MTU - 1, this function must be called multiple times with appropriate offset to read the + * complete value. + * + * @events + * @event{@ref BLE_GATTC_EVT_READ_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_VALUE_READ_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] handle The handle of the attribute to be read. + * @param[in] offset Offset into the attribute value to be read. + * + * @retval ::NRF_SUCCESS Successfully started or resumed the Read (Long) procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_READ, uint32_t, sd_ble_gattc_read(uint16_t conn_handle, uint16_t handle, uint16_t offset)); + + +/**@brief Initiate a GATT Read Multiple Characteristic Values procedure. + * + * @details This function initiates a GATT Read Multiple Characteristic Values procedure. + * + * @events + * @event{@ref BLE_GATTC_EVT_CHAR_VALS_READ_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_READ_MULT_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handles A pointer to the handle(s) of the attribute(s) to be read. + * @param[in] handle_count The number of handles in p_handles. + * + * @retval ::NRF_SUCCESS Successfully started the Read Multiple Characteristic Values procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_CHAR_VALUES_READ, uint32_t, sd_ble_gattc_char_values_read(uint16_t conn_handle, uint16_t const *p_handles, uint16_t handle_count)); + + +/**@brief Perform a Write (Characteristic Value or Descriptor, with or without response, signed or not, long or reliable) procedure. + * + * @details This function can perform all write procedures described in GATT. + * + * @note Only one write with response procedure can be ongoing per connection at a time. + * If the application tries to write with response while another write with response procedure is ongoing, + * the function call will return @ref NRF_ERROR_BUSY. + * A @ref BLE_GATTC_EVT_WRITE_RSP event will be issued as soon as the write response arrives from the peer. + * + * @note The number of Write without Response that can be queued is configured by @ref ble_gattc_conn_cfg_t::write_cmd_tx_queue_size + * When the queue is full, the function call will return @ref NRF_ERROR_RESOURCES. + * A @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event will be issued as soon as the transmission of the write without response is complete. + * + * @note The application can keep track of the available queue element count for writes without responses by following the procedure below: + * - Store initial queue element count in a variable. + * - Decrement the variable, which stores the currently available queue element count, by one when a call to this function returns @ref NRF_SUCCESS. + * - Increment the variable, which stores the current available queue element count, by the count variable in @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event. + * + * @events + * @event{@ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE, Write without response transmission complete.} + * @event{@ref BLE_GATTC_EVT_WRITE_RSP, Write response received from the peer.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_VALUE_WRITE_WITHOUT_RESP_MSC} + * @mmsc{@ref BLE_GATTC_VALUE_WRITE_MSC} + * @mmsc{@ref BLE_GATTC_VALUE_LONG_WRITE_MSC} + * @mmsc{@ref BLE_GATTC_VALUE_RELIABLE_WRITE_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_write_params A pointer to a write parameters structure. + * + * @retval ::NRF_SUCCESS Successfully started the Write procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. + * @retval ::NRF_ERROR_BUSY For write with response, procedure already in progress. Wait for a @ref BLE_GATTC_EVT_WRITE_RSP event and retry. + * @retval ::NRF_ERROR_RESOURCES Too many writes without responses queued. + * Wait for a @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event and retry. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_WRITE, uint32_t, sd_ble_gattc_write(uint16_t conn_handle, ble_gattc_write_params_t const *p_write_params)); + + +/**@brief Send a Handle Value Confirmation to the GATT Server. + * + * @mscs + * @mmsc{@ref BLE_GATTC_HVI_MSC} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] handle The handle of the attribute in the indication. + * + * @retval ::NRF_SUCCESS Successfully queued the Handle Value Confirmation for transmission. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no Indication pending to be confirmed. + * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_HV_CONFIRM, uint32_t, sd_ble_gattc_hv_confirm(uint16_t conn_handle, uint16_t handle)); + +/**@brief Discovers information about a range of attributes on a GATT server. + * + * @events + * @event{@ref BLE_GATTC_EVT_ATTR_INFO_DISC_RSP, Generated when information about a range of attributes has been received.} + * @endevents + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] p_handle_range The range of handles to request information about. + * + * @retval ::NRF_SUCCESS Successfully started an attribute information discovery procedure. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid connection state + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_ATTR_INFO_DISCOVER, uint32_t, sd_ble_gattc_attr_info_discover(uint16_t conn_handle, ble_gattc_handle_range_t const * p_handle_range)); + +/**@brief Start an ATT_MTU exchange by sending an Exchange MTU Request to the server. + * + * @details The SoftDevice sets ATT_MTU to the minimum of: + * - The Client RX MTU value, and + * - The Server RX MTU value from @ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP. + * + * However, the SoftDevice never sets ATT_MTU lower than @ref BLE_GATT_ATT_MTU_DEFAULT. + * + * @events + * @event{@ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTC_MTU_EXCHANGE} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] client_rx_mtu Client RX MTU size. + * - The minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. + * - The maximum value is @ref ble_gatt_conn_cfg_t::att_mtu in the connection configuration + used for this connection. + * - The value must be equal to Server RX MTU size given in @ref sd_ble_gatts_exchange_mtu_reply + * if an ATT_MTU exchange has already been performed in the other direction. + * + * @retval ::NRF_SUCCESS Successfully sent request to the server. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid connection state or an ATT_MTU exchange was already requested once. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid Client RX MTU size supplied. + * @retval ::NRF_ERROR_BUSY Client procedure already in progress. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTC_EXCHANGE_MTU_REQUEST, uint32_t, sd_ble_gattc_exchange_mtu_request(uint16_t conn_handle, uint16_t client_rx_mtu)); + +/**@brief Iterate through Handle-Value(s) list in @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP event. + * + * @param[in] p_gattc_evt Pointer to event buffer containing @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP event. + * @note If the buffer contains different event, behavior is undefined. + * @param[in,out] p_iter Iterator, points to @ref ble_gattc_handle_value_t structure that will be filled in with + * the next Handle-Value pair in each iteration. If the function returns other than + * @ref NRF_SUCCESS, it will not be changed. + * - To start iteration, initialize the structure to zero. + * - To continue, pass the value from previous iteration. + * + * \code + * ble_gattc_handle_value_t iter; + * memset(&iter, 0, sizeof(ble_gattc_handle_value_t)); + * while (sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(&ble_evt.evt.gattc_evt, &iter) == NRF_SUCCESS) + * { + * app_handle = iter.handle; + * memcpy(app_value, iter.p_value, ble_evt.evt.gattc_evt.params.char_val_by_uuid_read_rsp.value_len); + * } + * \endcode + * + * @retval ::NRF_SUCCESS Successfully retrieved the next Handle-Value pair. + * @retval ::NRF_ERROR_NOT_FOUND No more Handle-Value pairs available in the list. + */ +__STATIC_INLINE uint32_t sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(ble_gattc_evt_t *p_gattc_evt, ble_gattc_handle_value_t *p_iter); + +/** @} */ + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE uint32_t sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(ble_gattc_evt_t *p_gattc_evt, ble_gattc_handle_value_t *p_iter) +{ + uint32_t value_len = p_gattc_evt->params.char_val_by_uuid_read_rsp.value_len; + uint8_t *p_first = p_gattc_evt->params.char_val_by_uuid_read_rsp.handle_value; + uint8_t *p_next = p_iter->p_value ? p_iter->p_value + value_len : p_first; + + if ((p_next - p_first) / (sizeof(uint16_t) + value_len) < p_gattc_evt->params.char_val_by_uuid_read_rsp.count) + { + p_iter->handle = (uint16_t)p_next[1] << 8 | p_next[0]; + p_iter->p_value = p_next + sizeof(uint16_t); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_NOT_FOUND; + } +} + +#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ + +#ifdef __cplusplus +} +#endif +#endif /* BLE_GATTC_H__ */ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_gatts.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_gatts.h new file mode 100644 index 00000000000..e437b6e0767 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_gatts.h @@ -0,0 +1,845 @@ +/* + * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_GATTS Generic Attribute Profile (GATT) Server + @{ + @brief Definitions and prototypes for the GATTS interface. + */ + +#ifndef BLE_GATTS_H__ +#define BLE_GATTS_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_hci.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" +#include "ble_gatt.h" +#include "ble_gap.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_GATTS_ENUMERATIONS Enumerations + * @{ */ + +/** + * @brief GATTS API SVC numbers. + */ +enum BLE_GATTS_SVCS +{ + SD_BLE_GATTS_SERVICE_ADD = BLE_GATTS_SVC_BASE, /**< Add a service. */ + SD_BLE_GATTS_INCLUDE_ADD, /**< Add an included service. */ + SD_BLE_GATTS_CHARACTERISTIC_ADD, /**< Add a characteristic. */ + SD_BLE_GATTS_DESCRIPTOR_ADD, /**< Add a generic attribute. */ + SD_BLE_GATTS_VALUE_SET, /**< Set an attribute value. */ + SD_BLE_GATTS_VALUE_GET, /**< Get an attribute value. */ + SD_BLE_GATTS_HVX, /**< Handle Value Notification or Indication. */ + SD_BLE_GATTS_SERVICE_CHANGED, /**< Perform a Service Changed Indication to one or more peers. */ + SD_BLE_GATTS_RW_AUTHORIZE_REPLY, /**< Reply to an authorization request for a read or write operation on one or more attributes. */ + SD_BLE_GATTS_SYS_ATTR_SET, /**< Set the persistent system attributes for a connection. */ + SD_BLE_GATTS_SYS_ATTR_GET, /**< Retrieve the persistent system attributes. */ + SD_BLE_GATTS_INITIAL_USER_HANDLE_GET, /**< Retrieve the first valid user handle. */ + SD_BLE_GATTS_ATTR_GET, /**< Retrieve the UUID and/or metadata of an attribute. */ + SD_BLE_GATTS_EXCHANGE_MTU_REPLY /**< Reply to Exchange MTU Request. */ +}; + +/** + * @brief GATT Server Event IDs. + */ +enum BLE_GATTS_EVTS +{ + BLE_GATTS_EVT_WRITE = BLE_GATTS_EVT_BASE, /**< Write operation performed. \n See @ref ble_gatts_evt_write_t. */ + BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST, /**< Read/Write Authorization request. \n Reply with @ref sd_ble_gatts_rw_authorize_reply. \n See @ref ble_gatts_evt_rw_authorize_request_t. */ + BLE_GATTS_EVT_SYS_ATTR_MISSING, /**< A persistent system attribute access is pending. \n Respond with @ref sd_ble_gatts_sys_attr_set. \n See @ref ble_gatts_evt_sys_attr_missing_t. */ + BLE_GATTS_EVT_HVC, /**< Handle Value Confirmation. \n See @ref ble_gatts_evt_hvc_t. */ + BLE_GATTS_EVT_SC_CONFIRM, /**< Service Changed Confirmation. \n No additional event structure applies. */ + BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST, /**< Exchange MTU Request. \n Reply with @ref sd_ble_gatts_exchange_mtu_reply. \n See @ref ble_gatts_evt_exchange_mtu_request_t. */ + BLE_GATTS_EVT_TIMEOUT, /**< Peer failed to respond to an ATT request in time. \n See @ref ble_gatts_evt_timeout_t. */ + BLE_GATTS_EVT_HVN_TX_COMPLETE /**< Handle Value Notification transmission complete. \n See @ref ble_gatts_evt_hvn_tx_complete_t. */ +}; + +/**@brief GATTS Configuration IDs. + * + * IDs that uniquely identify a GATTS configuration. + */ +enum BLE_GATTS_CFGS +{ + BLE_GATTS_CFG_SERVICE_CHANGED = BLE_GATTS_CFG_BASE, /**< Service changed configuration. */ + BLE_GATTS_CFG_ATTR_TAB_SIZE, /**< Attribute table size configuration. */ +}; + +/** @} */ + +/** @addtogroup BLE_GATTS_DEFINES Defines + * @{ */ + +/** @defgroup BLE_ERRORS_GATTS SVC return values specific to GATTS + * @{ */ +#define BLE_ERROR_GATTS_INVALID_ATTR_TYPE (NRF_GATTS_ERR_BASE + 0x000) /**< Invalid attribute type. */ +#define BLE_ERROR_GATTS_SYS_ATTR_MISSING (NRF_GATTS_ERR_BASE + 0x001) /**< System Attributes missing. */ +/** @} */ + +/** @defgroup BLE_GATTS_ATTR_LENS_MAX Maximum attribute lengths + * @{ */ +#define BLE_GATTS_FIX_ATTR_LEN_MAX (510) /**< Maximum length for fixed length Attribute Values. */ +#define BLE_GATTS_VAR_ATTR_LEN_MAX (512) /**< Maximum length for variable length Attribute Values. */ +/** @} */ + +/** @defgroup BLE_GATTS_SRVC_TYPES GATT Server Service Types + * @{ */ +#define BLE_GATTS_SRVC_TYPE_INVALID 0x00 /**< Invalid Service Type. */ +#define BLE_GATTS_SRVC_TYPE_PRIMARY 0x01 /**< Primary Service. */ +#define BLE_GATTS_SRVC_TYPE_SECONDARY 0x02 /**< Secondary Type. */ +/** @} */ + + +/** @defgroup BLE_GATTS_ATTR_TYPES GATT Server Attribute Types + * @{ */ +#define BLE_GATTS_ATTR_TYPE_INVALID 0x00 /**< Invalid Attribute Type. */ +#define BLE_GATTS_ATTR_TYPE_PRIM_SRVC_DECL 0x01 /**< Primary Service Declaration. */ +#define BLE_GATTS_ATTR_TYPE_SEC_SRVC_DECL 0x02 /**< Secondary Service Declaration. */ +#define BLE_GATTS_ATTR_TYPE_INC_DECL 0x03 /**< Include Declaration. */ +#define BLE_GATTS_ATTR_TYPE_CHAR_DECL 0x04 /**< Characteristic Declaration. */ +#define BLE_GATTS_ATTR_TYPE_CHAR_VAL 0x05 /**< Characteristic Value. */ +#define BLE_GATTS_ATTR_TYPE_DESC 0x06 /**< Descriptor. */ +#define BLE_GATTS_ATTR_TYPE_OTHER 0x07 /**< Other, non-GATT specific type. */ +/** @} */ + + +/** @defgroup BLE_GATTS_OPS GATT Server Operations + * @{ */ +#define BLE_GATTS_OP_INVALID 0x00 /**< Invalid Operation. */ +#define BLE_GATTS_OP_WRITE_REQ 0x01 /**< Write Request. */ +#define BLE_GATTS_OP_WRITE_CMD 0x02 /**< Write Command. */ +#define BLE_GATTS_OP_SIGN_WRITE_CMD 0x03 /**< Signed Write Command. */ +#define BLE_GATTS_OP_PREP_WRITE_REQ 0x04 /**< Prepare Write Request. */ +#define BLE_GATTS_OP_EXEC_WRITE_REQ_CANCEL 0x05 /**< Execute Write Request: Cancel all prepared writes. */ +#define BLE_GATTS_OP_EXEC_WRITE_REQ_NOW 0x06 /**< Execute Write Request: Immediately execute all prepared writes. */ +/** @} */ + +/** @defgroup BLE_GATTS_VLOCS GATT Value Locations + * @{ */ +#define BLE_GATTS_VLOC_INVALID 0x00 /**< Invalid Location. */ +#define BLE_GATTS_VLOC_STACK 0x01 /**< Attribute Value is located in stack memory, no user memory is required. */ +#define BLE_GATTS_VLOC_USER 0x02 /**< Attribute Value is located in user memory. This requires the user to maintain a valid buffer through the lifetime of the attribute, since the stack + will read and write directly to the memory using the pointer provided in the APIs. There are no alignment requirements for the buffer. */ +/** @} */ + +/** @defgroup BLE_GATTS_AUTHORIZE_TYPES GATT Server Authorization Types + * @{ */ +#define BLE_GATTS_AUTHORIZE_TYPE_INVALID 0x00 /**< Invalid Type. */ +#define BLE_GATTS_AUTHORIZE_TYPE_READ 0x01 /**< Authorize a Read Operation. */ +#define BLE_GATTS_AUTHORIZE_TYPE_WRITE 0x02 /**< Authorize a Write Request Operation. */ +/** @} */ + +/** @defgroup BLE_GATTS_SYS_ATTR_FLAGS System Attribute Flags + * @{ */ +#define BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS (1 << 0) /**< Restrict system attributes to system services only. */ +#define BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS (1 << 1) /**< Restrict system attributes to user services only. */ +/** @} */ + +/** @defgroup BLE_GATTS_SERVICE_CHANGED Service Changed Inclusion Values + * @{ + */ +#define BLE_GATTS_SERVICE_CHANGED_DEFAULT (1) /**< Default is to include the Service Changed characteristic in the Attribute Table. */ +/** @} */ + +/** @defgroup BLE_GATTS_ATTR_TAB_SIZE Attribute Table size + * @{ + */ +#define BLE_GATTS_ATTR_TAB_SIZE_MIN (248) /**< Minimum Attribute Table size */ +#define BLE_GATTS_ATTR_TAB_SIZE_DEFAULT (1408) /**< Default Attribute Table size. */ +/** @} */ + +/** @defgroup BLE_GATTS_DEFAULTS GATT Server defaults + * @{ + */ +#define BLE_GATTS_HVN_TX_QUEUE_SIZE_DEFAULT 1 /**< Default number of Handle Value Notifications that can be queued for transmission. */ +/** @} */ + +/** @} */ + +/** @addtogroup BLE_GATTS_STRUCTURES Structures + * @{ */ + +/** + * @brief BLE GATTS connection configuration parameters, set with @ref sd_ble_cfg_set. + */ +typedef struct +{ + uint8_t hvn_tx_queue_size; /**< Minimum guaranteed number of Handle Value Notifications that can be queued for transmission. + The default value is @ref BLE_GATTS_HVN_TX_QUEUE_SIZE_DEFAULT */ +} ble_gatts_conn_cfg_t; + +/**@brief Attribute metadata. */ +typedef struct +{ + ble_gap_conn_sec_mode_t read_perm; /**< Read permissions. */ + ble_gap_conn_sec_mode_t write_perm; /**< Write permissions. */ + uint8_t vlen :1; /**< Variable length attribute. */ + uint8_t vloc :2; /**< Value location, see @ref BLE_GATTS_VLOCS.*/ + uint8_t rd_auth :1; /**< Read authorization and value will be requested from the application on every read operation. */ + uint8_t wr_auth :1; /**< Write authorization will be requested from the application on every Write Request operation (but not Write Command). */ +} ble_gatts_attr_md_t; + + +/**@brief GATT Attribute. */ +typedef struct +{ + ble_uuid_t const *p_uuid; /**< Pointer to the attribute UUID. */ + ble_gatts_attr_md_t const *p_attr_md; /**< Pointer to the attribute metadata structure. */ + uint16_t init_len; /**< Initial attribute value length in bytes. */ + uint16_t init_offs; /**< Initial attribute value offset in bytes. If different from zero, the first init_offs bytes of the attribute value will be left uninitialized. */ + uint16_t max_len; /**< Maximum attribute value length in bytes, see @ref BLE_GATTS_ATTR_LENS_MAX for maximum values. */ + uint8_t *p_value; /**< Pointer to the attribute data. Please note that if the @ref BLE_GATTS_VLOC_USER value location is selected in the attribute metadata, this will have to point to a buffer + that remains valid through the lifetime of the attribute. This excludes usage of automatic variables that may go out of scope or any other temporary location. + The stack may access that memory directly without the application's knowledge. For writable characteristics, this value must not be a location in flash memory.*/ +} ble_gatts_attr_t; + +/**@brief GATT Attribute Value. */ +typedef struct +{ + uint16_t len; /**< Length in bytes to be written or read. Length in bytes written or read after successful return.*/ + uint16_t offset; /**< Attribute value offset. */ + uint8_t *p_value; /**< Pointer to where value is stored or will be stored. + If value is stored in user memory, only the attribute length is updated when p_value == NULL. + Set to NULL when reading to obtain the complete length of the attribute value */ +} ble_gatts_value_t; + + +/**@brief GATT Characteristic Presentation Format. */ +typedef struct +{ + uint8_t format; /**< Format of the value, see @ref BLE_GATT_CPF_FORMATS. */ + int8_t exponent; /**< Exponent for integer data types. */ + uint16_t unit; /**< Unit from Bluetooth Assigned Numbers. */ + uint8_t name_space; /**< Namespace from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */ + uint16_t desc; /**< Namespace description from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */ +} ble_gatts_char_pf_t; + + +/**@brief GATT Characteristic metadata. */ +typedef struct +{ + ble_gatt_char_props_t char_props; /**< Characteristic Properties. */ + ble_gatt_char_ext_props_t char_ext_props; /**< Characteristic Extended Properties. */ + uint8_t const *p_char_user_desc; /**< Pointer to a UTF-8 encoded string (non-NULL terminated), NULL if the descriptor is not required. */ + uint16_t char_user_desc_max_size; /**< The maximum size in bytes of the user description descriptor. */ + uint16_t char_user_desc_size; /**< The size of the user description, must be smaller or equal to char_user_desc_max_size. */ + ble_gatts_char_pf_t const *p_char_pf; /**< Pointer to a presentation format structure or NULL if the CPF descriptor is not required. */ + ble_gatts_attr_md_t const *p_user_desc_md; /**< Attribute metadata for the User Description descriptor, or NULL for default values. */ + ble_gatts_attr_md_t const *p_cccd_md; /**< Attribute metadata for the Client Characteristic Configuration Descriptor, or NULL for default values. */ + ble_gatts_attr_md_t const *p_sccd_md; /**< Attribute metadata for the Server Characteristic Configuration Descriptor, or NULL for default values. */ +} ble_gatts_char_md_t; + + +/**@brief GATT Characteristic Definition Handles. */ +typedef struct +{ + uint16_t value_handle; /**< Handle to the characteristic value. */ + uint16_t user_desc_handle; /**< Handle to the User Description descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ + uint16_t cccd_handle; /**< Handle to the Client Characteristic Configuration Descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ + uint16_t sccd_handle; /**< Handle to the Server Characteristic Configuration Descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ +} ble_gatts_char_handles_t; + + +/**@brief GATT HVx parameters. */ +typedef struct +{ + uint16_t handle; /**< Characteristic Value Handle. */ + uint8_t type; /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */ + uint16_t offset; /**< Offset within the attribute value. */ + uint16_t *p_len; /**< Length in bytes to be written, length in bytes written after return. */ + uint8_t const *p_data; /**< Actual data content, use NULL to use the current attribute value. */ +} ble_gatts_hvx_params_t; + +/**@brief GATT Authorization parameters. */ +typedef struct +{ + uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ + uint8_t update : 1; /**< If set, data supplied in p_data will be used to update the attribute value. + Please note that for @ref BLE_GATTS_AUTHORIZE_TYPE_WRITE operations this bit must always be set, + as the data to be written needs to be stored and later provided by the application. */ + uint16_t offset; /**< Offset of the attribute value being updated. */ + uint16_t len; /**< Length in bytes of the value in p_data pointer, see @ref BLE_GATTS_ATTR_LENS_MAX. */ + uint8_t const *p_data; /**< Pointer to new value used to update the attribute value. */ +} ble_gatts_authorize_params_t; + +/**@brief GATT Read or Write Authorize Reply parameters. */ +typedef struct +{ + uint8_t type; /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */ + union { + ble_gatts_authorize_params_t read; /**< Read authorization parameters. */ + ble_gatts_authorize_params_t write; /**< Write authorization parameters. */ + } params; /**< Reply Parameters. */ +} ble_gatts_rw_authorize_reply_params_t; + +/**@brief Service Changed Inclusion configuration parameters, set with @ref sd_ble_cfg_set. */ +typedef struct +{ + uint8_t service_changed : 1; /**< If 1, include the Service Changed characteristic in the Attribute Table. Default is @ref BLE_GATTS_SERVICE_CHANGED_DEFAULT. */ +} ble_gatts_cfg_service_changed_t; + +/**@brief Attribute table size configuration parameters, set with @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_INVALID_LENGTH One or more of the following is true: + * - The specified Attribute Table size is too small. + * The minimum acceptable size is defined by @ref BLE_GATTS_ATTR_TAB_SIZE_MIN. + * - The specified Attribute Table size is not a multiple of 4. + */ +typedef struct +{ + uint32_t attr_tab_size; /**< Attribute table size. Default is @ref BLE_GATTS_ATTR_TAB_SIZE_DEFAULT, minimum is @ref BLE_GATTS_ATTR_TAB_SIZE_MIN. */ +} ble_gatts_cfg_attr_tab_size_t; + +/**@brief Config structure for GATTS configurations. */ +typedef union +{ + ble_gatts_cfg_service_changed_t service_changed; /**< Include service changed characteristic, cfg_id is @ref BLE_GATTS_CFG_SERVICE_CHANGED. */ + ble_gatts_cfg_attr_tab_size_t attr_tab_size; /**< Attribute table size, cfg_id is @ref BLE_GATTS_CFG_ATTR_TAB_SIZE. */ +} ble_gatts_cfg_t; + + +/**@brief Event structure for @ref BLE_GATTS_EVT_WRITE. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + ble_uuid_t uuid; /**< Attribute UUID. */ + uint8_t op; /**< Type of write operation, see @ref BLE_GATTS_OPS. */ + uint8_t auth_required; /**< Writing operation deferred due to authorization requirement. Application may use @ref sd_ble_gatts_value_set to finalize the writing operation. */ + uint16_t offset; /**< Offset for the write operation. */ + uint16_t len; /**< Length of the received data. */ + uint8_t data[1]; /**< Received data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. + See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ +} ble_gatts_evt_write_t; + +/**@brief Event substructure for authorized read requests, see @ref ble_gatts_evt_rw_authorize_request_t. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ + ble_uuid_t uuid; /**< Attribute UUID. */ + uint16_t offset; /**< Offset for the read operation. */ +} ble_gatts_evt_read_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST. */ +typedef struct +{ + uint8_t type; /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */ + union { + ble_gatts_evt_read_t read; /**< Attribute Read Parameters. */ + ble_gatts_evt_write_t write; /**< Attribute Write Parameters. */ + } request; /**< Request Parameters. */ +} ble_gatts_evt_rw_authorize_request_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_SYS_ATTR_MISSING. */ +typedef struct +{ + uint8_t hint; /**< Hint (currently unused). */ +} ble_gatts_evt_sys_attr_missing_t; + + +/**@brief Event structure for @ref BLE_GATTS_EVT_HVC. */ +typedef struct +{ + uint16_t handle; /**< Attribute Handle. */ +} ble_gatts_evt_hvc_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST. */ +typedef struct +{ + uint16_t client_rx_mtu; /**< Client RX MTU size. */ +} ble_gatts_evt_exchange_mtu_request_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_TIMEOUT. */ +typedef struct +{ + uint8_t src; /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */ +} ble_gatts_evt_timeout_t; + +/**@brief Event structure for @ref BLE_GATTS_EVT_HVN_TX_COMPLETE. */ +typedef struct +{ + uint8_t count; /**< Number of notification transmissions completed. */ +} ble_gatts_evt_hvn_tx_complete_t; + +/**@brief GATTS event structure. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which the event occurred. */ + union + { + ble_gatts_evt_write_t write; /**< Write Event Parameters. */ + ble_gatts_evt_rw_authorize_request_t authorize_request; /**< Read or Write Authorize Request Parameters. */ + ble_gatts_evt_sys_attr_missing_t sys_attr_missing; /**< System attributes missing. */ + ble_gatts_evt_hvc_t hvc; /**< Handle Value Confirmation Event Parameters. */ + ble_gatts_evt_exchange_mtu_request_t exchange_mtu_request; /**< Exchange MTU Request Event Parameters. */ + ble_gatts_evt_timeout_t timeout; /**< Timeout Event. */ + ble_gatts_evt_hvn_tx_complete_t hvn_tx_complete; /**< Handle Value Notification transmission complete Event Parameters. */ + } params; /**< Event Parameters. */ +} ble_gatts_evt_t; + +/** @} */ + +/** @addtogroup BLE_GATTS_FUNCTIONS Functions + * @{ */ + +/**@brief Add a service declaration to the Attribute Table. + * + * @note Secondary Services are only relevant in the context of the entity that references them, it is therefore forbidden to + * add a secondary service declaration that is not referenced by another service later in the Attribute Table. + * + * @mscs + * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} + * @endmscs + * + * @param[in] type Toggles between primary and secondary services, see @ref BLE_GATTS_SRVC_TYPES. + * @param[in] p_uuid Pointer to service UUID. + * @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored. + * + * @retval ::NRF_SUCCESS Successfully added a service declaration. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, Vendor Specific UUIDs need to be present in the table. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + */ +SVCALL(SD_BLE_GATTS_SERVICE_ADD, uint32_t, sd_ble_gatts_service_add(uint8_t type, ble_uuid_t const *p_uuid, uint16_t *p_handle)); + + +/**@brief Add an include declaration to the Attribute Table. + * + * @note It is currently only possible to add an include declaration to the last added service (i.e. only sequential population is supported at this time). + * + * @note The included service must already be present in the Attribute Table prior to this call. + * + * @mscs + * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} + * @endmscs + * + * @param[in] service_handle Handle of the service where the included service is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. + * @param[in] inc_srvc_handle Handle of the included service. + * @param[out] p_include_handle Pointer to a 16-bit word where the assigned handle will be stored. + * + * @retval ::NRF_SUCCESS Successfully added an include declaration. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, handle values need to match previously added services. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. + * @retval ::NRF_ERROR_NOT_SUPPORTED Feature is not supported, service_handle must be that of the last added service. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, self inclusions are not allowed. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. + */ +SVCALL(SD_BLE_GATTS_INCLUDE_ADD, uint32_t, sd_ble_gatts_include_add(uint16_t service_handle, uint16_t inc_srvc_handle, uint16_t *p_include_handle)); + + +/**@brief Add a characteristic declaration, a characteristic value declaration and optional characteristic descriptor declarations to the Attribute Table. + * + * @note It is currently only possible to add a characteristic to the last added service (i.e. only sequential population is supported at this time). + * + * @note Several restrictions apply to the parameters, such as matching permissions between the user description descriptor and the writable auxiliaries bits, + * readable (no security) and writable (selectable) CCCDs and SCCDs and valid presentation format values. + * + * @note If no metadata is provided for the optional descriptors, their permissions will be derived from the characteristic permissions. + * + * @mscs + * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} + * @endmscs + * + * @param[in] service_handle Handle of the service where the characteristic is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. + * @param[in] p_char_md Characteristic metadata. + * @param[in] p_attr_char_value Pointer to the attribute structure corresponding to the characteristic value. + * @param[out] p_handles Pointer to the structure where the assigned handles will be stored. + * + * @retval ::NRF_SUCCESS Successfully added a characteristic. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, service handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a service context is required. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. + */ +SVCALL(SD_BLE_GATTS_CHARACTERISTIC_ADD, uint32_t, sd_ble_gatts_characteristic_add(uint16_t service_handle, ble_gatts_char_md_t const *p_char_md, ble_gatts_attr_t const *p_attr_char_value, ble_gatts_char_handles_t *p_handles)); + + +/**@brief Add a descriptor to the Attribute Table. + * + * @note It is currently only possible to add a descriptor to the last added characteristic (i.e. only sequential population is supported at this time). + * + * @mscs + * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} + * @endmscs + * + * @param[in] char_handle Handle of the characteristic where the descriptor is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. + * @param[in] p_attr Pointer to the attribute structure. + * @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored. + * + * @retval ::NRF_SUCCESS Successfully added a descriptor. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, characteristic handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints. + * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a characteristic context is required. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. + */ +SVCALL(SD_BLE_GATTS_DESCRIPTOR_ADD, uint32_t, sd_ble_gatts_descriptor_add(uint16_t char_handle, ble_gatts_attr_t const *p_attr, uint16_t *p_handle)); + +/**@brief Set the value of a given attribute. + * + * @note Values other than system attributes can be set at any time, regardless of whether any active connections exist. + * + * @mscs + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. Ignored if the value does not belong to a system attribute. + * @param[in] handle Attribute handle. + * @param[in,out] p_value Attribute value information. + * + * @retval ::NRF_SUCCESS Successfully set the value of the attribute. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. + * @retval ::NRF_ERROR_FORBIDDEN Forbidden handle supplied, certain attributes are not modifiable by the application. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied on a system attribute. + */ +SVCALL(SD_BLE_GATTS_VALUE_SET, uint32_t, sd_ble_gatts_value_set(uint16_t conn_handle, uint16_t handle, ble_gatts_value_t *p_value)); + +/**@brief Get the value of a given attribute. + * + * @note If the attribute value is longer than the size of the supplied buffer, + * @ref ble_gatts_value_t::len will return the total attribute value length (excluding offset), + * and not the number of bytes actually returned in @ref ble_gatts_value_t::p_value. + * The application may use this information to allocate a suitable buffer size. + * + * @note When retrieving system attribute values with this function, the connection handle + * may refer to an already disconnected connection. Refer to the documentation of + * @ref sd_ble_gatts_sys_attr_get for further information. + * + * @param[in] conn_handle Connection handle. Ignored if the value does not belong to a system attribute. + * @param[in] handle Attribute handle. + * @param[in,out] p_value Attribute value information. + * + * @retval ::NRF_SUCCESS Successfully retrieved the value of the attribute. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid attribute offset supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied on a system attribute. + * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. + */ +SVCALL(SD_BLE_GATTS_VALUE_GET, uint32_t, sd_ble_gatts_value_get(uint16_t conn_handle, uint16_t handle, ble_gatts_value_t *p_value)); + +/**@brief Notify or Indicate an attribute value. + * + * @details This function checks for the relevant Client Characteristic Configuration descriptor value to verify that the relevant operation + * (notification or indication) has been enabled by the client. It is also able to update the attribute value before issuing the PDU, so that + * the application can atomically perform a value update and a server initiated transaction with a single API call. + * + * @note The local attribute value may be updated even if an outgoing packet is not sent to the peer due to an error during execution. + * The Attribute Table has been updated if one of the following error codes is returned: @ref NRF_ERROR_INVALID_STATE, @ref NRF_ERROR_BUSY, + * @ref NRF_ERROR_FORBIDDEN, @ref BLE_ERROR_GATTS_SYS_ATTR_MISSING and @ref NRF_ERROR_RESOURCES. + * The caller can check whether the value has been updated by looking at the contents of *(@ref ble_gatts_hvx_params_t::p_len). + * + * @note Only one indication procedure can be ongoing per connection at a time. + * If the application tries to indicate an attribute value while another indication procedure is ongoing, + * the function call will return @ref NRF_ERROR_BUSY. + * A @ref BLE_GATTS_EVT_HVC event will be issued as soon as the confirmation arrives from the peer. + * + * @note The number of Handle Value Notifications that can be queued is configured by @ref ble_gatts_conn_cfg_t::hvn_tx_queue_size + * When the queue is full, the function call will return @ref NRF_ERROR_RESOURCES. + * A @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event will be issued as soon as the transmission of the notification is complete. + * + * @note The application can keep track of the available queue element count for notifications by following the procedure below: + * - Store initial queue element count in a variable. + * - Decrement the variable, which stores the currently available queue element count, by one when a call to this function returns @ref NRF_SUCCESS. + * - Increment the variable, which stores the current available queue element count, by the count variable in @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event. + * + * @events + * @event{@ref BLE_GATTS_EVT_HVN_TX_COMPLETE, Notification transmission complete.} + * @event{@ref BLE_GATTS_EVT_HVC, Confirmation received from the peer.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC} + * @mmsc{@ref BLE_GATTS_HVN_MSC} + * @mmsc{@ref BLE_GATTS_HVI_MSC} + * @mmsc{@ref BLE_GATTS_HVX_DISABLED_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in,out] p_hvx_params Pointer to an HVx parameters structure. If @ref ble_gatts_hvx_params_t::p_data + * contains a non-NULL pointer the attribute value will be updated with the contents + * pointed by it before sending the notification or indication. If the attribute value + * is updated, @ref ble_gatts_hvx_params_t::p_len is updated by the SoftDevice to + * contain the number of actual bytes written, else it will be set to 0. + * + * @retval ::NRF_SUCCESS Successfully queued a notification or indication for transmission, and optionally updated the attribute value. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE One or more of the following is true: + * - Invalid Connection State + * - Notifications and/or indications not enabled in the CCCD + * - An ATT_MTU exchange is ongoing + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied. Only attributes added directly by the application are available to notify and indicate. + * @retval ::BLE_ERROR_GATTS_INVALID_ATTR_TYPE Invalid attribute type(s) supplied, only characteristic values may be notified and indicated. + * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. + * @retval ::NRF_ERROR_FORBIDDEN The connection's current security level is lower than the one required by the write permissions of the CCCD associated with this characteristic. + * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. + * @retval ::NRF_ERROR_BUSY For @ref BLE_GATT_HVX_INDICATION Procedure already in progress. Wait for a @ref BLE_GATTS_EVT_HVC event and retry. + * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. + * @retval ::NRF_ERROR_RESOURCES Too many notifications queued. + * Wait for a @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event and retry. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTS_HVX, uint32_t, sd_ble_gatts_hvx(uint16_t conn_handle, ble_gatts_hvx_params_t const *p_hvx_params)); + +/**@brief Indicate the Service Changed attribute value. + * + * @details This call will send a Handle Value Indication to one or more peers connected to inform them that the Attribute + * Table layout has changed. As soon as the peer has confirmed the indication, a @ref BLE_GATTS_EVT_SC_CONFIRM event will + * be issued. + * + * @note Some of the restrictions and limitations that apply to @ref sd_ble_gatts_hvx also apply here. + * + * @events + * @event{@ref BLE_GATTS_EVT_SC_CONFIRM, Confirmation of attribute table change received from peer.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_GATTS_SC_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] start_handle Start of affected attribute handle range. + * @param[in] end_handle End of affected attribute handle range. + * + * @retval ::NRF_SUCCESS Successfully queued the Service Changed indication for transmission. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_NOT_SUPPORTED Service Changed not enabled at initialization. See @ref + * sd_ble_cfg_set and @ref ble_gatts_cfg_service_changed_t. + * @retval ::NRF_ERROR_INVALID_STATE One or more of the following is true: + * - Invalid Connection State + * - Notifications and/or indications not enabled in the CCCD + * - An ATT_MTU exchange is ongoing + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied, handles must be in the range populated by the application. + * @retval ::NRF_ERROR_BUSY Procedure already in progress. + * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTS_SERVICE_CHANGED, uint32_t, sd_ble_gatts_service_changed(uint16_t conn_handle, uint16_t start_handle, uint16_t end_handle)); + +/**@brief Respond to a Read/Write authorization request. + * + * @note This call should only be used as a response to a @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST event issued to the application. + * + * @mscs + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} + * @mmsc{@ref BLE_GATTS_READ_REQ_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_WRITE_REQ_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_PEER_CANCEL_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_rw_authorize_reply_params Pointer to a structure with the attribute provided by the application. + * + * @note @ref ble_gatts_authorize_params_t::p_data is ignored when this function is used to respond + * to a @ref BLE_GATTS_AUTHORIZE_TYPE_READ event if @ref ble_gatts_authorize_params_t::update + * is set to 0. + * + * @retval ::NRF_SUCCESS Successfully queued a response to the peer, and in the case of a write operation, Attribute Table updated. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no authorization request pending. + * @retval ::NRF_ERROR_INVALID_PARAM Authorization op invalid, + * handle supplied does not match requested handle, + * or invalid data to be written provided by the application. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTS_RW_AUTHORIZE_REPLY, uint32_t, sd_ble_gatts_rw_authorize_reply(uint16_t conn_handle, ble_gatts_rw_authorize_reply_params_t const *p_rw_authorize_reply_params)); + + +/**@brief Update persistent system attribute information. + * + * @details Supply information about persistent system attributes to the stack, + * previously obtained using @ref sd_ble_gatts_sys_attr_get. + * This call is only allowed for active connections, and is usually + * made immediately after a connection is established with an known bonded device, + * often as a response to a @ref BLE_GATTS_EVT_SYS_ATTR_MISSING. + * + * p_sysattrs may point directly to the application's stored copy of the system attributes + * obtained using @ref sd_ble_gatts_sys_attr_get. + * If the pointer is NULL, the system attribute info is initialized, assuming that + * the application does not have any previously saved system attribute data for this device. + * + * @note The state of persistent system attributes is reset upon connection establishment and then remembered for its duration. + * + * @note If this call returns with an error code different from @ref NRF_SUCCESS, the storage of persistent system attributes may have been completed only partially. + * This means that the state of the attribute table is undefined, and the application should either provide a new set of attributes using this same call or + * reset the SoftDevice to return to a known state. + * + * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS is used with this function, only the system attributes included in system services will be modified. + * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS is used with this function, only the system attributes included in user services will be modified. + * + * @mscs + * @mmsc{@ref BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC} + * @mmsc{@ref BLE_GATTS_SYS_ATTRS_UNK_PEER_MSC} + * @mmsc{@ref BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle. + * @param[in] p_sys_attr_data Pointer to a saved copy of system attributes supplied to the stack, or NULL. + * @param[in] len Size of data pointed by p_sys_attr_data, in octets. + * @param[in] flags Optional additional flags, see @ref BLE_GATTS_SYS_ATTR_FLAGS + * + * @retval ::NRF_SUCCESS Successfully set the system attribute information. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid flags supplied. + * @retval ::NRF_ERROR_INVALID_DATA Invalid data supplied, the data should be exactly the same as retrieved with @ref sd_ble_gatts_sys_attr_get. + * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. + */ +SVCALL(SD_BLE_GATTS_SYS_ATTR_SET, uint32_t, sd_ble_gatts_sys_attr_set(uint16_t conn_handle, uint8_t const *p_sys_attr_data, uint16_t len, uint32_t flags)); + + +/**@brief Retrieve persistent system attribute information from the stack. + * + * @details This call is used to retrieve information about values to be stored persistently by the application + * during the lifetime of a connection or after it has been terminated. When a new connection is established with the same bonded device, + * the system attribute information retrieved with this function should be restored using using @ref sd_ble_gatts_sys_attr_set. + * If retrieved after disconnection, the data should be read before a new connection established. The connection handle for + * the previous, now disconnected, connection will remain valid until a new one is created to allow this API call to refer to it. + * Connection handles belonging to active connections can be used as well, but care should be taken since the system attributes + * may be written to at any time by the peer during a connection's lifetime. + * + * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS is used with this function, only the system attributes included in system services will be returned. + * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS is used with this function, only the system attributes included in user services will be returned. + * + * @mscs + * @mmsc{@ref BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC} + * @endmscs + * + * @param[in] conn_handle Connection handle of the recently terminated connection. + * @param[out] p_sys_attr_data Pointer to a buffer where updated information about system attributes will be filled in. The format of the data is described + * in @ref BLE_GATTS_SYS_ATTRS_FORMAT. NULL can be provided to obtain the length of the data. + * @param[in,out] p_len Size of application buffer if p_sys_attr_data is not NULL. Unconditionally updated to actual length of system attribute data. + * @param[in] flags Optional additional flags, see @ref BLE_GATTS_SYS_ATTR_FLAGS + * + * @retval ::NRF_SUCCESS Successfully retrieved the system attribute information. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid flags supplied. + * @retval ::NRF_ERROR_DATA_SIZE The system attribute information did not fit into the provided buffer. + * @retval ::NRF_ERROR_NOT_FOUND No system attributes found. + */ +SVCALL(SD_BLE_GATTS_SYS_ATTR_GET, uint32_t, sd_ble_gatts_sys_attr_get(uint16_t conn_handle, uint8_t *p_sys_attr_data, uint16_t *p_len, uint32_t flags)); + + +/**@brief Retrieve the first valid user attribute handle. + * + * @param[out] p_handle Pointer to an integer where the handle will be stored. + * + * @retval ::NRF_SUCCESS Successfully retrieved the handle. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + */ +SVCALL(SD_BLE_GATTS_INITIAL_USER_HANDLE_GET, uint32_t, sd_ble_gatts_initial_user_handle_get(uint16_t *p_handle)); + +/**@brief Retrieve the attribute UUID and/or metadata. + * + * @param[in] handle Attribute handle + * @param[out] p_uuid UUID of the attribute. Use NULL to omit this field. + * @param[out] p_md Metadata of the attribute. Use NULL to omit this field. + * + * @retval ::NRF_SUCCESS Successfully retrieved the attribute metadata, + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameters supplied. Returned when both @c p_uuid and @c p_md are NULL. + * @retval ::NRF_ERROR_NOT_FOUND Attribute was not found. + */ +SVCALL(SD_BLE_GATTS_ATTR_GET, uint32_t, sd_ble_gatts_attr_get(uint16_t handle, ble_uuid_t * p_uuid, ble_gatts_attr_md_t * p_md)); + +/**@brief Reply to an ATT_MTU exchange request by sending an Exchange MTU Response to the client. + * + * @details This function is only used to reply to a @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST event. + * + * @details The SoftDevice sets ATT_MTU to the minimum of: + * - The Client RX MTU value from @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST, and + * - The Server RX MTU value. + * + * However, the SoftDevice never sets ATT_MTU lower than @ref BLE_GATT_ATT_MTU_DEFAULT. + * + * @mscs + * @mmsc{@ref BLE_GATTS_MTU_EXCHANGE} + * @endmscs + * + * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. + * @param[in] server_rx_mtu Server RX MTU size. + * - The minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. + * - The maximum value is @ref ble_gatt_conn_cfg_t::att_mtu in the connection configuration + * used for this connection. + * - The value must be equal to Client RX MTU size given in @ref sd_ble_gattc_exchange_mtu_request + * if an ATT_MTU exchange has already been performed in the other direction. + * + * @retval ::NRF_SUCCESS Successfully sent response to the client. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no ATT_MTU exchange request pending. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid Server RX MTU size supplied. + * @retval ::NRF_ERROR_TIMEOUT There has been a GATT procedure timeout. No new GATT procedure can be performed without reestablishing the connection. + */ +SVCALL(SD_BLE_GATTS_EXCHANGE_MTU_REPLY, uint32_t, sd_ble_gatts_exchange_mtu_reply(uint16_t conn_handle, uint16_t server_rx_mtu)); +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // BLE_GATTS_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_hci.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_hci.h new file mode 100644 index 00000000000..f0dde9a03ad --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_hci.h @@ -0,0 +1,135 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON + @{ +*/ + + +#ifndef BLE_HCI_H__ +#define BLE_HCI_H__ +#ifdef __cplusplus +extern "C" { +#endif + +/** @defgroup BLE_HCI_STATUS_CODES Bluetooth status codes + * @{ */ + +#define BLE_HCI_STATUS_CODE_SUCCESS 0x00 /**< Success. */ +#define BLE_HCI_STATUS_CODE_UNKNOWN_BTLE_COMMAND 0x01 /**< Unknown BLE Command. */ +#define BLE_HCI_STATUS_CODE_UNKNOWN_CONNECTION_IDENTIFIER 0x02 /**< Unknown Connection Identifier. */ +/*0x03 Hardware Failure +0x04 Page Timeout +*/ +#define BLE_HCI_AUTHENTICATION_FAILURE 0x05 /**< Authentication Failure. */ +#define BLE_HCI_STATUS_CODE_PIN_OR_KEY_MISSING 0x06 /**< Pin or Key missing. */ +#define BLE_HCI_MEMORY_CAPACITY_EXCEEDED 0x07 /**< Memory Capacity Exceeded. */ +#define BLE_HCI_CONNECTION_TIMEOUT 0x08 /**< Connection Timeout. */ +/*0x09 Connection Limit Exceeded +0x0A Synchronous Connection Limit To A Device Exceeded +0x0B ACL Connection Already Exists*/ +#define BLE_HCI_STATUS_CODE_COMMAND_DISALLOWED 0x0C /**< Command Disallowed. */ +/*0x0D Connection Rejected due to Limited Resources +0x0E Connection Rejected Due To Security Reasons +0x0F Connection Rejected due to Unacceptable BD_ADDR +0x10 Connection Accept Timeout Exceeded +0x11 Unsupported Feature or Parameter Value*/ +#define BLE_HCI_STATUS_CODE_INVALID_BTLE_COMMAND_PARAMETERS 0x12 /**< Invalid BLE Command Parameters. */ +#define BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION 0x13 /**< Remote User Terminated Connection. */ +#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_LOW_RESOURCES 0x14 /**< Remote Device Terminated Connection due to low resources.*/ +#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_POWER_OFF 0x15 /**< Remote Device Terminated Connection due to power off. */ +#define BLE_HCI_LOCAL_HOST_TERMINATED_CONNECTION 0x16 /**< Local Host Terminated Connection. */ +/* +0x17 Repeated Attempts +0x18 Pairing Not Allowed +0x19 Unknown LMP PDU +*/ +#define BLE_HCI_UNSUPPORTED_REMOTE_FEATURE 0x1A /**< Unsupported Remote Feature. */ +/* +0x1B SCO Offset Rejected +0x1C SCO Interval Rejected +0x1D SCO Air Mode Rejected*/ +#define BLE_HCI_STATUS_CODE_INVALID_LMP_PARAMETERS 0x1E /**< Invalid LMP Parameters. */ +#define BLE_HCI_STATUS_CODE_UNSPECIFIED_ERROR 0x1F /**< Unspecified Error. */ +/*0x20 Unsupported LMP Parameter Value +0x21 Role Change Not Allowed +*/ +#define BLE_HCI_STATUS_CODE_LMP_RESPONSE_TIMEOUT 0x22 /**< LMP Response Timeout. */ +#define BLE_HCI_STATUS_CODE_LMP_ERROR_TRANSACTION_COLLISION 0x23 /**< LMP Error Transaction Collision/LL Procedure Collision. */ +#define BLE_HCI_STATUS_CODE_LMP_PDU_NOT_ALLOWED 0x24 /**< LMP PDU Not Allowed. */ +/*0x25 Encryption Mode Not Acceptable +0x26 Link Key Can Not be Changed +0x27 Requested QoS Not Supported +*/ +#define BLE_HCI_INSTANT_PASSED 0x28 /**< Instant Passed. */ +#define BLE_HCI_PAIRING_WITH_UNIT_KEY_UNSUPPORTED 0x29 /**< Pairing with Unit Key Unsupported. */ +#define BLE_HCI_DIFFERENT_TRANSACTION_COLLISION 0x2A /**< Different Transaction Collision. */ +/* +0x2B Reserved +0x2C QoS Unacceptable Parameter +0x2D QoS Rejected +0x2E Channel Classification Not Supported +0x2F Insufficient Security +*/ +#define BLE_HCI_PARAMETER_OUT_OF_MANDATORY_RANGE 0x30 /**< Parameter Out Of Mandatory Range. */ +/* +0x31 Reserved +0x32 Role Switch Pending +0x33 Reserved +0x34 Reserved Slot Violation +0x35 Role Switch Failed +0x36 Extended Inquiry Response Too Large +0x37 Secure Simple Pairing Not Supported By Host. +0x38 Host Busy - Pairing +0x39 Connection Rejected due to No Suitable Channel Found*/ +#define BLE_HCI_CONTROLLER_BUSY 0x3A /**< Controller Busy. */ +#define BLE_HCI_CONN_INTERVAL_UNACCEPTABLE 0x3B /**< Connection Interval Unacceptable. */ +#define BLE_HCI_DIRECTED_ADVERTISER_TIMEOUT 0x3C /**< Directed Advertisement Timeout. */ +#define BLE_HCI_CONN_TERMINATED_DUE_TO_MIC_FAILURE 0x3D /**< Connection Terminated due to MIC Failure. */ +#define BLE_HCI_CONN_FAILED_TO_BE_ESTABLISHED 0x3E /**< Connection Failed to be Established. */ + +/** @} */ + + +#ifdef __cplusplus +} +#endif +#endif // BLE_HCI_H__ + +/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_l2cap.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_l2cap.h new file mode 100644 index 00000000000..eaeb4b7d281 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_l2cap.h @@ -0,0 +1,506 @@ +/* + * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_L2CAP Logical Link Control and Adaptation Protocol (L2CAP) + @{ + @brief Definitions and prototypes for the L2CAP interface. + */ + +#ifndef BLE_L2CAP_H__ +#define BLE_L2CAP_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_ranges.h" +#include "ble_types.h" +#include "ble_err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@addtogroup BLE_L2CAP_TERMINOLOGY Terminology + * @{ + * @details + * + * L2CAP SDU + * - A data unit that the application can send/receive to/from a peer. + * + * L2CAP PDU + * - A data unit that is exchanged between local and remote L2CAP entities. + * It consists of L2CAP protocol control information and payload fields. + * The payload field can contain an L2CAP SDU or a part of an L2CAP SDU. + * + * L2CAP MTU + * - The maximum length of an L2CAP SDU. + * + * L2CAP MPS + * - The maximum length of an L2CAP PDU payload field. + * + * Credits + * - A value indicating the number of L2CAP PDUs that the receiver of the credit can send to the peer. + * @} */ + +/**@addtogroup BLE_L2CAP_ENUMERATIONS Enumerations + * @{ */ + +/**@brief L2CAP API SVC numbers. */ +enum BLE_L2CAP_SVCS +{ + SD_BLE_L2CAP_CH_SETUP = BLE_L2CAP_SVC_BASE + 0, /**< Set up an L2CAP channel. */ + SD_BLE_L2CAP_CH_RELEASE = BLE_L2CAP_SVC_BASE + 1, /**< Release an L2CAP channel. */ + SD_BLE_L2CAP_CH_RX = BLE_L2CAP_SVC_BASE + 2, /**< Receive an SDU on an L2CAP channel. */ + SD_BLE_L2CAP_CH_TX = BLE_L2CAP_SVC_BASE + 3, /**< Transmit an SDU on an L2CAP channel. */ + SD_BLE_L2CAP_CH_FLOW_CONTROL = BLE_L2CAP_SVC_BASE + 4, /**< Advanced SDU reception flow control. */ +}; + +/**@brief L2CAP Event IDs. */ +enum BLE_L2CAP_EVTS +{ + BLE_L2CAP_EVT_CH_SETUP_REQUEST = BLE_L2CAP_EVT_BASE + 0, /**< L2CAP Channel Setup Request event. + \n See @ref ble_l2cap_evt_ch_setup_request_t. */ + BLE_L2CAP_EVT_CH_SETUP_REFUSED = BLE_L2CAP_EVT_BASE + 1, /**< L2CAP Channel Setup Refused event. + \n See @ref ble_l2cap_evt_ch_setup_refused_t. */ + BLE_L2CAP_EVT_CH_SETUP = BLE_L2CAP_EVT_BASE + 2, /**< L2CAP Channel Setup Completed event. + \n See @ref ble_l2cap_evt_ch_setup_t. */ + BLE_L2CAP_EVT_CH_RELEASED = BLE_L2CAP_EVT_BASE + 3, /**< L2CAP Channel Released event. + \n No additional event structure applies. */ + BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED = BLE_L2CAP_EVT_BASE + 4, /**< L2CAP Channel SDU data buffer released event. + \n See @ref ble_l2cap_evt_ch_sdu_buf_released_t. */ + BLE_L2CAP_EVT_CH_CREDIT = BLE_L2CAP_EVT_BASE + 5, /**< L2CAP Channel Credit received. + \n See @ref ble_l2cap_evt_ch_credit_t. */ + BLE_L2CAP_EVT_CH_RX = BLE_L2CAP_EVT_BASE + 6, /**< L2CAP Channel SDU received. + \n See @ref ble_l2cap_evt_ch_rx_t. */ + BLE_L2CAP_EVT_CH_TX = BLE_L2CAP_EVT_BASE + 7, /**< L2CAP Channel SDU transmitted. + \n See @ref ble_l2cap_evt_ch_tx_t. */ +}; + +/** @} */ + +/**@addtogroup BLE_L2CAP_DEFINES Defines + * @{ */ + +/**@brief Maximum number of L2CAP channels per connection. */ +#define BLE_L2CAP_CH_COUNT_MAX (64) + +/**@brief Minimum L2CAP MTU, in bytes. */ +#define BLE_L2CAP_MTU_MIN (23) + +/**@brief Minimum L2CAP MPS, in bytes. */ +#define BLE_L2CAP_MPS_MIN (23) + +/**@brief Invalid CID. */ +#define BLE_L2CAP_CID_INVALID (0x0000) + +/**@brief Default number of credits for @ref sd_ble_l2cap_ch_flow_control. */ +#define BLE_L2CAP_CREDITS_DEFAULT (1) + +/**@defgroup BLE_L2CAP_CH_SETUP_REFUSED_SRCS L2CAP channel setup refused sources + * @{ */ +#define BLE_L2CAP_CH_SETUP_REFUSED_SRC_LOCAL (0x01) /**< Local. */ +#define BLE_L2CAP_CH_SETUP_REFUSED_SRC_REMOTE (0x02) /**< Remote. */ + /** @} */ + + /** @defgroup BLE_L2CAP_CH_STATUS_CODES L2CAP channel status codes + * @{ */ +#define BLE_L2CAP_CH_STATUS_CODE_SUCCESS (0x0000) /**< Success. */ +#define BLE_L2CAP_CH_STATUS_CODE_LE_PSM_NOT_SUPPORTED (0x0002) /**< LE_PSM not supported. */ +#define BLE_L2CAP_CH_STATUS_CODE_NO_RESOURCES (0x0004) /**< No resources available. */ +#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_AUTHENTICATION (0x0005) /**< Insufficient authentication. */ +#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_AUTHORIZATION (0x0006) /**< Insufficient authorization. */ +#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_ENC_KEY_SIZE (0x0007) /**< Insufficient encryption key size. */ +#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_ENC (0x0008) /**< Insufficient encryption. */ +#define BLE_L2CAP_CH_STATUS_CODE_INVALID_SCID (0x0009) /**< Invalid Source CID. */ +#define BLE_L2CAP_CH_STATUS_CODE_SCID_ALLOCATED (0x000A) /**< Source CID already allocated. */ +#define BLE_L2CAP_CH_STATUS_CODE_UNACCEPTABLE_PARAMS (0x000B) /**< Unacceptable parameters. */ +#define BLE_L2CAP_CH_STATUS_CODE_NOT_UNDERSTOOD (0x8000) /**< Command Reject received instead of LE Credit Based Connection Response. */ +#define BLE_L2CAP_CH_STATUS_CODE_TIMEOUT (0xC000) /**< Operation timed out. */ +/** @} */ + +/** @} */ + +/**@addtogroup BLE_L2CAP_STRUCTURES Structures + * @{ */ + +/** + * @brief BLE L2CAP connection configuration parameters, set with @ref sd_ble_cfg_set. + * + * @note These parameters are set per connection, so all L2CAP channels created on this connection + * will have the same parameters. + * + * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: + * - rx_mps is smaller than @ref BLE_L2CAP_MPS_MIN. + * - tx_mps is smaller than @ref BLE_L2CAP_MPS_MIN. + * - ch_count is greater than @ref BLE_L2CAP_CH_COUNT_MAX. + * @retval ::NRF_ERROR_NO_MEM rx_mps or tx_mps is set too high. + */ +typedef struct +{ + uint16_t rx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP shall + be able to receive on L2CAP channels on connections with this + configuration. The minimum value is @ref BLE_L2CAP_MPS_MIN. */ + uint16_t tx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP shall + be able to transmit on L2CAP channels on connections with this + configuration. The minimum value is @ref BLE_L2CAP_MPS_MIN. */ + uint8_t rx_queue_size; /**< Number of SDU data buffers that can be queued for reception per + L2CAP channel. The minimum value is one. */ + uint8_t tx_queue_size; /**< Number of SDU data buffers that can be queued for transmission + per L2CAP channel. The minimum value is one. */ + uint8_t ch_count; /**< Number of L2CAP channels the application can create per connection + with this configuration. The default value is zero, the maximum + value is @ref BLE_L2CAP_CH_COUNT_MAX. + @note if this parameter is set to zero, all other parameters in + @ref ble_l2cap_conn_cfg_t are ignored. */ +} ble_l2cap_conn_cfg_t; + +/**@brief L2CAP channel RX parameters. */ +typedef struct +{ + uint16_t rx_mtu; /**< The maximum L2CAP SDU size, in bytes, that L2CAP shall be able to + receive on this L2CAP channel. + - Must be equal to or greater than @ref BLE_L2CAP_MTU_MIN. */ + uint16_t rx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP shall be + able to receive on this L2CAP channel. + - Must be equal to or greater than @ref BLE_L2CAP_MPS_MIN. + - Must be equal to or less than @ref ble_l2cap_conn_cfg_t::rx_mps. */ + ble_data_t sdu_buf; /**< SDU data buffer for reception. + - If @ref ble_data_t::p_data is non-NULL, initial credits are + issued to the peer. + - If @ref ble_data_t::p_data is NULL, no initial credits are + issued to the peer. */ +} ble_l2cap_ch_rx_params_t; + +/**@brief L2CAP channel setup parameters. */ +typedef struct +{ + ble_l2cap_ch_rx_params_t rx_params; /**< L2CAP channel RX parameters. */ + uint16_t le_psm; /**< LE Protocol/Service Multiplexer. Used when requesting + setup of an L2CAP channel, ignored otherwise. */ + uint16_t status; /**< Status code, see @ref BLE_L2CAP_CH_STATUS_CODES. + Used when replying to a setup request of an L2CAP + channel, ignored otherwise. */ +} ble_l2cap_ch_setup_params_t; + +/**@brief L2CAP channel TX parameters. */ +typedef struct +{ + uint16_t tx_mtu; /**< The maximum L2CAP SDU size, in bytes, that L2CAP is able to + transmit on this L2CAP channel. */ + uint16_t peer_mps; /**< The maximum L2CAP PDU payload size, in bytes, that the peer is + able to receive on this L2CAP channel. */ + uint16_t tx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP is able + to transmit on this L2CAP channel. This is effective tx_mps, + selected by the SoftDevice as + MIN( @ref ble_l2cap_ch_tx_params_t::peer_mps, @ref ble_l2cap_conn_cfg_t::tx_mps ) */ + uint16_t credits; /**< Initial credits given by the peer. */ +} ble_l2cap_ch_tx_params_t; + +/**@brief L2CAP Channel Setup Request event. */ +typedef struct +{ + ble_l2cap_ch_tx_params_t tx_params; /**< L2CAP channel TX parameters. */ + uint16_t le_psm; /**< LE Protocol/Service Multiplexer. */ +} ble_l2cap_evt_ch_setup_request_t; + +/**@brief L2CAP Channel Setup Refused event. */ +typedef struct +{ + uint8_t source; /**< Source, see @ref BLE_L2CAP_CH_SETUP_REFUSED_SRCS */ + uint16_t status; /**< Status code, see @ref BLE_L2CAP_CH_STATUS_CODES */ +} ble_l2cap_evt_ch_setup_refused_t; + +/**@brief L2CAP Channel Setup Completed event. */ +typedef struct +{ + ble_l2cap_ch_tx_params_t tx_params; /**< L2CAP channel TX parameters. */ +} ble_l2cap_evt_ch_setup_t; + +/**@brief L2CAP Channel SDU Data Duffer Released event. */ +typedef struct +{ + ble_data_t sdu_buf; /**< Returned reception or transmission SDU data buffer. The SoftDevice + returns SDU data buffers supplied by the application, which have + not yet been returned previously via a @ref BLE_L2CAP_EVT_CH_RX or + @ref BLE_L2CAP_EVT_CH_TX event. */ +} ble_l2cap_evt_ch_sdu_buf_released_t; + +/**@brief L2CAP Channel Credit received event. */ +typedef struct +{ + uint16_t credits; /**< Additional credits given by the peer. */ +} ble_l2cap_evt_ch_credit_t; + +/**@brief L2CAP Channel received SDU event. */ +typedef struct +{ + uint16_t sdu_len; /**< Total SDU length, in bytes. */ + ble_data_t sdu_buf; /**< SDU data buffer. + @note If there is not enough space in the buffer + (sdu_buf.len < sdu_len) then the rest of the SDU will be + silently discarded by the SoftDevice. */ +} ble_l2cap_evt_ch_rx_t; + +/**@brief L2CAP Channel transmitted SDU event. */ +typedef struct +{ + ble_data_t sdu_buf; /**< SDU data buffer. */ +} ble_l2cap_evt_ch_tx_t; + +/**@brief L2CAP event structure. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which the event occured. */ + uint16_t local_cid; /**< Local Channel ID of the L2CAP channel, or + @ref BLE_L2CAP_CID_INVALID if not present. */ + union + { + ble_l2cap_evt_ch_setup_request_t ch_setup_request; /**< L2CAP Channel Setup Request Event Parameters. */ + ble_l2cap_evt_ch_setup_refused_t ch_setup_refused; /**< L2CAP Channel Setup Refused Event Parameters. */ + ble_l2cap_evt_ch_setup_t ch_setup; /**< L2CAP Channel Setup Completed Event Parameters. */ + ble_l2cap_evt_ch_sdu_buf_released_t ch_sdu_buf_released;/**< L2CAP Channel SDU Data Buffer Released Event Parameters. */ + ble_l2cap_evt_ch_credit_t credit; /**< L2CAP Channel Credit Received Event Parameters. */ + ble_l2cap_evt_ch_rx_t rx; /**< L2CAP Channel SDU Received Event Parameters. */ + ble_l2cap_evt_ch_tx_t tx; /**< L2CAP Channel SDU Transmitted Event Parameters. */ + } params; /**< Event Parameters. */ +} ble_l2cap_evt_t; + +/** @} */ + +/**@addtogroup BLE_L2CAP_FUNCTIONS Functions + * @{ */ + +/**@brief Set up an L2CAP channel. + * + * @details This function is used to: + * - Request setup of an L2CAP channel: sends an LE Credit Based Connection Request packet to a peer. + * - Reply to a setup request of an L2CAP channel (if called in response to a + * @ref BLE_L2CAP_EVT_CH_SETUP_REQUEST event): sends an LE Credit Based Connection + * Response packet to a peer. + * + * @note A call to this function will require the application to keep the SDU data buffer alive + * until the SDU data buffer is returned in @ref BLE_L2CAP_EVT_CH_RX or + * @ref BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED event. + * + * @events + * @event{@ref BLE_L2CAP_EVT_CH_SETUP, Setup successful.} + * @event{@ref BLE_L2CAP_EVT_CH_SETUP_REFUSED, Setup failed.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_SETUP_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in,out] p_local_cid Pointer to a uint16_t containing Local Channel ID of the L2CAP channel: + * - As input: @ref BLE_L2CAP_CID_INVALID when requesting setup of an L2CAP + * channel or local_cid provided in the @ref BLE_L2CAP_EVT_CH_SETUP_REQUEST + * event when replying to a setup request of an L2CAP channel. + * - As output: local_cid for this channel. + * @param[in] p_params L2CAP channel parameters. + * + * @retval ::NRF_SUCCESS Successfully queued request or response for transmission. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. + * @retval ::NRF_ERROR_INVALID_LENGTH Supplied higher rx_mps than has been configured on this link. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (L2CAP channel already set up). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + * @retval ::NRF_ERROR_RESOURCES The limit has been reached for available L2CAP channels, + * see @ref ble_l2cap_conn_cfg_t::ch_count. + */ +SVCALL(SD_BLE_L2CAP_CH_SETUP, uint32_t, sd_ble_l2cap_ch_setup(uint16_t conn_handle, uint16_t *p_local_cid, ble_l2cap_ch_setup_params_t const *p_params)); + +/**@brief Release an L2CAP channel. + * + * @details This sends a Disconnection Request packet to a peer. + * + * @events + * @event{@ref BLE_L2CAP_EVT_CH_RELEASED, Release complete.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_RELEASE_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in] local_cid Local Channel ID of the L2CAP channel. + * + * @retval ::NRF_SUCCESS Successfully queued request for transmission. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is + * in progress for the L2CAP channel). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + */ +SVCALL(SD_BLE_L2CAP_CH_RELEASE, uint32_t, sd_ble_l2cap_ch_release(uint16_t conn_handle, uint16_t local_cid)); + +/**@brief Receive an SDU on an L2CAP channel. + * + * @details This may issue additional credits to the peer using an LE Flow Control Credit packet. + * + * @note A call to this function will require the application to keep the memory pointed by + * @ref ble_data_t::p_data alive until the SDU data buffer is returned in @ref BLE_L2CAP_EVT_CH_RX + * or @ref BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED event. + * + * @note The SoftDevice can queue up to @ref ble_l2cap_conn_cfg_t::rx_queue_size SDU data buffers + * for reception per L2CAP channel. + * + * @events + * @event{@ref BLE_L2CAP_EVT_CH_RX, The SDU is received.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_RX_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in] local_cid Local Channel ID of the L2CAP channel. + * @param[in] p_sdu_buf Pointer to the SDU data buffer. + * + * @retval ::NRF_SUCCESS Buffer accepted. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is + * in progress for an L2CAP channel). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + * @retval ::NRF_ERROR_RESOURCES Too many SDU data buffers supplied. Wait for a + * @ref BLE_L2CAP_EVT_CH_RX event and retry. + */ +SVCALL(SD_BLE_L2CAP_CH_RX, uint32_t, sd_ble_l2cap_ch_rx(uint16_t conn_handle, uint16_t local_cid, ble_data_t const *p_sdu_buf)); + +/**@brief Transmit an SDU on an L2CAP channel. + * + * @note A call to this function will require the application to keep the memory pointed by + * @ref ble_data_t::p_data alive until the SDU data buffer is returned in @ref BLE_L2CAP_EVT_CH_TX + * or @ref BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED event. + * + * @note The SoftDevice can queue up to @ref ble_l2cap_conn_cfg_t::tx_queue_size SDUs for + * transmission per L2CAP channel. + * + * @note The application can keep track of the available credits for transmission by following + * the procedure below: + * - Store initial credits given by the peer in a variable. + * (Initial credits are provided in a @ref BLE_L2CAP_EVT_CH_SETUP event.) + * - Decrement the variable, which stores the currently available credits, by + * ceiling((@ref ble_data_t::len + 2) / tx_mps) when a call to this function returns + * @ref NRF_SUCCESS. (tx_mps is provided in a @ref BLE_L2CAP_EVT_CH_SETUP event.) + * - Increment the variable, which stores the currently available credits, by additional + * credits given by the peer in a @ref BLE_L2CAP_EVT_CH_CREDIT event. + * + * @events + * @event{@ref BLE_L2CAP_EVT_CH_TX, The SDU is transmitted.} + * @endevents + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_TX_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in] local_cid Local Channel ID of the L2CAP channel. + * @param[in] p_sdu_buf Pointer to the SDU data buffer. + * + * @retval ::NRF_SUCCESS Successfully queued L2CAP SDU for transmission. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is + * in progress for the L2CAP channel). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + * @retval ::NRF_ERROR_DATA_SIZE Invalid SDU length supplied, must not be more than + * @ref ble_l2cap_ch_tx_params_t::tx_mtu provided in + * @ref BLE_L2CAP_EVT_CH_SETUP event. + * @retval ::NRF_ERROR_RESOURCES Too many SDUs queued for transmission. Wait for a + * @ref BLE_L2CAP_EVT_CH_TX event and retry. + */ +SVCALL(SD_BLE_L2CAP_CH_TX, uint32_t, sd_ble_l2cap_ch_tx(uint16_t conn_handle, uint16_t local_cid, ble_data_t const *p_sdu_buf)); + +/**@brief Advanced SDU reception flow control. + * + * @details Adjust the way the SoftDevice issues credits to the peer. + * This may issue additional credits to the peer using an LE Flow Control Credit packet. + * + * @mscs + * @mmsc{@ref BLE_L2CAP_CH_FLOW_CONTROL_MSC} + * @endmscs + * + * @param[in] conn_handle Connection Handle. + * @param[in] local_cid Local Channel ID of the L2CAP channel or @ref BLE_L2CAP_CID_INVALID to set + * the value that will be used for newly created channels. + * @param[in] credits Number of credits that the SoftDevice will make sure the peer has every + * time it starts using a new reception buffer. + * - @ref BLE_L2CAP_CREDITS_DEFAULT is the default value the SoftDevice will + * use if this function is not called. + * - If set to zero, the SoftDevice will stop issuing credits for new reception + * buffers the application provides or has provided. SDU reception that is + * currently ongoing will be allowed to complete. + * @param[out] p_credits NULL or pointer to a uint16_t. If a valid pointer is provided, it will be + * written by the SoftDevice with the number of credits that is or will be + * available to the peer. If the value written by the SoftDevice is 0 when + * credits parameter was set to 0, the peer will not be able to send more + * data until more credits are provided by calling this function again with + * credits > 0. This parameter is ignored when local_cid is set to + * @ref BLE_L2CAP_CID_INVALID. + * + * @note Application should take care when setting number of credits higher than default value. In + * this case the application must make sure that the SoftDevice always has reception buffers + * available (see @ref sd_ble_l2cap_ch_rx) for that channel. If the SoftDevice does not have + * such buffers available, packets may be NACKed on the Link Layer and all Bluetooth traffic + * on the connection handle may be stalled until the SoftDevice again has an available + * reception buffer. This applies even if the application has used this call to set the + * credits back to default, or zero. + * + * @retval ::NRF_SUCCESS Flow control parameters accepted. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is + * in progress for an L2CAP channel). + * @retval ::NRF_ERROR_NOT_FOUND CID not found. + */ +SVCALL(SD_BLE_L2CAP_CH_FLOW_CONTROL, uint32_t, sd_ble_l2cap_ch_flow_control(uint16_t conn_handle, uint16_t local_cid, uint16_t credits, uint16_t *p_credits)); + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // BLE_L2CAP_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_ranges.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_ranges.h new file mode 100644 index 00000000000..0935bca0710 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_ranges.h @@ -0,0 +1,156 @@ +/* + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON + @{ + @defgroup ble_ranges Module specific SVC, event and option number subranges + @{ + + @brief Definition of SVC, event and option number subranges for each API module. + + @note + SVCs, event and option numbers are split into subranges for each API module. + Each module receives its entire allocated range of SVC calls, whether implemented or not, + but return BLE_ERROR_NOT_SUPPORTED for unimplemented or undefined calls in its range. + + Note that the symbols BLE__SVC_LAST is the end of the allocated SVC range, + rather than the last SVC function call actually defined and implemented. + + Specific SVC, event and option values are defined in each module's ble_.h file, + which defines names of each individual SVC code based on the range start value. +*/ + +#ifndef BLE_RANGES_H__ +#define BLE_RANGES_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#define BLE_SVC_BASE 0x60 /**< Common BLE SVC base. */ +#define BLE_SVC_LAST 0x6B /**< Common BLE SVC last. */ + +#define BLE_GAP_SVC_BASE 0x6C /**< GAP BLE SVC base. */ +#define BLE_GAP_SVC_LAST 0x9A /**< GAP BLE SVC last. */ + +#define BLE_GATTC_SVC_BASE 0x9B /**< GATTC BLE SVC base. */ +#define BLE_GATTC_SVC_LAST 0xA7 /**< GATTC BLE SVC last. */ + +#define BLE_GATTS_SVC_BASE 0xA8 /**< GATTS BLE SVC base. */ +#define BLE_GATTS_SVC_LAST 0xB7 /**< GATTS BLE SVC last. */ + +#define BLE_L2CAP_SVC_BASE 0xB8 /**< L2CAP BLE SVC base. */ +#define BLE_L2CAP_SVC_LAST 0xBF /**< L2CAP BLE SVC last. */ + + +#define BLE_EVT_INVALID 0x00 /**< Invalid BLE Event. */ + +#define BLE_EVT_BASE 0x01 /**< Common BLE Event base. */ +#define BLE_EVT_LAST 0x0F /**< Common BLE Event last. */ + +#define BLE_GAP_EVT_BASE 0x10 /**< GAP BLE Event base. */ +#define BLE_GAP_EVT_LAST 0x2F /**< GAP BLE Event last. */ + +#define BLE_GATTC_EVT_BASE 0x30 /**< GATTC BLE Event base. */ +#define BLE_GATTC_EVT_LAST 0x4F /**< GATTC BLE Event last. */ + +#define BLE_GATTS_EVT_BASE 0x50 /**< GATTS BLE Event base. */ +#define BLE_GATTS_EVT_LAST 0x6F /**< GATTS BLE Event last. */ + +#define BLE_L2CAP_EVT_BASE 0x70 /**< L2CAP BLE Event base. */ +#define BLE_L2CAP_EVT_LAST 0x8F /**< L2CAP BLE Event last. */ + + +#define BLE_OPT_INVALID 0x00 /**< Invalid BLE Option. */ + +#define BLE_OPT_BASE 0x01 /**< Common BLE Option base. */ +#define BLE_OPT_LAST 0x1F /**< Common BLE Option last. */ + +#define BLE_GAP_OPT_BASE 0x20 /**< GAP BLE Option base. */ +#define BLE_GAP_OPT_LAST 0x3F /**< GAP BLE Option last. */ + +#define BLE_GATT_OPT_BASE 0x40 /**< GATT BLE Option base. */ +#define BLE_GATT_OPT_LAST 0x5F /**< GATT BLE Option last. */ + +#define BLE_GATTC_OPT_BASE 0x60 /**< GATTC BLE Option base. */ +#define BLE_GATTC_OPT_LAST 0x7F /**< GATTC BLE Option last. */ + +#define BLE_GATTS_OPT_BASE 0x80 /**< GATTS BLE Option base. */ +#define BLE_GATTS_OPT_LAST 0x9F /**< GATTS BLE Option last. */ + +#define BLE_L2CAP_OPT_BASE 0xA0 /**< L2CAP BLE Option base. */ +#define BLE_L2CAP_OPT_LAST 0xBF /**< L2CAP BLE Option last. */ + + +#define BLE_CFG_INVALID 0x00 /**< Invalid BLE configuration. */ + +#define BLE_CFG_BASE 0x01 /**< Common BLE configuration base. */ +#define BLE_CFG_LAST 0x1F /**< Common BLE configuration last. */ + +#define BLE_CONN_CFG_BASE 0x20 /**< BLE connection configuration base. */ +#define BLE_CONN_CFG_LAST 0x3F /**< BLE connection configuration last. */ + +#define BLE_GAP_CFG_BASE 0x40 /**< GAP BLE configuration base. */ +#define BLE_GAP_CFG_LAST 0x5F /**< GAP BLE configuration last. */ + +#define BLE_GATT_CFG_BASE 0x60 /**< GATT BLE configuration base. */ +#define BLE_GATT_CFG_LAST 0x7F /**< GATT BLE configuration last. */ + +#define BLE_GATTC_CFG_BASE 0x80 /**< GATTC BLE configuration base. */ +#define BLE_GATTC_CFG_LAST 0x9F /**< GATTC BLE configuration last. */ + +#define BLE_GATTS_CFG_BASE 0xA0 /**< GATTS BLE configuration base. */ +#define BLE_GATTS_CFG_LAST 0xBF /**< GATTS BLE configuration last. */ + +#define BLE_L2CAP_CFG_BASE 0xC0 /**< L2CAP BLE configuration base. */ +#define BLE_L2CAP_CFG_LAST 0xDF /**< L2CAP BLE configuration last. */ + + + + + +#ifdef __cplusplus +} +#endif +#endif /* BLE_RANGES_H__ */ + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_types.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_types.h new file mode 100644 index 00000000000..88c93180c83 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/ble_types.h @@ -0,0 +1,215 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON + @{ + @defgroup ble_types Common types and macro definitions + @{ + + @brief Common types and macro definitions for the BLE SoftDevice. + */ + +#ifndef BLE_TYPES_H__ +#define BLE_TYPES_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_TYPES_DEFINES Defines + * @{ */ + +/** @defgroup BLE_CONN_HANDLES BLE Connection Handles + * @{ */ +#define BLE_CONN_HANDLE_INVALID 0xFFFF /**< Invalid Connection Handle. */ +#define BLE_CONN_HANDLE_ALL 0xFFFE /**< Applies to all Connection Handles. */ +/** @} */ + + +/** @defgroup BLE_UUID_VALUES Assigned Values for BLE UUIDs + * @{ */ +/* Generic UUIDs, applicable to all services */ +#define BLE_UUID_UNKNOWN 0x0000 /**< Reserved UUID. */ +#define BLE_UUID_SERVICE_PRIMARY 0x2800 /**< Primary Service. */ +#define BLE_UUID_SERVICE_SECONDARY 0x2801 /**< Secondary Service. */ +#define BLE_UUID_SERVICE_INCLUDE 0x2802 /**< Include. */ +#define BLE_UUID_CHARACTERISTIC 0x2803 /**< Characteristic. */ +#define BLE_UUID_DESCRIPTOR_CHAR_EXT_PROP 0x2900 /**< Characteristic Extended Properties Descriptor. */ +#define BLE_UUID_DESCRIPTOR_CHAR_USER_DESC 0x2901 /**< Characteristic User Description Descriptor. */ +#define BLE_UUID_DESCRIPTOR_CLIENT_CHAR_CONFIG 0x2902 /**< Client Characteristic Configuration Descriptor. */ +#define BLE_UUID_DESCRIPTOR_SERVER_CHAR_CONFIG 0x2903 /**< Server Characteristic Configuration Descriptor. */ +#define BLE_UUID_DESCRIPTOR_CHAR_PRESENTATION_FORMAT 0x2904 /**< Characteristic Presentation Format Descriptor. */ +#define BLE_UUID_DESCRIPTOR_CHAR_AGGREGATE_FORMAT 0x2905 /**< Characteristic Aggregate Format Descriptor. */ +/* GATT specific UUIDs */ +#define BLE_UUID_GATT 0x1801 /**< Generic Attribute Profile. */ +#define BLE_UUID_GATT_CHARACTERISTIC_SERVICE_CHANGED 0x2A05 /**< Service Changed Characteristic. */ +/* GAP specific UUIDs */ +#define BLE_UUID_GAP 0x1800 /**< Generic Access Profile. */ +#define BLE_UUID_GAP_CHARACTERISTIC_DEVICE_NAME 0x2A00 /**< Device Name Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_APPEARANCE 0x2A01 /**< Appearance Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_RECONN_ADDR 0x2A03 /**< Reconnection Address Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_PPCP 0x2A04 /**< Peripheral Preferred Connection Parameters Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_CAR 0x2AA6 /**< Central Address Resolution Characteristic. */ +#define BLE_UUID_GAP_CHARACTERISTIC_RPA_ONLY 0x2AC9 /**< Resolvable Private Address Only Characteristic. */ +/** @} */ + + +/** @defgroup BLE_UUID_TYPES Types of UUID + * @{ */ +#define BLE_UUID_TYPE_UNKNOWN 0x00 /**< Invalid UUID type. */ +#define BLE_UUID_TYPE_BLE 0x01 /**< Bluetooth SIG UUID (16-bit). */ +#define BLE_UUID_TYPE_VENDOR_BEGIN 0x02 /**< Vendor UUID types start at this index (128-bit). */ +/** @} */ + + +/** @defgroup BLE_APPEARANCES Bluetooth Appearance values + * @note Retrieved from http://developer.bluetooth.org/gatt/characteristics/Pages/CharacteristicViewer.aspx?u=org.bluetooth.characteristic.gap.appearance.xml + * @{ */ +#define BLE_APPEARANCE_UNKNOWN 0 /**< Unknown. */ +#define BLE_APPEARANCE_GENERIC_PHONE 64 /**< Generic Phone. */ +#define BLE_APPEARANCE_GENERIC_COMPUTER 128 /**< Generic Computer. */ +#define BLE_APPEARANCE_GENERIC_WATCH 192 /**< Generic Watch. */ +#define BLE_APPEARANCE_WATCH_SPORTS_WATCH 193 /**< Watch: Sports Watch. */ +#define BLE_APPEARANCE_GENERIC_CLOCK 256 /**< Generic Clock. */ +#define BLE_APPEARANCE_GENERIC_DISPLAY 320 /**< Generic Display. */ +#define BLE_APPEARANCE_GENERIC_REMOTE_CONTROL 384 /**< Generic Remote Control. */ +#define BLE_APPEARANCE_GENERIC_EYE_GLASSES 448 /**< Generic Eye-glasses. */ +#define BLE_APPEARANCE_GENERIC_TAG 512 /**< Generic Tag. */ +#define BLE_APPEARANCE_GENERIC_KEYRING 576 /**< Generic Keyring. */ +#define BLE_APPEARANCE_GENERIC_MEDIA_PLAYER 640 /**< Generic Media Player. */ +#define BLE_APPEARANCE_GENERIC_BARCODE_SCANNER 704 /**< Generic Barcode Scanner. */ +#define BLE_APPEARANCE_GENERIC_THERMOMETER 768 /**< Generic Thermometer. */ +#define BLE_APPEARANCE_THERMOMETER_EAR 769 /**< Thermometer: Ear. */ +#define BLE_APPEARANCE_GENERIC_HEART_RATE_SENSOR 832 /**< Generic Heart rate Sensor. */ +#define BLE_APPEARANCE_HEART_RATE_SENSOR_HEART_RATE_BELT 833 /**< Heart Rate Sensor: Heart Rate Belt. */ +#define BLE_APPEARANCE_GENERIC_BLOOD_PRESSURE 896 /**< Generic Blood Pressure. */ +#define BLE_APPEARANCE_BLOOD_PRESSURE_ARM 897 /**< Blood Pressure: Arm. */ +#define BLE_APPEARANCE_BLOOD_PRESSURE_WRIST 898 /**< Blood Pressure: Wrist. */ +#define BLE_APPEARANCE_GENERIC_HID 960 /**< Human Interface Device (HID). */ +#define BLE_APPEARANCE_HID_KEYBOARD 961 /**< Keyboard (HID Subtype). */ +#define BLE_APPEARANCE_HID_MOUSE 962 /**< Mouse (HID Subtype). */ +#define BLE_APPEARANCE_HID_JOYSTICK 963 /**< Joystick (HID Subtype). */ +#define BLE_APPEARANCE_HID_GAMEPAD 964 /**< Gamepad (HID Subtype). */ +#define BLE_APPEARANCE_HID_DIGITIZERSUBTYPE 965 /**< Digitizer Tablet (HID Subtype). */ +#define BLE_APPEARANCE_HID_CARD_READER 966 /**< Card Reader (HID Subtype). */ +#define BLE_APPEARANCE_HID_DIGITAL_PEN 967 /**< Digital Pen (HID Subtype). */ +#define BLE_APPEARANCE_HID_BARCODE 968 /**< Barcode Scanner (HID Subtype). */ +#define BLE_APPEARANCE_GENERIC_GLUCOSE_METER 1024 /**< Generic Glucose Meter. */ +#define BLE_APPEARANCE_GENERIC_RUNNING_WALKING_SENSOR 1088 /**< Generic Running Walking Sensor. */ +#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_IN_SHOE 1089 /**< Running Walking Sensor: In-Shoe. */ +#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_SHOE 1090 /**< Running Walking Sensor: On-Shoe. */ +#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_HIP 1091 /**< Running Walking Sensor: On-Hip. */ +#define BLE_APPEARANCE_GENERIC_CYCLING 1152 /**< Generic Cycling. */ +#define BLE_APPEARANCE_CYCLING_CYCLING_COMPUTER 1153 /**< Cycling: Cycling Computer. */ +#define BLE_APPEARANCE_CYCLING_SPEED_SENSOR 1154 /**< Cycling: Speed Sensor. */ +#define BLE_APPEARANCE_CYCLING_CADENCE_SENSOR 1155 /**< Cycling: Cadence Sensor. */ +#define BLE_APPEARANCE_CYCLING_POWER_SENSOR 1156 /**< Cycling: Power Sensor. */ +#define BLE_APPEARANCE_CYCLING_SPEED_CADENCE_SENSOR 1157 /**< Cycling: Speed and Cadence Sensor. */ +#define BLE_APPEARANCE_GENERIC_PULSE_OXIMETER 3136 /**< Generic Pulse Oximeter. */ +#define BLE_APPEARANCE_PULSE_OXIMETER_FINGERTIP 3137 /**< Fingertip (Pulse Oximeter subtype). */ +#define BLE_APPEARANCE_PULSE_OXIMETER_WRIST_WORN 3138 /**< Wrist Worn(Pulse Oximeter subtype). */ +#define BLE_APPEARANCE_GENERIC_WEIGHT_SCALE 3200 /**< Generic Weight Scale. */ +#define BLE_APPEARANCE_GENERIC_OUTDOOR_SPORTS_ACT 5184 /**< Generic Outdoor Sports Activity. */ +#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_DISP 5185 /**< Location Display Device (Outdoor Sports Activity subtype). */ +#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_DISP 5186 /**< Location and Navigation Display Device (Outdoor Sports Activity subtype). */ +#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_POD 5187 /**< Location Pod (Outdoor Sports Activity subtype). */ +#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_POD 5188 /**< Location and Navigation Pod (Outdoor Sports Activity subtype). */ +/** @} */ + +/** @brief Set .type and .uuid fields of ble_uuid_struct to specified UUID value. */ +#define BLE_UUID_BLE_ASSIGN(instance, value) do {\ + instance.type = BLE_UUID_TYPE_BLE; \ + instance.uuid = value;} while(0) + +/** @brief Copy type and uuid members from src to dst ble_uuid_t pointer. Both pointers must be valid/non-null. */ +#define BLE_UUID_COPY_PTR(dst, src) do {\ + (dst)->type = (src)->type; \ + (dst)->uuid = (src)->uuid;} while(0) + +/** @brief Copy type and uuid members from src to dst ble_uuid_t struct. */ +#define BLE_UUID_COPY_INST(dst, src) do {\ + (dst).type = (src).type; \ + (dst).uuid = (src).uuid;} while(0) + +/** @brief Compare for equality both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */ +#define BLE_UUID_EQ(p_uuid1, p_uuid2) \ + (((p_uuid1)->type == (p_uuid2)->type) && ((p_uuid1)->uuid == (p_uuid2)->uuid)) + +/** @brief Compare for difference both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */ +#define BLE_UUID_NEQ(p_uuid1, p_uuid2) \ + (((p_uuid1)->type != (p_uuid2)->type) || ((p_uuid1)->uuid != (p_uuid2)->uuid)) + +/** @} */ + +/** @addtogroup BLE_TYPES_STRUCTURES Structures + * @{ */ + +/** @brief 128 bit UUID values. */ +typedef struct +{ + uint8_t uuid128[16]; /**< Little-Endian UUID bytes. */ +} ble_uuid128_t; + +/** @brief Bluetooth Low Energy UUID type, encapsulates both 16-bit and 128-bit UUIDs. */ +typedef struct +{ + uint16_t uuid; /**< 16-bit UUID value or octets 12-13 of 128-bit UUID. */ + uint8_t type; /**< UUID type, see @ref BLE_UUID_TYPES. If type is @ref BLE_UUID_TYPE_UNKNOWN, the value of uuid is undefined. */ +} ble_uuid_t; + +/**@brief Data structure. */ +typedef struct +{ + uint8_t *p_data; /**< Pointer to the data buffer provided to/from the application. */ + uint16_t len; /**< Length of the data buffer, in bytes. */ +} ble_data_t; + +/** @} */ +#ifdef __cplusplus +} +#endif + +#endif /* BLE_TYPES_H__ */ + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf52/nrf_mbr.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf52/nrf_mbr.h new file mode 100644 index 00000000000..e0c80e278c3 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf52/nrf_mbr.h @@ -0,0 +1,242 @@ +/* + * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @defgroup nrf_mbr_api Master Boot Record API + @{ + + @brief APIs for updating SoftDevice and BootLoader + +*/ + +#ifndef NRF_MBR_H__ +#define NRF_MBR_H__ + +#include "nrf_svc.h" +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup NRF_MBR_DEFINES Defines + * @{ */ + +/**@brief MBR SVC Base number. */ +#define MBR_SVC_BASE (0x18) + +/**@brief Page size in words. */ +#define MBR_PAGE_SIZE_IN_WORDS (1024) + +/** @brief The size that must be reserved for the MBR when a SoftDevice is written to flash. +This is the offset where the first byte of the SoftDevice hex file is written.*/ +#define MBR_SIZE (0x1000) + +/** @} */ + +/** @addtogroup NRF_MBR_ENUMS Enumerations + * @{ */ + +/**@brief nRF Master Boot Record API SVC numbers. */ +enum NRF_MBR_SVCS +{ + SD_MBR_COMMAND = MBR_SVC_BASE, /**< ::sd_mbr_command */ +}; + +/**@brief Possible values for ::sd_mbr_command_t.command */ +enum NRF_MBR_COMMANDS +{ + SD_MBR_COMMAND_COPY_BL, /**< Copy a new BootLoader. @see ::sd_mbr_command_copy_bl_t*/ + SD_MBR_COMMAND_COPY_SD, /**< Copy a new SoftDevice. @see ::sd_mbr_command_copy_sd_t*/ + SD_MBR_COMMAND_INIT_SD, /**< Initialize forwarding interrupts to SD, and run reset function in SD. Does not require any parameters in ::sd_mbr_command_t params.*/ + SD_MBR_COMMAND_COMPARE, /**< This command works like memcmp. @see ::sd_mbr_command_compare_t*/ + SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET, /**< Change the address the MBR starts after a reset. @see ::sd_mbr_command_vector_table_base_set_t*/ + SD_MBR_COMMAND_RESERVED, + SD_MBR_COMMAND_IRQ_FORWARD_ADDRESS_SET, /**< Start forwarding all interrupts to this address. @see ::sd_mbr_command_irq_forward_address_set_t*/ +}; + +/** @} */ + +/** @addtogroup NRF_MBR_TYPES Types + * @{ */ + +/**@brief This command copies part of a new SoftDevice + * + * The destination area is erased before copying. + * If dst is in the middle of a flash page, that whole flash page will be erased. + * If (dst+len) is in the middle of a flash page, that whole flash page will be erased. + * + * The user of this function is responsible for setting the BPROT registers. + * + * @retval ::NRF_SUCCESS indicates that the contents of the memory blocks where copied correctly. + * @retval ::NRF_ERROR_INTERNAL indicates that the contents of the memory blocks where not verified correctly after copying. + */ +typedef struct +{ + uint32_t *src; /**< Pointer to the source of data to be copied.*/ + uint32_t *dst; /**< Pointer to the destination where the content is to be copied.*/ + uint32_t len; /**< Number of 32 bit words to copy. Must be a multiple of @ref MBR_PAGE_SIZE_IN_WORDS words.*/ +} sd_mbr_command_copy_sd_t; + + +/**@brief This command works like memcmp, but takes the length in words. + * + * @retval ::NRF_SUCCESS indicates that the contents of both memory blocks are equal. + * @retval ::NRF_ERROR_NULL indicates that the contents of the memory blocks are not equal. + */ +typedef struct +{ + uint32_t *ptr1; /**< Pointer to block of memory. */ + uint32_t *ptr2; /**< Pointer to block of memory. */ + uint32_t len; /**< Number of 32 bit words to compare.*/ +} sd_mbr_command_compare_t; + + +/**@brief This command copies a new BootLoader. + * + * With this command, destination of BootLoader is always the address written in + * NRF_UICR->BOOTADDR. + * + * Destination is erased by this function. + * If (destination+bl_len) is in the middle of a flash page, that whole flash page will be erased. + * + * This function will use the flash protect peripheral (BPROT or ACL) to protect the flash that is + * not intended to be written. + * + * On success, this function will not return. It will start the new BootLoader from reset-vector as normal. + * + * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. + * @retval ::NRF_ERROR_FORBIDDEN if NRF_UICR->BOOTADDR is not set. + * @retval ::NRF_ERROR_INVALID_LENGTH if parameters attempts to read or write outside flash area. + * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) + */ +typedef struct +{ + uint32_t *bl_src; /**< Pointer to the source of the Bootloader to be be copied.*/ + uint32_t bl_len; /**< Number of 32 bit words to copy for BootLoader. */ +} sd_mbr_command_copy_bl_t; + +/**@brief Change the address the MBR starts after a reset + * + * Once this function has been called, this address is where the MBR will start to forward + * interrupts to after a reset. + * + * To restore default forwarding this function should be called with @ref address set to 0. The + * MBR will then start forwarding interrupts to the address in NFR_UICR->BOOTADDR or to the + * SoftDevice if the BOOTADDR is not set. + * + * On success, this function will not return. It will reset the device. + * + * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. + * @retval ::NRF_ERROR_INVALID_ADDR if parameter address is outside of the flash size. + * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) + */ +typedef struct +{ + uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ +} sd_mbr_command_vector_table_base_set_t; + +/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the MBR + * + * Unlike sd_mbr_command_vector_table_base_set_t, this function does not reset, and it does not + * change where the MBR starts after reset. + * + * @retval ::NRF_SUCCESS + */ +typedef struct +{ + uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ +} sd_mbr_command_irq_forward_address_set_t; + +/**@brief Input structure containing data used when calling ::sd_mbr_command + * + * Depending on what command value that is set, the corresponding params value type must also be + * set. See @ref NRF_MBR_COMMANDS for command types and corresponding params value type. If command + * @ref SD_MBR_COMMAND_INIT_SD is set, it is not necessary to set any values under params. + */ +typedef struct +{ + uint32_t command; /**< Type of command to be issued. See @ref NRF_MBR_COMMANDS. */ + union + { + sd_mbr_command_copy_sd_t copy_sd; /**< Parameters for copy SoftDevice.*/ + sd_mbr_command_compare_t compare; /**< Parameters for verify.*/ + sd_mbr_command_copy_bl_t copy_bl; /**< Parameters for copy BootLoader. Requires parameter page. */ + sd_mbr_command_vector_table_base_set_t base_set; /**< Parameters for vector table base set. Requires parameter page.*/ + sd_mbr_command_irq_forward_address_set_t irq_forward_address_set; /**< Parameters for irq forward address set*/ + } params; /**< Command parameters. */ +} sd_mbr_command_t; + +/** @} */ + +/** @addtogroup NRF_MBR_FUNCTIONS Functions + * @{ */ + +/**@brief Issue Master Boot Record commands + * + * Commands used when updating a SoftDevice and bootloader. + * + * The @ref SD_MBR_COMMAND_COPY_BL and @ref SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET requires + * parameters to be retained by the MBR when resetting the IC. This is done in a separate flash + * page provided by the application. The UICR register UICR.NRFFW[1] must be set to an address + * corresponding to a page in the application flash space. This page will be cleared by the MBR and + * used to store the command before reset. When the UICR.NRFFW[1] field is set the page it refers + * to must not be used by the application. If the UICR.NRFFW[1] is set to 0xFFFFFFFF (the default) + * MBR commands which use flash will be unavailable and return @ref NRF_ERROR_NO_MEM. + * + * @param[in] param Pointer to a struct describing the command. + * + * @note For return values, see ::sd_mbr_command_copy_sd_t, ::sd_mbr_command_copy_bl_t, + * ::sd_mbr_command_compare_t, ::sd_mbr_command_vector_table_base_set_t, + * ::sd_mbr_command_irq_forward_address_set_t + * + * @retval ::NRF_ERROR_NO_MEM if UICR.NRFFW[1] is not set (i.e. is 0xFFFFFFFF). + * @retval ::NRF_ERROR_INVALID_PARAM if an invalid command is given. +*/ +SVCALL(SD_MBR_COMMAND, uint32_t, sd_mbr_command(sd_mbr_command_t* param)); + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // NRF_MBR_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_ble.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_ble.h new file mode 100644 index 00000000000..9ebb41f5383 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_ble.h @@ -0,0 +1,622 @@ +/* + * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup BLE_COMMON BLE SoftDevice Common + @{ + @defgroup ble_api Events, type definitions and API calls + @{ + + @brief Module independent events, type definitions and API calls for the BLE SoftDevice. + + */ + +#ifndef BLE_H__ +#define BLE_H__ + +#include +#include "nrf_svc.h" +#include "nrf_error.h" +#include "ble_err.h" +#include "ble_gap.h" +#include "ble_l2cap.h" +#include "ble_gatt.h" +#include "ble_gattc.h" +#include "ble_gatts.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup BLE_COMMON_ENUMERATIONS Enumerations + * @{ */ + +/** + * @brief Common API SVC numbers. + */ +enum BLE_COMMON_SVCS +{ + SD_BLE_ENABLE = BLE_SVC_BASE, /**< Enable and initialize the BLE stack */ + SD_BLE_EVT_GET, /**< Get an event from the pending events queue. */ + SD_BLE_UUID_VS_ADD, /**< Add a Vendor Specific UUID. */ + SD_BLE_UUID_DECODE, /**< Decode UUID bytes. */ + SD_BLE_UUID_ENCODE, /**< Encode UUID bytes. */ + SD_BLE_VERSION_GET, /**< Get the local version information (company ID, Link Layer Version, Link Layer Subversion). */ + SD_BLE_USER_MEM_REPLY, /**< User Memory Reply. */ + SD_BLE_OPT_SET, /**< Set a BLE option. */ + SD_BLE_OPT_GET, /**< Get a BLE option. */ + SD_BLE_CFG_SET, /**< Add a configuration to the BLE stack. */ +}; + +/** + * @brief BLE Module Independent Event IDs. + */ +enum BLE_COMMON_EVTS +{ + BLE_EVT_USER_MEM_REQUEST = BLE_EVT_BASE + 0, /**< User Memory request. @ref ble_evt_user_mem_request_t */ + BLE_EVT_USER_MEM_RELEASE = BLE_EVT_BASE + 1, /**< User Memory release. @ref ble_evt_user_mem_release_t */ +}; + +/**@brief BLE Connection Configuration IDs. + * + * IDs that uniquely identify a connection configuration. + */ +enum BLE_CONN_CFGS +{ + BLE_CONN_CFG_GAP = BLE_CONN_CFG_BASE + 0, /**< BLE GAP specific connection configuration. */ + BLE_CONN_CFG_GATTC = BLE_CONN_CFG_BASE + 1, /**< BLE GATTC specific connection configuration. */ + BLE_CONN_CFG_GATTS = BLE_CONN_CFG_BASE + 2, /**< BLE GATTS specific connection configuration. */ + BLE_CONN_CFG_GATT = BLE_CONN_CFG_BASE + 3, /**< BLE GATT specific connection configuration. */ + BLE_CONN_CFG_L2CAP = BLE_CONN_CFG_BASE + 4, /**< BLE L2CAP specific connection configuration. */ +}; + +/**@brief BLE Common Configuration IDs. + * + * IDs that uniquely identify a common configuration. + */ +enum BLE_COMMON_CFGS +{ + BLE_COMMON_CFG_VS_UUID = BLE_CFG_BASE, /**< Vendor specific UUID configuration */ +}; + +/**@brief Common Option IDs. + * IDs that uniquely identify a common option. + */ +enum BLE_COMMON_OPTS +{ + BLE_COMMON_OPT_PA_LNA = BLE_OPT_BASE + 0, /**< PA and LNA options */ + BLE_COMMON_OPT_CONN_EVT_EXT = BLE_OPT_BASE + 1, /**< Extended connection events option */ +}; + +/** @} */ + +/** @addtogroup BLE_COMMON_DEFINES Defines + * @{ */ + +/** @brief Required pointer alignment for BLE Events. +*/ +#define BLE_EVT_PTR_ALIGNMENT 4 + +/** @brief Leaves the maximum of the two arguments. +*/ +#define BLE_MAX(a, b) ((a) < (b) ? (b) : (a)) + +/** @brief Maximum possible length for BLE Events. + * @note The highest value used for @ref ble_gatt_conn_cfg_t::att_mtu in any connection configuration shall be used as a parameter. + * If that value has not been configured for any connections then @ref BLE_GATT_ATT_MTU_DEFAULT must be used instead. +*/ +#define BLE_EVT_LEN_MAX(ATT_MTU) ( \ + offsetof(ble_evt_t, evt.gattc_evt.params.prim_srvc_disc_rsp.services) + ((ATT_MTU) - 1) / 4 * sizeof(ble_gattc_service_t) \ +) + +/** @defgroup BLE_USER_MEM_TYPES User Memory Types + * @{ */ +#define BLE_USER_MEM_TYPE_INVALID 0x00 /**< Invalid User Memory Types. */ +#define BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES 0x01 /**< User Memory for GATTS queued writes. */ +/** @} */ + +/** @defgroup BLE_UUID_VS_COUNTS Vendor Specific UUID counts + * @{ + */ +#define BLE_UUID_VS_COUNT_DEFAULT 10 /**< Default VS UUID count. */ +#define BLE_UUID_VS_COUNT_MAX 254 /**< Maximum VS UUID count. */ +/** @} */ + +/** @defgroup BLE_COMMON_CFG_DEFAULTS Configuration defaults. + * @{ + */ +#define BLE_CONN_CFG_TAG_DEFAULT 0 /**< Default configuration tag, SoftDevice default connection configuration. */ + +/** @} */ + +/** @} */ + +/** @addtogroup BLE_COMMON_STRUCTURES Structures + * @{ */ + +/**@brief User Memory Block. */ +typedef struct +{ + uint8_t *p_mem; /**< Pointer to the start of the user memory block. */ + uint16_t len; /**< Length in bytes of the user memory block. */ +} ble_user_mem_block_t; + +/**@brief Event structure for @ref BLE_EVT_USER_MEM_REQUEST. */ +typedef struct +{ + uint8_t type; /**< User memory type, see @ref BLE_USER_MEM_TYPES. */ +} ble_evt_user_mem_request_t; + +/**@brief Event structure for @ref BLE_EVT_USER_MEM_RELEASE. */ +typedef struct +{ + uint8_t type; /**< User memory type, see @ref BLE_USER_MEM_TYPES. */ + ble_user_mem_block_t mem_block; /**< User memory block */ +} ble_evt_user_mem_release_t; + +/**@brief Event structure for events not associated with a specific function module. */ +typedef struct +{ + uint16_t conn_handle; /**< Connection Handle on which this event occurred. */ + union + { + ble_evt_user_mem_request_t user_mem_request; /**< User Memory Request Event Parameters. */ + ble_evt_user_mem_release_t user_mem_release; /**< User Memory Release Event Parameters. */ + } params; /**< Event parameter union. */ +} ble_common_evt_t; + +/**@brief BLE Event header. */ +typedef struct +{ + uint16_t evt_id; /**< Value from a BLE__EVT series. */ + uint16_t evt_len; /**< Length in octets including this header. */ +} ble_evt_hdr_t; + +/**@brief Common BLE Event type, wrapping the module specific event reports. */ +typedef struct +{ + ble_evt_hdr_t header; /**< Event header. */ + union + { + ble_common_evt_t common_evt; /**< Common Event, evt_id in BLE_EVT_* series. */ + ble_gap_evt_t gap_evt; /**< GAP originated event, evt_id in BLE_GAP_EVT_* series. */ + ble_gattc_evt_t gattc_evt; /**< GATT client originated event, evt_id in BLE_GATTC_EVT* series. */ + ble_gatts_evt_t gatts_evt; /**< GATT server originated event, evt_id in BLE_GATTS_EVT* series. */ + ble_l2cap_evt_t l2cap_evt; /**< L2CAP originated event, evt_id in BLE_L2CAP_EVT* series. */ + } evt; /**< Event union. */ +} ble_evt_t; + + +/** + * @brief Version Information. + */ +typedef struct +{ + uint8_t version_number; /**< Link Layer Version number. See https://www.bluetooth.org/en-us/specification/assigned-numbers/link-layer for assigned values. */ + uint16_t company_id; /**< Company ID, Nordic Semiconductor's company ID is 89 (0x0059) (https://www.bluetooth.org/apps/content/Default.aspx?doc_id=49708). */ + uint16_t subversion_number; /**< Link Layer Sub Version number, corresponds to the SoftDevice Config ID or Firmware ID (FWID). */ +} ble_version_t; + +/** + * @brief Configuration parameters for the PA and LNA. + */ +typedef struct +{ + uint8_t enable :1; /**< Enable toggling for this amplifier */ + uint8_t active_high :1; /**< Set the pin to be active high */ + uint8_t gpio_pin :6; /**< The GPIO pin to toggle for this amplifier */ +} ble_pa_lna_cfg_t; + +/** + * @brief PA & LNA GPIO toggle configuration + * + * This option configures the SoftDevice to toggle pins when the radio is active for use with a power amplifier and/or + * a low noise amplifier. + * + * Toggling the pins is achieved by using two PPI channels and a GPIOTE channel. The hardware channel IDs are provided + * by the application and should be regarded as reserved as long as any PA/LNA toggling is enabled. + * + * @note @ref sd_ble_opt_get is not supported for this option. + * @note Setting this option while the radio is in use (i.e. any of the roles are active) may have undefined consequences + * and must be avoided by the application. + */ +typedef struct +{ + ble_pa_lna_cfg_t pa_cfg; /**< Power Amplifier configuration */ + ble_pa_lna_cfg_t lna_cfg; /**< Low Noise Amplifier configuration */ + + uint8_t ppi_ch_id_set; /**< PPI channel used for radio pin setting */ + uint8_t ppi_ch_id_clr; /**< PPI channel used for radio pin clearing */ + uint8_t gpiote_ch_id; /**< GPIOTE channel used for radio pin toggling */ +} ble_common_opt_pa_lna_t; + +/** + * @brief Configuration of extended BLE connection events. + * + * When enabled the SoftDevice will dynamically extend the connection event when possible. + * + * The connection event length is controlled by the connection configuration as set by @ref ble_gap_conn_cfg_t::event_length. + * The connection event can be extended if there is time to send another packet pair before the start of the next connection interval, + * and if there are no conflicts with other BLE roles requesting radio time. + * + * @note @ref sd_ble_opt_get is not supported for this option. + */ +typedef struct +{ + uint8_t enable : 1; /**< Enable extended BLE connection events, disabled by default. */ +} ble_common_opt_conn_evt_ext_t; + +/**@brief Option structure for common options. */ +typedef union +{ + ble_common_opt_pa_lna_t pa_lna; /**< Parameters for controlling PA and LNA pin toggling. */ + ble_common_opt_conn_evt_ext_t conn_evt_ext; /**< Parameters for enabling extended connection events. */ +} ble_common_opt_t; + +/**@brief Common BLE Option type, wrapping the module specific options. */ +typedef union +{ + ble_common_opt_t common_opt; /**< COMMON options, opt_id in @ref BLE_COMMON_OPTS series. */ + ble_gap_opt_t gap_opt; /**< GAP option, opt_id in @ref BLE_GAP_OPTS series. */ +} ble_opt_t; + +/**@brief BLE connection configuration type, wrapping the module specific configurations, set with + * @ref sd_ble_cfg_set. + * + * @note Connection configurations don't have to be set. + * In the case that no configurations has been set, or fewer connection configurations has been set than enabled connections, + * the default connection configuration will be automatically added for the remaining connections. + * When creating connections with the default configuration, @ref BLE_CONN_CFG_TAG_DEFAULT should be used in + * place of @ref ble_conn_cfg_t::conn_cfg_tag. + * + * @sa sd_ble_gap_adv_start() + * @sa sd_ble_gap_connect() + * + * @mscs + * @mmsc{@ref BLE_CONN_CFG} + * @endmscs + + */ +typedef struct +{ + uint8_t conn_cfg_tag; /**< The application chosen tag it can use with the + @ref sd_ble_gap_adv_start() and @ref sd_ble_gap_connect() calls + to select this configuration when creating a connection. + Must be different for all connection configurations added and not @ref BLE_CONN_CFG_TAG_DEFAULT. */ + union { + ble_gap_conn_cfg_t gap_conn_cfg; /**< GAP connection configuration, cfg_id is @ref BLE_CONN_CFG_GAP. */ + ble_gattc_conn_cfg_t gattc_conn_cfg; /**< GATTC connection configuration, cfg_id is @ref BLE_CONN_CFG_GATTC. */ + ble_gatts_conn_cfg_t gatts_conn_cfg; /**< GATTS connection configuration, cfg_id is @ref BLE_CONN_CFG_GATTS. */ + ble_gatt_conn_cfg_t gatt_conn_cfg; /**< GATT connection configuration, cfg_id is @ref BLE_CONN_CFG_GATT. */ + ble_l2cap_conn_cfg_t l2cap_conn_cfg; /**< L2CAP connection configuration, cfg_id is @ref BLE_CONN_CFG_L2CAP. */ + } params; /**< Connection configuration union. */ +} ble_conn_cfg_t; + +/** + * @brief Configuration of Vendor Specific UUIDs, set with @ref sd_ble_cfg_set. + * + * @retval ::NRF_ERROR_INVALID_PARAM Too many UUIDs configured. + */ +typedef struct +{ + uint8_t vs_uuid_count; /**< Number of 128-bit Vendor Specific UUID bases to allocate memory for. + Default value is @ref BLE_UUID_VS_COUNT_DEFAULT. Maximum value is + @ref BLE_UUID_VS_COUNT_MAX. */ +} ble_common_cfg_vs_uuid_t; + +/**@brief Common BLE Configuration type, wrapping the common configurations. */ +typedef union +{ + ble_common_cfg_vs_uuid_t vs_uuid_cfg; /**< Vendor specific UUID configuration, cfg_id is @ref BLE_COMMON_CFG_VS_UUID. */ +} ble_common_cfg_t; + +/**@brief BLE Configuration type, wrapping the module specific configurations. */ +typedef union +{ + ble_conn_cfg_t conn_cfg; /**< Connection specific configurations, cfg_id in @ref BLE_CONN_CFGS series. */ + ble_common_cfg_t common_cfg; /**< Global common configurations, cfg_id in @ref BLE_COMMON_CFGS series. */ + ble_gap_cfg_t gap_cfg; /**< Global GAP configurations, cfg_id in @ref BLE_GAP_CFGS series. */ + ble_gatts_cfg_t gatts_cfg; /**< Global GATTS configuration, cfg_id in @ref BLE_GATTS_CFGS series. */ +} ble_cfg_t; + +/** @} */ + +/** @addtogroup BLE_COMMON_FUNCTIONS Functions + * @{ */ + +/**@brief Enable the BLE stack + * + * @param[in, out] p_app_ram_base Pointer to a variable containing the start address of the + * application RAM region (APP_RAM_BASE). On return, this will + * contain the minimum start address of the application RAM region + * required by the SoftDevice for this configuration. + * + * @note The memory requirement for a specific configuration will not increase between SoftDevices + * with the same major version number. + * + * @note The value of *p_app_ram_base when the app has done no custom configuration of the + * SoftDevice, i.e. the app has not called @ref sd_ble_cfg_set before @ref sd_ble_enable, can + * be found in the release notes. + * + * @note At runtime the IC's RAM is split into 2 regions: The SoftDevice RAM region is located + * between 0x20000000 and APP_RAM_BASE-1 and the application's RAM region is located between + * APP_RAM_BASE and the start of the call stack. + * + * @details This call initializes the BLE stack, no BLE related function other than @ref + * sd_ble_cfg_set can be called before this one. + * + * @mscs + * @mmsc{@ref BLE_COMMON_ENABLE} + * @endmscs + * + * @retval ::NRF_SUCCESS The BLE stack has been initialized successfully. + * @retval ::NRF_ERROR_INVALID_STATE The BLE stack had already been initialized and cannot be reinitialized. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. + * @retval ::NRF_ERROR_NO_MEM The amount of memory assigned to the SoftDevice by *p_app_ram_base is not + * large enough to fit this configuration's memory requirement. Check *p_app_ram_base + * and set the start address of the application RAM region accordingly. + */ +SVCALL(SD_BLE_ENABLE, uint32_t, sd_ble_enable(uint32_t * p_app_ram_base)); + +/**@brief Add configurations for the BLE stack + * + * @param[in] cfg_id Config ID, see @ref BLE_CONN_CFGS, @ref BLE_COMMON_CFGS, @ref + * BLE_GAP_CFGS or @ref BLE_GATTS_CFGS. + * @param[in] p_cfg Pointer to a ble_cfg_t structure containing the configuration value. + * @param[in] app_ram_base The start address of the application RAM region (APP_RAM_BASE). + * See @ref sd_ble_enable for details about APP_RAM_BASE. + * + * @note The memory requirement for a specific configuration will not increase between SoftDevices + * with the same major version number. + * + * @note If a configuration is set more than once, the last one set is the one that takes effect on + * @ref sd_ble_enable. + * + * @note Any part of the BLE stack that is NOT configured with @ref sd_ble_cfg_set will have default + * configuration. + * + * @note @ref sd_ble_cfg_set may be called at any time when the SoftDevice is enabled (see @ref + * sd_softdevice_enable) while the BLE part of the SoftDevice is not enabled (see @ref + * sd_ble_enable). + * + * @note Error codes for the configurations are described in the configuration structs. + * + * @mscs + * @mmsc{@ref BLE_COMMON_ENABLE} + * @endmscs + * + * @retval ::NRF_SUCCESS The configuration has been added successfully. + * @retval ::NRF_ERROR_INVALID_STATE The BLE stack had already been initialized. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid cfg_id supplied. + * @retval ::NRF_ERROR_NO_MEM The amount of memory assigned to the SoftDevice by app_ram_base is not + * large enough to fit this configuration's memory requirement. + */ +SVCALL(SD_BLE_CFG_SET, uint32_t, sd_ble_cfg_set(uint32_t cfg_id, ble_cfg_t const * p_cfg, uint32_t app_ram_base)); + +/**@brief Get an event from the pending events queue. + * + * @param[out] p_dest Pointer to buffer to be filled in with an event, or NULL to retrieve the event length. + * This buffer must be aligned to the extend defined by @ref BLE_EVT_PTR_ALIGNMENT. + * The buffer should be interpreted as a @ref ble_evt_t struct. + * @param[in, out] p_len Pointer the length of the buffer, on return it is filled with the event length. + * + * @details This call allows the application to pull a BLE event from the BLE stack. The application is signaled that + * an event is available from the BLE stack by the triggering of the SD_EVT_IRQn interrupt. + * The application is free to choose whether to call this function from thread mode (main context) or directly from the + * Interrupt Service Routine that maps to SD_EVT_IRQn. In any case however, and because the BLE stack runs at a higher + * priority than the application, this function should be called in a loop (until @ref NRF_ERROR_NOT_FOUND is returned) + * every time SD_EVT_IRQn is raised to ensure that all available events are pulled from the BLE stack. Failure to do so + * could potentially leave events in the internal queue without the application being aware of this fact. + * + * Sizing the p_dest buffer is equally important, since the application needs to provide all the memory necessary for the event to + * be copied into application memory. If the buffer provided is not large enough to fit the entire contents of the event, + * @ref NRF_ERROR_DATA_SIZE will be returned and the application can then call again with a larger buffer size. + * The maximum possible event length is defined by @ref BLE_EVT_LEN_MAX. The application may also "peek" the event length + * by providing p_dest as a NULL pointer and inspecting the value of *p_len upon return: + * + * \code + * uint16_t len; + * errcode = sd_ble_evt_get(NULL, &len); + * \endcode + * + * @mscs + * @mmsc{@ref BLE_COMMON_IRQ_EVT_MSC} + * @mmsc{@ref BLE_COMMON_THREAD_EVT_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Event pulled and stored into the supplied buffer. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. + * @retval ::NRF_ERROR_NOT_FOUND No events ready to be pulled. + * @retval ::NRF_ERROR_DATA_SIZE Event ready but could not fit into the supplied buffer. + */ +SVCALL(SD_BLE_EVT_GET, uint32_t, sd_ble_evt_get(uint8_t *p_dest, uint16_t *p_len)); + + +/**@brief Add a Vendor Specific base UUID. + * + * @details This call enables the application to add a vendor specific base UUID to the BLE stack's table, for later + * use with all other modules and APIs. This then allows the application to use the shorter, 24-bit @ref ble_uuid_t + * format when dealing with both 16-bit and 128-bit UUIDs without having to check for lengths and having split code + * paths. This is accomplished by extending the grouping mechanism that the Bluetooth SIG standard base UUID uses + * for all other 128-bit UUIDs. The type field in the @ref ble_uuid_t structure is an index (relative to + * @ref BLE_UUID_TYPE_VENDOR_BEGIN) to the table populated by multiple calls to this function, and the UUID field + * in the same structure contains the 2 bytes at indexes 12 and 13. The number of possible 128-bit UUIDs available to + * the application is therefore the number of Vendor Specific UUIDs added with the help of this function times 65536, + * although restricted to modifying bytes 12 and 13 for each of the entries in the supplied array. + * + * @note Bytes 12 and 13 of the provided UUID will not be used internally, since those are always replaced by + * the 16-bit uuid field in @ref ble_uuid_t. + * + * @note If a UUID is already present in the BLE stack's internal table, the corresponding index will be returned in + * p_uuid_type along with an @ref NRF_SUCCESS error code. + * + * @param[in] p_vs_uuid Pointer to a 16-octet (128-bit) little endian Vendor Specific UUID disregarding + * bytes 12 and 13. + * @param[out] p_uuid_type Pointer to a uint8_t where the type field in @ref ble_uuid_t corresponding to this UUID will be stored. + * + * @retval ::NRF_SUCCESS Successfully added the Vendor Specific UUID. + * @retval ::NRF_ERROR_INVALID_ADDR If p_vs_uuid or p_uuid_type is NULL or invalid. + * @retval ::NRF_ERROR_NO_MEM If there are no more free slots for VS UUIDs. + */ +SVCALL(SD_BLE_UUID_VS_ADD, uint32_t, sd_ble_uuid_vs_add(ble_uuid128_t const *p_vs_uuid, uint8_t *p_uuid_type)); + + +/** @brief Decode little endian raw UUID bytes (16-bit or 128-bit) into a 24 bit @ref ble_uuid_t structure. + * + * @details The raw UUID bytes excluding bytes 12 and 13 (i.e. bytes 0-11 and 14-15) of p_uuid_le are compared + * to the corresponding ones in each entry of the table of vendor specific UUIDs populated with @ref sd_ble_uuid_vs_add + * to look for a match. If there is such a match, bytes 12 and 13 are returned as p_uuid->uuid and the index + * relative to @ref BLE_UUID_TYPE_VENDOR_BEGIN as p_uuid->type. + * + * @note If the UUID length supplied is 2, then the type set by this call will always be @ref BLE_UUID_TYPE_BLE. + * + * @param[in] uuid_le_len Length in bytes of the buffer pointed to by p_uuid_le (must be 2 or 16 bytes). + * @param[in] p_uuid_le Pointer pointing to little endian raw UUID bytes. + * @param[out] p_uuid Pointer to a @ref ble_uuid_t structure to be filled in. + * + * @retval ::NRF_SUCCESS Successfully decoded into the @ref ble_uuid_t structure. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_LENGTH Invalid UUID length. + * @retval ::NRF_ERROR_NOT_FOUND For a 128-bit UUID, no match in the populated table of UUIDs. + */ +SVCALL(SD_BLE_UUID_DECODE, uint32_t, sd_ble_uuid_decode(uint8_t uuid_le_len, uint8_t const *p_uuid_le, ble_uuid_t *p_uuid)); + + +/** @brief Encode a @ref ble_uuid_t structure into little endian raw UUID bytes (16-bit or 128-bit). + * + * @note The pointer to the destination buffer p_uuid_le may be NULL, in which case only the validity and size of p_uuid is computed. + * + * @param[in] p_uuid Pointer to a @ref ble_uuid_t structure that will be encoded into bytes. + * @param[out] p_uuid_le_len Pointer to a uint8_t that will be filled with the encoded length (2 or 16 bytes). + * @param[out] p_uuid_le Pointer to a buffer where the little endian raw UUID bytes (2 or 16) will be stored. + * + * @retval ::NRF_SUCCESS Successfully encoded into the buffer. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid UUID type. + */ +SVCALL(SD_BLE_UUID_ENCODE, uint32_t, sd_ble_uuid_encode(ble_uuid_t const *p_uuid, uint8_t *p_uuid_le_len, uint8_t *p_uuid_le)); + + +/**@brief Get Version Information. + * + * @details This call allows the application to get the BLE stack version information. + * + * @param[out] p_version Pointer to a ble_version_t structure to be filled in. + * + * @retval ::NRF_SUCCESS Version information stored successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY The BLE stack is busy (typically doing a locally-initiated disconnection procedure). + */ +SVCALL(SD_BLE_VERSION_GET, uint32_t, sd_ble_version_get(ble_version_t *p_version)); + + +/**@brief Provide a user memory block. + * + * @note This call can only be used as a response to a @ref BLE_EVT_USER_MEM_REQUEST event issued to the application. + * + * @param[in] conn_handle Connection handle. + * @param[in] p_block Pointer to a user memory block structure or NULL if memory is managed by the application. + * + * @mscs + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_PEER_CANCEL_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_NOAUTH_MSC} + * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} + * @endmscs + * + * @retval ::NRF_SUCCESS Successfully queued a response to the peer. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_LENGTH Invalid user memory block length supplied. + * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection state or no user memory request pending. + */ +SVCALL(SD_BLE_USER_MEM_REPLY, uint32_t, sd_ble_user_mem_reply(uint16_t conn_handle, ble_user_mem_block_t const *p_block)); + +/**@brief Set a BLE option. + * + * @details This call allows the application to set the value of an option. + * + * @mscs + * @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC} + * @endmscs + * + * @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS. + * @param[in] p_opt Pointer to a ble_opt_t structure containing the option value. + * + * @retval ::NRF_SUCCESS Option set successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. + * @retval ::NRF_ERROR_INVALID_STATE Unable to set the parameter at this time. + * @retval ::NRF_ERROR_BUSY The BLE stack is busy or the previous procedure has not completed. + */ +SVCALL(SD_BLE_OPT_SET, uint32_t, sd_ble_opt_set(uint32_t opt_id, ble_opt_t const *p_opt)); + + +/**@brief Get a BLE option. + * + * @details This call allows the application to retrieve the value of an option. + * + * @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS. + * @param[out] p_opt Pointer to a ble_opt_t structure to be filled in. + * + * @retval ::NRF_SUCCESS Option retrieved successfully. + * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. + * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. + * @retval ::NRF_ERROR_INVALID_STATE Unable to retrieve the parameter at this time. + * @retval ::NRF_ERROR_BUSY The BLE stack is busy or the previous procedure has not completed. + * @retval ::NRF_ERROR_NOT_SUPPORTED This option is not supported. + * + */ +SVCALL(SD_BLE_OPT_GET, uint32_t, sd_ble_opt_get(uint32_t opt_id, ble_opt_t *p_opt)); + +/** @} */ +#ifdef __cplusplus +} +#endif +#endif /* BLE_H__ */ + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_error.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_error.h new file mode 100644 index 00000000000..6badee98e56 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_error.h @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** + @defgroup nrf_error SoftDevice Global Error Codes + @{ + + @brief Global Error definitions +*/ + +/* Header guard */ +#ifndef NRF_ERROR_H__ +#define NRF_ERROR_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/** @defgroup NRF_ERRORS_BASE Error Codes Base number definitions + * @{ */ +#define NRF_ERROR_BASE_NUM (0x0) ///< Global error base +#define NRF_ERROR_SDM_BASE_NUM (0x1000) ///< SDM error base +#define NRF_ERROR_SOC_BASE_NUM (0x2000) ///< SoC error base +#define NRF_ERROR_STK_BASE_NUM (0x3000) ///< STK error base +/** @} */ + +#define NRF_SUCCESS (NRF_ERROR_BASE_NUM + 0) ///< Successful command +#define NRF_ERROR_SVC_HANDLER_MISSING (NRF_ERROR_BASE_NUM + 1) ///< SVC handler is missing +#define NRF_ERROR_SOFTDEVICE_NOT_ENABLED (NRF_ERROR_BASE_NUM + 2) ///< SoftDevice has not been enabled +#define NRF_ERROR_INTERNAL (NRF_ERROR_BASE_NUM + 3) ///< Internal Error +#define NRF_ERROR_NO_MEM (NRF_ERROR_BASE_NUM + 4) ///< No Memory for operation +#define NRF_ERROR_NOT_FOUND (NRF_ERROR_BASE_NUM + 5) ///< Not found +#define NRF_ERROR_NOT_SUPPORTED (NRF_ERROR_BASE_NUM + 6) ///< Not supported +#define NRF_ERROR_INVALID_PARAM (NRF_ERROR_BASE_NUM + 7) ///< Invalid Parameter +#define NRF_ERROR_INVALID_STATE (NRF_ERROR_BASE_NUM + 8) ///< Invalid state, operation disallowed in this state +#define NRF_ERROR_INVALID_LENGTH (NRF_ERROR_BASE_NUM + 9) ///< Invalid Length +#define NRF_ERROR_INVALID_FLAGS (NRF_ERROR_BASE_NUM + 10) ///< Invalid Flags +#define NRF_ERROR_INVALID_DATA (NRF_ERROR_BASE_NUM + 11) ///< Invalid Data +#define NRF_ERROR_DATA_SIZE (NRF_ERROR_BASE_NUM + 12) ///< Invalid Data size +#define NRF_ERROR_TIMEOUT (NRF_ERROR_BASE_NUM + 13) ///< Operation timed out +#define NRF_ERROR_NULL (NRF_ERROR_BASE_NUM + 14) ///< Null Pointer +#define NRF_ERROR_FORBIDDEN (NRF_ERROR_BASE_NUM + 15) ///< Forbidden Operation +#define NRF_ERROR_INVALID_ADDR (NRF_ERROR_BASE_NUM + 16) ///< Bad Memory Address +#define NRF_ERROR_BUSY (NRF_ERROR_BASE_NUM + 17) ///< Busy +#define NRF_ERROR_CONN_COUNT (NRF_ERROR_BASE_NUM + 18) ///< Maximum connection count exceeded. +#define NRF_ERROR_RESOURCES (NRF_ERROR_BASE_NUM + 19) ///< Not enough resources for operation + +#ifdef __cplusplus +} +#endif +#endif // NRF_ERROR_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_error_sdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_error_sdm.h new file mode 100644 index 00000000000..530959b9d67 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_error_sdm.h @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + /** + @addtogroup nrf_sdm_api + @{ + @defgroup nrf_sdm_error SoftDevice Manager Error Codes + @{ + + @brief Error definitions for the SDM API +*/ + +/* Header guard */ +#ifndef NRF_ERROR_SDM_H__ +#define NRF_ERROR_SDM_H__ + +#include "nrf_error.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN (NRF_ERROR_SDM_BASE_NUM + 0) ///< Unknown LFCLK source. +#define NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION (NRF_ERROR_SDM_BASE_NUM + 1) ///< Incorrect interrupt configuration (can be caused by using illegal priority levels, or having enabled SoftDevice interrupts). +#define NRF_ERROR_SDM_INCORRECT_CLENR0 (NRF_ERROR_SDM_BASE_NUM + 2) ///< Incorrect CLENR0 (can be caused by erroneous SoftDevice flashing). + +#ifdef __cplusplus +} +#endif +#endif // NRF_ERROR_SDM_H__ + +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_error_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_error_soc.h new file mode 100644 index 00000000000..1e784b8db38 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_error_soc.h @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @addtogroup nrf_soc_api + @{ + @defgroup nrf_soc_error SoC Library Error Codes + @{ + + @brief Error definitions for the SoC library + +*/ + +/* Header guard */ +#ifndef NRF_ERROR_SOC_H__ +#define NRF_ERROR_SOC_H__ + +#include "nrf_error.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* Mutex Errors */ +#define NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN (NRF_ERROR_SOC_BASE_NUM + 0) ///< Mutex already taken + +/* NVIC errors */ +#define NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE (NRF_ERROR_SOC_BASE_NUM + 1) ///< NVIC interrupt not available +#define NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED (NRF_ERROR_SOC_BASE_NUM + 2) ///< NVIC interrupt priority not allowed +#define NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN (NRF_ERROR_SOC_BASE_NUM + 3) ///< NVIC should not return + +/* Power errors */ +#define NRF_ERROR_SOC_POWER_MODE_UNKNOWN (NRF_ERROR_SOC_BASE_NUM + 4) ///< Power mode unknown +#define NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN (NRF_ERROR_SOC_BASE_NUM + 5) ///< Power POF threshold unknown +#define NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN (NRF_ERROR_SOC_BASE_NUM + 6) ///< Power off should not return + +/* Rand errors */ +#define NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES (NRF_ERROR_SOC_BASE_NUM + 7) ///< RAND not enough values + +/* PPI errors */ +#define NRF_ERROR_SOC_PPI_INVALID_CHANNEL (NRF_ERROR_SOC_BASE_NUM + 8) ///< Invalid PPI Channel +#define NRF_ERROR_SOC_PPI_INVALID_GROUP (NRF_ERROR_SOC_BASE_NUM + 9) ///< Invalid PPI Group + +#ifdef __cplusplus +} +#endif +#endif // NRF_ERROR_SOC_H__ +/** + @} + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_nvic.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_nvic.h new file mode 100644 index 00000000000..f5c7e8e0286 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_nvic.h @@ -0,0 +1,486 @@ +/* + * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @defgroup nrf_nvic_api SoftDevice NVIC API + * @{ + * + * @note In order to use this module, the following code has to be added to a .c file: + * \code + * nrf_nvic_state_t nrf_nvic_state = {0}; + * \endcode + * + * @note Definitions and declarations starting with __ (double underscore) in this header file are + * not intended for direct use by the application. + * + * @brief APIs for the accessing NVIC when using a SoftDevice. + * + */ + +#ifndef NRF_NVIC_H__ +#define NRF_NVIC_H__ + +#include +#include "nrf.h" +#include "nrf_svc.h" +#include "nrf_error.h" +#include "nrf_error_soc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@addtogroup NRF_NVIC_DEFINES Defines + * @{ */ + +/**@defgroup NRF_NVIC_ISER_DEFINES SoftDevice NVIC internal definitions + * @{ */ + +#define __NRF_NVIC_NVMC_IRQn (30) /**< The peripheral ID of the NVMC. IRQ numbers are used to identify peripherals, but the NVMC doesn't have an IRQ number in the MDK. */ + +#define __NRF_NVIC_ISER_COUNT (2) /**< The number of ISER/ICER registers in the NVIC that are used. */ + +/**@brief Interrupts used by the SoftDevice, with IRQn in the range 0-31. */ +#define __NRF_NVIC_SD_IRQS_0 ((uint32_t)( \ + (1U << POWER_CLOCK_IRQn) \ + | (1U << RADIO_IRQn) \ + | (1U << RTC0_IRQn) \ + | (1U << TIMER0_IRQn) \ + | (1U << RNG_IRQn) \ + | (1U << ECB_IRQn) \ + | (1U << CCM_AAR_IRQn) \ + | (1U << TEMP_IRQn) \ + | (1U << __NRF_NVIC_NVMC_IRQn) \ + | (1U << (uint32_t)SWI5_IRQn) \ + )) + +/**@brief Interrupts used by the SoftDevice, with IRQn in the range 32-63. */ +#define __NRF_NVIC_SD_IRQS_1 ((uint32_t)0) + +/**@brief Interrupts available for to application, with IRQn in the range 0-31. */ +#define __NRF_NVIC_APP_IRQS_0 (~__NRF_NVIC_SD_IRQS_0) + +/**@brief Interrupts available for to application, with IRQn in the range 32-63. */ +#define __NRF_NVIC_APP_IRQS_1 (~__NRF_NVIC_SD_IRQS_1) + +/**@} */ + +/**@} */ + +/**@addtogroup NRF_NVIC_VARIABLES Variables + * @{ */ + +/**@brief Type representing the state struct for the SoftDevice NVIC module. */ +typedef struct +{ + uint32_t volatile __irq_masks[__NRF_NVIC_ISER_COUNT]; /**< IRQs enabled by the application in the NVIC. */ + uint32_t volatile __cr_flag; /**< Non-zero if already in a critical region */ +} nrf_nvic_state_t; + +/**@brief Variable keeping the state for the SoftDevice NVIC module. This must be declared in an + * application source file. */ +extern nrf_nvic_state_t nrf_nvic_state; + +/**@} */ + +/**@addtogroup NRF_NVIC_INTERNAL_FUNCTIONS SoftDevice NVIC internal functions + * @{ */ + +/**@brief Disables IRQ interrupts globally, including the SoftDevice's interrupts. + * + * @retval The value of PRIMASK prior to disabling the interrupts. + */ +__STATIC_INLINE int __sd_nvic_irq_disable(void); + +/**@brief Enables IRQ interrupts globally, including the SoftDevice's interrupts. + */ +__STATIC_INLINE void __sd_nvic_irq_enable(void); + +/**@brief Checks if IRQn is available to application + * @param[in] IRQn IRQ to check + * + * @retval 1 (true) if the IRQ to check is available to the application + */ +__STATIC_INLINE uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn); + +/**@brief Checks if priority is available to application + * @param[in] priority priority to check + * + * @retval 1 (true) if the priority to check is available to the application + */ +__STATIC_INLINE uint32_t __sd_nvic_is_app_accessible_priority(uint32_t priority); + +/**@} */ + +/**@addtogroup NRF_NVIC_FUNCTIONS SoftDevice NVIC public functions + * @{ */ + +/**@brief Enable External Interrupt. + * @note Corresponds to NVIC_EnableIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_EnableIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt was enabled. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt has a priority not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn); + +/**@brief Disable External Interrupt. + * @note Corresponds to NVIC_DisableIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_DisableIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt was disabled. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn); + +/**@brief Get Pending Interrupt. + * @note Corresponds to NVIC_GetPendingIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_GetPendingIRQ documentation in CMSIS. + * @param[out] p_pending_irq Return value from NVIC_GetPendingIRQ. + * + * @retval ::NRF_SUCCESS The interrupt is available for the application. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq); + +/**@brief Set Pending Interrupt. + * @note Corresponds to NVIC_SetPendingIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_SetPendingIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt is set pending. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn); + +/**@brief Clear Pending Interrupt. + * @note Corresponds to NVIC_ClearPendingIRQ in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_ClearPendingIRQ documentation in CMSIS. + * + * @retval ::NRF_SUCCESS The interrupt pending flag is cleared. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn); + +/**@brief Set Interrupt Priority. + * @note Corresponds to NVIC_SetPriority in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * @pre Priority is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_SetPriority documentation in CMSIS. + * @param[in] priority A valid IRQ priority for use by the application. + * + * @retval ::NRF_SUCCESS The interrupt and priority level is available for the application. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt priority is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority); + +/**@brief Get Interrupt Priority. + * @note Corresponds to NVIC_GetPriority in CMSIS. + * + * @pre IRQn is valid and not reserved by the stack. + * + * @param[in] IRQn See the NVIC_GetPriority documentation in CMSIS. + * @param[out] p_priority Return value from NVIC_GetPriority. + * + * @retval ::NRF_SUCCESS The interrupt priority is returned in p_priority. + * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE - IRQn is not available for the application. + */ +__STATIC_INLINE uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority); + +/**@brief System Reset. + * @note Corresponds to NVIC_SystemReset in CMSIS. + * + * @retval ::NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN + */ +__STATIC_INLINE uint32_t sd_nvic_SystemReset(void); + +/**@brief Enter critical region. + * + * @post Application interrupts will be disabled. + * @note sd_nvic_critical_region_enter() and ::sd_nvic_critical_region_exit() must be called in matching pairs inside each + * execution context + * @sa sd_nvic_critical_region_exit + * + * @param[out] p_is_nested_critical_region If 1, the application is now in a nested critical region. + * + * @retval ::NRF_SUCCESS + */ +__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region); + +/**@brief Exit critical region. + * + * @pre Application has entered a critical region using ::sd_nvic_critical_region_enter. + * @post If not in a nested critical region, the application interrupts will restored to the state before ::sd_nvic_critical_region_enter was called. + * + * @param[in] is_nested_critical_region If this is set to 1, the critical region won't be exited. @sa sd_nvic_critical_region_enter. + * + * @retval ::NRF_SUCCESS + */ +__STATIC_INLINE uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region); + +/**@} */ + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +__STATIC_INLINE int __sd_nvic_irq_disable(void) +{ + int pm = __get_PRIMASK(); + __disable_irq(); + return pm; +} + +__STATIC_INLINE void __sd_nvic_irq_enable(void) +{ + __enable_irq(); +} + +__STATIC_INLINE uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn) +{ + if (IRQn < 32) + { + return ((1UL<= (1 << __NVIC_PRIO_BITS)) + { + return 0; + } + if( priority == 0 + || priority == 1 + || priority == 4 + ) + { + return 0; + } + return 1; +} + + +__STATIC_INLINE uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn) +{ + if (!__sd_nvic_app_accessible_irq(IRQn)) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } + if (!__sd_nvic_is_app_accessible_priority(NVIC_GetPriority(IRQn))) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED; + } + + if (nrf_nvic_state.__cr_flag) + { + nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] |= (uint32_t)(1 << ((uint32_t)((int32_t)IRQn) & (uint32_t)0x1F)); + } + else + { + NVIC_EnableIRQ(IRQn); + } + return NRF_SUCCESS; +} + +__STATIC_INLINE uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn) +{ + if (!__sd_nvic_app_accessible_irq(IRQn)) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } + + if (nrf_nvic_state.__cr_flag) + { + nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] &= ~(1UL << ((uint32_t)(IRQn) & 0x1F)); + } + else + { + NVIC_DisableIRQ(IRQn); + } + + return NRF_SUCCESS; +} + +__STATIC_INLINE uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq) +{ + if (__sd_nvic_app_accessible_irq(IRQn)) + { + *p_pending_irq = NVIC_GetPendingIRQ(IRQn); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } +} + +__STATIC_INLINE uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn) +{ + if (__sd_nvic_app_accessible_irq(IRQn)) + { + NVIC_SetPendingIRQ(IRQn); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } +} + +__STATIC_INLINE uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn) +{ + if (__sd_nvic_app_accessible_irq(IRQn)) + { + NVIC_ClearPendingIRQ(IRQn); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } +} + +__STATIC_INLINE uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if (!__sd_nvic_app_accessible_irq(IRQn)) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } + + if (!__sd_nvic_is_app_accessible_priority(priority)) + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED; + } + + NVIC_SetPriority(IRQn, (uint32_t)priority); + return NRF_SUCCESS; +} + +__STATIC_INLINE uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority) +{ + if (__sd_nvic_app_accessible_irq(IRQn)) + { + *p_priority = (NVIC_GetPriority(IRQn) & 0xFF); + return NRF_SUCCESS; + } + else + { + return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; + } +} + +__STATIC_INLINE uint32_t sd_nvic_SystemReset(void) +{ + NVIC_SystemReset(); + return NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN; +} + +__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region) +{ + int was_masked = __sd_nvic_irq_disable(); + if (!nrf_nvic_state.__cr_flag) + { + nrf_nvic_state.__cr_flag = 1; + nrf_nvic_state.__irq_masks[0] = ( NVIC->ICER[0] & __NRF_NVIC_APP_IRQS_0 ); + NVIC->ICER[0] = __NRF_NVIC_APP_IRQS_0; + nrf_nvic_state.__irq_masks[1] = ( NVIC->ICER[1] & __NRF_NVIC_APP_IRQS_1 ); + NVIC->ICER[1] = __NRF_NVIC_APP_IRQS_1; + *p_is_nested_critical_region = 0; + } + else + { + *p_is_nested_critical_region = 1; + } + if (!was_masked) + { + __sd_nvic_irq_enable(); + } + return NRF_SUCCESS; +} + +__STATIC_INLINE uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region) +{ + if (nrf_nvic_state.__cr_flag && (is_nested_critical_region == 0)) + { + int was_masked = __sd_nvic_irq_disable(); + NVIC->ISER[0] = nrf_nvic_state.__irq_masks[0]; + NVIC->ISER[1] = nrf_nvic_state.__irq_masks[1]; + nrf_nvic_state.__cr_flag = 0; + if (!was_masked) + { + __sd_nvic_irq_enable(); + } + } + + return NRF_SUCCESS; +} + +#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ + +#ifdef __cplusplus +} +#endif + +#endif // NRF_NVIC_H__ + +/**@} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_sd_def.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_sd_def.h new file mode 100644 index 00000000000..c9ab241872e --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_sd_def.h @@ -0,0 +1,59 @@ +/** + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#ifndef NRF_SD_DEF_H__ +#define NRF_SD_DEF_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#define SD_PPI_CHANNELS_USED 0xFFFE0000uL /**< PPI channels utilized by SotfDevice (not available to the application). */ +#define SD_PPI_GROUPS_USED 0x0000000CuL /**< PPI groups utilized by SoftDevice (not available to the application). */ +#define SD_TIMERS_USED 0x00000001uL /**< Timers used by SoftDevice. */ +#define SD_SWI_USED 0x0000003CuL /**< Software interrupts used by SoftDevice */ + + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_SD_DEF_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_sdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_sdm.h new file mode 100644 index 00000000000..8c48d936786 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_sdm.h @@ -0,0 +1,358 @@ +/* + * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + @defgroup nrf_sdm_api SoftDevice Manager API + @{ + + @brief APIs for SoftDevice management. + +*/ + +#ifndef NRF_SDM_H__ +#define NRF_SDM_H__ + +#include +#include "nrf.h" +#include "nrf_svc.h" +#include "nrf_error.h" +#include "nrf_error_sdm.h" +#include "nrf_soc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** @addtogroup NRF_SDM_DEFINES Defines + * @{ */ +#ifdef NRFSOC_DOXYGEN +/// Declared in nrf_mbr.h +#define MBR_SIZE 0 +#warning test +#endif + +/** @brief The major version for the SoftDevice binary distributed with this header file. */ +#define SD_MAJOR_VERSION (6) + +/** @brief The minor version for the SoftDevice binary distributed with this header file. */ +#define SD_MINOR_VERSION (0) + +/** @brief The bugfix version for the SoftDevice binary distributed with this header file. */ +#define SD_BUGFIX_VERSION (0) + +/** @brief The full version number for the SoftDevice binary this header file was distributed + * with, as a decimal number in the form Mmmmbbb, where: + * - M is major version (one or more digits) + * - mmm is minor version (three digits) + * - bbb is bugfix version (three digits). */ +#define SD_VERSION (SD_MAJOR_VERSION * 1000000 + SD_MINOR_VERSION * 1000 + SD_BUGFIX_VERSION) + +/** @brief SoftDevice Manager SVC Base number. */ +#define SDM_SVC_BASE 0x10 + +/** @brief SoftDevice unique string size in bytes. */ +#define SD_UNIQUE_STR_SIZE 20 + +/** @brief Invalid info field. Returned when an info field does not exist. */ +#define SDM_INFO_FIELD_INVALID (0) + +/** @brief Defines the SoftDevice Information Structure location (address) as an offset from +the start of the SoftDevice (without MBR)*/ +#define SOFTDEVICE_INFO_STRUCT_OFFSET (0x2000) + +/** @brief Defines the absolute SoftDevice Information Structure location (address) when the + * SoftDevice is installed just above the MBR (the usual case). */ +#define SOFTDEVICE_INFO_STRUCT_ADDRESS (SOFTDEVICE_INFO_STRUCT_OFFSET + MBR_SIZE) + +/** @brief Defines the offset for the SoftDevice Information Structure size value relative to the + * SoftDevice base address. The size value is of type uint8_t. */ +#define SD_INFO_STRUCT_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET) + +/** @brief Defines the offset for the SoftDevice size value relative to the SoftDevice base address. + * The size value is of type uint32_t. */ +#define SD_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x08) + +/** @brief Defines the offset for FWID value relative to the SoftDevice base address. The FWID value + * is of type uint16_t. */ +#define SD_FWID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x0C) + +/** @brief Defines the offset for the SoftDevice ID relative to the SoftDevice base address. The ID + * is of type uint32_t. */ +#define SD_ID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x10) + +/** @brief Defines the offset for the SoftDevice version relative to the SoftDevice base address in + * the same format as @ref SD_VERSION, stored as an uint32_t. */ +#define SD_VERSION_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x14) + +/** @brief Defines the offset for the SoftDevice unique string relative to the SoftDevice base address. + * The SD_UNIQUE_STR is stored as an array of uint8_t. The size of array is @ref SD_UNIQUE_STR_SIZE. + */ +#define SD_UNIQUE_STR_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x18) + +/** @brief Defines a macro for retrieving the actual SoftDevice Information Structure size value + * from a given base address. Use @ref MBR_SIZE as the argument when the SoftDevice is + * installed just above the MBR (the usual case). */ +#define SD_INFO_STRUCT_SIZE_GET(baseaddr) (*((uint8_t *) ((baseaddr) + SD_INFO_STRUCT_SIZE_OFFSET))) + +/** @brief Defines a macro for retrieving the actual SoftDevice size value from a given base + * address. Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above + * the MBR (the usual case). */ +#define SD_SIZE_GET(baseaddr) (*((uint32_t *) ((baseaddr) + SD_SIZE_OFFSET))) + +/** @brief Defines a macro for retrieving the actual FWID value from a given base address. Use + * @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the usual + * case). */ +#define SD_FWID_GET(baseaddr) (*((uint16_t *) ((baseaddr) + SD_FWID_OFFSET))) + +/** @brief Defines a macro for retrieving the actual SoftDevice ID from a given base address. Use + * @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the + * usual case). */ +#define SD_ID_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_ID_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ + ? (*((uint32_t *) ((baseaddr) + SD_ID_OFFSET))) : SDM_INFO_FIELD_INVALID) + +/** @brief Defines a macro for retrieving the actual SoftDevice version from a given base address. + * Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR + * (the usual case). */ +#define SD_VERSION_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_VERSION_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ + ? (*((uint32_t *) ((baseaddr) + SD_VERSION_OFFSET))) : SDM_INFO_FIELD_INVALID) + +/** @brief Defines a macro for retrieving the address of SoftDevice unique str based on a given base address. + * Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR + * (the usual case). */ +#define SD_UNIQUE_STR_ADDR_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_UNIQUE_STR_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ + ? (((uint8_t *) ((baseaddr) + SD_UNIQUE_STR_OFFSET))) : SDM_INFO_FIELD_INVALID) + +/**@defgroup NRF_FAULT_ID_RANGES Fault ID ranges + * @{ */ +#define NRF_FAULT_ID_SD_RANGE_START 0x00000000 /**< SoftDevice ID range start. */ +#define NRF_FAULT_ID_APP_RANGE_START 0x00001000 /**< Application ID range start. */ +/**@} */ + +/**@defgroup NRF_FAULT_IDS Fault ID types + * @{ */ +#define NRF_FAULT_ID_SD_ASSERT (NRF_FAULT_ID_SD_RANGE_START + 1) /**< SoftDevice assertion. The info parameter is reserved for future used. */ +#define NRF_FAULT_ID_APP_MEMACC (NRF_FAULT_ID_APP_RANGE_START + 1) /**< Application invalid memory access. The info parameter will contain 0x00000000, + in case of SoftDevice RAM access violation. In case of SoftDevice peripheral + register violation the info parameter will contain the sub-region number of + PREGION[0], on whose address range the disallowed write access caused the + memory access fault. */ +/**@} */ + +/** @} */ + +/** @addtogroup NRF_SDM_ENUMS Enumerations + * @{ */ + +/**@brief nRF SoftDevice Manager API SVC numbers. */ +enum NRF_SD_SVCS +{ + SD_SOFTDEVICE_ENABLE = SDM_SVC_BASE, /**< ::sd_softdevice_enable */ + SD_SOFTDEVICE_DISABLE, /**< ::sd_softdevice_disable */ + SD_SOFTDEVICE_IS_ENABLED, /**< ::sd_softdevice_is_enabled */ + SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, /**< ::sd_softdevice_vector_table_base_set */ + SVC_SDM_LAST /**< Placeholder for last SDM SVC */ +}; + +/** @} */ + +/** @addtogroup NRF_SDM_DEFINES Defines + * @{ */ + +/**@defgroup NRF_CLOCK_LF_ACCURACY Clock accuracy + * @{ */ + +#define NRF_CLOCK_LF_ACCURACY_250_PPM (0) /**< Default: 250 ppm */ +#define NRF_CLOCK_LF_ACCURACY_500_PPM (1) /**< 500 ppm */ +#define NRF_CLOCK_LF_ACCURACY_150_PPM (2) /**< 150 ppm */ +#define NRF_CLOCK_LF_ACCURACY_100_PPM (3) /**< 100 ppm */ +#define NRF_CLOCK_LF_ACCURACY_75_PPM (4) /**< 75 ppm */ +#define NRF_CLOCK_LF_ACCURACY_50_PPM (5) /**< 50 ppm */ +#define NRF_CLOCK_LF_ACCURACY_30_PPM (6) /**< 30 ppm */ +#define NRF_CLOCK_LF_ACCURACY_20_PPM (7) /**< 20 ppm */ +#define NRF_CLOCK_LF_ACCURACY_10_PPM (8) /**< 10 ppm */ +#define NRF_CLOCK_LF_ACCURACY_5_PPM (9) /**< 5 ppm */ +#define NRF_CLOCK_LF_ACCURACY_2_PPM (10) /**< 2 ppm */ +#define NRF_CLOCK_LF_ACCURACY_1_PPM (11) /**< 1 ppm */ + +/** @} */ + +/**@defgroup NRF_CLOCK_LF_SRC Possible LFCLK oscillator sources + * @{ */ + +#define NRF_CLOCK_LF_SRC_RC (0) /**< LFCLK RC oscillator. */ +#define NRF_CLOCK_LF_SRC_XTAL (1) /**< LFCLK crystal oscillator. */ +#define NRF_CLOCK_LF_SRC_SYNTH (2) /**< LFCLK Synthesized from HFCLK. */ + +/** @} */ + +/** @} */ + +/** @addtogroup NRF_SDM_TYPES Types + * @{ */ + +/**@brief Type representing LFCLK oscillator source. */ +typedef struct +{ + uint8_t source; /**< LF oscillator clock source, see @ref NRF_CLOCK_LF_SRC. */ + uint8_t rc_ctiv; /**< Only for ::NRF_CLOCK_LF_SRC_RC: Calibration timer interval in 1/4 second + units (nRF52: 1-32). + @note To avoid excessive clock drift, 0.5 degrees Celsius is the + maximum temperature change allowed in one calibration timer + interval. The interval should be selected to ensure this. + + @note Must be 0 if source is not ::NRF_CLOCK_LF_SRC_RC. */ + uint8_t rc_temp_ctiv; /**< Only for ::NRF_CLOCK_LF_SRC_RC: How often (in number of calibration + intervals) the RC oscillator shall be calibrated if the temperature + hasn't changed. + 0: Always calibrate even if the temperature hasn't changed. + 1: Only calibrate if the temperature has changed (legacy - nRF51 only). + 2-33: Check the temperature and only calibrate if it has changed, + however calibration will take place every rc_temp_ctiv + intervals in any case. + + @note Must be 0 if source is not ::NRF_CLOCK_LF_SRC_RC. + + @note For nRF52, the application must ensure calibration at least once + every 8 seconds to ensure +/-500 ppm clock stability. The + recommended configuration for ::NRF_CLOCK_LF_SRC_RC on nRF52 is + rc_ctiv=16 and rc_temp_ctiv=2. This will ensure calibration at + least once every 8 seconds and for temperature changes of 0.5 + degrees Celsius every 4 seconds. See the Product Specification + for the nRF52 device being used for more information.*/ + uint8_t accuracy; /**< External clock accuracy used in the LL to compute timing + windows, see @ref NRF_CLOCK_LF_ACCURACY.*/ +} nrf_clock_lf_cfg_t; + +/**@brief Fault Handler type. + * + * When certain unrecoverable errors occur within the application or SoftDevice the fault handler will be called back. + * The protocol stack will be in an undefined state when this happens and the only way to recover will be to + * perform a reset, using e.g. CMSIS NVIC_SystemReset(). + * If the application returns from the fault handler the SoftDevice will call NVIC_SystemReset(). + * + * @note This callback is executed in HardFault context, thus SVC functions cannot be called from the fault callback. + * + * @param[in] id Fault identifier. See @ref NRF_FAULT_IDS. + * @param[in] pc The program counter of the instruction that triggered the fault. + * @param[in] info Optional additional information regarding the fault. Refer to each Fault identifier for details. + * + * @note When id is set to @ref NRF_FAULT_ID_APP_MEMACC, pc will contain the address of the instruction being executed at the time when + * the fault is detected by the CPU. The CPU program counter may have advanced up to 2 instructions (no branching) after the one that triggered the fault. + */ +typedef void (*nrf_fault_handler_t)(uint32_t id, uint32_t pc, uint32_t info); + +/** @} */ + +/** @addtogroup NRF_SDM_FUNCTIONS Functions + * @{ */ + +/**@brief Enables the SoftDevice and by extension the protocol stack. + * + * @note Some care must be taken if a low frequency clock source is already running when calling this function: + * If the LF clock has a different source then the one currently running, it will be stopped. Then, the new + * clock source will be started. + * + * @note This function has no effect when returning with an error. + * + * @post If return code is ::NRF_SUCCESS + * - SoC library and protocol stack APIs are made available. + * - A portion of RAM will be unavailable (see relevant SDS documentation). + * - Some peripherals will be unavailable or available only through the SoC API (see relevant SDS documentation). + * - Interrupts will not arrive from protected peripherals or interrupts. + * - nrf_nvic_ functions must be used instead of CMSIS NVIC_ functions for reliable usage of the SoftDevice. + * - Interrupt latency may be affected by the SoftDevice (see relevant SDS documentation). + * - Chosen low frequency clock source will be running. + * + * @param p_clock_lf_cfg Low frequency clock source and accuracy. + If NULL the clock will be configured as an RC source with rc_ctiv = 16 and .rc_temp_ctiv = 2 + In the case of XTAL source, the PPM accuracy of the chosen clock source must be greater than or equal to the actual characteristics of your XTAL clock. + * @param fault_handler Callback to be invoked in case of fault, cannot be NULL. + * + * @retval ::NRF_SUCCESS + * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. + * @retval ::NRF_ERROR_INVALID_STATE SoftDevice is already enabled, and the clock source and fault handler cannot be updated. + * @retval ::NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION SoftDevice interrupt is already enabled, or an enabled interrupt has an illegal priority level. + * @retval ::NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN Unknown low frequency clock source selected. + * @retval ::NRF_ERROR_INVALID_PARAM Invalid clock source configuration supplied in p_clock_lf_cfg. + */ +SVCALL(SD_SOFTDEVICE_ENABLE, uint32_t, sd_softdevice_enable(nrf_clock_lf_cfg_t const * p_clock_lf_cfg, nrf_fault_handler_t fault_handler)); + + +/**@brief Disables the SoftDevice and by extension the protocol stack. + * + * Idempotent function to disable the SoftDevice. + * + * @post SoC library and protocol stack APIs are made unavailable. + * @post All interrupts that was protected by the SoftDevice will be disabled and initialized to priority 0 (highest). + * @post All peripherals used by the SoftDevice will be reset to default values. + * @post All of RAM become available. + * @post All interrupts are forwarded to the application. + * @post LFCLK source chosen in ::sd_softdevice_enable will be left running. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_SOFTDEVICE_DISABLE, uint32_t, sd_softdevice_disable(void)); + +/**@brief Check if the SoftDevice is enabled. + * + * @param[out] p_softdevice_enabled If the SoftDevice is enabled: 1 else 0. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_SOFTDEVICE_IS_ENABLED, uint32_t, sd_softdevice_is_enabled(uint8_t * p_softdevice_enabled)); + +/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the SoftDevice + * + * This function is only intended to be called when a bootloader is enabled. + * + * @param[in] address The base address of the interrupt vector table for forwarded interrupts. + + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, uint32_t, sd_softdevice_vector_table_base_set(uint32_t address)); + +/** @} */ + +#ifdef __cplusplus +} +#endif +#endif // NRF_SDM_H__ + +/** + @} +*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_soc.h new file mode 100644 index 00000000000..3fa177281eb --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_soc.h @@ -0,0 +1,1036 @@ +/* + * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @defgroup nrf_soc_api SoC Library API + * @{ + * + * @brief APIs for the SoC library. + * + */ + +#ifndef NRF_SOC_H__ +#define NRF_SOC_H__ + +#include +#include "nrf.h" +#include "nrf_svc.h" +#include "nrf_error.h" +#include "nrf_error_soc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/**@addtogroup NRF_SOC_DEFINES Defines + * @{ */ + +/**@brief The number of the lowest SVC number reserved for the SoC library. */ +#define SOC_SVC_BASE (0x20) /**< Base value for SVCs that are available when the SoftDevice is disabled. */ +#define SOC_SVC_BASE_NOT_AVAILABLE (0x2C) /**< Base value for SVCs that are not available when the SoftDevice is disabled. */ + +/**@brief Guaranteed time for application to process radio inactive notification. */ +#define NRF_RADIO_NOTIFICATION_INACTIVE_GUARANTEED_TIME_US (62) + +/**@brief The minimum allowed timeslot extension time. */ +#define NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US (200) + +/**@brief The maximum processing time to handle a timeslot extension. */ +#define NRF_RADIO_MAX_EXTENSION_PROCESSING_TIME_US (17) + +/**@brief The latest time before the end of a timeslot the timeslot can be extended. */ +#define NRF_RADIO_MIN_EXTENSION_MARGIN_US (79) + +#define SOC_ECB_KEY_LENGTH (16) /**< ECB key length. */ +#define SOC_ECB_CLEARTEXT_LENGTH (16) /**< ECB cleartext length. */ +#define SOC_ECB_CIPHERTEXT_LENGTH (SOC_ECB_CLEARTEXT_LENGTH) /**< ECB ciphertext length. */ + +#define SD_EVT_IRQn (SWI2_IRQn) /**< SoftDevice Event IRQ number. Used for both protocol events and SoC events. */ +#define SD_EVT_IRQHandler (SWI2_IRQHandler) /**< SoftDevice Event IRQ handler. Used for both protocol events and SoC events. + The default interrupt priority for this handler is set to 4 */ +#define RADIO_NOTIFICATION_IRQn (SWI1_IRQn) /**< The radio notification IRQ number. */ +#define RADIO_NOTIFICATION_IRQHandler (SWI1_IRQHandler) /**< The radio notification IRQ handler. + The default interrupt priority for this handler is set to 4 */ +#define NRF_RADIO_LENGTH_MIN_US (100) /**< The shortest allowed radio timeslot, in microseconds. */ +#define NRF_RADIO_LENGTH_MAX_US (100000) /**< The longest allowed radio timeslot, in microseconds. */ + +#define NRF_RADIO_DISTANCE_MAX_US (128000000UL - 1UL) /**< The longest timeslot distance, in microseconds, allowed for the distance parameter (see @ref nrf_radio_request_normal_t) in the request. */ + +#define NRF_RADIO_EARLIEST_TIMEOUT_MAX_US (128000000UL - 1UL) /**< The longest timeout, in microseconds, allowed when requesting the earliest possible timeslot. */ + +#define NRF_RADIO_START_JITTER_US (2) /**< The maximum jitter in @ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START relative to the requested start time. */ + +/**@} */ + +/**@addtogroup NRF_SOC_ENUMS Enumerations + * @{ */ + +/**@brief The SVC numbers used by the SVC functions in the SoC library. */ +enum NRF_SOC_SVCS +{ + SD_PPI_CHANNEL_ENABLE_GET = SOC_SVC_BASE, + SD_PPI_CHANNEL_ENABLE_SET = SOC_SVC_BASE + 1, + SD_PPI_CHANNEL_ENABLE_CLR = SOC_SVC_BASE + 2, + SD_PPI_CHANNEL_ASSIGN = SOC_SVC_BASE + 3, + SD_PPI_GROUP_TASK_ENABLE = SOC_SVC_BASE + 4, + SD_PPI_GROUP_TASK_DISABLE = SOC_SVC_BASE + 5, + SD_PPI_GROUP_ASSIGN = SOC_SVC_BASE + 6, + SD_PPI_GROUP_GET = SOC_SVC_BASE + 7, + SD_FLASH_PAGE_ERASE = SOC_SVC_BASE + 8, + SD_FLASH_WRITE = SOC_SVC_BASE + 9, + SD_PROTECTED_REGISTER_WRITE = SOC_SVC_BASE + 11, + SD_MUTEX_NEW = SOC_SVC_BASE_NOT_AVAILABLE, + SD_MUTEX_ACQUIRE = SOC_SVC_BASE_NOT_AVAILABLE + 1, + SD_MUTEX_RELEASE = SOC_SVC_BASE_NOT_AVAILABLE + 2, + SD_RAND_APPLICATION_POOL_CAPACITY_GET = SOC_SVC_BASE_NOT_AVAILABLE + 3, + SD_RAND_APPLICATION_BYTES_AVAILABLE_GET = SOC_SVC_BASE_NOT_AVAILABLE + 4, + SD_RAND_APPLICATION_VECTOR_GET = SOC_SVC_BASE_NOT_AVAILABLE + 5, + SD_POWER_MODE_SET = SOC_SVC_BASE_NOT_AVAILABLE + 6, + SD_POWER_SYSTEM_OFF = SOC_SVC_BASE_NOT_AVAILABLE + 7, + SD_POWER_RESET_REASON_GET = SOC_SVC_BASE_NOT_AVAILABLE + 8, + SD_POWER_RESET_REASON_CLR = SOC_SVC_BASE_NOT_AVAILABLE + 9, + SD_POWER_POF_ENABLE = SOC_SVC_BASE_NOT_AVAILABLE + 10, + SD_POWER_POF_THRESHOLD_SET = SOC_SVC_BASE_NOT_AVAILABLE + 11, + SD_POWER_POF_THRESHOLDVDDH_SET = SOC_SVC_BASE_NOT_AVAILABLE + 12, + SD_POWER_RAM_POWER_SET = SOC_SVC_BASE_NOT_AVAILABLE + 13, + SD_POWER_RAM_POWER_CLR = SOC_SVC_BASE_NOT_AVAILABLE + 14, + SD_POWER_RAM_POWER_GET = SOC_SVC_BASE_NOT_AVAILABLE + 15, + SD_POWER_GPREGRET_SET = SOC_SVC_BASE_NOT_AVAILABLE + 16, + SD_POWER_GPREGRET_CLR = SOC_SVC_BASE_NOT_AVAILABLE + 17, + SD_POWER_GPREGRET_GET = SOC_SVC_BASE_NOT_AVAILABLE + 18, + SD_POWER_DCDC_MODE_SET = SOC_SVC_BASE_NOT_AVAILABLE + 19, + SD_POWER_DCDC0_MODE_SET = SOC_SVC_BASE_NOT_AVAILABLE + 20, + SD_APP_EVT_WAIT = SOC_SVC_BASE_NOT_AVAILABLE + 21, + SD_CLOCK_HFCLK_REQUEST = SOC_SVC_BASE_NOT_AVAILABLE + 22, + SD_CLOCK_HFCLK_RELEASE = SOC_SVC_BASE_NOT_AVAILABLE + 23, + SD_CLOCK_HFCLK_IS_RUNNING = SOC_SVC_BASE_NOT_AVAILABLE + 24, + SD_RADIO_NOTIFICATION_CFG_SET = SOC_SVC_BASE_NOT_AVAILABLE + 25, + SD_ECB_BLOCK_ENCRYPT = SOC_SVC_BASE_NOT_AVAILABLE + 26, + SD_ECB_BLOCKS_ENCRYPT = SOC_SVC_BASE_NOT_AVAILABLE + 27, + SD_RADIO_SESSION_OPEN = SOC_SVC_BASE_NOT_AVAILABLE + 28, + SD_RADIO_SESSION_CLOSE = SOC_SVC_BASE_NOT_AVAILABLE + 29, + SD_RADIO_REQUEST = SOC_SVC_BASE_NOT_AVAILABLE + 30, + SD_EVT_GET = SOC_SVC_BASE_NOT_AVAILABLE + 31, + SD_TEMP_GET = SOC_SVC_BASE_NOT_AVAILABLE + 32, + SD_POWER_USBPWRRDY_ENABLE = SOC_SVC_BASE_NOT_AVAILABLE + 33, + SD_POWER_USBDETECTED_ENABLE = SOC_SVC_BASE_NOT_AVAILABLE + 34, + SD_POWER_USBREMOVED_ENABLE = SOC_SVC_BASE_NOT_AVAILABLE + 35, + SD_POWER_USBREGSTATUS_GET = SOC_SVC_BASE_NOT_AVAILABLE + 36, + SVC_SOC_LAST = SOC_SVC_BASE_NOT_AVAILABLE + 37 +}; + +/**@brief Possible values of a ::nrf_mutex_t. */ +enum NRF_MUTEX_VALUES +{ + NRF_MUTEX_FREE, + NRF_MUTEX_TAKEN +}; + +/**@brief Power modes. */ +enum NRF_POWER_MODES +{ + NRF_POWER_MODE_CONSTLAT, /**< Constant latency mode. See power management in the reference manual. */ + NRF_POWER_MODE_LOWPWR /**< Low power mode. See power management in the reference manual. */ +}; + + +/**@brief Power failure thresholds */ +enum NRF_POWER_THRESHOLDS +{ + NRF_POWER_THRESHOLD_V17 = 4UL, /**< 1.7 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V18, /**< 1.8 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V19, /**< 1.9 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V20, /**< 2.0 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V21, /**< 2.1 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V22, /**< 2.2 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V23, /**< 2.3 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V24, /**< 2.4 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V25, /**< 2.5 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V26, /**< 2.6 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V27, /**< 2.7 Volts power failure threshold. */ + NRF_POWER_THRESHOLD_V28 /**< 2.8 Volts power failure threshold. */ +}; + +/**@brief Power failure thresholds for high voltage */ +enum NRF_POWER_THRESHOLDVDDHS +{ + NRF_POWER_THRESHOLDVDDH_V27, /**< 2.7 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V28, /**< 2.8 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V29, /**< 2.9 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V30, /**< 3.0 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V31, /**< 3.1 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V32, /**< 3.2 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V33, /**< 3.3 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V34, /**< 3.4 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V35, /**< 3.5 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V36, /**< 3.6 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V37, /**< 3.7 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V38, /**< 3.8 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V39, /**< 3.9 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V40, /**< 4.0 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V41, /**< 4.1 Volts power failure threshold. */ + NRF_POWER_THRESHOLDVDDH_V42 /**< 4.2 Volts power failure threshold. */ +}; + + +/**@brief DC/DC converter modes. */ +enum NRF_POWER_DCDC_MODES +{ + NRF_POWER_DCDC_DISABLE, /**< The DCDC is disabled. */ + NRF_POWER_DCDC_ENABLE /**< The DCDC is enabled. */ +}; + +/**@brief Radio notification distances. */ +enum NRF_RADIO_NOTIFICATION_DISTANCES +{ + NRF_RADIO_NOTIFICATION_DISTANCE_NONE = 0, /**< The event does not have a notification. */ + NRF_RADIO_NOTIFICATION_DISTANCE_800US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_1740US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_2680US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_3620US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_4560US, /**< The distance from the active notification to start of radio activity. */ + NRF_RADIO_NOTIFICATION_DISTANCE_5500US /**< The distance from the active notification to start of radio activity. */ +}; + + +/**@brief Radio notification types. */ +enum NRF_RADIO_NOTIFICATION_TYPES +{ + NRF_RADIO_NOTIFICATION_TYPE_NONE = 0, /**< The event does not have a radio notification signal. */ + NRF_RADIO_NOTIFICATION_TYPE_INT_ON_ACTIVE, /**< Using interrupt for notification when the radio will be enabled. */ + NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE, /**< Using interrupt for notification when the radio has been disabled. */ + NRF_RADIO_NOTIFICATION_TYPE_INT_ON_BOTH, /**< Using interrupt for notification both when the radio will be enabled and disabled. */ +}; + +/**@brief The Radio signal callback types. */ +enum NRF_RADIO_CALLBACK_SIGNAL_TYPE +{ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_START, /**< This signal indicates the start of the radio timeslot. */ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_TIMER0, /**< This signal indicates the NRF_TIMER0 interrupt. */ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_RADIO, /**< This signal indicates the NRF_RADIO interrupt. */ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_EXTEND_FAILED, /**< This signal indicates extend action failed. */ + NRF_RADIO_CALLBACK_SIGNAL_TYPE_EXTEND_SUCCEEDED /**< This signal indicates extend action succeeded. */ +}; + +/**@brief The actions requested by the signal callback. + * + * This code gives the SOC instructions about what action to take when the signal callback has + * returned. + */ +enum NRF_RADIO_SIGNAL_CALLBACK_ACTION +{ + NRF_RADIO_SIGNAL_CALLBACK_ACTION_NONE, /**< Return without action. */ + NRF_RADIO_SIGNAL_CALLBACK_ACTION_EXTEND, /**< Request an extension of the current + timeslot. Maximum execution time for this action: + @ref NRF_RADIO_MAX_EXTENSION_PROCESSING_TIME_US. + This action must be started at least + @ref NRF_RADIO_MIN_EXTENSION_MARGIN_US before + the end of the timeslot. */ + NRF_RADIO_SIGNAL_CALLBACK_ACTION_END, /**< End the current radio timeslot. */ + NRF_RADIO_SIGNAL_CALLBACK_ACTION_REQUEST_AND_END /**< Request a new radio timeslot and end the current timeslot. */ +}; + +/**@brief Radio timeslot high frequency clock source configuration. */ +enum NRF_RADIO_HFCLK_CFG +{ + NRF_RADIO_HFCLK_CFG_XTAL_GUARANTEED, /**< The SoftDevice will guarantee that the high frequency clock source is the + external crystal for the whole duration of the timeslot. This should be the + preferred option for events that use the radio or require high timing accuracy. + @note The SoftDevice will automatically turn on and off the external crystal, + at the beginning and end of the timeslot, respectively. The crystal may also + intentionally be left running after the timeslot, in cases where it is needed + by the SoftDevice shortly after the end of the timeslot. */ + NRF_RADIO_HFCLK_CFG_NO_GUARANTEE /**< This configuration allows for earlier and tighter scheduling of timeslots. + The RC oscillator may be the clock source in part or for the whole duration of the timeslot. + The RC oscillator's accuracy must therefore be taken into consideration. + @note If the application will use the radio peripheral in timeslots with this configuration, + it must make sure that the crystal is running and stable before starting the radio. */ +}; + +/**@brief Radio timeslot priorities. */ +enum NRF_RADIO_PRIORITY +{ + NRF_RADIO_PRIORITY_HIGH, /**< High (equal priority as the normal connection priority of the SoftDevice stack(s)). */ + NRF_RADIO_PRIORITY_NORMAL, /**< Normal (equal priority as the priority of secondary activities of the SoftDevice stack(s)). */ +}; + +/**@brief Radio timeslot request type. */ +enum NRF_RADIO_REQUEST_TYPE +{ + NRF_RADIO_REQ_TYPE_EARLIEST, /**< Request radio timeslot as early as possible. This should always be used for the first request in a session. */ + NRF_RADIO_REQ_TYPE_NORMAL /**< Normal radio timeslot request. */ +}; + +/**@brief SoC Events. */ +enum NRF_SOC_EVTS +{ + NRF_EVT_HFCLKSTARTED, /**< Event indicating that the HFCLK has started. */ + NRF_EVT_POWER_FAILURE_WARNING, /**< Event indicating that a power failure warning has occurred. */ + NRF_EVT_FLASH_OPERATION_SUCCESS, /**< Event indicating that the ongoing flash operation has completed successfully. */ + NRF_EVT_FLASH_OPERATION_ERROR, /**< Event indicating that the ongoing flash operation has timed out with an error. */ + NRF_EVT_RADIO_BLOCKED, /**< Event indicating that a radio timeslot was blocked. */ + NRF_EVT_RADIO_CANCELED, /**< Event indicating that a radio timeslot was canceled by SoftDevice. */ + NRF_EVT_RADIO_SIGNAL_CALLBACK_INVALID_RETURN, /**< Event indicating that a radio timeslot signal callback handler return was invalid. */ + NRF_EVT_RADIO_SESSION_IDLE, /**< Event indicating that a radio timeslot session is idle. */ + NRF_EVT_RADIO_SESSION_CLOSED, /**< Event indicating that a radio timeslot session is closed. */ + NRF_EVT_POWER_USB_POWER_READY, /**< Event indicating that a USB 3.3 V supply is ready. */ + NRF_EVT_POWER_USB_DETECTED, /**< Event indicating that voltage supply is detected on VBUS. */ + NRF_EVT_POWER_USB_REMOVED, /**< Event indicating that voltage supply is removed from VBUS. */ + NRF_EVT_NUMBER_OF_EVTS +}; + +/**@} */ + + +/**@addtogroup NRF_SOC_STRUCTURES Structures + * @{ */ + +/**@brief Represents a mutex for use with the nrf_mutex functions. + * @note Accessing the value directly is not safe, use the mutex functions! + */ +typedef volatile uint8_t nrf_mutex_t; + +/**@brief Parameters for a request for a timeslot as early as possible. */ +typedef struct +{ + uint8_t hfclk; /**< High frequency clock source, see @ref NRF_RADIO_HFCLK_CFG. */ + uint8_t priority; /**< The radio timeslot priority, see @ref NRF_RADIO_PRIORITY. */ + uint32_t length_us; /**< The radio timeslot length (in the range 100 to 100,000] microseconds). */ + uint32_t timeout_us; /**< Longest acceptable delay until the start of the requested timeslot (up to @ref NRF_RADIO_EARLIEST_TIMEOUT_MAX_US microseconds). */ +} nrf_radio_request_earliest_t; + +/**@brief Parameters for a normal radio timeslot request. */ +typedef struct +{ + uint8_t hfclk; /**< High frequency clock source, see @ref NRF_RADIO_HFCLK_CFG. */ + uint8_t priority; /**< The radio timeslot priority, see @ref NRF_RADIO_PRIORITY. */ + uint32_t distance_us; /**< Distance from the start of the previous radio timeslot (up to @ref NRF_RADIO_DISTANCE_MAX_US microseconds). */ + uint32_t length_us; /**< The radio timeslot length (in the range [100..100,000] microseconds). */ +} nrf_radio_request_normal_t; + +/**@brief Radio timeslot request parameters. */ +typedef struct +{ + uint8_t request_type; /**< Type of request, see @ref NRF_RADIO_REQUEST_TYPE. */ + union + { + nrf_radio_request_earliest_t earliest; /**< Parameters for requesting a radio timeslot as early as possible. */ + nrf_radio_request_normal_t normal; /**< Parameters for requesting a normal radio timeslot. */ + } params; /**< Parameter union. */ +} nrf_radio_request_t; + +/**@brief Return parameters of the radio timeslot signal callback. */ +typedef struct +{ + uint8_t callback_action; /**< The action requested by the application when returning from the signal callback, see @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION. */ + union + { + struct + { + nrf_radio_request_t * p_next; /**< The request parameters for the next radio timeslot. */ + } request; /**< Additional parameters for return_code @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION_REQUEST_AND_END. */ + struct + { + uint32_t length_us; /**< Requested extension of the radio timeslot duration (microseconds) (for minimum time see @ref NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US). */ + } extend; /**< Additional parameters for return_code @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION_EXTEND. */ + } params; /**< Parameter union. */ +} nrf_radio_signal_callback_return_param_t; + +/**@brief The radio timeslot signal callback type. + * + * @note In case of invalid return parameters, the radio timeslot will automatically end + * immediately after returning from the signal callback and the + * @ref NRF_EVT_RADIO_SIGNAL_CALLBACK_INVALID_RETURN event will be sent. + * @note The returned struct pointer must remain valid after the signal callback + * function returns. For instance, this means that it must not point to a stack variable. + * + * @param[in] signal_type Type of signal, see @ref NRF_RADIO_CALLBACK_SIGNAL_TYPE. + * + * @return Pointer to structure containing action requested by the application. + */ +typedef nrf_radio_signal_callback_return_param_t * (*nrf_radio_signal_callback_t) (uint8_t signal_type); + +/**@brief AES ECB parameter typedefs */ +typedef uint8_t soc_ecb_key_t[SOC_ECB_KEY_LENGTH]; /**< Encryption key type. */ +typedef uint8_t soc_ecb_cleartext_t[SOC_ECB_CLEARTEXT_LENGTH]; /**< Cleartext data type. */ +typedef uint8_t soc_ecb_ciphertext_t[SOC_ECB_CIPHERTEXT_LENGTH]; /**< Ciphertext data type. */ + +/**@brief AES ECB data structure */ +typedef struct +{ + soc_ecb_key_t key; /**< Encryption key. */ + soc_ecb_cleartext_t cleartext; /**< Cleartext data. */ + soc_ecb_ciphertext_t ciphertext; /**< Ciphertext data. */ +} nrf_ecb_hal_data_t; + +/**@brief AES ECB block. Used to provide multiple blocks in a single call + to @ref sd_ecb_blocks_encrypt.*/ +typedef struct +{ + soc_ecb_key_t const * p_key; /**< Pointer to the Encryption key. */ + soc_ecb_cleartext_t const * p_cleartext; /**< Pointer to the Cleartext data. */ + soc_ecb_ciphertext_t * p_ciphertext; /**< Pointer to the Ciphertext data. */ +} nrf_ecb_hal_data_block_t; + +/**@} */ + +/**@addtogroup NRF_SOC_FUNCTIONS Functions + * @{ */ + +/**@brief Initialize a mutex. + * + * @param[in] p_mutex Pointer to the mutex to initialize. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_MUTEX_NEW, uint32_t, sd_mutex_new(nrf_mutex_t * p_mutex)); + +/**@brief Attempt to acquire a mutex. + * + * @param[in] p_mutex Pointer to the mutex to acquire. + * + * @retval ::NRF_SUCCESS The mutex was successfully acquired. + * @retval ::NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN The mutex could not be acquired. + */ +SVCALL(SD_MUTEX_ACQUIRE, uint32_t, sd_mutex_acquire(nrf_mutex_t * p_mutex)); + +/**@brief Release a mutex. + * + * @param[in] p_mutex Pointer to the mutex to release. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_MUTEX_RELEASE, uint32_t, sd_mutex_release(nrf_mutex_t * p_mutex)); + +/**@brief Query the capacity of the application random pool. + * + * @param[out] p_pool_capacity The capacity of the pool. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_RAND_APPLICATION_POOL_CAPACITY_GET, uint32_t, sd_rand_application_pool_capacity_get(uint8_t * p_pool_capacity)); + +/**@brief Get number of random bytes available to the application. + * + * @param[out] p_bytes_available The number of bytes currently available in the pool. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_RAND_APPLICATION_BYTES_AVAILABLE_GET, uint32_t, sd_rand_application_bytes_available_get(uint8_t * p_bytes_available)); + +/**@brief Get random bytes from the application pool. + * + * @param[out] p_buff Pointer to unit8_t buffer for storing the bytes. + * @param[in] length Number of bytes to take from pool and place in p_buff. + * + * @retval ::NRF_SUCCESS The requested bytes were written to p_buff. + * @retval ::NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES No bytes were written to the buffer, because there were not enough bytes available. +*/ +SVCALL(SD_RAND_APPLICATION_VECTOR_GET, uint32_t, sd_rand_application_vector_get(uint8_t * p_buff, uint8_t length)); + +/**@brief Gets the reset reason register. + * + * @param[out] p_reset_reason Contents of the NRF_POWER->RESETREAS register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RESET_REASON_GET, uint32_t, sd_power_reset_reason_get(uint32_t * p_reset_reason)); + +/**@brief Clears the bits of the reset reason register. + * + * @param[in] reset_reason_clr_msk Contains the bits to clear from the reset reason register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RESET_REASON_CLR, uint32_t, sd_power_reset_reason_clr(uint32_t reset_reason_clr_msk)); + +/**@brief Sets the power mode when in CPU sleep. + * + * @param[in] power_mode The power mode to use when in CPU sleep, see @ref NRF_POWER_MODES. @sa sd_app_evt_wait + * + * @retval ::NRF_SUCCESS The power mode was set. + * @retval ::NRF_ERROR_SOC_POWER_MODE_UNKNOWN The power mode was unknown. + */ +SVCALL(SD_POWER_MODE_SET, uint32_t, sd_power_mode_set(uint8_t power_mode)); + +/**@brief Puts the chip in System OFF mode. + * + * @retval ::NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN + */ +SVCALL(SD_POWER_SYSTEM_OFF, uint32_t, sd_power_system_off(void)); + +/**@brief Enables or disables the power-fail comparator. + * + * Enabling this will give a SoftDevice event (NRF_EVT_POWER_FAILURE_WARNING) when the power failure warning occurs. + * The event can be retrieved with sd_evt_get(); + * + * @param[in] pof_enable True if the power-fail comparator should be enabled, false if it should be disabled. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_POF_ENABLE, uint32_t, sd_power_pof_enable(uint8_t pof_enable)); + +/**@brief Enables or disables the USB power ready event. + * + * Enabling this will give a SoftDevice event (NRF_EVT_POWER_USB_POWER_READY) when a USB 3.3 V supply is ready. + * The event can be retrieved with sd_evt_get(); + * + * @param[in] usbpwrrdy_enable True if the power ready event should be enabled, false if it should be disabled. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_USBPWRRDY_ENABLE, uint32_t, sd_power_usbpwrrdy_enable(uint8_t usbpwrrdy_enable)); + +/**@brief Enables or disables the power USB-detected event. + * + * Enabling this will give a SoftDevice event (NRF_EVT_POWER_USB_DETECTED) when a voltage supply is detected on VBUS. + * The event can be retrieved with sd_evt_get(); + * + * @param[in] usbdetected_enable True if the power ready event should be enabled, false if it should be disabled. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_USBDETECTED_ENABLE, uint32_t, sd_power_usbdetected_enable(uint8_t usbdetected_enable)); + +/**@brief Enables or disables the power USB-removed event. + * + * Enabling this will give a SoftDevice event (NRF_EVT_POWER_USB_REMOVED) when a voltage supply is removed from VBUS. + * The event can be retrieved with sd_evt_get(); + * + * @param[in] usbremoved_enable True if the power ready event should be enabled, false if it should be disabled. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_USBREMOVED_ENABLE, uint32_t, sd_power_usbremoved_enable(uint8_t usbremoved_enable)); + +/**@brief Get USB supply status register content. + * + * @param[out] usbregstatus The content of USBREGSTATUS register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_USBREGSTATUS_GET, uint32_t, sd_power_usbregstatus_get(uint32_t * usbregstatus)); + +/**@brief Sets the power failure comparator threshold value. + * + * @note: Power failure comparator threshold setting. This setting applies both for normal voltage + * mode (supply connected to both VDD and VDDH) and high voltage mode (supply connected to + * VDDH only). + * + * @param[in] threshold The power-fail threshold value to use, see @ref NRF_POWER_THRESHOLDS. + * + * @retval ::NRF_SUCCESS The power failure threshold was set. + * @retval ::NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN The power failure threshold is unknown. + */ +SVCALL(SD_POWER_POF_THRESHOLD_SET, uint32_t, sd_power_pof_threshold_set(uint8_t threshold)); + +/**@brief Sets the power failure comparator threshold value for high voltage. + * + * @note: Power failure comparator threshold setting for high voltage mode (supply connected to + * VDDH only). This setting does not apply for normal voltage mode (supply connected to both + * VDD and VDDH). + * + * @param[in] threshold The power-fail threshold value to use, see @ref NRF_POWER_THRESHOLDVDDHS. + * + * @retval ::NRF_SUCCESS The power failure threshold was set. + * @retval ::NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN The power failure threshold is unknown. + */ +SVCALL(SD_POWER_POF_THRESHOLDVDDH_SET, uint32_t, sd_power_pof_thresholdvddh_set(uint8_t threshold)); + +/**@brief Writes the NRF_POWER->RAM[index].POWERSET register. + * + * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWERSET register to write to. + * @param[in] ram_powerset Contains the word to write to the NRF_POWER->RAM[index].POWERSET register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RAM_POWER_SET, uint32_t, sd_power_ram_power_set(uint8_t index, uint32_t ram_powerset)); + +/**@brief Writes the NRF_POWER->RAM[index].POWERCLR register. + * + * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWERCLR register to write to. + * @param[in] ram_powerclr Contains the word to write to the NRF_POWER->RAM[index].POWERCLR register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RAM_POWER_CLR, uint32_t, sd_power_ram_power_clr(uint8_t index, uint32_t ram_powerclr)); + +/**@brief Get contents of NRF_POWER->RAM[index].POWER register, indicates power status of RAM[index] blocks. + * + * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWER register to read from. + * @param[out] p_ram_power Content of NRF_POWER->RAM[index].POWER register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_RAM_POWER_GET, uint32_t, sd_power_ram_power_get(uint8_t index, uint32_t * p_ram_power)); + +/**@brief Set bits in the general purpose retention registers (NRF_POWER->GPREGRET*). + * + * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. + * @param[in] gpregret_msk Bits to be set in the GPREGRET register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_GPREGRET_SET, uint32_t, sd_power_gpregret_set(uint32_t gpregret_id, uint32_t gpregret_msk)); + +/**@brief Clear bits in the general purpose retention registers (NRF_POWER->GPREGRET*). + * + * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. + * @param[in] gpregret_msk Bits to be clear in the GPREGRET register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_GPREGRET_CLR, uint32_t, sd_power_gpregret_clr(uint32_t gpregret_id, uint32_t gpregret_msk)); + +/**@brief Get contents of the general purpose retention registers (NRF_POWER->GPREGRET*). + * + * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. + * @param[out] p_gpregret Contents of the GPREGRET register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_POWER_GPREGRET_GET, uint32_t, sd_power_gpregret_get(uint32_t gpregret_id, uint32_t *p_gpregret)); + +/**@brief Enable or disable the DC/DC regulator for the regulator stage 1 (REG1). + * + * @param[in] dcdc_mode The mode of the DCDC, see @ref NRF_POWER_DCDC_MODES. + * + * @retval ::NRF_SUCCESS + * @retval ::NRF_ERROR_INVALID_PARAM The DCDC mode is invalid. + */ +SVCALL(SD_POWER_DCDC_MODE_SET, uint32_t, sd_power_dcdc_mode_set(uint8_t dcdc_mode)); + +/**@brief Enable or disable the DC/DC regulator for the regulator stage 0 (REG0). + * + * For more details on the REG0 stage, please see product specification. + * + * @param[in] dcdc_mode The mode of the DCDC0, see @ref NRF_POWER_DCDC_MODES. + * + * @retval ::NRF_SUCCESS + * @retval ::NRF_ERROR_INVALID_PARAM The dcdc_mode is invalid. + */ +SVCALL(SD_POWER_DCDC0_MODE_SET, uint32_t, sd_power_dcdc0_mode_set(uint8_t dcdc_mode)); + +/**@brief Request the high frequency crystal oscillator. + * + * Will start the high frequency crystal oscillator, the startup time of the crystal varies + * and the ::sd_clock_hfclk_is_running function can be polled to check if it has started. + * + * @see sd_clock_hfclk_is_running + * @see sd_clock_hfclk_release + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_CLOCK_HFCLK_REQUEST, uint32_t, sd_clock_hfclk_request(void)); + +/**@brief Releases the high frequency crystal oscillator. + * + * Will stop the high frequency crystal oscillator, this happens immediately. + * + * @see sd_clock_hfclk_is_running + * @see sd_clock_hfclk_request + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_CLOCK_HFCLK_RELEASE, uint32_t, sd_clock_hfclk_release(void)); + +/**@brief Checks if the high frequency crystal oscillator is running. + * + * @see sd_clock_hfclk_request + * @see sd_clock_hfclk_release + * + * @param[out] p_is_running 1 if the external crystal oscillator is running, 0 if not. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_CLOCK_HFCLK_IS_RUNNING, uint32_t, sd_clock_hfclk_is_running(uint32_t * p_is_running)); + +/**@brief Waits for an application event. + * + * An application event is either an application interrupt or a pended interrupt when the interrupt + * is disabled. + * + * When the application waits for an application event by calling this function, an interrupt that + * is enabled will be taken immediately on pending since this function will wait in thread mode, + * then the execution will return in the application's main thread. + * + * In order to wake up from disabled interrupts, the SEVONPEND flag has to be set in the Cortex-M + * MCU's System Control Register (SCR), CMSIS_SCB. In that case, when a disabled interrupt gets + * pended, this function will return to the application's main thread. + * + * @note The application must ensure that the pended flag is cleared using ::sd_nvic_ClearPendingIRQ + * in order to sleep using this function. This is only necessary for disabled interrupts, as + * the interrupt handler will clear the pending flag automatically for enabled interrupts. + * + * @note If an application interrupt has happened since the last time sd_app_evt_wait was + * called this function will return immediately and not go to sleep. This is to avoid race + * conditions that can occur when a flag is updated in the interrupt handler and processed + * in the main loop. + * + * @post An application interrupt has happened or a interrupt pending flag is set. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_APP_EVT_WAIT, uint32_t, sd_app_evt_wait(void)); + +/**@brief Get PPI channel enable register contents. + * + * @param[out] p_channel_enable The contents of the PPI CHEN register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_CHANNEL_ENABLE_GET, uint32_t, sd_ppi_channel_enable_get(uint32_t * p_channel_enable)); + +/**@brief Set PPI channel enable register. + * + * @param[in] channel_enable_set_msk Mask containing the bits to set in the PPI CHEN register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_CHANNEL_ENABLE_SET, uint32_t, sd_ppi_channel_enable_set(uint32_t channel_enable_set_msk)); + +/**@brief Clear PPI channel enable register. + * + * @param[in] channel_enable_clr_msk Mask containing the bits to clear in the PPI CHEN register. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_CHANNEL_ENABLE_CLR, uint32_t, sd_ppi_channel_enable_clr(uint32_t channel_enable_clr_msk)); + +/**@brief Assign endpoints to a PPI channel. + * + * @param[in] channel_num Number of the PPI channel to assign. + * @param[in] evt_endpoint Event endpoint of the PPI channel. + * @param[in] task_endpoint Task endpoint of the PPI channel. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_CHANNEL The channel number is invalid. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_CHANNEL_ASSIGN, uint32_t, sd_ppi_channel_assign(uint8_t channel_num, const volatile void * evt_endpoint, const volatile void * task_endpoint)); + +/**@brief Task to enable a channel group. + * + * @param[in] group_num Number of the channel group. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_GROUP_TASK_ENABLE, uint32_t, sd_ppi_group_task_enable(uint8_t group_num)); + +/**@brief Task to disable a channel group. + * + * @param[in] group_num Number of the PPI group. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_GROUP_TASK_DISABLE, uint32_t, sd_ppi_group_task_disable(uint8_t group_num)); + +/**@brief Assign PPI channels to a channel group. + * + * @param[in] group_num Number of the channel group. + * @param[in] channel_msk Mask of the channels to assign to the group. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_GROUP_ASSIGN, uint32_t, sd_ppi_group_assign(uint8_t group_num, uint32_t channel_msk)); + +/**@brief Gets the PPI channels of a channel group. + * + * @param[in] group_num Number of the channel group. + * @param[out] p_channel_msk Mask of the channels assigned to the group. + * + * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_PPI_GROUP_GET, uint32_t, sd_ppi_group_get(uint8_t group_num, uint32_t * p_channel_msk)); + +/**@brief Configures the Radio Notification signal. + * + * @note + * - The notification signal latency depends on the interrupt priority settings of SWI used + * for notification signal. + * - To ensure that the radio notification signal behaves in a consistent way, the radio + * notifications must be configured when there is no protocol stack or other SoftDevice + * activity in progress. It is recommended that the radio notification signal is + * configured directly after the SoftDevice has been enabled. + * - In the period between the ACTIVE signal and the start of the Radio Event, the SoftDevice + * will interrupt the application to do Radio Event preparation. + * - Using the Radio Notification feature may limit the bandwidth, as the SoftDevice may have + * to shorten the connection events to have time for the Radio Notification signals. + * + * @param[in] type Type of notification signal, see @ref NRF_RADIO_NOTIFICATION_TYPES. + * @ref NRF_RADIO_NOTIFICATION_TYPE_NONE shall be used to turn off radio + * notification. Using @ref NRF_RADIO_NOTIFICATION_DISTANCE_NONE is + * recommended (but not required) to be used with + * @ref NRF_RADIO_NOTIFICATION_TYPE_NONE. + * + * @param[in] distance Distance between the notification signal and start of radio activity, see @ref NRF_RADIO_NOTIFICATION_DISTANCES. + * This parameter is ignored when @ref NRF_RADIO_NOTIFICATION_TYPE_NONE or + * @ref NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE is used. + * + * @retval ::NRF_ERROR_INVALID_PARAM The group number is invalid. + * @retval ::NRF_ERROR_INVALID_STATE A protocol stack or other SoftDevice is running. Stop all + * running activities and retry. + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_RADIO_NOTIFICATION_CFG_SET, uint32_t, sd_radio_notification_cfg_set(uint8_t type, uint8_t distance)); + +/**@brief Encrypts a block according to the specified parameters. + * + * 128-bit AES encryption. + * + * @note: + * - The application may set the SEVONPEND bit in the SCR to 1 to make the SoftDevice sleep while + * the ECB is running. The SEVONPEND bit should only be cleared (set to 0) from application + * main or low interrupt level. + * + * @param[in, out] p_ecb_data Pointer to the ECB parameters' struct (two input + * parameters and one output parameter). + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_ECB_BLOCK_ENCRYPT, uint32_t, sd_ecb_block_encrypt(nrf_ecb_hal_data_t * p_ecb_data)); + +/**@brief Encrypts multiple data blocks provided as an array of data block structures. + * + * @details: Performs 128-bit AES encryption on multiple data blocks + * + * @note: + * - The application may set the SEVONPEND bit in the SCR to 1 to make the SoftDevice sleep while + * the ECB is running. The SEVONPEND bit should only be cleared (set to 0) from application + * main or low interrupt level. + * + * @param[in] block_count Count of blocks in the p_data_blocks array. + * @param[in,out] p_data_blocks Pointer to the first entry in a contiguous array of + * @ref nrf_ecb_hal_data_block_t structures. + * + * @retval ::NRF_SUCCESS + */ +SVCALL(SD_ECB_BLOCKS_ENCRYPT, uint32_t, sd_ecb_blocks_encrypt(uint8_t block_count, nrf_ecb_hal_data_block_t * p_data_blocks)); + +/**@brief Gets any pending events generated by the SoC API. + * + * The application should keep calling this function to get events, until ::NRF_ERROR_NOT_FOUND is returned. + * + * @param[out] p_evt_id Set to one of the values in @ref NRF_SOC_EVTS, if any events are pending. + * + * @retval ::NRF_SUCCESS An event was pending. The event id is written in the p_evt_id parameter. + * @retval ::NRF_ERROR_NOT_FOUND No pending events. + */ +SVCALL(SD_EVT_GET, uint32_t, sd_evt_get(uint32_t * p_evt_id)); + +/**@brief Get the temperature measured on the chip + * + * This function will block until the temperature measurement is done. + * It takes around 50 us from call to return. + * + * @param[out] p_temp Result of temperature measurement. Die temperature in 0.25 degrees Celsius. + * + * @retval ::NRF_SUCCESS A temperature measurement was done, and the temperature was written to temp + */ +SVCALL(SD_TEMP_GET, uint32_t, sd_temp_get(int32_t * p_temp)); + +/**@brief Flash Write +* +* Commands to write a buffer to flash +* +* If the SoftDevice is enabled: +* This call initiates the flash access command, and its completion will be communicated to the +* application with exactly one of the following events: +* - @ref NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed. +* - @ref NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started. +* +* If the SoftDevice is not enabled no event will be generated, and this call will return @ref NRF_SUCCESS when the + * write has been completed +* +* @note +* - This call takes control over the radio and the CPU during flash erase and write to make sure that +* they will not interfere with the flash access. This means that all interrupts will be blocked +* for a predictable time (depending on the NVMC specification in the device's Product Specification +* and the command parameters). +* - The data in the p_src buffer should not be modified before the @ref NRF_EVT_FLASH_OPERATION_SUCCESS +* or the @ref NRF_EVT_FLASH_OPERATION_ERROR have been received if the SoftDevice is enabled. +* - This call will make the SoftDevice trigger a hardfault when the page is written, if it is +* protected. +* +* +* @param[in] p_dst Pointer to start of flash location to be written. +* @param[in] p_src Pointer to buffer with data to be written. +* @param[in] size Number of 32-bit words to write. Maximum size is the number of words in one +* flash page. See the device's Product Specification for details. +* +* @retval ::NRF_ERROR_INVALID_ADDR Tried to write to a non existing flash address, or p_dst or p_src was unaligned. +* @retval ::NRF_ERROR_BUSY The previous command has not yet completed. +* @retval ::NRF_ERROR_INVALID_LENGTH Size was 0, or higher than the maximum allowed size. +* @retval ::NRF_ERROR_FORBIDDEN Tried to write to an address outside the application flash area. +* @retval ::NRF_SUCCESS The command was accepted. +*/ +SVCALL(SD_FLASH_WRITE, uint32_t, sd_flash_write(uint32_t * p_dst, uint32_t const * p_src, uint32_t size)); + + +/**@brief Flash Erase page +* +* Commands to erase a flash page +* If the SoftDevice is enabled: +* This call initiates the flash access command, and its completion will be communicated to the +* application with exactly one of the following events: +* - @ref NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed. +* - @ref NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started. +* +* If the SoftDevice is not enabled no event will be generated, and this call will return @ref NRF_SUCCESS when the +* erase has been completed +* +* @note +* - This call takes control over the radio and the CPU during flash erase and write to make sure that +* they will not interfere with the flash access. This means that all interrupts will be blocked +* for a predictable time (depending on the NVMC specification in the device's Product Specification +* and the command parameters). +* - This call will make the SoftDevice trigger a hardfault when the page is erased, if it is +* protected. +* +* +* @param[in] page_number Page number of the page to erase +* +* @retval ::NRF_ERROR_INTERNAL If a new session could not be opened due to an internal error. +* @retval ::NRF_ERROR_INVALID_ADDR Tried to erase to a non existing flash page. +* @retval ::NRF_ERROR_BUSY The previous command has not yet completed. +* @retval ::NRF_ERROR_FORBIDDEN Tried to erase a page outside the application flash area. +* @retval ::NRF_SUCCESS The command was accepted. +*/ +SVCALL(SD_FLASH_PAGE_ERASE, uint32_t, sd_flash_page_erase(uint32_t page_number)); + + + +/**@brief Opens a session for radio timeslot requests. + * + * @note Only one session can be open at a time. + * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START) will be called when the radio timeslot + * starts. From this point the NRF_RADIO and NRF_TIMER0 peripherals can be freely accessed + * by the application. + * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_TIMER0) is called whenever the NRF_TIMER0 + * interrupt occurs. + * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_RADIO) is called whenever the NRF_RADIO + * interrupt occurs. + * @note p_radio_signal_callback() will be called at ARM interrupt priority level 0. This + * implies that none of the sd_* API calls can be used from p_radio_signal_callback(). + * + * @param[in] p_radio_signal_callback The signal callback. + * + * @retval ::NRF_ERROR_INVALID_ADDR p_radio_signal_callback is an invalid function pointer. + * @retval ::NRF_ERROR_BUSY If session cannot be opened. + * @retval ::NRF_ERROR_INTERNAL If a new session could not be opened due to an internal error. + * @retval ::NRF_SUCCESS Otherwise. + */ + SVCALL(SD_RADIO_SESSION_OPEN, uint32_t, sd_radio_session_open(nrf_radio_signal_callback_t p_radio_signal_callback)); + +/**@brief Closes a session for radio timeslot requests. + * + * @note Any current radio timeslot will be finished before the session is closed. + * @note If a radio timeslot is scheduled when the session is closed, it will be canceled. + * @note The application cannot consider the session closed until the @ref NRF_EVT_RADIO_SESSION_CLOSED + * event is received. + * + * @retval ::NRF_ERROR_FORBIDDEN If session not opened. + * @retval ::NRF_ERROR_BUSY If session is currently being closed. + * @retval ::NRF_SUCCESS Otherwise. + */ + SVCALL(SD_RADIO_SESSION_CLOSE, uint32_t, sd_radio_session_close(void)); + +/**@brief Requests a radio timeslot. + * + * @note The request type is determined by p_request->request_type, and can be one of @ref NRF_RADIO_REQ_TYPE_EARLIEST + * and @ref NRF_RADIO_REQ_TYPE_NORMAL. The first request in a session must always be of type @ref NRF_RADIO_REQ_TYPE_EARLIEST. + * @note For a normal request (@ref NRF_RADIO_REQ_TYPE_NORMAL), the start time of a radio timeslot is specified by + * p_request->distance_us and is given relative to the start of the previous timeslot. + * @note A too small p_request->distance_us will lead to a @ref NRF_EVT_RADIO_BLOCKED event. + * @note Timeslots scheduled too close will lead to a @ref NRF_EVT_RADIO_BLOCKED event. + * @note See the SoftDevice Specification for more on radio timeslot scheduling, distances and lengths. + * @note If an opportunity for the first radio timeslot is not found before 100 ms after the call to this + * function, it is not scheduled, and instead a @ref NRF_EVT_RADIO_BLOCKED event is sent. + * The application may then try to schedule the first radio timeslot again. + * @note Successful requests will result in nrf_radio_signal_callback_t(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START). + * Unsuccessful requests will result in a @ref NRF_EVT_RADIO_BLOCKED event, see @ref NRF_SOC_EVTS. + * @note The jitter in the start time of the radio timeslots is +/- @ref NRF_RADIO_START_JITTER_US us. + * @note The nrf_radio_signal_callback_t(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START) call has a latency relative to the + * specified radio timeslot start, but this does not affect the actual start time of the timeslot. + * @note NRF_TIMER0 is reset at the start of the radio timeslot, and is clocked at 1MHz from the high frequency + * (16 MHz) clock source. If p_request->hfclk_force_xtal is true, the high frequency clock is + * guaranteed to be clocked from the external crystal. + * @note The SoftDevice will neither access the NRF_RADIO peripheral nor the NRF_TIMER0 peripheral + * during the radio timeslot. + * + * @param[in] p_request Pointer to the request parameters. + * + * @retval ::NRF_ERROR_FORBIDDEN If session not opened or the session is not IDLE. + * @retval ::NRF_ERROR_INVALID_ADDR If the p_request pointer is invalid. + * @retval ::NRF_ERROR_INVALID_PARAM If the parameters of p_request are not valid. + * @retval ::NRF_SUCCESS Otherwise. + */ + SVCALL(SD_RADIO_REQUEST, uint32_t, sd_radio_request(nrf_radio_request_t const * p_request)); + +/**@brief Write register protected by the SoftDevice + * + * This function writes to a register that is write-protected by the SoftDevice. Please refer to your + * SoftDevice Specification for more details about which registers that are protected by SoftDevice. + * This function can write to the following protected peripheral: + * - ACL + * + * @note Protected registers may be read directly. + * @note Register that are write-once will return @ref NRF_SUCCESS on second set, even the value in + * the register has not changed. See the Product Specification for more details about register + * properties. + * + * @param[in] p_register Pointer to register to be written. + * @param[in] value Value to be written to the register. + * + * @retval ::NRF_ERROR_INVALID_ADDR This function can not write to the reguested register. + * @retval ::NRF_SUCCESS Value successfully written to register. + * + */ +SVCALL(SD_PROTECTED_REGISTER_WRITE, uint32_t, sd_protected_register_write(volatile uint32_t * p_register, uint32_t value)); + +/**@} */ + +#ifdef __cplusplus +} +#endif +#endif // NRF_SOC_H__ + +/**@} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_svc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_svc.h new file mode 100644 index 00000000000..292c6929828 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_svc.h @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef NRF_SVC__ +#define NRF_SVC__ + +#include "stdint.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef SVCALL_AS_NORMAL_FUNCTION +#define SVCALL(number, return_type, signature) return_type signature +#else + +#ifndef SVCALL +#if defined (__CC_ARM) +#define SVCALL(number, return_type, signature) return_type __svc(number) signature +#elif defined (__GNUC__) +#ifdef __cplusplus +#define GCC_CAST_CPP (uint16_t) +#else +#define GCC_CAST_CPP +#endif +#define SVCALL(number, return_type, signature) \ + _Pragma("GCC diagnostic push") \ + _Pragma("GCC diagnostic ignored \"-Wreturn-type\"") \ + __attribute__((naked)) \ + __attribute__((unused)) \ + static return_type signature \ + { \ + __asm( \ + "svc %0\n" \ + "bx r14" : : "I" (GCC_CAST_CPP number) : "r0" \ + ); \ + } \ + _Pragma("GCC diagnostic pop") + +#elif defined (__ICCARM__) +#define PRAGMA(x) _Pragma(#x) +#define SVCALL(number, return_type, signature) \ +PRAGMA(swi_number = (number)) \ + __swi return_type signature; +#else +#define SVCALL(number, return_type, signature) return_type signature +#endif +#endif // SVCALL + +#endif // SVCALL_AS_NORMAL_FUNCTION + +#ifdef __cplusplus +} +#endif +#endif // NRF_SVC__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/hex/s140_nrf52_6.0.0_licence-agreement.txt b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/hex/s140_nrf52_6.0.0_licence-agreement.txt new file mode 100644 index 00000000000..a71adee7b9b --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/hex/s140_nrf52_6.0.0_licence-agreement.txt @@ -0,0 +1,35 @@ +Copyright (c) 2007 - 2018, Nordic Semiconductor ASA +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +2. Redistributions in binary form, except as embedded into a Nordic + Semiconductor ASA integrated circuit in a product or a software update for + such product, must reproduce the above copyright notice, this list of + conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + +3. Neither the name of Nordic Semiconductor ASA nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +4. This software, with or without modification, must only be used with a + Nordic Semiconductor ASA integrated circuit. + +5. Any software provided in binary form under this license must not be reverse + engineered, decompiled, modified and/or disassembled. + +THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS +OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/hex/s140_nrf52_6.0.0_softdevice.hex b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/hex/s140_nrf52_6.0.0_softdevice.hex new file mode 100644 index 00000000000..53327ec7fa2 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/hex/s140_nrf52_6.0.0_softdevice.hex @@ -0,0 +1,9281 @@ +:020000040000FA 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00000000000..444d257e445 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/mbed_lib.json @@ -0,0 +1,35 @@ +{ + "name": "softdevice", + "macros": [ + "SOFTDEVICE_PRESENT=1", + "S140", + "BLE_STACK_SUPPORT_REQD", + "NRF_SDH_CLOCK_LF_XTAL_ACCURACY=7", + "NRF_SD_BLE_API_VERSION=5", + "NRF_SDH_ENABLED=1", + "NRF_SDH_BLE_ENABLED=1", + "PEER_MANAGER_ENABLED=1", + "NRF_SDH_BLE_GATT_MAX_MTU_SIZE=23", + "NRF_SDH_BLE_OBSERVER_PRIO_LEVELS=4", + "NRF_SDH_BLE_GAP_EVENT_LENGTH=3", + "BLE_ADV_BLE_OBSERVER_PRIO=1", + "BLE_CONN_STATE_BLE_OBSERVER_PRIO=0", + "BLE_CONN_PARAMS_BLE_OBSERVER_PRIO=1", + "NRF_BLE_GATT_BLE_OBSERVER_PRIO=1", + "NRF_SDH_DISPATCH_MODEL=2", + "NRF_SDH_SOC_ENABLED=1", + "NRF_SDH_STACK_OBSERVER_PRIO_LEVELS=2", + "NRF_SDH_STATE_OBSERVER_PRIO_LEVELS=2", + "NRF_SDH_SOC_OBSERVER_PRIO_LEVELS=2", + "NRF_SDH_REQ_OBSERVER_PRIO_LEVELS=2", + "NRF_SDH_BLE_STACK_OBSERVER_PRIO=0", + "NRF_SDH_SOC_STACK_OBSERVER_PRIO=0", + "FDS_BACKEND=2", + "SWI_DISABLE1=1" + ], + "target_overrides": { + "*": { + "target.bootloader_img": "hex/s140_nrf52_6.0.0_softdevice.hex" + } + } +} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/README.md b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/README.md new file mode 100644 index 00000000000..01e2fbd4ee0 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/README.md @@ -0,0 +1,52 @@ +# Folder origin + +components/libraries + +# Modifications + +Only essential folders have been copied over. + +Removed: + * atomic_flags / + * block_dev / + * bootloader/ + * bsp/ + * button/ + * cli/ + * crc16/ + * crc32/ + * crypto/ + * csense/ + * csense_drv/ + * ecc/ + * eddystone/ + * experimental_libuarte/ + * experimental_mpu/ + * experimental_ringbuf/ + * experimental_stack_guard/ + * experimental_task_manager/ + * fifo/ + * gfx/ + * gpiote/ + * hardfault/ + * hci/ + * led_softblink/ + * low_power_pwm/ + * mem_manager/ + * mutex/ + * pwm/ + * pwr_mgmt/ + * scheduler/ + * sdcard/ + * sensorsim/ + * serial/ + * sha256/ + * simple_timer/ + * slip/ + * sortlist/ + * stack_info + * svc/ + * timer/ + * twi_sensor/ + * uart/ + * usbd/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/softdevice/common/nrf_sdh.c similarity index 100% rename from targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh.c rename to targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/softdevice/common/nrf_sdh.c diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/softdevice/common/nrf_sdh.h similarity index 100% rename from targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh.h rename to targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/softdevice/common/nrf_sdh.h diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ant.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/softdevice/common/nrf_sdh_ant.c similarity index 100% rename from targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ant.c rename to targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/softdevice/common/nrf_sdh_ant.c diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ant.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/softdevice/common/nrf_sdh_ant.h similarity index 100% rename from targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ant.h rename to targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/softdevice/common/nrf_sdh_ant.h diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ble.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/softdevice/common/nrf_sdh_ble.c similarity index 100% rename from targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ble.c rename to targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/softdevice/common/nrf_sdh_ble.c diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ble.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/softdevice/common/nrf_sdh_ble.h similarity index 100% rename from targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ble.h rename to targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/softdevice/common/nrf_sdh_ble.h diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_soc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/softdevice/common/nrf_sdh_soc.c similarity index 100% rename from targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_soc.c rename to targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/softdevice/common/nrf_sdh_soc.c diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/softdevice/common/nrf_sdh_soc.h similarity index 100% rename from targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_soc.h rename to targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/softdevice/common/nrf_sdh_soc.h From 2f730cfab8b6c30643ca385ba50851cd4131be25 Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Wed, 14 Nov 2018 14:51:10 -0600 Subject: [PATCH 453/488] Revert "NRF52: Fix vector table" This reverts commit 3d2fa535a71b7bad08c6a91a31d74f4492c8948c. This was a breaking change for the "MBR" and "NONE" builds. After testing it was also determined that copying the vector table a second time wasn't required for the "FULL" build. --- .../TARGET_NRF5x/TARGET_NRF52/reloc_vector_table.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/reloc_vector_table.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/reloc_vector_table.c index b1a5d442d1c..619c8145b5d 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/reloc_vector_table.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/reloc_vector_table.c @@ -47,7 +47,15 @@ #include "nrf_dfu_mbr.h" #endif -uint32_t nrf_dispatch_vector[NVIC_NUM_VECTORS]; +#if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) + __attribute__ ((section(".bss.nvictable"),zero_init)) + uint32_t nrf_dispatch_vector[NVIC_NUM_VECTORS]; +#elif defined(__GNUC__) + __attribute__ ((section(".nvictable"))) + uint32_t nrf_dispatch_vector[NVIC_NUM_VECTORS]; +#elif defined(__ICCARM__) + uint32_t nrf_dispatch_vector[NVIC_NUM_VECTORS] @ ".nvictable"; +#endif extern uint32_t __Vectors[]; @@ -105,6 +113,7 @@ void nrf_reloc_vector_table(void) #endif } +#if (STDIO_UART_RTS != NC) void mbed_sdk_init(void) { if (STDIO_UART_RTS != NC) { @@ -114,3 +123,4 @@ void mbed_sdk_init(void) gpio_write(&rts, 0); } } +#endif From 4e911bdb2ff605e8a52a946b1987d0ce439772c9 Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Thu, 15 Nov 2018 13:03:49 -0600 Subject: [PATCH 454/488] Cleanup for feature release * Update TARGET_NRF5x/README.md to improve "Changing SoftDevice" section and added section on NRF52840 CryptoCell310 Support * Update the file list in TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/README.md * Add missing CR-LF to Nordic-provided SDK file * Rename a header file in the TARGET_SOFTDEVICE_S112 tree --- targets/TARGET_NORDIC/TARGET_NRF5x/README.md | 43 ++++++++++++------- .../TARGET_SOFTDEVICE_COMMON/README.md | 9 ++-- .../headers/{ble.h => nrf_ble.h} | 0 .../components/libraries/README.md | 1 - .../libraries/util/app_error_handler_gcc.c | 2 +- 5 files changed, 35 insertions(+), 20 deletions(-) rename targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/{ble.h => nrf_ble.h} (100%) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/README.md b/targets/TARGET_NORDIC/TARGET_NRF5x/README.md index 7e093ea90ed..254878f2fad 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/README.md +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/README.md @@ -180,41 +180,54 @@ SoftDevices are treated as bootloaders and automatically combined by the tools. NRF52832 uses the S132 SoftDevice and NRF52840 uses the S140 SoftDevice. -The X_OTA and X_MBR binaries are obtained from the original X_FULL SoftDevice by splitting it in an MBR part and a SoftDevice part. The MBR is needed for the bootloader and the SoftDevice for firmware updates. +The OTA and MBR binaries are obtained from the original FULL SoftDevice by splitting it in an MBR part and a SoftDevice part. The MBR is needed for the bootloader and the SoftDevice for firmware updates. ### Changing SoftDevice -By default, all applications are built with the FULL SoftDevice. This can be changed by modifying the application's `mbed_app.json` configuration file. +By default, all applications are built with the FULL SoftDevice. This can be changed by modifying the application's `mbed_app.json` configuration file. Examples for the NRF52_DK and NRF52840_DK boards are shown below. -Build application without SoftDevice: +Build application with no MBR or SoftDevice: ``` "target_overrides": { - "*": { - "target.extra_labels_remove": ["SOFTDEVICE_COMMON", "SOFTDEVICE_X_FULL"], + "NRF52_DK": { + "target.extra_labels_remove": ["SOFTDEVICE_COMMON", "SOFTDEVICE_S132_FULL"], "target.extra_labels_add": ["SOFTDEVICE_NONE"] - } + }, + "NRF52840_DK": { + "target.extra_labels_remove": ["SOFTDEVICE_COMMON", "SOFTDEVICE_S140_FULL"], + "target.extra_labels_add": ["SOFTDEVICE_NONE"] + } } ``` -Build application for firmware update using SoftDevice X: + +Build application with MBR only: ``` "target_overrides": { - "*": { - "target.extra_labels_remove": ["SOFTDEVICE_X_FULL"], - "target.extra_labels_add": ["SOFTDEVICE_X_OTA"] - } + "NRF52_DK": { + "target.extra_labels_remove": ["SOFTDEVICE_COMMON", "SOFTDEVICE_S132_FULL"], + "target.extra_labels_add": ["SOFTDEVICE_S132_MBR"] + }, + "NRF52840_DK": { + "target.extra_labels_remove": ["SOFTDEVICE_S140_FULL"], + "target.extra_labels_add": ["SOFTDEVICE_S140_MBR"] + } } ``` -Build bootloader without SoftDevice X: +## NRF52840 CryptoCell310 Support +By default, all NRF52840 applications will use the CryptoCell310 subsystem which is built into the NRF52840. This provides hardware support for random number generation and encryption which are utilized by Mbed TLS. If using the CryptoCell310 subsystem is not desired, it can be replaced with a software implementation. This can be done by modifying the application's `mbed_app.json` configuration file as shown below. + ``` "target_overrides": { - "*": { - "target.extra_labels_remove": ["SOFTDEVICE_COMMON", "SOFTDEVICE_X_FULL"], - "target.extra_labels_add": ["SOFTDEVICE_X_MBR"] + "NRF52840_DK": { + "target.features_remove": ["CRYPTOCELL310"], + "target.macros_remove": ["MBEDTLS_CONFIG_HW_SUPPORT"], + "target.macros_add": ["NRFX_RNG_ENABLED=1", "RNG_ENABLED=1", "NRF_QUEUE_ENABLED=1"] } } ``` + diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/README.md b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/README.md index 7abc1642e64..2c717b29b18 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/README.md +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/README.md @@ -7,14 +7,17 @@ components/softdevice Removed: * common/nrf_sdh_freertos.c * common/nrf_sdh_freertos.h - * s212/* + * s112/toolchain + * s132/toolchain + * s212/ Moved: + * common/ to ../modules/softdevice/common * mbr/nrf52832/ to ../TARGET_SOFTDEVICE_S132_MBR * mbr/nrf52840/ to ../TARGET_SOFTDEVICE_S140_MBR * s112/ to ../TARGET_SOFTDEVICE_S112 - * s132/ to ../TARGET_SOFTDEVICE_S132 - * s140/ to ../TARGET_SOFTDEVICE_S140 + * s132/ to ../TARGET_SOFTDEVICE_S132_FULL + * s140/ to ../TARGET_SOFTDEVICE_S140_FULL Renamed: * ble.h to nrf_ble.h diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_ble.h similarity index 100% rename from targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/ble.h rename to targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S112/headers/nrf_ble.h diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/README.md b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/README.md index 01e2fbd4ee0..d1fbd84ee12 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/README.md +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/README.md @@ -19,7 +19,6 @@ Removed: * csense/ * csense_drv/ * ecc/ - * eddystone/ * experimental_libuarte/ * experimental_mpu/ * experimental_ringbuf/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error_handler_gcc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error_handler_gcc.c index 4292b6dd558..96f90f56379 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error_handler_gcc.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error_handler_gcc.c @@ -102,4 +102,4 @@ void app_error_handler(ret_code_t error_code, uint32_t line_num, const uint8_t * #error Architecture not supported #endif -#endif \ No newline at end of file +#endif From b0177177aa7000121c669aeb4b7833e2d0a13812 Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Thu, 6 Dec 2018 12:44:47 -0600 Subject: [PATCH 455/488] Enabling NRFX_PPI_ENABLED for serial_api updates --- .../TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h | 4 ++-- .../TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h index a5ff1865839..b4ff429d4c8 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/config/sdk_config.h @@ -2405,7 +2405,7 @@ // NRFX_PPI_ENABLED - nrfx_ppi - PPI peripheral allocator //========================================================== #ifndef NRFX_PPI_ENABLED -#define NRFX_PPI_ENABLED 0 +#define NRFX_PPI_ENABLED 1 #endif // NRFX_PPI_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== @@ -4585,7 +4585,7 @@ #ifndef PPI_ENABLED -#define PPI_ENABLED 1 +#define PPI_ENABLED 0 #endif // PWM_ENABLED - nrf_drv_pwm - PWM peripheral driver - legacy layer diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h index 89cd62fcec2..57ec3c5ca03 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h @@ -2405,7 +2405,7 @@ // NRFX_PPI_ENABLED - nrfx_ppi - PPI peripheral allocator //========================================================== #ifndef NRFX_PPI_ENABLED -#define NRFX_PPI_ENABLED 0 +#define NRFX_PPI_ENABLED 1 #endif // NRFX_PPI_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== @@ -4585,7 +4585,7 @@ #ifndef PPI_ENABLED -#define PPI_ENABLED 1 +#define PPI_ENABLED 0 #endif // PWM_ENABLED - nrf_drv_pwm - PWM peripheral driver - legacy layer From cf680ba1edfa8dd95f5e3862dc63b8f5952da51f Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Thu, 6 Dec 2018 12:46:53 -0600 Subject: [PATCH 456/488] Changes required for rebase: - Brought in new nrfx APIs - Brought in PPI additions - Removed dead code for RTC --- .../TARGET_NRF5x/TARGET_NRF52/serial_api.c | 72 +++++++------------ 1 file changed, 26 insertions(+), 46 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c index 4842722a020..2ecabbb1138 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c @@ -46,6 +46,8 @@ #include "app_util_platform.h" #include "pinmap_ex.h" #include "nrfx_glue.h" +#include "nrfx_gpiote.h" +#include "nrfx_ppi.h" #include "platform/mbed_critical.h" @@ -136,7 +138,7 @@ typedef struct { nrf_atfifo_t *fifo; uint32_t fifo_free_count; nrf_ppi_channel_t ppi_rts; - nrf_drv_gpiote_pin_t rts; + nrfx_gpiote_pin_t rts; bool rx_suspended; } nordic_uart_state_t; @@ -190,8 +192,8 @@ NRF_ATFIFO_DEF(nordic_nrf5_uart_fifo_1, uint8_t, UART1_FIFO_BUFFER_SIZE); */ static uint8_t nordic_nrf5_uart_swi_mask_tx_0 = 0; static uint8_t nordic_nrf5_uart_swi_mask_rx_0 = 0; -static uint8_t nordic_nrf5_uart_swi_mask_tx_1 = 0; -static uint8_t nordic_nrf5_uart_swi_mask_rx_1 = 0; +//static uint8_t nordic_nrf5_uart_swi_mask_tx_1 = 0; +//static uint8_t nordic_nrf5_uart_swi_mask_rx_1 = 0; /** * Global variables expected by mbed_retarget.cpp for STDOUT. @@ -453,7 +455,7 @@ static void nordic_nrf5_uart_event_handler_rxstarted(int instance) if (nordic_nrf5_uart_state[instance].rts != NRF_UART_PSEL_DISCONNECTED) { if (nordic_nrf5_uart_state[instance].fifo_free_count > FIFO_MIN) { /* Clear rts since we are ready to receive the next byte */ - nrf_drv_gpiote_clr_task_trigger(nordic_nrf5_uart_state[instance].rts); + nrfx_gpiote_clr_task_trigger(nordic_nrf5_uart_state[instance].rts); } else { /* Suspend reception since there isn't enough buffer space. * The function serial_getc will restart reception. */ @@ -625,43 +627,43 @@ static void nordic_nrf5_uart_configure_object(serial_t *obj) uint32_t ret; /* Disable the PPI interconnect */ - ret = nrf_drv_ppi_channel_disable(nordic_nrf5_uart_state[uart_object->instance].ppi_rts); + ret = nrfx_ppi_channel_disable(nordic_nrf5_uart_state[uart_object->instance].ppi_rts); MBED_ASSERT(ret == NRF_SUCCESS); /* Free flow control gpiote pin if it was previously set */ if (nordic_nrf5_uart_state[uart_object->instance].rts != NRF_UART_PSEL_DISCONNECTED) { - nrf_drv_gpiote_out_uninit((nrf_drv_gpiote_pin_t)uart_object->rts); + nrfx_gpiote_out_uninit((nrfx_gpiote_pin_t)uart_object->rts); } /* Allocate and enable flow control gpiote pin if it is being used */ if (uart_object->rts != NRF_UART_PSEL_DISCONNECTED) { - static const nrf_drv_gpiote_out_config_t config = { + static const nrfx_gpiote_out_config_t config = { .init_state = NRF_GPIOTE_INITIAL_VALUE_HIGH, .task_pin = true, .action = NRF_GPIOTE_POLARITY_LOTOHI }; /* Allocate gpiote channel */ - ret = nrf_drv_gpiote_out_init((nrf_drv_gpiote_pin_t)uart_object->rts, &config); + ret = nrfx_gpiote_out_init((nrfx_gpiote_pin_t)uart_object->rts, &config); if (ret == NRF_ERROR_INVALID_STATE) { /* Pin was previously set to GPIO so uninitialize it */ - nrf_drv_gpiote_out_uninit((nrf_drv_gpiote_pin_t)uart_object->rts); - ret = nrf_drv_gpiote_out_init((nrf_drv_gpiote_pin_t)uart_object->rts, &config); + nrfx_gpiote_out_uninit((nrfx_gpiote_pin_t)uart_object->rts); + ret = nrfx_gpiote_out_init((nrfx_gpiote_pin_t)uart_object->rts, &config); } MBED_ASSERT(ret == NRF_SUCCESS); /* Set RTS high on the ENDRX event */ - ret = nrf_drv_ppi_channel_assign(nordic_nrf5_uart_state[uart_object->instance].ppi_rts, - nrf_uarte_event_address_get(nordic_nrf5_uart_register[uart_object->instance], NRF_UARTE_EVENT_ENDRX), - nrf_drv_gpiote_out_task_addr_get(uart_object->rts)); + ret = nrfx_ppi_channel_assign(nordic_nrf5_uart_state[uart_object->instance].ppi_rts, + nrf_uarte_event_address_get(nordic_nrf5_uart_register[uart_object->instance], NRF_UARTE_EVENT_ENDRX), + nrfx_gpiote_out_task_addr_get(uart_object->rts)); MBED_ASSERT(ret == NRF_SUCCESS); - ret = nrf_drv_ppi_channel_enable(nordic_nrf5_uart_state[uart_object->instance].ppi_rts); + ret = nrfx_ppi_channel_enable(nordic_nrf5_uart_state[uart_object->instance].ppi_rts); MBED_ASSERT(ret == NRF_SUCCESS); /* Enable gpiote task - rts pin can no longer be used as GPIO at this point */ - nrf_drv_gpiote_out_task_enable((nrf_drv_gpiote_pin_t)uart_object->rts); + nrfx_gpiote_out_task_enable((nrfx_gpiote_pin_t)uart_object->rts); } nordic_nrf5_uart_state[uart_object->instance].rts = uart_object->rts; @@ -841,33 +843,11 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) first_init = false; /* Initialize components that serial relies on. */ - nrf_drv_ppi_init(); - if (!nrf_drv_gpiote_is_init()) { - nrf_drv_gpiote_init(); +// nrf_drv_ppi_init(); + if (!nrfx_gpiote_is_init()) { + nrfx_gpiote_init(); } - /* Register RTC2 ISR. */ - NVIC_SetVector(RTC2_IRQn, (uint32_t) nordic_nrf5_rtc2_handler); - - /* Clear RTC2 channel events. */ - nrf_rtc_event_clear(NRF_RTC2, NRF_RTC_EVENT_COMPARE_0); - nrf_rtc_event_clear(NRF_RTC2, NRF_RTC_EVENT_COMPARE_1); - - /* Enable interrupts for all four RTC2 channels. */ - nrf_rtc_event_enable(NRF_RTC2, - NRF_RTC_INT_COMPARE0_MASK | - NRF_RTC_INT_COMPARE1_MASK); - - /* Enable RTC2 IRQ. Priority is set to highest so that the UARTE ISR can't interrupt it. */ - NRFX_IRQ_PRIORITY_SET(RTC2_IRQn, APP_IRQ_PRIORITY_HIGHEST); - NRFX_IRQ_ENABLE(RTC2_IRQn); - - - /* Start RTC2. According to the datasheet the added power consumption is neglible so - * the RTC2 will run forever. - */ - nrf_rtc_task_trigger(NRF_RTC2, NRF_RTC_TASK_START); - /* Enable interrupts for SWI. */ NVIC_SetVector(SWI0_EGU0_IRQn, (uint32_t) nordic_nrf5_uart_swi0); NRFX_IRQ_PRIORITY_SET(SWI0_EGU0_IRQn, APP_IRQ_PRIORITY_LOWEST); @@ -881,7 +861,7 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) nordic_nrf5_uart_state[0].owner = NULL; /* Allocate a PPI channel for flow control */ - ret = nrf_drv_ppi_channel_alloc(&nordic_nrf5_uart_state[0].ppi_rts); + ret = nrfx_ppi_channel_alloc(&nordic_nrf5_uart_state[0].ppi_rts); MBED_ASSERT(ret == NRF_SUCCESS); /* Clear RTS */ @@ -959,7 +939,7 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) /* Wait until NRF_UARTE_EVENT_TXDRDY is set before proceeding. */ bool done = false; do { - done = nrf_uarte_event_extra_check(nordic_nrf5_uart_register[instance], NRF_UARTE_EVENT_TXDRDY); + done = nrf_uarte_event_check(nordic_nrf5_uart_register[instance], NRF_UARTE_EVENT_TXDRDY); } while(done == false); } @@ -1330,7 +1310,7 @@ int serial_getc(serial_t *obj) core_util_atomic_incr_u32(&nordic_nrf5_uart_state[instance].fifo_free_count, 1); if (nordic_nrf5_uart_state[instance].rx_suspended) { nordic_nrf5_uart_state[instance].rx_suspended = false; - nrf_drv_gpiote_clr_task_trigger(nordic_nrf5_uart_state[instance].rts); + nrfx_gpiote_clr_task_trigger(nordic_nrf5_uart_state[instance].rts); } return *byte; @@ -1359,10 +1339,10 @@ void serial_putc(serial_t *obj, int character) /* Wait until UART is ready to send next character. */ do { - done = nrf_uarte_event_extra_check(nordic_nrf5_uart_register[instance], NRF_UARTE_EVENT_TXDRDY); + done = nrf_uarte_event_check(nordic_nrf5_uart_register[instance], NRF_UARTE_EVENT_TXDRDY); } while(done == false); - nrf_uarte_event_extra_clear(nordic_nrf5_uart_register[instance], NRF_UARTE_EVENT_TXDRDY); + nrf_uarte_event_clear(nordic_nrf5_uart_register[instance], NRF_UARTE_EVENT_TXDRDY); /* Arm Tx DMA buffer. */ nordic_nrf5_uart_state[instance].tx_data = character; @@ -1425,7 +1405,7 @@ int serial_writable(serial_t *obj) int instance = uart_object->instance; return (!core_util_atomic_load_bool(&nordic_nrf5_uart_state[instance].tx_in_progress) && - (nrf_uarte_event_extra_check(nordic_nrf5_uart_register[instance], NRF_UARTE_EVENT_TXDRDY))); + (nrf_uarte_event_check(nordic_nrf5_uart_register[instance], NRF_UARTE_EVENT_TXDRDY))); } const PinMap *serial_tx_pinmap() From 4638d8c750bdb58ecde92dea9745aa44a120e55e Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Thu, 6 Dec 2018 16:04:15 -0600 Subject: [PATCH 457/488] Set the PWM clock prescaler back to default (1MHz clock) --- targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/pwmout_api.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/pwmout_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/pwmout_api.c index 11f6428a22a..4f5f6dfb968 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/pwmout_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/pwmout_api.c @@ -101,9 +101,6 @@ static void nordic_pwm_init(pwmout_t *obj) .step_mode = NRF_PWM_STEP_AUTO, }; - // RF - test slowest prescalar setting (125kHz) - config.base_clock = NRF_PWM_CLK_125kHz; - /* Initialize instance with new configuration. */ ret_code_t result = nrfx_pwm_init(&nordic_nrf5_pwm_instance[obj->instance], &config, From 75847c42c02745fbced3f06b4683b3bb0f9c77d0 Mon Sep 17 00:00:00 2001 From: Naveen Kaje Date: Fri, 7 Dec 2018 10:16:30 -0600 Subject: [PATCH 458/488] NRF52: serial: fix build warnings --- .../TARGET_NRF5x/TARGET_NRF52/serial_api.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c index 2ecabbb1138..f3e3f14db59 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c @@ -671,12 +671,12 @@ static void nordic_nrf5_uart_configure_object(serial_t *obj) /* Enable flow control and parity. */ nrf_uarte_configure(nordic_nrf5_uart_register[uart_object->instance], - uart_object->parity, - uart_object->hwfc); + (nrf_uarte_parity_t) uart_object->parity, + (nrf_uarte_hwfc_t) uart_object->hwfc); /* Set baudrate. */ nrf_uarte_baudrate_set(nordic_nrf5_uart_register[uart_object->instance], - uart_object->baudrate); + (nrf_uarte_baudrate_t) uart_object->baudrate); } /** @@ -939,7 +939,8 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) /* Wait until NRF_UARTE_EVENT_TXDRDY is set before proceeding. */ bool done = false; do { - done = nrf_uarte_event_check(nordic_nrf5_uart_register[instance], NRF_UARTE_EVENT_TXDRDY); + done = nrf_uarte_event_check(nordic_nrf5_uart_register[instance], + (nrf_uarte_event_t) NRF_UARTE_EVENT_TXDRDY); } while(done == false); } @@ -1024,7 +1025,7 @@ void serial_baud(serial_t *obj, int baudrate) struct serial_s *uart_object = obj; #endif - nrf_uart_baudrate_t new_rate = NRF_UART_BAUDRATE_9600; + nrf_uarte_baudrate_t new_rate = NRF_UART_BAUDRATE_9600; /* Round down to nearest supported baud rate. */ if (baudrate < 2400) { From 439ec68098a94e36c5162ff6f69a54e41a209fe3 Mon Sep 17 00:00:00 2001 From: Naveen Kaje Date: Fri, 7 Dec 2018 13:17:26 -0600 Subject: [PATCH 459/488] NRF52: Cleanup unused code --- targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c index f3e3f14db59..802120d1b94 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c @@ -192,8 +192,6 @@ NRF_ATFIFO_DEF(nordic_nrf5_uart_fifo_1, uint8_t, UART1_FIFO_BUFFER_SIZE); */ static uint8_t nordic_nrf5_uart_swi_mask_tx_0 = 0; static uint8_t nordic_nrf5_uart_swi_mask_rx_0 = 0; -//static uint8_t nordic_nrf5_uart_swi_mask_tx_1 = 0; -//static uint8_t nordic_nrf5_uart_swi_mask_rx_1 = 0; /** * Global variables expected by mbed_retarget.cpp for STDOUT. @@ -843,7 +841,6 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) first_init = false; /* Initialize components that serial relies on. */ -// nrf_drv_ppi_init(); if (!nrfx_gpiote_is_init()) { nrfx_gpiote_init(); } From 3cfc2ef0981ecb1b0029ffe12c8358796f5e5524 Mon Sep 17 00:00:00 2001 From: Desmond Chen Date: Thu, 13 Dec 2018 09:38:14 -0600 Subject: [PATCH 460/488] Fix timer1 irq configuration --- targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/us_ticker.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/us_ticker.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/us_ticker.c index f6cdc050bf8..859873f2bfd 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/us_ticker.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/us_ticker.c @@ -90,8 +90,8 @@ void us_ticker_init(void) NVIC_SetVector(TIMER1_IRQn, (uint32_t)us_ticker_irq_handler); - NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number((void const*)TIMER1_IRQn), APP_IRQ_PRIORITY_HIGH); - NRFX_IRQ_ENABLE(nrfx_get_irq_number((void const*)TIMER1_IRQn)); + NRFX_IRQ_PRIORITY_SET(TIMER1_IRQn, APP_IRQ_PRIORITY_HIGH); + NRFX_IRQ_ENABLE(TIMER1_IRQn); nrf_timer_task_trigger(NRF_TIMER1, NRF_TIMER_TASK_START); From 036bbd93ade870e11499999b9ae76466a9aa4a12 Mon Sep 17 00:00:00 2001 From: Desmond Chen Date: Sun, 9 Dec 2018 08:31:51 -0800 Subject: [PATCH 461/488] Update BLE SoftDevice from SDK14 to SDK15 - Adjust memory for SoftDevice - Enable PRIO=5 for interrupt priority check - Change NRF_SD_BLE_API_VERSION to 6 - Add handle and buffer for advertising and scanning - Remove guard for phy update - Change scatter files and mbed_lib.json for PR #8607 --- .../TARGET_NRF52/source/btle/btle.cpp | 1 - .../TARGET_NRF52/source/nRF5xGap.cpp | 168 +++++++++++++++++- .../TARGET_NRF52/source/nRF5xGap.h | 13 +- .../device/TOOLCHAIN_ARM_STD/nRF52832.sct | 11 -- .../device/TOOLCHAIN_GCC_ARM/NRF52832.ld | 11 -- .../device/TOOLCHAIN_IAR/nRF52832.icf | 11 -- .../device/TOOLCHAIN_ARM_STD/nRF52840.sct | 11 -- .../device/TOOLCHAIN_GCC_ARM/NRF52840.ld | 11 -- .../device/TOOLCHAIN_IAR/nRF52840.icf | 11 -- .../TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json | 4 +- .../headers/nrf_nvic.h | 1 + .../TARGET_SOFTDEVICE_S140_FULL/mbed_lib.json | 6 +- targets/targets.json | 1 + 13 files changed, 182 insertions(+), 78 deletions(-) diff --git a/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_NORDIC_SOFTDEVICE/TARGET_NRF52/source/btle/btle.cpp b/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_NORDIC_SOFTDEVICE/TARGET_NRF52/source/btle/btle.cpp index eb52252635d..0a870ab9b17 100644 --- a/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_NORDIC_SOFTDEVICE/TARGET_NRF52/source/btle/btle.cpp +++ b/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_NORDIC_SOFTDEVICE/TARGET_NRF52/source/btle/btle.cpp @@ -334,7 +334,6 @@ void btle_handler(const ble_evt_t *p_ble_evt) #if (NRF_SD_BLE_API_VERSION >= 5) -#ifndef S140 // Handle PHY upgrade request case BLE_GAP_EVT_PHY_UPDATE_REQUEST: { gap.on_phy_update_request( diff --git a/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_NORDIC_SOFTDEVICE/TARGET_NRF52/source/nRF5xGap.cpp b/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_NORDIC_SOFTDEVICE/TARGET_NRF52/source/nRF5xGap.cpp index 0e0d604ac1f..f42827b1615 100644 --- a/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_NORDIC_SOFTDEVICE/TARGET_NRF52/source/nRF5xGap.cpp +++ b/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_NORDIC_SOFTDEVICE/TARGET_NRF52/source/nRF5xGap.cpp @@ -171,6 +171,9 @@ nRF5xGap::nRF5xGap() : _connections_role() { m_connectionHandle = BLE_CONN_HANDLE_INVALID; + #if (NRF_SD_BLE_API_VERSION >= 6) + m_advHandle = BLE_GAP_ADV_SET_HANDLE_NOT_SET; + #endif } /**************************************************************************/ /*! @@ -236,6 +239,29 @@ ble_error_t nRF5xGap::setAdvertisingData_(const GapAdvertisingData &advData, con // } //} + #if (NRF_SD_BLE_API_VERSION >= 6) + /* sd_ble_gap_adv_data_set has been decprecated */ + if (m_advHandle != BLE_GAP_ADV_SET_HANDLE_NOT_SET) { + /* This is for updating advdata*/ + ble_gap_adv_data_t adv_data = {0}; + adv_data.adv_data.p_data = const_cast(advData.getPayload()); + adv_data.adv_data.len = advData.getPayloadLen(); + adv_data.scan_rsp_data.p_data = const_cast(scanResponse.getPayload()); + adv_data.scan_rsp_data.len = scanResponse.getPayloadLen(); + + ASSERT_TRUE(ERROR_NONE == + sd_ble_gap_adv_stop(m_advHandle), + BLE_ERROR_PARAM_OUT_OF_RANGE); + + ASSERT_TRUE(ERROR_NONE == + sd_ble_gap_adv_set_configure(&m_advHandle, &adv_data, NULL), + BLE_ERROR_PARAM_OUT_OF_RANGE); + + ASSERT_TRUE(ERROR_NONE == + sd_ble_gap_adv_start(m_advHandle, NRF_CONNECTION_TAG), + BLE_ERROR_PARAM_OUT_OF_RANGE); + } + #else /* Send advertising data! */ ASSERT_TRUE(ERROR_NONE == sd_ble_gap_adv_data_set(advData.getPayload(), @@ -243,6 +269,7 @@ ble_error_t nRF5xGap::setAdvertisingData_(const GapAdvertisingData &advData, con scanResponse.getPayload(), scanResponse.getPayloadLen()), BLE_ERROR_PARAM_OUT_OF_RANGE); + #endif /* Make sure the GAP Service appearance value is aligned with the *appearance from GapAdvertisingData */ @@ -373,14 +400,56 @@ ble_error_t nRF5xGap::startAdvertising_(const GapAdvertisingParams ¶ms) /* Start Advertising */ +#if (NRF_SD_BLE_API_VERSION >= 6) + /* FIXME: Must be chanaged if extended paramters added into GapAdvertisingParams */ + switch (params.getAdvertisingType()) { + case GapAdvertisingParams::ADV_CONNECTABLE_UNDIRECTED: + adv_para.properties.type = BLE_GAP_ADV_TYPE_CONNECTABLE_SCANNABLE_UNDIRECTED; + break; + + case GapAdvertisingParams::ADV_CONNECTABLE_DIRECTED: + adv_para.properties.type = BLE_GAP_ADV_TYPE_CONNECTABLE_NONSCANNABLE_DIRECTED; + break; + + case GapAdvertisingParams::ADV_SCANNABLE_UNDIRECTED: + adv_para.properties.type = BLE_GAP_ADV_TYPE_NONCONNECTABLE_SCANNABLE_UNDIRECTED; + break; + + case GapAdvertisingParams::ADV_NON_CONNECTABLE_UNDIRECTED: + adv_para.properties.type = BLE_GAP_ADV_TYPE_NONCONNECTABLE_NONSCANNABLE_UNDIRECTED; + break; + + default: + return BLE_ERROR_PARAM_OUT_OF_RANGE; + break; + } + + adv_para.interval = params.getIntervalInADVUnits(); // advertising interval (in units of 0.625 ms) + adv_para.duration = params.getTimeout() * 100; // units have been changed from seconds to 10ms units. + memset(adv_para.channel_mask, 0, sizeof(adv_para.channel_mask)); + adv_para.filter_policy = advertisingPolicyMode; // BLE_GAP_ADV_FP_ANY + adv_para.primary_phy = BLE_GAP_PHY_1MBPS; /* Use _preferred_tx_phys if validated */ + adv_para.p_peer_addr = NULL; + + m_adv_data.adv_data.p_data = const_cast(_advPayload.getPayload()); + m_adv_data.adv_data.len = _advPayload.getPayloadLen(); + m_adv_data.scan_rsp_data.p_data = const_cast(_scanResponse.getPayload()); + m_adv_data.scan_rsp_data.len = _scanResponse.getPayloadLen(); +#else adv_para.type = params.getAdvertisingType(); adv_para.p_peer_addr = NULL; // Undirected advertisement adv_para.fp = advertisingPolicyMode; adv_para.interval = params.getIntervalInADVUnits(); // advertising interval (in units of 0.625 ms) adv_para.timeout = params.getTimeout(); +#endif -#if (NRF_SD_BLE_API_VERSION >= 5) + +#if (NRF_SD_BLE_API_VERSION >= 6) + if ((err = sd_ble_gap_adv_set_configure(&m_advHandle, &m_adv_data, &adv_para) == ERROR_NONE)) { + err = sd_ble_gap_adv_start(m_advHandle, NRF_CONNECTION_TAG); + } +#elif (NRF_SD_BLE_API_VERSION == 5) err = sd_ble_gap_adv_start(&adv_para, NRF_CONNECTION_TAG); #else err = sd_ble_gap_adv_start(&adv_para); @@ -427,15 +496,29 @@ ble_error_t nRF5xGap::startRadioScan_(const GapScanningParams &scanningParams) #else /* For NRF_SD_BLE_API_VERSION >= 3 nRF5xGap::setWhitelist setups the whitelist. */ + #if (NRF_SD_BLE_API_VERSION >= 6) + scanParams.filter_policy = scanningPolicyMode; + #else scanParams.use_whitelist = scanningPolicyMode; scanParams.adv_dir_report = 0; + #endif #endif +#if (NRF_SD_BLE_API_VERSION >= 6) + scanParams.extended = 0; + memset(scanParams.channel_mask, 0, sizeof(scanParams.channel_mask)); + scanParams.scan_phys = BLE_GAP_PHY_1MBPS; /* Use _preferred_rx_phys if validated */ + + scanParams.interval = scanningParams.getInterval(); /**< Scan interval between 0x0004 and 0x4000 in 0.625ms units (2.5ms to 10.24s). */ + scanParams.window = scanningParams.getWindow(); /**< Scan window between 0x0004 and 0x4000 in 0.625ms units (2.5ms to 10.24s). */ + scanParams.timeout = scanningParams.getTimeout()*100; /**< Scan timeout between 0x0001 and 0xFFFF in 10 ms units, 0x0000 disables timeout. */ +#else scanParams.active = scanningParams.getActiveScanning(); /**< If 1, perform active scanning (scan requests). */ scanParams.interval = scanningParams.getInterval(); /**< Scan interval between 0x0004 and 0x4000 in 0.625ms units (2.5ms to 10.24s). */ scanParams.window = scanningParams.getWindow(); /**< Scan window between 0x0004 and 0x4000 in 0.625ms units (2.5ms to 10.24s). */ scanParams.timeout = scanningParams.getTimeout(); /**< Scan timeout between 0x0001 and 0xFFFF in seconds, 0x0000 disables timeout. */ +#endif if (_privacy_enabled) { bool enable_resolution = @@ -450,9 +533,20 @@ ble_error_t nRF5xGap::startRadioScan_(const GapScanningParams &scanningParams) } } +#if (NRF_SD_BLE_API_VERSION >= 6) + m_scan_buffer.p_data = m_raw_scan_buffer; + m_scan_buffer.len = sizeof(m_raw_scan_buffer); + m_resume_scanning = true; + //if (sd_ble_gap_scan_start(&scanParams, &m_scan_buffer) != NRF_SUCCESS) { + uint32_t res = sd_ble_gap_scan_start(&scanParams, &m_scan_buffer); + if (res != NRF_SUCCESS) { + return BLE_ERROR_PARAM_OUT_OF_RANGE; + } +#else if (sd_ble_gap_scan_start(&scanParams) != NRF_SUCCESS) { return BLE_ERROR_PARAM_OUT_OF_RANGE; } +#endif return BLE_ERROR_NONE; } @@ -485,7 +579,11 @@ ble_error_t nRF5xGap::stopScan_(void) { ble_error_t nRF5xGap::stopAdvertising_(void) { /* Stop Advertising */ + #if (NRF_SD_BLE_API_VERSION >= 6) + ASSERT_TRUE(ERROR_NONE == sd_ble_gap_adv_stop(m_advHandle), BLE_ERROR_PARAM_OUT_OF_RANGE); + #else ASSERT_TRUE(ERROR_NONE == sd_ble_gap_adv_stop(), BLE_ERROR_PARAM_OUT_OF_RANGE); + #endif state.advertising = 0; @@ -631,8 +729,11 @@ ble_error_t nRF5xGap::connect( } #else /* For NRF_SD_BLE_API_VERSION >= 3 nRF5xGap::setWhitelist setups the whitelist. */ - + #if (NRF_SD_BLE_API_VERSION >= 6) + scanParams.filter_policy |= (whitelistAddressesSize) ? 1 : 0; + #else scanParams.use_whitelist = (whitelistAddressesSize) ? 1 : 0; + #endif if (_privacy_enabled) { bool enable_resolution = @@ -661,6 +762,10 @@ ble_error_t nRF5xGap::connect( scanParams.timeout = _scanningParams.getTimeout(); /**< Scan timeout between 0x0001 and 0xFFFF in seconds, 0x0000 disables timeout. */ } +#if NRF_SD_BLE_API_VERSION >= 6 + m_resume_scanning = false; +#endif + #if NRF_SD_BLE_API_VERSION >= 5 uint32_t rc = sd_ble_gap_connect(addr_ptr, &scanParams, &connParams, NRF_CONNECTION_TAG); #else @@ -706,6 +811,9 @@ ble_error_t nRF5xGap::setPreferredPhys_( uint8_t preferred_rx_phys = rxPhys? rxPhys->value() : 0; #ifdef S140 + #if (NRF_SD_BLE_API_VERSION) >= 6 + /* Set _preferred_tx_phys and _preferred_rx_phys here, used when start advertising or scanning */ + #else ble_opt_t opt = { 0 }; opt.gap_opt.preferred_phys.tx_phys = preferred_tx_phys; opt.gap_opt.preferred_phys.rx_phys = preferred_rx_phys; @@ -726,7 +834,7 @@ ble_error_t nRF5xGap::setPreferredPhys_( default: return BLE_ERROR_UNSPECIFIED; } - + #endif #endif _preferred_tx_phys = preferred_tx_phys; @@ -741,7 +849,7 @@ ble_error_t nRF5xGap::setPhy_( const ble::phy_set_t* rxPhys, CodedSymbolPerBit_t codedSymbol ) { -#ifdef S140 +#if defined(S140) && ((NRF_SD_BLE_API_VERSION) < 6) return BLE_ERROR_NOT_IMPLEMENTED; #else // TODO handle coded symbol once supported by the softdevice. @@ -851,6 +959,9 @@ ble_error_t nRF5xGap::reset_(void) /* Clear derived class members */ m_connectionHandle = BLE_CONN_HANDLE_INVALID; + #if (NRF_SD_BLE_API_VERSION >= 6) + m_advHandle = BLE_GAP_ADV_SET_HANDLE_NOT_SET; + #endif /* Set the whitelist policy filter modes to IGNORE_WHITELIST */ advertisingPolicyMode = ADV_POLICY_IGNORE_WHITELIST; @@ -1019,7 +1130,25 @@ ble_error_t nRF5xGap::getAppearance_(GapAdvertisingData::Appearance *appearanceP ble_error_t nRF5xGap::setTxPower_(int8_t txPower) { unsigned rc; + #if (NRF_SD_BLE_API_VERSION >= 6) + /* FIXME: This has to change API for specified paramter */ + uint16_t handle = 0; + rc = NRF_SUCCESS; + if ((handle = getConnectionHandle()) != BLE_CONN_HANDLE_INVALID) { + rc = sd_ble_gap_tx_power_set(BLE_GAP_TX_POWER_ROLE_CONN, handle, txPower); + } + if ((rc == NRF_SUCCESS) && (m_advHandle != BLE_GAP_ADV_SET_HANDLE_NOT_SET)) { + handle = (uint16_t)m_advHandle; + rc = sd_ble_gap_tx_power_set(BLE_GAP_TX_POWER_ROLE_ADV, handle, txPower); + } + if (rc == NRF_SUCCESS) { + rc = sd_ble_gap_tx_power_set(BLE_GAP_TX_POWER_ROLE_SCAN_INIT, 0 /* This is ingored for ROLE_SCAN_INIT*/, txPower); + } + + if (rc != NRF_SUCCESS) { + #else if ((rc = sd_ble_gap_tx_power_set(txPower)) != NRF_SUCCESS) { + #endif switch (rc) { case NRF_ERROR_BUSY: return BLE_STACK_BUSY; @@ -1564,6 +1693,34 @@ void nRF5xGap::on_advertising_packet(const ble_gap_evt_adv_report_t &evt) { ); const uint8_t* peer_address = evt.peer_addr.addr; + #if (NRF_SD_BLE_API_VERSION >= 6) + GapAdvertisingParams::AdvertisingType_t type; + if (evt.type.connectable && !evt.type.directed) { + type = GapAdvertisingParams::ADV_CONNECTABLE_UNDIRECTED; + } else if (evt.type.connectable && evt.type.directed) { + type = GapAdvertisingParams::ADV_CONNECTABLE_DIRECTED; + } else if (evt.type.scannable && !evt.type.directed) { + type = GapAdvertisingParams::ADV_SCANNABLE_UNDIRECTED; + } else if (!evt.type.connectable && !evt.type.directed) { + type = GapAdvertisingParams::ADV_NON_CONNECTABLE_UNDIRECTED; + } else { + // wrong condition + } + processAdvertisementReport( + peer_address, + evt.rssi, + (evt.type.scan_response? 1 : 0), + type, + evt.data.len, + evt.data.p_data, + peer_addr_type + ); + + /* If no action for connecting, must call sd_ble_gap_scan_start() aging for resuming scanning */ + if (m_resume_scanning) { + sd_ble_gap_scan_start(NULL, &m_scan_buffer); + } + #else processAdvertisementReport( peer_address, evt.rssi, @@ -1573,6 +1730,7 @@ void nRF5xGap::on_advertising_packet(const ble_gap_evt_adv_report_t &evt) { evt.data, peer_addr_type ); + #endif } ble_error_t nRF5xGap::get_role(ble::connection_handle_t connection, Role_t& role) { @@ -1656,7 +1814,6 @@ void nRF5xGap::on_phy_update( ); } -#ifndef S140 void nRF5xGap::on_phy_update_request( Handle_t connection, const ble_gap_evt_phy_update_request_t& evt @@ -1676,7 +1833,6 @@ void nRF5xGap::on_phy_update_request( sd_ble_gap_phy_update(connection, &phys); } -#endif diff --git a/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_NORDIC_SOFTDEVICE/TARGET_NRF52/source/nRF5xGap.h b/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_NORDIC_SOFTDEVICE/TARGET_NRF52/source/nRF5xGap.h index 963c0282c66..108a1a9caba 100644 --- a/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_NORDIC_SOFTDEVICE/TARGET_NRF52/source/nRF5xGap.h +++ b/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_NORDIC_SOFTDEVICE/TARGET_NRF52/source/nRF5xGap.h @@ -313,9 +313,18 @@ class nRF5xGap : void release_all_connections_role(); void on_phy_update(Handle_t connection, const ble_gap_evt_phy_update_t& evt); - // FIXME: remove guard when S140 updated - #ifndef S140 void on_phy_update_request(Handle_t connection, const ble_gap_evt_phy_update_request_t& evt); + + #if (NRF_SD_BLE_API_VERSION) >= 6 + uint8_t m_advHandle; + /* + Note: The advertising data must be kept alive in memory until advertising is terminated. Not doing so will lead to undefined behavior. + Note: Updating advertising data while advertising can only be done by providing new advertising data buffers. + */ + ble_gap_adv_data_t m_adv_data; + uint8_t m_raw_scan_buffer[BLE_GAP_SCAN_BUFFER_MIN]; + ble_data_t m_scan_buffer; + bool m_resume_scanning; /* When the application receives a ble_gap_adv_report_t, it must now resume scanning by calling sd_ble_gap_scan_start() */ #endif uint16_t m_connectionHandle; diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct index 5d3cbe09c98..5a0b849fbd9 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct @@ -11,17 +11,6 @@ #define Stack_Size MBED_BOOT_STACK_SIZE -/* If softdevice is present, set aside space for it */ -#if !defined(MBED_RAM_START) - #if defined(SOFTDEVICE_PRESENT) - #define MBED_RAM_START 0x20001D70 - #define MBED_RAM_SIZE 0xE290 - #else - #define MBED_RAM_START 0x20000000 - #define MBED_RAM_SIZE 0x10000 - #endif -#endif - #define MBED_RAM0_START MBED_RAM_START #define MBED_RAM0_SIZE 0xE0 #define MBED_RAM1_START (MBED_RAM_START + MBED_RAM0_SIZE) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld index d6ab2818c82..3b0221dcc16 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld @@ -25,17 +25,6 @@ #define MBED_APP_SIZE 0x80000 #endif -/* If softdevice is present, set aside space for it */ -#if !defined(MBED_RAM_START) - #if defined(SOFTDEVICE_PRESENT) - #define MBED_RAM_START 0x20001D70 - #define MBED_RAM_SIZE 0xE290 - #else - #define MBED_RAM_START 0x20000000 - #define MBED_RAM_SIZE 0x10000 - #endif -#endif - #if !defined(MBED_BOOT_STACK_SIZE) #define MBED_BOOT_STACK_SIZE 0x800 #endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf index f116c49455c..e0d52edfa9f 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf @@ -11,17 +11,6 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x80000; } -/* If softdevice is present, set aside space for it */ -if (!isdefinedsymbol(MBED_RAM_START)) { - if (isdefinedsymbol(SOFTDEVICE_PRESENT)) { - define symbol MBED_RAM_START = 0x200031D0; - define symbol MBED_RAM_SIZE = 0xCE30; - } else { - define symbol MBED_RAM_START = 0x20000000; - define symbol MBED_RAM_SIZE = 0x10000; - } -} - if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct index d5101884399..e5d93e887ac 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct @@ -9,17 +9,6 @@ #define MBED_APP_SIZE 0x100000 #endif -/* If softdevice is present, set aside space for it */ -#if !defined(MBED_RAM_START) - #if defined(SOFTDEVICE_PRESENT) - #define MBED_RAM_START 0x20003188 - #define MBED_RAM_SIZE 0x3CE78 - #else - #define MBED_RAM_START 0x20000000 - #define MBED_RAM_SIZE 0x40000 - #endif -#endif - #define Stack_Size MBED_BOOT_STACK_SIZE #define MBED_RAM0_START MBED_RAM_START diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld index 590dd11ad4e..68c69abdaa8 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld @@ -29,17 +29,6 @@ #define MBED_BOOT_STACK_SIZE 0x800 #endif -/* If softdevice is present, set aside space for it */ -#if !defined(MBED_RAM_START) - #if defined(SOFTDEVICE_PRESENT) - #define MBED_RAM_START 0x20003188 - #define MBED_RAM_SIZE 0x3CE78 - #else - #define MBED_RAM_START 0x20000000 - #define MBED_RAM_SIZE 0x40000 - #endif -#endif - #define MBED_RAM0_START MBED_RAM_START #define MBED_RAM0_SIZE 0x100 diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_IAR/nRF52840.icf b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_IAR/nRF52840.icf index 8402657f30f..cbd305b3bce 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_IAR/nRF52840.icf +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_IAR/nRF52840.icf @@ -11,17 +11,6 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; } -/* If softdevice is present, set aside space for it */ -if (!isdefinedsymbol(MBED_RAM_START)) { - if (isdefinedsymbol(SOFTDEVICE_PRESENT)) { - define symbol MBED_RAM_START = 0x20003188; - define symbol MBED_RAM_SIZE = 0x3CE78; - } else { - define symbol MBED_RAM_START = 0x20000000; - define symbol MBED_RAM_SIZE = 0x40000; - } -} - if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json index 4bdf39dbdb5..ff7d2eb2282 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json @@ -34,7 +34,9 @@ "target_overrides": { "*": { "target.bootloader_img": "hex/s132_nrf52_6.0.0_softdevice.hex", - "target.app_offset": "0x26000" + "target.app_offset": "0x26000", + "target.mbed_ram_start": "0x20001D70", + "target.mbed_ram_size": "0xE290" } } } diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_nvic.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_nvic.h index f5c7e8e0286..c71a633c6bf 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_nvic.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_nvic.h @@ -312,6 +312,7 @@ __STATIC_INLINE uint32_t __sd_nvic_is_app_accessible_priority(uint32_t priority) if( priority == 0 || priority == 1 || priority == 4 + || priority == 5 ) { return 0; diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/mbed_lib.json b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/mbed_lib.json index 444d257e445..1f522690f41 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/mbed_lib.json +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/mbed_lib.json @@ -5,7 +5,7 @@ "S140", "BLE_STACK_SUPPORT_REQD", "NRF_SDH_CLOCK_LF_XTAL_ACCURACY=7", - "NRF_SD_BLE_API_VERSION=5", + "NRF_SD_BLE_API_VERSION=6", "NRF_SDH_ENABLED=1", "NRF_SDH_BLE_ENABLED=1", "PEER_MANAGER_ENABLED=1", @@ -29,7 +29,9 @@ ], "target_overrides": { "*": { - "target.bootloader_img": "hex/s140_nrf52_6.0.0_softdevice.hex" + "target.bootloader_img": "hex/s140_nrf52_6.0.0_softdevice.hex", + "target.mbed_ram_start": "0x200032F8", + "target.mbed_ram_size": "0x3CD08" } } } diff --git a/targets/targets.json b/targets/targets.json index 4ab8f63b444..d952cc433a3 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -6911,6 +6911,7 @@ "NRF5x", "NRF52", "SDK_15_0", + "NORDIC_SOFTDEVICE", "SOFTDEVICE_COMMON", "SOFTDEVICE_S140_FULL" ], From e381832786b30ad4acd68184ab7b4613f71acd22 Mon Sep 17 00:00:00 2001 From: Desmond Chen Date: Fri, 14 Dec 2018 09:22:49 -0600 Subject: [PATCH 462/488] Fix SoftDevice configuration on NRF52_DK --- .../TARGET_SOFTDEVICE_S132_FULL/headers/nrf_nvic.h | 1 + .../TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json | 6 +++--- targets/targets.json | 1 + 3 files changed, 5 insertions(+), 3 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_nvic.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_nvic.h index f5c7e8e0286..c71a633c6bf 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_nvic.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_nvic.h @@ -312,6 +312,7 @@ __STATIC_INLINE uint32_t __sd_nvic_is_app_accessible_priority(uint32_t priority) if( priority == 0 || priority == 1 || priority == 4 + || priority == 5 ) { return 0; diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json index ff7d2eb2282..c06a9ad5d6f 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json @@ -5,7 +5,7 @@ "S132", "BLE_STACK_SUPPORT_REQD", "NRF_SDH_CLOCK_LF_XTAL_ACCURACY=7", - "NRF_SD_BLE_API_VERSION=5", + "NRF_SD_BLE_API_VERSION=6", "NRF_SDH_ENABLED=1", "NRF_SDH_BLE_ENABLED=1", "PEER_MANAGER_ENABLED=1", @@ -35,8 +35,8 @@ "*": { "target.bootloader_img": "hex/s132_nrf52_6.0.0_softdevice.hex", "target.app_offset": "0x26000", - "target.mbed_ram_start": "0x20001D70", - "target.mbed_ram_size": "0xE290" + "target.mbed_ram_start": "0x200032E8", + "target.mbed_ram_size": "0xCD18" } } } diff --git a/targets/targets.json b/targets/targets.json index d952cc433a3..69fa3b0c0e0 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -6784,6 +6784,7 @@ "NRF5x", "NRF52", "SDK_15_0", + "NORDIC_SOFTDEVICE", "SOFTDEVICE_COMMON", "SOFTDEVICE_S132_FULL" ], From 22a425eaa4d3c2e38e92fac7aa570a33ecce8152 Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Tue, 18 Dec 2018 15:04:25 -0600 Subject: [PATCH 463/488] Remove duplicate file --- .../doc/RF-s140_nrf52_6.0.0_release-notes.pdf | Bin 70447 -> 0 bytes 1 file changed, 0 insertions(+), 0 deletions(-) delete mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/doc/RF-s140_nrf52_6.0.0_release-notes.pdf diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/doc/RF-s140_nrf52_6.0.0_release-notes.pdf b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/doc/RF-s140_nrf52_6.0.0_release-notes.pdf deleted file mode 100644 index 999551fc3c2aeabcbaf0c0bd95b3085e46e48170..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 70447 zcmdSBWmF|gw@%ALPi$+!1Tdm~&+^cLbD5ViJt3OaMg6z5Uq*L^w_s5*89i6B|T6K4v*<2XkW= zYaeqn5>{q85-t`F4lZUz5>7T|aS}Ebb}nWG5>_r|wT}xd96)9%5?vAwP9O;zJD0wI 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z!fS0MYJ+(UTDVJEpwW&)(>VzXkkX?fS2{{w)doTfqO-uKzW0k^JQd zAe=C7|6Z8a{9kz*|9s=oZ{83X{)amR7KCH`A?QEyhaN;%l5|Q_$lph(p{ibF44Ov9 zy;OA!GG+}|XqR);i=sVmS=VS+tVj=8+GccK?IX00@>8=^H0gczaeog$+#J(XKdM?% zu{v}N--d45oyzQsp#A2k$X9qY{4dVj%o+Jh7xVIy9mm8n({TU*>qGJt2}B-nd$%?K z9HL>NJ53|hV}3b*^8U^Xj04ykDu??EmIZ%W0`;5Q|FhSRi3I$O0|*Ae{;3C8srQ=) zD4?pr*Z*q7O@&Y84Z0En0o8y&5QvZV8?B zl>{epPggZj_n{y}PUnUyP1G0CgI8A)c(0JkMX}2YZf{}XkYa(XnIeD1#`i^AzlT|W z3s`7bxT3xv@GIx+=z(%_!#J^8t_W+SmAkVm0F0@k`FoJ#Z@5*FHxidufPq9rAo4J% zf-qP}SOF?51P4K(LNJJoqOiO?Tv8k?D+5x1%g93I`0fN8n#rxf51q(ueI?m1*Z~C|OWx7aTjJF8-O?htXAZ&mJMqmIG05F-CT-doz4|r6laq^6j*1r2C?cIrmT>D%3fpgl6y{h4=B%;55Ie>JaCP@~Mc7;> R!9)`;lW=k>XewSN`9Hk69|iyb From d457c7bf88c9b75a7253de396503b733828c5dca Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Tue, 18 Dec 2018 15:30:18 -0600 Subject: [PATCH 464/488] Remove RTC from nRF52840_DK and DELTA_DFCM_NNN50 (was testing) --- targets/targets.json | 2 -- 1 file changed, 2 deletions(-) diff --git a/targets/targets.json b/targets/targets.json index 69fa3b0c0e0..aec25cad18d 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -4755,7 +4755,6 @@ "PORTINOUT", "PORTOUT", "PWMOUT", - "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", @@ -6895,7 +6894,6 @@ "PORTINOUT", "PORTOUT", "PWMOUT", - "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", From d953760410509ef1e1451ee0ef3913ebf11e8fc5 Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Tue, 18 Dec 2018 18:02:33 -0600 Subject: [PATCH 465/488] Update file header at TARGET_NRF52 level - Update (c) year and company name - Add SPDX-License-Identifier - Impacted files: - Files touched for SDK15 port - Files added in 2018 --- .../TARGET_NRF5x/TARGET_NRF52/PeripheralPinsDefault.c | 3 ++- targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/analogin_api.c | 3 ++- targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/common_rtc.h | 3 ++- targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/gpio_api.c | 3 ++- .../TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/object_owners.c | 3 ++- targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/pinmap_ex.c | 3 ++- targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/pinmap_ex.h | 3 ++- targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/sleep.c | 3 ++- targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/us_ticker.h | 3 ++- 9 files changed, 18 insertions(+), 9 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/PeripheralPinsDefault.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/PeripheralPinsDefault.c index fcd47977975..13413ff8158 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/PeripheralPinsDefault.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/PeripheralPinsDefault.c @@ -1,5 +1,6 @@ /* mbed Microcontroller Library - * Copyright (c) 2018 ARM Limited + * Copyright (c) 2018 ARM Limited and affiliates. + * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/analogin_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/analogin_api.c index 1bb73a57940..4f92148a0e0 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/analogin_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/analogin_api.c @@ -1,5 +1,6 @@ /* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited + * Copyright (c) 2016-2018 Arm Limited and affiliates. + * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/common_rtc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/common_rtc.h index dae27b263c4..b9bde52c351 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/common_rtc.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/common_rtc.h @@ -1,5 +1,6 @@ /* mbed Microcontroller Library - * Copyright (c) 2015 ARM Limited + * Copyright (c) 2015-2018 ARM Limited and affiliates. + * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/gpio_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/gpio_api.c index 9addff70f58..b53cc2ff3d5 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/gpio_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/gpio_api.c @@ -1,5 +1,6 @@ /* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited + * Copyright (c) 2006-2018 ARM Limited and affiliates. + * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/object_owners.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/object_owners.c index 2f3bc3779ac..e9d55f53fcb 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/object_owners.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/object_owners.c @@ -1,5 +1,6 @@ /* mbed Microcontroller Library - * Copyright (c) 2018 ARM Limited + * Copyright (c) 2018 ARM Limited and affiliates. + * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/pinmap_ex.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/pinmap_ex.c index bae81853311..1387714cc62 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/pinmap_ex.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/pinmap_ex.c @@ -1,5 +1,6 @@ /* mbed Microcontroller Library - * Copyright (c) 2018 ARM Limited + * Copyright (c) 2018 ARM Limited and affiliates. + * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/pinmap_ex.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/pinmap_ex.h index 5738248a3c1..e80b8a5ec91 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/pinmap_ex.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/pinmap_ex.h @@ -1,5 +1,6 @@ /* mbed Microcontroller Library - * Copyright (c) 2018 ARM Limited + * Copyright (c) 2018 ARM Limited and affiliates. + * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/sleep.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/sleep.c index a58591dd65a..a0d0c8f313b 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/sleep.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/sleep.c @@ -1,5 +1,6 @@ /* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited + * Copyright (c) 2006-2018 Arm Limited and affiliates. + * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/us_ticker.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/us_ticker.h index defaf325427..fe58a638abf 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/us_ticker.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/us_ticker.h @@ -1,5 +1,6 @@ /* mbed Microcontroller Library - * Copyright (c) 2018 ARM Limited + * Copyright (c) 2018 ARM Limited and affiliates. + * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. From 8125d9683d8d70ee188606b3bfd417c6b34f4edc Mon Sep 17 00:00:00 2001 From: Desmond Chen Date: Wed, 19 Dec 2018 11:39:37 -0800 Subject: [PATCH 466/488] Add BLE feature to mbed_lib.json of SoftDevice --- .../TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json | 1 + .../TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/mbed_lib.json | 1 + .../TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/mbed_lib.json | 1 + .../TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/mbed_lib.json | 1 + 4 files changed, 4 insertions(+) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json index c06a9ad5d6f..9b00dbe5a13 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json @@ -33,6 +33,7 @@ ], "target_overrides": { "*": { + "target.features_add": ["BLE"], "target.bootloader_img": "hex/s132_nrf52_6.0.0_softdevice.hex", "target.app_offset": "0x26000", "target.mbed_ram_start": "0x200032E8", diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/mbed_lib.json b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/mbed_lib.json index 45304fcaa2d..b6a26ff8c5b 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/mbed_lib.json +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S132_OTA/mbed_lib.json @@ -33,6 +33,7 @@ ], "target_overrides": { "*": { + "target.features_add": ["BLE"], "target.bootloader_img": "hex/s132_nrf52_6.0.0_softdevice.hex" } } diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/mbed_lib.json b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/mbed_lib.json index 1f522690f41..a755cee09d2 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/mbed_lib.json +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_FULL/mbed_lib.json @@ -29,6 +29,7 @@ ], "target_overrides": { "*": { + "target.features_add": ["BLE"], "target.bootloader_img": "hex/s140_nrf52_6.0.0_softdevice.hex", "target.mbed_ram_start": "0x200032F8", "target.mbed_ram_size": "0x3CD08" diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/mbed_lib.json b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/mbed_lib.json index 444d257e445..8f3a1bd52f4 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/mbed_lib.json +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/TARGET_SOFTDEVICE_S140_OTA/mbed_lib.json @@ -29,6 +29,7 @@ ], "target_overrides": { "*": { + "target.features_add": ["BLE"], "target.bootloader_img": "hex/s140_nrf52_6.0.0_softdevice.hex" } } From 0a55865fd9ba2d58dae7ccdbae1e1ad00f867050 Mon Sep 17 00:00:00 2001 From: Naveen Kaje Date: Sat, 12 Jan 2019 06:01:17 -0600 Subject: [PATCH 467/488] NRF52: reloc_vector_table: check the RTS pin settings in code Move the check from preprocessor to the if condition --- .../TARGET_NRF5x/TARGET_NRF52/reloc_vector_table.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/reloc_vector_table.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/reloc_vector_table.c index 619c8145b5d..23f87ea7ddd 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/reloc_vector_table.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/reloc_vector_table.c @@ -113,7 +113,7 @@ void nrf_reloc_vector_table(void) #endif } -#if (STDIO_UART_RTS != NC) + void mbed_sdk_init(void) { if (STDIO_UART_RTS != NC) { @@ -123,4 +123,3 @@ void mbed_sdk_init(void) gpio_write(&rts, 0); } } -#endif From 4f36cd6bb52ef39adbe20f5e695a47814dc007d0 Mon Sep 17 00:00:00 2001 From: Desmond Chen Date: Thu, 24 Jan 2019 16:53:03 +0800 Subject: [PATCH 468/488] Fix nrf section iter macro check --- .../libraries/experimental_section_vars/nrf_section_iter.c | 6 +++--- .../libraries/experimental_section_vars/nrf_section_iter.h | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section_iter.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section_iter.c index ea8b02f7a68..288315e5d2a 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section_iter.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section_iter.c @@ -45,7 +45,7 @@ #include "nrf_section_iter.h" -#if !defined(__GNUC__) +#if !defined(__GNUC__) || defined(__CC_ARM) static void nrf_section_iter_item_set(nrf_section_iter_t * p_iter) { ASSERT(p_iter != NULL); @@ -82,7 +82,7 @@ void nrf_section_iter_init(nrf_section_iter_t * p_iter, nrf_section_set_t const p_iter->p_set = p_set; -#if defined(__GNUC__) +#if defined(__GNUC__) && !defined(__CC_ARM) p_iter->p_item = p_iter->p_set->section.p_start; if (p_iter->p_item == p_iter->p_set->section.p_end) { @@ -106,7 +106,7 @@ void nrf_section_iter_next(nrf_section_iter_t * p_iter) p_iter->p_item = (void *)((size_t)(p_iter->p_item) + p_iter->p_set->item_size); -#if defined(__GNUC__) +#if defined(__GNUC__) && !defined(__CC_ARM) if (p_iter->p_item == p_iter->p_set->section.p_end) { p_iter->p_item = NULL; diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section_iter.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section_iter.h index 2f9be61bea5..014c21f7020 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section_iter.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section_iter.h @@ -68,7 +68,7 @@ typedef struct /**@brief Set of the sections description structure. */ typedef struct { -#if defined(__GNUC__) +#if defined(__GNUC__) && !defined(__CC_ARM) nrf_section_t section; //!< Description of the set of sections. /**< * In case of GCC all sections in the set are sorted and @@ -87,7 +87,7 @@ typedef struct typedef struct { nrf_section_set_t const * p_set; //!< Pointer to the appropriate section set. -#if !defined(__GNUC__) +#if !defined(__GNUC__) || defined(__CC_ARM) nrf_section_t const * p_section; //!< Pointer to the selected section. /**< * In case of GCC all sections in the set are sorted and @@ -110,7 +110,7 @@ typedef struct * @param[in] _count Number of the sections in the set. This parameter is ignored in case of GCC. * @hideinitializer */ -#if defined(__GNUC__) +#if defined(__GNUC__) && !defined(__CC_ARM) #define NRF_SECTION_SET_DEF(_name, _type, _count) \ \ From 9811f5430dcc03a95f80db3fb00435d7bd471d76 Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Mon, 4 Mar 2019 17:47:34 -0600 Subject: [PATCH 469/488] Rebase to master in preparation for v5.12.0 --- targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c | 1 + 1 file changed, 1 insertion(+) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c index 802120d1b94..823c651bc94 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c @@ -48,6 +48,7 @@ #include "nrfx_glue.h" #include "nrfx_gpiote.h" #include "nrfx_ppi.h" +#include "PeripheralPins.h" #include "platform/mbed_critical.h" From b6804a9ecb9164063517c9c02bf1bf111bbc6d4e Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Tue, 5 Mar 2019 10:33:36 -0600 Subject: [PATCH 470/488] Update QSPI in the SDK to support long frame mode * Carry forward changes made to v14.2SDK to support long frame mode (from commit 2a72bb67a315fb0e3a6654bd8ede27c4f579fa93). * Fixed a few driver calls from rebase --- .../modules/nrfx/drivers/include/nrfx_qspi.h | 4 +++- .../TARGET_SDK_15_0/modules/nrfx/hal/nrf_qspi.h | 6 +++++- targets/TARGET_NORDIC/TARGET_NRF5x/qspi_api.c | 10 +++++----- 3 files changed, 13 insertions(+), 7 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_qspi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_qspi.h index 6f19f105b2c..1b5791ecb06 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_qspi.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_qspi.h @@ -106,7 +106,9 @@ typedef struct .io2_level = false, \ .io3_level = false, \ .wipwait = false, \ - .wren = false \ + .wren = false, \ + .lfen = false, \ + .lfstop = false \ } /** diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_qspi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_qspi.h index c6970e4a42f..a5c39d1b2c4 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_qspi.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_qspi.h @@ -228,6 +228,8 @@ typedef struct bool io3_level; /**< I/O line level during transmission. */ bool wipwait; /**< Wait if a Wait in Progress bit is set in the memory status byte. */ bool wren; /**< Send write enable before instruction. */ + bool lfen; /**< Enable long frame mode. */ + bool lfstop; /**< Stop long frame mode. */ } nrf_qspi_cinstr_conf_t; /** @@ -764,7 +766,9 @@ __STATIC_INLINE void nrf_qspi_cinstr_transfer_start(NRF_QSPI_Type * ((uint32_t)p_config->io2_level << QSPI_CINSTRCONF_LIO2_Pos) | ((uint32_t)p_config->io3_level << QSPI_CINSTRCONF_LIO3_Pos) | ((uint32_t)p_config->wipwait << QSPI_CINSTRCONF_WIPWAIT_Pos) | - ((uint32_t)p_config->wren << QSPI_CINSTRCONF_WREN_Pos)); + ((uint32_t)p_config->wren << QSPI_CINSTRCONF_WREN_Pos) | + ((uint32_t)p_config->lfen << QSPI_CINSTRCONF_LFEN_Pos) | + ((uint32_t)p_config->lfstop << QSPI_CINSTRCONF_LFSTOP_Pos) ); } #endif // SUPPRESS_INLINE_IMPLEMENTATION diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/qspi_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/qspi_api.c index 01661d1899b..1a33203c4e0 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/qspi_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/qspi_api.c @@ -275,7 +275,7 @@ qspi_status_t qspi_write(qspi_t *obj, const qspi_command_t *command, const void if (is_word_aligned(data)) { // write here does not return how much it transfered, we return transfered all - ret_code_t ret = nrf_drv_qspi_write(data, *length, command->address.value); + ret_code_t ret = nrfx_qspi_write(data, *length, command->address.value); if (ret == NRF_SUCCESS ) { return QSPI_STATUS_OK; } else { @@ -294,7 +294,7 @@ qspi_status_t qspi_write(qspi_t *obj, const qspi_command_t *command, const void memcpy(aligned_buffer, &((const uint8_t *)data)[pos], diff); // write one buffer over QSPI - ret_code_t ret = nrf_drv_qspi_write(aligned_buffer, diff, command->address.value+pos); + ret_code_t ret = nrfx_qspi_write(aligned_buffer, diff, command->address.value+pos); if (ret != NRF_SUCCESS ) { return QSPI_STATUS_ERROR; } @@ -472,7 +472,7 @@ qspi_status_t sfdp_read(qspi_t *obj, const qspi_command_t *command, void *data, qspi_cinstr_config.lfstop = true; } - ret_code = nrf_drv_qspi_cinstr_xfer(&qspi_cinstr_config, sfdp_data, sfdp_data); + ret_code = nrfx_qspi_cinstr_xfer(&qspi_cinstr_config, sfdp_data, sfdp_data); if (ret_code != NRF_SUCCESS) { return QSPI_STATUS_ERROR; } @@ -490,7 +490,7 @@ qspi_status_t sfdp_read(qspi_t *obj, const qspi_command_t *command, void *data, qspi_cinstr_config.lfstop = false; qspi_cinstr_config.length = NRF_QSPI_CINSTR_LEN_5B; - ret_code = nrf_drv_qspi_cinstr_xfer(&qspi_cinstr_config, sfdp_cmd, sfdp_cmd); + ret_code = nrfx_qspi_cinstr_xfer(&qspi_cinstr_config, sfdp_cmd, sfdp_cmd); if (ret_code != NRF_SUCCESS) { return QSPI_STATUS_ERROR; } @@ -506,7 +506,7 @@ qspi_status_t sfdp_read(qspi_t *obj, const qspi_command_t *command, void *data, qspi_cinstr_config.lfstop = true; } - ret_code = nrf_drv_qspi_cinstr_xfer(&qspi_cinstr_config, sfdp_data, sfdp_data); + ret_code = nrfx_qspi_cinstr_xfer(&qspi_cinstr_config, sfdp_data, sfdp_data); if (ret_code != NRF_SUCCESS) { return QSPI_STATUS_ERROR; } From 7a6a6120ae2a6a6427d7f8202db7165e83a7023e Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Tue, 5 Mar 2019 16:13:38 -0600 Subject: [PATCH 471/488] Fix SOFTDEVICE_NONE builds and clean up * Update all scatterfiles to define MBED_RAM_START and MBED_RAM_SIZE. These get defined in mbed_lib.json when building with a SoftDevice but were missing when no SoftDevice is brought in. * Remove SDK 14.2 SoftDevice files. * Add missing header file to qspi_api.c. --- .../device/TOOLCHAIN_ARM_STD/nRF52832.sct | 5 + .../device/TOOLCHAIN_GCC_ARM/NRF52832.ld | 5 + .../device/TOOLCHAIN_IAR/nRF52832.icf | 5 + .../device/TOOLCHAIN_ARM_STD/nRF52840.sct | 5 + .../device/TOOLCHAIN_GCC_ARM/NRF52840.ld | 5 + .../device/TOOLCHAIN_IAR/nRF52840.icf | 5 + .../TARGET_SOFTDEVICE_COMMON/README.md | 21 - .../TARGET_SOFTDEVICE_COMMON/ble/README.md | 20 - .../ble_radio_notification.c | 89 - .../ble_radio_notification.h | 82 - .../libraries/bootloader/dfu/nrf_dfu_mbr.c | 154 - .../libraries/bootloader/dfu/nrf_dfu_mbr.h | 131 - .../libraries/bootloader/dfu/nrf_dfu_types.h | 327 - .../libraries/fstorage/nrf_fstorage_sd.c | 616 - .../libraries/fstorage/nrf_fstorage_sd.h | 75 - .../softdevice/common/nrf_sdh.c | 422 - .../softdevice/common/nrf_sdh.h | 304 - .../softdevice/common/nrf_sdh_ant.c | 140 - .../softdevice/common/nrf_sdh_ant.h | 182 - .../softdevice/common/nrf_sdh_ble.c | 300 - .../softdevice/common/nrf_sdh_ble.h | 187 - .../softdevice/common/nrf_sdh_soc.c | 118 - .../softdevice/common/nrf_sdh_soc.h | 143 - .../libraries/fstorage/nrf_fstorage_nvmc.c | 215 - .../libraries/fstorage/nrf_fstorage_nvmc.h | 75 - .../nrf_soc_nosd/nrf_error.h | 87 - .../nrf_soc_nosd/nrf_nvic.c | 123 - .../nrf_soc_nosd/nrf_nvic.h | 166 - .../nrf_soc_nosd/nrf_soc.c | 48 - .../nrf_soc_nosd/nrf_soc.h | 80 - .../doc/s112_nrf51822_5.1.0_release-notes.pdf | Bin 14830 -> 0 bytes .../s112_nrf52810_5.1.0_licence-agreement.txt | 35 - .../TARGET_SOFTDEVICE_S112/headers/ble_err.h | 91 - .../TARGET_SOFTDEVICE_S112/headers/ble_gap.h | 1847 -- .../TARGET_SOFTDEVICE_S112/headers/ble_gatt.h | 228 - .../headers/ble_gattc.h | 707 - .../headers/ble_gatts.h | 841 - .../TARGET_SOFTDEVICE_S112/headers/ble_hci.h | 135 - .../headers/ble_ranges.h | 148 - .../headers/ble_types.h | 215 - .../headers/nrf52/nrf_mbr.h | 241 - .../TARGET_SOFTDEVICE_S112/headers/nrf_ble.h | 616 - .../headers/nrf_error.h | 90 - .../headers/nrf_error_sdm.h | 70 - .../headers/nrf_error_soc.h | 85 - .../TARGET_SOFTDEVICE_S112/headers/nrf_nvic.h | 486 - .../headers/nrf_sd_def.h | 59 - .../TARGET_SOFTDEVICE_S112/headers/nrf_sdm.h | 357 - .../TARGET_SOFTDEVICE_S112/headers/nrf_soc.h | 934 - .../TARGET_SOFTDEVICE_S112/headers/nrf_svc.h | 90 - .../s112_nrf52810_5.1.0_licence-agreement.txt | 35 - .../hex/s112_nrf52810_5.1.0_softdevice.hex | 5925 ------- .../doc/s132_nrf51822_5.0.0_release-notes.pdf | Bin 35595 -> 0 bytes .../s132_nrf52_5.0.0_licence-agreement.txt | 35 - .../s132_nrf52_5.0.0_migration-document.pdf | Bin 99118 -> 0 bytes .../headers/ble_err.h | 91 - .../headers/ble_gap.h | 2170 --- .../headers/ble_gatt.h | 223 - .../headers/ble_gattc.h | 702 - .../headers/ble_gatts.h | 835 - .../headers/ble_hci.h | 135 - .../headers/ble_l2cap.h | 504 - .../headers/ble_ranges.h | 156 - .../headers/ble_types.h | 215 - .../headers/nrf52/nrf_mbr.h | 228 - .../headers/nrf_ble.h | 620 - .../headers/nrf_error.h | 90 - .../headers/nrf_error_sdm.h | 70 - .../headers/nrf_error_soc.h | 85 - .../headers/nrf_nvic.h | 485 - .../headers/nrf_sd_def.h | 59 - .../headers/nrf_sdm.h | 355 - .../headers/nrf_soc.h | 931 - .../headers/nrf_svc.h | 90 - .../s132_nrf52_5.0.0_licence-agreement.txt | 35 - .../hex/s132_nrf52_5.0.0_softdevice.hex | 8678 --------- .../TARGET_SOFTDEVICE_S132_FULL/mbed_lib.json | 40 - .../doc/s132_nrf51822_5.0.0_release-notes.pdf | Bin 35595 -> 0 bytes .../s132_nrf52_5.0.0_licence-agreement.txt | 35 - .../s132_nrf52_5.0.0_migration-document.pdf | Bin 99118 -> 0 bytes .../s132_nrf52_5.0.0_licence-agreement.txt | 35 - .../hex/s132_nrf52_5.0.0_mbr.hex | 77 - .../libraries/fstorage/nrf_fstorage_nvmc.c | 215 - .../libraries/fstorage/nrf_fstorage_nvmc.h | 75 - .../TARGET_SOFTDEVICE_S132_MBR/mbed_lib.json | 8 - .../TARGET_SOFTDEVICE_S132_MBR/mbr/nrf_mbr.h | 228 - .../nrf_soc_nosd/nrf_error.h | 87 - .../nrf_soc_nosd/nrf_nvic.c | 123 - .../nrf_soc_nosd/nrf_nvic.h | 166 - .../nrf_soc_nosd/nrf_soc.c | 48 - .../nrf_soc_nosd/nrf_soc.h | 80 - .../doc/s132_nrf51822_5.0.0_release-notes.pdf | Bin 35595 -> 0 bytes .../s132_nrf52_5.0.0_licence-agreement.txt | 35 - .../s132_nrf52_5.0.0_migration-document.pdf | Bin 99118 -> 0 bytes .../headers/ble_err.h | 91 - .../headers/ble_gap.h | 2170 --- .../headers/ble_gatt.h | 223 - .../headers/ble_gattc.h | 702 - .../headers/ble_gatts.h | 835 - .../headers/ble_hci.h | 135 - .../headers/ble_l2cap.h | 504 - .../headers/ble_ranges.h | 156 - .../headers/ble_types.h | 215 - .../headers/nrf52/nrf_mbr.h | 228 - .../headers/nrf_ble.h | 620 - .../headers/nrf_error.h | 90 - .../headers/nrf_error_sdm.h | 70 - .../headers/nrf_error_soc.h | 85 - .../headers/nrf_nvic.h | 485 - .../headers/nrf_sd_def.h | 59 - .../headers/nrf_sdm.h | 355 - .../headers/nrf_soc.h | 931 - .../headers/nrf_svc.h | 90 - .../s132_nrf52_5.0.0_licence-agreement.txt | 35 - .../hex/s132_nrf52_5.0.0_softdevice.hex | 4265 ----- .../TARGET_SOFTDEVICE_S132_OTA/mbed_lib.json | 40 - ...f52840_5.0.0-2.alpha_licence-agreement.pdf | Bin 5542 -> 0 bytes ...f52840_5.0.0-2.alpha_licence-agreement.txt | 96 - ...52840_5.0.0-2.alpha_migration-document.pdf | Bin 21718 -> 0 bytes .../s140_nrf52840_5.0.0-2.alpha_readme.txt | 10 - ...0_5.0.0-2.alpha_release-notes-update-1.pdf | Bin 29128 -> 0 bytes .../headers/ble_err.h | 91 - .../headers/ble_gap.h | 2211 --- .../headers/ble_gatt.h | 221 - .../headers/ble_gattc.h | 700 - .../headers/ble_gatts.h | 832 - .../headers/ble_hci.h | 131 - .../headers/ble_l2cap.h | 67 - .../headers/ble_ranges.h | 154 - .../headers/ble_types.h | 205 - .../headers/nrf52/nrf_mbr.h | 212 - .../headers/nrf_ble.h | 615 - .../headers/nrf_error.h | 87 - .../headers/nrf_error_sdm.h | 67 - .../headers/nrf_error_soc.h | 82 - .../headers/nrf_nvic.h | 517 - .../headers/nrf_sd_def.h | 59 - .../headers/nrf_sdm.h | 338 - .../headers/nrf_soc.h | 926 - .../headers/nrf_svc.h | 88 - ...f52840_5.0.0-2.alpha_licence-agreement.txt | 96 - ...s140_nrf52840_5.0.0-2.alpha_softdevice.hex | 8363 --------- .../TARGET_SOFTDEVICE_S140_FULL/mbed_lib.json | 40 - ...f52840_5.0.0-2.alpha_licence-agreement.pdf | Bin 5542 -> 0 bytes ...f52840_5.0.0-2.alpha_licence-agreement.txt | 96 - ...52840_5.0.0-2.alpha_migration-document.pdf | Bin 21718 -> 0 bytes .../s140_nrf52840_5.0.0-2.alpha_readme.txt | 10 - ...0_5.0.0-2.alpha_release-notes-update-1.pdf | Bin 29128 -> 0 bytes ...f52840_5.0.0-2.alpha_licence-agreement.txt | 96 - .../hex/s140_nrf52840_5.0.0-2.alpha_mbr.hex | 77 - .../libraries/fstorage/nrf_fstorage_nvmc.c | 215 - .../libraries/fstorage/nrf_fstorage_nvmc.h | 75 - .../TARGET_SOFTDEVICE_S140_MBR/mbed_lib.json | 8 - .../TARGET_SOFTDEVICE_S140_MBR/mbr/nrf_mbr.h | 212 - .../nrf_soc_nosd/nrf_error.h | 87 - .../nrf_soc_nosd/nrf_nvic.c | 123 - .../nrf_soc_nosd/nrf_nvic.h | 166 - .../nrf_soc_nosd/nrf_soc.c | 48 - .../nrf_soc_nosd/nrf_soc.h | 80 - ...f52840_5.0.0-2.alpha_licence-agreement.pdf | Bin 5542 -> 0 bytes ...f52840_5.0.0-2.alpha_licence-agreement.txt | 96 - ...52840_5.0.0-2.alpha_migration-document.pdf | Bin 21718 -> 0 bytes .../s140_nrf52840_5.0.0-2.alpha_readme.txt | 10 - ...0_5.0.0-2.alpha_release-notes-update-1.pdf | Bin 29128 -> 0 bytes .../headers/ble_err.h | 91 - .../headers/ble_gap.h | 2211 --- .../headers/ble_gatt.h | 221 - .../headers/ble_gattc.h | 700 - .../headers/ble_gatts.h | 832 - .../headers/ble_hci.h | 131 - .../headers/ble_l2cap.h | 67 - .../headers/ble_ranges.h | 154 - .../headers/ble_types.h | 205 - .../headers/nrf52/nrf_mbr.h | 212 - .../headers/nrf_ble.h | 615 - .../headers/nrf_error.h | 87 - .../headers/nrf_error_sdm.h | 67 - .../headers/nrf_error_soc.h | 82 - .../headers/nrf_nvic.h | 517 - .../headers/nrf_sd_def.h | 59 - .../headers/nrf_sdm.h | 338 - .../headers/nrf_soc.h | 926 - .../headers/nrf_svc.h | 88 - ...f52840_5.0.0-2.alpha_licence-agreement.txt | 96 - ...s140_nrf52840_5.0.0-2.alpha_softdevice.hex | 4107 ----- .../TARGET_SOFTDEVICE_S140_OTA/mbed_lib.json | 40 - .../TARGET_SDK_14_2/boards/README.md | 9 - .../TARGET_SDK_14_2/boards/arduino_primo.h | 119 - .../TARGET_SDK_14_2/boards/boards.c | 165 - .../TARGET_SDK_14_2/boards/boards.h | 319 - .../TARGET_SDK_14_2/boards/nrf6310.h | 186 - .../TARGET_SDK_14_2/boards/pca10000.h | 103 - .../TARGET_SDK_14_2/boards/pca10001.h | 170 - .../TARGET_SDK_14_2/boards/pca10003.h | 98 - .../TARGET_SDK_14_2/boards/pca10028.h | 180 - .../TARGET_SDK_14_2/boards/pca10031.h | 97 - .../TARGET_SDK_14_2/boards/pca10036.h | 182 - .../TARGET_SDK_14_2/boards/pca10040.h | 182 - .../TARGET_SDK_14_2/boards/pca10056.h | 166 - .../TARGET_SDK_14_2/boards/pca20006.h | 99 - .../TARGET_SDK_14_2/boards/wt51822.h | 94 - .../TARGET_SDK_14_2/device/README.md | 7 - .../device/compiler_abstraction.h | 155 - .../TARGET_NRF5x/TARGET_SDK_14_2/device/nrf.h | 102 - .../TARGET_SDK_14_2/device/nrf51.h | 1202 -- .../device/nrf51422_peripherals.h | 164 - .../device/nrf51802_peripherals.h | 164 - .../device/nrf51822_peripherals.h | 164 - .../TARGET_SDK_14_2/device/nrf51_bitfields.h | 6140 ------- .../TARGET_SDK_14_2/device/nrf51_deprecated.h | 451 - .../TARGET_SDK_14_2/device/nrf51_to_nrf52.h | 963 - .../device/nrf51_to_nrf52810.h | 532 - .../device/nrf51_to_nrf52840.h | 578 - .../TARGET_SDK_14_2/device/nrf52.h | 2100 --- .../TARGET_SDK_14_2/device/nrf52810.h | 1589 -- .../device/nrf52810_bitfields.h | 10247 ----------- .../device/nrf52810_peripherals.h | 212 - .../device/nrf52832_peripherals.h | 275 - .../TARGET_SDK_14_2/device/nrf52840.h | 2442 --- .../device/nrf52840_bitfields.h | 14790 ---------------- .../device/nrf52840_peripherals.h | 298 - .../TARGET_SDK_14_2/device/nrf52_bitfields.h | 12657 ------------- .../device/nrf52_name_change.h | 81 - .../device/nrf52_to_nrf52810.h | 105 - .../device/nrf52_to_nrf52840.h | 105 - .../TARGET_SDK_14_2/drivers_nrf/README.md | 13 - .../drivers_nrf/ble_flash/ble_flash.c | 313 - .../drivers_nrf/ble_flash/ble_flash.h | 178 - .../drivers_nrf/clock/nrf_drv_clock.c | 627 - .../drivers_nrf/clock/nrf_drv_clock.h | 285 - .../drivers_nrf/common/nrf_drv_common.c | 297 - .../drivers_nrf/common/nrf_drv_common.h | 358 - .../drivers_nrf/comp/nrf_drv_comp.c | 239 - .../drivers_nrf/comp/nrf_drv_comp.h | 258 - .../drivers_nrf/delay/nrf_delay.h | 269 - .../drivers_nrf/gpiote/nrf_drv_gpiote.c | 808 - .../drivers_nrf/gpiote/nrf_drv_gpiote.h | 385 - .../drivers_nrf/hal/nrf_clock.h | 401 - .../drivers_nrf/hal/nrf_comp.h | 518 - .../TARGET_SDK_14_2/drivers_nrf/hal/nrf_ecb.c | 100 - .../TARGET_SDK_14_2/drivers_nrf/hal/nrf_ecb.h | 101 - .../TARGET_SDK_14_2/drivers_nrf/hal/nrf_egu.h | 367 - .../drivers_nrf/hal/nrf_gpio.h | 795 - .../drivers_nrf/hal/nrf_gpiote.h | 430 - .../TARGET_SDK_14_2/drivers_nrf/hal/nrf_i2s.h | 563 - .../drivers_nrf/hal/nrf_lpcomp.h | 425 - .../drivers_nrf/hal/nrf_nvmc.c | 136 - .../drivers_nrf/hal/nrf_nvmc.h | 125 - .../TARGET_SDK_14_2/drivers_nrf/hal/nrf_pdm.h | 396 - .../drivers_nrf/hal/nrf_peripherals.h | 73 - .../drivers_nrf/hal/nrf_power.h | 1065 -- .../TARGET_SDK_14_2/drivers_nrf/hal/nrf_ppi.h | 439 - .../TARGET_SDK_14_2/drivers_nrf/hal/nrf_pwm.h | 701 - .../drivers_nrf/hal/nrf_qdec.h | 504 - .../drivers_nrf/hal/nrf_qspi.h | 769 - .../TARGET_SDK_14_2/drivers_nrf/hal/nrf_rng.h | 282 - .../TARGET_SDK_14_2/drivers_nrf/hal/nrf_rtc.h | 343 - .../drivers_nrf/hal/nrf_saadc.c | 62 - .../drivers_nrf/hal/nrf_saadc.h | 609 - .../TARGET_SDK_14_2/drivers_nrf/hal/nrf_spi.h | 375 - .../drivers_nrf/hal/nrf_spim.h | 571 - .../drivers_nrf/hal/nrf_spis.h | 553 - .../drivers_nrf/hal/nrf_systick.h | 184 - .../drivers_nrf/hal/nrf_temp.h | 91 - .../drivers_nrf/hal/nrf_timer.h | 630 - .../TARGET_SDK_14_2/drivers_nrf/hal/nrf_twi.h | 452 - .../drivers_nrf/hal/nrf_twim.h | 527 - .../drivers_nrf/hal/nrf_twis.h | 706 - .../drivers_nrf/hal/nrf_uart.h | 549 - .../drivers_nrf/hal/nrf_uarte.h | 642 - .../drivers_nrf/hal/nrf_usbd.h | 1435 -- .../TARGET_SDK_14_2/drivers_nrf/hal/nrf_wdt.h | 339 - .../drivers_nrf/i2s/nrf_drv_i2s.c | 446 - .../drivers_nrf/i2s/nrf_drv_i2s.h | 255 - .../drivers_nrf/lpcomp/nrf_drv_lpcomp.c | 205 - .../drivers_nrf/lpcomp/nrf_drv_lpcomp.h | 153 - .../drivers_nrf/pdm/nrf_drv_pdm.c | 365 - .../drivers_nrf/pdm/nrf_drv_pdm.h | 226 - .../drivers_nrf/power/nrf_drv_power.c | 477 - .../drivers_nrf/power/nrf_drv_power.h | 371 - .../drivers_nrf/ppi/nrf_drv_ppi.c | 540 - .../drivers_nrf/ppi/nrf_drv_ppi.h | 316 - .../drivers_nrf/pwm/nrf_drv_pwm.c | 519 - .../drivers_nrf/pwm/nrf_drv_pwm.h | 512 - .../drivers_nrf/qdec/nrf_drv_qdec.c | 234 - .../drivers_nrf/qdec/nrf_drv_qdec.h | 185 - .../drivers_nrf/qspi/nrf_drv_qspi.c | 308 - .../drivers_nrf/qspi/nrf_drv_qspi.h | 313 - .../drivers_nrf/radio_config/radio_config.c | 188 - .../drivers_nrf/radio_config/radio_config.h | 58 - .../drivers_nrf/rng/nrf_drv_rng.c | 321 - .../drivers_nrf/rng/nrf_drv_rng.h | 135 - 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100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/nrf_bitmask.h delete mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_common.h delete mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_errors.h delete mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_macros.h delete mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_mapped_flags.c delete mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_mapped_flags.h delete mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_os.h delete mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_resources.h diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct index 5a0b849fbd9..575206351c5 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct @@ -9,6 +9,11 @@ #define MBED_APP_SIZE 0x80000 #endif +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 + #define MBED_RAM_SIZE 0x10000 +#endif + #define Stack_Size MBED_BOOT_STACK_SIZE #define MBED_RAM0_START MBED_RAM_START diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld index 3b0221dcc16..926ea76ac78 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld @@ -25,6 +25,11 @@ #define MBED_APP_SIZE 0x80000 #endif +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 + #define MBED_RAM_SIZE 0x10000 +#endif + #if !defined(MBED_BOOT_STACK_SIZE) #define MBED_BOOT_STACK_SIZE 0x800 #endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf index e0d52edfa9f..0278339693e 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf @@ -11,6 +11,11 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x80000; } +if (!isdefinedsymbol(MBED_RAM_START)) { + define symbol MBED_RAM_START = 0x20000000; + define symbol MBED_RAM_SIZE = 0x10000; +} + if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct index e5d93e887ac..1beafe2d87f 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct @@ -9,6 +9,11 @@ #define MBED_APP_SIZE 0x100000 #endif +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 + #define MBED_RAM_SIZE 0x40000 +#endif + #define Stack_Size MBED_BOOT_STACK_SIZE #define MBED_RAM0_START MBED_RAM_START diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld index 68c69abdaa8..efca2de256c 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld @@ -25,6 +25,11 @@ #define MBED_APP_SIZE 0x100000 #endif +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 + #define MBED_RAM_SIZE 0x40000 +#endif + #if !defined(MBED_BOOT_STACK_SIZE) #define MBED_BOOT_STACK_SIZE 0x800 #endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_IAR/nRF52840.icf b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_IAR/nRF52840.icf index cbd305b3bce..600c5b546b6 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_IAR/nRF52840.icf +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_IAR/nRF52840.icf @@ -11,6 +11,11 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; } +if (!isdefinedsymbol(MBED_RAM_START)) { + define symbol MBED_RAM_START = 0x20000000; + define symbol MBED_RAM_SIZE = 0x40000; +} + if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/README.md b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/README.md deleted file mode 100644 index 61aa551ec49..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/README.md +++ /dev/null @@ -1,21 +0,0 @@ -# Folder origin - -components/ble -components/softdevice -components/libraries/fstorage/nrf_fstorage_sd.* - -# Modifications - -Removed: - * common/nrf_sdh_freertos.c - * common/nrf_sdh_freertos.h - * s212/* - * s332/* - -Moved: - * s112/ to ../TARGET_SOFTDEVICE_S112 - * s132/ to ../TARGET_SOFTDEVICE_s132 - * s140/ to ../TARGET_SOFTDEVICE_s140 - -Renamed: - * ble.h to nrf_ble.h diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/ble/README.md b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/ble/README.md deleted file mode 100644 index 0b7a849b176..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/ble/README.md +++ /dev/null @@ -1,20 +0,0 @@ -# Folder origin - -components/ble - -# Modifications - -Removed - * ble_services/* - * ble_dtm/ble_dtm_hw_nrf51.c - * ble_advertising/* - * ble_db_discovery/* - * ble_dtm/* - * ble_racp/* - * common/* - * nrf_ble_gatt/* - * nrf_ble_qwr/* - * peer_manager/* - -Renamed - * #include "ble.h" -> #include "nrf_ble.h" diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/ble/ble_radio_notification/ble_radio_notification.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/ble/ble_radio_notification/ble_radio_notification.c deleted file mode 100644 index a9f81e7692f..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/ble/ble_radio_notification/ble_radio_notification.c +++ /dev/null @@ -1,89 +0,0 @@ -/** - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ble_radio_notification.h" -#include - -#include "nrf_nvic.h" - -static bool m_radio_active = false; /**< Current radio state. */ -static ble_radio_notification_evt_handler_t m_evt_handler = NULL; /**< Application event handler for handling Radio Notification events. */ - - -void SWI1_IRQHandler(void) -{ - m_radio_active = !m_radio_active; - if (m_evt_handler != NULL) - { - m_evt_handler(m_radio_active); - } -} - - -uint32_t ble_radio_notification_init(uint32_t irq_priority, - uint8_t distance, - ble_radio_notification_evt_handler_t evt_handler) -{ - uint32_t err_code; - - m_evt_handler = evt_handler; - - // Initialize Radio Notification software interrupt - err_code = sd_nvic_ClearPendingIRQ(SWI1_IRQn); - if (err_code != NRF_SUCCESS) - { - return err_code; - } - - err_code = sd_nvic_SetPriority(SWI1_IRQn, irq_priority); - if (err_code != NRF_SUCCESS) - { - return err_code; - } - - err_code = sd_nvic_EnableIRQ(SWI1_IRQn); - if (err_code != NRF_SUCCESS) - { - return err_code; - } - - // Configure the event - return sd_radio_notification_cfg_set(NRF_RADIO_NOTIFICATION_TYPE_INT_ON_BOTH, distance); -} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/ble/ble_radio_notification/ble_radio_notification.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/ble/ble_radio_notification/ble_radio_notification.h deleted file mode 100644 index 43e7946f3eb..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/ble/ble_radio_notification/ble_radio_notification.h +++ /dev/null @@ -1,82 +0,0 @@ -/** - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** @file - * - * @defgroup ble_radio_notification Radio Notification Event Handler - * @{ - * @ingroup ble_sdk_lib - * @brief Module for propagating Radio Notification events to the application. - */ - -#ifndef BLE_RADIO_NOTIFICATION_H__ -#define BLE_RADIO_NOTIFICATION_H__ - -#include -#include -#include "nrf_soc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@brief Application radio notification event handler type. */ -typedef void (*ble_radio_notification_evt_handler_t) (bool radio_active); - -/**@brief Function for initializing the Radio Notification module. - * - * @param[in] irq_priority Interrupt priority for the Radio Notification interrupt handler. - * @param[in] distance The time from an Active event until the radio is activated. - * @param[in] evt_handler Handler to be executed when a radio notification event has been - * received. - * - * @return NRF_SUCCESS on successful initialization, otherwise an error code. - */ -uint32_t ble_radio_notification_init(uint32_t irq_priority, - uint8_t distance, - ble_radio_notification_evt_handler_t evt_handler); - - -#ifdef __cplusplus -} -#endif - -#endif // BLE_RADIO_NOTIFICATION_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/dfu/nrf_dfu_mbr.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/dfu/nrf_dfu_mbr.c deleted file mode 100644 index bb75141c77b..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/dfu/nrf_dfu_mbr.c +++ /dev/null @@ -1,154 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "nrf_dfu_mbr.h" -#include "nrf_mbr.h" -#include "nrf_dfu_types.h" -#include "nrf_log.h" - -uint32_t nrf_dfu_mbr_copy_bl(uint32_t * p_src, uint32_t len) -{ - uint32_t ret_val; - uint32_t const len_words = len / sizeof(uint32_t); - - sd_mbr_command_t command = - { - .command = SD_MBR_COMMAND_COPY_BL, - .params.copy_bl.bl_src = p_src, - .params.copy_bl.bl_len = len_words - }; - - ret_val = sd_mbr_command(&command); - - return ret_val; -} - - -uint32_t nrf_dfu_mbr_copy_sd(uint32_t * p_dst, uint32_t * p_src, uint32_t len) -{ - uint32_t ret_val; - uint32_t const len_words = len / sizeof(uint32_t); - - if ((len_words & (CODE_PAGE_SIZE / sizeof(uint32_t) - 1)) != 0) - return NRF_ERROR_INVALID_LENGTH; - - sd_mbr_command_t command = - { - .command = SD_MBR_COMMAND_COPY_SD, - .params.copy_sd.src = p_src, - .params.copy_sd.dst = p_dst, - .params.copy_sd.len = len_words - }; - - ret_val = sd_mbr_command(&command); - - return ret_val; -} - - -uint32_t nrf_dfu_mbr_init_sd(void) -{ - uint32_t ret_val; - - sd_mbr_command_t command = - { - .command = SD_MBR_COMMAND_INIT_SD - }; - - ret_val = sd_mbr_command(&command); - - return ret_val; -} - - -uint32_t nrf_dfu_mbr_compare(uint32_t * p_ptr1, uint32_t * p_ptr2, uint32_t len) -{ - uint32_t ret_val; - uint32_t const len_words = len / sizeof(uint32_t); - - sd_mbr_command_t command = - { - .command = SD_MBR_COMMAND_COMPARE, - .params.compare.ptr1 = p_ptr1, - .params.compare.ptr2 = p_ptr2, - .params.compare.len = len_words - }; - - ret_val = sd_mbr_command(&command); - - return ret_val; -} - - -uint32_t nrf_dfu_mbr_vector_table_set(uint32_t address) -{ - uint32_t ret_val; - - NRF_LOG_DEBUG("running vector table set"); - sd_mbr_command_t command = - { - .command = SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET, - .params.base_set.address = address, - }; - - ret_val = sd_mbr_command(&command); - NRF_LOG_DEBUG("After running vector table set"); - - return ret_val; -} - - -#ifndef SOFTDEVICE_PRESENT -uint32_t nrf_dfu_mbr_irq_forward_address_set(uint32_t address) -{ - uint32_t ret_val; - - NRF_LOG_DEBUG("running irq table set"); - sd_mbr_command_t command = - { - .command = SD_MBR_COMMAND_IRQ_FORWARD_ADDRESS_SET, - .params.irq_forward_address_set.address = address, - }; - - ret_val = sd_mbr_command(&command); - NRF_LOG_DEBUG("After running irq table set"); - - return ret_val; -} -#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/dfu/nrf_dfu_mbr.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/dfu/nrf_dfu_mbr.h deleted file mode 100644 index 5b63bad960b..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/dfu/nrf_dfu_mbr.h +++ /dev/null @@ -1,131 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/**@file - * - * @defgroup sdk_nrf_dfu_mbr MBR functions - * @{ - * @ingroup nrf_dfu - */ - -#ifndef NRF_DFU_MBR_H__ -#define NRF_DFU_MBR_H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** @brief Function for copying the bootloader using an MBR command. - * - * @param[in] p_src Source address of the bootloader data to copy. - * @param[in] len Length of the data to copy in bytes. - * - * @return This function will return only if the command request could not be run. - * See @ref sd_mbr_command_copy_bl_t for possible return values. - */ -uint32_t nrf_dfu_mbr_copy_bl(uint32_t * p_src, uint32_t len); - - -/** @brief Function for copying the SoftDevice using an MBR command. - * - * @param[in] p_dst Target of the SoftDevice copy. - * @param[in] p_src Source address of the SoftDevice image to copy. - * @param[in] len Length of the data to copy in bytes. - * - * @retval NRF_SUCCESS indicates that the contents of the memory blocks where copied correctly. - * @retval NRF_ERROR_INVALID_LENGTH Invalid len - * @retval NRF_ERROR_NO_MEM if UICR.NRFFW[1] is not set (i.e. is 0xFFFFFFFF). - * @retval NRF_ERROR_INVALID_PARAM if an invalid command is given. - * @retval NRF_ERROR_INTERNAL indicates that the contents of the memory blocks where not verified correctly after copying. - */ -uint32_t nrf_dfu_mbr_copy_sd(uint32_t * p_dst, uint32_t * p_src, uint32_t len); - - -/** @brief Function for initializing the SoftDevice using an MBR command. - * - * @retval NRF_SUCCESS If the SoftDevice was copied successfully. - * Any other return value indicates that the SoftDevice - * could not be copied. - */ -uint32_t nrf_dfu_mbr_init_sd(void); - - -/** @brief Function for comparing source and target using an MBR command. - * - * @param[in] p_ptr1 First pointer to data to compare. - * @param[in] p_ptr2 Second pointer to data to compare. - * @param[in] len Length of the data to compare in bytes. - * - * @retval NRF_SUCCESS If the content of both memory blocks is equal. - * @retval NRF_ERROR_NULL If the content of the memory blocks differs. - */ -uint32_t nrf_dfu_mbr_compare(uint32_t * p_ptr1, uint32_t * p_ptr2, uint32_t len); - - -/** @brief Function for setting the address of the vector table using an MBR command. - * - * @param[in] address Address of the new vector table. - * - * @retval NRF_SUCCESS If the address of the new vector table was set. Any other - * return value indicates that the address could not be set. - */ -uint32_t nrf_dfu_mbr_vector_table_set(uint32_t address); - - -#ifndef SOFTDEVICE_PRESENT -/** @brief Function for setting the address of the irq table using an MBR command. - * - * @param[in] address Address of the new irq table. - * - * @retval NRF_SUCCESS If the address of the new irq table was set. Any other - * return value indicates that the address could not be set. - */ -uint32_t nrf_dfu_mbr_irq_forward_address_set(uint32_t address); -#endif - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_DFU_MBR_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/dfu/nrf_dfu_types.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/dfu/nrf_dfu_types.h deleted file mode 100644 index 0939d87d25b..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/libraries/bootloader/dfu/nrf_dfu_types.h +++ /dev/null @@ -1,327 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/**@file - * - * @defgroup sdk_nrf_dfu_types DFU types - * @{ - * @ingroup nrf_dfu - */ - -#ifndef NRF_DFU_TYPES_H__ -#define NRF_DFU_TYPES_H__ - -#include -#include - -#include "nrf.h" -#include "nrf_mbr.h" -#include "app_util_platform.h" - -#ifdef SOFTDEVICE_PRESENT -#include "nrf_sdm.h" -#include "ble_gap.h" -#endif - -#if defined(NRF_DFU_SVCI_ENABLED) - #include "nrf_dfu_svci.h" -#else - // Dummy type for nrf_dfu_peer_data_t if DFU SVCI is not in use - typedef struct - { - uint32_t crc; - } nrf_dfu_peer_data_t; - - // Dummy type for nrf_dfu_adv_name_t if DFU SVCI is not in use - typedef struct - { - uint32_t crc; - } nrf_dfu_adv_name_t; - -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -#if defined(SOFTDEVICE_PRESENT) - -#include "nrf_sdm.h" - -/** @brief Start address of the SoftDevice (excluding the area for the MBR). - */ -#define SOFTDEVICE_REGION_START MBR_SIZE - - -#ifndef CODE_REGION_1_START -#define CODE_REGION_1_START SD_SIZE_GET(MBR_SIZE) -#endif - - -#else - -#ifndef CODE_REGION_1_START -#define CODE_REGION_1_START MBR_SIZE -#endif - -#endif - - -#define INIT_COMMAND_MAX_SIZE 256 /**< Maximum size of the init command stored in dfu_settings. */ - -/** @brief Size of a flash codepage. This value is used for calculating the size of the reserved - * flash space in the bootloader region. It is checked against NRF_UICR->CODEPAGESIZE - * at run time to ensure that the region is correct. - */ -#if defined(NRF51) - #define CODE_PAGE_SIZE (PAGE_SIZE_IN_WORDS * sizeof(uint32_t)) -#elif defined(NRF52) || defined(NRF52840_XXAA) - #define CODE_PAGE_SIZE (MBR_PAGE_SIZE_IN_WORDS * sizeof(uint32_t)) -#else - #error "Architecture not set." -#endif - - -/** @brief Maximum size of a data object.*/ -#if defined( NRF51 ) - #define DATA_OBJECT_MAX_SIZE (CODE_PAGE_SIZE * 4) -#elif defined( NRF52_SERIES ) || defined ( __SDK_DOXYGEN__ ) - #define DATA_OBJECT_MAX_SIZE (CODE_PAGE_SIZE) -#else - #error "Architecture not set." -#endif - -/** @brief Page location of the bootloader settings address. - */ - -#if defined ( NRF51 ) - #define BOOTLOADER_SETTINGS_ADDRESS (0x0003FC00UL) -#elif defined( NRF52832_XXAA ) - #define BOOTLOADER_SETTINGS_ADDRESS (0x0007F000UL) -#elif defined( NRF52840_XXAA ) - #define BOOTLOADER_SETTINGS_ADDRESS (0x000FF000UL) -#else - #error No valid target set for BOOTLOADER_SETTINGS_ADDRESS. -#endif - - -#if defined(NRF52832_XXAA) - -/** - * @brief MBR parameters page in UICR. - * - * Register location in UICR where the page address of the MBR parameters page is stored (only used by the nRF52 MBR). - * - * @note If the value at the given location is 0xFFFFFFFF, no MBR parameters page is set. - */ -#define NRF_UICR_MBR_PARAMS_PAGE_ADDRESS (NRF_UICR_BASE + 0x18) - - -/** @brief Page location of the MBR parameters page address. - * - */ - -#if !defined(NRF52840_XXAA_ENGA) -#define NRF_MBR_PARAMS_PAGE_ADDRESS (0x0007E000UL) -#else -#define NRF_MBR_PARAMS_PAGE_ADDRESS (0x000FE000UL) -#endif - -#endif - -#if defined(NRF52840_XXAA) - -/** - * @brief MBR parameters page in UICR. - * - * Register location in UICR where the page address of the MBR parameters page is stored (only used by the nRF52 MBR). - * - * @note If the value at the given location is 0xFFFFFFFF, no MBR parameters page is set. - */ -#define NRF_UICR_MBR_PARAMS_PAGE_ADDRESS (NRF_UICR_BASE + 0x18) - - -/** @brief Page location of the MBR parameters page address. - * - */ -#define NRF_MBR_PARAMS_PAGE_ADDRESS (0x000FE000UL) - -#endif - - -/** @brief Size of the flash space reserved for application data. - */ -#ifndef DFU_APP_DATA_RESERVED -#define DFU_APP_DATA_RESERVED CODE_PAGE_SIZE * 3 -#endif - - -/** @brief Total size of the region between the SoftDevice and the bootloader. - */ -#define DFU_REGION_TOTAL_SIZE ((* (uint32_t *)NRF_UICR_BOOTLOADER_START_ADDRESS) - CODE_REGION_1_START) - -#ifdef SOFTDEVICE_PRESENT -/** @brief Start address of the SoftDevice (excluding the area for the MBR). - */ -#define SOFTDEVICE_REGION_START MBR_SIZE - - -/** @brief Size of the Code Region 0, found in the UICR.CLEN0 register. - * - * @details This value is identical to the start of Code Region 1. This value is used for - * compilation safety, because the linker will fail if the application expands - * into the bootloader. At run time, the bootloader uses the value found in UICR.CLEN0. - */ - -#ifndef CODE_REGION_1_START -#define CODE_REGION_1_START SD_SIZE_GET(MBR_SIZE) -#endif -#else -#ifndef CODE_REGION_1_START -#define CODE_REGION_1_START MBR_SIZE -#endif -#endif - -#define NRF_DFU_CURRENT_BANK_0 0x00 -#define NRF_DFU_CURRENT_BANK_1 0x01 - -#define NRF_DFU_BANK_LAYOUT_DUAL 0x00 -#define NRF_DFU_BANK_LAYOUT_SINGLE 0x01 - - -/** @brief DFU bank state codes. - * - * @details The DFU bank state indicates the content of a bank: - * A valid image of a certain type or an invalid image. - */ - -#define NRF_DFU_BANK_INVALID 0x00 /**< Invalid image. */ -#define NRF_DFU_BANK_VALID_APP 0x01 /**< Valid application. */ -#define NRF_DFU_BANK_VALID_SD 0xA5 /**< Valid SoftDevice. */ -#define NRF_DFU_BANK_VALID_BL 0xAA /**< Valid bootloader. */ -#define NRF_DFU_BANK_VALID_SD_BL 0xAC /**< Valid SoftDevice and bootloader. */ - - -/** @brief Description of a single bank. */ -#pragma pack(4) -typedef struct -{ - uint32_t image_size; /**< Size of the image in the bank. */ - uint32_t image_crc; /**< CRC of the image. If set to 0, the CRC is ignored. */ - uint32_t bank_code; /**< Identifier code for the bank. */ -} nrf_dfu_bank_t; - -/**@brief DFU progress. - * - * Be aware of the difference between objects and firmware images. A firmware image consists of multiple objects, each of a maximum size @ref DATA_OBJECT_MAX_SIZE. - * - * @note The union inside this struct is cleared when CREATE_OBJECT of command type is executed, and when there is a valid post-validation. - * In DFU activation (after reset) the @ref sd_start_address will be used in case of a SD/SD+BL update. - */ -ANON_UNIONS_ENABLE -typedef struct -{ - uint32_t command_size; /**< The size of the current init command stored in the DFU settings. */ - uint32_t command_offset; /**< The offset of the currently received init command data. The offset will increase as the init command is received. */ - uint32_t command_crc; /**< The calculated CRC of the init command (calculated after the transfer is completed). */ - - uint32_t data_object_size; /**< The size of the last object created. Note that this size is not the size of the whole firmware image.*/ - - union - { - struct - { - uint32_t firmware_image_crc; /**< CRC value of the current firmware (continuously calculated as data is received). */ - uint32_t firmware_image_crc_last; /**< The CRC of the last executed object. */ - uint32_t firmware_image_offset; /**< The offset of the current firmware image being transferred. Note that this offset is the offset in the entire firmware image and not only the current object. */ - uint32_t firmware_image_offset_last;/**< The offset of the last executed object from the start of the firmware image. */ - }; - struct - { - uint32_t sd_start_address; /**< Value indicating the start address of the SoftDevice source. Used for an SD/SD+BL update where the SD changes size or if the DFU process had a power loss when updating a SD with changed size. */ - }; - }; -} dfu_progress_t; -ANON_UNIONS_DISABLE - - -/**@brief DFU settings for application and bank data. - */ -typedef struct -{ - uint32_t crc; /**< CRC for the stored DFU settings, not including the CRC itself. If 0xFFFFFFF, the CRC has never been calculated. */ - uint32_t settings_version; /**< Version of the currect DFU settings struct layout. */ - uint32_t app_version; /**< Version of the last stored application. */ - uint32_t bootloader_version; /**< Version of the last stored bootloader. */ - - uint32_t bank_layout; /**< Bank layout: single bank or dual bank. This value can change. */ - uint32_t bank_current; /**< The bank that is currently used. */ - - nrf_dfu_bank_t bank_0; /**< Bank 0. */ - nrf_dfu_bank_t bank_1; /**< Bank 1. */ - - uint32_t write_offset; /**< Write offset for the current operation. */ - uint32_t sd_size; /**< SoftDevice size (if combined BL and SD). */ - - dfu_progress_t progress; /**< Current DFU progress. */ - - uint32_t enter_buttonless_dfu; - uint8_t init_command[INIT_COMMAND_MAX_SIZE]; /**< Buffer for storing the init command. */ - - nrf_dfu_peer_data_t peer_data; /**< Not included in calculated CRC. */ - nrf_dfu_adv_name_t adv_name; /**< Not included in calculated CRC. */ -} nrf_dfu_settings_t; - - -#ifdef SOFTDEVICE_PRESENT - - -#endif // SYSTEM_SERVICE_ATT_SIZE - - -#pragma pack() // revert pack settings - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_DFU_TYPES_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/libraries/fstorage/nrf_fstorage_sd.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/libraries/fstorage/nrf_fstorage_sd.c deleted file mode 100644 index 6b75b364a60..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/libraries/fstorage/nrf_fstorage_sd.c +++ /dev/null @@ -1,616 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "sdk_common.h" - -#if NRF_MODULE_ENABLED(NRF_FSTORAGE) - -#include "nrf_fstorage_sd.h" -#include -#include -#include -#include "nordic_common.h" -#include "nrf_soc.h" -#include "nrf_sdh.h" -#include "nrf_sdh_soc.h" -#include "nrf_atomic.h" -#include "nrf_atfifo.h" -#include "app_util_platform.h" - - -#if (NRF_FSTORAGE_SD_MAX_WRITE_SIZE % 4) -#error NRF_FSTORAGE_SD_MAX_WRITE_SIZE must be a multiple of the word size. -#endif - - -/**@brief fstorage operation codes. */ -typedef enum -{ - NRF_FSTORAGE_OP_WRITE, //!< Write bytes to flash. - NRF_FSTORAGE_OP_ERASE //!< Erase flash pages. -} nrf_fstorage_sd_opcode_t; - -ANON_UNIONS_ENABLE -/**@brief fstorage operation queue element. */ -typedef struct -{ - nrf_fstorage_t const * p_fs; //!< The fstorage instance that requested the operation. - nrf_fstorage_sd_opcode_t op_code; //!< Requested operation. - void * p_param; //!< User-defined parameter passed to the event handler. - union - { - struct - { - void const * p_src; //!< Data to be written to flash. - uint32_t dest; //!< Destination of the data in flash. - uint32_t len; //!< Length of the data to be written (in bytes). - uint32_t offset; //!< Write offset. - } write; - struct - { - uint32_t page; //!< Physical page number. - uint32_t progress; //!< Number of pages erased. - uint32_t pages_to_erase; //!< Total number of pages to erase. - } erase; - }; -} nrf_fstorage_sd_op_t; -ANON_UNIONS_DISABLE - -typedef enum -{ - NRF_FSTORAGE_STATE_IDLE, //!< No operations requested to the SoftDevice. - NRF_FSTORAGE_STATE_OP_PENDING, //!< A non-fstorage operation is pending. - NRF_FSTORAGE_STATE_OP_EXECUTING, //!< An fstorage operation is executing. -} nrf_fstorage_sd_state_t; - -/**@brief Internal state. */ -typedef struct -{ - nrf_atomic_flag_t initialized; //!< fstorage is initalized. - nrf_atomic_flag_t queue_running; //!< The queue is running. - /** Prevent API calls from entering queue_process(). */ - nrf_fstorage_sd_state_t state; //!< Internal fstorage state. - uint32_t retries; //!< Number of times an operation has been retried on timeout. - bool sd_enabled; //!< The SoftDevice is enabled. - bool paused; //!< A SoftDevice state change is impending. - /** Do not load a new operation when the last one completes. */ -} nrf_fstorage_sd_work_t; - - -void nrf_fstorage_sys_evt_handler(uint32_t, void *); -bool nrf_fstorage_sdh_req_handler(nrf_sdh_req_evt_t, void *); -void nrf_fstorage_sdh_state_handler(nrf_sdh_state_evt_t, void *); - - -/* Flash device information. */ -static nrf_fstorage_info_t m_flash_info = -{ -#if defined(NRF51) - .erase_unit = 1024, -#elif defined(NRF52_SERIES) - .erase_unit = 4096, -#endif - .program_unit = 4, - .rmap = true, - .wmap = false, -}; - -/* Queue of fstorage operations. */ -NRF_ATFIFO_DEF(m_fifo, nrf_fstorage_sd_op_t, NRF_FSTORAGE_SD_QUEUE_SIZE); - -/* Define a nrf_sdh_soc event observer to receive SoftDevice system events. */ -NRF_SDH_SOC_OBSERVER(m_sys_obs, 0, nrf_fstorage_sys_evt_handler, NULL); - -/* nrf_sdh request observer. */ -NRF_SDH_REQUEST_OBSERVER(m_req_obs, 0) = -{ - .handler = nrf_fstorage_sdh_req_handler, -}; - -/* nrf_sdh state observer. */ -NRF_SDH_STATE_OBSERVER(m_state_obs, 0) = -{ - .handler = nrf_fstorage_sdh_state_handler, -}; - -static nrf_fstorage_sd_work_t m_flags; /* Internal status. */ -static nrf_fstorage_sd_op_t * m_p_cur_op; /* The current operation being executed. */ -static nrf_atfifo_item_get_t m_iget_ctx; /* Context for nrf_atfifo_item_get() and nrf_atfifo_item_free(). */ - - -/* Send events to the application. */ -static void event_send(nrf_fstorage_sd_op_t const * p_op, ret_code_t result) -{ - if (p_op->p_fs->evt_handler == NULL) - { - /* Nothing to do. */ - return; - } - - nrf_fstorage_evt_t evt = - { - .result = result, - .p_param = p_op->p_param, - }; - - switch (p_op->op_code) - { - case NRF_FSTORAGE_OP_WRITE: - evt.id = NRF_FSTORAGE_EVT_WRITE_RESULT; - evt.addr = p_op->write.dest; - evt.len = p_op->write.len; - break; - - case NRF_FSTORAGE_OP_ERASE: - evt.id = NRF_FSTORAGE_EVT_ERASE_RESULT; - evt.addr = (p_op->erase.page * m_flash_info.erase_unit); - evt.len = p_op->erase.pages_to_erase; - break; - - default: - /* Should not happen. */ - break; - } - - p_op->p_fs->evt_handler(&evt); -} - - -/* Write to flash. */ -static uint32_t write_execute(nrf_fstorage_sd_op_t const * p_op) -{ - uint32_t chunk_len; - - chunk_len = MIN(p_op->write.len - p_op->write.offset, NRF_FSTORAGE_SD_MAX_WRITE_SIZE); - chunk_len = MAX(1, chunk_len / m_flash_info.program_unit); - - /* Cast to p_src to uint32_t to perform arithmetic. */ - uint32_t * p_dest = (uint32_t*)(p_op->write.dest + p_op->write.offset); - uint32_t const * p_src = (uint32_t*)((uint32_t)p_op->write.p_src + p_op->write.offset); - - return sd_flash_write(p_dest, p_src, chunk_len); -} - - -/* Erase flash page(s). */ -static uint32_t erase_execute(nrf_fstorage_sd_op_t const * p_op) -{ - return sd_flash_page_erase(p_op->erase.page + p_op->erase.progress); -} - - -/* Free the current queue element. */ -static void queue_free(void) -{ - (void) nrf_atfifo_item_free(m_fifo, &m_iget_ctx); -} - - -/* Load a new operation from the queue. */ -static bool queue_load_next(void) -{ - m_p_cur_op = nrf_atfifo_item_get(m_fifo, &m_iget_ctx); - - return (m_p_cur_op != NULL); -} - - -/* Execute an operation in the queue. */ -static void queue_process(void) -{ - if (m_flags.state == NRF_FSTORAGE_STATE_IDLE) - { - if (!queue_load_next()) - { - /* No more operations, nothing to do. */ - m_flags.queue_running = false; - return; - } - } - - m_flags.state = NRF_FSTORAGE_STATE_OP_EXECUTING; - - uint32_t rc; - switch (m_p_cur_op->op_code) - { - case NRF_FSTORAGE_OP_WRITE: - rc = write_execute(m_p_cur_op); - break; - - case NRF_FSTORAGE_OP_ERASE: - rc = erase_execute(m_p_cur_op); - break; - - default: - rc = NRF_ERROR_INTERNAL; - break; - } - - switch (rc) - { - case NRF_SUCCESS: - { - /* The operation was accepted by the SoftDevice. - * If the SoftDevice is enabled, wait for a system event. Otherwise, - * the SoftDevice call is synchronous and will not send an event so we simulate it. */ - if (!m_flags.sd_enabled) - { - nrf_fstorage_sys_evt_handler(NRF_EVT_FLASH_OPERATION_SUCCESS, NULL); - } - } break; - - case NRF_ERROR_BUSY: - { - /* The SoftDevice is executing a flash operation that was not requested by fstorage. - * Stop processing the queue until a system event is received. */ - m_flags.state = NRF_FSTORAGE_STATE_OP_PENDING; - } break; - - default: - { - /* An error has occurred. We cannot proceed further with this operation. - * Reset the internal state so we can accept other operations. */ - event_send(m_p_cur_op, NRF_ERROR_INTERNAL); - m_flags.state = NRF_FSTORAGE_STATE_IDLE; - m_flags.queue_running = false; - } break; - } -} - - -/* Start processing the queue if it is not running and fstorage is not paused. */ -static void queue_start(void) -{ - nrf_atomic_flag_t queue_running = nrf_atomic_u32_fetch_store(&m_flags.queue_running, true); - - if ( (!queue_running) - && (!m_flags.paused)) - { - queue_process(); - } -} - - -/* Flash operation success callback. Keeps track of the progress of an operation. */ -static bool on_operation_success(nrf_fstorage_sd_op_t * const p_op) -{ - /* Reset the retry counter on success. */ - m_flags.retries = 0; - - switch (p_op->op_code) - { - case NRF_FSTORAGE_OP_WRITE: - { - /* Update the offset only if the operation is successful - * so that it can be retried in case it times out. */ - uint32_t const chunk_len = MIN(p_op->write.len - p_op->write.offset, - NRF_FSTORAGE_SD_MAX_WRITE_SIZE); - - p_op->write.offset += chunk_len; - - if (p_op->write.offset == p_op->write.len) - { - return true; - } - } break; - - case NRF_FSTORAGE_OP_ERASE: - { - p_op->erase.progress++; - - if (p_op->erase.progress == p_op->erase.pages_to_erase) - { - return true; - } - } break; - - default: - /* Should not happen. */ - break; - } - - return false; -} - - -/* Flash operation failure callback. */ -static bool on_operation_failure(nrf_fstorage_sd_op_t const * p_op) -{ - UNUSED_PARAMETER(p_op); - - m_flags.retries++; - - if (m_flags.retries > NRF_FSTORAGE_SD_MAX_RETRIES) - { - /* Maximum amount of retries reached. Give up. */ - m_flags.retries = 0; - return true; - } - - return false; -} - - -static ret_code_t init(nrf_fstorage_t * p_fs, void * p_param) -{ - UNUSED_PARAMETER(p_param); - - if (!nrf_atomic_flag_set_fetch(&m_flags.initialized)) - { - p_fs->p_flash_info = &m_flash_info; - -#if NRF_SDH_ENABLED - m_flags.sd_enabled = nrf_sdh_is_enabled(); -#endif - - (void) NRF_ATFIFO_INIT(m_fifo); - } - - return NRF_SUCCESS; -} - - -static ret_code_t uninit(nrf_fstorage_t * p_fs, void * p_param) -{ - UNUSED_PARAMETER(p_fs); - UNUSED_PARAMETER(p_param); - - /* The state is re-initialized upon init(). - * The common uninitialization code is run by the caller. */ - - memset(&m_flags, 0x00, sizeof(m_flags)); - - (void) nrf_atfifo_clear(m_fifo); - - return NRF_SUCCESS; -} - - -static ret_code_t write(nrf_fstorage_t const * p_fs, - uint32_t dest, - void const * p_src, - uint32_t len, - void * p_param) -{ - nrf_fstorage_sd_op_t * p_op; - nrf_atfifo_item_put_t iput_ctx; - - /* Get a free queue element. */ - p_op = nrf_atfifo_item_alloc(m_fifo, &iput_ctx); - - if (p_op == NULL) - { - return NRF_ERROR_NO_MEM; - } - - /* Initialize the operation. */ - memset(p_op, 0x00, sizeof(nrf_fstorage_sd_op_t)); - - p_op->op_code = NRF_FSTORAGE_OP_WRITE; - p_op->p_fs = p_fs; - p_op->p_param = p_param; - p_op->write.dest = dest; - p_op->write.p_src = p_src; - p_op->write.len = len; - - /* Put the operation on the queue. */ - (void) nrf_atfifo_item_put(m_fifo, &iput_ctx); - - queue_start(); - - return NRF_SUCCESS; -} - - -static ret_code_t read(nrf_fstorage_t const * p_fs, uint32_t src, void * p_dest, uint32_t len) -{ - memcpy(p_dest, (uint32_t*)src, len); - - return NRF_SUCCESS; -} - - -static ret_code_t erase(nrf_fstorage_t const * p_fs, - uint32_t page_addr, - uint32_t len, - void * p_param) -{ - nrf_fstorage_sd_op_t * p_op; - nrf_atfifo_item_put_t iput_ctx; - - /* Get a free queue element. */ - p_op = nrf_atfifo_item_alloc(m_fifo, &iput_ctx); - - if (p_op == NULL) - { - return NRF_ERROR_NO_MEM; - } - - /* Initialize the operation. */ - memset(p_op, 0x00, sizeof(nrf_fstorage_sd_op_t)); - - p_op->op_code = NRF_FSTORAGE_OP_ERASE; - p_op->p_fs = p_fs; - p_op->p_param = p_param; - p_op->erase.page = (page_addr / m_flash_info.erase_unit); - p_op->erase.pages_to_erase = len; - - /* Put the operation on the queue. */ - (void) nrf_atfifo_item_put(m_fifo, &iput_ctx); - - queue_start(); - - return NRF_SUCCESS; -} - - -static uint8_t const * rmap(nrf_fstorage_t const * p_fs, uint32_t addr) -{ - UNUSED_PARAMETER(p_fs); - - return (uint8_t*)addr; -} - - -static uint8_t * wmap(nrf_fstorage_t const * p_fs, uint32_t addr) -{ - UNUSED_PARAMETER(p_fs); - UNUSED_PARAMETER(addr); - - /* Not supported. */ - return NULL; -} - - -static bool is_busy(nrf_fstorage_t const * p_fs) -{ - UNUSED_PARAMETER(p_fs); - - return (m_flags.state != NRF_FSTORAGE_STATE_IDLE); -} - - -void nrf_fstorage_sys_evt_handler(uint32_t sys_evt, void * p_context) -{ - UNUSED_PARAMETER(p_context); - - switch (m_flags.state) - { - case NRF_FSTORAGE_STATE_OP_EXECUTING: - { - /* Handle the result of a flash operation initiated by this module. */ - bool operation_finished = false; - - switch (sys_evt) - { - case NRF_EVT_FLASH_OPERATION_SUCCESS: - operation_finished = on_operation_success(m_p_cur_op); - break; - - case NRF_EVT_FLASH_OPERATION_ERROR: - operation_finished = on_operation_failure(m_p_cur_op); - break; - - default: - break; - } - - if (operation_finished) - { - /* The operation has finished. Change state to NRF_FSTORAGE_STATE_IDLE - * so that queue_process() will fetch a new operation from the queue. */ - m_flags.state = NRF_FSTORAGE_STATE_IDLE; - - event_send(m_p_cur_op, (sys_evt == NRF_EVT_FLASH_OPERATION_SUCCESS) ? - NRF_SUCCESS : NRF_ERROR_TIMEOUT); - - /* Free the queue element after sending out the event to prevent API calls made - * in the event context to queue elements indefinitely, without this function - * ever returning in case the SoftDevice calls are synchronous. */ - queue_free(); - } - } break; - - case NRF_FSTORAGE_STATE_OP_PENDING: - /* The SoftDevice has completed a flash operation that was not requested by fstorage. - * It should be possible to request an operation now. - * Process the queue at the end of this function. */ - break; - - default: - /* If idle, return. */ - return; - } - - if (!m_flags.paused) - { - queue_process(); - } - else - { - /* A flash operation has completed. Let the SoftDevice to change state. */ - (void) nrf_sdh_request_continue(); - } -} - - -bool nrf_fstorage_sdh_req_handler(nrf_sdh_req_evt_t req, void * p_context) -{ - UNUSED_PARAMETER(req); - UNUSED_PARAMETER(p_context); - - m_flags.paused = true; - - /* If there are any operations ongoing, pause the SoftDevice state change. */ - return (m_flags.state == NRF_FSTORAGE_STATE_IDLE); -} - - -void nrf_fstorage_sdh_state_handler(nrf_sdh_state_evt_t state, void * p_context) -{ - UNUSED_PARAMETER(p_context); - - if ( (state == NRF_SDH_EVT_STATE_ENABLED) - || (state == NRF_SDH_EVT_STATE_DISABLED)) - { - m_flags.paused = false; - m_flags.sd_enabled = (state == NRF_SDH_EVT_STATE_ENABLED); - - /* Execute any operations still in the queue. */ - queue_process(); - } -} - - -/* Exported API implementation. */ -nrf_fstorage_api_t nrf_fstorage_sd = -{ - .init = init, - .uninit = uninit, - .read = read, - .write = write, - .erase = erase, - .rmap = rmap, - .wmap = wmap, - .is_busy = is_busy -}; - - -#endif // NRF_FSTORAGE_ENABLED diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/libraries/fstorage/nrf_fstorage_sd.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/libraries/fstorage/nrf_fstorage_sd.h deleted file mode 100644 index 27f27899099..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/libraries/fstorage/nrf_fstorage_sd.h +++ /dev/null @@ -1,75 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - * @file - * - * @defgroup nrf_fstorage_sd SoftDevice implementation - * @ingroup nrf_fstorage - * @{ - * - * @brief API implementation of fstorage that uses the SoftDevice. -*/ - -#ifndef NRF_FSTORAGE_SD_H__ -#define NRF_FSTORAGE_SD_H__ - -#include "nrf_fstorage.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -/**@brief API implementation that uses the SoftDevice. - * - * @details An fstorage instance with this API implementation can be initialized by providing - * this structure as a parameter to @ref nrf_fstorage_init. - * The structure is defined in @c nrf_fstorage_sd.c. - */ -extern nrf_fstorage_api_t nrf_fstorage_sd; - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_FSTORAGE_SD_H__ -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh.c deleted file mode 100644 index ae7ebb3e39b..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh.c +++ /dev/null @@ -1,422 +0,0 @@ -/** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(NRF_SDH) - -#include "nrf_sdh.h" - -#include - -#include "nrf_sdm.h" -#include "nrf_nvic.h" -#include "sdk_config.h" -#include "app_error.h" -#include "app_util_platform.h" - - -#define NRF_LOG_MODULE_NAME nrf_sdh -#if NRF_SDH_LOG_ENABLED - #define NRF_LOG_LEVEL NRF_SDH_LOG_LEVEL - #define NRF_LOG_INFO_COLOR NRF_SDH_INFO_COLOR - #define NRF_LOG_DEBUG_COLOR NRF_SDH_DEBUG_COLOR -#else - #define NRF_LOG_LEVEL 0 -#endif // NRF_SDH_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - -#if (NRF_SDH_DISPATCH_MODEL == NRF_SDH_DISPATCH_MODEL_APPSH) - #if !APP_SCHEDULER_ENABLED - #error "APP_SCHEDULER is required." - #endif - #include "app_scheduler.h" -#endif // (NRF_SDH_DISPATCH_MODEL == NRF_SDH_DISPATCH_MODEL_APPSH) - - -// Create section "sdh_req_observers". -NRF_SECTION_SET_DEF(sdh_req_observers, nrf_sdh_req_observer_t, NRF_SDH_REQ_OBSERVER_PRIO_LEVELS); - -// Create section "sdh_state_observers". -NRF_SECTION_SET_DEF(sdh_state_observers, nrf_sdh_state_observer_t, NRF_SDH_STATE_OBSERVER_PRIO_LEVELS); - -// Create section "sdh_stack_observers". -NRF_SECTION_SET_DEF(sdh_stack_observers, nrf_sdh_stack_observer_t, NRF_SDH_STACK_OBSERVER_PRIO_LEVELS); - - -static bool m_nrf_sdh_enabled; /**< Variable to indicate whether the SoftDevice is enabled. */ -static bool m_nrf_sdh_suspended; /**< Variable to indicate whether this module is suspended. */ -static bool m_nrf_sdh_continue; /**< Variable to indicate whether enable/disable process was started. */ - - -/**@brief Function for notifying request observers. - * - * @param[in] evt Type of request event. - */ -static ret_code_t sdh_request_observer_notify(nrf_sdh_req_evt_t req) -{ - nrf_section_iter_t iter; - - NRF_LOG_DEBUG("State request: 0x%08X", req); - - for (nrf_section_iter_init(&iter, &sdh_req_observers); - nrf_section_iter_get(&iter) != NULL; - nrf_section_iter_next(&iter)) - { - nrf_sdh_req_observer_t * p_observer; - nrf_sdh_req_evt_handler_t handler; - - p_observer = (nrf_sdh_req_observer_t *) nrf_section_iter_get(&iter); - handler = p_observer->handler; - - if (handler(req, p_observer->p_context)) - { - NRF_LOG_DEBUG("Notify observer 0x%08X => ready", p_observer); - } - else - { - // Process is stopped. - NRF_LOG_DEBUG("Notify observer 0x%08X => blocking", p_observer); - return NRF_ERROR_BUSY; - } - } - return NRF_SUCCESS; -} - - -/**@brief Function for stage request observers. - * - * @param[in] evt Type of stage event. - */ -static void sdh_state_observer_notify(nrf_sdh_state_evt_t evt) -{ - nrf_section_iter_t iter; - - NRF_LOG_DEBUG("State change: 0x%08X", evt); - - for (nrf_section_iter_init(&iter, &sdh_state_observers); - nrf_section_iter_get(&iter) != NULL; - nrf_section_iter_next(&iter)) - { - nrf_sdh_state_observer_t * p_observer; - nrf_sdh_state_evt_handler_t handler; - - p_observer = (nrf_sdh_state_observer_t *) nrf_section_iter_get(&iter); - handler = p_observer->handler; - - handler(evt, p_observer->p_context); - } -} - - -static void softdevices_evt_irq_enable(void) -{ -#ifdef SOFTDEVICE_PRESENT - ret_code_t ret_code = sd_nvic_EnableIRQ((IRQn_Type)SD_EVT_IRQn); - APP_ERROR_CHECK(ret_code); -#else - // In case of serialization, NVIC must be accessed directly. - NVIC_EnableIRQ(SD_EVT_IRQn); -#endif -} - - -static void softdevice_evt_irq_disable(void) -{ -#ifdef SOFTDEVICE_PRESENT - ret_code_t ret_code = sd_nvic_DisableIRQ((IRQn_Type)SD_EVT_IRQn); - APP_ERROR_CHECK(ret_code); -#else - // In case of serialization, NVIC must be accessed directly. - NVIC_DisableIRQ(SD_EVT_IRQn); -#endif -} - - -#ifndef S140 -static void swi_interrupt_priority_workaround(void) -{ - // The priorities of SoftDevice SWI SD_EVT_IRQn and RADIO_NOTIFICATION_IRQn - // in version S132 v5.0.0, S112 v5.0.0, S212 v5.0.0 and S332 v5.0.0 are set to 6. - // Set their priority to APP_IRQ_PRIORITY_LOWEST (7) so that they don't preempt - // peripheral interrupts and vice-versa. - -#ifdef SOFTDEVICE_PRESENT - ret_code_t ret_code; - ret_code = sd_nvic_SetPriority(SD_EVT_IRQn, APP_IRQ_PRIORITY_LOWEST); - APP_ERROR_CHECK(ret_code); - ret_code = sd_nvic_SetPriority(RADIO_NOTIFICATION_IRQn, APP_IRQ_PRIORITY_LOWEST); - APP_ERROR_CHECK(ret_code); -#else - // In case of serialization, NVIC must be accessed directly. - NVIC_SetPriority(SD_EVT_IRQn, APP_IRQ_PRIORITY_LOWEST); - NVIC_SetPriority(RADIO_NOTIFICATION_IRQn, APP_IRQ_PRIORITY_LOWEST); -#endif -} -#endif - - -ret_code_t nrf_sdh_enable_request(void) -{ - ret_code_t ret_code; - - if (m_nrf_sdh_enabled) - { - return NRF_ERROR_INVALID_STATE; - } - - m_nrf_sdh_continue = true; - - // Notify observers about SoftDevice enable request. - if (sdh_request_observer_notify(NRF_SDH_EVT_ENABLE_REQUEST) == NRF_ERROR_BUSY) - { - // Enable process was stopped. - return NRF_SUCCESS; - } - - // Notify observers about starting SoftDevice enable process. - sdh_state_observer_notify(NRF_SDH_EVT_STATE_ENABLE_PREPARE); - - nrf_clock_lf_cfg_t const clock_lf_cfg = - { - .source = NRF_SDH_CLOCK_LF_SRC, - .rc_ctiv = NRF_SDH_CLOCK_LF_RC_CTIV, - .rc_temp_ctiv = NRF_SDH_CLOCK_LF_RC_TEMP_CTIV, - #ifdef S140 - .xtal_accuracy = NRF_SDH_CLOCK_LF_XTAL_ACCURACY - #else - .accuracy = NRF_SDH_CLOCK_LF_XTAL_ACCURACY - #endif - }; - - #ifdef ANT_LICENSE_KEY - ret_code = sd_softdevice_enable(&clock_lf_cfg, app_error_fault_handler, ANT_LICENSE_KEY); - #else - ret_code = sd_softdevice_enable(&clock_lf_cfg, app_error_fault_handler); - #endif - - if (ret_code != NRF_SUCCESS) - { - return ret_code; - } - - m_nrf_sdh_enabled = true; - m_nrf_sdh_continue = false; - m_nrf_sdh_suspended = false; - -#ifndef S140 - // Set the interrupt priority after enabling the SoftDevice, since - // sd_softdevice_enable() sets the SoftDevice interrupt priority. - swi_interrupt_priority_workaround(); -#endif - - // Enable event interrupt. - // Interrupt priority has already been set by the stack. - softdevices_evt_irq_enable(); - - // Notify observers about a finished SoftDevice enable process. - sdh_state_observer_notify(NRF_SDH_EVT_STATE_ENABLED); - - return NRF_SUCCESS; -} - - -ret_code_t nrf_sdh_disable_request(void) -{ - ret_code_t ret_code; - - if (!m_nrf_sdh_enabled) - { - return NRF_ERROR_INVALID_STATE; - } - - m_nrf_sdh_continue = true; - - // Notify observers about SoftDevice disable request. - if (sdh_request_observer_notify(NRF_SDH_EVT_DISABLE_REQUEST) == NRF_ERROR_BUSY) - { - // Disable process was stopped. - return NRF_SUCCESS; - } - - // Notify observers about starting SoftDevice disable process. - sdh_state_observer_notify(NRF_SDH_EVT_STATE_DISABLE_PREPARE); - - ret_code = sd_softdevice_disable(); - if (ret_code != NRF_SUCCESS) - { - return ret_code; - } - - m_nrf_sdh_enabled = false; - m_nrf_sdh_continue = false; - - softdevice_evt_irq_disable(); - - // Notify observers about a finished SoftDevice enable process. - sdh_state_observer_notify(NRF_SDH_EVT_STATE_DISABLED); - - return NRF_SUCCESS; -} - - -ret_code_t nrf_sdh_request_continue(void) -{ - if (!m_nrf_sdh_continue) - { - return NRF_ERROR_INVALID_STATE; - } - - if (m_nrf_sdh_enabled) - { - return nrf_sdh_disable_request(); - } - else - { - return nrf_sdh_enable_request(); - } -} - - -bool nrf_sdh_is_enabled(void) -{ - return m_nrf_sdh_enabled; -} - - -void nrf_sdh_suspend(void) -{ - if (!m_nrf_sdh_enabled) - { - return; - } - - softdevice_evt_irq_disable(); - m_nrf_sdh_suspended = true; -} - - -void nrf_sdh_resume(void) -{ - if ((!m_nrf_sdh_suspended) || (!m_nrf_sdh_enabled)) - { - return; - } - - // Force calling ISR again to make sure that events not previously pulled have been processed. -#ifdef SOFTDEVICE_PRESENT - ret_code_t ret_code = sd_nvic_SetPendingIRQ((IRQn_Type)SD_EVT_IRQn); - APP_ERROR_CHECK(ret_code); -#else - NVIC_SetPendingIRQ((IRQn_Type)SD_EVT_IRQn); -#endif - - softdevices_evt_irq_enable(); - - m_nrf_sdh_suspended = false; -} - - -bool nrf_sdh_is_suspended(void) -{ - return (!m_nrf_sdh_enabled) || (m_nrf_sdh_suspended); -} - - -void nrf_sdh_evts_poll(void) -{ - nrf_section_iter_t iter; - - // Notify observers about pending SoftDevice event. - for (nrf_section_iter_init(&iter, &sdh_stack_observers); - nrf_section_iter_get(&iter) != NULL; - nrf_section_iter_next(&iter)) - { - nrf_sdh_stack_observer_t * p_observer; - nrf_sdh_stack_evt_handler_t handler; - - p_observer = (nrf_sdh_stack_observer_t *) nrf_section_iter_get(&iter); - handler = p_observer->handler; - - handler(p_observer->p_context); - } -} - - -#if (NRF_SDH_DISPATCH_MODEL == NRF_SDH_DISPATCH_MODEL_INTERRUPT) - -void SD_EVT_IRQHandler(void) -{ - nrf_sdh_evts_poll(); -} - -#elif (NRF_SDH_DISPATCH_MODEL == NRF_SDH_DISPATCH_MODEL_APPSH) - -/**@brief Function for polling SoftDevice events. - * - * @note This function is compatible with @ref app_sched_event_handler_t. - * - * @param[in] p_event_data Pointer to the event data. - * @param[in] event_size Size of the event data. - */ -static void appsh_events_poll(void * p_event_data, uint16_t event_size) -{ - UNUSED_PARAMETER(p_event_data); - UNUSED_PARAMETER(event_size); - - nrf_sdh_evts_poll(); -} - - -void SD_EVT_IRQHandler(void) -{ - ret_code_t ret_code = app_sched_event_put(NULL, 0, appsh_events_poll); - APP_ERROR_CHECK(ret_code); -} - -#elif (NRF_SDH_DISPATCH_MODEL == NRF_SDH_DISPATCH_MODEL_POLLING) - -#else - -#error "Unknown SoftDevice handler dispatch model." - -#endif // NRF_SDH_DISPATCH_MODEL - -#endif // NRF_MODULE_ENABLED(NRF_SDH) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh.h deleted file mode 100644 index 2fbd0dd6387..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh.h +++ /dev/null @@ -1,304 +0,0 @@ -/** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** @file - * - * @defgroup nrf_sdh SoftDevice Handler - * @{ - * @ingroup app_common - * @brief API for initializing and disabling the SoftDevice. - */ - -#ifndef NRF_SDH_H__ -#define NRF_SDH_H__ - -#include "sdk_config.h" -#include "sdk_errors.h" -#include "nrf_section_iter.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @name Softdevice Handler dispatch models - * @{ - * @ingroup nrf_sdh */ - -/**@brief SoftDevice events are passed to the application from the interrupt context. */ -#define NRF_SDH_DISPATCH_MODEL_INTERRUPT 0 - -/**@brief SoftDevice events are passed to the application using @ref app_scheduler. - * - * @note @ref app_scheduler must be initialized before enabling the SoftDevice handler. - */ -#define NRF_SDH_DISPATCH_MODEL_APPSH 1 - -/**@brief SoftDevice events are polled manually using @ref nrf_sdh_evts_poll(). - * - * @note In this mode, a user application can also implement SD_EVT_IRQHandler() to receive a - * notification about incoming events. - */ -#define NRF_SDH_DISPATCH_MODEL_POLLING 2 - -/** @} */ - -/** - * @name SoftDevice Handler state change requests - * @{ - * @ingroup nrf_sdh */ - -/**@brief SoftDevice Handler state requests. */ -typedef enum -{ - NRF_SDH_EVT_ENABLE_REQUEST, //!< Request to enable the SoftDevice. - NRF_SDH_EVT_DISABLE_REQUEST, //!< Request to disable the SoftDevice. -} nrf_sdh_req_evt_t; - -/**@brief SoftDevice Handler state request handler. - * - * @retval true If ready for the SoftDevice to change state. - * @retval false If not ready for the SoftDevice to change state. - * If false is returned, the state change is aborted. - */ -typedef bool (*nrf_sdh_req_evt_handler_t)(nrf_sdh_req_evt_t request, void * p_context); - -/**@brief SoftDevice Handler state request observer. */ -typedef struct -{ - nrf_sdh_req_evt_handler_t handler; //!< Request handler. - void * p_context; //!< A parameter to the handler function. -} const nrf_sdh_req_observer_t; - -/**@brief Macro for registering a SoftDevice state change request observer. - * - * An observer of SoftDevice state change requests receives requests to change the state of the - * SoftDevice from enabled to disabled and vice versa. These requests may or may not be acknowledged - * by the observer, depending on the value returned by its request handler function. Thus, a - * request observer has the capability to defer the change of state of the SoftDevice. If it does - * so, it has the responsibility to call @ref nrf_sdh_request_continue when it is ready to let the - * SoftDevice change its state. If such capability is not necessary and you only need to be informed - * about changes of the SoftDevice state, use the @ref NRF_SDH_STATE_OBSERVER macro instead. - * - * @note This macro places the observer in a section named "sdh_req_observers". - * - * @param[in] _observer Name of the observer. - * @param[in] _prio Priority of the observer's event handler. - * The smaller the number, the higher the priority. - * @hideinitializer - */ -#define NRF_SDH_REQUEST_OBSERVER(_observer, _prio) \ -STATIC_ASSERT(NRF_SDH_ENABLED, "NRF_SDH_ENABLED not set!"); \ -STATIC_ASSERT(_prio < NRF_SDH_REQ_OBSERVER_PRIO_LEVELS, "Priority level unavailable."); \ -/*lint -esym(528,*_observer) -esym(529,*_observer) : Symbol not referenced. */ \ -NRF_SECTION_SET_ITEM_REGISTER(sdh_req_observers, _prio, nrf_sdh_req_observer_t const _observer) - -/** @} */ - -/** - * @name SoftDevice Handler state events - * @{ - * @ingroup nrf_sdh */ - -/**@brief SoftDevice Handler state events. */ -typedef enum -{ - NRF_SDH_EVT_STATE_ENABLE_PREPARE, //!< SoftDevice is going to be enabled. - NRF_SDH_EVT_STATE_ENABLED, //!< SoftDevice is enabled. - NRF_SDH_EVT_STATE_DISABLE_PREPARE, //!< SoftDevice is going to be disabled. - NRF_SDH_EVT_STATE_DISABLED, //!< SoftDevice is disabled. -} nrf_sdh_state_evt_t; - -/**@brief SoftDevice Handler state event handler. */ -typedef void (*nrf_sdh_state_evt_handler_t)(nrf_sdh_state_evt_t state, void * p_context); - -/**@brief SoftDevice Handler state observer. */ -typedef struct -{ - nrf_sdh_state_evt_handler_t handler; //!< State event handler. - void * p_context; //!< A parameter to the event handler. -} const nrf_sdh_state_observer_t; - -/**@brief Macro for registering a SoftDevice state observer. - * - * A SoftDevice state observer receives events when the SoftDevice state has changed or is - * about to change. These events are only meant to inform the state observer, which, contrary - * to a state change request observer, does not have the capability to defer the change of state. - * If such capability is required, use the @ref NRF_SDH_REQUEST_OBSERVER macro instead. - * - * This macro places the observer in a section named "sdh_state_observers". - * - * @param[in] _observer Name of the observer. - * @param[in] _prio Priority of the observer's event handler. - * The smaller the number, the higher the priority. - * @hideinitializer - */ -#define NRF_SDH_STATE_OBSERVER(_observer, _prio) \ -STATIC_ASSERT(NRF_SDH_ENABLED, "NRF_SDH_ENABLED not set!"); \ -STATIC_ASSERT(_prio < NRF_SDH_STATE_OBSERVER_PRIO_LEVELS, "Priority level unavailable."); \ -/*lint -esym(528,*_observer) -esym(529,*_observer) : Symbol not referenced. */ \ -NRF_SECTION_SET_ITEM_REGISTER(sdh_state_observers, _prio, static nrf_sdh_state_observer_t const _observer) - -/** @} */ - -/** - * @name SoftDevice stack events - * @{ - * @ingroup nrf_sdh */ - -/**@brief SoftDevice stack event handler. */ -typedef void (*nrf_sdh_stack_evt_handler_t)(void * p_evt); - -/**@brief SoftDevice stack event observer. */ -typedef struct -{ - nrf_sdh_stack_evt_handler_t handler; //!< SoftDevice event handler. - void * p_context; //!< A parameter to the event handler. -} const nrf_sdh_stack_observer_t; - -/**@brief Macro for registering a SoftDevice stack events observer. - * - * A SoftDevice stack event observer receives all events from the SoftDevice. These events can be - * either BLE, ANT, or SoC events. If you need to receive BLE, ANT, or SoC events separately, use the - * @ref NRF_SDH_BLE_OBSERVER, @ref NRF_SDH_ANT_OBSERVER, or @ref NRF_SDH_SOC_OBSERVER macros - * respectively. - * - * @note This macro places the observer in a section named "sdh_stack_observers". - * - * @param[in] _observer Name of the observer. - * @param[in] _prio Priority of the observer's event handler. - * The smaller the number, the higher the priority. - ** @hideinitializer - */ -#define NRF_SDH_STACK_OBSERVER(_observer, _prio) \ -STATIC_ASSERT(NRF_SDH_ENABLED, "NRF_SDH_ENABLED not set!"); \ -STATIC_ASSERT(_prio < NRF_SDH_STACK_OBSERVER_PRIO_LEVELS, "Priority level unavailable."); \ -/*lint -esym(528,*_observer) -esym(529,*_observer) : Symbol not referenced. */ \ -NRF_SECTION_SET_ITEM_REGISTER(sdh_stack_observers, _prio, static nrf_sdh_stack_observer_t const _observer) - -/** @} */ - -/**@brief Function for requesting to enable the SoftDevice. - * - * This function issues a @ref NRF_SDH_EVT_ENABLE_REQUEST request to all observers that - * were registered using the @ref NRF_SDH_REQUEST_OBSERVER macro. The observers may or - * may not acknowledge the request. If all observers acknowledge the request, the - * SoftDevice will be enabled. Otherwise, the process will be stopped and the observers - * that did not acknowledge have the responsibility to restart it by calling - * @ref nrf_sdh_request_continue when they are ready for the SoftDevice to change state. - * - * @retval NRF_SUCCESS The process is started. - * @retval NRF_ERROR_INVALID_STATE The SoftDevice is already enabled. - */ -ret_code_t nrf_sdh_enable_request(void); - - -/**@brief Function for requesting to disable the SoftDevice. - * - * This function issues a @ref NRF_SDH_EVT_DISABLE_REQUEST request to all observers that - * were registered using the @ref NRF_SDH_REQUEST_OBSERVER macro. The observers may or - * may not acknowledge the request. If all observers acknowledge the request, the - * SoftDevice will be disabled. Otherwise, the process will be stopped and the observers - * that did not acknowledge have the responsibility to restart it by calling - * @ref nrf_sdh_request_continue when they are ready for the SoftDevice to change state. - * - * @retval NRF_SUCCESS The process is started. - * @retval NRF_ERROR_INVALID_STATE The SoftDevice is already disabled. - */ -ret_code_t nrf_sdh_disable_request(void); - - -/**@brief Function for restarting the SoftDevice Enable/Disable process. - * - * Modules which did not acknowledge a @ref NRF_SDH_EVT_ENABLE_REQUEST or - * @ref NRF_SDH_EVT_DISABLE_REQUEST request must call this function to restart the - * SoftDevice state change process. - * - * @retval NRF_SUCCESS The process is restarted. - * @retval NRF_ERROR_INVALID_STATE No state change request was pending. - */ -ret_code_t nrf_sdh_request_continue(void); - - -/**@brief Function for retrieving the SoftDevice state. - * - * @retval true If the SoftDevice is enabled. - * @retval false If the SoftDevice is disabled. - */ -bool nrf_sdh_is_enabled(void); - - -/**@brief Function for stopping the incoming stack events. - * - * This function disables the SoftDevice interrupt. To resume polling for events, - * call @ref nrf_sdh_resume. - */ -void nrf_sdh_suspend(void); - - -/**@brief Function for resuming polling incoming events from the SoftDevice. */ -void nrf_sdh_resume(void); - - -/**@brief Function for retrieving the information about the module state. - * - * @retval true The SoftDevice handler is paused, and it will not fetch events from the stack. - * @retval false The SoftDevice handler is running, and it will fetch and dispatch events from - * the stack to the registered stack observers. - */ -bool nrf_sdh_is_suspended(void); - - -/**@brief Function for polling stack events from the SoftDevice. - * - * The events are passed to the application using the registered event handlers. - * - * @note @ref NRF_SDH_DISPATCH_MODEL_POLLING must be selected to use this function. - */ -void nrf_sdh_evts_poll(void); - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_SDH_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ant.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ant.c deleted file mode 100644 index 1aa6a19609f..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ant.c +++ /dev/null @@ -1,140 +0,0 @@ -/** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(NRF_SDH_ANT) - -#include "nrf_sdh_ant.h" - -#include "nrf_sdh.h" -#include "app_error.h" -#include "ant_interface.h" - - -#define NRF_LOG_MODULE_NAME nrf_sdh_ant -#if NRF_SDH_ANT_LOG_ENABLED - #define NRF_LOG_LEVEL NRF_SDH_ANT_LOG_LEVEL - #define NRF_LOG_INFO_COLOR NRF_SDH_ANT_INFO_COLOR - #define NRF_LOG_DEBUG_COLOR NRF_SDH_ANT_DEBUG_COLOR -#else - #define NRF_LOG_LEVEL 0 -#endif // NRF_SDH_ANT_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - - -STATIC_ASSERT(NRF_SDH_ANT_TOTAL_CHANNELS_ALLOCATED <= MAX_ANT_CHANNELS); -STATIC_ASSERT(NRF_SDH_ANT_ENCRYPTED_CHANNELS <= NRF_SDH_ANT_TOTAL_CHANNELS_ALLOCATED); - -// Create section set "sdh_ant_observers". -NRF_SECTION_SET_DEF(sdh_ant_observers, nrf_sdh_ant_evt_observer_t, NRF_SDH_ANT_OBSERVER_PRIO_LEVELS); - -// Memory buffer provided in order to support channel configuration. -__ALIGN(4) static uint8_t m_ant_stack_buffer[NRF_SDH_ANT_BUF_SIZE]; - - -ret_code_t nrf_sdh_ant_enable(void) -{ - ANT_ENABLE ant_enable_cfg = - { - .ucTotalNumberOfChannels = NRF_SDH_ANT_TOTAL_CHANNELS_ALLOCATED, - .ucNumberOfEncryptedChannels = NRF_SDH_ANT_ENCRYPTED_CHANNELS, - .usNumberOfEvents = NRF_SDH_ANT_EVENT_QUEUE_SIZE, - .pucMemoryBlockStartLocation = m_ant_stack_buffer, - .usMemoryBlockByteSize = sizeof(m_ant_stack_buffer), - }; - - ret_code_t ret_code = sd_ant_enable(&ant_enable_cfg); - return ret_code; -} - - -/**@brief Function for polling ANT events. - * - * @param[in] p_context Context of the observer. - */ -static void nrf_sdh_ant_evts_poll(void * p_context) -{ - ret_code_t ret_code; - - UNUSED_VARIABLE(p_context); - - while (true) - { - ant_evt_t ant_evt; - - ret_code = sd_ant_event_get(&ant_evt.channel, &ant_evt.event, ant_evt.message.aucMessage); - if (ret_code != NRF_SUCCESS) - { - break; - } - - NRF_LOG_DEBUG("ANT Event 0x%02X Channel 0x%02X", ant_evt.event, ant_evt.channel); - - // Forward the event to ANT observers. - nrf_section_iter_t iter; - for (nrf_section_iter_init(&iter, &sdh_ant_observers); - nrf_section_iter_get(&iter) != NULL; - nrf_section_iter_next(&iter)) - { - nrf_sdh_ant_evt_observer_t * p_observer; - nrf_sdh_ant_evt_handler_t handler; - - p_observer = (nrf_sdh_ant_evt_observer_t *) nrf_section_iter_get(&iter); - handler = p_observer->handler; - - handler(&ant_evt, p_observer->p_context); - } - } - - if (ret_code != NRF_ERROR_NOT_FOUND) - { - APP_ERROR_HANDLER(ret_code); - } -} - - -NRF_SDH_STACK_OBSERVER(m_nrf_sdh_ant_evts_poll, NRF_SDH_ANT_STACK_OBSERVER_PRIO) = -{ - .handler = nrf_sdh_ant_evts_poll, - .p_context = NULL, -}; - -#endif // NRF_MODULE_ENABLED(NRF_SDH_ANT) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ant.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ant.h deleted file mode 100644 index da3bd7d6b6d..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ant.h +++ /dev/null @@ -1,182 +0,0 @@ -/** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/**@file - * - * @defgroup nrf_sdh_ant ANT support in SoftDevice Handler - * @{ - * @ingroup nrf_sdh - * @brief This file contains the declarations of types and functions required for ANT stack support. - */ - -#ifndef NRF_SDH_ANT_H__ -#define NRF_SDH_ANT_H__ - -#include "ant_parameters.h" -#include "app_util.h" -#include "nrf_section_iter.h" -#include "sdk_errors.h" - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#define NRF_SDH_ANT_EVT_CHANNEL_FIELD_SIZE 1 //!< Size of the channel field in ANT stack event -#define NRF_SDH_ANT_EVT_EVENT_FIELD_SIZE 1 //!< Size of the event field in ANT stack event - -/**@brief Size of the buffer provided to the ANT SoftDevice. - * @hideinitializer - */ -#define NRF_SDH_ANT_BUF_SIZE ANT_ENABLE_GET_REQUIRED_SPACE( \ - NRF_SDH_ANT_TOTAL_CHANNELS_ALLOCATED, \ - NRF_SDH_ANT_ENCRYPTED_CHANNELS, \ - NRF_SDH_ANT_BURST_QUEUE_SIZE, \ - NRF_SDH_ANT_EVENT_QUEUE_SIZE) - -/**@brief Size of the buffer provided to the ANT SoftDevice to receive ANT events. */ -#define NRF_SDH_ANT_MESSAGE_SIZE ((CEIL_DIV(MESG_BUFFER_SIZE, sizeof(uint32_t))) * sizeof(uint32_t)) - -/**@brief Size of the buffer provided to the Events Scheduler to hold ANT events. */ -#define NRF_SDH_ANT_EVT_BUF_SIZE ((CEIL_DIV(NRF_SDH_ANT_MESSAGE_SIZE + \ - NRF_SDH_ANT_EVT_CHANNEL_FIELD_SIZE + \ - NRF_SDH_ANT_EVT_EVENT_FIELD_SIZE, \ - sizeof(uint32_t))) * sizeof(uint32_t)) - - -#if !(defined(__LINT__)) -/**@brief Macro for registering an ANT observer. Modules that want to be - * notified about ANT events must register the handler using this macro. - * - * @details This macro places the observer in a section named "sdh_ant_observers". - * - * @param[in] _name Observer name. - * @param[in] _prio Priority of the observer event handler. - * The smaller the number, the higher the priority. - * @param[in] _handler ANT event handler. - * @param[in] _context Parameter to the event handler. - * @hideinitializer - */ -#define NRF_SDH_ANT_OBSERVER(_name, _prio, _handler, _context) \ -STATIC_ASSERT(NRF_SDH_ANT_ENABLED, "NRF_SDH_ANT_ENABLED not set!"); \ -STATIC_ASSERT(_prio < NRF_SDH_ANT_OBSERVER_PRIO_LEVELS, "Priority level unavailable."); \ -NRF_SECTION_SET_ITEM_REGISTER(sdh_ant_observers, _prio, static nrf_sdh_ant_evt_observer_t _name) = \ -{ \ - .handler = _handler, \ - .p_context = _context \ -} - -/**@brief Macro for registering an array of @ref nrf_sdh_ant_evt_observer_t. - * Modules that want to be notified about ANT events must register the handler using - * this macro. - * - * Each observer's handler will be dispatched an event with its relative context from @p _context. - * This macro places the observer in a section named "sdh_ant_observers". - * - * @param[in] _name Observer name. - * @param[in] _prio Priority of the observer event handler. - * The smaller the number, the higher the priority. - * @param[in] _handler ANT event handler. - * @param[in] _context An array of parameters to the event handler. - * @param[in] _cnt Number of observers to register. - * @hideinitializer - */ -#define NRF_SDH_ANT_OBSERVERS(_name, _prio, _handler, _context, _cnt) \ -STATIC_ASSERT(NRF_SDH_ANT_ENABLED, "NRF_SDH_ANT_ENABLED not set!"); \ -STATIC_ASSERT(_prio < NRF_SDH_ANT_OBSERVER_PRIO_LEVELS, "Priority level unavailable."); \ -NRF_SECTION_SET_ITEM_REGISTER(sdh_ant_observers, _prio, static nrf_sdh_ant_evt_observer_t _name[_cnt]) = \ -{ \ - MACRO_REPEAT_FOR(_cnt, HANDLER_SET, _handler, _context) \ -} - -#if !(defined(DOXYGEN)) -#define HANDLER_SET(_idx, _handler, _context) \ -{ \ - .handler = _handler, \ - .p_context = _context[_idx], \ -}, -#endif - -#else // __LINT__ - -/* Swallow semicolons */ -/*lint -save -esym(528, *) -esym(529, *) : Symbol not referenced. */ -#define NRF_SDH_ANT_OBSERVER(A, B, C, D) static int semicolon_swallow_##A -#define NRF_SDH_ANT_OBSERVERS(A, B, C, D, E) static int semicolon_swallow_##A -/*lint -restore */ - -#endif - - -/**@brief ANT stack event. */ -typedef struct -{ - ANT_MESSAGE message; //!< ANT Message. - uint8_t channel; //!< Channel number. - uint8_t event; //!< Event code. -} ant_evt_t; - -/**@brief ANT stack event handler. */ -typedef void (*nrf_sdh_ant_evt_handler_t)(ant_evt_t * p_ant_evt, void * p_context); - -/**@brief ANT event observer. */ -typedef struct -{ - nrf_sdh_ant_evt_handler_t handler; //!< ANT event handler. - void * p_context; //!< A parameter to the event handler. -} const nrf_sdh_ant_evt_observer_t; - - -/**@brief Function for configuring and enabling the ANT stack. - * - * @details The function sets the channel configuration for the stack using the parameters - * provided in the @c sdk_config file. It also assigns a correspondingly large - * buffer as a static resource. - */ -ret_code_t nrf_sdh_ant_enable(void); - -#ifdef __cplusplus -} -#endif - -#endif // NRF_SDH_ANT_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ble.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ble.c deleted file mode 100644 index 4ebf46e5513..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ble.c +++ /dev/null @@ -1,300 +0,0 @@ -/** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(NRF_SDH_BLE) - -#include "nrf_sdh_ble.h" - -#include "nrf_sdh.h" -#include "app_error.h" -#include "nrf_strerror.h" - - -#define NRF_LOG_MODULE_NAME nrf_sdh_ble -#if NRF_SDH_BLE_LOG_ENABLED - #define NRF_LOG_LEVEL NRF_SDH_BLE_LOG_LEVEL - #define NRF_LOG_INFO_COLOR NRF_SDH_BLE_INFO_COLOR - #define NRF_LOG_DEBUG_COLOR NRF_SDH_BLE_DEBUG_COLOR -#else - #define NRF_LOG_LEVEL 0 -#endif // NRF_SDH_BLE_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - - -// Create section set "sdh_ble_observers". -NRF_SECTION_SET_DEF(sdh_ble_observers, nrf_sdh_ble_evt_observer_t, NRF_SDH_BLE_OBSERVER_PRIO_LEVELS); - - -//lint -save -e10 -e19 -e40 -e27 Illegal character (0x24) -#if defined(__ARMCC_VERSION) - extern uint32_t Image$$RW_IRAM1$$Base; - uint32_t const * const m_ram_start = &Image$$RW_IRAM1$$Base; -#elif defined(__ICCARM__) - extern uint32_t __ICFEDIT_region_RAM_start__; - uint32_t const * const m_ram_start = &__ICFEDIT_region_RAM_start__; -#elif defined(__SES_ARM) - extern uint32_t __app_ram_start__; - uint32_t const * const m_ram_start = &__app_ram_start__; -#elif defined(__GNUC__) - extern uint32_t __data_start__; - uint32_t const * const m_ram_start = &__data_start__; -#endif -//lint -restore - -#define RAM_START 0x20000000 -#define APP_RAM_START (uint32_t)m_ram_start - - -ret_code_t nrf_sdh_ble_app_ram_start_get(uint32_t * p_app_ram_start) -{ - if (p_app_ram_start == NULL) - { - return NRF_ERROR_NULL; - } - - *p_app_ram_start = APP_RAM_START; - - return NRF_SUCCESS; -} - - -ret_code_t nrf_sdh_ble_default_cfg_set(uint8_t conn_cfg_tag, uint32_t * p_ram_start) -{ - uint32_t ret_code; - - ret_code = nrf_sdh_ble_app_ram_start_get(p_ram_start); - if (ret_code != NRF_SUCCESS) - { - return ret_code; - } - -#ifdef S112 - STATIC_ASSERT(NRF_SDH_BLE_CENTRAL_LINK_COUNT == 0, "When using s112, NRF_SDH_BLE_CENTRAL_LINK_COUNT must be 0."); -#endif - - // Overwrite some of the default settings of the BLE stack. - // If any of the calls to sd_ble_cfg_set() fail, log the error but carry on so that - // wrong RAM settings can be caught by nrf_sdh_ble_enable() and a meaningful error - // message will be printed to the user suggesting the correct value. - ble_cfg_t ble_cfg; - -#if (NRF_SDH_BLE_TOTAL_LINK_COUNT != 0) - // Configure the connection count. - memset(&ble_cfg, 0, sizeof(ble_cfg)); - ble_cfg.conn_cfg.conn_cfg_tag = conn_cfg_tag; - ble_cfg.conn_cfg.params.gap_conn_cfg.conn_count = NRF_SDH_BLE_TOTAL_LINK_COUNT; - ble_cfg.conn_cfg.params.gap_conn_cfg.event_length = NRF_SDH_BLE_GAP_EVENT_LENGTH; - - ret_code = sd_ble_cfg_set(BLE_CONN_CFG_GAP, &ble_cfg, *p_ram_start); - if (ret_code != NRF_SUCCESS) - { - NRF_LOG_ERROR("sd_ble_cfg_set() returned %s when attempting to set BLE_CONN_CFG_GAP.", - nrf_strerror_get(ret_code)); - } - - // Configure the connection roles. - memset(&ble_cfg, 0, sizeof(ble_cfg)); - ble_cfg.gap_cfg.role_count_cfg.periph_role_count = NRF_SDH_BLE_PERIPHERAL_LINK_COUNT; -#ifndef S112 - ble_cfg.gap_cfg.role_count_cfg.central_role_count = NRF_SDH_BLE_CENTRAL_LINK_COUNT; - ble_cfg.gap_cfg.role_count_cfg.central_sec_count = NRF_SDH_BLE_CENTRAL_LINK_COUNT ? - BLE_GAP_ROLE_COUNT_CENTRAL_SEC_DEFAULT : 0; -#endif - - ret_code = sd_ble_cfg_set(BLE_GAP_CFG_ROLE_COUNT, &ble_cfg, *p_ram_start); - if (ret_code != NRF_SUCCESS) - { - NRF_LOG_ERROR("sd_ble_cfg_set() returned %s when attempting to set BLE_GAP_CFG_ROLE_COUNT.", - nrf_strerror_get(ret_code)); - } - - // Configure the maximum ATT MTU. -#if (NRF_SDH_BLE_GATT_MAX_MTU_SIZE != 23) - memset(&ble_cfg, 0x00, sizeof(ble_cfg)); - ble_cfg.conn_cfg.conn_cfg_tag = conn_cfg_tag; - ble_cfg.conn_cfg.params.gatt_conn_cfg.att_mtu = NRF_SDH_BLE_GATT_MAX_MTU_SIZE; - - ret_code = sd_ble_cfg_set(BLE_CONN_CFG_GATT, &ble_cfg, *p_ram_start); - if (ret_code != NRF_SUCCESS) - { - NRF_LOG_ERROR("sd_ble_cfg_set() returned %s when attempting to set BLE_CONN_CFG_GATT.", - nrf_strerror_get(ret_code)); - } -#endif -#endif // NRF_SDH_BLE_TOTAL_LINK_COUNT != 0 - - // Configure number of custom UUIDS. - memset(&ble_cfg, 0, sizeof(ble_cfg)); - ble_cfg.common_cfg.vs_uuid_cfg.vs_uuid_count = NRF_SDH_BLE_VS_UUID_COUNT; - - ret_code = sd_ble_cfg_set(BLE_COMMON_CFG_VS_UUID, &ble_cfg, *p_ram_start); - if (ret_code != NRF_SUCCESS) - { - NRF_LOG_ERROR("sd_ble_cfg_set() returned %s when attempting to set BLE_COMMON_CFG_VS_UUID.", - nrf_strerror_get(ret_code)); - } - - // Configure the GATTS attribute table. - memset(&ble_cfg, 0x00, sizeof(ble_cfg)); - ble_cfg.gatts_cfg.attr_tab_size.attr_tab_size = NRF_SDH_BLE_GATTS_ATTR_TAB_SIZE; - - ret_code = sd_ble_cfg_set(BLE_GATTS_CFG_ATTR_TAB_SIZE, &ble_cfg, *p_ram_start); - if (ret_code != NRF_SUCCESS) - { - NRF_LOG_ERROR("sd_ble_cfg_set() returned %s when attempting to set BLE_GATTS_CFG_ATTR_TAB_SIZE.", - nrf_strerror_get(ret_code)); - } - - // Configure Service Changed characteristic. - memset(&ble_cfg, 0x00, sizeof(ble_cfg)); - ble_cfg.gatts_cfg.service_changed.service_changed = NRF_SDH_BLE_SERVICE_CHANGED; - - ret_code = sd_ble_cfg_set(BLE_GATTS_CFG_SERVICE_CHANGED, &ble_cfg, *p_ram_start); - if (ret_code != NRF_SUCCESS) - { - NRF_LOG_ERROR("sd_ble_cfg_set() returned %s when attempting to set BLE_GATTS_CFG_SERVICE_CHANGED.", - nrf_strerror_get(ret_code)); - } - - return NRF_SUCCESS; -} - - -/**@brief Function for finding the end address of the RAM. */ -static uint32_t ram_end_address_get(void) -{ - uint32_t ram_total_size; - -#ifdef NRF51 - uint32_t block_size = NRF_FICR->SIZERAMBLOCKS; - ram_total_size = block_size * NRF_FICR->NUMRAMBLOCK; -#else - ram_total_size = NRF_FICR->INFO.RAM * 1024; -#endif - - return RAM_START + ram_total_size; -} - - -ret_code_t nrf_sdh_ble_enable(uint32_t * const p_app_ram_start) -{ - // Start of RAM, obtained from linker symbol. - uint32_t const app_ram_start_link = *p_app_ram_start; - - NRF_LOG_DEBUG("RAM starts at 0x%x", app_ram_start_link); - - ret_code_t ret_code = sd_ble_enable(p_app_ram_start); - if (*p_app_ram_start != app_ram_start_link) - { - NRF_LOG_WARNING("RAM starts at 0x%x, can be adjusted to 0x%x.", - app_ram_start_link, *p_app_ram_start); - - NRF_LOG_WARNING("RAM size can be adjusted to 0x%x.", - ram_end_address_get() - (*p_app_ram_start)); - } - - if (ret_code != NRF_SUCCESS) - { - NRF_LOG_ERROR("sd_ble_enable() returned %s.", nrf_strerror_get(ret_code)); - } - - return ret_code; -} - - -/**@brief Function for polling BLE events. - * - * @param[in] p_context Context of the observer. - */ -static void nrf_sdh_ble_evts_poll(void * p_context) -{ - ret_code_t ret_code; - - UNUSED_VARIABLE(p_context); - - while (true) - { - __ALIGN(4) uint8_t evt_buffer[NRF_SDH_BLE_EVT_BUF_SIZE]; - - ble_evt_t * p_ble_evt; - uint16_t evt_len = (uint16_t)sizeof(evt_buffer); - - ret_code = sd_ble_evt_get(evt_buffer, &evt_len); - if (ret_code != NRF_SUCCESS) - { - break; - } - - p_ble_evt = (ble_evt_t *)evt_buffer; - - NRF_LOG_DEBUG("BLE event: 0x%x.", p_ble_evt->header.evt_id); - - // Forward the event to BLE observers. - nrf_section_iter_t iter; - for (nrf_section_iter_init(&iter, &sdh_ble_observers); - nrf_section_iter_get(&iter) != NULL; - nrf_section_iter_next(&iter)) - { - nrf_sdh_ble_evt_observer_t * p_observer; - nrf_sdh_ble_evt_handler_t handler; - - p_observer = (nrf_sdh_ble_evt_observer_t *)nrf_section_iter_get(&iter); - handler = p_observer->handler; - - handler(p_ble_evt, p_observer->p_context); - } - } - - if (ret_code != NRF_ERROR_NOT_FOUND) - { - APP_ERROR_HANDLER(ret_code); - } -} - - -NRF_SDH_STACK_OBSERVER(m_nrf_sdh_ble_evts_poll, NRF_SDH_BLE_STACK_OBSERVER_PRIO) = -{ - .handler = nrf_sdh_ble_evts_poll, - .p_context = NULL, -}; - -#endif // NRF_MODULE_ENABLED(NRF_SDH_BLE) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ble.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ble.h deleted file mode 100644 index 844fd960c76..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_ble.h +++ /dev/null @@ -1,187 +0,0 @@ -/** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/**@file - * - * @defgroup nrf_sdh_ble BLE support in SoftDevice Handler - * @{ - * @ingroup nrf_sdh - * @brief This file contains the declarations of types and functions required for BLE stack - * support. - */ - -#ifndef NRF_SDH_BLE_H__ -#define NRF_SDH_BLE_H__ - -#include "app_util.h" -#include "nrf_ble.h" -#include "nrf_section_iter.h" -#include "sdk_config.h" -#include "sdk_errors.h" - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** @brief Size of the buffer for a BLE event. */ -#if (defined(NRF_SD_BLE_API_VERSION) && (NRF_SD_BLE_API_VERSION < 3)) -#define NRF_SDH_BLE_EVT_BUF_SIZE (sizeof(ble_evt_t) + (NRF_SDH_BLE_GATT_MAX_MTU_SIZE)) -#else -#define NRF_SDH_BLE_EVT_BUF_SIZE BLE_EVT_LEN_MAX(NRF_SDH_BLE_GATT_MAX_MTU_SIZE) -#endif - -#if !(defined(__LINT__)) -/**@brief Macro for registering @ref nrf_sdh_soc_evt_observer_t. Modules that want to be - * notified about SoC events must register the handler using this macro. - * - * @details This macro places the observer in a section named "sdh_soc_observers". - * - * @param[in] _name Observer name. - * @param[in] _prio Priority of the observer event handler. - * The smaller the number, the higher the priority. - * @param[in] _handler BLE event handler. - * @param[in] _context Parameter to the event handler. - * @hideinitializer - */ -#define NRF_SDH_BLE_OBSERVER(_name, _prio, _handler, _context) \ -STATIC_ASSERT(NRF_SDH_BLE_ENABLED, "NRF_SDH_BLE_ENABLED not set!"); \ -STATIC_ASSERT(_prio < NRF_SDH_BLE_OBSERVER_PRIO_LEVELS, "Priority level unavailable."); \ -NRF_SECTION_SET_ITEM_REGISTER(sdh_ble_observers, _prio, static nrf_sdh_ble_evt_observer_t _name) = \ -{ \ - .handler = _handler, \ - .p_context = _context \ -} - -/**@brief Macro for registering an array of @ref nrf_sdh_ble_evt_observer_t. - * Modules that want to be notified about SoC events must register the handler using - * this macro. - * - * Each observer's handler will be dispatched an event with its relative context from @p _context. - * This macro places the observer in a section named "sdh_ble_observers". - * - * @param[in] _name Observer name. - * @param[in] _prio Priority of the observer event handler. - * The smaller the number, the higher the priority. - * @param[in] _handler BLE event handler. - * @param[in] _context An array of parameters to the event handler. - * @param[in] _cnt Number of observers to register. - * @hideinitializer - */ -#define NRF_SDH_BLE_OBSERVERS(_name, _prio, _handler, _context, _cnt) \ -STATIC_ASSERT(NRF_SDH_BLE_ENABLED, "NRF_SDH_BLE_ENABLED not set!"); \ -STATIC_ASSERT(_prio < NRF_SDH_BLE_OBSERVER_PRIO_LEVELS, "Priority level unavailable."); \ -NRF_SECTION_SET_ITEM_REGISTER(sdh_ble_observers, _prio, static nrf_sdh_ble_evt_observer_t _name[_cnt]) = \ -{ \ - MACRO_REPEAT_FOR(_cnt, HANDLER_SET, _handler, _context) \ -} - -#if !(defined(DOXYGEN)) -#define HANDLER_SET(_idx, _handler, _context) \ -{ \ - .handler = _handler, \ - .p_context = _context[_idx], \ -}, -#endif - -#else // __LINT__ - -/* Swallow semicolons */ -/*lint -save -esym(528, *) -esym(529, *) : Symbol not referenced. */ -#define NRF_SDH_BLE_OBSERVER(A, B, C, D) static int semicolon_swallow_##A -#define NRF_SDH_BLE_OBSERVERS(A, B, C, D, E) static int semicolon_swallow_##A -/*lint -restore */ - -#endif - - -/**@brief BLE stack event handler. */ -typedef void (*nrf_sdh_ble_evt_handler_t)(ble_evt_t const * p_ble_evt, void * p_context); - -/**@brief BLE event observer. */ -typedef struct -{ - nrf_sdh_ble_evt_handler_t handler; //!< BLE event handler. - void * p_context; //!< A parameter to the event handler. -} const nrf_sdh_ble_evt_observer_t; - - -/**@brief Function for retrieving the address of the start of application's RAM. - * - * @param[out] p_app_ram_start Address of the start of application's RAM. - * - * @retval NRF_SUCCESS If the address was successfully retrieved. - * @retval NRF_ERROR_NULL If @p p_app_ram_start was @c NULL. - */ -ret_code_t nrf_sdh_ble_app_ram_start_get(uint32_t * p_app_ram_start); - - -/**@brief Set the default BLE stack configuration. - * - * This function configures the BLE stack with the settings specified in the - * SoftDevice handler BLE configuration. The following configurations will be set: - * - Number of peripheral links - * - Number of central links - * - ATT MTU size (for the given connection) - * - Vendor specific UUID count - * - GATTS Attribute table size - * - Service changed - * - * @param[in] conn_cfg_tag The connection to configure. - * @param[out] p_ram_start Application RAM start address. - */ -ret_code_t nrf_sdh_ble_default_cfg_set(uint8_t conn_cfg_tag, uint32_t * p_ram_start); - - -/**@brief Function for configuring and enabling the BLE stack. - * - * @param[in] p_app_ram_start Address of the start of application's RAM. - */ -ret_code_t nrf_sdh_ble_enable(uint32_t * p_app_ram_start); - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_SDH_BLE_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_soc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_soc.c deleted file mode 100644 index cf037022ca4..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_soc.c +++ /dev/null @@ -1,118 +0,0 @@ -/** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(NRF_SDH_SOC) - -#include "nrf_sdh_soc.h" - -#include "nrf_sdh.h" -#include "nrf_soc.h" -#include "app_error.h" - - -#define NRF_LOG_MODULE_NAME nrf_sdh_soc -#if NRF_SDH_SOC_LOG_ENABLED - #define NRF_LOG_LEVEL NRF_SDH_SOC_LOG_LEVEL - #define NRF_LOG_INFO_COLOR NRF_SDH_SOC_INFO_COLOR - #define NRF_LOG_DEBUG_COLOR NRF_SDH_SOC_DEBUG_COLOR -#else - #define NRF_LOG_LEVEL 0 -#endif // NRF_SDH_SOC_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - - -// Create section set "sdh_soc_observers". -NRF_SECTION_SET_DEF(sdh_soc_observers, nrf_sdh_soc_evt_observer_t, NRF_SDH_SOC_OBSERVER_PRIO_LEVELS); - - -/**@brief Function for polling SoC events. - * - * @param[in] p_context Context of the observer. - */ -static void nrf_sdh_soc_evts_poll(void * p_context) -{ - ret_code_t ret_code; - - UNUSED_VARIABLE(p_context); - - while (true) - { - uint32_t evt_id; - - ret_code = sd_evt_get(&evt_id); - if (ret_code != NRF_SUCCESS) - { - break; - } - - NRF_LOG_DEBUG("SoC event: 0x%x.", evt_id); - - // Forward the event to SoC observers. - nrf_section_iter_t iter; - for (nrf_section_iter_init(&iter, &sdh_soc_observers); - nrf_section_iter_get(&iter) != NULL; - nrf_section_iter_next(&iter)) - { - nrf_sdh_soc_evt_observer_t * p_observer; - nrf_sdh_soc_evt_handler_t handler; - - p_observer = (nrf_sdh_soc_evt_observer_t *) nrf_section_iter_get(&iter); - handler = p_observer->handler; - - handler(evt_id, p_observer->p_context); - } - } - - if (ret_code != NRF_ERROR_NOT_FOUND) - { - APP_ERROR_HANDLER(ret_code); - } -} - - -NRF_SDH_STACK_OBSERVER(m_nrf_sdh_soc_evts_poll, NRF_SDH_SOC_STACK_OBSERVER_PRIO) = -{ - .handler = nrf_sdh_soc_evts_poll, - .p_context = NULL, -}; - -#endif // NRF_MODULE_ENABLED(NRF_SDH_SOC) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_soc.h deleted file mode 100644 index 42eb541ac0b..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/softdevice/common/nrf_sdh_soc.h +++ /dev/null @@ -1,143 +0,0 @@ -/** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/**@file - * - * @defgroup nrf_sdh_soc SoC support in SoftDevice Handler - * @{ - * @ingroup nrf_sdh - * @brief This file contains the declarations of types and functions required for SoftDevice Handler - * SoC support. - */ - -#ifndef NRF_SDH_SOC_H__ -#define NRF_SDH_SOC_H__ - -#include "app_util.h" -#include "nrf_section_iter.h" -#include "nrf_soc.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -#if !(defined(__LINT__)) -/**@brief Macro for registering @ref nrf_sdh_soc_evt_observer_t. Modules that want to be - * notified about SoC events must register the handler using this macro. - * - * @details This macro places the observer in a section named "sdh_soc_observers". - * - * @param[in] _name Observer name. - * @param[in] _prio Priority of the observer event handler. - * The smaller the number, the higher the priority. - * @param[in] _handler SoC event handler. - * @param[in] _context Parameter to the event handler. - * @hideinitializer - */ -#define NRF_SDH_SOC_OBSERVER(_name, _prio, _handler, _context) \ -STATIC_ASSERT(NRF_SDH_SOC_ENABLED, "NRF_SDH_SOC_ENABLED not set!"); \ -STATIC_ASSERT(_prio < NRF_SDH_SOC_OBSERVER_PRIO_LEVELS, "Priority level unavailable."); \ -NRF_SECTION_SET_ITEM_REGISTER(sdh_soc_observers, _prio, static nrf_sdh_soc_evt_observer_t _name) = \ -{ \ - .handler = _handler, \ - .p_context = _context \ -} - -/**@brief Macro for registering an array of @ref nrf_sdh_soc_evt_observer_t. - * Modules that want to be notified about SoC events must register the handler using - * this macro. - * - * Each observer's handler will be dispatched an event with its relative context from @p _context. - * This macro places the observer in a section named "sdh_soc_observers". - * - * @param[in] _name Observer name. - * @param[in] _prio Priority of the observer event handler. - * The smaller the number, the higher the priority. - * @param[in] _handler SoC event handler. - * @param[in] _context An array of parameters to the event handler. - * @param[in] _cnt Number of observers to register. - * @hideinitializer - */ -#define NRF_SDH_SOC_EVENT_OBSERVERS(_name, _prio, _handler, _context, _cnt) \ -STATIC_ASSERT(NRF_SDH_SOC_ENABLED, "NRF_SDH_SOC_ENABLED not set!"); \ -STATIC_ASSERT(_prio < NRF_SDH_SOC_OBSERVER_PRIO_LEVELS, "Priority level unavailable."); \ -NRF_SECTION_SET_ITEM_REGISTER(sdh_soc_observers, _prio, static nrf_sdh_soc_evt_observer_t _name[_cnt]) = \ -{ \ - MACRO_REPEAT_FOR(_cnt, HANDLER_SET, _handler, _context) \ -} - -#if !(defined(DOXYGEN)) -#define HANDLER_SET(_idx, _handler, _context) \ -{ \ - .handler = _handler, \ - .p_context = _context[_idx], \ -}, -#endif - -#else // __LINT__ - -/* Swallow semicolons */ -/*lint -save -esym(528, *) -esym(529, *) : Symbol not referenced. */ -#define NRF_SDH_SOC_OBSERVER(A, B, C, D) static int semicolon_swallow_##A -#define NRF_SDH_SOC_OBSERVERS(A, B, C, D, E) static int semicolon_swallow_##A -/*lint -restore */ - -#endif - - -/**@brief SoC event handler. */ -typedef void (*nrf_sdh_soc_evt_handler_t) (uint32_t evt_id, void * p_context); - -/**@brief SoC event observer. */ -typedef struct -{ - nrf_sdh_soc_evt_handler_t handler; //!< SoC event handler. - void * p_context; //!< A parameter to the event handler. -} const nrf_sdh_soc_evt_observer_t; - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_SDH_SOC_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_NONE/libraries/fstorage/nrf_fstorage_nvmc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_NONE/libraries/fstorage/nrf_fstorage_nvmc.c deleted file mode 100644 index b7c1ac01f6e..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_NONE/libraries/fstorage/nrf_fstorage_nvmc.c +++ /dev/null @@ -1,215 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" - -#if NRF_MODULE_ENABLED(NRF_FSTORAGE) - -#include "nrf_fstorage_nvmc.h" -#include -#include -#include -#include "nrf_nvmc.h" -#include "nrf_atomic.h" - - -static nrf_fstorage_info_t m_flash_info = -{ -#if defined(NRF51) - .erase_unit = 1024, -#elif defined(NRF52_SERIES) - .erase_unit = 4096, -#endif - .program_unit = 4, - .rmap = true, - .wmap = false, -}; - - - /* An operation initiated by fstorage is ongoing. */ -static nrf_atomic_flag_t m_flash_operation_ongoing; - - -/* Send event to the event handler. */ -static void event_send(nrf_fstorage_t const * p_fs, - nrf_fstorage_evt_id_t evt_id, - uint32_t addr, - uint32_t len, - void * p_param) -{ - if (p_fs->evt_handler == NULL) - { - /* Nothing to do. */ - return; - } - - nrf_fstorage_evt_t evt = - { - .result = NRF_SUCCESS, - .id = evt_id, - .addr = addr, - .len = len, - .p_param = p_param, - }; - - p_fs->evt_handler(&evt); -} - - -static ret_code_t init(nrf_fstorage_t * p_fs, void * p_param) -{ - UNUSED_PARAMETER(p_param); - - p_fs->p_flash_info = &m_flash_info; - - return NRF_SUCCESS; -} - - -static ret_code_t uninit(nrf_fstorage_t * p_fs, void * p_param) -{ - UNUSED_PARAMETER(p_fs); - UNUSED_PARAMETER(p_param); - - (void) nrf_atomic_flag_clear(&m_flash_operation_ongoing); - - return NRF_SUCCESS; -} - - -static ret_code_t read(nrf_fstorage_t const * p_fs, uint32_t src, void * p_dest, uint32_t len) -{ - UNUSED_PARAMETER(p_fs); - - memcpy(p_dest, (uint32_t*)src, len); - - return NRF_SUCCESS; -} - - -static ret_code_t write(nrf_fstorage_t const * p_fs, - uint32_t dest, - void const * p_src, - uint32_t len, - void * p_param) -{ - if (nrf_atomic_flag_set_fetch(&m_flash_operation_ongoing)) - { - return NRF_ERROR_BUSY; - } - - nrf_nvmc_write_words(dest, (uint32_t*)p_src, (len / m_flash_info.program_unit)); - - /* Clear the flag before sending the event, to allow API calls in the event context. */ - (void) nrf_atomic_flag_clear(&m_flash_operation_ongoing); - - event_send(p_fs, NRF_FSTORAGE_EVT_WRITE_RESULT, dest, len, p_param); - - return NRF_SUCCESS; -} - - -static ret_code_t erase(nrf_fstorage_t const * p_fs, - uint32_t page_addr, - uint32_t len, - void * p_param) -{ - uint32_t progress = 0; - - if (nrf_atomic_flag_set_fetch(&m_flash_operation_ongoing)) - { - return NRF_ERROR_BUSY; - } - - while (progress != len) - { - nrf_nvmc_page_erase(page_addr + (progress * m_flash_info.erase_unit)); - progress++; - } - - /* Clear the flag before sending the event, to allow API calls in the event context. */ - (void) nrf_atomic_flag_clear(&m_flash_operation_ongoing); - - event_send(p_fs, NRF_FSTORAGE_EVT_ERASE_RESULT, page_addr, len, p_param); - - return NRF_SUCCESS; -} - - -static uint8_t const * rmap(nrf_fstorage_t const * p_fs, uint32_t addr) -{ - UNUSED_PARAMETER(p_fs); - - return (uint8_t*)addr; -} - - -static uint8_t * wmap(nrf_fstorage_t const * p_fs, uint32_t addr) -{ - UNUSED_PARAMETER(p_fs); - UNUSED_PARAMETER(addr); - - /* Not supported. */ - return NULL; -} - - -static bool is_busy(nrf_fstorage_t const * p_fs) -{ - UNUSED_PARAMETER(p_fs); - - return m_flash_operation_ongoing; -} - - -/* The exported API. */ -nrf_fstorage_api_t nrf_fstorage_nvmc = -{ - .init = init, - .uninit = uninit, - .read = read, - .write = write, - .erase = erase, - .rmap = rmap, - .wmap = wmap, - .is_busy = is_busy -}; - - -#endif // NRF_FSTORAGE_ENABLED diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_NONE/libraries/fstorage/nrf_fstorage_nvmc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_NONE/libraries/fstorage/nrf_fstorage_nvmc.h deleted file mode 100644 index be3477556cc..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_NONE/libraries/fstorage/nrf_fstorage_nvmc.h +++ /dev/null @@ -1,75 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - * @file - * - * @defgroup nrf_fstorage_nvmc NVMC implementation - * @ingroup nrf_fstorage - * @{ - * - * @brief API implementation of fstorage that uses the non-volatile memory controller (NVMC). -*/ - -#ifndef NRF_FSTORAGE_NVMC_H__ -#define NRF_FSTORAGE_NVMC_H__ - -#include "nrf_fstorage.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -/**@brief API implementation that uses the non-volatile memory controller. - * - * @details An fstorage instance with this API implementation can be initialized by providing - * this structure as a parameter to @ref nrf_fstorage_init. - * The structure is defined in @c nrf_fstorage_nvmc.c. - */ -extern nrf_fstorage_api_t nrf_fstorage_nvmc; - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_FSTORAGE_NVMC_H__ -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_error.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_error.h deleted file mode 100644 index 6ae2c9b52ac..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_error.h +++ /dev/null @@ -1,87 +0,0 @@ -/** - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/* Header guard */ -#ifndef NRF_ERROR_H__ -#define NRF_ERROR_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/// @cond Make doxygen skip this file - -/** @defgroup NRF_ERRORS_BASE Error Codes Base number definitions - * @{ */ -#define NRF_ERROR_BASE_NUM (0x0) ///< Global error base -#define NRF_ERROR_SDM_BASE_NUM (0x1000) ///< SDM error base -#define NRF_ERROR_SOC_BASE_NUM (0x2000) ///< SoC error base -#define NRF_ERROR_STK_BASE_NUM (0x3000) ///< STK error base -/** @} */ - -#define NRF_SUCCESS (NRF_ERROR_BASE_NUM + 0) ///< Successful command -#define NRF_ERROR_SVC_HANDLER_MISSING (NRF_ERROR_BASE_NUM + 1) ///< SVC handler is missing -#define NRF_ERROR_SOFTDEVICE_NOT_ENABLED (NRF_ERROR_BASE_NUM + 2) ///< SoftDevice has not been enabled -#define NRF_ERROR_INTERNAL (NRF_ERROR_BASE_NUM + 3) ///< Internal Error -#define NRF_ERROR_NO_MEM (NRF_ERROR_BASE_NUM + 4) ///< No Memory for operation -#define NRF_ERROR_NOT_FOUND (NRF_ERROR_BASE_NUM + 5) ///< Not found -#define NRF_ERROR_NOT_SUPPORTED (NRF_ERROR_BASE_NUM + 6) ///< Not supported -#define NRF_ERROR_INVALID_PARAM (NRF_ERROR_BASE_NUM + 7) ///< Invalid Parameter -#define NRF_ERROR_INVALID_STATE (NRF_ERROR_BASE_NUM + 8) ///< Invalid state, operation disallowed in this state -#define NRF_ERROR_INVALID_LENGTH (NRF_ERROR_BASE_NUM + 9) ///< Invalid Length -#define NRF_ERROR_INVALID_FLAGS (NRF_ERROR_BASE_NUM + 10) ///< Invalid Flags -#define NRF_ERROR_INVALID_DATA (NRF_ERROR_BASE_NUM + 11) ///< Invalid Data -#define NRF_ERROR_DATA_SIZE (NRF_ERROR_BASE_NUM + 12) ///< Data size exceeds limit -#define NRF_ERROR_TIMEOUT (NRF_ERROR_BASE_NUM + 13) ///< Operation timed out -#define NRF_ERROR_NULL (NRF_ERROR_BASE_NUM + 14) ///< Null Pointer -#define NRF_ERROR_FORBIDDEN (NRF_ERROR_BASE_NUM + 15) ///< Forbidden Operation -#define NRF_ERROR_INVALID_ADDR (NRF_ERROR_BASE_NUM + 16) ///< Bad Memory Address -#define NRF_ERROR_BUSY (NRF_ERROR_BASE_NUM + 17) ///< Busy - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_ERROR_H__ - -/// @endcond -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_nvic.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_nvic.c deleted file mode 100644 index 45803bf61a8..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_nvic.c +++ /dev/null @@ -1,123 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include -#include "nrf_soc.h" -#include "nrf_error.h" - -static uint8_t m_in_critical_region = 0; - -uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn) -{ - NVIC_EnableIRQ(IRQn); - return NRF_SUCCESS; -} - -uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn) -{ - NVIC_DisableIRQ(IRQn); - return NRF_SUCCESS; -} - -uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq) -{ - if (p_pending_irq != NULL) - { - *p_pending_irq = NVIC_GetPendingIRQ(IRQn); - return NRF_SUCCESS; - } - return NRF_ERROR_NULL; -} - -uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC_SetPendingIRQ(IRQn); - return NRF_SUCCESS; -} - -uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC_ClearPendingIRQ(IRQn); - return NRF_SUCCESS; -} - -uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - NVIC_SetPriority(IRQn, priority); - return NRF_SUCCESS; -} - -uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority) -{ - if (p_priority != NULL) - { - *p_priority = NVIC_GetPriority(IRQn); - return NRF_SUCCESS; - } - - return NRF_ERROR_NULL; -} - -uint32_t sd_nvic_SystemReset(void) -{ - NVIC_SystemReset(); - return NRF_SUCCESS; -} - -uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region) -{ - __disable_irq(); - - *p_is_nested_critical_region = (m_in_critical_region != 0); - m_in_critical_region++; - - return NRF_SUCCESS; -} - -uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region) -{ - m_in_critical_region--; - - if (is_nested_critical_region == 0) - { - m_in_critical_region = 0; - __enable_irq(); - } - return NRF_SUCCESS; -} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_nvic.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_nvic.h deleted file mode 100644 index 3ab15d66d10..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_nvic.h +++ /dev/null @@ -1,166 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_NVIC_H__ -#define NRF_NVIC_H__ - -#include -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@brief Enable External Interrupt. - * @note Corresponds to NVIC_EnableIRQ in CMSIS. - * - * @pre{IRQn is valid and not reserved by the stack} - * - * @param[in] IRQn See the NVIC_EnableIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt was enabled. - */ -uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn); - -/**@brief Disable External Interrupt. - * @note Corresponds to NVIC_DisableIRQ in CMSIS. - * - * @pre{IRQn is valid and not reserved by the stack} - * - * @param[in] IRQn See the NVIC_DisableIRQ documentation in CMSIS - * - * @retval ::NRF_SUCCESS The interrupt was disabled. - */ -uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn); - -/**@brief Get Pending Interrupt. - * @note Corresponds to NVIC_GetPendingIRQ in CMSIS. - * - * @pre{IRQn is valid and not reserved by the stack} - * - * @param[in] IRQn See the NVIC_GetPendingIRQ documentation in CMSIS. - * @param[out] p_pending_irq Return value from NVIC_GetPendingIRQ. - * - * @retval ::NRF_SUCCESS The interrupt is available for the application. - */ -uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq); - -/**@brief Set Pending Interrupt. - * @note Corresponds to NVIC_SetPendingIRQ in CMSIS. - * - * @pre{IRQn is valid and not reserved by the stack} - * - * @param[in] IRQn See the NVIC_SetPendingIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt is set pending. - */ -uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn); - -/**@brief Clear Pending Interrupt. - * @note Corresponds to NVIC_ClearPendingIRQ in CMSIS. - * - * @pre{IRQn is valid and not reserved by the stack} - * - * @param[in] IRQn See the NVIC_ClearPendingIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt pending flag is cleared. - */ -uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn); - -/**@brief Set Interrupt Priority. - * @note Corresponds to NVIC_SetPriority in CMSIS. - * - * @pre{IRQn is valid and not reserved by the stack} - * @pre{priority is valid and not reserved by the stack} - * - * @param[in] IRQn See the NVIC_SetPriority documentation in CMSIS. - * @param[in] priority A valid IRQ priority for use by the application. - * - * @retval ::NRF_SUCCESS The interrupt and priority level is available for the application. - */ -uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority); - -/**@brief Get Interrupt Priority. - * @note Corresponds to NVIC_GetPriority in CMSIS. - * - * @pre{IRQn is valid and not reserved by the stack} - * - * @param[in] IRQn See the NVIC_GetPriority documentation in CMSIS. - * @param[out] p_priority Return value from NVIC_GetPriority. - * - * @retval ::NRF_SUCCESS The interrupt priority is returned in p_priority. - */ -uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority); - -/**@brief System Reset. - * @note Corresponds to NVIC_SystemReset in CMSIS. - * - * @retval ::NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN - */ -uint32_t sd_nvic_SystemReset(void); - -/**@brief Enters critical region. - * - * @post Application interrupts will be disabled. - * @sa sd_nvic_critical_region_exit - * - * @param[out] p_is_nested_critical_region 1: If in a nested critical region. - * 0: Otherwise. - * - * @retval ::NRF_SUCCESS - */ -uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region); - -/**@brief Exit critical region. - * - * @pre Application has entered a critical region using ::sd_nvic_critical_region_enter. - * @post If not in a nested critical region, the application interrupts will restored to the state before ::sd_nvic_critical_region_enter was called. - * - * @param[in] is_nested_critical_region If this is set to 1, the critical region won't be exited. @sa sd_nvic_critical_region_enter. - * - * @retval ::NRF_SUCCESS - */ -uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region); - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_NVIC_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_soc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_soc.c deleted file mode 100644 index 8b273d74bf5..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_soc.c +++ /dev/null @@ -1,48 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include -#include "nrf_soc.h" -#include "nrf_error.h" - -uint32_t sd_app_evt_wait(void) -{ - __WFE(); - return NRF_SUCCESS; -} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_soc.h deleted file mode 100644 index 3119ada366f..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_NONE/nrf_soc_nosd/nrf_soc.h +++ /dev/null @@ -1,80 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_SOC_H__ -#define NRF_SOC_H__ - -#include -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@brief Waits for an application event. - * - * An application event is either an application interrupt or a pended interrupt when the - * interrupt is disabled. When the interrupt is enabled it will be taken immediately since - * this function will wait in thread mode, then the execution will return in the application's - * main thread. When an interrupt is disabled and gets pended it will return to the application's - * thread main. The application must ensure that the pended flag is cleared using - * ::sd_nvic_ClearPendingIRQ in order to sleep using this function. This is only necessary for - * disabled interrupts, as the interrupt handler will clear the pending flag automatically for - * enabled interrupts. - * - * In order to wake up from disabled interrupts, the SEVONPEND flag has to be set in the Cortex-M0 - * System Control Register (SCR). @sa CMSIS_SCB - * - * @note If an application interrupt has happened since the last time sd_app_evt_wait was - * called this function will return immediately and not go to sleep. This is to avoid race - * conditions that can occur when a flag is updated in the interrupt handler and processed - * in the main loop. - * - * @post An application interrupt has happened or a interrupt pending flag is set. - * - * @retval ::NRF_SUCCESS - */ -uint32_t sd_app_evt_wait(void); - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_SOC_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/doc/s112_nrf51822_5.1.0_release-notes.pdf b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/doc/s112_nrf51822_5.1.0_release-notes.pdf deleted file mode 100644 index 08f82cbe5341175465faca3e0e7187e02334011e..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 14830 zcmd6OWmH_twk}Q}f#5EUOMs?v2oAx$(O^LuclThy-3jjQ?hxD|xCNKs8Z5vgd*__J z&pCJ8JI1?Xyz$nb>RGF5)~u?zdVOowH>ngv#TY?MY{*m_o8wc+>;PtfwZ0iLFE3C; zllfTyX#<6=?F=Dye@M*F68QO^8h{xH27>wdfkMxcijpL)iGza;4-jZ-Wn^stv2uXe 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a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/doc/s112_nrf52810_5.1.0_licence-agreement.txt +++ /dev/null @@ -1,35 +0,0 @@ -Copyright (c) 2007 - 2017, Nordic Semiconductor ASA -All rights reserved. - -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - -1. Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. - -2. Redistributions in binary form, except as embedded into a Nordic - Semiconductor ASA integrated circuit in a product or a software update for - such product, must reproduce the above copyright notice, this list of - conditions and the following disclaimer in the documentation and/or other - materials provided with the distribution. - -3. Neither the name of Nordic Semiconductor ASA nor the names of its - contributors may be used to endorse or promote products derived from this - software without specific prior written permission. - -4. This software, with or without modification, must only be used with a - Nordic Semiconductor ASA integrated circuit. - -5. Any software provided in binary form under this license must not be reverse - engineered, decompiled, modified and/or disassembled. - -THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS -OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE -LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT -OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/ble_err.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/ble_err.h deleted file mode 100644 index 1b0b9d44354..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/ble_err.h +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_COMMON - @{ - @addtogroup nrf_error - @{ - @ingroup BLE_COMMON - @} - - @defgroup ble_err General error codes - @{ - - @brief General error code definitions for the BLE API. - - @ingroup BLE_COMMON -*/ -#ifndef NRF_BLE_ERR_H__ -#define NRF_BLE_ERR_H__ - -#include "nrf_error.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* @defgroup BLE_ERRORS Error Codes - * @{ */ -#define BLE_ERROR_NOT_ENABLED (NRF_ERROR_STK_BASE_NUM+0x001) /**< @ref sd_ble_enable has not been called. */ -#define BLE_ERROR_INVALID_CONN_HANDLE (NRF_ERROR_STK_BASE_NUM+0x002) /**< Invalid connection handle. */ -#define BLE_ERROR_INVALID_ATTR_HANDLE (NRF_ERROR_STK_BASE_NUM+0x003) /**< Invalid attribute handle. */ -#define BLE_ERROR_INVALID_ROLE (NRF_ERROR_STK_BASE_NUM+0x004) /**< Invalid role. */ -/** @} */ - - -/** @defgroup BLE_ERROR_SUBRANGES Module specific error code subranges - * @brief Assignment of subranges for module specific error codes. - * @note For specific error codes, see ble_.h or ble_error_.h. - * @{ */ -#define NRF_L2CAP_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x100) /**< L2CAP specific errors. */ -#define NRF_GAP_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x200) /**< GAP specific errors. */ -#define NRF_GATTC_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x300) /**< GATT client specific errors. */ -#define NRF_GATTS_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x400) /**< GATT server specific errors. */ -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif - - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/ble_gap.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/ble_gap.h deleted file mode 100644 index f25cb40638b..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/ble_gap.h +++ /dev/null @@ -1,1847 +0,0 @@ -/* - * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_GAP Generic Access Profile (GAP) - @{ - @brief Definitions and prototypes for the GAP interface. - */ - -#ifndef BLE_GAP_H__ -#define BLE_GAP_H__ - -#include -#include "nrf_svc.h" -#include "nrf_error.h" -#include "ble_hci.h" -#include "ble_ranges.h" -#include "ble_types.h" -#include "ble_err.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@addtogroup BLE_GAP_ENUMERATIONS Enumerations - * @{ */ - -/**@brief GAP API SVC numbers. - */ -enum BLE_GAP_SVCS -{ - SD_BLE_GAP_ADDR_SET = BLE_GAP_SVC_BASE, /**< Set own Bluetooth Address. */ - SD_BLE_GAP_ADDR_GET = BLE_GAP_SVC_BASE + 1, /**< Get own Bluetooth Address. */ - SD_BLE_GAP_WHITELIST_SET = BLE_GAP_SVC_BASE + 2, /**< Set active whitelist. */ - SD_BLE_GAP_DEVICE_IDENTITIES_SET = BLE_GAP_SVC_BASE + 3, /**< Set device identity list. */ - SD_BLE_GAP_PRIVACY_SET = BLE_GAP_SVC_BASE + 4, /**< Set Privacy settings*/ - SD_BLE_GAP_PRIVACY_GET = BLE_GAP_SVC_BASE + 5, /**< Get Privacy settings*/ - SD_BLE_GAP_ADV_DATA_SET = BLE_GAP_SVC_BASE + 6, /**< Set Advertising Data. */ - SD_BLE_GAP_ADV_START = BLE_GAP_SVC_BASE + 7, /**< Start Advertising. */ - SD_BLE_GAP_ADV_STOP = BLE_GAP_SVC_BASE + 8, /**< Stop Advertising. */ - SD_BLE_GAP_CONN_PARAM_UPDATE = BLE_GAP_SVC_BASE + 9, /**< Connection Parameter Update. */ - SD_BLE_GAP_DISCONNECT = BLE_GAP_SVC_BASE + 10, /**< Disconnect. */ - SD_BLE_GAP_TX_POWER_SET = BLE_GAP_SVC_BASE + 11, /**< Set TX Power. */ - SD_BLE_GAP_APPEARANCE_SET = BLE_GAP_SVC_BASE + 12, /**< Set Appearance. */ - SD_BLE_GAP_APPEARANCE_GET = BLE_GAP_SVC_BASE + 13, /**< Get Appearance. */ - SD_BLE_GAP_PPCP_SET = BLE_GAP_SVC_BASE + 14, /**< Set PPCP. */ - SD_BLE_GAP_PPCP_GET = BLE_GAP_SVC_BASE + 15, /**< Get PPCP. */ - SD_BLE_GAP_DEVICE_NAME_SET = BLE_GAP_SVC_BASE + 16, /**< Set Device Name. */ - SD_BLE_GAP_DEVICE_NAME_GET = BLE_GAP_SVC_BASE + 17, /**< Get Device Name. */ - SD_BLE_GAP_AUTHENTICATE = BLE_GAP_SVC_BASE + 18, /**< Initiate Pairing/Bonding. */ - SD_BLE_GAP_SEC_PARAMS_REPLY = BLE_GAP_SVC_BASE + 19, /**< Reply with Security Parameters. */ - SD_BLE_GAP_AUTH_KEY_REPLY = BLE_GAP_SVC_BASE + 20, /**< Reply with an authentication key. */ - SD_BLE_GAP_LESC_DHKEY_REPLY = BLE_GAP_SVC_BASE + 21, /**< Reply with an LE Secure Connections DHKey. */ - SD_BLE_GAP_KEYPRESS_NOTIFY = BLE_GAP_SVC_BASE + 22, /**< Notify of a keypress during an authentication procedure. */ - SD_BLE_GAP_LESC_OOB_DATA_GET = BLE_GAP_SVC_BASE + 23, /**< Get the local LE Secure Connections OOB data. */ - SD_BLE_GAP_LESC_OOB_DATA_SET = BLE_GAP_SVC_BASE + 24, /**< Set the remote LE Secure Connections OOB data. */ - SD_BLE_GAP_SEC_INFO_REPLY = BLE_GAP_SVC_BASE + 26, /**< Reply with Security Information. */ - SD_BLE_GAP_CONN_SEC_GET = BLE_GAP_SVC_BASE + 27, /**< Obtain connection security level. */ - SD_BLE_GAP_RSSI_START = BLE_GAP_SVC_BASE + 28, /**< Start reporting of changes in RSSI. */ - SD_BLE_GAP_RSSI_STOP = BLE_GAP_SVC_BASE + 29, /**< Stop reporting of changes in RSSI. */ - SD_BLE_GAP_RSSI_GET = BLE_GAP_SVC_BASE + 34, /**< Get the last RSSI sample. */ - SD_BLE_GAP_PHY_UPDATE = BLE_GAP_SVC_BASE + 35, /**< Initiate or respond to a PHY Update Procedure. */ -}; - -/**@brief GAP Event IDs. - * IDs that uniquely identify an event coming from the stack to the application. - */ -enum BLE_GAP_EVTS -{ - BLE_GAP_EVT_CONNECTED = BLE_GAP_EVT_BASE, - BLE_GAP_EVT_DISCONNECTED = BLE_GAP_EVT_BASE + 1, /**< Disconnected from peer. \n See @ref ble_gap_evt_disconnected_t. */ - BLE_GAP_EVT_CONN_PARAM_UPDATE = BLE_GAP_EVT_BASE + 2, /**< Connection Parameters updated. \n See @ref ble_gap_evt_conn_param_update_t. */ - BLE_GAP_EVT_SEC_PARAMS_REQUEST = BLE_GAP_EVT_BASE + 3, /**< Request to provide security parameters. \n Reply with @ref sd_ble_gap_sec_params_reply. \n See @ref ble_gap_evt_sec_params_request_t. */ - BLE_GAP_EVT_SEC_INFO_REQUEST = BLE_GAP_EVT_BASE + 4, /**< Request to provide security information. \n Reply with @ref sd_ble_gap_sec_info_reply. \n See @ref ble_gap_evt_sec_info_request_t. */ - BLE_GAP_EVT_PASSKEY_DISPLAY = BLE_GAP_EVT_BASE + 5, /**< Request to display a passkey to the user. \n In LESC Numeric Comparison, reply with @ref sd_ble_gap_auth_key_reply. \n See @ref ble_gap_evt_passkey_display_t. */ - BLE_GAP_EVT_KEY_PRESSED = BLE_GAP_EVT_BASE + 6, /**< Notification of a keypress on the remote device.\n See @ref ble_gap_evt_key_pressed_t */ - BLE_GAP_EVT_AUTH_KEY_REQUEST = BLE_GAP_EVT_BASE + 7, /**< Request to provide an authentication key. \n Reply with @ref sd_ble_gap_auth_key_reply. \n See @ref ble_gap_evt_auth_key_request_t. */ - BLE_GAP_EVT_LESC_DHKEY_REQUEST = BLE_GAP_EVT_BASE + 8, /**< Request to calculate an LE Secure Connections DHKey. \n Reply with @ref sd_ble_gap_lesc_dhkey_reply. \n See @ref ble_gap_evt_lesc_dhkey_request_t */ - BLE_GAP_EVT_AUTH_STATUS = BLE_GAP_EVT_BASE + 9, /**< Authentication procedure completed with status. \n See @ref ble_gap_evt_auth_status_t. */ - BLE_GAP_EVT_CONN_SEC_UPDATE = BLE_GAP_EVT_BASE + 10, /**< Connection security updated. \n See @ref ble_gap_evt_conn_sec_update_t. */ - BLE_GAP_EVT_TIMEOUT = BLE_GAP_EVT_BASE + 11, /**< Timeout expired. \n See @ref ble_gap_evt_timeout_t. */ - BLE_GAP_EVT_RSSI_CHANGED = BLE_GAP_EVT_BASE + 12, /**< RSSI report. \n See @ref ble_gap_evt_rssi_changed_t. */ - BLE_GAP_EVT_SEC_REQUEST = BLE_GAP_EVT_BASE + 14, /**< Security Request. \n See @ref ble_gap_evt_sec_request_t. */ - BLE_GAP_EVT_SCAN_REQ_REPORT = BLE_GAP_EVT_BASE + 16, /**< Scan request report. \n See @ref ble_gap_evt_scan_req_report_t. */ - BLE_GAP_EVT_PHY_UPDATE_REQUEST = BLE_GAP_EVT_BASE + 17, /**< PHY Update Request. \n Reply with @ref sd_ble_gap_phy_update. \n See @ref ble_gap_evt_phy_update_request_t. */ - BLE_GAP_EVT_PHY_UPDATE = BLE_GAP_EVT_BASE + 18, /**< PHY Update Procedure is complete. \n See @ref ble_gap_evt_phy_update_t. */ -}; - -/**@brief GAP Option IDs. - * IDs that uniquely identify a GAP option. - */ -enum BLE_GAP_OPTS -{ - BLE_GAP_OPT_CH_MAP = BLE_GAP_OPT_BASE, /**< Channel Map. @ref ble_gap_opt_ch_map_t */ - BLE_GAP_OPT_LOCAL_CONN_LATENCY = BLE_GAP_OPT_BASE + 1, /**< Local connection latency. @ref ble_gap_opt_local_conn_latency_t */ - BLE_GAP_OPT_PASSKEY = BLE_GAP_OPT_BASE + 2, /**< Set passkey. @ref ble_gap_opt_passkey_t */ - BLE_GAP_OPT_SCAN_REQ_REPORT = BLE_GAP_OPT_BASE + 3, /**< Scan request report. @ref ble_gap_opt_scan_req_report_t */ - BLE_GAP_OPT_AUTH_PAYLOAD_TIMEOUT = BLE_GAP_OPT_BASE + 5, /**< Set Authenticated payload timeout. @ref ble_gap_opt_auth_payload_timeout_t */ - BLE_GAP_OPT_SLAVE_LATENCY_DISABLE = BLE_GAP_OPT_BASE + 6, /**< Disable slave latency. @ref ble_gap_opt_slave_latency_disable_t */ -}; - -/**@brief GAP Configuration IDs. - * - * IDs that uniquely identify a GAP configuration. - */ -enum BLE_GAP_CFGS -{ - BLE_GAP_CFG_ROLE_COUNT = BLE_GAP_CFG_BASE, /**< Role count configuration. */ - BLE_GAP_CFG_DEVICE_NAME = BLE_GAP_CFG_BASE + 1, /**< Device name configuration. */ -}; - -/** @} */ - -/**@addtogroup BLE_GAP_DEFINES Defines - * @{ */ - -/**@defgroup BLE_ERRORS_GAP SVC return values specific to GAP - * @{ */ -#define BLE_ERROR_GAP_UUID_LIST_MISMATCH (NRF_GAP_ERR_BASE + 0x000) /**< UUID list does not contain an integral number of UUIDs. */ -#define BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST (NRF_GAP_ERR_BASE + 0x001) /**< Use of Whitelist not permitted with discoverable advertising. */ -#define BLE_ERROR_GAP_INVALID_BLE_ADDR (NRF_GAP_ERR_BASE + 0x002) /**< The upper two bits of the address do not correspond to the specified address type. */ -#define BLE_ERROR_GAP_WHITELIST_IN_USE (NRF_GAP_ERR_BASE + 0x003) /**< Attempt to modify the whitelist while already in use by another operation. */ -#define BLE_ERROR_GAP_DEVICE_IDENTITIES_IN_USE (NRF_GAP_ERR_BASE + 0x004) /**< Attempt to modify the device identity list while already in use by another operation. */ -#define BLE_ERROR_GAP_DEVICE_IDENTITIES_DUPLICATE (NRF_GAP_ERR_BASE + 0x005) /**< The device identity list contains entries with duplicate identity addresses. */ -/**@} */ - - -/**@defgroup BLE_GAP_ROLES GAP Roles - * @{ */ -#define BLE_GAP_ROLE_INVALID 0x0 /**< Invalid Role. */ -#define BLE_GAP_ROLE_PERIPH 0x1 /**< Peripheral Role. */ -/**@} */ - - -/**@defgroup BLE_GAP_TIMEOUT_SOURCES GAP Timeout sources - * @{ */ -#define BLE_GAP_TIMEOUT_SRC_ADVERTISING 0x00 /**< Advertising timeout. */ -#define BLE_GAP_TIMEOUT_SRC_CONN 0x02 /**< Connection timeout. */ -#define BLE_GAP_TIMEOUT_SRC_AUTH_PAYLOAD 0x03 /**< Authenticated payload timeout. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADDR_TYPES GAP Address types - * @{ */ -#define BLE_GAP_ADDR_TYPE_PUBLIC 0x00 /**< Public address. */ -#define BLE_GAP_ADDR_TYPE_RANDOM_STATIC 0x01 /**< Random static address. */ -#define BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE 0x02 /**< Random private resolvable address. */ -#define BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE 0x03 /**< Random private non-resolvable address. */ -/**@} */ - - -/**@brief The default interval in seconds at which a private address is refreshed. */ -#define BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S (900) /* 15 minutes. */ -/**@brief The maximum interval in seconds at which a private address can be refreshed. */ -#define BLE_GAP_MAX_PRIVATE_ADDR_CYCLE_INTERVAL_S (41400) /* 11 hours 30 minutes. */ - - -/** @brief BLE address length. */ -#define BLE_GAP_ADDR_LEN (6) - - -/**@defgroup BLE_GAP_PRIVACY_MODES Privacy modes - * @{ */ -#define BLE_GAP_PRIVACY_MODE_OFF 0x00 /**< Device will send and accept its identity address for its own address. */ -#define BLE_GAP_PRIVACY_MODE_DEVICE_PRIVACY 0x01 /**< Device will send and accept only private addresses for its own address. */ -#define BLE_GAP_PRIVACY_MODE_NETWORK_PRIVACY 0x02 /**< Device will send and accept only private addresses for its own address, - and will not accept a peer using identity address as sender address when - the peer IRK is exchanged, non-zero and added to the identity list. */ -/**@} */ - - -/**@defgroup BLE_GAP_AD_TYPE_DEFINITIONS GAP Advertising and Scan Response Data format - * @note Found at https://www.bluetooth.org/Technical/AssignedNumbers/generic_access_profile.htm - * @{ */ -#define BLE_GAP_AD_TYPE_FLAGS 0x01 /**< Flags for discoverability. */ -#define BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_MORE_AVAILABLE 0x02 /**< Partial list of 16 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_COMPLETE 0x03 /**< Complete list of 16 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_MORE_AVAILABLE 0x04 /**< Partial list of 32 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_COMPLETE 0x05 /**< Complete list of 32 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_MORE_AVAILABLE 0x06 /**< Partial list of 128 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_COMPLETE 0x07 /**< Complete list of 128 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_SHORT_LOCAL_NAME 0x08 /**< Short local device name. */ -#define BLE_GAP_AD_TYPE_COMPLETE_LOCAL_NAME 0x09 /**< Complete local device name. */ -#define BLE_GAP_AD_TYPE_TX_POWER_LEVEL 0x0A /**< Transmit power level. */ -#define BLE_GAP_AD_TYPE_CLASS_OF_DEVICE 0x0D /**< Class of device. */ -#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C 0x0E /**< Simple Pairing Hash C. */ -#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R 0x0F /**< Simple Pairing Randomizer R. */ -#define BLE_GAP_AD_TYPE_SECURITY_MANAGER_TK_VALUE 0x10 /**< Security Manager TK Value. */ -#define BLE_GAP_AD_TYPE_SECURITY_MANAGER_OOB_FLAGS 0x11 /**< Security Manager Out Of Band Flags. */ -#define BLE_GAP_AD_TYPE_SLAVE_CONNECTION_INTERVAL_RANGE 0x12 /**< Slave Connection Interval Range. */ -#define BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_16BIT 0x14 /**< List of 16-bit Service Solicitation UUIDs. */ -#define BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_128BIT 0x15 /**< List of 128-bit Service Solicitation UUIDs. */ -#define BLE_GAP_AD_TYPE_SERVICE_DATA 0x16 /**< Service Data - 16-bit UUID. */ -#define BLE_GAP_AD_TYPE_PUBLIC_TARGET_ADDRESS 0x17 /**< Public Target Address. */ -#define BLE_GAP_AD_TYPE_RANDOM_TARGET_ADDRESS 0x18 /**< Random Target Address. */ -#define BLE_GAP_AD_TYPE_APPEARANCE 0x19 /**< Appearance. */ -#define BLE_GAP_AD_TYPE_ADVERTISING_INTERVAL 0x1A /**< Advertising Interval. */ -#define BLE_GAP_AD_TYPE_LE_BLUETOOTH_DEVICE_ADDRESS 0x1B /**< LE Bluetooth Device Address. */ -#define BLE_GAP_AD_TYPE_LE_ROLE 0x1C /**< LE Role. */ -#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C256 0x1D /**< Simple Pairing Hash C-256. */ -#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R256 0x1E /**< Simple Pairing Randomizer R-256. */ -#define BLE_GAP_AD_TYPE_SERVICE_DATA_32BIT_UUID 0x20 /**< Service Data - 32-bit UUID. */ -#define BLE_GAP_AD_TYPE_SERVICE_DATA_128BIT_UUID 0x21 /**< Service Data - 128-bit UUID. */ -#define BLE_GAP_AD_TYPE_LESC_CONFIRMATION_VALUE 0x22 /**< LE Secure Connections Confirmation Value */ -#define BLE_GAP_AD_TYPE_LESC_RANDOM_VALUE 0x23 /**< LE Secure Connections Random Value */ -#define BLE_GAP_AD_TYPE_URI 0x24 /**< URI */ -#define BLE_GAP_AD_TYPE_3D_INFORMATION_DATA 0x3D /**< 3D Information Data. */ -#define BLE_GAP_AD_TYPE_MANUFACTURER_SPECIFIC_DATA 0xFF /**< Manufacturer Specific Data. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADV_FLAGS GAP Advertisement Flags - * @{ */ -#define BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE (0x01) /**< LE Limited Discoverable Mode. */ -#define BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE (0x02) /**< LE General Discoverable Mode. */ -#define BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED (0x04) /**< BR/EDR not supported. */ -#define BLE_GAP_ADV_FLAG_LE_BR_EDR_CONTROLLER (0x08) /**< Simultaneous LE and BR/EDR, Controller. */ -#define BLE_GAP_ADV_FLAG_LE_BR_EDR_HOST (0x10) /**< Simultaneous LE and BR/EDR, Host. */ -#define BLE_GAP_ADV_FLAGS_LE_ONLY_LIMITED_DISC_MODE (BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE | BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED) /**< LE Limited Discoverable Mode, BR/EDR not supported. */ -#define BLE_GAP_ADV_FLAGS_LE_ONLY_GENERAL_DISC_MODE (BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE | BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED) /**< LE General Discoverable Mode, BR/EDR not supported. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADV_INTERVALS GAP Advertising interval max and min - * @{ */ -#define BLE_GAP_ADV_INTERVAL_MIN 0x0020 /**< Minimum Advertising interval in 625 us units, i.e. 20 ms. */ -#define BLE_GAP_ADV_INTERVAL_MAX 0x4000 /**< Maximum Advertising interval in 625 us units, i.e. 10.24 s. */ - /**@} */ - - -/**@brief Maximum size of advertising data in octets. */ -#define BLE_GAP_ADV_MAX_SIZE (31) - - -/**@defgroup BLE_GAP_ADV_TYPES GAP Advertising types - * @{ */ -#define BLE_GAP_ADV_TYPE_ADV_IND 0x00 /**< Connectable undirected. */ -#define BLE_GAP_ADV_TYPE_ADV_DIRECT_IND 0x01 /**< Connectable directed. */ -#define BLE_GAP_ADV_TYPE_ADV_SCAN_IND 0x02 /**< Scannable undirected. */ -#define BLE_GAP_ADV_TYPE_ADV_NONCONN_IND 0x03 /**< Non connectable undirected. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADV_FILTER_POLICIES GAP Advertising filter policies - * @{ */ -#define BLE_GAP_ADV_FP_ANY 0x00 /**< Allow scan requests and connect requests from any device. */ -#define BLE_GAP_ADV_FP_FILTER_SCANREQ 0x01 /**< Filter scan requests with whitelist. */ -#define BLE_GAP_ADV_FP_FILTER_CONNREQ 0x02 /**< Filter connect requests with whitelist. */ -#define BLE_GAP_ADV_FP_FILTER_BOTH 0x03 /**< Filter both scan and connect requests with whitelist. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADV_TIMEOUT_VALUES GAP Advertising timeout values - * @{ */ -#define BLE_GAP_ADV_TIMEOUT_LIMITED_MAX (180) /**< Maximum advertising time in limited discoverable mode (TGAP(lim_adv_timeout) = 180 s). */ -#define BLE_GAP_ADV_TIMEOUT_GENERAL_UNLIMITED (0) /**< Unlimited advertising in general discoverable mode. */ -/**@} */ - - -/**@defgroup BLE_GAP_DISC_MODES GAP Discovery modes - * @{ */ -#define BLE_GAP_DISC_MODE_NOT_DISCOVERABLE 0x00 /**< Not discoverable discovery Mode. */ -#define BLE_GAP_DISC_MODE_LIMITED 0x01 /**< Limited Discovery Mode. */ -#define BLE_GAP_DISC_MODE_GENERAL 0x02 /**< General Discovery Mode. */ -/**@} */ - - -/**@defgroup BLE_GAP_IO_CAPS GAP IO Capabilities - * @{ */ -#define BLE_GAP_IO_CAPS_DISPLAY_ONLY 0x00 /**< Display Only. */ -#define BLE_GAP_IO_CAPS_DISPLAY_YESNO 0x01 /**< Display and Yes/No entry. */ -#define BLE_GAP_IO_CAPS_KEYBOARD_ONLY 0x02 /**< Keyboard Only. */ -#define BLE_GAP_IO_CAPS_NONE 0x03 /**< No I/O capabilities. */ -#define BLE_GAP_IO_CAPS_KEYBOARD_DISPLAY 0x04 /**< Keyboard and Display. */ -/**@} */ - - -/**@defgroup BLE_GAP_AUTH_KEY_TYPES GAP Authentication Key Types - * @{ */ -#define BLE_GAP_AUTH_KEY_TYPE_NONE 0x00 /**< No key (may be used to reject). */ -#define BLE_GAP_AUTH_KEY_TYPE_PASSKEY 0x01 /**< 6-digit Passkey. */ -#define BLE_GAP_AUTH_KEY_TYPE_OOB 0x02 /**< Out Of Band data. */ -/**@} */ - - -/**@defgroup BLE_GAP_KP_NOT_TYPES GAP Keypress Notification Types - * @{ */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_START 0x00 /**< Passkey entry started. */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_DIGIT_IN 0x01 /**< Passkey digit entered. */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_DIGIT_OUT 0x02 /**< Passkey digit erased. */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_CLEAR 0x03 /**< Passkey cleared. */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_END 0x04 /**< Passkey entry completed. */ -/**@} */ - - -/**@defgroup BLE_GAP_SEC_STATUS GAP Security status - * @{ */ -#define BLE_GAP_SEC_STATUS_SUCCESS 0x00 /**< Procedure completed with success. */ -#define BLE_GAP_SEC_STATUS_TIMEOUT 0x01 /**< Procedure timed out. */ -#define BLE_GAP_SEC_STATUS_PDU_INVALID 0x02 /**< Invalid PDU received. */ -#define BLE_GAP_SEC_STATUS_RFU_RANGE1_BEGIN 0x03 /**< Reserved for Future Use range #1 begin. */ -#define BLE_GAP_SEC_STATUS_RFU_RANGE1_END 0x80 /**< Reserved for Future Use range #1 end. */ -#define BLE_GAP_SEC_STATUS_PASSKEY_ENTRY_FAILED 0x81 /**< Passkey entry failed (user canceled or other). */ -#define BLE_GAP_SEC_STATUS_OOB_NOT_AVAILABLE 0x82 /**< Out of Band Key not available. */ -#define BLE_GAP_SEC_STATUS_AUTH_REQ 0x83 /**< Authentication requirements not met. */ -#define BLE_GAP_SEC_STATUS_CONFIRM_VALUE 0x84 /**< Confirm value failed. */ -#define BLE_GAP_SEC_STATUS_PAIRING_NOT_SUPP 0x85 /**< Pairing not supported. */ -#define BLE_GAP_SEC_STATUS_ENC_KEY_SIZE 0x86 /**< Encryption key size. */ -#define BLE_GAP_SEC_STATUS_SMP_CMD_UNSUPPORTED 0x87 /**< Unsupported SMP command. */ -#define BLE_GAP_SEC_STATUS_UNSPECIFIED 0x88 /**< Unspecified reason. */ -#define BLE_GAP_SEC_STATUS_REPEATED_ATTEMPTS 0x89 /**< Too little time elapsed since last attempt. */ -#define BLE_GAP_SEC_STATUS_INVALID_PARAMS 0x8A /**< Invalid parameters. */ -#define BLE_GAP_SEC_STATUS_DHKEY_FAILURE 0x8B /**< DHKey check failure. */ -#define BLE_GAP_SEC_STATUS_NUM_COMP_FAILURE 0x8C /**< Numeric Comparison failure. */ -#define BLE_GAP_SEC_STATUS_BR_EDR_IN_PROG 0x8D /**< BR/EDR pairing in progress. */ -#define BLE_GAP_SEC_STATUS_X_TRANS_KEY_DISALLOWED 0x8E /**< BR/EDR Link Key cannot be used for LE keys. */ -#define BLE_GAP_SEC_STATUS_RFU_RANGE2_BEGIN 0x8F /**< Reserved for Future Use range #2 begin. */ -#define BLE_GAP_SEC_STATUS_RFU_RANGE2_END 0xFF /**< Reserved for Future Use range #2 end. */ -/**@} */ - - -/**@defgroup BLE_GAP_SEC_STATUS_SOURCES GAP Security status sources - * @{ */ -#define BLE_GAP_SEC_STATUS_SOURCE_LOCAL 0x00 /**< Local failure. */ -#define BLE_GAP_SEC_STATUS_SOURCE_REMOTE 0x01 /**< Remote failure. */ -/**@} */ - - -/**@defgroup BLE_GAP_CP_LIMITS GAP Connection Parameters Limits - * @{ */ -#define BLE_GAP_CP_MIN_CONN_INTVL_NONE 0xFFFF /**< No new minimum connection interval specified in connect parameters. */ -#define BLE_GAP_CP_MIN_CONN_INTVL_MIN 0x0006 /**< Lowest minimum connection interval permitted, in units of 1.25 ms, i.e. 7.5 ms. */ -#define BLE_GAP_CP_MIN_CONN_INTVL_MAX 0x0C80 /**< Highest minimum connection interval permitted, in units of 1.25 ms, i.e. 4 s. */ -#define BLE_GAP_CP_MAX_CONN_INTVL_NONE 0xFFFF /**< No new maximum connection interval specified in connect parameters. */ -#define BLE_GAP_CP_MAX_CONN_INTVL_MIN 0x0006 /**< Lowest maximum connection interval permitted, in units of 1.25 ms, i.e. 7.5 ms. */ -#define BLE_GAP_CP_MAX_CONN_INTVL_MAX 0x0C80 /**< Highest maximum connection interval permitted, in units of 1.25 ms, i.e. 4 s. */ -#define BLE_GAP_CP_SLAVE_LATENCY_MAX 0x01F3 /**< Highest slave latency permitted, in connection events. */ -#define BLE_GAP_CP_CONN_SUP_TIMEOUT_NONE 0xFFFF /**< No new supervision timeout specified in connect parameters. */ -#define BLE_GAP_CP_CONN_SUP_TIMEOUT_MIN 0x000A /**< Lowest supervision timeout permitted, in units of 10 ms, i.e. 100 ms. */ -#define BLE_GAP_CP_CONN_SUP_TIMEOUT_MAX 0x0C80 /**< Highest supervision timeout permitted, in units of 10 ms, i.e. 32 s. */ -/**@} */ - - -/**@defgroup BLE_GAP_DEVNAME GAP device name defines. - * @{ */ -#define BLE_GAP_DEVNAME_DEFAULT "nRF5x" /**< Default device name value. */ -#define BLE_GAP_DEVNAME_DEFAULT_LEN 31 /**< Default number of octets in device name. */ -#define BLE_GAP_DEVNAME_MAX_LEN 248 /**< Maximum number of octets in device name. */ -/**@} */ - - -/**@brief Disable RSSI events for connections */ -#define BLE_GAP_RSSI_THRESHOLD_INVALID 0xFF - -/**@defgroup BLE_GAP_PHYS GAP PHYs - * @{ */ -#define BLE_GAP_PHY_AUTO 0x00 /**< Automatic PHY selection. Refer @ref sd_ble_gap_phy_update for more information.*/ -#define BLE_GAP_PHY_1MBPS 0x01 /**< 1 Mbps PHY. */ -#define BLE_GAP_PHY_2MBPS 0x02 /**< 2 Mbps PHY. */ -#define BLE_GAP_PHY_CODED 0x04 /**< Coded PHY. */ - -/**@} */ - -/**@defgroup BLE_GAP_CONN_SEC_MODE_SET_MACROS GAP attribute security requirement setters - * - * See @ref ble_gap_conn_sec_mode_t. - * @{ */ -/**@brief Set sec_mode pointed to by ptr to have no access rights.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_NO_ACCESS(ptr) do {(ptr)->sm = 0; (ptr)->lv = 0;} while(0) -/**@brief Set sec_mode pointed to by ptr to require no protection, open link.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_OPEN(ptr) do {(ptr)->sm = 1; (ptr)->lv = 1;} while(0) -/**@brief Set sec_mode pointed to by ptr to require encryption, but no MITM protection.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_ENC_NO_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 2;} while(0) -/**@brief Set sec_mode pointed to by ptr to require encryption and MITM protection.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_ENC_WITH_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 3;} while(0) -/**@brief Set sec_mode pointed to by ptr to require LESC encryption and MITM protection.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_LESC_ENC_WITH_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 4;} while(0) -/**@brief Set sec_mode pointed to by ptr to require signing or encryption, no MITM protection needed.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_SIGNED_NO_MITM(ptr) do {(ptr)->sm = 2; (ptr)->lv = 1;} while(0) -/**@brief Set sec_mode pointed to by ptr to require signing or encryption with MITM protection.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_SIGNED_WITH_MITM(ptr) do {(ptr)->sm = 2; (ptr)->lv = 2;} while(0) -/**@} */ - - -/**@brief GAP Security Random Number Length. */ -#define BLE_GAP_SEC_RAND_LEN 8 - - -/**@brief GAP Security Key Length. */ -#define BLE_GAP_SEC_KEY_LEN 16 - - -/**@brief GAP LE Secure Connections Elliptic Curve Diffie-Hellman P-256 Public Key Length. */ -#define BLE_GAP_LESC_P256_PK_LEN 64 - - -/**@brief GAP LE Secure Connections Elliptic Curve Diffie-Hellman DHKey Length. */ -#define BLE_GAP_LESC_DHKEY_LEN 32 - - -/**@brief GAP Passkey Length. */ -#define BLE_GAP_PASSKEY_LEN 6 - - -/**@brief Maximum amount of addresses in the whitelist. */ -#define BLE_GAP_WHITELIST_ADDR_MAX_COUNT (8) - - -/**@brief Maximum amount of identities in the device identities list. */ -#define BLE_GAP_DEVICE_IDENTITIES_MAX_COUNT (8) - - -/**@brief Default connection count for a configuration. */ -#define BLE_GAP_CONN_COUNT_DEFAULT (1) - - -/**@defgroup BLE_GAP_EVENT_LENGTH GAP event length defines. - * @{ */ -#define BLE_GAP_EVENT_LENGTH_MIN (2) /**< Minimum event length, in 1.25 ms units. */ -#define BLE_GAP_EVENT_LENGTH_DEFAULT (3) /**< Default event length, in 1.25 ms units. */ -/**@} */ - - -/**@defgroup BLE_GAP_ROLE_COUNT GAP concurrent connection count defines. - * @{ */ -#define BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT (1) /**< Default maximum number of connections concurrently acting as peripherals. */ -#define BLE_GAP_ROLE_COUNT_COMBINED_MAX (20) /**< Maximum supported number of concurrent connections in the peripheral roles. */ - -/**@} */ - - -/**@defgroup BLE_GAP_AUTH_PAYLOAD_TIMEOUT Authenticated payload timeout defines. - * @{ */ -#define BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MAX (48000) /**< Maximum authenticated payload timeout in 10 ms units, i.e. 8 minutes. */ -#define BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MIN (1) /**< Minimum authenticated payload timeout in 10 ms units, i.e. 10 ms. */ -/**@} */ - -/**@defgroup GAP_SEC_MODES GAP Security Modes - * @{ */ -#define BLE_GAP_SEC_MODE 0x00 /**< No key (may be used to reject). */ -/**@} */ -/** @} */ - - -/**@addtogroup BLE_GAP_STRUCTURES Structures - * @{ */ - -/**@brief Bluetooth Low Energy address. */ -typedef struct -{ - uint8_t addr_id_peer : 1; /**< Only valid for peer addresses. - Reference to peer in device identities list (as set with @ref sd_ble_gap_device_identities_set) when peer is using privacy. */ - uint8_t addr_type : 7; /**< See @ref BLE_GAP_ADDR_TYPES. */ - uint8_t addr[BLE_GAP_ADDR_LEN]; /**< 48-bit address, LSB format. */ -} ble_gap_addr_t; - - -/**@brief GAP connection parameters. - * - * @note When ble_conn_params_t is received in an event, both min_conn_interval and - * max_conn_interval will be equal to the connection interval set by the central. - * - * @note If both conn_sup_timeout and max_conn_interval are specified, then the following constraint applies: - * conn_sup_timeout * 4 > (1 + slave_latency) * max_conn_interval - * that corresponds to the following Bluetooth Spec requirement: - * The Supervision_Timeout in milliseconds shall be larger than - * (1 + Conn_Latency) * Conn_Interval_Max * 2, where Conn_Interval_Max is given in milliseconds. - */ -typedef struct -{ - uint16_t min_conn_interval; /**< Minimum Connection Interval in 1.25 ms units, see @ref BLE_GAP_CP_LIMITS.*/ - uint16_t max_conn_interval; /**< Maximum Connection Interval in 1.25 ms units, see @ref BLE_GAP_CP_LIMITS.*/ - uint16_t slave_latency; /**< Slave Latency in number of connection events, see @ref BLE_GAP_CP_LIMITS.*/ - uint16_t conn_sup_timeout; /**< Connection Supervision Timeout in 10 ms units, see @ref BLE_GAP_CP_LIMITS.*/ -} ble_gap_conn_params_t; - - -/**@brief GAP connection security modes. - * - * Security Mode 0 Level 0: No access permissions at all (this level is not defined by the Bluetooth Core specification).\n - * Security Mode 1 Level 1: No security is needed (aka open link).\n - * Security Mode 1 Level 2: Encrypted link required, MITM protection not necessary.\n - * Security Mode 1 Level 3: MITM protected encrypted link required.\n - * Security Mode 1 Level 4: LESC MITM protected encrypted link using a 128-bit strength encryption key required.\n - * Security Mode 2 Level 1: Signing or encryption required, MITM protection not necessary.\n - * Security Mode 2 Level 2: MITM protected signing required, unless link is MITM protected encrypted.\n - */ -typedef struct -{ - uint8_t sm : 4; /**< Security Mode (1 or 2), 0 for no permissions at all. */ - uint8_t lv : 4; /**< Level (1, 2, 3 or 4), 0 for no permissions at all. */ - -} ble_gap_conn_sec_mode_t; - - -/**@brief GAP connection security status.*/ -typedef struct -{ - ble_gap_conn_sec_mode_t sec_mode; /**< Currently active security mode for this connection.*/ - uint8_t encr_key_size; /**< Length of currently active encryption key, 7 to 16 octets (only applicable for bonding procedures). */ -} ble_gap_conn_sec_t; - -/**@brief Identity Resolving Key. */ -typedef struct -{ - uint8_t irk[BLE_GAP_SEC_KEY_LEN]; /**< Array containing IRK. */ -} ble_gap_irk_t; - - -/**@brief Channel mask for RF channels used in advertising. */ -typedef struct -{ - uint8_t ch_37_off : 1; /**< Setting this bit to 1 will turn off advertising on channel 37 */ - uint8_t ch_38_off : 1; /**< Setting this bit to 1 will turn off advertising on channel 38 */ - uint8_t ch_39_off : 1; /**< Setting this bit to 1 will turn off advertising on channel 39 */ -} ble_gap_adv_ch_mask_t; - - -/**@brief GAP advertising parameters. */ -typedef struct -{ - uint8_t type; /**< See @ref BLE_GAP_ADV_TYPES. */ - ble_gap_addr_t const *p_peer_addr; /**< Address of a known peer. - - When privacy is enabled and the local device use @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE addresses, the device identity list is searched for a matching - entry. If the local IRK for that device identity is set, the local IRK for that device will be used to generate the advertiser address field in the advertise packet. - - If type is @ref BLE_GAP_ADV_TYPE_ADV_DIRECT_IND, this must be set to the targeted initiator. If the initiator is in the device identity list, - the peer IRK for that device will be used to generate the initiator address field in the ADV_DIRECT_IND packet. */ - uint8_t fp; /**< Filter Policy, see @ref BLE_GAP_ADV_FILTER_POLICIES. */ - uint16_t interval; /**< Advertising interval between 0x0020 and 0x4000 in 0.625 ms units (20 ms to 10.24 s), see @ref BLE_GAP_ADV_INTERVALS. - - If type equals @ref BLE_GAP_ADV_TYPE_ADV_DIRECT_IND, this parameter must be set to 0 for high duty cycle directed advertising. - - If type equals @ref BLE_GAP_ADV_TYPE_ADV_DIRECT_IND, set @ref BLE_GAP_ADV_INTERVAL_MIN <= interval <= @ref BLE_GAP_ADV_INTERVAL_MAX for low duty cycle advertising.*/ - uint16_t timeout; /**< Advertising timeout between 0x0001 and 0x3FFF in seconds, 0x0000 disables timeout. See also @ref BLE_GAP_ADV_TIMEOUT_VALUES. If type equals @ref BLE_GAP_ADV_TYPE_ADV_DIRECT_IND, this parameter must be set to 0 for High duty cycle directed advertising. */ - ble_gap_adv_ch_mask_t channel_mask; /**< Advertising channel mask. See @ref ble_gap_adv_ch_mask_t. */ -} ble_gap_adv_params_t; - - -/**@brief Privacy. - * - * The privacy feature provides a way for the device to avoid being tracked over a period of time. - * The privacy feature, when enabled, hides the local device identity and replaces it with a private address - * that is automatically refreshed at a specified interval. - * - * If a device still wants to be recognized by other peers, it needs to share it's Identity Resolving Key (IRK). - * With this key, a device can generate a random private address that can only be recognized by peers in possession of that key, - * and devices can establish connections without revealing their real identities. - * - * Both network privacy (@ref BLE_GAP_PRIVACY_MODE_NETWORK_PRIVACY) and device privacy (@ref BLE_GAP_PRIVACY_MODE_DEVICE_PRIVACY) - * are supported. - * - * @note If the device IRK is updated, the new IRK becomes the one to be distributed in all - * bonding procedures performed after @ref sd_ble_gap_privacy_set returns. - * The IRK distributed during bonding procedure is the device IRK that is active when @ref sd_ble_gap_sec_params_reply is called. - */ -typedef struct -{ - uint8_t privacy_mode; /**< Privacy mode, see @ref BLE_GAP_PRIVACY_MODES. Default is @ref BLE_GAP_PRIVACY_MODE_OFF. */ - uint8_t private_addr_type; /**< The private address type must be either @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE or @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE. */ - uint16_t private_addr_cycle_s; /**< Private address cycle interval in seconds. Providing an address cycle value of 0 will use the default value defined by @ref BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S. */ - ble_gap_irk_t *p_device_irk; /**< When used as input, pointer to IRK structure that will be used as the default IRK. If NULL, the device default IRK will be used. - When used as output, pointer to IRK structure where the current default IRK will be written to. If NULL, this argument is ignored. - By default, the default IRK is used to generate random private resolvable addresses for the local device unless instructed otherwise. */ -} ble_gap_privacy_params_t; - - -/**@brief PHY preferences for TX and RX - * @note tx_phys and rx_phys are bit fields. Multiple bits can be set in them to indicate multiple preferred PHYs for each direction. - * @code - * p_gap_phys->tx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; - * p_gap_phys->rx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; - * @endcode - * - */ -typedef struct -{ - uint8_t tx_phys; /**< Preferred transmit PHYs, see @ref BLE_GAP_PHYS. */ - uint8_t rx_phys; /**< Preferred receive PHYs, see @ref BLE_GAP_PHYS. */ -} ble_gap_phys_t; - -/** @brief Keys that can be exchanged during a bonding procedure. */ -typedef struct -{ - uint8_t enc : 1; /**< Long Term Key and Master Identification. */ - uint8_t id : 1; /**< Identity Resolving Key and Identity Address Information. */ - uint8_t sign : 1; /**< Connection Signature Resolving Key. */ - uint8_t link : 1; /**< Derive the Link Key from the LTK. */ -} ble_gap_sec_kdist_t; - - -/**@brief GAP security parameters. */ -typedef struct -{ - uint8_t bond : 1; /**< Perform bonding. */ - uint8_t mitm : 1; /**< Enable Man In The Middle protection. */ - uint8_t lesc : 1; /**< Enable LE Secure Connection pairing. */ - uint8_t keypress : 1; /**< Enable generation of keypress notifications. */ - uint8_t io_caps : 3; /**< IO capabilities, see @ref BLE_GAP_IO_CAPS. */ - uint8_t oob : 1; /**< The OOB data flag. - - In LE legacy pairing, this flag is set if a device has out of band authentication data. - The OOB method is used if both of the devices have out of band authentication data. - - In LE Secure Connections pairing, this flag is set if a device has the peer device's out of band authentication data. - The OOB method is used if at least one device has the peer device's OOB data available. */ - uint8_t min_key_size; /**< Minimum encryption key size in octets between 7 and 16. If 0 then not applicable in this instance. */ - uint8_t max_key_size; /**< Maximum encryption key size in octets between min_key_size and 16. */ - ble_gap_sec_kdist_t kdist_own; /**< Key distribution bitmap: keys that the local device will distribute. */ - ble_gap_sec_kdist_t kdist_peer; /**< Key distribution bitmap: keys that the remote device will distribute. */ -} ble_gap_sec_params_t; - - -/**@brief GAP Encryption Information. */ -typedef struct -{ - uint8_t ltk[BLE_GAP_SEC_KEY_LEN]; /**< Long Term Key. */ - uint8_t lesc : 1; /**< Key generated using LE Secure Connections. */ - uint8_t auth : 1; /**< Authenticated Key. */ - uint8_t ltk_len : 6; /**< LTK length in octets. */ -} ble_gap_enc_info_t; - - -/**@brief GAP Master Identification. */ -typedef struct -{ - uint16_t ediv; /**< Encrypted Diversifier. */ - uint8_t rand[BLE_GAP_SEC_RAND_LEN]; /**< Random Number. */ -} ble_gap_master_id_t; - - -/**@brief GAP Signing Information. */ -typedef struct -{ - uint8_t csrk[BLE_GAP_SEC_KEY_LEN]; /**< Connection Signature Resolving Key. */ -} ble_gap_sign_info_t; - - -/**@brief GAP LE Secure Connections P-256 Public Key. */ -typedef struct -{ - uint8_t pk[BLE_GAP_LESC_P256_PK_LEN]; /**< LE Secure Connections Elliptic Curve Diffie-Hellman P-256 Public Key. Stored in the standard SMP protocol format: {X,Y} both in little-endian. */ -} ble_gap_lesc_p256_pk_t; - - -/**@brief GAP LE Secure Connections DHKey. */ -typedef struct -{ - uint8_t key[BLE_GAP_LESC_DHKEY_LEN]; /**< LE Secure Connections Elliptic Curve Diffie-Hellman Key. Stored in little-endian. */ -} ble_gap_lesc_dhkey_t; - - -/**@brief GAP LE Secure Connections OOB data. */ -typedef struct -{ - ble_gap_addr_t addr; /**< Bluetooth address of the device. */ - uint8_t r[BLE_GAP_SEC_KEY_LEN]; /**< Random Number. */ - uint8_t c[BLE_GAP_SEC_KEY_LEN]; /**< Confirm Value. */ -} ble_gap_lesc_oob_data_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_CONNECTED. */ -typedef struct -{ - ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 - and the address is the device's identity address. */ - uint8_t role; /**< BLE role for this connection, see @ref BLE_GAP_ROLES */ - ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ -} ble_gap_evt_connected_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_DISCONNECTED. */ -typedef struct -{ - uint8_t reason; /**< HCI error code, see @ref BLE_HCI_STATUS_CODES. */ -} ble_gap_evt_disconnected_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_CONN_PARAM_UPDATE. */ -typedef struct -{ - ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ -} ble_gap_evt_conn_param_update_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_PHY_UPDATE_REQUEST. */ -typedef struct -{ - ble_gap_phys_t peer_preferred_phys; /**< The PHYs the peer prefers to use. */ -} ble_gap_evt_phy_update_request_t; - -/**@brief Event Structure for @ref BLE_GAP_EVT_PHY_UPDATE. */ -typedef struct -{ - uint8_t status; /**< Status of the procedure, see @ref BLE_HCI_STATUS_CODES.*/ - uint8_t tx_phy; /**< TX PHY for this connection, see @ref BLE_GAP_PHYS. */ - uint8_t rx_phy; /**< RX PHY for this connection, see @ref BLE_GAP_PHYS. */ -} ble_gap_evt_phy_update_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST. */ -typedef struct -{ - ble_gap_sec_params_t peer_params; /**< Initiator Security Parameters. */ -} ble_gap_evt_sec_params_request_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_SEC_INFO_REQUEST. */ -typedef struct -{ - ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. */ - ble_gap_master_id_t master_id; /**< Master Identification for LTK lookup. */ - uint8_t enc_info : 1; /**< If 1, Encryption Information required. */ - uint8_t id_info : 1; /**< If 1, Identity Information required. */ - uint8_t sign_info : 1; /**< If 1, Signing Information required. */ -} ble_gap_evt_sec_info_request_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_PASSKEY_DISPLAY. */ -typedef struct -{ - uint8_t passkey[BLE_GAP_PASSKEY_LEN]; /**< 6-digit passkey in ASCII ('0'-'9' digits only). */ - uint8_t match_request : 1; /**< If 1 requires the application to report the match using @ref sd_ble_gap_auth_key_reply - with either @ref BLE_GAP_AUTH_KEY_TYPE_NONE if there is no match or - @ref BLE_GAP_AUTH_KEY_TYPE_PASSKEY if there is a match. */ -} ble_gap_evt_passkey_display_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_KEY_PRESSED. */ -typedef struct -{ - uint8_t kp_not; /**< Keypress notification type, see @ref BLE_GAP_KP_NOT_TYPES. */ -} ble_gap_evt_key_pressed_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_AUTH_KEY_REQUEST. */ -typedef struct -{ - uint8_t key_type; /**< See @ref BLE_GAP_AUTH_KEY_TYPES. */ -} ble_gap_evt_auth_key_request_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST. */ -typedef struct -{ - ble_gap_lesc_p256_pk_t *p_pk_peer; /**< LE Secure Connections remote P-256 Public Key. This will point to the application-supplied memory - inside the keyset during the call to @ref sd_ble_gap_sec_params_reply. */ - uint8_t oobd_req :1; /**< LESC OOB data required. A call to @ref sd_ble_gap_lesc_oob_data_set is required to complete the procedure. */ -} ble_gap_evt_lesc_dhkey_request_t; - - -/**@brief Security levels supported. - * @note See Bluetooth Specification Version 4.2 Volume 3, Part C, Chapter 10, Section 10.2.1. -*/ -typedef struct -{ - uint8_t lv1 : 1; /**< If 1: Level 1 is supported. */ - uint8_t lv2 : 1; /**< If 1: Level 2 is supported. */ - uint8_t lv3 : 1; /**< If 1: Level 3 is supported. */ - uint8_t lv4 : 1; /**< If 1: Level 4 is supported. */ -} ble_gap_sec_levels_t; - - -/**@brief Encryption Key. */ -typedef struct -{ - ble_gap_enc_info_t enc_info; /**< Encryption Information. */ - ble_gap_master_id_t master_id; /**< Master Identification. */ -} ble_gap_enc_key_t; - - -/**@brief Identity Key. */ -typedef struct -{ - ble_gap_irk_t id_info; /**< Identity Resolving Key. */ - ble_gap_addr_t id_addr_info; /**< Identity Address. */ -} ble_gap_id_key_t; - - -/**@brief Security Keys. */ -typedef struct -{ - ble_gap_enc_key_t *p_enc_key; /**< Encryption Key, or NULL. */ - ble_gap_id_key_t *p_id_key; /**< Identity Key, or NULL. */ - ble_gap_sign_info_t *p_sign_key; /**< Signing Key, or NULL. */ - ble_gap_lesc_p256_pk_t *p_pk; /**< LE Secure Connections P-256 Public Key. When in debug mode the application must use the value defined - in the Core Bluetooth Specification v4.2 Vol.3, Part H, Section 2.3.5.6.1 */ -} ble_gap_sec_keys_t; - - -/**@brief Security key set for both local and peer keys. */ -typedef struct -{ - ble_gap_sec_keys_t keys_own; /**< Keys distributed by the local device. For LE Secure Connections the encryption key will be generated locally and will always be stored if bonding. */ - ble_gap_sec_keys_t keys_peer; /**< Keys distributed by the remote device. For LE Secure Connections, p_enc_key must always be NULL. */ -} ble_gap_sec_keyset_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_AUTH_STATUS. */ -typedef struct -{ - uint8_t auth_status; /**< Authentication status, see @ref BLE_GAP_SEC_STATUS. */ - uint8_t error_src : 2; /**< On error, source that caused the failure, see @ref BLE_GAP_SEC_STATUS_SOURCES. */ - uint8_t bonded : 1; /**< Procedure resulted in a bond. */ - uint8_t lesc : 1; /**< Procedure resulted in a LE Secure Connection. */ - ble_gap_sec_levels_t sm1_levels; /**< Levels supported in Security Mode 1. */ - ble_gap_sec_levels_t sm2_levels; /**< Levels supported in Security Mode 2. */ - ble_gap_sec_kdist_t kdist_own; /**< Bitmap stating which keys were exchanged (distributed) by the local device. If bonding with LE Secure Connections, the enc bit will be always set. */ - ble_gap_sec_kdist_t kdist_peer; /**< Bitmap stating which keys were exchanged (distributed) by the remote device. If bonding with LE Secure Connections, the enc bit will never be set. */ -} ble_gap_evt_auth_status_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_CONN_SEC_UPDATE. */ -typedef struct -{ - ble_gap_conn_sec_t conn_sec; /**< Connection security level. */ -} ble_gap_evt_conn_sec_update_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_TIMEOUT. */ -typedef struct -{ - uint8_t src; /**< Source of timeout event, see @ref BLE_GAP_TIMEOUT_SOURCES. */ -} ble_gap_evt_timeout_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_RSSI_CHANGED. */ -typedef struct -{ - int8_t rssi; /**< Received Signal Strength Indication in dBm. */ -} ble_gap_evt_rssi_changed_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_SEC_REQUEST. */ -typedef struct -{ - uint8_t bond : 1; /**< Perform bonding. */ - uint8_t mitm : 1; /**< Man In The Middle protection requested. */ - uint8_t lesc : 1; /**< LE Secure Connections requested. */ - uint8_t keypress : 1; /**< Generation of keypress notifications requested. */ -} ble_gap_evt_sec_request_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_SCAN_REQ_REPORT. */ -typedef struct -{ - int8_t rssi; /**< Received Signal Strength Indication in dBm. */ - ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 - and the address is the device's identity address. */ -} ble_gap_evt_scan_req_report_t; - - -/**@brief GAP event structure. */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle on which event occurred. */ - union /**< union alternative identified by evt_id in enclosing struct. */ - { - ble_gap_evt_connected_t connected; /**< Connected Event Parameters. */ - ble_gap_evt_disconnected_t disconnected; /**< Disconnected Event Parameters. */ - ble_gap_evt_conn_param_update_t conn_param_update; /**< Connection Parameter Update Parameters. */ - ble_gap_evt_sec_params_request_t sec_params_request; /**< Security Parameters Request Event Parameters. */ - ble_gap_evt_sec_info_request_t sec_info_request; /**< Security Information Request Event Parameters. */ - ble_gap_evt_passkey_display_t passkey_display; /**< Passkey Display Event Parameters. */ - ble_gap_evt_key_pressed_t key_pressed; /**< Key Pressed Event Parameters. */ - ble_gap_evt_auth_key_request_t auth_key_request; /**< Authentication Key Request Event Parameters. */ - ble_gap_evt_lesc_dhkey_request_t lesc_dhkey_request; /**< LE Secure Connections DHKey calculation request. */ - ble_gap_evt_auth_status_t auth_status; /**< Authentication Status Event Parameters. */ - ble_gap_evt_conn_sec_update_t conn_sec_update; /**< Connection Security Update Event Parameters. */ - ble_gap_evt_timeout_t timeout; /**< Timeout Event Parameters. */ - ble_gap_evt_rssi_changed_t rssi_changed; /**< RSSI Event Parameters. */ - ble_gap_evt_sec_request_t sec_request; /**< Security Request Event Parameters. */ - ble_gap_evt_scan_req_report_t scan_req_report; /**< Scan Request Report Parameters. */ - ble_gap_evt_phy_update_request_t phy_update_request; /**< PHY Update Request Event Parameters. */ - ble_gap_evt_phy_update_t phy_update; /**< PHY Update Parameters. */ - } params; /**< Event Parameters. */ -} ble_gap_evt_t; - - -/** - * @brief BLE GAP connection configuration parameters, set with @ref sd_ble_cfg_set. - * - * @retval ::NRF_ERROR_CONN_COUNT The connection count for the connection configurations is zero. - * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: - * - The sum of conn_count for all connection configurations combined exceeds UINT8_MAX. - * - The event length is smaller than @ref BLE_GAP_EVENT_LENGTH_MIN. - */ -typedef struct -{ - uint8_t conn_count; /**< The number of concurrent connections the application can create with this configuration. - The default and minimum value is @ref BLE_GAP_CONN_COUNT_DEFAULT. */ - uint16_t event_length; /**< The time set aside for this connection on every connection interval in 1.25 ms units. - The default value is @ref BLE_GAP_EVENT_LENGTH_DEFAULT, the minimum value is @ref BLE_GAP_EVENT_LENGTH_MIN. - The event length and the connection interval are the primary parameters - for setting the throughput of a connection. - See the SoftDevice Specification for details on throughput. */ -} ble_gap_conn_cfg_t; - - -/** - * @brief Configuration of maximum concurrent connections in the peripheral role, set with - * @ref sd_ble_cfg_set. - * - * @retval ::NRF_ERROR_CONN_COUNT The periph_role_count is too large. The maximum - * supported sum of concurrent connections is - * @ref BLE_GAP_ROLE_COUNT_COMBINED_MAX. - */ -typedef struct -{ - uint8_t periph_role_count; /**< Maximum number of connections concurrently acting as a peripheral. Default value is @ref BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT. */ -} ble_gap_cfg_role_count_t; - - -/** - * @brief Device name and its properties, set with @ref sd_ble_cfg_set. - * - * @note If the device name is not configured, the default device name will be - * @ref BLE_GAP_DEVNAME_DEFAULT, the maximum device name length will be - * @ref BLE_GAP_DEVNAME_DEFAULT_LEN, vloc will be set to @ref BLE_GATTS_VLOC_STACK and the device name - * will have no write access. - * - * @note If @ref max_len is more than @ref BLE_GAP_DEVNAME_DEFAULT_LEN and vloc is set to @ref BLE_GATTS_VLOC_STACK, - * the attribute table size must be increased to have room for the longer device name (see - * @ref sd_ble_cfg_set and @ref ble_gatts_cfg_attr_tab_size_t). - * - * @note If vloc is @ref BLE_GATTS_VLOC_STACK : - * - p_value must point to non-volatile memory (flash) or be NULL. - * - If p_value is NULL, the device name will initially be empty. - * - * @note If vloc is @ref BLE_GATTS_VLOC_USER : - * - p_value cannot be NULL. - * - If the device name is writable, p_value must point to volatile memory (RAM). - * - * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: - * - Invalid device name location (vloc). - * - Invalid device name security mode. - * @retval ::NRF_ERROR_INVALID_LENGTH One or more of the following is true: - * - The device name length is invalid (must be between 0 and @ref BLE_GAP_DEVNAME_MAX_LEN). - * - The device name length is too long for the given Attribute Table. - * @retval ::NRF_ERROR_NOT_SUPPORTED Device name security mode is not supported. - */ -typedef struct -{ - ble_gap_conn_sec_mode_t write_perm; /**< Write permissions. */ - uint8_t vloc:2; /**< Value location, see @ref BLE_GATTS_VLOCS.*/ - uint8_t *p_value; /**< Pointer to where the value (device name) is stored or will be stored. */ - uint16_t current_len; /**< Current length in bytes of the memory pointed to by p_value.*/ - uint16_t max_len; /**< Maximum length in bytes of the memory pointed to by p_value.*/ -} ble_gap_cfg_device_name_t; - - -/**@brief Configuration structure for GAP configurations. */ -typedef union -{ - ble_gap_cfg_role_count_t role_count_cfg; /**< Role count configuration, cfg_id is @ref BLE_GAP_CFG_ROLE_COUNT. */ - ble_gap_cfg_device_name_t device_name_cfg; /**< Device name configuration, cfg_id is @ref BLE_GAP_CFG_DEVICE_NAME. */ -} ble_gap_cfg_t; - - -/**@brief Channel Map option. - * Used with @ref sd_ble_opt_get to get the current channel map - * or @ref sd_ble_opt_set to set a new channel map. When setting the - * channel map, it applies to all current and future connections. When getting the - * current channel map, it applies to a single connection and the connection handle - * must be supplied. - * - * @note Setting the channel map may take some time, depending on connection parameters. - * The time taken may be different for each connection and the get operation will - * return the previous channel map until the new one has taken effect. - * - * @note After setting the channel map, by spec it can not be set again until at least 1 s has passed. - * See Bluetooth Specification Version 4.1 Volume 2, Part E, Section 7.3.46. - * - * @retval ::NRF_SUCCESS Get or set successful. - * @retval ::NRF_ERROR_BUSY Channel map was set again before enough time had passed. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied for get. - * @retval ::NRF_ERROR_NOT_SUPPORTED Returned by sd_ble_opt_set in peripheral-only SoftDevices. - * - */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle (only applicable for get) */ - uint8_t ch_map[5]; /**< Channel Map (37-bit). */ -} ble_gap_opt_ch_map_t; - - -/**@brief Local connection latency option. - * - * Local connection latency is a feature which enables the slave to improve - * current consumption by ignoring the slave latency set by the peer. The - * local connection latency can only be set to a multiple of the slave latency, - * and cannot be longer than half of the supervision timeout. - * - * Used with @ref sd_ble_opt_set to set the local connection latency. The - * @ref sd_ble_opt_get is not supported for this option, but the actual - * local connection latency (unless set to NULL) is set as a return parameter - * when setting the option. - * - * @note The latency set will be truncated down to the closest slave latency event - * multiple, or the nearest multiple before half of the supervision timeout. - * - * @note The local connection latency is disabled by default, and needs to be enabled for new - * connections and whenever the connection is updated. - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_NOT_SUPPORTED Get is not supported. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. - */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle */ - uint16_t requested_latency; /**< Requested local connection latency. */ - uint16_t * p_actual_latency; /**< Pointer to storage for the actual local connection latency (can be set to NULL to skip return value). */ -} ble_gap_opt_local_conn_latency_t; - -/**@brief Disable slave latency - * - * Used with @ref sd_ble_opt_set to temporarily disable slave latency of a peripheral connection (see @ref ble_gap_conn_params_t::slave_latency). And to re-enable it again. - * When disabled, the peripheral will ignore the slave_latency set by the central. - * - * @note Shall only be called on peripheral links. - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_NOT_SUPPORTED Get is not supported. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. - */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle */ - uint8_t disable : 1; /**< Set to 1 to disable slave latency. Set to 0 enable it again.*/ -} ble_gap_opt_slave_latency_disable_t; - -/**@brief Passkey Option. - * - * Structure containing the passkey to be used during pairing. This can be used with @ref - * sd_ble_opt_set to make the SoftDevice use a preprogrammed passkey for authentication - * instead of generating a random one. - * - * @note Repeated pairing attempts using the same preprogrammed passkey makes pairing vulnerable to MITM attacks. - * - * @note @ref sd_ble_opt_get is not supported for this option. - * - */ -typedef struct -{ - uint8_t const * p_passkey; /**< Pointer to 6-digit ASCII string (digit 0..9 only, no NULL termination) passkey to be used during pairing. If this is NULL, the SoftDevice will generate a random passkey if required.*/ -} ble_gap_opt_passkey_t; - - -/**@brief Scan request report option. - * - * This can be used with @ref sd_ble_opt_set to make the SoftDevice send - * @ref BLE_GAP_EVT_SCAN_REQ_REPORT events. - * - * @note Due to the limited space reserved for scan request report events, - * not all received scan requests will be reported. - * - * @note If whitelisting is used, only whitelisted requests are reported. - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_INVALID_STATE When advertising is ongoing while the option is set. - */ -typedef struct -{ - uint8_t enable : 1; /**< Enable scan request reports. */ -} ble_gap_opt_scan_req_report_t; - - -/**@brief Authenticated payload timeout option. - * - * This can be used with @ref sd_ble_opt_set to change the Authenticated payload timeout to a value other - * than the default of @ref BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MAX. - * - * @note The authenticated payload timeout event ::BLE_GAP_TIMEOUT_SRC_AUTH_PAYLOAD will be generated - * if auth_payload_timeout time has elapsed without receiving a packet with a valid MIC on an encrypted - * link. - * - * @note The LE ping procedure will be initiated before the timer expires to give the peer a chance - * to reset the timer. In addition the stack will try to prioritize running of LE ping over other - * activities to increase chances of finishing LE ping before timer expires. To avoid side-effects - * on other activities, it is recommended to use high timeout values. - * Recommended timeout > 2*(connInterval * (6 + connSlaveLatency)). - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. auth_payload_timeout was outside of allowed range. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. - */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle */ - uint16_t auth_payload_timeout; /**< Requested timeout in 10 ms unit, see @ref BLE_GAP_AUTH_PAYLOAD_TIMEOUT. */ -} ble_gap_opt_auth_payload_timeout_t; - - -/**@brief Option structure for GAP options. */ -typedef union -{ - ble_gap_opt_ch_map_t ch_map; /**< Parameters for the Channel Map option. */ - ble_gap_opt_local_conn_latency_t local_conn_latency; /**< Parameters for the Local connection latency option */ - ble_gap_opt_passkey_t passkey; /**< Parameters for the Passkey option.*/ - ble_gap_opt_scan_req_report_t scan_req_report; /**< Parameters for the scan request report option.*/ - ble_gap_opt_auth_payload_timeout_t auth_payload_timeout; /**< Parameters for the authenticated payload timeout option.*/ - ble_gap_opt_slave_latency_disable_t slave_latency_disable; /**< Parameters for the Disable slave latency option */ -} ble_gap_opt_t; -/**@} */ - - -/**@addtogroup BLE_GAP_FUNCTIONS Functions - * @{ */ - -/**@brief Set the local Bluetooth identity address. - * - * The local Bluetooth identity address is the address that identifies this device to other peers. - * The address type must be either @ref BLE_GAP_ADDR_TYPE_PUBLIC or @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC. - * - * @note The identity address cannot be changed while advertising. - * - * @note This address will be distributed to the peer during bonding. - * If the address changes, the address stored in the peer device will not be valid and the ability to - * reconnect using the old address will be lost. - * - * @note By default the SoftDevice will set an address of type @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC upon being - * enabled. The address is a random number populated during the IC manufacturing process and remains unchanged - * for the lifetime of each IC. - * - * @mscs - * @mmsc{@ref BLE_GAP_ADV_MSC} - * @endmscs - * - * @param[in] p_addr Pointer to address structure. - * - * @retval ::NRF_SUCCESS Address successfully set. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::NRF_ERROR_INVALID_STATE The identity address cannot be changed while advertising. - */ -SVCALL(SD_BLE_GAP_ADDR_SET, uint32_t, sd_ble_gap_addr_set(ble_gap_addr_t const *p_addr)); - - -/**@brief Get local Bluetooth identity address. - * - * @note This will always return the identity address irrespective of the privacy settings, - * i.e. the address type will always be either @ref BLE_GAP_ADDR_TYPE_PUBLIC or @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC. - * - * @param[out] p_addr Pointer to address structure to be filled in. - * - * @retval ::NRF_SUCCESS Address successfully retrieved. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. - */ -SVCALL(SD_BLE_GAP_ADDR_GET, uint32_t, sd_ble_gap_addr_get(ble_gap_addr_t *p_addr)); - - -/**@brief Set the active whitelist in the SoftDevice. - * - * @note Only one whitelist can be used at a time and the whitelist is shared between the BLE roles. - * The whitelist cannot be set if a BLE role is using the whitelist. - * - * @note If an address is resolved using the information in the device identity list, then the whitelist - * filter policy applies to the peer identity address and not the resolvable address sent on air. - * - * @param[in] pp_wl_addrs Pointer to a whitelist of peer addresses, if NULL the whitelist will be cleared. - * @param[in] len Length of the whitelist, maximum @ref BLE_GAP_WHITELIST_ADDR_MAX_COUNT. - * - * @retval ::NRF_SUCCESS The whitelist is successfully set/cleared. - * @retval ::NRF_ERROR_INVALID_ADDR The whitelist (or one of its entries) provided is invalid. - * @retval ::BLE_ERROR_GAP_WHITELIST_IN_USE The whitelist is in use by a BLE role and cannot be set or cleared. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. - * @retval ::NRF_ERROR_DATA_SIZE The given whitelist size is invalid (zero or too large); this can only return when - * pp_wl_addrs is not NULL. - */ -SVCALL(SD_BLE_GAP_WHITELIST_SET, uint32_t, sd_ble_gap_whitelist_set(ble_gap_addr_t const * const * pp_wl_addrs, uint8_t len)); - - -/**@brief Set device identity list. - * - * @note Only one device identity list can be used at a time and the list is shared between the BLE roles. - * The device identity list cannot be set if a BLE role is using the list. - * - * @param[in] pp_id_keys Pointer to an array of peer identity addresses and peer IRKs, if NULL the device identity list will be cleared. - * @param[in] pp_local_irks Pointer to an array of local IRKs. Each entry in the array maps to the entry in pp_id_keys at the same index. - * To fill in the list with the currently set device IRK for all peers, set to NULL. - * @param[in] len Length of the device identity list, maximum @ref BLE_GAP_DEVICE_IDENTITIES_MAX_COUNT. - * - * @mscs - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_CONN_PRIV_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS The device identity list successfully set/cleared. - * @retval ::NRF_ERROR_INVALID_ADDR The device identity list (or one of its entries) provided is invalid. - * This code may be returned if the local IRK list also has an invalid entry. - * @retval ::BLE_ERROR_GAP_DEVICE_IDENTITIES_IN_USE The device identity list is in use and cannot be set or cleared. - * @retval ::BLE_ERROR_GAP_DEVICE_IDENTITIES_DUPLICATE The device identity list contains multiple entries with the same identity address. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. - * @retval ::NRF_ERROR_DATA_SIZE The given device identity list size invalid (zero or too large); this can - * only return when pp_id_keys is not NULL. - */ -SVCALL(SD_BLE_GAP_DEVICE_IDENTITIES_SET, uint32_t, sd_ble_gap_device_identities_set(ble_gap_id_key_t const * const * pp_id_keys, ble_gap_irk_t const * const * pp_local_irks, uint8_t len)); - - -/**@brief Set privacy settings. - * - * @note Privacy settings cannot be changed while advertising. - * - * @param[in] p_privacy_params Privacy settings. - * - * @mscs - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. - * @retval ::NRF_ERROR_INVALID_ADDR The pointer to privacy settings is NULL or invalid. - * Otherwise, the p_device_irk pointer in privacy parameter is an invalid pointer. - * @retval ::NRF_ERROR_INVALID_PARAM Out of range parameters are provided. - * @retval ::NRF_ERROR_INVALID_STATE Privacy settings cannot be changed while advertising. - */ -SVCALL(SD_BLE_GAP_PRIVACY_SET, uint32_t, sd_ble_gap_privacy_set(ble_gap_privacy_params_t const *p_privacy_params)); - - -/**@brief Get privacy settings. - * - * @note ::ble_gap_privacy_params_t::p_device_irk must be initialized to NULL or a valid address before this function is called. - * If it is initialized to a valid address, the address pointed to will contain the current device IRK on return. - * - * @param[in,out] p_privacy_params Privacy settings. - * - * @retval ::NRF_SUCCESS Privacy settings read. - * @retval ::NRF_ERROR_INVALID_ADDR The pointer given for returning the privacy settings may be NULL or invalid. - * Otherwise, the p_device_irk pointer in privacy parameter is an invalid pointer. - */ -SVCALL(SD_BLE_GAP_PRIVACY_GET, uint32_t, sd_ble_gap_privacy_get(ble_gap_privacy_params_t *p_privacy_params)); - - -/**@brief Set, clear or update advertising and scan response data. - * - * @note The format of the advertising data will be checked by this call to ensure interoperability. - * Limitations imposed by this API call to the data provided include having a flags data type in the scan response data and - * duplicating the local name in the advertising data and scan response data. - * - * @note To clear the advertising data and set it to a 0-length packet, simply provide a valid pointer (p_data/p_sr_data) with its corresponding - * length (dlen/srdlen) set to 0. - * - * @note The call will fail if p_data and p_sr_data are both NULL since this would have no effect. - * - * @mscs - * @mmsc{@ref BLE_GAP_ADV_MSC} - * @endmscs - * - * @param[in] p_data Raw data to be placed in advertising packet. If NULL, no changes are made to the current advertising packet data. - * @param[in] dlen Data length for p_data. Max size: @ref BLE_GAP_ADV_MAX_SIZE octets. Should be 0 if p_data is NULL, can be 0 if p_data is not NULL. - * @param[in] p_sr_data Raw data to be placed in scan response packet. If NULL, no changes are made to the current scan response packet data. - * @param[in] srdlen Data length for p_sr_data. Max size: @ref BLE_GAP_ADV_MAX_SIZE octets. Should be 0 if p_sr_data is NULL, can be 0 if p_data is not NULL. - * - * @retval ::NRF_SUCCESS Advertising data successfully updated or cleared. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, both p_data and p_sr_data cannot be NULL. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_FLAGS Invalid combination of advertising flags supplied. - * @retval ::NRF_ERROR_INVALID_DATA Invalid data type(s) supplied, check the advertising data format specification. - * @retval ::NRF_ERROR_INVALID_LENGTH Invalid data length(s) supplied. - * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported data type. - * @retval ::BLE_ERROR_GAP_UUID_LIST_MISMATCH Invalid UUID list supplied. - */ -SVCALL(SD_BLE_GAP_ADV_DATA_SET, uint32_t, sd_ble_gap_adv_data_set(uint8_t const *p_data, uint8_t dlen, uint8_t const *p_sr_data, uint8_t srdlen)); - - -/**@brief Start advertising (GAP Discoverable, Connectable modes, Broadcast Procedure). - * - * @note Only one advertiser may be active at any time. - * - * @events - * @event{@ref BLE_GAP_EVT_CONNECTED, Generated after connection has been established through connectable advertising.} - * @event{@ref BLE_GAP_EVT_TIMEOUT, Advertisement has timed out.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_ADV_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_CONN_PRIV_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} - * @endmscs - * - * @param[in] p_adv_params Pointer to advertising parameters structure. - * @param[in] conn_cfg_tag Tag identifying a configuration set by @ref sd_ble_cfg_set or - * @ref BLE_CONN_CFG_TAG_DEFAULT to use the default connection configuration. If - * @ref ble_gap_adv_params_t::type is @ref BLE_GAP_ADV_TYPE_ADV_NONCONN_IND, - * this is ignored. - * - * @retval ::NRF_SUCCESS The BLE stack has started advertising. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_CONN_COUNT The limit of available connections has been reached; connectable advertiser cannot be started. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check the accepted ranges and limits. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid Bluetooth address supplied. - * @retval ::BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST Discoverable mode and whitelist incompatible. - * @retval ::NRF_ERROR_RESOURCES Not enough BLE role slots available. - * Stop one or more currently active roles (Peripheral or Broadcaster) and try again - */ -SVCALL(SD_BLE_GAP_ADV_START, uint32_t, sd_ble_gap_adv_start(ble_gap_adv_params_t const *p_adv_params, uint8_t conn_cfg_tag)); - - -/**@brief Stop advertising (GAP Discoverable, Connectable modes, Broadcast Procedure). - * - * @mscs - * @mmsc{@ref BLE_GAP_ADV_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS The BLE stack has stopped advertising. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation (most probably not in advertising state). - */ -SVCALL(SD_BLE_GAP_ADV_STOP, uint32_t, sd_ble_gap_adv_stop(void)); - - - -/**@brief Update connection parameters. - * - * @details In the peripheral role, this will send the corresponding L2CAP request and wait for - * the central to perform the procedure. Regardless of success or failure, the application - * will be informed of the result with a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE event. - * - * @events - * @event{@ref BLE_GAP_EVT_CONN_PARAM_UPDATE, Result of the connection parameter update procedure.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CPU_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_conn_params Pointer to desired connection parameters. If NULL is provided on a peripheral role, - * the parameters in the PPCP characteristic of the GAP service will be used instead. - * - * @retval ::NRF_SUCCESS The Connection Update procedure has been started successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_BUSY Procedure already in progress, wait for pending procedures to complete and retry. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - */ -SVCALL(SD_BLE_GAP_CONN_PARAM_UPDATE, uint32_t, sd_ble_gap_conn_param_update(uint16_t conn_handle, ble_gap_conn_params_t const *p_conn_params)); - - -/**@brief Disconnect (GAP Link Termination). - * - * @details This call initiates the disconnection procedure, and its completion will be communicated to the application - * with a @ref BLE_GAP_EVT_DISCONNECTED event. - * - * @events - * @event{@ref BLE_GAP_EVT_DISCONNECTED, Generated when disconnection procedure is complete.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CONN_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] hci_status_code HCI status code, see @ref BLE_HCI_STATUS_CODES (accepted values are @ref BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION and @ref BLE_HCI_CONN_INTERVAL_UNACCEPTABLE). - * - * @retval ::NRF_SUCCESS The disconnection procedure has been started successfully. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation (disconnection is already in progress). - */ -SVCALL(SD_BLE_GAP_DISCONNECT, uint32_t, sd_ble_gap_disconnect(uint16_t conn_handle, uint8_t hci_status_code)); - - -/**@brief Set the radio's transmit power. - * - * @param[in] tx_power Radio transmit power in dBm (accepted values are -40, -20, -16, -12, -8, -4, 0, 3, and 4 dBm). - * - * @retval ::NRF_SUCCESS Successfully changed the transmit power. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - */ -SVCALL(SD_BLE_GAP_TX_POWER_SET, uint32_t, sd_ble_gap_tx_power_set(int8_t tx_power)); - - -/**@brief Set GAP Appearance value. - * - * @param[in] appearance Appearance (16-bit), see @ref BLE_APPEARANCES. - * - * @retval ::NRF_SUCCESS Appearance value set successfully. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - */ -SVCALL(SD_BLE_GAP_APPEARANCE_SET, uint32_t, sd_ble_gap_appearance_set(uint16_t appearance)); - - -/**@brief Get GAP Appearance value. - * - * @param[out] p_appearance Pointer to appearance (16-bit) to be filled in, see @ref BLE_APPEARANCES. - * - * @retval ::NRF_SUCCESS Appearance value retrieved successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - */ -SVCALL(SD_BLE_GAP_APPEARANCE_GET, uint32_t, sd_ble_gap_appearance_get(uint16_t *p_appearance)); - - -/**@brief Set GAP Peripheral Preferred Connection Parameters. - * - * @param[in] p_conn_params Pointer to a @ref ble_gap_conn_params_t structure with the desired parameters. - * - * @retval ::NRF_SUCCESS Peripheral Preferred Connection Parameters set successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - */ -SVCALL(SD_BLE_GAP_PPCP_SET, uint32_t, sd_ble_gap_ppcp_set(ble_gap_conn_params_t const *p_conn_params)); - - -/**@brief Get GAP Peripheral Preferred Connection Parameters. - * - * @param[out] p_conn_params Pointer to a @ref ble_gap_conn_params_t structure where the parameters will be stored. - * - * @retval ::NRF_SUCCESS Peripheral Preferred Connection Parameters retrieved successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - */ -SVCALL(SD_BLE_GAP_PPCP_GET, uint32_t, sd_ble_gap_ppcp_get(ble_gap_conn_params_t *p_conn_params)); - - -/**@brief Set GAP device name. - * - * @note If the device name is located in application flash memory (see @ref ble_gap_cfg_device_name_t), - * it cannot be changed. Then @ref NRF_ERROR_FORBIDDEN will be returned. - * - * @param[in] p_write_perm Write permissions for the Device Name characteristic, see @ref ble_gap_conn_sec_mode_t. - * @param[in] p_dev_name Pointer to a UTF-8 encoded, non NULL-terminated string. - * @param[in] len Length of the UTF-8, non NULL-terminated string pointed to by p_dev_name in octets (must be smaller or equal than @ref BLE_GAP_DEVNAME_MAX_LEN). - * - * @retval ::NRF_SUCCESS GAP device name and permissions set successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. - * @retval ::NRF_ERROR_FORBIDDEN Device name is not writable. - */ -SVCALL(SD_BLE_GAP_DEVICE_NAME_SET, uint32_t, sd_ble_gap_device_name_set(ble_gap_conn_sec_mode_t const *p_write_perm, uint8_t const *p_dev_name, uint16_t len)); - - -/**@brief Get GAP device name. - * - * @note If the device name is longer than the size of the supplied buffer, - * p_len will return the complete device name length, - * and not the number of bytes actually returned in p_dev_name. - * The application may use this information to allocate a suitable buffer size. - * - * @param[out] p_dev_name Pointer to an empty buffer where the UTF-8 non NULL-terminated string will be placed. Set to NULL to obtain the complete device name length. - * @param[in,out] p_len Length of the buffer pointed by p_dev_name, complete device name length on output. - * - * @retval ::NRF_SUCCESS GAP device name retrieved successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. - */ -SVCALL(SD_BLE_GAP_DEVICE_NAME_GET, uint32_t, sd_ble_gap_device_name_get(uint8_t *p_dev_name, uint16_t *p_len)); - - -/**@brief Initiate the GAP Authentication procedure. - * - * @details In the peripheral role, this function will send an SMP Security Request. - * - * @events - * @event{Depending on the security parameters set and the packet exchanges with the peer\, the following events may be generated:} - * @event{@ref BLE_GAP_EVT_SEC_PARAMS_REQUEST} - * @event{@ref BLE_GAP_EVT_SEC_INFO_REQUEST} - * @event{@ref BLE_GAP_EVT_PASSKEY_DISPLAY} - * @event{@ref BLE_GAP_EVT_KEY_PRESSED} - * @event{@ref BLE_GAP_EVT_AUTH_KEY_REQUEST} - * @event{@ref BLE_GAP_EVT_LESC_DHKEY_REQUEST} - * @event{@ref BLE_GAP_EVT_CONN_SEC_UPDATE} - * @event{@ref BLE_GAP_EVT_AUTH_STATUS} - * @event{@ref BLE_GAP_EVT_TIMEOUT} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_SEC_REQ_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_sec_params Pointer to the @ref ble_gap_sec_params_t structure with the security parameters to be used during the pairing or bonding procedure. - * In the peripheral role, only the bond, mitm, lesc and keypress fields of this structure are used. - * - * @retval ::NRF_SUCCESS Successfully initiated authentication procedure. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_NO_MEM The maximum number of authentication procedures that can run in parallel for the given role is reached. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_AUTHENTICATE, uint32_t, sd_ble_gap_authenticate(uint16_t conn_handle, ble_gap_sec_params_t const *p_sec_params)); - - -/**@brief Reply with GAP security parameters. - * - * @details This function is only used to reply to a @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. - * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. - * - * @events - * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_JW_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_PERIPH_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_CENTRAL_OOB_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_CONFIRM_FAIL_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_PD_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_KS_TOO_SMALL_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_APP_ERROR_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_REMOTE_PAIRING_FAIL_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_TIMEOUT_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] sec_status Security status, see @ref BLE_GAP_SEC_STATUS. - * @param[in] p_sec_params Pointer to a @ref ble_gap_sec_params_t security parameters structure. - * @param[in,out] p_sec_keyset Pointer to a @ref ble_gap_sec_keyset_t security keyset structure. Any keys generated and/or distributed as a result of the ongoing security procedure - * will be stored into the memory referenced by the pointers inside this structure. The keys will be stored and available to the application - * upon reception of a @ref BLE_GAP_EVT_AUTH_STATUS event. - * Note that the SoftDevice expects the application to provide memory for storing the - * peer's keys. So it must be ensured that the relevant pointers inside this structure are not NULL. The pointers to the local key - * can, however, be NULL, in which case, the local key data will not be available to the application upon reception of the - * @ref BLE_GAP_EVT_AUTH_STATUS event. - * - * @retval ::NRF_SUCCESS Successfully accepted security parameter from the application. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_NOT_SUPPORTED Setting of sign or link fields in @ref ble_gap_sec_kdist_t not supported. - */ -SVCALL(SD_BLE_GAP_SEC_PARAMS_REPLY, uint32_t, sd_ble_gap_sec_params_reply(uint16_t conn_handle, uint8_t sec_status, ble_gap_sec_params_t const *p_sec_params, ble_gap_sec_keyset_t const *p_sec_keyset)); - - -/**@brief Reply with an authentication key. - * - * @details This function is only used to reply to a @ref BLE_GAP_EVT_AUTH_KEY_REQUEST or a @ref BLE_GAP_EVT_PASSKEY_DISPLAY, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. - * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. - * - * @events - * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_CENTRAL_OOB_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] key_type See @ref BLE_GAP_AUTH_KEY_TYPES. - * @param[in] p_key If key type is @ref BLE_GAP_AUTH_KEY_TYPE_NONE, then NULL. - * If key type is @ref BLE_GAP_AUTH_KEY_TYPE_PASSKEY, then a 6-byte ASCII string (digit 0..9 only, no NULL termination) - * or NULL when confirming LE Secure Connections Numeric Comparison. - * If key type is @ref BLE_GAP_AUTH_KEY_TYPE_OOB, then a 16-byte OOB key value in little-endian format. - * - * @retval ::NRF_SUCCESS Authentication key successfully set. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_AUTH_KEY_REPLY, uint32_t, sd_ble_gap_auth_key_reply(uint16_t conn_handle, uint8_t key_type, uint8_t const *p_key)); - - -/**@brief Reply with an LE Secure connections DHKey. - * - * @details This function is only used to reply to a @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. - * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. - * - * @events - * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_LESC_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_PD_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_dhkey LE Secure Connections DHKey. - * - * @retval ::NRF_SUCCESS DHKey successfully set. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_LESC_DHKEY_REPLY, uint32_t, sd_ble_gap_lesc_dhkey_reply(uint16_t conn_handle, ble_gap_lesc_dhkey_t const *p_dhkey)); - - -/**@brief Notify the peer of a local keypress. - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] kp_not See @ref BLE_GAP_KP_NOT_TYPES. - * - * @retval ::NRF_SUCCESS Keypress notification successfully queued for transmission. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Either not entering a passkey or keypresses have not been enabled by both peers. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_BUSY The BLE stack is busy. Retry at later time. - */ -SVCALL(SD_BLE_GAP_KEYPRESS_NOTIFY, uint32_t, sd_ble_gap_keypress_notify(uint16_t conn_handle, uint8_t kp_not)); - - -/**@brief Generate a set of OOB data to send to a peer out of band. - * - * @note The @ref ble_gap_addr_t included in the OOB data returned will be the currently active one (or, if a connection has already been established, - * the one used during connection setup). The application may manually overwrite it with an updated value. - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. Can be @ref BLE_CONN_HANDLE_INVALID if a BLE connection has not been established yet. - * @param[in] p_pk_own LE Secure Connections local P-256 Public Key. - * @param[out] p_oobd_own The OOB data to be sent out of band to a peer. - * - * @retval ::NRF_SUCCESS OOB data successfully generated. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_LESC_OOB_DATA_GET, uint32_t, sd_ble_gap_lesc_oob_data_get(uint16_t conn_handle, ble_gap_lesc_p256_pk_t const *p_pk_own, ble_gap_lesc_oob_data_t *p_oobd_own)); - -/**@brief Provide the OOB data sent/received out of band. - * - * @note An authentication procedure with OOB selected as an algorithm must be in progress when calling this function. - * @note A @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST event with the oobd_req set to 1 must have been received prior to calling this function. - * - * @events - * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_oobd_own The OOB data sent out of band to a peer or NULL if the peer has not received OOB data. - * Must correspond to @ref ble_gap_sec_params_t::oob flag in @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST. - * @param[in] p_oobd_peer The OOB data received out of band from a peer or NULL if none received. - * Must correspond to @ref sd_ble_gap_sec_params_reply in the peripheral role. - * - * @retval ::NRF_SUCCESS OOB data accepted. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_LESC_OOB_DATA_SET, uint32_t, sd_ble_gap_lesc_oob_data_set(uint16_t conn_handle, ble_gap_lesc_oob_data_t const *p_oobd_own, ble_gap_lesc_oob_data_t const *p_oobd_peer)); - - -/**@brief Reply with GAP security information. - * - * @details This function is only used to reply to a @ref BLE_GAP_EVT_SEC_INFO_REQUEST, calling it at other times will result in @ref NRF_ERROR_INVALID_STATE. - * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. - * @note Data signing is not yet supported, and p_sign_info must therefore be NULL. - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_ENC_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_enc_info Pointer to a @ref ble_gap_enc_info_t encryption information structure. May be NULL to signal none is available. - * @param[in] p_id_info Pointer to a @ref ble_gap_irk_t identity information structure. May be NULL to signal none is available. - * @param[in] p_sign_info Pointer to a @ref ble_gap_sign_info_t signing information structure. May be NULL to signal none is available. - * - * @retval ::NRF_SUCCESS Successfully accepted security information. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_SEC_INFO_REPLY, uint32_t, sd_ble_gap_sec_info_reply(uint16_t conn_handle, ble_gap_enc_info_t const *p_enc_info, ble_gap_irk_t const *p_id_info, ble_gap_sign_info_t const *p_sign_info)); - - -/**@brief Get the current connection security. - * - * @param[in] conn_handle Connection handle. - * @param[out] p_conn_sec Pointer to a @ref ble_gap_conn_sec_t structure to be filled in. - * - * @retval ::NRF_SUCCESS Current connection security successfully retrieved. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_CONN_SEC_GET, uint32_t, sd_ble_gap_conn_sec_get(uint16_t conn_handle, ble_gap_conn_sec_t *p_conn_sec)); - - -/**@brief Start reporting the received signal strength to the application. - * - * A new event is reported whenever the RSSI value changes, until @ref sd_ble_gap_rssi_stop is called. - * - * @events - * @event{@ref BLE_GAP_EVT_RSSI_CHANGED, New RSSI data available. How often the event is generated is - * dependent on the settings of the threshold_dbm - * and skip_count input parameters.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} - * @mmsc{@ref BLE_GAP_RSSI_FILT_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] threshold_dbm Minimum change in dBm before triggering the @ref BLE_GAP_EVT_RSSI_CHANGED event. Events are disabled if threshold_dbm equals @ref BLE_GAP_RSSI_THRESHOLD_INVALID. - * @param[in] skip_count Number of RSSI samples with a change of threshold_dbm or more before sending a new @ref BLE_GAP_EVT_RSSI_CHANGED event. - * - * @retval ::NRF_SUCCESS Successfully activated RSSI reporting. - * @retval ::NRF_ERROR_INVALID_STATE Disconnection in progress. Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_RSSI_START, uint32_t, sd_ble_gap_rssi_start(uint16_t conn_handle, uint8_t threshold_dbm, uint8_t skip_count)); - - -/**@brief Stop reporting the received signal strength. - * - * @note An RSSI change detected before the call but not yet received by the application - * may be reported after @ref sd_ble_gap_rssi_stop has been called. - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} - * @mmsc{@ref BLE_GAP_RSSI_FILT_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * - * @retval ::NRF_SUCCESS Successfully deactivated RSSI reporting. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_RSSI_STOP, uint32_t, sd_ble_gap_rssi_stop(uint16_t conn_handle)); - - -/**@brief Get the received signal strength for the last connection event. - * - * @ref sd_ble_gap_rssi_start must be called to start reporting RSSI before using this function. @ref NRF_ERROR_NOT_FOUND - * will be returned until RSSI was sampled for the first time after calling @ref sd_ble_gap_rssi_start. - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[out] p_rssi Pointer to the location where the RSSI measurement shall be stored. - * - * @retval ::NRF_SUCCESS Successfully read the RSSI. - * @retval ::NRF_ERROR_NOT_FOUND No sample is available. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_INVALID_STATE RSSI reporting is not ongoing, or disconnection in progress. - */ -SVCALL(SD_BLE_GAP_RSSI_GET, uint32_t, sd_ble_gap_rssi_get(uint16_t conn_handle, int8_t *p_rssi)); - - -/**@brief Initiate or respond to a PHY Update Procedure - * - * @details This function is used to initiate or respond to a PHY Update Procedure. It will always - * generate a @ref BLE_GAP_EVT_PHY_UPDATE event if successfully executed. - * If this function is used to initiate a PHY Update procedure and the only option - * provided in @ref ble_gap_phys_t::tx_phys and @ref ble_gap_phys_t::rx_phys is the - * currently active PHYs in the respective directions, the SoftDevice will generate a - * @ref BLE_GAP_EVT_PHY_UPDATE with the current PHYs set and will not initiate the - * procedure in the Link Layer. - * If @ref ble_gap_phys_t::tx_phys or @ref ble_gap_phys_t::rx_phys is - * @ref BLE_GAP_PHY_AUTO, then the stack will select a PHY for the respective direction - * based on the peer's PHY preferences and the local stack configuration. - * If the peer does not support the PHY Update Procedure, then the resulting - * @ref BLE_GAP_EVT_PHY_UPDATE event will have a status set to - * @ref BLE_HCI_UNSUPPORTED_REMOTE_FEATURE. - * If the PHY procedure was rejected by the peer due to a procedure collision, the status - * will be @ref BLE_HCI_STATUS_CODE_LMP_ERROR_TRANSACTION_COLLISION or - * @ref BLE_HCI_DIFFERENT_TRANSACTION_COLLISION. - * If the peer responds to the PHY Update procedure with invalid parameters, the status - * will be @ref BLE_HCI_STATUS_CODE_INVALID_LMP_PARAMETERS. - * If the PHY procedure was rejected by the peer for a different reason, the status will - * contain the reason as specified by the peer. - * - * @events - * @event{@ref BLE_GAP_EVT_PHY_UPDATE, Result of the PHY Update Procedure.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPHERAL_PHY_UPDATE} - * @endmscs - * - * @param[in] conn_handle Connection handle to indicate the connection for which the PHY Update is requested. - * @param[in] p_gap_phys Pointer to PHY structure. - * - * @retval ::NRF_SUCCESS Successfully requested a PHY Update. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Unsupported PHYs supplied to the call. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_BUSY Procedure is already in progress or not allowed at this time. Process pending events and wait for the pending procedure to complete and retry. - * - */ -SVCALL(SD_BLE_GAP_PHY_UPDATE, uint32_t, sd_ble_gap_phy_update(uint16_t conn_handle, ble_gap_phys_t const *p_gap_phys)); - - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // BLE_GAP_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/ble_gatt.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/ble_gatt.h deleted file mode 100644 index 98a7a150bfc..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/ble_gatt.h +++ /dev/null @@ -1,228 +0,0 @@ -/* - * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_GATT Generic Attribute Profile (GATT) Common - @{ - @brief Common definitions and prototypes for the GATT interfaces. - */ - -#ifndef BLE_GATT_H__ -#define BLE_GATT_H__ - -#include -#include "nrf_svc.h" -#include "nrf_error.h" -#include "ble_hci.h" -#include "ble_ranges.h" -#include "ble_types.h" -#include "ble_err.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_GATT_DEFINES Defines - * @{ */ - -/** @brief Default ATT MTU, in bytes. */ -#define BLE_GATT_ATT_MTU_DEFAULT 23 - -/**@brief Invalid Attribute Handle. */ -#define BLE_GATT_HANDLE_INVALID 0x0000 - -/**@brief First Attribute Handle. */ -#define BLE_GATT_HANDLE_START 0x0001 - -/**@brief Last Attribute Handle. */ -#define BLE_GATT_HANDLE_END 0xFFFF - -/** @defgroup BLE_GATT_TIMEOUT_SOURCES GATT Timeout sources - * @{ */ -#define BLE_GATT_TIMEOUT_SRC_PROTOCOL 0x00 /**< ATT Protocol timeout. */ -/** @} */ - -/** @defgroup BLE_GATT_WRITE_OPS GATT Write operations - * @{ */ -#define BLE_GATT_OP_INVALID 0x00 /**< Invalid Operation. */ -#define BLE_GATT_OP_WRITE_REQ 0x01 /**< Write Request. */ -#define BLE_GATT_OP_WRITE_CMD 0x02 /**< Write Command. */ -#define BLE_GATT_OP_SIGN_WRITE_CMD 0x03 /**< Signed Write Command. */ -#define BLE_GATT_OP_PREP_WRITE_REQ 0x04 /**< Prepare Write Request. */ -#define BLE_GATT_OP_EXEC_WRITE_REQ 0x05 /**< Execute Write Request. */ -/** @} */ - -/** @defgroup BLE_GATT_EXEC_WRITE_FLAGS GATT Execute Write flags - * @{ */ -#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_CANCEL 0x00 /**< Cancel prepared write. */ -#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_WRITE 0x01 /**< Execute prepared write. */ -/** @} */ - -/** @defgroup BLE_GATT_HVX_TYPES GATT Handle Value operations - * @{ */ -#define BLE_GATT_HVX_INVALID 0x00 /**< Invalid Operation. */ -#define BLE_GATT_HVX_NOTIFICATION 0x01 /**< Handle Value Notification. */ -#define BLE_GATT_HVX_INDICATION 0x02 /**< Handle Value Indication. */ -/** @} */ - -/** @defgroup BLE_GATT_STATUS_CODES GATT Status Codes - * @{ */ -#define BLE_GATT_STATUS_SUCCESS 0x0000 /**< Success. */ -#define BLE_GATT_STATUS_UNKNOWN 0x0001 /**< Unknown or not applicable status. */ -#define BLE_GATT_STATUS_ATTERR_INVALID 0x0100 /**< ATT Error: Invalid Error Code. */ -#define BLE_GATT_STATUS_ATTERR_INVALID_HANDLE 0x0101 /**< ATT Error: Invalid Attribute Handle. */ -#define BLE_GATT_STATUS_ATTERR_READ_NOT_PERMITTED 0x0102 /**< ATT Error: Read not permitted. */ -#define BLE_GATT_STATUS_ATTERR_WRITE_NOT_PERMITTED 0x0103 /**< ATT Error: Write not permitted. */ -#define BLE_GATT_STATUS_ATTERR_INVALID_PDU 0x0104 /**< ATT Error: Used in ATT as Invalid PDU. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHENTICATION 0x0105 /**< ATT Error: Authenticated link required. */ -#define BLE_GATT_STATUS_ATTERR_REQUEST_NOT_SUPPORTED 0x0106 /**< ATT Error: Used in ATT as Request Not Supported. */ -#define BLE_GATT_STATUS_ATTERR_INVALID_OFFSET 0x0107 /**< ATT Error: Offset specified was past the end of the attribute. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHORIZATION 0x0108 /**< ATT Error: Used in ATT as Insufficient Authorization. */ -#define BLE_GATT_STATUS_ATTERR_PREPARE_QUEUE_FULL 0x0109 /**< ATT Error: Used in ATT as Prepare Queue Full. */ -#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_FOUND 0x010A /**< ATT Error: Used in ATT as Attribute not found. */ -#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_LONG 0x010B /**< ATT Error: Attribute cannot be read or written using read/write blob requests. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_ENC_KEY_SIZE 0x010C /**< ATT Error: Encryption key size used is insufficient. */ -#define BLE_GATT_STATUS_ATTERR_INVALID_ATT_VAL_LENGTH 0x010D /**< ATT Error: Invalid value size. */ -#define BLE_GATT_STATUS_ATTERR_UNLIKELY_ERROR 0x010E /**< ATT Error: Very unlikely error. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_ENCRYPTION 0x010F /**< ATT Error: Encrypted link required. */ -#define BLE_GATT_STATUS_ATTERR_UNSUPPORTED_GROUP_TYPE 0x0110 /**< ATT Error: Attribute type is not a supported grouping attribute. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_RESOURCES 0x0111 /**< ATT Error: Encrypted link required. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_BEGIN 0x0112 /**< ATT Error: Reserved for Future Use range #1 begin. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_END 0x017F /**< ATT Error: Reserved for Future Use range #1 end. */ -#define BLE_GATT_STATUS_ATTERR_APP_BEGIN 0x0180 /**< ATT Error: Application range begin. */ -#define BLE_GATT_STATUS_ATTERR_APP_END 0x019F /**< ATT Error: Application range end. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_BEGIN 0x01A0 /**< ATT Error: Reserved for Future Use range #2 begin. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_END 0x01DF /**< ATT Error: Reserved for Future Use range #2 end. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_BEGIN 0x01E0 /**< ATT Error: Reserved for Future Use range #3 begin. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_END 0x01FC /**< ATT Error: Reserved for Future Use range #3 end. */ -#define BLE_GATT_STATUS_ATTERR_CPS_CCCD_CONFIG_ERROR 0x01FD /**< ATT Common Profile and Service Error: Client Characteristic Configuration Descriptor improperly configured. */ -#define BLE_GATT_STATUS_ATTERR_CPS_PROC_ALR_IN_PROG 0x01FE /**< ATT Common Profile and Service Error: Procedure Already in Progress. */ -#define BLE_GATT_STATUS_ATTERR_CPS_OUT_OF_RANGE 0x01FF /**< ATT Common Profile and Service Error: Out Of Range. */ -/** @} */ - - -/** @defgroup BLE_GATT_CPF_FORMATS Characteristic Presentation Formats - * @note Found at http://developer.bluetooth.org/gatt/descriptors/Pages/DescriptorViewer.aspx?u=org.bluetooth.descriptor.gatt.characteristic_presentation_format.xml - * @{ */ -#define BLE_GATT_CPF_FORMAT_RFU 0x00 /**< Reserved For Future Use. */ -#define BLE_GATT_CPF_FORMAT_BOOLEAN 0x01 /**< Boolean. */ -#define BLE_GATT_CPF_FORMAT_2BIT 0x02 /**< Unsigned 2-bit integer. */ -#define BLE_GATT_CPF_FORMAT_NIBBLE 0x03 /**< Unsigned 4-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT8 0x04 /**< Unsigned 8-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT12 0x05 /**< Unsigned 12-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT16 0x06 /**< Unsigned 16-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT24 0x07 /**< Unsigned 24-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT32 0x08 /**< Unsigned 32-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT48 0x09 /**< Unsigned 48-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT64 0x0A /**< Unsigned 64-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT128 0x0B /**< Unsigned 128-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT8 0x0C /**< Signed 2-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT12 0x0D /**< Signed 12-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT16 0x0E /**< Signed 16-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT24 0x0F /**< Signed 24-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT32 0x10 /**< Signed 32-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT48 0x11 /**< Signed 48-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT64 0x12 /**< Signed 64-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT128 0x13 /**< Signed 128-bit integer. */ -#define BLE_GATT_CPF_FORMAT_FLOAT32 0x14 /**< IEEE-754 32-bit floating point. */ -#define BLE_GATT_CPF_FORMAT_FLOAT64 0x15 /**< IEEE-754 64-bit floating point. */ -#define BLE_GATT_CPF_FORMAT_SFLOAT 0x16 /**< IEEE-11073 16-bit SFLOAT. */ -#define BLE_GATT_CPF_FORMAT_FLOAT 0x17 /**< IEEE-11073 32-bit FLOAT. */ -#define BLE_GATT_CPF_FORMAT_DUINT16 0x18 /**< IEEE-20601 format. */ -#define BLE_GATT_CPF_FORMAT_UTF8S 0x19 /**< UTF-8 string. */ -#define BLE_GATT_CPF_FORMAT_UTF16S 0x1A /**< UTF-16 string. */ -#define BLE_GATT_CPF_FORMAT_STRUCT 0x1B /**< Opaque Structure. */ -/** @} */ - -/** @defgroup BLE_GATT_CPF_NAMESPACES GATT Bluetooth Namespaces - * @{ - */ -#define BLE_GATT_CPF_NAMESPACE_BTSIG 0x01 /**< Bluetooth SIG defined Namespace. */ -#define BLE_GATT_CPF_NAMESPACE_DESCRIPTION_UNKNOWN 0x0000 /**< Namespace Description Unknown. */ -/** @} */ - -/** @} */ - -/** @addtogroup BLE_GATT_STRUCTURES Structures - * @{ */ - -/** - * @brief BLE GATT connection configuration parameters, set with @ref sd_ble_cfg_set. - * - * @retval ::NRF_ERROR_INVALID_PARAM att_mtu is smaller than @ref BLE_GATT_ATT_MTU_DEFAULT. - */ -typedef struct -{ - uint16_t att_mtu; /**< Maximum size of ATT packet the SoftDevice can send or receive. - The default and minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. - @mscs - @mmsc{@ref BLE_GATTC_MTU_EXCHANGE} - @mmsc{@ref BLE_GATTS_MTU_EXCHANGE} - @endmscs - */ -} ble_gatt_conn_cfg_t; - -/**@brief GATT Characteristic Properties. */ -typedef struct -{ - /* Standard properties */ - uint8_t broadcast :1; /**< Broadcasting of the value permitted. */ - uint8_t read :1; /**< Reading the value permitted. */ - uint8_t write_wo_resp :1; /**< Writing the value with Write Command permitted. */ - uint8_t write :1; /**< Writing the value with Write Request permitted. */ - uint8_t notify :1; /**< Notification of the value permitted. */ - uint8_t indicate :1; /**< Indications of the value permitted. */ - uint8_t auth_signed_wr :1; /**< Writing the value with Signed Write Command permitted. */ -} ble_gatt_char_props_t; - -/**@brief GATT Characteristic Extended Properties. */ -typedef struct -{ - /* Extended properties */ - uint8_t reliable_wr :1; /**< Writing the value with Queued Write operations permitted. */ - uint8_t wr_aux :1; /**< Writing the Characteristic User Description descriptor permitted. */ -} ble_gatt_char_ext_props_t; - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // BLE_GATT_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/ble_gattc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/ble_gattc.h deleted file mode 100644 index ef7dde248f5..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/ble_gattc.h +++ /dev/null @@ -1,707 +0,0 @@ -/* - * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_GATTC Generic Attribute Profile (GATT) Client - @{ - @brief Definitions and prototypes for the GATT Client interface. - */ - -#ifndef BLE_GATTC_H__ -#define BLE_GATTC_H__ - -#include -#include "nrf.h" -#include "nrf_svc.h" -#include "nrf_error.h" -#include "ble_hci.h" -#include "ble_ranges.h" -#include "ble_types.h" -#include "ble_err.h" -#include "ble_gatt.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_GATTC_ENUMERATIONS Enumerations - * @{ */ - -/**@brief GATTC API SVC numbers. */ -enum BLE_GATTC_SVCS -{ - SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER = BLE_GATTC_SVC_BASE, /**< Primary Service Discovery. */ - SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, /**< Relationship Discovery. */ - SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, /**< Characteristic Discovery. */ - SD_BLE_GATTC_DESCRIPTORS_DISCOVER, /**< Characteristic Descriptor Discovery. */ - SD_BLE_GATTC_ATTR_INFO_DISCOVER, /**< Attribute Information Discovery. */ - SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, /**< Read Characteristic Value by UUID. */ - SD_BLE_GATTC_READ, /**< Generic read. */ - SD_BLE_GATTC_CHAR_VALUES_READ, /**< Read multiple Characteristic Values. */ - SD_BLE_GATTC_WRITE, /**< Generic write. */ - SD_BLE_GATTC_HV_CONFIRM, /**< Handle Value Confirmation. */ - SD_BLE_GATTC_EXCHANGE_MTU_REQUEST, /**< Exchange MTU Request. */ -}; - -/** - * @brief GATT Client Event IDs. - */ -enum BLE_GATTC_EVTS -{ - BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP = BLE_GATTC_EVT_BASE, /**< Primary Service Discovery Response event. \n See @ref ble_gattc_evt_prim_srvc_disc_rsp_t. */ - BLE_GATTC_EVT_REL_DISC_RSP, /**< Relationship Discovery Response event. \n See @ref ble_gattc_evt_rel_disc_rsp_t. */ - BLE_GATTC_EVT_CHAR_DISC_RSP, /**< Characteristic Discovery Response event. \n See @ref ble_gattc_evt_char_disc_rsp_t. */ - BLE_GATTC_EVT_DESC_DISC_RSP, /**< Descriptor Discovery Response event. \n See @ref ble_gattc_evt_desc_disc_rsp_t. */ - BLE_GATTC_EVT_ATTR_INFO_DISC_RSP, /**< Attribute Information Response event. \n See @ref ble_gattc_evt_attr_info_disc_rsp_t. */ - BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP, /**< Read By UUID Response event. \n See @ref ble_gattc_evt_char_val_by_uuid_read_rsp_t. */ - BLE_GATTC_EVT_READ_RSP, /**< Read Response event. \n See @ref ble_gattc_evt_read_rsp_t. */ - BLE_GATTC_EVT_CHAR_VALS_READ_RSP, /**< Read multiple Response event. \n See @ref ble_gattc_evt_char_vals_read_rsp_t. */ - BLE_GATTC_EVT_WRITE_RSP, /**< Write Response event. \n See @ref ble_gattc_evt_write_rsp_t. */ - BLE_GATTC_EVT_HVX, /**< Handle Value Notification or Indication event. \n Confirm indication with @ref sd_ble_gattc_hv_confirm. \n See @ref ble_gattc_evt_hvx_t. */ - BLE_GATTC_EVT_EXCHANGE_MTU_RSP, /**< Exchange MTU Response event. \n See @ref ble_gattc_evt_exchange_mtu_rsp_t. */ - BLE_GATTC_EVT_TIMEOUT, /**< Timeout event. \n See @ref ble_gattc_evt_timeout_t. */ - BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE /**< Write without Response transmission complete. \n See @ref ble_gattc_evt_write_cmd_tx_complete_t. */ -}; - -/** @} */ - -/** @addtogroup BLE_GATTC_DEFINES Defines - * @{ */ - -/** @defgroup BLE_ERRORS_GATTC SVC return values specific to GATTC - * @{ */ -#define BLE_ERROR_GATTC_PROC_NOT_PERMITTED (NRF_GATTC_ERR_BASE + 0x000) /**< Procedure not Permitted. */ -/** @} */ - -/** @defgroup BLE_GATTC_ATTR_INFO_FORMAT Attribute Information Formats - * @{ */ -#define BLE_GATTC_ATTR_INFO_FORMAT_16BIT 1 /**< 16-bit Attribute Information Format. */ -#define BLE_GATTC_ATTR_INFO_FORMAT_128BIT 2 /**< 128-bit Attribute Information Format. */ -/** @} */ - -/** @defgroup BLE_GATTC_DEFAULTS GATT Client defaults - * @{ */ -#define BLE_GATTC_WRITE_CMD_TX_QUEUE_SIZE_DEFAULT 1 /**< Default number of Write without Response that can be queued for transmission. */ -/** @} */ - -/** @} */ - -/** @addtogroup BLE_GATTC_STRUCTURES Structures - * @{ */ - -/** - * @brief BLE GATTC connection configuration parameters, set with @ref sd_ble_cfg_set. - */ -typedef struct -{ - uint8_t write_cmd_tx_queue_size; /**< The guaranteed minimum number of Write without Response that can be queued for transmission. - The default value is @ref BLE_GATTC_WRITE_CMD_TX_QUEUE_SIZE_DEFAULT */ -} ble_gattc_conn_cfg_t; - -/**@brief Operation Handle Range. */ -typedef struct -{ - uint16_t start_handle; /**< Start Handle. */ - uint16_t end_handle; /**< End Handle. */ -} ble_gattc_handle_range_t; - - -/**@brief GATT service. */ -typedef struct -{ - ble_uuid_t uuid; /**< Service UUID. */ - ble_gattc_handle_range_t handle_range; /**< Service Handle Range. */ -} ble_gattc_service_t; - - -/**@brief GATT include. */ -typedef struct -{ - uint16_t handle; /**< Include Handle. */ - ble_gattc_service_t included_srvc; /**< Handle of the included service. */ -} ble_gattc_include_t; - - -/**@brief GATT characteristic. */ -typedef struct -{ - ble_uuid_t uuid; /**< Characteristic UUID. */ - ble_gatt_char_props_t char_props; /**< Characteristic Properties. */ - uint8_t char_ext_props : 1; /**< Extended properties present. */ - uint16_t handle_decl; /**< Handle of the Characteristic Declaration. */ - uint16_t handle_value; /**< Handle of the Characteristic Value. */ -} ble_gattc_char_t; - - -/**@brief GATT descriptor. */ -typedef struct -{ - uint16_t handle; /**< Descriptor Handle. */ - ble_uuid_t uuid; /**< Descriptor UUID. */ -} ble_gattc_desc_t; - - -/**@brief Write Parameters. */ -typedef struct -{ - uint8_t write_op; /**< Write Operation to be performed, see @ref BLE_GATT_WRITE_OPS. */ - uint8_t flags; /**< Flags, see @ref BLE_GATT_EXEC_WRITE_FLAGS. */ - uint16_t handle; /**< Handle to the attribute to be written. */ - uint16_t offset; /**< Offset in bytes. @note For WRITE_CMD and WRITE_REQ, offset must be 0. */ - uint16_t len; /**< Length of data in bytes. */ - uint8_t const *p_value; /**< Pointer to the value data. */ -} ble_gattc_write_params_t; - -/**@brief Attribute Information for 16-bit Attribute UUID. */ -typedef struct -{ - uint16_t handle; /**< Attribute handle. */ - ble_uuid_t uuid; /**< 16-bit Attribute UUID. */ -} ble_gattc_attr_info16_t; - -/**@brief Attribute Information for 128-bit Attribute UUID. */ -typedef struct -{ - uint16_t handle; /**< Attribute handle. */ - ble_uuid128_t uuid; /**< 128-bit Attribute UUID. */ -} ble_gattc_attr_info128_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Service count. */ - ble_gattc_service_t services[1]; /**< Service data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_prim_srvc_disc_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_REL_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Include count. */ - ble_gattc_include_t includes[1]; /**< Include data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_rel_disc_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Characteristic count. */ - ble_gattc_char_t chars[1]; /**< Characteristic data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_char_disc_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_DESC_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Descriptor count. */ - ble_gattc_desc_t descs[1]; /**< Descriptor data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_desc_disc_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_ATTR_INFO_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Attribute count. */ - uint8_t format; /**< Attribute information format, see @ref BLE_GATTC_ATTR_INFO_FORMAT. */ - union { - ble_gattc_attr_info16_t attr_info16[1]; /**< Attribute information for 16-bit Attribute UUID. - @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ - ble_gattc_attr_info128_t attr_info128[1]; /**< Attribute information for 128-bit Attribute UUID. - @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ - } info; /**< Attribute information union. */ -} ble_gattc_evt_attr_info_disc_rsp_t; - -/**@brief GATT read by UUID handle value pair. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - uint8_t *p_value; /**< Pointer to the Attribute Value, length is available in @ref ble_gattc_evt_char_val_by_uuid_read_rsp_t::value_len. */ -} ble_gattc_handle_value_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP. */ -typedef struct -{ - uint16_t count; /**< Handle-Value Pair Count. */ - uint16_t value_len; /**< Length of the value in Handle-Value(s) list. */ - uint8_t handle_value[1]; /**< Handle-Value(s) list. To iterate through the list use @ref sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter. - @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_char_val_by_uuid_read_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_READ_RSP. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - uint16_t offset; /**< Offset of the attribute data. */ - uint16_t len; /**< Attribute data length. */ - uint8_t data[1]; /**< Attribute data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_read_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_VALS_READ_RSP. */ -typedef struct -{ - uint16_t len; /**< Concatenated Attribute values length. */ - uint8_t values[1]; /**< Attribute values. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_char_vals_read_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_WRITE_RSP. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - uint8_t write_op; /**< Type of write operation, see @ref BLE_GATT_WRITE_OPS. */ - uint16_t offset; /**< Data offset. */ - uint16_t len; /**< Data length. */ - uint8_t data[1]; /**< Data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_write_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_HVX. */ -typedef struct -{ - uint16_t handle; /**< Handle to which the HVx operation applies. */ - uint8_t type; /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */ - uint16_t len; /**< Attribute data length. */ - uint8_t data[1]; /**< Attribute data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_hvx_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP. */ -typedef struct -{ - uint16_t server_rx_mtu; /**< Server RX MTU size. */ -} ble_gattc_evt_exchange_mtu_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_TIMEOUT. */ -typedef struct -{ - uint8_t src; /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */ -} ble_gattc_evt_timeout_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE. */ -typedef struct -{ - uint8_t count; /**< Number of write without response transmissions completed. */ -} ble_gattc_evt_write_cmd_tx_complete_t; - -/**@brief GATTC event structure. */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle on which event occurred. */ - uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ - uint16_t error_handle; /**< In case of error: The handle causing the error. In all other cases @ref BLE_GATT_HANDLE_INVALID. */ - union - { - ble_gattc_evt_prim_srvc_disc_rsp_t prim_srvc_disc_rsp; /**< Primary Service Discovery Response Event Parameters. */ - ble_gattc_evt_rel_disc_rsp_t rel_disc_rsp; /**< Relationship Discovery Response Event Parameters. */ - ble_gattc_evt_char_disc_rsp_t char_disc_rsp; /**< Characteristic Discovery Response Event Parameters. */ - ble_gattc_evt_desc_disc_rsp_t desc_disc_rsp; /**< Descriptor Discovery Response Event Parameters. */ - ble_gattc_evt_char_val_by_uuid_read_rsp_t char_val_by_uuid_read_rsp; /**< Characteristic Value Read by UUID Response Event Parameters. */ - ble_gattc_evt_read_rsp_t read_rsp; /**< Read Response Event Parameters. */ - ble_gattc_evt_char_vals_read_rsp_t char_vals_read_rsp; /**< Characteristic Values Read Response Event Parameters. */ - ble_gattc_evt_write_rsp_t write_rsp; /**< Write Response Event Parameters. */ - ble_gattc_evt_hvx_t hvx; /**< Handle Value Notification/Indication Event Parameters. */ - ble_gattc_evt_exchange_mtu_rsp_t exchange_mtu_rsp; /**< Exchange MTU Response Event Parameters. */ - ble_gattc_evt_timeout_t timeout; /**< Timeout Event Parameters. */ - ble_gattc_evt_attr_info_disc_rsp_t attr_info_disc_rsp; /**< Attribute Information Discovery Event Parameters. */ - ble_gattc_evt_write_cmd_tx_complete_t write_cmd_tx_complete; /**< Write without Response transmission complete Event Parameters. */ - } params; /**< Event Parameters. @note Only valid if @ref gatt_status == @ref BLE_GATT_STATUS_SUCCESS. */ -} ble_gattc_evt_t; -/** @} */ - -/** @addtogroup BLE_GATTC_FUNCTIONS Functions - * @{ */ - -/**@brief Initiate or continue a GATT Primary Service Discovery procedure. - * - * @details This function initiates or resumes a Primary Service discovery procedure, starting from the supplied handle. - * If the last service has not been reached, this function must be called again with an updated start handle value to continue the search. - * - * @note If any of the discovered services have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with - * type @ref BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event. - * - * @events - * @event{@ref BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_PRIM_SRVC_DISC_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] start_handle Handle to start searching from. - * @param[in] p_srvc_uuid Pointer to the service UUID to be found. If it is NULL, all primary services will be returned. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Primary Service Discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_BUSY GATT Client procedure already in progress or blocked because of a previous GATT procedure timeout. - */ -SVCALL(SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER, uint32_t, sd_ble_gattc_primary_services_discover(uint16_t conn_handle, uint16_t start_handle, ble_uuid_t const *p_srvc_uuid)); - - -/**@brief Initiate or continue a GATT Relationship Discovery procedure. - * - * @details This function initiates or resumes the Find Included Services sub-procedure. If the last included service has not been reached, - * this must be called again with an updated handle range to continue the search. - * - * @events - * @event{@ref BLE_GATTC_EVT_REL_DISC_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_REL_DISC_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Relationship Discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_BUSY GATT Client procedure already in progress or blocked because of a previous GATT procedure timeout. - */ -SVCALL(SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, uint32_t, sd_ble_gattc_relationships_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); - - -/**@brief Initiate or continue a GATT Characteristic Discovery procedure. - * - * @details This function initiates or resumes a Characteristic discovery procedure. If the last Characteristic has not been reached, - * this must be called again with an updated handle range to continue the discovery. - * - * @note If any of the discovered characteristics have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with - * type @ref BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event. - * - * @events - * @event{@ref BLE_GATTC_EVT_CHAR_DISC_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_CHAR_DISC_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Characteristic Discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY GATT Client procedure already in progress or blocked because of a previous GATT procedure timeout. - */ -SVCALL(SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, uint32_t, sd_ble_gattc_characteristics_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); - - -/**@brief Initiate or continue a GATT Characteristic Descriptor Discovery procedure. - * - * @details This function initiates or resumes a Characteristic Descriptor discovery procedure. If the last Descriptor has not been reached, - * this must be called again with an updated handle range to continue the discovery. - * - * @events - * @event{@ref BLE_GATTC_EVT_DESC_DISC_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_DESC_DISC_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handle_range A pointer to the range of handles of the Characteristic to perform this procedure on. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Descriptor Discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY GATT Client procedure already in progress or blocked because of a previous GATT procedure timeout. - */ -SVCALL(SD_BLE_GATTC_DESCRIPTORS_DISCOVER, uint32_t, sd_ble_gattc_descriptors_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); - - -/**@brief Initiate or continue a GATT Read using Characteristic UUID procedure. - * - * @details This function initiates or resumes a Read using Characteristic UUID procedure. If the last Characteristic has not been reached, - * this must be called again with an updated handle range to continue the discovery. - * - * @events - * @event{@ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_READ_UUID_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_uuid Pointer to a Characteristic value UUID to read. - * @param[in] p_handle_range A pointer to the range of handles to perform this procedure on. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Read using Characteristic UUID procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY GATT Client procedure already in progress or blocked because of a previous GATT procedure timeout. - */ -SVCALL(SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, uint32_t, sd_ble_gattc_char_value_by_uuid_read(uint16_t conn_handle, ble_uuid_t const *p_uuid, ble_gattc_handle_range_t const *p_handle_range)); - - -/**@brief Initiate or continue a GATT Read (Long) Characteristic or Descriptor procedure. - * - * @details This function initiates or resumes a GATT Read (Long) Characteristic or Descriptor procedure. If the Characteristic or Descriptor - * to be read is longer than ATT_MTU - 1, this function must be called multiple times with appropriate offset to read the - * complete value. - * - * @events - * @event{@ref BLE_GATTC_EVT_READ_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_VALUE_READ_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] handle The handle of the attribute to be read. - * @param[in] offset Offset into the attribute value to be read. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Read (Long) procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_BUSY GATT Client procedure already in progress or blocked because of a previous GATT procedure timeout. - */ -SVCALL(SD_BLE_GATTC_READ, uint32_t, sd_ble_gattc_read(uint16_t conn_handle, uint16_t handle, uint16_t offset)); - - -/**@brief Initiate a GATT Read Multiple Characteristic Values procedure. - * - * @details This function initiates a GATT Read Multiple Characteristic Values procedure. - * - * @events - * @event{@ref BLE_GATTC_EVT_CHAR_VALS_READ_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_READ_MULT_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handles A pointer to the handle(s) of the attribute(s) to be read. - * @param[in] handle_count The number of handles in p_handles. - * - * @retval ::NRF_SUCCESS Successfully started the Read Multiple Characteristic Values procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY GATT Client procedure already in progress or blocked because of a previous GATT procedure timeout. - */ -SVCALL(SD_BLE_GATTC_CHAR_VALUES_READ, uint32_t, sd_ble_gattc_char_values_read(uint16_t conn_handle, uint16_t const *p_handles, uint16_t handle_count)); - - -/**@brief Perform a Write (Characteristic Value or Descriptor, with or without response, signed or not, long or reliable) procedure. - * - * @details This function can perform all write procedures described in GATT. - * - * @note Only one write with response procedure can be ongoing per connection at a time. - * If the application tries to write with response while another write with response procedure is ongoing, - * the function call will return @ref NRF_ERROR_BUSY. - * A @ref BLE_GATTC_EVT_WRITE_RSP event will be issued as soon as the write response arrives from the peer. - * - * @note The number of Write without Response that can be queued is configured by @ref ble_gattc_conn_cfg_t::write_cmd_tx_queue_size - * When the queue is full, the function call will return @ref NRF_ERROR_RESOURCES. - * A @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event will be issued as soon as the transmission of the write without response is complete. - * - * @note The application can keep track of the available queue element count for writes without responses by following the procedure below: - * - Store initial queue element count in a variable. - * - Decrement the variable, which stores the currently available queue element count, by one when a call to this function returns @ref NRF_SUCCESS. - * - Increment the variable, which stores the current available queue element count, by the count variable in @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event. - * - * @events - * @event{@ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE, Write without response transmission complete.} - * @event{@ref BLE_GATTC_EVT_WRITE_RSP, Write response received from the peer.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_VALUE_WRITE_WITHOUT_RESP_MSC} - * @mmsc{@ref BLE_GATTC_VALUE_WRITE_MSC} - * @mmsc{@ref BLE_GATTC_VALUE_LONG_WRITE_MSC} - * @mmsc{@ref BLE_GATTC_VALUE_RELIABLE_WRITE_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_write_params A pointer to a write parameters structure. - * - * @retval ::NRF_SUCCESS Successfully started the Write procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. - * @retval ::NRF_ERROR_BUSY For write with response, GATT Client procedure already in progress or blocked because of a previous GATT procedure timeout. - Wait for a @ref BLE_GATTC_EVT_WRITE_RSP event and retry. - For write without response it can only mean GATT procedure timeout. - * @retval ::NRF_ERROR_RESOURCES Too many writes without responses queued. - * Wait for a @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event and retry. - */ -SVCALL(SD_BLE_GATTC_WRITE, uint32_t, sd_ble_gattc_write(uint16_t conn_handle, ble_gattc_write_params_t const *p_write_params)); - - -/**@brief Send a Handle Value Confirmation to the GATT Server. - * - * @mscs - * @mmsc{@ref BLE_GATTC_HVI_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] handle The handle of the attribute in the indication. - * - * @retval ::NRF_SUCCESS Successfully queued the Handle Value Confirmation for transmission. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no Indication pending to be confirmed. - * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle. - */ -SVCALL(SD_BLE_GATTC_HV_CONFIRM, uint32_t, sd_ble_gattc_hv_confirm(uint16_t conn_handle, uint16_t handle)); - -/**@brief Discovers information about a range of attributes on a GATT server. - * - * @events - * @event{@ref BLE_GATTC_EVT_ATTR_INFO_DISC_RSP, Generated when information about a range of attributes has been received.} - * @endevents - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handle_range The range of handles to request information about. - * - * @retval ::NRF_SUCCESS Successfully started an attribute information discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid connection state - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY GATT Client procedure already in progress or blocked because of a previous GATT procedure timeout. - */ -SVCALL(SD_BLE_GATTC_ATTR_INFO_DISCOVER, uint32_t, sd_ble_gattc_attr_info_discover(uint16_t conn_handle, ble_gattc_handle_range_t const * p_handle_range)); - -/**@brief Start an ATT_MTU exchange by sending an Exchange MTU Request to the server. - * - * @details The SoftDevice sets ATT_MTU to the minimum of: - * - The Client RX MTU value, and - * - The Server RX MTU value from @ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP. - * - * However, the SoftDevice never sets ATT_MTU lower than @ref BLE_GATT_ATT_MTU_DEFAULT. - * - * @events - * @event{@ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_MTU_EXCHANGE} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] client_rx_mtu Client RX MTU size. - * - The minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. - * - The maximum value is @ref ble_gatt_conn_cfg_t::att_mtu in the connection configuration - used for this connection. - * - The value must be equal to Server RX MTU size given in @ref sd_ble_gatts_exchange_mtu_reply - * if an ATT_MTU exchange has already been performed in the other direction. - * - * @retval ::NRF_SUCCESS Successfully sent request to the server. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid connection state or an ATT_MTU exchange was already requested once. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid Client RX MTU size supplied. - * @retval ::NRF_ERROR_BUSY GATT Client procedure already in progress or blocked because of a previous GATT procedure timeout. - */ -SVCALL(SD_BLE_GATTC_EXCHANGE_MTU_REQUEST, uint32_t, sd_ble_gattc_exchange_mtu_request(uint16_t conn_handle, uint16_t client_rx_mtu)); - -/**@brief Iterate through Handle-Value(s) list in @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP event. - * - * @param[in] p_gattc_evt Pointer to event buffer containing @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP event. - * @note If the buffer contains different event, behavior is undefined. - * @param[in,out] p_iter Iterator, points to @ref ble_gattc_handle_value_t structure that will be filled in with - * the next Handle-Value pair in each iteration. If the function returns other than - * @ref NRF_SUCCESS, it will not be changed. - * - To start iteration, initialize the structure to zero. - * - To continue, pass the value from previous iteration. - * - * \code - * ble_gattc_handle_value_t iter; - * memset(&iter, 0, sizeof(ble_gattc_handle_value_t)); - * while (sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(&ble_evt.evt.gattc_evt, &iter) == NRF_SUCCESS) - * { - * app_handle = iter.handle; - * memcpy(app_value, iter.p_value, ble_evt.evt.gattc_evt.params.char_val_by_uuid_read_rsp.value_len); - * } - * \endcode - * - * @retval ::NRF_SUCCESS Successfully retrieved the next Handle-Value pair. - * @retval ::NRF_ERROR_NOT_FOUND No more Handle-Value pairs available in the list. - */ -__STATIC_INLINE uint32_t sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(ble_gattc_evt_t *p_gattc_evt, ble_gattc_handle_value_t *p_iter); - -/** @} */ - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE uint32_t sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(ble_gattc_evt_t *p_gattc_evt, ble_gattc_handle_value_t *p_iter) -{ - uint32_t value_len = p_gattc_evt->params.char_val_by_uuid_read_rsp.value_len; - uint8_t *p_first = p_gattc_evt->params.char_val_by_uuid_read_rsp.handle_value; - uint8_t *p_next = p_iter->p_value ? p_iter->p_value + value_len : p_first; - - if ((p_next - p_first) / (sizeof(uint16_t) + value_len) < p_gattc_evt->params.char_val_by_uuid_read_rsp.count) - { - p_iter->handle = (uint16_t)p_next[1] << 8 | p_next[0]; - p_iter->p_value = p_next + sizeof(uint16_t); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_NOT_FOUND; - } -} - -#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ - -#ifdef __cplusplus -} -#endif -#endif /* BLE_GATTC_H__ */ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/ble_gatts.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/ble_gatts.h deleted file mode 100644 index e21b7918a51..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/ble_gatts.h +++ /dev/null @@ -1,841 +0,0 @@ -/* - * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_GATTS Generic Attribute Profile (GATT) Server - @{ - @brief Definitions and prototypes for the GATTS interface. - */ - -#ifndef BLE_GATTS_H__ -#define BLE_GATTS_H__ - -#include -#include "nrf_svc.h" -#include "nrf_error.h" -#include "ble_hci.h" -#include "ble_ranges.h" -#include "ble_types.h" -#include "ble_err.h" -#include "ble_gatt.h" -#include "ble_gap.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_GATTS_ENUMERATIONS Enumerations - * @{ */ - -/** - * @brief GATTS API SVC numbers. - */ -enum BLE_GATTS_SVCS -{ - SD_BLE_GATTS_SERVICE_ADD = BLE_GATTS_SVC_BASE, /**< Add a service. */ - SD_BLE_GATTS_INCLUDE_ADD, /**< Add an included service. */ - SD_BLE_GATTS_CHARACTERISTIC_ADD, /**< Add a characteristic. */ - SD_BLE_GATTS_DESCRIPTOR_ADD, /**< Add a generic attribute. */ - SD_BLE_GATTS_VALUE_SET, /**< Set an attribute value. */ - SD_BLE_GATTS_VALUE_GET, /**< Get an attribute value. */ - SD_BLE_GATTS_HVX, /**< Handle Value Notification or Indication. */ - SD_BLE_GATTS_SERVICE_CHANGED, /**< Perform a Service Changed Indication to one or more peers. */ - SD_BLE_GATTS_RW_AUTHORIZE_REPLY, /**< Reply to an authorization request for a read or write operation on one or more attributes. */ - SD_BLE_GATTS_SYS_ATTR_SET, /**< Set the persistent system attributes for a connection. */ - SD_BLE_GATTS_SYS_ATTR_GET, /**< Retrieve the persistent system attributes. */ - SD_BLE_GATTS_INITIAL_USER_HANDLE_GET, /**< Retrieve the first valid user handle. */ - SD_BLE_GATTS_ATTR_GET, /**< Retrieve the UUID and/or metadata of an attribute. */ - SD_BLE_GATTS_EXCHANGE_MTU_REPLY /**< Reply to Exchange MTU Request. */ -}; - -/** - * @brief GATT Server Event IDs. - */ -enum BLE_GATTS_EVTS -{ - BLE_GATTS_EVT_WRITE = BLE_GATTS_EVT_BASE, /**< Write operation performed. \n See @ref ble_gatts_evt_write_t. */ - BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST, /**< Read/Write Authorization request. \n Reply with @ref sd_ble_gatts_rw_authorize_reply. \n See @ref ble_gatts_evt_rw_authorize_request_t. */ - BLE_GATTS_EVT_SYS_ATTR_MISSING, /**< A persistent system attribute access is pending. \n Respond with @ref sd_ble_gatts_sys_attr_set. \n See @ref ble_gatts_evt_sys_attr_missing_t. */ - BLE_GATTS_EVT_HVC, /**< Handle Value Confirmation. \n See @ref ble_gatts_evt_hvc_t. */ - BLE_GATTS_EVT_SC_CONFIRM, /**< Service Changed Confirmation. \n No additional event structure applies. */ - BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST, /**< Exchange MTU Request. \n Reply with @ref sd_ble_gatts_exchange_mtu_reply. \n See @ref ble_gatts_evt_exchange_mtu_request_t. */ - BLE_GATTS_EVT_TIMEOUT, /**< Peer failed to respond to an ATT request in time. \n See @ref ble_gatts_evt_timeout_t. */ - BLE_GATTS_EVT_HVN_TX_COMPLETE /**< Handle Value Notification transmission complete. \n See @ref ble_gatts_evt_hvn_tx_complete_t. */ -}; - -/**@brief GATTS Configuration IDs. - * - * IDs that uniquely identify a GATTS configuration. - */ -enum BLE_GATTS_CFGS -{ - BLE_GATTS_CFG_SERVICE_CHANGED = BLE_GATTS_CFG_BASE, /**< Service changed configuration. */ - BLE_GATTS_CFG_ATTR_TAB_SIZE, /**< Attribute table size configuration. */ -}; - -/** @} */ - -/** @addtogroup BLE_GATTS_DEFINES Defines - * @{ */ - -/** @defgroup BLE_ERRORS_GATTS SVC return values specific to GATTS - * @{ */ -#define BLE_ERROR_GATTS_INVALID_ATTR_TYPE (NRF_GATTS_ERR_BASE + 0x000) /**< Invalid attribute type. */ -#define BLE_ERROR_GATTS_SYS_ATTR_MISSING (NRF_GATTS_ERR_BASE + 0x001) /**< System Attributes missing. */ -/** @} */ - -/** @defgroup BLE_GATTS_ATTR_LENS_MAX Maximum attribute lengths - * @{ */ -#define BLE_GATTS_FIX_ATTR_LEN_MAX (510) /**< Maximum length for fixed length Attribute Values. */ -#define BLE_GATTS_VAR_ATTR_LEN_MAX (512) /**< Maximum length for variable length Attribute Values. */ -/** @} */ - -/** @defgroup BLE_GATTS_SRVC_TYPES GATT Server Service Types - * @{ */ -#define BLE_GATTS_SRVC_TYPE_INVALID 0x00 /**< Invalid Service Type. */ -#define BLE_GATTS_SRVC_TYPE_PRIMARY 0x01 /**< Primary Service. */ -#define BLE_GATTS_SRVC_TYPE_SECONDARY 0x02 /**< Secondary Type. */ -/** @} */ - - -/** @defgroup BLE_GATTS_ATTR_TYPES GATT Server Attribute Types - * @{ */ -#define BLE_GATTS_ATTR_TYPE_INVALID 0x00 /**< Invalid Attribute Type. */ -#define BLE_GATTS_ATTR_TYPE_PRIM_SRVC_DECL 0x01 /**< Primary Service Declaration. */ -#define BLE_GATTS_ATTR_TYPE_SEC_SRVC_DECL 0x02 /**< Secondary Service Declaration. */ -#define BLE_GATTS_ATTR_TYPE_INC_DECL 0x03 /**< Include Declaration. */ -#define BLE_GATTS_ATTR_TYPE_CHAR_DECL 0x04 /**< Characteristic Declaration. */ -#define BLE_GATTS_ATTR_TYPE_CHAR_VAL 0x05 /**< Characteristic Value. */ -#define BLE_GATTS_ATTR_TYPE_DESC 0x06 /**< Descriptor. */ -#define BLE_GATTS_ATTR_TYPE_OTHER 0x07 /**< Other, non-GATT specific type. */ -/** @} */ - - -/** @defgroup BLE_GATTS_OPS GATT Server Operations - * @{ */ -#define BLE_GATTS_OP_INVALID 0x00 /**< Invalid Operation. */ -#define BLE_GATTS_OP_WRITE_REQ 0x01 /**< Write Request. */ -#define BLE_GATTS_OP_WRITE_CMD 0x02 /**< Write Command. */ -#define BLE_GATTS_OP_SIGN_WRITE_CMD 0x03 /**< Signed Write Command. */ -#define BLE_GATTS_OP_PREP_WRITE_REQ 0x04 /**< Prepare Write Request. */ -#define BLE_GATTS_OP_EXEC_WRITE_REQ_CANCEL 0x05 /**< Execute Write Request: Cancel all prepared writes. */ -#define BLE_GATTS_OP_EXEC_WRITE_REQ_NOW 0x06 /**< Execute Write Request: Immediately execute all prepared writes. */ -/** @} */ - -/** @defgroup BLE_GATTS_VLOCS GATT Value Locations - * @{ */ -#define BLE_GATTS_VLOC_INVALID 0x00 /**< Invalid Location. */ -#define BLE_GATTS_VLOC_STACK 0x01 /**< Attribute Value is located in stack memory, no user memory is required. */ -#define BLE_GATTS_VLOC_USER 0x02 /**< Attribute Value is located in user memory. This requires the user to maintain a valid buffer through the lifetime of the attribute, since the stack - will read and write directly to the memory using the pointer provided in the APIs. There are no alignment requirements for the buffer. */ -/** @} */ - -/** @defgroup BLE_GATTS_AUTHORIZE_TYPES GATT Server Authorization Types - * @{ */ -#define BLE_GATTS_AUTHORIZE_TYPE_INVALID 0x00 /**< Invalid Type. */ -#define BLE_GATTS_AUTHORIZE_TYPE_READ 0x01 /**< Authorize a Read Operation. */ -#define BLE_GATTS_AUTHORIZE_TYPE_WRITE 0x02 /**< Authorize a Write Request Operation. */ -/** @} */ - -/** @defgroup BLE_GATTS_SYS_ATTR_FLAGS System Attribute Flags - * @{ */ -#define BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS (1 << 0) /**< Restrict system attributes to system services only. */ -#define BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS (1 << 1) /**< Restrict system attributes to user services only. */ -/** @} */ - -/** @defgroup BLE_GATTS_SERVICE_CHANGED Service Changed Inclusion Values - * @{ - */ -#define BLE_GATTS_SERVICE_CHANGED_DEFAULT (1) /**< Default is to include the Service Changed characteristic in the Attribute Table. */ -/** @} */ - -/** @defgroup BLE_GATTS_ATTR_TAB_SIZE Attribute Table size - * @{ - */ -#define BLE_GATTS_ATTR_TAB_SIZE_MIN (248) /**< Minimum Attribute Table size */ -#define BLE_GATTS_ATTR_TAB_SIZE_DEFAULT (1408) /**< Default Attribute Table size. */ -/** @} */ - -/** @defgroup BLE_GATTS_DEFAULTS GATT Server defaults - * @{ - */ -#define BLE_GATTS_HVN_TX_QUEUE_SIZE_DEFAULT 1 /**< Default number of Handle Value Notifications that can be queued for transmission. */ -/** @} */ - -/** @} */ - -/** @addtogroup BLE_GATTS_STRUCTURES Structures - * @{ */ - -/** - * @brief BLE GATTS connection configuration parameters, set with @ref sd_ble_cfg_set. - */ -typedef struct -{ - uint8_t hvn_tx_queue_size; /**< Minimum guaranteed number of Handle Value Notifications that can be queued for transmission. - The default value is @ref BLE_GATTS_HVN_TX_QUEUE_SIZE_DEFAULT */ -} ble_gatts_conn_cfg_t; - -/**@brief Attribute metadata. */ -typedef struct -{ - ble_gap_conn_sec_mode_t read_perm; /**< Read permissions. */ - ble_gap_conn_sec_mode_t write_perm; /**< Write permissions. */ - uint8_t vlen :1; /**< Variable length attribute. */ - uint8_t vloc :2; /**< Value location, see @ref BLE_GATTS_VLOCS.*/ - uint8_t rd_auth :1; /**< Read authorization and value will be requested from the application on every read operation. */ - uint8_t wr_auth :1; /**< Write authorization will be requested from the application on every Write Request operation (but not Write Command). */ -} ble_gatts_attr_md_t; - - -/**@brief GATT Attribute. */ -typedef struct -{ - ble_uuid_t const *p_uuid; /**< Pointer to the attribute UUID. */ - ble_gatts_attr_md_t const *p_attr_md; /**< Pointer to the attribute metadata structure. */ - uint16_t init_len; /**< Initial attribute value length in bytes. */ - uint16_t init_offs; /**< Initial attribute value offset in bytes. If different from zero, the first init_offs bytes of the attribute value will be left uninitialized. */ - uint16_t max_len; /**< Maximum attribute value length in bytes, see @ref BLE_GATTS_ATTR_LENS_MAX for maximum values. */ - uint8_t *p_value; /**< Pointer to the attribute data. Please note that if the @ref BLE_GATTS_VLOC_USER value location is selected in the attribute metadata, this will have to point to a buffer - that remains valid through the lifetime of the attribute. This excludes usage of automatic variables that may go out of scope or any other temporary location. - The stack may access that memory directly without the application's knowledge. For writable characteristics, this value must not be a location in flash memory.*/ -} ble_gatts_attr_t; - -/**@brief GATT Attribute Value. */ -typedef struct -{ - uint16_t len; /**< Length in bytes to be written or read. Length in bytes written or read after successful return.*/ - uint16_t offset; /**< Attribute value offset. */ - uint8_t *p_value; /**< Pointer to where value is stored or will be stored. - If value is stored in user memory, only the attribute length is updated when p_value == NULL. - Set to NULL when reading to obtain the complete length of the attribute value */ -} ble_gatts_value_t; - - -/**@brief GATT Characteristic Presentation Format. */ -typedef struct -{ - uint8_t format; /**< Format of the value, see @ref BLE_GATT_CPF_FORMATS. */ - int8_t exponent; /**< Exponent for integer data types. */ - uint16_t unit; /**< Unit from Bluetooth Assigned Numbers. */ - uint8_t name_space; /**< Namespace from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */ - uint16_t desc; /**< Namespace description from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */ -} ble_gatts_char_pf_t; - - -/**@brief GATT Characteristic metadata. */ -typedef struct -{ - ble_gatt_char_props_t char_props; /**< Characteristic Properties. */ - ble_gatt_char_ext_props_t char_ext_props; /**< Characteristic Extended Properties. */ - uint8_t const *p_char_user_desc; /**< Pointer to a UTF-8 encoded string (non-NULL terminated), NULL if the descriptor is not required. */ - uint16_t char_user_desc_max_size; /**< The maximum size in bytes of the user description descriptor. */ - uint16_t char_user_desc_size; /**< The size of the user description, must be smaller or equal to char_user_desc_max_size. */ - ble_gatts_char_pf_t const *p_char_pf; /**< Pointer to a presentation format structure or NULL if the CPF descriptor is not required. */ - ble_gatts_attr_md_t const *p_user_desc_md; /**< Attribute metadata for the User Description descriptor, or NULL for default values. */ - ble_gatts_attr_md_t const *p_cccd_md; /**< Attribute metadata for the Client Characteristic Configuration Descriptor, or NULL for default values. */ - ble_gatts_attr_md_t const *p_sccd_md; /**< Attribute metadata for the Server Characteristic Configuration Descriptor, or NULL for default values. */ -} ble_gatts_char_md_t; - - -/**@brief GATT Characteristic Definition Handles. */ -typedef struct -{ - uint16_t value_handle; /**< Handle to the characteristic value. */ - uint16_t user_desc_handle; /**< Handle to the User Description descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ - uint16_t cccd_handle; /**< Handle to the Client Characteristic Configuration Descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ - uint16_t sccd_handle; /**< Handle to the Server Characteristic Configuration Descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ -} ble_gatts_char_handles_t; - - -/**@brief GATT HVx parameters. */ -typedef struct -{ - uint16_t handle; /**< Characteristic Value Handle. */ - uint8_t type; /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */ - uint16_t offset; /**< Offset within the attribute value. */ - uint16_t *p_len; /**< Length in bytes to be written, length in bytes written after successful return. */ - uint8_t const *p_data; /**< Actual data content, use NULL to use the current attribute value. */ -} ble_gatts_hvx_params_t; - -/**@brief GATT Authorization parameters. */ -typedef struct -{ - uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ - uint8_t update : 1; /**< If set, data supplied in p_data will be used to update the attribute value. - Please note that for @ref BLE_GATTS_AUTHORIZE_TYPE_WRITE operations this bit must always be set, - as the data to be written needs to be stored and later provided by the application. */ - uint16_t offset; /**< Offset of the attribute value being updated. */ - uint16_t len; /**< Length in bytes of the value in p_data pointer, see @ref BLE_GATTS_ATTR_LENS_MAX. */ - uint8_t const *p_data; /**< Pointer to new value used to update the attribute value. */ -} ble_gatts_authorize_params_t; - -/**@brief GATT Read or Write Authorize Reply parameters. */ -typedef struct -{ - uint8_t type; /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */ - union { - ble_gatts_authorize_params_t read; /**< Read authorization parameters. */ - ble_gatts_authorize_params_t write; /**< Write authorization parameters. */ - } params; /**< Reply Parameters. */ -} ble_gatts_rw_authorize_reply_params_t; - -/**@brief Service Changed Inclusion configuration parameters, set with @ref sd_ble_cfg_set. */ -typedef struct -{ - uint8_t service_changed : 1; /**< If 1, include the Service Changed characteristic in the Attribute Table. Default is @ref BLE_GATTS_SERVICE_CHANGED_DEFAULT. */ -} ble_gatts_cfg_service_changed_t; - -/**@brief Attribute table size configuration parameters, set with @ref sd_ble_cfg_set. - * - * @retval ::NRF_ERROR_INVALID_LENGTH One or more of the following is true: - * - The specified Attribute Table size is too small. - * The minimum acceptable size is defined by @ref BLE_GATTS_ATTR_TAB_SIZE_MIN. - * - The specified Attribute Table size is not a multiple of 4. - */ -typedef struct -{ - uint32_t attr_tab_size; /**< Attribute table size. Default is @ref BLE_GATTS_ATTR_TAB_SIZE_DEFAULT, minimum is @ref BLE_GATTS_ATTR_TAB_SIZE_MIN. */ -} ble_gatts_cfg_attr_tab_size_t; - -/**@brief Config structure for GATTS configurations. */ -typedef union -{ - ble_gatts_cfg_service_changed_t service_changed; /**< Include service changed characteristic, cfg_id is @ref BLE_GATTS_CFG_SERVICE_CHANGED. */ - ble_gatts_cfg_attr_tab_size_t attr_tab_size; /**< Attribute table size, cfg_id is @ref BLE_GATTS_CFG_ATTR_TAB_SIZE. */ -} ble_gatts_cfg_t; - - -/**@brief Event structure for @ref BLE_GATTS_EVT_WRITE. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - ble_uuid_t uuid; /**< Attribute UUID. */ - uint8_t op; /**< Type of write operation, see @ref BLE_GATTS_OPS. */ - uint8_t auth_required; /**< Writing operation deferred due to authorization requirement. Application may use @ref sd_ble_gatts_value_set to finalize the writing operation. */ - uint16_t offset; /**< Offset for the write operation. */ - uint16_t len; /**< Length of the received data. */ - uint8_t data[1]; /**< Received data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gatts_evt_write_t; - -/**@brief Event substructure for authorized read requests, see @ref ble_gatts_evt_rw_authorize_request_t. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - ble_uuid_t uuid; /**< Attribute UUID. */ - uint16_t offset; /**< Offset for the read operation. */ -} ble_gatts_evt_read_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST. */ -typedef struct -{ - uint8_t type; /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */ - union { - ble_gatts_evt_read_t read; /**< Attribute Read Parameters. */ - ble_gatts_evt_write_t write; /**< Attribute Write Parameters. */ - } request; /**< Request Parameters. */ -} ble_gatts_evt_rw_authorize_request_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_SYS_ATTR_MISSING. */ -typedef struct -{ - uint8_t hint; /**< Hint (currently unused). */ -} ble_gatts_evt_sys_attr_missing_t; - - -/**@brief Event structure for @ref BLE_GATTS_EVT_HVC. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ -} ble_gatts_evt_hvc_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST. */ -typedef struct -{ - uint16_t client_rx_mtu; /**< Client RX MTU size. */ -} ble_gatts_evt_exchange_mtu_request_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_TIMEOUT. */ -typedef struct -{ - uint8_t src; /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */ -} ble_gatts_evt_timeout_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_HVN_TX_COMPLETE. */ -typedef struct -{ - uint8_t count; /**< Number of notification transmissions completed. */ -} ble_gatts_evt_hvn_tx_complete_t; - -/**@brief GATTS event structure. */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle on which the event occurred. */ - union - { - ble_gatts_evt_write_t write; /**< Write Event Parameters. */ - ble_gatts_evt_rw_authorize_request_t authorize_request; /**< Read or Write Authorize Request Parameters. */ - ble_gatts_evt_sys_attr_missing_t sys_attr_missing; /**< System attributes missing. */ - ble_gatts_evt_hvc_t hvc; /**< Handle Value Confirmation Event Parameters. */ - ble_gatts_evt_exchange_mtu_request_t exchange_mtu_request; /**< Exchange MTU Request Event Parameters. */ - ble_gatts_evt_timeout_t timeout; /**< Timeout Event. */ - ble_gatts_evt_hvn_tx_complete_t hvn_tx_complete; /**< Handle Value Notification transmission complete Event Parameters. */ - } params; /**< Event Parameters. */ -} ble_gatts_evt_t; - -/** @} */ - -/** @addtogroup BLE_GATTS_FUNCTIONS Functions - * @{ */ - -/**@brief Add a service declaration to the Attribute Table. - * - * @note Secondary Services are only relevant in the context of the entity that references them, it is therefore forbidden to - * add a secondary service declaration that is not referenced by another service later in the Attribute Table. - * - * @mscs - * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} - * @endmscs - * - * @param[in] type Toggles between primary and secondary services, see @ref BLE_GATTS_SRVC_TYPES. - * @param[in] p_uuid Pointer to service UUID. - * @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored. - * - * @retval ::NRF_SUCCESS Successfully added a service declaration. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, Vendor Specific UUIDs need to be present in the table. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - */ -SVCALL(SD_BLE_GATTS_SERVICE_ADD, uint32_t, sd_ble_gatts_service_add(uint8_t type, ble_uuid_t const *p_uuid, uint16_t *p_handle)); - - -/**@brief Add an include declaration to the Attribute Table. - * - * @note It is currently only possible to add an include declaration to the last added service (i.e. only sequential population is supported at this time). - * - * @note The included service must already be present in the Attribute Table prior to this call. - * - * @mscs - * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} - * @endmscs - * - * @param[in] service_handle Handle of the service where the included service is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. - * @param[in] inc_srvc_handle Handle of the included service. - * @param[out] p_include_handle Pointer to a 16-bit word where the assigned handle will be stored. - * - * @retval ::NRF_SUCCESS Successfully added an include declaration. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, handle values need to match previously added services. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_NOT_SUPPORTED Feature is not supported, service_handle must be that of the last added service. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, self inclusions are not allowed. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. - */ -SVCALL(SD_BLE_GATTS_INCLUDE_ADD, uint32_t, sd_ble_gatts_include_add(uint16_t service_handle, uint16_t inc_srvc_handle, uint16_t *p_include_handle)); - - -/**@brief Add a characteristic declaration, a characteristic value declaration and optional characteristic descriptor declarations to the Attribute Table. - * - * @note It is currently only possible to add a characteristic to the last added service (i.e. only sequential population is supported at this time). - * - * @note Several restrictions apply to the parameters, such as matching permissions between the user description descriptor and the writable auxiliaries bits, - * readable (no security) and writable (selectable) CCCDs and SCCDs and valid presentation format values. - * - * @note If no metadata is provided for the optional descriptors, their permissions will be derived from the characteristic permissions. - * - * @mscs - * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} - * @endmscs - * - * @param[in] service_handle Handle of the service where the characteristic is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. - * @param[in] p_char_md Characteristic metadata. - * @param[in] p_attr_char_value Pointer to the attribute structure corresponding to the characteristic value. - * @param[out] p_handles Pointer to the structure where the assigned handles will be stored. - * - * @retval ::NRF_SUCCESS Successfully added a characteristic. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, service handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a service context is required. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. - */ -SVCALL(SD_BLE_GATTS_CHARACTERISTIC_ADD, uint32_t, sd_ble_gatts_characteristic_add(uint16_t service_handle, ble_gatts_char_md_t const *p_char_md, ble_gatts_attr_t const *p_attr_char_value, ble_gatts_char_handles_t *p_handles)); - - -/**@brief Add a descriptor to the Attribute Table. - * - * @note It is currently only possible to add a descriptor to the last added characteristic (i.e. only sequential population is supported at this time). - * - * @mscs - * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} - * @endmscs - * - * @param[in] char_handle Handle of the characteristic where the descriptor is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. - * @param[in] p_attr Pointer to the attribute structure. - * @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored. - * - * @retval ::NRF_SUCCESS Successfully added a descriptor. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, characteristic handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a characteristic context is required. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. - */ -SVCALL(SD_BLE_GATTS_DESCRIPTOR_ADD, uint32_t, sd_ble_gatts_descriptor_add(uint16_t char_handle, ble_gatts_attr_t const *p_attr, uint16_t *p_handle)); - -/**@brief Set the value of a given attribute. - * - * @note Values other than system attributes can be set at any time, regardless of whether any active connections exist. - * - * @mscs - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. Ignored if the value does not belong to a system attribute. - * @param[in] handle Attribute handle. - * @param[in,out] p_value Attribute value information. - * - * @retval ::NRF_SUCCESS Successfully set the value of the attribute. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden handle supplied, certain attributes are not modifiable by the application. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied on a system attribute. - */ -SVCALL(SD_BLE_GATTS_VALUE_SET, uint32_t, sd_ble_gatts_value_set(uint16_t conn_handle, uint16_t handle, ble_gatts_value_t *p_value)); - -/**@brief Get the value of a given attribute. - * - * @note If the attribute value is longer than the size of the supplied buffer, - * p_len will return the total attribute value length (excluding offset), - * and not the number of bytes actually returned in p_data. - * The application may use this information to allocate a suitable buffer size. - * - * @note When retrieving system attribute values with this function, the connection handle - * may refer to an already disconnected connection. Refer to the documentation of - * @ref sd_ble_gatts_sys_attr_get for further information. - * - * @param[in] conn_handle Connection handle. Ignored if the value does not belong to a system attribute. - * @param[in] handle Attribute handle. - * @param[in,out] p_value Attribute value information. - * - * @retval ::NRF_SUCCESS Successfully retrieved the value of the attribute. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid attribute offset supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied on a system attribute. - * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. - */ -SVCALL(SD_BLE_GATTS_VALUE_GET, uint32_t, sd_ble_gatts_value_get(uint16_t conn_handle, uint16_t handle, ble_gatts_value_t *p_value)); - -/**@brief Notify or Indicate an attribute value. - * - * @details This function checks for the relevant Client Characteristic Configuration descriptor value to verify that the relevant operation - * (notification or indication) has been enabled by the client. It is also able to update the attribute value before issuing the PDU, so that - * the application can atomically perform a value update and a server initiated transaction with a single API call. - * - * @note The local attribute value may be updated even if an outgoing packet is not sent to the peer due to an error during execution. - * The Attribute Table has been updated if one of the following error codes is returned: @ref NRF_ERROR_INVALID_STATE, @ref NRF_ERROR_BUSY, - * @ref NRF_ERROR_FORBIDDEN, @ref BLE_ERROR_GATTS_SYS_ATTR_MISSING and @ref NRF_ERROR_RESOURCES. - * The caller can check whether the value has been updated by looking at the contents of *(p_hvx_params->p_len). - * - * @note Only one indication procedure can be ongoing per connection at a time. - * If the application tries to indicate an attribute value while another indication procedure is ongoing, - * the function call will return @ref NRF_ERROR_BUSY. - * A @ref BLE_GATTS_EVT_HVC event will be issued as soon as the confirmation arrives from the peer. - * - * @note The number of Handle Value Notifications that can be queued is configured by @ref ble_gatts_conn_cfg_t::hvn_tx_queue_size - * When the queue is full, the function call will return @ref NRF_ERROR_RESOURCES. - * A @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event will be issued as soon as the transmission of the notification is complete. - * - * @note The application can keep track of the available queue element count for notifications by following the procedure below: - * - Store initial queue element count in a variable. - * - Decrement the variable, which stores the currently available queue element count, by one when a call to this function returns @ref NRF_SUCCESS. - * - Increment the variable, which stores the current available queue element count, by the count variable in @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event. - * - * @events - * @event{@ref BLE_GATTS_EVT_HVN_TX_COMPLETE, Notification transmission complete.} - * @event{@ref BLE_GATTS_EVT_HVC, Confirmation received from the peer.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC} - * @mmsc{@ref BLE_GATTS_HVN_MSC} - * @mmsc{@ref BLE_GATTS_HVI_MSC} - * @mmsc{@ref BLE_GATTS_HVX_DISABLED_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_hvx_params Pointer to an HVx parameters structure. If the p_data member contains a non-NULL pointer the attribute value will be updated with - * the contents pointed by it before sending the notification or indication. - * - * @retval ::NRF_SUCCESS Successfully queued a notification or indication for transmission, and optionally updated the attribute value. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE One or more of the following is true: - * - Invalid Connection State - * - Notifications and/or indications not enabled in the CCCD - * - An ATT_MTU exchange is ongoing - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied. Only attributes added directly by the application are available to notify and indicate. - * @retval ::BLE_ERROR_GATTS_INVALID_ATTR_TYPE Invalid attribute type(s) supplied, only characteristic values may be notified and indicated. - * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. - * @retval ::NRF_ERROR_FORBIDDEN The connection's current security level is lower than the one required by the write permissions of the CCCD associated with this characteristic. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. - * @retval ::NRF_ERROR_BUSY For @ref BLE_GATT_HVX_INDICATION, GATT Server procedure already in progress or blocked because of a previous GATT procedure timeout. - Wait for a @ref BLE_GATTS_EVT_HVC event and retry. - For @ref BLE_GATT_HVX_NOTIFICATION it can only mean GATT procedure timeout. - * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. - * @retval ::NRF_ERROR_RESOURCES Too many notifications queued. - * Wait for a @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event and retry. - */ -SVCALL(SD_BLE_GATTS_HVX, uint32_t, sd_ble_gatts_hvx(uint16_t conn_handle, ble_gatts_hvx_params_t const *p_hvx_params)); - -/**@brief Indicate the Service Changed attribute value. - * - * @details This call will send a Handle Value Indication to one or more peers connected to inform them that the Attribute - * Table layout has changed. As soon as the peer has confirmed the indication, a @ref BLE_GATTS_EVT_SC_CONFIRM event will - * be issued. - * - * @note Some of the restrictions and limitations that apply to @ref sd_ble_gatts_hvx also apply here. - * - * @events - * @event{@ref BLE_GATTS_EVT_SC_CONFIRM, Confirmation of attribute table change received from peer.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTS_SC_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] start_handle Start of affected attribute handle range. - * @param[in] end_handle End of affected attribute handle range. - * - * @retval ::NRF_SUCCESS Successfully queued the Service Changed indication for transmission. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_NOT_SUPPORTED Service Changed not enabled at initialization. See @ref - * sd_ble_cfg_set and @ref ble_gatts_cfg_service_changed_t. - * @retval ::NRF_ERROR_INVALID_STATE One or more of the following is true: - * - Invalid Connection State - * - Notifications and/or indications not enabled in the CCCD - * - An ATT_MTU exchange is ongoing - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied, handles must be in the range populated by the application. - * @retval ::NRF_ERROR_BUSY GATT Server procedure already in progress or blocked because of a previous GATT procedure timeout. - * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. - */ -SVCALL(SD_BLE_GATTS_SERVICE_CHANGED, uint32_t, sd_ble_gatts_service_changed(uint16_t conn_handle, uint16_t start_handle, uint16_t end_handle)); - -/**@brief Respond to a Read/Write authorization request. - * - * @note This call should only be used as a response to a @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST event issued to the application. - * - * @mscs - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} - * @mmsc{@ref BLE_GATTS_READ_REQ_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_WRITE_REQ_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_PEER_CANCEL_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_rw_authorize_reply_params Pointer to a structure with the attribute provided by the application. - * - * @note @ref ble_gatts_authorize_params_t::p_data is ignored when this function is used to respond - * to a @ref BLE_GATTS_AUTHORIZE_TYPE_READ event if @ref ble_gatts_authorize_params_t::update - * is set to 0. - * - * @retval ::NRF_SUCCESS Successfully queued a response to the peer, and in the case of a write operation, Attribute Table updated. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no authorization request pending. - * @retval ::NRF_ERROR_INVALID_PARAM Authorization op invalid, - * handle supplied does not match requested handle, - * or invalid data to be written provided by the application. - */ -SVCALL(SD_BLE_GATTS_RW_AUTHORIZE_REPLY, uint32_t, sd_ble_gatts_rw_authorize_reply(uint16_t conn_handle, ble_gatts_rw_authorize_reply_params_t const *p_rw_authorize_reply_params)); - - -/**@brief Update persistent system attribute information. - * - * @details Supply information about persistent system attributes to the stack, - * previously obtained using @ref sd_ble_gatts_sys_attr_get. - * This call is only allowed for active connections, and is usually - * made immediately after a connection is established with an known bonded device, - * often as a response to a @ref BLE_GATTS_EVT_SYS_ATTR_MISSING. - * - * p_sysattrs may point directly to the application's stored copy of the system attributes - * obtained using @ref sd_ble_gatts_sys_attr_get. - * If the pointer is NULL, the system attribute info is initialized, assuming that - * the application does not have any previously saved system attribute data for this device. - * - * @note The state of persistent system attributes is reset upon connection establishment and then remembered for its duration. - * - * @note If this call returns with an error code different from @ref NRF_SUCCESS, the storage of persistent system attributes may have been completed only partially. - * This means that the state of the attribute table is undefined, and the application should either provide a new set of attributes using this same call or - * reset the SoftDevice to return to a known state. - * - * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS is used with this function, only the system attributes included in system services will be modified. - * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS is used with this function, only the system attributes included in user services will be modified. - * - * @mscs - * @mmsc{@ref BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC} - * @mmsc{@ref BLE_GATTS_SYS_ATTRS_UNK_PEER_MSC} - * @mmsc{@ref BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_sys_attr_data Pointer to a saved copy of system attributes supplied to the stack, or NULL. - * @param[in] len Size of data pointed by p_sys_attr_data, in octets. - * @param[in] flags Optional additional flags, see @ref BLE_GATTS_SYS_ATTR_FLAGS - * - * @retval ::NRF_SUCCESS Successfully set the system attribute information. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid flags supplied. - * @retval ::NRF_ERROR_INVALID_DATA Invalid data supplied, the data should be exactly the same as retrieved with @ref sd_ble_gatts_sys_attr_get. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - */ -SVCALL(SD_BLE_GATTS_SYS_ATTR_SET, uint32_t, sd_ble_gatts_sys_attr_set(uint16_t conn_handle, uint8_t const *p_sys_attr_data, uint16_t len, uint32_t flags)); - - -/**@brief Retrieve persistent system attribute information from the stack. - * - * @details This call is used to retrieve information about values to be stored persistently by the application - * during the lifetime of a connection or after it has been terminated. When a new connection is established with the same bonded device, - * the system attribute information retrieved with this function should be restored using using @ref sd_ble_gatts_sys_attr_set. - * If retrieved after disconnection, the data should be read before a new connection established. The connection handle for - * the previous, now disconnected, connection will remain valid until a new one is created to allow this API call to refer to it. - * Connection handles belonging to active connections can be used as well, but care should be taken since the system attributes - * may be written to at any time by the peer during a connection's lifetime. - * - * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS is used with this function, only the system attributes included in system services will be returned. - * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS is used with this function, only the system attributes included in user services will be returned. - * - * @mscs - * @mmsc{@ref BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle of the recently terminated connection. - * @param[out] p_sys_attr_data Pointer to a buffer where updated information about system attributes will be filled in. The format of the data is described - * in @ref BLE_GATTS_SYS_ATTRS_FORMAT. NULL can be provided to obtain the length of the data. - * @param[in,out] p_len Size of application buffer if p_sys_attr_data is not NULL. Unconditionally updated to actual length of system attribute data. - * @param[in] flags Optional additional flags, see @ref BLE_GATTS_SYS_ATTR_FLAGS - * - * @retval ::NRF_SUCCESS Successfully retrieved the system attribute information. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid flags supplied. - * @retval ::NRF_ERROR_DATA_SIZE The system attribute information did not fit into the provided buffer. - * @retval ::NRF_ERROR_NOT_FOUND No system attributes found. - */ -SVCALL(SD_BLE_GATTS_SYS_ATTR_GET, uint32_t, sd_ble_gatts_sys_attr_get(uint16_t conn_handle, uint8_t *p_sys_attr_data, uint16_t *p_len, uint32_t flags)); - - -/**@brief Retrieve the first valid user attribute handle. - * - * @param[out] p_handle Pointer to an integer where the handle will be stored. - * - * @retval ::NRF_SUCCESS Successfully retrieved the handle. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - */ -SVCALL(SD_BLE_GATTS_INITIAL_USER_HANDLE_GET, uint32_t, sd_ble_gatts_initial_user_handle_get(uint16_t *p_handle)); - -/**@brief Retrieve the attribute UUID and/or metadata. - * - * @param[in] handle Attribute handle - * @param[out] p_uuid UUID of the attribute. Use NULL to omit this field. - * @param[out] p_md Metadata of the attribute. Use NULL to omit this field. - * - * @retval ::NRF_SUCCESS Successfully retrieved the attribute metadata, - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameters supplied. Returned when both @c p_uuid and @c p_md are NULL. - * @retval ::NRF_ERROR_NOT_FOUND Attribute was not found. - */ -SVCALL(SD_BLE_GATTS_ATTR_GET, uint32_t, sd_ble_gatts_attr_get(uint16_t handle, ble_uuid_t * p_uuid, ble_gatts_attr_md_t * p_md)); - -/**@brief Reply to an ATT_MTU exchange request by sending an Exchange MTU Response to the client. - * - * @details This function is only used to reply to a @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST event. - * - * @details The SoftDevice sets ATT_MTU to the minimum of: - * - The Client RX MTU value from @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST, and - * - The Server RX MTU value. - * - * However, the SoftDevice never sets ATT_MTU lower than @ref BLE_GATT_ATT_MTU_DEFAULT. - * - * @mscs - * @mmsc{@ref BLE_GATTS_MTU_EXCHANGE} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] server_rx_mtu Server RX MTU size. - * - The minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. - * - The maximum value is @ref ble_gatt_conn_cfg_t::att_mtu in the connection configuration - * used for this connection. - * - The value must be equal to Client RX MTU size given in @ref sd_ble_gattc_exchange_mtu_request - * if an ATT_MTU exchange has already been performed in the other direction. - * - * @retval ::NRF_SUCCESS Successfully sent response to the client. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no ATT_MTU exchange request pending. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid Server RX MTU size supplied. - * @retval ::NRF_ERROR_BUSY GATT Blocked because of a previous GATT procedure timeout. - */ -SVCALL(SD_BLE_GATTS_EXCHANGE_MTU_REPLY, uint32_t, sd_ble_gatts_exchange_mtu_reply(uint16_t conn_handle, uint16_t server_rx_mtu)); -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // BLE_GATTS_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/ble_hci.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/ble_hci.h deleted file mode 100644 index f0dde9a03ad..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/ble_hci.h +++ /dev/null @@ -1,135 +0,0 @@ -/* - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_COMMON - @{ -*/ - - -#ifndef BLE_HCI_H__ -#define BLE_HCI_H__ -#ifdef __cplusplus -extern "C" { -#endif - -/** @defgroup BLE_HCI_STATUS_CODES Bluetooth status codes - * @{ */ - -#define BLE_HCI_STATUS_CODE_SUCCESS 0x00 /**< Success. */ -#define BLE_HCI_STATUS_CODE_UNKNOWN_BTLE_COMMAND 0x01 /**< Unknown BLE Command. */ -#define BLE_HCI_STATUS_CODE_UNKNOWN_CONNECTION_IDENTIFIER 0x02 /**< Unknown Connection Identifier. */ -/*0x03 Hardware Failure -0x04 Page Timeout -*/ -#define BLE_HCI_AUTHENTICATION_FAILURE 0x05 /**< Authentication Failure. */ -#define BLE_HCI_STATUS_CODE_PIN_OR_KEY_MISSING 0x06 /**< Pin or Key missing. */ -#define BLE_HCI_MEMORY_CAPACITY_EXCEEDED 0x07 /**< Memory Capacity Exceeded. */ -#define BLE_HCI_CONNECTION_TIMEOUT 0x08 /**< Connection Timeout. */ -/*0x09 Connection Limit Exceeded -0x0A Synchronous Connection Limit To A Device Exceeded -0x0B ACL Connection Already Exists*/ -#define BLE_HCI_STATUS_CODE_COMMAND_DISALLOWED 0x0C /**< Command Disallowed. */ -/*0x0D Connection Rejected due to Limited Resources -0x0E Connection Rejected Due To Security Reasons -0x0F Connection Rejected due to Unacceptable BD_ADDR -0x10 Connection Accept Timeout Exceeded -0x11 Unsupported Feature or Parameter Value*/ -#define BLE_HCI_STATUS_CODE_INVALID_BTLE_COMMAND_PARAMETERS 0x12 /**< Invalid BLE Command Parameters. */ -#define BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION 0x13 /**< Remote User Terminated Connection. */ -#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_LOW_RESOURCES 0x14 /**< Remote Device Terminated Connection due to low resources.*/ -#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_POWER_OFF 0x15 /**< Remote Device Terminated Connection due to power off. */ -#define BLE_HCI_LOCAL_HOST_TERMINATED_CONNECTION 0x16 /**< Local Host Terminated Connection. */ -/* -0x17 Repeated Attempts -0x18 Pairing Not Allowed -0x19 Unknown LMP PDU -*/ -#define BLE_HCI_UNSUPPORTED_REMOTE_FEATURE 0x1A /**< Unsupported Remote Feature. */ -/* -0x1B SCO Offset Rejected -0x1C SCO Interval Rejected -0x1D SCO Air Mode Rejected*/ -#define BLE_HCI_STATUS_CODE_INVALID_LMP_PARAMETERS 0x1E /**< Invalid LMP Parameters. */ -#define BLE_HCI_STATUS_CODE_UNSPECIFIED_ERROR 0x1F /**< Unspecified Error. */ -/*0x20 Unsupported LMP Parameter Value -0x21 Role Change Not Allowed -*/ -#define BLE_HCI_STATUS_CODE_LMP_RESPONSE_TIMEOUT 0x22 /**< LMP Response Timeout. */ -#define BLE_HCI_STATUS_CODE_LMP_ERROR_TRANSACTION_COLLISION 0x23 /**< LMP Error Transaction Collision/LL Procedure Collision. */ -#define BLE_HCI_STATUS_CODE_LMP_PDU_NOT_ALLOWED 0x24 /**< LMP PDU Not Allowed. */ -/*0x25 Encryption Mode Not Acceptable -0x26 Link Key Can Not be Changed -0x27 Requested QoS Not Supported -*/ -#define BLE_HCI_INSTANT_PASSED 0x28 /**< Instant Passed. */ -#define BLE_HCI_PAIRING_WITH_UNIT_KEY_UNSUPPORTED 0x29 /**< Pairing with Unit Key Unsupported. */ -#define BLE_HCI_DIFFERENT_TRANSACTION_COLLISION 0x2A /**< Different Transaction Collision. */ -/* -0x2B Reserved -0x2C QoS Unacceptable Parameter -0x2D QoS Rejected -0x2E Channel Classification Not Supported -0x2F Insufficient Security -*/ -#define BLE_HCI_PARAMETER_OUT_OF_MANDATORY_RANGE 0x30 /**< Parameter Out Of Mandatory Range. */ -/* -0x31 Reserved -0x32 Role Switch Pending -0x33 Reserved -0x34 Reserved Slot Violation -0x35 Role Switch Failed -0x36 Extended Inquiry Response Too Large -0x37 Secure Simple Pairing Not Supported By Host. -0x38 Host Busy - Pairing -0x39 Connection Rejected due to No Suitable Channel Found*/ -#define BLE_HCI_CONTROLLER_BUSY 0x3A /**< Controller Busy. */ -#define BLE_HCI_CONN_INTERVAL_UNACCEPTABLE 0x3B /**< Connection Interval Unacceptable. */ -#define BLE_HCI_DIRECTED_ADVERTISER_TIMEOUT 0x3C /**< Directed Advertisement Timeout. */ -#define BLE_HCI_CONN_TERMINATED_DUE_TO_MIC_FAILURE 0x3D /**< Connection Terminated due to MIC Failure. */ -#define BLE_HCI_CONN_FAILED_TO_BE_ESTABLISHED 0x3E /**< Connection Failed to be Established. */ - -/** @} */ - - -#ifdef __cplusplus -} -#endif -#endif // BLE_HCI_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/ble_ranges.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/ble_ranges.h deleted file mode 100644 index 50f0d4c358a..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/ble_ranges.h +++ /dev/null @@ -1,148 +0,0 @@ -/* - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_COMMON - @{ - @defgroup ble_ranges Module specific SVC, event and option number subranges - @{ - - @brief Definition of SVC, event and option number subranges for each API module. - - @note - SVCs, event and option numbers are split into subranges for each API module. - Each module receives its entire allocated range of SVC calls, whether implemented or not, - but return BLE_ERROR_NOT_SUPPORTED for unimplemented or undefined calls in its range. - - Note that the symbols BLE__SVC_LAST is the end of the allocated SVC range, - rather than the last SVC function call actually defined and implemented. - - Specific SVC, event and option values are defined in each module's ble_.h file, - which defines names of each individual SVC code based on the range start value. -*/ - -#ifndef BLE_RANGES_H__ -#define BLE_RANGES_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#define BLE_SVC_BASE 0x60 /**< Common BLE SVC base. */ -#define BLE_SVC_LAST 0x6B /**< Common BLE SVC last. */ - -#define BLE_GAP_SVC_BASE 0x6C /**< GAP BLE SVC base. */ -#define BLE_GAP_SVC_LAST 0x93 /**< GAP BLE SVC last. */ - -#define BLE_GATTC_SVC_BASE 0x94 /**< GATTC BLE SVC base. */ -#define BLE_GATTC_SVC_LAST 0x9F /**< GATTC BLE SVC last. */ - -#define BLE_GATTS_SVC_BASE 0xA0 /**< GATTS BLE SVC base. */ -#define BLE_GATTS_SVC_LAST 0xAF /**< GATTS BLE SVC last. */ - - - -#define BLE_EVT_INVALID 0x00 /**< Invalid BLE Event. */ - -#define BLE_EVT_BASE 0x01 /**< Common BLE Event base. */ -#define BLE_EVT_LAST 0x0F /**< Common BLE Event last. */ - -#define BLE_GAP_EVT_BASE 0x10 /**< GAP BLE Event base. */ -#define BLE_GAP_EVT_LAST 0x2F /**< GAP BLE Event last. */ - -#define BLE_GATTC_EVT_BASE 0x30 /**< GATTC BLE Event base. */ -#define BLE_GATTC_EVT_LAST 0x4F /**< GATTC BLE Event last. */ - -#define BLE_GATTS_EVT_BASE 0x50 /**< GATTS BLE Event base. */ -#define BLE_GATTS_EVT_LAST 0x6F /**< GATTS BLE Event last. */ - - - -#define BLE_OPT_INVALID 0x00 /**< Invalid BLE Option. */ - -#define BLE_OPT_BASE 0x01 /**< Common BLE Option base. */ -#define BLE_OPT_LAST 0x1F /**< Common BLE Option last. */ - -#define BLE_GAP_OPT_BASE 0x20 /**< GAP BLE Option base. */ -#define BLE_GAP_OPT_LAST 0x3F /**< GAP BLE Option last. */ - -#define BLE_GATT_OPT_BASE 0x40 /**< GATT BLE Option base. */ -#define BLE_GATT_OPT_LAST 0x5F /**< GATT BLE Option last. */ - -#define BLE_GATTC_OPT_BASE 0x60 /**< GATTC BLE Option base. */ -#define BLE_GATTC_OPT_LAST 0x7F /**< GATTC BLE Option last. */ - -#define BLE_GATTS_OPT_BASE 0x80 /**< GATTS BLE Option base. */ -#define BLE_GATTS_OPT_LAST 0x9F /**< GATTS BLE Option last. */ - - - -#define BLE_CFG_INVALID 0x00 /**< Invalid BLE configuration. */ - -#define BLE_CFG_BASE 0x01 /**< Common BLE configuration base. */ -#define BLE_CFG_LAST 0x1F /**< Common BLE configuration last. */ - -#define BLE_CONN_CFG_BASE 0x20 /**< BLE connection configuration base. */ -#define BLE_CONN_CFG_LAST 0x3F /**< BLE connection configuration last. */ - -#define BLE_GAP_CFG_BASE 0x40 /**< GAP BLE configuration base. */ -#define BLE_GAP_CFG_LAST 0x5F /**< GAP BLE configuration last. */ - -#define BLE_GATT_CFG_BASE 0x60 /**< GATT BLE configuration base. */ -#define BLE_GATT_CFG_LAST 0x7F /**< GATT BLE configuration last. */ - -#define BLE_GATTC_CFG_BASE 0x80 /**< GATTC BLE configuration base. */ -#define BLE_GATTC_CFG_LAST 0x9F /**< GATTC BLE configuration last. */ - -#define BLE_GATTS_CFG_BASE 0xA0 /**< GATTS BLE configuration base. */ -#define BLE_GATTS_CFG_LAST 0xBF /**< GATTS BLE configuration last. */ - - - - - - -#ifdef __cplusplus -} -#endif -#endif /* BLE_RANGES_H__ */ - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/ble_types.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/ble_types.h deleted file mode 100644 index 88c93180c83..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/ble_types.h +++ /dev/null @@ -1,215 +0,0 @@ -/* - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_COMMON - @{ - @defgroup ble_types Common types and macro definitions - @{ - - @brief Common types and macro definitions for the BLE SoftDevice. - */ - -#ifndef BLE_TYPES_H__ -#define BLE_TYPES_H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_TYPES_DEFINES Defines - * @{ */ - -/** @defgroup BLE_CONN_HANDLES BLE Connection Handles - * @{ */ -#define BLE_CONN_HANDLE_INVALID 0xFFFF /**< Invalid Connection Handle. */ -#define BLE_CONN_HANDLE_ALL 0xFFFE /**< Applies to all Connection Handles. */ -/** @} */ - - -/** @defgroup BLE_UUID_VALUES Assigned Values for BLE UUIDs - * @{ */ -/* Generic UUIDs, applicable to all services */ -#define BLE_UUID_UNKNOWN 0x0000 /**< Reserved UUID. */ -#define BLE_UUID_SERVICE_PRIMARY 0x2800 /**< Primary Service. */ -#define BLE_UUID_SERVICE_SECONDARY 0x2801 /**< Secondary Service. */ -#define BLE_UUID_SERVICE_INCLUDE 0x2802 /**< Include. */ -#define BLE_UUID_CHARACTERISTIC 0x2803 /**< Characteristic. */ -#define BLE_UUID_DESCRIPTOR_CHAR_EXT_PROP 0x2900 /**< Characteristic Extended Properties Descriptor. */ -#define BLE_UUID_DESCRIPTOR_CHAR_USER_DESC 0x2901 /**< Characteristic User Description Descriptor. */ -#define BLE_UUID_DESCRIPTOR_CLIENT_CHAR_CONFIG 0x2902 /**< Client Characteristic Configuration Descriptor. */ -#define BLE_UUID_DESCRIPTOR_SERVER_CHAR_CONFIG 0x2903 /**< Server Characteristic Configuration Descriptor. */ -#define BLE_UUID_DESCRIPTOR_CHAR_PRESENTATION_FORMAT 0x2904 /**< Characteristic Presentation Format Descriptor. */ -#define BLE_UUID_DESCRIPTOR_CHAR_AGGREGATE_FORMAT 0x2905 /**< Characteristic Aggregate Format Descriptor. */ -/* GATT specific UUIDs */ -#define BLE_UUID_GATT 0x1801 /**< Generic Attribute Profile. */ -#define BLE_UUID_GATT_CHARACTERISTIC_SERVICE_CHANGED 0x2A05 /**< Service Changed Characteristic. */ -/* GAP specific UUIDs */ -#define BLE_UUID_GAP 0x1800 /**< Generic Access Profile. */ -#define BLE_UUID_GAP_CHARACTERISTIC_DEVICE_NAME 0x2A00 /**< Device Name Characteristic. */ -#define BLE_UUID_GAP_CHARACTERISTIC_APPEARANCE 0x2A01 /**< Appearance Characteristic. */ -#define BLE_UUID_GAP_CHARACTERISTIC_RECONN_ADDR 0x2A03 /**< Reconnection Address Characteristic. */ -#define BLE_UUID_GAP_CHARACTERISTIC_PPCP 0x2A04 /**< Peripheral Preferred Connection Parameters Characteristic. */ -#define BLE_UUID_GAP_CHARACTERISTIC_CAR 0x2AA6 /**< Central Address Resolution Characteristic. */ -#define BLE_UUID_GAP_CHARACTERISTIC_RPA_ONLY 0x2AC9 /**< Resolvable Private Address Only Characteristic. */ -/** @} */ - - -/** @defgroup BLE_UUID_TYPES Types of UUID - * @{ */ -#define BLE_UUID_TYPE_UNKNOWN 0x00 /**< Invalid UUID type. */ -#define BLE_UUID_TYPE_BLE 0x01 /**< Bluetooth SIG UUID (16-bit). */ -#define BLE_UUID_TYPE_VENDOR_BEGIN 0x02 /**< Vendor UUID types start at this index (128-bit). */ -/** @} */ - - -/** @defgroup BLE_APPEARANCES Bluetooth Appearance values - * @note Retrieved from http://developer.bluetooth.org/gatt/characteristics/Pages/CharacteristicViewer.aspx?u=org.bluetooth.characteristic.gap.appearance.xml - * @{ */ -#define BLE_APPEARANCE_UNKNOWN 0 /**< Unknown. */ -#define BLE_APPEARANCE_GENERIC_PHONE 64 /**< Generic Phone. */ -#define BLE_APPEARANCE_GENERIC_COMPUTER 128 /**< Generic Computer. */ -#define BLE_APPEARANCE_GENERIC_WATCH 192 /**< Generic Watch. */ -#define BLE_APPEARANCE_WATCH_SPORTS_WATCH 193 /**< Watch: Sports Watch. */ -#define BLE_APPEARANCE_GENERIC_CLOCK 256 /**< Generic Clock. */ -#define BLE_APPEARANCE_GENERIC_DISPLAY 320 /**< Generic Display. */ -#define BLE_APPEARANCE_GENERIC_REMOTE_CONTROL 384 /**< Generic Remote Control. */ -#define BLE_APPEARANCE_GENERIC_EYE_GLASSES 448 /**< Generic Eye-glasses. */ -#define BLE_APPEARANCE_GENERIC_TAG 512 /**< Generic Tag. */ -#define BLE_APPEARANCE_GENERIC_KEYRING 576 /**< Generic Keyring. */ -#define BLE_APPEARANCE_GENERIC_MEDIA_PLAYER 640 /**< Generic Media Player. */ -#define BLE_APPEARANCE_GENERIC_BARCODE_SCANNER 704 /**< Generic Barcode Scanner. */ -#define BLE_APPEARANCE_GENERIC_THERMOMETER 768 /**< Generic Thermometer. */ -#define BLE_APPEARANCE_THERMOMETER_EAR 769 /**< Thermometer: Ear. */ -#define BLE_APPEARANCE_GENERIC_HEART_RATE_SENSOR 832 /**< Generic Heart rate Sensor. */ -#define BLE_APPEARANCE_HEART_RATE_SENSOR_HEART_RATE_BELT 833 /**< Heart Rate Sensor: Heart Rate Belt. */ -#define BLE_APPEARANCE_GENERIC_BLOOD_PRESSURE 896 /**< Generic Blood Pressure. */ -#define BLE_APPEARANCE_BLOOD_PRESSURE_ARM 897 /**< Blood Pressure: Arm. */ -#define BLE_APPEARANCE_BLOOD_PRESSURE_WRIST 898 /**< Blood Pressure: Wrist. */ -#define BLE_APPEARANCE_GENERIC_HID 960 /**< Human Interface Device (HID). */ -#define BLE_APPEARANCE_HID_KEYBOARD 961 /**< Keyboard (HID Subtype). */ -#define BLE_APPEARANCE_HID_MOUSE 962 /**< Mouse (HID Subtype). */ -#define BLE_APPEARANCE_HID_JOYSTICK 963 /**< Joystick (HID Subtype). */ -#define BLE_APPEARANCE_HID_GAMEPAD 964 /**< Gamepad (HID Subtype). */ -#define BLE_APPEARANCE_HID_DIGITIZERSUBTYPE 965 /**< Digitizer Tablet (HID Subtype). */ -#define BLE_APPEARANCE_HID_CARD_READER 966 /**< Card Reader (HID Subtype). */ -#define BLE_APPEARANCE_HID_DIGITAL_PEN 967 /**< Digital Pen (HID Subtype). */ -#define BLE_APPEARANCE_HID_BARCODE 968 /**< Barcode Scanner (HID Subtype). */ -#define BLE_APPEARANCE_GENERIC_GLUCOSE_METER 1024 /**< Generic Glucose Meter. */ -#define BLE_APPEARANCE_GENERIC_RUNNING_WALKING_SENSOR 1088 /**< Generic Running Walking Sensor. */ -#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_IN_SHOE 1089 /**< Running Walking Sensor: In-Shoe. */ -#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_SHOE 1090 /**< Running Walking Sensor: On-Shoe. */ -#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_HIP 1091 /**< Running Walking Sensor: On-Hip. */ -#define BLE_APPEARANCE_GENERIC_CYCLING 1152 /**< Generic Cycling. */ -#define BLE_APPEARANCE_CYCLING_CYCLING_COMPUTER 1153 /**< Cycling: Cycling Computer. */ -#define BLE_APPEARANCE_CYCLING_SPEED_SENSOR 1154 /**< Cycling: Speed Sensor. */ -#define BLE_APPEARANCE_CYCLING_CADENCE_SENSOR 1155 /**< Cycling: Cadence Sensor. */ -#define BLE_APPEARANCE_CYCLING_POWER_SENSOR 1156 /**< Cycling: Power Sensor. */ -#define BLE_APPEARANCE_CYCLING_SPEED_CADENCE_SENSOR 1157 /**< Cycling: Speed and Cadence Sensor. */ -#define BLE_APPEARANCE_GENERIC_PULSE_OXIMETER 3136 /**< Generic Pulse Oximeter. */ -#define BLE_APPEARANCE_PULSE_OXIMETER_FINGERTIP 3137 /**< Fingertip (Pulse Oximeter subtype). */ -#define BLE_APPEARANCE_PULSE_OXIMETER_WRIST_WORN 3138 /**< Wrist Worn(Pulse Oximeter subtype). */ -#define BLE_APPEARANCE_GENERIC_WEIGHT_SCALE 3200 /**< Generic Weight Scale. */ -#define BLE_APPEARANCE_GENERIC_OUTDOOR_SPORTS_ACT 5184 /**< Generic Outdoor Sports Activity. */ -#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_DISP 5185 /**< Location Display Device (Outdoor Sports Activity subtype). */ -#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_DISP 5186 /**< Location and Navigation Display Device (Outdoor Sports Activity subtype). */ -#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_POD 5187 /**< Location Pod (Outdoor Sports Activity subtype). */ -#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_POD 5188 /**< Location and Navigation Pod (Outdoor Sports Activity subtype). */ -/** @} */ - -/** @brief Set .type and .uuid fields of ble_uuid_struct to specified UUID value. */ -#define BLE_UUID_BLE_ASSIGN(instance, value) do {\ - instance.type = BLE_UUID_TYPE_BLE; \ - instance.uuid = value;} while(0) - -/** @brief Copy type and uuid members from src to dst ble_uuid_t pointer. Both pointers must be valid/non-null. */ -#define BLE_UUID_COPY_PTR(dst, src) do {\ - (dst)->type = (src)->type; \ - (dst)->uuid = (src)->uuid;} while(0) - -/** @brief Copy type and uuid members from src to dst ble_uuid_t struct. */ -#define BLE_UUID_COPY_INST(dst, src) do {\ - (dst).type = (src).type; \ - (dst).uuid = (src).uuid;} while(0) - -/** @brief Compare for equality both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */ -#define BLE_UUID_EQ(p_uuid1, p_uuid2) \ - (((p_uuid1)->type == (p_uuid2)->type) && ((p_uuid1)->uuid == (p_uuid2)->uuid)) - -/** @brief Compare for difference both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */ -#define BLE_UUID_NEQ(p_uuid1, p_uuid2) \ - (((p_uuid1)->type != (p_uuid2)->type) || ((p_uuid1)->uuid != (p_uuid2)->uuid)) - -/** @} */ - -/** @addtogroup BLE_TYPES_STRUCTURES Structures - * @{ */ - -/** @brief 128 bit UUID values. */ -typedef struct -{ - uint8_t uuid128[16]; /**< Little-Endian UUID bytes. */ -} ble_uuid128_t; - -/** @brief Bluetooth Low Energy UUID type, encapsulates both 16-bit and 128-bit UUIDs. */ -typedef struct -{ - uint16_t uuid; /**< 16-bit UUID value or octets 12-13 of 128-bit UUID. */ - uint8_t type; /**< UUID type, see @ref BLE_UUID_TYPES. If type is @ref BLE_UUID_TYPE_UNKNOWN, the value of uuid is undefined. */ -} ble_uuid_t; - -/**@brief Data structure. */ -typedef struct -{ - uint8_t *p_data; /**< Pointer to the data buffer provided to/from the application. */ - uint16_t len; /**< Length of the data buffer, in bytes. */ -} ble_data_t; - -/** @} */ -#ifdef __cplusplus -} -#endif - -#endif /* BLE_TYPES_H__ */ - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf52/nrf_mbr.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf52/nrf_mbr.h deleted file mode 100644 index cc5971c7a3d..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf52/nrf_mbr.h +++ /dev/null @@ -1,241 +0,0 @@ -/* - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @defgroup nrf_mbr_api Master Boot Record API - @{ - - @brief APIs for updating SoftDevice and BootLoader - -*/ - -#ifndef NRF_MBR_H__ -#define NRF_MBR_H__ - -#include "nrf_svc.h" -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup NRF_MBR_DEFINES Defines - * @{ */ - -/**@brief MBR SVC Base number. */ -#define MBR_SVC_BASE (0x18) - -/**@brief Page size in words. */ -#define MBR_PAGE_SIZE_IN_WORDS (1024) - -/** @brief The size that must be reserved for the MBR when a SoftDevice is written to flash. -This is the offset where the first byte of the SoftDevice hex file is written.*/ -#define MBR_SIZE (0x1000) - -/** @} */ - -/** @addtogroup NRF_MBR_ENUMS Enumerations - * @{ */ - -/**@brief nRF Master Boot Record API SVC numbers. */ -enum NRF_MBR_SVCS -{ - SD_MBR_COMMAND = MBR_SVC_BASE, /**< ::sd_mbr_command */ -}; - -/**@brief Possible values for ::sd_mbr_command_t.command */ -enum NRF_MBR_COMMANDS -{ - SD_MBR_COMMAND_COPY_BL, /**< Copy a new BootLoader. @see ::sd_mbr_command_copy_bl_t*/ - SD_MBR_COMMAND_COPY_SD, /**< Copy a new SoftDevice. @see ::sd_mbr_command_copy_sd_t*/ - SD_MBR_COMMAND_INIT_SD, /**< Initialize forwarding interrupts to SD, and run reset function in SD. Does not require any parameters in ::sd_mbr_command_t params.*/ - SD_MBR_COMMAND_COMPARE, /**< This command works like memcmp. @see ::sd_mbr_command_compare_t*/ - SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET, /**< Change the address the MBR starts after a reset. @see ::sd_mbr_command_vector_table_base_set_t*/ - SD_MBR_COMMAND_RESERVED, - SD_MBR_COMMAND_IRQ_FORWARD_ADDRESS_SET, /**< Start forwarding all interrupts to this address. @see ::sd_mbr_command_irq_forward_address_set_t*/ -}; - -/** @} */ - -/** @addtogroup NRF_MBR_TYPES Types - * @{ */ - -/**@brief This command copies part of a new SoftDevice - * - * The destination area is erased before copying. - * If dst is in the middle of a flash page, that whole flash page will be erased. - * If (dst+len) is in the middle of a flash page, that whole flash page will be erased. - * - * The user of this function is responsible for setting the BPROT registers. - * - * @retval ::NRF_SUCCESS indicates that the contents of the memory blocks where copied correctly. - * @retval ::NRF_ERROR_INTERNAL indicates that the contents of the memory blocks where not verified correctly after copying. - */ -typedef struct -{ - uint32_t *src; /**< Pointer to the source of data to be copied.*/ - uint32_t *dst; /**< Pointer to the destination where the content is to be copied.*/ - uint32_t len; /**< Number of 32 bit words to copy. Must be a multiple of @ref MBR_PAGE_SIZE_IN_WORDS words.*/ -} sd_mbr_command_copy_sd_t; - - -/**@brief This command works like memcmp, but takes the length in words. - * - * @retval ::NRF_SUCCESS indicates that the contents of both memory blocks are equal. - * @retval ::NRF_ERROR_NULL indicates that the contents of the memory blocks are not equal. - */ -typedef struct -{ - uint32_t *ptr1; /**< Pointer to block of memory. */ - uint32_t *ptr2; /**< Pointer to block of memory. */ - uint32_t len; /**< Number of 32 bit words to compare.*/ -} sd_mbr_command_compare_t; - - -/**@brief This command copies a new BootLoader. - * - * With this command, destination of BootLoader is always the address written in - * NRF_UICR->BOOTADDR. - * - * Destination is erased by this function. - * If (destination+bl_len) is in the middle of a flash page, that whole flash page will be erased. - * - * This function will use PROTENSET to protect the flash that is not intended to be written. - * - * On success, this function will not return. It will start the new BootLoader from reset-vector as normal. - * - * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. - * @retval ::NRF_ERROR_FORBIDDEN if NRF_UICR->BOOTADDR is not set. - * @retval ::NRF_ERROR_INVALID_LENGTH if parameters attempts to read or write outside flash area. - * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) - */ -typedef struct -{ - uint32_t *bl_src; /**< Pointer to the source of the Bootloader to be be copied.*/ - uint32_t bl_len; /**< Number of 32 bit words to copy for BootLoader. */ -} sd_mbr_command_copy_bl_t; - -/**@brief Change the address the MBR starts after a reset - * - * Once this function has been called, this address is where the MBR will start to forward - * interrupts to after a reset. - * - * To restore default forwarding this function should be called with @ref address set to 0. The - * MBR will then start forwarding interrupts to the address in NFR_UICR->BOOTADDR or to the - * SoftDevice if the BOOTADDR is not set. - * - * On success, this function will not return. It will reset the device. - * - * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. - * @retval ::NRF_ERROR_INVALID_ADDR if parameter address is outside of the flash size. - * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) - */ -typedef struct -{ - uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ -} sd_mbr_command_vector_table_base_set_t; - -/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the MBR - * - * Unlike sd_mbr_command_vector_table_base_set_t, this function does not reset, and it does not - * change where the MBR starts after reset. - * - * @retval ::NRF_SUCCESS - */ -typedef struct -{ - uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ -} sd_mbr_command_irq_forward_address_set_t; - -/**@brief Input structure containing data used when calling ::sd_mbr_command - * - * Depending on what command value that is set, the corresponding params value type must also be - * set. See @ref NRF_MBR_COMMANDS for command types and corresponding params value type. If command - * @ref SD_MBR_COMMAND_INIT_SD is set, it is not necessary to set any values under params. - */ -typedef struct -{ - uint32_t command; /**< Type of command to be issued. See @ref NRF_MBR_COMMANDS. */ - union - { - sd_mbr_command_copy_sd_t copy_sd; /**< Parameters for copy SoftDevice.*/ - sd_mbr_command_compare_t compare; /**< Parameters for verify.*/ - sd_mbr_command_copy_bl_t copy_bl; /**< Parameters for copy BootLoader. Requires parameter page. */ - sd_mbr_command_vector_table_base_set_t base_set; /**< Parameters for vector table base set. Requires parameter page.*/ - sd_mbr_command_irq_forward_address_set_t irq_forward_address_set; /**< Parameters for irq forward address set*/ - } params; /**< Command parameters. */ -} sd_mbr_command_t; - -/** @} */ - -/** @addtogroup NRF_MBR_FUNCTIONS Functions - * @{ */ - -/**@brief Issue Master Boot Record commands - * - * Commands used when updating a SoftDevice and bootloader. - * - * The @ref SD_MBR_COMMAND_COPY_BL and @ref SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET requires - * parameters to be retained by the MBR when resetting the IC. This is done in a separate flash - * page provided by the application. The UICR register UICR.NRFFW[1] must be set to an address - * corresponding to a page in the application flash space. This page will be cleared by the MBR and - * used to store the command before reset. When the UICR.NRFFW[1] field is set the page it refers - * to must not be used by the application. If the UICR.NRFFW[1] is set to 0xFFFFFFFF (the default) - * MBR commands which use flash will be unavailable and return @ref NRF_ERROR_NO_MEM. - * - * @param[in] param Pointer to a struct describing the command. - * - * @note For return values, see ::sd_mbr_command_copy_sd_t, ::sd_mbr_command_copy_bl_t, - * ::sd_mbr_command_compare_t, ::sd_mbr_command_vector_table_base_set_t, - * ::sd_mbr_command_irq_forward_address_set_t - * - * @retval ::NRF_ERROR_NO_MEM if UICR.NRFFW[1] is not set (i.e. is 0xFFFFFFFF). - * @retval ::NRF_ERROR_INVALID_PARAM if an invalid command is given. -*/ -SVCALL(SD_MBR_COMMAND, uint32_t, sd_mbr_command(sd_mbr_command_t* param)); - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // NRF_MBR_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_ble.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_ble.h deleted file mode 100644 index 335e7e6db29..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_ble.h +++ /dev/null @@ -1,616 +0,0 @@ -/* - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_COMMON BLE SoftDevice Common - @{ - @defgroup ble_api Events, type definitions and API calls - @{ - - @brief Module independent events, type definitions and API calls for the BLE SoftDevice. - - */ - -#ifndef BLE_H__ -#define BLE_H__ - -#include "ble_ranges.h" -#include "ble_types.h" -#include "ble_gap.h" -#include "ble_gatt.h" -#include "ble_gattc.h" -#include "ble_gatts.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_COMMON_ENUMERATIONS Enumerations - * @{ */ - -/** - * @brief Common API SVC numbers. - */ -enum BLE_COMMON_SVCS -{ - SD_BLE_ENABLE = BLE_SVC_BASE, /**< Enable and initialize the BLE stack */ - SD_BLE_EVT_GET, /**< Get an event from the pending events queue. */ - SD_BLE_UUID_VS_ADD, /**< Add a Vendor Specific UUID. */ - SD_BLE_UUID_DECODE, /**< Decode UUID bytes. */ - SD_BLE_UUID_ENCODE, /**< Encode UUID bytes. */ - SD_BLE_VERSION_GET, /**< Get the local version information (company ID, Link Layer Version, Link Layer Subversion). */ - SD_BLE_USER_MEM_REPLY, /**< User Memory Reply. */ - SD_BLE_OPT_SET, /**< Set a BLE option. */ - SD_BLE_OPT_GET, /**< Get a BLE option. */ - SD_BLE_CFG_SET, /**< Add a configuration to the BLE stack. */ -}; - -/** - * @brief BLE Module Independent Event IDs. - */ -enum BLE_COMMON_EVTS -{ - BLE_EVT_USER_MEM_REQUEST = BLE_EVT_BASE + 0, /**< User Memory request. @ref ble_evt_user_mem_request_t */ - BLE_EVT_USER_MEM_RELEASE = BLE_EVT_BASE + 1, /**< User Memory release. @ref ble_evt_user_mem_release_t */ -}; - -/**@brief BLE Connection Configuration IDs. - * - * IDs that uniquely identify a connection configuration. - */ -enum BLE_CONN_CFGS -{ - BLE_CONN_CFG_GAP = BLE_CONN_CFG_BASE + 0, /**< BLE GAP specific connection configuration. */ - BLE_CONN_CFG_GATTC = BLE_CONN_CFG_BASE + 1, /**< BLE GATTC specific connection configuration. */ - BLE_CONN_CFG_GATTS = BLE_CONN_CFG_BASE + 2, /**< BLE GATTS specific connection configuration. */ - BLE_CONN_CFG_GATT = BLE_CONN_CFG_BASE + 3, /**< BLE GATT specific connection configuration. */ -}; - -/**@brief BLE Common Configuration IDs. - * - * IDs that uniquely identify a common configuration. - */ -enum BLE_COMMON_CFGS -{ - BLE_COMMON_CFG_VS_UUID = BLE_CFG_BASE, /**< Vendor specific UUID configuration */ -}; - -/**@brief Common Option IDs. - * IDs that uniquely identify a common option. - */ -enum BLE_COMMON_OPTS -{ - BLE_COMMON_OPT_PA_LNA = BLE_OPT_BASE + 0, /**< PA and LNA options */ - BLE_COMMON_OPT_CONN_EVT_EXT = BLE_OPT_BASE + 1, /**< Extended connection events option */ -}; - -/** @} */ - -/** @addtogroup BLE_COMMON_DEFINES Defines - * @{ */ - -/** @brief Required pointer alignment for BLE Events. -*/ -#define BLE_EVT_PTR_ALIGNMENT 4 - -/** @brief Leaves the maximum of the two arguments. -*/ -#define BLE_MAX(a, b) ((a) < (b) ? (b) : (a)) - -/** @brief Maximum possible length for BLE Events. - * @note The highest value used for @ref ble_gatt_conn_cfg_t::att_mtu in any connection configuration shall be used as a parameter. - * If that value has not been configured for any connections then @ref BLE_GATT_ATT_MTU_DEFAULT must be used instead. -*/ -#define BLE_EVT_LEN_MAX(ATT_MTU) (BLE_MAX( \ - sizeof(ble_evt_t), \ - BLE_MAX( \ - offsetof(ble_evt_t, evt.gattc_evt.params.rel_disc_rsp.includes) + ((ATT_MTU) - 2) / 6 * sizeof(ble_gattc_include_t), \ - offsetof(ble_evt_t, evt.gattc_evt.params.attr_info_disc_rsp.info.attr_info16) + ((ATT_MTU) - 2) / 4 * sizeof(ble_gattc_attr_info16_t) \ - ) \ -)) - -/** @defgroup BLE_USER_MEM_TYPES User Memory Types - * @{ */ -#define BLE_USER_MEM_TYPE_INVALID 0x00 /**< Invalid User Memory Types. */ -#define BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES 0x01 /**< User Memory for GATTS queued writes. */ -/** @} */ - -/** @defgroup BLE_UUID_VS_COUNTS Vendor Specific UUID counts - * @{ - */ -#define BLE_UUID_VS_COUNT_DEFAULT 10 /**< Default VS UUID count. */ -#define BLE_UUID_VS_COUNT_MAX 254 /**< Maximum VS UUID count. */ -/** @} */ - -/** @defgroup BLE_COMMON_CFG_DEFAULTS Configuration defaults. - * @{ - */ -#define BLE_CONN_CFG_TAG_DEFAULT 0 /**< Default configuration tag, SoftDevice default connection configuration. */ - -/** @} */ - -/** @} */ - -/** @addtogroup BLE_COMMON_STRUCTURES Structures - * @{ */ - -/**@brief User Memory Block. */ -typedef struct -{ - uint8_t *p_mem; /**< Pointer to the start of the user memory block. */ - uint16_t len; /**< Length in bytes of the user memory block. */ -} ble_user_mem_block_t; - -/**@brief Event structure for @ref BLE_EVT_USER_MEM_REQUEST. */ -typedef struct -{ - uint8_t type; /**< User memory type, see @ref BLE_USER_MEM_TYPES. */ -} ble_evt_user_mem_request_t; - -/**@brief Event structure for @ref BLE_EVT_USER_MEM_RELEASE. */ -typedef struct -{ - uint8_t type; /**< User memory type, see @ref BLE_USER_MEM_TYPES. */ - ble_user_mem_block_t mem_block; /**< User memory block */ -} ble_evt_user_mem_release_t; - -/**@brief Event structure for events not associated with a specific function module. */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle on which this event occurred. */ - union - { - ble_evt_user_mem_request_t user_mem_request; /**< User Memory Request Event Parameters. */ - ble_evt_user_mem_release_t user_mem_release; /**< User Memory Release Event Parameters. */ - } params; /**< Event parameter union. */ -} ble_common_evt_t; - -/**@brief BLE Event header. */ -typedef struct -{ - uint16_t evt_id; /**< Value from a BLE__EVT series. */ - uint16_t evt_len; /**< Length in octets including this header. */ -} ble_evt_hdr_t; - -/**@brief Common BLE Event type, wrapping the module specific event reports. */ -typedef struct -{ - ble_evt_hdr_t header; /**< Event header. */ - union - { - ble_common_evt_t common_evt; /**< Common Event, evt_id in BLE_EVT_* series. */ - ble_gap_evt_t gap_evt; /**< GAP originated event, evt_id in BLE_GAP_EVT_* series. */ - ble_gattc_evt_t gattc_evt; /**< GATT client originated event, evt_id in BLE_GATTC_EVT* series. */ - ble_gatts_evt_t gatts_evt; /**< GATT server originated event, evt_id in BLE_GATTS_EVT* series. */ - } evt; /**< Event union. */ -} ble_evt_t; - - -/** - * @brief Version Information. - */ -typedef struct -{ - uint8_t version_number; /**< Link Layer Version number. See https://www.bluetooth.org/en-us/specification/assigned-numbers/link-layer for assigned values. */ - uint16_t company_id; /**< Company ID, Nordic Semiconductor's company ID is 89 (0x0059) (https://www.bluetooth.org/apps/content/Default.aspx?doc_id=49708). */ - uint16_t subversion_number; /**< Link Layer Sub Version number, corresponds to the SoftDevice Config ID or Firmware ID (FWID). */ -} ble_version_t; - -/** - * @brief Configuration parameters for the PA and LNA. - */ -typedef struct -{ - uint8_t enable :1; /**< Enable toggling for this amplifier */ - uint8_t active_high :1; /**< Set the pin to be active high */ - uint8_t gpio_pin :6; /**< The GPIO pin to toggle for this amplifier */ -} ble_pa_lna_cfg_t; - -/** - * @brief PA & LNA GPIO toggle configuration - * - * This option configures the SoftDevice to toggle pins when the radio is active for use with a power amplifier and/or - * a low noise amplifier. - * - * Toggling the pins is achieved by using two PPI channels and a GPIOTE channel. The hardware channel IDs are provided - * by the application and should be regarded as reserved as long as any PA/LNA toggling is enabled. - * - * @note @ref sd_ble_opt_get is not supported for this option. - * @note Setting this option while the radio is in use (i.e. any of the roles are active) may have undefined consequences - * and must be avoided by the application. - */ -typedef struct -{ - ble_pa_lna_cfg_t pa_cfg; /**< Power Amplifier configuration */ - ble_pa_lna_cfg_t lna_cfg; /**< Low Noise Amplifier configuration */ - - uint8_t ppi_ch_id_set; /**< PPI channel used for radio pin setting */ - uint8_t ppi_ch_id_clr; /**< PPI channel used for radio pin clearing */ - uint8_t gpiote_ch_id; /**< GPIOTE channel used for radio pin toggling */ -} ble_common_opt_pa_lna_t; - -/** - * @brief Configuration of extended BLE connection events. - * - * When enabled the SoftDevice will dynamically extend the connection event when possible. - * - * The connection event length is controlled by the connection configuration as set by @ref ble_gap_conn_cfg_t::event_length. - * The connection event can be extended if there is time to send another packet pair before the start of the next connection interval, - * and if there are no conflicts with other BLE roles requesting radio time. - * - * @note @ref sd_ble_opt_get is not supported for this option. - */ -typedef struct -{ - uint8_t enable : 1; /**< Enable extended BLE connection events, disabled by default. */ -} ble_common_opt_conn_evt_ext_t; - -/**@brief Option structure for common options. */ -typedef union -{ - ble_common_opt_pa_lna_t pa_lna; /**< Parameters for controlling PA and LNA pin toggling. */ - ble_common_opt_conn_evt_ext_t conn_evt_ext; /**< Parameters for enabling extended connection events. */ -} ble_common_opt_t; - -/**@brief Common BLE Option type, wrapping the module specific options. */ -typedef union -{ - ble_common_opt_t common_opt; /**< COMMON options, opt_id in @ref BLE_COMMON_OPTS series. */ - ble_gap_opt_t gap_opt; /**< GAP option, opt_id in @ref BLE_GAP_OPTS series. */ -} ble_opt_t; - -/**@brief BLE connection configuration type, wrapping the module specific configurations, set with - * @ref sd_ble_cfg_set. - * - * @note Connection configurations don't have to be set. - * In the case that no configurations has been set, or fewer connection configurations has been set than enabled connections, - * the default connection configuration will be automatically added for the remaining connections. - * When creating connections with the default configuration, @ref BLE_CONN_CFG_TAG_DEFAULT should be used in - * place of @ref ble_conn_cfg_t::conn_cfg_tag. See @ref sd_ble_gap_adv_start() and sd_ble_gap_connect()" - * - * @mscs - * @mmsc{@ref BLE_CONN_CFG} - * @endmscs - - */ -typedef struct -{ - uint8_t conn_cfg_tag; /**< The application chosen tag it can use with the @ref sd_ble_gap_adv_start() and sd_ble_gap_connect() - calls to select this configuration when creating a connection. - Must be different for all connection configurations added and not @ref BLE_CONN_CFG_TAG_DEFAULT. */ - union { - ble_gap_conn_cfg_t gap_conn_cfg; /**< GAP connection configuration, cfg_id is @ref BLE_CONN_CFG_GAP. */ - ble_gattc_conn_cfg_t gattc_conn_cfg; /**< GATTC connection configuration, cfg_id is @ref BLE_CONN_CFG_GATTC. */ - ble_gatts_conn_cfg_t gatts_conn_cfg; /**< GATTS connection configuration, cfg_id is @ref BLE_CONN_CFG_GATTS. */ - ble_gatt_conn_cfg_t gatt_conn_cfg; /**< GATT connection configuration, cfg_id is @ref BLE_CONN_CFG_GATT. */ - } params; /**< Connection configuration union. */ -} ble_conn_cfg_t; - -/** - * @brief Configuration of Vendor Specific UUIDs, set with @ref sd_ble_cfg_set. - * - * @retval ::NRF_ERROR_INVALID_PARAM Too many UUIDs configured. - */ -typedef struct -{ - uint8_t vs_uuid_count; /**< Number of 128-bit Vendor Specific UUID bases to allocate memory for. - Default value is @ref BLE_UUID_VS_COUNT_DEFAULT. Maximum value is - @ref BLE_UUID_VS_COUNT_MAX. */ -} ble_common_cfg_vs_uuid_t; - -/**@brief Common BLE Configuration type, wrapping the common configurations. */ -typedef union -{ - ble_common_cfg_vs_uuid_t vs_uuid_cfg; /**< Vendor specific UUID configuration, cfg_id is @ref BLE_COMMON_CFG_VS_UUID. */ -} ble_common_cfg_t; - -/**@brief BLE Configuration type, wrapping the module specific configurations. */ -typedef union -{ - ble_conn_cfg_t conn_cfg; /**< Connection specific configurations, cfg_id in @ref BLE_CONN_CFGS series. */ - ble_common_cfg_t common_cfg; /**< Global common configurations, cfg_id in @ref BLE_COMMON_CFGS series. */ - ble_gap_cfg_t gap_cfg; /**< Global GAP configurations, cfg_id in @ref BLE_GAP_CFGS series. */ - ble_gatts_cfg_t gatts_cfg; /**< Global GATTS configuration, cfg_id in @ref BLE_GATTS_CFGS series. */ -} ble_cfg_t; - -/** @} */ - -/** @addtogroup BLE_COMMON_FUNCTIONS Functions - * @{ */ - -/**@brief Enable the BLE stack - * - * @param[in, out] p_app_ram_base Pointer to a variable containing the start address of the - * application RAM region (APP_RAM_BASE). On return, this will - * contain the minimum start address of the application RAM region - * required by the SoftDevice for this configuration. - * - * @note The memory requirement for a specific configuration will not increase between SoftDevices - * with the same major version number. - * - * @note The value of *p_app_ram_base when the app has done no custom configuration of the - * SoftDevice, i.e. the app has not called @ref sd_ble_cfg_set before @ref sd_ble_enable, can - * be found in the release notes. - * - * @note At runtime the IC's RAM is split into 2 regions: The SoftDevice RAM region is located - * between 0x20000000 and APP_RAM_BASE-1 and the application's RAM region is located between - * APP_RAM_BASE and the start of the call stack. - * - * @details This call initializes the BLE stack, no BLE related function other than @ref - * sd_ble_cfg_set can be called before this one. - * - * @mscs - * @mmsc{@ref BLE_COMMON_ENABLE} - * @endmscs - * - * @retval ::NRF_SUCCESS The BLE stack has been initialized successfully. - * @retval ::NRF_ERROR_INVALID_STATE The BLE stack had already been initialized and cannot be reinitialized. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. - * @retval ::NRF_ERROR_NO_MEM The amount of memory assigned to the SoftDevice by *p_app_ram_base is not - * large enough to fit this configuration's memory requirement. Check *p_app_ram_base - * and set the start address of the application RAM region accordingly. - */ -SVCALL(SD_BLE_ENABLE, uint32_t, sd_ble_enable(uint32_t * p_app_ram_base)); - -/**@brief Add configurations for the BLE stack - * - * @param[in] cfg_id Config ID, see @ref BLE_CONN_CFGS, @ref BLE_COMMON_CFGS, @ref - * BLE_GAP_CFGS or @ref BLE_GATTS_CFGS. - * @param[in] p_cfg Pointer to a ble_cfg_t structure containing the configuration value. - * @param[in] app_ram_base The start address of the application RAM region (APP_RAM_BASE). - * See @ref sd_ble_enable for details about APP_RAM_BASE. - * - * @note The memory requirement for a specific configuration will not increase between SoftDevices - * with the same major version number. - * - * @note If a configuration is set more than once, the last one set is the one that takes effect on - * @ref sd_ble_enable. - * - * @note Any part of the BLE stack that is NOT configured with @ref sd_ble_cfg_set will have default - * configuration. - * - * @note @ref sd_ble_cfg_set may be called at any time when the SoftDevice is enabled (see @ref - * sd_softdevice_enable) while the BLE part of the SoftDevice is not enabled (see @ref - * sd_ble_enable). - * - * @note Error codes for the configurations are described in the configuration structs. - * - * @mscs - * @mmsc{@ref BLE_COMMON_ENABLE} - * @endmscs - * - * @retval ::NRF_SUCCESS The configuration has been added successfully. - * @retval ::NRF_ERROR_INVALID_STATE The BLE stack had already been initialized. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid cfg_id supplied. - * @retval ::NRF_ERROR_NO_MEM The amount of memory assigned to the SoftDevice by app_ram_base is not - * large enough to fit this configuration's memory requirement. - */ -SVCALL(SD_BLE_CFG_SET, uint32_t, sd_ble_cfg_set(uint32_t cfg_id, ble_cfg_t const * p_cfg, uint32_t app_ram_base)); - -/**@brief Get an event from the pending events queue. - * - * @param[out] p_dest Pointer to buffer to be filled in with an event, or NULL to retrieve the event length. - * This buffer must be aligned to the extend defined by @ref BLE_EVT_PTR_ALIGNMENT. - * The buffer should be interpreted as a @ref ble_evt_t struct. - * @param[in, out] p_len Pointer the length of the buffer, on return it is filled with the event length. - * - * @details This call allows the application to pull a BLE event from the BLE stack. The application is signaled that - * an event is available from the BLE stack by the triggering of the SD_EVT_IRQn interrupt. - * The application is free to choose whether to call this function from thread mode (main context) or directly from the - * Interrupt Service Routine that maps to SD_EVT_IRQn. In any case however, and because the BLE stack runs at a higher - * priority than the application, this function should be called in a loop (until @ref NRF_ERROR_NOT_FOUND is returned) - * every time SD_EVT_IRQn is raised to ensure that all available events are pulled from the BLE stack. Failure to do so - * could potentially leave events in the internal queue without the application being aware of this fact. - * - * Sizing the p_dest buffer is equally important, since the application needs to provide all the memory necessary for the event to - * be copied into application memory. If the buffer provided is not large enough to fit the entire contents of the event, - * @ref NRF_ERROR_DATA_SIZE will be returned and the application can then call again with a larger buffer size. - * The maximum possible event length is defined by @ref BLE_EVT_LEN_MAX. The application may also "peek" the event length - * by providing p_dest as a NULL pointer and inspecting the value of *p_len upon return: - * - * \code - * uint16_t len; - * errcode = sd_ble_evt_get(NULL, &len); - * \endcode - * - * @mscs - * @mmsc{@ref BLE_COMMON_IRQ_EVT_MSC} - * @mmsc{@ref BLE_COMMON_THREAD_EVT_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Event pulled and stored into the supplied buffer. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. - * @retval ::NRF_ERROR_NOT_FOUND No events ready to be pulled. - * @retval ::NRF_ERROR_DATA_SIZE Event ready but could not fit into the supplied buffer. - */ -SVCALL(SD_BLE_EVT_GET, uint32_t, sd_ble_evt_get(uint8_t *p_dest, uint16_t *p_len)); - - -/**@brief Add a Vendor Specific base UUID. - * - * @details This call enables the application to add a vendor specific base UUID to the BLE stack's table, for later - * use with all other modules and APIs. This then allows the application to use the shorter, 24-bit @ref ble_uuid_t - * format when dealing with both 16-bit and 128-bit UUIDs without having to check for lengths and having split code - * paths. This is accomplished by extending the grouping mechanism that the Bluetooth SIG standard base UUID uses - * for all other 128-bit UUIDs. The type field in the @ref ble_uuid_t structure is an index (relative to - * @ref BLE_UUID_TYPE_VENDOR_BEGIN) to the table populated by multiple calls to this function, and the UUID field - * in the same structure contains the 2 bytes at indexes 12 and 13. The number of possible 128-bit UUIDs available to - * the application is therefore the number of Vendor Specific UUIDs added with the help of this function times 65536, - * although restricted to modifying bytes 12 and 13 for each of the entries in the supplied array. - * - * @note Bytes 12 and 13 of the provided UUID will not be used internally, since those are always replaced by - * the 16-bit uuid field in @ref ble_uuid_t. - * - * @note If a UUID is already present in the BLE stack's internal table, the corresponding index will be returned in - * p_uuid_type along with an @ref NRF_SUCCESS error code. - * - * @param[in] p_vs_uuid Pointer to a 16-octet (128-bit) little endian Vendor Specific UUID disregarding - * bytes 12 and 13. - * @param[out] p_uuid_type Pointer to a uint8_t where the type field in @ref ble_uuid_t corresponding to this UUID will be stored. - * - * @retval ::NRF_SUCCESS Successfully added the Vendor Specific UUID. - * @retval ::NRF_ERROR_INVALID_ADDR If p_vs_uuid or p_uuid_type is NULL or invalid. - * @retval ::NRF_ERROR_NO_MEM If there are no more free slots for VS UUIDs. - */ -SVCALL(SD_BLE_UUID_VS_ADD, uint32_t, sd_ble_uuid_vs_add(ble_uuid128_t const *p_vs_uuid, uint8_t *p_uuid_type)); - - -/** @brief Decode little endian raw UUID bytes (16-bit or 128-bit) into a 24 bit @ref ble_uuid_t structure. - * - * @details The raw UUID bytes excluding bytes 12 and 13 (i.e. bytes 0-11 and 14-15) of p_uuid_le are compared - * to the corresponding ones in each entry of the table of vendor specific UUIDs populated with @ref sd_ble_uuid_vs_add - * to look for a match. If there is such a match, bytes 12 and 13 are returned as p_uuid->uuid and the index - * relative to @ref BLE_UUID_TYPE_VENDOR_BEGIN as p_uuid->type. - * - * @note If the UUID length supplied is 2, then the type set by this call will always be @ref BLE_UUID_TYPE_BLE. - * - * @param[in] uuid_le_len Length in bytes of the buffer pointed to by p_uuid_le (must be 2 or 16 bytes). - * @param[in] p_uuid_le Pointer pointing to little endian raw UUID bytes. - * @param[out] p_uuid Pointer to a @ref ble_uuid_t structure to be filled in. - * - * @retval ::NRF_SUCCESS Successfully decoded into the @ref ble_uuid_t structure. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_LENGTH Invalid UUID length. - * @retval ::NRF_ERROR_NOT_FOUND For a 128-bit UUID, no match in the populated table of UUIDs. - */ -SVCALL(SD_BLE_UUID_DECODE, uint32_t, sd_ble_uuid_decode(uint8_t uuid_le_len, uint8_t const *p_uuid_le, ble_uuid_t *p_uuid)); - - -/** @brief Encode a @ref ble_uuid_t structure into little endian raw UUID bytes (16-bit or 128-bit). - * - * @note The pointer to the destination buffer p_uuid_le may be NULL, in which case only the validity and size of p_uuid is computed. - * - * @param[in] p_uuid Pointer to a @ref ble_uuid_t structure that will be encoded into bytes. - * @param[out] p_uuid_le_len Pointer to a uint8_t that will be filled with the encoded length (2 or 16 bytes). - * @param[out] p_uuid_le Pointer to a buffer where the little endian raw UUID bytes (2 or 16) will be stored. - * - * @retval ::NRF_SUCCESS Successfully encoded into the buffer. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid UUID type. - */ -SVCALL(SD_BLE_UUID_ENCODE, uint32_t, sd_ble_uuid_encode(ble_uuid_t const *p_uuid, uint8_t *p_uuid_le_len, uint8_t *p_uuid_le)); - - -/**@brief Get Version Information. - * - * @details This call allows the application to get the BLE stack version information. - * - * @param[out] p_version Pointer to a ble_version_t structure to be filled in. - * - * @retval ::NRF_SUCCESS Version information stored successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY The BLE stack is busy (typically doing a locally-initiated disconnection procedure). - */ -SVCALL(SD_BLE_VERSION_GET, uint32_t, sd_ble_version_get(ble_version_t *p_version)); - - -/**@brief Provide a user memory block. - * - * @note This call can only be used as a response to a @ref BLE_EVT_USER_MEM_REQUEST event issued to the application. - * - * @param[in] conn_handle Connection handle. - * @param[in] p_block Pointer to a user memory block structure or NULL if memory is managed by the application. - * - * @mscs - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_PEER_CANCEL_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_NOAUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Successfully queued a response to the peer. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_LENGTH Invalid user memory block length supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection state or no user memory request pending. - */ -SVCALL(SD_BLE_USER_MEM_REPLY, uint32_t, sd_ble_user_mem_reply(uint16_t conn_handle, ble_user_mem_block_t const *p_block)); - -/**@brief Set a BLE option. - * - * @details This call allows the application to set the value of an option. - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC} - * @endmscs - * - * @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS. - * @param[in] p_opt Pointer to a ble_opt_t structure containing the option value. - * - * @retval ::NRF_SUCCESS Option set successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. - * @retval ::NRF_ERROR_INVALID_STATE Unable to set the parameter at this time. - * @retval ::NRF_ERROR_BUSY The BLE stack is busy or the previous procedure has not completed. - */ -SVCALL(SD_BLE_OPT_SET, uint32_t, sd_ble_opt_set(uint32_t opt_id, ble_opt_t const *p_opt)); - - -/**@brief Get a BLE option. - * - * @details This call allows the application to retrieve the value of an option. - * - * @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS. - * @param[out] p_opt Pointer to a ble_opt_t structure to be filled in. - * - * @retval ::NRF_SUCCESS Option retrieved successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. - * @retval ::NRF_ERROR_INVALID_STATE Unable to retrieve the parameter at this time. - * @retval ::NRF_ERROR_BUSY The BLE stack is busy or the previous procedure has not completed. - * @retval ::NRF_ERROR_NOT_SUPPORTED This option is not supported. - * - */ -SVCALL(SD_BLE_OPT_GET, uint32_t, sd_ble_opt_get(uint32_t opt_id, ble_opt_t *p_opt)); - -/** @} */ -#ifdef __cplusplus -} -#endif -#endif /* BLE_H__ */ - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_error.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_error.h deleted file mode 100644 index 6badee98e56..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_error.h +++ /dev/null @@ -1,90 +0,0 @@ -/* - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - - /** - @defgroup nrf_error SoftDevice Global Error Codes - @{ - - @brief Global Error definitions -*/ - -/* Header guard */ -#ifndef NRF_ERROR_H__ -#define NRF_ERROR_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/** @defgroup NRF_ERRORS_BASE Error Codes Base number definitions - * @{ */ -#define NRF_ERROR_BASE_NUM (0x0) ///< Global error base -#define NRF_ERROR_SDM_BASE_NUM (0x1000) ///< SDM error base -#define NRF_ERROR_SOC_BASE_NUM (0x2000) ///< SoC error base -#define NRF_ERROR_STK_BASE_NUM (0x3000) ///< STK error base -/** @} */ - -#define NRF_SUCCESS (NRF_ERROR_BASE_NUM + 0) ///< Successful command -#define NRF_ERROR_SVC_HANDLER_MISSING (NRF_ERROR_BASE_NUM + 1) ///< SVC handler is missing -#define NRF_ERROR_SOFTDEVICE_NOT_ENABLED (NRF_ERROR_BASE_NUM + 2) ///< SoftDevice has not been enabled -#define NRF_ERROR_INTERNAL (NRF_ERROR_BASE_NUM + 3) ///< Internal Error -#define NRF_ERROR_NO_MEM (NRF_ERROR_BASE_NUM + 4) ///< No Memory for operation -#define NRF_ERROR_NOT_FOUND (NRF_ERROR_BASE_NUM + 5) ///< Not found -#define NRF_ERROR_NOT_SUPPORTED (NRF_ERROR_BASE_NUM + 6) ///< Not supported -#define NRF_ERROR_INVALID_PARAM (NRF_ERROR_BASE_NUM + 7) ///< Invalid Parameter -#define NRF_ERROR_INVALID_STATE (NRF_ERROR_BASE_NUM + 8) ///< Invalid state, operation disallowed in this state -#define NRF_ERROR_INVALID_LENGTH (NRF_ERROR_BASE_NUM + 9) ///< Invalid Length -#define NRF_ERROR_INVALID_FLAGS (NRF_ERROR_BASE_NUM + 10) ///< Invalid Flags -#define NRF_ERROR_INVALID_DATA (NRF_ERROR_BASE_NUM + 11) ///< Invalid Data -#define NRF_ERROR_DATA_SIZE (NRF_ERROR_BASE_NUM + 12) ///< Invalid Data size -#define NRF_ERROR_TIMEOUT (NRF_ERROR_BASE_NUM + 13) ///< Operation timed out -#define NRF_ERROR_NULL (NRF_ERROR_BASE_NUM + 14) ///< Null Pointer -#define NRF_ERROR_FORBIDDEN (NRF_ERROR_BASE_NUM + 15) ///< Forbidden Operation -#define NRF_ERROR_INVALID_ADDR (NRF_ERROR_BASE_NUM + 16) ///< Bad Memory Address -#define NRF_ERROR_BUSY (NRF_ERROR_BASE_NUM + 17) ///< Busy -#define NRF_ERROR_CONN_COUNT (NRF_ERROR_BASE_NUM + 18) ///< Maximum connection count exceeded. -#define NRF_ERROR_RESOURCES (NRF_ERROR_BASE_NUM + 19) ///< Not enough resources for operation - -#ifdef __cplusplus -} -#endif -#endif // NRF_ERROR_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_error_sdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_error_sdm.h deleted file mode 100644 index 530959b9d67..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_error_sdm.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - - /** - @addtogroup nrf_sdm_api - @{ - @defgroup nrf_sdm_error SoftDevice Manager Error Codes - @{ - - @brief Error definitions for the SDM API -*/ - -/* Header guard */ -#ifndef NRF_ERROR_SDM_H__ -#define NRF_ERROR_SDM_H__ - -#include "nrf_error.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#define NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN (NRF_ERROR_SDM_BASE_NUM + 0) ///< Unknown LFCLK source. -#define NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION (NRF_ERROR_SDM_BASE_NUM + 1) ///< Incorrect interrupt configuration (can be caused by using illegal priority levels, or having enabled SoftDevice interrupts). -#define NRF_ERROR_SDM_INCORRECT_CLENR0 (NRF_ERROR_SDM_BASE_NUM + 2) ///< Incorrect CLENR0 (can be caused by erroneous SoftDevice flashing). - -#ifdef __cplusplus -} -#endif -#endif // NRF_ERROR_SDM_H__ - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_error_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_error_soc.h deleted file mode 100644 index 1e784b8db38..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_error_soc.h +++ /dev/null @@ -1,85 +0,0 @@ -/* - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup nrf_soc_api - @{ - @defgroup nrf_soc_error SoC Library Error Codes - @{ - - @brief Error definitions for the SoC library - -*/ - -/* Header guard */ -#ifndef NRF_ERROR_SOC_H__ -#define NRF_ERROR_SOC_H__ - -#include "nrf_error.h" -#ifdef __cplusplus -extern "C" { -#endif - -/* Mutex Errors */ -#define NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN (NRF_ERROR_SOC_BASE_NUM + 0) ///< Mutex already taken - -/* NVIC errors */ -#define NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE (NRF_ERROR_SOC_BASE_NUM + 1) ///< NVIC interrupt not available -#define NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED (NRF_ERROR_SOC_BASE_NUM + 2) ///< NVIC interrupt priority not allowed -#define NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN (NRF_ERROR_SOC_BASE_NUM + 3) ///< NVIC should not return - -/* Power errors */ -#define NRF_ERROR_SOC_POWER_MODE_UNKNOWN (NRF_ERROR_SOC_BASE_NUM + 4) ///< Power mode unknown -#define NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN (NRF_ERROR_SOC_BASE_NUM + 5) ///< Power POF threshold unknown -#define NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN (NRF_ERROR_SOC_BASE_NUM + 6) ///< Power off should not return - -/* Rand errors */ -#define NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES (NRF_ERROR_SOC_BASE_NUM + 7) ///< RAND not enough values - -/* PPI errors */ -#define NRF_ERROR_SOC_PPI_INVALID_CHANNEL (NRF_ERROR_SOC_BASE_NUM + 8) ///< Invalid PPI Channel -#define NRF_ERROR_SOC_PPI_INVALID_GROUP (NRF_ERROR_SOC_BASE_NUM + 9) ///< Invalid PPI Group - -#ifdef __cplusplus -} -#endif -#endif // NRF_ERROR_SOC_H__ -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_nvic.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_nvic.h deleted file mode 100644 index f5c7e8e0286..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_nvic.h +++ /dev/null @@ -1,486 +0,0 @@ -/* - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * @defgroup nrf_nvic_api SoftDevice NVIC API - * @{ - * - * @note In order to use this module, the following code has to be added to a .c file: - * \code - * nrf_nvic_state_t nrf_nvic_state = {0}; - * \endcode - * - * @note Definitions and declarations starting with __ (double underscore) in this header file are - * not intended for direct use by the application. - * - * @brief APIs for the accessing NVIC when using a SoftDevice. - * - */ - -#ifndef NRF_NVIC_H__ -#define NRF_NVIC_H__ - -#include -#include "nrf.h" -#include "nrf_svc.h" -#include "nrf_error.h" -#include "nrf_error_soc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@addtogroup NRF_NVIC_DEFINES Defines - * @{ */ - -/**@defgroup NRF_NVIC_ISER_DEFINES SoftDevice NVIC internal definitions - * @{ */ - -#define __NRF_NVIC_NVMC_IRQn (30) /**< The peripheral ID of the NVMC. IRQ numbers are used to identify peripherals, but the NVMC doesn't have an IRQ number in the MDK. */ - -#define __NRF_NVIC_ISER_COUNT (2) /**< The number of ISER/ICER registers in the NVIC that are used. */ - -/**@brief Interrupts used by the SoftDevice, with IRQn in the range 0-31. */ -#define __NRF_NVIC_SD_IRQS_0 ((uint32_t)( \ - (1U << POWER_CLOCK_IRQn) \ - | (1U << RADIO_IRQn) \ - | (1U << RTC0_IRQn) \ - | (1U << TIMER0_IRQn) \ - | (1U << RNG_IRQn) \ - | (1U << ECB_IRQn) \ - | (1U << CCM_AAR_IRQn) \ - | (1U << TEMP_IRQn) \ - | (1U << __NRF_NVIC_NVMC_IRQn) \ - | (1U << (uint32_t)SWI5_IRQn) \ - )) - -/**@brief Interrupts used by the SoftDevice, with IRQn in the range 32-63. */ -#define __NRF_NVIC_SD_IRQS_1 ((uint32_t)0) - -/**@brief Interrupts available for to application, with IRQn in the range 0-31. */ -#define __NRF_NVIC_APP_IRQS_0 (~__NRF_NVIC_SD_IRQS_0) - -/**@brief Interrupts available for to application, with IRQn in the range 32-63. */ -#define __NRF_NVIC_APP_IRQS_1 (~__NRF_NVIC_SD_IRQS_1) - -/**@} */ - -/**@} */ - -/**@addtogroup NRF_NVIC_VARIABLES Variables - * @{ */ - -/**@brief Type representing the state struct for the SoftDevice NVIC module. */ -typedef struct -{ - uint32_t volatile __irq_masks[__NRF_NVIC_ISER_COUNT]; /**< IRQs enabled by the application in the NVIC. */ - uint32_t volatile __cr_flag; /**< Non-zero if already in a critical region */ -} nrf_nvic_state_t; - -/**@brief Variable keeping the state for the SoftDevice NVIC module. This must be declared in an - * application source file. */ -extern nrf_nvic_state_t nrf_nvic_state; - -/**@} */ - -/**@addtogroup NRF_NVIC_INTERNAL_FUNCTIONS SoftDevice NVIC internal functions - * @{ */ - -/**@brief Disables IRQ interrupts globally, including the SoftDevice's interrupts. - * - * @retval The value of PRIMASK prior to disabling the interrupts. - */ -__STATIC_INLINE int __sd_nvic_irq_disable(void); - -/**@brief Enables IRQ interrupts globally, including the SoftDevice's interrupts. - */ -__STATIC_INLINE void __sd_nvic_irq_enable(void); - -/**@brief Checks if IRQn is available to application - * @param[in] IRQn IRQ to check - * - * @retval 1 (true) if the IRQ to check is available to the application - */ -__STATIC_INLINE uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn); - -/**@brief Checks if priority is available to application - * @param[in] priority priority to check - * - * @retval 1 (true) if the priority to check is available to the application - */ -__STATIC_INLINE uint32_t __sd_nvic_is_app_accessible_priority(uint32_t priority); - -/**@} */ - -/**@addtogroup NRF_NVIC_FUNCTIONS SoftDevice NVIC public functions - * @{ */ - -/**@brief Enable External Interrupt. - * @note Corresponds to NVIC_EnableIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_EnableIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt was enabled. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt has a priority not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn); - -/**@brief Disable External Interrupt. - * @note Corresponds to NVIC_DisableIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_DisableIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt was disabled. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn); - -/**@brief Get Pending Interrupt. - * @note Corresponds to NVIC_GetPendingIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_GetPendingIRQ documentation in CMSIS. - * @param[out] p_pending_irq Return value from NVIC_GetPendingIRQ. - * - * @retval ::NRF_SUCCESS The interrupt is available for the application. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq); - -/**@brief Set Pending Interrupt. - * @note Corresponds to NVIC_SetPendingIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_SetPendingIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt is set pending. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn); - -/**@brief Clear Pending Interrupt. - * @note Corresponds to NVIC_ClearPendingIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_ClearPendingIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt pending flag is cleared. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn); - -/**@brief Set Interrupt Priority. - * @note Corresponds to NVIC_SetPriority in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * @pre Priority is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_SetPriority documentation in CMSIS. - * @param[in] priority A valid IRQ priority for use by the application. - * - * @retval ::NRF_SUCCESS The interrupt and priority level is available for the application. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt priority is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority); - -/**@brief Get Interrupt Priority. - * @note Corresponds to NVIC_GetPriority in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_GetPriority documentation in CMSIS. - * @param[out] p_priority Return value from NVIC_GetPriority. - * - * @retval ::NRF_SUCCESS The interrupt priority is returned in p_priority. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE - IRQn is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority); - -/**@brief System Reset. - * @note Corresponds to NVIC_SystemReset in CMSIS. - * - * @retval ::NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN - */ -__STATIC_INLINE uint32_t sd_nvic_SystemReset(void); - -/**@brief Enter critical region. - * - * @post Application interrupts will be disabled. - * @note sd_nvic_critical_region_enter() and ::sd_nvic_critical_region_exit() must be called in matching pairs inside each - * execution context - * @sa sd_nvic_critical_region_exit - * - * @param[out] p_is_nested_critical_region If 1, the application is now in a nested critical region. - * - * @retval ::NRF_SUCCESS - */ -__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region); - -/**@brief Exit critical region. - * - * @pre Application has entered a critical region using ::sd_nvic_critical_region_enter. - * @post If not in a nested critical region, the application interrupts will restored to the state before ::sd_nvic_critical_region_enter was called. - * - * @param[in] is_nested_critical_region If this is set to 1, the critical region won't be exited. @sa sd_nvic_critical_region_enter. - * - * @retval ::NRF_SUCCESS - */ -__STATIC_INLINE uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region); - -/**@} */ - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE int __sd_nvic_irq_disable(void) -{ - int pm = __get_PRIMASK(); - __disable_irq(); - return pm; -} - -__STATIC_INLINE void __sd_nvic_irq_enable(void) -{ - __enable_irq(); -} - -__STATIC_INLINE uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn) -{ - if (IRQn < 32) - { - return ((1UL<= (1 << __NVIC_PRIO_BITS)) - { - return 0; - } - if( priority == 0 - || priority == 1 - || priority == 4 - ) - { - return 0; - } - return 1; -} - - -__STATIC_INLINE uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn) -{ - if (!__sd_nvic_app_accessible_irq(IRQn)) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } - if (!__sd_nvic_is_app_accessible_priority(NVIC_GetPriority(IRQn))) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED; - } - - if (nrf_nvic_state.__cr_flag) - { - nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] |= (uint32_t)(1 << ((uint32_t)((int32_t)IRQn) & (uint32_t)0x1F)); - } - else - { - NVIC_EnableIRQ(IRQn); - } - return NRF_SUCCESS; -} - -__STATIC_INLINE uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn) -{ - if (!__sd_nvic_app_accessible_irq(IRQn)) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } - - if (nrf_nvic_state.__cr_flag) - { - nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] &= ~(1UL << ((uint32_t)(IRQn) & 0x1F)); - } - else - { - NVIC_DisableIRQ(IRQn); - } - - return NRF_SUCCESS; -} - -__STATIC_INLINE uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq) -{ - if (__sd_nvic_app_accessible_irq(IRQn)) - { - *p_pending_irq = NVIC_GetPendingIRQ(IRQn); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } -} - -__STATIC_INLINE uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn) -{ - if (__sd_nvic_app_accessible_irq(IRQn)) - { - NVIC_SetPendingIRQ(IRQn); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } -} - -__STATIC_INLINE uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn) -{ - if (__sd_nvic_app_accessible_irq(IRQn)) - { - NVIC_ClearPendingIRQ(IRQn); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } -} - -__STATIC_INLINE uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if (!__sd_nvic_app_accessible_irq(IRQn)) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } - - if (!__sd_nvic_is_app_accessible_priority(priority)) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED; - } - - NVIC_SetPriority(IRQn, (uint32_t)priority); - return NRF_SUCCESS; -} - -__STATIC_INLINE uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority) -{ - if (__sd_nvic_app_accessible_irq(IRQn)) - { - *p_priority = (NVIC_GetPriority(IRQn) & 0xFF); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } -} - -__STATIC_INLINE uint32_t sd_nvic_SystemReset(void) -{ - NVIC_SystemReset(); - return NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN; -} - -__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region) -{ - int was_masked = __sd_nvic_irq_disable(); - if (!nrf_nvic_state.__cr_flag) - { - nrf_nvic_state.__cr_flag = 1; - nrf_nvic_state.__irq_masks[0] = ( NVIC->ICER[0] & __NRF_NVIC_APP_IRQS_0 ); - NVIC->ICER[0] = __NRF_NVIC_APP_IRQS_0; - nrf_nvic_state.__irq_masks[1] = ( NVIC->ICER[1] & __NRF_NVIC_APP_IRQS_1 ); - NVIC->ICER[1] = __NRF_NVIC_APP_IRQS_1; - *p_is_nested_critical_region = 0; - } - else - { - *p_is_nested_critical_region = 1; - } - if (!was_masked) - { - __sd_nvic_irq_enable(); - } - return NRF_SUCCESS; -} - -__STATIC_INLINE uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region) -{ - if (nrf_nvic_state.__cr_flag && (is_nested_critical_region == 0)) - { - int was_masked = __sd_nvic_irq_disable(); - NVIC->ISER[0] = nrf_nvic_state.__irq_masks[0]; - NVIC->ISER[1] = nrf_nvic_state.__irq_masks[1]; - nrf_nvic_state.__cr_flag = 0; - if (!was_masked) - { - __sd_nvic_irq_enable(); - } - } - - return NRF_SUCCESS; -} - -#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ - -#ifdef __cplusplus -} -#endif - -#endif // NRF_NVIC_H__ - -/**@} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_sd_def.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_sd_def.h deleted file mode 100644 index 0b4d221d6a4..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_sd_def.h +++ /dev/null @@ -1,59 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_SD_DEF_H__ -#define NRF_SD_DEF_H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#define SD_PPI_CHANNELS_USED 0xFFFE0000uL /**< PPI channels utilized by SotfDevice (not available to the application). */ -#define SD_PPI_GROUPS_USED 0x0000000CuL /**< PPI groups utilized by SoftDevice (not available to the application). */ -#define SD_TIMERS_USED 0x00000001uL /**< Timers used by SoftDevice. */ -#define SD_SWI_USED 0x0000003CuL /**< Software interrupts used by SoftDevice */ - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_SD_DEF_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_sdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_sdm.h deleted file mode 100644 index 60435ef9dfa..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_sdm.h +++ /dev/null @@ -1,357 +0,0 @@ -/* - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @defgroup nrf_sdm_api SoftDevice Manager API - @{ - - @brief APIs for SoftDevice management. - -*/ - -#ifndef NRF_SDM_H__ -#define NRF_SDM_H__ - -#include -#include "nrf.h" -#include "nrf_svc.h" -#include "nrf_error.h" -#include "nrf_error_sdm.h" -#include "nrf_soc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup NRF_SDM_DEFINES Defines - * @{ */ -#ifdef NRFSOC_DOXYGEN -/// Declared in nrf_mbr.h -#define MBR_SIZE 0 -#warning test -#endif - -/** @brief The major version for the SoftDevice binary distributed with this header file. */ -#define SD_MAJOR_VERSION (5) - -/** @brief The minor version for the SoftDevice binary distributed with this header file. */ -#define SD_MINOR_VERSION (1) - -/** @brief The bugfix version for the SoftDevice binary distributed with this header file. */ -#define SD_BUGFIX_VERSION (0) - -/** @brief The full version number for the SoftDevice binary this header file was distributed - * with, as a decimal number in the form Mmmmbbb, where: - * - M is major version (one or more digits) - * - mmm is minor version (three digits) - * - bbb is bugfix version (three digits). */ -#define SD_VERSION (SD_MAJOR_VERSION * 1000000 + SD_MINOR_VERSION * 1000 + SD_BUGFIX_VERSION) - -/** @brief SoftDevice Manager SVC Base number. */ -#define SDM_SVC_BASE 0x10 - -/** @brief SoftDevice unique string size in bytes. */ -#define SD_UNIQUE_STR_SIZE 20 - -/** @brief Invalid info field. Returned when an info field does not exist. */ -#define SDM_INFO_FIELD_INVALID (0) - -/** @brief Defines the SoftDevice Information Structure location (address) as an offset from -the start of the SoftDevice (without MBR)*/ -#define SOFTDEVICE_INFO_STRUCT_OFFSET (0x2000) - -/** @brief Defines the absolute SoftDevice Information Structure location (address) when the - * SoftDevice is installed just above the MBR (the usual case). */ -#define SOFTDEVICE_INFO_STRUCT_ADDRESS (SOFTDEVICE_INFO_STRUCT_OFFSET + MBR_SIZE) - -/** @brief Defines the offset for the SoftDevice Information Structure size value relative to the - * SoftDevice base address. The size value is of type uint8_t. */ -#define SD_INFO_STRUCT_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET) - -/** @brief Defines the offset for the SoftDevice size value relative to the SoftDevice base address. - * The size value is of type uint32_t. */ -#define SD_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x08) - -/** @brief Defines the offset for FWID value relative to the SoftDevice base address. The FWID value - * is of type uint16_t. */ -#define SD_FWID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x0C) - -/** @brief Defines the offset for the SoftDevice ID relative to the SoftDevice base address. The ID - * is of type uint32_t. */ -#define SD_ID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x10) - -/** @brief Defines the offset for the SoftDevice version relative to the SoftDevice base address in - * the same format as @ref SD_VERSION, stored as an uint32_t. */ -#define SD_VERSION_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x14) - -/** @brief Defines the offset for the SoftDevice unique string relative to the SoftDevice base address. - * The SD_UNIQUE_STR is stored as an array of uint8_t. The size of array is @ref SD_UNIQUE_STR_SIZE. - */ -#define SD_UNIQUE_STR_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x18) - -/** @brief Defines a macro for retrieving the actual SoftDevice Information Structure size value - * from a given base address. Use @ref MBR_SIZE as the argument when the SoftDevice is - * installed just above the MBR (the usual case). */ -#define SD_INFO_STRUCT_SIZE_GET(baseaddr) (*((uint8_t *) ((baseaddr) + SD_INFO_STRUCT_SIZE_OFFSET))) - -/** @brief Defines a macro for retrieving the actual SoftDevice size value from a given base - * address. Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above - * the MBR (the usual case). */ -#define SD_SIZE_GET(baseaddr) (*((uint32_t *) ((baseaddr) + SD_SIZE_OFFSET))) - -/** @brief Defines a macro for retrieving the actual FWID value from a given base address. Use - * @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the usual - * case). */ -#define SD_FWID_GET(baseaddr) (*((uint16_t *) ((baseaddr) + SD_FWID_OFFSET))) - -/** @brief Defines a macro for retrieving the actual SoftDevice ID from a given base address. Use - * @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the - * usual case). */ -#define SD_ID_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_ID_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ - ? (*((uint32_t *) ((baseaddr) + SD_ID_OFFSET))) : SDM_INFO_FIELD_INVALID) - -/** @brief Defines a macro for retrieving the actual SoftDevice version from a given base address. - * Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR - * (the usual case). */ -#define SD_VERSION_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_VERSION_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ - ? (*((uint32_t *) ((baseaddr) + SD_VERSION_OFFSET))) : SDM_INFO_FIELD_INVALID) - -/** @brief Defines a macro for retrieving the address of SoftDevice unique str based on a given base address. - * Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR - * (the usual case). */ -#define SD_UNIQUE_STR_ADDR_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_UNIQUE_STR_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ - ? (((uint8_t *) ((baseaddr) + SD_UNIQUE_STR_OFFSET))) : SDM_INFO_FIELD_INVALID) - -/**@defgroup NRF_FAULT_ID_RANGES Fault ID ranges - * @{ */ -#define NRF_FAULT_ID_SD_RANGE_START 0x00000000 /**< SoftDevice ID range start. */ -#define NRF_FAULT_ID_APP_RANGE_START 0x00001000 /**< Application ID range start. */ -/**@} */ - -/**@defgroup NRF_FAULT_IDS Fault ID types - * @{ */ -#define NRF_FAULT_ID_SD_ASSERT (NRF_FAULT_ID_SD_RANGE_START + 1) /**< SoftDevice assertion. The info parameter is reserved for future used. */ -#define NRF_FAULT_ID_APP_MEMACC (NRF_FAULT_ID_APP_RANGE_START + 1) /**< Application invalid memory access. The info parameter will contain 0x00000000, - in case of SoftDevice RAM access violation. In case of SoftDevice peripheral - register violation the info parameter will contain the sub-region number of - PREGION[0], on whose address range the disallowed write access caused the - memory access fault. */ -/**@} */ - -/** @} */ - -/** @addtogroup NRF_SDM_ENUMS Enumerations - * @{ */ - -/**@brief nRF SoftDevice Manager API SVC numbers. */ -enum NRF_SD_SVCS -{ - SD_SOFTDEVICE_ENABLE = SDM_SVC_BASE, /**< ::sd_softdevice_enable */ - SD_SOFTDEVICE_DISABLE, /**< ::sd_softdevice_disable */ - SD_SOFTDEVICE_IS_ENABLED, /**< ::sd_softdevice_is_enabled */ - SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, /**< ::sd_softdevice_vector_table_base_set */ - SVC_SDM_LAST /**< Placeholder for last SDM SVC */ -}; - -/** @} */ - -/** @addtogroup NRF_SDM_DEFINES Defines - * @{ */ - -/**@defgroup NRF_CLOCK_LF_ACCURACY Clock accuracy - * @{ */ - -#define NRF_CLOCK_LF_ACCURACY_250_PPM (0) /**< Default: 250 ppm */ -#define NRF_CLOCK_LF_ACCURACY_500_PPM (1) /**< 500 ppm */ -#define NRF_CLOCK_LF_ACCURACY_150_PPM (2) /**< 150 ppm */ -#define NRF_CLOCK_LF_ACCURACY_100_PPM (3) /**< 100 ppm */ -#define NRF_CLOCK_LF_ACCURACY_75_PPM (4) /**< 75 ppm */ -#define NRF_CLOCK_LF_ACCURACY_50_PPM (5) /**< 50 ppm */ -#define NRF_CLOCK_LF_ACCURACY_30_PPM (6) /**< 30 ppm */ -#define NRF_CLOCK_LF_ACCURACY_20_PPM (7) /**< 20 ppm */ -#define NRF_CLOCK_LF_ACCURACY_10_PPM (8) /**< 10 ppm */ -#define NRF_CLOCK_LF_ACCURACY_5_PPM (9) /**< 5 ppm */ -#define NRF_CLOCK_LF_ACCURACY_2_PPM (10) /**< 2 ppm */ -#define NRF_CLOCK_LF_ACCURACY_1_PPM (11) /**< 1 ppm */ - -/** @} */ - -/**@defgroup NRF_CLOCK_LF_SRC Possible LFCLK oscillator sources - * @{ */ - -#define NRF_CLOCK_LF_SRC_RC (0) /**< LFCLK RC oscillator. */ -#define NRF_CLOCK_LF_SRC_XTAL (1) /**< LFCLK crystal oscillator. */ -#define NRF_CLOCK_LF_SRC_SYNTH (2) /**< LFCLK Synthesized from HFCLK. */ - -/** @} */ - -/** @} */ - -/** @addtogroup NRF_SDM_TYPES Types - * @{ */ - -/**@brief Type representing LFCLK oscillator source. */ -typedef struct -{ - uint8_t source; /**< LF oscillator clock source, see @ref NRF_CLOCK_LF_SRC. */ - uint8_t rc_ctiv; /**< Only for ::NRF_CLOCK_LF_SRC_RC: Calibration timer interval in 1/4 second - units (nRF52: 1-32). - @note To avoid excessive clock drift, 0.5 degrees Celsius is the - maximum temperature change allowed in one calibration timer - interval. The interval should be selected to ensure this. - - @note Must be 0 if source is not ::NRF_CLOCK_LF_SRC_RC. */ - uint8_t rc_temp_ctiv; /**< Only for ::NRF_CLOCK_LF_SRC_RC: How often (in number of calibration - intervals) the RC oscillator shall be calibrated if the temperature - hasn't changed. - 0: Always calibrate even if the temperature hasn't changed. - 1: Only calibrate if the temperature has changed (legacy - nRF51 only). - 2-33: Check the temperature and only calibrate if it has changed, - however calibration will take place every rc_temp_ctiv - intervals in any case. - - @note Must be 0 if source is not ::NRF_CLOCK_LF_SRC_RC. - - @note For nRF52, the application must ensure calibration at least once - every 8 seconds to ensure +/-500 ppm clock stability. The - recommended configuration for ::NRF_CLOCK_LF_SRC_RC on nRF52 is - rc_ctiv=16 and rc_temp_ctiv=2. This will ensure calibration at - least once every 8 seconds and for temperature changes of 0.5 - degrees Celsius every 4 seconds. See the Product Specification - for the nRF52 device being used for more information.*/ - uint8_t accuracy; /**< External clock accuracy used in the LL to compute timing - windows, see @ref NRF_CLOCK_LF_ACCURACY.*/ -} nrf_clock_lf_cfg_t; - -/**@brief Fault Handler type. - * - * When certain unrecoverable errors occur within the application or SoftDevice the fault handler will be called back. - * The protocol stack will be in an undefined state when this happens and the only way to recover will be to - * perform a reset, using e.g. CMSIS NVIC_SystemReset(). - * If the application returns from the fault handler the SoftDevice will call NVIC_SystemReset(). - * - * @note This callback is executed in HardFault context, thus SVC functions cannot be called from the fault callback. - * - * @param[in] id Fault identifier. See @ref NRF_FAULT_IDS. - * @param[in] pc The program counter of the instruction that triggered the fault. - * @param[in] info Optional additional information regarding the fault. Refer to each Fault identifier for details. - * - * @note When id is set to @ref NRF_FAULT_ID_APP_MEMACC, pc will contain the address of the instruction being executed at the time when - * the fault is detected by the CPU. The CPU program counter may have advanced up to 2 instructions (no branching) after the one that triggered the fault. - */ -typedef void (*nrf_fault_handler_t)(uint32_t id, uint32_t pc, uint32_t info); - -/** @} */ - -/** @addtogroup NRF_SDM_FUNCTIONS Functions - * @{ */ - -/**@brief Enables the SoftDevice and by extension the protocol stack. - * - * @note Some care must be taken if a low frequency clock source is already running when calling this function: - * If the LF clock has a different source then the one currently running, it will be stopped. Then, the new - * clock source will be started. - * - * @note This function has no effect when returning with an error. - * - * @post If return code is ::NRF_SUCCESS - * - SoC library and protocol stack APIs are made available. - * - A portion of RAM will be unavailable (see relevant SDS documentation). - * - Some peripherals will be unavailable or available only through the SoC API (see relevant SDS documentation). - * - Interrupts will not arrive from protected peripherals or interrupts. - * - nrf_nvic_ functions must be used instead of CMSIS NVIC_ functions for reliable usage of the SoftDevice. - * - Interrupt latency may be affected by the SoftDevice (see relevant SDS documentation). - * - Chosen low frequency clock source will be running. - * - * @param p_clock_lf_cfg Low frequency clock source and accuracy. - If NULL the clock will be configured as an RC source with rc_ctiv = 16 and .rc_temp_ctiv = 2 - In the case of XTAL source, the PPM accuracy of the chosen clock source must be greater than or equal to the actual characteristics of your XTAL clock. - * @param fault_handler Callback to be invoked in case of fault, cannot be NULL. - * - * @retval ::NRF_SUCCESS - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE SoftDevice is already enabled, and the clock source and fault handler cannot be updated. - * @retval ::NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION SoftDevice interrupt is already enabled, or an enabled interrupt has an illegal priority level. - * @retval ::NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN Unknown low frequency clock source selected. - */ -SVCALL(SD_SOFTDEVICE_ENABLE, uint32_t, sd_softdevice_enable(nrf_clock_lf_cfg_t const * p_clock_lf_cfg, nrf_fault_handler_t fault_handler)); - - -/**@brief Disables the SoftDevice and by extension the protocol stack. - * - * Idempotent function to disable the SoftDevice. - * - * @post SoC library and protocol stack APIs are made unavailable. - * @post All interrupts that was protected by the SoftDevice will be disabled and initialized to priority 0 (highest). - * @post All peripherals used by the SoftDevice will be reset to default values. - * @post All of RAM become available. - * @post All interrupts are forwarded to the application. - * @post LFCLK source chosen in ::sd_softdevice_enable will be left running. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_SOFTDEVICE_DISABLE, uint32_t, sd_softdevice_disable(void)); - -/**@brief Check if the SoftDevice is enabled. - * - * @param[out] p_softdevice_enabled If the SoftDevice is enabled: 1 else 0. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_SOFTDEVICE_IS_ENABLED, uint32_t, sd_softdevice_is_enabled(uint8_t * p_softdevice_enabled)); - -/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the SoftDevice - * - * This function is only intended to be called when a bootloader is enabled. - * - * @param[in] address The base address of the interrupt vector table for forwarded interrupts. - - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, uint32_t, sd_softdevice_vector_table_base_set(uint32_t address)); - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // NRF_SDM_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_soc.h deleted file mode 100644 index ff798448171..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_soc.h +++ /dev/null @@ -1,934 +0,0 @@ -/* - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * @defgroup nrf_soc_api SoC Library API - * @{ - * - * @brief APIs for the SoC library. - * - */ - -#ifndef NRF_SOC_H__ -#define NRF_SOC_H__ - -#include -#include "nrf.h" -#include "nrf_svc.h" -#include "nrf_error.h" -#include "nrf_error_soc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@addtogroup NRF_SOC_DEFINES Defines - * @{ */ - -/**@brief The number of the lowest SVC number reserved for the SoC library. */ -#define SOC_SVC_BASE (0x20) /**< Base value for SVCs that are available when the SoftDevice is disabled. */ -#define SOC_SVC_BASE_NOT_AVAILABLE (0x2B) /**< Base value for SVCs that are not available when the SoftDevice is disabled. */ - -/**@brief Guaranteed time for application to process radio inactive notification. */ -#define NRF_RADIO_NOTIFICATION_INACTIVE_GUARANTEED_TIME_US (62) - -/**@brief The minimum allowed timeslot extension time. */ -#define NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US (200) - -/**@brief The maximum processing time to handle a timeslot extension. */ -#define NRF_RADIO_MAX_EXTENSION_PROCESSING_TIME_US (17) - -/**@brief The latest time before the end of a timeslot the timeslot can be extended. */ -#define NRF_RADIO_MIN_EXTENSION_MARGIN_US (79) - -#define SOC_ECB_KEY_LENGTH (16) /**< ECB key length. */ -#define SOC_ECB_CLEARTEXT_LENGTH (16) /**< ECB cleartext length. */ -#define SOC_ECB_CIPHERTEXT_LENGTH (SOC_ECB_CLEARTEXT_LENGTH) /**< ECB ciphertext length. */ - -#define SD_EVT_IRQn (SWI2_IRQn) /**< SoftDevice Event IRQ number. Used for both protocol events and SoC events. */ -#define SD_EVT_IRQHandler (SWI2_IRQHandler) /**< SoftDevice Event IRQ handler. Used for both protocol events and SoC events. - The default interrupt priority for this handler is set to 4 */ -#define RADIO_NOTIFICATION_IRQn (SWI1_IRQn) /**< The radio notification IRQ number. */ -#define RADIO_NOTIFICATION_IRQHandler (SWI1_IRQHandler) /**< The radio notification IRQ handler. - The default interrupt priority for this handler is set to 4 */ -#define NRF_RADIO_LENGTH_MIN_US (100) /**< The shortest allowed radio timeslot, in microseconds. */ -#define NRF_RADIO_LENGTH_MAX_US (100000) /**< The longest allowed radio timeslot, in microseconds. */ - -#define NRF_RADIO_DISTANCE_MAX_US (128000000UL - 1UL) /**< The longest timeslot distance, in microseconds, allowed for the distance parameter (see @ref nrf_radio_request_normal_t) in the request. */ - -#define NRF_RADIO_EARLIEST_TIMEOUT_MAX_US (128000000UL - 1UL) /**< The longest timeout, in microseconds, allowed when requesting the earliest possible timeslot. */ - -#define NRF_RADIO_START_JITTER_US (2) /**< The maximum jitter in @ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START relative to the requested start time. */ - -/**@} */ - -/**@addtogroup NRF_SOC_ENUMS Enumerations - * @{ */ - -/**@brief The SVC numbers used by the SVC functions in the SoC library. */ -enum NRF_SOC_SVCS -{ - SD_PPI_CHANNEL_ENABLE_GET = SOC_SVC_BASE, - SD_PPI_CHANNEL_ENABLE_SET, - SD_PPI_CHANNEL_ENABLE_CLR, - SD_PPI_CHANNEL_ASSIGN, - SD_PPI_GROUP_TASK_ENABLE, - SD_PPI_GROUP_TASK_DISABLE, - SD_PPI_GROUP_ASSIGN, - SD_PPI_GROUP_GET, - SD_FLASH_PAGE_ERASE, - SD_FLASH_WRITE, - SD_FLASH_PROTECT, - SD_MUTEX_NEW = SOC_SVC_BASE_NOT_AVAILABLE, - SD_MUTEX_ACQUIRE, - SD_MUTEX_RELEASE, - SD_RAND_APPLICATION_POOL_CAPACITY_GET, - SD_RAND_APPLICATION_BYTES_AVAILABLE_GET, - SD_RAND_APPLICATION_VECTOR_GET, - SD_POWER_MODE_SET, - SD_POWER_SYSTEM_OFF, - SD_POWER_RESET_REASON_GET, - SD_POWER_RESET_REASON_CLR, - SD_POWER_POF_ENABLE, - SD_POWER_POF_THRESHOLD_SET, - SD_POWER_RAM_POWER_SET, - SD_POWER_RAM_POWER_CLR, - SD_POWER_RAM_POWER_GET, - SD_POWER_GPREGRET_SET, - SD_POWER_GPREGRET_CLR, - SD_POWER_GPREGRET_GET, - SD_POWER_DCDC_MODE_SET, - SD_APP_EVT_WAIT, - SD_CLOCK_HFCLK_REQUEST, - SD_CLOCK_HFCLK_RELEASE, - SD_CLOCK_HFCLK_IS_RUNNING, - SD_RADIO_NOTIFICATION_CFG_SET, - SD_ECB_BLOCK_ENCRYPT, - SD_ECB_BLOCKS_ENCRYPT, - SD_RADIO_SESSION_OPEN, - SD_RADIO_SESSION_CLOSE, - SD_RADIO_REQUEST, - SD_EVT_GET, - SD_TEMP_GET, - SVC_SOC_LAST -}; - -/**@brief Possible values of a ::nrf_mutex_t. */ -enum NRF_MUTEX_VALUES -{ - NRF_MUTEX_FREE, - NRF_MUTEX_TAKEN -}; - -/**@brief Power modes. */ -enum NRF_POWER_MODES -{ - NRF_POWER_MODE_CONSTLAT, /**< Constant latency mode. See power management in the reference manual. */ - NRF_POWER_MODE_LOWPWR /**< Low power mode. See power management in the reference manual. */ -}; - - -/**@brief Power failure thresholds */ -enum NRF_POWER_THRESHOLDS -{ - NRF_POWER_THRESHOLD_V17 = 4UL, /**< 1.7 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V18, /**< 1.8 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V19, /**< 1.9 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V20, /**< 2.0 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V21, /**< 2.1 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V22, /**< 2.2 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V23, /**< 2.3 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V24, /**< 2.4 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V25, /**< 2.5 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V26, /**< 2.6 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V27, /**< 2.7 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V28 /**< 2.8 Volts power failure threshold. */ -}; - - -/**@brief DC/DC converter modes. */ -enum NRF_POWER_DCDC_MODES -{ - NRF_POWER_DCDC_DISABLE, /**< The DCDC is disabled. */ - NRF_POWER_DCDC_ENABLE /**< The DCDC is enabled. */ -}; - -/**@brief Radio notification distances. */ -enum NRF_RADIO_NOTIFICATION_DISTANCES -{ - NRF_RADIO_NOTIFICATION_DISTANCE_NONE = 0, /**< The event does not have a notification. */ - NRF_RADIO_NOTIFICATION_DISTANCE_800US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_1740US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_2680US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_3620US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_4560US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_5500US /**< The distance from the active notification to start of radio activity. */ -}; - - -/**@brief Radio notification types. */ -enum NRF_RADIO_NOTIFICATION_TYPES -{ - NRF_RADIO_NOTIFICATION_TYPE_NONE = 0, /**< The event does not have a radio notification signal. */ - NRF_RADIO_NOTIFICATION_TYPE_INT_ON_ACTIVE, /**< Using interrupt for notification when the radio will be enabled. */ - NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE, /**< Using interrupt for notification when the radio has been disabled. */ - NRF_RADIO_NOTIFICATION_TYPE_INT_ON_BOTH, /**< Using interrupt for notification both when the radio will be enabled and disabled. */ -}; - -/**@brief The Radio signal callback types. */ -enum NRF_RADIO_CALLBACK_SIGNAL_TYPE -{ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_START, /**< This signal indicates the start of the radio timeslot. */ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_TIMER0, /**< This signal indicates the NRF_TIMER0 interrupt. */ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_RADIO, /**< This signal indicates the NRF_RADIO interrupt. */ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_EXTEND_FAILED, /**< This signal indicates extend action failed. */ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_EXTEND_SUCCEEDED /**< This signal indicates extend action succeeded. */ -}; - -/**@brief The actions requested by the signal callback. - * - * This code gives the SOC instructions about what action to take when the signal callback has - * returned. - */ -enum NRF_RADIO_SIGNAL_CALLBACK_ACTION -{ - NRF_RADIO_SIGNAL_CALLBACK_ACTION_NONE, /**< Return without action. */ - NRF_RADIO_SIGNAL_CALLBACK_ACTION_EXTEND, /**< Request an extension of the current - timeslot. Maximum execution time for this action: - @ref NRF_RADIO_MAX_EXTENSION_PROCESSING_TIME_US. - This action must be started at least - @ref NRF_RADIO_MIN_EXTENSION_MARGIN_US before - the end of the timeslot. */ - NRF_RADIO_SIGNAL_CALLBACK_ACTION_END, /**< End the current radio timeslot. */ - NRF_RADIO_SIGNAL_CALLBACK_ACTION_REQUEST_AND_END /**< Request a new radio timeslot and end the current timeslot. */ -}; - -/**@brief Radio timeslot high frequency clock source configuration. */ -enum NRF_RADIO_HFCLK_CFG -{ - NRF_RADIO_HFCLK_CFG_XTAL_GUARANTEED, /**< The SoftDevice will guarantee that the high frequency clock source is the - external crystal for the whole duration of the timeslot. This should be the - preferred option for events that use the radio or require high timing accuracy. - @note The SoftDevice will automatically turn on and off the external crystal, - at the beginning and end of the timeslot, respectively. The crystal may also - intentionally be left running after the timeslot, in cases where it is needed - by the SoftDevice shortly after the end of the timeslot. */ - NRF_RADIO_HFCLK_CFG_NO_GUARANTEE /**< This configuration allows for earlier and tighter scheduling of timeslots. - The RC oscillator may be the clock source in part or for the whole duration of the timeslot. - The RC oscillator's accuracy must therefore be taken into consideration. - @note If the application will use the radio peripheral in timeslots with this configuration, - it must make sure that the crystal is running and stable before starting the radio. */ -}; - -/**@brief Radio timeslot priorities. */ -enum NRF_RADIO_PRIORITY -{ - NRF_RADIO_PRIORITY_HIGH, /**< High (equal priority as the normal connection priority of the SoftDevice stack(s)). */ - NRF_RADIO_PRIORITY_NORMAL, /**< Normal (equal priority as the priority of secondary activities of the SoftDevice stack(s)). */ -}; - -/**@brief Radio timeslot request type. */ -enum NRF_RADIO_REQUEST_TYPE -{ - NRF_RADIO_REQ_TYPE_EARLIEST, /**< Request radio timeslot as early as possible. This should always be used for the first request in a session. */ - NRF_RADIO_REQ_TYPE_NORMAL /**< Normal radio timeslot request. */ -}; - -/**@brief SoC Events. */ -enum NRF_SOC_EVTS -{ - NRF_EVT_HFCLKSTARTED, /**< Event indicating that the HFCLK has started. */ - NRF_EVT_POWER_FAILURE_WARNING, /**< Event indicating that a power failure warning has occurred. */ - NRF_EVT_FLASH_OPERATION_SUCCESS, /**< Event indicating that the ongoing flash operation has completed successfully. */ - NRF_EVT_FLASH_OPERATION_ERROR, /**< Event indicating that the ongoing flash operation has timed out with an error. */ - NRF_EVT_RADIO_BLOCKED, /**< Event indicating that a radio timeslot was blocked. */ - NRF_EVT_RADIO_CANCELED, /**< Event indicating that a radio timeslot was canceled by SoftDevice. */ - NRF_EVT_RADIO_SIGNAL_CALLBACK_INVALID_RETURN, /**< Event indicating that a radio timeslot signal callback handler return was invalid. */ - NRF_EVT_RADIO_SESSION_IDLE, /**< Event indicating that a radio timeslot session is idle. */ - NRF_EVT_RADIO_SESSION_CLOSED, /**< Event indicating that a radio timeslot session is closed. */ - NRF_EVT_NUMBER_OF_EVTS -}; - -/**@} */ - - -/**@addtogroup NRF_SOC_STRUCTURES Structures - * @{ */ - -/**@brief Represents a mutex for use with the nrf_mutex functions. - * @note Accessing the value directly is not safe, use the mutex functions! - */ -typedef volatile uint8_t nrf_mutex_t; - -/**@brief Parameters for a request for a timeslot as early as possible. */ -typedef struct -{ - uint8_t hfclk; /**< High frequency clock source, see @ref NRF_RADIO_HFCLK_CFG. */ - uint8_t priority; /**< The radio timeslot priority, see @ref NRF_RADIO_PRIORITY. */ - uint32_t length_us; /**< The radio timeslot length (in the range 100 to 100,000] microseconds). */ - uint32_t timeout_us; /**< Longest acceptable delay until the start of the requested timeslot (up to @ref NRF_RADIO_EARLIEST_TIMEOUT_MAX_US microseconds). */ -} nrf_radio_request_earliest_t; - -/**@brief Parameters for a normal radio timeslot request. */ -typedef struct -{ - uint8_t hfclk; /**< High frequency clock source, see @ref NRF_RADIO_HFCLK_CFG. */ - uint8_t priority; /**< The radio timeslot priority, see @ref NRF_RADIO_PRIORITY. */ - uint32_t distance_us; /**< Distance from the start of the previous radio timeslot (up to @ref NRF_RADIO_DISTANCE_MAX_US microseconds). */ - uint32_t length_us; /**< The radio timeslot length (in the range [100..100,000] microseconds). */ -} nrf_radio_request_normal_t; - -/**@brief Radio timeslot request parameters. */ -typedef struct -{ - uint8_t request_type; /**< Type of request, see @ref NRF_RADIO_REQUEST_TYPE. */ - union - { - nrf_radio_request_earliest_t earliest; /**< Parameters for requesting a radio timeslot as early as possible. */ - nrf_radio_request_normal_t normal; /**< Parameters for requesting a normal radio timeslot. */ - } params; /**< Parameter union. */ -} nrf_radio_request_t; - -/**@brief Return parameters of the radio timeslot signal callback. */ -typedef struct -{ - uint8_t callback_action; /**< The action requested by the application when returning from the signal callback, see @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION. */ - union - { - struct - { - nrf_radio_request_t * p_next; /**< The request parameters for the next radio timeslot. */ - } request; /**< Additional parameters for return_code @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION_REQUEST_AND_END. */ - struct - { - uint32_t length_us; /**< Requested extension of the radio timeslot duration (microseconds) (for minimum time see @ref NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US). */ - } extend; /**< Additional parameters for return_code @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION_EXTEND. */ - } params; /**< Parameter union. */ -} nrf_radio_signal_callback_return_param_t; - -/**@brief The radio timeslot signal callback type. - * - * @note In case of invalid return parameters, the radio timeslot will automatically end - * immediately after returning from the signal callback and the - * @ref NRF_EVT_RADIO_SIGNAL_CALLBACK_INVALID_RETURN event will be sent. - * @note The returned struct pointer must remain valid after the signal callback - * function returns. For instance, this means that it must not point to a stack variable. - * - * @param[in] signal_type Type of signal, see @ref NRF_RADIO_CALLBACK_SIGNAL_TYPE. - * - * @return Pointer to structure containing action requested by the application. - */ -typedef nrf_radio_signal_callback_return_param_t * (*nrf_radio_signal_callback_t) (uint8_t signal_type); - -/**@brief AES ECB parameter typedefs */ -typedef uint8_t soc_ecb_key_t[SOC_ECB_KEY_LENGTH]; /**< Encryption key type. */ -typedef uint8_t soc_ecb_cleartext_t[SOC_ECB_CLEARTEXT_LENGTH]; /**< Cleartext data type. */ -typedef uint8_t soc_ecb_ciphertext_t[SOC_ECB_CIPHERTEXT_LENGTH]; /**< Ciphertext data type. */ - -/**@brief AES ECB data structure */ -typedef struct -{ - soc_ecb_key_t key; /**< Encryption key. */ - soc_ecb_cleartext_t cleartext; /**< Cleartext data. */ - soc_ecb_ciphertext_t ciphertext; /**< Ciphertext data. */ -} nrf_ecb_hal_data_t; - -/**@brief AES ECB block. Used to provide multiple blocks in a single call - to @ref sd_ecb_blocks_encrypt.*/ -typedef struct -{ - soc_ecb_key_t const * p_key; /**< Pointer to the Encryption key. */ - soc_ecb_cleartext_t const * p_cleartext; /**< Pointer to the Cleartext data. */ - soc_ecb_ciphertext_t * p_ciphertext; /**< Pointer to the Ciphertext data. */ -} nrf_ecb_hal_data_block_t; - -/**@} */ - -/**@addtogroup NRF_SOC_FUNCTIONS Functions - * @{ */ - -/**@brief Initialize a mutex. - * - * @param[in] p_mutex Pointer to the mutex to initialize. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_MUTEX_NEW, uint32_t, sd_mutex_new(nrf_mutex_t * p_mutex)); - -/**@brief Attempt to acquire a mutex. - * - * @param[in] p_mutex Pointer to the mutex to acquire. - * - * @retval ::NRF_SUCCESS The mutex was successfully acquired. - * @retval ::NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN The mutex could not be acquired. - */ -SVCALL(SD_MUTEX_ACQUIRE, uint32_t, sd_mutex_acquire(nrf_mutex_t * p_mutex)); - -/**@brief Release a mutex. - * - * @param[in] p_mutex Pointer to the mutex to release. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_MUTEX_RELEASE, uint32_t, sd_mutex_release(nrf_mutex_t * p_mutex)); - -/**@brief Query the capacity of the application random pool. - * - * @param[out] p_pool_capacity The capacity of the pool. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_RAND_APPLICATION_POOL_CAPACITY_GET, uint32_t, sd_rand_application_pool_capacity_get(uint8_t * p_pool_capacity)); - -/**@brief Get number of random bytes available to the application. - * - * @param[out] p_bytes_available The number of bytes currently available in the pool. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_RAND_APPLICATION_BYTES_AVAILABLE_GET, uint32_t, sd_rand_application_bytes_available_get(uint8_t * p_bytes_available)); - -/**@brief Get random bytes from the application pool. - * - * @param[out] p_buff Pointer to unit8_t buffer for storing the bytes. - * @param[in] length Number of bytes to take from pool and place in p_buff. - * - * @retval ::NRF_SUCCESS The requested bytes were written to p_buff. - * @retval ::NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES No bytes were written to the buffer, because there were not enough bytes available. -*/ -SVCALL(SD_RAND_APPLICATION_VECTOR_GET, uint32_t, sd_rand_application_vector_get(uint8_t * p_buff, uint8_t length)); - -/**@brief Gets the reset reason register. - * - * @param[out] p_reset_reason Contents of the NRF_POWER->RESETREAS register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RESET_REASON_GET, uint32_t, sd_power_reset_reason_get(uint32_t * p_reset_reason)); - -/**@brief Clears the bits of the reset reason register. - * - * @param[in] reset_reason_clr_msk Contains the bits to clear from the reset reason register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RESET_REASON_CLR, uint32_t, sd_power_reset_reason_clr(uint32_t reset_reason_clr_msk)); - -/**@brief Sets the power mode when in CPU sleep. - * - * @param[in] power_mode The power mode to use when in CPU sleep, see @ref NRF_POWER_MODES. @sa sd_app_evt_wait - * - * @retval ::NRF_SUCCESS The power mode was set. - * @retval ::NRF_ERROR_SOC_POWER_MODE_UNKNOWN The power mode was unknown. - */ -SVCALL(SD_POWER_MODE_SET, uint32_t, sd_power_mode_set(uint8_t power_mode)); - -/**@brief Puts the chip in System OFF mode. - * - * @retval ::NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN - */ -SVCALL(SD_POWER_SYSTEM_OFF, uint32_t, sd_power_system_off(void)); - -/**@brief Enables or disables the power-fail comparator. - * - * Enabling this will give a SoftDevice event (NRF_EVT_POWER_FAILURE_WARNING) when the power failure warning occurs. - * The event can be retrieved with sd_evt_get(); - * - * @param[in] pof_enable True if the power-fail comparator should be enabled, false if it should be disabled. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_POF_ENABLE, uint32_t, sd_power_pof_enable(uint8_t pof_enable)); - -/**@brief Sets the power-fail threshold value. - * - * @param[in] threshold The power-fail threshold value to use, see @ref NRF_POWER_THRESHOLDS. - * - * @retval ::NRF_SUCCESS The power failure threshold was set. - * @retval ::NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN The power failure threshold is unknown. - */ -SVCALL(SD_POWER_POF_THRESHOLD_SET, uint32_t, sd_power_pof_threshold_set(uint8_t threshold)); - -/**@brief Writes the NRF_POWER->RAM[index].POWERSET register. - * - * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWERSET register to write to. - * @param[in] ram_powerset Contains the word to write to the NRF_POWER->RAM[index].POWERSET register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RAM_POWER_SET, uint32_t, sd_power_ram_power_set(uint8_t index, uint32_t ram_powerset)); - -/**@brief Writes the NRF_POWER->RAM[index].POWERCLR register. - * - * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWERCLR register to write to. - * @param[in] ram_powerclr Contains the word to write to the NRF_POWER->RAM[index].POWERCLR register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RAM_POWER_CLR, uint32_t, sd_power_ram_power_clr(uint8_t index, uint32_t ram_powerclr)); - -/**@brief Get contents of NRF_POWER->RAM[index].POWER register, indicates power status of RAM[index] blocks. - * - * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWER register to read from. - * @param[out] p_ram_power Content of NRF_POWER->RAM[index].POWER register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RAM_POWER_GET, uint32_t, sd_power_ram_power_get(uint8_t index, uint32_t * p_ram_power)); - -/**@brief Set bits in the general purpose retention registers (NRF_POWER->GPREGRET*). - * - * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. - * @param[in] gpregret_msk Bits to be set in the GPREGRET register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_GPREGRET_SET, uint32_t, sd_power_gpregret_set(uint32_t gpregret_id, uint32_t gpregret_msk)); - -/**@brief Clear bits in the general purpose retention registers (NRF_POWER->GPREGRET*). - * - * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. - * @param[in] gpregret_msk Bits to be clear in the GPREGRET register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_GPREGRET_CLR, uint32_t, sd_power_gpregret_clr(uint32_t gpregret_id, uint32_t gpregret_msk)); - -/**@brief Get contents of the general purpose retention registers (NRF_POWER->GPREGRET*). - * - * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. - * @param[out] p_gpregret Contents of the GPREGRET register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_GPREGRET_GET, uint32_t, sd_power_gpregret_get(uint32_t gpregret_id, uint32_t *p_gpregret)); - -/**@brief Sets the DCDC mode. - * - * Enable or disable the DCDC peripheral. - * - * @param[in] dcdc_mode The mode of the DCDC, see @ref NRF_POWER_DCDC_MODES. - * - * @retval ::NRF_SUCCESS - * @retval ::NRF_ERROR_INVALID_PARAM The DCDC mode is invalid. - */ -SVCALL(SD_POWER_DCDC_MODE_SET, uint32_t, sd_power_dcdc_mode_set(uint8_t dcdc_mode)); - -/**@brief Request the high frequency crystal oscillator. - * - * Will start the high frequency crystal oscillator, the startup time of the crystal varies - * and the ::sd_clock_hfclk_is_running function can be polled to check if it has started. - * - * @see sd_clock_hfclk_is_running - * @see sd_clock_hfclk_release - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_CLOCK_HFCLK_REQUEST, uint32_t, sd_clock_hfclk_request(void)); - -/**@brief Releases the high frequency crystal oscillator. - * - * Will stop the high frequency crystal oscillator, this happens immediately. - * - * @see sd_clock_hfclk_is_running - * @see sd_clock_hfclk_request - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_CLOCK_HFCLK_RELEASE, uint32_t, sd_clock_hfclk_release(void)); - -/**@brief Checks if the high frequency crystal oscillator is running. - * - * @see sd_clock_hfclk_request - * @see sd_clock_hfclk_release - * - * @param[out] p_is_running 1 if the external crystal oscillator is running, 0 if not. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_CLOCK_HFCLK_IS_RUNNING, uint32_t, sd_clock_hfclk_is_running(uint32_t * p_is_running)); - -/**@brief Waits for an application event. - * - * An application event is either an application interrupt or a pended interrupt when the interrupt - * is disabled. - * - * When the application waits for an application event by calling this function, an interrupt that - * is enabled will be taken immediately on pending since this function will wait in thread mode, - * then the execution will return in the application's main thread. - * - * In order to wake up from disabled interrupts, the SEVONPEND flag has to be set in the Cortex-M - * MCU's System Control Register (SCR), CMSIS_SCB. In that case, when a disabled interrupt gets - * pended, this function will return to the application's main thread. - * - * @note The application must ensure that the pended flag is cleared using ::sd_nvic_ClearPendingIRQ - * in order to sleep using this function. This is only necessary for disabled interrupts, as - * the interrupt handler will clear the pending flag automatically for enabled interrupts. - * - * @note If an application interrupt has happened since the last time sd_app_evt_wait was - * called this function will return immediately and not go to sleep. This is to avoid race - * conditions that can occur when a flag is updated in the interrupt handler and processed - * in the main loop. - * - * @post An application interrupt has happened or a interrupt pending flag is set. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_APP_EVT_WAIT, uint32_t, sd_app_evt_wait(void)); - -/**@brief Get PPI channel enable register contents. - * - * @param[out] p_channel_enable The contents of the PPI CHEN register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_CHANNEL_ENABLE_GET, uint32_t, sd_ppi_channel_enable_get(uint32_t * p_channel_enable)); - -/**@brief Set PPI channel enable register. - * - * @param[in] channel_enable_set_msk Mask containing the bits to set in the PPI CHEN register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_CHANNEL_ENABLE_SET, uint32_t, sd_ppi_channel_enable_set(uint32_t channel_enable_set_msk)); - -/**@brief Clear PPI channel enable register. - * - * @param[in] channel_enable_clr_msk Mask containing the bits to clear in the PPI CHEN register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_CHANNEL_ENABLE_CLR, uint32_t, sd_ppi_channel_enable_clr(uint32_t channel_enable_clr_msk)); - -/**@brief Assign endpoints to a PPI channel. - * - * @param[in] channel_num Number of the PPI channel to assign. - * @param[in] evt_endpoint Event endpoint of the PPI channel. - * @param[in] task_endpoint Task endpoint of the PPI channel. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_CHANNEL The channel number is invalid. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_CHANNEL_ASSIGN, uint32_t, sd_ppi_channel_assign(uint8_t channel_num, const volatile void * evt_endpoint, const volatile void * task_endpoint)); - -/**@brief Task to enable a channel group. - * - * @param[in] group_num Number of the channel group. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_GROUP_TASK_ENABLE, uint32_t, sd_ppi_group_task_enable(uint8_t group_num)); - -/**@brief Task to disable a channel group. - * - * @param[in] group_num Number of the PPI group. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_GROUP_TASK_DISABLE, uint32_t, sd_ppi_group_task_disable(uint8_t group_num)); - -/**@brief Assign PPI channels to a channel group. - * - * @param[in] group_num Number of the channel group. - * @param[in] channel_msk Mask of the channels to assign to the group. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_GROUP_ASSIGN, uint32_t, sd_ppi_group_assign(uint8_t group_num, uint32_t channel_msk)); - -/**@brief Gets the PPI channels of a channel group. - * - * @param[in] group_num Number of the channel group. - * @param[out] p_channel_msk Mask of the channels assigned to the group. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_GROUP_GET, uint32_t, sd_ppi_group_get(uint8_t group_num, uint32_t * p_channel_msk)); - -/**@brief Configures the Radio Notification signal. - * - * @note - * - The notification signal latency depends on the interrupt priority settings of SWI used - * for notification signal. - * - To ensure that the radio notification signal behaves in a consistent way, the radio - * notifications must be configured when there is no protocol stack or other SoftDevice - * activity in progress. It is recommended that the radio notification signal is - * configured directly after the SoftDevice has been enabled. - * - In the period between the ACTIVE signal and the start of the Radio Event, the SoftDevice - * will interrupt the application to do Radio Event preparation. - * - Using the Radio Notification feature may limit the bandwidth, as the SoftDevice may have - * to shorten the connection events to have time for the Radio Notification signals. - * - * @param[in] type Type of notification signal, see @ref NRF_RADIO_NOTIFICATION_TYPES. - * @ref NRF_RADIO_NOTIFICATION_TYPE_NONE shall be used to turn off radio - * notification. Using @ref NRF_RADIO_NOTIFICATION_DISTANCE_NONE is - * recommended (but not required) to be used with - * @ref NRF_RADIO_NOTIFICATION_TYPE_NONE. - * - * @param[in] distance Distance between the notification signal and start of radio activity, see @ref NRF_RADIO_NOTIFICATION_DISTANCES. - * This parameter is ignored when @ref NRF_RADIO_NOTIFICATION_TYPE_NONE or - * @ref NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE is used. - * - * @retval ::NRF_ERROR_INVALID_PARAM The group number is invalid. - * @retval ::NRF_ERROR_INVALID_STATE A protocol stack or other SoftDevice is running. Stop all - * running activities and retry. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_RADIO_NOTIFICATION_CFG_SET, uint32_t, sd_radio_notification_cfg_set(uint8_t type, uint8_t distance)); - -/**@brief Encrypts a block according to the specified parameters. - * - * 128-bit AES encryption. - * - * @note: - * - The application may set the SEVONPEND bit in the SCR to 1 to make the SoftDevice sleep while - * the ECB is running. The SEVONPEND bit should only be cleared (set to 0) from application - * main or low interrupt level. - * - * @param[in, out] p_ecb_data Pointer to the ECB parameters' struct (two input - * parameters and one output parameter). - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_ECB_BLOCK_ENCRYPT, uint32_t, sd_ecb_block_encrypt(nrf_ecb_hal_data_t * p_ecb_data)); - -/**@brief Encrypts multiple data blocks provided as an array of data block structures. - * - * @details: Performs 128-bit AES encryption on multiple data blocks - * - * @note: - * - The application may set the SEVONPEND bit in the SCR to 1 to make the SoftDevice sleep while - * the ECB is running. The SEVONPEND bit should only be cleared (set to 0) from application - * main or low interrupt level. - * - * @param[in] block_count Count of blocks in the p_data_blocks array. - * @param[in,out] p_data_blocks Pointer to the first entry in a contiguous array of - * @ref nrf_ecb_hal_data_block_t structures. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_ECB_BLOCKS_ENCRYPT, uint32_t, sd_ecb_blocks_encrypt(uint8_t block_count, nrf_ecb_hal_data_block_t * p_data_blocks)); - -/**@brief Gets any pending events generated by the SoC API. - * - * The application should keep calling this function to get events, until ::NRF_ERROR_NOT_FOUND is returned. - * - * @param[out] p_evt_id Set to one of the values in @ref NRF_SOC_EVTS, if any events are pending. - * - * @retval ::NRF_SUCCESS An event was pending. The event id is written in the p_evt_id parameter. - * @retval ::NRF_ERROR_NOT_FOUND No pending events. - */ -SVCALL(SD_EVT_GET, uint32_t, sd_evt_get(uint32_t * p_evt_id)); - -/**@brief Get the temperature measured on the chip - * - * This function will block until the temperature measurement is done. - * It takes around 50 us from call to return. - * - * @param[out] p_temp Result of temperature measurement. Die temperature in 0.25 degrees Celsius. - * - * @retval ::NRF_SUCCESS A temperature measurement was done, and the temperature was written to temp - */ -SVCALL(SD_TEMP_GET, uint32_t, sd_temp_get(int32_t * p_temp)); - -/**@brief Flash Write -* -* Commands to write a buffer to flash -* -* If the SoftDevice is enabled: -* This call initiates the flash access command, and its completion will be communicated to the -* application with exactly one of the following events: -* - @ref NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed. -* - @ref NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started. -* -* If the SoftDevice is not enabled no event will be generated, and this call will return @ref NRF_SUCCESS when the - * write has been completed -* -* @note -* - This call takes control over the radio and the CPU during flash erase and write to make sure that -* they will not interfere with the flash access. This means that all interrupts will be blocked -* for a predictable time (depending on the NVMC specification in the device's Product Specification -* and the command parameters). -* - The data in the p_src buffer should not be modified before the @ref NRF_EVT_FLASH_OPERATION_SUCCESS -* or the @ref NRF_EVT_FLASH_OPERATION_ERROR have been received if the SoftDevice is enabled. -* -* -* @param[in] p_dst Pointer to start of flash location to be written. -* @param[in] p_src Pointer to buffer with data to be written. -* @param[in] size Number of 32-bit words to write. Maximum size is the number of words in one -* flash page. See the device's Product Specification for details. -* -* @retval ::NRF_ERROR_INVALID_ADDR Tried to write to a non existing flash address, or p_dst or p_src was unaligned. -* @retval ::NRF_ERROR_BUSY The previous command has not yet completed. -* @retval ::NRF_ERROR_INVALID_LENGTH Size was 0, or higher than the maximum allowed size. -* @retval ::NRF_ERROR_FORBIDDEN Tried to write to or read from protected location. -* @retval ::NRF_SUCCESS The command was accepted. -*/ -SVCALL(SD_FLASH_WRITE, uint32_t, sd_flash_write(uint32_t * p_dst, uint32_t const * p_src, uint32_t size)); - - -/**@brief Flash Erase page -* -* Commands to erase a flash page -* If the SoftDevice is enabled: -* This call initiates the flash access command, and its completion will be communicated to the -* application with exactly one of the following events: -* - @ref NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed. -* - @ref NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started. -* -* If the SoftDevice is not enabled no event will be generated, and this call will return @ref NRF_SUCCESS when the -* erase has been completed -* -* @note -* - This call takes control over the radio and the CPU during flash erase and write to make sure that -* they will not interfere with the flash access. This means that all interrupts will be blocked -* for a predictable time (depending on the NVMC specification in the device's Product Specification -* and the command parameters). -* -* -* @param[in] page_number Page number of the page to erase -* -* @retval ::NRF_ERROR_INTERNAL If a new session could not be opened due to an internal error. -* @retval ::NRF_ERROR_INVALID_ADDR Tried to erase to a non existing flash page. -* @retval ::NRF_ERROR_BUSY The previous command has not yet completed. -* @retval ::NRF_ERROR_FORBIDDEN Tried to erase a protected page. -* @retval ::NRF_SUCCESS The command was accepted. -*/ -SVCALL(SD_FLASH_PAGE_ERASE, uint32_t, sd_flash_page_erase(uint32_t page_number)); - - -/**@brief Flash Protection set - * - * Commands to set the flash protection configuration registers. - This sets the CONFIGx registers of the BPROT peripheral. - * - * @note Not all parameters are valid for all products. Some bits in each parameter may not be - * valid for your product. Please refer your Product Specification for more details. - * - * @note To read the values read them directly. They are only write-protected. - * - * @param[in] block_cfg0 Value to be written to the configuration register. - * @param[in] block_cfg1 Value to be written to the configuration register. - * @param[in] block_cfg2 Value to be written to the configuration register. - * @param[in] block_cfg3 Value to be written to the configuration register. - * - * @retval ::NRF_ERROR_NOT_SUPPORTED Non-zero value supplied to one or more of the unsupported parameters. - * @retval ::NRF_ERROR_FORBIDDEN Tried to protect the flash region used by the SoftDevice. - * @retval ::NRF_SUCCESS Values successfully written to configuration registers. - */ -SVCALL(SD_FLASH_PROTECT, uint32_t, sd_flash_protect(uint32_t block_cfg0, uint32_t block_cfg1, uint32_t block_cfg2, uint32_t block_cfg3)); - -/**@brief Opens a session for radio timeslot requests. - * - * @note Only one session can be open at a time. - * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START) will be called when the radio timeslot - * starts. From this point the NRF_RADIO and NRF_TIMER0 peripherals can be freely accessed - * by the application. - * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_TIMER0) is called whenever the NRF_TIMER0 - * interrupt occurs. - * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_RADIO) is called whenever the NRF_RADIO - * interrupt occurs. - * @note p_radio_signal_callback() will be called at ARM interrupt priority level 0. This - * implies that none of the sd_* API calls can be used from p_radio_signal_callback(). - * - * @param[in] p_radio_signal_callback The signal callback. - * - * @retval ::NRF_ERROR_INVALID_ADDR p_radio_signal_callback is an invalid function pointer. - * @retval ::NRF_ERROR_BUSY If session cannot be opened. - * @retval ::NRF_ERROR_INTERNAL If a new session could not be opened due to an internal error. - * @retval ::NRF_SUCCESS Otherwise. - */ - SVCALL(SD_RADIO_SESSION_OPEN, uint32_t, sd_radio_session_open(nrf_radio_signal_callback_t p_radio_signal_callback)); - -/**@brief Closes a session for radio timeslot requests. - * - * @note Any current radio timeslot will be finished before the session is closed. - * @note If a radio timeslot is scheduled when the session is closed, it will be canceled. - * @note The application cannot consider the session closed until the @ref NRF_EVT_RADIO_SESSION_CLOSED - * event is received. - * - * @retval ::NRF_ERROR_FORBIDDEN If session not opened. - * @retval ::NRF_ERROR_BUSY If session is currently being closed. - * @retval ::NRF_SUCCESS Otherwise. - */ - SVCALL(SD_RADIO_SESSION_CLOSE, uint32_t, sd_radio_session_close(void)); - -/**@brief Requests a radio timeslot. - * - * @note The request type is determined by p_request->request_type, and can be one of @ref NRF_RADIO_REQ_TYPE_EARLIEST - * and @ref NRF_RADIO_REQ_TYPE_NORMAL. The first request in a session must always be of type @ref NRF_RADIO_REQ_TYPE_EARLIEST. - * @note For a normal request (@ref NRF_RADIO_REQ_TYPE_NORMAL), the start time of a radio timeslot is specified by - * p_request->distance_us and is given relative to the start of the previous timeslot. - * @note A too small p_request->distance_us will lead to a @ref NRF_EVT_RADIO_BLOCKED event. - * @note Timeslots scheduled too close will lead to a @ref NRF_EVT_RADIO_BLOCKED event. - * @note See the SoftDevice Specification for more on radio timeslot scheduling, distances and lengths. - * @note If an opportunity for the first radio timeslot is not found before 100 ms after the call to this - * function, it is not scheduled, and instead a @ref NRF_EVT_RADIO_BLOCKED event is sent. - * The application may then try to schedule the first radio timeslot again. - * @note Successful requests will result in nrf_radio_signal_callback_t(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START). - * Unsuccessful requests will result in a @ref NRF_EVT_RADIO_BLOCKED event, see @ref NRF_SOC_EVTS. - * @note The jitter in the start time of the radio timeslots is +/- @ref NRF_RADIO_START_JITTER_US us. - * @note The nrf_radio_signal_callback_t(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START) call has a latency relative to the - * specified radio timeslot start, but this does not affect the actual start time of the timeslot. - * @note NRF_TIMER0 is reset at the start of the radio timeslot, and is clocked at 1MHz from the high frequency - * (16 MHz) clock source. If p_request->hfclk_force_xtal is true, the high frequency clock is - * guaranteed to be clocked from the external crystal. - * @note The SoftDevice will neither access the NRF_RADIO peripheral nor the NRF_TIMER0 peripheral - * during the radio timeslot. - * - * @param[in] p_request Pointer to the request parameters. - * - * @retval ::NRF_ERROR_FORBIDDEN If session not opened or the session is not IDLE. - * @retval ::NRF_ERROR_INVALID_ADDR If the p_request pointer is invalid. - * @retval ::NRF_ERROR_INVALID_PARAM If the parameters of p_request are not valid. - * @retval ::NRF_SUCCESS Otherwise. - */ - SVCALL(SD_RADIO_REQUEST, uint32_t, sd_radio_request(nrf_radio_request_t const * p_request)); - -/**@} */ - -#ifdef __cplusplus -} -#endif -#endif // NRF_SOC_H__ - -/**@} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_svc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_svc.h deleted file mode 100644 index 292c6929828..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/headers/nrf_svc.h +++ /dev/null @@ -1,90 +0,0 @@ -/* - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef NRF_SVC__ -#define NRF_SVC__ - -#include "stdint.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef SVCALL_AS_NORMAL_FUNCTION -#define SVCALL(number, return_type, signature) return_type signature -#else - -#ifndef SVCALL -#if defined (__CC_ARM) -#define SVCALL(number, return_type, signature) return_type __svc(number) signature -#elif defined (__GNUC__) -#ifdef __cplusplus -#define GCC_CAST_CPP (uint16_t) -#else -#define GCC_CAST_CPP -#endif -#define SVCALL(number, return_type, signature) \ - _Pragma("GCC diagnostic push") \ - _Pragma("GCC diagnostic ignored \"-Wreturn-type\"") \ - __attribute__((naked)) \ - __attribute__((unused)) \ - static return_type signature \ - { \ - __asm( \ - "svc %0\n" \ - "bx r14" : : "I" (GCC_CAST_CPP number) : "r0" \ - ); \ - } \ - _Pragma("GCC diagnostic pop") - -#elif defined (__ICCARM__) -#define PRAGMA(x) _Pragma(#x) -#define SVCALL(number, return_type, signature) \ -PRAGMA(swi_number = (number)) \ - __swi return_type signature; -#else -#define SVCALL(number, return_type, signature) return_type signature -#endif -#endif // SVCALL - -#endif // SVCALL_AS_NORMAL_FUNCTION - -#ifdef __cplusplus -} -#endif -#endif // NRF_SVC__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/hex/s112_nrf52810_5.1.0_licence-agreement.txt b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/hex/s112_nrf52810_5.1.0_licence-agreement.txt deleted file mode 100644 index 00c2e54c477..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/hex/s112_nrf52810_5.1.0_licence-agreement.txt +++ /dev/null @@ -1,35 +0,0 @@ -Copyright (c) 2007 - 2017, Nordic Semiconductor ASA -All rights reserved. - -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - -1. Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. - -2. Redistributions in binary form, except as embedded into a Nordic - Semiconductor ASA integrated circuit in a product or a software update for - such product, must reproduce the above copyright notice, this list of - conditions and the following disclaimer in the documentation and/or other - materials provided with the distribution. - -3. Neither the name of Nordic Semiconductor ASA nor the names of its - contributors may be used to endorse or promote products derived from this - software without specific prior written permission. - -4. This software, with or without modification, must only be used with a - Nordic Semiconductor ASA integrated circuit. - -5. Any software provided in binary form under this license must not be reverse - engineered, decompiled, modified and/or disassembled. - -THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS -OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE -LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT -OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/hex/s112_nrf52810_5.1.0_softdevice.hex b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/hex/s112_nrf52810_5.1.0_softdevice.hex deleted file mode 100644 index 79fc6a560a5..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S112/hex/s112_nrf52810_5.1.0_softdevice.hex +++ /dev/null @@ -1,5925 +0,0 @@ -:020000040000FA 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+++ /dev/null @@ -1,35 +0,0 @@ -Copyright (c) 2007 - 2017, Nordic Semiconductor ASA -All rights reserved. - -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - -1. Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. - -2. Redistributions in binary form, except as embedded into a Nordic - Semiconductor ASA integrated circuit in a product or a software update for - such product, must reproduce the above copyright notice, this list of - conditions and the following disclaimer in the documentation and/or other - materials provided with the distribution. - -3. Neither the name of Nordic Semiconductor ASA nor the names of its - contributors may be used to endorse or promote products derived from this - software without specific prior written permission. - -4. This software, with or without modification, must only be used with a - Nordic Semiconductor ASA integrated circuit. - -5. Any software provided in binary form under this license must not be reverse - engineered, decompiled, modified and/or disassembled. - -THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS -OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE -LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT -OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/doc/s132_nrf52_5.0.0_migration-document.pdf b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/doc/s132_nrf52_5.0.0_migration-document.pdf deleted file mode 100644 index afd9ec7f417a65d00913eebe6eaebdfd90a17931..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 99118 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Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_COMMON - @{ - @addtogroup nrf_error - @{ - @ingroup BLE_COMMON - @} - - @defgroup ble_err General error codes - @{ - - @brief General error code definitions for the BLE API. - - @ingroup BLE_COMMON -*/ -#ifndef NRF_BLE_ERR_H__ -#define NRF_BLE_ERR_H__ - -#include "nrf_error.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* @defgroup BLE_ERRORS Error Codes - * @{ */ -#define BLE_ERROR_NOT_ENABLED (NRF_ERROR_STK_BASE_NUM+0x001) /**< @ref sd_ble_enable has not been called. */ -#define BLE_ERROR_INVALID_CONN_HANDLE (NRF_ERROR_STK_BASE_NUM+0x002) /**< Invalid connection handle. */ -#define BLE_ERROR_INVALID_ATTR_HANDLE (NRF_ERROR_STK_BASE_NUM+0x003) /**< Invalid attribute handle. */ -#define BLE_ERROR_INVALID_ROLE (NRF_ERROR_STK_BASE_NUM+0x004) /**< Invalid role. */ -/** @} */ - - -/** @defgroup BLE_ERROR_SUBRANGES Module specific error code subranges - * @brief Assignment of subranges for module specific error codes. - * @note For specific error codes, see ble_.h or ble_error_.h. - * @{ */ -#define NRF_L2CAP_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x100) /**< L2CAP specific errors. */ -#define NRF_GAP_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x200) /**< GAP specific errors. */ -#define NRF_GATTC_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x300) /**< GATT client specific errors. */ -#define NRF_GATTS_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x400) /**< GATT server specific errors. */ -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif - - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gap.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gap.h deleted file mode 100644 index 13f7721c583..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gap.h +++ /dev/null @@ -1,2170 +0,0 @@ -/* - * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_GAP Generic Access Profile (GAP) - @{ - @brief Definitions and prototypes for the GAP interface. - */ - -#ifndef BLE_GAP_H__ -#define BLE_GAP_H__ - - -#include "ble_types.h" -#include "ble_ranges.h" -#include "nrf_svc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@addtogroup BLE_GAP_ENUMERATIONS Enumerations - * @{ */ - -/**@brief GAP API SVC numbers. - */ -enum BLE_GAP_SVCS -{ - SD_BLE_GAP_ADDR_SET = BLE_GAP_SVC_BASE, /**< Set own Bluetooth Address. */ - SD_BLE_GAP_ADDR_GET, /**< Get own Bluetooth Address. */ - SD_BLE_GAP_WHITELIST_SET, /**< Set active whitelist. */ - SD_BLE_GAP_DEVICE_IDENTITIES_SET, /**< Set device identity list. */ - SD_BLE_GAP_PRIVACY_SET, /**< Set Privacy settings*/ - SD_BLE_GAP_PRIVACY_GET, /**< Get Privacy settings*/ - SD_BLE_GAP_ADV_DATA_SET, /**< Set Advertising Data. */ - SD_BLE_GAP_ADV_START, /**< Start Advertising. */ - SD_BLE_GAP_ADV_STOP, /**< Stop Advertising. */ - SD_BLE_GAP_CONN_PARAM_UPDATE, /**< Connection Parameter Update. */ - SD_BLE_GAP_DISCONNECT, /**< Disconnect. */ - SD_BLE_GAP_TX_POWER_SET, /**< Set TX Power. */ - SD_BLE_GAP_APPEARANCE_SET, /**< Set Appearance. */ - SD_BLE_GAP_APPEARANCE_GET, /**< Get Appearance. */ - SD_BLE_GAP_PPCP_SET, /**< Set PPCP. */ - SD_BLE_GAP_PPCP_GET, /**< Get PPCP. */ - SD_BLE_GAP_DEVICE_NAME_SET, /**< Set Device Name. */ - SD_BLE_GAP_DEVICE_NAME_GET, /**< Get Device Name. */ - SD_BLE_GAP_AUTHENTICATE, /**< Initiate Pairing/Bonding. */ - SD_BLE_GAP_SEC_PARAMS_REPLY, /**< Reply with Security Parameters. */ - SD_BLE_GAP_AUTH_KEY_REPLY, /**< Reply with an authentication key. */ - SD_BLE_GAP_LESC_DHKEY_REPLY, /**< Reply with an LE Secure Connections DHKey. */ - SD_BLE_GAP_KEYPRESS_NOTIFY, /**< Notify of a keypress during an authentication procedure. */ - SD_BLE_GAP_LESC_OOB_DATA_GET, /**< Get the local LE Secure Connections OOB data. */ - SD_BLE_GAP_LESC_OOB_DATA_SET, /**< Set the remote LE Secure Connections OOB data. */ - SD_BLE_GAP_ENCRYPT, /**< Initiate encryption procedure. */ - SD_BLE_GAP_SEC_INFO_REPLY, /**< Reply with Security Information. */ - SD_BLE_GAP_CONN_SEC_GET, /**< Obtain connection security level. */ - SD_BLE_GAP_RSSI_START, /**< Start reporting of changes in RSSI. */ - SD_BLE_GAP_RSSI_STOP, /**< Stop reporting of changes in RSSI. */ - SD_BLE_GAP_SCAN_START, /**< Start Scanning. */ - SD_BLE_GAP_SCAN_STOP, /**< Stop Scanning. */ - SD_BLE_GAP_CONNECT, /**< Connect. */ - SD_BLE_GAP_CONNECT_CANCEL, /**< Cancel ongoing connection procedure. */ - SD_BLE_GAP_RSSI_GET, /**< Get the last RSSI sample. */ - SD_BLE_GAP_PHY_UPDATE, /**< Initiate or respond to a PHY Update Procedure. */ - SD_BLE_GAP_DATA_LENGTH_UPDATE, /**< Initiate or respond to a Data Length Update Procedure. */ -}; - -/**@brief GAP Event IDs. - * IDs that uniquely identify an event coming from the stack to the application. - */ -enum BLE_GAP_EVTS -{ - BLE_GAP_EVT_CONNECTED = BLE_GAP_EVT_BASE, /**< Connection established. \n See @ref ble_gap_evt_connected_t. */ - BLE_GAP_EVT_DISCONNECTED, /**< Disconnected from peer. \n See @ref ble_gap_evt_disconnected_t. */ - BLE_GAP_EVT_CONN_PARAM_UPDATE, /**< Connection Parameters updated. \n See @ref ble_gap_evt_conn_param_update_t. */ - BLE_GAP_EVT_SEC_PARAMS_REQUEST, /**< Request to provide security parameters. \n Reply with @ref sd_ble_gap_sec_params_reply. \n See @ref ble_gap_evt_sec_params_request_t. */ - BLE_GAP_EVT_SEC_INFO_REQUEST, /**< Request to provide security information. \n Reply with @ref sd_ble_gap_sec_info_reply. \n See @ref ble_gap_evt_sec_info_request_t. */ - BLE_GAP_EVT_PASSKEY_DISPLAY, /**< Request to display a passkey to the user. \n In LESC Numeric Comparison, reply with @ref sd_ble_gap_auth_key_reply. \n See @ref ble_gap_evt_passkey_display_t. */ - BLE_GAP_EVT_KEY_PRESSED, /**< Notification of a keypress on the remote device.\n See @ref ble_gap_evt_key_pressed_t */ - BLE_GAP_EVT_AUTH_KEY_REQUEST, /**< Request to provide an authentication key. \n Reply with @ref sd_ble_gap_auth_key_reply. \n See @ref ble_gap_evt_auth_key_request_t. */ - BLE_GAP_EVT_LESC_DHKEY_REQUEST, /**< Request to calculate an LE Secure Connections DHKey. \n Reply with @ref sd_ble_gap_lesc_dhkey_reply. \n See @ref ble_gap_evt_lesc_dhkey_request_t */ - BLE_GAP_EVT_AUTH_STATUS, /**< Authentication procedure completed with status. \n See @ref ble_gap_evt_auth_status_t. */ - BLE_GAP_EVT_CONN_SEC_UPDATE, /**< Connection security updated. \n See @ref ble_gap_evt_conn_sec_update_t. */ - BLE_GAP_EVT_TIMEOUT, /**< Timeout expired. \n See @ref ble_gap_evt_timeout_t. */ - BLE_GAP_EVT_RSSI_CHANGED, /**< RSSI report. \n See @ref ble_gap_evt_rssi_changed_t. */ - BLE_GAP_EVT_ADV_REPORT, /**< Advertising report. \n See @ref ble_gap_evt_adv_report_t. */ - BLE_GAP_EVT_SEC_REQUEST, /**< Security Request. \n See @ref ble_gap_evt_sec_request_t. */ - BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST, /**< Connection Parameter Update Request. \n Reply with @ref sd_ble_gap_conn_param_update. \n See @ref ble_gap_evt_conn_param_update_request_t. */ - BLE_GAP_EVT_SCAN_REQ_REPORT, /**< Scan request report. \n See @ref ble_gap_evt_scan_req_report_t. */ - BLE_GAP_EVT_PHY_UPDATE_REQUEST, /**< PHY Update Request. \n Reply with @ref sd_ble_gap_phy_update. \n See @ref ble_gap_evt_phy_update_request_t. */ - BLE_GAP_EVT_PHY_UPDATE, /**< PHY Update Procedure is complete. \n See @ref ble_gap_evt_phy_update_t. */ - BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST, /**< Data Length Update Request. \n Reply with @ref sd_ble_gap_data_length_update.\n See @ref ble_gap_evt_data_length_update_request_t. */ - BLE_GAP_EVT_DATA_LENGTH_UPDATE, /**< LL Data Channel PDU payload length updated. \n See @ref ble_gap_evt_data_length_update_t. */ -}; - -/**@brief GAP Option IDs. - * IDs that uniquely identify a GAP option. - */ -enum BLE_GAP_OPTS -{ - BLE_GAP_OPT_CH_MAP = BLE_GAP_OPT_BASE, /**< Channel Map. @ref ble_gap_opt_ch_map_t */ - BLE_GAP_OPT_LOCAL_CONN_LATENCY, /**< Local connection latency. @ref ble_gap_opt_local_conn_latency_t */ - BLE_GAP_OPT_PASSKEY, /**< Set passkey. @ref ble_gap_opt_passkey_t */ - BLE_GAP_OPT_SCAN_REQ_REPORT, /**< Scan request report. @ref ble_gap_opt_scan_req_report_t */ - BLE_GAP_OPT_COMPAT_MODE_1, /**< Compatibility mode. @ref ble_gap_opt_compat_mode_1_t */ - BLE_GAP_OPT_AUTH_PAYLOAD_TIMEOUT, /**< Set Authenticated payload timeout. @ref ble_gap_opt_auth_payload_timeout_t */ - BLE_GAP_OPT_SLAVE_LATENCY_DISABLE, /**< Disable slave latency. @ref ble_gap_opt_slave_latency_disable_t */ -}; - -/**@brief GAP Configuration IDs. - * - * IDs that uniquely identify a GAP configuration. - */ -enum BLE_GAP_CFGS -{ - BLE_GAP_CFG_ROLE_COUNT = BLE_GAP_CFG_BASE, /**< Role count configuration. */ - BLE_GAP_CFG_DEVICE_NAME, /**< Device name configuration. */ -}; - -/** @} */ - -/**@addtogroup BLE_GAP_DEFINES Defines - * @{ */ - -/**@defgroup BLE_ERRORS_GAP SVC return values specific to GAP - * @{ */ -#define BLE_ERROR_GAP_UUID_LIST_MISMATCH (NRF_GAP_ERR_BASE + 0x000) /**< UUID list does not contain an integral number of UUIDs. */ -#define BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST (NRF_GAP_ERR_BASE + 0x001) /**< Use of Whitelist not permitted with discoverable advertising. */ -#define BLE_ERROR_GAP_INVALID_BLE_ADDR (NRF_GAP_ERR_BASE + 0x002) /**< The upper two bits of the address do not correspond to the specified address type. */ -#define BLE_ERROR_GAP_WHITELIST_IN_USE (NRF_GAP_ERR_BASE + 0x003) /**< Attempt to modify the whitelist while already in use by another operation. */ -#define BLE_ERROR_GAP_DEVICE_IDENTITIES_IN_USE (NRF_GAP_ERR_BASE + 0x004) /**< Attempt to modify the device identity list while already in use by another operation. */ -#define BLE_ERROR_GAP_DEVICE_IDENTITIES_DUPLICATE (NRF_GAP_ERR_BASE + 0x005) /**< The device identity list contains entries with duplicate identity addresses. */ -/**@} */ - - -/**@defgroup BLE_GAP_ROLES GAP Roles - * @note Not explicitly used in peripheral API, but will be relevant for central API. - * @{ */ -#define BLE_GAP_ROLE_INVALID 0x0 /**< Invalid Role. */ -#define BLE_GAP_ROLE_PERIPH 0x1 /**< Peripheral Role. */ -#define BLE_GAP_ROLE_CENTRAL 0x2 /**< Central Role. */ -/**@} */ - - -/**@defgroup BLE_GAP_TIMEOUT_SOURCES GAP Timeout sources - * @{ */ -#define BLE_GAP_TIMEOUT_SRC_ADVERTISING 0x00 /**< Advertising timeout. */ -#define BLE_GAP_TIMEOUT_SRC_SCAN 0x01 /**< Scanning timeout. */ -#define BLE_GAP_TIMEOUT_SRC_CONN 0x02 /**< Connection timeout. */ -#define BLE_GAP_TIMEOUT_SRC_AUTH_PAYLOAD 0x03 /**< Authenticated payload timeout. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADDR_TYPES GAP Address types - * @{ */ -#define BLE_GAP_ADDR_TYPE_PUBLIC 0x00 /**< Public address. */ -#define BLE_GAP_ADDR_TYPE_RANDOM_STATIC 0x01 /**< Random static address. */ -#define BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE 0x02 /**< Random private resolvable address. */ -#define BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE 0x03 /**< Random private non-resolvable address. */ -/**@} */ - - -/**@brief The default interval in seconds at which a private address is refreshed. */ -#define BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S (900) /* 15 minutes. */ -/**@brief The maximum interval in seconds at which a private address can be refreshed. */ -#define BLE_GAP_MAX_PRIVATE_ADDR_CYCLE_INTERVAL_S (41400) /* 11 hours 30 minutes. */ - - -/** @brief BLE address length. */ -#define BLE_GAP_ADDR_LEN (6) - - -/**@defgroup BLE_GAP_PRIVACY_MODES Privacy modes - * @{ */ -#define BLE_GAP_PRIVACY_MODE_OFF 0x00 /**< Device will send and accept its identity address for its own address. */ -#define BLE_GAP_PRIVACY_MODE_DEVICE_PRIVACY 0x01 /**< Device will send and accept only private addresses for its own address. */ -#define BLE_GAP_PRIVACY_MODE_NETWORK_PRIVACY 0x02 /**< Device will send and accept only private addresses for its own address, - and will not accept a peer using identity address as sender address when - the peer IRK is exchanged, non-zero and added to the identity list. */ -/**@} */ - - -/**@defgroup BLE_GAP_AD_TYPE_DEFINITIONS GAP Advertising and Scan Response Data format - * @note Found at https://www.bluetooth.org/Technical/AssignedNumbers/generic_access_profile.htm - * @{ */ -#define BLE_GAP_AD_TYPE_FLAGS 0x01 /**< Flags for discoverability. */ -#define BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_MORE_AVAILABLE 0x02 /**< Partial list of 16 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_COMPLETE 0x03 /**< Complete list of 16 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_MORE_AVAILABLE 0x04 /**< Partial list of 32 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_COMPLETE 0x05 /**< Complete list of 32 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_MORE_AVAILABLE 0x06 /**< Partial list of 128 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_COMPLETE 0x07 /**< Complete list of 128 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_SHORT_LOCAL_NAME 0x08 /**< Short local device name. */ -#define BLE_GAP_AD_TYPE_COMPLETE_LOCAL_NAME 0x09 /**< Complete local device name. */ -#define BLE_GAP_AD_TYPE_TX_POWER_LEVEL 0x0A /**< Transmit power level. */ -#define BLE_GAP_AD_TYPE_CLASS_OF_DEVICE 0x0D /**< Class of device. */ -#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C 0x0E /**< Simple Pairing Hash C. */ -#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R 0x0F /**< Simple Pairing Randomizer R. */ -#define BLE_GAP_AD_TYPE_SECURITY_MANAGER_TK_VALUE 0x10 /**< Security Manager TK Value. */ -#define BLE_GAP_AD_TYPE_SECURITY_MANAGER_OOB_FLAGS 0x11 /**< Security Manager Out Of Band Flags. */ -#define BLE_GAP_AD_TYPE_SLAVE_CONNECTION_INTERVAL_RANGE 0x12 /**< Slave Connection Interval Range. */ -#define BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_16BIT 0x14 /**< List of 16-bit Service Solicitation UUIDs. */ -#define BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_128BIT 0x15 /**< List of 128-bit Service Solicitation UUIDs. */ -#define BLE_GAP_AD_TYPE_SERVICE_DATA 0x16 /**< Service Data - 16-bit UUID. */ -#define BLE_GAP_AD_TYPE_PUBLIC_TARGET_ADDRESS 0x17 /**< Public Target Address. */ -#define BLE_GAP_AD_TYPE_RANDOM_TARGET_ADDRESS 0x18 /**< Random Target Address. */ -#define BLE_GAP_AD_TYPE_APPEARANCE 0x19 /**< Appearance. */ -#define BLE_GAP_AD_TYPE_ADVERTISING_INTERVAL 0x1A /**< Advertising Interval. */ -#define BLE_GAP_AD_TYPE_LE_BLUETOOTH_DEVICE_ADDRESS 0x1B /**< LE Bluetooth Device Address. */ -#define BLE_GAP_AD_TYPE_LE_ROLE 0x1C /**< LE Role. */ -#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C256 0x1D /**< Simple Pairing Hash C-256. */ -#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R256 0x1E /**< Simple Pairing Randomizer R-256. */ -#define BLE_GAP_AD_TYPE_SERVICE_DATA_32BIT_UUID 0x20 /**< Service Data - 32-bit UUID. */ -#define BLE_GAP_AD_TYPE_SERVICE_DATA_128BIT_UUID 0x21 /**< Service Data - 128-bit UUID. */ -#define BLE_GAP_AD_TYPE_LESC_CONFIRMATION_VALUE 0x22 /**< LE Secure Connections Confirmation Value */ -#define BLE_GAP_AD_TYPE_LESC_RANDOM_VALUE 0x23 /**< LE Secure Connections Random Value */ -#define BLE_GAP_AD_TYPE_URI 0x24 /**< URI */ -#define BLE_GAP_AD_TYPE_3D_INFORMATION_DATA 0x3D /**< 3D Information Data. */ -#define BLE_GAP_AD_TYPE_MANUFACTURER_SPECIFIC_DATA 0xFF /**< Manufacturer Specific Data. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADV_FLAGS GAP Advertisement Flags - * @{ */ -#define BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE (0x01) /**< LE Limited Discoverable Mode. */ -#define BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE (0x02) /**< LE General Discoverable Mode. */ -#define BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED (0x04) /**< BR/EDR not supported. */ -#define BLE_GAP_ADV_FLAG_LE_BR_EDR_CONTROLLER (0x08) /**< Simultaneous LE and BR/EDR, Controller. */ -#define BLE_GAP_ADV_FLAG_LE_BR_EDR_HOST (0x10) /**< Simultaneous LE and BR/EDR, Host. */ -#define BLE_GAP_ADV_FLAGS_LE_ONLY_LIMITED_DISC_MODE (BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE | BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED) /**< LE Limited Discoverable Mode, BR/EDR not supported. */ -#define BLE_GAP_ADV_FLAGS_LE_ONLY_GENERAL_DISC_MODE (BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE | BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED) /**< LE General Discoverable Mode, BR/EDR not supported. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADV_INTERVALS GAP Advertising interval max and min - * @{ */ -#define BLE_GAP_ADV_INTERVAL_MIN 0x0020 /**< Minimum Advertising interval in 625 us units, i.e. 20 ms. */ -#define BLE_GAP_ADV_INTERVAL_MAX 0x4000 /**< Maximum Advertising interval in 625 us units, i.e. 10.24 s. */ - /**@} */ - - -/**@defgroup BLE_GAP_SCAN_INTERVALS GAP Scan interval max and min - * @{ */ -#define BLE_GAP_SCAN_INTERVAL_MIN 0x0004 /**< Minimum Scan interval in 625 us units, i.e. 2.5 ms. */ -#define BLE_GAP_SCAN_INTERVAL_MAX 0x4000 /**< Maximum Scan interval in 625 us units, i.e. 10.24 s. */ - /** @} */ - - -/**@defgroup BLE_GAP_SCAN_WINDOW GAP Scan window max and min - * @{ */ -#define BLE_GAP_SCAN_WINDOW_MIN 0x0004 /**< Minimum Scan window in 625 us units, i.e. 2.5 ms. */ -#define BLE_GAP_SCAN_WINDOW_MAX 0x4000 /**< Maximum Scan window in 625 us units, i.e. 10.24 s. */ - /** @} */ - - -/**@defgroup BLE_GAP_SCAN_TIMEOUT GAP Scan timeout max and min - * @{ */ -#define BLE_GAP_SCAN_TIMEOUT_MIN 0x0001 /**< Minimum Scan timeout in seconds. */ -#define BLE_GAP_SCAN_TIMEOUT_MAX 0xFFFF /**< Maximum Scan timeout in seconds. */ - /** @} */ - - -/**@brief Maximum size of advertising data in octets. */ -#define BLE_GAP_ADV_MAX_SIZE (31) - - -/**@defgroup BLE_GAP_ADV_TYPES GAP Advertising types - * @{ */ -#define BLE_GAP_ADV_TYPE_ADV_IND 0x00 /**< Connectable undirected. */ -#define BLE_GAP_ADV_TYPE_ADV_DIRECT_IND 0x01 /**< Connectable directed. */ -#define BLE_GAP_ADV_TYPE_ADV_SCAN_IND 0x02 /**< Scannable undirected. */ -#define BLE_GAP_ADV_TYPE_ADV_NONCONN_IND 0x03 /**< Non connectable undirected. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADV_FILTER_POLICIES GAP Advertising filter policies - * @{ */ -#define BLE_GAP_ADV_FP_ANY 0x00 /**< Allow scan requests and connect requests from any device. */ -#define BLE_GAP_ADV_FP_FILTER_SCANREQ 0x01 /**< Filter scan requests with whitelist. */ -#define BLE_GAP_ADV_FP_FILTER_CONNREQ 0x02 /**< Filter connect requests with whitelist. */ -#define BLE_GAP_ADV_FP_FILTER_BOTH 0x03 /**< Filter both scan and connect requests with whitelist. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADV_TIMEOUT_VALUES GAP Advertising timeout values - * @{ */ -#define BLE_GAP_ADV_TIMEOUT_LIMITED_MAX (180) /**< Maximum advertising time in limited discoverable mode (TGAP(lim_adv_timeout) = 180 s). */ -#define BLE_GAP_ADV_TIMEOUT_GENERAL_UNLIMITED (0) /**< Unlimited advertising in general discoverable mode. */ -/**@} */ - - -/**@defgroup BLE_GAP_DISC_MODES GAP Discovery modes - * @{ */ -#define BLE_GAP_DISC_MODE_NOT_DISCOVERABLE 0x00 /**< Not discoverable discovery Mode. */ -#define BLE_GAP_DISC_MODE_LIMITED 0x01 /**< Limited Discovery Mode. */ -#define BLE_GAP_DISC_MODE_GENERAL 0x02 /**< General Discovery Mode. */ -/**@} */ - - -/**@defgroup BLE_GAP_IO_CAPS GAP IO Capabilities - * @{ */ -#define BLE_GAP_IO_CAPS_DISPLAY_ONLY 0x00 /**< Display Only. */ -#define BLE_GAP_IO_CAPS_DISPLAY_YESNO 0x01 /**< Display and Yes/No entry. */ -#define BLE_GAP_IO_CAPS_KEYBOARD_ONLY 0x02 /**< Keyboard Only. */ -#define BLE_GAP_IO_CAPS_NONE 0x03 /**< No I/O capabilities. */ -#define BLE_GAP_IO_CAPS_KEYBOARD_DISPLAY 0x04 /**< Keyboard and Display. */ -/**@} */ - - -/**@defgroup BLE_GAP_AUTH_KEY_TYPES GAP Authentication Key Types - * @{ */ -#define BLE_GAP_AUTH_KEY_TYPE_NONE 0x00 /**< No key (may be used to reject). */ -#define BLE_GAP_AUTH_KEY_TYPE_PASSKEY 0x01 /**< 6-digit Passkey. */ -#define BLE_GAP_AUTH_KEY_TYPE_OOB 0x02 /**< Out Of Band data. */ -/**@} */ - - -/**@defgroup BLE_GAP_KP_NOT_TYPES GAP Keypress Notification Types - * @{ */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_START 0x00 /**< Passkey entry started. */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_DIGIT_IN 0x01 /**< Passkey digit entered. */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_DIGIT_OUT 0x02 /**< Passkey digit erased. */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_CLEAR 0x03 /**< Passkey cleared. */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_END 0x04 /**< Passkey entry completed. */ -/**@} */ - - -/**@defgroup BLE_GAP_SEC_STATUS GAP Security status - * @{ */ -#define BLE_GAP_SEC_STATUS_SUCCESS 0x00 /**< Procedure completed with success. */ -#define BLE_GAP_SEC_STATUS_TIMEOUT 0x01 /**< Procedure timed out. */ -#define BLE_GAP_SEC_STATUS_PDU_INVALID 0x02 /**< Invalid PDU received. */ -#define BLE_GAP_SEC_STATUS_RFU_RANGE1_BEGIN 0x03 /**< Reserved for Future Use range #1 begin. */ -#define BLE_GAP_SEC_STATUS_RFU_RANGE1_END 0x80 /**< Reserved for Future Use range #1 end. */ -#define BLE_GAP_SEC_STATUS_PASSKEY_ENTRY_FAILED 0x81 /**< Passkey entry failed (user canceled or other). */ -#define BLE_GAP_SEC_STATUS_OOB_NOT_AVAILABLE 0x82 /**< Out of Band Key not available. */ -#define BLE_GAP_SEC_STATUS_AUTH_REQ 0x83 /**< Authentication requirements not met. */ -#define BLE_GAP_SEC_STATUS_CONFIRM_VALUE 0x84 /**< Confirm value failed. */ -#define BLE_GAP_SEC_STATUS_PAIRING_NOT_SUPP 0x85 /**< Pairing not supported. */ -#define BLE_GAP_SEC_STATUS_ENC_KEY_SIZE 0x86 /**< Encryption key size. */ -#define BLE_GAP_SEC_STATUS_SMP_CMD_UNSUPPORTED 0x87 /**< Unsupported SMP command. */ -#define BLE_GAP_SEC_STATUS_UNSPECIFIED 0x88 /**< Unspecified reason. */ -#define BLE_GAP_SEC_STATUS_REPEATED_ATTEMPTS 0x89 /**< Too little time elapsed since last attempt. */ -#define BLE_GAP_SEC_STATUS_INVALID_PARAMS 0x8A /**< Invalid parameters. */ -#define BLE_GAP_SEC_STATUS_DHKEY_FAILURE 0x8B /**< DHKey check failure. */ -#define BLE_GAP_SEC_STATUS_NUM_COMP_FAILURE 0x8C /**< Numeric Comparison failure. */ -#define BLE_GAP_SEC_STATUS_BR_EDR_IN_PROG 0x8D /**< BR/EDR pairing in progress. */ -#define BLE_GAP_SEC_STATUS_X_TRANS_KEY_DISALLOWED 0x8E /**< BR/EDR Link Key cannot be used for LE keys. */ -#define BLE_GAP_SEC_STATUS_RFU_RANGE2_BEGIN 0x8F /**< Reserved for Future Use range #2 begin. */ -#define BLE_GAP_SEC_STATUS_RFU_RANGE2_END 0xFF /**< Reserved for Future Use range #2 end. */ -/**@} */ - - -/**@defgroup BLE_GAP_SEC_STATUS_SOURCES GAP Security status sources - * @{ */ -#define BLE_GAP_SEC_STATUS_SOURCE_LOCAL 0x00 /**< Local failure. */ -#define BLE_GAP_SEC_STATUS_SOURCE_REMOTE 0x01 /**< Remote failure. */ -/**@} */ - - -/**@defgroup BLE_GAP_CP_LIMITS GAP Connection Parameters Limits - * @{ */ -#define BLE_GAP_CP_MIN_CONN_INTVL_NONE 0xFFFF /**< No new minimum connection interval specified in connect parameters. */ -#define BLE_GAP_CP_MIN_CONN_INTVL_MIN 0x0006 /**< Lowest minimum connection interval permitted, in units of 1.25 ms, i.e. 7.5 ms. */ -#define BLE_GAP_CP_MIN_CONN_INTVL_MAX 0x0C80 /**< Highest minimum connection interval permitted, in units of 1.25 ms, i.e. 4 s. */ -#define BLE_GAP_CP_MAX_CONN_INTVL_NONE 0xFFFF /**< No new maximum connection interval specified in connect parameters. */ -#define BLE_GAP_CP_MAX_CONN_INTVL_MIN 0x0006 /**< Lowest maximum connection interval permitted, in units of 1.25 ms, i.e. 7.5 ms. */ -#define BLE_GAP_CP_MAX_CONN_INTVL_MAX 0x0C80 /**< Highest maximum connection interval permitted, in units of 1.25 ms, i.e. 4 s. */ -#define BLE_GAP_CP_SLAVE_LATENCY_MAX 0x01F3 /**< Highest slave latency permitted, in connection events. */ -#define BLE_GAP_CP_CONN_SUP_TIMEOUT_NONE 0xFFFF /**< No new supervision timeout specified in connect parameters. */ -#define BLE_GAP_CP_CONN_SUP_TIMEOUT_MIN 0x000A /**< Lowest supervision timeout permitted, in units of 10 ms, i.e. 100 ms. */ -#define BLE_GAP_CP_CONN_SUP_TIMEOUT_MAX 0x0C80 /**< Highest supervision timeout permitted, in units of 10 ms, i.e. 32 s. */ -/**@} */ - - -/**@defgroup BLE_GAP_DEVNAME GAP device name defines. - * @{ */ -#define BLE_GAP_DEVNAME_DEFAULT "nRF5x" /**< Default device name value. */ -#define BLE_GAP_DEVNAME_DEFAULT_LEN 31 /**< Default number of octets in device name. */ -#define BLE_GAP_DEVNAME_MAX_LEN 248 /**< Maximum number of octets in device name. */ -/**@} */ - - -/**@brief Disable RSSI events for connections */ -#define BLE_GAP_RSSI_THRESHOLD_INVALID 0xFF - -/**@defgroup BLE_GAP_PHYS GAP PHYs - * @{ */ -#define BLE_GAP_PHY_AUTO 0x00 /**< Automatic PHY selection. Refer @ref sd_ble_gap_phy_update for more information.*/ -#define BLE_GAP_PHY_1MBPS 0x01 /**< 1 Mbps PHY. */ -#define BLE_GAP_PHY_2MBPS 0x02 /**< 2 Mbps PHY. */ -#define BLE_GAP_PHY_CODED 0x04 /**< Coded PHY. */ - -/**@} */ - -/**@defgroup BLE_GAP_CONN_SEC_MODE_SET_MACROS GAP attribute security requirement setters - * - * See @ref ble_gap_conn_sec_mode_t. - * @{ */ -/**@brief Set sec_mode pointed to by ptr to have no access rights.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_NO_ACCESS(ptr) do {(ptr)->sm = 0; (ptr)->lv = 0;} while(0) -/**@brief Set sec_mode pointed to by ptr to require no protection, open link.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_OPEN(ptr) do {(ptr)->sm = 1; (ptr)->lv = 1;} while(0) -/**@brief Set sec_mode pointed to by ptr to require encryption, but no MITM protection.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_ENC_NO_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 2;} while(0) -/**@brief Set sec_mode pointed to by ptr to require encryption and MITM protection.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_ENC_WITH_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 3;} while(0) -/**@brief Set sec_mode pointed to by ptr to require LESC encryption and MITM protection.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_LESC_ENC_WITH_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 4;} while(0) -/**@brief Set sec_mode pointed to by ptr to require signing or encryption, no MITM protection needed.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_SIGNED_NO_MITM(ptr) do {(ptr)->sm = 2; (ptr)->lv = 1;} while(0) -/**@brief Set sec_mode pointed to by ptr to require signing or encryption with MITM protection.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_SIGNED_WITH_MITM(ptr) do {(ptr)->sm = 2; (ptr)->lv = 2;} while(0) -/**@} */ - - -/**@brief GAP Security Random Number Length. */ -#define BLE_GAP_SEC_RAND_LEN 8 - - -/**@brief GAP Security Key Length. */ -#define BLE_GAP_SEC_KEY_LEN 16 - - -/**@brief GAP LE Secure Connections Elliptic Curve Diffie-Hellman P-256 Public Key Length. */ -#define BLE_GAP_LESC_P256_PK_LEN 64 - - -/**@brief GAP LE Secure Connections Elliptic Curve Diffie-Hellman DHKey Length. */ -#define BLE_GAP_LESC_DHKEY_LEN 32 - - -/**@brief GAP Passkey Length. */ -#define BLE_GAP_PASSKEY_LEN 6 - - -/**@brief Maximum amount of addresses in the whitelist. */ -#define BLE_GAP_WHITELIST_ADDR_MAX_COUNT (8) - - -/**@brief Maximum amount of identities in the device identities list. */ -#define BLE_GAP_DEVICE_IDENTITIES_MAX_COUNT (8) - - -/**@brief Default connection count for a configuration. */ -#define BLE_GAP_CONN_COUNT_DEFAULT (1) - - -/**@defgroup BLE_GAP_EVENT_LENGTH GAP event length defines. - * @{ */ -#define BLE_GAP_EVENT_LENGTH_MIN (2) /**< Minimum event length, in 1.25 ms units. */ -#define BLE_GAP_EVENT_LENGTH_DEFAULT (3) /**< Default event length, in 1.25 ms units. */ -/**@} */ - - -/**@defgroup BLE_GAP_ROLE_COUNT GAP concurrent connection count defines. - * @{ */ -#define BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT (1) /**< Default maximum number of connections concurrently acting as peripherals. */ -#define BLE_GAP_ROLE_COUNT_CENTRAL_DEFAULT (3) /**< Default maximum number of connections concurrently acting as centrals. */ -#define BLE_GAP_ROLE_COUNT_CENTRAL_SEC_DEFAULT (1) /**< Default number of SMP instances shared between all connections acting as centrals. */ -#define BLE_GAP_ROLE_COUNT_COMBINED_MAX (20) /**< Maximum supported number of concurrent connections in the peripheral and central roles combined. */ -/**@} */ - - -/**@brief Automatic data length parameter. */ -#define BLE_GAP_DATA_LENGTH_AUTO 0 - -/**@defgroup BLE_GAP_AUTH_PAYLOAD_TIMEOUT Authenticated payload timeout defines. - * @{ */ -#define BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MAX (48000) /**< Maximum authenticated payload timeout in 10 ms units, i.e. 8 minutes. */ -#define BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MIN (1) /**< Minimum authenticated payload timeout in 10 ms units, i.e. 10 ms. */ -/**@} */ - -/**@defgroup GAP_SEC_MODES GAP Security Modes - * @{ */ -#define BLE_GAP_SEC_MODE 0x00 /**< No key (may be used to reject). */ -/**@} */ -/** @} */ - - -/**@addtogroup BLE_GAP_STRUCTURES Structures - * @{ */ - -/**@brief Bluetooth Low Energy address. */ -typedef struct -{ - uint8_t addr_id_peer : 1; /**< Only valid for peer addresses. - Reference to peer in device identities list (as set with @ref sd_ble_gap_device_identities_set) when peer is using privacy. */ - uint8_t addr_type : 7; /**< See @ref BLE_GAP_ADDR_TYPES. */ - uint8_t addr[BLE_GAP_ADDR_LEN]; /**< 48-bit address, LSB format. */ -} ble_gap_addr_t; - - -/**@brief GAP connection parameters. - * - * @note When ble_conn_params_t is received in an event, both min_conn_interval and - * max_conn_interval will be equal to the connection interval set by the central. - * - * @note If both conn_sup_timeout and max_conn_interval are specified, then the following constraint applies: - * conn_sup_timeout * 4 > (1 + slave_latency) * max_conn_interval - * that corresponds to the following Bluetooth Spec requirement: - * The Supervision_Timeout in milliseconds shall be larger than - * (1 + Conn_Latency) * Conn_Interval_Max * 2, where Conn_Interval_Max is given in milliseconds. - */ -typedef struct -{ - uint16_t min_conn_interval; /**< Minimum Connection Interval in 1.25 ms units, see @ref BLE_GAP_CP_LIMITS.*/ - uint16_t max_conn_interval; /**< Maximum Connection Interval in 1.25 ms units, see @ref BLE_GAP_CP_LIMITS.*/ - uint16_t slave_latency; /**< Slave Latency in number of connection events, see @ref BLE_GAP_CP_LIMITS.*/ - uint16_t conn_sup_timeout; /**< Connection Supervision Timeout in 10 ms units, see @ref BLE_GAP_CP_LIMITS.*/ -} ble_gap_conn_params_t; - - -/**@brief GAP connection security modes. - * - * Security Mode 0 Level 0: No access permissions at all (this level is not defined by the Bluetooth Core specification).\n - * Security Mode 1 Level 1: No security is needed (aka open link).\n - * Security Mode 1 Level 2: Encrypted link required, MITM protection not necessary.\n - * Security Mode 1 Level 3: MITM protected encrypted link required.\n - * Security Mode 1 Level 4: LESC MITM protected encrypted link using a 128-bit strength encryption key required.\n - * Security Mode 2 Level 1: Signing or encryption required, MITM protection not necessary.\n - * Security Mode 2 Level 2: MITM protected signing required, unless link is MITM protected encrypted.\n - */ -typedef struct -{ - uint8_t sm : 4; /**< Security Mode (1 or 2), 0 for no permissions at all. */ - uint8_t lv : 4; /**< Level (1, 2, 3 or 4), 0 for no permissions at all. */ - -} ble_gap_conn_sec_mode_t; - - -/**@brief GAP connection security status.*/ -typedef struct -{ - ble_gap_conn_sec_mode_t sec_mode; /**< Currently active security mode for this connection.*/ - uint8_t encr_key_size; /**< Length of currently active encryption key, 7 to 16 octets (only applicable for bonding procedures). */ -} ble_gap_conn_sec_t; - -/**@brief Identity Resolving Key. */ -typedef struct -{ - uint8_t irk[BLE_GAP_SEC_KEY_LEN]; /**< Array containing IRK. */ -} ble_gap_irk_t; - - -/**@brief Channel mask for RF channels used in advertising. */ -typedef struct -{ - uint8_t ch_37_off : 1; /**< Setting this bit to 1 will turn off advertising on channel 37 */ - uint8_t ch_38_off : 1; /**< Setting this bit to 1 will turn off advertising on channel 38 */ - uint8_t ch_39_off : 1; /**< Setting this bit to 1 will turn off advertising on channel 39 */ -} ble_gap_adv_ch_mask_t; - - -/**@brief GAP advertising parameters. */ -typedef struct -{ - uint8_t type; /**< See @ref BLE_GAP_ADV_TYPES. */ - ble_gap_addr_t const *p_peer_addr; /**< Address of a known peer. - - When privacy is enabled and the local device use @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE addresses, the device identity list is searched for a matching - entry. If the local IRK for that device identity is set, the local IRK for that device will be used to generate the advertiser address field in the advertise packet. - - If type is @ref BLE_GAP_ADV_TYPE_ADV_DIRECT_IND, this must be set to the targeted initiator. If the initiator is in the device identity list, - the peer IRK for that device will be used to generate the initiator address field in the ADV_DIRECT_IND packet. */ - uint8_t fp; /**< Filter Policy, see @ref BLE_GAP_ADV_FILTER_POLICIES. */ - uint16_t interval; /**< Advertising interval between 0x0020 and 0x4000 in 0.625 ms units (20 ms to 10.24 s), see @ref BLE_GAP_ADV_INTERVALS. - - If type equals @ref BLE_GAP_ADV_TYPE_ADV_DIRECT_IND, this parameter must be set to 0 for high duty cycle directed advertising. - - If type equals @ref BLE_GAP_ADV_TYPE_ADV_DIRECT_IND, set @ref BLE_GAP_ADV_INTERVAL_MIN <= interval <= @ref BLE_GAP_ADV_INTERVAL_MAX for low duty cycle advertising.*/ - uint16_t timeout; /**< Advertising timeout between 0x0001 and 0x3FFF in seconds, 0x0000 disables timeout. See also @ref BLE_GAP_ADV_TIMEOUT_VALUES. If type equals @ref BLE_GAP_ADV_TYPE_ADV_DIRECT_IND, this parameter must be set to 0 for High duty cycle directed advertising. */ - ble_gap_adv_ch_mask_t channel_mask; /**< Advertising channel mask. See @ref ble_gap_adv_ch_mask_t. */ -} ble_gap_adv_params_t; - - -/**@brief GAP scanning parameters. */ -typedef struct -{ - uint8_t active : 1; /**< If 1, perform active scanning (scan requests). */ - uint8_t use_whitelist : 1; /**< If 1, filter advertisers using current active whitelist. */ - uint8_t adv_dir_report : 1; /**< If 1, also report directed advertisements where the initiator field is set to a private resolvable address, - even if the address did not resolve to an entry in the device identity list. A report will be generated - even if the peer is not in the whitelist. */ - uint16_t interval; /**< Scan interval between 0x0004 and 0x4000 in 0.625 ms units (2.5 ms to 10.24 s). */ - uint16_t window; /**< Scan window between 0x0004 and 0x4000 in 0.625 ms units (2.5 ms to 10.24 s). */ - uint16_t timeout; /**< Scan timeout between 0x0001 and 0xFFFF in seconds, 0x0000 disables timeout. */ -} ble_gap_scan_params_t; - - -/**@brief Privacy. - * - * The privacy feature provides a way for the device to avoid being tracked over a period of time. - * The privacy feature, when enabled, hides the local device identity and replaces it with a private address - * that is automatically refreshed at a specified interval. - * - * If a device still wants to be recognized by other peers, it needs to share it's Identity Resolving Key (IRK). - * With this key, a device can generate a random private address that can only be recognized by peers in possession of that key, - * and devices can establish connections without revealing their real identities. - * - * Both network privacy (@ref BLE_GAP_PRIVACY_MODE_NETWORK_PRIVACY) and device privacy (@ref BLE_GAP_PRIVACY_MODE_DEVICE_PRIVACY) - * are supported. - * - * @note If the device IRK is updated, the new IRK becomes the one to be distributed in all - * bonding procedures performed after @ref sd_ble_gap_privacy_set returns. - * The IRK distributed during bonding procedure is the device IRK that is active when @ref sd_ble_gap_sec_params_reply is called. - */ -typedef struct -{ - uint8_t privacy_mode; /**< Privacy mode, see @ref BLE_GAP_PRIVACY_MODES. Default is @ref BLE_GAP_PRIVACY_MODE_OFF. */ - uint8_t private_addr_type; /**< The private address type must be either @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE or @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE. */ - uint16_t private_addr_cycle_s; /**< Private address cycle interval in seconds. Providing an address cycle value of 0 will use the default value defined by @ref BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S. */ - ble_gap_irk_t *p_device_irk; /**< When used as input, pointer to IRK structure that will be used as the default IRK. If NULL, the device default IRK will be used. - When used as output, pointer to IRK structure where the current default IRK will be written to. If NULL, this argument is ignored. - By default, the default IRK is used to generate random private resolvable addresses for the local device unless instructed otherwise. */ -} ble_gap_privacy_params_t; - - -/**@brief PHY preferences for TX and RX - * @note tx_phys and rx_phys are bit fields. Multiple bits can be set in them to indicate multiple preferred PHYs for each direction. - * @code - * p_gap_phys->tx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; - * p_gap_phys->rx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; - * @endcode - * - */ -typedef struct -{ - uint8_t tx_phys; /**< Preferred transmit PHYs, see @ref BLE_GAP_PHYS. */ - uint8_t rx_phys; /**< Preferred receive PHYs, see @ref BLE_GAP_PHYS. */ -} ble_gap_phys_t; - -/** @brief Keys that can be exchanged during a bonding procedure. */ -typedef struct -{ - uint8_t enc : 1; /**< Long Term Key and Master Identification. */ - uint8_t id : 1; /**< Identity Resolving Key and Identity Address Information. */ - uint8_t sign : 1; /**< Connection Signature Resolving Key. */ - uint8_t link : 1; /**< Derive the Link Key from the LTK. */ -} ble_gap_sec_kdist_t; - - -/**@brief GAP security parameters. */ -typedef struct -{ - uint8_t bond : 1; /**< Perform bonding. */ - uint8_t mitm : 1; /**< Enable Man In The Middle protection. */ - uint8_t lesc : 1; /**< Enable LE Secure Connection pairing. */ - uint8_t keypress : 1; /**< Enable generation of keypress notifications. */ - uint8_t io_caps : 3; /**< IO capabilities, see @ref BLE_GAP_IO_CAPS. */ - uint8_t oob : 1; /**< The OOB data flag. - - In LE legacy pairing, this flag is set if a device has out of band authentication data. - The OOB method is used if both of the devices have out of band authentication data. - - In LE Secure Connections pairing, this flag is set if a device has the peer device's out of band authentication data. - The OOB method is used if at least one device has the peer device's OOB data available. */ - uint8_t min_key_size; /**< Minimum encryption key size in octets between 7 and 16. If 0 then not applicable in this instance. */ - uint8_t max_key_size; /**< Maximum encryption key size in octets between min_key_size and 16. */ - ble_gap_sec_kdist_t kdist_own; /**< Key distribution bitmap: keys that the local device will distribute. */ - ble_gap_sec_kdist_t kdist_peer; /**< Key distribution bitmap: keys that the remote device will distribute. */ -} ble_gap_sec_params_t; - - -/**@brief GAP Encryption Information. */ -typedef struct -{ - uint8_t ltk[BLE_GAP_SEC_KEY_LEN]; /**< Long Term Key. */ - uint8_t lesc : 1; /**< Key generated using LE Secure Connections. */ - uint8_t auth : 1; /**< Authenticated Key. */ - uint8_t ltk_len : 6; /**< LTK length in octets. */ -} ble_gap_enc_info_t; - - -/**@brief GAP Master Identification. */ -typedef struct -{ - uint16_t ediv; /**< Encrypted Diversifier. */ - uint8_t rand[BLE_GAP_SEC_RAND_LEN]; /**< Random Number. */ -} ble_gap_master_id_t; - - -/**@brief GAP Signing Information. */ -typedef struct -{ - uint8_t csrk[BLE_GAP_SEC_KEY_LEN]; /**< Connection Signature Resolving Key. */ -} ble_gap_sign_info_t; - - -/**@brief GAP LE Secure Connections P-256 Public Key. */ -typedef struct -{ - uint8_t pk[BLE_GAP_LESC_P256_PK_LEN]; /**< LE Secure Connections Elliptic Curve Diffie-Hellman P-256 Public Key. Stored in the standard SMP protocol format: {X,Y} both in little-endian. */ -} ble_gap_lesc_p256_pk_t; - - -/**@brief GAP LE Secure Connections DHKey. */ -typedef struct -{ - uint8_t key[BLE_GAP_LESC_DHKEY_LEN]; /**< LE Secure Connections Elliptic Curve Diffie-Hellman Key. Stored in little-endian. */ -} ble_gap_lesc_dhkey_t; - - -/**@brief GAP LE Secure Connections OOB data. */ -typedef struct -{ - ble_gap_addr_t addr; /**< Bluetooth address of the device. */ - uint8_t r[BLE_GAP_SEC_KEY_LEN]; /**< Random Number. */ - uint8_t c[BLE_GAP_SEC_KEY_LEN]; /**< Confirm Value. */ -} ble_gap_lesc_oob_data_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_CONNECTED. */ -typedef struct -{ - ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 - and the address is the device's identity address. */ - uint8_t role; /**< BLE role for this connection, see @ref BLE_GAP_ROLES */ - ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ -} ble_gap_evt_connected_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_DISCONNECTED. */ -typedef struct -{ - uint8_t reason; /**< HCI error code, see @ref BLE_HCI_STATUS_CODES. */ -} ble_gap_evt_disconnected_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_CONN_PARAM_UPDATE. */ -typedef struct -{ - ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ -} ble_gap_evt_conn_param_update_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_PHY_UPDATE_REQUEST. */ -typedef struct -{ - ble_gap_phys_t peer_preferred_phys; /**< The PHYs the peer prefers to use. */ -} ble_gap_evt_phy_update_request_t; - -/**@brief Event Structure for @ref BLE_GAP_EVT_PHY_UPDATE. */ -typedef struct -{ - uint8_t status; /**< Status of the procedure, see @ref BLE_HCI_STATUS_CODES.*/ - uint8_t tx_phy; /**< TX PHY for this connection, see @ref BLE_GAP_PHYS. */ - uint8_t rx_phy; /**< RX PHY for this connection, see @ref BLE_GAP_PHYS. */ -} ble_gap_evt_phy_update_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST. */ -typedef struct -{ - ble_gap_sec_params_t peer_params; /**< Initiator Security Parameters. */ -} ble_gap_evt_sec_params_request_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_SEC_INFO_REQUEST. */ -typedef struct -{ - ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. */ - ble_gap_master_id_t master_id; /**< Master Identification for LTK lookup. */ - uint8_t enc_info : 1; /**< If 1, Encryption Information required. */ - uint8_t id_info : 1; /**< If 1, Identity Information required. */ - uint8_t sign_info : 1; /**< If 1, Signing Information required. */ -} ble_gap_evt_sec_info_request_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_PASSKEY_DISPLAY. */ -typedef struct -{ - uint8_t passkey[BLE_GAP_PASSKEY_LEN]; /**< 6-digit passkey in ASCII ('0'-'9' digits only). */ - uint8_t match_request : 1; /**< If 1 requires the application to report the match using @ref sd_ble_gap_auth_key_reply - with either @ref BLE_GAP_AUTH_KEY_TYPE_NONE if there is no match or - @ref BLE_GAP_AUTH_KEY_TYPE_PASSKEY if there is a match. */ -} ble_gap_evt_passkey_display_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_KEY_PRESSED. */ -typedef struct -{ - uint8_t kp_not; /**< Keypress notification type, see @ref BLE_GAP_KP_NOT_TYPES. */ -} ble_gap_evt_key_pressed_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_AUTH_KEY_REQUEST. */ -typedef struct -{ - uint8_t key_type; /**< See @ref BLE_GAP_AUTH_KEY_TYPES. */ -} ble_gap_evt_auth_key_request_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST. */ -typedef struct -{ - ble_gap_lesc_p256_pk_t *p_pk_peer; /**< LE Secure Connections remote P-256 Public Key. This will point to the application-supplied memory - inside the keyset during the call to @ref sd_ble_gap_sec_params_reply. */ - uint8_t oobd_req :1; /**< LESC OOB data required. A call to @ref sd_ble_gap_lesc_oob_data_set is required to complete the procedure. */ -} ble_gap_evt_lesc_dhkey_request_t; - - -/**@brief Security levels supported. - * @note See Bluetooth Specification Version 4.2 Volume 3, Part C, Chapter 10, Section 10.2.1. -*/ -typedef struct -{ - uint8_t lv1 : 1; /**< If 1: Level 1 is supported. */ - uint8_t lv2 : 1; /**< If 1: Level 2 is supported. */ - uint8_t lv3 : 1; /**< If 1: Level 3 is supported. */ - uint8_t lv4 : 1; /**< If 1: Level 4 is supported. */ -} ble_gap_sec_levels_t; - - -/**@brief Encryption Key. */ -typedef struct -{ - ble_gap_enc_info_t enc_info; /**< Encryption Information. */ - ble_gap_master_id_t master_id; /**< Master Identification. */ -} ble_gap_enc_key_t; - - -/**@brief Identity Key. */ -typedef struct -{ - ble_gap_irk_t id_info; /**< Identity Resolving Key. */ - ble_gap_addr_t id_addr_info; /**< Identity Address. */ -} ble_gap_id_key_t; - - -/**@brief Security Keys. */ -typedef struct -{ - ble_gap_enc_key_t *p_enc_key; /**< Encryption Key, or NULL. */ - ble_gap_id_key_t *p_id_key; /**< Identity Key, or NULL. */ - ble_gap_sign_info_t *p_sign_key; /**< Signing Key, or NULL. */ - ble_gap_lesc_p256_pk_t *p_pk; /**< LE Secure Connections P-256 Public Key. When in debug mode the application must use the value defined - in the Core Bluetooth Specification v4.2 Vol.3, Part H, Section 2.3.5.6.1 */ -} ble_gap_sec_keys_t; - - -/**@brief Security key set for both local and peer keys. */ -typedef struct -{ - ble_gap_sec_keys_t keys_own; /**< Keys distributed by the local device. For LE Secure Connections the encryption key will be generated locally and will always be stored if bonding. */ - ble_gap_sec_keys_t keys_peer; /**< Keys distributed by the remote device. For LE Secure Connections, p_enc_key must always be NULL. */ -} ble_gap_sec_keyset_t; - - -/**@brief Data Length Update Procedure parameters. */ -typedef struct -{ - uint16_t max_tx_octets; /**< Maximum number of payload octets that a Controller supports for transmission of a single Link Layer Data Channel PDU. */ - uint16_t max_rx_octets; /**< Maximum number of payload octets that a Controller supports for reception of a single Link Layer Data Channel PDU. */ - uint16_t max_tx_time_us; /**< Maximum time, in microseconds, that a Controller supports for transmission of a single Link Layer Data Channel PDU. */ - uint16_t max_rx_time_us; /**< Maximum time, in microseconds, that a Controller supports for reception of a single Link Layer Data Channel PDU. */ -} ble_gap_data_length_params_t; - - -/**@brief Data Length Update Procedure local limitation. */ -typedef struct -{ - uint16_t tx_payload_limited_octets; /**< If > 0, the requested TX packet length is too long by this many octets. */ - uint16_t rx_payload_limited_octets; /**< If > 0, the requested RX packet length is too long by this many octets. */ - uint16_t tx_rx_time_limited_us; /**< If > 0, the requested combination of TX and RX packet lengths is too long by this many microseconds. */ -} ble_gap_data_length_limitation_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_AUTH_STATUS. */ -typedef struct -{ - uint8_t auth_status; /**< Authentication status, see @ref BLE_GAP_SEC_STATUS. */ - uint8_t error_src : 2; /**< On error, source that caused the failure, see @ref BLE_GAP_SEC_STATUS_SOURCES. */ - uint8_t bonded : 1; /**< Procedure resulted in a bond. */ - uint8_t lesc : 1; /**< Procedure resulted in a LE Secure Connection. */ - ble_gap_sec_levels_t sm1_levels; /**< Levels supported in Security Mode 1. */ - ble_gap_sec_levels_t sm2_levels; /**< Levels supported in Security Mode 2. */ - ble_gap_sec_kdist_t kdist_own; /**< Bitmap stating which keys were exchanged (distributed) by the local device. If bonding with LE Secure Connections, the enc bit will be always set. */ - ble_gap_sec_kdist_t kdist_peer; /**< Bitmap stating which keys were exchanged (distributed) by the remote device. If bonding with LE Secure Connections, the enc bit will never be set. */ -} ble_gap_evt_auth_status_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_CONN_SEC_UPDATE. */ -typedef struct -{ - ble_gap_conn_sec_t conn_sec; /**< Connection security level. */ -} ble_gap_evt_conn_sec_update_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_TIMEOUT. */ -typedef struct -{ - uint8_t src; /**< Source of timeout event, see @ref BLE_GAP_TIMEOUT_SOURCES. */ -} ble_gap_evt_timeout_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_RSSI_CHANGED. */ -typedef struct -{ - int8_t rssi; /**< Received Signal Strength Indication in dBm. */ -} ble_gap_evt_rssi_changed_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_ADV_REPORT. */ -typedef struct -{ - ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 - and the address is the device's identity address. */ - ble_gap_addr_t direct_addr; /**< Set when the scanner is unable to resolve the private resolvable address of the initiator - field of a directed advertisement packet and the scanner has been enabled to report this in @ref ble_gap_scan_params_t::adv_dir_report. */ - int8_t rssi; /**< Received Signal Strength Indication in dBm. */ - uint8_t scan_rsp : 1; /**< If 1, the report corresponds to a scan response and the type field may be ignored. */ - uint8_t type : 2; /**< See @ref BLE_GAP_ADV_TYPES. Only valid if the scan_rsp field is 0. */ - uint8_t dlen : 5; /**< Advertising or scan response data length. */ - uint8_t data[BLE_GAP_ADV_MAX_SIZE]; /**< Advertising or scan response data. */ -} ble_gap_evt_adv_report_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_SEC_REQUEST. */ -typedef struct -{ - uint8_t bond : 1; /**< Perform bonding. */ - uint8_t mitm : 1; /**< Man In The Middle protection requested. */ - uint8_t lesc : 1; /**< LE Secure Connections requested. */ - uint8_t keypress : 1; /**< Generation of keypress notifications requested. */ -} ble_gap_evt_sec_request_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST. */ -typedef struct -{ - ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ -} ble_gap_evt_conn_param_update_request_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_SCAN_REQ_REPORT. */ -typedef struct -{ - int8_t rssi; /**< Received Signal Strength Indication in dBm. */ - ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 - and the address is the device's identity address. */ -} ble_gap_evt_scan_req_report_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST. */ -typedef struct -{ - ble_gap_data_length_params_t peer_params; /**< Peer data length parameters. */ -} ble_gap_evt_data_length_update_request_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE. */ -typedef struct -{ - ble_gap_data_length_params_t effective_params; /**< The effective data length parameters. */ -} ble_gap_evt_data_length_update_t; - - -/**@brief GAP event structure. */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle on which event occurred. */ - union /**< union alternative identified by evt_id in enclosing struct. */ - { - ble_gap_evt_connected_t connected; /**< Connected Event Parameters. */ - ble_gap_evt_disconnected_t disconnected; /**< Disconnected Event Parameters. */ - ble_gap_evt_conn_param_update_t conn_param_update; /**< Connection Parameter Update Parameters. */ - ble_gap_evt_sec_params_request_t sec_params_request; /**< Security Parameters Request Event Parameters. */ - ble_gap_evt_sec_info_request_t sec_info_request; /**< Security Information Request Event Parameters. */ - ble_gap_evt_passkey_display_t passkey_display; /**< Passkey Display Event Parameters. */ - ble_gap_evt_key_pressed_t key_pressed; /**< Key Pressed Event Parameters. */ - ble_gap_evt_auth_key_request_t auth_key_request; /**< Authentication Key Request Event Parameters. */ - ble_gap_evt_lesc_dhkey_request_t lesc_dhkey_request; /**< LE Secure Connections DHKey calculation request. */ - ble_gap_evt_auth_status_t auth_status; /**< Authentication Status Event Parameters. */ - ble_gap_evt_conn_sec_update_t conn_sec_update; /**< Connection Security Update Event Parameters. */ - ble_gap_evt_timeout_t timeout; /**< Timeout Event Parameters. */ - ble_gap_evt_rssi_changed_t rssi_changed; /**< RSSI Event Parameters. */ - ble_gap_evt_adv_report_t adv_report; /**< Advertising Report Event Parameters. */ - ble_gap_evt_sec_request_t sec_request; /**< Security Request Event Parameters. */ - ble_gap_evt_conn_param_update_request_t conn_param_update_request; /**< Connection Parameter Update Parameters. */ - ble_gap_evt_scan_req_report_t scan_req_report; /**< Scan Request Report Parameters. */ - ble_gap_evt_phy_update_request_t phy_update_request; /**< PHY Update Request Event Parameters. */ - ble_gap_evt_phy_update_t phy_update; /**< PHY Update Parameters. */ - ble_gap_evt_data_length_update_request_t data_length_update_request; /**< Data Length Update Request Event Parameters. */ - ble_gap_evt_data_length_update_t data_length_update; /**< Data Length Update Event Parameters. */ - } params; /**< Event Parameters. */ -} ble_gap_evt_t; - - -/** - * @brief BLE GAP connection configuration parameters, set with @ref sd_ble_cfg_set. - * - * @retval ::NRF_ERROR_CONN_COUNT The connection count for the connection configurations is zero. - * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: - * - The sum of conn_count for all connection configurations combined exceeds UINT8_MAX. - * - The event length is smaller than @ref BLE_GAP_EVENT_LENGTH_MIN. - */ -typedef struct -{ - uint8_t conn_count; /**< The number of concurrent connections the application can create with this configuration. - The default and minimum value is @ref BLE_GAP_CONN_COUNT_DEFAULT. */ - uint16_t event_length; /**< The time set aside for this connection on every connection interval in 1.25 ms units. - The default value is @ref BLE_GAP_EVENT_LENGTH_DEFAULT, the minimum value is @ref BLE_GAP_EVENT_LENGTH_MIN. - The event length and the connection interval are the primary parameters - for setting the throughput of a connection. - See the SoftDevice Specification for details on throughput. */ -} ble_gap_conn_cfg_t; - - -/** - * @brief Configuration of maximum concurrent connections in the different connected roles, set with - * @ref sd_ble_cfg_set. - * - * @retval ::NRF_ERROR_CONN_COUNT The sum of periph_role_count and central_role_count is too - * large. The maximum supported sum of concurrent connections is - * @ref BLE_GAP_ROLE_COUNT_COMBINED_MAX. - * @retval ::NRF_ERROR_INVALID_PARAM central_sec_count is larger than central_role_count. - */ -typedef struct -{ - uint8_t periph_role_count; /**< Maximum number of connections concurrently acting as a peripheral. Default value is @ref BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT. */ - uint8_t central_role_count; /**< Maximum number of connections concurrently acting as a central. Default value is @ref BLE_GAP_ROLE_COUNT_CENTRAL_DEFAULT. */ - uint8_t central_sec_count; /**< Number of SMP instances shared between all connections acting as a central. Default value is @ref BLE_GAP_ROLE_COUNT_CENTRAL_SEC_DEFAULT. */ -} ble_gap_cfg_role_count_t; - - -/** - * @brief Device name and its properties, set with @ref sd_ble_cfg_set. - * - * @note If the device name is not configured, the default device name will be @ref - * BLE_GAP_DEVNAME_DEFAULT, the maximum device name length will be @ref - * BLE_GAP_DEVNAME_DEFAULT_LEN, vloc will be set to @ref BLE_GATTS_VLOC_STACK and the device name - * will have no write access. - * - * @note If @ref max_len is more than @ref BLE_GAP_DEVNAME_DEFAULT_LEN and vloc is set to @ref BLE_GATTS_VLOC_STACK, - * the attribute table size must be increased to have room for the longer device name (see - * @ref sd_ble_cfg_set and @ref ble_gatts_cfg_attr_tab_size_t). - * - * @note If vloc is @ref BLE_GATTS_VLOC_STACK : - * - p_value must point to non-volatile memory (flash) or be NULL. - * - If p_value is NULL, the device name will initially be empty. - * - * @note If vloc is @ref BLE_GATTS_VLOC_USER : - * - p_value cannot be NULL. - * - If the device name is writable, p_value must point to volatile memory (RAM). - * - * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: - * - Invalid device name location (vloc). - * - Invalid device name security mode. - * @retval ::NRF_ERROR_INVALID_LENGTH One or more of the following is true: - * - The device name length is invalid (must be between 0 and @ref BLE_GAP_DEVNAME_MAX_LEN). - * - The device name length is too long for the given Attribute Table. - * @retval ::NRF_ERROR_NOT_SUPPORTED Device name security mode is not supported. - */ -typedef struct -{ - ble_gap_conn_sec_mode_t write_perm; /**< Write permissions. */ - uint8_t vloc:2; /**< Value location, see @ref BLE_GATTS_VLOCS.*/ - uint8_t *p_value; /**< Pointer to where the value (device name) is stored or will be stored. */ - uint16_t current_len; /**< Current length in bytes of the memory pointed to by p_value.*/ - uint16_t max_len; /**< Maximum length in bytes of the memory pointed to by p_value.*/ -} ble_gap_cfg_device_name_t; - - -/**@brief Configuration structure for GAP configurations. */ -typedef union -{ - ble_gap_cfg_role_count_t role_count_cfg; /**< Role count configuration, cfg_id is @ref BLE_GAP_CFG_ROLE_COUNT. */ - ble_gap_cfg_device_name_t device_name_cfg; /**< Device name configuration, cfg_id is @ref BLE_GAP_CFG_DEVICE_NAME. */ -} ble_gap_cfg_t; - - -/**@brief Channel Map option. - * Used with @ref sd_ble_opt_get to get the current channel map - * or @ref sd_ble_opt_set to set a new channel map. When setting the - * channel map, it applies to all current and future connections. When getting the - * current channel map, it applies to a single connection and the connection handle - * must be supplied. - * - * @note Setting the channel map may take some time, depending on connection parameters. - * The time taken may be different for each connection and the get operation will - * return the previous channel map until the new one has taken effect. - * - * @note After setting the channel map, by spec it can not be set again until at least 1 s has passed. - * See Bluetooth Specification Version 4.1 Volume 2, Part E, Section 7.3.46. - * - * @retval ::NRF_SUCCESS Get or set successful. - * @retval ::NRF_ERROR_BUSY Channel map was set again before enough time had passed. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied for get. - * @retval ::NRF_ERROR_NOT_SUPPORTED Returned by sd_ble_opt_set in peripheral-only SoftDevices. - * - */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle (only applicable for get) */ - uint8_t ch_map[5]; /**< Channel Map (37-bit). */ -} ble_gap_opt_ch_map_t; - - -/**@brief Local connection latency option. - * - * Local connection latency is a feature which enables the slave to improve - * current consumption by ignoring the slave latency set by the peer. The - * local connection latency can only be set to a multiple of the slave latency, - * and cannot be longer than half of the supervision timeout. - * - * Used with @ref sd_ble_opt_set to set the local connection latency. The - * @ref sd_ble_opt_get is not supported for this option, but the actual - * local connection latency (unless set to NULL) is set as a return parameter - * when setting the option. - * - * @note The latency set will be truncated down to the closest slave latency event - * multiple, or the nearest multiple before half of the supervision timeout. - * - * @note The local connection latency is disabled by default, and needs to be enabled for new - * connections and whenever the connection is updated. - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_NOT_SUPPORTED Get is not supported. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. - */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle */ - uint16_t requested_latency; /**< Requested local connection latency. */ - uint16_t * p_actual_latency; /**< Pointer to storage for the actual local connection latency (can be set to NULL to skip return value). */ -} ble_gap_opt_local_conn_latency_t; - -/**@brief Disable slave latency - * - * Used with @ref sd_ble_opt_set to temporarily disable slave latency of a peripheral connection (see @ref ble_gap_conn_params_t::slave_latency). And to re-enable it again. - * When disabled, the peripheral will ignore the slave_latency set by the central. - * - * @note Shall only be called on peripheral links. - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_NOT_SUPPORTED Get is not supported. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. - */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle */ - uint8_t disable : 1; /**< Set to 1 to disable slave latency. Set to 0 enable it again.*/ -} ble_gap_opt_slave_latency_disable_t; - -/**@brief Passkey Option. - * - * Structure containing the passkey to be used during pairing. This can be used with @ref - * sd_ble_opt_set to make the SoftDevice use a preprogrammed passkey for authentication - * instead of generating a random one. - * - * @note Repeated pairing attempts using the same preprogrammed passkey makes pairing vulnerable to MITM attacks. - * - * @note @ref sd_ble_opt_get is not supported for this option. - * - */ -typedef struct -{ - uint8_t const * p_passkey; /**< Pointer to 6-digit ASCII string (digit 0..9 only, no NULL termination) passkey to be used during pairing. If this is NULL, the SoftDevice will generate a random passkey if required.*/ -} ble_gap_opt_passkey_t; - - -/**@brief Scan request report option. - * - * This can be used with @ref sd_ble_opt_set to make the SoftDevice send - * @ref BLE_GAP_EVT_SCAN_REQ_REPORT events. - * - * @note Due to the limited space reserved for scan request report events, - * not all received scan requests will be reported. - * - * @note If whitelisting is used, only whitelisted requests are reported. - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_INVALID_STATE When advertising is ongoing while the option is set. - */ -typedef struct -{ - uint8_t enable : 1; /**< Enable scan request reports. */ -} ble_gap_opt_scan_req_report_t; - -/**@brief Compatibility mode 1 option. - * - * This can be used with @ref sd_ble_opt_set to enable and disable - * compatibility mode 1. Compatibility mode 1 is disabled by default. - * - * @note Compatibility mode 1 enables interoperability with devices that do not support a value of - * 0 for the WinOffset parameter in the Link Layer CONNECT_IND packet. This applies to a - * limited set of legacy peripheral devices from another vendor. Enabling this compatibility - * mode will only have an effect if the local device will act as a central device and - * initiate a connection to a peripheral device. In that case it may lead to the connection - * creation taking up to one connection interval longer to complete for all connections. - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_INVALID_STATE When connection creation is ongoing while mode 1 is set. - */ -typedef struct -{ - uint8_t enable : 1; /**< Enable compatibility mode 1.*/ -} ble_gap_opt_compat_mode_1_t; - -/**@brief Authenticated payload timeout option. - * - * This can be used with @ref sd_ble_opt_set to change the Authenticated payload timeout to a value other - * than the default of @ref BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MAX. - * - * @note The authenticated payload timeout event ::BLE_GAP_TIMEOUT_SRC_AUTH_PAYLOAD will be generated - * if auth_payload_timeout time has elapsed without receiving a packet with a valid MIC on an encrypted - * link. - * - * @note The LE ping procedure will be initiated before the timer expires to give the peer a chance - * to reset the timer. In addition the stack will try to prioritize running of LE ping over other - * activities to increase chances of finishing LE ping before timer expires. To avoid side-effects - * on other activities, it is recommended to use high timeout values. - * Recommended timeout > 2*(connInterval * (6 + connSlaveLatency)). - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. auth_payload_timeout was outside of allowed range. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. - */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle */ - uint16_t auth_payload_timeout; /**< Requested timeout in 10 ms unit, see @ref BLE_GAP_AUTH_PAYLOAD_TIMEOUT. */ -} ble_gap_opt_auth_payload_timeout_t; - - -/**@brief Option structure for GAP options. */ -typedef union -{ - ble_gap_opt_ch_map_t ch_map; /**< Parameters for the Channel Map option. */ - ble_gap_opt_local_conn_latency_t local_conn_latency; /**< Parameters for the Local connection latency option */ - ble_gap_opt_passkey_t passkey; /**< Parameters for the Passkey option.*/ - ble_gap_opt_scan_req_report_t scan_req_report; /**< Parameters for the scan request report option.*/ - ble_gap_opt_compat_mode_1_t compat_mode_1; /**< Parameters for the compatibility mode 1 option.*/ - ble_gap_opt_auth_payload_timeout_t auth_payload_timeout; /**< Parameters for the authenticated payload timeout option.*/ - ble_gap_opt_slave_latency_disable_t slave_latency_disable; /**< Parameters for the Disable slave latency option */ -} ble_gap_opt_t; -/**@} */ - - -/**@addtogroup BLE_GAP_FUNCTIONS Functions - * @{ */ - -/**@brief Set the local Bluetooth identity address. - * - * The local Bluetooth identity address is the address that identifies this device to other peers. - * The address type must be either @ref BLE_GAP_ADDR_TYPE_PUBLIC or @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC. - * - * @note The identity address cannot be changed while advertising, scanning or creating a connection. - * - * @note This address will be distributed to the peer during bonding. - * If the address changes, the address stored in the peer device will not be valid and the ability to - * reconnect using the old address will be lost. - * - * @note By default the SoftDevice will set an address of type @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC upon being - * enabled. The address is a random number populated during the IC manufacturing process and remains unchanged - * for the lifetime of each IC. - * - * @mscs - * @mmsc{@ref BLE_GAP_ADV_MSC} - * @endmscs - * - * @param[in] p_addr Pointer to address structure. - * - * @retval ::NRF_SUCCESS Address successfully set. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::NRF_ERROR_INVALID_STATE The identity address cannot be changed while advertising, - * scanning or creating a connection. - */ -SVCALL(SD_BLE_GAP_ADDR_SET, uint32_t, sd_ble_gap_addr_set(ble_gap_addr_t const *p_addr)); - - -/**@brief Get local Bluetooth identity address. - * - * @note This will always return the identity address irrespective of the privacy settings, - * i.e. the address type will always be either @ref BLE_GAP_ADDR_TYPE_PUBLIC or @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC. - * - * @param[out] p_addr Pointer to address structure to be filled in. - * - * @retval ::NRF_SUCCESS Address successfully retrieved. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. - */ -SVCALL(SD_BLE_GAP_ADDR_GET, uint32_t, sd_ble_gap_addr_get(ble_gap_addr_t *p_addr)); - - -/**@brief Set the active whitelist in the SoftDevice. - * - * @note Only one whitelist can be used at a time and the whitelist is shared between the BLE roles. - * The whitelist cannot be set if a BLE role is using the whitelist. - * - * @note If an address is resolved using the information in the device identity list, then the whitelist - * filter policy applies to the peer identity address and not the resolvable address sent on air. - * - * @mscs - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_PRIVATE_SCAN_MSC} - * @endmscs - * - * @param[in] pp_wl_addrs Pointer to a whitelist of peer addresses, if NULL the whitelist will be cleared. - * @param[in] len Length of the whitelist, maximum @ref BLE_GAP_WHITELIST_ADDR_MAX_COUNT. - * - * @retval ::NRF_SUCCESS The whitelist is successfully set/cleared. - * @retval ::NRF_ERROR_INVALID_ADDR The whitelist (or one of its entries) provided is invalid. - * @retval ::BLE_ERROR_GAP_WHITELIST_IN_USE The whitelist is in use by a BLE role and cannot be set or cleared. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. - * @retval ::NRF_ERROR_DATA_SIZE The given whitelist size is invalid (zero or too large); this can only return when - * pp_wl_addrs is not NULL. - */ -SVCALL(SD_BLE_GAP_WHITELIST_SET, uint32_t, sd_ble_gap_whitelist_set(ble_gap_addr_t const * const * pp_wl_addrs, uint8_t len)); - - -/**@brief Set device identity list. - * - * @note Only one device identity list can be used at a time and the list is shared between the BLE roles. - * The device identity list cannot be set if a BLE role is using the list. - * - * @param[in] pp_id_keys Pointer to an array of peer identity addresses and peer IRKs, if NULL the device identity list will be cleared. - * @param[in] pp_local_irks Pointer to an array of local IRKs. Each entry in the array maps to the entry in pp_id_keys at the same index. - * To fill in the list with the currently set device IRK for all peers, set to NULL. - * @param[in] len Length of the device identity list, maximum @ref BLE_GAP_DEVICE_IDENTITIES_MAX_COUNT. - * - * @mscs - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_PRIVATE_SCAN_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_CONN_PRIV_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_CONN_PRIV_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS The device identity list successfully set/cleared. - * @retval ::NRF_ERROR_INVALID_ADDR The device identity list (or one of its entries) provided is invalid. - * This code may be returned if the local IRK list also has an invalid entry. - * @retval ::BLE_ERROR_GAP_DEVICE_IDENTITIES_IN_USE The device identity list is in use and cannot be set or cleared. - * @retval ::BLE_ERROR_GAP_DEVICE_IDENTITIES_DUPLICATE The device identity list contains multiple entries with the same identity address. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. - * @retval ::NRF_ERROR_DATA_SIZE The given device identity list size invalid (zero or too large); this can - * only return when pp_id_keys is not NULL. - */ -SVCALL(SD_BLE_GAP_DEVICE_IDENTITIES_SET, uint32_t, sd_ble_gap_device_identities_set(ble_gap_id_key_t const * const * pp_id_keys, ble_gap_irk_t const * const * pp_local_irks, uint8_t len)); - - -/**@brief Set privacy settings. - * - * @note Privacy settings cannot be changed while advertising, scanning or creating a connection. - * - * @param[in] p_privacy_params Privacy settings. - * - * @mscs - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. - * @retval ::NRF_ERROR_INVALID_ADDR The pointer to privacy settings is NULL or invalid. - * Otherwise, the p_device_irk pointer in privacy parameter is an invalid pointer. - * @retval ::NRF_ERROR_INVALID_PARAM Out of range parameters are provided. - * @retval ::NRF_ERROR_INVALID_STATE Privacy settings cannot be changed while advertising, scanning - * or creating a connection. - */ -SVCALL(SD_BLE_GAP_PRIVACY_SET, uint32_t, sd_ble_gap_privacy_set(ble_gap_privacy_params_t const *p_privacy_params)); - - -/**@brief Get privacy settings. - * - * @note ::ble_gap_privacy_params_t::p_device_irk must be initialized to NULL or a valid address before this function is called. - * If it is initialized to a valid address, the address pointed to will contain the current device IRK on return. - * - * @param[in,out] p_privacy_params Privacy settings. - * - * @retval ::NRF_SUCCESS Privacy settings read. - * @retval ::NRF_ERROR_INVALID_ADDR The pointer given for returning the privacy settings may be NULL or invalid. - * Otherwise, the p_device_irk pointer in privacy parameter is an invalid pointer. - */ -SVCALL(SD_BLE_GAP_PRIVACY_GET, uint32_t, sd_ble_gap_privacy_get(ble_gap_privacy_params_t *p_privacy_params)); - - -/**@brief Set, clear or update advertising and scan response data. - * - * @note The format of the advertising data will be checked by this call to ensure interoperability. - * Limitations imposed by this API call to the data provided include having a flags data type in the scan response data and - * duplicating the local name in the advertising data and scan response data. - * - * @note To clear the advertising data and set it to a 0-length packet, simply provide a valid pointer (p_data/p_sr_data) with its corresponding - * length (dlen/srdlen) set to 0. - * - * @note The call will fail if p_data and p_sr_data are both NULL since this would have no effect. - * - * @mscs - * @mmsc{@ref BLE_GAP_ADV_MSC} - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @endmscs - * - * @param[in] p_data Raw data to be placed in advertising packet. If NULL, no changes are made to the current advertising packet data. - * @param[in] dlen Data length for p_data. Max size: @ref BLE_GAP_ADV_MAX_SIZE octets. Should be 0 if p_data is NULL, can be 0 if p_data is not NULL. - * @param[in] p_sr_data Raw data to be placed in scan response packet. If NULL, no changes are made to the current scan response packet data. - * @param[in] srdlen Data length for p_sr_data. Max size: @ref BLE_GAP_ADV_MAX_SIZE octets. Should be 0 if p_sr_data is NULL, can be 0 if p_data is not NULL. - * - * @retval ::NRF_SUCCESS Advertising data successfully updated or cleared. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, both p_data and p_sr_data cannot be NULL. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_FLAGS Invalid combination of advertising flags supplied. - * @retval ::NRF_ERROR_INVALID_DATA Invalid data type(s) supplied, check the advertising data format specification. - * @retval ::NRF_ERROR_INVALID_LENGTH Invalid data length(s) supplied. - * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported data type. - * @retval ::BLE_ERROR_GAP_UUID_LIST_MISMATCH Invalid UUID list supplied. - */ -SVCALL(SD_BLE_GAP_ADV_DATA_SET, uint32_t, sd_ble_gap_adv_data_set(uint8_t const *p_data, uint8_t dlen, uint8_t const *p_sr_data, uint8_t srdlen)); - - -/**@brief Start advertising (GAP Discoverable, Connectable modes, Broadcast Procedure). - * - * @note Only one advertiser may be active at any time. - * - * @events - * @event{@ref BLE_GAP_EVT_CONNECTED, Generated after connection has been established through connectable advertising.} - * @event{@ref BLE_GAP_EVT_TIMEOUT, Advertisement has timed out.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_ADV_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_CONN_PRIV_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @endmscs - * - * @param[in] p_adv_params Pointer to advertising parameters structure. - * @param[in] conn_cfg_tag Tag identifying a configuration set by @ref sd_ble_cfg_set or @ref - * BLE_CONN_CFG_TAG_DEFAULT to use the default connection configuration. If - * @ref ble_gap_adv_params_t::type is @ref BLE_GAP_ADV_TYPE_ADV_NONCONN_IND, - * this is ignored. - * - * @retval ::NRF_SUCCESS The BLE stack has started advertising. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_CONN_COUNT The limit of available connections has been reached; connectable advertiser cannot be started. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check the accepted ranges and limits. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid Bluetooth address supplied. - * @retval ::BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST Discoverable mode and whitelist incompatible. - * @retval ::NRF_ERROR_RESOURCES Not enough BLE role slots available. - * Stop one or more currently active roles (Central, Peripheral or Observer) and try again - */ -SVCALL(SD_BLE_GAP_ADV_START, uint32_t, sd_ble_gap_adv_start(ble_gap_adv_params_t const *p_adv_params, uint8_t conn_cfg_tag)); - - -/**@brief Stop advertising (GAP Discoverable, Connectable modes, Broadcast Procedure). - * - * @mscs - * @mmsc{@ref BLE_GAP_ADV_MSC} - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS The BLE stack has stopped advertising. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation (most probably not in advertising state). - */ -SVCALL(SD_BLE_GAP_ADV_STOP, uint32_t, sd_ble_gap_adv_stop(void)); - - - -/**@brief Update connection parameters. - * - * @details In the central role this will initiate a Link Layer connection parameter update procedure, - * otherwise in the peripheral role, this will send the corresponding L2CAP request and wait for - * the central to perform the procedure. In both cases, and regardless of success or failure, the application - * will be informed of the result with a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE event. - * - * @details This function can be used as a central both to reply to a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST or to start the procedure unrequested. - * - * @events - * @event{@ref BLE_GAP_EVT_CONN_PARAM_UPDATE, Result of the connection parameter update procedure.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CPU_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} - * @mmsc{@ref BLE_GAP_MULTILINK_CPU_MSC} - * @mmsc{@ref BLE_GAP_MULTILINK_CTRL_PROC_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_CPU_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_conn_params Pointer to desired connection parameters. If NULL is provided on a peripheral role, - * the parameters in the PPCP characteristic of the GAP service will be used instead. - * If NULL is provided on a central role and in response to a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST, the peripheral request will be rejected - * - * @retval ::NRF_SUCCESS The Connection Update procedure has been started successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_BUSY Procedure already in progress, wait for pending procedures to complete and retry. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - */ -SVCALL(SD_BLE_GAP_CONN_PARAM_UPDATE, uint32_t, sd_ble_gap_conn_param_update(uint16_t conn_handle, ble_gap_conn_params_t const *p_conn_params)); - - -/**@brief Disconnect (GAP Link Termination). - * - * @details This call initiates the disconnection procedure, and its completion will be communicated to the application - * with a @ref BLE_GAP_EVT_DISCONNECTED event. - * - * @events - * @event{@ref BLE_GAP_EVT_DISCONNECTED, Generated when disconnection procedure is complete.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CONN_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] hci_status_code HCI status code, see @ref BLE_HCI_STATUS_CODES (accepted values are @ref BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION and @ref BLE_HCI_CONN_INTERVAL_UNACCEPTABLE). - * - * @retval ::NRF_SUCCESS The disconnection procedure has been started successfully. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation (disconnection is already in progress). - */ -SVCALL(SD_BLE_GAP_DISCONNECT, uint32_t, sd_ble_gap_disconnect(uint16_t conn_handle, uint8_t hci_status_code)); - - -/**@brief Set the radio's transmit power. - * - * @param[in] tx_power Radio transmit power in dBm (accepted values are -40, -20, -16, -12, -8, -4, 0, 3, and 4 dBm). - * - * @retval ::NRF_SUCCESS Successfully changed the transmit power. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - */ -SVCALL(SD_BLE_GAP_TX_POWER_SET, uint32_t, sd_ble_gap_tx_power_set(int8_t tx_power)); - - -/**@brief Set GAP Appearance value. - * - * @param[in] appearance Appearance (16-bit), see @ref BLE_APPEARANCES. - * - * @retval ::NRF_SUCCESS Appearance value set successfully. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - */ -SVCALL(SD_BLE_GAP_APPEARANCE_SET, uint32_t, sd_ble_gap_appearance_set(uint16_t appearance)); - - -/**@brief Get GAP Appearance value. - * - * @param[out] p_appearance Pointer to appearance (16-bit) to be filled in, see @ref BLE_APPEARANCES. - * - * @retval ::NRF_SUCCESS Appearance value retrieved successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - */ -SVCALL(SD_BLE_GAP_APPEARANCE_GET, uint32_t, sd_ble_gap_appearance_get(uint16_t *p_appearance)); - - -/**@brief Set GAP Peripheral Preferred Connection Parameters. - * - * @param[in] p_conn_params Pointer to a @ref ble_gap_conn_params_t structure with the desired parameters. - * - * @retval ::NRF_SUCCESS Peripheral Preferred Connection Parameters set successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - */ -SVCALL(SD_BLE_GAP_PPCP_SET, uint32_t, sd_ble_gap_ppcp_set(ble_gap_conn_params_t const *p_conn_params)); - - -/**@brief Get GAP Peripheral Preferred Connection Parameters. - * - * @param[out] p_conn_params Pointer to a @ref ble_gap_conn_params_t structure where the parameters will be stored. - * - * @retval ::NRF_SUCCESS Peripheral Preferred Connection Parameters retrieved successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - */ -SVCALL(SD_BLE_GAP_PPCP_GET, uint32_t, sd_ble_gap_ppcp_get(ble_gap_conn_params_t *p_conn_params)); - - -/**@brief Set GAP device name. - * - * @note If the device name is located in application flash memory (see @ref ble_gap_cfg_device_name_t), - * it cannot be changed. Then @ref NRF_ERROR_FORBIDDEN will be returned. - * - * @param[in] p_write_perm Write permissions for the Device Name characteristic, see @ref ble_gap_conn_sec_mode_t. - * @param[in] p_dev_name Pointer to a UTF-8 encoded, non NULL-terminated string. - * @param[in] len Length of the UTF-8, non NULL-terminated string pointed to by p_dev_name in octets (must be smaller or equal than @ref BLE_GAP_DEVNAME_MAX_LEN). - * - * @retval ::NRF_SUCCESS GAP device name and permissions set successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. - * @retval ::NRF_ERROR_FORBIDDEN Device name is not writable. - */ -SVCALL(SD_BLE_GAP_DEVICE_NAME_SET, uint32_t, sd_ble_gap_device_name_set(ble_gap_conn_sec_mode_t const *p_write_perm, uint8_t const *p_dev_name, uint16_t len)); - - -/**@brief Get GAP device name. - * - * @note If the device name is longer than the size of the supplied buffer, - * p_len will return the complete device name length, - * and not the number of bytes actually returned in p_dev_name. - * The application may use this information to allocate a suitable buffer size. - * - * @param[out] p_dev_name Pointer to an empty buffer where the UTF-8 non NULL-terminated string will be placed. Set to NULL to obtain the complete device name length. - * @param[in,out] p_len Length of the buffer pointed by p_dev_name, complete device name length on output. - * - * @retval ::NRF_SUCCESS GAP device name retrieved successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. - */ -SVCALL(SD_BLE_GAP_DEVICE_NAME_GET, uint32_t, sd_ble_gap_device_name_get(uint8_t *p_dev_name, uint16_t *p_len)); - - -/**@brief Initiate the GAP Authentication procedure. - * - * @details In the central role, this function will send an SMP Pairing Request (or an SMP Pairing Failed if rejected), - * otherwise in the peripheral role, an SMP Security Request will be sent. - * - * @events - * @event{Depending on the security parameters set and the packet exchanges with the peer\, the following events may be generated:} - * @event{@ref BLE_GAP_EVT_SEC_PARAMS_REQUEST} - * @event{@ref BLE_GAP_EVT_SEC_INFO_REQUEST} - * @event{@ref BLE_GAP_EVT_PASSKEY_DISPLAY} - * @event{@ref BLE_GAP_EVT_KEY_PRESSED} - * @event{@ref BLE_GAP_EVT_AUTH_KEY_REQUEST} - * @event{@ref BLE_GAP_EVT_LESC_DHKEY_REQUEST} - * @event{@ref BLE_GAP_EVT_CONN_SEC_UPDATE} - * @event{@ref BLE_GAP_EVT_AUTH_STATUS} - * @event{@ref BLE_GAP_EVT_TIMEOUT} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_SEC_REQ_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_SEC_REQ_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_sec_params Pointer to the @ref ble_gap_sec_params_t structure with the security parameters to be used during the pairing or bonding procedure. - * In the peripheral role, only the bond, mitm, lesc and keypress fields of this structure are used. - * In the central role, this pointer may be NULL to reject a Security Request. - * - * @retval ::NRF_SUCCESS Successfully initiated authentication procedure. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_NO_MEM The maximum number of authentication procedures that can run in parallel for the given role is reached. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_NOT_SUPPORTED Setting of sign or link fields in @ref ble_gap_sec_kdist_t not supported. - * @retval ::NRF_ERROR_TIMEOUT A SMP timeout has occurred, and further SMP operations on this link is prohibited. - */ -SVCALL(SD_BLE_GAP_AUTHENTICATE, uint32_t, sd_ble_gap_authenticate(uint16_t conn_handle, ble_gap_sec_params_t const *p_sec_params)); - - -/**@brief Reply with GAP security parameters. - * - * @details This function is only used to reply to a @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. - * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. - * - * @events - * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_JW_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_PERIPH_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_CENTRAL_OOB_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_CONFIRM_FAIL_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_PD_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_KS_TOO_SMALL_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_APP_ERROR_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_REMOTE_PAIRING_FAIL_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_TIMEOUT_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] sec_status Security status, see @ref BLE_GAP_SEC_STATUS. - * @param[in] p_sec_params Pointer to a @ref ble_gap_sec_params_t security parameters structure. In the central role this must be set to NULL, as the parameters have - * already been provided during a previous call to @ref sd_ble_gap_authenticate. - * @param[in,out] p_sec_keyset Pointer to a @ref ble_gap_sec_keyset_t security keyset structure. Any keys generated and/or distributed as a result of the ongoing security procedure - * will be stored into the memory referenced by the pointers inside this structure. The keys will be stored and available to the application - * upon reception of a @ref BLE_GAP_EVT_AUTH_STATUS event. - * Note that the SoftDevice expects the application to provide memory for storing the - * peer's keys. So it must be ensured that the relevant pointers inside this structure are not NULL. The pointers to the local key - * can, however, be NULL, in which case, the local key data will not be available to the application upon reception of the - * @ref BLE_GAP_EVT_AUTH_STATUS event. - * - * @retval ::NRF_SUCCESS Successfully accepted security parameter from the application. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_NOT_SUPPORTED Setting of sign or link fields in @ref ble_gap_sec_kdist_t not supported. - */ -SVCALL(SD_BLE_GAP_SEC_PARAMS_REPLY, uint32_t, sd_ble_gap_sec_params_reply(uint16_t conn_handle, uint8_t sec_status, ble_gap_sec_params_t const *p_sec_params, ble_gap_sec_keyset_t const *p_sec_keyset)); - - -/**@brief Reply with an authentication key. - * - * @details This function is only used to reply to a @ref BLE_GAP_EVT_AUTH_KEY_REQUEST or a @ref BLE_GAP_EVT_PASSKEY_DISPLAY, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. - * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. - * - * @events - * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_CENTRAL_OOB_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] key_type See @ref BLE_GAP_AUTH_KEY_TYPES. - * @param[in] p_key If key type is @ref BLE_GAP_AUTH_KEY_TYPE_NONE, then NULL. - * If key type is @ref BLE_GAP_AUTH_KEY_TYPE_PASSKEY, then a 6-byte ASCII string (digit 0..9 only, no NULL termination) - * or NULL when confirming LE Secure Connections Numeric Comparison. - * If key type is @ref BLE_GAP_AUTH_KEY_TYPE_OOB, then a 16-byte OOB key value in little-endian format. - * - * @retval ::NRF_SUCCESS Authentication key successfully set. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_AUTH_KEY_REPLY, uint32_t, sd_ble_gap_auth_key_reply(uint16_t conn_handle, uint8_t key_type, uint8_t const *p_key)); - -/**@brief Reply with an LE Secure connections DHKey. - * - * @details This function is only used to reply to a @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. - * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. - * - * @events - * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_LESC_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_PD_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_dhkey LE Secure Connections DHKey. - * - * @retval ::NRF_SUCCESS DHKey successfully set. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_LESC_DHKEY_REPLY, uint32_t, sd_ble_gap_lesc_dhkey_reply(uint16_t conn_handle, ble_gap_lesc_dhkey_t const *p_dhkey)); - -/**@brief Notify the peer of a local keypress. - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] kp_not See @ref BLE_GAP_KP_NOT_TYPES. - * - * @retval ::NRF_SUCCESS Keypress notification successfully queued for transmission. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Either not entering a passkey or keypresses have not been enabled by both peers. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_BUSY The BLE stack is busy. Retry at later time. - */ -SVCALL(SD_BLE_GAP_KEYPRESS_NOTIFY, uint32_t, sd_ble_gap_keypress_notify(uint16_t conn_handle, uint8_t kp_not)); - -/**@brief Generate a set of OOB data to send to a peer out of band. - * - * @note The @ref ble_gap_addr_t included in the OOB data returned will be the currently active one (or, if a connection has already been established, - * the one used during connection setup). The application may manually overwrite it with an updated value. - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. Can be BLE_CONN_HANDLE_INVALID if a BLE connection has not been established yet. - * @param[in] p_pk_own LE Secure Connections local P-256 Public Key. - * @param[out] p_oobd_own The OOB data to be sent out of band to a peer. - * - * @retval ::NRF_SUCCESS OOB data successfully generated. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_LESC_OOB_DATA_GET, uint32_t, sd_ble_gap_lesc_oob_data_get(uint16_t conn_handle, ble_gap_lesc_p256_pk_t const *p_pk_own, ble_gap_lesc_oob_data_t *p_oobd_own)); - -/**@brief Provide the OOB data sent/received out of band. - * - * @note An authentication procedure with OOB selected as an algorithm must be in progress when calling this function. - * @note A @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST event with the oobd_req set to 1 must have been received prior to calling this function. - * - * @events - * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_oobd_own The OOB data sent out of band to a peer or NULL if the peer has not received OOB data. - * Must correspond to @ref ble_gap_sec_params_t::oob flag in @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST. - * @param[in] p_oobd_peer The OOB data received out of band from a peer or NULL if none received. - * Must correspond to @ref ble_gap_sec_params_t::oob flag in @ref sd_ble_gap_authenticate in the central role - * or @ref sd_ble_gap_sec_params_reply in the peripheral role. - * - * @retval ::NRF_SUCCESS OOB data accepted. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_LESC_OOB_DATA_SET, uint32_t, sd_ble_gap_lesc_oob_data_set(uint16_t conn_handle, ble_gap_lesc_oob_data_t const *p_oobd_own, ble_gap_lesc_oob_data_t const *p_oobd_peer)); - -/**@brief Initiate GAP Encryption procedure. - * - * @details In the central role, this function will initiate the encryption procedure using the encryption information provided. - * - * @events - * @event{@ref BLE_GAP_EVT_CONN_SEC_UPDATE, The connection security has been updated.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_ENC_MSC} - * @mmsc{@ref BLE_GAP_MULTILINK_CTRL_PROC_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_SEC_REQ_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_master_id Pointer to a @ref ble_gap_master_id_t master identification structure. - * @param[in] p_enc_info Pointer to a @ref ble_gap_enc_info_t encryption information structure. - * - * @retval ::NRF_SUCCESS Successfully initiated authentication procedure. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::BLE_ERROR_INVALID_ROLE Operation is not supported in the Peripheral role. - * @retval ::NRF_ERROR_BUSY Procedure already in progress or not allowed at this time, wait for pending procedures to complete and retry. - */ -SVCALL(SD_BLE_GAP_ENCRYPT, uint32_t, sd_ble_gap_encrypt(uint16_t conn_handle, ble_gap_master_id_t const *p_master_id, ble_gap_enc_info_t const *p_enc_info)); - - -/**@brief Reply with GAP security information. - * - * @details This function is only used to reply to a @ref BLE_GAP_EVT_SEC_INFO_REQUEST, calling it at other times will result in @ref NRF_ERROR_INVALID_STATE. - * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. - * @note Data signing is not yet supported, and p_sign_info must therefore be NULL. - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_ENC_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_enc_info Pointer to a @ref ble_gap_enc_info_t encryption information structure. May be NULL to signal none is available. - * @param[in] p_id_info Pointer to a @ref ble_gap_irk_t identity information structure. May be NULL to signal none is available. - * @param[in] p_sign_info Pointer to a @ref ble_gap_sign_info_t signing information structure. May be NULL to signal none is available. - * - * @retval ::NRF_SUCCESS Successfully accepted security information. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_SEC_INFO_REPLY, uint32_t, sd_ble_gap_sec_info_reply(uint16_t conn_handle, ble_gap_enc_info_t const *p_enc_info, ble_gap_irk_t const *p_id_info, ble_gap_sign_info_t const *p_sign_info)); - - -/**@brief Get the current connection security. - * - * @param[in] conn_handle Connection handle. - * @param[out] p_conn_sec Pointer to a @ref ble_gap_conn_sec_t structure to be filled in. - * - * @retval ::NRF_SUCCESS Current connection security successfully retrieved. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_CONN_SEC_GET, uint32_t, sd_ble_gap_conn_sec_get(uint16_t conn_handle, ble_gap_conn_sec_t *p_conn_sec)); - - -/**@brief Start reporting the received signal strength to the application. - * - * A new event is reported whenever the RSSI value changes, until @ref sd_ble_gap_rssi_stop is called. - * - * @events - * @event{@ref BLE_GAP_EVT_RSSI_CHANGED, New RSSI data available. How often the event is generated is - * dependent on the settings of the threshold_dbm - * and skip_count input parameters.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} - * @mmsc{@ref BLE_GAP_RSSI_FILT_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] threshold_dbm Minimum change in dBm before triggering the @ref BLE_GAP_EVT_RSSI_CHANGED event. Events are disabled if threshold_dbm equals @ref BLE_GAP_RSSI_THRESHOLD_INVALID. - * @param[in] skip_count Number of RSSI samples with a change of threshold_dbm or more before sending a new @ref BLE_GAP_EVT_RSSI_CHANGED event. - * - * @retval ::NRF_SUCCESS Successfully activated RSSI reporting. - * @retval ::NRF_ERROR_INVALID_STATE Disconnection in progress. Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_RSSI_START, uint32_t, sd_ble_gap_rssi_start(uint16_t conn_handle, uint8_t threshold_dbm, uint8_t skip_count)); - - -/**@brief Stop reporting the received signal strength. - * - * @note An RSSI change detected before the call but not yet received by the application - * may be reported after @ref sd_ble_gap_rssi_stop has been called. - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} - * @mmsc{@ref BLE_GAP_RSSI_FILT_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * - * @retval ::NRF_SUCCESS Successfully deactivated RSSI reporting. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_RSSI_STOP, uint32_t, sd_ble_gap_rssi_stop(uint16_t conn_handle)); - - -/**@brief Get the received signal strength for the last connection event. - * - * @ref sd_ble_gap_rssi_start must be called to start reporting RSSI before using this function. @ref NRF_ERROR_NOT_FOUND - * will be returned until RSSI was sampled for the first time after calling @ref sd_ble_gap_rssi_start. - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[out] p_rssi Pointer to the location where the RSSI measurement shall be stored. - * - * @retval ::NRF_SUCCESS Successfully read the RSSI. - * @retval ::NRF_ERROR_NOT_FOUND No sample is available. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_INVALID_STATE RSSI reporting is not ongoing, or disconnection in progress. - */ -SVCALL(SD_BLE_GAP_RSSI_GET, uint32_t, sd_ble_gap_rssi_get(uint16_t conn_handle, int8_t *p_rssi)); - - -/**@brief Start scanning (GAP Discovery procedure, Observer Procedure). - * - * @events - * @event{@ref BLE_GAP_EVT_ADV_REPORT, An advertising or scan response packet has been received.} - * @event{@ref BLE_GAP_EVT_TIMEOUT, Scanner has timed out.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_SCAN_MSC} - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @endmscs - * - * @param[in] p_scan_params Pointer to scan parameters structure. - * - * @retval ::NRF_SUCCESS Successfully initiated scanning procedure. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_RESOURCES Not enough BLE role slots available. - * Stop one or more currently active roles (Central, Peripheral or Broadcaster) and try again - */ -SVCALL(SD_BLE_GAP_SCAN_START, uint32_t, sd_ble_gap_scan_start(ble_gap_scan_params_t const *p_scan_params)); - - -/**@brief Stop scanning (GAP Discovery procedure, Observer Procedure). - * - * @mscs - * @mmsc{@ref BLE_GAP_SCAN_MSC} - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Successfully stopped scanning procedure. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation (most probably not in scanning state). - */ -SVCALL(SD_BLE_GAP_SCAN_STOP, uint32_t, sd_ble_gap_scan_stop(void)); - - -/**@brief Create a connection (GAP Link Establishment). - * - * @note If a scanning procedure is currently in progress it will be automatically stopped when calling this function. - * The scanning procedure will be stopped even if the function returns an error. - * - * @mscs - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_CONN_PRIV_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_CONN_MSC} - * @endmscs - * - * @param[in] p_peer_addr Pointer to peer address. If the use_whitelist bit is set in @ref ble_gap_scan_params_t, then this is ignored. - * @param[in] p_scan_params Pointer to scan parameters structure. - * @param[in] p_conn_params Pointer to desired connection parameters. - * @param[in] conn_cfg_tag Tag identifying a configuration set by @ref sd_ble_cfg_set or @ref - * BLE_CONN_CFG_TAG_DEFAULT to use the default connection configuration. - * - * @retval ::NRF_SUCCESS Successfully initiated connection procedure. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid parameter(s) pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * - Invalid parameter(s) in p_scan_params or p_conn_params. - * - Use of whitelist requested but whitelist has not been set, see @ref sd_ble_gap_whitelist_set. - * - Peer address was not present in the device identity list, see @ref sd_ble_gap_device_identities_set. - * @retval ::NRF_ERROR_INVALID_STATE The SoftDevice is in an invalid state to perform this operation. This may be due to an - * existing locally initiated connect procedure, which must complete before initiating again. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid Peer address. - * @retval ::NRF_ERROR_CONN_COUNT The limit of available connections has been reached. - * @retval ::NRF_ERROR_RESOURCES Not enough BLE role slots available. - * Stop one or more currently active roles (Central, Peripheral or Broadcaster) and try again - */ -SVCALL(SD_BLE_GAP_CONNECT, uint32_t, sd_ble_gap_connect(ble_gap_addr_t const *p_peer_addr, ble_gap_scan_params_t const *p_scan_params, ble_gap_conn_params_t const *p_conn_params, uint8_t conn_cfg_tag)); - - -/**@brief Cancel a connection establishment. - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_CONN_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Successfully canceled an ongoing connection procedure. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - */ -SVCALL(SD_BLE_GAP_CONNECT_CANCEL, uint32_t, sd_ble_gap_connect_cancel(void)); - - -/**@brief Initiate or respond to a PHY Update Procedure - * - * @details This function is used to initiate or respond to a PHY Update Procedure. It will always generate a - * @ref BLE_GAP_EVT_PHY_UPDATE event if successfully executed. If @ref ble_gap_phys_t::tx_phys or @ref ble_gap_phys_t::rx_phys - * is @ref BLE_GAP_PHY_AUTO, then the stack will select a PHY for the respective direction based on the peer's PHY preferences - * and the local stack configuration. If the peer does not support the PHY Update Procedure, then the - * resulting @ref BLE_GAP_EVT_PHY_UPDATE event will have a status set to - * @ref BLE_HCI_UNSUPPORTED_REMOTE_FEATURE. - * If the PHY procedure was rejected by the peer due to a procedure collision, the status will be - * @ref BLE_HCI_STATUS_CODE_LMP_ERROR_TRANSACTION_COLLISION or @ref BLE_HCI_DIFFERENT_TRANSACTION_COLLISION. - * If the peer responds to the PHY Update procedure with invalid parameters, the status will be @ref BLE_HCI_STATUS_CODE_INVALID_LMP_PARAMETERS. - * If the PHY procedure was rejected by the peer for a different reason, the status will contain the reason as specified by the peer. - * - * @events - * @event{@ref BLE_GAP_EVT_PHY_UPDATE, Result of the PHY Update Procedure.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_PHY_UPDATE} - * @mmsc{@ref BLE_GAP_PERIPHERAL_PHY_UPDATE} - * @endmscs - * - * @param[in] conn_handle Connection handle to indicate the connection for which the PHY Update is requested. - * @param[in] p_gap_phys Pointer to PHY structure. - * - * @retval ::NRF_SUCCESS Successfully requested a PHY Update. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Unsupported PHYs supplied to the call. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_BUSY Procedure is already in progress or not allowed at this time. Process pending events and wait for the pending procedure to complete and retry. - * - */ -SVCALL(SD_BLE_GAP_PHY_UPDATE, uint32_t, sd_ble_gap_phy_update(uint16_t conn_handle, ble_gap_phys_t const *p_gap_phys)); - -/**@brief Initiate or respond to a Data Length Update Procedure. - * - * @note Only symmetric input parameters for the Data Length Update is supported. Only @ref - * BLE_GAP_DATA_LENGTH_AUTO for max_tx_time_us and max_rx_time_us is supported. - * - * @note If the application uses @ref BLE_GAP_DATA_LENGTH_AUTO for one or more members of - * p_dl_params, the SoftDevice will choose the highest value supported in current - * configuration and connection parameters. - * - * @param[in] conn_handle Connection handle. - * @param[in] p_dl_params Pointer to local parameters to be used in Data Length Update - * Procedure. Set any member to @ref BLE_GAP_DATA_LENGTH_AUTO to let - * the SoftDevice automatically decide the value for that member. - * Set to NULL to use automatic values for all members. - * @param[out] p_dl_limitation Pointer to limitation to be written when local device does not - * have enough resources to accommodate the requested Data Length - * Update parameters. Ignored if NULL. - * - * @mscs - * @mmsc{@ref BLE_GAP_DATA_LENGTH_UPDATE_PROCEDURE_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Successfully set Data Length Extension initiation/response parameters. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameters supplied. - * @retval ::NRF_ERROR_NOT_SUPPORTED The requested parameters are not supported by the SoftDevice. - * @retval ::NRF_ERROR_RESOURCES The requested parameters can not be accommodated. Inspect - * p_dl_limitation so see where the limitation is. - * @retval ::NRF_ERROR_BUSY Peer has already initiated a Data Length Update Procedure. Process the - * pending @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST event to respond. - */ -SVCALL(SD_BLE_GAP_DATA_LENGTH_UPDATE, uint32_t, sd_ble_gap_data_length_update(uint16_t conn_handle, ble_gap_data_length_params_t const *p_dl_params, ble_gap_data_length_limitation_t *p_dl_limitation)); - - - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // BLE_GAP_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gatt.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gatt.h deleted file mode 100644 index 4e054cf5c32..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gatt.h +++ /dev/null @@ -1,223 +0,0 @@ -/* - * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_GATT Generic Attribute Profile (GATT) Common - @{ - @brief Common definitions and prototypes for the GATT interfaces. - */ - -#ifndef BLE_GATT_H__ -#define BLE_GATT_H__ - -#include "ble_types.h" -#include "ble_ranges.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_GATT_DEFINES Defines - * @{ */ - -/** @brief Default ATT MTU, in bytes. */ -#define BLE_GATT_ATT_MTU_DEFAULT 23 - -/**@brief Invalid Attribute Handle. */ -#define BLE_GATT_HANDLE_INVALID 0x0000 - -/**@brief First Attribute Handle. */ -#define BLE_GATT_HANDLE_START 0x0001 - -/**@brief Last Attribute Handle. */ -#define BLE_GATT_HANDLE_END 0xFFFF - -/** @defgroup BLE_GATT_TIMEOUT_SOURCES GATT Timeout sources - * @{ */ -#define BLE_GATT_TIMEOUT_SRC_PROTOCOL 0x00 /**< ATT Protocol timeout. */ -/** @} */ - -/** @defgroup BLE_GATT_WRITE_OPS GATT Write operations - * @{ */ -#define BLE_GATT_OP_INVALID 0x00 /**< Invalid Operation. */ -#define BLE_GATT_OP_WRITE_REQ 0x01 /**< Write Request. */ -#define BLE_GATT_OP_WRITE_CMD 0x02 /**< Write Command. */ -#define BLE_GATT_OP_SIGN_WRITE_CMD 0x03 /**< Signed Write Command. */ -#define BLE_GATT_OP_PREP_WRITE_REQ 0x04 /**< Prepare Write Request. */ -#define BLE_GATT_OP_EXEC_WRITE_REQ 0x05 /**< Execute Write Request. */ -/** @} */ - -/** @defgroup BLE_GATT_EXEC_WRITE_FLAGS GATT Execute Write flags - * @{ */ -#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_CANCEL 0x00 /**< Cancel prepared write. */ -#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_WRITE 0x01 /**< Execute prepared write. */ -/** @} */ - -/** @defgroup BLE_GATT_HVX_TYPES GATT Handle Value operations - * @{ */ -#define BLE_GATT_HVX_INVALID 0x00 /**< Invalid Operation. */ -#define BLE_GATT_HVX_NOTIFICATION 0x01 /**< Handle Value Notification. */ -#define BLE_GATT_HVX_INDICATION 0x02 /**< Handle Value Indication. */ -/** @} */ - -/** @defgroup BLE_GATT_STATUS_CODES GATT Status Codes - * @{ */ -#define BLE_GATT_STATUS_SUCCESS 0x0000 /**< Success. */ -#define BLE_GATT_STATUS_UNKNOWN 0x0001 /**< Unknown or not applicable status. */ -#define BLE_GATT_STATUS_ATTERR_INVALID 0x0100 /**< ATT Error: Invalid Error Code. */ -#define BLE_GATT_STATUS_ATTERR_INVALID_HANDLE 0x0101 /**< ATT Error: Invalid Attribute Handle. */ -#define BLE_GATT_STATUS_ATTERR_READ_NOT_PERMITTED 0x0102 /**< ATT Error: Read not permitted. */ -#define BLE_GATT_STATUS_ATTERR_WRITE_NOT_PERMITTED 0x0103 /**< ATT Error: Write not permitted. */ -#define BLE_GATT_STATUS_ATTERR_INVALID_PDU 0x0104 /**< ATT Error: Used in ATT as Invalid PDU. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHENTICATION 0x0105 /**< ATT Error: Authenticated link required. */ -#define BLE_GATT_STATUS_ATTERR_REQUEST_NOT_SUPPORTED 0x0106 /**< ATT Error: Used in ATT as Request Not Supported. */ -#define BLE_GATT_STATUS_ATTERR_INVALID_OFFSET 0x0107 /**< ATT Error: Offset specified was past the end of the attribute. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHORIZATION 0x0108 /**< ATT Error: Used in ATT as Insufficient Authorization. */ -#define BLE_GATT_STATUS_ATTERR_PREPARE_QUEUE_FULL 0x0109 /**< ATT Error: Used in ATT as Prepare Queue Full. */ -#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_FOUND 0x010A /**< ATT Error: Used in ATT as Attribute not found. */ -#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_LONG 0x010B /**< ATT Error: Attribute cannot be read or written using read/write blob requests. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_ENC_KEY_SIZE 0x010C /**< ATT Error: Encryption key size used is insufficient. */ -#define BLE_GATT_STATUS_ATTERR_INVALID_ATT_VAL_LENGTH 0x010D /**< ATT Error: Invalid value size. */ -#define BLE_GATT_STATUS_ATTERR_UNLIKELY_ERROR 0x010E /**< ATT Error: Very unlikely error. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_ENCRYPTION 0x010F /**< ATT Error: Encrypted link required. */ -#define BLE_GATT_STATUS_ATTERR_UNSUPPORTED_GROUP_TYPE 0x0110 /**< ATT Error: Attribute type is not a supported grouping attribute. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_RESOURCES 0x0111 /**< ATT Error: Encrypted link required. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_BEGIN 0x0112 /**< ATT Error: Reserved for Future Use range #1 begin. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_END 0x017F /**< ATT Error: Reserved for Future Use range #1 end. */ -#define BLE_GATT_STATUS_ATTERR_APP_BEGIN 0x0180 /**< ATT Error: Application range begin. */ -#define BLE_GATT_STATUS_ATTERR_APP_END 0x019F /**< ATT Error: Application range end. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_BEGIN 0x01A0 /**< ATT Error: Reserved for Future Use range #2 begin. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_END 0x01DF /**< ATT Error: Reserved for Future Use range #2 end. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_BEGIN 0x01E0 /**< ATT Error: Reserved for Future Use range #3 begin. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_END 0x01FC /**< ATT Error: Reserved for Future Use range #3 end. */ -#define BLE_GATT_STATUS_ATTERR_CPS_CCCD_CONFIG_ERROR 0x01FD /**< ATT Common Profile and Service Error: Client Characteristic Configuration Descriptor improperly configured. */ -#define BLE_GATT_STATUS_ATTERR_CPS_PROC_ALR_IN_PROG 0x01FE /**< ATT Common Profile and Service Error: Procedure Already in Progress. */ -#define BLE_GATT_STATUS_ATTERR_CPS_OUT_OF_RANGE 0x01FF /**< ATT Common Profile and Service Error: Out Of Range. */ -/** @} */ - - -/** @defgroup BLE_GATT_CPF_FORMATS Characteristic Presentation Formats - * @note Found at http://developer.bluetooth.org/gatt/descriptors/Pages/DescriptorViewer.aspx?u=org.bluetooth.descriptor.gatt.characteristic_presentation_format.xml - * @{ */ -#define BLE_GATT_CPF_FORMAT_RFU 0x00 /**< Reserved For Future Use. */ -#define BLE_GATT_CPF_FORMAT_BOOLEAN 0x01 /**< Boolean. */ -#define BLE_GATT_CPF_FORMAT_2BIT 0x02 /**< Unsigned 2-bit integer. */ -#define BLE_GATT_CPF_FORMAT_NIBBLE 0x03 /**< Unsigned 4-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT8 0x04 /**< Unsigned 8-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT12 0x05 /**< Unsigned 12-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT16 0x06 /**< Unsigned 16-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT24 0x07 /**< Unsigned 24-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT32 0x08 /**< Unsigned 32-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT48 0x09 /**< Unsigned 48-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT64 0x0A /**< Unsigned 64-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT128 0x0B /**< Unsigned 128-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT8 0x0C /**< Signed 2-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT12 0x0D /**< Signed 12-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT16 0x0E /**< Signed 16-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT24 0x0F /**< Signed 24-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT32 0x10 /**< Signed 32-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT48 0x11 /**< Signed 48-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT64 0x12 /**< Signed 64-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT128 0x13 /**< Signed 128-bit integer. */ -#define BLE_GATT_CPF_FORMAT_FLOAT32 0x14 /**< IEEE-754 32-bit floating point. */ -#define BLE_GATT_CPF_FORMAT_FLOAT64 0x15 /**< IEEE-754 64-bit floating point. */ -#define BLE_GATT_CPF_FORMAT_SFLOAT 0x16 /**< IEEE-11073 16-bit SFLOAT. */ -#define BLE_GATT_CPF_FORMAT_FLOAT 0x17 /**< IEEE-11073 32-bit FLOAT. */ -#define BLE_GATT_CPF_FORMAT_DUINT16 0x18 /**< IEEE-20601 format. */ -#define BLE_GATT_CPF_FORMAT_UTF8S 0x19 /**< UTF-8 string. */ -#define BLE_GATT_CPF_FORMAT_UTF16S 0x1A /**< UTF-16 string. */ -#define BLE_GATT_CPF_FORMAT_STRUCT 0x1B /**< Opaque Structure. */ -/** @} */ - -/** @defgroup BLE_GATT_CPF_NAMESPACES GATT Bluetooth Namespaces - * @{ - */ -#define BLE_GATT_CPF_NAMESPACE_BTSIG 0x01 /**< Bluetooth SIG defined Namespace. */ -#define BLE_GATT_CPF_NAMESPACE_DESCRIPTION_UNKNOWN 0x0000 /**< Namespace Description Unknown. */ -/** @} */ - -/** @} */ - -/** @addtogroup BLE_GATT_STRUCTURES Structures - * @{ */ - -/** - * @brief BLE GATT connection configuration parameters, set with @ref sd_ble_cfg_set. - * - * @retval NRF_ERROR_INVALID_PARAM att_mtu is smaller than @ref BLE_GATT_ATT_MTU_DEFAULT. - */ -typedef struct -{ - uint16_t att_mtu; /**< Maximum size of ATT packet the SoftDevice can send or receive. - The default and minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. - @mscs - @mmsc{@ref BLE_GATTC_MTU_EXCHANGE} - @mmsc{@ref BLE_GATTS_MTU_EXCHANGE} - @endmscs - */ -} ble_gatt_conn_cfg_t; - -/**@brief GATT Characteristic Properties. */ -typedef struct -{ - /* Standard properties */ - uint8_t broadcast :1; /**< Broadcasting of the value permitted. */ - uint8_t read :1; /**< Reading the value permitted. */ - uint8_t write_wo_resp :1; /**< Writing the value with Write Command permitted. */ - uint8_t write :1; /**< Writing the value with Write Request permitted. */ - uint8_t notify :1; /**< Notification of the value permitted. */ - uint8_t indicate :1; /**< Indications of the value permitted. */ - uint8_t auth_signed_wr :1; /**< Writing the value with Signed Write Command permitted. */ -} ble_gatt_char_props_t; - -/**@brief GATT Characteristic Extended Properties. */ -typedef struct -{ - /* Extended properties */ - uint8_t reliable_wr :1; /**< Writing the value with Queued Write operations permitted. */ - uint8_t wr_aux :1; /**< Writing the Characteristic User Description descriptor permitted. */ -} ble_gatt_char_ext_props_t; - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // BLE_GATT_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gattc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gattc.h deleted file mode 100644 index 191f3a85ea6..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gattc.h +++ /dev/null @@ -1,702 +0,0 @@ -/* - * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_GATTC Generic Attribute Profile (GATT) Client - @{ - @brief Definitions and prototypes for the GATT Client interface. - */ - -#ifndef BLE_GATTC_H__ -#define BLE_GATTC_H__ - -#include "ble_gatt.h" -#include "ble_types.h" -#include "ble_ranges.h" -#include "nrf_svc.h" -#include "nrf_error.h" -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_GATTC_ENUMERATIONS Enumerations - * @{ */ - -/**@brief GATTC API SVC numbers. */ -enum BLE_GATTC_SVCS -{ - SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER = BLE_GATTC_SVC_BASE, /**< Primary Service Discovery. */ - SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, /**< Relationship Discovery. */ - SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, /**< Characteristic Discovery. */ - SD_BLE_GATTC_DESCRIPTORS_DISCOVER, /**< Characteristic Descriptor Discovery. */ - SD_BLE_GATTC_ATTR_INFO_DISCOVER, /**< Attribute Information Discovery. */ - SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, /**< Read Characteristic Value by UUID. */ - SD_BLE_GATTC_READ, /**< Generic read. */ - SD_BLE_GATTC_CHAR_VALUES_READ, /**< Read multiple Characteristic Values. */ - SD_BLE_GATTC_WRITE, /**< Generic write. */ - SD_BLE_GATTC_HV_CONFIRM, /**< Handle Value Confirmation. */ - SD_BLE_GATTC_EXCHANGE_MTU_REQUEST, /**< Exchange MTU Request. */ -}; - -/** - * @brief GATT Client Event IDs. - */ -enum BLE_GATTC_EVTS -{ - BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP = BLE_GATTC_EVT_BASE, /**< Primary Service Discovery Response event. \n See @ref ble_gattc_evt_prim_srvc_disc_rsp_t. */ - BLE_GATTC_EVT_REL_DISC_RSP, /**< Relationship Discovery Response event. \n See @ref ble_gattc_evt_rel_disc_rsp_t. */ - BLE_GATTC_EVT_CHAR_DISC_RSP, /**< Characteristic Discovery Response event. \n See @ref ble_gattc_evt_char_disc_rsp_t. */ - BLE_GATTC_EVT_DESC_DISC_RSP, /**< Descriptor Discovery Response event. \n See @ref ble_gattc_evt_desc_disc_rsp_t. */ - BLE_GATTC_EVT_ATTR_INFO_DISC_RSP, /**< Attribute Information Response event. \n See @ref ble_gattc_evt_attr_info_disc_rsp_t. */ - BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP, /**< Read By UUID Response event. \n See @ref ble_gattc_evt_char_val_by_uuid_read_rsp_t. */ - BLE_GATTC_EVT_READ_RSP, /**< Read Response event. \n See @ref ble_gattc_evt_read_rsp_t. */ - BLE_GATTC_EVT_CHAR_VALS_READ_RSP, /**< Read multiple Response event. \n See @ref ble_gattc_evt_char_vals_read_rsp_t. */ - BLE_GATTC_EVT_WRITE_RSP, /**< Write Response event. \n See @ref ble_gattc_evt_write_rsp_t. */ - BLE_GATTC_EVT_HVX, /**< Handle Value Notification or Indication event. \n Confirm indication with @ref sd_ble_gattc_hv_confirm. \n See @ref ble_gattc_evt_hvx_t. */ - BLE_GATTC_EVT_EXCHANGE_MTU_RSP, /**< Exchange MTU Response event. \n See @ref ble_gattc_evt_exchange_mtu_rsp_t. */ - BLE_GATTC_EVT_TIMEOUT, /**< Timeout event. \n See @ref ble_gattc_evt_timeout_t. */ - BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE /**< Write without Response transmission complete. \n See @ref ble_gattc_evt_write_cmd_tx_complete_t. */ -}; - -/** @} */ - -/** @addtogroup BLE_GATTC_DEFINES Defines - * @{ */ - -/** @defgroup BLE_ERRORS_GATTC SVC return values specific to GATTC - * @{ */ -#define BLE_ERROR_GATTC_PROC_NOT_PERMITTED (NRF_GATTC_ERR_BASE + 0x000) /**< Procedure not Permitted. */ -/** @} */ - -/** @defgroup BLE_GATTC_ATTR_INFO_FORMAT Attribute Information Formats - * @{ */ -#define BLE_GATTC_ATTR_INFO_FORMAT_16BIT 1 /**< 16-bit Attribute Information Format. */ -#define BLE_GATTC_ATTR_INFO_FORMAT_128BIT 2 /**< 128-bit Attribute Information Format. */ -/** @} */ - -/** @defgroup BLE_GATTC_DEFAULTS GATT Client defaults - * @{ */ -#define BLE_GATTC_WRITE_CMD_TX_QUEUE_SIZE_DEFAULT 1 /**< Default number of Write without Response that can be queued for transmission. */ -/** @} */ - -/** @} */ - -/** @addtogroup BLE_GATTC_STRUCTURES Structures - * @{ */ - -/** - * @brief BLE GATTC connection configuration parameters, set with @ref sd_ble_cfg_set. - */ -typedef struct -{ - uint8_t write_cmd_tx_queue_size; /**< The guaranteed minimum number of Write without Response that can be queued for transmission. - The default value is @ref BLE_GATTC_WRITE_CMD_TX_QUEUE_SIZE_DEFAULT */ -} ble_gattc_conn_cfg_t; - -/**@brief Operation Handle Range. */ -typedef struct -{ - uint16_t start_handle; /**< Start Handle. */ - uint16_t end_handle; /**< End Handle. */ -} ble_gattc_handle_range_t; - - -/**@brief GATT service. */ -typedef struct -{ - ble_uuid_t uuid; /**< Service UUID. */ - ble_gattc_handle_range_t handle_range; /**< Service Handle Range. */ -} ble_gattc_service_t; - - -/**@brief GATT include. */ -typedef struct -{ - uint16_t handle; /**< Include Handle. */ - ble_gattc_service_t included_srvc; /**< Handle of the included service. */ -} ble_gattc_include_t; - - -/**@brief GATT characteristic. */ -typedef struct -{ - ble_uuid_t uuid; /**< Characteristic UUID. */ - ble_gatt_char_props_t char_props; /**< Characteristic Properties. */ - uint8_t char_ext_props : 1; /**< Extended properties present. */ - uint16_t handle_decl; /**< Handle of the Characteristic Declaration. */ - uint16_t handle_value; /**< Handle of the Characteristic Value. */ -} ble_gattc_char_t; - - -/**@brief GATT descriptor. */ -typedef struct -{ - uint16_t handle; /**< Descriptor Handle. */ - ble_uuid_t uuid; /**< Descriptor UUID. */ -} ble_gattc_desc_t; - - -/**@brief Write Parameters. */ -typedef struct -{ - uint8_t write_op; /**< Write Operation to be performed, see @ref BLE_GATT_WRITE_OPS. */ - uint8_t flags; /**< Flags, see @ref BLE_GATT_EXEC_WRITE_FLAGS. */ - uint16_t handle; /**< Handle to the attribute to be written. */ - uint16_t offset; /**< Offset in bytes. @note For WRITE_CMD and WRITE_REQ, offset must be 0. */ - uint16_t len; /**< Length of data in bytes. */ - uint8_t const *p_value; /**< Pointer to the value data. */ -} ble_gattc_write_params_t; - -/**@brief Attribute Information for 16-bit Attribute UUID. */ -typedef struct -{ - uint16_t handle; /**< Attribute handle. */ - ble_uuid_t uuid; /**< 16-bit Attribute UUID. */ -} ble_gattc_attr_info16_t; - -/**@brief Attribute Information for 128-bit Attribute UUID. */ -typedef struct -{ - uint16_t handle; /**< Attribute handle. */ - ble_uuid128_t uuid; /**< 128-bit Attribute UUID. */ -} ble_gattc_attr_info128_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Service count. */ - ble_gattc_service_t services[1]; /**< Service data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_prim_srvc_disc_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_REL_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Include count. */ - ble_gattc_include_t includes[1]; /**< Include data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_rel_disc_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Characteristic count. */ - ble_gattc_char_t chars[1]; /**< Characteristic data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_char_disc_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_DESC_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Descriptor count. */ - ble_gattc_desc_t descs[1]; /**< Descriptor data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_desc_disc_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_ATTR_INFO_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Attribute count. */ - uint8_t format; /**< Attribute information format, see @ref BLE_GATTC_ATTR_INFO_FORMAT. */ - union { - ble_gattc_attr_info16_t attr_info16[1]; /**< Attribute information for 16-bit Attribute UUID. - @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ - ble_gattc_attr_info128_t attr_info128[1]; /**< Attribute information for 128-bit Attribute UUID. - @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ - } info; /**< Attribute information union. */ -} ble_gattc_evt_attr_info_disc_rsp_t; - -/**@brief GATT read by UUID handle value pair. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - uint8_t *p_value; /**< Pointer to the Attribute Value, length is available in @ref ble_gattc_evt_char_val_by_uuid_read_rsp_t::value_len. */ -} ble_gattc_handle_value_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP. */ -typedef struct -{ - uint16_t count; /**< Handle-Value Pair Count. */ - uint16_t value_len; /**< Length of the value in Handle-Value(s) list. */ - uint8_t handle_value[1]; /**< Handle-Value(s) list. To iterate through the list use @ref sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter. - @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_char_val_by_uuid_read_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_READ_RSP. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - uint16_t offset; /**< Offset of the attribute data. */ - uint16_t len; /**< Attribute data length. */ - uint8_t data[1]; /**< Attribute data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_read_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_VALS_READ_RSP. */ -typedef struct -{ - uint16_t len; /**< Concatenated Attribute values length. */ - uint8_t values[1]; /**< Attribute values. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_char_vals_read_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_WRITE_RSP. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - uint8_t write_op; /**< Type of write operation, see @ref BLE_GATT_WRITE_OPS. */ - uint16_t offset; /**< Data offset. */ - uint16_t len; /**< Data length. */ - uint8_t data[1]; /**< Data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_write_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_HVX. */ -typedef struct -{ - uint16_t handle; /**< Handle to which the HVx operation applies. */ - uint8_t type; /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */ - uint16_t len; /**< Attribute data length. */ - uint8_t data[1]; /**< Attribute data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_hvx_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP. */ -typedef struct -{ - uint16_t server_rx_mtu; /**< Server RX MTU size. */ -} ble_gattc_evt_exchange_mtu_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_TIMEOUT. */ -typedef struct -{ - uint8_t src; /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */ -} ble_gattc_evt_timeout_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE. */ -typedef struct -{ - uint8_t count; /**< Number of write without response transmissions completed. */ -} ble_gattc_evt_write_cmd_tx_complete_t; - -/**@brief GATTC event structure. */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle on which event occurred. */ - uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ - uint16_t error_handle; /**< In case of error: The handle causing the error. In all other cases @ref BLE_GATT_HANDLE_INVALID. */ - union - { - ble_gattc_evt_prim_srvc_disc_rsp_t prim_srvc_disc_rsp; /**< Primary Service Discovery Response Event Parameters. */ - ble_gattc_evt_rel_disc_rsp_t rel_disc_rsp; /**< Relationship Discovery Response Event Parameters. */ - ble_gattc_evt_char_disc_rsp_t char_disc_rsp; /**< Characteristic Discovery Response Event Parameters. */ - ble_gattc_evt_desc_disc_rsp_t desc_disc_rsp; /**< Descriptor Discovery Response Event Parameters. */ - ble_gattc_evt_char_val_by_uuid_read_rsp_t char_val_by_uuid_read_rsp; /**< Characteristic Value Read by UUID Response Event Parameters. */ - ble_gattc_evt_read_rsp_t read_rsp; /**< Read Response Event Parameters. */ - ble_gattc_evt_char_vals_read_rsp_t char_vals_read_rsp; /**< Characteristic Values Read Response Event Parameters. */ - ble_gattc_evt_write_rsp_t write_rsp; /**< Write Response Event Parameters. */ - ble_gattc_evt_hvx_t hvx; /**< Handle Value Notification/Indication Event Parameters. */ - ble_gattc_evt_exchange_mtu_rsp_t exchange_mtu_rsp; /**< Exchange MTU Response Event Parameters. */ - ble_gattc_evt_timeout_t timeout; /**< Timeout Event Parameters. */ - ble_gattc_evt_attr_info_disc_rsp_t attr_info_disc_rsp; /**< Attribute Information Discovery Event Parameters. */ - ble_gattc_evt_write_cmd_tx_complete_t write_cmd_tx_complete; /**< Write without Response transmission complete Event Parameters. */ - } params; /**< Event Parameters. @note Only valid if @ref gatt_status == @ref BLE_GATT_STATUS_SUCCESS. */ -} ble_gattc_evt_t; -/** @} */ - -/** @addtogroup BLE_GATTC_FUNCTIONS Functions - * @{ */ - -/**@brief Initiate or continue a GATT Primary Service Discovery procedure. - * - * @details This function initiates or resumes a Primary Service discovery procedure, starting from the supplied handle. - * If the last service has not been reached, this function must be called again with an updated start handle value to continue the search. - * - * @note If any of the discovered services have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with - * type @ref BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event. - * - * @events - * @event{@ref BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_PRIM_SRVC_DISC_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] start_handle Handle to start searching from. - * @param[in] p_srvc_uuid Pointer to the service UUID to be found. If it is NULL, all primary services will be returned. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Primary Service Discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER, uint32_t, sd_ble_gattc_primary_services_discover(uint16_t conn_handle, uint16_t start_handle, ble_uuid_t const *p_srvc_uuid)); - - -/**@brief Initiate or continue a GATT Relationship Discovery procedure. - * - * @details This function initiates or resumes the Find Included Services sub-procedure. If the last included service has not been reached, - * this must be called again with an updated handle range to continue the search. - * - * @events - * @event{@ref BLE_GATTC_EVT_REL_DISC_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_REL_DISC_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Relationship Discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, uint32_t, sd_ble_gattc_relationships_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); - - -/**@brief Initiate or continue a GATT Characteristic Discovery procedure. - * - * @details This function initiates or resumes a Characteristic discovery procedure. If the last Characteristic has not been reached, - * this must be called again with an updated handle range to continue the discovery. - * - * @note If any of the discovered characteristics have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with - * type @ref BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event. - * - * @events - * @event{@ref BLE_GATTC_EVT_CHAR_DISC_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_CHAR_DISC_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Characteristic Discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, uint32_t, sd_ble_gattc_characteristics_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); - - -/**@brief Initiate or continue a GATT Characteristic Descriptor Discovery procedure. - * - * @details This function initiates or resumes a Characteristic Descriptor discovery procedure. If the last Descriptor has not been reached, - * this must be called again with an updated handle range to continue the discovery. - * - * @events - * @event{@ref BLE_GATTC_EVT_DESC_DISC_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_DESC_DISC_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handle_range A pointer to the range of handles of the Characteristic to perform this procedure on. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Descriptor Discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_DESCRIPTORS_DISCOVER, uint32_t, sd_ble_gattc_descriptors_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); - - -/**@brief Initiate or continue a GATT Read using Characteristic UUID procedure. - * - * @details This function initiates or resumes a Read using Characteristic UUID procedure. If the last Characteristic has not been reached, - * this must be called again with an updated handle range to continue the discovery. - * - * @events - * @event{@ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_READ_UUID_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_uuid Pointer to a Characteristic value UUID to read. - * @param[in] p_handle_range A pointer to the range of handles to perform this procedure on. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Read using Characteristic UUID procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, uint32_t, sd_ble_gattc_char_value_by_uuid_read(uint16_t conn_handle, ble_uuid_t const *p_uuid, ble_gattc_handle_range_t const *p_handle_range)); - - -/**@brief Initiate or continue a GATT Read (Long) Characteristic or Descriptor procedure. - * - * @details This function initiates or resumes a GATT Read (Long) Characteristic or Descriptor procedure. If the Characteristic or Descriptor - * to be read is longer than ATT_MTU - 1, this function must be called multiple times with appropriate offset to read the - * complete value. - * - * @events - * @event{@ref BLE_GATTC_EVT_READ_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_VALUE_READ_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] handle The handle of the attribute to be read. - * @param[in] offset Offset into the attribute value to be read. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Read (Long) procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_READ, uint32_t, sd_ble_gattc_read(uint16_t conn_handle, uint16_t handle, uint16_t offset)); - - -/**@brief Initiate a GATT Read Multiple Characteristic Values procedure. - * - * @details This function initiates a GATT Read Multiple Characteristic Values procedure. - * - * @events - * @event{@ref BLE_GATTC_EVT_CHAR_VALS_READ_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_READ_MULT_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handles A pointer to the handle(s) of the attribute(s) to be read. - * @param[in] handle_count The number of handles in p_handles. - * - * @retval ::NRF_SUCCESS Successfully started the Read Multiple Characteristic Values procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_CHAR_VALUES_READ, uint32_t, sd_ble_gattc_char_values_read(uint16_t conn_handle, uint16_t const *p_handles, uint16_t handle_count)); - - -/**@brief Perform a Write (Characteristic Value or Descriptor, with or without response, signed or not, long or reliable) procedure. - * - * @details This function can perform all write procedures described in GATT. - * - * @note Only one write with response procedure can be ongoing per connection at a time. - * If the application tries to write with response while another write with response procedure is ongoing, - * the function call will return @ref NRF_ERROR_BUSY. - * A @ref BLE_GATTC_EVT_WRITE_RSP event will be issued as soon as the write response arrives from the peer. - * - * @note The number of Write without Response that can be queued is configured by @ref ble_gattc_conn_cfg_t::write_cmd_tx_queue_size - * When the queue is full, the function call will return @ref NRF_ERROR_RESOURCES. - * A @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event will be issued as soon as the transmission of the write without response is complete. - * - * @note The application can keep track of the available queue element count for writes without responses by following the procedure below: - * - Store initial queue element count in a variable. - * - Decrement the variable, which stores the currently available queue element count, by one when a call to this function returns @ref NRF_SUCCESS. - * - Increment the variable, which stores the current available queue element count, by the count variable in @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event. - * - * @events - * @event{@ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE, Write without response transmission complete.} - * @event{@ref BLE_GATTC_EVT_WRITE_RSP, Write response received from the peer.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_VALUE_WRITE_WITHOUT_RESP_MSC} - * @mmsc{@ref BLE_GATTC_VALUE_WRITE_MSC} - * @mmsc{@ref BLE_GATTC_VALUE_LONG_WRITE_MSC} - * @mmsc{@ref BLE_GATTC_VALUE_RELIABLE_WRITE_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_write_params A pointer to a write parameters structure. - * - * @retval ::NRF_SUCCESS Successfully started the Write procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. - * @retval ::NRF_ERROR_BUSY For write with response, procedure already in progress. Wait for a @ref BLE_GATTC_EVT_WRITE_RSP event and retry. - * @retval ::NRF_ERROR_RESOURCES Too many writes without responses queued. - * Wait for a @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event and retry. - */ -SVCALL(SD_BLE_GATTC_WRITE, uint32_t, sd_ble_gattc_write(uint16_t conn_handle, ble_gattc_write_params_t const *p_write_params)); - - -/**@brief Send a Handle Value Confirmation to the GATT Server. - * - * @mscs - * @mmsc{@ref BLE_GATTC_HVI_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] handle The handle of the attribute in the indication. - * - * @retval ::NRF_SUCCESS Successfully queued the Handle Value Confirmation for transmission. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no Indication pending to be confirmed. - * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle. - */ -SVCALL(SD_BLE_GATTC_HV_CONFIRM, uint32_t, sd_ble_gattc_hv_confirm(uint16_t conn_handle, uint16_t handle)); - -/**@brief Discovers information about a range of attributes on a GATT server. - * - * @events - * @event{@ref BLE_GATTC_EVT_ATTR_INFO_DISC_RSP, Generated when information about a range of attributes has been received.} - * @endevents - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handle_range The range of handles to request information about. - * - * @retval ::NRF_SUCCESS Successfully started an attribute information discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid connection state - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_ATTR_INFO_DISCOVER, uint32_t, sd_ble_gattc_attr_info_discover(uint16_t conn_handle, ble_gattc_handle_range_t const * p_handle_range)); - -/**@brief Start an ATT_MTU exchange by sending an Exchange MTU Request to the server. - * - * @details The SoftDevice sets ATT_MTU to the minimum of: - * - The Client RX MTU value, and - * - The Server RX MTU value from @ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP. - * - * However, the SoftDevice never sets ATT_MTU lower than @ref BLE_GATT_ATT_MTU_DEFAULT. - * - * @events - * @event{@ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_MTU_EXCHANGE} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] client_rx_mtu Client RX MTU size. - * - The minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. - * - The maximum value is @ref ble_gatt_conn_cfg_t::att_mtu in the connection configuration - used for this connection. - * - The value must be equal to Server RX MTU size given in @ref sd_ble_gatts_exchange_mtu_reply - * if an ATT_MTU exchange has already been performed in the other direction. - * - * @retval ::NRF_SUCCESS Successfully sent request to the server. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid connection state or an ATT_MTU exchange was already requested once. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid Client RX MTU size supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_EXCHANGE_MTU_REQUEST, uint32_t, sd_ble_gattc_exchange_mtu_request(uint16_t conn_handle, uint16_t client_rx_mtu)); - -/**@brief Iterate through Handle-Value(s) list in @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP event. - * - * @param[in] p_gattc_evt Pointer to event buffer containing @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP event. - * @note If the buffer contains different event, behavior is undefined. - * @param[in,out] p_iter Iterator, points to @ref ble_gattc_handle_value_t structure that will be filled in with - * the next Handle-Value pair in each iteration. If the function returns other than - * @ref NRF_SUCCESS, it will not be changed. - * - To start iteration, initialize the structure to zero. - * - To continue, pass the value from previous iteration. - * - * \code - * ble_gattc_handle_value_t iter; - * memset(&iter, 0, sizeof(ble_gattc_handle_value_t)); - * while (sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(&ble_evt.evt.gattc_evt, &iter) == NRF_SUCCESS) - * { - * app_handle = iter.handle; - * memcpy(app_value, iter.p_value, ble_evt.evt.gattc_evt.params.char_val_by_uuid_read_rsp.value_len); - * } - * \endcode - * - * @retval ::NRF_SUCCESS Successfully retrieved the next Handle-Value pair. - * @retval ::NRF_ERROR_NOT_FOUND No more Handle-Value pairs available in the list. - */ -__STATIC_INLINE uint32_t sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(ble_gattc_evt_t *p_gattc_evt, ble_gattc_handle_value_t *p_iter); - -/** @} */ - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE uint32_t sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(ble_gattc_evt_t *p_gattc_evt, ble_gattc_handle_value_t *p_iter) -{ - uint32_t value_len = p_gattc_evt->params.char_val_by_uuid_read_rsp.value_len; - uint8_t *p_first = p_gattc_evt->params.char_val_by_uuid_read_rsp.handle_value; - uint8_t *p_next = p_iter->p_value ? p_iter->p_value + value_len : p_first; - - if ((p_next - p_first) / (sizeof(uint16_t) + value_len) < p_gattc_evt->params.char_val_by_uuid_read_rsp.count) - { - p_iter->handle = (uint16_t)p_next[1] << 8 | p_next[0]; - p_iter->p_value = p_next + sizeof(uint16_t); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_NOT_FOUND; - } -} - -#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ - -#ifdef __cplusplus -} -#endif -#endif /* BLE_GATTC_H__ */ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gatts.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gatts.h deleted file mode 100644 index 5e8615c05d0..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/ble_gatts.h +++ /dev/null @@ -1,835 +0,0 @@ -/* - * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_GATTS Generic Attribute Profile (GATT) Server - @{ - @brief Definitions and prototypes for the GATTS interface. - */ - -#ifndef BLE_GATTS_H__ -#define BLE_GATTS_H__ - -#include "ble_types.h" -#include "ble_ranges.h" -#include "ble_l2cap.h" -#include "ble_gap.h" -#include "ble_gatt.h" -#include "nrf_svc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_GATTS_ENUMERATIONS Enumerations - * @{ */ - -/** - * @brief GATTS API SVC numbers. - */ -enum BLE_GATTS_SVCS -{ - SD_BLE_GATTS_SERVICE_ADD = BLE_GATTS_SVC_BASE, /**< Add a service. */ - SD_BLE_GATTS_INCLUDE_ADD, /**< Add an included service. */ - SD_BLE_GATTS_CHARACTERISTIC_ADD, /**< Add a characteristic. */ - SD_BLE_GATTS_DESCRIPTOR_ADD, /**< Add a generic attribute. */ - SD_BLE_GATTS_VALUE_SET, /**< Set an attribute value. */ - SD_BLE_GATTS_VALUE_GET, /**< Get an attribute value. */ - SD_BLE_GATTS_HVX, /**< Handle Value Notification or Indication. */ - SD_BLE_GATTS_SERVICE_CHANGED, /**< Perform a Service Changed Indication to one or more peers. */ - SD_BLE_GATTS_RW_AUTHORIZE_REPLY, /**< Reply to an authorization request for a read or write operation on one or more attributes. */ - SD_BLE_GATTS_SYS_ATTR_SET, /**< Set the persistent system attributes for a connection. */ - SD_BLE_GATTS_SYS_ATTR_GET, /**< Retrieve the persistent system attributes. */ - SD_BLE_GATTS_INITIAL_USER_HANDLE_GET, /**< Retrieve the first valid user handle. */ - SD_BLE_GATTS_ATTR_GET, /**< Retrieve the UUID and/or metadata of an attribute. */ - SD_BLE_GATTS_EXCHANGE_MTU_REPLY /**< Reply to Exchange MTU Request. */ -}; - -/** - * @brief GATT Server Event IDs. - */ -enum BLE_GATTS_EVTS -{ - BLE_GATTS_EVT_WRITE = BLE_GATTS_EVT_BASE, /**< Write operation performed. \n See @ref ble_gatts_evt_write_t. */ - BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST, /**< Read/Write Authorization request. \n Reply with @ref sd_ble_gatts_rw_authorize_reply. \n See @ref ble_gatts_evt_rw_authorize_request_t. */ - BLE_GATTS_EVT_SYS_ATTR_MISSING, /**< A persistent system attribute access is pending. \n Respond with @ref sd_ble_gatts_sys_attr_set. \n See @ref ble_gatts_evt_sys_attr_missing_t. */ - BLE_GATTS_EVT_HVC, /**< Handle Value Confirmation. \n See @ref ble_gatts_evt_hvc_t. */ - BLE_GATTS_EVT_SC_CONFIRM, /**< Service Changed Confirmation. \n No additional event structure applies. */ - BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST, /**< Exchange MTU Request. \n Reply with @ref sd_ble_gatts_exchange_mtu_reply. \n See @ref ble_gatts_evt_exchange_mtu_request_t. */ - BLE_GATTS_EVT_TIMEOUT, /**< Peer failed to respond to an ATT request in time. \n See @ref ble_gatts_evt_timeout_t. */ - BLE_GATTS_EVT_HVN_TX_COMPLETE /**< Handle Value Notification transmission complete. \n See @ref ble_gatts_evt_hvn_tx_complete_t. */ -}; - -/**@brief GATTS Configuration IDs. - * - * IDs that uniquely identify a GATTS configuration. - */ -enum BLE_GATTS_CFGS -{ - BLE_GATTS_CFG_SERVICE_CHANGED = BLE_GATTS_CFG_BASE, /**< Service changed configuration. */ - BLE_GATTS_CFG_ATTR_TAB_SIZE, /**< Attribute table size configuration. */ -}; - -/** @} */ - -/** @addtogroup BLE_GATTS_DEFINES Defines - * @{ */ - -/** @defgroup BLE_ERRORS_GATTS SVC return values specific to GATTS - * @{ */ -#define BLE_ERROR_GATTS_INVALID_ATTR_TYPE (NRF_GATTS_ERR_BASE + 0x000) /**< Invalid attribute type. */ -#define BLE_ERROR_GATTS_SYS_ATTR_MISSING (NRF_GATTS_ERR_BASE + 0x001) /**< System Attributes missing. */ -/** @} */ - -/** @defgroup BLE_GATTS_ATTR_LENS_MAX Maximum attribute lengths - * @{ */ -#define BLE_GATTS_FIX_ATTR_LEN_MAX (510) /**< Maximum length for fixed length Attribute Values. */ -#define BLE_GATTS_VAR_ATTR_LEN_MAX (512) /**< Maximum length for variable length Attribute Values. */ -/** @} */ - -/** @defgroup BLE_GATTS_SRVC_TYPES GATT Server Service Types - * @{ */ -#define BLE_GATTS_SRVC_TYPE_INVALID 0x00 /**< Invalid Service Type. */ -#define BLE_GATTS_SRVC_TYPE_PRIMARY 0x01 /**< Primary Service. */ -#define BLE_GATTS_SRVC_TYPE_SECONDARY 0x02 /**< Secondary Type. */ -/** @} */ - - -/** @defgroup BLE_GATTS_ATTR_TYPES GATT Server Attribute Types - * @{ */ -#define BLE_GATTS_ATTR_TYPE_INVALID 0x00 /**< Invalid Attribute Type. */ -#define BLE_GATTS_ATTR_TYPE_PRIM_SRVC_DECL 0x01 /**< Primary Service Declaration. */ -#define BLE_GATTS_ATTR_TYPE_SEC_SRVC_DECL 0x02 /**< Secondary Service Declaration. */ -#define BLE_GATTS_ATTR_TYPE_INC_DECL 0x03 /**< Include Declaration. */ -#define BLE_GATTS_ATTR_TYPE_CHAR_DECL 0x04 /**< Characteristic Declaration. */ -#define BLE_GATTS_ATTR_TYPE_CHAR_VAL 0x05 /**< Characteristic Value. */ -#define BLE_GATTS_ATTR_TYPE_DESC 0x06 /**< Descriptor. */ -#define BLE_GATTS_ATTR_TYPE_OTHER 0x07 /**< Other, non-GATT specific type. */ -/** @} */ - - -/** @defgroup BLE_GATTS_OPS GATT Server Operations - * @{ */ -#define BLE_GATTS_OP_INVALID 0x00 /**< Invalid Operation. */ -#define BLE_GATTS_OP_WRITE_REQ 0x01 /**< Write Request. */ -#define BLE_GATTS_OP_WRITE_CMD 0x02 /**< Write Command. */ -#define BLE_GATTS_OP_SIGN_WRITE_CMD 0x03 /**< Signed Write Command. */ -#define BLE_GATTS_OP_PREP_WRITE_REQ 0x04 /**< Prepare Write Request. */ -#define BLE_GATTS_OP_EXEC_WRITE_REQ_CANCEL 0x05 /**< Execute Write Request: Cancel all prepared writes. */ -#define BLE_GATTS_OP_EXEC_WRITE_REQ_NOW 0x06 /**< Execute Write Request: Immediately execute all prepared writes. */ -/** @} */ - -/** @defgroup BLE_GATTS_VLOCS GATT Value Locations - * @{ */ -#define BLE_GATTS_VLOC_INVALID 0x00 /**< Invalid Location. */ -#define BLE_GATTS_VLOC_STACK 0x01 /**< Attribute Value is located in stack memory, no user memory is required. */ -#define BLE_GATTS_VLOC_USER 0x02 /**< Attribute Value is located in user memory. This requires the user to maintain a valid buffer through the lifetime of the attribute, since the stack - will read and write directly to the memory using the pointer provided in the APIs. There are no alignment requirements for the buffer. */ -/** @} */ - -/** @defgroup BLE_GATTS_AUTHORIZE_TYPES GATT Server Authorization Types - * @{ */ -#define BLE_GATTS_AUTHORIZE_TYPE_INVALID 0x00 /**< Invalid Type. */ -#define BLE_GATTS_AUTHORIZE_TYPE_READ 0x01 /**< Authorize a Read Operation. */ -#define BLE_GATTS_AUTHORIZE_TYPE_WRITE 0x02 /**< Authorize a Write Request Operation. */ -/** @} */ - -/** @defgroup BLE_GATTS_SYS_ATTR_FLAGS System Attribute Flags - * @{ */ -#define BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS (1 << 0) /**< Restrict system attributes to system services only. */ -#define BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS (1 << 1) /**< Restrict system attributes to user services only. */ -/** @} */ - -/** @defgroup BLE_GATTS_SERVICE_CHANGED Service Changed Inclusion Values - * @{ - */ -#define BLE_GATTS_SERVICE_CHANGED_DEFAULT (1) /**< Default is to include the Service Changed characteristic in the Attribute Table. */ -/** @} */ - -/** @defgroup BLE_GATTS_ATTR_TAB_SIZE Attribute Table size - * @{ - */ -#define BLE_GATTS_ATTR_TAB_SIZE_MIN (248) /**< Minimum Attribute Table size */ -#define BLE_GATTS_ATTR_TAB_SIZE_DEFAULT (1408) /**< Default Attribute Table size. */ -/** @} */ - -/** @defgroup BLE_GATTS_DEFAULTS GATT Server defaults - * @{ - */ -#define BLE_GATTS_HVN_TX_QUEUE_SIZE_DEFAULT 1 /**< Default number of Handle Value Notifications that can be queued for transmission. */ -/** @} */ - -/** @} */ - -/** @addtogroup BLE_GATTS_STRUCTURES Structures - * @{ */ - -/** - * @brief BLE GATTS connection configuration parameters, set with @ref sd_ble_cfg_set. - */ -typedef struct -{ - uint8_t hvn_tx_queue_size; /**< Minimum guaranteed number of Handle Value Notifications that can be queued for transmission. - The default value is @ref BLE_GATTS_HVN_TX_QUEUE_SIZE_DEFAULT */ -} ble_gatts_conn_cfg_t; - -/**@brief Attribute metadata. */ -typedef struct -{ - ble_gap_conn_sec_mode_t read_perm; /**< Read permissions. */ - ble_gap_conn_sec_mode_t write_perm; /**< Write permissions. */ - uint8_t vlen :1; /**< Variable length attribute. */ - uint8_t vloc :2; /**< Value location, see @ref BLE_GATTS_VLOCS.*/ - uint8_t rd_auth :1; /**< Read authorization and value will be requested from the application on every read operation. */ - uint8_t wr_auth :1; /**< Write authorization will be requested from the application on every Write Request operation (but not Write Command). */ -} ble_gatts_attr_md_t; - - -/**@brief GATT Attribute. */ -typedef struct -{ - ble_uuid_t const *p_uuid; /**< Pointer to the attribute UUID. */ - ble_gatts_attr_md_t const *p_attr_md; /**< Pointer to the attribute metadata structure. */ - uint16_t init_len; /**< Initial attribute value length in bytes. */ - uint16_t init_offs; /**< Initial attribute value offset in bytes. If different from zero, the first init_offs bytes of the attribute value will be left uninitialized. */ - uint16_t max_len; /**< Maximum attribute value length in bytes, see @ref BLE_GATTS_ATTR_LENS_MAX for maximum values. */ - uint8_t *p_value; /**< Pointer to the attribute data. Please note that if the @ref BLE_GATTS_VLOC_USER value location is selected in the attribute metadata, this will have to point to a buffer - that remains valid through the lifetime of the attribute. This excludes usage of automatic variables that may go out of scope or any other temporary location. - The stack may access that memory directly without the application's knowledge. For writable characteristics, this value must not be a location in flash memory.*/ -} ble_gatts_attr_t; - -/**@brief GATT Attribute Value. */ -typedef struct -{ - uint16_t len; /**< Length in bytes to be written or read. Length in bytes written or read after successful return.*/ - uint16_t offset; /**< Attribute value offset. */ - uint8_t *p_value; /**< Pointer to where value is stored or will be stored. - If value is stored in user memory, only the attribute length is updated when p_value == NULL. - Set to NULL when reading to obtain the complete length of the attribute value */ -} ble_gatts_value_t; - - -/**@brief GATT Characteristic Presentation Format. */ -typedef struct -{ - uint8_t format; /**< Format of the value, see @ref BLE_GATT_CPF_FORMATS. */ - int8_t exponent; /**< Exponent for integer data types. */ - uint16_t unit; /**< Unit from Bluetooth Assigned Numbers. */ - uint8_t name_space; /**< Namespace from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */ - uint16_t desc; /**< Namespace description from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */ -} ble_gatts_char_pf_t; - - -/**@brief GATT Characteristic metadata. */ -typedef struct -{ - ble_gatt_char_props_t char_props; /**< Characteristic Properties. */ - ble_gatt_char_ext_props_t char_ext_props; /**< Characteristic Extended Properties. */ - uint8_t const *p_char_user_desc; /**< Pointer to a UTF-8 encoded string (non-NULL terminated), NULL if the descriptor is not required. */ - uint16_t char_user_desc_max_size; /**< The maximum size in bytes of the user description descriptor. */ - uint16_t char_user_desc_size; /**< The size of the user description, must be smaller or equal to char_user_desc_max_size. */ - ble_gatts_char_pf_t const *p_char_pf; /**< Pointer to a presentation format structure or NULL if the CPF descriptor is not required. */ - ble_gatts_attr_md_t const *p_user_desc_md; /**< Attribute metadata for the User Description descriptor, or NULL for default values. */ - ble_gatts_attr_md_t const *p_cccd_md; /**< Attribute metadata for the Client Characteristic Configuration Descriptor, or NULL for default values. */ - ble_gatts_attr_md_t const *p_sccd_md; /**< Attribute metadata for the Server Characteristic Configuration Descriptor, or NULL for default values. */ -} ble_gatts_char_md_t; - - -/**@brief GATT Characteristic Definition Handles. */ -typedef struct -{ - uint16_t value_handle; /**< Handle to the characteristic value. */ - uint16_t user_desc_handle; /**< Handle to the User Description descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ - uint16_t cccd_handle; /**< Handle to the Client Characteristic Configuration Descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ - uint16_t sccd_handle; /**< Handle to the Server Characteristic Configuration Descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ -} ble_gatts_char_handles_t; - - -/**@brief GATT HVx parameters. */ -typedef struct -{ - uint16_t handle; /**< Characteristic Value Handle. */ - uint8_t type; /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */ - uint16_t offset; /**< Offset within the attribute value. */ - uint16_t *p_len; /**< Length in bytes to be written, length in bytes written after successful return. */ - uint8_t const *p_data; /**< Actual data content, use NULL to use the current attribute value. */ -} ble_gatts_hvx_params_t; - -/**@brief GATT Authorization parameters. */ -typedef struct -{ - uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ - uint8_t update : 1; /**< If set, data supplied in p_data will be used to update the attribute value. - Please note that for @ref BLE_GATTS_AUTHORIZE_TYPE_WRITE operations this bit must always be set, - as the data to be written needs to be stored and later provided by the application. */ - uint16_t offset; /**< Offset of the attribute value being updated. */ - uint16_t len; /**< Length in bytes of the value in p_data pointer, see @ref BLE_GATTS_ATTR_LENS_MAX. */ - uint8_t const *p_data; /**< Pointer to new value used to update the attribute value. */ -} ble_gatts_authorize_params_t; - -/**@brief GATT Read or Write Authorize Reply parameters. */ -typedef struct -{ - uint8_t type; /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */ - union { - ble_gatts_authorize_params_t read; /**< Read authorization parameters. */ - ble_gatts_authorize_params_t write; /**< Write authorization parameters. */ - } params; /**< Reply Parameters. */ -} ble_gatts_rw_authorize_reply_params_t; - -/**@brief Service Changed Inclusion configuration parameters, set with @ref sd_ble_cfg_set. */ -typedef struct -{ - uint8_t service_changed : 1; /**< If 1, include the Service Changed characteristic in the Attribute Table. Default is @ref BLE_GATTS_SERVICE_CHANGED_DEFAULT. */ -} ble_gatts_cfg_service_changed_t; - -/**@brief Attribute table size configuration parameters, set with @ref sd_ble_cfg_set. - * - * @retval ::NRF_ERROR_INVALID_LENGTH One or more of the following is true: - * - The specified Attribute Table size is too small. - * The minimum acceptable size is defined by @ref BLE_GATTS_ATTR_TAB_SIZE_MIN. - * - The specified Attribute Table size is not a multiple of 4. - */ -typedef struct -{ - uint32_t attr_tab_size; /**< Attribute table size. Default is @ref BLE_GATTS_ATTR_TAB_SIZE_DEFAULT, minimum is @ref BLE_GATTS_ATTR_TAB_SIZE_MIN. */ -} ble_gatts_cfg_attr_tab_size_t; - -/**@brief Config structure for GATTS configurations. */ -typedef union -{ - ble_gatts_cfg_service_changed_t service_changed; /**< Include service changed characteristic, cfg_id is @ref BLE_GATTS_CFG_SERVICE_CHANGED. */ - ble_gatts_cfg_attr_tab_size_t attr_tab_size; /**< Attribute table size, cfg_id is @ref BLE_GATTS_CFG_ATTR_TAB_SIZE. */ -} ble_gatts_cfg_t; - - -/**@brief Event structure for @ref BLE_GATTS_EVT_WRITE. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - ble_uuid_t uuid; /**< Attribute UUID. */ - uint8_t op; /**< Type of write operation, see @ref BLE_GATTS_OPS. */ - uint8_t auth_required; /**< Writing operation deferred due to authorization requirement. Application may use @ref sd_ble_gatts_value_set to finalize the writing operation. */ - uint16_t offset; /**< Offset for the write operation. */ - uint16_t len; /**< Length of the received data. */ - uint8_t data[1]; /**< Received data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gatts_evt_write_t; - -/**@brief Event substructure for authorized read requests, see @ref ble_gatts_evt_rw_authorize_request_t. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - ble_uuid_t uuid; /**< Attribute UUID. */ - uint16_t offset; /**< Offset for the read operation. */ -} ble_gatts_evt_read_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST. */ -typedef struct -{ - uint8_t type; /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */ - union { - ble_gatts_evt_read_t read; /**< Attribute Read Parameters. */ - ble_gatts_evt_write_t write; /**< Attribute Write Parameters. */ - } request; /**< Request Parameters. */ -} ble_gatts_evt_rw_authorize_request_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_SYS_ATTR_MISSING. */ -typedef struct -{ - uint8_t hint; /**< Hint (currently unused). */ -} ble_gatts_evt_sys_attr_missing_t; - - -/**@brief Event structure for @ref BLE_GATTS_EVT_HVC. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ -} ble_gatts_evt_hvc_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST. */ -typedef struct -{ - uint16_t client_rx_mtu; /**< Client RX MTU size. */ -} ble_gatts_evt_exchange_mtu_request_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_TIMEOUT. */ -typedef struct -{ - uint8_t src; /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */ -} ble_gatts_evt_timeout_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_HVN_TX_COMPLETE. */ -typedef struct -{ - uint8_t count; /**< Number of notification transmissions completed. */ -} ble_gatts_evt_hvn_tx_complete_t; - -/**@brief GATTS event structure. */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle on which the event occurred. */ - union - { - ble_gatts_evt_write_t write; /**< Write Event Parameters. */ - ble_gatts_evt_rw_authorize_request_t authorize_request; /**< Read or Write Authorize Request Parameters. */ - ble_gatts_evt_sys_attr_missing_t sys_attr_missing; /**< System attributes missing. */ - ble_gatts_evt_hvc_t hvc; /**< Handle Value Confirmation Event Parameters. */ - ble_gatts_evt_exchange_mtu_request_t exchange_mtu_request; /**< Exchange MTU Request Event Parameters. */ - ble_gatts_evt_timeout_t timeout; /**< Timeout Event. */ - ble_gatts_evt_hvn_tx_complete_t hvn_tx_complete; /**< Handle Value Notification transmission complete Event Parameters. */ - } params; /**< Event Parameters. */ -} ble_gatts_evt_t; - -/** @} */ - -/** @addtogroup BLE_GATTS_FUNCTIONS Functions - * @{ */ - -/**@brief Add a service declaration to the Attribute Table. - * - * @note Secondary Services are only relevant in the context of the entity that references them, it is therefore forbidden to - * add a secondary service declaration that is not referenced by another service later in the Attribute Table. - * - * @mscs - * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} - * @endmscs - * - * @param[in] type Toggles between primary and secondary services, see @ref BLE_GATTS_SRVC_TYPES. - * @param[in] p_uuid Pointer to service UUID. - * @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored. - * - * @retval ::NRF_SUCCESS Successfully added a service declaration. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, Vendor Specific UUIDs need to be present in the table. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - */ -SVCALL(SD_BLE_GATTS_SERVICE_ADD, uint32_t, sd_ble_gatts_service_add(uint8_t type, ble_uuid_t const *p_uuid, uint16_t *p_handle)); - - -/**@brief Add an include declaration to the Attribute Table. - * - * @note It is currently only possible to add an include declaration to the last added service (i.e. only sequential population is supported at this time). - * - * @note The included service must already be present in the Attribute Table prior to this call. - * - * @mscs - * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} - * @endmscs - * - * @param[in] service_handle Handle of the service where the included service is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. - * @param[in] inc_srvc_handle Handle of the included service. - * @param[out] p_include_handle Pointer to a 16-bit word where the assigned handle will be stored. - * - * @retval ::NRF_SUCCESS Successfully added an include declaration. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, handle values need to match previously added services. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_NOT_SUPPORTED Feature is not supported, service_handle must be that of the last added service. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, self inclusions are not allowed. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. - */ -SVCALL(SD_BLE_GATTS_INCLUDE_ADD, uint32_t, sd_ble_gatts_include_add(uint16_t service_handle, uint16_t inc_srvc_handle, uint16_t *p_include_handle)); - - -/**@brief Add a characteristic declaration, a characteristic value declaration and optional characteristic descriptor declarations to the Attribute Table. - * - * @note It is currently only possible to add a characteristic to the last added service (i.e. only sequential population is supported at this time). - * - * @note Several restrictions apply to the parameters, such as matching permissions between the user description descriptor and the writable auxiliaries bits, - * readable (no security) and writable (selectable) CCCDs and SCCDs and valid presentation format values. - * - * @note If no metadata is provided for the optional descriptors, their permissions will be derived from the characteristic permissions. - * - * @mscs - * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} - * @endmscs - * - * @param[in] service_handle Handle of the service where the characteristic is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. - * @param[in] p_char_md Characteristic metadata. - * @param[in] p_attr_char_value Pointer to the attribute structure corresponding to the characteristic value. - * @param[out] p_handles Pointer to the structure where the assigned handles will be stored. - * - * @retval ::NRF_SUCCESS Successfully added a characteristic. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, service handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a service context is required. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. - */ -SVCALL(SD_BLE_GATTS_CHARACTERISTIC_ADD, uint32_t, sd_ble_gatts_characteristic_add(uint16_t service_handle, ble_gatts_char_md_t const *p_char_md, ble_gatts_attr_t const *p_attr_char_value, ble_gatts_char_handles_t *p_handles)); - - -/**@brief Add a descriptor to the Attribute Table. - * - * @note It is currently only possible to add a descriptor to the last added characteristic (i.e. only sequential population is supported at this time). - * - * @mscs - * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} - * @endmscs - * - * @param[in] char_handle Handle of the characteristic where the descriptor is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. - * @param[in] p_attr Pointer to the attribute structure. - * @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored. - * - * @retval ::NRF_SUCCESS Successfully added a descriptor. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, characteristic handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a characteristic context is required. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. - */ -SVCALL(SD_BLE_GATTS_DESCRIPTOR_ADD, uint32_t, sd_ble_gatts_descriptor_add(uint16_t char_handle, ble_gatts_attr_t const *p_attr, uint16_t *p_handle)); - -/**@brief Set the value of a given attribute. - * - * @note Values other than system attributes can be set at any time, regardless of whether any active connections exist. - * - * @mscs - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. Ignored if the value does not belong to a system attribute. - * @param[in] handle Attribute handle. - * @param[in,out] p_value Attribute value information. - * - * @retval ::NRF_SUCCESS Successfully set the value of the attribute. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden handle supplied, certain attributes are not modifiable by the application. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied on a system attribute. - */ -SVCALL(SD_BLE_GATTS_VALUE_SET, uint32_t, sd_ble_gatts_value_set(uint16_t conn_handle, uint16_t handle, ble_gatts_value_t *p_value)); - -/**@brief Get the value of a given attribute. - * - * @note If the attribute value is longer than the size of the supplied buffer, - * p_len will return the total attribute value length (excluding offset), - * and not the number of bytes actually returned in p_data. - * The application may use this information to allocate a suitable buffer size. - * - * @note When retrieving system attribute values with this function, the connection handle - * may refer to an already disconnected connection. Refer to the documentation of - * @ref sd_ble_gatts_sys_attr_get for further information. - * - * @param[in] conn_handle Connection handle. Ignored if the value does not belong to a system attribute. - * @param[in] handle Attribute handle. - * @param[in,out] p_value Attribute value information. - * - * @retval ::NRF_SUCCESS Successfully retrieved the value of the attribute. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid attribute offset supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied on a system attribute. - * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. - */ -SVCALL(SD_BLE_GATTS_VALUE_GET, uint32_t, sd_ble_gatts_value_get(uint16_t conn_handle, uint16_t handle, ble_gatts_value_t *p_value)); - -/**@brief Notify or Indicate an attribute value. - * - * @details This function checks for the relevant Client Characteristic Configuration descriptor value to verify that the relevant operation - * (notification or indication) has been enabled by the client. It is also able to update the attribute value before issuing the PDU, so that - * the application can atomically perform a value update and a server initiated transaction with a single API call. - * - * @note The local attribute value may be updated even if an outgoing packet is not sent to the peer due to an error during execution. - * The Attribute Table has been updated if one of the following error codes is returned: @ref NRF_ERROR_INVALID_STATE, @ref NRF_ERROR_BUSY, - * @ref NRF_ERROR_FORBIDDEN, @ref BLE_ERROR_GATTS_SYS_ATTR_MISSING and @ref NRF_ERROR_RESOURCES. - * The caller can check whether the value has been updated by looking at the contents of *(p_hvx_params->p_len). - * - * @note Only one indication procedure can be ongoing per connection at a time. - * If the application tries to indicate an attribute value while another indication procedure is ongoing, - * the function call will return @ref NRF_ERROR_BUSY. - * A @ref BLE_GATTS_EVT_HVC event will be issued as soon as the confirmation arrives from the peer. - * - * @note The number of Handle Value Notifications that can be queued is configured by @ref ble_gatts_conn_cfg_t::hvn_tx_queue_size - * When the queue is full, the function call will return @ref NRF_ERROR_RESOURCES. - * A @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event will be issued as soon as the transmission of the notification is complete. - * - * @note The application can keep track of the available queue element count for notifications by following the procedure below: - * - Store initial queue element count in a variable. - * - Decrement the variable, which stores the currently available queue element count, by one when a call to this function returns @ref NRF_SUCCESS. - * - Increment the variable, which stores the current available queue element count, by the count variable in @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event. - * - * @events - * @event{@ref BLE_GATTS_EVT_HVN_TX_COMPLETE, Notification transmission complete.} - * @event{@ref BLE_GATTS_EVT_HVC, Confirmation received from the peer.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC} - * @mmsc{@ref BLE_GATTS_HVN_MSC} - * @mmsc{@ref BLE_GATTS_HVI_MSC} - * @mmsc{@ref BLE_GATTS_HVX_DISABLED_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_hvx_params Pointer to an HVx parameters structure. If the p_data member contains a non-NULL pointer the attribute value will be updated with - * the contents pointed by it before sending the notification or indication. - * - * @retval ::NRF_SUCCESS Successfully queued a notification or indication for transmission, and optionally updated the attribute value. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE One or more of the following is true: - * - Invalid Connection State - * - Notifications and/or indications not enabled in the CCCD - * - An ATT_MTU exchange is ongoing - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied. Only attributes added directly by the application are available to notify and indicate. - * @retval ::BLE_ERROR_GATTS_INVALID_ATTR_TYPE Invalid attribute type(s) supplied, only characteristic values may be notified and indicated. - * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. - * @retval ::NRF_ERROR_FORBIDDEN The connection's current security level is lower than the one required by the write permissions of the CCCD associated with this characteristic. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. - * @retval ::NRF_ERROR_BUSY For @ref BLE_GATT_HVX_INDICATION Procedure already in progress. Wait for a @ref BLE_GATTS_EVT_HVC event and retry. - * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. - * @retval ::NRF_ERROR_RESOURCES Too many notifications queued. - * Wait for a @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event and retry. - */ -SVCALL(SD_BLE_GATTS_HVX, uint32_t, sd_ble_gatts_hvx(uint16_t conn_handle, ble_gatts_hvx_params_t const *p_hvx_params)); - -/**@brief Indicate the Service Changed attribute value. - * - * @details This call will send a Handle Value Indication to one or more peers connected to inform them that the Attribute - * Table layout has changed. As soon as the peer has confirmed the indication, a @ref BLE_GATTS_EVT_SC_CONFIRM event will - * be issued. - * - * @note Some of the restrictions and limitations that apply to @ref sd_ble_gatts_hvx also apply here. - * - * @events - * @event{@ref BLE_GATTS_EVT_SC_CONFIRM, Confirmation of attribute table change received from peer.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTS_SC_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] start_handle Start of affected attribute handle range. - * @param[in] end_handle End of affected attribute handle range. - * - * @retval ::NRF_SUCCESS Successfully queued the Service Changed indication for transmission. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_NOT_SUPPORTED Service Changed not enabled at initialization. See @ref - * sd_ble_cfg_set and @ref ble_gatts_cfg_service_changed_t. - * @retval ::NRF_ERROR_INVALID_STATE One or more of the following is true: - * - Invalid Connection State - * - Notifications and/or indications not enabled in the CCCD - * - An ATT_MTU exchange is ongoing - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied, handles must be in the range populated by the application. - * @retval ::NRF_ERROR_BUSY Procedure already in progress. - * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. - */ -SVCALL(SD_BLE_GATTS_SERVICE_CHANGED, uint32_t, sd_ble_gatts_service_changed(uint16_t conn_handle, uint16_t start_handle, uint16_t end_handle)); - -/**@brief Respond to a Read/Write authorization request. - * - * @note This call should only be used as a response to a @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST event issued to the application. - * - * @mscs - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} - * @mmsc{@ref BLE_GATTS_READ_REQ_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_WRITE_REQ_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_PEER_CANCEL_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_rw_authorize_reply_params Pointer to a structure with the attribute provided by the application. - * - * @note @ref ble_gatts_authorize_params_t::p_data is ignored when this function is used to respond - * to a @ref BLE_GATTS_AUTHORIZE_TYPE_READ event if @ref ble_gatts_authorize_params_t::update - * is set to 0. - * - * @retval ::NRF_SUCCESS Successfully queued a response to the peer, and in the case of a write operation, Attribute Table updated. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no authorization request pending. - * @retval ::NRF_ERROR_INVALID_PARAM Authorization op invalid, - * handle supplied does not match requested handle, - * or invalid data to be written provided by the application. - */ -SVCALL(SD_BLE_GATTS_RW_AUTHORIZE_REPLY, uint32_t, sd_ble_gatts_rw_authorize_reply(uint16_t conn_handle, ble_gatts_rw_authorize_reply_params_t const *p_rw_authorize_reply_params)); - - -/**@brief Update persistent system attribute information. - * - * @details Supply information about persistent system attributes to the stack, - * previously obtained using @ref sd_ble_gatts_sys_attr_get. - * This call is only allowed for active connections, and is usually - * made immediately after a connection is established with an known bonded device, - * often as a response to a @ref BLE_GATTS_EVT_SYS_ATTR_MISSING. - * - * p_sysattrs may point directly to the application's stored copy of the system attributes - * obtained using @ref sd_ble_gatts_sys_attr_get. - * If the pointer is NULL, the system attribute info is initialized, assuming that - * the application does not have any previously saved system attribute data for this device. - * - * @note The state of persistent system attributes is reset upon connection establishment and then remembered for its duration. - * - * @note If this call returns with an error code different from @ref NRF_SUCCESS, the storage of persistent system attributes may have been completed only partially. - * This means that the state of the attribute table is undefined, and the application should either provide a new set of attributes using this same call or - * reset the SoftDevice to return to a known state. - * - * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS is used with this function, only the system attributes included in system services will be modified. - * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS is used with this function, only the system attributes included in user services will be modified. - * - * @mscs - * @mmsc{@ref BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC} - * @mmsc{@ref BLE_GATTS_SYS_ATTRS_UNK_PEER_MSC} - * @mmsc{@ref BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_sys_attr_data Pointer to a saved copy of system attributes supplied to the stack, or NULL. - * @param[in] len Size of data pointed by p_sys_attr_data, in octets. - * @param[in] flags Optional additional flags, see @ref BLE_GATTS_SYS_ATTR_FLAGS - * - * @retval ::NRF_SUCCESS Successfully set the system attribute information. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid flags supplied. - * @retval ::NRF_ERROR_INVALID_DATA Invalid data supplied, the data should be exactly the same as retrieved with @ref sd_ble_gatts_sys_attr_get. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - */ -SVCALL(SD_BLE_GATTS_SYS_ATTR_SET, uint32_t, sd_ble_gatts_sys_attr_set(uint16_t conn_handle, uint8_t const *p_sys_attr_data, uint16_t len, uint32_t flags)); - - -/**@brief Retrieve persistent system attribute information from the stack. - * - * @details This call is used to retrieve information about values to be stored persistently by the application - * during the lifetime of a connection or after it has been terminated. When a new connection is established with the same bonded device, - * the system attribute information retrieved with this function should be restored using using @ref sd_ble_gatts_sys_attr_set. - * If retrieved after disconnection, the data should be read before a new connection established. The connection handle for - * the previous, now disconnected, connection will remain valid until a new one is created to allow this API call to refer to it. - * Connection handles belonging to active connections can be used as well, but care should be taken since the system attributes - * may be written to at any time by the peer during a connection's lifetime. - * - * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS is used with this function, only the system attributes included in system services will be returned. - * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS is used with this function, only the system attributes included in user services will be returned. - * - * @mscs - * @mmsc{@ref BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle of the recently terminated connection. - * @param[out] p_sys_attr_data Pointer to a buffer where updated information about system attributes will be filled in. The format of the data is described - * in @ref BLE_GATTS_SYS_ATTRS_FORMAT. NULL can be provided to obtain the length of the data. - * @param[in,out] p_len Size of application buffer if p_sys_attr_data is not NULL. Unconditionally updated to actual length of system attribute data. - * @param[in] flags Optional additional flags, see @ref BLE_GATTS_SYS_ATTR_FLAGS - * - * @retval ::NRF_SUCCESS Successfully retrieved the system attribute information. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid flags supplied. - * @retval ::NRF_ERROR_DATA_SIZE The system attribute information did not fit into the provided buffer. - * @retval ::NRF_ERROR_NOT_FOUND No system attributes found. - */ -SVCALL(SD_BLE_GATTS_SYS_ATTR_GET, uint32_t, sd_ble_gatts_sys_attr_get(uint16_t conn_handle, uint8_t *p_sys_attr_data, uint16_t *p_len, uint32_t flags)); - - -/**@brief Retrieve the first valid user attribute handle. - * - * @param[out] p_handle Pointer to an integer where the handle will be stored. - * - * @retval ::NRF_SUCCESS Successfully retrieved the handle. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - */ -SVCALL(SD_BLE_GATTS_INITIAL_USER_HANDLE_GET, uint32_t, sd_ble_gatts_initial_user_handle_get(uint16_t *p_handle)); - -/**@brief Retrieve the attribute UUID and/or metadata. - * - * @param[in] handle Attribute handle - * @param[out] p_uuid UUID of the attribute. Use NULL to omit this field. - * @param[out] p_md Metadata of the attribute. Use NULL to omit this field. - * - * @retval ::NRF_SUCCESS Successfully retrieved the attribute metadata, - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameters supplied. Returned when both @c p_uuid and @c p_md are NULL. - * @retval ::NRF_ERROR_NOT_FOUND Attribute was not found. - */ -SVCALL(SD_BLE_GATTS_ATTR_GET, uint32_t, sd_ble_gatts_attr_get(uint16_t handle, ble_uuid_t * p_uuid, ble_gatts_attr_md_t * p_md)); - -/**@brief Reply to an ATT_MTU exchange request by sending an Exchange MTU Response to the client. - * - * @details This function is only used to reply to a @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST event. - * - * @details The SoftDevice sets ATT_MTU to the minimum of: - * - The Client RX MTU value from @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST, and - * - The Server RX MTU value. - * - * However, the SoftDevice never sets ATT_MTU lower than @ref BLE_GATT_ATT_MTU_DEFAULT. - * - * @mscs - * @mmsc{@ref BLE_GATTS_MTU_EXCHANGE} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] server_rx_mtu Server RX MTU size. - * - The minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. - * - The maximum value is @ref ble_gatt_conn_cfg_t::att_mtu in the connection configuration - used for this connection. - * - The value must be equal to Client RX MTU size given in @ref sd_ble_gattc_exchange_mtu_request - * if an ATT_MTU exchange has already been performed in the other direction. - * - * @retval ::NRF_SUCCESS Successfully sent response to the client. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no ATT_MTU exchange request pending. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid Server RX MTU size supplied. - */ -SVCALL(SD_BLE_GATTS_EXCHANGE_MTU_REPLY, uint32_t, sd_ble_gatts_exchange_mtu_reply(uint16_t conn_handle, uint16_t server_rx_mtu)); -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // BLE_GATTS_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/ble_hci.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/ble_hci.h deleted file mode 100644 index f0dde9a03ad..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/ble_hci.h +++ /dev/null @@ -1,135 +0,0 @@ -/* - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_COMMON - @{ -*/ - - -#ifndef BLE_HCI_H__ -#define BLE_HCI_H__ -#ifdef __cplusplus -extern "C" { -#endif - -/** @defgroup BLE_HCI_STATUS_CODES Bluetooth status codes - * @{ */ - -#define BLE_HCI_STATUS_CODE_SUCCESS 0x00 /**< Success. */ -#define BLE_HCI_STATUS_CODE_UNKNOWN_BTLE_COMMAND 0x01 /**< Unknown BLE Command. */ -#define BLE_HCI_STATUS_CODE_UNKNOWN_CONNECTION_IDENTIFIER 0x02 /**< Unknown Connection Identifier. */ -/*0x03 Hardware Failure -0x04 Page Timeout -*/ -#define BLE_HCI_AUTHENTICATION_FAILURE 0x05 /**< Authentication Failure. */ -#define BLE_HCI_STATUS_CODE_PIN_OR_KEY_MISSING 0x06 /**< Pin or Key missing. */ -#define BLE_HCI_MEMORY_CAPACITY_EXCEEDED 0x07 /**< Memory Capacity Exceeded. */ -#define BLE_HCI_CONNECTION_TIMEOUT 0x08 /**< Connection Timeout. */ -/*0x09 Connection Limit Exceeded -0x0A Synchronous Connection Limit To A Device Exceeded -0x0B ACL Connection Already Exists*/ -#define BLE_HCI_STATUS_CODE_COMMAND_DISALLOWED 0x0C /**< Command Disallowed. */ -/*0x0D Connection Rejected due to Limited Resources -0x0E Connection Rejected Due To Security Reasons -0x0F Connection Rejected due to Unacceptable BD_ADDR -0x10 Connection Accept Timeout Exceeded -0x11 Unsupported Feature or Parameter Value*/ -#define BLE_HCI_STATUS_CODE_INVALID_BTLE_COMMAND_PARAMETERS 0x12 /**< Invalid BLE Command Parameters. */ -#define BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION 0x13 /**< Remote User Terminated Connection. */ -#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_LOW_RESOURCES 0x14 /**< Remote Device Terminated Connection due to low resources.*/ -#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_POWER_OFF 0x15 /**< Remote Device Terminated Connection due to power off. */ -#define BLE_HCI_LOCAL_HOST_TERMINATED_CONNECTION 0x16 /**< Local Host Terminated Connection. */ -/* -0x17 Repeated Attempts -0x18 Pairing Not Allowed -0x19 Unknown LMP PDU -*/ -#define BLE_HCI_UNSUPPORTED_REMOTE_FEATURE 0x1A /**< Unsupported Remote Feature. */ -/* -0x1B SCO Offset Rejected -0x1C SCO Interval Rejected -0x1D SCO Air Mode Rejected*/ -#define BLE_HCI_STATUS_CODE_INVALID_LMP_PARAMETERS 0x1E /**< Invalid LMP Parameters. */ -#define BLE_HCI_STATUS_CODE_UNSPECIFIED_ERROR 0x1F /**< Unspecified Error. */ -/*0x20 Unsupported LMP Parameter Value -0x21 Role Change Not Allowed -*/ -#define BLE_HCI_STATUS_CODE_LMP_RESPONSE_TIMEOUT 0x22 /**< LMP Response Timeout. */ -#define BLE_HCI_STATUS_CODE_LMP_ERROR_TRANSACTION_COLLISION 0x23 /**< LMP Error Transaction Collision/LL Procedure Collision. */ -#define BLE_HCI_STATUS_CODE_LMP_PDU_NOT_ALLOWED 0x24 /**< LMP PDU Not Allowed. */ -/*0x25 Encryption Mode Not Acceptable -0x26 Link Key Can Not be Changed -0x27 Requested QoS Not Supported -*/ -#define BLE_HCI_INSTANT_PASSED 0x28 /**< Instant Passed. */ -#define BLE_HCI_PAIRING_WITH_UNIT_KEY_UNSUPPORTED 0x29 /**< Pairing with Unit Key Unsupported. */ -#define BLE_HCI_DIFFERENT_TRANSACTION_COLLISION 0x2A /**< Different Transaction Collision. */ -/* -0x2B Reserved -0x2C QoS Unacceptable Parameter -0x2D QoS Rejected -0x2E Channel Classification Not Supported -0x2F Insufficient Security -*/ -#define BLE_HCI_PARAMETER_OUT_OF_MANDATORY_RANGE 0x30 /**< Parameter Out Of Mandatory Range. */ -/* -0x31 Reserved -0x32 Role Switch Pending -0x33 Reserved -0x34 Reserved Slot Violation -0x35 Role Switch Failed -0x36 Extended Inquiry Response Too Large -0x37 Secure Simple Pairing Not Supported By Host. -0x38 Host Busy - Pairing -0x39 Connection Rejected due to No Suitable Channel Found*/ -#define BLE_HCI_CONTROLLER_BUSY 0x3A /**< Controller Busy. */ -#define BLE_HCI_CONN_INTERVAL_UNACCEPTABLE 0x3B /**< Connection Interval Unacceptable. */ -#define BLE_HCI_DIRECTED_ADVERTISER_TIMEOUT 0x3C /**< Directed Advertisement Timeout. */ -#define BLE_HCI_CONN_TERMINATED_DUE_TO_MIC_FAILURE 0x3D /**< Connection Terminated due to MIC Failure. */ -#define BLE_HCI_CONN_FAILED_TO_BE_ESTABLISHED 0x3E /**< Connection Failed to be Established. */ - -/** @} */ - - -#ifdef __cplusplus -} -#endif -#endif // BLE_HCI_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/ble_l2cap.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/ble_l2cap.h deleted file mode 100644 index 3b53ded0926..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/ble_l2cap.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_L2CAP Logical Link Control and Adaptation Protocol (L2CAP) - @{ - @brief Definitions and prototypes for the L2CAP interface. - */ - -#ifndef BLE_L2CAP_H__ -#define BLE_L2CAP_H__ - -#include "ble_types.h" -#include "ble_ranges.h" -#include "ble_err.h" -#include "nrf_svc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@addtogroup BLE_L2CAP_TERMINOLOGY Terminology - * @{ - * @details - * - * L2CAP SDU - * - A data unit that the application can send/receive to/from a peer. - * - * L2CAP PDU - * - A data unit that is exchanged between local and remote L2CAP entities. - * It consists of L2CAP protocol control information and payload fields. - * The payload field can contain an L2CAP SDU or a part of an L2CAP SDU. - * - * L2CAP MTU - * - The maximum length of an L2CAP SDU. - * - * L2CAP MPS - * - The maximum length of an L2CAP PDU payload field. - * - * Credits - * - A value indicating the number of L2CAP PDUs that the receiver of the credit can send to the peer. - * @} */ - -/**@addtogroup BLE_L2CAP_ENUMERATIONS Enumerations - * @{ */ - -/**@brief L2CAP API SVC numbers. */ -enum BLE_L2CAP_SVCS -{ - SD_BLE_L2CAP_CH_SETUP = BLE_L2CAP_SVC_BASE, /**< Set up an L2CAP channel. */ - SD_BLE_L2CAP_CH_RELEASE, /**< Release an L2CAP channel. */ - SD_BLE_L2CAP_CH_RX, /**< Receive an SDU on an L2CAP channel. */ - SD_BLE_L2CAP_CH_TX, /**< Transmit an SDU on an L2CAP channel. */ - SD_BLE_L2CAP_CH_FLOW_CONTROL, /**< Advanced SDU reception flow control. */ -}; - -/**@brief L2CAP Event IDs. */ -enum BLE_L2CAP_EVTS -{ - BLE_L2CAP_EVT_CH_SETUP_REQUEST = BLE_L2CAP_EVT_BASE, /**< L2CAP Channel Setup Request event. - \n See @ref ble_l2cap_evt_ch_setup_request_t. */ - BLE_L2CAP_EVT_CH_SETUP_REFUSED, /**< L2CAP Channel Setup Refused event. - \n See @ref ble_l2cap_evt_ch_setup_refused_t. */ - BLE_L2CAP_EVT_CH_SETUP, /**< L2CAP Channel Setup Completed event. - \n See @ref ble_l2cap_evt_ch_setup_t. */ - BLE_L2CAP_EVT_CH_RELEASED, /**< L2CAP Channel Released event. - \n No additional event structure applies. */ - BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED, /**< L2CAP Channel SDU data buffer released event. - \n See @ref ble_l2cap_evt_ch_sdu_buf_released_t. */ - BLE_L2CAP_EVT_CH_CREDIT, /**< L2CAP Channel Credit received. - \n See @ref ble_l2cap_evt_ch_credit_t. */ - BLE_L2CAP_EVT_CH_RX, /**< L2CAP Channel SDU received. - \n See @ref ble_l2cap_evt_ch_rx_t. */ - BLE_L2CAP_EVT_CH_TX, /**< L2CAP Channel SDU transmitted. - \n See @ref ble_l2cap_evt_ch_tx_t. */ -}; - -/** @} */ - -/**@addtogroup BLE_L2CAP_DEFINES Defines - * @{ */ - -/**@brief Maximum number of L2CAP channels per connection. */ -#define BLE_L2CAP_CH_COUNT_MAX (64) - -/**@brief Minimum L2CAP MTU, in bytes. */ -#define BLE_L2CAP_MTU_MIN (23) - -/**@brief Minimum L2CAP MPS, in bytes. */ -#define BLE_L2CAP_MPS_MIN (23) - -/**@brief Invalid CID. */ -#define BLE_L2CAP_CID_INVALID (0x0000) - -/**@brief Default number of credits for @ref sd_ble_l2cap_ch_flow_control. */ -#define BLE_L2CAP_CREDITS_DEFAULT (1) - -/**@defgroup BLE_L2CAP_CH_SETUP_REFUSED_SRCS L2CAP channel setup refused sources - * @{ */ -#define BLE_L2CAP_CH_SETUP_REFUSED_SRC_LOCAL (0x01) /**< Local. */ -#define BLE_L2CAP_CH_SETUP_REFUSED_SRC_REMOTE (0x02) /**< Remote. */ - /** @} */ - - /** @defgroup BLE_L2CAP_CH_STATUS_CODES L2CAP channel status codes - * @{ */ -#define BLE_L2CAP_CH_STATUS_CODE_SUCCESS (0x0000) /**< Success. */ -#define BLE_L2CAP_CH_STATUS_CODE_LE_PSM_NOT_SUPPORTED (0x0002) /**< LE_PSM not supported. */ -#define BLE_L2CAP_CH_STATUS_CODE_NO_RESOURCES (0x0004) /**< No resources available. */ -#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_AUTHENTICATION (0x0005) /**< Insufficient authentication. */ -#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_AUTHORIZATION (0x0006) /**< Insufficient authorization. */ -#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_ENC_KEY_SIZE (0x0007) /**< Insufficient encryption key size. */ -#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_ENC (0x0008) /**< Insufficient encryption. */ -#define BLE_L2CAP_CH_STATUS_CODE_INVALID_SCID (0x0009) /**< Invalid Source CID. */ -#define BLE_L2CAP_CH_STATUS_CODE_SCID_ALLOCATED (0x000A) /**< Source CID already allocated. */ -#define BLE_L2CAP_CH_STATUS_CODE_UNACCEPTABLE_PARAMS (0x000B) /**< Unacceptable parameters. */ -#define BLE_L2CAP_CH_STATUS_CODE_NOT_UNDERSTOOD (0x8000) /**< Command Reject received instead of LE Credit Based Connection Response. */ -#define BLE_L2CAP_CH_STATUS_CODE_TIMEOUT (0xC000) /**< Operation timed out. */ -/** @} */ - -/** @} */ - -/**@addtogroup BLE_L2CAP_STRUCTURES Structures - * @{ */ - -/** - * @brief BLE L2CAP connection configuration parameters, set with @ref sd_ble_cfg_set. - * - * @note These parameters are set per connection, so all L2CAP channels created on this connection - * will have the same parameters. - * - * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: - * - rx_mps is smaller than @ref BLE_L2CAP_MPS_MIN. - * - tx_mps is smaller than @ref BLE_L2CAP_MPS_MIN. - * - ch_count is greater than @ref BLE_L2CAP_CH_COUNT_MAX. - * @retval ::NRF_ERROR_NO_MEM rx_mps or tx_mps is set too high. - */ -typedef struct -{ - uint16_t rx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP shall - be able to receive on L2CAP channels on connections with this - configuration. The minimum value is @ref BLE_L2CAP_MPS_MIN. */ - uint16_t tx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP shall - be able to transmit on L2CAP channels on connections with this - configuration. The minimum value is @ref BLE_L2CAP_MPS_MIN. */ - uint8_t rx_queue_size; /**< Number of SDU data buffers that can be queued for reception per - L2CAP channel. The minimum value is one. */ - uint8_t tx_queue_size; /**< Number of SDU data buffers that can be queued for transmission - per L2CAP channel. The minimum value is one. */ - uint8_t ch_count; /**< Number of L2CAP channels the application can create per connection - with this configuration. The default value is zero, the maximum - value is @ref BLE_L2CAP_CH_COUNT_MAX. - @note if this parameter is set to zero, all other parameters in - @ref ble_l2cap_conn_cfg_t are ignored. */ -} ble_l2cap_conn_cfg_t; - -/**@brief L2CAP channel RX parameters. */ -typedef struct -{ - uint16_t rx_mtu; /**< The maximum L2CAP SDU size, in bytes, that L2CAP shall be able to - receive on this L2CAP channel. - - Must be equal to or greater than @ref BLE_L2CAP_MTU_MIN. */ - uint16_t rx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP shall be - able to receive on this L2CAP channel. - - Must be equal to or greater than @ref BLE_L2CAP_MPS_MIN. - - Must be equal to or less than @ref ble_l2cap_conn_cfg_t::rx_mps. */ - ble_data_t sdu_buf; /**< SDU data buffer for reception. - - If @ref ble_data_t::p_data is non-NULL, initial credits are - issued to the peer. - - If @ref ble_data_t::p_data is NULL, no initial credits are - issued to the peer. */ -} ble_l2cap_ch_rx_params_t; - -/**@brief L2CAP channel setup parameters. */ -typedef struct -{ - ble_l2cap_ch_rx_params_t rx_params; /**< L2CAP channel RX parameters. */ - uint16_t le_psm; /**< LE Protocol/Service Multiplexer. Used when requesting - setup of an L2CAP channel, ignored otherwise. */ - uint16_t status; /**< Status code, see @ref BLE_L2CAP_CH_STATUS_CODES. - Used when replying to a setup request of an L2CAP - channel, ignored otherwise. */ -} ble_l2cap_ch_setup_params_t; - -/**@brief L2CAP channel TX parameters. */ -typedef struct -{ - uint16_t tx_mtu; /**< The maximum L2CAP SDU size, in bytes, that L2CAP is able to - transmit on this L2CAP channel. */ - uint16_t peer_mps; /**< The maximum L2CAP PDU payload size, in bytes, that the peer is - able to receive on this L2CAP channel. */ - uint16_t tx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP is able - to transmit on this L2CAP channel. This is effective tx_mps, - selected by the SoftDevice as - MIN( @ref ble_l2cap_ch_tx_params_t::peer_mps, @ref ble_l2cap_conn_cfg_t::tx_mps ) */ - uint16_t credits; /**< Initial credits given by the peer. */ -} ble_l2cap_ch_tx_params_t; - -/**@brief L2CAP Channel Setup Request event. */ -typedef struct -{ - ble_l2cap_ch_tx_params_t tx_params; /**< L2CAP channel TX parameters. */ - uint16_t le_psm; /**< LE Protocol/Service Multiplexer. */ -} ble_l2cap_evt_ch_setup_request_t; - -/**@brief L2CAP Channel Setup Refused event. */ -typedef struct -{ - uint8_t source; /**< Source, see @ref BLE_L2CAP_CH_SETUP_REFUSED_SRCS */ - uint16_t status; /**< Status code, see @ref BLE_L2CAP_CH_STATUS_CODES */ -} ble_l2cap_evt_ch_setup_refused_t; - -/**@brief L2CAP Channel Setup Completed event. */ -typedef struct -{ - ble_l2cap_ch_tx_params_t tx_params; /**< L2CAP channel TX parameters. */ -} ble_l2cap_evt_ch_setup_t; - -/**@brief L2CAP Channel SDU Data Duffer Released event. */ -typedef struct -{ - ble_data_t sdu_buf; /**< Returned reception or transmission SDU data buffer. The SoftDevice - returns SDU data buffers supplied by the application, which have - not yet been returned previously via a @ref BLE_L2CAP_EVT_CH_RX or - @ref BLE_L2CAP_EVT_CH_TX event. */ -} ble_l2cap_evt_ch_sdu_buf_released_t; - -/**@brief L2CAP Channel Credit received event. */ -typedef struct -{ - uint16_t credits; /**< Additional credits given by the peer. */ -} ble_l2cap_evt_ch_credit_t; - -/**@brief L2CAP Channel received SDU event. */ -typedef struct -{ - uint16_t sdu_len; /**< Total SDU length, in bytes. */ - ble_data_t sdu_buf; /**< SDU data buffer. - @note If there is not enough space in the buffer - (sdu_buf.len < sdu_len) then the rest of the SDU will be - silently discarded by the SoftDevice. */ -} ble_l2cap_evt_ch_rx_t; - -/**@brief L2CAP Channel transmitted SDU event. */ -typedef struct -{ - ble_data_t sdu_buf; /**< SDU data buffer. */ -} ble_l2cap_evt_ch_tx_t; - -/**@brief L2CAP event structure. */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle on which the event occured. */ - uint16_t local_cid; /**< Local Channel ID of the L2CAP channel, or - @ref BLE_L2CAP_CID_INVALID if not present. */ - union - { - ble_l2cap_evt_ch_setup_request_t ch_setup_request; /**< L2CAP Channel Setup Request Event Parameters. */ - ble_l2cap_evt_ch_setup_refused_t ch_setup_refused; /**< L2CAP Channel Setup Refused Event Parameters. */ - ble_l2cap_evt_ch_setup_t ch_setup; /**< L2CAP Channel Setup Completed Event Parameters. */ - ble_l2cap_evt_ch_sdu_buf_released_t ch_sdu_buf_released;/**< L2CAP Channel SDU Data Buffer Released Event Parameters. */ - ble_l2cap_evt_ch_credit_t credit; /**< L2CAP Channel Credit Received Event Parameters. */ - ble_l2cap_evt_ch_rx_t rx; /**< L2CAP Channel SDU Received Event Parameters. */ - ble_l2cap_evt_ch_tx_t tx; /**< L2CAP Channel SDU Transmitted Event Parameters. */ - } params; /**< Event Parameters. */ -} ble_l2cap_evt_t; - -/** @} */ - -/**@addtogroup BLE_L2CAP_FUNCTIONS Functions - * @{ */ - -/**@brief Set up an L2CAP channel. - * - * @details This function is used to: - * - Request setup of an L2CAP channel: sends an LE Credit Based Connection Request packet to a peer. - * - Reply to a setup request of an L2CAP channel (if called in response to a - * @ref BLE_L2CAP_EVT_CH_SETUP_REQUEST event): sends an LE Credit Based Connection - * Response packet to a peer. - * - * @note A call to this function will require the application to keep the SDU data buffer alive - * until the SDU data buffer is returned in @ref BLE_L2CAP_EVT_CH_RX or - * @ref BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED event. - * - * @events - * @event{@ref BLE_L2CAP_EVT_CH_SETUP, Setup successful.} - * @event{@ref BLE_L2CAP_EVT_CH_SETUP_REFUSED, Setup failed.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_L2CAP_CH_SETUP_MSC} - * @endmscs - * - * @param[in] conn_handle Connection Handle. - * @param[in,out] p_local_cid Pointer to a uint16_t containing Local Channel ID of the L2CAP channel: - * - As input: @ref BLE_L2CAP_CID_INVALID when requesting setup of an L2CAP - * channel or local_cid provided in the @ref BLE_L2CAP_EVT_CH_SETUP_REQUEST - * event when replying to a setup request of an L2CAP channel. - * - As output: local_cid for this channel. - * @param[in] p_params L2CAP channel parameters. - * - * @retval ::NRF_SUCCESS Successfully queued request or response for transmission. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_LENGTH Supplied higher rx_mps than has been configured on this link. - * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (L2CAP channel already set up). - * @retval ::NRF_ERROR_NOT_FOUND CID not found. - * @retval ::NRF_ERROR_RESOURCES The limit has been reached for available L2CAP channels, - * see @ref ble_l2cap_conn_cfg_t::ch_count. - */ -SVCALL(SD_BLE_L2CAP_CH_SETUP, uint32_t, sd_ble_l2cap_ch_setup(uint16_t conn_handle, uint16_t *p_local_cid, ble_l2cap_ch_setup_params_t const *p_params)); - -/**@brief Release an L2CAP channel. - * - * @details This sends a Disconnection Request packet to a peer. - * - * @events - * @event{@ref BLE_L2CAP_EVT_CH_RELEASED, Release complete.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_L2CAP_CH_RELEASE_MSC} - * @endmscs - * - * @param[in] conn_handle Connection Handle. - * @param[in] local_cid Local Channel ID of the L2CAP channel. - * - * @retval ::NRF_SUCCESS Successfully queued request for transmission. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is - * in progress for the L2CAP channel). - * @retval ::NRF_ERROR_NOT_FOUND CID not found. - */ -SVCALL(SD_BLE_L2CAP_CH_RELEASE, uint32_t, sd_ble_l2cap_ch_release(uint16_t conn_handle, uint16_t local_cid)); - -/**@brief Receive an SDU on an L2CAP channel. - * - * @details This may issue additional credits to the peer using an LE Flow Control Credit packet. - * - * @note A call to this function will require the application to keep the memory pointed by - * @ref ble_data_t::p_data alive until the SDU data buffer is returned in @ref BLE_L2CAP_EVT_CH_RX - * or @ref BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED event. - * - * @note The SoftDevice can queue up to @ref ble_l2cap_conn_cfg_t::rx_queue_size SDU data buffers - * for reception per L2CAP channel. - * - * @events - * @event{@ref BLE_L2CAP_EVT_CH_RX, The SDU is received.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_L2CAP_CH_RX_MSC} - * @endmscs - * - * @param[in] conn_handle Connection Handle. - * @param[in] local_cid Local Channel ID of the L2CAP channel. - * @param[in] p_sdu_buf Pointer to the SDU data buffer. - * - * @retval ::NRF_SUCCESS Buffer accepted. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is - * in progress for an L2CAP channel). - * @retval ::NRF_ERROR_NOT_FOUND CID not found. - * @retval ::NRF_ERROR_RESOURCES Too many SDU data buffers supplied. Wait for a - * @ref BLE_L2CAP_EVT_CH_RX event and retry. - */ -SVCALL(SD_BLE_L2CAP_CH_RX, uint32_t, sd_ble_l2cap_ch_rx(uint16_t conn_handle, uint16_t local_cid, ble_data_t const *p_sdu_buf)); - -/**@brief Transmit an SDU on an L2CAP channel. - * - * @note A call to this function will require the application to keep the memory pointed by - * @ref ble_data_t::p_data alive until the SDU data buffer is returned in @ref BLE_L2CAP_EVT_CH_TX - * or @ref BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED event. - * - * @note The SoftDevice can queue up to @ref ble_l2cap_conn_cfg_t::tx_queue_size SDUs for - * transmission per L2CAP channel. - * - * @note The application can keep track of the available credits for transmission by following - * the procedure below: - * - Store initial credits given by the peer in a variable. - * (Initial credits are provided in a @ref BLE_L2CAP_EVT_CH_SETUP event.) - * - Decrement the variable, which stores the currently available credits, by - * ceiling((@ref ble_data_t::len + 2) / tx_mps) when a call to this function returns - * @ref NRF_SUCCESS. (tx_mps is provided in a @ref BLE_L2CAP_EVT_CH_SETUP event.) - * - Increment the variable, which stores the currently available credits, by additional - * credits given by the peer in a @ref BLE_L2CAP_EVT_CH_CREDIT event. - * - * @events - * @event{@ref BLE_L2CAP_EVT_CH_TX, The SDU is transmitted.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_L2CAP_CH_TX_MSC} - * @endmscs - * - * @param[in] conn_handle Connection Handle. - * @param[in] local_cid Local Channel ID of the L2CAP channel. - * @param[in] p_sdu_buf Pointer to the SDU data buffer. - * - * @retval ::NRF_SUCCESS Successfully queued L2CAP SDU for transmission. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is - * in progress for the L2CAP channel). - * @retval ::NRF_ERROR_NOT_FOUND CID not found. - * @retval ::NRF_ERROR_DATA_SIZE Invalid SDU length supplied, must not be more than - * @ref ble_l2cap_ch_tx_params_t::tx_mtu provided in - * @ref BLE_L2CAP_EVT_CH_SETUP event. - * @retval ::NRF_ERROR_RESOURCES Too many SDUs queued for transmission. Wait for a - * @ref BLE_L2CAP_EVT_CH_TX event and retry. - */ -SVCALL(SD_BLE_L2CAP_CH_TX, uint32_t, sd_ble_l2cap_ch_tx(uint16_t conn_handle, uint16_t local_cid, ble_data_t const *p_sdu_buf)); - -/**@brief Advanced SDU reception flow control. - * - * @details Adjust the way the SoftDevice issues credits to the peer. - * This may issue additional credits to the peer using an LE Flow Control Credit packet. - * - * @mscs - * @mmsc{@ref BLE_L2CAP_CH_FLOW_CONTROL_MSC} - * @endmscs - * - * @param[in] conn_handle Connection Handle. - * @param[in] local_cid Local Channel ID of the L2CAP channel or @ref BLE_L2CAP_CID_INVALID to set - * the value that will be used for newly created channels. - * @param[in] credits Number of credits that the SoftDevice will make sure the peer has every - * time it starts using a new reception buffer. - * - @ref BLE_L2CAP_CREDITS_DEFAULT is the default value the SoftDevice will - * use if this function is not called. - * - If set to zero, the SoftDevice will stop issuing credits for new reception - * buffers the application provides or has provided. SDU reception that is - * currently ongoing will be allowed to complete. - * @param[out] p_credits NULL or pointer to a uint16_t. If a valid pointer is provided, it will be - * written by the SoftDevice with the number of credits that is or will be - * available to the peer. If the value written by the SoftDevice is 0 when - * credits parameter was set to 0, the peer will not be able to send more - * data until more credits are provided by calling this function again with - * credits > 0. This parameter is ignored when local_cid is set to @ref - * BLE_L2CAP_CID_INVALID. - * - * @note Application should take care when setting number of credits higher than default value. In - * this case the application must make sure that the SoftDevice always has reception buffers - * available (see @ref sd_ble_l2cap_ch_rx) for that channel. If the SoftDevice does not have - * such buffers available, packets may be NACKed on the Link Layer and all Bluetooth traffic - * on the connection handle may be stalled until the SoftDevice again has an available - * reception buffer. This applies even if the application has used this call to set the - * credits back to default, or zero. - * - * @retval ::NRF_SUCCESS Flow control parameters accepted. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is - * in progress for an L2CAP channel). - * @retval ::NRF_ERROR_NOT_FOUND CID not found. - */ -SVCALL(SD_BLE_L2CAP_CH_FLOW_CONTROL, uint32_t, sd_ble_l2cap_ch_flow_control(uint16_t conn_handle, uint16_t local_cid, uint16_t credits, uint16_t *p_credits)); - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // BLE_L2CAP_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/ble_ranges.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/ble_ranges.h deleted file mode 100644 index 5b9d8914021..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/ble_ranges.h +++ /dev/null @@ -1,156 +0,0 @@ -/* - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_COMMON - @{ - @defgroup ble_ranges Module specific SVC, event and option number subranges - @{ - - @brief Definition of SVC, event and option number subranges for each API module. - - @note - SVCs, event and option numbers are split into subranges for each API module. - Each module receives its entire allocated range of SVC calls, whether implemented or not, - but return BLE_ERROR_NOT_SUPPORTED for unimplemented or undefined calls in its range. - - Note that the symbols BLE__SVC_LAST is the end of the allocated SVC range, - rather than the last SVC function call actually defined and implemented. - - Specific SVC, event and option values are defined in each module's ble_.h file, - which defines names of each individual SVC code based on the range start value. -*/ - -#ifndef BLE_RANGES_H__ -#define BLE_RANGES_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#define BLE_SVC_BASE 0x60 /**< Common BLE SVC base. */ -#define BLE_SVC_LAST 0x6B /**< Common BLE SVC last. */ - -#define BLE_GAP_SVC_BASE 0x6C /**< GAP BLE SVC base. */ -#define BLE_GAP_SVC_LAST 0x93 /**< GAP BLE SVC last. */ - -#define BLE_GATTC_SVC_BASE 0x94 /**< GATTC BLE SVC base. */ -#define BLE_GATTC_SVC_LAST 0x9F /**< GATTC BLE SVC last. */ - -#define BLE_GATTS_SVC_BASE 0xA0 /**< GATTS BLE SVC base. */ -#define BLE_GATTS_SVC_LAST 0xAF /**< GATTS BLE SVC last. */ - -#define BLE_L2CAP_SVC_BASE 0xB0 /**< L2CAP BLE SVC base. */ -#define BLE_L2CAP_SVC_LAST 0xBF /**< L2CAP BLE SVC last. */ - - -#define BLE_EVT_INVALID 0x00 /**< Invalid BLE Event. */ - -#define BLE_EVT_BASE 0x01 /**< Common BLE Event base. */ -#define BLE_EVT_LAST 0x0F /**< Common BLE Event last. */ - -#define BLE_GAP_EVT_BASE 0x10 /**< GAP BLE Event base. */ -#define BLE_GAP_EVT_LAST 0x2F /**< GAP BLE Event last. */ - -#define BLE_GATTC_EVT_BASE 0x30 /**< GATTC BLE Event base. */ -#define BLE_GATTC_EVT_LAST 0x4F /**< GATTC BLE Event last. */ - -#define BLE_GATTS_EVT_BASE 0x50 /**< GATTS BLE Event base. */ -#define BLE_GATTS_EVT_LAST 0x6F /**< GATTS BLE Event last. */ - -#define BLE_L2CAP_EVT_BASE 0x70 /**< L2CAP BLE Event base. */ -#define BLE_L2CAP_EVT_LAST 0x8F /**< L2CAP BLE Event last. */ - - -#define BLE_OPT_INVALID 0x00 /**< Invalid BLE Option. */ - -#define BLE_OPT_BASE 0x01 /**< Common BLE Option base. */ -#define BLE_OPT_LAST 0x1F /**< Common BLE Option last. */ - -#define BLE_GAP_OPT_BASE 0x20 /**< GAP BLE Option base. */ -#define BLE_GAP_OPT_LAST 0x3F /**< GAP BLE Option last. */ - -#define BLE_GATT_OPT_BASE 0x40 /**< GATT BLE Option base. */ -#define BLE_GATT_OPT_LAST 0x5F /**< GATT BLE Option last. */ - -#define BLE_GATTC_OPT_BASE 0x60 /**< GATTC BLE Option base. */ -#define BLE_GATTC_OPT_LAST 0x7F /**< GATTC BLE Option last. */ - -#define BLE_GATTS_OPT_BASE 0x80 /**< GATTS BLE Option base. */ -#define BLE_GATTS_OPT_LAST 0x9F /**< GATTS BLE Option last. */ - -#define BLE_L2CAP_OPT_BASE 0xA0 /**< L2CAP BLE Option base. */ -#define BLE_L2CAP_OPT_LAST 0xBF /**< L2CAP BLE Option last. */ - - -#define BLE_CFG_INVALID 0x00 /**< Invalid BLE configuration. */ - -#define BLE_CFG_BASE 0x01 /**< Common BLE configuration base. */ -#define BLE_CFG_LAST 0x1F /**< Common BLE configuration last. */ - -#define BLE_CONN_CFG_BASE 0x20 /**< BLE connection configuration base. */ -#define BLE_CONN_CFG_LAST 0x3F /**< BLE connection configuration last. */ - -#define BLE_GAP_CFG_BASE 0x40 /**< GAP BLE configuration base. */ -#define BLE_GAP_CFG_LAST 0x5F /**< GAP BLE configuration last. */ - -#define BLE_GATT_CFG_BASE 0x60 /**< GATT BLE configuration base. */ -#define BLE_GATT_CFG_LAST 0x7F /**< GATT BLE configuration last. */ - -#define BLE_GATTC_CFG_BASE 0x80 /**< GATTC BLE configuration base. */ -#define BLE_GATTC_CFG_LAST 0x9F /**< GATTC BLE configuration last. */ - -#define BLE_GATTS_CFG_BASE 0xA0 /**< GATTS BLE configuration base. */ -#define BLE_GATTS_CFG_LAST 0xBF /**< GATTS BLE configuration last. */ - -#define BLE_L2CAP_CFG_BASE 0xC0 /**< L2CAP BLE configuration base. */ -#define BLE_L2CAP_CFG_LAST 0xDF /**< L2CAP BLE configuration last. */ - - - - - -#ifdef __cplusplus -} -#endif -#endif /* BLE_RANGES_H__ */ - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/ble_types.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/ble_types.h deleted file mode 100644 index 88c93180c83..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/ble_types.h +++ /dev/null @@ -1,215 +0,0 @@ -/* - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_COMMON - @{ - @defgroup ble_types Common types and macro definitions - @{ - - @brief Common types and macro definitions for the BLE SoftDevice. - */ - -#ifndef BLE_TYPES_H__ -#define BLE_TYPES_H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_TYPES_DEFINES Defines - * @{ */ - -/** @defgroup BLE_CONN_HANDLES BLE Connection Handles - * @{ */ -#define BLE_CONN_HANDLE_INVALID 0xFFFF /**< Invalid Connection Handle. */ -#define BLE_CONN_HANDLE_ALL 0xFFFE /**< Applies to all Connection Handles. */ -/** @} */ - - -/** @defgroup BLE_UUID_VALUES Assigned Values for BLE UUIDs - * @{ */ -/* Generic UUIDs, applicable to all services */ -#define BLE_UUID_UNKNOWN 0x0000 /**< Reserved UUID. */ -#define BLE_UUID_SERVICE_PRIMARY 0x2800 /**< Primary Service. */ -#define BLE_UUID_SERVICE_SECONDARY 0x2801 /**< Secondary Service. */ -#define BLE_UUID_SERVICE_INCLUDE 0x2802 /**< Include. */ -#define BLE_UUID_CHARACTERISTIC 0x2803 /**< Characteristic. */ -#define BLE_UUID_DESCRIPTOR_CHAR_EXT_PROP 0x2900 /**< Characteristic Extended Properties Descriptor. */ -#define BLE_UUID_DESCRIPTOR_CHAR_USER_DESC 0x2901 /**< Characteristic User Description Descriptor. */ -#define BLE_UUID_DESCRIPTOR_CLIENT_CHAR_CONFIG 0x2902 /**< Client Characteristic Configuration Descriptor. */ -#define BLE_UUID_DESCRIPTOR_SERVER_CHAR_CONFIG 0x2903 /**< Server Characteristic Configuration Descriptor. */ -#define BLE_UUID_DESCRIPTOR_CHAR_PRESENTATION_FORMAT 0x2904 /**< Characteristic Presentation Format Descriptor. */ -#define BLE_UUID_DESCRIPTOR_CHAR_AGGREGATE_FORMAT 0x2905 /**< Characteristic Aggregate Format Descriptor. */ -/* GATT specific UUIDs */ -#define BLE_UUID_GATT 0x1801 /**< Generic Attribute Profile. */ -#define BLE_UUID_GATT_CHARACTERISTIC_SERVICE_CHANGED 0x2A05 /**< Service Changed Characteristic. */ -/* GAP specific UUIDs */ -#define BLE_UUID_GAP 0x1800 /**< Generic Access Profile. */ -#define BLE_UUID_GAP_CHARACTERISTIC_DEVICE_NAME 0x2A00 /**< Device Name Characteristic. */ -#define BLE_UUID_GAP_CHARACTERISTIC_APPEARANCE 0x2A01 /**< Appearance Characteristic. */ -#define BLE_UUID_GAP_CHARACTERISTIC_RECONN_ADDR 0x2A03 /**< Reconnection Address Characteristic. */ -#define BLE_UUID_GAP_CHARACTERISTIC_PPCP 0x2A04 /**< Peripheral Preferred Connection Parameters Characteristic. */ -#define BLE_UUID_GAP_CHARACTERISTIC_CAR 0x2AA6 /**< Central Address Resolution Characteristic. */ -#define BLE_UUID_GAP_CHARACTERISTIC_RPA_ONLY 0x2AC9 /**< Resolvable Private Address Only Characteristic. */ -/** @} */ - - -/** @defgroup BLE_UUID_TYPES Types of UUID - * @{ */ -#define BLE_UUID_TYPE_UNKNOWN 0x00 /**< Invalid UUID type. */ -#define BLE_UUID_TYPE_BLE 0x01 /**< Bluetooth SIG UUID (16-bit). */ -#define BLE_UUID_TYPE_VENDOR_BEGIN 0x02 /**< Vendor UUID types start at this index (128-bit). */ -/** @} */ - - -/** @defgroup BLE_APPEARANCES Bluetooth Appearance values - * @note Retrieved from http://developer.bluetooth.org/gatt/characteristics/Pages/CharacteristicViewer.aspx?u=org.bluetooth.characteristic.gap.appearance.xml - * @{ */ -#define BLE_APPEARANCE_UNKNOWN 0 /**< Unknown. */ -#define BLE_APPEARANCE_GENERIC_PHONE 64 /**< Generic Phone. */ -#define BLE_APPEARANCE_GENERIC_COMPUTER 128 /**< Generic Computer. */ -#define BLE_APPEARANCE_GENERIC_WATCH 192 /**< Generic Watch. */ -#define BLE_APPEARANCE_WATCH_SPORTS_WATCH 193 /**< Watch: Sports Watch. */ -#define BLE_APPEARANCE_GENERIC_CLOCK 256 /**< Generic Clock. */ -#define BLE_APPEARANCE_GENERIC_DISPLAY 320 /**< Generic Display. */ -#define BLE_APPEARANCE_GENERIC_REMOTE_CONTROL 384 /**< Generic Remote Control. */ -#define BLE_APPEARANCE_GENERIC_EYE_GLASSES 448 /**< Generic Eye-glasses. */ -#define BLE_APPEARANCE_GENERIC_TAG 512 /**< Generic Tag. */ -#define BLE_APPEARANCE_GENERIC_KEYRING 576 /**< Generic Keyring. */ -#define BLE_APPEARANCE_GENERIC_MEDIA_PLAYER 640 /**< Generic Media Player. */ -#define BLE_APPEARANCE_GENERIC_BARCODE_SCANNER 704 /**< Generic Barcode Scanner. */ -#define BLE_APPEARANCE_GENERIC_THERMOMETER 768 /**< Generic Thermometer. */ -#define BLE_APPEARANCE_THERMOMETER_EAR 769 /**< Thermometer: Ear. */ -#define BLE_APPEARANCE_GENERIC_HEART_RATE_SENSOR 832 /**< Generic Heart rate Sensor. */ -#define BLE_APPEARANCE_HEART_RATE_SENSOR_HEART_RATE_BELT 833 /**< Heart Rate Sensor: Heart Rate Belt. */ -#define BLE_APPEARANCE_GENERIC_BLOOD_PRESSURE 896 /**< Generic Blood Pressure. */ -#define BLE_APPEARANCE_BLOOD_PRESSURE_ARM 897 /**< Blood Pressure: Arm. */ -#define BLE_APPEARANCE_BLOOD_PRESSURE_WRIST 898 /**< Blood Pressure: Wrist. */ -#define BLE_APPEARANCE_GENERIC_HID 960 /**< Human Interface Device (HID). */ -#define BLE_APPEARANCE_HID_KEYBOARD 961 /**< Keyboard (HID Subtype). */ -#define BLE_APPEARANCE_HID_MOUSE 962 /**< Mouse (HID Subtype). */ -#define BLE_APPEARANCE_HID_JOYSTICK 963 /**< Joystick (HID Subtype). */ -#define BLE_APPEARANCE_HID_GAMEPAD 964 /**< Gamepad (HID Subtype). */ -#define BLE_APPEARANCE_HID_DIGITIZERSUBTYPE 965 /**< Digitizer Tablet (HID Subtype). */ -#define BLE_APPEARANCE_HID_CARD_READER 966 /**< Card Reader (HID Subtype). */ -#define BLE_APPEARANCE_HID_DIGITAL_PEN 967 /**< Digital Pen (HID Subtype). */ -#define BLE_APPEARANCE_HID_BARCODE 968 /**< Barcode Scanner (HID Subtype). */ -#define BLE_APPEARANCE_GENERIC_GLUCOSE_METER 1024 /**< Generic Glucose Meter. */ -#define BLE_APPEARANCE_GENERIC_RUNNING_WALKING_SENSOR 1088 /**< Generic Running Walking Sensor. */ -#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_IN_SHOE 1089 /**< Running Walking Sensor: In-Shoe. */ -#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_SHOE 1090 /**< Running Walking Sensor: On-Shoe. */ -#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_HIP 1091 /**< Running Walking Sensor: On-Hip. */ -#define BLE_APPEARANCE_GENERIC_CYCLING 1152 /**< Generic Cycling. */ -#define BLE_APPEARANCE_CYCLING_CYCLING_COMPUTER 1153 /**< Cycling: Cycling Computer. */ -#define BLE_APPEARANCE_CYCLING_SPEED_SENSOR 1154 /**< Cycling: Speed Sensor. */ -#define BLE_APPEARANCE_CYCLING_CADENCE_SENSOR 1155 /**< Cycling: Cadence Sensor. */ -#define BLE_APPEARANCE_CYCLING_POWER_SENSOR 1156 /**< Cycling: Power Sensor. */ -#define BLE_APPEARANCE_CYCLING_SPEED_CADENCE_SENSOR 1157 /**< Cycling: Speed and Cadence Sensor. */ -#define BLE_APPEARANCE_GENERIC_PULSE_OXIMETER 3136 /**< Generic Pulse Oximeter. */ -#define BLE_APPEARANCE_PULSE_OXIMETER_FINGERTIP 3137 /**< Fingertip (Pulse Oximeter subtype). */ -#define BLE_APPEARANCE_PULSE_OXIMETER_WRIST_WORN 3138 /**< Wrist Worn(Pulse Oximeter subtype). */ -#define BLE_APPEARANCE_GENERIC_WEIGHT_SCALE 3200 /**< Generic Weight Scale. */ -#define BLE_APPEARANCE_GENERIC_OUTDOOR_SPORTS_ACT 5184 /**< Generic Outdoor Sports Activity. */ -#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_DISP 5185 /**< Location Display Device (Outdoor Sports Activity subtype). */ -#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_DISP 5186 /**< Location and Navigation Display Device (Outdoor Sports Activity subtype). */ -#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_POD 5187 /**< Location Pod (Outdoor Sports Activity subtype). */ -#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_POD 5188 /**< Location and Navigation Pod (Outdoor Sports Activity subtype). */ -/** @} */ - -/** @brief Set .type and .uuid fields of ble_uuid_struct to specified UUID value. */ -#define BLE_UUID_BLE_ASSIGN(instance, value) do {\ - instance.type = BLE_UUID_TYPE_BLE; \ - instance.uuid = value;} while(0) - -/** @brief Copy type and uuid members from src to dst ble_uuid_t pointer. Both pointers must be valid/non-null. */ -#define BLE_UUID_COPY_PTR(dst, src) do {\ - (dst)->type = (src)->type; \ - (dst)->uuid = (src)->uuid;} while(0) - -/** @brief Copy type and uuid members from src to dst ble_uuid_t struct. */ -#define BLE_UUID_COPY_INST(dst, src) do {\ - (dst).type = (src).type; \ - (dst).uuid = (src).uuid;} while(0) - -/** @brief Compare for equality both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */ -#define BLE_UUID_EQ(p_uuid1, p_uuid2) \ - (((p_uuid1)->type == (p_uuid2)->type) && ((p_uuid1)->uuid == (p_uuid2)->uuid)) - -/** @brief Compare for difference both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */ -#define BLE_UUID_NEQ(p_uuid1, p_uuid2) \ - (((p_uuid1)->type != (p_uuid2)->type) || ((p_uuid1)->uuid != (p_uuid2)->uuid)) - -/** @} */ - -/** @addtogroup BLE_TYPES_STRUCTURES Structures - * @{ */ - -/** @brief 128 bit UUID values. */ -typedef struct -{ - uint8_t uuid128[16]; /**< Little-Endian UUID bytes. */ -} ble_uuid128_t; - -/** @brief Bluetooth Low Energy UUID type, encapsulates both 16-bit and 128-bit UUIDs. */ -typedef struct -{ - uint16_t uuid; /**< 16-bit UUID value or octets 12-13 of 128-bit UUID. */ - uint8_t type; /**< UUID type, see @ref BLE_UUID_TYPES. If type is @ref BLE_UUID_TYPE_UNKNOWN, the value of uuid is undefined. */ -} ble_uuid_t; - -/**@brief Data structure. */ -typedef struct -{ - uint8_t *p_data; /**< Pointer to the data buffer provided to/from the application. */ - uint16_t len; /**< Length of the data buffer, in bytes. */ -} ble_data_t; - -/** @} */ -#ifdef __cplusplus -} -#endif - -#endif /* BLE_TYPES_H__ */ - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf52/nrf_mbr.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf52/nrf_mbr.h deleted file mode 100644 index c95bb8d4fd7..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf52/nrf_mbr.h +++ /dev/null @@ -1,228 +0,0 @@ -/* - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @defgroup nrf_mbr_api Master Boot Record API - @{ - - @brief APIs for updating SoftDevice and BootLoader - -*/ - -#ifndef NRF_MBR_H__ -#define NRF_MBR_H__ - -#include "nrf_svc.h" -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup NRF_MBR_DEFINES Defines - * @{ */ - -/**@brief MBR SVC Base number. */ -#define MBR_SVC_BASE (0x18) - -/**@brief Page size in words. */ -#define MBR_PAGE_SIZE_IN_WORDS (1024) - -/** @brief The size that must be reserved for the MBR when a SoftDevice is written to flash. -This is the offset where the first byte of the SoftDevice hex file is written.*/ -#define MBR_SIZE (0x1000) - -/** @} */ - -/** @addtogroup NRF_MBR_ENUMS Enumerations - * @{ */ - -/**@brief nRF Master Boot Record API SVC numbers. */ -enum NRF_MBR_SVCS -{ - SD_MBR_COMMAND = MBR_SVC_BASE, /**< ::sd_mbr_command */ -}; - -/**@brief Possible values for ::sd_mbr_command_t.command */ -enum NRF_MBR_COMMANDS -{ - SD_MBR_COMMAND_COPY_BL, /**< Copy a new BootLoader. @see sd_mbr_command_copy_bl_t*/ - SD_MBR_COMMAND_COPY_SD, /**< Copy a new SoftDevice. @see ::sd_mbr_command_copy_sd_t*/ - SD_MBR_COMMAND_INIT_SD, /**< Initialize forwarding interrupts to SD, and run reset function in SD*/ - SD_MBR_COMMAND_COMPARE, /**< This command works like memcmp. @see ::sd_mbr_command_compare_t*/ - SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET, /**< Change the address the MBR starts after a reset @see ::sd_mbr_command_vector_table_base_set_t*/ - SD_MBR_COMMAND_RESERVED, - SD_MBR_COMMAND_IRQ_FORWARD_ADDRESS_SET, /**< Start forwarding all interrupts to this address @see ::sd_mbr_command_irq_forward_address_set_t*/ -}; - -/** @} */ - -/** @addtogroup NRF_MBR_TYPES Types - * @{ */ - -/**@brief This command copies part of a new SoftDevice - * The destination area is erased before copying. - * If dst is in the middle of a flash page, that whole flash page will be erased. - * If (dst+len) is in the middle of a flash page, that whole flash page will be erased. - * - * The user of this function is responsible for setting the BPROT registers. - * - * @retval ::NRF_SUCCESS indicates that the contents of the memory blocks where copied correctly. - * @retval ::NRF_ERROR_INTERNAL indicates that the contents of the memory blocks where not verified correctly after copying. - */ -typedef struct -{ - uint32_t *src; /**< Pointer to the source of data to be copied.*/ - uint32_t *dst; /**< Pointer to the destination where the content is to be copied.*/ - uint32_t len; /**< Number of 32 bit words to copy. Must be a multiple of @ref MBR_PAGE_SIZE_IN_WORDS words.*/ -} sd_mbr_command_copy_sd_t; - - -/**@brief This command works like memcmp, but takes the length in words. - * - * @retval ::NRF_SUCCESS indicates that the contents of both memory blocks are equal. - * @retval ::NRF_ERROR_NULL indicates that the contents of the memory blocks are not equal. - */ -typedef struct -{ - uint32_t *ptr1; /**< Pointer to block of memory. */ - uint32_t *ptr2; /**< Pointer to block of memory. */ - uint32_t len; /**< Number of 32 bit words to compare.*/ -} sd_mbr_command_compare_t; - - -/**@brief This command copies a new BootLoader. - * With this command, destination of BootLoader is always the address written in NRF_UICR->BOOTADDR. - * - * Destination is erased by this function. - * If (destination+bl_len) is in the middle of a flash page, that whole flash page will be erased. - * - * This function will use PROTENSET to protect the flash that is not intended to be written. - * - * On success, this function will not return. It will start the new BootLoader from reset-vector as normal. - * - * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. - * @retval ::NRF_ERROR_FORBIDDEN if NRF_UICR->BOOTADDR is not set. - * @retval ::NRF_ERROR_INVALID_LENGTH if parameters attempts to read or write outside flash area. - * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) - */ -typedef struct -{ - uint32_t *bl_src; /**< Pointer to the source of the Bootloader to be be copied.*/ - uint32_t bl_len; /**< Number of 32 bit words to copy for BootLoader. */ -} sd_mbr_command_copy_bl_t; - -/**@brief Change the address the MBR starts after a reset - * - * Once this function has been called, this address is where the MBR will start to forward interrupts to after a reset. - * - * To restore default forwarding this function should be called with @param address set to 0. - * The MBR will then start forwarding to interrupts to the address in NFR_UICR->BOOTADDR or to the SoftDevice if the BOOTADDR is not set. - * - * On success, this function will not return. It will reset the device. - * - * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. - * @retval ::NRF_ERROR_INVALID_ADDR if parameter address is outside of the flash size. - * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) - */ -typedef struct -{ - uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ -} sd_mbr_command_vector_table_base_set_t; - -/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the MBR - * Unlike sd_mbr_command_vector_table_base_set_t, this function does not reset, and it does not - * change where the MBR starts after reset. - * - * @retval ::NRF_SUCCESS - */ -typedef struct -{ - uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ -} sd_mbr_command_irq_forward_address_set_t; - -typedef struct -{ - uint32_t command; /**< type of command to be issued see @ref NRF_MBR_COMMANDS. */ - union - { - sd_mbr_command_copy_sd_t copy_sd; /**< Parameters for copy SoftDevice.*/ - sd_mbr_command_compare_t compare; /**< Parameters for verify.*/ - sd_mbr_command_copy_bl_t copy_bl; /**< Parameters for copy BootLoader. Requires parameter page. */ - sd_mbr_command_vector_table_base_set_t base_set; /**< Parameters for vector table base set. Requires parameter page.*/ - sd_mbr_command_irq_forward_address_set_t irq_forward_address_set; /**< Parameters for irq forward address set*/ - } params; -} sd_mbr_command_t; - -/** @} */ - -/** @addtogroup NRF_MBR_FUNCTIONS Functions - * @{ */ - -/**@brief Issue Master Boot Record commands - * - * Commands used when updating a SoftDevice and bootloader. - * - * The SD_MBR_COMMAND_COPY_BL and SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET requires parameters to be - * retained by the MBR when resetting the IC. This is done in a separate flash page - * provided by the application. The UICR register UICR.NRFFW[1] must be set - * to an address corresponding to a page in the application flash space. This page will be cleared - * by the MBR and used to store the command before reset. When the UICR.NRFFW[1] field is set - * the page it refers to must not be used by the application. If the UICR.NRFFW[1] is set to - * 0xFFFFFFFF (the default) MBR commands which use flash will be unavailable and return - * NRF_ERROR_NO_MEM. - * - * @param[in] param Pointer to a struct describing the command. - * - * @note For return values, see ::sd_mbr_command_copy_sd_t ::sd_mbr_command_copy_bl_t ::sd_mbr_command_compare_t ::sd_mbr_command_vector_table_base_set_t ::sd_mbr_command_irq_forward_address_set_t - * - * @retval NRF_ERROR_NO_MEM if UICR.NRFFW[1] is not set (i.e. is 0xFFFFFFFF). - * @retval NRF_ERROR_INVALID_PARAM if an invalid command is given. -*/ -SVCALL(SD_MBR_COMMAND, uint32_t, sd_mbr_command(sd_mbr_command_t* param)); - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // NRF_MBR_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_ble.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_ble.h deleted file mode 100644 index 470577b8aa2..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_ble.h +++ /dev/null @@ -1,620 +0,0 @@ -/* - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_COMMON BLE SoftDevice Common - @{ - @defgroup ble_api Events, type definitions and API calls - @{ - - @brief Module independent events, type definitions and API calls for the BLE SoftDevice. - - */ - -#ifndef BLE_H__ -#define BLE_H__ - -#include "ble_ranges.h" -#include "ble_types.h" -#include "ble_gap.h" -#include "ble_l2cap.h" -#include "ble_gatt.h" -#include "ble_gattc.h" -#include "ble_gatts.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_COMMON_ENUMERATIONS Enumerations - * @{ */ - -/** - * @brief Common API SVC numbers. - */ -enum BLE_COMMON_SVCS -{ - SD_BLE_ENABLE = BLE_SVC_BASE, /**< Enable and initialize the BLE stack */ - SD_BLE_EVT_GET, /**< Get an event from the pending events queue. */ - SD_BLE_UUID_VS_ADD, /**< Add a Vendor Specific UUID. */ - SD_BLE_UUID_DECODE, /**< Decode UUID bytes. */ - SD_BLE_UUID_ENCODE, /**< Encode UUID bytes. */ - SD_BLE_VERSION_GET, /**< Get the local version information (company ID, Link Layer Version, Link Layer Subversion). */ - SD_BLE_USER_MEM_REPLY, /**< User Memory Reply. */ - SD_BLE_OPT_SET, /**< Set a BLE option. */ - SD_BLE_OPT_GET, /**< Get a BLE option. */ - SD_BLE_CFG_SET, /**< Add a configuration to the BLE stack. */ -}; - -/** - * @brief BLE Module Independent Event IDs. - */ -enum BLE_COMMON_EVTS -{ - BLE_EVT_USER_MEM_REQUEST = BLE_EVT_BASE, /**< User Memory request. @ref ble_evt_user_mem_request_t */ - BLE_EVT_USER_MEM_RELEASE, /**< User Memory release. @ref ble_evt_user_mem_release_t */ -}; - -/**@brief BLE Connection Configuration IDs. - * - * IDs that uniquely identify a connection configuration. - */ -enum BLE_CONN_CFGS -{ - BLE_CONN_CFG_GAP = BLE_CONN_CFG_BASE, /**< BLE GAP specific connection configuration. */ - BLE_CONN_CFG_GATTC, /**< BLE GATTC specific connection configuration. */ - BLE_CONN_CFG_GATTS, /**< BLE GATTS specific connection configuration. */ - BLE_CONN_CFG_GATT, /**< BLE GATT specific connection configuration. */ - BLE_CONN_CFG_L2CAP, /**< BLE L2CAP specific connection configuration. */ -}; - -/**@brief BLE Common Configuration IDs. - * - * IDs that uniquely identify a common configuration. - */ -enum BLE_COMMON_CFGS -{ - BLE_COMMON_CFG_VS_UUID = BLE_CFG_BASE, /**< Vendor specific UUID configuration */ -}; - -/**@brief Common Option IDs. - * IDs that uniquely identify a common option. - */ -enum BLE_COMMON_OPTS -{ - BLE_COMMON_OPT_PA_LNA = BLE_OPT_BASE, /**< PA and LNA options */ - BLE_COMMON_OPT_CONN_EVT_EXT, /**< Extended connection events option */ -}; - -/** @} */ - -/** @addtogroup BLE_COMMON_DEFINES Defines - * @{ */ - -/** @brief Required pointer alignment for BLE Events. -*/ -#define BLE_EVT_PTR_ALIGNMENT 4 - -/** @brief Leaves the maximum of the two arguments. -*/ -#define BLE_MAX(a, b) ((a) < (b) ? (b) : (a)) - -/** @brief Maximum possible length for BLE Events. - * @note The highest value used for @ref ble_gatt_conn_cfg_t::att_mtu in any connection configuration shall be used as a parameter. - * If that value has not been configured for any connections then @ref BLE_GATT_ATT_MTU_DEFAULT must be used instead. -*/ -#define BLE_EVT_LEN_MAX(ATT_MTU) (BLE_MAX( \ - sizeof(ble_evt_t), \ - BLE_MAX( \ - offsetof(ble_evt_t, evt.gattc_evt.params.rel_disc_rsp.includes) + ((ATT_MTU) - 2) / 6 * sizeof(ble_gattc_include_t), \ - offsetof(ble_evt_t, evt.gattc_evt.params.attr_info_disc_rsp.info.attr_info16) + ((ATT_MTU) - 2) / 4 * sizeof(ble_gattc_attr_info16_t) \ - ) \ -)) - -/** @defgroup BLE_USER_MEM_TYPES User Memory Types - * @{ */ -#define BLE_USER_MEM_TYPE_INVALID 0x00 /**< Invalid User Memory Types. */ -#define BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES 0x01 /**< User Memory for GATTS queued writes. */ -/** @} */ - -/** @defgroup BLE_UUID_VS_COUNTS Vendor Specific UUID counts - * @{ - */ -#define BLE_UUID_VS_COUNT_DEFAULT 10 /**< Default VS UUID count. */ -#define BLE_UUID_VS_COUNT_MAX 254 /**< Maximum VS UUID count. */ -/** @} */ - -/** @defgroup BLE_COMMON_CFG_DEFAULTS Configuration defaults. - * @{ - */ -#define BLE_CONN_CFG_TAG_DEFAULT 0 /**< Default configuration tag, SoftDevice default connection configuration. */ - -/** @} */ - -/** @} */ - -/** @addtogroup BLE_COMMON_STRUCTURES Structures - * @{ */ - -/**@brief User Memory Block. */ -typedef struct -{ - uint8_t *p_mem; /**< Pointer to the start of the user memory block. */ - uint16_t len; /**< Length in bytes of the user memory block. */ -} ble_user_mem_block_t; - -/**@brief Event structure for @ref BLE_EVT_USER_MEM_REQUEST. */ -typedef struct -{ - uint8_t type; /**< User memory type, see @ref BLE_USER_MEM_TYPES. */ -} ble_evt_user_mem_request_t; - -/**@brief Event structure for @ref BLE_EVT_USER_MEM_RELEASE. */ -typedef struct -{ - uint8_t type; /**< User memory type, see @ref BLE_USER_MEM_TYPES. */ - ble_user_mem_block_t mem_block; /**< User memory block */ -} ble_evt_user_mem_release_t; - -/**@brief Event structure for events not associated with a specific function module. */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle on which this event occurred. */ - union - { - ble_evt_user_mem_request_t user_mem_request; /**< User Memory Request Event Parameters. */ - ble_evt_user_mem_release_t user_mem_release; /**< User Memory Release Event Parameters. */ - } params; /**< Event parameter union. */ -} ble_common_evt_t; - -/**@brief BLE Event header. */ -typedef struct -{ - uint16_t evt_id; /**< Value from a BLE__EVT series. */ - uint16_t evt_len; /**< Length in octets including this header. */ -} ble_evt_hdr_t; - -/**@brief Common BLE Event type, wrapping the module specific event reports. */ -typedef struct -{ - ble_evt_hdr_t header; /**< Event header. */ - union - { - ble_common_evt_t common_evt; /**< Common Event, evt_id in BLE_EVT_* series. */ - ble_gap_evt_t gap_evt; /**< GAP originated event, evt_id in BLE_GAP_EVT_* series. */ - ble_gattc_evt_t gattc_evt; /**< GATT client originated event, evt_id in BLE_GATTC_EVT* series. */ - ble_gatts_evt_t gatts_evt; /**< GATT server originated event, evt_id in BLE_GATTS_EVT* series. */ - ble_l2cap_evt_t l2cap_evt; /**< L2CAP originated event, evt_id in BLE_L2CAP_EVT* series. */ - } evt; /**< Event union. */ -} ble_evt_t; - - -/** - * @brief Version Information. - */ -typedef struct -{ - uint8_t version_number; /**< Link Layer Version number. See https://www.bluetooth.org/en-us/specification/assigned-numbers/link-layer for assigned values. */ - uint16_t company_id; /**< Company ID, Nordic Semiconductor's company ID is 89 (0x0059) (https://www.bluetooth.org/apps/content/Default.aspx?doc_id=49708). */ - uint16_t subversion_number; /**< Link Layer Sub Version number, corresponds to the SoftDevice Config ID or Firmware ID (FWID). */ -} ble_version_t; - -/** - * @brief Configuration parameters for the PA and LNA. - */ -typedef struct -{ - uint8_t enable :1; /**< Enable toggling for this amplifier */ - uint8_t active_high :1; /**< Set the pin to be active high */ - uint8_t gpio_pin :6; /**< The GPIO pin to toggle for this amplifier */ -} ble_pa_lna_cfg_t; - -/** - * @brief PA & LNA GPIO toggle configuration - * - * This option configures the SoftDevice to toggle pins when the radio is active for use with a power amplifier and/or - * a low noise amplifier. - * - * Toggling the pins is achieved by using two PPI channels and a GPIOTE channel. The hardware channel IDs are provided - * by the application and should be regarded as reserved as long as any PA/LNA toggling is enabled. - * - * @note @ref sd_ble_opt_get is not supported for this option. - * @note Setting this option while the radio is in use (i.e. any of the roles are active) may have undefined consequences - * and must be avoided by the application. - */ -typedef struct -{ - ble_pa_lna_cfg_t pa_cfg; /**< Power Amplifier configuration */ - ble_pa_lna_cfg_t lna_cfg; /**< Low Noise Amplifier configuration */ - - uint8_t ppi_ch_id_set; /**< PPI channel used for radio pin setting */ - uint8_t ppi_ch_id_clr; /**< PPI channel used for radio pin clearing */ - uint8_t gpiote_ch_id; /**< GPIOTE channel used for radio pin toggling */ -} ble_common_opt_pa_lna_t; - -/** - * @brief Configuration of extended BLE connection events. - * - * When enabled the SoftDevice will dynamically extend the connection event when possible. - * - * The connection event length is controlled by the connection configuration as set by @ref ble_gap_conn_cfg_t::event_length. - * The connection event can be extended if there is time to send another packet pair before the start of the next connection interval, - * and if there are no conflicts with other BLE roles requesting radio time. - * - * @note @ref sd_ble_opt_get is not supported for this option. - */ -typedef struct -{ - uint8_t enable : 1; /**< Enable extended BLE connection events, disabled by default. */ -} ble_common_opt_conn_evt_ext_t; - -/**@brief Option structure for common options. */ -typedef union -{ - ble_common_opt_pa_lna_t pa_lna; /**< Parameters for controlling PA and LNA pin toggling. */ - ble_common_opt_conn_evt_ext_t conn_evt_ext; /**< Parameters for enabling extended connection events. */ -} ble_common_opt_t; - -/**@brief Common BLE Option type, wrapping the module specific options. */ -typedef union -{ - ble_common_opt_t common_opt; /**< COMMON options, opt_id in @ref BLE_COMMON_OPTS series. */ - ble_gap_opt_t gap_opt; /**< GAP option, opt_id in @ref BLE_GAP_OPTS series. */ -} ble_opt_t; - -/**@brief BLE connection configuration type, wrapping the module specific configurations, set with - * @ref sd_ble_cfg_set. - * - * @note Connection configurations don't have to be set. - * In the case that no configurations has been set, or fewer connection configurations has been set than enabled connections, - * the default connection configuration will be automatically added for the remaining connections. - * When creating connections with the default configuration, @ref BLE_CONN_CFG_TAG_DEFAULT should be used in - * place of @ref ble_conn_cfg_t::conn_cfg_tag. See @ref sd_ble_gap_adv_start() and @ref sd_ble_gap_connect()" - * - * @mscs - * @mmsc{@ref BLE_CONN_CFG} - * @endmscs - - */ -typedef struct -{ - uint8_t conn_cfg_tag; /**< The application chosen tag it can use with the @ref sd_ble_gap_adv_start() and @ref sd_ble_gap_connect() - calls to select this configuration when creating a connection. - Must be different for all connection configurations added and not @ref BLE_CONN_CFG_TAG_DEFAULT. */ - union { - ble_gap_conn_cfg_t gap_conn_cfg; /**< GAP connection configuration, cfg_id is @ref BLE_CONN_CFG_GAP. */ - ble_gattc_conn_cfg_t gattc_conn_cfg; /**< GATTC connection configuration, cfg_id is @ref BLE_CONN_CFG_GATTC. */ - ble_gatts_conn_cfg_t gatts_conn_cfg; /**< GATTS connection configuration, cfg_id is @ref BLE_CONN_CFG_GATTS. */ - ble_gatt_conn_cfg_t gatt_conn_cfg; /**< GATT connection configuration, cfg_id is @ref BLE_CONN_CFG_GATT. */ - ble_l2cap_conn_cfg_t l2cap_conn_cfg; /**< L2CAP connection configuration, cfg_id is @ref BLE_CONN_CFG_L2CAP. */ - } params; /**< Connection configuration union. */ -} ble_conn_cfg_t; - -/** - * @brief Configuration of Vendor Specific UUIDs, set with @ref sd_ble_cfg_set. - * - * @retval ::NRF_ERROR_INVALID_PARAM Too many UUIDs configured. - */ -typedef struct -{ - uint8_t vs_uuid_count; /**< Number of 128-bit Vendor Specific UUID bases to allocate memory for. - Default value is @ref BLE_UUID_VS_COUNT_DEFAULT. Maximum value is - @ref BLE_UUID_VS_COUNT_MAX. */ -} ble_common_cfg_vs_uuid_t; - -/**@brief Common BLE Configuration type, wrapping the common configurations. */ -typedef union -{ - ble_common_cfg_vs_uuid_t vs_uuid_cfg; /**< Vendor specific UUID configuration, cfg_id is @ref BLE_COMMON_CFG_VS_UUID. */ -} ble_common_cfg_t; - -/**@brief BLE Configuration type, wrapping the module specific configurations. */ -typedef union -{ - ble_conn_cfg_t conn_cfg; /**< Connection specific configurations, cfg_id in @ref BLE_CONN_CFGS series. */ - ble_common_cfg_t common_cfg; /**< Global common configurations, cfg_id in @ref BLE_COMMON_CFGS series. */ - ble_gap_cfg_t gap_cfg; /**< Global GAP configurations, cfg_id in @ref BLE_GAP_CFGS series. */ - ble_gatts_cfg_t gatts_cfg; /**< Global GATTS configuration, cfg_id in @ref BLE_GATTS_CFGS series. */ -} ble_cfg_t; - -/** @} */ - -/** @addtogroup BLE_COMMON_FUNCTIONS Functions - * @{ */ - -/**@brief Enable the BLE stack - * - * @param[in, out] p_app_ram_base Pointer to a variable containing the start address of the - * application RAM region (APP_RAM_BASE). On return, this will - * contain the minimum start address of the application RAM region - * required by the SoftDevice for this configuration. - * - * @note The memory requirement for a specific configuration will not increase between SoftDevices - * with the same major version number. - * - * @note The value of *p_app_ram_base when the app has done no custom configuration of the - * SoftDevice, i.e. the app has not called @ref sd_ble_cfg_set before @ref sd_ble_enable, can - * be found in the release notes. - * - * @note At runtime the IC's RAM is split into 2 regions: The SoftDevice RAM region is located - * between 0x20000000 and APP_RAM_BASE-1 and the application's RAM region is located between - * APP_RAM_BASE and the start of the call stack. - * - * @details This call initializes the BLE stack, no BLE related function other than @ref - * sd_ble_cfg_set can be called before this one. - * - * @mscs - * @mmsc{@ref BLE_COMMON_ENABLE} - * @endmscs - * - * @retval ::NRF_SUCCESS The BLE stack has been initialized successfully. - * @retval ::NRF_ERROR_INVALID_STATE The BLE stack had already been initialized and cannot be reinitialized. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. - * @retval ::NRF_ERROR_NO_MEM The amount of memory assigned to the SoftDevice by *p_app_ram_base is not - * large enough to fit this configuration's memory requirement. Check *p_app_ram_base - * and set the start address of the application RAM region accordingly. - */ -SVCALL(SD_BLE_ENABLE, uint32_t, sd_ble_enable(uint32_t * p_app_ram_base)); - -/**@brief Add configurations for the BLE stack - * - * @param[in] cfg_id Config ID, see @ref BLE_CONN_CFGS, @ref BLE_COMMON_CFGS, @ref - * BLE_GAP_CFGS or @ref BLE_GATTS_CFGS. - * @param[in] p_cfg Pointer to a ble_cfg_t structure containing the configuration value. - * @param[in] app_ram_base The start address of the application RAM region (APP_RAM_BASE). - * See @ref sd_ble_enable for details about APP_RAM_BASE. - * - * @note The memory requirement for a specific configuration will not increase between SoftDevices - * with the same major version number. - * - * @note If a configuration is set more than once, the last one set is the one that takes effect on - * @ref sd_ble_enable. - * - * @note Any part of the BLE stack that is NOT configured with @ref sd_ble_cfg_set will have default - * configuration. - * - * @note @ref sd_ble_cfg_set may be called at any time when the SoftDevice is enabled (see @ref - * sd_softdevice_enable) while the BLE part of the SoftDevice is not enabled (see @ref - * sd_ble_enable). - * - * @note Error codes for the configurations are described in the configuration structs. - * - * @mscs - * @mmsc{@ref BLE_COMMON_ENABLE} - * @endmscs - * - * @retval ::NRF_SUCCESS The configuration has been added successfully. - * @retval ::NRF_ERROR_INVALID_STATE The BLE stack had already been initialized. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid cfg_id supplied. - * @retval ::NRF_ERROR_NO_MEM The amount of memory assigned to the SoftDevice by app_ram_base is not - * large enough to fit this configuration's memory requirement. - */ -SVCALL(SD_BLE_CFG_SET, uint32_t, sd_ble_cfg_set(uint32_t cfg_id, ble_cfg_t const * p_cfg, uint32_t app_ram_base)); - -/**@brief Get an event from the pending events queue. - * - * @param[out] p_dest Pointer to buffer to be filled in with an event, or NULL to retrieve the event length. - * This buffer must be aligned to the extend defined by @ref BLE_EVT_PTR_ALIGNMENT. - * The buffer should be interpreted as a @ref ble_evt_t struct. - * @param[in, out] p_len Pointer the length of the buffer, on return it is filled with the event length. - * - * @details This call allows the application to pull a BLE event from the BLE stack. The application is signaled that - * an event is available from the BLE stack by the triggering of the SD_EVT_IRQn interrupt. - * The application is free to choose whether to call this function from thread mode (main context) or directly from the - * Interrupt Service Routine that maps to SD_EVT_IRQn. In any case however, and because the BLE stack runs at a higher - * priority than the application, this function should be called in a loop (until @ref NRF_ERROR_NOT_FOUND is returned) - * every time SD_EVT_IRQn is raised to ensure that all available events are pulled from the BLE stack. Failure to do so - * could potentially leave events in the internal queue without the application being aware of this fact. - * - * Sizing the p_dest buffer is equally important, since the application needs to provide all the memory necessary for the event to - * be copied into application memory. If the buffer provided is not large enough to fit the entire contents of the event, - * @ref NRF_ERROR_DATA_SIZE will be returned and the application can then call again with a larger buffer size. - * The maximum possible event length is defined by @ref BLE_EVT_LEN_MAX. The application may also "peek" the event length - * by providing p_dest as a NULL pointer and inspecting the value of *p_len upon return: - * - * \code - * uint16_t len; - * errcode = sd_ble_evt_get(NULL, &len); - * \endcode - * - * @mscs - * @mmsc{@ref BLE_COMMON_IRQ_EVT_MSC} - * @mmsc{@ref BLE_COMMON_THREAD_EVT_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Event pulled and stored into the supplied buffer. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. - * @retval ::NRF_ERROR_NOT_FOUND No events ready to be pulled. - * @retval ::NRF_ERROR_DATA_SIZE Event ready but could not fit into the supplied buffer. - */ -SVCALL(SD_BLE_EVT_GET, uint32_t, sd_ble_evt_get(uint8_t *p_dest, uint16_t *p_len)); - - -/**@brief Add a Vendor Specific base UUID. - * - * @details This call enables the application to add a vendor specific base UUID to the BLE stack's table, for later - * use with all other modules and APIs. This then allows the application to use the shorter, 24-bit @ref ble_uuid_t - * format when dealing with both 16-bit and 128-bit UUIDs without having to check for lengths and having split code - * paths. This is accomplished by extending the grouping mechanism that the Bluetooth SIG standard base UUID uses - * for all other 128-bit UUIDs. The type field in the @ref ble_uuid_t structure is an index (relative to - * @ref BLE_UUID_TYPE_VENDOR_BEGIN) to the table populated by multiple calls to this function, and the UUID field - * in the same structure contains the 2 bytes at indexes 12 and 13. The number of possible 128-bit UUIDs available to - * the application is therefore the number of Vendor Specific UUIDs added with the help of this function times 65536, - * although restricted to modifying bytes 12 and 13 for each of the entries in the supplied array. - * - * @note Bytes 12 and 13 of the provided UUID will not be used internally, since those are always replaced by - * the 16-bit uuid field in @ref ble_uuid_t. - * - * @note If a UUID is already present in the BLE stack's internal table, the corresponding index will be returned in - * p_uuid_type along with an NRF_SUCCESS error code. - * - * @param[in] p_vs_uuid Pointer to a 16-octet (128-bit) little endian Vendor Specific UUID disregarding - * bytes 12 and 13. - * @param[out] p_uuid_type Pointer to a uint8_t where the type field in @ref ble_uuid_t corresponding to this UUID will be stored. - * - * @retval ::NRF_SUCCESS Successfully added the Vendor Specific UUID. - * @retval ::NRF_ERROR_INVALID_ADDR If p_vs_uuid or p_uuid_type is NULL or invalid. - * @retval ::NRF_ERROR_NO_MEM If there are no more free slots for VS UUIDs. - */ -SVCALL(SD_BLE_UUID_VS_ADD, uint32_t, sd_ble_uuid_vs_add(ble_uuid128_t const *p_vs_uuid, uint8_t *p_uuid_type)); - - -/** @brief Decode little endian raw UUID bytes (16-bit or 128-bit) into a 24 bit @ref ble_uuid_t structure. - * - * @details The raw UUID bytes excluding bytes 12 and 13 (i.e. bytes 0-11 and 14-15) of p_uuid_le are compared - * to the corresponding ones in each entry of the table of vendor specific UUIDs populated with @ref sd_ble_uuid_vs_add - * to look for a match. If there is such a match, bytes 12 and 13 are returned as p_uuid->uuid and the index - * relative to @ref BLE_UUID_TYPE_VENDOR_BEGIN as p_uuid->type. - * - * @note If the UUID length supplied is 2, then the type set by this call will always be @ref BLE_UUID_TYPE_BLE. - * - * @param[in] uuid_le_len Length in bytes of the buffer pointed to by p_uuid_le (must be 2 or 16 bytes). - * @param[in] p_uuid_le Pointer pointing to little endian raw UUID bytes. - * @param[out] p_uuid Pointer to a @ref ble_uuid_t structure to be filled in. - * - * @retval ::NRF_SUCCESS Successfully decoded into the @ref ble_uuid_t structure. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_LENGTH Invalid UUID length. - * @retval ::NRF_ERROR_NOT_FOUND For a 128-bit UUID, no match in the populated table of UUIDs. - */ -SVCALL(SD_BLE_UUID_DECODE, uint32_t, sd_ble_uuid_decode(uint8_t uuid_le_len, uint8_t const *p_uuid_le, ble_uuid_t *p_uuid)); - - -/** @brief Encode a @ref ble_uuid_t structure into little endian raw UUID bytes (16-bit or 128-bit). - * - * @note The pointer to the destination buffer p_uuid_le may be NULL, in which case only the validity and size of p_uuid is computed. - * - * @param[in] p_uuid Pointer to a @ref ble_uuid_t structure that will be encoded into bytes. - * @param[out] p_uuid_le_len Pointer to a uint8_t that will be filled with the encoded length (2 or 16 bytes). - * @param[out] p_uuid_le Pointer to a buffer where the little endian raw UUID bytes (2 or 16) will be stored. - * - * @retval ::NRF_SUCCESS Successfully encoded into the buffer. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid UUID type. - */ -SVCALL(SD_BLE_UUID_ENCODE, uint32_t, sd_ble_uuid_encode(ble_uuid_t const *p_uuid, uint8_t *p_uuid_le_len, uint8_t *p_uuid_le)); - - -/**@brief Get Version Information. - * - * @details This call allows the application to get the BLE stack version information. - * - * @param[out] p_version Pointer to a ble_version_t structure to be filled in. - * - * @retval ::NRF_SUCCESS Version information stored successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY The BLE stack is busy (typically doing a locally-initiated disconnection procedure). - */ -SVCALL(SD_BLE_VERSION_GET, uint32_t, sd_ble_version_get(ble_version_t *p_version)); - - -/**@brief Provide a user memory block. - * - * @note This call can only be used as a response to a @ref BLE_EVT_USER_MEM_REQUEST event issued to the application. - * - * @param[in] conn_handle Connection handle. - * @param[in] p_block Pointer to a user memory block structure or NULL if memory is managed by the application. - * - * @mscs - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_PEER_CANCEL_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_NOAUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Successfully queued a response to the peer. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_LENGTH Invalid user memory block length supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection state or no user memory request pending. - */ -SVCALL(SD_BLE_USER_MEM_REPLY, uint32_t, sd_ble_user_mem_reply(uint16_t conn_handle, ble_user_mem_block_t const *p_block)); - -/**@brief Set a BLE option. - * - * @details This call allows the application to set the value of an option. - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC} - * @endmscs - * - * @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS. - * @param[in] p_opt Pointer to a ble_opt_t structure containing the option value. - * - * @retval ::NRF_SUCCESS Option set successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. - * @retval ::NRF_ERROR_INVALID_STATE Unable to set the parameter at this time. - * @retval ::NRF_ERROR_BUSY The BLE stack is busy or the previous procedure has not completed. - */ -SVCALL(SD_BLE_OPT_SET, uint32_t, sd_ble_opt_set(uint32_t opt_id, ble_opt_t const *p_opt)); - - -/**@brief Get a BLE option. - * - * @details This call allows the application to retrieve the value of an option. - * - * @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS. - * @param[out] p_opt Pointer to a ble_opt_t structure to be filled in. - * - * @retval ::NRF_SUCCESS Option retrieved successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. - * @retval ::NRF_ERROR_INVALID_STATE Unable to retrieve the parameter at this time. - * @retval ::NRF_ERROR_BUSY The BLE stack is busy or the previous procedure has not completed. - * @retval ::NRF_ERROR_NOT_SUPPORTED This option is not supported. - * - */ -SVCALL(SD_BLE_OPT_GET, uint32_t, sd_ble_opt_get(uint32_t opt_id, ble_opt_t *p_opt)); - -/** @} */ -#ifdef __cplusplus -} -#endif -#endif /* BLE_H__ */ - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_error.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_error.h deleted file mode 100644 index 6badee98e56..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_error.h +++ /dev/null @@ -1,90 +0,0 @@ -/* - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - - /** - @defgroup nrf_error SoftDevice Global Error Codes - @{ - - @brief Global Error definitions -*/ - -/* Header guard */ -#ifndef NRF_ERROR_H__ -#define NRF_ERROR_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/** @defgroup NRF_ERRORS_BASE Error Codes Base number definitions - * @{ */ -#define NRF_ERROR_BASE_NUM (0x0) ///< Global error base -#define NRF_ERROR_SDM_BASE_NUM (0x1000) ///< SDM error base -#define NRF_ERROR_SOC_BASE_NUM (0x2000) ///< SoC error base -#define NRF_ERROR_STK_BASE_NUM (0x3000) ///< STK error base -/** @} */ - -#define NRF_SUCCESS (NRF_ERROR_BASE_NUM + 0) ///< Successful command -#define NRF_ERROR_SVC_HANDLER_MISSING (NRF_ERROR_BASE_NUM + 1) ///< SVC handler is missing -#define NRF_ERROR_SOFTDEVICE_NOT_ENABLED (NRF_ERROR_BASE_NUM + 2) ///< SoftDevice has not been enabled -#define NRF_ERROR_INTERNAL (NRF_ERROR_BASE_NUM + 3) ///< Internal Error -#define NRF_ERROR_NO_MEM (NRF_ERROR_BASE_NUM + 4) ///< No Memory for operation -#define NRF_ERROR_NOT_FOUND (NRF_ERROR_BASE_NUM + 5) ///< Not found -#define NRF_ERROR_NOT_SUPPORTED (NRF_ERROR_BASE_NUM + 6) ///< Not supported -#define NRF_ERROR_INVALID_PARAM (NRF_ERROR_BASE_NUM + 7) ///< Invalid Parameter -#define NRF_ERROR_INVALID_STATE (NRF_ERROR_BASE_NUM + 8) ///< Invalid state, operation disallowed in this state -#define NRF_ERROR_INVALID_LENGTH (NRF_ERROR_BASE_NUM + 9) ///< Invalid Length -#define NRF_ERROR_INVALID_FLAGS (NRF_ERROR_BASE_NUM + 10) ///< Invalid Flags -#define NRF_ERROR_INVALID_DATA (NRF_ERROR_BASE_NUM + 11) ///< Invalid Data -#define NRF_ERROR_DATA_SIZE (NRF_ERROR_BASE_NUM + 12) ///< Invalid Data size -#define NRF_ERROR_TIMEOUT (NRF_ERROR_BASE_NUM + 13) ///< Operation timed out -#define NRF_ERROR_NULL (NRF_ERROR_BASE_NUM + 14) ///< Null Pointer -#define NRF_ERROR_FORBIDDEN (NRF_ERROR_BASE_NUM + 15) ///< Forbidden Operation -#define NRF_ERROR_INVALID_ADDR (NRF_ERROR_BASE_NUM + 16) ///< Bad Memory Address -#define NRF_ERROR_BUSY (NRF_ERROR_BASE_NUM + 17) ///< Busy -#define NRF_ERROR_CONN_COUNT (NRF_ERROR_BASE_NUM + 18) ///< Maximum connection count exceeded. -#define NRF_ERROR_RESOURCES (NRF_ERROR_BASE_NUM + 19) ///< Not enough resources for operation - -#ifdef __cplusplus -} -#endif -#endif // NRF_ERROR_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_error_sdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_error_sdm.h deleted file mode 100644 index 530959b9d67..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_error_sdm.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - - /** - @addtogroup nrf_sdm_api - @{ - @defgroup nrf_sdm_error SoftDevice Manager Error Codes - @{ - - @brief Error definitions for the SDM API -*/ - -/* Header guard */ -#ifndef NRF_ERROR_SDM_H__ -#define NRF_ERROR_SDM_H__ - -#include "nrf_error.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#define NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN (NRF_ERROR_SDM_BASE_NUM + 0) ///< Unknown LFCLK source. -#define NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION (NRF_ERROR_SDM_BASE_NUM + 1) ///< Incorrect interrupt configuration (can be caused by using illegal priority levels, or having enabled SoftDevice interrupts). -#define NRF_ERROR_SDM_INCORRECT_CLENR0 (NRF_ERROR_SDM_BASE_NUM + 2) ///< Incorrect CLENR0 (can be caused by erroneous SoftDevice flashing). - -#ifdef __cplusplus -} -#endif -#endif // NRF_ERROR_SDM_H__ - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_error_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_error_soc.h deleted file mode 100644 index 1e784b8db38..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_error_soc.h +++ /dev/null @@ -1,85 +0,0 @@ -/* - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup nrf_soc_api - @{ - @defgroup nrf_soc_error SoC Library Error Codes - @{ - - @brief Error definitions for the SoC library - -*/ - -/* Header guard */ -#ifndef NRF_ERROR_SOC_H__ -#define NRF_ERROR_SOC_H__ - -#include "nrf_error.h" -#ifdef __cplusplus -extern "C" { -#endif - -/* Mutex Errors */ -#define NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN (NRF_ERROR_SOC_BASE_NUM + 0) ///< Mutex already taken - -/* NVIC errors */ -#define NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE (NRF_ERROR_SOC_BASE_NUM + 1) ///< NVIC interrupt not available -#define NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED (NRF_ERROR_SOC_BASE_NUM + 2) ///< NVIC interrupt priority not allowed -#define NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN (NRF_ERROR_SOC_BASE_NUM + 3) ///< NVIC should not return - -/* Power errors */ -#define NRF_ERROR_SOC_POWER_MODE_UNKNOWN (NRF_ERROR_SOC_BASE_NUM + 4) ///< Power mode unknown -#define NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN (NRF_ERROR_SOC_BASE_NUM + 5) ///< Power POF threshold unknown -#define NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN (NRF_ERROR_SOC_BASE_NUM + 6) ///< Power off should not return - -/* Rand errors */ -#define NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES (NRF_ERROR_SOC_BASE_NUM + 7) ///< RAND not enough values - -/* PPI errors */ -#define NRF_ERROR_SOC_PPI_INVALID_CHANNEL (NRF_ERROR_SOC_BASE_NUM + 8) ///< Invalid PPI Channel -#define NRF_ERROR_SOC_PPI_INVALID_GROUP (NRF_ERROR_SOC_BASE_NUM + 9) ///< Invalid PPI Group - -#ifdef __cplusplus -} -#endif -#endif // NRF_ERROR_SOC_H__ -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_nvic.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_nvic.h deleted file mode 100644 index 40537b45a21..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_nvic.h +++ /dev/null @@ -1,485 +0,0 @@ -/* - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * @defgroup nrf_nvic_api SoftDevice NVIC API - * @{ - * - * @note In order to use this module, the following code has to be added to a .c file: - * \code - * nrf_nvic_state_t nrf_nvic_state = {0}; - * \endcode - * - * @note Definitions and declarations starting with __ (double underscore) in this header file are - * not intended for direct use by the application. - * - * @brief APIs for the accessing NVIC when using a SoftDevice. - * - */ - -#ifndef NRF_NVIC_H__ -#define NRF_NVIC_H__ - -#include -#include "nrf.h" - -#include "nrf_error_soc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@addtogroup NRF_NVIC_DEFINES Defines - * @{ */ - -/**@defgroup NRF_NVIC_ISER_DEFINES SoftDevice NVIC internal definitions - * @{ */ - -#define __NRF_NVIC_NVMC_IRQn (30) /**< The peripheral ID of the NVMC. IRQ numbers are used to identify peripherals, but the NVMC doesn't have an IRQ number in the MDK. */ - -#define __NRF_NVIC_ISER_COUNT (2) /**< The number of ISER/ICER registers in the NVIC that are used. */ - -/**@brief Interrupts used by the SoftDevice, with IRQn in the range 0-31. */ -#define __NRF_NVIC_SD_IRQS_0 ((uint32_t)( \ - (1U << POWER_CLOCK_IRQn) \ - | (1U << RADIO_IRQn) \ - | (1U << RTC0_IRQn) \ - | (1U << TIMER0_IRQn) \ - | (1U << RNG_IRQn) \ - | (1U << ECB_IRQn) \ - | (1U << CCM_AAR_IRQn) \ - | (1U << TEMP_IRQn) \ - | (1U << __NRF_NVIC_NVMC_IRQn) \ - | (1U << (uint32_t)SWI5_EGU5_IRQn) \ - )) - -/**@brief Interrupts used by the SoftDevice, with IRQn in the range 32-63. */ -#define __NRF_NVIC_SD_IRQS_1 ((uint32_t)0) - -/**@brief Interrupts available for to application, with IRQn in the range 0-31. */ -#define __NRF_NVIC_APP_IRQS_0 (~__NRF_NVIC_SD_IRQS_0) - -/**@brief Interrupts available for to application, with IRQn in the range 32-63. */ -#define __NRF_NVIC_APP_IRQS_1 (~__NRF_NVIC_SD_IRQS_1) - -/**@} */ - -/**@} */ - -/**@addtogroup NRF_NVIC_VARIABLES Variables - * @{ */ - -/**@brief Type representing the state struct for the SoftDevice NVIC module. */ -typedef struct -{ - uint32_t volatile __irq_masks[__NRF_NVIC_ISER_COUNT]; /**< IRQs enabled by the application in the NVIC. */ - uint32_t volatile __cr_flag; /**< Non-zero if already in a critical region */ -} nrf_nvic_state_t; - -/**@brief Variable keeping the state for the SoftDevice NVIC module. This must be declared in an - * application source file. */ -extern nrf_nvic_state_t nrf_nvic_state; - -/**@} */ - -/**@addtogroup NRF_NVIC_INTERNAL_FUNCTIONS SoftDevice NVIC internal functions - * @{ */ - -/**@brief Disables IRQ interrupts globally, including the SoftDevice's interrupts. - * - * @retval The value of PRIMASK prior to disabling the interrupts. - */ -__STATIC_INLINE int __sd_nvic_irq_disable(void); - -/**@brief Enables IRQ interrupts globally, including the SoftDevice's interrupts. - */ -__STATIC_INLINE void __sd_nvic_irq_enable(void); - -/**@brief Checks if IRQn is available to application - * @param[in] IRQn IRQ to check - * - * @retval 1 (true) if the IRQ to check is available to the application - */ -__STATIC_INLINE uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn); - -/**@brief Checks if priority is available to application - * @param[in] priority priority to check - * - * @retval 1 (true) if the priority to check is available to the application - */ -__STATIC_INLINE uint32_t __sd_nvic_is_app_accessible_priority(uint32_t priority); - -/**@} */ - -/**@addtogroup NRF_NVIC_FUNCTIONS SoftDevice NVIC public functions - * @{ */ - -/**@brief Enable External Interrupt. - * @note Corresponds to NVIC_EnableIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_EnableIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt was enabled. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt has a priority not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn); - -/**@brief Disable External Interrupt. - * @note Corresponds to NVIC_DisableIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_DisableIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt was disabled. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn); - -/**@brief Get Pending Interrupt. - * @note Corresponds to NVIC_GetPendingIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_GetPendingIRQ documentation in CMSIS. - * @param[out] p_pending_irq Return value from NVIC_GetPendingIRQ. - * - * @retval ::NRF_SUCCESS The interrupt is available for the application. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq); - -/**@brief Set Pending Interrupt. - * @note Corresponds to NVIC_SetPendingIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_SetPendingIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt is set pending. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn); - -/**@brief Clear Pending Interrupt. - * @note Corresponds to NVIC_ClearPendingIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_ClearPendingIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt pending flag is cleared. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn); - -/**@brief Set Interrupt Priority. - * @note Corresponds to NVIC_SetPriority in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * @pre Priority is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_SetPriority documentation in CMSIS. - * @param[in] priority A valid IRQ priority for use by the application. - * - * @retval ::NRF_SUCCESS The interrupt and priority level is available for the application. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt priority is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority); - -/**@brief Get Interrupt Priority. - * @note Corresponds to NVIC_GetPriority in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_GetPriority documentation in CMSIS. - * @param[out] p_priority Return value from NVIC_GetPriority. - * - * @retval ::NRF_SUCCESS The interrupt priority is returned in p_priority. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE - IRQn is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority); - -/**@brief System Reset. - * @note Corresponds to NVIC_SystemReset in CMSIS. - * - * @retval ::NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN - */ -__STATIC_INLINE uint32_t sd_nvic_SystemReset(void); - -/**@brief Enter critical region. - * - * @post Application interrupts will be disabled. - * @note sd_nvic_critical_region_enter() and ::sd_nvic_critical_region_exit() must be called in matching pairs inside each - * execution context - * @sa sd_nvic_critical_region_exit - * - * @param[out] p_is_nested_critical_region If 1, the application is now in a nested critical region. - * - * @retval ::NRF_SUCCESS - */ -__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region); - -/**@brief Exit critical region. - * - * @pre Application has entered a critical region using ::sd_nvic_critical_region_enter. - * @post If not in a nested critical region, the application interrupts will restored to the state before ::sd_nvic_critical_region_enter was called. - * - * @param[in] is_nested_critical_region If this is set to 1, the critical region won't be exited. @sa sd_nvic_critical_region_enter. - * - * @retval ::NRF_SUCCESS - */ -__STATIC_INLINE uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region); - -/**@} */ - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE int __sd_nvic_irq_disable(void) -{ - int pm = __get_PRIMASK(); - __disable_irq(); - return pm; -} - -__STATIC_INLINE void __sd_nvic_irq_enable(void) -{ - __enable_irq(); -} - -__STATIC_INLINE uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn) -{ - if (IRQn < 32) - { - return ((1UL<= (1 << __NVIC_PRIO_BITS)) - { - return 0; - } - if( priority == 0 - || priority == 1 - || priority == 4 - ) - { - return 0; - } - return 1; -} - - -__STATIC_INLINE uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn) -{ - if (!__sd_nvic_app_accessible_irq(IRQn)) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } - if (!__sd_nvic_is_app_accessible_priority(NVIC_GetPriority(IRQn))) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED; - } - - if (nrf_nvic_state.__cr_flag) - { - nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] |= (uint32_t)(1 << ((uint32_t)((int32_t)IRQn) & (uint32_t)0x1F)); - } - else - { - NVIC_EnableIRQ(IRQn); - } - return NRF_SUCCESS; -} - -__STATIC_INLINE uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn) -{ - if (!__sd_nvic_app_accessible_irq(IRQn)) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } - - if (nrf_nvic_state.__cr_flag) - { - nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] &= ~(1UL << ((uint32_t)(IRQn) & 0x1F)); - } - else - { - NVIC_DisableIRQ(IRQn); - } - - return NRF_SUCCESS; -} - -__STATIC_INLINE uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq) -{ - if (__sd_nvic_app_accessible_irq(IRQn)) - { - *p_pending_irq = NVIC_GetPendingIRQ(IRQn); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } -} - -__STATIC_INLINE uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn) -{ - if (__sd_nvic_app_accessible_irq(IRQn)) - { - NVIC_SetPendingIRQ(IRQn); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } -} - -__STATIC_INLINE uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn) -{ - if (__sd_nvic_app_accessible_irq(IRQn)) - { - NVIC_ClearPendingIRQ(IRQn); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } -} - -__STATIC_INLINE uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if (!__sd_nvic_app_accessible_irq(IRQn)) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } - - if (!__sd_nvic_is_app_accessible_priority(priority)) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED; - } - - NVIC_SetPriority(IRQn, (uint32_t)priority); - return NRF_SUCCESS; -} - -__STATIC_INLINE uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority) -{ - if (__sd_nvic_app_accessible_irq(IRQn)) - { - *p_priority = (NVIC_GetPriority(IRQn) & 0xFF); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } -} - -__STATIC_INLINE uint32_t sd_nvic_SystemReset(void) -{ - NVIC_SystemReset(); - return NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN; -} - -__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region) -{ - int was_masked = __sd_nvic_irq_disable(); - if (!nrf_nvic_state.__cr_flag) - { - nrf_nvic_state.__cr_flag = 1; - nrf_nvic_state.__irq_masks[0] = ( NVIC->ICER[0] & __NRF_NVIC_APP_IRQS_0 ); - NVIC->ICER[0] = __NRF_NVIC_APP_IRQS_0; - nrf_nvic_state.__irq_masks[1] = ( NVIC->ICER[1] & __NRF_NVIC_APP_IRQS_1 ); - NVIC->ICER[1] = __NRF_NVIC_APP_IRQS_1; - *p_is_nested_critical_region = 0; - } - else - { - *p_is_nested_critical_region = 1; - } - if (!was_masked) - { - __sd_nvic_irq_enable(); - } - return NRF_SUCCESS; -} - -__STATIC_INLINE uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region) -{ - if (nrf_nvic_state.__cr_flag && (is_nested_critical_region == 0)) - { - int was_masked = __sd_nvic_irq_disable(); - NVIC->ISER[0] = nrf_nvic_state.__irq_masks[0]; - NVIC->ISER[1] = nrf_nvic_state.__irq_masks[1]; - nrf_nvic_state.__cr_flag = 0; - if (!was_masked) - { - __sd_nvic_irq_enable(); - } - } - - return NRF_SUCCESS; -} - -#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ - -#ifdef __cplusplus -} -#endif - -#endif // NRF_NVIC_H__ - -/**@} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_sd_def.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_sd_def.h deleted file mode 100644 index 0b4d221d6a4..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_sd_def.h +++ /dev/null @@ -1,59 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_SD_DEF_H__ -#define NRF_SD_DEF_H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#define SD_PPI_CHANNELS_USED 0xFFFE0000uL /**< PPI channels utilized by SotfDevice (not available to the application). */ -#define SD_PPI_GROUPS_USED 0x0000000CuL /**< PPI groups utilized by SoftDevice (not available to the application). */ -#define SD_TIMERS_USED 0x00000001uL /**< Timers used by SoftDevice. */ -#define SD_SWI_USED 0x0000003CuL /**< Software interrupts used by SoftDevice */ - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_SD_DEF_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_sdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_sdm.h deleted file mode 100644 index c41d86d46bc..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_sdm.h +++ /dev/null @@ -1,355 +0,0 @@ -/* - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @defgroup nrf_sdm_api SoftDevice Manager API - @{ - - @brief APIs for SoftDevice management. - -*/ - -#ifndef NRF_SDM_H__ -#define NRF_SDM_H__ - -#include "nrf_svc.h" -#include "nrf.h" -#include "nrf_soc.h" -#include "nrf_error_sdm.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup NRF_SDM_DEFINES Defines - * @{ */ -#ifdef NRFSOC_DOXYGEN -/// Declared in nrf_mbr.h -#define MBR_SIZE 0 -#warning test -#endif - -/** @brief The major version for the SoftDevice binary distributed with this header file. */ -#define SD_MAJOR_VERSION (5) - -/** @brief The minor version for the SoftDevice binary distributed with this header file. */ -#define SD_MINOR_VERSION (0) - -/** @brief The bugfix version for the SoftDevice binary distributed with this header file. */ -#define SD_BUGFIX_VERSION (0) - -/** @brief The full version number for the SoftDevice binary this header file was distributed - * with, as a decimal number in the form Mmmmbbb, where: - * - M is major version (one or more digits) - * - mmm is minor version (three digits) - * - bbb is bugfix version (three digits). */ -#define SD_VERSION (SD_MAJOR_VERSION * 1000000 + SD_MINOR_VERSION * 1000 + SD_BUGFIX_VERSION) - -/** @brief SoftDevice Manager SVC Base number. */ -#define SDM_SVC_BASE 0x10 - -/** @brief SoftDevice unique string size in bytes. */ -#define SD_UNIQUE_STR_SIZE 20 - -/** @brief Invalid info field. Returned when an info field does not exist. */ -#define SDM_INFO_FIELD_INVALID (0) - -/** @brief Defines the SoftDevice Information Structure location (address) as an offset from -the start of the SoftDevice (without MBR)*/ -#define SOFTDEVICE_INFO_STRUCT_OFFSET (0x2000) - -/** @brief Defines the absolute SoftDevice Information Structure location (address) when the - * SoftDevice is installed just above the MBR (the usual case). */ -#define SOFTDEVICE_INFO_STRUCT_ADDRESS (SOFTDEVICE_INFO_STRUCT_OFFSET + MBR_SIZE) - -/** @brief Defines the offset for the SoftDevice Information Structure size value relative to the - * SoftDevice base address. The size value is of type uint8_t. */ -#define SD_INFO_STRUCT_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET) - -/** @brief Defines the offset for the SoftDevice size value relative to the SoftDevice base address. - * The size value is of type uint32_t. */ -#define SD_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x08) - -/** @brief Defines the offset for FWID value relative to the SoftDevice base address. The FWID value - * is of type uint16_t. */ -#define SD_FWID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x0C) - -/** @brief Defines the offset for the SoftDevice ID relative to the SoftDevice base address. The ID - * is of type uint32_t. */ -#define SD_ID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x10) - -/** @brief Defines the offset for the SoftDevice version relative to the SoftDevice base address in - * the same format as @ref SD_VERSION, stored as an uint32_t. */ -#define SD_VERSION_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x14) - -/** @brief Defines the offset for the SoftDevice unique string relative to the SoftDevice base address. - * The SD_UNIQUE_STR is stored as an array of uint8_t. The size of array is @ref SD_UNIQUE_STR_SIZE. - */ -#define SD_UNIQUE_STR_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x18) - -/** @brief Defines a macro for retrieving the actual SoftDevice Information Structure size value - * from a given base address. Use @ref MBR_SIZE as the argument when the SoftDevice is - * installed just above the MBR (the usual case). */ -#define SD_INFO_STRUCT_SIZE_GET(baseaddr) (*((uint8_t *) ((baseaddr) + SD_INFO_STRUCT_SIZE_OFFSET))) - -/** @brief Defines a macro for retrieving the actual SoftDevice size value from a given base - * address. Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above - * the MBR (the usual case). */ -#define SD_SIZE_GET(baseaddr) (*((uint32_t *) ((baseaddr) + SD_SIZE_OFFSET))) - -/** @brief Defines a macro for retrieving the actual FWID value from a given base address. Use @ref - * MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the usual - * case). */ -#define SD_FWID_GET(baseaddr) (*((uint16_t *) ((baseaddr) + SD_FWID_OFFSET))) - -/** @brief Defines a macro for retrieving the actual SoftDevice ID from a given base address. Use - * @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the - * usual case). */ -#define SD_ID_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_ID_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ - ? (*((uint32_t *) ((baseaddr) + SD_ID_OFFSET))) : SDM_INFO_FIELD_INVALID) - -/** @brief Defines a macro for retrieving the actual SoftDevice version from a given base address. - * Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR - * (the usual case). */ -#define SD_VERSION_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_VERSION_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ - ? (*((uint32_t *) ((baseaddr) + SD_VERSION_OFFSET))) : SDM_INFO_FIELD_INVALID) - -/** @brief Defines a macro for retrieving the address of SoftDevice unique str based on a given base address. - * Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR - * (the usual case). */ -#define SD_UNIQUE_STR_ADDR_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_UNIQUE_STR_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ - ? (((uint8_t *) ((baseaddr) + SD_UNIQUE_STR_OFFSET))) : SDM_INFO_FIELD_INVALID) - -/**@defgroup NRF_FAULT_ID_RANGES Fault ID ranges - * @{ */ -#define NRF_FAULT_ID_SD_RANGE_START 0x00000000 /**< SoftDevice ID range start. */ -#define NRF_FAULT_ID_APP_RANGE_START 0x00001000 /**< Application ID range start. */ -/**@} */ - -/**@defgroup NRF_FAULT_IDS Fault ID types - * @{ */ -#define NRF_FAULT_ID_SD_ASSERT (NRF_FAULT_ID_SD_RANGE_START + 1) /**< SoftDevice assertion. The info parameter is reserved for future used. */ -#define NRF_FAULT_ID_APP_MEMACC (NRF_FAULT_ID_APP_RANGE_START + 1) /**< Application invalid memory access. The info parameter will contain 0x00000000, - in case of SoftDevice RAM access violation. In case of SoftDevice peripheral - register violation the info parameter will contain the sub-region number of - PREGION[0], on whose address range the disallowed write access caused the - memory access fault. */ -/**@} */ - -/** @} */ - -/** @addtogroup NRF_SDM_ENUMS Enumerations - * @{ */ - -/**@brief nRF SoftDevice Manager API SVC numbers. */ -enum NRF_SD_SVCS -{ - SD_SOFTDEVICE_ENABLE = SDM_SVC_BASE, /**< ::sd_softdevice_enable */ - SD_SOFTDEVICE_DISABLE, /**< ::sd_softdevice_disable */ - SD_SOFTDEVICE_IS_ENABLED, /**< ::sd_softdevice_is_enabled */ - SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, /**< ::sd_softdevice_vector_table_base_set */ - SVC_SDM_LAST /**< Placeholder for last SDM SVC */ -}; - -/** @} */ - -/** @addtogroup NRF_SDM_DEFINES Defines - * @{ */ - -/**@defgroup NRF_CLOCK_LF_ACCURACY Clock accuracy - * @{ */ - -#define NRF_CLOCK_LF_ACCURACY_250_PPM (0) /**< Default: 250 ppm */ -#define NRF_CLOCK_LF_ACCURACY_500_PPM (1) /**< 500 ppm */ -#define NRF_CLOCK_LF_ACCURACY_150_PPM (2) /**< 150 ppm */ -#define NRF_CLOCK_LF_ACCURACY_100_PPM (3) /**< 100 ppm */ -#define NRF_CLOCK_LF_ACCURACY_75_PPM (4) /**< 75 ppm */ -#define NRF_CLOCK_LF_ACCURACY_50_PPM (5) /**< 50 ppm */ -#define NRF_CLOCK_LF_ACCURACY_30_PPM (6) /**< 30 ppm */ -#define NRF_CLOCK_LF_ACCURACY_20_PPM (7) /**< 20 ppm */ -#define NRF_CLOCK_LF_ACCURACY_10_PPM (8) /**< 10 ppm */ -#define NRF_CLOCK_LF_ACCURACY_5_PPM (9) /**< 5 ppm */ -#define NRF_CLOCK_LF_ACCURACY_2_PPM (10) /**< 2 ppm */ -#define NRF_CLOCK_LF_ACCURACY_1_PPM (11) /**< 1 ppm */ - -/** @} */ - -/**@defgroup NRF_CLOCK_LF_SRC Possible LFCLK oscillator sources - * @{ */ - -#define NRF_CLOCK_LF_SRC_RC (0) /**< LFCLK RC oscillator. */ -#define NRF_CLOCK_LF_SRC_XTAL (1) /**< LFCLK crystal oscillator. */ -#define NRF_CLOCK_LF_SRC_SYNTH (2) /**< LFCLK Synthesized from HFCLK. */ - -/** @} */ - -/** @} */ - -/** @addtogroup NRF_SDM_TYPES Types - * @{ */ - -/**@brief Type representing LFCLK oscillator source. */ -typedef struct -{ - uint8_t source; /**< LF oscillator clock source, see @ref NRF_CLOCK_LF_SRC. */ - uint8_t rc_ctiv; /**< Only for NRF_CLOCK_LF_SRC_RC: Calibration timer interval in 1/4 second - units (nRF51: 1-64, nRF52: 1-32). - @note To avoid excessive clock drift, 0.5 degrees Celsius is the - maximum temperature change allowed in one calibration timer - interval. The interval should be selected to ensure this. - - @note Must be 0 if source is not NRF_CLOCK_LF_SRC_RC. */ - uint8_t rc_temp_ctiv; /**< Only for NRF_CLOCK_LF_SRC_RC: How often (in number of calibration - intervals) the RC oscillator shall be calibrated if the temperature - hasn't changed. - 0: Always calibrate even if the temperature hasn't changed. - 1: Only calibrate if the temperature has changed (nRF51 only). - 2-33: Check the temperature and only calibrate if it has changed, - however calibration will take place every rc_temp_ctiv - intervals in any case. - - @note Must be 0 if source is not NRF_CLOCK_LF_SRC_RC. - - @note For nRF52, the application must ensure calibration at least once - every 8 seconds to ensure +/-500 ppm clock stability. The - recommended configuration for NRF_CLOCK_LF_SRC_RC on nRF52 is - rc_ctiv=16 and rc_temp_ctiv=2. This will ensure calibration at - least once every 8 seconds and for temperature changes of 0.5 - degrees Celsius every 4 seconds. See the Product Specification - for the nRF52 device being used for more information.*/ - uint8_t accuracy; /**< External clock accuracy used in the LL to compute timing - windows, see @ref NRF_CLOCK_LF_ACCURACY.*/ -} nrf_clock_lf_cfg_t; - -/**@brief Fault Handler type. - * - * When certain unrecoverable errors occur within the application or SoftDevice the fault handler will be called back. - * The protocol stack will be in an undefined state when this happens and the only way to recover will be to - * perform a reset, using e.g. CMSIS NVIC_SystemReset(). - * If the application returns from the fault handler the SoftDevice will call NVIC_SystemReset(). - * - * @note This callback is executed in HardFault context, thus SVC functions cannot be called from the fault callback. - * - * @param[in] id Fault identifier. See @ref NRF_FAULT_IDS. - * @param[in] pc The program counter of the instruction that triggered the fault. - * @param[in] info Optional additional information regarding the fault. Refer to each Fault identifier for details. - * - * @note When id is set to NRF_FAULT_ID_APP_MEMACC, pc will contain the address of the instruction being executed at the time when - * the fault is detected by the CPU. The CPU program counter may have advanced up to 2 instructions (no branching) after the one that triggered the fault. - */ -typedef void (*nrf_fault_handler_t)(uint32_t id, uint32_t pc, uint32_t info); - -/** @} */ - -/** @addtogroup NRF_SDM_FUNCTIONS Functions - * @{ */ - -/**@brief Enables the SoftDevice and by extension the protocol stack. - * - * @note Some care must be taken if a low frequency clock source is already running when calling this function: - * If the LF clock has a different source then the one currently running, it will be stopped. Then, the new - * clock source will be started. - * - * @note This function has no effect when returning with an error. - * - * @post If return code is ::NRF_SUCCESS - * - SoC library and protocol stack APIs are made available. - * - A portion of RAM will be unavailable (see relevant SDS documentation). - * - Some peripherals will be unavailable or available only through the SoC API (see relevant SDS documentation). - * - Interrupts will not arrive from protected peripherals or interrupts. - * - nrf_nvic_ functions must be used instead of CMSIS NVIC_ functions for reliable usage of the SoftDevice. - * - Interrupt latency may be affected by the SoftDevice (see relevant SDS documentation). - * - Chosen low frequency clock source will be running. - * - * @param p_clock_lf_cfg Low frequency clock source and accuracy. - If NULL the clock will be configured as an RC source with rc_ctiv = 16 and .rc_temp_ctiv = 2 - In the case of XTAL source, the PPM accuracy of the chosen clock source must be greater than or equal to the actual characteristics of your XTAL clock. - * @param fault_handler Callback to be invoked in case of fault, cannot be NULL. - * - * @retval ::NRF_SUCCESS - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE SoftDevice is already enabled, and the clock source and fault handler cannot be updated. - * @retval ::NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION SoftDevice interrupt is already enabled, or an enabled interrupt has an illegal priority level. - * @retval ::NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN Unknown low frequency clock source selected. - */ -SVCALL(SD_SOFTDEVICE_ENABLE, uint32_t, sd_softdevice_enable(nrf_clock_lf_cfg_t const * p_clock_lf_cfg, nrf_fault_handler_t fault_handler)); - - -/**@brief Disables the SoftDevice and by extension the protocol stack. - * - * Idempotent function to disable the SoftDevice. - * - * @post SoC library and protocol stack APIs are made unavailable. - * @post All interrupts that was protected by the SoftDevice will be disabled and initialized to priority 0 (highest). - * @post All peripherals used by the SoftDevice will be reset to default values. - * @post All of RAM become available. - * @post All interrupts are forwarded to the application. - * @post LFCLK source chosen in ::sd_softdevice_enable will be left running. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_SOFTDEVICE_DISABLE, uint32_t, sd_softdevice_disable(void)); - -/**@brief Check if the SoftDevice is enabled. - * - * @param[out] p_softdevice_enabled If the SoftDevice is enabled: 1 else 0. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_SOFTDEVICE_IS_ENABLED, uint32_t, sd_softdevice_is_enabled(uint8_t * p_softdevice_enabled)); - -/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the SoftDevice - * - * This function is only intended to be called when a bootloader is enabled. - * - * @param[in] address The base address of the interrupt vector table for forwarded interrupts. - - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, uint32_t, sd_softdevice_vector_table_base_set(uint32_t address)); - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // NRF_SDM_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_soc.h deleted file mode 100644 index d7d3c801b81..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_soc.h +++ /dev/null @@ -1,931 +0,0 @@ -/* - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * @defgroup nrf_soc_api SoC Library API - * @{ - * - * @brief APIs for the SoC library. - * - */ - -#ifndef NRF_SOC_H__ -#define NRF_SOC_H__ - -#include -#include -#include "nrf_svc.h" -#include "nrf.h" - -#include "nrf_error_soc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@addtogroup NRF_SOC_DEFINES Defines - * @{ */ - -/**@brief The number of the lowest SVC number reserved for the SoC library. */ -#define SOC_SVC_BASE (0x20) /**< Base value for SVCs that are available when the SoftDevice is disabled. */ -#define SOC_SVC_BASE_NOT_AVAILABLE (0x2B) /**< Base value for SVCs that are not available when the SoftDevice is disabled. */ - -/**@brief Guaranteed time for application to process radio inactive notification. */ -#define NRF_RADIO_NOTIFICATION_INACTIVE_GUARANTEED_TIME_US (62) - -/**@brief The minimum allowed timeslot extension time. */ -#define NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US (200) - -/**@brief The maximum processing time to handle a timeslot extension. */ -#define NRF_RADIO_MAX_EXTENSION_PROCESSING_TIME_US (17) - -/**@brief The latest time before the end of a timeslot the timeslot can be extended. */ -#define NRF_RADIO_MIN_EXTENSION_MARGIN_US (79) - -#define SOC_ECB_KEY_LENGTH (16) /**< ECB key length. */ -#define SOC_ECB_CLEARTEXT_LENGTH (16) /**< ECB cleartext length. */ -#define SOC_ECB_CIPHERTEXT_LENGTH (SOC_ECB_CLEARTEXT_LENGTH) /**< ECB ciphertext length. */ - -#define SD_EVT_IRQn (SWI2_EGU2_IRQn) /**< SoftDevice Event IRQ number. Used for both protocol events and SoC events. */ -#define SD_EVT_IRQHandler (SWI2_EGU2_IRQHandler) /**< SoftDevice Event IRQ handler. Used for both protocol events and SoC events. - The default interrupt priority for this handler is set to 4 */ -#define RADIO_NOTIFICATION_IRQn (SWI1_EGU1_IRQn) /**< The radio notification IRQ number. */ -#define RADIO_NOTIFICATION_IRQHandler (SWI1_EGU1_IRQHandler) /**< The radio notification IRQ handler. - The default interrupt priority for this handler is set to 4 */ -#define NRF_RADIO_LENGTH_MIN_US (100) /**< The shortest allowed radio timeslot, in microseconds. */ -#define NRF_RADIO_LENGTH_MAX_US (100000) /**< The longest allowed radio timeslot, in microseconds. */ - -#define NRF_RADIO_DISTANCE_MAX_US (128000000UL - 1UL) /**< The longest timeslot distance, in microseconds, allowed for the distance parameter (see @ref nrf_radio_request_normal_t) in the request. */ - -#define NRF_RADIO_EARLIEST_TIMEOUT_MAX_US (128000000UL - 1UL) /**< The longest timeout, in microseconds, allowed when requesting the earliest possible timeslot. */ - -#define NRF_RADIO_START_JITTER_US (2) /**< The maximum jitter in @ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START relative to the requested start time. */ - -/**@} */ - -/**@addtogroup NRF_SOC_ENUMS Enumerations - * @{ */ - -/**@brief The SVC numbers used by the SVC functions in the SoC library. */ -enum NRF_SOC_SVCS -{ - SD_PPI_CHANNEL_ENABLE_GET = SOC_SVC_BASE, - SD_PPI_CHANNEL_ENABLE_SET, - SD_PPI_CHANNEL_ENABLE_CLR, - SD_PPI_CHANNEL_ASSIGN, - SD_PPI_GROUP_TASK_ENABLE, - SD_PPI_GROUP_TASK_DISABLE, - SD_PPI_GROUP_ASSIGN, - SD_PPI_GROUP_GET, - SD_FLASH_PAGE_ERASE, - SD_FLASH_WRITE, - SD_FLASH_PROTECT, - SD_MUTEX_NEW = SOC_SVC_BASE_NOT_AVAILABLE, - SD_MUTEX_ACQUIRE, - SD_MUTEX_RELEASE, - SD_RAND_APPLICATION_POOL_CAPACITY_GET, - SD_RAND_APPLICATION_BYTES_AVAILABLE_GET, - SD_RAND_APPLICATION_VECTOR_GET, - SD_POWER_MODE_SET, - SD_POWER_SYSTEM_OFF, - SD_POWER_RESET_REASON_GET, - SD_POWER_RESET_REASON_CLR, - SD_POWER_POF_ENABLE, - SD_POWER_POF_THRESHOLD_SET, - SD_POWER_RAM_POWER_SET, - SD_POWER_RAM_POWER_CLR, - SD_POWER_RAM_POWER_GET, - SD_POWER_GPREGRET_SET, - SD_POWER_GPREGRET_CLR, - SD_POWER_GPREGRET_GET, - SD_POWER_DCDC_MODE_SET, - SD_APP_EVT_WAIT, - SD_CLOCK_HFCLK_REQUEST, - SD_CLOCK_HFCLK_RELEASE, - SD_CLOCK_HFCLK_IS_RUNNING, - SD_RADIO_NOTIFICATION_CFG_SET, - SD_ECB_BLOCK_ENCRYPT, - SD_ECB_BLOCKS_ENCRYPT, - SD_RADIO_SESSION_OPEN, - SD_RADIO_SESSION_CLOSE, - SD_RADIO_REQUEST, - SD_EVT_GET, - SD_TEMP_GET, - SVC_SOC_LAST -}; - -/**@brief Possible values of a ::nrf_mutex_t. */ -enum NRF_MUTEX_VALUES -{ - NRF_MUTEX_FREE, - NRF_MUTEX_TAKEN -}; - -/**@brief Power modes. */ -enum NRF_POWER_MODES -{ - NRF_POWER_MODE_CONSTLAT, /**< Constant latency mode. See power management in the reference manual. */ - NRF_POWER_MODE_LOWPWR /**< Low power mode. See power management in the reference manual. */ -}; - - -/**@brief Power failure thresholds */ -enum NRF_POWER_THRESHOLDS -{ - NRF_POWER_THRESHOLD_V17 = 4UL, /**< 1.7 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V18, /**< 1.8 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V19, /**< 1.9 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V20, /**< 2.0 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V21, /**< 2.1 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V22, /**< 2.2 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V23, /**< 2.3 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V24, /**< 2.4 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V25, /**< 2.5 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V26, /**< 2.6 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V27, /**< 2.7 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V28 /**< 2.8 Volts power failure threshold. */ -}; - - -/**@brief DC/DC converter modes. */ -enum NRF_POWER_DCDC_MODES -{ - NRF_POWER_DCDC_DISABLE, /**< The DCDC is disabled. */ - NRF_POWER_DCDC_ENABLE /**< The DCDC is enabled. */ -}; - -/**@brief Radio notification distances. */ -enum NRF_RADIO_NOTIFICATION_DISTANCES -{ - NRF_RADIO_NOTIFICATION_DISTANCE_NONE = 0, /**< The event does not have a notification. */ - NRF_RADIO_NOTIFICATION_DISTANCE_800US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_1740US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_2680US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_3620US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_4560US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_5500US /**< The distance from the active notification to start of radio activity. */ -}; - - -/**@brief Radio notification types. */ -enum NRF_RADIO_NOTIFICATION_TYPES -{ - NRF_RADIO_NOTIFICATION_TYPE_NONE = 0, /**< The event does not have a radio notification signal. */ - NRF_RADIO_NOTIFICATION_TYPE_INT_ON_ACTIVE, /**< Using interrupt for notification when the radio will be enabled. */ - NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE, /**< Using interrupt for notification when the radio has been disabled. */ - NRF_RADIO_NOTIFICATION_TYPE_INT_ON_BOTH, /**< Using interrupt for notification both when the radio will be enabled and disabled. */ -}; - -/**@brief The Radio signal callback types. */ -enum NRF_RADIO_CALLBACK_SIGNAL_TYPE -{ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_START, /**< This signal indicates the start of the radio timeslot. */ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_TIMER0, /**< This signal indicates the NRF_TIMER0 interrupt. */ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_RADIO, /**< This signal indicates the NRF_RADIO interrupt. */ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_EXTEND_FAILED, /**< This signal indicates extend action failed. */ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_EXTEND_SUCCEEDED /**< This signal indicates extend action succeeded. */ -}; - -/**@brief The actions requested by the signal callback. - * - * This code gives the SOC instructions about what action to take when the signal callback has - * returned. - */ -enum NRF_RADIO_SIGNAL_CALLBACK_ACTION -{ - NRF_RADIO_SIGNAL_CALLBACK_ACTION_NONE, /**< Return without action. */ - NRF_RADIO_SIGNAL_CALLBACK_ACTION_EXTEND, /**< Request an extension of the current - timeslot. Maximum execution time for this action: - @ref NRF_RADIO_MAX_EXTENSION_PROCESSING_TIME_US. - This action must be started at least @ref - NRF_RADIO_MIN_EXTENSION_MARGIN_US before - the end of the timeslot. */ - NRF_RADIO_SIGNAL_CALLBACK_ACTION_END, /**< End the current radio timeslot. */ - NRF_RADIO_SIGNAL_CALLBACK_ACTION_REQUEST_AND_END /**< Request a new radio timeslot and end the current timeslot. */ -}; - -/**@brief Radio timeslot high frequency clock source configuration. */ -enum NRF_RADIO_HFCLK_CFG -{ - NRF_RADIO_HFCLK_CFG_XTAL_GUARANTEED, /**< The SoftDevice will guarantee that the high frequency clock source is the - external crystal for the whole duration of the timeslot. This should be the - preferred option for events that use the radio or require high timing accuracy. - @note The SoftDevice will automatically turn on and off the external crystal, - at the beginning and end of the timeslot, respectively. The crystal may also - intentionally be left running after the timeslot, in cases where it is needed - by the SoftDevice shortly after the end of the timeslot. */ - NRF_RADIO_HFCLK_CFG_NO_GUARANTEE /**< This configuration allows for earlier and tighter scheduling of timeslots. - The RC oscillator may be the clock source in part or for the whole duration of the timeslot. - The RC oscillator's accuracy must therefore be taken into consideration. - @note If the application will use the radio peripheral in timeslots with this configuration, - it must make sure that the crystal is running and stable before starting the radio. */ -}; - -/**@brief Radio timeslot priorities. */ -enum NRF_RADIO_PRIORITY -{ - NRF_RADIO_PRIORITY_HIGH, /**< High (equal priority as the normal connection priority of the SoftDevice stack(s)). */ - NRF_RADIO_PRIORITY_NORMAL, /**< Normal (equal priority as the priority of secondary activities of the SoftDevice stack(s)). */ -}; - -/**@brief Radio timeslot request type. */ -enum NRF_RADIO_REQUEST_TYPE -{ - NRF_RADIO_REQ_TYPE_EARLIEST, /**< Request radio timeslot as early as possible. This should always be used for the first request in a session. */ - NRF_RADIO_REQ_TYPE_NORMAL /**< Normal radio timeslot request. */ -}; - -/**@brief SoC Events. */ -enum NRF_SOC_EVTS -{ - NRF_EVT_HFCLKSTARTED, /**< Event indicating that the HFCLK has started. */ - NRF_EVT_POWER_FAILURE_WARNING, /**< Event indicating that a power failure warning has occurred. */ - NRF_EVT_FLASH_OPERATION_SUCCESS, /**< Event indicating that the ongoing flash operation has completed successfully. */ - NRF_EVT_FLASH_OPERATION_ERROR, /**< Event indicating that the ongoing flash operation has timed out with an error. */ - NRF_EVT_RADIO_BLOCKED, /**< Event indicating that a radio timeslot was blocked. */ - NRF_EVT_RADIO_CANCELED, /**< Event indicating that a radio timeslot was canceled by SoftDevice. */ - NRF_EVT_RADIO_SIGNAL_CALLBACK_INVALID_RETURN, /**< Event indicating that a radio timeslot signal callback handler return was invalid. */ - NRF_EVT_RADIO_SESSION_IDLE, /**< Event indicating that a radio timeslot session is idle. */ - NRF_EVT_RADIO_SESSION_CLOSED, /**< Event indicating that a radio timeslot session is closed. */ - NRF_EVT_NUMBER_OF_EVTS -}; - -/**@} */ - - -/**@addtogroup NRF_SOC_STRUCTURES Structures - * @{ */ - -/**@brief Represents a mutex for use with the nrf_mutex functions. - * @note Accessing the value directly is not safe, use the mutex functions! - */ -typedef volatile uint8_t nrf_mutex_t; - -/**@brief Parameters for a request for a timeslot as early as possible. */ -typedef struct -{ - uint8_t hfclk; /**< High frequency clock source, see @ref NRF_RADIO_HFCLK_CFG. */ - uint8_t priority; /**< The radio timeslot priority, see @ref NRF_RADIO_PRIORITY. */ - uint32_t length_us; /**< The radio timeslot length (in the range 100 to 100,000] microseconds). */ - uint32_t timeout_us; /**< Longest acceptable delay until the start of the requested timeslot (up to @ref NRF_RADIO_EARLIEST_TIMEOUT_MAX_US microseconds). */ -} nrf_radio_request_earliest_t; - -/**@brief Parameters for a normal radio timeslot request. */ -typedef struct -{ - uint8_t hfclk; /**< High frequency clock source, see @ref NRF_RADIO_HFCLK_CFG. */ - uint8_t priority; /**< The radio timeslot priority, see @ref NRF_RADIO_PRIORITY. */ - uint32_t distance_us; /**< Distance from the start of the previous radio timeslot (up to @ref NRF_RADIO_DISTANCE_MAX_US microseconds). */ - uint32_t length_us; /**< The radio timeslot length (in the range [100..100,000] microseconds). */ -} nrf_radio_request_normal_t; - -/**@brief Radio timeslot request parameters. */ -typedef struct -{ - uint8_t request_type; /**< Type of request, see @ref NRF_RADIO_REQUEST_TYPE. */ - union - { - nrf_radio_request_earliest_t earliest; /**< Parameters for requesting a radio timeslot as early as possible. */ - nrf_radio_request_normal_t normal; /**< Parameters for requesting a normal radio timeslot. */ - } params; /**< Parameter union. */ -} nrf_radio_request_t; - -/**@brief Return parameters of the radio timeslot signal callback. */ -typedef struct -{ - uint8_t callback_action; /**< The action requested by the application when returning from the signal callback, see @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION. */ - union - { - struct - { - nrf_radio_request_t * p_next; /**< The request parameters for the next radio timeslot. */ - } request; /**< Additional parameters for return_code @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION_REQUEST_AND_END. */ - struct - { - uint32_t length_us; /**< Requested extension of the radio timeslot duration (microseconds) (for minimum time see @ref NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US). */ - } extend; /**< Additional parameters for return_code @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION_EXTEND. */ - } params; /**< Parameter union. */ -} nrf_radio_signal_callback_return_param_t; - -/**@brief The radio timeslot signal callback type. - * - * @note In case of invalid return parameters, the radio timeslot will automatically end - * immediately after returning from the signal callback and the - * @ref NRF_EVT_RADIO_SIGNAL_CALLBACK_INVALID_RETURN event will be sent. - * @note The returned struct pointer must remain valid after the signal callback - * function returns. For instance, this means that it must not point to a stack variable. - * - * @param[in] signal_type Type of signal, see @ref NRF_RADIO_CALLBACK_SIGNAL_TYPE. - * - * @return Pointer to structure containing action requested by the application. - */ -typedef nrf_radio_signal_callback_return_param_t * (*nrf_radio_signal_callback_t) (uint8_t signal_type); - -/**@brief AES ECB parameter typedefs */ -typedef uint8_t soc_ecb_key_t[SOC_ECB_KEY_LENGTH]; /**< Encryption key type. */ -typedef uint8_t soc_ecb_cleartext_t[SOC_ECB_CLEARTEXT_LENGTH]; /**< Cleartext data type. */ -typedef uint8_t soc_ecb_ciphertext_t[SOC_ECB_CIPHERTEXT_LENGTH]; /**< Ciphertext data type. */ - -/**@brief AES ECB data structure */ -typedef struct -{ - soc_ecb_key_t key; /**< Encryption key. */ - soc_ecb_cleartext_t cleartext; /**< Cleartext data. */ - soc_ecb_ciphertext_t ciphertext; /**< Ciphertext data. */ -} nrf_ecb_hal_data_t; - -/**@brief AES ECB block. Used to provide multiple blocks in a single call - to @ref sd_ecb_blocks_encrypt.*/ -typedef struct -{ - soc_ecb_key_t const * p_key; /**< Pointer to the Encryption key. */ - soc_ecb_cleartext_t const * p_cleartext; /**< Pointer to the Cleartext data. */ - soc_ecb_ciphertext_t * p_ciphertext; /**< Pointer to the Ciphertext data. */ -} nrf_ecb_hal_data_block_t; - -/**@} */ - -/**@addtogroup NRF_SOC_FUNCTIONS Functions - * @{ */ - -/**@brief Initialize a mutex. - * - * @param[in] p_mutex Pointer to the mutex to initialize. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_MUTEX_NEW, uint32_t, sd_mutex_new(nrf_mutex_t * p_mutex)); - -/**@brief Attempt to acquire a mutex. - * - * @param[in] p_mutex Pointer to the mutex to acquire. - * - * @retval ::NRF_SUCCESS The mutex was successfully acquired. - * @retval ::NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN The mutex could not be acquired. - */ -SVCALL(SD_MUTEX_ACQUIRE, uint32_t, sd_mutex_acquire(nrf_mutex_t * p_mutex)); - -/**@brief Release a mutex. - * - * @param[in] p_mutex Pointer to the mutex to release. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_MUTEX_RELEASE, uint32_t, sd_mutex_release(nrf_mutex_t * p_mutex)); - -/**@brief Query the capacity of the application random pool. - * - * @param[out] p_pool_capacity The capacity of the pool. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_RAND_APPLICATION_POOL_CAPACITY_GET, uint32_t, sd_rand_application_pool_capacity_get(uint8_t * p_pool_capacity)); - -/**@brief Get number of random bytes available to the application. - * - * @param[out] p_bytes_available The number of bytes currently available in the pool. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_RAND_APPLICATION_BYTES_AVAILABLE_GET, uint32_t, sd_rand_application_bytes_available_get(uint8_t * p_bytes_available)); - -/**@brief Get random bytes from the application pool. - * - * @param[out] p_buff Pointer to unit8_t buffer for storing the bytes. - * @param[in] length Number of bytes to take from pool and place in p_buff. - * - * @retval ::NRF_SUCCESS The requested bytes were written to p_buff. - * @retval ::NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES No bytes were written to the buffer, because there were not enough bytes available. -*/ -SVCALL(SD_RAND_APPLICATION_VECTOR_GET, uint32_t, sd_rand_application_vector_get(uint8_t * p_buff, uint8_t length)); - -/**@brief Gets the reset reason register. - * - * @param[out] p_reset_reason Contents of the NRF_POWER->RESETREAS register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RESET_REASON_GET, uint32_t, sd_power_reset_reason_get(uint32_t * p_reset_reason)); - -/**@brief Clears the bits of the reset reason register. - * - * @param[in] reset_reason_clr_msk Contains the bits to clear from the reset reason register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RESET_REASON_CLR, uint32_t, sd_power_reset_reason_clr(uint32_t reset_reason_clr_msk)); - -/**@brief Sets the power mode when in CPU sleep. - * - * @param[in] power_mode The power mode to use when in CPU sleep, see @ref NRF_POWER_MODES. @sa sd_app_evt_wait - * - * @retval ::NRF_SUCCESS The power mode was set. - * @retval ::NRF_ERROR_SOC_POWER_MODE_UNKNOWN The power mode was unknown. - */ -SVCALL(SD_POWER_MODE_SET, uint32_t, sd_power_mode_set(uint8_t power_mode)); - -/**@brief Puts the chip in System OFF mode. - * - * @retval ::NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN - */ -SVCALL(SD_POWER_SYSTEM_OFF, uint32_t, sd_power_system_off(void)); - -/**@brief Enables or disables the power-fail comparator. - * - * Enabling this will give a SoftDevice event (NRF_EVT_POWER_FAILURE_WARNING) when the power failure warning occurs. - * The event can be retrieved with sd_evt_get(); - * - * @param[in] pof_enable True if the power-fail comparator should be enabled, false if it should be disabled. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_POF_ENABLE, uint32_t, sd_power_pof_enable(uint8_t pof_enable)); - -/**@brief Sets the power-fail threshold value. - * - * @param[in] threshold The power-fail threshold value to use, see @ref NRF_POWER_THRESHOLDS. - * - * @retval ::NRF_SUCCESS The power failure threshold was set. - * @retval ::NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN The power failure threshold is unknown. - */ -SVCALL(SD_POWER_POF_THRESHOLD_SET, uint32_t, sd_power_pof_threshold_set(uint8_t threshold)); - -/**@brief Writes the NRF_POWER->RAM[index].POWERSET register. - * - * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWERSET register to write to. - * @param[in] ram_powerset Contains the word to write to the NRF_POWER->RAM[index].POWERSET register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RAM_POWER_SET, uint32_t, sd_power_ram_power_set(uint8_t index, uint32_t ram_powerset)); - -/**@brief Writes the NRF_POWER->RAM[index].POWERCLR register. - * - * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWERCLR register to write to. - * @param[in] ram_powerclr Contains the word to write to the NRF_POWER->RAM[index].POWERCLR register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RAM_POWER_CLR, uint32_t, sd_power_ram_power_clr(uint8_t index, uint32_t ram_powerclr)); - -/**@brief Get contents of NRF_POWER->RAM[index].POWER register, indicates power status of RAM[index] blocks. - * - * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWER register to read from. - * @param[out] p_ram_power Content of NRF_POWER->RAM[index].POWER register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RAM_POWER_GET, uint32_t, sd_power_ram_power_get(uint8_t index, uint32_t * p_ram_power)); - -/**@brief Set bits in the general purpose retention registers (NRF_POWER->GPREGRET*). - * - * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. - * @param[in] gpregret_msk Bits to be set in the GPREGRET register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_GPREGRET_SET, uint32_t, sd_power_gpregret_set(uint32_t gpregret_id, uint32_t gpregret_msk)); - -/**@brief Clear bits in the general purpose retention registers (NRF_POWER->GPREGRET*). - * - * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. - * @param[in] gpregret_msk Bits to be clear in the GPREGRET register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_GPREGRET_CLR, uint32_t, sd_power_gpregret_clr(uint32_t gpregret_id, uint32_t gpregret_msk)); - -/**@brief Get contents of the general purpose retention registers (NRF_POWER->GPREGRET*). - * - * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. - * @param[out] p_gpregret Contents of the GPREGRET register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_GPREGRET_GET, uint32_t, sd_power_gpregret_get(uint32_t gpregret_id, uint32_t *p_gpregret)); - -/**@brief Sets the DCDC mode. - * - * Enable or disable the DCDC peripheral. - * - * @param[in] dcdc_mode The mode of the DCDC, see @ref NRF_POWER_DCDC_MODES. - * - * @retval ::NRF_SUCCESS - * @retval ::NRF_ERROR_INVALID_PARAM The DCDC mode is invalid. - */ -SVCALL(SD_POWER_DCDC_MODE_SET, uint32_t, sd_power_dcdc_mode_set(uint8_t dcdc_mode)); - -/**@brief Request the high frequency crystal oscillator. - * - * Will start the high frequency crystal oscillator, the startup time of the crystal varies - * and the ::sd_clock_hfclk_is_running function can be polled to check if it has started. - * - * @see sd_clock_hfclk_is_running - * @see sd_clock_hfclk_release - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_CLOCK_HFCLK_REQUEST, uint32_t, sd_clock_hfclk_request(void)); - -/**@brief Releases the high frequency crystal oscillator. - * - * Will stop the high frequency crystal oscillator, this happens immediately. - * - * @see sd_clock_hfclk_is_running - * @see sd_clock_hfclk_request - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_CLOCK_HFCLK_RELEASE, uint32_t, sd_clock_hfclk_release(void)); - -/**@brief Checks if the high frequency crystal oscillator is running. - * - * @see sd_clock_hfclk_request - * @see sd_clock_hfclk_release - * - * @param[out] p_is_running 1 if the external crystal oscillator is running, 0 if not. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_CLOCK_HFCLK_IS_RUNNING, uint32_t, sd_clock_hfclk_is_running(uint32_t * p_is_running)); - -/**@brief Waits for an application event. - * - * An application event is either an application interrupt or a pended interrupt when the interrupt - * is disabled. - * - * When the application waits for an application event by calling this function, an interrupt that - * is enabled will be taken immediately on pending since this function will wait in thread mode, - * then the execution will return in the application's main thread. - * - * In order to wake up from disabled interrupts, the SEVONPEND flag has to be set in the Cortex-M - * MCU's System Control Register (SCR), CMSIS_SCB. In that case, when a disabled interrupt gets - * pended, this function will return to the application's main thread. - * - * @note The application must ensure that the pended flag is cleared using ::sd_nvic_ClearPendingIRQ - * in order to sleep using this function. This is only necessary for disabled interrupts, as - * the interrupt handler will clear the pending flag automatically for enabled interrupts. - * - * @note If an application interrupt has happened since the last time sd_app_evt_wait was - * called this function will return immediately and not go to sleep. This is to avoid race - * conditions that can occur when a flag is updated in the interrupt handler and processed - * in the main loop. - * - * @post An application interrupt has happened or a interrupt pending flag is set. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_APP_EVT_WAIT, uint32_t, sd_app_evt_wait(void)); - -/**@brief Get PPI channel enable register contents. - * - * @param[out] p_channel_enable The contents of the PPI CHEN register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_CHANNEL_ENABLE_GET, uint32_t, sd_ppi_channel_enable_get(uint32_t * p_channel_enable)); - -/**@brief Set PPI channel enable register. - * - * @param[in] channel_enable_set_msk Mask containing the bits to set in the PPI CHEN register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_CHANNEL_ENABLE_SET, uint32_t, sd_ppi_channel_enable_set(uint32_t channel_enable_set_msk)); - -/**@brief Clear PPI channel enable register. - * - * @param[in] channel_enable_clr_msk Mask containing the bits to clear in the PPI CHEN register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_CHANNEL_ENABLE_CLR, uint32_t, sd_ppi_channel_enable_clr(uint32_t channel_enable_clr_msk)); - -/**@brief Assign endpoints to a PPI channel. - * - * @param[in] channel_num Number of the PPI channel to assign. - * @param[in] evt_endpoint Event endpoint of the PPI channel. - * @param[in] task_endpoint Task endpoint of the PPI channel. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_CHANNEL The channel number is invalid. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_CHANNEL_ASSIGN, uint32_t, sd_ppi_channel_assign(uint8_t channel_num, const volatile void * evt_endpoint, const volatile void * task_endpoint)); - -/**@brief Task to enable a channel group. - * - * @param[in] group_num Number of the channel group. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_GROUP_TASK_ENABLE, uint32_t, sd_ppi_group_task_enable(uint8_t group_num)); - -/**@brief Task to disable a channel group. - * - * @param[in] group_num Number of the PPI group. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_GROUP_TASK_DISABLE, uint32_t, sd_ppi_group_task_disable(uint8_t group_num)); - -/**@brief Assign PPI channels to a channel group. - * - * @param[in] group_num Number of the channel group. - * @param[in] channel_msk Mask of the channels to assign to the group. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_GROUP_ASSIGN, uint32_t, sd_ppi_group_assign(uint8_t group_num, uint32_t channel_msk)); - -/**@brief Gets the PPI channels of a channel group. - * - * @param[in] group_num Number of the channel group. - * @param[out] p_channel_msk Mask of the channels assigned to the group. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_GROUP_GET, uint32_t, sd_ppi_group_get(uint8_t group_num, uint32_t * p_channel_msk)); - -/**@brief Configures the Radio Notification signal. - * - * @note - * - The notification signal latency depends on the interrupt priority settings of SWI used - * for notification signal. - * - To ensure that the radio notification signal behaves in a consistent way, the radio - * notifications must be configured when there is no protocol stack or other SoftDevice - * activity in progress. It is recommended that the radio notification signal is - * configured directly after the SoftDevice has been enabled. - * - In the period between the ACTIVE signal and the start of the Radio Event, the SoftDevice - * will interrupt the application to do Radio Event preparation. - * - Using the Radio Notification feature may limit the bandwidth, as the SoftDevice may have - * to shorten the connection events to have time for the Radio Notification signals. - * - * @param[in] type Type of notification signal, see @ref NRF_RADIO_NOTIFICATION_TYPES. - * @ref NRF_RADIO_NOTIFICATION_TYPE_NONE shall be used to turn off radio - * notification. Using @ref NRF_RADIO_NOTIFICATION_DISTANCE_NONE is - * recommended (but not required) to be used with - * @ref NRF_RADIO_NOTIFICATION_TYPE_NONE. - * - * @param[in] distance Distance between the notification signal and start of radio activity, see @ref NRF_RADIO_NOTIFICATION_DISTANCES. - * This parameter is ignored when @ref NRF_RADIO_NOTIFICATION_TYPE_NONE or - * @ref NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE is used. - * - * @retval ::NRF_ERROR_INVALID_PARAM The group number is invalid. - * @retval ::NRF_ERROR_INVALID_STATE A protocol stack or other SoftDevice is running. Stop all - * running activities and retry. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_RADIO_NOTIFICATION_CFG_SET, uint32_t, sd_radio_notification_cfg_set(uint8_t type, uint8_t distance)); - -/**@brief Encrypts a block according to the specified parameters. - * - * 128-bit AES encryption. - * - * @note: - * - The application may set the SEVONPEND bit in the SCR to 1 to make the SoftDevice sleep while - * the ECB is running. The SEVONPEND bit should only be cleared (set to 0) from application - * main or low interrupt level. - * - * @param[in, out] p_ecb_data Pointer to the ECB parameters' struct (two input - * parameters and one output parameter). - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_ECB_BLOCK_ENCRYPT, uint32_t, sd_ecb_block_encrypt(nrf_ecb_hal_data_t * p_ecb_data)); - -/**@brief Encrypts multiple data blocks provided as an array of data block structures. - * - * @details: Performs 128-bit AES encryption on multiple data blocks - * - * @note: - * - The application may set the SEVONPEND bit in the SCR to 1 to make the SoftDevice sleep while - * the ECB is running. The SEVONPEND bit should only be cleared (set to 0) from application - * main or low interrupt level. - * - * @param[in] block_count Count of blocks in the p_data_blocks array. - * @param[in,out] p_data_blocks Pointer to the first entry in a contiguous array of - * @ref nrf_ecb_hal_data_block_t structures. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_ECB_BLOCKS_ENCRYPT, uint32_t, sd_ecb_blocks_encrypt(uint8_t block_count, nrf_ecb_hal_data_block_t * p_data_blocks)); - -/**@brief Gets any pending events generated by the SoC API. - * - * The application should keep calling this function to get events, until ::NRF_ERROR_NOT_FOUND is returned. - * - * @param[out] p_evt_id Set to one of the values in @ref NRF_SOC_EVTS, if any events are pending. - * - * @retval ::NRF_SUCCESS An event was pending. The event id is written in the p_evt_id parameter. - * @retval ::NRF_ERROR_NOT_FOUND No pending events. - */ -SVCALL(SD_EVT_GET, uint32_t, sd_evt_get(uint32_t * p_evt_id)); - -/**@brief Get the temperature measured on the chip - * - * This function will block until the temperature measurement is done. - * It takes around 50 us from call to return. - * - * @param[out] p_temp Result of temperature measurement. Die temperature in 0.25 degrees Celsius. - * - * @retval ::NRF_SUCCESS A temperature measurement was done, and the temperature was written to temp - */ -SVCALL(SD_TEMP_GET, uint32_t, sd_temp_get(int32_t * p_temp)); - -/**@brief Flash Write -* -* Commands to write a buffer to flash -* -* If the SoftDevice is enabled: -* This call initiates the flash access command, and its completion will be communicated to the -* application with exactly one of the following events: -* - @ref NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed. -* - @ref NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started. -* -* If the SoftDevice is not enabled no event will be generated, and this call will return @ref NRF_SUCCESS when the - * write has been completed -* -* @note -* - This call takes control over the radio and the CPU during flash erase and write to make sure that -* they will not interfere with the flash access. This means that all interrupts will be blocked -* for a predictable time (depending on the NVMC specification in the device's Product Specification -* and the command parameters). -* - The data in the p_src buffer should not be modified before the @ref NRF_EVT_FLASH_OPERATION_SUCCESS -* or the @ref NRF_EVT_FLASH_OPERATION_ERROR have been received if the SoftDevice is enabled. -* -* -* @param[in] p_dst Pointer to start of flash location to be written. -* @param[in] p_src Pointer to buffer with data to be written. -* @param[in] size Number of 32-bit words to write. Maximum size is the number of words in one -* flash page. See the device's Product Specification for details. -* -* @retval ::NRF_ERROR_INVALID_ADDR Tried to write to a non existing flash address, or p_dst or p_src was unaligned. -* @retval ::NRF_ERROR_BUSY The previous command has not yet completed. -* @retval ::NRF_ERROR_INVALID_LENGTH Size was 0, or higher than the maximum allowed size. -* @retval ::NRF_ERROR_FORBIDDEN Tried to write to or read from protected location. -* @retval ::NRF_SUCCESS The command was accepted. -*/ -SVCALL(SD_FLASH_WRITE, uint32_t, sd_flash_write(uint32_t * p_dst, uint32_t const * p_src, uint32_t size)); - - -/**@brief Flash Erase page -* -* Commands to erase a flash page -* If the SoftDevice is enabled: -* This call initiates the flash access command, and its completion will be communicated to the -* application with exactly one of the following events: -* - @ref NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed. -* - @ref NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started. -* -* If the SoftDevice is not enabled no event will be generated, and this call will return @ref NRF_SUCCESS when the -* erase has been completed -* -* @note -* - This call takes control over the radio and the CPU during flash erase and write to make sure that -* they will not interfere with the flash access. This means that all interrupts will be blocked -* for a predictable time (depending on the NVMC specification in the device's Product Specification -* and the command parameters). -* -* -* @param[in] page_number Page number of the page to erase -* -* @retval ::NRF_ERROR_INTERNAL If a new session could not be opened due to an internal error. -* @retval ::NRF_ERROR_INVALID_ADDR Tried to erase to a non existing flash page. -* @retval ::NRF_ERROR_BUSY The previous command has not yet completed. -* @retval ::NRF_ERROR_FORBIDDEN Tried to erase a protected page. -* @retval ::NRF_SUCCESS The command was accepted. -*/ -SVCALL(SD_FLASH_PAGE_ERASE, uint32_t, sd_flash_page_erase(uint32_t page_number)); - - -/**@brief Flash Protection set - * - * Commands to set the flash protection configuration registers. - This sets the CONFIGx registers of the BPROT peripheral. - * - * @note To read the values read them directly. They are only write-protected. - * - * @param[in] block_cfg0 Value to be written to the configuration register. - * @param[in] block_cfg1 Value to be written to the configuration register. - * @param[in] block_cfg2 Value to be written to the configuration register. - * @param[in] block_cfg3 Value to be written to the configuration register. - * - * @retval ::NRF_ERROR_FORBIDDEN Tried to protect the SoftDevice. - * @retval ::NRF_SUCCESS Values successfully written to configuration registers. - */ -SVCALL(SD_FLASH_PROTECT, uint32_t, sd_flash_protect(uint32_t block_cfg0, uint32_t block_cfg1, uint32_t block_cfg2, uint32_t block_cfg3)); - -/**@brief Opens a session for radio timeslot requests. - * - * @note Only one session can be open at a time. - * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START) will be called when the radio timeslot - * starts. From this point the NRF_RADIO and NRF_TIMER0 peripherals can be freely accessed - * by the application. - * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_TIMER0) is called whenever the NRF_TIMER0 - * interrupt occurs. - * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_RADIO) is called whenever the NRF_RADIO - * interrupt occurs. - * @note p_radio_signal_callback() will be called at ARM interrupt priority level 0. This - * implies that none of the sd_* API calls can be used from p_radio_signal_callback(). - * - * @param[in] p_radio_signal_callback The signal callback. - * - * @retval ::NRF_ERROR_INVALID_ADDR p_radio_signal_callback is an invalid function pointer. - * @retval ::NRF_ERROR_BUSY If session cannot be opened. - * @retval ::NRF_ERROR_INTERNAL If a new session could not be opened due to an internal error. - * @retval ::NRF_SUCCESS Otherwise. - */ - SVCALL(SD_RADIO_SESSION_OPEN, uint32_t, sd_radio_session_open(nrf_radio_signal_callback_t p_radio_signal_callback)); - -/**@brief Closes a session for radio timeslot requests. - * - * @note Any current radio timeslot will be finished before the session is closed. - * @note If a radio timeslot is scheduled when the session is closed, it will be canceled. - * @note The application cannot consider the session closed until the @ref NRF_EVT_RADIO_SESSION_CLOSED - * event is received. - * - * @retval ::NRF_ERROR_FORBIDDEN If session not opened. - * @retval ::NRF_ERROR_BUSY If session is currently being closed. - * @retval ::NRF_SUCCESS Otherwise. - */ - SVCALL(SD_RADIO_SESSION_CLOSE, uint32_t, sd_radio_session_close(void)); - -/**@brief Requests a radio timeslot. - * - * @note The request type is determined by p_request->request_type, and can be one of @ref NRF_RADIO_REQ_TYPE_EARLIEST - * and @ref NRF_RADIO_REQ_TYPE_NORMAL. The first request in a session must always be of type @ref NRF_RADIO_REQ_TYPE_EARLIEST. - * @note For a normal request (@ref NRF_RADIO_REQ_TYPE_NORMAL), the start time of a radio timeslot is specified by - * p_request->distance_us and is given relative to the start of the previous timeslot. - * @note A too small p_request->distance_us will lead to a @ref NRF_EVT_RADIO_BLOCKED event. - * @note Timeslots scheduled too close will lead to a @ref NRF_EVT_RADIO_BLOCKED event. - * @note See the SoftDevice Specification for more on radio timeslot scheduling, distances and lengths. - * @note If an opportunity for the first radio timeslot is not found before 100 ms after the call to this - * function, it is not scheduled, and instead a @ref NRF_EVT_RADIO_BLOCKED event is sent. - * The application may then try to schedule the first radio timeslot again. - * @note Successful requests will result in nrf_radio_signal_callback_t(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START). - * Unsuccessful requests will result in a @ref NRF_EVT_RADIO_BLOCKED event, see @ref NRF_SOC_EVTS. - * @note The jitter in the start time of the radio timeslots is +/- @ref NRF_RADIO_START_JITTER_US us. - * @note The nrf_radio_signal_callback_t(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START) call has a latency relative to the - * specified radio timeslot start, but this does not affect the actual start time of the timeslot. - * @note NRF_TIMER0 is reset at the start of the radio timeslot, and is clocked at 1MHz from the high frequency - * (16 MHz) clock source. If p_request->hfclk_force_xtal is true, the high frequency clock is - * guaranteed to be clocked from the external crystal. - * @note The SoftDevice will neither access the NRF_RADIO peripheral nor the NRF_TIMER0 peripheral - * during the radio timeslot. - * - * @param[in] p_request Pointer to the request parameters. - * - * @retval ::NRF_ERROR_FORBIDDEN If session not opened or the session is not IDLE. - * @retval ::NRF_ERROR_INVALID_ADDR If the p_request pointer is invalid. - * @retval ::NRF_ERROR_INVALID_PARAM If the parameters of p_request are not valid. - * @retval ::NRF_SUCCESS Otherwise. - */ - SVCALL(SD_RADIO_REQUEST, uint32_t, sd_radio_request(nrf_radio_request_t const * p_request)); - -/**@} */ - -#ifdef __cplusplus -} -#endif -#endif // NRF_SOC_H__ - -/**@} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_svc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_svc.h deleted file mode 100644 index 292c6929828..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/headers/nrf_svc.h +++ /dev/null @@ -1,90 +0,0 @@ -/* - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef NRF_SVC__ -#define NRF_SVC__ - -#include "stdint.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef SVCALL_AS_NORMAL_FUNCTION -#define SVCALL(number, return_type, signature) return_type signature -#else - -#ifndef SVCALL -#if defined (__CC_ARM) -#define SVCALL(number, return_type, signature) return_type __svc(number) signature -#elif defined (__GNUC__) -#ifdef __cplusplus -#define GCC_CAST_CPP (uint16_t) -#else -#define GCC_CAST_CPP -#endif -#define SVCALL(number, return_type, signature) \ - _Pragma("GCC diagnostic push") \ - _Pragma("GCC diagnostic ignored \"-Wreturn-type\"") \ - __attribute__((naked)) \ - __attribute__((unused)) \ - static return_type signature \ - { \ - __asm( \ - "svc %0\n" \ - "bx r14" : : "I" (GCC_CAST_CPP number) : "r0" \ - ); \ - } \ - _Pragma("GCC diagnostic pop") - -#elif defined (__ICCARM__) -#define PRAGMA(x) _Pragma(#x) -#define SVCALL(number, return_type, signature) \ -PRAGMA(swi_number = (number)) \ - __swi return_type signature; -#else -#define SVCALL(number, return_type, signature) return_type signature -#endif -#endif // SVCALL - -#endif // SVCALL_AS_NORMAL_FUNCTION - -#ifdef __cplusplus -} -#endif -#endif // NRF_SVC__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/hex/s132_nrf52_5.0.0_licence-agreement.txt b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/hex/s132_nrf52_5.0.0_licence-agreement.txt deleted file mode 100644 index 00c2e54c477..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/hex/s132_nrf52_5.0.0_licence-agreement.txt +++ /dev/null @@ -1,35 +0,0 @@ -Copyright (c) 2007 - 2017, Nordic Semiconductor ASA -All rights reserved. - -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - -1. Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. - -2. Redistributions in binary form, except as embedded into a Nordic - Semiconductor ASA integrated circuit in a product or a software update for - such product, must reproduce the above copyright notice, this list of - conditions and the following disclaimer in the documentation and/or other - materials provided with the distribution. - -3. Neither the name of Nordic Semiconductor ASA nor the names of its - contributors may be used to endorse or promote products derived from this - software without specific prior written permission. - -4. This software, with or without modification, must only be used with a - Nordic Semiconductor ASA integrated circuit. - -5. Any software provided in binary form under this license must not be reverse - engineered, decompiled, modified and/or disassembled. - -THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS -OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE -LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT -OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/hex/s132_nrf52_5.0.0_softdevice.hex b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/hex/s132_nrf52_5.0.0_softdevice.hex deleted file mode 100644 index a644fbaf38c..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_FULL/hex/s132_nrf52_5.0.0_softdevice.hex +++ /dev/null @@ -1,8678 +0,0 @@ -:020000040000FA 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"NRF_SDH_BLE_GATT_MAX_MTU_SIZE=23", - "NRF_SDH_BLE_OBSERVER_PRIO_LEVELS=4", - "NRF_SDH_BLE_GAP_EVENT_LENGTH=3", - "BLE_ADV_BLE_OBSERVER_PRIO=1", - "BLE_CONN_STATE_BLE_OBSERVER_PRIO=0", - "BLE_CONN_PARAMS_BLE_OBSERVER_PRIO=1", - "NRF_BLE_GATT_BLE_OBSERVER_PRIO=1", - "NRF_SDH_DISPATCH_MODEL=2", - "NRF_SDH_SOC_ENABLED=1", - "NRF_SDH_STACK_OBSERVER_PRIO_LEVELS=2", - "NRF_SDH_STATE_OBSERVER_PRIO_LEVELS=2", - "NRF_SDH_SOC_OBSERVER_PRIO_LEVELS=2", - "NRF_SDH_REQ_OBSERVER_PRIO_LEVELS=2", - "NRF_SDH_BLE_STACK_OBSERVER_PRIO=0", - "NRF_SDH_SOC_STACK_OBSERVER_PRIO=0", - "FDS_BACKEND=2", - "SWI_DISABLE1", - "SWI_DISABLE2", - "SWI_DISABLE3", - "SWI_DISABLE4", - "SWI_DISABLE5" - ], - "target_overrides": { - "*": { - "target.features_add": ["BLE"], - "target.bootloader_img": "hex/s132_nrf52_5.0.0_softdevice.hex" - } - } -} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/doc/s132_nrf51822_5.0.0_release-notes.pdf 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Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. - -2. Redistributions in binary form, except as embedded into a Nordic - Semiconductor ASA integrated circuit in a product or a software update for - such product, must reproduce the above copyright notice, this list of - conditions and the following disclaimer in the documentation and/or other - materials provided with the distribution. - -3. Neither the name of Nordic Semiconductor ASA nor the names of its - contributors may be used to endorse or promote products derived from this - software without specific prior written permission. - -4. This software, with or without modification, must only be used with a - Nordic Semiconductor ASA integrated circuit. - -5. Any software provided in binary form under this license must not be reverse - engineered, decompiled, modified and/or disassembled. - -THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS -OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. 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Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. - -2. Redistributions in binary form, except as embedded into a Nordic - Semiconductor ASA integrated circuit in a product or a software update for - such product, must reproduce the above copyright notice, this list of - conditions and the following disclaimer in the documentation and/or other - materials provided with the distribution. - -3. Neither the name of Nordic Semiconductor ASA nor the names of its - contributors may be used to endorse or promote products derived from this - software without specific prior written permission. - -4. This software, with or without modification, must only be used with a - Nordic Semiconductor ASA integrated circuit. - -5. Any software provided in binary form under this license must not be reverse - engineered, decompiled, modified and/or disassembled. - -THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS -OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE -LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT -OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/hex/s132_nrf52_5.0.0_mbr.hex b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/hex/s132_nrf52_5.0.0_mbr.hex deleted file mode 100644 index 99c8a2082e6..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/hex/s132_nrf52_5.0.0_mbr.hex +++ /dev/null @@ -1,77 +0,0 @@ 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b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/libraries/fstorage/nrf_fstorage_nvmc.c deleted file mode 100644 index b7c1ac01f6e..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/libraries/fstorage/nrf_fstorage_nvmc.c +++ /dev/null @@ -1,215 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" - -#if NRF_MODULE_ENABLED(NRF_FSTORAGE) - -#include "nrf_fstorage_nvmc.h" -#include -#include -#include -#include "nrf_nvmc.h" -#include "nrf_atomic.h" - - -static nrf_fstorage_info_t m_flash_info = -{ -#if defined(NRF51) - .erase_unit = 1024, -#elif defined(NRF52_SERIES) - .erase_unit = 4096, -#endif - .program_unit = 4, - .rmap = true, - .wmap = false, -}; - - - /* An operation initiated by fstorage is ongoing. */ -static nrf_atomic_flag_t m_flash_operation_ongoing; - - -/* Send event to the event handler. */ -static void event_send(nrf_fstorage_t const * p_fs, - nrf_fstorage_evt_id_t evt_id, - uint32_t addr, - uint32_t len, - void * p_param) -{ - if (p_fs->evt_handler == NULL) - { - /* Nothing to do. */ - return; - } - - nrf_fstorage_evt_t evt = - { - .result = NRF_SUCCESS, - .id = evt_id, - .addr = addr, - .len = len, - .p_param = p_param, - }; - - p_fs->evt_handler(&evt); -} - - -static ret_code_t init(nrf_fstorage_t * p_fs, void * p_param) -{ - UNUSED_PARAMETER(p_param); - - p_fs->p_flash_info = &m_flash_info; - - return NRF_SUCCESS; -} - - -static ret_code_t uninit(nrf_fstorage_t * p_fs, void * p_param) -{ - UNUSED_PARAMETER(p_fs); - UNUSED_PARAMETER(p_param); - - (void) nrf_atomic_flag_clear(&m_flash_operation_ongoing); - - return NRF_SUCCESS; -} - - -static ret_code_t read(nrf_fstorage_t const * p_fs, uint32_t src, void * p_dest, uint32_t len) -{ - UNUSED_PARAMETER(p_fs); - - memcpy(p_dest, (uint32_t*)src, len); - - return NRF_SUCCESS; -} - - -static ret_code_t write(nrf_fstorage_t const * p_fs, - uint32_t dest, - void const * p_src, - uint32_t len, - void * p_param) -{ - if (nrf_atomic_flag_set_fetch(&m_flash_operation_ongoing)) - { - return NRF_ERROR_BUSY; - } - - nrf_nvmc_write_words(dest, (uint32_t*)p_src, (len / m_flash_info.program_unit)); - - /* Clear the flag before sending the event, to allow API calls in the event context. */ - (void) nrf_atomic_flag_clear(&m_flash_operation_ongoing); - - event_send(p_fs, NRF_FSTORAGE_EVT_WRITE_RESULT, dest, len, p_param); - - return NRF_SUCCESS; -} - - -static ret_code_t erase(nrf_fstorage_t const * p_fs, - uint32_t page_addr, - uint32_t len, - void * p_param) -{ - uint32_t progress = 0; - - if (nrf_atomic_flag_set_fetch(&m_flash_operation_ongoing)) - { - return NRF_ERROR_BUSY; - } - - while (progress != len) - { - nrf_nvmc_page_erase(page_addr + (progress * m_flash_info.erase_unit)); - progress++; - } - - /* Clear the flag before sending the event, to allow API calls in the event context. */ - (void) nrf_atomic_flag_clear(&m_flash_operation_ongoing); - - event_send(p_fs, NRF_FSTORAGE_EVT_ERASE_RESULT, page_addr, len, p_param); - - return NRF_SUCCESS; -} - - -static uint8_t const * rmap(nrf_fstorage_t const * p_fs, uint32_t addr) -{ - UNUSED_PARAMETER(p_fs); - - return (uint8_t*)addr; -} - - -static uint8_t * wmap(nrf_fstorage_t const * p_fs, uint32_t addr) -{ - UNUSED_PARAMETER(p_fs); - UNUSED_PARAMETER(addr); - - /* Not supported. */ - return NULL; -} - - -static bool is_busy(nrf_fstorage_t const * p_fs) -{ - UNUSED_PARAMETER(p_fs); - - return m_flash_operation_ongoing; -} - - -/* The exported API. */ -nrf_fstorage_api_t nrf_fstorage_nvmc = -{ - .init = init, - .uninit = uninit, - .read = read, - .write = write, - .erase = erase, - .rmap = rmap, - .wmap = wmap, - .is_busy = is_busy -}; - - -#endif // NRF_FSTORAGE_ENABLED diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/libraries/fstorage/nrf_fstorage_nvmc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/libraries/fstorage/nrf_fstorage_nvmc.h deleted file mode 100644 index be3477556cc..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/libraries/fstorage/nrf_fstorage_nvmc.h +++ /dev/null @@ -1,75 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - * @file - * - * @defgroup nrf_fstorage_nvmc NVMC implementation - * @ingroup nrf_fstorage - * @{ - * - * @brief API implementation of fstorage that uses the non-volatile memory controller (NVMC). -*/ - -#ifndef NRF_FSTORAGE_NVMC_H__ -#define NRF_FSTORAGE_NVMC_H__ - -#include "nrf_fstorage.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -/**@brief API implementation that uses the non-volatile memory controller. - * - * @details An fstorage instance with this API implementation can be initialized by providing - * this structure as a parameter to @ref nrf_fstorage_init. - * The structure is defined in @c nrf_fstorage_nvmc.c. - */ -extern nrf_fstorage_api_t nrf_fstorage_nvmc; - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_FSTORAGE_NVMC_H__ -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/mbed_lib.json b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/mbed_lib.json deleted file mode 100644 index 875a95489ab..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/mbed_lib.json +++ /dev/null @@ -1,8 +0,0 @@ -{ - "name": "softdevice_mbr", - "target_overrides": { - "*": { - "target.bootloader_img": "hex/s132_nrf52_5.0.0_mbr.hex" - } - } -} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/mbr/nrf_mbr.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/mbr/nrf_mbr.h deleted file mode 100644 index c95bb8d4fd7..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/mbr/nrf_mbr.h +++ /dev/null @@ -1,228 +0,0 @@ -/* - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @defgroup nrf_mbr_api Master Boot Record API - @{ - - @brief APIs for updating SoftDevice and BootLoader - -*/ - -#ifndef NRF_MBR_H__ -#define NRF_MBR_H__ - -#include "nrf_svc.h" -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup NRF_MBR_DEFINES Defines - * @{ */ - -/**@brief MBR SVC Base number. */ -#define MBR_SVC_BASE (0x18) - -/**@brief Page size in words. */ -#define MBR_PAGE_SIZE_IN_WORDS (1024) - -/** @brief The size that must be reserved for the MBR when a SoftDevice is written to flash. -This is the offset where the first byte of the SoftDevice hex file is written.*/ -#define MBR_SIZE (0x1000) - -/** @} */ - -/** @addtogroup NRF_MBR_ENUMS Enumerations - * @{ */ - -/**@brief nRF Master Boot Record API SVC numbers. */ -enum NRF_MBR_SVCS -{ - SD_MBR_COMMAND = MBR_SVC_BASE, /**< ::sd_mbr_command */ -}; - -/**@brief Possible values for ::sd_mbr_command_t.command */ -enum NRF_MBR_COMMANDS -{ - SD_MBR_COMMAND_COPY_BL, /**< Copy a new BootLoader. @see sd_mbr_command_copy_bl_t*/ - SD_MBR_COMMAND_COPY_SD, /**< Copy a new SoftDevice. @see ::sd_mbr_command_copy_sd_t*/ - SD_MBR_COMMAND_INIT_SD, /**< Initialize forwarding interrupts to SD, and run reset function in SD*/ - SD_MBR_COMMAND_COMPARE, /**< This command works like memcmp. @see ::sd_mbr_command_compare_t*/ - SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET, /**< Change the address the MBR starts after a reset @see ::sd_mbr_command_vector_table_base_set_t*/ - SD_MBR_COMMAND_RESERVED, - SD_MBR_COMMAND_IRQ_FORWARD_ADDRESS_SET, /**< Start forwarding all interrupts to this address @see ::sd_mbr_command_irq_forward_address_set_t*/ -}; - -/** @} */ - -/** @addtogroup NRF_MBR_TYPES Types - * @{ */ - -/**@brief This command copies part of a new SoftDevice - * The destination area is erased before copying. - * If dst is in the middle of a flash page, that whole flash page will be erased. - * If (dst+len) is in the middle of a flash page, that whole flash page will be erased. - * - * The user of this function is responsible for setting the BPROT registers. - * - * @retval ::NRF_SUCCESS indicates that the contents of the memory blocks where copied correctly. - * @retval ::NRF_ERROR_INTERNAL indicates that the contents of the memory blocks where not verified correctly after copying. - */ -typedef struct -{ - uint32_t *src; /**< Pointer to the source of data to be copied.*/ - uint32_t *dst; /**< Pointer to the destination where the content is to be copied.*/ - uint32_t len; /**< Number of 32 bit words to copy. Must be a multiple of @ref MBR_PAGE_SIZE_IN_WORDS words.*/ -} sd_mbr_command_copy_sd_t; - - -/**@brief This command works like memcmp, but takes the length in words. - * - * @retval ::NRF_SUCCESS indicates that the contents of both memory blocks are equal. - * @retval ::NRF_ERROR_NULL indicates that the contents of the memory blocks are not equal. - */ -typedef struct -{ - uint32_t *ptr1; /**< Pointer to block of memory. */ - uint32_t *ptr2; /**< Pointer to block of memory. */ - uint32_t len; /**< Number of 32 bit words to compare.*/ -} sd_mbr_command_compare_t; - - -/**@brief This command copies a new BootLoader. - * With this command, destination of BootLoader is always the address written in NRF_UICR->BOOTADDR. - * - * Destination is erased by this function. - * If (destination+bl_len) is in the middle of a flash page, that whole flash page will be erased. - * - * This function will use PROTENSET to protect the flash that is not intended to be written. - * - * On success, this function will not return. It will start the new BootLoader from reset-vector as normal. - * - * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. - * @retval ::NRF_ERROR_FORBIDDEN if NRF_UICR->BOOTADDR is not set. - * @retval ::NRF_ERROR_INVALID_LENGTH if parameters attempts to read or write outside flash area. - * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) - */ -typedef struct -{ - uint32_t *bl_src; /**< Pointer to the source of the Bootloader to be be copied.*/ - uint32_t bl_len; /**< Number of 32 bit words to copy for BootLoader. */ -} sd_mbr_command_copy_bl_t; - -/**@brief Change the address the MBR starts after a reset - * - * Once this function has been called, this address is where the MBR will start to forward interrupts to after a reset. - * - * To restore default forwarding this function should be called with @param address set to 0. - * The MBR will then start forwarding to interrupts to the address in NFR_UICR->BOOTADDR or to the SoftDevice if the BOOTADDR is not set. - * - * On success, this function will not return. It will reset the device. - * - * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. - * @retval ::NRF_ERROR_INVALID_ADDR if parameter address is outside of the flash size. - * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) - */ -typedef struct -{ - uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ -} sd_mbr_command_vector_table_base_set_t; - -/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the MBR - * Unlike sd_mbr_command_vector_table_base_set_t, this function does not reset, and it does not - * change where the MBR starts after reset. - * - * @retval ::NRF_SUCCESS - */ -typedef struct -{ - uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ -} sd_mbr_command_irq_forward_address_set_t; - -typedef struct -{ - uint32_t command; /**< type of command to be issued see @ref NRF_MBR_COMMANDS. */ - union - { - sd_mbr_command_copy_sd_t copy_sd; /**< Parameters for copy SoftDevice.*/ - sd_mbr_command_compare_t compare; /**< Parameters for verify.*/ - sd_mbr_command_copy_bl_t copy_bl; /**< Parameters for copy BootLoader. Requires parameter page. */ - sd_mbr_command_vector_table_base_set_t base_set; /**< Parameters for vector table base set. Requires parameter page.*/ - sd_mbr_command_irq_forward_address_set_t irq_forward_address_set; /**< Parameters for irq forward address set*/ - } params; -} sd_mbr_command_t; - -/** @} */ - -/** @addtogroup NRF_MBR_FUNCTIONS Functions - * @{ */ - -/**@brief Issue Master Boot Record commands - * - * Commands used when updating a SoftDevice and bootloader. - * - * The SD_MBR_COMMAND_COPY_BL and SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET requires parameters to be - * retained by the MBR when resetting the IC. This is done in a separate flash page - * provided by the application. The UICR register UICR.NRFFW[1] must be set - * to an address corresponding to a page in the application flash space. This page will be cleared - * by the MBR and used to store the command before reset. When the UICR.NRFFW[1] field is set - * the page it refers to must not be used by the application. If the UICR.NRFFW[1] is set to - * 0xFFFFFFFF (the default) MBR commands which use flash will be unavailable and return - * NRF_ERROR_NO_MEM. - * - * @param[in] param Pointer to a struct describing the command. - * - * @note For return values, see ::sd_mbr_command_copy_sd_t ::sd_mbr_command_copy_bl_t ::sd_mbr_command_compare_t ::sd_mbr_command_vector_table_base_set_t ::sd_mbr_command_irq_forward_address_set_t - * - * @retval NRF_ERROR_NO_MEM if UICR.NRFFW[1] is not set (i.e. is 0xFFFFFFFF). - * @retval NRF_ERROR_INVALID_PARAM if an invalid command is given. -*/ -SVCALL(SD_MBR_COMMAND, uint32_t, sd_mbr_command(sd_mbr_command_t* param)); - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // NRF_MBR_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_error.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_error.h deleted file mode 100644 index 6ae2c9b52ac..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_error.h +++ /dev/null @@ -1,87 +0,0 @@ -/** - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/* Header guard */ -#ifndef NRF_ERROR_H__ -#define NRF_ERROR_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/// @cond Make doxygen skip this file - -/** @defgroup NRF_ERRORS_BASE Error Codes Base number definitions - * @{ */ -#define NRF_ERROR_BASE_NUM (0x0) ///< Global error base -#define NRF_ERROR_SDM_BASE_NUM (0x1000) ///< SDM error base -#define NRF_ERROR_SOC_BASE_NUM (0x2000) ///< SoC error base -#define NRF_ERROR_STK_BASE_NUM (0x3000) ///< STK error base -/** @} */ - -#define NRF_SUCCESS (NRF_ERROR_BASE_NUM + 0) ///< Successful command -#define NRF_ERROR_SVC_HANDLER_MISSING (NRF_ERROR_BASE_NUM + 1) ///< SVC handler is missing -#define NRF_ERROR_SOFTDEVICE_NOT_ENABLED (NRF_ERROR_BASE_NUM + 2) ///< SoftDevice has not been enabled -#define NRF_ERROR_INTERNAL (NRF_ERROR_BASE_NUM + 3) ///< Internal Error -#define NRF_ERROR_NO_MEM (NRF_ERROR_BASE_NUM + 4) ///< No Memory for operation -#define NRF_ERROR_NOT_FOUND (NRF_ERROR_BASE_NUM + 5) ///< Not found -#define NRF_ERROR_NOT_SUPPORTED (NRF_ERROR_BASE_NUM + 6) ///< Not supported -#define NRF_ERROR_INVALID_PARAM (NRF_ERROR_BASE_NUM + 7) ///< Invalid Parameter -#define NRF_ERROR_INVALID_STATE (NRF_ERROR_BASE_NUM + 8) ///< Invalid state, operation disallowed in this state -#define NRF_ERROR_INVALID_LENGTH (NRF_ERROR_BASE_NUM + 9) ///< Invalid Length -#define NRF_ERROR_INVALID_FLAGS (NRF_ERROR_BASE_NUM + 10) ///< Invalid Flags -#define NRF_ERROR_INVALID_DATA (NRF_ERROR_BASE_NUM + 11) ///< Invalid Data -#define NRF_ERROR_DATA_SIZE (NRF_ERROR_BASE_NUM + 12) ///< Data size exceeds limit -#define NRF_ERROR_TIMEOUT (NRF_ERROR_BASE_NUM + 13) ///< Operation timed out -#define NRF_ERROR_NULL (NRF_ERROR_BASE_NUM + 14) ///< Null Pointer -#define NRF_ERROR_FORBIDDEN (NRF_ERROR_BASE_NUM + 15) ///< Forbidden Operation -#define NRF_ERROR_INVALID_ADDR (NRF_ERROR_BASE_NUM + 16) ///< Bad Memory Address -#define NRF_ERROR_BUSY (NRF_ERROR_BASE_NUM + 17) ///< Busy - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_ERROR_H__ - -/// @endcond -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_nvic.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_nvic.c deleted file mode 100644 index 45803bf61a8..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_nvic.c +++ /dev/null @@ -1,123 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include -#include "nrf_soc.h" -#include "nrf_error.h" - -static uint8_t m_in_critical_region = 0; - -uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn) -{ - NVIC_EnableIRQ(IRQn); - return NRF_SUCCESS; -} - -uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn) -{ - NVIC_DisableIRQ(IRQn); - return NRF_SUCCESS; -} - -uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq) -{ - if (p_pending_irq != NULL) - { - *p_pending_irq = NVIC_GetPendingIRQ(IRQn); - return NRF_SUCCESS; - } - return NRF_ERROR_NULL; -} - -uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC_SetPendingIRQ(IRQn); - return NRF_SUCCESS; -} - -uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC_ClearPendingIRQ(IRQn); - return NRF_SUCCESS; -} - -uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - NVIC_SetPriority(IRQn, priority); - return NRF_SUCCESS; -} - -uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority) -{ - if (p_priority != NULL) - { - *p_priority = NVIC_GetPriority(IRQn); - return NRF_SUCCESS; - } - - return NRF_ERROR_NULL; -} - -uint32_t sd_nvic_SystemReset(void) -{ - NVIC_SystemReset(); - return NRF_SUCCESS; -} - -uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region) -{ - __disable_irq(); - - *p_is_nested_critical_region = (m_in_critical_region != 0); - m_in_critical_region++; - - return NRF_SUCCESS; -} - -uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region) -{ - m_in_critical_region--; - - if (is_nested_critical_region == 0) - { - m_in_critical_region = 0; - __enable_irq(); - } - return NRF_SUCCESS; -} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_nvic.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_nvic.h deleted file mode 100644 index 3ab15d66d10..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_nvic.h +++ /dev/null @@ -1,166 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_NVIC_H__ -#define NRF_NVIC_H__ - -#include -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@brief Enable External Interrupt. - * @note Corresponds to NVIC_EnableIRQ in CMSIS. - * - * @pre{IRQn is valid and not reserved by the stack} - * - * @param[in] IRQn See the NVIC_EnableIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt was enabled. - */ -uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn); - -/**@brief Disable External Interrupt. - * @note Corresponds to NVIC_DisableIRQ in CMSIS. - * - * @pre{IRQn is valid and not reserved by the stack} - * - * @param[in] IRQn See the NVIC_DisableIRQ documentation in CMSIS - * - * @retval ::NRF_SUCCESS The interrupt was disabled. - */ -uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn); - -/**@brief Get Pending Interrupt. - * @note Corresponds to NVIC_GetPendingIRQ in CMSIS. - * - * @pre{IRQn is valid and not reserved by the stack} - * - * @param[in] IRQn See the NVIC_GetPendingIRQ documentation in CMSIS. - * @param[out] p_pending_irq Return value from NVIC_GetPendingIRQ. - * - * @retval ::NRF_SUCCESS The interrupt is available for the application. - */ -uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq); - -/**@brief Set Pending Interrupt. - * @note Corresponds to NVIC_SetPendingIRQ in CMSIS. - * - * @pre{IRQn is valid and not reserved by the stack} - * - * @param[in] IRQn See the NVIC_SetPendingIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt is set pending. - */ -uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn); - -/**@brief Clear Pending Interrupt. - * @note Corresponds to NVIC_ClearPendingIRQ in CMSIS. - * - * @pre{IRQn is valid and not reserved by the stack} - * - * @param[in] IRQn See the NVIC_ClearPendingIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt pending flag is cleared. - */ -uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn); - -/**@brief Set Interrupt Priority. - * @note Corresponds to NVIC_SetPriority in CMSIS. - * - * @pre{IRQn is valid and not reserved by the stack} - * @pre{priority is valid and not reserved by the stack} - * - * @param[in] IRQn See the NVIC_SetPriority documentation in CMSIS. - * @param[in] priority A valid IRQ priority for use by the application. - * - * @retval ::NRF_SUCCESS The interrupt and priority level is available for the application. - */ -uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority); - -/**@brief Get Interrupt Priority. - * @note Corresponds to NVIC_GetPriority in CMSIS. - * - * @pre{IRQn is valid and not reserved by the stack} - * - * @param[in] IRQn See the NVIC_GetPriority documentation in CMSIS. - * @param[out] p_priority Return value from NVIC_GetPriority. - * - * @retval ::NRF_SUCCESS The interrupt priority is returned in p_priority. - */ -uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority); - -/**@brief System Reset. - * @note Corresponds to NVIC_SystemReset in CMSIS. - * - * @retval ::NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN - */ -uint32_t sd_nvic_SystemReset(void); - -/**@brief Enters critical region. - * - * @post Application interrupts will be disabled. - * @sa sd_nvic_critical_region_exit - * - * @param[out] p_is_nested_critical_region 1: If in a nested critical region. - * 0: Otherwise. - * - * @retval ::NRF_SUCCESS - */ -uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region); - -/**@brief Exit critical region. - * - * @pre Application has entered a critical region using ::sd_nvic_critical_region_enter. - * @post If not in a nested critical region, the application interrupts will restored to the state before ::sd_nvic_critical_region_enter was called. - * - * @param[in] is_nested_critical_region If this is set to 1, the critical region won't be exited. @sa sd_nvic_critical_region_enter. - * - * @retval ::NRF_SUCCESS - */ -uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region); - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_NVIC_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_soc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_soc.c deleted file mode 100644 index 8b273d74bf5..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_soc.c +++ /dev/null @@ -1,48 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include -#include "nrf_soc.h" -#include "nrf_error.h" - -uint32_t sd_app_evt_wait(void) -{ - __WFE(); - return NRF_SUCCESS; -} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_soc.h deleted file mode 100644 index 3119ada366f..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_MBR/nrf_soc_nosd/nrf_soc.h +++ /dev/null @@ -1,80 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_SOC_H__ -#define NRF_SOC_H__ - -#include -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@brief Waits for an application event. - * - * An application event is either an application interrupt or a pended interrupt when the - * interrupt is disabled. When the interrupt is enabled it will be taken immediately since - * this function will wait in thread mode, then the execution will return in the application's - * main thread. When an interrupt is disabled and gets pended it will return to the application's - * thread main. The application must ensure that the pended flag is cleared using - * ::sd_nvic_ClearPendingIRQ in order to sleep using this function. This is only necessary for - * disabled interrupts, as the interrupt handler will clear the pending flag automatically for - * enabled interrupts. - * - * In order to wake up from disabled interrupts, the SEVONPEND flag has to be set in the Cortex-M0 - * System Control Register (SCR). @sa CMSIS_SCB - * - * @note If an application interrupt has happened since the last time sd_app_evt_wait was - * called this function will return immediately and not go to sleep. This is to avoid race - * conditions that can occur when a flag is updated in the interrupt handler and processed - * in the main loop. - * - * @post An application interrupt has happened or a interrupt pending flag is set. - * - * @retval ::NRF_SUCCESS - */ -uint32_t sd_app_evt_wait(void); - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_SOC_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/doc/s132_nrf51822_5.0.0_release-notes.pdf b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/doc/s132_nrf51822_5.0.0_release-notes.pdf deleted file mode 100644 index 0cff6f8c314cead8d5a26b10d50b81c07cfc5d70..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 35595 zcmcG#b9iM@mnR(CPAa&uZQHhO+eXEF=j`HSYG@1NksYHlVYkkJ)OAPwn2tMs`oZx-6t-9Z1`K&t7!|Bp zWK4#HiI5WV^P9hwJLyP678`;KGUesu`MHApx%4myMPfWAxC;E6S_Adt5D5N|C(H~@ z5W(|D?ss6F#_cv>78*)`yfYVnJ0gfLFt+GX( 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/dev/null @@ -1,35 +0,0 @@ -Copyright (c) 2007 - 2017, Nordic Semiconductor ASA -All rights reserved. - -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - -1. 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Any software provided in binary form under this license must not be reverse - engineered, decompiled, modified and/or disassembled. - -THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS -OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE -LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT -OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/doc/s132_nrf52_5.0.0_migration-document.pdf b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/doc/s132_nrf52_5.0.0_migration-document.pdf deleted file mode 100644 index afd9ec7f417a65d00913eebe6eaebdfd90a17931..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 99118 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Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_COMMON - @{ - @addtogroup nrf_error - @{ - @ingroup BLE_COMMON - @} - - @defgroup ble_err General error codes - @{ - - @brief General error code definitions for the BLE API. - - @ingroup BLE_COMMON -*/ -#ifndef NRF_BLE_ERR_H__ -#define NRF_BLE_ERR_H__ - -#include "nrf_error.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* @defgroup BLE_ERRORS Error Codes - * @{ */ -#define BLE_ERROR_NOT_ENABLED (NRF_ERROR_STK_BASE_NUM+0x001) /**< @ref sd_ble_enable has not been called. */ -#define BLE_ERROR_INVALID_CONN_HANDLE (NRF_ERROR_STK_BASE_NUM+0x002) /**< Invalid connection handle. */ -#define BLE_ERROR_INVALID_ATTR_HANDLE (NRF_ERROR_STK_BASE_NUM+0x003) /**< Invalid attribute handle. */ -#define BLE_ERROR_INVALID_ROLE (NRF_ERROR_STK_BASE_NUM+0x004) /**< Invalid role. */ -/** @} */ - - -/** @defgroup BLE_ERROR_SUBRANGES Module specific error code subranges - * @brief Assignment of subranges for module specific error codes. - * @note For specific error codes, see ble_.h or ble_error_.h. - * @{ */ -#define NRF_L2CAP_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x100) /**< L2CAP specific errors. */ -#define NRF_GAP_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x200) /**< GAP specific errors. */ -#define NRF_GATTC_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x300) /**< GATT client specific errors. */ -#define NRF_GATTS_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x400) /**< GATT server specific errors. */ -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif - - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/ble_gap.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/ble_gap.h deleted file mode 100644 index 13f7721c583..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/ble_gap.h +++ /dev/null @@ -1,2170 +0,0 @@ -/* - * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_GAP Generic Access Profile (GAP) - @{ - @brief Definitions and prototypes for the GAP interface. - */ - -#ifndef BLE_GAP_H__ -#define BLE_GAP_H__ - - -#include "ble_types.h" -#include "ble_ranges.h" -#include "nrf_svc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@addtogroup BLE_GAP_ENUMERATIONS Enumerations - * @{ */ - -/**@brief GAP API SVC numbers. - */ -enum BLE_GAP_SVCS -{ - SD_BLE_GAP_ADDR_SET = BLE_GAP_SVC_BASE, /**< Set own Bluetooth Address. */ - SD_BLE_GAP_ADDR_GET, /**< Get own Bluetooth Address. */ - SD_BLE_GAP_WHITELIST_SET, /**< Set active whitelist. */ - SD_BLE_GAP_DEVICE_IDENTITIES_SET, /**< Set device identity list. */ - SD_BLE_GAP_PRIVACY_SET, /**< Set Privacy settings*/ - SD_BLE_GAP_PRIVACY_GET, /**< Get Privacy settings*/ - SD_BLE_GAP_ADV_DATA_SET, /**< Set Advertising Data. */ - SD_BLE_GAP_ADV_START, /**< Start Advertising. */ - SD_BLE_GAP_ADV_STOP, /**< Stop Advertising. */ - SD_BLE_GAP_CONN_PARAM_UPDATE, /**< Connection Parameter Update. */ - SD_BLE_GAP_DISCONNECT, /**< Disconnect. */ - SD_BLE_GAP_TX_POWER_SET, /**< Set TX Power. */ - SD_BLE_GAP_APPEARANCE_SET, /**< Set Appearance. */ - SD_BLE_GAP_APPEARANCE_GET, /**< Get Appearance. */ - SD_BLE_GAP_PPCP_SET, /**< Set PPCP. */ - SD_BLE_GAP_PPCP_GET, /**< Get PPCP. */ - SD_BLE_GAP_DEVICE_NAME_SET, /**< Set Device Name. */ - SD_BLE_GAP_DEVICE_NAME_GET, /**< Get Device Name. */ - SD_BLE_GAP_AUTHENTICATE, /**< Initiate Pairing/Bonding. */ - SD_BLE_GAP_SEC_PARAMS_REPLY, /**< Reply with Security Parameters. */ - SD_BLE_GAP_AUTH_KEY_REPLY, /**< Reply with an authentication key. */ - SD_BLE_GAP_LESC_DHKEY_REPLY, /**< Reply with an LE Secure Connections DHKey. */ - SD_BLE_GAP_KEYPRESS_NOTIFY, /**< Notify of a keypress during an authentication procedure. */ - SD_BLE_GAP_LESC_OOB_DATA_GET, /**< Get the local LE Secure Connections OOB data. */ - SD_BLE_GAP_LESC_OOB_DATA_SET, /**< Set the remote LE Secure Connections OOB data. */ - SD_BLE_GAP_ENCRYPT, /**< Initiate encryption procedure. */ - SD_BLE_GAP_SEC_INFO_REPLY, /**< Reply with Security Information. */ - SD_BLE_GAP_CONN_SEC_GET, /**< Obtain connection security level. */ - SD_BLE_GAP_RSSI_START, /**< Start reporting of changes in RSSI. */ - SD_BLE_GAP_RSSI_STOP, /**< Stop reporting of changes in RSSI. */ - SD_BLE_GAP_SCAN_START, /**< Start Scanning. */ - SD_BLE_GAP_SCAN_STOP, /**< Stop Scanning. */ - SD_BLE_GAP_CONNECT, /**< Connect. */ - SD_BLE_GAP_CONNECT_CANCEL, /**< Cancel ongoing connection procedure. */ - SD_BLE_GAP_RSSI_GET, /**< Get the last RSSI sample. */ - SD_BLE_GAP_PHY_UPDATE, /**< Initiate or respond to a PHY Update Procedure. */ - SD_BLE_GAP_DATA_LENGTH_UPDATE, /**< Initiate or respond to a Data Length Update Procedure. */ -}; - -/**@brief GAP Event IDs. - * IDs that uniquely identify an event coming from the stack to the application. - */ -enum BLE_GAP_EVTS -{ - BLE_GAP_EVT_CONNECTED = BLE_GAP_EVT_BASE, /**< Connection established. \n See @ref ble_gap_evt_connected_t. */ - BLE_GAP_EVT_DISCONNECTED, /**< Disconnected from peer. \n See @ref ble_gap_evt_disconnected_t. */ - BLE_GAP_EVT_CONN_PARAM_UPDATE, /**< Connection Parameters updated. \n See @ref ble_gap_evt_conn_param_update_t. */ - BLE_GAP_EVT_SEC_PARAMS_REQUEST, /**< Request to provide security parameters. \n Reply with @ref sd_ble_gap_sec_params_reply. \n See @ref ble_gap_evt_sec_params_request_t. */ - BLE_GAP_EVT_SEC_INFO_REQUEST, /**< Request to provide security information. \n Reply with @ref sd_ble_gap_sec_info_reply. \n See @ref ble_gap_evt_sec_info_request_t. */ - BLE_GAP_EVT_PASSKEY_DISPLAY, /**< Request to display a passkey to the user. \n In LESC Numeric Comparison, reply with @ref sd_ble_gap_auth_key_reply. \n See @ref ble_gap_evt_passkey_display_t. */ - BLE_GAP_EVT_KEY_PRESSED, /**< Notification of a keypress on the remote device.\n See @ref ble_gap_evt_key_pressed_t */ - BLE_GAP_EVT_AUTH_KEY_REQUEST, /**< Request to provide an authentication key. \n Reply with @ref sd_ble_gap_auth_key_reply. \n See @ref ble_gap_evt_auth_key_request_t. */ - BLE_GAP_EVT_LESC_DHKEY_REQUEST, /**< Request to calculate an LE Secure Connections DHKey. \n Reply with @ref sd_ble_gap_lesc_dhkey_reply. \n See @ref ble_gap_evt_lesc_dhkey_request_t */ - BLE_GAP_EVT_AUTH_STATUS, /**< Authentication procedure completed with status. \n See @ref ble_gap_evt_auth_status_t. */ - BLE_GAP_EVT_CONN_SEC_UPDATE, /**< Connection security updated. \n See @ref ble_gap_evt_conn_sec_update_t. */ - BLE_GAP_EVT_TIMEOUT, /**< Timeout expired. \n See @ref ble_gap_evt_timeout_t. */ - BLE_GAP_EVT_RSSI_CHANGED, /**< RSSI report. \n See @ref ble_gap_evt_rssi_changed_t. */ - BLE_GAP_EVT_ADV_REPORT, /**< Advertising report. \n See @ref ble_gap_evt_adv_report_t. */ - BLE_GAP_EVT_SEC_REQUEST, /**< Security Request. \n See @ref ble_gap_evt_sec_request_t. */ - BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST, /**< Connection Parameter Update Request. \n Reply with @ref sd_ble_gap_conn_param_update. \n See @ref ble_gap_evt_conn_param_update_request_t. */ - BLE_GAP_EVT_SCAN_REQ_REPORT, /**< Scan request report. \n See @ref ble_gap_evt_scan_req_report_t. */ - BLE_GAP_EVT_PHY_UPDATE_REQUEST, /**< PHY Update Request. \n Reply with @ref sd_ble_gap_phy_update. \n See @ref ble_gap_evt_phy_update_request_t. */ - BLE_GAP_EVT_PHY_UPDATE, /**< PHY Update Procedure is complete. \n See @ref ble_gap_evt_phy_update_t. */ - BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST, /**< Data Length Update Request. \n Reply with @ref sd_ble_gap_data_length_update.\n See @ref ble_gap_evt_data_length_update_request_t. */ - BLE_GAP_EVT_DATA_LENGTH_UPDATE, /**< LL Data Channel PDU payload length updated. \n See @ref ble_gap_evt_data_length_update_t. */ -}; - -/**@brief GAP Option IDs. - * IDs that uniquely identify a GAP option. - */ -enum BLE_GAP_OPTS -{ - BLE_GAP_OPT_CH_MAP = BLE_GAP_OPT_BASE, /**< Channel Map. @ref ble_gap_opt_ch_map_t */ - BLE_GAP_OPT_LOCAL_CONN_LATENCY, /**< Local connection latency. @ref ble_gap_opt_local_conn_latency_t */ - BLE_GAP_OPT_PASSKEY, /**< Set passkey. @ref ble_gap_opt_passkey_t */ - BLE_GAP_OPT_SCAN_REQ_REPORT, /**< Scan request report. @ref ble_gap_opt_scan_req_report_t */ - BLE_GAP_OPT_COMPAT_MODE_1, /**< Compatibility mode. @ref ble_gap_opt_compat_mode_1_t */ - BLE_GAP_OPT_AUTH_PAYLOAD_TIMEOUT, /**< Set Authenticated payload timeout. @ref ble_gap_opt_auth_payload_timeout_t */ - BLE_GAP_OPT_SLAVE_LATENCY_DISABLE, /**< Disable slave latency. @ref ble_gap_opt_slave_latency_disable_t */ -}; - -/**@brief GAP Configuration IDs. - * - * IDs that uniquely identify a GAP configuration. - */ -enum BLE_GAP_CFGS -{ - BLE_GAP_CFG_ROLE_COUNT = BLE_GAP_CFG_BASE, /**< Role count configuration. */ - BLE_GAP_CFG_DEVICE_NAME, /**< Device name configuration. */ -}; - -/** @} */ - -/**@addtogroup BLE_GAP_DEFINES Defines - * @{ */ - -/**@defgroup BLE_ERRORS_GAP SVC return values specific to GAP - * @{ */ -#define BLE_ERROR_GAP_UUID_LIST_MISMATCH (NRF_GAP_ERR_BASE + 0x000) /**< UUID list does not contain an integral number of UUIDs. */ -#define BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST (NRF_GAP_ERR_BASE + 0x001) /**< Use of Whitelist not permitted with discoverable advertising. */ -#define BLE_ERROR_GAP_INVALID_BLE_ADDR (NRF_GAP_ERR_BASE + 0x002) /**< The upper two bits of the address do not correspond to the specified address type. */ -#define BLE_ERROR_GAP_WHITELIST_IN_USE (NRF_GAP_ERR_BASE + 0x003) /**< Attempt to modify the whitelist while already in use by another operation. */ -#define BLE_ERROR_GAP_DEVICE_IDENTITIES_IN_USE (NRF_GAP_ERR_BASE + 0x004) /**< Attempt to modify the device identity list while already in use by another operation. */ -#define BLE_ERROR_GAP_DEVICE_IDENTITIES_DUPLICATE (NRF_GAP_ERR_BASE + 0x005) /**< The device identity list contains entries with duplicate identity addresses. */ -/**@} */ - - -/**@defgroup BLE_GAP_ROLES GAP Roles - * @note Not explicitly used in peripheral API, but will be relevant for central API. - * @{ */ -#define BLE_GAP_ROLE_INVALID 0x0 /**< Invalid Role. */ -#define BLE_GAP_ROLE_PERIPH 0x1 /**< Peripheral Role. */ -#define BLE_GAP_ROLE_CENTRAL 0x2 /**< Central Role. */ -/**@} */ - - -/**@defgroup BLE_GAP_TIMEOUT_SOURCES GAP Timeout sources - * @{ */ -#define BLE_GAP_TIMEOUT_SRC_ADVERTISING 0x00 /**< Advertising timeout. */ -#define BLE_GAP_TIMEOUT_SRC_SCAN 0x01 /**< Scanning timeout. */ -#define BLE_GAP_TIMEOUT_SRC_CONN 0x02 /**< Connection timeout. */ -#define BLE_GAP_TIMEOUT_SRC_AUTH_PAYLOAD 0x03 /**< Authenticated payload timeout. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADDR_TYPES GAP Address types - * @{ */ -#define BLE_GAP_ADDR_TYPE_PUBLIC 0x00 /**< Public address. */ -#define BLE_GAP_ADDR_TYPE_RANDOM_STATIC 0x01 /**< Random static address. */ -#define BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE 0x02 /**< Random private resolvable address. */ -#define BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE 0x03 /**< Random private non-resolvable address. */ -/**@} */ - - -/**@brief The default interval in seconds at which a private address is refreshed. */ -#define BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S (900) /* 15 minutes. */ -/**@brief The maximum interval in seconds at which a private address can be refreshed. */ -#define BLE_GAP_MAX_PRIVATE_ADDR_CYCLE_INTERVAL_S (41400) /* 11 hours 30 minutes. */ - - -/** @brief BLE address length. */ -#define BLE_GAP_ADDR_LEN (6) - - -/**@defgroup BLE_GAP_PRIVACY_MODES Privacy modes - * @{ */ -#define BLE_GAP_PRIVACY_MODE_OFF 0x00 /**< Device will send and accept its identity address for its own address. */ -#define BLE_GAP_PRIVACY_MODE_DEVICE_PRIVACY 0x01 /**< Device will send and accept only private addresses for its own address. */ -#define BLE_GAP_PRIVACY_MODE_NETWORK_PRIVACY 0x02 /**< Device will send and accept only private addresses for its own address, - and will not accept a peer using identity address as sender address when - the peer IRK is exchanged, non-zero and added to the identity list. */ -/**@} */ - - -/**@defgroup BLE_GAP_AD_TYPE_DEFINITIONS GAP Advertising and Scan Response Data format - * @note Found at https://www.bluetooth.org/Technical/AssignedNumbers/generic_access_profile.htm - * @{ */ -#define BLE_GAP_AD_TYPE_FLAGS 0x01 /**< Flags for discoverability. */ -#define BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_MORE_AVAILABLE 0x02 /**< Partial list of 16 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_COMPLETE 0x03 /**< Complete list of 16 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_MORE_AVAILABLE 0x04 /**< Partial list of 32 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_COMPLETE 0x05 /**< Complete list of 32 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_MORE_AVAILABLE 0x06 /**< Partial list of 128 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_COMPLETE 0x07 /**< Complete list of 128 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_SHORT_LOCAL_NAME 0x08 /**< Short local device name. */ -#define BLE_GAP_AD_TYPE_COMPLETE_LOCAL_NAME 0x09 /**< Complete local device name. */ -#define BLE_GAP_AD_TYPE_TX_POWER_LEVEL 0x0A /**< Transmit power level. */ -#define BLE_GAP_AD_TYPE_CLASS_OF_DEVICE 0x0D /**< Class of device. */ -#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C 0x0E /**< Simple Pairing Hash C. */ -#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R 0x0F /**< Simple Pairing Randomizer R. */ -#define BLE_GAP_AD_TYPE_SECURITY_MANAGER_TK_VALUE 0x10 /**< Security Manager TK Value. */ -#define BLE_GAP_AD_TYPE_SECURITY_MANAGER_OOB_FLAGS 0x11 /**< Security Manager Out Of Band Flags. */ -#define BLE_GAP_AD_TYPE_SLAVE_CONNECTION_INTERVAL_RANGE 0x12 /**< Slave Connection Interval Range. */ -#define BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_16BIT 0x14 /**< List of 16-bit Service Solicitation UUIDs. */ -#define BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_128BIT 0x15 /**< List of 128-bit Service Solicitation UUIDs. */ -#define BLE_GAP_AD_TYPE_SERVICE_DATA 0x16 /**< Service Data - 16-bit UUID. */ -#define BLE_GAP_AD_TYPE_PUBLIC_TARGET_ADDRESS 0x17 /**< Public Target Address. */ -#define BLE_GAP_AD_TYPE_RANDOM_TARGET_ADDRESS 0x18 /**< Random Target Address. */ -#define BLE_GAP_AD_TYPE_APPEARANCE 0x19 /**< Appearance. */ -#define BLE_GAP_AD_TYPE_ADVERTISING_INTERVAL 0x1A /**< Advertising Interval. */ -#define BLE_GAP_AD_TYPE_LE_BLUETOOTH_DEVICE_ADDRESS 0x1B /**< LE Bluetooth Device Address. */ -#define BLE_GAP_AD_TYPE_LE_ROLE 0x1C /**< LE Role. */ -#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C256 0x1D /**< Simple Pairing Hash C-256. */ -#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R256 0x1E /**< Simple Pairing Randomizer R-256. */ -#define BLE_GAP_AD_TYPE_SERVICE_DATA_32BIT_UUID 0x20 /**< Service Data - 32-bit UUID. */ -#define BLE_GAP_AD_TYPE_SERVICE_DATA_128BIT_UUID 0x21 /**< Service Data - 128-bit UUID. */ -#define BLE_GAP_AD_TYPE_LESC_CONFIRMATION_VALUE 0x22 /**< LE Secure Connections Confirmation Value */ -#define BLE_GAP_AD_TYPE_LESC_RANDOM_VALUE 0x23 /**< LE Secure Connections Random Value */ -#define BLE_GAP_AD_TYPE_URI 0x24 /**< URI */ -#define BLE_GAP_AD_TYPE_3D_INFORMATION_DATA 0x3D /**< 3D Information Data. */ -#define BLE_GAP_AD_TYPE_MANUFACTURER_SPECIFIC_DATA 0xFF /**< Manufacturer Specific Data. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADV_FLAGS GAP Advertisement Flags - * @{ */ -#define BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE (0x01) /**< LE Limited Discoverable Mode. */ -#define BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE (0x02) /**< LE General Discoverable Mode. */ -#define BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED (0x04) /**< BR/EDR not supported. */ -#define BLE_GAP_ADV_FLAG_LE_BR_EDR_CONTROLLER (0x08) /**< Simultaneous LE and BR/EDR, Controller. */ -#define BLE_GAP_ADV_FLAG_LE_BR_EDR_HOST (0x10) /**< Simultaneous LE and BR/EDR, Host. */ -#define BLE_GAP_ADV_FLAGS_LE_ONLY_LIMITED_DISC_MODE (BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE | BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED) /**< LE Limited Discoverable Mode, BR/EDR not supported. */ -#define BLE_GAP_ADV_FLAGS_LE_ONLY_GENERAL_DISC_MODE (BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE | BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED) /**< LE General Discoverable Mode, BR/EDR not supported. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADV_INTERVALS GAP Advertising interval max and min - * @{ */ -#define BLE_GAP_ADV_INTERVAL_MIN 0x0020 /**< Minimum Advertising interval in 625 us units, i.e. 20 ms. */ -#define BLE_GAP_ADV_INTERVAL_MAX 0x4000 /**< Maximum Advertising interval in 625 us units, i.e. 10.24 s. */ - /**@} */ - - -/**@defgroup BLE_GAP_SCAN_INTERVALS GAP Scan interval max and min - * @{ */ -#define BLE_GAP_SCAN_INTERVAL_MIN 0x0004 /**< Minimum Scan interval in 625 us units, i.e. 2.5 ms. */ -#define BLE_GAP_SCAN_INTERVAL_MAX 0x4000 /**< Maximum Scan interval in 625 us units, i.e. 10.24 s. */ - /** @} */ - - -/**@defgroup BLE_GAP_SCAN_WINDOW GAP Scan window max and min - * @{ */ -#define BLE_GAP_SCAN_WINDOW_MIN 0x0004 /**< Minimum Scan window in 625 us units, i.e. 2.5 ms. */ -#define BLE_GAP_SCAN_WINDOW_MAX 0x4000 /**< Maximum Scan window in 625 us units, i.e. 10.24 s. */ - /** @} */ - - -/**@defgroup BLE_GAP_SCAN_TIMEOUT GAP Scan timeout max and min - * @{ */ -#define BLE_GAP_SCAN_TIMEOUT_MIN 0x0001 /**< Minimum Scan timeout in seconds. */ -#define BLE_GAP_SCAN_TIMEOUT_MAX 0xFFFF /**< Maximum Scan timeout in seconds. */ - /** @} */ - - -/**@brief Maximum size of advertising data in octets. */ -#define BLE_GAP_ADV_MAX_SIZE (31) - - -/**@defgroup BLE_GAP_ADV_TYPES GAP Advertising types - * @{ */ -#define BLE_GAP_ADV_TYPE_ADV_IND 0x00 /**< Connectable undirected. */ -#define BLE_GAP_ADV_TYPE_ADV_DIRECT_IND 0x01 /**< Connectable directed. */ -#define BLE_GAP_ADV_TYPE_ADV_SCAN_IND 0x02 /**< Scannable undirected. */ -#define BLE_GAP_ADV_TYPE_ADV_NONCONN_IND 0x03 /**< Non connectable undirected. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADV_FILTER_POLICIES GAP Advertising filter policies - * @{ */ -#define BLE_GAP_ADV_FP_ANY 0x00 /**< Allow scan requests and connect requests from any device. */ -#define BLE_GAP_ADV_FP_FILTER_SCANREQ 0x01 /**< Filter scan requests with whitelist. */ -#define BLE_GAP_ADV_FP_FILTER_CONNREQ 0x02 /**< Filter connect requests with whitelist. */ -#define BLE_GAP_ADV_FP_FILTER_BOTH 0x03 /**< Filter both scan and connect requests with whitelist. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADV_TIMEOUT_VALUES GAP Advertising timeout values - * @{ */ -#define BLE_GAP_ADV_TIMEOUT_LIMITED_MAX (180) /**< Maximum advertising time in limited discoverable mode (TGAP(lim_adv_timeout) = 180 s). */ -#define BLE_GAP_ADV_TIMEOUT_GENERAL_UNLIMITED (0) /**< Unlimited advertising in general discoverable mode. */ -/**@} */ - - -/**@defgroup BLE_GAP_DISC_MODES GAP Discovery modes - * @{ */ -#define BLE_GAP_DISC_MODE_NOT_DISCOVERABLE 0x00 /**< Not discoverable discovery Mode. */ -#define BLE_GAP_DISC_MODE_LIMITED 0x01 /**< Limited Discovery Mode. */ -#define BLE_GAP_DISC_MODE_GENERAL 0x02 /**< General Discovery Mode. */ -/**@} */ - - -/**@defgroup BLE_GAP_IO_CAPS GAP IO Capabilities - * @{ */ -#define BLE_GAP_IO_CAPS_DISPLAY_ONLY 0x00 /**< Display Only. */ -#define BLE_GAP_IO_CAPS_DISPLAY_YESNO 0x01 /**< Display and Yes/No entry. */ -#define BLE_GAP_IO_CAPS_KEYBOARD_ONLY 0x02 /**< Keyboard Only. */ -#define BLE_GAP_IO_CAPS_NONE 0x03 /**< No I/O capabilities. */ -#define BLE_GAP_IO_CAPS_KEYBOARD_DISPLAY 0x04 /**< Keyboard and Display. */ -/**@} */ - - -/**@defgroup BLE_GAP_AUTH_KEY_TYPES GAP Authentication Key Types - * @{ */ -#define BLE_GAP_AUTH_KEY_TYPE_NONE 0x00 /**< No key (may be used to reject). */ -#define BLE_GAP_AUTH_KEY_TYPE_PASSKEY 0x01 /**< 6-digit Passkey. */ -#define BLE_GAP_AUTH_KEY_TYPE_OOB 0x02 /**< Out Of Band data. */ -/**@} */ - - -/**@defgroup BLE_GAP_KP_NOT_TYPES GAP Keypress Notification Types - * @{ */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_START 0x00 /**< Passkey entry started. */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_DIGIT_IN 0x01 /**< Passkey digit entered. */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_DIGIT_OUT 0x02 /**< Passkey digit erased. */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_CLEAR 0x03 /**< Passkey cleared. */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_END 0x04 /**< Passkey entry completed. */ -/**@} */ - - -/**@defgroup BLE_GAP_SEC_STATUS GAP Security status - * @{ */ -#define BLE_GAP_SEC_STATUS_SUCCESS 0x00 /**< Procedure completed with success. */ -#define BLE_GAP_SEC_STATUS_TIMEOUT 0x01 /**< Procedure timed out. */ -#define BLE_GAP_SEC_STATUS_PDU_INVALID 0x02 /**< Invalid PDU received. */ -#define BLE_GAP_SEC_STATUS_RFU_RANGE1_BEGIN 0x03 /**< Reserved for Future Use range #1 begin. */ -#define BLE_GAP_SEC_STATUS_RFU_RANGE1_END 0x80 /**< Reserved for Future Use range #1 end. */ -#define BLE_GAP_SEC_STATUS_PASSKEY_ENTRY_FAILED 0x81 /**< Passkey entry failed (user canceled or other). */ -#define BLE_GAP_SEC_STATUS_OOB_NOT_AVAILABLE 0x82 /**< Out of Band Key not available. */ -#define BLE_GAP_SEC_STATUS_AUTH_REQ 0x83 /**< Authentication requirements not met. */ -#define BLE_GAP_SEC_STATUS_CONFIRM_VALUE 0x84 /**< Confirm value failed. */ -#define BLE_GAP_SEC_STATUS_PAIRING_NOT_SUPP 0x85 /**< Pairing not supported. */ -#define BLE_GAP_SEC_STATUS_ENC_KEY_SIZE 0x86 /**< Encryption key size. */ -#define BLE_GAP_SEC_STATUS_SMP_CMD_UNSUPPORTED 0x87 /**< Unsupported SMP command. */ -#define BLE_GAP_SEC_STATUS_UNSPECIFIED 0x88 /**< Unspecified reason. */ -#define BLE_GAP_SEC_STATUS_REPEATED_ATTEMPTS 0x89 /**< Too little time elapsed since last attempt. */ -#define BLE_GAP_SEC_STATUS_INVALID_PARAMS 0x8A /**< Invalid parameters. */ -#define BLE_GAP_SEC_STATUS_DHKEY_FAILURE 0x8B /**< DHKey check failure. */ -#define BLE_GAP_SEC_STATUS_NUM_COMP_FAILURE 0x8C /**< Numeric Comparison failure. */ -#define BLE_GAP_SEC_STATUS_BR_EDR_IN_PROG 0x8D /**< BR/EDR pairing in progress. */ -#define BLE_GAP_SEC_STATUS_X_TRANS_KEY_DISALLOWED 0x8E /**< BR/EDR Link Key cannot be used for LE keys. */ -#define BLE_GAP_SEC_STATUS_RFU_RANGE2_BEGIN 0x8F /**< Reserved for Future Use range #2 begin. */ -#define BLE_GAP_SEC_STATUS_RFU_RANGE2_END 0xFF /**< Reserved for Future Use range #2 end. */ -/**@} */ - - -/**@defgroup BLE_GAP_SEC_STATUS_SOURCES GAP Security status sources - * @{ */ -#define BLE_GAP_SEC_STATUS_SOURCE_LOCAL 0x00 /**< Local failure. */ -#define BLE_GAP_SEC_STATUS_SOURCE_REMOTE 0x01 /**< Remote failure. */ -/**@} */ - - -/**@defgroup BLE_GAP_CP_LIMITS GAP Connection Parameters Limits - * @{ */ -#define BLE_GAP_CP_MIN_CONN_INTVL_NONE 0xFFFF /**< No new minimum connection interval specified in connect parameters. */ -#define BLE_GAP_CP_MIN_CONN_INTVL_MIN 0x0006 /**< Lowest minimum connection interval permitted, in units of 1.25 ms, i.e. 7.5 ms. */ -#define BLE_GAP_CP_MIN_CONN_INTVL_MAX 0x0C80 /**< Highest minimum connection interval permitted, in units of 1.25 ms, i.e. 4 s. */ -#define BLE_GAP_CP_MAX_CONN_INTVL_NONE 0xFFFF /**< No new maximum connection interval specified in connect parameters. */ -#define BLE_GAP_CP_MAX_CONN_INTVL_MIN 0x0006 /**< Lowest maximum connection interval permitted, in units of 1.25 ms, i.e. 7.5 ms. */ -#define BLE_GAP_CP_MAX_CONN_INTVL_MAX 0x0C80 /**< Highest maximum connection interval permitted, in units of 1.25 ms, i.e. 4 s. */ -#define BLE_GAP_CP_SLAVE_LATENCY_MAX 0x01F3 /**< Highest slave latency permitted, in connection events. */ -#define BLE_GAP_CP_CONN_SUP_TIMEOUT_NONE 0xFFFF /**< No new supervision timeout specified in connect parameters. */ -#define BLE_GAP_CP_CONN_SUP_TIMEOUT_MIN 0x000A /**< Lowest supervision timeout permitted, in units of 10 ms, i.e. 100 ms. */ -#define BLE_GAP_CP_CONN_SUP_TIMEOUT_MAX 0x0C80 /**< Highest supervision timeout permitted, in units of 10 ms, i.e. 32 s. */ -/**@} */ - - -/**@defgroup BLE_GAP_DEVNAME GAP device name defines. - * @{ */ -#define BLE_GAP_DEVNAME_DEFAULT "nRF5x" /**< Default device name value. */ -#define BLE_GAP_DEVNAME_DEFAULT_LEN 31 /**< Default number of octets in device name. */ -#define BLE_GAP_DEVNAME_MAX_LEN 248 /**< Maximum number of octets in device name. */ -/**@} */ - - -/**@brief Disable RSSI events for connections */ -#define BLE_GAP_RSSI_THRESHOLD_INVALID 0xFF - -/**@defgroup BLE_GAP_PHYS GAP PHYs - * @{ */ -#define BLE_GAP_PHY_AUTO 0x00 /**< Automatic PHY selection. Refer @ref sd_ble_gap_phy_update for more information.*/ -#define BLE_GAP_PHY_1MBPS 0x01 /**< 1 Mbps PHY. */ -#define BLE_GAP_PHY_2MBPS 0x02 /**< 2 Mbps PHY. */ -#define BLE_GAP_PHY_CODED 0x04 /**< Coded PHY. */ - -/**@} */ - -/**@defgroup BLE_GAP_CONN_SEC_MODE_SET_MACROS GAP attribute security requirement setters - * - * See @ref ble_gap_conn_sec_mode_t. - * @{ */ -/**@brief Set sec_mode pointed to by ptr to have no access rights.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_NO_ACCESS(ptr) do {(ptr)->sm = 0; (ptr)->lv = 0;} while(0) -/**@brief Set sec_mode pointed to by ptr to require no protection, open link.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_OPEN(ptr) do {(ptr)->sm = 1; (ptr)->lv = 1;} while(0) -/**@brief Set sec_mode pointed to by ptr to require encryption, but no MITM protection.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_ENC_NO_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 2;} while(0) -/**@brief Set sec_mode pointed to by ptr to require encryption and MITM protection.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_ENC_WITH_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 3;} while(0) -/**@brief Set sec_mode pointed to by ptr to require LESC encryption and MITM protection.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_LESC_ENC_WITH_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 4;} while(0) -/**@brief Set sec_mode pointed to by ptr to require signing or encryption, no MITM protection needed.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_SIGNED_NO_MITM(ptr) do {(ptr)->sm = 2; (ptr)->lv = 1;} while(0) -/**@brief Set sec_mode pointed to by ptr to require signing or encryption with MITM protection.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_SIGNED_WITH_MITM(ptr) do {(ptr)->sm = 2; (ptr)->lv = 2;} while(0) -/**@} */ - - -/**@brief GAP Security Random Number Length. */ -#define BLE_GAP_SEC_RAND_LEN 8 - - -/**@brief GAP Security Key Length. */ -#define BLE_GAP_SEC_KEY_LEN 16 - - -/**@brief GAP LE Secure Connections Elliptic Curve Diffie-Hellman P-256 Public Key Length. */ -#define BLE_GAP_LESC_P256_PK_LEN 64 - - -/**@brief GAP LE Secure Connections Elliptic Curve Diffie-Hellman DHKey Length. */ -#define BLE_GAP_LESC_DHKEY_LEN 32 - - -/**@brief GAP Passkey Length. */ -#define BLE_GAP_PASSKEY_LEN 6 - - -/**@brief Maximum amount of addresses in the whitelist. */ -#define BLE_GAP_WHITELIST_ADDR_MAX_COUNT (8) - - -/**@brief Maximum amount of identities in the device identities list. */ -#define BLE_GAP_DEVICE_IDENTITIES_MAX_COUNT (8) - - -/**@brief Default connection count for a configuration. */ -#define BLE_GAP_CONN_COUNT_DEFAULT (1) - - -/**@defgroup BLE_GAP_EVENT_LENGTH GAP event length defines. - * @{ */ -#define BLE_GAP_EVENT_LENGTH_MIN (2) /**< Minimum event length, in 1.25 ms units. */ -#define BLE_GAP_EVENT_LENGTH_DEFAULT (3) /**< Default event length, in 1.25 ms units. */ -/**@} */ - - -/**@defgroup BLE_GAP_ROLE_COUNT GAP concurrent connection count defines. - * @{ */ -#define BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT (1) /**< Default maximum number of connections concurrently acting as peripherals. */ -#define BLE_GAP_ROLE_COUNT_CENTRAL_DEFAULT (3) /**< Default maximum number of connections concurrently acting as centrals. */ -#define BLE_GAP_ROLE_COUNT_CENTRAL_SEC_DEFAULT (1) /**< Default number of SMP instances shared between all connections acting as centrals. */ -#define BLE_GAP_ROLE_COUNT_COMBINED_MAX (20) /**< Maximum supported number of concurrent connections in the peripheral and central roles combined. */ -/**@} */ - - -/**@brief Automatic data length parameter. */ -#define BLE_GAP_DATA_LENGTH_AUTO 0 - -/**@defgroup BLE_GAP_AUTH_PAYLOAD_TIMEOUT Authenticated payload timeout defines. - * @{ */ -#define BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MAX (48000) /**< Maximum authenticated payload timeout in 10 ms units, i.e. 8 minutes. */ -#define BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MIN (1) /**< Minimum authenticated payload timeout in 10 ms units, i.e. 10 ms. */ -/**@} */ - -/**@defgroup GAP_SEC_MODES GAP Security Modes - * @{ */ -#define BLE_GAP_SEC_MODE 0x00 /**< No key (may be used to reject). */ -/**@} */ -/** @} */ - - -/**@addtogroup BLE_GAP_STRUCTURES Structures - * @{ */ - -/**@brief Bluetooth Low Energy address. */ -typedef struct -{ - uint8_t addr_id_peer : 1; /**< Only valid for peer addresses. - Reference to peer in device identities list (as set with @ref sd_ble_gap_device_identities_set) when peer is using privacy. */ - uint8_t addr_type : 7; /**< See @ref BLE_GAP_ADDR_TYPES. */ - uint8_t addr[BLE_GAP_ADDR_LEN]; /**< 48-bit address, LSB format. */ -} ble_gap_addr_t; - - -/**@brief GAP connection parameters. - * - * @note When ble_conn_params_t is received in an event, both min_conn_interval and - * max_conn_interval will be equal to the connection interval set by the central. - * - * @note If both conn_sup_timeout and max_conn_interval are specified, then the following constraint applies: - * conn_sup_timeout * 4 > (1 + slave_latency) * max_conn_interval - * that corresponds to the following Bluetooth Spec requirement: - * The Supervision_Timeout in milliseconds shall be larger than - * (1 + Conn_Latency) * Conn_Interval_Max * 2, where Conn_Interval_Max is given in milliseconds. - */ -typedef struct -{ - uint16_t min_conn_interval; /**< Minimum Connection Interval in 1.25 ms units, see @ref BLE_GAP_CP_LIMITS.*/ - uint16_t max_conn_interval; /**< Maximum Connection Interval in 1.25 ms units, see @ref BLE_GAP_CP_LIMITS.*/ - uint16_t slave_latency; /**< Slave Latency in number of connection events, see @ref BLE_GAP_CP_LIMITS.*/ - uint16_t conn_sup_timeout; /**< Connection Supervision Timeout in 10 ms units, see @ref BLE_GAP_CP_LIMITS.*/ -} ble_gap_conn_params_t; - - -/**@brief GAP connection security modes. - * - * Security Mode 0 Level 0: No access permissions at all (this level is not defined by the Bluetooth Core specification).\n - * Security Mode 1 Level 1: No security is needed (aka open link).\n - * Security Mode 1 Level 2: Encrypted link required, MITM protection not necessary.\n - * Security Mode 1 Level 3: MITM protected encrypted link required.\n - * Security Mode 1 Level 4: LESC MITM protected encrypted link using a 128-bit strength encryption key required.\n - * Security Mode 2 Level 1: Signing or encryption required, MITM protection not necessary.\n - * Security Mode 2 Level 2: MITM protected signing required, unless link is MITM protected encrypted.\n - */ -typedef struct -{ - uint8_t sm : 4; /**< Security Mode (1 or 2), 0 for no permissions at all. */ - uint8_t lv : 4; /**< Level (1, 2, 3 or 4), 0 for no permissions at all. */ - -} ble_gap_conn_sec_mode_t; - - -/**@brief GAP connection security status.*/ -typedef struct -{ - ble_gap_conn_sec_mode_t sec_mode; /**< Currently active security mode for this connection.*/ - uint8_t encr_key_size; /**< Length of currently active encryption key, 7 to 16 octets (only applicable for bonding procedures). */ -} ble_gap_conn_sec_t; - -/**@brief Identity Resolving Key. */ -typedef struct -{ - uint8_t irk[BLE_GAP_SEC_KEY_LEN]; /**< Array containing IRK. */ -} ble_gap_irk_t; - - -/**@brief Channel mask for RF channels used in advertising. */ -typedef struct -{ - uint8_t ch_37_off : 1; /**< Setting this bit to 1 will turn off advertising on channel 37 */ - uint8_t ch_38_off : 1; /**< Setting this bit to 1 will turn off advertising on channel 38 */ - uint8_t ch_39_off : 1; /**< Setting this bit to 1 will turn off advertising on channel 39 */ -} ble_gap_adv_ch_mask_t; - - -/**@brief GAP advertising parameters. */ -typedef struct -{ - uint8_t type; /**< See @ref BLE_GAP_ADV_TYPES. */ - ble_gap_addr_t const *p_peer_addr; /**< Address of a known peer. - - When privacy is enabled and the local device use @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE addresses, the device identity list is searched for a matching - entry. If the local IRK for that device identity is set, the local IRK for that device will be used to generate the advertiser address field in the advertise packet. - - If type is @ref BLE_GAP_ADV_TYPE_ADV_DIRECT_IND, this must be set to the targeted initiator. If the initiator is in the device identity list, - the peer IRK for that device will be used to generate the initiator address field in the ADV_DIRECT_IND packet. */ - uint8_t fp; /**< Filter Policy, see @ref BLE_GAP_ADV_FILTER_POLICIES. */ - uint16_t interval; /**< Advertising interval between 0x0020 and 0x4000 in 0.625 ms units (20 ms to 10.24 s), see @ref BLE_GAP_ADV_INTERVALS. - - If type equals @ref BLE_GAP_ADV_TYPE_ADV_DIRECT_IND, this parameter must be set to 0 for high duty cycle directed advertising. - - If type equals @ref BLE_GAP_ADV_TYPE_ADV_DIRECT_IND, set @ref BLE_GAP_ADV_INTERVAL_MIN <= interval <= @ref BLE_GAP_ADV_INTERVAL_MAX for low duty cycle advertising.*/ - uint16_t timeout; /**< Advertising timeout between 0x0001 and 0x3FFF in seconds, 0x0000 disables timeout. See also @ref BLE_GAP_ADV_TIMEOUT_VALUES. If type equals @ref BLE_GAP_ADV_TYPE_ADV_DIRECT_IND, this parameter must be set to 0 for High duty cycle directed advertising. */ - ble_gap_adv_ch_mask_t channel_mask; /**< Advertising channel mask. See @ref ble_gap_adv_ch_mask_t. */ -} ble_gap_adv_params_t; - - -/**@brief GAP scanning parameters. */ -typedef struct -{ - uint8_t active : 1; /**< If 1, perform active scanning (scan requests). */ - uint8_t use_whitelist : 1; /**< If 1, filter advertisers using current active whitelist. */ - uint8_t adv_dir_report : 1; /**< If 1, also report directed advertisements where the initiator field is set to a private resolvable address, - even if the address did not resolve to an entry in the device identity list. A report will be generated - even if the peer is not in the whitelist. */ - uint16_t interval; /**< Scan interval between 0x0004 and 0x4000 in 0.625 ms units (2.5 ms to 10.24 s). */ - uint16_t window; /**< Scan window between 0x0004 and 0x4000 in 0.625 ms units (2.5 ms to 10.24 s). */ - uint16_t timeout; /**< Scan timeout between 0x0001 and 0xFFFF in seconds, 0x0000 disables timeout. */ -} ble_gap_scan_params_t; - - -/**@brief Privacy. - * - * The privacy feature provides a way for the device to avoid being tracked over a period of time. - * The privacy feature, when enabled, hides the local device identity and replaces it with a private address - * that is automatically refreshed at a specified interval. - * - * If a device still wants to be recognized by other peers, it needs to share it's Identity Resolving Key (IRK). - * With this key, a device can generate a random private address that can only be recognized by peers in possession of that key, - * and devices can establish connections without revealing their real identities. - * - * Both network privacy (@ref BLE_GAP_PRIVACY_MODE_NETWORK_PRIVACY) and device privacy (@ref BLE_GAP_PRIVACY_MODE_DEVICE_PRIVACY) - * are supported. - * - * @note If the device IRK is updated, the new IRK becomes the one to be distributed in all - * bonding procedures performed after @ref sd_ble_gap_privacy_set returns. - * The IRK distributed during bonding procedure is the device IRK that is active when @ref sd_ble_gap_sec_params_reply is called. - */ -typedef struct -{ - uint8_t privacy_mode; /**< Privacy mode, see @ref BLE_GAP_PRIVACY_MODES. Default is @ref BLE_GAP_PRIVACY_MODE_OFF. */ - uint8_t private_addr_type; /**< The private address type must be either @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE or @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE. */ - uint16_t private_addr_cycle_s; /**< Private address cycle interval in seconds. Providing an address cycle value of 0 will use the default value defined by @ref BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S. */ - ble_gap_irk_t *p_device_irk; /**< When used as input, pointer to IRK structure that will be used as the default IRK. If NULL, the device default IRK will be used. - When used as output, pointer to IRK structure where the current default IRK will be written to. If NULL, this argument is ignored. - By default, the default IRK is used to generate random private resolvable addresses for the local device unless instructed otherwise. */ -} ble_gap_privacy_params_t; - - -/**@brief PHY preferences for TX and RX - * @note tx_phys and rx_phys are bit fields. Multiple bits can be set in them to indicate multiple preferred PHYs for each direction. - * @code - * p_gap_phys->tx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; - * p_gap_phys->rx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; - * @endcode - * - */ -typedef struct -{ - uint8_t tx_phys; /**< Preferred transmit PHYs, see @ref BLE_GAP_PHYS. */ - uint8_t rx_phys; /**< Preferred receive PHYs, see @ref BLE_GAP_PHYS. */ -} ble_gap_phys_t; - -/** @brief Keys that can be exchanged during a bonding procedure. */ -typedef struct -{ - uint8_t enc : 1; /**< Long Term Key and Master Identification. */ - uint8_t id : 1; /**< Identity Resolving Key and Identity Address Information. */ - uint8_t sign : 1; /**< Connection Signature Resolving Key. */ - uint8_t link : 1; /**< Derive the Link Key from the LTK. */ -} ble_gap_sec_kdist_t; - - -/**@brief GAP security parameters. */ -typedef struct -{ - uint8_t bond : 1; /**< Perform bonding. */ - uint8_t mitm : 1; /**< Enable Man In The Middle protection. */ - uint8_t lesc : 1; /**< Enable LE Secure Connection pairing. */ - uint8_t keypress : 1; /**< Enable generation of keypress notifications. */ - uint8_t io_caps : 3; /**< IO capabilities, see @ref BLE_GAP_IO_CAPS. */ - uint8_t oob : 1; /**< The OOB data flag. - - In LE legacy pairing, this flag is set if a device has out of band authentication data. - The OOB method is used if both of the devices have out of band authentication data. - - In LE Secure Connections pairing, this flag is set if a device has the peer device's out of band authentication data. - The OOB method is used if at least one device has the peer device's OOB data available. */ - uint8_t min_key_size; /**< Minimum encryption key size in octets between 7 and 16. If 0 then not applicable in this instance. */ - uint8_t max_key_size; /**< Maximum encryption key size in octets between min_key_size and 16. */ - ble_gap_sec_kdist_t kdist_own; /**< Key distribution bitmap: keys that the local device will distribute. */ - ble_gap_sec_kdist_t kdist_peer; /**< Key distribution bitmap: keys that the remote device will distribute. */ -} ble_gap_sec_params_t; - - -/**@brief GAP Encryption Information. */ -typedef struct -{ - uint8_t ltk[BLE_GAP_SEC_KEY_LEN]; /**< Long Term Key. */ - uint8_t lesc : 1; /**< Key generated using LE Secure Connections. */ - uint8_t auth : 1; /**< Authenticated Key. */ - uint8_t ltk_len : 6; /**< LTK length in octets. */ -} ble_gap_enc_info_t; - - -/**@brief GAP Master Identification. */ -typedef struct -{ - uint16_t ediv; /**< Encrypted Diversifier. */ - uint8_t rand[BLE_GAP_SEC_RAND_LEN]; /**< Random Number. */ -} ble_gap_master_id_t; - - -/**@brief GAP Signing Information. */ -typedef struct -{ - uint8_t csrk[BLE_GAP_SEC_KEY_LEN]; /**< Connection Signature Resolving Key. */ -} ble_gap_sign_info_t; - - -/**@brief GAP LE Secure Connections P-256 Public Key. */ -typedef struct -{ - uint8_t pk[BLE_GAP_LESC_P256_PK_LEN]; /**< LE Secure Connections Elliptic Curve Diffie-Hellman P-256 Public Key. Stored in the standard SMP protocol format: {X,Y} both in little-endian. */ -} ble_gap_lesc_p256_pk_t; - - -/**@brief GAP LE Secure Connections DHKey. */ -typedef struct -{ - uint8_t key[BLE_GAP_LESC_DHKEY_LEN]; /**< LE Secure Connections Elliptic Curve Diffie-Hellman Key. Stored in little-endian. */ -} ble_gap_lesc_dhkey_t; - - -/**@brief GAP LE Secure Connections OOB data. */ -typedef struct -{ - ble_gap_addr_t addr; /**< Bluetooth address of the device. */ - uint8_t r[BLE_GAP_SEC_KEY_LEN]; /**< Random Number. */ - uint8_t c[BLE_GAP_SEC_KEY_LEN]; /**< Confirm Value. */ -} ble_gap_lesc_oob_data_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_CONNECTED. */ -typedef struct -{ - ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 - and the address is the device's identity address. */ - uint8_t role; /**< BLE role for this connection, see @ref BLE_GAP_ROLES */ - ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ -} ble_gap_evt_connected_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_DISCONNECTED. */ -typedef struct -{ - uint8_t reason; /**< HCI error code, see @ref BLE_HCI_STATUS_CODES. */ -} ble_gap_evt_disconnected_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_CONN_PARAM_UPDATE. */ -typedef struct -{ - ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ -} ble_gap_evt_conn_param_update_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_PHY_UPDATE_REQUEST. */ -typedef struct -{ - ble_gap_phys_t peer_preferred_phys; /**< The PHYs the peer prefers to use. */ -} ble_gap_evt_phy_update_request_t; - -/**@brief Event Structure for @ref BLE_GAP_EVT_PHY_UPDATE. */ -typedef struct -{ - uint8_t status; /**< Status of the procedure, see @ref BLE_HCI_STATUS_CODES.*/ - uint8_t tx_phy; /**< TX PHY for this connection, see @ref BLE_GAP_PHYS. */ - uint8_t rx_phy; /**< RX PHY for this connection, see @ref BLE_GAP_PHYS. */ -} ble_gap_evt_phy_update_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST. */ -typedef struct -{ - ble_gap_sec_params_t peer_params; /**< Initiator Security Parameters. */ -} ble_gap_evt_sec_params_request_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_SEC_INFO_REQUEST. */ -typedef struct -{ - ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. */ - ble_gap_master_id_t master_id; /**< Master Identification for LTK lookup. */ - uint8_t enc_info : 1; /**< If 1, Encryption Information required. */ - uint8_t id_info : 1; /**< If 1, Identity Information required. */ - uint8_t sign_info : 1; /**< If 1, Signing Information required. */ -} ble_gap_evt_sec_info_request_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_PASSKEY_DISPLAY. */ -typedef struct -{ - uint8_t passkey[BLE_GAP_PASSKEY_LEN]; /**< 6-digit passkey in ASCII ('0'-'9' digits only). */ - uint8_t match_request : 1; /**< If 1 requires the application to report the match using @ref sd_ble_gap_auth_key_reply - with either @ref BLE_GAP_AUTH_KEY_TYPE_NONE if there is no match or - @ref BLE_GAP_AUTH_KEY_TYPE_PASSKEY if there is a match. */ -} ble_gap_evt_passkey_display_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_KEY_PRESSED. */ -typedef struct -{ - uint8_t kp_not; /**< Keypress notification type, see @ref BLE_GAP_KP_NOT_TYPES. */ -} ble_gap_evt_key_pressed_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_AUTH_KEY_REQUEST. */ -typedef struct -{ - uint8_t key_type; /**< See @ref BLE_GAP_AUTH_KEY_TYPES. */ -} ble_gap_evt_auth_key_request_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST. */ -typedef struct -{ - ble_gap_lesc_p256_pk_t *p_pk_peer; /**< LE Secure Connections remote P-256 Public Key. This will point to the application-supplied memory - inside the keyset during the call to @ref sd_ble_gap_sec_params_reply. */ - uint8_t oobd_req :1; /**< LESC OOB data required. A call to @ref sd_ble_gap_lesc_oob_data_set is required to complete the procedure. */ -} ble_gap_evt_lesc_dhkey_request_t; - - -/**@brief Security levels supported. - * @note See Bluetooth Specification Version 4.2 Volume 3, Part C, Chapter 10, Section 10.2.1. -*/ -typedef struct -{ - uint8_t lv1 : 1; /**< If 1: Level 1 is supported. */ - uint8_t lv2 : 1; /**< If 1: Level 2 is supported. */ - uint8_t lv3 : 1; /**< If 1: Level 3 is supported. */ - uint8_t lv4 : 1; /**< If 1: Level 4 is supported. */ -} ble_gap_sec_levels_t; - - -/**@brief Encryption Key. */ -typedef struct -{ - ble_gap_enc_info_t enc_info; /**< Encryption Information. */ - ble_gap_master_id_t master_id; /**< Master Identification. */ -} ble_gap_enc_key_t; - - -/**@brief Identity Key. */ -typedef struct -{ - ble_gap_irk_t id_info; /**< Identity Resolving Key. */ - ble_gap_addr_t id_addr_info; /**< Identity Address. */ -} ble_gap_id_key_t; - - -/**@brief Security Keys. */ -typedef struct -{ - ble_gap_enc_key_t *p_enc_key; /**< Encryption Key, or NULL. */ - ble_gap_id_key_t *p_id_key; /**< Identity Key, or NULL. */ - ble_gap_sign_info_t *p_sign_key; /**< Signing Key, or NULL. */ - ble_gap_lesc_p256_pk_t *p_pk; /**< LE Secure Connections P-256 Public Key. When in debug mode the application must use the value defined - in the Core Bluetooth Specification v4.2 Vol.3, Part H, Section 2.3.5.6.1 */ -} ble_gap_sec_keys_t; - - -/**@brief Security key set for both local and peer keys. */ -typedef struct -{ - ble_gap_sec_keys_t keys_own; /**< Keys distributed by the local device. For LE Secure Connections the encryption key will be generated locally and will always be stored if bonding. */ - ble_gap_sec_keys_t keys_peer; /**< Keys distributed by the remote device. For LE Secure Connections, p_enc_key must always be NULL. */ -} ble_gap_sec_keyset_t; - - -/**@brief Data Length Update Procedure parameters. */ -typedef struct -{ - uint16_t max_tx_octets; /**< Maximum number of payload octets that a Controller supports for transmission of a single Link Layer Data Channel PDU. */ - uint16_t max_rx_octets; /**< Maximum number of payload octets that a Controller supports for reception of a single Link Layer Data Channel PDU. */ - uint16_t max_tx_time_us; /**< Maximum time, in microseconds, that a Controller supports for transmission of a single Link Layer Data Channel PDU. */ - uint16_t max_rx_time_us; /**< Maximum time, in microseconds, that a Controller supports for reception of a single Link Layer Data Channel PDU. */ -} ble_gap_data_length_params_t; - - -/**@brief Data Length Update Procedure local limitation. */ -typedef struct -{ - uint16_t tx_payload_limited_octets; /**< If > 0, the requested TX packet length is too long by this many octets. */ - uint16_t rx_payload_limited_octets; /**< If > 0, the requested RX packet length is too long by this many octets. */ - uint16_t tx_rx_time_limited_us; /**< If > 0, the requested combination of TX and RX packet lengths is too long by this many microseconds. */ -} ble_gap_data_length_limitation_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_AUTH_STATUS. */ -typedef struct -{ - uint8_t auth_status; /**< Authentication status, see @ref BLE_GAP_SEC_STATUS. */ - uint8_t error_src : 2; /**< On error, source that caused the failure, see @ref BLE_GAP_SEC_STATUS_SOURCES. */ - uint8_t bonded : 1; /**< Procedure resulted in a bond. */ - uint8_t lesc : 1; /**< Procedure resulted in a LE Secure Connection. */ - ble_gap_sec_levels_t sm1_levels; /**< Levels supported in Security Mode 1. */ - ble_gap_sec_levels_t sm2_levels; /**< Levels supported in Security Mode 2. */ - ble_gap_sec_kdist_t kdist_own; /**< Bitmap stating which keys were exchanged (distributed) by the local device. If bonding with LE Secure Connections, the enc bit will be always set. */ - ble_gap_sec_kdist_t kdist_peer; /**< Bitmap stating which keys were exchanged (distributed) by the remote device. If bonding with LE Secure Connections, the enc bit will never be set. */ -} ble_gap_evt_auth_status_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_CONN_SEC_UPDATE. */ -typedef struct -{ - ble_gap_conn_sec_t conn_sec; /**< Connection security level. */ -} ble_gap_evt_conn_sec_update_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_TIMEOUT. */ -typedef struct -{ - uint8_t src; /**< Source of timeout event, see @ref BLE_GAP_TIMEOUT_SOURCES. */ -} ble_gap_evt_timeout_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_RSSI_CHANGED. */ -typedef struct -{ - int8_t rssi; /**< Received Signal Strength Indication in dBm. */ -} ble_gap_evt_rssi_changed_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_ADV_REPORT. */ -typedef struct -{ - ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 - and the address is the device's identity address. */ - ble_gap_addr_t direct_addr; /**< Set when the scanner is unable to resolve the private resolvable address of the initiator - field of a directed advertisement packet and the scanner has been enabled to report this in @ref ble_gap_scan_params_t::adv_dir_report. */ - int8_t rssi; /**< Received Signal Strength Indication in dBm. */ - uint8_t scan_rsp : 1; /**< If 1, the report corresponds to a scan response and the type field may be ignored. */ - uint8_t type : 2; /**< See @ref BLE_GAP_ADV_TYPES. Only valid if the scan_rsp field is 0. */ - uint8_t dlen : 5; /**< Advertising or scan response data length. */ - uint8_t data[BLE_GAP_ADV_MAX_SIZE]; /**< Advertising or scan response data. */ -} ble_gap_evt_adv_report_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_SEC_REQUEST. */ -typedef struct -{ - uint8_t bond : 1; /**< Perform bonding. */ - uint8_t mitm : 1; /**< Man In The Middle protection requested. */ - uint8_t lesc : 1; /**< LE Secure Connections requested. */ - uint8_t keypress : 1; /**< Generation of keypress notifications requested. */ -} ble_gap_evt_sec_request_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST. */ -typedef struct -{ - ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ -} ble_gap_evt_conn_param_update_request_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_SCAN_REQ_REPORT. */ -typedef struct -{ - int8_t rssi; /**< Received Signal Strength Indication in dBm. */ - ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 - and the address is the device's identity address. */ -} ble_gap_evt_scan_req_report_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST. */ -typedef struct -{ - ble_gap_data_length_params_t peer_params; /**< Peer data length parameters. */ -} ble_gap_evt_data_length_update_request_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE. */ -typedef struct -{ - ble_gap_data_length_params_t effective_params; /**< The effective data length parameters. */ -} ble_gap_evt_data_length_update_t; - - -/**@brief GAP event structure. */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle on which event occurred. */ - union /**< union alternative identified by evt_id in enclosing struct. */ - { - ble_gap_evt_connected_t connected; /**< Connected Event Parameters. */ - ble_gap_evt_disconnected_t disconnected; /**< Disconnected Event Parameters. */ - ble_gap_evt_conn_param_update_t conn_param_update; /**< Connection Parameter Update Parameters. */ - ble_gap_evt_sec_params_request_t sec_params_request; /**< Security Parameters Request Event Parameters. */ - ble_gap_evt_sec_info_request_t sec_info_request; /**< Security Information Request Event Parameters. */ - ble_gap_evt_passkey_display_t passkey_display; /**< Passkey Display Event Parameters. */ - ble_gap_evt_key_pressed_t key_pressed; /**< Key Pressed Event Parameters. */ - ble_gap_evt_auth_key_request_t auth_key_request; /**< Authentication Key Request Event Parameters. */ - ble_gap_evt_lesc_dhkey_request_t lesc_dhkey_request; /**< LE Secure Connections DHKey calculation request. */ - ble_gap_evt_auth_status_t auth_status; /**< Authentication Status Event Parameters. */ - ble_gap_evt_conn_sec_update_t conn_sec_update; /**< Connection Security Update Event Parameters. */ - ble_gap_evt_timeout_t timeout; /**< Timeout Event Parameters. */ - ble_gap_evt_rssi_changed_t rssi_changed; /**< RSSI Event Parameters. */ - ble_gap_evt_adv_report_t adv_report; /**< Advertising Report Event Parameters. */ - ble_gap_evt_sec_request_t sec_request; /**< Security Request Event Parameters. */ - ble_gap_evt_conn_param_update_request_t conn_param_update_request; /**< Connection Parameter Update Parameters. */ - ble_gap_evt_scan_req_report_t scan_req_report; /**< Scan Request Report Parameters. */ - ble_gap_evt_phy_update_request_t phy_update_request; /**< PHY Update Request Event Parameters. */ - ble_gap_evt_phy_update_t phy_update; /**< PHY Update Parameters. */ - ble_gap_evt_data_length_update_request_t data_length_update_request; /**< Data Length Update Request Event Parameters. */ - ble_gap_evt_data_length_update_t data_length_update; /**< Data Length Update Event Parameters. */ - } params; /**< Event Parameters. */ -} ble_gap_evt_t; - - -/** - * @brief BLE GAP connection configuration parameters, set with @ref sd_ble_cfg_set. - * - * @retval ::NRF_ERROR_CONN_COUNT The connection count for the connection configurations is zero. - * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: - * - The sum of conn_count for all connection configurations combined exceeds UINT8_MAX. - * - The event length is smaller than @ref BLE_GAP_EVENT_LENGTH_MIN. - */ -typedef struct -{ - uint8_t conn_count; /**< The number of concurrent connections the application can create with this configuration. - The default and minimum value is @ref BLE_GAP_CONN_COUNT_DEFAULT. */ - uint16_t event_length; /**< The time set aside for this connection on every connection interval in 1.25 ms units. - The default value is @ref BLE_GAP_EVENT_LENGTH_DEFAULT, the minimum value is @ref BLE_GAP_EVENT_LENGTH_MIN. - The event length and the connection interval are the primary parameters - for setting the throughput of a connection. - See the SoftDevice Specification for details on throughput. */ -} ble_gap_conn_cfg_t; - - -/** - * @brief Configuration of maximum concurrent connections in the different connected roles, set with - * @ref sd_ble_cfg_set. - * - * @retval ::NRF_ERROR_CONN_COUNT The sum of periph_role_count and central_role_count is too - * large. The maximum supported sum of concurrent connections is - * @ref BLE_GAP_ROLE_COUNT_COMBINED_MAX. - * @retval ::NRF_ERROR_INVALID_PARAM central_sec_count is larger than central_role_count. - */ -typedef struct -{ - uint8_t periph_role_count; /**< Maximum number of connections concurrently acting as a peripheral. Default value is @ref BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT. */ - uint8_t central_role_count; /**< Maximum number of connections concurrently acting as a central. Default value is @ref BLE_GAP_ROLE_COUNT_CENTRAL_DEFAULT. */ - uint8_t central_sec_count; /**< Number of SMP instances shared between all connections acting as a central. Default value is @ref BLE_GAP_ROLE_COUNT_CENTRAL_SEC_DEFAULT. */ -} ble_gap_cfg_role_count_t; - - -/** - * @brief Device name and its properties, set with @ref sd_ble_cfg_set. - * - * @note If the device name is not configured, the default device name will be @ref - * BLE_GAP_DEVNAME_DEFAULT, the maximum device name length will be @ref - * BLE_GAP_DEVNAME_DEFAULT_LEN, vloc will be set to @ref BLE_GATTS_VLOC_STACK and the device name - * will have no write access. - * - * @note If @ref max_len is more than @ref BLE_GAP_DEVNAME_DEFAULT_LEN and vloc is set to @ref BLE_GATTS_VLOC_STACK, - * the attribute table size must be increased to have room for the longer device name (see - * @ref sd_ble_cfg_set and @ref ble_gatts_cfg_attr_tab_size_t). - * - * @note If vloc is @ref BLE_GATTS_VLOC_STACK : - * - p_value must point to non-volatile memory (flash) or be NULL. - * - If p_value is NULL, the device name will initially be empty. - * - * @note If vloc is @ref BLE_GATTS_VLOC_USER : - * - p_value cannot be NULL. - * - If the device name is writable, p_value must point to volatile memory (RAM). - * - * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: - * - Invalid device name location (vloc). - * - Invalid device name security mode. - * @retval ::NRF_ERROR_INVALID_LENGTH One or more of the following is true: - * - The device name length is invalid (must be between 0 and @ref BLE_GAP_DEVNAME_MAX_LEN). - * - The device name length is too long for the given Attribute Table. - * @retval ::NRF_ERROR_NOT_SUPPORTED Device name security mode is not supported. - */ -typedef struct -{ - ble_gap_conn_sec_mode_t write_perm; /**< Write permissions. */ - uint8_t vloc:2; /**< Value location, see @ref BLE_GATTS_VLOCS.*/ - uint8_t *p_value; /**< Pointer to where the value (device name) is stored or will be stored. */ - uint16_t current_len; /**< Current length in bytes of the memory pointed to by p_value.*/ - uint16_t max_len; /**< Maximum length in bytes of the memory pointed to by p_value.*/ -} ble_gap_cfg_device_name_t; - - -/**@brief Configuration structure for GAP configurations. */ -typedef union -{ - ble_gap_cfg_role_count_t role_count_cfg; /**< Role count configuration, cfg_id is @ref BLE_GAP_CFG_ROLE_COUNT. */ - ble_gap_cfg_device_name_t device_name_cfg; /**< Device name configuration, cfg_id is @ref BLE_GAP_CFG_DEVICE_NAME. */ -} ble_gap_cfg_t; - - -/**@brief Channel Map option. - * Used with @ref sd_ble_opt_get to get the current channel map - * or @ref sd_ble_opt_set to set a new channel map. When setting the - * channel map, it applies to all current and future connections. When getting the - * current channel map, it applies to a single connection and the connection handle - * must be supplied. - * - * @note Setting the channel map may take some time, depending on connection parameters. - * The time taken may be different for each connection and the get operation will - * return the previous channel map until the new one has taken effect. - * - * @note After setting the channel map, by spec it can not be set again until at least 1 s has passed. - * See Bluetooth Specification Version 4.1 Volume 2, Part E, Section 7.3.46. - * - * @retval ::NRF_SUCCESS Get or set successful. - * @retval ::NRF_ERROR_BUSY Channel map was set again before enough time had passed. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied for get. - * @retval ::NRF_ERROR_NOT_SUPPORTED Returned by sd_ble_opt_set in peripheral-only SoftDevices. - * - */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle (only applicable for get) */ - uint8_t ch_map[5]; /**< Channel Map (37-bit). */ -} ble_gap_opt_ch_map_t; - - -/**@brief Local connection latency option. - * - * Local connection latency is a feature which enables the slave to improve - * current consumption by ignoring the slave latency set by the peer. The - * local connection latency can only be set to a multiple of the slave latency, - * and cannot be longer than half of the supervision timeout. - * - * Used with @ref sd_ble_opt_set to set the local connection latency. The - * @ref sd_ble_opt_get is not supported for this option, but the actual - * local connection latency (unless set to NULL) is set as a return parameter - * when setting the option. - * - * @note The latency set will be truncated down to the closest slave latency event - * multiple, or the nearest multiple before half of the supervision timeout. - * - * @note The local connection latency is disabled by default, and needs to be enabled for new - * connections and whenever the connection is updated. - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_NOT_SUPPORTED Get is not supported. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. - */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle */ - uint16_t requested_latency; /**< Requested local connection latency. */ - uint16_t * p_actual_latency; /**< Pointer to storage for the actual local connection latency (can be set to NULL to skip return value). */ -} ble_gap_opt_local_conn_latency_t; - -/**@brief Disable slave latency - * - * Used with @ref sd_ble_opt_set to temporarily disable slave latency of a peripheral connection (see @ref ble_gap_conn_params_t::slave_latency). And to re-enable it again. - * When disabled, the peripheral will ignore the slave_latency set by the central. - * - * @note Shall only be called on peripheral links. - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_NOT_SUPPORTED Get is not supported. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. - */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle */ - uint8_t disable : 1; /**< Set to 1 to disable slave latency. Set to 0 enable it again.*/ -} ble_gap_opt_slave_latency_disable_t; - -/**@brief Passkey Option. - * - * Structure containing the passkey to be used during pairing. This can be used with @ref - * sd_ble_opt_set to make the SoftDevice use a preprogrammed passkey for authentication - * instead of generating a random one. - * - * @note Repeated pairing attempts using the same preprogrammed passkey makes pairing vulnerable to MITM attacks. - * - * @note @ref sd_ble_opt_get is not supported for this option. - * - */ -typedef struct -{ - uint8_t const * p_passkey; /**< Pointer to 6-digit ASCII string (digit 0..9 only, no NULL termination) passkey to be used during pairing. If this is NULL, the SoftDevice will generate a random passkey if required.*/ -} ble_gap_opt_passkey_t; - - -/**@brief Scan request report option. - * - * This can be used with @ref sd_ble_opt_set to make the SoftDevice send - * @ref BLE_GAP_EVT_SCAN_REQ_REPORT events. - * - * @note Due to the limited space reserved for scan request report events, - * not all received scan requests will be reported. - * - * @note If whitelisting is used, only whitelisted requests are reported. - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_INVALID_STATE When advertising is ongoing while the option is set. - */ -typedef struct -{ - uint8_t enable : 1; /**< Enable scan request reports. */ -} ble_gap_opt_scan_req_report_t; - -/**@brief Compatibility mode 1 option. - * - * This can be used with @ref sd_ble_opt_set to enable and disable - * compatibility mode 1. Compatibility mode 1 is disabled by default. - * - * @note Compatibility mode 1 enables interoperability with devices that do not support a value of - * 0 for the WinOffset parameter in the Link Layer CONNECT_IND packet. This applies to a - * limited set of legacy peripheral devices from another vendor. Enabling this compatibility - * mode will only have an effect if the local device will act as a central device and - * initiate a connection to a peripheral device. In that case it may lead to the connection - * creation taking up to one connection interval longer to complete for all connections. - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_INVALID_STATE When connection creation is ongoing while mode 1 is set. - */ -typedef struct -{ - uint8_t enable : 1; /**< Enable compatibility mode 1.*/ -} ble_gap_opt_compat_mode_1_t; - -/**@brief Authenticated payload timeout option. - * - * This can be used with @ref sd_ble_opt_set to change the Authenticated payload timeout to a value other - * than the default of @ref BLE_GAP_AUTH_PAYLOAD_TIMEOUT_MAX. - * - * @note The authenticated payload timeout event ::BLE_GAP_TIMEOUT_SRC_AUTH_PAYLOAD will be generated - * if auth_payload_timeout time has elapsed without receiving a packet with a valid MIC on an encrypted - * link. - * - * @note The LE ping procedure will be initiated before the timer expires to give the peer a chance - * to reset the timer. In addition the stack will try to prioritize running of LE ping over other - * activities to increase chances of finishing LE ping before timer expires. To avoid side-effects - * on other activities, it is recommended to use high timeout values. - * Recommended timeout > 2*(connInterval * (6 + connSlaveLatency)). - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. auth_payload_timeout was outside of allowed range. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. - */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle */ - uint16_t auth_payload_timeout; /**< Requested timeout in 10 ms unit, see @ref BLE_GAP_AUTH_PAYLOAD_TIMEOUT. */ -} ble_gap_opt_auth_payload_timeout_t; - - -/**@brief Option structure for GAP options. */ -typedef union -{ - ble_gap_opt_ch_map_t ch_map; /**< Parameters for the Channel Map option. */ - ble_gap_opt_local_conn_latency_t local_conn_latency; /**< Parameters for the Local connection latency option */ - ble_gap_opt_passkey_t passkey; /**< Parameters for the Passkey option.*/ - ble_gap_opt_scan_req_report_t scan_req_report; /**< Parameters for the scan request report option.*/ - ble_gap_opt_compat_mode_1_t compat_mode_1; /**< Parameters for the compatibility mode 1 option.*/ - ble_gap_opt_auth_payload_timeout_t auth_payload_timeout; /**< Parameters for the authenticated payload timeout option.*/ - ble_gap_opt_slave_latency_disable_t slave_latency_disable; /**< Parameters for the Disable slave latency option */ -} ble_gap_opt_t; -/**@} */ - - -/**@addtogroup BLE_GAP_FUNCTIONS Functions - * @{ */ - -/**@brief Set the local Bluetooth identity address. - * - * The local Bluetooth identity address is the address that identifies this device to other peers. - * The address type must be either @ref BLE_GAP_ADDR_TYPE_PUBLIC or @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC. - * - * @note The identity address cannot be changed while advertising, scanning or creating a connection. - * - * @note This address will be distributed to the peer during bonding. - * If the address changes, the address stored in the peer device will not be valid and the ability to - * reconnect using the old address will be lost. - * - * @note By default the SoftDevice will set an address of type @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC upon being - * enabled. The address is a random number populated during the IC manufacturing process and remains unchanged - * for the lifetime of each IC. - * - * @mscs - * @mmsc{@ref BLE_GAP_ADV_MSC} - * @endmscs - * - * @param[in] p_addr Pointer to address structure. - * - * @retval ::NRF_SUCCESS Address successfully set. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::NRF_ERROR_INVALID_STATE The identity address cannot be changed while advertising, - * scanning or creating a connection. - */ -SVCALL(SD_BLE_GAP_ADDR_SET, uint32_t, sd_ble_gap_addr_set(ble_gap_addr_t const *p_addr)); - - -/**@brief Get local Bluetooth identity address. - * - * @note This will always return the identity address irrespective of the privacy settings, - * i.e. the address type will always be either @ref BLE_GAP_ADDR_TYPE_PUBLIC or @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC. - * - * @param[out] p_addr Pointer to address structure to be filled in. - * - * @retval ::NRF_SUCCESS Address successfully retrieved. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. - */ -SVCALL(SD_BLE_GAP_ADDR_GET, uint32_t, sd_ble_gap_addr_get(ble_gap_addr_t *p_addr)); - - -/**@brief Set the active whitelist in the SoftDevice. - * - * @note Only one whitelist can be used at a time and the whitelist is shared between the BLE roles. - * The whitelist cannot be set if a BLE role is using the whitelist. - * - * @note If an address is resolved using the information in the device identity list, then the whitelist - * filter policy applies to the peer identity address and not the resolvable address sent on air. - * - * @mscs - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_PRIVATE_SCAN_MSC} - * @endmscs - * - * @param[in] pp_wl_addrs Pointer to a whitelist of peer addresses, if NULL the whitelist will be cleared. - * @param[in] len Length of the whitelist, maximum @ref BLE_GAP_WHITELIST_ADDR_MAX_COUNT. - * - * @retval ::NRF_SUCCESS The whitelist is successfully set/cleared. - * @retval ::NRF_ERROR_INVALID_ADDR The whitelist (or one of its entries) provided is invalid. - * @retval ::BLE_ERROR_GAP_WHITELIST_IN_USE The whitelist is in use by a BLE role and cannot be set or cleared. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. - * @retval ::NRF_ERROR_DATA_SIZE The given whitelist size is invalid (zero or too large); this can only return when - * pp_wl_addrs is not NULL. - */ -SVCALL(SD_BLE_GAP_WHITELIST_SET, uint32_t, sd_ble_gap_whitelist_set(ble_gap_addr_t const * const * pp_wl_addrs, uint8_t len)); - - -/**@brief Set device identity list. - * - * @note Only one device identity list can be used at a time and the list is shared between the BLE roles. - * The device identity list cannot be set if a BLE role is using the list. - * - * @param[in] pp_id_keys Pointer to an array of peer identity addresses and peer IRKs, if NULL the device identity list will be cleared. - * @param[in] pp_local_irks Pointer to an array of local IRKs. Each entry in the array maps to the entry in pp_id_keys at the same index. - * To fill in the list with the currently set device IRK for all peers, set to NULL. - * @param[in] len Length of the device identity list, maximum @ref BLE_GAP_DEVICE_IDENTITIES_MAX_COUNT. - * - * @mscs - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_PRIVATE_SCAN_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_CONN_PRIV_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_CONN_PRIV_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS The device identity list successfully set/cleared. - * @retval ::NRF_ERROR_INVALID_ADDR The device identity list (or one of its entries) provided is invalid. - * This code may be returned if the local IRK list also has an invalid entry. - * @retval ::BLE_ERROR_GAP_DEVICE_IDENTITIES_IN_USE The device identity list is in use and cannot be set or cleared. - * @retval ::BLE_ERROR_GAP_DEVICE_IDENTITIES_DUPLICATE The device identity list contains multiple entries with the same identity address. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. - * @retval ::NRF_ERROR_DATA_SIZE The given device identity list size invalid (zero or too large); this can - * only return when pp_id_keys is not NULL. - */ -SVCALL(SD_BLE_GAP_DEVICE_IDENTITIES_SET, uint32_t, sd_ble_gap_device_identities_set(ble_gap_id_key_t const * const * pp_id_keys, ble_gap_irk_t const * const * pp_local_irks, uint8_t len)); - - -/**@brief Set privacy settings. - * - * @note Privacy settings cannot be changed while advertising, scanning or creating a connection. - * - * @param[in] p_privacy_params Privacy settings. - * - * @mscs - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. - * @retval ::NRF_ERROR_INVALID_ADDR The pointer to privacy settings is NULL or invalid. - * Otherwise, the p_device_irk pointer in privacy parameter is an invalid pointer. - * @retval ::NRF_ERROR_INVALID_PARAM Out of range parameters are provided. - * @retval ::NRF_ERROR_INVALID_STATE Privacy settings cannot be changed while advertising, scanning - * or creating a connection. - */ -SVCALL(SD_BLE_GAP_PRIVACY_SET, uint32_t, sd_ble_gap_privacy_set(ble_gap_privacy_params_t const *p_privacy_params)); - - -/**@brief Get privacy settings. - * - * @note ::ble_gap_privacy_params_t::p_device_irk must be initialized to NULL or a valid address before this function is called. - * If it is initialized to a valid address, the address pointed to will contain the current device IRK on return. - * - * @param[in,out] p_privacy_params Privacy settings. - * - * @retval ::NRF_SUCCESS Privacy settings read. - * @retval ::NRF_ERROR_INVALID_ADDR The pointer given for returning the privacy settings may be NULL or invalid. - * Otherwise, the p_device_irk pointer in privacy parameter is an invalid pointer. - */ -SVCALL(SD_BLE_GAP_PRIVACY_GET, uint32_t, sd_ble_gap_privacy_get(ble_gap_privacy_params_t *p_privacy_params)); - - -/**@brief Set, clear or update advertising and scan response data. - * - * @note The format of the advertising data will be checked by this call to ensure interoperability. - * Limitations imposed by this API call to the data provided include having a flags data type in the scan response data and - * duplicating the local name in the advertising data and scan response data. - * - * @note To clear the advertising data and set it to a 0-length packet, simply provide a valid pointer (p_data/p_sr_data) with its corresponding - * length (dlen/srdlen) set to 0. - * - * @note The call will fail if p_data and p_sr_data are both NULL since this would have no effect. - * - * @mscs - * @mmsc{@ref BLE_GAP_ADV_MSC} - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @endmscs - * - * @param[in] p_data Raw data to be placed in advertising packet. If NULL, no changes are made to the current advertising packet data. - * @param[in] dlen Data length for p_data. Max size: @ref BLE_GAP_ADV_MAX_SIZE octets. Should be 0 if p_data is NULL, can be 0 if p_data is not NULL. - * @param[in] p_sr_data Raw data to be placed in scan response packet. If NULL, no changes are made to the current scan response packet data. - * @param[in] srdlen Data length for p_sr_data. Max size: @ref BLE_GAP_ADV_MAX_SIZE octets. Should be 0 if p_sr_data is NULL, can be 0 if p_data is not NULL. - * - * @retval ::NRF_SUCCESS Advertising data successfully updated or cleared. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, both p_data and p_sr_data cannot be NULL. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_FLAGS Invalid combination of advertising flags supplied. - * @retval ::NRF_ERROR_INVALID_DATA Invalid data type(s) supplied, check the advertising data format specification. - * @retval ::NRF_ERROR_INVALID_LENGTH Invalid data length(s) supplied. - * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported data type. - * @retval ::BLE_ERROR_GAP_UUID_LIST_MISMATCH Invalid UUID list supplied. - */ -SVCALL(SD_BLE_GAP_ADV_DATA_SET, uint32_t, sd_ble_gap_adv_data_set(uint8_t const *p_data, uint8_t dlen, uint8_t const *p_sr_data, uint8_t srdlen)); - - -/**@brief Start advertising (GAP Discoverable, Connectable modes, Broadcast Procedure). - * - * @note Only one advertiser may be active at any time. - * - * @events - * @event{@ref BLE_GAP_EVT_CONNECTED, Generated after connection has been established through connectable advertising.} - * @event{@ref BLE_GAP_EVT_TIMEOUT, Advertisement has timed out.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_ADV_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_CONN_PRIV_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @endmscs - * - * @param[in] p_adv_params Pointer to advertising parameters structure. - * @param[in] conn_cfg_tag Tag identifying a configuration set by @ref sd_ble_cfg_set or @ref - * BLE_CONN_CFG_TAG_DEFAULT to use the default connection configuration. If - * @ref ble_gap_adv_params_t::type is @ref BLE_GAP_ADV_TYPE_ADV_NONCONN_IND, - * this is ignored. - * - * @retval ::NRF_SUCCESS The BLE stack has started advertising. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_CONN_COUNT The limit of available connections has been reached; connectable advertiser cannot be started. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check the accepted ranges and limits. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid Bluetooth address supplied. - * @retval ::BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST Discoverable mode and whitelist incompatible. - * @retval ::NRF_ERROR_RESOURCES Not enough BLE role slots available. - * Stop one or more currently active roles (Central, Peripheral or Observer) and try again - */ -SVCALL(SD_BLE_GAP_ADV_START, uint32_t, sd_ble_gap_adv_start(ble_gap_adv_params_t const *p_adv_params, uint8_t conn_cfg_tag)); - - -/**@brief Stop advertising (GAP Discoverable, Connectable modes, Broadcast Procedure). - * - * @mscs - * @mmsc{@ref BLE_GAP_ADV_MSC} - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS The BLE stack has stopped advertising. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation (most probably not in advertising state). - */ -SVCALL(SD_BLE_GAP_ADV_STOP, uint32_t, sd_ble_gap_adv_stop(void)); - - - -/**@brief Update connection parameters. - * - * @details In the central role this will initiate a Link Layer connection parameter update procedure, - * otherwise in the peripheral role, this will send the corresponding L2CAP request and wait for - * the central to perform the procedure. In both cases, and regardless of success or failure, the application - * will be informed of the result with a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE event. - * - * @details This function can be used as a central both to reply to a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST or to start the procedure unrequested. - * - * @events - * @event{@ref BLE_GAP_EVT_CONN_PARAM_UPDATE, Result of the connection parameter update procedure.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CPU_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} - * @mmsc{@ref BLE_GAP_MULTILINK_CPU_MSC} - * @mmsc{@ref BLE_GAP_MULTILINK_CTRL_PROC_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_CPU_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_conn_params Pointer to desired connection parameters. If NULL is provided on a peripheral role, - * the parameters in the PPCP characteristic of the GAP service will be used instead. - * If NULL is provided on a central role and in response to a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST, the peripheral request will be rejected - * - * @retval ::NRF_SUCCESS The Connection Update procedure has been started successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_BUSY Procedure already in progress, wait for pending procedures to complete and retry. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - */ -SVCALL(SD_BLE_GAP_CONN_PARAM_UPDATE, uint32_t, sd_ble_gap_conn_param_update(uint16_t conn_handle, ble_gap_conn_params_t const *p_conn_params)); - - -/**@brief Disconnect (GAP Link Termination). - * - * @details This call initiates the disconnection procedure, and its completion will be communicated to the application - * with a @ref BLE_GAP_EVT_DISCONNECTED event. - * - * @events - * @event{@ref BLE_GAP_EVT_DISCONNECTED, Generated when disconnection procedure is complete.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CONN_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] hci_status_code HCI status code, see @ref BLE_HCI_STATUS_CODES (accepted values are @ref BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION and @ref BLE_HCI_CONN_INTERVAL_UNACCEPTABLE). - * - * @retval ::NRF_SUCCESS The disconnection procedure has been started successfully. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation (disconnection is already in progress). - */ -SVCALL(SD_BLE_GAP_DISCONNECT, uint32_t, sd_ble_gap_disconnect(uint16_t conn_handle, uint8_t hci_status_code)); - - -/**@brief Set the radio's transmit power. - * - * @param[in] tx_power Radio transmit power in dBm (accepted values are -40, -20, -16, -12, -8, -4, 0, 3, and 4 dBm). - * - * @retval ::NRF_SUCCESS Successfully changed the transmit power. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - */ -SVCALL(SD_BLE_GAP_TX_POWER_SET, uint32_t, sd_ble_gap_tx_power_set(int8_t tx_power)); - - -/**@brief Set GAP Appearance value. - * - * @param[in] appearance Appearance (16-bit), see @ref BLE_APPEARANCES. - * - * @retval ::NRF_SUCCESS Appearance value set successfully. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - */ -SVCALL(SD_BLE_GAP_APPEARANCE_SET, uint32_t, sd_ble_gap_appearance_set(uint16_t appearance)); - - -/**@brief Get GAP Appearance value. - * - * @param[out] p_appearance Pointer to appearance (16-bit) to be filled in, see @ref BLE_APPEARANCES. - * - * @retval ::NRF_SUCCESS Appearance value retrieved successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - */ -SVCALL(SD_BLE_GAP_APPEARANCE_GET, uint32_t, sd_ble_gap_appearance_get(uint16_t *p_appearance)); - - -/**@brief Set GAP Peripheral Preferred Connection Parameters. - * - * @param[in] p_conn_params Pointer to a @ref ble_gap_conn_params_t structure with the desired parameters. - * - * @retval ::NRF_SUCCESS Peripheral Preferred Connection Parameters set successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - */ -SVCALL(SD_BLE_GAP_PPCP_SET, uint32_t, sd_ble_gap_ppcp_set(ble_gap_conn_params_t const *p_conn_params)); - - -/**@brief Get GAP Peripheral Preferred Connection Parameters. - * - * @param[out] p_conn_params Pointer to a @ref ble_gap_conn_params_t structure where the parameters will be stored. - * - * @retval ::NRF_SUCCESS Peripheral Preferred Connection Parameters retrieved successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - */ -SVCALL(SD_BLE_GAP_PPCP_GET, uint32_t, sd_ble_gap_ppcp_get(ble_gap_conn_params_t *p_conn_params)); - - -/**@brief Set GAP device name. - * - * @note If the device name is located in application flash memory (see @ref ble_gap_cfg_device_name_t), - * it cannot be changed. Then @ref NRF_ERROR_FORBIDDEN will be returned. - * - * @param[in] p_write_perm Write permissions for the Device Name characteristic, see @ref ble_gap_conn_sec_mode_t. - * @param[in] p_dev_name Pointer to a UTF-8 encoded, non NULL-terminated string. - * @param[in] len Length of the UTF-8, non NULL-terminated string pointed to by p_dev_name in octets (must be smaller or equal than @ref BLE_GAP_DEVNAME_MAX_LEN). - * - * @retval ::NRF_SUCCESS GAP device name and permissions set successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. - * @retval ::NRF_ERROR_FORBIDDEN Device name is not writable. - */ -SVCALL(SD_BLE_GAP_DEVICE_NAME_SET, uint32_t, sd_ble_gap_device_name_set(ble_gap_conn_sec_mode_t const *p_write_perm, uint8_t const *p_dev_name, uint16_t len)); - - -/**@brief Get GAP device name. - * - * @note If the device name is longer than the size of the supplied buffer, - * p_len will return the complete device name length, - * and not the number of bytes actually returned in p_dev_name. - * The application may use this information to allocate a suitable buffer size. - * - * @param[out] p_dev_name Pointer to an empty buffer where the UTF-8 non NULL-terminated string will be placed. Set to NULL to obtain the complete device name length. - * @param[in,out] p_len Length of the buffer pointed by p_dev_name, complete device name length on output. - * - * @retval ::NRF_SUCCESS GAP device name retrieved successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. - */ -SVCALL(SD_BLE_GAP_DEVICE_NAME_GET, uint32_t, sd_ble_gap_device_name_get(uint8_t *p_dev_name, uint16_t *p_len)); - - -/**@brief Initiate the GAP Authentication procedure. - * - * @details In the central role, this function will send an SMP Pairing Request (or an SMP Pairing Failed if rejected), - * otherwise in the peripheral role, an SMP Security Request will be sent. - * - * @events - * @event{Depending on the security parameters set and the packet exchanges with the peer\, the following events may be generated:} - * @event{@ref BLE_GAP_EVT_SEC_PARAMS_REQUEST} - * @event{@ref BLE_GAP_EVT_SEC_INFO_REQUEST} - * @event{@ref BLE_GAP_EVT_PASSKEY_DISPLAY} - * @event{@ref BLE_GAP_EVT_KEY_PRESSED} - * @event{@ref BLE_GAP_EVT_AUTH_KEY_REQUEST} - * @event{@ref BLE_GAP_EVT_LESC_DHKEY_REQUEST} - * @event{@ref BLE_GAP_EVT_CONN_SEC_UPDATE} - * @event{@ref BLE_GAP_EVT_AUTH_STATUS} - * @event{@ref BLE_GAP_EVT_TIMEOUT} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_SEC_REQ_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_SEC_REQ_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_sec_params Pointer to the @ref ble_gap_sec_params_t structure with the security parameters to be used during the pairing or bonding procedure. - * In the peripheral role, only the bond, mitm, lesc and keypress fields of this structure are used. - * In the central role, this pointer may be NULL to reject a Security Request. - * - * @retval ::NRF_SUCCESS Successfully initiated authentication procedure. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_NO_MEM The maximum number of authentication procedures that can run in parallel for the given role is reached. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_NOT_SUPPORTED Setting of sign or link fields in @ref ble_gap_sec_kdist_t not supported. - * @retval ::NRF_ERROR_TIMEOUT A SMP timeout has occurred, and further SMP operations on this link is prohibited. - */ -SVCALL(SD_BLE_GAP_AUTHENTICATE, uint32_t, sd_ble_gap_authenticate(uint16_t conn_handle, ble_gap_sec_params_t const *p_sec_params)); - - -/**@brief Reply with GAP security parameters. - * - * @details This function is only used to reply to a @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. - * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. - * - * @events - * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_JW_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_PERIPH_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_CENTRAL_OOB_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_CONFIRM_FAIL_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_PD_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_KS_TOO_SMALL_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_APP_ERROR_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_REMOTE_PAIRING_FAIL_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_TIMEOUT_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] sec_status Security status, see @ref BLE_GAP_SEC_STATUS. - * @param[in] p_sec_params Pointer to a @ref ble_gap_sec_params_t security parameters structure. In the central role this must be set to NULL, as the parameters have - * already been provided during a previous call to @ref sd_ble_gap_authenticate. - * @param[in,out] p_sec_keyset Pointer to a @ref ble_gap_sec_keyset_t security keyset structure. Any keys generated and/or distributed as a result of the ongoing security procedure - * will be stored into the memory referenced by the pointers inside this structure. The keys will be stored and available to the application - * upon reception of a @ref BLE_GAP_EVT_AUTH_STATUS event. - * Note that the SoftDevice expects the application to provide memory for storing the - * peer's keys. So it must be ensured that the relevant pointers inside this structure are not NULL. The pointers to the local key - * can, however, be NULL, in which case, the local key data will not be available to the application upon reception of the - * @ref BLE_GAP_EVT_AUTH_STATUS event. - * - * @retval ::NRF_SUCCESS Successfully accepted security parameter from the application. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_NOT_SUPPORTED Setting of sign or link fields in @ref ble_gap_sec_kdist_t not supported. - */ -SVCALL(SD_BLE_GAP_SEC_PARAMS_REPLY, uint32_t, sd_ble_gap_sec_params_reply(uint16_t conn_handle, uint8_t sec_status, ble_gap_sec_params_t const *p_sec_params, ble_gap_sec_keyset_t const *p_sec_keyset)); - - -/**@brief Reply with an authentication key. - * - * @details This function is only used to reply to a @ref BLE_GAP_EVT_AUTH_KEY_REQUEST or a @ref BLE_GAP_EVT_PASSKEY_DISPLAY, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. - * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. - * - * @events - * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_CENTRAL_OOB_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] key_type See @ref BLE_GAP_AUTH_KEY_TYPES. - * @param[in] p_key If key type is @ref BLE_GAP_AUTH_KEY_TYPE_NONE, then NULL. - * If key type is @ref BLE_GAP_AUTH_KEY_TYPE_PASSKEY, then a 6-byte ASCII string (digit 0..9 only, no NULL termination) - * or NULL when confirming LE Secure Connections Numeric Comparison. - * If key type is @ref BLE_GAP_AUTH_KEY_TYPE_OOB, then a 16-byte OOB key value in little-endian format. - * - * @retval ::NRF_SUCCESS Authentication key successfully set. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_AUTH_KEY_REPLY, uint32_t, sd_ble_gap_auth_key_reply(uint16_t conn_handle, uint8_t key_type, uint8_t const *p_key)); - -/**@brief Reply with an LE Secure connections DHKey. - * - * @details This function is only used to reply to a @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. - * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. - * - * @events - * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_LESC_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_PD_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_dhkey LE Secure Connections DHKey. - * - * @retval ::NRF_SUCCESS DHKey successfully set. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_LESC_DHKEY_REPLY, uint32_t, sd_ble_gap_lesc_dhkey_reply(uint16_t conn_handle, ble_gap_lesc_dhkey_t const *p_dhkey)); - -/**@brief Notify the peer of a local keypress. - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] kp_not See @ref BLE_GAP_KP_NOT_TYPES. - * - * @retval ::NRF_SUCCESS Keypress notification successfully queued for transmission. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Either not entering a passkey or keypresses have not been enabled by both peers. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_BUSY The BLE stack is busy. Retry at later time. - */ -SVCALL(SD_BLE_GAP_KEYPRESS_NOTIFY, uint32_t, sd_ble_gap_keypress_notify(uint16_t conn_handle, uint8_t kp_not)); - -/**@brief Generate a set of OOB data to send to a peer out of band. - * - * @note The @ref ble_gap_addr_t included in the OOB data returned will be the currently active one (or, if a connection has already been established, - * the one used during connection setup). The application may manually overwrite it with an updated value. - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. Can be BLE_CONN_HANDLE_INVALID if a BLE connection has not been established yet. - * @param[in] p_pk_own LE Secure Connections local P-256 Public Key. - * @param[out] p_oobd_own The OOB data to be sent out of band to a peer. - * - * @retval ::NRF_SUCCESS OOB data successfully generated. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_LESC_OOB_DATA_GET, uint32_t, sd_ble_gap_lesc_oob_data_get(uint16_t conn_handle, ble_gap_lesc_p256_pk_t const *p_pk_own, ble_gap_lesc_oob_data_t *p_oobd_own)); - -/**@brief Provide the OOB data sent/received out of band. - * - * @note An authentication procedure with OOB selected as an algorithm must be in progress when calling this function. - * @note A @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST event with the oobd_req set to 1 must have been received prior to calling this function. - * - * @events - * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_oobd_own The OOB data sent out of band to a peer or NULL if the peer has not received OOB data. - * Must correspond to @ref ble_gap_sec_params_t::oob flag in @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST. - * @param[in] p_oobd_peer The OOB data received out of band from a peer or NULL if none received. - * Must correspond to @ref ble_gap_sec_params_t::oob flag in @ref sd_ble_gap_authenticate in the central role - * or @ref sd_ble_gap_sec_params_reply in the peripheral role. - * - * @retval ::NRF_SUCCESS OOB data accepted. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_LESC_OOB_DATA_SET, uint32_t, sd_ble_gap_lesc_oob_data_set(uint16_t conn_handle, ble_gap_lesc_oob_data_t const *p_oobd_own, ble_gap_lesc_oob_data_t const *p_oobd_peer)); - -/**@brief Initiate GAP Encryption procedure. - * - * @details In the central role, this function will initiate the encryption procedure using the encryption information provided. - * - * @events - * @event{@ref BLE_GAP_EVT_CONN_SEC_UPDATE, The connection security has been updated.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_ENC_MSC} - * @mmsc{@ref BLE_GAP_MULTILINK_CTRL_PROC_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_SEC_REQ_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_master_id Pointer to a @ref ble_gap_master_id_t master identification structure. - * @param[in] p_enc_info Pointer to a @ref ble_gap_enc_info_t encryption information structure. - * - * @retval ::NRF_SUCCESS Successfully initiated authentication procedure. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::BLE_ERROR_INVALID_ROLE Operation is not supported in the Peripheral role. - * @retval ::NRF_ERROR_BUSY Procedure already in progress or not allowed at this time, wait for pending procedures to complete and retry. - */ -SVCALL(SD_BLE_GAP_ENCRYPT, uint32_t, sd_ble_gap_encrypt(uint16_t conn_handle, ble_gap_master_id_t const *p_master_id, ble_gap_enc_info_t const *p_enc_info)); - - -/**@brief Reply with GAP security information. - * - * @details This function is only used to reply to a @ref BLE_GAP_EVT_SEC_INFO_REQUEST, calling it at other times will result in @ref NRF_ERROR_INVALID_STATE. - * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. - * @note Data signing is not yet supported, and p_sign_info must therefore be NULL. - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_ENC_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_enc_info Pointer to a @ref ble_gap_enc_info_t encryption information structure. May be NULL to signal none is available. - * @param[in] p_id_info Pointer to a @ref ble_gap_irk_t identity information structure. May be NULL to signal none is available. - * @param[in] p_sign_info Pointer to a @ref ble_gap_sign_info_t signing information structure. May be NULL to signal none is available. - * - * @retval ::NRF_SUCCESS Successfully accepted security information. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_SEC_INFO_REPLY, uint32_t, sd_ble_gap_sec_info_reply(uint16_t conn_handle, ble_gap_enc_info_t const *p_enc_info, ble_gap_irk_t const *p_id_info, ble_gap_sign_info_t const *p_sign_info)); - - -/**@brief Get the current connection security. - * - * @param[in] conn_handle Connection handle. - * @param[out] p_conn_sec Pointer to a @ref ble_gap_conn_sec_t structure to be filled in. - * - * @retval ::NRF_SUCCESS Current connection security successfully retrieved. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_CONN_SEC_GET, uint32_t, sd_ble_gap_conn_sec_get(uint16_t conn_handle, ble_gap_conn_sec_t *p_conn_sec)); - - -/**@brief Start reporting the received signal strength to the application. - * - * A new event is reported whenever the RSSI value changes, until @ref sd_ble_gap_rssi_stop is called. - * - * @events - * @event{@ref BLE_GAP_EVT_RSSI_CHANGED, New RSSI data available. How often the event is generated is - * dependent on the settings of the threshold_dbm - * and skip_count input parameters.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} - * @mmsc{@ref BLE_GAP_RSSI_FILT_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] threshold_dbm Minimum change in dBm before triggering the @ref BLE_GAP_EVT_RSSI_CHANGED event. Events are disabled if threshold_dbm equals @ref BLE_GAP_RSSI_THRESHOLD_INVALID. - * @param[in] skip_count Number of RSSI samples with a change of threshold_dbm or more before sending a new @ref BLE_GAP_EVT_RSSI_CHANGED event. - * - * @retval ::NRF_SUCCESS Successfully activated RSSI reporting. - * @retval ::NRF_ERROR_INVALID_STATE Disconnection in progress. Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_RSSI_START, uint32_t, sd_ble_gap_rssi_start(uint16_t conn_handle, uint8_t threshold_dbm, uint8_t skip_count)); - - -/**@brief Stop reporting the received signal strength. - * - * @note An RSSI change detected before the call but not yet received by the application - * may be reported after @ref sd_ble_gap_rssi_stop has been called. - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} - * @mmsc{@ref BLE_GAP_RSSI_FILT_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * - * @retval ::NRF_SUCCESS Successfully deactivated RSSI reporting. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_RSSI_STOP, uint32_t, sd_ble_gap_rssi_stop(uint16_t conn_handle)); - - -/**@brief Get the received signal strength for the last connection event. - * - * @ref sd_ble_gap_rssi_start must be called to start reporting RSSI before using this function. @ref NRF_ERROR_NOT_FOUND - * will be returned until RSSI was sampled for the first time after calling @ref sd_ble_gap_rssi_start. - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[out] p_rssi Pointer to the location where the RSSI measurement shall be stored. - * - * @retval ::NRF_SUCCESS Successfully read the RSSI. - * @retval ::NRF_ERROR_NOT_FOUND No sample is available. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_INVALID_STATE RSSI reporting is not ongoing, or disconnection in progress. - */ -SVCALL(SD_BLE_GAP_RSSI_GET, uint32_t, sd_ble_gap_rssi_get(uint16_t conn_handle, int8_t *p_rssi)); - - -/**@brief Start scanning (GAP Discovery procedure, Observer Procedure). - * - * @events - * @event{@ref BLE_GAP_EVT_ADV_REPORT, An advertising or scan response packet has been received.} - * @event{@ref BLE_GAP_EVT_TIMEOUT, Scanner has timed out.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_SCAN_MSC} - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @endmscs - * - * @param[in] p_scan_params Pointer to scan parameters structure. - * - * @retval ::NRF_SUCCESS Successfully initiated scanning procedure. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_RESOURCES Not enough BLE role slots available. - * Stop one or more currently active roles (Central, Peripheral or Broadcaster) and try again - */ -SVCALL(SD_BLE_GAP_SCAN_START, uint32_t, sd_ble_gap_scan_start(ble_gap_scan_params_t const *p_scan_params)); - - -/**@brief Stop scanning (GAP Discovery procedure, Observer Procedure). - * - * @mscs - * @mmsc{@ref BLE_GAP_SCAN_MSC} - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Successfully stopped scanning procedure. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation (most probably not in scanning state). - */ -SVCALL(SD_BLE_GAP_SCAN_STOP, uint32_t, sd_ble_gap_scan_stop(void)); - - -/**@brief Create a connection (GAP Link Establishment). - * - * @note If a scanning procedure is currently in progress it will be automatically stopped when calling this function. - * The scanning procedure will be stopped even if the function returns an error. - * - * @mscs - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_CONN_PRIV_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_CONN_MSC} - * @endmscs - * - * @param[in] p_peer_addr Pointer to peer address. If the use_whitelist bit is set in @ref ble_gap_scan_params_t, then this is ignored. - * @param[in] p_scan_params Pointer to scan parameters structure. - * @param[in] p_conn_params Pointer to desired connection parameters. - * @param[in] conn_cfg_tag Tag identifying a configuration set by @ref sd_ble_cfg_set or @ref - * BLE_CONN_CFG_TAG_DEFAULT to use the default connection configuration. - * - * @retval ::NRF_SUCCESS Successfully initiated connection procedure. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid parameter(s) pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * - Invalid parameter(s) in p_scan_params or p_conn_params. - * - Use of whitelist requested but whitelist has not been set, see @ref sd_ble_gap_whitelist_set. - * - Peer address was not present in the device identity list, see @ref sd_ble_gap_device_identities_set. - * @retval ::NRF_ERROR_INVALID_STATE The SoftDevice is in an invalid state to perform this operation. This may be due to an - * existing locally initiated connect procedure, which must complete before initiating again. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid Peer address. - * @retval ::NRF_ERROR_CONN_COUNT The limit of available connections has been reached. - * @retval ::NRF_ERROR_RESOURCES Not enough BLE role slots available. - * Stop one or more currently active roles (Central, Peripheral or Broadcaster) and try again - */ -SVCALL(SD_BLE_GAP_CONNECT, uint32_t, sd_ble_gap_connect(ble_gap_addr_t const *p_peer_addr, ble_gap_scan_params_t const *p_scan_params, ble_gap_conn_params_t const *p_conn_params, uint8_t conn_cfg_tag)); - - -/**@brief Cancel a connection establishment. - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_CONN_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Successfully canceled an ongoing connection procedure. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - */ -SVCALL(SD_BLE_GAP_CONNECT_CANCEL, uint32_t, sd_ble_gap_connect_cancel(void)); - - -/**@brief Initiate or respond to a PHY Update Procedure - * - * @details This function is used to initiate or respond to a PHY Update Procedure. It will always generate a - * @ref BLE_GAP_EVT_PHY_UPDATE event if successfully executed. If @ref ble_gap_phys_t::tx_phys or @ref ble_gap_phys_t::rx_phys - * is @ref BLE_GAP_PHY_AUTO, then the stack will select a PHY for the respective direction based on the peer's PHY preferences - * and the local stack configuration. If the peer does not support the PHY Update Procedure, then the - * resulting @ref BLE_GAP_EVT_PHY_UPDATE event will have a status set to - * @ref BLE_HCI_UNSUPPORTED_REMOTE_FEATURE. - * If the PHY procedure was rejected by the peer due to a procedure collision, the status will be - * @ref BLE_HCI_STATUS_CODE_LMP_ERROR_TRANSACTION_COLLISION or @ref BLE_HCI_DIFFERENT_TRANSACTION_COLLISION. - * If the peer responds to the PHY Update procedure with invalid parameters, the status will be @ref BLE_HCI_STATUS_CODE_INVALID_LMP_PARAMETERS. - * If the PHY procedure was rejected by the peer for a different reason, the status will contain the reason as specified by the peer. - * - * @events - * @event{@ref BLE_GAP_EVT_PHY_UPDATE, Result of the PHY Update Procedure.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_PHY_UPDATE} - * @mmsc{@ref BLE_GAP_PERIPHERAL_PHY_UPDATE} - * @endmscs - * - * @param[in] conn_handle Connection handle to indicate the connection for which the PHY Update is requested. - * @param[in] p_gap_phys Pointer to PHY structure. - * - * @retval ::NRF_SUCCESS Successfully requested a PHY Update. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Unsupported PHYs supplied to the call. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_BUSY Procedure is already in progress or not allowed at this time. Process pending events and wait for the pending procedure to complete and retry. - * - */ -SVCALL(SD_BLE_GAP_PHY_UPDATE, uint32_t, sd_ble_gap_phy_update(uint16_t conn_handle, ble_gap_phys_t const *p_gap_phys)); - -/**@brief Initiate or respond to a Data Length Update Procedure. - * - * @note Only symmetric input parameters for the Data Length Update is supported. Only @ref - * BLE_GAP_DATA_LENGTH_AUTO for max_tx_time_us and max_rx_time_us is supported. - * - * @note If the application uses @ref BLE_GAP_DATA_LENGTH_AUTO for one or more members of - * p_dl_params, the SoftDevice will choose the highest value supported in current - * configuration and connection parameters. - * - * @param[in] conn_handle Connection handle. - * @param[in] p_dl_params Pointer to local parameters to be used in Data Length Update - * Procedure. Set any member to @ref BLE_GAP_DATA_LENGTH_AUTO to let - * the SoftDevice automatically decide the value for that member. - * Set to NULL to use automatic values for all members. - * @param[out] p_dl_limitation Pointer to limitation to be written when local device does not - * have enough resources to accommodate the requested Data Length - * Update parameters. Ignored if NULL. - * - * @mscs - * @mmsc{@ref BLE_GAP_DATA_LENGTH_UPDATE_PROCEDURE_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Successfully set Data Length Extension initiation/response parameters. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameters supplied. - * @retval ::NRF_ERROR_NOT_SUPPORTED The requested parameters are not supported by the SoftDevice. - * @retval ::NRF_ERROR_RESOURCES The requested parameters can not be accommodated. Inspect - * p_dl_limitation so see where the limitation is. - * @retval ::NRF_ERROR_BUSY Peer has already initiated a Data Length Update Procedure. Process the - * pending @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST event to respond. - */ -SVCALL(SD_BLE_GAP_DATA_LENGTH_UPDATE, uint32_t, sd_ble_gap_data_length_update(uint16_t conn_handle, ble_gap_data_length_params_t const *p_dl_params, ble_gap_data_length_limitation_t *p_dl_limitation)); - - - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // BLE_GAP_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/ble_gatt.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/ble_gatt.h deleted file mode 100644 index 4e054cf5c32..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/ble_gatt.h +++ /dev/null @@ -1,223 +0,0 @@ -/* - * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_GATT Generic Attribute Profile (GATT) Common - @{ - @brief Common definitions and prototypes for the GATT interfaces. - */ - -#ifndef BLE_GATT_H__ -#define BLE_GATT_H__ - -#include "ble_types.h" -#include "ble_ranges.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_GATT_DEFINES Defines - * @{ */ - -/** @brief Default ATT MTU, in bytes. */ -#define BLE_GATT_ATT_MTU_DEFAULT 23 - -/**@brief Invalid Attribute Handle. */ -#define BLE_GATT_HANDLE_INVALID 0x0000 - -/**@brief First Attribute Handle. */ -#define BLE_GATT_HANDLE_START 0x0001 - -/**@brief Last Attribute Handle. */ -#define BLE_GATT_HANDLE_END 0xFFFF - -/** @defgroup BLE_GATT_TIMEOUT_SOURCES GATT Timeout sources - * @{ */ -#define BLE_GATT_TIMEOUT_SRC_PROTOCOL 0x00 /**< ATT Protocol timeout. */ -/** @} */ - -/** @defgroup BLE_GATT_WRITE_OPS GATT Write operations - * @{ */ -#define BLE_GATT_OP_INVALID 0x00 /**< Invalid Operation. */ -#define BLE_GATT_OP_WRITE_REQ 0x01 /**< Write Request. */ -#define BLE_GATT_OP_WRITE_CMD 0x02 /**< Write Command. */ -#define BLE_GATT_OP_SIGN_WRITE_CMD 0x03 /**< Signed Write Command. */ -#define BLE_GATT_OP_PREP_WRITE_REQ 0x04 /**< Prepare Write Request. */ -#define BLE_GATT_OP_EXEC_WRITE_REQ 0x05 /**< Execute Write Request. */ -/** @} */ - -/** @defgroup BLE_GATT_EXEC_WRITE_FLAGS GATT Execute Write flags - * @{ */ -#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_CANCEL 0x00 /**< Cancel prepared write. */ -#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_WRITE 0x01 /**< Execute prepared write. */ -/** @} */ - -/** @defgroup BLE_GATT_HVX_TYPES GATT Handle Value operations - * @{ */ -#define BLE_GATT_HVX_INVALID 0x00 /**< Invalid Operation. */ -#define BLE_GATT_HVX_NOTIFICATION 0x01 /**< Handle Value Notification. */ -#define BLE_GATT_HVX_INDICATION 0x02 /**< Handle Value Indication. */ -/** @} */ - -/** @defgroup BLE_GATT_STATUS_CODES GATT Status Codes - * @{ */ -#define BLE_GATT_STATUS_SUCCESS 0x0000 /**< Success. */ -#define BLE_GATT_STATUS_UNKNOWN 0x0001 /**< Unknown or not applicable status. */ -#define BLE_GATT_STATUS_ATTERR_INVALID 0x0100 /**< ATT Error: Invalid Error Code. */ -#define BLE_GATT_STATUS_ATTERR_INVALID_HANDLE 0x0101 /**< ATT Error: Invalid Attribute Handle. */ -#define BLE_GATT_STATUS_ATTERR_READ_NOT_PERMITTED 0x0102 /**< ATT Error: Read not permitted. */ -#define BLE_GATT_STATUS_ATTERR_WRITE_NOT_PERMITTED 0x0103 /**< ATT Error: Write not permitted. */ -#define BLE_GATT_STATUS_ATTERR_INVALID_PDU 0x0104 /**< ATT Error: Used in ATT as Invalid PDU. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHENTICATION 0x0105 /**< ATT Error: Authenticated link required. */ -#define BLE_GATT_STATUS_ATTERR_REQUEST_NOT_SUPPORTED 0x0106 /**< ATT Error: Used in ATT as Request Not Supported. */ -#define BLE_GATT_STATUS_ATTERR_INVALID_OFFSET 0x0107 /**< ATT Error: Offset specified was past the end of the attribute. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHORIZATION 0x0108 /**< ATT Error: Used in ATT as Insufficient Authorization. */ -#define BLE_GATT_STATUS_ATTERR_PREPARE_QUEUE_FULL 0x0109 /**< ATT Error: Used in ATT as Prepare Queue Full. */ -#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_FOUND 0x010A /**< ATT Error: Used in ATT as Attribute not found. */ -#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_LONG 0x010B /**< ATT Error: Attribute cannot be read or written using read/write blob requests. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_ENC_KEY_SIZE 0x010C /**< ATT Error: Encryption key size used is insufficient. */ -#define BLE_GATT_STATUS_ATTERR_INVALID_ATT_VAL_LENGTH 0x010D /**< ATT Error: Invalid value size. */ -#define BLE_GATT_STATUS_ATTERR_UNLIKELY_ERROR 0x010E /**< ATT Error: Very unlikely error. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_ENCRYPTION 0x010F /**< ATT Error: Encrypted link required. */ -#define BLE_GATT_STATUS_ATTERR_UNSUPPORTED_GROUP_TYPE 0x0110 /**< ATT Error: Attribute type is not a supported grouping attribute. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_RESOURCES 0x0111 /**< ATT Error: Encrypted link required. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_BEGIN 0x0112 /**< ATT Error: Reserved for Future Use range #1 begin. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_END 0x017F /**< ATT Error: Reserved for Future Use range #1 end. */ -#define BLE_GATT_STATUS_ATTERR_APP_BEGIN 0x0180 /**< ATT Error: Application range begin. */ -#define BLE_GATT_STATUS_ATTERR_APP_END 0x019F /**< ATT Error: Application range end. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_BEGIN 0x01A0 /**< ATT Error: Reserved for Future Use range #2 begin. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_END 0x01DF /**< ATT Error: Reserved for Future Use range #2 end. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_BEGIN 0x01E0 /**< ATT Error: Reserved for Future Use range #3 begin. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_END 0x01FC /**< ATT Error: Reserved for Future Use range #3 end. */ -#define BLE_GATT_STATUS_ATTERR_CPS_CCCD_CONFIG_ERROR 0x01FD /**< ATT Common Profile and Service Error: Client Characteristic Configuration Descriptor improperly configured. */ -#define BLE_GATT_STATUS_ATTERR_CPS_PROC_ALR_IN_PROG 0x01FE /**< ATT Common Profile and Service Error: Procedure Already in Progress. */ -#define BLE_GATT_STATUS_ATTERR_CPS_OUT_OF_RANGE 0x01FF /**< ATT Common Profile and Service Error: Out Of Range. */ -/** @} */ - - -/** @defgroup BLE_GATT_CPF_FORMATS Characteristic Presentation Formats - * @note Found at http://developer.bluetooth.org/gatt/descriptors/Pages/DescriptorViewer.aspx?u=org.bluetooth.descriptor.gatt.characteristic_presentation_format.xml - * @{ */ -#define BLE_GATT_CPF_FORMAT_RFU 0x00 /**< Reserved For Future Use. */ -#define BLE_GATT_CPF_FORMAT_BOOLEAN 0x01 /**< Boolean. */ -#define BLE_GATT_CPF_FORMAT_2BIT 0x02 /**< Unsigned 2-bit integer. */ -#define BLE_GATT_CPF_FORMAT_NIBBLE 0x03 /**< Unsigned 4-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT8 0x04 /**< Unsigned 8-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT12 0x05 /**< Unsigned 12-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT16 0x06 /**< Unsigned 16-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT24 0x07 /**< Unsigned 24-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT32 0x08 /**< Unsigned 32-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT48 0x09 /**< Unsigned 48-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT64 0x0A /**< Unsigned 64-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT128 0x0B /**< Unsigned 128-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT8 0x0C /**< Signed 2-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT12 0x0D /**< Signed 12-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT16 0x0E /**< Signed 16-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT24 0x0F /**< Signed 24-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT32 0x10 /**< Signed 32-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT48 0x11 /**< Signed 48-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT64 0x12 /**< Signed 64-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT128 0x13 /**< Signed 128-bit integer. */ -#define BLE_GATT_CPF_FORMAT_FLOAT32 0x14 /**< IEEE-754 32-bit floating point. */ -#define BLE_GATT_CPF_FORMAT_FLOAT64 0x15 /**< IEEE-754 64-bit floating point. */ -#define BLE_GATT_CPF_FORMAT_SFLOAT 0x16 /**< IEEE-11073 16-bit SFLOAT. */ -#define BLE_GATT_CPF_FORMAT_FLOAT 0x17 /**< IEEE-11073 32-bit FLOAT. */ -#define BLE_GATT_CPF_FORMAT_DUINT16 0x18 /**< IEEE-20601 format. */ -#define BLE_GATT_CPF_FORMAT_UTF8S 0x19 /**< UTF-8 string. */ -#define BLE_GATT_CPF_FORMAT_UTF16S 0x1A /**< UTF-16 string. */ -#define BLE_GATT_CPF_FORMAT_STRUCT 0x1B /**< Opaque Structure. */ -/** @} */ - -/** @defgroup BLE_GATT_CPF_NAMESPACES GATT Bluetooth Namespaces - * @{ - */ -#define BLE_GATT_CPF_NAMESPACE_BTSIG 0x01 /**< Bluetooth SIG defined Namespace. */ -#define BLE_GATT_CPF_NAMESPACE_DESCRIPTION_UNKNOWN 0x0000 /**< Namespace Description Unknown. */ -/** @} */ - -/** @} */ - -/** @addtogroup BLE_GATT_STRUCTURES Structures - * @{ */ - -/** - * @brief BLE GATT connection configuration parameters, set with @ref sd_ble_cfg_set. - * - * @retval NRF_ERROR_INVALID_PARAM att_mtu is smaller than @ref BLE_GATT_ATT_MTU_DEFAULT. - */ -typedef struct -{ - uint16_t att_mtu; /**< Maximum size of ATT packet the SoftDevice can send or receive. - The default and minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. - @mscs - @mmsc{@ref BLE_GATTC_MTU_EXCHANGE} - @mmsc{@ref BLE_GATTS_MTU_EXCHANGE} - @endmscs - */ -} ble_gatt_conn_cfg_t; - -/**@brief GATT Characteristic Properties. */ -typedef struct -{ - /* Standard properties */ - uint8_t broadcast :1; /**< Broadcasting of the value permitted. */ - uint8_t read :1; /**< Reading the value permitted. */ - uint8_t write_wo_resp :1; /**< Writing the value with Write Command permitted. */ - uint8_t write :1; /**< Writing the value with Write Request permitted. */ - uint8_t notify :1; /**< Notification of the value permitted. */ - uint8_t indicate :1; /**< Indications of the value permitted. */ - uint8_t auth_signed_wr :1; /**< Writing the value with Signed Write Command permitted. */ -} ble_gatt_char_props_t; - -/**@brief GATT Characteristic Extended Properties. */ -typedef struct -{ - /* Extended properties */ - uint8_t reliable_wr :1; /**< Writing the value with Queued Write operations permitted. */ - uint8_t wr_aux :1; /**< Writing the Characteristic User Description descriptor permitted. */ -} ble_gatt_char_ext_props_t; - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // BLE_GATT_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/ble_gattc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/ble_gattc.h deleted file mode 100644 index 191f3a85ea6..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/ble_gattc.h +++ /dev/null @@ -1,702 +0,0 @@ -/* - * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_GATTC Generic Attribute Profile (GATT) Client - @{ - @brief Definitions and prototypes for the GATT Client interface. - */ - -#ifndef BLE_GATTC_H__ -#define BLE_GATTC_H__ - -#include "ble_gatt.h" -#include "ble_types.h" -#include "ble_ranges.h" -#include "nrf_svc.h" -#include "nrf_error.h" -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_GATTC_ENUMERATIONS Enumerations - * @{ */ - -/**@brief GATTC API SVC numbers. */ -enum BLE_GATTC_SVCS -{ - SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER = BLE_GATTC_SVC_BASE, /**< Primary Service Discovery. */ - SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, /**< Relationship Discovery. */ - SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, /**< Characteristic Discovery. */ - SD_BLE_GATTC_DESCRIPTORS_DISCOVER, /**< Characteristic Descriptor Discovery. */ - SD_BLE_GATTC_ATTR_INFO_DISCOVER, /**< Attribute Information Discovery. */ - SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, /**< Read Characteristic Value by UUID. */ - SD_BLE_GATTC_READ, /**< Generic read. */ - SD_BLE_GATTC_CHAR_VALUES_READ, /**< Read multiple Characteristic Values. */ - SD_BLE_GATTC_WRITE, /**< Generic write. */ - SD_BLE_GATTC_HV_CONFIRM, /**< Handle Value Confirmation. */ - SD_BLE_GATTC_EXCHANGE_MTU_REQUEST, /**< Exchange MTU Request. */ -}; - -/** - * @brief GATT Client Event IDs. - */ -enum BLE_GATTC_EVTS -{ - BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP = BLE_GATTC_EVT_BASE, /**< Primary Service Discovery Response event. \n See @ref ble_gattc_evt_prim_srvc_disc_rsp_t. */ - BLE_GATTC_EVT_REL_DISC_RSP, /**< Relationship Discovery Response event. \n See @ref ble_gattc_evt_rel_disc_rsp_t. */ - BLE_GATTC_EVT_CHAR_DISC_RSP, /**< Characteristic Discovery Response event. \n See @ref ble_gattc_evt_char_disc_rsp_t. */ - BLE_GATTC_EVT_DESC_DISC_RSP, /**< Descriptor Discovery Response event. \n See @ref ble_gattc_evt_desc_disc_rsp_t. */ - BLE_GATTC_EVT_ATTR_INFO_DISC_RSP, /**< Attribute Information Response event. \n See @ref ble_gattc_evt_attr_info_disc_rsp_t. */ - BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP, /**< Read By UUID Response event. \n See @ref ble_gattc_evt_char_val_by_uuid_read_rsp_t. */ - BLE_GATTC_EVT_READ_RSP, /**< Read Response event. \n See @ref ble_gattc_evt_read_rsp_t. */ - BLE_GATTC_EVT_CHAR_VALS_READ_RSP, /**< Read multiple Response event. \n See @ref ble_gattc_evt_char_vals_read_rsp_t. */ - BLE_GATTC_EVT_WRITE_RSP, /**< Write Response event. \n See @ref ble_gattc_evt_write_rsp_t. */ - BLE_GATTC_EVT_HVX, /**< Handle Value Notification or Indication event. \n Confirm indication with @ref sd_ble_gattc_hv_confirm. \n See @ref ble_gattc_evt_hvx_t. */ - BLE_GATTC_EVT_EXCHANGE_MTU_RSP, /**< Exchange MTU Response event. \n See @ref ble_gattc_evt_exchange_mtu_rsp_t. */ - BLE_GATTC_EVT_TIMEOUT, /**< Timeout event. \n See @ref ble_gattc_evt_timeout_t. */ - BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE /**< Write without Response transmission complete. \n See @ref ble_gattc_evt_write_cmd_tx_complete_t. */ -}; - -/** @} */ - -/** @addtogroup BLE_GATTC_DEFINES Defines - * @{ */ - -/** @defgroup BLE_ERRORS_GATTC SVC return values specific to GATTC - * @{ */ -#define BLE_ERROR_GATTC_PROC_NOT_PERMITTED (NRF_GATTC_ERR_BASE + 0x000) /**< Procedure not Permitted. */ -/** @} */ - -/** @defgroup BLE_GATTC_ATTR_INFO_FORMAT Attribute Information Formats - * @{ */ -#define BLE_GATTC_ATTR_INFO_FORMAT_16BIT 1 /**< 16-bit Attribute Information Format. */ -#define BLE_GATTC_ATTR_INFO_FORMAT_128BIT 2 /**< 128-bit Attribute Information Format. */ -/** @} */ - -/** @defgroup BLE_GATTC_DEFAULTS GATT Client defaults - * @{ */ -#define BLE_GATTC_WRITE_CMD_TX_QUEUE_SIZE_DEFAULT 1 /**< Default number of Write without Response that can be queued for transmission. */ -/** @} */ - -/** @} */ - -/** @addtogroup BLE_GATTC_STRUCTURES Structures - * @{ */ - -/** - * @brief BLE GATTC connection configuration parameters, set with @ref sd_ble_cfg_set. - */ -typedef struct -{ - uint8_t write_cmd_tx_queue_size; /**< The guaranteed minimum number of Write without Response that can be queued for transmission. - The default value is @ref BLE_GATTC_WRITE_CMD_TX_QUEUE_SIZE_DEFAULT */ -} ble_gattc_conn_cfg_t; - -/**@brief Operation Handle Range. */ -typedef struct -{ - uint16_t start_handle; /**< Start Handle. */ - uint16_t end_handle; /**< End Handle. */ -} ble_gattc_handle_range_t; - - -/**@brief GATT service. */ -typedef struct -{ - ble_uuid_t uuid; /**< Service UUID. */ - ble_gattc_handle_range_t handle_range; /**< Service Handle Range. */ -} ble_gattc_service_t; - - -/**@brief GATT include. */ -typedef struct -{ - uint16_t handle; /**< Include Handle. */ - ble_gattc_service_t included_srvc; /**< Handle of the included service. */ -} ble_gattc_include_t; - - -/**@brief GATT characteristic. */ -typedef struct -{ - ble_uuid_t uuid; /**< Characteristic UUID. */ - ble_gatt_char_props_t char_props; /**< Characteristic Properties. */ - uint8_t char_ext_props : 1; /**< Extended properties present. */ - uint16_t handle_decl; /**< Handle of the Characteristic Declaration. */ - uint16_t handle_value; /**< Handle of the Characteristic Value. */ -} ble_gattc_char_t; - - -/**@brief GATT descriptor. */ -typedef struct -{ - uint16_t handle; /**< Descriptor Handle. */ - ble_uuid_t uuid; /**< Descriptor UUID. */ -} ble_gattc_desc_t; - - -/**@brief Write Parameters. */ -typedef struct -{ - uint8_t write_op; /**< Write Operation to be performed, see @ref BLE_GATT_WRITE_OPS. */ - uint8_t flags; /**< Flags, see @ref BLE_GATT_EXEC_WRITE_FLAGS. */ - uint16_t handle; /**< Handle to the attribute to be written. */ - uint16_t offset; /**< Offset in bytes. @note For WRITE_CMD and WRITE_REQ, offset must be 0. */ - uint16_t len; /**< Length of data in bytes. */ - uint8_t const *p_value; /**< Pointer to the value data. */ -} ble_gattc_write_params_t; - -/**@brief Attribute Information for 16-bit Attribute UUID. */ -typedef struct -{ - uint16_t handle; /**< Attribute handle. */ - ble_uuid_t uuid; /**< 16-bit Attribute UUID. */ -} ble_gattc_attr_info16_t; - -/**@brief Attribute Information for 128-bit Attribute UUID. */ -typedef struct -{ - uint16_t handle; /**< Attribute handle. */ - ble_uuid128_t uuid; /**< 128-bit Attribute UUID. */ -} ble_gattc_attr_info128_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Service count. */ - ble_gattc_service_t services[1]; /**< Service data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_prim_srvc_disc_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_REL_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Include count. */ - ble_gattc_include_t includes[1]; /**< Include data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_rel_disc_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Characteristic count. */ - ble_gattc_char_t chars[1]; /**< Characteristic data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_char_disc_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_DESC_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Descriptor count. */ - ble_gattc_desc_t descs[1]; /**< Descriptor data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_desc_disc_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_ATTR_INFO_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Attribute count. */ - uint8_t format; /**< Attribute information format, see @ref BLE_GATTC_ATTR_INFO_FORMAT. */ - union { - ble_gattc_attr_info16_t attr_info16[1]; /**< Attribute information for 16-bit Attribute UUID. - @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ - ble_gattc_attr_info128_t attr_info128[1]; /**< Attribute information for 128-bit Attribute UUID. - @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ - } info; /**< Attribute information union. */ -} ble_gattc_evt_attr_info_disc_rsp_t; - -/**@brief GATT read by UUID handle value pair. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - uint8_t *p_value; /**< Pointer to the Attribute Value, length is available in @ref ble_gattc_evt_char_val_by_uuid_read_rsp_t::value_len. */ -} ble_gattc_handle_value_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP. */ -typedef struct -{ - uint16_t count; /**< Handle-Value Pair Count. */ - uint16_t value_len; /**< Length of the value in Handle-Value(s) list. */ - uint8_t handle_value[1]; /**< Handle-Value(s) list. To iterate through the list use @ref sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter. - @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_char_val_by_uuid_read_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_READ_RSP. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - uint16_t offset; /**< Offset of the attribute data. */ - uint16_t len; /**< Attribute data length. */ - uint8_t data[1]; /**< Attribute data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_read_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_VALS_READ_RSP. */ -typedef struct -{ - uint16_t len; /**< Concatenated Attribute values length. */ - uint8_t values[1]; /**< Attribute values. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_char_vals_read_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_WRITE_RSP. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - uint8_t write_op; /**< Type of write operation, see @ref BLE_GATT_WRITE_OPS. */ - uint16_t offset; /**< Data offset. */ - uint16_t len; /**< Data length. */ - uint8_t data[1]; /**< Data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_write_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_HVX. */ -typedef struct -{ - uint16_t handle; /**< Handle to which the HVx operation applies. */ - uint8_t type; /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */ - uint16_t len; /**< Attribute data length. */ - uint8_t data[1]; /**< Attribute data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_hvx_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP. */ -typedef struct -{ - uint16_t server_rx_mtu; /**< Server RX MTU size. */ -} ble_gattc_evt_exchange_mtu_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_TIMEOUT. */ -typedef struct -{ - uint8_t src; /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */ -} ble_gattc_evt_timeout_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE. */ -typedef struct -{ - uint8_t count; /**< Number of write without response transmissions completed. */ -} ble_gattc_evt_write_cmd_tx_complete_t; - -/**@brief GATTC event structure. */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle on which event occurred. */ - uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ - uint16_t error_handle; /**< In case of error: The handle causing the error. In all other cases @ref BLE_GATT_HANDLE_INVALID. */ - union - { - ble_gattc_evt_prim_srvc_disc_rsp_t prim_srvc_disc_rsp; /**< Primary Service Discovery Response Event Parameters. */ - ble_gattc_evt_rel_disc_rsp_t rel_disc_rsp; /**< Relationship Discovery Response Event Parameters. */ - ble_gattc_evt_char_disc_rsp_t char_disc_rsp; /**< Characteristic Discovery Response Event Parameters. */ - ble_gattc_evt_desc_disc_rsp_t desc_disc_rsp; /**< Descriptor Discovery Response Event Parameters. */ - ble_gattc_evt_char_val_by_uuid_read_rsp_t char_val_by_uuid_read_rsp; /**< Characteristic Value Read by UUID Response Event Parameters. */ - ble_gattc_evt_read_rsp_t read_rsp; /**< Read Response Event Parameters. */ - ble_gattc_evt_char_vals_read_rsp_t char_vals_read_rsp; /**< Characteristic Values Read Response Event Parameters. */ - ble_gattc_evt_write_rsp_t write_rsp; /**< Write Response Event Parameters. */ - ble_gattc_evt_hvx_t hvx; /**< Handle Value Notification/Indication Event Parameters. */ - ble_gattc_evt_exchange_mtu_rsp_t exchange_mtu_rsp; /**< Exchange MTU Response Event Parameters. */ - ble_gattc_evt_timeout_t timeout; /**< Timeout Event Parameters. */ - ble_gattc_evt_attr_info_disc_rsp_t attr_info_disc_rsp; /**< Attribute Information Discovery Event Parameters. */ - ble_gattc_evt_write_cmd_tx_complete_t write_cmd_tx_complete; /**< Write without Response transmission complete Event Parameters. */ - } params; /**< Event Parameters. @note Only valid if @ref gatt_status == @ref BLE_GATT_STATUS_SUCCESS. */ -} ble_gattc_evt_t; -/** @} */ - -/** @addtogroup BLE_GATTC_FUNCTIONS Functions - * @{ */ - -/**@brief Initiate or continue a GATT Primary Service Discovery procedure. - * - * @details This function initiates or resumes a Primary Service discovery procedure, starting from the supplied handle. - * If the last service has not been reached, this function must be called again with an updated start handle value to continue the search. - * - * @note If any of the discovered services have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with - * type @ref BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event. - * - * @events - * @event{@ref BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_PRIM_SRVC_DISC_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] start_handle Handle to start searching from. - * @param[in] p_srvc_uuid Pointer to the service UUID to be found. If it is NULL, all primary services will be returned. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Primary Service Discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER, uint32_t, sd_ble_gattc_primary_services_discover(uint16_t conn_handle, uint16_t start_handle, ble_uuid_t const *p_srvc_uuid)); - - -/**@brief Initiate or continue a GATT Relationship Discovery procedure. - * - * @details This function initiates or resumes the Find Included Services sub-procedure. If the last included service has not been reached, - * this must be called again with an updated handle range to continue the search. - * - * @events - * @event{@ref BLE_GATTC_EVT_REL_DISC_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_REL_DISC_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Relationship Discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, uint32_t, sd_ble_gattc_relationships_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); - - -/**@brief Initiate or continue a GATT Characteristic Discovery procedure. - * - * @details This function initiates or resumes a Characteristic discovery procedure. If the last Characteristic has not been reached, - * this must be called again with an updated handle range to continue the discovery. - * - * @note If any of the discovered characteristics have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with - * type @ref BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event. - * - * @events - * @event{@ref BLE_GATTC_EVT_CHAR_DISC_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_CHAR_DISC_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Characteristic Discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, uint32_t, sd_ble_gattc_characteristics_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); - - -/**@brief Initiate or continue a GATT Characteristic Descriptor Discovery procedure. - * - * @details This function initiates or resumes a Characteristic Descriptor discovery procedure. If the last Descriptor has not been reached, - * this must be called again with an updated handle range to continue the discovery. - * - * @events - * @event{@ref BLE_GATTC_EVT_DESC_DISC_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_DESC_DISC_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handle_range A pointer to the range of handles of the Characteristic to perform this procedure on. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Descriptor Discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_DESCRIPTORS_DISCOVER, uint32_t, sd_ble_gattc_descriptors_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); - - -/**@brief Initiate or continue a GATT Read using Characteristic UUID procedure. - * - * @details This function initiates or resumes a Read using Characteristic UUID procedure. If the last Characteristic has not been reached, - * this must be called again with an updated handle range to continue the discovery. - * - * @events - * @event{@ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_READ_UUID_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_uuid Pointer to a Characteristic value UUID to read. - * @param[in] p_handle_range A pointer to the range of handles to perform this procedure on. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Read using Characteristic UUID procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, uint32_t, sd_ble_gattc_char_value_by_uuid_read(uint16_t conn_handle, ble_uuid_t const *p_uuid, ble_gattc_handle_range_t const *p_handle_range)); - - -/**@brief Initiate or continue a GATT Read (Long) Characteristic or Descriptor procedure. - * - * @details This function initiates or resumes a GATT Read (Long) Characteristic or Descriptor procedure. If the Characteristic or Descriptor - * to be read is longer than ATT_MTU - 1, this function must be called multiple times with appropriate offset to read the - * complete value. - * - * @events - * @event{@ref BLE_GATTC_EVT_READ_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_VALUE_READ_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] handle The handle of the attribute to be read. - * @param[in] offset Offset into the attribute value to be read. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Read (Long) procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_READ, uint32_t, sd_ble_gattc_read(uint16_t conn_handle, uint16_t handle, uint16_t offset)); - - -/**@brief Initiate a GATT Read Multiple Characteristic Values procedure. - * - * @details This function initiates a GATT Read Multiple Characteristic Values procedure. - * - * @events - * @event{@ref BLE_GATTC_EVT_CHAR_VALS_READ_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_READ_MULT_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handles A pointer to the handle(s) of the attribute(s) to be read. - * @param[in] handle_count The number of handles in p_handles. - * - * @retval ::NRF_SUCCESS Successfully started the Read Multiple Characteristic Values procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_CHAR_VALUES_READ, uint32_t, sd_ble_gattc_char_values_read(uint16_t conn_handle, uint16_t const *p_handles, uint16_t handle_count)); - - -/**@brief Perform a Write (Characteristic Value or Descriptor, with or without response, signed or not, long or reliable) procedure. - * - * @details This function can perform all write procedures described in GATT. - * - * @note Only one write with response procedure can be ongoing per connection at a time. - * If the application tries to write with response while another write with response procedure is ongoing, - * the function call will return @ref NRF_ERROR_BUSY. - * A @ref BLE_GATTC_EVT_WRITE_RSP event will be issued as soon as the write response arrives from the peer. - * - * @note The number of Write without Response that can be queued is configured by @ref ble_gattc_conn_cfg_t::write_cmd_tx_queue_size - * When the queue is full, the function call will return @ref NRF_ERROR_RESOURCES. - * A @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event will be issued as soon as the transmission of the write without response is complete. - * - * @note The application can keep track of the available queue element count for writes without responses by following the procedure below: - * - Store initial queue element count in a variable. - * - Decrement the variable, which stores the currently available queue element count, by one when a call to this function returns @ref NRF_SUCCESS. - * - Increment the variable, which stores the current available queue element count, by the count variable in @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event. - * - * @events - * @event{@ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE, Write without response transmission complete.} - * @event{@ref BLE_GATTC_EVT_WRITE_RSP, Write response received from the peer.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_VALUE_WRITE_WITHOUT_RESP_MSC} - * @mmsc{@ref BLE_GATTC_VALUE_WRITE_MSC} - * @mmsc{@ref BLE_GATTC_VALUE_LONG_WRITE_MSC} - * @mmsc{@ref BLE_GATTC_VALUE_RELIABLE_WRITE_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_write_params A pointer to a write parameters structure. - * - * @retval ::NRF_SUCCESS Successfully started the Write procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. - * @retval ::NRF_ERROR_BUSY For write with response, procedure already in progress. Wait for a @ref BLE_GATTC_EVT_WRITE_RSP event and retry. - * @retval ::NRF_ERROR_RESOURCES Too many writes without responses queued. - * Wait for a @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event and retry. - */ -SVCALL(SD_BLE_GATTC_WRITE, uint32_t, sd_ble_gattc_write(uint16_t conn_handle, ble_gattc_write_params_t const *p_write_params)); - - -/**@brief Send a Handle Value Confirmation to the GATT Server. - * - * @mscs - * @mmsc{@ref BLE_GATTC_HVI_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] handle The handle of the attribute in the indication. - * - * @retval ::NRF_SUCCESS Successfully queued the Handle Value Confirmation for transmission. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no Indication pending to be confirmed. - * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle. - */ -SVCALL(SD_BLE_GATTC_HV_CONFIRM, uint32_t, sd_ble_gattc_hv_confirm(uint16_t conn_handle, uint16_t handle)); - -/**@brief Discovers information about a range of attributes on a GATT server. - * - * @events - * @event{@ref BLE_GATTC_EVT_ATTR_INFO_DISC_RSP, Generated when information about a range of attributes has been received.} - * @endevents - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handle_range The range of handles to request information about. - * - * @retval ::NRF_SUCCESS Successfully started an attribute information discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid connection state - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_ATTR_INFO_DISCOVER, uint32_t, sd_ble_gattc_attr_info_discover(uint16_t conn_handle, ble_gattc_handle_range_t const * p_handle_range)); - -/**@brief Start an ATT_MTU exchange by sending an Exchange MTU Request to the server. - * - * @details The SoftDevice sets ATT_MTU to the minimum of: - * - The Client RX MTU value, and - * - The Server RX MTU value from @ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP. - * - * However, the SoftDevice never sets ATT_MTU lower than @ref BLE_GATT_ATT_MTU_DEFAULT. - * - * @events - * @event{@ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_MTU_EXCHANGE} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] client_rx_mtu Client RX MTU size. - * - The minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. - * - The maximum value is @ref ble_gatt_conn_cfg_t::att_mtu in the connection configuration - used for this connection. - * - The value must be equal to Server RX MTU size given in @ref sd_ble_gatts_exchange_mtu_reply - * if an ATT_MTU exchange has already been performed in the other direction. - * - * @retval ::NRF_SUCCESS Successfully sent request to the server. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid connection state or an ATT_MTU exchange was already requested once. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid Client RX MTU size supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_EXCHANGE_MTU_REQUEST, uint32_t, sd_ble_gattc_exchange_mtu_request(uint16_t conn_handle, uint16_t client_rx_mtu)); - -/**@brief Iterate through Handle-Value(s) list in @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP event. - * - * @param[in] p_gattc_evt Pointer to event buffer containing @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP event. - * @note If the buffer contains different event, behavior is undefined. - * @param[in,out] p_iter Iterator, points to @ref ble_gattc_handle_value_t structure that will be filled in with - * the next Handle-Value pair in each iteration. If the function returns other than - * @ref NRF_SUCCESS, it will not be changed. - * - To start iteration, initialize the structure to zero. - * - To continue, pass the value from previous iteration. - * - * \code - * ble_gattc_handle_value_t iter; - * memset(&iter, 0, sizeof(ble_gattc_handle_value_t)); - * while (sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(&ble_evt.evt.gattc_evt, &iter) == NRF_SUCCESS) - * { - * app_handle = iter.handle; - * memcpy(app_value, iter.p_value, ble_evt.evt.gattc_evt.params.char_val_by_uuid_read_rsp.value_len); - * } - * \endcode - * - * @retval ::NRF_SUCCESS Successfully retrieved the next Handle-Value pair. - * @retval ::NRF_ERROR_NOT_FOUND No more Handle-Value pairs available in the list. - */ -__STATIC_INLINE uint32_t sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(ble_gattc_evt_t *p_gattc_evt, ble_gattc_handle_value_t *p_iter); - -/** @} */ - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE uint32_t sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(ble_gattc_evt_t *p_gattc_evt, ble_gattc_handle_value_t *p_iter) -{ - uint32_t value_len = p_gattc_evt->params.char_val_by_uuid_read_rsp.value_len; - uint8_t *p_first = p_gattc_evt->params.char_val_by_uuid_read_rsp.handle_value; - uint8_t *p_next = p_iter->p_value ? p_iter->p_value + value_len : p_first; - - if ((p_next - p_first) / (sizeof(uint16_t) + value_len) < p_gattc_evt->params.char_val_by_uuid_read_rsp.count) - { - p_iter->handle = (uint16_t)p_next[1] << 8 | p_next[0]; - p_iter->p_value = p_next + sizeof(uint16_t); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_NOT_FOUND; - } -} - -#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ - -#ifdef __cplusplus -} -#endif -#endif /* BLE_GATTC_H__ */ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/ble_gatts.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/ble_gatts.h deleted file mode 100644 index 5e8615c05d0..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/ble_gatts.h +++ /dev/null @@ -1,835 +0,0 @@ -/* - * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_GATTS Generic Attribute Profile (GATT) Server - @{ - @brief Definitions and prototypes for the GATTS interface. - */ - -#ifndef BLE_GATTS_H__ -#define BLE_GATTS_H__ - -#include "ble_types.h" -#include "ble_ranges.h" -#include "ble_l2cap.h" -#include "ble_gap.h" -#include "ble_gatt.h" -#include "nrf_svc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_GATTS_ENUMERATIONS Enumerations - * @{ */ - -/** - * @brief GATTS API SVC numbers. - */ -enum BLE_GATTS_SVCS -{ - SD_BLE_GATTS_SERVICE_ADD = BLE_GATTS_SVC_BASE, /**< Add a service. */ - SD_BLE_GATTS_INCLUDE_ADD, /**< Add an included service. */ - SD_BLE_GATTS_CHARACTERISTIC_ADD, /**< Add a characteristic. */ - SD_BLE_GATTS_DESCRIPTOR_ADD, /**< Add a generic attribute. */ - SD_BLE_GATTS_VALUE_SET, /**< Set an attribute value. */ - SD_BLE_GATTS_VALUE_GET, /**< Get an attribute value. */ - SD_BLE_GATTS_HVX, /**< Handle Value Notification or Indication. */ - SD_BLE_GATTS_SERVICE_CHANGED, /**< Perform a Service Changed Indication to one or more peers. */ - SD_BLE_GATTS_RW_AUTHORIZE_REPLY, /**< Reply to an authorization request for a read or write operation on one or more attributes. */ - SD_BLE_GATTS_SYS_ATTR_SET, /**< Set the persistent system attributes for a connection. */ - SD_BLE_GATTS_SYS_ATTR_GET, /**< Retrieve the persistent system attributes. */ - SD_BLE_GATTS_INITIAL_USER_HANDLE_GET, /**< Retrieve the first valid user handle. */ - SD_BLE_GATTS_ATTR_GET, /**< Retrieve the UUID and/or metadata of an attribute. */ - SD_BLE_GATTS_EXCHANGE_MTU_REPLY /**< Reply to Exchange MTU Request. */ -}; - -/** - * @brief GATT Server Event IDs. - */ -enum BLE_GATTS_EVTS -{ - BLE_GATTS_EVT_WRITE = BLE_GATTS_EVT_BASE, /**< Write operation performed. \n See @ref ble_gatts_evt_write_t. */ - BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST, /**< Read/Write Authorization request. \n Reply with @ref sd_ble_gatts_rw_authorize_reply. \n See @ref ble_gatts_evt_rw_authorize_request_t. */ - BLE_GATTS_EVT_SYS_ATTR_MISSING, /**< A persistent system attribute access is pending. \n Respond with @ref sd_ble_gatts_sys_attr_set. \n See @ref ble_gatts_evt_sys_attr_missing_t. */ - BLE_GATTS_EVT_HVC, /**< Handle Value Confirmation. \n See @ref ble_gatts_evt_hvc_t. */ - BLE_GATTS_EVT_SC_CONFIRM, /**< Service Changed Confirmation. \n No additional event structure applies. */ - BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST, /**< Exchange MTU Request. \n Reply with @ref sd_ble_gatts_exchange_mtu_reply. \n See @ref ble_gatts_evt_exchange_mtu_request_t. */ - BLE_GATTS_EVT_TIMEOUT, /**< Peer failed to respond to an ATT request in time. \n See @ref ble_gatts_evt_timeout_t. */ - BLE_GATTS_EVT_HVN_TX_COMPLETE /**< Handle Value Notification transmission complete. \n See @ref ble_gatts_evt_hvn_tx_complete_t. */ -}; - -/**@brief GATTS Configuration IDs. - * - * IDs that uniquely identify a GATTS configuration. - */ -enum BLE_GATTS_CFGS -{ - BLE_GATTS_CFG_SERVICE_CHANGED = BLE_GATTS_CFG_BASE, /**< Service changed configuration. */ - BLE_GATTS_CFG_ATTR_TAB_SIZE, /**< Attribute table size configuration. */ -}; - -/** @} */ - -/** @addtogroup BLE_GATTS_DEFINES Defines - * @{ */ - -/** @defgroup BLE_ERRORS_GATTS SVC return values specific to GATTS - * @{ */ -#define BLE_ERROR_GATTS_INVALID_ATTR_TYPE (NRF_GATTS_ERR_BASE + 0x000) /**< Invalid attribute type. */ -#define BLE_ERROR_GATTS_SYS_ATTR_MISSING (NRF_GATTS_ERR_BASE + 0x001) /**< System Attributes missing. */ -/** @} */ - -/** @defgroup BLE_GATTS_ATTR_LENS_MAX Maximum attribute lengths - * @{ */ -#define BLE_GATTS_FIX_ATTR_LEN_MAX (510) /**< Maximum length for fixed length Attribute Values. */ -#define BLE_GATTS_VAR_ATTR_LEN_MAX (512) /**< Maximum length for variable length Attribute Values. */ -/** @} */ - -/** @defgroup BLE_GATTS_SRVC_TYPES GATT Server Service Types - * @{ */ -#define BLE_GATTS_SRVC_TYPE_INVALID 0x00 /**< Invalid Service Type. */ -#define BLE_GATTS_SRVC_TYPE_PRIMARY 0x01 /**< Primary Service. */ -#define BLE_GATTS_SRVC_TYPE_SECONDARY 0x02 /**< Secondary Type. */ -/** @} */ - - -/** @defgroup BLE_GATTS_ATTR_TYPES GATT Server Attribute Types - * @{ */ -#define BLE_GATTS_ATTR_TYPE_INVALID 0x00 /**< Invalid Attribute Type. */ -#define BLE_GATTS_ATTR_TYPE_PRIM_SRVC_DECL 0x01 /**< Primary Service Declaration. */ -#define BLE_GATTS_ATTR_TYPE_SEC_SRVC_DECL 0x02 /**< Secondary Service Declaration. */ -#define BLE_GATTS_ATTR_TYPE_INC_DECL 0x03 /**< Include Declaration. */ -#define BLE_GATTS_ATTR_TYPE_CHAR_DECL 0x04 /**< Characteristic Declaration. */ -#define BLE_GATTS_ATTR_TYPE_CHAR_VAL 0x05 /**< Characteristic Value. */ -#define BLE_GATTS_ATTR_TYPE_DESC 0x06 /**< Descriptor. */ -#define BLE_GATTS_ATTR_TYPE_OTHER 0x07 /**< Other, non-GATT specific type. */ -/** @} */ - - -/** @defgroup BLE_GATTS_OPS GATT Server Operations - * @{ */ -#define BLE_GATTS_OP_INVALID 0x00 /**< Invalid Operation. */ -#define BLE_GATTS_OP_WRITE_REQ 0x01 /**< Write Request. */ -#define BLE_GATTS_OP_WRITE_CMD 0x02 /**< Write Command. */ -#define BLE_GATTS_OP_SIGN_WRITE_CMD 0x03 /**< Signed Write Command. */ -#define BLE_GATTS_OP_PREP_WRITE_REQ 0x04 /**< Prepare Write Request. */ -#define BLE_GATTS_OP_EXEC_WRITE_REQ_CANCEL 0x05 /**< Execute Write Request: Cancel all prepared writes. */ -#define BLE_GATTS_OP_EXEC_WRITE_REQ_NOW 0x06 /**< Execute Write Request: Immediately execute all prepared writes. */ -/** @} */ - -/** @defgroup BLE_GATTS_VLOCS GATT Value Locations - * @{ */ -#define BLE_GATTS_VLOC_INVALID 0x00 /**< Invalid Location. */ -#define BLE_GATTS_VLOC_STACK 0x01 /**< Attribute Value is located in stack memory, no user memory is required. */ -#define BLE_GATTS_VLOC_USER 0x02 /**< Attribute Value is located in user memory. This requires the user to maintain a valid buffer through the lifetime of the attribute, since the stack - will read and write directly to the memory using the pointer provided in the APIs. There are no alignment requirements for the buffer. */ -/** @} */ - -/** @defgroup BLE_GATTS_AUTHORIZE_TYPES GATT Server Authorization Types - * @{ */ -#define BLE_GATTS_AUTHORIZE_TYPE_INVALID 0x00 /**< Invalid Type. */ -#define BLE_GATTS_AUTHORIZE_TYPE_READ 0x01 /**< Authorize a Read Operation. */ -#define BLE_GATTS_AUTHORIZE_TYPE_WRITE 0x02 /**< Authorize a Write Request Operation. */ -/** @} */ - -/** @defgroup BLE_GATTS_SYS_ATTR_FLAGS System Attribute Flags - * @{ */ -#define BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS (1 << 0) /**< Restrict system attributes to system services only. */ -#define BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS (1 << 1) /**< Restrict system attributes to user services only. */ -/** @} */ - -/** @defgroup BLE_GATTS_SERVICE_CHANGED Service Changed Inclusion Values - * @{ - */ -#define BLE_GATTS_SERVICE_CHANGED_DEFAULT (1) /**< Default is to include the Service Changed characteristic in the Attribute Table. */ -/** @} */ - -/** @defgroup BLE_GATTS_ATTR_TAB_SIZE Attribute Table size - * @{ - */ -#define BLE_GATTS_ATTR_TAB_SIZE_MIN (248) /**< Minimum Attribute Table size */ -#define BLE_GATTS_ATTR_TAB_SIZE_DEFAULT (1408) /**< Default Attribute Table size. */ -/** @} */ - -/** @defgroup BLE_GATTS_DEFAULTS GATT Server defaults - * @{ - */ -#define BLE_GATTS_HVN_TX_QUEUE_SIZE_DEFAULT 1 /**< Default number of Handle Value Notifications that can be queued for transmission. */ -/** @} */ - -/** @} */ - -/** @addtogroup BLE_GATTS_STRUCTURES Structures - * @{ */ - -/** - * @brief BLE GATTS connection configuration parameters, set with @ref sd_ble_cfg_set. - */ -typedef struct -{ - uint8_t hvn_tx_queue_size; /**< Minimum guaranteed number of Handle Value Notifications that can be queued for transmission. - The default value is @ref BLE_GATTS_HVN_TX_QUEUE_SIZE_DEFAULT */ -} ble_gatts_conn_cfg_t; - -/**@brief Attribute metadata. */ -typedef struct -{ - ble_gap_conn_sec_mode_t read_perm; /**< Read permissions. */ - ble_gap_conn_sec_mode_t write_perm; /**< Write permissions. */ - uint8_t vlen :1; /**< Variable length attribute. */ - uint8_t vloc :2; /**< Value location, see @ref BLE_GATTS_VLOCS.*/ - uint8_t rd_auth :1; /**< Read authorization and value will be requested from the application on every read operation. */ - uint8_t wr_auth :1; /**< Write authorization will be requested from the application on every Write Request operation (but not Write Command). */ -} ble_gatts_attr_md_t; - - -/**@brief GATT Attribute. */ -typedef struct -{ - ble_uuid_t const *p_uuid; /**< Pointer to the attribute UUID. */ - ble_gatts_attr_md_t const *p_attr_md; /**< Pointer to the attribute metadata structure. */ - uint16_t init_len; /**< Initial attribute value length in bytes. */ - uint16_t init_offs; /**< Initial attribute value offset in bytes. If different from zero, the first init_offs bytes of the attribute value will be left uninitialized. */ - uint16_t max_len; /**< Maximum attribute value length in bytes, see @ref BLE_GATTS_ATTR_LENS_MAX for maximum values. */ - uint8_t *p_value; /**< Pointer to the attribute data. Please note that if the @ref BLE_GATTS_VLOC_USER value location is selected in the attribute metadata, this will have to point to a buffer - that remains valid through the lifetime of the attribute. This excludes usage of automatic variables that may go out of scope or any other temporary location. - The stack may access that memory directly without the application's knowledge. For writable characteristics, this value must not be a location in flash memory.*/ -} ble_gatts_attr_t; - -/**@brief GATT Attribute Value. */ -typedef struct -{ - uint16_t len; /**< Length in bytes to be written or read. Length in bytes written or read after successful return.*/ - uint16_t offset; /**< Attribute value offset. */ - uint8_t *p_value; /**< Pointer to where value is stored or will be stored. - If value is stored in user memory, only the attribute length is updated when p_value == NULL. - Set to NULL when reading to obtain the complete length of the attribute value */ -} ble_gatts_value_t; - - -/**@brief GATT Characteristic Presentation Format. */ -typedef struct -{ - uint8_t format; /**< Format of the value, see @ref BLE_GATT_CPF_FORMATS. */ - int8_t exponent; /**< Exponent for integer data types. */ - uint16_t unit; /**< Unit from Bluetooth Assigned Numbers. */ - uint8_t name_space; /**< Namespace from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */ - uint16_t desc; /**< Namespace description from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */ -} ble_gatts_char_pf_t; - - -/**@brief GATT Characteristic metadata. */ -typedef struct -{ - ble_gatt_char_props_t char_props; /**< Characteristic Properties. */ - ble_gatt_char_ext_props_t char_ext_props; /**< Characteristic Extended Properties. */ - uint8_t const *p_char_user_desc; /**< Pointer to a UTF-8 encoded string (non-NULL terminated), NULL if the descriptor is not required. */ - uint16_t char_user_desc_max_size; /**< The maximum size in bytes of the user description descriptor. */ - uint16_t char_user_desc_size; /**< The size of the user description, must be smaller or equal to char_user_desc_max_size. */ - ble_gatts_char_pf_t const *p_char_pf; /**< Pointer to a presentation format structure or NULL if the CPF descriptor is not required. */ - ble_gatts_attr_md_t const *p_user_desc_md; /**< Attribute metadata for the User Description descriptor, or NULL for default values. */ - ble_gatts_attr_md_t const *p_cccd_md; /**< Attribute metadata for the Client Characteristic Configuration Descriptor, or NULL for default values. */ - ble_gatts_attr_md_t const *p_sccd_md; /**< Attribute metadata for the Server Characteristic Configuration Descriptor, or NULL for default values. */ -} ble_gatts_char_md_t; - - -/**@brief GATT Characteristic Definition Handles. */ -typedef struct -{ - uint16_t value_handle; /**< Handle to the characteristic value. */ - uint16_t user_desc_handle; /**< Handle to the User Description descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ - uint16_t cccd_handle; /**< Handle to the Client Characteristic Configuration Descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ - uint16_t sccd_handle; /**< Handle to the Server Characteristic Configuration Descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ -} ble_gatts_char_handles_t; - - -/**@brief GATT HVx parameters. */ -typedef struct -{ - uint16_t handle; /**< Characteristic Value Handle. */ - uint8_t type; /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */ - uint16_t offset; /**< Offset within the attribute value. */ - uint16_t *p_len; /**< Length in bytes to be written, length in bytes written after successful return. */ - uint8_t const *p_data; /**< Actual data content, use NULL to use the current attribute value. */ -} ble_gatts_hvx_params_t; - -/**@brief GATT Authorization parameters. */ -typedef struct -{ - uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ - uint8_t update : 1; /**< If set, data supplied in p_data will be used to update the attribute value. - Please note that for @ref BLE_GATTS_AUTHORIZE_TYPE_WRITE operations this bit must always be set, - as the data to be written needs to be stored and later provided by the application. */ - uint16_t offset; /**< Offset of the attribute value being updated. */ - uint16_t len; /**< Length in bytes of the value in p_data pointer, see @ref BLE_GATTS_ATTR_LENS_MAX. */ - uint8_t const *p_data; /**< Pointer to new value used to update the attribute value. */ -} ble_gatts_authorize_params_t; - -/**@brief GATT Read or Write Authorize Reply parameters. */ -typedef struct -{ - uint8_t type; /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */ - union { - ble_gatts_authorize_params_t read; /**< Read authorization parameters. */ - ble_gatts_authorize_params_t write; /**< Write authorization parameters. */ - } params; /**< Reply Parameters. */ -} ble_gatts_rw_authorize_reply_params_t; - -/**@brief Service Changed Inclusion configuration parameters, set with @ref sd_ble_cfg_set. */ -typedef struct -{ - uint8_t service_changed : 1; /**< If 1, include the Service Changed characteristic in the Attribute Table. Default is @ref BLE_GATTS_SERVICE_CHANGED_DEFAULT. */ -} ble_gatts_cfg_service_changed_t; - -/**@brief Attribute table size configuration parameters, set with @ref sd_ble_cfg_set. - * - * @retval ::NRF_ERROR_INVALID_LENGTH One or more of the following is true: - * - The specified Attribute Table size is too small. - * The minimum acceptable size is defined by @ref BLE_GATTS_ATTR_TAB_SIZE_MIN. - * - The specified Attribute Table size is not a multiple of 4. - */ -typedef struct -{ - uint32_t attr_tab_size; /**< Attribute table size. Default is @ref BLE_GATTS_ATTR_TAB_SIZE_DEFAULT, minimum is @ref BLE_GATTS_ATTR_TAB_SIZE_MIN. */ -} ble_gatts_cfg_attr_tab_size_t; - -/**@brief Config structure for GATTS configurations. */ -typedef union -{ - ble_gatts_cfg_service_changed_t service_changed; /**< Include service changed characteristic, cfg_id is @ref BLE_GATTS_CFG_SERVICE_CHANGED. */ - ble_gatts_cfg_attr_tab_size_t attr_tab_size; /**< Attribute table size, cfg_id is @ref BLE_GATTS_CFG_ATTR_TAB_SIZE. */ -} ble_gatts_cfg_t; - - -/**@brief Event structure for @ref BLE_GATTS_EVT_WRITE. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - ble_uuid_t uuid; /**< Attribute UUID. */ - uint8_t op; /**< Type of write operation, see @ref BLE_GATTS_OPS. */ - uint8_t auth_required; /**< Writing operation deferred due to authorization requirement. Application may use @ref sd_ble_gatts_value_set to finalize the writing operation. */ - uint16_t offset; /**< Offset for the write operation. */ - uint16_t len; /**< Length of the received data. */ - uint8_t data[1]; /**< Received data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gatts_evt_write_t; - -/**@brief Event substructure for authorized read requests, see @ref ble_gatts_evt_rw_authorize_request_t. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - ble_uuid_t uuid; /**< Attribute UUID. */ - uint16_t offset; /**< Offset for the read operation. */ -} ble_gatts_evt_read_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST. */ -typedef struct -{ - uint8_t type; /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */ - union { - ble_gatts_evt_read_t read; /**< Attribute Read Parameters. */ - ble_gatts_evt_write_t write; /**< Attribute Write Parameters. */ - } request; /**< Request Parameters. */ -} ble_gatts_evt_rw_authorize_request_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_SYS_ATTR_MISSING. */ -typedef struct -{ - uint8_t hint; /**< Hint (currently unused). */ -} ble_gatts_evt_sys_attr_missing_t; - - -/**@brief Event structure for @ref BLE_GATTS_EVT_HVC. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ -} ble_gatts_evt_hvc_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST. */ -typedef struct -{ - uint16_t client_rx_mtu; /**< Client RX MTU size. */ -} ble_gatts_evt_exchange_mtu_request_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_TIMEOUT. */ -typedef struct -{ - uint8_t src; /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */ -} ble_gatts_evt_timeout_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_HVN_TX_COMPLETE. */ -typedef struct -{ - uint8_t count; /**< Number of notification transmissions completed. */ -} ble_gatts_evt_hvn_tx_complete_t; - -/**@brief GATTS event structure. */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle on which the event occurred. */ - union - { - ble_gatts_evt_write_t write; /**< Write Event Parameters. */ - ble_gatts_evt_rw_authorize_request_t authorize_request; /**< Read or Write Authorize Request Parameters. */ - ble_gatts_evt_sys_attr_missing_t sys_attr_missing; /**< System attributes missing. */ - ble_gatts_evt_hvc_t hvc; /**< Handle Value Confirmation Event Parameters. */ - ble_gatts_evt_exchange_mtu_request_t exchange_mtu_request; /**< Exchange MTU Request Event Parameters. */ - ble_gatts_evt_timeout_t timeout; /**< Timeout Event. */ - ble_gatts_evt_hvn_tx_complete_t hvn_tx_complete; /**< Handle Value Notification transmission complete Event Parameters. */ - } params; /**< Event Parameters. */ -} ble_gatts_evt_t; - -/** @} */ - -/** @addtogroup BLE_GATTS_FUNCTIONS Functions - * @{ */ - -/**@brief Add a service declaration to the Attribute Table. - * - * @note Secondary Services are only relevant in the context of the entity that references them, it is therefore forbidden to - * add a secondary service declaration that is not referenced by another service later in the Attribute Table. - * - * @mscs - * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} - * @endmscs - * - * @param[in] type Toggles between primary and secondary services, see @ref BLE_GATTS_SRVC_TYPES. - * @param[in] p_uuid Pointer to service UUID. - * @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored. - * - * @retval ::NRF_SUCCESS Successfully added a service declaration. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, Vendor Specific UUIDs need to be present in the table. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - */ -SVCALL(SD_BLE_GATTS_SERVICE_ADD, uint32_t, sd_ble_gatts_service_add(uint8_t type, ble_uuid_t const *p_uuid, uint16_t *p_handle)); - - -/**@brief Add an include declaration to the Attribute Table. - * - * @note It is currently only possible to add an include declaration to the last added service (i.e. only sequential population is supported at this time). - * - * @note The included service must already be present in the Attribute Table prior to this call. - * - * @mscs - * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} - * @endmscs - * - * @param[in] service_handle Handle of the service where the included service is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. - * @param[in] inc_srvc_handle Handle of the included service. - * @param[out] p_include_handle Pointer to a 16-bit word where the assigned handle will be stored. - * - * @retval ::NRF_SUCCESS Successfully added an include declaration. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, handle values need to match previously added services. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_NOT_SUPPORTED Feature is not supported, service_handle must be that of the last added service. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, self inclusions are not allowed. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. - */ -SVCALL(SD_BLE_GATTS_INCLUDE_ADD, uint32_t, sd_ble_gatts_include_add(uint16_t service_handle, uint16_t inc_srvc_handle, uint16_t *p_include_handle)); - - -/**@brief Add a characteristic declaration, a characteristic value declaration and optional characteristic descriptor declarations to the Attribute Table. - * - * @note It is currently only possible to add a characteristic to the last added service (i.e. only sequential population is supported at this time). - * - * @note Several restrictions apply to the parameters, such as matching permissions between the user description descriptor and the writable auxiliaries bits, - * readable (no security) and writable (selectable) CCCDs and SCCDs and valid presentation format values. - * - * @note If no metadata is provided for the optional descriptors, their permissions will be derived from the characteristic permissions. - * - * @mscs - * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} - * @endmscs - * - * @param[in] service_handle Handle of the service where the characteristic is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. - * @param[in] p_char_md Characteristic metadata. - * @param[in] p_attr_char_value Pointer to the attribute structure corresponding to the characteristic value. - * @param[out] p_handles Pointer to the structure where the assigned handles will be stored. - * - * @retval ::NRF_SUCCESS Successfully added a characteristic. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, service handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a service context is required. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. - */ -SVCALL(SD_BLE_GATTS_CHARACTERISTIC_ADD, uint32_t, sd_ble_gatts_characteristic_add(uint16_t service_handle, ble_gatts_char_md_t const *p_char_md, ble_gatts_attr_t const *p_attr_char_value, ble_gatts_char_handles_t *p_handles)); - - -/**@brief Add a descriptor to the Attribute Table. - * - * @note It is currently only possible to add a descriptor to the last added characteristic (i.e. only sequential population is supported at this time). - * - * @mscs - * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} - * @endmscs - * - * @param[in] char_handle Handle of the characteristic where the descriptor is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. - * @param[in] p_attr Pointer to the attribute structure. - * @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored. - * - * @retval ::NRF_SUCCESS Successfully added a descriptor. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, characteristic handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a characteristic context is required. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. - */ -SVCALL(SD_BLE_GATTS_DESCRIPTOR_ADD, uint32_t, sd_ble_gatts_descriptor_add(uint16_t char_handle, ble_gatts_attr_t const *p_attr, uint16_t *p_handle)); - -/**@brief Set the value of a given attribute. - * - * @note Values other than system attributes can be set at any time, regardless of whether any active connections exist. - * - * @mscs - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. Ignored if the value does not belong to a system attribute. - * @param[in] handle Attribute handle. - * @param[in,out] p_value Attribute value information. - * - * @retval ::NRF_SUCCESS Successfully set the value of the attribute. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden handle supplied, certain attributes are not modifiable by the application. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied on a system attribute. - */ -SVCALL(SD_BLE_GATTS_VALUE_SET, uint32_t, sd_ble_gatts_value_set(uint16_t conn_handle, uint16_t handle, ble_gatts_value_t *p_value)); - -/**@brief Get the value of a given attribute. - * - * @note If the attribute value is longer than the size of the supplied buffer, - * p_len will return the total attribute value length (excluding offset), - * and not the number of bytes actually returned in p_data. - * The application may use this information to allocate a suitable buffer size. - * - * @note When retrieving system attribute values with this function, the connection handle - * may refer to an already disconnected connection. Refer to the documentation of - * @ref sd_ble_gatts_sys_attr_get for further information. - * - * @param[in] conn_handle Connection handle. Ignored if the value does not belong to a system attribute. - * @param[in] handle Attribute handle. - * @param[in,out] p_value Attribute value information. - * - * @retval ::NRF_SUCCESS Successfully retrieved the value of the attribute. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid attribute offset supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied on a system attribute. - * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. - */ -SVCALL(SD_BLE_GATTS_VALUE_GET, uint32_t, sd_ble_gatts_value_get(uint16_t conn_handle, uint16_t handle, ble_gatts_value_t *p_value)); - -/**@brief Notify or Indicate an attribute value. - * - * @details This function checks for the relevant Client Characteristic Configuration descriptor value to verify that the relevant operation - * (notification or indication) has been enabled by the client. It is also able to update the attribute value before issuing the PDU, so that - * the application can atomically perform a value update and a server initiated transaction with a single API call. - * - * @note The local attribute value may be updated even if an outgoing packet is not sent to the peer due to an error during execution. - * The Attribute Table has been updated if one of the following error codes is returned: @ref NRF_ERROR_INVALID_STATE, @ref NRF_ERROR_BUSY, - * @ref NRF_ERROR_FORBIDDEN, @ref BLE_ERROR_GATTS_SYS_ATTR_MISSING and @ref NRF_ERROR_RESOURCES. - * The caller can check whether the value has been updated by looking at the contents of *(p_hvx_params->p_len). - * - * @note Only one indication procedure can be ongoing per connection at a time. - * If the application tries to indicate an attribute value while another indication procedure is ongoing, - * the function call will return @ref NRF_ERROR_BUSY. - * A @ref BLE_GATTS_EVT_HVC event will be issued as soon as the confirmation arrives from the peer. - * - * @note The number of Handle Value Notifications that can be queued is configured by @ref ble_gatts_conn_cfg_t::hvn_tx_queue_size - * When the queue is full, the function call will return @ref NRF_ERROR_RESOURCES. - * A @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event will be issued as soon as the transmission of the notification is complete. - * - * @note The application can keep track of the available queue element count for notifications by following the procedure below: - * - Store initial queue element count in a variable. - * - Decrement the variable, which stores the currently available queue element count, by one when a call to this function returns @ref NRF_SUCCESS. - * - Increment the variable, which stores the current available queue element count, by the count variable in @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event. - * - * @events - * @event{@ref BLE_GATTS_EVT_HVN_TX_COMPLETE, Notification transmission complete.} - * @event{@ref BLE_GATTS_EVT_HVC, Confirmation received from the peer.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC} - * @mmsc{@ref BLE_GATTS_HVN_MSC} - * @mmsc{@ref BLE_GATTS_HVI_MSC} - * @mmsc{@ref BLE_GATTS_HVX_DISABLED_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_hvx_params Pointer to an HVx parameters structure. If the p_data member contains a non-NULL pointer the attribute value will be updated with - * the contents pointed by it before sending the notification or indication. - * - * @retval ::NRF_SUCCESS Successfully queued a notification or indication for transmission, and optionally updated the attribute value. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE One or more of the following is true: - * - Invalid Connection State - * - Notifications and/or indications not enabled in the CCCD - * - An ATT_MTU exchange is ongoing - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied. Only attributes added directly by the application are available to notify and indicate. - * @retval ::BLE_ERROR_GATTS_INVALID_ATTR_TYPE Invalid attribute type(s) supplied, only characteristic values may be notified and indicated. - * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. - * @retval ::NRF_ERROR_FORBIDDEN The connection's current security level is lower than the one required by the write permissions of the CCCD associated with this characteristic. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. - * @retval ::NRF_ERROR_BUSY For @ref BLE_GATT_HVX_INDICATION Procedure already in progress. Wait for a @ref BLE_GATTS_EVT_HVC event and retry. - * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. - * @retval ::NRF_ERROR_RESOURCES Too many notifications queued. - * Wait for a @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event and retry. - */ -SVCALL(SD_BLE_GATTS_HVX, uint32_t, sd_ble_gatts_hvx(uint16_t conn_handle, ble_gatts_hvx_params_t const *p_hvx_params)); - -/**@brief Indicate the Service Changed attribute value. - * - * @details This call will send a Handle Value Indication to one or more peers connected to inform them that the Attribute - * Table layout has changed. As soon as the peer has confirmed the indication, a @ref BLE_GATTS_EVT_SC_CONFIRM event will - * be issued. - * - * @note Some of the restrictions and limitations that apply to @ref sd_ble_gatts_hvx also apply here. - * - * @events - * @event{@ref BLE_GATTS_EVT_SC_CONFIRM, Confirmation of attribute table change received from peer.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTS_SC_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] start_handle Start of affected attribute handle range. - * @param[in] end_handle End of affected attribute handle range. - * - * @retval ::NRF_SUCCESS Successfully queued the Service Changed indication for transmission. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_NOT_SUPPORTED Service Changed not enabled at initialization. See @ref - * sd_ble_cfg_set and @ref ble_gatts_cfg_service_changed_t. - * @retval ::NRF_ERROR_INVALID_STATE One or more of the following is true: - * - Invalid Connection State - * - Notifications and/or indications not enabled in the CCCD - * - An ATT_MTU exchange is ongoing - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied, handles must be in the range populated by the application. - * @retval ::NRF_ERROR_BUSY Procedure already in progress. - * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. - */ -SVCALL(SD_BLE_GATTS_SERVICE_CHANGED, uint32_t, sd_ble_gatts_service_changed(uint16_t conn_handle, uint16_t start_handle, uint16_t end_handle)); - -/**@brief Respond to a Read/Write authorization request. - * - * @note This call should only be used as a response to a @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST event issued to the application. - * - * @mscs - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} - * @mmsc{@ref BLE_GATTS_READ_REQ_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_WRITE_REQ_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_PEER_CANCEL_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_rw_authorize_reply_params Pointer to a structure with the attribute provided by the application. - * - * @note @ref ble_gatts_authorize_params_t::p_data is ignored when this function is used to respond - * to a @ref BLE_GATTS_AUTHORIZE_TYPE_READ event if @ref ble_gatts_authorize_params_t::update - * is set to 0. - * - * @retval ::NRF_SUCCESS Successfully queued a response to the peer, and in the case of a write operation, Attribute Table updated. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no authorization request pending. - * @retval ::NRF_ERROR_INVALID_PARAM Authorization op invalid, - * handle supplied does not match requested handle, - * or invalid data to be written provided by the application. - */ -SVCALL(SD_BLE_GATTS_RW_AUTHORIZE_REPLY, uint32_t, sd_ble_gatts_rw_authorize_reply(uint16_t conn_handle, ble_gatts_rw_authorize_reply_params_t const *p_rw_authorize_reply_params)); - - -/**@brief Update persistent system attribute information. - * - * @details Supply information about persistent system attributes to the stack, - * previously obtained using @ref sd_ble_gatts_sys_attr_get. - * This call is only allowed for active connections, and is usually - * made immediately after a connection is established with an known bonded device, - * often as a response to a @ref BLE_GATTS_EVT_SYS_ATTR_MISSING. - * - * p_sysattrs may point directly to the application's stored copy of the system attributes - * obtained using @ref sd_ble_gatts_sys_attr_get. - * If the pointer is NULL, the system attribute info is initialized, assuming that - * the application does not have any previously saved system attribute data for this device. - * - * @note The state of persistent system attributes is reset upon connection establishment and then remembered for its duration. - * - * @note If this call returns with an error code different from @ref NRF_SUCCESS, the storage of persistent system attributes may have been completed only partially. - * This means that the state of the attribute table is undefined, and the application should either provide a new set of attributes using this same call or - * reset the SoftDevice to return to a known state. - * - * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS is used with this function, only the system attributes included in system services will be modified. - * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS is used with this function, only the system attributes included in user services will be modified. - * - * @mscs - * @mmsc{@ref BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC} - * @mmsc{@ref BLE_GATTS_SYS_ATTRS_UNK_PEER_MSC} - * @mmsc{@ref BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_sys_attr_data Pointer to a saved copy of system attributes supplied to the stack, or NULL. - * @param[in] len Size of data pointed by p_sys_attr_data, in octets. - * @param[in] flags Optional additional flags, see @ref BLE_GATTS_SYS_ATTR_FLAGS - * - * @retval ::NRF_SUCCESS Successfully set the system attribute information. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid flags supplied. - * @retval ::NRF_ERROR_INVALID_DATA Invalid data supplied, the data should be exactly the same as retrieved with @ref sd_ble_gatts_sys_attr_get. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - */ -SVCALL(SD_BLE_GATTS_SYS_ATTR_SET, uint32_t, sd_ble_gatts_sys_attr_set(uint16_t conn_handle, uint8_t const *p_sys_attr_data, uint16_t len, uint32_t flags)); - - -/**@brief Retrieve persistent system attribute information from the stack. - * - * @details This call is used to retrieve information about values to be stored persistently by the application - * during the lifetime of a connection or after it has been terminated. When a new connection is established with the same bonded device, - * the system attribute information retrieved with this function should be restored using using @ref sd_ble_gatts_sys_attr_set. - * If retrieved after disconnection, the data should be read before a new connection established. The connection handle for - * the previous, now disconnected, connection will remain valid until a new one is created to allow this API call to refer to it. - * Connection handles belonging to active connections can be used as well, but care should be taken since the system attributes - * may be written to at any time by the peer during a connection's lifetime. - * - * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS is used with this function, only the system attributes included in system services will be returned. - * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS is used with this function, only the system attributes included in user services will be returned. - * - * @mscs - * @mmsc{@ref BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle of the recently terminated connection. - * @param[out] p_sys_attr_data Pointer to a buffer where updated information about system attributes will be filled in. The format of the data is described - * in @ref BLE_GATTS_SYS_ATTRS_FORMAT. NULL can be provided to obtain the length of the data. - * @param[in,out] p_len Size of application buffer if p_sys_attr_data is not NULL. Unconditionally updated to actual length of system attribute data. - * @param[in] flags Optional additional flags, see @ref BLE_GATTS_SYS_ATTR_FLAGS - * - * @retval ::NRF_SUCCESS Successfully retrieved the system attribute information. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid flags supplied. - * @retval ::NRF_ERROR_DATA_SIZE The system attribute information did not fit into the provided buffer. - * @retval ::NRF_ERROR_NOT_FOUND No system attributes found. - */ -SVCALL(SD_BLE_GATTS_SYS_ATTR_GET, uint32_t, sd_ble_gatts_sys_attr_get(uint16_t conn_handle, uint8_t *p_sys_attr_data, uint16_t *p_len, uint32_t flags)); - - -/**@brief Retrieve the first valid user attribute handle. - * - * @param[out] p_handle Pointer to an integer where the handle will be stored. - * - * @retval ::NRF_SUCCESS Successfully retrieved the handle. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - */ -SVCALL(SD_BLE_GATTS_INITIAL_USER_HANDLE_GET, uint32_t, sd_ble_gatts_initial_user_handle_get(uint16_t *p_handle)); - -/**@brief Retrieve the attribute UUID and/or metadata. - * - * @param[in] handle Attribute handle - * @param[out] p_uuid UUID of the attribute. Use NULL to omit this field. - * @param[out] p_md Metadata of the attribute. Use NULL to omit this field. - * - * @retval ::NRF_SUCCESS Successfully retrieved the attribute metadata, - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameters supplied. Returned when both @c p_uuid and @c p_md are NULL. - * @retval ::NRF_ERROR_NOT_FOUND Attribute was not found. - */ -SVCALL(SD_BLE_GATTS_ATTR_GET, uint32_t, sd_ble_gatts_attr_get(uint16_t handle, ble_uuid_t * p_uuid, ble_gatts_attr_md_t * p_md)); - -/**@brief Reply to an ATT_MTU exchange request by sending an Exchange MTU Response to the client. - * - * @details This function is only used to reply to a @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST event. - * - * @details The SoftDevice sets ATT_MTU to the minimum of: - * - The Client RX MTU value from @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST, and - * - The Server RX MTU value. - * - * However, the SoftDevice never sets ATT_MTU lower than @ref BLE_GATT_ATT_MTU_DEFAULT. - * - * @mscs - * @mmsc{@ref BLE_GATTS_MTU_EXCHANGE} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] server_rx_mtu Server RX MTU size. - * - The minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. - * - The maximum value is @ref ble_gatt_conn_cfg_t::att_mtu in the connection configuration - used for this connection. - * - The value must be equal to Client RX MTU size given in @ref sd_ble_gattc_exchange_mtu_request - * if an ATT_MTU exchange has already been performed in the other direction. - * - * @retval ::NRF_SUCCESS Successfully sent response to the client. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no ATT_MTU exchange request pending. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid Server RX MTU size supplied. - */ -SVCALL(SD_BLE_GATTS_EXCHANGE_MTU_REPLY, uint32_t, sd_ble_gatts_exchange_mtu_reply(uint16_t conn_handle, uint16_t server_rx_mtu)); -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // BLE_GATTS_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/ble_hci.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/ble_hci.h deleted file mode 100644 index f0dde9a03ad..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/ble_hci.h +++ /dev/null @@ -1,135 +0,0 @@ -/* - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_COMMON - @{ -*/ - - -#ifndef BLE_HCI_H__ -#define BLE_HCI_H__ -#ifdef __cplusplus -extern "C" { -#endif - -/** @defgroup BLE_HCI_STATUS_CODES Bluetooth status codes - * @{ */ - -#define BLE_HCI_STATUS_CODE_SUCCESS 0x00 /**< Success. */ -#define BLE_HCI_STATUS_CODE_UNKNOWN_BTLE_COMMAND 0x01 /**< Unknown BLE Command. */ -#define BLE_HCI_STATUS_CODE_UNKNOWN_CONNECTION_IDENTIFIER 0x02 /**< Unknown Connection Identifier. */ -/*0x03 Hardware Failure -0x04 Page Timeout -*/ -#define BLE_HCI_AUTHENTICATION_FAILURE 0x05 /**< Authentication Failure. */ -#define BLE_HCI_STATUS_CODE_PIN_OR_KEY_MISSING 0x06 /**< Pin or Key missing. */ -#define BLE_HCI_MEMORY_CAPACITY_EXCEEDED 0x07 /**< Memory Capacity Exceeded. */ -#define BLE_HCI_CONNECTION_TIMEOUT 0x08 /**< Connection Timeout. */ -/*0x09 Connection Limit Exceeded -0x0A Synchronous Connection Limit To A Device Exceeded -0x0B ACL Connection Already Exists*/ -#define BLE_HCI_STATUS_CODE_COMMAND_DISALLOWED 0x0C /**< Command Disallowed. */ -/*0x0D Connection Rejected due to Limited Resources -0x0E Connection Rejected Due To Security Reasons -0x0F Connection Rejected due to Unacceptable BD_ADDR -0x10 Connection Accept Timeout Exceeded -0x11 Unsupported Feature or Parameter Value*/ -#define BLE_HCI_STATUS_CODE_INVALID_BTLE_COMMAND_PARAMETERS 0x12 /**< Invalid BLE Command Parameters. */ -#define BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION 0x13 /**< Remote User Terminated Connection. */ -#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_LOW_RESOURCES 0x14 /**< Remote Device Terminated Connection due to low resources.*/ -#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_POWER_OFF 0x15 /**< Remote Device Terminated Connection due to power off. */ -#define BLE_HCI_LOCAL_HOST_TERMINATED_CONNECTION 0x16 /**< Local Host Terminated Connection. */ -/* -0x17 Repeated Attempts -0x18 Pairing Not Allowed -0x19 Unknown LMP PDU -*/ -#define BLE_HCI_UNSUPPORTED_REMOTE_FEATURE 0x1A /**< Unsupported Remote Feature. */ -/* -0x1B SCO Offset Rejected -0x1C SCO Interval Rejected -0x1D SCO Air Mode Rejected*/ -#define BLE_HCI_STATUS_CODE_INVALID_LMP_PARAMETERS 0x1E /**< Invalid LMP Parameters. */ -#define BLE_HCI_STATUS_CODE_UNSPECIFIED_ERROR 0x1F /**< Unspecified Error. */ -/*0x20 Unsupported LMP Parameter Value -0x21 Role Change Not Allowed -*/ -#define BLE_HCI_STATUS_CODE_LMP_RESPONSE_TIMEOUT 0x22 /**< LMP Response Timeout. */ -#define BLE_HCI_STATUS_CODE_LMP_ERROR_TRANSACTION_COLLISION 0x23 /**< LMP Error Transaction Collision/LL Procedure Collision. */ -#define BLE_HCI_STATUS_CODE_LMP_PDU_NOT_ALLOWED 0x24 /**< LMP PDU Not Allowed. */ -/*0x25 Encryption Mode Not Acceptable -0x26 Link Key Can Not be Changed -0x27 Requested QoS Not Supported -*/ -#define BLE_HCI_INSTANT_PASSED 0x28 /**< Instant Passed. */ -#define BLE_HCI_PAIRING_WITH_UNIT_KEY_UNSUPPORTED 0x29 /**< Pairing with Unit Key Unsupported. */ -#define BLE_HCI_DIFFERENT_TRANSACTION_COLLISION 0x2A /**< Different Transaction Collision. */ -/* -0x2B Reserved -0x2C QoS Unacceptable Parameter -0x2D QoS Rejected -0x2E Channel Classification Not Supported -0x2F Insufficient Security -*/ -#define BLE_HCI_PARAMETER_OUT_OF_MANDATORY_RANGE 0x30 /**< Parameter Out Of Mandatory Range. */ -/* -0x31 Reserved -0x32 Role Switch Pending -0x33 Reserved -0x34 Reserved Slot Violation -0x35 Role Switch Failed -0x36 Extended Inquiry Response Too Large -0x37 Secure Simple Pairing Not Supported By Host. -0x38 Host Busy - Pairing -0x39 Connection Rejected due to No Suitable Channel Found*/ -#define BLE_HCI_CONTROLLER_BUSY 0x3A /**< Controller Busy. */ -#define BLE_HCI_CONN_INTERVAL_UNACCEPTABLE 0x3B /**< Connection Interval Unacceptable. */ -#define BLE_HCI_DIRECTED_ADVERTISER_TIMEOUT 0x3C /**< Directed Advertisement Timeout. */ -#define BLE_HCI_CONN_TERMINATED_DUE_TO_MIC_FAILURE 0x3D /**< Connection Terminated due to MIC Failure. */ -#define BLE_HCI_CONN_FAILED_TO_BE_ESTABLISHED 0x3E /**< Connection Failed to be Established. */ - -/** @} */ - - -#ifdef __cplusplus -} -#endif -#endif // BLE_HCI_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/ble_l2cap.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/ble_l2cap.h deleted file mode 100644 index 3b53ded0926..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/ble_l2cap.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_L2CAP Logical Link Control and Adaptation Protocol (L2CAP) - @{ - @brief Definitions and prototypes for the L2CAP interface. - */ - -#ifndef BLE_L2CAP_H__ -#define BLE_L2CAP_H__ - -#include "ble_types.h" -#include "ble_ranges.h" -#include "ble_err.h" -#include "nrf_svc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@addtogroup BLE_L2CAP_TERMINOLOGY Terminology - * @{ - * @details - * - * L2CAP SDU - * - A data unit that the application can send/receive to/from a peer. - * - * L2CAP PDU - * - A data unit that is exchanged between local and remote L2CAP entities. - * It consists of L2CAP protocol control information and payload fields. - * The payload field can contain an L2CAP SDU or a part of an L2CAP SDU. - * - * L2CAP MTU - * - The maximum length of an L2CAP SDU. - * - * L2CAP MPS - * - The maximum length of an L2CAP PDU payload field. - * - * Credits - * - A value indicating the number of L2CAP PDUs that the receiver of the credit can send to the peer. - * @} */ - -/**@addtogroup BLE_L2CAP_ENUMERATIONS Enumerations - * @{ */ - -/**@brief L2CAP API SVC numbers. */ -enum BLE_L2CAP_SVCS -{ - SD_BLE_L2CAP_CH_SETUP = BLE_L2CAP_SVC_BASE, /**< Set up an L2CAP channel. */ - SD_BLE_L2CAP_CH_RELEASE, /**< Release an L2CAP channel. */ - SD_BLE_L2CAP_CH_RX, /**< Receive an SDU on an L2CAP channel. */ - SD_BLE_L2CAP_CH_TX, /**< Transmit an SDU on an L2CAP channel. */ - SD_BLE_L2CAP_CH_FLOW_CONTROL, /**< Advanced SDU reception flow control. */ -}; - -/**@brief L2CAP Event IDs. */ -enum BLE_L2CAP_EVTS -{ - BLE_L2CAP_EVT_CH_SETUP_REQUEST = BLE_L2CAP_EVT_BASE, /**< L2CAP Channel Setup Request event. - \n See @ref ble_l2cap_evt_ch_setup_request_t. */ - BLE_L2CAP_EVT_CH_SETUP_REFUSED, /**< L2CAP Channel Setup Refused event. - \n See @ref ble_l2cap_evt_ch_setup_refused_t. */ - BLE_L2CAP_EVT_CH_SETUP, /**< L2CAP Channel Setup Completed event. - \n See @ref ble_l2cap_evt_ch_setup_t. */ - BLE_L2CAP_EVT_CH_RELEASED, /**< L2CAP Channel Released event. - \n No additional event structure applies. */ - BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED, /**< L2CAP Channel SDU data buffer released event. - \n See @ref ble_l2cap_evt_ch_sdu_buf_released_t. */ - BLE_L2CAP_EVT_CH_CREDIT, /**< L2CAP Channel Credit received. - \n See @ref ble_l2cap_evt_ch_credit_t. */ - BLE_L2CAP_EVT_CH_RX, /**< L2CAP Channel SDU received. - \n See @ref ble_l2cap_evt_ch_rx_t. */ - BLE_L2CAP_EVT_CH_TX, /**< L2CAP Channel SDU transmitted. - \n See @ref ble_l2cap_evt_ch_tx_t. */ -}; - -/** @} */ - -/**@addtogroup BLE_L2CAP_DEFINES Defines - * @{ */ - -/**@brief Maximum number of L2CAP channels per connection. */ -#define BLE_L2CAP_CH_COUNT_MAX (64) - -/**@brief Minimum L2CAP MTU, in bytes. */ -#define BLE_L2CAP_MTU_MIN (23) - -/**@brief Minimum L2CAP MPS, in bytes. */ -#define BLE_L2CAP_MPS_MIN (23) - -/**@brief Invalid CID. */ -#define BLE_L2CAP_CID_INVALID (0x0000) - -/**@brief Default number of credits for @ref sd_ble_l2cap_ch_flow_control. */ -#define BLE_L2CAP_CREDITS_DEFAULT (1) - -/**@defgroup BLE_L2CAP_CH_SETUP_REFUSED_SRCS L2CAP channel setup refused sources - * @{ */ -#define BLE_L2CAP_CH_SETUP_REFUSED_SRC_LOCAL (0x01) /**< Local. */ -#define BLE_L2CAP_CH_SETUP_REFUSED_SRC_REMOTE (0x02) /**< Remote. */ - /** @} */ - - /** @defgroup BLE_L2CAP_CH_STATUS_CODES L2CAP channel status codes - * @{ */ -#define BLE_L2CAP_CH_STATUS_CODE_SUCCESS (0x0000) /**< Success. */ -#define BLE_L2CAP_CH_STATUS_CODE_LE_PSM_NOT_SUPPORTED (0x0002) /**< LE_PSM not supported. */ -#define BLE_L2CAP_CH_STATUS_CODE_NO_RESOURCES (0x0004) /**< No resources available. */ -#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_AUTHENTICATION (0x0005) /**< Insufficient authentication. */ -#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_AUTHORIZATION (0x0006) /**< Insufficient authorization. */ -#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_ENC_KEY_SIZE (0x0007) /**< Insufficient encryption key size. */ -#define BLE_L2CAP_CH_STATUS_CODE_INSUFF_ENC (0x0008) /**< Insufficient encryption. */ -#define BLE_L2CAP_CH_STATUS_CODE_INVALID_SCID (0x0009) /**< Invalid Source CID. */ -#define BLE_L2CAP_CH_STATUS_CODE_SCID_ALLOCATED (0x000A) /**< Source CID already allocated. */ -#define BLE_L2CAP_CH_STATUS_CODE_UNACCEPTABLE_PARAMS (0x000B) /**< Unacceptable parameters. */ -#define BLE_L2CAP_CH_STATUS_CODE_NOT_UNDERSTOOD (0x8000) /**< Command Reject received instead of LE Credit Based Connection Response. */ -#define BLE_L2CAP_CH_STATUS_CODE_TIMEOUT (0xC000) /**< Operation timed out. */ -/** @} */ - -/** @} */ - -/**@addtogroup BLE_L2CAP_STRUCTURES Structures - * @{ */ - -/** - * @brief BLE L2CAP connection configuration parameters, set with @ref sd_ble_cfg_set. - * - * @note These parameters are set per connection, so all L2CAP channels created on this connection - * will have the same parameters. - * - * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: - * - rx_mps is smaller than @ref BLE_L2CAP_MPS_MIN. - * - tx_mps is smaller than @ref BLE_L2CAP_MPS_MIN. - * - ch_count is greater than @ref BLE_L2CAP_CH_COUNT_MAX. - * @retval ::NRF_ERROR_NO_MEM rx_mps or tx_mps is set too high. - */ -typedef struct -{ - uint16_t rx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP shall - be able to receive on L2CAP channels on connections with this - configuration. The minimum value is @ref BLE_L2CAP_MPS_MIN. */ - uint16_t tx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP shall - be able to transmit on L2CAP channels on connections with this - configuration. The minimum value is @ref BLE_L2CAP_MPS_MIN. */ - uint8_t rx_queue_size; /**< Number of SDU data buffers that can be queued for reception per - L2CAP channel. The minimum value is one. */ - uint8_t tx_queue_size; /**< Number of SDU data buffers that can be queued for transmission - per L2CAP channel. The minimum value is one. */ - uint8_t ch_count; /**< Number of L2CAP channels the application can create per connection - with this configuration. The default value is zero, the maximum - value is @ref BLE_L2CAP_CH_COUNT_MAX. - @note if this parameter is set to zero, all other parameters in - @ref ble_l2cap_conn_cfg_t are ignored. */ -} ble_l2cap_conn_cfg_t; - -/**@brief L2CAP channel RX parameters. */ -typedef struct -{ - uint16_t rx_mtu; /**< The maximum L2CAP SDU size, in bytes, that L2CAP shall be able to - receive on this L2CAP channel. - - Must be equal to or greater than @ref BLE_L2CAP_MTU_MIN. */ - uint16_t rx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP shall be - able to receive on this L2CAP channel. - - Must be equal to or greater than @ref BLE_L2CAP_MPS_MIN. - - Must be equal to or less than @ref ble_l2cap_conn_cfg_t::rx_mps. */ - ble_data_t sdu_buf; /**< SDU data buffer for reception. - - If @ref ble_data_t::p_data is non-NULL, initial credits are - issued to the peer. - - If @ref ble_data_t::p_data is NULL, no initial credits are - issued to the peer. */ -} ble_l2cap_ch_rx_params_t; - -/**@brief L2CAP channel setup parameters. */ -typedef struct -{ - ble_l2cap_ch_rx_params_t rx_params; /**< L2CAP channel RX parameters. */ - uint16_t le_psm; /**< LE Protocol/Service Multiplexer. Used when requesting - setup of an L2CAP channel, ignored otherwise. */ - uint16_t status; /**< Status code, see @ref BLE_L2CAP_CH_STATUS_CODES. - Used when replying to a setup request of an L2CAP - channel, ignored otherwise. */ -} ble_l2cap_ch_setup_params_t; - -/**@brief L2CAP channel TX parameters. */ -typedef struct -{ - uint16_t tx_mtu; /**< The maximum L2CAP SDU size, in bytes, that L2CAP is able to - transmit on this L2CAP channel. */ - uint16_t peer_mps; /**< The maximum L2CAP PDU payload size, in bytes, that the peer is - able to receive on this L2CAP channel. */ - uint16_t tx_mps; /**< The maximum L2CAP PDU payload size, in bytes, that L2CAP is able - to transmit on this L2CAP channel. This is effective tx_mps, - selected by the SoftDevice as - MIN( @ref ble_l2cap_ch_tx_params_t::peer_mps, @ref ble_l2cap_conn_cfg_t::tx_mps ) */ - uint16_t credits; /**< Initial credits given by the peer. */ -} ble_l2cap_ch_tx_params_t; - -/**@brief L2CAP Channel Setup Request event. */ -typedef struct -{ - ble_l2cap_ch_tx_params_t tx_params; /**< L2CAP channel TX parameters. */ - uint16_t le_psm; /**< LE Protocol/Service Multiplexer. */ -} ble_l2cap_evt_ch_setup_request_t; - -/**@brief L2CAP Channel Setup Refused event. */ -typedef struct -{ - uint8_t source; /**< Source, see @ref BLE_L2CAP_CH_SETUP_REFUSED_SRCS */ - uint16_t status; /**< Status code, see @ref BLE_L2CAP_CH_STATUS_CODES */ -} ble_l2cap_evt_ch_setup_refused_t; - -/**@brief L2CAP Channel Setup Completed event. */ -typedef struct -{ - ble_l2cap_ch_tx_params_t tx_params; /**< L2CAP channel TX parameters. */ -} ble_l2cap_evt_ch_setup_t; - -/**@brief L2CAP Channel SDU Data Duffer Released event. */ -typedef struct -{ - ble_data_t sdu_buf; /**< Returned reception or transmission SDU data buffer. The SoftDevice - returns SDU data buffers supplied by the application, which have - not yet been returned previously via a @ref BLE_L2CAP_EVT_CH_RX or - @ref BLE_L2CAP_EVT_CH_TX event. */ -} ble_l2cap_evt_ch_sdu_buf_released_t; - -/**@brief L2CAP Channel Credit received event. */ -typedef struct -{ - uint16_t credits; /**< Additional credits given by the peer. */ -} ble_l2cap_evt_ch_credit_t; - -/**@brief L2CAP Channel received SDU event. */ -typedef struct -{ - uint16_t sdu_len; /**< Total SDU length, in bytes. */ - ble_data_t sdu_buf; /**< SDU data buffer. - @note If there is not enough space in the buffer - (sdu_buf.len < sdu_len) then the rest of the SDU will be - silently discarded by the SoftDevice. */ -} ble_l2cap_evt_ch_rx_t; - -/**@brief L2CAP Channel transmitted SDU event. */ -typedef struct -{ - ble_data_t sdu_buf; /**< SDU data buffer. */ -} ble_l2cap_evt_ch_tx_t; - -/**@brief L2CAP event structure. */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle on which the event occured. */ - uint16_t local_cid; /**< Local Channel ID of the L2CAP channel, or - @ref BLE_L2CAP_CID_INVALID if not present. */ - union - { - ble_l2cap_evt_ch_setup_request_t ch_setup_request; /**< L2CAP Channel Setup Request Event Parameters. */ - ble_l2cap_evt_ch_setup_refused_t ch_setup_refused; /**< L2CAP Channel Setup Refused Event Parameters. */ - ble_l2cap_evt_ch_setup_t ch_setup; /**< L2CAP Channel Setup Completed Event Parameters. */ - ble_l2cap_evt_ch_sdu_buf_released_t ch_sdu_buf_released;/**< L2CAP Channel SDU Data Buffer Released Event Parameters. */ - ble_l2cap_evt_ch_credit_t credit; /**< L2CAP Channel Credit Received Event Parameters. */ - ble_l2cap_evt_ch_rx_t rx; /**< L2CAP Channel SDU Received Event Parameters. */ - ble_l2cap_evt_ch_tx_t tx; /**< L2CAP Channel SDU Transmitted Event Parameters. */ - } params; /**< Event Parameters. */ -} ble_l2cap_evt_t; - -/** @} */ - -/**@addtogroup BLE_L2CAP_FUNCTIONS Functions - * @{ */ - -/**@brief Set up an L2CAP channel. - * - * @details This function is used to: - * - Request setup of an L2CAP channel: sends an LE Credit Based Connection Request packet to a peer. - * - Reply to a setup request of an L2CAP channel (if called in response to a - * @ref BLE_L2CAP_EVT_CH_SETUP_REQUEST event): sends an LE Credit Based Connection - * Response packet to a peer. - * - * @note A call to this function will require the application to keep the SDU data buffer alive - * until the SDU data buffer is returned in @ref BLE_L2CAP_EVT_CH_RX or - * @ref BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED event. - * - * @events - * @event{@ref BLE_L2CAP_EVT_CH_SETUP, Setup successful.} - * @event{@ref BLE_L2CAP_EVT_CH_SETUP_REFUSED, Setup failed.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_L2CAP_CH_SETUP_MSC} - * @endmscs - * - * @param[in] conn_handle Connection Handle. - * @param[in,out] p_local_cid Pointer to a uint16_t containing Local Channel ID of the L2CAP channel: - * - As input: @ref BLE_L2CAP_CID_INVALID when requesting setup of an L2CAP - * channel or local_cid provided in the @ref BLE_L2CAP_EVT_CH_SETUP_REQUEST - * event when replying to a setup request of an L2CAP channel. - * - As output: local_cid for this channel. - * @param[in] p_params L2CAP channel parameters. - * - * @retval ::NRF_SUCCESS Successfully queued request or response for transmission. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_LENGTH Supplied higher rx_mps than has been configured on this link. - * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (L2CAP channel already set up). - * @retval ::NRF_ERROR_NOT_FOUND CID not found. - * @retval ::NRF_ERROR_RESOURCES The limit has been reached for available L2CAP channels, - * see @ref ble_l2cap_conn_cfg_t::ch_count. - */ -SVCALL(SD_BLE_L2CAP_CH_SETUP, uint32_t, sd_ble_l2cap_ch_setup(uint16_t conn_handle, uint16_t *p_local_cid, ble_l2cap_ch_setup_params_t const *p_params)); - -/**@brief Release an L2CAP channel. - * - * @details This sends a Disconnection Request packet to a peer. - * - * @events - * @event{@ref BLE_L2CAP_EVT_CH_RELEASED, Release complete.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_L2CAP_CH_RELEASE_MSC} - * @endmscs - * - * @param[in] conn_handle Connection Handle. - * @param[in] local_cid Local Channel ID of the L2CAP channel. - * - * @retval ::NRF_SUCCESS Successfully queued request for transmission. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is - * in progress for the L2CAP channel). - * @retval ::NRF_ERROR_NOT_FOUND CID not found. - */ -SVCALL(SD_BLE_L2CAP_CH_RELEASE, uint32_t, sd_ble_l2cap_ch_release(uint16_t conn_handle, uint16_t local_cid)); - -/**@brief Receive an SDU on an L2CAP channel. - * - * @details This may issue additional credits to the peer using an LE Flow Control Credit packet. - * - * @note A call to this function will require the application to keep the memory pointed by - * @ref ble_data_t::p_data alive until the SDU data buffer is returned in @ref BLE_L2CAP_EVT_CH_RX - * or @ref BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED event. - * - * @note The SoftDevice can queue up to @ref ble_l2cap_conn_cfg_t::rx_queue_size SDU data buffers - * for reception per L2CAP channel. - * - * @events - * @event{@ref BLE_L2CAP_EVT_CH_RX, The SDU is received.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_L2CAP_CH_RX_MSC} - * @endmscs - * - * @param[in] conn_handle Connection Handle. - * @param[in] local_cid Local Channel ID of the L2CAP channel. - * @param[in] p_sdu_buf Pointer to the SDU data buffer. - * - * @retval ::NRF_SUCCESS Buffer accepted. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is - * in progress for an L2CAP channel). - * @retval ::NRF_ERROR_NOT_FOUND CID not found. - * @retval ::NRF_ERROR_RESOURCES Too many SDU data buffers supplied. Wait for a - * @ref BLE_L2CAP_EVT_CH_RX event and retry. - */ -SVCALL(SD_BLE_L2CAP_CH_RX, uint32_t, sd_ble_l2cap_ch_rx(uint16_t conn_handle, uint16_t local_cid, ble_data_t const *p_sdu_buf)); - -/**@brief Transmit an SDU on an L2CAP channel. - * - * @note A call to this function will require the application to keep the memory pointed by - * @ref ble_data_t::p_data alive until the SDU data buffer is returned in @ref BLE_L2CAP_EVT_CH_TX - * or @ref BLE_L2CAP_EVT_CH_SDU_BUF_RELEASED event. - * - * @note The SoftDevice can queue up to @ref ble_l2cap_conn_cfg_t::tx_queue_size SDUs for - * transmission per L2CAP channel. - * - * @note The application can keep track of the available credits for transmission by following - * the procedure below: - * - Store initial credits given by the peer in a variable. - * (Initial credits are provided in a @ref BLE_L2CAP_EVT_CH_SETUP event.) - * - Decrement the variable, which stores the currently available credits, by - * ceiling((@ref ble_data_t::len + 2) / tx_mps) when a call to this function returns - * @ref NRF_SUCCESS. (tx_mps is provided in a @ref BLE_L2CAP_EVT_CH_SETUP event.) - * - Increment the variable, which stores the currently available credits, by additional - * credits given by the peer in a @ref BLE_L2CAP_EVT_CH_CREDIT event. - * - * @events - * @event{@ref BLE_L2CAP_EVT_CH_TX, The SDU is transmitted.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_L2CAP_CH_TX_MSC} - * @endmscs - * - * @param[in] conn_handle Connection Handle. - * @param[in] local_cid Local Channel ID of the L2CAP channel. - * @param[in] p_sdu_buf Pointer to the SDU data buffer. - * - * @retval ::NRF_SUCCESS Successfully queued L2CAP SDU for transmission. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is - * in progress for the L2CAP channel). - * @retval ::NRF_ERROR_NOT_FOUND CID not found. - * @retval ::NRF_ERROR_DATA_SIZE Invalid SDU length supplied, must not be more than - * @ref ble_l2cap_ch_tx_params_t::tx_mtu provided in - * @ref BLE_L2CAP_EVT_CH_SETUP event. - * @retval ::NRF_ERROR_RESOURCES Too many SDUs queued for transmission. Wait for a - * @ref BLE_L2CAP_EVT_CH_TX event and retry. - */ -SVCALL(SD_BLE_L2CAP_CH_TX, uint32_t, sd_ble_l2cap_ch_tx(uint16_t conn_handle, uint16_t local_cid, ble_data_t const *p_sdu_buf)); - -/**@brief Advanced SDU reception flow control. - * - * @details Adjust the way the SoftDevice issues credits to the peer. - * This may issue additional credits to the peer using an LE Flow Control Credit packet. - * - * @mscs - * @mmsc{@ref BLE_L2CAP_CH_FLOW_CONTROL_MSC} - * @endmscs - * - * @param[in] conn_handle Connection Handle. - * @param[in] local_cid Local Channel ID of the L2CAP channel or @ref BLE_L2CAP_CID_INVALID to set - * the value that will be used for newly created channels. - * @param[in] credits Number of credits that the SoftDevice will make sure the peer has every - * time it starts using a new reception buffer. - * - @ref BLE_L2CAP_CREDITS_DEFAULT is the default value the SoftDevice will - * use if this function is not called. - * - If set to zero, the SoftDevice will stop issuing credits for new reception - * buffers the application provides or has provided. SDU reception that is - * currently ongoing will be allowed to complete. - * @param[out] p_credits NULL or pointer to a uint16_t. If a valid pointer is provided, it will be - * written by the SoftDevice with the number of credits that is or will be - * available to the peer. If the value written by the SoftDevice is 0 when - * credits parameter was set to 0, the peer will not be able to send more - * data until more credits are provided by calling this function again with - * credits > 0. This parameter is ignored when local_cid is set to @ref - * BLE_L2CAP_CID_INVALID. - * - * @note Application should take care when setting number of credits higher than default value. In - * this case the application must make sure that the SoftDevice always has reception buffers - * available (see @ref sd_ble_l2cap_ch_rx) for that channel. If the SoftDevice does not have - * such buffers available, packets may be NACKed on the Link Layer and all Bluetooth traffic - * on the connection handle may be stalled until the SoftDevice again has an available - * reception buffer. This applies even if the application has used this call to set the - * credits back to default, or zero. - * - * @retval ::NRF_SUCCESS Flow control parameters accepted. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid State to perform operation (Setup or release is - * in progress for an L2CAP channel). - * @retval ::NRF_ERROR_NOT_FOUND CID not found. - */ -SVCALL(SD_BLE_L2CAP_CH_FLOW_CONTROL, uint32_t, sd_ble_l2cap_ch_flow_control(uint16_t conn_handle, uint16_t local_cid, uint16_t credits, uint16_t *p_credits)); - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // BLE_L2CAP_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/ble_ranges.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/ble_ranges.h deleted file mode 100644 index 5b9d8914021..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/ble_ranges.h +++ /dev/null @@ -1,156 +0,0 @@ -/* - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_COMMON - @{ - @defgroup ble_ranges Module specific SVC, event and option number subranges - @{ - - @brief Definition of SVC, event and option number subranges for each API module. - - @note - SVCs, event and option numbers are split into subranges for each API module. - Each module receives its entire allocated range of SVC calls, whether implemented or not, - but return BLE_ERROR_NOT_SUPPORTED for unimplemented or undefined calls in its range. - - Note that the symbols BLE__SVC_LAST is the end of the allocated SVC range, - rather than the last SVC function call actually defined and implemented. - - Specific SVC, event and option values are defined in each module's ble_.h file, - which defines names of each individual SVC code based on the range start value. -*/ - -#ifndef BLE_RANGES_H__ -#define BLE_RANGES_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#define BLE_SVC_BASE 0x60 /**< Common BLE SVC base. */ -#define BLE_SVC_LAST 0x6B /**< Common BLE SVC last. */ - -#define BLE_GAP_SVC_BASE 0x6C /**< GAP BLE SVC base. */ -#define BLE_GAP_SVC_LAST 0x93 /**< GAP BLE SVC last. */ - -#define BLE_GATTC_SVC_BASE 0x94 /**< GATTC BLE SVC base. */ -#define BLE_GATTC_SVC_LAST 0x9F /**< GATTC BLE SVC last. */ - -#define BLE_GATTS_SVC_BASE 0xA0 /**< GATTS BLE SVC base. */ -#define BLE_GATTS_SVC_LAST 0xAF /**< GATTS BLE SVC last. */ - -#define BLE_L2CAP_SVC_BASE 0xB0 /**< L2CAP BLE SVC base. */ -#define BLE_L2CAP_SVC_LAST 0xBF /**< L2CAP BLE SVC last. */ - - -#define BLE_EVT_INVALID 0x00 /**< Invalid BLE Event. */ - -#define BLE_EVT_BASE 0x01 /**< Common BLE Event base. */ -#define BLE_EVT_LAST 0x0F /**< Common BLE Event last. */ - -#define BLE_GAP_EVT_BASE 0x10 /**< GAP BLE Event base. */ -#define BLE_GAP_EVT_LAST 0x2F /**< GAP BLE Event last. */ - -#define BLE_GATTC_EVT_BASE 0x30 /**< GATTC BLE Event base. */ -#define BLE_GATTC_EVT_LAST 0x4F /**< GATTC BLE Event last. */ - -#define BLE_GATTS_EVT_BASE 0x50 /**< GATTS BLE Event base. */ -#define BLE_GATTS_EVT_LAST 0x6F /**< GATTS BLE Event last. */ - -#define BLE_L2CAP_EVT_BASE 0x70 /**< L2CAP BLE Event base. */ -#define BLE_L2CAP_EVT_LAST 0x8F /**< L2CAP BLE Event last. */ - - -#define BLE_OPT_INVALID 0x00 /**< Invalid BLE Option. */ - -#define BLE_OPT_BASE 0x01 /**< Common BLE Option base. */ -#define BLE_OPT_LAST 0x1F /**< Common BLE Option last. */ - -#define BLE_GAP_OPT_BASE 0x20 /**< GAP BLE Option base. */ -#define BLE_GAP_OPT_LAST 0x3F /**< GAP BLE Option last. */ - -#define BLE_GATT_OPT_BASE 0x40 /**< GATT BLE Option base. */ -#define BLE_GATT_OPT_LAST 0x5F /**< GATT BLE Option last. */ - -#define BLE_GATTC_OPT_BASE 0x60 /**< GATTC BLE Option base. */ -#define BLE_GATTC_OPT_LAST 0x7F /**< GATTC BLE Option last. */ - -#define BLE_GATTS_OPT_BASE 0x80 /**< GATTS BLE Option base. */ -#define BLE_GATTS_OPT_LAST 0x9F /**< GATTS BLE Option last. */ - -#define BLE_L2CAP_OPT_BASE 0xA0 /**< L2CAP BLE Option base. */ -#define BLE_L2CAP_OPT_LAST 0xBF /**< L2CAP BLE Option last. */ - - -#define BLE_CFG_INVALID 0x00 /**< Invalid BLE configuration. */ - -#define BLE_CFG_BASE 0x01 /**< Common BLE configuration base. */ -#define BLE_CFG_LAST 0x1F /**< Common BLE configuration last. */ - -#define BLE_CONN_CFG_BASE 0x20 /**< BLE connection configuration base. */ -#define BLE_CONN_CFG_LAST 0x3F /**< BLE connection configuration last. */ - -#define BLE_GAP_CFG_BASE 0x40 /**< GAP BLE configuration base. */ -#define BLE_GAP_CFG_LAST 0x5F /**< GAP BLE configuration last. */ - -#define BLE_GATT_CFG_BASE 0x60 /**< GATT BLE configuration base. */ -#define BLE_GATT_CFG_LAST 0x7F /**< GATT BLE configuration last. */ - -#define BLE_GATTC_CFG_BASE 0x80 /**< GATTC BLE configuration base. */ -#define BLE_GATTC_CFG_LAST 0x9F /**< GATTC BLE configuration last. */ - -#define BLE_GATTS_CFG_BASE 0xA0 /**< GATTS BLE configuration base. */ -#define BLE_GATTS_CFG_LAST 0xBF /**< GATTS BLE configuration last. */ - -#define BLE_L2CAP_CFG_BASE 0xC0 /**< L2CAP BLE configuration base. */ -#define BLE_L2CAP_CFG_LAST 0xDF /**< L2CAP BLE configuration last. */ - - - - - -#ifdef __cplusplus -} -#endif -#endif /* BLE_RANGES_H__ */ - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/ble_types.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/ble_types.h deleted file mode 100644 index 88c93180c83..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/ble_types.h +++ /dev/null @@ -1,215 +0,0 @@ -/* - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_COMMON - @{ - @defgroup ble_types Common types and macro definitions - @{ - - @brief Common types and macro definitions for the BLE SoftDevice. - */ - -#ifndef BLE_TYPES_H__ -#define BLE_TYPES_H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_TYPES_DEFINES Defines - * @{ */ - -/** @defgroup BLE_CONN_HANDLES BLE Connection Handles - * @{ */ -#define BLE_CONN_HANDLE_INVALID 0xFFFF /**< Invalid Connection Handle. */ -#define BLE_CONN_HANDLE_ALL 0xFFFE /**< Applies to all Connection Handles. */ -/** @} */ - - -/** @defgroup BLE_UUID_VALUES Assigned Values for BLE UUIDs - * @{ */ -/* Generic UUIDs, applicable to all services */ -#define BLE_UUID_UNKNOWN 0x0000 /**< Reserved UUID. */ -#define BLE_UUID_SERVICE_PRIMARY 0x2800 /**< Primary Service. */ -#define BLE_UUID_SERVICE_SECONDARY 0x2801 /**< Secondary Service. */ -#define BLE_UUID_SERVICE_INCLUDE 0x2802 /**< Include. */ -#define BLE_UUID_CHARACTERISTIC 0x2803 /**< Characteristic. */ -#define BLE_UUID_DESCRIPTOR_CHAR_EXT_PROP 0x2900 /**< Characteristic Extended Properties Descriptor. */ -#define BLE_UUID_DESCRIPTOR_CHAR_USER_DESC 0x2901 /**< Characteristic User Description Descriptor. */ -#define BLE_UUID_DESCRIPTOR_CLIENT_CHAR_CONFIG 0x2902 /**< Client Characteristic Configuration Descriptor. */ -#define BLE_UUID_DESCRIPTOR_SERVER_CHAR_CONFIG 0x2903 /**< Server Characteristic Configuration Descriptor. */ -#define BLE_UUID_DESCRIPTOR_CHAR_PRESENTATION_FORMAT 0x2904 /**< Characteristic Presentation Format Descriptor. */ -#define BLE_UUID_DESCRIPTOR_CHAR_AGGREGATE_FORMAT 0x2905 /**< Characteristic Aggregate Format Descriptor. */ -/* GATT specific UUIDs */ -#define BLE_UUID_GATT 0x1801 /**< Generic Attribute Profile. */ -#define BLE_UUID_GATT_CHARACTERISTIC_SERVICE_CHANGED 0x2A05 /**< Service Changed Characteristic. */ -/* GAP specific UUIDs */ -#define BLE_UUID_GAP 0x1800 /**< Generic Access Profile. */ -#define BLE_UUID_GAP_CHARACTERISTIC_DEVICE_NAME 0x2A00 /**< Device Name Characteristic. */ -#define BLE_UUID_GAP_CHARACTERISTIC_APPEARANCE 0x2A01 /**< Appearance Characteristic. */ -#define BLE_UUID_GAP_CHARACTERISTIC_RECONN_ADDR 0x2A03 /**< Reconnection Address Characteristic. */ -#define BLE_UUID_GAP_CHARACTERISTIC_PPCP 0x2A04 /**< Peripheral Preferred Connection Parameters Characteristic. */ -#define BLE_UUID_GAP_CHARACTERISTIC_CAR 0x2AA6 /**< Central Address Resolution Characteristic. */ -#define BLE_UUID_GAP_CHARACTERISTIC_RPA_ONLY 0x2AC9 /**< Resolvable Private Address Only Characteristic. */ -/** @} */ - - -/** @defgroup BLE_UUID_TYPES Types of UUID - * @{ */ -#define BLE_UUID_TYPE_UNKNOWN 0x00 /**< Invalid UUID type. */ -#define BLE_UUID_TYPE_BLE 0x01 /**< Bluetooth SIG UUID (16-bit). */ -#define BLE_UUID_TYPE_VENDOR_BEGIN 0x02 /**< Vendor UUID types start at this index (128-bit). */ -/** @} */ - - -/** @defgroup BLE_APPEARANCES Bluetooth Appearance values - * @note Retrieved from http://developer.bluetooth.org/gatt/characteristics/Pages/CharacteristicViewer.aspx?u=org.bluetooth.characteristic.gap.appearance.xml - * @{ */ -#define BLE_APPEARANCE_UNKNOWN 0 /**< Unknown. */ -#define BLE_APPEARANCE_GENERIC_PHONE 64 /**< Generic Phone. */ -#define BLE_APPEARANCE_GENERIC_COMPUTER 128 /**< Generic Computer. */ -#define BLE_APPEARANCE_GENERIC_WATCH 192 /**< Generic Watch. */ -#define BLE_APPEARANCE_WATCH_SPORTS_WATCH 193 /**< Watch: Sports Watch. */ -#define BLE_APPEARANCE_GENERIC_CLOCK 256 /**< Generic Clock. */ -#define BLE_APPEARANCE_GENERIC_DISPLAY 320 /**< Generic Display. */ -#define BLE_APPEARANCE_GENERIC_REMOTE_CONTROL 384 /**< Generic Remote Control. */ -#define BLE_APPEARANCE_GENERIC_EYE_GLASSES 448 /**< Generic Eye-glasses. */ -#define BLE_APPEARANCE_GENERIC_TAG 512 /**< Generic Tag. */ -#define BLE_APPEARANCE_GENERIC_KEYRING 576 /**< Generic Keyring. */ -#define BLE_APPEARANCE_GENERIC_MEDIA_PLAYER 640 /**< Generic Media Player. */ -#define BLE_APPEARANCE_GENERIC_BARCODE_SCANNER 704 /**< Generic Barcode Scanner. */ -#define BLE_APPEARANCE_GENERIC_THERMOMETER 768 /**< Generic Thermometer. */ -#define BLE_APPEARANCE_THERMOMETER_EAR 769 /**< Thermometer: Ear. */ -#define BLE_APPEARANCE_GENERIC_HEART_RATE_SENSOR 832 /**< Generic Heart rate Sensor. */ -#define BLE_APPEARANCE_HEART_RATE_SENSOR_HEART_RATE_BELT 833 /**< Heart Rate Sensor: Heart Rate Belt. */ -#define BLE_APPEARANCE_GENERIC_BLOOD_PRESSURE 896 /**< Generic Blood Pressure. */ -#define BLE_APPEARANCE_BLOOD_PRESSURE_ARM 897 /**< Blood Pressure: Arm. */ -#define BLE_APPEARANCE_BLOOD_PRESSURE_WRIST 898 /**< Blood Pressure: Wrist. */ -#define BLE_APPEARANCE_GENERIC_HID 960 /**< Human Interface Device (HID). */ -#define BLE_APPEARANCE_HID_KEYBOARD 961 /**< Keyboard (HID Subtype). */ -#define BLE_APPEARANCE_HID_MOUSE 962 /**< Mouse (HID Subtype). */ -#define BLE_APPEARANCE_HID_JOYSTICK 963 /**< Joystick (HID Subtype). */ -#define BLE_APPEARANCE_HID_GAMEPAD 964 /**< Gamepad (HID Subtype). */ -#define BLE_APPEARANCE_HID_DIGITIZERSUBTYPE 965 /**< Digitizer Tablet (HID Subtype). */ -#define BLE_APPEARANCE_HID_CARD_READER 966 /**< Card Reader (HID Subtype). */ -#define BLE_APPEARANCE_HID_DIGITAL_PEN 967 /**< Digital Pen (HID Subtype). */ -#define BLE_APPEARANCE_HID_BARCODE 968 /**< Barcode Scanner (HID Subtype). */ -#define BLE_APPEARANCE_GENERIC_GLUCOSE_METER 1024 /**< Generic Glucose Meter. */ -#define BLE_APPEARANCE_GENERIC_RUNNING_WALKING_SENSOR 1088 /**< Generic Running Walking Sensor. */ -#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_IN_SHOE 1089 /**< Running Walking Sensor: In-Shoe. */ -#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_SHOE 1090 /**< Running Walking Sensor: On-Shoe. */ -#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_HIP 1091 /**< Running Walking Sensor: On-Hip. */ -#define BLE_APPEARANCE_GENERIC_CYCLING 1152 /**< Generic Cycling. */ -#define BLE_APPEARANCE_CYCLING_CYCLING_COMPUTER 1153 /**< Cycling: Cycling Computer. */ -#define BLE_APPEARANCE_CYCLING_SPEED_SENSOR 1154 /**< Cycling: Speed Sensor. */ -#define BLE_APPEARANCE_CYCLING_CADENCE_SENSOR 1155 /**< Cycling: Cadence Sensor. */ -#define BLE_APPEARANCE_CYCLING_POWER_SENSOR 1156 /**< Cycling: Power Sensor. */ -#define BLE_APPEARANCE_CYCLING_SPEED_CADENCE_SENSOR 1157 /**< Cycling: Speed and Cadence Sensor. */ -#define BLE_APPEARANCE_GENERIC_PULSE_OXIMETER 3136 /**< Generic Pulse Oximeter. */ -#define BLE_APPEARANCE_PULSE_OXIMETER_FINGERTIP 3137 /**< Fingertip (Pulse Oximeter subtype). */ -#define BLE_APPEARANCE_PULSE_OXIMETER_WRIST_WORN 3138 /**< Wrist Worn(Pulse Oximeter subtype). */ -#define BLE_APPEARANCE_GENERIC_WEIGHT_SCALE 3200 /**< Generic Weight Scale. */ -#define BLE_APPEARANCE_GENERIC_OUTDOOR_SPORTS_ACT 5184 /**< Generic Outdoor Sports Activity. */ -#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_DISP 5185 /**< Location Display Device (Outdoor Sports Activity subtype). */ -#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_DISP 5186 /**< Location and Navigation Display Device (Outdoor Sports Activity subtype). */ -#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_POD 5187 /**< Location Pod (Outdoor Sports Activity subtype). */ -#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_POD 5188 /**< Location and Navigation Pod (Outdoor Sports Activity subtype). */ -/** @} */ - -/** @brief Set .type and .uuid fields of ble_uuid_struct to specified UUID value. */ -#define BLE_UUID_BLE_ASSIGN(instance, value) do {\ - instance.type = BLE_UUID_TYPE_BLE; \ - instance.uuid = value;} while(0) - -/** @brief Copy type and uuid members from src to dst ble_uuid_t pointer. Both pointers must be valid/non-null. */ -#define BLE_UUID_COPY_PTR(dst, src) do {\ - (dst)->type = (src)->type; \ - (dst)->uuid = (src)->uuid;} while(0) - -/** @brief Copy type and uuid members from src to dst ble_uuid_t struct. */ -#define BLE_UUID_COPY_INST(dst, src) do {\ - (dst).type = (src).type; \ - (dst).uuid = (src).uuid;} while(0) - -/** @brief Compare for equality both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */ -#define BLE_UUID_EQ(p_uuid1, p_uuid2) \ - (((p_uuid1)->type == (p_uuid2)->type) && ((p_uuid1)->uuid == (p_uuid2)->uuid)) - -/** @brief Compare for difference both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */ -#define BLE_UUID_NEQ(p_uuid1, p_uuid2) \ - (((p_uuid1)->type != (p_uuid2)->type) || ((p_uuid1)->uuid != (p_uuid2)->uuid)) - -/** @} */ - -/** @addtogroup BLE_TYPES_STRUCTURES Structures - * @{ */ - -/** @brief 128 bit UUID values. */ -typedef struct -{ - uint8_t uuid128[16]; /**< Little-Endian UUID bytes. */ -} ble_uuid128_t; - -/** @brief Bluetooth Low Energy UUID type, encapsulates both 16-bit and 128-bit UUIDs. */ -typedef struct -{ - uint16_t uuid; /**< 16-bit UUID value or octets 12-13 of 128-bit UUID. */ - uint8_t type; /**< UUID type, see @ref BLE_UUID_TYPES. If type is @ref BLE_UUID_TYPE_UNKNOWN, the value of uuid is undefined. */ -} ble_uuid_t; - -/**@brief Data structure. */ -typedef struct -{ - uint8_t *p_data; /**< Pointer to the data buffer provided to/from the application. */ - uint16_t len; /**< Length of the data buffer, in bytes. */ -} ble_data_t; - -/** @} */ -#ifdef __cplusplus -} -#endif - -#endif /* BLE_TYPES_H__ */ - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf52/nrf_mbr.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf52/nrf_mbr.h deleted file mode 100644 index c95bb8d4fd7..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf52/nrf_mbr.h +++ /dev/null @@ -1,228 +0,0 @@ -/* - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @defgroup nrf_mbr_api Master Boot Record API - @{ - - @brief APIs for updating SoftDevice and BootLoader - -*/ - -#ifndef NRF_MBR_H__ -#define NRF_MBR_H__ - -#include "nrf_svc.h" -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup NRF_MBR_DEFINES Defines - * @{ */ - -/**@brief MBR SVC Base number. */ -#define MBR_SVC_BASE (0x18) - -/**@brief Page size in words. */ -#define MBR_PAGE_SIZE_IN_WORDS (1024) - -/** @brief The size that must be reserved for the MBR when a SoftDevice is written to flash. -This is the offset where the first byte of the SoftDevice hex file is written.*/ -#define MBR_SIZE (0x1000) - -/** @} */ - -/** @addtogroup NRF_MBR_ENUMS Enumerations - * @{ */ - -/**@brief nRF Master Boot Record API SVC numbers. */ -enum NRF_MBR_SVCS -{ - SD_MBR_COMMAND = MBR_SVC_BASE, /**< ::sd_mbr_command */ -}; - -/**@brief Possible values for ::sd_mbr_command_t.command */ -enum NRF_MBR_COMMANDS -{ - SD_MBR_COMMAND_COPY_BL, /**< Copy a new BootLoader. @see sd_mbr_command_copy_bl_t*/ - SD_MBR_COMMAND_COPY_SD, /**< Copy a new SoftDevice. @see ::sd_mbr_command_copy_sd_t*/ - SD_MBR_COMMAND_INIT_SD, /**< Initialize forwarding interrupts to SD, and run reset function in SD*/ - SD_MBR_COMMAND_COMPARE, /**< This command works like memcmp. @see ::sd_mbr_command_compare_t*/ - SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET, /**< Change the address the MBR starts after a reset @see ::sd_mbr_command_vector_table_base_set_t*/ - SD_MBR_COMMAND_RESERVED, - SD_MBR_COMMAND_IRQ_FORWARD_ADDRESS_SET, /**< Start forwarding all interrupts to this address @see ::sd_mbr_command_irq_forward_address_set_t*/ -}; - -/** @} */ - -/** @addtogroup NRF_MBR_TYPES Types - * @{ */ - -/**@brief This command copies part of a new SoftDevice - * The destination area is erased before copying. - * If dst is in the middle of a flash page, that whole flash page will be erased. - * If (dst+len) is in the middle of a flash page, that whole flash page will be erased. - * - * The user of this function is responsible for setting the BPROT registers. - * - * @retval ::NRF_SUCCESS indicates that the contents of the memory blocks where copied correctly. - * @retval ::NRF_ERROR_INTERNAL indicates that the contents of the memory blocks where not verified correctly after copying. - */ -typedef struct -{ - uint32_t *src; /**< Pointer to the source of data to be copied.*/ - uint32_t *dst; /**< Pointer to the destination where the content is to be copied.*/ - uint32_t len; /**< Number of 32 bit words to copy. Must be a multiple of @ref MBR_PAGE_SIZE_IN_WORDS words.*/ -} sd_mbr_command_copy_sd_t; - - -/**@brief This command works like memcmp, but takes the length in words. - * - * @retval ::NRF_SUCCESS indicates that the contents of both memory blocks are equal. - * @retval ::NRF_ERROR_NULL indicates that the contents of the memory blocks are not equal. - */ -typedef struct -{ - uint32_t *ptr1; /**< Pointer to block of memory. */ - uint32_t *ptr2; /**< Pointer to block of memory. */ - uint32_t len; /**< Number of 32 bit words to compare.*/ -} sd_mbr_command_compare_t; - - -/**@brief This command copies a new BootLoader. - * With this command, destination of BootLoader is always the address written in NRF_UICR->BOOTADDR. - * - * Destination is erased by this function. - * If (destination+bl_len) is in the middle of a flash page, that whole flash page will be erased. - * - * This function will use PROTENSET to protect the flash that is not intended to be written. - * - * On success, this function will not return. It will start the new BootLoader from reset-vector as normal. - * - * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. - * @retval ::NRF_ERROR_FORBIDDEN if NRF_UICR->BOOTADDR is not set. - * @retval ::NRF_ERROR_INVALID_LENGTH if parameters attempts to read or write outside flash area. - * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) - */ -typedef struct -{ - uint32_t *bl_src; /**< Pointer to the source of the Bootloader to be be copied.*/ - uint32_t bl_len; /**< Number of 32 bit words to copy for BootLoader. */ -} sd_mbr_command_copy_bl_t; - -/**@brief Change the address the MBR starts after a reset - * - * Once this function has been called, this address is where the MBR will start to forward interrupts to after a reset. - * - * To restore default forwarding this function should be called with @param address set to 0. - * The MBR will then start forwarding to interrupts to the address in NFR_UICR->BOOTADDR or to the SoftDevice if the BOOTADDR is not set. - * - * On success, this function will not return. It will reset the device. - * - * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. - * @retval ::NRF_ERROR_INVALID_ADDR if parameter address is outside of the flash size. - * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) - */ -typedef struct -{ - uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ -} sd_mbr_command_vector_table_base_set_t; - -/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the MBR - * Unlike sd_mbr_command_vector_table_base_set_t, this function does not reset, and it does not - * change where the MBR starts after reset. - * - * @retval ::NRF_SUCCESS - */ -typedef struct -{ - uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ -} sd_mbr_command_irq_forward_address_set_t; - -typedef struct -{ - uint32_t command; /**< type of command to be issued see @ref NRF_MBR_COMMANDS. */ - union - { - sd_mbr_command_copy_sd_t copy_sd; /**< Parameters for copy SoftDevice.*/ - sd_mbr_command_compare_t compare; /**< Parameters for verify.*/ - sd_mbr_command_copy_bl_t copy_bl; /**< Parameters for copy BootLoader. Requires parameter page. */ - sd_mbr_command_vector_table_base_set_t base_set; /**< Parameters for vector table base set. Requires parameter page.*/ - sd_mbr_command_irq_forward_address_set_t irq_forward_address_set; /**< Parameters for irq forward address set*/ - } params; -} sd_mbr_command_t; - -/** @} */ - -/** @addtogroup NRF_MBR_FUNCTIONS Functions - * @{ */ - -/**@brief Issue Master Boot Record commands - * - * Commands used when updating a SoftDevice and bootloader. - * - * The SD_MBR_COMMAND_COPY_BL and SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET requires parameters to be - * retained by the MBR when resetting the IC. This is done in a separate flash page - * provided by the application. The UICR register UICR.NRFFW[1] must be set - * to an address corresponding to a page in the application flash space. This page will be cleared - * by the MBR and used to store the command before reset. When the UICR.NRFFW[1] field is set - * the page it refers to must not be used by the application. If the UICR.NRFFW[1] is set to - * 0xFFFFFFFF (the default) MBR commands which use flash will be unavailable and return - * NRF_ERROR_NO_MEM. - * - * @param[in] param Pointer to a struct describing the command. - * - * @note For return values, see ::sd_mbr_command_copy_sd_t ::sd_mbr_command_copy_bl_t ::sd_mbr_command_compare_t ::sd_mbr_command_vector_table_base_set_t ::sd_mbr_command_irq_forward_address_set_t - * - * @retval NRF_ERROR_NO_MEM if UICR.NRFFW[1] is not set (i.e. is 0xFFFFFFFF). - * @retval NRF_ERROR_INVALID_PARAM if an invalid command is given. -*/ -SVCALL(SD_MBR_COMMAND, uint32_t, sd_mbr_command(sd_mbr_command_t* param)); - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // NRF_MBR_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_ble.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_ble.h deleted file mode 100644 index 470577b8aa2..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_ble.h +++ /dev/null @@ -1,620 +0,0 @@ -/* - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup BLE_COMMON BLE SoftDevice Common - @{ - @defgroup ble_api Events, type definitions and API calls - @{ - - @brief Module independent events, type definitions and API calls for the BLE SoftDevice. - - */ - -#ifndef BLE_H__ -#define BLE_H__ - -#include "ble_ranges.h" -#include "ble_types.h" -#include "ble_gap.h" -#include "ble_l2cap.h" -#include "ble_gatt.h" -#include "ble_gattc.h" -#include "ble_gatts.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_COMMON_ENUMERATIONS Enumerations - * @{ */ - -/** - * @brief Common API SVC numbers. - */ -enum BLE_COMMON_SVCS -{ - SD_BLE_ENABLE = BLE_SVC_BASE, /**< Enable and initialize the BLE stack */ - SD_BLE_EVT_GET, /**< Get an event from the pending events queue. */ - SD_BLE_UUID_VS_ADD, /**< Add a Vendor Specific UUID. */ - SD_BLE_UUID_DECODE, /**< Decode UUID bytes. */ - SD_BLE_UUID_ENCODE, /**< Encode UUID bytes. */ - SD_BLE_VERSION_GET, /**< Get the local version information (company ID, Link Layer Version, Link Layer Subversion). */ - SD_BLE_USER_MEM_REPLY, /**< User Memory Reply. */ - SD_BLE_OPT_SET, /**< Set a BLE option. */ - SD_BLE_OPT_GET, /**< Get a BLE option. */ - SD_BLE_CFG_SET, /**< Add a configuration to the BLE stack. */ -}; - -/** - * @brief BLE Module Independent Event IDs. - */ -enum BLE_COMMON_EVTS -{ - BLE_EVT_USER_MEM_REQUEST = BLE_EVT_BASE, /**< User Memory request. @ref ble_evt_user_mem_request_t */ - BLE_EVT_USER_MEM_RELEASE, /**< User Memory release. @ref ble_evt_user_mem_release_t */ -}; - -/**@brief BLE Connection Configuration IDs. - * - * IDs that uniquely identify a connection configuration. - */ -enum BLE_CONN_CFGS -{ - BLE_CONN_CFG_GAP = BLE_CONN_CFG_BASE, /**< BLE GAP specific connection configuration. */ - BLE_CONN_CFG_GATTC, /**< BLE GATTC specific connection configuration. */ - BLE_CONN_CFG_GATTS, /**< BLE GATTS specific connection configuration. */ - BLE_CONN_CFG_GATT, /**< BLE GATT specific connection configuration. */ - BLE_CONN_CFG_L2CAP, /**< BLE L2CAP specific connection configuration. */ -}; - -/**@brief BLE Common Configuration IDs. - * - * IDs that uniquely identify a common configuration. - */ -enum BLE_COMMON_CFGS -{ - BLE_COMMON_CFG_VS_UUID = BLE_CFG_BASE, /**< Vendor specific UUID configuration */ -}; - -/**@brief Common Option IDs. - * IDs that uniquely identify a common option. - */ -enum BLE_COMMON_OPTS -{ - BLE_COMMON_OPT_PA_LNA = BLE_OPT_BASE, /**< PA and LNA options */ - BLE_COMMON_OPT_CONN_EVT_EXT, /**< Extended connection events option */ -}; - -/** @} */ - -/** @addtogroup BLE_COMMON_DEFINES Defines - * @{ */ - -/** @brief Required pointer alignment for BLE Events. -*/ -#define BLE_EVT_PTR_ALIGNMENT 4 - -/** @brief Leaves the maximum of the two arguments. -*/ -#define BLE_MAX(a, b) ((a) < (b) ? (b) : (a)) - -/** @brief Maximum possible length for BLE Events. - * @note The highest value used for @ref ble_gatt_conn_cfg_t::att_mtu in any connection configuration shall be used as a parameter. - * If that value has not been configured for any connections then @ref BLE_GATT_ATT_MTU_DEFAULT must be used instead. -*/ -#define BLE_EVT_LEN_MAX(ATT_MTU) (BLE_MAX( \ - sizeof(ble_evt_t), \ - BLE_MAX( \ - offsetof(ble_evt_t, evt.gattc_evt.params.rel_disc_rsp.includes) + ((ATT_MTU) - 2) / 6 * sizeof(ble_gattc_include_t), \ - offsetof(ble_evt_t, evt.gattc_evt.params.attr_info_disc_rsp.info.attr_info16) + ((ATT_MTU) - 2) / 4 * sizeof(ble_gattc_attr_info16_t) \ - ) \ -)) - -/** @defgroup BLE_USER_MEM_TYPES User Memory Types - * @{ */ -#define BLE_USER_MEM_TYPE_INVALID 0x00 /**< Invalid User Memory Types. */ -#define BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES 0x01 /**< User Memory for GATTS queued writes. */ -/** @} */ - -/** @defgroup BLE_UUID_VS_COUNTS Vendor Specific UUID counts - * @{ - */ -#define BLE_UUID_VS_COUNT_DEFAULT 10 /**< Default VS UUID count. */ -#define BLE_UUID_VS_COUNT_MAX 254 /**< Maximum VS UUID count. */ -/** @} */ - -/** @defgroup BLE_COMMON_CFG_DEFAULTS Configuration defaults. - * @{ - */ -#define BLE_CONN_CFG_TAG_DEFAULT 0 /**< Default configuration tag, SoftDevice default connection configuration. */ - -/** @} */ - -/** @} */ - -/** @addtogroup BLE_COMMON_STRUCTURES Structures - * @{ */ - -/**@brief User Memory Block. */ -typedef struct -{ - uint8_t *p_mem; /**< Pointer to the start of the user memory block. */ - uint16_t len; /**< Length in bytes of the user memory block. */ -} ble_user_mem_block_t; - -/**@brief Event structure for @ref BLE_EVT_USER_MEM_REQUEST. */ -typedef struct -{ - uint8_t type; /**< User memory type, see @ref BLE_USER_MEM_TYPES. */ -} ble_evt_user_mem_request_t; - -/**@brief Event structure for @ref BLE_EVT_USER_MEM_RELEASE. */ -typedef struct -{ - uint8_t type; /**< User memory type, see @ref BLE_USER_MEM_TYPES. */ - ble_user_mem_block_t mem_block; /**< User memory block */ -} ble_evt_user_mem_release_t; - -/**@brief Event structure for events not associated with a specific function module. */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle on which this event occurred. */ - union - { - ble_evt_user_mem_request_t user_mem_request; /**< User Memory Request Event Parameters. */ - ble_evt_user_mem_release_t user_mem_release; /**< User Memory Release Event Parameters. */ - } params; /**< Event parameter union. */ -} ble_common_evt_t; - -/**@brief BLE Event header. */ -typedef struct -{ - uint16_t evt_id; /**< Value from a BLE__EVT series. */ - uint16_t evt_len; /**< Length in octets including this header. */ -} ble_evt_hdr_t; - -/**@brief Common BLE Event type, wrapping the module specific event reports. */ -typedef struct -{ - ble_evt_hdr_t header; /**< Event header. */ - union - { - ble_common_evt_t common_evt; /**< Common Event, evt_id in BLE_EVT_* series. */ - ble_gap_evt_t gap_evt; /**< GAP originated event, evt_id in BLE_GAP_EVT_* series. */ - ble_gattc_evt_t gattc_evt; /**< GATT client originated event, evt_id in BLE_GATTC_EVT* series. */ - ble_gatts_evt_t gatts_evt; /**< GATT server originated event, evt_id in BLE_GATTS_EVT* series. */ - ble_l2cap_evt_t l2cap_evt; /**< L2CAP originated event, evt_id in BLE_L2CAP_EVT* series. */ - } evt; /**< Event union. */ -} ble_evt_t; - - -/** - * @brief Version Information. - */ -typedef struct -{ - uint8_t version_number; /**< Link Layer Version number. See https://www.bluetooth.org/en-us/specification/assigned-numbers/link-layer for assigned values. */ - uint16_t company_id; /**< Company ID, Nordic Semiconductor's company ID is 89 (0x0059) (https://www.bluetooth.org/apps/content/Default.aspx?doc_id=49708). */ - uint16_t subversion_number; /**< Link Layer Sub Version number, corresponds to the SoftDevice Config ID or Firmware ID (FWID). */ -} ble_version_t; - -/** - * @brief Configuration parameters for the PA and LNA. - */ -typedef struct -{ - uint8_t enable :1; /**< Enable toggling for this amplifier */ - uint8_t active_high :1; /**< Set the pin to be active high */ - uint8_t gpio_pin :6; /**< The GPIO pin to toggle for this amplifier */ -} ble_pa_lna_cfg_t; - -/** - * @brief PA & LNA GPIO toggle configuration - * - * This option configures the SoftDevice to toggle pins when the radio is active for use with a power amplifier and/or - * a low noise amplifier. - * - * Toggling the pins is achieved by using two PPI channels and a GPIOTE channel. The hardware channel IDs are provided - * by the application and should be regarded as reserved as long as any PA/LNA toggling is enabled. - * - * @note @ref sd_ble_opt_get is not supported for this option. - * @note Setting this option while the radio is in use (i.e. any of the roles are active) may have undefined consequences - * and must be avoided by the application. - */ -typedef struct -{ - ble_pa_lna_cfg_t pa_cfg; /**< Power Amplifier configuration */ - ble_pa_lna_cfg_t lna_cfg; /**< Low Noise Amplifier configuration */ - - uint8_t ppi_ch_id_set; /**< PPI channel used for radio pin setting */ - uint8_t ppi_ch_id_clr; /**< PPI channel used for radio pin clearing */ - uint8_t gpiote_ch_id; /**< GPIOTE channel used for radio pin toggling */ -} ble_common_opt_pa_lna_t; - -/** - * @brief Configuration of extended BLE connection events. - * - * When enabled the SoftDevice will dynamically extend the connection event when possible. - * - * The connection event length is controlled by the connection configuration as set by @ref ble_gap_conn_cfg_t::event_length. - * The connection event can be extended if there is time to send another packet pair before the start of the next connection interval, - * and if there are no conflicts with other BLE roles requesting radio time. - * - * @note @ref sd_ble_opt_get is not supported for this option. - */ -typedef struct -{ - uint8_t enable : 1; /**< Enable extended BLE connection events, disabled by default. */ -} ble_common_opt_conn_evt_ext_t; - -/**@brief Option structure for common options. */ -typedef union -{ - ble_common_opt_pa_lna_t pa_lna; /**< Parameters for controlling PA and LNA pin toggling. */ - ble_common_opt_conn_evt_ext_t conn_evt_ext; /**< Parameters for enabling extended connection events. */ -} ble_common_opt_t; - -/**@brief Common BLE Option type, wrapping the module specific options. */ -typedef union -{ - ble_common_opt_t common_opt; /**< COMMON options, opt_id in @ref BLE_COMMON_OPTS series. */ - ble_gap_opt_t gap_opt; /**< GAP option, opt_id in @ref BLE_GAP_OPTS series. */ -} ble_opt_t; - -/**@brief BLE connection configuration type, wrapping the module specific configurations, set with - * @ref sd_ble_cfg_set. - * - * @note Connection configurations don't have to be set. - * In the case that no configurations has been set, or fewer connection configurations has been set than enabled connections, - * the default connection configuration will be automatically added for the remaining connections. - * When creating connections with the default configuration, @ref BLE_CONN_CFG_TAG_DEFAULT should be used in - * place of @ref ble_conn_cfg_t::conn_cfg_tag. See @ref sd_ble_gap_adv_start() and @ref sd_ble_gap_connect()" - * - * @mscs - * @mmsc{@ref BLE_CONN_CFG} - * @endmscs - - */ -typedef struct -{ - uint8_t conn_cfg_tag; /**< The application chosen tag it can use with the @ref sd_ble_gap_adv_start() and @ref sd_ble_gap_connect() - calls to select this configuration when creating a connection. - Must be different for all connection configurations added and not @ref BLE_CONN_CFG_TAG_DEFAULT. */ - union { - ble_gap_conn_cfg_t gap_conn_cfg; /**< GAP connection configuration, cfg_id is @ref BLE_CONN_CFG_GAP. */ - ble_gattc_conn_cfg_t gattc_conn_cfg; /**< GATTC connection configuration, cfg_id is @ref BLE_CONN_CFG_GATTC. */ - ble_gatts_conn_cfg_t gatts_conn_cfg; /**< GATTS connection configuration, cfg_id is @ref BLE_CONN_CFG_GATTS. */ - ble_gatt_conn_cfg_t gatt_conn_cfg; /**< GATT connection configuration, cfg_id is @ref BLE_CONN_CFG_GATT. */ - ble_l2cap_conn_cfg_t l2cap_conn_cfg; /**< L2CAP connection configuration, cfg_id is @ref BLE_CONN_CFG_L2CAP. */ - } params; /**< Connection configuration union. */ -} ble_conn_cfg_t; - -/** - * @brief Configuration of Vendor Specific UUIDs, set with @ref sd_ble_cfg_set. - * - * @retval ::NRF_ERROR_INVALID_PARAM Too many UUIDs configured. - */ -typedef struct -{ - uint8_t vs_uuid_count; /**< Number of 128-bit Vendor Specific UUID bases to allocate memory for. - Default value is @ref BLE_UUID_VS_COUNT_DEFAULT. Maximum value is - @ref BLE_UUID_VS_COUNT_MAX. */ -} ble_common_cfg_vs_uuid_t; - -/**@brief Common BLE Configuration type, wrapping the common configurations. */ -typedef union -{ - ble_common_cfg_vs_uuid_t vs_uuid_cfg; /**< Vendor specific UUID configuration, cfg_id is @ref BLE_COMMON_CFG_VS_UUID. */ -} ble_common_cfg_t; - -/**@brief BLE Configuration type, wrapping the module specific configurations. */ -typedef union -{ - ble_conn_cfg_t conn_cfg; /**< Connection specific configurations, cfg_id in @ref BLE_CONN_CFGS series. */ - ble_common_cfg_t common_cfg; /**< Global common configurations, cfg_id in @ref BLE_COMMON_CFGS series. */ - ble_gap_cfg_t gap_cfg; /**< Global GAP configurations, cfg_id in @ref BLE_GAP_CFGS series. */ - ble_gatts_cfg_t gatts_cfg; /**< Global GATTS configuration, cfg_id in @ref BLE_GATTS_CFGS series. */ -} ble_cfg_t; - -/** @} */ - -/** @addtogroup BLE_COMMON_FUNCTIONS Functions - * @{ */ - -/**@brief Enable the BLE stack - * - * @param[in, out] p_app_ram_base Pointer to a variable containing the start address of the - * application RAM region (APP_RAM_BASE). On return, this will - * contain the minimum start address of the application RAM region - * required by the SoftDevice for this configuration. - * - * @note The memory requirement for a specific configuration will not increase between SoftDevices - * with the same major version number. - * - * @note The value of *p_app_ram_base when the app has done no custom configuration of the - * SoftDevice, i.e. the app has not called @ref sd_ble_cfg_set before @ref sd_ble_enable, can - * be found in the release notes. - * - * @note At runtime the IC's RAM is split into 2 regions: The SoftDevice RAM region is located - * between 0x20000000 and APP_RAM_BASE-1 and the application's RAM region is located between - * APP_RAM_BASE and the start of the call stack. - * - * @details This call initializes the BLE stack, no BLE related function other than @ref - * sd_ble_cfg_set can be called before this one. - * - * @mscs - * @mmsc{@ref BLE_COMMON_ENABLE} - * @endmscs - * - * @retval ::NRF_SUCCESS The BLE stack has been initialized successfully. - * @retval ::NRF_ERROR_INVALID_STATE The BLE stack had already been initialized and cannot be reinitialized. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. - * @retval ::NRF_ERROR_NO_MEM The amount of memory assigned to the SoftDevice by *p_app_ram_base is not - * large enough to fit this configuration's memory requirement. Check *p_app_ram_base - * and set the start address of the application RAM region accordingly. - */ -SVCALL(SD_BLE_ENABLE, uint32_t, sd_ble_enable(uint32_t * p_app_ram_base)); - -/**@brief Add configurations for the BLE stack - * - * @param[in] cfg_id Config ID, see @ref BLE_CONN_CFGS, @ref BLE_COMMON_CFGS, @ref - * BLE_GAP_CFGS or @ref BLE_GATTS_CFGS. - * @param[in] p_cfg Pointer to a ble_cfg_t structure containing the configuration value. - * @param[in] app_ram_base The start address of the application RAM region (APP_RAM_BASE). - * See @ref sd_ble_enable for details about APP_RAM_BASE. - * - * @note The memory requirement for a specific configuration will not increase between SoftDevices - * with the same major version number. - * - * @note If a configuration is set more than once, the last one set is the one that takes effect on - * @ref sd_ble_enable. - * - * @note Any part of the BLE stack that is NOT configured with @ref sd_ble_cfg_set will have default - * configuration. - * - * @note @ref sd_ble_cfg_set may be called at any time when the SoftDevice is enabled (see @ref - * sd_softdevice_enable) while the BLE part of the SoftDevice is not enabled (see @ref - * sd_ble_enable). - * - * @note Error codes for the configurations are described in the configuration structs. - * - * @mscs - * @mmsc{@ref BLE_COMMON_ENABLE} - * @endmscs - * - * @retval ::NRF_SUCCESS The configuration has been added successfully. - * @retval ::NRF_ERROR_INVALID_STATE The BLE stack had already been initialized. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid cfg_id supplied. - * @retval ::NRF_ERROR_NO_MEM The amount of memory assigned to the SoftDevice by app_ram_base is not - * large enough to fit this configuration's memory requirement. - */ -SVCALL(SD_BLE_CFG_SET, uint32_t, sd_ble_cfg_set(uint32_t cfg_id, ble_cfg_t const * p_cfg, uint32_t app_ram_base)); - -/**@brief Get an event from the pending events queue. - * - * @param[out] p_dest Pointer to buffer to be filled in with an event, or NULL to retrieve the event length. - * This buffer must be aligned to the extend defined by @ref BLE_EVT_PTR_ALIGNMENT. - * The buffer should be interpreted as a @ref ble_evt_t struct. - * @param[in, out] p_len Pointer the length of the buffer, on return it is filled with the event length. - * - * @details This call allows the application to pull a BLE event from the BLE stack. The application is signaled that - * an event is available from the BLE stack by the triggering of the SD_EVT_IRQn interrupt. - * The application is free to choose whether to call this function from thread mode (main context) or directly from the - * Interrupt Service Routine that maps to SD_EVT_IRQn. In any case however, and because the BLE stack runs at a higher - * priority than the application, this function should be called in a loop (until @ref NRF_ERROR_NOT_FOUND is returned) - * every time SD_EVT_IRQn is raised to ensure that all available events are pulled from the BLE stack. Failure to do so - * could potentially leave events in the internal queue without the application being aware of this fact. - * - * Sizing the p_dest buffer is equally important, since the application needs to provide all the memory necessary for the event to - * be copied into application memory. If the buffer provided is not large enough to fit the entire contents of the event, - * @ref NRF_ERROR_DATA_SIZE will be returned and the application can then call again with a larger buffer size. - * The maximum possible event length is defined by @ref BLE_EVT_LEN_MAX. The application may also "peek" the event length - * by providing p_dest as a NULL pointer and inspecting the value of *p_len upon return: - * - * \code - * uint16_t len; - * errcode = sd_ble_evt_get(NULL, &len); - * \endcode - * - * @mscs - * @mmsc{@ref BLE_COMMON_IRQ_EVT_MSC} - * @mmsc{@ref BLE_COMMON_THREAD_EVT_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Event pulled and stored into the supplied buffer. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. - * @retval ::NRF_ERROR_NOT_FOUND No events ready to be pulled. - * @retval ::NRF_ERROR_DATA_SIZE Event ready but could not fit into the supplied buffer. - */ -SVCALL(SD_BLE_EVT_GET, uint32_t, sd_ble_evt_get(uint8_t *p_dest, uint16_t *p_len)); - - -/**@brief Add a Vendor Specific base UUID. - * - * @details This call enables the application to add a vendor specific base UUID to the BLE stack's table, for later - * use with all other modules and APIs. This then allows the application to use the shorter, 24-bit @ref ble_uuid_t - * format when dealing with both 16-bit and 128-bit UUIDs without having to check for lengths and having split code - * paths. This is accomplished by extending the grouping mechanism that the Bluetooth SIG standard base UUID uses - * for all other 128-bit UUIDs. The type field in the @ref ble_uuid_t structure is an index (relative to - * @ref BLE_UUID_TYPE_VENDOR_BEGIN) to the table populated by multiple calls to this function, and the UUID field - * in the same structure contains the 2 bytes at indexes 12 and 13. The number of possible 128-bit UUIDs available to - * the application is therefore the number of Vendor Specific UUIDs added with the help of this function times 65536, - * although restricted to modifying bytes 12 and 13 for each of the entries in the supplied array. - * - * @note Bytes 12 and 13 of the provided UUID will not be used internally, since those are always replaced by - * the 16-bit uuid field in @ref ble_uuid_t. - * - * @note If a UUID is already present in the BLE stack's internal table, the corresponding index will be returned in - * p_uuid_type along with an NRF_SUCCESS error code. - * - * @param[in] p_vs_uuid Pointer to a 16-octet (128-bit) little endian Vendor Specific UUID disregarding - * bytes 12 and 13. - * @param[out] p_uuid_type Pointer to a uint8_t where the type field in @ref ble_uuid_t corresponding to this UUID will be stored. - * - * @retval ::NRF_SUCCESS Successfully added the Vendor Specific UUID. - * @retval ::NRF_ERROR_INVALID_ADDR If p_vs_uuid or p_uuid_type is NULL or invalid. - * @retval ::NRF_ERROR_NO_MEM If there are no more free slots for VS UUIDs. - */ -SVCALL(SD_BLE_UUID_VS_ADD, uint32_t, sd_ble_uuid_vs_add(ble_uuid128_t const *p_vs_uuid, uint8_t *p_uuid_type)); - - -/** @brief Decode little endian raw UUID bytes (16-bit or 128-bit) into a 24 bit @ref ble_uuid_t structure. - * - * @details The raw UUID bytes excluding bytes 12 and 13 (i.e. bytes 0-11 and 14-15) of p_uuid_le are compared - * to the corresponding ones in each entry of the table of vendor specific UUIDs populated with @ref sd_ble_uuid_vs_add - * to look for a match. If there is such a match, bytes 12 and 13 are returned as p_uuid->uuid and the index - * relative to @ref BLE_UUID_TYPE_VENDOR_BEGIN as p_uuid->type. - * - * @note If the UUID length supplied is 2, then the type set by this call will always be @ref BLE_UUID_TYPE_BLE. - * - * @param[in] uuid_le_len Length in bytes of the buffer pointed to by p_uuid_le (must be 2 or 16 bytes). - * @param[in] p_uuid_le Pointer pointing to little endian raw UUID bytes. - * @param[out] p_uuid Pointer to a @ref ble_uuid_t structure to be filled in. - * - * @retval ::NRF_SUCCESS Successfully decoded into the @ref ble_uuid_t structure. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_LENGTH Invalid UUID length. - * @retval ::NRF_ERROR_NOT_FOUND For a 128-bit UUID, no match in the populated table of UUIDs. - */ -SVCALL(SD_BLE_UUID_DECODE, uint32_t, sd_ble_uuid_decode(uint8_t uuid_le_len, uint8_t const *p_uuid_le, ble_uuid_t *p_uuid)); - - -/** @brief Encode a @ref ble_uuid_t structure into little endian raw UUID bytes (16-bit or 128-bit). - * - * @note The pointer to the destination buffer p_uuid_le may be NULL, in which case only the validity and size of p_uuid is computed. - * - * @param[in] p_uuid Pointer to a @ref ble_uuid_t structure that will be encoded into bytes. - * @param[out] p_uuid_le_len Pointer to a uint8_t that will be filled with the encoded length (2 or 16 bytes). - * @param[out] p_uuid_le Pointer to a buffer where the little endian raw UUID bytes (2 or 16) will be stored. - * - * @retval ::NRF_SUCCESS Successfully encoded into the buffer. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid UUID type. - */ -SVCALL(SD_BLE_UUID_ENCODE, uint32_t, sd_ble_uuid_encode(ble_uuid_t const *p_uuid, uint8_t *p_uuid_le_len, uint8_t *p_uuid_le)); - - -/**@brief Get Version Information. - * - * @details This call allows the application to get the BLE stack version information. - * - * @param[out] p_version Pointer to a ble_version_t structure to be filled in. - * - * @retval ::NRF_SUCCESS Version information stored successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY The BLE stack is busy (typically doing a locally-initiated disconnection procedure). - */ -SVCALL(SD_BLE_VERSION_GET, uint32_t, sd_ble_version_get(ble_version_t *p_version)); - - -/**@brief Provide a user memory block. - * - * @note This call can only be used as a response to a @ref BLE_EVT_USER_MEM_REQUEST event issued to the application. - * - * @param[in] conn_handle Connection handle. - * @param[in] p_block Pointer to a user memory block structure or NULL if memory is managed by the application. - * - * @mscs - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_PEER_CANCEL_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_NOAUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Successfully queued a response to the peer. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_LENGTH Invalid user memory block length supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection state or no user memory request pending. - */ -SVCALL(SD_BLE_USER_MEM_REPLY, uint32_t, sd_ble_user_mem_reply(uint16_t conn_handle, ble_user_mem_block_t const *p_block)); - -/**@brief Set a BLE option. - * - * @details This call allows the application to set the value of an option. - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC} - * @endmscs - * - * @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS. - * @param[in] p_opt Pointer to a ble_opt_t structure containing the option value. - * - * @retval ::NRF_SUCCESS Option set successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. - * @retval ::NRF_ERROR_INVALID_STATE Unable to set the parameter at this time. - * @retval ::NRF_ERROR_BUSY The BLE stack is busy or the previous procedure has not completed. - */ -SVCALL(SD_BLE_OPT_SET, uint32_t, sd_ble_opt_set(uint32_t opt_id, ble_opt_t const *p_opt)); - - -/**@brief Get a BLE option. - * - * @details This call allows the application to retrieve the value of an option. - * - * @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS. - * @param[out] p_opt Pointer to a ble_opt_t structure to be filled in. - * - * @retval ::NRF_SUCCESS Option retrieved successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. - * @retval ::NRF_ERROR_INVALID_STATE Unable to retrieve the parameter at this time. - * @retval ::NRF_ERROR_BUSY The BLE stack is busy or the previous procedure has not completed. - * @retval ::NRF_ERROR_NOT_SUPPORTED This option is not supported. - * - */ -SVCALL(SD_BLE_OPT_GET, uint32_t, sd_ble_opt_get(uint32_t opt_id, ble_opt_t *p_opt)); - -/** @} */ -#ifdef __cplusplus -} -#endif -#endif /* BLE_H__ */ - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_error.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_error.h deleted file mode 100644 index 6badee98e56..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_error.h +++ /dev/null @@ -1,90 +0,0 @@ -/* - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - - /** - @defgroup nrf_error SoftDevice Global Error Codes - @{ - - @brief Global Error definitions -*/ - -/* Header guard */ -#ifndef NRF_ERROR_H__ -#define NRF_ERROR_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/** @defgroup NRF_ERRORS_BASE Error Codes Base number definitions - * @{ */ -#define NRF_ERROR_BASE_NUM (0x0) ///< Global error base -#define NRF_ERROR_SDM_BASE_NUM (0x1000) ///< SDM error base -#define NRF_ERROR_SOC_BASE_NUM (0x2000) ///< SoC error base -#define NRF_ERROR_STK_BASE_NUM (0x3000) ///< STK error base -/** @} */ - -#define NRF_SUCCESS (NRF_ERROR_BASE_NUM + 0) ///< Successful command -#define NRF_ERROR_SVC_HANDLER_MISSING (NRF_ERROR_BASE_NUM + 1) ///< SVC handler is missing -#define NRF_ERROR_SOFTDEVICE_NOT_ENABLED (NRF_ERROR_BASE_NUM + 2) ///< SoftDevice has not been enabled -#define NRF_ERROR_INTERNAL (NRF_ERROR_BASE_NUM + 3) ///< Internal Error -#define NRF_ERROR_NO_MEM (NRF_ERROR_BASE_NUM + 4) ///< No Memory for operation -#define NRF_ERROR_NOT_FOUND (NRF_ERROR_BASE_NUM + 5) ///< Not found -#define NRF_ERROR_NOT_SUPPORTED (NRF_ERROR_BASE_NUM + 6) ///< Not supported -#define NRF_ERROR_INVALID_PARAM (NRF_ERROR_BASE_NUM + 7) ///< Invalid Parameter -#define NRF_ERROR_INVALID_STATE (NRF_ERROR_BASE_NUM + 8) ///< Invalid state, operation disallowed in this state -#define NRF_ERROR_INVALID_LENGTH (NRF_ERROR_BASE_NUM + 9) ///< Invalid Length -#define NRF_ERROR_INVALID_FLAGS (NRF_ERROR_BASE_NUM + 10) ///< Invalid Flags -#define NRF_ERROR_INVALID_DATA (NRF_ERROR_BASE_NUM + 11) ///< Invalid Data -#define NRF_ERROR_DATA_SIZE (NRF_ERROR_BASE_NUM + 12) ///< Invalid Data size -#define NRF_ERROR_TIMEOUT (NRF_ERROR_BASE_NUM + 13) ///< Operation timed out -#define NRF_ERROR_NULL (NRF_ERROR_BASE_NUM + 14) ///< Null Pointer -#define NRF_ERROR_FORBIDDEN (NRF_ERROR_BASE_NUM + 15) ///< Forbidden Operation -#define NRF_ERROR_INVALID_ADDR (NRF_ERROR_BASE_NUM + 16) ///< Bad Memory Address -#define NRF_ERROR_BUSY (NRF_ERROR_BASE_NUM + 17) ///< Busy -#define NRF_ERROR_CONN_COUNT (NRF_ERROR_BASE_NUM + 18) ///< Maximum connection count exceeded. -#define NRF_ERROR_RESOURCES (NRF_ERROR_BASE_NUM + 19) ///< Not enough resources for operation - -#ifdef __cplusplus -} -#endif -#endif // NRF_ERROR_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_error_sdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_error_sdm.h deleted file mode 100644 index 530959b9d67..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_error_sdm.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - - /** - @addtogroup nrf_sdm_api - @{ - @defgroup nrf_sdm_error SoftDevice Manager Error Codes - @{ - - @brief Error definitions for the SDM API -*/ - -/* Header guard */ -#ifndef NRF_ERROR_SDM_H__ -#define NRF_ERROR_SDM_H__ - -#include "nrf_error.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#define NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN (NRF_ERROR_SDM_BASE_NUM + 0) ///< Unknown LFCLK source. -#define NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION (NRF_ERROR_SDM_BASE_NUM + 1) ///< Incorrect interrupt configuration (can be caused by using illegal priority levels, or having enabled SoftDevice interrupts). -#define NRF_ERROR_SDM_INCORRECT_CLENR0 (NRF_ERROR_SDM_BASE_NUM + 2) ///< Incorrect CLENR0 (can be caused by erroneous SoftDevice flashing). - -#ifdef __cplusplus -} -#endif -#endif // NRF_ERROR_SDM_H__ - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_error_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_error_soc.h deleted file mode 100644 index 1e784b8db38..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_error_soc.h +++ /dev/null @@ -1,85 +0,0 @@ -/* - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @addtogroup nrf_soc_api - @{ - @defgroup nrf_soc_error SoC Library Error Codes - @{ - - @brief Error definitions for the SoC library - -*/ - -/* Header guard */ -#ifndef NRF_ERROR_SOC_H__ -#define NRF_ERROR_SOC_H__ - -#include "nrf_error.h" -#ifdef __cplusplus -extern "C" { -#endif - -/* Mutex Errors */ -#define NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN (NRF_ERROR_SOC_BASE_NUM + 0) ///< Mutex already taken - -/* NVIC errors */ -#define NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE (NRF_ERROR_SOC_BASE_NUM + 1) ///< NVIC interrupt not available -#define NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED (NRF_ERROR_SOC_BASE_NUM + 2) ///< NVIC interrupt priority not allowed -#define NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN (NRF_ERROR_SOC_BASE_NUM + 3) ///< NVIC should not return - -/* Power errors */ -#define NRF_ERROR_SOC_POWER_MODE_UNKNOWN (NRF_ERROR_SOC_BASE_NUM + 4) ///< Power mode unknown -#define NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN (NRF_ERROR_SOC_BASE_NUM + 5) ///< Power POF threshold unknown -#define NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN (NRF_ERROR_SOC_BASE_NUM + 6) ///< Power off should not return - -/* Rand errors */ -#define NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES (NRF_ERROR_SOC_BASE_NUM + 7) ///< RAND not enough values - -/* PPI errors */ -#define NRF_ERROR_SOC_PPI_INVALID_CHANNEL (NRF_ERROR_SOC_BASE_NUM + 8) ///< Invalid PPI Channel -#define NRF_ERROR_SOC_PPI_INVALID_GROUP (NRF_ERROR_SOC_BASE_NUM + 9) ///< Invalid PPI Group - -#ifdef __cplusplus -} -#endif -#endif // NRF_ERROR_SOC_H__ -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_nvic.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_nvic.h deleted file mode 100644 index 40537b45a21..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_nvic.h +++ /dev/null @@ -1,485 +0,0 @@ -/* - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * @defgroup nrf_nvic_api SoftDevice NVIC API - * @{ - * - * @note In order to use this module, the following code has to be added to a .c file: - * \code - * nrf_nvic_state_t nrf_nvic_state = {0}; - * \endcode - * - * @note Definitions and declarations starting with __ (double underscore) in this header file are - * not intended for direct use by the application. - * - * @brief APIs for the accessing NVIC when using a SoftDevice. - * - */ - -#ifndef NRF_NVIC_H__ -#define NRF_NVIC_H__ - -#include -#include "nrf.h" - -#include "nrf_error_soc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@addtogroup NRF_NVIC_DEFINES Defines - * @{ */ - -/**@defgroup NRF_NVIC_ISER_DEFINES SoftDevice NVIC internal definitions - * @{ */ - -#define __NRF_NVIC_NVMC_IRQn (30) /**< The peripheral ID of the NVMC. IRQ numbers are used to identify peripherals, but the NVMC doesn't have an IRQ number in the MDK. */ - -#define __NRF_NVIC_ISER_COUNT (2) /**< The number of ISER/ICER registers in the NVIC that are used. */ - -/**@brief Interrupts used by the SoftDevice, with IRQn in the range 0-31. */ -#define __NRF_NVIC_SD_IRQS_0 ((uint32_t)( \ - (1U << POWER_CLOCK_IRQn) \ - | (1U << RADIO_IRQn) \ - | (1U << RTC0_IRQn) \ - | (1U << TIMER0_IRQn) \ - | (1U << RNG_IRQn) \ - | (1U << ECB_IRQn) \ - | (1U << CCM_AAR_IRQn) \ - | (1U << TEMP_IRQn) \ - | (1U << __NRF_NVIC_NVMC_IRQn) \ - | (1U << (uint32_t)SWI5_EGU5_IRQn) \ - )) - -/**@brief Interrupts used by the SoftDevice, with IRQn in the range 32-63. */ -#define __NRF_NVIC_SD_IRQS_1 ((uint32_t)0) - -/**@brief Interrupts available for to application, with IRQn in the range 0-31. */ -#define __NRF_NVIC_APP_IRQS_0 (~__NRF_NVIC_SD_IRQS_0) - -/**@brief Interrupts available for to application, with IRQn in the range 32-63. */ -#define __NRF_NVIC_APP_IRQS_1 (~__NRF_NVIC_SD_IRQS_1) - -/**@} */ - -/**@} */ - -/**@addtogroup NRF_NVIC_VARIABLES Variables - * @{ */ - -/**@brief Type representing the state struct for the SoftDevice NVIC module. */ -typedef struct -{ - uint32_t volatile __irq_masks[__NRF_NVIC_ISER_COUNT]; /**< IRQs enabled by the application in the NVIC. */ - uint32_t volatile __cr_flag; /**< Non-zero if already in a critical region */ -} nrf_nvic_state_t; - -/**@brief Variable keeping the state for the SoftDevice NVIC module. This must be declared in an - * application source file. */ -extern nrf_nvic_state_t nrf_nvic_state; - -/**@} */ - -/**@addtogroup NRF_NVIC_INTERNAL_FUNCTIONS SoftDevice NVIC internal functions - * @{ */ - -/**@brief Disables IRQ interrupts globally, including the SoftDevice's interrupts. - * - * @retval The value of PRIMASK prior to disabling the interrupts. - */ -__STATIC_INLINE int __sd_nvic_irq_disable(void); - -/**@brief Enables IRQ interrupts globally, including the SoftDevice's interrupts. - */ -__STATIC_INLINE void __sd_nvic_irq_enable(void); - -/**@brief Checks if IRQn is available to application - * @param[in] IRQn IRQ to check - * - * @retval 1 (true) if the IRQ to check is available to the application - */ -__STATIC_INLINE uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn); - -/**@brief Checks if priority is available to application - * @param[in] priority priority to check - * - * @retval 1 (true) if the priority to check is available to the application - */ -__STATIC_INLINE uint32_t __sd_nvic_is_app_accessible_priority(uint32_t priority); - -/**@} */ - -/**@addtogroup NRF_NVIC_FUNCTIONS SoftDevice NVIC public functions - * @{ */ - -/**@brief Enable External Interrupt. - * @note Corresponds to NVIC_EnableIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_EnableIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt was enabled. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt has a priority not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn); - -/**@brief Disable External Interrupt. - * @note Corresponds to NVIC_DisableIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_DisableIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt was disabled. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn); - -/**@brief Get Pending Interrupt. - * @note Corresponds to NVIC_GetPendingIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_GetPendingIRQ documentation in CMSIS. - * @param[out] p_pending_irq Return value from NVIC_GetPendingIRQ. - * - * @retval ::NRF_SUCCESS The interrupt is available for the application. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq); - -/**@brief Set Pending Interrupt. - * @note Corresponds to NVIC_SetPendingIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_SetPendingIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt is set pending. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn); - -/**@brief Clear Pending Interrupt. - * @note Corresponds to NVIC_ClearPendingIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_ClearPendingIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt pending flag is cleared. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn); - -/**@brief Set Interrupt Priority. - * @note Corresponds to NVIC_SetPriority in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * @pre Priority is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_SetPriority documentation in CMSIS. - * @param[in] priority A valid IRQ priority for use by the application. - * - * @retval ::NRF_SUCCESS The interrupt and priority level is available for the application. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt priority is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority); - -/**@brief Get Interrupt Priority. - * @note Corresponds to NVIC_GetPriority in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_GetPriority documentation in CMSIS. - * @param[out] p_priority Return value from NVIC_GetPriority. - * - * @retval ::NRF_SUCCESS The interrupt priority is returned in p_priority. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE - IRQn is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority); - -/**@brief System Reset. - * @note Corresponds to NVIC_SystemReset in CMSIS. - * - * @retval ::NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN - */ -__STATIC_INLINE uint32_t sd_nvic_SystemReset(void); - -/**@brief Enter critical region. - * - * @post Application interrupts will be disabled. - * @note sd_nvic_critical_region_enter() and ::sd_nvic_critical_region_exit() must be called in matching pairs inside each - * execution context - * @sa sd_nvic_critical_region_exit - * - * @param[out] p_is_nested_critical_region If 1, the application is now in a nested critical region. - * - * @retval ::NRF_SUCCESS - */ -__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region); - -/**@brief Exit critical region. - * - * @pre Application has entered a critical region using ::sd_nvic_critical_region_enter. - * @post If not in a nested critical region, the application interrupts will restored to the state before ::sd_nvic_critical_region_enter was called. - * - * @param[in] is_nested_critical_region If this is set to 1, the critical region won't be exited. @sa sd_nvic_critical_region_enter. - * - * @retval ::NRF_SUCCESS - */ -__STATIC_INLINE uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region); - -/**@} */ - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE int __sd_nvic_irq_disable(void) -{ - int pm = __get_PRIMASK(); - __disable_irq(); - return pm; -} - -__STATIC_INLINE void __sd_nvic_irq_enable(void) -{ - __enable_irq(); -} - -__STATIC_INLINE uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn) -{ - if (IRQn < 32) - { - return ((1UL<= (1 << __NVIC_PRIO_BITS)) - { - return 0; - } - if( priority == 0 - || priority == 1 - || priority == 4 - ) - { - return 0; - } - return 1; -} - - -__STATIC_INLINE uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn) -{ - if (!__sd_nvic_app_accessible_irq(IRQn)) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } - if (!__sd_nvic_is_app_accessible_priority(NVIC_GetPriority(IRQn))) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED; - } - - if (nrf_nvic_state.__cr_flag) - { - nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] |= (uint32_t)(1 << ((uint32_t)((int32_t)IRQn) & (uint32_t)0x1F)); - } - else - { - NVIC_EnableIRQ(IRQn); - } - return NRF_SUCCESS; -} - -__STATIC_INLINE uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn) -{ - if (!__sd_nvic_app_accessible_irq(IRQn)) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } - - if (nrf_nvic_state.__cr_flag) - { - nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] &= ~(1UL << ((uint32_t)(IRQn) & 0x1F)); - } - else - { - NVIC_DisableIRQ(IRQn); - } - - return NRF_SUCCESS; -} - -__STATIC_INLINE uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq) -{ - if (__sd_nvic_app_accessible_irq(IRQn)) - { - *p_pending_irq = NVIC_GetPendingIRQ(IRQn); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } -} - -__STATIC_INLINE uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn) -{ - if (__sd_nvic_app_accessible_irq(IRQn)) - { - NVIC_SetPendingIRQ(IRQn); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } -} - -__STATIC_INLINE uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn) -{ - if (__sd_nvic_app_accessible_irq(IRQn)) - { - NVIC_ClearPendingIRQ(IRQn); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } -} - -__STATIC_INLINE uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if (!__sd_nvic_app_accessible_irq(IRQn)) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } - - if (!__sd_nvic_is_app_accessible_priority(priority)) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED; - } - - NVIC_SetPriority(IRQn, (uint32_t)priority); - return NRF_SUCCESS; -} - -__STATIC_INLINE uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority) -{ - if (__sd_nvic_app_accessible_irq(IRQn)) - { - *p_priority = (NVIC_GetPriority(IRQn) & 0xFF); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } -} - -__STATIC_INLINE uint32_t sd_nvic_SystemReset(void) -{ - NVIC_SystemReset(); - return NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN; -} - -__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region) -{ - int was_masked = __sd_nvic_irq_disable(); - if (!nrf_nvic_state.__cr_flag) - { - nrf_nvic_state.__cr_flag = 1; - nrf_nvic_state.__irq_masks[0] = ( NVIC->ICER[0] & __NRF_NVIC_APP_IRQS_0 ); - NVIC->ICER[0] = __NRF_NVIC_APP_IRQS_0; - nrf_nvic_state.__irq_masks[1] = ( NVIC->ICER[1] & __NRF_NVIC_APP_IRQS_1 ); - NVIC->ICER[1] = __NRF_NVIC_APP_IRQS_1; - *p_is_nested_critical_region = 0; - } - else - { - *p_is_nested_critical_region = 1; - } - if (!was_masked) - { - __sd_nvic_irq_enable(); - } - return NRF_SUCCESS; -} - -__STATIC_INLINE uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region) -{ - if (nrf_nvic_state.__cr_flag && (is_nested_critical_region == 0)) - { - int was_masked = __sd_nvic_irq_disable(); - NVIC->ISER[0] = nrf_nvic_state.__irq_masks[0]; - NVIC->ISER[1] = nrf_nvic_state.__irq_masks[1]; - nrf_nvic_state.__cr_flag = 0; - if (!was_masked) - { - __sd_nvic_irq_enable(); - } - } - - return NRF_SUCCESS; -} - -#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ - -#ifdef __cplusplus -} -#endif - -#endif // NRF_NVIC_H__ - -/**@} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_sd_def.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_sd_def.h deleted file mode 100644 index 0b4d221d6a4..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_sd_def.h +++ /dev/null @@ -1,59 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_SD_DEF_H__ -#define NRF_SD_DEF_H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#define SD_PPI_CHANNELS_USED 0xFFFE0000uL /**< PPI channels utilized by SotfDevice (not available to the application). */ -#define SD_PPI_GROUPS_USED 0x0000000CuL /**< PPI groups utilized by SoftDevice (not available to the application). */ -#define SD_TIMERS_USED 0x00000001uL /**< Timers used by SoftDevice. */ -#define SD_SWI_USED 0x0000003CuL /**< Software interrupts used by SoftDevice */ - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_SD_DEF_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_sdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_sdm.h deleted file mode 100644 index c41d86d46bc..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_sdm.h +++ /dev/null @@ -1,355 +0,0 @@ -/* - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - @defgroup nrf_sdm_api SoftDevice Manager API - @{ - - @brief APIs for SoftDevice management. - -*/ - -#ifndef NRF_SDM_H__ -#define NRF_SDM_H__ - -#include "nrf_svc.h" -#include "nrf.h" -#include "nrf_soc.h" -#include "nrf_error_sdm.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup NRF_SDM_DEFINES Defines - * @{ */ -#ifdef NRFSOC_DOXYGEN -/// Declared in nrf_mbr.h -#define MBR_SIZE 0 -#warning test -#endif - -/** @brief The major version for the SoftDevice binary distributed with this header file. */ -#define SD_MAJOR_VERSION (5) - -/** @brief The minor version for the SoftDevice binary distributed with this header file. */ -#define SD_MINOR_VERSION (0) - -/** @brief The bugfix version for the SoftDevice binary distributed with this header file. */ -#define SD_BUGFIX_VERSION (0) - -/** @brief The full version number for the SoftDevice binary this header file was distributed - * with, as a decimal number in the form Mmmmbbb, where: - * - M is major version (one or more digits) - * - mmm is minor version (three digits) - * - bbb is bugfix version (three digits). */ -#define SD_VERSION (SD_MAJOR_VERSION * 1000000 + SD_MINOR_VERSION * 1000 + SD_BUGFIX_VERSION) - -/** @brief SoftDevice Manager SVC Base number. */ -#define SDM_SVC_BASE 0x10 - -/** @brief SoftDevice unique string size in bytes. */ -#define SD_UNIQUE_STR_SIZE 20 - -/** @brief Invalid info field. Returned when an info field does not exist. */ -#define SDM_INFO_FIELD_INVALID (0) - -/** @brief Defines the SoftDevice Information Structure location (address) as an offset from -the start of the SoftDevice (without MBR)*/ -#define SOFTDEVICE_INFO_STRUCT_OFFSET (0x2000) - -/** @brief Defines the absolute SoftDevice Information Structure location (address) when the - * SoftDevice is installed just above the MBR (the usual case). */ -#define SOFTDEVICE_INFO_STRUCT_ADDRESS (SOFTDEVICE_INFO_STRUCT_OFFSET + MBR_SIZE) - -/** @brief Defines the offset for the SoftDevice Information Structure size value relative to the - * SoftDevice base address. The size value is of type uint8_t. */ -#define SD_INFO_STRUCT_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET) - -/** @brief Defines the offset for the SoftDevice size value relative to the SoftDevice base address. - * The size value is of type uint32_t. */ -#define SD_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x08) - -/** @brief Defines the offset for FWID value relative to the SoftDevice base address. The FWID value - * is of type uint16_t. */ -#define SD_FWID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x0C) - -/** @brief Defines the offset for the SoftDevice ID relative to the SoftDevice base address. The ID - * is of type uint32_t. */ -#define SD_ID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x10) - -/** @brief Defines the offset for the SoftDevice version relative to the SoftDevice base address in - * the same format as @ref SD_VERSION, stored as an uint32_t. */ -#define SD_VERSION_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x14) - -/** @brief Defines the offset for the SoftDevice unique string relative to the SoftDevice base address. - * The SD_UNIQUE_STR is stored as an array of uint8_t. The size of array is @ref SD_UNIQUE_STR_SIZE. - */ -#define SD_UNIQUE_STR_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x18) - -/** @brief Defines a macro for retrieving the actual SoftDevice Information Structure size value - * from a given base address. Use @ref MBR_SIZE as the argument when the SoftDevice is - * installed just above the MBR (the usual case). */ -#define SD_INFO_STRUCT_SIZE_GET(baseaddr) (*((uint8_t *) ((baseaddr) + SD_INFO_STRUCT_SIZE_OFFSET))) - -/** @brief Defines a macro for retrieving the actual SoftDevice size value from a given base - * address. Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above - * the MBR (the usual case). */ -#define SD_SIZE_GET(baseaddr) (*((uint32_t *) ((baseaddr) + SD_SIZE_OFFSET))) - -/** @brief Defines a macro for retrieving the actual FWID value from a given base address. Use @ref - * MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the usual - * case). */ -#define SD_FWID_GET(baseaddr) (*((uint16_t *) ((baseaddr) + SD_FWID_OFFSET))) - -/** @brief Defines a macro for retrieving the actual SoftDevice ID from a given base address. Use - * @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the - * usual case). */ -#define SD_ID_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_ID_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ - ? (*((uint32_t *) ((baseaddr) + SD_ID_OFFSET))) : SDM_INFO_FIELD_INVALID) - -/** @brief Defines a macro for retrieving the actual SoftDevice version from a given base address. - * Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR - * (the usual case). */ -#define SD_VERSION_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_VERSION_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ - ? (*((uint32_t *) ((baseaddr) + SD_VERSION_OFFSET))) : SDM_INFO_FIELD_INVALID) - -/** @brief Defines a macro for retrieving the address of SoftDevice unique str based on a given base address. - * Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR - * (the usual case). */ -#define SD_UNIQUE_STR_ADDR_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_UNIQUE_STR_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ - ? (((uint8_t *) ((baseaddr) + SD_UNIQUE_STR_OFFSET))) : SDM_INFO_FIELD_INVALID) - -/**@defgroup NRF_FAULT_ID_RANGES Fault ID ranges - * @{ */ -#define NRF_FAULT_ID_SD_RANGE_START 0x00000000 /**< SoftDevice ID range start. */ -#define NRF_FAULT_ID_APP_RANGE_START 0x00001000 /**< Application ID range start. */ -/**@} */ - -/**@defgroup NRF_FAULT_IDS Fault ID types - * @{ */ -#define NRF_FAULT_ID_SD_ASSERT (NRF_FAULT_ID_SD_RANGE_START + 1) /**< SoftDevice assertion. The info parameter is reserved for future used. */ -#define NRF_FAULT_ID_APP_MEMACC (NRF_FAULT_ID_APP_RANGE_START + 1) /**< Application invalid memory access. The info parameter will contain 0x00000000, - in case of SoftDevice RAM access violation. In case of SoftDevice peripheral - register violation the info parameter will contain the sub-region number of - PREGION[0], on whose address range the disallowed write access caused the - memory access fault. */ -/**@} */ - -/** @} */ - -/** @addtogroup NRF_SDM_ENUMS Enumerations - * @{ */ - -/**@brief nRF SoftDevice Manager API SVC numbers. */ -enum NRF_SD_SVCS -{ - SD_SOFTDEVICE_ENABLE = SDM_SVC_BASE, /**< ::sd_softdevice_enable */ - SD_SOFTDEVICE_DISABLE, /**< ::sd_softdevice_disable */ - SD_SOFTDEVICE_IS_ENABLED, /**< ::sd_softdevice_is_enabled */ - SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, /**< ::sd_softdevice_vector_table_base_set */ - SVC_SDM_LAST /**< Placeholder for last SDM SVC */ -}; - -/** @} */ - -/** @addtogroup NRF_SDM_DEFINES Defines - * @{ */ - -/**@defgroup NRF_CLOCK_LF_ACCURACY Clock accuracy - * @{ */ - -#define NRF_CLOCK_LF_ACCURACY_250_PPM (0) /**< Default: 250 ppm */ -#define NRF_CLOCK_LF_ACCURACY_500_PPM (1) /**< 500 ppm */ -#define NRF_CLOCK_LF_ACCURACY_150_PPM (2) /**< 150 ppm */ -#define NRF_CLOCK_LF_ACCURACY_100_PPM (3) /**< 100 ppm */ -#define NRF_CLOCK_LF_ACCURACY_75_PPM (4) /**< 75 ppm */ -#define NRF_CLOCK_LF_ACCURACY_50_PPM (5) /**< 50 ppm */ -#define NRF_CLOCK_LF_ACCURACY_30_PPM (6) /**< 30 ppm */ -#define NRF_CLOCK_LF_ACCURACY_20_PPM (7) /**< 20 ppm */ -#define NRF_CLOCK_LF_ACCURACY_10_PPM (8) /**< 10 ppm */ -#define NRF_CLOCK_LF_ACCURACY_5_PPM (9) /**< 5 ppm */ -#define NRF_CLOCK_LF_ACCURACY_2_PPM (10) /**< 2 ppm */ -#define NRF_CLOCK_LF_ACCURACY_1_PPM (11) /**< 1 ppm */ - -/** @} */ - -/**@defgroup NRF_CLOCK_LF_SRC Possible LFCLK oscillator sources - * @{ */ - -#define NRF_CLOCK_LF_SRC_RC (0) /**< LFCLK RC oscillator. */ -#define NRF_CLOCK_LF_SRC_XTAL (1) /**< LFCLK crystal oscillator. */ -#define NRF_CLOCK_LF_SRC_SYNTH (2) /**< LFCLK Synthesized from HFCLK. */ - -/** @} */ - -/** @} */ - -/** @addtogroup NRF_SDM_TYPES Types - * @{ */ - -/**@brief Type representing LFCLK oscillator source. */ -typedef struct -{ - uint8_t source; /**< LF oscillator clock source, see @ref NRF_CLOCK_LF_SRC. */ - uint8_t rc_ctiv; /**< Only for NRF_CLOCK_LF_SRC_RC: Calibration timer interval in 1/4 second - units (nRF51: 1-64, nRF52: 1-32). - @note To avoid excessive clock drift, 0.5 degrees Celsius is the - maximum temperature change allowed in one calibration timer - interval. The interval should be selected to ensure this. - - @note Must be 0 if source is not NRF_CLOCK_LF_SRC_RC. */ - uint8_t rc_temp_ctiv; /**< Only for NRF_CLOCK_LF_SRC_RC: How often (in number of calibration - intervals) the RC oscillator shall be calibrated if the temperature - hasn't changed. - 0: Always calibrate even if the temperature hasn't changed. - 1: Only calibrate if the temperature has changed (nRF51 only). - 2-33: Check the temperature and only calibrate if it has changed, - however calibration will take place every rc_temp_ctiv - intervals in any case. - - @note Must be 0 if source is not NRF_CLOCK_LF_SRC_RC. - - @note For nRF52, the application must ensure calibration at least once - every 8 seconds to ensure +/-500 ppm clock stability. The - recommended configuration for NRF_CLOCK_LF_SRC_RC on nRF52 is - rc_ctiv=16 and rc_temp_ctiv=2. This will ensure calibration at - least once every 8 seconds and for temperature changes of 0.5 - degrees Celsius every 4 seconds. See the Product Specification - for the nRF52 device being used for more information.*/ - uint8_t accuracy; /**< External clock accuracy used in the LL to compute timing - windows, see @ref NRF_CLOCK_LF_ACCURACY.*/ -} nrf_clock_lf_cfg_t; - -/**@brief Fault Handler type. - * - * When certain unrecoverable errors occur within the application or SoftDevice the fault handler will be called back. - * The protocol stack will be in an undefined state when this happens and the only way to recover will be to - * perform a reset, using e.g. CMSIS NVIC_SystemReset(). - * If the application returns from the fault handler the SoftDevice will call NVIC_SystemReset(). - * - * @note This callback is executed in HardFault context, thus SVC functions cannot be called from the fault callback. - * - * @param[in] id Fault identifier. See @ref NRF_FAULT_IDS. - * @param[in] pc The program counter of the instruction that triggered the fault. - * @param[in] info Optional additional information regarding the fault. Refer to each Fault identifier for details. - * - * @note When id is set to NRF_FAULT_ID_APP_MEMACC, pc will contain the address of the instruction being executed at the time when - * the fault is detected by the CPU. The CPU program counter may have advanced up to 2 instructions (no branching) after the one that triggered the fault. - */ -typedef void (*nrf_fault_handler_t)(uint32_t id, uint32_t pc, uint32_t info); - -/** @} */ - -/** @addtogroup NRF_SDM_FUNCTIONS Functions - * @{ */ - -/**@brief Enables the SoftDevice and by extension the protocol stack. - * - * @note Some care must be taken if a low frequency clock source is already running when calling this function: - * If the LF clock has a different source then the one currently running, it will be stopped. Then, the new - * clock source will be started. - * - * @note This function has no effect when returning with an error. - * - * @post If return code is ::NRF_SUCCESS - * - SoC library and protocol stack APIs are made available. - * - A portion of RAM will be unavailable (see relevant SDS documentation). - * - Some peripherals will be unavailable or available only through the SoC API (see relevant SDS documentation). - * - Interrupts will not arrive from protected peripherals or interrupts. - * - nrf_nvic_ functions must be used instead of CMSIS NVIC_ functions for reliable usage of the SoftDevice. - * - Interrupt latency may be affected by the SoftDevice (see relevant SDS documentation). - * - Chosen low frequency clock source will be running. - * - * @param p_clock_lf_cfg Low frequency clock source and accuracy. - If NULL the clock will be configured as an RC source with rc_ctiv = 16 and .rc_temp_ctiv = 2 - In the case of XTAL source, the PPM accuracy of the chosen clock source must be greater than or equal to the actual characteristics of your XTAL clock. - * @param fault_handler Callback to be invoked in case of fault, cannot be NULL. - * - * @retval ::NRF_SUCCESS - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE SoftDevice is already enabled, and the clock source and fault handler cannot be updated. - * @retval ::NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION SoftDevice interrupt is already enabled, or an enabled interrupt has an illegal priority level. - * @retval ::NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN Unknown low frequency clock source selected. - */ -SVCALL(SD_SOFTDEVICE_ENABLE, uint32_t, sd_softdevice_enable(nrf_clock_lf_cfg_t const * p_clock_lf_cfg, nrf_fault_handler_t fault_handler)); - - -/**@brief Disables the SoftDevice and by extension the protocol stack. - * - * Idempotent function to disable the SoftDevice. - * - * @post SoC library and protocol stack APIs are made unavailable. - * @post All interrupts that was protected by the SoftDevice will be disabled and initialized to priority 0 (highest). - * @post All peripherals used by the SoftDevice will be reset to default values. - * @post All of RAM become available. - * @post All interrupts are forwarded to the application. - * @post LFCLK source chosen in ::sd_softdevice_enable will be left running. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_SOFTDEVICE_DISABLE, uint32_t, sd_softdevice_disable(void)); - -/**@brief Check if the SoftDevice is enabled. - * - * @param[out] p_softdevice_enabled If the SoftDevice is enabled: 1 else 0. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_SOFTDEVICE_IS_ENABLED, uint32_t, sd_softdevice_is_enabled(uint8_t * p_softdevice_enabled)); - -/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the SoftDevice - * - * This function is only intended to be called when a bootloader is enabled. - * - * @param[in] address The base address of the interrupt vector table for forwarded interrupts. - - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, uint32_t, sd_softdevice_vector_table_base_set(uint32_t address)); - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // NRF_SDM_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_soc.h deleted file mode 100644 index d7d3c801b81..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_soc.h +++ /dev/null @@ -1,931 +0,0 @@ -/* - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - * @defgroup nrf_soc_api SoC Library API - * @{ - * - * @brief APIs for the SoC library. - * - */ - -#ifndef NRF_SOC_H__ -#define NRF_SOC_H__ - -#include -#include -#include "nrf_svc.h" -#include "nrf.h" - -#include "nrf_error_soc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@addtogroup NRF_SOC_DEFINES Defines - * @{ */ - -/**@brief The number of the lowest SVC number reserved for the SoC library. */ -#define SOC_SVC_BASE (0x20) /**< Base value for SVCs that are available when the SoftDevice is disabled. */ -#define SOC_SVC_BASE_NOT_AVAILABLE (0x2B) /**< Base value for SVCs that are not available when the SoftDevice is disabled. */ - -/**@brief Guaranteed time for application to process radio inactive notification. */ -#define NRF_RADIO_NOTIFICATION_INACTIVE_GUARANTEED_TIME_US (62) - -/**@brief The minimum allowed timeslot extension time. */ -#define NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US (200) - -/**@brief The maximum processing time to handle a timeslot extension. */ -#define NRF_RADIO_MAX_EXTENSION_PROCESSING_TIME_US (17) - -/**@brief The latest time before the end of a timeslot the timeslot can be extended. */ -#define NRF_RADIO_MIN_EXTENSION_MARGIN_US (79) - -#define SOC_ECB_KEY_LENGTH (16) /**< ECB key length. */ -#define SOC_ECB_CLEARTEXT_LENGTH (16) /**< ECB cleartext length. */ -#define SOC_ECB_CIPHERTEXT_LENGTH (SOC_ECB_CLEARTEXT_LENGTH) /**< ECB ciphertext length. */ - -#define SD_EVT_IRQn (SWI2_EGU2_IRQn) /**< SoftDevice Event IRQ number. Used for both protocol events and SoC events. */ -#define SD_EVT_IRQHandler (SWI2_EGU2_IRQHandler) /**< SoftDevice Event IRQ handler. Used for both protocol events and SoC events. - The default interrupt priority for this handler is set to 4 */ -#define RADIO_NOTIFICATION_IRQn (SWI1_EGU1_IRQn) /**< The radio notification IRQ number. */ -#define RADIO_NOTIFICATION_IRQHandler (SWI1_EGU1_IRQHandler) /**< The radio notification IRQ handler. - The default interrupt priority for this handler is set to 4 */ -#define NRF_RADIO_LENGTH_MIN_US (100) /**< The shortest allowed radio timeslot, in microseconds. */ -#define NRF_RADIO_LENGTH_MAX_US (100000) /**< The longest allowed radio timeslot, in microseconds. */ - -#define NRF_RADIO_DISTANCE_MAX_US (128000000UL - 1UL) /**< The longest timeslot distance, in microseconds, allowed for the distance parameter (see @ref nrf_radio_request_normal_t) in the request. */ - -#define NRF_RADIO_EARLIEST_TIMEOUT_MAX_US (128000000UL - 1UL) /**< The longest timeout, in microseconds, allowed when requesting the earliest possible timeslot. */ - -#define NRF_RADIO_START_JITTER_US (2) /**< The maximum jitter in @ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START relative to the requested start time. */ - -/**@} */ - -/**@addtogroup NRF_SOC_ENUMS Enumerations - * @{ */ - -/**@brief The SVC numbers used by the SVC functions in the SoC library. */ -enum NRF_SOC_SVCS -{ - SD_PPI_CHANNEL_ENABLE_GET = SOC_SVC_BASE, - SD_PPI_CHANNEL_ENABLE_SET, - SD_PPI_CHANNEL_ENABLE_CLR, - SD_PPI_CHANNEL_ASSIGN, - SD_PPI_GROUP_TASK_ENABLE, - SD_PPI_GROUP_TASK_DISABLE, - SD_PPI_GROUP_ASSIGN, - SD_PPI_GROUP_GET, - SD_FLASH_PAGE_ERASE, - SD_FLASH_WRITE, - SD_FLASH_PROTECT, - SD_MUTEX_NEW = SOC_SVC_BASE_NOT_AVAILABLE, - SD_MUTEX_ACQUIRE, - SD_MUTEX_RELEASE, - SD_RAND_APPLICATION_POOL_CAPACITY_GET, - SD_RAND_APPLICATION_BYTES_AVAILABLE_GET, - SD_RAND_APPLICATION_VECTOR_GET, - SD_POWER_MODE_SET, - SD_POWER_SYSTEM_OFF, - SD_POWER_RESET_REASON_GET, - SD_POWER_RESET_REASON_CLR, - SD_POWER_POF_ENABLE, - SD_POWER_POF_THRESHOLD_SET, - SD_POWER_RAM_POWER_SET, - SD_POWER_RAM_POWER_CLR, - SD_POWER_RAM_POWER_GET, - SD_POWER_GPREGRET_SET, - SD_POWER_GPREGRET_CLR, - SD_POWER_GPREGRET_GET, - SD_POWER_DCDC_MODE_SET, - SD_APP_EVT_WAIT, - SD_CLOCK_HFCLK_REQUEST, - SD_CLOCK_HFCLK_RELEASE, - SD_CLOCK_HFCLK_IS_RUNNING, - SD_RADIO_NOTIFICATION_CFG_SET, - SD_ECB_BLOCK_ENCRYPT, - SD_ECB_BLOCKS_ENCRYPT, - SD_RADIO_SESSION_OPEN, - SD_RADIO_SESSION_CLOSE, - SD_RADIO_REQUEST, - SD_EVT_GET, - SD_TEMP_GET, - SVC_SOC_LAST -}; - -/**@brief Possible values of a ::nrf_mutex_t. */ -enum NRF_MUTEX_VALUES -{ - NRF_MUTEX_FREE, - NRF_MUTEX_TAKEN -}; - -/**@brief Power modes. */ -enum NRF_POWER_MODES -{ - NRF_POWER_MODE_CONSTLAT, /**< Constant latency mode. See power management in the reference manual. */ - NRF_POWER_MODE_LOWPWR /**< Low power mode. See power management in the reference manual. */ -}; - - -/**@brief Power failure thresholds */ -enum NRF_POWER_THRESHOLDS -{ - NRF_POWER_THRESHOLD_V17 = 4UL, /**< 1.7 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V18, /**< 1.8 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V19, /**< 1.9 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V20, /**< 2.0 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V21, /**< 2.1 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V22, /**< 2.2 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V23, /**< 2.3 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V24, /**< 2.4 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V25, /**< 2.5 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V26, /**< 2.6 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V27, /**< 2.7 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V28 /**< 2.8 Volts power failure threshold. */ -}; - - -/**@brief DC/DC converter modes. */ -enum NRF_POWER_DCDC_MODES -{ - NRF_POWER_DCDC_DISABLE, /**< The DCDC is disabled. */ - NRF_POWER_DCDC_ENABLE /**< The DCDC is enabled. */ -}; - -/**@brief Radio notification distances. */ -enum NRF_RADIO_NOTIFICATION_DISTANCES -{ - NRF_RADIO_NOTIFICATION_DISTANCE_NONE = 0, /**< The event does not have a notification. */ - NRF_RADIO_NOTIFICATION_DISTANCE_800US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_1740US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_2680US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_3620US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_4560US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_5500US /**< The distance from the active notification to start of radio activity. */ -}; - - -/**@brief Radio notification types. */ -enum NRF_RADIO_NOTIFICATION_TYPES -{ - NRF_RADIO_NOTIFICATION_TYPE_NONE = 0, /**< The event does not have a radio notification signal. */ - NRF_RADIO_NOTIFICATION_TYPE_INT_ON_ACTIVE, /**< Using interrupt for notification when the radio will be enabled. */ - NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE, /**< Using interrupt for notification when the radio has been disabled. */ - NRF_RADIO_NOTIFICATION_TYPE_INT_ON_BOTH, /**< Using interrupt for notification both when the radio will be enabled and disabled. */ -}; - -/**@brief The Radio signal callback types. */ -enum NRF_RADIO_CALLBACK_SIGNAL_TYPE -{ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_START, /**< This signal indicates the start of the radio timeslot. */ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_TIMER0, /**< This signal indicates the NRF_TIMER0 interrupt. */ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_RADIO, /**< This signal indicates the NRF_RADIO interrupt. */ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_EXTEND_FAILED, /**< This signal indicates extend action failed. */ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_EXTEND_SUCCEEDED /**< This signal indicates extend action succeeded. */ -}; - -/**@brief The actions requested by the signal callback. - * - * This code gives the SOC instructions about what action to take when the signal callback has - * returned. - */ -enum NRF_RADIO_SIGNAL_CALLBACK_ACTION -{ - NRF_RADIO_SIGNAL_CALLBACK_ACTION_NONE, /**< Return without action. */ - NRF_RADIO_SIGNAL_CALLBACK_ACTION_EXTEND, /**< Request an extension of the current - timeslot. Maximum execution time for this action: - @ref NRF_RADIO_MAX_EXTENSION_PROCESSING_TIME_US. - This action must be started at least @ref - NRF_RADIO_MIN_EXTENSION_MARGIN_US before - the end of the timeslot. */ - NRF_RADIO_SIGNAL_CALLBACK_ACTION_END, /**< End the current radio timeslot. */ - NRF_RADIO_SIGNAL_CALLBACK_ACTION_REQUEST_AND_END /**< Request a new radio timeslot and end the current timeslot. */ -}; - -/**@brief Radio timeslot high frequency clock source configuration. */ -enum NRF_RADIO_HFCLK_CFG -{ - NRF_RADIO_HFCLK_CFG_XTAL_GUARANTEED, /**< The SoftDevice will guarantee that the high frequency clock source is the - external crystal for the whole duration of the timeslot. This should be the - preferred option for events that use the radio or require high timing accuracy. - @note The SoftDevice will automatically turn on and off the external crystal, - at the beginning and end of the timeslot, respectively. The crystal may also - intentionally be left running after the timeslot, in cases where it is needed - by the SoftDevice shortly after the end of the timeslot. */ - NRF_RADIO_HFCLK_CFG_NO_GUARANTEE /**< This configuration allows for earlier and tighter scheduling of timeslots. - The RC oscillator may be the clock source in part or for the whole duration of the timeslot. - The RC oscillator's accuracy must therefore be taken into consideration. - @note If the application will use the radio peripheral in timeslots with this configuration, - it must make sure that the crystal is running and stable before starting the radio. */ -}; - -/**@brief Radio timeslot priorities. */ -enum NRF_RADIO_PRIORITY -{ - NRF_RADIO_PRIORITY_HIGH, /**< High (equal priority as the normal connection priority of the SoftDevice stack(s)). */ - NRF_RADIO_PRIORITY_NORMAL, /**< Normal (equal priority as the priority of secondary activities of the SoftDevice stack(s)). */ -}; - -/**@brief Radio timeslot request type. */ -enum NRF_RADIO_REQUEST_TYPE -{ - NRF_RADIO_REQ_TYPE_EARLIEST, /**< Request radio timeslot as early as possible. This should always be used for the first request in a session. */ - NRF_RADIO_REQ_TYPE_NORMAL /**< Normal radio timeslot request. */ -}; - -/**@brief SoC Events. */ -enum NRF_SOC_EVTS -{ - NRF_EVT_HFCLKSTARTED, /**< Event indicating that the HFCLK has started. */ - NRF_EVT_POWER_FAILURE_WARNING, /**< Event indicating that a power failure warning has occurred. */ - NRF_EVT_FLASH_OPERATION_SUCCESS, /**< Event indicating that the ongoing flash operation has completed successfully. */ - NRF_EVT_FLASH_OPERATION_ERROR, /**< Event indicating that the ongoing flash operation has timed out with an error. */ - NRF_EVT_RADIO_BLOCKED, /**< Event indicating that a radio timeslot was blocked. */ - NRF_EVT_RADIO_CANCELED, /**< Event indicating that a radio timeslot was canceled by SoftDevice. */ - NRF_EVT_RADIO_SIGNAL_CALLBACK_INVALID_RETURN, /**< Event indicating that a radio timeslot signal callback handler return was invalid. */ - NRF_EVT_RADIO_SESSION_IDLE, /**< Event indicating that a radio timeslot session is idle. */ - NRF_EVT_RADIO_SESSION_CLOSED, /**< Event indicating that a radio timeslot session is closed. */ - NRF_EVT_NUMBER_OF_EVTS -}; - -/**@} */ - - -/**@addtogroup NRF_SOC_STRUCTURES Structures - * @{ */ - -/**@brief Represents a mutex for use with the nrf_mutex functions. - * @note Accessing the value directly is not safe, use the mutex functions! - */ -typedef volatile uint8_t nrf_mutex_t; - -/**@brief Parameters for a request for a timeslot as early as possible. */ -typedef struct -{ - uint8_t hfclk; /**< High frequency clock source, see @ref NRF_RADIO_HFCLK_CFG. */ - uint8_t priority; /**< The radio timeslot priority, see @ref NRF_RADIO_PRIORITY. */ - uint32_t length_us; /**< The radio timeslot length (in the range 100 to 100,000] microseconds). */ - uint32_t timeout_us; /**< Longest acceptable delay until the start of the requested timeslot (up to @ref NRF_RADIO_EARLIEST_TIMEOUT_MAX_US microseconds). */ -} nrf_radio_request_earliest_t; - -/**@brief Parameters for a normal radio timeslot request. */ -typedef struct -{ - uint8_t hfclk; /**< High frequency clock source, see @ref NRF_RADIO_HFCLK_CFG. */ - uint8_t priority; /**< The radio timeslot priority, see @ref NRF_RADIO_PRIORITY. */ - uint32_t distance_us; /**< Distance from the start of the previous radio timeslot (up to @ref NRF_RADIO_DISTANCE_MAX_US microseconds). */ - uint32_t length_us; /**< The radio timeslot length (in the range [100..100,000] microseconds). */ -} nrf_radio_request_normal_t; - -/**@brief Radio timeslot request parameters. */ -typedef struct -{ - uint8_t request_type; /**< Type of request, see @ref NRF_RADIO_REQUEST_TYPE. */ - union - { - nrf_radio_request_earliest_t earliest; /**< Parameters for requesting a radio timeslot as early as possible. */ - nrf_radio_request_normal_t normal; /**< Parameters for requesting a normal radio timeslot. */ - } params; /**< Parameter union. */ -} nrf_radio_request_t; - -/**@brief Return parameters of the radio timeslot signal callback. */ -typedef struct -{ - uint8_t callback_action; /**< The action requested by the application when returning from the signal callback, see @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION. */ - union - { - struct - { - nrf_radio_request_t * p_next; /**< The request parameters for the next radio timeslot. */ - } request; /**< Additional parameters for return_code @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION_REQUEST_AND_END. */ - struct - { - uint32_t length_us; /**< Requested extension of the radio timeslot duration (microseconds) (for minimum time see @ref NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US). */ - } extend; /**< Additional parameters for return_code @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION_EXTEND. */ - } params; /**< Parameter union. */ -} nrf_radio_signal_callback_return_param_t; - -/**@brief The radio timeslot signal callback type. - * - * @note In case of invalid return parameters, the radio timeslot will automatically end - * immediately after returning from the signal callback and the - * @ref NRF_EVT_RADIO_SIGNAL_CALLBACK_INVALID_RETURN event will be sent. - * @note The returned struct pointer must remain valid after the signal callback - * function returns. For instance, this means that it must not point to a stack variable. - * - * @param[in] signal_type Type of signal, see @ref NRF_RADIO_CALLBACK_SIGNAL_TYPE. - * - * @return Pointer to structure containing action requested by the application. - */ -typedef nrf_radio_signal_callback_return_param_t * (*nrf_radio_signal_callback_t) (uint8_t signal_type); - -/**@brief AES ECB parameter typedefs */ -typedef uint8_t soc_ecb_key_t[SOC_ECB_KEY_LENGTH]; /**< Encryption key type. */ -typedef uint8_t soc_ecb_cleartext_t[SOC_ECB_CLEARTEXT_LENGTH]; /**< Cleartext data type. */ -typedef uint8_t soc_ecb_ciphertext_t[SOC_ECB_CIPHERTEXT_LENGTH]; /**< Ciphertext data type. */ - -/**@brief AES ECB data structure */ -typedef struct -{ - soc_ecb_key_t key; /**< Encryption key. */ - soc_ecb_cleartext_t cleartext; /**< Cleartext data. */ - soc_ecb_ciphertext_t ciphertext; /**< Ciphertext data. */ -} nrf_ecb_hal_data_t; - -/**@brief AES ECB block. Used to provide multiple blocks in a single call - to @ref sd_ecb_blocks_encrypt.*/ -typedef struct -{ - soc_ecb_key_t const * p_key; /**< Pointer to the Encryption key. */ - soc_ecb_cleartext_t const * p_cleartext; /**< Pointer to the Cleartext data. */ - soc_ecb_ciphertext_t * p_ciphertext; /**< Pointer to the Ciphertext data. */ -} nrf_ecb_hal_data_block_t; - -/**@} */ - -/**@addtogroup NRF_SOC_FUNCTIONS Functions - * @{ */ - -/**@brief Initialize a mutex. - * - * @param[in] p_mutex Pointer to the mutex to initialize. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_MUTEX_NEW, uint32_t, sd_mutex_new(nrf_mutex_t * p_mutex)); - -/**@brief Attempt to acquire a mutex. - * - * @param[in] p_mutex Pointer to the mutex to acquire. - * - * @retval ::NRF_SUCCESS The mutex was successfully acquired. - * @retval ::NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN The mutex could not be acquired. - */ -SVCALL(SD_MUTEX_ACQUIRE, uint32_t, sd_mutex_acquire(nrf_mutex_t * p_mutex)); - -/**@brief Release a mutex. - * - * @param[in] p_mutex Pointer to the mutex to release. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_MUTEX_RELEASE, uint32_t, sd_mutex_release(nrf_mutex_t * p_mutex)); - -/**@brief Query the capacity of the application random pool. - * - * @param[out] p_pool_capacity The capacity of the pool. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_RAND_APPLICATION_POOL_CAPACITY_GET, uint32_t, sd_rand_application_pool_capacity_get(uint8_t * p_pool_capacity)); - -/**@brief Get number of random bytes available to the application. - * - * @param[out] p_bytes_available The number of bytes currently available in the pool. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_RAND_APPLICATION_BYTES_AVAILABLE_GET, uint32_t, sd_rand_application_bytes_available_get(uint8_t * p_bytes_available)); - -/**@brief Get random bytes from the application pool. - * - * @param[out] p_buff Pointer to unit8_t buffer for storing the bytes. - * @param[in] length Number of bytes to take from pool and place in p_buff. - * - * @retval ::NRF_SUCCESS The requested bytes were written to p_buff. - * @retval ::NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES No bytes were written to the buffer, because there were not enough bytes available. -*/ -SVCALL(SD_RAND_APPLICATION_VECTOR_GET, uint32_t, sd_rand_application_vector_get(uint8_t * p_buff, uint8_t length)); - -/**@brief Gets the reset reason register. - * - * @param[out] p_reset_reason Contents of the NRF_POWER->RESETREAS register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RESET_REASON_GET, uint32_t, sd_power_reset_reason_get(uint32_t * p_reset_reason)); - -/**@brief Clears the bits of the reset reason register. - * - * @param[in] reset_reason_clr_msk Contains the bits to clear from the reset reason register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RESET_REASON_CLR, uint32_t, sd_power_reset_reason_clr(uint32_t reset_reason_clr_msk)); - -/**@brief Sets the power mode when in CPU sleep. - * - * @param[in] power_mode The power mode to use when in CPU sleep, see @ref NRF_POWER_MODES. @sa sd_app_evt_wait - * - * @retval ::NRF_SUCCESS The power mode was set. - * @retval ::NRF_ERROR_SOC_POWER_MODE_UNKNOWN The power mode was unknown. - */ -SVCALL(SD_POWER_MODE_SET, uint32_t, sd_power_mode_set(uint8_t power_mode)); - -/**@brief Puts the chip in System OFF mode. - * - * @retval ::NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN - */ -SVCALL(SD_POWER_SYSTEM_OFF, uint32_t, sd_power_system_off(void)); - -/**@brief Enables or disables the power-fail comparator. - * - * Enabling this will give a SoftDevice event (NRF_EVT_POWER_FAILURE_WARNING) when the power failure warning occurs. - * The event can be retrieved with sd_evt_get(); - * - * @param[in] pof_enable True if the power-fail comparator should be enabled, false if it should be disabled. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_POF_ENABLE, uint32_t, sd_power_pof_enable(uint8_t pof_enable)); - -/**@brief Sets the power-fail threshold value. - * - * @param[in] threshold The power-fail threshold value to use, see @ref NRF_POWER_THRESHOLDS. - * - * @retval ::NRF_SUCCESS The power failure threshold was set. - * @retval ::NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN The power failure threshold is unknown. - */ -SVCALL(SD_POWER_POF_THRESHOLD_SET, uint32_t, sd_power_pof_threshold_set(uint8_t threshold)); - -/**@brief Writes the NRF_POWER->RAM[index].POWERSET register. - * - * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWERSET register to write to. - * @param[in] ram_powerset Contains the word to write to the NRF_POWER->RAM[index].POWERSET register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RAM_POWER_SET, uint32_t, sd_power_ram_power_set(uint8_t index, uint32_t ram_powerset)); - -/**@brief Writes the NRF_POWER->RAM[index].POWERCLR register. - * - * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWERCLR register to write to. - * @param[in] ram_powerclr Contains the word to write to the NRF_POWER->RAM[index].POWERCLR register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RAM_POWER_CLR, uint32_t, sd_power_ram_power_clr(uint8_t index, uint32_t ram_powerclr)); - -/**@brief Get contents of NRF_POWER->RAM[index].POWER register, indicates power status of RAM[index] blocks. - * - * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWER register to read from. - * @param[out] p_ram_power Content of NRF_POWER->RAM[index].POWER register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RAM_POWER_GET, uint32_t, sd_power_ram_power_get(uint8_t index, uint32_t * p_ram_power)); - -/**@brief Set bits in the general purpose retention registers (NRF_POWER->GPREGRET*). - * - * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. - * @param[in] gpregret_msk Bits to be set in the GPREGRET register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_GPREGRET_SET, uint32_t, sd_power_gpregret_set(uint32_t gpregret_id, uint32_t gpregret_msk)); - -/**@brief Clear bits in the general purpose retention registers (NRF_POWER->GPREGRET*). - * - * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. - * @param[in] gpregret_msk Bits to be clear in the GPREGRET register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_GPREGRET_CLR, uint32_t, sd_power_gpregret_clr(uint32_t gpregret_id, uint32_t gpregret_msk)); - -/**@brief Get contents of the general purpose retention registers (NRF_POWER->GPREGRET*). - * - * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. - * @param[out] p_gpregret Contents of the GPREGRET register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_GPREGRET_GET, uint32_t, sd_power_gpregret_get(uint32_t gpregret_id, uint32_t *p_gpregret)); - -/**@brief Sets the DCDC mode. - * - * Enable or disable the DCDC peripheral. - * - * @param[in] dcdc_mode The mode of the DCDC, see @ref NRF_POWER_DCDC_MODES. - * - * @retval ::NRF_SUCCESS - * @retval ::NRF_ERROR_INVALID_PARAM The DCDC mode is invalid. - */ -SVCALL(SD_POWER_DCDC_MODE_SET, uint32_t, sd_power_dcdc_mode_set(uint8_t dcdc_mode)); - -/**@brief Request the high frequency crystal oscillator. - * - * Will start the high frequency crystal oscillator, the startup time of the crystal varies - * and the ::sd_clock_hfclk_is_running function can be polled to check if it has started. - * - * @see sd_clock_hfclk_is_running - * @see sd_clock_hfclk_release - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_CLOCK_HFCLK_REQUEST, uint32_t, sd_clock_hfclk_request(void)); - -/**@brief Releases the high frequency crystal oscillator. - * - * Will stop the high frequency crystal oscillator, this happens immediately. - * - * @see sd_clock_hfclk_is_running - * @see sd_clock_hfclk_request - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_CLOCK_HFCLK_RELEASE, uint32_t, sd_clock_hfclk_release(void)); - -/**@brief Checks if the high frequency crystal oscillator is running. - * - * @see sd_clock_hfclk_request - * @see sd_clock_hfclk_release - * - * @param[out] p_is_running 1 if the external crystal oscillator is running, 0 if not. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_CLOCK_HFCLK_IS_RUNNING, uint32_t, sd_clock_hfclk_is_running(uint32_t * p_is_running)); - -/**@brief Waits for an application event. - * - * An application event is either an application interrupt or a pended interrupt when the interrupt - * is disabled. - * - * When the application waits for an application event by calling this function, an interrupt that - * is enabled will be taken immediately on pending since this function will wait in thread mode, - * then the execution will return in the application's main thread. - * - * In order to wake up from disabled interrupts, the SEVONPEND flag has to be set in the Cortex-M - * MCU's System Control Register (SCR), CMSIS_SCB. In that case, when a disabled interrupt gets - * pended, this function will return to the application's main thread. - * - * @note The application must ensure that the pended flag is cleared using ::sd_nvic_ClearPendingIRQ - * in order to sleep using this function. This is only necessary for disabled interrupts, as - * the interrupt handler will clear the pending flag automatically for enabled interrupts. - * - * @note If an application interrupt has happened since the last time sd_app_evt_wait was - * called this function will return immediately and not go to sleep. This is to avoid race - * conditions that can occur when a flag is updated in the interrupt handler and processed - * in the main loop. - * - * @post An application interrupt has happened or a interrupt pending flag is set. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_APP_EVT_WAIT, uint32_t, sd_app_evt_wait(void)); - -/**@brief Get PPI channel enable register contents. - * - * @param[out] p_channel_enable The contents of the PPI CHEN register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_CHANNEL_ENABLE_GET, uint32_t, sd_ppi_channel_enable_get(uint32_t * p_channel_enable)); - -/**@brief Set PPI channel enable register. - * - * @param[in] channel_enable_set_msk Mask containing the bits to set in the PPI CHEN register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_CHANNEL_ENABLE_SET, uint32_t, sd_ppi_channel_enable_set(uint32_t channel_enable_set_msk)); - -/**@brief Clear PPI channel enable register. - * - * @param[in] channel_enable_clr_msk Mask containing the bits to clear in the PPI CHEN register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_CHANNEL_ENABLE_CLR, uint32_t, sd_ppi_channel_enable_clr(uint32_t channel_enable_clr_msk)); - -/**@brief Assign endpoints to a PPI channel. - * - * @param[in] channel_num Number of the PPI channel to assign. - * @param[in] evt_endpoint Event endpoint of the PPI channel. - * @param[in] task_endpoint Task endpoint of the PPI channel. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_CHANNEL The channel number is invalid. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_CHANNEL_ASSIGN, uint32_t, sd_ppi_channel_assign(uint8_t channel_num, const volatile void * evt_endpoint, const volatile void * task_endpoint)); - -/**@brief Task to enable a channel group. - * - * @param[in] group_num Number of the channel group. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_GROUP_TASK_ENABLE, uint32_t, sd_ppi_group_task_enable(uint8_t group_num)); - -/**@brief Task to disable a channel group. - * - * @param[in] group_num Number of the PPI group. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_GROUP_TASK_DISABLE, uint32_t, sd_ppi_group_task_disable(uint8_t group_num)); - -/**@brief Assign PPI channels to a channel group. - * - * @param[in] group_num Number of the channel group. - * @param[in] channel_msk Mask of the channels to assign to the group. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_GROUP_ASSIGN, uint32_t, sd_ppi_group_assign(uint8_t group_num, uint32_t channel_msk)); - -/**@brief Gets the PPI channels of a channel group. - * - * @param[in] group_num Number of the channel group. - * @param[out] p_channel_msk Mask of the channels assigned to the group. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_GROUP_GET, uint32_t, sd_ppi_group_get(uint8_t group_num, uint32_t * p_channel_msk)); - -/**@brief Configures the Radio Notification signal. - * - * @note - * - The notification signal latency depends on the interrupt priority settings of SWI used - * for notification signal. - * - To ensure that the radio notification signal behaves in a consistent way, the radio - * notifications must be configured when there is no protocol stack or other SoftDevice - * activity in progress. It is recommended that the radio notification signal is - * configured directly after the SoftDevice has been enabled. - * - In the period between the ACTIVE signal and the start of the Radio Event, the SoftDevice - * will interrupt the application to do Radio Event preparation. - * - Using the Radio Notification feature may limit the bandwidth, as the SoftDevice may have - * to shorten the connection events to have time for the Radio Notification signals. - * - * @param[in] type Type of notification signal, see @ref NRF_RADIO_NOTIFICATION_TYPES. - * @ref NRF_RADIO_NOTIFICATION_TYPE_NONE shall be used to turn off radio - * notification. Using @ref NRF_RADIO_NOTIFICATION_DISTANCE_NONE is - * recommended (but not required) to be used with - * @ref NRF_RADIO_NOTIFICATION_TYPE_NONE. - * - * @param[in] distance Distance between the notification signal and start of radio activity, see @ref NRF_RADIO_NOTIFICATION_DISTANCES. - * This parameter is ignored when @ref NRF_RADIO_NOTIFICATION_TYPE_NONE or - * @ref NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE is used. - * - * @retval ::NRF_ERROR_INVALID_PARAM The group number is invalid. - * @retval ::NRF_ERROR_INVALID_STATE A protocol stack or other SoftDevice is running. Stop all - * running activities and retry. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_RADIO_NOTIFICATION_CFG_SET, uint32_t, sd_radio_notification_cfg_set(uint8_t type, uint8_t distance)); - -/**@brief Encrypts a block according to the specified parameters. - * - * 128-bit AES encryption. - * - * @note: - * - The application may set the SEVONPEND bit in the SCR to 1 to make the SoftDevice sleep while - * the ECB is running. The SEVONPEND bit should only be cleared (set to 0) from application - * main or low interrupt level. - * - * @param[in, out] p_ecb_data Pointer to the ECB parameters' struct (two input - * parameters and one output parameter). - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_ECB_BLOCK_ENCRYPT, uint32_t, sd_ecb_block_encrypt(nrf_ecb_hal_data_t * p_ecb_data)); - -/**@brief Encrypts multiple data blocks provided as an array of data block structures. - * - * @details: Performs 128-bit AES encryption on multiple data blocks - * - * @note: - * - The application may set the SEVONPEND bit in the SCR to 1 to make the SoftDevice sleep while - * the ECB is running. The SEVONPEND bit should only be cleared (set to 0) from application - * main or low interrupt level. - * - * @param[in] block_count Count of blocks in the p_data_blocks array. - * @param[in,out] p_data_blocks Pointer to the first entry in a contiguous array of - * @ref nrf_ecb_hal_data_block_t structures. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_ECB_BLOCKS_ENCRYPT, uint32_t, sd_ecb_blocks_encrypt(uint8_t block_count, nrf_ecb_hal_data_block_t * p_data_blocks)); - -/**@brief Gets any pending events generated by the SoC API. - * - * The application should keep calling this function to get events, until ::NRF_ERROR_NOT_FOUND is returned. - * - * @param[out] p_evt_id Set to one of the values in @ref NRF_SOC_EVTS, if any events are pending. - * - * @retval ::NRF_SUCCESS An event was pending. The event id is written in the p_evt_id parameter. - * @retval ::NRF_ERROR_NOT_FOUND No pending events. - */ -SVCALL(SD_EVT_GET, uint32_t, sd_evt_get(uint32_t * p_evt_id)); - -/**@brief Get the temperature measured on the chip - * - * This function will block until the temperature measurement is done. - * It takes around 50 us from call to return. - * - * @param[out] p_temp Result of temperature measurement. Die temperature in 0.25 degrees Celsius. - * - * @retval ::NRF_SUCCESS A temperature measurement was done, and the temperature was written to temp - */ -SVCALL(SD_TEMP_GET, uint32_t, sd_temp_get(int32_t * p_temp)); - -/**@brief Flash Write -* -* Commands to write a buffer to flash -* -* If the SoftDevice is enabled: -* This call initiates the flash access command, and its completion will be communicated to the -* application with exactly one of the following events: -* - @ref NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed. -* - @ref NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started. -* -* If the SoftDevice is not enabled no event will be generated, and this call will return @ref NRF_SUCCESS when the - * write has been completed -* -* @note -* - This call takes control over the radio and the CPU during flash erase and write to make sure that -* they will not interfere with the flash access. This means that all interrupts will be blocked -* for a predictable time (depending on the NVMC specification in the device's Product Specification -* and the command parameters). -* - The data in the p_src buffer should not be modified before the @ref NRF_EVT_FLASH_OPERATION_SUCCESS -* or the @ref NRF_EVT_FLASH_OPERATION_ERROR have been received if the SoftDevice is enabled. -* -* -* @param[in] p_dst Pointer to start of flash location to be written. -* @param[in] p_src Pointer to buffer with data to be written. -* @param[in] size Number of 32-bit words to write. Maximum size is the number of words in one -* flash page. See the device's Product Specification for details. -* -* @retval ::NRF_ERROR_INVALID_ADDR Tried to write to a non existing flash address, or p_dst or p_src was unaligned. -* @retval ::NRF_ERROR_BUSY The previous command has not yet completed. -* @retval ::NRF_ERROR_INVALID_LENGTH Size was 0, or higher than the maximum allowed size. -* @retval ::NRF_ERROR_FORBIDDEN Tried to write to or read from protected location. -* @retval ::NRF_SUCCESS The command was accepted. -*/ -SVCALL(SD_FLASH_WRITE, uint32_t, sd_flash_write(uint32_t * p_dst, uint32_t const * p_src, uint32_t size)); - - -/**@brief Flash Erase page -* -* Commands to erase a flash page -* If the SoftDevice is enabled: -* This call initiates the flash access command, and its completion will be communicated to the -* application with exactly one of the following events: -* - @ref NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed. -* - @ref NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started. -* -* If the SoftDevice is not enabled no event will be generated, and this call will return @ref NRF_SUCCESS when the -* erase has been completed -* -* @note -* - This call takes control over the radio and the CPU during flash erase and write to make sure that -* they will not interfere with the flash access. This means that all interrupts will be blocked -* for a predictable time (depending on the NVMC specification in the device's Product Specification -* and the command parameters). -* -* -* @param[in] page_number Page number of the page to erase -* -* @retval ::NRF_ERROR_INTERNAL If a new session could not be opened due to an internal error. -* @retval ::NRF_ERROR_INVALID_ADDR Tried to erase to a non existing flash page. -* @retval ::NRF_ERROR_BUSY The previous command has not yet completed. -* @retval ::NRF_ERROR_FORBIDDEN Tried to erase a protected page. -* @retval ::NRF_SUCCESS The command was accepted. -*/ -SVCALL(SD_FLASH_PAGE_ERASE, uint32_t, sd_flash_page_erase(uint32_t page_number)); - - -/**@brief Flash Protection set - * - * Commands to set the flash protection configuration registers. - This sets the CONFIGx registers of the BPROT peripheral. - * - * @note To read the values read them directly. They are only write-protected. - * - * @param[in] block_cfg0 Value to be written to the configuration register. - * @param[in] block_cfg1 Value to be written to the configuration register. - * @param[in] block_cfg2 Value to be written to the configuration register. - * @param[in] block_cfg3 Value to be written to the configuration register. - * - * @retval ::NRF_ERROR_FORBIDDEN Tried to protect the SoftDevice. - * @retval ::NRF_SUCCESS Values successfully written to configuration registers. - */ -SVCALL(SD_FLASH_PROTECT, uint32_t, sd_flash_protect(uint32_t block_cfg0, uint32_t block_cfg1, uint32_t block_cfg2, uint32_t block_cfg3)); - -/**@brief Opens a session for radio timeslot requests. - * - * @note Only one session can be open at a time. - * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START) will be called when the radio timeslot - * starts. From this point the NRF_RADIO and NRF_TIMER0 peripherals can be freely accessed - * by the application. - * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_TIMER0) is called whenever the NRF_TIMER0 - * interrupt occurs. - * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_RADIO) is called whenever the NRF_RADIO - * interrupt occurs. - * @note p_radio_signal_callback() will be called at ARM interrupt priority level 0. This - * implies that none of the sd_* API calls can be used from p_radio_signal_callback(). - * - * @param[in] p_radio_signal_callback The signal callback. - * - * @retval ::NRF_ERROR_INVALID_ADDR p_radio_signal_callback is an invalid function pointer. - * @retval ::NRF_ERROR_BUSY If session cannot be opened. - * @retval ::NRF_ERROR_INTERNAL If a new session could not be opened due to an internal error. - * @retval ::NRF_SUCCESS Otherwise. - */ - SVCALL(SD_RADIO_SESSION_OPEN, uint32_t, sd_radio_session_open(nrf_radio_signal_callback_t p_radio_signal_callback)); - -/**@brief Closes a session for radio timeslot requests. - * - * @note Any current radio timeslot will be finished before the session is closed. - * @note If a radio timeslot is scheduled when the session is closed, it will be canceled. - * @note The application cannot consider the session closed until the @ref NRF_EVT_RADIO_SESSION_CLOSED - * event is received. - * - * @retval ::NRF_ERROR_FORBIDDEN If session not opened. - * @retval ::NRF_ERROR_BUSY If session is currently being closed. - * @retval ::NRF_SUCCESS Otherwise. - */ - SVCALL(SD_RADIO_SESSION_CLOSE, uint32_t, sd_radio_session_close(void)); - -/**@brief Requests a radio timeslot. - * - * @note The request type is determined by p_request->request_type, and can be one of @ref NRF_RADIO_REQ_TYPE_EARLIEST - * and @ref NRF_RADIO_REQ_TYPE_NORMAL. The first request in a session must always be of type @ref NRF_RADIO_REQ_TYPE_EARLIEST. - * @note For a normal request (@ref NRF_RADIO_REQ_TYPE_NORMAL), the start time of a radio timeslot is specified by - * p_request->distance_us and is given relative to the start of the previous timeslot. - * @note A too small p_request->distance_us will lead to a @ref NRF_EVT_RADIO_BLOCKED event. - * @note Timeslots scheduled too close will lead to a @ref NRF_EVT_RADIO_BLOCKED event. - * @note See the SoftDevice Specification for more on radio timeslot scheduling, distances and lengths. - * @note If an opportunity for the first radio timeslot is not found before 100 ms after the call to this - * function, it is not scheduled, and instead a @ref NRF_EVT_RADIO_BLOCKED event is sent. - * The application may then try to schedule the first radio timeslot again. - * @note Successful requests will result in nrf_radio_signal_callback_t(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START). - * Unsuccessful requests will result in a @ref NRF_EVT_RADIO_BLOCKED event, see @ref NRF_SOC_EVTS. - * @note The jitter in the start time of the radio timeslots is +/- @ref NRF_RADIO_START_JITTER_US us. - * @note The nrf_radio_signal_callback_t(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START) call has a latency relative to the - * specified radio timeslot start, but this does not affect the actual start time of the timeslot. - * @note NRF_TIMER0 is reset at the start of the radio timeslot, and is clocked at 1MHz from the high frequency - * (16 MHz) clock source. If p_request->hfclk_force_xtal is true, the high frequency clock is - * guaranteed to be clocked from the external crystal. - * @note The SoftDevice will neither access the NRF_RADIO peripheral nor the NRF_TIMER0 peripheral - * during the radio timeslot. - * - * @param[in] p_request Pointer to the request parameters. - * - * @retval ::NRF_ERROR_FORBIDDEN If session not opened or the session is not IDLE. - * @retval ::NRF_ERROR_INVALID_ADDR If the p_request pointer is invalid. - * @retval ::NRF_ERROR_INVALID_PARAM If the parameters of p_request are not valid. - * @retval ::NRF_SUCCESS Otherwise. - */ - SVCALL(SD_RADIO_REQUEST, uint32_t, sd_radio_request(nrf_radio_request_t const * p_request)); - -/**@} */ - -#ifdef __cplusplus -} -#endif -#endif // NRF_SOC_H__ - -/**@} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_svc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_svc.h deleted file mode 100644 index 292c6929828..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/headers/nrf_svc.h +++ /dev/null @@ -1,90 +0,0 @@ -/* - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef NRF_SVC__ -#define NRF_SVC__ - -#include "stdint.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef SVCALL_AS_NORMAL_FUNCTION -#define SVCALL(number, return_type, signature) return_type signature -#else - -#ifndef SVCALL -#if defined (__CC_ARM) -#define SVCALL(number, return_type, signature) return_type __svc(number) signature -#elif defined (__GNUC__) -#ifdef __cplusplus -#define GCC_CAST_CPP (uint16_t) -#else -#define GCC_CAST_CPP -#endif -#define SVCALL(number, return_type, signature) \ - _Pragma("GCC diagnostic push") \ - _Pragma("GCC diagnostic ignored \"-Wreturn-type\"") \ - __attribute__((naked)) \ - __attribute__((unused)) \ - static return_type signature \ - { \ - __asm( \ - "svc %0\n" \ - "bx r14" : : "I" (GCC_CAST_CPP number) : "r0" \ - ); \ - } \ - _Pragma("GCC diagnostic pop") - -#elif defined (__ICCARM__) -#define PRAGMA(x) _Pragma(#x) -#define SVCALL(number, return_type, signature) \ -PRAGMA(swi_number = (number)) \ - __swi return_type signature; -#else -#define SVCALL(number, return_type, signature) return_type signature -#endif -#endif // SVCALL - -#endif // SVCALL_AS_NORMAL_FUNCTION - -#ifdef __cplusplus -} -#endif -#endif // NRF_SVC__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/hex/s132_nrf52_5.0.0_licence-agreement.txt b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/hex/s132_nrf52_5.0.0_licence-agreement.txt deleted file mode 100644 index 00c2e54c477..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/hex/s132_nrf52_5.0.0_licence-agreement.txt +++ /dev/null @@ -1,35 +0,0 @@ -Copyright (c) 2007 - 2017, Nordic Semiconductor ASA -All rights reserved. - -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - -1. Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. - -2. Redistributions in binary form, except as embedded into a Nordic - Semiconductor ASA integrated circuit in a product or a software update for - such product, must reproduce the above copyright notice, this list of - conditions and the following disclaimer in the documentation and/or other - materials provided with the distribution. - -3. Neither the name of Nordic Semiconductor ASA nor the names of its - contributors may be used to endorse or promote products derived from this - software without specific prior written permission. - -4. This software, with or without modification, must only be used with a - Nordic Semiconductor ASA integrated circuit. - -5. Any software provided in binary form under this license must not be reverse - engineered, decompiled, modified and/or disassembled. - -THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS -OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE -LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT -OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/hex/s132_nrf52_5.0.0_softdevice.hex b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/hex/s132_nrf52_5.0.0_softdevice.hex deleted file mode 100644 index c52575693d1..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/hex/s132_nrf52_5.0.0_softdevice.hex +++ /dev/null @@ -1,4265 +0,0 @@ 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a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/mbed_lib.json b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/mbed_lib.json deleted file mode 100644 index bb625ad33f6..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S132_OTA/mbed_lib.json +++ /dev/null @@ -1,40 +0,0 @@ -{ - "name": "softdevice", - "macros": [ - "SOFTDEVICE_PRESENT=1", - "S132", - "BLE_STACK_SUPPORT_REQD", - "NRF_SDH_CLOCK_LF_XTAL_ACCURACY=7", - "NRF_SD_BLE_API_VERSION=5", - "NRF_SDH_ENABLED=1", - "NRF_SDH_BLE_ENABLED=1", - "PEER_MANAGER_ENABLED=1", - "NRF_SDH_BLE_GATT_MAX_MTU_SIZE=23", - "NRF_SDH_BLE_OBSERVER_PRIO_LEVELS=4", - "NRF_SDH_BLE_GAP_EVENT_LENGTH=3", - "BLE_ADV_BLE_OBSERVER_PRIO=1", - "BLE_CONN_STATE_BLE_OBSERVER_PRIO=0", - "BLE_CONN_PARAMS_BLE_OBSERVER_PRIO=1", - "NRF_BLE_GATT_BLE_OBSERVER_PRIO=1", - "NRF_SDH_DISPATCH_MODEL=2", - "NRF_SDH_SOC_ENABLED=1", - "NRF_SDH_STACK_OBSERVER_PRIO_LEVELS=2", - "NRF_SDH_STATE_OBSERVER_PRIO_LEVELS=2", - "NRF_SDH_SOC_OBSERVER_PRIO_LEVELS=2", - "NRF_SDH_REQ_OBSERVER_PRIO_LEVELS=2", - "NRF_SDH_BLE_STACK_OBSERVER_PRIO=0", - "NRF_SDH_SOC_STACK_OBSERVER_PRIO=0", - "FDS_BACKEND=2", - "SWI_DISABLE1", - "SWI_DISABLE2", - "SWI_DISABLE3", - "SWI_DISABLE4", - "SWI_DISABLE5" - ], - "target_overrides": { - "*": { - "target.features_add": ["BLE"], - "target.bootloader_img": "hex/s132_nrf52_5.0.0_softdevice.hex" - } - } -} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/doc/s140_nrf52840_5.0.0-2.alpha_licence-agreement.pdf b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/doc/s140_nrf52840_5.0.0-2.alpha_licence-agreement.pdf deleted file mode 100644 index 1a1a731d3ade66c29e06ca096207060cb04bead6..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 5542 zcmc(jS6EZqw#Pw=(xpj}5)lYJBq0d_1f_&7UFj_>AQA$S&;&#}D1;)?yGm7*A_@wE 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a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/doc/s140_nrf52840_5.0.0-2.alpha_readme.txt b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/doc/s140_nrf52840_5.0.0-2.alpha_readme.txt deleted file mode 100644 index 2cce458228f..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/doc/s140_nrf52840_5.0.0-2.alpha_readme.txt +++ /dev/null @@ -1,10 +0,0 @@ -s140_nrf52840_5.0.0-2.alpha - -This release consists of the following: - -- This readme file -- The s140_nrf52840_5.0.0-2.alpha API (SoftDevice header files) -- The s140_nrf52840_5.0.0-2.alpha license agreement -- The s140_nrf52840_5.0.0-2.alpha release notes -- The s140_nrf52840_5.0.0-2.alpha SoftDevice (binary hex file) -- The s140_nrf52840_5.0.0-2.alpha Migration Document diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/doc/s140_nrf52840_5.0.0-2.alpha_release-notes-update-1.pdf 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a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_err.h +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - @addtogroup BLE_COMMON - @{ - @addtogroup nrf_error - @{ - @ingroup BLE_COMMON - @} - - @defgroup ble_err General error codes - @{ - - @brief General error code definitions for the BLE API. - - @ingroup BLE_COMMON -*/ -#ifndef NRF_BLE_ERR_H__ -#define NRF_BLE_ERR_H__ - -#include "nrf_error.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* @defgroup BLE_ERRORS Error Codes - * @{ */ -#define BLE_ERROR_NOT_ENABLED (NRF_ERROR_STK_BASE_NUM+0x001) /**< @ref sd_ble_enable has not been called. */ -#define BLE_ERROR_INVALID_CONN_HANDLE (NRF_ERROR_STK_BASE_NUM+0x002) /**< Invalid connection handle. */ -#define BLE_ERROR_INVALID_ATTR_HANDLE (NRF_ERROR_STK_BASE_NUM+0x003) /**< Invalid attribute handle. */ -#define BLE_ERROR_NO_TX_PACKETS (NRF_ERROR_STK_BASE_NUM+0x004) /**< Not enough application packets available on this connection. */ -#define BLE_ERROR_INVALID_ROLE (NRF_ERROR_STK_BASE_NUM+0x005) /**< Invalid role. */ -#define BLE_ERROR_BLOCKED_BY_OTHER_LINKS (NRF_ERROR_STK_BASE_NUM+0x006) /**< The attempt to change link settings failed due to the scheduling of other links. */ -/** @} */ - - -/** @defgroup BLE_ERROR_SUBRANGES Module specific error code subranges - * @brief Assignment of subranges for module specific error codes. - * @note For specific error codes, see ble_.h or ble_error_.h. - * @{ */ -#define NRF_L2CAP_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x100) /**< L2CAP specific errors. */ -#define NRF_GAP_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x200) /**< GAP specific errors. */ -#define NRF_GATTC_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x300) /**< GATT client specific errors. */ -#define NRF_GATTS_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x400) /**< GATT server specific errors. */ -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif - - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_gap.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_gap.h deleted file mode 100644 index 339db01fd18..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_gap.h +++ /dev/null @@ -1,2211 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - @addtogroup BLE_GAP Generic Access Profile (GAP) - @{ - @brief Definitions and prototypes for the GAP interface. - */ - -#ifndef BLE_GAP_H__ -#define BLE_GAP_H__ - - -#include "ble_types.h" -#include "ble_ranges.h" -#include "nrf_svc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@addtogroup BLE_GAP_ENUMERATIONS Enumerations - * @{ */ - -/**@brief GAP API SVC numbers. - */ -enum BLE_GAP_SVCS -{ - SD_BLE_GAP_ADDR_SET = BLE_GAP_SVC_BASE, /**< Set own Bluetooth Address. */ - SD_BLE_GAP_ADDR_GET, /**< Get own Bluetooth Address. */ - SD_BLE_GAP_WHITELIST_SET, /**< Set active whitelist. */ - SD_BLE_GAP_DEVICE_IDENTITIES_SET, /**< Set device identity list. */ - SD_BLE_GAP_PRIVACY_SET, /**< Set Privacy settings*/ - SD_BLE_GAP_PRIVACY_GET, /**< Get Privacy settings*/ - SD_BLE_GAP_ADV_DATA_SET, /**< Set Advertising Data. */ - SD_BLE_GAP_ADV_START, /**< Start Advertising. */ - SD_BLE_GAP_ADV_STOP, /**< Stop Advertising. */ - SD_BLE_GAP_CONN_PARAM_UPDATE, /**< Connection Parameter Update. */ - SD_BLE_GAP_DISCONNECT, /**< Disconnect. */ - SD_BLE_GAP_TX_POWER_SET, /**< Set TX Power. */ - SD_BLE_GAP_APPEARANCE_SET, /**< Set Appearance. */ - SD_BLE_GAP_APPEARANCE_GET, /**< Get Appearance. */ - SD_BLE_GAP_PPCP_SET, /**< Set PPCP. */ - SD_BLE_GAP_PPCP_GET, /**< Get PPCP. */ - SD_BLE_GAP_DEVICE_NAME_SET, /**< Set Device Name. */ - SD_BLE_GAP_DEVICE_NAME_GET, /**< Get Device Name. */ - SD_BLE_GAP_AUTHENTICATE, /**< Initiate Pairing/Bonding. */ - SD_BLE_GAP_SEC_PARAMS_REPLY, /**< Reply with Security Parameters. */ - SD_BLE_GAP_AUTH_KEY_REPLY, /**< Reply with an authentication key. */ - SD_BLE_GAP_LESC_DHKEY_REPLY, /**< Reply with an LE Secure Connections DHKey. */ - SD_BLE_GAP_KEYPRESS_NOTIFY, /**< Notify of a keypress during an authentication procedure. */ - SD_BLE_GAP_LESC_OOB_DATA_GET, /**< Get the local LE Secure Connections OOB data. */ - SD_BLE_GAP_LESC_OOB_DATA_SET, /**< Set the remote LE Secure Connections OOB data. */ - SD_BLE_GAP_ENCRYPT, /**< Initiate encryption procedure. */ - SD_BLE_GAP_SEC_INFO_REPLY, /**< Reply with Security Information. */ - SD_BLE_GAP_CONN_SEC_GET, /**< Obtain connection security level. */ - SD_BLE_GAP_RSSI_START, /**< Start reporting of changes in RSSI. */ - SD_BLE_GAP_RSSI_STOP, /**< Stop reporting of changes in RSSI. */ - SD_BLE_GAP_SCAN_START, /**< Start Scanning. */ - SD_BLE_GAP_SCAN_STOP, /**< Stop Scanning. */ - SD_BLE_GAP_CONNECT, /**< Connect. */ - SD_BLE_GAP_CONNECT_CANCEL, /**< Cancel ongoing connection procedure. */ - SD_BLE_GAP_RSSI_GET, /**< Get the last RSSI sample. */ - SD_BLE_GAP_PHY_REQUEST, /**< Initiate PHY Update procedure. */ - SD_BLE_GAP_DATA_LENGTH_UPDATE, /**< Initiate or respond to a Data Length Update Procedure. */ -}; - -/**@brief GAP Event IDs. - * IDs that uniquely identify an event coming from the stack to the application. - */ -enum BLE_GAP_EVTS -{ - BLE_GAP_EVT_CONNECTED = BLE_GAP_EVT_BASE, /**< Connection established. \n See @ref ble_gap_evt_connected_t. */ - BLE_GAP_EVT_DISCONNECTED, /**< Disconnected from peer. \n See @ref ble_gap_evt_disconnected_t. */ - BLE_GAP_EVT_CONN_PARAM_UPDATE, /**< Connection Parameters updated. \n See @ref ble_gap_evt_conn_param_update_t. */ - BLE_GAP_EVT_SEC_PARAMS_REQUEST, /**< Request to provide security parameters. \n Reply with @ref sd_ble_gap_sec_params_reply. \n See @ref ble_gap_evt_sec_params_request_t. */ - BLE_GAP_EVT_SEC_INFO_REQUEST, /**< Request to provide security information. \n Reply with @ref sd_ble_gap_sec_info_reply. \n See @ref ble_gap_evt_sec_info_request_t. */ - BLE_GAP_EVT_PASSKEY_DISPLAY, /**< Request to display a passkey to the user. \n In LESC Numeric Comparison, reply with @ref sd_ble_gap_auth_key_reply. \n See @ref ble_gap_evt_passkey_display_t. */ - BLE_GAP_EVT_KEY_PRESSED, /**< Notification of a keypress on the remote device.\n See @ref ble_gap_evt_key_pressed_t */ - BLE_GAP_EVT_AUTH_KEY_REQUEST, /**< Request to provide an authentication key. \n Reply with @ref sd_ble_gap_auth_key_reply. \n See @ref ble_gap_evt_auth_key_request_t. */ - BLE_GAP_EVT_LESC_DHKEY_REQUEST, /**< Request to calculate an LE Secure Connections DHKey. \n Reply with @ref sd_ble_gap_lesc_dhkey_reply. \n See @ref ble_gap_evt_lesc_dhkey_request_t */ - BLE_GAP_EVT_AUTH_STATUS, /**< Authentication procedure completed with status. \n See @ref ble_gap_evt_auth_status_t. */ - BLE_GAP_EVT_CONN_SEC_UPDATE, /**< Connection security updated. \n See @ref ble_gap_evt_conn_sec_update_t. */ - BLE_GAP_EVT_TIMEOUT, /**< Timeout expired. \n See @ref ble_gap_evt_timeout_t. */ - BLE_GAP_EVT_RSSI_CHANGED, /**< RSSI report. \n See @ref ble_gap_evt_rssi_changed_t. */ - BLE_GAP_EVT_ADV_REPORT, /**< Advertising report. \n See @ref ble_gap_evt_adv_report_t. */ - BLE_GAP_EVT_SEC_REQUEST, /**< Security Request. \n See @ref ble_gap_evt_sec_request_t. */ - BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST, /**< Connection Parameter Update Request. \n Reply with @ref sd_ble_gap_conn_param_update. \n See @ref ble_gap_evt_conn_param_update_request_t. */ - BLE_GAP_EVT_SCAN_REQ_REPORT, /**< Scan request report. \n See @ref ble_gap_evt_scan_req_report_t. */ - BLE_GAP_EVT_PHY_UPDATE, /**< PHY have been updated \n See @ref ble_gap_evt_phy_update_t. */ - BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST, /**< Data Length Update request. \n Reply with @ref sd_ble_gap_data_length_update.\n See @ref ble_gap_evt_data_length_update_request_t. */ - BLE_GAP_EVT_DATA_LENGTH_UPDATE, /**< LL Data Channel PDU payload length updated. \n See @ref ble_gap_evt_data_length_update_t. */ -}; - -/**@brief GAP Option IDs. - * IDs that uniquely identify a GAP option. - */ -enum BLE_GAP_OPTS -{ - BLE_GAP_OPT_CH_MAP = BLE_GAP_OPT_BASE, /**< Channel Map. @ref ble_gap_opt_ch_map_t */ - BLE_GAP_OPT_LOCAL_CONN_LATENCY, /**< Local connection latency. @ref ble_gap_opt_local_conn_latency_t */ - BLE_GAP_OPT_PASSKEY, /**< Set passkey. @ref ble_gap_opt_passkey_t */ - BLE_GAP_OPT_SCAN_REQ_REPORT, /**< Scan request report. @ref ble_gap_opt_scan_req_report_t */ - BLE_GAP_OPT_COMPAT_MODE_1, /**< Compatibility mode. @ref ble_gap_opt_compat_mode_1_t */ - BLE_GAP_OPT_COMPAT_MODE_2, /**< Compatibility mode. @ref ble_gap_opt_compat_mode_2_t */ - BLE_GAP_OPT_AUTH_PAYLOAD_TIMEOUT, /**< Set Authenticated payload timeout. @ref ble_gap_opt_auth_payload_timeout_t */ - BLE_GAP_OPT_PREFERRED_PHYS_SET, /**< Set the preferred PHYs for all new connections. @ref ble_gap_opt_preferred_phys_t */ - BLE_GAP_OPT_SLAVE_LATENCY_DISABLE, /**< Disable slave latency. @ref ble_gap_opt_slave_latency_disable_t */ -}; - -/**@brief GAP Configuration IDs. - * - * IDs that uniquely identify a GAP configuration. - */ -enum BLE_GAP_CFGS -{ - BLE_GAP_CFG_ROLE_COUNT = BLE_GAP_CFG_BASE, /**< Role count configuration. */ - BLE_GAP_CFG_DEVICE_NAME, /**< Device name configuration. */ -}; - -/** @} */ - -/**@addtogroup BLE_GAP_DEFINES Defines - * @{ */ - -/**@defgroup BLE_ERRORS_GAP SVC return values specific to GAP - * @{ */ -#define BLE_ERROR_GAP_UUID_LIST_MISMATCH (NRF_GAP_ERR_BASE + 0x000) /**< UUID list does not contain an integral number of UUIDs. */ -#define BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST (NRF_GAP_ERR_BASE + 0x001) /**< Use of Whitelist not permitted with discoverable advertising. */ -#define BLE_ERROR_GAP_INVALID_BLE_ADDR (NRF_GAP_ERR_BASE + 0x002) /**< The upper two bits of the address do not correspond to the specified address type. */ -#define BLE_ERROR_GAP_WHITELIST_IN_USE (NRF_GAP_ERR_BASE + 0x003) /**< Attempt to modify the whitelist while already in use by another operation. */ -#define BLE_ERROR_GAP_DEVICE_IDENTITIES_IN_USE (NRF_GAP_ERR_BASE + 0x004) /**< Attempt to modify the device identity list while already in use by another operation. */ -#define BLE_ERROR_GAP_DEVICE_IDENTITIES_DUPLICATE (NRF_GAP_ERR_BASE + 0x005) /**< The device identity list contains entries with duplicate identity addresses. */ -/**@} */ - - -/**@defgroup BLE_GAP_ROLES GAP Roles - * @note Not explicitly used in peripheral API, but will be relevant for central API. - * @{ */ -#define BLE_GAP_ROLE_INVALID 0x0 /**< Invalid Role. */ -#define BLE_GAP_ROLE_PERIPH 0x1 /**< Peripheral Role. */ -#define BLE_GAP_ROLE_CENTRAL 0x2 /**< Central Role. */ -/**@} */ - - -/**@defgroup BLE_GAP_TIMEOUT_SOURCES GAP Timeout sources - * @{ */ -#define BLE_GAP_TIMEOUT_SRC_ADVERTISING 0x00 /**< Advertising timeout. */ -#define BLE_GAP_TIMEOUT_SRC_SECURITY_REQUEST 0x01 /**< Security request timeout. */ -#define BLE_GAP_TIMEOUT_SRC_SCAN 0x02 /**< Scanning timeout. */ -#define BLE_GAP_TIMEOUT_SRC_CONN 0x03 /**< Connection timeout. */ -#define BLE_GAP_TIMEOUT_SRC_AUTH_PAYLOAD 0x04 /**< Authenticated payload timeout. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADDR_TYPES GAP Address types - * @{ */ -#define BLE_GAP_ADDR_TYPE_PUBLIC 0x00 /**< Public address. */ -#define BLE_GAP_ADDR_TYPE_RANDOM_STATIC 0x01 /**< Random static address. */ -#define BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE 0x02 /**< Random private resolvable address. */ -#define BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE 0x03 /**< Random private non-resolvable address. */ -/**@} */ - - -/**@brief The default interval in seconds at which a private address is refreshed. */ -#define BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S (900) /* 15 minutes. */ -/**@brief The maximum interval in seconds at which a private address can be refreshed. */ -#define BLE_GAP_MAX_PRIVATE_ADDR_CYCLE_INTERVAL_S (41400) /* 11 hours 30 minutes. */ - - -/** @brief BLE address length. */ -#define BLE_GAP_ADDR_LEN (6) - - -/**@defgroup BLE_GAP_PRIVACY_MODES Privacy modes - * @{ */ -#define BLE_GAP_PRIVACY_MODE_OFF 0x00 /**< Device will send and accept its identity address for its own address. */ -#define BLE_GAP_PRIVACY_MODE_DEVICE_PRIVACY 0x01 /**< Device will send and accept only private addresses for its own address. */ -/**@} */ - - -/**@defgroup BLE_GAP_AD_TYPE_DEFINITIONS GAP Advertising and Scan Response Data format - * @note Found at https://www.bluetooth.org/Technical/AssignedNumbers/generic_access_profile.htm - * @{ */ -#define BLE_GAP_AD_TYPE_FLAGS 0x01 /**< Flags for discoverability. */ -#define BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_MORE_AVAILABLE 0x02 /**< Partial list of 16 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_COMPLETE 0x03 /**< Complete list of 16 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_MORE_AVAILABLE 0x04 /**< Partial list of 32 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_COMPLETE 0x05 /**< Complete list of 32 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_MORE_AVAILABLE 0x06 /**< Partial list of 128 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_COMPLETE 0x07 /**< Complete list of 128 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_SHORT_LOCAL_NAME 0x08 /**< Short local device name. */ -#define BLE_GAP_AD_TYPE_COMPLETE_LOCAL_NAME 0x09 /**< Complete local device name. */ -#define BLE_GAP_AD_TYPE_TX_POWER_LEVEL 0x0A /**< Transmit power level. */ -#define BLE_GAP_AD_TYPE_CLASS_OF_DEVICE 0x0D /**< Class of device. */ -#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C 0x0E /**< Simple Pairing Hash C. */ -#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R 0x0F /**< Simple Pairing Randomizer R. */ -#define BLE_GAP_AD_TYPE_SECURITY_MANAGER_TK_VALUE 0x10 /**< Security Manager TK Value. */ -#define BLE_GAP_AD_TYPE_SECURITY_MANAGER_OOB_FLAGS 0x11 /**< Security Manager Out Of Band Flags. */ -#define BLE_GAP_AD_TYPE_SLAVE_CONNECTION_INTERVAL_RANGE 0x12 /**< Slave Connection Interval Range. */ -#define BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_16BIT 0x14 /**< List of 16-bit Service Solicitation UUIDs. */ -#define BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_128BIT 0x15 /**< List of 128-bit Service Solicitation UUIDs. */ -#define BLE_GAP_AD_TYPE_SERVICE_DATA 0x16 /**< Service Data - 16-bit UUID. */ -#define BLE_GAP_AD_TYPE_PUBLIC_TARGET_ADDRESS 0x17 /**< Public Target Address. */ -#define BLE_GAP_AD_TYPE_RANDOM_TARGET_ADDRESS 0x18 /**< Random Target Address. */ -#define BLE_GAP_AD_TYPE_APPEARANCE 0x19 /**< Appearance. */ -#define BLE_GAP_AD_TYPE_ADVERTISING_INTERVAL 0x1A /**< Advertising Interval. */ -#define BLE_GAP_AD_TYPE_LE_BLUETOOTH_DEVICE_ADDRESS 0x1B /**< LE Bluetooth Device Address. */ -#define BLE_GAP_AD_TYPE_LE_ROLE 0x1C /**< LE Role. */ -#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C256 0x1D /**< Simple Pairing Hash C-256. */ -#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R256 0x1E /**< Simple Pairing Randomizer R-256. */ -#define BLE_GAP_AD_TYPE_SERVICE_DATA_32BIT_UUID 0x20 /**< Service Data - 32-bit UUID. */ -#define BLE_GAP_AD_TYPE_SERVICE_DATA_128BIT_UUID 0x21 /**< Service Data - 128-bit UUID. */ -#define BLE_GAP_AD_TYPE_LESC_CONFIRMATION_VALUE 0x22 /**< LE Secure Connections Confirmation Value */ -#define BLE_GAP_AD_TYPE_LESC_RANDOM_VALUE 0x23 /**< LE Secure Connections Random Value */ -#define BLE_GAP_AD_TYPE_URI 0x24 /**< URI */ -#define BLE_GAP_AD_TYPE_3D_INFORMATION_DATA 0x3D /**< 3D Information Data. */ -#define BLE_GAP_AD_TYPE_MANUFACTURER_SPECIFIC_DATA 0xFF /**< Manufacturer Specific Data. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADV_FLAGS GAP Advertisement Flags - * @{ */ -#define BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE (0x01) /**< LE Limited Discoverable Mode. */ -#define BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE (0x02) /**< LE General Discoverable Mode. */ -#define BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED (0x04) /**< BR/EDR not supported. */ -#define BLE_GAP_ADV_FLAG_LE_BR_EDR_CONTROLLER (0x08) /**< Simultaneous LE and BR/EDR, Controller. */ -#define BLE_GAP_ADV_FLAG_LE_BR_EDR_HOST (0x10) /**< Simultaneous LE and BR/EDR, Host. */ -#define BLE_GAP_ADV_FLAGS_LE_ONLY_LIMITED_DISC_MODE (BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE | BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED) /**< LE Limited Discoverable Mode, BR/EDR not supported. */ -#define BLE_GAP_ADV_FLAGS_LE_ONLY_GENERAL_DISC_MODE (BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE | BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED) /**< LE General Discoverable Mode, BR/EDR not supported. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADV_INTERVALS GAP Advertising interval max and min - * @{ */ -#define BLE_GAP_ADV_INTERVAL_MIN 0x0020 /**< Minimum Advertising interval in 625 us units, i.e. 20 ms. */ -#define BLE_GAP_ADV_NONCON_INTERVAL_MIN 0x00A0 /**< Minimum Advertising interval in 625 us units for non connectable mode, i.e. 100 ms. */ -#define BLE_GAP_ADV_INTERVAL_MAX 0x4000 /**< Maximum Advertising interval in 625 us units, i.e. 10.24 s. */ - /**@} */ - - -/**@defgroup BLE_GAP_SCAN_INTERVALS GAP Scan interval max and min - * @{ */ -#define BLE_GAP_SCAN_INTERVAL_MIN 0x0004 /**< Minimum Scan interval in 625 us units, i.e. 2.5 ms. */ -#define BLE_GAP_SCAN_INTERVAL_MAX 0x4000 /**< Maximum Scan interval in 625 us units, i.e. 10.24 s. */ - /** @} */ - - -/**@defgroup BLE_GAP_SCAN_WINDOW GAP Scan window max and min - * @{ */ -#define BLE_GAP_SCAN_WINDOW_MIN 0x0004 /**< Minimum Scan window in 625 us units, i.e. 2.5 ms. */ -#define BLE_GAP_SCAN_WINDOW_MAX 0x4000 /**< Maximum Scan window in 625 us units, i.e. 10.24 s. */ - /** @} */ - - -/**@defgroup BLE_GAP_SCAN_TIMEOUT GAP Scan timeout max and min - * @{ */ -#define BLE_GAP_SCAN_TIMEOUT_MIN 0x0001 /**< Minimum Scan timeout in seconds. */ -#define BLE_GAP_SCAN_TIMEOUT_MAX 0xFFFF /**< Maximum Scan timeout in seconds. */ - /** @} */ - - -/**@brief Maximum size of advertising data in octets. */ -#define BLE_GAP_ADV_MAX_SIZE (31) - - -/**@defgroup BLE_GAP_ADV_TYPES GAP Advertising types - * @{ */ -#define BLE_GAP_ADV_TYPE_ADV_IND 0x00 /**< Connectable undirected. */ -#define BLE_GAP_ADV_TYPE_ADV_DIRECT_IND 0x01 /**< Connectable directed. */ -#define BLE_GAP_ADV_TYPE_ADV_SCAN_IND 0x02 /**< Scannable undirected. */ -#define BLE_GAP_ADV_TYPE_ADV_NONCONN_IND 0x03 /**< Non connectable undirected. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADV_FILTER_POLICIES GAP Advertising filter policies - * @{ */ -#define BLE_GAP_ADV_FP_ANY 0x00 /**< Allow scan requests and connect requests from any device. */ -#define BLE_GAP_ADV_FP_FILTER_SCANREQ 0x01 /**< Filter scan requests with whitelist. */ -#define BLE_GAP_ADV_FP_FILTER_CONNREQ 0x02 /**< Filter connect requests with whitelist. */ -#define BLE_GAP_ADV_FP_FILTER_BOTH 0x03 /**< Filter both scan and connect requests with whitelist. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADV_TIMEOUT_VALUES GAP Advertising timeout values - * @{ */ -#define BLE_GAP_ADV_TIMEOUT_LIMITED_MAX (180) /**< Maximum advertising time in limited discoverable mode (TGAP(lim_adv_timeout) = 180 s). */ -#define BLE_GAP_ADV_TIMEOUT_GENERAL_UNLIMITED (0) /**< Unlimited advertising in general discoverable mode. */ -/**@} */ - - -/**@defgroup BLE_GAP_DISC_MODES GAP Discovery modes - * @{ */ -#define BLE_GAP_DISC_MODE_NOT_DISCOVERABLE 0x00 /**< Not discoverable discovery Mode. */ -#define BLE_GAP_DISC_MODE_LIMITED 0x01 /**< Limited Discovery Mode. */ -#define BLE_GAP_DISC_MODE_GENERAL 0x02 /**< General Discovery Mode. */ -/**@} */ - - -/**@defgroup BLE_GAP_IO_CAPS GAP IO Capabilities - * @{ */ -#define BLE_GAP_IO_CAPS_DISPLAY_ONLY 0x00 /**< Display Only. */ -#define BLE_GAP_IO_CAPS_DISPLAY_YESNO 0x01 /**< Display and Yes/No entry. */ -#define BLE_GAP_IO_CAPS_KEYBOARD_ONLY 0x02 /**< Keyboard Only. */ -#define BLE_GAP_IO_CAPS_NONE 0x03 /**< No I/O capabilities. */ -#define BLE_GAP_IO_CAPS_KEYBOARD_DISPLAY 0x04 /**< Keyboard and Display. */ -/**@} */ - - -/**@defgroup BLE_GAP_AUTH_KEY_TYPES GAP Authentication Key Types - * @{ */ -#define BLE_GAP_AUTH_KEY_TYPE_NONE 0x00 /**< No key (may be used to reject). */ -#define BLE_GAP_AUTH_KEY_TYPE_PASSKEY 0x01 /**< 6-digit Passkey. */ -#define BLE_GAP_AUTH_KEY_TYPE_OOB 0x02 /**< Out Of Band data. */ -/**@} */ - - -/**@defgroup BLE_GAP_KP_NOT_TYPES GAP Keypress Notification Types - * @{ */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_START 0x00 /**< Passkey entry started. */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_DIGIT_IN 0x01 /**< Passkey digit entered. */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_DIGIT_OUT 0x02 /**< Passkey digit erased. */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_CLEAR 0x03 /**< Passkey cleared. */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_END 0x04 /**< Passkey entry completed. */ -/**@} */ - - -/**@defgroup BLE_GAP_SEC_STATUS GAP Security status - * @{ */ -#define BLE_GAP_SEC_STATUS_SUCCESS 0x00 /**< Procedure completed with success. */ -#define BLE_GAP_SEC_STATUS_TIMEOUT 0x01 /**< Procedure timed out. */ -#define BLE_GAP_SEC_STATUS_PDU_INVALID 0x02 /**< Invalid PDU received. */ -#define BLE_GAP_SEC_STATUS_RFU_RANGE1_BEGIN 0x03 /**< Reserved for Future Use range #1 begin. */ -#define BLE_GAP_SEC_STATUS_RFU_RANGE1_END 0x80 /**< Reserved for Future Use range #1 end. */ -#define BLE_GAP_SEC_STATUS_PASSKEY_ENTRY_FAILED 0x81 /**< Passkey entry failed (user canceled or other). */ -#define BLE_GAP_SEC_STATUS_OOB_NOT_AVAILABLE 0x82 /**< Out of Band Key not available. */ -#define BLE_GAP_SEC_STATUS_AUTH_REQ 0x83 /**< Authentication requirements not met. */ -#define BLE_GAP_SEC_STATUS_CONFIRM_VALUE 0x84 /**< Confirm value failed. */ -#define BLE_GAP_SEC_STATUS_PAIRING_NOT_SUPP 0x85 /**< Pairing not supported. */ -#define BLE_GAP_SEC_STATUS_ENC_KEY_SIZE 0x86 /**< Encryption key size. */ -#define BLE_GAP_SEC_STATUS_SMP_CMD_UNSUPPORTED 0x87 /**< Unsupported SMP command. */ -#define BLE_GAP_SEC_STATUS_UNSPECIFIED 0x88 /**< Unspecified reason. */ -#define BLE_GAP_SEC_STATUS_REPEATED_ATTEMPTS 0x89 /**< Too little time elapsed since last attempt. */ -#define BLE_GAP_SEC_STATUS_INVALID_PARAMS 0x8A /**< Invalid parameters. */ -#define BLE_GAP_SEC_STATUS_DHKEY_FAILURE 0x8B /**< DHKey check failure. */ -#define BLE_GAP_SEC_STATUS_NUM_COMP_FAILURE 0x8C /**< Numeric Comparison failure. */ -#define BLE_GAP_SEC_STATUS_BR_EDR_IN_PROG 0x8D /**< BR/EDR pairing in progress. */ -#define BLE_GAP_SEC_STATUS_X_TRANS_KEY_DISALLOWED 0x8E /**< BR/EDR Link Key cannot be used for LE keys. */ -#define BLE_GAP_SEC_STATUS_RFU_RANGE2_BEGIN 0x8F /**< Reserved for Future Use range #2 begin. */ -#define BLE_GAP_SEC_STATUS_RFU_RANGE2_END 0xFF /**< Reserved for Future Use range #2 end. */ -/**@} */ - - -/**@defgroup BLE_GAP_SEC_STATUS_SOURCES GAP Security status sources - * @{ */ -#define BLE_GAP_SEC_STATUS_SOURCE_LOCAL 0x00 /**< Local failure. */ -#define BLE_GAP_SEC_STATUS_SOURCE_REMOTE 0x01 /**< Remote failure. */ -/**@} */ - - -/**@defgroup BLE_GAP_CP_LIMITS GAP Connection Parameters Limits - * @{ */ -#define BLE_GAP_CP_MIN_CONN_INTVL_NONE 0xFFFF /**< No new minimum connection interval specified in connect parameters. */ -#define BLE_GAP_CP_MIN_CONN_INTVL_MIN 0x0006 /**< Lowest minimum connection interval permitted, in units of 1.25 ms, i.e. 7.5 ms. */ -#define BLE_GAP_CP_MIN_CONN_INTVL_MAX 0x0C80 /**< Highest minimum connection interval permitted, in units of 1.25 ms, i.e. 4 s. */ -#define BLE_GAP_CP_MAX_CONN_INTVL_NONE 0xFFFF /**< No new maximum connection interval specified in connect parameters. */ -#define BLE_GAP_CP_MAX_CONN_INTVL_MIN 0x0006 /**< Lowest maximum connection interval permitted, in units of 1.25 ms, i.e. 7.5 ms. */ -#define BLE_GAP_CP_MAX_CONN_INTVL_MAX 0x0C80 /**< Highest maximum connection interval permitted, in units of 1.25 ms, i.e. 4 s. */ -#define BLE_GAP_CP_SLAVE_LATENCY_MAX 0x01F3 /**< Highest slave latency permitted, in connection events. */ -#define BLE_GAP_CP_CONN_SUP_TIMEOUT_NONE 0xFFFF /**< No new supervision timeout specified in connect parameters. */ -#define BLE_GAP_CP_CONN_SUP_TIMEOUT_MIN 0x000A /**< Lowest supervision timeout permitted, in units of 10 ms, i.e. 100 ms. */ -#define BLE_GAP_CP_CONN_SUP_TIMEOUT_MAX 0x0C80 /**< Highest supervision timeout permitted, in units of 10 ms, i.e. 32 s. */ -/**@} */ - - -/**@defgroup BLE_GAP_DEVNAME GAP device name defines. - * @{ */ -#define BLE_GAP_DEVNAME_DEFAULT "nRF5x" /**< Default device name value. */ -#define BLE_GAP_DEVNAME_DEFAULT_LEN 31 /**< Default number of octets in device name. */ -#define BLE_GAP_DEVNAME_MAX_LEN 248 /**< Maximum number of octets in device name. */ -/**@} */ - - -/**@brief Disable RSSI events for connections */ -#define BLE_GAP_RSSI_THRESHOLD_INVALID 0xFF - -/**@defgroup BLE_GAP_PHYS GAP PHYs - * @{ */ -#define BLE_GAP_PHY_1MBPS 0x01 /**< 1 Mbps PHY. */ -#define BLE_GAP_PHY_2MBPS 0x02 /**< 2 Mbps PHY. */ -#define BLE_GAP_PHY_CODED 0x04 /**< Coded PHY. */ -/**@} */ - -/**@defgroup BLE_GAP_CONN_SEC_MODE_SET_MACROS GAP attribute security requirement setters - * - * See @ref ble_gap_conn_sec_mode_t. - * @{ */ -/**@brief Set sec_mode pointed to by ptr to have no access rights.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_NO_ACCESS(ptr) do {(ptr)->sm = 0; (ptr)->lv = 0;} while(0) -/**@brief Set sec_mode pointed to by ptr to require no protection, open link.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_OPEN(ptr) do {(ptr)->sm = 1; (ptr)->lv = 1;} while(0) -/**@brief Set sec_mode pointed to by ptr to require encryption, but no MITM protection.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_ENC_NO_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 2;} while(0) -/**@brief Set sec_mode pointed to by ptr to require encryption and MITM protection.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_ENC_WITH_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 3;} while(0) -/**@brief Set sec_mode pointed to by ptr to require LESC encryption and MITM protection.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_LESC_ENC_WITH_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 4;} while(0) -/**@brief Set sec_mode pointed to by ptr to require signing or encryption, no MITM protection needed.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_SIGNED_NO_MITM(ptr) do {(ptr)->sm = 2; (ptr)->lv = 1;} while(0) -/**@brief Set sec_mode pointed to by ptr to require signing or encryption with MITM protection.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_SIGNED_WITH_MITM(ptr) do {(ptr)->sm = 2; (ptr)->lv = 2;} while(0) -/**@} */ - - -/**@brief GAP Security Random Number Length. */ -#define BLE_GAP_SEC_RAND_LEN 8 - - -/**@brief GAP Security Key Length. */ -#define BLE_GAP_SEC_KEY_LEN 16 - - -/**@brief GAP LE Secure Connections Elliptic Curve Diffie-Hellman P-256 Public Key Length. */ -#define BLE_GAP_LESC_P256_PK_LEN 64 - - -/**@brief GAP LE Secure Connections Elliptic Curve Diffie-Hellman DHKey Length. */ -#define BLE_GAP_LESC_DHKEY_LEN 32 - - -/**@brief GAP Passkey Length. */ -#define BLE_GAP_PASSKEY_LEN 6 - - -/**@brief Maximum amount of addresses in the whitelist. */ -#define BLE_GAP_WHITELIST_ADDR_MAX_COUNT (8) - - -/**@brief Maximum amount of identities in the device identities list. */ -#define BLE_GAP_DEVICE_IDENTITIES_MAX_COUNT (8) - - -/**@brief Default connection count for a configuration. */ -#define BLE_GAP_CONN_COUNT_DEFAULT (1) - - -/**@defgroup BLE_GAP_EVENT_LENGTH GAP event length defines. - * @{ */ -#define BLE_GAP_EVENT_LENGTH_MIN (2) /**< Minimum event length, in 1.25 ms units. */ -#define BLE_GAP_EVENT_LENGTH_DEFAULT (3) /**< Default event length, in 1.25 ms units. */ -/**@} */ - - -/**@defgroup BLE_GAP_ROLE_COUNT GAP concurrent connection count defines. - * @{ */ -#define BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT (1) /**< Default maximum number of connections concurrently acting as peripherals. */ -#define BLE_GAP_ROLE_COUNT_CENTRAL_DEFAULT (3) /**< Default maximum number of connections concurrently acting as centrals. */ -#define BLE_GAP_ROLE_COUNT_CENTRAL_SEC_DEFAULT (1) /**< Default number of SMP instances shared between all connections acting as centrals. */ -#define BLE_GAP_ROLE_COUNT_COMBINED_MAX (20) /**< Maximum supported number of concurrent connections in the peripheral and central roles combined. */ -/**@} */ - - - - -/**@brief Automatic data length parameter. */ -#define BLE_GAP_DATA_LENGTH_AUTO 0 - - -/**@defgroup GAP_SEC_MODES GAP Security Modes - * @{ */ -#define BLE_GAP_SEC_MODE 0x00 /**< No key (may be used to reject). */ -/**@} */ -/** @} */ - - -/**@addtogroup BLE_GAP_STRUCTURES Structures - * @{ */ - -/**@brief Bluetooth Low Energy address. */ -typedef struct -{ - uint8_t addr_id_peer : 1; /**< Only valid for peer addresses. - Reference to peer in device identities list (as set with @ref sd_ble_gap_device_identities_set) when peer is using privacy. */ - uint8_t addr_type : 7; /**< See @ref BLE_GAP_ADDR_TYPES. */ - uint8_t addr[BLE_GAP_ADDR_LEN]; /**< 48-bit address, LSB format. */ -} ble_gap_addr_t; - - -/**@brief GAP connection parameters. - * - * @note When ble_conn_params_t is received in an event, both min_conn_interval and - * max_conn_interval will be equal to the connection interval set by the central. - * - * @note If both conn_sup_timeout and max_conn_interval are specified, then the following constraint applies: - * conn_sup_timeout * 4 > (1 + slave_latency) * max_conn_interval - * that corresponds to the following Bluetooth Spec requirement: - * The Supervision_Timeout in milliseconds shall be larger than - * (1 + Conn_Latency) * Conn_Interval_Max * 2, where Conn_Interval_Max is given in milliseconds. - */ -typedef struct -{ - uint16_t min_conn_interval; /**< Minimum Connection Interval in 1.25 ms units, see @ref BLE_GAP_CP_LIMITS.*/ - uint16_t max_conn_interval; /**< Maximum Connection Interval in 1.25 ms units, see @ref BLE_GAP_CP_LIMITS.*/ - uint16_t slave_latency; /**< Slave Latency in number of connection events, see @ref BLE_GAP_CP_LIMITS.*/ - uint16_t conn_sup_timeout; /**< Connection Supervision Timeout in 10 ms units, see @ref BLE_GAP_CP_LIMITS.*/ -} ble_gap_conn_params_t; - - -/**@brief GAP connection security modes. - * - * Security Mode 0 Level 0: No access permissions at all (this level is not defined by the Bluetooth Core specification).\n - * Security Mode 1 Level 1: No security is needed (aka open link).\n - * Security Mode 1 Level 2: Encrypted link required, MITM protection not necessary.\n - * Security Mode 1 Level 3: MITM protected encrypted link required.\n - * Security Mode 1 Level 4: LESC MITM protected encrypted link required.\n - * Security Mode 2 Level 1: Signing or encryption required, MITM protection not necessary.\n - * Security Mode 2 Level 2: MITM protected signing required, unless link is MITM protected encrypted.\n - */ -typedef struct -{ - uint8_t sm : 4; /**< Security Mode (1 or 2), 0 for no permissions at all. */ - uint8_t lv : 4; /**< Level (1, 2, 3 or 4), 0 for no permissions at all. */ - -} ble_gap_conn_sec_mode_t; - - -/**@brief GAP connection security status.*/ -typedef struct -{ - ble_gap_conn_sec_mode_t sec_mode; /**< Currently active security mode for this connection.*/ - uint8_t encr_key_size; /**< Length of currently active encryption key, 7 to 16 octets (only applicable for bonding procedures). */ -} ble_gap_conn_sec_t; - -/**@brief Identity Resolving Key. */ -typedef struct -{ - uint8_t irk[BLE_GAP_SEC_KEY_LEN]; /**< Array containing IRK. */ -} ble_gap_irk_t; - - -/**@brief Channel mask for RF channels used in advertising. */ -typedef struct -{ - uint8_t ch_37_off : 1; /**< Setting this bit to 1 will turn off advertising on channel 37 */ - uint8_t ch_38_off : 1; /**< Setting this bit to 1 will turn off advertising on channel 38 */ - uint8_t ch_39_off : 1; /**< Setting this bit to 1 will turn off advertising on channel 39 */ -} ble_gap_adv_ch_mask_t; - - -/**@brief GAP advertising parameters. */ -typedef struct -{ - uint8_t type; /**< See @ref BLE_GAP_ADV_TYPES. */ - ble_gap_addr_t const *p_peer_addr; /**< Address of a known peer. - - When privacy is enabled and the local device use @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE addresses, the device identity list is searched for a matching - entry. If the local IRK for that device identity is set, the local IRK for that device will be used to generate the advertiser address field in the advertise packet. - - If type is @ref BLE_GAP_ADV_TYPE_ADV_DIRECT_IND, this must be set to the targeted initiator. If the initiator is in the device identity list, - the peer IRK for that device will be used to generate the initiator address field in the ADV_DIRECT_IND packet. */ - uint8_t fp; /**< Filter Policy, see @ref BLE_GAP_ADV_FILTER_POLICIES. */ - uint16_t interval; /**< Advertising interval between 0x0020 and 0x4000 in 0.625 ms units (20 ms to 10.24 s), see @ref BLE_GAP_ADV_INTERVALS. - - If type equals @ref BLE_GAP_ADV_TYPE_ADV_DIRECT_IND, this parameter must be set to 0 for high duty cycle directed advertising. - - If type equals @ref BLE_GAP_ADV_TYPE_ADV_DIRECT_IND, set @ref BLE_GAP_ADV_INTERVAL_MIN <= interval <= @ref BLE_GAP_ADV_INTERVAL_MAX for low duty cycle advertising.*/ - uint16_t timeout; /**< Advertising timeout between 0x0001 and 0x3FFF in seconds, 0x0000 disables timeout. See also @ref BLE_GAP_ADV_TIMEOUT_VALUES. If type equals @ref BLE_GAP_ADV_TYPE_ADV_DIRECT_IND, this parameter must be set to 0 for High duty cycle directed advertising. */ - ble_gap_adv_ch_mask_t channel_mask; /**< Advertising channel mask. See @ref ble_gap_adv_ch_mask_t. */ -} ble_gap_adv_params_t; - - -/**@brief GAP scanning parameters. */ -typedef struct -{ - uint8_t active : 1; /**< If 1, perform active scanning (scan requests). */ - uint8_t use_whitelist : 1; /**< If 1, filter advertisers using current active whitelist. */ - uint8_t adv_dir_report : 1; /**< If 1, also report directed advertisements where the initiator field is set to a private resolvable address, - even if the address did not resolve to an entry in the device identity list. A report will be generated - even if the peer is not in the whitelist. */ - uint16_t interval; /**< Scan interval between 0x0004 and 0x4000 in 0.625 ms units (2.5 ms to 10.24 s). */ - uint16_t window; /**< Scan window between 0x0004 and 0x4000 in 0.625 ms units (2.5 ms to 10.24 s). */ - uint16_t timeout; /**< Scan timeout between 0x0001 and 0xFFFF in seconds, 0x0000 disables timeout. */ -} ble_gap_scan_params_t; - - -/**@brief Device Privacy. - * - * The privacy feature provides a way for the device to avoid being tracked over a period of time. - * The privacy feature, when enabled, hides the local device identity and replaces it with a private address - * that is automatically refreshed at a specified interval. - * - * If a device still wants to be recognized by other peers, it needs to share it's Identity Resolving Key (IRK). - * With this key, a device can generate a random private address that can only be recognized by peers in possession of that key, - * and devices can establish connections without revealing their real identities. - * - * @note If the device IRK is updated, the new IRK becomes the one to be distributed in all - * bonding procedures performed after @ref sd_ble_gap_privacy_set returns. - * The IRK distributed during bonding procedure is the device IRK that is active when @ref sd_ble_gap_sec_params_reply is called. - */ -typedef struct -{ - uint8_t privacy_mode; /**< Privacy mode, see @ref BLE_GAP_PRIVACY_MODES. Default is @ref BLE_GAP_PRIVACY_MODE_OFF. */ - uint8_t private_addr_type; /**< The private address type must be either @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE or @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE. */ - uint16_t private_addr_cycle_s; /**< Private address cycle interval in seconds. Providing an address cycle value of 0 will use the default value defined by @ref BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S. */ - ble_gap_irk_t *p_device_irk; /**< When used as input, pointer to IRK structure that will be used as the default IRK. If NULL, the device default IRK will be used. - When used as output, pointer to IRK structure where the current default IRK will be written to. If NULL, this argument is ignored. - By default, the default IRK is used to generate random private resolvable addresses for the local device unless instructed otherwise. */ -} ble_gap_privacy_params_t; - - -/**@brief Physical Layer configuration - * @note tx_phys and rx_phys are bitfields, to indicate multiple preferred PHYs for each direction they can be ORed together. - * @code - * p_gap_phys->tx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; - * p_gap_phys->rx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; - * @endcode - * - */ -typedef struct -{ - uint8_t tx_phys; /**< Preferred transmit PHYs, see @ref BLE_GAP_PHYS. */ - uint8_t rx_phys; /**< Preferred receive PHYs, see @ref BLE_GAP_PHYS. */ -} ble_gap_phys_t; - -/** @brief Keys that can be exchanged during a bonding procedure. */ -typedef struct -{ - uint8_t enc : 1; /**< Long Term Key and Master Identification. */ - uint8_t id : 1; /**< Identity Resolving Key and Identity Address Information. */ - uint8_t sign : 1; /**< Connection Signature Resolving Key. */ - uint8_t link : 1; /**< Derive the Link Key from the LTK. */ -} ble_gap_sec_kdist_t; - - -/**@brief GAP security parameters. */ -typedef struct -{ - uint8_t bond : 1; /**< Perform bonding. */ - uint8_t mitm : 1; /**< Enable Man In The Middle protection. */ - uint8_t lesc : 1; /**< Enable LE Secure Connection pairing. */ - uint8_t keypress : 1; /**< Enable generation of keypress notifications. */ - uint8_t io_caps : 3; /**< IO capabilities, see @ref BLE_GAP_IO_CAPS. */ - uint8_t oob : 1; /**< The OOB data flag. - - In LE legacy pairing, this flag is set if a device has out of band authentication data. - The OOB method is used if both of the devices have out of band authentication data. - - In LE Secure Connections pairing, this flag is set if a device has the peer device's out of band authentication data. - The OOB method is used if at least one device has the peer device's OOB data available. */ - uint8_t min_key_size; /**< Minimum encryption key size in octets between 7 and 16. If 0 then not applicable in this instance. */ - uint8_t max_key_size; /**< Maximum encryption key size in octets between min_key_size and 16. */ - ble_gap_sec_kdist_t kdist_own; /**< Key distribution bitmap: keys that the local device will distribute. */ - ble_gap_sec_kdist_t kdist_peer; /**< Key distribution bitmap: keys that the remote device will distribute. */ -} ble_gap_sec_params_t; - - -/**@brief GAP Encryption Information. */ -typedef struct -{ - uint8_t ltk[BLE_GAP_SEC_KEY_LEN]; /**< Long Term Key. */ - uint8_t lesc : 1; /**< Key generated using LE Secure Connections. */ - uint8_t auth : 1; /**< Authenticated Key. */ - uint8_t ltk_len : 6; /**< LTK length in octets. */ -} ble_gap_enc_info_t; - - -/**@brief GAP Master Identification. */ -typedef struct -{ - uint16_t ediv; /**< Encrypted Diversifier. */ - uint8_t rand[BLE_GAP_SEC_RAND_LEN]; /**< Random Number. */ -} ble_gap_master_id_t; - - -/**@brief GAP Signing Information. */ -typedef struct -{ - uint8_t csrk[BLE_GAP_SEC_KEY_LEN]; /**< Connection Signature Resolving Key. */ -} ble_gap_sign_info_t; - - -/**@brief GAP LE Secure Connections P-256 Public Key. */ -typedef struct -{ - uint8_t pk[BLE_GAP_LESC_P256_PK_LEN]; /**< LE Secure Connections Elliptic Curve Diffie-Hellman P-256 Public Key. Stored in the standard SMP protocol format: {X,Y} both in little-endian. */ -} ble_gap_lesc_p256_pk_t; - - -/**@brief GAP LE Secure Connections DHKey. */ -typedef struct -{ - uint8_t key[BLE_GAP_LESC_DHKEY_LEN]; /**< LE Secure Connections Elliptic Curve Diffie-Hellman Key. Stored in little-endian. */ -} ble_gap_lesc_dhkey_t; - - -/**@brief GAP LE Secure Connections OOB data. */ -typedef struct -{ - ble_gap_addr_t addr; /**< Bluetooth address of the device. */ - uint8_t r[BLE_GAP_SEC_KEY_LEN]; /**< Random Number. */ - uint8_t c[BLE_GAP_SEC_KEY_LEN]; /**< Confirm Value. */ -} ble_gap_lesc_oob_data_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_CONNECTED. */ -typedef struct -{ - ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 - and the address is the device's identity address. */ - uint8_t role; /**< BLE role for this connection, see @ref BLE_GAP_ROLES */ - ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ -} ble_gap_evt_connected_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_DISCONNECTED. */ -typedef struct -{ - uint8_t reason; /**< HCI error code, see @ref BLE_HCI_STATUS_CODES. */ -} ble_gap_evt_disconnected_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_CONN_PARAM_UPDATE. */ -typedef struct -{ - ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ -} ble_gap_evt_conn_param_update_t; - -/**@brief Event Structure for @ref BLE_GAP_EVT_PHY_UPDATE. */ -typedef struct -{ - uint8_t status; /**< Status of the procedure, see @ref BLE_HCI_STATUS_CODES */ - uint8_t tx_phy; /**< TX PHY for this connection, see @ref BLE_GAP_PHYS. */ - uint8_t rx_phy; /**< RX PHY for this connection, see @ref BLE_GAP_PHYS. */ -} ble_gap_evt_phy_update_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST. */ -typedef struct -{ - ble_gap_sec_params_t peer_params; /**< Initiator Security Parameters. */ -} ble_gap_evt_sec_params_request_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_SEC_INFO_REQUEST. */ -typedef struct -{ - ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. */ - ble_gap_master_id_t master_id; /**< Master Identification for LTK lookup. */ - uint8_t enc_info : 1; /**< If 1, Encryption Information required. */ - uint8_t id_info : 1; /**< If 1, Identity Information required. */ - uint8_t sign_info : 1; /**< If 1, Signing Information required. */ -} ble_gap_evt_sec_info_request_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_PASSKEY_DISPLAY. */ -typedef struct -{ - uint8_t passkey[BLE_GAP_PASSKEY_LEN]; /**< 6-digit passkey in ASCII ('0'-'9' digits only). */ - uint8_t match_request : 1; /**< If 1 requires the application to report the match using @ref sd_ble_gap_auth_key_reply - with either @ref BLE_GAP_AUTH_KEY_TYPE_NONE if there is no match or - @ref BLE_GAP_AUTH_KEY_TYPE_PASSKEY if there is a match. */ -} ble_gap_evt_passkey_display_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_KEY_PRESSED. */ -typedef struct -{ - uint8_t kp_not; /**< Keypress notification type, see @ref BLE_GAP_KP_NOT_TYPES. */ -} ble_gap_evt_key_pressed_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_AUTH_KEY_REQUEST. */ -typedef struct -{ - uint8_t key_type; /**< See @ref BLE_GAP_AUTH_KEY_TYPES. */ -} ble_gap_evt_auth_key_request_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST. */ -typedef struct -{ - ble_gap_lesc_p256_pk_t *p_pk_peer; /**< LE Secure Connections remote P-256 Public Key. This will point to the application-supplied memory - inside the keyset during the call to @ref sd_ble_gap_sec_params_reply. */ - uint8_t oobd_req :1; /**< LESC OOB data required. A call to @ref sd_ble_gap_lesc_oob_data_set is required to complete the procedure. */ -} ble_gap_evt_lesc_dhkey_request_t; - - -/**@brief Security levels supported. - * @note See Bluetooth Specification Version 4.2 Volume 3, Part C, Chapter 10, Section 10.2.1. -*/ -typedef struct -{ - uint8_t lv1 : 1; /**< If 1: Level 1 is supported. */ - uint8_t lv2 : 1; /**< If 1: Level 2 is supported. */ - uint8_t lv3 : 1; /**< If 1: Level 3 is supported. */ - uint8_t lv4 : 1; /**< If 1: Level 4 is supported. */ -} ble_gap_sec_levels_t; - - -/**@brief Encryption Key. */ -typedef struct -{ - ble_gap_enc_info_t enc_info; /**< Encryption Information. */ - ble_gap_master_id_t master_id; /**< Master Identification. */ -} ble_gap_enc_key_t; - - -/**@brief Identity Key. */ -typedef struct -{ - ble_gap_irk_t id_info; /**< Identity Resolving Key. */ - ble_gap_addr_t id_addr_info; /**< Identity Address. */ -} ble_gap_id_key_t; - - -/**@brief Security Keys. */ -typedef struct -{ - ble_gap_enc_key_t *p_enc_key; /**< Encryption Key, or NULL. */ - ble_gap_id_key_t *p_id_key; /**< Identity Key, or NULL. */ - ble_gap_sign_info_t *p_sign_key; /**< Signing Key, or NULL. */ - ble_gap_lesc_p256_pk_t *p_pk; /**< LE Secure Connections P-256 Public Key. When in debug mode the application must use the value defined - in the Core Bluetooth Specification v4.2 Vol.3, Part H, Section 2.3.5.6.1 */ -} ble_gap_sec_keys_t; - - -/**@brief Security key set for both local and peer keys. */ -typedef struct -{ - ble_gap_sec_keys_t keys_own; /**< Keys distributed by the local device. For LE Secure Connections the encryption key will be generated locally and will always be stored if bonding. */ - ble_gap_sec_keys_t keys_peer; /**< Keys distributed by the remote device. For LE Secure Connections, p_enc_key must always be NULL. */ -} ble_gap_sec_keyset_t; - - -/**@brief Data Length Update Procedure parameters. */ -typedef struct -{ - uint16_t max_tx_octets; /**< Maximum number of payload octets that a Controller supports for transmission of a single Link Layer Data Channel PDU. */ - uint16_t max_rx_octets; /**< Maximum number of payload octets that a Controller supports for reception of a single Link Layer Data Channel PDU. */ - uint16_t max_tx_time_us; /**< Maximum time, in microseconds, that a Controller supports for transmission of a single Link Layer Data Channel PDU. */ - uint16_t max_rx_time_us; /**< Maximum time, in microseconds, that a Controller supports for reception of a single Link Layer Data Channel PDU. */ -} ble_gap_data_length_params_t; - - -/**@brief Data Length Update Procedure local limitation. */ -typedef struct -{ - uint16_t tx_payload_limited_octets; /**< If > 0, the requested TX packet length is too long by this many octets. */ - uint16_t rx_payload_limited_octets; /**< If > 0, the requested RX packet length is too long by this many octets. */ - uint16_t tx_rx_time_limited_us; /**< If > 0, the requested combination of TX and RX packet lengths is too long by this many microseconds. */ -} ble_gap_data_length_limitation_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_AUTH_STATUS. */ -typedef struct -{ - uint8_t auth_status; /**< Authentication status, see @ref BLE_GAP_SEC_STATUS. */ - uint8_t error_src : 2; /**< On error, source that caused the failure, see @ref BLE_GAP_SEC_STATUS_SOURCES. */ - uint8_t bonded : 1; /**< Procedure resulted in a bond. */ - ble_gap_sec_levels_t sm1_levels; /**< Levels supported in Security Mode 1. */ - ble_gap_sec_levels_t sm2_levels; /**< Levels supported in Security Mode 2. */ - ble_gap_sec_kdist_t kdist_own; /**< Bitmap stating which keys were exchanged (distributed) by the local device. If bonding with LE Secure Connections, the enc bit will be always set. */ - ble_gap_sec_kdist_t kdist_peer; /**< Bitmap stating which keys were exchanged (distributed) by the remote device. If bonding with LE Secure Connections, the enc bit will never be set. */ -} ble_gap_evt_auth_status_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_CONN_SEC_UPDATE. */ -typedef struct -{ - ble_gap_conn_sec_t conn_sec; /**< Connection security level. */ -} ble_gap_evt_conn_sec_update_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_TIMEOUT. */ -typedef struct -{ - uint8_t src; /**< Source of timeout event, see @ref BLE_GAP_TIMEOUT_SOURCES. */ -} ble_gap_evt_timeout_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_RSSI_CHANGED. */ -typedef struct -{ - int8_t rssi; /**< Received Signal Strength Indication in dBm. */ -} ble_gap_evt_rssi_changed_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_ADV_REPORT. */ -typedef struct -{ - ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 - and the address is the device's identity address. */ - ble_gap_addr_t direct_addr; /**< Set when the scanner is unable to resolve the private resolvable address of the initiator - field of a directed advertisement packet and the scanner has been enabled to report this in @ref ble_gap_scan_params_t::adv_dir_report. */ - int8_t rssi; /**< Received Signal Strength Indication in dBm. */ - uint8_t scan_rsp : 1; /**< If 1, the report corresponds to a scan response and the type field may be ignored. */ - uint8_t type : 2; /**< See @ref BLE_GAP_ADV_TYPES. Only valid if the scan_rsp field is 0. */ - uint8_t dlen : 5; /**< Advertising or scan response data length. */ - uint8_t data[BLE_GAP_ADV_MAX_SIZE]; /**< Advertising or scan response data. */ -} ble_gap_evt_adv_report_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_SEC_REQUEST. */ -typedef struct -{ - uint8_t bond : 1; /**< Perform bonding. */ - uint8_t mitm : 1; /**< Man In The Middle protection requested. */ - uint8_t lesc : 1; /**< LE Secure Connections requested. */ - uint8_t keypress : 1; /**< Generation of keypress notifications requested. */ -} ble_gap_evt_sec_request_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST. */ -typedef struct -{ - ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ -} ble_gap_evt_conn_param_update_request_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_SCAN_REQ_REPORT. */ -typedef struct -{ - int8_t rssi; /**< Received Signal Strength Indication in dBm. */ - ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 - and the address is the device's identity address. */ -} ble_gap_evt_scan_req_report_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST. */ -typedef struct -{ - ble_gap_data_length_params_t peer_params; /**< Peer data length parameters. */ -} ble_gap_evt_data_length_update_request_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE. */ -typedef struct -{ - ble_gap_data_length_params_t effective_params; /**< The effective data length parameters. */ -} ble_gap_evt_data_length_update_t; - - -/**@brief GAP event structure. */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle on which event occurred. */ - union /**< union alternative identified by evt_id in enclosing struct. */ - { - ble_gap_evt_connected_t connected; /**< Connected Event Parameters. */ - ble_gap_evt_disconnected_t disconnected; /**< Disconnected Event Parameters. */ - ble_gap_evt_conn_param_update_t conn_param_update; /**< Connection Parameter Update Parameters. */ - ble_gap_evt_sec_params_request_t sec_params_request; /**< Security Parameters Request Event Parameters. */ - ble_gap_evt_sec_info_request_t sec_info_request; /**< Security Information Request Event Parameters. */ - ble_gap_evt_passkey_display_t passkey_display; /**< Passkey Display Event Parameters. */ - ble_gap_evt_key_pressed_t key_pressed; /**< Key Pressed Event Parameters. */ - ble_gap_evt_auth_key_request_t auth_key_request; /**< Authentication Key Request Event Parameters. */ - ble_gap_evt_lesc_dhkey_request_t lesc_dhkey_request; /**< LE Secure Connections DHKey calculation request. */ - ble_gap_evt_auth_status_t auth_status; /**< Authentication Status Event Parameters. */ - ble_gap_evt_conn_sec_update_t conn_sec_update; /**< Connection Security Update Event Parameters. */ - ble_gap_evt_timeout_t timeout; /**< Timeout Event Parameters. */ - ble_gap_evt_rssi_changed_t rssi_changed; /**< RSSI Event Parameters. */ - ble_gap_evt_adv_report_t adv_report; /**< Advertising Report Event Parameters. */ - ble_gap_evt_sec_request_t sec_request; /**< Security Request Event Parameters. */ - ble_gap_evt_conn_param_update_request_t conn_param_update_request; /**< Connection Parameter Update Parameters. */ - ble_gap_evt_scan_req_report_t scan_req_report; /**< Scan Request Report Parameters. */ - ble_gap_evt_phy_update_t phy_update; /**< PHY Update Parameters. */ - ble_gap_evt_data_length_update_request_t data_length_update_request; /**< Data Length Update Request Event Parameters. */ - ble_gap_evt_data_length_update_t data_length_update; /**< Data Length Update Event Parameters. */ - } params; /**< Event Parameters. */ -} ble_gap_evt_t; - - -/** - * @brief BLE GAP connection configuration parameters, set with @ref sd_ble_cfg_set. - * - * @retval ::NRF_ERROR_CONN_COUNT The connection count for the connection configurations is zero. - * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: - * - The sum of conn_count for all connection configurations combined exceeds UINT8_MAX. - * - The event length is smaller than @ref BLE_GAP_EVENT_LENGTH_MIN. - */ -typedef struct -{ - uint8_t conn_count; /**< The number of concurrent connections the application can create with this configuration. - The default and minimum value is @ref BLE_GAP_CONN_COUNT_DEFAULT. */ - uint16_t event_length; /**< The time set aside for this connection on every connection interval in 1.25 ms units. - The default value is @ref BLE_GAP_EVENT_LENGTH_DEFAULT, the minimum value is @ref BLE_GAP_EVENT_LENGTH_MIN. - The event length and the connection interval are the primary parameters - for setting the throughput of a connection. - See the SoftDevice Specification for details on throughput. */ -} ble_gap_conn_cfg_t; - - -/** - * @brief Configuration of maximum concurrent connections in the different connected roles, set with - * @ref sd_ble_cfg_set. - * - * @retval ::NRF_ERROR_CONN_COUNT The sum of periph_role_count and central_role_count is too - * large. The maximum supported sum of concurrent connections is - * @ref BLE_GAP_ROLE_COUNT_COMBINED_MAX. - * @retval ::NRF_ERROR_INVALID_PARAM central_sec_count is larger than central_role_count. - */ -typedef struct -{ - uint8_t periph_role_count; /**< Maximum number of connections concurrently acting as a peripheral. Default value is @ref BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT. */ - uint8_t central_role_count; /**< Maximum number of connections concurrently acting as a central. Default value is @ref BLE_GAP_ROLE_COUNT_CENTRAL_DEFAULT. */ - uint8_t central_sec_count; /**< Number of SMP instances shared between all connections acting as a central. Default value is @ref BLE_GAP_ROLE_COUNT_CENTRAL_SEC_DEFAULT. */ -} ble_gap_cfg_role_count_t; - - -/** - * @brief Device name and its properties, set with @ref sd_ble_cfg_set. - * - * @note If the device name is not configured, the default device name will be @ref - * BLE_GAP_DEVNAME_DEFAULT, the maximum device name length will be @ref - * BLE_GAP_DEVNAME_DEFAULT_LEN, vloc will be set to @ref BLE_GATTS_VLOC_STACK and the device name - * will have no write access. - * - * @note If @ref max_len is more than @ref BLE_GAP_DEVNAME_DEFAULT_LEN and vloc is set to @ref BLE_GATTS_VLOC_STACK, - * the attribute table size must be increased to have room for the longer device name (see - * @ref sd_ble_cfg_set and @ref ble_gatts_cfg_attr_tab_size_t). - * - * @note If vloc is @ref BLE_GATTS_VLOC_STACK : - * - p_value must point to non-volatile memory (flash) or be NULL. - * - If p_value is NULL, the device name will initially be empty. - * - * @note If vloc is @ref BLE_GATTS_VLOC_USER : - * - p_value cannot be NULL. - * - If the device name is writable, p_value must point to volatile memory (RAM). - * - * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: - * - Invalid device name location (vloc). - * - Invalid device name security mode. - * @retval ::NRF_ERROR_INVALID_LENGTH One or more of the following is true: - * - The device name length is invalid (must be between 0 and @ref BLE_GAP_DEVNAME_MAX_LEN). - * - The device name length is too long for the given Attribute Table. - * @retval ::NRF_ERROR_NOT_SUPPORTED Device name security mode is not supported. - */ -typedef struct -{ - ble_gap_conn_sec_mode_t write_perm; /**< Write permissions. */ - uint8_t vloc:2; /**< Value location, see @ref BLE_GATTS_VLOCS.*/ - uint8_t *p_value; /**< Pointer to where the value (device name) is stored or will be stored. */ - uint16_t current_len; /**< Current length in bytes of the memory pointed to by p_value.*/ - uint16_t max_len; /**< Maximum length in bytes of the memory pointed to by p_value.*/ -} ble_gap_cfg_device_name_t; - - -/**@brief Configuration structure for GAP configurations. */ -typedef union -{ - ble_gap_cfg_role_count_t role_count_cfg; /**< Role count configuration, cfg_id is @ref BLE_GAP_CFG_ROLE_COUNT. */ - ble_gap_cfg_device_name_t device_name_cfg; /**< Device name configuration, cfg_id is @ref BLE_GAP_CFG_DEVICE_NAME. */ -} ble_gap_cfg_t; - - -/**@brief Channel Map option. - * Used with @ref sd_ble_opt_get to get the current channel map - * or @ref sd_ble_opt_set to set a new channel map. When setting the - * channel map, it applies to all current and future connections. When getting the - * current channel map, it applies to a single connection and the connection handle - * must be supplied. - * - * @note Setting the channel map may take some time, depending on connection parameters. - * The time taken may be different for each connection and the get operation will - * return the previous channel map until the new one has taken effect. - * - * @note After setting the channel map, by spec it can not be set again until at least 1 s has passed. - * See Bluetooth Specification Version 4.1 Volume 2, Part E, Section 7.3.46. - * - * @retval ::NRF_SUCCESS Get or set successful. - * @retval ::NRF_ERROR_BUSY Channel map was set again before enough time had passed. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied for get. - * @retval ::NRF_ERROR_NOT_SUPPORTED Returned by sd_ble_opt_set in peripheral-only SoftDevices. - * - */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle (only applicable for get) */ - uint8_t ch_map[5]; /**< Channel Map (37-bit). */ -} ble_gap_opt_ch_map_t; - - -/**@brief Local connection latency option. - * - * Local connection latency is a feature which enables the slave to improve - * current consumption by ignoring the slave latency set by the peer. The - * local connection latency can only be set to a multiple of the slave latency, - * and cannot be longer than half of the supervision timeout. - * - * Used with @ref sd_ble_opt_set to set the local connection latency. The - * @ref sd_ble_opt_get is not supported for this option, but the actual - * local connection latency (unless set to NULL) is set as a return parameter - * when setting the option. - * - * @note The latency set will be truncated down to the closest slave latency event - * multiple, or the nearest multiple before half of the supervision timeout. - * - * @note The local connection latency is disabled by default, and needs to be enabled for new - * connections and whenever the connection is updated. - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_NOT_SUPPORTED Get is not supported. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. - */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle */ - uint16_t requested_latency; /**< Requested local connection latency. */ - uint16_t * p_actual_latency; /**< Pointer to storage for the actual local connection latency (can be set to NULL to skip return value). */ -} ble_gap_opt_local_conn_latency_t; - -/**@brief Disable slave latency - * - * Used with @ref sd_ble_opt_set to temporarily disable slave latency of a peripheral connection (see @ref ble_gap_conn_params_t::slave_latency). And to re-enable it again. - * When disabled, the peripheral will ignore the slave_latency set by the central. - * - * @note Shall only be called on peripheral links. - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_NOT_SUPPORTED Get is not supported. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. - */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle */ - uint8_t disable : 1; /**< Set to 1 to disable slave latency. Set to 0 enable it again.*/ -} ble_gap_opt_slave_latency_disable_t; - -/**@brief Passkey Option. - * - * Structure containing the passkey to be used during pairing. This can be used with @ref - * sd_ble_opt_set to make the SoftDevice use a preprogrammed passkey for authentication - * instead of generating a random one. - * - * @note Repeated pairing attempts using the same preprogrammed passkey makes pairing vulnerable to MITM attacks. - * - * @note @ref sd_ble_opt_get is not supported for this option. - * - */ -typedef struct -{ - uint8_t const * p_passkey; /**< Pointer to 6-digit ASCII string (digit 0..9 only, no NULL termination) passkey to be used during pairing. If this is NULL, the SoftDevice will generate a random passkey if required.*/ -} ble_gap_opt_passkey_t; - - -/**@brief Scan request report option. - * - * This can be used with @ref sd_ble_opt_set to make the SoftDevice send - * @ref BLE_GAP_EVT_SCAN_REQ_REPORT events. - * - * @note Due to the limited space reserved for scan request report events, - * not all received scan requests will be reported. - * - * @note If whitelisting is used, only whitelisted requests are reported. - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_INVALID_STATE When advertising is ongoing while the option is set. - */ -typedef struct -{ - uint8_t enable : 1; /**< Enable scan request reports. */ -} ble_gap_opt_scan_req_report_t; - -/**@brief Compatibility mode 1 option. - * - * This can be used with @ref sd_ble_opt_set to enable and disable - * compatibility mode 1. Compatibility mode 1 is disabled by default. - * - * @note Compatibility mode 1 enables interoperability with devices that do not support - * a value of 0 for the WinOffset parameter in the Link Layer CONNECT_REQ packet. - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_INVALID_STATE When connection creation is ongoing while mode 1 is set. - */ -typedef struct -{ - uint8_t enable : 1; /**< Enable compatibility mode 1.*/ -} ble_gap_opt_compat_mode_1_t; - -/**@brief Compatibility mode 2 option. - * - * This can be used with @ref sd_ble_opt_set to enable compatibility mode 2. - * Compatibility mode 2 is disabled by default. - * - * @note Compatibility mode 2 enables interoperability with devices that initiate Feature exchange - * and version exchange procedure in parallel. - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_INVALID_PARAM if enable bit is not set to 1. Currently only enabling is supported. - * @retval ::NRF_ERROR_INVALID_STATE When any role is running while mode 2 is set. - */ -typedef struct -{ - uint8_t enable : 1; /**< Enable compatibility mode 2.*/ -} ble_gap_opt_compat_mode_2_t; - - -/**@brief Authenticated payload timeout option. - * - * This can be used with @ref sd_ble_opt_set to change the Authenticated payload timeout to a value other than the default of 8 minutes. - * - * @note The authenticated payload timeout event ::BLE_GAP_TIMEOUT_SRC_AUTH_PAYLOAD will be generated - * if auth_payload_timeout time has elapsed without receiving a packet with a valid MIC on an encrypted - * link. - * - * @note The LE ping procedure will be initiated before the timer expires to give the peer a chance - * to reset the timer. In addition the stack will try to prioritize running of LE ping over other - * activities to increase chances of finishing LE ping before timer expires. To avoid side-effects - * on other activities, it is recommended to use high timeout values. - * Recommended timeout > 2*(connInterval * (6 + connSlaveLatency)). - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. auth_payload_timeout was outside of allowed range. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. - */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle */ - uint16_t auth_payload_timeout; /**< Requested timeout in 10 ms unit. Maximum is 48 000 (=480 000 ms =8 min). Minimum is 1 (=10 ms). */ -} ble_gap_opt_auth_payload_timeout_t; - -/**@brief Preferred PHY option - * - * @details This can be used with @ref sd_ble_opt_set to change the preferred PHYs. Before this function is called the PHYs - * for peer initiated PHY Update procedure is @ref BLE_GAP_PHY_1MBPS. If @ref ble_gap_opt_preferred_phys_t::tx_phys or - * @ref ble_gap_opt_preferred_phys_t::rx_phys is 0, then the stack will select PHYs based on the peer requirements on that specific direction. - * - * @note The preferred PHYs are only valid for newly created connections after this option is called. If the PHYs should be - * changed for an existing link the @ref sd_ble_gap_phy_request would have to be called, and that would try to update the - * PHYs for the given link. - * - * @note tx_phys and rx_phys are bitfields, to indicate multiple preferred PHYs for each direction they can be ORed together. - * @code - * tx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; - * rx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; - * @endcode - * - * @events - * @event{@ref BLE_GAP_EVT_PHY_UPDATE, Result of the PHY Update if initiated by peer.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_PHY_REQUEST} - * @mmsc{@ref BLE_GAP_PERIPHERAL_PHY_REQUEST} - * @endmscs - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - */ -typedef struct -{ - uint8_t tx_phys; /**< Preferred transmit PHYs, see @ref BLE_GAP_PHYS. */ - uint8_t rx_phys; /**< Preferred receive PHYs, see @ref BLE_GAP_PHYS. */ -} ble_gap_opt_preferred_phys_t; - -/**@brief Option structure for GAP options. */ -typedef union -{ - ble_gap_opt_ch_map_t ch_map; /**< Parameters for the Channel Map option. */ - ble_gap_opt_local_conn_latency_t local_conn_latency; /**< Parameters for the Local connection latency option */ - ble_gap_opt_passkey_t passkey; /**< Parameters for the Passkey option.*/ - ble_gap_opt_scan_req_report_t scan_req_report; /**< Parameters for the scan request report option.*/ - ble_gap_opt_compat_mode_1_t compat_mode_1; /**< Parameters for the compatibility mode 1 option.*/ - ble_gap_opt_compat_mode_2_t compat_mode_2; /**< Parameters for the compatibility mode 2 option.*/ - ble_gap_opt_auth_payload_timeout_t auth_payload_timeout; /**< Parameters for the authenticated payload timeout option.*/ - ble_gap_opt_preferred_phys_t preferred_phys; /**< Parameters for the preferred PHYs option. */ - ble_gap_opt_slave_latency_disable_t slave_latency_disable; /**< Parameters for the Disable slave latency option */ -} ble_gap_opt_t; -/**@} */ - - -/**@addtogroup BLE_GAP_FUNCTIONS Functions - * @{ */ - -/**@brief Set the local Bluetooth identity address. - * - * The local Bluetooth identity address is the address that identifies this device to other peers. - * The address type must be either @ref BLE_GAP_ADDR_TYPE_PUBLIC or @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC. - * The identity address cannot be changed while roles are running. - * - * @note This address will be distributed to the peer during bonding. - * If the address changes, the address stored in the peer device will not be valid and the ability to - * reconnect using the old address will be lost. - * - * @note By default the SoftDevice will set an address of type @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC upon being - * enabled. The address is a random number populated during the IC manufacturing process and remains unchanged - * for the lifetime of each IC. - * - * @mscs - * @mmsc{@ref BLE_GAP_ADV_MSC} - * @endmscs - * - * @param[in] p_addr Pointer to address structure. - * - * @retval ::NRF_SUCCESS Address successfully set. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::NRF_ERROR_INVALID_STATE The identity address cannot be changed while the roles are running. - */ -SVCALL(SD_BLE_GAP_ADDR_SET, uint32_t, sd_ble_gap_addr_set(ble_gap_addr_t const *p_addr)); - - -/**@brief Get local Bluetooth identity address. - * - * @note This will always return the identity address irrespective of the privacy settings, - * i.e. the address type will always be either @ref BLE_GAP_ADDR_TYPE_PUBLIC or @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC. - * - * @param[out] p_addr Pointer to address structure to be filled in. - * - * @retval ::NRF_SUCCESS Address successfully retrieved. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. - */ -SVCALL(SD_BLE_GAP_ADDR_GET, uint32_t, sd_ble_gap_addr_get(ble_gap_addr_t *p_addr)); - - -/**@brief Set the active whitelist in the SoftDevice. - * - * @note Only one whitelist can be used at a time and the whitelist is shared between the BLE roles. - * The whitelist cannot be set if a BLE role is using the whitelist. - * - * @note If an address is resolved using the information in the device identity list, then the whitelist - * filter policy applies to the peer identity address and not the resolvable address sent on air. - * - * @mscs - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_PRIVATE_SCAN_MSC} - * @endmscs - * - * @param[in] pp_wl_addrs Pointer to a whitelist of peer addresses, if NULL the whitelist will be cleared. - * @param[in] len Length of the whitelist, maximum @ref BLE_GAP_WHITELIST_ADDR_MAX_COUNT. - * - * @retval ::NRF_SUCCESS The whitelist is successfully set/cleared. - * @retval ::NRF_ERROR_INVALID_ADDR The whitelist (or one of its entries) provided is invalid. - * @retval ::BLE_ERROR_GAP_WHITELIST_IN_USE The whitelist is in use by a BLE role and cannot be set or cleared. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. - * @retval ::NRF_ERROR_DATA_SIZE The given whitelist size is invalid (zero or too large); this can only return when - * pp_wl_addrs is not NULL. - */ -SVCALL(SD_BLE_GAP_WHITELIST_SET, uint32_t, sd_ble_gap_whitelist_set(ble_gap_addr_t const * const * pp_wl_addrs, uint8_t len)); - - -/**@brief Set device identity list. - * - * @note Only one device identity list can be used at a time and the list is shared between the BLE roles. - * The device identity list cannot be set if a BLE role is using the list. - * - * @param[in] pp_id_keys Pointer to an array of peer identity addresses and peer IRKs, if NULL the device identity list will be cleared. - * @param[in] pp_local_irks Pointer to an array of local IRKs. Each entry in the array maps to the entry in pp_id_keys at the same index. - * To fill in the list with the currently set device IRK for all peers, set to NULL. - * @param[in] len Length of the device identity list, maximum @ref BLE_GAP_DEVICE_IDENTITIES_MAX_COUNT. - * - * @mscs - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_PRIVATE_SCAN_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_CONN_PRIV_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_CONN_PRIV_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS The device identity list successfully set/cleared. - * @retval ::NRF_ERROR_INVALID_ADDR The device identity list (or one of its entries) provided is invalid. - * This code may be returned if the local IRK list also has an invalid entry. - * @retval ::BLE_ERROR_GAP_DEVICE_IDENTITIES_IN_USE The device identity list is in use and cannot be set or cleared. - * @retval ::BLE_ERROR_GAP_DEVICE_IDENTITIES_DUPLICATE The device identity list contains multiple entries with the same identity address. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. - * @retval ::NRF_ERROR_DATA_SIZE The given device identity list size invalid (zero or too large); this can - * only return when pp_id_keys is not NULL. - */ -SVCALL(SD_BLE_GAP_DEVICE_IDENTITIES_SET, uint32_t, sd_ble_gap_device_identities_set(ble_gap_id_key_t const * const * pp_id_keys, ble_gap_irk_t const * const * pp_local_irks, uint8_t len)); - - -/**@brief Set privacy settings. - * - * @note Privacy settings cannot be set while BLE roles are running. - * - * @param[in] p_privacy_params Privacy settings. - * - * @mscs - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. - * @retval ::NRF_ERROR_INVALID_ADDR The pointer to privacy settings is NULL or invalid. - * Otherwise, the p_device_irk pointer in privacy parameter is an invalid pointer. - * @retval ::NRF_ERROR_INVALID_PARAM Out of range parameters are provided. - * @retval ::NRF_ERROR_INVALID_STATE Privacy settings cannot be changed while BLE roles using privacy are enabled. - */ -SVCALL(SD_BLE_GAP_PRIVACY_SET, uint32_t, sd_ble_gap_privacy_set(ble_gap_privacy_params_t const *p_privacy_params)); - - -/**@brief Get privacy settings. - * - * @note The privacy settings returned include the current device irk as well. - * - * @param[in] p_privacy_params Privacy settings. - * - * @retval ::NRF_SUCCESS Privacy settings read. - * @retval ::NRF_ERROR_INVALID_ADDR The pointer given for returning the privacy settings may be NULL or invalid. - * Otherwise, the p_device_irk pointer in privacy parameter is an invalid pointer. - */ -SVCALL(SD_BLE_GAP_PRIVACY_GET, uint32_t, sd_ble_gap_privacy_get(ble_gap_privacy_params_t *p_privacy_params)); - - -/**@brief Set, clear or update advertising and scan response data. - * - * @note The format of the advertising data will be checked by this call to ensure interoperability. - * Limitations imposed by this API call to the data provided include having a flags data type in the scan response data and - * duplicating the local name in the advertising data and scan response data. - * - * @note To clear the advertising data and set it to a 0-length packet, simply provide a valid pointer (p_data/p_sr_data) with its corresponding - * length (dlen/srdlen) set to 0. - * - * @note The call will fail if p_data and p_sr_data are both NULL since this would have no effect. - * - * @mscs - * @mmsc{@ref BLE_GAP_ADV_MSC} - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @endmscs - * - * @param[in] p_data Raw data to be placed in advertising packet. If NULL, no changes are made to the current advertising packet data. - * @param[in] dlen Data length for p_data. Max size: @ref BLE_GAP_ADV_MAX_SIZE octets. Should be 0 if p_data is NULL, can be 0 if p_data is not NULL. - * @param[in] p_sr_data Raw data to be placed in scan response packet. If NULL, no changes are made to the current scan response packet data. - * @param[in] srdlen Data length for p_sr_data. Max size: @ref BLE_GAP_ADV_MAX_SIZE octets. Should be 0 if p_sr_data is NULL, can be 0 if p_data is not NULL. - * - * @retval ::NRF_SUCCESS Advertising data successfully updated or cleared. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, both p_data and p_sr_data cannot be NULL. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_FLAGS Invalid combination of advertising flags supplied. - * @retval ::NRF_ERROR_INVALID_DATA Invalid data type(s) supplied, check the advertising data format specification. - * @retval ::NRF_ERROR_INVALID_LENGTH Invalid data length(s) supplied. - * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported data type. - * @retval ::BLE_ERROR_GAP_UUID_LIST_MISMATCH Invalid UUID list supplied. - */ -SVCALL(SD_BLE_GAP_ADV_DATA_SET, uint32_t, sd_ble_gap_adv_data_set(uint8_t const *p_data, uint8_t dlen, uint8_t const *p_sr_data, uint8_t srdlen)); - - -/**@brief Start advertising (GAP Discoverable, Connectable modes, Broadcast Procedure). - * - * @note An application can start an advertising procedure for broadcasting purposes while a connection - * is active. After a @ref BLE_GAP_EVT_CONNECTED event is received, this function may therefore - * be called to start a broadcast advertising procedure. The advertising procedure - * cannot however be connectable (it must be of type @ref BLE_GAP_ADV_TYPE_ADV_SCAN_IND or - * @ref BLE_GAP_ADV_TYPE_ADV_NONCONN_IND). @note Only one advertiser may be active at any time. - * - * @events - * @event{@ref BLE_GAP_EVT_CONNECTED, Generated after connection has been established through connectable advertising.} - * @event{@ref BLE_GAP_EVT_TIMEOUT, Advertisement has timed out.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_ADV_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_CONN_PRIV_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @endmscs - * - * @param[in] p_adv_params Pointer to advertising parameters structure. - * @param[in] conn_cfg_tag Tag identifying a configuration set by @ref sd_ble_cfg_set or @ref - * BLE_CONN_CFG_TAG_DEFAULT to use the default connection configuration. - * - * @retval ::NRF_SUCCESS The BLE stack has started advertising. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_CONN_COUNT The limit of available connections has been reached; connectable advertiser cannot be started. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check the accepted ranges and limits. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid Bluetooth address supplied. - * @retval ::BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST Discoverable mode and whitelist incompatible. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::NRF_ERROR_RESOURCES Not enough BLE role slots available. - * Stop one or more currently active roles (Central, Peripheral or Observer) and try again - */ -SVCALL(SD_BLE_GAP_ADV_START, uint32_t, sd_ble_gap_adv_start(ble_gap_adv_params_t const *p_adv_params, uint8_t conn_cfg_tag)); - - -/**@brief Stop advertising (GAP Discoverable, Connectable modes, Broadcast Procedure). - * - * @mscs - * @mmsc{@ref BLE_GAP_ADV_MSC} - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS The BLE stack has stopped advertising. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation (most probably not in advertising state). - */ -SVCALL(SD_BLE_GAP_ADV_STOP, uint32_t, sd_ble_gap_adv_stop(void)); - - - -/**@brief Update connection parameters. - * - * @details In the central role this will initiate a Link Layer connection parameter update procedure, - * otherwise in the peripheral role, this will send the corresponding L2CAP request and wait for - * the central to perform the procedure. In both cases, and regardless of success or failure, the application - * will be informed of the result with a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE event. - * - * @details This function can be used as a central both to reply to a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST or to start the procedure unrequested. - * - * @events - * @event{@ref BLE_GAP_EVT_CONN_PARAM_UPDATE, Result of the connection parameter update procedure.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CPU_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} - * @mmsc{@ref BLE_GAP_MULTILINK_CPU_MSC} - * @mmsc{@ref BLE_GAP_MULTILINK_CTRL_PROC_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_CPU_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_conn_params Pointer to desired connection parameters. If NULL is provided on a peripheral role, - * the parameters in the PPCP characteristic of the GAP service will be used instead. - * If NULL is provided on a central role and in response to a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST, the peripheral request will be rejected - * - * @retval ::NRF_SUCCESS The Connection Update procedure has been started successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_BUSY Procedure already in progress or not allowed at this time, process pending events and wait for pending procedures to complete and retry. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - */ -SVCALL(SD_BLE_GAP_CONN_PARAM_UPDATE, uint32_t, sd_ble_gap_conn_param_update(uint16_t conn_handle, ble_gap_conn_params_t const *p_conn_params)); - - -/**@brief Disconnect (GAP Link Termination). - * - * @details This call initiates the disconnection procedure, and its completion will be communicated to the application - * with a @ref BLE_GAP_EVT_DISCONNECTED event. - * - * @events - * @event{@ref BLE_GAP_EVT_DISCONNECTED, Generated when disconnection procedure is complete.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CONN_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] hci_status_code HCI status code, see @ref BLE_HCI_STATUS_CODES (accepted values are @ref BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION and @ref BLE_HCI_CONN_INTERVAL_UNACCEPTABLE). - * - * @retval ::NRF_SUCCESS The disconnection procedure has been started successfully. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation (disconnection is already in progress). - */ -SVCALL(SD_BLE_GAP_DISCONNECT, uint32_t, sd_ble_gap_disconnect(uint16_t conn_handle, uint8_t hci_status_code)); - - -/**@brief Set the radio's transmit power. - * - * @param[in] tx_power Radio transmit power in dBm (accepted values are -40, -20, -16, -12, -8, -4, 0, 2, 3, 4, 5, 6, 7, 8 and 9 dBm). - * - * @note The -40dBm, -20dBm, -16dBm, -12dBm, -8dBm, -4dBm, 0dBm, +2dBm, +3dBm, +4dBm, +5dBm, +6dBm, +7dBm, +8dBm and +9dBm settings are available on nRF52840 series ICs. - * @note The -40dBm, -20dBm, -16dBm, -12dBm, -8dBm, -4dBm, 0dBm, +3dBm and +4dBm settings are available on nRF52 series ICs. - * - * @retval ::NRF_SUCCESS Successfully changed the transmit power. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - */ -SVCALL(SD_BLE_GAP_TX_POWER_SET, uint32_t, sd_ble_gap_tx_power_set(int8_t tx_power)); - - -/**@brief Set GAP Appearance value. - * - * @param[in] appearance Appearance (16-bit), see @ref BLE_APPEARANCES. - * - * @retval ::NRF_SUCCESS Appearance value set successfully. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - */ -SVCALL(SD_BLE_GAP_APPEARANCE_SET, uint32_t, sd_ble_gap_appearance_set(uint16_t appearance)); - - -/**@brief Get GAP Appearance value. - * - * @param[out] p_appearance Pointer to appearance (16-bit) to be filled in, see @ref BLE_APPEARANCES. - * - * @retval ::NRF_SUCCESS Appearance value retrieved successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - */ -SVCALL(SD_BLE_GAP_APPEARANCE_GET, uint32_t, sd_ble_gap_appearance_get(uint16_t *p_appearance)); - - -/**@brief Set GAP Peripheral Preferred Connection Parameters. - * - * @param[in] p_conn_params Pointer to a @ref ble_gap_conn_params_t structure with the desired parameters. - * - * @retval ::NRF_SUCCESS Peripheral Preferred Connection Parameters set successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - */ -SVCALL(SD_BLE_GAP_PPCP_SET, uint32_t, sd_ble_gap_ppcp_set(ble_gap_conn_params_t const *p_conn_params)); - - -/**@brief Get GAP Peripheral Preferred Connection Parameters. - * - * @param[out] p_conn_params Pointer to a @ref ble_gap_conn_params_t structure where the parameters will be stored. - * - * @retval ::NRF_SUCCESS Peripheral Preferred Connection Parameters retrieved successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - */ -SVCALL(SD_BLE_GAP_PPCP_GET, uint32_t, sd_ble_gap_ppcp_get(ble_gap_conn_params_t *p_conn_params)); - - -/**@brief Set GAP device name. - * - * @note If the device name is located in application flash memory (see @ref ble_gap_cfg_device_name_t), - * it cannot be changed. Then @ref NRF_ERROR_FORBIDDEN will be returned. - * - * @param[in] p_write_perm Write permissions for the Device Name characteristic, see @ref ble_gap_conn_sec_mode_t. - * @param[in] p_dev_name Pointer to a UTF-8 encoded, non NULL-terminated string. - * @param[in] len Length of the UTF-8, non NULL-terminated string pointed to by p_dev_name in octets (must be smaller or equal than @ref BLE_GAP_DEVNAME_MAX_LEN). - * - * @retval ::NRF_SUCCESS GAP device name and permissions set successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. - * @retval ::NRF_ERROR_FORBIDDEN Device name is not writable. - */ -SVCALL(SD_BLE_GAP_DEVICE_NAME_SET, uint32_t, sd_ble_gap_device_name_set(ble_gap_conn_sec_mode_t const *p_write_perm, uint8_t const *p_dev_name, uint16_t len)); - - -/**@brief Get GAP device name. - * - * @note If the device name is longer than the size of the supplied buffer, - * p_len will return the complete device name length, - * and not the number of bytes actually returned in p_dev_name. - * The application may use this information to allocate a suitable buffer size. - * - * @param[out] p_dev_name Pointer to an empty buffer where the UTF-8 non NULL-terminated string will be placed. Set to NULL to obtain the complete device name length. - * @param[in,out] p_len Length of the buffer pointed by p_dev_name, complete device name length on output. - * - * @retval ::NRF_SUCCESS GAP device name retrieved successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. - */ -SVCALL(SD_BLE_GAP_DEVICE_NAME_GET, uint32_t, sd_ble_gap_device_name_get(uint8_t *p_dev_name, uint16_t *p_len)); - - -/**@brief Initiate the GAP Authentication procedure. - * - * @details In the central role, this function will send an SMP Pairing Request (or an SMP Pairing Failed if rejected), - * otherwise in the peripheral role, an SMP Security Request will be sent. - * - * @events - * @event{Depending on the security parameters set and the packet exchanges with the peer\, the following events may be generated:} - * @event{@ref BLE_GAP_EVT_SEC_PARAMS_REQUEST} - * @event{@ref BLE_GAP_EVT_SEC_INFO_REQUEST} - * @event{@ref BLE_GAP_EVT_PASSKEY_DISPLAY} - * @event{@ref BLE_GAP_EVT_KEY_PRESSED} - * @event{@ref BLE_GAP_EVT_AUTH_KEY_REQUEST} - * @event{@ref BLE_GAP_EVT_LESC_DHKEY_REQUEST} - * @event{@ref BLE_GAP_EVT_CONN_SEC_UPDATE} - * @event{@ref BLE_GAP_EVT_AUTH_STATUS} - * @event{@ref BLE_GAP_EVT_TIMEOUT} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_SEC_REQ_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_SEC_REQ_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_sec_params Pointer to the @ref ble_gap_sec_params_t structure with the security parameters to be used during the pairing or bonding procedure. - * In the peripheral role, only the bond, mitm, lesc and keypress fields of this structure are used. - * In the central role, this pointer may be NULL to reject a Security Request. - * - * @retval ::NRF_SUCCESS Successfully initiated authentication procedure. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::NRF_ERROR_NO_MEM The maximum number of authentication procedures that can run in parallel for the given role is reached. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_NOT_SUPPORTED Setting of sign or link fields in @ref ble_gap_sec_kdist_t not supported. - * @retval ::NRF_ERROR_TIMEOUT A SMP timeout has occurred, and further SMP operations on this link is prohibited. - */ -SVCALL(SD_BLE_GAP_AUTHENTICATE, uint32_t, sd_ble_gap_authenticate(uint16_t conn_handle, ble_gap_sec_params_t const *p_sec_params)); - - -/**@brief Reply with GAP security parameters. - * - * @details This function is only used to reply to a @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. - * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. - * - * @events - * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_JW_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_PERIPH_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_CENTRAL_OOB_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_CONFIRM_FAIL_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_PD_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_KS_TOO_SMALL_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_APP_ERROR_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_REMOTE_PAIRING_FAIL_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_TIMEOUT_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] sec_status Security status, see @ref BLE_GAP_SEC_STATUS. - * @param[in] p_sec_params Pointer to a @ref ble_gap_sec_params_t security parameters structure. In the central role this must be set to NULL, as the parameters have - * already been provided during a previous call to @ref sd_ble_gap_authenticate. - * @param[in,out] p_sec_keyset Pointer to a @ref ble_gap_sec_keyset_t security keyset structure. Any keys generated and/or distributed as a result of the ongoing security procedure - * will be stored into the memory referenced by the pointers inside this structure. The keys will be stored and available to the application - * upon reception of a @ref BLE_GAP_EVT_AUTH_STATUS event. - * Note that the SoftDevice expects the application to provide memory for storing the - * peer's keys. So it must be ensured that the relevant pointers inside this structure are not NULL. The pointers to the local key - * can, however, be NULL, in which case, the local key data will not be available to the application upon reception of the - * @ref BLE_GAP_EVT_AUTH_STATUS event. - * - * @retval ::NRF_SUCCESS Successfully accepted security parameter from the application. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_NOT_SUPPORTED Setting of sign or link fields in @ref ble_gap_sec_kdist_t not supported. - */ -SVCALL(SD_BLE_GAP_SEC_PARAMS_REPLY, uint32_t, sd_ble_gap_sec_params_reply(uint16_t conn_handle, uint8_t sec_status, ble_gap_sec_params_t const *p_sec_params, ble_gap_sec_keyset_t const *p_sec_keyset)); - - -/**@brief Reply with an authentication key. - * - * @details This function is only used to reply to a @ref BLE_GAP_EVT_AUTH_KEY_REQUEST or a @ref BLE_GAP_EVT_PASSKEY_DISPLAY, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. - * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. - * - * @events - * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_CENTRAL_OOB_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] key_type See @ref BLE_GAP_AUTH_KEY_TYPES. - * @param[in] p_key If key type is @ref BLE_GAP_AUTH_KEY_TYPE_NONE, then NULL. - * If key type is @ref BLE_GAP_AUTH_KEY_TYPE_PASSKEY, then a 6-byte ASCII string (digit 0..9 only, no NULL termination) - * or NULL when confirming LE Secure Connections Numeric Comparison. - * If key type is @ref BLE_GAP_AUTH_KEY_TYPE_OOB, then a 16-byte OOB key value in little-endian format. - * - * @retval ::NRF_SUCCESS Authentication key successfully set. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_AUTH_KEY_REPLY, uint32_t, sd_ble_gap_auth_key_reply(uint16_t conn_handle, uint8_t key_type, uint8_t const *p_key)); - -/**@brief Reply with an LE Secure connections DHKey. - * - * @details This function is only used to reply to a @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. - * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. - * - * @events - * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_LESC_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_PD_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_dhkey LE Secure Connections DHKey. - * - * @retval ::NRF_SUCCESS DHKey successfully set. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_LESC_DHKEY_REPLY, uint32_t, sd_ble_gap_lesc_dhkey_reply(uint16_t conn_handle, ble_gap_lesc_dhkey_t const *p_dhkey)); - -/**@brief Notify the peer of a local keypress. - * - * @details This function can only be used when an authentication procedure using LE Secure Connection is in progress. Calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] kp_not See @ref BLE_GAP_KP_NOT_TYPES. - * - * @retval ::NRF_SUCCESS Keypress notification successfully queued for transmission. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Either not entering a passkey or keypresses have not been enabled by both peers. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_BUSY The BLE stack is busy. Retry at later time. - */ -SVCALL(SD_BLE_GAP_KEYPRESS_NOTIFY, uint32_t, sd_ble_gap_keypress_notify(uint16_t conn_handle, uint8_t kp_not)); - -/**@brief Generate a set of OOB data to send to a peer out of band. - * - * @note The @ref ble_gap_addr_t included in the OOB data returned will be the currently active one (or, if a connection has already been established, - * the one used during connection setup). The application may manually overwrite it with an updated value. - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. Can be BLE_CONN_HANDLE_INVALID if a BLE connection has not been established yet. - * @param[in] p_pk_own LE Secure Connections local P-256 Public Key. - * @param[out] p_oobd_own The OOB data to be sent out of band to a peer. - * - * @retval ::NRF_SUCCESS OOB data successfully generated. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_LESC_OOB_DATA_GET, uint32_t, sd_ble_gap_lesc_oob_data_get(uint16_t conn_handle, ble_gap_lesc_p256_pk_t const *p_pk_own, ble_gap_lesc_oob_data_t *p_oobd_own)); - -/**@brief Provide the OOB data sent/received out of band. - * - * @note An authentication procedure with OOB selected as an algorithm must be in progress when calling this function. - * @note A @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST event with the oobd_req set to 1 must have been received prior to calling this function. - * - * @events - * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_oobd_own The OOB data sent out of band to a peer or NULL if the peer has not received OOB data. - * Must correspond to @ref ble_gap_sec_params_t::oob flag in @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST. - * @param[in] p_oobd_peer The OOB data received out of band from a peer or NULL if none received. - * Must correspond to @ref ble_gap_sec_params_t::oob flag in @ref sd_ble_gap_authenticate in the central role - * or @ref sd_ble_gap_sec_params_reply in the peripheral role. - * - * @retval ::NRF_SUCCESS OOB data accepted. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_LESC_OOB_DATA_SET, uint32_t, sd_ble_gap_lesc_oob_data_set(uint16_t conn_handle, ble_gap_lesc_oob_data_t const *p_oobd_own, ble_gap_lesc_oob_data_t const *p_oobd_peer)); - -/**@brief Initiate GAP Encryption procedure. - * - * @details In the central role, this function will initiate the encryption procedure using the encryption information provided. - * - * @events - * @event{@ref BLE_GAP_EVT_CONN_SEC_UPDATE, The connection security has been updated.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_ENC_MSC} - * @mmsc{@ref BLE_GAP_MULTILINK_CTRL_PROC_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_SEC_REQ_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_master_id Pointer to a @ref ble_gap_master_id_t master identification structure. - * @param[in] p_enc_info Pointer to a @ref ble_gap_enc_info_t encryption information structure. - * - * @retval ::NRF_SUCCESS Successfully initiated authentication procedure. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::BLE_ERROR_INVALID_ROLE Operation is not supported in the Peripheral role. - * @retval ::NRF_ERROR_BUSY Procedure already in progress or not allowed at this time, wait for pending procedures to complete and retry. - */ -SVCALL(SD_BLE_GAP_ENCRYPT, uint32_t, sd_ble_gap_encrypt(uint16_t conn_handle, ble_gap_master_id_t const *p_master_id, ble_gap_enc_info_t const *p_enc_info)); - - -/**@brief Reply with GAP security information. - * - * @details This function is only used to reply to a @ref BLE_GAP_EVT_SEC_INFO_REQUEST, calling it at other times will result in @ref NRF_ERROR_INVALID_STATE. - * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. - * @note Data signing is not yet supported, and p_sign_info must therefore be NULL. - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_ENC_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_enc_info Pointer to a @ref ble_gap_enc_info_t encryption information structure. May be NULL to signal none is available. - * @param[in] p_id_info Pointer to a @ref ble_gap_irk_t identity information structure. May be NULL to signal none is available. - * @param[in] p_sign_info Pointer to a @ref ble_gap_sign_info_t signing information structure. May be NULL to signal none is available. - * - * @retval ::NRF_SUCCESS Successfully accepted security information. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_SEC_INFO_REPLY, uint32_t, sd_ble_gap_sec_info_reply(uint16_t conn_handle, ble_gap_enc_info_t const *p_enc_info, ble_gap_irk_t const *p_id_info, ble_gap_sign_info_t const *p_sign_info)); - - -/**@brief Get the current connection security. - * - * @param[in] conn_handle Connection handle. - * @param[out] p_conn_sec Pointer to a @ref ble_gap_conn_sec_t structure to be filled in. - * - * @retval ::NRF_SUCCESS Current connection security successfully retrieved. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_CONN_SEC_GET, uint32_t, sd_ble_gap_conn_sec_get(uint16_t conn_handle, ble_gap_conn_sec_t *p_conn_sec)); - - -/**@brief Start reporting the received signal strength to the application. - * - * A new event is reported whenever the RSSI value changes, until @ref sd_ble_gap_rssi_stop is called. - * - * @events - * @event{@ref BLE_GAP_EVT_RSSI_CHANGED, New RSSI data available. How often the event is generated is - * dependent on the settings of the threshold_dbm - * and skip_count input parameters.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} - * @mmsc{@ref BLE_GAP_RSSI_FILT_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] threshold_dbm Minimum change in dBm before triggering the @ref BLE_GAP_EVT_RSSI_CHANGED event. Events are disabled if threshold_dbm equals @ref BLE_GAP_RSSI_THRESHOLD_INVALID. - * @param[in] skip_count Number of RSSI samples with a change of threshold_dbm or more before sending a new @ref BLE_GAP_EVT_RSSI_CHANGED event. - * - * @retval ::NRF_SUCCESS Successfully activated RSSI reporting. - * @retval ::NRF_ERROR_INVALID_STATE Disconnection in progress. Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_RSSI_START, uint32_t, sd_ble_gap_rssi_start(uint16_t conn_handle, uint8_t threshold_dbm, uint8_t skip_count)); - - -/**@brief Stop reporting the received signal strength. - * - * @note An RSSI change detected before the call but not yet received by the application - * may be reported after @ref sd_ble_gap_rssi_stop has been called. - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} - * @mmsc{@ref BLE_GAP_RSSI_FILT_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * - * @retval ::NRF_SUCCESS Successfully deactivated RSSI reporting. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_RSSI_STOP, uint32_t, sd_ble_gap_rssi_stop(uint16_t conn_handle)); - - -/**@brief Get the received signal strength for the last connection event. - * - * @ref sd_ble_gap_rssi_start must be called to start reporting RSSI before using this function. @ref NRF_ERROR_NOT_FOUND - * will be returned until RSSI was sampled for the first time after calling @ref sd_ble_gap_rssi_start. - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[out] p_rssi Pointer to the location where the RSSI measurement shall be stored. - * - * @retval ::NRF_SUCCESS Successfully read the RSSI. - * @retval ::NRF_ERROR_NOT_FOUND No sample is available. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_INVALID_STATE RSSI reporting is not ongoing, or disconnection in progress. - */ -SVCALL(SD_BLE_GAP_RSSI_GET, uint32_t, sd_ble_gap_rssi_get(uint16_t conn_handle, int8_t *p_rssi)); - - -/**@brief Start scanning (GAP Discovery procedure, Observer Procedure). - * - * @events - * @event{@ref BLE_GAP_EVT_ADV_REPORT, An advertising or scan response packet has been received.} - * @event{@ref BLE_GAP_EVT_TIMEOUT, Scanner has timed out.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_SCAN_MSC} - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @endmscs - * - * @param[in] p_scan_params Pointer to scan parameters structure. - * - * @retval ::NRF_SUCCESS Successfully initiated scanning procedure. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::NRF_ERROR_RESOURCES Not enough BLE role slots available. - * Stop one or more currently active roles (Central, Peripheral or Broadcaster) and try again - */ -SVCALL(SD_BLE_GAP_SCAN_START, uint32_t, sd_ble_gap_scan_start(ble_gap_scan_params_t const *p_scan_params)); - - -/**@brief Stop scanning (GAP Discovery procedure, Observer Procedure). - * - * @mscs - * @mmsc{@ref BLE_GAP_SCAN_MSC} - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Successfully stopped scanning procedure. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation (most probably not in scanning state). - */ -SVCALL(SD_BLE_GAP_SCAN_STOP, uint32_t, sd_ble_gap_scan_stop(void)); - - -/**@brief Create a connection (GAP Link Establishment). - * - * @note If a scanning procedure is currently in progress it will be automatically stopped when calling this function. - * The scanning procedure will be stopped even if the function returns an error. - * - * @mscs - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_CONN_PRIV_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_CONN_MSC} - * @endmscs - * - * @param[in] p_peer_addr Pointer to peer address. If the use_whitelist bit is set in @ref ble_gap_scan_params_t, then this is ignored. - * If @ref ble_gap_addr_t::addr_id_peer is set then p_peer_addr must be present in the device identity list - * see @ref sd_ble_gap_device_identities_set. - * @param[in] p_scan_params Pointer to scan parameters structure. - * @param[in] p_conn_params Pointer to desired connection parameters. - * @param[in] conn_cfg_tag Tag identifying a configuration set by @ref sd_ble_cfg_set or @ref - * BLE_CONN_CFG_TAG_DEFAULT to use the default connection configuration. - * - * @retval ::NRF_SUCCESS Successfully initiated connection procedure. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid parameter(s) pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * - Invalid parameter(s) in p_scan_params or p_conn_params. - * - Use of whitelist requested but whitelist has not been set, see @ref sd_ble_gap_whitelist_set. - * - Peer address was not present in the device identity list, see @ref sd_ble_gap_device_identities_set. - * @retval ::NRF_ERROR_INVALID_STATE The SoftDevice is in an invalid state to perform this operation. This may be due to an - * existing locally initiated connect procedure, which must complete before initiating again. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid Peer address. - * @retval ::NRF_ERROR_CONN_COUNT The limit of available connections has been reached. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. If another connection is being established - * wait for the corresponding @ref BLE_GAP_EVT_CONNECTED event before calling again. - * @retval ::NRF_ERROR_RESOURCES Not enough BLE role slots available. - * Stop one or more currently active roles (Central, Peripheral or Broadcaster) and try again - */ -SVCALL(SD_BLE_GAP_CONNECT, uint32_t, sd_ble_gap_connect(ble_gap_addr_t const *p_peer_addr, ble_gap_scan_params_t const *p_scan_params, ble_gap_conn_params_t const *p_conn_params, uint8_t conn_cfg_tag)); - - -/**@brief Cancel a connection establishment. - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_CONN_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Successfully canceled an ongoing connection procedure. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - */ -SVCALL(SD_BLE_GAP_CONNECT_CANCEL, uint32_t, sd_ble_gap_connect_cancel(void)); - - -/**@brief PHY Update Request - * - * @details This function is used to request a new PHY configuration for a central or a peripheral connection. It will always generate a - * @ref BLE_GAP_EVT_PHY_UPDATE event if successfully executed. If @ref ble_gap_phys_t::tx_phys or @ref ble_gap_phys_t::rx_phys - * is 0, then the stack will select PHYs based on the peer requirements on that specific direction. If the peer does not support - * the PHY Update procedure, then the resulting @ref BLE_GAP_EVT_PHY_UPDATE event will have a status different from - * @ref BLE_HCI_STATUS_CODE_SUCCESS. - * - * @note The requested PHYs does not have to be within the set of the preferred PHYs. - * - * @note If the @ref ble_gap_opt_preferred_phys_t have not been configured with @ref BLE_GAP_PHY_CODED, then this call might return - * @ref BLE_ERROR_BLOCKED_BY_OTHER_LINKS if there are multiple devices connected. - * - * - * @events - * @event{@ref BLE_GAP_EVT_PHY_UPDATE, Result of the PHY Update procedure procedure.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_PHY_REQUEST} - * @mmsc{@ref BLE_GAP_PERIPHERAL_PHY_REQUEST} - * @endmscs - * - * @param[in] conn_handle Connection handle to indicate the connection for which the PHY Update is requested. - * @param[in] p_gap_phys Pointer to PHY structure. - * - * @retval ::NRF_SUCCESS Successfully requested a PHY Update. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Unsupported PHYs supplied to the call. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_BLOCKED_BY_OTHER_LINKS Other connections may block the scheduling of the current link. - * @retval ::NRF_ERROR_BUSY Procedure is already in progress or not allowed at this time. Process pending events and wait for the pending procedure to complete and retry. - * - */ -SVCALL(SD_BLE_GAP_PHY_REQUEST, uint32_t, sd_ble_gap_phy_request(uint16_t conn_handle, ble_gap_phys_t const *p_gap_phys)); - -/**@brief Initiate or respond to a Data Length Update Procedure. - * - * @note Only symmetric input parameters for the Data Length Update is supported. Only @ref - * BLE_GAP_DATA_LENGTH_AUTO for max_tx_time_us and max_rx_time_us is supported. - * - * @note If the application uses @ref BLE_GAP_DATA_LENGTH_AUTO for one or more members of - * p_dl_params, the SoftDevice will choose the highest value supported in current - * configuration and connection parameters. - * - * @param[in] conn_handle Connection handle. - * @param[in] p_dl_params Pointer to local parameters to be used in Data Length Update - * Procedure. Set any member to @ref BLE_GAP_DATA_LENGTH_AUTO to let - * the SoftDevice automatically decide the value for that member. - * Set to NULL to use automatic values for all members. - * @param[out] p_dl_limitation Pointer to limitation to be written when local device does not - * have enough resources to accommodate the requested Data Length - * Update parameters. Ignored if NULL. - * - * @mscs - * @mmsc{@ref BLE_GAP_DATA_LENGTH_UPDATE_PROCEDURE_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Successfully set Data Length Extension initiation/response parameters. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameters supplied. - * @retval ::NRF_ERROR_NOT_SUPPORTED The requested parameters are not supported by the SoftDevice. - * @retval ::NRF_ERROR_RESOURCES The requested parameters can not be accommodated. Inspect - * p_dl_limitation so see where the limitation is. - * @retval ::NRF_ERROR_BUSY Peer has already initiated a Data Length Update Procedure. Process the - * pending @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST event to respond. - */ -SVCALL(SD_BLE_GAP_DATA_LENGTH_UPDATE, uint32_t, sd_ble_gap_data_length_update(uint16_t conn_handle, ble_gap_data_length_params_t const *p_dl_params, ble_gap_data_length_limitation_t *p_dl_limitation)); - - - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // BLE_GAP_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_gatt.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_gatt.h deleted file mode 100644 index f6e7ee85637..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_gatt.h +++ /dev/null @@ -1,221 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - @addtogroup BLE_GATT Generic Attribute Profile (GATT) Common - @{ - @brief Common definitions and prototypes for the GATT interfaces. - */ - -#ifndef BLE_GATT_H__ -#define BLE_GATT_H__ - -#include "ble_types.h" -#include "ble_ranges.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_GATT_DEFINES Defines - * @{ */ - -/** @brief Default ATT MTU, in bytes. */ -#define BLE_GATT_ATT_MTU_DEFAULT 23 - -/**@brief Invalid Attribute Handle. */ -#define BLE_GATT_HANDLE_INVALID 0x0000 - -/**@brief First Attribute Handle. */ -#define BLE_GATT_HANDLE_START 0x0001 - -/**@brief Last Attribute Handle. */ -#define BLE_GATT_HANDLE_END 0xFFFF - -/** @defgroup BLE_GATT_TIMEOUT_SOURCES GATT Timeout sources - * @{ */ -#define BLE_GATT_TIMEOUT_SRC_PROTOCOL 0x00 /**< ATT Protocol timeout. */ -/** @} */ - -/** @defgroup BLE_GATT_WRITE_OPS GATT Write operations - * @{ */ -#define BLE_GATT_OP_INVALID 0x00 /**< Invalid Operation. */ -#define BLE_GATT_OP_WRITE_REQ 0x01 /**< Write Request. */ -#define BLE_GATT_OP_WRITE_CMD 0x02 /**< Write Command. */ -#define BLE_GATT_OP_SIGN_WRITE_CMD 0x03 /**< Signed Write Command. */ -#define BLE_GATT_OP_PREP_WRITE_REQ 0x04 /**< Prepare Write Request. */ -#define BLE_GATT_OP_EXEC_WRITE_REQ 0x05 /**< Execute Write Request. */ -/** @} */ - -/** @defgroup BLE_GATT_EXEC_WRITE_FLAGS GATT Execute Write flags - * @{ */ -#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_CANCEL 0x00 /**< Cancel prepared write. */ -#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_WRITE 0x01 /**< Execute prepared write. */ -/** @} */ - -/** @defgroup BLE_GATT_HVX_TYPES GATT Handle Value operations - * @{ */ -#define BLE_GATT_HVX_INVALID 0x00 /**< Invalid Operation. */ -#define BLE_GATT_HVX_NOTIFICATION 0x01 /**< Handle Value Notification. */ -#define BLE_GATT_HVX_INDICATION 0x02 /**< Handle Value Indication. */ -/** @} */ - -/** @defgroup BLE_GATT_STATUS_CODES GATT Status Codes - * @{ */ -#define BLE_GATT_STATUS_SUCCESS 0x0000 /**< Success. */ -#define BLE_GATT_STATUS_UNKNOWN 0x0001 /**< Unknown or not applicable status. */ -#define BLE_GATT_STATUS_ATTERR_INVALID 0x0100 /**< ATT Error: Invalid Error Code. */ -#define BLE_GATT_STATUS_ATTERR_INVALID_HANDLE 0x0101 /**< ATT Error: Invalid Attribute Handle. */ -#define BLE_GATT_STATUS_ATTERR_READ_NOT_PERMITTED 0x0102 /**< ATT Error: Read not permitted. */ -#define BLE_GATT_STATUS_ATTERR_WRITE_NOT_PERMITTED 0x0103 /**< ATT Error: Write not permitted. */ -#define BLE_GATT_STATUS_ATTERR_INVALID_PDU 0x0104 /**< ATT Error: Used in ATT as Invalid PDU. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHENTICATION 0x0105 /**< ATT Error: Authenticated link required. */ -#define BLE_GATT_STATUS_ATTERR_REQUEST_NOT_SUPPORTED 0x0106 /**< ATT Error: Used in ATT as Request Not Supported. */ -#define BLE_GATT_STATUS_ATTERR_INVALID_OFFSET 0x0107 /**< ATT Error: Offset specified was past the end of the attribute. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHORIZATION 0x0108 /**< ATT Error: Used in ATT as Insufficient Authorization. */ -#define BLE_GATT_STATUS_ATTERR_PREPARE_QUEUE_FULL 0x0109 /**< ATT Error: Used in ATT as Prepare Queue Full. */ -#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_FOUND 0x010A /**< ATT Error: Used in ATT as Attribute not found. */ -#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_LONG 0x010B /**< ATT Error: Attribute cannot be read or written using read/write blob requests. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_ENC_KEY_SIZE 0x010C /**< ATT Error: Encryption key size used is insufficient. */ -#define BLE_GATT_STATUS_ATTERR_INVALID_ATT_VAL_LENGTH 0x010D /**< ATT Error: Invalid value size. */ -#define BLE_GATT_STATUS_ATTERR_UNLIKELY_ERROR 0x010E /**< ATT Error: Very unlikely error. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_ENCRYPTION 0x010F /**< ATT Error: Encrypted link required. */ -#define BLE_GATT_STATUS_ATTERR_UNSUPPORTED_GROUP_TYPE 0x0110 /**< ATT Error: Attribute type is not a supported grouping attribute. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_RESOURCES 0x0111 /**< ATT Error: Encrypted link required. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_BEGIN 0x0112 /**< ATT Error: Reserved for Future Use range #1 begin. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_END 0x017F /**< ATT Error: Reserved for Future Use range #1 end. */ -#define BLE_GATT_STATUS_ATTERR_APP_BEGIN 0x0180 /**< ATT Error: Application range begin. */ -#define BLE_GATT_STATUS_ATTERR_APP_END 0x019F /**< ATT Error: Application range end. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_BEGIN 0x01A0 /**< ATT Error: Reserved for Future Use range #2 begin. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_END 0x01DF /**< ATT Error: Reserved for Future Use range #2 end. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_BEGIN 0x01E0 /**< ATT Error: Reserved for Future Use range #3 begin. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_END 0x01FC /**< ATT Error: Reserved for Future Use range #3 end. */ -#define BLE_GATT_STATUS_ATTERR_CPS_CCCD_CONFIG_ERROR 0x01FD /**< ATT Common Profile and Service Error: Client Characteristic Configuration Descriptor improperly configured. */ -#define BLE_GATT_STATUS_ATTERR_CPS_PROC_ALR_IN_PROG 0x01FE /**< ATT Common Profile and Service Error: Procedure Already in Progress. */ -#define BLE_GATT_STATUS_ATTERR_CPS_OUT_OF_RANGE 0x01FF /**< ATT Common Profile and Service Error: Out Of Range. */ -/** @} */ - - -/** @defgroup BLE_GATT_CPF_FORMATS Characteristic Presentation Formats - * @note Found at http://developer.bluetooth.org/gatt/descriptors/Pages/DescriptorViewer.aspx?u=org.bluetooth.descriptor.gatt.characteristic_presentation_format.xml - * @{ */ -#define BLE_GATT_CPF_FORMAT_RFU 0x00 /**< Reserved For Future Use. */ -#define BLE_GATT_CPF_FORMAT_BOOLEAN 0x01 /**< Boolean. */ -#define BLE_GATT_CPF_FORMAT_2BIT 0x02 /**< Unsigned 2-bit integer. */ -#define BLE_GATT_CPF_FORMAT_NIBBLE 0x03 /**< Unsigned 4-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT8 0x04 /**< Unsigned 8-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT12 0x05 /**< Unsigned 12-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT16 0x06 /**< Unsigned 16-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT24 0x07 /**< Unsigned 24-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT32 0x08 /**< Unsigned 32-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT48 0x09 /**< Unsigned 48-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT64 0x0A /**< Unsigned 64-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT128 0x0B /**< Unsigned 128-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT8 0x0C /**< Signed 2-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT12 0x0D /**< Signed 12-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT16 0x0E /**< Signed 16-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT24 0x0F /**< Signed 24-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT32 0x10 /**< Signed 32-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT48 0x11 /**< Signed 48-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT64 0x12 /**< Signed 64-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT128 0x13 /**< Signed 128-bit integer. */ -#define BLE_GATT_CPF_FORMAT_FLOAT32 0x14 /**< IEEE-754 32-bit floating point. */ -#define BLE_GATT_CPF_FORMAT_FLOAT64 0x15 /**< IEEE-754 64-bit floating point. */ -#define BLE_GATT_CPF_FORMAT_SFLOAT 0x16 /**< IEEE-11073 16-bit SFLOAT. */ -#define BLE_GATT_CPF_FORMAT_FLOAT 0x17 /**< IEEE-11073 32-bit FLOAT. */ -#define BLE_GATT_CPF_FORMAT_DUINT16 0x18 /**< IEEE-20601 format. */ -#define BLE_GATT_CPF_FORMAT_UTF8S 0x19 /**< UTF-8 string. */ -#define BLE_GATT_CPF_FORMAT_UTF16S 0x1A /**< UTF-16 string. */ -#define BLE_GATT_CPF_FORMAT_STRUCT 0x1B /**< Opaque Structure. */ -/** @} */ - -/** @defgroup BLE_GATT_CPF_NAMESPACES GATT Bluetooth Namespaces - * @{ - */ -#define BLE_GATT_CPF_NAMESPACE_BTSIG 0x01 /**< Bluetooth SIG defined Namespace. */ -#define BLE_GATT_CPF_NAMESPACE_DESCRIPTION_UNKNOWN 0x0000 /**< Namespace Description Unknown. */ -/** @} */ - -/** @} */ - -/** @addtogroup BLE_GATT_STRUCTURES Structures - * @{ */ - -/** - * @brief BLE GATT connection configuration parameters, set with @ref sd_ble_cfg_set. - * - * @retval NRF_ERROR_INVALID_PARAM att_mtu is smaller than @ref BLE_GATT_ATT_MTU_DEFAULT. - */ -typedef struct -{ - uint16_t att_mtu; /**< Maximum size of ATT packet the SoftDevice can send or receive. - The default and minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. - @mscs - @mmsc{@ref BLE_GATTC_MTU_EXCHANGE} - @mmsc{@ref BLE_GATTS_MTU_EXCHANGE} - @endmscs - */ -} ble_gatt_conn_cfg_t; - -/**@brief GATT Characteristic Properties. */ -typedef struct -{ - /* Standard properties */ - uint8_t broadcast :1; /**< Broadcasting of the value permitted. */ - uint8_t read :1; /**< Reading the value permitted. */ - uint8_t write_wo_resp :1; /**< Writing the value with Write Command permitted. */ - uint8_t write :1; /**< Writing the value with Write Request permitted. */ - uint8_t notify :1; /**< Notification of the value permitted. */ - uint8_t indicate :1; /**< Indications of the value permitted. */ - uint8_t auth_signed_wr :1; /**< Writing the value with Signed Write Command permitted. */ -} ble_gatt_char_props_t; - -/**@brief GATT Characteristic Extended Properties. */ -typedef struct -{ - /* Extended properties */ - uint8_t reliable_wr :1; /**< Writing the value with Queued Write operations permitted. */ - uint8_t wr_aux :1; /**< Writing the Characteristic User Description descriptor permitted. */ -} ble_gatt_char_ext_props_t; - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // BLE_GATT_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_gattc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_gattc.h deleted file mode 100644 index b6a75ece770..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_gattc.h +++ /dev/null @@ -1,700 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - @addtogroup BLE_GATTC Generic Attribute Profile (GATT) Client - @{ - @brief Definitions and prototypes for the GATT Client interface. - */ - -#ifndef BLE_GATTC_H__ -#define BLE_GATTC_H__ - -#include "ble_gatt.h" -#include "ble_types.h" -#include "ble_ranges.h" -#include "nrf_svc.h" -#include "nrf_error.h" -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_GATTC_ENUMERATIONS Enumerations - * @{ */ - -/**@brief GATTC API SVC numbers. */ -enum BLE_GATTC_SVCS -{ - SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER = BLE_GATTC_SVC_BASE, /**< Primary Service Discovery. */ - SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, /**< Relationship Discovery. */ - SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, /**< Characteristic Discovery. */ - SD_BLE_GATTC_DESCRIPTORS_DISCOVER, /**< Characteristic Descriptor Discovery. */ - SD_BLE_GATTC_ATTR_INFO_DISCOVER, /**< Attribute Information Discovery. */ - SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, /**< Read Characteristic Value by UUID. */ - SD_BLE_GATTC_READ, /**< Generic read. */ - SD_BLE_GATTC_CHAR_VALUES_READ, /**< Read multiple Characteristic Values. */ - SD_BLE_GATTC_WRITE, /**< Generic write. */ - SD_BLE_GATTC_HV_CONFIRM, /**< Handle Value Confirmation. */ - SD_BLE_GATTC_EXCHANGE_MTU_REQUEST, /**< Exchange MTU Request. */ -}; - -/** - * @brief GATT Client Event IDs. - */ -enum BLE_GATTC_EVTS -{ - BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP = BLE_GATTC_EVT_BASE, /**< Primary Service Discovery Response event. \n See @ref ble_gattc_evt_prim_srvc_disc_rsp_t. */ - BLE_GATTC_EVT_REL_DISC_RSP, /**< Relationship Discovery Response event. \n See @ref ble_gattc_evt_rel_disc_rsp_t. */ - BLE_GATTC_EVT_CHAR_DISC_RSP, /**< Characteristic Discovery Response event. \n See @ref ble_gattc_evt_char_disc_rsp_t. */ - BLE_GATTC_EVT_DESC_DISC_RSP, /**< Descriptor Discovery Response event. \n See @ref ble_gattc_evt_desc_disc_rsp_t. */ - BLE_GATTC_EVT_ATTR_INFO_DISC_RSP, /**< Attribute Information Response event. \n See @ref ble_gattc_evt_attr_info_disc_rsp_t. */ - BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP, /**< Read By UUID Response event. \n See @ref ble_gattc_evt_char_val_by_uuid_read_rsp_t. */ - BLE_GATTC_EVT_READ_RSP, /**< Read Response event. \n See @ref ble_gattc_evt_read_rsp_t. */ - BLE_GATTC_EVT_CHAR_VALS_READ_RSP, /**< Read multiple Response event. \n See @ref ble_gattc_evt_char_vals_read_rsp_t. */ - BLE_GATTC_EVT_WRITE_RSP, /**< Write Response event. \n See @ref ble_gattc_evt_write_rsp_t. */ - BLE_GATTC_EVT_HVX, /**< Handle Value Notification or Indication event. \n Confirm indication with @ref sd_ble_gattc_hv_confirm. \n See @ref ble_gattc_evt_hvx_t. */ - BLE_GATTC_EVT_EXCHANGE_MTU_RSP, /**< Exchange MTU Response event. \n See @ref ble_gattc_evt_exchange_mtu_rsp_t. */ - BLE_GATTC_EVT_TIMEOUT, /**< Timeout event. \n See @ref ble_gattc_evt_timeout_t. */ - BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE /**< Write without Response transmission complete. \n See @ref ble_gattc_evt_write_cmd_tx_complete_t. */ -}; - -/** @} */ - -/** @addtogroup BLE_GATTC_DEFINES Defines - * @{ */ - -/** @defgroup BLE_ERRORS_GATTC SVC return values specific to GATTC - * @{ */ -#define BLE_ERROR_GATTC_PROC_NOT_PERMITTED (NRF_GATTC_ERR_BASE + 0x000) /**< Procedure not Permitted. */ -/** @} */ - -/** @defgroup BLE_GATTC_ATTR_INFO_FORMAT Attribute Information Formats - * @{ */ -#define BLE_GATTC_ATTR_INFO_FORMAT_16BIT 1 /**< 16-bit Attribute Information Format. */ -#define BLE_GATTC_ATTR_INFO_FORMAT_128BIT 2 /**< 128-bit Attribute Information Format. */ -/** @} */ - -/** @defgroup BLE_GATTC_DEFAULTS GATT Client defaults - * @{ */ -#define BLE_GATTC_WRITE_CMD_TX_QUEUE_SIZE_DEFAULT 1 /**< Default number of Write without Response that can be queued for transmission. */ -/** @} */ - -/** @} */ - -/** @addtogroup BLE_GATTC_STRUCTURES Structures - * @{ */ - -/** - * @brief BLE GATTC connection configuration parameters, set with @ref sd_ble_cfg_set. - */ -typedef struct -{ - uint8_t write_cmd_tx_queue_size; /**< The guaranteed minimum number of Write without Response that can be queued for transmission. - The default value is @ref BLE_GATTC_WRITE_CMD_TX_QUEUE_SIZE_DEFAULT */ -} ble_gattc_conn_cfg_t; - -/**@brief Operation Handle Range. */ -typedef struct -{ - uint16_t start_handle; /**< Start Handle. */ - uint16_t end_handle; /**< End Handle. */ -} ble_gattc_handle_range_t; - - -/**@brief GATT service. */ -typedef struct -{ - ble_uuid_t uuid; /**< Service UUID. */ - ble_gattc_handle_range_t handle_range; /**< Service Handle Range. */ -} ble_gattc_service_t; - - -/**@brief GATT include. */ -typedef struct -{ - uint16_t handle; /**< Include Handle. */ - ble_gattc_service_t included_srvc; /**< Handle of the included service. */ -} ble_gattc_include_t; - - -/**@brief GATT characteristic. */ -typedef struct -{ - ble_uuid_t uuid; /**< Characteristic UUID. */ - ble_gatt_char_props_t char_props; /**< Characteristic Properties. */ - uint8_t char_ext_props : 1; /**< Extended properties present. */ - uint16_t handle_decl; /**< Handle of the Characteristic Declaration. */ - uint16_t handle_value; /**< Handle of the Characteristic Value. */ -} ble_gattc_char_t; - - -/**@brief GATT descriptor. */ -typedef struct -{ - uint16_t handle; /**< Descriptor Handle. */ - ble_uuid_t uuid; /**< Descriptor UUID. */ -} ble_gattc_desc_t; - - -/**@brief Write Parameters. */ -typedef struct -{ - uint8_t write_op; /**< Write Operation to be performed, see @ref BLE_GATT_WRITE_OPS. */ - uint8_t flags; /**< Flags, see @ref BLE_GATT_EXEC_WRITE_FLAGS. */ - uint16_t handle; /**< Handle to the attribute to be written. */ - uint16_t offset; /**< Offset in bytes. @note For WRITE_CMD and WRITE_REQ, offset must be 0. */ - uint16_t len; /**< Length of data in bytes. */ - uint8_t const *p_value; /**< Pointer to the value data. */ -} ble_gattc_write_params_t; - -/**@brief Attribute Information for 16-bit Attribute UUID. */ -typedef struct -{ - uint16_t handle; /**< Attribute handle. */ - ble_uuid_t uuid; /**< 16-bit Attribute UUID. */ -} ble_gattc_attr_info16_t; - -/**@brief Attribute Information for 128-bit Attribute UUID. */ -typedef struct -{ - uint16_t handle; /**< Attribute handle. */ - ble_uuid128_t uuid; /**< 128-bit Attribute UUID. */ -} ble_gattc_attr_info128_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Service count. */ - ble_gattc_service_t services[1]; /**< Service data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_prim_srvc_disc_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_REL_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Include count. */ - ble_gattc_include_t includes[1]; /**< Include data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_rel_disc_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Characteristic count. */ - ble_gattc_char_t chars[1]; /**< Characteristic data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_char_disc_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_DESC_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Descriptor count. */ - ble_gattc_desc_t descs[1]; /**< Descriptor data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_desc_disc_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_ATTR_INFO_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Attribute count. */ - uint8_t format; /**< Attribute information format, see @ref BLE_GATTC_ATTR_INFO_FORMAT. */ - union { - ble_gattc_attr_info16_t attr_info16[1]; /**< Attribute information for 16-bit Attribute UUID. - @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ - ble_gattc_attr_info128_t attr_info128[1]; /**< Attribute information for 128-bit Attribute UUID. - @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ - } info; /**< Attribute information union. */ -} ble_gattc_evt_attr_info_disc_rsp_t; - -/**@brief GATT read by UUID handle value pair. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - uint8_t *p_value; /**< Pointer to the Attribute Value, length is available in @ref ble_gattc_evt_char_val_by_uuid_read_rsp_t::value_len. */ -} ble_gattc_handle_value_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP. */ -typedef struct -{ - uint16_t count; /**< Handle-Value Pair Count. */ - uint16_t value_len; /**< Length of the value in Handle-Value(s) list. */ - uint8_t handle_value[1]; /**< Handle-Value(s) list. To iterate through the list use @ref sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter. - @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_char_val_by_uuid_read_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_READ_RSP. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - uint16_t offset; /**< Offset of the attribute data. */ - uint16_t len; /**< Attribute data length. */ - uint8_t data[1]; /**< Attribute data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_read_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_VALS_READ_RSP. */ -typedef struct -{ - uint16_t len; /**< Concatenated Attribute values length. */ - uint8_t values[1]; /**< Attribute values. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_char_vals_read_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_WRITE_RSP. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - uint8_t write_op; /**< Type of write operation, see @ref BLE_GATT_WRITE_OPS. */ - uint16_t offset; /**< Data offset. */ - uint16_t len; /**< Data length. */ - uint8_t data[1]; /**< Data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_write_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_HVX. */ -typedef struct -{ - uint16_t handle; /**< Handle to which the HVx operation applies. */ - uint8_t type; /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */ - uint16_t len; /**< Attribute data length. */ - uint8_t data[1]; /**< Attribute data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_hvx_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP. */ -typedef struct -{ - uint16_t server_rx_mtu; /**< Server RX MTU size. */ -} ble_gattc_evt_exchange_mtu_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_TIMEOUT. */ -typedef struct -{ - uint8_t src; /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */ -} ble_gattc_evt_timeout_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE. */ -typedef struct -{ - uint8_t count; /**< Number of write without response transmissions completed. */ -} ble_gattc_evt_write_cmd_tx_complete_t; - -/**@brief GATTC event structure. */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle on which event occurred. */ - uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ - uint16_t error_handle; /**< In case of error: The handle causing the error. In all other cases @ref BLE_GATT_HANDLE_INVALID. */ - union - { - ble_gattc_evt_prim_srvc_disc_rsp_t prim_srvc_disc_rsp; /**< Primary Service Discovery Response Event Parameters. */ - ble_gattc_evt_rel_disc_rsp_t rel_disc_rsp; /**< Relationship Discovery Response Event Parameters. */ - ble_gattc_evt_char_disc_rsp_t char_disc_rsp; /**< Characteristic Discovery Response Event Parameters. */ - ble_gattc_evt_desc_disc_rsp_t desc_disc_rsp; /**< Descriptor Discovery Response Event Parameters. */ - ble_gattc_evt_char_val_by_uuid_read_rsp_t char_val_by_uuid_read_rsp; /**< Characteristic Value Read by UUID Response Event Parameters. */ - ble_gattc_evt_read_rsp_t read_rsp; /**< Read Response Event Parameters. */ - ble_gattc_evt_char_vals_read_rsp_t char_vals_read_rsp; /**< Characteristic Values Read Response Event Parameters. */ - ble_gattc_evt_write_rsp_t write_rsp; /**< Write Response Event Parameters. */ - ble_gattc_evt_hvx_t hvx; /**< Handle Value Notification/Indication Event Parameters. */ - ble_gattc_evt_exchange_mtu_rsp_t exchange_mtu_rsp; /**< Exchange MTU Response Event Parameters. */ - ble_gattc_evt_timeout_t timeout; /**< Timeout Event Parameters. */ - ble_gattc_evt_attr_info_disc_rsp_t attr_info_disc_rsp; /**< Attribute Information Discovery Event Parameters. */ - ble_gattc_evt_write_cmd_tx_complete_t write_cmd_tx_complete; /**< Write without Response transmission complete Event Parameters. */ - } params; /**< Event Parameters. @note Only valid if @ref gatt_status == @ref BLE_GATT_STATUS_SUCCESS. */ -} ble_gattc_evt_t; -/** @} */ - -/** @addtogroup BLE_GATTC_FUNCTIONS Functions - * @{ */ - -/**@brief Initiate or continue a GATT Primary Service Discovery procedure. - * - * @details This function initiates or resumes a Primary Service discovery procedure, starting from the supplied handle. - * If the last service has not been reached, this function must be called again with an updated start handle value to continue the search. - * - * @note If any of the discovered services have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with - * type @ref BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event. - * - * @events - * @event{@ref BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_PRIM_SRVC_DISC_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] start_handle Handle to start searching from. - * @param[in] p_srvc_uuid Pointer to the service UUID to be found. If it is NULL, all primary services will be returned. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Primary Service Discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER, uint32_t, sd_ble_gattc_primary_services_discover(uint16_t conn_handle, uint16_t start_handle, ble_uuid_t const *p_srvc_uuid)); - - -/**@brief Initiate or continue a GATT Relationship Discovery procedure. - * - * @details This function initiates or resumes the Find Included Services sub-procedure. If the last included service has not been reached, - * this must be called again with an updated handle range to continue the search. - * - * @events - * @event{@ref BLE_GATTC_EVT_REL_DISC_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_REL_DISC_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Relationship Discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, uint32_t, sd_ble_gattc_relationships_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); - - -/**@brief Initiate or continue a GATT Characteristic Discovery procedure. - * - * @details This function initiates or resumes a Characteristic discovery procedure. If the last Characteristic has not been reached, - * this must be called again with an updated handle range to continue the discovery. - * - * @note If any of the discovered characteristics have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with - * type @ref BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event. - * - * @events - * @event{@ref BLE_GATTC_EVT_CHAR_DISC_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_CHAR_DISC_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Characteristic Discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, uint32_t, sd_ble_gattc_characteristics_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); - - -/**@brief Initiate or continue a GATT Characteristic Descriptor Discovery procedure. - * - * @details This function initiates or resumes a Characteristic Descriptor discovery procedure. If the last Descriptor has not been reached, - * this must be called again with an updated handle range to continue the discovery. - * - * @events - * @event{@ref BLE_GATTC_EVT_DESC_DISC_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_DESC_DISC_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handle_range A pointer to the range of handles of the Characteristic to perform this procedure on. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Descriptor Discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_DESCRIPTORS_DISCOVER, uint32_t, sd_ble_gattc_descriptors_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); - - -/**@brief Initiate or continue a GATT Read using Characteristic UUID procedure. - * - * @details This function initiates or resumes a Read using Characteristic UUID procedure. If the last Characteristic has not been reached, - * this must be called again with an updated handle range to continue the discovery. - * - * @events - * @event{@ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_READ_UUID_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_uuid Pointer to a Characteristic value UUID to read. - * @param[in] p_handle_range A pointer to the range of handles to perform this procedure on. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Read using Characteristic UUID procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, uint32_t, sd_ble_gattc_char_value_by_uuid_read(uint16_t conn_handle, ble_uuid_t const *p_uuid, ble_gattc_handle_range_t const *p_handle_range)); - - -/**@brief Initiate or continue a GATT Read (Long) Characteristic or Descriptor procedure. - * - * @details This function initiates or resumes a GATT Read (Long) Characteristic or Descriptor procedure. If the Characteristic or Descriptor - * to be read is longer than ATT_MTU - 1, this function must be called multiple times with appropriate offset to read the - * complete value. - * - * @events - * @event{@ref BLE_GATTC_EVT_READ_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_VALUE_READ_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] handle The handle of the attribute to be read. - * @param[in] offset Offset into the attribute value to be read. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Read (Long) procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_READ, uint32_t, sd_ble_gattc_read(uint16_t conn_handle, uint16_t handle, uint16_t offset)); - - -/**@brief Initiate a GATT Read Multiple Characteristic Values procedure. - * - * @details This function initiates a GATT Read Multiple Characteristic Values procedure. - * - * @events - * @event{@ref BLE_GATTC_EVT_CHAR_VALS_READ_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_READ_MULT_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handles A pointer to the handle(s) of the attribute(s) to be read. - * @param[in] handle_count The number of handles in p_handles. - * - * @retval ::NRF_SUCCESS Successfully started the Read Multiple Characteristic Values procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_CHAR_VALUES_READ, uint32_t, sd_ble_gattc_char_values_read(uint16_t conn_handle, uint16_t const *p_handles, uint16_t handle_count)); - - -/**@brief Perform a Write (Characteristic Value or Descriptor, with or without response, signed or not, long or reliable) procedure. - * - * @details This function can perform all write procedures described in GATT. - * - * @note Only one write with response procedure can be ongoing per connection at a time. - * If the application tries to write with response while another write with response procedure is ongoing, - * the function call will return @ref NRF_ERROR_BUSY. - * A @ref BLE_GATTC_EVT_WRITE_RSP event will be issued as soon as the write response arrives from the peer. - * - * @note The number of Write without Response that can be queued is configured by @ref ble_gattc_conn_cfg_t::write_cmd_tx_queue_size - * When the queue is full, the function call will return @ref NRF_ERROR_RESOURCES. - * A @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event will be issued as soon as the transmission of the write without response is complete. - * - * @note The application can keep track of the available queue element count for writes without responses by following the procedure below: - * - Store initial queue element count in a variable. - * - Decrement the variable, which stores the currently available queue element count, by one when a call to this function returns @ref NRF_SUCCESS. - * - Increment the variable, which stores the current available queue element count, by the count variable in @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event. - * - * @events - * @event{@ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE, Write without response transmission complete.} - * @event{@ref BLE_GATTC_EVT_WRITE_RSP, Write response received from the peer.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_VALUE_WRITE_WITHOUT_RESP_MSC} - * @mmsc{@ref BLE_GATTC_VALUE_WRITE_MSC} - * @mmsc{@ref BLE_GATTC_VALUE_LONG_WRITE_MSC} - * @mmsc{@ref BLE_GATTC_VALUE_RELIABLE_WRITE_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_write_params A pointer to a write parameters structure. - * - * @retval ::NRF_SUCCESS Successfully started the Write procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. - * @retval ::NRF_ERROR_BUSY For write with response, procedure already in progress. Wait for a @ref BLE_GATTC_EVT_WRITE_RSP event and retry. - * @retval ::NRF_ERROR_RESOURCES Too many writes without responses queued. - * Wait for a @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event and retry. - */ -SVCALL(SD_BLE_GATTC_WRITE, uint32_t, sd_ble_gattc_write(uint16_t conn_handle, ble_gattc_write_params_t const *p_write_params)); - - -/**@brief Send a Handle Value Confirmation to the GATT Server. - * - * @mscs - * @mmsc{@ref BLE_GATTC_HVI_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] handle The handle of the attribute in the indication. - * - * @retval ::NRF_SUCCESS Successfully queued the Handle Value Confirmation for transmission. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no Indication pending to be confirmed. - * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle. - */ -SVCALL(SD_BLE_GATTC_HV_CONFIRM, uint32_t, sd_ble_gattc_hv_confirm(uint16_t conn_handle, uint16_t handle)); - -/**@brief Discovers information about a range of attributes on a GATT server. - * - * @events - * @event{@ref BLE_GATTC_EVT_ATTR_INFO_DISC_RSP, Generated when information about a range of attributes has been received.} - * @endevents - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handle_range The range of handles to request information about. - * - * @retval ::NRF_SUCCESS Successfully started an attribute information discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid connection state - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_ATTR_INFO_DISCOVER, uint32_t, sd_ble_gattc_attr_info_discover(uint16_t conn_handle, ble_gattc_handle_range_t const * p_handle_range)); - -/**@brief Start an ATT_MTU exchange by sending an Exchange MTU Request to the server. - * - * @details The SoftDevice sets ATT_MTU to the minimum of: - * - The Client RX MTU value, and - * - The Server RX MTU value from @ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP. - * - * However, the SoftDevice never sets ATT_MTU lower than @ref BLE_GATT_ATT_MTU_DEFAULT. - * - * @events - * @event{@ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_MTU_EXCHANGE} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] client_rx_mtu Client RX MTU size. - * - The minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. - * - The maximum value is @ref ble_gatt_conn_cfg_t::att_mtu in the connection configuration - used for this connection. - * - The value must be equal to Server RX MTU size given in @ref sd_ble_gatts_exchange_mtu_reply - * if an ATT_MTU exchange has already been performed in the other direction. - * - * @retval ::NRF_SUCCESS Successfully sent request to the server. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid connection state or an ATT_MTU exchange was already requested once. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid Client RX MTU size supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_EXCHANGE_MTU_REQUEST, uint32_t, sd_ble_gattc_exchange_mtu_request(uint16_t conn_handle, uint16_t client_rx_mtu)); - -/**@brief Iterate through Handle-Value(s) list in @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP event. - * - * @param[in] p_gattc_evt Pointer to event buffer containing @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP event. - * @note If the buffer contains different event, behavior is undefined. - * @param[in,out] p_iter Iterator, points to @ref ble_gattc_handle_value_t structure that will be filled in with - * the next Handle-Value pair in each iteration. If the function returns other than - * @ref NRF_SUCCESS, it will not be changed. - * - To start iteration, initialize the structure to zero. - * - To continue, pass the value from previous iteration. - * - * \code - * ble_gattc_handle_value_t iter; - * memset(&iter, 0, sizeof(ble_gattc_handle_value_t)); - * while (sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(&ble_evt.evt.gattc_evt, &iter) == NRF_SUCCESS) - * { - * app_handle = iter.handle; - * memcpy(app_value, iter.p_value, ble_evt.evt.gattc_evt.params.char_val_by_uuid_read_rsp.value_len); - * } - * \endcode - * - * @retval ::NRF_SUCCESS Successfully retrieved the next Handle-Value pair. - * @retval ::NRF_ERROR_NOT_FOUND No more Handle-Value pairs available in the list. - */ -__STATIC_INLINE uint32_t sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(ble_gattc_evt_t *p_gattc_evt, ble_gattc_handle_value_t *p_iter); - -/** @} */ - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE uint32_t sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(ble_gattc_evt_t *p_gattc_evt, ble_gattc_handle_value_t *p_iter) -{ - uint32_t value_len = p_gattc_evt->params.char_val_by_uuid_read_rsp.value_len; - uint8_t *p_first = p_gattc_evt->params.char_val_by_uuid_read_rsp.handle_value; - uint8_t *p_next = p_iter->p_value ? p_iter->p_value + value_len : p_first; - - if ((p_next - p_first) / (sizeof(uint16_t) + value_len) < p_gattc_evt->params.char_val_by_uuid_read_rsp.count) - { - p_iter->handle = (uint16_t)p_next[1] << 8 | p_next[0]; - p_iter->p_value = p_next + sizeof(uint16_t); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_NOT_FOUND; - } -} - -#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ - -#ifdef __cplusplus -} -#endif -#endif /* BLE_GATTC_H__ */ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_gatts.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_gatts.h deleted file mode 100644 index 6bb24831d87..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_gatts.h +++ /dev/null @@ -1,832 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - @addtogroup BLE_GATTS Generic Attribute Profile (GATT) Server - @{ - @brief Definitions and prototypes for the GATTS interface. - */ - -#ifndef BLE_GATTS_H__ -#define BLE_GATTS_H__ - -#include "ble_types.h" -#include "ble_ranges.h" -#include "ble_l2cap.h" -#include "ble_gap.h" -#include "ble_gatt.h" -#include "nrf_svc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_GATTS_ENUMERATIONS Enumerations - * @{ */ - -/** - * @brief GATTS API SVC numbers. - */ -enum BLE_GATTS_SVCS -{ - SD_BLE_GATTS_SERVICE_ADD = BLE_GATTS_SVC_BASE, /**< Add a service. */ - SD_BLE_GATTS_INCLUDE_ADD, /**< Add an included service. */ - SD_BLE_GATTS_CHARACTERISTIC_ADD, /**< Add a characteristic. */ - SD_BLE_GATTS_DESCRIPTOR_ADD, /**< Add a generic attribute. */ - SD_BLE_GATTS_VALUE_SET, /**< Set an attribute value. */ - SD_BLE_GATTS_VALUE_GET, /**< Get an attribute value. */ - SD_BLE_GATTS_HVX, /**< Handle Value Notification or Indication. */ - SD_BLE_GATTS_SERVICE_CHANGED, /**< Perform a Service Changed Indication to one or more peers. */ - SD_BLE_GATTS_RW_AUTHORIZE_REPLY, /**< Reply to an authorization request for a read or write operation on one or more attributes. */ - SD_BLE_GATTS_SYS_ATTR_SET, /**< Set the persistent system attributes for a connection. */ - SD_BLE_GATTS_SYS_ATTR_GET, /**< Retrieve the persistent system attributes. */ - SD_BLE_GATTS_INITIAL_USER_HANDLE_GET, /**< Retrieve the first valid user handle. */ - SD_BLE_GATTS_ATTR_GET, /**< Retrieve the UUID and/or metadata of an attribute. */ - SD_BLE_GATTS_EXCHANGE_MTU_REPLY /**< Reply to Exchange MTU Request. */ -}; - -/** - * @brief GATT Server Event IDs. - */ -enum BLE_GATTS_EVTS -{ - BLE_GATTS_EVT_WRITE = BLE_GATTS_EVT_BASE, /**< Write operation performed. \n See @ref ble_gatts_evt_write_t. */ - BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST, /**< Read/Write Authorization request. \n Reply with @ref sd_ble_gatts_rw_authorize_reply. \n See @ref ble_gatts_evt_rw_authorize_request_t. */ - BLE_GATTS_EVT_SYS_ATTR_MISSING, /**< A persistent system attribute access is pending. \n Respond with @ref sd_ble_gatts_sys_attr_set. \n See @ref ble_gatts_evt_sys_attr_missing_t. */ - BLE_GATTS_EVT_HVC, /**< Handle Value Confirmation. \n See @ref ble_gatts_evt_hvc_t. */ - BLE_GATTS_EVT_SC_CONFIRM, /**< Service Changed Confirmation. \n No additional event structure applies. */ - BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST, /**< Exchange MTU Request. \n Reply with @ref sd_ble_gatts_exchange_mtu_reply. \n See @ref ble_gatts_evt_exchange_mtu_request_t. */ - BLE_GATTS_EVT_TIMEOUT, /**< Peer failed to respond to an ATT request in time. \n See @ref ble_gatts_evt_timeout_t. */ - BLE_GATTS_EVT_HVN_TX_COMPLETE /**< Handle Value Notification transmission complete. \n See @ref ble_gatts_evt_hvn_tx_complete_t. */ -}; - -/**@brief GATTS Configuration IDs. - * - * IDs that uniquely identify a GATTS configuration. - */ -enum BLE_GATTS_CFGS -{ - BLE_GATTS_CFG_SERVICE_CHANGED = BLE_GATTS_CFG_BASE, /**< Service changed configuration. */ - BLE_GATTS_CFG_ATTR_TAB_SIZE, /**< Attribute table size configuration. */ -}; - -/** @} */ - -/** @addtogroup BLE_GATTS_DEFINES Defines - * @{ */ - -/** @defgroup BLE_ERRORS_GATTS SVC return values specific to GATTS - * @{ */ -#define BLE_ERROR_GATTS_INVALID_ATTR_TYPE (NRF_GATTS_ERR_BASE + 0x000) /**< Invalid attribute type. */ -#define BLE_ERROR_GATTS_SYS_ATTR_MISSING (NRF_GATTS_ERR_BASE + 0x001) /**< System Attributes missing. */ -/** @} */ - -/** @defgroup BLE_GATTS_ATTR_LENS_MAX Maximum attribute lengths - * @{ */ -#define BLE_GATTS_FIX_ATTR_LEN_MAX (510) /**< Maximum length for fixed length Attribute Values. */ -#define BLE_GATTS_VAR_ATTR_LEN_MAX (512) /**< Maximum length for variable length Attribute Values. */ -/** @} */ - -/** @defgroup BLE_GATTS_SRVC_TYPES GATT Server Service Types - * @{ */ -#define BLE_GATTS_SRVC_TYPE_INVALID 0x00 /**< Invalid Service Type. */ -#define BLE_GATTS_SRVC_TYPE_PRIMARY 0x01 /**< Primary Service. */ -#define BLE_GATTS_SRVC_TYPE_SECONDARY 0x02 /**< Secondary Type. */ -/** @} */ - - -/** @defgroup BLE_GATTS_ATTR_TYPES GATT Server Attribute Types - * @{ */ -#define BLE_GATTS_ATTR_TYPE_INVALID 0x00 /**< Invalid Attribute Type. */ -#define BLE_GATTS_ATTR_TYPE_PRIM_SRVC_DECL 0x01 /**< Primary Service Declaration. */ -#define BLE_GATTS_ATTR_TYPE_SEC_SRVC_DECL 0x02 /**< Secondary Service Declaration. */ -#define BLE_GATTS_ATTR_TYPE_INC_DECL 0x03 /**< Include Declaration. */ -#define BLE_GATTS_ATTR_TYPE_CHAR_DECL 0x04 /**< Characteristic Declaration. */ -#define BLE_GATTS_ATTR_TYPE_CHAR_VAL 0x05 /**< Characteristic Value. */ -#define BLE_GATTS_ATTR_TYPE_DESC 0x06 /**< Descriptor. */ -#define BLE_GATTS_ATTR_TYPE_OTHER 0x07 /**< Other, non-GATT specific type. */ -/** @} */ - - -/** @defgroup BLE_GATTS_OPS GATT Server Operations - * @{ */ -#define BLE_GATTS_OP_INVALID 0x00 /**< Invalid Operation. */ -#define BLE_GATTS_OP_WRITE_REQ 0x01 /**< Write Request. */ -#define BLE_GATTS_OP_WRITE_CMD 0x02 /**< Write Command. */ -#define BLE_GATTS_OP_SIGN_WRITE_CMD 0x03 /**< Signed Write Command. */ -#define BLE_GATTS_OP_PREP_WRITE_REQ 0x04 /**< Prepare Write Request. */ -#define BLE_GATTS_OP_EXEC_WRITE_REQ_CANCEL 0x05 /**< Execute Write Request: Cancel all prepared writes. */ -#define BLE_GATTS_OP_EXEC_WRITE_REQ_NOW 0x06 /**< Execute Write Request: Immediately execute all prepared writes. */ -/** @} */ - -/** @defgroup BLE_GATTS_VLOCS GATT Value Locations - * @{ */ -#define BLE_GATTS_VLOC_INVALID 0x00 /**< Invalid Location. */ -#define BLE_GATTS_VLOC_STACK 0x01 /**< Attribute Value is located in stack memory, no user memory is required. */ -#define BLE_GATTS_VLOC_USER 0x02 /**< Attribute Value is located in user memory. This requires the user to maintain a valid buffer through the lifetime of the attribute, since the stack - will read and write directly to the memory using the pointer provided in the APIs. There are no alignment requirements for the buffer. */ -/** @} */ - -/** @defgroup BLE_GATTS_AUTHORIZE_TYPES GATT Server Authorization Types - * @{ */ -#define BLE_GATTS_AUTHORIZE_TYPE_INVALID 0x00 /**< Invalid Type. */ -#define BLE_GATTS_AUTHORIZE_TYPE_READ 0x01 /**< Authorize a Read Operation. */ -#define BLE_GATTS_AUTHORIZE_TYPE_WRITE 0x02 /**< Authorize a Write Request Operation. */ -/** @} */ - -/** @defgroup BLE_GATTS_SYS_ATTR_FLAGS System Attribute Flags - * @{ */ -#define BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS (1 << 0) /**< Restrict system attributes to system services only. */ -#define BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS (1 << 1) /**< Restrict system attributes to user services only. */ -/** @} */ - -/** @defgroup BLE_GATTS_SERVICE_CHANGED Service Changed Inclusion Values - * @{ - */ -#define BLE_GATTS_SERVICE_CHANGED_DEFAULT (1) /**< Default is to include the Service Changed characteristic in the Attribute Table. */ -/** @} */ - -/** @defgroup BLE_GATTS_ATTR_TAB_SIZE Attribute Table size - * @{ - */ -#define BLE_GATTS_ATTR_TAB_SIZE_MIN (248) /**< Minimum Attribute Table size */ -#define BLE_GATTS_ATTR_TAB_SIZE_DEFAULT (1408) /**< Default Attribute Table size. */ -/** @} */ - -/** @defgroup BLE_GATTS_DEFAULTS GATT Server defaults - * @{ - */ -#define BLE_GATTS_HVN_TX_QUEUE_SIZE_DEFAULT 1 /**< Default number of Handle Value Notifications that can be queued for transmission. */ -/** @} */ - -/** @} */ - -/** @addtogroup BLE_GATTS_STRUCTURES Structures - * @{ */ - -/** - * @brief BLE GATTS connection configuration parameters, set with @ref sd_ble_cfg_set. - */ -typedef struct -{ - uint8_t hvn_tx_queue_size; /**< Minimum guaranteed number of Handle Value Notifications that can be queued for transmission. - The default value is @ref BLE_GATTS_HVN_TX_QUEUE_SIZE_DEFAULT */ -} ble_gatts_conn_cfg_t; - -/**@brief Attribute metadata. */ -typedef struct -{ - ble_gap_conn_sec_mode_t read_perm; /**< Read permissions. */ - ble_gap_conn_sec_mode_t write_perm; /**< Write permissions. */ - uint8_t vlen :1; /**< Variable length attribute. */ - uint8_t vloc :2; /**< Value location, see @ref BLE_GATTS_VLOCS.*/ - uint8_t rd_auth :1; /**< Read authorization and value will be requested from the application on every read operation. */ - uint8_t wr_auth :1; /**< Write authorization will be requested from the application on every Write Request operation (but not Write Command). */ -} ble_gatts_attr_md_t; - - -/**@brief GATT Attribute. */ -typedef struct -{ - ble_uuid_t const *p_uuid; /**< Pointer to the attribute UUID. */ - ble_gatts_attr_md_t const *p_attr_md; /**< Pointer to the attribute metadata structure. */ - uint16_t init_len; /**< Initial attribute value length in bytes. */ - uint16_t init_offs; /**< Initial attribute value offset in bytes. If different from zero, the first init_offs bytes of the attribute value will be left uninitialized. */ - uint16_t max_len; /**< Maximum attribute value length in bytes, see @ref BLE_GATTS_ATTR_LENS_MAX for maximum values. */ - uint8_t *p_value; /**< Pointer to the attribute data. Please note that if the @ref BLE_GATTS_VLOC_USER value location is selected in the attribute metadata, this will have to point to a buffer - that remains valid through the lifetime of the attribute. This excludes usage of automatic variables that may go out of scope or any other temporary location. - The stack may access that memory directly without the application's knowledge. For writable characteristics, this value must not be a location in flash memory.*/ -} ble_gatts_attr_t; - -/**@brief GATT Attribute Value. */ -typedef struct -{ - uint16_t len; /**< Length in bytes to be written or read. Length in bytes written or read after successful return.*/ - uint16_t offset; /**< Attribute value offset. */ - uint8_t *p_value; /**< Pointer to where value is stored or will be stored. - If value is stored in user memory, only the attribute length is updated when p_value == NULL. - Set to NULL when reading to obtain the complete length of the attribute value */ -} ble_gatts_value_t; - - -/**@brief GATT Characteristic Presentation Format. */ -typedef struct -{ - uint8_t format; /**< Format of the value, see @ref BLE_GATT_CPF_FORMATS. */ - int8_t exponent; /**< Exponent for integer data types. */ - uint16_t unit; /**< Unit from Bluetooth Assigned Numbers. */ - uint8_t name_space; /**< Namespace from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */ - uint16_t desc; /**< Namespace description from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */ -} ble_gatts_char_pf_t; - - -/**@brief GATT Characteristic metadata. */ -typedef struct -{ - ble_gatt_char_props_t char_props; /**< Characteristic Properties. */ - ble_gatt_char_ext_props_t char_ext_props; /**< Characteristic Extended Properties. */ - uint8_t const *p_char_user_desc; /**< Pointer to a UTF-8 encoded string (non-NULL terminated), NULL if the descriptor is not required. */ - uint16_t char_user_desc_max_size; /**< The maximum size in bytes of the user description descriptor. */ - uint16_t char_user_desc_size; /**< The size of the user description, must be smaller or equal to char_user_desc_max_size. */ - ble_gatts_char_pf_t const *p_char_pf; /**< Pointer to a presentation format structure or NULL if the CPF descriptor is not required. */ - ble_gatts_attr_md_t const *p_user_desc_md; /**< Attribute metadata for the User Description descriptor, or NULL for default values. */ - ble_gatts_attr_md_t const *p_cccd_md; /**< Attribute metadata for the Client Characteristic Configuration Descriptor, or NULL for default values. */ - ble_gatts_attr_md_t const *p_sccd_md; /**< Attribute metadata for the Server Characteristic Configuration Descriptor, or NULL for default values. */ -} ble_gatts_char_md_t; - - -/**@brief GATT Characteristic Definition Handles. */ -typedef struct -{ - uint16_t value_handle; /**< Handle to the characteristic value. */ - uint16_t user_desc_handle; /**< Handle to the User Description descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ - uint16_t cccd_handle; /**< Handle to the Client Characteristic Configuration Descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ - uint16_t sccd_handle; /**< Handle to the Server Characteristic Configuration Descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ -} ble_gatts_char_handles_t; - - -/**@brief GATT HVx parameters. */ -typedef struct -{ - uint16_t handle; /**< Characteristic Value Handle. */ - uint8_t type; /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */ - uint16_t offset; /**< Offset within the attribute value. */ - uint16_t *p_len; /**< Length in bytes to be written, length in bytes written after successful return. */ - uint8_t const *p_data; /**< Actual data content, use NULL to use the current attribute value. */ -} ble_gatts_hvx_params_t; - -/**@brief GATT Authorization parameters. */ -typedef struct -{ - uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ - uint8_t update : 1; /**< If set, data supplied in p_data will be used to update the attribute value. - Please note that for @ref BLE_GATTS_AUTHORIZE_TYPE_WRITE operations this bit must always be set, - as the data to be written needs to be stored and later provided by the application. */ - uint16_t offset; /**< Offset of the attribute value being updated. */ - uint16_t len; /**< Length in bytes of the value in p_data pointer, see @ref BLE_GATTS_ATTR_LENS_MAX. */ - uint8_t const *p_data; /**< Pointer to new value used to update the attribute value. */ -} ble_gatts_authorize_params_t; - -/**@brief GATT Read or Write Authorize Reply parameters. */ -typedef struct -{ - uint8_t type; /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */ - union { - ble_gatts_authorize_params_t read; /**< Read authorization parameters. */ - ble_gatts_authorize_params_t write; /**< Write authorization parameters. */ - } params; /**< Reply Parameters. */ -} ble_gatts_rw_authorize_reply_params_t; - -/**@brief Service Changed Inclusion configuration parameters, set with @ref sd_ble_cfg_set. */ -typedef struct -{ - uint8_t service_changed : 1; /**< If 1, include the Service Changed characteristic in the Attribute Table. Default is @ref BLE_GATTS_SERVICE_CHANGED_DEFAULT. */ -} ble_gatts_cfg_service_changed_t; - -/**@brief Attribute table size configuration parameters, set with @ref sd_ble_cfg_set. - * - * @retval ::NRF_ERROR_INVALID_LENGTH One or more of the following is true: - * - The specified Attribute Table size is too small. - * The minimum acceptable size is defined by @ref BLE_GATTS_ATTR_TAB_SIZE_MIN. - * - The specified Attribute Table size is not a multiple of 4. - */ -typedef struct -{ - uint32_t attr_tab_size; /**< Attribute table size. Default is @ref BLE_GATTS_ATTR_TAB_SIZE_DEFAULT, minimum is @ref BLE_GATTS_ATTR_TAB_SIZE_MIN. */ -} ble_gatts_cfg_attr_tab_size_t; - -/**@brief Config structure for GATTS configurations. */ -typedef union -{ - ble_gatts_cfg_service_changed_t service_changed; /**< Include service changed characteristic, cfg_id is @ref BLE_GATTS_CFG_SERVICE_CHANGED. */ - ble_gatts_cfg_attr_tab_size_t attr_tab_size; /**< Attribute table size, cfg_id is @ref BLE_GATTS_CFG_ATTR_TAB_SIZE. */ -} ble_gatts_cfg_t; - - -/**@brief Event structure for @ref BLE_GATTS_EVT_WRITE. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - ble_uuid_t uuid; /**< Attribute UUID. */ - uint8_t op; /**< Type of write operation, see @ref BLE_GATTS_OPS. */ - uint8_t auth_required; /**< Writing operation deferred due to authorization requirement. Application may use @ref sd_ble_gatts_value_set to finalize the writing operation. */ - uint16_t offset; /**< Offset for the write operation. */ - uint16_t len; /**< Length of the received data. */ - uint8_t data[1]; /**< Received data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gatts_evt_write_t; - -/**@brief Event substructure for authorized read requests, see @ref ble_gatts_evt_rw_authorize_request_t. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - ble_uuid_t uuid; /**< Attribute UUID. */ - uint16_t offset; /**< Offset for the read operation. */ -} ble_gatts_evt_read_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST. */ -typedef struct -{ - uint8_t type; /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */ - union { - ble_gatts_evt_read_t read; /**< Attribute Read Parameters. */ - ble_gatts_evt_write_t write; /**< Attribute Write Parameters. */ - } request; /**< Request Parameters. */ -} ble_gatts_evt_rw_authorize_request_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_SYS_ATTR_MISSING. */ -typedef struct -{ - uint8_t hint; /**< Hint (currently unused). */ -} ble_gatts_evt_sys_attr_missing_t; - - -/**@brief Event structure for @ref BLE_GATTS_EVT_HVC. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ -} ble_gatts_evt_hvc_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST. */ -typedef struct -{ - uint16_t client_rx_mtu; /**< Client RX MTU size. */ -} ble_gatts_evt_exchange_mtu_request_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_TIMEOUT. */ -typedef struct -{ - uint8_t src; /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */ -} ble_gatts_evt_timeout_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_HVN_TX_COMPLETE. */ -typedef struct -{ - uint8_t count; /**< Number of notification transmissions completed. */ -} ble_gatts_evt_hvn_tx_complete_t; - -/**@brief GATTS event structure. */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle on which the event occurred. */ - union - { - ble_gatts_evt_write_t write; /**< Write Event Parameters. */ - ble_gatts_evt_rw_authorize_request_t authorize_request; /**< Read or Write Authorize Request Parameters. */ - ble_gatts_evt_sys_attr_missing_t sys_attr_missing; /**< System attributes missing. */ - ble_gatts_evt_hvc_t hvc; /**< Handle Value Confirmation Event Parameters. */ - ble_gatts_evt_exchange_mtu_request_t exchange_mtu_request; /**< Exchange MTU Request Event Parameters. */ - ble_gatts_evt_timeout_t timeout; /**< Timeout Event. */ - ble_gatts_evt_hvn_tx_complete_t hvn_tx_complete; /**< Handle Value Notification transmission complete Event Parameters. */ - } params; /**< Event Parameters. */ -} ble_gatts_evt_t; - -/** @} */ - -/** @addtogroup BLE_GATTS_FUNCTIONS Functions - * @{ */ - -/**@brief Add a service declaration to the Attribute Table. - * - * @note Secondary Services are only relevant in the context of the entity that references them, it is therefore forbidden to - * add a secondary service declaration that is not referenced by another service later in the Attribute Table. - * - * @mscs - * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} - * @endmscs - * - * @param[in] type Toggles between primary and secondary services, see @ref BLE_GATTS_SRVC_TYPES. - * @param[in] p_uuid Pointer to service UUID. - * @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored. - * - * @retval ::NRF_SUCCESS Successfully added a service declaration. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, Vendor Specific UUIDs need to be present in the table. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - */ -SVCALL(SD_BLE_GATTS_SERVICE_ADD, uint32_t, sd_ble_gatts_service_add(uint8_t type, ble_uuid_t const *p_uuid, uint16_t *p_handle)); - - -/**@brief Add an include declaration to the Attribute Table. - * - * @note It is currently only possible to add an include declaration to the last added service (i.e. only sequential population is supported at this time). - * - * @note The included service must already be present in the Attribute Table prior to this call. - * - * @mscs - * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} - * @endmscs - * - * @param[in] service_handle Handle of the service where the included service is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. - * @param[in] inc_srvc_handle Handle of the included service. - * @param[out] p_include_handle Pointer to a 16-bit word where the assigned handle will be stored. - * - * @retval ::NRF_SUCCESS Successfully added an include declaration. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, handle values need to match previously added services. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_NOT_SUPPORTED Feature is not supported, service_handle must be that of the last added service. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, self inclusions are not allowed. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. - */ -SVCALL(SD_BLE_GATTS_INCLUDE_ADD, uint32_t, sd_ble_gatts_include_add(uint16_t service_handle, uint16_t inc_srvc_handle, uint16_t *p_include_handle)); - - -/**@brief Add a characteristic declaration, a characteristic value declaration and optional characteristic descriptor declarations to the Attribute Table. - * - * @note It is currently only possible to add a characteristic to the last added service (i.e. only sequential population is supported at this time). - * - * @note Several restrictions apply to the parameters, such as matching permissions between the user description descriptor and the writable auxiliaries bits, - * readable (no security) and writable (selectable) CCCDs and SCCDs and valid presentation format values. - * - * @note If no metadata is provided for the optional descriptors, their permissions will be derived from the characteristic permissions. - * - * @mscs - * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} - * @endmscs - * - * @param[in] service_handle Handle of the service where the characteristic is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. - * @param[in] p_char_md Characteristic metadata. - * @param[in] p_attr_char_value Pointer to the attribute structure corresponding to the characteristic value. - * @param[out] p_handles Pointer to the structure where the assigned handles will be stored. - * - * @retval ::NRF_SUCCESS Successfully added a characteristic. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, service handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a service context is required. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. - */ -SVCALL(SD_BLE_GATTS_CHARACTERISTIC_ADD, uint32_t, sd_ble_gatts_characteristic_add(uint16_t service_handle, ble_gatts_char_md_t const *p_char_md, ble_gatts_attr_t const *p_attr_char_value, ble_gatts_char_handles_t *p_handles)); - - -/**@brief Add a descriptor to the Attribute Table. - * - * @note It is currently only possible to add a descriptor to the last added characteristic (i.e. only sequential population is supported at this time). - * - * @mscs - * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} - * @endmscs - * - * @param[in] char_handle Handle of the characteristic where the descriptor is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. - * @param[in] p_attr Pointer to the attribute structure. - * @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored. - * - * @retval ::NRF_SUCCESS Successfully added a descriptor. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, characteristic handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a characteristic context is required. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. - */ -SVCALL(SD_BLE_GATTS_DESCRIPTOR_ADD, uint32_t, sd_ble_gatts_descriptor_add(uint16_t char_handle, ble_gatts_attr_t const *p_attr, uint16_t *p_handle)); - -/**@brief Set the value of a given attribute. - * - * @note Values other than system attributes can be set at any time, regardless of whether any active connections exist. - * - * @mscs - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. Ignored if the value does not belong to a system attribute. - * @param[in] handle Attribute handle. - * @param[in,out] p_value Attribute value information. - * - * @retval ::NRF_SUCCESS Successfully set the value of the attribute. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden handle supplied, certain attributes are not modifiable by the application. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied on a system attribute. - */ -SVCALL(SD_BLE_GATTS_VALUE_SET, uint32_t, sd_ble_gatts_value_set(uint16_t conn_handle, uint16_t handle, ble_gatts_value_t *p_value)); - -/**@brief Get the value of a given attribute. - * - * @note If the attribute value is longer than the size of the supplied buffer, - * p_len will return the total attribute value length (excluding offset), - * and not the number of bytes actually returned in p_data. - * The application may use this information to allocate a suitable buffer size. - * - * @note When retrieving system attribute values with this function, the connection handle - * may refer to an already disconnected connection. Refer to the documentation of - * @ref sd_ble_gatts_sys_attr_get for further information. - * - * @param[in] conn_handle Connection handle. Ignored if the value does not belong to a system attribute. - * @param[in] handle Attribute handle. - * @param[in,out] p_value Attribute value information. - * - * @retval ::NRF_SUCCESS Successfully retrieved the value of the attribute. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid attribute offset supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied on a system attribute. - * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. - */ -SVCALL(SD_BLE_GATTS_VALUE_GET, uint32_t, sd_ble_gatts_value_get(uint16_t conn_handle, uint16_t handle, ble_gatts_value_t *p_value)); - -/**@brief Notify or Indicate an attribute value. - * - * @details This function checks for the relevant Client Characteristic Configuration descriptor value to verify that the relevant operation - * (notification or indication) has been enabled by the client. It is also able to update the attribute value before issuing the PDU, so that - * the application can atomically perform a value update and a server initiated transaction with a single API call. - * - * @note The local attribute value may be updated even if an outgoing packet is not sent to the peer due to an error during execution. - * The Attribute Table has been updated if one of the following error codes is returned: @ref NRF_ERROR_INVALID_STATE, @ref NRF_ERROR_BUSY, - * @ref NRF_ERROR_FORBIDDEN, @ref BLE_ERROR_GATTS_SYS_ATTR_MISSING and @ref NRF_ERROR_RESOURCES. - * The caller can check whether the value has been updated by looking at the contents of *(p_hvx_params->p_len). - * - * @note Only one indication procedure can be ongoing per connection at a time. - * If the application tries to indicate an attribute value while another indication procedure is ongoing, - * the function call will return @ref NRF_ERROR_BUSY. - * A @ref BLE_GATTS_EVT_HVC event will be issued as soon as the confirmation arrives from the peer. - * - * @note The number of Handle Value Notifications that can be queued is configured by @ref ble_gatts_conn_cfg_t::hvn_tx_queue_size - * When the queue is full, the function call will return @ref NRF_ERROR_RESOURCES. - * A @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event will be issued as soon as the transmission of the notification is complete. - * - * @note The application can keep track of the available queue element count for notifications by following the procedure below: - * - Store initial queue element count in a variable. - * - Decrement the variable, which stores the currently available queue element count, by one when a call to this function returns @ref NRF_SUCCESS. - * - Increment the variable, which stores the current available queue element count, by the count variable in @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event. - * - * @events - * @event{@ref BLE_GATTS_EVT_HVN_TX_COMPLETE, Notification transmission complete.} - * @event{@ref BLE_GATTS_EVT_HVC, Confirmation received from the peer.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC} - * @mmsc{@ref BLE_GATTS_HVN_MSC} - * @mmsc{@ref BLE_GATTS_HVI_MSC} - * @mmsc{@ref BLE_GATTS_HVX_DISABLED_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_hvx_params Pointer to an HVx parameters structure. If the p_data member contains a non-NULL pointer the attribute value will be updated with - * the contents pointed by it before sending the notification or indication. - * - * @retval ::NRF_SUCCESS Successfully queued a notification or indication for transmission, and optionally updated the attribute value. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE One or more of the following is true: - * - Invalid Connection State - * - Notifications and/or indications not enabled in the CCCD - * - An ATT_MTU exchange is ongoing - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied. Only attributes added directly by the application are available to notify and indicate. - * @retval ::BLE_ERROR_GATTS_INVALID_ATTR_TYPE Invalid attribute type(s) supplied, only characteristic values may be notified and indicated. - * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. - * @retval ::NRF_ERROR_FORBIDDEN The connection's current security level is lower than the one required by the write permissions of the CCCD associated with this characteristic. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. - * @retval ::NRF_ERROR_BUSY For @ref BLE_GATT_HVX_INDICATION Procedure already in progress. Wait for a @ref BLE_GATTS_EVT_HVC event and retry. - * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. - * @retval ::NRF_ERROR_RESOURCES Too many notifications queued. - * Wait for a @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event and retry. - */ -SVCALL(SD_BLE_GATTS_HVX, uint32_t, sd_ble_gatts_hvx(uint16_t conn_handle, ble_gatts_hvx_params_t const *p_hvx_params)); - -/**@brief Indicate the Service Changed attribute value. - * - * @details This call will send a Handle Value Indication to one or more peers connected to inform them that the Attribute - * Table layout has changed. As soon as the peer has confirmed the indication, a @ref BLE_GATTS_EVT_SC_CONFIRM event will - * be issued. - * - * @note Some of the restrictions and limitations that apply to @ref sd_ble_gatts_hvx also apply here. - * - * @events - * @event{@ref BLE_GATTS_EVT_SC_CONFIRM, Confirmation of attribute table change received from peer.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTS_SC_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] start_handle Start of affected attribute handle range. - * @param[in] end_handle End of affected attribute handle range. - * - * @retval ::NRF_SUCCESS Successfully queued the Service Changed indication for transmission. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_NOT_SUPPORTED Service Changed not enabled at initialization. See @ref - * sd_ble_cfg_set and @ref ble_gatts_cfg_service_changed_t. - * @retval ::NRF_ERROR_INVALID_STATE One or more of the following is true: - * - Invalid Connection State - * - Notifications and/or indications not enabled in the CCCD - * - An ATT_MTU exchange is ongoing - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied, handles must be in the range populated by the application. - * @retval ::NRF_ERROR_BUSY Procedure already in progress. - * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. - */ -SVCALL(SD_BLE_GATTS_SERVICE_CHANGED, uint32_t, sd_ble_gatts_service_changed(uint16_t conn_handle, uint16_t start_handle, uint16_t end_handle)); - -/**@brief Respond to a Read/Write authorization request. - * - * @note This call should only be used as a response to a @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST event issued to the application. - * - * @mscs - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} - * @mmsc{@ref BLE_GATTS_READ_REQ_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_WRITE_REQ_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_PEER_CANCEL_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_rw_authorize_reply_params Pointer to a structure with the attribute provided by the application. - * - * @note @ref ble_gatts_authorize_params_t::p_data is ignored when this function is used to respond - * to a @ref BLE_GATTS_AUTHORIZE_TYPE_READ event if @ref ble_gatts_authorize_params_t::update - * is set to 0. - * - * @retval ::NRF_SUCCESS Successfully queued a response to the peer, and in the case of a write operation, Attribute Table updated. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no authorization request pending. - * @retval ::NRF_ERROR_INVALID_PARAM Authorization op invalid, - * handle supplied does not match requested handle, - * or invalid data to be written provided by the application. - */ -SVCALL(SD_BLE_GATTS_RW_AUTHORIZE_REPLY, uint32_t, sd_ble_gatts_rw_authorize_reply(uint16_t conn_handle, ble_gatts_rw_authorize_reply_params_t const *p_rw_authorize_reply_params)); - - -/**@brief Update persistent system attribute information. - * - * @details Supply information about persistent system attributes to the stack, - * previously obtained using @ref sd_ble_gatts_sys_attr_get. - * This call is only allowed for active connections, and is usually - * made immediately after a connection is established with an known bonded device, - * often as a response to a @ref BLE_GATTS_EVT_SYS_ATTR_MISSING. - * - * p_sysattrs may point directly to the application's stored copy of the system attributes - * obtained using @ref sd_ble_gatts_sys_attr_get. - * If the pointer is NULL, the system attribute info is initialized, assuming that - * the application does not have any previously saved system attribute data for this device. - * - * @note The state of persistent system attributes is reset upon connection establishment and then remembered for its duration. - * - * @note If this call returns with an error code different from @ref NRF_SUCCESS, the storage of persistent system attributes may have been completed only partially. - * This means that the state of the attribute table is undefined, and the application should either provide a new set of attributes using this same call or - * reset the SoftDevice to return to a known state. - * - * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS is used with this function, only the system attributes included in system services will be modified. - * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS is used with this function, only the system attributes included in user services will be modified. - * - * @mscs - * @mmsc{@ref BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC} - * @mmsc{@ref BLE_GATTS_SYS_ATTRS_UNK_PEER_MSC} - * @mmsc{@ref BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_sys_attr_data Pointer to a saved copy of system attributes supplied to the stack, or NULL. - * @param[in] len Size of data pointed by p_sys_attr_data, in octets. - * @param[in] flags Optional additional flags, see @ref BLE_GATTS_SYS_ATTR_FLAGS - * - * @retval ::NRF_SUCCESS Successfully set the system attribute information. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid flags supplied. - * @retval ::NRF_ERROR_INVALID_DATA Invalid data supplied, the data should be exactly the same as retrieved with @ref sd_ble_gatts_sys_attr_get. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - */ -SVCALL(SD_BLE_GATTS_SYS_ATTR_SET, uint32_t, sd_ble_gatts_sys_attr_set(uint16_t conn_handle, uint8_t const *p_sys_attr_data, uint16_t len, uint32_t flags)); - - -/**@brief Retrieve persistent system attribute information from the stack. - * - * @details This call is used to retrieve information about values to be stored persistently by the application - * during the lifetime of a connection or after it has been terminated. When a new connection is established with the same bonded device, - * the system attribute information retrieved with this function should be restored using using @ref sd_ble_gatts_sys_attr_set. - * If retrieved after disconnection, the data should be read before a new connection established. The connection handle for - * the previous, now disconnected, connection will remain valid until a new one is created to allow this API call to refer to it. - * Connection handles belonging to active connections can be used as well, but care should be taken since the system attributes - * may be written to at any time by the peer during a connection's lifetime. - * - * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS is used with this function, only the system attributes included in system services will be returned. - * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS is used with this function, only the system attributes included in user services will be returned. - * - * @mscs - * @mmsc{@ref BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle of the recently terminated connection. - * @param[out] p_sys_attr_data Pointer to a buffer where updated information about system attributes will be filled in. The format of the data is described - * in @ref BLE_GATTS_SYS_ATTRS_FORMAT. NULL can be provided to obtain the length of the data. - * @param[in,out] p_len Size of application buffer if p_sys_attr_data is not NULL. Unconditionally updated to actual length of system attribute data. - * @param[in] flags Optional additional flags, see @ref BLE_GATTS_SYS_ATTR_FLAGS - * - * @retval ::NRF_SUCCESS Successfully retrieved the system attribute information. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid flags supplied. - * @retval ::NRF_ERROR_DATA_SIZE The system attribute information did not fit into the provided buffer. - * @retval ::NRF_ERROR_NOT_FOUND No system attributes found. - */ -SVCALL(SD_BLE_GATTS_SYS_ATTR_GET, uint32_t, sd_ble_gatts_sys_attr_get(uint16_t conn_handle, uint8_t *p_sys_attr_data, uint16_t *p_len, uint32_t flags)); - - -/**@brief Retrieve the first valid user attribute handle. - * - * @param[out] p_handle Pointer to an integer where the handle will be stored. - * - * @retval ::NRF_SUCCESS Successfully retrieved the handle. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - */ -SVCALL(SD_BLE_GATTS_INITIAL_USER_HANDLE_GET, uint32_t, sd_ble_gatts_initial_user_handle_get(uint16_t *p_handle)); - -/**@brief Retrieve the attribute UUID and/or metadata. - * - * @param[in] handle Attribute handle - * @param[out] p_uuid UUID of the attribute. Use NULL to omit this field. - * @param[out] p_md Metadata of the attribute. Use NULL to omit this field. - * - * @retval ::NRF_SUCCESS Successfully retrieved the attribute metadata, - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameters supplied. Returned when both @c p_uuid and @c p_md are NULL. - * @retval ::NRF_ERROR_NOT_FOUND Attribute was not found. - */ -SVCALL(SD_BLE_GATTS_ATTR_GET, uint32_t, sd_ble_gatts_attr_get(uint16_t handle, ble_uuid_t * p_uuid, ble_gatts_attr_md_t * p_md)); - -/**@brief Reply to an ATT_MTU exchange request by sending an Exchange MTU Response to the client. - * - * @details This function is only used to reply to a @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST event. - * - * @details The SoftDevice sets ATT_MTU to the minimum of: - * - The Client RX MTU value from @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST, and - * - The Server RX MTU value. - * - * However, the SoftDevice never sets ATT_MTU lower than @ref BLE_GATT_ATT_MTU_DEFAULT. - * - * @mscs - * @mmsc{@ref BLE_GATTS_MTU_EXCHANGE} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] server_rx_mtu Server RX MTU size. - * - The minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. - * - The maximum value is @ref ble_gatt_conn_cfg_t::att_mtu in the connection configuration - used for this connection. - * - The value must be equal to Client RX MTU size given in @ref sd_ble_gattc_exchange_mtu_request - * if an ATT_MTU exchange has already been performed in the other direction. - * - * @retval ::NRF_SUCCESS Successfully sent response to the client. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no ATT_MTU exchange request pending. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid Server RX MTU size supplied. - */ -SVCALL(SD_BLE_GATTS_EXCHANGE_MTU_REPLY, uint32_t, sd_ble_gatts_exchange_mtu_reply(uint16_t conn_handle, uint16_t server_rx_mtu)); -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // BLE_GATTS_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_hci.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_hci.h deleted file mode 100644 index 21293e8efcc..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_hci.h +++ /dev/null @@ -1,131 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - @addtogroup BLE_COMMON - @{ -*/ - - -#ifndef BLE_HCI_H__ -#define BLE_HCI_H__ -#ifdef __cplusplus -extern "C" { -#endif - -/** @defgroup BLE_HCI_STATUS_CODES Bluetooth status codes - * @{ */ - -#define BLE_HCI_STATUS_CODE_SUCCESS 0x00 /**< Success. */ -#define BLE_HCI_STATUS_CODE_UNKNOWN_BTLE_COMMAND 0x01 /**< Unknown BLE Command. */ -#define BLE_HCI_STATUS_CODE_UNKNOWN_CONNECTION_IDENTIFIER 0x02 /**< Unknown Connection Identifier. */ -/*0x03 Hardware Failure -0x04 Page Timeout -*/ -#define BLE_HCI_AUTHENTICATION_FAILURE 0x05 /**< Authentication Failure. */ -#define BLE_HCI_STATUS_CODE_PIN_OR_KEY_MISSING 0x06 /**< Pin or Key missing. */ -#define BLE_HCI_MEMORY_CAPACITY_EXCEEDED 0x07 /**< Memory Capacity Exceeded. */ -#define BLE_HCI_CONNECTION_TIMEOUT 0x08 /**< Connection Timeout. */ -/*0x09 Connection Limit Exceeded -0x0A Synchronous Connection Limit To A Device Exceeded -0x0B ACL Connection Already Exists*/ -#define BLE_HCI_STATUS_CODE_COMMAND_DISALLOWED 0x0C /**< Command Disallowed. */ -/*0x0D Connection Rejected due to Limited Resources -0x0E Connection Rejected Due To Security Reasons -0x0F Connection Rejected due to Unacceptable BD_ADDR -0x10 Connection Accept Timeout Exceeded -0x11 Unsupported Feature or Parameter Value*/ -#define BLE_HCI_STATUS_CODE_INVALID_BTLE_COMMAND_PARAMETERS 0x12 /**< Invalid BLE Command Parameters. */ -#define BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION 0x13 /**< Remote User Terminated Connection. */ -#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_LOW_RESOURCES 0x14 /**< Remote Device Terminated Connection due to low resources.*/ -#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_POWER_OFF 0x15 /**< Remote Device Terminated Connection due to power off. */ -#define BLE_HCI_LOCAL_HOST_TERMINATED_CONNECTION 0x16 /**< Local Host Terminated Connection. */ -/* -0x17 Repeated Attempts -0x18 Pairing Not Allowed -0x19 Unknown LMP PDU -*/ -#define BLE_HCI_UNSUPPORTED_REMOTE_FEATURE 0x1A /**< Unsupported Remote Feature. */ -/* -0x1B SCO Offset Rejected -0x1C SCO Interval Rejected -0x1D SCO Air Mode Rejected*/ -#define BLE_HCI_STATUS_CODE_INVALID_LMP_PARAMETERS 0x1E /**< Invalid LMP Parameters. */ -#define BLE_HCI_STATUS_CODE_UNSPECIFIED_ERROR 0x1F /**< Unspecified Error. */ -/*0x20 Unsupported LMP Parameter Value -0x21 Role Change Not Allowed -*/ -#define BLE_HCI_STATUS_CODE_LMP_RESPONSE_TIMEOUT 0x22 /**< LMP Response Timeout. */ -#define BLE_HCI_STATUS_CODE_LMP_ERROR_TRANSACTION_COLLISION 0x23 /**< LMP Error Transaction Collision/LL Procedure Collision. */ -#define BLE_HCI_STATUS_CODE_LMP_PDU_NOT_ALLOWED 0x24 /**< LMP PDU Not Allowed. */ -/*0x25 Encryption Mode Not Acceptable -0x26 Link Key Can Not be Changed -0x27 Requested QoS Not Supported -*/ -#define BLE_HCI_INSTANT_PASSED 0x28 /**< Instant Passed. */ -#define BLE_HCI_PAIRING_WITH_UNIT_KEY_UNSUPPORTED 0x29 /**< Pairing with Unit Key Unsupported. */ -#define BLE_HCI_DIFFERENT_TRANSACTION_COLLISION 0x2A /**< Different Transaction Collision. */ -/* -0x2B Reserved -0x2C QoS Unacceptable Parameter -0x2D QoS Rejected -0x2E Channel Classification Not Supported -0x2F Insufficient Security -0x30 Parameter Out Of Mandatory Range -0x31 Reserved -0x32 Role Switch Pending -0x33 Reserved -0x34 Reserved Slot Violation -0x35 Role Switch Failed -0x36 Extended Inquiry Response Too Large -0x37 Secure Simple Pairing Not Supported By Host. -0x38 Host Busy - Pairing -0x39 Connection Rejected due to No Suitable Channel Found*/ -#define BLE_HCI_CONTROLLER_BUSY 0x3A /**< Controller Busy. */ -#define BLE_HCI_CONN_INTERVAL_UNACCEPTABLE 0x3B /**< Connection Interval Unacceptable. */ -#define BLE_HCI_DIRECTED_ADVERTISER_TIMEOUT 0x3C /**< Directed Advertisement Timeout. */ -#define BLE_HCI_CONN_TERMINATED_DUE_TO_MIC_FAILURE 0x3D /**< Connection Terminated due to MIC Failure. */ -#define BLE_HCI_CONN_FAILED_TO_BE_ESTABLISHED 0x3E /**< Connection Failed to be Established. */ - -/** @} */ - - -#ifdef __cplusplus -} -#endif -#endif // BLE_HCI_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_l2cap.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_l2cap.h deleted file mode 100644 index 90cce565d8e..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_l2cap.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - @addtogroup BLE_L2CAP Logical Link Control and Adaptation Protocol (L2CAP) - @{ - @brief Definitions and prototypes for the L2CAP interface. - */ - -#ifndef BLE_L2CAP_H__ -#define BLE_L2CAP_H__ - -#include "ble_types.h" -#include "ble_ranges.h" -#include "ble_err.h" -#include "nrf_svc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@addtogroup BLE_L2CAP_DEFINES Defines - * @{ */ - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // BLE_L2CAP_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_ranges.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_ranges.h deleted file mode 100644 index f9c6af76b80..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_ranges.h +++ /dev/null @@ -1,154 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - @addtogroup BLE_COMMON - @{ - @defgroup ble_ranges Module specific SVC, event and option number subranges - @{ - - @brief Definition of SVC, event and option number subranges for each API module. - - @note - SVCs, event and option numbers are split into subranges for each API module. - Each module receives its entire allocated range of SVC calls, whether implemented or not, - but return BLE_ERROR_NOT_SUPPORTED for unimplemented or undefined calls in its range. - - Note that the symbols BLE__SVC_LAST is the end of the allocated SVC range, - rather than the last SVC function call actually defined and implemented. - - Specific SVC, event and option values are defined in each module's ble_.h file, - which defines names of each individual SVC code based on the range start value. -*/ - -#ifndef BLE_RANGES_H__ -#define BLE_RANGES_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#define BLE_SVC_BASE 0x60 /**< Common BLE SVC base. */ -#define BLE_SVC_LAST 0x6B /**< Common BLE SVC last. */ - -#define BLE_GAP_SVC_BASE 0x6C /**< GAP BLE SVC base. */ -#define BLE_GAP_SVC_LAST 0x93 /**< GAP BLE SVC last. */ - -#define BLE_GATTC_SVC_BASE 0x94 /**< GATTC BLE SVC base. */ -#define BLE_GATTC_SVC_LAST 0x9F /**< GATTC BLE SVC last. */ - -#define BLE_GATTS_SVC_BASE 0xA0 /**< GATTS BLE SVC base. */ -#define BLE_GATTS_SVC_LAST 0xAF /**< GATTS BLE SVC last. */ - -#define BLE_L2CAP_SVC_BASE 0xB0 /**< L2CAP BLE SVC base. */ -#define BLE_L2CAP_SVC_LAST 0xBF /**< L2CAP BLE SVC last. */ - - -#define BLE_EVT_INVALID 0x00 /**< Invalid BLE Event. */ - -#define BLE_EVT_BASE 0x01 /**< Common BLE Event base. */ -#define BLE_EVT_LAST 0x0F /**< Common BLE Event last. */ - -#define BLE_GAP_EVT_BASE 0x10 /**< GAP BLE Event base. */ -#define BLE_GAP_EVT_LAST 0x2F /**< GAP BLE Event last. */ - -#define BLE_GATTC_EVT_BASE 0x30 /**< GATTC BLE Event base. */ -#define BLE_GATTC_EVT_LAST 0x4F /**< GATTC BLE Event last. */ - -#define BLE_GATTS_EVT_BASE 0x50 /**< GATTS BLE Event base. */ -#define BLE_GATTS_EVT_LAST 0x6F /**< GATTS BLE Event last. */ - -#define BLE_L2CAP_EVT_BASE 0x70 /**< L2CAP BLE Event base. */ -#define BLE_L2CAP_EVT_LAST 0x8F /**< L2CAP BLE Event last. */ - - -#define BLE_OPT_INVALID 0x00 /**< Invalid BLE Option. */ - -#define BLE_OPT_BASE 0x01 /**< Common BLE Option base. */ -#define BLE_OPT_LAST 0x1F /**< Common BLE Option last. */ - -#define BLE_GAP_OPT_BASE 0x20 /**< GAP BLE Option base. */ -#define BLE_GAP_OPT_LAST 0x3F /**< GAP BLE Option last. */ - -#define BLE_GATT_OPT_BASE 0x40 /**< GATT BLE Option base. */ -#define BLE_GATT_OPT_LAST 0x5F /**< GATT BLE Option last. */ - -#define BLE_GATTC_OPT_BASE 0x60 /**< GATTC BLE Option base. */ -#define BLE_GATTC_OPT_LAST 0x7F /**< GATTC BLE Option last. */ - -#define BLE_GATTS_OPT_BASE 0x80 /**< GATTS BLE Option base. */ -#define BLE_GATTS_OPT_LAST 0x9F /**< GATTS BLE Option last. */ - -#define BLE_L2CAP_OPT_BASE 0xA0 /**< L2CAP BLE Option base. */ -#define BLE_L2CAP_OPT_LAST 0xBF /**< L2CAP BLE Option last. */ - - -#define BLE_CFG_INVALID 0x00 /**< Invalid BLE configuration. */ - -#define BLE_CFG_BASE 0x01 /**< Common BLE configuration base. */ -#define BLE_CFG_LAST 0x1F /**< Common BLE configuration last. */ - -#define BLE_CONN_CFG_BASE 0x20 /**< BLE connection configuration base. */ -#define BLE_CONN_CFG_LAST 0x3F /**< BLE connection configuration last. */ - -#define BLE_GAP_CFG_BASE 0x40 /**< GAP BLE configuration base. */ -#define BLE_GAP_CFG_LAST 0x5F /**< GAP BLE configuration last. */ - -#define BLE_GATT_CFG_BASE 0x60 /**< GATT BLE configuration base. */ -#define BLE_GATT_CFG_LAST 0x7F /**< GATT BLE configuration last. */ - -#define BLE_GATTC_CFG_BASE 0x80 /**< GATTC BLE configuration base. */ -#define BLE_GATTC_CFG_LAST 0x9F /**< GATTC BLE configuration last. */ - -#define BLE_GATTS_CFG_BASE 0xA0 /**< GATTS BLE configuration base. */ -#define BLE_GATTS_CFG_LAST 0xBF /**< GATTS BLE configuration last. */ - -#define BLE_L2CAP_CFG_BASE 0xC0 /**< L2CAP BLE configuration base. */ -#define BLE_L2CAP_CFG_LAST 0xDF /**< L2CAP BLE configuration last. */ - - - - - -#ifdef __cplusplus -} -#endif -#endif /* BLE_RANGES_H__ */ - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_types.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_types.h deleted file mode 100644 index e24be0b5749..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/ble_types.h +++ /dev/null @@ -1,205 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - @addtogroup BLE_COMMON - @{ - @defgroup ble_types Common types and macro definitions - @{ - - @brief Common types and macro definitions for the BLE SoftDevice. - */ - -#ifndef BLE_TYPES_H__ -#define BLE_TYPES_H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_TYPES_DEFINES Defines - * @{ */ - -/** @defgroup BLE_CONN_HANDLES BLE Connection Handles - * @{ */ -#define BLE_CONN_HANDLE_INVALID 0xFFFF /**< Invalid Connection Handle. */ -#define BLE_CONN_HANDLE_ALL 0xFFFE /**< Applies to all Connection Handles. */ -/** @} */ - - -/** @defgroup BLE_UUID_VALUES Assigned Values for BLE UUIDs - * @{ */ -/* Generic UUIDs, applicable to all services */ -#define BLE_UUID_UNKNOWN 0x0000 /**< Reserved UUID. */ -#define BLE_UUID_SERVICE_PRIMARY 0x2800 /**< Primary Service. */ -#define BLE_UUID_SERVICE_SECONDARY 0x2801 /**< Secondary Service. */ -#define BLE_UUID_SERVICE_INCLUDE 0x2802 /**< Include. */ -#define BLE_UUID_CHARACTERISTIC 0x2803 /**< Characteristic. */ -#define BLE_UUID_DESCRIPTOR_CHAR_EXT_PROP 0x2900 /**< Characteristic Extended Properties Descriptor. */ -#define BLE_UUID_DESCRIPTOR_CHAR_USER_DESC 0x2901 /**< Characteristic User Description Descriptor. */ -#define BLE_UUID_DESCRIPTOR_CLIENT_CHAR_CONFIG 0x2902 /**< Client Characteristic Configuration Descriptor. */ -#define BLE_UUID_DESCRIPTOR_SERVER_CHAR_CONFIG 0x2903 /**< Server Characteristic Configuration Descriptor. */ -#define BLE_UUID_DESCRIPTOR_CHAR_PRESENTATION_FORMAT 0x2904 /**< Characteristic Presentation Format Descriptor. */ -#define BLE_UUID_DESCRIPTOR_CHAR_AGGREGATE_FORMAT 0x2905 /**< Characteristic Aggregate Format Descriptor. */ -/* GATT specific UUIDs */ -#define BLE_UUID_GATT 0x1801 /**< Generic Attribute Profile. */ -#define BLE_UUID_GATT_CHARACTERISTIC_SERVICE_CHANGED 0x2A05 /**< Service Changed Characteristic. */ -/* GAP specific UUIDs */ -#define BLE_UUID_GAP 0x1800 /**< Generic Access Profile. */ -#define BLE_UUID_GAP_CHARACTERISTIC_DEVICE_NAME 0x2A00 /**< Device Name Characteristic. */ -#define BLE_UUID_GAP_CHARACTERISTIC_APPEARANCE 0x2A01 /**< Appearance Characteristic. */ -#define BLE_UUID_GAP_CHARACTERISTIC_RECONN_ADDR 0x2A03 /**< Reconnection Address Characteristic. */ -#define BLE_UUID_GAP_CHARACTERISTIC_PPCP 0x2A04 /**< Peripheral Preferred Connection Parameters Characteristic. */ -#define BLE_UUID_GAP_CHARACTERISTIC_CAR 0x2AA6 /**< Central Address Resolution Characteristic. */ -/** @} */ - - -/** @defgroup BLE_UUID_TYPES Types of UUID - * @{ */ -#define BLE_UUID_TYPE_UNKNOWN 0x00 /**< Invalid UUID type. */ -#define BLE_UUID_TYPE_BLE 0x01 /**< Bluetooth SIG UUID (16-bit). */ -#define BLE_UUID_TYPE_VENDOR_BEGIN 0x02 /**< Vendor UUID types start at this index (128-bit). */ -/** @} */ - - -/** @defgroup BLE_APPEARANCES Bluetooth Appearance values - * @note Retrieved from http://developer.bluetooth.org/gatt/characteristics/Pages/CharacteristicViewer.aspx?u=org.bluetooth.characteristic.gap.appearance.xml - * @{ */ -#define BLE_APPEARANCE_UNKNOWN 0 /**< Unknown. */ -#define BLE_APPEARANCE_GENERIC_PHONE 64 /**< Generic Phone. */ -#define BLE_APPEARANCE_GENERIC_COMPUTER 128 /**< Generic Computer. */ -#define BLE_APPEARANCE_GENERIC_WATCH 192 /**< Generic Watch. */ -#define BLE_APPEARANCE_WATCH_SPORTS_WATCH 193 /**< Watch: Sports Watch. */ -#define BLE_APPEARANCE_GENERIC_CLOCK 256 /**< Generic Clock. */ -#define BLE_APPEARANCE_GENERIC_DISPLAY 320 /**< Generic Display. */ -#define BLE_APPEARANCE_GENERIC_REMOTE_CONTROL 384 /**< Generic Remote Control. */ -#define BLE_APPEARANCE_GENERIC_EYE_GLASSES 448 /**< Generic Eye-glasses. */ -#define BLE_APPEARANCE_GENERIC_TAG 512 /**< Generic Tag. */ -#define BLE_APPEARANCE_GENERIC_KEYRING 576 /**< Generic Keyring. */ -#define BLE_APPEARANCE_GENERIC_MEDIA_PLAYER 640 /**< Generic Media Player. */ -#define BLE_APPEARANCE_GENERIC_BARCODE_SCANNER 704 /**< Generic Barcode Scanner. */ -#define BLE_APPEARANCE_GENERIC_THERMOMETER 768 /**< Generic Thermometer. */ -#define BLE_APPEARANCE_THERMOMETER_EAR 769 /**< Thermometer: Ear. */ -#define BLE_APPEARANCE_GENERIC_HEART_RATE_SENSOR 832 /**< Generic Heart rate Sensor. */ -#define BLE_APPEARANCE_HEART_RATE_SENSOR_HEART_RATE_BELT 833 /**< Heart Rate Sensor: Heart Rate Belt. */ -#define BLE_APPEARANCE_GENERIC_BLOOD_PRESSURE 896 /**< Generic Blood Pressure. */ -#define BLE_APPEARANCE_BLOOD_PRESSURE_ARM 897 /**< Blood Pressure: Arm. */ -#define BLE_APPEARANCE_BLOOD_PRESSURE_WRIST 898 /**< Blood Pressure: Wrist. */ -#define BLE_APPEARANCE_GENERIC_HID 960 /**< Human Interface Device (HID). */ -#define BLE_APPEARANCE_HID_KEYBOARD 961 /**< Keyboard (HID Subtype). */ -#define BLE_APPEARANCE_HID_MOUSE 962 /**< Mouse (HID Subtype). */ -#define BLE_APPEARANCE_HID_JOYSTICK 963 /**< Joystick (HID Subtype). */ -#define BLE_APPEARANCE_HID_GAMEPAD 964 /**< Gamepad (HID Subtype). */ -#define BLE_APPEARANCE_HID_DIGITIZERSUBTYPE 965 /**< Digitizer Tablet (HID Subtype). */ -#define BLE_APPEARANCE_HID_CARD_READER 966 /**< Card Reader (HID Subtype). */ -#define BLE_APPEARANCE_HID_DIGITAL_PEN 967 /**< Digital Pen (HID Subtype). */ -#define BLE_APPEARANCE_HID_BARCODE 968 /**< Barcode Scanner (HID Subtype). */ -#define BLE_APPEARANCE_GENERIC_GLUCOSE_METER 1024 /**< Generic Glucose Meter. */ -#define BLE_APPEARANCE_GENERIC_RUNNING_WALKING_SENSOR 1088 /**< Generic Running Walking Sensor. */ -#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_IN_SHOE 1089 /**< Running Walking Sensor: In-Shoe. */ -#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_SHOE 1090 /**< Running Walking Sensor: On-Shoe. */ -#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_HIP 1091 /**< Running Walking Sensor: On-Hip. */ -#define BLE_APPEARANCE_GENERIC_CYCLING 1152 /**< Generic Cycling. */ -#define BLE_APPEARANCE_CYCLING_CYCLING_COMPUTER 1153 /**< Cycling: Cycling Computer. */ -#define BLE_APPEARANCE_CYCLING_SPEED_SENSOR 1154 /**< Cycling: Speed Sensor. */ -#define BLE_APPEARANCE_CYCLING_CADENCE_SENSOR 1155 /**< Cycling: Cadence Sensor. */ -#define BLE_APPEARANCE_CYCLING_POWER_SENSOR 1156 /**< Cycling: Power Sensor. */ -#define BLE_APPEARANCE_CYCLING_SPEED_CADENCE_SENSOR 1157 /**< Cycling: Speed and Cadence Sensor. */ -#define BLE_APPEARANCE_GENERIC_PULSE_OXIMETER 3136 /**< Generic Pulse Oximeter. */ -#define BLE_APPEARANCE_PULSE_OXIMETER_FINGERTIP 3137 /**< Fingertip (Pulse Oximeter subtype). */ -#define BLE_APPEARANCE_PULSE_OXIMETER_WRIST_WORN 3138 /**< Wrist Worn(Pulse Oximeter subtype). */ -#define BLE_APPEARANCE_GENERIC_WEIGHT_SCALE 3200 /**< Generic Weight Scale. */ -#define BLE_APPEARANCE_GENERIC_OUTDOOR_SPORTS_ACT 5184 /**< Generic Outdoor Sports Activity. */ -#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_DISP 5185 /**< Location Display Device (Outdoor Sports Activity subtype). */ -#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_DISP 5186 /**< Location and Navigation Display Device (Outdoor Sports Activity subtype). */ -#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_POD 5187 /**< Location Pod (Outdoor Sports Activity subtype). */ -#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_POD 5188 /**< Location and Navigation Pod (Outdoor Sports Activity subtype). */ -/** @} */ - -/** @brief Set .type and .uuid fields of ble_uuid_struct to specified UUID value. */ -#define BLE_UUID_BLE_ASSIGN(instance, value) do {\ - instance.type = BLE_UUID_TYPE_BLE; \ - instance.uuid = value;} while(0) - -/** @brief Copy type and uuid members from src to dst ble_uuid_t pointer. Both pointers must be valid/non-null. */ -#define BLE_UUID_COPY_PTR(dst, src) do {\ - (dst)->type = (src)->type; \ - (dst)->uuid = (src)->uuid;} while(0) - -/** @brief Copy type and uuid members from src to dst ble_uuid_t struct. */ -#define BLE_UUID_COPY_INST(dst, src) do {\ - (dst).type = (src).type; \ - (dst).uuid = (src).uuid;} while(0) - -/** @brief Compare for equality both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */ -#define BLE_UUID_EQ(p_uuid1, p_uuid2) \ - (((p_uuid1)->type == (p_uuid2)->type) && ((p_uuid1)->uuid == (p_uuid2)->uuid)) - -/** @brief Compare for difference both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */ -#define BLE_UUID_NEQ(p_uuid1, p_uuid2) \ - (((p_uuid1)->type != (p_uuid2)->type) || ((p_uuid1)->uuid != (p_uuid2)->uuid)) - -/** @} */ - -/** @addtogroup BLE_TYPES_STRUCTURES Structures - * @{ */ - -/** @brief 128 bit UUID values. */ -typedef struct -{ - uint8_t uuid128[16]; /**< Little-Endian UUID bytes. */ -} ble_uuid128_t; - -/** @brief Bluetooth Low Energy UUID type, encapsulates both 16-bit and 128-bit UUIDs. */ -typedef struct -{ - uint16_t uuid; /**< 16-bit UUID value or octets 12-13 of 128-bit UUID. */ - uint8_t type; /**< UUID type, see @ref BLE_UUID_TYPES. If type is @ref BLE_UUID_TYPE_UNKNOWN, the value of uuid is undefined. */ -} ble_uuid_t; - -/** @} */ -#ifdef __cplusplus -} -#endif - -#endif /* BLE_TYPES_H__ */ - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf52/nrf_mbr.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf52/nrf_mbr.h deleted file mode 100644 index ccbe96bd59e..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf52/nrf_mbr.h +++ /dev/null @@ -1,212 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - @defgroup nrf_mbr_api Master Boot Record API - @{ - - @brief APIs for updating SoftDevice and BootLoader - -*/ - -#ifndef NRF_MBR_H__ -#define NRF_MBR_H__ - -#include "nrf_svc.h" -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup NRF_MBR_DEFINES Defines - * @{ */ - -/**@brief MBR SVC Base number. */ -#define MBR_SVC_BASE (0x18) - -/**@brief Page size in words. */ -#define MBR_PAGE_SIZE_IN_WORDS (1024) - -/** @brief The size that must be reserved for the MBR when a SoftDevice is written to flash. -This is the offset where the first byte of the SoftDevice hex file is written.*/ -#define MBR_SIZE (0x1000) - -/** @} */ - -/** @addtogroup NRF_MBR_ENUMS Enumerations - * @{ */ - -/**@brief nRF Master Boot Record API SVC numbers. */ -enum NRF_MBR_SVCS -{ - SD_MBR_COMMAND = MBR_SVC_BASE, /**< ::sd_mbr_command */ -}; - -/**@brief Possible values for ::sd_mbr_command_t.command */ -enum NRF_MBR_COMMANDS -{ - SD_MBR_COMMAND_COPY_BL, /**< Copy a new BootLoader. @see sd_mbr_command_copy_bl_t*/ - SD_MBR_COMMAND_COPY_SD, /**< Copy a new SoftDevice. @see ::sd_mbr_command_copy_sd_t*/ - SD_MBR_COMMAND_INIT_SD, /**< Initialize forwarding interrupts to SD, and run reset function in SD*/ - SD_MBR_COMMAND_COMPARE, /**< This command works like memcmp. @see ::sd_mbr_command_compare_t*/ - SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET, /**< Start forwarding all exception to this address @see ::sd_mbr_command_vector_table_base_set_t*/ -}; - -/** @} */ - -/** @addtogroup NRF_MBR_TYPES Types - * @{ */ - -/**@brief This command copies part of a new SoftDevice - * The destination area is erased before copying. - * If dst is in the middle of a flash page, that whole flash page will be erased. - * If (dst+len) is in the middle of a flash page, that whole flash page will be erased. - * - * The user of this function is responsible for setting the BPROT registers. - * - * @retval ::NRF_SUCCESS indicates that the contents of the memory blocks where copied correctly. - * @retval ::NRF_ERROR_INTERNAL indicates that the contents of the memory blocks where not verified correctly after copying. - */ -typedef struct -{ - uint32_t *src; /**< Pointer to the source of data to be copied.*/ - uint32_t *dst; /**< Pointer to the destination where the content is to be copied.*/ - uint32_t len; /**< Number of 32 bit words to copy. Must be a multiple of @ref MBR_PAGE_SIZE_IN_WORDS words.*/ -} sd_mbr_command_copy_sd_t; - - -/**@brief This command works like memcmp, but takes the length in words. - * - * @retval ::NRF_SUCCESS indicates that the contents of both memory blocks are equal. - * @retval ::NRF_ERROR_NULL indicates that the contents of the memory blocks are not equal. - */ -typedef struct -{ - uint32_t *ptr1; /**< Pointer to block of memory. */ - uint32_t *ptr2; /**< Pointer to block of memory. */ - uint32_t len; /**< Number of 32 bit words to compare.*/ -} sd_mbr_command_compare_t; - - -/**@brief This command copies a new BootLoader. - * With this command, destination of BootLoader is always the address written in NRF_UICR->BOOTADDR. - * - * Destination is erased by this function. - * If (destination+bl_len) is in the middle of a flash page, that whole flash page will be erased. - * - * This function will use PROTENSET to protect the flash that is not intended to be written. - * - * On success, this function will not return. It will start the new BootLoader from reset-vector as normal. - * - * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. - * @retval ::NRF_ERROR_FORBIDDEN if NRF_UICR->BOOTADDR is not set. - * @retval ::NRF_ERROR_INVALID_LENGTH if parameters attempts to read or write outside flash area. - * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) - */ -typedef struct -{ - uint32_t *bl_src; /**< Pointer to the source of the Bootloader to be be copied.*/ - uint32_t bl_len; /**< Number of 32 bit words to copy for BootLoader. */ -} sd_mbr_command_copy_bl_t; - -/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the MBR - * - * Once this function has been called, this address is where the MBR will start to forward interrupts to after a reset. - * - * To restore default forwarding this function should be called with @param address set to 0. - * The MBR will then start forwarding to interrupts to the address in NFR_UICR->BOOTADDR or to the SoftDevice if the BOOTADDR is not set. - * - * On success, this function will not return. It will reset the device. - * - * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. - * @retval ::NRF_ERROR_INVALID_ADDR if parameter address is outside of the flash size. - * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) - */ -typedef struct -{ - uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ -} sd_mbr_command_vector_table_base_set_t; - - -typedef struct -{ - uint32_t command; /**< type of command to be issued see @ref NRF_MBR_COMMANDS. */ - union - { - sd_mbr_command_copy_sd_t copy_sd; /**< Parameters for copy SoftDevice.*/ - sd_mbr_command_compare_t compare; /**< Parameters for verify.*/ - sd_mbr_command_copy_bl_t copy_bl; /**< Parameters for copy BootLoader. Requires parameter page. */ - sd_mbr_command_vector_table_base_set_t base_set; /**< Parameters for vector table base set. Requires parameter page.*/ - } params; -} sd_mbr_command_t; - -/** @} */ - -/** @addtogroup NRF_MBR_FUNCTIONS Functions - * @{ */ - -/**@brief Issue Master Boot Record commands - * - * Commands used when updating a SoftDevice and bootloader. - * - * The SD_MBR_COMMAND_COPY_BL and SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET requires parameters to be - * retained by the MBR when resetting the IC. This is done in a separate flash page - * provided by the application. The UICR register UICR.NRFFW[1] must be set - * to an address corresponding to a page in the application flash space. This page will be cleared - * by the MBR and used to store the command before reset. When the UICR.NRFFW[1] field is set - * the page it refers to must not be used by the application. If the UICR.NRFFW[1] is set to - * 0xFFFFFFFF (the default) MBR commands which use flash will be unavailable and return - * NRF_ERROR_NO_MEM. - * - * @param[in] param Pointer to a struct describing the command. - * - * @note For return values, see ::sd_mbr_command_copy_sd_t ::sd_mbr_command_copy_bl_t ::sd_mbr_command_compare_t ::sd_mbr_command_vector_table_base_set_t - * - * @retval NRF_ERROR_NO_MEM if UICR.NRFFW[1] is not set (i.e. is 0xFFFFFFFF). - * @retval NRF_ERROR_INVALID_PARAM if an invalid command is given. -*/ -SVCALL(SD_MBR_COMMAND, uint32_t, sd_mbr_command(sd_mbr_command_t* param)); - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // NRF_MBR_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_ble.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_ble.h deleted file mode 100644 index c4835fa6ef7..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_ble.h +++ /dev/null @@ -1,615 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - @addtogroup BLE_COMMON BLE SoftDevice Common - @{ - @defgroup ble_api Events, type definitions and API calls - @{ - - @brief Module independent events, type definitions and API calls for the BLE SoftDevice. - - */ - -#ifndef BLE_H__ -#define BLE_H__ - -#include "ble_ranges.h" -#include "ble_types.h" -#include "ble_gap.h" -#include "ble_l2cap.h" -#include "ble_gatt.h" -#include "ble_gattc.h" -#include "ble_gatts.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_COMMON_ENUMERATIONS Enumerations - * @{ */ - -/** - * @brief Common API SVC numbers. - */ -enum BLE_COMMON_SVCS -{ - SD_BLE_ENABLE = BLE_SVC_BASE, /**< Enable and initialize the BLE stack */ - SD_BLE_EVT_GET, /**< Get an event from the pending events queue. */ - SD_BLE_UUID_VS_ADD, /**< Add a Vendor Specific UUID. */ - SD_BLE_UUID_DECODE, /**< Decode UUID bytes. */ - SD_BLE_UUID_ENCODE, /**< Encode UUID bytes. */ - SD_BLE_VERSION_GET, /**< Get the local version information (company ID, Link Layer Version, Link Layer Subversion). */ - SD_BLE_USER_MEM_REPLY, /**< User Memory Reply. */ - SD_BLE_OPT_SET, /**< Set a BLE option. */ - SD_BLE_OPT_GET, /**< Get a BLE option. */ - SD_BLE_CFG_SET, /**< Add a configuration to the BLE stack. */ -}; - -/** - * @brief BLE Module Independent Event IDs. - */ -enum BLE_COMMON_EVTS -{ - BLE_EVT_USER_MEM_REQUEST = BLE_EVT_BASE, /**< User Memory request. @ref ble_evt_user_mem_request_t */ - BLE_EVT_USER_MEM_RELEASE, /**< User Memory release. @ref ble_evt_user_mem_release_t */ -}; - -/**@brief BLE Connection Configuration IDs. - * - * IDs that uniquely identify a connection configuration. - */ -enum BLE_CONN_CFGS -{ - BLE_CONN_CFG_GAP = BLE_CONN_CFG_BASE, /**< BLE GAP specific connection configuration. */ - BLE_CONN_CFG_GATTC, /**< BLE GATTC specific connection configuration. */ - BLE_CONN_CFG_GATTS, /**< BLE GATTS specific connection configuration. */ - BLE_CONN_CFG_GATT, /**< BLE GATT specific connection configuration. */ -}; - -/**@brief BLE Common Configuration IDs. - * - * IDs that uniquely identify a common configuration. - */ -enum BLE_COMMON_CFGS -{ - BLE_COMMON_CFG_VS_UUID = BLE_CFG_BASE, /**< Vendor specific UUID configuration */ -}; - -/**@brief Common Option IDs. - * IDs that uniquely identify a common option. - */ -enum BLE_COMMON_OPTS -{ - BLE_COMMON_OPT_PA_LNA = BLE_OPT_BASE, /**< PA and LNA options */ - BLE_COMMON_OPT_CONN_EVT_EXT, /**< Extended connection events option */ -}; - -/** @} */ - -/** @addtogroup BLE_COMMON_DEFINES Defines - * @{ */ - -/** @brief Required pointer alignment for BLE Events. -*/ -#define BLE_EVT_PTR_ALIGNMENT 4 - -/** @brief Leaves the maximum of the two arguments. -*/ -#define BLE_MAX(a, b) ((a) < (b) ? (b) : (a)) - -/** @brief Maximum possible length for BLE Events. - * @note The highest value used for @ref ble_gatt_conn_cfg_t::att_mtu in any connection configuration shall be used as a parameter. - * If that value has not been configured for any connections then @ref BLE_GATT_ATT_MTU_DEFAULT must be used instead. -*/ -#define BLE_EVT_LEN_MAX(ATT_MTU) (BLE_MAX( \ - sizeof(ble_evt_t), \ - BLE_MAX( \ - offsetof(ble_evt_t, evt.gattc_evt.params.rel_disc_rsp.includes) + ((ATT_MTU) - 2) / 6 * sizeof(ble_gattc_include_t), \ - offsetof(ble_evt_t, evt.gattc_evt.params.attr_info_disc_rsp.info.attr_info16) + ((ATT_MTU) - 2) / 4 * sizeof(ble_gattc_attr_info16_t) \ - ) \ -)) - -/** @defgroup BLE_USER_MEM_TYPES User Memory Types - * @{ */ -#define BLE_USER_MEM_TYPE_INVALID 0x00 /**< Invalid User Memory Types. */ -#define BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES 0x01 /**< User Memory for GATTS queued writes. */ -/** @} */ - -/** @defgroup BLE_UUID_VS_COUNTS Vendor Specific UUID counts - * @{ - */ -#define BLE_UUID_VS_COUNT_DEFAULT 10 /**< Default VS UUID count. */ -#define BLE_UUID_VS_COUNT_MAX 254 /**< Maximum VS UUID count. */ -/** @} */ - -/** @defgroup BLE_COMMON_CFG_DEFAULTS Configuration defaults. - * @{ - */ -#define BLE_CONN_CFG_TAG_DEFAULT 0 /**< Default configuration tag, SoftDevice default connection configuration. */ - -/** @} */ - -/** @} */ - -/** @addtogroup BLE_COMMON_STRUCTURES Structures - * @{ */ - -/**@brief User Memory Block. */ -typedef struct -{ - uint8_t *p_mem; /**< Pointer to the start of the user memory block. */ - uint16_t len; /**< Length in bytes of the user memory block. */ -} ble_user_mem_block_t; - -/**@brief Event structure for @ref BLE_EVT_USER_MEM_REQUEST. */ -typedef struct -{ - uint8_t type; /**< User memory type, see @ref BLE_USER_MEM_TYPES. */ -} ble_evt_user_mem_request_t; - -/**@brief Event structure for @ref BLE_EVT_USER_MEM_RELEASE. */ -typedef struct -{ - uint8_t type; /**< User memory type, see @ref BLE_USER_MEM_TYPES. */ - ble_user_mem_block_t mem_block; /**< User memory block */ -} ble_evt_user_mem_release_t; - -/**@brief Event structure for events not associated with a specific function module. */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle on which this event occurred. */ - union - { - ble_evt_user_mem_request_t user_mem_request; /**< User Memory Request Event Parameters. */ - ble_evt_user_mem_release_t user_mem_release; /**< User Memory Release Event Parameters. */ - } params; /**< Event parameter union. */ -} ble_common_evt_t; - -/**@brief BLE Event header. */ -typedef struct -{ - uint16_t evt_id; /**< Value from a BLE__EVT series. */ - uint16_t evt_len; /**< Length in octets including this header. */ -} ble_evt_hdr_t; - -/**@brief Common BLE Event type, wrapping the module specific event reports. */ -typedef struct -{ - ble_evt_hdr_t header; /**< Event header. */ - union - { - ble_common_evt_t common_evt; /**< Common Event, evt_id in BLE_EVT_* series. */ - ble_gap_evt_t gap_evt; /**< GAP originated event, evt_id in BLE_GAP_EVT_* series. */ - ble_gattc_evt_t gattc_evt; /**< GATT client originated event, evt_id in BLE_GATTC_EVT* series. */ - ble_gatts_evt_t gatts_evt; /**< GATT server originated event, evt_id in BLE_GATTS_EVT* series. */ - } evt; /**< Event union. */ -} ble_evt_t; - - -/** - * @brief Version Information. - */ -typedef struct -{ - uint8_t version_number; /**< Link Layer Version number for BT 4.1 spec is 7 (https://www.bluetooth.org/en-us/specification/assigned-numbers/link-layer). */ - uint16_t company_id; /**< Company ID, Nordic Semiconductor's company ID is 89 (0x0059) (https://www.bluetooth.org/apps/content/Default.aspx?doc_id=49708). */ - uint16_t subversion_number; /**< Link Layer Sub Version number, corresponds to the SoftDevice Config ID or Firmware ID (FWID). */ -} ble_version_t; - -/** - * @brief Configuration parameters for the PA and LNA. - */ -typedef struct -{ - uint8_t enable :1; /**< Enable toggling for this amplifier */ - uint8_t active_high :1; /**< Set the pin to be active high */ - uint8_t gpio_pin :6; /**< The GPIO pin to toggle for this amplifier */ -} ble_pa_lna_cfg_t; - -/** - * @brief PA & LNA GPIO toggle configuration - * - * This option configures the SoftDevice to toggle pins when the radio is active for use with a power amplifier and/or - * a low noise amplifier. - * - * Toggling the pins is achieved by using two PPI channels and a GPIOTE channel. The hardware channel IDs are provided - * by the application and should be regarded as reserved as long as any PA/LNA toggling is enabled. - * - * @note @ref sd_ble_opt_get is not supported for this option. - * @note This feature is only supported for nRF52, on nRF51 @ref NRF_ERROR_NOT_SUPPORTED will always be returned. - * @note Setting this option while the radio is in use (i.e. any of the roles are active) may have undefined consequences - * and must be avoided by the application. - */ -typedef struct -{ - ble_pa_lna_cfg_t pa_cfg; /**< Power Amplifier configuration */ - ble_pa_lna_cfg_t lna_cfg; /**< Low Noise Amplifier configuration */ - - uint8_t ppi_ch_id_set; /**< PPI channel used for radio pin setting */ - uint8_t ppi_ch_id_clr; /**< PPI channel used for radio pin clearing */ - uint8_t gpiote_ch_id; /**< GPIOTE channel used for radio pin toggling */ -} ble_common_opt_pa_lna_t; - -/** - * @brief Configuration of extended BLE connection events. - * - * When enabled the SoftDevice will dynamically extend the connection event when possible. - * - * The connection event length is controlled by the connection configuration as set by @ref ble_gap_conn_cfg_t::event_length. - * The connection event can be extended if there is time to send another packet pair before the start of the next connection interval, - * and if there are no conflicts with other BLE roles requesting radio time. - * - * @note @ref sd_ble_opt_get is not supported for this option. - */ -typedef struct -{ - uint8_t enable : 1; /**< Enable extended BLE connection events, disabled by default. */ -} ble_common_opt_conn_evt_ext_t; - -/**@brief Option structure for common options. */ -typedef union -{ - ble_common_opt_pa_lna_t pa_lna; /**< Parameters for controlling PA and LNA pin toggling. */ - ble_common_opt_conn_evt_ext_t conn_evt_ext; /**< Parameters for enabling extended connection events. */ -} ble_common_opt_t; - -/**@brief Common BLE Option type, wrapping the module specific options. */ -typedef union -{ - ble_common_opt_t common_opt; /**< COMMON options, opt_id in @ref BLE_COMMON_OPTS series. */ - ble_gap_opt_t gap_opt; /**< GAP option, opt_id in @ref BLE_GAP_OPTS series. */ -} ble_opt_t; - -/**@brief BLE connection configuration type, wrapping the module specific configurations, set with - * @ref sd_ble_cfg_set. - * - * @note Connection configurations don't have to be set. - * In the case that no configurations has been set, or fewer connection configurations has been set than enabled connections, - * the default connection configuration will be automatically added for the remaining connections. - * When creating connections with the default configuration, @ref BLE_CONN_CFG_TAG_DEFAULT should be used in - * place of @ref ble_conn_cfg_t::conn_cfg_tag. See @ref sd_ble_gap_adv_start() and @ref sd_ble_gap_connect()" - * - * @mscs - * @mmsc{@ref BLE_CONN_CFG} - * @endmscs - - */ -typedef struct -{ - uint8_t conn_cfg_tag; /**< The application chosen tag it can use with the @ref sd_ble_gap_adv_start() and @ref sd_ble_gap_connect() - calls to select this configuration when creating a connection. - Must be different for all connection configurations added and not @ref BLE_CONN_CFG_TAG_DEFAULT. */ - union { - ble_gap_conn_cfg_t gap_conn_cfg; /**< GAP connection configuration, cfg_id is @ref BLE_CONN_CFG_GAP. */ - ble_gattc_conn_cfg_t gattc_conn_cfg; /**< GATTC connection configuration, cfg_id is @ref BLE_CONN_CFG_GATTC. */ - ble_gatts_conn_cfg_t gatts_conn_cfg; /**< GATTS this connection configuration, cfg_id is @ref BLE_CONN_CFG_GATTS. */ - ble_gatt_conn_cfg_t gatt_conn_cfg; /**< GATT this connection configuration, cfg_id is @ref BLE_CONN_CFG_GATT. */ - } params; /**< Connection configuration union. */ -} ble_conn_cfg_t; - -/** - * @brief Configuration of Vendor Specific UUIDs, set with @ref sd_ble_cfg_set. - * - * @retval ::NRF_ERROR_INVALID_PARAM Too many UUIDs configured. - */ -typedef struct -{ - uint8_t vs_uuid_count; /**< Number of 128-bit Vendor Specific UUID bases to allocate memory for. - Default value is @ref BLE_UUID_VS_COUNT_DEFAULT. Maximum value is - @ref BLE_UUID_VS_COUNT_MAX. */ -} ble_common_cfg_vs_uuid_t; - -/**@brief Common BLE Configuration type, wrapping the common configurations. */ -typedef union -{ - ble_common_cfg_vs_uuid_t vs_uuid_cfg; /**< Vendor specific UUID configuration, cfg_id is @ref BLE_COMMON_CFG_VS_UUID. */ -} ble_common_cfg_t; - -/**@brief BLE Configuration type, wrapping the module specific configurations. */ -typedef union -{ - ble_conn_cfg_t conn_cfg; /**< Connection specific configurations, cfg_id in @ref BLE_CONN_CFGS series. */ - ble_common_cfg_t common_cfg; /**< Global common configurations, cfg_id in @ref BLE_COMMON_CFGS series. */ - ble_gap_cfg_t gap_cfg; /**< Global GAP configurations, cfg_id in @ref BLE_GAP_CFGS series. */ - ble_gatts_cfg_t gatts_cfg; /**< Global GATTS configuration, cfg_id in @ref BLE_GATTS_CFGS series. */ -} ble_cfg_t; - -/** @} */ - -/** @addtogroup BLE_COMMON_FUNCTIONS Functions - * @{ */ - -/**@brief Enable the BLE stack - * - * @param[in, out] p_app_ram_base Pointer to a variable containing the start address of the - * application RAM region (APP_RAM_BASE). On return, this will - * contain the minimum start address of the application RAM region - * required by the SoftDevice for this configuration. - * - * @note The memory requirement for a specific configuration will not increase between SoftDevices - * with the same major version number. - * - * @note The value of *p_app_ram_base when the app has done no custom configuration of the - * SoftDevice, i.e. the app has not called @ref sd_ble_cfg_set before @ref sd_ble_enable, can - * be found in the release notes. - * - * @note At runtime the IC's RAM is split into 2 regions: The SoftDevice RAM region is located - * between 0x20000000 and APP_RAM_BASE-1 and the application's RAM region is located between - * APP_RAM_BASE and the start of the call stack. - * - * @details This call initializes the BLE stack, no BLE related function other than @ref - * sd_ble_cfg_set can be called before this one. - * - * @mscs - * @mmsc{@ref BLE_COMMON_ENABLE} - * @endmscs - * - * @retval ::NRF_SUCCESS The BLE stack has been initialized successfully. - * @retval ::NRF_ERROR_INVALID_STATE The BLE stack had already been initialized and cannot be reinitialized. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. - * @retval ::NRF_ERROR_NO_MEM The amount of memory assigned to the SoftDevice by *p_app_ram_base is not - * large enough to fit this configuration's memory requirement. Check *p_app_ram_base - * and set the start address of the application RAM region accordingly. - */ -SVCALL(SD_BLE_ENABLE, uint32_t, sd_ble_enable(uint32_t * p_app_ram_base)); - -/**@brief Add configurations for the BLE stack - * - * @param[in] cfg_id Config ID, see @ref BLE_CONN_CFGS, @ref BLE_COMMON_CFGS, @ref - * BLE_GAP_CFGS or @ref BLE_GATTS_CFGS. - * @param[in] p_cfg Pointer to a ble_cfg_t structure containing the configuration value. - * @param[in] app_ram_base The start address of the application RAM region (APP_RAM_BASE). - * See @ref sd_ble_enable for details about APP_RAM_BASE. - * - * @note The memory requirement for a specific configuration will not increase between SoftDevices - * with the same major version number. - * - * @note If a configuration is set more than once, the last one set is the one that takes effect on - * @ref sd_ble_enable. - * - * @note Any part of the BLE stack that is NOT configured with @ref sd_ble_cfg_set will have default - * configuration. - * - * @note @ref sd_ble_cfg_set may be called at any time when the SoftDevice is enabled (see @ref - * sd_softdevice_enable) while the BLE part of the SoftDevice is not enabled (see @ref - * sd_ble_enable). - * - * @note Error codes for the configurations are described in the configuration structs. - * - * @mscs - * @mmsc{@ref BLE_COMMON_ENABLE} - * @endmscs - * - * @retval ::NRF_SUCCESS The configuration has been added successfully. - * @retval ::NRF_ERROR_INVALID_STATE The BLE stack had already been initialized. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid cfg_id supplied. - * @retval ::NRF_ERROR_NO_MEM The amount of memory assigned to the SoftDevice by app_ram_base is not - * large enough to fit this configuration's memory requirement. - */ -SVCALL(SD_BLE_CFG_SET, uint32_t, sd_ble_cfg_set(uint32_t cfg_id, ble_cfg_t const * p_cfg, uint32_t app_ram_base)); - -/**@brief Get an event from the pending events queue. - * - * @param[out] p_dest Pointer to buffer to be filled in with an event, or NULL to retrieve the event length. - * This buffer must be aligned to the extend defined by @ref BLE_EVT_PTR_ALIGNMENT. - * The buffer should be interpreted as a @ref ble_evt_t struct. - * @param[in, out] p_len Pointer the length of the buffer, on return it is filled with the event length. - * - * @details This call allows the application to pull a BLE event from the BLE stack. The application is signaled that - * an event is available from the BLE stack by the triggering of the SD_EVT_IRQn interrupt. - * The application is free to choose whether to call this function from thread mode (main context) or directly from the - * Interrupt Service Routine that maps to SD_EVT_IRQn. In any case however, and because the BLE stack runs at a higher - * priority than the application, this function should be called in a loop (until @ref NRF_ERROR_NOT_FOUND is returned) - * every time SD_EVT_IRQn is raised to ensure that all available events are pulled from the BLE stack. Failure to do so - * could potentially leave events in the internal queue without the application being aware of this fact. - * - * Sizing the p_dest buffer is equally important, since the application needs to provide all the memory necessary for the event to - * be copied into application memory. If the buffer provided is not large enough to fit the entire contents of the event, - * @ref NRF_ERROR_DATA_SIZE will be returned and the application can then call again with a larger buffer size. - * The maximum possible event length is defined by @ref BLE_EVT_LEN_MAX. The application may also "peek" the event length - * by providing p_dest as a NULL pointer and inspecting the value of *p_len upon return: - * - * \code - * uint16_t len; - * errcode = sd_ble_evt_get(NULL, &len); - * \endcode - * - * @mscs - * @mmsc{@ref BLE_COMMON_IRQ_EVT_MSC} - * @mmsc{@ref BLE_COMMON_THREAD_EVT_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Event pulled and stored into the supplied buffer. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. - * @retval ::NRF_ERROR_NOT_FOUND No events ready to be pulled. - * @retval ::NRF_ERROR_DATA_SIZE Event ready but could not fit into the supplied buffer. - */ -SVCALL(SD_BLE_EVT_GET, uint32_t, sd_ble_evt_get(uint8_t *p_dest, uint16_t *p_len)); - - -/**@brief Add a Vendor Specific base UUID. - * - * @details This call enables the application to add a vendor specific base UUID to the BLE stack's table, for later - * use with all other modules and APIs. This then allows the application to use the shorter, 24-bit @ref ble_uuid_t - * format when dealing with both 16-bit and 128-bit UUIDs without having to check for lengths and having split code - * paths. This is accomplished by extending the grouping mechanism that the Bluetooth SIG standard base UUID uses - * for all other 128-bit UUIDs. The type field in the @ref ble_uuid_t structure is an index (relative to - * @ref BLE_UUID_TYPE_VENDOR_BEGIN) to the table populated by multiple calls to this function, and the UUID field - * in the same structure contains the 2 bytes at indexes 12 and 13. The number of possible 128-bit UUIDs available to - * the application is therefore the number of Vendor Specific UUIDs added with the help of this function times 65536, - * although restricted to modifying bytes 12 and 13 for each of the entries in the supplied array. - * - * @note Bytes 12 and 13 of the provided UUID will not be used internally, since those are always replaced by - * the 16-bit uuid field in @ref ble_uuid_t. - * - * @note If a UUID is already present in the BLE stack's internal table, the corresponding index will be returned in - * p_uuid_type along with an NRF_SUCCESS error code. - * - * @param[in] p_vs_uuid Pointer to a 16-octet (128-bit) little endian Vendor Specific UUID disregarding - * bytes 12 and 13. - * @param[out] p_uuid_type Pointer to a uint8_t where the type field in @ref ble_uuid_t corresponding to this UUID will be stored. - * - * @retval ::NRF_SUCCESS Successfully added the Vendor Specific UUID. - * @retval ::NRF_ERROR_INVALID_ADDR If p_vs_uuid or p_uuid_type is NULL or invalid. - * @retval ::NRF_ERROR_NO_MEM If there are no more free slots for VS UUIDs. - */ -SVCALL(SD_BLE_UUID_VS_ADD, uint32_t, sd_ble_uuid_vs_add(ble_uuid128_t const *p_vs_uuid, uint8_t *p_uuid_type)); - - -/** @brief Decode little endian raw UUID bytes (16-bit or 128-bit) into a 24 bit @ref ble_uuid_t structure. - * - * @details The raw UUID bytes excluding bytes 12 and 13 (i.e. bytes 0-11 and 14-15) of p_uuid_le are compared - * to the corresponding ones in each entry of the table of vendor specific UUIDs populated with @ref sd_ble_uuid_vs_add - * to look for a match. If there is such a match, bytes 12 and 13 are returned as p_uuid->uuid and the index - * relative to @ref BLE_UUID_TYPE_VENDOR_BEGIN as p_uuid->type. - * - * @note If the UUID length supplied is 2, then the type set by this call will always be @ref BLE_UUID_TYPE_BLE. - * - * @param[in] uuid_le_len Length in bytes of the buffer pointed to by p_uuid_le (must be 2 or 16 bytes). - * @param[in] p_uuid_le Pointer pointing to little endian raw UUID bytes. - * @param[out] p_uuid Pointer to a @ref ble_uuid_t structure to be filled in. - * - * @retval ::NRF_SUCCESS Successfully decoded into the @ref ble_uuid_t structure. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_LENGTH Invalid UUID length. - * @retval ::NRF_ERROR_NOT_FOUND For a 128-bit UUID, no match in the populated table of UUIDs. - */ -SVCALL(SD_BLE_UUID_DECODE, uint32_t, sd_ble_uuid_decode(uint8_t uuid_le_len, uint8_t const *p_uuid_le, ble_uuid_t *p_uuid)); - - -/** @brief Encode a @ref ble_uuid_t structure into little endian raw UUID bytes (16-bit or 128-bit). - * - * @note The pointer to the destination buffer p_uuid_le may be NULL, in which case only the validity and size of p_uuid is computed. - * - * @param[in] p_uuid Pointer to a @ref ble_uuid_t structure that will be encoded into bytes. - * @param[out] p_uuid_le_len Pointer to a uint8_t that will be filled with the encoded length (2 or 16 bytes). - * @param[out] p_uuid_le Pointer to a buffer where the little endian raw UUID bytes (2 or 16) will be stored. - * - * @retval ::NRF_SUCCESS Successfully encoded into the buffer. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid UUID type. - */ -SVCALL(SD_BLE_UUID_ENCODE, uint32_t, sd_ble_uuid_encode(ble_uuid_t const *p_uuid, uint8_t *p_uuid_le_len, uint8_t *p_uuid_le)); - - -/**@brief Get Version Information. - * - * @details This call allows the application to get the BLE stack version information. - * - * @param[out] p_version Pointer to a ble_version_t structure to be filled in. - * - * @retval ::NRF_SUCCESS Version information stored successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY The BLE stack is busy (typically doing a locally-initiated disconnection procedure). - */ -SVCALL(SD_BLE_VERSION_GET, uint32_t, sd_ble_version_get(ble_version_t *p_version)); - - -/**@brief Provide a user memory block. - * - * @note This call can only be used as a response to a @ref BLE_EVT_USER_MEM_REQUEST event issued to the application. - * - * @param[in] conn_handle Connection handle. - * @param[in] p_block Pointer to a user memory block structure or NULL if memory is managed by the application. - * - * @mscs - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_PEER_CANCEL_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_NOAUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Successfully queued a response to the peer. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_LENGTH Invalid user memory block length supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection state or no user memory request pending. - */ -SVCALL(SD_BLE_USER_MEM_REPLY, uint32_t, sd_ble_user_mem_reply(uint16_t conn_handle, ble_user_mem_block_t const *p_block)); - -/**@brief Set a BLE option. - * - * @details This call allows the application to set the value of an option. - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC} - * @endmscs - * - * @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS. - * @param[in] p_opt Pointer to a ble_opt_t structure containing the option value. - * - * @retval ::NRF_SUCCESS Option set successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. - * @retval ::NRF_ERROR_INVALID_STATE Unable to set the parameter at this time. - * @retval ::NRF_ERROR_BUSY The BLE stack is busy or the previous procedure has not completed. - */ -SVCALL(SD_BLE_OPT_SET, uint32_t, sd_ble_opt_set(uint32_t opt_id, ble_opt_t const *p_opt)); - - -/**@brief Get a BLE option. - * - * @details This call allows the application to retrieve the value of an option. - * - * @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS. - * @param[out] p_opt Pointer to a ble_opt_t structure to be filled in. - * - * @retval ::NRF_SUCCESS Option retrieved successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. - * @retval ::NRF_ERROR_INVALID_STATE Unable to retrieve the parameter at this time. - * @retval ::NRF_ERROR_BUSY The BLE stack is busy or the previous procedure has not completed. - * @retval ::NRF_ERROR_NOT_SUPPORTED This option is not supported. - * - */ -SVCALL(SD_BLE_OPT_GET, uint32_t, sd_ble_opt_get(uint32_t opt_id, ble_opt_t *p_opt)); - -/** @} */ -#ifdef __cplusplus -} -#endif -#endif /* BLE_H__ */ - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_error.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_error.h deleted file mode 100644 index 43c091630bd..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_error.h +++ /dev/null @@ -1,87 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - /** - @defgroup nrf_error SoftDevice Global Error Codes - @{ - - @brief Global Error definitions -*/ - -/* Header guard */ -#ifndef NRF_ERROR_H__ -#define NRF_ERROR_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/** @defgroup NRF_ERRORS_BASE Error Codes Base number definitions - * @{ */ -#define NRF_ERROR_BASE_NUM (0x0) ///< Global error base -#define NRF_ERROR_SDM_BASE_NUM (0x1000) ///< SDM error base -#define NRF_ERROR_SOC_BASE_NUM (0x2000) ///< SoC error base -#define NRF_ERROR_STK_BASE_NUM (0x3000) ///< STK error base -/** @} */ - -#define NRF_SUCCESS (NRF_ERROR_BASE_NUM + 0) ///< Successful command -#define NRF_ERROR_SVC_HANDLER_MISSING (NRF_ERROR_BASE_NUM + 1) ///< SVC handler is missing -#define NRF_ERROR_SOFTDEVICE_NOT_ENABLED (NRF_ERROR_BASE_NUM + 2) ///< SoftDevice has not been enabled -#define NRF_ERROR_INTERNAL (NRF_ERROR_BASE_NUM + 3) ///< Internal Error -#define NRF_ERROR_NO_MEM (NRF_ERROR_BASE_NUM + 4) ///< No Memory for operation -#define NRF_ERROR_NOT_FOUND (NRF_ERROR_BASE_NUM + 5) ///< Not found -#define NRF_ERROR_NOT_SUPPORTED (NRF_ERROR_BASE_NUM + 6) ///< Not supported -#define NRF_ERROR_INVALID_PARAM (NRF_ERROR_BASE_NUM + 7) ///< Invalid Parameter -#define NRF_ERROR_INVALID_STATE (NRF_ERROR_BASE_NUM + 8) ///< Invalid state, operation disallowed in this state -#define NRF_ERROR_INVALID_LENGTH (NRF_ERROR_BASE_NUM + 9) ///< Invalid Length -#define NRF_ERROR_INVALID_FLAGS (NRF_ERROR_BASE_NUM + 10) ///< Invalid Flags -#define NRF_ERROR_INVALID_DATA (NRF_ERROR_BASE_NUM + 11) ///< Invalid Data -#define NRF_ERROR_DATA_SIZE (NRF_ERROR_BASE_NUM + 12) ///< Invalid Data size -#define NRF_ERROR_TIMEOUT (NRF_ERROR_BASE_NUM + 13) ///< Operation timed out -#define NRF_ERROR_NULL (NRF_ERROR_BASE_NUM + 14) ///< Null Pointer -#define NRF_ERROR_FORBIDDEN (NRF_ERROR_BASE_NUM + 15) ///< Forbidden Operation -#define NRF_ERROR_INVALID_ADDR (NRF_ERROR_BASE_NUM + 16) ///< Bad Memory Address -#define NRF_ERROR_BUSY (NRF_ERROR_BASE_NUM + 17) ///< Busy -#define NRF_ERROR_CONN_COUNT (NRF_ERROR_BASE_NUM + 18) ///< Maximum connection count exceeded. -#define NRF_ERROR_RESOURCES (NRF_ERROR_BASE_NUM + 19) ///< Not enough resources for operation - -#ifdef __cplusplus -} -#endif -#endif // NRF_ERROR_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_error_sdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_error_sdm.h deleted file mode 100644 index 103659a9138..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_error_sdm.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - /** - @addtogroup nrf_sdm_api - @{ - @defgroup nrf_sdm_error SoftDevice Manager Error Codes - @{ - - @brief Error definitions for the SDM API -*/ - -/* Header guard */ -#ifndef NRF_ERROR_SDM_H__ -#define NRF_ERROR_SDM_H__ - -#include "nrf_error.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#define NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN (NRF_ERROR_SDM_BASE_NUM + 0) ///< Unknown LFCLK source. -#define NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION (NRF_ERROR_SDM_BASE_NUM + 1) ///< Incorrect interrupt configuration (can be caused by using illegal priority levels, or having enabled SoftDevice interrupts). -#define NRF_ERROR_SDM_INCORRECT_CLENR0 (NRF_ERROR_SDM_BASE_NUM + 2) ///< Incorrect CLENR0 (can be caused by erroneous SoftDevice flashing). - -#ifdef __cplusplus -} -#endif -#endif // NRF_ERROR_SDM_H__ - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_error_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_error_soc.h deleted file mode 100644 index e31d8c9c978..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_error_soc.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - @addtogroup nrf_soc_api - @{ - @defgroup nrf_soc_error SoC Library Error Codes - @{ - - @brief Error definitions for the SoC library - -*/ - -/* Header guard */ -#ifndef NRF_ERROR_SOC_H__ -#define NRF_ERROR_SOC_H__ - -#include "nrf_error.h" -#ifdef __cplusplus -extern "C" { -#endif - -/* Mutex Errors */ -#define NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN (NRF_ERROR_SOC_BASE_NUM + 0) ///< Mutex already taken - -/* NVIC errors */ -#define NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE (NRF_ERROR_SOC_BASE_NUM + 1) ///< NVIC interrupt not available -#define NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED (NRF_ERROR_SOC_BASE_NUM + 2) ///< NVIC interrupt priority not allowed -#define NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN (NRF_ERROR_SOC_BASE_NUM + 3) ///< NVIC should not return - -/* Power errors */ -#define NRF_ERROR_SOC_POWER_MODE_UNKNOWN (NRF_ERROR_SOC_BASE_NUM + 4) ///< Power mode unknown -#define NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN (NRF_ERROR_SOC_BASE_NUM + 5) ///< Power POF threshold unknown -#define NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN (NRF_ERROR_SOC_BASE_NUM + 6) ///< Power off should not return - -/* Rand errors */ -#define NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES (NRF_ERROR_SOC_BASE_NUM + 7) ///< RAND not enough values - -/* PPI errors */ -#define NRF_ERROR_SOC_PPI_INVALID_CHANNEL (NRF_ERROR_SOC_BASE_NUM + 8) ///< Invalid PPI Channel -#define NRF_ERROR_SOC_PPI_INVALID_GROUP (NRF_ERROR_SOC_BASE_NUM + 9) ///< Invalid PPI Group - -#ifdef __cplusplus -} -#endif -#endif // NRF_ERROR_SOC_H__ -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_nvic.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_nvic.h deleted file mode 100644 index f4e3808071f..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_nvic.h +++ /dev/null @@ -1,517 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @defgroup nrf_nvic_api SoftDevice NVIC API - * @{ - * - * @note In order to use this module, the following code has to be added to a .c file: - * \code - * nrf_nvic_state_t nrf_nvic_state = {0}; - * \endcode - * - * @note Definitions and declarations starting with __ (double underscore) in this header file are - * not intended for direct use by the application. - * - * @brief APIs for the accessing NVIC when using a SoftDevice. - * - */ - -#ifndef NRF_NVIC_H__ -#define NRF_NVIC_H__ - -#include -#include "nrf.h" - -#include "nrf_error_soc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@addtogroup NRF_NVIC_DEFINES Defines - * @{ */ - -/**@defgroup NRF_NVIC_ISER_DEFINES SoftDevice NVIC internal definitions - * @{ */ - -#define __NRF_NVIC_NVMC_IRQn (30) /**< The peripheral ID of the NVMC. IRQ numbers are used to identify peripherals, but the NVMC doesn't have an IRQ number in the MDK. */ - -#ifdef NRF51 - #define __NRF_NVIC_ISER_COUNT (1) /**< The number of ISER/ICER registers in the NVIC that are used. */ - - /**@brief Interrupts used by the SoftDevice. */ - #define __NRF_NVIC_SD_IRQS_0 ((uint32_t)( \ - (1U << POWER_CLOCK_IRQn) \ - | (1U << RADIO_IRQn) \ - | (1U << RTC0_IRQn) \ - | (1U << TIMER0_IRQn) \ - | (1U << RNG_IRQn) \ - | (1U << ECB_IRQn) \ - | (1U << CCM_AAR_IRQn) \ - | (1U << TEMP_IRQn) \ - | (1U << __NRF_NVIC_NVMC_IRQn) \ - | (1U << (uint32_t)SWI5_IRQn) \ - )) - - /**@brief Interrupts available for to application. */ - #define __NRF_NVIC_APP_IRQS_0 (~__NRF_NVIC_SD_IRQS_0) -#endif - -#if defined(NRF52) || defined(NRF52840_XXAA) - #define __NRF_NVIC_ISER_COUNT (2) /**< The number of ISER/ICER registers in the NVIC that are used. */ - - /**@brief Interrupts used by the SoftDevice. */ - #define __NRF_NVIC_SD_IRQS_0 ((uint32_t)( \ - (1U << POWER_CLOCK_IRQn) \ - | (1U << RADIO_IRQn) \ - | (1U << RTC0_IRQn) \ - | (1U << TIMER0_IRQn) \ - | (1U << RNG_IRQn) \ - | (1U << ECB_IRQn) \ - | (1U << CCM_AAR_IRQn) \ - | (1U << TEMP_IRQn) \ - | (1U << __NRF_NVIC_NVMC_IRQn) \ - | (1U << (uint32_t)SWI5_EGU5_IRQn) \ - )) - #define __NRF_NVIC_SD_IRQS_1 ((uint32_t)0) - - /**@brief Interrupts available for to application. */ - #define __NRF_NVIC_APP_IRQS_0 (~__NRF_NVIC_SD_IRQS_0) - #define __NRF_NVIC_APP_IRQS_1 (~__NRF_NVIC_SD_IRQS_1) -#endif -/**@} */ - -/**@} */ - -/**@addtogroup NRF_NVIC_VARIABLES Variables - * @{ */ - -/**@brief Type representing the state struct for the SoftDevice NVIC module. */ -typedef struct -{ - uint32_t volatile __irq_masks[__NRF_NVIC_ISER_COUNT]; /**< IRQs enabled by the application in the NVIC. */ - uint32_t volatile __cr_flag; /**< Non-zero if already in a critical region */ -} nrf_nvic_state_t; - -/**@brief Variable keeping the state for the SoftDevice NVIC module. This must be declared in an - * application source file. */ -extern nrf_nvic_state_t nrf_nvic_state; - -/**@} */ - -/**@addtogroup NRF_NVIC_INTERNAL_FUNCTIONS SoftDevice NVIC internal functions - * @{ */ - -/**@brief Disables IRQ interrupts globally, including the SoftDevice's interrupts. - * - * @retval The value of PRIMASK prior to disabling the interrupts. - */ -__STATIC_INLINE int __sd_nvic_irq_disable(void); - -/**@brief Enables IRQ interrupts globally, including the SoftDevice's interrupts. - */ -__STATIC_INLINE void __sd_nvic_irq_enable(void); - -/**@brief Checks if IRQn is available to application - * @param[in] IRQn IRQ to check - * - * @retval 1 (true) if the IRQ to check is available to the application - */ -__STATIC_INLINE uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn); - -/**@brief Checks if priority is available to application - * @param[in] priority priority to check - * - * @retval 1 (true) if the priority to check is available to the application - */ -__STATIC_INLINE uint32_t __sd_nvic_is_app_accessible_priority(uint32_t priority); - -/**@} */ - -/**@addtogroup NRF_NVIC_FUNCTIONS SoftDevice NVIC public functions - * @{ */ - -/**@brief Enable External Interrupt. - * @note Corresponds to NVIC_EnableIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_EnableIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt was enabled. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt has a priority not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn); - -/**@brief Disable External Interrupt. - * @note Corresponds to NVIC_DisableIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_DisableIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt was disabled. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn); - -/**@brief Get Pending Interrupt. - * @note Corresponds to NVIC_GetPendingIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_GetPendingIRQ documentation in CMSIS. - * @param[out] p_pending_irq Return value from NVIC_GetPendingIRQ. - * - * @retval ::NRF_SUCCESS The interrupt is available for the application. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq); - -/**@brief Set Pending Interrupt. - * @note Corresponds to NVIC_SetPendingIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_SetPendingIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt is set pending. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn); - -/**@brief Clear Pending Interrupt. - * @note Corresponds to NVIC_ClearPendingIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_ClearPendingIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt pending flag is cleared. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn); - -/**@brief Set Interrupt Priority. - * @note Corresponds to NVIC_SetPriority in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * @pre Priority is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_SetPriority documentation in CMSIS. - * @param[in] priority A valid IRQ priority for use by the application. - * - * @retval ::NRF_SUCCESS The interrupt and priority level is available for the application. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt priority is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority); - -/**@brief Get Interrupt Priority. - * @note Corresponds to NVIC_GetPriority in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_GetPriority documentation in CMSIS. - * @param[out] p_priority Return value from NVIC_GetPriority. - * - * @retval ::NRF_SUCCESS The interrupt priority is returned in p_priority. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE - IRQn is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority); - -/**@brief System Reset. - * @note Corresponds to NVIC_SystemReset in CMSIS. - * - * @retval ::NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN - */ -__STATIC_INLINE uint32_t sd_nvic_SystemReset(void); - -/**@brief Enter critical region. - * - * @post Application interrupts will be disabled. - * @note sd_nvic_critical_region_enter() and ::sd_nvic_critical_region_exit() must be called in matching pairs inside each - * execution context - * @sa sd_nvic_critical_region_exit - * - * @param[out] p_is_nested_critical_region If 1, the application is now in a nested critical region. - * - * @retval ::NRF_SUCCESS - */ -__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region); - -/**@brief Exit critical region. - * - * @pre Application has entered a critical region using ::sd_nvic_critical_region_enter. - * @post If not in a nested critical region, the application interrupts will restored to the state before ::sd_nvic_critical_region_enter was called. - * - * @param[in] is_nested_critical_region If this is set to 1, the critical region won't be exited. @sa sd_nvic_critical_region_enter. - * - * @retval ::NRF_SUCCESS - */ -__STATIC_INLINE uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region); - -/**@} */ - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE int __sd_nvic_irq_disable(void) -{ - int pm = __get_PRIMASK(); - __disable_irq(); - return pm; -} - -__STATIC_INLINE void __sd_nvic_irq_enable(void) -{ - __enable_irq(); -} - -__STATIC_INLINE uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn) -{ - if (IRQn < 32) - { - return ((1UL<= (1 << __NVIC_PRIO_BITS)) - { - return 0; - } -#ifdef NRF51 - if( priority == 0 - || priority == 2 - ) - { - return 0; - } -#endif -#if defined(NRF52) || defined(NRF52840_XXAA) - if( priority == 0 - || priority == 1 - || priority == 4 - || priority == 5 - ) - { - return 0; - } -#endif - return 1; -} - - -__STATIC_INLINE uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn) -{ - if (!__sd_nvic_app_accessible_irq(IRQn)) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } - if (!__sd_nvic_is_app_accessible_priority(NVIC_GetPriority(IRQn))) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED; - } - - if (nrf_nvic_state.__cr_flag) - { - nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] |= (uint32_t)(1 << ((uint32_t)((int32_t)IRQn) & (uint32_t)0x1F)); - } - else - { - NVIC_EnableIRQ(IRQn); - } - return NRF_SUCCESS; -} - -__STATIC_INLINE uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn) -{ - if (!__sd_nvic_app_accessible_irq(IRQn)) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } - - if (nrf_nvic_state.__cr_flag) - { - nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] &= ~(1UL << ((uint32_t)(IRQn) & 0x1F)); - } - else - { - NVIC_DisableIRQ(IRQn); - } - - return NRF_SUCCESS; -} - -__STATIC_INLINE uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq) -{ - if (__sd_nvic_app_accessible_irq(IRQn)) - { - *p_pending_irq = NVIC_GetPendingIRQ(IRQn); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } -} - -__STATIC_INLINE uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn) -{ - if (__sd_nvic_app_accessible_irq(IRQn)) - { - NVIC_SetPendingIRQ(IRQn); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } -} - -__STATIC_INLINE uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn) -{ - if (__sd_nvic_app_accessible_irq(IRQn)) - { - NVIC_ClearPendingIRQ(IRQn); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } -} - -__STATIC_INLINE uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if (!__sd_nvic_app_accessible_irq(IRQn)) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } - - if (!__sd_nvic_is_app_accessible_priority(priority)) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED; - } - - NVIC_SetPriority(IRQn, (uint32_t)priority); - return NRF_SUCCESS; -} - -__STATIC_INLINE uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority) -{ - if (__sd_nvic_app_accessible_irq(IRQn)) - { - *p_priority = (NVIC_GetPriority(IRQn) & 0xFF); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } -} - -__STATIC_INLINE uint32_t sd_nvic_SystemReset(void) -{ - NVIC_SystemReset(); - return NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN; -} - -__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region) -{ - int was_masked = __sd_nvic_irq_disable(); - if (!nrf_nvic_state.__cr_flag) - { - nrf_nvic_state.__cr_flag = 1; - nrf_nvic_state.__irq_masks[0] = ( NVIC->ICER[0] & __NRF_NVIC_APP_IRQS_0 ); - NVIC->ICER[0] = __NRF_NVIC_APP_IRQS_0; - #if defined(NRF52) || defined(NRF52840_XXAA) - nrf_nvic_state.__irq_masks[1] = ( NVIC->ICER[1] & __NRF_NVIC_APP_IRQS_1 ); - NVIC->ICER[1] = __NRF_NVIC_APP_IRQS_1; - #endif - *p_is_nested_critical_region = 0; - } - else - { - *p_is_nested_critical_region = 1; - } - if (!was_masked) - { - __sd_nvic_irq_enable(); - } - return NRF_SUCCESS; -} - -__STATIC_INLINE uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region) -{ - if (nrf_nvic_state.__cr_flag && (is_nested_critical_region == 0)) - { - int was_masked = __sd_nvic_irq_disable(); - NVIC->ISER[0] = nrf_nvic_state.__irq_masks[0]; - #if defined(NRF52) || defined(NRF52840_XXAA) - NVIC->ISER[1] = nrf_nvic_state.__irq_masks[1]; - #endif - nrf_nvic_state.__cr_flag = 0; - if (!was_masked) - { - __sd_nvic_irq_enable(); - } - } - - return NRF_SUCCESS; -} - -#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ - -#ifdef __cplusplus -} -#endif - -#endif // NRF_NVIC_H__ - -/**@} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_sd_def.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_sd_def.h deleted file mode 100644 index 0b4d221d6a4..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_sd_def.h +++ /dev/null @@ -1,59 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_SD_DEF_H__ -#define NRF_SD_DEF_H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#define SD_PPI_CHANNELS_USED 0xFFFE0000uL /**< PPI channels utilized by SotfDevice (not available to the application). */ -#define SD_PPI_GROUPS_USED 0x0000000CuL /**< PPI groups utilized by SoftDevice (not available to the application). */ -#define SD_TIMERS_USED 0x00000001uL /**< Timers used by SoftDevice. */ -#define SD_SWI_USED 0x0000003CuL /**< Software interrupts used by SoftDevice */ - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_SD_DEF_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_sdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_sdm.h deleted file mode 100644 index 57ffe13358d..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_sdm.h +++ /dev/null @@ -1,338 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - @defgroup nrf_sdm_api SoftDevice Manager API - @{ - - @brief APIs for SoftDevice management. - -*/ - -#ifndef NRF_SDM_H__ -#define NRF_SDM_H__ - -#include "nrf_svc.h" -#include "nrf.h" -#include "nrf_soc.h" -#include "nrf_error_sdm.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup NRF_SDM_DEFINES Defines - * @{ */ -#ifdef NRFSOC_DOXYGEN -/// Declared in nrf_mbr.h -#define MBR_SIZE 0 -#warning test -#endif - -/** @brief The major version for the SoftDevice binary distributed with this header file. */ -#define SD_MAJOR_VERSION (0) - -/** @brief The minor version for the SoftDevice binary distributed with this header file. */ -#define SD_MINOR_VERSION (0) - -/** @brief The bugfix version for the SoftDevice binary distributed with this header file. */ -#define SD_BUGFIX_VERSION (0) - -/** @brief The full version number for the SoftDevice binary this header file was distributed - * with, as a decimal number in the form Mmmmbbb, where: - * - M is major version (one or more digits) - * - mmm is minor version (three digits) - * - bbb is bugfix version (three digits). */ -#define SD_VERSION (SD_MAJOR_VERSION * 1000000 + SD_MINOR_VERSION * 1000 + SD_BUGFIX_VERSION) - -/** @brief SoftDevice Manager SVC Base number. */ -#define SDM_SVC_BASE 0x10 - -/** @brief Invalid info field. Returned when an info field does not exist. */ -#define SDM_INFO_FIELD_INVALID (0) - -/** @brief Defines the SoftDevice Information Structure location (address) as an offset from -the start of the SoftDevice (without MBR)*/ -#define SOFTDEVICE_INFO_STRUCT_OFFSET (0x2000) - -/** @brief Defines the absolute SoftDevice Information Structure location (address) when the - * SoftDevice is installed just above the MBR (the usual case). */ -#define SOFTDEVICE_INFO_STRUCT_ADDRESS (SOFTDEVICE_INFO_STRUCT_OFFSET + MBR_SIZE) - -/** @brief Defines the offset for the SoftDevice Information Structure size value relative to the - * SoftDevice base address. The size value is of type uint8_t. */ -#define SD_INFO_STRUCT_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET) - -/** @brief Defines the offset for the SoftDevice size value relative to the SoftDevice base address. - * The size value is of type uint32_t. */ -#define SD_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x08) - -/** @brief Defines the offset for FWID value relative to the SoftDevice base address. The FWID value - * is of type uint16_t. */ -#define SD_FWID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x0C) - -/** @brief Defines the offset for the SoftDevice ID relative to the SoftDevice base address. The ID - * is of type uint32_t. */ -#define SD_ID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x10) - -/** @brief Defines the offset for the SoftDevice version relative to the SoftDevice base address in - * the same format as @ref SD_VERSION, stored as an uint32_t. */ -#define SD_VERSION_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x14) - -/** @brief Defines a macro for retrieving the actual SoftDevice Information Structure size value - * from a given base address. Use @ref MBR_SIZE as the argument when the SoftDevice is - * installed just above the MBR (the usual case). */ -#define SD_INFO_STRUCT_SIZE_GET(baseaddr) (*((uint8_t *) ((baseaddr) + SD_INFO_STRUCT_SIZE_OFFSET))) - -/** @brief Defines a macro for retrieving the actual SoftDevice size value from a given base - * address. Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above - * the MBR (the usual case). */ -#define SD_SIZE_GET(baseaddr) (*((uint32_t *) ((baseaddr) + SD_SIZE_OFFSET))) - -/** @brief Defines a macro for retrieving the actual FWID value from a given base address. Use @ref - * MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the usual - * case). */ -#define SD_FWID_GET(baseaddr) (*((uint16_t *) ((baseaddr) + SD_FWID_OFFSET))) - -/** @brief Defines a macro for retrieving the actual SoftDevice ID from a given base address. Use - * @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the - * usual case). */ -#define SD_ID_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_ID_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ - ? (*((uint32_t *) ((baseaddr) + SD_ID_OFFSET))) : SDM_INFO_FIELD_INVALID) - -/** @brief Defines a macro for retrieving the actual FWID value from a given base address. Use @ref - * MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the usual - * case). */ -#define SD_VERSION_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_VERSION_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ - ? (*((uint32_t *) ((baseaddr) + SD_VERSION_OFFSET))) : SDM_INFO_FIELD_INVALID) - -/**@defgroup NRF_FAULT_ID_RANGES Fault ID ranges - * @{ */ -#define NRF_FAULT_ID_SD_RANGE_START 0x00000000 /**< SoftDevice ID range start. */ -#define NRF_FAULT_ID_APP_RANGE_START 0x00001000 /**< Application ID range start. */ -/**@} */ - -/**@defgroup NRF_FAULT_IDS Fault ID types - * @{ */ -#define NRF_FAULT_ID_SD_ASSERT (NRF_FAULT_ID_SD_RANGE_START + 1) /**< SoftDevice assertion. The info parameter is reserved for future used. */ -#define NRF_FAULT_ID_APP_MEMACC (NRF_FAULT_ID_APP_RANGE_START + 1) /**< Application invalid memory access (nRF52 only). The info parameter will contain 0x00000000, in case of SoftDevice RAM - access violation. In case of SoftDevice peripheral register violation the info parameter will contain the sub-region number of PREGION[0], on whose address range the disallowed - write access caused the memory access fault. */ -/**@} */ - -/** @} */ - -/** @addtogroup NRF_SDM_ENUMS Enumerations - * @{ */ - -/**@brief nRF SoftDevice Manager API SVC numbers. */ -enum NRF_SD_SVCS -{ - SD_SOFTDEVICE_ENABLE = SDM_SVC_BASE, /**< ::sd_softdevice_enable */ - SD_SOFTDEVICE_DISABLE, /**< ::sd_softdevice_disable */ - SD_SOFTDEVICE_IS_ENABLED, /**< ::sd_softdevice_is_enabled */ - SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, /**< ::sd_softdevice_vector_table_base_set */ - SVC_SDM_LAST /**< Placeholder for last SDM SVC */ -}; - -/** @} */ - -/** @addtogroup NRF_SDM_DEFINES Defines - * @{ */ - -/**@defgroup NRF_CLOCK_LF_XTAL_ACCURACY Clock accuracy - * @{ */ - -#define NRF_CLOCK_LF_XTAL_ACCURACY_250_PPM (0) /**< Default: 250 ppm */ -#define NRF_CLOCK_LF_XTAL_ACCURACY_500_PPM (1) /**< 500 ppm */ -#define NRF_CLOCK_LF_XTAL_ACCURACY_150_PPM (2) /**< 150 ppm */ -#define NRF_CLOCK_LF_XTAL_ACCURACY_100_PPM (3) /**< 100 ppm */ -#define NRF_CLOCK_LF_XTAL_ACCURACY_75_PPM (4) /**< 75 ppm */ -#define NRF_CLOCK_LF_XTAL_ACCURACY_50_PPM (5) /**< 50 ppm */ -#define NRF_CLOCK_LF_XTAL_ACCURACY_30_PPM (6) /**< 30 ppm */ -#define NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM (7) /**< 20 ppm */ -#define NRF_CLOCK_LF_XTAL_ACCURACY_10_PPM (8) /**< 10 ppm */ -#define NRF_CLOCK_LF_XTAL_ACCURACY_5_PPM (9) /**< 5 ppm */ -#define NRF_CLOCK_LF_XTAL_ACCURACY_2_PPM (10) /**< 2 ppm */ -#define NRF_CLOCK_LF_XTAL_ACCURACY_1_PPM (11) /**< 1 ppm */ - -/** @} */ - -/**@defgroup NRF_CLOCK_LF_SRC Possible LFCLK oscillator sources - * @{ */ - -#define NRF_CLOCK_LF_SRC_RC (0) /**< LFCLK RC oscillator. */ -#define NRF_CLOCK_LF_SRC_XTAL (1) /**< LFCLK crystal oscillator. */ -#define NRF_CLOCK_LF_SRC_SYNTH (2) /**< LFCLK Synthesized from HFCLK. */ - -/** @} */ - -/** @} */ - -/** @addtogroup NRF_SDM_TYPES Types - * @{ */ - -/**@brief Type representing LFCLK oscillator source. */ -typedef struct -{ - uint8_t source; /**< LF oscillator clock source, see @ref NRF_CLOCK_LF_SRC. */ - uint8_t rc_ctiv; /**< Only for NRF_CLOCK_LF_SRC_RC: Calibration timer interval in 1/4 second - units (nRF51: 1-64, nRF52: 1-32). - @note To avoid excessive clock drift, 0.5 degrees Celsius is the - maximum temperature change allowed in one calibration timer - interval. The interval should be selected to ensure this. - - @note Must be 0 if source is not NRF_CLOCK_LF_SRC_RC. */ - uint8_t rc_temp_ctiv; /**< Only for NRF_CLOCK_LF_SRC_RC: How often (in number of calibration - intervals) the RC oscillator shall be calibrated if the temperature - hasn't changed. - 0: Always calibrate even if the temperature hasn't changed. - 1: Only calibrate if the temperature has changed (nRF51 only). - 2-33: Check the temperature and only calibrate if it has changed, - however calibration will take place every rc_temp_ctiv - intervals in any case. - - @note Must be 0 if source is not NRF_CLOCK_LF_SRC_RC. - - @note For nRF52, the application must ensure calibration at least once - every 8 seconds to ensure +/-250 ppm clock stability. The - recommended configuration for NRF_CLOCK_LF_SRC_RC on nRF52 is - rc_ctiv=16 and rc_temp_ctiv=2. This will ensure calibration at - least once every 8 seconds and for temperature changes of 0.5 - degrees Celsius every 4 seconds. See the Product Specification - for the nRF52 device being used for more information.*/ - uint8_t xtal_accuracy; /**< External crystal clock accuracy used in the LL to compute timing - windows, see @ref NRF_CLOCK_LF_XTAL_ACCURACY. - - @note For the NRF_CLOCK_LF_SRC_RC clock source this parameter is ignored. */ -} nrf_clock_lf_cfg_t; - -/**@brief Fault Handler type. - * - * When certain unrecoverable errors occur within the application or SoftDevice the fault handler will be called back. - * The protocol stack will be in an undefined state when this happens and the only way to recover will be to - * perform a reset, using e.g. CMSIS NVIC_SystemReset(). - * If the application returns from the fault handler the SoftDevice will call NVIC_SystemReset(). - * - * @note This callback is executed in HardFault context, thus SVC functions cannot be called from the fault callback. - * - * @param[in] id Fault identifier. See @ref NRF_FAULT_IDS. - * @param[in] pc The program counter of the instruction that triggered the fault. - * @param[in] info Optional additional information regarding the fault. Refer to each Fault identifier for details. - * - * @note When id is set to NRF_FAULT_ID_APP_MEMACC, pc will contain the address of the instruction being executed at the time when - * the fault is detected by the CPU. The CPU program counter may have advanced up to 2 instructions (no branching) after the one that triggered the fault. - */ -typedef void (*nrf_fault_handler_t)(uint32_t id, uint32_t pc, uint32_t info); - -/** @} */ - -/** @addtogroup NRF_SDM_FUNCTIONS Functions - * @{ */ - -/**@brief Enables the SoftDevice and by extension the protocol stack. - * - * @note Some care must be taken if a low frequency clock source is already running when calling this function: - * If the LF clock has a different source then the one currently running, it will be stopped. Then, the new - * clock source will be started. - * - * @note This function has no effect when returning with an error. - * - * @post If return code is ::NRF_SUCCESS - * - SoC library and protocol stack APIs are made available. - * - A portion of RAM will be unavailable (see relevant SDS documentation). - * - Some peripherals will be unavailable or available only through the SoC API (see relevant SDS documentation). - * - Interrupts will not arrive from protected peripherals or interrupts. - * - nrf_nvic_ functions must be used instead of CMSIS NVIC_ functions for reliable usage of the SoftDevice. - * - Interrupt latency may be affected by the SoftDevice (see relevant SDS documentation). - * - Chosen low frequency clock source will be running. - * - * @param p_clock_lf_cfg Low frequency clock source and accuracy. - If NULL the clock will be configured as an RC source with rc_ctiv = 16 and .rc_temp_ctiv = 2 - In the case of XTAL source, the PPM accuracy of the chosen clock source must be greater than or equal to the actual characteristics of your XTAL clock. - * @param fault_handler Callback to be invoked in case of fault, cannot be NULL. - * - * @retval ::NRF_SUCCESS - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE SoftDevice is already enabled, and the clock source and fault handler cannot be updated. - * @retval ::NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION SoftDevice interrupt is already enabled, or an enabled interrupt has an illegal priority level. - * @retval ::NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN Unknown low frequency clock source selected. - */ -SVCALL(SD_SOFTDEVICE_ENABLE, uint32_t, sd_softdevice_enable(nrf_clock_lf_cfg_t const * p_clock_lf_cfg, nrf_fault_handler_t fault_handler)); - - -/**@brief Disables the SoftDevice and by extension the protocol stack. - * - * Idempotent function to disable the SoftDevice. - * - * @post SoC library and protocol stack APIs are made unavailable. - * @post All interrupts that was protected by the SoftDevice will be disabled and initialized to priority 0 (highest). - * @post All peripherals used by the SoftDevice will be reset to default values. - * @post All of RAM become available. - * @post All interrupts are forwarded to the application. - * @post LFCLK source chosen in ::sd_softdevice_enable will be left running. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_SOFTDEVICE_DISABLE, uint32_t, sd_softdevice_disable(void)); - -/**@brief Check if the SoftDevice is enabled. - * - * @param[out] p_softdevice_enabled If the SoftDevice is enabled: 1 else 0. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_SOFTDEVICE_IS_ENABLED, uint32_t, sd_softdevice_is_enabled(uint8_t * p_softdevice_enabled)); - -/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the SoftDevice - * - * This function is only intended to be called when a bootloader is enabled. - * - * @param[in] address The base address of the interrupt vector table for forwarded interrupts. - - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, uint32_t, sd_softdevice_vector_table_base_set(uint32_t address)); - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // NRF_SDM_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_soc.h deleted file mode 100644 index 875f9bb63fc..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_soc.h +++ /dev/null @@ -1,926 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @defgroup nrf_soc_api SoC Library API - * @{ - * - * @brief APIs for the SoC library. - * - */ - -#ifndef NRF_SOC_H__ -#define NRF_SOC_H__ - -#include -#include -#include "nrf_svc.h" -#include "nrf.h" - -#include "nrf_error_soc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@addtogroup NRF_SOC_DEFINES Defines - * @{ */ - -/**@brief The number of the lowest SVC number reserved for the SoC library. */ -#define SOC_SVC_BASE (0x20) /**< Base value for SVCs that are available when the SoftDevice is disabled. */ -#define SOC_SVC_BASE_NOT_AVAILABLE (0x2B) /**< Base value for SVCs that are not available when the SoftDevice is disabled. */ - -/**@brief Guaranteed time for application to process radio inactive notification. */ -#define NRF_RADIO_NOTIFICATION_INACTIVE_GUARANTEED_TIME_US (62) - -/**@brief The minimum allowed timeslot extension time. */ -#define NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US (200) - -#define SOC_ECB_KEY_LENGTH (16) /**< ECB key length. */ -#define SOC_ECB_CLEARTEXT_LENGTH (16) /**< ECB cleartext length. */ -#define SOC_ECB_CIPHERTEXT_LENGTH (SOC_ECB_CLEARTEXT_LENGTH) /**< ECB ciphertext length. */ - -#ifdef NRF51 -#define SD_EVT_IRQn (SWI2_IRQn) /**< SoftDevice Event IRQ number. Used for both protocol events and SoC events. */ -#define SD_EVT_IRQHandler (SWI2_IRQHandler) /**< SoftDevice Event IRQ handler. Used for both protocol events and SoC events. */ -#define RADIO_NOTIFICATION_IRQn (SWI1_IRQn) /**< The radio notification IRQ number. */ -#define RADIO_NOTIFICATION_IRQHandler (SWI1_IRQHandler) /**< The radio notification IRQ handler. */ -#endif -#if defined(NRF52) || defined(NRF52840_XXAA) -#define SD_EVT_IRQn (SWI2_EGU2_IRQn) /**< SoftDevice Event IRQ number. Used for both protocol events and SoC events. */ -#define SD_EVT_IRQHandler (SWI2_EGU2_IRQHandler) /**< SoftDevice Event IRQ handler. Used for both protocol events and SoC events. - The default interrupt priority for this handler is set to 4 */ -#define RADIO_NOTIFICATION_IRQn (SWI1_EGU1_IRQn) /**< The radio notification IRQ number. */ -#define RADIO_NOTIFICATION_IRQHandler (SWI1_EGU1_IRQHandler) /**< The radio notification IRQ handler. - The default interrupt priority for this handler is set to 4 */ -#endif - -#define NRF_RADIO_LENGTH_MIN_US (100) /**< The shortest allowed radio timeslot, in microseconds. */ -#define NRF_RADIO_LENGTH_MAX_US (100000) /**< The longest allowed radio timeslot, in microseconds. */ - -#define NRF_RADIO_DISTANCE_MAX_US (128000000UL - 1UL) /**< The longest timeslot distance, in microseconds, allowed for the distance parameter (see @ref nrf_radio_request_normal_t) in the request. */ - -#define NRF_RADIO_EARLIEST_TIMEOUT_MAX_US (128000000UL - 1UL) /**< The longest timeout, in microseconds, allowed when requesting the earliest possible timeslot. */ - -#define NRF_RADIO_START_JITTER_US (2) /**< The maximum jitter in @ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START relative to the requested start time. */ - -/**@} */ - -/**@addtogroup NRF_SOC_ENUMS Enumerations - * @{ */ - -/**@brief The SVC numbers used by the SVC functions in the SoC library. */ -enum NRF_SOC_SVCS -{ - SD_PPI_CHANNEL_ENABLE_GET = SOC_SVC_BASE, - SD_PPI_CHANNEL_ENABLE_SET, - SD_PPI_CHANNEL_ENABLE_CLR, - SD_PPI_CHANNEL_ASSIGN, - SD_PPI_GROUP_TASK_ENABLE, - SD_PPI_GROUP_TASK_DISABLE, - SD_PPI_GROUP_ASSIGN, - SD_PPI_GROUP_GET, - SD_FLASH_PAGE_ERASE, - SD_FLASH_WRITE, - SD_FLASH_PROTECT, - SD_MUTEX_NEW = SOC_SVC_BASE_NOT_AVAILABLE, - SD_MUTEX_ACQUIRE, - SD_MUTEX_RELEASE, - SD_RAND_APPLICATION_POOL_CAPACITY_GET, - SD_RAND_APPLICATION_BYTES_AVAILABLE_GET, - SD_RAND_APPLICATION_VECTOR_GET, - SD_POWER_MODE_SET, - SD_POWER_SYSTEM_OFF, - SD_POWER_RESET_REASON_GET, - SD_POWER_RESET_REASON_CLR, - SD_POWER_POF_ENABLE, - SD_POWER_POF_THRESHOLD_SET, - SD_POWER_RAM_POWER_SET, - SD_POWER_RAM_POWER_CLR, - SD_POWER_RAM_POWER_GET, - SD_POWER_GPREGRET_SET, - SD_POWER_GPREGRET_CLR, - SD_POWER_GPREGRET_GET, - SD_POWER_DCDC_MODE_SET, - SD_APP_EVT_WAIT, - SD_CLOCK_HFCLK_REQUEST, - SD_CLOCK_HFCLK_RELEASE, - SD_CLOCK_HFCLK_IS_RUNNING, - SD_RADIO_NOTIFICATION_CFG_SET, - SD_ECB_BLOCK_ENCRYPT, - SD_ECB_BLOCKS_ENCRYPT, - SD_RADIO_SESSION_OPEN, - SD_RADIO_SESSION_CLOSE, - SD_RADIO_REQUEST, - SD_EVT_GET, - SD_TEMP_GET, - SVC_SOC_LAST -}; - -/**@brief Possible values of a ::nrf_mutex_t. */ -enum NRF_MUTEX_VALUES -{ - NRF_MUTEX_FREE, - NRF_MUTEX_TAKEN -}; - -/**@brief Power modes. */ -enum NRF_POWER_MODES -{ - NRF_POWER_MODE_CONSTLAT, /**< Constant latency mode. See power management in the reference manual. */ - NRF_POWER_MODE_LOWPWR /**< Low power mode. See power management in the reference manual. */ -}; - - -/**@brief Power failure thresholds */ -enum NRF_POWER_THRESHOLDS -{ - NRF_POWER_THRESHOLD_V17 = 4UL, /**< 1.7 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V18, /**< 1.8 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V19, /**< 1.9 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V20, /**< 2.0 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V21, /**< 2.1 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V22, /**< 2.2 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V23, /**< 2.3 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V24, /**< 2.4 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V25, /**< 2.5 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V26, /**< 2.6 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V27, /**< 2.7 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V28 /**< 2.8 Volts power failure threshold. */ -}; - - -/**@brief DC/DC converter modes. */ -enum NRF_POWER_DCDC_MODES -{ - NRF_POWER_DCDC_DISABLE, /**< The DCDC is disabled. */ - NRF_POWER_DCDC_ENABLE /**< The DCDC is enabled. */ -}; - -/**@brief Radio notification distances. */ -enum NRF_RADIO_NOTIFICATION_DISTANCES -{ - NRF_RADIO_NOTIFICATION_DISTANCE_NONE = 0, /**< The event does not have a notification. */ - NRF_RADIO_NOTIFICATION_DISTANCE_800US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_1740US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_2680US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_3620US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_4560US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_5500US /**< The distance from the active notification to start of radio activity. */ -}; - - -/**@brief Radio notification types. */ -enum NRF_RADIO_NOTIFICATION_TYPES -{ - NRF_RADIO_NOTIFICATION_TYPE_NONE = 0, /**< The event does not have a radio notification signal. */ - NRF_RADIO_NOTIFICATION_TYPE_INT_ON_ACTIVE, /**< Using interrupt for notification when the radio will be enabled. */ - NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE, /**< Using interrupt for notification when the radio has been disabled. */ - NRF_RADIO_NOTIFICATION_TYPE_INT_ON_BOTH, /**< Using interrupt for notification both when the radio will be enabled and disabled. */ -}; - -/**@brief The Radio signal callback types. */ -enum NRF_RADIO_CALLBACK_SIGNAL_TYPE -{ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_START, /**< This signal indicates the start of the radio timeslot. */ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_TIMER0, /**< This signal indicates the NRF_TIMER0 interrupt. */ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_RADIO, /**< This signal indicates the NRF_RADIO interrupt. */ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_EXTEND_FAILED, /**< This signal indicates extend action failed. */ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_EXTEND_SUCCEEDED /**< This signal indicates extend action succeeded. */ -}; - -/**@brief The actions requested by the signal callback. - * - * This code gives the SOC instructions about what action to take when the signal callback has - * returned. - */ -enum NRF_RADIO_SIGNAL_CALLBACK_ACTION -{ - NRF_RADIO_SIGNAL_CALLBACK_ACTION_NONE, /**< Return without action. */ - NRF_RADIO_SIGNAL_CALLBACK_ACTION_EXTEND, /**< Request an extension of the current timeslot (maximum execution time for this action is when the extension succeeded). */ - NRF_RADIO_SIGNAL_CALLBACK_ACTION_END, /**< End the current radio timeslot. */ - NRF_RADIO_SIGNAL_CALLBACK_ACTION_REQUEST_AND_END /**< Request a new radio timeslot and end the current timeslot. */ -}; - -/**@brief Radio timeslot high frequency clock source configuration. */ -enum NRF_RADIO_HFCLK_CFG -{ - NRF_RADIO_HFCLK_CFG_XTAL_GUARANTEED, /**< The SoftDevice will guarantee that the high frequency clock source is the - external crystal for the whole duration of the timeslot. This should be the - preferred option for events that use the radio or require high timing accuracy. - @note The SoftDevice will automatically turn on and off the external crystal, - at the beginning and end of the timeslot, respectively. The crystal may also - intentionally be left running after the timeslot, in cases where it is needed - by the SoftDevice shortly after the end of the timeslot. */ - NRF_RADIO_HFCLK_CFG_NO_GUARANTEE /**< This configuration allows for earlier and tighter scheduling of timeslots. - The RC oscillator may be the clock source in part or for the whole duration of the timeslot. - The RC oscillator's accuracy must therefore be taken into consideration. - @note If the application will use the radio peripheral in timeslots with this configuration, - it must make sure that the crystal is running and stable before starting the radio. */ -}; - -/**@brief Radio timeslot priorities. */ -enum NRF_RADIO_PRIORITY -{ - NRF_RADIO_PRIORITY_HIGH, /**< High (equal priority as the normal connection priority of the SoftDevice stack(s)). */ - NRF_RADIO_PRIORITY_NORMAL, /**< Normal (equal priority as the priority of secondary activities of the SoftDevice stack(s)). */ -}; - -/**@brief Radio timeslot request type. */ -enum NRF_RADIO_REQUEST_TYPE -{ - NRF_RADIO_REQ_TYPE_EARLIEST, /**< Request radio timeslot as early as possible. This should always be used for the first request in a session. */ - NRF_RADIO_REQ_TYPE_NORMAL /**< Normal radio timeslot request. */ -}; - -/**@brief SoC Events. */ -enum NRF_SOC_EVTS -{ - NRF_EVT_HFCLKSTARTED, /**< Event indicating that the HFCLK has started. */ - NRF_EVT_POWER_FAILURE_WARNING, /**< Event indicating that a power failure warning has occurred. */ - NRF_EVT_FLASH_OPERATION_SUCCESS, /**< Event indicating that the ongoing flash operation has completed successfully. */ - NRF_EVT_FLASH_OPERATION_ERROR, /**< Event indicating that the ongoing flash operation has timed out with an error. */ - NRF_EVT_RADIO_BLOCKED, /**< Event indicating that a radio timeslot was blocked. */ - NRF_EVT_RADIO_CANCELED, /**< Event indicating that a radio timeslot was canceled by SoftDevice. */ - NRF_EVT_RADIO_SIGNAL_CALLBACK_INVALID_RETURN, /**< Event indicating that a radio timeslot signal callback handler return was invalid. */ - NRF_EVT_RADIO_SESSION_IDLE, /**< Event indicating that a radio timeslot session is idle. */ - NRF_EVT_RADIO_SESSION_CLOSED, /**< Event indicating that a radio timeslot session is closed. */ - NRF_EVT_NUMBER_OF_EVTS -}; - -/**@} */ - - -/**@addtogroup NRF_SOC_STRUCTURES Structures - * @{ */ - -/**@brief Represents a mutex for use with the nrf_mutex functions. - * @note Accessing the value directly is not safe, use the mutex functions! - */ -typedef volatile uint8_t nrf_mutex_t; - -/**@brief Parameters for a request for a timeslot as early as possible. */ -typedef struct -{ - uint8_t hfclk; /**< High frequency clock source, see @ref NRF_RADIO_HFCLK_CFG. */ - uint8_t priority; /**< The radio timeslot priority, see @ref NRF_RADIO_PRIORITY. */ - uint32_t length_us; /**< The radio timeslot length (in the range 100 to 100,000] microseconds). */ - uint32_t timeout_us; /**< Longest acceptable delay until the start of the requested timeslot (up to @ref NRF_RADIO_EARLIEST_TIMEOUT_MAX_US microseconds). */ -} nrf_radio_request_earliest_t; - -/**@brief Parameters for a normal radio timeslot request. */ -typedef struct -{ - uint8_t hfclk; /**< High frequency clock source, see @ref NRF_RADIO_HFCLK_CFG. */ - uint8_t priority; /**< The radio timeslot priority, see @ref NRF_RADIO_PRIORITY. */ - uint32_t distance_us; /**< Distance from the start of the previous radio timeslot (up to @ref NRF_RADIO_DISTANCE_MAX_US microseconds). */ - uint32_t length_us; /**< The radio timeslot length (in the range [100..100,000] microseconds). */ -} nrf_radio_request_normal_t; - -/**@brief Radio timeslot request parameters. */ -typedef struct -{ - uint8_t request_type; /**< Type of request, see @ref NRF_RADIO_REQUEST_TYPE. */ - union - { - nrf_radio_request_earliest_t earliest; /**< Parameters for requesting a radio timeslot as early as possible. */ - nrf_radio_request_normal_t normal; /**< Parameters for requesting a normal radio timeslot. */ - } params; /**< Parameter union. */ -} nrf_radio_request_t; - -/**@brief Return parameters of the radio timeslot signal callback. */ -typedef struct -{ - uint8_t callback_action; /**< The action requested by the application when returning from the signal callback, see @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION. */ - union - { - struct - { - nrf_radio_request_t * p_next; /**< The request parameters for the next radio timeslot. */ - } request; /**< Additional parameters for return_code @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION_REQUEST_AND_END. */ - struct - { - uint32_t length_us; /**< Requested extension of the radio timeslot duration (microseconds) (for minimum time see @ref NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US). */ - } extend; /**< Additional parameters for return_code @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION_EXTEND. */ - } params; /**< Parameter union. */ -} nrf_radio_signal_callback_return_param_t; - -/**@brief The radio timeslot signal callback type. - * - * @note In case of invalid return parameters, the radio timeslot will automatically end - * immediately after returning from the signal callback and the - * @ref NRF_EVT_RADIO_SIGNAL_CALLBACK_INVALID_RETURN event will be sent. - * @note The returned struct pointer must remain valid after the signal callback - * function returns. For instance, this means that it must not point to a stack variable. - * - * @param[in] signal_type Type of signal, see @ref NRF_RADIO_CALLBACK_SIGNAL_TYPE. - * - * @return Pointer to structure containing action requested by the application. - */ -typedef nrf_radio_signal_callback_return_param_t * (*nrf_radio_signal_callback_t) (uint8_t signal_type); - -/**@brief AES ECB parameter typedefs */ -typedef uint8_t soc_ecb_key_t[SOC_ECB_KEY_LENGTH]; /**< Encryption key type. */ -typedef uint8_t soc_ecb_cleartext_t[SOC_ECB_CLEARTEXT_LENGTH]; /**< Cleartext data type. */ -typedef uint8_t soc_ecb_ciphertext_t[SOC_ECB_CIPHERTEXT_LENGTH]; /**< Ciphertext data type. */ - -/**@brief AES ECB data structure */ -typedef struct -{ - soc_ecb_key_t key; /**< Encryption key. */ - soc_ecb_cleartext_t cleartext; /**< Cleartext data. */ - soc_ecb_ciphertext_t ciphertext; /**< Ciphertext data. */ -} nrf_ecb_hal_data_t; - -/**@brief AES ECB block. Used to provide multiple blocks in a single call - to @ref sd_ecb_blocks_encrypt.*/ -typedef struct -{ - soc_ecb_key_t const * p_key; /**< Pointer to the Encryption key. */ - soc_ecb_cleartext_t const * p_cleartext; /**< Pointer to the Cleartext data. */ - soc_ecb_ciphertext_t * p_ciphertext; /**< Pointer to the Ciphertext data. */ -} nrf_ecb_hal_data_block_t; - -/**@} */ - -/**@addtogroup NRF_SOC_FUNCTIONS Functions - * @{ */ - -/**@brief Initialize a mutex. - * - * @param[in] p_mutex Pointer to the mutex to initialize. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_MUTEX_NEW, uint32_t, sd_mutex_new(nrf_mutex_t * p_mutex)); - -/**@brief Attempt to acquire a mutex. - * - * @param[in] p_mutex Pointer to the mutex to acquire. - * - * @retval ::NRF_SUCCESS The mutex was successfully acquired. - * @retval ::NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN The mutex could not be acquired. - */ -SVCALL(SD_MUTEX_ACQUIRE, uint32_t, sd_mutex_acquire(nrf_mutex_t * p_mutex)); - -/**@brief Release a mutex. - * - * @param[in] p_mutex Pointer to the mutex to release. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_MUTEX_RELEASE, uint32_t, sd_mutex_release(nrf_mutex_t * p_mutex)); - -/**@brief Query the capacity of the application random pool. - * - * @param[out] p_pool_capacity The capacity of the pool. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_RAND_APPLICATION_POOL_CAPACITY_GET, uint32_t, sd_rand_application_pool_capacity_get(uint8_t * p_pool_capacity)); - -/**@brief Get number of random bytes available to the application. - * - * @param[out] p_bytes_available The number of bytes currently available in the pool. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_RAND_APPLICATION_BYTES_AVAILABLE_GET, uint32_t, sd_rand_application_bytes_available_get(uint8_t * p_bytes_available)); - -/**@brief Get random bytes from the application pool. - * - * @param[out] p_buff Pointer to unit8_t buffer for storing the bytes. - * @param[in] length Number of bytes to take from pool and place in p_buff. - * - * @retval ::NRF_SUCCESS The requested bytes were written to p_buff. - * @retval ::NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES No bytes were written to the buffer, because there were not enough bytes available. -*/ -SVCALL(SD_RAND_APPLICATION_VECTOR_GET, uint32_t, sd_rand_application_vector_get(uint8_t * p_buff, uint8_t length)); - -/**@brief Gets the reset reason register. - * - * @param[out] p_reset_reason Contents of the NRF_POWER->RESETREAS register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RESET_REASON_GET, uint32_t, sd_power_reset_reason_get(uint32_t * p_reset_reason)); - -/**@brief Clears the bits of the reset reason register. - * - * @param[in] reset_reason_clr_msk Contains the bits to clear from the reset reason register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RESET_REASON_CLR, uint32_t, sd_power_reset_reason_clr(uint32_t reset_reason_clr_msk)); - -/**@brief Sets the power mode when in CPU sleep. - * - * @param[in] power_mode The power mode to use when in CPU sleep, see @ref NRF_POWER_MODES. @sa sd_app_evt_wait - * - * @retval ::NRF_SUCCESS The power mode was set. - * @retval ::NRF_ERROR_SOC_POWER_MODE_UNKNOWN The power mode was unknown. - */ -SVCALL(SD_POWER_MODE_SET, uint32_t, sd_power_mode_set(uint8_t power_mode)); - -/**@brief Puts the chip in System OFF mode. - * - * @retval ::NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN - */ -SVCALL(SD_POWER_SYSTEM_OFF, uint32_t, sd_power_system_off(void)); - -/**@brief Enables or disables the power-fail comparator. - * - * Enabling this will give a SoftDevice event (NRF_EVT_POWER_FAILURE_WARNING) when the power failure warning occurs. - * The event can be retrieved with sd_evt_get(); - * - * @param[in] pof_enable True if the power-fail comparator should be enabled, false if it should be disabled. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_POF_ENABLE, uint32_t, sd_power_pof_enable(uint8_t pof_enable)); - -/**@brief Sets the power-fail threshold value. - * - * @param[in] threshold The power-fail threshold value to use, see @ref NRF_POWER_THRESHOLDS. - * - * @retval ::NRF_SUCCESS The power failure threshold was set. - * @retval ::NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN The power failure threshold is unknown. - */ -SVCALL(SD_POWER_POF_THRESHOLD_SET, uint32_t, sd_power_pof_threshold_set(uint8_t threshold)); - -/**@brief Writes the NRF_POWER->RAM[index].POWERSET register. - * - * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWERSET register to write to. - * @param[in] ram_powerset Contains the word to write to the NRF_POWER->RAM[index].POWERSET register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RAM_POWER_SET, uint32_t, sd_power_ram_power_set(uint8_t index, uint32_t ram_powerset)); - -/**@brief Writes the NRF_POWER->RAM[index].POWERCLR register. - * - * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWERCLR register to write to. - * @param[in] ram_powerclr Contains the word to write to the NRF_POWER->RAM[index].POWERCLR register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RAM_POWER_CLR, uint32_t, sd_power_ram_power_clr(uint8_t index, uint32_t ram_powerclr)); - -/**@brief Get contents of NRF_POWER->RAM[index].POWER register, indicates power status of RAM[index] blocks. - * - * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWER register to read from. - * @param[out] p_ram_power Content of NRF_POWER->RAM[index].POWER register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RAM_POWER_GET, uint32_t, sd_power_ram_power_get(uint8_t index, uint32_t * p_ram_power)); - -/**@brief Set bits in the general purpose retention registers (NRF_POWER->GPREGRET*). - * - * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. - * @param[in] gpregret_msk Bits to be set in the GPREGRET register. - * - * @note nRF51 does only have one general purpose retained register, so gpregret_id must be 0 on nRF51. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_GPREGRET_SET, uint32_t, sd_power_gpregret_set(uint32_t gpregret_id, uint32_t gpregret_msk)); - -/**@brief Clear bits in the general purpose retention registers (NRF_POWER->GPREGRET*). - * - * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. - * @param[in] gpregret_msk Bits to be clear in the GPREGRET register. - * - * @note nRF51 does only have one general purpose retained register, so gpregret_id must be 0 on nRF51. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_GPREGRET_CLR, uint32_t, sd_power_gpregret_clr(uint32_t gpregret_id, uint32_t gpregret_msk)); - -/**@brief Get contents of the general purpose retention registers (NRF_POWER->GPREGRET*). - * - * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. - * @param[out] p_gpregret Contents of the GPREGRET register. - * - * @note nRF51 does only have one general purpose retained register, so gpregret_id must be 0 on nRF51. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_GPREGRET_GET, uint32_t, sd_power_gpregret_get(uint32_t gpregret_id, uint32_t *p_gpregret)); - -/**@brief Sets the DCDC mode. - * - * Enable or disable the DCDC peripheral. - * - * @param[in] dcdc_mode The mode of the DCDC, see @ref NRF_POWER_DCDC_MODES. - * - * @retval ::NRF_SUCCESS - * @retval ::NRF_ERROR_INVALID_PARAM The DCDC mode is invalid. - */ -SVCALL(SD_POWER_DCDC_MODE_SET, uint32_t, sd_power_dcdc_mode_set(uint8_t dcdc_mode)); - -/**@brief Request the high frequency crystal oscillator. - * - * Will start the high frequency crystal oscillator, the startup time of the crystal varies - * and the ::sd_clock_hfclk_is_running function can be polled to check if it has started. - * - * @see sd_clock_hfclk_is_running - * @see sd_clock_hfclk_release - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_CLOCK_HFCLK_REQUEST, uint32_t, sd_clock_hfclk_request(void)); - -/**@brief Releases the high frequency crystal oscillator. - * - * Will stop the high frequency crystal oscillator, this happens immediately. - * - * @see sd_clock_hfclk_is_running - * @see sd_clock_hfclk_request - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_CLOCK_HFCLK_RELEASE, uint32_t, sd_clock_hfclk_release(void)); - -/**@brief Checks if the high frequency crystal oscillator is running. - * - * @see sd_clock_hfclk_request - * @see sd_clock_hfclk_release - * - * @param[out] p_is_running 1 if the external crystal oscillator is running, 0 if not. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_CLOCK_HFCLK_IS_RUNNING, uint32_t, sd_clock_hfclk_is_running(uint32_t * p_is_running)); - -/**@brief Waits for an application event. - * - * An application event is either an application interrupt or a pended interrupt when the - * interrupt is disabled. When the interrupt is enabled it will be taken immediately since - * this function will wait in thread mode, then the execution will return in the application's - * main thread. When an interrupt is disabled and gets pended it will return to the application's - * main thread. The application must ensure that the pended flag is cleared using - * ::sd_nvic_ClearPendingIRQ in order to sleep using this function. This is only necessary for - * disabled interrupts, as the interrupt handler will clear the pending flag automatically for - * enabled interrupts. - * - * In order to wake up from disabled interrupts, the SEVONPEND flag has to be set in the Cortex-M0 - * System Control Register (SCR). @sa CMSIS_SCB - * - * @note If an application interrupt has happened since the last time sd_app_evt_wait was - * called this function will return immediately and not go to sleep. This is to avoid race - * conditions that can occur when a flag is updated in the interrupt handler and processed - * in the main loop. - * - * @post An application interrupt has happened or a interrupt pending flag is set. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_APP_EVT_WAIT, uint32_t, sd_app_evt_wait(void)); - -/**@brief Get PPI channel enable register contents. - * - * @param[out] p_channel_enable The contents of the PPI CHEN register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_CHANNEL_ENABLE_GET, uint32_t, sd_ppi_channel_enable_get(uint32_t * p_channel_enable)); - -/**@brief Set PPI channel enable register. - * - * @param[in] channel_enable_set_msk Mask containing the bits to set in the PPI CHEN register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_CHANNEL_ENABLE_SET, uint32_t, sd_ppi_channel_enable_set(uint32_t channel_enable_set_msk)); - -/**@brief Clear PPI channel enable register. - * - * @param[in] channel_enable_clr_msk Mask containing the bits to clear in the PPI CHEN register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_CHANNEL_ENABLE_CLR, uint32_t, sd_ppi_channel_enable_clr(uint32_t channel_enable_clr_msk)); - -/**@brief Assign endpoints to a PPI channel. - * - * @param[in] channel_num Number of the PPI channel to assign. - * @param[in] evt_endpoint Event endpoint of the PPI channel. - * @param[in] task_endpoint Task endpoint of the PPI channel. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_CHANNEL The channel number is invalid. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_CHANNEL_ASSIGN, uint32_t, sd_ppi_channel_assign(uint8_t channel_num, const volatile void * evt_endpoint, const volatile void * task_endpoint)); - -/**@brief Task to enable a channel group. - * - * @param[in] group_num Number of the channel group. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_GROUP_TASK_ENABLE, uint32_t, sd_ppi_group_task_enable(uint8_t group_num)); - -/**@brief Task to disable a channel group. - * - * @param[in] group_num Number of the PPI group. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_GROUP_TASK_DISABLE, uint32_t, sd_ppi_group_task_disable(uint8_t group_num)); - -/**@brief Assign PPI channels to a channel group. - * - * @param[in] group_num Number of the channel group. - * @param[in] channel_msk Mask of the channels to assign to the group. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_GROUP_ASSIGN, uint32_t, sd_ppi_group_assign(uint8_t group_num, uint32_t channel_msk)); - -/**@brief Gets the PPI channels of a channel group. - * - * @param[in] group_num Number of the channel group. - * @param[out] p_channel_msk Mask of the channels assigned to the group. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_GROUP_GET, uint32_t, sd_ppi_group_get(uint8_t group_num, uint32_t * p_channel_msk)); - -/**@brief Configures the Radio Notification signal. - * - * @note - * - The notification signal latency depends on the interrupt priority settings of SWI used - * for notification signal. - * - To ensure that the radio notification signal behaves in a consistent way, the radio - * notifications must be configured when there is no protocol stack or other SoftDevice - * activity in progress. It is recommended that the radio notification signal is - * configured directly after the SoftDevice has been enabled. - * - In the period between the ACTIVE signal and the start of the Radio Event, the SoftDevice - * will interrupt the application to do Radio Event preparation. - * - Using the Radio Notification feature may limit the bandwidth, as the SoftDevice may have - * to shorten the connection events to have time for the Radio Notification signals. - * - * @param[in] type Type of notification signal, see @ref NRF_RADIO_NOTIFICATION_TYPES. - * @ref NRF_RADIO_NOTIFICATION_TYPE_NONE shall be used to turn off radio - * notification. Using @ref NRF_RADIO_NOTIFICATION_DISTANCE_NONE is - * recommended (but not required) to be used with - * @ref NRF_RADIO_NOTIFICATION_TYPE_NONE. - * - * @param[in] distance Distance between the notification signal and start of radio activity, see @ref NRF_RADIO_NOTIFICATION_DISTANCES. - * This parameter is ignored when @ref NRF_RADIO_NOTIFICATION_TYPE_NONE or - * @ref NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE is used. - * - * @retval ::NRF_ERROR_INVALID_PARAM The group number is invalid. - * @retval ::NRF_ERROR_INVALID_STATE A protocol stack or other SoftDevice is running. Stop all - * running activities and retry. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_RADIO_NOTIFICATION_CFG_SET, uint32_t, sd_radio_notification_cfg_set(uint8_t type, uint8_t distance)); - -/**@brief Encrypts a block according to the specified parameters. - * - * 128-bit AES encryption. - * - * @note: - * - The application may set the SEVONPEND bit in the SCR to 1 to make the SoftDevice sleep while - * the ECB is running. The SEVONPEND bit should only be cleared (set to 0) from application - * main or low interrupt level. - * - * @param[in, out] p_ecb_data Pointer to the ECB parameters' struct (two input - * parameters and one output parameter). - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_ECB_BLOCK_ENCRYPT, uint32_t, sd_ecb_block_encrypt(nrf_ecb_hal_data_t * p_ecb_data)); - -/**@brief Encrypts multiple data blocks provided as an array of data block structures. - * - * @details: Performs 128-bit AES encryption on multiple data blocks - * - * @note: - * - The application may set the SEVONPEND bit in the SCR to 1 to make the SoftDevice sleep while - * the ECB is running. The SEVONPEND bit should only be cleared (set to 0) from application - * main or low interrupt level. - * - * @param[in] block_count Count of blocks in the p_data_blocks array. - * @param[in,out] p_data_blocks Pointer to the first entry in a contiguous array of - * @ref nrf_ecb_hal_data_block_t structures. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_ECB_BLOCKS_ENCRYPT, uint32_t, sd_ecb_blocks_encrypt(uint8_t block_count, nrf_ecb_hal_data_block_t * p_data_blocks)); - -/**@brief Gets any pending events generated by the SoC API. - * - * The application should keep calling this function to get events, until ::NRF_ERROR_NOT_FOUND is returned. - * - * @param[out] p_evt_id Set to one of the values in @ref NRF_SOC_EVTS, if any events are pending. - * - * @retval ::NRF_SUCCESS An event was pending. The event id is written in the p_evt_id parameter. - * @retval ::NRF_ERROR_NOT_FOUND No pending events. - */ -SVCALL(SD_EVT_GET, uint32_t, sd_evt_get(uint32_t * p_evt_id)); - -/**@brief Get the temperature measured on the chip - * - * This function will block until the temperature measurement is done. - * It takes around 50 us from call to return. - * - * @param[out] p_temp Result of temperature measurement. Die temperature in 0.25 degrees Celsius. - * - * @retval ::NRF_SUCCESS A temperature measurement was done, and the temperature was written to temp - */ -SVCALL(SD_TEMP_GET, uint32_t, sd_temp_get(int32_t * p_temp)); - -/**@brief Flash Write -* -* Commands to write a buffer to flash -* -* If the SoftDevice is enabled: -* This call initiates the flash access command, and its completion will be communicated to the -* application with exactly one of the following events: -* - @ref NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed. -* - @ref NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started. -* -* If the SoftDevice is not enabled no event will be generated, and this call will return @ref NRF_SUCCESS when the - * write has been completed -* -* @note -* - This call takes control over the radio and the CPU during flash erase and write to make sure that -* they will not interfere with the flash access. This means that all interrupts will be blocked -* for a predictable time (depending on the NVMC specification in nRF51 Series Reference Manual -* and the command parameters). -* - The data in the p_src buffer should not be modified before the @ref NRF_EVT_FLASH_OPERATION_SUCCESS -* or the @ref NRF_EVT_FLASH_OPERATION_ERROR have been received if the SoftDevice is enabled. -* -* -* @param[in] p_dst Pointer to start of flash location to be written. -* @param[in] p_src Pointer to buffer with data to be written. -* @param[in] size Number of 32-bit words to write. Maximum size is 256 32-bit words for nRF51 and 1024 for nRF52. -* -* @retval ::NRF_ERROR_INVALID_ADDR Tried to write to a non existing flash address, or p_dst or p_src was unaligned. -* @retval ::NRF_ERROR_BUSY The previous command has not yet completed. -* @retval ::NRF_ERROR_INVALID_LENGTH Size was 0, or higher than the maximum allowed size. -* @retval ::NRF_ERROR_FORBIDDEN Tried to write to or read from protected location. -* @retval ::NRF_SUCCESS The command was accepted. -*/ -SVCALL(SD_FLASH_WRITE, uint32_t, sd_flash_write(uint32_t * p_dst, uint32_t const * p_src, uint32_t size)); - - -/**@brief Flash Erase page -* -* Commands to erase a flash page -* If the SoftDevice is enabled: -* This call initiates the flash access command, and its completion will be communicated to the -* application with exactly one of the following events: -* - @ref NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed. -* - @ref NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started. -* -* If the SoftDevice is not enabled no event will be generated, and this call will return @ref NRF_SUCCESS when the -* erase has been completed -* -* @note -* - This call takes control over the radio and the CPU during flash erase and write to make sure that -* they will not interfere with the flash access. This means that all interrupts will be blocked -* for a predictable time (depending on the NVMC specification in nRF51 Series Reference Manual -* and the command parameters). -* -* -* @param[in] page_number Page number of the page to erase -* -* @retval ::NRF_ERROR_INTERNAL If a new session could not be opened due to an internal error. -* @retval ::NRF_ERROR_INVALID_ADDR Tried to erase to a non existing flash page. -* @retval ::NRF_ERROR_BUSY The previous command has not yet completed. -* @retval ::NRF_ERROR_FORBIDDEN Tried to erase a protected page. -* @retval ::NRF_SUCCESS The command was accepted. -*/ -SVCALL(SD_FLASH_PAGE_ERASE, uint32_t, sd_flash_page_erase(uint32_t page_number)); - - -/**@brief Flash Protection set - * - * Commands to set the flash protection configuration registers. - On nRF51 this sets the PROTENSETx registers of the MPU peripheral. - On nRF52 this sets the CONFIGx registers of the BPROT peripheral. - * - * @note To read the values read them directly. They are only write-protected. - * - * @param[in] block_cfg0 Value to be written to the configuration register. - * @param[in] block_cfg1 Value to be written to the configuration register. - * @param[in] block_cfg2 Value to be written to the configuration register (ignored on nRF51). - * @param[in] block_cfg3 Value to be written to the configuration register (ignored on nRF51). - * - * @retval ::NRF_ERROR_FORBIDDEN Tried to protect the SoftDevice. - * @retval ::NRF_SUCCESS Values successfully written to configuration registers. - */ -SVCALL(SD_FLASH_PROTECT, uint32_t, sd_flash_protect(uint32_t block_cfg0, uint32_t block_cfg1, uint32_t block_cfg2, uint32_t block_cfg3)); - -/**@brief Opens a session for radio timeslot requests. - * - * @note Only one session can be open at a time. - * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START) will be called when the radio timeslot - * starts. From this point the NRF_RADIO and NRF_TIMER0 peripherals can be freely accessed - * by the application. - * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_TIMER0) is called whenever the NRF_TIMER0 - * interrupt occurs. - * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_RADIO) is called whenever the NRF_RADIO - * interrupt occurs. - * @note p_radio_signal_callback() will be called at ARM interrupt priority level 0. This - * implies that none of the sd_* API calls can be used from p_radio_signal_callback(). - * - * @param[in] p_radio_signal_callback The signal callback. - * - * @retval ::NRF_ERROR_INVALID_ADDR p_radio_signal_callback is an invalid function pointer. - * @retval ::NRF_ERROR_BUSY If session cannot be opened. - * @retval ::NRF_ERROR_INTERNAL If a new session could not be opened due to an internal error. - * @retval ::NRF_SUCCESS Otherwise. - */ - SVCALL(SD_RADIO_SESSION_OPEN, uint32_t, sd_radio_session_open(nrf_radio_signal_callback_t p_radio_signal_callback)); - -/**@brief Closes a session for radio timeslot requests. - * - * @note Any current radio timeslot will be finished before the session is closed. - * @note If a radio timeslot is scheduled when the session is closed, it will be canceled. - * @note The application cannot consider the session closed until the @ref NRF_EVT_RADIO_SESSION_CLOSED - * event is received. - * - * @retval ::NRF_ERROR_FORBIDDEN If session not opened. - * @retval ::NRF_ERROR_BUSY If session is currently being closed. - * @retval ::NRF_SUCCESS Otherwise. - */ - SVCALL(SD_RADIO_SESSION_CLOSE, uint32_t, sd_radio_session_close(void)); - -/**@brief Requests a radio timeslot. - * - * @note The request type is determined by p_request->request_type, and can be one of @ref NRF_RADIO_REQ_TYPE_EARLIEST - * and @ref NRF_RADIO_REQ_TYPE_NORMAL. The first request in a session must always be of type @ref NRF_RADIO_REQ_TYPE_EARLIEST. - * @note For a normal request (@ref NRF_RADIO_REQ_TYPE_NORMAL), the start time of a radio timeslot is specified by - * p_request->distance_us and is given relative to the start of the previous timeslot. - * @note A too small p_request->distance_us will lead to a @ref NRF_EVT_RADIO_BLOCKED event. - * @note Timeslots scheduled too close will lead to a @ref NRF_EVT_RADIO_BLOCKED event. - * @note See the SoftDevice Specification for more on radio timeslot scheduling, distances and lengths. - * @note If an opportunity for the first radio timeslot is not found before 100 ms after the call to this - * function, it is not scheduled, and instead a @ref NRF_EVT_RADIO_BLOCKED event is sent. - * The application may then try to schedule the first radio timeslot again. - * @note Successful requests will result in nrf_radio_signal_callback_t(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START). - * Unsuccessful requests will result in a @ref NRF_EVT_RADIO_BLOCKED event, see @ref NRF_SOC_EVTS. - * @note The jitter in the start time of the radio timeslots is +/- @ref NRF_RADIO_START_JITTER_US us. - * @note The nrf_radio_signal_callback_t(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START) call has a latency relative to the - * specified radio timeslot start, but this does not affect the actual start time of the timeslot. - * @note NRF_TIMER0 is reset at the start of the radio timeslot, and is clocked at 1MHz from the high frequency - * (16 MHz) clock source. If p_request->hfclk_force_xtal is true, the high frequency clock is - * guaranteed to be clocked from the external crystal. - * @note The SoftDevice will neither access the NRF_RADIO peripheral nor the NRF_TIMER0 peripheral - * during the radio timeslot. - * - * @param[in] p_request Pointer to the request parameters. - * - * @retval ::NRF_ERROR_FORBIDDEN If session not opened or the session is not IDLE. - * @retval ::NRF_ERROR_INVALID_ADDR If the p_request pointer is invalid. - * @retval ::NRF_ERROR_INVALID_PARAM If the parameters of p_request are not valid. - * @retval ::NRF_SUCCESS Otherwise. - */ - SVCALL(SD_RADIO_REQUEST, uint32_t, sd_radio_request(nrf_radio_request_t const * p_request)); - -/**@} */ - -#ifdef __cplusplus -} -#endif -#endif // NRF_SOC_H__ - -/**@} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_svc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_svc.h deleted file mode 100644 index 31ea671529f..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/headers/nrf_svc.h +++ /dev/null @@ -1,88 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef NRF_SVC__ -#define NRF_SVC__ - -#include "stdint.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef SVCALL_AS_NORMAL_FUNCTION -#define SVCALL(number, return_type, signature) return_type signature -#else - -#ifndef SVCALL -#if defined (__CC_ARM) -#define SVCALL(number, return_type, signature) return_type __svc(number) signature -#elif defined (__GNUC__) -#ifdef __cplusplus -#define GCC_CAST_CPP (uint16_t) -#else -#define GCC_CAST_CPP -#endif -#define SVCALL(number, return_type, signature) \ - _Pragma("GCC diagnostic push") \ - _Pragma("GCC diagnostic ignored \"-Wreturn-type\"") \ - __attribute__((naked)) \ - __attribute__((unused)) \ - static return_type signature \ - { \ - __asm( \ - "svc %0\n" \ - "bx r14" : : "I" (GCC_CAST_CPP number) : "r0" \ - ); \ - } \ - _Pragma("GCC diagnostic pop") - -#elif defined (__ICCARM__) -#define PRAGMA(x) _Pragma(#x) -#define SVCALL(number, return_type, signature) \ -PRAGMA(swi_number = (number)) \ - __swi return_type signature; -#else -#define SVCALL(number, return_type, signature) return_type signature -#endif -#endif // SVCALL - -#endif // SVCALL_AS_NORMAL_FUNCTION - -#ifdef __cplusplus -} -#endif -#endif // NRF_SVC__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/hex/s140_nrf52840_5.0.0-2.alpha_licence-agreement.txt b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/hex/s140_nrf52840_5.0.0-2.alpha_licence-agreement.txt deleted file mode 100644 index b8d26c9a84f..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/hex/s140_nrf52840_5.0.0-2.alpha_licence-agreement.txt +++ /dev/null @@ -1,96 +0,0 @@ -S110/S120/S130/S132/S140 license agreement - - -NORDIC SEMICONDUCTOR ASA SOFTDEVICE LICENSE AGREEMENT - -License Agreement for the Nordic Semiconductor ASA ("Nordic") S110, S120, S130, S132, and S140 Bluetooth SoftDevice software packages -("SoftDevice"). - -You ("You" "Licensee") must carefully and thoroughly read this License Agreement ("Agreement"), and accept to adhere to this Agreement before -downloading, installing and/or using any software or content in the SoftDevice provided herewith. - -YOU ACCEPT THIS LICENSE AGREEMENT BY (A) CLICKING ACCEPT OR AGREE TO THIS LICENSE AGREEMENT, WHERE THIS -OPTION IS MADE AVAILABLE TO YOU; OR (B) BY ACTUALLY USING THE SOFTDEVICE, IN THIS CASE YOU AGREE THAT THE USE OF -THE SOFTDEVICE CONSTITUTES ACCEPTANCE OF THE LICENSING AGREEMENT FROM THAT POINT ONWARDS. - -IF YOU DO NOT AGREE TO BE BOUND BY THE TERMS OF THIS AGREEMENT, THEN DO NOT DOWNLOAD, INSTALL/COMPLETE -INSTALLATION OF, OR IN ANY OTHER WAY MAKE USE OF THE SOFTDEVICE. - -1. Grant of License -Subject to the terms in this Agreement Nordic grants Licensee a limited, non-exclusive, non-transferable, non-sub licensable, revocable license -("License"): (a) to use the SoftDevice solely in connection with a Nordic integrated circuit, and (b) to distribute the SoftDevice solely as integrated -in Licensee Product. Licensee shall not use the SoftDevice for any purpose other than specifically authorized herein. It is a material breach of this -agreement to use or modify the SoftDevice for use on any wireless connectivity integrated circuit other than a Nordic integrated circuit. - -2. Title -Nordic retains full rights, title, and ownership to the SoftDevice and any and all patents, copyrights, trade secrets, trade names, trademarks, and -other intellectual property rights in and to the SoftDevice. - -3. No Modifications or Reverse Engineering -Licensee shall not, modify, reverse engineer, disassemble, decompile or otherwise attempt to discover the source code of any non-source code -parts of the SoftDevice including, but not limited to pre-compiled hex files, binaries and object code. - -4. Distribution Restrictions -Except as set forward in Section 1 above, the Licensee may not disclose or distribute any or all parts of the SoftDevice to any third party. -Licensee agrees to provide reasonable security precautions to prevent unauthorized access to or use of the SoftDevice as proscribed herein. -Licensee also agrees that use of and access to the SoftDevice will be strictly limited to the employees and subcontractors of the Licensee -necessary for the performance of development, verification and production tasks under this Agreement. The Licensee is responsible for making -such employees and subcontractors comply with the obligations concerning use and non-disclosure of the SoftDevice. - -5. No Other Rights -Licensee shall use the SoftDevice only in compliance with this Agreement and shall refrain from using the SoftDevice in any way that may be -contrary to this Agreement. - -6. Fees -Nordic grants the License to the Licensee free of charge provided that the Licensee undertakes the obligations in the Agreement and warrants to -comply with the Agreement. - -7. DISCLAIMER OF WARRANTY -THE SOFTDEVICE IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND EXPRESS OR IMPLIED AND NEITHER NORDIC, ITS -LICENSORS OR AFFILIATES NOR THE COPYRIGHT HOLDERS MAKE ANY REPRESENTATIONS OR WARRANTIES, EXPRESS OR -IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR -THAT THE SOFTDEVICE WILL NOT INFRINGE ANY THIRD PARTY PATENTS, COPYRIGHTS, TRADEMARKS OR OTHER RIGHTS. THERE -IS NO WARRANTY BY NORDIC OR BY ANY OTHER PARTY THAT THE FUNCTIONS CONTAINED IN THE SOFTDEVICE WILL MEET THE -REQUIREMENTS OF LICENSEE OR THAT THE OPERATION OF THE SOFTDEVICE WILL BE UNINTERRUPTED OR ERROR-FREE. -LICENSEE ASSUMES ALL RESPONSIBILITY AND RISK FOR THE SELECTION OF THE SOFTDEVICE TO ACHIEVE LICENSEE’S -INTENDED RESULTS AND FOR THE INSTALLATION, USE AND RESULTS OBTAINED FROM IT. - - -8. No Support -Nordic is not obligated to furnish or make available to Licensee any further information, software, technical information, know-how, show-how, -bug-fixes or support. Nordic reserves the right to make changes to the SoftDevice without further notice. - -9. Limitation of Liability -In no event shall Nordic, its employees or suppliers, licensors or affiliates be liable for any lost profits, revenue, sales, data or costs of -procurement of substitute goods or services, property damage, personal injury, interruption of business, loss of business information or for any -special, direct, indirect, incidental, economic, punitive, special or consequential damages, however caused and whether arising under contract, -tort, negligence, or other theory of liability arising out of the use of or inability to use the SoftDevice, even if Nordic or its employees or suppliers, -licensors or affiliates are advised of the possibility of such damages. Because some countries/states/jurisdictions do not allow the exclusion or -limitation of liability, but may allow liability to be limited, in such cases, Nordic, its employees or licensors or affiliates’ liability shall be limited to -USD 50. - -10. Breach of Contract -Upon a breach of contract by the Licensee, Nordic and its licensor are entitled to damages in respect of any direct loss which can be reasonably -attributed to the breach by the Licensee. If the Licensee has acted with gross negligence or willful misconduct, the Licensee shall cover both -direct and indirect costs for Nordic and its licensors. - -11. Indemnity -Licensee undertakes to indemnify, hold harmless and defend Nordic and its directors, officers, affiliates, shareholders, licensors, employees and -agents from and against any claims or lawsuits, including attorney's fees, that arise or result of the Licensee’s execution of the License and which -is not due to causes for which Nordic is responsible. - -12. Governing Law -This Agreement shall be construed according to the laws of Norway, and hereby submits to the exclusive jurisdiction of the Oslo tingrett. - -13. Assignment -Licensee shall not assign this Agreement or any rights or obligations hereunder without the prior written consent of Nordic. - -14. Termination -Without prejudice to any other rights, Nordic may cancel this Agreement if Licensee does not abide by the terms and conditions of this -Agreement. Upon termination Licensee must promptly cease the use of the License and destroy all copies of the Licensed Technology and any -other material provided by Nordic or its affiliate, or produced by the Licensee in connection with the Agreement or the Licensed Technology. - -15. Third party beneficiaries -Nordic’s licensors are intended third party beneficiaries under this Agreement. - - diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/hex/s140_nrf52840_5.0.0-2.alpha_softdevice.hex b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/hex/s140_nrf52840_5.0.0-2.alpha_softdevice.hex deleted file mode 100644 index a45fac6daa1..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/hex/s140_nrf52840_5.0.0-2.alpha_softdevice.hex +++ /dev/null @@ -1,8363 +0,0 @@ -:020000040000FA -:1000000000040020E508000079050000C508000094 -:10001000830500008D05000097050000000000002A -:1000200000000000000000000000000009090000BE -:10003000A105000000000000AB050000B5050000B0 -:10004000BF050000C9050000D3050000DD05000064 -:10005000E7050000F1050000FB05000005060000B3 -:100060000F06000019060000230600002D06000000 -:1000700037060000410600004B0600005506000050 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a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_FULL/mbed_lib.json +++ /dev/null @@ -1,40 +0,0 @@ -{ - "name": "softdevice", - "macros": [ - "SOFTDEVICE_PRESENT=1", - "S140", - "BLE_STACK_SUPPORT_REQD", - "NRF_SDH_CLOCK_LF_XTAL_ACCURACY=7", - "NRF_SD_BLE_API_VERSION=5", - "NRF_SDH_ENABLED=1", - "NRF_SDH_BLE_ENABLED=1", - "PEER_MANAGER_ENABLED=1", - "NRF_SDH_BLE_GATT_MAX_MTU_SIZE=23", - "NRF_SDH_BLE_OBSERVER_PRIO_LEVELS=4", - "NRF_SDH_BLE_GAP_EVENT_LENGTH=3", - "BLE_ADV_BLE_OBSERVER_PRIO=1", - "BLE_CONN_STATE_BLE_OBSERVER_PRIO=0", - "BLE_CONN_PARAMS_BLE_OBSERVER_PRIO=1", - "NRF_BLE_GATT_BLE_OBSERVER_PRIO=1", - "NRF_SDH_DISPATCH_MODEL=2", - "NRF_SDH_SOC_ENABLED=1", - "NRF_SDH_STACK_OBSERVER_PRIO_LEVELS=2", - "NRF_SDH_STATE_OBSERVER_PRIO_LEVELS=2", - "NRF_SDH_SOC_OBSERVER_PRIO_LEVELS=2", - "NRF_SDH_REQ_OBSERVER_PRIO_LEVELS=2", - "NRF_SDH_BLE_STACK_OBSERVER_PRIO=0", - "NRF_SDH_SOC_STACK_OBSERVER_PRIO=0", - "FDS_BACKEND=2", - "SWI_DISABLE1", - "SWI_DISABLE2", - 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S140 Bluetooth SoftDevice software packages -("SoftDevice"). - -You ("You" "Licensee") must carefully and thoroughly read this License Agreement ("Agreement"), and accept to adhere to this Agreement before -downloading, installing and/or using any software or content in the SoftDevice provided herewith. - -YOU ACCEPT THIS LICENSE AGREEMENT BY (A) CLICKING ACCEPT OR AGREE TO THIS LICENSE AGREEMENT, WHERE THIS -OPTION IS MADE AVAILABLE TO YOU; OR (B) BY ACTUALLY USING THE SOFTDEVICE, IN THIS CASE YOU AGREE THAT THE USE OF -THE SOFTDEVICE CONSTITUTES ACCEPTANCE OF THE LICENSING AGREEMENT FROM THAT POINT ONWARDS. - -IF YOU DO NOT AGREE TO BE BOUND BY THE TERMS OF THIS AGREEMENT, THEN DO NOT DOWNLOAD, INSTALL/COMPLETE -INSTALLATION OF, OR IN ANY OTHER WAY MAKE USE OF THE SOFTDEVICE. - -1. Grant of License -Subject to the terms in this Agreement Nordic grants Licensee a limited, non-exclusive, non-transferable, non-sub licensable, revocable license -("License"): (a) to use the SoftDevice solely in connection with a Nordic integrated circuit, and (b) to distribute the SoftDevice solely as integrated -in Licensee Product. Licensee shall not use the SoftDevice for any purpose other than specifically authorized herein. It is a material breach of this -agreement to use or modify the SoftDevice for use on any wireless connectivity integrated circuit other than a Nordic integrated circuit. - -2. Title -Nordic retains full rights, title, and ownership to the SoftDevice and any and all patents, copyrights, trade secrets, trade names, trademarks, and -other intellectual property rights in and to the SoftDevice. - -3. No Modifications or Reverse Engineering -Licensee shall not, modify, reverse engineer, disassemble, decompile or otherwise attempt to discover the source code of any non-source code -parts of the SoftDevice including, but not limited to pre-compiled hex files, binaries and object code. - -4. Distribution Restrictions -Except as set forward in Section 1 above, the Licensee may not disclose or distribute any or all parts of the SoftDevice to any third party. -Licensee agrees to provide reasonable security precautions to prevent unauthorized access to or use of the SoftDevice as proscribed herein. -Licensee also agrees that use of and access to the SoftDevice will be strictly limited to the employees and subcontractors of the Licensee -necessary for the performance of development, verification and production tasks under this Agreement. The Licensee is responsible for making -such employees and subcontractors comply with the obligations concerning use and non-disclosure of the SoftDevice. - -5. No Other Rights -Licensee shall use the SoftDevice only in compliance with this Agreement and shall refrain from using the SoftDevice in any way that may be -contrary to this Agreement. - -6. Fees -Nordic grants the License to the Licensee free of charge provided that the Licensee undertakes the obligations in the Agreement and warrants to -comply with the Agreement. - -7. DISCLAIMER OF WARRANTY -THE SOFTDEVICE IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND EXPRESS OR IMPLIED AND NEITHER NORDIC, ITS -LICENSORS OR AFFILIATES NOR THE COPYRIGHT HOLDERS MAKE ANY REPRESENTATIONS OR WARRANTIES, EXPRESS OR -IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR -THAT THE SOFTDEVICE WILL NOT INFRINGE ANY THIRD PARTY PATENTS, COPYRIGHTS, TRADEMARKS OR OTHER RIGHTS. THERE -IS NO WARRANTY BY NORDIC OR BY ANY OTHER PARTY THAT THE FUNCTIONS CONTAINED IN THE SOFTDEVICE WILL MEET THE -REQUIREMENTS OF LICENSEE OR THAT THE OPERATION OF THE SOFTDEVICE WILL BE UNINTERRUPTED OR ERROR-FREE. -LICENSEE ASSUMES ALL RESPONSIBILITY AND RISK FOR THE SELECTION OF THE SOFTDEVICE TO ACHIEVE LICENSEE’S -INTENDED RESULTS AND FOR THE INSTALLATION, USE AND RESULTS OBTAINED FROM IT. - - -8. No Support -Nordic is not obligated to furnish or make available to Licensee any further information, software, technical information, know-how, show-how, -bug-fixes or support. Nordic reserves the right to make changes to the SoftDevice without further notice. - -9. Limitation of Liability -In no event shall Nordic, its employees or suppliers, licensors or affiliates be liable for any lost profits, revenue, sales, data or costs of -procurement of substitute goods or services, property damage, personal injury, interruption of business, loss of business information or for any -special, direct, indirect, incidental, economic, punitive, special or consequential damages, however caused and whether arising under contract, -tort, negligence, or other theory of liability arising out of the use of or inability to use the SoftDevice, even if Nordic or its employees or suppliers, -licensors or affiliates are advised of the possibility of such damages. Because some countries/states/jurisdictions do not allow the exclusion or -limitation of liability, but may allow liability to be limited, in such cases, Nordic, its employees or licensors or affiliates’ liability shall be limited to -USD 50. - -10. Breach of Contract -Upon a breach of contract by the Licensee, Nordic and its licensor are entitled to damages in respect of any direct loss which can be reasonably -attributed to the breach by the Licensee. If the Licensee has acted with gross negligence or willful misconduct, the Licensee shall cover both -direct and indirect costs for Nordic and its licensors. - -11. Indemnity -Licensee undertakes to indemnify, hold harmless and defend Nordic and its directors, officers, affiliates, shareholders, licensors, employees and -agents from and against any claims or lawsuits, including attorney's fees, that arise or result of the Licensee’s execution of the License and which -is not due to causes for which Nordic is responsible. - -12. Governing Law -This Agreement shall be construed according to the laws of Norway, and hereby submits to the exclusive jurisdiction of the Oslo tingrett. - -13. Assignment -Licensee shall not assign this Agreement or any rights or obligations hereunder without the prior written consent of Nordic. - -14. Termination -Without prejudice to any other rights, Nordic may cancel this Agreement if Licensee does not abide by the terms and conditions of this -Agreement. Upon termination Licensee must promptly cease the use of the License and destroy all copies of the Licensed Technology and any -other material provided by Nordic or its affiliate, or produced by the Licensee in connection with the Agreement or the Licensed Technology. - -15. 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-:2008C000012B7047014B1B68DB6818470000002009480A497047FFF7FBFFFFF713FC00BD97 -:2008E00020BFFDE7064B1847064A1060016881F30888406800470000680900006809000087 -:200900001D030000000000201EF0040F0CBFEFF30881EFF30981886902380078182803D11D -:2009200000E00000074A1047074A12682C3212681047000000B5054B1B68054A9B5898478C -:2009400000BD000005030000000000205409000004000000001000000000000000FFFFFF44 -:040960000090D00330 -:00000001FF diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/libraries/fstorage/nrf_fstorage_nvmc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/libraries/fstorage/nrf_fstorage_nvmc.c deleted file mode 100644 index b7c1ac01f6e..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/libraries/fstorage/nrf_fstorage_nvmc.c +++ /dev/null @@ -1,215 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" - -#if NRF_MODULE_ENABLED(NRF_FSTORAGE) - -#include "nrf_fstorage_nvmc.h" -#include -#include -#include -#include "nrf_nvmc.h" -#include "nrf_atomic.h" - - -static nrf_fstorage_info_t m_flash_info = -{ -#if defined(NRF51) - .erase_unit = 1024, -#elif defined(NRF52_SERIES) - .erase_unit = 4096, -#endif - .program_unit = 4, - .rmap = true, - .wmap = false, -}; - - - /* An operation initiated by fstorage is ongoing. */ -static nrf_atomic_flag_t m_flash_operation_ongoing; - - -/* Send event to the event handler. */ -static void event_send(nrf_fstorage_t const * p_fs, - nrf_fstorage_evt_id_t evt_id, - uint32_t addr, - uint32_t len, - void * p_param) -{ - if (p_fs->evt_handler == NULL) - { - /* Nothing to do. */ - return; - } - - nrf_fstorage_evt_t evt = - { - .result = NRF_SUCCESS, - .id = evt_id, - .addr = addr, - .len = len, - .p_param = p_param, - }; - - p_fs->evt_handler(&evt); -} - - -static ret_code_t init(nrf_fstorage_t * p_fs, void * p_param) -{ - UNUSED_PARAMETER(p_param); - - p_fs->p_flash_info = &m_flash_info; - - return NRF_SUCCESS; -} - - -static ret_code_t uninit(nrf_fstorage_t * p_fs, void * p_param) -{ - UNUSED_PARAMETER(p_fs); - UNUSED_PARAMETER(p_param); - - (void) nrf_atomic_flag_clear(&m_flash_operation_ongoing); - - return NRF_SUCCESS; -} - - -static ret_code_t read(nrf_fstorage_t const * p_fs, uint32_t src, void * p_dest, uint32_t len) -{ - UNUSED_PARAMETER(p_fs); - - memcpy(p_dest, (uint32_t*)src, len); - - return NRF_SUCCESS; -} - - -static ret_code_t write(nrf_fstorage_t const * p_fs, - uint32_t dest, - void const * p_src, - uint32_t len, - void * p_param) -{ - if (nrf_atomic_flag_set_fetch(&m_flash_operation_ongoing)) - { - return NRF_ERROR_BUSY; - } - - nrf_nvmc_write_words(dest, (uint32_t*)p_src, (len / m_flash_info.program_unit)); - - /* Clear the flag before sending the event, to allow API calls in the event context. */ - (void) nrf_atomic_flag_clear(&m_flash_operation_ongoing); - - event_send(p_fs, NRF_FSTORAGE_EVT_WRITE_RESULT, dest, len, p_param); - - return NRF_SUCCESS; -} - - -static ret_code_t erase(nrf_fstorage_t const * p_fs, - uint32_t page_addr, - uint32_t len, - void * p_param) -{ - uint32_t progress = 0; - - if (nrf_atomic_flag_set_fetch(&m_flash_operation_ongoing)) - { - return NRF_ERROR_BUSY; - } - - while (progress != len) - { - nrf_nvmc_page_erase(page_addr + (progress * m_flash_info.erase_unit)); - progress++; - } - - /* Clear the flag before sending the event, to allow API calls in the event context. */ - (void) nrf_atomic_flag_clear(&m_flash_operation_ongoing); - - event_send(p_fs, NRF_FSTORAGE_EVT_ERASE_RESULT, page_addr, len, p_param); - - return NRF_SUCCESS; -} - - -static uint8_t const * rmap(nrf_fstorage_t const * p_fs, uint32_t addr) -{ - UNUSED_PARAMETER(p_fs); - - return (uint8_t*)addr; -} - - -static uint8_t * wmap(nrf_fstorage_t const * p_fs, uint32_t addr) -{ - UNUSED_PARAMETER(p_fs); - UNUSED_PARAMETER(addr); - - /* Not supported. */ - return NULL; -} - - -static bool is_busy(nrf_fstorage_t const * p_fs) -{ - UNUSED_PARAMETER(p_fs); - - return m_flash_operation_ongoing; -} - - -/* The exported API. */ -nrf_fstorage_api_t nrf_fstorage_nvmc = -{ - .init = init, - .uninit = uninit, - .read = read, - .write = write, - .erase = erase, - .rmap = rmap, - .wmap = wmap, - .is_busy = is_busy -}; - - -#endif // NRF_FSTORAGE_ENABLED diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/libraries/fstorage/nrf_fstorage_nvmc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/libraries/fstorage/nrf_fstorage_nvmc.h deleted file mode 100644 index be3477556cc..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/libraries/fstorage/nrf_fstorage_nvmc.h +++ /dev/null @@ -1,75 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - * @file - * - * @defgroup nrf_fstorage_nvmc NVMC implementation - * @ingroup nrf_fstorage - * @{ - * - * @brief API implementation of fstorage that uses the non-volatile memory controller (NVMC). -*/ - -#ifndef NRF_FSTORAGE_NVMC_H__ -#define NRF_FSTORAGE_NVMC_H__ - -#include "nrf_fstorage.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -/**@brief API implementation that uses the non-volatile memory controller. - * - * @details An fstorage instance with this API implementation can be initialized by providing - * this structure as a parameter to @ref nrf_fstorage_init. - * The structure is defined in @c nrf_fstorage_nvmc.c. - */ -extern nrf_fstorage_api_t nrf_fstorage_nvmc; - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_FSTORAGE_NVMC_H__ -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/mbed_lib.json b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/mbed_lib.json deleted file mode 100644 index ad2b10536e6..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/mbed_lib.json +++ /dev/null @@ -1,8 +0,0 @@ -{ - "name": "softdevice_mbr", - "target_overrides": { - "*": { - "target.bootloader_img": "hex/s140_nrf52840_5.0.0-2.alpha_mbr.hex" - } - } -} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/mbr/nrf_mbr.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/mbr/nrf_mbr.h deleted file mode 100644 index ccbe96bd59e..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/mbr/nrf_mbr.h +++ /dev/null @@ -1,212 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - @defgroup nrf_mbr_api Master Boot Record API - @{ - - @brief APIs for updating SoftDevice and BootLoader - -*/ - -#ifndef NRF_MBR_H__ -#define NRF_MBR_H__ - -#include "nrf_svc.h" -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup NRF_MBR_DEFINES Defines - * @{ */ - -/**@brief MBR SVC Base number. */ -#define MBR_SVC_BASE (0x18) - -/**@brief Page size in words. */ -#define MBR_PAGE_SIZE_IN_WORDS (1024) - -/** @brief The size that must be reserved for the MBR when a SoftDevice is written to flash. -This is the offset where the first byte of the SoftDevice hex file is written.*/ -#define MBR_SIZE (0x1000) - -/** @} */ - -/** @addtogroup NRF_MBR_ENUMS Enumerations - * @{ */ - -/**@brief nRF Master Boot Record API SVC numbers. */ -enum NRF_MBR_SVCS -{ - SD_MBR_COMMAND = MBR_SVC_BASE, /**< ::sd_mbr_command */ -}; - -/**@brief Possible values for ::sd_mbr_command_t.command */ -enum NRF_MBR_COMMANDS -{ - SD_MBR_COMMAND_COPY_BL, /**< Copy a new BootLoader. @see sd_mbr_command_copy_bl_t*/ - SD_MBR_COMMAND_COPY_SD, /**< Copy a new SoftDevice. @see ::sd_mbr_command_copy_sd_t*/ - SD_MBR_COMMAND_INIT_SD, /**< Initialize forwarding interrupts to SD, and run reset function in SD*/ - SD_MBR_COMMAND_COMPARE, /**< This command works like memcmp. @see ::sd_mbr_command_compare_t*/ - SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET, /**< Start forwarding all exception to this address @see ::sd_mbr_command_vector_table_base_set_t*/ -}; - -/** @} */ - -/** @addtogroup NRF_MBR_TYPES Types - * @{ */ - -/**@brief This command copies part of a new SoftDevice - * The destination area is erased before copying. - * If dst is in the middle of a flash page, that whole flash page will be erased. - * If (dst+len) is in the middle of a flash page, that whole flash page will be erased. - * - * The user of this function is responsible for setting the BPROT registers. - * - * @retval ::NRF_SUCCESS indicates that the contents of the memory blocks where copied correctly. - * @retval ::NRF_ERROR_INTERNAL indicates that the contents of the memory blocks where not verified correctly after copying. - */ -typedef struct -{ - uint32_t *src; /**< Pointer to the source of data to be copied.*/ - uint32_t *dst; /**< Pointer to the destination where the content is to be copied.*/ - uint32_t len; /**< Number of 32 bit words to copy. Must be a multiple of @ref MBR_PAGE_SIZE_IN_WORDS words.*/ -} sd_mbr_command_copy_sd_t; - - -/**@brief This command works like memcmp, but takes the length in words. - * - * @retval ::NRF_SUCCESS indicates that the contents of both memory blocks are equal. - * @retval ::NRF_ERROR_NULL indicates that the contents of the memory blocks are not equal. - */ -typedef struct -{ - uint32_t *ptr1; /**< Pointer to block of memory. */ - uint32_t *ptr2; /**< Pointer to block of memory. */ - uint32_t len; /**< Number of 32 bit words to compare.*/ -} sd_mbr_command_compare_t; - - -/**@brief This command copies a new BootLoader. - * With this command, destination of BootLoader is always the address written in NRF_UICR->BOOTADDR. - * - * Destination is erased by this function. - * If (destination+bl_len) is in the middle of a flash page, that whole flash page will be erased. - * - * This function will use PROTENSET to protect the flash that is not intended to be written. - * - * On success, this function will not return. It will start the new BootLoader from reset-vector as normal. - * - * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. - * @retval ::NRF_ERROR_FORBIDDEN if NRF_UICR->BOOTADDR is not set. - * @retval ::NRF_ERROR_INVALID_LENGTH if parameters attempts to read or write outside flash area. - * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) - */ -typedef struct -{ - uint32_t *bl_src; /**< Pointer to the source of the Bootloader to be be copied.*/ - uint32_t bl_len; /**< Number of 32 bit words to copy for BootLoader. */ -} sd_mbr_command_copy_bl_t; - -/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the MBR - * - * Once this function has been called, this address is where the MBR will start to forward interrupts to after a reset. - * - * To restore default forwarding this function should be called with @param address set to 0. - * The MBR will then start forwarding to interrupts to the address in NFR_UICR->BOOTADDR or to the SoftDevice if the BOOTADDR is not set. - * - * On success, this function will not return. It will reset the device. - * - * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. - * @retval ::NRF_ERROR_INVALID_ADDR if parameter address is outside of the flash size. - * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) - */ -typedef struct -{ - uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ -} sd_mbr_command_vector_table_base_set_t; - - -typedef struct -{ - uint32_t command; /**< type of command to be issued see @ref NRF_MBR_COMMANDS. */ - union - { - sd_mbr_command_copy_sd_t copy_sd; /**< Parameters for copy SoftDevice.*/ - sd_mbr_command_compare_t compare; /**< Parameters for verify.*/ - sd_mbr_command_copy_bl_t copy_bl; /**< Parameters for copy BootLoader. Requires parameter page. */ - sd_mbr_command_vector_table_base_set_t base_set; /**< Parameters for vector table base set. Requires parameter page.*/ - } params; -} sd_mbr_command_t; - -/** @} */ - -/** @addtogroup NRF_MBR_FUNCTIONS Functions - * @{ */ - -/**@brief Issue Master Boot Record commands - * - * Commands used when updating a SoftDevice and bootloader. - * - * The SD_MBR_COMMAND_COPY_BL and SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET requires parameters to be - * retained by the MBR when resetting the IC. This is done in a separate flash page - * provided by the application. The UICR register UICR.NRFFW[1] must be set - * to an address corresponding to a page in the application flash space. This page will be cleared - * by the MBR and used to store the command before reset. When the UICR.NRFFW[1] field is set - * the page it refers to must not be used by the application. If the UICR.NRFFW[1] is set to - * 0xFFFFFFFF (the default) MBR commands which use flash will be unavailable and return - * NRF_ERROR_NO_MEM. - * - * @param[in] param Pointer to a struct describing the command. - * - * @note For return values, see ::sd_mbr_command_copy_sd_t ::sd_mbr_command_copy_bl_t ::sd_mbr_command_compare_t ::sd_mbr_command_vector_table_base_set_t - * - * @retval NRF_ERROR_NO_MEM if UICR.NRFFW[1] is not set (i.e. is 0xFFFFFFFF). - * @retval NRF_ERROR_INVALID_PARAM if an invalid command is given. -*/ -SVCALL(SD_MBR_COMMAND, uint32_t, sd_mbr_command(sd_mbr_command_t* param)); - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // NRF_MBR_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_error.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_error.h deleted file mode 100644 index 6ae2c9b52ac..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_error.h +++ /dev/null @@ -1,87 +0,0 @@ -/** - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/* Header guard */ -#ifndef NRF_ERROR_H__ -#define NRF_ERROR_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/// @cond Make doxygen skip this file - -/** @defgroup NRF_ERRORS_BASE Error Codes Base number definitions - * @{ */ -#define NRF_ERROR_BASE_NUM (0x0) ///< Global error base -#define NRF_ERROR_SDM_BASE_NUM (0x1000) ///< SDM error base -#define NRF_ERROR_SOC_BASE_NUM (0x2000) ///< SoC error base -#define NRF_ERROR_STK_BASE_NUM (0x3000) ///< STK error base -/** @} */ - -#define NRF_SUCCESS (NRF_ERROR_BASE_NUM + 0) ///< Successful command -#define NRF_ERROR_SVC_HANDLER_MISSING (NRF_ERROR_BASE_NUM + 1) ///< SVC handler is missing -#define NRF_ERROR_SOFTDEVICE_NOT_ENABLED (NRF_ERROR_BASE_NUM + 2) ///< SoftDevice has not been enabled -#define NRF_ERROR_INTERNAL (NRF_ERROR_BASE_NUM + 3) ///< Internal Error -#define NRF_ERROR_NO_MEM (NRF_ERROR_BASE_NUM + 4) ///< No Memory for operation -#define NRF_ERROR_NOT_FOUND (NRF_ERROR_BASE_NUM + 5) ///< Not found -#define NRF_ERROR_NOT_SUPPORTED (NRF_ERROR_BASE_NUM + 6) ///< Not supported -#define NRF_ERROR_INVALID_PARAM (NRF_ERROR_BASE_NUM + 7) ///< Invalid Parameter -#define NRF_ERROR_INVALID_STATE (NRF_ERROR_BASE_NUM + 8) ///< Invalid state, operation disallowed in this state -#define NRF_ERROR_INVALID_LENGTH (NRF_ERROR_BASE_NUM + 9) ///< Invalid Length -#define NRF_ERROR_INVALID_FLAGS (NRF_ERROR_BASE_NUM + 10) ///< Invalid Flags -#define NRF_ERROR_INVALID_DATA (NRF_ERROR_BASE_NUM + 11) ///< Invalid Data -#define NRF_ERROR_DATA_SIZE (NRF_ERROR_BASE_NUM + 12) ///< Data size exceeds limit -#define NRF_ERROR_TIMEOUT (NRF_ERROR_BASE_NUM + 13) ///< Operation timed out -#define NRF_ERROR_NULL (NRF_ERROR_BASE_NUM + 14) ///< Null Pointer -#define NRF_ERROR_FORBIDDEN (NRF_ERROR_BASE_NUM + 15) ///< Forbidden Operation -#define NRF_ERROR_INVALID_ADDR (NRF_ERROR_BASE_NUM + 16) ///< Bad Memory Address -#define NRF_ERROR_BUSY (NRF_ERROR_BASE_NUM + 17) ///< Busy - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_ERROR_H__ - -/// @endcond -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_nvic.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_nvic.c deleted file mode 100644 index 45803bf61a8..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_nvic.c +++ /dev/null @@ -1,123 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include -#include "nrf_soc.h" -#include "nrf_error.h" - -static uint8_t m_in_critical_region = 0; - -uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn) -{ - NVIC_EnableIRQ(IRQn); - return NRF_SUCCESS; -} - -uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn) -{ - NVIC_DisableIRQ(IRQn); - return NRF_SUCCESS; -} - -uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq) -{ - if (p_pending_irq != NULL) - { - *p_pending_irq = NVIC_GetPendingIRQ(IRQn); - return NRF_SUCCESS; - } - return NRF_ERROR_NULL; -} - -uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC_SetPendingIRQ(IRQn); - return NRF_SUCCESS; -} - -uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC_ClearPendingIRQ(IRQn); - return NRF_SUCCESS; -} - -uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - NVIC_SetPriority(IRQn, priority); - return NRF_SUCCESS; -} - -uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority) -{ - if (p_priority != NULL) - { - *p_priority = NVIC_GetPriority(IRQn); - return NRF_SUCCESS; - } - - return NRF_ERROR_NULL; -} - -uint32_t sd_nvic_SystemReset(void) -{ - NVIC_SystemReset(); - return NRF_SUCCESS; -} - -uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region) -{ - __disable_irq(); - - *p_is_nested_critical_region = (m_in_critical_region != 0); - m_in_critical_region++; - - return NRF_SUCCESS; -} - -uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region) -{ - m_in_critical_region--; - - if (is_nested_critical_region == 0) - { - m_in_critical_region = 0; - __enable_irq(); - } - return NRF_SUCCESS; -} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_nvic.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_nvic.h deleted file mode 100644 index 3ab15d66d10..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_nvic.h +++ /dev/null @@ -1,166 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_NVIC_H__ -#define NRF_NVIC_H__ - -#include -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@brief Enable External Interrupt. - * @note Corresponds to NVIC_EnableIRQ in CMSIS. - * - * @pre{IRQn is valid and not reserved by the stack} - * - * @param[in] IRQn See the NVIC_EnableIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt was enabled. - */ -uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn); - -/**@brief Disable External Interrupt. - * @note Corresponds to NVIC_DisableIRQ in CMSIS. - * - * @pre{IRQn is valid and not reserved by the stack} - * - * @param[in] IRQn See the NVIC_DisableIRQ documentation in CMSIS - * - * @retval ::NRF_SUCCESS The interrupt was disabled. - */ -uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn); - -/**@brief Get Pending Interrupt. - * @note Corresponds to NVIC_GetPendingIRQ in CMSIS. - * - * @pre{IRQn is valid and not reserved by the stack} - * - * @param[in] IRQn See the NVIC_GetPendingIRQ documentation in CMSIS. - * @param[out] p_pending_irq Return value from NVIC_GetPendingIRQ. - * - * @retval ::NRF_SUCCESS The interrupt is available for the application. - */ -uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq); - -/**@brief Set Pending Interrupt. - * @note Corresponds to NVIC_SetPendingIRQ in CMSIS. - * - * @pre{IRQn is valid and not reserved by the stack} - * - * @param[in] IRQn See the NVIC_SetPendingIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt is set pending. - */ -uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn); - -/**@brief Clear Pending Interrupt. - * @note Corresponds to NVIC_ClearPendingIRQ in CMSIS. - * - * @pre{IRQn is valid and not reserved by the stack} - * - * @param[in] IRQn See the NVIC_ClearPendingIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt pending flag is cleared. - */ -uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn); - -/**@brief Set Interrupt Priority. - * @note Corresponds to NVIC_SetPriority in CMSIS. - * - * @pre{IRQn is valid and not reserved by the stack} - * @pre{priority is valid and not reserved by the stack} - * - * @param[in] IRQn See the NVIC_SetPriority documentation in CMSIS. - * @param[in] priority A valid IRQ priority for use by the application. - * - * @retval ::NRF_SUCCESS The interrupt and priority level is available for the application. - */ -uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority); - -/**@brief Get Interrupt Priority. - * @note Corresponds to NVIC_GetPriority in CMSIS. - * - * @pre{IRQn is valid and not reserved by the stack} - * - * @param[in] IRQn See the NVIC_GetPriority documentation in CMSIS. - * @param[out] p_priority Return value from NVIC_GetPriority. - * - * @retval ::NRF_SUCCESS The interrupt priority is returned in p_priority. - */ -uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority); - -/**@brief System Reset. - * @note Corresponds to NVIC_SystemReset in CMSIS. - * - * @retval ::NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN - */ -uint32_t sd_nvic_SystemReset(void); - -/**@brief Enters critical region. - * - * @post Application interrupts will be disabled. - * @sa sd_nvic_critical_region_exit - * - * @param[out] p_is_nested_critical_region 1: If in a nested critical region. - * 0: Otherwise. - * - * @retval ::NRF_SUCCESS - */ -uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region); - -/**@brief Exit critical region. - * - * @pre Application has entered a critical region using ::sd_nvic_critical_region_enter. - * @post If not in a nested critical region, the application interrupts will restored to the state before ::sd_nvic_critical_region_enter was called. - * - * @param[in] is_nested_critical_region If this is set to 1, the critical region won't be exited. @sa sd_nvic_critical_region_enter. - * - * @retval ::NRF_SUCCESS - */ -uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region); - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_NVIC_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_soc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_soc.c deleted file mode 100644 index 8b273d74bf5..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_soc.c +++ /dev/null @@ -1,48 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include -#include "nrf_soc.h" -#include "nrf_error.h" - -uint32_t sd_app_evt_wait(void) -{ - __WFE(); - return NRF_SUCCESS; -} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_soc.h deleted file mode 100644 index 3119ada366f..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_MBR/nrf_soc_nosd/nrf_soc.h +++ /dev/null @@ -1,80 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_SOC_H__ -#define NRF_SOC_H__ - -#include -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@brief Waits for an application event. - * - * An application event is either an application interrupt or a pended interrupt when the - * interrupt is disabled. When the interrupt is enabled it will be taken immediately since - * this function will wait in thread mode, then the execution will return in the application's - * main thread. When an interrupt is disabled and gets pended it will return to the application's - * thread main. The application must ensure that the pended flag is cleared using - * ::sd_nvic_ClearPendingIRQ in order to sleep using this function. This is only necessary for - * disabled interrupts, as the interrupt handler will clear the pending flag automatically for - * enabled interrupts. - * - * In order to wake up from disabled interrupts, the SEVONPEND flag has to be set in the Cortex-M0 - * System Control Register (SCR). @sa CMSIS_SCB - * - * @note If an application interrupt has happened since the last time sd_app_evt_wait was - * called this function will return immediately and not go to sleep. This is to avoid race - * conditions that can occur when a flag is updated in the interrupt handler and processed - * in the main loop. - * - * @post An application interrupt has happened or a interrupt pending flag is set. - * - * @retval ::NRF_SUCCESS - */ -uint32_t sd_app_evt_wait(void); - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_SOC_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/doc/s140_nrf52840_5.0.0-2.alpha_licence-agreement.pdf b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/doc/s140_nrf52840_5.0.0-2.alpha_licence-agreement.pdf deleted file mode 100644 index 1a1a731d3ade66c29e06ca096207060cb04bead6..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 5542 zcmc(jS6EZqw#Pw=(xpj}5)lYJBq0d_1f_&7UFj_>AQA$S&;&#}D1;)?yGm7*A_@wE zs7RHjbb_D=il9hSiYK_;$9?v`_q^PPJ0I4ZYpl8cYs@jn`o`~@5~kW1d8mRCv&8J& z%OPeZkRr&(^&GRB8pH@7c#u3nFgOYU!Qk*Dzz>4KyO02F0PEuhsH+o6et?TNb5Pzj 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--- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/doc/s140_nrf52840_5.0.0-2.alpha_readme.txt +++ /dev/null @@ -1,10 +0,0 @@ -s140_nrf52840_5.0.0-2.alpha - -This release consists of the following: - -- This readme file -- The s140_nrf52840_5.0.0-2.alpha API (SoftDevice header files) -- The s140_nrf52840_5.0.0-2.alpha license agreement -- The s140_nrf52840_5.0.0-2.alpha release notes -- The s140_nrf52840_5.0.0-2.alpha SoftDevice (binary hex file) -- The s140_nrf52840_5.0.0-2.alpha Migration Document diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/doc/s140_nrf52840_5.0.0-2.alpha_release-notes-update-1.pdf b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/doc/s140_nrf52840_5.0.0-2.alpha_release-notes-update-1.pdf deleted file mode 100644 index 9ffceb9b56e62e50fbc8160acb532dda1e75ba68..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 29128 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z%RJ!)+5goyLVt@Ba%qPD(c;xVisJsy0iA{ZT45{n11UsLKnd!OF#G+jiRnE|lPFje z!>I%iv=A_GKsZ6U-GLxMOPHG-SV#;c2ylZsK_Tu?01S?Ry7T;tcD7(dvc1k|8To=}8?4TMht z?qvIWVd3Qm$}kM!nFH*BfUyHi9_H@w&u4uPYs3#Ksvole{!92zwYq;5{@;-M(^=d< z@DmOf&@XfHlh$= zagdOmt(~f*|7JwjeY{0d<%i9B>)ldII_mzEDh{VPel60dYfIMjj?lii#3(a474j5dAMjleJs` diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_err.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_err.h deleted file mode 100644 index 36d54a0dc0b..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_err.h +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - @addtogroup BLE_COMMON - @{ - @addtogroup nrf_error - @{ - @ingroup BLE_COMMON - @} - - @defgroup ble_err General error codes - @{ - - @brief General error code definitions for the BLE API. - - @ingroup BLE_COMMON -*/ -#ifndef NRF_BLE_ERR_H__ -#define NRF_BLE_ERR_H__ - -#include "nrf_error.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* @defgroup BLE_ERRORS Error Codes - * @{ */ -#define BLE_ERROR_NOT_ENABLED (NRF_ERROR_STK_BASE_NUM+0x001) /**< @ref sd_ble_enable has not been called. */ -#define BLE_ERROR_INVALID_CONN_HANDLE (NRF_ERROR_STK_BASE_NUM+0x002) /**< Invalid connection handle. */ -#define BLE_ERROR_INVALID_ATTR_HANDLE (NRF_ERROR_STK_BASE_NUM+0x003) /**< Invalid attribute handle. */ -#define BLE_ERROR_NO_TX_PACKETS (NRF_ERROR_STK_BASE_NUM+0x004) /**< Not enough application packets available on this connection. */ -#define BLE_ERROR_INVALID_ROLE (NRF_ERROR_STK_BASE_NUM+0x005) /**< Invalid role. */ -#define BLE_ERROR_BLOCKED_BY_OTHER_LINKS (NRF_ERROR_STK_BASE_NUM+0x006) /**< The attempt to change link settings failed due to the scheduling of other links. */ -/** @} */ - - -/** @defgroup BLE_ERROR_SUBRANGES Module specific error code subranges - * @brief Assignment of subranges for module specific error codes. - * @note For specific error codes, see ble_.h or ble_error_.h. - * @{ */ -#define NRF_L2CAP_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x100) /**< L2CAP specific errors. */ -#define NRF_GAP_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x200) /**< GAP specific errors. */ -#define NRF_GATTC_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x300) /**< GATT client specific errors. */ -#define NRF_GATTS_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x400) /**< GATT server specific errors. */ -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif - - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_gap.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_gap.h deleted file mode 100644 index 339db01fd18..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_gap.h +++ /dev/null @@ -1,2211 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - @addtogroup BLE_GAP Generic Access Profile (GAP) - @{ - @brief Definitions and prototypes for the GAP interface. - */ - -#ifndef BLE_GAP_H__ -#define BLE_GAP_H__ - - -#include "ble_types.h" -#include "ble_ranges.h" -#include "nrf_svc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@addtogroup BLE_GAP_ENUMERATIONS Enumerations - * @{ */ - -/**@brief GAP API SVC numbers. - */ -enum BLE_GAP_SVCS -{ - SD_BLE_GAP_ADDR_SET = BLE_GAP_SVC_BASE, /**< Set own Bluetooth Address. */ - SD_BLE_GAP_ADDR_GET, /**< Get own Bluetooth Address. */ - SD_BLE_GAP_WHITELIST_SET, /**< Set active whitelist. */ - SD_BLE_GAP_DEVICE_IDENTITIES_SET, /**< Set device identity list. */ - SD_BLE_GAP_PRIVACY_SET, /**< Set Privacy settings*/ - SD_BLE_GAP_PRIVACY_GET, /**< Get Privacy settings*/ - SD_BLE_GAP_ADV_DATA_SET, /**< Set Advertising Data. */ - SD_BLE_GAP_ADV_START, /**< Start Advertising. */ - SD_BLE_GAP_ADV_STOP, /**< Stop Advertising. */ - SD_BLE_GAP_CONN_PARAM_UPDATE, /**< Connection Parameter Update. */ - SD_BLE_GAP_DISCONNECT, /**< Disconnect. */ - SD_BLE_GAP_TX_POWER_SET, /**< Set TX Power. */ - SD_BLE_GAP_APPEARANCE_SET, /**< Set Appearance. */ - SD_BLE_GAP_APPEARANCE_GET, /**< Get Appearance. */ - SD_BLE_GAP_PPCP_SET, /**< Set PPCP. */ - SD_BLE_GAP_PPCP_GET, /**< Get PPCP. */ - SD_BLE_GAP_DEVICE_NAME_SET, /**< Set Device Name. */ - SD_BLE_GAP_DEVICE_NAME_GET, /**< Get Device Name. */ - SD_BLE_GAP_AUTHENTICATE, /**< Initiate Pairing/Bonding. */ - SD_BLE_GAP_SEC_PARAMS_REPLY, /**< Reply with Security Parameters. */ - SD_BLE_GAP_AUTH_KEY_REPLY, /**< Reply with an authentication key. */ - SD_BLE_GAP_LESC_DHKEY_REPLY, /**< Reply with an LE Secure Connections DHKey. */ - SD_BLE_GAP_KEYPRESS_NOTIFY, /**< Notify of a keypress during an authentication procedure. */ - SD_BLE_GAP_LESC_OOB_DATA_GET, /**< Get the local LE Secure Connections OOB data. */ - SD_BLE_GAP_LESC_OOB_DATA_SET, /**< Set the remote LE Secure Connections OOB data. */ - SD_BLE_GAP_ENCRYPT, /**< Initiate encryption procedure. */ - SD_BLE_GAP_SEC_INFO_REPLY, /**< Reply with Security Information. */ - SD_BLE_GAP_CONN_SEC_GET, /**< Obtain connection security level. */ - SD_BLE_GAP_RSSI_START, /**< Start reporting of changes in RSSI. */ - SD_BLE_GAP_RSSI_STOP, /**< Stop reporting of changes in RSSI. */ - SD_BLE_GAP_SCAN_START, /**< Start Scanning. */ - SD_BLE_GAP_SCAN_STOP, /**< Stop Scanning. */ - SD_BLE_GAP_CONNECT, /**< Connect. */ - SD_BLE_GAP_CONNECT_CANCEL, /**< Cancel ongoing connection procedure. */ - SD_BLE_GAP_RSSI_GET, /**< Get the last RSSI sample. */ - SD_BLE_GAP_PHY_REQUEST, /**< Initiate PHY Update procedure. */ - SD_BLE_GAP_DATA_LENGTH_UPDATE, /**< Initiate or respond to a Data Length Update Procedure. */ -}; - -/**@brief GAP Event IDs. - * IDs that uniquely identify an event coming from the stack to the application. - */ -enum BLE_GAP_EVTS -{ - BLE_GAP_EVT_CONNECTED = BLE_GAP_EVT_BASE, /**< Connection established. \n See @ref ble_gap_evt_connected_t. */ - BLE_GAP_EVT_DISCONNECTED, /**< Disconnected from peer. \n See @ref ble_gap_evt_disconnected_t. */ - BLE_GAP_EVT_CONN_PARAM_UPDATE, /**< Connection Parameters updated. \n See @ref ble_gap_evt_conn_param_update_t. */ - BLE_GAP_EVT_SEC_PARAMS_REQUEST, /**< Request to provide security parameters. \n Reply with @ref sd_ble_gap_sec_params_reply. \n See @ref ble_gap_evt_sec_params_request_t. */ - BLE_GAP_EVT_SEC_INFO_REQUEST, /**< Request to provide security information. \n Reply with @ref sd_ble_gap_sec_info_reply. \n See @ref ble_gap_evt_sec_info_request_t. */ - BLE_GAP_EVT_PASSKEY_DISPLAY, /**< Request to display a passkey to the user. \n In LESC Numeric Comparison, reply with @ref sd_ble_gap_auth_key_reply. \n See @ref ble_gap_evt_passkey_display_t. */ - BLE_GAP_EVT_KEY_PRESSED, /**< Notification of a keypress on the remote device.\n See @ref ble_gap_evt_key_pressed_t */ - BLE_GAP_EVT_AUTH_KEY_REQUEST, /**< Request to provide an authentication key. \n Reply with @ref sd_ble_gap_auth_key_reply. \n See @ref ble_gap_evt_auth_key_request_t. */ - BLE_GAP_EVT_LESC_DHKEY_REQUEST, /**< Request to calculate an LE Secure Connections DHKey. \n Reply with @ref sd_ble_gap_lesc_dhkey_reply. \n See @ref ble_gap_evt_lesc_dhkey_request_t */ - BLE_GAP_EVT_AUTH_STATUS, /**< Authentication procedure completed with status. \n See @ref ble_gap_evt_auth_status_t. */ - BLE_GAP_EVT_CONN_SEC_UPDATE, /**< Connection security updated. \n See @ref ble_gap_evt_conn_sec_update_t. */ - BLE_GAP_EVT_TIMEOUT, /**< Timeout expired. \n See @ref ble_gap_evt_timeout_t. */ - BLE_GAP_EVT_RSSI_CHANGED, /**< RSSI report. \n See @ref ble_gap_evt_rssi_changed_t. */ - BLE_GAP_EVT_ADV_REPORT, /**< Advertising report. \n See @ref ble_gap_evt_adv_report_t. */ - BLE_GAP_EVT_SEC_REQUEST, /**< Security Request. \n See @ref ble_gap_evt_sec_request_t. */ - BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST, /**< Connection Parameter Update Request. \n Reply with @ref sd_ble_gap_conn_param_update. \n See @ref ble_gap_evt_conn_param_update_request_t. */ - BLE_GAP_EVT_SCAN_REQ_REPORT, /**< Scan request report. \n See @ref ble_gap_evt_scan_req_report_t. */ - BLE_GAP_EVT_PHY_UPDATE, /**< PHY have been updated \n See @ref ble_gap_evt_phy_update_t. */ - BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST, /**< Data Length Update request. \n Reply with @ref sd_ble_gap_data_length_update.\n See @ref ble_gap_evt_data_length_update_request_t. */ - BLE_GAP_EVT_DATA_LENGTH_UPDATE, /**< LL Data Channel PDU payload length updated. \n See @ref ble_gap_evt_data_length_update_t. */ -}; - -/**@brief GAP Option IDs. - * IDs that uniquely identify a GAP option. - */ -enum BLE_GAP_OPTS -{ - BLE_GAP_OPT_CH_MAP = BLE_GAP_OPT_BASE, /**< Channel Map. @ref ble_gap_opt_ch_map_t */ - BLE_GAP_OPT_LOCAL_CONN_LATENCY, /**< Local connection latency. @ref ble_gap_opt_local_conn_latency_t */ - BLE_GAP_OPT_PASSKEY, /**< Set passkey. @ref ble_gap_opt_passkey_t */ - BLE_GAP_OPT_SCAN_REQ_REPORT, /**< Scan request report. @ref ble_gap_opt_scan_req_report_t */ - BLE_GAP_OPT_COMPAT_MODE_1, /**< Compatibility mode. @ref ble_gap_opt_compat_mode_1_t */ - BLE_GAP_OPT_COMPAT_MODE_2, /**< Compatibility mode. @ref ble_gap_opt_compat_mode_2_t */ - BLE_GAP_OPT_AUTH_PAYLOAD_TIMEOUT, /**< Set Authenticated payload timeout. @ref ble_gap_opt_auth_payload_timeout_t */ - BLE_GAP_OPT_PREFERRED_PHYS_SET, /**< Set the preferred PHYs for all new connections. @ref ble_gap_opt_preferred_phys_t */ - BLE_GAP_OPT_SLAVE_LATENCY_DISABLE, /**< Disable slave latency. @ref ble_gap_opt_slave_latency_disable_t */ -}; - -/**@brief GAP Configuration IDs. - * - * IDs that uniquely identify a GAP configuration. - */ -enum BLE_GAP_CFGS -{ - BLE_GAP_CFG_ROLE_COUNT = BLE_GAP_CFG_BASE, /**< Role count configuration. */ - BLE_GAP_CFG_DEVICE_NAME, /**< Device name configuration. */ -}; - -/** @} */ - -/**@addtogroup BLE_GAP_DEFINES Defines - * @{ */ - -/**@defgroup BLE_ERRORS_GAP SVC return values specific to GAP - * @{ */ -#define BLE_ERROR_GAP_UUID_LIST_MISMATCH (NRF_GAP_ERR_BASE + 0x000) /**< UUID list does not contain an integral number of UUIDs. */ -#define BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST (NRF_GAP_ERR_BASE + 0x001) /**< Use of Whitelist not permitted with discoverable advertising. */ -#define BLE_ERROR_GAP_INVALID_BLE_ADDR (NRF_GAP_ERR_BASE + 0x002) /**< The upper two bits of the address do not correspond to the specified address type. */ -#define BLE_ERROR_GAP_WHITELIST_IN_USE (NRF_GAP_ERR_BASE + 0x003) /**< Attempt to modify the whitelist while already in use by another operation. */ -#define BLE_ERROR_GAP_DEVICE_IDENTITIES_IN_USE (NRF_GAP_ERR_BASE + 0x004) /**< Attempt to modify the device identity list while already in use by another operation. */ -#define BLE_ERROR_GAP_DEVICE_IDENTITIES_DUPLICATE (NRF_GAP_ERR_BASE + 0x005) /**< The device identity list contains entries with duplicate identity addresses. */ -/**@} */ - - -/**@defgroup BLE_GAP_ROLES GAP Roles - * @note Not explicitly used in peripheral API, but will be relevant for central API. - * @{ */ -#define BLE_GAP_ROLE_INVALID 0x0 /**< Invalid Role. */ -#define BLE_GAP_ROLE_PERIPH 0x1 /**< Peripheral Role. */ -#define BLE_GAP_ROLE_CENTRAL 0x2 /**< Central Role. */ -/**@} */ - - -/**@defgroup BLE_GAP_TIMEOUT_SOURCES GAP Timeout sources - * @{ */ -#define BLE_GAP_TIMEOUT_SRC_ADVERTISING 0x00 /**< Advertising timeout. */ -#define BLE_GAP_TIMEOUT_SRC_SECURITY_REQUEST 0x01 /**< Security request timeout. */ -#define BLE_GAP_TIMEOUT_SRC_SCAN 0x02 /**< Scanning timeout. */ -#define BLE_GAP_TIMEOUT_SRC_CONN 0x03 /**< Connection timeout. */ -#define BLE_GAP_TIMEOUT_SRC_AUTH_PAYLOAD 0x04 /**< Authenticated payload timeout. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADDR_TYPES GAP Address types - * @{ */ -#define BLE_GAP_ADDR_TYPE_PUBLIC 0x00 /**< Public address. */ -#define BLE_GAP_ADDR_TYPE_RANDOM_STATIC 0x01 /**< Random static address. */ -#define BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE 0x02 /**< Random private resolvable address. */ -#define BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE 0x03 /**< Random private non-resolvable address. */ -/**@} */ - - -/**@brief The default interval in seconds at which a private address is refreshed. */ -#define BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S (900) /* 15 minutes. */ -/**@brief The maximum interval in seconds at which a private address can be refreshed. */ -#define BLE_GAP_MAX_PRIVATE_ADDR_CYCLE_INTERVAL_S (41400) /* 11 hours 30 minutes. */ - - -/** @brief BLE address length. */ -#define BLE_GAP_ADDR_LEN (6) - - -/**@defgroup BLE_GAP_PRIVACY_MODES Privacy modes - * @{ */ -#define BLE_GAP_PRIVACY_MODE_OFF 0x00 /**< Device will send and accept its identity address for its own address. */ -#define BLE_GAP_PRIVACY_MODE_DEVICE_PRIVACY 0x01 /**< Device will send and accept only private addresses for its own address. */ -/**@} */ - - -/**@defgroup BLE_GAP_AD_TYPE_DEFINITIONS GAP Advertising and Scan Response Data format - * @note Found at https://www.bluetooth.org/Technical/AssignedNumbers/generic_access_profile.htm - * @{ */ -#define BLE_GAP_AD_TYPE_FLAGS 0x01 /**< Flags for discoverability. */ -#define BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_MORE_AVAILABLE 0x02 /**< Partial list of 16 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_16BIT_SERVICE_UUID_COMPLETE 0x03 /**< Complete list of 16 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_MORE_AVAILABLE 0x04 /**< Partial list of 32 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_32BIT_SERVICE_UUID_COMPLETE 0x05 /**< Complete list of 32 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_MORE_AVAILABLE 0x06 /**< Partial list of 128 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_128BIT_SERVICE_UUID_COMPLETE 0x07 /**< Complete list of 128 bit service UUIDs. */ -#define BLE_GAP_AD_TYPE_SHORT_LOCAL_NAME 0x08 /**< Short local device name. */ -#define BLE_GAP_AD_TYPE_COMPLETE_LOCAL_NAME 0x09 /**< Complete local device name. */ -#define BLE_GAP_AD_TYPE_TX_POWER_LEVEL 0x0A /**< Transmit power level. */ -#define BLE_GAP_AD_TYPE_CLASS_OF_DEVICE 0x0D /**< Class of device. */ -#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C 0x0E /**< Simple Pairing Hash C. */ -#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R 0x0F /**< Simple Pairing Randomizer R. */ -#define BLE_GAP_AD_TYPE_SECURITY_MANAGER_TK_VALUE 0x10 /**< Security Manager TK Value. */ -#define BLE_GAP_AD_TYPE_SECURITY_MANAGER_OOB_FLAGS 0x11 /**< Security Manager Out Of Band Flags. */ -#define BLE_GAP_AD_TYPE_SLAVE_CONNECTION_INTERVAL_RANGE 0x12 /**< Slave Connection Interval Range. */ -#define BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_16BIT 0x14 /**< List of 16-bit Service Solicitation UUIDs. */ -#define BLE_GAP_AD_TYPE_SOLICITED_SERVICE_UUIDS_128BIT 0x15 /**< List of 128-bit Service Solicitation UUIDs. */ -#define BLE_GAP_AD_TYPE_SERVICE_DATA 0x16 /**< Service Data - 16-bit UUID. */ -#define BLE_GAP_AD_TYPE_PUBLIC_TARGET_ADDRESS 0x17 /**< Public Target Address. */ -#define BLE_GAP_AD_TYPE_RANDOM_TARGET_ADDRESS 0x18 /**< Random Target Address. */ -#define BLE_GAP_AD_TYPE_APPEARANCE 0x19 /**< Appearance. */ -#define BLE_GAP_AD_TYPE_ADVERTISING_INTERVAL 0x1A /**< Advertising Interval. */ -#define BLE_GAP_AD_TYPE_LE_BLUETOOTH_DEVICE_ADDRESS 0x1B /**< LE Bluetooth Device Address. */ -#define BLE_GAP_AD_TYPE_LE_ROLE 0x1C /**< LE Role. */ -#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_HASH_C256 0x1D /**< Simple Pairing Hash C-256. */ -#define BLE_GAP_AD_TYPE_SIMPLE_PAIRING_RANDOMIZER_R256 0x1E /**< Simple Pairing Randomizer R-256. */ -#define BLE_GAP_AD_TYPE_SERVICE_DATA_32BIT_UUID 0x20 /**< Service Data - 32-bit UUID. */ -#define BLE_GAP_AD_TYPE_SERVICE_DATA_128BIT_UUID 0x21 /**< Service Data - 128-bit UUID. */ -#define BLE_GAP_AD_TYPE_LESC_CONFIRMATION_VALUE 0x22 /**< LE Secure Connections Confirmation Value */ -#define BLE_GAP_AD_TYPE_LESC_RANDOM_VALUE 0x23 /**< LE Secure Connections Random Value */ -#define BLE_GAP_AD_TYPE_URI 0x24 /**< URI */ -#define BLE_GAP_AD_TYPE_3D_INFORMATION_DATA 0x3D /**< 3D Information Data. */ -#define BLE_GAP_AD_TYPE_MANUFACTURER_SPECIFIC_DATA 0xFF /**< Manufacturer Specific Data. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADV_FLAGS GAP Advertisement Flags - * @{ */ -#define BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE (0x01) /**< LE Limited Discoverable Mode. */ -#define BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE (0x02) /**< LE General Discoverable Mode. */ -#define BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED (0x04) /**< BR/EDR not supported. */ -#define BLE_GAP_ADV_FLAG_LE_BR_EDR_CONTROLLER (0x08) /**< Simultaneous LE and BR/EDR, Controller. */ -#define BLE_GAP_ADV_FLAG_LE_BR_EDR_HOST (0x10) /**< Simultaneous LE and BR/EDR, Host. */ -#define BLE_GAP_ADV_FLAGS_LE_ONLY_LIMITED_DISC_MODE (BLE_GAP_ADV_FLAG_LE_LIMITED_DISC_MODE | BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED) /**< LE Limited Discoverable Mode, BR/EDR not supported. */ -#define BLE_GAP_ADV_FLAGS_LE_ONLY_GENERAL_DISC_MODE (BLE_GAP_ADV_FLAG_LE_GENERAL_DISC_MODE | BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED) /**< LE General Discoverable Mode, BR/EDR not supported. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADV_INTERVALS GAP Advertising interval max and min - * @{ */ -#define BLE_GAP_ADV_INTERVAL_MIN 0x0020 /**< Minimum Advertising interval in 625 us units, i.e. 20 ms. */ -#define BLE_GAP_ADV_NONCON_INTERVAL_MIN 0x00A0 /**< Minimum Advertising interval in 625 us units for non connectable mode, i.e. 100 ms. */ -#define BLE_GAP_ADV_INTERVAL_MAX 0x4000 /**< Maximum Advertising interval in 625 us units, i.e. 10.24 s. */ - /**@} */ - - -/**@defgroup BLE_GAP_SCAN_INTERVALS GAP Scan interval max and min - * @{ */ -#define BLE_GAP_SCAN_INTERVAL_MIN 0x0004 /**< Minimum Scan interval in 625 us units, i.e. 2.5 ms. */ -#define BLE_GAP_SCAN_INTERVAL_MAX 0x4000 /**< Maximum Scan interval in 625 us units, i.e. 10.24 s. */ - /** @} */ - - -/**@defgroup BLE_GAP_SCAN_WINDOW GAP Scan window max and min - * @{ */ -#define BLE_GAP_SCAN_WINDOW_MIN 0x0004 /**< Minimum Scan window in 625 us units, i.e. 2.5 ms. */ -#define BLE_GAP_SCAN_WINDOW_MAX 0x4000 /**< Maximum Scan window in 625 us units, i.e. 10.24 s. */ - /** @} */ - - -/**@defgroup BLE_GAP_SCAN_TIMEOUT GAP Scan timeout max and min - * @{ */ -#define BLE_GAP_SCAN_TIMEOUT_MIN 0x0001 /**< Minimum Scan timeout in seconds. */ -#define BLE_GAP_SCAN_TIMEOUT_MAX 0xFFFF /**< Maximum Scan timeout in seconds. */ - /** @} */ - - -/**@brief Maximum size of advertising data in octets. */ -#define BLE_GAP_ADV_MAX_SIZE (31) - - -/**@defgroup BLE_GAP_ADV_TYPES GAP Advertising types - * @{ */ -#define BLE_GAP_ADV_TYPE_ADV_IND 0x00 /**< Connectable undirected. */ -#define BLE_GAP_ADV_TYPE_ADV_DIRECT_IND 0x01 /**< Connectable directed. */ -#define BLE_GAP_ADV_TYPE_ADV_SCAN_IND 0x02 /**< Scannable undirected. */ -#define BLE_GAP_ADV_TYPE_ADV_NONCONN_IND 0x03 /**< Non connectable undirected. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADV_FILTER_POLICIES GAP Advertising filter policies - * @{ */ -#define BLE_GAP_ADV_FP_ANY 0x00 /**< Allow scan requests and connect requests from any device. */ -#define BLE_GAP_ADV_FP_FILTER_SCANREQ 0x01 /**< Filter scan requests with whitelist. */ -#define BLE_GAP_ADV_FP_FILTER_CONNREQ 0x02 /**< Filter connect requests with whitelist. */ -#define BLE_GAP_ADV_FP_FILTER_BOTH 0x03 /**< Filter both scan and connect requests with whitelist. */ -/**@} */ - - -/**@defgroup BLE_GAP_ADV_TIMEOUT_VALUES GAP Advertising timeout values - * @{ */ -#define BLE_GAP_ADV_TIMEOUT_LIMITED_MAX (180) /**< Maximum advertising time in limited discoverable mode (TGAP(lim_adv_timeout) = 180 s). */ -#define BLE_GAP_ADV_TIMEOUT_GENERAL_UNLIMITED (0) /**< Unlimited advertising in general discoverable mode. */ -/**@} */ - - -/**@defgroup BLE_GAP_DISC_MODES GAP Discovery modes - * @{ */ -#define BLE_GAP_DISC_MODE_NOT_DISCOVERABLE 0x00 /**< Not discoverable discovery Mode. */ -#define BLE_GAP_DISC_MODE_LIMITED 0x01 /**< Limited Discovery Mode. */ -#define BLE_GAP_DISC_MODE_GENERAL 0x02 /**< General Discovery Mode. */ -/**@} */ - - -/**@defgroup BLE_GAP_IO_CAPS GAP IO Capabilities - * @{ */ -#define BLE_GAP_IO_CAPS_DISPLAY_ONLY 0x00 /**< Display Only. */ -#define BLE_GAP_IO_CAPS_DISPLAY_YESNO 0x01 /**< Display and Yes/No entry. */ -#define BLE_GAP_IO_CAPS_KEYBOARD_ONLY 0x02 /**< Keyboard Only. */ -#define BLE_GAP_IO_CAPS_NONE 0x03 /**< No I/O capabilities. */ -#define BLE_GAP_IO_CAPS_KEYBOARD_DISPLAY 0x04 /**< Keyboard and Display. */ -/**@} */ - - -/**@defgroup BLE_GAP_AUTH_KEY_TYPES GAP Authentication Key Types - * @{ */ -#define BLE_GAP_AUTH_KEY_TYPE_NONE 0x00 /**< No key (may be used to reject). */ -#define BLE_GAP_AUTH_KEY_TYPE_PASSKEY 0x01 /**< 6-digit Passkey. */ -#define BLE_GAP_AUTH_KEY_TYPE_OOB 0x02 /**< Out Of Band data. */ -/**@} */ - - -/**@defgroup BLE_GAP_KP_NOT_TYPES GAP Keypress Notification Types - * @{ */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_START 0x00 /**< Passkey entry started. */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_DIGIT_IN 0x01 /**< Passkey digit entered. */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_DIGIT_OUT 0x02 /**< Passkey digit erased. */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_CLEAR 0x03 /**< Passkey cleared. */ -#define BLE_GAP_KP_NOT_TYPE_PASSKEY_END 0x04 /**< Passkey entry completed. */ -/**@} */ - - -/**@defgroup BLE_GAP_SEC_STATUS GAP Security status - * @{ */ -#define BLE_GAP_SEC_STATUS_SUCCESS 0x00 /**< Procedure completed with success. */ -#define BLE_GAP_SEC_STATUS_TIMEOUT 0x01 /**< Procedure timed out. */ -#define BLE_GAP_SEC_STATUS_PDU_INVALID 0x02 /**< Invalid PDU received. */ -#define BLE_GAP_SEC_STATUS_RFU_RANGE1_BEGIN 0x03 /**< Reserved for Future Use range #1 begin. */ -#define BLE_GAP_SEC_STATUS_RFU_RANGE1_END 0x80 /**< Reserved for Future Use range #1 end. */ -#define BLE_GAP_SEC_STATUS_PASSKEY_ENTRY_FAILED 0x81 /**< Passkey entry failed (user canceled or other). */ -#define BLE_GAP_SEC_STATUS_OOB_NOT_AVAILABLE 0x82 /**< Out of Band Key not available. */ -#define BLE_GAP_SEC_STATUS_AUTH_REQ 0x83 /**< Authentication requirements not met. */ -#define BLE_GAP_SEC_STATUS_CONFIRM_VALUE 0x84 /**< Confirm value failed. */ -#define BLE_GAP_SEC_STATUS_PAIRING_NOT_SUPP 0x85 /**< Pairing not supported. */ -#define BLE_GAP_SEC_STATUS_ENC_KEY_SIZE 0x86 /**< Encryption key size. */ -#define BLE_GAP_SEC_STATUS_SMP_CMD_UNSUPPORTED 0x87 /**< Unsupported SMP command. */ -#define BLE_GAP_SEC_STATUS_UNSPECIFIED 0x88 /**< Unspecified reason. */ -#define BLE_GAP_SEC_STATUS_REPEATED_ATTEMPTS 0x89 /**< Too little time elapsed since last attempt. */ -#define BLE_GAP_SEC_STATUS_INVALID_PARAMS 0x8A /**< Invalid parameters. */ -#define BLE_GAP_SEC_STATUS_DHKEY_FAILURE 0x8B /**< DHKey check failure. */ -#define BLE_GAP_SEC_STATUS_NUM_COMP_FAILURE 0x8C /**< Numeric Comparison failure. */ -#define BLE_GAP_SEC_STATUS_BR_EDR_IN_PROG 0x8D /**< BR/EDR pairing in progress. */ -#define BLE_GAP_SEC_STATUS_X_TRANS_KEY_DISALLOWED 0x8E /**< BR/EDR Link Key cannot be used for LE keys. */ -#define BLE_GAP_SEC_STATUS_RFU_RANGE2_BEGIN 0x8F /**< Reserved for Future Use range #2 begin. */ -#define BLE_GAP_SEC_STATUS_RFU_RANGE2_END 0xFF /**< Reserved for Future Use range #2 end. */ -/**@} */ - - -/**@defgroup BLE_GAP_SEC_STATUS_SOURCES GAP Security status sources - * @{ */ -#define BLE_GAP_SEC_STATUS_SOURCE_LOCAL 0x00 /**< Local failure. */ -#define BLE_GAP_SEC_STATUS_SOURCE_REMOTE 0x01 /**< Remote failure. */ -/**@} */ - - -/**@defgroup BLE_GAP_CP_LIMITS GAP Connection Parameters Limits - * @{ */ -#define BLE_GAP_CP_MIN_CONN_INTVL_NONE 0xFFFF /**< No new minimum connection interval specified in connect parameters. */ -#define BLE_GAP_CP_MIN_CONN_INTVL_MIN 0x0006 /**< Lowest minimum connection interval permitted, in units of 1.25 ms, i.e. 7.5 ms. */ -#define BLE_GAP_CP_MIN_CONN_INTVL_MAX 0x0C80 /**< Highest minimum connection interval permitted, in units of 1.25 ms, i.e. 4 s. */ -#define BLE_GAP_CP_MAX_CONN_INTVL_NONE 0xFFFF /**< No new maximum connection interval specified in connect parameters. */ -#define BLE_GAP_CP_MAX_CONN_INTVL_MIN 0x0006 /**< Lowest maximum connection interval permitted, in units of 1.25 ms, i.e. 7.5 ms. */ -#define BLE_GAP_CP_MAX_CONN_INTVL_MAX 0x0C80 /**< Highest maximum connection interval permitted, in units of 1.25 ms, i.e. 4 s. */ -#define BLE_GAP_CP_SLAVE_LATENCY_MAX 0x01F3 /**< Highest slave latency permitted, in connection events. */ -#define BLE_GAP_CP_CONN_SUP_TIMEOUT_NONE 0xFFFF /**< No new supervision timeout specified in connect parameters. */ -#define BLE_GAP_CP_CONN_SUP_TIMEOUT_MIN 0x000A /**< Lowest supervision timeout permitted, in units of 10 ms, i.e. 100 ms. */ -#define BLE_GAP_CP_CONN_SUP_TIMEOUT_MAX 0x0C80 /**< Highest supervision timeout permitted, in units of 10 ms, i.e. 32 s. */ -/**@} */ - - -/**@defgroup BLE_GAP_DEVNAME GAP device name defines. - * @{ */ -#define BLE_GAP_DEVNAME_DEFAULT "nRF5x" /**< Default device name value. */ -#define BLE_GAP_DEVNAME_DEFAULT_LEN 31 /**< Default number of octets in device name. */ -#define BLE_GAP_DEVNAME_MAX_LEN 248 /**< Maximum number of octets in device name. */ -/**@} */ - - -/**@brief Disable RSSI events for connections */ -#define BLE_GAP_RSSI_THRESHOLD_INVALID 0xFF - -/**@defgroup BLE_GAP_PHYS GAP PHYs - * @{ */ -#define BLE_GAP_PHY_1MBPS 0x01 /**< 1 Mbps PHY. */ -#define BLE_GAP_PHY_2MBPS 0x02 /**< 2 Mbps PHY. */ -#define BLE_GAP_PHY_CODED 0x04 /**< Coded PHY. */ -/**@} */ - -/**@defgroup BLE_GAP_CONN_SEC_MODE_SET_MACROS GAP attribute security requirement setters - * - * See @ref ble_gap_conn_sec_mode_t. - * @{ */ -/**@brief Set sec_mode pointed to by ptr to have no access rights.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_NO_ACCESS(ptr) do {(ptr)->sm = 0; (ptr)->lv = 0;} while(0) -/**@brief Set sec_mode pointed to by ptr to require no protection, open link.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_OPEN(ptr) do {(ptr)->sm = 1; (ptr)->lv = 1;} while(0) -/**@brief Set sec_mode pointed to by ptr to require encryption, but no MITM protection.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_ENC_NO_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 2;} while(0) -/**@brief Set sec_mode pointed to by ptr to require encryption and MITM protection.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_ENC_WITH_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 3;} while(0) -/**@brief Set sec_mode pointed to by ptr to require LESC encryption and MITM protection.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_LESC_ENC_WITH_MITM(ptr) do {(ptr)->sm = 1; (ptr)->lv = 4;} while(0) -/**@brief Set sec_mode pointed to by ptr to require signing or encryption, no MITM protection needed.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_SIGNED_NO_MITM(ptr) do {(ptr)->sm = 2; (ptr)->lv = 1;} while(0) -/**@brief Set sec_mode pointed to by ptr to require signing or encryption with MITM protection.*/ -#define BLE_GAP_CONN_SEC_MODE_SET_SIGNED_WITH_MITM(ptr) do {(ptr)->sm = 2; (ptr)->lv = 2;} while(0) -/**@} */ - - -/**@brief GAP Security Random Number Length. */ -#define BLE_GAP_SEC_RAND_LEN 8 - - -/**@brief GAP Security Key Length. */ -#define BLE_GAP_SEC_KEY_LEN 16 - - -/**@brief GAP LE Secure Connections Elliptic Curve Diffie-Hellman P-256 Public Key Length. */ -#define BLE_GAP_LESC_P256_PK_LEN 64 - - -/**@brief GAP LE Secure Connections Elliptic Curve Diffie-Hellman DHKey Length. */ -#define BLE_GAP_LESC_DHKEY_LEN 32 - - -/**@brief GAP Passkey Length. */ -#define BLE_GAP_PASSKEY_LEN 6 - - -/**@brief Maximum amount of addresses in the whitelist. */ -#define BLE_GAP_WHITELIST_ADDR_MAX_COUNT (8) - - -/**@brief Maximum amount of identities in the device identities list. */ -#define BLE_GAP_DEVICE_IDENTITIES_MAX_COUNT (8) - - -/**@brief Default connection count for a configuration. */ -#define BLE_GAP_CONN_COUNT_DEFAULT (1) - - -/**@defgroup BLE_GAP_EVENT_LENGTH GAP event length defines. - * @{ */ -#define BLE_GAP_EVENT_LENGTH_MIN (2) /**< Minimum event length, in 1.25 ms units. */ -#define BLE_GAP_EVENT_LENGTH_DEFAULT (3) /**< Default event length, in 1.25 ms units. */ -/**@} */ - - -/**@defgroup BLE_GAP_ROLE_COUNT GAP concurrent connection count defines. - * @{ */ -#define BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT (1) /**< Default maximum number of connections concurrently acting as peripherals. */ -#define BLE_GAP_ROLE_COUNT_CENTRAL_DEFAULT (3) /**< Default maximum number of connections concurrently acting as centrals. */ -#define BLE_GAP_ROLE_COUNT_CENTRAL_SEC_DEFAULT (1) /**< Default number of SMP instances shared between all connections acting as centrals. */ -#define BLE_GAP_ROLE_COUNT_COMBINED_MAX (20) /**< Maximum supported number of concurrent connections in the peripheral and central roles combined. */ -/**@} */ - - - - -/**@brief Automatic data length parameter. */ -#define BLE_GAP_DATA_LENGTH_AUTO 0 - - -/**@defgroup GAP_SEC_MODES GAP Security Modes - * @{ */ -#define BLE_GAP_SEC_MODE 0x00 /**< No key (may be used to reject). */ -/**@} */ -/** @} */ - - -/**@addtogroup BLE_GAP_STRUCTURES Structures - * @{ */ - -/**@brief Bluetooth Low Energy address. */ -typedef struct -{ - uint8_t addr_id_peer : 1; /**< Only valid for peer addresses. - Reference to peer in device identities list (as set with @ref sd_ble_gap_device_identities_set) when peer is using privacy. */ - uint8_t addr_type : 7; /**< See @ref BLE_GAP_ADDR_TYPES. */ - uint8_t addr[BLE_GAP_ADDR_LEN]; /**< 48-bit address, LSB format. */ -} ble_gap_addr_t; - - -/**@brief GAP connection parameters. - * - * @note When ble_conn_params_t is received in an event, both min_conn_interval and - * max_conn_interval will be equal to the connection interval set by the central. - * - * @note If both conn_sup_timeout and max_conn_interval are specified, then the following constraint applies: - * conn_sup_timeout * 4 > (1 + slave_latency) * max_conn_interval - * that corresponds to the following Bluetooth Spec requirement: - * The Supervision_Timeout in milliseconds shall be larger than - * (1 + Conn_Latency) * Conn_Interval_Max * 2, where Conn_Interval_Max is given in milliseconds. - */ -typedef struct -{ - uint16_t min_conn_interval; /**< Minimum Connection Interval in 1.25 ms units, see @ref BLE_GAP_CP_LIMITS.*/ - uint16_t max_conn_interval; /**< Maximum Connection Interval in 1.25 ms units, see @ref BLE_GAP_CP_LIMITS.*/ - uint16_t slave_latency; /**< Slave Latency in number of connection events, see @ref BLE_GAP_CP_LIMITS.*/ - uint16_t conn_sup_timeout; /**< Connection Supervision Timeout in 10 ms units, see @ref BLE_GAP_CP_LIMITS.*/ -} ble_gap_conn_params_t; - - -/**@brief GAP connection security modes. - * - * Security Mode 0 Level 0: No access permissions at all (this level is not defined by the Bluetooth Core specification).\n - * Security Mode 1 Level 1: No security is needed (aka open link).\n - * Security Mode 1 Level 2: Encrypted link required, MITM protection not necessary.\n - * Security Mode 1 Level 3: MITM protected encrypted link required.\n - * Security Mode 1 Level 4: LESC MITM protected encrypted link required.\n - * Security Mode 2 Level 1: Signing or encryption required, MITM protection not necessary.\n - * Security Mode 2 Level 2: MITM protected signing required, unless link is MITM protected encrypted.\n - */ -typedef struct -{ - uint8_t sm : 4; /**< Security Mode (1 or 2), 0 for no permissions at all. */ - uint8_t lv : 4; /**< Level (1, 2, 3 or 4), 0 for no permissions at all. */ - -} ble_gap_conn_sec_mode_t; - - -/**@brief GAP connection security status.*/ -typedef struct -{ - ble_gap_conn_sec_mode_t sec_mode; /**< Currently active security mode for this connection.*/ - uint8_t encr_key_size; /**< Length of currently active encryption key, 7 to 16 octets (only applicable for bonding procedures). */ -} ble_gap_conn_sec_t; - -/**@brief Identity Resolving Key. */ -typedef struct -{ - uint8_t irk[BLE_GAP_SEC_KEY_LEN]; /**< Array containing IRK. */ -} ble_gap_irk_t; - - -/**@brief Channel mask for RF channels used in advertising. */ -typedef struct -{ - uint8_t ch_37_off : 1; /**< Setting this bit to 1 will turn off advertising on channel 37 */ - uint8_t ch_38_off : 1; /**< Setting this bit to 1 will turn off advertising on channel 38 */ - uint8_t ch_39_off : 1; /**< Setting this bit to 1 will turn off advertising on channel 39 */ -} ble_gap_adv_ch_mask_t; - - -/**@brief GAP advertising parameters. */ -typedef struct -{ - uint8_t type; /**< See @ref BLE_GAP_ADV_TYPES. */ - ble_gap_addr_t const *p_peer_addr; /**< Address of a known peer. - - When privacy is enabled and the local device use @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE addresses, the device identity list is searched for a matching - entry. If the local IRK for that device identity is set, the local IRK for that device will be used to generate the advertiser address field in the advertise packet. - - If type is @ref BLE_GAP_ADV_TYPE_ADV_DIRECT_IND, this must be set to the targeted initiator. If the initiator is in the device identity list, - the peer IRK for that device will be used to generate the initiator address field in the ADV_DIRECT_IND packet. */ - uint8_t fp; /**< Filter Policy, see @ref BLE_GAP_ADV_FILTER_POLICIES. */ - uint16_t interval; /**< Advertising interval between 0x0020 and 0x4000 in 0.625 ms units (20 ms to 10.24 s), see @ref BLE_GAP_ADV_INTERVALS. - - If type equals @ref BLE_GAP_ADV_TYPE_ADV_DIRECT_IND, this parameter must be set to 0 for high duty cycle directed advertising. - - If type equals @ref BLE_GAP_ADV_TYPE_ADV_DIRECT_IND, set @ref BLE_GAP_ADV_INTERVAL_MIN <= interval <= @ref BLE_GAP_ADV_INTERVAL_MAX for low duty cycle advertising.*/ - uint16_t timeout; /**< Advertising timeout between 0x0001 and 0x3FFF in seconds, 0x0000 disables timeout. See also @ref BLE_GAP_ADV_TIMEOUT_VALUES. If type equals @ref BLE_GAP_ADV_TYPE_ADV_DIRECT_IND, this parameter must be set to 0 for High duty cycle directed advertising. */ - ble_gap_adv_ch_mask_t channel_mask; /**< Advertising channel mask. See @ref ble_gap_adv_ch_mask_t. */ -} ble_gap_adv_params_t; - - -/**@brief GAP scanning parameters. */ -typedef struct -{ - uint8_t active : 1; /**< If 1, perform active scanning (scan requests). */ - uint8_t use_whitelist : 1; /**< If 1, filter advertisers using current active whitelist. */ - uint8_t adv_dir_report : 1; /**< If 1, also report directed advertisements where the initiator field is set to a private resolvable address, - even if the address did not resolve to an entry in the device identity list. A report will be generated - even if the peer is not in the whitelist. */ - uint16_t interval; /**< Scan interval between 0x0004 and 0x4000 in 0.625 ms units (2.5 ms to 10.24 s). */ - uint16_t window; /**< Scan window between 0x0004 and 0x4000 in 0.625 ms units (2.5 ms to 10.24 s). */ - uint16_t timeout; /**< Scan timeout between 0x0001 and 0xFFFF in seconds, 0x0000 disables timeout. */ -} ble_gap_scan_params_t; - - -/**@brief Device Privacy. - * - * The privacy feature provides a way for the device to avoid being tracked over a period of time. - * The privacy feature, when enabled, hides the local device identity and replaces it with a private address - * that is automatically refreshed at a specified interval. - * - * If a device still wants to be recognized by other peers, it needs to share it's Identity Resolving Key (IRK). - * With this key, a device can generate a random private address that can only be recognized by peers in possession of that key, - * and devices can establish connections without revealing their real identities. - * - * @note If the device IRK is updated, the new IRK becomes the one to be distributed in all - * bonding procedures performed after @ref sd_ble_gap_privacy_set returns. - * The IRK distributed during bonding procedure is the device IRK that is active when @ref sd_ble_gap_sec_params_reply is called. - */ -typedef struct -{ - uint8_t privacy_mode; /**< Privacy mode, see @ref BLE_GAP_PRIVACY_MODES. Default is @ref BLE_GAP_PRIVACY_MODE_OFF. */ - uint8_t private_addr_type; /**< The private address type must be either @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_RESOLVABLE or @ref BLE_GAP_ADDR_TYPE_RANDOM_PRIVATE_NON_RESOLVABLE. */ - uint16_t private_addr_cycle_s; /**< Private address cycle interval in seconds. Providing an address cycle value of 0 will use the default value defined by @ref BLE_GAP_DEFAULT_PRIVATE_ADDR_CYCLE_INTERVAL_S. */ - ble_gap_irk_t *p_device_irk; /**< When used as input, pointer to IRK structure that will be used as the default IRK. If NULL, the device default IRK will be used. - When used as output, pointer to IRK structure where the current default IRK will be written to. If NULL, this argument is ignored. - By default, the default IRK is used to generate random private resolvable addresses for the local device unless instructed otherwise. */ -} ble_gap_privacy_params_t; - - -/**@brief Physical Layer configuration - * @note tx_phys and rx_phys are bitfields, to indicate multiple preferred PHYs for each direction they can be ORed together. - * @code - * p_gap_phys->tx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; - * p_gap_phys->rx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; - * @endcode - * - */ -typedef struct -{ - uint8_t tx_phys; /**< Preferred transmit PHYs, see @ref BLE_GAP_PHYS. */ - uint8_t rx_phys; /**< Preferred receive PHYs, see @ref BLE_GAP_PHYS. */ -} ble_gap_phys_t; - -/** @brief Keys that can be exchanged during a bonding procedure. */ -typedef struct -{ - uint8_t enc : 1; /**< Long Term Key and Master Identification. */ - uint8_t id : 1; /**< Identity Resolving Key and Identity Address Information. */ - uint8_t sign : 1; /**< Connection Signature Resolving Key. */ - uint8_t link : 1; /**< Derive the Link Key from the LTK. */ -} ble_gap_sec_kdist_t; - - -/**@brief GAP security parameters. */ -typedef struct -{ - uint8_t bond : 1; /**< Perform bonding. */ - uint8_t mitm : 1; /**< Enable Man In The Middle protection. */ - uint8_t lesc : 1; /**< Enable LE Secure Connection pairing. */ - uint8_t keypress : 1; /**< Enable generation of keypress notifications. */ - uint8_t io_caps : 3; /**< IO capabilities, see @ref BLE_GAP_IO_CAPS. */ - uint8_t oob : 1; /**< The OOB data flag. - - In LE legacy pairing, this flag is set if a device has out of band authentication data. - The OOB method is used if both of the devices have out of band authentication data. - - In LE Secure Connections pairing, this flag is set if a device has the peer device's out of band authentication data. - The OOB method is used if at least one device has the peer device's OOB data available. */ - uint8_t min_key_size; /**< Minimum encryption key size in octets between 7 and 16. If 0 then not applicable in this instance. */ - uint8_t max_key_size; /**< Maximum encryption key size in octets between min_key_size and 16. */ - ble_gap_sec_kdist_t kdist_own; /**< Key distribution bitmap: keys that the local device will distribute. */ - ble_gap_sec_kdist_t kdist_peer; /**< Key distribution bitmap: keys that the remote device will distribute. */ -} ble_gap_sec_params_t; - - -/**@brief GAP Encryption Information. */ -typedef struct -{ - uint8_t ltk[BLE_GAP_SEC_KEY_LEN]; /**< Long Term Key. */ - uint8_t lesc : 1; /**< Key generated using LE Secure Connections. */ - uint8_t auth : 1; /**< Authenticated Key. */ - uint8_t ltk_len : 6; /**< LTK length in octets. */ -} ble_gap_enc_info_t; - - -/**@brief GAP Master Identification. */ -typedef struct -{ - uint16_t ediv; /**< Encrypted Diversifier. */ - uint8_t rand[BLE_GAP_SEC_RAND_LEN]; /**< Random Number. */ -} ble_gap_master_id_t; - - -/**@brief GAP Signing Information. */ -typedef struct -{ - uint8_t csrk[BLE_GAP_SEC_KEY_LEN]; /**< Connection Signature Resolving Key. */ -} ble_gap_sign_info_t; - - -/**@brief GAP LE Secure Connections P-256 Public Key. */ -typedef struct -{ - uint8_t pk[BLE_GAP_LESC_P256_PK_LEN]; /**< LE Secure Connections Elliptic Curve Diffie-Hellman P-256 Public Key. Stored in the standard SMP protocol format: {X,Y} both in little-endian. */ -} ble_gap_lesc_p256_pk_t; - - -/**@brief GAP LE Secure Connections DHKey. */ -typedef struct -{ - uint8_t key[BLE_GAP_LESC_DHKEY_LEN]; /**< LE Secure Connections Elliptic Curve Diffie-Hellman Key. Stored in little-endian. */ -} ble_gap_lesc_dhkey_t; - - -/**@brief GAP LE Secure Connections OOB data. */ -typedef struct -{ - ble_gap_addr_t addr; /**< Bluetooth address of the device. */ - uint8_t r[BLE_GAP_SEC_KEY_LEN]; /**< Random Number. */ - uint8_t c[BLE_GAP_SEC_KEY_LEN]; /**< Confirm Value. */ -} ble_gap_lesc_oob_data_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_CONNECTED. */ -typedef struct -{ - ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 - and the address is the device's identity address. */ - uint8_t role; /**< BLE role for this connection, see @ref BLE_GAP_ROLES */ - ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ -} ble_gap_evt_connected_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_DISCONNECTED. */ -typedef struct -{ - uint8_t reason; /**< HCI error code, see @ref BLE_HCI_STATUS_CODES. */ -} ble_gap_evt_disconnected_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_CONN_PARAM_UPDATE. */ -typedef struct -{ - ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ -} ble_gap_evt_conn_param_update_t; - -/**@brief Event Structure for @ref BLE_GAP_EVT_PHY_UPDATE. */ -typedef struct -{ - uint8_t status; /**< Status of the procedure, see @ref BLE_HCI_STATUS_CODES */ - uint8_t tx_phy; /**< TX PHY for this connection, see @ref BLE_GAP_PHYS. */ - uint8_t rx_phy; /**< RX PHY for this connection, see @ref BLE_GAP_PHYS. */ -} ble_gap_evt_phy_update_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST. */ -typedef struct -{ - ble_gap_sec_params_t peer_params; /**< Initiator Security Parameters. */ -} ble_gap_evt_sec_params_request_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_SEC_INFO_REQUEST. */ -typedef struct -{ - ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. */ - ble_gap_master_id_t master_id; /**< Master Identification for LTK lookup. */ - uint8_t enc_info : 1; /**< If 1, Encryption Information required. */ - uint8_t id_info : 1; /**< If 1, Identity Information required. */ - uint8_t sign_info : 1; /**< If 1, Signing Information required. */ -} ble_gap_evt_sec_info_request_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_PASSKEY_DISPLAY. */ -typedef struct -{ - uint8_t passkey[BLE_GAP_PASSKEY_LEN]; /**< 6-digit passkey in ASCII ('0'-'9' digits only). */ - uint8_t match_request : 1; /**< If 1 requires the application to report the match using @ref sd_ble_gap_auth_key_reply - with either @ref BLE_GAP_AUTH_KEY_TYPE_NONE if there is no match or - @ref BLE_GAP_AUTH_KEY_TYPE_PASSKEY if there is a match. */ -} ble_gap_evt_passkey_display_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_KEY_PRESSED. */ -typedef struct -{ - uint8_t kp_not; /**< Keypress notification type, see @ref BLE_GAP_KP_NOT_TYPES. */ -} ble_gap_evt_key_pressed_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_AUTH_KEY_REQUEST. */ -typedef struct -{ - uint8_t key_type; /**< See @ref BLE_GAP_AUTH_KEY_TYPES. */ -} ble_gap_evt_auth_key_request_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST. */ -typedef struct -{ - ble_gap_lesc_p256_pk_t *p_pk_peer; /**< LE Secure Connections remote P-256 Public Key. This will point to the application-supplied memory - inside the keyset during the call to @ref sd_ble_gap_sec_params_reply. */ - uint8_t oobd_req :1; /**< LESC OOB data required. A call to @ref sd_ble_gap_lesc_oob_data_set is required to complete the procedure. */ -} ble_gap_evt_lesc_dhkey_request_t; - - -/**@brief Security levels supported. - * @note See Bluetooth Specification Version 4.2 Volume 3, Part C, Chapter 10, Section 10.2.1. -*/ -typedef struct -{ - uint8_t lv1 : 1; /**< If 1: Level 1 is supported. */ - uint8_t lv2 : 1; /**< If 1: Level 2 is supported. */ - uint8_t lv3 : 1; /**< If 1: Level 3 is supported. */ - uint8_t lv4 : 1; /**< If 1: Level 4 is supported. */ -} ble_gap_sec_levels_t; - - -/**@brief Encryption Key. */ -typedef struct -{ - ble_gap_enc_info_t enc_info; /**< Encryption Information. */ - ble_gap_master_id_t master_id; /**< Master Identification. */ -} ble_gap_enc_key_t; - - -/**@brief Identity Key. */ -typedef struct -{ - ble_gap_irk_t id_info; /**< Identity Resolving Key. */ - ble_gap_addr_t id_addr_info; /**< Identity Address. */ -} ble_gap_id_key_t; - - -/**@brief Security Keys. */ -typedef struct -{ - ble_gap_enc_key_t *p_enc_key; /**< Encryption Key, or NULL. */ - ble_gap_id_key_t *p_id_key; /**< Identity Key, or NULL. */ - ble_gap_sign_info_t *p_sign_key; /**< Signing Key, or NULL. */ - ble_gap_lesc_p256_pk_t *p_pk; /**< LE Secure Connections P-256 Public Key. When in debug mode the application must use the value defined - in the Core Bluetooth Specification v4.2 Vol.3, Part H, Section 2.3.5.6.1 */ -} ble_gap_sec_keys_t; - - -/**@brief Security key set for both local and peer keys. */ -typedef struct -{ - ble_gap_sec_keys_t keys_own; /**< Keys distributed by the local device. For LE Secure Connections the encryption key will be generated locally and will always be stored if bonding. */ - ble_gap_sec_keys_t keys_peer; /**< Keys distributed by the remote device. For LE Secure Connections, p_enc_key must always be NULL. */ -} ble_gap_sec_keyset_t; - - -/**@brief Data Length Update Procedure parameters. */ -typedef struct -{ - uint16_t max_tx_octets; /**< Maximum number of payload octets that a Controller supports for transmission of a single Link Layer Data Channel PDU. */ - uint16_t max_rx_octets; /**< Maximum number of payload octets that a Controller supports for reception of a single Link Layer Data Channel PDU. */ - uint16_t max_tx_time_us; /**< Maximum time, in microseconds, that a Controller supports for transmission of a single Link Layer Data Channel PDU. */ - uint16_t max_rx_time_us; /**< Maximum time, in microseconds, that a Controller supports for reception of a single Link Layer Data Channel PDU. */ -} ble_gap_data_length_params_t; - - -/**@brief Data Length Update Procedure local limitation. */ -typedef struct -{ - uint16_t tx_payload_limited_octets; /**< If > 0, the requested TX packet length is too long by this many octets. */ - uint16_t rx_payload_limited_octets; /**< If > 0, the requested RX packet length is too long by this many octets. */ - uint16_t tx_rx_time_limited_us; /**< If > 0, the requested combination of TX and RX packet lengths is too long by this many microseconds. */ -} ble_gap_data_length_limitation_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_AUTH_STATUS. */ -typedef struct -{ - uint8_t auth_status; /**< Authentication status, see @ref BLE_GAP_SEC_STATUS. */ - uint8_t error_src : 2; /**< On error, source that caused the failure, see @ref BLE_GAP_SEC_STATUS_SOURCES. */ - uint8_t bonded : 1; /**< Procedure resulted in a bond. */ - ble_gap_sec_levels_t sm1_levels; /**< Levels supported in Security Mode 1. */ - ble_gap_sec_levels_t sm2_levels; /**< Levels supported in Security Mode 2. */ - ble_gap_sec_kdist_t kdist_own; /**< Bitmap stating which keys were exchanged (distributed) by the local device. If bonding with LE Secure Connections, the enc bit will be always set. */ - ble_gap_sec_kdist_t kdist_peer; /**< Bitmap stating which keys were exchanged (distributed) by the remote device. If bonding with LE Secure Connections, the enc bit will never be set. */ -} ble_gap_evt_auth_status_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_CONN_SEC_UPDATE. */ -typedef struct -{ - ble_gap_conn_sec_t conn_sec; /**< Connection security level. */ -} ble_gap_evt_conn_sec_update_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_TIMEOUT. */ -typedef struct -{ - uint8_t src; /**< Source of timeout event, see @ref BLE_GAP_TIMEOUT_SOURCES. */ -} ble_gap_evt_timeout_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_RSSI_CHANGED. */ -typedef struct -{ - int8_t rssi; /**< Received Signal Strength Indication in dBm. */ -} ble_gap_evt_rssi_changed_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_ADV_REPORT. */ -typedef struct -{ - ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 - and the address is the device's identity address. */ - ble_gap_addr_t direct_addr; /**< Set when the scanner is unable to resolve the private resolvable address of the initiator - field of a directed advertisement packet and the scanner has been enabled to report this in @ref ble_gap_scan_params_t::adv_dir_report. */ - int8_t rssi; /**< Received Signal Strength Indication in dBm. */ - uint8_t scan_rsp : 1; /**< If 1, the report corresponds to a scan response and the type field may be ignored. */ - uint8_t type : 2; /**< See @ref BLE_GAP_ADV_TYPES. Only valid if the scan_rsp field is 0. */ - uint8_t dlen : 5; /**< Advertising or scan response data length. */ - uint8_t data[BLE_GAP_ADV_MAX_SIZE]; /**< Advertising or scan response data. */ -} ble_gap_evt_adv_report_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_SEC_REQUEST. */ -typedef struct -{ - uint8_t bond : 1; /**< Perform bonding. */ - uint8_t mitm : 1; /**< Man In The Middle protection requested. */ - uint8_t lesc : 1; /**< LE Secure Connections requested. */ - uint8_t keypress : 1; /**< Generation of keypress notifications requested. */ -} ble_gap_evt_sec_request_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST. */ -typedef struct -{ - ble_gap_conn_params_t conn_params; /**< GAP Connection Parameters. */ -} ble_gap_evt_conn_param_update_request_t; - - -/**@brief Event structure for @ref BLE_GAP_EVT_SCAN_REQ_REPORT. */ -typedef struct -{ - int8_t rssi; /**< Received Signal Strength Indication in dBm. */ - ble_gap_addr_t peer_addr; /**< Bluetooth address of the peer device. If the peer_addr resolved: @ref ble_gap_addr_t::addr_id_peer is set to 1 - and the address is the device's identity address. */ -} ble_gap_evt_scan_req_report_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST. */ -typedef struct -{ - ble_gap_data_length_params_t peer_params; /**< Peer data length parameters. */ -} ble_gap_evt_data_length_update_request_t; - -/**@brief Event structure for @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE. */ -typedef struct -{ - ble_gap_data_length_params_t effective_params; /**< The effective data length parameters. */ -} ble_gap_evt_data_length_update_t; - - -/**@brief GAP event structure. */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle on which event occurred. */ - union /**< union alternative identified by evt_id in enclosing struct. */ - { - ble_gap_evt_connected_t connected; /**< Connected Event Parameters. */ - ble_gap_evt_disconnected_t disconnected; /**< Disconnected Event Parameters. */ - ble_gap_evt_conn_param_update_t conn_param_update; /**< Connection Parameter Update Parameters. */ - ble_gap_evt_sec_params_request_t sec_params_request; /**< Security Parameters Request Event Parameters. */ - ble_gap_evt_sec_info_request_t sec_info_request; /**< Security Information Request Event Parameters. */ - ble_gap_evt_passkey_display_t passkey_display; /**< Passkey Display Event Parameters. */ - ble_gap_evt_key_pressed_t key_pressed; /**< Key Pressed Event Parameters. */ - ble_gap_evt_auth_key_request_t auth_key_request; /**< Authentication Key Request Event Parameters. */ - ble_gap_evt_lesc_dhkey_request_t lesc_dhkey_request; /**< LE Secure Connections DHKey calculation request. */ - ble_gap_evt_auth_status_t auth_status; /**< Authentication Status Event Parameters. */ - ble_gap_evt_conn_sec_update_t conn_sec_update; /**< Connection Security Update Event Parameters. */ - ble_gap_evt_timeout_t timeout; /**< Timeout Event Parameters. */ - ble_gap_evt_rssi_changed_t rssi_changed; /**< RSSI Event Parameters. */ - ble_gap_evt_adv_report_t adv_report; /**< Advertising Report Event Parameters. */ - ble_gap_evt_sec_request_t sec_request; /**< Security Request Event Parameters. */ - ble_gap_evt_conn_param_update_request_t conn_param_update_request; /**< Connection Parameter Update Parameters. */ - ble_gap_evt_scan_req_report_t scan_req_report; /**< Scan Request Report Parameters. */ - ble_gap_evt_phy_update_t phy_update; /**< PHY Update Parameters. */ - ble_gap_evt_data_length_update_request_t data_length_update_request; /**< Data Length Update Request Event Parameters. */ - ble_gap_evt_data_length_update_t data_length_update; /**< Data Length Update Event Parameters. */ - } params; /**< Event Parameters. */ -} ble_gap_evt_t; - - -/** - * @brief BLE GAP connection configuration parameters, set with @ref sd_ble_cfg_set. - * - * @retval ::NRF_ERROR_CONN_COUNT The connection count for the connection configurations is zero. - * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: - * - The sum of conn_count for all connection configurations combined exceeds UINT8_MAX. - * - The event length is smaller than @ref BLE_GAP_EVENT_LENGTH_MIN. - */ -typedef struct -{ - uint8_t conn_count; /**< The number of concurrent connections the application can create with this configuration. - The default and minimum value is @ref BLE_GAP_CONN_COUNT_DEFAULT. */ - uint16_t event_length; /**< The time set aside for this connection on every connection interval in 1.25 ms units. - The default value is @ref BLE_GAP_EVENT_LENGTH_DEFAULT, the minimum value is @ref BLE_GAP_EVENT_LENGTH_MIN. - The event length and the connection interval are the primary parameters - for setting the throughput of a connection. - See the SoftDevice Specification for details on throughput. */ -} ble_gap_conn_cfg_t; - - -/** - * @brief Configuration of maximum concurrent connections in the different connected roles, set with - * @ref sd_ble_cfg_set. - * - * @retval ::NRF_ERROR_CONN_COUNT The sum of periph_role_count and central_role_count is too - * large. The maximum supported sum of concurrent connections is - * @ref BLE_GAP_ROLE_COUNT_COMBINED_MAX. - * @retval ::NRF_ERROR_INVALID_PARAM central_sec_count is larger than central_role_count. - */ -typedef struct -{ - uint8_t periph_role_count; /**< Maximum number of connections concurrently acting as a peripheral. Default value is @ref BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT. */ - uint8_t central_role_count; /**< Maximum number of connections concurrently acting as a central. Default value is @ref BLE_GAP_ROLE_COUNT_CENTRAL_DEFAULT. */ - uint8_t central_sec_count; /**< Number of SMP instances shared between all connections acting as a central. Default value is @ref BLE_GAP_ROLE_COUNT_CENTRAL_SEC_DEFAULT. */ -} ble_gap_cfg_role_count_t; - - -/** - * @brief Device name and its properties, set with @ref sd_ble_cfg_set. - * - * @note If the device name is not configured, the default device name will be @ref - * BLE_GAP_DEVNAME_DEFAULT, the maximum device name length will be @ref - * BLE_GAP_DEVNAME_DEFAULT_LEN, vloc will be set to @ref BLE_GATTS_VLOC_STACK and the device name - * will have no write access. - * - * @note If @ref max_len is more than @ref BLE_GAP_DEVNAME_DEFAULT_LEN and vloc is set to @ref BLE_GATTS_VLOC_STACK, - * the attribute table size must be increased to have room for the longer device name (see - * @ref sd_ble_cfg_set and @ref ble_gatts_cfg_attr_tab_size_t). - * - * @note If vloc is @ref BLE_GATTS_VLOC_STACK : - * - p_value must point to non-volatile memory (flash) or be NULL. - * - If p_value is NULL, the device name will initially be empty. - * - * @note If vloc is @ref BLE_GATTS_VLOC_USER : - * - p_value cannot be NULL. - * - If the device name is writable, p_value must point to volatile memory (RAM). - * - * @retval ::NRF_ERROR_INVALID_PARAM One or more of the following is true: - * - Invalid device name location (vloc). - * - Invalid device name security mode. - * @retval ::NRF_ERROR_INVALID_LENGTH One or more of the following is true: - * - The device name length is invalid (must be between 0 and @ref BLE_GAP_DEVNAME_MAX_LEN). - * - The device name length is too long for the given Attribute Table. - * @retval ::NRF_ERROR_NOT_SUPPORTED Device name security mode is not supported. - */ -typedef struct -{ - ble_gap_conn_sec_mode_t write_perm; /**< Write permissions. */ - uint8_t vloc:2; /**< Value location, see @ref BLE_GATTS_VLOCS.*/ - uint8_t *p_value; /**< Pointer to where the value (device name) is stored or will be stored. */ - uint16_t current_len; /**< Current length in bytes of the memory pointed to by p_value.*/ - uint16_t max_len; /**< Maximum length in bytes of the memory pointed to by p_value.*/ -} ble_gap_cfg_device_name_t; - - -/**@brief Configuration structure for GAP configurations. */ -typedef union -{ - ble_gap_cfg_role_count_t role_count_cfg; /**< Role count configuration, cfg_id is @ref BLE_GAP_CFG_ROLE_COUNT. */ - ble_gap_cfg_device_name_t device_name_cfg; /**< Device name configuration, cfg_id is @ref BLE_GAP_CFG_DEVICE_NAME. */ -} ble_gap_cfg_t; - - -/**@brief Channel Map option. - * Used with @ref sd_ble_opt_get to get the current channel map - * or @ref sd_ble_opt_set to set a new channel map. When setting the - * channel map, it applies to all current and future connections. When getting the - * current channel map, it applies to a single connection and the connection handle - * must be supplied. - * - * @note Setting the channel map may take some time, depending on connection parameters. - * The time taken may be different for each connection and the get operation will - * return the previous channel map until the new one has taken effect. - * - * @note After setting the channel map, by spec it can not be set again until at least 1 s has passed. - * See Bluetooth Specification Version 4.1 Volume 2, Part E, Section 7.3.46. - * - * @retval ::NRF_SUCCESS Get or set successful. - * @retval ::NRF_ERROR_BUSY Channel map was set again before enough time had passed. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied for get. - * @retval ::NRF_ERROR_NOT_SUPPORTED Returned by sd_ble_opt_set in peripheral-only SoftDevices. - * - */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle (only applicable for get) */ - uint8_t ch_map[5]; /**< Channel Map (37-bit). */ -} ble_gap_opt_ch_map_t; - - -/**@brief Local connection latency option. - * - * Local connection latency is a feature which enables the slave to improve - * current consumption by ignoring the slave latency set by the peer. The - * local connection latency can only be set to a multiple of the slave latency, - * and cannot be longer than half of the supervision timeout. - * - * Used with @ref sd_ble_opt_set to set the local connection latency. The - * @ref sd_ble_opt_get is not supported for this option, but the actual - * local connection latency (unless set to NULL) is set as a return parameter - * when setting the option. - * - * @note The latency set will be truncated down to the closest slave latency event - * multiple, or the nearest multiple before half of the supervision timeout. - * - * @note The local connection latency is disabled by default, and needs to be enabled for new - * connections and whenever the connection is updated. - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_NOT_SUPPORTED Get is not supported. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. - */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle */ - uint16_t requested_latency; /**< Requested local connection latency. */ - uint16_t * p_actual_latency; /**< Pointer to storage for the actual local connection latency (can be set to NULL to skip return value). */ -} ble_gap_opt_local_conn_latency_t; - -/**@brief Disable slave latency - * - * Used with @ref sd_ble_opt_set to temporarily disable slave latency of a peripheral connection (see @ref ble_gap_conn_params_t::slave_latency). And to re-enable it again. - * When disabled, the peripheral will ignore the slave_latency set by the central. - * - * @note Shall only be called on peripheral links. - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_NOT_SUPPORTED Get is not supported. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. - */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle */ - uint8_t disable : 1; /**< Set to 1 to disable slave latency. Set to 0 enable it again.*/ -} ble_gap_opt_slave_latency_disable_t; - -/**@brief Passkey Option. - * - * Structure containing the passkey to be used during pairing. This can be used with @ref - * sd_ble_opt_set to make the SoftDevice use a preprogrammed passkey for authentication - * instead of generating a random one. - * - * @note Repeated pairing attempts using the same preprogrammed passkey makes pairing vulnerable to MITM attacks. - * - * @note @ref sd_ble_opt_get is not supported for this option. - * - */ -typedef struct -{ - uint8_t const * p_passkey; /**< Pointer to 6-digit ASCII string (digit 0..9 only, no NULL termination) passkey to be used during pairing. If this is NULL, the SoftDevice will generate a random passkey if required.*/ -} ble_gap_opt_passkey_t; - - -/**@brief Scan request report option. - * - * This can be used with @ref sd_ble_opt_set to make the SoftDevice send - * @ref BLE_GAP_EVT_SCAN_REQ_REPORT events. - * - * @note Due to the limited space reserved for scan request report events, - * not all received scan requests will be reported. - * - * @note If whitelisting is used, only whitelisted requests are reported. - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_INVALID_STATE When advertising is ongoing while the option is set. - */ -typedef struct -{ - uint8_t enable : 1; /**< Enable scan request reports. */ -} ble_gap_opt_scan_req_report_t; - -/**@brief Compatibility mode 1 option. - * - * This can be used with @ref sd_ble_opt_set to enable and disable - * compatibility mode 1. Compatibility mode 1 is disabled by default. - * - * @note Compatibility mode 1 enables interoperability with devices that do not support - * a value of 0 for the WinOffset parameter in the Link Layer CONNECT_REQ packet. - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_INVALID_STATE When connection creation is ongoing while mode 1 is set. - */ -typedef struct -{ - uint8_t enable : 1; /**< Enable compatibility mode 1.*/ -} ble_gap_opt_compat_mode_1_t; - -/**@brief Compatibility mode 2 option. - * - * This can be used with @ref sd_ble_opt_set to enable compatibility mode 2. - * Compatibility mode 2 is disabled by default. - * - * @note Compatibility mode 2 enables interoperability with devices that initiate Feature exchange - * and version exchange procedure in parallel. - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_INVALID_PARAM if enable bit is not set to 1. Currently only enabling is supported. - * @retval ::NRF_ERROR_INVALID_STATE When any role is running while mode 2 is set. - */ -typedef struct -{ - uint8_t enable : 1; /**< Enable compatibility mode 2.*/ -} ble_gap_opt_compat_mode_2_t; - - -/**@brief Authenticated payload timeout option. - * - * This can be used with @ref sd_ble_opt_set to change the Authenticated payload timeout to a value other than the default of 8 minutes. - * - * @note The authenticated payload timeout event ::BLE_GAP_TIMEOUT_SRC_AUTH_PAYLOAD will be generated - * if auth_payload_timeout time has elapsed without receiving a packet with a valid MIC on an encrypted - * link. - * - * @note The LE ping procedure will be initiated before the timer expires to give the peer a chance - * to reset the timer. In addition the stack will try to prioritize running of LE ping over other - * activities to increase chances of finishing LE ping before timer expires. To avoid side-effects - * on other activities, it is recommended to use high timeout values. - * Recommended timeout > 2*(connInterval * (6 + connSlaveLatency)). - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. auth_payload_timeout was outside of allowed range. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter. - */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle */ - uint16_t auth_payload_timeout; /**< Requested timeout in 10 ms unit. Maximum is 48 000 (=480 000 ms =8 min). Minimum is 1 (=10 ms). */ -} ble_gap_opt_auth_payload_timeout_t; - -/**@brief Preferred PHY option - * - * @details This can be used with @ref sd_ble_opt_set to change the preferred PHYs. Before this function is called the PHYs - * for peer initiated PHY Update procedure is @ref BLE_GAP_PHY_1MBPS. If @ref ble_gap_opt_preferred_phys_t::tx_phys or - * @ref ble_gap_opt_preferred_phys_t::rx_phys is 0, then the stack will select PHYs based on the peer requirements on that specific direction. - * - * @note The preferred PHYs are only valid for newly created connections after this option is called. If the PHYs should be - * changed for an existing link the @ref sd_ble_gap_phy_request would have to be called, and that would try to update the - * PHYs for the given link. - * - * @note tx_phys and rx_phys are bitfields, to indicate multiple preferred PHYs for each direction they can be ORed together. - * @code - * tx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; - * rx_phys = BLE_GAP_PHY_1MBPS | BLE_GAP_PHY_2MBPS; - * @endcode - * - * @events - * @event{@ref BLE_GAP_EVT_PHY_UPDATE, Result of the PHY Update if initiated by peer.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_PHY_REQUEST} - * @mmsc{@ref BLE_GAP_PERIPHERAL_PHY_REQUEST} - * @endmscs - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - */ -typedef struct -{ - uint8_t tx_phys; /**< Preferred transmit PHYs, see @ref BLE_GAP_PHYS. */ - uint8_t rx_phys; /**< Preferred receive PHYs, see @ref BLE_GAP_PHYS. */ -} ble_gap_opt_preferred_phys_t; - -/**@brief Option structure for GAP options. */ -typedef union -{ - ble_gap_opt_ch_map_t ch_map; /**< Parameters for the Channel Map option. */ - ble_gap_opt_local_conn_latency_t local_conn_latency; /**< Parameters for the Local connection latency option */ - ble_gap_opt_passkey_t passkey; /**< Parameters for the Passkey option.*/ - ble_gap_opt_scan_req_report_t scan_req_report; /**< Parameters for the scan request report option.*/ - ble_gap_opt_compat_mode_1_t compat_mode_1; /**< Parameters for the compatibility mode 1 option.*/ - ble_gap_opt_compat_mode_2_t compat_mode_2; /**< Parameters for the compatibility mode 2 option.*/ - ble_gap_opt_auth_payload_timeout_t auth_payload_timeout; /**< Parameters for the authenticated payload timeout option.*/ - ble_gap_opt_preferred_phys_t preferred_phys; /**< Parameters for the preferred PHYs option. */ - ble_gap_opt_slave_latency_disable_t slave_latency_disable; /**< Parameters for the Disable slave latency option */ -} ble_gap_opt_t; -/**@} */ - - -/**@addtogroup BLE_GAP_FUNCTIONS Functions - * @{ */ - -/**@brief Set the local Bluetooth identity address. - * - * The local Bluetooth identity address is the address that identifies this device to other peers. - * The address type must be either @ref BLE_GAP_ADDR_TYPE_PUBLIC or @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC. - * The identity address cannot be changed while roles are running. - * - * @note This address will be distributed to the peer during bonding. - * If the address changes, the address stored in the peer device will not be valid and the ability to - * reconnect using the old address will be lost. - * - * @note By default the SoftDevice will set an address of type @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC upon being - * enabled. The address is a random number populated during the IC manufacturing process and remains unchanged - * for the lifetime of each IC. - * - * @mscs - * @mmsc{@ref BLE_GAP_ADV_MSC} - * @endmscs - * - * @param[in] p_addr Pointer to address structure. - * - * @retval ::NRF_SUCCESS Address successfully set. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::NRF_ERROR_INVALID_STATE The identity address cannot be changed while the roles are running. - */ -SVCALL(SD_BLE_GAP_ADDR_SET, uint32_t, sd_ble_gap_addr_set(ble_gap_addr_t const *p_addr)); - - -/**@brief Get local Bluetooth identity address. - * - * @note This will always return the identity address irrespective of the privacy settings, - * i.e. the address type will always be either @ref BLE_GAP_ADDR_TYPE_PUBLIC or @ref BLE_GAP_ADDR_TYPE_RANDOM_STATIC. - * - * @param[out] p_addr Pointer to address structure to be filled in. - * - * @retval ::NRF_SUCCESS Address successfully retrieved. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. - */ -SVCALL(SD_BLE_GAP_ADDR_GET, uint32_t, sd_ble_gap_addr_get(ble_gap_addr_t *p_addr)); - - -/**@brief Set the active whitelist in the SoftDevice. - * - * @note Only one whitelist can be used at a time and the whitelist is shared between the BLE roles. - * The whitelist cannot be set if a BLE role is using the whitelist. - * - * @note If an address is resolved using the information in the device identity list, then the whitelist - * filter policy applies to the peer identity address and not the resolvable address sent on air. - * - * @mscs - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_PRIVATE_SCAN_MSC} - * @endmscs - * - * @param[in] pp_wl_addrs Pointer to a whitelist of peer addresses, if NULL the whitelist will be cleared. - * @param[in] len Length of the whitelist, maximum @ref BLE_GAP_WHITELIST_ADDR_MAX_COUNT. - * - * @retval ::NRF_SUCCESS The whitelist is successfully set/cleared. - * @retval ::NRF_ERROR_INVALID_ADDR The whitelist (or one of its entries) provided is invalid. - * @retval ::BLE_ERROR_GAP_WHITELIST_IN_USE The whitelist is in use by a BLE role and cannot be set or cleared. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. - * @retval ::NRF_ERROR_DATA_SIZE The given whitelist size is invalid (zero or too large); this can only return when - * pp_wl_addrs is not NULL. - */ -SVCALL(SD_BLE_GAP_WHITELIST_SET, uint32_t, sd_ble_gap_whitelist_set(ble_gap_addr_t const * const * pp_wl_addrs, uint8_t len)); - - -/**@brief Set device identity list. - * - * @note Only one device identity list can be used at a time and the list is shared between the BLE roles. - * The device identity list cannot be set if a BLE role is using the list. - * - * @param[in] pp_id_keys Pointer to an array of peer identity addresses and peer IRKs, if NULL the device identity list will be cleared. - * @param[in] pp_local_irks Pointer to an array of local IRKs. Each entry in the array maps to the entry in pp_id_keys at the same index. - * To fill in the list with the currently set device IRK for all peers, set to NULL. - * @param[in] len Length of the device identity list, maximum @ref BLE_GAP_DEVICE_IDENTITIES_MAX_COUNT. - * - * @mscs - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_PRIVATE_SCAN_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_CONN_PRIV_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_CONN_PRIV_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS The device identity list successfully set/cleared. - * @retval ::NRF_ERROR_INVALID_ADDR The device identity list (or one of its entries) provided is invalid. - * This code may be returned if the local IRK list also has an invalid entry. - * @retval ::BLE_ERROR_GAP_DEVICE_IDENTITIES_IN_USE The device identity list is in use and cannot be set or cleared. - * @retval ::BLE_ERROR_GAP_DEVICE_IDENTITIES_DUPLICATE The device identity list contains multiple entries with the same identity address. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. - * @retval ::NRF_ERROR_DATA_SIZE The given device identity list size invalid (zero or too large); this can - * only return when pp_id_keys is not NULL. - */ -SVCALL(SD_BLE_GAP_DEVICE_IDENTITIES_SET, uint32_t, sd_ble_gap_device_identities_set(ble_gap_id_key_t const * const * pp_id_keys, ble_gap_irk_t const * const * pp_local_irks, uint8_t len)); - - -/**@brief Set privacy settings. - * - * @note Privacy settings cannot be set while BLE roles are running. - * - * @param[in] p_privacy_params Privacy settings. - * - * @mscs - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_SCAN_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Set successfully. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid address type is supplied. - * @retval ::NRF_ERROR_INVALID_ADDR The pointer to privacy settings is NULL or invalid. - * Otherwise, the p_device_irk pointer in privacy parameter is an invalid pointer. - * @retval ::NRF_ERROR_INVALID_PARAM Out of range parameters are provided. - * @retval ::NRF_ERROR_INVALID_STATE Privacy settings cannot be changed while BLE roles using privacy are enabled. - */ -SVCALL(SD_BLE_GAP_PRIVACY_SET, uint32_t, sd_ble_gap_privacy_set(ble_gap_privacy_params_t const *p_privacy_params)); - - -/**@brief Get privacy settings. - * - * @note The privacy settings returned include the current device irk as well. - * - * @param[in] p_privacy_params Privacy settings. - * - * @retval ::NRF_SUCCESS Privacy settings read. - * @retval ::NRF_ERROR_INVALID_ADDR The pointer given for returning the privacy settings may be NULL or invalid. - * Otherwise, the p_device_irk pointer in privacy parameter is an invalid pointer. - */ -SVCALL(SD_BLE_GAP_PRIVACY_GET, uint32_t, sd_ble_gap_privacy_get(ble_gap_privacy_params_t *p_privacy_params)); - - -/**@brief Set, clear or update advertising and scan response data. - * - * @note The format of the advertising data will be checked by this call to ensure interoperability. - * Limitations imposed by this API call to the data provided include having a flags data type in the scan response data and - * duplicating the local name in the advertising data and scan response data. - * - * @note To clear the advertising data and set it to a 0-length packet, simply provide a valid pointer (p_data/p_sr_data) with its corresponding - * length (dlen/srdlen) set to 0. - * - * @note The call will fail if p_data and p_sr_data are both NULL since this would have no effect. - * - * @mscs - * @mmsc{@ref BLE_GAP_ADV_MSC} - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @endmscs - * - * @param[in] p_data Raw data to be placed in advertising packet. If NULL, no changes are made to the current advertising packet data. - * @param[in] dlen Data length for p_data. Max size: @ref BLE_GAP_ADV_MAX_SIZE octets. Should be 0 if p_data is NULL, can be 0 if p_data is not NULL. - * @param[in] p_sr_data Raw data to be placed in scan response packet. If NULL, no changes are made to the current scan response packet data. - * @param[in] srdlen Data length for p_sr_data. Max size: @ref BLE_GAP_ADV_MAX_SIZE octets. Should be 0 if p_sr_data is NULL, can be 0 if p_data is not NULL. - * - * @retval ::NRF_SUCCESS Advertising data successfully updated or cleared. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, both p_data and p_sr_data cannot be NULL. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_FLAGS Invalid combination of advertising flags supplied. - * @retval ::NRF_ERROR_INVALID_DATA Invalid data type(s) supplied, check the advertising data format specification. - * @retval ::NRF_ERROR_INVALID_LENGTH Invalid data length(s) supplied. - * @retval ::NRF_ERROR_NOT_SUPPORTED Unsupported data type. - * @retval ::BLE_ERROR_GAP_UUID_LIST_MISMATCH Invalid UUID list supplied. - */ -SVCALL(SD_BLE_GAP_ADV_DATA_SET, uint32_t, sd_ble_gap_adv_data_set(uint8_t const *p_data, uint8_t dlen, uint8_t const *p_sr_data, uint8_t srdlen)); - - -/**@brief Start advertising (GAP Discoverable, Connectable modes, Broadcast Procedure). - * - * @note An application can start an advertising procedure for broadcasting purposes while a connection - * is active. After a @ref BLE_GAP_EVT_CONNECTED event is received, this function may therefore - * be called to start a broadcast advertising procedure. The advertising procedure - * cannot however be connectable (it must be of type @ref BLE_GAP_ADV_TYPE_ADV_SCAN_IND or - * @ref BLE_GAP_ADV_TYPE_ADV_NONCONN_IND). @note Only one advertiser may be active at any time. - * - * @events - * @event{@ref BLE_GAP_EVT_CONNECTED, Generated after connection has been established through connectable advertising.} - * @event{@ref BLE_GAP_EVT_TIMEOUT, Advertisement has timed out.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_ADV_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_CONN_PRIV_MSC} - * @mmsc{@ref BLE_GAP_PRIVACY_ADV_DIR_PRIV_MSC} - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @endmscs - * - * @param[in] p_adv_params Pointer to advertising parameters structure. - * @param[in] conn_cfg_tag Tag identifying a configuration set by @ref sd_ble_cfg_set or @ref - * BLE_CONN_CFG_TAG_DEFAULT to use the default connection configuration. - * - * @retval ::NRF_SUCCESS The BLE stack has started advertising. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_CONN_COUNT The limit of available connections has been reached; connectable advertiser cannot be started. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check the accepted ranges and limits. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid Bluetooth address supplied. - * @retval ::BLE_ERROR_GAP_DISCOVERABLE_WITH_WHITELIST Discoverable mode and whitelist incompatible. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::NRF_ERROR_RESOURCES Not enough BLE role slots available. - * Stop one or more currently active roles (Central, Peripheral or Observer) and try again - */ -SVCALL(SD_BLE_GAP_ADV_START, uint32_t, sd_ble_gap_adv_start(ble_gap_adv_params_t const *p_adv_params, uint8_t conn_cfg_tag)); - - -/**@brief Stop advertising (GAP Discoverable, Connectable modes, Broadcast Procedure). - * - * @mscs - * @mmsc{@ref BLE_GAP_ADV_MSC} - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS The BLE stack has stopped advertising. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation (most probably not in advertising state). - */ -SVCALL(SD_BLE_GAP_ADV_STOP, uint32_t, sd_ble_gap_adv_stop(void)); - - - -/**@brief Update connection parameters. - * - * @details In the central role this will initiate a Link Layer connection parameter update procedure, - * otherwise in the peripheral role, this will send the corresponding L2CAP request and wait for - * the central to perform the procedure. In both cases, and regardless of success or failure, the application - * will be informed of the result with a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE event. - * - * @details This function can be used as a central both to reply to a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST or to start the procedure unrequested. - * - * @events - * @event{@ref BLE_GAP_EVT_CONN_PARAM_UPDATE, Result of the connection parameter update procedure.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CPU_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} - * @mmsc{@ref BLE_GAP_MULTILINK_CPU_MSC} - * @mmsc{@ref BLE_GAP_MULTILINK_CTRL_PROC_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_CPU_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_conn_params Pointer to desired connection parameters. If NULL is provided on a peripheral role, - * the parameters in the PPCP characteristic of the GAP service will be used instead. - * If NULL is provided on a central role and in response to a @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST, the peripheral request will be rejected - * - * @retval ::NRF_SUCCESS The Connection Update procedure has been started successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_BUSY Procedure already in progress or not allowed at this time, process pending events and wait for pending procedures to complete and retry. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - */ -SVCALL(SD_BLE_GAP_CONN_PARAM_UPDATE, uint32_t, sd_ble_gap_conn_param_update(uint16_t conn_handle, ble_gap_conn_params_t const *p_conn_params)); - - -/**@brief Disconnect (GAP Link Termination). - * - * @details This call initiates the disconnection procedure, and its completion will be communicated to the application - * with a @ref BLE_GAP_EVT_DISCONNECTED event. - * - * @events - * @event{@ref BLE_GAP_EVT_DISCONNECTED, Generated when disconnection procedure is complete.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CONN_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] hci_status_code HCI status code, see @ref BLE_HCI_STATUS_CODES (accepted values are @ref BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION and @ref BLE_HCI_CONN_INTERVAL_UNACCEPTABLE). - * - * @retval ::NRF_SUCCESS The disconnection procedure has been started successfully. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation (disconnection is already in progress). - */ -SVCALL(SD_BLE_GAP_DISCONNECT, uint32_t, sd_ble_gap_disconnect(uint16_t conn_handle, uint8_t hci_status_code)); - - -/**@brief Set the radio's transmit power. - * - * @param[in] tx_power Radio transmit power in dBm (accepted values are -40, -20, -16, -12, -8, -4, 0, 2, 3, 4, 5, 6, 7, 8 and 9 dBm). - * - * @note The -40dBm, -20dBm, -16dBm, -12dBm, -8dBm, -4dBm, 0dBm, +2dBm, +3dBm, +4dBm, +5dBm, +6dBm, +7dBm, +8dBm and +9dBm settings are available on nRF52840 series ICs. - * @note The -40dBm, -20dBm, -16dBm, -12dBm, -8dBm, -4dBm, 0dBm, +3dBm and +4dBm settings are available on nRF52 series ICs. - * - * @retval ::NRF_SUCCESS Successfully changed the transmit power. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - */ -SVCALL(SD_BLE_GAP_TX_POWER_SET, uint32_t, sd_ble_gap_tx_power_set(int8_t tx_power)); - - -/**@brief Set GAP Appearance value. - * - * @param[in] appearance Appearance (16-bit), see @ref BLE_APPEARANCES. - * - * @retval ::NRF_SUCCESS Appearance value set successfully. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - */ -SVCALL(SD_BLE_GAP_APPEARANCE_SET, uint32_t, sd_ble_gap_appearance_set(uint16_t appearance)); - - -/**@brief Get GAP Appearance value. - * - * @param[out] p_appearance Pointer to appearance (16-bit) to be filled in, see @ref BLE_APPEARANCES. - * - * @retval ::NRF_SUCCESS Appearance value retrieved successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - */ -SVCALL(SD_BLE_GAP_APPEARANCE_GET, uint32_t, sd_ble_gap_appearance_get(uint16_t *p_appearance)); - - -/**@brief Set GAP Peripheral Preferred Connection Parameters. - * - * @param[in] p_conn_params Pointer to a @ref ble_gap_conn_params_t structure with the desired parameters. - * - * @retval ::NRF_SUCCESS Peripheral Preferred Connection Parameters set successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - */ -SVCALL(SD_BLE_GAP_PPCP_SET, uint32_t, sd_ble_gap_ppcp_set(ble_gap_conn_params_t const *p_conn_params)); - - -/**@brief Get GAP Peripheral Preferred Connection Parameters. - * - * @param[out] p_conn_params Pointer to a @ref ble_gap_conn_params_t structure where the parameters will be stored. - * - * @retval ::NRF_SUCCESS Peripheral Preferred Connection Parameters retrieved successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - */ -SVCALL(SD_BLE_GAP_PPCP_GET, uint32_t, sd_ble_gap_ppcp_get(ble_gap_conn_params_t *p_conn_params)); - - -/**@brief Set GAP device name. - * - * @note If the device name is located in application flash memory (see @ref ble_gap_cfg_device_name_t), - * it cannot be changed. Then @ref NRF_ERROR_FORBIDDEN will be returned. - * - * @param[in] p_write_perm Write permissions for the Device Name characteristic, see @ref ble_gap_conn_sec_mode_t. - * @param[in] p_dev_name Pointer to a UTF-8 encoded, non NULL-terminated string. - * @param[in] len Length of the UTF-8, non NULL-terminated string pointed to by p_dev_name in octets (must be smaller or equal than @ref BLE_GAP_DEVNAME_MAX_LEN). - * - * @retval ::NRF_SUCCESS GAP device name and permissions set successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. - * @retval ::NRF_ERROR_FORBIDDEN Device name is not writable. - */ -SVCALL(SD_BLE_GAP_DEVICE_NAME_SET, uint32_t, sd_ble_gap_device_name_set(ble_gap_conn_sec_mode_t const *p_write_perm, uint8_t const *p_dev_name, uint16_t len)); - - -/**@brief Get GAP device name. - * - * @note If the device name is longer than the size of the supplied buffer, - * p_len will return the complete device name length, - * and not the number of bytes actually returned in p_dev_name. - * The application may use this information to allocate a suitable buffer size. - * - * @param[out] p_dev_name Pointer to an empty buffer where the UTF-8 non NULL-terminated string will be placed. Set to NULL to obtain the complete device name length. - * @param[in,out] p_len Length of the buffer pointed by p_dev_name, complete device name length on output. - * - * @retval ::NRF_SUCCESS GAP device name retrieved successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. - */ -SVCALL(SD_BLE_GAP_DEVICE_NAME_GET, uint32_t, sd_ble_gap_device_name_get(uint8_t *p_dev_name, uint16_t *p_len)); - - -/**@brief Initiate the GAP Authentication procedure. - * - * @details In the central role, this function will send an SMP Pairing Request (or an SMP Pairing Failed if rejected), - * otherwise in the peripheral role, an SMP Security Request will be sent. - * - * @events - * @event{Depending on the security parameters set and the packet exchanges with the peer\, the following events may be generated:} - * @event{@ref BLE_GAP_EVT_SEC_PARAMS_REQUEST} - * @event{@ref BLE_GAP_EVT_SEC_INFO_REQUEST} - * @event{@ref BLE_GAP_EVT_PASSKEY_DISPLAY} - * @event{@ref BLE_GAP_EVT_KEY_PRESSED} - * @event{@ref BLE_GAP_EVT_AUTH_KEY_REQUEST} - * @event{@ref BLE_GAP_EVT_LESC_DHKEY_REQUEST} - * @event{@ref BLE_GAP_EVT_CONN_SEC_UPDATE} - * @event{@ref BLE_GAP_EVT_AUTH_STATUS} - * @event{@ref BLE_GAP_EVT_TIMEOUT} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_SEC_REQ_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_SEC_REQ_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_sec_params Pointer to the @ref ble_gap_sec_params_t structure with the security parameters to be used during the pairing or bonding procedure. - * In the peripheral role, only the bond, mitm, lesc and keypress fields of this structure are used. - * In the central role, this pointer may be NULL to reject a Security Request. - * - * @retval ::NRF_SUCCESS Successfully initiated authentication procedure. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::NRF_ERROR_NO_MEM The maximum number of authentication procedures that can run in parallel for the given role is reached. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_NOT_SUPPORTED Setting of sign or link fields in @ref ble_gap_sec_kdist_t not supported. - * @retval ::NRF_ERROR_TIMEOUT A SMP timeout has occurred, and further SMP operations on this link is prohibited. - */ -SVCALL(SD_BLE_GAP_AUTHENTICATE, uint32_t, sd_ble_gap_authenticate(uint16_t conn_handle, ble_gap_sec_params_t const *p_sec_params)); - - -/**@brief Reply with GAP security parameters. - * - * @details This function is only used to reply to a @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. - * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. - * - * @events - * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_JW_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_PERIPH_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_CENTRAL_OOB_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_CONFIRM_FAIL_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_PD_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_KS_TOO_SMALL_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_APP_ERROR_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_REMOTE_PAIRING_FAIL_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_PAIRING_TIMEOUT_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] sec_status Security status, see @ref BLE_GAP_SEC_STATUS. - * @param[in] p_sec_params Pointer to a @ref ble_gap_sec_params_t security parameters structure. In the central role this must be set to NULL, as the parameters have - * already been provided during a previous call to @ref sd_ble_gap_authenticate. - * @param[in,out] p_sec_keyset Pointer to a @ref ble_gap_sec_keyset_t security keyset structure. Any keys generated and/or distributed as a result of the ongoing security procedure - * will be stored into the memory referenced by the pointers inside this structure. The keys will be stored and available to the application - * upon reception of a @ref BLE_GAP_EVT_AUTH_STATUS event. - * Note that the SoftDevice expects the application to provide memory for storing the - * peer's keys. So it must be ensured that the relevant pointers inside this structure are not NULL. The pointers to the local key - * can, however, be NULL, in which case, the local key data will not be available to the application upon reception of the - * @ref BLE_GAP_EVT_AUTH_STATUS event. - * - * @retval ::NRF_SUCCESS Successfully accepted security parameter from the application. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_NOT_SUPPORTED Setting of sign or link fields in @ref ble_gap_sec_kdist_t not supported. - */ -SVCALL(SD_BLE_GAP_SEC_PARAMS_REPLY, uint32_t, sd_ble_gap_sec_params_reply(uint16_t conn_handle, uint8_t sec_status, ble_gap_sec_params_t const *p_sec_params, ble_gap_sec_keyset_t const *p_sec_keyset)); - - -/**@brief Reply with an authentication key. - * - * @details This function is only used to reply to a @ref BLE_GAP_EVT_AUTH_KEY_REQUEST or a @ref BLE_GAP_EVT_PASSKEY_DISPLAY, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. - * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. - * - * @events - * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_PK_CENTRAL_OOB_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_BONDING_PK_PERIPH_OOB_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] key_type See @ref BLE_GAP_AUTH_KEY_TYPES. - * @param[in] p_key If key type is @ref BLE_GAP_AUTH_KEY_TYPE_NONE, then NULL. - * If key type is @ref BLE_GAP_AUTH_KEY_TYPE_PASSKEY, then a 6-byte ASCII string (digit 0..9 only, no NULL termination) - * or NULL when confirming LE Secure Connections Numeric Comparison. - * If key type is @ref BLE_GAP_AUTH_KEY_TYPE_OOB, then a 16-byte OOB key value in little-endian format. - * - * @retval ::NRF_SUCCESS Authentication key successfully set. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_AUTH_KEY_REPLY, uint32_t, sd_ble_gap_auth_key_reply(uint16_t conn_handle, uint8_t key_type, uint8_t const *p_key)); - -/**@brief Reply with an LE Secure connections DHKey. - * - * @details This function is only used to reply to a @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST, calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. - * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. - * - * @events - * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_LESC_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_PD_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_PAIRING_JW_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_NC_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_PD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_dhkey LE Secure Connections DHKey. - * - * @retval ::NRF_SUCCESS DHKey successfully set. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_LESC_DHKEY_REPLY, uint32_t, sd_ble_gap_lesc_dhkey_reply(uint16_t conn_handle, ble_gap_lesc_dhkey_t const *p_dhkey)); - -/**@brief Notify the peer of a local keypress. - * - * @details This function can only be used when an authentication procedure using LE Secure Connection is in progress. Calling it at other times will result in an @ref NRF_ERROR_INVALID_STATE. - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_PKE_CD_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_PKE_CD_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] kp_not See @ref BLE_GAP_KP_NOT_TYPES. - * - * @retval ::NRF_SUCCESS Keypress notification successfully queued for transmission. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. Either not entering a passkey or keypresses have not been enabled by both peers. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_BUSY The BLE stack is busy. Retry at later time. - */ -SVCALL(SD_BLE_GAP_KEYPRESS_NOTIFY, uint32_t, sd_ble_gap_keypress_notify(uint16_t conn_handle, uint8_t kp_not)); - -/**@brief Generate a set of OOB data to send to a peer out of band. - * - * @note The @ref ble_gap_addr_t included in the OOB data returned will be the currently active one (or, if a connection has already been established, - * the one used during connection setup). The application may manually overwrite it with an updated value. - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. Can be BLE_CONN_HANDLE_INVALID if a BLE connection has not been established yet. - * @param[in] p_pk_own LE Secure Connections local P-256 Public Key. - * @param[out] p_oobd_own The OOB data to be sent out of band to a peer. - * - * @retval ::NRF_SUCCESS OOB data successfully generated. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_LESC_OOB_DATA_GET, uint32_t, sd_ble_gap_lesc_oob_data_get(uint16_t conn_handle, ble_gap_lesc_p256_pk_t const *p_pk_own, ble_gap_lesc_oob_data_t *p_oobd_own)); - -/**@brief Provide the OOB data sent/received out of band. - * - * @note An authentication procedure with OOB selected as an algorithm must be in progress when calling this function. - * @note A @ref BLE_GAP_EVT_LESC_DHKEY_REQUEST event with the oobd_req set to 1 must have been received prior to calling this function. - * - * @events - * @event{This function is used during authentication procedures\, see the list of events in the documentation of @ref sd_ble_gap_authenticate.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_LESC_BONDING_OOB_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_LESC_BONDING_OOB_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_oobd_own The OOB data sent out of band to a peer or NULL if the peer has not received OOB data. - * Must correspond to @ref ble_gap_sec_params_t::oob flag in @ref BLE_GAP_EVT_SEC_PARAMS_REQUEST. - * @param[in] p_oobd_peer The OOB data received out of band from a peer or NULL if none received. - * Must correspond to @ref ble_gap_sec_params_t::oob flag in @ref sd_ble_gap_authenticate in the central role - * or @ref sd_ble_gap_sec_params_reply in the peripheral role. - * - * @retval ::NRF_SUCCESS OOB data accepted. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_LESC_OOB_DATA_SET, uint32_t, sd_ble_gap_lesc_oob_data_set(uint16_t conn_handle, ble_gap_lesc_oob_data_t const *p_oobd_own, ble_gap_lesc_oob_data_t const *p_oobd_peer)); - -/**@brief Initiate GAP Encryption procedure. - * - * @details In the central role, this function will initiate the encryption procedure using the encryption information provided. - * - * @events - * @event{@ref BLE_GAP_EVT_CONN_SEC_UPDATE, The connection security has been updated.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_ENC_AUTH_MUTEX_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_ENC_MSC} - * @mmsc{@ref BLE_GAP_MULTILINK_CTRL_PROC_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_SEC_REQ_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_master_id Pointer to a @ref ble_gap_master_id_t master identification structure. - * @param[in] p_enc_info Pointer to a @ref ble_gap_enc_info_t encryption information structure. - * - * @retval ::NRF_SUCCESS Successfully initiated authentication procedure. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::BLE_ERROR_INVALID_ROLE Operation is not supported in the Peripheral role. - * @retval ::NRF_ERROR_BUSY Procedure already in progress or not allowed at this time, wait for pending procedures to complete and retry. - */ -SVCALL(SD_BLE_GAP_ENCRYPT, uint32_t, sd_ble_gap_encrypt(uint16_t conn_handle, ble_gap_master_id_t const *p_master_id, ble_gap_enc_info_t const *p_enc_info)); - - -/**@brief Reply with GAP security information. - * - * @details This function is only used to reply to a @ref BLE_GAP_EVT_SEC_INFO_REQUEST, calling it at other times will result in @ref NRF_ERROR_INVALID_STATE. - * @note If the call returns an error code, the request is still pending, and the reply call may be repeated with corrected parameters. - * @note Data signing is not yet supported, and p_sign_info must therefore be NULL. - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_ENC_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_enc_info Pointer to a @ref ble_gap_enc_info_t encryption information structure. May be NULL to signal none is available. - * @param[in] p_id_info Pointer to a @ref ble_gap_irk_t identity information structure. May be NULL to signal none is available. - * @param[in] p_sign_info Pointer to a @ref ble_gap_sign_info_t signing information structure. May be NULL to signal none is available. - * - * @retval ::NRF_SUCCESS Successfully accepted security information. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_SEC_INFO_REPLY, uint32_t, sd_ble_gap_sec_info_reply(uint16_t conn_handle, ble_gap_enc_info_t const *p_enc_info, ble_gap_irk_t const *p_id_info, ble_gap_sign_info_t const *p_sign_info)); - - -/**@brief Get the current connection security. - * - * @param[in] conn_handle Connection handle. - * @param[out] p_conn_sec Pointer to a @ref ble_gap_conn_sec_t structure to be filled in. - * - * @retval ::NRF_SUCCESS Current connection security successfully retrieved. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_CONN_SEC_GET, uint32_t, sd_ble_gap_conn_sec_get(uint16_t conn_handle, ble_gap_conn_sec_t *p_conn_sec)); - - -/**@brief Start reporting the received signal strength to the application. - * - * A new event is reported whenever the RSSI value changes, until @ref sd_ble_gap_rssi_stop is called. - * - * @events - * @event{@ref BLE_GAP_EVT_RSSI_CHANGED, New RSSI data available. How often the event is generated is - * dependent on the settings of the threshold_dbm - * and skip_count input parameters.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} - * @mmsc{@ref BLE_GAP_RSSI_FILT_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] threshold_dbm Minimum change in dBm before triggering the @ref BLE_GAP_EVT_RSSI_CHANGED event. Events are disabled if threshold_dbm equals @ref BLE_GAP_RSSI_THRESHOLD_INVALID. - * @param[in] skip_count Number of RSSI samples with a change of threshold_dbm or more before sending a new @ref BLE_GAP_EVT_RSSI_CHANGED event. - * - * @retval ::NRF_SUCCESS Successfully activated RSSI reporting. - * @retval ::NRF_ERROR_INVALID_STATE Disconnection in progress. Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_RSSI_START, uint32_t, sd_ble_gap_rssi_start(uint16_t conn_handle, uint8_t threshold_dbm, uint8_t skip_count)); - - -/**@brief Stop reporting the received signal strength. - * - * @note An RSSI change detected before the call but not yet received by the application - * may be reported after @ref sd_ble_gap_rssi_stop has been called. - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} - * @mmsc{@ref BLE_GAP_RSSI_FILT_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * - * @retval ::NRF_SUCCESS Successfully deactivated RSSI reporting. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - */ -SVCALL(SD_BLE_GAP_RSSI_STOP, uint32_t, sd_ble_gap_rssi_stop(uint16_t conn_handle)); - - -/**@brief Get the received signal strength for the last connection event. - * - * @ref sd_ble_gap_rssi_start must be called to start reporting RSSI before using this function. @ref NRF_ERROR_NOT_FOUND - * will be returned until RSSI was sampled for the first time after calling @ref sd_ble_gap_rssi_start. - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_RSSI_READ_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[out] p_rssi Pointer to the location where the RSSI measurement shall be stored. - * - * @retval ::NRF_SUCCESS Successfully read the RSSI. - * @retval ::NRF_ERROR_NOT_FOUND No sample is available. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_INVALID_STATE RSSI reporting is not ongoing, or disconnection in progress. - */ -SVCALL(SD_BLE_GAP_RSSI_GET, uint32_t, sd_ble_gap_rssi_get(uint16_t conn_handle, int8_t *p_rssi)); - - -/**@brief Start scanning (GAP Discovery procedure, Observer Procedure). - * - * @events - * @event{@ref BLE_GAP_EVT_ADV_REPORT, An advertising or scan response packet has been received.} - * @event{@ref BLE_GAP_EVT_TIMEOUT, Scanner has timed out.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_SCAN_MSC} - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @endmscs - * - * @param[in] p_scan_params Pointer to scan parameters structure. - * - * @retval ::NRF_SUCCESS Successfully initiated scanning procedure. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. - * @retval ::NRF_ERROR_RESOURCES Not enough BLE role slots available. - * Stop one or more currently active roles (Central, Peripheral or Broadcaster) and try again - */ -SVCALL(SD_BLE_GAP_SCAN_START, uint32_t, sd_ble_gap_scan_start(ble_gap_scan_params_t const *p_scan_params)); - - -/**@brief Stop scanning (GAP Discovery procedure, Observer Procedure). - * - * @mscs - * @mmsc{@ref BLE_GAP_SCAN_MSC} - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Successfully stopped scanning procedure. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation (most probably not in scanning state). - */ -SVCALL(SD_BLE_GAP_SCAN_STOP, uint32_t, sd_ble_gap_scan_stop(void)); - - -/**@brief Create a connection (GAP Link Establishment). - * - * @note If a scanning procedure is currently in progress it will be automatically stopped when calling this function. - * The scanning procedure will be stopped even if the function returns an error. - * - * @mscs - * @mmsc{@ref BLE_GAP_WL_SHARE_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_CONN_PRIV_MSC} - * @mmsc{@ref BLE_GAP_CENTRAL_CONN_MSC} - * @endmscs - * - * @param[in] p_peer_addr Pointer to peer address. If the use_whitelist bit is set in @ref ble_gap_scan_params_t, then this is ignored. - * If @ref ble_gap_addr_t::addr_id_peer is set then p_peer_addr must be present in the device identity list - * see @ref sd_ble_gap_device_identities_set. - * @param[in] p_scan_params Pointer to scan parameters structure. - * @param[in] p_conn_params Pointer to desired connection parameters. - * @param[in] conn_cfg_tag Tag identifying a configuration set by @ref sd_ble_cfg_set or @ref - * BLE_CONN_CFG_TAG_DEFAULT to use the default connection configuration. - * - * @retval ::NRF_SUCCESS Successfully initiated connection procedure. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid parameter(s) pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * - Invalid parameter(s) in p_scan_params or p_conn_params. - * - Use of whitelist requested but whitelist has not been set, see @ref sd_ble_gap_whitelist_set. - * - Peer address was not present in the device identity list, see @ref sd_ble_gap_device_identities_set. - * @retval ::NRF_ERROR_INVALID_STATE The SoftDevice is in an invalid state to perform this operation. This may be due to an - * existing locally initiated connect procedure, which must complete before initiating again. - * @retval ::BLE_ERROR_GAP_INVALID_BLE_ADDR Invalid Peer address. - * @retval ::NRF_ERROR_CONN_COUNT The limit of available connections has been reached. - * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. If another connection is being established - * wait for the corresponding @ref BLE_GAP_EVT_CONNECTED event before calling again. - * @retval ::NRF_ERROR_RESOURCES Not enough BLE role slots available. - * Stop one or more currently active roles (Central, Peripheral or Broadcaster) and try again - */ -SVCALL(SD_BLE_GAP_CONNECT, uint32_t, sd_ble_gap_connect(ble_gap_addr_t const *p_peer_addr, ble_gap_scan_params_t const *p_scan_params, ble_gap_conn_params_t const *p_conn_params, uint8_t conn_cfg_tag)); - - -/**@brief Cancel a connection establishment. - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_CONN_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Successfully canceled an ongoing connection procedure. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - */ -SVCALL(SD_BLE_GAP_CONNECT_CANCEL, uint32_t, sd_ble_gap_connect_cancel(void)); - - -/**@brief PHY Update Request - * - * @details This function is used to request a new PHY configuration for a central or a peripheral connection. It will always generate a - * @ref BLE_GAP_EVT_PHY_UPDATE event if successfully executed. If @ref ble_gap_phys_t::tx_phys or @ref ble_gap_phys_t::rx_phys - * is 0, then the stack will select PHYs based on the peer requirements on that specific direction. If the peer does not support - * the PHY Update procedure, then the resulting @ref BLE_GAP_EVT_PHY_UPDATE event will have a status different from - * @ref BLE_HCI_STATUS_CODE_SUCCESS. - * - * @note The requested PHYs does not have to be within the set of the preferred PHYs. - * - * @note If the @ref ble_gap_opt_preferred_phys_t have not been configured with @ref BLE_GAP_PHY_CODED, then this call might return - * @ref BLE_ERROR_BLOCKED_BY_OTHER_LINKS if there are multiple devices connected. - * - * - * @events - * @event{@ref BLE_GAP_EVT_PHY_UPDATE, Result of the PHY Update procedure procedure.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GAP_CENTRAL_PHY_REQUEST} - * @mmsc{@ref BLE_GAP_PERIPHERAL_PHY_REQUEST} - * @endmscs - * - * @param[in] conn_handle Connection handle to indicate the connection for which the PHY Update is requested. - * @param[in] p_gap_phys Pointer to PHY structure. - * - * @retval ::NRF_SUCCESS Successfully requested a PHY Update. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Unsupported PHYs supplied to the call. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::BLE_ERROR_BLOCKED_BY_OTHER_LINKS Other connections may block the scheduling of the current link. - * @retval ::NRF_ERROR_BUSY Procedure is already in progress or not allowed at this time. Process pending events and wait for the pending procedure to complete and retry. - * - */ -SVCALL(SD_BLE_GAP_PHY_REQUEST, uint32_t, sd_ble_gap_phy_request(uint16_t conn_handle, ble_gap_phys_t const *p_gap_phys)); - -/**@brief Initiate or respond to a Data Length Update Procedure. - * - * @note Only symmetric input parameters for the Data Length Update is supported. Only @ref - * BLE_GAP_DATA_LENGTH_AUTO for max_tx_time_us and max_rx_time_us is supported. - * - * @note If the application uses @ref BLE_GAP_DATA_LENGTH_AUTO for one or more members of - * p_dl_params, the SoftDevice will choose the highest value supported in current - * configuration and connection parameters. - * - * @param[in] conn_handle Connection handle. - * @param[in] p_dl_params Pointer to local parameters to be used in Data Length Update - * Procedure. Set any member to @ref BLE_GAP_DATA_LENGTH_AUTO to let - * the SoftDevice automatically decide the value for that member. - * Set to NULL to use automatic values for all members. - * @param[out] p_dl_limitation Pointer to limitation to be written when local device does not - * have enough resources to accommodate the requested Data Length - * Update parameters. Ignored if NULL. - * - * @mscs - * @mmsc{@ref BLE_GAP_DATA_LENGTH_UPDATE_PROCEDURE_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Successfully set Data Length Extension initiation/response parameters. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle parameter supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameters supplied. - * @retval ::NRF_ERROR_NOT_SUPPORTED The requested parameters are not supported by the SoftDevice. - * @retval ::NRF_ERROR_RESOURCES The requested parameters can not be accommodated. Inspect - * p_dl_limitation so see where the limitation is. - * @retval ::NRF_ERROR_BUSY Peer has already initiated a Data Length Update Procedure. Process the - * pending @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST event to respond. - */ -SVCALL(SD_BLE_GAP_DATA_LENGTH_UPDATE, uint32_t, sd_ble_gap_data_length_update(uint16_t conn_handle, ble_gap_data_length_params_t const *p_dl_params, ble_gap_data_length_limitation_t *p_dl_limitation)); - - - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // BLE_GAP_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_gatt.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_gatt.h deleted file mode 100644 index f6e7ee85637..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_gatt.h +++ /dev/null @@ -1,221 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - @addtogroup BLE_GATT Generic Attribute Profile (GATT) Common - @{ - @brief Common definitions and prototypes for the GATT interfaces. - */ - -#ifndef BLE_GATT_H__ -#define BLE_GATT_H__ - -#include "ble_types.h" -#include "ble_ranges.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_GATT_DEFINES Defines - * @{ */ - -/** @brief Default ATT MTU, in bytes. */ -#define BLE_GATT_ATT_MTU_DEFAULT 23 - -/**@brief Invalid Attribute Handle. */ -#define BLE_GATT_HANDLE_INVALID 0x0000 - -/**@brief First Attribute Handle. */ -#define BLE_GATT_HANDLE_START 0x0001 - -/**@brief Last Attribute Handle. */ -#define BLE_GATT_HANDLE_END 0xFFFF - -/** @defgroup BLE_GATT_TIMEOUT_SOURCES GATT Timeout sources - * @{ */ -#define BLE_GATT_TIMEOUT_SRC_PROTOCOL 0x00 /**< ATT Protocol timeout. */ -/** @} */ - -/** @defgroup BLE_GATT_WRITE_OPS GATT Write operations - * @{ */ -#define BLE_GATT_OP_INVALID 0x00 /**< Invalid Operation. */ -#define BLE_GATT_OP_WRITE_REQ 0x01 /**< Write Request. */ -#define BLE_GATT_OP_WRITE_CMD 0x02 /**< Write Command. */ -#define BLE_GATT_OP_SIGN_WRITE_CMD 0x03 /**< Signed Write Command. */ -#define BLE_GATT_OP_PREP_WRITE_REQ 0x04 /**< Prepare Write Request. */ -#define BLE_GATT_OP_EXEC_WRITE_REQ 0x05 /**< Execute Write Request. */ -/** @} */ - -/** @defgroup BLE_GATT_EXEC_WRITE_FLAGS GATT Execute Write flags - * @{ */ -#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_CANCEL 0x00 /**< Cancel prepared write. */ -#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_WRITE 0x01 /**< Execute prepared write. */ -/** @} */ - -/** @defgroup BLE_GATT_HVX_TYPES GATT Handle Value operations - * @{ */ -#define BLE_GATT_HVX_INVALID 0x00 /**< Invalid Operation. */ -#define BLE_GATT_HVX_NOTIFICATION 0x01 /**< Handle Value Notification. */ -#define BLE_GATT_HVX_INDICATION 0x02 /**< Handle Value Indication. */ -/** @} */ - -/** @defgroup BLE_GATT_STATUS_CODES GATT Status Codes - * @{ */ -#define BLE_GATT_STATUS_SUCCESS 0x0000 /**< Success. */ -#define BLE_GATT_STATUS_UNKNOWN 0x0001 /**< Unknown or not applicable status. */ -#define BLE_GATT_STATUS_ATTERR_INVALID 0x0100 /**< ATT Error: Invalid Error Code. */ -#define BLE_GATT_STATUS_ATTERR_INVALID_HANDLE 0x0101 /**< ATT Error: Invalid Attribute Handle. */ -#define BLE_GATT_STATUS_ATTERR_READ_NOT_PERMITTED 0x0102 /**< ATT Error: Read not permitted. */ -#define BLE_GATT_STATUS_ATTERR_WRITE_NOT_PERMITTED 0x0103 /**< ATT Error: Write not permitted. */ -#define BLE_GATT_STATUS_ATTERR_INVALID_PDU 0x0104 /**< ATT Error: Used in ATT as Invalid PDU. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHENTICATION 0x0105 /**< ATT Error: Authenticated link required. */ -#define BLE_GATT_STATUS_ATTERR_REQUEST_NOT_SUPPORTED 0x0106 /**< ATT Error: Used in ATT as Request Not Supported. */ -#define BLE_GATT_STATUS_ATTERR_INVALID_OFFSET 0x0107 /**< ATT Error: Offset specified was past the end of the attribute. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHORIZATION 0x0108 /**< ATT Error: Used in ATT as Insufficient Authorization. */ -#define BLE_GATT_STATUS_ATTERR_PREPARE_QUEUE_FULL 0x0109 /**< ATT Error: Used in ATT as Prepare Queue Full. */ -#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_FOUND 0x010A /**< ATT Error: Used in ATT as Attribute not found. */ -#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_LONG 0x010B /**< ATT Error: Attribute cannot be read or written using read/write blob requests. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_ENC_KEY_SIZE 0x010C /**< ATT Error: Encryption key size used is insufficient. */ -#define BLE_GATT_STATUS_ATTERR_INVALID_ATT_VAL_LENGTH 0x010D /**< ATT Error: Invalid value size. */ -#define BLE_GATT_STATUS_ATTERR_UNLIKELY_ERROR 0x010E /**< ATT Error: Very unlikely error. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_ENCRYPTION 0x010F /**< ATT Error: Encrypted link required. */ -#define BLE_GATT_STATUS_ATTERR_UNSUPPORTED_GROUP_TYPE 0x0110 /**< ATT Error: Attribute type is not a supported grouping attribute. */ -#define BLE_GATT_STATUS_ATTERR_INSUF_RESOURCES 0x0111 /**< ATT Error: Encrypted link required. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_BEGIN 0x0112 /**< ATT Error: Reserved for Future Use range #1 begin. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_END 0x017F /**< ATT Error: Reserved for Future Use range #1 end. */ -#define BLE_GATT_STATUS_ATTERR_APP_BEGIN 0x0180 /**< ATT Error: Application range begin. */ -#define BLE_GATT_STATUS_ATTERR_APP_END 0x019F /**< ATT Error: Application range end. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_BEGIN 0x01A0 /**< ATT Error: Reserved for Future Use range #2 begin. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_END 0x01DF /**< ATT Error: Reserved for Future Use range #2 end. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_BEGIN 0x01E0 /**< ATT Error: Reserved for Future Use range #3 begin. */ -#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_END 0x01FC /**< ATT Error: Reserved for Future Use range #3 end. */ -#define BLE_GATT_STATUS_ATTERR_CPS_CCCD_CONFIG_ERROR 0x01FD /**< ATT Common Profile and Service Error: Client Characteristic Configuration Descriptor improperly configured. */ -#define BLE_GATT_STATUS_ATTERR_CPS_PROC_ALR_IN_PROG 0x01FE /**< ATT Common Profile and Service Error: Procedure Already in Progress. */ -#define BLE_GATT_STATUS_ATTERR_CPS_OUT_OF_RANGE 0x01FF /**< ATT Common Profile and Service Error: Out Of Range. */ -/** @} */ - - -/** @defgroup BLE_GATT_CPF_FORMATS Characteristic Presentation Formats - * @note Found at http://developer.bluetooth.org/gatt/descriptors/Pages/DescriptorViewer.aspx?u=org.bluetooth.descriptor.gatt.characteristic_presentation_format.xml - * @{ */ -#define BLE_GATT_CPF_FORMAT_RFU 0x00 /**< Reserved For Future Use. */ -#define BLE_GATT_CPF_FORMAT_BOOLEAN 0x01 /**< Boolean. */ -#define BLE_GATT_CPF_FORMAT_2BIT 0x02 /**< Unsigned 2-bit integer. */ -#define BLE_GATT_CPF_FORMAT_NIBBLE 0x03 /**< Unsigned 4-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT8 0x04 /**< Unsigned 8-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT12 0x05 /**< Unsigned 12-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT16 0x06 /**< Unsigned 16-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT24 0x07 /**< Unsigned 24-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT32 0x08 /**< Unsigned 32-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT48 0x09 /**< Unsigned 48-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT64 0x0A /**< Unsigned 64-bit integer. */ -#define BLE_GATT_CPF_FORMAT_UINT128 0x0B /**< Unsigned 128-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT8 0x0C /**< Signed 2-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT12 0x0D /**< Signed 12-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT16 0x0E /**< Signed 16-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT24 0x0F /**< Signed 24-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT32 0x10 /**< Signed 32-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT48 0x11 /**< Signed 48-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT64 0x12 /**< Signed 64-bit integer. */ -#define BLE_GATT_CPF_FORMAT_SINT128 0x13 /**< Signed 128-bit integer. */ -#define BLE_GATT_CPF_FORMAT_FLOAT32 0x14 /**< IEEE-754 32-bit floating point. */ -#define BLE_GATT_CPF_FORMAT_FLOAT64 0x15 /**< IEEE-754 64-bit floating point. */ -#define BLE_GATT_CPF_FORMAT_SFLOAT 0x16 /**< IEEE-11073 16-bit SFLOAT. */ -#define BLE_GATT_CPF_FORMAT_FLOAT 0x17 /**< IEEE-11073 32-bit FLOAT. */ -#define BLE_GATT_CPF_FORMAT_DUINT16 0x18 /**< IEEE-20601 format. */ -#define BLE_GATT_CPF_FORMAT_UTF8S 0x19 /**< UTF-8 string. */ -#define BLE_GATT_CPF_FORMAT_UTF16S 0x1A /**< UTF-16 string. */ -#define BLE_GATT_CPF_FORMAT_STRUCT 0x1B /**< Opaque Structure. */ -/** @} */ - -/** @defgroup BLE_GATT_CPF_NAMESPACES GATT Bluetooth Namespaces - * @{ - */ -#define BLE_GATT_CPF_NAMESPACE_BTSIG 0x01 /**< Bluetooth SIG defined Namespace. */ -#define BLE_GATT_CPF_NAMESPACE_DESCRIPTION_UNKNOWN 0x0000 /**< Namespace Description Unknown. */ -/** @} */ - -/** @} */ - -/** @addtogroup BLE_GATT_STRUCTURES Structures - * @{ */ - -/** - * @brief BLE GATT connection configuration parameters, set with @ref sd_ble_cfg_set. - * - * @retval NRF_ERROR_INVALID_PARAM att_mtu is smaller than @ref BLE_GATT_ATT_MTU_DEFAULT. - */ -typedef struct -{ - uint16_t att_mtu; /**< Maximum size of ATT packet the SoftDevice can send or receive. - The default and minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. - @mscs - @mmsc{@ref BLE_GATTC_MTU_EXCHANGE} - @mmsc{@ref BLE_GATTS_MTU_EXCHANGE} - @endmscs - */ -} ble_gatt_conn_cfg_t; - -/**@brief GATT Characteristic Properties. */ -typedef struct -{ - /* Standard properties */ - uint8_t broadcast :1; /**< Broadcasting of the value permitted. */ - uint8_t read :1; /**< Reading the value permitted. */ - uint8_t write_wo_resp :1; /**< Writing the value with Write Command permitted. */ - uint8_t write :1; /**< Writing the value with Write Request permitted. */ - uint8_t notify :1; /**< Notification of the value permitted. */ - uint8_t indicate :1; /**< Indications of the value permitted. */ - uint8_t auth_signed_wr :1; /**< Writing the value with Signed Write Command permitted. */ -} ble_gatt_char_props_t; - -/**@brief GATT Characteristic Extended Properties. */ -typedef struct -{ - /* Extended properties */ - uint8_t reliable_wr :1; /**< Writing the value with Queued Write operations permitted. */ - uint8_t wr_aux :1; /**< Writing the Characteristic User Description descriptor permitted. */ -} ble_gatt_char_ext_props_t; - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // BLE_GATT_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_gattc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_gattc.h deleted file mode 100644 index b6a75ece770..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_gattc.h +++ /dev/null @@ -1,700 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - @addtogroup BLE_GATTC Generic Attribute Profile (GATT) Client - @{ - @brief Definitions and prototypes for the GATT Client interface. - */ - -#ifndef BLE_GATTC_H__ -#define BLE_GATTC_H__ - -#include "ble_gatt.h" -#include "ble_types.h" -#include "ble_ranges.h" -#include "nrf_svc.h" -#include "nrf_error.h" -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_GATTC_ENUMERATIONS Enumerations - * @{ */ - -/**@brief GATTC API SVC numbers. */ -enum BLE_GATTC_SVCS -{ - SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER = BLE_GATTC_SVC_BASE, /**< Primary Service Discovery. */ - SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, /**< Relationship Discovery. */ - SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, /**< Characteristic Discovery. */ - SD_BLE_GATTC_DESCRIPTORS_DISCOVER, /**< Characteristic Descriptor Discovery. */ - SD_BLE_GATTC_ATTR_INFO_DISCOVER, /**< Attribute Information Discovery. */ - SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, /**< Read Characteristic Value by UUID. */ - SD_BLE_GATTC_READ, /**< Generic read. */ - SD_BLE_GATTC_CHAR_VALUES_READ, /**< Read multiple Characteristic Values. */ - SD_BLE_GATTC_WRITE, /**< Generic write. */ - SD_BLE_GATTC_HV_CONFIRM, /**< Handle Value Confirmation. */ - SD_BLE_GATTC_EXCHANGE_MTU_REQUEST, /**< Exchange MTU Request. */ -}; - -/** - * @brief GATT Client Event IDs. - */ -enum BLE_GATTC_EVTS -{ - BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP = BLE_GATTC_EVT_BASE, /**< Primary Service Discovery Response event. \n See @ref ble_gattc_evt_prim_srvc_disc_rsp_t. */ - BLE_GATTC_EVT_REL_DISC_RSP, /**< Relationship Discovery Response event. \n See @ref ble_gattc_evt_rel_disc_rsp_t. */ - BLE_GATTC_EVT_CHAR_DISC_RSP, /**< Characteristic Discovery Response event. \n See @ref ble_gattc_evt_char_disc_rsp_t. */ - BLE_GATTC_EVT_DESC_DISC_RSP, /**< Descriptor Discovery Response event. \n See @ref ble_gattc_evt_desc_disc_rsp_t. */ - BLE_GATTC_EVT_ATTR_INFO_DISC_RSP, /**< Attribute Information Response event. \n See @ref ble_gattc_evt_attr_info_disc_rsp_t. */ - BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP, /**< Read By UUID Response event. \n See @ref ble_gattc_evt_char_val_by_uuid_read_rsp_t. */ - BLE_GATTC_EVT_READ_RSP, /**< Read Response event. \n See @ref ble_gattc_evt_read_rsp_t. */ - BLE_GATTC_EVT_CHAR_VALS_READ_RSP, /**< Read multiple Response event. \n See @ref ble_gattc_evt_char_vals_read_rsp_t. */ - BLE_GATTC_EVT_WRITE_RSP, /**< Write Response event. \n See @ref ble_gattc_evt_write_rsp_t. */ - BLE_GATTC_EVT_HVX, /**< Handle Value Notification or Indication event. \n Confirm indication with @ref sd_ble_gattc_hv_confirm. \n See @ref ble_gattc_evt_hvx_t. */ - BLE_GATTC_EVT_EXCHANGE_MTU_RSP, /**< Exchange MTU Response event. \n See @ref ble_gattc_evt_exchange_mtu_rsp_t. */ - BLE_GATTC_EVT_TIMEOUT, /**< Timeout event. \n See @ref ble_gattc_evt_timeout_t. */ - BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE /**< Write without Response transmission complete. \n See @ref ble_gattc_evt_write_cmd_tx_complete_t. */ -}; - -/** @} */ - -/** @addtogroup BLE_GATTC_DEFINES Defines - * @{ */ - -/** @defgroup BLE_ERRORS_GATTC SVC return values specific to GATTC - * @{ */ -#define BLE_ERROR_GATTC_PROC_NOT_PERMITTED (NRF_GATTC_ERR_BASE + 0x000) /**< Procedure not Permitted. */ -/** @} */ - -/** @defgroup BLE_GATTC_ATTR_INFO_FORMAT Attribute Information Formats - * @{ */ -#define BLE_GATTC_ATTR_INFO_FORMAT_16BIT 1 /**< 16-bit Attribute Information Format. */ -#define BLE_GATTC_ATTR_INFO_FORMAT_128BIT 2 /**< 128-bit Attribute Information Format. */ -/** @} */ - -/** @defgroup BLE_GATTC_DEFAULTS GATT Client defaults - * @{ */ -#define BLE_GATTC_WRITE_CMD_TX_QUEUE_SIZE_DEFAULT 1 /**< Default number of Write without Response that can be queued for transmission. */ -/** @} */ - -/** @} */ - -/** @addtogroup BLE_GATTC_STRUCTURES Structures - * @{ */ - -/** - * @brief BLE GATTC connection configuration parameters, set with @ref sd_ble_cfg_set. - */ -typedef struct -{ - uint8_t write_cmd_tx_queue_size; /**< The guaranteed minimum number of Write without Response that can be queued for transmission. - The default value is @ref BLE_GATTC_WRITE_CMD_TX_QUEUE_SIZE_DEFAULT */ -} ble_gattc_conn_cfg_t; - -/**@brief Operation Handle Range. */ -typedef struct -{ - uint16_t start_handle; /**< Start Handle. */ - uint16_t end_handle; /**< End Handle. */ -} ble_gattc_handle_range_t; - - -/**@brief GATT service. */ -typedef struct -{ - ble_uuid_t uuid; /**< Service UUID. */ - ble_gattc_handle_range_t handle_range; /**< Service Handle Range. */ -} ble_gattc_service_t; - - -/**@brief GATT include. */ -typedef struct -{ - uint16_t handle; /**< Include Handle. */ - ble_gattc_service_t included_srvc; /**< Handle of the included service. */ -} ble_gattc_include_t; - - -/**@brief GATT characteristic. */ -typedef struct -{ - ble_uuid_t uuid; /**< Characteristic UUID. */ - ble_gatt_char_props_t char_props; /**< Characteristic Properties. */ - uint8_t char_ext_props : 1; /**< Extended properties present. */ - uint16_t handle_decl; /**< Handle of the Characteristic Declaration. */ - uint16_t handle_value; /**< Handle of the Characteristic Value. */ -} ble_gattc_char_t; - - -/**@brief GATT descriptor. */ -typedef struct -{ - uint16_t handle; /**< Descriptor Handle. */ - ble_uuid_t uuid; /**< Descriptor UUID. */ -} ble_gattc_desc_t; - - -/**@brief Write Parameters. */ -typedef struct -{ - uint8_t write_op; /**< Write Operation to be performed, see @ref BLE_GATT_WRITE_OPS. */ - uint8_t flags; /**< Flags, see @ref BLE_GATT_EXEC_WRITE_FLAGS. */ - uint16_t handle; /**< Handle to the attribute to be written. */ - uint16_t offset; /**< Offset in bytes. @note For WRITE_CMD and WRITE_REQ, offset must be 0. */ - uint16_t len; /**< Length of data in bytes. */ - uint8_t const *p_value; /**< Pointer to the value data. */ -} ble_gattc_write_params_t; - -/**@brief Attribute Information for 16-bit Attribute UUID. */ -typedef struct -{ - uint16_t handle; /**< Attribute handle. */ - ble_uuid_t uuid; /**< 16-bit Attribute UUID. */ -} ble_gattc_attr_info16_t; - -/**@brief Attribute Information for 128-bit Attribute UUID. */ -typedef struct -{ - uint16_t handle; /**< Attribute handle. */ - ble_uuid128_t uuid; /**< 128-bit Attribute UUID. */ -} ble_gattc_attr_info128_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Service count. */ - ble_gattc_service_t services[1]; /**< Service data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_prim_srvc_disc_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_REL_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Include count. */ - ble_gattc_include_t includes[1]; /**< Include data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_rel_disc_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Characteristic count. */ - ble_gattc_char_t chars[1]; /**< Characteristic data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_char_disc_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_DESC_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Descriptor count. */ - ble_gattc_desc_t descs[1]; /**< Descriptor data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_desc_disc_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_ATTR_INFO_DISC_RSP. */ -typedef struct -{ - uint16_t count; /**< Attribute count. */ - uint8_t format; /**< Attribute information format, see @ref BLE_GATTC_ATTR_INFO_FORMAT. */ - union { - ble_gattc_attr_info16_t attr_info16[1]; /**< Attribute information for 16-bit Attribute UUID. - @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ - ble_gattc_attr_info128_t attr_info128[1]; /**< Attribute information for 128-bit Attribute UUID. - @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ - } info; /**< Attribute information union. */ -} ble_gattc_evt_attr_info_disc_rsp_t; - -/**@brief GATT read by UUID handle value pair. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - uint8_t *p_value; /**< Pointer to the Attribute Value, length is available in @ref ble_gattc_evt_char_val_by_uuid_read_rsp_t::value_len. */ -} ble_gattc_handle_value_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP. */ -typedef struct -{ - uint16_t count; /**< Handle-Value Pair Count. */ - uint16_t value_len; /**< Length of the value in Handle-Value(s) list. */ - uint8_t handle_value[1]; /**< Handle-Value(s) list. To iterate through the list use @ref sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter. - @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_char_val_by_uuid_read_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_READ_RSP. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - uint16_t offset; /**< Offset of the attribute data. */ - uint16_t len; /**< Attribute data length. */ - uint8_t data[1]; /**< Attribute data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_read_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_VALS_READ_RSP. */ -typedef struct -{ - uint16_t len; /**< Concatenated Attribute values length. */ - uint8_t values[1]; /**< Attribute values. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_char_vals_read_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_WRITE_RSP. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - uint8_t write_op; /**< Type of write operation, see @ref BLE_GATT_WRITE_OPS. */ - uint16_t offset; /**< Data offset. */ - uint16_t len; /**< Data length. */ - uint8_t data[1]; /**< Data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_write_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_HVX. */ -typedef struct -{ - uint16_t handle; /**< Handle to which the HVx operation applies. */ - uint8_t type; /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */ - uint16_t len; /**< Attribute data length. */ - uint8_t data[1]; /**< Attribute data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gattc_evt_hvx_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP. */ -typedef struct -{ - uint16_t server_rx_mtu; /**< Server RX MTU size. */ -} ble_gattc_evt_exchange_mtu_rsp_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_TIMEOUT. */ -typedef struct -{ - uint8_t src; /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */ -} ble_gattc_evt_timeout_t; - -/**@brief Event structure for @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE. */ -typedef struct -{ - uint8_t count; /**< Number of write without response transmissions completed. */ -} ble_gattc_evt_write_cmd_tx_complete_t; - -/**@brief GATTC event structure. */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle on which event occurred. */ - uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ - uint16_t error_handle; /**< In case of error: The handle causing the error. In all other cases @ref BLE_GATT_HANDLE_INVALID. */ - union - { - ble_gattc_evt_prim_srvc_disc_rsp_t prim_srvc_disc_rsp; /**< Primary Service Discovery Response Event Parameters. */ - ble_gattc_evt_rel_disc_rsp_t rel_disc_rsp; /**< Relationship Discovery Response Event Parameters. */ - ble_gattc_evt_char_disc_rsp_t char_disc_rsp; /**< Characteristic Discovery Response Event Parameters. */ - ble_gattc_evt_desc_disc_rsp_t desc_disc_rsp; /**< Descriptor Discovery Response Event Parameters. */ - ble_gattc_evt_char_val_by_uuid_read_rsp_t char_val_by_uuid_read_rsp; /**< Characteristic Value Read by UUID Response Event Parameters. */ - ble_gattc_evt_read_rsp_t read_rsp; /**< Read Response Event Parameters. */ - ble_gattc_evt_char_vals_read_rsp_t char_vals_read_rsp; /**< Characteristic Values Read Response Event Parameters. */ - ble_gattc_evt_write_rsp_t write_rsp; /**< Write Response Event Parameters. */ - ble_gattc_evt_hvx_t hvx; /**< Handle Value Notification/Indication Event Parameters. */ - ble_gattc_evt_exchange_mtu_rsp_t exchange_mtu_rsp; /**< Exchange MTU Response Event Parameters. */ - ble_gattc_evt_timeout_t timeout; /**< Timeout Event Parameters. */ - ble_gattc_evt_attr_info_disc_rsp_t attr_info_disc_rsp; /**< Attribute Information Discovery Event Parameters. */ - ble_gattc_evt_write_cmd_tx_complete_t write_cmd_tx_complete; /**< Write without Response transmission complete Event Parameters. */ - } params; /**< Event Parameters. @note Only valid if @ref gatt_status == @ref BLE_GATT_STATUS_SUCCESS. */ -} ble_gattc_evt_t; -/** @} */ - -/** @addtogroup BLE_GATTC_FUNCTIONS Functions - * @{ */ - -/**@brief Initiate or continue a GATT Primary Service Discovery procedure. - * - * @details This function initiates or resumes a Primary Service discovery procedure, starting from the supplied handle. - * If the last service has not been reached, this function must be called again with an updated start handle value to continue the search. - * - * @note If any of the discovered services have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with - * type @ref BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event. - * - * @events - * @event{@ref BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_PRIM_SRVC_DISC_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] start_handle Handle to start searching from. - * @param[in] p_srvc_uuid Pointer to the service UUID to be found. If it is NULL, all primary services will be returned. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Primary Service Discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER, uint32_t, sd_ble_gattc_primary_services_discover(uint16_t conn_handle, uint16_t start_handle, ble_uuid_t const *p_srvc_uuid)); - - -/**@brief Initiate or continue a GATT Relationship Discovery procedure. - * - * @details This function initiates or resumes the Find Included Services sub-procedure. If the last included service has not been reached, - * this must be called again with an updated handle range to continue the search. - * - * @events - * @event{@ref BLE_GATTC_EVT_REL_DISC_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_REL_DISC_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Relationship Discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, uint32_t, sd_ble_gattc_relationships_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); - - -/**@brief Initiate or continue a GATT Characteristic Discovery procedure. - * - * @details This function initiates or resumes a Characteristic discovery procedure. If the last Characteristic has not been reached, - * this must be called again with an updated handle range to continue the discovery. - * - * @note If any of the discovered characteristics have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with - * type @ref BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event. - * - * @events - * @event{@ref BLE_GATTC_EVT_CHAR_DISC_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_CHAR_DISC_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Characteristic Discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, uint32_t, sd_ble_gattc_characteristics_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); - - -/**@brief Initiate or continue a GATT Characteristic Descriptor Discovery procedure. - * - * @details This function initiates or resumes a Characteristic Descriptor discovery procedure. If the last Descriptor has not been reached, - * this must be called again with an updated handle range to continue the discovery. - * - * @events - * @event{@ref BLE_GATTC_EVT_DESC_DISC_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_DESC_DISC_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handle_range A pointer to the range of handles of the Characteristic to perform this procedure on. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Descriptor Discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_DESCRIPTORS_DISCOVER, uint32_t, sd_ble_gattc_descriptors_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range)); - - -/**@brief Initiate or continue a GATT Read using Characteristic UUID procedure. - * - * @details This function initiates or resumes a Read using Characteristic UUID procedure. If the last Characteristic has not been reached, - * this must be called again with an updated handle range to continue the discovery. - * - * @events - * @event{@ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_READ_UUID_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_uuid Pointer to a Characteristic value UUID to read. - * @param[in] p_handle_range A pointer to the range of handles to perform this procedure on. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Read using Characteristic UUID procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, uint32_t, sd_ble_gattc_char_value_by_uuid_read(uint16_t conn_handle, ble_uuid_t const *p_uuid, ble_gattc_handle_range_t const *p_handle_range)); - - -/**@brief Initiate or continue a GATT Read (Long) Characteristic or Descriptor procedure. - * - * @details This function initiates or resumes a GATT Read (Long) Characteristic or Descriptor procedure. If the Characteristic or Descriptor - * to be read is longer than ATT_MTU - 1, this function must be called multiple times with appropriate offset to read the - * complete value. - * - * @events - * @event{@ref BLE_GATTC_EVT_READ_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_VALUE_READ_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] handle The handle of the attribute to be read. - * @param[in] offset Offset into the attribute value to be read. - * - * @retval ::NRF_SUCCESS Successfully started or resumed the Read (Long) procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_READ, uint32_t, sd_ble_gattc_read(uint16_t conn_handle, uint16_t handle, uint16_t offset)); - - -/**@brief Initiate a GATT Read Multiple Characteristic Values procedure. - * - * @details This function initiates a GATT Read Multiple Characteristic Values procedure. - * - * @events - * @event{@ref BLE_GATTC_EVT_CHAR_VALS_READ_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_READ_MULT_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handles A pointer to the handle(s) of the attribute(s) to be read. - * @param[in] handle_count The number of handles in p_handles. - * - * @retval ::NRF_SUCCESS Successfully started the Read Multiple Characteristic Values procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_CHAR_VALUES_READ, uint32_t, sd_ble_gattc_char_values_read(uint16_t conn_handle, uint16_t const *p_handles, uint16_t handle_count)); - - -/**@brief Perform a Write (Characteristic Value or Descriptor, with or without response, signed or not, long or reliable) procedure. - * - * @details This function can perform all write procedures described in GATT. - * - * @note Only one write with response procedure can be ongoing per connection at a time. - * If the application tries to write with response while another write with response procedure is ongoing, - * the function call will return @ref NRF_ERROR_BUSY. - * A @ref BLE_GATTC_EVT_WRITE_RSP event will be issued as soon as the write response arrives from the peer. - * - * @note The number of Write without Response that can be queued is configured by @ref ble_gattc_conn_cfg_t::write_cmd_tx_queue_size - * When the queue is full, the function call will return @ref NRF_ERROR_RESOURCES. - * A @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event will be issued as soon as the transmission of the write without response is complete. - * - * @note The application can keep track of the available queue element count for writes without responses by following the procedure below: - * - Store initial queue element count in a variable. - * - Decrement the variable, which stores the currently available queue element count, by one when a call to this function returns @ref NRF_SUCCESS. - * - Increment the variable, which stores the current available queue element count, by the count variable in @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event. - * - * @events - * @event{@ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE, Write without response transmission complete.} - * @event{@ref BLE_GATTC_EVT_WRITE_RSP, Write response received from the peer.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_VALUE_WRITE_WITHOUT_RESP_MSC} - * @mmsc{@ref BLE_GATTC_VALUE_WRITE_MSC} - * @mmsc{@ref BLE_GATTC_VALUE_LONG_WRITE_MSC} - * @mmsc{@ref BLE_GATTC_VALUE_RELIABLE_WRITE_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_write_params A pointer to a write parameters structure. - * - * @retval ::NRF_SUCCESS Successfully started the Write procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. - * @retval ::NRF_ERROR_BUSY For write with response, procedure already in progress. Wait for a @ref BLE_GATTC_EVT_WRITE_RSP event and retry. - * @retval ::NRF_ERROR_RESOURCES Too many writes without responses queued. - * Wait for a @ref BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE event and retry. - */ -SVCALL(SD_BLE_GATTC_WRITE, uint32_t, sd_ble_gattc_write(uint16_t conn_handle, ble_gattc_write_params_t const *p_write_params)); - - -/**@brief Send a Handle Value Confirmation to the GATT Server. - * - * @mscs - * @mmsc{@ref BLE_GATTC_HVI_MSC} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] handle The handle of the attribute in the indication. - * - * @retval ::NRF_SUCCESS Successfully queued the Handle Value Confirmation for transmission. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no Indication pending to be confirmed. - * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle. - */ -SVCALL(SD_BLE_GATTC_HV_CONFIRM, uint32_t, sd_ble_gattc_hv_confirm(uint16_t conn_handle, uint16_t handle)); - -/**@brief Discovers information about a range of attributes on a GATT server. - * - * @events - * @event{@ref BLE_GATTC_EVT_ATTR_INFO_DISC_RSP, Generated when information about a range of attributes has been received.} - * @endevents - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] p_handle_range The range of handles to request information about. - * - * @retval ::NRF_SUCCESS Successfully started an attribute information discovery procedure. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid connection state - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_ATTR_INFO_DISCOVER, uint32_t, sd_ble_gattc_attr_info_discover(uint16_t conn_handle, ble_gattc_handle_range_t const * p_handle_range)); - -/**@brief Start an ATT_MTU exchange by sending an Exchange MTU Request to the server. - * - * @details The SoftDevice sets ATT_MTU to the minimum of: - * - The Client RX MTU value, and - * - The Server RX MTU value from @ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP. - * - * However, the SoftDevice never sets ATT_MTU lower than @ref BLE_GATT_ATT_MTU_DEFAULT. - * - * @events - * @event{@ref BLE_GATTC_EVT_EXCHANGE_MTU_RSP} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTC_MTU_EXCHANGE} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] client_rx_mtu Client RX MTU size. - * - The minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. - * - The maximum value is @ref ble_gatt_conn_cfg_t::att_mtu in the connection configuration - used for this connection. - * - The value must be equal to Server RX MTU size given in @ref sd_ble_gatts_exchange_mtu_reply - * if an ATT_MTU exchange has already been performed in the other direction. - * - * @retval ::NRF_SUCCESS Successfully sent request to the server. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid connection state or an ATT_MTU exchange was already requested once. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid Client RX MTU size supplied. - * @retval ::NRF_ERROR_BUSY Client procedure already in progress. - */ -SVCALL(SD_BLE_GATTC_EXCHANGE_MTU_REQUEST, uint32_t, sd_ble_gattc_exchange_mtu_request(uint16_t conn_handle, uint16_t client_rx_mtu)); - -/**@brief Iterate through Handle-Value(s) list in @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP event. - * - * @param[in] p_gattc_evt Pointer to event buffer containing @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP event. - * @note If the buffer contains different event, behavior is undefined. - * @param[in,out] p_iter Iterator, points to @ref ble_gattc_handle_value_t structure that will be filled in with - * the next Handle-Value pair in each iteration. If the function returns other than - * @ref NRF_SUCCESS, it will not be changed. - * - To start iteration, initialize the structure to zero. - * - To continue, pass the value from previous iteration. - * - * \code - * ble_gattc_handle_value_t iter; - * memset(&iter, 0, sizeof(ble_gattc_handle_value_t)); - * while (sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(&ble_evt.evt.gattc_evt, &iter) == NRF_SUCCESS) - * { - * app_handle = iter.handle; - * memcpy(app_value, iter.p_value, ble_evt.evt.gattc_evt.params.char_val_by_uuid_read_rsp.value_len); - * } - * \endcode - * - * @retval ::NRF_SUCCESS Successfully retrieved the next Handle-Value pair. - * @retval ::NRF_ERROR_NOT_FOUND No more Handle-Value pairs available in the list. - */ -__STATIC_INLINE uint32_t sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(ble_gattc_evt_t *p_gattc_evt, ble_gattc_handle_value_t *p_iter); - -/** @} */ - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE uint32_t sd_ble_gattc_evt_char_val_by_uuid_read_rsp_iter(ble_gattc_evt_t *p_gattc_evt, ble_gattc_handle_value_t *p_iter) -{ - uint32_t value_len = p_gattc_evt->params.char_val_by_uuid_read_rsp.value_len; - uint8_t *p_first = p_gattc_evt->params.char_val_by_uuid_read_rsp.handle_value; - uint8_t *p_next = p_iter->p_value ? p_iter->p_value + value_len : p_first; - - if ((p_next - p_first) / (sizeof(uint16_t) + value_len) < p_gattc_evt->params.char_val_by_uuid_read_rsp.count) - { - p_iter->handle = (uint16_t)p_next[1] << 8 | p_next[0]; - p_iter->p_value = p_next + sizeof(uint16_t); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_NOT_FOUND; - } -} - -#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ - -#ifdef __cplusplus -} -#endif -#endif /* BLE_GATTC_H__ */ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_gatts.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_gatts.h deleted file mode 100644 index 6bb24831d87..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_gatts.h +++ /dev/null @@ -1,832 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - @addtogroup BLE_GATTS Generic Attribute Profile (GATT) Server - @{ - @brief Definitions and prototypes for the GATTS interface. - */ - -#ifndef BLE_GATTS_H__ -#define BLE_GATTS_H__ - -#include "ble_types.h" -#include "ble_ranges.h" -#include "ble_l2cap.h" -#include "ble_gap.h" -#include "ble_gatt.h" -#include "nrf_svc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_GATTS_ENUMERATIONS Enumerations - * @{ */ - -/** - * @brief GATTS API SVC numbers. - */ -enum BLE_GATTS_SVCS -{ - SD_BLE_GATTS_SERVICE_ADD = BLE_GATTS_SVC_BASE, /**< Add a service. */ - SD_BLE_GATTS_INCLUDE_ADD, /**< Add an included service. */ - SD_BLE_GATTS_CHARACTERISTIC_ADD, /**< Add a characteristic. */ - SD_BLE_GATTS_DESCRIPTOR_ADD, /**< Add a generic attribute. */ - SD_BLE_GATTS_VALUE_SET, /**< Set an attribute value. */ - SD_BLE_GATTS_VALUE_GET, /**< Get an attribute value. */ - SD_BLE_GATTS_HVX, /**< Handle Value Notification or Indication. */ - SD_BLE_GATTS_SERVICE_CHANGED, /**< Perform a Service Changed Indication to one or more peers. */ - SD_BLE_GATTS_RW_AUTHORIZE_REPLY, /**< Reply to an authorization request for a read or write operation on one or more attributes. */ - SD_BLE_GATTS_SYS_ATTR_SET, /**< Set the persistent system attributes for a connection. */ - SD_BLE_GATTS_SYS_ATTR_GET, /**< Retrieve the persistent system attributes. */ - SD_BLE_GATTS_INITIAL_USER_HANDLE_GET, /**< Retrieve the first valid user handle. */ - SD_BLE_GATTS_ATTR_GET, /**< Retrieve the UUID and/or metadata of an attribute. */ - SD_BLE_GATTS_EXCHANGE_MTU_REPLY /**< Reply to Exchange MTU Request. */ -}; - -/** - * @brief GATT Server Event IDs. - */ -enum BLE_GATTS_EVTS -{ - BLE_GATTS_EVT_WRITE = BLE_GATTS_EVT_BASE, /**< Write operation performed. \n See @ref ble_gatts_evt_write_t. */ - BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST, /**< Read/Write Authorization request. \n Reply with @ref sd_ble_gatts_rw_authorize_reply. \n See @ref ble_gatts_evt_rw_authorize_request_t. */ - BLE_GATTS_EVT_SYS_ATTR_MISSING, /**< A persistent system attribute access is pending. \n Respond with @ref sd_ble_gatts_sys_attr_set. \n See @ref ble_gatts_evt_sys_attr_missing_t. */ - BLE_GATTS_EVT_HVC, /**< Handle Value Confirmation. \n See @ref ble_gatts_evt_hvc_t. */ - BLE_GATTS_EVT_SC_CONFIRM, /**< Service Changed Confirmation. \n No additional event structure applies. */ - BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST, /**< Exchange MTU Request. \n Reply with @ref sd_ble_gatts_exchange_mtu_reply. \n See @ref ble_gatts_evt_exchange_mtu_request_t. */ - BLE_GATTS_EVT_TIMEOUT, /**< Peer failed to respond to an ATT request in time. \n See @ref ble_gatts_evt_timeout_t. */ - BLE_GATTS_EVT_HVN_TX_COMPLETE /**< Handle Value Notification transmission complete. \n See @ref ble_gatts_evt_hvn_tx_complete_t. */ -}; - -/**@brief GATTS Configuration IDs. - * - * IDs that uniquely identify a GATTS configuration. - */ -enum BLE_GATTS_CFGS -{ - BLE_GATTS_CFG_SERVICE_CHANGED = BLE_GATTS_CFG_BASE, /**< Service changed configuration. */ - BLE_GATTS_CFG_ATTR_TAB_SIZE, /**< Attribute table size configuration. */ -}; - -/** @} */ - -/** @addtogroup BLE_GATTS_DEFINES Defines - * @{ */ - -/** @defgroup BLE_ERRORS_GATTS SVC return values specific to GATTS - * @{ */ -#define BLE_ERROR_GATTS_INVALID_ATTR_TYPE (NRF_GATTS_ERR_BASE + 0x000) /**< Invalid attribute type. */ -#define BLE_ERROR_GATTS_SYS_ATTR_MISSING (NRF_GATTS_ERR_BASE + 0x001) /**< System Attributes missing. */ -/** @} */ - -/** @defgroup BLE_GATTS_ATTR_LENS_MAX Maximum attribute lengths - * @{ */ -#define BLE_GATTS_FIX_ATTR_LEN_MAX (510) /**< Maximum length for fixed length Attribute Values. */ -#define BLE_GATTS_VAR_ATTR_LEN_MAX (512) /**< Maximum length for variable length Attribute Values. */ -/** @} */ - -/** @defgroup BLE_GATTS_SRVC_TYPES GATT Server Service Types - * @{ */ -#define BLE_GATTS_SRVC_TYPE_INVALID 0x00 /**< Invalid Service Type. */ -#define BLE_GATTS_SRVC_TYPE_PRIMARY 0x01 /**< Primary Service. */ -#define BLE_GATTS_SRVC_TYPE_SECONDARY 0x02 /**< Secondary Type. */ -/** @} */ - - -/** @defgroup BLE_GATTS_ATTR_TYPES GATT Server Attribute Types - * @{ */ -#define BLE_GATTS_ATTR_TYPE_INVALID 0x00 /**< Invalid Attribute Type. */ -#define BLE_GATTS_ATTR_TYPE_PRIM_SRVC_DECL 0x01 /**< Primary Service Declaration. */ -#define BLE_GATTS_ATTR_TYPE_SEC_SRVC_DECL 0x02 /**< Secondary Service Declaration. */ -#define BLE_GATTS_ATTR_TYPE_INC_DECL 0x03 /**< Include Declaration. */ -#define BLE_GATTS_ATTR_TYPE_CHAR_DECL 0x04 /**< Characteristic Declaration. */ -#define BLE_GATTS_ATTR_TYPE_CHAR_VAL 0x05 /**< Characteristic Value. */ -#define BLE_GATTS_ATTR_TYPE_DESC 0x06 /**< Descriptor. */ -#define BLE_GATTS_ATTR_TYPE_OTHER 0x07 /**< Other, non-GATT specific type. */ -/** @} */ - - -/** @defgroup BLE_GATTS_OPS GATT Server Operations - * @{ */ -#define BLE_GATTS_OP_INVALID 0x00 /**< Invalid Operation. */ -#define BLE_GATTS_OP_WRITE_REQ 0x01 /**< Write Request. */ -#define BLE_GATTS_OP_WRITE_CMD 0x02 /**< Write Command. */ -#define BLE_GATTS_OP_SIGN_WRITE_CMD 0x03 /**< Signed Write Command. */ -#define BLE_GATTS_OP_PREP_WRITE_REQ 0x04 /**< Prepare Write Request. */ -#define BLE_GATTS_OP_EXEC_WRITE_REQ_CANCEL 0x05 /**< Execute Write Request: Cancel all prepared writes. */ -#define BLE_GATTS_OP_EXEC_WRITE_REQ_NOW 0x06 /**< Execute Write Request: Immediately execute all prepared writes. */ -/** @} */ - -/** @defgroup BLE_GATTS_VLOCS GATT Value Locations - * @{ */ -#define BLE_GATTS_VLOC_INVALID 0x00 /**< Invalid Location. */ -#define BLE_GATTS_VLOC_STACK 0x01 /**< Attribute Value is located in stack memory, no user memory is required. */ -#define BLE_GATTS_VLOC_USER 0x02 /**< Attribute Value is located in user memory. This requires the user to maintain a valid buffer through the lifetime of the attribute, since the stack - will read and write directly to the memory using the pointer provided in the APIs. There are no alignment requirements for the buffer. */ -/** @} */ - -/** @defgroup BLE_GATTS_AUTHORIZE_TYPES GATT Server Authorization Types - * @{ */ -#define BLE_GATTS_AUTHORIZE_TYPE_INVALID 0x00 /**< Invalid Type. */ -#define BLE_GATTS_AUTHORIZE_TYPE_READ 0x01 /**< Authorize a Read Operation. */ -#define BLE_GATTS_AUTHORIZE_TYPE_WRITE 0x02 /**< Authorize a Write Request Operation. */ -/** @} */ - -/** @defgroup BLE_GATTS_SYS_ATTR_FLAGS System Attribute Flags - * @{ */ -#define BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS (1 << 0) /**< Restrict system attributes to system services only. */ -#define BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS (1 << 1) /**< Restrict system attributes to user services only. */ -/** @} */ - -/** @defgroup BLE_GATTS_SERVICE_CHANGED Service Changed Inclusion Values - * @{ - */ -#define BLE_GATTS_SERVICE_CHANGED_DEFAULT (1) /**< Default is to include the Service Changed characteristic in the Attribute Table. */ -/** @} */ - -/** @defgroup BLE_GATTS_ATTR_TAB_SIZE Attribute Table size - * @{ - */ -#define BLE_GATTS_ATTR_TAB_SIZE_MIN (248) /**< Minimum Attribute Table size */ -#define BLE_GATTS_ATTR_TAB_SIZE_DEFAULT (1408) /**< Default Attribute Table size. */ -/** @} */ - -/** @defgroup BLE_GATTS_DEFAULTS GATT Server defaults - * @{ - */ -#define BLE_GATTS_HVN_TX_QUEUE_SIZE_DEFAULT 1 /**< Default number of Handle Value Notifications that can be queued for transmission. */ -/** @} */ - -/** @} */ - -/** @addtogroup BLE_GATTS_STRUCTURES Structures - * @{ */ - -/** - * @brief BLE GATTS connection configuration parameters, set with @ref sd_ble_cfg_set. - */ -typedef struct -{ - uint8_t hvn_tx_queue_size; /**< Minimum guaranteed number of Handle Value Notifications that can be queued for transmission. - The default value is @ref BLE_GATTS_HVN_TX_QUEUE_SIZE_DEFAULT */ -} ble_gatts_conn_cfg_t; - -/**@brief Attribute metadata. */ -typedef struct -{ - ble_gap_conn_sec_mode_t read_perm; /**< Read permissions. */ - ble_gap_conn_sec_mode_t write_perm; /**< Write permissions. */ - uint8_t vlen :1; /**< Variable length attribute. */ - uint8_t vloc :2; /**< Value location, see @ref BLE_GATTS_VLOCS.*/ - uint8_t rd_auth :1; /**< Read authorization and value will be requested from the application on every read operation. */ - uint8_t wr_auth :1; /**< Write authorization will be requested from the application on every Write Request operation (but not Write Command). */ -} ble_gatts_attr_md_t; - - -/**@brief GATT Attribute. */ -typedef struct -{ - ble_uuid_t const *p_uuid; /**< Pointer to the attribute UUID. */ - ble_gatts_attr_md_t const *p_attr_md; /**< Pointer to the attribute metadata structure. */ - uint16_t init_len; /**< Initial attribute value length in bytes. */ - uint16_t init_offs; /**< Initial attribute value offset in bytes. If different from zero, the first init_offs bytes of the attribute value will be left uninitialized. */ - uint16_t max_len; /**< Maximum attribute value length in bytes, see @ref BLE_GATTS_ATTR_LENS_MAX for maximum values. */ - uint8_t *p_value; /**< Pointer to the attribute data. Please note that if the @ref BLE_GATTS_VLOC_USER value location is selected in the attribute metadata, this will have to point to a buffer - that remains valid through the lifetime of the attribute. This excludes usage of automatic variables that may go out of scope or any other temporary location. - The stack may access that memory directly without the application's knowledge. For writable characteristics, this value must not be a location in flash memory.*/ -} ble_gatts_attr_t; - -/**@brief GATT Attribute Value. */ -typedef struct -{ - uint16_t len; /**< Length in bytes to be written or read. Length in bytes written or read after successful return.*/ - uint16_t offset; /**< Attribute value offset. */ - uint8_t *p_value; /**< Pointer to where value is stored or will be stored. - If value is stored in user memory, only the attribute length is updated when p_value == NULL. - Set to NULL when reading to obtain the complete length of the attribute value */ -} ble_gatts_value_t; - - -/**@brief GATT Characteristic Presentation Format. */ -typedef struct -{ - uint8_t format; /**< Format of the value, see @ref BLE_GATT_CPF_FORMATS. */ - int8_t exponent; /**< Exponent for integer data types. */ - uint16_t unit; /**< Unit from Bluetooth Assigned Numbers. */ - uint8_t name_space; /**< Namespace from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */ - uint16_t desc; /**< Namespace description from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */ -} ble_gatts_char_pf_t; - - -/**@brief GATT Characteristic metadata. */ -typedef struct -{ - ble_gatt_char_props_t char_props; /**< Characteristic Properties. */ - ble_gatt_char_ext_props_t char_ext_props; /**< Characteristic Extended Properties. */ - uint8_t const *p_char_user_desc; /**< Pointer to a UTF-8 encoded string (non-NULL terminated), NULL if the descriptor is not required. */ - uint16_t char_user_desc_max_size; /**< The maximum size in bytes of the user description descriptor. */ - uint16_t char_user_desc_size; /**< The size of the user description, must be smaller or equal to char_user_desc_max_size. */ - ble_gatts_char_pf_t const *p_char_pf; /**< Pointer to a presentation format structure or NULL if the CPF descriptor is not required. */ - ble_gatts_attr_md_t const *p_user_desc_md; /**< Attribute metadata for the User Description descriptor, or NULL for default values. */ - ble_gatts_attr_md_t const *p_cccd_md; /**< Attribute metadata for the Client Characteristic Configuration Descriptor, or NULL for default values. */ - ble_gatts_attr_md_t const *p_sccd_md; /**< Attribute metadata for the Server Characteristic Configuration Descriptor, or NULL for default values. */ -} ble_gatts_char_md_t; - - -/**@brief GATT Characteristic Definition Handles. */ -typedef struct -{ - uint16_t value_handle; /**< Handle to the characteristic value. */ - uint16_t user_desc_handle; /**< Handle to the User Description descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ - uint16_t cccd_handle; /**< Handle to the Client Characteristic Configuration Descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ - uint16_t sccd_handle; /**< Handle to the Server Characteristic Configuration Descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */ -} ble_gatts_char_handles_t; - - -/**@brief GATT HVx parameters. */ -typedef struct -{ - uint16_t handle; /**< Characteristic Value Handle. */ - uint8_t type; /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */ - uint16_t offset; /**< Offset within the attribute value. */ - uint16_t *p_len; /**< Length in bytes to be written, length in bytes written after successful return. */ - uint8_t const *p_data; /**< Actual data content, use NULL to use the current attribute value. */ -} ble_gatts_hvx_params_t; - -/**@brief GATT Authorization parameters. */ -typedef struct -{ - uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ - uint8_t update : 1; /**< If set, data supplied in p_data will be used to update the attribute value. - Please note that for @ref BLE_GATTS_AUTHORIZE_TYPE_WRITE operations this bit must always be set, - as the data to be written needs to be stored and later provided by the application. */ - uint16_t offset; /**< Offset of the attribute value being updated. */ - uint16_t len; /**< Length in bytes of the value in p_data pointer, see @ref BLE_GATTS_ATTR_LENS_MAX. */ - uint8_t const *p_data; /**< Pointer to new value used to update the attribute value. */ -} ble_gatts_authorize_params_t; - -/**@brief GATT Read or Write Authorize Reply parameters. */ -typedef struct -{ - uint8_t type; /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */ - union { - ble_gatts_authorize_params_t read; /**< Read authorization parameters. */ - ble_gatts_authorize_params_t write; /**< Write authorization parameters. */ - } params; /**< Reply Parameters. */ -} ble_gatts_rw_authorize_reply_params_t; - -/**@brief Service Changed Inclusion configuration parameters, set with @ref sd_ble_cfg_set. */ -typedef struct -{ - uint8_t service_changed : 1; /**< If 1, include the Service Changed characteristic in the Attribute Table. Default is @ref BLE_GATTS_SERVICE_CHANGED_DEFAULT. */ -} ble_gatts_cfg_service_changed_t; - -/**@brief Attribute table size configuration parameters, set with @ref sd_ble_cfg_set. - * - * @retval ::NRF_ERROR_INVALID_LENGTH One or more of the following is true: - * - The specified Attribute Table size is too small. - * The minimum acceptable size is defined by @ref BLE_GATTS_ATTR_TAB_SIZE_MIN. - * - The specified Attribute Table size is not a multiple of 4. - */ -typedef struct -{ - uint32_t attr_tab_size; /**< Attribute table size. Default is @ref BLE_GATTS_ATTR_TAB_SIZE_DEFAULT, minimum is @ref BLE_GATTS_ATTR_TAB_SIZE_MIN. */ -} ble_gatts_cfg_attr_tab_size_t; - -/**@brief Config structure for GATTS configurations. */ -typedef union -{ - ble_gatts_cfg_service_changed_t service_changed; /**< Include service changed characteristic, cfg_id is @ref BLE_GATTS_CFG_SERVICE_CHANGED. */ - ble_gatts_cfg_attr_tab_size_t attr_tab_size; /**< Attribute table size, cfg_id is @ref BLE_GATTS_CFG_ATTR_TAB_SIZE. */ -} ble_gatts_cfg_t; - - -/**@brief Event structure for @ref BLE_GATTS_EVT_WRITE. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - ble_uuid_t uuid; /**< Attribute UUID. */ - uint8_t op; /**< Type of write operation, see @ref BLE_GATTS_OPS. */ - uint8_t auth_required; /**< Writing operation deferred due to authorization requirement. Application may use @ref sd_ble_gatts_value_set to finalize the writing operation. */ - uint16_t offset; /**< Offset for the write operation. */ - uint16_t len; /**< Length of the received data. */ - uint8_t data[1]; /**< Received data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation. - See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */ -} ble_gatts_evt_write_t; - -/**@brief Event substructure for authorized read requests, see @ref ble_gatts_evt_rw_authorize_request_t. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ - ble_uuid_t uuid; /**< Attribute UUID. */ - uint16_t offset; /**< Offset for the read operation. */ -} ble_gatts_evt_read_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST. */ -typedef struct -{ - uint8_t type; /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */ - union { - ble_gatts_evt_read_t read; /**< Attribute Read Parameters. */ - ble_gatts_evt_write_t write; /**< Attribute Write Parameters. */ - } request; /**< Request Parameters. */ -} ble_gatts_evt_rw_authorize_request_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_SYS_ATTR_MISSING. */ -typedef struct -{ - uint8_t hint; /**< Hint (currently unused). */ -} ble_gatts_evt_sys_attr_missing_t; - - -/**@brief Event structure for @ref BLE_GATTS_EVT_HVC. */ -typedef struct -{ - uint16_t handle; /**< Attribute Handle. */ -} ble_gatts_evt_hvc_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST. */ -typedef struct -{ - uint16_t client_rx_mtu; /**< Client RX MTU size. */ -} ble_gatts_evt_exchange_mtu_request_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_TIMEOUT. */ -typedef struct -{ - uint8_t src; /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */ -} ble_gatts_evt_timeout_t; - -/**@brief Event structure for @ref BLE_GATTS_EVT_HVN_TX_COMPLETE. */ -typedef struct -{ - uint8_t count; /**< Number of notification transmissions completed. */ -} ble_gatts_evt_hvn_tx_complete_t; - -/**@brief GATTS event structure. */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle on which the event occurred. */ - union - { - ble_gatts_evt_write_t write; /**< Write Event Parameters. */ - ble_gatts_evt_rw_authorize_request_t authorize_request; /**< Read or Write Authorize Request Parameters. */ - ble_gatts_evt_sys_attr_missing_t sys_attr_missing; /**< System attributes missing. */ - ble_gatts_evt_hvc_t hvc; /**< Handle Value Confirmation Event Parameters. */ - ble_gatts_evt_exchange_mtu_request_t exchange_mtu_request; /**< Exchange MTU Request Event Parameters. */ - ble_gatts_evt_timeout_t timeout; /**< Timeout Event. */ - ble_gatts_evt_hvn_tx_complete_t hvn_tx_complete; /**< Handle Value Notification transmission complete Event Parameters. */ - } params; /**< Event Parameters. */ -} ble_gatts_evt_t; - -/** @} */ - -/** @addtogroup BLE_GATTS_FUNCTIONS Functions - * @{ */ - -/**@brief Add a service declaration to the Attribute Table. - * - * @note Secondary Services are only relevant in the context of the entity that references them, it is therefore forbidden to - * add a secondary service declaration that is not referenced by another service later in the Attribute Table. - * - * @mscs - * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} - * @endmscs - * - * @param[in] type Toggles between primary and secondary services, see @ref BLE_GATTS_SRVC_TYPES. - * @param[in] p_uuid Pointer to service UUID. - * @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored. - * - * @retval ::NRF_SUCCESS Successfully added a service declaration. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, Vendor Specific UUIDs need to be present in the table. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - */ -SVCALL(SD_BLE_GATTS_SERVICE_ADD, uint32_t, sd_ble_gatts_service_add(uint8_t type, ble_uuid_t const *p_uuid, uint16_t *p_handle)); - - -/**@brief Add an include declaration to the Attribute Table. - * - * @note It is currently only possible to add an include declaration to the last added service (i.e. only sequential population is supported at this time). - * - * @note The included service must already be present in the Attribute Table prior to this call. - * - * @mscs - * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} - * @endmscs - * - * @param[in] service_handle Handle of the service where the included service is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. - * @param[in] inc_srvc_handle Handle of the included service. - * @param[out] p_include_handle Pointer to a 16-bit word where the assigned handle will be stored. - * - * @retval ::NRF_SUCCESS Successfully added an include declaration. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, handle values need to match previously added services. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. - * @retval ::NRF_ERROR_NOT_SUPPORTED Feature is not supported, service_handle must be that of the last added service. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, self inclusions are not allowed. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. - */ -SVCALL(SD_BLE_GATTS_INCLUDE_ADD, uint32_t, sd_ble_gatts_include_add(uint16_t service_handle, uint16_t inc_srvc_handle, uint16_t *p_include_handle)); - - -/**@brief Add a characteristic declaration, a characteristic value declaration and optional characteristic descriptor declarations to the Attribute Table. - * - * @note It is currently only possible to add a characteristic to the last added service (i.e. only sequential population is supported at this time). - * - * @note Several restrictions apply to the parameters, such as matching permissions between the user description descriptor and the writable auxiliaries bits, - * readable (no security) and writable (selectable) CCCDs and SCCDs and valid presentation format values. - * - * @note If no metadata is provided for the optional descriptors, their permissions will be derived from the characteristic permissions. - * - * @mscs - * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} - * @endmscs - * - * @param[in] service_handle Handle of the service where the characteristic is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. - * @param[in] p_char_md Characteristic metadata. - * @param[in] p_attr_char_value Pointer to the attribute structure corresponding to the characteristic value. - * @param[out] p_handles Pointer to the structure where the assigned handles will be stored. - * - * @retval ::NRF_SUCCESS Successfully added a characteristic. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, service handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a service context is required. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. - */ -SVCALL(SD_BLE_GATTS_CHARACTERISTIC_ADD, uint32_t, sd_ble_gatts_characteristic_add(uint16_t service_handle, ble_gatts_char_md_t const *p_char_md, ble_gatts_attr_t const *p_attr_char_value, ble_gatts_char_handles_t *p_handles)); - - -/**@brief Add a descriptor to the Attribute Table. - * - * @note It is currently only possible to add a descriptor to the last added characteristic (i.e. only sequential population is supported at this time). - * - * @mscs - * @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC} - * @endmscs - * - * @param[in] char_handle Handle of the characteristic where the descriptor is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially. - * @param[in] p_attr Pointer to the attribute structure. - * @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored. - * - * @retval ::NRF_SUCCESS Successfully added a descriptor. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, characteristic handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints. - * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a characteristic context is required. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. - */ -SVCALL(SD_BLE_GATTS_DESCRIPTOR_ADD, uint32_t, sd_ble_gatts_descriptor_add(uint16_t char_handle, ble_gatts_attr_t const *p_attr, uint16_t *p_handle)); - -/**@brief Set the value of a given attribute. - * - * @note Values other than system attributes can be set at any time, regardless of whether any active connections exist. - * - * @mscs - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. Ignored if the value does not belong to a system attribute. - * @param[in] handle Attribute handle. - * @param[in,out] p_value Attribute value information. - * - * @retval ::NRF_SUCCESS Successfully set the value of the attribute. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. - * @retval ::NRF_ERROR_FORBIDDEN Forbidden handle supplied, certain attributes are not modifiable by the application. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied on a system attribute. - */ -SVCALL(SD_BLE_GATTS_VALUE_SET, uint32_t, sd_ble_gatts_value_set(uint16_t conn_handle, uint16_t handle, ble_gatts_value_t *p_value)); - -/**@brief Get the value of a given attribute. - * - * @note If the attribute value is longer than the size of the supplied buffer, - * p_len will return the total attribute value length (excluding offset), - * and not the number of bytes actually returned in p_data. - * The application may use this information to allocate a suitable buffer size. - * - * @note When retrieving system attribute values with this function, the connection handle - * may refer to an already disconnected connection. Refer to the documentation of - * @ref sd_ble_gatts_sys_attr_get for further information. - * - * @param[in] conn_handle Connection handle. Ignored if the value does not belong to a system attribute. - * @param[in] handle Attribute handle. - * @param[in,out] p_value Attribute value information. - * - * @retval ::NRF_SUCCESS Successfully retrieved the value of the attribute. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid attribute offset supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied on a system attribute. - * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. - */ -SVCALL(SD_BLE_GATTS_VALUE_GET, uint32_t, sd_ble_gatts_value_get(uint16_t conn_handle, uint16_t handle, ble_gatts_value_t *p_value)); - -/**@brief Notify or Indicate an attribute value. - * - * @details This function checks for the relevant Client Characteristic Configuration descriptor value to verify that the relevant operation - * (notification or indication) has been enabled by the client. It is also able to update the attribute value before issuing the PDU, so that - * the application can atomically perform a value update and a server initiated transaction with a single API call. - * - * @note The local attribute value may be updated even if an outgoing packet is not sent to the peer due to an error during execution. - * The Attribute Table has been updated if one of the following error codes is returned: @ref NRF_ERROR_INVALID_STATE, @ref NRF_ERROR_BUSY, - * @ref NRF_ERROR_FORBIDDEN, @ref BLE_ERROR_GATTS_SYS_ATTR_MISSING and @ref NRF_ERROR_RESOURCES. - * The caller can check whether the value has been updated by looking at the contents of *(p_hvx_params->p_len). - * - * @note Only one indication procedure can be ongoing per connection at a time. - * If the application tries to indicate an attribute value while another indication procedure is ongoing, - * the function call will return @ref NRF_ERROR_BUSY. - * A @ref BLE_GATTS_EVT_HVC event will be issued as soon as the confirmation arrives from the peer. - * - * @note The number of Handle Value Notifications that can be queued is configured by @ref ble_gatts_conn_cfg_t::hvn_tx_queue_size - * When the queue is full, the function call will return @ref NRF_ERROR_RESOURCES. - * A @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event will be issued as soon as the transmission of the notification is complete. - * - * @note The application can keep track of the available queue element count for notifications by following the procedure below: - * - Store initial queue element count in a variable. - * - Decrement the variable, which stores the currently available queue element count, by one when a call to this function returns @ref NRF_SUCCESS. - * - Increment the variable, which stores the current available queue element count, by the count variable in @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event. - * - * @events - * @event{@ref BLE_GATTS_EVT_HVN_TX_COMPLETE, Notification transmission complete.} - * @event{@ref BLE_GATTS_EVT_HVC, Confirmation received from the peer.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC} - * @mmsc{@ref BLE_GATTS_HVN_MSC} - * @mmsc{@ref BLE_GATTS_HVI_MSC} - * @mmsc{@ref BLE_GATTS_HVX_DISABLED_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_hvx_params Pointer to an HVx parameters structure. If the p_data member contains a non-NULL pointer the attribute value will be updated with - * the contents pointed by it before sending the notification or indication. - * - * @retval ::NRF_SUCCESS Successfully queued a notification or indication for transmission, and optionally updated the attribute value. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE One or more of the following is true: - * - Invalid Connection State - * - Notifications and/or indications not enabled in the CCCD - * - An ATT_MTU exchange is ongoing - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied. Only attributes added directly by the application are available to notify and indicate. - * @retval ::BLE_ERROR_GATTS_INVALID_ATTR_TYPE Invalid attribute type(s) supplied, only characteristic values may be notified and indicated. - * @retval ::NRF_ERROR_NOT_FOUND Attribute not found. - * @retval ::NRF_ERROR_FORBIDDEN The connection's current security level is lower than the one required by the write permissions of the CCCD associated with this characteristic. - * @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied. - * @retval ::NRF_ERROR_BUSY For @ref BLE_GATT_HVX_INDICATION Procedure already in progress. Wait for a @ref BLE_GATTS_EVT_HVC event and retry. - * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. - * @retval ::NRF_ERROR_RESOURCES Too many notifications queued. - * Wait for a @ref BLE_GATTS_EVT_HVN_TX_COMPLETE event and retry. - */ -SVCALL(SD_BLE_GATTS_HVX, uint32_t, sd_ble_gatts_hvx(uint16_t conn_handle, ble_gatts_hvx_params_t const *p_hvx_params)); - -/**@brief Indicate the Service Changed attribute value. - * - * @details This call will send a Handle Value Indication to one or more peers connected to inform them that the Attribute - * Table layout has changed. As soon as the peer has confirmed the indication, a @ref BLE_GATTS_EVT_SC_CONFIRM event will - * be issued. - * - * @note Some of the restrictions and limitations that apply to @ref sd_ble_gatts_hvx also apply here. - * - * @events - * @event{@ref BLE_GATTS_EVT_SC_CONFIRM, Confirmation of attribute table change received from peer.} - * @endevents - * - * @mscs - * @mmsc{@ref BLE_GATTS_SC_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] start_handle Start of affected attribute handle range. - * @param[in] end_handle End of affected attribute handle range. - * - * @retval ::NRF_SUCCESS Successfully queued the Service Changed indication for transmission. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_NOT_SUPPORTED Service Changed not enabled at initialization. See @ref - * sd_ble_cfg_set and @ref ble_gatts_cfg_service_changed_t. - * @retval ::NRF_ERROR_INVALID_STATE One or more of the following is true: - * - Invalid Connection State - * - Notifications and/or indications not enabled in the CCCD - * - An ATT_MTU exchange is ongoing - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied. - * @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied, handles must be in the range populated by the application. - * @retval ::NRF_ERROR_BUSY Procedure already in progress. - * @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value. - */ -SVCALL(SD_BLE_GATTS_SERVICE_CHANGED, uint32_t, sd_ble_gatts_service_changed(uint16_t conn_handle, uint16_t start_handle, uint16_t end_handle)); - -/**@brief Respond to a Read/Write authorization request. - * - * @note This call should only be used as a response to a @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST event issued to the application. - * - * @mscs - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} - * @mmsc{@ref BLE_GATTS_READ_REQ_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_WRITE_REQ_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_PEER_CANCEL_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_rw_authorize_reply_params Pointer to a structure with the attribute provided by the application. - * - * @note @ref ble_gatts_authorize_params_t::p_data is ignored when this function is used to respond - * to a @ref BLE_GATTS_AUTHORIZE_TYPE_READ event if @ref ble_gatts_authorize_params_t::update - * is set to 0. - * - * @retval ::NRF_SUCCESS Successfully queued a response to the peer, and in the case of a write operation, Attribute Table updated. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no authorization request pending. - * @retval ::NRF_ERROR_INVALID_PARAM Authorization op invalid, - * handle supplied does not match requested handle, - * or invalid data to be written provided by the application. - */ -SVCALL(SD_BLE_GATTS_RW_AUTHORIZE_REPLY, uint32_t, sd_ble_gatts_rw_authorize_reply(uint16_t conn_handle, ble_gatts_rw_authorize_reply_params_t const *p_rw_authorize_reply_params)); - - -/**@brief Update persistent system attribute information. - * - * @details Supply information about persistent system attributes to the stack, - * previously obtained using @ref sd_ble_gatts_sys_attr_get. - * This call is only allowed for active connections, and is usually - * made immediately after a connection is established with an known bonded device, - * often as a response to a @ref BLE_GATTS_EVT_SYS_ATTR_MISSING. - * - * p_sysattrs may point directly to the application's stored copy of the system attributes - * obtained using @ref sd_ble_gatts_sys_attr_get. - * If the pointer is NULL, the system attribute info is initialized, assuming that - * the application does not have any previously saved system attribute data for this device. - * - * @note The state of persistent system attributes is reset upon connection establishment and then remembered for its duration. - * - * @note If this call returns with an error code different from @ref NRF_SUCCESS, the storage of persistent system attributes may have been completed only partially. - * This means that the state of the attribute table is undefined, and the application should either provide a new set of attributes using this same call or - * reset the SoftDevice to return to a known state. - * - * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS is used with this function, only the system attributes included in system services will be modified. - * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS is used with this function, only the system attributes included in user services will be modified. - * - * @mscs - * @mmsc{@ref BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC} - * @mmsc{@ref BLE_GATTS_SYS_ATTRS_UNK_PEER_MSC} - * @mmsc{@ref BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle. - * @param[in] p_sys_attr_data Pointer to a saved copy of system attributes supplied to the stack, or NULL. - * @param[in] len Size of data pointed by p_sys_attr_data, in octets. - * @param[in] flags Optional additional flags, see @ref BLE_GATTS_SYS_ATTR_FLAGS - * - * @retval ::NRF_SUCCESS Successfully set the system attribute information. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid flags supplied. - * @retval ::NRF_ERROR_INVALID_DATA Invalid data supplied, the data should be exactly the same as retrieved with @ref sd_ble_gatts_sys_attr_get. - * @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation. - */ -SVCALL(SD_BLE_GATTS_SYS_ATTR_SET, uint32_t, sd_ble_gatts_sys_attr_set(uint16_t conn_handle, uint8_t const *p_sys_attr_data, uint16_t len, uint32_t flags)); - - -/**@brief Retrieve persistent system attribute information from the stack. - * - * @details This call is used to retrieve information about values to be stored persistently by the application - * during the lifetime of a connection or after it has been terminated. When a new connection is established with the same bonded device, - * the system attribute information retrieved with this function should be restored using using @ref sd_ble_gatts_sys_attr_set. - * If retrieved after disconnection, the data should be read before a new connection established. The connection handle for - * the previous, now disconnected, connection will remain valid until a new one is created to allow this API call to refer to it. - * Connection handles belonging to active connections can be used as well, but care should be taken since the system attributes - * may be written to at any time by the peer during a connection's lifetime. - * - * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS is used with this function, only the system attributes included in system services will be returned. - * @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS is used with this function, only the system attributes included in user services will be returned. - * - * @mscs - * @mmsc{@ref BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC} - * @endmscs - * - * @param[in] conn_handle Connection handle of the recently terminated connection. - * @param[out] p_sys_attr_data Pointer to a buffer where updated information about system attributes will be filled in. The format of the data is described - * in @ref BLE_GATTS_SYS_ATTRS_FORMAT. NULL can be provided to obtain the length of the data. - * @param[in,out] p_len Size of application buffer if p_sys_attr_data is not NULL. Unconditionally updated to actual length of system attribute data. - * @param[in] flags Optional additional flags, see @ref BLE_GATTS_SYS_ATTR_FLAGS - * - * @retval ::NRF_SUCCESS Successfully retrieved the system attribute information. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid flags supplied. - * @retval ::NRF_ERROR_DATA_SIZE The system attribute information did not fit into the provided buffer. - * @retval ::NRF_ERROR_NOT_FOUND No system attributes found. - */ -SVCALL(SD_BLE_GATTS_SYS_ATTR_GET, uint32_t, sd_ble_gatts_sys_attr_get(uint16_t conn_handle, uint8_t *p_sys_attr_data, uint16_t *p_len, uint32_t flags)); - - -/**@brief Retrieve the first valid user attribute handle. - * - * @param[out] p_handle Pointer to an integer where the handle will be stored. - * - * @retval ::NRF_SUCCESS Successfully retrieved the handle. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - */ -SVCALL(SD_BLE_GATTS_INITIAL_USER_HANDLE_GET, uint32_t, sd_ble_gatts_initial_user_handle_get(uint16_t *p_handle)); - -/**@brief Retrieve the attribute UUID and/or metadata. - * - * @param[in] handle Attribute handle - * @param[out] p_uuid UUID of the attribute. Use NULL to omit this field. - * @param[out] p_md Metadata of the attribute. Use NULL to omit this field. - * - * @retval ::NRF_SUCCESS Successfully retrieved the attribute metadata, - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameters supplied. Returned when both @c p_uuid and @c p_md are NULL. - * @retval ::NRF_ERROR_NOT_FOUND Attribute was not found. - */ -SVCALL(SD_BLE_GATTS_ATTR_GET, uint32_t, sd_ble_gatts_attr_get(uint16_t handle, ble_uuid_t * p_uuid, ble_gatts_attr_md_t * p_md)); - -/**@brief Reply to an ATT_MTU exchange request by sending an Exchange MTU Response to the client. - * - * @details This function is only used to reply to a @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST event. - * - * @details The SoftDevice sets ATT_MTU to the minimum of: - * - The Client RX MTU value from @ref BLE_GATTS_EVT_EXCHANGE_MTU_REQUEST, and - * - The Server RX MTU value. - * - * However, the SoftDevice never sets ATT_MTU lower than @ref BLE_GATT_ATT_MTU_DEFAULT. - * - * @mscs - * @mmsc{@ref BLE_GATTS_MTU_EXCHANGE} - * @endmscs - * - * @param[in] conn_handle The connection handle identifying the connection to perform this procedure on. - * @param[in] server_rx_mtu Server RX MTU size. - * - The minimum value is @ref BLE_GATT_ATT_MTU_DEFAULT. - * - The maximum value is @ref ble_gatt_conn_cfg_t::att_mtu in the connection configuration - used for this connection. - * - The value must be equal to Client RX MTU size given in @ref sd_ble_gattc_exchange_mtu_request - * if an ATT_MTU exchange has already been performed in the other direction. - * - * @retval ::NRF_SUCCESS Successfully sent response to the client. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no ATT_MTU exchange request pending. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid Server RX MTU size supplied. - */ -SVCALL(SD_BLE_GATTS_EXCHANGE_MTU_REPLY, uint32_t, sd_ble_gatts_exchange_mtu_reply(uint16_t conn_handle, uint16_t server_rx_mtu)); -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // BLE_GATTS_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_hci.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_hci.h deleted file mode 100644 index 21293e8efcc..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_hci.h +++ /dev/null @@ -1,131 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - @addtogroup BLE_COMMON - @{ -*/ - - -#ifndef BLE_HCI_H__ -#define BLE_HCI_H__ -#ifdef __cplusplus -extern "C" { -#endif - -/** @defgroup BLE_HCI_STATUS_CODES Bluetooth status codes - * @{ */ - -#define BLE_HCI_STATUS_CODE_SUCCESS 0x00 /**< Success. */ -#define BLE_HCI_STATUS_CODE_UNKNOWN_BTLE_COMMAND 0x01 /**< Unknown BLE Command. */ -#define BLE_HCI_STATUS_CODE_UNKNOWN_CONNECTION_IDENTIFIER 0x02 /**< Unknown Connection Identifier. */ -/*0x03 Hardware Failure -0x04 Page Timeout -*/ -#define BLE_HCI_AUTHENTICATION_FAILURE 0x05 /**< Authentication Failure. */ -#define BLE_HCI_STATUS_CODE_PIN_OR_KEY_MISSING 0x06 /**< Pin or Key missing. */ -#define BLE_HCI_MEMORY_CAPACITY_EXCEEDED 0x07 /**< Memory Capacity Exceeded. */ -#define BLE_HCI_CONNECTION_TIMEOUT 0x08 /**< Connection Timeout. */ -/*0x09 Connection Limit Exceeded -0x0A Synchronous Connection Limit To A Device Exceeded -0x0B ACL Connection Already Exists*/ -#define BLE_HCI_STATUS_CODE_COMMAND_DISALLOWED 0x0C /**< Command Disallowed. */ -/*0x0D Connection Rejected due to Limited Resources -0x0E Connection Rejected Due To Security Reasons -0x0F Connection Rejected due to Unacceptable BD_ADDR -0x10 Connection Accept Timeout Exceeded -0x11 Unsupported Feature or Parameter Value*/ -#define BLE_HCI_STATUS_CODE_INVALID_BTLE_COMMAND_PARAMETERS 0x12 /**< Invalid BLE Command Parameters. */ -#define BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION 0x13 /**< Remote User Terminated Connection. */ -#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_LOW_RESOURCES 0x14 /**< Remote Device Terminated Connection due to low resources.*/ -#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_POWER_OFF 0x15 /**< Remote Device Terminated Connection due to power off. */ -#define BLE_HCI_LOCAL_HOST_TERMINATED_CONNECTION 0x16 /**< Local Host Terminated Connection. */ -/* -0x17 Repeated Attempts -0x18 Pairing Not Allowed -0x19 Unknown LMP PDU -*/ -#define BLE_HCI_UNSUPPORTED_REMOTE_FEATURE 0x1A /**< Unsupported Remote Feature. */ -/* -0x1B SCO Offset Rejected -0x1C SCO Interval Rejected -0x1D SCO Air Mode Rejected*/ -#define BLE_HCI_STATUS_CODE_INVALID_LMP_PARAMETERS 0x1E /**< Invalid LMP Parameters. */ -#define BLE_HCI_STATUS_CODE_UNSPECIFIED_ERROR 0x1F /**< Unspecified Error. */ -/*0x20 Unsupported LMP Parameter Value -0x21 Role Change Not Allowed -*/ -#define BLE_HCI_STATUS_CODE_LMP_RESPONSE_TIMEOUT 0x22 /**< LMP Response Timeout. */ -#define BLE_HCI_STATUS_CODE_LMP_ERROR_TRANSACTION_COLLISION 0x23 /**< LMP Error Transaction Collision/LL Procedure Collision. */ -#define BLE_HCI_STATUS_CODE_LMP_PDU_NOT_ALLOWED 0x24 /**< LMP PDU Not Allowed. */ -/*0x25 Encryption Mode Not Acceptable -0x26 Link Key Can Not be Changed -0x27 Requested QoS Not Supported -*/ -#define BLE_HCI_INSTANT_PASSED 0x28 /**< Instant Passed. */ -#define BLE_HCI_PAIRING_WITH_UNIT_KEY_UNSUPPORTED 0x29 /**< Pairing with Unit Key Unsupported. */ -#define BLE_HCI_DIFFERENT_TRANSACTION_COLLISION 0x2A /**< Different Transaction Collision. */ -/* -0x2B Reserved -0x2C QoS Unacceptable Parameter -0x2D QoS Rejected -0x2E Channel Classification Not Supported -0x2F Insufficient Security -0x30 Parameter Out Of Mandatory Range -0x31 Reserved -0x32 Role Switch Pending -0x33 Reserved -0x34 Reserved Slot Violation -0x35 Role Switch Failed -0x36 Extended Inquiry Response Too Large -0x37 Secure Simple Pairing Not Supported By Host. -0x38 Host Busy - Pairing -0x39 Connection Rejected due to No Suitable Channel Found*/ -#define BLE_HCI_CONTROLLER_BUSY 0x3A /**< Controller Busy. */ -#define BLE_HCI_CONN_INTERVAL_UNACCEPTABLE 0x3B /**< Connection Interval Unacceptable. */ -#define BLE_HCI_DIRECTED_ADVERTISER_TIMEOUT 0x3C /**< Directed Advertisement Timeout. */ -#define BLE_HCI_CONN_TERMINATED_DUE_TO_MIC_FAILURE 0x3D /**< Connection Terminated due to MIC Failure. */ -#define BLE_HCI_CONN_FAILED_TO_BE_ESTABLISHED 0x3E /**< Connection Failed to be Established. */ - -/** @} */ - - -#ifdef __cplusplus -} -#endif -#endif // BLE_HCI_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_l2cap.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_l2cap.h deleted file mode 100644 index 90cce565d8e..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_l2cap.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - @addtogroup BLE_L2CAP Logical Link Control and Adaptation Protocol (L2CAP) - @{ - @brief Definitions and prototypes for the L2CAP interface. - */ - -#ifndef BLE_L2CAP_H__ -#define BLE_L2CAP_H__ - -#include "ble_types.h" -#include "ble_ranges.h" -#include "ble_err.h" -#include "nrf_svc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@addtogroup BLE_L2CAP_DEFINES Defines - * @{ */ - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // BLE_L2CAP_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_ranges.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_ranges.h deleted file mode 100644 index f9c6af76b80..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_ranges.h +++ /dev/null @@ -1,154 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - @addtogroup BLE_COMMON - @{ - @defgroup ble_ranges Module specific SVC, event and option number subranges - @{ - - @brief Definition of SVC, event and option number subranges for each API module. - - @note - SVCs, event and option numbers are split into subranges for each API module. - Each module receives its entire allocated range of SVC calls, whether implemented or not, - but return BLE_ERROR_NOT_SUPPORTED for unimplemented or undefined calls in its range. - - Note that the symbols BLE__SVC_LAST is the end of the allocated SVC range, - rather than the last SVC function call actually defined and implemented. - - Specific SVC, event and option values are defined in each module's ble_.h file, - which defines names of each individual SVC code based on the range start value. -*/ - -#ifndef BLE_RANGES_H__ -#define BLE_RANGES_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#define BLE_SVC_BASE 0x60 /**< Common BLE SVC base. */ -#define BLE_SVC_LAST 0x6B /**< Common BLE SVC last. */ - -#define BLE_GAP_SVC_BASE 0x6C /**< GAP BLE SVC base. */ -#define BLE_GAP_SVC_LAST 0x93 /**< GAP BLE SVC last. */ - -#define BLE_GATTC_SVC_BASE 0x94 /**< GATTC BLE SVC base. */ -#define BLE_GATTC_SVC_LAST 0x9F /**< GATTC BLE SVC last. */ - -#define BLE_GATTS_SVC_BASE 0xA0 /**< GATTS BLE SVC base. */ -#define BLE_GATTS_SVC_LAST 0xAF /**< GATTS BLE SVC last. */ - -#define BLE_L2CAP_SVC_BASE 0xB0 /**< L2CAP BLE SVC base. */ -#define BLE_L2CAP_SVC_LAST 0xBF /**< L2CAP BLE SVC last. */ - - -#define BLE_EVT_INVALID 0x00 /**< Invalid BLE Event. */ - -#define BLE_EVT_BASE 0x01 /**< Common BLE Event base. */ -#define BLE_EVT_LAST 0x0F /**< Common BLE Event last. */ - -#define BLE_GAP_EVT_BASE 0x10 /**< GAP BLE Event base. */ -#define BLE_GAP_EVT_LAST 0x2F /**< GAP BLE Event last. */ - -#define BLE_GATTC_EVT_BASE 0x30 /**< GATTC BLE Event base. */ -#define BLE_GATTC_EVT_LAST 0x4F /**< GATTC BLE Event last. */ - -#define BLE_GATTS_EVT_BASE 0x50 /**< GATTS BLE Event base. */ -#define BLE_GATTS_EVT_LAST 0x6F /**< GATTS BLE Event last. */ - -#define BLE_L2CAP_EVT_BASE 0x70 /**< L2CAP BLE Event base. */ -#define BLE_L2CAP_EVT_LAST 0x8F /**< L2CAP BLE Event last. */ - - -#define BLE_OPT_INVALID 0x00 /**< Invalid BLE Option. */ - -#define BLE_OPT_BASE 0x01 /**< Common BLE Option base. */ -#define BLE_OPT_LAST 0x1F /**< Common BLE Option last. */ - -#define BLE_GAP_OPT_BASE 0x20 /**< GAP BLE Option base. */ -#define BLE_GAP_OPT_LAST 0x3F /**< GAP BLE Option last. */ - -#define BLE_GATT_OPT_BASE 0x40 /**< GATT BLE Option base. */ -#define BLE_GATT_OPT_LAST 0x5F /**< GATT BLE Option last. */ - -#define BLE_GATTC_OPT_BASE 0x60 /**< GATTC BLE Option base. */ -#define BLE_GATTC_OPT_LAST 0x7F /**< GATTC BLE Option last. */ - -#define BLE_GATTS_OPT_BASE 0x80 /**< GATTS BLE Option base. */ -#define BLE_GATTS_OPT_LAST 0x9F /**< GATTS BLE Option last. */ - -#define BLE_L2CAP_OPT_BASE 0xA0 /**< L2CAP BLE Option base. */ -#define BLE_L2CAP_OPT_LAST 0xBF /**< L2CAP BLE Option last. */ - - -#define BLE_CFG_INVALID 0x00 /**< Invalid BLE configuration. */ - -#define BLE_CFG_BASE 0x01 /**< Common BLE configuration base. */ -#define BLE_CFG_LAST 0x1F /**< Common BLE configuration last. */ - -#define BLE_CONN_CFG_BASE 0x20 /**< BLE connection configuration base. */ -#define BLE_CONN_CFG_LAST 0x3F /**< BLE connection configuration last. */ - -#define BLE_GAP_CFG_BASE 0x40 /**< GAP BLE configuration base. */ -#define BLE_GAP_CFG_LAST 0x5F /**< GAP BLE configuration last. */ - -#define BLE_GATT_CFG_BASE 0x60 /**< GATT BLE configuration base. */ -#define BLE_GATT_CFG_LAST 0x7F /**< GATT BLE configuration last. */ - -#define BLE_GATTC_CFG_BASE 0x80 /**< GATTC BLE configuration base. */ -#define BLE_GATTC_CFG_LAST 0x9F /**< GATTC BLE configuration last. */ - -#define BLE_GATTS_CFG_BASE 0xA0 /**< GATTS BLE configuration base. */ -#define BLE_GATTS_CFG_LAST 0xBF /**< GATTS BLE configuration last. */ - -#define BLE_L2CAP_CFG_BASE 0xC0 /**< L2CAP BLE configuration base. */ -#define BLE_L2CAP_CFG_LAST 0xDF /**< L2CAP BLE configuration last. */ - - - - - -#ifdef __cplusplus -} -#endif -#endif /* BLE_RANGES_H__ */ - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_types.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_types.h deleted file mode 100644 index e24be0b5749..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/ble_types.h +++ /dev/null @@ -1,205 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - @addtogroup BLE_COMMON - @{ - @defgroup ble_types Common types and macro definitions - @{ - - @brief Common types and macro definitions for the BLE SoftDevice. - */ - -#ifndef BLE_TYPES_H__ -#define BLE_TYPES_H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_TYPES_DEFINES Defines - * @{ */ - -/** @defgroup BLE_CONN_HANDLES BLE Connection Handles - * @{ */ -#define BLE_CONN_HANDLE_INVALID 0xFFFF /**< Invalid Connection Handle. */ -#define BLE_CONN_HANDLE_ALL 0xFFFE /**< Applies to all Connection Handles. */ -/** @} */ - - -/** @defgroup BLE_UUID_VALUES Assigned Values for BLE UUIDs - * @{ */ -/* Generic UUIDs, applicable to all services */ -#define BLE_UUID_UNKNOWN 0x0000 /**< Reserved UUID. */ -#define BLE_UUID_SERVICE_PRIMARY 0x2800 /**< Primary Service. */ -#define BLE_UUID_SERVICE_SECONDARY 0x2801 /**< Secondary Service. */ -#define BLE_UUID_SERVICE_INCLUDE 0x2802 /**< Include. */ -#define BLE_UUID_CHARACTERISTIC 0x2803 /**< Characteristic. */ -#define BLE_UUID_DESCRIPTOR_CHAR_EXT_PROP 0x2900 /**< Characteristic Extended Properties Descriptor. */ -#define BLE_UUID_DESCRIPTOR_CHAR_USER_DESC 0x2901 /**< Characteristic User Description Descriptor. */ -#define BLE_UUID_DESCRIPTOR_CLIENT_CHAR_CONFIG 0x2902 /**< Client Characteristic Configuration Descriptor. */ -#define BLE_UUID_DESCRIPTOR_SERVER_CHAR_CONFIG 0x2903 /**< Server Characteristic Configuration Descriptor. */ -#define BLE_UUID_DESCRIPTOR_CHAR_PRESENTATION_FORMAT 0x2904 /**< Characteristic Presentation Format Descriptor. */ -#define BLE_UUID_DESCRIPTOR_CHAR_AGGREGATE_FORMAT 0x2905 /**< Characteristic Aggregate Format Descriptor. */ -/* GATT specific UUIDs */ -#define BLE_UUID_GATT 0x1801 /**< Generic Attribute Profile. */ -#define BLE_UUID_GATT_CHARACTERISTIC_SERVICE_CHANGED 0x2A05 /**< Service Changed Characteristic. */ -/* GAP specific UUIDs */ -#define BLE_UUID_GAP 0x1800 /**< Generic Access Profile. */ -#define BLE_UUID_GAP_CHARACTERISTIC_DEVICE_NAME 0x2A00 /**< Device Name Characteristic. */ -#define BLE_UUID_GAP_CHARACTERISTIC_APPEARANCE 0x2A01 /**< Appearance Characteristic. */ -#define BLE_UUID_GAP_CHARACTERISTIC_RECONN_ADDR 0x2A03 /**< Reconnection Address Characteristic. */ -#define BLE_UUID_GAP_CHARACTERISTIC_PPCP 0x2A04 /**< Peripheral Preferred Connection Parameters Characteristic. */ -#define BLE_UUID_GAP_CHARACTERISTIC_CAR 0x2AA6 /**< Central Address Resolution Characteristic. */ -/** @} */ - - -/** @defgroup BLE_UUID_TYPES Types of UUID - * @{ */ -#define BLE_UUID_TYPE_UNKNOWN 0x00 /**< Invalid UUID type. */ -#define BLE_UUID_TYPE_BLE 0x01 /**< Bluetooth SIG UUID (16-bit). */ -#define BLE_UUID_TYPE_VENDOR_BEGIN 0x02 /**< Vendor UUID types start at this index (128-bit). */ -/** @} */ - - -/** @defgroup BLE_APPEARANCES Bluetooth Appearance values - * @note Retrieved from http://developer.bluetooth.org/gatt/characteristics/Pages/CharacteristicViewer.aspx?u=org.bluetooth.characteristic.gap.appearance.xml - * @{ */ -#define BLE_APPEARANCE_UNKNOWN 0 /**< Unknown. */ -#define BLE_APPEARANCE_GENERIC_PHONE 64 /**< Generic Phone. */ -#define BLE_APPEARANCE_GENERIC_COMPUTER 128 /**< Generic Computer. */ -#define BLE_APPEARANCE_GENERIC_WATCH 192 /**< Generic Watch. */ -#define BLE_APPEARANCE_WATCH_SPORTS_WATCH 193 /**< Watch: Sports Watch. */ -#define BLE_APPEARANCE_GENERIC_CLOCK 256 /**< Generic Clock. */ -#define BLE_APPEARANCE_GENERIC_DISPLAY 320 /**< Generic Display. */ -#define BLE_APPEARANCE_GENERIC_REMOTE_CONTROL 384 /**< Generic Remote Control. */ -#define BLE_APPEARANCE_GENERIC_EYE_GLASSES 448 /**< Generic Eye-glasses. */ -#define BLE_APPEARANCE_GENERIC_TAG 512 /**< Generic Tag. */ -#define BLE_APPEARANCE_GENERIC_KEYRING 576 /**< Generic Keyring. */ -#define BLE_APPEARANCE_GENERIC_MEDIA_PLAYER 640 /**< Generic Media Player. */ -#define BLE_APPEARANCE_GENERIC_BARCODE_SCANNER 704 /**< Generic Barcode Scanner. */ -#define BLE_APPEARANCE_GENERIC_THERMOMETER 768 /**< Generic Thermometer. */ -#define BLE_APPEARANCE_THERMOMETER_EAR 769 /**< Thermometer: Ear. */ -#define BLE_APPEARANCE_GENERIC_HEART_RATE_SENSOR 832 /**< Generic Heart rate Sensor. */ -#define BLE_APPEARANCE_HEART_RATE_SENSOR_HEART_RATE_BELT 833 /**< Heart Rate Sensor: Heart Rate Belt. */ -#define BLE_APPEARANCE_GENERIC_BLOOD_PRESSURE 896 /**< Generic Blood Pressure. */ -#define BLE_APPEARANCE_BLOOD_PRESSURE_ARM 897 /**< Blood Pressure: Arm. */ -#define BLE_APPEARANCE_BLOOD_PRESSURE_WRIST 898 /**< Blood Pressure: Wrist. */ -#define BLE_APPEARANCE_GENERIC_HID 960 /**< Human Interface Device (HID). */ -#define BLE_APPEARANCE_HID_KEYBOARD 961 /**< Keyboard (HID Subtype). */ -#define BLE_APPEARANCE_HID_MOUSE 962 /**< Mouse (HID Subtype). */ -#define BLE_APPEARANCE_HID_JOYSTICK 963 /**< Joystick (HID Subtype). */ -#define BLE_APPEARANCE_HID_GAMEPAD 964 /**< Gamepad (HID Subtype). */ -#define BLE_APPEARANCE_HID_DIGITIZERSUBTYPE 965 /**< Digitizer Tablet (HID Subtype). */ -#define BLE_APPEARANCE_HID_CARD_READER 966 /**< Card Reader (HID Subtype). */ -#define BLE_APPEARANCE_HID_DIGITAL_PEN 967 /**< Digital Pen (HID Subtype). */ -#define BLE_APPEARANCE_HID_BARCODE 968 /**< Barcode Scanner (HID Subtype). */ -#define BLE_APPEARANCE_GENERIC_GLUCOSE_METER 1024 /**< Generic Glucose Meter. */ -#define BLE_APPEARANCE_GENERIC_RUNNING_WALKING_SENSOR 1088 /**< Generic Running Walking Sensor. */ -#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_IN_SHOE 1089 /**< Running Walking Sensor: In-Shoe. */ -#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_SHOE 1090 /**< Running Walking Sensor: On-Shoe. */ -#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_HIP 1091 /**< Running Walking Sensor: On-Hip. */ -#define BLE_APPEARANCE_GENERIC_CYCLING 1152 /**< Generic Cycling. */ -#define BLE_APPEARANCE_CYCLING_CYCLING_COMPUTER 1153 /**< Cycling: Cycling Computer. */ -#define BLE_APPEARANCE_CYCLING_SPEED_SENSOR 1154 /**< Cycling: Speed Sensor. */ -#define BLE_APPEARANCE_CYCLING_CADENCE_SENSOR 1155 /**< Cycling: Cadence Sensor. */ -#define BLE_APPEARANCE_CYCLING_POWER_SENSOR 1156 /**< Cycling: Power Sensor. */ -#define BLE_APPEARANCE_CYCLING_SPEED_CADENCE_SENSOR 1157 /**< Cycling: Speed and Cadence Sensor. */ -#define BLE_APPEARANCE_GENERIC_PULSE_OXIMETER 3136 /**< Generic Pulse Oximeter. */ -#define BLE_APPEARANCE_PULSE_OXIMETER_FINGERTIP 3137 /**< Fingertip (Pulse Oximeter subtype). */ -#define BLE_APPEARANCE_PULSE_OXIMETER_WRIST_WORN 3138 /**< Wrist Worn(Pulse Oximeter subtype). */ -#define BLE_APPEARANCE_GENERIC_WEIGHT_SCALE 3200 /**< Generic Weight Scale. */ -#define BLE_APPEARANCE_GENERIC_OUTDOOR_SPORTS_ACT 5184 /**< Generic Outdoor Sports Activity. */ -#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_DISP 5185 /**< Location Display Device (Outdoor Sports Activity subtype). */ -#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_DISP 5186 /**< Location and Navigation Display Device (Outdoor Sports Activity subtype). */ -#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_POD 5187 /**< Location Pod (Outdoor Sports Activity subtype). */ -#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_POD 5188 /**< Location and Navigation Pod (Outdoor Sports Activity subtype). */ -/** @} */ - -/** @brief Set .type and .uuid fields of ble_uuid_struct to specified UUID value. */ -#define BLE_UUID_BLE_ASSIGN(instance, value) do {\ - instance.type = BLE_UUID_TYPE_BLE; \ - instance.uuid = value;} while(0) - -/** @brief Copy type and uuid members from src to dst ble_uuid_t pointer. Both pointers must be valid/non-null. */ -#define BLE_UUID_COPY_PTR(dst, src) do {\ - (dst)->type = (src)->type; \ - (dst)->uuid = (src)->uuid;} while(0) - -/** @brief Copy type and uuid members from src to dst ble_uuid_t struct. */ -#define BLE_UUID_COPY_INST(dst, src) do {\ - (dst).type = (src).type; \ - (dst).uuid = (src).uuid;} while(0) - -/** @brief Compare for equality both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */ -#define BLE_UUID_EQ(p_uuid1, p_uuid2) \ - (((p_uuid1)->type == (p_uuid2)->type) && ((p_uuid1)->uuid == (p_uuid2)->uuid)) - -/** @brief Compare for difference both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */ -#define BLE_UUID_NEQ(p_uuid1, p_uuid2) \ - (((p_uuid1)->type != (p_uuid2)->type) || ((p_uuid1)->uuid != (p_uuid2)->uuid)) - -/** @} */ - -/** @addtogroup BLE_TYPES_STRUCTURES Structures - * @{ */ - -/** @brief 128 bit UUID values. */ -typedef struct -{ - uint8_t uuid128[16]; /**< Little-Endian UUID bytes. */ -} ble_uuid128_t; - -/** @brief Bluetooth Low Energy UUID type, encapsulates both 16-bit and 128-bit UUIDs. */ -typedef struct -{ - uint16_t uuid; /**< 16-bit UUID value or octets 12-13 of 128-bit UUID. */ - uint8_t type; /**< UUID type, see @ref BLE_UUID_TYPES. If type is @ref BLE_UUID_TYPE_UNKNOWN, the value of uuid is undefined. */ -} ble_uuid_t; - -/** @} */ -#ifdef __cplusplus -} -#endif - -#endif /* BLE_TYPES_H__ */ - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf52/nrf_mbr.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf52/nrf_mbr.h deleted file mode 100644 index ccbe96bd59e..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf52/nrf_mbr.h +++ /dev/null @@ -1,212 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - @defgroup nrf_mbr_api Master Boot Record API - @{ - - @brief APIs for updating SoftDevice and BootLoader - -*/ - -#ifndef NRF_MBR_H__ -#define NRF_MBR_H__ - -#include "nrf_svc.h" -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup NRF_MBR_DEFINES Defines - * @{ */ - -/**@brief MBR SVC Base number. */ -#define MBR_SVC_BASE (0x18) - -/**@brief Page size in words. */ -#define MBR_PAGE_SIZE_IN_WORDS (1024) - -/** @brief The size that must be reserved for the MBR when a SoftDevice is written to flash. -This is the offset where the first byte of the SoftDevice hex file is written.*/ -#define MBR_SIZE (0x1000) - -/** @} */ - -/** @addtogroup NRF_MBR_ENUMS Enumerations - * @{ */ - -/**@brief nRF Master Boot Record API SVC numbers. */ -enum NRF_MBR_SVCS -{ - SD_MBR_COMMAND = MBR_SVC_BASE, /**< ::sd_mbr_command */ -}; - -/**@brief Possible values for ::sd_mbr_command_t.command */ -enum NRF_MBR_COMMANDS -{ - SD_MBR_COMMAND_COPY_BL, /**< Copy a new BootLoader. @see sd_mbr_command_copy_bl_t*/ - SD_MBR_COMMAND_COPY_SD, /**< Copy a new SoftDevice. @see ::sd_mbr_command_copy_sd_t*/ - SD_MBR_COMMAND_INIT_SD, /**< Initialize forwarding interrupts to SD, and run reset function in SD*/ - SD_MBR_COMMAND_COMPARE, /**< This command works like memcmp. @see ::sd_mbr_command_compare_t*/ - SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET, /**< Start forwarding all exception to this address @see ::sd_mbr_command_vector_table_base_set_t*/ -}; - -/** @} */ - -/** @addtogroup NRF_MBR_TYPES Types - * @{ */ - -/**@brief This command copies part of a new SoftDevice - * The destination area is erased before copying. - * If dst is in the middle of a flash page, that whole flash page will be erased. - * If (dst+len) is in the middle of a flash page, that whole flash page will be erased. - * - * The user of this function is responsible for setting the BPROT registers. - * - * @retval ::NRF_SUCCESS indicates that the contents of the memory blocks where copied correctly. - * @retval ::NRF_ERROR_INTERNAL indicates that the contents of the memory blocks where not verified correctly after copying. - */ -typedef struct -{ - uint32_t *src; /**< Pointer to the source of data to be copied.*/ - uint32_t *dst; /**< Pointer to the destination where the content is to be copied.*/ - uint32_t len; /**< Number of 32 bit words to copy. Must be a multiple of @ref MBR_PAGE_SIZE_IN_WORDS words.*/ -} sd_mbr_command_copy_sd_t; - - -/**@brief This command works like memcmp, but takes the length in words. - * - * @retval ::NRF_SUCCESS indicates that the contents of both memory blocks are equal. - * @retval ::NRF_ERROR_NULL indicates that the contents of the memory blocks are not equal. - */ -typedef struct -{ - uint32_t *ptr1; /**< Pointer to block of memory. */ - uint32_t *ptr2; /**< Pointer to block of memory. */ - uint32_t len; /**< Number of 32 bit words to compare.*/ -} sd_mbr_command_compare_t; - - -/**@brief This command copies a new BootLoader. - * With this command, destination of BootLoader is always the address written in NRF_UICR->BOOTADDR. - * - * Destination is erased by this function. - * If (destination+bl_len) is in the middle of a flash page, that whole flash page will be erased. - * - * This function will use PROTENSET to protect the flash that is not intended to be written. - * - * On success, this function will not return. It will start the new BootLoader from reset-vector as normal. - * - * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. - * @retval ::NRF_ERROR_FORBIDDEN if NRF_UICR->BOOTADDR is not set. - * @retval ::NRF_ERROR_INVALID_LENGTH if parameters attempts to read or write outside flash area. - * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) - */ -typedef struct -{ - uint32_t *bl_src; /**< Pointer to the source of the Bootloader to be be copied.*/ - uint32_t bl_len; /**< Number of 32 bit words to copy for BootLoader. */ -} sd_mbr_command_copy_bl_t; - -/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the MBR - * - * Once this function has been called, this address is where the MBR will start to forward interrupts to after a reset. - * - * To restore default forwarding this function should be called with @param address set to 0. - * The MBR will then start forwarding to interrupts to the address in NFR_UICR->BOOTADDR or to the SoftDevice if the BOOTADDR is not set. - * - * On success, this function will not return. It will reset the device. - * - * @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen. - * @retval ::NRF_ERROR_INVALID_ADDR if parameter address is outside of the flash size. - * @retval ::NRF_ERROR_NO_MEM if no parameter page is provided (see SoftDevice Specification for more info) - */ -typedef struct -{ - uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/ -} sd_mbr_command_vector_table_base_set_t; - - -typedef struct -{ - uint32_t command; /**< type of command to be issued see @ref NRF_MBR_COMMANDS. */ - union - { - sd_mbr_command_copy_sd_t copy_sd; /**< Parameters for copy SoftDevice.*/ - sd_mbr_command_compare_t compare; /**< Parameters for verify.*/ - sd_mbr_command_copy_bl_t copy_bl; /**< Parameters for copy BootLoader. Requires parameter page. */ - sd_mbr_command_vector_table_base_set_t base_set; /**< Parameters for vector table base set. Requires parameter page.*/ - } params; -} sd_mbr_command_t; - -/** @} */ - -/** @addtogroup NRF_MBR_FUNCTIONS Functions - * @{ */ - -/**@brief Issue Master Boot Record commands - * - * Commands used when updating a SoftDevice and bootloader. - * - * The SD_MBR_COMMAND_COPY_BL and SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET requires parameters to be - * retained by the MBR when resetting the IC. This is done in a separate flash page - * provided by the application. The UICR register UICR.NRFFW[1] must be set - * to an address corresponding to a page in the application flash space. This page will be cleared - * by the MBR and used to store the command before reset. When the UICR.NRFFW[1] field is set - * the page it refers to must not be used by the application. If the UICR.NRFFW[1] is set to - * 0xFFFFFFFF (the default) MBR commands which use flash will be unavailable and return - * NRF_ERROR_NO_MEM. - * - * @param[in] param Pointer to a struct describing the command. - * - * @note For return values, see ::sd_mbr_command_copy_sd_t ::sd_mbr_command_copy_bl_t ::sd_mbr_command_compare_t ::sd_mbr_command_vector_table_base_set_t - * - * @retval NRF_ERROR_NO_MEM if UICR.NRFFW[1] is not set (i.e. is 0xFFFFFFFF). - * @retval NRF_ERROR_INVALID_PARAM if an invalid command is given. -*/ -SVCALL(SD_MBR_COMMAND, uint32_t, sd_mbr_command(sd_mbr_command_t* param)); - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // NRF_MBR_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_ble.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_ble.h deleted file mode 100644 index c4835fa6ef7..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_ble.h +++ /dev/null @@ -1,615 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - @addtogroup BLE_COMMON BLE SoftDevice Common - @{ - @defgroup ble_api Events, type definitions and API calls - @{ - - @brief Module independent events, type definitions and API calls for the BLE SoftDevice. - - */ - -#ifndef BLE_H__ -#define BLE_H__ - -#include "ble_ranges.h" -#include "ble_types.h" -#include "ble_gap.h" -#include "ble_l2cap.h" -#include "ble_gatt.h" -#include "ble_gattc.h" -#include "ble_gatts.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup BLE_COMMON_ENUMERATIONS Enumerations - * @{ */ - -/** - * @brief Common API SVC numbers. - */ -enum BLE_COMMON_SVCS -{ - SD_BLE_ENABLE = BLE_SVC_BASE, /**< Enable and initialize the BLE stack */ - SD_BLE_EVT_GET, /**< Get an event from the pending events queue. */ - SD_BLE_UUID_VS_ADD, /**< Add a Vendor Specific UUID. */ - SD_BLE_UUID_DECODE, /**< Decode UUID bytes. */ - SD_BLE_UUID_ENCODE, /**< Encode UUID bytes. */ - SD_BLE_VERSION_GET, /**< Get the local version information (company ID, Link Layer Version, Link Layer Subversion). */ - SD_BLE_USER_MEM_REPLY, /**< User Memory Reply. */ - SD_BLE_OPT_SET, /**< Set a BLE option. */ - SD_BLE_OPT_GET, /**< Get a BLE option. */ - SD_BLE_CFG_SET, /**< Add a configuration to the BLE stack. */ -}; - -/** - * @brief BLE Module Independent Event IDs. - */ -enum BLE_COMMON_EVTS -{ - BLE_EVT_USER_MEM_REQUEST = BLE_EVT_BASE, /**< User Memory request. @ref ble_evt_user_mem_request_t */ - BLE_EVT_USER_MEM_RELEASE, /**< User Memory release. @ref ble_evt_user_mem_release_t */ -}; - -/**@brief BLE Connection Configuration IDs. - * - * IDs that uniquely identify a connection configuration. - */ -enum BLE_CONN_CFGS -{ - BLE_CONN_CFG_GAP = BLE_CONN_CFG_BASE, /**< BLE GAP specific connection configuration. */ - BLE_CONN_CFG_GATTC, /**< BLE GATTC specific connection configuration. */ - BLE_CONN_CFG_GATTS, /**< BLE GATTS specific connection configuration. */ - BLE_CONN_CFG_GATT, /**< BLE GATT specific connection configuration. */ -}; - -/**@brief BLE Common Configuration IDs. - * - * IDs that uniquely identify a common configuration. - */ -enum BLE_COMMON_CFGS -{ - BLE_COMMON_CFG_VS_UUID = BLE_CFG_BASE, /**< Vendor specific UUID configuration */ -}; - -/**@brief Common Option IDs. - * IDs that uniquely identify a common option. - */ -enum BLE_COMMON_OPTS -{ - BLE_COMMON_OPT_PA_LNA = BLE_OPT_BASE, /**< PA and LNA options */ - BLE_COMMON_OPT_CONN_EVT_EXT, /**< Extended connection events option */ -}; - -/** @} */ - -/** @addtogroup BLE_COMMON_DEFINES Defines - * @{ */ - -/** @brief Required pointer alignment for BLE Events. -*/ -#define BLE_EVT_PTR_ALIGNMENT 4 - -/** @brief Leaves the maximum of the two arguments. -*/ -#define BLE_MAX(a, b) ((a) < (b) ? (b) : (a)) - -/** @brief Maximum possible length for BLE Events. - * @note The highest value used for @ref ble_gatt_conn_cfg_t::att_mtu in any connection configuration shall be used as a parameter. - * If that value has not been configured for any connections then @ref BLE_GATT_ATT_MTU_DEFAULT must be used instead. -*/ -#define BLE_EVT_LEN_MAX(ATT_MTU) (BLE_MAX( \ - sizeof(ble_evt_t), \ - BLE_MAX( \ - offsetof(ble_evt_t, evt.gattc_evt.params.rel_disc_rsp.includes) + ((ATT_MTU) - 2) / 6 * sizeof(ble_gattc_include_t), \ - offsetof(ble_evt_t, evt.gattc_evt.params.attr_info_disc_rsp.info.attr_info16) + ((ATT_MTU) - 2) / 4 * sizeof(ble_gattc_attr_info16_t) \ - ) \ -)) - -/** @defgroup BLE_USER_MEM_TYPES User Memory Types - * @{ */ -#define BLE_USER_MEM_TYPE_INVALID 0x00 /**< Invalid User Memory Types. */ -#define BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES 0x01 /**< User Memory for GATTS queued writes. */ -/** @} */ - -/** @defgroup BLE_UUID_VS_COUNTS Vendor Specific UUID counts - * @{ - */ -#define BLE_UUID_VS_COUNT_DEFAULT 10 /**< Default VS UUID count. */ -#define BLE_UUID_VS_COUNT_MAX 254 /**< Maximum VS UUID count. */ -/** @} */ - -/** @defgroup BLE_COMMON_CFG_DEFAULTS Configuration defaults. - * @{ - */ -#define BLE_CONN_CFG_TAG_DEFAULT 0 /**< Default configuration tag, SoftDevice default connection configuration. */ - -/** @} */ - -/** @} */ - -/** @addtogroup BLE_COMMON_STRUCTURES Structures - * @{ */ - -/**@brief User Memory Block. */ -typedef struct -{ - uint8_t *p_mem; /**< Pointer to the start of the user memory block. */ - uint16_t len; /**< Length in bytes of the user memory block. */ -} ble_user_mem_block_t; - -/**@brief Event structure for @ref BLE_EVT_USER_MEM_REQUEST. */ -typedef struct -{ - uint8_t type; /**< User memory type, see @ref BLE_USER_MEM_TYPES. */ -} ble_evt_user_mem_request_t; - -/**@brief Event structure for @ref BLE_EVT_USER_MEM_RELEASE. */ -typedef struct -{ - uint8_t type; /**< User memory type, see @ref BLE_USER_MEM_TYPES. */ - ble_user_mem_block_t mem_block; /**< User memory block */ -} ble_evt_user_mem_release_t; - -/**@brief Event structure for events not associated with a specific function module. */ -typedef struct -{ - uint16_t conn_handle; /**< Connection Handle on which this event occurred. */ - union - { - ble_evt_user_mem_request_t user_mem_request; /**< User Memory Request Event Parameters. */ - ble_evt_user_mem_release_t user_mem_release; /**< User Memory Release Event Parameters. */ - } params; /**< Event parameter union. */ -} ble_common_evt_t; - -/**@brief BLE Event header. */ -typedef struct -{ - uint16_t evt_id; /**< Value from a BLE__EVT series. */ - uint16_t evt_len; /**< Length in octets including this header. */ -} ble_evt_hdr_t; - -/**@brief Common BLE Event type, wrapping the module specific event reports. */ -typedef struct -{ - ble_evt_hdr_t header; /**< Event header. */ - union - { - ble_common_evt_t common_evt; /**< Common Event, evt_id in BLE_EVT_* series. */ - ble_gap_evt_t gap_evt; /**< GAP originated event, evt_id in BLE_GAP_EVT_* series. */ - ble_gattc_evt_t gattc_evt; /**< GATT client originated event, evt_id in BLE_GATTC_EVT* series. */ - ble_gatts_evt_t gatts_evt; /**< GATT server originated event, evt_id in BLE_GATTS_EVT* series. */ - } evt; /**< Event union. */ -} ble_evt_t; - - -/** - * @brief Version Information. - */ -typedef struct -{ - uint8_t version_number; /**< Link Layer Version number for BT 4.1 spec is 7 (https://www.bluetooth.org/en-us/specification/assigned-numbers/link-layer). */ - uint16_t company_id; /**< Company ID, Nordic Semiconductor's company ID is 89 (0x0059) (https://www.bluetooth.org/apps/content/Default.aspx?doc_id=49708). */ - uint16_t subversion_number; /**< Link Layer Sub Version number, corresponds to the SoftDevice Config ID or Firmware ID (FWID). */ -} ble_version_t; - -/** - * @brief Configuration parameters for the PA and LNA. - */ -typedef struct -{ - uint8_t enable :1; /**< Enable toggling for this amplifier */ - uint8_t active_high :1; /**< Set the pin to be active high */ - uint8_t gpio_pin :6; /**< The GPIO pin to toggle for this amplifier */ -} ble_pa_lna_cfg_t; - -/** - * @brief PA & LNA GPIO toggle configuration - * - * This option configures the SoftDevice to toggle pins when the radio is active for use with a power amplifier and/or - * a low noise amplifier. - * - * Toggling the pins is achieved by using two PPI channels and a GPIOTE channel. The hardware channel IDs are provided - * by the application and should be regarded as reserved as long as any PA/LNA toggling is enabled. - * - * @note @ref sd_ble_opt_get is not supported for this option. - * @note This feature is only supported for nRF52, on nRF51 @ref NRF_ERROR_NOT_SUPPORTED will always be returned. - * @note Setting this option while the radio is in use (i.e. any of the roles are active) may have undefined consequences - * and must be avoided by the application. - */ -typedef struct -{ - ble_pa_lna_cfg_t pa_cfg; /**< Power Amplifier configuration */ - ble_pa_lna_cfg_t lna_cfg; /**< Low Noise Amplifier configuration */ - - uint8_t ppi_ch_id_set; /**< PPI channel used for radio pin setting */ - uint8_t ppi_ch_id_clr; /**< PPI channel used for radio pin clearing */ - uint8_t gpiote_ch_id; /**< GPIOTE channel used for radio pin toggling */ -} ble_common_opt_pa_lna_t; - -/** - * @brief Configuration of extended BLE connection events. - * - * When enabled the SoftDevice will dynamically extend the connection event when possible. - * - * The connection event length is controlled by the connection configuration as set by @ref ble_gap_conn_cfg_t::event_length. - * The connection event can be extended if there is time to send another packet pair before the start of the next connection interval, - * and if there are no conflicts with other BLE roles requesting radio time. - * - * @note @ref sd_ble_opt_get is not supported for this option. - */ -typedef struct -{ - uint8_t enable : 1; /**< Enable extended BLE connection events, disabled by default. */ -} ble_common_opt_conn_evt_ext_t; - -/**@brief Option structure for common options. */ -typedef union -{ - ble_common_opt_pa_lna_t pa_lna; /**< Parameters for controlling PA and LNA pin toggling. */ - ble_common_opt_conn_evt_ext_t conn_evt_ext; /**< Parameters for enabling extended connection events. */ -} ble_common_opt_t; - -/**@brief Common BLE Option type, wrapping the module specific options. */ -typedef union -{ - ble_common_opt_t common_opt; /**< COMMON options, opt_id in @ref BLE_COMMON_OPTS series. */ - ble_gap_opt_t gap_opt; /**< GAP option, opt_id in @ref BLE_GAP_OPTS series. */ -} ble_opt_t; - -/**@brief BLE connection configuration type, wrapping the module specific configurations, set with - * @ref sd_ble_cfg_set. - * - * @note Connection configurations don't have to be set. - * In the case that no configurations has been set, or fewer connection configurations has been set than enabled connections, - * the default connection configuration will be automatically added for the remaining connections. - * When creating connections with the default configuration, @ref BLE_CONN_CFG_TAG_DEFAULT should be used in - * place of @ref ble_conn_cfg_t::conn_cfg_tag. See @ref sd_ble_gap_adv_start() and @ref sd_ble_gap_connect()" - * - * @mscs - * @mmsc{@ref BLE_CONN_CFG} - * @endmscs - - */ -typedef struct -{ - uint8_t conn_cfg_tag; /**< The application chosen tag it can use with the @ref sd_ble_gap_adv_start() and @ref sd_ble_gap_connect() - calls to select this configuration when creating a connection. - Must be different for all connection configurations added and not @ref BLE_CONN_CFG_TAG_DEFAULT. */ - union { - ble_gap_conn_cfg_t gap_conn_cfg; /**< GAP connection configuration, cfg_id is @ref BLE_CONN_CFG_GAP. */ - ble_gattc_conn_cfg_t gattc_conn_cfg; /**< GATTC connection configuration, cfg_id is @ref BLE_CONN_CFG_GATTC. */ - ble_gatts_conn_cfg_t gatts_conn_cfg; /**< GATTS this connection configuration, cfg_id is @ref BLE_CONN_CFG_GATTS. */ - ble_gatt_conn_cfg_t gatt_conn_cfg; /**< GATT this connection configuration, cfg_id is @ref BLE_CONN_CFG_GATT. */ - } params; /**< Connection configuration union. */ -} ble_conn_cfg_t; - -/** - * @brief Configuration of Vendor Specific UUIDs, set with @ref sd_ble_cfg_set. - * - * @retval ::NRF_ERROR_INVALID_PARAM Too many UUIDs configured. - */ -typedef struct -{ - uint8_t vs_uuid_count; /**< Number of 128-bit Vendor Specific UUID bases to allocate memory for. - Default value is @ref BLE_UUID_VS_COUNT_DEFAULT. Maximum value is - @ref BLE_UUID_VS_COUNT_MAX. */ -} ble_common_cfg_vs_uuid_t; - -/**@brief Common BLE Configuration type, wrapping the common configurations. */ -typedef union -{ - ble_common_cfg_vs_uuid_t vs_uuid_cfg; /**< Vendor specific UUID configuration, cfg_id is @ref BLE_COMMON_CFG_VS_UUID. */ -} ble_common_cfg_t; - -/**@brief BLE Configuration type, wrapping the module specific configurations. */ -typedef union -{ - ble_conn_cfg_t conn_cfg; /**< Connection specific configurations, cfg_id in @ref BLE_CONN_CFGS series. */ - ble_common_cfg_t common_cfg; /**< Global common configurations, cfg_id in @ref BLE_COMMON_CFGS series. */ - ble_gap_cfg_t gap_cfg; /**< Global GAP configurations, cfg_id in @ref BLE_GAP_CFGS series. */ - ble_gatts_cfg_t gatts_cfg; /**< Global GATTS configuration, cfg_id in @ref BLE_GATTS_CFGS series. */ -} ble_cfg_t; - -/** @} */ - -/** @addtogroup BLE_COMMON_FUNCTIONS Functions - * @{ */ - -/**@brief Enable the BLE stack - * - * @param[in, out] p_app_ram_base Pointer to a variable containing the start address of the - * application RAM region (APP_RAM_BASE). On return, this will - * contain the minimum start address of the application RAM region - * required by the SoftDevice for this configuration. - * - * @note The memory requirement for a specific configuration will not increase between SoftDevices - * with the same major version number. - * - * @note The value of *p_app_ram_base when the app has done no custom configuration of the - * SoftDevice, i.e. the app has not called @ref sd_ble_cfg_set before @ref sd_ble_enable, can - * be found in the release notes. - * - * @note At runtime the IC's RAM is split into 2 regions: The SoftDevice RAM region is located - * between 0x20000000 and APP_RAM_BASE-1 and the application's RAM region is located between - * APP_RAM_BASE and the start of the call stack. - * - * @details This call initializes the BLE stack, no BLE related function other than @ref - * sd_ble_cfg_set can be called before this one. - * - * @mscs - * @mmsc{@ref BLE_COMMON_ENABLE} - * @endmscs - * - * @retval ::NRF_SUCCESS The BLE stack has been initialized successfully. - * @retval ::NRF_ERROR_INVALID_STATE The BLE stack had already been initialized and cannot be reinitialized. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. - * @retval ::NRF_ERROR_NO_MEM The amount of memory assigned to the SoftDevice by *p_app_ram_base is not - * large enough to fit this configuration's memory requirement. Check *p_app_ram_base - * and set the start address of the application RAM region accordingly. - */ -SVCALL(SD_BLE_ENABLE, uint32_t, sd_ble_enable(uint32_t * p_app_ram_base)); - -/**@brief Add configurations for the BLE stack - * - * @param[in] cfg_id Config ID, see @ref BLE_CONN_CFGS, @ref BLE_COMMON_CFGS, @ref - * BLE_GAP_CFGS or @ref BLE_GATTS_CFGS. - * @param[in] p_cfg Pointer to a ble_cfg_t structure containing the configuration value. - * @param[in] app_ram_base The start address of the application RAM region (APP_RAM_BASE). - * See @ref sd_ble_enable for details about APP_RAM_BASE. - * - * @note The memory requirement for a specific configuration will not increase between SoftDevices - * with the same major version number. - * - * @note If a configuration is set more than once, the last one set is the one that takes effect on - * @ref sd_ble_enable. - * - * @note Any part of the BLE stack that is NOT configured with @ref sd_ble_cfg_set will have default - * configuration. - * - * @note @ref sd_ble_cfg_set may be called at any time when the SoftDevice is enabled (see @ref - * sd_softdevice_enable) while the BLE part of the SoftDevice is not enabled (see @ref - * sd_ble_enable). - * - * @note Error codes for the configurations are described in the configuration structs. - * - * @mscs - * @mmsc{@ref BLE_COMMON_ENABLE} - * @endmscs - * - * @retval ::NRF_SUCCESS The configuration has been added successfully. - * @retval ::NRF_ERROR_INVALID_STATE The BLE stack had already been initialized. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid cfg_id supplied. - * @retval ::NRF_ERROR_NO_MEM The amount of memory assigned to the SoftDevice by app_ram_base is not - * large enough to fit this configuration's memory requirement. - */ -SVCALL(SD_BLE_CFG_SET, uint32_t, sd_ble_cfg_set(uint32_t cfg_id, ble_cfg_t const * p_cfg, uint32_t app_ram_base)); - -/**@brief Get an event from the pending events queue. - * - * @param[out] p_dest Pointer to buffer to be filled in with an event, or NULL to retrieve the event length. - * This buffer must be aligned to the extend defined by @ref BLE_EVT_PTR_ALIGNMENT. - * The buffer should be interpreted as a @ref ble_evt_t struct. - * @param[in, out] p_len Pointer the length of the buffer, on return it is filled with the event length. - * - * @details This call allows the application to pull a BLE event from the BLE stack. The application is signaled that - * an event is available from the BLE stack by the triggering of the SD_EVT_IRQn interrupt. - * The application is free to choose whether to call this function from thread mode (main context) or directly from the - * Interrupt Service Routine that maps to SD_EVT_IRQn. In any case however, and because the BLE stack runs at a higher - * priority than the application, this function should be called in a loop (until @ref NRF_ERROR_NOT_FOUND is returned) - * every time SD_EVT_IRQn is raised to ensure that all available events are pulled from the BLE stack. Failure to do so - * could potentially leave events in the internal queue without the application being aware of this fact. - * - * Sizing the p_dest buffer is equally important, since the application needs to provide all the memory necessary for the event to - * be copied into application memory. If the buffer provided is not large enough to fit the entire contents of the event, - * @ref NRF_ERROR_DATA_SIZE will be returned and the application can then call again with a larger buffer size. - * The maximum possible event length is defined by @ref BLE_EVT_LEN_MAX. The application may also "peek" the event length - * by providing p_dest as a NULL pointer and inspecting the value of *p_len upon return: - * - * \code - * uint16_t len; - * errcode = sd_ble_evt_get(NULL, &len); - * \endcode - * - * @mscs - * @mmsc{@ref BLE_COMMON_IRQ_EVT_MSC} - * @mmsc{@ref BLE_COMMON_THREAD_EVT_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Event pulled and stored into the supplied buffer. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied. - * @retval ::NRF_ERROR_NOT_FOUND No events ready to be pulled. - * @retval ::NRF_ERROR_DATA_SIZE Event ready but could not fit into the supplied buffer. - */ -SVCALL(SD_BLE_EVT_GET, uint32_t, sd_ble_evt_get(uint8_t *p_dest, uint16_t *p_len)); - - -/**@brief Add a Vendor Specific base UUID. - * - * @details This call enables the application to add a vendor specific base UUID to the BLE stack's table, for later - * use with all other modules and APIs. This then allows the application to use the shorter, 24-bit @ref ble_uuid_t - * format when dealing with both 16-bit and 128-bit UUIDs without having to check for lengths and having split code - * paths. This is accomplished by extending the grouping mechanism that the Bluetooth SIG standard base UUID uses - * for all other 128-bit UUIDs. The type field in the @ref ble_uuid_t structure is an index (relative to - * @ref BLE_UUID_TYPE_VENDOR_BEGIN) to the table populated by multiple calls to this function, and the UUID field - * in the same structure contains the 2 bytes at indexes 12 and 13. The number of possible 128-bit UUIDs available to - * the application is therefore the number of Vendor Specific UUIDs added with the help of this function times 65536, - * although restricted to modifying bytes 12 and 13 for each of the entries in the supplied array. - * - * @note Bytes 12 and 13 of the provided UUID will not be used internally, since those are always replaced by - * the 16-bit uuid field in @ref ble_uuid_t. - * - * @note If a UUID is already present in the BLE stack's internal table, the corresponding index will be returned in - * p_uuid_type along with an NRF_SUCCESS error code. - * - * @param[in] p_vs_uuid Pointer to a 16-octet (128-bit) little endian Vendor Specific UUID disregarding - * bytes 12 and 13. - * @param[out] p_uuid_type Pointer to a uint8_t where the type field in @ref ble_uuid_t corresponding to this UUID will be stored. - * - * @retval ::NRF_SUCCESS Successfully added the Vendor Specific UUID. - * @retval ::NRF_ERROR_INVALID_ADDR If p_vs_uuid or p_uuid_type is NULL or invalid. - * @retval ::NRF_ERROR_NO_MEM If there are no more free slots for VS UUIDs. - */ -SVCALL(SD_BLE_UUID_VS_ADD, uint32_t, sd_ble_uuid_vs_add(ble_uuid128_t const *p_vs_uuid, uint8_t *p_uuid_type)); - - -/** @brief Decode little endian raw UUID bytes (16-bit or 128-bit) into a 24 bit @ref ble_uuid_t structure. - * - * @details The raw UUID bytes excluding bytes 12 and 13 (i.e. bytes 0-11 and 14-15) of p_uuid_le are compared - * to the corresponding ones in each entry of the table of vendor specific UUIDs populated with @ref sd_ble_uuid_vs_add - * to look for a match. If there is such a match, bytes 12 and 13 are returned as p_uuid->uuid and the index - * relative to @ref BLE_UUID_TYPE_VENDOR_BEGIN as p_uuid->type. - * - * @note If the UUID length supplied is 2, then the type set by this call will always be @ref BLE_UUID_TYPE_BLE. - * - * @param[in] uuid_le_len Length in bytes of the buffer pointed to by p_uuid_le (must be 2 or 16 bytes). - * @param[in] p_uuid_le Pointer pointing to little endian raw UUID bytes. - * @param[out] p_uuid Pointer to a @ref ble_uuid_t structure to be filled in. - * - * @retval ::NRF_SUCCESS Successfully decoded into the @ref ble_uuid_t structure. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_LENGTH Invalid UUID length. - * @retval ::NRF_ERROR_NOT_FOUND For a 128-bit UUID, no match in the populated table of UUIDs. - */ -SVCALL(SD_BLE_UUID_DECODE, uint32_t, sd_ble_uuid_decode(uint8_t uuid_le_len, uint8_t const *p_uuid_le, ble_uuid_t *p_uuid)); - - -/** @brief Encode a @ref ble_uuid_t structure into little endian raw UUID bytes (16-bit or 128-bit). - * - * @note The pointer to the destination buffer p_uuid_le may be NULL, in which case only the validity and size of p_uuid is computed. - * - * @param[in] p_uuid Pointer to a @ref ble_uuid_t structure that will be encoded into bytes. - * @param[out] p_uuid_le_len Pointer to a uint8_t that will be filled with the encoded length (2 or 16 bytes). - * @param[out] p_uuid_le Pointer to a buffer where the little endian raw UUID bytes (2 or 16) will be stored. - * - * @retval ::NRF_SUCCESS Successfully encoded into the buffer. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid UUID type. - */ -SVCALL(SD_BLE_UUID_ENCODE, uint32_t, sd_ble_uuid_encode(ble_uuid_t const *p_uuid, uint8_t *p_uuid_le_len, uint8_t *p_uuid_le)); - - -/**@brief Get Version Information. - * - * @details This call allows the application to get the BLE stack version information. - * - * @param[out] p_version Pointer to a ble_version_t structure to be filled in. - * - * @retval ::NRF_SUCCESS Version information stored successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::NRF_ERROR_BUSY The BLE stack is busy (typically doing a locally-initiated disconnection procedure). - */ -SVCALL(SD_BLE_VERSION_GET, uint32_t, sd_ble_version_get(ble_version_t *p_version)); - - -/**@brief Provide a user memory block. - * - * @note This call can only be used as a response to a @ref BLE_EVT_USER_MEM_REQUEST event issued to the application. - * - * @param[in] conn_handle Connection handle. - * @param[in] p_block Pointer to a user memory block structure or NULL if memory is managed by the application. - * - * @mscs - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_PEER_CANCEL_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_NOAUTH_MSC} - * @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC} - * @endmscs - * - * @retval ::NRF_SUCCESS Successfully queued a response to the peer. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_LENGTH Invalid user memory block length supplied. - * @retval ::NRF_ERROR_INVALID_STATE Invalid Connection state or no user memory request pending. - */ -SVCALL(SD_BLE_USER_MEM_REPLY, uint32_t, sd_ble_user_mem_reply(uint16_t conn_handle, ble_user_mem_block_t const *p_block)); - -/**@brief Set a BLE option. - * - * @details This call allows the application to set the value of an option. - * - * @mscs - * @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC} - * @endmscs - * - * @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS. - * @param[in] p_opt Pointer to a ble_opt_t structure containing the option value. - * - * @retval ::NRF_SUCCESS Option set successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. - * @retval ::NRF_ERROR_INVALID_STATE Unable to set the parameter at this time. - * @retval ::NRF_ERROR_BUSY The BLE stack is busy or the previous procedure has not completed. - */ -SVCALL(SD_BLE_OPT_SET, uint32_t, sd_ble_opt_set(uint32_t opt_id, ble_opt_t const *p_opt)); - - -/**@brief Get a BLE option. - * - * @details This call allows the application to retrieve the value of an option. - * - * @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS. - * @param[out] p_opt Pointer to a ble_opt_t structure to be filled in. - * - * @retval ::NRF_SUCCESS Option retrieved successfully. - * @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied. - * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle. - * @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints. - * @retval ::NRF_ERROR_INVALID_STATE Unable to retrieve the parameter at this time. - * @retval ::NRF_ERROR_BUSY The BLE stack is busy or the previous procedure has not completed. - * @retval ::NRF_ERROR_NOT_SUPPORTED This option is not supported. - * - */ -SVCALL(SD_BLE_OPT_GET, uint32_t, sd_ble_opt_get(uint32_t opt_id, ble_opt_t *p_opt)); - -/** @} */ -#ifdef __cplusplus -} -#endif -#endif /* BLE_H__ */ - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_error.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_error.h deleted file mode 100644 index 43c091630bd..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_error.h +++ /dev/null @@ -1,87 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - /** - @defgroup nrf_error SoftDevice Global Error Codes - @{ - - @brief Global Error definitions -*/ - -/* Header guard */ -#ifndef NRF_ERROR_H__ -#define NRF_ERROR_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/** @defgroup NRF_ERRORS_BASE Error Codes Base number definitions - * @{ */ -#define NRF_ERROR_BASE_NUM (0x0) ///< Global error base -#define NRF_ERROR_SDM_BASE_NUM (0x1000) ///< SDM error base -#define NRF_ERROR_SOC_BASE_NUM (0x2000) ///< SoC error base -#define NRF_ERROR_STK_BASE_NUM (0x3000) ///< STK error base -/** @} */ - -#define NRF_SUCCESS (NRF_ERROR_BASE_NUM + 0) ///< Successful command -#define NRF_ERROR_SVC_HANDLER_MISSING (NRF_ERROR_BASE_NUM + 1) ///< SVC handler is missing -#define NRF_ERROR_SOFTDEVICE_NOT_ENABLED (NRF_ERROR_BASE_NUM + 2) ///< SoftDevice has not been enabled -#define NRF_ERROR_INTERNAL (NRF_ERROR_BASE_NUM + 3) ///< Internal Error -#define NRF_ERROR_NO_MEM (NRF_ERROR_BASE_NUM + 4) ///< No Memory for operation -#define NRF_ERROR_NOT_FOUND (NRF_ERROR_BASE_NUM + 5) ///< Not found -#define NRF_ERROR_NOT_SUPPORTED (NRF_ERROR_BASE_NUM + 6) ///< Not supported -#define NRF_ERROR_INVALID_PARAM (NRF_ERROR_BASE_NUM + 7) ///< Invalid Parameter -#define NRF_ERROR_INVALID_STATE (NRF_ERROR_BASE_NUM + 8) ///< Invalid state, operation disallowed in this state -#define NRF_ERROR_INVALID_LENGTH (NRF_ERROR_BASE_NUM + 9) ///< Invalid Length -#define NRF_ERROR_INVALID_FLAGS (NRF_ERROR_BASE_NUM + 10) ///< Invalid Flags -#define NRF_ERROR_INVALID_DATA (NRF_ERROR_BASE_NUM + 11) ///< Invalid Data -#define NRF_ERROR_DATA_SIZE (NRF_ERROR_BASE_NUM + 12) ///< Invalid Data size -#define NRF_ERROR_TIMEOUT (NRF_ERROR_BASE_NUM + 13) ///< Operation timed out -#define NRF_ERROR_NULL (NRF_ERROR_BASE_NUM + 14) ///< Null Pointer -#define NRF_ERROR_FORBIDDEN (NRF_ERROR_BASE_NUM + 15) ///< Forbidden Operation -#define NRF_ERROR_INVALID_ADDR (NRF_ERROR_BASE_NUM + 16) ///< Bad Memory Address -#define NRF_ERROR_BUSY (NRF_ERROR_BASE_NUM + 17) ///< Busy -#define NRF_ERROR_CONN_COUNT (NRF_ERROR_BASE_NUM + 18) ///< Maximum connection count exceeded. -#define NRF_ERROR_RESOURCES (NRF_ERROR_BASE_NUM + 19) ///< Not enough resources for operation - -#ifdef __cplusplus -} -#endif -#endif // NRF_ERROR_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_error_sdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_error_sdm.h deleted file mode 100644 index 103659a9138..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_error_sdm.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - /** - @addtogroup nrf_sdm_api - @{ - @defgroup nrf_sdm_error SoftDevice Manager Error Codes - @{ - - @brief Error definitions for the SDM API -*/ - -/* Header guard */ -#ifndef NRF_ERROR_SDM_H__ -#define NRF_ERROR_SDM_H__ - -#include "nrf_error.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#define NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN (NRF_ERROR_SDM_BASE_NUM + 0) ///< Unknown LFCLK source. -#define NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION (NRF_ERROR_SDM_BASE_NUM + 1) ///< Incorrect interrupt configuration (can be caused by using illegal priority levels, or having enabled SoftDevice interrupts). -#define NRF_ERROR_SDM_INCORRECT_CLENR0 (NRF_ERROR_SDM_BASE_NUM + 2) ///< Incorrect CLENR0 (can be caused by erroneous SoftDevice flashing). - -#ifdef __cplusplus -} -#endif -#endif // NRF_ERROR_SDM_H__ - -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_error_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_error_soc.h deleted file mode 100644 index e31d8c9c978..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_error_soc.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - @addtogroup nrf_soc_api - @{ - @defgroup nrf_soc_error SoC Library Error Codes - @{ - - @brief Error definitions for the SoC library - -*/ - -/* Header guard */ -#ifndef NRF_ERROR_SOC_H__ -#define NRF_ERROR_SOC_H__ - -#include "nrf_error.h" -#ifdef __cplusplus -extern "C" { -#endif - -/* Mutex Errors */ -#define NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN (NRF_ERROR_SOC_BASE_NUM + 0) ///< Mutex already taken - -/* NVIC errors */ -#define NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE (NRF_ERROR_SOC_BASE_NUM + 1) ///< NVIC interrupt not available -#define NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED (NRF_ERROR_SOC_BASE_NUM + 2) ///< NVIC interrupt priority not allowed -#define NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN (NRF_ERROR_SOC_BASE_NUM + 3) ///< NVIC should not return - -/* Power errors */ -#define NRF_ERROR_SOC_POWER_MODE_UNKNOWN (NRF_ERROR_SOC_BASE_NUM + 4) ///< Power mode unknown -#define NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN (NRF_ERROR_SOC_BASE_NUM + 5) ///< Power POF threshold unknown -#define NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN (NRF_ERROR_SOC_BASE_NUM + 6) ///< Power off should not return - -/* Rand errors */ -#define NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES (NRF_ERROR_SOC_BASE_NUM + 7) ///< RAND not enough values - -/* PPI errors */ -#define NRF_ERROR_SOC_PPI_INVALID_CHANNEL (NRF_ERROR_SOC_BASE_NUM + 8) ///< Invalid PPI Channel -#define NRF_ERROR_SOC_PPI_INVALID_GROUP (NRF_ERROR_SOC_BASE_NUM + 9) ///< Invalid PPI Group - -#ifdef __cplusplus -} -#endif -#endif // NRF_ERROR_SOC_H__ -/** - @} - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_nvic.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_nvic.h deleted file mode 100644 index f4e3808071f..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_nvic.h +++ /dev/null @@ -1,517 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @defgroup nrf_nvic_api SoftDevice NVIC API - * @{ - * - * @note In order to use this module, the following code has to be added to a .c file: - * \code - * nrf_nvic_state_t nrf_nvic_state = {0}; - * \endcode - * - * @note Definitions and declarations starting with __ (double underscore) in this header file are - * not intended for direct use by the application. - * - * @brief APIs for the accessing NVIC when using a SoftDevice. - * - */ - -#ifndef NRF_NVIC_H__ -#define NRF_NVIC_H__ - -#include -#include "nrf.h" - -#include "nrf_error_soc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@addtogroup NRF_NVIC_DEFINES Defines - * @{ */ - -/**@defgroup NRF_NVIC_ISER_DEFINES SoftDevice NVIC internal definitions - * @{ */ - -#define __NRF_NVIC_NVMC_IRQn (30) /**< The peripheral ID of the NVMC. IRQ numbers are used to identify peripherals, but the NVMC doesn't have an IRQ number in the MDK. */ - -#ifdef NRF51 - #define __NRF_NVIC_ISER_COUNT (1) /**< The number of ISER/ICER registers in the NVIC that are used. */ - - /**@brief Interrupts used by the SoftDevice. */ - #define __NRF_NVIC_SD_IRQS_0 ((uint32_t)( \ - (1U << POWER_CLOCK_IRQn) \ - | (1U << RADIO_IRQn) \ - | (1U << RTC0_IRQn) \ - | (1U << TIMER0_IRQn) \ - | (1U << RNG_IRQn) \ - | (1U << ECB_IRQn) \ - | (1U << CCM_AAR_IRQn) \ - | (1U << TEMP_IRQn) \ - | (1U << __NRF_NVIC_NVMC_IRQn) \ - | (1U << (uint32_t)SWI5_IRQn) \ - )) - - /**@brief Interrupts available for to application. */ - #define __NRF_NVIC_APP_IRQS_0 (~__NRF_NVIC_SD_IRQS_0) -#endif - -#if defined(NRF52) || defined(NRF52840_XXAA) - #define __NRF_NVIC_ISER_COUNT (2) /**< The number of ISER/ICER registers in the NVIC that are used. */ - - /**@brief Interrupts used by the SoftDevice. */ - #define __NRF_NVIC_SD_IRQS_0 ((uint32_t)( \ - (1U << POWER_CLOCK_IRQn) \ - | (1U << RADIO_IRQn) \ - | (1U << RTC0_IRQn) \ - | (1U << TIMER0_IRQn) \ - | (1U << RNG_IRQn) \ - | (1U << ECB_IRQn) \ - | (1U << CCM_AAR_IRQn) \ - | (1U << TEMP_IRQn) \ - | (1U << __NRF_NVIC_NVMC_IRQn) \ - | (1U << (uint32_t)SWI5_EGU5_IRQn) \ - )) - #define __NRF_NVIC_SD_IRQS_1 ((uint32_t)0) - - /**@brief Interrupts available for to application. */ - #define __NRF_NVIC_APP_IRQS_0 (~__NRF_NVIC_SD_IRQS_0) - #define __NRF_NVIC_APP_IRQS_1 (~__NRF_NVIC_SD_IRQS_1) -#endif -/**@} */ - -/**@} */ - -/**@addtogroup NRF_NVIC_VARIABLES Variables - * @{ */ - -/**@brief Type representing the state struct for the SoftDevice NVIC module. */ -typedef struct -{ - uint32_t volatile __irq_masks[__NRF_NVIC_ISER_COUNT]; /**< IRQs enabled by the application in the NVIC. */ - uint32_t volatile __cr_flag; /**< Non-zero if already in a critical region */ -} nrf_nvic_state_t; - -/**@brief Variable keeping the state for the SoftDevice NVIC module. This must be declared in an - * application source file. */ -extern nrf_nvic_state_t nrf_nvic_state; - -/**@} */ - -/**@addtogroup NRF_NVIC_INTERNAL_FUNCTIONS SoftDevice NVIC internal functions - * @{ */ - -/**@brief Disables IRQ interrupts globally, including the SoftDevice's interrupts. - * - * @retval The value of PRIMASK prior to disabling the interrupts. - */ -__STATIC_INLINE int __sd_nvic_irq_disable(void); - -/**@brief Enables IRQ interrupts globally, including the SoftDevice's interrupts. - */ -__STATIC_INLINE void __sd_nvic_irq_enable(void); - -/**@brief Checks if IRQn is available to application - * @param[in] IRQn IRQ to check - * - * @retval 1 (true) if the IRQ to check is available to the application - */ -__STATIC_INLINE uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn); - -/**@brief Checks if priority is available to application - * @param[in] priority priority to check - * - * @retval 1 (true) if the priority to check is available to the application - */ -__STATIC_INLINE uint32_t __sd_nvic_is_app_accessible_priority(uint32_t priority); - -/**@} */ - -/**@addtogroup NRF_NVIC_FUNCTIONS SoftDevice NVIC public functions - * @{ */ - -/**@brief Enable External Interrupt. - * @note Corresponds to NVIC_EnableIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_EnableIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt was enabled. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt has a priority not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn); - -/**@brief Disable External Interrupt. - * @note Corresponds to NVIC_DisableIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_DisableIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt was disabled. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn); - -/**@brief Get Pending Interrupt. - * @note Corresponds to NVIC_GetPendingIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_GetPendingIRQ documentation in CMSIS. - * @param[out] p_pending_irq Return value from NVIC_GetPendingIRQ. - * - * @retval ::NRF_SUCCESS The interrupt is available for the application. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq); - -/**@brief Set Pending Interrupt. - * @note Corresponds to NVIC_SetPendingIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_SetPendingIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt is set pending. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn); - -/**@brief Clear Pending Interrupt. - * @note Corresponds to NVIC_ClearPendingIRQ in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_ClearPendingIRQ documentation in CMSIS. - * - * @retval ::NRF_SUCCESS The interrupt pending flag is cleared. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn); - -/**@brief Set Interrupt Priority. - * @note Corresponds to NVIC_SetPriority in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * @pre Priority is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_SetPriority documentation in CMSIS. - * @param[in] priority A valid IRQ priority for use by the application. - * - * @retval ::NRF_SUCCESS The interrupt and priority level is available for the application. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt priority is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority); - -/**@brief Get Interrupt Priority. - * @note Corresponds to NVIC_GetPriority in CMSIS. - * - * @pre IRQn is valid and not reserved by the stack. - * - * @param[in] IRQn See the NVIC_GetPriority documentation in CMSIS. - * @param[out] p_priority Return value from NVIC_GetPriority. - * - * @retval ::NRF_SUCCESS The interrupt priority is returned in p_priority. - * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE - IRQn is not available for the application. - */ -__STATIC_INLINE uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority); - -/**@brief System Reset. - * @note Corresponds to NVIC_SystemReset in CMSIS. - * - * @retval ::NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN - */ -__STATIC_INLINE uint32_t sd_nvic_SystemReset(void); - -/**@brief Enter critical region. - * - * @post Application interrupts will be disabled. - * @note sd_nvic_critical_region_enter() and ::sd_nvic_critical_region_exit() must be called in matching pairs inside each - * execution context - * @sa sd_nvic_critical_region_exit - * - * @param[out] p_is_nested_critical_region If 1, the application is now in a nested critical region. - * - * @retval ::NRF_SUCCESS - */ -__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region); - -/**@brief Exit critical region. - * - * @pre Application has entered a critical region using ::sd_nvic_critical_region_enter. - * @post If not in a nested critical region, the application interrupts will restored to the state before ::sd_nvic_critical_region_enter was called. - * - * @param[in] is_nested_critical_region If this is set to 1, the critical region won't be exited. @sa sd_nvic_critical_region_enter. - * - * @retval ::NRF_SUCCESS - */ -__STATIC_INLINE uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region); - -/**@} */ - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE int __sd_nvic_irq_disable(void) -{ - int pm = __get_PRIMASK(); - __disable_irq(); - return pm; -} - -__STATIC_INLINE void __sd_nvic_irq_enable(void) -{ - __enable_irq(); -} - -__STATIC_INLINE uint32_t __sd_nvic_app_accessible_irq(IRQn_Type IRQn) -{ - if (IRQn < 32) - { - return ((1UL<= (1 << __NVIC_PRIO_BITS)) - { - return 0; - } -#ifdef NRF51 - if( priority == 0 - || priority == 2 - ) - { - return 0; - } -#endif -#if defined(NRF52) || defined(NRF52840_XXAA) - if( priority == 0 - || priority == 1 - || priority == 4 - || priority == 5 - ) - { - return 0; - } -#endif - return 1; -} - - -__STATIC_INLINE uint32_t sd_nvic_EnableIRQ(IRQn_Type IRQn) -{ - if (!__sd_nvic_app_accessible_irq(IRQn)) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } - if (!__sd_nvic_is_app_accessible_priority(NVIC_GetPriority(IRQn))) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED; - } - - if (nrf_nvic_state.__cr_flag) - { - nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] |= (uint32_t)(1 << ((uint32_t)((int32_t)IRQn) & (uint32_t)0x1F)); - } - else - { - NVIC_EnableIRQ(IRQn); - } - return NRF_SUCCESS; -} - -__STATIC_INLINE uint32_t sd_nvic_DisableIRQ(IRQn_Type IRQn) -{ - if (!__sd_nvic_app_accessible_irq(IRQn)) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } - - if (nrf_nvic_state.__cr_flag) - { - nrf_nvic_state.__irq_masks[(uint32_t)((int32_t)IRQn) >> 5] &= ~(1UL << ((uint32_t)(IRQn) & 0x1F)); - } - else - { - NVIC_DisableIRQ(IRQn); - } - - return NRF_SUCCESS; -} - -__STATIC_INLINE uint32_t sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq) -{ - if (__sd_nvic_app_accessible_irq(IRQn)) - { - *p_pending_irq = NVIC_GetPendingIRQ(IRQn); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } -} - -__STATIC_INLINE uint32_t sd_nvic_SetPendingIRQ(IRQn_Type IRQn) -{ - if (__sd_nvic_app_accessible_irq(IRQn)) - { - NVIC_SetPendingIRQ(IRQn); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } -} - -__STATIC_INLINE uint32_t sd_nvic_ClearPendingIRQ(IRQn_Type IRQn) -{ - if (__sd_nvic_app_accessible_irq(IRQn)) - { - NVIC_ClearPendingIRQ(IRQn); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } -} - -__STATIC_INLINE uint32_t sd_nvic_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if (!__sd_nvic_app_accessible_irq(IRQn)) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } - - if (!__sd_nvic_is_app_accessible_priority(priority)) - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED; - } - - NVIC_SetPriority(IRQn, (uint32_t)priority); - return NRF_SUCCESS; -} - -__STATIC_INLINE uint32_t sd_nvic_GetPriority(IRQn_Type IRQn, uint32_t * p_priority) -{ - if (__sd_nvic_app_accessible_irq(IRQn)) - { - *p_priority = (NVIC_GetPriority(IRQn) & 0xFF); - return NRF_SUCCESS; - } - else - { - return NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE; - } -} - -__STATIC_INLINE uint32_t sd_nvic_SystemReset(void) -{ - NVIC_SystemReset(); - return NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN; -} - -__STATIC_INLINE uint32_t sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region) -{ - int was_masked = __sd_nvic_irq_disable(); - if (!nrf_nvic_state.__cr_flag) - { - nrf_nvic_state.__cr_flag = 1; - nrf_nvic_state.__irq_masks[0] = ( NVIC->ICER[0] & __NRF_NVIC_APP_IRQS_0 ); - NVIC->ICER[0] = __NRF_NVIC_APP_IRQS_0; - #if defined(NRF52) || defined(NRF52840_XXAA) - nrf_nvic_state.__irq_masks[1] = ( NVIC->ICER[1] & __NRF_NVIC_APP_IRQS_1 ); - NVIC->ICER[1] = __NRF_NVIC_APP_IRQS_1; - #endif - *p_is_nested_critical_region = 0; - } - else - { - *p_is_nested_critical_region = 1; - } - if (!was_masked) - { - __sd_nvic_irq_enable(); - } - return NRF_SUCCESS; -} - -__STATIC_INLINE uint32_t sd_nvic_critical_region_exit(uint8_t is_nested_critical_region) -{ - if (nrf_nvic_state.__cr_flag && (is_nested_critical_region == 0)) - { - int was_masked = __sd_nvic_irq_disable(); - NVIC->ISER[0] = nrf_nvic_state.__irq_masks[0]; - #if defined(NRF52) || defined(NRF52840_XXAA) - NVIC->ISER[1] = nrf_nvic_state.__irq_masks[1]; - #endif - nrf_nvic_state.__cr_flag = 0; - if (!was_masked) - { - __sd_nvic_irq_enable(); - } - } - - return NRF_SUCCESS; -} - -#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ - -#ifdef __cplusplus -} -#endif - -#endif // NRF_NVIC_H__ - -/**@} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_sd_def.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_sd_def.h deleted file mode 100644 index 0b4d221d6a4..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_sd_def.h +++ /dev/null @@ -1,59 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_SD_DEF_H__ -#define NRF_SD_DEF_H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#define SD_PPI_CHANNELS_USED 0xFFFE0000uL /**< PPI channels utilized by SotfDevice (not available to the application). */ -#define SD_PPI_GROUPS_USED 0x0000000CuL /**< PPI groups utilized by SoftDevice (not available to the application). */ -#define SD_TIMERS_USED 0x00000001uL /**< Timers used by SoftDevice. */ -#define SD_SWI_USED 0x0000003CuL /**< Software interrupts used by SoftDevice */ - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_SD_DEF_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_sdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_sdm.h deleted file mode 100644 index 57ffe13358d..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_sdm.h +++ /dev/null @@ -1,338 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - @defgroup nrf_sdm_api SoftDevice Manager API - @{ - - @brief APIs for SoftDevice management. - -*/ - -#ifndef NRF_SDM_H__ -#define NRF_SDM_H__ - -#include "nrf_svc.h" -#include "nrf.h" -#include "nrf_soc.h" -#include "nrf_error_sdm.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @addtogroup NRF_SDM_DEFINES Defines - * @{ */ -#ifdef NRFSOC_DOXYGEN -/// Declared in nrf_mbr.h -#define MBR_SIZE 0 -#warning test -#endif - -/** @brief The major version for the SoftDevice binary distributed with this header file. */ -#define SD_MAJOR_VERSION (0) - -/** @brief The minor version for the SoftDevice binary distributed with this header file. */ -#define SD_MINOR_VERSION (0) - -/** @brief The bugfix version for the SoftDevice binary distributed with this header file. */ -#define SD_BUGFIX_VERSION (0) - -/** @brief The full version number for the SoftDevice binary this header file was distributed - * with, as a decimal number in the form Mmmmbbb, where: - * - M is major version (one or more digits) - * - mmm is minor version (three digits) - * - bbb is bugfix version (three digits). */ -#define SD_VERSION (SD_MAJOR_VERSION * 1000000 + SD_MINOR_VERSION * 1000 + SD_BUGFIX_VERSION) - -/** @brief SoftDevice Manager SVC Base number. */ -#define SDM_SVC_BASE 0x10 - -/** @brief Invalid info field. Returned when an info field does not exist. */ -#define SDM_INFO_FIELD_INVALID (0) - -/** @brief Defines the SoftDevice Information Structure location (address) as an offset from -the start of the SoftDevice (without MBR)*/ -#define SOFTDEVICE_INFO_STRUCT_OFFSET (0x2000) - -/** @brief Defines the absolute SoftDevice Information Structure location (address) when the - * SoftDevice is installed just above the MBR (the usual case). */ -#define SOFTDEVICE_INFO_STRUCT_ADDRESS (SOFTDEVICE_INFO_STRUCT_OFFSET + MBR_SIZE) - -/** @brief Defines the offset for the SoftDevice Information Structure size value relative to the - * SoftDevice base address. The size value is of type uint8_t. */ -#define SD_INFO_STRUCT_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET) - -/** @brief Defines the offset for the SoftDevice size value relative to the SoftDevice base address. - * The size value is of type uint32_t. */ -#define SD_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x08) - -/** @brief Defines the offset for FWID value relative to the SoftDevice base address. The FWID value - * is of type uint16_t. */ -#define SD_FWID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x0C) - -/** @brief Defines the offset for the SoftDevice ID relative to the SoftDevice base address. The ID - * is of type uint32_t. */ -#define SD_ID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x10) - -/** @brief Defines the offset for the SoftDevice version relative to the SoftDevice base address in - * the same format as @ref SD_VERSION, stored as an uint32_t. */ -#define SD_VERSION_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x14) - -/** @brief Defines a macro for retrieving the actual SoftDevice Information Structure size value - * from a given base address. Use @ref MBR_SIZE as the argument when the SoftDevice is - * installed just above the MBR (the usual case). */ -#define SD_INFO_STRUCT_SIZE_GET(baseaddr) (*((uint8_t *) ((baseaddr) + SD_INFO_STRUCT_SIZE_OFFSET))) - -/** @brief Defines a macro for retrieving the actual SoftDevice size value from a given base - * address. Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above - * the MBR (the usual case). */ -#define SD_SIZE_GET(baseaddr) (*((uint32_t *) ((baseaddr) + SD_SIZE_OFFSET))) - -/** @brief Defines a macro for retrieving the actual FWID value from a given base address. Use @ref - * MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the usual - * case). */ -#define SD_FWID_GET(baseaddr) (*((uint16_t *) ((baseaddr) + SD_FWID_OFFSET))) - -/** @brief Defines a macro for retrieving the actual SoftDevice ID from a given base address. Use - * @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the - * usual case). */ -#define SD_ID_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_ID_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ - ? (*((uint32_t *) ((baseaddr) + SD_ID_OFFSET))) : SDM_INFO_FIELD_INVALID) - -/** @brief Defines a macro for retrieving the actual FWID value from a given base address. Use @ref - * MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the usual - * case). */ -#define SD_VERSION_GET(baseaddr) ((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_VERSION_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \ - ? (*((uint32_t *) ((baseaddr) + SD_VERSION_OFFSET))) : SDM_INFO_FIELD_INVALID) - -/**@defgroup NRF_FAULT_ID_RANGES Fault ID ranges - * @{ */ -#define NRF_FAULT_ID_SD_RANGE_START 0x00000000 /**< SoftDevice ID range start. */ -#define NRF_FAULT_ID_APP_RANGE_START 0x00001000 /**< Application ID range start. */ -/**@} */ - -/**@defgroup NRF_FAULT_IDS Fault ID types - * @{ */ -#define NRF_FAULT_ID_SD_ASSERT (NRF_FAULT_ID_SD_RANGE_START + 1) /**< SoftDevice assertion. The info parameter is reserved for future used. */ -#define NRF_FAULT_ID_APP_MEMACC (NRF_FAULT_ID_APP_RANGE_START + 1) /**< Application invalid memory access (nRF52 only). The info parameter will contain 0x00000000, in case of SoftDevice RAM - access violation. In case of SoftDevice peripheral register violation the info parameter will contain the sub-region number of PREGION[0], on whose address range the disallowed - write access caused the memory access fault. */ -/**@} */ - -/** @} */ - -/** @addtogroup NRF_SDM_ENUMS Enumerations - * @{ */ - -/**@brief nRF SoftDevice Manager API SVC numbers. */ -enum NRF_SD_SVCS -{ - SD_SOFTDEVICE_ENABLE = SDM_SVC_BASE, /**< ::sd_softdevice_enable */ - SD_SOFTDEVICE_DISABLE, /**< ::sd_softdevice_disable */ - SD_SOFTDEVICE_IS_ENABLED, /**< ::sd_softdevice_is_enabled */ - SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, /**< ::sd_softdevice_vector_table_base_set */ - SVC_SDM_LAST /**< Placeholder for last SDM SVC */ -}; - -/** @} */ - -/** @addtogroup NRF_SDM_DEFINES Defines - * @{ */ - -/**@defgroup NRF_CLOCK_LF_XTAL_ACCURACY Clock accuracy - * @{ */ - -#define NRF_CLOCK_LF_XTAL_ACCURACY_250_PPM (0) /**< Default: 250 ppm */ -#define NRF_CLOCK_LF_XTAL_ACCURACY_500_PPM (1) /**< 500 ppm */ -#define NRF_CLOCK_LF_XTAL_ACCURACY_150_PPM (2) /**< 150 ppm */ -#define NRF_CLOCK_LF_XTAL_ACCURACY_100_PPM (3) /**< 100 ppm */ -#define NRF_CLOCK_LF_XTAL_ACCURACY_75_PPM (4) /**< 75 ppm */ -#define NRF_CLOCK_LF_XTAL_ACCURACY_50_PPM (5) /**< 50 ppm */ -#define NRF_CLOCK_LF_XTAL_ACCURACY_30_PPM (6) /**< 30 ppm */ -#define NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM (7) /**< 20 ppm */ -#define NRF_CLOCK_LF_XTAL_ACCURACY_10_PPM (8) /**< 10 ppm */ -#define NRF_CLOCK_LF_XTAL_ACCURACY_5_PPM (9) /**< 5 ppm */ -#define NRF_CLOCK_LF_XTAL_ACCURACY_2_PPM (10) /**< 2 ppm */ -#define NRF_CLOCK_LF_XTAL_ACCURACY_1_PPM (11) /**< 1 ppm */ - -/** @} */ - -/**@defgroup NRF_CLOCK_LF_SRC Possible LFCLK oscillator sources - * @{ */ - -#define NRF_CLOCK_LF_SRC_RC (0) /**< LFCLK RC oscillator. */ -#define NRF_CLOCK_LF_SRC_XTAL (1) /**< LFCLK crystal oscillator. */ -#define NRF_CLOCK_LF_SRC_SYNTH (2) /**< LFCLK Synthesized from HFCLK. */ - -/** @} */ - -/** @} */ - -/** @addtogroup NRF_SDM_TYPES Types - * @{ */ - -/**@brief Type representing LFCLK oscillator source. */ -typedef struct -{ - uint8_t source; /**< LF oscillator clock source, see @ref NRF_CLOCK_LF_SRC. */ - uint8_t rc_ctiv; /**< Only for NRF_CLOCK_LF_SRC_RC: Calibration timer interval in 1/4 second - units (nRF51: 1-64, nRF52: 1-32). - @note To avoid excessive clock drift, 0.5 degrees Celsius is the - maximum temperature change allowed in one calibration timer - interval. The interval should be selected to ensure this. - - @note Must be 0 if source is not NRF_CLOCK_LF_SRC_RC. */ - uint8_t rc_temp_ctiv; /**< Only for NRF_CLOCK_LF_SRC_RC: How often (in number of calibration - intervals) the RC oscillator shall be calibrated if the temperature - hasn't changed. - 0: Always calibrate even if the temperature hasn't changed. - 1: Only calibrate if the temperature has changed (nRF51 only). - 2-33: Check the temperature and only calibrate if it has changed, - however calibration will take place every rc_temp_ctiv - intervals in any case. - - @note Must be 0 if source is not NRF_CLOCK_LF_SRC_RC. - - @note For nRF52, the application must ensure calibration at least once - every 8 seconds to ensure +/-250 ppm clock stability. The - recommended configuration for NRF_CLOCK_LF_SRC_RC on nRF52 is - rc_ctiv=16 and rc_temp_ctiv=2. This will ensure calibration at - least once every 8 seconds and for temperature changes of 0.5 - degrees Celsius every 4 seconds. See the Product Specification - for the nRF52 device being used for more information.*/ - uint8_t xtal_accuracy; /**< External crystal clock accuracy used in the LL to compute timing - windows, see @ref NRF_CLOCK_LF_XTAL_ACCURACY. - - @note For the NRF_CLOCK_LF_SRC_RC clock source this parameter is ignored. */ -} nrf_clock_lf_cfg_t; - -/**@brief Fault Handler type. - * - * When certain unrecoverable errors occur within the application or SoftDevice the fault handler will be called back. - * The protocol stack will be in an undefined state when this happens and the only way to recover will be to - * perform a reset, using e.g. CMSIS NVIC_SystemReset(). - * If the application returns from the fault handler the SoftDevice will call NVIC_SystemReset(). - * - * @note This callback is executed in HardFault context, thus SVC functions cannot be called from the fault callback. - * - * @param[in] id Fault identifier. See @ref NRF_FAULT_IDS. - * @param[in] pc The program counter of the instruction that triggered the fault. - * @param[in] info Optional additional information regarding the fault. Refer to each Fault identifier for details. - * - * @note When id is set to NRF_FAULT_ID_APP_MEMACC, pc will contain the address of the instruction being executed at the time when - * the fault is detected by the CPU. The CPU program counter may have advanced up to 2 instructions (no branching) after the one that triggered the fault. - */ -typedef void (*nrf_fault_handler_t)(uint32_t id, uint32_t pc, uint32_t info); - -/** @} */ - -/** @addtogroup NRF_SDM_FUNCTIONS Functions - * @{ */ - -/**@brief Enables the SoftDevice and by extension the protocol stack. - * - * @note Some care must be taken if a low frequency clock source is already running when calling this function: - * If the LF clock has a different source then the one currently running, it will be stopped. Then, the new - * clock source will be started. - * - * @note This function has no effect when returning with an error. - * - * @post If return code is ::NRF_SUCCESS - * - SoC library and protocol stack APIs are made available. - * - A portion of RAM will be unavailable (see relevant SDS documentation). - * - Some peripherals will be unavailable or available only through the SoC API (see relevant SDS documentation). - * - Interrupts will not arrive from protected peripherals or interrupts. - * - nrf_nvic_ functions must be used instead of CMSIS NVIC_ functions for reliable usage of the SoftDevice. - * - Interrupt latency may be affected by the SoftDevice (see relevant SDS documentation). - * - Chosen low frequency clock source will be running. - * - * @param p_clock_lf_cfg Low frequency clock source and accuracy. - If NULL the clock will be configured as an RC source with rc_ctiv = 16 and .rc_temp_ctiv = 2 - In the case of XTAL source, the PPM accuracy of the chosen clock source must be greater than or equal to the actual characteristics of your XTAL clock. - * @param fault_handler Callback to be invoked in case of fault, cannot be NULL. - * - * @retval ::NRF_SUCCESS - * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. - * @retval ::NRF_ERROR_INVALID_STATE SoftDevice is already enabled, and the clock source and fault handler cannot be updated. - * @retval ::NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION SoftDevice interrupt is already enabled, or an enabled interrupt has an illegal priority level. - * @retval ::NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN Unknown low frequency clock source selected. - */ -SVCALL(SD_SOFTDEVICE_ENABLE, uint32_t, sd_softdevice_enable(nrf_clock_lf_cfg_t const * p_clock_lf_cfg, nrf_fault_handler_t fault_handler)); - - -/**@brief Disables the SoftDevice and by extension the protocol stack. - * - * Idempotent function to disable the SoftDevice. - * - * @post SoC library and protocol stack APIs are made unavailable. - * @post All interrupts that was protected by the SoftDevice will be disabled and initialized to priority 0 (highest). - * @post All peripherals used by the SoftDevice will be reset to default values. - * @post All of RAM become available. - * @post All interrupts are forwarded to the application. - * @post LFCLK source chosen in ::sd_softdevice_enable will be left running. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_SOFTDEVICE_DISABLE, uint32_t, sd_softdevice_disable(void)); - -/**@brief Check if the SoftDevice is enabled. - * - * @param[out] p_softdevice_enabled If the SoftDevice is enabled: 1 else 0. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_SOFTDEVICE_IS_ENABLED, uint32_t, sd_softdevice_is_enabled(uint8_t * p_softdevice_enabled)); - -/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the SoftDevice - * - * This function is only intended to be called when a bootloader is enabled. - * - * @param[in] address The base address of the interrupt vector table for forwarded interrupts. - - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, uint32_t, sd_softdevice_vector_table_base_set(uint32_t address)); - -/** @} */ - -#ifdef __cplusplus -} -#endif -#endif // NRF_SDM_H__ - -/** - @} -*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_soc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_soc.h deleted file mode 100644 index 875f9bb63fc..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_soc.h +++ /dev/null @@ -1,926 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @defgroup nrf_soc_api SoC Library API - * @{ - * - * @brief APIs for the SoC library. - * - */ - -#ifndef NRF_SOC_H__ -#define NRF_SOC_H__ - -#include -#include -#include "nrf_svc.h" -#include "nrf.h" - -#include "nrf_error_soc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@addtogroup NRF_SOC_DEFINES Defines - * @{ */ - -/**@brief The number of the lowest SVC number reserved for the SoC library. */ -#define SOC_SVC_BASE (0x20) /**< Base value for SVCs that are available when the SoftDevice is disabled. */ -#define SOC_SVC_BASE_NOT_AVAILABLE (0x2B) /**< Base value for SVCs that are not available when the SoftDevice is disabled. */ - -/**@brief Guaranteed time for application to process radio inactive notification. */ -#define NRF_RADIO_NOTIFICATION_INACTIVE_GUARANTEED_TIME_US (62) - -/**@brief The minimum allowed timeslot extension time. */ -#define NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US (200) - -#define SOC_ECB_KEY_LENGTH (16) /**< ECB key length. */ -#define SOC_ECB_CLEARTEXT_LENGTH (16) /**< ECB cleartext length. */ -#define SOC_ECB_CIPHERTEXT_LENGTH (SOC_ECB_CLEARTEXT_LENGTH) /**< ECB ciphertext length. */ - -#ifdef NRF51 -#define SD_EVT_IRQn (SWI2_IRQn) /**< SoftDevice Event IRQ number. Used for both protocol events and SoC events. */ -#define SD_EVT_IRQHandler (SWI2_IRQHandler) /**< SoftDevice Event IRQ handler. Used for both protocol events and SoC events. */ -#define RADIO_NOTIFICATION_IRQn (SWI1_IRQn) /**< The radio notification IRQ number. */ -#define RADIO_NOTIFICATION_IRQHandler (SWI1_IRQHandler) /**< The radio notification IRQ handler. */ -#endif -#if defined(NRF52) || defined(NRF52840_XXAA) -#define SD_EVT_IRQn (SWI2_EGU2_IRQn) /**< SoftDevice Event IRQ number. Used for both protocol events and SoC events. */ -#define SD_EVT_IRQHandler (SWI2_EGU2_IRQHandler) /**< SoftDevice Event IRQ handler. Used for both protocol events and SoC events. - The default interrupt priority for this handler is set to 4 */ -#define RADIO_NOTIFICATION_IRQn (SWI1_EGU1_IRQn) /**< The radio notification IRQ number. */ -#define RADIO_NOTIFICATION_IRQHandler (SWI1_EGU1_IRQHandler) /**< The radio notification IRQ handler. - The default interrupt priority for this handler is set to 4 */ -#endif - -#define NRF_RADIO_LENGTH_MIN_US (100) /**< The shortest allowed radio timeslot, in microseconds. */ -#define NRF_RADIO_LENGTH_MAX_US (100000) /**< The longest allowed radio timeslot, in microseconds. */ - -#define NRF_RADIO_DISTANCE_MAX_US (128000000UL - 1UL) /**< The longest timeslot distance, in microseconds, allowed for the distance parameter (see @ref nrf_radio_request_normal_t) in the request. */ - -#define NRF_RADIO_EARLIEST_TIMEOUT_MAX_US (128000000UL - 1UL) /**< The longest timeout, in microseconds, allowed when requesting the earliest possible timeslot. */ - -#define NRF_RADIO_START_JITTER_US (2) /**< The maximum jitter in @ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START relative to the requested start time. */ - -/**@} */ - -/**@addtogroup NRF_SOC_ENUMS Enumerations - * @{ */ - -/**@brief The SVC numbers used by the SVC functions in the SoC library. */ -enum NRF_SOC_SVCS -{ - SD_PPI_CHANNEL_ENABLE_GET = SOC_SVC_BASE, - SD_PPI_CHANNEL_ENABLE_SET, - SD_PPI_CHANNEL_ENABLE_CLR, - SD_PPI_CHANNEL_ASSIGN, - SD_PPI_GROUP_TASK_ENABLE, - SD_PPI_GROUP_TASK_DISABLE, - SD_PPI_GROUP_ASSIGN, - SD_PPI_GROUP_GET, - SD_FLASH_PAGE_ERASE, - SD_FLASH_WRITE, - SD_FLASH_PROTECT, - SD_MUTEX_NEW = SOC_SVC_BASE_NOT_AVAILABLE, - SD_MUTEX_ACQUIRE, - SD_MUTEX_RELEASE, - SD_RAND_APPLICATION_POOL_CAPACITY_GET, - SD_RAND_APPLICATION_BYTES_AVAILABLE_GET, - SD_RAND_APPLICATION_VECTOR_GET, - SD_POWER_MODE_SET, - SD_POWER_SYSTEM_OFF, - SD_POWER_RESET_REASON_GET, - SD_POWER_RESET_REASON_CLR, - SD_POWER_POF_ENABLE, - SD_POWER_POF_THRESHOLD_SET, - SD_POWER_RAM_POWER_SET, - SD_POWER_RAM_POWER_CLR, - SD_POWER_RAM_POWER_GET, - SD_POWER_GPREGRET_SET, - SD_POWER_GPREGRET_CLR, - SD_POWER_GPREGRET_GET, - SD_POWER_DCDC_MODE_SET, - SD_APP_EVT_WAIT, - SD_CLOCK_HFCLK_REQUEST, - SD_CLOCK_HFCLK_RELEASE, - SD_CLOCK_HFCLK_IS_RUNNING, - SD_RADIO_NOTIFICATION_CFG_SET, - SD_ECB_BLOCK_ENCRYPT, - SD_ECB_BLOCKS_ENCRYPT, - SD_RADIO_SESSION_OPEN, - SD_RADIO_SESSION_CLOSE, - SD_RADIO_REQUEST, - SD_EVT_GET, - SD_TEMP_GET, - SVC_SOC_LAST -}; - -/**@brief Possible values of a ::nrf_mutex_t. */ -enum NRF_MUTEX_VALUES -{ - NRF_MUTEX_FREE, - NRF_MUTEX_TAKEN -}; - -/**@brief Power modes. */ -enum NRF_POWER_MODES -{ - NRF_POWER_MODE_CONSTLAT, /**< Constant latency mode. See power management in the reference manual. */ - NRF_POWER_MODE_LOWPWR /**< Low power mode. See power management in the reference manual. */ -}; - - -/**@brief Power failure thresholds */ -enum NRF_POWER_THRESHOLDS -{ - NRF_POWER_THRESHOLD_V17 = 4UL, /**< 1.7 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V18, /**< 1.8 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V19, /**< 1.9 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V20, /**< 2.0 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V21, /**< 2.1 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V22, /**< 2.2 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V23, /**< 2.3 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V24, /**< 2.4 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V25, /**< 2.5 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V26, /**< 2.6 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V27, /**< 2.7 Volts power failure threshold. */ - NRF_POWER_THRESHOLD_V28 /**< 2.8 Volts power failure threshold. */ -}; - - -/**@brief DC/DC converter modes. */ -enum NRF_POWER_DCDC_MODES -{ - NRF_POWER_DCDC_DISABLE, /**< The DCDC is disabled. */ - NRF_POWER_DCDC_ENABLE /**< The DCDC is enabled. */ -}; - -/**@brief Radio notification distances. */ -enum NRF_RADIO_NOTIFICATION_DISTANCES -{ - NRF_RADIO_NOTIFICATION_DISTANCE_NONE = 0, /**< The event does not have a notification. */ - NRF_RADIO_NOTIFICATION_DISTANCE_800US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_1740US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_2680US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_3620US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_4560US, /**< The distance from the active notification to start of radio activity. */ - NRF_RADIO_NOTIFICATION_DISTANCE_5500US /**< The distance from the active notification to start of radio activity. */ -}; - - -/**@brief Radio notification types. */ -enum NRF_RADIO_NOTIFICATION_TYPES -{ - NRF_RADIO_NOTIFICATION_TYPE_NONE = 0, /**< The event does not have a radio notification signal. */ - NRF_RADIO_NOTIFICATION_TYPE_INT_ON_ACTIVE, /**< Using interrupt for notification when the radio will be enabled. */ - NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE, /**< Using interrupt for notification when the radio has been disabled. */ - NRF_RADIO_NOTIFICATION_TYPE_INT_ON_BOTH, /**< Using interrupt for notification both when the radio will be enabled and disabled. */ -}; - -/**@brief The Radio signal callback types. */ -enum NRF_RADIO_CALLBACK_SIGNAL_TYPE -{ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_START, /**< This signal indicates the start of the radio timeslot. */ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_TIMER0, /**< This signal indicates the NRF_TIMER0 interrupt. */ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_RADIO, /**< This signal indicates the NRF_RADIO interrupt. */ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_EXTEND_FAILED, /**< This signal indicates extend action failed. */ - NRF_RADIO_CALLBACK_SIGNAL_TYPE_EXTEND_SUCCEEDED /**< This signal indicates extend action succeeded. */ -}; - -/**@brief The actions requested by the signal callback. - * - * This code gives the SOC instructions about what action to take when the signal callback has - * returned. - */ -enum NRF_RADIO_SIGNAL_CALLBACK_ACTION -{ - NRF_RADIO_SIGNAL_CALLBACK_ACTION_NONE, /**< Return without action. */ - NRF_RADIO_SIGNAL_CALLBACK_ACTION_EXTEND, /**< Request an extension of the current timeslot (maximum execution time for this action is when the extension succeeded). */ - NRF_RADIO_SIGNAL_CALLBACK_ACTION_END, /**< End the current radio timeslot. */ - NRF_RADIO_SIGNAL_CALLBACK_ACTION_REQUEST_AND_END /**< Request a new radio timeslot and end the current timeslot. */ -}; - -/**@brief Radio timeslot high frequency clock source configuration. */ -enum NRF_RADIO_HFCLK_CFG -{ - NRF_RADIO_HFCLK_CFG_XTAL_GUARANTEED, /**< The SoftDevice will guarantee that the high frequency clock source is the - external crystal for the whole duration of the timeslot. This should be the - preferred option for events that use the radio or require high timing accuracy. - @note The SoftDevice will automatically turn on and off the external crystal, - at the beginning and end of the timeslot, respectively. The crystal may also - intentionally be left running after the timeslot, in cases where it is needed - by the SoftDevice shortly after the end of the timeslot. */ - NRF_RADIO_HFCLK_CFG_NO_GUARANTEE /**< This configuration allows for earlier and tighter scheduling of timeslots. - The RC oscillator may be the clock source in part or for the whole duration of the timeslot. - The RC oscillator's accuracy must therefore be taken into consideration. - @note If the application will use the radio peripheral in timeslots with this configuration, - it must make sure that the crystal is running and stable before starting the radio. */ -}; - -/**@brief Radio timeslot priorities. */ -enum NRF_RADIO_PRIORITY -{ - NRF_RADIO_PRIORITY_HIGH, /**< High (equal priority as the normal connection priority of the SoftDevice stack(s)). */ - NRF_RADIO_PRIORITY_NORMAL, /**< Normal (equal priority as the priority of secondary activities of the SoftDevice stack(s)). */ -}; - -/**@brief Radio timeslot request type. */ -enum NRF_RADIO_REQUEST_TYPE -{ - NRF_RADIO_REQ_TYPE_EARLIEST, /**< Request radio timeslot as early as possible. This should always be used for the first request in a session. */ - NRF_RADIO_REQ_TYPE_NORMAL /**< Normal radio timeslot request. */ -}; - -/**@brief SoC Events. */ -enum NRF_SOC_EVTS -{ - NRF_EVT_HFCLKSTARTED, /**< Event indicating that the HFCLK has started. */ - NRF_EVT_POWER_FAILURE_WARNING, /**< Event indicating that a power failure warning has occurred. */ - NRF_EVT_FLASH_OPERATION_SUCCESS, /**< Event indicating that the ongoing flash operation has completed successfully. */ - NRF_EVT_FLASH_OPERATION_ERROR, /**< Event indicating that the ongoing flash operation has timed out with an error. */ - NRF_EVT_RADIO_BLOCKED, /**< Event indicating that a radio timeslot was blocked. */ - NRF_EVT_RADIO_CANCELED, /**< Event indicating that a radio timeslot was canceled by SoftDevice. */ - NRF_EVT_RADIO_SIGNAL_CALLBACK_INVALID_RETURN, /**< Event indicating that a radio timeslot signal callback handler return was invalid. */ - NRF_EVT_RADIO_SESSION_IDLE, /**< Event indicating that a radio timeslot session is idle. */ - NRF_EVT_RADIO_SESSION_CLOSED, /**< Event indicating that a radio timeslot session is closed. */ - NRF_EVT_NUMBER_OF_EVTS -}; - -/**@} */ - - -/**@addtogroup NRF_SOC_STRUCTURES Structures - * @{ */ - -/**@brief Represents a mutex for use with the nrf_mutex functions. - * @note Accessing the value directly is not safe, use the mutex functions! - */ -typedef volatile uint8_t nrf_mutex_t; - -/**@brief Parameters for a request for a timeslot as early as possible. */ -typedef struct -{ - uint8_t hfclk; /**< High frequency clock source, see @ref NRF_RADIO_HFCLK_CFG. */ - uint8_t priority; /**< The radio timeslot priority, see @ref NRF_RADIO_PRIORITY. */ - uint32_t length_us; /**< The radio timeslot length (in the range 100 to 100,000] microseconds). */ - uint32_t timeout_us; /**< Longest acceptable delay until the start of the requested timeslot (up to @ref NRF_RADIO_EARLIEST_TIMEOUT_MAX_US microseconds). */ -} nrf_radio_request_earliest_t; - -/**@brief Parameters for a normal radio timeslot request. */ -typedef struct -{ - uint8_t hfclk; /**< High frequency clock source, see @ref NRF_RADIO_HFCLK_CFG. */ - uint8_t priority; /**< The radio timeslot priority, see @ref NRF_RADIO_PRIORITY. */ - uint32_t distance_us; /**< Distance from the start of the previous radio timeslot (up to @ref NRF_RADIO_DISTANCE_MAX_US microseconds). */ - uint32_t length_us; /**< The radio timeslot length (in the range [100..100,000] microseconds). */ -} nrf_radio_request_normal_t; - -/**@brief Radio timeslot request parameters. */ -typedef struct -{ - uint8_t request_type; /**< Type of request, see @ref NRF_RADIO_REQUEST_TYPE. */ - union - { - nrf_radio_request_earliest_t earliest; /**< Parameters for requesting a radio timeslot as early as possible. */ - nrf_radio_request_normal_t normal; /**< Parameters for requesting a normal radio timeslot. */ - } params; /**< Parameter union. */ -} nrf_radio_request_t; - -/**@brief Return parameters of the radio timeslot signal callback. */ -typedef struct -{ - uint8_t callback_action; /**< The action requested by the application when returning from the signal callback, see @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION. */ - union - { - struct - { - nrf_radio_request_t * p_next; /**< The request parameters for the next radio timeslot. */ - } request; /**< Additional parameters for return_code @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION_REQUEST_AND_END. */ - struct - { - uint32_t length_us; /**< Requested extension of the radio timeslot duration (microseconds) (for minimum time see @ref NRF_RADIO_MINIMUM_TIMESLOT_LENGTH_EXTENSION_TIME_US). */ - } extend; /**< Additional parameters for return_code @ref NRF_RADIO_SIGNAL_CALLBACK_ACTION_EXTEND. */ - } params; /**< Parameter union. */ -} nrf_radio_signal_callback_return_param_t; - -/**@brief The radio timeslot signal callback type. - * - * @note In case of invalid return parameters, the radio timeslot will automatically end - * immediately after returning from the signal callback and the - * @ref NRF_EVT_RADIO_SIGNAL_CALLBACK_INVALID_RETURN event will be sent. - * @note The returned struct pointer must remain valid after the signal callback - * function returns. For instance, this means that it must not point to a stack variable. - * - * @param[in] signal_type Type of signal, see @ref NRF_RADIO_CALLBACK_SIGNAL_TYPE. - * - * @return Pointer to structure containing action requested by the application. - */ -typedef nrf_radio_signal_callback_return_param_t * (*nrf_radio_signal_callback_t) (uint8_t signal_type); - -/**@brief AES ECB parameter typedefs */ -typedef uint8_t soc_ecb_key_t[SOC_ECB_KEY_LENGTH]; /**< Encryption key type. */ -typedef uint8_t soc_ecb_cleartext_t[SOC_ECB_CLEARTEXT_LENGTH]; /**< Cleartext data type. */ -typedef uint8_t soc_ecb_ciphertext_t[SOC_ECB_CIPHERTEXT_LENGTH]; /**< Ciphertext data type. */ - -/**@brief AES ECB data structure */ -typedef struct -{ - soc_ecb_key_t key; /**< Encryption key. */ - soc_ecb_cleartext_t cleartext; /**< Cleartext data. */ - soc_ecb_ciphertext_t ciphertext; /**< Ciphertext data. */ -} nrf_ecb_hal_data_t; - -/**@brief AES ECB block. Used to provide multiple blocks in a single call - to @ref sd_ecb_blocks_encrypt.*/ -typedef struct -{ - soc_ecb_key_t const * p_key; /**< Pointer to the Encryption key. */ - soc_ecb_cleartext_t const * p_cleartext; /**< Pointer to the Cleartext data. */ - soc_ecb_ciphertext_t * p_ciphertext; /**< Pointer to the Ciphertext data. */ -} nrf_ecb_hal_data_block_t; - -/**@} */ - -/**@addtogroup NRF_SOC_FUNCTIONS Functions - * @{ */ - -/**@brief Initialize a mutex. - * - * @param[in] p_mutex Pointer to the mutex to initialize. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_MUTEX_NEW, uint32_t, sd_mutex_new(nrf_mutex_t * p_mutex)); - -/**@brief Attempt to acquire a mutex. - * - * @param[in] p_mutex Pointer to the mutex to acquire. - * - * @retval ::NRF_SUCCESS The mutex was successfully acquired. - * @retval ::NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN The mutex could not be acquired. - */ -SVCALL(SD_MUTEX_ACQUIRE, uint32_t, sd_mutex_acquire(nrf_mutex_t * p_mutex)); - -/**@brief Release a mutex. - * - * @param[in] p_mutex Pointer to the mutex to release. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_MUTEX_RELEASE, uint32_t, sd_mutex_release(nrf_mutex_t * p_mutex)); - -/**@brief Query the capacity of the application random pool. - * - * @param[out] p_pool_capacity The capacity of the pool. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_RAND_APPLICATION_POOL_CAPACITY_GET, uint32_t, sd_rand_application_pool_capacity_get(uint8_t * p_pool_capacity)); - -/**@brief Get number of random bytes available to the application. - * - * @param[out] p_bytes_available The number of bytes currently available in the pool. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_RAND_APPLICATION_BYTES_AVAILABLE_GET, uint32_t, sd_rand_application_bytes_available_get(uint8_t * p_bytes_available)); - -/**@brief Get random bytes from the application pool. - * - * @param[out] p_buff Pointer to unit8_t buffer for storing the bytes. - * @param[in] length Number of bytes to take from pool and place in p_buff. - * - * @retval ::NRF_SUCCESS The requested bytes were written to p_buff. - * @retval ::NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES No bytes were written to the buffer, because there were not enough bytes available. -*/ -SVCALL(SD_RAND_APPLICATION_VECTOR_GET, uint32_t, sd_rand_application_vector_get(uint8_t * p_buff, uint8_t length)); - -/**@brief Gets the reset reason register. - * - * @param[out] p_reset_reason Contents of the NRF_POWER->RESETREAS register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RESET_REASON_GET, uint32_t, sd_power_reset_reason_get(uint32_t * p_reset_reason)); - -/**@brief Clears the bits of the reset reason register. - * - * @param[in] reset_reason_clr_msk Contains the bits to clear from the reset reason register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RESET_REASON_CLR, uint32_t, sd_power_reset_reason_clr(uint32_t reset_reason_clr_msk)); - -/**@brief Sets the power mode when in CPU sleep. - * - * @param[in] power_mode The power mode to use when in CPU sleep, see @ref NRF_POWER_MODES. @sa sd_app_evt_wait - * - * @retval ::NRF_SUCCESS The power mode was set. - * @retval ::NRF_ERROR_SOC_POWER_MODE_UNKNOWN The power mode was unknown. - */ -SVCALL(SD_POWER_MODE_SET, uint32_t, sd_power_mode_set(uint8_t power_mode)); - -/**@brief Puts the chip in System OFF mode. - * - * @retval ::NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN - */ -SVCALL(SD_POWER_SYSTEM_OFF, uint32_t, sd_power_system_off(void)); - -/**@brief Enables or disables the power-fail comparator. - * - * Enabling this will give a SoftDevice event (NRF_EVT_POWER_FAILURE_WARNING) when the power failure warning occurs. - * The event can be retrieved with sd_evt_get(); - * - * @param[in] pof_enable True if the power-fail comparator should be enabled, false if it should be disabled. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_POF_ENABLE, uint32_t, sd_power_pof_enable(uint8_t pof_enable)); - -/**@brief Sets the power-fail threshold value. - * - * @param[in] threshold The power-fail threshold value to use, see @ref NRF_POWER_THRESHOLDS. - * - * @retval ::NRF_SUCCESS The power failure threshold was set. - * @retval ::NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN The power failure threshold is unknown. - */ -SVCALL(SD_POWER_POF_THRESHOLD_SET, uint32_t, sd_power_pof_threshold_set(uint8_t threshold)); - -/**@brief Writes the NRF_POWER->RAM[index].POWERSET register. - * - * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWERSET register to write to. - * @param[in] ram_powerset Contains the word to write to the NRF_POWER->RAM[index].POWERSET register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RAM_POWER_SET, uint32_t, sd_power_ram_power_set(uint8_t index, uint32_t ram_powerset)); - -/**@brief Writes the NRF_POWER->RAM[index].POWERCLR register. - * - * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWERCLR register to write to. - * @param[in] ram_powerclr Contains the word to write to the NRF_POWER->RAM[index].POWERCLR register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RAM_POWER_CLR, uint32_t, sd_power_ram_power_clr(uint8_t index, uint32_t ram_powerclr)); - -/**@brief Get contents of NRF_POWER->RAM[index].POWER register, indicates power status of RAM[index] blocks. - * - * @param[in] index Contains the index in the NRF_POWER->RAM[index].POWER register to read from. - * @param[out] p_ram_power Content of NRF_POWER->RAM[index].POWER register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_RAM_POWER_GET, uint32_t, sd_power_ram_power_get(uint8_t index, uint32_t * p_ram_power)); - -/**@brief Set bits in the general purpose retention registers (NRF_POWER->GPREGRET*). - * - * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. - * @param[in] gpregret_msk Bits to be set in the GPREGRET register. - * - * @note nRF51 does only have one general purpose retained register, so gpregret_id must be 0 on nRF51. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_GPREGRET_SET, uint32_t, sd_power_gpregret_set(uint32_t gpregret_id, uint32_t gpregret_msk)); - -/**@brief Clear bits in the general purpose retention registers (NRF_POWER->GPREGRET*). - * - * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. - * @param[in] gpregret_msk Bits to be clear in the GPREGRET register. - * - * @note nRF51 does only have one general purpose retained register, so gpregret_id must be 0 on nRF51. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_GPREGRET_CLR, uint32_t, sd_power_gpregret_clr(uint32_t gpregret_id, uint32_t gpregret_msk)); - -/**@brief Get contents of the general purpose retention registers (NRF_POWER->GPREGRET*). - * - * @param[in] gpregret_id 0 for GPREGRET, 1 for GPREGRET2. - * @param[out] p_gpregret Contents of the GPREGRET register. - * - * @note nRF51 does only have one general purpose retained register, so gpregret_id must be 0 on nRF51. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_POWER_GPREGRET_GET, uint32_t, sd_power_gpregret_get(uint32_t gpregret_id, uint32_t *p_gpregret)); - -/**@brief Sets the DCDC mode. - * - * Enable or disable the DCDC peripheral. - * - * @param[in] dcdc_mode The mode of the DCDC, see @ref NRF_POWER_DCDC_MODES. - * - * @retval ::NRF_SUCCESS - * @retval ::NRF_ERROR_INVALID_PARAM The DCDC mode is invalid. - */ -SVCALL(SD_POWER_DCDC_MODE_SET, uint32_t, sd_power_dcdc_mode_set(uint8_t dcdc_mode)); - -/**@brief Request the high frequency crystal oscillator. - * - * Will start the high frequency crystal oscillator, the startup time of the crystal varies - * and the ::sd_clock_hfclk_is_running function can be polled to check if it has started. - * - * @see sd_clock_hfclk_is_running - * @see sd_clock_hfclk_release - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_CLOCK_HFCLK_REQUEST, uint32_t, sd_clock_hfclk_request(void)); - -/**@brief Releases the high frequency crystal oscillator. - * - * Will stop the high frequency crystal oscillator, this happens immediately. - * - * @see sd_clock_hfclk_is_running - * @see sd_clock_hfclk_request - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_CLOCK_HFCLK_RELEASE, uint32_t, sd_clock_hfclk_release(void)); - -/**@brief Checks if the high frequency crystal oscillator is running. - * - * @see sd_clock_hfclk_request - * @see sd_clock_hfclk_release - * - * @param[out] p_is_running 1 if the external crystal oscillator is running, 0 if not. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_CLOCK_HFCLK_IS_RUNNING, uint32_t, sd_clock_hfclk_is_running(uint32_t * p_is_running)); - -/**@brief Waits for an application event. - * - * An application event is either an application interrupt or a pended interrupt when the - * interrupt is disabled. When the interrupt is enabled it will be taken immediately since - * this function will wait in thread mode, then the execution will return in the application's - * main thread. When an interrupt is disabled and gets pended it will return to the application's - * main thread. The application must ensure that the pended flag is cleared using - * ::sd_nvic_ClearPendingIRQ in order to sleep using this function. This is only necessary for - * disabled interrupts, as the interrupt handler will clear the pending flag automatically for - * enabled interrupts. - * - * In order to wake up from disabled interrupts, the SEVONPEND flag has to be set in the Cortex-M0 - * System Control Register (SCR). @sa CMSIS_SCB - * - * @note If an application interrupt has happened since the last time sd_app_evt_wait was - * called this function will return immediately and not go to sleep. This is to avoid race - * conditions that can occur when a flag is updated in the interrupt handler and processed - * in the main loop. - * - * @post An application interrupt has happened or a interrupt pending flag is set. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_APP_EVT_WAIT, uint32_t, sd_app_evt_wait(void)); - -/**@brief Get PPI channel enable register contents. - * - * @param[out] p_channel_enable The contents of the PPI CHEN register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_CHANNEL_ENABLE_GET, uint32_t, sd_ppi_channel_enable_get(uint32_t * p_channel_enable)); - -/**@brief Set PPI channel enable register. - * - * @param[in] channel_enable_set_msk Mask containing the bits to set in the PPI CHEN register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_CHANNEL_ENABLE_SET, uint32_t, sd_ppi_channel_enable_set(uint32_t channel_enable_set_msk)); - -/**@brief Clear PPI channel enable register. - * - * @param[in] channel_enable_clr_msk Mask containing the bits to clear in the PPI CHEN register. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_CHANNEL_ENABLE_CLR, uint32_t, sd_ppi_channel_enable_clr(uint32_t channel_enable_clr_msk)); - -/**@brief Assign endpoints to a PPI channel. - * - * @param[in] channel_num Number of the PPI channel to assign. - * @param[in] evt_endpoint Event endpoint of the PPI channel. - * @param[in] task_endpoint Task endpoint of the PPI channel. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_CHANNEL The channel number is invalid. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_CHANNEL_ASSIGN, uint32_t, sd_ppi_channel_assign(uint8_t channel_num, const volatile void * evt_endpoint, const volatile void * task_endpoint)); - -/**@brief Task to enable a channel group. - * - * @param[in] group_num Number of the channel group. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_GROUP_TASK_ENABLE, uint32_t, sd_ppi_group_task_enable(uint8_t group_num)); - -/**@brief Task to disable a channel group. - * - * @param[in] group_num Number of the PPI group. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_GROUP_TASK_DISABLE, uint32_t, sd_ppi_group_task_disable(uint8_t group_num)); - -/**@brief Assign PPI channels to a channel group. - * - * @param[in] group_num Number of the channel group. - * @param[in] channel_msk Mask of the channels to assign to the group. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_GROUP_ASSIGN, uint32_t, sd_ppi_group_assign(uint8_t group_num, uint32_t channel_msk)); - -/**@brief Gets the PPI channels of a channel group. - * - * @param[in] group_num Number of the channel group. - * @param[out] p_channel_msk Mask of the channels assigned to the group. - * - * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_PPI_GROUP_GET, uint32_t, sd_ppi_group_get(uint8_t group_num, uint32_t * p_channel_msk)); - -/**@brief Configures the Radio Notification signal. - * - * @note - * - The notification signal latency depends on the interrupt priority settings of SWI used - * for notification signal. - * - To ensure that the radio notification signal behaves in a consistent way, the radio - * notifications must be configured when there is no protocol stack or other SoftDevice - * activity in progress. It is recommended that the radio notification signal is - * configured directly after the SoftDevice has been enabled. - * - In the period between the ACTIVE signal and the start of the Radio Event, the SoftDevice - * will interrupt the application to do Radio Event preparation. - * - Using the Radio Notification feature may limit the bandwidth, as the SoftDevice may have - * to shorten the connection events to have time for the Radio Notification signals. - * - * @param[in] type Type of notification signal, see @ref NRF_RADIO_NOTIFICATION_TYPES. - * @ref NRF_RADIO_NOTIFICATION_TYPE_NONE shall be used to turn off radio - * notification. Using @ref NRF_RADIO_NOTIFICATION_DISTANCE_NONE is - * recommended (but not required) to be used with - * @ref NRF_RADIO_NOTIFICATION_TYPE_NONE. - * - * @param[in] distance Distance between the notification signal and start of radio activity, see @ref NRF_RADIO_NOTIFICATION_DISTANCES. - * This parameter is ignored when @ref NRF_RADIO_NOTIFICATION_TYPE_NONE or - * @ref NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE is used. - * - * @retval ::NRF_ERROR_INVALID_PARAM The group number is invalid. - * @retval ::NRF_ERROR_INVALID_STATE A protocol stack or other SoftDevice is running. Stop all - * running activities and retry. - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_RADIO_NOTIFICATION_CFG_SET, uint32_t, sd_radio_notification_cfg_set(uint8_t type, uint8_t distance)); - -/**@brief Encrypts a block according to the specified parameters. - * - * 128-bit AES encryption. - * - * @note: - * - The application may set the SEVONPEND bit in the SCR to 1 to make the SoftDevice sleep while - * the ECB is running. The SEVONPEND bit should only be cleared (set to 0) from application - * main or low interrupt level. - * - * @param[in, out] p_ecb_data Pointer to the ECB parameters' struct (two input - * parameters and one output parameter). - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_ECB_BLOCK_ENCRYPT, uint32_t, sd_ecb_block_encrypt(nrf_ecb_hal_data_t * p_ecb_data)); - -/**@brief Encrypts multiple data blocks provided as an array of data block structures. - * - * @details: Performs 128-bit AES encryption on multiple data blocks - * - * @note: - * - The application may set the SEVONPEND bit in the SCR to 1 to make the SoftDevice sleep while - * the ECB is running. The SEVONPEND bit should only be cleared (set to 0) from application - * main or low interrupt level. - * - * @param[in] block_count Count of blocks in the p_data_blocks array. - * @param[in,out] p_data_blocks Pointer to the first entry in a contiguous array of - * @ref nrf_ecb_hal_data_block_t structures. - * - * @retval ::NRF_SUCCESS - */ -SVCALL(SD_ECB_BLOCKS_ENCRYPT, uint32_t, sd_ecb_blocks_encrypt(uint8_t block_count, nrf_ecb_hal_data_block_t * p_data_blocks)); - -/**@brief Gets any pending events generated by the SoC API. - * - * The application should keep calling this function to get events, until ::NRF_ERROR_NOT_FOUND is returned. - * - * @param[out] p_evt_id Set to one of the values in @ref NRF_SOC_EVTS, if any events are pending. - * - * @retval ::NRF_SUCCESS An event was pending. The event id is written in the p_evt_id parameter. - * @retval ::NRF_ERROR_NOT_FOUND No pending events. - */ -SVCALL(SD_EVT_GET, uint32_t, sd_evt_get(uint32_t * p_evt_id)); - -/**@brief Get the temperature measured on the chip - * - * This function will block until the temperature measurement is done. - * It takes around 50 us from call to return. - * - * @param[out] p_temp Result of temperature measurement. Die temperature in 0.25 degrees Celsius. - * - * @retval ::NRF_SUCCESS A temperature measurement was done, and the temperature was written to temp - */ -SVCALL(SD_TEMP_GET, uint32_t, sd_temp_get(int32_t * p_temp)); - -/**@brief Flash Write -* -* Commands to write a buffer to flash -* -* If the SoftDevice is enabled: -* This call initiates the flash access command, and its completion will be communicated to the -* application with exactly one of the following events: -* - @ref NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed. -* - @ref NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started. -* -* If the SoftDevice is not enabled no event will be generated, and this call will return @ref NRF_SUCCESS when the - * write has been completed -* -* @note -* - This call takes control over the radio and the CPU during flash erase and write to make sure that -* they will not interfere with the flash access. This means that all interrupts will be blocked -* for a predictable time (depending on the NVMC specification in nRF51 Series Reference Manual -* and the command parameters). -* - The data in the p_src buffer should not be modified before the @ref NRF_EVT_FLASH_OPERATION_SUCCESS -* or the @ref NRF_EVT_FLASH_OPERATION_ERROR have been received if the SoftDevice is enabled. -* -* -* @param[in] p_dst Pointer to start of flash location to be written. -* @param[in] p_src Pointer to buffer with data to be written. -* @param[in] size Number of 32-bit words to write. Maximum size is 256 32-bit words for nRF51 and 1024 for nRF52. -* -* @retval ::NRF_ERROR_INVALID_ADDR Tried to write to a non existing flash address, or p_dst or p_src was unaligned. -* @retval ::NRF_ERROR_BUSY The previous command has not yet completed. -* @retval ::NRF_ERROR_INVALID_LENGTH Size was 0, or higher than the maximum allowed size. -* @retval ::NRF_ERROR_FORBIDDEN Tried to write to or read from protected location. -* @retval ::NRF_SUCCESS The command was accepted. -*/ -SVCALL(SD_FLASH_WRITE, uint32_t, sd_flash_write(uint32_t * p_dst, uint32_t const * p_src, uint32_t size)); - - -/**@brief Flash Erase page -* -* Commands to erase a flash page -* If the SoftDevice is enabled: -* This call initiates the flash access command, and its completion will be communicated to the -* application with exactly one of the following events: -* - @ref NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed. -* - @ref NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started. -* -* If the SoftDevice is not enabled no event will be generated, and this call will return @ref NRF_SUCCESS when the -* erase has been completed -* -* @note -* - This call takes control over the radio and the CPU during flash erase and write to make sure that -* they will not interfere with the flash access. This means that all interrupts will be blocked -* for a predictable time (depending on the NVMC specification in nRF51 Series Reference Manual -* and the command parameters). -* -* -* @param[in] page_number Page number of the page to erase -* -* @retval ::NRF_ERROR_INTERNAL If a new session could not be opened due to an internal error. -* @retval ::NRF_ERROR_INVALID_ADDR Tried to erase to a non existing flash page. -* @retval ::NRF_ERROR_BUSY The previous command has not yet completed. -* @retval ::NRF_ERROR_FORBIDDEN Tried to erase a protected page. -* @retval ::NRF_SUCCESS The command was accepted. -*/ -SVCALL(SD_FLASH_PAGE_ERASE, uint32_t, sd_flash_page_erase(uint32_t page_number)); - - -/**@brief Flash Protection set - * - * Commands to set the flash protection configuration registers. - On nRF51 this sets the PROTENSETx registers of the MPU peripheral. - On nRF52 this sets the CONFIGx registers of the BPROT peripheral. - * - * @note To read the values read them directly. They are only write-protected. - * - * @param[in] block_cfg0 Value to be written to the configuration register. - * @param[in] block_cfg1 Value to be written to the configuration register. - * @param[in] block_cfg2 Value to be written to the configuration register (ignored on nRF51). - * @param[in] block_cfg3 Value to be written to the configuration register (ignored on nRF51). - * - * @retval ::NRF_ERROR_FORBIDDEN Tried to protect the SoftDevice. - * @retval ::NRF_SUCCESS Values successfully written to configuration registers. - */ -SVCALL(SD_FLASH_PROTECT, uint32_t, sd_flash_protect(uint32_t block_cfg0, uint32_t block_cfg1, uint32_t block_cfg2, uint32_t block_cfg3)); - -/**@brief Opens a session for radio timeslot requests. - * - * @note Only one session can be open at a time. - * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START) will be called when the radio timeslot - * starts. From this point the NRF_RADIO and NRF_TIMER0 peripherals can be freely accessed - * by the application. - * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_TIMER0) is called whenever the NRF_TIMER0 - * interrupt occurs. - * @note p_radio_signal_callback(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_RADIO) is called whenever the NRF_RADIO - * interrupt occurs. - * @note p_radio_signal_callback() will be called at ARM interrupt priority level 0. This - * implies that none of the sd_* API calls can be used from p_radio_signal_callback(). - * - * @param[in] p_radio_signal_callback The signal callback. - * - * @retval ::NRF_ERROR_INVALID_ADDR p_radio_signal_callback is an invalid function pointer. - * @retval ::NRF_ERROR_BUSY If session cannot be opened. - * @retval ::NRF_ERROR_INTERNAL If a new session could not be opened due to an internal error. - * @retval ::NRF_SUCCESS Otherwise. - */ - SVCALL(SD_RADIO_SESSION_OPEN, uint32_t, sd_radio_session_open(nrf_radio_signal_callback_t p_radio_signal_callback)); - -/**@brief Closes a session for radio timeslot requests. - * - * @note Any current radio timeslot will be finished before the session is closed. - * @note If a radio timeslot is scheduled when the session is closed, it will be canceled. - * @note The application cannot consider the session closed until the @ref NRF_EVT_RADIO_SESSION_CLOSED - * event is received. - * - * @retval ::NRF_ERROR_FORBIDDEN If session not opened. - * @retval ::NRF_ERROR_BUSY If session is currently being closed. - * @retval ::NRF_SUCCESS Otherwise. - */ - SVCALL(SD_RADIO_SESSION_CLOSE, uint32_t, sd_radio_session_close(void)); - -/**@brief Requests a radio timeslot. - * - * @note The request type is determined by p_request->request_type, and can be one of @ref NRF_RADIO_REQ_TYPE_EARLIEST - * and @ref NRF_RADIO_REQ_TYPE_NORMAL. The first request in a session must always be of type @ref NRF_RADIO_REQ_TYPE_EARLIEST. - * @note For a normal request (@ref NRF_RADIO_REQ_TYPE_NORMAL), the start time of a radio timeslot is specified by - * p_request->distance_us and is given relative to the start of the previous timeslot. - * @note A too small p_request->distance_us will lead to a @ref NRF_EVT_RADIO_BLOCKED event. - * @note Timeslots scheduled too close will lead to a @ref NRF_EVT_RADIO_BLOCKED event. - * @note See the SoftDevice Specification for more on radio timeslot scheduling, distances and lengths. - * @note If an opportunity for the first radio timeslot is not found before 100 ms after the call to this - * function, it is not scheduled, and instead a @ref NRF_EVT_RADIO_BLOCKED event is sent. - * The application may then try to schedule the first radio timeslot again. - * @note Successful requests will result in nrf_radio_signal_callback_t(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START). - * Unsuccessful requests will result in a @ref NRF_EVT_RADIO_BLOCKED event, see @ref NRF_SOC_EVTS. - * @note The jitter in the start time of the radio timeslots is +/- @ref NRF_RADIO_START_JITTER_US us. - * @note The nrf_radio_signal_callback_t(@ref NRF_RADIO_CALLBACK_SIGNAL_TYPE_START) call has a latency relative to the - * specified radio timeslot start, but this does not affect the actual start time of the timeslot. - * @note NRF_TIMER0 is reset at the start of the radio timeslot, and is clocked at 1MHz from the high frequency - * (16 MHz) clock source. If p_request->hfclk_force_xtal is true, the high frequency clock is - * guaranteed to be clocked from the external crystal. - * @note The SoftDevice will neither access the NRF_RADIO peripheral nor the NRF_TIMER0 peripheral - * during the radio timeslot. - * - * @param[in] p_request Pointer to the request parameters. - * - * @retval ::NRF_ERROR_FORBIDDEN If session not opened or the session is not IDLE. - * @retval ::NRF_ERROR_INVALID_ADDR If the p_request pointer is invalid. - * @retval ::NRF_ERROR_INVALID_PARAM If the parameters of p_request are not valid. - * @retval ::NRF_SUCCESS Otherwise. - */ - SVCALL(SD_RADIO_REQUEST, uint32_t, sd_radio_request(nrf_radio_request_t const * p_request)); - -/**@} */ - -#ifdef __cplusplus -} -#endif -#endif // NRF_SOC_H__ - -/**@} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_svc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_svc.h deleted file mode 100644 index 31ea671529f..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/headers/nrf_svc.h +++ /dev/null @@ -1,88 +0,0 @@ -/* - * Copyright (c) Nordic Semiconductor ASA - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * 4. This software must only be used in a processor manufactured by Nordic - * Semiconductor ASA, or in a processor manufactured by a third party that - * is used in combination with a processor manufactured by Nordic Semiconductor. - * - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef NRF_SVC__ -#define NRF_SVC__ - -#include "stdint.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef SVCALL_AS_NORMAL_FUNCTION -#define SVCALL(number, return_type, signature) return_type signature -#else - -#ifndef SVCALL -#if defined (__CC_ARM) -#define SVCALL(number, return_type, signature) return_type __svc(number) signature -#elif defined (__GNUC__) -#ifdef __cplusplus -#define GCC_CAST_CPP (uint16_t) -#else -#define GCC_CAST_CPP -#endif -#define SVCALL(number, return_type, signature) \ - _Pragma("GCC diagnostic push") \ - _Pragma("GCC diagnostic ignored \"-Wreturn-type\"") \ - __attribute__((naked)) \ - __attribute__((unused)) \ - static return_type signature \ - { \ - __asm( \ - "svc %0\n" \ - "bx r14" : : "I" (GCC_CAST_CPP number) : "r0" \ - ); \ - } \ - _Pragma("GCC diagnostic pop") - -#elif defined (__ICCARM__) -#define PRAGMA(x) _Pragma(#x) -#define SVCALL(number, return_type, signature) \ -PRAGMA(swi_number = (number)) \ - __swi return_type signature; -#else -#define SVCALL(number, return_type, signature) return_type signature -#endif -#endif // SVCALL - -#endif // SVCALL_AS_NORMAL_FUNCTION - -#ifdef __cplusplus -} -#endif -#endif // NRF_SVC__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/hex/s140_nrf52840_5.0.0-2.alpha_licence-agreement.txt b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/hex/s140_nrf52840_5.0.0-2.alpha_licence-agreement.txt deleted file mode 100644 index b8d26c9a84f..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/hex/s140_nrf52840_5.0.0-2.alpha_licence-agreement.txt +++ /dev/null @@ -1,96 +0,0 @@ -S110/S120/S130/S132/S140 license agreement - - -NORDIC SEMICONDUCTOR ASA SOFTDEVICE LICENSE AGREEMENT - -License Agreement for the Nordic Semiconductor ASA ("Nordic") S110, S120, S130, S132, and S140 Bluetooth SoftDevice software packages -("SoftDevice"). - -You ("You" "Licensee") must carefully and thoroughly read this License Agreement ("Agreement"), and accept to adhere to this Agreement before -downloading, installing and/or using any software or content in the SoftDevice provided herewith. - -YOU ACCEPT THIS LICENSE AGREEMENT BY (A) CLICKING ACCEPT OR AGREE TO THIS LICENSE AGREEMENT, WHERE THIS -OPTION IS MADE AVAILABLE TO YOU; OR (B) BY ACTUALLY USING THE SOFTDEVICE, IN THIS CASE YOU AGREE THAT THE USE OF -THE SOFTDEVICE CONSTITUTES ACCEPTANCE OF THE LICENSING AGREEMENT FROM THAT POINT ONWARDS. - -IF YOU DO NOT AGREE TO BE BOUND BY THE TERMS OF THIS AGREEMENT, THEN DO NOT DOWNLOAD, INSTALL/COMPLETE -INSTALLATION OF, OR IN ANY OTHER WAY MAKE USE OF THE SOFTDEVICE. - -1. Grant of License -Subject to the terms in this Agreement Nordic grants Licensee a limited, non-exclusive, non-transferable, non-sub licensable, revocable license -("License"): (a) to use the SoftDevice solely in connection with a Nordic integrated circuit, and (b) to distribute the SoftDevice solely as integrated -in Licensee Product. Licensee shall not use the SoftDevice for any purpose other than specifically authorized herein. It is a material breach of this -agreement to use or modify the SoftDevice for use on any wireless connectivity integrated circuit other than a Nordic integrated circuit. - -2. Title -Nordic retains full rights, title, and ownership to the SoftDevice and any and all patents, copyrights, trade secrets, trade names, trademarks, and -other intellectual property rights in and to the SoftDevice. - -3. No Modifications or Reverse Engineering -Licensee shall not, modify, reverse engineer, disassemble, decompile or otherwise attempt to discover the source code of any non-source code -parts of the SoftDevice including, but not limited to pre-compiled hex files, binaries and object code. - -4. Distribution Restrictions -Except as set forward in Section 1 above, the Licensee may not disclose or distribute any or all parts of the SoftDevice to any third party. -Licensee agrees to provide reasonable security precautions to prevent unauthorized access to or use of the SoftDevice as proscribed herein. -Licensee also agrees that use of and access to the SoftDevice will be strictly limited to the employees and subcontractors of the Licensee -necessary for the performance of development, verification and production tasks under this Agreement. The Licensee is responsible for making -such employees and subcontractors comply with the obligations concerning use and non-disclosure of the SoftDevice. - -5. No Other Rights -Licensee shall use the SoftDevice only in compliance with this Agreement and shall refrain from using the SoftDevice in any way that may be -contrary to this Agreement. - -6. Fees -Nordic grants the License to the Licensee free of charge provided that the Licensee undertakes the obligations in the Agreement and warrants to -comply with the Agreement. - -7. DISCLAIMER OF WARRANTY -THE SOFTDEVICE IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND EXPRESS OR IMPLIED AND NEITHER NORDIC, ITS -LICENSORS OR AFFILIATES NOR THE COPYRIGHT HOLDERS MAKE ANY REPRESENTATIONS OR WARRANTIES, EXPRESS OR -IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR -THAT THE SOFTDEVICE WILL NOT INFRINGE ANY THIRD PARTY PATENTS, COPYRIGHTS, TRADEMARKS OR OTHER RIGHTS. THERE -IS NO WARRANTY BY NORDIC OR BY ANY OTHER PARTY THAT THE FUNCTIONS CONTAINED IN THE SOFTDEVICE WILL MEET THE -REQUIREMENTS OF LICENSEE OR THAT THE OPERATION OF THE SOFTDEVICE WILL BE UNINTERRUPTED OR ERROR-FREE. -LICENSEE ASSUMES ALL RESPONSIBILITY AND RISK FOR THE SELECTION OF THE SOFTDEVICE TO ACHIEVE LICENSEE’S -INTENDED RESULTS AND FOR THE INSTALLATION, USE AND RESULTS OBTAINED FROM IT. - - -8. No Support -Nordic is not obligated to furnish or make available to Licensee any further information, software, technical information, know-how, show-how, -bug-fixes or support. Nordic reserves the right to make changes to the SoftDevice without further notice. - -9. Limitation of Liability -In no event shall Nordic, its employees or suppliers, licensors or affiliates be liable for any lost profits, revenue, sales, data or costs of -procurement of substitute goods or services, property damage, personal injury, interruption of business, loss of business information or for any -special, direct, indirect, incidental, economic, punitive, special or consequential damages, however caused and whether arising under contract, -tort, negligence, or other theory of liability arising out of the use of or inability to use the SoftDevice, even if Nordic or its employees or suppliers, -licensors or affiliates are advised of the possibility of such damages. Because some countries/states/jurisdictions do not allow the exclusion or -limitation of liability, but may allow liability to be limited, in such cases, Nordic, its employees or licensors or affiliates’ liability shall be limited to -USD 50. - -10. Breach of Contract -Upon a breach of contract by the Licensee, Nordic and its licensor are entitled to damages in respect of any direct loss which can be reasonably -attributed to the breach by the Licensee. If the Licensee has acted with gross negligence or willful misconduct, the Licensee shall cover both -direct and indirect costs for Nordic and its licensors. - -11. Indemnity -Licensee undertakes to indemnify, hold harmless and defend Nordic and its directors, officers, affiliates, shareholders, licensors, employees and -agents from and against any claims or lawsuits, including attorney's fees, that arise or result of the Licensee’s execution of the License and which -is not due to causes for which Nordic is responsible. - -12. Governing Law -This Agreement shall be construed according to the laws of Norway, and hereby submits to the exclusive jurisdiction of the Oslo tingrett. - -13. Assignment -Licensee shall not assign this Agreement or any rights or obligations hereunder without the prior written consent of Nordic. - -14. Termination -Without prejudice to any other rights, Nordic may cancel this Agreement if Licensee does not abide by the terms and conditions of this -Agreement. Upon termination Licensee must promptly cease the use of the License and destroy all copies of the Licensed Technology and any -other material provided by Nordic or its affiliate, or produced by the Licensee in connection with the Agreement or the Licensed Technology. - -15. Third party beneficiaries -Nordic’s licensors are intended third party beneficiaries under this Agreement. - - diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/hex/s140_nrf52840_5.0.0-2.alpha_softdevice.hex b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/hex/s140_nrf52840_5.0.0-2.alpha_softdevice.hex deleted file mode 100644 index 85c4719e3ab..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/hex/s140_nrf52840_5.0.0-2.alpha_softdevice.hex +++ /dev/null @@ -1,4107 +0,0 @@ -:201000009012002091090200452F0000FF080200452F0000452F0000452F00000000000099 -:20102000000000000000000000000000E9090200452F000000000000452F0000452F000060 -:20104000510A0200570A0200452F0000452F0000452F0000452F0000452F0000452F000018 -:201060005D0A0200452F0000452F0000630A0200452F0000690A02006F0A0200750A0200CB -:20108000452F0000452F0000452F0000452F0000452F0000452F0000452F0000452F0000B0 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-:2010400011FC01001BFC010049FC01007FFC01009FFC0100ADFC0100BBFC0100CBFC0100E2 -:20106000E3FC0100FBFC010011FD010000000000039E0000599E00006F9E0000A901020038 -:2010800079F701003FF801005D0502008D050200C5050200292701000D2C01001C050040F7 -:2010A0002005004000100200C810020008000020B001000044110000F8100200B8010020CE -:2010C000D81000008011000001190549101300203601000100743720FB349B5F80041B80A1 -:1810E0000010022501540B0020337F0106A45C0C0020290248100000D9 -:00000001FF diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/mbed_lib.json b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/mbed_lib.json deleted file mode 100644 index 7189ece9f9e..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/TARGET_SOFTDEVICE_S140_OTA/mbed_lib.json +++ /dev/null @@ -1,40 +0,0 @@ -{ - "name": "softdevice", - "macros": [ - "SOFTDEVICE_PRESENT=1", - "S140", - "BLE_STACK_SUPPORT_REQD", - "NRF_SDH_CLOCK_LF_XTAL_ACCURACY=7", - "NRF_SD_BLE_API_VERSION=5", - "NRF_SDH_ENABLED=1", - "NRF_SDH_BLE_ENABLED=1", - "PEER_MANAGER_ENABLED=1", - "NRF_SDH_BLE_GATT_MAX_MTU_SIZE=23", - "NRF_SDH_BLE_OBSERVER_PRIO_LEVELS=4", - "NRF_SDH_BLE_GAP_EVENT_LENGTH=3", - "BLE_ADV_BLE_OBSERVER_PRIO=1", - "BLE_CONN_STATE_BLE_OBSERVER_PRIO=0", - "BLE_CONN_PARAMS_BLE_OBSERVER_PRIO=1", - "NRF_BLE_GATT_BLE_OBSERVER_PRIO=1", - "NRF_SDH_DISPATCH_MODEL=2", - "NRF_SDH_SOC_ENABLED=1", - "NRF_SDH_STACK_OBSERVER_PRIO_LEVELS=2", - "NRF_SDH_STATE_OBSERVER_PRIO_LEVELS=2", - "NRF_SDH_SOC_OBSERVER_PRIO_LEVELS=2", - "NRF_SDH_REQ_OBSERVER_PRIO_LEVELS=2", - "NRF_SDH_BLE_STACK_OBSERVER_PRIO=0", - "NRF_SDH_SOC_STACK_OBSERVER_PRIO=0", - "FDS_BACKEND=2", - "SWI_DISABLE1", - "SWI_DISABLE2", - "SWI_DISABLE3", - "SWI_DISABLE4", - "SWI_DISABLE5" - ], - "target_overrides": { - "*": { - "target.features_add": ["BLE"], - "target.bootloader_img": "hex/s140_nrf52840_5.0.0-2.alpha_softdevice.hex" - } - } -} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/README.md b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/README.md deleted file mode 100644 index 8217ae3c0fb..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/README.md +++ /dev/null @@ -1,9 +0,0 @@ -# Folder origin - -components/boards - -# Modifications - -Removed: - * d52_starterkit.h - * n5_starterkit.h diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/arduino_primo.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/arduino_primo.h deleted file mode 100644 index 00c0390977b..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/arduino_primo.h +++ /dev/null @@ -1,119 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef ARDUINO_PRIMO_H -#define ARDUINO_PRIMO_H - -#ifdef __cplusplus -extern "C" { -#endif - -// LEDs definitions -#define LEDS_NUMBER 1 - -#define LED_1 20 - -#define LEDS_ACTIVE_STATE 0 - -#define LEDS_LIST { LED_1} - -#define BSP_LED_0 LED_1 - -#define LEDS_INV_MASK 0 - -#define BUTTONS_NUMBER 1 - -#define BUTTON_START 7 -#define BUTTON_1 7 -#define BUTTON_STOP 7 -#define BUTTON_PULL NRF_GPIO_PIN_PULLUP - -#define BUTTONS_ACTIVE_STATE 0 - -#define BUTTONS_LIST { BUTTON_1 } - -#define BSP_BUTTON_0 BUTTON_1 - -#define RX_PIN_NUMBER 11 -#define TX_PIN_NUMBER 12 -#define CTS_PIN_NUMBER UART_PIN_DISCONNECTED -#define RTS_PIN_NUMBER UART_PIN_DISCONNECTED -#define HWFC false - -#define BUZZER_PIN_NUMBER 8 - -// Arduino board mappings -#define ARDUINO_SCL_PIN 27 // SCL signal pin -#define ARDUINO_SDA_PIN 26 // SDA signal pin -#define ARDUINO_AREF_PIN 2 // Aref pin -#define ARDUINO_13_PIN 25 // Digital pin 13 -#define ARDUINO_12_PIN 24 // Digital pin 12 -#define ARDUINO_11_PIN 23 // Digital pin 11 -#define ARDUINO_10_PIN 22 // Digital pin 10 -#define ARDUINO_9_PIN 20 // Digital pin 9 -#define ARDUINO_8_PIN 19 // Digital pin 8 - -#define ARDUINO_7_PIN 18 // Digital pin 7 -#define ARDUINO_6_PIN 17 // Digital pin 6 -#define ARDUINO_5_PIN 16 // Digital pin 5 -#define ARDUINO_4_PIN 15 // Digital pin 4 -#define ARDUINO_3_PIN 14 // Digital pin 3 -#define ARDUINO_2_PIN 13 // Digital pin 2 -#define ARDUINO_1_PIN 12 // Digital pin 1 -#define ARDUINO_0_PIN 11 // Digital pin 0 - -#define ARDUINO_A0_PIN 3 // Analog channel 0 -#define ARDUINO_A1_PIN 4 // Analog channel 1 -#define ARDUINO_A2_PIN 28 // Analog channel 2 -#define ARDUINO_A3_PIN 29 // Analog channel 3 -#define ARDUINO_A4_PIN 30 // Analog channel 4 -#define ARDUINO_A5_PIN 31 // Analog channel 5 - -// Low frequency clock source to be used by the SoftDevice -#define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_XTAL, \ - .rc_ctiv = 0, \ - .rc_temp_ctiv = 0, \ - .xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM} - - -#ifdef __cplusplus -} -#endif - -#endif // ARDUINO_PRIMO_H diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/boards.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/boards.c deleted file mode 100644 index 511a14e84c6..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/boards.c +++ /dev/null @@ -1,165 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "boards.h" -#include -#include - -#if LEDS_NUMBER > 0 -static const uint8_t m_board_led_list[LEDS_NUMBER] = LEDS_LIST; -#endif - -#if BUTTONS_NUMBER > 0 -static const uint8_t m_board_btn_list[BUTTONS_NUMBER] = BUTTONS_LIST; -#endif - -#if LEDS_NUMBER > 0 -bool bsp_board_led_state_get(uint32_t led_idx) -{ - ASSERT(led_idx < LEDS_NUMBER); - bool pin_set = nrf_gpio_pin_out_read(m_board_led_list[led_idx]) ? true : false; - return (pin_set == (LEDS_ACTIVE_STATE ? true : false)); -} - -void bsp_board_led_on(uint32_t led_idx) -{ - ASSERT(led_idx < LEDS_NUMBER); - nrf_gpio_pin_write(m_board_led_list[led_idx], LEDS_ACTIVE_STATE ? 1 : 0); -} - -void bsp_board_led_off(uint32_t led_idx) -{ - ASSERT(led_idx < LEDS_NUMBER); - nrf_gpio_pin_write(m_board_led_list[led_idx], LEDS_ACTIVE_STATE ? 0 : 1); -} - -void bsp_board_leds_off(void) -{ - uint32_t i; - for (i = 0; i < LEDS_NUMBER; ++i) - { - bsp_board_led_off(i); - } -} - -void bsp_board_leds_on(void) -{ - uint32_t i; - for (i = 0; i < LEDS_NUMBER; ++i) - { - bsp_board_led_on(i); - } -} - -void bsp_board_led_invert(uint32_t led_idx) -{ - ASSERT(led_idx < LEDS_NUMBER); - nrf_gpio_pin_toggle(m_board_led_list[led_idx]); -} - -void bsp_board_leds_init(void) -{ - uint32_t i; - for (i = 0; i < LEDS_NUMBER; ++i) - { - nrf_gpio_cfg_output(m_board_led_list[i]); - } - bsp_board_leds_off(); -} - -uint32_t bsp_board_led_idx_to_pin(uint32_t led_idx) -{ - ASSERT(led_idx < LEDS_NUMBER); - return m_board_led_list[led_idx]; -} - -uint32_t bsp_board_pin_to_led_idx(uint32_t pin_number) -{ - uint32_t ret = 0xFFFFFFFF; - uint32_t i; - for (i = 0; i < LEDS_NUMBER; ++i) - { - if (m_board_led_list[i] == pin_number) - { - ret = i; - break; - } - } - return ret; -} -#endif //LEDS_NUMBER > 0 - -#if BUTTONS_NUMBER > 0 -bool bsp_board_button_state_get(uint32_t button_idx) -{ - ASSERT(button_idx < BUTTONS_NUMBER); - bool pin_set = nrf_gpio_pin_read(m_board_btn_list[button_idx]) ? true : false; - return (pin_set == (BUTTONS_ACTIVE_STATE ? true : false)); -} - -void bsp_board_buttons_init(void) -{ - uint32_t i; - for (i = 0; i < BUTTONS_NUMBER; ++i) - { - nrf_gpio_cfg_input(m_board_btn_list[i], BUTTON_PULL); - } -} - -uint32_t bsp_board_pin_to_button_idx(uint32_t pin_number) -{ - uint32_t i; - uint32_t ret = 0xFFFFFFFF; - for (i = 0; i < BUTTONS_NUMBER; ++i) - { - if (m_board_btn_list[i] == pin_number) - { - ret = i; - break; - } - } - return ret; -} - -uint32_t bsp_board_button_idx_to_pin(uint32_t button_idx) -{ - ASSERT(button_idx < BUTTONS_NUMBER); - return m_board_btn_list[button_idx]; -} -#endif //BUTTONS_NUMBER > 0 diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/boards.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/boards.h deleted file mode 100644 index 87fca8023b6..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/boards.h +++ /dev/null @@ -1,319 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef BOARDS_H -#define BOARDS_H - -#include "nrf_gpio.h" - -#if defined(BOARD_NRF6310) - #include "nrf6310.h" -#elif defined(BOARD_PCA10000) - #include "pca10000.h" -#elif defined(BOARD_PCA10001) - #include "pca10001.h" -#elif defined(BOARD_PCA10002) - #include "pca10000.h" -#elif defined(BOARD_PCA10003) - #include "pca10003.h" -#elif defined(BOARD_PCA20006) - #include "pca20006.h" -#elif defined(BOARD_PCA10028) - #include "pca10028.h" -#elif defined(BOARD_PCA10031) - #include "pca10031.h" -#elif defined(BOARD_PCA10036) - #include "pca10036.h" -#elif defined(BOARD_PCA10040) - #include "pca10040.h" -#elif defined(BOARD_PCA10056) - #include "pca10056.h" -#elif defined(BOARD_WT51822) - #include "wt51822.h" -#elif defined(BOARD_N5DK1) - #include "n5_starterkit.h" -#elif defined (BOARD_D52DK1) - #include "d52_starterkit.h" -#elif defined (BOARD_ARDUINO_PRIMO) - #include "arduino_primo.h" -#elif defined(BOARD_CUSTOM) - #include "custom_board.h" -#else -#error "Board is not defined" - -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * Function for returning the state of an LED. - * - * @param led_idx LED index (starting from 0), as defined in the board-specific header. - * - * @return True if the LED is turned on. - */ -bool bsp_board_led_state_get(uint32_t led_idx); - -/** - * Function for turning on an LED. - * - * @param led_idx LED index (starting from 0), as defined in the board-specific header. - */ -void bsp_board_led_on(uint32_t led_idx); - -/** - * Function for turning off an LED. - * - * @param led_idx LED index (starting from 0), as defined in the board-specific header. - */ -void bsp_board_led_off(uint32_t led_idx); - -/** - * Function for inverting the state of an LED. - * - * @param led_idx LED index (starting from 0), as defined in the board-specific header. - */ -void bsp_board_led_invert(uint32_t led_idx); -/** - * Function for turning off all LEDs. - */ -void bsp_board_leds_off(void); - -/** - * Function for turning on all LEDs. - */ -void bsp_board_leds_on(void); - -/** - * Function for initializing LEDs. - */ -void bsp_board_leds_init(void); - -/** - * Function for converting pin number to LED index. - * - * @param pin_number Pin number. - * - * @return LED index of the given pin or 0xFFFFFFFF if invalid pin provided. - */ -uint32_t bsp_board_pin_to_led_idx(uint32_t pin_number); - -/** - * Function for converting LED index to pin number. - * - * @param led_idx LED index. - * - * @return Pin number. - */ -uint32_t bsp_board_led_idx_to_pin(uint32_t led_idx); - -/** - * Function for returning the state of a button. - * - * @param button_idx Button index (starting from 0), as defined in the board-specific header. - * - * @return True if the button is pressed. - */ -bool bsp_board_button_state_get(uint32_t button_idx); - -/** - * Function for initializing buttons. - */ -void bsp_board_buttons_init(void); - -/** - * Function for converting pin number to button index. - * - * @param pin_number Pin number. - * - * @return Button index of the given pin or 0xFFFFFFFF if invalid pin provided. - */ -uint32_t bsp_board_pin_to_button_idx(uint32_t pin_number); - - -/** - * Function for converting button index to pin number. - * - * @param button_idx Button index. - * - * @return Pin number. - */ -uint32_t bsp_board_button_idx_to_pin(uint32_t button_idx); - -#define BSP_BOARD_LED_0 0 -#define BSP_BOARD_LED_1 1 -#define BSP_BOARD_LED_2 2 -#define BSP_BOARD_LED_3 3 -#define BSP_BOARD_LED_4 4 -#define BSP_BOARD_LED_5 5 -#define BSP_BOARD_LED_6 6 -#define BSP_BOARD_LED_7 7 - -#ifdef BSP_LED_0 -#define BSP_LED_0_MASK (1<OUTSET = (leds_mask) & (LEDS_MASK & LEDS_INV_MASK); \ - NRF_GPIO->OUTCLR = (leds_mask) & (LEDS_MASK & ~LEDS_INV_MASK); } while (0) - -#define LEDS_ON(leds_mask) do { ASSERT(sizeof(leds_mask) == 4); \ - NRF_GPIO->OUTCLR = (leds_mask) & (LEDS_MASK & LEDS_INV_MASK); \ - NRF_GPIO->OUTSET = (leds_mask) & (LEDS_MASK & ~LEDS_INV_MASK); } while (0) - -#define LED_IS_ON(leds_mask) ((leds_mask) & (NRF_GPIO->OUT ^ LEDS_INV_MASK) ) - -#define LEDS_INVERT(leds_mask) do { uint32_t gpio_state = NRF_GPIO->OUT; \ - ASSERT(sizeof(leds_mask) == 4); \ - NRF_GPIO->OUTSET = ((leds_mask) & ~gpio_state); \ - NRF_GPIO->OUTCLR = ((leds_mask) & gpio_state); } while (0) - -#define LEDS_CONFIGURE(leds_mask) do { uint32_t pin; \ - ASSERT(sizeof(leds_mask) == 4); \ - for (pin = 0; pin < 32; pin++) \ - if ( (leds_mask) & (1 << pin) ) \ - nrf_gpio_cfg_output(pin); } while (0) - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/nrf6310.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/nrf6310.h deleted file mode 100644 index 86698ecfa5b..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/nrf6310.h +++ /dev/null @@ -1,186 +0,0 @@ -/** - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF6310_H__ -#define NRF6310_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#define LED_START 8 -#define LED_0 8 -#define LED_1 9 -#define LED_2 10 -#define LED_3 11 -#define LED_4 12 -#define LED_5 13 -#define LED_6 14 -#define LED_7 15 -#define LED_STOP 15 - -#define BSP_LED_0 LED_0 -#define BSP_LED_1 LED_1 -#define BSP_LED_2 LED_2 -#define BSP_LED_3 LED_3 -#define BSP_LED_4 LED_4 -#define BSP_LED_5 LED_5 -#define BSP_LED_6 LED_6 -#define BSP_LED_7 LED_7 - -#define LEDS_ACTIVE_STATE 1 - -#define BUTTON_START 0 -#define BUTTON_0 0 -#define BUTTON_1 1 -#define BUTTON_2 2 -#define BUTTON_3 3 -#define BUTTON_4 4 -#define BUTTON_5 5 -#define BUTTON_6 6 -#define BUTTON_7 7 -#define BUTTON_STOP 7 -#define BUTTON_PULL NRF_GPIO_PIN_NOPULL - -#define BSP_BUTTON_0 BUTTON_0 -#define BSP_BUTTON_1 BUTTON_1 -#define BSP_BUTTON_2 BUTTON_2 -#define BSP_BUTTON_3 BUTTON_3 -#define BSP_BUTTON_4 BUTTON_4 -#define BSP_BUTTON_5 BUTTON_5 -#define BSP_BUTTON_6 BUTTON_6 -#define BSP_BUTTON_7 BUTTON_7 - -#define BUTTONS_ACTIVE_STATE 1 - -#define BUTTONS_LIST {BUTTON_0, BUTTON_1, BUTTON_2, BUTTON_3, BUTTON_4, BUTTON_5, BUTTON_6, BUTTON_7} -#define LEDS_LIST {LED_0, LED_1, LED_2, LED_3, LED_4, LED_5, LED_6, LED_7} - -#define LEDS_INV_MASK 0x00000000 - -#define BUTTONS_NUMBER 8 -#define LEDS_NUMBER 8 - -#define RX_PIN_NUMBER 16 // UART RX pin number. -#define TX_PIN_NUMBER 17 // UART TX pin number. -#define CTS_PIN_NUMBER 18 // UART Clear To Send pin number. Not used if HWFC is set to false. -#define RTS_PIN_NUMBER 19 // UART Request To Send pin number. Not used if HWFC is set to false. -#define HWFC false // UART hardware flow control. - -#define SPIS_MISO_PIN 20 // SPI MISO signal. -#define SPIS_CSN_PIN 21 // SPI CSN signal. -#define SPIS_MOSI_PIN 22 // SPI MOSI signal. -#define SPIS_SCK_PIN 23 // SPI SCK signal. - -#define SPIM0_SCK_PIN 23u /**< SPI clock GPIO pin number. */ -#define SPIM0_MOSI_PIN 20u /**< SPI Master Out Slave In GPIO pin number. */ -#define SPIM0_MISO_PIN 22u /**< SPI Master In Slave Out GPIO pin number. */ -#define SPIM0_SS_PIN 21u /**< SPI Slave Select GPIO pin number. */ - -#define SPIM1_SCK_PIN 16u /**< SPI clock GPIO pin number. */ -#define SPIM1_MOSI_PIN 18u /**< SPI Master Out Slave In GPIO pin number. */ -#define SPIM1_MISO_PIN 17u /**< SPI Master In Slave Out GPIO pin number. */ -#define SPIM1_SS_PIN 19u /**< SPI Slave Select GPIO pin number. */ - -// serialization APPLICATION board -#define SER_APP_RX_PIN 16 // UART RX pin number. -#define SER_APP_TX_PIN 17 // UART TX pin number. -#define SER_APP_CTS_PIN 18 // UART Clear To Send pin number. -#define SER_APP_RTS_PIN 19 // UART Request To Send pin number. - -#if 0 -#define SER_APP_SPIM0_SCK_PIN 20 // SPI clock GPIO pin number. -#define SER_APP_SPIM0_MOSI_PIN 17 // SPI Master Out Slave In GPIO pin number -#define SER_APP_SPIM0_MISO_PIN 16 // SPI Master In Slave Out GPIO pin number -#define SER_APP_SPIM0_SS_PIN 21 // SPI Slave Select GPIO pin number -#define SER_APP_SPIM0_RDY_PIN 19 // SPI READY GPIO pin number -#define SER_APP_SPIM0_REQ_PIN 18 // SPI REQUEST GPIO pin number -#else -#define SER_APP_SPIM0_SCK_PIN 23 // SPI clock GPIO pin number. -#define SER_APP_SPIM0_MOSI_PIN 20 // SPI Master Out Slave In GPIO pin number -#define SER_APP_SPIM0_MISO_PIN 22 // SPI Master In Slave Out GPIO pin number -#define SER_APP_SPIM0_SS_PIN 21 // SPI Slave Select GPIO pin number -#define SER_APP_SPIM0_RDY_PIN 29 // SPI READY GPIO pin number -#define SER_APP_SPIM0_REQ_PIN 28 // SPI REQUEST GPIO pin number - -#endif - -// serialization CONNECTIVITY board -#if 0 -#define SER_CON_RX_PIN 17 // UART RX pin number. -#define SER_CON_TX_PIN 16 // UART TX pin number. -#define SER_CON_CTS_PIN 19 // UART Clear To Send pin number. Not used if HWFC is set to false. -#define SER_CON_RTS_PIN 18 // UART Request To Send pin number. Not used if HWFC is set to false. -#else -#define SER_CON_RX_PIN 16 // UART RX pin number. -#define SER_CON_TX_PIN 17 // UART TX pin number. -#define SER_CON_CTS_PIN 18 // UART Clear To Send pin number. Not used if HWFC is set to false. -#define SER_CON_RTS_PIN 19 // UART Request To Send pin number. Not used if HWFC is set to false. -#endif - -#if 0 -#define SER_CON_SPIS_SCK_PIN 20 // SPI SCK signal. -#define SER_CON_SPIS_MISO_PIN 16 // SPI MISO signal. -#define SER_CON_SPIS_MOSI_PIN 17 // SPI MOSI signal. -#define SER_CON_SPIS_CSN_PIN 21 // SPI CSN signal. -#define SER_CON_SPIS_RDY_PIN 19 // SPI READY GPIO pin number. -#define SER_CON_SPIS_REQ_PIN 18 // SPI REQUEST GPIO pin number. -#else -#define SER_CON_SPIS_SCK_PIN 23 // SPI SCK signal. -#define SER_CON_SPIS_MOSI_PIN 22 // SPI MOSI signal. -#define SER_CON_SPIS_MISO_PIN 20 // SPI MISO signal. -#define SER_CON_SPIS_CSN_PIN 21 // SPI CSN signal. -#define SER_CON_SPIS_RDY_PIN 29 // SPI READY GPIO pin number. -#define SER_CON_SPIS_REQ_PIN 28 // SPI REQUEST GPIO pin number. -#endif - -#define SER_CONN_ASSERT_LED_PIN LED_2 - -// Low frequency clock source to be used by the SoftDevice -#define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_XTAL, \ - .rc_ctiv = 0, \ - .rc_temp_ctiv = 0, \ - .xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM} - - -#ifdef __cplusplus -} -#endif - -#endif // NRF6310_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/pca10000.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/pca10000.h deleted file mode 100644 index eb5ea139f86..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/pca10000.h +++ /dev/null @@ -1,103 +0,0 @@ -/** - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef PCA10000_H -#define PCA10000_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include "nrf_gpio.h" - -// Definitions for PCA10000 v2.0.0 or higher -#if 1 - -#define LEDS_NUMBER 3 - -// there is RGB LED on this board -#define LED_RGB_RED 21 -#define LED_RGB_GREEN 22 -#define LED_RGB_BLUE 23 - -#define LED_START LED_RGB_RED -#define BSP_LED_0 LED_RGB_RED -#define BSP_LED_1 LED_RGB_GREEN -#define BSP_LED_2 LED_RGB_BLUE -#define LED_STOP LED_RGB_BLUE - -#define LEDS_ACTIVE_STATE 0 - -#define BUTTONS_LIST {} -#define LEDS_LIST { LED_RGB_RED, LED_RGB_GREEN, LED_RGB_BLUE } - -#define LEDS_INV_MASK LEDS_MASK - -// there are no buttons on this board -#define BUTTONS_NUMBER 0 - -// UART pins connected to J-Link -#define RX_PIN_NUMBER 11 -#define TX_PIN_NUMBER 9 -#define CTS_PIN_NUMBER 10 -#define RTS_PIN_NUMBER 8 -#define HWFC true - -// Definitions for PCA10000 v1.0 -#else - -#define RX_PIN_NUMBER 3 -#define TX_PIN_NUMBER 1 -#define CTS_PIN_NUMBER 2 -#define RTS_PIN_NUMBER 0 -#define HWFC true - -#endif - -// Low frequency clock source to be used by the SoftDevice -#define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_XTAL, \ - .rc_ctiv = 0, \ - .rc_temp_ctiv = 0, \ - .xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM} - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/pca10001.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/pca10001.h deleted file mode 100644 index 58a9c05e8db..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/pca10001.h +++ /dev/null @@ -1,170 +0,0 @@ -/** - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef PCA10001_H -#define PCA10001_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include "nrf_gpio.h" - -#define LED_START 18 -#define LED_0 18 -#define LED_1 19 -#define LED_STOP 19 - -#define LEDS_ACTIVE_STATE 1 - -#define BSP_LED_0 LED_0 -#define BSP_LED_1 LED_1 - -#define LEDS_INV_MASK 0x00000000 - -#define BUTTON_START 16 -#define BUTTON_0 16 -#define BUTTON_1 17 -#define BUTTON_STOP 17 -#define BUTTON_PULL NRF_GPIO_PIN_PULLUP - -#define BUTTONS_ACTIVE_STATE 0 - -#define BSP_BUTTON_0 BUTTON_0 -#define BSP_BUTTON_1 BUTTON_1 - -#define BUTTONS_NUMBER 2 -#define LEDS_NUMBER 2 - -#define BUTTONS_LIST { BUTTON_0, BUTTON_1 } -#define LEDS_LIST { LED_0, LED_1 } - -#define RX_PIN_NUMBER 11 -#define TX_PIN_NUMBER 9 -#define CTS_PIN_NUMBER 10 -#define RTS_PIN_NUMBER 8 -#define HWFC true - -#define SPIS_MISO_PIN 20 // SPI MISO signal. -#define SPIS_CSN_PIN 21 // SPI CSN signal. -#define SPIS_MOSI_PIN 22 // SPI MOSI signal. -#define SPIS_SCK_PIN 23 // SPI SCK signal. - -#define SPIM0_SCK_PIN 23u /**< SPI clock GPIO pin number. */ -#define SPIM0_MOSI_PIN 20u /**< SPI Master Out Slave In GPIO pin number. */ -#define SPIM0_MISO_PIN 22u /**< SPI Master In Slave Out GPIO pin number. */ -#define SPIM0_SS_PIN 21u /**< SPI Slave Select GPIO pin number. */ - -#define SPIM1_SCK_PIN 29u /**< SPI clock GPIO pin number. */ -#define SPIM1_MOSI_PIN 24u /**< SPI Master Out Slave In GPIO pin number. */ -#define SPIM1_MISO_PIN 28u /**< SPI Master In Slave Out GPIO pin number. */ -#define SPIM1_SS_PIN 25u /**< SPI Slave Select GPIO pin number. */ - -// serialization APPLICATION board - -// UART -// this configuration works with the SPI wires setup -#define SER_APP_RX_PIN 20 // UART RX pin number. -#define SER_APP_TX_PIN 22 // UART TX pin number. -#define SER_APP_CTS_PIN 23 // UART Clear To Send pin number. -#define SER_APP_RTS_PIN 21 // UART Request To Send pin number. - -// SPI -#if 0 -#define SER_APP_SPIM0_SCK_PIN 20 // SPI clock GPIO pin number. -#define SER_APP_SPIM0_MOSI_PIN 17 // SPI Master Out Slave In GPIO pin number -#define SER_APP_SPIM0_MISO_PIN 16 // SPI Master In Slave Out GPIO pin number -#define SER_APP_SPIM0_SS_PIN 21 // SPI Slave Select GPIO pin number -#define SER_APP_SPIM0_RDY_PIN 19 // SPI READY GPIO pin number -#define SER_APP_SPIM0_REQ_PIN 18 // SPI REQUEST GPIO pin number -#else -#define SER_APP_SPIM0_SCK_PIN 23 // SPI clock GPIO pin number. -#define SER_APP_SPIM0_MOSI_PIN 20 // SPI Master Out Slave In GPIO pin number -#define SER_APP_SPIM0_MISO_PIN 22 // SPI Master In Slave Out GPIO pin number -#define SER_APP_SPIM0_SS_PIN 21 // SPI Slave Select GPIO pin number -#define SER_APP_SPIM0_RDY_PIN 25 // SPI READY GPIO pin number -#define SER_APP_SPIM0_REQ_PIN 24 // SPI REQUEST GPIO pin number -#endif - -// serialization CONNECTIVITY board - -// UART -#if 0 -#define SER_CON_RX_PIN 22 // UART RX pin number. -#define SER_CON_TX_PIN 20 // UART TX pin number. -#define SER_CON_CTS_PIN 21 // UART Clear To Send pin number. Not used if HWFC is set to false. -#define SER_CON_RTS_PIN 23 // UART Request To Send pin number. Not used if HWFC is set to false. -#else -// this configuration works with the SPI wires setup -#define SER_CON_RX_PIN 20 // UART RX pin number. -#define SER_CON_TX_PIN 22 // UART TX pin number. -#define SER_CON_CTS_PIN 21 // UART Clear To Send pin number. Not used if HWFC is set to false. -#define SER_CON_RTS_PIN 23 // UART Request To Send pin number. Not used if HWFC is set to false. -#endif - -//SPI -#if 0 -#define SER_CON_SPIS_SCK_PIN 20 // SPI SCK signal. -#define SER_CON_SPIS_MISO_PIN 16 // SPI MISO signal. -#define SER_CON_SPIS_MOSI_PIN 17 // SPI MOSI signal. -#define SER_CON_SPIS_CSN_PIN 21 // SPI CSN signal. -#define SER_CON_SPIS_RDY_PIN 19 // SPI READY GPIO pin number. -#define SER_CON_SPIS_REQ_PIN 18 // SPI REQUEST GPIO pin number. -#else -#define SER_CON_SPIS_SCK_PIN 23 // SPI SCK signal. -#define SER_CON_SPIS_MOSI_PIN 22 // SPI MOSI signal. -#define SER_CON_SPIS_MISO_PIN 20 // SPI MISO signal. -#define SER_CON_SPIS_CSN_PIN 21 // SPI CSN signal. -#define SER_CON_SPIS_RDY_PIN 25 // SPI READY GPIO pin number. -#define SER_CON_SPIS_REQ_PIN 24 // SPI REQUEST GPIO pin number. -#endif - -#define SER_CONN_ASSERT_LED_PIN LED_0 - -// Low frequency clock source to be used by the SoftDevice -#define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_XTAL, \ - .rc_ctiv = 0, \ - .rc_temp_ctiv = 0, \ - .xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM} - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/pca10003.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/pca10003.h deleted file mode 100644 index 8a1b239f06b..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/pca10003.h +++ /dev/null @@ -1,98 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef PCA10003_H -#define PCA10003_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include "nrf_gpio.h" - -#define LED_START 18 -#define LED_0 18 -#define LED_1 19 -#define LED_STOP 19 - -#define LEDS_ACTIVE_STATE 1 - -#define LEDS_INV_MASK 0x00000000 - -#define BSP_LED_0 LED_0 -#define BSP_LED_1 LED_1 - -#define BUTTON_START 16 -#define BUTTON_0 16 -#define BUTTON_1 17 -#define BUTTON_STOP 17 -#define BUTTON_PULL NRF_GPIO_PIN_PULLUP - -#define BUTTONS_ACTIVE_STATE 0 - -#define BSP_BUTTON_0 BUTTON_0 -#define BSP_BUTTON_1 BUTTON_1 - -#define BUTTONS_NUMBER 2 -#define LEDS_NUMBER 2 -#define LEDS_LIST { LED_0, LED_1 } - -#define BUTTONS_LIST { BUTTON_0, BUTTON_1 } - -#define RX_PIN_NUMBER 11 -#define TX_PIN_NUMBER 9 -#define CTS_PIN_NUMBER 10 -#define RTS_PIN_NUMBER 8 -#define HWFC true - -// Low frequency clock source to be used by the SoftDevice -#ifdef S210 -#define NRF_CLOCK_LFCLKSRC NRF_CLOCK_LFCLKSRC_XTAL_20_PPM -#else -#define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_XTAL, \ - .rc_ctiv = 0, \ - .rc_temp_ctiv = 0, \ - .xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM} -#endif - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/pca10028.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/pca10028.h deleted file mode 100644 index 6d736ab0271..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/pca10028.h +++ /dev/null @@ -1,180 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef PCA10028_H -#define PCA10028_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include "nrf_gpio.h" - -// LEDs definitions for PCA10028 -#define LEDS_NUMBER 4 - -#define LED_START 21 -#define LED_1 21 -#define LED_2 22 -#define LED_3 23 -#define LED_4 24 -#define LED_STOP 24 - -#define LEDS_ACTIVE_STATE 0 - -#define LEDS_LIST { LED_1, LED_2, LED_3, LED_4 } - -#define LEDS_INV_MASK LEDS_MASK - -#define BSP_LED_0 LED_1 -#define BSP_LED_1 LED_2 -#define BSP_LED_2 LED_3 -#define BSP_LED_3 LED_4 - -#define BUTTONS_NUMBER 4 - -#define BUTTON_START 17 -#define BUTTON_1 17 -#define BUTTON_2 18 -#define BUTTON_3 19 -#define BUTTON_4 20 -#define BUTTON_STOP 20 -#define BUTTON_PULL NRF_GPIO_PIN_PULLUP - -#define BUTTONS_ACTIVE_STATE 0 - -#define BUTTONS_LIST { BUTTON_1, BUTTON_2, BUTTON_3, BUTTON_4 } - -#define BSP_BUTTON_0 BUTTON_1 -#define BSP_BUTTON_1 BUTTON_2 -#define BSP_BUTTON_2 BUTTON_3 -#define BSP_BUTTON_3 BUTTON_4 - -#define RX_PIN_NUMBER 11 -#define TX_PIN_NUMBER 9 -#define CTS_PIN_NUMBER 10 -#define RTS_PIN_NUMBER 8 -#define HWFC true - -#define SPIS_MISO_PIN 28 // SPI MISO signal. -#define SPIS_CSN_PIN 12 // SPI CSN signal. -#define SPIS_MOSI_PIN 25 // SPI MOSI signal. -#define SPIS_SCK_PIN 29 // SPI SCK signal. - -#define SPIM0_SCK_PIN 4 /**< SPI clock GPIO pin number. */ -#define SPIM0_MOSI_PIN 1 /**< SPI Master Out Slave In GPIO pin number. */ -#define SPIM0_MISO_PIN 3 /**< SPI Master In Slave Out GPIO pin number. */ -#define SPIM0_SS_PIN 2 /**< SPI Slave Select GPIO pin number. */ - -#define SPIM1_SCK_PIN 15 /**< SPI clock GPIO pin number. */ -#define SPIM1_MOSI_PIN 12 /**< SPI Master Out Slave In GPIO pin number. */ -#define SPIM1_MISO_PIN 14 /**< SPI Master In Slave Out GPIO pin number. */ -#define SPIM1_SS_PIN 13 /**< SPI Slave Select GPIO pin number. */ - -// serialization APPLICATION board -#define SER_CONN_CHIP_RESET_PIN 12 // Pin used to reset connectivity chip - -#define SER_APP_RX_PIN 25 // UART RX pin number. -#define SER_APP_TX_PIN 28 // UART TX pin number. -#define SER_APP_CTS_PIN 0 // UART Clear To Send pin number. -#define SER_APP_RTS_PIN 29 // UART Request To Send pin number. - -#define SER_APP_SPIM0_SCK_PIN 7 // SPI clock GPIO pin number. -#define SER_APP_SPIM0_MOSI_PIN 0 // SPI Master Out Slave In GPIO pin number -#define SER_APP_SPIM0_MISO_PIN 30 // SPI Master In Slave Out GPIO pin number -#define SER_APP_SPIM0_SS_PIN 25 // SPI Slave Select GPIO pin number -#define SER_APP_SPIM0_RDY_PIN 29 // SPI READY GPIO pin number -#define SER_APP_SPIM0_REQ_PIN 28 // SPI REQUEST GPIO pin number - -// serialization CONNECTIVITY board -#define SER_CON_RX_PIN 28 // UART RX pin number. -#define SER_CON_TX_PIN 25 // UART TX pin number. -#define SER_CON_CTS_PIN 29 // UART Clear To Send pin number. Not used if HWFC is set to false. -#define SER_CON_RTS_PIN 0 // UART Request To Send pin number. Not used if HWFC is set to false. - - -#define SER_CON_SPIS_SCK_PIN 7 // SPI SCK signal. -#define SER_CON_SPIS_MOSI_PIN 0 // SPI MOSI signal. -#define SER_CON_SPIS_MISO_PIN 30 // SPI MISO signal. -#define SER_CON_SPIS_CSN_PIN 25 // SPI CSN signal. -#define SER_CON_SPIS_RDY_PIN 29 // SPI READY GPIO pin number. -#define SER_CON_SPIS_REQ_PIN 28 // SPI REQUEST GPIO pin number. - -// Arduino board mappings -#define ARDUINO_SCL_PIN 7 // SCL signal pin -#define ARDUINO_SDA_PIN 30 // SDA signal pin -#define ARDUINO_AREF_PIN 0 // Aref pin -#define ARDUINO_13_PIN 29 // Digital pin 13 -#define ARDUINO_12_PIN 28 // Digital pin 12 -#define ARDUINO_11_PIN 25 // Digital pin 11 -#define ARDUINO_10_PIN 24 // Digital pin 10 -#define ARDUINO_9_PIN 23 // Digital pin 9 -#define ARDUINO_8_PIN 20 // Digital pin 8 - -#define ARDUINO_7_PIN 19 // Digital pin 7 -#define ARDUINO_6_PIN 18 // Digital pin 6 -#define ARDUINO_5_PIN 17 // Digital pin 5 -#define ARDUINO_4_PIN 16 // Digital pin 4 -#define ARDUINO_3_PIN 15 // Digital pin 3 -#define ARDUINO_2_PIN 14 // Digital pin 2 -#define ARDUINO_1_PIN 13 // Digital pin 1 -#define ARDUINO_0_PIN 12 // Digital pin 0 - -#define ARDUINO_A0_PIN 1 // Analog channel 0 -#define ARDUINO_A1_PIN 2 // Analog channel 1 -#define ARDUINO_A2_PIN 3 // Analog channel 2 -#define ARDUINO_A3_PIN 4 // Analog channel 3 -#define ARDUINO_A4_PIN 5 // Analog channel 4 -#define ARDUINO_A5_PIN 6 // Analog channel 5 - -// Low frequency clock source to be used by the SoftDevice -#ifdef S210 -#define NRF_CLOCK_LFCLKSRC NRF_CLOCK_LFCLKSRC_XTAL_20_PPM -#else -#define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_XTAL, \ - .rc_ctiv = 0, \ - .rc_temp_ctiv = 0, \ - .xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM} -#endif - -#ifdef __cplusplus -} -#endif - -#endif // PCA10028_H diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/pca10031.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/pca10031.h deleted file mode 100644 index 35d7301c219..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/boards/pca10031.h +++ /dev/null @@ -1,97 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef PCA10031_H -#define PCA10031_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include "nrf_gpio.h" - -// LEDs definitions for PCA10031 -#define LEDS_NUMBER 3 - -#define LED_START 21 -#define LED_RGB_RED 21 -#define LED_RGB_GREEN 22 -#define LED_RGB_BLUE 23 -#define LED_STOP 23 - -#define LEDS_ACTIVE_STATE 1 - -#define LEDS_INV_MASK LEDS_MASK - -#define LED_RGB_RED_MASK (1< -#include -#include -#include "nrf_soc.h" -#include "nordic_common.h" -#include "nrf_error.h" -#include "nrf.h" -#include "app_util.h" - - -static volatile bool m_radio_active = false; /**< TRUE if radio is active (or about to become active), FALSE otherwise. */ - - -uint16_t ble_flash_crc16_compute(uint8_t * p_data, uint16_t size, uint16_t * p_crc) -{ - uint16_t i; - uint16_t crc = (p_crc == NULL) ? 0xffff : *p_crc; - - for (i = 0; i < size; i++) - { - crc = (unsigned char)(crc >> 8) | (crc << 8); - crc ^= p_data[i]; - crc ^= (unsigned char)(crc & 0xff) >> 4; - crc ^= (crc << 8) << 4; - crc ^= ((crc & 0xff) << 4) << 1; - } - return crc; -} - - -/**@brief Function for erasing a page in flash. - * - * @param[in] p_page Pointer to first word in page to be erased. - */ -static void flash_page_erase(uint32_t * p_page) -{ - // Turn on flash erase enable and wait until the NVMC is ready. - NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Een << NVMC_CONFIG_WEN_Pos); - while (NRF_NVMC->READY == NVMC_READY_READY_Busy) - { - // Do nothing. - } - - // Erase page. - NRF_NVMC->ERASEPAGE = (uint32_t)p_page; - while (NRF_NVMC->READY == NVMC_READY_READY_Busy) - { - // Do nothing. - } - - // Turn off flash erase enable and wait until the NVMC is ready. - NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos); - while (NRF_NVMC->READY == NVMC_READY_READY_Busy) - { - // Do nothing - } -} - - -/**@brief Function for writing one word to flash. Unprotected write, which can interfere with radio communication. - * - * @details This function DOES NOT use the m_radio_active variable, but will force the write even - * when the radio is active. To be used only from @ref ble_flash_page_write. - * - * @note Flash location to be written must have been erased previously. - * - * @param[in] p_address Pointer to flash location to be written. - * @param[in] value Value to write to flash. - */ -static void flash_word_unprotected_write(uint32_t * p_address, uint32_t value) -{ - // Turn on flash write enable and wait until the NVMC is ready. - NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos); - while (NRF_NVMC->READY == NVMC_READY_READY_Busy) - { - // Do nothing. - } - *p_address = value; - - // Wait flash write to finish - while (NRF_NVMC->READY == NVMC_READY_READY_Busy) - { - // Do nothing. - } - - // Turn off flash write enable and wait until the NVMC is ready. - NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos); - while (NRF_NVMC->READY == NVMC_READY_READY_Busy) - { - // Do nothing. - } -} - - -/**@brief Function for writing one word to flash. - * - * @note Flash location to be written must have been erased previously. - * - * @param[in] p_address Pointer to flash location to be written. - * @param[in] value Value to write to flash. - */ -static void flash_word_write(uint32_t * p_address, uint32_t value) -{ - // If radio is active, wait for it to become inactive. - while (m_radio_active) - { - // Do nothing (just wait for radio to become inactive). - (void) sd_app_evt_wait(); - } - - // Turn on flash write enable and wait until the NVMC is ready. - NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos); - while (NRF_NVMC->READY == NVMC_READY_READY_Busy) - { - // Do nothing. - } - - *p_address = value; - // Wait flash write to finish - while (NRF_NVMC->READY == NVMC_READY_READY_Busy) - { - // Do nothing. - } - // Turn off flash write enable and wait until the NVMC is ready. - NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos); - while (NRF_NVMC->READY == NVMC_READY_READY_Busy) - { - // Do nothing - } -} - - -uint32_t ble_flash_word_write(uint32_t * p_address, uint32_t value) -{ - flash_word_write(p_address, value); - return NRF_SUCCESS; -} - - -uint32_t ble_flash_block_write(uint32_t * p_address, uint32_t * p_in_array, uint16_t word_count) -{ - uint16_t i; - - for (i = 0; i < word_count; i++) - { - flash_word_write(p_address, p_in_array[i]); - p_address++; - } - - return NRF_SUCCESS; -} - - -uint32_t ble_flash_page_erase(uint8_t page_num) -{ - uint32_t * p_page = (uint32_t *)(BLE_FLASH_PAGE_SIZE * page_num); - flash_page_erase(p_page); - - return NRF_SUCCESS; -} - - -uint32_t ble_flash_page_write(uint8_t page_num, uint32_t * p_in_array, uint8_t word_count) -{ - int i; - uint32_t * p_page; - uint32_t * p_curr_addr; - uint16_t in_data_crc; - uint16_t flash_crc; - uint32_t flash_header; - - p_page = (uint32_t *)(BLE_FLASH_PAGE_SIZE * page_num); - p_curr_addr = p_page; - - // Calculate CRC of the data to write. - in_data_crc = ble_flash_crc16_compute((uint8_t *)p_in_array, - word_count * sizeof(uint32_t), - NULL); - - // Compare the calculated to the one in flash. - flash_header = *p_curr_addr; - flash_crc = (uint16_t)flash_header; - - if (flash_crc == in_data_crc) - { - // Data is the same as the data already stored in flash, return without modifying flash. - return NRF_SUCCESS; - } - - // Erase flash page - flash_page_erase(p_page); - - // Reserve space for magic number (for detecting if flash content is valid). - p_curr_addr++; - - // Reserve space for saving word_count. - p_curr_addr++; - - // Write data - for (i = 0; i < word_count; i++) - { - flash_word_unprotected_write(p_curr_addr, p_in_array[i]); - p_curr_addr++; - } - - // Write number of elements. - flash_word_write(p_page + 1, (uint32_t)(word_count)); - - // Write magic number and CRC to indicate that flash content is valid. - flash_header = BLE_FLASH_MAGIC_NUMBER | (uint32_t)in_data_crc; - flash_word_write(p_page, flash_header); - - return NRF_SUCCESS; -} - - -uint32_t ble_flash_page_read(uint8_t page_num, uint32_t * p_out_array, uint8_t * p_word_count) -{ - int byte_count; - uint32_t * p_page; - uint32_t * p_curr_addr; - uint32_t flash_header; - uint32_t calc_header; - uint16_t calc_crc; - uint32_t tmp; - - p_page = (uint32_t *)(BLE_FLASH_PAGE_SIZE * page_num); - p_curr_addr = p_page; - - // Check if block is valid - flash_header = *p_curr_addr; - tmp = flash_header & 0xFFFF0000; - if (tmp != BLE_FLASH_MAGIC_NUMBER) - { - *p_word_count = 0; - return NRF_ERROR_NOT_FOUND; - } - p_curr_addr++; - - // Read number of elements - *p_word_count = (uint8_t)(*(p_curr_addr)); - p_curr_addr++; - - // Read data - byte_count = (*p_word_count) * sizeof(uint32_t); - memcpy(p_out_array, p_curr_addr, byte_count); - - // Check CRC - calc_crc = ble_flash_crc16_compute((uint8_t *)p_out_array, - (*p_word_count) * sizeof(uint32_t), - NULL); - calc_header = BLE_FLASH_MAGIC_NUMBER | (uint32_t)calc_crc; - - if (calc_header != flash_header) - { - return NRF_ERROR_NOT_FOUND; - } - - return NRF_SUCCESS; -} - - -uint32_t ble_flash_page_addr(uint8_t page_num, uint32_t ** pp_page_addr) -{ - *pp_page_addr = (uint32_t *)(BLE_FLASH_PAGE_SIZE * page_num); - return NRF_SUCCESS; -} - - -void ble_flash_on_radio_active_evt(bool radio_active) -{ - m_radio_active = radio_active; -} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/ble_flash/ble_flash.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/ble_flash/ble_flash.h deleted file mode 100644 index 8fffeb62a7c..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/ble_flash/ble_flash.h +++ /dev/null @@ -1,178 +0,0 @@ -/** - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** @file - * - * @defgroup ble_flash_module Flash Manager - * @{ - * @ingroup ble_sdk_lib - * @brief Module for accessing flash memory. - * - * @details It contains functions for reading, writing and erasing one page in flash. - * - * The module uses the first 32 bits of the flash page to write a magic number in order to - * determine if the page has been written or not. - * - * @note Be careful not to use a page number in the SoftDevice area (which currently occupies the - * range 0 to 127), or in your application space! In both cases, this would end up - * with a hard fault. - */ - -#ifndef BLE_FLASH_H__ -#define BLE_FLASH_H__ - -#include -#include -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#define BLE_FLASH_PAGE_SIZE ((uint16_t)NRF_FICR->CODEPAGESIZE) /**< Size of one flash page. */ -#define BLE_FLASH_MAGIC_NUMBER 0x45DE0000 /**< Magic value to identify if flash contains valid data. */ -#define BLE_FLASH_EMPTY_MASK 0xFFFFFFFF /**< Bit mask that defines an empty address in flash. */ - - -/**@brief Macro for getting the end of the flash available for application. - * - * @details The result flash page number indicates the end boundary of the flash available - * to the application. If a bootloader is used, the end will be the start of the - * bootloader region. Otherwise, the end will be the size of the flash. - */ -#define BLE_FLASH_PAGE_END \ - ((NRF_UICR->NRFFW[0] != BLE_FLASH_EMPTY_MASK) \ - ? (NRF_UICR->NRFFW[0] / BLE_FLASH_PAGE_SIZE) \ - : NRF_FICR->CODESIZE) - -/**@brief Function for erasing the specified flash page, and then writes the given data to this page. - * - * @warning This operation blocks the CPU. DO NOT use while in a connection! - * - * @param[in] page_num Page number to update. - * @param[in] p_in_array Pointer to a RAM area containing the elements to write in flash. - * This area has to be 32 bits aligned. - * @param[in] word_count Number of 32 bits words to write in flash. - * - * @return NRF_SUCCESS on successful flash write, otherwise an error code. - */ -uint32_t ble_flash_page_write(uint8_t page_num, uint32_t * p_in_array, uint8_t word_count); - -/**@brief Function for reading data from flash to RAM. - * - * @param[in] page_num Page number to read. - * @param[out] p_out_array Pointer to a RAM area where the found data will be written. - * This area has to be 32 bits aligned. - * @param[out] p_word_count Number of 32 bits words read. - * - * @return NRF_SUCCESS on successful upload, NRF_ERROR_NOT_FOUND if no valid data has been found - * in flash (first 32 bits not equal to the MAGIC_NUMBER + CRC). - */ -uint32_t ble_flash_page_read(uint8_t page_num, uint32_t * p_out_array, uint8_t * p_word_count); - -/**@brief Function for erasing a flash page. - * - * @note This operation blocks the CPU, so it should not be done while the radio is running! - * - * @param[in] page_num Page number to erase. - * - * @return NRF_SUCCESS on success, an error_code otherwise. - */ -uint32_t ble_flash_page_erase(uint8_t page_num); - -/**@brief Function for writing one word to flash. - * - * @note Flash location to be written must have been erased previously. - * - * @param[in] p_address Pointer to flash location to be written. - * @param[in] value Value to write to flash. - * - * @return NRF_SUCCESS. - */ -uint32_t ble_flash_word_write(uint32_t * p_address, uint32_t value); - -/**@brief Function for writing a data block to flash. - * - * @note Flash locations to be written must have been erased previously. - * - * @param[in] p_address Pointer to start of flash location to be written. - * @param[in] p_in_array Pointer to start of flash block to be written. - * @param[in] word_count Number of words to be written. - * - * @return NRF_SUCCESS. - */ -uint32_t ble_flash_block_write(uint32_t * p_address, uint32_t * p_in_array, uint16_t word_count); - -/**@brief Function for computing pointer to start of specified flash page. - * - * @param[in] page_num Page number. - * @param[out] pp_page_addr Pointer to start of flash page. - * - * @return NRF_SUCCESS. - */ -uint32_t ble_flash_page_addr(uint8_t page_num, uint32_t ** pp_page_addr); - -/**@brief Function for calculating a 16 bit CRC using the CRC-16-CCITT scheme. - * - * @param[in] p_data Pointer to data on which the CRC is to be calculated. - * @param[in] size Number of bytes on which the CRC is to be calculated. - * @param[in] p_crc Initial CRC value (if NULL, a preset value is used as the initial value). - * - * @return Calculated CRC. - */ -uint16_t ble_flash_crc16_compute(uint8_t * p_data, uint16_t size, uint16_t * p_crc); - -/**@brief Function for handling flashing module Radio Notification event. - * - * @note For flash writing to work safely while in a connection or while advertising, this function - * MUST be called from the Radio Notification module's event handler (see - * @ref ble_radio_notification for details). - * - * @param[in] radio_active TRUE if radio is active (or about to become active), FALSE otherwise. - */ -void ble_flash_on_radio_active_evt(bool radio_active); - - -#ifdef __cplusplus -} -#endif - -#endif // BLE_FLASH_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/clock/nrf_drv_clock.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/clock/nrf_drv_clock.c deleted file mode 100644 index cb02c3c7d7d..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/clock/nrf_drv_clock.c +++ /dev/null @@ -1,627 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(CLOCK) - -#include "nrf_drv_clock.h" -#include "nrf_error.h" -#include "app_util_platform.h" -#ifdef SOFTDEVICE_PRESENT -#include "nrf_sdh.h" -#include "nrf_sdh_soc.h" -#endif - -#define NRF_LOG_MODULE_NAME clock - -#if CLOCK_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL CLOCK_CONFIG_LOG_LEVEL -#define NRF_LOG_INFO_COLOR CLOCK_CONFIG_INFO_COLOR -#define NRF_LOG_DEBUG_COLOR CLOCK_CONFIG_DEBUG_COLOR -#define EVT_TO_STR(event) (event == NRF_CLOCK_EVENT_HFCLKSTARTED ? "NRF_CLOCK_EVENT_HFCLKSTARTED" : \ - (event == NRF_CLOCK_EVENT_LFCLKSTARTED ? "NRF_CLOCK_EVENT_LFCLKSTARTED" : \ - (event == NRF_CLOCK_EVENT_DONE ? "NRF_CLOCK_EVENT_DONE" : \ - (event == NRF_CLOCK_EVENT_CTTO ? "NRF_CLOCK_EVENT_CTTO" : "UNKNOWN EVENT")))) -#else //CLOCK_CONFIG_LOG_ENABLED -#define EVT_TO_STR(event) "" -#define NRF_LOG_LEVEL 0 -#endif //CLOCK_CONFIG_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - -/* Validate configuration */ -INTERRUPT_PRIORITY_VALIDATION(CLOCK_CONFIG_IRQ_PRIORITY); - -/*lint -save -e652 */ -#define NRF_CLOCK_LFCLK_RC CLOCK_LFCLKSRC_SRC_RC -#define NRF_CLOCK_LFCLK_Xtal CLOCK_LFCLKSRC_SRC_Xtal -#define NRF_CLOCK_LFCLK_Synth CLOCK_LFCLKSRC_SRC_Synth -/*lint -restore */ - -#if (CLOCK_CONFIG_LF_SRC == NRF_CLOCK_LFCLK_RC) && !defined(SOFTDEVICE_PRESENT) -#define CALIBRATION_SUPPORT 1 -#else -#define CALIBRATION_SUPPORT 0 -#endif -typedef enum -{ - CAL_STATE_IDLE, - CAL_STATE_CT, - CAL_STATE_HFCLK_REQ, - CAL_STATE_CAL, - CAL_STATE_ABORT, -} nrf_drv_clock_cal_state_t; - -/**@brief CLOCK control block. */ -typedef struct -{ - bool module_initialized; /*< Indicate the state of module */ - volatile bool hfclk_on; /*< High-frequency clock state. */ - volatile bool lfclk_on; /*< Low-frequency clock state. */ - volatile uint32_t hfclk_requests; /*< High-frequency clock request counter. */ - volatile nrf_drv_clock_handler_item_t * p_hf_head; - volatile uint32_t lfclk_requests; /*< Low-frequency clock request counter. */ - volatile nrf_drv_clock_handler_item_t * p_lf_head; -#if CALIBRATION_SUPPORT - nrf_drv_clock_handler_item_t cal_hfclk_started_handler_item; - nrf_drv_clock_event_handler_t cal_done_handler; - volatile nrf_drv_clock_cal_state_t cal_state; -#endif // CALIBRATION_SUPPORT -} nrf_drv_clock_cb_t; - -static nrf_drv_clock_cb_t m_clock_cb; - - -/**@brief Function for starting LFCLK. This function will return immediately without waiting for start. - */ -static void lfclk_start(void) -{ - nrf_clock_event_clear(NRF_CLOCK_EVENT_LFCLKSTARTED); - nrf_clock_int_enable(NRF_CLOCK_INT_LF_STARTED_MASK); - nrf_clock_task_trigger(NRF_CLOCK_TASK_LFCLKSTART); -} - -/**@brief Function for stopping LFCLK and calibration (if it was set up). - */ -static void lfclk_stop(void) -{ -#if CALIBRATION_SUPPORT - (void)nrf_drv_clock_calibration_abort(); -#endif - -#ifdef SOFTDEVICE_PRESENT - // If LFCLK is requested to stop while SD is still enabled, - // it indicates an error in the application. - // Enabling SD should increment the LFCLK request. - ASSERT(!nrf_sdh_is_enabled()); -#endif // SOFTDEVICE_PRESENT - - nrf_clock_task_trigger(NRF_CLOCK_TASK_LFCLKSTOP); - while (nrf_clock_lf_is_running()) - {} - m_clock_cb.lfclk_on = false; -} - -static void hfclk_start(void) -{ -#ifdef SOFTDEVICE_PRESENT - if (nrf_sdh_is_enabled()) - { - (void)sd_clock_hfclk_request(); - return; - } -#endif // SOFTDEVICE_PRESENT - - nrf_clock_event_clear(NRF_CLOCK_EVENT_HFCLKSTARTED); - nrf_clock_int_enable(NRF_CLOCK_INT_HF_STARTED_MASK); - nrf_clock_task_trigger(NRF_CLOCK_TASK_HFCLKSTART); -} - -static void hfclk_stop(void) -{ -#ifdef SOFTDEVICE_PRESENT - if (nrf_sdh_is_enabled()) - { - (void)sd_clock_hfclk_release(); - return; - } -#endif // SOFTDEVICE_PRESENT - - nrf_clock_task_trigger(NRF_CLOCK_TASK_HFCLKSTOP); - while (nrf_clock_hf_is_running(NRF_CLOCK_HFCLK_HIGH_ACCURACY)) - {} - m_clock_cb.hfclk_on = false; -} - -bool nrf_drv_clock_init_check(void) -{ - return m_clock_cb.module_initialized; -} - -ret_code_t nrf_drv_clock_init(void) -{ - ret_code_t err_code = NRF_SUCCESS; - if (m_clock_cb.module_initialized) - { - err_code = NRF_ERROR_MODULE_ALREADY_INITIALIZED; - } - else - { - m_clock_cb.p_hf_head = NULL; - m_clock_cb.hfclk_requests = 0; - m_clock_cb.p_lf_head = NULL; - m_clock_cb.lfclk_requests = 0; - nrf_drv_common_power_clock_irq_init(); -#ifdef SOFTDEVICE_PRESENT - if (!nrf_sdh_is_enabled()) -#endif - { - nrf_clock_lf_src_set((nrf_clock_lfclk_t)CLOCK_CONFIG_LF_SRC); - } - -#if CALIBRATION_SUPPORT - m_clock_cb.cal_state = CAL_STATE_IDLE; -#endif - - m_clock_cb.module_initialized = true; - } - - NRF_LOG_INFO("Function: %s, error code: %s.", - (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - -void nrf_drv_clock_uninit(void) -{ - ASSERT(m_clock_cb.module_initialized); - nrf_drv_common_clock_irq_disable(); - nrf_clock_int_disable(0xFFFFFFFF); - - lfclk_stop(); - hfclk_stop(); - m_clock_cb.module_initialized = false; - NRF_LOG_INFO("Uninitialized."); -} - -static void item_enqueue(nrf_drv_clock_handler_item_t ** p_head, - nrf_drv_clock_handler_item_t * p_item) -{ - nrf_drv_clock_handler_item_t * p_next = *p_head; - while (p_next) - { - if (p_next == p_item) - { - return; - } - p_next = p_next->p_next; - } - - p_item->p_next = (*p_head ? *p_head : NULL); - *p_head = p_item; -} - -static nrf_drv_clock_handler_item_t * item_dequeue(nrf_drv_clock_handler_item_t ** p_head) -{ - nrf_drv_clock_handler_item_t * p_item = *p_head; - if (p_item) - { - *p_head = p_item->p_next; - } - return p_item; -} - -void nrf_drv_clock_lfclk_request(nrf_drv_clock_handler_item_t * p_handler_item) -{ - ASSERT(m_clock_cb.module_initialized); - - if (m_clock_cb.lfclk_on) - { - if (p_handler_item) - { - p_handler_item->event_handler(NRF_DRV_CLOCK_EVT_LFCLK_STARTED); - } - CRITICAL_REGION_ENTER(); - ++(m_clock_cb.lfclk_requests); - CRITICAL_REGION_EXIT(); - } - else - { - CRITICAL_REGION_ENTER(); - if (p_handler_item) - { - item_enqueue((nrf_drv_clock_handler_item_t **)&m_clock_cb.p_lf_head, - p_handler_item); - } - if (m_clock_cb.lfclk_requests == 0) - { - lfclk_start(); - } - ++(m_clock_cb.lfclk_requests); - CRITICAL_REGION_EXIT(); - } - - ASSERT(m_clock_cb.lfclk_requests > 0); -} - -void nrf_drv_clock_lfclk_release(void) -{ - ASSERT(m_clock_cb.module_initialized); - ASSERT(m_clock_cb.lfclk_requests > 0); - - CRITICAL_REGION_ENTER(); - --(m_clock_cb.lfclk_requests); - if (m_clock_cb.lfclk_requests == 0) - { - lfclk_stop(); - } - CRITICAL_REGION_EXIT(); -} - -bool nrf_drv_clock_lfclk_is_running(void) -{ - ASSERT(m_clock_cb.module_initialized); - -#ifdef SOFTDEVICE_PRESENT - if (nrf_sdh_is_enabled()) - { - return true; - } -#endif // SOFTDEVICE_PRESENT - - return nrf_clock_lf_is_running(); -} - -void nrf_drv_clock_hfclk_request(nrf_drv_clock_handler_item_t * p_handler_item) -{ - ASSERT(m_clock_cb.module_initialized); - - if (m_clock_cb.hfclk_on) - { - if (p_handler_item) - { - p_handler_item->event_handler(NRF_DRV_CLOCK_EVT_HFCLK_STARTED); - } - CRITICAL_REGION_ENTER(); - ++(m_clock_cb.hfclk_requests); - CRITICAL_REGION_EXIT(); - } - else - { - CRITICAL_REGION_ENTER(); - if (p_handler_item) - { - item_enqueue((nrf_drv_clock_handler_item_t **)&m_clock_cb.p_hf_head, - p_handler_item); - } - if (m_clock_cb.hfclk_requests == 0) - { - hfclk_start(); - } - ++(m_clock_cb.hfclk_requests); - CRITICAL_REGION_EXIT(); - } - - ASSERT(m_clock_cb.hfclk_requests > 0); -} - -void nrf_drv_clock_hfclk_release(void) -{ - ASSERT(m_clock_cb.module_initialized); - ASSERT(m_clock_cb.hfclk_requests > 0); - - CRITICAL_REGION_ENTER(); - --(m_clock_cb.hfclk_requests); - if (m_clock_cb.hfclk_requests == 0) - { - hfclk_stop(); - } - CRITICAL_REGION_EXIT(); -} - -bool nrf_drv_clock_hfclk_is_running(void) -{ - ASSERT(m_clock_cb.module_initialized); - -#ifdef SOFTDEVICE_PRESENT - if (nrf_sdh_is_enabled()) - { - uint32_t is_running; - UNUSED_VARIABLE(sd_clock_hfclk_is_running(&is_running)); - return (is_running ? true : false); - } -#endif // SOFTDEVICE_PRESENT - - return nrf_clock_hf_is_running(NRF_CLOCK_HFCLK_HIGH_ACCURACY); -} - -#if CALIBRATION_SUPPORT -static void clock_calibration_hf_started(nrf_drv_clock_evt_type_t event) -{ - if (m_clock_cb.cal_state == CAL_STATE_ABORT) - { - nrf_drv_clock_hfclk_release(); - m_clock_cb.cal_state = CAL_STATE_IDLE; - if (m_clock_cb.cal_done_handler) - { - m_clock_cb.cal_done_handler(NRF_DRV_CLOCK_EVT_CAL_ABORTED); - } - } - else - { - nrf_clock_event_clear(NRF_CLOCK_EVENT_DONE); - nrf_clock_int_enable(NRF_CLOCK_INT_DONE_MASK); - m_clock_cb.cal_state = CAL_STATE_CAL; - nrf_clock_task_trigger(NRF_CLOCK_TASK_CAL); - } -} -#endif // CALIBRATION_SUPPORT - -ret_code_t nrf_drv_clock_calibration_start(uint8_t interval, nrf_drv_clock_event_handler_t handler) -{ - ret_code_t err_code = NRF_SUCCESS; -#if CALIBRATION_SUPPORT - ASSERT(m_clock_cb.cal_state == CAL_STATE_IDLE); - if (m_clock_cb.lfclk_on == false) - { - err_code = NRF_ERROR_INVALID_STATE; - } - else if (m_clock_cb.cal_state == CAL_STATE_IDLE) - { - m_clock_cb.cal_done_handler = handler; - m_clock_cb.cal_hfclk_started_handler_item.event_handler = clock_calibration_hf_started; - if (interval == 0) - { - m_clock_cb.cal_state = CAL_STATE_HFCLK_REQ; - nrf_drv_clock_hfclk_request(&m_clock_cb.cal_hfclk_started_handler_item); - } - else - { - m_clock_cb.cal_state = CAL_STATE_CT; - nrf_clock_cal_timer_timeout_set(interval); - nrf_clock_event_clear(NRF_CLOCK_EVENT_CTTO); - nrf_clock_int_enable(NRF_CLOCK_INT_CTTO_MASK); - nrf_clock_task_trigger(NRF_CLOCK_TASK_CTSTART); - } - } - else - { - err_code = NRF_ERROR_BUSY; - } - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -#else - err_code = NRF_ERROR_FORBIDDEN; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -#endif // CALIBRATION_SUPPORT -} - -ret_code_t nrf_drv_clock_calibration_abort(void) -{ - ret_code_t err_code = NRF_SUCCESS; -#if CALIBRATION_SUPPORT - CRITICAL_REGION_ENTER(); - switch (m_clock_cb.cal_state) - { - case CAL_STATE_CT: - nrf_clock_int_disable(NRF_CLOCK_INT_CTTO_MASK); - nrf_clock_task_trigger(NRF_CLOCK_TASK_CTSTOP); - m_clock_cb.cal_state = CAL_STATE_IDLE; - if (m_clock_cb.cal_done_handler) - { - m_clock_cb.cal_done_handler(NRF_DRV_CLOCK_EVT_CAL_ABORTED); - } - break; - case CAL_STATE_HFCLK_REQ: - /* fall through. */ - case CAL_STATE_CAL: - m_clock_cb.cal_state = CAL_STATE_ABORT; - break; - default: - break; - } - CRITICAL_REGION_EXIT(); - - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -#else - err_code = NRF_ERROR_FORBIDDEN; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -#endif // CALIBRATION_SUPPORT -} - -ret_code_t nrf_drv_clock_is_calibrating(bool * p_is_calibrating) -{ - ret_code_t err_code = NRF_SUCCESS; -#if CALIBRATION_SUPPORT - ASSERT(m_clock_cb.module_initialized); - *p_is_calibrating = (m_clock_cb.cal_state != CAL_STATE_IDLE); - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -#else - err_code = NRF_ERROR_FORBIDDEN; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -#endif // CALIBRATION_SUPPORT -} - -__STATIC_INLINE void clock_clk_started_notify(nrf_drv_clock_evt_type_t evt_type) -{ - nrf_drv_clock_handler_item_t **p_head; - if (evt_type == NRF_DRV_CLOCK_EVT_HFCLK_STARTED) - { - p_head = (nrf_drv_clock_handler_item_t **)&m_clock_cb.p_hf_head; - } - else - { - p_head = (nrf_drv_clock_handler_item_t **)&m_clock_cb.p_lf_head; - } - - while (1) - { - nrf_drv_clock_handler_item_t * p_item = item_dequeue(p_head); - if (!p_item) - { - break; - } - - p_item->event_handler(evt_type); - } -} - -#if NRF_DRV_COMMON_POWER_CLOCK_ISR -void nrf_drv_clock_onIRQ(void) -#else -void POWER_CLOCK_IRQHandler(void) -#endif -{ - if (nrf_clock_event_check(NRF_CLOCK_EVENT_HFCLKSTARTED)) - { - nrf_clock_event_clear(NRF_CLOCK_EVENT_HFCLKSTARTED); - NRF_LOG_DEBUG("Event: %s.", (uint32_t)EVT_TO_STR(NRF_CLOCK_EVENT_HFCLKSTARTED)); - nrf_clock_int_disable(NRF_CLOCK_INT_HF_STARTED_MASK); - m_clock_cb.hfclk_on = true; - clock_clk_started_notify(NRF_DRV_CLOCK_EVT_HFCLK_STARTED); - } - if (nrf_clock_event_check(NRF_CLOCK_EVENT_LFCLKSTARTED)) - { - nrf_clock_event_clear(NRF_CLOCK_EVENT_LFCLKSTARTED); - NRF_LOG_DEBUG("Event: %s.", (uint32_t)EVT_TO_STR(NRF_CLOCK_EVENT_LFCLKSTARTED)); - nrf_clock_int_disable(NRF_CLOCK_INT_LF_STARTED_MASK); - m_clock_cb.lfclk_on = true; - clock_clk_started_notify(NRF_DRV_CLOCK_EVT_LFCLK_STARTED); - } -#if CALIBRATION_SUPPORT - if (nrf_clock_event_check(NRF_CLOCK_EVENT_CTTO)) - { - nrf_clock_event_clear(NRF_CLOCK_EVENT_CTTO); - NRF_LOG_DEBUG("Event: %s.", (uint32_t)EVT_TO_STR(NRF_CLOCK_EVENT_CTTO)); - nrf_clock_int_disable(NRF_CLOCK_INT_CTTO_MASK); - nrf_drv_clock_hfclk_request(&m_clock_cb.cal_hfclk_started_handler_item); - } - - if (nrf_clock_event_check(NRF_CLOCK_EVENT_DONE)) - { - nrf_clock_event_clear(NRF_CLOCK_EVENT_DONE); - NRF_LOG_DEBUG("Event: %s.", (uint32_t)EVT_TO_STR(NRF_CLOCK_EVENT_DONE)); - nrf_clock_int_disable(NRF_CLOCK_INT_DONE_MASK); - nrf_drv_clock_hfclk_release(); - bool aborted = (m_clock_cb.cal_state == CAL_STATE_ABORT); - m_clock_cb.cal_state = CAL_STATE_IDLE; - if (m_clock_cb.cal_done_handler) - { - m_clock_cb.cal_done_handler(aborted ? - NRF_DRV_CLOCK_EVT_CAL_ABORTED : NRF_DRV_CLOCK_EVT_CAL_DONE); - } - } -#endif // CALIBRATION_SUPPORT -} - -#ifdef SOFTDEVICE_PRESENT -/** - * @brief SoftDevice SoC event handler. - * - * @param[in] evt_id SoC event. - * @param[in] p_context Context. - */ -static void soc_evt_handler(uint32_t evt_id, void * p_context) -{ - if (evt_id == NRF_EVT_HFCLKSTARTED) - { - clock_clk_started_notify(NRF_DRV_CLOCK_EVT_HFCLK_STARTED); - } -} - -NRF_SDH_SOC_OBSERVER(m_soc_evt_observer, CLOCK_CONFIG_SOC_OBSERVER_PRIO, soc_evt_handler, NULL); - -/** - * @brief SoftDevice enable/disable state handler. - * - * @param[in] state State. - * @param[in] p_context Context. - */ -static void sd_state_evt_handler(nrf_sdh_state_evt_t state, void * p_context) -{ - switch (state) - { - case NRF_SDH_EVT_STATE_ENABLE_PREPARE: - NVIC_DisableIRQ(POWER_CLOCK_IRQn); - break; - - case NRF_SDH_EVT_STATE_ENABLED: - CRITICAL_REGION_ENTER(); - /* Make sure that nrf_drv_clock module is initialized */ - if (!m_clock_cb.module_initialized) - { - (void)nrf_drv_clock_init(); - } - /* SD is one of the LFCLK requesters, but it will enable it by itself. */ - ++(m_clock_cb.lfclk_requests); - m_clock_cb.lfclk_on = true; - CRITICAL_REGION_EXIT(); - break; - - case NRF_SDH_EVT_STATE_DISABLED: - /* Reinit interrupts */ - ASSERT(m_clock_cb.module_initialized); - nrf_drv_common_irq_enable(POWER_CLOCK_IRQn, CLOCK_CONFIG_IRQ_PRIORITY); - - /* SD leaves LFCLK enabled - disable it if it is no longer required. */ - nrf_drv_clock_lfclk_release(); - break; - - default: - break; - } -} - -NRF_SDH_STATE_OBSERVER(m_sd_state_observer, CLOCK_CONFIG_STATE_OBSERVER_PRIO) = -{ - .handler = sd_state_evt_handler, - .p_context = NULL, -}; - -#endif // SOFTDEVICE_PRESENT - -#undef NRF_CLOCK_LFCLK_RC -#undef NRF_CLOCK_LFCLK_Xtal -#undef NRF_CLOCK_LFCLK_Synth - -#endif // NRF_MODULE_ENABLED(CLOCK) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/clock/nrf_drv_clock.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/clock/nrf_drv_clock.h deleted file mode 100644 index be2831bee67..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/clock/nrf_drv_clock.h +++ /dev/null @@ -1,285 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_DRV_CLOCK_H__ -#define NRF_DRV_CLOCK_H__ - -#include -#include -#include "sdk_errors.h" -#include "nrf_assert.h" -#include "nrf_clock.h" -#include "sdk_config.h" -#include "nrf_drv_common.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * - * @addtogroup nrf_clock Clock HAL and driver - * @ingroup nrf_drivers - * @brief Clock APIs. - * @details The clock HAL provides basic APIs for accessing the registers of the clock. - * The clock driver provides APIs on a higher level. - * - * @defgroup nrf_drv_clock Clock driver - * @{ - * @ingroup nrf_clock - * @brief Driver for managing the low-frequency clock (LFCLK) and the high-frequency clock (HFCLK). - */ - -/** - * @brief Clock events. - */ -typedef enum -{ - NRF_DRV_CLOCK_EVT_HFCLK_STARTED, ///< HFCLK has been started. - NRF_DRV_CLOCK_EVT_LFCLK_STARTED, ///< LFCLK has been started. - NRF_DRV_CLOCK_EVT_CAL_DONE, ///< Calibration is done. - NRF_DRV_CLOCK_EVT_CAL_ABORTED, ///< Calibration has been aborted. -} nrf_drv_clock_evt_type_t; - -/** - * @brief Clock event handler. - * - * @param[in] event Event. - */ -typedef void (*nrf_drv_clock_event_handler_t)(nrf_drv_clock_evt_type_t event); - -// Forward declaration of the nrf_drv_clock_handler_item_t type. -typedef struct nrf_drv_clock_handler_item_s nrf_drv_clock_handler_item_t; - -struct nrf_drv_clock_handler_item_s -{ - nrf_drv_clock_handler_item_t * p_next; ///< A pointer to the next handler that should be called when the clock is started. - nrf_drv_clock_event_handler_t event_handler; ///< Function to be called when the clock is started. -}; - -/** - * @brief Function for checking if driver is already initialized - * - * This function is used to check whatever common POWER_CLOCK common interrupt - * should be disabled or not if @ref nrf_drv_power tries to disable the interrupt. - * - * @retval true Driver is initialized - * @retval false Driver is uninitialized - */ -bool nrf_drv_clock_init_check(void); - -/** - * @brief Function for initializing the nrf_drv_clock module. - * - * After initialization, the module is in power off state (clocks are not requested). - * - * @retval NRF_SUCCESS If the procedure was successful. - * @retval NRF_ERROR_MODULE_ALREADY_INITIALIZED If the driver was already initialized. - */ -ret_code_t nrf_drv_clock_init(void); - -/** - * @brief Function for uninitializing the clock module. - * - */ -void nrf_drv_clock_uninit(void); - -/** - * @brief Function for requesting the LFCLK. - * - * The low-frequency clock can be requested by different modules - * or contexts. The driver ensures that the clock will be started only when it is requested - * the first time. If the clock is not ready but it was already started, the handler item that is - * provided as an input parameter is added to the list of handlers that will be notified - * when the clock is started. If the clock is already enabled, user callback is called from the - * current context. - * - * The first request will start the selected LFCLK source. If an event handler is - * provided, it will be called once the LFCLK is started. If the LFCLK was already started at this - * time, the event handler will be called from the context of this function. Additionally, - * the @ref nrf_drv_clock_lfclk_is_running function can be polled to check if the clock has started. - * - * @note When a SoftDevice is enabled, the LFCLK is always running and the driver cannot control it. - * - * @note The handler item provided by the user cannot be an automatic variable. - * - * @param[in] p_handler_item A pointer to the event handler structure. - */ -void nrf_drv_clock_lfclk_request(nrf_drv_clock_handler_item_t * p_handler_item); - -/** - * @brief Function for releasing the LFCLK. - * - * If there are no more requests, the LFCLK source will be stopped. - * - * @note When a SoftDevice is enabled, the LFCLK is always running. - */ -void nrf_drv_clock_lfclk_release(void); - -/** - * @brief Function for checking the LFCLK state. - * - * @retval true If the LFCLK is running. - * @retval false If the LFCLK is not running. - */ -bool nrf_drv_clock_lfclk_is_running(void); - -/** - * @brief Function for requesting the high-accuracy source HFCLK. - * - * The high-accuracy source - * can be requested by different modules or contexts. The driver ensures that the high-accuracy - * clock will be started only when it is requested the first time. If the clock is not ready - * but it was already started, the handler item that is provided as an input parameter is added - * to the list of handlers that will be notified when the clock is started. - * - * If an event handler is provided, it will be called once the clock is started. If the clock was already - * started at this time, the event handler will be called from the context of this function. Additionally, - * the @ref nrf_drv_clock_hfclk_is_running function can be polled to check if the clock has started. - * - * @note If a SoftDevice is running, the clock is managed by the SoftDevice and all requests are handled by - * the SoftDevice. This function cannot be called from all interrupt priority levels in that case. - * @note The handler item provided by the user cannot be an automatic variable. - * - * @param[in] p_handler_item A pointer to the event handler structure. - */ -void nrf_drv_clock_hfclk_request(nrf_drv_clock_handler_item_t * p_handler_item); - -/** - * @brief Function for releasing the high-accuracy source HFCLK. - * - * If there are no more requests, the high-accuracy source will be released. - */ -void nrf_drv_clock_hfclk_release(void); - -/** - * @brief Function for checking the HFCLK state. - * - * @retval true If the HFCLK is running (for \nRFXX XTAL source). - * @retval false If the HFCLK is not running. - */ -bool nrf_drv_clock_hfclk_is_running(void); - -/** - * @brief Function for starting a single calibration process. - * - * This function can also delay the start of calibration by a user-specified value. The delay will use - * a low-power timer that is part of the CLOCK module. @ref nrf_drv_clock_is_calibrating can be called to - * check if calibration is still in progress. If a handler is provided, the user can be notified when - * calibration is completed. The ext calibration can be started from the handler context. - * - * The calibration process consists of three phases: - * - Delay (optional) - * - Requesting the high-accuracy HFCLK - * - Hardware-supported calibration - * - * @param[in] delay Time after which the calibration will be started (in 0.25 s units). - * @param[in] handler NULL or user function to be called when calibration is completed or aborted. - * - * @retval NRF_SUCCESS If the procedure was successful. - * @retval NRF_ERROR_FORBIDDEN If a SoftDevice is present or the selected LFCLK source is not an RC oscillator. - * @retval NRF_ERROR_INVALID_STATE If the low-frequency clock is off. - * @retval NRF_ERROR_BUSY If calibration is in progress. - */ -ret_code_t nrf_drv_clock_calibration_start(uint8_t delay, nrf_drv_clock_event_handler_t handler); - -/** - * @brief Function for aborting calibration. - * - * This function aborts on-going calibration. If calibration was started, it cannot be stopped. If a handler - * was provided by @ref nrf_drv_clock_calibration_start, this handler will be called once - * aborted calibration is completed. @ref nrf_drv_clock_is_calibrating can also be used to check - * if the system is calibrating. - * - * @retval NRF_SUCCESS If the procedure was successful. - * @retval NRF_ERROR_FORBIDDEN If a SoftDevice is present or the selected LFCLK source is not an RC oscillator. - */ -ret_code_t nrf_drv_clock_calibration_abort(void); - -/** - * @brief Function for checking if calibration is in progress. - * - * This function indicates that the system is - * in calibration if it is in any of the calibration process phases (see @ref nrf_drv_clock_calibration_start). - * - * @param[out] p_is_calibrating True if calibration is in progress, false if not. - * - * @retval NRF_SUCCESS If the procedure was successful. - * @retval NRF_ERROR_FORBIDDEN If a SoftDevice is present or the selected LFCLK source is not an RC oscillator. - */ -ret_code_t nrf_drv_clock_is_calibrating(bool * p_is_calibrating); - -/**@brief Function for returning a requested task address for the clock driver module. - * - * @param[in] task One of the peripheral tasks. - * - * @return Task address. - */ -__STATIC_INLINE uint32_t nrf_drv_clock_ppi_task_addr(nrf_clock_task_t task); - -/**@brief Function for returning a requested event address for the clock driver module. - * - * @param[in] event One of the peripheral events. - * - * @return Event address. - */ -__STATIC_INLINE uint32_t nrf_drv_clock_ppi_event_addr(nrf_clock_event_t event); -/** - *@} - **/ - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION -__STATIC_INLINE uint32_t nrf_drv_clock_ppi_task_addr(nrf_clock_task_t task) -{ - return nrf_clock_task_address_get(task); -} - -__STATIC_INLINE uint32_t nrf_drv_clock_ppi_event_addr(nrf_clock_event_t event) -{ - return nrf_clock_event_address_get(event); -} -#endif //SUPPRESS_INLINE_IMPLEMENTATION - -/*lint --flb "Leave library region" */ - -#ifdef __cplusplus -} -#endif - -#endif // NRF_CLOCK_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/common/nrf_drv_common.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/common/nrf_drv_common.c deleted file mode 100644 index 8d93e97f604..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/common/nrf_drv_common.c +++ /dev/null @@ -1,297 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include -#include "nrf_drv_common.h" -#include "nrf_assert.h" -#include "app_util_platform.h" -#include "nrf_peripherals.h" - -#if NRF_DRV_COMMON_POWER_CLOCK_ISR -#include "nrf_drv_power.h" -#include "nrf_drv_clock.h" -#endif -#ifdef SOFTDEVICE_PRESENT -#include "nrf_soc.h" -#endif - -#if NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - -#define NRF_LOG_MODULE_NAME common - -#if COMMON_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL COMMON_CONFIG_LOG_LEVEL -#define NRF_LOG_INFO_COLOR COMMON_CONFIG_INFO_COLOR -#define NRF_LOG_DEBUG_COLOR COMMON_CONFIG_DEBUG_COLOR -#else //COMMON_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL 0 -#endif //COMMON_CONFIG_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - - -typedef struct { - nrf_drv_irq_handler_t handler; - bool acquired; -} shared_resource_t; - -// SPIM0, SPIS0, SPI0, TWIM0, TWIS0, TWI0 -#if (NRF_MODULE_ENABLED(SPI0) || NRF_MODULE_ENABLED(SPIS0) || NRF_MODULE_ENABLED(TWI0) || NRF_MODULE_ENABLED(TWIS0)) - #define SERIAL_BOX_0_IN_USE - // [this checking may need a different form in unit tests, hence macro] - #ifndef IS_SERIAL_BOX_0 - #define IS_SERIAL_BOX_0(p_per_base) (p_per_base == NRF_SPI0) - #endif - - static shared_resource_t m_serial_box_0 = { .acquired = false }; - void SPI0_TWI0_IRQHandler(void) - { - ASSERT(m_serial_box_0.handler); - m_serial_box_0.handler(); - } -#endif // (NRF_MODULE_ENABLED(SPI0) || NRF_MODULE_ENABLED(SPIS0) || NRF_MODULE_ENABLED(TWI0) || NRF_MODULE_ENABLED(TWIS0)) - -// SPIM1, SPIS1, SPI1, TWIM1, TWIS1, TWI1 -#if (NRF_MODULE_ENABLED(SPI1) || NRF_MODULE_ENABLED(SPIS1) || NRF_MODULE_ENABLED(TWI1) || NRF_MODULE_ENABLED(TWIS1)) - #define SERIAL_BOX_1_IN_USE - // [this checking may need a different form in unit tests, hence macro] - #ifndef IS_SERIAL_BOX_1 - #define IS_SERIAL_BOX_1(p_per_base) (p_per_base == NRF_SPI1) - #endif - - static shared_resource_t m_serial_box_1 = { .acquired = false }; -#ifdef TWIM_PRESENT - void SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler(void) -#else - void SPI1_TWI1_IRQHandler(void) -#endif - { - ASSERT(m_serial_box_1.handler); - m_serial_box_1.handler(); - } -#endif // (NRF_MODULE_ENABLED(SPI1) || NRF_MODULE_ENABLED(SPIS1) || NRF_MODULE_ENABLED(TWI1) || NRF_MODULE_ENABLED(TWIS1)) - -// SPIM2, SPIS2, SPI2 -#if (NRF_MODULE_ENABLED(SPI2) || NRF_MODULE_ENABLED(SPIS2)) - #define SERIAL_BOX_2_IN_USE - // [this checking may need a different form in unit tests, hence macro] - #ifndef IS_SERIAL_BOX_2 - #define IS_SERIAL_BOX_2(p_per_base) (p_per_base == NRF_SPI2) - #endif - - static shared_resource_t m_serial_box_2 = { .acquired = false }; - void SPIM2_SPIS2_SPI2_IRQHandler(void) - { - ASSERT(m_serial_box_2.handler); - m_serial_box_2.handler(); - } -#endif // (NRF_MODULE_ENABLED(SPI2) || NRF_MODULE_ENABLED(SPIS2)) - -// COMP, LPCOMP -#if (NRF_MODULE_ENABLED(COMP) || NRF_MODULE_ENABLED(LPCOMP)) - #define COMP_LPCOMP_IN_USE - - #ifndef IS_COMP_LPCOMP - #define IS_COMP_LPCOMP(p_per_base) ((p_per_base) == NRF_LPCOMP) - #endif - - static shared_resource_t m_comp_lpcomp = { .acquired = false }; - void LPCOMP_IRQHandler(void) - { - ASSERT(m_comp_lpcomp.handler); - m_comp_lpcomp.handler(); - } -#endif // (NRF_MODULE_ENABLED(COMP) || NRF_MODULE_ENABLED(LPCOMP)) - -#if defined(SERIAL_BOX_0_IN_USE) || \ - defined(SERIAL_BOX_1_IN_USE) || \ - defined(SERIAL_BOX_2_IN_USE) || \ - defined(COMP_LPCOMP_IN_USE) -static ret_code_t acquire_shared_resource(shared_resource_t * p_resource, - nrf_drv_irq_handler_t handler) -{ - ret_code_t err_code; - - bool busy = false; - - CRITICAL_REGION_ENTER(); - if (p_resource->acquired) - { - busy = true; - } - else - { - p_resource->acquired = true; - } - CRITICAL_REGION_EXIT(); - - if (busy) - { - err_code = NRF_ERROR_BUSY; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - p_resource->handler = handler; - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} -#endif - -ret_code_t nrf_drv_common_per_res_acquire(void const * p_per_base, - nrf_drv_irq_handler_t handler) -{ -#ifdef SERIAL_BOX_0_IN_USE - if (IS_SERIAL_BOX_0(p_per_base)) - { - return acquire_shared_resource(&m_serial_box_0, handler); - } -#endif - -#ifdef SERIAL_BOX_1_IN_USE - if (IS_SERIAL_BOX_1(p_per_base)) - { - return acquire_shared_resource(&m_serial_box_1, handler); - } -#endif - -#ifdef SERIAL_BOX_2_IN_USE - if (IS_SERIAL_BOX_2(p_per_base)) - { - return acquire_shared_resource(&m_serial_box_2, handler); - } -#endif - -#ifdef COMP_LPCOMP_IN_USE - if (IS_COMP_LPCOMP(p_per_base)) - { - return acquire_shared_resource(&m_comp_lpcomp, handler); - } -#endif - ret_code_t err_code; - - err_code = NRF_ERROR_INVALID_PARAM; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - -void nrf_drv_common_per_res_release(void const * p_per_base) -{ -#ifdef SERIAL_BOX_0_IN_USE - if (IS_SERIAL_BOX_0(p_per_base)) - { - m_serial_box_0.acquired = false; - } - else -#endif - -#ifdef SERIAL_BOX_1_IN_USE - if (IS_SERIAL_BOX_1(p_per_base)) - { - m_serial_box_1.acquired = false; - } - else -#endif - -#ifdef SERIAL_BOX_2_IN_USE - if (IS_SERIAL_BOX_2(p_per_base)) - { - m_serial_box_2.acquired = false; - } - else -#endif - -#ifdef COMP_LPCOMP_IN_USE - if (IS_COMP_LPCOMP(p_per_base)) - { - m_comp_lpcomp.acquired = false; - } - else -#endif - - {} -} - -#endif // NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - -#if NRF_MODULE_ENABLED(POWER) -void nrf_drv_common_power_irq_disable(void) -{ -#if NRF_DRV_COMMON_POWER_CLOCK_ISR - if (!nrf_drv_clock_init_check()) -#endif - { - nrf_drv_common_irq_disable(POWER_CLOCK_IRQn); - } -} -#endif - -#if NRF_MODULE_ENABLED(CLOCK) -void nrf_drv_common_clock_irq_disable(void) -{ -#if NRF_DRV_COMMON_POWER_CLOCK_ISR - if (!nrf_drv_power_init_check()) -#endif - { - nrf_drv_common_irq_disable(POWER_CLOCK_IRQn); - } -} -#endif - -#if NRF_DRV_COMMON_POWER_CLOCK_ISR -void POWER_CLOCK_IRQHandler(void) -{ - extern void nrf_drv_clock_onIRQ(void); - extern void nrf_drv_power_onIRQ(void); - - nrf_drv_clock_onIRQ(); - nrf_drv_power_onIRQ(); -} -#endif // NRF_DRV_COMMON_POWER_CLOCK_ISR - - -void nrf_drv_common_irq_enable(IRQn_Type IRQn, uint8_t priority) -{ - INTERRUPT_PRIORITY_ASSERT(priority); - - NVIC_SetPriority(IRQn, priority); - NVIC_ClearPendingIRQ(IRQn); - NVIC_EnableIRQ(IRQn); -} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/common/nrf_drv_common.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/common/nrf_drv_common.h deleted file mode 100644 index cdf866a5cca..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/common/nrf_drv_common.h +++ /dev/null @@ -1,358 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_DRV_COMMON_H__ -#define NRF_DRV_COMMON_H__ - -#include -#include -#include "nrf.h" -#include "sdk_errors.h" -#include "sdk_common.h" -#include "nrf_assert.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef NRF51 -#ifdef SOFTDEVICE_PRESENT -#define INTERRUPT_PRIORITY_IS_VALID(pri) (((pri) == 1) || ((pri) == 3)) -#else -#define INTERRUPT_PRIORITY_IS_VALID(pri) ((pri) < 4) -#endif //SOFTDEVICE_PRESENT -#else -#ifdef SOFTDEVICE_PRESENT -#define INTERRUPT_PRIORITY_IS_VALID(pri) ((((pri) > 1) && ((pri) < 4)) || \ - (((pri) > 4) && ((pri) < 8))) -#else -#define INTERRUPT_PRIORITY_IS_VALID(pri) ((pri) < 8) -#endif //SOFTDEVICE_PRESENT -#endif //NRF52 - -#define INTERRUPT_PRIORITY_VALIDATION(pri) STATIC_ASSERT(INTERRUPT_PRIORITY_IS_VALID((pri))) -#define INTERRUPT_PRIORITY_ASSERT(pri) ASSERT(INTERRUPT_PRIORITY_IS_VALID((pri))) - -/** - * @defgroup nrf_drv_common Peripheral drivers common module - * @{ - * @ingroup nrf_drivers - */ - -/** - * @brief Offset of event registers in every peripheral instance. - * - * This is the offset where event registers start in every peripheral. - */ -#define NRF_DRV_COMMON_EVREGS_OFFSET 0x100U - -/** - * @brief The flag that is set when POWER_CLOCK ISR is implemented in common module - * - * This flag means that the function POWER_CLOCK_IRQHandler is implemented in - * nrf_drv_common.c file. In the @c clock and @c power modules functions - * nrf_drv_clock_onIRQ nrf_drv_power_onIRQ should be implemented - * and they would be called from common implementation. - * - * None of the checking is done here. - * The implementation functions in @c clock and @c power are required to handle - * correctly the case when they are called without any event bit set. - */ -#define NRF_DRV_COMMON_POWER_CLOCK_ISR (NRF_MODULE_ENABLED(CLOCK) && NRF_MODULE_ENABLED(POWER)) - -/** - * @brief Driver state. - */ -typedef enum -{ - NRF_DRV_STATE_UNINITIALIZED, /**< Uninitialized. */ - NRF_DRV_STATE_INITIALIZED, /**< Initialized but powered off. */ - NRF_DRV_STATE_POWERED_ON -} nrf_drv_state_t; - -/** - * @brief Driver power state selection. - */ -typedef enum -{ - NRF_DRV_PWR_CTRL_ON, /**< Power on request. */ - NRF_DRV_PWR_CTRL_OFF /**< Power off request. */ -} nrf_drv_pwr_ctrl_t; - -/** - * @brief IRQ handler type. - */ -typedef void (*nrf_drv_irq_handler_t)(void); - - -#if NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - -/** - * @brief Function for acquiring shared peripheral resources associated with - * the specified peripheral. - * - * Certain resources and registers are shared among peripherals that have - * the same ID (for example: SPI0, SPIM0, SPIS0, TWI0, TWIM0, and TWIS0). - * Only one of them can be utilized at a given time. This function reserves - * proper resources to be used by the specified peripheral. - * If PERIPHERAL_RESOURCE_SHARING_ENABLED is set to a non-zero value, IRQ - * handlers for peripherals that are sharing resources with others are - * implemented by the nrf_drv_common module instead of individual drivers. - * The drivers must then specify their interrupt handling routines and - * register them by using this function. - * - * @param[in] p_per_base Requested peripheral base pointer. - * @param[in] handler Interrupt handler to register. May be NULL - * if interrupts are not used for the peripheral. - * - * @retval NRF_SUCCESS If resources were acquired successfully. - * @retval NRF_ERROR_BUSY If resources were already acquired. - * @retval NRF_ERROR_INVALID_PARAM If the specified peripheral is not enabled - * or the peripheral does not share resources - * with other peripherals. - */ -ret_code_t nrf_drv_common_per_res_acquire(void const * p_per_base, - nrf_drv_irq_handler_t handler); - -/** - * @brief Function for releasing shared resources reserved previously by - * @ref nrf_drv_common_per_res_acquire() for the specified peripheral. - * - * @param[in] p_per_base Requested peripheral base pointer. - */ -void nrf_drv_common_per_res_release(void const * p_per_base); - -#endif // NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - - -/** - * @brief Function sets priority and enables NVIC interrupt - * - * @note Function checks if correct priority is used when softdevice is present - * - * @param[in] IRQn Interrupt id - * @param[in] priority Interrupt priority - */ -void nrf_drv_common_irq_enable(IRQn_Type IRQn, uint8_t priority); - -#if NRF_MODULE_ENABLED(POWER) -/** - * @brief Disable power IRQ - * - * Power and clock peripheral uses the same IRQ. - * This function disables POWER_CLOCK IRQ only if CLOCK driver - * is uninitialized. - * - * @sa nrf_drv_common_power_clock_irq_init - */ -void nrf_drv_common_power_irq_disable(void); -#endif - -#if NRF_MODULE_ENABLED(CLOCK) -/** - * @brief Disable clock IRQ - * - * Power and clock peripheral uses the same IRQ. - * This function disables POWER_CLOCK IRQ only if POWER driver - * is uninitialized. - * - * @sa nrf_drv_common_power_clock_irq_init - */ -void nrf_drv_common_clock_irq_disable(void); -#endif - -/** - * @brief Check if interrupt is enabled - * - * Function that checks if selected interrupt is enabled. - * - * @param[in] IRQn Interrupt id - * - * @retval true Selected IRQ is enabled. - * @retval false Selected IRQ is disabled. - */ -__STATIC_INLINE bool nrf_drv_common_irq_enable_check(IRQn_Type IRQn); - -/** - * @brief Function disables NVIC interrupt - * - * @param[in] IRQn Interrupt id - */ -__STATIC_INLINE void nrf_drv_common_irq_disable(IRQn_Type IRQn); - -/** - * @brief Convert bit position to event code - * - * Function for converting the bit position in INTEN register to event code - * that is equivalent to the offset of the event register from the beginning - * of peripheral instance. - * - * For example the result of this function can be casted directly to - * the types like @ref nrf_twis_event_t or @ref nrf_rng_event_t - * - * @param bit Bit position in INTEN register - * @return Event code to be casted to the right enum type or to be used in functions like - * @ref nrf_rng_event_get - * - * @sa nrf_drv_event_to_bitpos - */ -__STATIC_INLINE uint32_t nrf_drv_bitpos_to_event(uint32_t bit); - -/** - * @brief Convert event code to bit position - * - * This function can be used to get bit position in INTEN register from event code. - * - * @param event Event code that may be casted from enum values from types like - * @ref nrf_twis_event_t or @ref nrf_rng_event_t - * @return Bit position in INTEN register that corresponds to the given code. - * - * @sa nrf_drv_bitpos_to_event - */ -__STATIC_INLINE uint32_t nrf_drv_event_to_bitpos(uint32_t event); - -/** - * @brief Get interrupt number connected with given instance - * - * Function returns interrupt number for a given instance of any peripheral. - * @param[in] pinst Pointer to peripheral registry - * @return Interrupt number - */ -__STATIC_INLINE IRQn_Type nrf_drv_get_IRQn(void const * const pinst); - -#if NRF_MODULE_ENABLED(CLOCK) || NRF_MODULE_ENABLED(POWER) -/** - * @brief Enable and setup power clock IRQ - * - * This function would be called from @ref nrf_drv_clock and @ref nrf_drv_power - * to enable related interrupt. - * This function avoids multiple interrupt configuration. - * - * @note - * This function is aviable only if @ref nrf_drv_clock or @ref nrf_drv_power - * module is enabled. - * - * @note - * If both @ref nrf_drv_clock and @ref nrf_drv_power modules are enabled, - * during the compilation the check is made that - * @ref CLOCK_CONFIG_IRQ_PRIORITY equals @ref POWER_CONFIG_IRQ_PRIORITY. - * - * @sa nrf_drv_common_power_irq_disable - * @sa nrf_drv_common_clock_irq_disable - */ -__STATIC_INLINE void nrf_drv_common_power_clock_irq_init(void); -#endif - -/** - * @brief Check if given object is in RAM - * - * Function for analyzing if given location is placed in RAM. - * This function is used to determine if we have address that can be supported by EasyDMA. - * @param[in] ptr Pointer to the object - * @retval true Object is located in RAM - * @retval false Object is not located in RAM - */ -__STATIC_INLINE bool nrf_drv_is_in_RAM(void const * const ptr); - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE bool nrf_drv_common_irq_enable_check(IRQn_Type IRQn) -{ - return 0 != (NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] & - (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))); -} - -__STATIC_INLINE void nrf_drv_common_irq_disable(IRQn_Type IRQn) -{ - NVIC_DisableIRQ(IRQn); -} - -__STATIC_INLINE uint32_t nrf_drv_bitpos_to_event(uint32_t bit) -{ - return NRF_DRV_COMMON_EVREGS_OFFSET + bit * sizeof(uint32_t); -} - -__STATIC_INLINE uint32_t nrf_drv_event_to_bitpos(uint32_t event) -{ - return (event - NRF_DRV_COMMON_EVREGS_OFFSET) / sizeof(uint32_t); -} - -__STATIC_INLINE IRQn_Type nrf_drv_get_IRQn(void const * const pinst) -{ - uint8_t ret = (uint8_t)((uint32_t)pinst>>12U); - return (IRQn_Type) ret; -} - -#if NRF_MODULE_ENABLED(CLOCK) || NRF_MODULE_ENABLED(POWER) -__STATIC_INLINE void nrf_drv_common_power_clock_irq_init(void) -{ - if (!nrf_drv_common_irq_enable_check(POWER_CLOCK_IRQn)) - { - nrf_drv_common_irq_enable( - POWER_CLOCK_IRQn, -#if NRF_DRV_COMMON_POWER_CLOCK_ISR - #if CLOCK_CONFIG_IRQ_PRIORITY != POWER_CONFIG_IRQ_PRIORITY - #error CLOCK_CONFIG_IRQ_PRIORITY and POWER_CONFIG_IRQ_PRIORITY have to be the same. - #endif - CLOCK_CONFIG_IRQ_PRIORITY -#elif NRF_MODULE_ENABLED(CLOCK) - CLOCK_CONFIG_IRQ_PRIORITY -#elif NRF_MODULE_ENABLED(POWER) - POWER_CONFIG_IRQ_PRIORITY -#endif - ); - } -} -#endif - -__STATIC_INLINE bool nrf_drv_is_in_RAM(void const * const ptr) -{ - return ((((uintptr_t)ptr) & 0xE0000000u) == 0x20000000u); -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_DRV_COMMON_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/comp/nrf_drv_comp.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/comp/nrf_drv_comp.c deleted file mode 100644 index 90d56e07302..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/comp/nrf_drv_comp.c +++ /dev/null @@ -1,239 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(COMP) -#include "nrf_drv_comp.h" - -#include "nrf_assert.h" -#include "nrf_error.h" -#include "nrf_soc.h" -#include "nrf_drv_common.h" -#include "app_util_platform.h" -#include -#include -#include - -#define NRF_LOG_MODULE_NAME comp - -#if COMP_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL COMP_CONFIG_LOG_LEVEL -#define NRF_LOG_INFO_COLOR COMP_CONFIG_INFO_COLOR -#define NRF_LOG_DEBUG_COLOR COMP_CONFIG_DEBUG_COLOR -#define EVT_TO_STR(event) (event == NRF_COMP_EVENT_READY ? "NRF_COMP_EVENT_READY" : \ - (event == NRF_COMP_EVENT_DOWN ? "NRF_COMP_EVENT_DOWN" : \ - (event == NRF_COMP_EVENT_UP ? "NRF_COMP_EVENT_UP" : \ - (event == NRF_COMP_EVENT_CROSS ? "NRF_COMP_EVENT_CROSS" : "UNKNOWN ERROR")))) -#else //COMP_CONFIG_LOG_ENABLED -#define EVT_TO_STR(event) "" -#define NRF_LOG_LEVEL 0 -#endif //COMP_CONFIG_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - - - -static comp_events_handler_t m_comp_events_handler = NULL; -static nrf_drv_state_t m_state = NRF_DRV_STATE_UNINITIALIZED; - -static const nrf_drv_comp_config_t m_default_config = NRF_DRV_COMP_DEFAULT_CONFIG(NRF_COMP_INPUT_0); - -static void comp_execute_handler(nrf_comp_event_t event, uint32_t event_mask) -{ - if ( nrf_comp_event_check(event) && nrf_comp_int_enable_check(event_mask) ) - { - nrf_comp_event_clear(event); - NRF_LOG_DEBUG("Event: %s.", (uint32_t)EVT_TO_STR(event)); - - m_comp_events_handler(event); - } -} - -#if NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - #define IRQ_HANDLER_NAME irq_handler_for_comp - #define IRQ_HANDLER static void IRQ_HANDLER_NAME(void) - - IRQ_HANDLER; -#else - #define IRQ_HANDLER void COMP_LPCOMP_IRQHandler(void) -#endif // NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - -IRQ_HANDLER -{ - comp_execute_handler(NRF_COMP_EVENT_READY, COMP_INTENSET_READY_Msk); - comp_execute_handler(NRF_COMP_EVENT_DOWN, COMP_INTENSET_DOWN_Msk); - comp_execute_handler(NRF_COMP_EVENT_UP, COMP_INTENSET_UP_Msk); - comp_execute_handler(NRF_COMP_EVENT_CROSS, COMP_INTENSET_CROSS_Msk); -} - - -ret_code_t nrf_drv_comp_init(const nrf_drv_comp_config_t * p_config, - comp_events_handler_t event_handler) -{ - ret_code_t err_code; - - if (m_state != NRF_DRV_STATE_UNINITIALIZED) - { // COMP driver is already initialized - err_code = NRF_ERROR_INVALID_STATE; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - if (p_config == NULL) - { - p_config = &m_default_config; - } - -#if NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - if (nrf_drv_common_per_res_acquire(NRF_COMP, IRQ_HANDLER_NAME) != NRF_SUCCESS) - { - err_code = NRF_ERROR_BUSY; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } -#endif - - nrf_comp_task_trigger(NRF_COMP_TASK_STOP); - nrf_comp_enable(); - - // Clear events to be sure there are no leftovers. - nrf_comp_event_clear(NRF_COMP_EVENT_READY); - nrf_comp_event_clear(NRF_COMP_EVENT_DOWN); - nrf_comp_event_clear(NRF_COMP_EVENT_UP); - nrf_comp_event_clear(NRF_COMP_EVENT_CROSS); - - nrf_comp_ref_set(p_config->reference); - - //If external source is chosen, write to appropriate register. - if (p_config->reference == COMP_REFSEL_REFSEL_ARef) - { - nrf_comp_ext_ref_set(p_config->ext_ref); - } - - nrf_comp_th_set(p_config->threshold); - nrf_comp_main_mode_set(p_config->main_mode); - nrf_comp_speed_mode_set(p_config->speed_mode); - nrf_comp_hysteresis_set(p_config->hyst); -#if defined (COMP_ISOURCE_ISOURCE_Msk) - nrf_comp_isource_set(p_config->isource); -#endif - nrf_comp_shorts_disable(NRF_DRV_COMP_SHORT_STOP_AFTER_CROSS_EVT | NRF_DRV_COMP_SHORT_STOP_AFTER_UP_EVT | - NRF_DRV_COMP_SHORT_STOP_AFTER_DOWN_EVT); - nrf_comp_int_disable(COMP_INTENCLR_CROSS_Msk | COMP_INTENCLR_UP_Msk | - COMP_INTENCLR_DOWN_Msk | COMP_INTENCLR_READY_Msk); - - if (event_handler) - { - m_comp_events_handler = event_handler; - } - else - { - err_code = NRF_ERROR_INVALID_PARAM; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - nrf_comp_input_select(p_config->input); - - nrf_drv_common_irq_enable(COMP_LPCOMP_IRQn, p_config->interrupt_priority); - - m_state = NRF_DRV_STATE_INITIALIZED; - - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -void nrf_drv_comp_uninit(void) -{ - ASSERT(m_state != NRF_DRV_STATE_UNINITIALIZED); - nrf_drv_common_irq_disable(COMP_LPCOMP_IRQn); - nrf_comp_disable(); -#if NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - nrf_drv_common_per_res_release(NRF_COMP); -#endif - m_state = NRF_DRV_STATE_UNINITIALIZED; - m_comp_events_handler = NULL; - NRF_LOG_INFO("Uninitialized."); -} - -void nrf_drv_comp_pin_select(nrf_comp_input_t psel) -{ - bool comp_enable_state = nrf_comp_enable_check(); - nrf_comp_task_trigger(NRF_COMP_TASK_STOP); - if (m_state == NRF_DRV_STATE_POWERED_ON) - { - m_state = NRF_DRV_STATE_INITIALIZED; - } - nrf_comp_disable(); - nrf_comp_input_select(psel); - if (comp_enable_state == true) - { - nrf_comp_enable(); - } -} - -void nrf_drv_comp_start(uint32_t comp_int_mask, uint32_t comp_shorts_mask) -{ - ASSERT(m_state == NRF_DRV_STATE_INITIALIZED); - nrf_comp_int_enable(comp_int_mask); - nrf_comp_shorts_enable(comp_shorts_mask); - nrf_comp_task_trigger(NRF_COMP_TASK_START); - m_state = NRF_DRV_STATE_POWERED_ON; - NRF_LOG_INFO("Enabled."); -} - -void nrf_drv_comp_stop(void) -{ - ASSERT(m_state == NRF_DRV_STATE_POWERED_ON); - nrf_comp_shorts_disable(UINT32_MAX); - nrf_comp_int_disable(UINT32_MAX); - nrf_comp_task_trigger(NRF_COMP_TASK_STOP); - m_state = NRF_DRV_STATE_INITIALIZED; - NRF_LOG_INFO("Disabled."); -} - -uint32_t nrf_drv_comp_sample() -{ - ASSERT(m_state == NRF_DRV_STATE_POWERED_ON); - nrf_comp_task_trigger(NRF_COMP_TASK_SAMPLE); - return nrf_comp_result_get(); -} -#endif //NRF_MODULE_ENABLED(COMP) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/comp/nrf_drv_comp.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/comp/nrf_drv_comp.h deleted file mode 100644 index 3c03c1d8d2e..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/comp/nrf_drv_comp.h +++ /dev/null @@ -1,258 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_DRV_COMP_H__ -#define NRF_DRV_COMP_H__ - -#include "sdk_config.h" -#include "nrf_comp.h" -#include "sdk_errors.h" -#include "nrf_drv_common.h" -#include "app_util_platform.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @addtogroup nrf_comp COMP HAL and driver - * @ingroup nrf_drivers - * @brief @tagAPI52 Comparator (COMP) APIs. - * @details The COMP HAL provides basic APIs for accessing the registers of Comparator. - * The COMP driver provides APIs on a higher level. - * - * @defgroup nrf_drv_comp COMP driver - * @{ - * @ingroup nrf_comp - * @brief @tagAPI52 Comparator (COMP) driver. - */ - -/** - * @brief Macro to convert the threshold voltage to an integer value (needed by the COMP_TH register). - * - * @param[in] vol Voltage to be changed to COMP_TH register value. This value must not be smaller than - * reference voltage divided by 64. - * @param[in] ref Reference voltage. - */ -#define VOLTAGE_THRESHOLD_TO_INT(vol, ref) (uint8_t)(((vol) > ((ref) / 64)) ? (ROUNDED_DIV((vol) * 64,(ref)) - 1) : 0) - -/**@brief COMP event handler function type. - * @param[in] event COMP event. - */ -typedef void (* comp_events_handler_t)(nrf_comp_event_t event); - -/** - * @enum nrf_drv_comp_short_mask_t - * @brief COMP shortcut masks. - */ -typedef enum -{ - NRF_DRV_COMP_SHORT_STOP_AFTER_CROSS_EVT = COMP_SHORTS_CROSS_STOP_Msk, /*!< Shortcut between the CROSS event and the STOP task. */ - NRF_DRV_COMP_SHORT_STOP_AFTER_UP_EVT = COMP_SHORTS_UP_STOP_Msk, /*!< Shortcut between the UP event and the STOP task. */ - NRF_DRV_COMP_SHORT_STOP_AFTER_DOWN_EVT = COMP_SHORTS_DOWN_STOP_Msk /*!< Shortcut between the DOWN event and the STOP task. */ -}nrf_drv_comp_short_mask_t; - -/** - * @enum nrf_drv_comp_evt_en_mask_t - * @brief COMP events masks. - */ -typedef enum -{ - NRF_DRV_COMP_EVT_EN_CROSS_MASK = COMP_INTENSET_CROSS_Msk, /*!< CROSS event (generated after VIN+ == VIN-). */ - NRF_DRV_COMP_EVT_EN_UP_MASK = COMP_INTENSET_UP_Msk, /*!< UP event (generated when VIN+ crosses VIN- while increasing). */ - NRF_DRV_COMP_EVT_EN_DOWN_MASK = COMP_INTENSET_DOWN_Msk, /*!< DOWN event (generated when VIN+ crosses VIN- while decreasing). */ - NRF_DRV_COMP_EVT_EN_READY_MASK = COMP_INTENSET_READY_Msk /*!< READY event (generated when the module is ready). */ -}nrf_drv_comp_evt_en_mask_t; - -/**@brief COMP configuration. - */ -typedef struct -{ - nrf_comp_ref_t reference; /**< Reference selection. */ - nrf_comp_ext_ref_t ext_ref; /**< External analog reference selection. */ - nrf_comp_main_mode_t main_mode; /**< Main operation mode. */ - nrf_comp_th_t threshold; /**< Structure holding THDOWN and THUP values needed by the COMP_TH register. */ - nrf_comp_sp_mode_t speed_mode; /**< Speed and power mode. */ - nrf_comp_hyst_t hyst; /**< Comparator hysteresis.*/ -#if defined (COMP_ISOURCE_ISOURCE_Msk) || defined (__SDK_DOXYGEN__) - nrf_isource_t isource; /**< Current source selected on analog input. */ -#endif - nrf_comp_input_t input; /**< Input to be monitored. */ - uint8_t interrupt_priority; /**< Interrupt priority. */ -} nrf_drv_comp_config_t; - -/** @brief COMP threshold default configuration. */ -#define COMP_CONFIG_TH \ -{ \ - .th_down = VOLTAGE_THRESHOLD_TO_INT(0.5, 1.8), \ - .th_up = VOLTAGE_THRESHOLD_TO_INT(1.5, 1.8) \ -} - -/** @brief COMP driver default configuration including the COMP HAL configuration. */ -#if defined (COMP_ISOURCE_ISOURCE_Msk) -#define NRF_DRV_COMP_DEFAULT_CONFIG(INPUT) \ -{ \ - .reference = (nrf_comp_ref_t)COMP_CONFIG_REF, \ - .main_mode = (nrf_comp_main_mode_t)COMP_CONFIG_MAIN_MODE, \ - .threshold = COMP_CONFIG_TH, \ - .speed_mode = (nrf_comp_sp_mode_t)COMP_CONFIG_SPEED_MODE, \ - .hyst = (nrf_comp_hyst_t)COMP_CONFIG_HYST, \ - .isource = (nrf_isource_t)COMP_CONFIG_ISOURCE, \ - .input = (nrf_comp_input_t)INPUT, \ - .interrupt_priority = COMP_CONFIG_IRQ_PRIORITY \ -} -#else -#define NRF_DRV_COMP_DEFAULT_CONFIG(INPUT) \ -{ \ - .reference = (nrf_comp_ref_t)COMP_CONFIG_REF, \ - .main_mode = (nrf_comp_main_mode_t)COMP_CONFIG_MAIN_MODE, \ - .threshold = COMP_CONFIG_TH, \ - .speed_mode = (nrf_comp_sp_mode_t)COMP_CONFIG_SPEED_MODE, \ - .hyst = (nrf_comp_hyst_t)COMP_CONFIG_HYST, \ - .input = (nrf_comp_input_t)INPUT, \ - .interrupt_priority = COMP_CONFIG_IRQ_PRIORITY \ -} -#endif - -/** - * @brief Function for initializing the COMP driver. - * - * This function initializes the COMP driver, but does not enable the peripheral or any interrupts. - * To start the driver, call the function @ref nrf_drv_comp_start() after initialization. - * - * If no configuration structure is provided, the driver is initialized with the default settings. - * - * @param[in] p_config Initial configuration. If NULL, the default configuration is used. - * @param[in] event_handler Handler function. - * - * @retval NRF_ERROR_INVALID_PARAM If the configuration is invalid. - * @retval NRF_ERROR_INVALID_STATE If the driver has already been initialized. - * @retval NRF_ERROR_BUSY If the LPCOMP driver is initialized. - */ -ret_code_t nrf_drv_comp_init(const nrf_drv_comp_config_t * p_config, - comp_events_handler_t event_handler); - - -/** - * @brief Function for uninitializing the COMP driver. - * - * This function uninitializes the COMP driver. The COMP peripheral and - * its interrupts are disabled, and local variables are cleaned. After this call, you must - * initialize the driver again by calling nrf_drv_comp_init() if you want to use it. - * - * @sa nrf_drv_comp_stop() - */ -void nrf_drv_comp_uninit(void); - -/** - * @brief Function for setting the analog input. - * - * @param[in] psel COMP analog pin selection. - */ -void nrf_drv_comp_pin_select(nrf_comp_input_t psel); - -/** - * @brief Function for starting the COMP peripheral and interrupts. - * - * Before calling this function, the driver must be initialized. This function - * enables the COMP peripheral and its interrupts. - * - * @param[in] comp_evt_en_mask Mask of events to be enabled. This parameter should be built as - * 'or' of elements from @ref nrf_drv_comp_evt_en_mask_t. - * @param[in] comp_shorts_mask Mask of shorts to be enabled. This parameter should be built as - * 'or' of elements from @ref nrf_drv_comp_short_mask_t. - * - * @sa nrf_drv_comp_init() - * - */ -void nrf_drv_comp_start(uint32_t comp_evt_en_mask, uint32_t comp_shorts_mask); - -/**@brief Function for stopping the COMP peripheral. - * - * Before calling this function, the driver must be enabled. This function disables the COMP - * peripheral and its interrupts. - * - * @sa nrf_drv_comp_uninit() - * - */ -void nrf_drv_comp_stop(void); - -/** - * @brief Function for copying the current state of the comparator result to the RESULT register. - * - * @retval 0 If the input voltage is below the threshold (VIN+ < VIN-). - * @retval 1 If the input voltage is above the threshold (VIN+ > VIN-). - */ -uint32_t nrf_drv_comp_sample(void); - -/** - * @brief Function for getting the task address. - * - * Before calling this function, the driver must be enabled. - * - * @param[in] comp_task COMP task. - * - * @return Address of the given COMP task. - */ -__STATIC_INLINE uint32_t nrf_drv_comp_task_address_get(nrf_comp_task_t comp_task) -{ - return (uint32_t)nrf_comp_task_address_get(comp_task); -} - -/** - * @brief Function for getting the event address. - * - * @param[in] comp_event COMP event. - * - * @return Address of the given COMP event. - */ -__STATIC_INLINE uint32_t nrf_drv_comp_event_address_get(nrf_comp_event_t comp_event) -{ - return (uint32_t)nrf_comp_event_address_get(comp_event); -} - -/** - *@} - **/ - - -#ifdef __cplusplus -} -#endif -#endif /* NRF_DRV_COMP_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/delay/nrf_delay.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/delay/nrf_delay.h deleted file mode 100644 index 0a62f7db254..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/delay/nrf_delay.h +++ /dev/null @@ -1,269 +0,0 @@ -/** - * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef _NRF_DELAY_H -#define _NRF_DELAY_H - -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#define CLOCK_FREQ_16MHz (16000000UL) - -#ifdef NRF52_SERIES - #define CPU_FREQ_64MHz -#endif - -/** - * @brief Function for delaying execution for number of microseconds. - * - * @note NRF52 has instruction cache and because of that delay is not precise. - * - * @param number_of_us - * - */ -/*lint -e{438, 522, 40, 10, 563} */ -__STATIC_INLINE void nrf_delay_us(uint32_t number_of_us); - - -/** - * @brief Function for delaying execution for number of miliseconds. - * - * @note NRF52 has instruction cache and because of that delay is not precise. - * - * @note Function internally calls @ref nrf_delay_us so the maximum delay is the - * same as in case of @ref nrf_delay_us, approx. 71 minutes. - * - * @param number_of_ms - * - */ - -/*lint -e{438, 522, 40, 10, 563} */ -__STATIC_INLINE void nrf_delay_ms(uint32_t number_of_ms); - -#if defined ( __CC_ARM ) -__STATIC_INLINE void nrf_delay_us(uint32_t number_of_us) -{ - if (!number_of_us) - return; -__asm - { -loop: - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - CMP SystemCoreClock, CLOCK_FREQ_16MHz - BEQ cond - NOP -#ifdef CPU_FREQ_64MHz - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP - NOP -#endif //CPU_FREQ_64MHz -cond: - SUBS number_of_us, #1 - BNE loop - } -} - -#elif defined ( _WIN32 ) || defined ( __unix ) || defined( __APPLE__ ) - - -#ifndef CUSTOM_NRF_DELAY_US -__STATIC_INLINE void nrf_delay_us(uint32_t number_of_us) -{} -#endif - -#elif defined ( __GNUC__ ) || ( __ICCARM__ ) - -__STATIC_INLINE void nrf_delay_us(uint32_t number_of_us) -{ - const uint32_t clock16MHz = CLOCK_FREQ_16MHz; - if (number_of_us) - { -__ASM volatile ( -#if ( defined(__GNUC__) && (__CORTEX_M == (0x00U) ) ) - ".syntax unified\n" -#endif -"1:\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " CMP %[SystemCoreClock], %[clock16MHz]\n" - " BEQ.N 2f\n" - " NOP\n" -#ifdef CPU_FREQ_64MHz - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" -#endif //CPU_FREQ_64MHz -"2:\n" - " SUBS %[number_of_us], %[number_of_us], #1\n" - " BNE.N 1b\n" -#if ( defined(__GNUC__) && (__CORTEX_M == (0x00U) ) ) - ".syntax divided\n" -#endif -#if ( __CORTEX_M == (0x00U) ) - // The SUBS instruction in Cortex-M0 is available only in 16-bit encoding, - // hence it requires a "lo" register (r0-r7) as an operand. - : [number_of_us] "=l" (number_of_us) -#else - : [number_of_us] "=r" (number_of_us) -#endif - : [SystemCoreClock] "r" (SystemCoreClock), - [clock16MHz] "r" (clock16MHz), - "[number_of_us]" (number_of_us) - : "cc" - ); - } -} -#endif - -__STATIC_INLINE void nrf_delay_ms(uint32_t number_of_ms) -{ - nrf_delay_us(1000*number_of_ms); -} - - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/gpiote/nrf_drv_gpiote.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/gpiote/nrf_drv_gpiote.c deleted file mode 100644 index 4fde3f14454..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/gpiote/nrf_drv_gpiote.c +++ /dev/null @@ -1,808 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(GPIOTE) -#include "nrf_drv_gpiote.h" -#include "nrf_drv_common.h" -#include "app_util_platform.h" -#include "nrf_assert.h" -#include "nrf_bitmask.h" -#include - -#define NRF_LOG_MODULE_NAME gpiote - -#if GPIOTE_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL GPIOTE_CONFIG_LOG_LEVEL -#define NRF_LOG_INFO_COLOR GPIOTE_CONFIG_INFO_COLOR -#define NRF_LOG_DEBUG_COLOR GPIOTE_CONFIG_DEBUG_COLOR -#else // GPIOTE_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL 0 -#endif // GPIOTE_CONFIG_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - -/* Validate configuration */ -INTERRUPT_PRIORITY_VALIDATION(GPIOTE_CONFIG_IRQ_PRIORITY); - -#define FORBIDDEN_HANDLER_ADDRESS ((nrf_drv_gpiote_evt_handler_t)UINT32_MAX) -#define PIN_NOT_USED (-1) -#define PIN_USED (-2) -#define NO_CHANNELS (-1) -#define SENSE_FIELD_POS (6) -#define SENSE_FIELD_MASK (0xC0) - -/** - * @brief Macro for converting task-event index to an address of an event register. - * - * Macro utilizes the fact that registers are grouped together in ascending order. - */ -#define TE_IDX_TO_EVENT_ADDR(idx) (nrf_gpiote_events_t)((uint32_t)NRF_GPIOTE_EVENTS_IN_0 + \ - (sizeof(uint32_t) * (idx))) - -/** - * @brief Macro for converting task-event index of OUT task to an address of a task register. - * - * Macro utilizes the fact that registers are grouped together in ascending order. - */ -#define TE_OUT_IDX_TO_TASK_ADDR(idx) (nrf_gpiote_tasks_t)((uint32_t)NRF_GPIOTE_TASKS_OUT_0 + \ - (sizeof(uint32_t) * (idx))) - -#if defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__SDK_DOXYGEN__) -/** - * @brief Macro for converting task-event index of SET task to an address of a task register. - * - * Macro utilizes the fact that registers are grouped together in ascending order. - */ -#define TE_SET_IDX_TO_TASK_ADDR(idx) (nrf_gpiote_tasks_t)((uint32_t)NRF_GPIOTE_TASKS_SET_0 + \ - (sizeof(uint32_t) * (idx))) - -#endif // defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__SDK_DOXYGEN__) - -#if defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__SDK_DOXYGEN__) -/** - * @brief Macro for converting task-event index of CLR task to an address of a task register. - * - * Macro utilizes the fact that registers are grouped together in ascending order. - */ -#define TE_CLR_IDX_TO_TASK_ADDR(idx) (nrf_gpiote_tasks_t)((uint32_t)NRF_GPIOTE_TASKS_CLR_0 + \ - (sizeof(uint32_t) * (idx))) - -#endif // defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__SDK_DOXYGEN__) - -/*lint -save -e661*/ -typedef struct -{ - nrf_drv_gpiote_evt_handler_t handlers[GPIOTE_CH_NUM + GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS]; - int8_t pin_assignments[NUMBER_OF_PINS]; - int8_t port_handlers_pins[GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS]; - nrf_drv_state_t state; -} gpiote_control_block_t; - -static gpiote_control_block_t m_cb; - -__STATIC_INLINE bool pin_in_use(uint32_t pin) -{ - return (m_cb.pin_assignments[pin] != PIN_NOT_USED); -} - - -__STATIC_INLINE bool pin_in_use_as_non_task_out(uint32_t pin) -{ - return (m_cb.pin_assignments[pin] == PIN_USED); -} - - -__STATIC_INLINE bool pin_in_use_by_te(uint32_t pin) -{ - return (m_cb.pin_assignments[pin] >= 0 && m_cb.pin_assignments[pin] < - GPIOTE_CH_NUM) ? true : false; -} - - -__STATIC_INLINE bool pin_in_use_by_port(uint32_t pin) -{ - return (m_cb.pin_assignments[pin] >= GPIOTE_CH_NUM); -} - - -__STATIC_INLINE bool pin_in_use_by_gpiote(uint32_t pin) -{ - return (m_cb.pin_assignments[pin] >= 0); -} - - -__STATIC_INLINE void pin_in_use_by_te_set(uint32_t pin, - uint32_t channel_id, - nrf_drv_gpiote_evt_handler_t handler, - bool is_channel) -{ - m_cb.pin_assignments[pin] = channel_id; - m_cb.handlers[channel_id] = handler; - if (!is_channel) - { - m_cb.port_handlers_pins[channel_id - GPIOTE_CH_NUM] = (int8_t)pin; - } -} - - -__STATIC_INLINE void pin_in_use_set(uint32_t pin) -{ - m_cb.pin_assignments[pin] = PIN_USED; -} - - -__STATIC_INLINE void pin_in_use_clear(uint32_t pin) -{ - m_cb.pin_assignments[pin] = PIN_NOT_USED; -} - - -__STATIC_INLINE int8_t channel_port_get(uint32_t pin) -{ - return m_cb.pin_assignments[pin]; -} - - -__STATIC_INLINE nrf_drv_gpiote_evt_handler_t channel_handler_get(uint32_t channel) -{ - return m_cb.handlers[channel]; -} - - -static int8_t channel_port_alloc(uint32_t pin, nrf_drv_gpiote_evt_handler_t handler, bool channel) -{ - int8_t channel_id = NO_CHANNELS; - uint32_t i; - - uint32_t start_idx = channel ? 0 : GPIOTE_CH_NUM; - uint32_t end_idx = - channel ? GPIOTE_CH_NUM : (GPIOTE_CH_NUM + GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS); - - // critical section - - for (i = start_idx; i < end_idx; i++) - { - if (m_cb.handlers[i] == FORBIDDEN_HANDLER_ADDRESS) - { - pin_in_use_by_te_set(pin, i, handler, channel); - channel_id = i; - break; - } - } - // critical section - return channel_id; -} - - -static void channel_free(uint8_t channel_id) -{ - m_cb.handlers[channel_id] = FORBIDDEN_HANDLER_ADDRESS; - if (channel_id >= GPIOTE_CH_NUM) - { - m_cb.port_handlers_pins[channel_id - GPIOTE_CH_NUM] = (int8_t)PIN_NOT_USED; - } -} - - -ret_code_t nrf_drv_gpiote_init(void) -{ - ret_code_t err_code; - - if (m_cb.state != NRF_DRV_STATE_UNINITIALIZED) - { - err_code = NRF_ERROR_INVALID_STATE; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - uint8_t i; - - for (i = 0; i < NUMBER_OF_PINS; i++) - { - pin_in_use_clear(i); - } - - for (i = 0; i < (GPIOTE_CH_NUM + GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS); i++) - { - channel_free(i); - } - - nrf_drv_common_irq_enable(GPIOTE_IRQn, GPIOTE_CONFIG_IRQ_PRIORITY); - nrf_gpiote_event_clear(NRF_GPIOTE_EVENTS_PORT); - nrf_gpiote_int_enable(GPIOTE_INTENSET_PORT_Msk); - m_cb.state = NRF_DRV_STATE_INITIALIZED; - - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -bool nrf_drv_gpiote_is_init(void) -{ - return (m_cb.state != NRF_DRV_STATE_UNINITIALIZED) ? true : false; -} - - -void nrf_drv_gpiote_uninit(void) -{ - ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED); - - uint32_t i; - - for (i = 0; i < NUMBER_OF_PINS; i++) - { - if (pin_in_use_as_non_task_out(i)) - { - nrf_drv_gpiote_out_uninit(i); - } - else if ( pin_in_use_by_gpiote(i)) - { - /* Disable gpiote_in is having the same effect on out pin as gpiote_out_uninit on - * so it can be called on all pins used by GPIOTE. - */ - nrf_drv_gpiote_in_uninit(i); - } - } - m_cb.state = NRF_DRV_STATE_UNINITIALIZED; - NRF_LOG_INFO("Uninitialized."); -} - - -ret_code_t nrf_drv_gpiote_out_init(nrf_drv_gpiote_pin_t pin, - nrf_drv_gpiote_out_config_t const * p_config) -{ - ASSERT(pin < NUMBER_OF_PINS); - ASSERT(m_cb.state == NRF_DRV_STATE_INITIALIZED); - ASSERT(p_config); - - ret_code_t err_code = NRF_SUCCESS; - - if (pin_in_use(pin)) - { - err_code = NRF_ERROR_INVALID_STATE; - } - else - { - if (p_config->task_pin) - { - int8_t channel = channel_port_alloc(pin, NULL, true); - - if (channel != NO_CHANNELS) - { - nrf_gpiote_task_configure(channel, pin, p_config->action, p_config->init_state); - } - else - { - err_code = NRF_ERROR_NO_MEM; - } - } - else - { - pin_in_use_set(pin); - } - - if (err_code == NRF_SUCCESS) - { - if (p_config->init_state == NRF_GPIOTE_INITIAL_VALUE_HIGH) - { - nrf_gpio_pin_set(pin); - } - else - { - nrf_gpio_pin_clear(pin); - } - - nrf_gpio_cfg_output(pin); - } - } - - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -void nrf_drv_gpiote_out_uninit(nrf_drv_gpiote_pin_t pin) -{ - ASSERT(pin < NUMBER_OF_PINS); - ASSERT(pin_in_use(pin)); - - if (pin_in_use_by_te(pin)) - { - channel_free((uint8_t)channel_port_get(pin)); - nrf_gpiote_te_default(channel_port_get(pin)); - } - pin_in_use_clear(pin); - - nrf_gpio_cfg_default(pin); -} - - -void nrf_drv_gpiote_out_set(nrf_drv_gpiote_pin_t pin) -{ - ASSERT(pin < NUMBER_OF_PINS); - ASSERT(pin_in_use(pin)); - ASSERT(!pin_in_use_by_te(pin)) - - nrf_gpio_pin_set(pin); -} - - -void nrf_drv_gpiote_out_clear(nrf_drv_gpiote_pin_t pin) -{ - ASSERT(pin < NUMBER_OF_PINS); - ASSERT(pin_in_use(pin)); - ASSERT(!pin_in_use_by_te(pin)) - - nrf_gpio_pin_clear(pin); -} - - -void nrf_drv_gpiote_out_toggle(nrf_drv_gpiote_pin_t pin) -{ - ASSERT(pin < NUMBER_OF_PINS); - ASSERT(pin_in_use(pin)); - ASSERT(!pin_in_use_by_te(pin)) - - nrf_gpio_pin_toggle(pin); -} - - -void nrf_drv_gpiote_out_task_enable(nrf_drv_gpiote_pin_t pin) -{ - ASSERT(pin < NUMBER_OF_PINS); - ASSERT(pin_in_use(pin)); - ASSERT(pin_in_use_by_te(pin)) - - nrf_gpiote_task_enable(m_cb.pin_assignments[pin]); -} - - -void nrf_drv_gpiote_out_task_disable(nrf_drv_gpiote_pin_t pin) -{ - ASSERT(pin < NUMBER_OF_PINS); - ASSERT(pin_in_use(pin)); - ASSERT(pin_in_use_by_te(pin)) - - nrf_gpiote_task_disable(m_cb.pin_assignments[pin]); -} - - -uint32_t nrf_drv_gpiote_out_task_addr_get(nrf_drv_gpiote_pin_t pin) -{ - ASSERT(pin < NUMBER_OF_PINS); - ASSERT(pin_in_use_by_te(pin)); - - nrf_gpiote_tasks_t task = TE_OUT_IDX_TO_TASK_ADDR(channel_port_get(pin)); - return nrf_gpiote_task_addr_get(task); -} - - -#if defined(GPIOTE_FEATURE_SET_PRESENT) -uint32_t nrf_drv_gpiote_set_task_addr_get(nrf_drv_gpiote_pin_t pin) -{ - ASSERT(pin < NUMBER_OF_PINS); - ASSERT(pin_in_use_by_te(pin)); - - nrf_gpiote_tasks_t task = TE_SET_IDX_TO_TASK_ADDR(channel_port_get(pin)); - return nrf_gpiote_task_addr_get(task); -} - - -#endif // defined(GPIOTE_FEATURE_SET_PRESENT) - -#if defined(GPIOTE_FEATURE_CLR_PRESENT) -uint32_t nrf_drv_gpiote_clr_task_addr_get(nrf_drv_gpiote_pin_t pin) -{ - ASSERT(pin < NUMBER_OF_PINS); - ASSERT(pin_in_use_by_te(pin)); - - nrf_gpiote_tasks_t task = TE_CLR_IDX_TO_TASK_ADDR(channel_port_get(pin)); - return nrf_gpiote_task_addr_get(task); -} - - -#endif // defined(GPIOTE_FEATURE_CLR_PRESENT) - -void nrf_drv_gpiote_out_task_force(nrf_drv_gpiote_pin_t pin, uint8_t state) -{ - ASSERT(pin < NUMBER_OF_PINS); - ASSERT(pin_in_use(pin)); - ASSERT(pin_in_use_by_te(pin)); - - nrf_gpiote_outinit_t init_val = - state ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW; - nrf_gpiote_task_force(m_cb.pin_assignments[pin], init_val); -} - - -void nrf_drv_gpiote_out_task_trigger(nrf_drv_gpiote_pin_t pin) -{ - ASSERT(pin < NUMBER_OF_PINS); - ASSERT(pin_in_use(pin)); - ASSERT(pin_in_use_by_te(pin)); - - nrf_gpiote_tasks_t task = TE_OUT_IDX_TO_TASK_ADDR(channel_port_get(pin)); - nrf_gpiote_task_set(task); -} - - -#if defined(GPIOTE_FEATURE_SET_PRESENT) -void nrf_drv_gpiote_set_task_trigger(nrf_drv_gpiote_pin_t pin) -{ - ASSERT(pin < NUMBER_OF_PINS); - ASSERT(pin_in_use(pin)); - ASSERT(pin_in_use_by_te(pin)); - - nrf_gpiote_tasks_t task = TE_SET_IDX_TO_TASK_ADDR(channel_port_get(pin)); - nrf_gpiote_task_set(task); -} - - -#endif // defined(GPIOTE_FEATURE_SET_PRESENT) - -#if defined(GPIOTE_FEATURE_CLR_PRESENT) -void nrf_drv_gpiote_clr_task_trigger(nrf_drv_gpiote_pin_t pin) -{ - ASSERT(pin < NUMBER_OF_PINS); - ASSERT(pin_in_use(pin)); - ASSERT(pin_in_use_by_te(pin)); - - nrf_gpiote_tasks_t task = TE_CLR_IDX_TO_TASK_ADDR(channel_port_get(pin)); - nrf_gpiote_task_set(task); -} - - -#endif // defined(GPIOTE_FEATURE_CLR_PRESENT) - -ret_code_t nrf_drv_gpiote_in_init(nrf_drv_gpiote_pin_t pin, - nrf_drv_gpiote_in_config_t const * p_config, - nrf_drv_gpiote_evt_handler_t evt_handler) -{ - ASSERT(pin < NUMBER_OF_PINS); - ret_code_t err_code = NRF_SUCCESS; - - /* Only one GPIOTE channel can be assigned to one physical pin. */ - if (pin_in_use_by_gpiote(pin)) - { - err_code = NRF_ERROR_INVALID_STATE; - } - else - { - int8_t channel = channel_port_alloc(pin, evt_handler, p_config->hi_accuracy); - if (channel != NO_CHANNELS) - { - if (p_config->is_watcher) - { - nrf_gpio_cfg_watcher(pin); - } - else - { - nrf_gpio_cfg_input(pin, p_config->pull); - } - - if (p_config->hi_accuracy) - { - nrf_gpiote_event_configure(channel, pin, p_config->sense); - } - else - { - m_cb.port_handlers_pins[channel - - GPIOTE_CH_NUM] |= (p_config->sense) << SENSE_FIELD_POS; - } - } - else - { - err_code = NRF_ERROR_NO_MEM; - } - } - - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -void nrf_drv_gpiote_in_event_enable(nrf_drv_gpiote_pin_t pin, bool int_enable) -{ - ASSERT(pin < NUMBER_OF_PINS); - ASSERT(pin_in_use_by_gpiote(pin)); - if (pin_in_use_by_port(pin)) - { - uint8_t pin_and_sense = - m_cb.port_handlers_pins[channel_port_get(pin) - GPIOTE_CH_NUM]; - nrf_gpiote_polarity_t polarity = - (nrf_gpiote_polarity_t)(pin_and_sense >> SENSE_FIELD_POS); - nrf_gpio_pin_sense_t sense; - if (polarity == NRF_GPIOTE_POLARITY_TOGGLE) - { - /* read current pin state and set for next sense to oposit */ - sense = (nrf_gpio_pin_read(pin)) ? - NRF_GPIO_PIN_SENSE_LOW : NRF_GPIO_PIN_SENSE_HIGH; - } - else - { - sense = (polarity == NRF_GPIOTE_POLARITY_LOTOHI) ? - NRF_GPIO_PIN_SENSE_HIGH : NRF_GPIO_PIN_SENSE_LOW; - } - nrf_gpio_cfg_sense_set(pin, sense); - } - else if (pin_in_use_by_te(pin)) - { - int32_t channel = (int32_t)channel_port_get(pin); - nrf_gpiote_events_t event = TE_IDX_TO_EVENT_ADDR(channel); - - nrf_gpiote_event_enable(channel); - - nrf_gpiote_event_clear(event); - if (int_enable) - { - nrf_drv_gpiote_evt_handler_t handler = channel_handler_get(channel_port_get(pin)); - // Enable the interrupt only if event handler was provided. - if (handler) - { - nrf_gpiote_int_enable(1 << channel); - } - } - } -} - - -void nrf_drv_gpiote_in_event_disable(nrf_drv_gpiote_pin_t pin) -{ - ASSERT(pin < NUMBER_OF_PINS); - ASSERT(pin_in_use_by_gpiote(pin)); - if (pin_in_use_by_port(pin)) - { - nrf_gpio_cfg_sense_set(pin, NRF_GPIO_PIN_NOSENSE); - } - else if (pin_in_use_by_te(pin)) - { - int32_t channel = (int32_t)channel_port_get(pin); - nrf_gpiote_event_disable(channel); - nrf_gpiote_int_disable(1 << channel); - } -} - - -void nrf_drv_gpiote_in_uninit(nrf_drv_gpiote_pin_t pin) -{ - ASSERT(pin < NUMBER_OF_PINS); - ASSERT(pin_in_use_by_gpiote(pin)); - nrf_drv_gpiote_in_event_disable(pin); - if (pin_in_use_by_te(pin)) - { - nrf_gpiote_te_default(channel_port_get(pin)); - } - nrf_gpio_cfg_default(pin); - channel_free((uint8_t)channel_port_get(pin)); - pin_in_use_clear(pin); -} - - -bool nrf_drv_gpiote_in_is_set(nrf_drv_gpiote_pin_t pin) -{ - ASSERT(pin < NUMBER_OF_PINS); - return nrf_gpio_pin_read(pin) ? true : false; -} - - -uint32_t nrf_drv_gpiote_in_event_addr_get(nrf_drv_gpiote_pin_t pin) -{ - ASSERT(pin < NUMBER_OF_PINS); - ASSERT(pin_in_use_by_port(pin) || pin_in_use_by_te(pin)); - - nrf_gpiote_events_t event = NRF_GPIOTE_EVENTS_PORT; - - if (pin_in_use_by_te(pin)) - { - event = TE_IDX_TO_EVENT_ADDR(channel_port_get(pin)); - } - return nrf_gpiote_event_addr_get(event); -} - - -void GPIOTE_IRQHandler(void) -{ - uint32_t status = 0; - uint32_t input[GPIO_COUNT] = {0}; - - /* collect status of all GPIOTE pin events. Processing is done once all are collected and cleared.*/ - uint32_t i; - nrf_gpiote_events_t event = NRF_GPIOTE_EVENTS_IN_0; - uint32_t mask = (uint32_t)NRF_GPIOTE_INT_IN0_MASK; - - for (i = 0; i < GPIOTE_CH_NUM; i++) - { - if (nrf_gpiote_event_is_set(event) && nrf_gpiote_int_is_enabled(mask)) - { - nrf_gpiote_event_clear(event); - status |= mask; - } - mask <<= 1; - /* Incrementing to next event, utilizing the fact that events are grouped together - * in ascending order. */ - event = (nrf_gpiote_events_t)((uint32_t)event + sizeof(uint32_t)); - } - - /* collect PORT status event, if event is set read pins state. Processing is postponed to the - * end of interrupt. */ - if (nrf_gpiote_event_is_set(NRF_GPIOTE_EVENTS_PORT)) - { - nrf_gpiote_event_clear(NRF_GPIOTE_EVENTS_PORT); - status |= (uint32_t)NRF_GPIOTE_INT_PORT_MASK; - nrf_gpio_ports_read(0, GPIO_COUNT, input); - } - - /* Process pin events. */ - if (status & NRF_GPIOTE_INT_IN_MASK) - { - mask = (uint32_t)NRF_GPIOTE_INT_IN0_MASK; - - for (i = 0; i < GPIOTE_CH_NUM; i++) - { - if (mask & status) - { - nrf_drv_gpiote_pin_t pin = nrf_gpiote_event_pin_get(i); - NRF_LOG_DEBUG("Event in number: %d.", i); - nrf_gpiote_polarity_t polarity = nrf_gpiote_event_polarity_get(i); - nrf_drv_gpiote_evt_handler_t handler = channel_handler_get(i); - NRF_LOG_DEBUG("Pin: %d, polarity: %d.", pin, polarity); - if (handler) - { - handler(pin, polarity); - } - } - mask <<= 1; - } - } - - if (status & (uint32_t)NRF_GPIOTE_INT_PORT_MASK) - { - /* Process port event. */ - uint32_t port_idx; - uint8_t repeat = 0; - uint32_t toggle_mask[GPIO_COUNT] = {0}; - uint32_t pins_to_check[GPIO_COUNT]; - - // Faster way of doing memset because in interrupt context. - for (port_idx = 0; port_idx < GPIO_COUNT; port_idx++) - { - pins_to_check[port_idx] = 0xFFFFFFFF; - } - - do - { - repeat = 0; - - for (i = 0; i < GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS; i++) - { - uint8_t pin_and_sense = m_cb.port_handlers_pins[i]; - nrf_drv_gpiote_pin_t pin = (pin_and_sense & ~SENSE_FIELD_MASK); - - if ((m_cb.port_handlers_pins[i] != PIN_NOT_USED) - && nrf_bitmask_bit_is_set(pin, pins_to_check)) - { - nrf_gpiote_polarity_t polarity = - (nrf_gpiote_polarity_t)((pin_and_sense & - SENSE_FIELD_MASK) >> SENSE_FIELD_POS); - nrf_drv_gpiote_evt_handler_t handler = - channel_handler_get(channel_port_get(pin)); - if (handler || (polarity == NRF_GPIOTE_POLARITY_TOGGLE)) - { - if (polarity == NRF_GPIOTE_POLARITY_TOGGLE) - { - nrf_bitmask_bit_set(pin, toggle_mask); - } - nrf_gpio_pin_sense_t sense = nrf_gpio_pin_sense_get(pin); - uint32_t pin_state = nrf_bitmask_bit_is_set(pin, input); - if ((pin_state && (sense == NRF_GPIO_PIN_SENSE_HIGH)) || - (!pin_state && (sense == NRF_GPIO_PIN_SENSE_LOW)) ) - { - NRF_LOG_DEBUG("PORT event for pin: %d, polarity: %d.", pin, - polarity); - if (polarity == NRF_GPIOTE_POLARITY_TOGGLE) - { - nrf_gpio_pin_sense_t next_sense = - (sense == NRF_GPIO_PIN_SENSE_HIGH) ? - NRF_GPIO_PIN_SENSE_LOW : - NRF_GPIO_PIN_SENSE_HIGH; - nrf_gpio_cfg_sense_set(pin, next_sense); - ++repeat; - - } - if (handler) - { - handler(pin, polarity); - } - } - } - } - } - - if (repeat) - { - // When one of the pins in low-accuracy and toggle mode becomes active, - // it's sense mode is inverted to clear the internal SENSE signal. - // State of any other enabled low-accuracy input in toggle mode must be checked - // explicitly, because it does not trigger the interrput when SENSE signal is active. - // For more information about SENSE functionality, refer to Product Specification. - - uint32_t new_input[GPIO_COUNT]; - bool input_unchanged = true; - nrf_gpio_ports_read(0, GPIO_COUNT, new_input); - - // Faster way of doing memcmp because in interrupt context. - for (port_idx = 0; port_idx < GPIO_COUNT; port_idx++) - { - if (new_input[port_idx] != input[port_idx]) - { - input_unchanged = false; - break; - } - } - - if (input_unchanged) - { - // No change. - repeat = 0; - } - else - { - // Faster way of doing memcpy because in interrupt context. - for (port_idx = 0; port_idx < GPIO_COUNT; port_idx++) - { - input[port_idx] = new_input[port_idx]; - pins_to_check[port_idx] = toggle_mask[port_idx]; - } - } - } - } - while (repeat); - } -} - - -/*lint -restore*/ -#endif // NRF_MODULE_ENABLED(GPIOTE) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/gpiote/nrf_drv_gpiote.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/gpiote/nrf_drv_gpiote.h deleted file mode 100644 index 6c5f627b8ce..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/gpiote/nrf_drv_gpiote.h +++ /dev/null @@ -1,385 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_DRV_GPIOTE__ -#define NRF_DRV_GPIOTE__ - -/** - * @addtogroup nrf_gpiote GPIOTE abstraction and driver - * @ingroup nrf_drivers - * @brief GPIOTE APIs. - * @defgroup nrf_drv_gpiote GPIOTE driver - * @{ - * @ingroup nrf_gpiote - * @brief GPIOTE driver for managing input and output pins. - */ - -#include "nrf_gpiote.h" -#include "nrf_gpio.h" -#include "sdk_errors.h" -#include -#include -#include "sdk_config.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@brief Input pin configuration. */ -typedef struct -{ - nrf_gpiote_polarity_t sense; /**< Transition that triggers interrupt. */ - nrf_gpio_pin_pull_t pull; /**< Pulling mode. */ - bool is_watcher; /**< True when the input pin is tracking an output pin. */ - bool hi_accuracy;/**< True when high accuracy (IN_EVENT) is used. */ -} nrf_drv_gpiote_in_config_t; - -/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect low-to-high transition. - * @details Set hi_accu to true to use IN_EVENT. */ -#define GPIOTE_CONFIG_IN_SENSE_LOTOHI(hi_accu) \ - { \ - .is_watcher = false, \ - .hi_accuracy = hi_accu, \ - .pull = NRF_GPIO_PIN_NOPULL, \ - .sense = NRF_GPIOTE_POLARITY_LOTOHI, \ - } - -/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect high-to-low transition. - * @details Set hi_accu to true to use IN_EVENT. */ -#define GPIOTE_CONFIG_IN_SENSE_HITOLO(hi_accu) \ - { \ - .is_watcher = false, \ - .hi_accuracy = hi_accu, \ - .pull = NRF_GPIO_PIN_NOPULL, \ - .sense = NRF_GPIOTE_POLARITY_HITOLO, \ - } - -/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect any change on the pin. - * @details Set hi_accu to true to use IN_EVENT.*/ -#define GPIOTE_CONFIG_IN_SENSE_TOGGLE(hi_accu) \ - { \ - .is_watcher = false, \ - .hi_accuracy = hi_accu, \ - .pull = NRF_GPIO_PIN_NOPULL, \ - .sense = NRF_GPIOTE_POLARITY_TOGGLE, \ - } - -/**@brief Output pin configuration. */ -typedef struct -{ - nrf_gpiote_polarity_t action; /**< Configuration of the pin task. */ - nrf_gpiote_outinit_t init_state; /**< Initial state of the output pin. */ - bool task_pin; /**< True if the pin is controlled by a GPIOTE task. */ -} nrf_drv_gpiote_out_config_t; - -/**@brief Macro for configuring a pin to use as output. GPIOTE is not used for the pin. */ -#define GPIOTE_CONFIG_OUT_SIMPLE(init_high) \ - { \ - .init_state = init_high ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW, \ - .task_pin = false, \ - } - -/**@brief Macro for configuring a pin to use the GPIO OUT TASK to change the state from high to low. - * @details The task will clear the pin. Therefore, the pin is set initially. */ -#define GPIOTE_CONFIG_OUT_TASK_LOW \ - { \ - .init_state = NRF_GPIOTE_INITIAL_VALUE_HIGH, \ - .task_pin = true, \ - .action = NRF_GPIOTE_POLARITY_HITOLO, \ - } - -/**@brief Macro for configuring a pin to use the GPIO OUT TASK to change the state from low to high. - * @details The task will set the pin. Therefore, the pin is cleared initially. */ -#define GPIOTE_CONFIG_OUT_TASK_HIGH \ - { \ - .init_state = NRF_GPIOTE_INITIAL_VALUE_LOW, \ - .task_pin = true, \ - .action = NRF_GPIOTE_POLARITY_LOTOHI, \ - } - -/**@brief Macro for configuring a pin to use the GPIO OUT TASK to toggle the pin state. - * @details The initial pin state must be provided. */ -#define GPIOTE_CONFIG_OUT_TASK_TOGGLE(init_high) \ - { \ - .init_state = init_high ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW, \ - .task_pin = true, \ - .action = NRF_GPIOTE_POLARITY_TOGGLE, \ - } - -/** @brief Pin. */ -typedef uint32_t nrf_drv_gpiote_pin_t; - -/** - * @brief Pin event handler prototype. - * @param pin Pin that triggered this event. - * @param action Action that lead to triggering this event. - */ -typedef void (*nrf_drv_gpiote_evt_handler_t)(nrf_drv_gpiote_pin_t pin, nrf_gpiote_polarity_t action); - -/** - * @brief Function for initializing the GPIOTE module. - * - * @details Only static configuration is supported to prevent the shared - * resource being customized by the initiator. - * - * @retval NRF_SUCCESS If initialization was successful. - * @retval NRF_ERROR_INVALID_STATE If the driver was already initialized. - */ -ret_code_t nrf_drv_gpiote_init(void); - -/** - * @brief Function for checking if the GPIOTE module is initialized. - * - * @details The GPIOTE module is a shared module. Therefore, you should check if - * the module is already initialized and skip initialization if it is. - * - * @retval true If the module is already initialized. - * @retval false If the module is not initialized. - */ -bool nrf_drv_gpiote_is_init(void); - -/** - * @brief Function for uninitializing the GPIOTE module. - */ -void nrf_drv_gpiote_uninit(void); - -/** - * @brief Function for initializing a GPIOTE output pin. - * @details The output pin can be controlled by the CPU or by PPI. The initial - * configuration specifies which mode is used. If PPI mode is used, the driver - * attempts to allocate one of the available GPIOTE channels. If no channel is - * available, an error is returned. - * - * @param[in] pin Pin. - * @param[in] p_config Initial configuration. - * - * @retval NRF_SUCCESS If initialization was successful. - * @retval NRF_ERROR_INVALID_STATE If the driver is not initialized or the pin is already used. - * @retval NRF_ERROR_NO_MEM If no GPIOTE channel is available. - */ -ret_code_t nrf_drv_gpiote_out_init(nrf_drv_gpiote_pin_t pin, - nrf_drv_gpiote_out_config_t const * p_config); - -/** - * @brief Function for uninitializing a GPIOTE output pin. - * @details The driver frees the GPIOTE channel if the output pin was using one. - * - * @param[in] pin Pin. - */ -void nrf_drv_gpiote_out_uninit(nrf_drv_gpiote_pin_t pin); - -/** - * @brief Function for setting a GPIOTE output pin. - * - * @param[in] pin Pin. - */ -void nrf_drv_gpiote_out_set(nrf_drv_gpiote_pin_t pin); - -/** - * @brief Function for clearing a GPIOTE output pin. - * - * @param[in] pin Pin. - */ -void nrf_drv_gpiote_out_clear(nrf_drv_gpiote_pin_t pin); - -/** - * @brief Function for toggling a GPIOTE output pin. - * - * @param[in] pin Pin. - */ -void nrf_drv_gpiote_out_toggle(nrf_drv_gpiote_pin_t pin); - -/** - * @brief Function for enabling a GPIOTE output pin task. - * - * @param[in] pin Pin. - */ -void nrf_drv_gpiote_out_task_enable(nrf_drv_gpiote_pin_t pin); - -/** - * @brief Function for disabling a GPIOTE output pin task. - * - * @param[in] pin Pin. - */ -void nrf_drv_gpiote_out_task_disable(nrf_drv_gpiote_pin_t pin); - -/** - * @brief Function for getting the address of a configurable GPIOTE task. - * - * @param[in] pin Pin. - * - * @return Address of OUT task. - */ -uint32_t nrf_drv_gpiote_out_task_addr_get(nrf_drv_gpiote_pin_t pin); - -#if defined(GPIOTE_FEATURE_SET_PRESENT) -/** - * @brief Function for getting the address of a configurable GPIOTE task. - * - * @param[in] pin Pin. - * - * @return Address of SET task. - */ -uint32_t nrf_drv_gpiote_set_task_addr_get(nrf_drv_gpiote_pin_t pin); -#endif // defined(GPIOTE_FEATURE_SET_PRESENT) - -#if defined(GPIOTE_FEATURE_CLR_PRESENT) -/** - * @brief Function for getting the address of a configurable GPIOTE task. - * - * @param[in] pin Pin. - * - * @return Address of CLR task. - */ -uint32_t nrf_drv_gpiote_clr_task_addr_get(nrf_drv_gpiote_pin_t pin); -#endif // defined(GPIOTE_FEATURE_CLR_PRESENT) - -/** - * @brief Function for initializing a GPIOTE input pin. - * @details The input pin can act in two ways: - * - lower accuracy but low power (high frequency clock not needed) - * - higher accuracy (high frequency clock required) - * - * The initial configuration specifies which mode is used. - * If high-accuracy mode is used, the driver attempts to allocate one - * of the available GPIOTE channels. If no channel is - * available, an error is returned. - * In low accuracy mode SENSE feature is used. In this case only one active pin - * can be detected at a time. It can be worked around by setting all of the used - * low accuracy pins to toggle mode. - * For more information about SENSE functionality, refer to Product Specification. - * - * @param[in] pin Pin. - * @param[in] p_config Initial configuration. - * @param[in] evt_handler User function to be called when the configured transition occurs. - * - * @retval NRF_SUCCESS If initialization was successful. - * @retval NRF_ERROR_INVALID_STATE If the driver is not initialized or the pin is already used. - * @retval NRF_ERROR_NO_MEM If no GPIOTE channel is available. - */ -ret_code_t nrf_drv_gpiote_in_init(nrf_drv_gpiote_pin_t pin, - nrf_drv_gpiote_in_config_t const * p_config, - nrf_drv_gpiote_evt_handler_t evt_handler); - -/** - * @brief Function for uninitializing a GPIOTE input pin. - * @details The driver frees the GPIOTE channel if the input pin was using one. - * - * @param[in] pin Pin. - */ -void nrf_drv_gpiote_in_uninit(nrf_drv_gpiote_pin_t pin); - -/** - * @brief Function for enabling sensing of a GPIOTE input pin. - * - * @details If the input pin is configured as high-accuracy pin, the function - * enables an IN_EVENT. Otherwise, the function enables the GPIO sense mechanism. - * Note that a PORT event is shared between multiple pins, therefore the - * interrupt is always enabled. - * - * @param[in] pin Pin. - * @param[in] int_enable True to enable the interrupt. Always valid for a high-accuracy pin. - */ -void nrf_drv_gpiote_in_event_enable(nrf_drv_gpiote_pin_t pin, bool int_enable); - -/** - * @brief Function for disabling a GPIOTE input pin. - * - * @param[in] pin Pin. - */ -void nrf_drv_gpiote_in_event_disable(nrf_drv_gpiote_pin_t pin); - -/** - * @brief Function for checking if a GPIOTE input pin is set. - * - * @param[in] pin Pin. - * @retval true If the input pin is set. - * @retval false If the input pin is not set. - */ -bool nrf_drv_gpiote_in_is_set(nrf_drv_gpiote_pin_t pin); - -/** - * @brief Function for getting the address of a GPIOTE input pin event. - * @details If the pin is configured to use low-accuracy mode, the address of the PORT event is returned. - * - * @param[in] pin Pin. - */ -uint32_t nrf_drv_gpiote_in_event_addr_get(nrf_drv_gpiote_pin_t pin); - -/** - * @brief Function for forcing a specific state on the pin configured as task. - * - * @param[in] pin Pin. - * @param[in] state Pin state. - */ -void nrf_drv_gpiote_out_task_force(nrf_drv_gpiote_pin_t pin, uint8_t state); - -/** - * @brief Function for triggering the task OUT manually. - * - * @param[in] pin Pin. - */ -void nrf_drv_gpiote_out_task_trigger(nrf_drv_gpiote_pin_t pin); - -#ifdef NRF52_SERIES -/** - * @brief Function for triggering the task SET manually. - * - * @param[in] pin Pin. - */ -void nrf_drv_gpiote_set_task_trigger(nrf_drv_gpiote_pin_t pin); - -/** - * @brief Function for triggering the task CLR manually. - * - * @param[in] pin Pin. - */ -void nrf_drv_gpiote_clr_task_trigger(nrf_drv_gpiote_pin_t pin); -#endif - -/** - *@} - **/ - - -#ifdef __cplusplus -} -#endif - -#endif //NRF_DRV_GPIOTE__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_clock.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_clock.h deleted file mode 100644 index 50a7271a9db..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_clock.h +++ /dev/null @@ -1,401 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_CLOCK_H__ -#define NRF_CLOCK_H__ - -#include -#include - -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup nrf_clock_hal Clock HAL - * @{ - * @ingroup nrf_clock - * @brief Hardware access layer for managing the low-frequency clock (LFCLK) and the high-frequency clock (HFCLK). - */ - -#define NRF_CLOCK_TASK_TRIGGER (1UL) -#define NRF_CLOCK_EVENT_CLEAR (0UL) - -/** - * @brief Low-frequency clock sources. - * @details Used by LFCLKSRC, LFCLKSTAT, and LFCLKSRCCOPY registers. - */ -typedef enum -{ - NRF_CLOCK_LFCLK_RC = CLOCK_LFCLKSRC_SRC_RC, /**< Internal 32 kHz RC oscillator. */ - NRF_CLOCK_LFCLK_Xtal = CLOCK_LFCLKSRC_SRC_Xtal, /**< External 32 kHz crystal. */ - NRF_CLOCK_LFCLK_Synth = CLOCK_LFCLKSRC_SRC_Synth /**< Internal 32 kHz synthesizer from HFCLK system clock. */ -} nrf_clock_lfclk_t; - -/** - * @brief High-frequency clock sources. - */ -typedef enum -{ - NRF_CLOCK_HFCLK_LOW_ACCURACY = CLOCK_HFCLKSTAT_SRC_RC, /**< Internal 16 MHz RC oscillator. */ - NRF_CLOCK_HFCLK_HIGH_ACCURACY = CLOCK_HFCLKSTAT_SRC_Xtal /**< External 16 MHz/32 MHz crystal oscillator. */ -} nrf_clock_hfclk_t; - -/** - * @brief Trigger status of task LFCLKSTART/HFCLKSTART. - * @details Used by LFCLKRUN and HFCLKRUN registers. - */ -typedef enum -{ - NRF_CLOCK_START_TASK_NOT_TRIGGERED = CLOCK_LFCLKRUN_STATUS_NotTriggered, /**< Task LFCLKSTART/HFCLKSTART has not been triggered. */ - NRF_CLOCK_START_TASK_TRIGGERED = CLOCK_LFCLKRUN_STATUS_Triggered /**< Task LFCLKSTART/HFCLKSTART has been triggered. */ -} nrf_clock_start_task_status_t; - -/** - * @brief Interrupts. - */ -typedef enum -{ - NRF_CLOCK_INT_HF_STARTED_MASK = CLOCK_INTENSET_HFCLKSTARTED_Msk, /**< Interrupt on HFCLKSTARTED event. */ - NRF_CLOCK_INT_LF_STARTED_MASK = CLOCK_INTENSET_LFCLKSTARTED_Msk, /**< Interrupt on LFCLKSTARTED event. */ - NRF_CLOCK_INT_DONE_MASK = CLOCK_INTENSET_DONE_Msk, /**< Interrupt on DONE event. */ - NRF_CLOCK_INT_CTTO_MASK = CLOCK_INTENSET_CTTO_Msk /**< Interrupt on CTTO event. */ -} nrf_clock_int_mask_t; - -/** - * @brief Tasks. - * - * @details The NRF_CLOCK_TASK_LFCLKSTOP task cannot be set when the low-frequency clock is not running. - * The NRF_CLOCK_TASK_HFCLKSTOP task cannot be set when the high-frequency clock is not running. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_CLOCK_TASK_HFCLKSTART = offsetof(NRF_CLOCK_Type, TASKS_HFCLKSTART), /**< Start HFCLK clock source.*/ - NRF_CLOCK_TASK_HFCLKSTOP = offsetof(NRF_CLOCK_Type, TASKS_HFCLKSTOP), /**< Stop HFCLK clock source.*/ - NRF_CLOCK_TASK_LFCLKSTART = offsetof(NRF_CLOCK_Type, TASKS_LFCLKSTART), /**< Start LFCLK clock source.*/ - NRF_CLOCK_TASK_LFCLKSTOP = offsetof(NRF_CLOCK_Type, TASKS_LFCLKSTOP), /**< Stop LFCLK clock source.*/ - NRF_CLOCK_TASK_CAL = offsetof(NRF_CLOCK_Type, TASKS_CAL), /**< Start calibration of LFCLK RC oscillator.*/ - NRF_CLOCK_TASK_CTSTART = offsetof(NRF_CLOCK_Type, TASKS_CTSTART), /**< Start calibration timer.*/ - NRF_CLOCK_TASK_CTSTOP = offsetof(NRF_CLOCK_Type, TASKS_CTSTOP) /**< Stop calibration timer.*/ -} nrf_clock_task_t; /*lint -restore */ - -/** - * @brief Events. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_CLOCK_EVENT_HFCLKSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_HFCLKSTARTED), /**< HFCLK oscillator started.*/ - NRF_CLOCK_EVENT_LFCLKSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_LFCLKSTARTED), /**< LFCLK oscillator started.*/ - NRF_CLOCK_EVENT_DONE = offsetof(NRF_CLOCK_Type, EVENTS_DONE), /**< Calibration of LFCLK RC oscillator completed.*/ - NRF_CLOCK_EVENT_CTTO = offsetof(NRF_CLOCK_Type, EVENTS_CTTO) /**< Calibration timer time-out.*/ -} nrf_clock_event_t; /*lint -restore */ - -/** - * @brief Function for enabling a specific interrupt. - * - * @param[in] int_mask Interrupt. - */ -__STATIC_INLINE void nrf_clock_int_enable(uint32_t int_mask); - -/** - * @brief Function for disabling a specific interrupt. - * - * @param[in] int_mask Interrupt. - */ -__STATIC_INLINE void nrf_clock_int_disable(uint32_t int_mask); - -/** - * @brief Function for retrieving the state of a specific interrupt. - * - * @param[in] int_mask Interrupt. - * - * @retval true If the interrupt is enabled. - * @retval false If the interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_clock_int_enable_check(nrf_clock_int_mask_t int_mask); - -/** - * @brief Function for retrieving the address of a specific task. - * @details This function can be used by the PPI module. - * - * @param[in] task Task. - * - * @return Address of the requested task register. - */ -__STATIC_INLINE uint32_t nrf_clock_task_address_get(nrf_clock_task_t task); - -/** - * @brief Function for setting a specific task. - * - * @param[in] task Task. - */ -__STATIC_INLINE void nrf_clock_task_trigger(nrf_clock_task_t task); - -/** - * @brief Function for retrieving the address of a specific event. - * @details This function can be used by the PPI module. - * - * @param[in] event Event. - * - * @return Address of the requested event register. - */ -__STATIC_INLINE uint32_t nrf_clock_event_address_get(nrf_clock_event_t event); - -/** - * @brief Function for clearing a specific event. - * - * @param[in] event Event. - */ -__STATIC_INLINE void nrf_clock_event_clear(nrf_clock_event_t event); - -/** - * @brief Function for retrieving the state of a specific event. - * - * @param[in] event Event. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_clock_event_check(nrf_clock_event_t event); - -/** - * @brief Function for changing the low-frequency clock source. - * @details This function cannot be called when the low-frequency clock is running. - * - * @param[in] source New low-frequency clock source. - * - */ -__STATIC_INLINE void nrf_clock_lf_src_set(nrf_clock_lfclk_t source); - -/** - * @brief Function for retrieving the selected source for the low-frequency clock. - * - * @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator is the selected source for the low-frequency clock. - * @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator is the selected source for the low-frequency clock. - * @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from the HFCLK is the selected source for the low-frequency clock. - */ -__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_src_get(void); - -/** - * @brief Function for retrieving the active source of the low-frequency clock. - * - * @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator is the active source of the low-frequency clock. - * @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator is the active source of the low-frequency clock. - * @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from the HFCLK is the active source of the low-frequency clock. - */ -__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_actv_src_get(void); - -/** - * @brief Function for retrieving the clock source for the LFCLK clock when the task LKCLKSTART is triggered. - * - * @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator is running and generating the LFCLK clock. - * @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator is running and generating the LFCLK clock. - * @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from the HFCLK is running and generating the LFCLK clock. - */ -__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_srccopy_get(void); - -/** - * @brief Function for retrieving the state of the LFCLK clock. - * - * @retval false If the LFCLK clock is not running. - * @retval true If the LFCLK clock is running. - */ -__STATIC_INLINE bool nrf_clock_lf_is_running(void); - -/** - * @brief Function for retrieving the trigger status of the task LFCLKSTART. - * - * @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED If the task LFCLKSTART has not been triggered. - * @retval NRF_CLOCK_START_TASK_TRIGGERED If the task LFCLKSTART has been triggered. - */ -__STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_lf_start_task_status_get(void); - -/** - * @brief Function for retrieving the active source of the high-frequency clock. - * - * @retval NRF_CLOCK_HFCLK_LOW_ACCURACY If the internal 16 MHz RC oscillator is the active source of the high-frequency clock. - * @retval NRF_CLOCK_HFCLK_HIGH_ACCURACY If an external 16 MHz/32 MHz crystal oscillator is the active source of the high-frequency clock. - */ -__STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hf_src_get(void); - -/** - * @brief Function for retrieving the state of the HFCLK clock. - * - * @param[in] clk_src Clock source to be checked. - * - * @retval false If the HFCLK clock is not running. - * @retval true If the HFCLK clock is running. - */ -__STATIC_INLINE bool nrf_clock_hf_is_running(nrf_clock_hfclk_t clk_src); - -/** - * @brief Function for retrieving the trigger status of the task HFCLKSTART. - * - * @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED If the task HFCLKSTART has not been triggered. - * @retval NRF_CLOCK_START_TASK_TRIGGERED If the task HFCLKSTART has been triggered. - */ -__STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_hf_start_task_status_get(void); - -/** - * @brief Function for changing the calibration timer interval. - * - * @param[in] interval New calibration timer interval in 0.25 s resolution (range: 0.25 seconds to 31.75 seconds). - */ -__STATIC_INLINE void nrf_clock_cal_timer_timeout_set(uint32_t interval); - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_clock_int_enable(uint32_t int_mask) -{ - NRF_CLOCK->INTENSET = int_mask; -} - -__STATIC_INLINE void nrf_clock_int_disable(uint32_t int_mask) -{ - NRF_CLOCK->INTENCLR = int_mask; -} - -__STATIC_INLINE bool nrf_clock_int_enable_check(nrf_clock_int_mask_t int_mask) -{ - return (bool)(NRF_CLOCK->INTENCLR & int_mask); -} - -__STATIC_INLINE uint32_t nrf_clock_task_address_get(nrf_clock_task_t task) -{ - return ((uint32_t )NRF_CLOCK + task); -} - -__STATIC_INLINE void nrf_clock_task_trigger(nrf_clock_task_t task) -{ - *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + task)) = NRF_CLOCK_TASK_TRIGGER; -} - -__STATIC_INLINE uint32_t nrf_clock_event_address_get(nrf_clock_event_t event) -{ - return ((uint32_t)NRF_CLOCK + event); -} - -__STATIC_INLINE void nrf_clock_event_clear(nrf_clock_event_t event) -{ - *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + event)) = NRF_CLOCK_EVENT_CLEAR; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + event)); - (void)dummy; -#endif -} - -__STATIC_INLINE bool nrf_clock_event_check(nrf_clock_event_t event) -{ - return (bool)*((volatile uint32_t *)((uint8_t *)NRF_CLOCK + event)); -} - -__STATIC_INLINE void nrf_clock_lf_src_set(nrf_clock_lfclk_t source) -{ - NRF_CLOCK->LFCLKSRC = - (uint32_t)((source << CLOCK_LFCLKSRC_SRC_Pos) & CLOCK_LFCLKSRC_SRC_Msk); -} - -__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_src_get(void) -{ - return (nrf_clock_lfclk_t)((NRF_CLOCK->LFCLKSRC & - CLOCK_LFCLKSRC_SRC_Msk) >> CLOCK_LFCLKSRC_SRC_Pos); -} - -__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_actv_src_get(void) -{ - return (nrf_clock_lfclk_t)((NRF_CLOCK->LFCLKSTAT & - CLOCK_LFCLKSTAT_SRC_Msk) >> CLOCK_LFCLKSTAT_SRC_Pos); -} - -__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_srccopy_get(void) -{ - return (nrf_clock_lfclk_t)((NRF_CLOCK->LFCLKSRCCOPY & - CLOCK_LFCLKSRCCOPY_SRC_Msk) >> CLOCK_LFCLKSRCCOPY_SRC_Pos); -} - -__STATIC_INLINE bool nrf_clock_lf_is_running(void) -{ - return ((NRF_CLOCK->LFCLKSTAT & - CLOCK_LFCLKSTAT_STATE_Msk) >> CLOCK_LFCLKSTAT_STATE_Pos); -} - -__STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_lf_start_task_status_get(void) -{ - return (nrf_clock_start_task_status_t)((NRF_CLOCK->LFCLKRUN & - CLOCK_LFCLKRUN_STATUS_Msk) >> - CLOCK_LFCLKRUN_STATUS_Pos); -} - -__STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hf_src_get(void) -{ - return (nrf_clock_hfclk_t)((NRF_CLOCK->HFCLKSTAT & - CLOCK_HFCLKSTAT_SRC_Msk) >> CLOCK_HFCLKSTAT_SRC_Pos); -} - -__STATIC_INLINE bool nrf_clock_hf_is_running(nrf_clock_hfclk_t clk_src) -{ - return (NRF_CLOCK->HFCLKSTAT & (CLOCK_HFCLKSTAT_STATE_Msk | CLOCK_HFCLKSTAT_SRC_Msk)) == - (CLOCK_HFCLKSTAT_STATE_Msk | (clk_src << CLOCK_HFCLKSTAT_SRC_Pos)); -} - -__STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_hf_start_task_status_get(void) -{ - return (nrf_clock_start_task_status_t)((NRF_CLOCK->HFCLKRUN & - CLOCK_HFCLKRUN_STATUS_Msk) >> - CLOCK_HFCLKRUN_STATUS_Pos); -} - -__STATIC_INLINE void nrf_clock_cal_timer_timeout_set(uint32_t interval) -{ - NRF_CLOCK->CTIV = ((interval << CLOCK_CTIV_CTIV_Pos) & CLOCK_CTIV_CTIV_Msk); -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - -/** - *@} - **/ - -#ifdef __cplusplus -} -#endif - -#endif // NRF_CLOCK_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_comp.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_comp.h deleted file mode 100644 index 31e2ff3cd55..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_comp.h +++ /dev/null @@ -1,518 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @file - * @brief COMP HAL API. - */ - -#ifndef NRF_COMP_H_ -#define NRF_COMP_H_ - -/** - * @defgroup nrf_comp_hal COMP HAL - * @{ - * @ingroup nrf_comp - * @brief @tagAPI52 Hardware access layer for managing the Comparator (COMP). - */ - -#include "nrf.h" - -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @enum nrf_comp_input_t - * @brief COMP analog pin selection. - */ -typedef enum -{ - NRF_COMP_INPUT_0 = COMP_PSEL_PSEL_AnalogInput0, /*!< AIN0 selected as analog input. */ - NRF_COMP_INPUT_1 = COMP_PSEL_PSEL_AnalogInput1, /*!< AIN1 selected as analog input. */ - NRF_COMP_INPUT_2 = COMP_PSEL_PSEL_AnalogInput2, /*!< AIN2 selected as analog input. */ - NRF_COMP_INPUT_3 = COMP_PSEL_PSEL_AnalogInput3, /*!< AIN3 selected as analog input. */ - NRF_COMP_INPUT_4 = COMP_PSEL_PSEL_AnalogInput4, /*!< AIN4 selected as analog input. */ - NRF_COMP_INPUT_5 = COMP_PSEL_PSEL_AnalogInput5, /*!< AIN5 selected as analog input. */ - NRF_COMP_INPUT_6 = COMP_PSEL_PSEL_AnalogInput6, /*!< AIN6 selected as analog input. */ -#if defined (COMP_PSEL_PSEL_AnalogInput7) || defined (__SDK_DOXYGEN__) - NRF_COMP_INPUT_7 = COMP_PSEL_PSEL_AnalogInput7, /*!< AIN7 selected as analog input. */ -#endif -#if defined (COMP_PSEL_PSEL_VddDiv2) || defined (__SDK_DOXYGEN__) - NRF_COMP_VDD_DIV2 = COMP_PSEL_PSEL_VddDiv2, /*!< VDD/2 selected as analog input. */ -#endif -}nrf_comp_input_t; - -/** - * @enum nrf_comp_ref_t - * @brief COMP reference selection. - */ -typedef enum -{ - NRF_COMP_REF_Int1V2 = COMP_REFSEL_REFSEL_Int1V2, /*!< VREF = internal 1.2 V reference (VDD >= 1.7 V). */ - NRF_COMP_REF_Int1V8 = COMP_REFSEL_REFSEL_Int1V8, /*!< VREF = internal 1.8 V reference (VDD >= VREF + 0.2 V). */ - NRF_COMP_REF_Int2V4 = COMP_REFSEL_REFSEL_Int2V4, /*!< VREF = internal 2.4 V reference (VDD >= VREF + 0.2 V). */ - NRF_COMP_REF_VDD = COMP_REFSEL_REFSEL_VDD, /*!< VREF = VDD. */ - NRF_COMP_REF_ARef = COMP_REFSEL_REFSEL_ARef /*!< VREF = AREF (VDD >= VREF >= AREFMIN). */ -}nrf_comp_ref_t; - -/** - * @enum nrf_comp_ext_ref_t - * @brief COMP external analog reference selection. - */ -typedef enum -{ - NRF_COMP_EXT_REF_0 = COMP_EXTREFSEL_EXTREFSEL_AnalogReference0, /*!< Use AIN0 as external analog reference. */ - NRF_COMP_EXT_REF_1 = COMP_EXTREFSEL_EXTREFSEL_AnalogReference1 /*!< Use AIN1 as external analog reference. */ -}nrf_comp_ext_ref_t; - -/** - * @brief COMP THDOWN and THUP values that are used to calculate the threshold voltages VDOWN and VUP. - */ -typedef struct -{ - uint8_t th_down; /*!< THDOWN value. */ - uint8_t th_up; /*!< THUP value. */ -}nrf_comp_th_t; - -/** - * @enum nrf_comp_main_mode_t - * @brief COMP main operation mode. - */ -typedef enum -{ - NRF_COMP_MAIN_MODE_SE = COMP_MODE_MAIN_SE, /*!< Single ended mode. */ - NRF_COMP_MAIN_MODE_Diff = COMP_MODE_MAIN_Diff /*!< Differential mode. */ -}nrf_comp_main_mode_t; - -/** - * @enum nrf_comp_sp_mode_t - * @brief COMP speed and power mode. - */ -typedef enum -{ - NRF_COMP_SP_MODE_Low = COMP_MODE_SP_Low, /*!< Low power mode. */ - NRF_COMP_SP_MODE_Normal = COMP_MODE_SP_Normal, /*!< Normal mode. */ - NRF_COMP_SP_MODE_High = COMP_MODE_SP_High /*!< High speed mode. */ -}nrf_comp_sp_mode_t; - -/** - * @enum nrf_comp_hyst_t - * @brief COMP comparator hysteresis. - */ -typedef enum -{ - NRF_COMP_HYST_NoHyst = COMP_HYST_HYST_NoHyst, /*!< Comparator hysteresis disabled. */ - NRF_COMP_HYST_50mV = COMP_HYST_HYST_Hyst50mV /*!< Comparator hysteresis enabled. */ -}nrf_comp_hyst_t; - -#if defined (COMP_ISOURCE_ISOURCE_Msk) -/** - * @brief COMP current source selection on analog input. - */ -typedef enum -{ - NRF_COMP_ISOURCE_Off = COMP_ISOURCE_ISOURCE_Off, /*!< Current source disabled. */ - NRF_COMP_ISOURCE_Ien2uA5 = COMP_ISOURCE_ISOURCE_Ien2mA5, /*!< Current source enabled (+/- 2.5 uA). */ - NRF_COMP_ISOURCE_Ien5uA = COMP_ISOURCE_ISOURCE_Ien5mA, /*!< Current source enabled (+/- 5 uA). */ - NRF_COMP_ISOURCE_Ien10uA = COMP_ISOURCE_ISOURCE_Ien10mA /*!< Current source enabled (+/- 10 uA). */ -}nrf_isource_t; -#endif - -/** - * @enum nrf_comp_task_t - * @brief COMP tasks. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_COMP_TASK_START = offsetof(NRF_COMP_Type, TASKS_START), /*!< COMP start sampling task. */ - NRF_COMP_TASK_STOP = offsetof(NRF_COMP_Type, TASKS_STOP), /*!< COMP stop sampling task. */ - NRF_COMP_TASK_SAMPLE = offsetof(NRF_COMP_Type, TASKS_SAMPLE) /*!< Sample comparator value. */ - /*lint -restore*/ -}nrf_comp_task_t; - -/** - * @enum nrf_comp_event_t - * @brief COMP events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_COMP_EVENT_READY = offsetof(NRF_COMP_Type, EVENTS_READY), /*!< COMP is ready and output is valid. */ - NRF_COMP_EVENT_DOWN = offsetof(NRF_COMP_Type, EVENTS_DOWN), /*!< Input voltage crossed the threshold going down. */ - NRF_COMP_EVENT_UP = offsetof(NRF_COMP_Type, EVENTS_UP), /*!< Input voltage crossed the threshold going up. */ - NRF_COMP_EVENT_CROSS = offsetof(NRF_COMP_Type, EVENTS_CROSS) /*!< Input voltage crossed the threshold in any direction. */ - /*lint -restore*/ -}nrf_comp_event_t; - -/** - * @brief COMP reference configuration. - */ -typedef struct -{ - nrf_comp_ref_t reference; /*!< COMP reference selection. */ - nrf_comp_ext_ref_t external; /*!< COMP external analog reference selection. */ -}nrf_comp_ref_conf_t; - - -/** - * @brief Function for enabling the COMP peripheral. - */ -__STATIC_INLINE void nrf_comp_enable(void); - - -/** - * @brief Function for disabling the COMP peripheral. - */ - -__STATIC_INLINE void nrf_comp_disable(void); - -/** - * @brief Function for checking if the COMP peripheral is enabled. - * - * @retval true If the COMP peripheral is enabled. - * @retval false If the COMP peripheral is not enabled. - */ -__STATIC_INLINE bool nrf_comp_enable_check(void); - -/** - * @brief Function for setting the reference source. - * - * @param[in] reference COMP reference selection. - */ -__STATIC_INLINE void nrf_comp_ref_set(nrf_comp_ref_t reference); - - -/** - * @brief Function for setting the external analog reference source. - * - * @param[in] ext_ref COMP external analog reference selection. - */ -__STATIC_INLINE void nrf_comp_ext_ref_set(nrf_comp_ext_ref_t ext_ref); - - -/** - * @brief Function for setting threshold voltages. - * - * @param[in] threshold COMP VDOWN and VUP thresholds. - */ -__STATIC_INLINE void nrf_comp_th_set(nrf_comp_th_t threshold); - - -/** - * @brief Function for setting the main mode. - * - * @param[in] main_mode COMP main operation mode. - */ -__STATIC_INLINE void nrf_comp_main_mode_set(nrf_comp_main_mode_t main_mode); - - -/** - * @brief Function for setting the speed mode. - * - * @param[in] speed_mode COMP speed and power mode. - */ -__STATIC_INLINE void nrf_comp_speed_mode_set(nrf_comp_sp_mode_t speed_mode); - - -/** - * @brief Function for setting the hysteresis. - * - * @param[in] hyst COMP comparator hysteresis. - */ -__STATIC_INLINE void nrf_comp_hysteresis_set(nrf_comp_hyst_t hyst); - -#if defined (COMP_ISOURCE_ISOURCE_Msk) -/** - * @brief Function for setting the current source on the analog input. - * - * @param[in] isource COMP current source selection on analog input. - */ -__STATIC_INLINE void nrf_comp_isource_set(nrf_isource_t isource); -#endif - -/** - * @brief Function for selecting the active input of the COMP. - * - * @param[in] input Input to be selected. - */ -__STATIC_INLINE void nrf_comp_input_select(nrf_comp_input_t input); - - -/** - * @brief Function for getting the last COMP compare result. - * - * @return The last compare result. If 0, then VIN+ < VIN-. If 1, then VIN+ > VIN-. - * - * @note If VIN+ == VIN-, the return value depends on the previous result. - */ -__STATIC_INLINE uint32_t nrf_comp_result_get(void); - - -/** - * @brief Function for enabling interrupts from COMP. - * - * @param[in] comp_int_mask Mask of interrupts to be enabled. - * - * @sa nrf_comp_int_enable_check() - */ -__STATIC_INLINE void nrf_comp_int_enable(uint32_t comp_int_mask); - -/** - * @brief Function for disabling interrupts from COMP. - * - * @param[in] comp_int_mask Mask of interrupts to be disabled. - * - * @sa nrf_comp_int_enable_check() - */ -__STATIC_INLINE void nrf_comp_int_disable(uint32_t comp_int_mask); - - -/** - * @brief Function for getting the enabled interrupts of COMP. - * - * @param[in] comp_int_mask Mask of interrupts to be checked. - * - * @retval true If any interrupts of the specified mask are enabled. - */ -__STATIC_INLINE bool nrf_comp_int_enable_check(uint32_t comp_int_mask); - - - -/** - * @brief Function for getting the address of a specific COMP task register. - * - * @param[in] comp_task COMP task. - * - * @return Address of the specified COMP task. - */ -__STATIC_INLINE uint32_t * nrf_comp_task_address_get(nrf_comp_task_t comp_task); - - -/** - * @brief Function for getting the address of a specific COMP event register. - * - * @param[in] comp_event COMP event. - * - * @return Address of the specified COMP event. - */ -__STATIC_INLINE uint32_t * nrf_comp_event_address_get(nrf_comp_event_t comp_event); - - -/** - * @brief Function for setting COMP shorts. - * - * @param[in] comp_short_mask COMP shorts by mask. - * - */ -__STATIC_INLINE void nrf_comp_shorts_enable(uint32_t comp_short_mask); - - -/** - * @brief Function for clearing COMP shorts by mask. - * - * @param[in] comp_short_mask COMP shorts to be cleared. - * - */ -__STATIC_INLINE void nrf_comp_shorts_disable(uint32_t comp_short_mask); - - -/** - * @brief Function for setting a specific COMP task. - * - * @param[in] comp_task COMP task to be set. - * - */ -__STATIC_INLINE void nrf_comp_task_trigger(nrf_comp_task_t comp_task); - - -/** - * @brief Function for clearing a specific COMP event. - * - * @param[in] comp_event COMP event to be cleared. - * - */ -__STATIC_INLINE void nrf_comp_event_clear(nrf_comp_event_t comp_event); - - -/** - * @brief Function for getting the state of a specific COMP event. - * - * @retval true If the specified COMP event is active. - * - */ -__STATIC_INLINE bool nrf_comp_event_check(nrf_comp_event_t comp_event); - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_comp_enable(void) -{ - NRF_COMP->ENABLE = (COMP_ENABLE_ENABLE_Enabled << COMP_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_comp_disable(void) -{ - NRF_COMP->ENABLE = (COMP_ENABLE_ENABLE_Disabled << COMP_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE bool nrf_comp_enable_check(void) -{ - return ((NRF_COMP->ENABLE) & COMP_ENABLE_ENABLE_Enabled); -} - -__STATIC_INLINE void nrf_comp_ref_set(nrf_comp_ref_t reference) -{ - NRF_COMP->REFSEL = (reference << COMP_REFSEL_REFSEL_Pos); -} - -__STATIC_INLINE void nrf_comp_ext_ref_set(nrf_comp_ext_ref_t ext_ref) -{ - NRF_COMP->EXTREFSEL = (ext_ref << COMP_EXTREFSEL_EXTREFSEL_Pos); -} - -__STATIC_INLINE void nrf_comp_th_set(nrf_comp_th_t threshold) -{ - NRF_COMP->TH = - ((threshold.th_down << COMP_TH_THDOWN_Pos) & COMP_TH_THDOWN_Msk) | - ((threshold.th_up << COMP_TH_THUP_Pos) & COMP_TH_THUP_Msk); -} - -__STATIC_INLINE void nrf_comp_main_mode_set(nrf_comp_main_mode_t main_mode) -{ - NRF_COMP->MODE |= (main_mode << COMP_MODE_MAIN_Pos); -} - -__STATIC_INLINE void nrf_comp_speed_mode_set(nrf_comp_sp_mode_t speed_mode) -{ - NRF_COMP->MODE |= (speed_mode << COMP_MODE_SP_Pos); -} - -__STATIC_INLINE void nrf_comp_hysteresis_set(nrf_comp_hyst_t hyst) -{ - NRF_COMP->HYST = (hyst << COMP_HYST_HYST_Pos) & COMP_HYST_HYST_Msk; -} - -#if defined (COMP_ISOURCE_ISOURCE_Msk) -__STATIC_INLINE void nrf_comp_isource_set(nrf_isource_t isource) -{ - NRF_COMP->ISOURCE = (isource << COMP_ISOURCE_ISOURCE_Pos) & COMP_ISOURCE_ISOURCE_Msk; -} -#endif - -__STATIC_INLINE void nrf_comp_input_select(nrf_comp_input_t input) -{ - NRF_COMP->PSEL = ((uint32_t)input << COMP_PSEL_PSEL_Pos); -} - -__STATIC_INLINE uint32_t nrf_comp_result_get(void) -{ - return (uint32_t)NRF_COMP->RESULT; -} - -__STATIC_INLINE void nrf_comp_int_enable(uint32_t comp_int_mask) -{ - NRF_COMP->INTENSET = comp_int_mask; -} - -__STATIC_INLINE void nrf_comp_int_disable(uint32_t comp_int_mask) -{ - NRF_COMP->INTENCLR = comp_int_mask; -} - -__STATIC_INLINE bool nrf_comp_int_enable_check(uint32_t comp_int_mask) -{ - return (NRF_COMP->INTENSET & comp_int_mask); // when read this register will return the value of INTEN. -} - -__STATIC_INLINE uint32_t * nrf_comp_task_address_get(nrf_comp_task_t comp_task) -{ - return (uint32_t *)((uint8_t *)NRF_COMP + (uint32_t)comp_task); -} - -__STATIC_INLINE uint32_t * nrf_comp_event_address_get(nrf_comp_event_t comp_event) -{ - return (uint32_t *)((uint8_t *)NRF_COMP + (uint32_t)comp_event); -} - -__STATIC_INLINE void nrf_comp_shorts_enable(uint32_t comp_short_mask) -{ - NRF_COMP->SHORTS |= comp_short_mask; -} - -__STATIC_INLINE void nrf_comp_shorts_disable(uint32_t comp_short_mask) -{ - NRF_COMP->SHORTS &= ~comp_short_mask; -} - -__STATIC_INLINE void nrf_comp_task_trigger(nrf_comp_task_t comp_task) -{ - *( (volatile uint32_t *)( (uint8_t *)NRF_COMP + comp_task) ) = 1; -} - -__STATIC_INLINE void nrf_comp_event_clear(nrf_comp_event_t comp_event) -{ - *( (volatile uint32_t *)( (uint8_t *)NRF_COMP + (uint32_t)comp_event) ) = 0; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_COMP + (uint32_t)comp_event)); - (void)dummy; -#endif -} - -__STATIC_INLINE bool nrf_comp_event_check(nrf_comp_event_t comp_event) -{ - return (bool) (*(volatile uint32_t *)( (uint8_t *)NRF_COMP + comp_event)); -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - -/** - *@} - **/ - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_COMP_H_ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_ecb.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_ecb.c deleted file mode 100644 index d8c96d4ce87..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_ecb.c +++ /dev/null @@ -1,100 +0,0 @@ -/** - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @file - * @brief Implementation of AES ECB driver - */ - - -//lint -e438 - -#include -#include -#include -#include "nrf.h" -#include "nrf_ecb.h" - -static uint8_t ecb_data[48]; ///< ECB data structure for RNG peripheral to access. -static uint8_t* ecb_key; ///< Key: Starts at ecb_data -static uint8_t* ecb_cleartext; ///< Cleartext: Starts at ecb_data + 16 bytes. -static uint8_t* ecb_ciphertext; ///< Ciphertext: Starts at ecb_data + 32 bytes. - -bool nrf_ecb_init(void) -{ - ecb_key = ecb_data; - ecb_cleartext = ecb_data + 16; - ecb_ciphertext = ecb_data + 32; - - NRF_ECB->ECBDATAPTR = (uint32_t)ecb_data; - return true; -} - - -bool nrf_ecb_crypt(uint8_t * dest_buf, const uint8_t * src_buf) -{ - uint32_t counter = 0x1000000; - if (src_buf != ecb_cleartext) - { - memcpy(ecb_cleartext,src_buf,16); - } - NRF_ECB->EVENTS_ENDECB = 0; - NRF_ECB->TASKS_STARTECB = 1; - while (NRF_ECB->EVENTS_ENDECB == 0) - { - counter--; - if (counter == 0) - { - return false; - } - } - NRF_ECB->EVENTS_ENDECB = 0; - if (dest_buf != ecb_ciphertext) - { - memcpy(dest_buf,ecb_ciphertext,16); - } - return true; -} - -void nrf_ecb_set_key(const uint8_t * key) -{ - memcpy(ecb_key,key,16); -} - - diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_ecb.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_ecb.h deleted file mode 100644 index b9bf4fb0a87..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_ecb.h +++ /dev/null @@ -1,101 +0,0 @@ -/** - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @file - * @brief ECB driver API. - */ - -#ifndef NRF_ECB_H__ -#define NRF_ECB_H__ - -/** - * @defgroup nrf_ecb AES ECB encryption - * @{ - * @ingroup nrf_drivers - * @brief Driver for the AES Electronic Code Book (ECB) peripheral. - * - * To encrypt data, the peripheral must first be powered on - * using @ref nrf_ecb_init. Next, the key must be set using @ref nrf_ecb_set_key. - */ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Function for initializing and powering on the ECB peripheral. - * - * This function allocates memory for the ECBDATAPTR. - * @retval true If initialization was successful. - * @retval false If powering on failed. - */ -bool nrf_ecb_init(void); - -/** - * @brief Function for encrypting 16-byte data using current key. - * - * This function avoids unnecessary copying of data if the parameters point to the - * correct locations in the ECB data structure. - * - * @param dst Result of encryption, 16 bytes will be written. - * @param src Source with 16-byte data to be encrypted. - * - * @retval true If the encryption operation completed. - * @retval false If the encryption operation did not complete. - */ -bool nrf_ecb_crypt(uint8_t * dst, const uint8_t * src); - -/** - * @brief Function for setting the key to be used for encryption. - * - * @param key Pointer to the key. 16 bytes will be read. - */ -void nrf_ecb_set_key(const uint8_t * key); - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_ECB_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_egu.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_egu.h deleted file mode 100644 index 7610516149c..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_egu.h +++ /dev/null @@ -1,367 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_EGU_H__ -#define NRF_EGU_H__ - -/** -* @defgroup nrf_egu EGU (Event Generator Unit) abstraction -* @{ -* @ingroup nrf_drivers -* @brief @tagAPI52 EGU (Event Generator Unit) module functions. -* -*/ - -#include -#include -#include -#include "nrf_assert.h" -#include "nrf.h" -#include "nrf_peripherals.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @enum nrf_egu_task_t - * @brief EGU tasks. - */ -typedef enum -{ - /*lint -save -e30 -esym(628,__INTADDR__)*/ - NRF_EGU_TASK_TRIGGER0 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[0]), /**< Trigger 0 for triggering the corresponding TRIGGERED[0] event. */ - NRF_EGU_TASK_TRIGGER1 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[1]), /**< Trigger 1 for triggering the corresponding TRIGGERED[1] event. */ - NRF_EGU_TASK_TRIGGER2 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[2]), /**< Trigger 2 for triggering the corresponding TRIGGERED[2] event. */ - NRF_EGU_TASK_TRIGGER3 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[3]), /**< Trigger 3 for triggering the corresponding TRIGGERED[3] event. */ - NRF_EGU_TASK_TRIGGER4 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[4]), /**< Trigger 4 for triggering the corresponding TRIGGERED[4] event. */ - NRF_EGU_TASK_TRIGGER5 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[5]), /**< Trigger 5 for triggering the corresponding TRIGGERED[5] event. */ - NRF_EGU_TASK_TRIGGER6 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[6]), /**< Trigger 6 for triggering the corresponding TRIGGERED[6] event. */ - NRF_EGU_TASK_TRIGGER7 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[7]), /**< Trigger 7 for triggering the corresponding TRIGGERED[7] event. */ - NRF_EGU_TASK_TRIGGER8 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[8]), /**< Trigger 8 for triggering the corresponding TRIGGERED[8] event. */ - NRF_EGU_TASK_TRIGGER9 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[9]), /**< Trigger 9 for triggering the corresponding TRIGGERED[9] event. */ - NRF_EGU_TASK_TRIGGER10 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[10]), /**< Trigger 10 for triggering the corresponding TRIGGERED[10] event. */ - NRF_EGU_TASK_TRIGGER11 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[11]), /**< Trigger 11 for triggering the corresponding TRIGGERED[11] event. */ - NRF_EGU_TASK_TRIGGER12 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[12]), /**< Trigger 12 for triggering the corresponding TRIGGERED[12] event. */ - NRF_EGU_TASK_TRIGGER13 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[13]), /**< Trigger 13 for triggering the corresponding TRIGGERED[13] event. */ - NRF_EGU_TASK_TRIGGER14 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[14]), /**< Trigger 14 for triggering the corresponding TRIGGERED[14] event. */ - NRF_EGU_TASK_TRIGGER15 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[15]) /**< Trigger 15 for triggering the corresponding TRIGGERED[15] event. */ - /*lint -restore*/ -} nrf_egu_task_t; - - -/** - * @enum nrf_egu_event_t - * @brief EGU events. - */ -typedef enum -{ - /*lint -save -e30 -esym(628,__INTADDR__)*/ - NRF_EGU_EVENT_TRIGGERED0 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[0]), /**< Event number 0 generated by triggering the corresponding TRIGGER[0] task. */ - NRF_EGU_EVENT_TRIGGERED1 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[1]), /**< Event number 1 generated by triggering the corresponding TRIGGER[1] task. */ - NRF_EGU_EVENT_TRIGGERED2 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[2]), /**< Event number 2 generated by triggering the corresponding TRIGGER[2] task. */ - NRF_EGU_EVENT_TRIGGERED3 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[3]), /**< Event number 3 generated by triggering the corresponding TRIGGER[3] task. */ - NRF_EGU_EVENT_TRIGGERED4 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[4]), /**< Event number 4 generated by triggering the corresponding TRIGGER[4] task. */ - NRF_EGU_EVENT_TRIGGERED5 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[5]), /**< Event number 5 generated by triggering the corresponding TRIGGER[5] task. */ - NRF_EGU_EVENT_TRIGGERED6 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[6]), /**< Event number 6 generated by triggering the corresponding TRIGGER[6] task. */ - NRF_EGU_EVENT_TRIGGERED7 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[7]), /**< Event number 7 generated by triggering the corresponding TRIGGER[7] task. */ - NRF_EGU_EVENT_TRIGGERED8 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[8]), /**< Event number 8 generated by triggering the corresponding TRIGGER[8] task. */ - NRF_EGU_EVENT_TRIGGERED9 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[9]), /**< Event number 9 generated by triggering the corresponding TRIGGER[9] task. */ - NRF_EGU_EVENT_TRIGGERED10 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[10]), /**< Event number 10 generated by triggering the corresponding TRIGGER[10] task. */ - NRF_EGU_EVENT_TRIGGERED11 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[11]), /**< Event number 11 generated by triggering the corresponding TRIGGER[11] task. */ - NRF_EGU_EVENT_TRIGGERED12 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[12]), /**< Event number 12 generated by triggering the corresponding TRIGGER[12] task. */ - NRF_EGU_EVENT_TRIGGERED13 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[13]), /**< Event number 13 generated by triggering the corresponding TRIGGER[13] task. */ - NRF_EGU_EVENT_TRIGGERED14 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[14]), /**< Event number 14 generated by triggering the corresponding TRIGGER[14] task. */ - NRF_EGU_EVENT_TRIGGERED15 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[15]) /**< Event number 15 generated by triggering the corresponding TRIGGER[15] task. */ - /*lint -restore*/ -} nrf_egu_event_t; - - -/** - * @enum nrf_egu_int_mask_t - * @brief EGU interrupts. - */ -typedef enum -{ - NRF_EGU_INT_TRIGGERED0 = EGU_INTENSET_TRIGGERED0_Msk, /**< Interrupt on EVENTS_TRIGGERED[0] event. */ - NRF_EGU_INT_TRIGGERED1 = EGU_INTENSET_TRIGGERED1_Msk, /**< Interrupt on EVENTS_TRIGGERED[1] event. */ - NRF_EGU_INT_TRIGGERED2 = EGU_INTENSET_TRIGGERED2_Msk, /**< Interrupt on EVENTS_TRIGGERED[2] event. */ - NRF_EGU_INT_TRIGGERED3 = EGU_INTENSET_TRIGGERED3_Msk, /**< Interrupt on EVENTS_TRIGGERED[3] event. */ - NRF_EGU_INT_TRIGGERED4 = EGU_INTENSET_TRIGGERED4_Msk, /**< Interrupt on EVENTS_TRIGGERED[4] event. */ - NRF_EGU_INT_TRIGGERED5 = EGU_INTENSET_TRIGGERED5_Msk, /**< Interrupt on EVENTS_TRIGGERED[5] event. */ - NRF_EGU_INT_TRIGGERED6 = EGU_INTENSET_TRIGGERED6_Msk, /**< Interrupt on EVENTS_TRIGGERED[6] event. */ - NRF_EGU_INT_TRIGGERED7 = EGU_INTENSET_TRIGGERED7_Msk, /**< Interrupt on EVENTS_TRIGGERED[7] event. */ - NRF_EGU_INT_TRIGGERED8 = EGU_INTENSET_TRIGGERED8_Msk, /**< Interrupt on EVENTS_TRIGGERED[8] event. */ - NRF_EGU_INT_TRIGGERED9 = EGU_INTENSET_TRIGGERED9_Msk, /**< Interrupt on EVENTS_TRIGGERED[9] event. */ - NRF_EGU_INT_TRIGGERED10 = EGU_INTENSET_TRIGGERED10_Msk, /**< Interrupt on EVENTS_TRIGGERED[10] event. */ - NRF_EGU_INT_TRIGGERED11 = EGU_INTENSET_TRIGGERED11_Msk, /**< Interrupt on EVENTS_TRIGGERED[11] event. */ - NRF_EGU_INT_TRIGGERED12 = EGU_INTENSET_TRIGGERED12_Msk, /**< Interrupt on EVENTS_TRIGGERED[12] event. */ - NRF_EGU_INT_TRIGGERED13 = EGU_INTENSET_TRIGGERED13_Msk, /**< Interrupt on EVENTS_TRIGGERED[13] event. */ - NRF_EGU_INT_TRIGGERED14 = EGU_INTENSET_TRIGGERED14_Msk, /**< Interrupt on EVENTS_TRIGGERED[14] event. */ - NRF_EGU_INT_TRIGGERED15 = EGU_INTENSET_TRIGGERED15_Msk, /**< Interrupt on EVENTS_TRIGGERED[15] event. */ - NRF_EGU_INT_ALL = 0xFFFFuL -} nrf_egu_int_mask_t; - -/**@brief Function for getting max channel number of given EGU. - * - * @param NRF_EGUx EGU instance. - * - * @returns number of available channels. - */ -__STATIC_INLINE uint32_t nrf_egu_channel_count(NRF_EGU_Type * NRF_EGUx) -{ - if (NRF_EGUx == NRF_EGU0){ - return EGU0_CH_NUM; - } - if (NRF_EGUx == NRF_EGU1){ - return EGU1_CH_NUM; - } -#if EGU_COUNT > 2 - if (NRF_EGUx == NRF_EGU2){ - return EGU2_CH_NUM; - } - if (NRF_EGUx == NRF_EGU3){ - return EGU3_CH_NUM; - } - if (NRF_EGUx == NRF_EGU4){ - return EGU4_CH_NUM; - } - if (NRF_EGUx == NRF_EGU5){ - return EGU5_CH_NUM; - } -#endif - return 0; -} - -/** - * @brief Function for triggering a specific EGU task. - * - * @param NRF_EGUx EGU instance. - * @param egu_task EGU task. - */ -__STATIC_INLINE void nrf_egu_task_trigger(NRF_EGU_Type * NRF_EGUx, nrf_egu_task_t egu_task) -{ - ASSERT(NRF_EGUx); - *((volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_task)) = 0x1UL; -} - - -/** - * @brief Function for returning the address of a specific EGU task register. - * - * @param NRF_EGUx EGU instance. - * @param egu_task EGU task. - */ -__STATIC_INLINE uint32_t * nrf_egu_task_address_get(NRF_EGU_Type * NRF_EGUx, - nrf_egu_task_t egu_task) -{ - ASSERT(NRF_EGUx); - return (uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_task); -} - - -/** - * @brief Function for returning the address of a specific EGU TRIGGER task register. - * - * @param NRF_EGUx EGU instance. - * @param channel Channel number. - */ -__STATIC_INLINE uint32_t * nrf_egu_task_trigger_address_get(NRF_EGU_Type * NRF_EGUx, - uint8_t channel) -{ - ASSERT(NRF_EGUx); - ASSERT(channel < nrf_egu_channel_count(NRF_EGUx)); - return (uint32_t*)&NRF_EGUx->TASKS_TRIGGER[channel]; -} - - -/** - * @brief Function for returning the specific EGU TRIGGER task. - * - * @param NRF_EGUx EGU instance. - * @param channel Channel number. - */ -__STATIC_INLINE nrf_egu_task_t nrf_egu_task_trigger_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel) -{ - ASSERT(NRF_EGUx); - ASSERT(channel < nrf_egu_channel_count(NRF_EGUx)); - return (nrf_egu_task_t)((uint32_t) NRF_EGU_TASK_TRIGGER0 + (channel * sizeof(uint32_t))); -} - - -/** - * @brief Function for returning the state of a specific EGU event. - * - * @param NRF_EGUx EGU instance. - * @param egu_event EGU event to check. - */ -__STATIC_INLINE bool nrf_egu_event_check(NRF_EGU_Type * NRF_EGUx, - nrf_egu_event_t egu_event) -{ - ASSERT(NRF_EGUx); - return (bool)*(volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event); -} - - -/** - * @brief Function for clearing a specific EGU event. - * - * @param NRF_EGUx EGU instance. - * @param egu_event EGU event to clear. - */ -__STATIC_INLINE void nrf_egu_event_clear(NRF_EGU_Type * NRF_EGUx, - nrf_egu_event_t egu_event) -{ - ASSERT(NRF_EGUx); - *((volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event)); - (void)dummy; -#endif -} - - -/** - * @brief Function for returning the address of a specific EGU event register. - * - * @param NRF_EGUx EGU instance. - * @param egu_event EGU event. - */ -__STATIC_INLINE uint32_t * nrf_egu_event_address_get(NRF_EGU_Type * NRF_EGUx, - nrf_egu_event_t egu_event) -{ - ASSERT(NRF_EGUx); - return (uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event); -} - - -/** - * @brief Function for returning the address of a specific EGU TRIGGERED event register. - * - * @param NRF_EGUx EGU instance. - * @param channel Channel number. - */ -__STATIC_INLINE uint32_t * nrf_egu_event_triggered_address_get(NRF_EGU_Type * NRF_EGUx, - uint8_t channel) -{ - ASSERT(NRF_EGUx); - ASSERT(channel < nrf_egu_channel_count(NRF_EGUx)); - return (uint32_t*)&NRF_EGUx->EVENTS_TRIGGERED[channel]; -} - - -/** - * @brief Function for returning the specific EGU TRIGGERED event. - * - * @param NRF_EGUx EGU instance. - * @param channel Channel number. - */ -__STATIC_INLINE nrf_egu_event_t nrf_egu_event_triggered_get(NRF_EGU_Type * NRF_EGUx, - uint8_t channel) -{ - ASSERT(NRF_EGUx); - ASSERT(channel < nrf_egu_channel_count(NRF_EGUx)); - return (nrf_egu_event_t)((uint32_t) NRF_EGU_EVENT_TRIGGERED0 + (channel * sizeof(uint32_t))); -} - - -/** - * @brief Function for enabling one or more specific EGU interrupts. - * - * @param NRF_EGUx EGU instance. - * @param egu_int_mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_egu_int_enable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask) -{ - ASSERT(NRF_EGUx); - NRF_EGUx->INTENSET = egu_int_mask; -} - - -/** - * @brief Function for retrieving the state of one or more EGU interrupts. - * - * @param NRF_EGUx EGU instance. - * @param egu_int_mask Interrupts to check. - * - * @retval true If all of the specified interrupts are enabled. - * @retval false If at least one of the specified interrupts is disabled. - */ -__STATIC_INLINE bool nrf_egu_int_enable_check(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask) -{ - ASSERT(NRF_EGUx); - return (bool)(NRF_EGUx->INTENSET & egu_int_mask); -} - - -/** - * @brief Function for disabling one or more specific EGU interrupts. - * - * @param NRF_EGUx EGU instance. - * @param egu_int_mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_egu_int_disable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask) -{ - ASSERT(NRF_EGUx); - NRF_EGUx->INTENCLR = egu_int_mask; -} - -/** - * @brief Function for retrieving one or more specific EGU interrupts. - * - * @param NRF_EGUx EGU instance. - * @param channel Channel number. - * - * @returns EGU interrupt mask. - */ -__STATIC_INLINE nrf_egu_int_mask_t nrf_egu_int_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel) -{ - ASSERT(NRF_EGUx); - ASSERT(channel < nrf_egu_channel_count(NRF_EGUx)); - return (nrf_egu_int_mask_t)((uint32_t) (EGU_INTENSET_TRIGGERED0_Msk << channel)); -} - -/** @} */ - - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_gpio.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_gpio.h deleted file mode 100644 index ccd408c0ad7..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_gpio.h +++ /dev/null @@ -1,795 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_GPIO_H__ -#define NRF_GPIO_H__ - -#include "nrf.h" -#include "nrf_peripherals.h" -#include "nrf_assert.h" -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup nrf_gpio GPIO abstraction - * @{ - * @ingroup nrf_drivers - * @brief GPIO pin abstraction and port abstraction for reading and writing byte-wise to GPIO ports. - */ - -#if (GPIO_COUNT == 1) -#define NUMBER_OF_PINS (P0_PIN_NUM) -#define GPIO_REG_LIST {NRF_GPIO} -#elif (GPIO_COUNT == 2) -#define NUMBER_OF_PINS (P0_PIN_NUM + P1_PIN_NUM) -#define GPIO_REG_LIST {NRF_P0, NRF_P1} -#else -#error "Not supported." -#endif - - -/** - * @brief Macro for mapping port and pin numbers to values understandable for nrf_gpio functions. - */ -#define NRF_GPIO_PIN_MAP(port, pin) ((port << 5) | (pin & 0x1F)) - -/** - * @brief Pin direction definitions. - */ -typedef enum -{ - NRF_GPIO_PIN_DIR_INPUT = GPIO_PIN_CNF_DIR_Input, ///< Input. - NRF_GPIO_PIN_DIR_OUTPUT = GPIO_PIN_CNF_DIR_Output ///< Output. -} nrf_gpio_pin_dir_t; - -/** - * @brief Connection of input buffer. - */ -typedef enum -{ - NRF_GPIO_PIN_INPUT_CONNECT = GPIO_PIN_CNF_INPUT_Connect, ///< Connect input buffer. - NRF_GPIO_PIN_INPUT_DISCONNECT = GPIO_PIN_CNF_INPUT_Disconnect ///< Disconnect input buffer. -} nrf_gpio_pin_input_t; - -/** - * @brief Enumerator used for selecting the pin to be pulled down or up at the time of pin configuration. - */ -typedef enum -{ - NRF_GPIO_PIN_NOPULL = GPIO_PIN_CNF_PULL_Disabled, ///< Pin pull-up resistor disabled. - NRF_GPIO_PIN_PULLDOWN = GPIO_PIN_CNF_PULL_Pulldown, ///< Pin pull-down resistor enabled. - NRF_GPIO_PIN_PULLUP = GPIO_PIN_CNF_PULL_Pullup, ///< Pin pull-up resistor enabled. -} nrf_gpio_pin_pull_t; - -/** - * @brief Enumerator used for selecting output drive mode. - */ -typedef enum -{ - NRF_GPIO_PIN_S0S1 = GPIO_PIN_CNF_DRIVE_S0S1, ///< !< Standard '0', standard '1'. - NRF_GPIO_PIN_H0S1 = GPIO_PIN_CNF_DRIVE_H0S1, ///< !< High-drive '0', standard '1'. - NRF_GPIO_PIN_S0H1 = GPIO_PIN_CNF_DRIVE_S0H1, ///< !< Standard '0', high-drive '1'. - NRF_GPIO_PIN_H0H1 = GPIO_PIN_CNF_DRIVE_H0H1, ///< !< High drive '0', high-drive '1'. - NRF_GPIO_PIN_D0S1 = GPIO_PIN_CNF_DRIVE_D0S1, ///< !< Disconnect '0' standard '1'. - NRF_GPIO_PIN_D0H1 = GPIO_PIN_CNF_DRIVE_D0H1, ///< !< Disconnect '0', high-drive '1'. - NRF_GPIO_PIN_S0D1 = GPIO_PIN_CNF_DRIVE_S0D1, ///< !< Standard '0', disconnect '1'. - NRF_GPIO_PIN_H0D1 = GPIO_PIN_CNF_DRIVE_H0D1, ///< !< High-drive '0', disconnect '1'. -} nrf_gpio_pin_drive_t; - -/** - * @brief Enumerator used for selecting the pin to sense high or low level on the pin input. - */ -typedef enum -{ - NRF_GPIO_PIN_NOSENSE = GPIO_PIN_CNF_SENSE_Disabled, ///< Pin sense level disabled. - NRF_GPIO_PIN_SENSE_LOW = GPIO_PIN_CNF_SENSE_Low, ///< Pin sense low level. - NRF_GPIO_PIN_SENSE_HIGH = GPIO_PIN_CNF_SENSE_High, ///< Pin sense high level. -} nrf_gpio_pin_sense_t; - - -#if (__LINT__ != 1) - -/** - * @brief Function for configuring the GPIO pin range as output pins with normal drive strength. - * This function can be used to configure pin range as simple output with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases). - * - * @param pin_range_start Specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30). - * - * @param pin_range_end Specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30). - * - * @note For configuring only one pin as output, use @ref nrf_gpio_cfg_output. - * Sense capability on the pin is disabled and input is disconnected from the buffer as the pins are configured as output. - */ -__STATIC_INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end); - -/** - * @brief Function for configuring the GPIO pin range as input pins with given initial value set, hiding inner details. - * This function can be used to configure pin range as simple input. - * - * @param pin_range_start Specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30). - * - * @param pin_range_end Specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30). - * - * @param pull_config State of the pin range pull resistor (no pull, pulled down, or pulled high). - * - * @note For configuring only one pin as input, use @ref nrf_gpio_cfg_input. - * Sense capability on the pin is disabled and input is connected to buffer so that the GPIO->IN register is readable. - */ -__STATIC_INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start, - uint32_t pin_range_end, - nrf_gpio_pin_pull_t pull_config); - -/** - * @brief Pin configuration function. - * - * The main pin configuration function. - * This function allows to set any aspect in PIN_CNF register. - * @param pin_number Specifies the pin number. - * @param dir Pin direction. - * @param input Connect or disconnect the input buffer. - * @param pull Pull configuration. - * @param drive Drive configuration. - * @param sense Pin sensing mechanism. - */ -__STATIC_INLINE void nrf_gpio_cfg( - uint32_t pin_number, - nrf_gpio_pin_dir_t dir, - nrf_gpio_pin_input_t input, - nrf_gpio_pin_pull_t pull, - nrf_gpio_pin_drive_t drive, - nrf_gpio_pin_sense_t sense); - -/** - * @brief Function for configuring the given GPIO pin number as output, hiding inner details. - * This function can be used to configure a pin as simple output with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases). - * - * @param pin_number Specifies the pin number. - * - * @note Sense capability on the pin is disabled and input is disconnected from the buffer as the pins are configured as output. - */ -__STATIC_INLINE void nrf_gpio_cfg_output(uint32_t pin_number); - -/** - * @brief Function for configuring the given GPIO pin number as input, hiding inner details. - * This function can be used to configure a pin as simple input. - * - * @param pin_number Specifies the pin number. - * @param pull_config State of the pin range pull resistor (no pull, pulled down, or pulled high). - * - * @note Sense capability on the pin is disabled and input is connected to buffer so that the GPIO->IN register is readable. - */ -__STATIC_INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config); - -/** - * @brief Function for resetting pin configuration to its default state. - * - * @param pin_number Specifies the pin number. - */ -__STATIC_INLINE void nrf_gpio_cfg_default(uint32_t pin_number); - -/** - * @brief Function for configuring the given GPIO pin number as a watcher. Only input is connected. - * - * @param pin_number Specifies the pin number. - * - */ -__STATIC_INLINE void nrf_gpio_cfg_watcher(uint32_t pin_number); - -/** - * @brief Function for disconnecting input for the given GPIO. - * - * @param pin_number Specifies the pin number. - * - */ -__STATIC_INLINE void nrf_gpio_input_disconnect(uint32_t pin_number); - -/** - * @brief Function for configuring the given GPIO pin number as input, hiding inner details. - * This function can be used to configure pin range as simple input. - * Sense capability on the pin is configurable and input is connected to buffer so that the GPIO->IN register is readable. - * - * @param pin_number Specifies the pin number. - * @param pull_config State of the pin pull resistor (no pull, pulled down, or pulled high). - * @param sense_config Sense level of the pin (no sense, sense low, or sense high). - */ -__STATIC_INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number, - nrf_gpio_pin_pull_t pull_config, - nrf_gpio_pin_sense_t sense_config); - -/** - * @brief Function for configuring sense level for the given GPIO. - * - * @param pin_number Specifies the pin number. - * @param sense_config Sense configuration. - * - */ -__STATIC_INLINE void nrf_gpio_cfg_sense_set(uint32_t pin_number, nrf_gpio_pin_sense_t sense_config); - -/** - * @brief Function for setting the direction for a GPIO pin. - * - * @param pin_number Specifies the pin number for which to set the direction. - * - * @param direction Specifies the direction. - */ -__STATIC_INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_t direction); - -/** - * @brief Function for setting a GPIO pin. - * - * Note that the pin must be configured as an output for this function to have any effect. - * - * @param pin_number Specifies the pin number to set. - */ -__STATIC_INLINE void nrf_gpio_pin_set(uint32_t pin_number); - -/** - * @brief Function for clearing a GPIO pin. - * - * Note that the pin must be configured as an output for this - * function to have any effect. - * - * @param pin_number Specifies the pin number to clear. - */ -__STATIC_INLINE void nrf_gpio_pin_clear(uint32_t pin_number); - -/** - * @brief Function for toggling a GPIO pin. - * - * Note that the pin must be configured as an output for this - * function to have any effect. - * - * @param pin_number Specifies the pin number to toggle. - */ -__STATIC_INLINE void nrf_gpio_pin_toggle(uint32_t pin_number); - -/** - * @brief Function for writing a value to a GPIO pin. - * - * Note that the pin must be configured as an output for this - * function to have any effect. - * - * @param pin_number Specifies the pin number to write. - * - * @param value Specifies the value to be written to the pin. - * @arg 0 Clears the pin. - * @arg >=1 Sets the pin. - */ -__STATIC_INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value); - -/** - * @brief Function for reading the input level of a GPIO pin. - * - * Note that the pin must have input connected for the value - * returned from this function to be valid. - * - * @param pin_number Specifies the pin number to read. - * - * @return 0 if the pin input level is low. Positive value if the pin is high. - */ -__STATIC_INLINE uint32_t nrf_gpio_pin_read(uint32_t pin_number); - -/** - * @brief Function for reading the output level of a GPIO pin. - * - * @param pin_number Specifies the pin number to read. - * - * @return 0 if the pin output level is low. Positive value if pin output is high. - */ -__STATIC_INLINE uint32_t nrf_gpio_pin_out_read(uint32_t pin_number); - -/** - * @brief Function for reading the sense configuration of a GPIO pin. - * - * @param pin_number Specifies the pin number to read. - * - * @retval Sense configuration. - */ -__STATIC_INLINE nrf_gpio_pin_sense_t nrf_gpio_pin_sense_get(uint32_t pin_number); - -/** - * @brief Function for setting output direction on selected pins on a given port. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param out_mask Mask specifying the pins to set as output. - * - */ -__STATIC_INLINE void nrf_gpio_port_dir_output_set(NRF_GPIO_Type * p_reg, uint32_t out_mask); - -/** - * @brief Function for setting input direction on selected pins on a given port. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param in_mask Mask specifying the pins to set as input. - * - */ -__STATIC_INLINE void nrf_gpio_port_dir_input_set(NRF_GPIO_Type * p_reg, uint32_t in_mask); - -/** - * @brief Function for writing the direction configuration of GPIO pins in a given port. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param dir_mask Mask specifying the direction of pins. Bit set means that the given pin is configured as output. - * - */ -__STATIC_INLINE void nrf_gpio_port_dir_write(NRF_GPIO_Type * p_reg, uint32_t dir_mask); - -/** - * @brief Function for reading the direction configuration of a GPIO port. - * - * @param p_reg Pointer to the peripheral registers structure. - * - * @retval Pin configuration of the current direction settings. Bit set means that the given pin is configured as output. - */ -__STATIC_INLINE uint32_t nrf_gpio_port_dir_read(NRF_GPIO_Type const * p_reg); - -/** - * @brief Function for reading the input signals of GPIO pins on a given port. - * - * @param p_reg Pointer to the peripheral registers structure. - * - * @retval Port input values. - */ -__STATIC_INLINE uint32_t nrf_gpio_port_in_read(NRF_GPIO_Type const * p_reg); - -/** - * @brief Function for reading the output signals of GPIO pins of a given port. - * - * @param p_reg Pointer to the peripheral registers structure. - * - * @retval Port output values. - */ -__STATIC_INLINE uint32_t nrf_gpio_port_out_read(NRF_GPIO_Type const * p_reg); - -/** - * @brief Function for writing the GPIO pins output on a given port. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param value Output port mask. - * - */ -__STATIC_INLINE void nrf_gpio_port_out_write(NRF_GPIO_Type * p_reg, uint32_t value); - -/** - * @brief Function for setting high level on selected GPIO pins of a given port. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param set_mask Mask with pins to set as logical high level. - * - */ -__STATIC_INLINE void nrf_gpio_port_out_set(NRF_GPIO_Type * p_reg, uint32_t set_mask); - -/** - * @brief Function for setting low level on selected GPIO pins of a given port. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param clr_mask Mask with pins to set as logical low level. - * - */ -__STATIC_INLINE void nrf_gpio_port_out_clear(NRF_GPIO_Type * p_reg, uint32_t clr_mask); - -/** - * @brief Function for reading pins state of multiple consecutive ports. - * - * @param start_port Index of the first port to read. - * @param length Number of ports to read. - * @param p_masks Pointer to output array where port states will be stored. - */ -__STATIC_INLINE void nrf_gpio_ports_read(uint32_t start_port, uint32_t length, uint32_t * p_masks); - -#ifdef GPIO_DETECTMODE_DETECTMODE_LDETECT -/** - * @brief Function for reading latch state of multiple consecutive ports. - * - * @param start_port Index of the first port to read. - * @param length Number of ports to read. - * @param p_masks Pointer to output array where latch states will be stored. - */ -__STATIC_INLINE void nrf_gpio_latches_read(uint32_t start_port, uint32_t length, - uint32_t * p_masks); - -/** - * @brief Function for reading latch state of single pin. - * - * @param pin_number Pin number. - * @return 0 if latch is not set. Positive value otherwise. - * - */ -__STATIC_INLINE uint32_t nrf_gpio_pin_latch_get(uint32_t pin_number); - -/** - * @brief Function for clearing latch state of a single pin. - * - * @param pin_number Pin number. - * - */ -__STATIC_INLINE void nrf_gpio_pin_latch_clear(uint32_t pin_number); -#endif - - -#endif // #ifndef (__LINT__ != 1) - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -/** - * @brief Function for extracting port and relative pin number from absolute pin number. - * - * @param[inout] Pointer to absolute pin number which is overriden by relative to port pin number. - * - * @return Pointer to port register set. - * - */ -__STATIC_INLINE NRF_GPIO_Type * nrf_gpio_pin_port_decode(uint32_t * p_pin) -{ - ASSERT(*p_pin < NUMBER_OF_PINS); -#if (GPIO_COUNT == 1) - // The oldest definition case - return NRF_GPIO; -#else - if (*p_pin < P0_PIN_NUM) - { - return NRF_P0; - } - else - { - *p_pin = *p_pin & (P0_PIN_NUM - 1); - return NRF_P1; - } -#endif -} - - -__STATIC_INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end) -{ - /*lint -e{845} // A zero has been given as right argument to operator '|'" */ - for (; pin_range_start <= pin_range_end; pin_range_start++) - { - nrf_gpio_cfg_output(pin_range_start); - } -} - - -__STATIC_INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start, - uint32_t pin_range_end, - nrf_gpio_pin_pull_t pull_config) -{ - /*lint -e{845} // A zero has been given as right argument to operator '|'" */ - for (; pin_range_start <= pin_range_end; pin_range_start++) - { - nrf_gpio_cfg_input(pin_range_start, pull_config); - } -} - - -__STATIC_INLINE void nrf_gpio_cfg( - uint32_t pin_number, - nrf_gpio_pin_dir_t dir, - nrf_gpio_pin_input_t input, - nrf_gpio_pin_pull_t pull, - nrf_gpio_pin_drive_t drive, - nrf_gpio_pin_sense_t sense) -{ - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - - reg->PIN_CNF[pin_number] = ((uint32_t)dir << GPIO_PIN_CNF_DIR_Pos) - | ((uint32_t)input << GPIO_PIN_CNF_INPUT_Pos) - | ((uint32_t)pull << GPIO_PIN_CNF_PULL_Pos) - | ((uint32_t)drive << GPIO_PIN_CNF_DRIVE_Pos) - | ((uint32_t)sense << GPIO_PIN_CNF_SENSE_Pos); -} - - -__STATIC_INLINE void nrf_gpio_cfg_output(uint32_t pin_number) -{ - nrf_gpio_cfg( - pin_number, - NRF_GPIO_PIN_DIR_OUTPUT, - NRF_GPIO_PIN_INPUT_DISCONNECT, - NRF_GPIO_PIN_NOPULL, - NRF_GPIO_PIN_S0S1, - NRF_GPIO_PIN_NOSENSE); -} - - -__STATIC_INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config) -{ - nrf_gpio_cfg( - pin_number, - NRF_GPIO_PIN_DIR_INPUT, - NRF_GPIO_PIN_INPUT_CONNECT, - pull_config, - NRF_GPIO_PIN_S0S1, - NRF_GPIO_PIN_NOSENSE); -} - - -__STATIC_INLINE void nrf_gpio_cfg_default(uint32_t pin_number) -{ - nrf_gpio_cfg( - pin_number, - NRF_GPIO_PIN_DIR_INPUT, - NRF_GPIO_PIN_INPUT_DISCONNECT, - NRF_GPIO_PIN_NOPULL, - NRF_GPIO_PIN_S0S1, - NRF_GPIO_PIN_NOSENSE); -} - - -__STATIC_INLINE void nrf_gpio_cfg_watcher(uint32_t pin_number) -{ - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - /*lint -e{845} // A zero has been given as right argument to operator '|'" */ - uint32_t cnf = reg->PIN_CNF[pin_number] & ~GPIO_PIN_CNF_INPUT_Msk; - - reg->PIN_CNF[pin_number] = cnf | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos); -} - - -__STATIC_INLINE void nrf_gpio_input_disconnect(uint32_t pin_number) -{ - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - /*lint -e{845} // A zero has been given as right argument to operator '|'" */ - uint32_t cnf = reg->PIN_CNF[pin_number] & ~GPIO_PIN_CNF_INPUT_Msk; - - reg->PIN_CNF[pin_number] = cnf | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos); -} - - -__STATIC_INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number, - nrf_gpio_pin_pull_t pull_config, - nrf_gpio_pin_sense_t sense_config) -{ - nrf_gpio_cfg( - pin_number, - NRF_GPIO_PIN_DIR_INPUT, - NRF_GPIO_PIN_INPUT_CONNECT, - pull_config, - NRF_GPIO_PIN_S0S1, - sense_config); -} - - -__STATIC_INLINE void nrf_gpio_cfg_sense_set(uint32_t pin_number, nrf_gpio_pin_sense_t sense_config) -{ - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - - /*lint -e{845} // A zero has been given as right argument to operator '|'" */ - reg->PIN_CNF[pin_number] &= ~GPIO_PIN_CNF_SENSE_Msk; - reg->PIN_CNF[pin_number] |= (sense_config << GPIO_PIN_CNF_SENSE_Pos); -} - - -__STATIC_INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_t direction) -{ - if (direction == NRF_GPIO_PIN_DIR_INPUT) - { - nrf_gpio_cfg( - pin_number, - NRF_GPIO_PIN_DIR_INPUT, - NRF_GPIO_PIN_INPUT_CONNECT, - NRF_GPIO_PIN_NOPULL, - NRF_GPIO_PIN_S0S1, - NRF_GPIO_PIN_NOSENSE); - } - else - { - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - reg->DIRSET = (1UL << pin_number); - } -} - - -__STATIC_INLINE void nrf_gpio_pin_set(uint32_t pin_number) -{ - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - - nrf_gpio_port_out_set(reg, 1UL << pin_number); -} - - -__STATIC_INLINE void nrf_gpio_pin_clear(uint32_t pin_number) -{ - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - - nrf_gpio_port_out_clear(reg, 1UL << pin_number); -} - - -__STATIC_INLINE void nrf_gpio_pin_toggle(uint32_t pin_number) -{ - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - uint32_t pins_state = reg->OUT; - - reg->OUTSET = (~pins_state & (1UL << pin_number)); - reg->OUTCLR = (pins_state & (1UL << pin_number)); -} - - -__STATIC_INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value) -{ - if (value == 0) - { - nrf_gpio_pin_clear(pin_number); - } - else - { - nrf_gpio_pin_set(pin_number); - } -} - - -__STATIC_INLINE uint32_t nrf_gpio_pin_read(uint32_t pin_number) -{ - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - - return ((nrf_gpio_port_in_read(reg) >> pin_number) & 1UL); -} - - -__STATIC_INLINE uint32_t nrf_gpio_pin_out_read(uint32_t pin_number) -{ - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - - return ((nrf_gpio_port_out_read(reg) >> pin_number) & 1UL); -} - - -__STATIC_INLINE nrf_gpio_pin_sense_t nrf_gpio_pin_sense_get(uint32_t pin_number) -{ - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - - return (nrf_gpio_pin_sense_t)((reg->PIN_CNF[pin_number] & - GPIO_PIN_CNF_SENSE_Msk) >> GPIO_PIN_CNF_SENSE_Pos); -} - - -__STATIC_INLINE void nrf_gpio_port_dir_output_set(NRF_GPIO_Type * p_reg, uint32_t out_mask) -{ - p_reg->DIRSET = out_mask; -} - - -__STATIC_INLINE void nrf_gpio_port_dir_input_set(NRF_GPIO_Type * p_reg, uint32_t in_mask) -{ - p_reg->DIRCLR = in_mask; -} - - -__STATIC_INLINE void nrf_gpio_port_dir_write(NRF_GPIO_Type * p_reg, uint32_t value) -{ - p_reg->DIR = value; -} - - -__STATIC_INLINE uint32_t nrf_gpio_port_dir_read(NRF_GPIO_Type const * p_reg) -{ - return p_reg->DIR; -} - - -__STATIC_INLINE uint32_t nrf_gpio_port_in_read(NRF_GPIO_Type const * p_reg) -{ - return p_reg->IN; -} - - -__STATIC_INLINE uint32_t nrf_gpio_port_out_read(NRF_GPIO_Type const * p_reg) -{ - return p_reg->OUT; -} - - -__STATIC_INLINE void nrf_gpio_port_out_write(NRF_GPIO_Type * p_reg, uint32_t value) -{ - p_reg->OUT = value; -} - - -__STATIC_INLINE void nrf_gpio_port_out_set(NRF_GPIO_Type * p_reg, uint32_t set_mask) -{ - p_reg->OUTSET = set_mask; -} - - -__STATIC_INLINE void nrf_gpio_port_out_clear(NRF_GPIO_Type * p_reg, uint32_t clr_mask) -{ - p_reg->OUTCLR = clr_mask; -} - - -__STATIC_INLINE void nrf_gpio_ports_read(uint32_t start_port, uint32_t length, uint32_t * p_masks) -{ - NRF_GPIO_Type * gpio_regs[GPIO_COUNT] = GPIO_REG_LIST; - - ASSERT(start_port + length <= GPIO_COUNT); - uint32_t i; - - for (i = start_port; i < (start_port + length); i++) - { - *p_masks = nrf_gpio_port_in_read(gpio_regs[i]); - p_masks++; - } -} - - -#ifdef GPIO_DETECTMODE_DETECTMODE_LDETECT -__STATIC_INLINE void nrf_gpio_latches_read(uint32_t start_port, uint32_t length, uint32_t * p_masks) -{ - NRF_GPIO_Type * gpio_regs[GPIO_COUNT] = GPIO_REG_LIST; - uint32_t i; - - for (i = start_port; i < (start_port + length); i++) - { - *p_masks = gpio_regs[i]->LATCH; - p_masks++; - } -} - - -__STATIC_INLINE uint32_t nrf_gpio_pin_latch_get(uint32_t pin_number) -{ - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - - return (reg->LATCH & (1 << pin_number)) ? 1 : 0; -} - - -__STATIC_INLINE void nrf_gpio_pin_latch_clear(uint32_t pin_number) -{ - NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number); - - reg->LATCH = (1 << pin_number); -} - - -#endif -#endif // SUPPRESS_INLINE_IMPLEMENTATION - -/** @} */ - - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_gpiote.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_gpiote.h deleted file mode 100644 index df9bd35ce6e..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_gpiote.h +++ /dev/null @@ -1,430 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_GPIOTE_H__ -#define NRF_GPIOTE_H__ - -#include "nrf_peripherals.h" -#include "nrf.h" -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef GPIOTE_CONFIG_PORT_Msk -#define GPIOTE_CONFIG_PORT_PIN_Msk (GPIOTE_CONFIG_PORT_Msk | GPIOTE_CONFIG_PSEL_Msk) -#else -#define GPIOTE_CONFIG_PORT_PIN_Msk GPIOTE_CONFIG_PSEL_Msk -#endif -/** -* @defgroup nrf_gpiote_abs GPIOTE abstraction -* @{ -* @ingroup nrf_gpiote -* @brief GPIOTE abstraction for configuration of channels. -*/ - - /** - * @enum nrf_gpiote_polarity_t - * @brief Polarity for the GPIOTE channel. - */ -typedef enum -{ - NRF_GPIOTE_POLARITY_LOTOHI = GPIOTE_CONFIG_POLARITY_LoToHi, ///< Low to high. - NRF_GPIOTE_POLARITY_HITOLO = GPIOTE_CONFIG_POLARITY_HiToLo, ///< High to low. - NRF_GPIOTE_POLARITY_TOGGLE = GPIOTE_CONFIG_POLARITY_Toggle ///< Toggle. -} nrf_gpiote_polarity_t; - - - /** - * @enum nrf_gpiote_outinit_t - * @brief Initial output value for the GPIOTE channel. - */ -typedef enum -{ - NRF_GPIOTE_INITIAL_VALUE_LOW = GPIOTE_CONFIG_OUTINIT_Low, ///< Low to high. - NRF_GPIOTE_INITIAL_VALUE_HIGH = GPIOTE_CONFIG_OUTINIT_High ///< High to low. -} nrf_gpiote_outinit_t; - -/** - * @brief Tasks. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_GPIOTE_TASKS_OUT_0 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[0]), /**< Out task 0.*/ - NRF_GPIOTE_TASKS_OUT_1 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[1]), /**< Out task 1.*/ - NRF_GPIOTE_TASKS_OUT_2 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[2]), /**< Out task 2.*/ - NRF_GPIOTE_TASKS_OUT_3 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[3]), /**< Out task 3.*/ -#if (GPIOTE_CH_NUM > 4) || defined(__SDK_DOXYGEN__) - NRF_GPIOTE_TASKS_OUT_4 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[4]), /**< Out task 4.*/ - NRF_GPIOTE_TASKS_OUT_5 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[5]), /**< Out task 5.*/ - NRF_GPIOTE_TASKS_OUT_6 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[6]), /**< Out task 6.*/ - NRF_GPIOTE_TASKS_OUT_7 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[7]), /**< Out task 7.*/ -#endif -#if defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__SDK_DOXYGEN__) - NRF_GPIOTE_TASKS_SET_0 = offsetof(NRF_GPIOTE_Type, TASKS_SET[0]), /**< Set task 0.*/ - NRF_GPIOTE_TASKS_SET_1 = offsetof(NRF_GPIOTE_Type, TASKS_SET[1]), /**< Set task 1.*/ - NRF_GPIOTE_TASKS_SET_2 = offsetof(NRF_GPIOTE_Type, TASKS_SET[2]), /**< Set task 2.*/ - NRF_GPIOTE_TASKS_SET_3 = offsetof(NRF_GPIOTE_Type, TASKS_SET[3]), /**< Set task 3.*/ - NRF_GPIOTE_TASKS_SET_4 = offsetof(NRF_GPIOTE_Type, TASKS_SET[4]), /**< Set task 4.*/ - NRF_GPIOTE_TASKS_SET_5 = offsetof(NRF_GPIOTE_Type, TASKS_SET[5]), /**< Set task 5.*/ - NRF_GPIOTE_TASKS_SET_6 = offsetof(NRF_GPIOTE_Type, TASKS_SET[6]), /**< Set task 6.*/ - NRF_GPIOTE_TASKS_SET_7 = offsetof(NRF_GPIOTE_Type, TASKS_SET[7]), /**< Set task 7.*/ -#endif -#if defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__SDK_DOXYGEN__) - NRF_GPIOTE_TASKS_CLR_0 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[0]), /**< Clear task 0.*/ - NRF_GPIOTE_TASKS_CLR_1 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[1]), /**< Clear task 1.*/ - NRF_GPIOTE_TASKS_CLR_2 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[2]), /**< Clear task 2.*/ - NRF_GPIOTE_TASKS_CLR_3 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[3]), /**< Clear task 3.*/ - NRF_GPIOTE_TASKS_CLR_4 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[4]), /**< Clear task 4.*/ - NRF_GPIOTE_TASKS_CLR_5 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[5]), /**< Clear task 5.*/ - NRF_GPIOTE_TASKS_CLR_6 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[6]), /**< Clear task 6.*/ - NRF_GPIOTE_TASKS_CLR_7 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[7]), /**< Clear task 7.*/ -#endif - /*lint -restore*/ -} nrf_gpiote_tasks_t; - -/** - * @brief Events. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_GPIOTE_EVENTS_IN_0 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[0]), /**< In event 0.*/ - NRF_GPIOTE_EVENTS_IN_1 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[1]), /**< In event 1.*/ - NRF_GPIOTE_EVENTS_IN_2 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[2]), /**< In event 2.*/ - NRF_GPIOTE_EVENTS_IN_3 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[3]), /**< In event 3.*/ -#if (GPIOTE_CH_NUM > 4) || defined(__SDK_DOXYGEN__) - NRF_GPIOTE_EVENTS_IN_4 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[4]), /**< In event 4.*/ - NRF_GPIOTE_EVENTS_IN_5 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[5]), /**< In event 5.*/ - NRF_GPIOTE_EVENTS_IN_6 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[6]), /**< In event 6.*/ - NRF_GPIOTE_EVENTS_IN_7 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[7]), /**< In event 7.*/ -#endif - NRF_GPIOTE_EVENTS_PORT = offsetof(NRF_GPIOTE_Type, EVENTS_PORT), /**< Port event.*/ - /*lint -restore*/ -} nrf_gpiote_events_t; - -/** - * @enum nrf_gpiote_int_t - * @brief GPIOTE interrupts. - */ -typedef enum -{ - NRF_GPIOTE_INT_IN0_MASK = GPIOTE_INTENSET_IN0_Msk, /**< GPIOTE interrupt from IN0. */ - NRF_GPIOTE_INT_IN1_MASK = GPIOTE_INTENSET_IN1_Msk, /**< GPIOTE interrupt from IN1. */ - NRF_GPIOTE_INT_IN2_MASK = GPIOTE_INTENSET_IN2_Msk, /**< GPIOTE interrupt from IN2. */ - NRF_GPIOTE_INT_IN3_MASK = GPIOTE_INTENSET_IN3_Msk, /**< GPIOTE interrupt from IN3. */ -#if (GPIOTE_CH_NUM > 4) || defined(__SDK_DOXYGEN__) - NRF_GPIOTE_INT_IN4_MASK = GPIOTE_INTENSET_IN4_Msk, /**< GPIOTE interrupt from IN4. */ - NRF_GPIOTE_INT_IN5_MASK = GPIOTE_INTENSET_IN5_Msk, /**< GPIOTE interrupt from IN5. */ - NRF_GPIOTE_INT_IN6_MASK = GPIOTE_INTENSET_IN6_Msk, /**< GPIOTE interrupt from IN6. */ - NRF_GPIOTE_INT_IN7_MASK = GPIOTE_INTENSET_IN7_Msk, /**< GPIOTE interrupt from IN7. */ -#endif - NRF_GPIOTE_INT_PORT_MASK = (int)GPIOTE_INTENSET_PORT_Msk, /**< GPIOTE interrupt from PORT event. */ -} nrf_gpiote_int_t; - -#define NRF_GPIOTE_INT_IN_MASK (NRF_GPIOTE_INT_IN0_MASK | NRF_GPIOTE_INT_IN1_MASK |\ - NRF_GPIOTE_INT_IN2_MASK | NRF_GPIOTE_INT_IN3_MASK) -#if (GPIOTE_CH_NUM > 4) -#undef NRF_GPIOTE_INT_IN_MASK -#define NRF_GPIOTE_INT_IN_MASK (NRF_GPIOTE_INT_IN0_MASK | NRF_GPIOTE_INT_IN1_MASK |\ - NRF_GPIOTE_INT_IN2_MASK | NRF_GPIOTE_INT_IN3_MASK |\ - NRF_GPIOTE_INT_IN4_MASK | NRF_GPIOTE_INT_IN5_MASK |\ - NRF_GPIOTE_INT_IN6_MASK | NRF_GPIOTE_INT_IN7_MASK) -#endif - -/** - * @brief Function for activating a specific GPIOTE task. - * - * @param[in] task Task. - */ -__STATIC_INLINE void nrf_gpiote_task_set(nrf_gpiote_tasks_t task); - -/** - * @brief Function for getting the address of a specific GPIOTE task. - * - * @param[in] task Task. - * - * @returns Address. - */ -__STATIC_INLINE uint32_t nrf_gpiote_task_addr_get(nrf_gpiote_tasks_t task); - -/** - * @brief Function for getting the state of a specific GPIOTE event. - * - * @param[in] event Event. - */ -__STATIC_INLINE bool nrf_gpiote_event_is_set(nrf_gpiote_events_t event); - -/** - * @brief Function for clearing a specific GPIOTE event. - * - * @param[in] event Event. - */ -__STATIC_INLINE void nrf_gpiote_event_clear(nrf_gpiote_events_t event); - -/** - * @brief Function for getting the address of a specific GPIOTE event. - * - * @param[in] event Event. - * - * @return Address - */ -__STATIC_INLINE uint32_t nrf_gpiote_event_addr_get(nrf_gpiote_events_t event); - -/**@brief Function for enabling interrupts. - * - * @param[in] mask Interrupt mask to be enabled. - */ -__STATIC_INLINE void nrf_gpiote_int_enable(uint32_t mask); - -/**@brief Function for disabling interrupts. - * - * @param[in] mask Interrupt mask to be disabled. - */ -__STATIC_INLINE void nrf_gpiote_int_disable(uint32_t mask); - -/**@brief Function for checking if interrupts are enabled. - * - * @param[in] mask Mask of interrupt flags to check. - * - * @return Mask with enabled interrupts. - */ -__STATIC_INLINE uint32_t nrf_gpiote_int_is_enabled(uint32_t mask); - -/**@brief Function for enabling a GPIOTE event. - * - * @param[in] idx Task-Event index. - */ -__STATIC_INLINE void nrf_gpiote_event_enable(uint32_t idx); - -/**@brief Function for disabling a GPIOTE event. - * - * @param[in] idx Task-Event index. - */ -__STATIC_INLINE void nrf_gpiote_event_disable(uint32_t idx); - -/**@brief Function for configuring a GPIOTE event. - * - * @param[in] idx Task-Event index. - * @param[in] pin Pin associated with event. - * @param[in] polarity Transition that should generate an event. - */ -__STATIC_INLINE void nrf_gpiote_event_configure(uint32_t idx, uint32_t pin, - nrf_gpiote_polarity_t polarity); - -/**@brief Function for getting the pin associated with a GPIOTE event. - * - * @param[in] idx Task-Event index. - * - * @return Pin number. - */ -__STATIC_INLINE uint32_t nrf_gpiote_event_pin_get(uint32_t idx); - -/**@brief Function for getting the polarity associated with a GPIOTE event. - * - * @param[in] idx Task-Event index. - * - * @return Polarity. - */ -__STATIC_INLINE nrf_gpiote_polarity_t nrf_gpiote_event_polarity_get(uint32_t idx); - -/**@brief Function for enabling a GPIOTE task. - * - * @param[in] idx Task-Event index. - */ -__STATIC_INLINE void nrf_gpiote_task_enable(uint32_t idx); - -/**@brief Function for disabling a GPIOTE task. - * - * @param[in] idx Task-Event index. - */ -__STATIC_INLINE void nrf_gpiote_task_disable(uint32_t idx); - -/**@brief Function for configuring a GPIOTE task. - * @note Function is not configuring mode field so task is disabled after this function is called. - * - * @param[in] idx Task-Event index. - * @param[in] pin Pin associated with event. - * @param[in] polarity Transition that should generate an event. - * @param[in] init_val Initial value of the pin. - */ -__STATIC_INLINE void nrf_gpiote_task_configure(uint32_t idx, uint32_t pin, - nrf_gpiote_polarity_t polarity, - nrf_gpiote_outinit_t init_val); - -/**@brief Function for forcing a specific state on the pin connected to GPIOTE. - * - * @param[in] idx Task-Event index. - * @param[in] init_val Pin state. - */ -__STATIC_INLINE void nrf_gpiote_task_force(uint32_t idx, nrf_gpiote_outinit_t init_val); - -/**@brief Function for resetting a GPIOTE task event configuration to the default state. - * - * @param[in] idx Task-Event index. - */ -__STATIC_INLINE void nrf_gpiote_te_default(uint32_t idx); - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION -__STATIC_INLINE void nrf_gpiote_task_set(nrf_gpiote_tasks_t task) -{ - *(__IO uint32_t *)((uint32_t)NRF_GPIOTE + task) = 0x1UL; -} - -__STATIC_INLINE uint32_t nrf_gpiote_task_addr_get(nrf_gpiote_tasks_t task) -{ - return ((uint32_t)NRF_GPIOTE + task); -} - -__STATIC_INLINE bool nrf_gpiote_event_is_set(nrf_gpiote_events_t event) -{ - return (*(uint32_t *)nrf_gpiote_event_addr_get(event) == 0x1UL) ? true : false; -} - -__STATIC_INLINE void nrf_gpiote_event_clear(nrf_gpiote_events_t event) -{ - *(uint32_t *)nrf_gpiote_event_addr_get(event) = 0; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)nrf_gpiote_event_addr_get(event)); - (void)dummy; -#endif -} - -__STATIC_INLINE uint32_t nrf_gpiote_event_addr_get(nrf_gpiote_events_t event) -{ - return ((uint32_t)NRF_GPIOTE + event); -} - -__STATIC_INLINE void nrf_gpiote_int_enable(uint32_t mask) -{ - NRF_GPIOTE->INTENSET = mask; -} - -__STATIC_INLINE void nrf_gpiote_int_disable(uint32_t mask) -{ - NRF_GPIOTE->INTENCLR = mask; -} - -__STATIC_INLINE uint32_t nrf_gpiote_int_is_enabled(uint32_t mask) -{ - return (NRF_GPIOTE->INTENSET & mask); -} - -__STATIC_INLINE void nrf_gpiote_event_enable(uint32_t idx) -{ - NRF_GPIOTE->CONFIG[idx] |= GPIOTE_CONFIG_MODE_Event; -} - -__STATIC_INLINE void nrf_gpiote_event_disable(uint32_t idx) -{ - NRF_GPIOTE->CONFIG[idx] &= ~GPIOTE_CONFIG_MODE_Event; -} - -__STATIC_INLINE void nrf_gpiote_event_configure(uint32_t idx, uint32_t pin, nrf_gpiote_polarity_t polarity) -{ - NRF_GPIOTE->CONFIG[idx] &= ~(GPIOTE_CONFIG_PORT_PIN_Msk | GPIOTE_CONFIG_POLARITY_Msk); - NRF_GPIOTE->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) | - ((polarity << GPIOTE_CONFIG_POLARITY_Pos) & GPIOTE_CONFIG_POLARITY_Msk); -} - -__STATIC_INLINE uint32_t nrf_gpiote_event_pin_get(uint32_t idx) -{ - return ((NRF_GPIOTE->CONFIG[idx] & GPIOTE_CONFIG_PORT_PIN_Msk) >> GPIOTE_CONFIG_PSEL_Pos); -} - -__STATIC_INLINE nrf_gpiote_polarity_t nrf_gpiote_event_polarity_get(uint32_t idx) -{ - return (nrf_gpiote_polarity_t)((NRF_GPIOTE->CONFIG[idx] & GPIOTE_CONFIG_POLARITY_Msk) >> GPIOTE_CONFIG_POLARITY_Pos); -} - -__STATIC_INLINE void nrf_gpiote_task_enable(uint32_t idx) -{ - uint32_t final_config = NRF_GPIOTE->CONFIG[idx] | GPIOTE_CONFIG_MODE_Task; -#ifdef NRF51 - /* Workaround for the OUTINIT PAN. When nrf_gpiote_task_config() is called a glitch happens - on the GPIO if the GPIO in question is already assigned to GPIOTE and the pin is in the - correct state in GPIOTE but not in the OUT register. */ - /* Configure channel to not existing, not connected to the pin, and configure as a tasks that will set it to proper level */ - NRF_GPIOTE->CONFIG[idx] = final_config | (((31) << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk); - __NOP(); - __NOP(); - __NOP(); -#endif - NRF_GPIOTE->CONFIG[idx] = final_config; -} - -__STATIC_INLINE void nrf_gpiote_task_disable(uint32_t idx) -{ - NRF_GPIOTE->CONFIG[idx] &= ~GPIOTE_CONFIG_MODE_Task; -} - -__STATIC_INLINE void nrf_gpiote_task_configure(uint32_t idx, uint32_t pin, - nrf_gpiote_polarity_t polarity, - nrf_gpiote_outinit_t init_val) -{ - NRF_GPIOTE->CONFIG[idx] &= ~(GPIOTE_CONFIG_PORT_PIN_Msk | - GPIOTE_CONFIG_POLARITY_Msk | - GPIOTE_CONFIG_OUTINIT_Msk); - - NRF_GPIOTE->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) | - ((polarity << GPIOTE_CONFIG_POLARITY_Pos) & GPIOTE_CONFIG_POLARITY_Msk) | - ((init_val << GPIOTE_CONFIG_OUTINIT_Pos) & GPIOTE_CONFIG_OUTINIT_Msk); -} - -__STATIC_INLINE void nrf_gpiote_task_force(uint32_t idx, nrf_gpiote_outinit_t init_val) -{ - NRF_GPIOTE->CONFIG[idx] = (NRF_GPIOTE->CONFIG[idx] & ~GPIOTE_CONFIG_OUTINIT_Msk) - | ((init_val << GPIOTE_CONFIG_OUTINIT_Pos) & GPIOTE_CONFIG_OUTINIT_Msk); -} - -__STATIC_INLINE void nrf_gpiote_te_default(uint32_t idx) -{ - NRF_GPIOTE->CONFIG[idx] = 0; -} -#endif //SUPPRESS_INLINE_IMPLEMENTATION -/** @} */ - - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_i2s.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_i2s.h deleted file mode 100644 index d5485572b5a..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_i2s.h +++ /dev/null @@ -1,563 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @defgroup nrf_i2s_hal I2S HAL - * @{ - * @ingroup nrf_i2s - * - * @brief @tagAPI52 Hardware access layer for managing the Inter-IC Sound (I2S) peripheral. - */ - -#ifndef NRF_I2S_H__ -#define NRF_I2S_H__ - -#include -#include -#include - -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -/** - * @brief This value can be provided as a parameter for the @ref nrf_i2s_pins_set - * function call to specify that a given I2S signal (SDOUT, SDIN, or MCK) - * shall not be connected to a physical pin. - */ -#define NRF_I2S_PIN_NOT_CONNECTED 0xFFFFFFFF - - -/** - * @brief I2S tasks. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_I2S_TASK_START = offsetof(NRF_I2S_Type, TASKS_START), ///< Starts continuous I2S transfer. Also starts the MCK generator if this is enabled. - NRF_I2S_TASK_STOP = offsetof(NRF_I2S_Type, TASKS_STOP) ///< Stops I2S transfer. Also stops the MCK generator. - /*lint -restore*/ -} nrf_i2s_task_t; - -/** - * @brief I2S events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_I2S_EVENT_RXPTRUPD = offsetof(NRF_I2S_Type, EVENTS_RXPTRUPD), ///< The RXD.PTR register has been copied to internal double-buffers. - NRF_I2S_EVENT_TXPTRUPD = offsetof(NRF_I2S_Type, EVENTS_TXPTRUPD), ///< The TXD.PTR register has been copied to internal double-buffers. - NRF_I2S_EVENT_STOPPED = offsetof(NRF_I2S_Type, EVENTS_STOPPED) ///< I2S transfer stopped. - /*lint -restore*/ -} nrf_i2s_event_t; - -/** - * @brief I2S interrupts. - */ -typedef enum -{ - NRF_I2S_INT_RXPTRUPD_MASK = I2S_INTENSET_RXPTRUPD_Msk, ///< Interrupt on RXPTRUPD event. - NRF_I2S_INT_TXPTRUPD_MASK = I2S_INTENSET_TXPTRUPD_Msk, ///< Interrupt on TXPTRUPD event. - NRF_I2S_INT_STOPPED_MASK = I2S_INTENSET_STOPPED_Msk ///< Interrupt on STOPPED event. -} nrf_i2s_int_mask_t; - -/** - * @brief I2S modes of operation. - */ -typedef enum -{ - NRF_I2S_MODE_MASTER = I2S_CONFIG_MODE_MODE_Master, ///< Master mode. - NRF_I2S_MODE_SLAVE = I2S_CONFIG_MODE_MODE_Slave ///< Slave mode. -} nrf_i2s_mode_t; - -/** - * @brief I2S master clock generator settings. - */ -typedef enum -{ - NRF_I2S_MCK_DISABLED = 0, ///< MCK disabled. - // [conversion to 'int' needed to prevent compilers from complaining - // that the provided value (0x80000000UL) is out of range of "int"] - NRF_I2S_MCK_32MDIV2 = (int)I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV2, ///< 32 MHz / 2 = 16.0 MHz. - NRF_I2S_MCK_32MDIV3 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV3, ///< 32 MHz / 3 = 10.6666667 MHz. - NRF_I2S_MCK_32MDIV4 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV4, ///< 32 MHz / 4 = 8.0 MHz. - NRF_I2S_MCK_32MDIV5 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV5, ///< 32 MHz / 5 = 6.4 MHz. - NRF_I2S_MCK_32MDIV6 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV6, ///< 32 MHz / 6 = 5.3333333 MHz. - NRF_I2S_MCK_32MDIV8 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV8, ///< 32 MHz / 8 = 4.0 MHz. - NRF_I2S_MCK_32MDIV10 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV10, ///< 32 MHz / 10 = 3.2 MHz. - NRF_I2S_MCK_32MDIV11 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV11, ///< 32 MHz / 11 = 2.9090909 MHz. - NRF_I2S_MCK_32MDIV15 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV15, ///< 32 MHz / 15 = 2.1333333 MHz. - NRF_I2S_MCK_32MDIV16 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV16, ///< 32 MHz / 16 = 2.0 MHz. - NRF_I2S_MCK_32MDIV21 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV21, ///< 32 MHz / 21 = 1.5238095 MHz. - NRF_I2S_MCK_32MDIV23 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV23, ///< 32 MHz / 23 = 1.3913043 MHz. - NRF_I2S_MCK_32MDIV31 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV31, ///< 32 MHz / 31 = 1.0322581 MHz. - NRF_I2S_MCK_32MDIV42 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV42, ///< 32 MHz / 42 = 0.7619048 MHz. - NRF_I2S_MCK_32MDIV63 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV63, ///< 32 MHz / 63 = 0.5079365 MHz. - NRF_I2S_MCK_32MDIV125 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV125 ///< 32 MHz / 125 = 0.256 MHz. -} nrf_i2s_mck_t; - -/** - * @brief I2S MCK/LRCK ratios. - */ -typedef enum -{ - NRF_I2S_RATIO_32X = I2S_CONFIG_RATIO_RATIO_32X, ///< LRCK = MCK / 32. - NRF_I2S_RATIO_48X = I2S_CONFIG_RATIO_RATIO_48X, ///< LRCK = MCK / 48. - NRF_I2S_RATIO_64X = I2S_CONFIG_RATIO_RATIO_64X, ///< LRCK = MCK / 64. - NRF_I2S_RATIO_96X = I2S_CONFIG_RATIO_RATIO_96X, ///< LRCK = MCK / 96. - NRF_I2S_RATIO_128X = I2S_CONFIG_RATIO_RATIO_128X, ///< LRCK = MCK / 128. - NRF_I2S_RATIO_192X = I2S_CONFIG_RATIO_RATIO_192X, ///< LRCK = MCK / 192. - NRF_I2S_RATIO_256X = I2S_CONFIG_RATIO_RATIO_256X, ///< LRCK = MCK / 256. - NRF_I2S_RATIO_384X = I2S_CONFIG_RATIO_RATIO_384X, ///< LRCK = MCK / 384. - NRF_I2S_RATIO_512X = I2S_CONFIG_RATIO_RATIO_512X ///< LRCK = MCK / 512. -} nrf_i2s_ratio_t; - -/** - * @brief I2S sample widths. - */ -typedef enum -{ - NRF_I2S_SWIDTH_8BIT = I2S_CONFIG_SWIDTH_SWIDTH_8Bit, ///< 8 bit. - NRF_I2S_SWIDTH_16BIT = I2S_CONFIG_SWIDTH_SWIDTH_16Bit, ///< 16 bit. - NRF_I2S_SWIDTH_24BIT = I2S_CONFIG_SWIDTH_SWIDTH_24Bit ///< 24 bit. -} nrf_i2s_swidth_t; - -/** - * @brief I2S alignments of sample within a frame. - */ -typedef enum -{ - NRF_I2S_ALIGN_LEFT = I2S_CONFIG_ALIGN_ALIGN_Left, ///< Left-aligned. - NRF_I2S_ALIGN_RIGHT = I2S_CONFIG_ALIGN_ALIGN_Right ///< Right-aligned. -} nrf_i2s_align_t; - -/** - * @brief I2S frame formats. - */ -typedef enum -{ - NRF_I2S_FORMAT_I2S = I2S_CONFIG_FORMAT_FORMAT_I2S, ///< Original I2S format. - NRF_I2S_FORMAT_ALIGNED = I2S_CONFIG_FORMAT_FORMAT_Aligned ///< Alternate (left- or right-aligned) format. -} nrf_i2s_format_t; - -/** - * @brief I2S enabled channels. - */ -typedef enum -{ - NRF_I2S_CHANNELS_STEREO = I2S_CONFIG_CHANNELS_CHANNELS_Stereo, ///< Stereo. - NRF_I2S_CHANNELS_LEFT = I2S_CONFIG_CHANNELS_CHANNELS_Left, ///< Left only. - NRF_I2S_CHANNELS_RIGHT = I2S_CONFIG_CHANNELS_CHANNELS_Right ///< Right only. -} nrf_i2s_channels_t; - - -/** - * @brief Function for activating a specific I2S task. - * - * @param[in] p_i2s I2S instance. - * @param[in] task Task to activate. - */ -__STATIC_INLINE void nrf_i2s_task_trigger(NRF_I2S_Type * p_i2s, - nrf_i2s_task_t task); - -/** - * @brief Function for getting the address of a specific I2S task register. - * - * @param[in] p_i2s I2S instance. - * @param[in] task Requested task. - * - * @return Address of the specified task register. - */ -__STATIC_INLINE uint32_t nrf_i2s_task_address_get(NRF_I2S_Type const * p_i2s, - nrf_i2s_task_t task); - -/** - * @brief Function for clearing a specific I2S event. - * - * @param[in] p_i2s I2S instance. - * @param[in] event Event to clear. - */ -__STATIC_INLINE void nrf_i2s_event_clear(NRF_I2S_Type * p_i2s, - nrf_i2s_event_t event); - -/** - * @brief Function for checking the state of a specific I2S event. - * - * @param[in] p_i2s I2S instance. - * @param[in] event Event to check. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_i2s_event_check(NRF_I2S_Type const * p_i2s, - nrf_i2s_event_t event); - -/** - * @brief Function for getting the address of a specific I2S event register. - * - * @param[in] p_i2s I2S instance. - * @param[in] event Requested event. - * - * @return Address of the specified event register. - */ -__STATIC_INLINE uint32_t nrf_i2s_event_address_get(NRF_I2S_Type const * p_i2s, - nrf_i2s_event_t event); - -/** - * @brief Function for enabling specified interrupts. - * - * @param[in] p_i2s I2S instance. - * @param[in] mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_i2s_int_enable(NRF_I2S_Type * p_i2s, uint32_t mask); - -/** - * @brief Function for disabling specified interrupts. - * - * @param[in] p_i2s I2S instance. - * @param[in] mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_i2s_int_disable(NRF_I2S_Type * p_i2s, uint32_t mask); - -/** - * @brief Function for retrieving the state of a given interrupt. - * - * @param[in] p_i2s I2S instance. - * @param[in] i2s_int Interrupt to check. - * - * @retval true If the interrupt is enabled. - * @retval false If the interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_i2s_int_enable_check(NRF_I2S_Type const * p_i2s, - nrf_i2s_int_mask_t i2s_int); - -/** - * @brief Function for enabling the I2S peripheral. - * - * @param[in] p_i2s I2S instance. - */ -__STATIC_INLINE void nrf_i2s_enable(NRF_I2S_Type * p_i2s); - -/** - * @brief Function for disabling the I2S peripheral. - * - * @param[in] p_i2s I2S instance. - */ -__STATIC_INLINE void nrf_i2s_disable(NRF_I2S_Type * p_i2s); - -/** - * @brief Function for configuring I2S pins. - * - * Usage of the SDOUT, SDIN, and MCK signals is optional. - * If a given signal is not needed, pass the @ref NRF_I2S_PIN_NOT_CONNECTED - * value instead of its pin number. - * - * @param[in] p_i2s I2S instance. - * @param[in] sck_pin SCK pin number. - * @param[in] lrck_pin LRCK pin number. - * @param[in] mck_pin MCK pin number. - * @param[in] sdout_pin SDOUT pin number. - * @param[in] sdin_pin SDIN pin number. - */ -__STATIC_INLINE void nrf_i2s_pins_set(NRF_I2S_Type * p_i2s, - uint32_t sck_pin, - uint32_t lrck_pin, - uint32_t mck_pin, - uint32_t sdout_pin, - uint32_t sdin_pin); - -/** - * @brief Function for setting the I2S peripheral configuration. - * - * @param[in] p_i2s I2S instance. - * @param[in] mode Mode of operation (master or slave). - * @param[in] format I2S frame format. - * @param[in] alignment Alignment of sample within a frame. - * @param[in] sample_width Sample width. - * @param[in] channels Enabled channels. - * @param[in] mck_setup Master clock generator setup. - * @param[in] ratio MCK/LRCK ratio. - * - * @retval true If the configuration has been set successfully. - * @retval false If the requested configuration is not allowed. - */ -__STATIC_INLINE bool nrf_i2s_configure(NRF_I2S_Type * p_i2s, - nrf_i2s_mode_t mode, - nrf_i2s_format_t format, - nrf_i2s_align_t alignment, - nrf_i2s_swidth_t sample_width, - nrf_i2s_channels_t channels, - nrf_i2s_mck_t mck_setup, - nrf_i2s_ratio_t ratio); - -/** - * @brief Function for setting up the I2S transfer. - * - * This function sets up the RX and TX buffers and enables reception and/or - * transmission accordingly. If the transfer in a given direction is not - * required, pass NULL instead of the pointer to the corresponding buffer. - * - * @param[in] p_i2s I2S instance. - * @param[in] size Size of the buffers (in 32-bit words). - * @param[in] p_rx_buffer Pointer to the receive buffer. - * Pass NULL to disable reception. - * @param[in] p_tx_buffer Pointer to the transmit buffer. - * Pass NULL to disable transmission. - */ -__STATIC_INLINE void nrf_i2s_transfer_set(NRF_I2S_Type * p_i2s, - uint16_t size, - uint32_t * p_rx_buffer, - uint32_t const * p_tx_buffer); - -/** - * @brief Function for setting the pointer to the receive buffer. - * - * @note The size of the buffer can be set only by calling - * @ref nrf_i2s_transfer_set. - * - * @param[in] p_i2s I2S instance. - * @param[in] p_buffer Pointer to the receive buffer. - */ -__STATIC_INLINE void nrf_i2s_rx_buffer_set(NRF_I2S_Type * p_i2s, - uint32_t * p_buffer); - -/** - * @brief Function for getting the pointer to the receive buffer. - * - * @param[in] p_i2s I2S instance. - * - * @return Pointer to the receive buffer. - */ -__STATIC_INLINE uint32_t * nrf_i2s_rx_buffer_get(NRF_I2S_Type const * p_i2s); - -/** - * @brief Function for setting the pointer to the transmit buffer. - * - * @note The size of the buffer can be set only by calling - * @ref nrf_i2s_transfer_set. - * - * @param[in] p_i2s I2S instance. - * @param[in] p_buffer Pointer to the transmit buffer. - */ -__STATIC_INLINE void nrf_i2s_tx_buffer_set(NRF_I2S_Type * p_i2s, - uint32_t const * p_buffer); - -/** - * @brief Function for getting the pointer to the transmit buffer. - * - * @param[in] p_i2s I2S instance. - * - * @return Pointer to the transmit buffer. - */ -__STATIC_INLINE uint32_t * nrf_i2s_tx_buffer_get(NRF_I2S_Type const * p_i2s); - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_i2s_task_trigger(NRF_I2S_Type * p_i2s, - nrf_i2s_task_t task) -{ - *((volatile uint32_t *)((uint8_t *)p_i2s + (uint32_t)task)) = 0x1UL; -} - -__STATIC_INLINE uint32_t nrf_i2s_task_address_get(NRF_I2S_Type const * p_i2s, - nrf_i2s_task_t task) -{ - return ((uint32_t)p_i2s + (uint32_t)task); -} - -__STATIC_INLINE void nrf_i2s_event_clear(NRF_I2S_Type * p_i2s, - nrf_i2s_event_t event) -{ - *((volatile uint32_t *)((uint8_t *)p_i2s + (uint32_t)event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_i2s + (uint32_t)event)); - (void)dummy; -#endif -} - -__STATIC_INLINE bool nrf_i2s_event_check(NRF_I2S_Type const * p_i2s, - nrf_i2s_event_t event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)p_i2s + (uint32_t)event); -} - -__STATIC_INLINE uint32_t nrf_i2s_event_address_get(NRF_I2S_Type const * p_i2s, - nrf_i2s_event_t event) -{ - return ((uint32_t)p_i2s + (uint32_t)event); -} - -__STATIC_INLINE void nrf_i2s_int_enable(NRF_I2S_Type * p_i2s, uint32_t mask) -{ - p_i2s->INTENSET = mask; -} - -__STATIC_INLINE void nrf_i2s_int_disable(NRF_I2S_Type * p_i2s, uint32_t mask) -{ - p_i2s->INTENCLR = mask; -} - -__STATIC_INLINE bool nrf_i2s_int_enable_check(NRF_I2S_Type const * p_i2s, - nrf_i2s_int_mask_t i2s_int) -{ - return (bool)(p_i2s->INTENSET & i2s_int); -} - -__STATIC_INLINE void nrf_i2s_enable(NRF_I2S_Type * p_i2s) -{ - p_i2s->ENABLE = (I2S_ENABLE_ENABLE_Enabled << I2S_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_i2s_disable(NRF_I2S_Type * p_i2s) -{ - p_i2s->ENABLE = (I2S_ENABLE_ENABLE_Disabled << I2S_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_i2s_pins_set(NRF_I2S_Type * p_i2s, - uint32_t sck_pin, - uint32_t lrck_pin, - uint32_t mck_pin, - uint32_t sdout_pin, - uint32_t sdin_pin) -{ - p_i2s->PSEL.SCK = sck_pin; - p_i2s->PSEL.LRCK = lrck_pin; - p_i2s->PSEL.MCK = mck_pin; - p_i2s->PSEL.SDOUT = sdout_pin; - p_i2s->PSEL.SDIN = sdin_pin; -} - -__STATIC_INLINE bool nrf_i2s_configure(NRF_I2S_Type * p_i2s, - nrf_i2s_mode_t mode, - nrf_i2s_format_t format, - nrf_i2s_align_t alignment, - nrf_i2s_swidth_t sample_width, - nrf_i2s_channels_t channels, - nrf_i2s_mck_t mck_setup, - nrf_i2s_ratio_t ratio) -{ - if (mode == NRF_I2S_MODE_MASTER) - { - // The MCK/LRCK ratio shall be a multiple of 2 * sample width. - if (((sample_width == NRF_I2S_SWIDTH_16BIT) && - (ratio == NRF_I2S_RATIO_48X)) - || - ((sample_width == NRF_I2S_SWIDTH_24BIT) && - ((ratio == NRF_I2S_RATIO_32X) || - (ratio == NRF_I2S_RATIO_64X) || - (ratio == NRF_I2S_RATIO_128X) || - (ratio == NRF_I2S_RATIO_256X) || - (ratio == NRF_I2S_RATIO_512X)))) - { - return false; - } - } - - p_i2s->CONFIG.MODE = mode; - p_i2s->CONFIG.FORMAT = format; - p_i2s->CONFIG.ALIGN = alignment; - p_i2s->CONFIG.SWIDTH = sample_width; - p_i2s->CONFIG.CHANNELS = channels; - p_i2s->CONFIG.RATIO = ratio; - - if (mck_setup == NRF_I2S_MCK_DISABLED) - { - p_i2s->CONFIG.MCKEN = - (I2S_CONFIG_MCKEN_MCKEN_Disabled << I2S_CONFIG_MCKEN_MCKEN_Pos); - } - else - { - p_i2s->CONFIG.MCKFREQ = mck_setup; - p_i2s->CONFIG.MCKEN = - (I2S_CONFIG_MCKEN_MCKEN_Enabled << I2S_CONFIG_MCKEN_MCKEN_Pos); - } - - return true; -} - -__STATIC_INLINE void nrf_i2s_transfer_set(NRF_I2S_Type * p_i2s, - uint16_t size, - uint32_t * p_buffer_rx, - uint32_t const * p_buffer_tx) -{ - p_i2s->RXTXD.MAXCNT = size; - - nrf_i2s_rx_buffer_set(p_i2s, p_buffer_rx); - p_i2s->CONFIG.RXEN = (p_buffer_rx != NULL) ? 1 : 0; - - nrf_i2s_tx_buffer_set(p_i2s, p_buffer_tx); - p_i2s->CONFIG.TXEN = (p_buffer_tx != NULL) ? 1 : 0; -} - -__STATIC_INLINE void nrf_i2s_rx_buffer_set(NRF_I2S_Type * p_i2s, - uint32_t * p_buffer) -{ - p_i2s->RXD.PTR = (uint32_t)p_buffer; -} - -__STATIC_INLINE uint32_t * nrf_i2s_rx_buffer_get(NRF_I2S_Type const * p_i2s) -{ - return (uint32_t *)(p_i2s->RXD.PTR); -} - -__STATIC_INLINE void nrf_i2s_tx_buffer_set(NRF_I2S_Type * p_i2s, - uint32_t const * p_buffer) -{ - p_i2s->TXD.PTR = (uint32_t)p_buffer; -} - -__STATIC_INLINE uint32_t * nrf_i2s_tx_buffer_get(NRF_I2S_Type const * p_i2s) -{ - return (uint32_t *)(p_i2s->TXD.PTR); -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_I2S_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_lpcomp.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_lpcomp.h deleted file mode 100644 index 4e241a9779d..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_lpcomp.h +++ /dev/null @@ -1,425 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @file - * @brief LPCOMP HAL API. - */ - -#ifndef NRF_LPCOMP_H_ -#define NRF_LPCOMP_H_ - -/** - * @defgroup nrf_lpcomp_hal LPCOMP HAL - * @{ - * @ingroup nrf_lpcomp - * @brief Hardware access layer for managing the Low Power Comparator (LPCOMP). - */ - -#include "nrf.h" -#include "nrf_peripherals.h" - -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @enum nrf_lpcomp_ref_t - * @brief LPCOMP reference selection. - */ -typedef enum -{ -#if (LPCOMP_REFSEL_RESOLUTION == 8) || defined(__SDK_DOXYGEN__) - NRF_LPCOMP_REF_SUPPLY_1_8 = LPCOMP_REFSEL_REFSEL_SupplyOneEighthPrescaling, /**< Use supply with a 1/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_2_8 = LPCOMP_REFSEL_REFSEL_SupplyTwoEighthsPrescaling, /**< Use supply with a 2/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_3_8 = LPCOMP_REFSEL_REFSEL_SupplyThreeEighthsPrescaling, /**< Use supply with a 3/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_4_8 = LPCOMP_REFSEL_REFSEL_SupplyFourEighthsPrescaling, /**< Use supply with a 4/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_5_8 = LPCOMP_REFSEL_REFSEL_SupplyFiveEighthsPrescaling, /**< Use supply with a 5/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_6_8 = LPCOMP_REFSEL_REFSEL_SupplySixEighthsPrescaling, /**< Use supply with a 6/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_7_8 = LPCOMP_REFSEL_REFSEL_SupplySevenEighthsPrescaling, /**< Use supply with a 7/8 prescaler as reference. */ -#elif (LPCOMP_REFSEL_RESOLUTION == 16) || defined(__SDK_DOXYGEN__) - NRF_LPCOMP_REF_SUPPLY_1_8 = LPCOMP_REFSEL_REFSEL_Ref1_8Vdd, /**< Use supply with a 1/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_2_8 = LPCOMP_REFSEL_REFSEL_Ref2_8Vdd, /**< Use supply with a 2/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_3_8 = LPCOMP_REFSEL_REFSEL_Ref3_8Vdd, /**< Use supply with a 3/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_4_8 = LPCOMP_REFSEL_REFSEL_Ref4_8Vdd, /**< Use supply with a 4/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_5_8 = LPCOMP_REFSEL_REFSEL_Ref5_8Vdd, /**< Use supply with a 5/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_6_8 = LPCOMP_REFSEL_REFSEL_Ref6_8Vdd, /**< Use supply with a 6/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_7_8 = LPCOMP_REFSEL_REFSEL_Ref7_8Vdd, /**< Use supply with a 7/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_1_16 = LPCOMP_REFSEL_REFSEL_Ref1_16Vdd, /**< Use supply with a 1/16 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_3_16 = LPCOMP_REFSEL_REFSEL_Ref3_16Vdd, /**< Use supply with a 3/16 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_5_16 = LPCOMP_REFSEL_REFSEL_Ref5_16Vdd, /**< Use supply with a 5/16 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_7_16 = LPCOMP_REFSEL_REFSEL_Ref7_16Vdd, /**< Use supply with a 7/16 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_9_16 = LPCOMP_REFSEL_REFSEL_Ref9_16Vdd, /**< Use supply with a 9/16 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_11_16 = LPCOMP_REFSEL_REFSEL_Ref11_16Vdd, /**< Use supply with a 11/16 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_13_16 = LPCOMP_REFSEL_REFSEL_Ref13_16Vdd, /**< Use supply with a 13/16 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_15_16 = LPCOMP_REFSEL_REFSEL_Ref15_16Vdd, /**< Use supply with a 15/16 prescaler as reference. */ -#endif - NRF_LPCOMP_REF_EXT_REF0 = LPCOMP_REFSEL_REFSEL_ARef | - (LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference0 << 16), /**< External reference 0. */ - NRF_LPCOMP_CONFIG_REF_EXT_REF1 = LPCOMP_REFSEL_REFSEL_ARef | - (LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference1 << 16), /**< External reference 1. */ -} nrf_lpcomp_ref_t; - -/** - * @enum nrf_lpcomp_input_t - * @brief LPCOMP input selection. - */ -typedef enum -{ - NRF_LPCOMP_INPUT_0 = LPCOMP_PSEL_PSEL_AnalogInput0, /**< Input 0. */ - NRF_LPCOMP_INPUT_1 = LPCOMP_PSEL_PSEL_AnalogInput1, /**< Input 1. */ - NRF_LPCOMP_INPUT_2 = LPCOMP_PSEL_PSEL_AnalogInput2, /**< Input 2. */ - NRF_LPCOMP_INPUT_3 = LPCOMP_PSEL_PSEL_AnalogInput3, /**< Input 3. */ - NRF_LPCOMP_INPUT_4 = LPCOMP_PSEL_PSEL_AnalogInput4, /**< Input 4. */ - NRF_LPCOMP_INPUT_5 = LPCOMP_PSEL_PSEL_AnalogInput5, /**< Input 5. */ - NRF_LPCOMP_INPUT_6 = LPCOMP_PSEL_PSEL_AnalogInput6, /**< Input 6. */ - NRF_LPCOMP_INPUT_7 = LPCOMP_PSEL_PSEL_AnalogInput7 /**< Input 7. */ -} nrf_lpcomp_input_t; - -/** - * @enum nrf_lpcomp_detect_t - * @brief LPCOMP detection type selection. - */ -typedef enum -{ - NRF_LPCOMP_DETECT_CROSS = LPCOMP_ANADETECT_ANADETECT_Cross, /**< Generate ANADETEC on crossing, both upwards and downwards crossing. */ - NRF_LPCOMP_DETECT_UP = LPCOMP_ANADETECT_ANADETECT_Up, /**< Generate ANADETEC on upwards crossing only. */ - NRF_LPCOMP_DETECT_DOWN = LPCOMP_ANADETECT_ANADETECT_Down /**< Generate ANADETEC on downwards crossing only. */ -} nrf_lpcomp_detect_t; - -/** - * @enum nrf_lpcomp_task_t - * @brief LPCOMP tasks. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_LPCOMP_TASK_START = offsetof(NRF_LPCOMP_Type, TASKS_START), /**< LPCOMP start sampling task. */ - NRF_LPCOMP_TASK_STOP = offsetof(NRF_LPCOMP_Type, TASKS_STOP), /**< LPCOMP stop sampling task. */ - NRF_LPCOMP_TASK_SAMPLE = offsetof(NRF_LPCOMP_Type, TASKS_SAMPLE) /**< Sample comparator value. */ -} nrf_lpcomp_task_t; /*lint -restore*/ - - -/** - * @enum nrf_lpcomp_event_t - * @brief LPCOMP events. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_LPCOMP_EVENT_READY = offsetof(NRF_LPCOMP_Type, EVENTS_READY), /**< LPCOMP is ready and output is valid. */ - NRF_LPCOMP_EVENT_DOWN = offsetof(NRF_LPCOMP_Type, EVENTS_DOWN), /**< Input voltage crossed the threshold going down. */ - NRF_LPCOMP_EVENT_UP = offsetof(NRF_LPCOMP_Type, EVENTS_UP), /**< Input voltage crossed the threshold going up. */ - NRF_LPCOMP_EVENT_CROSS = offsetof(NRF_LPCOMP_Type, EVENTS_CROSS) /**< Input voltage crossed the threshold in any direction. */ -} nrf_lpcomp_event_t; /*lint -restore*/ - -/** - * @enum nrf_lpcomp_short_mask_t - * @brief LPCOMP shorts masks. - */ -typedef enum -{ - NRF_LPCOMP_SHORT_CROSS_STOP_MASK = LPCOMP_SHORTS_CROSS_STOP_Msk, /*!< Short between CROSS event and STOP task. */ - NRF_LPCOMP_SHORT_UP_STOP_MASK = LPCOMP_SHORTS_UP_STOP_Msk, /*!< Short between UP event and STOP task. */ - NRF_LPCOMP_SHORT_DOWN_STOP_MASK = LPCOMP_SHORTS_DOWN_STOP_Msk, /*!< Short between DOWN event and STOP task. */ - NRF_LPCOMP_SHORT_READY_STOP_MASK = LPCOMP_SHORTS_READY_STOP_Msk, /*!< Short between READY event and STOP task. */ - NRF_LPCOMP_SHORT_READY_SAMPLE_MASK = LPCOMP_SHORTS_READY_SAMPLE_Msk /*!< Short between READY event and SAMPLE task. */ -} nrf_lpcomp_short_mask_t; - -#ifdef LPCOMP_FEATURE_HYST_PRESENT -/** - * @enum nrf_lpcomp_hysteresis_t - * @brief LPCOMP hysteresis. - */ -typedef enum -{ - NRF_LPCOMP_HYST_NOHYST = LPCOMP_HYST_HYST_NoHyst, /**< Comparator hysteresis disabled. */ - NRF_LPCOMP_HYST_50mV = LPCOMP_HYST_HYST_Hyst50mV /**< Comparator hysteresis enabled (typ. 50 mV). */ -}nrf_lpcomp_hysteresis_t; -#endif // LPCOMP_FEATURE_HYST_PRESENT - -/** @brief LPCOMP configuration. */ -typedef struct -{ - nrf_lpcomp_ref_t reference; /**< LPCOMP reference. */ - nrf_lpcomp_detect_t detection; /**< LPCOMP detection type. */ -#ifdef LPCOMP_FEATURE_HYST_PRESENT - nrf_lpcomp_hysteresis_t hyst; /**< LPCOMP hysteresis. */ -#endif // LPCOMP_FEATURE_HYST_PRESENT -} nrf_lpcomp_config_t; - -/** Default LPCOMP configuration. */ -#define NRF_LPCOMP_CONFIG_DEFAULT { NRF_LPCOMP_REF_SUPPLY_FOUR_EIGHT, NRF_LPCOMP_DETECT_DOWN } - -/** - * @brief Function for configuring LPCOMP. - * - * This function powers on LPCOMP and configures it. LPCOMP is in DISABLE state after configuration, - * so it must be enabled before using it. All shorts are inactive, events are cleared, and LPCOMP is stopped. - * - * @param[in] p_config Configuration. - */ -__STATIC_INLINE void nrf_lpcomp_configure(const nrf_lpcomp_config_t * p_config) -{ - NRF_LPCOMP->TASKS_STOP = 1; - NRF_LPCOMP->ENABLE = LPCOMP_ENABLE_ENABLE_Disabled << LPCOMP_ENABLE_ENABLE_Pos; - NRF_LPCOMP->REFSEL = - (p_config->reference << LPCOMP_REFSEL_REFSEL_Pos) & LPCOMP_REFSEL_REFSEL_Msk; - - //If external source is choosen extract analog reference index. - if ((p_config->reference & LPCOMP_REFSEL_REFSEL_ARef)==LPCOMP_REFSEL_REFSEL_ARef) - { - uint32_t extref = p_config->reference >> 16; - NRF_LPCOMP->EXTREFSEL = (extref << LPCOMP_EXTREFSEL_EXTREFSEL_Pos) & LPCOMP_EXTREFSEL_EXTREFSEL_Msk; - } - - NRF_LPCOMP->ANADETECT = - (p_config->detection << LPCOMP_ANADETECT_ANADETECT_Pos) & LPCOMP_ANADETECT_ANADETECT_Msk; -#ifdef LPCOMP_FEATURE_HYST_PRESENT - NRF_LPCOMP->HYST = ((p_config->hyst) << LPCOMP_HYST_HYST_Pos) & LPCOMP_HYST_HYST_Msk; -#endif //LPCOMP_FEATURE_HYST_PRESENT - NRF_LPCOMP->SHORTS = 0; - NRF_LPCOMP->INTENCLR = LPCOMP_INTENCLR_CROSS_Msk | LPCOMP_INTENCLR_UP_Msk | - LPCOMP_INTENCLR_DOWN_Msk | LPCOMP_INTENCLR_READY_Msk; -} - - -/** - * @brief Function for selecting the LPCOMP input. - * - * This function selects the active input of LPCOMP. - * - * @param[in] input Input to be selected. - */ -__STATIC_INLINE void nrf_lpcomp_input_select(nrf_lpcomp_input_t input) -{ - uint32_t lpcomp_enable_state = NRF_LPCOMP->ENABLE; - - NRF_LPCOMP->ENABLE = LPCOMP_ENABLE_ENABLE_Disabled << LPCOMP_ENABLE_ENABLE_Pos; - NRF_LPCOMP->PSEL = - ((uint32_t)input << LPCOMP_PSEL_PSEL_Pos) | (NRF_LPCOMP->PSEL & ~LPCOMP_PSEL_PSEL_Msk); - NRF_LPCOMP->ENABLE = lpcomp_enable_state; -} - - -/** - * @brief Function for enabling the Low Power Comparator. - * - * This function enables LPCOMP. - * - */ -__STATIC_INLINE void nrf_lpcomp_enable(void) -{ - NRF_LPCOMP->ENABLE = LPCOMP_ENABLE_ENABLE_Enabled << LPCOMP_ENABLE_ENABLE_Pos; - NRF_LPCOMP->EVENTS_READY = 0; - NRF_LPCOMP->EVENTS_DOWN = 0; - NRF_LPCOMP->EVENTS_UP = 0; - NRF_LPCOMP->EVENTS_CROSS = 0; -} - - -/** - * @brief Function for disabling the Low Power Comparator. - * - * This function disables LPCOMP. - * - */ -__STATIC_INLINE void nrf_lpcomp_disable(void) -{ - NRF_LPCOMP->ENABLE = LPCOMP_ENABLE_ENABLE_Disabled << LPCOMP_ENABLE_ENABLE_Pos; -} - - -/** - * @brief Function for getting the last LPCOMP compare result. - * - * @return The last compare result. If 0 then VIN+ < VIN-, if 1 then the opposite. - */ -__STATIC_INLINE uint32_t nrf_lpcomp_result_get(void) -{ - return (uint32_t)NRF_LPCOMP->RESULT; -} - - -/** - * @brief Function for enabling interrupts from LPCOMP. - * - * @param[in] lpcomp_int_mask Mask of interrupts to be enabled. - * - * @sa nrf_lpcomp_int_disable() - * @sa nrf_lpcomp_int_enable_check() - */ -__STATIC_INLINE void nrf_lpcomp_int_enable(uint32_t lpcomp_int_mask) -{ - NRF_LPCOMP->INTENSET = lpcomp_int_mask; -} - - -/** - * @brief Function for disabling interrupts from LPCOMP. - * - * @param[in] lpcomp_int_mask Mask of interrupts to be disabled. - * - * @sa nrf_lpcomp_int_enable() - * @sa nrf_lpcomp_int_enable_check() - */ -__STATIC_INLINE void nrf_lpcomp_int_disable(uint32_t lpcomp_int_mask) -{ - NRF_LPCOMP->INTENCLR = lpcomp_int_mask; -} - - -/** - * @brief Function for getting the enabled interrupts of LPCOMP. - * - * @param[in] lpcomp_int_mask Mask of interrupts to be checked. - * - * @retval true If any of interrupts of the specified mask are enabled. - * - * @sa nrf_lpcomp_int_enable() - * @sa nrf_lpcomp_int_disable() - */ -__STATIC_INLINE bool nrf_lpcomp_int_enable_check(uint32_t lpcomp_int_mask) -{ - return (NRF_LPCOMP->INTENSET & lpcomp_int_mask); // when read this register will return the value of INTEN. -} - - -/** - * @brief Function for getting the address of a specific LPCOMP task register. - * - * @param[in] lpcomp_task LPCOMP task. - * - * @return The address of the specified LPCOMP task. - */ -__STATIC_INLINE uint32_t * nrf_lpcomp_task_address_get(nrf_lpcomp_task_t lpcomp_task) -{ - return (uint32_t *)((uint8_t *)NRF_LPCOMP + lpcomp_task); -} - - -/** - * @brief Function for getting the address of a specific LPCOMP event register. - * - * @param[in] lpcomp_event LPCOMP event. - * - * @return The address of the specified LPCOMP event. - */ -__STATIC_INLINE uint32_t * nrf_lpcomp_event_address_get(nrf_lpcomp_event_t lpcomp_event) -{ - return (uint32_t *)((uint8_t *)NRF_LPCOMP + lpcomp_event); -} - - -/** - * @brief Function for setting LPCOMP shorts. - * - * @param[in] lpcomp_short_mask LPCOMP shorts by mask. - * - */ -__STATIC_INLINE void nrf_lpcomp_shorts_enable(uint32_t lpcomp_short_mask) -{ - NRF_LPCOMP->SHORTS |= lpcomp_short_mask; -} - - -/** - * @brief Function for clearing LPCOMP shorts by mask. - * - * @param[in] lpcomp_short_mask LPCOMP shorts to be cleared. - * - */ -__STATIC_INLINE void nrf_lpcomp_shorts_disable(uint32_t lpcomp_short_mask) -{ - NRF_LPCOMP->SHORTS &= ~lpcomp_short_mask; -} - - -/** - * @brief Function for setting a specific LPCOMP task. - * - * @param[in] lpcomp_task LPCOMP task to be set. - * - */ -__STATIC_INLINE void nrf_lpcomp_task_trigger(nrf_lpcomp_task_t lpcomp_task) -{ - *( (volatile uint32_t *)( (uint8_t *)NRF_LPCOMP + lpcomp_task) ) = 1; -} - - -/** - * @brief Function for clearing a specific LPCOMP event. - * - * @param[in] lpcomp_event LPCOMP event to be cleared. - * - */ -__STATIC_INLINE void nrf_lpcomp_event_clear(nrf_lpcomp_event_t lpcomp_event) -{ - *( (volatile uint32_t *)( (uint8_t *)NRF_LPCOMP + lpcomp_event) ) = 0; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_LPCOMP + lpcomp_event)); - (void)dummy; -#endif -} - - -/** - * @brief Function for getting the state of a specific LPCOMP event. - * - * @retval true If the specified LPCOMP event is active. - * - */ -__STATIC_INLINE bool nrf_lpcomp_event_check(nrf_lpcomp_event_t lpcomp_event) -{ - return (bool) (*(volatile uint32_t *)( (uint8_t *)NRF_LPCOMP + lpcomp_event)); -} - - -/** - *@} - **/ - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_LPCOMP_H_ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_nvmc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_nvmc.c deleted file mode 100644 index ccae784b645..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_nvmc.c +++ /dev/null @@ -1,136 +0,0 @@ -/** - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - *@file - *@brief NMVC driver implementation - */ - -#include -#include "nrf.h" -#include "nrf_nvmc.h" - - -static inline void wait_for_flash_ready(void) -{ - while (NRF_NVMC->READY == NVMC_READY_READY_Busy) {;} -} - - -void nrf_nvmc_page_erase(uint32_t address) -{ - // Enable erase. - NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Een; - __ISB(); - __DSB(); - - // Erase the page - NRF_NVMC->ERASEPAGE = address; - wait_for_flash_ready(); - - NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren; - __ISB(); - __DSB(); -} - - -void nrf_nvmc_write_byte(uint32_t address, uint8_t value) -{ - uint32_t byte_shift = address & (uint32_t)0x03; - uint32_t address32 = address & ~byte_shift; // Address to the word this byte is in. - uint32_t value32 = (*(uint32_t*)address32 & ~((uint32_t)0xFF << (byte_shift << (uint32_t)3))); - value32 = value32 + ((uint32_t)value << (byte_shift << 3)); - - // Enable write. - NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen; - __ISB(); - __DSB(); - - *(uint32_t*)address32 = value32; - wait_for_flash_ready(); - - NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren; - __ISB(); - __DSB(); -} - - -void nrf_nvmc_write_word(uint32_t address, uint32_t value) -{ - // Enable write. - NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen; - __ISB(); - __DSB(); - - *(uint32_t*)address = value; - wait_for_flash_ready(); - - NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren; - __ISB(); - __DSB(); -} - - -void nrf_nvmc_write_bytes(uint32_t address, const uint8_t * src, uint32_t num_bytes) -{ - for (uint32_t i = 0; i < num_bytes; i++) - { - nrf_nvmc_write_byte(address + i, src[i]); - } -} - - -void nrf_nvmc_write_words(uint32_t address, const uint32_t * src, uint32_t num_words) -{ - // Enable write. - NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen; - __ISB(); - __DSB(); - - for (uint32_t i = 0; i < num_words; i++) - { - ((uint32_t*)address)[i] = src[i]; - wait_for_flash_ready(); - } - - NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren; - __ISB(); - __DSB(); -} - diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_nvmc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_nvmc.h deleted file mode 100644 index b31c5b1b32d..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_nvmc.h +++ /dev/null @@ -1,125 +0,0 @@ -/** - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @file - * @brief NMVC driver API. - */ - -#ifndef NRF_NVMC_H__ -#define NRF_NVMC_H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - - -/** - * @defgroup nrf_nvmc Non-volatile memory controller - * @{ - * @ingroup nrf_drivers - * @brief Driver for the NVMC peripheral. - * - * This driver allows writing to the non-volatile memory (NVM) regions - * of the chip. In order to write to NVM the controller must be powered - * on and the relevant page must be erased. - * - */ - - -/** - * @brief Erase a page in flash. This is required before writing to any - * address in the page. - * - * @param address Start address of the page. - */ -void nrf_nvmc_page_erase(uint32_t address); - - -/** - * @brief Write a single byte to flash. - * - * The function reads the word containing the byte, and then - * rewrites the entire word. - * - * @param address Address to write to. - * @param value Value to write. - */ -void nrf_nvmc_write_byte(uint32_t address , uint8_t value); - - -/** - * @brief Write a 32-bit word to flash. - * @param address Address to write to. - * @param value Value to write. - */ -void nrf_nvmc_write_word(uint32_t address, uint32_t value); - - -/** - * @brief Write consecutive bytes to flash. - * - * @param address Address to write to. - * @param src Pointer to data to copy from. - * @param num_bytes Number of bytes in src to write. - */ -void nrf_nvmc_write_bytes(uint32_t address, const uint8_t * src, uint32_t num_bytes); - - -/** - * @brief Write consecutive words to flash. - * - * @param address Address to write to. - * @param src Pointer to data to copy from. - * @param num_words Number of words in src to write. - */ -void nrf_nvmc_write_words(uint32_t address, const uint32_t * src, uint32_t num_words); - - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_NVMC_H__ -/** @} */ - - diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_pdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_pdm.h deleted file mode 100644 index 7937d756870..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_pdm.h +++ /dev/null @@ -1,396 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_PDM_H_ -#define NRF_PDM_H_ - -/** - * @defgroup nrf_pdm_hal PDM HAL - * @{ - * @ingroup nrf_pdm - * - * @brief @tagAPI52 Hardware abstraction layer for accessing the pulse density modulation (PDM) peripheral. - */ - -#include -#include -#include "nrf.h" -#include "nrf_assert.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -#define NRF_PDM_GAIN_MINIMUM 0x00 -#define NRF_PDM_GAIN_DEFAULT 0x28 -#define NRF_PDM_GAIN_MAXIMUM 0x50 - -typedef uint8_t nrf_pdm_gain_t; - - -/** - * @brief PDM tasks. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_PDM_TASK_START = offsetof(NRF_PDM_Type, TASKS_START), ///< Starts continuous PDM transfer. - NRF_PDM_TASK_STOP = offsetof(NRF_PDM_Type, TASKS_STOP) ///< Stops PDM transfer. -} nrf_pdm_task_t; - - -/** - * @brief PDM events. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_PDM_EVENT_STARTED = offsetof(NRF_PDM_Type, EVENTS_STARTED), ///< PDM transfer has started. - NRF_PDM_EVENT_STOPPED = offsetof(NRF_PDM_Type, EVENTS_STOPPED), ///< PDM transfer has finished. - NRF_PDM_EVENT_END = offsetof(NRF_PDM_Type, EVENTS_END) ///< The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM. -} nrf_pdm_event_t; - - -/** - * @brief PDM interrupt masks. - */ -typedef enum -{ - NRF_PDM_INT_STARTED = PDM_INTENSET_STARTED_Msk, ///< Interrupt on EVENTS_STARTED event. - NRF_PDM_INT_STOPPED = PDM_INTENSET_STOPPED_Msk, ///< Interrupt on EVENTS_STOPPED event. - NRF_PDM_INT_END = PDM_INTENSET_END_Msk ///< Interrupt on EVENTS_END event. -} nrf_pdm_int_mask_t; - -/** - * @brief PDM clock frequency. - */ -typedef enum -{ - NRF_PDM_FREQ_1000K = PDM_PDMCLKCTRL_FREQ_1000K, ///< PDM_CLK = 1.000 MHz. - NRF_PDM_FREQ_1032K = PDM_PDMCLKCTRL_FREQ_Default, ///< PDM_CLK = 1.032 MHz. - NRF_PDM_FREQ_1067K = PDM_PDMCLKCTRL_FREQ_1067K ///< PDM_CLK = 1.067 MHz. -} nrf_pdm_freq_t; - - -/** - * @brief PDM operation mode. - */ -typedef enum -{ - NRF_PDM_MODE_STEREO = PDM_MODE_OPERATION_Stereo, ///< Sample and store one pair (Left + Right) of 16-bit samples per RAM word. - NRF_PDM_MODE_MONO = PDM_MODE_OPERATION_Mono ///< Sample and store two successive Left samples (16 bit each) per RAM word. -} nrf_pdm_mode_t; - - -/** - * @brief PDM sampling mode. - */ -typedef enum -{ - NRF_PDM_EDGE_LEFTFALLING = PDM_MODE_EDGE_LeftFalling, ///< Left (or mono) is sampled on falling edge of PDM_CLK. - NRF_PDM_EDGE_LEFTRISING = PDM_MODE_EDGE_LeftRising ///< Left (or mono) is sampled on rising edge of PDM_CLK. -} nrf_pdm_edge_t; - - -/** - * @brief Function for triggering a PDM task. - * - * @param[in] pdm_task PDM task. - */ -__STATIC_INLINE void nrf_pdm_task_trigger(nrf_pdm_task_t pdm_task) -{ - *((volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_task)) = 0x1UL; -} - - -/** - * @brief Function for getting the address of a PDM task register. - * - * @param[in] pdm_task PDM task. - * - * @return Address of the specified PDM task. - */ -__STATIC_INLINE uint32_t nrf_pdm_task_address_get(nrf_pdm_task_t pdm_task) -{ - return (uint32_t)((uint8_t *)NRF_PDM + (uint32_t)pdm_task); -} - - -/** - * @brief Function for getting the state of a PDM event. - * - * @param[in] pdm_event PDM event. - * - * @return State of the specified PDM event. - */ -__STATIC_INLINE bool nrf_pdm_event_check(nrf_pdm_event_t pdm_event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_event); -} - - -/** - * @brief Function for clearing a PDM event. - * - * @param[in] pdm_event PDM event. - */ -__STATIC_INLINE void nrf_pdm_event_clear(nrf_pdm_event_t pdm_event) -{ - *((volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_event)); - (void)dummy; -#endif -} - - -/** - * @brief Function for getting the address of a PDM event register. - * - * @param[in] pdm_event PDM event. - * - * @return Address of the specified PDM event. - */ -__STATIC_INLINE volatile uint32_t * nrf_pdm_event_address_get(nrf_pdm_event_t pdm_event) -{ - return (volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_event); -} - - -/** - * @brief Function for enabling PDM interrupts. - * - * @param[in] pdm_int_mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_pdm_int_enable(uint32_t pdm_int_mask) -{ - NRF_PDM->INTENSET = pdm_int_mask; -} - - -/** - * @brief Function for retrieving the state of PDM interrupts. - * - * @param[in] pdm_int_mask Interrupts to check. - * - * @retval true If all specified interrupts are enabled. - * @retval false If at least one of the given interrupts is not enabled. - */ -__STATIC_INLINE bool nrf_pdm_int_enable_check(uint32_t pdm_int_mask) -{ - return (bool)(NRF_PDM->INTENSET & pdm_int_mask); -} - - -/** - * @brief Function for disabling interrupts. - * - * @param pdm_int_mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_pdm_int_disable(uint32_t pdm_int_mask) -{ - NRF_PDM->INTENCLR = pdm_int_mask; -} - - -/** - * @brief Function for enabling the PDM peripheral. - * - * The PDM peripheral must be enabled before use. - */ -__STATIC_INLINE void nrf_pdm_enable(void) -{ - NRF_PDM->ENABLE = (PDM_ENABLE_ENABLE_Enabled << PDM_ENABLE_ENABLE_Pos); -} - - -/** - * @brief Function for disabling the PDM peripheral. - */ -__STATIC_INLINE void nrf_pdm_disable(void) -{ - NRF_PDM->ENABLE = (PDM_ENABLE_ENABLE_Disabled << PDM_ENABLE_ENABLE_Pos); -} - - -/** - * @brief Function for checking if the PDM peripheral is enabled. - * - * @retval true If the PDM peripheral is enabled. - * @retval false If the PDM peripheral is not enabled. - */ -__STATIC_INLINE bool nrf_pdm_enable_check(void) -{ - return (NRF_PDM->ENABLE == (PDM_ENABLE_ENABLE_Enabled << PDM_ENABLE_ENABLE_Pos)); -} - - -/** - * @brief Function for setting the PDM operation mode. - * - * @param[in] pdm_mode PDM operation mode. - * @param[in] pdm_edge PDM sampling mode. - */ -__STATIC_INLINE void nrf_pdm_mode_set(nrf_pdm_mode_t pdm_mode, nrf_pdm_edge_t pdm_edge) -{ - NRF_PDM->MODE = ((pdm_mode << PDM_MODE_OPERATION_Pos) & PDM_MODE_OPERATION_Msk) - | ((pdm_edge << PDM_MODE_EDGE_Pos) & PDM_MODE_EDGE_Msk); -} - - -/** - * @brief Function for getting the PDM operation mode. - * - * @param[out] p_pdm_mode PDM operation mode. - * @param[out] p_pdm_edge PDM sampling mode. - */ -__STATIC_INLINE void nrf_pdm_mode_get(nrf_pdm_mode_t * p_pdm_mode, nrf_pdm_edge_t * p_pdm_edge) -{ - uint32_t mode = NRF_PDM->MODE; - *p_pdm_mode = (nrf_pdm_mode_t)((mode & PDM_MODE_OPERATION_Msk ) >> PDM_MODE_OPERATION_Pos); - *p_pdm_edge = (nrf_pdm_edge_t)((mode & PDM_MODE_EDGE_Msk ) >> PDM_MODE_EDGE_Pos); -} - - -/** - * @brief Function for setting the PDM clock frequency. - * - * @param[in] pdm_freq PDM clock frequency. - */ -__STATIC_INLINE void nrf_pdm_clock_set(nrf_pdm_freq_t pdm_freq) -{ - NRF_PDM->PDMCLKCTRL = ((pdm_freq << PDM_PDMCLKCTRL_FREQ_Pos) & PDM_PDMCLKCTRL_FREQ_Msk); -} - - -/** - * @brief Function for getting the PDM clock frequency. - */ -__STATIC_INLINE nrf_pdm_freq_t nrf_pdm_clock_get(void) -{ - return (nrf_pdm_freq_t) ((NRF_PDM->PDMCLKCTRL << PDM_PDMCLKCTRL_FREQ_Pos) & PDM_PDMCLKCTRL_FREQ_Msk); -} - - -/** - * @brief Function for setting up the PDM pins. - * - * @param[in] psel_clk CLK pin number. - * @param[in] psel_din DIN pin number. - */ -__STATIC_INLINE void nrf_pdm_psel_connect(uint32_t psel_clk, uint32_t psel_din) -{ - NRF_PDM->PSEL.CLK = psel_clk; - NRF_PDM->PSEL.DIN = psel_din; -} - -/** - * @brief Function for disconnecting the PDM pins. - */ -__STATIC_INLINE void nrf_pdm_psel_disconnect() -{ - NRF_PDM->PSEL.CLK = ((PDM_PSEL_CLK_CONNECT_Disconnected << PDM_PSEL_CLK_CONNECT_Pos) - & PDM_PSEL_CLK_CONNECT_Msk); - NRF_PDM->PSEL.DIN = ((PDM_PSEL_DIN_CONNECT_Disconnected << PDM_PSEL_DIN_CONNECT_Pos) - & PDM_PSEL_DIN_CONNECT_Msk); -} - - -/** - * @brief Function for setting the PDM gain. - * - * @param[in] gain_l Left channel gain. - * @param[in] gain_r Right channel gain. - */ -__STATIC_INLINE void nrf_pdm_gain_set(nrf_pdm_gain_t gain_l, nrf_pdm_gain_t gain_r) -{ - NRF_PDM->GAINL = gain_l; - NRF_PDM->GAINR = gain_r; -} - - -/** - * @brief Function for getting the PDM gain. - * - * @param[out] p_gain_l Left channel gain. - * @param[out] p_gain_r Right channel gain. - */ -__STATIC_INLINE void nrf_pdm_gain_get(nrf_pdm_gain_t * p_gain_l, nrf_pdm_gain_t * p_gain_r) -{ - *p_gain_l = NRF_PDM->GAINL; - *p_gain_r = NRF_PDM->GAINR; -} - - -/** - * @brief Function for setting the PDM sample buffer. - * - * @param[in] p_buffer Pointer to the RAM address where samples should be written with EasyDMA. - * @param[in] num Number of samples to allocate memory for in EasyDMA mode. - * - * The amount of allocated RAM depends on the operation mode. - * - For stereo mode: N 32-bit words. - * - For mono mode: Ceil(N/2) 32-bit words. - */ -__STATIC_INLINE void nrf_pdm_buffer_set(uint32_t * p_buffer, uint32_t num) -{ - NRF_PDM->SAMPLE.PTR = (uint32_t)p_buffer; - NRF_PDM->SAMPLE.MAXCNT = num; -} - -/** - * @brief Function for getting the current PDM sample buffer address. - * - * @return Pointer to the current sample buffer. - */ -__STATIC_INLINE uint32_t * nrf_pdm_buffer_get() -{ - return (uint32_t *)NRF_PDM->SAMPLE.PTR; -} - - -/** - *@} - **/ - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_PDM_H_ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_peripherals.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_peripherals.h deleted file mode 100644 index a1cdd3b4d80..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_peripherals.h +++ /dev/null @@ -1,73 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_PERIPHERALS_H -#define NRF_PERIPHERALS_H - -/*lint ++flb "Enter library region */ - -#ifdef NRF51422 -#include "nrf51422_peripherals.h" -#endif - -#ifdef NRF51802 -#include "nrf51802_peripherals.h" -#endif - -#ifdef NRF51822 -#include "nrf51822_peripherals.h" -#endif - -#ifdef NRF52810_XXAA -#include "nrf52810_peripherals.h" -#endif - -#ifdef NRF52832_XXAA -#include "nrf52832_peripherals.h" -#endif - -#ifdef NRF52840_XXAA -#include "nrf52840_peripherals.h" -#endif - - -/*lint --flb "Leave library region" */ - -#endif /* NRF_PERIPHERALS_H */ - diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_power.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_power.h deleted file mode 100644 index 13116cfee7f..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_power.h +++ /dev/null @@ -1,1065 +0,0 @@ -/** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef NRF_POWER_H__ -#define NRF_POWER_H__ - -/** - * @ingroup nrf_power - * @defgroup nrf_power_hal POWER HAL - * @{ - * - * Hardware access layer for (POWER) peripheral. - */ -#include "nrf.h" -#include "sdk_config.h" -#include "nordic_common.h" -#include "nrf_assert.h" -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#if defined(POWER_RAMSTATUS_RAMBLOCK0_Msk) -#define NRF_POWER_HAS_RAMSTATUS 1 -#else -#define NRF_POWER_HAS_RAMSTATUS 0 -#endif - -/** - * @name The implemented functionality - * @{ - * - * Macros that defines functionality that is implemented into POWER peripheral. - */ -#if defined(POWER_INTENSET_SLEEPENTER_Msk) || defined(__SDK_DOXYGEN__) -/** - * @brief The fact that sleep events are present - * - * In some MCUs there is possibility to process sleep entering and exiting - * events. - */ -#define NRF_POWER_HAS_SLEEPEVT 1 -#else -#define NRF_POWER_HAS_SLEEPEVT 0 -#endif - -#if defined(POWER_RAM_POWER_S0POWER_Msk) || defined(__SDK_DOXYGEN__) -/** - * @brief The fact that RAMPOWER registers are present - * - * After nRF51, new way to manage RAM power was implemented. - * Special registers, one for every RAM block that makes it possible to - * power ON or OFF RAM segments and turn ON and OFF RAM retention in system OFF - * state. - */ -#define NRF_POWER_HAS_RAMPOWER_REGS 1 -#else -#define NRF_POWER_HAS_RAMPOWER_REGS 0 -#endif - -#if defined(POWER_POFCON_THRESHOLDVDDH_Msk) || defined(__SDK_DOXYGEN__) -/** - * @brief Auxiliary definition to mark the fact that VDDH is present - * - * This definition can be used in a code to decide if the part with VDDH - * related settings should be implemented. - */ -#define NRF_POWER_HAS_VDDH 1 -#else -#define NRF_POWER_HAS_VDDH 0 -#endif - -#if defined(POWER_USBREGSTATUS_VBUSDETECT_Msk) || defined(__SDK_DOXYGEN__) -/** - * @brief The fact that power module manages USB regulator - * - * In devices that have USB, power peripheral manages also connection - * detection and USB power regulator, that converts 5 V to 3.3 V - * used by USBD peripheral. - */ -#define NRF_POWER_HAS_USBREG 1 -#else -#define NRF_POWER_HAS_USBREG 0 -#endif -/** @} */ - -/* ------------------------------------------------------------------------------------------------ - * Begin of automatically generated part - * ------------------------------------------------------------------------------------------------ - */ - -/** - * @brief POWER tasks - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_POWER_TASK_CONSTLAT = offsetof(NRF_POWER_Type, TASKS_CONSTLAT), /**< Enable constant latency mode */ - NRF_POWER_TASK_LOWPWR = offsetof(NRF_POWER_Type, TASKS_LOWPWR ), /**< Enable low power mode (variable latency) */ -}nrf_power_task_t; /*lint -restore */ - -/** - * @brief POWER events - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_POWER_EVENT_POFWARN = offsetof(NRF_POWER_Type, EVENTS_POFWARN ), /**< Power failure warning */ -#if NRF_POWER_HAS_SLEEPEVT - NRF_POWER_EVENT_SLEEPENTER = offsetof(NRF_POWER_Type, EVENTS_SLEEPENTER ), /**< CPU entered WFI/WFE sleep */ - NRF_POWER_EVENT_SLEEPEXIT = offsetof(NRF_POWER_Type, EVENTS_SLEEPEXIT ), /**< CPU exited WFI/WFE sleep */ -#endif -#if NRF_POWER_HAS_USBREG - NRF_POWER_EVENT_USBDETECTED = offsetof(NRF_POWER_Type, EVENTS_USBDETECTED), /**< Voltage supply detected on VBUS */ - NRF_POWER_EVENT_USBREMOVED = offsetof(NRF_POWER_Type, EVENTS_USBREMOVED ), /**< Voltage supply removed from VBUS */ - NRF_POWER_EVENT_USBPWRRDY = offsetof(NRF_POWER_Type, EVENTS_USBPWRRDY ), /**< USB 3.3 V supply ready */ -#endif -}nrf_power_event_t; /*lint -restore */ - -/** - * @brief POWER interrupts - */ -typedef enum -{ - NRF_POWER_INT_POFWARN_MASK = POWER_INTENSET_POFWARN_Msk , /**< Write '1' to Enable interrupt for POFWARN event */ -#if NRF_POWER_HAS_SLEEPEVT - NRF_POWER_INT_SLEEPENTER_MASK = POWER_INTENSET_SLEEPENTER_Msk , /**< Write '1' to Enable interrupt for SLEEPENTER event */ - NRF_POWER_INT_SLEEPEXIT_MASK = POWER_INTENSET_SLEEPEXIT_Msk , /**< Write '1' to Enable interrupt for SLEEPEXIT event */ -#endif -#if NRF_POWER_HAS_USBREG - NRF_POWER_INT_USBDETECTED_MASK = POWER_INTENSET_USBDETECTED_Msk, /**< Write '1' to Enable interrupt for USBDETECTED event */ - NRF_POWER_INT_USBREMOVED_MASK = POWER_INTENSET_USBREMOVED_Msk , /**< Write '1' to Enable interrupt for USBREMOVED event */ - NRF_POWER_INT_USBPWRRDY_MASK = POWER_INTENSET_USBPWRRDY_Msk , /**< Write '1' to Enable interrupt for USBPWRRDY event */ -#endif -}nrf_power_int_mask_t; - -/** - * @brief Function for activating a specific POWER task. - * - * @param task Task. - */ -__STATIC_INLINE void nrf_power_task_trigger(nrf_power_task_t task); - -/** - * @brief Function for returning the address of a specific POWER task register. - * - * @param task Task. - * - * @return Task address. - */ -__STATIC_INLINE uint32_t nrf_power_task_address_get(nrf_power_task_t task); - -/** - * @brief Function for clearing a specific event. - * - * @param event Event. - */ -__STATIC_INLINE void nrf_power_event_clear(nrf_power_event_t event); - -/** - * @brief Function for returning the state of a specific event. - * - * @param event Event. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_power_event_check(nrf_power_event_t event); - -/** - * @brief Function for getting and clearing the state of specific event - * - * This function checks the state of the event and clears it. - * - * @param event Event. - * - * @retval true If the event was set. - * @retval false If the event was not set. - */ -__STATIC_INLINE bool nrf_power_event_get_and_clear(nrf_power_event_t event); - -/** - * @brief Function for returning the address of a specific POWER event register. - * - * @param event Event. - * - * @return Address. - */ -__STATIC_INLINE uint32_t nrf_power_event_address_get(nrf_power_event_t event); - -/** - * @brief Function for enabling selected interrupts. - * - * @param int_mask Interrupts mask. - */ -__STATIC_INLINE void nrf_power_int_enable(uint32_t int_mask); - -/** - * @brief Function for retrieving the state of selected interrupts. - * - * @param int_mask Interrupts mask. - * - * @retval true If any of selected interrupts is enabled. - * @retval false If none of selected interrupts is enabled. - */ -__STATIC_INLINE bool nrf_power_int_enable_check(uint32_t int_mask); - -/** - * @brief Function for retrieving the information about enabled interrupts. - * - * @return The flags of enabled interrupts. - */ -__STATIC_INLINE uint32_t nrf_power_int_enable_get(void); - -/** - * @brief Function for disabling selected interrupts. - * - * @param int_mask Interrupts mask. - */ -__STATIC_INLINE void nrf_power_int_disable(uint32_t int_mask); - - -/** @} */ /* End of nrf_power_hal */ - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -/* ------------------------------------------------------------------------------------------------ - * Internal functions - */ - -/** - * @internal - * @brief Internal function for getting task/event register address - * - * @oaram offset Offset of the register from the instance beginning - * - * @attention offset has to be modulo 4 value. In other case we can get hardware fault. - * @return Pointer to the register - */ -__STATIC_INLINE volatile uint32_t * nrf_power_regptr_get(uint32_t offset) -{ - return (volatile uint32_t *)(((uint8_t *)NRF_POWER) + (uint32_t)offset); -} - -/** - * @internal - * @brief Internal function for getting task/event register address - constant version - * - * @oaram offset Offset of the register from the instance beginning - * - * @attention offset has to be modulo 4 value. In other case we can get hardware fault. - * @return Pointer to the register - */ -__STATIC_INLINE volatile const uint32_t * nrf_power_regptr_get_c( - uint32_t offset) -{ - return (volatile const uint32_t *)(((uint8_t *)NRF_POWER) + - (uint32_t)offset); -} - -/* ------------------------------------------------------------------------------------------------ - * Interface functions definitions - */ - -void nrf_power_task_trigger(nrf_power_task_t task) -{ - *(nrf_power_regptr_get((uint32_t)task)) = 1UL; -} - -uint32_t nrf_power_task_address_get(nrf_power_task_t task) -{ - return (uint32_t)nrf_power_regptr_get_c((uint32_t)task); -} - -void nrf_power_event_clear(nrf_power_event_t event) -{ - *(nrf_power_regptr_get((uint32_t)event)) = 0UL; -} - -bool nrf_power_event_check(nrf_power_event_t event) -{ - return (bool)*nrf_power_regptr_get_c((uint32_t)event); -} - -bool nrf_power_event_get_and_clear(nrf_power_event_t event) -{ - bool ret = nrf_power_event_check(event); - if (ret) - { - nrf_power_event_clear(event); - } - return ret; -} - -uint32_t nrf_power_event_address_get(nrf_power_event_t event) -{ - return (uint32_t)nrf_power_regptr_get_c((uint32_t)event); -} - -void nrf_power_int_enable(uint32_t int_mask) -{ - NRF_POWER->INTENSET = int_mask; -} - -bool nrf_power_int_enable_check(uint32_t int_mask) -{ - return !!(NRF_POWER->INTENSET & int_mask); -} - -uint32_t nrf_power_int_enable_get(void) -{ - return NRF_POWER->INTENSET; -} - -void nrf_power_int_disable(uint32_t int_mask) -{ - NRF_POWER->INTENCLR = int_mask; -} - -#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ - -/* ------------------------------------------------------------------------------------------------ - * End of automatically generated part - * ------------------------------------------------------------------------------------------------ - */ -/** - * @ingroup nrf_power_hal - * @{ - */ - -/** - * @brief Reset reason - */ -typedef enum -{ - NRF_POWER_RESETREAS_RESETPIN_MASK = POWER_RESETREAS_RESETPIN_Msk, /*!< Bit mask of RESETPIN field. *///!< NRF_POWER_RESETREAS_RESETPIN_MASK - NRF_POWER_RESETREAS_DOG_MASK = POWER_RESETREAS_DOG_Msk , /*!< Bit mask of DOG field. */ //!< NRF_POWER_RESETREAS_DOG_MASK - NRF_POWER_RESETREAS_SREQ_MASK = POWER_RESETREAS_SREQ_Msk , /*!< Bit mask of SREQ field. */ //!< NRF_POWER_RESETREAS_SREQ_MASK - NRF_POWER_RESETREAS_LOCKUP_MASK = POWER_RESETREAS_LOCKUP_Msk , /*!< Bit mask of LOCKUP field. */ //!< NRF_POWER_RESETREAS_LOCKUP_MASK - NRF_POWER_RESETREAS_OFF_MASK = POWER_RESETREAS_OFF_Msk , /*!< Bit mask of OFF field. */ //!< NRF_POWER_RESETREAS_OFF_MASK -#if defined(POWER_RESETREAS_LPCOMP_Msk) || defined(__SDK_DOXYGEN__) - NRF_POWER_RESETREAS_LPCOMP_MASK = POWER_RESETREAS_LPCOMP_Msk , /*!< Bit mask of LPCOMP field. */ //!< NRF_POWER_RESETREAS_LPCOMP_MASK -#endif - NRF_POWER_RESETREAS_DIF_MASK = POWER_RESETREAS_DIF_Msk , /*!< Bit mask of DIF field. */ //!< NRF_POWER_RESETREAS_DIF_MASK -#if defined(POWER_RESETREAS_NFC_Msk) || defined(__SDK_DOXYGEN__) - NRF_POWER_RESETREAS_NFC_MASK = POWER_RESETREAS_NFC_Msk , /*!< Bit mask of NFC field. */ -#endif -#if defined(POWER_RESETREAS_VBUS_Msk) || defined(__SDK_DOXYGEN__) - NRF_POWER_RESETREAS_VBUS_MASK = POWER_RESETREAS_VBUS_Msk , /*!< Bit mask of VBUS field. */ -#endif -}nrf_power_resetreas_mask_t; - -#if NRF_POWER_HAS_USBREG -/** - * @brief USBREGSTATUS register bit masks - * - * @sa nrf_power_usbregstatus_get - */ -typedef enum -{ - NRF_POWER_USBREGSTATUS_VBUSDETECT_MASK = POWER_USBREGSTATUS_VBUSDETECT_Msk, /**< USB detected or removed */ - NRF_POWER_USBREGSTATUS_OUTPUTRDY_MASK = POWER_USBREGSTATUS_OUTPUTRDY_Msk /**< USB 3.3 V supply ready */ -}nrf_power_usbregstatus_mask_t; -#endif - -#if NRF_POWER_HAS_RAMSTATUS -/** - * @brief RAM blocks numbers - * - * @sa nrf_power_ramblock_mask_t - * @note - * Ram blocks has to been used in nrf51. - * In new CPU ram is divided into segments and this functionality is depreciated. - * For the newer MCU see the PS for mapping between internal RAM and RAM blocks, - * because this mapping is not 1:1, and functions related to old style blocks - * should not be used. - */ -typedef enum -{ - NRF_POWER_RAMBLOCK0 = POWER_RAMSTATUS_RAMBLOCK0_Pos, - NRF_POWER_RAMBLOCK1 = POWER_RAMSTATUS_RAMBLOCK1_Pos, - NRF_POWER_RAMBLOCK2 = POWER_RAMSTATUS_RAMBLOCK2_Pos, - NRF_POWER_RAMBLOCK3 = POWER_RAMSTATUS_RAMBLOCK3_Pos -}nrf_power_ramblock_t; - -/** - * @brief RAM blocks masks - * - * @sa nrf_power_ramblock_t - */ - -typedef enum -{ - NRF_POWER_RAMBLOCK0_MASK = POWER_RAMSTATUS_RAMBLOCK0_Msk, - NRF_POWER_RAMBLOCK1_MASK = POWER_RAMSTATUS_RAMBLOCK1_Msk, - NRF_POWER_RAMBLOCK2_MASK = POWER_RAMSTATUS_RAMBLOCK2_Msk, - NRF_POWER_RAMBLOCK3_MASK = POWER_RAMSTATUS_RAMBLOCK3_Msk -}nrf_power_ramblock_mask_t; -#endif // NRF_POWER_HAS_RAMSTATUS - -/** - * @brief RAM power state position of the bits - * - * @sa nrf_power_onoffram_mask_t - */ -typedef enum -{ - NRF_POWER_ONRAM0, /**< Keep RAM block 0 on or off in system ON Mode */ - NRF_POWER_OFFRAM0, /**< Keep retention on RAM block 0 when RAM block is switched off */ - NRF_POWER_ONRAM1, /**< Keep RAM block 1 on or off in system ON Mode */ - NRF_POWER_OFFRAM1, /**< Keep retention on RAM block 1 when RAM block is switched off */ - NRF_POWER_ONRAM2, /**< Keep RAM block 2 on or off in system ON Mode */ - NRF_POWER_OFFRAM2, /**< Keep retention on RAM block 2 when RAM block is switched off */ - NRF_POWER_ONRAM3, /**< Keep RAM block 3 on or off in system ON Mode */ - NRF_POWER_OFFRAM3, /**< Keep retention on RAM block 3 when RAM block is switched off */ -}nrf_power_onoffram_t; - -/** - * @brief RAM power state bit masks - * - * @sa nrf_power_onoffram_t - */ -typedef enum -{ - NRF_POWER_ONRAM0_MASK = 1U << NRF_POWER_ONRAM0, /**< Keep RAM block 0 on or off in system ON Mode */ - NRF_POWER_OFFRAM0_MASK = 1U << NRF_POWER_OFFRAM0, /**< Keep retention on RAM block 0 when RAM block is switched off */ - NRF_POWER_ONRAM1_MASK = 1U << NRF_POWER_ONRAM1, /**< Keep RAM block 1 on or off in system ON Mode */ - NRF_POWER_OFFRAM1_MASK = 1U << NRF_POWER_OFFRAM1, /**< Keep retention on RAM block 1 when RAM block is switched off */ - NRF_POWER_ONRAM2_MASK = 1U << NRF_POWER_ONRAM2, /**< Keep RAM block 2 on or off in system ON Mode */ - NRF_POWER_OFFRAM2_MASK = 1U << NRF_POWER_OFFRAM2, /**< Keep retention on RAM block 2 when RAM block is switched off */ - NRF_POWER_ONRAM3_MASK = 1U << NRF_POWER_ONRAM3, /**< Keep RAM block 3 on or off in system ON Mode */ - NRF_POWER_OFFRAM3_MASK = 1U << NRF_POWER_OFFRAM3, /**< Keep retention on RAM block 3 when RAM block is switched off */ -}nrf_power_onoffram_mask_t; - -/** - * @brief Power failure comparator thresholds - */ -typedef enum -{ - NRF_POWER_POFTHR_V21 = POWER_POFCON_THRESHOLD_V21, /**< Set threshold to 2.1 V */ - NRF_POWER_POFTHR_V23 = POWER_POFCON_THRESHOLD_V23, /**< Set threshold to 2.3 V */ - NRF_POWER_POFTHR_V25 = POWER_POFCON_THRESHOLD_V25, /**< Set threshold to 2.5 V */ - NRF_POWER_POFTHR_V27 = POWER_POFCON_THRESHOLD_V27, /**< Set threshold to 2.7 V */ -#if defined(POWER_POFCON_THRESHOLD_V17) || defined(__SDK_DOXYGEN__) - NRF_POWER_POFTHR_V17 = POWER_POFCON_THRESHOLD_V17, /**< Set threshold to 1.7 V */ - NRF_POWER_POFTHR_V18 = POWER_POFCON_THRESHOLD_V18, /**< Set threshold to 1.8 V */ - NRF_POWER_POFTHR_V19 = POWER_POFCON_THRESHOLD_V19, /**< Set threshold to 1.9 V */ - NRF_POWER_POFTHR_V20 = POWER_POFCON_THRESHOLD_V20, /**< Set threshold to 2.0 V */ - NRF_POWER_POFTHR_V22 = POWER_POFCON_THRESHOLD_V22, /**< Set threshold to 2.2 V */ - NRF_POWER_POFTHR_V24 = POWER_POFCON_THRESHOLD_V24, /**< Set threshold to 2.4 V */ - NRF_POWER_POFTHR_V26 = POWER_POFCON_THRESHOLD_V26, /**< Set threshold to 2.6 V */ - NRF_POWER_POFTHR_V28 = POWER_POFCON_THRESHOLD_V28, /**< Set threshold to 2.8 V */ -#endif -}nrf_power_pof_thr_t; - -#if NRF_POWER_HAS_VDDH -/** - * @brief Power failure comparator thresholds for VDDH - */ -typedef enum -{ - NRF_POWER_POFTHRVDDH_V27 = POWER_POFCON_THRESHOLDVDDH_V27, /**< Set threshold to 2.7 V */ - NRF_POWER_POFTHRVDDH_V28 = POWER_POFCON_THRESHOLDVDDH_V28, /**< Set threshold to 2.8 V */ - NRF_POWER_POFTHRVDDH_V29 = POWER_POFCON_THRESHOLDVDDH_V29, /**< Set threshold to 2.9 V */ - NRF_POWER_POFTHRVDDH_V30 = POWER_POFCON_THRESHOLDVDDH_V30, /**< Set threshold to 3.0 V */ - NRF_POWER_POFTHRVDDH_V31 = POWER_POFCON_THRESHOLDVDDH_V31, /**< Set threshold to 3.1 V */ - NRF_POWER_POFTHRVDDH_V32 = POWER_POFCON_THRESHOLDVDDH_V32, /**< Set threshold to 3.2 V */ - NRF_POWER_POFTHRVDDH_V33 = POWER_POFCON_THRESHOLDVDDH_V33, /**< Set threshold to 3.3 V */ - NRF_POWER_POFTHRVDDH_V34 = POWER_POFCON_THRESHOLDVDDH_V34, /**< Set threshold to 3.4 V */ - NRF_POWER_POFTHRVDDH_V35 = POWER_POFCON_THRESHOLDVDDH_V35, /**< Set threshold to 3.5 V */ - NRF_POWER_POFTHRVDDH_V36 = POWER_POFCON_THRESHOLDVDDH_V36, /**< Set threshold to 3.6 V */ - NRF_POWER_POFTHRVDDH_V37 = POWER_POFCON_THRESHOLDVDDH_V37, /**< Set threshold to 3.7 V */ - NRF_POWER_POFTHRVDDH_V38 = POWER_POFCON_THRESHOLDVDDH_V38, /**< Set threshold to 3.8 V */ - NRF_POWER_POFTHRVDDH_V39 = POWER_POFCON_THRESHOLDVDDH_V39, /**< Set threshold to 3.9 V */ - NRF_POWER_POFTHRVDDH_V40 = POWER_POFCON_THRESHOLDVDDH_V40, /**< Set threshold to 4.0 V */ - NRF_POWER_POFTHRVDDH_V41 = POWER_POFCON_THRESHOLDVDDH_V41, /**< Set threshold to 4.1 V */ - NRF_POWER_POFTHRVDDH_V42 = POWER_POFCON_THRESHOLDVDDH_V42, /**< Set threshold to 4.2 V */ -}nrf_power_pof_thrvddh_t; - -/** - * @brief Main regulator status - */ -typedef enum -{ - NRF_POWER_MAINREGSTATUS_NORMAL = POWER_MAINREGSTATUS_MAINREGSTATUS_Normal, /**< Normal voltage mode. Voltage supplied on VDD. */ - NRF_POWER_MAINREGSTATUS_HIGH = POWER_MAINREGSTATUS_MAINREGSTATUS_High /**< High voltage mode. Voltage supplied on VDDH. */ -}nrf_power_mainregstatus_t; - -#endif /* NRF_POWER_HAS_VDDH */ - -#if NRF_POWER_HAS_RAMPOWER_REGS -/** - * @brief Bit positions for RAMPOWER register - * - * All possible bits described, even if they are not used in selected MCU. - */ -typedef enum -{ - /** Keep RAM section S0 ON in System ON mode */ - NRF_POWER_RAMPOWER_S0POWER = POWER_RAM_POWER_S0POWER_Pos, - NRF_POWER_RAMPOWER_S1POWER, /**< Keep RAM section S1 ON in System ON mode */ - NRF_POWER_RAMPOWER_S2POWER, /**< Keep RAM section S2 ON in System ON mode */ - NRF_POWER_RAMPOWER_S3POWER, /**< Keep RAM section S3 ON in System ON mode */ - NRF_POWER_RAMPOWER_S4POWER, /**< Keep RAM section S4 ON in System ON mode */ - NRF_POWER_RAMPOWER_S5POWER, /**< Keep RAM section S5 ON in System ON mode */ - NRF_POWER_RAMPOWER_S6POWER, /**< Keep RAM section S6 ON in System ON mode */ - NRF_POWER_RAMPOWER_S7POWER, /**< Keep RAM section S7 ON in System ON mode */ - NRF_POWER_RAMPOWER_S8POWER, /**< Keep RAM section S8 ON in System ON mode */ - NRF_POWER_RAMPOWER_S9POWER, /**< Keep RAM section S9 ON in System ON mode */ - NRF_POWER_RAMPOWER_S10POWER, /**< Keep RAM section S10 ON in System ON mode */ - NRF_POWER_RAMPOWER_S11POWER, /**< Keep RAM section S11 ON in System ON mode */ - NRF_POWER_RAMPOWER_S12POWER, /**< Keep RAM section S12 ON in System ON mode */ - NRF_POWER_RAMPOWER_S13POWER, /**< Keep RAM section S13 ON in System ON mode */ - NRF_POWER_RAMPOWER_S14POWER, /**< Keep RAM section S14 ON in System ON mode */ - NRF_POWER_RAMPOWER_S15POWER, /**< Keep RAM section S15 ON in System ON mode */ - - /** Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S0RETENTION = POWER_RAM_POWER_S0RETENTION_Pos, - NRF_POWER_RAMPOWER_S1RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S2RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S3RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S4RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S5RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S6RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S7RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S8RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S9RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S10RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S11RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S12RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S13RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S14RETENTION, /**< Keep section retention in OFF mode when section is OFF */ - NRF_POWER_RAMPOWER_S15RETENTION, /**< Keep section retention in OFF mode when section is OFF */ -}nrf_power_rampower_t; - -#if defined ( __CC_ARM ) -#pragma push -#pragma diag_suppress 66 -#endif -/** - * @brief Bit masks for RAMPOWER register - * - * All possible bits described, even if they are not used in selected MCU. - */ -typedef enum -{ - NRF_POWER_RAMPOWER_S0POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S0POWER , - NRF_POWER_RAMPOWER_S1POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S1POWER , - NRF_POWER_RAMPOWER_S2POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S2POWER , - NRF_POWER_RAMPOWER_S3POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S3POWER , - NRF_POWER_RAMPOWER_S4POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S4POWER , - NRF_POWER_RAMPOWER_S5POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S5POWER , - NRF_POWER_RAMPOWER_S7POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S7POWER , - NRF_POWER_RAMPOWER_S8POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S8POWER , - NRF_POWER_RAMPOWER_S9POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S9POWER , - NRF_POWER_RAMPOWER_S10POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S10POWER, - NRF_POWER_RAMPOWER_S11POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S11POWER, - NRF_POWER_RAMPOWER_S12POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S12POWER, - NRF_POWER_RAMPOWER_S13POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S13POWER, - NRF_POWER_RAMPOWER_S14POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S14POWER, - NRF_POWER_RAMPOWER_S15POWER_MASK = 1UL << NRF_POWER_RAMPOWER_S15POWER, - - NRF_POWER_RAMPOWER_S0RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S0RETENTION , - NRF_POWER_RAMPOWER_S1RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S1RETENTION , - NRF_POWER_RAMPOWER_S2RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S2RETENTION , - NRF_POWER_RAMPOWER_S3RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S3RETENTION , - NRF_POWER_RAMPOWER_S4RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S4RETENTION , - NRF_POWER_RAMPOWER_S5RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S5RETENTION , - NRF_POWER_RAMPOWER_S7RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S7RETENTION , - NRF_POWER_RAMPOWER_S8RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S8RETENTION , - NRF_POWER_RAMPOWER_S9RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S9RETENTION , - NRF_POWER_RAMPOWER_S10RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S10RETENTION, - NRF_POWER_RAMPOWER_S11RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S11RETENTION, - NRF_POWER_RAMPOWER_S12RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S12RETENTION, - NRF_POWER_RAMPOWER_S13RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S13RETENTION, - NRF_POWER_RAMPOWER_S14RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S14RETENTION, - NRF_POWER_RAMPOWER_S15RETENTION_MASK = 1UL << NRF_POWER_RAMPOWER_S15RETENTION, -}nrf_power_rampower_mask_t; -#if defined ( __CC_ARM ) -#pragma pop -#endif -#endif /* NRF_POWER_HAS_RAMPOWER_REGS */ - - -/** - * @brief Get reset reason mask - * - * Function returns the reset reason. - * Unless cleared, the RESETREAS register is cumulative. - * A field is cleared by writing '1' to it (see @ref nrf_power_resetreas_clear). - * If none of the reset sources are flagged, - * this indicates that the chip was reset from the on-chip reset generator, - * which indicates a power-on-reset or a brown out reset. - * - * @return The mask of reset reasons constructed with @ref nrf_power_resetreas_mask_t. - */ -__STATIC_INLINE uint32_t nrf_power_resetreas_get(void); - -/** - * @brief Clear selected reset reason field - * - * Function clears selected reset reason fields. - * - * @param[in] mask The mask constructed from @ref nrf_power_resetreas_mask_t enumerator values. - * @sa nrf_power_resetreas_get - */ -__STATIC_INLINE void nrf_power_resetreas_clear(uint32_t mask); - -#if NRF_POWER_HAS_RAMSTATUS -/** - * @brief Get RAMSTATUS register - * - * Returns the masks of RAM blocks that are powered ON. - * - * @return Value with bits sets according to masks in @ref nrf_power_ramblock_mask_t. - */ -__STATIC_INLINE uint32_t nrf_power_ramstatus_get(void); -#endif // NRF_POWER_HAS_RAMSTATUS - -/** - * @brief Go to system OFF - * - * This function puts the CPU into system off mode. - * The only way to wake up the CPU is by reset. - * - * @note This function never returns. - */ -__STATIC_INLINE void nrf_power_system_off(void); - -/** - * @brief Set power failure comparator configuration - * - * Sets power failure comparator threshold and enable/disable flag. - * - * @param enabled Set to true if power failure comparator should be enabled. - * @param thr Set the voltage threshold value. - * - * @note - * If VDDH settings is present in the device, this function would - * clear it settings (set to the lowest voltage). - * Use @ref nrf_power_pofcon_vddh_set function to set new value. - */ -__STATIC_INLINE void nrf_power_pofcon_set(bool enabled, nrf_power_pof_thr_t thr); - -/** - * @brief Get power failure comparator configuration - * - * Get power failure comparator threshold and enable bit. - * - * @param[out] p_enabled Function would set this boolean variable to true - * if power failure comparator is enabled. - * The pointer can be NULL if we do not need this information. - * @return Threshold setting for power failure comparator - */ -__STATIC_INLINE nrf_power_pof_thr_t nrf_power_pofcon_get(bool * p_enabled); - -#if NRF_POWER_HAS_VDDH -/** - * @brief Set VDDH power failure comparator threshold - * - * @param thr Threshold to be set - */ -__STATIC_INLINE void nrf_power_pofcon_vddh_set(nrf_power_pof_thrvddh_t thr); - -/** - * @brief Get VDDH power failure comparator threshold - * - * @return VDDH threshold currently configured - */ -__STATIC_INLINE nrf_power_pof_thrvddh_t nrf_power_pofcon_vddh_get(void); -#endif - -/** - * @brief Set general purpose retention register - * - * @param val Value to be set in the register - */ -__STATIC_INLINE void nrf_power_gpregret_set(uint8_t val); - -/** - * @brief Get general purpose retention register - * - * @return The value from the register - */ -__STATIC_INLINE uint8_t nrf_power_gpregret_get(void); - -#if defined(POWER_GPREGRET2_GPREGRET_Msk) || defined(__SDK_DOXYGEN__) -/** - * @brief Set general purpose retention register 2 - * - * @param val Value to be set in the register - * @note This register is not available in nrf51 MCU family - */ -__STATIC_INLINE void nrf_power_gpregret2_set(uint8_t val); - -/** - * @brief Get general purpose retention register 2 - * - * @return The value from the register - * @note This register is not available in all MCUs. - */ -__STATIC_INLINE uint8_t nrf_power_gpregret2_get(void); -#endif - -/** - * @brief Enable or disable DCDC converter - * - * @param enable Set true to enable or false to disable DCDC converter. - * - * @note - * If the device consist of high voltage power input (VDDH) this setting - * would relate to the converter on low voltage side (1.3 V output). - */ -__STATIC_INLINE void nrf_power_dcdcen_set(bool enable); - -/** - * @brief Get the state of DCDC converter - * - * @retval true Converter is enabled - * @retval false Converter is disabled - * - * @note - * If the device consist of high voltage power input (VDDH) this setting - * would relate to the converter on low voltage side (1.3 V output). - */ -__STATIC_INLINE bool nrf_power_dcdcen_get(void); - -#if NRF_POWER_HAS_RAMPOWER_REGS -/** - * @brief Turn ON sections in selected RAM block. - * - * This function turns ON sections in block and also block retention. - * - * @sa nrf_power_rampower_mask_t - * @sa nrf_power_rampower_mask_off - * - * @param block RAM block index. - * @param section_mask Mask of the sections created by merging - * @ref nrf_power_rampower_mask_t flags. - */ -__STATIC_INLINE void nrf_power_rampower_mask_on(uint8_t block, uint32_t section_mask); - -/** - * @brief Turn ON sections in selected RAM block. - * - * This function turns OFF sections in block and also block retention. - * - * @sa nrf_power_rampower_mask_t - * @sa nrf_power_rampower_mask_off - * - * @param block RAM block index. - * @param section_mask Mask of the sections created by merging - * @ref nrf_power_rampower_mask_t flags. - */ -__STATIC_INLINE void nrf_power_rampower_mask_off(uint8_t block, uint32_t section_mask); - -/** - * @brief Get the mask of ON and retention sections in selected RAM block. - * - * @param block RAM block index. - * @return Mask of sections state composed from @ref nrf_power_rampower_mask_t flags. - */ -__STATIC_INLINE uint32_t nrf_power_rampower_mask_get(uint8_t block); -#endif /* NRF_POWER_HAS_RAMPOWER_REGS */ - -#if NRF_POWER_HAS_VDDH -/** - * @brief Enable of disable DCDC converter on VDDH - * - * @param enable Set true to enable or false to disable DCDC converter. - */ -__STATIC_INLINE void nrf_power_dcdcen_vddh_set(bool enable); - -/** - * @brief Get the state of DCDC converter on VDDH - * - * @retval true Converter is enabled - * @retval false Converter is disabled - */ -__STATIC_INLINE bool nrf_power_dcdcen_vddh_get(void); - -/** - * @brief Get main supply status - * - * @return Current main supply status - */ -__STATIC_INLINE nrf_power_mainregstatus_t nrf_power_mainregstatus_get(void); -#endif /* NRF_POWER_HAS_VDDH */ - -#if NRF_POWER_HAS_USBREG -/** - * - * @return Get the whole USBREGSTATUS register - * - * @return The USBREGSTATUS register value. - * Use @ref nrf_power_usbregstatus_mask_t values for bit masking. - * - * @sa nrf_power_usbregstatus_vbusdet_get - * @sa nrf_power_usbregstatus_outrdy_get - */ -__STATIC_INLINE uint32_t nrf_power_usbregstatus_get(void); - -/** - * @brief VBUS input detection status - * - * USBDETECTED and USBREMOVED events are derived from this information - * - * @retval false VBUS voltage below valid threshold - * @retval true VBUS voltage above valid threshold - * - * @sa nrf_power_usbregstatus_get - */ -__STATIC_INLINE bool nrf_power_usbregstatus_vbusdet_get(void); - -/** - * @brief USB supply output settling time elapsed - * - * @retval false USBREG output settling time not elapsed - * @retval true USBREG output settling time elapsed - * (same information as USBPWRRDY event) - * - * @sa nrf_power_usbregstatus_get - */ -__STATIC_INLINE bool nrf_power_usbregstatus_outrdy_get(void); -#endif /* NRF_POWER_HAS_USBREG */ - -/** @} */ - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE uint32_t nrf_power_resetreas_get(void) -{ - return NRF_POWER->RESETREAS; -} - -__STATIC_INLINE void nrf_power_resetreas_clear(uint32_t mask) -{ - NRF_POWER->RESETREAS = mask; -} - -#if NRF_POWER_HAS_RAMSTATUS -__STATIC_INLINE uint32_t nrf_power_ramstatus_get(void) -{ - return NRF_POWER->RAMSTATUS; -} -#endif // NRF_POWER_HAS_RAMSTATUS - -__STATIC_INLINE void nrf_power_system_off(void) -{ - NRF_POWER->SYSTEMOFF = POWER_SYSTEMOFF_SYSTEMOFF_Enter; - __DSB(); - - /* Solution for simulated System OFF in debug mode */ - while (true) - { - __WFE(); - } -} - -__STATIC_INLINE void nrf_power_pofcon_set(bool enabled, nrf_power_pof_thr_t thr) -{ - ASSERT(thr == (thr & (POWER_POFCON_THRESHOLD_Msk >> POWER_POFCON_THRESHOLD_Pos))); -#if NRF_POWER_HAS_VDDH - uint32_t pofcon = NRF_POWER->POFCON; - pofcon &= ~(POWER_POFCON_THRESHOLD_Msk | POWER_POFCON_POF_Msk); - pofcon |= -#else /* NRF_POWER_HAS_VDDH */ - NRF_POWER->POFCON = -#endif - (((uint32_t)thr) << POWER_POFCON_THRESHOLD_Pos) | - (enabled ? - (POWER_POFCON_POF_Enabled << POWER_POFCON_POF_Pos) - : - (POWER_POFCON_POF_Disabled << POWER_POFCON_POF_Pos)); -#if NRF_POWER_HAS_VDDH - NRF_POWER->POFCON = pofcon; -#endif -} - -__STATIC_INLINE nrf_power_pof_thr_t nrf_power_pofcon_get(bool * p_enabled) -{ - uint32_t pofcon = NRF_POWER->POFCON; - if (NULL != p_enabled) - { - (*p_enabled) = ((pofcon & POWER_POFCON_POF_Msk) >> POWER_POFCON_POF_Pos) - == POWER_POFCON_POF_Enabled; - } - return (nrf_power_pof_thr_t)((pofcon & POWER_POFCON_THRESHOLD_Msk) >> - POWER_POFCON_THRESHOLD_Pos); -} - -#if NRF_POWER_HAS_VDDH -__STATIC_INLINE void nrf_power_pofcon_vddh_set(nrf_power_pof_thrvddh_t thr) -{ - ASSERT(thr == (thr & (POWER_POFCON_THRESHOLDVDDH_Msk >> POWER_POFCON_THRESHOLDVDDH_Pos))); - uint32_t pofcon = NRF_POWER->POFCON; - pofcon &= ~POWER_POFCON_THRESHOLDVDDH_Msk; - pofcon |= (((uint32_t)thr) << POWER_POFCON_THRESHOLDVDDH_Pos); - NRF_POWER->POFCON = pofcon; -} - -__STATIC_INLINE nrf_power_pof_thrvddh_t nrf_power_pofcon_vddh_get(void) -{ - return (nrf_power_pof_thrvddh_t)((NRF_POWER->POFCON & - POWER_POFCON_THRESHOLDVDDH_Msk) >> POWER_POFCON_THRESHOLDVDDH_Pos); -} -#endif /* NRF_POWER_HAS_VDDH */ - -__STATIC_INLINE void nrf_power_gpregret_set(uint8_t val) -{ - NRF_POWER->GPREGRET = val; -} - -__STATIC_INLINE uint8_t nrf_power_gpregret_get(void) -{ - return NRF_POWER->GPREGRET; -} - -#if defined(POWER_GPREGRET2_GPREGRET_Msk) || defined(__SDK_DOXYGEN__) -void nrf_power_gpregret2_set(uint8_t val) -{ - NRF_POWER->GPREGRET2 = val; -} - -__STATIC_INLINE uint8_t nrf_power_gpregret2_get(void) -{ - return NRF_POWER->GPREGRET2; -} -#endif - -__STATIC_INLINE void nrf_power_dcdcen_set(bool enable) -{ -#if NRF_POWER_HAS_VDDH - NRF_POWER->DCDCEN = (enable ? - POWER_DCDCEN_DCDCEN_Enabled : POWER_DCDCEN_DCDCEN_Disabled) << - POWER_DCDCEN_DCDCEN_Pos; -#else - NRF_POWER->DCDCEN = (enable ? - POWER_DCDCEN_DCDCEN_Enabled : POWER_DCDCEN_DCDCEN_Disabled) << - POWER_DCDCEN_DCDCEN_Pos; -#endif -} - -__STATIC_INLINE bool nrf_power_dcdcen_get(void) -{ -#if NRF_POWER_HAS_VDDH - return (NRF_POWER->DCDCEN & POWER_DCDCEN_DCDCEN_Msk) - == - (POWER_DCDCEN_DCDCEN_Enabled << POWER_DCDCEN_DCDCEN_Pos); -#else - return (NRF_POWER->DCDCEN & POWER_DCDCEN_DCDCEN_Msk) - == - (POWER_DCDCEN_DCDCEN_Enabled << POWER_DCDCEN_DCDCEN_Pos); -#endif -} - -#if NRF_POWER_HAS_RAMPOWER_REGS -__STATIC_INLINE void nrf_power_rampower_mask_on(uint8_t block, uint32_t section_mask) -{ - ASSERT(block < ARRAY_SIZE(NRF_POWER->RAM)); - NRF_POWER->RAM[block].POWERSET = section_mask; -} - -__STATIC_INLINE void nrf_power_rampower_mask_off(uint8_t block, uint32_t section_mask) -{ - ASSERT(block < ARRAY_SIZE(NRF_POWER->RAM)); - NRF_POWER->RAM[block].POWERCLR = section_mask; -} - -__STATIC_INLINE uint32_t nrf_power_rampower_mask_get(uint8_t block) -{ - ASSERT(block < ARRAY_SIZE(NRF_POWER->RAM)); - return NRF_POWER->RAM[block].POWER; -} -#endif /* NRF_POWER_HAS_RAMPOWER_REGS */ - -#if NRF_POWER_HAS_VDDH -__STATIC_INLINE void nrf_power_dcdcen_vddh_set(bool enable) -{ - NRF_POWER->DCDCEN0 = (enable ? - POWER_DCDCEN0_DCDCEN_Enabled : POWER_DCDCEN0_DCDCEN_Disabled) << - POWER_DCDCEN0_DCDCEN_Pos; -} - -bool nrf_power_dcdcen_vddh_get(void) -{ - return (NRF_POWER->DCDCEN0 & POWER_DCDCEN0_DCDCEN_Msk) - == - (POWER_DCDCEN0_DCDCEN_Enabled << POWER_DCDCEN0_DCDCEN_Pos); -} - -nrf_power_mainregstatus_t nrf_power_mainregstatus_get(void) -{ - return (nrf_power_mainregstatus_t)(((NRF_POWER->MAINREGSTATUS) & - POWER_MAINREGSTATUS_MAINREGSTATUS_Msk) >> - POWER_MAINREGSTATUS_MAINREGSTATUS_Pos); -} -#endif /* NRF_POWER_HAS_VDDH */ - -#if NRF_POWER_HAS_USBREG -__STATIC_INLINE uint32_t nrf_power_usbregstatus_get(void) -{ - return NRF_POWER->USBREGSTATUS; -} - -__STATIC_INLINE bool nrf_power_usbregstatus_vbusdet_get(void) -{ - return (nrf_power_usbregstatus_get() & - NRF_POWER_USBREGSTATUS_VBUSDETECT_MASK) != 0; -} - -__STATIC_INLINE bool nrf_power_usbregstatus_outrdy_get(void) -{ - return (nrf_power_usbregstatus_get() & - NRF_POWER_USBREGSTATUS_OUTPUTRDY_MASK) != 0; -} -#endif /* NRF_POWER_HAS_USBREG */ - -#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_POWER_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_ppi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_ppi.h deleted file mode 100644 index 945fedc2d8a..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_ppi.h +++ /dev/null @@ -1,439 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_PPI_H__ -#define NRF_PPI_H__ - -#include -#include "nrf.h" -#include "nrf_peripherals.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup nrf_ppi_hal PPI HAL - * @{ - * @ingroup nrf_ppi - * @brief Hardware access layer for setting up Programmable Peripheral Interconnect (PPI) channels. - */ - -#define NRF_PPI_TASK_SET (1UL) - -/** - * @enum nrf_ppi_channel_t - * @brief PPI channels. - */ -typedef enum -{ - NRF_PPI_CHANNEL0 = PPI_CHEN_CH0_Pos, /**< Channel 0. */ - NRF_PPI_CHANNEL1 = PPI_CHEN_CH1_Pos, /**< Channel 1. */ - NRF_PPI_CHANNEL2 = PPI_CHEN_CH2_Pos, /**< Channel 2. */ - NRF_PPI_CHANNEL3 = PPI_CHEN_CH3_Pos, /**< Channel 3. */ - NRF_PPI_CHANNEL4 = PPI_CHEN_CH4_Pos, /**< Channel 4. */ - NRF_PPI_CHANNEL5 = PPI_CHEN_CH5_Pos, /**< Channel 5. */ - NRF_PPI_CHANNEL6 = PPI_CHEN_CH6_Pos, /**< Channel 6. */ - NRF_PPI_CHANNEL7 = PPI_CHEN_CH7_Pos, /**< Channel 7. */ - NRF_PPI_CHANNEL8 = PPI_CHEN_CH8_Pos, /**< Channel 8. */ - NRF_PPI_CHANNEL9 = PPI_CHEN_CH9_Pos, /**< Channel 9. */ - NRF_PPI_CHANNEL10 = PPI_CHEN_CH10_Pos, /**< Channel 10. */ - NRF_PPI_CHANNEL11 = PPI_CHEN_CH11_Pos, /**< Channel 11. */ - NRF_PPI_CHANNEL12 = PPI_CHEN_CH12_Pos, /**< Channel 12. */ - NRF_PPI_CHANNEL13 = PPI_CHEN_CH13_Pos, /**< Channel 13. */ - NRF_PPI_CHANNEL14 = PPI_CHEN_CH14_Pos, /**< Channel 14. */ - NRF_PPI_CHANNEL15 = PPI_CHEN_CH15_Pos, /**< Channel 15. */ -#if (PPI_CH_NUM > 16) || defined(__SDK_DOXYGEN__) - NRF_PPI_CHANNEL16 = PPI_CHEN_CH16_Pos, /**< Channel 16. */ - NRF_PPI_CHANNEL17 = PPI_CHEN_CH17_Pos, /**< Channel 17. */ - NRF_PPI_CHANNEL18 = PPI_CHEN_CH18_Pos, /**< Channel 18. */ - NRF_PPI_CHANNEL19 = PPI_CHEN_CH19_Pos, /**< Channel 19. */ -#endif - NRF_PPI_CHANNEL20 = PPI_CHEN_CH20_Pos, /**< Channel 20. */ - NRF_PPI_CHANNEL21 = PPI_CHEN_CH21_Pos, /**< Channel 21. */ - NRF_PPI_CHANNEL22 = PPI_CHEN_CH22_Pos, /**< Channel 22. */ - NRF_PPI_CHANNEL23 = PPI_CHEN_CH23_Pos, /**< Channel 23. */ - NRF_PPI_CHANNEL24 = PPI_CHEN_CH24_Pos, /**< Channel 24. */ - NRF_PPI_CHANNEL25 = PPI_CHEN_CH25_Pos, /**< Channel 25. */ - NRF_PPI_CHANNEL26 = PPI_CHEN_CH26_Pos, /**< Channel 26. */ - NRF_PPI_CHANNEL27 = PPI_CHEN_CH27_Pos, /**< Channel 27. */ - NRF_PPI_CHANNEL28 = PPI_CHEN_CH28_Pos, /**< Channel 28. */ - NRF_PPI_CHANNEL29 = PPI_CHEN_CH29_Pos, /**< Channel 29. */ - NRF_PPI_CHANNEL30 = PPI_CHEN_CH30_Pos, /**< Channel 30. */ - NRF_PPI_CHANNEL31 = PPI_CHEN_CH31_Pos /**< Channel 31. */ -} nrf_ppi_channel_t; - -/** - * @enum nrf_ppi_channel_group_t - * @brief PPI channel groups. - */ -typedef enum -{ - NRF_PPI_CHANNEL_GROUP0 = 0, /**< Channel group 0. */ - NRF_PPI_CHANNEL_GROUP1 = 1, /**< Channel group 1. */ - NRF_PPI_CHANNEL_GROUP2 = 2, /**< Channel group 2. */ - NRF_PPI_CHANNEL_GROUP3 = 3, /**< Channel group 3. */ -#if (PPI_GROUP_NUM > 4) || defined(__SDK_DOXYGEN__) - NRF_PPI_CHANNEL_GROUP4 = 4, /**< Channel group 4. */ - NRF_PPI_CHANNEL_GROUP5 = 5 /**< Channel group 5. */ -#endif -} nrf_ppi_channel_group_t; - -/** - * @enum nrf_ppi_channel_include_t - * @brief Definition of which PPI channels belong to a group. - */ -typedef enum -{ - NRF_PPI_CHANNEL_EXCLUDE = PPI_CHG_CH0_Excluded, /**< Channel excluded from a group. */ - NRF_PPI_CHANNEL_INCLUDE = PPI_CHG_CH0_Included /**< Channel included in a group. */ -} nrf_ppi_channel_include_t; - -/** - * @enum nrf_ppi_channel_enable_t - * @brief Definition if a PPI channel is enabled. - */ -typedef enum -{ - NRF_PPI_CHANNEL_DISABLED = PPI_CHEN_CH0_Disabled, /**< Channel disabled. */ - NRF_PPI_CHANNEL_ENABLED = PPI_CHEN_CH0_Enabled /**< Channel enabled. */ -} nrf_ppi_channel_enable_t; - -/** - * @enum nrf_ppi_task_t - * @brief PPI tasks. - */ -typedef enum -{ - /*lint -save -e30 -esym(628,__INTADDR__)*/ - NRF_PPI_TASK_CHG0_EN = offsetof(NRF_PPI_Type, TASKS_CHG[0].EN), /**< Task for enabling channel group 0 */ - NRF_PPI_TASK_CHG0_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[0].DIS), /**< Task for disabling channel group 0 */ - NRF_PPI_TASK_CHG1_EN = offsetof(NRF_PPI_Type, TASKS_CHG[1].EN), /**< Task for enabling channel group 1 */ - NRF_PPI_TASK_CHG1_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[1].DIS), /**< Task for disabling channel group 1 */ - NRF_PPI_TASK_CHG2_EN = offsetof(NRF_PPI_Type, TASKS_CHG[2].EN), /**< Task for enabling channel group 2 */ - NRF_PPI_TASK_CHG2_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[2].DIS), /**< Task for disabling channel group 2 */ - NRF_PPI_TASK_CHG3_EN = offsetof(NRF_PPI_Type, TASKS_CHG[3].EN), /**< Task for enabling channel group 3 */ - NRF_PPI_TASK_CHG3_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[3].DIS), /**< Task for disabling channel group 3 */ -#if (PPI_GROUP_NUM > 4) || defined(__SDK_DOXYGEN__) - NRF_PPI_TASK_CHG4_EN = offsetof(NRF_PPI_Type, TASKS_CHG[4].EN), /**< Task for enabling channel group 4 */ - NRF_PPI_TASK_CHG4_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[4].DIS), /**< Task for disabling channel group 4 */ - NRF_PPI_TASK_CHG5_EN = offsetof(NRF_PPI_Type, TASKS_CHG[5].EN), /**< Task for enabling channel group 5 */ - NRF_PPI_TASK_CHG5_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[5].DIS) /**< Task for disabling channel group 5 */ -#endif - /*lint -restore*/ -} nrf_ppi_task_t; - -/** - * @brief Function for enabling a given PPI channel. - * - * @details This function enables only one channel. - * - * @param[in] channel Channel to enable. - * - * */ -__STATIC_INLINE void nrf_ppi_channel_enable(nrf_ppi_channel_t channel) -{ - NRF_PPI->CHENSET = PPI_CHENSET_CH0_Set << ((uint32_t) channel); -} - - -/** - * @brief Function for disabling a given PPI channel. - * - * @details This function disables only one channel. - * - * @param[in] channel Channel to disable. - */ -__STATIC_INLINE void nrf_ppi_channel_disable(nrf_ppi_channel_t channel) -{ - NRF_PPI->CHENCLR = PPI_CHENCLR_CH0_Clear << ((uint32_t) channel); -} - - -/** - * @brief Function for checking if a given PPI channel is enabled. - * - * @details This function checks only one channel. - * - * @param[in] channel Channel to check. - * - * @retval NRF_PPI_CHANNEL_ENABLED If the channel is enabled. - * @retval NRF_PPI_CHANNEL_DISABLED If the channel is not enabled. - * - */ -__STATIC_INLINE nrf_ppi_channel_enable_t nrf_ppi_channel_enable_get(nrf_ppi_channel_t channel) -{ - if (NRF_PPI->CHEN & (PPI_CHEN_CH0_Msk << ((uint32_t) channel))) - { - return NRF_PPI_CHANNEL_ENABLED; - } - else - { - return NRF_PPI_CHANNEL_DISABLED; - } -} - - -/** - * @brief Function for disabling all PPI channels. - */ -__STATIC_INLINE void nrf_ppi_channel_disable_all(void) -{ - NRF_PPI->CHENCLR = ((uint32_t)0xFFFFFFFFuL); -} - -/** - * @brief Function for disabling multiple PPI channels. - * - * @param[in] mask Channel mask. - */ -__STATIC_INLINE void nrf_ppi_channels_disable(uint32_t mask) -{ - NRF_PPI->CHENCLR = mask; -} - -/** - * @brief Function for setting up event and task endpoints for a given PPI channel. - * - * @param[in] eep Event register address. - * - * @param[in] tep Task register address. - * - * @param[in] channel Channel to which the given endpoints are assigned. - */ -__STATIC_INLINE void nrf_ppi_channel_endpoint_setup(nrf_ppi_channel_t channel, - uint32_t eep, - uint32_t tep) -{ - NRF_PPI->CH[(uint32_t) channel].EEP = eep; - NRF_PPI->CH[(uint32_t) channel].TEP = tep; -} - -#if defined(PPI_FEATURE_FORKS_PRESENT) || defined(__SDK_DOXYGEN__) -/** - * @brief Function for setting up task endpoint for a given PPI fork. - * - * @param[in] fork_tep Task register address. - * - * @param[in] channel Channel to which the given fork endpoint is assigned. - */ -__STATIC_INLINE void nrf_ppi_fork_endpoint_setup(nrf_ppi_channel_t channel, - uint32_t fork_tep) -{ - NRF_PPI->FORK[(uint32_t) channel].TEP = fork_tep; -} - -/** - * @brief Function for setting up event and task endpoints for a given PPI channel and fork. - * - * @param[in] eep Event register address. - * - * @param[in] tep Task register address. - * - * @param[in] fork_tep Fork task register address (register value). - * - * @param[in] channel Channel to which the given endpoints are assigned. - */ -__STATIC_INLINE void nrf_ppi_channel_and_fork_endpoint_setup(nrf_ppi_channel_t channel, - uint32_t eep, - uint32_t tep, - uint32_t fork_tep) -{ - nrf_ppi_channel_endpoint_setup(channel, eep, tep); - nrf_ppi_fork_endpoint_setup(channel, fork_tep); -} -#endif - -/** - * @brief Function for including a PPI channel in a channel group. - * - * @details This function adds only one channel to the group. - * - * @param[in] channel Channel to be included in the group. - * - * @param[in] channel_group Channel group. - * - */ -__STATIC_INLINE void nrf_ppi_channel_include_in_group(nrf_ppi_channel_t channel, - nrf_ppi_channel_group_t channel_group) -{ - NRF_PPI->CHG[(uint32_t) channel_group] = - NRF_PPI->CHG[(uint32_t) channel_group] | (PPI_CHG_CH0_Included << ((uint32_t) channel)); -} - -/** - * @brief Function for including multiple PPI channels in a channel group. - * - * @details This function adds all specified channels to the group. - * - * @param[in] channel_mask Channels to be included in the group. - * - * @param[in] channel_group Channel group. - * - */ -__STATIC_INLINE void nrf_ppi_channels_include_in_group(uint32_t channel_mask, - nrf_ppi_channel_group_t channel_group) -{ - NRF_PPI->CHG[(uint32_t) channel_group] = - NRF_PPI->CHG[(uint32_t) channel_group] | (channel_mask); -} - - -/** - * @brief Function for removing a PPI channel from a channel group. - * - * @details This function removes only one channel from the group. - * - * @param[in] channel Channel to be removed from the group. - * - * @param[in] channel_group Channel group. - */ -__STATIC_INLINE void nrf_ppi_channel_remove_from_group(nrf_ppi_channel_t channel, - nrf_ppi_channel_group_t channel_group) -{ - NRF_PPI->CHG[(uint32_t) channel_group] = - NRF_PPI->CHG[(uint32_t) channel_group] & ~(PPI_CHG_CH0_Included << ((uint32_t) channel)); -} - -/** - * @brief Function for removing multiple PPI channels from a channel group. - * - * @details This function removes all specified channels from the group. - * - * @param[in] channel_mask Channels to be removed from the group. - * - * @param[in] channel_group Channel group. - */ -__STATIC_INLINE void nrf_ppi_channels_remove_from_group(uint32_t channel_mask, - nrf_ppi_channel_group_t channel_group) -{ - NRF_PPI->CHG[(uint32_t) channel_group] = - NRF_PPI->CHG[(uint32_t) channel_group] & ~(channel_mask); -} - - -/** - * @brief Function for removing all PPI channels from a channel group. - * - * @param[in] group Channel group. - * - */ -__STATIC_INLINE void nrf_ppi_channel_group_clear(nrf_ppi_channel_group_t group) -{ - NRF_PPI->CHG[(uint32_t) group] = 0; -} - - -/** - * @brief Function for enabling a channel group. - * - * @param[in] group Channel group. - * - */ -__STATIC_INLINE void nrf_ppi_group_enable(nrf_ppi_channel_group_t group) -{ - NRF_PPI->TASKS_CHG[(uint32_t) group].EN = NRF_PPI_TASK_SET; -} - - -/** - * @brief Function for disabling a channel group. - * - * @param[in] group Channel group. - * - */ -__STATIC_INLINE void nrf_ppi_group_disable(nrf_ppi_channel_group_t group) -{ - NRF_PPI->TASKS_CHG[(uint32_t) group].DIS = NRF_PPI_TASK_SET; -} - - -/** - * @brief Function for setting a PPI task. - * - * @param[in] ppi_task PPI task to set. - */ -__STATIC_INLINE void nrf_ppi_task_trigger(nrf_ppi_task_t ppi_task) -{ - *((volatile uint32_t *) ((uint8_t *) NRF_PPI_BASE + (uint32_t) ppi_task)) = NRF_PPI_TASK_SET; -} - - -/** - * @brief Function for returning the address of a specific PPI task register. - * - * @param[in] ppi_task PPI task. - */ -__STATIC_INLINE uint32_t * nrf_ppi_task_address_get(nrf_ppi_task_t ppi_task) -{ - return (uint32_t *) ((uint8_t *) NRF_PPI_BASE + (uint32_t) ppi_task); -} - -/** - * @brief Function for returning the PPI enable task address of a specific group. - * - * @param[in] group PPI group. - */ -__STATIC_INLINE uint32_t * nrf_ppi_task_group_enable_address_get(nrf_ppi_channel_group_t group) -{ - return (uint32_t *) &NRF_PPI->TASKS_CHG[(uint32_t) group].EN; -} - -/** - * @brief Function for returning the PPI disable task address of a specific group. - * - * @param[in] group PPI group. - */ -__STATIC_INLINE uint32_t * nrf_ppi_task_group_disable_address_get(nrf_ppi_channel_group_t group) -{ - return (uint32_t *) &NRF_PPI->TASKS_CHG[(uint32_t) group].DIS; -} - - -/** - *@} - **/ - -/*lint --flb "Leave library region" */ - -#ifdef __cplusplus -} -#endif - -#endif // NRF_PPI_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_pwm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_pwm.h deleted file mode 100644 index 710f307e27d..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_pwm.h +++ /dev/null @@ -1,701 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @defgroup nrf_pwm_hal PWM HAL - * @{ - * @ingroup nrf_pwm - * - * @brief @tagAPI52 Hardware access layer for managing the Pulse Width Modulation (PWM) - * peripheral. - */ - -#ifndef NRF_PWM_H__ -#define NRF_PWM_H__ - -#include -#include -#include - -#include "nrf.h" -#include "nrf_assert.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -/** - * @brief This value can be provided as a parameter for the @ref nrf_pwm_pins_set - * function call to specify that a given output channel shall not be - * connected to a physical pin. - */ -#define NRF_PWM_PIN_NOT_CONNECTED 0xFFFFFFFF - -/** - * @brief Number of channels in each Pointer to the peripheral registers structure. - */ -#define NRF_PWM_CHANNEL_COUNT 4 - - -/** - * @brief PWM tasks. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_PWM_TASK_STOP = offsetof(NRF_PWM_Type, TASKS_STOP), ///< Stops PWM pulse generation on all channels at the end of the current PWM period, and stops the sequence playback. - NRF_PWM_TASK_SEQSTART0 = offsetof(NRF_PWM_Type, TASKS_SEQSTART[0]), ///< Starts playback of sequence 0. - NRF_PWM_TASK_SEQSTART1 = offsetof(NRF_PWM_Type, TASKS_SEQSTART[1]), ///< Starts playback of sequence 1. - NRF_PWM_TASK_NEXTSTEP = offsetof(NRF_PWM_Type, TASKS_NEXTSTEP) ///< Steps by one value in the current sequence if the decoder is set to @ref NRF_PWM_STEP_TRIGGERED mode. - /*lint -restore*/ -} nrf_pwm_task_t; - -/** - * @brief PWM events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_PWM_EVENT_STOPPED = offsetof(NRF_PWM_Type, EVENTS_STOPPED), ///< Response to STOP task, emitted when PWM pulses are no longer generated. - NRF_PWM_EVENT_SEQSTARTED0 = offsetof(NRF_PWM_Type, EVENTS_SEQSTARTED[0]), ///< First PWM period started on sequence 0. - NRF_PWM_EVENT_SEQSTARTED1 = offsetof(NRF_PWM_Type, EVENTS_SEQSTARTED[1]), ///< First PWM period started on sequence 1. - NRF_PWM_EVENT_SEQEND0 = offsetof(NRF_PWM_Type, EVENTS_SEQEND[0]), ///< Emitted at the end of every sequence 0 when its last value has been read from RAM. - NRF_PWM_EVENT_SEQEND1 = offsetof(NRF_PWM_Type, EVENTS_SEQEND[1]), ///< Emitted at the end of every sequence 1 when its last value has been read from RAM. - NRF_PWM_EVENT_PWMPERIODEND = offsetof(NRF_PWM_Type, EVENTS_PWMPERIODEND), ///< Emitted at the end of each PWM period. - NRF_PWM_EVENT_LOOPSDONE = offsetof(NRF_PWM_Type, EVENTS_LOOPSDONE) ///< Concatenated sequences have been played the requested number of times. - /*lint -restore*/ -} nrf_pwm_event_t; - -/** - * @brief PWM interrupts. - */ -typedef enum -{ - NRF_PWM_INT_STOPPED_MASK = PWM_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event. - NRF_PWM_INT_SEQSTARTED0_MASK = PWM_INTENSET_SEQSTARTED0_Msk, ///< Interrupt on SEQSTARTED[0] event. - NRF_PWM_INT_SEQSTARTED1_MASK = PWM_INTENSET_SEQSTARTED1_Msk, ///< Interrupt on SEQSTARTED[1] event. - NRF_PWM_INT_SEQEND0_MASK = PWM_INTENSET_SEQEND0_Msk, ///< Interrupt on SEQEND[0] event. - NRF_PWM_INT_SEQEND1_MASK = PWM_INTENSET_SEQEND1_Msk, ///< Interrupt on SEQEND[1] event. - NRF_PWM_INT_PWMPERIODEND_MASK = PWM_INTENSET_PWMPERIODEND_Msk, ///< Interrupt on PWMPERIODEND event. - NRF_PWM_INT_LOOPSDONE_MASK = PWM_INTENSET_LOOPSDONE_Msk ///< Interrupt on LOOPSDONE event. -} nrf_pwm_int_mask_t; - -/** - * @brief PWM shortcuts. - */ -typedef enum -{ - NRF_PWM_SHORT_SEQEND0_STOP_MASK = PWM_SHORTS_SEQEND0_STOP_Msk, ///< Shortcut between SEQEND[0] event and STOP task. - NRF_PWM_SHORT_SEQEND1_STOP_MASK = PWM_SHORTS_SEQEND1_STOP_Msk, ///< Shortcut between SEQEND[1] event and STOP task. - NRF_PWM_SHORT_LOOPSDONE_SEQSTART0_MASK = PWM_SHORTS_LOOPSDONE_SEQSTART0_Msk, ///< Shortcut between LOOPSDONE event and SEQSTART[0] task. - NRF_PWM_SHORT_LOOPSDONE_SEQSTART1_MASK = PWM_SHORTS_LOOPSDONE_SEQSTART1_Msk, ///< Shortcut between LOOPSDONE event and SEQSTART[1] task. - NRF_PWM_SHORT_LOOPSDONE_STOP_MASK = PWM_SHORTS_LOOPSDONE_STOP_Msk ///< Shortcut between LOOPSDONE event and STOP task. -} nrf_pwm_short_mask_t; - -/** - * @brief PWM modes of operation. - */ -typedef enum -{ - NRF_PWM_MODE_UP = PWM_MODE_UPDOWN_Up, ///< Up counter (edge-aligned PWM duty cycle). - NRF_PWM_MODE_UP_AND_DOWN = PWM_MODE_UPDOWN_UpAndDown, ///< Up and down counter (center-aligned PWM duty cycle). -} nrf_pwm_mode_t; - -/** - * @brief PWM base clock frequencies. - */ -typedef enum -{ - NRF_PWM_CLK_16MHz = PWM_PRESCALER_PRESCALER_DIV_1, ///< 16 MHz / 1 = 16 MHz. - NRF_PWM_CLK_8MHz = PWM_PRESCALER_PRESCALER_DIV_2, ///< 16 MHz / 2 = 8 MHz. - NRF_PWM_CLK_4MHz = PWM_PRESCALER_PRESCALER_DIV_4, ///< 16 MHz / 4 = 4 MHz. - NRF_PWM_CLK_2MHz = PWM_PRESCALER_PRESCALER_DIV_8, ///< 16 MHz / 8 = 2 MHz. - NRF_PWM_CLK_1MHz = PWM_PRESCALER_PRESCALER_DIV_16, ///< 16 MHz / 16 = 1 MHz. - NRF_PWM_CLK_500kHz = PWM_PRESCALER_PRESCALER_DIV_32, ///< 16 MHz / 32 = 500 kHz. - NRF_PWM_CLK_250kHz = PWM_PRESCALER_PRESCALER_DIV_64, ///< 16 MHz / 64 = 250 kHz. - NRF_PWM_CLK_125kHz = PWM_PRESCALER_PRESCALER_DIV_128 ///< 16 MHz / 128 = 125 kHz. -} nrf_pwm_clk_t; - -/** - * @brief PWM decoder load modes. - * - * The selected mode determines how the sequence data is read from RAM and - * spread to the compare registers. - */ -typedef enum -{ - NRF_PWM_LOAD_COMMON = PWM_DECODER_LOAD_Common, ///< 1st half word (16-bit) used in all PWM channels (0-3). - NRF_PWM_LOAD_GROUPED = PWM_DECODER_LOAD_Grouped, ///< 1st half word (16-bit) used in channels 0 and 1; 2nd word in channels 2 and 3. - NRF_PWM_LOAD_INDIVIDUAL = PWM_DECODER_LOAD_Individual, ///< 1st half word (16-bit) used in channel 0; 2nd in channel 1; 3rd in channel 2; 4th in channel 3. - NRF_PWM_LOAD_WAVE_FORM = PWM_DECODER_LOAD_WaveForm ///< 1st half word (16-bit) used in channel 0; 2nd in channel 1; ... ; 4th as the top value for the pulse generator counter. -} nrf_pwm_dec_load_t; - -/** - * @brief PWM decoder next step modes. - * - * The selected mode determines when the next value from the active sequence - * is loaded. - */ -typedef enum -{ - NRF_PWM_STEP_AUTO = PWM_DECODER_MODE_RefreshCount, ///< Automatically after the current value is played and repeated the requested number of times. - NRF_PWM_STEP_TRIGGERED = PWM_DECODER_MODE_NextStep ///< When the @ref NRF_PWM_TASK_NEXTSTEP task is triggered. -} nrf_pwm_dec_step_t; - - -/** - * @brief Type used for defining duty cycle values for a sequence - * loaded in @ref NRF_PWM_LOAD_COMMON mode. - */ -typedef uint16_t nrf_pwm_values_common_t; - -/** - * @brief Structure for defining duty cycle values for a sequence - * loaded in @ref NRF_PWM_LOAD_GROUPED mode. - */ -typedef struct { - uint16_t group_0; ///< Duty cycle value for group 0 (channels 0 and 1). - uint16_t group_1; ///< Duty cycle value for group 1 (channels 2 and 3). -} nrf_pwm_values_grouped_t; - -/** - * @brief Structure for defining duty cycle values for a sequence - * loaded in @ref NRF_PWM_LOAD_INDIVIDUAL mode. - */ -typedef struct -{ - uint16_t channel_0; ///< Duty cycle value for channel 0. - uint16_t channel_1; ///< Duty cycle value for channel 1. - uint16_t channel_2; ///< Duty cycle value for channel 2. - uint16_t channel_3; ///< Duty cycle value for channel 3. -} nrf_pwm_values_individual_t; - -/** - * @brief Structure for defining duty cycle values for a sequence - * loaded in @ref NRF_PWM_LOAD_WAVE_FORM mode. - */ -typedef struct { - uint16_t channel_0; ///< Duty cycle value for channel 0. - uint16_t channel_1; ///< Duty cycle value for channel 1. - uint16_t channel_2; ///< Duty cycle value for channel 2. - uint16_t counter_top; ///< Top value for the pulse generator counter. -} nrf_pwm_values_wave_form_t; - -/** - * @brief Union grouping pointers to arrays of duty cycle values applicable to - * various loading modes. - */ -typedef union { - nrf_pwm_values_common_t const * p_common; ///< Pointer to be used in @ref NRF_PWM_LOAD_COMMON mode. - nrf_pwm_values_grouped_t const * p_grouped; ///< Pointer to be used in @ref NRF_PWM_LOAD_GROUPED mode. - nrf_pwm_values_individual_t const * p_individual; ///< Pointer to be used in @ref NRF_PWM_LOAD_INDIVIDUAL mode. - nrf_pwm_values_wave_form_t const * p_wave_form; ///< Pointer to be used in @ref NRF_PWM_LOAD_WAVE_FORM mode. - uint16_t const * p_raw; ///< Pointer providing raw access to the values. -} nrf_pwm_values_t; - -/** - * @brief Structure for defining a sequence of PWM duty cycles. - * - * When the sequence is set (by a call to @ref nrf_pwm_sequence_set), the - * provided duty cycle values are not copied. The @p values pointer is stored - * in the peripheral's internal register, and the values are loaded from RAM - * during the sequence playback. Therefore, you must ensure that the values - * do not change before and during the sequence playback (for example, - * the values cannot be placed in a local variable that is allocated on stack). - * If the sequence is played in a loop and the values should be updated - * before the next iteration, it is safe to modify them when the corresponding - * event signaling the end of sequence occurs (@ref NRF_PWM_EVENT_SEQEND0 - * or @ref NRF_PWM_EVENT_SEQEND1, respectively). - * - * @note The @p repeats and @p end_delay values (which are written to the - * SEQ[n].REFRESH and SEQ[n].ENDDELAY registers in the peripheral, - * respectively) are ignored at the end of a complex sequence - * playback, indicated by the LOOPSDONE event. - * See the @linkProductSpecification52 for more information. - */ -typedef struct -{ - nrf_pwm_values_t values; ///< Pointer to an array with duty cycle values. This array must be in Data RAM. - /**< This field is defined as an union of pointers - * to provide a convenient way to define duty - * cycle values in various loading modes - * (see @ref nrf_pwm_dec_load_t). - * In each value, the most significant bit (15) - * determines the polarity of the output and the - * others (14-0) compose the 15-bit value to be - * compared with the pulse generator counter. */ - uint16_t length; ///< Number of 16-bit values in the array pointed by @p values. - uint32_t repeats; ///< Number of times that each duty cycle should be repeated (after being played once). Ignored in @ref NRF_PWM_STEP_TRIGGERED mode. - uint32_t end_delay; ///< Additional time (in PWM periods) that the last duty cycle is to be kept after the sequence is played. Ignored in @ref NRF_PWM_STEP_TRIGGERED mode. -} nrf_pwm_sequence_t; - -/** - * @brief Helper macro for calculating the number of 16-bit values in specified - * array of duty cycle values. - */ -#define NRF_PWM_VALUES_LENGTH(array) (sizeof(array) / sizeof(uint16_t)) - - -/** - * @brief Function for activating a specific PWM task. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] task Task to activate. - */ -__STATIC_INLINE void nrf_pwm_task_trigger(NRF_PWM_Type * p_reg, - nrf_pwm_task_t task); - -/** - * @brief Function for getting the address of a specific PWM task register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] task Requested task. - * - * @return Address of the specified task register. - */ -__STATIC_INLINE uint32_t nrf_pwm_task_address_get(NRF_PWM_Type const * p_reg, - nrf_pwm_task_t task); - -/** - * @brief Function for clearing a specific PWM event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to clear. - */ -__STATIC_INLINE void nrf_pwm_event_clear(NRF_PWM_Type * p_reg, - nrf_pwm_event_t event); - -/** - * @brief Function for checking the state of a specific PWM event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to check. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_pwm_event_check(NRF_PWM_Type const * p_reg, - nrf_pwm_event_t event); - -/** - * @brief Function for getting the address of a specific PWM event register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Requested event. - * - * @return Address of the specified event register. - */ -__STATIC_INLINE uint32_t nrf_pwm_event_address_get(NRF_PWM_Type const * p_reg, - nrf_pwm_event_t event); - -/** - * @brief Function for enabling specified shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] pwm_shorts_mask Shortcuts to enable. - */ -__STATIC_INLINE void nrf_pwm_shorts_enable(NRF_PWM_Type * p_reg, - uint32_t pwm_shorts_mask); - -/** - * @brief Function for disabling specified shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] pwm_shorts_mask Shortcuts to disable. - */ -__STATIC_INLINE void nrf_pwm_shorts_disable(NRF_PWM_Type * p_reg, - uint32_t pwm_shorts_mask); - -/** - * @brief Function for setting the configuration of PWM shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] pwm_shorts_mask Shortcuts configuration to set. - */ -__STATIC_INLINE void nrf_pwm_shorts_set(NRF_PWM_Type * p_reg, - uint32_t pwm_shorts_mask); - -/** - * @brief Function for enabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] pwm_int_mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_pwm_int_enable(NRF_PWM_Type * p_reg, - uint32_t pwm_int_mask); - -/** - * @brief Function for disabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] pwm_int_mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_pwm_int_disable(NRF_PWM_Type * p_reg, - uint32_t pwm_int_mask); - -/** - * @brief Function for setting the configuration of PWM interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] pwm_int_mask Interrupts configuration to set. - */ -__STATIC_INLINE void nrf_pwm_int_set(NRF_PWM_Type * p_reg, - uint32_t pwm_int_mask); - -/** - * @brief Function for retrieving the state of a given interrupt. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] pwm_int Interrupt to check. - * - * @retval true If the interrupt is enabled. - * @retval false If the interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_pwm_int_enable_check(NRF_PWM_Type const * p_reg, - nrf_pwm_int_mask_t pwm_int); - -/** - * @brief Function for enabling the PWM peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_pwm_enable(NRF_PWM_Type * p_reg); - -/** - * @brief Function for disabling the PWM peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_pwm_disable(NRF_PWM_Type * p_reg); - -/** - * @brief Function for assigning pins to PWM output channels. - * - * Usage of all PWM output channels is optional. If a given channel is not - * needed, pass the @ref NRF_PWM_PIN_NOT_CONNECTED value instead of its pin - * number. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] out_pins Array with pin numbers for individual PWM output channels. - */ -__STATIC_INLINE void nrf_pwm_pins_set(NRF_PWM_Type * p_reg, - uint32_t out_pins[NRF_PWM_CHANNEL_COUNT]); - -/** - * @brief Function for configuring the PWM peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] base_clock Base clock frequency. - * @param[in] mode Operating mode of the pulse generator counter. - * @param[in] top_value Value up to which the pulse generator counter counts. - */ -__STATIC_INLINE void nrf_pwm_configure(NRF_PWM_Type * p_reg, - nrf_pwm_clk_t base_clock, - nrf_pwm_mode_t mode, - uint16_t top_value); - -/** - * @brief Function for defining a sequence of PWM duty cycles. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] seq_id Identifier of the sequence (0 or 1). - * @param[in] p_seq Pointer to the sequence definition. - */ -__STATIC_INLINE void nrf_pwm_sequence_set(NRF_PWM_Type * p_reg, - uint8_t seq_id, - nrf_pwm_sequence_t const * p_seq); - -/** - * @brief Function for modifying the pointer to the duty cycle values - * in the specified sequence. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] seq_id Identifier of the sequence (0 or 1). - * @param[in] p_values Pointer to an array with duty cycle values. - */ -__STATIC_INLINE void nrf_pwm_seq_ptr_set(NRF_PWM_Type * p_reg, - uint8_t seq_id, - uint16_t const * p_values); - -/** - * @brief Function for modifying the total number of duty cycle values - * in the specified sequence. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] seq_id Identifier of the sequence (0 or 1). - * @param[in] length Number of duty cycle values. - */ -__STATIC_INLINE void nrf_pwm_seq_cnt_set(NRF_PWM_Type * p_reg, - uint8_t seq_id, - uint16_t length); - -/** - * @brief Function for modifying the additional number of PWM periods spent - * on each duty cycle value in the specified sequence. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] seq_id Identifier of the sequence (0 or 1). - * @param[in] refresh Number of additional PWM periods for each duty cycle value. - */ -__STATIC_INLINE void nrf_pwm_seq_refresh_set(NRF_PWM_Type * p_reg, - uint8_t seq_id, - uint32_t refresh); - -/** - * @brief Function for modifying the additional time added after the sequence - * is played. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] seq_id Identifier of the sequence (0 or 1). - * @param[in] end_delay Number of PWM periods added at the end of the sequence. - */ -__STATIC_INLINE void nrf_pwm_seq_end_delay_set(NRF_PWM_Type * p_reg, - uint8_t seq_id, - uint32_t end_delay); - -/** - * @brief Function for setting the mode of loading sequence data from RAM - * and advancing the sequence. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] dec_load Mode of loading sequence data from RAM. - * @param[in] dec_step Mode of advancing the active sequence. - */ -__STATIC_INLINE void nrf_pwm_decoder_set(NRF_PWM_Type * p_reg, - nrf_pwm_dec_load_t dec_load, - nrf_pwm_dec_step_t dec_step); - -/** - * @brief Function for setting the number of times the sequence playback - * should be performed. - * - * This function applies to two-sequence playback (concatenated sequence 0 and 1). - * A single sequence can be played back only once. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] loop_count Number of times to perform the sequence playback. - */ -__STATIC_INLINE void nrf_pwm_loop_set(NRF_PWM_Type * p_reg, - uint16_t loop_count); - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_pwm_task_trigger(NRF_PWM_Type * p_reg, - nrf_pwm_task_t task) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL; -} - -__STATIC_INLINE uint32_t nrf_pwm_task_address_get(NRF_PWM_Type const * p_reg, - nrf_pwm_task_t task) -{ - return ((uint32_t)p_reg + (uint32_t)task); -} - -__STATIC_INLINE void nrf_pwm_event_clear(NRF_PWM_Type * p_reg, - nrf_pwm_event_t event) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)); - (void)dummy; -#endif -} - -__STATIC_INLINE bool nrf_pwm_event_check(NRF_PWM_Type const * p_reg, - nrf_pwm_event_t event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event); -} - -__STATIC_INLINE uint32_t nrf_pwm_event_address_get(NRF_PWM_Type const * p_reg, - nrf_pwm_event_t event) -{ - return ((uint32_t)p_reg + (uint32_t)event); -} - -__STATIC_INLINE void nrf_pwm_shorts_enable(NRF_PWM_Type * p_reg, - uint32_t pwm_shorts_mask) -{ - p_reg->SHORTS |= pwm_shorts_mask; -} - -__STATIC_INLINE void nrf_pwm_shorts_disable(NRF_PWM_Type * p_reg, - uint32_t pwm_shorts_mask) -{ - p_reg->SHORTS &= ~(pwm_shorts_mask); -} - -__STATIC_INLINE void nrf_pwm_shorts_set(NRF_PWM_Type * p_reg, - uint32_t pwm_shorts_mask) -{ - p_reg->SHORTS = pwm_shorts_mask; -} - -__STATIC_INLINE void nrf_pwm_int_enable(NRF_PWM_Type * p_reg, - uint32_t pwm_int_mask) -{ - p_reg->INTENSET = pwm_int_mask; -} - -__STATIC_INLINE void nrf_pwm_int_disable(NRF_PWM_Type * p_reg, - uint32_t pwm_int_mask) -{ - p_reg->INTENCLR = pwm_int_mask; -} - -__STATIC_INLINE void nrf_pwm_int_set(NRF_PWM_Type * p_reg, - uint32_t pwm_int_mask) -{ - p_reg->INTEN = pwm_int_mask; -} - -__STATIC_INLINE bool nrf_pwm_int_enable_check(NRF_PWM_Type const * p_reg, - nrf_pwm_int_mask_t pwm_int) -{ - return (bool)(p_reg->INTENSET & pwm_int); -} - -__STATIC_INLINE void nrf_pwm_enable(NRF_PWM_Type * p_reg) -{ - p_reg->ENABLE = (PWM_ENABLE_ENABLE_Enabled << PWM_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_pwm_disable(NRF_PWM_Type * p_reg) -{ - p_reg->ENABLE = (PWM_ENABLE_ENABLE_Disabled << PWM_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_pwm_pins_set(NRF_PWM_Type * p_reg, - uint32_t out_pins[NRF_PWM_CHANNEL_COUNT]) -{ - uint8_t i; - for (i = 0; i < NRF_PWM_CHANNEL_COUNT; ++i) - { - p_reg->PSEL.OUT[i] = out_pins[i]; - } -} - -__STATIC_INLINE void nrf_pwm_configure(NRF_PWM_Type * p_reg, - nrf_pwm_clk_t base_clock, - nrf_pwm_mode_t mode, - uint16_t top_value) -{ - ASSERT(top_value <= PWM_COUNTERTOP_COUNTERTOP_Msk); - - p_reg->PRESCALER = base_clock; - p_reg->MODE = mode; - p_reg->COUNTERTOP = top_value; -} - -__STATIC_INLINE void nrf_pwm_sequence_set(NRF_PWM_Type * p_reg, - uint8_t seq_id, - nrf_pwm_sequence_t const * p_seq) -{ - ASSERT(p_seq != NULL); - - nrf_pwm_seq_ptr_set( p_reg, seq_id, p_seq->values.p_raw); - nrf_pwm_seq_cnt_set( p_reg, seq_id, p_seq->length); - nrf_pwm_seq_refresh_set( p_reg, seq_id, p_seq->repeats); - nrf_pwm_seq_end_delay_set(p_reg, seq_id, p_seq->end_delay); -} - -__STATIC_INLINE void nrf_pwm_seq_ptr_set(NRF_PWM_Type * p_reg, - uint8_t seq_id, - uint16_t const * p_values) -{ - ASSERT(seq_id <= 1); - ASSERT(p_values != NULL); - p_reg->SEQ[seq_id].PTR = (uint32_t)p_values; -} - -__STATIC_INLINE void nrf_pwm_seq_cnt_set(NRF_PWM_Type * p_reg, - uint8_t seq_id, - uint16_t length) -{ - ASSERT(seq_id <= 1); - ASSERT(length != 0); - ASSERT(length <= PWM_SEQ_CNT_CNT_Msk); - p_reg->SEQ[seq_id].CNT = length; -} - -__STATIC_INLINE void nrf_pwm_seq_refresh_set(NRF_PWM_Type * p_reg, - uint8_t seq_id, - uint32_t refresh) -{ - ASSERT(seq_id <= 1); - ASSERT(refresh <= PWM_SEQ_REFRESH_CNT_Msk); - p_reg->SEQ[seq_id].REFRESH = refresh; -} - -__STATIC_INLINE void nrf_pwm_seq_end_delay_set(NRF_PWM_Type * p_reg, - uint8_t seq_id, - uint32_t end_delay) -{ - ASSERT(seq_id <= 1); - ASSERT(end_delay <= PWM_SEQ_ENDDELAY_CNT_Msk); - p_reg->SEQ[seq_id].ENDDELAY = end_delay; -} - -__STATIC_INLINE void nrf_pwm_decoder_set(NRF_PWM_Type * p_reg, - nrf_pwm_dec_load_t dec_load, - nrf_pwm_dec_step_t dec_step) -{ - p_reg->DECODER = ((uint32_t)dec_load << PWM_DECODER_LOAD_Pos) | - ((uint32_t)dec_step << PWM_DECODER_MODE_Pos); -} - -__STATIC_INLINE void nrf_pwm_loop_set(NRF_PWM_Type * p_reg, - uint16_t loop_count) -{ - p_reg->LOOP = loop_count; -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_PWM_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_qdec.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_qdec.h deleted file mode 100644 index e6a0fccbfef..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_qdec.h +++ /dev/null @@ -1,504 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_QDEC_H__ -#define NRF_QDEC_H__ - -#include -#include "nrf_error.h" -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/*lint ++flb "Enter library region" */ - -/** - * @defgroup nrf_qdec_hal QDEC HAL - * @{ - * @ingroup nrf_qdec - * @brief Hardware access layer for accessing the quadrature decoder (QDEC) peripheral. - */ - -/** - * @enum nrf_qdec_task_t - * @brief QDEC tasks. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_QDEC_TASK_START = offsetof(NRF_QDEC_Type, TASKS_START), /**< Starting the quadrature decoder. */ - NRF_QDEC_TASK_STOP = offsetof(NRF_QDEC_Type, TASKS_STOP), /**< Stopping the quadrature decoder. */ - NRF_QDEC_TASK_READCLRACC = offsetof(NRF_QDEC_Type, TASKS_READCLRACC) /**< Reading and clearing ACC and ACCDBL registers. */ -} nrf_qdec_task_t; - -/** - * @enum nrf_qdec_event_t - * @brief QDEC events. - */ -typedef enum -{ - NRF_QDEC_EVENT_SAMPLERDY = offsetof(NRF_QDEC_Type, EVENTS_SAMPLERDY), /**< Event generated for every new sample. */ - NRF_QDEC_EVENT_REPORTRDY = offsetof(NRF_QDEC_Type, EVENTS_REPORTRDY), /**< Event generated for every new report. */ - NRF_QDEC_EVENT_ACCOF = offsetof(NRF_QDEC_Type, EVENTS_ACCOF) /**< Event generated for every accumulator overflow. */ -} nrf_qdec_event_t; /*lint -restore */ - -/** - * @enum nrf_qdec_short_mask_t - * @brief QDEC shortcuts. - */ -typedef enum -{ - NRF_QDEC_SHORT_REPORTRDY_READCLRACC_MASK = QDEC_SHORTS_REPORTRDY_READCLRACC_Msk, /**< Shortcut between REPORTRDY event and READCLRACC task. */ - NRF_QDEC_SHORT_SAMPLERDY_STOP_MASK = QDEC_SHORTS_SAMPLERDY_STOP_Msk /**< Shortcut between SAMPLERDY event and STOP task. */ -} nrf_qdec_short_mask_t; - -/** - * @enum nrf_qdec_int_mask_t - * @brief QDEC interrupts. - */ -typedef enum -{ - NRF_QDEC_INT_SAMPLERDY_MASK = QDEC_INTENSET_SAMPLERDY_Msk, /**< Mask for enabling or disabling an interrupt on SAMPLERDY event. */ - NRF_QDEC_INT_REPORTRDY_MASK = QDEC_INTENSET_REPORTRDY_Msk, /**< Mask for enabling or disabling an interrupt on REPORTRDY event. */ - NRF_QDEC_INT_ACCOF_MASK = QDEC_INTENSET_ACCOF_Msk /**< Mask for enabling or disabling an interrupt on ACCOF event. */ -} nrf_qdec_int_mask_t; - -/** - * @enum nrf_qdec_enable_t - * @brief States of the enable bit. - */ -typedef enum -{ - NRF_QDEC_DISABLE = QDEC_ENABLE_ENABLE_Disabled, /**< Mask for disabling the QDEC periperal. When disabled, the QDEC decoder pins are not active. */ - NRF_QDEC_ENABLE = QDEC_ENABLE_ENABLE_Enabled /**< Mask for enabling the QDEC periperal. When enabled, the QDEC pins are active. */ -} nrf_qdec_enable_t; - - -/** - * @enum nrf_qdec_dbfen_t - * @brief States of the debounce filter enable bit. - */ -typedef enum -{ - NRF_QDEC_DBFEN_DISABLE = QDEC_DBFEN_DBFEN_Disabled, /**< Mask for disabling the debounce filter. */ - NRF_QDEC_DBFEN_ENABLE = QDEC_DBFEN_DBFEN_Enabled /**< Mask for enabling the debounce filter. */ -} nrf_qdec_dbfen_t; - -/** - * @enum nrf_qdec_ledpol_t - * @brief Active LED polarity. - */ -typedef enum -{ - NRF_QDEC_LEPOL_ACTIVE_LOW = QDEC_LEDPOL_LEDPOL_ActiveLow, /**< QDEC LED active on output pin low. */ - NRF_QDEC_LEPOL_ACTIVE_HIGH = QDEC_LEDPOL_LEDPOL_ActiveHigh /**< QDEC LED active on output pin high. */ -} nrf_qdec_ledpol_t; - - -/** - * @enum nrf_qdec_sampleper_t - * @brief Available sampling periods. - */ -typedef enum -{ - NRF_QDEC_SAMPLEPER_128us = QDEC_SAMPLEPER_SAMPLEPER_128us, /**< QDEC sampling period 128 microseconds. */ - NRF_QDEC_SAMPLEPER_256us = QDEC_SAMPLEPER_SAMPLEPER_256us, /**< QDEC sampling period 256 microseconds. */ - NRF_QDEC_SAMPLEPER_512us = QDEC_SAMPLEPER_SAMPLEPER_512us, /**< QDEC sampling period 512 microseconds. */ - NRF_QDEC_SAMPLEPER_1024us = QDEC_SAMPLEPER_SAMPLEPER_1024us, /**< QDEC sampling period 1024 microseconds. */ - NRF_QDEC_SAMPLEPER_2048us = QDEC_SAMPLEPER_SAMPLEPER_2048us, /**< QDEC sampling period 2048 microseconds. */ - NRF_QDEC_SAMPLEPER_4096us = QDEC_SAMPLEPER_SAMPLEPER_4096us, /**< QDEC sampling period 4096 microseconds. */ - NRF_QDEC_SAMPLEPER_8192us = QDEC_SAMPLEPER_SAMPLEPER_8192us, /**< QDEC sampling period 8192 microseconds. */ - NRF_QDEC_SAMPLEPER_16384us = QDEC_SAMPLEPER_SAMPLEPER_16384us /**< QDEC sampling period 16384 microseconds. */ -} nrf_qdec_sampleper_t; - -/** - * @enum nrf_qdec_reportper_t - * @brief Available report periods. - */ -typedef enum -{ - NRF_QDEC_REPORTPER_10 = QDEC_REPORTPER_REPORTPER_10Smpl, /**< QDEC report period 10 samples. */ - NRF_QDEC_REPORTPER_40 = QDEC_REPORTPER_REPORTPER_40Smpl, /**< QDEC report period 40 samples. */ - NRF_QDEC_REPORTPER_80 = QDEC_REPORTPER_REPORTPER_80Smpl, /**< QDEC report period 80 samples. */ - NRF_QDEC_REPORTPER_120 = QDEC_REPORTPER_REPORTPER_120Smpl, /**< QDEC report period 120 samples. */ - NRF_QDEC_REPORTPER_160 = QDEC_REPORTPER_REPORTPER_160Smpl, /**< QDEC report period 160 samples. */ - NRF_QDEC_REPORTPER_200 = QDEC_REPORTPER_REPORTPER_200Smpl, /**< QDEC report period 200 samples. */ - NRF_QDEC_REPORTPER_240 = QDEC_REPORTPER_REPORTPER_240Smpl, /**< QDEC report period 240 samples. */ - NRF_QDEC_REPORTPER_280 = QDEC_REPORTPER_REPORTPER_280Smpl, /**< QDEC report period 280 samples. */ - NRF_QDEC_REPORTPER_DISABLED /**< QDEC reporting disabled. */ -} nrf_qdec_reportper_t; - -/** - * @brief Function for enabling QDEC. - */ -__STATIC_INLINE void nrf_qdec_enable(void) -{ - NRF_QDEC->ENABLE = NRF_QDEC_ENABLE; -} - - -/** - * @brief Function for disabling QDEC. - */ -__STATIC_INLINE void nrf_qdec_disable(void) -{ - NRF_QDEC->ENABLE = NRF_QDEC_DISABLE; -} - - -/** - * @brief Function for returning the enable state of QDEC. - * @return State of the register. - */ -__STATIC_INLINE uint32_t nrf_qdec_enable_get(void) -{ - return NRF_QDEC->ENABLE; -} - - -/** - * @brief Function for enabling QDEC interrupts by mask. - * @param[in] qdec_int_mask Sources of the interrupts to enable. - */ -__STATIC_INLINE void nrf_qdec_int_enable(uint32_t qdec_int_mask) -{ - NRF_QDEC->INTENSET = qdec_int_mask; // writing 0 has no effect -} - - -/** - * @brief Function for disabling QDEC interrupts by mask. - * @param[in] qdec_int_mask Sources of the interrupts to disable. - * - */ -__STATIC_INLINE void nrf_qdec_int_disable(uint32_t qdec_int_mask) -{ - NRF_QDEC->INTENCLR = qdec_int_mask; // writing 0 has no effect -} - - -/** - * @brief Function for getting the enabled interrupts of the QDEC. - */ -__STATIC_INLINE uint32_t nrf_qdec_int_enable_check(nrf_qdec_int_mask_t qdec_int_mask) -{ - return NRF_QDEC->INTENSET & qdec_int_mask; // when read this register will return the value of INTEN. -} - - -/** - * @brief Function for enabling the debouncing filter of the QED. - */ -__STATIC_INLINE void nrf_qdec_dbfen_enable(void) -{ - NRF_QDEC->DBFEN = NRF_QDEC_DBFEN_ENABLE; -} - - -/** - * @brief Function for disabling the debouncing filter of the QED. - */ -__STATIC_INLINE void nrf_qdec_dbfen_disable(void) -{ - NRF_QDEC->DBFEN = NRF_QDEC_DBFEN_DISABLE; -} - - -/** - * @brief Function for getting the state of the QDEC's debouncing filter. - * @retval NRF_QDEC_DBFEN_DISABLE If the debouncing filter is disabled. - * @retval NRF_QDEC_DBFEN_ENABLE If the debouncing filter is enabled. - */ -__STATIC_INLINE uint32_t nrf_qdec_dbfen_get(void) -{ - return NRF_QDEC->DBFEN; -} - - -/** - * @brief Function for assigning QDEC pins. - * @param[in] psela Pin number. - * @param[in] pselb Pin number. - * @param[in] pselled Pin number. - */ -__STATIC_INLINE void nrf_qdec_pio_assign( uint32_t psela, uint32_t pselb, uint32_t pselled) -{ - NRF_QDEC->PSELA = psela; - NRF_QDEC->PSELB = pselb; - NRF_QDEC->PSELLED = pselled; - -} - -/** - * @brief Function for setting a specific QDEC task. - * @param[in] qdec_task QDEC task to be set. - */ -__STATIC_INLINE void nrf_qdec_task_trigger(nrf_qdec_task_t qdec_task) -{ - *( (volatile uint32_t *)( (uint8_t *)NRF_QDEC + qdec_task) ) = 1; -} - - -/** - * @brief Function for retrieving the address of a QDEC task register. - * @param[in] qdec_task QDEC task. - */ -__STATIC_INLINE uint32_t * nrf_qdec_task_address_get(nrf_qdec_task_t qdec_task) -{ - return (uint32_t *)( (uint8_t *)NRF_QDEC + qdec_task); -} - - -/** - * @brief Function for clearing a specific QDEC event. - * @param[in] qdec_event QDEC event to clear. - */ -__STATIC_INLINE void nrf_qdec_event_clear(nrf_qdec_event_t qdec_event) -{ - *( (volatile uint32_t *)( (uint8_t *)NRF_QDEC + qdec_event) ) = 0; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_QDEC + qdec_event)); - (void)dummy; -#endif -} - - -/** - * @brief Function for retrieving the state of a specific QDEC event. - * @return State of the QDEC event. - */ -__STATIC_INLINE uint32_t nrf_qdec_event_check(nrf_qdec_event_t qdec_event) -{ - return *(volatile uint32_t *)( (uint8_t *)NRF_QDEC + qdec_event); -} - - -/** - * @brief Function for retrieving the address of a specific QDEC event register. - * @param[in] qdec_event QDEC event. - * @return Address of the specified QDEC event. - */ -__STATIC_INLINE uint32_t * nrf_qdec_event_address_get(nrf_qdec_event_t qdec_event) -{ - return (uint32_t *)( (uint8_t *)NRF_QDEC + qdec_event); -} - - -/** - * @brief Function for setting QDEC shortcuts. - * @param[in] qdec_short_mask QDEC shortcut by mask. - */ -__STATIC_INLINE void nrf_qdec_shorts_enable(uint32_t qdec_short_mask) -{ - NRF_QDEC->SHORTS |= qdec_short_mask; -} - - -/** - * @brief Function for clearing shortcuts of the QDEC by mask. - * @param[in] qdec_short_mask QDEC shortcute to be cleared. - */ -__STATIC_INLINE void nrf_qdec_shorts_disable(uint32_t qdec_short_mask) -{ - NRF_QDEC->SHORTS &= ~qdec_short_mask; -} - - -/** - * @brief Function for retrieving the value of QDEC's SAMPLEPER register. - * @return Value of the SAMPLEPER register. - */ -__STATIC_INLINE int32_t nrf_qdec_sampleper_reg_get(void) -{ - return NRF_QDEC->SAMPLEPER; -} - - -/** - * @brief Function for converting the value of QDEC's SAMPLE PERIOD to microseconds. - * @retval sampling period in microseconds. - */ -__STATIC_INLINE uint32_t nrf_qdec_sampleper_to_value(uint32_t sampleper) -{ - return (1 << (7 + sampleper)); -} - -/** - * @brief Function for setting the value of QDEC's SAMPLEPER register. - * @param[in] sample_per Sampling period. - */ -__STATIC_INLINE void nrf_qdec_sampleper_set(nrf_qdec_sampleper_t sample_per) -{ - NRF_QDEC->SAMPLEPER = sample_per; -} - - -/** - * @brief Function for retrieving the value of QDEC's SAMPLE register. - * @return Value of the SAMPLE register. - */ -__STATIC_INLINE int32_t nrf_qdec_sample_get(void) -{ - return NRF_QDEC->SAMPLE; -} - - -/** - * @brief Function for retrieving the value of QDEC's ACC register. - * @return Value of the ACC register. - */ -__STATIC_INLINE int32_t nrf_qdec_acc_get(void) -{ - return NRF_QDEC->ACC; -} - - -/** - * @brief Function for retrieving the value of QDEC's ACCREAD register. - * @return Value of the ACCREAD register. - */ -__STATIC_INLINE int32_t nrf_qdec_accread_get(void) -{ - return NRF_QDEC->ACCREAD; -} - - -/** - * @brief Function for retrieving the value of QDEC's ACCDBL register. - * @return Value of the ACCDBL register. - */ -__STATIC_INLINE uint32_t nrf_qdec_accdbl_get(void) -{ - return NRF_QDEC->ACCDBL; -} - - -/** - * @brief Function for retrieving the value of QDEC's ACCDBLREAD register. - * @return Value of the ACCDBLREAD register. - */ -__STATIC_INLINE uint32_t nrf_qdec_accdblread_get(void) -{ - return NRF_QDEC->ACCDBLREAD; -} - - -/** - * @brief Function for setting how long the LED is switched on before sampling. - * @param[in] time_us Time (in microseconds) how long the LED is switched on before sampling. - */ -__STATIC_INLINE void nrf_qdec_ledpre_set(uint32_t time_us) -{ - NRF_QDEC->LEDPRE = time_us; -} - - -/** - * @brief Function for retrieving how long the LED is switched on before sampling. - * @retval time_us Time (in microseconds) how long the LED is switched on before sampling. - */ -__STATIC_INLINE uint32_t nrf_qdec_ledpre_get(void) -{ - return NRF_QDEC->LEDPRE; -} - - -/** - * @brief Function for setting the report period (in samples). - * @param[in] reportper Number of samples. - */ -__STATIC_INLINE void nrf_qdec_reportper_set(nrf_qdec_reportper_t reportper) -{ - NRF_QDEC->REPORTPER = reportper; -} - - -/** - * @brief Function for retrieving the report period. - * @retval reportper Number of samples as encoded in the register. - */ -__STATIC_INLINE uint32_t nrf_qdec_reportper_reg_get(void) -{ - return NRF_QDEC->REPORTPER; -} - - -/** - * @brief Function for retrieving the value of QDEC's SAMPLEPER register. - * @param [in] reportper Reportper to be converted to amount of samples per report. - - */ -__STATIC_INLINE uint32_t nrf_qdec_reportper_to_value(uint32_t reportper) -{ - return (reportper == NRF_QDEC_REPORTPER_10) ? 10 : reportper * 40; -} - - -/** - * @brief Function for setting the active level for the LED. - * @param[in] pol Active level for the LED. - */ -__STATIC_INLINE void nrf_qdec_ledpol_set(nrf_qdec_ledpol_t pol) -{ - NRF_QDEC->LEDPOL = pol; -} - - -/** - * @brief Function for retrieving the active level for the LED. - * @return Active level for the LED. - */ -__STATIC_INLINE uint32_t nrf_qdec_ledpol_get(void) -{ - return NRF_QDEC->LEDPOL; -} - - -/** - *@} - **/ - -/*lint --flb "Leave library region" */ - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_qspi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_qspi.h deleted file mode 100644 index 4c0d6df45f8..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_qspi.h +++ /dev/null @@ -1,769 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @defgroup nrf_qspi_hal QSPI HAL - * @{ - * @ingroup nrf_qspi - * - * @brief Hardware access layer for accessing the QSPI peripheral. - */ - -#ifndef NRF_QSPI_H__ -#define NRF_QSPI_H__ - -#include -#include -#include "boards.h" -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief This value can be used as a parameter for the @ref nrf_qspi_pins_set - * function to specify that a given QSPI signal (SCK, CSN, IO0, IO1, IO2, or IO3) - * will not be connected to a physical pin. - */ -#define NRF_QSPI_PIN_NOT_CONNECTED 0xFF - -/** - * @brief Macro for setting proper values to pin registers. - */ - -#define NRF_QSPI_PIN_VAL(pin) (pin) == NRF_QSPI_PIN_NOT_CONNECTED ? 0xFFFFFFFF : (pin) - -/** - * @brief QSPI tasks. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_QSPI_TASK_ACTIVATE = offsetof(NRF_QSPI_Type, TASKS_ACTIVATE), /**< Activate the QSPI interface. */ - NRF_QSPI_TASK_READSTART = offsetof(NRF_QSPI_Type, TASKS_READSTART), /**< Start transfer from external flash memory to internal RAM. */ - NRF_QSPI_TASK_WRITESTART = offsetof(NRF_QSPI_Type, TASKS_WRITESTART), /**< Start transfer from internal RAM to external flash memory. */ - NRF_QSPI_TASK_ERASESTART = offsetof(NRF_QSPI_Type, TASKS_ERASESTART), /**< Start external flash memory erase operation. */ - /*lint -restore*/ -} nrf_qspi_task_t; - -/** - * @brief QSPI events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_QSPI_EVENT_READY = offsetof(NRF_QSPI_Type, EVENTS_READY) /**< QSPI peripheral is ready after it executes any task. */ - /*lint -restore*/ -} nrf_qspi_event_t; - -/** - * @brief QSPI interrupts. - */ -typedef enum -{ - NRF_QSPI_INT_READY_MASK = QSPI_INTENSET_READY_Msk /**< Interrupt on READY event. */ -} nrf_qspi_int_mask_t; - -/** - * @brief QSPI frequency divider values. - */ -typedef enum -{ - NRF_QSPI_FREQ_32MDIV1, /**< 32.0 MHz. */ - NRF_QSPI_FREQ_32MDIV2, /**< 16.0 MHz. */ - NRF_QSPI_FREQ_32MDIV3, /**< 10.6 MHz. */ - NRF_QSPI_FREQ_32MDIV4, /**< 8.00 MHz. */ - NRF_QSPI_FREQ_32MDIV5, /**< 6.40 MHz. */ - NRF_QSPI_FREQ_32MDIV6, /**< 5.33 MHz. */ - NRF_QSPI_FREQ_32MDIV7, /**< 4.57 MHz. */ - NRF_QSPI_FREQ_32MDIV8, /**< 4.00 MHz. */ - NRF_QSPI_FREQ_32MDIV9, /**< 3.55 MHz. */ - NRF_QSPI_FREQ_32MDIV10, /**< 3.20 MHz. */ - NRF_QSPI_FREQ_32MDIV11, /**< 2.90 MHz. */ - NRF_QSPI_FREQ_32MDIV12, /**< 2.66 MHz. */ - NRF_QSPI_FREQ_32MDIV13, /**< 2.46 MHz. */ - NRF_QSPI_FREQ_32MDIV14, /**< 2.29 MHz. */ - NRF_QSPI_FREQ_32MDIV15, /**< 2.13 MHz. */ - NRF_QSPI_FREQ_32MDIV16, /**< 2.00 MHz. */ -} nrf_qspi_frequency_t; - -/** - * @brief Interface configuration for a read operation. - */ -typedef enum -{ - NRF_QSPI_READOC_FASTREAD = QSPI_IFCONFIG0_READOC_FASTREAD, /**< Single data line SPI. FAST_READ (opcode 0x0B). */ - NRF_QSPI_READOC_READ2O = QSPI_IFCONFIG0_READOC_READ2O, /**< Dual data line SPI. READ2O (opcode 0x3B). */ - NRF_QSPI_READOC_READ2IO = QSPI_IFCONFIG0_READOC_READ2IO, /**< Dual data line SPI. READ2IO (opcode 0xBB). */ - NRF_QSPI_READOC_READ4O = QSPI_IFCONFIG0_READOC_READ4O, /**< Quad data line SPI. READ4O (opcode 0x6B). */ - NRF_QSPI_READOC_READ4IO = QSPI_IFCONFIG0_READOC_READ4IO /**< Quad data line SPI. READ4IO (opcode 0xEB). */ -} nrf_qspi_readoc_t; - -/** - * @brief Interface configuration for a write operation. - */ -typedef enum -{ - NRF_QSPI_WRITEOC_PP = QSPI_IFCONFIG0_WRITEOC_PP, /**< Single data line SPI. PP (opcode 0x02). */ - NRF_QSPI_WRITEOC_PP2O = QSPI_IFCONFIG0_WRITEOC_PP2O, /**< Dual data line SPI. PP2O (opcode 0xA2). */ - NRF_QSPI_WRITEOC_PP4O = QSPI_IFCONFIG0_WRITEOC_PP4O, /**< Quad data line SPI. PP4O (opcode 0x32). */ - NRF_QSPI_WRITEOC_PP4IO = QSPI_IFCONFIG0_WRITEOC_PP4IO, /**< Quad data line SPI. READ4O (opcode 0x38). */ -} nrf_qspi_writeoc_t; - -/** - * @brief Interface configuration for addressing mode. - */ -typedef enum -{ - NRF_QSPI_ADDRMODE_24BIT = QSPI_IFCONFIG0_ADDRMODE_24BIT, /**< 24-bit addressing. */ - NRF_QSPI_ADDRMODE_32BIT = QSPI_IFCONFIG0_ADDRMODE_32BIT /**< 32-bit addressing. */ -} nrf_qspi_addrmode_t; - -/** - * @brief QSPI SPI mode. Polarization and phase configuration. - */ -typedef enum -{ - NRF_QSPI_MODE_0 = QSPI_IFCONFIG1_SPIMODE_MODE0, /**< Mode 0 (CPOL=0, CPHA=0). */ - NRF_QSPI_MODE_1 = QSPI_IFCONFIG1_SPIMODE_MODE3 /**< Mode 1 (CPOL=1, CPHA=1). */ -} nrf_qspi_spi_mode_t; - -/** - * @brief Addressing configuration mode. - */ -typedef enum -{ - NRF_QSPI_ADDRCONF_MODE_NOINSTR = QSPI_ADDRCONF_MODE_NoInstr, /**< Do not send any instruction. */ - NRF_QSPI_ADDRCONF_MODE_OPCODE = QSPI_ADDRCONF_MODE_Opcode, /**< Send opcode. */ - NRF_QSPI_ADDRCONF_MODE_OPBYTE0 = QSPI_ADDRCONF_MODE_OpByte0, /**< Send opcode, byte0. */ - NRF_QSPI_ADDRCONF_MODE_ALL = QSPI_ADDRCONF_MODE_All /**< Send opcode, byte0, byte1. */ -} nrf_qspi_addrconfig_mode_t; - -/** - * @brief Erasing data length. - */ -typedef enum -{ - NRF_QSPI_ERASE_LEN_4KB = QSPI_ERASE_LEN_LEN_4KB, /**< Erase 4 kB block (flash command 0x20). */ - NRF_QSPI_ERASE_LEN_64KB = QSPI_ERASE_LEN_LEN_64KB, /**< Erase 64 kB block (flash command 0xD8). */ - NRF_QSPI_ERASE_LEN_ALL = QSPI_ERASE_LEN_LEN_All /**< Erase all (flash command 0xC7). */ -} nrf_qspi_erase_len_t; - -/** - * @brief Custom instruction length. - */ -typedef enum -{ - NRF_QSPI_CINSTR_LEN_1B = QSPI_CINSTRCONF_LENGTH_1B, /**< Send opcode only. */ - NRF_QSPI_CINSTR_LEN_2B = QSPI_CINSTRCONF_LENGTH_2B, /**< Send opcode, CINSTRDAT0.BYTE0. */ - NRF_QSPI_CINSTR_LEN_3B = QSPI_CINSTRCONF_LENGTH_3B, /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT0.BYTE1. */ - NRF_QSPI_CINSTR_LEN_4B = QSPI_CINSTRCONF_LENGTH_4B, /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT0.BYTE2. */ - NRF_QSPI_CINSTR_LEN_5B = QSPI_CINSTRCONF_LENGTH_5B, /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT0.BYTE3. */ - NRF_QSPI_CINSTR_LEN_6B = QSPI_CINSTRCONF_LENGTH_6B, /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE4. */ - NRF_QSPI_CINSTR_LEN_7B = QSPI_CINSTRCONF_LENGTH_7B, /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE5. */ - NRF_QSPI_CINSTR_LEN_8B = QSPI_CINSTRCONF_LENGTH_8B, /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE6. */ - NRF_QSPI_CINSTR_LEN_9B = QSPI_CINSTRCONF_LENGTH_9B /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE7. */ -} nrf_qspi_cinstr_len_t; - -/** - * @brief Pins configuration. - */ -typedef struct -{ - uint8_t sck_pin; /**< SCK pin number. */ - uint8_t csn_pin; /**< Chip select pin number. */ - uint8_t io0_pin; /**< IO0/MOSI pin number. */ - uint8_t io1_pin; /**< IO1/MISO pin number. */ - uint8_t io2_pin; /**< IO2 pin number (optional). - * Set to @ref NRF_QSPI_PIN_NOT_CONNECTED if this signal is not needed. - */ - uint8_t io3_pin; /**< IO3 pin number (optional). - * Set to @ref NRF_QSPI_PIN_NOT_CONNECTED if this signal is not needed. - */ -} nrf_qspi_pins_t; - -/** - * @brief Custom instruction configuration. - */ -typedef struct -{ - uint8_t opcode; /**< Opcode used in custom instruction transmission. */ - nrf_qspi_cinstr_len_t length; /**< Length of the custom instruction data. */ - bool io2_level; /**< I/O line level during transmission. */ - bool io3_level; /**< I/O line level during transmission. */ - bool wipwait; /**< Wait if a Wait in Progress bit is set in the memory status byte. */ - bool wren; /**< Send write enable before instruction. */ - bool lfen; /**< Enable long frame mode. */ - bool lfstop; /**< Stop long frame mode. */ -} nrf_qspi_cinstr_conf_t; - -/** - * @brief Addressing mode register configuration. See @ref nrf_qspi_addrconfig_set - */ -typedef struct -{ - uint8_t opcode; /**< Opcode used to enter proper addressing mode. */ - uint8_t byte0; /**< Byte following the opcode. */ - uint8_t byte1; /**< Byte following byte0. */ - nrf_qspi_addrconfig_mode_t mode; /**< Extended addresing mode. */ - bool wipwait; /**< Enable/disable waiting for complete operation execution. */ - bool wren; /**< Send write enable before instruction. */ -} nrf_qspi_addrconfig_conf_t; - -/** - * @brief Structure with QSPI protocol interface configuration. - */ -typedef struct -{ - nrf_qspi_readoc_t readoc; /**< Read operation code. */ - nrf_qspi_writeoc_t writeoc; /**< Write operation code. */ - nrf_qspi_addrmode_t addrmode; /**< Addresing mode (24-bit or 32-bit). */ - bool dpmconfig; /**< Enable the Deep Power-down Mode (DPM) feature. */ -} nrf_qspi_prot_conf_t; - -/** - * @brief QSPI physical interface configuration. - */ -typedef struct -{ - uint8_t sck_delay; /**< tSHSL, tWHSL, and tSHWL in number of 16 MHz periods (62.5ns). */ - bool dpmen; /**< Enable the DPM feature. */ - nrf_qspi_spi_mode_t spi_mode; /**< SPI phase and polarization. */ - nrf_qspi_frequency_t sck_freq; /**< SCK frequency given as enum @ref nrf_qspi_frequency_t. */ -} nrf_qspi_phy_conf_t; - -/** - * @brief Function for activating a specific QSPI task. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] task Task to activate. - */ -__STATIC_INLINE void nrf_qspi_task_trigger(NRF_QSPI_Type * p_reg, nrf_qspi_task_t task); - -/** - * @brief Function for getting the address of a specific QSPI task register. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] task Requested task. - * - * @return Address of the specified task register. - */ -__STATIC_INLINE uint32_t nrf_qspi_task_address_get(NRF_QSPI_Type const * p_reg, - nrf_qspi_task_t task); - -/** - * @brief Function for clearing a specific QSPI event. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] qspi_event Event to clear. - */ -__STATIC_INLINE void nrf_qspi_event_clear(NRF_QSPI_Type * p_reg, nrf_qspi_event_t qspi_event); - -/** - * @brief Function for checking the state of a specific SPI event. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] qspi_event Event to check. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_qspi_event_check(NRF_QSPI_Type const * p_reg, nrf_qspi_event_t qspi_event); - -/** - * @brief Function for getting the address of a specific QSPI event register. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] qspi_event Requested event. - * - * @return Address of the specified event register. - */ -__STATIC_INLINE uint32_t * nrf_qspi_event_address_get(NRF_QSPI_Type const * p_reg, - nrf_qspi_event_t qspi_event); - -/** - * @brief Function for enabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] qspi_int_mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_qspi_int_enable(NRF_QSPI_Type * p_reg, uint32_t qspi_int_mask); - -/** - * @brief Function for disabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] qspi_int_mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_qspi_int_disable(NRF_QSPI_Type * p_reg, uint32_t qspi_int_mask); - -/** - * @brief Function for retrieving the state of a given interrupt. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] qspi_int Interrupt to check. - * - * @retval true If the interrupt is enabled. - * @retval false If the interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_qspi_int_enable_check(NRF_QSPI_Type const * p_reg, - nrf_qspi_int_mask_t qspi_int); - -/** - * @brief Function for enabling the QSPI peripheral. - * - * @param[in] p_reg Pointer to the peripheral register structure. - */ -__STATIC_INLINE void nrf_qspi_enable(NRF_QSPI_Type * p_reg); - -/** - * @brief Function for disabling the QSPI peripheral. - * - * @param[in] p_reg Pointer to the peripheral register structure. - */ -__STATIC_INLINE void nrf_qspi_disable(NRF_QSPI_Type * p_reg); - -/** - * @brief Function for configuring QSPI pins. - * - * If a given signal is not needed, pass the @ref NRF_QSPI_PIN_NOT_CONNECTED - * value instead of its pin number. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] p_pins Pointer to the pins configuration structure. See @ref nrf_qspi_pins_t. - */ -__STATIC_INLINE void nrf_qspi_pins_set(NRF_QSPI_Type * p_reg, - const nrf_qspi_pins_t * p_pins); - -/** - * @brief Function for setting the QSPI IFCONFIG0 register. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] p_config Pointer to the QSPI protocol interface configuration structure. See @ref nrf_qspi_prot_conf_t. - */ -__STATIC_INLINE void nrf_qspi_ifconfig0_set(NRF_QSPI_Type * p_reg, - const nrf_qspi_prot_conf_t * p_config); - -/** - * @brief Function for setting the QSPI IFCONFIG1 register. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] p_config Pointer to the QSPI physical interface configuration structure. See @ref nrf_qspi_phy_conf_t. - */ -__STATIC_INLINE void nrf_qspi_ifconfig1_set(NRF_QSPI_Type * p_reg, - const nrf_qspi_phy_conf_t * p_config); - -/** - * @brief Function for setting the QSPI ADDRCONF register. - * - * Function must be executed before sending task NRF_QSPI_TASK_ACTIVATE. Data stored in the structure - * is sent during the start of the peripheral. Remember that the reset instruction can set - * addressing mode to default in the memory device. If memory reset is necessary before configuring - * the addressing mode, use custom instruction feature instead of this function. - * Case with reset: Enable the peripheral without setting ADDRCONF register, send reset instructions - * using a custom instruction feature (reset enable and then reset), set proper addressing mode - * using the custom instruction feature. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] p_config Pointer to the addressing mode configuration structure. See @ref nrf_qspi_addrconfig_conf_t. -*/ -__STATIC_INLINE void nrf_qspi_addrconfig_set(NRF_QSPI_Type * p_reg, - const nrf_qspi_addrconfig_conf_t * p_config); - -/** - * @brief Function for setting write data into the peripheral register (without starting the process). - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] p_buffer Pointer to the writing buffer. - * @param[in] length Lenght of the writing data. - * @param[in] dest_addr Address in memory to write to. - */ -__STATIC_INLINE void nrf_qspi_write_buffer_set(NRF_QSPI_Type * p_reg, - void const * p_buffer, - uint32_t length, - uint32_t dest_addr); - -/** - * @brief Function for setting read data into the peripheral register (without starting the process). - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[out] p_buffer Pointer to the reading buffer. - * @param[in] length Length of the read data. - * @param[in] src_addr Address in memory to read from. - */ -__STATIC_INLINE void nrf_qspi_read_buffer_set(NRF_QSPI_Type * p_reg, - void * p_buffer, - uint32_t length, - uint32_t src_addr); - -/** - * @brief Function for setting erase data into the peripheral register (without starting the process). - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] erase_addr Start address to erase. Address must have padding set to 4 bytes. - * @param[in] len Size of erasing area. - */ -__STATIC_INLINE void nrf_qspi_erase_ptr_set(NRF_QSPI_Type * p_reg, - uint32_t erase_addr, - nrf_qspi_erase_len_t len); - -/** - * @brief Function for getting the peripheral status register. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * - * @return Peripheral status register. - */ -__STATIC_INLINE uint32_t nrf_qspi_status_reg_get(NRF_QSPI_Type const * p_reg); - -/** - * @brief Function for getting the device status register stored in the peripheral status register. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * - * @return Device status register (lower byte). - */ -__STATIC_INLINE uint8_t nrf_qspi_sreg_get(NRF_QSPI_Type const * p_reg); - -/** - * @brief Function for checking if the peripheral is busy or not. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * - * @retval true If QSPI is busy. - * @retval false If QSPI is ready. - */ -__STATIC_INLINE bool nrf_qspi_busy_check(NRF_QSPI_Type const * p_reg); - -/** - * @brief Function for setting registers sending with custom instruction transmission. - * - * This function can be ommited when using NRF_QSPI_CINSTR_LEN_1B as the length argument - * (sending only opcode without data). - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] length Length of the custom instruction data. - * @param[in] p_tx_data Pointer to the data to send with the custom instruction. - */ -__STATIC_INLINE void nrf_qspi_cinstrdata_set(NRF_QSPI_Type * p_reg, - nrf_qspi_cinstr_len_t length, - void const * p_tx_data); - -/** - * @brief Function for getting data from register after custom instruction transmission. - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] length Length of the custom instruction data. - * @param[in] p_rx_data Pointer to the reading buffer. - */ -__STATIC_INLINE void nrf_qspi_cinstrdata_get(NRF_QSPI_Type const * p_reg, - nrf_qspi_cinstr_len_t length, - void * p_rx_data); - -/** - * @brief Function for sending custom instruction to external memory. - * - * @param[in] p_reg Pointer to the peripheral register structure. - * @param[in] p_config Pointer to the custom instruction configuration structure. See @ref nrf_qspi_cinstr_conf_t. - */ - -__STATIC_INLINE void nrf_qspi_cinstr_transfer_start(NRF_QSPI_Type * p_reg, - const nrf_qspi_cinstr_conf_t * p_config); - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_qspi_task_trigger(NRF_QSPI_Type * p_reg, nrf_qspi_task_t task) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL; -} - -__STATIC_INLINE uint32_t nrf_qspi_task_address_get(NRF_QSPI_Type const * p_reg, - nrf_qspi_task_t task) -{ - return ((uint32_t)p_reg + (uint32_t)task); -} - -__STATIC_INLINE void nrf_qspi_event_clear(NRF_QSPI_Type * p_reg, nrf_qspi_event_t qspi_event) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)qspi_event)) = 0x0UL; -} - -__STATIC_INLINE bool nrf_qspi_event_check(NRF_QSPI_Type const * p_reg, nrf_qspi_event_t qspi_event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)qspi_event); -} - -__STATIC_INLINE uint32_t * nrf_qspi_event_address_get(NRF_QSPI_Type const * p_reg, - nrf_qspi_event_t qspi_event) -{ - return (uint32_t *)((uint8_t *)p_reg + (uint32_t)qspi_event); -} - -__STATIC_INLINE void nrf_qspi_int_enable(NRF_QSPI_Type * p_reg, uint32_t qspi_int_mask) -{ - p_reg->INTENSET = qspi_int_mask; -} - -__STATIC_INLINE void nrf_qspi_int_disable(NRF_QSPI_Type * p_reg, uint32_t qspi_int_mask) -{ - p_reg->INTENCLR = qspi_int_mask; -} - -__STATIC_INLINE bool nrf_qspi_int_enable_check(NRF_QSPI_Type const * p_reg, - nrf_qspi_int_mask_t qspi_int) -{ - return (bool)(p_reg->INTENSET & qspi_int); -} - -__STATIC_INLINE void nrf_qspi_enable(NRF_QSPI_Type * p_reg) -{ - p_reg->ENABLE = (QSPI_ENABLE_ENABLE_Enabled << QSPI_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_qspi_disable(NRF_QSPI_Type * p_reg) -{ - p_reg->ENABLE = (QSPI_ENABLE_ENABLE_Disabled << QSPI_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_qspi_pins_set(NRF_QSPI_Type * p_reg, const nrf_qspi_pins_t * p_pins) -{ - p_reg->PSEL.SCK = NRF_QSPI_PIN_VAL(p_pins->sck_pin); - p_reg->PSEL.CSN = NRF_QSPI_PIN_VAL(p_pins->csn_pin); - p_reg->PSEL.IO0 = NRF_QSPI_PIN_VAL(p_pins->io0_pin); - p_reg->PSEL.IO1 = NRF_QSPI_PIN_VAL(p_pins->io1_pin); - p_reg->PSEL.IO2 = NRF_QSPI_PIN_VAL(p_pins->io2_pin); - p_reg->PSEL.IO3 = NRF_QSPI_PIN_VAL(p_pins->io3_pin); -} - -__STATIC_INLINE void nrf_qspi_ifconfig0_set(NRF_QSPI_Type * p_reg, - const nrf_qspi_prot_conf_t * p_config) -{ - uint32_t config = p_config->readoc; - config |= ((uint32_t)p_config->writeoc) << QSPI_IFCONFIG0_WRITEOC_Pos; - config |= ((uint32_t)p_config->addrmode) << QSPI_IFCONFIG0_ADDRMODE_Pos; - config |= (p_config->dpmconfig ? 1U : 0U ) << QSPI_IFCONFIG0_DPMENABLE_Pos; - - p_reg->IFCONFIG0 = config; -} - -__STATIC_INLINE void nrf_qspi_ifconfig1_set(NRF_QSPI_Type * p_reg, - const nrf_qspi_phy_conf_t * p_config) -{ - // IFCONFIG1 mask for reserved fields in the register. - uint32_t config = p_reg->IFCONFIG1 & 0x00FFFF00; - config |= p_config->sck_delay; - config |= (p_config->dpmen ? 1U : 0U) << QSPI_IFCONFIG1_DPMEN_Pos; - config |= ((uint32_t)(p_config->spi_mode)) << QSPI_IFCONFIG1_SPIMODE_Pos; - config |= ((uint32_t)(p_config->sck_freq)) << QSPI_IFCONFIG1_SCKFREQ_Pos; - - p_reg->IFCONFIG1 = config; -} - -__STATIC_INLINE void nrf_qspi_addrconfig_set(NRF_QSPI_Type * p_reg, - const nrf_qspi_addrconfig_conf_t * p_config) -{ - uint32_t config = p_config->opcode; - config |= ((uint32_t)p_config->byte0) << QSPI_ADDRCONF_BYTE0_Pos; - config |= ((uint32_t)p_config->byte1) << QSPI_ADDRCONF_BYTE1_Pos; - config |= ((uint32_t)(p_config->mode)) << QSPI_ADDRCONF_MODE_Pos; - config |= (p_config->wipwait ? 1U : 0U) << QSPI_ADDRCONF_WIPWAIT_Pos; - config |= (p_config->wren ? 1U : 0U) << QSPI_ADDRCONF_WREN_Pos; - - p_reg->ADDRCONF = config; -} - -__STATIC_INLINE void nrf_qspi_write_buffer_set(NRF_QSPI_Type * p_reg, - void const * p_buffer, - uint32_t length, - uint32_t dest_addr) -{ - p_reg->WRITE.DST = dest_addr; - p_reg->WRITE.SRC = (uint32_t) p_buffer; - p_reg->WRITE.CNT = length; -} - -__STATIC_INLINE void nrf_qspi_read_buffer_set(NRF_QSPI_Type * p_reg, - void * p_buffer, - uint32_t length, - uint32_t src_addr) -{ - p_reg->READ.SRC = src_addr; - p_reg->READ.DST = (uint32_t) p_buffer; - p_reg->READ.CNT = length; -} - -__STATIC_INLINE void nrf_qspi_erase_ptr_set(NRF_QSPI_Type * p_reg, - uint32_t erase_addr, - nrf_qspi_erase_len_t len) -{ - p_reg->ERASE.PTR = erase_addr; - p_reg->ERASE.LEN = len; -} - -__STATIC_INLINE uint32_t nrf_qspi_status_reg_get(NRF_QSPI_Type const * p_reg) -{ - return p_reg->STATUS; -} - -__STATIC_INLINE uint8_t nrf_qspi_sreg_get(NRF_QSPI_Type const * p_reg) -{ - return (uint8_t)(p_reg->STATUS & QSPI_STATUS_SREG_Msk) >> QSPI_STATUS_SREG_Pos; -} - -__STATIC_INLINE bool nrf_qspi_busy_check(NRF_QSPI_Type const * p_reg) -{ - return ((p_reg->STATUS & QSPI_STATUS_READY_Msk) >> - QSPI_STATUS_READY_Pos) == QSPI_STATUS_READY_BUSY; -} - -__STATIC_INLINE void nrf_qspi_cinstrdata_set(NRF_QSPI_Type * p_reg, - nrf_qspi_cinstr_len_t length, - void const * p_tx_data) -{ - uint32_t reg = 0; - uint8_t const *p_tx_data_8 = (uint8_t const *) p_tx_data; - - // Load custom instruction. - switch (length) - { - case NRF_QSPI_CINSTR_LEN_9B: - reg |= ((uint32_t)p_tx_data_8[7]) << QSPI_CINSTRDAT1_BYTE7_Pos; - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_8B: - reg |= ((uint32_t)p_tx_data_8[6]) << QSPI_CINSTRDAT1_BYTE6_Pos; - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_7B: - reg |= ((uint32_t)p_tx_data_8[5]) << QSPI_CINSTRDAT1_BYTE5_Pos; - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_6B: - reg |= ((uint32_t)p_tx_data_8[4]); - p_reg->CINSTRDAT1 = reg; - reg = 0; - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_5B: - reg |= ((uint32_t)p_tx_data_8[3]) << QSPI_CINSTRDAT0_BYTE3_Pos; - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_4B: - reg |= ((uint32_t)p_tx_data_8[2]) << QSPI_CINSTRDAT0_BYTE2_Pos; - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_3B: - reg |= ((uint32_t)p_tx_data_8[1]) << QSPI_CINSTRDAT0_BYTE1_Pos; - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_2B: - reg |= ((uint32_t)p_tx_data_8[0]); - p_reg->CINSTRDAT0 = reg; - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_1B: - /* Send only opcode. Case to avoid compiler warnings. */ - break; - default: - break; - } -} - -__STATIC_INLINE void nrf_qspi_cinstrdata_get(NRF_QSPI_Type const * p_reg, - nrf_qspi_cinstr_len_t length, - void * p_rx_data) -{ - uint8_t *p_rx_data_8 = (uint8_t *) p_rx_data; - - uint32_t reg = p_reg->CINSTRDAT1; - switch (length) - { - case NRF_QSPI_CINSTR_LEN_9B: - p_rx_data_8[7] = (uint8_t)(reg >> QSPI_CINSTRDAT1_BYTE7_Pos); - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_8B: - p_rx_data_8[6] = (uint8_t)(reg >> QSPI_CINSTRDAT1_BYTE6_Pos); - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_7B: - p_rx_data_8[5] = (uint8_t)(reg >> QSPI_CINSTRDAT1_BYTE5_Pos); - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_6B: - p_rx_data_8[4] = (uint8_t)(reg); - /* fall-through */ - default: - break; - } - - reg = p_reg->CINSTRDAT0; - switch (length) - { - case NRF_QSPI_CINSTR_LEN_5B: - p_rx_data_8[3] = (uint8_t)(reg >> QSPI_CINSTRDAT0_BYTE3_Pos); - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_4B: - p_rx_data_8[2] = (uint8_t)(reg >> QSPI_CINSTRDAT0_BYTE2_Pos); - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_3B: - p_rx_data_8[1] = (uint8_t)(reg >> QSPI_CINSTRDAT0_BYTE1_Pos); - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_2B: - p_rx_data_8[0] = (uint8_t)(reg); - /* fall-through */ - case NRF_QSPI_CINSTR_LEN_1B: - /* Send only opcode. Case to avoid compiler warnings. */ - break; - default: - break; - } -} - -__STATIC_INLINE void nrf_qspi_cinstr_transfer_start(NRF_QSPI_Type * p_reg, - const nrf_qspi_cinstr_conf_t * p_config) -{ - p_reg->CINSTRCONF = (((uint32_t)p_config->opcode << QSPI_CINSTRCONF_OPCODE_Pos) | - ((uint32_t)p_config->length << QSPI_CINSTRCONF_LENGTH_Pos) | - ((uint32_t)p_config->io2_level << QSPI_CINSTRCONF_LIO2_Pos) | - ((uint32_t)p_config->io3_level << QSPI_CINSTRCONF_LIO3_Pos) | - ((uint32_t)p_config->wipwait << QSPI_CINSTRCONF_WIPWAIT_Pos) | - ((uint32_t)p_config->wren << QSPI_CINSTRCONF_WREN_Pos) | - ((uint32_t)p_config->lfen << QSPI_CINSTRCONF_LFEN_Pos) | - ((uint32_t)p_config->lfstop << QSPI_CINSTRCONF_LFSTOP_Pos) ); -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - -#ifdef __cplusplus -} -#endif - -#endif // NRF_QSPI_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_rng.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_rng.h deleted file mode 100644 index 9ebf81748a1..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_rng.h +++ /dev/null @@ -1,282 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @file - * @brief RNG HAL API. - */ - -#ifndef NRF_RNG_H__ -#define NRF_RNG_H__ -/** - * @defgroup nrf_rng_hal RNG HAL - * @{ - * @ingroup nrf_rng - * @brief Hardware access layer for managing the random number generator (RNG). - */ - -#include -#include -#include -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#define NRF_RNG_TASK_SET (1UL) -#define NRF_RNG_EVENT_CLEAR (0UL) -/** - * @enum nrf_rng_task_t - * @brief RNG tasks. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_RNG_TASK_START = offsetof(NRF_RNG_Type, TASKS_START), /**< Start the random number generator. */ - NRF_RNG_TASK_STOP = offsetof(NRF_RNG_Type, TASKS_STOP) /**< Stop the random number generator. */ -} nrf_rng_task_t; /*lint -restore */ - -/** - * @enum nrf_rng_event_t - * @brief RNG events. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_RNG_EVENT_VALRDY = offsetof(NRF_RNG_Type, EVENTS_VALRDY) /**< New random number generated event. */ -} nrf_rng_event_t; /*lint -restore */ - -/** - * @enum nrf_rng_int_mask_t - * @brief RNG interrupts. - */ -typedef enum -{ - NRF_RNG_INT_VALRDY_MASK = RNG_INTENSET_VALRDY_Msk /**< Mask for enabling or disabling an interrupt on VALRDY event. */ -} nrf_rng_int_mask_t; - -/** - * @enum nrf_rng_short_mask_t - * @brief Types of RNG shortcuts. - */ -typedef enum -{ - NRF_RNG_SHORT_VALRDY_STOP_MASK = RNG_SHORTS_VALRDY_STOP_Msk /**< Mask for setting shortcut between EVENT_VALRDY and TASK_STOP. */ -} nrf_rng_short_mask_t; - -/** - * @brief Function for enabling interrupts. - * - * @param[in] rng_int_mask Mask of interrupts. - */ -__STATIC_INLINE void nrf_rng_int_enable(uint32_t rng_int_mask); - -/** - * @brief Function for disabling interrupts. - * - * @param[in] rng_int_mask Mask of interrupts. - */ -__STATIC_INLINE void nrf_rng_int_disable(uint32_t rng_int_mask); - -/** - * @brief Function for getting the state of a specific interrupt. - * - * @param[in] rng_int_mask Interrupt. - * - * @retval true If the interrupt is not enabled. - * @retval false If the interrupt is enabled. - */ -__STATIC_INLINE bool nrf_rng_int_get(nrf_rng_int_mask_t rng_int_mask); - -/** - * @brief Function for getting the address of a specific task. - * - * This function can be used by the PPI module. - * - * @param[in] rng_task Task. - */ -__STATIC_INLINE uint32_t * nrf_rng_task_address_get(nrf_rng_task_t rng_task); - -/** - * @brief Function for setting a specific task. - * - * @param[in] rng_task Task. - */ -__STATIC_INLINE void nrf_rng_task_trigger(nrf_rng_task_t rng_task); - -/** - * @brief Function for getting address of a specific event. - * - * This function can be used by the PPI module. - * - * @param[in] rng_event Event. - */ -__STATIC_INLINE uint32_t * nrf_rng_event_address_get(nrf_rng_event_t rng_event); - -/** - * @brief Function for clearing a specific event. - * - * @param[in] rng_event Event. - */ -__STATIC_INLINE void nrf_rng_event_clear(nrf_rng_event_t rng_event); - -/** - * @brief Function for getting the state of a specific event. - * - * @param[in] rng_event Event. - * - * @retval true If the event is not set. - * @retval false If the event is set. - */ -__STATIC_INLINE bool nrf_rng_event_get(nrf_rng_event_t rng_event); - -/** - * @brief Function for setting shortcuts. - * - * @param[in] rng_short_mask Mask of shortcuts. - * - */ -__STATIC_INLINE void nrf_rng_shorts_enable(uint32_t rng_short_mask); - -/** - * @brief Function for clearing shortcuts. - * - * @param[in] rng_short_mask Mask of shortcuts. - * - */ -__STATIC_INLINE void nrf_rng_shorts_disable(uint32_t rng_short_mask); - -/** - * @brief Function for getting the previously generated random value. - * - * @return Previously generated random value. - */ -__STATIC_INLINE uint8_t nrf_rng_random_value_get(void); - -/** - * @brief Function for enabling digital error correction. - */ -__STATIC_INLINE void nrf_rng_error_correction_enable(void); - -/** - * @brief Function for disabling digital error correction. - */ -__STATIC_INLINE void nrf_rng_error_correction_disable(void); - -/** - *@} - **/ - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_rng_int_enable(uint32_t rng_int_mask) -{ - NRF_RNG->INTENSET = rng_int_mask; -} - -__STATIC_INLINE void nrf_rng_int_disable(uint32_t rng_int_mask) -{ - NRF_RNG->INTENCLR = rng_int_mask; -} - -__STATIC_INLINE bool nrf_rng_int_get(nrf_rng_int_mask_t rng_int_mask) -{ - return (bool)(NRF_RNG->INTENCLR & rng_int_mask); -} - -__STATIC_INLINE uint32_t * nrf_rng_task_address_get(nrf_rng_task_t rng_task) -{ - return (uint32_t *)((uint8_t *)NRF_RNG + rng_task); -} - -__STATIC_INLINE void nrf_rng_task_trigger(nrf_rng_task_t rng_task) -{ - *((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_task)) = NRF_RNG_TASK_SET; -} - -__STATIC_INLINE uint32_t * nrf_rng_event_address_get(nrf_rng_event_t rng_event) -{ - return (uint32_t *)((uint8_t *)NRF_RNG + rng_event); -} - -__STATIC_INLINE void nrf_rng_event_clear(nrf_rng_event_t rng_event) -{ - *((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event)) = NRF_RNG_EVENT_CLEAR; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event)); - (void)dummy; -#endif -} - -__STATIC_INLINE bool nrf_rng_event_get(nrf_rng_event_t rng_event) -{ - return (bool) * ((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event)); -} - -__STATIC_INLINE void nrf_rng_shorts_enable(uint32_t rng_short_mask) -{ - NRF_RNG->SHORTS |= rng_short_mask; -} - -__STATIC_INLINE void nrf_rng_shorts_disable(uint32_t rng_short_mask) -{ - NRF_RNG->SHORTS &= ~rng_short_mask; -} - -__STATIC_INLINE uint8_t nrf_rng_random_value_get(void) -{ - return (uint8_t)(NRF_RNG->VALUE & RNG_VALUE_VALUE_Msk); -} - -__STATIC_INLINE void nrf_rng_error_correction_enable(void) -{ - NRF_RNG->CONFIG |= RNG_CONFIG_DERCEN_Msk; -} - -__STATIC_INLINE void nrf_rng_error_correction_disable(void) -{ - NRF_RNG->CONFIG &= ~RNG_CONFIG_DERCEN_Msk; -} - -#endif - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_RNG_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_rtc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_rtc.h deleted file mode 100644 index 1b1f83988ed..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_rtc.h +++ /dev/null @@ -1,343 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @file - * @brief RTC HAL API. - */ - -#ifndef NRF_RTC_H -#define NRF_RTC_H - -/** - * @defgroup nrf_rtc_hal RTC HAL - * @{ - * @ingroup nrf_rtc - * @brief Hardware access layer for managing the real time counter (RTC). - */ - -#include -#include -#include -#include "nrf.h" -#include "nrf_assert.h" -#include "nrf_peripherals.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Macro for getting the number of compare channels available - * in a given RTC instance. - */ - -#define NRF_RTC_CC_CHANNEL_COUNT(id) CONCAT_3(RTC, id, _CC_NUM) - -#define RTC_INPUT_FREQ 32768 /**< Input frequency of the RTC instance. */ - -/** - * @brief Macro for converting expected frequency to prescaler setting. - */ -#define RTC_FREQ_TO_PRESCALER(FREQ) (uint16_t)(((RTC_INPUT_FREQ) / (FREQ)) - 1) - -/**< Macro for wrapping values to RTC capacity. */ -#define RTC_WRAP(val) ((val) & RTC_COUNTER_COUNTER_Msk) - -#define RTC_CHANNEL_INT_MASK(ch) ((uint32_t)(NRF_RTC_INT_COMPARE0_MASK) << (ch)) -#define RTC_CHANNEL_EVENT_ADDR(ch) (nrf_rtc_event_t)((NRF_RTC_EVENT_COMPARE_0) + (ch) * sizeof(uint32_t)) -/** - * @enum nrf_rtc_task_t - * @brief RTC tasks. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_RTC_TASK_START = offsetof(NRF_RTC_Type,TASKS_START), /**< Start. */ - NRF_RTC_TASK_STOP = offsetof(NRF_RTC_Type,TASKS_STOP), /**< Stop. */ - NRF_RTC_TASK_CLEAR = offsetof(NRF_RTC_Type,TASKS_CLEAR), /**< Clear. */ - NRF_RTC_TASK_TRIGGER_OVERFLOW = offsetof(NRF_RTC_Type,TASKS_TRIGOVRFLW),/**< Trigger overflow. */ - /*lint -restore*/ -} nrf_rtc_task_t; - -/** - * @enum nrf_rtc_event_t - * @brief RTC events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_RTC_EVENT_TICK = offsetof(NRF_RTC_Type,EVENTS_TICK), /**< Tick event. */ - NRF_RTC_EVENT_OVERFLOW = offsetof(NRF_RTC_Type,EVENTS_OVRFLW), /**< Overflow event. */ - NRF_RTC_EVENT_COMPARE_0 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[0]), /**< Compare 0 event. */ - NRF_RTC_EVENT_COMPARE_1 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[1]), /**< Compare 1 event. */ - NRF_RTC_EVENT_COMPARE_2 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[2]), /**< Compare 2 event. */ - NRF_RTC_EVENT_COMPARE_3 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[3]) /**< Compare 3 event. */ - /*lint -restore*/ -} nrf_rtc_event_t; - -/** - * @enum nrf_rtc_int_t - * @brief RTC interrupts. - */ -typedef enum -{ - NRF_RTC_INT_TICK_MASK = RTC_INTENSET_TICK_Msk, /**< RTC interrupt from tick event. */ - NRF_RTC_INT_OVERFLOW_MASK = RTC_INTENSET_OVRFLW_Msk, /**< RTC interrupt from overflow event. */ - NRF_RTC_INT_COMPARE0_MASK = RTC_INTENSET_COMPARE0_Msk, /**< RTC interrupt from compare event on channel 0. */ - NRF_RTC_INT_COMPARE1_MASK = RTC_INTENSET_COMPARE1_Msk, /**< RTC interrupt from compare event on channel 1. */ - NRF_RTC_INT_COMPARE2_MASK = RTC_INTENSET_COMPARE2_Msk, /**< RTC interrupt from compare event on channel 2. */ - NRF_RTC_INT_COMPARE3_MASK = RTC_INTENSET_COMPARE3_Msk /**< RTC interrupt from compare event on channel 3. */ -} nrf_rtc_int_t; - -/**@brief Function for setting a compare value for a channel. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] ch Channel. - * @param[in] cc_val Compare value to set. - */ -__STATIC_INLINE void nrf_rtc_cc_set(NRF_RTC_Type * p_rtc, uint32_t ch, uint32_t cc_val); - -/**@brief Function for returning the compare value for a channel. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] ch Channel. - * - * @return COMPARE[ch] value. - */ -__STATIC_INLINE uint32_t nrf_rtc_cc_get(NRF_RTC_Type * p_rtc, uint32_t ch); - -/**@brief Function for enabling interrupts. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] mask Interrupt mask to be enabled. - */ -__STATIC_INLINE void nrf_rtc_int_enable(NRF_RTC_Type * p_rtc, uint32_t mask); - -/**@brief Function for disabling interrupts. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] mask Interrupt mask to be disabled. - */ -__STATIC_INLINE void nrf_rtc_int_disable(NRF_RTC_Type * p_rtc, uint32_t mask); - -/**@brief Function for checking if interrupts are enabled. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] mask Mask of interrupt flags to check. - * - * @return Mask with enabled interrupts. - */ -__STATIC_INLINE uint32_t nrf_rtc_int_is_enabled(NRF_RTC_Type * p_rtc, uint32_t mask); - -/**@brief Function for returning the status of currently enabled interrupts. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * - * @return Value in INTEN register. - */ -__STATIC_INLINE uint32_t nrf_rtc_int_get(NRF_RTC_Type * p_rtc); - -/**@brief Function for checking if an event is pending. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] event Address of the event. - * - * @return Mask of pending events. - */ -__STATIC_INLINE uint32_t nrf_rtc_event_pending(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event); - -/**@brief Function for clearing an event. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] event Event to clear. - */ -__STATIC_INLINE void nrf_rtc_event_clear(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event); - -/**@brief Function for returning a counter value. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * - * @return Counter value. - */ -__STATIC_INLINE uint32_t nrf_rtc_counter_get(NRF_RTC_Type * p_rtc); - -/**@brief Function for setting a prescaler value. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] val Value to set the prescaler to. - */ -__STATIC_INLINE void nrf_rtc_prescaler_set(NRF_RTC_Type * p_rtc, uint32_t val); - -/**@brief Function for returning the address of an event. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] event Requested event. - * - * @return Address of the requested event register. - */ -__STATIC_INLINE uint32_t nrf_rtc_event_address_get(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event); - -/**@brief Function for returning the address of a task. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] task Requested task. - * - * @return Address of the requested task register. - */ -__STATIC_INLINE uint32_t nrf_rtc_task_address_get(NRF_RTC_Type * p_rtc, nrf_rtc_task_t task); - -/**@brief Function for starting a task. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] task Requested task. - */ -__STATIC_INLINE void nrf_rtc_task_trigger(NRF_RTC_Type * p_rtc, nrf_rtc_task_t task); - -/**@brief Function for enabling events. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] mask Mask of event flags to enable. - */ -__STATIC_INLINE void nrf_rtc_event_enable(NRF_RTC_Type * p_rtc, uint32_t mask); - -/**@brief Function for disabling an event. - * - * @param[in] p_rtc Pointer to the peripheral registers structure. - * @param[in] event Requested event. - */ -__STATIC_INLINE void nrf_rtc_event_disable(NRF_RTC_Type * p_rtc, uint32_t event); - -/** - *@} - **/ - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_rtc_cc_set(NRF_RTC_Type * p_rtc, uint32_t ch, uint32_t cc_val) -{ - p_rtc->CC[ch] = cc_val; -} - -__STATIC_INLINE uint32_t nrf_rtc_cc_get(NRF_RTC_Type * p_rtc, uint32_t ch) -{ - return p_rtc->CC[ch]; -} - -__STATIC_INLINE void nrf_rtc_int_enable(NRF_RTC_Type * p_rtc, uint32_t mask) -{ - p_rtc->INTENSET = mask; -} - -__STATIC_INLINE void nrf_rtc_int_disable(NRF_RTC_Type * p_rtc, uint32_t mask) -{ - p_rtc->INTENCLR = mask; -} - -__STATIC_INLINE uint32_t nrf_rtc_int_is_enabled(NRF_RTC_Type * p_rtc, uint32_t mask) -{ - return (p_rtc->INTENSET & mask); -} - -__STATIC_INLINE uint32_t nrf_rtc_int_get(NRF_RTC_Type * p_rtc) -{ - return p_rtc->INTENSET; -} - -__STATIC_INLINE uint32_t nrf_rtc_event_pending(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event) -{ - return *(volatile uint32_t *)((uint8_t *)p_rtc + (uint32_t)event); -} - -__STATIC_INLINE void nrf_rtc_event_clear(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event) -{ - *((volatile uint32_t *)((uint8_t *)p_rtc + (uint32_t)event)) = 0; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_rtc + (uint32_t)event)); - (void)dummy; -#endif -} - -__STATIC_INLINE uint32_t nrf_rtc_counter_get(NRF_RTC_Type * p_rtc) -{ - return p_rtc->COUNTER; -} - -__STATIC_INLINE void nrf_rtc_prescaler_set(NRF_RTC_Type * p_rtc, uint32_t val) -{ - ASSERT(val <= (RTC_PRESCALER_PRESCALER_Msk >> RTC_PRESCALER_PRESCALER_Pos)); - p_rtc->PRESCALER = val; -} -__STATIC_INLINE uint32_t rtc_prescaler_get(NRF_RTC_Type * p_rtc) -{ - return p_rtc->PRESCALER; -} - -__STATIC_INLINE uint32_t nrf_rtc_event_address_get(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event) -{ - return (uint32_t)p_rtc + event; -} - -__STATIC_INLINE uint32_t nrf_rtc_task_address_get(NRF_RTC_Type * p_rtc, nrf_rtc_task_t task) -{ - return (uint32_t)p_rtc + task; -} - -__STATIC_INLINE void nrf_rtc_task_trigger(NRF_RTC_Type * p_rtc, nrf_rtc_task_t task) -{ - *(__IO uint32_t *)((uint32_t)p_rtc + task) = 1; -} - -__STATIC_INLINE void nrf_rtc_event_enable(NRF_RTC_Type * p_rtc, uint32_t mask) -{ - p_rtc->EVTENSET = mask; -} -__STATIC_INLINE void nrf_rtc_event_disable(NRF_RTC_Type * p_rtc, uint32_t mask) -{ - p_rtc->EVTENCLR = mask; -} -#endif - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_RTC_H */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_saadc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_saadc.c deleted file mode 100644 index c028eaa49e7..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_saadc.c +++ /dev/null @@ -1,62 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @file - * @brief SAADC HAL implementation - */ -#include "sdk_config.h" -#if SAADC_ENABLED -#include "nrf_saadc.h" - -void nrf_saadc_channel_init(uint8_t channel, nrf_saadc_channel_config_t const * const config) -{ - NRF_SAADC->CH[channel].CONFIG = - ((config->resistor_p << SAADC_CH_CONFIG_RESP_Pos) & SAADC_CH_CONFIG_RESP_Msk) - | ((config->resistor_n << SAADC_CH_CONFIG_RESN_Pos) & SAADC_CH_CONFIG_RESN_Msk) - | ((config->gain << SAADC_CH_CONFIG_GAIN_Pos) & SAADC_CH_CONFIG_GAIN_Msk) - | ((config->reference << SAADC_CH_CONFIG_REFSEL_Pos) & SAADC_CH_CONFIG_REFSEL_Msk) - | ((config->acq_time << SAADC_CH_CONFIG_TACQ_Pos) & SAADC_CH_CONFIG_TACQ_Msk) - | ((config->mode << SAADC_CH_CONFIG_MODE_Pos) & SAADC_CH_CONFIG_MODE_Msk) - | ((config->burst << SAADC_CH_CONFIG_BURST_Pos) & SAADC_CH_CONFIG_BURST_Msk); - nrf_saadc_channel_input_set(channel, config->pin_p, config->pin_n); - return; -} -#endif //SAADC_ENABLED - diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_saadc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_saadc.h deleted file mode 100644 index 73eb8128b18..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_saadc.h +++ /dev/null @@ -1,609 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_SAADC_H_ -#define NRF_SAADC_H_ - -/** - * @defgroup nrf_saadc_hal SAADC HAL - * @{ - * @ingroup nrf_saadc - * - * @brief @tagAPI52 Hardware access layer for accessing the SAADC peripheral. - */ - -#include -#include -#include "nrf.h" -#include "nrf_assert.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#define NRF_SAADC_CHANNEL_COUNT 8 - -/** - * @brief Resolution of the analog-to-digital converter. - */ -typedef enum -{ - NRF_SAADC_RESOLUTION_8BIT = SAADC_RESOLUTION_VAL_8bit, ///< 8 bit resolution. - NRF_SAADC_RESOLUTION_10BIT = SAADC_RESOLUTION_VAL_10bit, ///< 10 bit resolution. - NRF_SAADC_RESOLUTION_12BIT = SAADC_RESOLUTION_VAL_12bit, ///< 12 bit resolution. - NRF_SAADC_RESOLUTION_14BIT = SAADC_RESOLUTION_VAL_14bit ///< 14 bit resolution. -} nrf_saadc_resolution_t; - - -/** - * @brief Input selection for the analog-to-digital converter. - */ -typedef enum -{ - NRF_SAADC_INPUT_DISABLED = SAADC_CH_PSELP_PSELP_NC, ///< Not connected. - NRF_SAADC_INPUT_AIN0 = SAADC_CH_PSELP_PSELP_AnalogInput0, ///< Analog input 0 (AIN0). - NRF_SAADC_INPUT_AIN1 = SAADC_CH_PSELP_PSELP_AnalogInput1, ///< Analog input 1 (AIN1). - NRF_SAADC_INPUT_AIN2 = SAADC_CH_PSELP_PSELP_AnalogInput2, ///< Analog input 2 (AIN2). - NRF_SAADC_INPUT_AIN3 = SAADC_CH_PSELP_PSELP_AnalogInput3, ///< Analog input 3 (AIN3). - NRF_SAADC_INPUT_AIN4 = SAADC_CH_PSELP_PSELP_AnalogInput4, ///< Analog input 4 (AIN4). - NRF_SAADC_INPUT_AIN5 = SAADC_CH_PSELP_PSELP_AnalogInput5, ///< Analog input 5 (AIN5). - NRF_SAADC_INPUT_AIN6 = SAADC_CH_PSELP_PSELP_AnalogInput6, ///< Analog input 6 (AIN6). - NRF_SAADC_INPUT_AIN7 = SAADC_CH_PSELP_PSELP_AnalogInput7, ///< Analog input 7 (AIN7). - NRF_SAADC_INPUT_VDD = SAADC_CH_PSELP_PSELP_VDD ///< VDD as input. -} nrf_saadc_input_t; - - -/** - * @brief Analog-to-digital converter oversampling mode. - */ -typedef enum -{ - NRF_SAADC_OVERSAMPLE_DISABLED = SAADC_OVERSAMPLE_OVERSAMPLE_Bypass, ///< No oversampling. - NRF_SAADC_OVERSAMPLE_2X = SAADC_OVERSAMPLE_OVERSAMPLE_Over2x, ///< Oversample 2x. - NRF_SAADC_OVERSAMPLE_4X = SAADC_OVERSAMPLE_OVERSAMPLE_Over4x, ///< Oversample 4x. - NRF_SAADC_OVERSAMPLE_8X = SAADC_OVERSAMPLE_OVERSAMPLE_Over8x, ///< Oversample 8x. - NRF_SAADC_OVERSAMPLE_16X = SAADC_OVERSAMPLE_OVERSAMPLE_Over16x, ///< Oversample 16x. - NRF_SAADC_OVERSAMPLE_32X = SAADC_OVERSAMPLE_OVERSAMPLE_Over32x, ///< Oversample 32x. - NRF_SAADC_OVERSAMPLE_64X = SAADC_OVERSAMPLE_OVERSAMPLE_Over64x, ///< Oversample 64x. - NRF_SAADC_OVERSAMPLE_128X = SAADC_OVERSAMPLE_OVERSAMPLE_Over128x, ///< Oversample 128x. - NRF_SAADC_OVERSAMPLE_256X = SAADC_OVERSAMPLE_OVERSAMPLE_Over256x ///< Oversample 256x. -} nrf_saadc_oversample_t; - - -/** - * @brief Analog-to-digital converter channel resistor control. - */ -typedef enum -{ - NRF_SAADC_RESISTOR_DISABLED = SAADC_CH_CONFIG_RESP_Bypass, ///< Bypass resistor ladder. - NRF_SAADC_RESISTOR_PULLDOWN = SAADC_CH_CONFIG_RESP_Pulldown, ///< Pull-down to GND. - NRF_SAADC_RESISTOR_PULLUP = SAADC_CH_CONFIG_RESP_Pullup, ///< Pull-up to VDD. - NRF_SAADC_RESISTOR_VDD1_2 = SAADC_CH_CONFIG_RESP_VDD1_2 ///< Set input at VDD/2. -} nrf_saadc_resistor_t; - - -/** - * @brief Gain factor of the analog-to-digital converter input. - */ -typedef enum -{ - NRF_SAADC_GAIN1_6 = SAADC_CH_CONFIG_GAIN_Gain1_6, ///< Gain factor 1/6. - NRF_SAADC_GAIN1_5 = SAADC_CH_CONFIG_GAIN_Gain1_5, ///< Gain factor 1/5. - NRF_SAADC_GAIN1_4 = SAADC_CH_CONFIG_GAIN_Gain1_4, ///< Gain factor 1/4. - NRF_SAADC_GAIN1_3 = SAADC_CH_CONFIG_GAIN_Gain1_3, ///< Gain factor 1/3. - NRF_SAADC_GAIN1_2 = SAADC_CH_CONFIG_GAIN_Gain1_2, ///< Gain factor 1/2. - NRF_SAADC_GAIN1 = SAADC_CH_CONFIG_GAIN_Gain1, ///< Gain factor 1. - NRF_SAADC_GAIN2 = SAADC_CH_CONFIG_GAIN_Gain2, ///< Gain factor 2. - NRF_SAADC_GAIN4 = SAADC_CH_CONFIG_GAIN_Gain4, ///< Gain factor 4. -} nrf_saadc_gain_t; - - -/** - * @brief Reference selection for the analog-to-digital converter. - */ -typedef enum -{ - NRF_SAADC_REFERENCE_INTERNAL = SAADC_CH_CONFIG_REFSEL_Internal, ///< Internal reference (0.6 V). - NRF_SAADC_REFERENCE_VDD4 = SAADC_CH_CONFIG_REFSEL_VDD1_4 ///< VDD/4 as reference. -} nrf_saadc_reference_t; - - -/** - * @brief Analog-to-digital converter acquisition time. - */ -typedef enum -{ - NRF_SAADC_ACQTIME_3US = SAADC_CH_CONFIG_TACQ_3us, ///< 3 us. - NRF_SAADC_ACQTIME_5US = SAADC_CH_CONFIG_TACQ_5us, ///< 5 us. - NRF_SAADC_ACQTIME_10US = SAADC_CH_CONFIG_TACQ_10us, ///< 10 us. - NRF_SAADC_ACQTIME_15US = SAADC_CH_CONFIG_TACQ_15us, ///< 15 us. - NRF_SAADC_ACQTIME_20US = SAADC_CH_CONFIG_TACQ_20us, ///< 20 us. - NRF_SAADC_ACQTIME_40US = SAADC_CH_CONFIG_TACQ_40us ///< 40 us. -} nrf_saadc_acqtime_t; - - -/** - * @brief Analog-to-digital converter channel mode. - */ -typedef enum -{ - NRF_SAADC_MODE_SINGLE_ENDED = SAADC_CH_CONFIG_MODE_SE, ///< Single ended, PSELN will be ignored, negative input to ADC shorted to GND. - NRF_SAADC_MODE_DIFFERENTIAL = SAADC_CH_CONFIG_MODE_Diff ///< Differential mode. -} nrf_saadc_mode_t; - - -/** - * @brief Analog-to-digital converter channel burst mode. - */ -typedef enum -{ - NRF_SAADC_BURST_DISABLED = SAADC_CH_CONFIG_BURST_Disabled, ///< Burst mode is disabled (normal operation). - NRF_SAADC_BURST_ENABLED = SAADC_CH_CONFIG_BURST_Enabled ///< Burst mode is enabled. SAADC takes 2^OVERSAMPLE number of samples as fast as it can, and sends the average to Data RAM. -} nrf_saadc_burst_t; - - -/** - * @brief Analog-to-digital converter tasks. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_SAADC_TASK_START = offsetof(NRF_SAADC_Type, TASKS_START), ///< Start the ADC and prepare the result buffer in RAM. - NRF_SAADC_TASK_SAMPLE = offsetof(NRF_SAADC_Type, TASKS_SAMPLE), ///< Take one ADC sample. If scan is enabled, all channels are sampled. - NRF_SAADC_TASK_STOP = offsetof(NRF_SAADC_Type, TASKS_STOP), ///< Stop the ADC and terminate any on-going conversion. - NRF_SAADC_TASK_CALIBRATEOFFSET = offsetof(NRF_SAADC_Type, TASKS_CALIBRATEOFFSET), ///< Starts offset auto-calibration. -} nrf_saadc_task_t; - - -/** - * @brief Analog-to-digital converter events. - */ -typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */ -{ - NRF_SAADC_EVENT_STARTED = offsetof(NRF_SAADC_Type, EVENTS_STARTED), ///< The ADC has started. - NRF_SAADC_EVENT_END = offsetof(NRF_SAADC_Type, EVENTS_END), ///< The ADC has filled up the result buffer. - NRF_SAADC_EVENT_DONE = offsetof(NRF_SAADC_Type, EVENTS_DONE), ///< A conversion task has been completed. - NRF_SAADC_EVENT_RESULTDONE = offsetof(NRF_SAADC_Type, EVENTS_RESULTDONE), ///< A result is ready to get transferred to RAM. - NRF_SAADC_EVENT_CALIBRATEDONE = offsetof(NRF_SAADC_Type, EVENTS_CALIBRATEDONE), ///< Calibration is complete. - NRF_SAADC_EVENT_STOPPED = offsetof(NRF_SAADC_Type, EVENTS_STOPPED), ///< The ADC has stopped. - NRF_SAADC_EVENT_CH0_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[0].LIMITH), ///< Last result is equal or above CH[0].LIMIT.HIGH. - NRF_SAADC_EVENT_CH0_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[0].LIMITL), ///< Last result is equal or below CH[0].LIMIT.LOW. - NRF_SAADC_EVENT_CH1_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[1].LIMITH), ///< Last result is equal or above CH[1].LIMIT.HIGH. - NRF_SAADC_EVENT_CH1_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[1].LIMITL), ///< Last result is equal or below CH[1].LIMIT.LOW. - NRF_SAADC_EVENT_CH2_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[2].LIMITH), ///< Last result is equal or above CH[2].LIMIT.HIGH. - NRF_SAADC_EVENT_CH2_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[2].LIMITL), ///< Last result is equal or below CH[2].LIMIT.LOW. - NRF_SAADC_EVENT_CH3_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[3].LIMITH), ///< Last result is equal or above CH[3].LIMIT.HIGH. - NRF_SAADC_EVENT_CH3_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[3].LIMITL), ///< Last result is equal or below CH[3].LIMIT.LOW. - NRF_SAADC_EVENT_CH4_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[4].LIMITH), ///< Last result is equal or above CH[4].LIMIT.HIGH. - NRF_SAADC_EVENT_CH4_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[4].LIMITL), ///< Last result is equal or below CH[4].LIMIT.LOW. - NRF_SAADC_EVENT_CH5_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[5].LIMITH), ///< Last result is equal or above CH[5].LIMIT.HIGH. - NRF_SAADC_EVENT_CH5_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[5].LIMITL), ///< Last result is equal or below CH[5].LIMIT.LOW. - NRF_SAADC_EVENT_CH6_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[6].LIMITH), ///< Last result is equal or above CH[6].LIMIT.HIGH. - NRF_SAADC_EVENT_CH6_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[6].LIMITL), ///< Last result is equal or below CH[6].LIMIT.LOW. - NRF_SAADC_EVENT_CH7_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[7].LIMITH), ///< Last result is equal or above CH[7].LIMIT.HIGH. - NRF_SAADC_EVENT_CH7_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[7].LIMITL) ///< Last result is equal or below CH[7].LIMIT.LOW. -} nrf_saadc_event_t; - - -/** - * @brief Analog-to-digital converter interrupt masks. - */ -typedef enum -{ - NRF_SAADC_INT_STARTED = SAADC_INTENSET_STARTED_Msk, ///< Interrupt on EVENTS_STARTED event. - NRF_SAADC_INT_END = SAADC_INTENSET_END_Msk, ///< Interrupt on EVENTS_END event. - NRF_SAADC_INT_DONE = SAADC_INTENSET_DONE_Msk, ///< Interrupt on EVENTS_DONE event. - NRF_SAADC_INT_RESULTDONE = SAADC_INTENSET_RESULTDONE_Msk, ///< Interrupt on EVENTS_RESULTDONE event. - NRF_SAADC_INT_CALIBRATEDONE = SAADC_INTENSET_CALIBRATEDONE_Msk, ///< Interrupt on EVENTS_CALIBRATEDONE event. - NRF_SAADC_INT_STOPPED = SAADC_INTENSET_STOPPED_Msk, ///< Interrupt on EVENTS_STOPPED event. - NRF_SAADC_INT_CH0LIMITH = SAADC_INTENSET_CH0LIMITH_Msk, ///< Interrupt on EVENTS_CH[0].LIMITH event. - NRF_SAADC_INT_CH0LIMITL = SAADC_INTENSET_CH0LIMITL_Msk, ///< Interrupt on EVENTS_CH[0].LIMITL event. - NRF_SAADC_INT_CH1LIMITH = SAADC_INTENSET_CH1LIMITH_Msk, ///< Interrupt on EVENTS_CH[1].LIMITH event. - NRF_SAADC_INT_CH1LIMITL = SAADC_INTENSET_CH1LIMITL_Msk, ///< Interrupt on EVENTS_CH[1].LIMITL event. - NRF_SAADC_INT_CH2LIMITH = SAADC_INTENSET_CH2LIMITH_Msk, ///< Interrupt on EVENTS_CH[2].LIMITH event. - NRF_SAADC_INT_CH2LIMITL = SAADC_INTENSET_CH2LIMITL_Msk, ///< Interrupt on EVENTS_CH[2].LIMITL event. - NRF_SAADC_INT_CH3LIMITH = SAADC_INTENSET_CH3LIMITH_Msk, ///< Interrupt on EVENTS_CH[3].LIMITH event. - NRF_SAADC_INT_CH3LIMITL = SAADC_INTENSET_CH3LIMITL_Msk, ///< Interrupt on EVENTS_CH[3].LIMITL event. - NRF_SAADC_INT_CH4LIMITH = SAADC_INTENSET_CH4LIMITH_Msk, ///< Interrupt on EVENTS_CH[4].LIMITH event. - NRF_SAADC_INT_CH4LIMITL = SAADC_INTENSET_CH4LIMITL_Msk, ///< Interrupt on EVENTS_CH[4].LIMITL event. - NRF_SAADC_INT_CH5LIMITH = SAADC_INTENSET_CH5LIMITH_Msk, ///< Interrupt on EVENTS_CH[5].LIMITH event. - NRF_SAADC_INT_CH5LIMITL = SAADC_INTENSET_CH5LIMITL_Msk, ///< Interrupt on EVENTS_CH[5].LIMITL event. - NRF_SAADC_INT_CH6LIMITH = SAADC_INTENSET_CH6LIMITH_Msk, ///< Interrupt on EVENTS_CH[6].LIMITH event. - NRF_SAADC_INT_CH6LIMITL = SAADC_INTENSET_CH6LIMITL_Msk, ///< Interrupt on EVENTS_CH[6].LIMITL event. - NRF_SAADC_INT_CH7LIMITH = SAADC_INTENSET_CH7LIMITH_Msk, ///< Interrupt on EVENTS_CH[7].LIMITH event. - NRF_SAADC_INT_CH7LIMITL = SAADC_INTENSET_CH7LIMITL_Msk, ///< Interrupt on EVENTS_CH[7].LIMITL event. - NRF_SAADC_INT_ALL = 0x7FFFFFFFUL ///< Mask of all interrupts. -} nrf_saadc_int_mask_t; - - -/** - * @brief Analog-to-digital converter value limit type. - */ -typedef enum -{ - NRF_SAADC_LIMIT_LOW = 0, - NRF_SAADC_LIMIT_HIGH = 1 -} nrf_saadc_limit_t; - - -typedef int16_t nrf_saadc_value_t; ///< Type of a single ADC conversion result. - - -/** - * @brief Analog-to-digital converter configuration structure. - */ -typedef struct -{ - nrf_saadc_resolution_t resolution; - nrf_saadc_oversample_t oversample; - nrf_saadc_value_t * buffer; - uint32_t buffer_size; -} nrf_saadc_config_t; - - -/** - * @brief Analog-to-digital converter channel configuration structure. - */ -typedef struct -{ - nrf_saadc_resistor_t resistor_p; - nrf_saadc_resistor_t resistor_n; - nrf_saadc_gain_t gain; - nrf_saadc_reference_t reference; - nrf_saadc_acqtime_t acq_time; - nrf_saadc_mode_t mode; - nrf_saadc_burst_t burst; - nrf_saadc_input_t pin_p; - nrf_saadc_input_t pin_n; -} nrf_saadc_channel_config_t; - - -/** - * @brief Function for triggering a specific SAADC task. - * - * @param[in] saadc_task SAADC task. - */ -__STATIC_INLINE void nrf_saadc_task_trigger(nrf_saadc_task_t saadc_task) -{ - *((volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)saadc_task)) = 0x1UL; -} - - -/** - * @brief Function for getting the address of a specific SAADC task register. - * - * @param[in] saadc_task SAADC task. - * - * @return Address of the specified SAADC task. - */ -__STATIC_INLINE uint32_t nrf_saadc_task_address_get(nrf_saadc_task_t saadc_task) -{ - return (uint32_t)((uint8_t *)NRF_SAADC + (uint32_t)saadc_task); -} - - -/** - * @brief Function for getting the state of a specific SAADC event. - * - * @param[in] saadc_event SAADC event. - * - * @return State of the specified SAADC event. - */ -__STATIC_INLINE bool nrf_saadc_event_check(nrf_saadc_event_t saadc_event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)saadc_event); -} - - -/** - * @brief Function for clearing the specific SAADC event. - * - * @param[in] saadc_event SAADC event. - */ -__STATIC_INLINE void nrf_saadc_event_clear(nrf_saadc_event_t saadc_event) -{ - *((volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)saadc_event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)saadc_event)); - (void)dummy; -#endif -} - - -/** - * @brief Function for getting the address of a specific SAADC event register. - * - * @param[in] saadc_event SAADC event. - * - * @return Address of the specified SAADC event. - */ -__STATIC_INLINE uint32_t nrf_saadc_event_address_get(nrf_saadc_event_t saadc_event) -{ - return (uint32_t )((uint8_t *)NRF_SAADC + (uint32_t)saadc_event); -} - - -/** - * @brief Function for getting the address of a specific SAADC limit event register. - * - * @param[in] channel Channel number. - * @param[in] limit_type Low limit or high limit. - * - * @return Address of the specified SAADC limit event. - */ -__STATIC_INLINE volatile uint32_t * nrf_saadc_event_limit_address_get(uint8_t channel, nrf_saadc_limit_t limit_type) -{ - ASSERT(channel < NRF_SAADC_CHANNEL_COUNT); - if (limit_type == NRF_SAADC_LIMIT_HIGH) - { - return &NRF_SAADC->EVENTS_CH[channel].LIMITH; - } - else - { - return &NRF_SAADC->EVENTS_CH[channel].LIMITL; - } -} - - -/** - * @brief Function for getting the SAADC channel monitoring limit events. - * - * @param[in] channel Channel number. - * @param[in] limit_type Low limit or high limit. - */ -__STATIC_INLINE nrf_saadc_event_t nrf_saadc_event_limit_get(uint8_t channel, nrf_saadc_limit_t limit_type) -{ - if (limit_type == NRF_SAADC_LIMIT_HIGH) - { - return (nrf_saadc_event_t)( (uint32_t) NRF_SAADC_EVENT_CH0_LIMITH + - (uint32_t) (NRF_SAADC_EVENT_CH1_LIMITH - NRF_SAADC_EVENT_CH0_LIMITH) - * (uint32_t) channel ); - } - else - { - return (nrf_saadc_event_t)( (uint32_t) NRF_SAADC_EVENT_CH0_LIMITL + - (uint32_t) (NRF_SAADC_EVENT_CH1_LIMITL - NRF_SAADC_EVENT_CH0_LIMITL) - * (uint32_t) channel ); - } -} - - -/** - * @brief Function for configuring the input pins for a specific SAADC channel. - * - * @param[in] channel Channel number. - * @param[in] pselp Positive input. - * @param[in] pseln Negative input. Set to NRF_SAADC_INPUT_DISABLED in single ended mode. - */ -__STATIC_INLINE void nrf_saadc_channel_input_set(uint8_t channel, - nrf_saadc_input_t pselp, - nrf_saadc_input_t pseln) -{ - NRF_SAADC->CH[channel].PSELN = pseln; - NRF_SAADC->CH[channel].PSELP = pselp; -} - - -/** - * @brief Function for setting the SAADC channel monitoring limits. - * - * @param[in] channel Channel number. - * @param[in] low Low limit. - * @param[in] high High limit. - */ -__STATIC_INLINE void nrf_saadc_channel_limits_set(uint8_t channel, int16_t low, int16_t high) -{ - NRF_SAADC->CH[channel].LIMIT = ( - (((uint32_t) low << SAADC_CH_LIMIT_LOW_Pos) & SAADC_CH_LIMIT_LOW_Msk) - | (((uint32_t) high << SAADC_CH_LIMIT_HIGH_Pos) & SAADC_CH_LIMIT_HIGH_Msk)); -} - - -/** - * @brief Function for enabling specified SAADC interrupts. - * - * @param[in] saadc_int_mask Interrupt(s) to enable. - */ -__STATIC_INLINE void nrf_saadc_int_enable(uint32_t saadc_int_mask) -{ - NRF_SAADC->INTENSET = saadc_int_mask; -} - - -/** - * @brief Function for retrieving the state of specified SAADC interrupts. - * - * @param[in] saadc_int_mask Interrupt(s) to check. - * - * @retval true If all specified interrupts are enabled. - * @retval false If at least one of the given interrupts is not enabled. - */ -__STATIC_INLINE bool nrf_saadc_int_enable_check(uint32_t saadc_int_mask) -{ - return (bool)(NRF_SAADC->INTENSET & saadc_int_mask); -} - - -/** - * @brief Function for disabling specified interrupts. - * - * @param saadc_int_mask Interrupt(s) to disable. - */ -__STATIC_INLINE void nrf_saadc_int_disable(uint32_t saadc_int_mask) -{ - NRF_SAADC->INTENCLR = saadc_int_mask; -} - - -/** - * @brief Function for generating masks for SAADC channel limit interrupts. - * - * @param[in] channel SAADC channel number. - * @param[in] limit_type Limit type. - * - * @returns Interrupt mask. - */ -__STATIC_INLINE uint32_t nrf_saadc_limit_int_get(uint8_t channel, nrf_saadc_limit_t limit_type) -{ - ASSERT(channel < NRF_SAADC_CHANNEL_COUNT); - uint32_t mask = (limit_type == NRF_SAADC_LIMIT_LOW) ? NRF_SAADC_INT_CH0LIMITL : NRF_SAADC_INT_CH0LIMITH; - return mask << (channel * 2); -} - - -/** - * @brief Function for checking whether the SAADC is busy. - * - * This function checks whether the analog-to-digital converter is busy with a conversion. - * - * @retval true If the SAADC is busy. - * @retval false If the SAADC is not busy. - */ -__STATIC_INLINE bool nrf_saadc_busy_check(void) -{ - //return ((NRF_SAADC->STATUS & SAADC_STATUS_STATUS_Msk) == SAADC_STATUS_STATUS_Msk); - //simplified for performance - return NRF_SAADC->STATUS; -} - - -/** - * @brief Function for enabling the SAADC. - * - * The analog-to-digital converter must be enabled before use. - */ -__STATIC_INLINE void nrf_saadc_enable(void) -{ - NRF_SAADC->ENABLE = (SAADC_ENABLE_ENABLE_Enabled << SAADC_ENABLE_ENABLE_Pos); -} - - -/** - * @brief Function for disabling the SAADC. - */ -__STATIC_INLINE void nrf_saadc_disable(void) -{ - NRF_SAADC->ENABLE = (SAADC_ENABLE_ENABLE_Disabled << SAADC_ENABLE_ENABLE_Pos); -} - - -/** - * @brief Function for checking if the SAADC is enabled. - * - * @retval true If the SAADC is enabled. - * @retval false If the SAADC is not enabled. - */ -__STATIC_INLINE bool nrf_saadc_enable_check(void) -{ - //simplified for performance - return NRF_SAADC->ENABLE; -} - - -/** - * @brief Function for initializing the SAADC result buffer. - * - * @param[in] buffer Pointer to the result buffer. - * @param[in] num Size of buffer in words. - */ -__STATIC_INLINE void nrf_saadc_buffer_init(nrf_saadc_value_t * buffer, uint32_t num) -{ - NRF_SAADC->RESULT.PTR = (uint32_t)buffer; - NRF_SAADC->RESULT.MAXCNT = num; -} - -/** - * @brief Function for getting the number of buffer words transferred since last START operation. - * - * @returns Number of words transferred. - */ -__STATIC_INLINE uint16_t nrf_saadc_amount_get(void) -{ - return NRF_SAADC->RESULT.AMOUNT; -} - - -/** - * @brief Function for setting the SAADC sample resolution. - * - * @param[in] resolution Bit resolution. - */ -__STATIC_INLINE void nrf_saadc_resolution_set(nrf_saadc_resolution_t resolution) -{ - NRF_SAADC->RESOLUTION = resolution; -} - - -/** - * @brief Function for configuring the oversampling feature. - * - * @param[in] oversample Oversampling mode. - */ -__STATIC_INLINE void nrf_saadc_oversample_set(nrf_saadc_oversample_t oversample) -{ - NRF_SAADC->OVERSAMPLE = oversample; -} - -/** - * @brief Function for getting the oversampling feature configuration. - * - * @return Oversampling configuration. - */ -__STATIC_INLINE nrf_saadc_oversample_t nrf_saadc_oversample_get(void) -{ - return (nrf_saadc_oversample_t)NRF_SAADC->OVERSAMPLE; -} - -/** - * @brief Function for initializing the SAADC channel. - * - * @param[in] channel Channel number. - * @param[in] config Pointer to the channel configuration structure. - */ -void nrf_saadc_channel_init(uint8_t channel, nrf_saadc_channel_config_t const * const config); - -/** - *@} - **/ - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_SAADC_H_ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_spi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_spi.h deleted file mode 100644 index 3f7215e73fe..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_spi.h +++ /dev/null @@ -1,375 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @defgroup nrf_spi_hal SPI HAL - * @{ - * @ingroup nrf_spi - * - * @brief Hardware access layer for accessing the SPI peripheral. - */ - -#ifndef NRF_SPI_H__ -#define NRF_SPI_H__ - -#include -#include -#include - -#include "nrf.h" -#include "nrf_peripherals.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -/** - * @brief This value can be used as a parameter for the @ref nrf_spi_pins_set - * function to specify that a given SPI signal (SCK, MOSI, or MISO) - * shall not be connected to a physical pin. - */ -#define NRF_SPI_PIN_NOT_CONNECTED 0xFFFFFFFF - - -/** - * @brief SPI events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_SPI_EVENT_READY = offsetof(NRF_SPI_Type, EVENTS_READY) ///< TXD byte sent and RXD byte received. - /*lint -restore*/ -} nrf_spi_event_t; - -/** - * @brief SPI interrupts. - */ -typedef enum -{ - NRF_SPI_INT_READY_MASK = SPI_INTENSET_READY_Msk ///< Interrupt on READY event. -} nrf_spi_int_mask_t; - -/** - * @brief SPI data rates. - */ -typedef enum -{ - NRF_SPI_FREQ_125K = SPI_FREQUENCY_FREQUENCY_K125, ///< 125 kbps. - NRF_SPI_FREQ_250K = SPI_FREQUENCY_FREQUENCY_K250, ///< 250 kbps. - NRF_SPI_FREQ_500K = SPI_FREQUENCY_FREQUENCY_K500, ///< 500 kbps. - NRF_SPI_FREQ_1M = SPI_FREQUENCY_FREQUENCY_M1, ///< 1 Mbps. - NRF_SPI_FREQ_2M = SPI_FREQUENCY_FREQUENCY_M2, ///< 2 Mbps. - NRF_SPI_FREQ_4M = SPI_FREQUENCY_FREQUENCY_M4, ///< 4 Mbps. - // [conversion to 'int' needed to prevent compilers from complaining - // that the provided value (0x80000000UL) is out of range of "int"] - NRF_SPI_FREQ_8M = (int)SPI_FREQUENCY_FREQUENCY_M8 ///< 8 Mbps. -} nrf_spi_frequency_t; - -/** - * @brief SPI modes. - */ -typedef enum -{ - NRF_SPI_MODE_0, ///< SCK active high, sample on leading edge of clock. - NRF_SPI_MODE_1, ///< SCK active high, sample on trailing edge of clock. - NRF_SPI_MODE_2, ///< SCK active low, sample on leading edge of clock. - NRF_SPI_MODE_3 ///< SCK active low, sample on trailing edge of clock. -} nrf_spi_mode_t; - -/** - * @brief SPI bit orders. - */ -typedef enum -{ - NRF_SPI_BIT_ORDER_MSB_FIRST = SPI_CONFIG_ORDER_MsbFirst, ///< Most significant bit shifted out first. - NRF_SPI_BIT_ORDER_LSB_FIRST = SPI_CONFIG_ORDER_LsbFirst ///< Least significant bit shifted out first. -} nrf_spi_bit_order_t; - - -/** - * @brief Function for clearing a specific SPI event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spi_event Event to clear. - */ -__STATIC_INLINE void nrf_spi_event_clear(NRF_SPI_Type * p_reg, - nrf_spi_event_t spi_event); - -/** - * @brief Function for checking the state of a specific SPI event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spi_event Event to check. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_spi_event_check(NRF_SPI_Type * p_reg, - nrf_spi_event_t spi_event); - -/** - * @brief Function for getting the address of a specific SPI event register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spi_event Requested event. - * - * @return Address of the specified event register. - */ -__STATIC_INLINE uint32_t * nrf_spi_event_address_get(NRF_SPI_Type * p_reg, - nrf_spi_event_t spi_event); - -/** - * @brief Function for enabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spi_int_mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_spi_int_enable(NRF_SPI_Type * p_reg, - uint32_t spi_int_mask); - -/** - * @brief Function for disabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spi_int_mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_spi_int_disable(NRF_SPI_Type * p_reg, - uint32_t spi_int_mask); - -/** - * @brief Function for retrieving the state of a given interrupt. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spi_int Interrupt to check. - * - * @retval true If the interrupt is enabled. - * @retval false If the interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_spi_int_enable_check(NRF_SPI_Type * p_reg, - nrf_spi_int_mask_t spi_int); - -/** - * @brief Function for enabling the SPI peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_spi_enable(NRF_SPI_Type * p_reg); - -/** - * @brief Function for disabling the SPI peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_spi_disable(NRF_SPI_Type * p_reg); - -/** - * @brief Function for configuring SPI pins. - * - * If a given signal is not needed, pass the @ref NRF_SPI_PIN_NOT_CONNECTED - * value instead of its pin number. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] sck_pin SCK pin number. - * @param[in] mosi_pin MOSI pin number. - * @param[in] miso_pin MISO pin number. - */ -__STATIC_INLINE void nrf_spi_pins_set(NRF_SPI_Type * p_reg, - uint32_t sck_pin, - uint32_t mosi_pin, - uint32_t miso_pin); - -/** - * @brief Function for writing data to the SPI transmitter register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] data TX data to send. - */ -__STATIC_INLINE void nrf_spi_txd_set(NRF_SPI_Type * p_reg, uint8_t data); - -/** - * @brief Function for reading data from the SPI receiver register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @return RX data received. - */ -__STATIC_INLINE uint8_t nrf_spi_rxd_get(NRF_SPI_Type * p_reg); - -/** - * @brief Function for setting the SPI master data rate. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] frequency SPI frequency. - */ -__STATIC_INLINE void nrf_spi_frequency_set(NRF_SPI_Type * p_reg, - nrf_spi_frequency_t frequency); - -/** - * @brief Function for setting the SPI configuration. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spi_mode SPI mode. - * @param[in] spi_bit_order SPI bit order. - */ -__STATIC_INLINE void nrf_spi_configure(NRF_SPI_Type * p_reg, - nrf_spi_mode_t spi_mode, - nrf_spi_bit_order_t spi_bit_order); - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_spi_event_clear(NRF_SPI_Type * p_reg, - nrf_spi_event_t spi_event) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spi_event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spi_event)); - (void)dummy; -#endif -} - -__STATIC_INLINE bool nrf_spi_event_check(NRF_SPI_Type * p_reg, - nrf_spi_event_t spi_event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spi_event); -} - -__STATIC_INLINE uint32_t * nrf_spi_event_address_get(NRF_SPI_Type * p_reg, - nrf_spi_event_t spi_event) -{ - return (uint32_t *)((uint8_t *)p_reg + (uint32_t)spi_event); -} - -__STATIC_INLINE void nrf_spi_int_enable(NRF_SPI_Type * p_reg, - uint32_t spi_int_mask) -{ - p_reg->INTENSET = spi_int_mask; -} - -__STATIC_INLINE void nrf_spi_int_disable(NRF_SPI_Type * p_reg, - uint32_t spi_int_mask) -{ - p_reg->INTENCLR = spi_int_mask; -} - -__STATIC_INLINE bool nrf_spi_int_enable_check(NRF_SPI_Type * p_reg, - nrf_spi_int_mask_t spi_int) -{ - return (bool)(p_reg->INTENSET & spi_int); -} - -__STATIC_INLINE void nrf_spi_enable(NRF_SPI_Type * p_reg) -{ - p_reg->ENABLE = (SPI_ENABLE_ENABLE_Enabled << SPI_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_spi_disable(NRF_SPI_Type * p_reg) -{ - p_reg->ENABLE = (SPI_ENABLE_ENABLE_Disabled << SPI_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_spi_pins_set(NRF_SPI_Type * p_reg, - uint32_t sck_pin, - uint32_t mosi_pin, - uint32_t miso_pin) -{ - p_reg->PSELSCK = sck_pin; - p_reg->PSELMOSI = mosi_pin; - p_reg->PSELMISO = miso_pin; -} - -__STATIC_INLINE void nrf_spi_txd_set(NRF_SPI_Type * p_reg, uint8_t data) -{ - p_reg->TXD = data; -} - -__STATIC_INLINE uint8_t nrf_spi_rxd_get(NRF_SPI_Type * p_reg) -{ - return p_reg->RXD; -} - -__STATIC_INLINE void nrf_spi_frequency_set(NRF_SPI_Type * p_reg, - nrf_spi_frequency_t frequency) -{ - p_reg->FREQUENCY = frequency; -} - -__STATIC_INLINE void nrf_spi_configure(NRF_SPI_Type * p_reg, - nrf_spi_mode_t spi_mode, - nrf_spi_bit_order_t spi_bit_order) -{ - uint32_t config = (spi_bit_order == NRF_SPI_BIT_ORDER_MSB_FIRST ? - SPI_CONFIG_ORDER_MsbFirst : SPI_CONFIG_ORDER_LsbFirst); - switch (spi_mode) - { - default: - case NRF_SPI_MODE_0: - config |= (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos) | - (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos); - break; - - case NRF_SPI_MODE_1: - config |= (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos) | - (SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos); - break; - - case NRF_SPI_MODE_2: - config |= (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos) | - (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos); - break; - - case NRF_SPI_MODE_3: - config |= (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos) | - (SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos); - break; - } - p_reg->CONFIG = config; -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_SPI_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_spim.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_spim.h deleted file mode 100644 index d20eaa44ab7..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_spim.h +++ /dev/null @@ -1,571 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @defgroup nrf_spim_hal SPIM HAL - * @{ - * @ingroup nrf_spi - * - * @brief Hardware access layer for accessing the SPIM peripheral. - */ - -#ifndef NRF_SPIM_H__ -#define NRF_SPIM_H__ - -#include -#include -#include - -#include "nrf.h" -#include "nrf_peripherals.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -/** - * @brief This value can be used as a parameter for the @ref nrf_spim_pins_set - * function to specify that a given SPI signal (SCK, MOSI, or MISO) - * shall not be connected to a physical pin. - */ -#define NRF_SPIM_PIN_NOT_CONNECTED 0xFFFFFFFF - - -/** - * @brief SPIM tasks. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_SPIM_TASK_START = offsetof(NRF_SPIM_Type, TASKS_START), ///< Start SPI transaction. - NRF_SPIM_TASK_STOP = offsetof(NRF_SPIM_Type, TASKS_STOP), ///< Stop SPI transaction. - NRF_SPIM_TASK_SUSPEND = offsetof(NRF_SPIM_Type, TASKS_SUSPEND), ///< Suspend SPI transaction. - NRF_SPIM_TASK_RESUME = offsetof(NRF_SPIM_Type, TASKS_RESUME) ///< Resume SPI transaction. - /*lint -restore*/ -} nrf_spim_task_t; - -/** - * @brief SPIM events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_SPIM_EVENT_STOPPED = offsetof(NRF_SPIM_Type, EVENTS_STOPPED), ///< SPI transaction has stopped. - NRF_SPIM_EVENT_ENDRX = offsetof(NRF_SPIM_Type, EVENTS_ENDRX), ///< End of RXD buffer reached. - NRF_SPIM_EVENT_END = offsetof(NRF_SPIM_Type, EVENTS_END), ///< End of RXD buffer and TXD buffer reached. - NRF_SPIM_EVENT_ENDTX = offsetof(NRF_SPIM_Type, EVENTS_ENDTX), ///< End of TXD buffer reached. - NRF_SPIM_EVENT_STARTED = offsetof(NRF_SPIM_Type, EVENTS_STARTED) ///< Transaction started. - /*lint -restore*/ -} nrf_spim_event_t; - -/** - * @brief SPIM shortcuts. - */ -typedef enum -{ - NRF_SPIM_SHORT_END_START_MASK = SPIM_SHORTS_END_START_Msk ///< Shortcut between END event and START task. -} nrf_spim_short_mask_t; - -/** - * @brief SPIM interrupts. - */ -typedef enum -{ - NRF_SPIM_INT_STOPPED_MASK = SPIM_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event. - NRF_SPIM_INT_ENDRX_MASK = SPIM_INTENSET_ENDRX_Msk, ///< Interrupt on ENDRX event. - NRF_SPIM_INT_END_MASK = SPIM_INTENSET_END_Msk, ///< Interrupt on END event. - NRF_SPIM_INT_ENDTX_MASK = SPIM_INTENSET_ENDTX_Msk, ///< Interrupt on ENDTX event. - NRF_SPIM_INT_STARTED_MASK = SPIM_INTENSET_STARTED_Msk ///< Interrupt on STARTED event. -} nrf_spim_int_mask_t; - -/** - * @brief SPI master data rates. - */ -typedef enum -{ - NRF_SPIM_FREQ_125K = SPIM_FREQUENCY_FREQUENCY_K125, ///< 125 kbps. - NRF_SPIM_FREQ_250K = SPIM_FREQUENCY_FREQUENCY_K250, ///< 250 kbps. - NRF_SPIM_FREQ_500K = SPIM_FREQUENCY_FREQUENCY_K500, ///< 500 kbps. - NRF_SPIM_FREQ_1M = SPIM_FREQUENCY_FREQUENCY_M1, ///< 1 Mbps. - NRF_SPIM_FREQ_2M = SPIM_FREQUENCY_FREQUENCY_M2, ///< 2 Mbps. - NRF_SPIM_FREQ_4M = SPIM_FREQUENCY_FREQUENCY_M4, ///< 4 Mbps. - // [conversion to 'int' needed to prevent compilers from complaining - // that the provided value (0x80000000UL) is out of range of "int"] - NRF_SPIM_FREQ_8M = (int)SPIM_FREQUENCY_FREQUENCY_M8,///< 8 Mbps. -#ifndef SPI_PRESENT - NRF_SPI_FREQ_125K = NRF_SPIM_FREQ_125K, - NRF_SPI_FREQ_250K = NRF_SPIM_FREQ_250K, - NRF_SPI_FREQ_500K = NRF_SPIM_FREQ_500K, - NRF_SPI_FREQ_1M = NRF_SPIM_FREQ_1M, - NRF_SPI_FREQ_2M = NRF_SPIM_FREQ_2M, - NRF_SPI_FREQ_4M = NRF_SPIM_FREQ_4M, - NRF_SPI_FREQ_8M = NRF_SPIM_FREQ_8M, -#endif -} nrf_spim_frequency_t; - -/** - * @brief SPI modes. - */ -typedef enum -{ - NRF_SPIM_MODE_0, ///< SCK active high, sample on leading edge of clock. - NRF_SPIM_MODE_1, ///< SCK active high, sample on trailing edge of clock. - NRF_SPIM_MODE_2, ///< SCK active low, sample on leading edge of clock. - NRF_SPIM_MODE_3, ///< SCK active low, sample on trailing edge of clock. -#ifndef SPI_PRESENT - NRF_SPI_MODE_0 = NRF_SPIM_MODE_0, - NRF_SPI_MODE_1 = NRF_SPIM_MODE_1, - NRF_SPI_MODE_2 = NRF_SPIM_MODE_2, - NRF_SPI_MODE_3 = NRF_SPIM_MODE_3, -#endif -} nrf_spim_mode_t; - -/** - * @brief SPI bit orders. - */ -typedef enum -{ - NRF_SPIM_BIT_ORDER_MSB_FIRST = SPIM_CONFIG_ORDER_MsbFirst, ///< Most significant bit shifted out first. - NRF_SPIM_BIT_ORDER_LSB_FIRST = SPIM_CONFIG_ORDER_LsbFirst, ///< Least significant bit shifted out first. -#ifndef SPI_PRESENT - NRF_SPI_BIT_ORDER_MSB_FIRST = NRF_SPIM_BIT_ORDER_MSB_FIRST, - NRF_SPI_BIT_ORDER_LSB_FIRST = NRF_SPIM_BIT_ORDER_LSB_FIRST, -#endif -} nrf_spim_bit_order_t; - - -/** - * @brief Function for activating a specific SPIM task. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spim_task Task to activate. - */ -__STATIC_INLINE void nrf_spim_task_trigger(NRF_SPIM_Type * p_reg, - nrf_spim_task_t spim_task); - -/** - * @brief Function for getting the address of a specific SPIM task register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spim_task Requested task. - * - * @return Address of the specified task register. - */ -__STATIC_INLINE uint32_t nrf_spim_task_address_get(NRF_SPIM_Type * p_reg, - nrf_spim_task_t spim_task); - -/** - * @brief Function for clearing a specific SPIM event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spim_event Event to clear. - */ -__STATIC_INLINE void nrf_spim_event_clear(NRF_SPIM_Type * p_reg, - nrf_spim_event_t spim_event); - -/** - * @brief Function for checking the state of a specific SPIM event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spim_event Event to check. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_spim_event_check(NRF_SPIM_Type * p_reg, - nrf_spim_event_t spim_event); - -/** - * @brief Function for getting the address of a specific SPIM event register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spim_event Requested event. - * - * @return Address of the specified event register. - */ -__STATIC_INLINE uint32_t nrf_spim_event_address_get(NRF_SPIM_Type * p_reg, - nrf_spim_event_t spim_event); -/** - * @brief Function for enabling specified shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spim_shorts_mask Shortcuts to enable. - */ -__STATIC_INLINE void nrf_spim_shorts_enable(NRF_SPIM_Type * p_reg, - uint32_t spim_shorts_mask); - -/** - * @brief Function for disabling specified shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spim_shorts_mask Shortcuts to disable. - */ -__STATIC_INLINE void nrf_spim_shorts_disable(NRF_SPIM_Type * p_reg, - uint32_t spim_shorts_mask); - -/** - * @brief Function for getting shorts setting. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE uint32_t nrf_spim_shorts_get(NRF_SPIM_Type * p_reg); - -/** - * @brief Function for enabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spim_int_mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_spim_int_enable(NRF_SPIM_Type * p_reg, - uint32_t spim_int_mask); - -/** - * @brief Function for disabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spim_int_mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_spim_int_disable(NRF_SPIM_Type * p_reg, - uint32_t spim_int_mask); - -/** - * @brief Function for retrieving the state of a given interrupt. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spim_int Interrupt to check. - * - * @retval true If the interrupt is enabled. - * @retval false If the interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_spim_int_enable_check(NRF_SPIM_Type * p_reg, - nrf_spim_int_mask_t spim_int); - -/** - * @brief Function for enabling the SPIM peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_spim_enable(NRF_SPIM_Type * p_reg); - -/** - * @brief Function for disabling the SPIM peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_spim_disable(NRF_SPIM_Type * p_reg); - -/** - * @brief Function for configuring SPIM pins. - * - * If a given signal is not needed, pass the @ref NRF_SPIM_PIN_NOT_CONNECTED - * value instead of its pin number. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] sck_pin SCK pin number. - * @param[in] mosi_pin MOSI pin number. - * @param[in] miso_pin MISO pin number. - */ -__STATIC_INLINE void nrf_spim_pins_set(NRF_SPIM_Type * p_reg, - uint32_t sck_pin, - uint32_t mosi_pin, - uint32_t miso_pin); - -/** - * @brief Function for setting the SPI master data rate. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] frequency SPI frequency. - */ -__STATIC_INLINE void nrf_spim_frequency_set(NRF_SPIM_Type * p_reg, - nrf_spim_frequency_t frequency); - -/** - * @brief Function for setting the transmit buffer. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] p_buffer Pointer to the buffer with data to send. - * @param[in] length Maximum number of data bytes to transmit. - */ -__STATIC_INLINE void nrf_spim_tx_buffer_set(NRF_SPIM_Type * p_reg, - uint8_t const * p_buffer, - uint8_t length); - -/** - * @brief Function for setting the receive buffer. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] p_buffer Pointer to the buffer for received data. - * @param[in] length Maximum number of data bytes to receive. - */ -__STATIC_INLINE void nrf_spim_rx_buffer_set(NRF_SPIM_Type * p_reg, - uint8_t * p_buffer, - uint8_t length); - -/** - * @brief Function for setting the SPI configuration. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spi_mode SPI mode. - * @param[in] spi_bit_order SPI bit order. - */ -__STATIC_INLINE void nrf_spim_configure(NRF_SPIM_Type * p_reg, - nrf_spim_mode_t spi_mode, - nrf_spim_bit_order_t spi_bit_order); - -/** - * @brief Function for setting the over-read character. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] orc Over-read character that is clocked out in case of - * an over-read of the TXD buffer. - */ -__STATIC_INLINE void nrf_spim_orc_set(NRF_SPIM_Type * p_reg, - uint8_t orc); - -/** - * @brief Function for enabling the TX list feature. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_spim_tx_list_enable(NRF_SPIM_Type * p_reg); - -/** - * @brief Function for disabling the TX list feature. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_spim_tx_list_disable(NRF_SPIM_Type * p_reg); - -/** - * @brief Function for enabling the RX list feature. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_spim_rx_list_enable(NRF_SPIM_Type * p_reg); - -/** - * @brief Function for disabling the RX list feature. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_spim_rx_list_disable(NRF_SPIM_Type * p_reg); - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_spim_task_trigger(NRF_SPIM_Type * p_reg, - nrf_spim_task_t spim_task) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spim_task)) = 0x1UL; -} - -__STATIC_INLINE uint32_t nrf_spim_task_address_get(NRF_SPIM_Type * p_reg, - nrf_spim_task_t spim_task) -{ - return (uint32_t)((uint8_t *)p_reg + (uint32_t)spim_task); -} - -__STATIC_INLINE void nrf_spim_event_clear(NRF_SPIM_Type * p_reg, - nrf_spim_event_t spim_event) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spim_event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spim_event)); - (void)dummy; -#endif -} - -__STATIC_INLINE bool nrf_spim_event_check(NRF_SPIM_Type * p_reg, - nrf_spim_event_t spim_event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spim_event); -} - -__STATIC_INLINE uint32_t nrf_spim_event_address_get(NRF_SPIM_Type * p_reg, - nrf_spim_event_t spim_event) -{ - return (uint32_t)((uint8_t *)p_reg + (uint32_t)spim_event); -} - -__STATIC_INLINE void nrf_spim_shorts_enable(NRF_SPIM_Type * p_reg, - uint32_t spim_shorts_mask) -{ - p_reg->SHORTS |= spim_shorts_mask; -} - -__STATIC_INLINE void nrf_spim_shorts_disable(NRF_SPIM_Type * p_reg, - uint32_t spim_shorts_mask) -{ - p_reg->SHORTS &= ~(spim_shorts_mask); -} - -__STATIC_INLINE uint32_t nrf_spim_shorts_get(NRF_SPIM_Type * p_reg) -{ - return p_reg->SHORTS; -} - -__STATIC_INLINE void nrf_spim_int_enable(NRF_SPIM_Type * p_reg, - uint32_t spim_int_mask) -{ - p_reg->INTENSET = spim_int_mask; -} - -__STATIC_INLINE void nrf_spim_int_disable(NRF_SPIM_Type * p_reg, - uint32_t spim_int_mask) -{ - p_reg->INTENCLR = spim_int_mask; -} - -__STATIC_INLINE bool nrf_spim_int_enable_check(NRF_SPIM_Type * p_reg, - nrf_spim_int_mask_t spim_int) -{ - return (bool)(p_reg->INTENSET & spim_int); -} - -__STATIC_INLINE void nrf_spim_enable(NRF_SPIM_Type * p_reg) -{ - p_reg->ENABLE = (SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_spim_disable(NRF_SPIM_Type * p_reg) -{ - p_reg->ENABLE = (SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_spim_pins_set(NRF_SPIM_Type * p_reg, - uint32_t sck_pin, - uint32_t mosi_pin, - uint32_t miso_pin) -{ - p_reg->PSEL.SCK = sck_pin; - p_reg->PSEL.MOSI = mosi_pin; - p_reg->PSEL.MISO = miso_pin; -} - -__STATIC_INLINE void nrf_spim_frequency_set(NRF_SPIM_Type * p_reg, - nrf_spim_frequency_t frequency) -{ - p_reg->FREQUENCY = frequency; -} - -__STATIC_INLINE void nrf_spim_tx_buffer_set(NRF_SPIM_Type * p_reg, - uint8_t const * p_buffer, - uint8_t length) -{ - p_reg->TXD.PTR = (uint32_t)p_buffer; - p_reg->TXD.MAXCNT = length; -} - -__STATIC_INLINE void nrf_spim_rx_buffer_set(NRF_SPIM_Type * p_reg, - uint8_t * p_buffer, - uint8_t length) -{ - p_reg->RXD.PTR = (uint32_t)p_buffer; - p_reg->RXD.MAXCNT = length; -} - -__STATIC_INLINE void nrf_spim_configure(NRF_SPIM_Type * p_reg, - nrf_spim_mode_t spi_mode, - nrf_spim_bit_order_t spi_bit_order) -{ - uint32_t config = (spi_bit_order == NRF_SPIM_BIT_ORDER_MSB_FIRST ? - SPIM_CONFIG_ORDER_MsbFirst : SPIM_CONFIG_ORDER_LsbFirst); - switch (spi_mode) - { - default: - case NRF_SPIM_MODE_0: - config |= (SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) | - (SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos); - break; - - case NRF_SPIM_MODE_1: - config |= (SPIM_CONFIG_CPOL_ActiveHigh << SPIM_CONFIG_CPOL_Pos) | - (SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos); - break; - - case NRF_SPIM_MODE_2: - config |= (SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) | - (SPIM_CONFIG_CPHA_Leading << SPIM_CONFIG_CPHA_Pos); - break; - - case NRF_SPIM_MODE_3: - config |= (SPIM_CONFIG_CPOL_ActiveLow << SPIM_CONFIG_CPOL_Pos) | - (SPIM_CONFIG_CPHA_Trailing << SPIM_CONFIG_CPHA_Pos); - break; - } - p_reg->CONFIG = config; -} - -__STATIC_INLINE void nrf_spim_orc_set(NRF_SPIM_Type * p_reg, - uint8_t orc) -{ - p_reg->ORC = orc; -} - - -__STATIC_INLINE void nrf_spim_tx_list_enable(NRF_SPIM_Type * p_reg) -{ - p_reg->TXD.LIST = 1; -} - -__STATIC_INLINE void nrf_spim_tx_list_disable(NRF_SPIM_Type * p_reg) -{ - p_reg->TXD.LIST = 0; -} - -__STATIC_INLINE void nrf_spim_rx_list_enable(NRF_SPIM_Type * p_reg) -{ - p_reg->RXD.LIST = 1; -} - -__STATIC_INLINE void nrf_spim_rx_list_disable(NRF_SPIM_Type * p_reg) -{ - p_reg->RXD.LIST = 0; -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_SPIM_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_spis.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_spis.h deleted file mode 100644 index 68746ad3820..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_spis.h +++ /dev/null @@ -1,553 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @defgroup nrf_spis_hal SPIS HAL - * @{ - * @ingroup nrf_spis - * - * @brief Hardware access layer for accessing the SPIS peripheral. - */ - -#ifndef NRF_SPIS_H__ -#define NRF_SPIS_H__ - -#include -#include -#include - -#include "nrf.h" -#include "nrf_peripherals.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -/** - * @brief This value can be used as a parameter for the @ref nrf_spis_pins_set - * function to specify that a given SPI signal (SCK, MOSI, or MISO) - * shall not be connected to a physical pin. - */ -#define NRF_SPIS_PIN_NOT_CONNECTED 0xFFFFFFFF - - -/** - * @brief SPIS tasks. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_SPIS_TASK_ACQUIRE = offsetof(NRF_SPIS_Type, TASKS_ACQUIRE), ///< Acquire SPI semaphore. - NRF_SPIS_TASK_RELEASE = offsetof(NRF_SPIS_Type, TASKS_RELEASE), ///< Release SPI semaphore, enabling the SPI slave to acquire it. - /*lint -restore*/ -} nrf_spis_task_t; - -/** - * @brief SPIS events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_SPIS_EVENT_END = offsetof(NRF_SPIS_Type, EVENTS_END), ///< Granted transaction completed. - NRF_SPIS_EVENT_ACQUIRED = offsetof(NRF_SPIS_Type, EVENTS_ACQUIRED) ///< Semaphore acquired. - /*lint -restore*/ -} nrf_spis_event_t; - -/** - * @brief SPIS shortcuts. - */ -typedef enum -{ - NRF_SPIS_SHORT_END_ACQUIRE = SPIS_SHORTS_END_ACQUIRE_Msk ///< Shortcut between END event and ACQUIRE task. -} nrf_spis_short_mask_t; - -/** - * @brief SPIS interrupts. - */ -typedef enum -{ - NRF_SPIS_INT_END_MASK = SPIS_INTENSET_END_Msk, ///< Interrupt on END event. - NRF_SPIS_INT_ACQUIRED_MASK = SPIS_INTENSET_ACQUIRED_Msk ///< Interrupt on ACQUIRED event. -} nrf_spis_int_mask_t; - -/** - * @brief SPI modes. - */ -typedef enum -{ - NRF_SPIS_MODE_0, ///< SCK active high, sample on leading edge of clock. - NRF_SPIS_MODE_1, ///< SCK active high, sample on trailing edge of clock. - NRF_SPIS_MODE_2, ///< SCK active low, sample on leading edge of clock. - NRF_SPIS_MODE_3 ///< SCK active low, sample on trailing edge of clock. -} nrf_spis_mode_t; - -/** - * @brief SPI bit orders. - */ -typedef enum -{ - NRF_SPIS_BIT_ORDER_MSB_FIRST = SPIS_CONFIG_ORDER_MsbFirst, ///< Most significant bit shifted out first. - NRF_SPIS_BIT_ORDER_LSB_FIRST = SPIS_CONFIG_ORDER_LsbFirst ///< Least significant bit shifted out first. -} nrf_spis_bit_order_t; - -/** - * @brief SPI semaphore status. - */ -typedef enum -{ - NRF_SPIS_SEMSTAT_FREE = 0, ///< Semaphore is free. - NRF_SPIS_SEMSTAT_CPU = 1, ///< Semaphore is assigned to the CPU. - NRF_SPIS_SEMSTAT_SPIS = 2, ///< Semaphore is assigned to the SPI slave. - NRF_SPIS_SEMSTAT_CPUPENDING = 3 ///< Semaphore is assigned to the SPI, but a handover to the CPU is pending. -} nrf_spis_semstat_t; - -/** - * @brief SPIS status. - */ -typedef enum -{ - NRF_SPIS_STATUS_OVERREAD = SPIS_STATUS_OVERREAD_Msk, ///< TX buffer over-read detected and prevented. - NRF_SPIS_STATUS_OVERFLOW = SPIS_STATUS_OVERFLOW_Msk ///< RX buffer overflow detected and prevented. -} nrf_spis_status_mask_t; - -/** - * @brief Function for activating a specific SPIS task. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spis_task Task to activate. - */ -__STATIC_INLINE void nrf_spis_task_trigger(NRF_SPIS_Type * p_reg, - nrf_spis_task_t spis_task); - -/** - * @brief Function for getting the address of a specific SPIS task register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spis_task Requested task. - * - * @return Address of the specified task register. - */ -__STATIC_INLINE uint32_t nrf_spis_task_address_get(NRF_SPIS_Type const * p_reg, - nrf_spis_task_t spis_task); - -/** - * @brief Function for clearing a specific SPIS event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spis_event Event to clear. - */ -__STATIC_INLINE void nrf_spis_event_clear(NRF_SPIS_Type * p_reg, - nrf_spis_event_t spis_event); - -/** - * @brief Function for checking the state of a specific SPIS event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spis_event Event to check. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_spis_event_check(NRF_SPIS_Type const * p_reg, - nrf_spis_event_t spis_event); - -/** - * @brief Function for getting the address of a specific SPIS event register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spis_event Requested event. - * - * @return Address of the specified event register. - */ -__STATIC_INLINE uint32_t nrf_spis_event_address_get(NRF_SPIS_Type const * p_reg, - nrf_spis_event_t spis_event); - -/** - * @brief Function for enabling specified shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spis_shorts_mask Shortcuts to enable. - */ -__STATIC_INLINE void nrf_spis_shorts_enable(NRF_SPIS_Type * p_reg, - uint32_t spis_shorts_mask); - -/** - * @brief Function for disabling specified shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spis_shorts_mask Shortcuts to disable. - */ -__STATIC_INLINE void nrf_spis_shorts_disable(NRF_SPIS_Type * p_reg, - uint32_t spis_shorts_mask); - -/** - * @brief Function for enabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spis_int_mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_spis_int_enable(NRF_SPIS_Type * p_reg, - uint32_t spis_int_mask); - -/** - * @brief Function for disabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spis_int_mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_spis_int_disable(NRF_SPIS_Type * p_reg, - uint32_t spis_int_mask); - -/** - * @brief Function for retrieving the state of a given interrupt. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spis_int Interrupt to check. - * - * @retval true If the interrupt is enabled. - * @retval false If the interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_spis_int_enable_check(NRF_SPIS_Type const * p_reg, - nrf_spis_int_mask_t spis_int); - -/** - * @brief Function for enabling the SPIS peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_spis_enable(NRF_SPIS_Type * p_reg); - -/** - * @brief Function for disabling the SPIS peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_spis_disable(NRF_SPIS_Type * p_reg); - -/** - * @brief Function for retrieving the SPIS semaphore status. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @returns Current semaphore status. - */ -__STATIC_INLINE nrf_spis_semstat_t nrf_spis_semaphore_status_get(NRF_SPIS_Type * p_reg); - -/** - * @brief Function for retrieving the SPIS status. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @returns Current SPIS status. - */ -__STATIC_INLINE nrf_spis_status_mask_t nrf_spis_status_get(NRF_SPIS_Type * p_reg); - -/** - * @brief Function for configuring SPIS pins. - * - * If a given signal is not needed, pass the @ref NRF_SPIS_PIN_NOT_CONNECTED - * value instead of its pin number. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] sck_pin SCK pin number. - * @param[in] mosi_pin MOSI pin number. - * @param[in] miso_pin MISO pin number. - * @param[in] csn_pin CSN pin number. - */ -__STATIC_INLINE void nrf_spis_pins_set(NRF_SPIS_Type * p_reg, - uint32_t sck_pin, - uint32_t mosi_pin, - uint32_t miso_pin, - uint32_t csn_pin); - -/** - * @brief Function for setting the transmit buffer. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] p_buffer Pointer to the buffer that contains the data to send. - * @param[in] length Maximum number of data bytes to transmit. - */ -__STATIC_INLINE void nrf_spis_tx_buffer_set(NRF_SPIS_Type * p_reg, - uint8_t const * p_buffer, - uint8_t length); - -/** - * @brief Function for setting the receive buffer. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] p_buffer Pointer to the buffer for received data. - * @param[in] length Maximum number of data bytes to receive. - */ -__STATIC_INLINE void nrf_spis_rx_buffer_set(NRF_SPIS_Type * p_reg, - uint8_t * p_buffer, - uint8_t length); - -/** - * @brief Function for getting the number of bytes transmitted - * in the last granted transaction. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @returns Number of bytes transmitted. - */ -__STATIC_INLINE uint8_t nrf_spis_tx_amount_get(NRF_SPIS_Type const * p_reg); - -/** - * @brief Function for getting the number of bytes received - * in the last granted transaction. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @returns Number of bytes received. - */ -__STATIC_INLINE uint8_t nrf_spis_rx_amount_get(NRF_SPIS_Type const * p_reg); - -/** - * @brief Function for setting the SPI configuration. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] spi_mode SPI mode. - * @param[in] spi_bit_order SPI bit order. - */ -__STATIC_INLINE void nrf_spis_configure(NRF_SPIS_Type * p_reg, - nrf_spis_mode_t spi_mode, - nrf_spis_bit_order_t spi_bit_order); - -/** - * @brief Function for setting the default character. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] def Default character that is clocked out in case of - * an overflow of the RXD buffer. - */ -__STATIC_INLINE void nrf_spis_def_set(NRF_SPIS_Type * p_reg, - uint8_t def); - -/** - * @brief Function for setting the over-read character. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] orc Over-read character that is clocked out in case of - * an over-read of the TXD buffer. - */ -__STATIC_INLINE void nrf_spis_orc_set(NRF_SPIS_Type * p_reg, - uint8_t orc); - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_spis_task_trigger(NRF_SPIS_Type * p_reg, - nrf_spis_task_t spis_task) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spis_task)) = 0x1UL; -} - -__STATIC_INLINE uint32_t nrf_spis_task_address_get(NRF_SPIS_Type const * p_reg, - nrf_spis_task_t spis_task) -{ - return (uint32_t)p_reg + (uint32_t)spis_task; -} - -__STATIC_INLINE void nrf_spis_event_clear(NRF_SPIS_Type * p_reg, - nrf_spis_event_t spis_event) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spis_event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spis_event)); - (void)dummy; -#endif -} - -__STATIC_INLINE bool nrf_spis_event_check(NRF_SPIS_Type const * p_reg, - nrf_spis_event_t spis_event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spis_event); -} - -__STATIC_INLINE uint32_t nrf_spis_event_address_get(NRF_SPIS_Type const * p_reg, - nrf_spis_event_t spis_event) -{ - return (uint32_t)p_reg + (uint32_t)spis_event; -} - -__STATIC_INLINE void nrf_spis_shorts_enable(NRF_SPIS_Type * p_reg, - uint32_t spis_shorts_mask) -{ - p_reg->SHORTS |= spis_shorts_mask; -} - -__STATIC_INLINE void nrf_spis_shorts_disable(NRF_SPIS_Type * p_reg, - uint32_t spis_shorts_mask) -{ - p_reg->SHORTS &= ~(spis_shorts_mask); -} - -__STATIC_INLINE void nrf_spis_int_enable(NRF_SPIS_Type * p_reg, - uint32_t spis_int_mask) -{ - p_reg->INTENSET = spis_int_mask; -} - -__STATIC_INLINE void nrf_spis_int_disable(NRF_SPIS_Type * p_reg, - uint32_t spis_int_mask) -{ - p_reg->INTENCLR = spis_int_mask; -} - -__STATIC_INLINE bool nrf_spis_int_enable_check(NRF_SPIS_Type const * p_reg, - nrf_spis_int_mask_t spis_int) -{ - return (bool)(p_reg->INTENSET & spis_int); -} - -__STATIC_INLINE void nrf_spis_enable(NRF_SPIS_Type * p_reg) -{ - p_reg->ENABLE = (SPIS_ENABLE_ENABLE_Enabled << SPIS_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_spis_disable(NRF_SPIS_Type * p_reg) -{ - p_reg->ENABLE = (SPIS_ENABLE_ENABLE_Disabled << SPIS_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE nrf_spis_semstat_t nrf_spis_semaphore_status_get(NRF_SPIS_Type * p_reg) -{ - return (nrf_spis_semstat_t) ((p_reg->SEMSTAT & SPIS_SEMSTAT_SEMSTAT_Msk) - >> SPIS_SEMSTAT_SEMSTAT_Pos); -} - -__STATIC_INLINE nrf_spis_status_mask_t nrf_spis_status_get(NRF_SPIS_Type * p_reg) -{ - return (nrf_spis_status_mask_t) p_reg->STATUS; -} - -__STATIC_INLINE void nrf_spis_pins_set(NRF_SPIS_Type * p_reg, - uint32_t sck_pin, - uint32_t mosi_pin, - uint32_t miso_pin, - uint32_t csn_pin) -{ - p_reg->PSELSCK = sck_pin; - p_reg->PSELMOSI = mosi_pin; - p_reg->PSELMISO = miso_pin; - p_reg->PSELCSN = csn_pin; -} - -__STATIC_INLINE void nrf_spis_tx_buffer_set(NRF_SPIS_Type * p_reg, - uint8_t const * p_buffer, - uint8_t length) -{ - p_reg->TXDPTR = (uint32_t)p_buffer; - p_reg->MAXTX = length; -} - -__STATIC_INLINE void nrf_spis_rx_buffer_set(NRF_SPIS_Type * p_reg, - uint8_t * p_buffer, - uint8_t length) -{ - p_reg->RXDPTR = (uint32_t)p_buffer; - p_reg->MAXRX = length; -} - -__STATIC_INLINE uint8_t nrf_spis_tx_amount_get(NRF_SPIS_Type const * p_reg) -{ - return (uint8_t) p_reg->AMOUNTTX; -} - -__STATIC_INLINE uint8_t nrf_spis_rx_amount_get(NRF_SPIS_Type const * p_reg) -{ - return (uint8_t) p_reg->AMOUNTRX; -} - -__STATIC_INLINE void nrf_spis_configure(NRF_SPIS_Type * p_reg, - nrf_spis_mode_t spi_mode, - nrf_spis_bit_order_t spi_bit_order) -{ - uint32_t config = (spi_bit_order == NRF_SPIS_BIT_ORDER_MSB_FIRST ? - SPIS_CONFIG_ORDER_MsbFirst : SPIS_CONFIG_ORDER_LsbFirst); - - switch (spi_mode) - { - default: - case NRF_SPIS_MODE_0: - config |= (SPIS_CONFIG_CPOL_ActiveHigh << SPIS_CONFIG_CPOL_Pos) | - (SPIS_CONFIG_CPHA_Leading << SPIS_CONFIG_CPHA_Pos); - break; - - case NRF_SPIS_MODE_1: - config |= (SPIS_CONFIG_CPOL_ActiveHigh << SPIS_CONFIG_CPOL_Pos) | - (SPIS_CONFIG_CPHA_Trailing << SPIS_CONFIG_CPHA_Pos); - break; - - case NRF_SPIS_MODE_2: - config |= (SPIS_CONFIG_CPOL_ActiveLow << SPIS_CONFIG_CPOL_Pos) | - (SPIS_CONFIG_CPHA_Leading << SPIS_CONFIG_CPHA_Pos); - break; - - case NRF_SPIS_MODE_3: - config |= (SPIS_CONFIG_CPOL_ActiveLow << SPIS_CONFIG_CPOL_Pos) | - (SPIS_CONFIG_CPHA_Trailing << SPIS_CONFIG_CPHA_Pos); - break; - } - p_reg->CONFIG = config; -} - -__STATIC_INLINE void nrf_spis_orc_set(NRF_SPIS_Type * p_reg, - uint8_t orc) -{ - p_reg->ORC = orc; -} - -__STATIC_INLINE void nrf_spis_def_set(NRF_SPIS_Type * p_reg, - uint8_t def) -{ - p_reg->DEF = def; -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_SPIS_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_systick.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_systick.h deleted file mode 100644 index 26fbf37e33a..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_systick.h +++ /dev/null @@ -1,184 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_SYSTICK_H__ -#define NRF_SYSTICK_H__ - -#include "nrf.h" -#include -#include -#include - -/** - * @defgroup nrf_systick_hal SYSTICK HAL - * @{ - * @ingroup nrf_systick - * - * @brief Hardware access layer for accessing the SYSTICK peripheral. - * - * SYSTICK is ARM peripheral, not Nordic design. - * It means that it has no Nordic-typical interface with Tasks and Events. - * - * Its usage is limited here to implement simple delays. - * Also keep in mind that this timer would be stopped when CPU is sleeping - * (WFE/WFI instruction is successfully executed). - */ - -/** - * @brief Mask of usable bits in the SysTick value - */ -#define NRF_SYSTICK_VAL_MASK SysTick_VAL_CURRENT_Msk - -/** - * @brief Flags used by SysTick configuration. - * - * @sa nrf_systick_csr_set - * @sa nrf_systick_csr_get - */ -typedef enum { - NRF_SYSTICK_CSR_COUNTFLAG_MASK = SysTick_CTRL_COUNTFLAG_Msk, /**< Status flag: Returns 1 if timer counted to 0 since the last read of this register. */ - - NRF_SYSTICK_CSR_CLKSOURCE_MASK = SysTick_CTRL_CLKSOURCE_Msk, /**< Configuration bit: Select the SysTick clock source. */ - NRF_SYSTICK_CSR_CLKSOURCE_REF = 0U << SysTick_CTRL_CLKSOURCE_Pos, /**< Configuration value: Select reference clock. */ - NRF_SYSTICK_CSR_CLKSOURCE_CPU = 1U << SysTick_CTRL_CLKSOURCE_Pos, /**< Configuration value: Select CPU clock. */ - - NRF_SYSTICK_CSR_TICKINT_MASK = SysTick_CTRL_TICKINT_Msk, /**< Configuration bit: Enables SysTick exception request. */ - NRF_SYSTICK_CSR_TICKINT_ENABLE = 1U << SysTick_CTRL_TICKINT_Pos, /**< Configuration value: Counting down to zero does not assert the SysTick exception request. */ - NRF_SYSTICK_CSR_TICKINT_DISABLE = 0U << SysTick_CTRL_TICKINT_Pos, /**< Configuration value: Counting down to zero to asserts the SysTick exception request. */ - - NRF_SYSTICK_CSR_ENABLE_MASK = SysTick_CTRL_ENABLE_Msk, /**< Configuration bit: Enable the SysTick timer. */ - NRF_SYSTICK_CSR_ENABLE = 1U << SysTick_CTRL_ENABLE_Pos, /**< Configuration value: Counter enabled. */ - NRF_SYSTICK_CSR_DISABLE = 0U << SysTick_CTRL_ENABLE_Pos /**< Configuration value: Counter disabled. */ -} nrf_systick_csr_flags_t; - -/** - * @brief Get Configuration and Status Register - * - * @return Values composed by @ref nrf_systick_csr_flags_t. - * @note The @ref NRF_SYSTICK_CSR_COUNTFLAG_MASK value is cleared when CSR register is read. - */ -__STATIC_INLINE uint32_t nrf_systick_csr_get(void); - -/** - * @brief Set Configuration and Status Register - * - * @param[in] val The value composed from @ref nrf_systick_csr_flags_t. - */ -__STATIC_INLINE void nrf_systick_csr_set(uint32_t val); - -/** - * @brief Get the current reload value. - * - * @return The reload register value. - */ -__STATIC_INLINE uint32_t nrf_systick_load_get(void); - -/** - * @brief Configure the reload value. - * - * @param[in] val The value to set in the reload register. - */ -__STATIC_INLINE void nrf_systick_load_set(uint32_t val); - -/** - * @brief Read the SysTick current value - * - * @return The current SysTick value - * @sa NRF_SYSTICK_VAL_MASK - */ -__STATIC_INLINE uint32_t nrf_systick_val_get(void); - -/** - * @brief Clear the SysTick current value - * - * @note The SysTick does not allow setting current value. - * Any write to VAL register would clear the timer. - */ -__STATIC_INLINE void nrf_systick_val_clear(void); - -/** - * @brief Read the calibration register - * - * @return The calibration register value - */ -__STATIC_INLINE uint32_t nrf_systick_calib_get(void); - - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE uint32_t nrf_systick_csr_get(void) -{ - return SysTick->CTRL; -} - -__STATIC_INLINE void nrf_systick_csr_set(uint32_t val) -{ - SysTick->CTRL = val; -} - -__STATIC_INLINE uint32_t nrf_systick_load_get(void) -{ - return SysTick->LOAD; -} - -__STATIC_INLINE void nrf_systick_load_set(uint32_t val) -{ - SysTick->LOAD = val; -} - -__STATIC_INLINE uint32_t nrf_systick_val_get(void) -{ - return SysTick->VAL; -} - -__STATIC_INLINE void nrf_systick_val_clear(void) -{ - SysTick->VAL = 0; -} - -__STATIC_INLINE uint32_t nrf_systick_calib_get(void) -{ - return SysTick->CALIB; -} - -#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ - -/** @} */ -#endif /* NRF_SYSTICK_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_temp.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_temp.h deleted file mode 100644 index 415a3e74e27..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_temp.h +++ /dev/null @@ -1,91 +0,0 @@ -/** - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_TEMP_H__ -#define NRF_TEMP_H__ - -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** -* @defgroup nrf_temperature TEMP (temperature) abstraction -* @{ -* @ingroup nrf_drivers temperature_example -* @brief Temperature module init and read functions. -* -*/ - -/**@cond NO_DOXYGEN */ -#define MASK_SIGN (0x00000200UL) -#define MASK_SIGN_EXTENSION (0xFFFFFC00UL) - -/** - * @brief Function for preparing the temp module for temperature measurement. - * - * This function initializes the TEMP module and writes to the hidden configuration register. - */ -static __INLINE void nrf_temp_init(void) -{ - /**@note Workaround for PAN_028 rev2.0A anomaly 31 - TEMP: Temperature offset value has to be manually loaded to the TEMP module */ - *(uint32_t *) 0x4000C504 = 0; -} - -/** - * @brief Function for reading temperature measurement. - * - * The function reads the 10 bit 2's complement value and transforms it to a 32 bit 2's complement value. - */ -static __INLINE int32_t nrf_temp_read(void) -{ - /**@note Workaround for PAN_028 rev2.0A anomaly 28 - TEMP: Negative measured values are not represented correctly */ - return ((NRF_TEMP->TEMP & MASK_SIGN) != 0) ? (NRF_TEMP->TEMP | MASK_SIGN_EXTENSION) : (NRF_TEMP->TEMP); -} -/**@endcond */ - -/** @} */ - - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_timer.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_timer.h deleted file mode 100644 index d089d01b35b..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_timer.h +++ /dev/null @@ -1,630 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @defgroup nrf_timer_hal Timer HAL - * @{ - * @ingroup nrf_timer - * - * @brief Hardware access layer for accessing the timer peripheral. - */ - -#ifndef NRF_TIMER_H__ -#define NRF_TIMER_H__ - -#include -#include -#include - -#include "nrf_peripherals.h" -#include "nrf.h" -#include "nrf_assert.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -/** - * @brief Macro for validating the correctness of the BIT_WIDTH setting. - */ - -#define TIMER_MAX_SIZE(id) CONCAT_3(TIMER, id, _MAX_SIZE) - -#define TIMER_BIT_WIDTH_MAX(id, bit_width) \ - (TIMER_MAX_SIZE(id) == 8 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) : \ - (TIMER_MAX_SIZE(id) == 16 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \ - (bit_width == NRF_TIMER_BIT_WIDTH_16) : \ - (TIMER_MAX_SIZE(id) == 24 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \ - (bit_width == NRF_TIMER_BIT_WIDTH_16) || \ - (bit_width == NRF_TIMER_BIT_WIDTH_24) : \ - (TIMER_MAX_SIZE(id) == 32 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \ - (bit_width == NRF_TIMER_BIT_WIDTH_16) || \ - (bit_width == NRF_TIMER_BIT_WIDTH_24) || \ - (bit_width == NRF_TIMER_BIT_WIDTH_32) : \ - false)))) - -#if TIMER_COUNT > 3 -#define NRF_TIMER_IS_BIT_WIDTH_VALID(p_reg, bit_width) ( \ - ((p_reg == NRF_TIMER0) && (TIMER_BIT_WIDTH_MAX(0, bit_width))) \ - || ((p_reg == NRF_TIMER1) && (TIMER_BIT_WIDTH_MAX(1, bit_width))) \ - || ((p_reg == NRF_TIMER2) && (TIMER_BIT_WIDTH_MAX(2, bit_width))) \ - || ((p_reg == NRF_TIMER3) && (TIMER_BIT_WIDTH_MAX(3, bit_width))) \ - || ((p_reg == NRF_TIMER4) && (TIMER_BIT_WIDTH_MAX(4, bit_width))) ) - -#else -#define NRF_TIMER_IS_BIT_WIDTH_VALID(p_reg, bit_width) ( \ - ((p_reg == NRF_TIMER0) && TIMER_BIT_WIDTH_MAX(0, bit_width)) \ - || ((p_reg == NRF_TIMER1) && TIMER_BIT_WIDTH_MAX(1, bit_width)) \ - || ((p_reg == NRF_TIMER2) && TIMER_BIT_WIDTH_MAX(2, bit_width)) ) - -#endif - -/** - * @brief Macro for getting the number of capture/compare channels available - * in a given timer instance. - */ -#define NRF_TIMER_CC_CHANNEL_COUNT(id) CONCAT_3(TIMER, id, _CC_NUM) - -/** - * @brief Timer tasks. - */ -typedef enum -{ - /*lint -save -e30 -esym(628,__INTADDR__)*/ - NRF_TIMER_TASK_START = offsetof(NRF_TIMER_Type, TASKS_START), ///< Task for starting the timer. - NRF_TIMER_TASK_STOP = offsetof(NRF_TIMER_Type, TASKS_STOP), ///< Task for stopping the timer. - NRF_TIMER_TASK_COUNT = offsetof(NRF_TIMER_Type, TASKS_COUNT), ///< Task for incrementing the timer (in counter mode). - NRF_TIMER_TASK_CLEAR = offsetof(NRF_TIMER_Type, TASKS_CLEAR), ///< Task for resetting the timer value. - NRF_TIMER_TASK_SHUTDOWN = offsetof(NRF_TIMER_Type, TASKS_SHUTDOWN), ///< Task for powering off the timer. - NRF_TIMER_TASK_CAPTURE0 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[0]), ///< Task for capturing the timer value on channel 0. - NRF_TIMER_TASK_CAPTURE1 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[1]), ///< Task for capturing the timer value on channel 1. - NRF_TIMER_TASK_CAPTURE2 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[2]), ///< Task for capturing the timer value on channel 2. - NRF_TIMER_TASK_CAPTURE3 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[3]), ///< Task for capturing the timer value on channel 3. -#if (TIMER_COUNT > 3) || defined(__SDK_DOXYGEN__) - NRF_TIMER_TASK_CAPTURE4 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[4]), ///< Task for capturing the timer value on channel 4. - NRF_TIMER_TASK_CAPTURE5 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[5]), ///< Task for capturing the timer value on channel 5. -#endif - /*lint -restore*/ -} nrf_timer_task_t; - -/** - * @brief Timer events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_TIMER_EVENT_COMPARE0 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[0]), ///< Event from compare channel 0. - NRF_TIMER_EVENT_COMPARE1 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[1]), ///< Event from compare channel 1. - NRF_TIMER_EVENT_COMPARE2 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[2]), ///< Event from compare channel 2. - NRF_TIMER_EVENT_COMPARE3 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[3]), ///< Event from compare channel 3. -#if (TIMER_COUNT > 3) || defined(__SDK_DOXYGEN__) - NRF_TIMER_EVENT_COMPARE4 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[4]), ///< Event from compare channel 4. - NRF_TIMER_EVENT_COMPARE5 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[5]), ///< Event from compare channel 5. -#endif - /*lint -restore*/ -} nrf_timer_event_t; - -/** - * @brief Types of timer shortcuts. - */ -typedef enum -{ - NRF_TIMER_SHORT_COMPARE0_STOP_MASK = TIMER_SHORTS_COMPARE0_STOP_Msk, ///< Shortcut for stopping the timer based on compare 0. - NRF_TIMER_SHORT_COMPARE1_STOP_MASK = TIMER_SHORTS_COMPARE1_STOP_Msk, ///< Shortcut for stopping the timer based on compare 1. - NRF_TIMER_SHORT_COMPARE2_STOP_MASK = TIMER_SHORTS_COMPARE2_STOP_Msk, ///< Shortcut for stopping the timer based on compare 2. - NRF_TIMER_SHORT_COMPARE3_STOP_MASK = TIMER_SHORTS_COMPARE3_STOP_Msk, ///< Shortcut for stopping the timer based on compare 3. -#if (TIMER_COUNT > 3) || defined(__SDK_DOXYGEN__) - NRF_TIMER_SHORT_COMPARE4_STOP_MASK = TIMER_SHORTS_COMPARE4_STOP_Msk, ///< Shortcut for stopping the timer based on compare 4. - NRF_TIMER_SHORT_COMPARE5_STOP_MASK = TIMER_SHORTS_COMPARE5_STOP_Msk, ///< Shortcut for stopping the timer based on compare 5. -#endif - NRF_TIMER_SHORT_COMPARE0_CLEAR_MASK = TIMER_SHORTS_COMPARE0_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 0. - NRF_TIMER_SHORT_COMPARE1_CLEAR_MASK = TIMER_SHORTS_COMPARE1_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 1. - NRF_TIMER_SHORT_COMPARE2_CLEAR_MASK = TIMER_SHORTS_COMPARE2_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 2. - NRF_TIMER_SHORT_COMPARE3_CLEAR_MASK = TIMER_SHORTS_COMPARE3_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 3. -#if (TIMER_COUNT > 3) || defined(__SDK_DOXYGEN__) - NRF_TIMER_SHORT_COMPARE4_CLEAR_MASK = TIMER_SHORTS_COMPARE4_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 4. - NRF_TIMER_SHORT_COMPARE5_CLEAR_MASK = TIMER_SHORTS_COMPARE5_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 5. -#endif -} nrf_timer_short_mask_t; - -/** - * @brief Timer modes. - */ -typedef enum -{ - NRF_TIMER_MODE_TIMER = TIMER_MODE_MODE_Timer, ///< Timer mode: timer. - NRF_TIMER_MODE_COUNTER = TIMER_MODE_MODE_Counter, ///< Timer mode: counter. -#if defined(TIMER_MODE_MODE_LowPowerCounter) || defined(__SDK_DOXYGEN__) - NRF_TIMER_MODE_LOW_POWER_COUNTER = TIMER_MODE_MODE_LowPowerCounter, ///< Timer mode: low-power counter. -#endif -} nrf_timer_mode_t; - -/** - * @brief Timer bit width. - */ -typedef enum -{ - NRF_TIMER_BIT_WIDTH_8 = TIMER_BITMODE_BITMODE_08Bit, ///< Timer bit width 8 bit. - NRF_TIMER_BIT_WIDTH_16 = TIMER_BITMODE_BITMODE_16Bit, ///< Timer bit width 16 bit. - NRF_TIMER_BIT_WIDTH_24 = TIMER_BITMODE_BITMODE_24Bit, ///< Timer bit width 24 bit. - NRF_TIMER_BIT_WIDTH_32 = TIMER_BITMODE_BITMODE_32Bit ///< Timer bit width 32 bit. -} nrf_timer_bit_width_t; - -/** - * @brief Timer prescalers. - */ -typedef enum -{ - NRF_TIMER_FREQ_16MHz = 0, ///< Timer frequency 16 MHz. - NRF_TIMER_FREQ_8MHz, ///< Timer frequency 8 MHz. - NRF_TIMER_FREQ_4MHz, ///< Timer frequency 4 MHz. - NRF_TIMER_FREQ_2MHz, ///< Timer frequency 2 MHz. - NRF_TIMER_FREQ_1MHz, ///< Timer frequency 1 MHz. - NRF_TIMER_FREQ_500kHz, ///< Timer frequency 500 kHz. - NRF_TIMER_FREQ_250kHz, ///< Timer frequency 250 kHz. - NRF_TIMER_FREQ_125kHz, ///< Timer frequency 125 kHz. - NRF_TIMER_FREQ_62500Hz, ///< Timer frequency 62500 Hz. - NRF_TIMER_FREQ_31250Hz ///< Timer frequency 31250 Hz. -} nrf_timer_frequency_t; - -/** - * @brief Timer capture/compare channels. - */ -typedef enum -{ - NRF_TIMER_CC_CHANNEL0 = 0, ///< Timer capture/compare channel 0. - NRF_TIMER_CC_CHANNEL1, ///< Timer capture/compare channel 1. - NRF_TIMER_CC_CHANNEL2, ///< Timer capture/compare channel 2. - NRF_TIMER_CC_CHANNEL3, ///< Timer capture/compare channel 3. -#if (TIMER_COUNT > 3) || defined(__SDK_DOXYGEN__) - NRF_TIMER_CC_CHANNEL4, ///< Timer capture/compare channel 4. - NRF_TIMER_CC_CHANNEL5, ///< Timer capture/compare channel 5. -#endif -} nrf_timer_cc_channel_t; - -/** - * @brief Timer interrupts. - */ -typedef enum -{ - NRF_TIMER_INT_COMPARE0_MASK = TIMER_INTENSET_COMPARE0_Msk, ///< Timer interrupt from compare event on channel 0. - NRF_TIMER_INT_COMPARE1_MASK = TIMER_INTENSET_COMPARE1_Msk, ///< Timer interrupt from compare event on channel 1. - NRF_TIMER_INT_COMPARE2_MASK = TIMER_INTENSET_COMPARE2_Msk, ///< Timer interrupt from compare event on channel 2. - NRF_TIMER_INT_COMPARE3_MASK = TIMER_INTENSET_COMPARE3_Msk, ///< Timer interrupt from compare event on channel 3. -#if (TIMER_COUNT > 3) || defined(__SDK_DOXYGEN__) - NRF_TIMER_INT_COMPARE4_MASK = TIMER_INTENSET_COMPARE4_Msk, ///< Timer interrupt from compare event on channel 4. - NRF_TIMER_INT_COMPARE5_MASK = TIMER_INTENSET_COMPARE5_Msk, ///< Timer interrupt from compare event on channel 5. -#endif -} nrf_timer_int_mask_t; - - -/** - * @brief Function for activating a specific timer task. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] task Task to activate. - */ -__STATIC_INLINE void nrf_timer_task_trigger(NRF_TIMER_Type * p_reg, - nrf_timer_task_t task); - -/** - * @brief Function for getting the address of a specific timer task register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] task Requested task. - * - * @return Address of the specified task register. - */ -__STATIC_INLINE uint32_t * nrf_timer_task_address_get(NRF_TIMER_Type * p_reg, - nrf_timer_task_t task); - -/** - * @brief Function for clearing a specific timer event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to clear. - */ -__STATIC_INLINE void nrf_timer_event_clear(NRF_TIMER_Type * p_reg, - nrf_timer_event_t event); - -/** - * @brief Function for checking the state of a specific timer event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to check. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_timer_event_check(NRF_TIMER_Type * p_reg, - nrf_timer_event_t event); - -/** - * @brief Function for getting the address of a specific timer event register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Requested event. - * - * @return Address of the specified event register. - */ -__STATIC_INLINE uint32_t * nrf_timer_event_address_get(NRF_TIMER_Type * p_reg, - nrf_timer_event_t event); - -/** - * @brief Function for enabling specified shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] timer_shorts_mask Shortcuts to enable. - */ -__STATIC_INLINE void nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg, - uint32_t timer_shorts_mask); - -/** - * @brief Function for disabling specified shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] timer_shorts_mask Shortcuts to disable. - */ -__STATIC_INLINE void nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg, - uint32_t timer_shorts_mask); - -/** - * @brief Function for enabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] timer_int_mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_timer_int_enable(NRF_TIMER_Type * p_reg, - uint32_t timer_int_mask); - -/** - * @brief Function for disabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] timer_int_mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_timer_int_disable(NRF_TIMER_Type * p_reg, - uint32_t timer_int_mask); - -/** - * @brief Function for retrieving the state of a given interrupt. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] timer_int Interrupt to check. - * - * @retval true If the interrupt is enabled. - * @retval false If the interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_timer_int_enable_check(NRF_TIMER_Type * p_reg, - uint32_t timer_int); - -/** - * @brief Function for setting the timer mode. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] mode Timer mode. - */ -__STATIC_INLINE void nrf_timer_mode_set(NRF_TIMER_Type * p_reg, - nrf_timer_mode_t mode); - -/** - * @brief Function for retrieving the timer mode. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @return Timer mode. - */ -__STATIC_INLINE nrf_timer_mode_t nrf_timer_mode_get(NRF_TIMER_Type * p_reg); - -/** - * @brief Function for setting the timer bit width. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] bit_width Timer bit width. - */ -__STATIC_INLINE void nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg, - nrf_timer_bit_width_t bit_width); - -/** - * @brief Function for retrieving the timer bit width. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @return Timer bit width. - */ -__STATIC_INLINE nrf_timer_bit_width_t nrf_timer_bit_width_get(NRF_TIMER_Type * p_reg); - -/** - * @brief Function for setting the timer frequency. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] frequency Timer frequency. - */ -__STATIC_INLINE void nrf_timer_frequency_set(NRF_TIMER_Type * p_reg, - nrf_timer_frequency_t frequency); - -/** - * @brief Function for retrieving the timer frequency. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @return Timer frequency. - */ -__STATIC_INLINE nrf_timer_frequency_t nrf_timer_frequency_get(NRF_TIMER_Type * p_reg); - -/** - * @brief Function for writing the capture/compare register for a specified channel. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] cc_channel Requested capture/compare channel. - * @param[in] cc_value Value to write to the capture/compare register. - */ -__STATIC_INLINE void nrf_timer_cc_write(NRF_TIMER_Type * p_reg, - nrf_timer_cc_channel_t cc_channel, - uint32_t cc_value); - -/** - * @brief Function for retrieving the capture/compare value for a specified channel. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] cc_channel Requested capture/compare channel. - * - * @return Value from the requested capture/compare register. - */ -__STATIC_INLINE uint32_t nrf_timer_cc_read(NRF_TIMER_Type * p_reg, - nrf_timer_cc_channel_t cc_channel); - -/** - * @brief Function for getting a specific timer capture task. - * - * @param[in] channel Capture channel. - * - * @return Capture task. - */ -__STATIC_INLINE nrf_timer_task_t nrf_timer_capture_task_get(uint32_t channel); - -/** - * @brief Function for getting a specific timer compare event. - * - * @param[in] channel Compare channel. - * - * @return Compare event. - */ -__STATIC_INLINE nrf_timer_event_t nrf_timer_compare_event_get(uint32_t channel); - -/** - * @brief Function for getting a specific timer compare interrupt. - * - * @param[in] channel Compare channel. - * - * @return Compare interrupt. - */ -__STATIC_INLINE nrf_timer_int_mask_t nrf_timer_compare_int_get(uint32_t channel); - -/** - * @brief Function for calculating the number of timer ticks for a given time - * (in microseconds) and timer frequency. - * - * @param[in] time_us Time in microseconds. - * @param[in] frequency Timer frequency. - * - * @return Number of timer ticks. - */ -__STATIC_INLINE uint32_t nrf_timer_us_to_ticks(uint32_t time_us, - nrf_timer_frequency_t frequency); - -/** - * @brief Function for calculating the number of timer ticks for a given time - * (in milliseconds) and timer frequency. - * - * @param[in] time_ms Time in milliseconds. - * @param[in] frequency Timer frequency. - * - * @return Number of timer ticks. - */ -__STATIC_INLINE uint32_t nrf_timer_ms_to_ticks(uint32_t time_ms, - nrf_timer_frequency_t frequency); - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_timer_task_trigger(NRF_TIMER_Type * p_reg, - nrf_timer_task_t task) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL; -} - -__STATIC_INLINE uint32_t * nrf_timer_task_address_get(NRF_TIMER_Type * p_reg, - nrf_timer_task_t task) -{ - return (uint32_t *)((uint8_t *)p_reg + (uint32_t)task); -} - -__STATIC_INLINE void nrf_timer_event_clear(NRF_TIMER_Type * p_reg, - nrf_timer_event_t event) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)); - (void)dummy; -#endif -} - -__STATIC_INLINE bool nrf_timer_event_check(NRF_TIMER_Type * p_reg, - nrf_timer_event_t event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event); -} - -__STATIC_INLINE uint32_t * nrf_timer_event_address_get(NRF_TIMER_Type * p_reg, - nrf_timer_event_t event) -{ - return (uint32_t *)((uint8_t *)p_reg + (uint32_t)event); -} - -__STATIC_INLINE void nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg, - uint32_t timer_shorts_mask) -{ - p_reg->SHORTS |= timer_shorts_mask; -} - -__STATIC_INLINE void nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg, - uint32_t timer_shorts_mask) -{ - p_reg->SHORTS &= ~(timer_shorts_mask); -} - -__STATIC_INLINE void nrf_timer_int_enable(NRF_TIMER_Type * p_reg, - uint32_t timer_int_mask) -{ - p_reg->INTENSET = timer_int_mask; -} - -__STATIC_INLINE void nrf_timer_int_disable(NRF_TIMER_Type * p_reg, - uint32_t timer_int_mask) -{ - p_reg->INTENCLR = timer_int_mask; -} - -__STATIC_INLINE bool nrf_timer_int_enable_check(NRF_TIMER_Type * p_reg, - uint32_t timer_int) -{ - return (bool)(p_reg->INTENSET & timer_int); -} - -__STATIC_INLINE void nrf_timer_mode_set(NRF_TIMER_Type * p_reg, - nrf_timer_mode_t mode) -{ - p_reg->MODE = (p_reg->MODE & ~TIMER_MODE_MODE_Msk) | - ((mode << TIMER_MODE_MODE_Pos) & TIMER_MODE_MODE_Msk); -} - -__STATIC_INLINE nrf_timer_mode_t nrf_timer_mode_get(NRF_TIMER_Type * p_reg) -{ - return (nrf_timer_mode_t)(p_reg->MODE); -} - -__STATIC_INLINE void nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg, - nrf_timer_bit_width_t bit_width) -{ - p_reg->BITMODE = (p_reg->BITMODE & ~TIMER_BITMODE_BITMODE_Msk) | - ((bit_width << TIMER_BITMODE_BITMODE_Pos) & - TIMER_BITMODE_BITMODE_Msk); -} - -__STATIC_INLINE nrf_timer_bit_width_t nrf_timer_bit_width_get(NRF_TIMER_Type * p_reg) -{ - return (nrf_timer_bit_width_t)(p_reg->BITMODE); -} - -__STATIC_INLINE void nrf_timer_frequency_set(NRF_TIMER_Type * p_reg, - nrf_timer_frequency_t frequency) -{ - p_reg->PRESCALER = (p_reg->PRESCALER & ~TIMER_PRESCALER_PRESCALER_Msk) | - ((frequency << TIMER_PRESCALER_PRESCALER_Pos) & - TIMER_PRESCALER_PRESCALER_Msk); -} - -__STATIC_INLINE nrf_timer_frequency_t nrf_timer_frequency_get(NRF_TIMER_Type * p_reg) -{ - return (nrf_timer_frequency_t)(p_reg->PRESCALER); -} - -__STATIC_INLINE void nrf_timer_cc_write(NRF_TIMER_Type * p_reg, - nrf_timer_cc_channel_t cc_channel, - uint32_t cc_value) -{ - p_reg->CC[cc_channel] = cc_value; -} - -__STATIC_INLINE uint32_t nrf_timer_cc_read(NRF_TIMER_Type * p_reg, - nrf_timer_cc_channel_t cc_channel) -{ - return (uint32_t)p_reg->CC[cc_channel]; -} - -__STATIC_INLINE nrf_timer_task_t nrf_timer_capture_task_get(uint32_t channel) -{ - return (nrf_timer_task_t) - ((uint32_t)NRF_TIMER_TASK_CAPTURE0 + (channel * sizeof(uint32_t))); -} - -__STATIC_INLINE nrf_timer_event_t nrf_timer_compare_event_get(uint32_t channel) -{ - return (nrf_timer_event_t) - ((uint32_t)NRF_TIMER_EVENT_COMPARE0 + (channel * sizeof(uint32_t))); -} - -__STATIC_INLINE nrf_timer_int_mask_t nrf_timer_compare_int_get(uint32_t channel) -{ - return (nrf_timer_int_mask_t) - ((uint32_t)NRF_TIMER_INT_COMPARE0_MASK << channel); -} - -__STATIC_INLINE uint32_t nrf_timer_us_to_ticks(uint32_t time_us, - nrf_timer_frequency_t frequency) -{ - // The "frequency" parameter here is actually the prescaler value, and the - // timer runs at the following frequency: f = 16 MHz / 2^prescaler. - uint32_t prescaler = (uint32_t)frequency; - ASSERT(time_us <= (UINT32_MAX / 16UL)); - return ((time_us * 16UL) >> prescaler); -} - -__STATIC_INLINE uint32_t nrf_timer_ms_to_ticks(uint32_t time_ms, - nrf_timer_frequency_t frequency) -{ - // The "frequency" parameter here is actually the prescaler value, and the - // timer runs at the following frequency: f = 16000 kHz / 2^prescaler. - uint32_t prescaler = (uint32_t)frequency; - ASSERT(time_ms <= (UINT32_MAX / 16000UL)); - return ((time_ms * 16000UL) >> prescaler); -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_TIMER_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_twi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_twi.h deleted file mode 100644 index 5e80272bec4..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_twi.h +++ /dev/null @@ -1,452 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_TWI_H__ -#define NRF_TWI_H__ - -/** - * @defgroup nrf_twi_hal TWI HAL - * @{ - * @ingroup nrf_twi - * - * @brief Hardware access layer for managing the TWI peripheral. - */ - -#include -#include -#include - -#include "nrf_peripherals.h" -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief TWI tasks. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_TWI_TASK_STARTRX = offsetof(NRF_TWI_Type, TASKS_STARTRX), ///< Start TWI receive sequence. - NRF_TWI_TASK_STARTTX = offsetof(NRF_TWI_Type, TASKS_STARTTX), ///< Start TWI transmit sequence. - NRF_TWI_TASK_STOP = offsetof(NRF_TWI_Type, TASKS_STOP), ///< Stop TWI transaction. - NRF_TWI_TASK_SUSPEND = offsetof(NRF_TWI_Type, TASKS_SUSPEND), ///< Suspend TWI transaction. - NRF_TWI_TASK_RESUME = offsetof(NRF_TWI_Type, TASKS_RESUME) ///< Resume TWI transaction. - /*lint -restore*/ -} nrf_twi_task_t; - -/** - * @brief TWI events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_TWI_EVENT_STOPPED = offsetof(NRF_TWI_Type, EVENTS_STOPPED), ///< TWI stopped. - NRF_TWI_EVENT_RXDREADY = offsetof(NRF_TWI_Type, EVENTS_RXDREADY), ///< TWI RXD byte received. - NRF_TWI_EVENT_TXDSENT = offsetof(NRF_TWI_Type, EVENTS_TXDSENT), ///< TWI TXD byte sent. - NRF_TWI_EVENT_ERROR = offsetof(NRF_TWI_Type, EVENTS_ERROR), ///< TWI error. - NRF_TWI_EVENT_BB = offsetof(NRF_TWI_Type, EVENTS_BB), ///< TWI byte boundary, generated before each byte that is sent or received. - NRF_TWI_EVENT_SUSPENDED = offsetof(NRF_TWI_Type, EVENTS_SUSPENDED) ///< TWI entered the suspended state. - /*lint -restore*/ -} nrf_twi_event_t; - -/** - * @brief TWI shortcuts. - */ -typedef enum -{ - NRF_TWI_SHORT_BB_SUSPEND_MASK = TWI_SHORTS_BB_SUSPEND_Msk, ///< Shortcut between BB event and SUSPEND task. - NRF_TWI_SHORT_BB_STOP_MASK = TWI_SHORTS_BB_STOP_Msk, ///< Shortcut between BB event and STOP task. -} nrf_twi_short_mask_t; - -/** - * @brief TWI interrupts. - */ -typedef enum -{ - NRF_TWI_INT_STOPPED_MASK = TWI_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event. - NRF_TWI_INT_RXDREADY_MASK = TWI_INTENSET_RXDREADY_Msk, ///< Interrupt on RXDREADY event. - NRF_TWI_INT_TXDSENT_MASK = TWI_INTENSET_TXDSENT_Msk, ///< Interrupt on TXDSENT event. - NRF_TWI_INT_ERROR_MASK = TWI_INTENSET_ERROR_Msk, ///< Interrupt on ERROR event. - NRF_TWI_INT_BB_MASK = TWI_INTENSET_BB_Msk, ///< Interrupt on BB event. - NRF_TWI_INT_SUSPENDED_MASK = TWI_INTENSET_SUSPENDED_Msk ///< Interrupt on SUSPENDED event. -} nrf_twi_int_mask_t; - -/** - * @brief TWI error source. - */ -typedef enum -{ - NRF_TWI_ERROR_ADDRESS_NACK = TWI_ERRORSRC_ANACK_Msk, ///< NACK received after sending the address. - NRF_TWI_ERROR_DATA_NACK = TWI_ERRORSRC_DNACK_Msk, ///< NACK received after sending a data byte. - NRF_TWI_ERROR_OVERRUN = TWI_ERRORSRC_OVERRUN_Msk ///< Overrun error. - /**< A new byte was received before the previous byte was read - * from the RXD register (previous data is lost). */ -} nrf_twi_error_t; - -/** - * @brief TWI master clock frequency. - */ -typedef enum -{ - NRF_TWI_FREQ_100K = TWI_FREQUENCY_FREQUENCY_K100, ///< 100 kbps. - NRF_TWI_FREQ_250K = TWI_FREQUENCY_FREQUENCY_K250, ///< 250 kbps. - NRF_TWI_FREQ_400K = TWI_FREQUENCY_FREQUENCY_K400 ///< 400 kbps. -} nrf_twi_frequency_t; - - -/** - * @brief Function for activating a specific TWI task. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] task Task to activate. - */ -__STATIC_INLINE void nrf_twi_task_trigger(NRF_TWI_Type * p_reg, - nrf_twi_task_t task); - -/** - * @brief Function for getting the address of a specific TWI task register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] task Requested task. - * - * @return Address of the specified task register. - */ -__STATIC_INLINE uint32_t * nrf_twi_task_address_get(NRF_TWI_Type * p_reg, - nrf_twi_task_t task); - -/** - * @brief Function for clearing a specific TWI event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to clear. - */ -__STATIC_INLINE void nrf_twi_event_clear(NRF_TWI_Type * p_reg, - nrf_twi_event_t event); - -/** - * @brief Function for checking the state of a specific event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to check. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_twi_event_check(NRF_TWI_Type * p_reg, - nrf_twi_event_t event); - -/** - * @brief Function for getting the address of a specific TWI event register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Requested event. - * - * @return Address of the specified event register. - */ -__STATIC_INLINE uint32_t * nrf_twi_event_address_get(NRF_TWI_Type * p_reg, - nrf_twi_event_t event); - -/** - * @brief Function for enabling specified shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] shorts_mask Shortcuts to enable. - */ -__STATIC_INLINE void nrf_twi_shorts_enable(NRF_TWI_Type * p_reg, - uint32_t shorts_mask); - -/** - * @brief Function for disabling specified shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] shorts_mask Shortcuts to disable. - */ -__STATIC_INLINE void nrf_twi_shorts_disable(NRF_TWI_Type * p_reg, - uint32_t shorts_mask); - -/** - * @brief Function for enabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] int_mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_twi_int_enable(NRF_TWI_Type * p_reg, - uint32_t int_mask); - -/** - * @brief Function for disabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] int_mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_twi_int_disable(NRF_TWI_Type * p_reg, - uint32_t int_mask); - -/** - * @brief Function for retrieving the state of a given interrupt. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] int_mask Interrupt to check. - * - * @retval true If the interrupt is enabled. - * @retval false If the interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_twi_int_enable_check(NRF_TWI_Type * p_reg, - nrf_twi_int_mask_t int_mask); - -/** - * @brief Function for enabling the TWI peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_twi_enable(NRF_TWI_Type * p_reg); - -/** - * @brief Function for disabling the TWI peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_twi_disable(NRF_TWI_Type * p_reg); - -/** - * @brief Function for configuring TWI pins. - * - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] scl_pin SCL pin number. - * @param[in] sda_pin SDA pin number. - */ -__STATIC_INLINE void nrf_twi_pins_set(NRF_TWI_Type * p_reg, - uint32_t scl_pin, - uint32_t sda_pin); - -/** - * @brief Function for setting the TWI master clock frequency. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] frequency TWI frequency. - */ -__STATIC_INLINE void nrf_twi_frequency_set(NRF_TWI_Type * p_reg, - nrf_twi_frequency_t frequency); - -/** - * @brief Function for checking the TWI error source. - * - * The error flags are cleared after reading. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @return Mask with error source flags. - */ -__STATIC_INLINE uint32_t nrf_twi_errorsrc_get_and_clear(NRF_TWI_Type * p_reg); - -/** - * @brief Function for setting the address to be used in TWI transfers. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] address Address to be used in transfers. - */ -__STATIC_INLINE void nrf_twi_address_set(NRF_TWI_Type * p_reg, uint8_t address); - -/** - * @brief Function for reading data received by TWI. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @return Received data. - */ -__STATIC_INLINE uint8_t nrf_twi_rxd_get(NRF_TWI_Type * p_reg); - -/** - * @brief Function for writing data to be transmitted by TWI. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] data Data to be transmitted. - */ -__STATIC_INLINE void nrf_twi_txd_set(NRF_TWI_Type * p_reg, uint8_t data); - -__STATIC_INLINE void nrf_twi_shorts_set(NRF_TWI_Type * p_reg, - uint32_t shorts_mask); - -/** - * @} - */ - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_twi_task_trigger(NRF_TWI_Type * p_reg, - nrf_twi_task_t task) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL; -} - -__STATIC_INLINE uint32_t * nrf_twi_task_address_get(NRF_TWI_Type * p_reg, - nrf_twi_task_t task) -{ - return (uint32_t *)((uint8_t *)p_reg + (uint32_t)task); -} - -__STATIC_INLINE void nrf_twi_event_clear(NRF_TWI_Type * p_reg, - nrf_twi_event_t event) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)); - (void)dummy; -#endif -} - -__STATIC_INLINE bool nrf_twi_event_check(NRF_TWI_Type * p_reg, - nrf_twi_event_t event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event); -} - -__STATIC_INLINE uint32_t * nrf_twi_event_address_get(NRF_TWI_Type * p_reg, - nrf_twi_event_t event) -{ - return (uint32_t *)((uint8_t *)p_reg + (uint32_t)event); -} - -__STATIC_INLINE void nrf_twi_shorts_enable(NRF_TWI_Type * p_reg, - uint32_t shorts_mask) -{ - p_reg->SHORTS |= shorts_mask; -} - -__STATIC_INLINE void nrf_twi_shorts_disable(NRF_TWI_Type * p_reg, - uint32_t shorts_mask) -{ - p_reg->SHORTS &= ~(shorts_mask); -} - -__STATIC_INLINE void nrf_twi_int_enable(NRF_TWI_Type * p_reg, - uint32_t int_mask) -{ - p_reg->INTENSET = int_mask; -} - -__STATIC_INLINE void nrf_twi_int_disable(NRF_TWI_Type * p_reg, - uint32_t int_mask) -{ - p_reg->INTENCLR = int_mask; -} - -__STATIC_INLINE bool nrf_twi_int_enable_check(NRF_TWI_Type * p_reg, - nrf_twi_int_mask_t int_mask) -{ - return (bool)(p_reg->INTENSET & int_mask); -} - -__STATIC_INLINE void nrf_twi_enable(NRF_TWI_Type * p_reg) -{ - p_reg->ENABLE = (TWI_ENABLE_ENABLE_Enabled << TWI_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_twi_disable(NRF_TWI_Type * p_reg) -{ - p_reg->ENABLE = (TWI_ENABLE_ENABLE_Disabled << TWI_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_twi_pins_set(NRF_TWI_Type * p_reg, - uint32_t scl_pin, - uint32_t sda_pin) -{ -#if defined(TWI_PSEL_SCL_CONNECT_Pos) - p_reg->PSEL.SCL = scl_pin; -#else - p_reg->PSELSCL = scl_pin; -#endif - -#if defined(TWI_PSEL_SDA_CONNECT_Pos) - p_reg->PSEL.SDA = sda_pin; -#else - p_reg->PSELSDA = sda_pin; -#endif -} - -__STATIC_INLINE void nrf_twi_frequency_set(NRF_TWI_Type * p_reg, - nrf_twi_frequency_t frequency) -{ - p_reg->FREQUENCY = frequency; -} - -__STATIC_INLINE uint32_t nrf_twi_errorsrc_get_and_clear(NRF_TWI_Type * p_reg) -{ - uint32_t error_source = p_reg->ERRORSRC; - - // [error flags are cleared by writing '1' on their position] - p_reg->ERRORSRC = error_source; - - return error_source; -} - -__STATIC_INLINE void nrf_twi_address_set(NRF_TWI_Type * p_reg, uint8_t address) -{ - p_reg->ADDRESS = address; -} - -__STATIC_INLINE uint8_t nrf_twi_rxd_get(NRF_TWI_Type * p_reg) -{ - return (uint8_t)p_reg->RXD; -} - -__STATIC_INLINE void nrf_twi_txd_set(NRF_TWI_Type * p_reg, uint8_t data) -{ - p_reg->TXD = data; -} - -__STATIC_INLINE void nrf_twi_shorts_set(NRF_TWI_Type * p_reg, - uint32_t shorts_mask) -{ - p_reg->SHORTS = shorts_mask; -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_TWI_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_twim.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_twim.h deleted file mode 100644 index 73d790efbf2..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_twim.h +++ /dev/null @@ -1,527 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_TWIM_H__ -#define NRF_TWIM_H__ - -/** - * @defgroup nrf_twim_hal TWIM HAL - * @{ - * @ingroup nrf_twi - * - * @brief Hardware access layer for managing the TWIM peripheral. - */ - -#include -#include -#include - -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief TWIM tasks. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_TWIM_TASK_STARTRX = offsetof(NRF_TWIM_Type, TASKS_STARTRX), ///< Start TWI receive sequence. - NRF_TWIM_TASK_STARTTX = offsetof(NRF_TWIM_Type, TASKS_STARTTX), ///< Start TWI transmit sequence. - NRF_TWIM_TASK_STOP = offsetof(NRF_TWIM_Type, TASKS_STOP), ///< Stop TWI transaction. - NRF_TWIM_TASK_SUSPEND = offsetof(NRF_TWIM_Type, TASKS_SUSPEND), ///< Suspend TWI transaction. - NRF_TWIM_TASK_RESUME = offsetof(NRF_TWIM_Type, TASKS_RESUME) ///< Resume TWI transaction. - /*lint -restore*/ -} nrf_twim_task_t; - -/** - * @brief TWIM events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_TWIM_EVENT_STOPPED = offsetof(NRF_TWIM_Type, EVENTS_STOPPED), ///< TWI stopped. - NRF_TWIM_EVENT_ERROR = offsetof(NRF_TWIM_Type, EVENTS_ERROR), ///< TWI error. - NRF_TWIM_EVENT_SUSPENDED = 0x148, ///< TWI suspended. - NRF_TWIM_EVENT_RXSTARTED = offsetof(NRF_TWIM_Type, EVENTS_RXSTARTED), ///< Receive sequence started. - NRF_TWIM_EVENT_TXSTARTED = offsetof(NRF_TWIM_Type, EVENTS_TXSTARTED), ///< Transmit sequence started. - NRF_TWIM_EVENT_LASTRX = offsetof(NRF_TWIM_Type, EVENTS_LASTRX), ///< Byte boundary, starting to receive the last byte. - NRF_TWIM_EVENT_LASTTX = offsetof(NRF_TWIM_Type, EVENTS_LASTTX) ///< Byte boundary, starting to transmit the last byte. - /*lint -restore*/ -} nrf_twim_event_t; - -/** - * @brief TWIM shortcuts. - */ -typedef enum -{ - NRF_TWIM_SHORT_LASTTX_STARTRX_MASK = TWIM_SHORTS_LASTTX_STARTRX_Msk, ///< Shortcut between LASTTX event and STARTRX task. - NRF_TWIM_SHORT_LASTTX_SUSPEND_MASK = TWIM_SHORTS_LASTTX_SUSPEND_Msk, ///< Shortcut between LASTTX event and SUSPEND task. - NRF_TWIM_SHORT_LASTTX_STOP_MASK = TWIM_SHORTS_LASTTX_STOP_Msk, ///< Shortcut between LASTTX event and STOP task. - NRF_TWIM_SHORT_LASTRX_STARTTX_MASK = TWIM_SHORTS_LASTRX_STARTTX_Msk, ///< Shortcut between LASTRX event and STARTTX task. - NRF_TWIM_SHORT_LASTRX_STOP_MASK = TWIM_SHORTS_LASTRX_STOP_Msk ///< Shortcut between LASTRX event and STOP task. -} nrf_twim_short_mask_t; - -/** - * @brief TWIM interrupts. - */ -typedef enum -{ - NRF_TWIM_INT_STOPPED_MASK = TWIM_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event. - NRF_TWIM_INT_ERROR_MASK = TWIM_INTENSET_ERROR_Msk, ///< Interrupt on ERROR event. - NRF_TWIM_INT_SUSPENDED_MASK = (1 << 18), ///< Interrupt on SUSPENDED event. - NRF_TWIM_INT_RXSTARTED_MASK = TWIM_INTENSET_RXSTARTED_Msk, ///< Interrupt on RXSTARTED event. - NRF_TWIM_INT_TXSTARTED_MASK = TWIM_INTENSET_TXSTARTED_Msk, ///< Interrupt on TXSTARTED event. - NRF_TWIM_INT_LASTRX_MASK = TWIM_INTENSET_LASTRX_Msk, ///< Interrupt on LASTRX event. - NRF_TWIM_INT_LASTTX_MASK = TWIM_INTENSET_LASTTX_Msk ///< Interrupt on LASTTX event. -} nrf_twim_int_mask_t; - -/** - * @brief TWIM master clock frequency. - */ -typedef enum -{ - NRF_TWIM_FREQ_100K = TWIM_FREQUENCY_FREQUENCY_K100, ///< 100 kbps. - NRF_TWIM_FREQ_250K = TWIM_FREQUENCY_FREQUENCY_K250, ///< 250 kbps. - NRF_TWIM_FREQ_400K = TWIM_FREQUENCY_FREQUENCY_K400, ///< 400 kbps. -#ifndef TWI_PRESENT - NRF_TWI_FREQ_100K = NRF_TWIM_FREQ_100K, - NRF_TWI_FREQ_250K = NRF_TWIM_FREQ_250K, - NRF_TWI_FREQ_400K = NRF_TWIM_FREQ_400K, -#endif -} nrf_twim_frequency_t; - -/** - * @brief TWIM error source. - */ -typedef enum -{ - NRF_TWIM_ERROR_ADDRESS_NACK = TWIM_ERRORSRC_ANACK_Msk, ///< NACK received after sending the address. - NRF_TWIM_ERROR_DATA_NACK = TWIM_ERRORSRC_DNACK_Msk, ///< NACK received after sending a data byte. -#ifndef TWI_PRESENT - NRF_TWI_ERROR_ADDRESS_NACK = NRF_TWIM_ERROR_ADDRESS_NACK, - NRF_TWI_ERROR_DATA_NACK = NRF_TWIM_ERROR_DATA_NACK, -#endif -} nrf_twim_error_t; - - -/** - * @brief Function for activating a specific TWIM task. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] task Task to activate. - */ -__STATIC_INLINE void nrf_twim_task_trigger(NRF_TWIM_Type * p_reg, - nrf_twim_task_t task); - -/** - * @brief Function for getting the address of a specific TWIM task register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] task Requested task. - * - * @return Address of the specified task register. - */ -__STATIC_INLINE uint32_t * nrf_twim_task_address_get(NRF_TWIM_Type * p_reg, - nrf_twim_task_t task); - -/** - * @brief Function for clearing a specific TWIM event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to clear. - */ -__STATIC_INLINE void nrf_twim_event_clear(NRF_TWIM_Type * p_reg, - nrf_twim_event_t event); - -/** - * @brief Function for checking the state of a specific TWIM event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to check. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_twim_event_check(NRF_TWIM_Type * p_reg, - nrf_twim_event_t event); - -/** - * @brief Function for getting the address of a specific TWIM event register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Requested event. - * - * @return Address of the specified event register. - */ -__STATIC_INLINE uint32_t * nrf_twim_event_address_get(NRF_TWIM_Type * p_reg, - nrf_twim_event_t event); - -/** - * @brief Function for enabling specified shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] shorts_mask Shortcuts to enable. - */ -__STATIC_INLINE void nrf_twim_shorts_enable(NRF_TWIM_Type * p_reg, - uint32_t shorts_mask); - -/** - * @brief Function for disabling specified shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] shorts_mask Shortcuts to disable. - */ -__STATIC_INLINE void nrf_twim_shorts_disable(NRF_TWIM_Type * p_reg, - uint32_t shorts_mask); - -/** - * @brief Function for enabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] int_mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_twim_int_enable(NRF_TWIM_Type * p_reg, - uint32_t int_mask); - -/** - * @brief Function for disabling specified interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] int_mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_twim_int_disable(NRF_TWIM_Type * p_reg, - uint32_t int_mask); - -/** - * @brief Function for checking the state of a given interrupt. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] int_mask Interrupt to check. - * - * @retval true If the interrupt is enabled. - * @retval false If the interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_twim_int_enable_check(NRF_TWIM_Type * p_reg, - nrf_twim_int_mask_t int_mask); - -/** - * @brief Function for enabling the TWIM peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_twim_enable(NRF_TWIM_Type * p_reg); - -/** - * @brief Function for disabling the TWIM peripheral. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_twim_disable(NRF_TWIM_Type * p_reg); - -/** - * @brief Function for configuring TWI pins. - * - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] scl_pin SCL pin number. - * @param[in] sda_pin SDA pin number. - */ -__STATIC_INLINE void nrf_twim_pins_set(NRF_TWIM_Type * p_reg, - uint32_t scl_pin, - uint32_t sda_pin); - -/** - * @brief Function for setting the TWI master clock frequency. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] frequency TWI frequency. - */ -__STATIC_INLINE void nrf_twim_frequency_set(NRF_TWIM_Type * p_reg, - nrf_twim_frequency_t frequency); - -/** - * @brief Function for checking the TWI error source. - * - * The error flags are cleared after reading. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @return Mask with error source flags. - */ -__STATIC_INLINE uint32_t nrf_twim_errorsrc_get_and_clear(NRF_TWIM_Type * p_reg); - -/** - * @brief Function for setting the address to be used in TWI transfers. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] address Address to be used in transfers. - */ -__STATIC_INLINE void nrf_twim_address_set(NRF_TWIM_Type * p_reg, - uint8_t address); - -/** - * @brief Function for setting the transmit buffer. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] p_buffer Pointer to the buffer with data to send. - * @param[in] length Maximum number of data bytes to transmit. - */ -__STATIC_INLINE void nrf_twim_tx_buffer_set(NRF_TWIM_Type * p_reg, - uint8_t const * p_buffer, - uint8_t length); - -/** - * @brief Function for setting the receive buffer. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] p_buffer Pointer to the buffer for received data. - * @param[in] length Maximum number of data bytes to receive. - */ -__STATIC_INLINE void nrf_twim_rx_buffer_set(NRF_TWIM_Type * p_reg, - uint8_t * p_buffer, - uint8_t length); - -__STATIC_INLINE void nrf_twim_shorts_set(NRF_TWIM_Type * p_reg, - uint32_t shorts_mask); - -__STATIC_INLINE uint32_t nrf_twim_txd_amount_get(NRF_TWIM_Type * p_reg); - -__STATIC_INLINE uint32_t nrf_twim_rxd_amount_get(NRF_TWIM_Type * p_reg); - -/** - * @brief Function for enabling the TX list feature. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_twim_tx_list_enable(NRF_TWIM_Type * p_reg); - -/** - * @brief Function for disabling the TX list feature. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_twim_tx_list_disable(NRF_TWIM_Type * p_reg); - -/** - * @brief Function for enabling the RX list feature. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_twim_rx_list_enable(NRF_TWIM_Type * p_reg); - -/** - * @brief Function for disabling the RX list feature. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_twim_rx_list_disable(NRF_TWIM_Type * p_reg); - -/** - * @} - */ - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_twim_task_trigger(NRF_TWIM_Type * p_reg, - nrf_twim_task_t task) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL; -} - -__STATIC_INLINE uint32_t * nrf_twim_task_address_get(NRF_TWIM_Type * p_reg, - nrf_twim_task_t task) -{ - return (uint32_t *)((uint8_t *)p_reg + (uint32_t)task); -} - -__STATIC_INLINE void nrf_twim_event_clear(NRF_TWIM_Type * p_reg, - nrf_twim_event_t event) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)); - (void)dummy; -#endif -} - -__STATIC_INLINE bool nrf_twim_event_check(NRF_TWIM_Type * p_reg, - nrf_twim_event_t event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event); -} - -__STATIC_INLINE uint32_t * nrf_twim_event_address_get(NRF_TWIM_Type * p_reg, - nrf_twim_event_t event) -{ - return (uint32_t *)((uint8_t *)p_reg + (uint32_t)event); -} - -__STATIC_INLINE void nrf_twim_shorts_enable(NRF_TWIM_Type * p_reg, - uint32_t shorts_mask) -{ - p_reg->SHORTS |= shorts_mask; -} - -__STATIC_INLINE void nrf_twim_shorts_disable(NRF_TWIM_Type * p_reg, - uint32_t shorts_mask) -{ - p_reg->SHORTS &= ~(shorts_mask); -} - -__STATIC_INLINE void nrf_twim_int_enable(NRF_TWIM_Type * p_reg, - uint32_t int_mask) -{ - p_reg->INTENSET = int_mask; -} - -__STATIC_INLINE void nrf_twim_int_disable(NRF_TWIM_Type * p_reg, - uint32_t int_mask) -{ - p_reg->INTENCLR = int_mask; -} - -__STATIC_INLINE bool nrf_twim_int_enable_check(NRF_TWIM_Type * p_reg, - nrf_twim_int_mask_t int_mask) -{ - return (bool)(p_reg->INTENSET & int_mask); -} - -__STATIC_INLINE void nrf_twim_enable(NRF_TWIM_Type * p_reg) -{ - p_reg->ENABLE = (TWIM_ENABLE_ENABLE_Enabled << TWIM_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_twim_disable(NRF_TWIM_Type * p_reg) -{ - p_reg->ENABLE = (TWIM_ENABLE_ENABLE_Disabled << TWIM_ENABLE_ENABLE_Pos); -} - -__STATIC_INLINE void nrf_twim_pins_set(NRF_TWIM_Type * p_reg, - uint32_t scl_pin, - uint32_t sda_pin) -{ - p_reg->PSEL.SCL = scl_pin; - p_reg->PSEL.SDA = sda_pin; -} - -__STATIC_INLINE void nrf_twim_frequency_set(NRF_TWIM_Type * p_reg, - nrf_twim_frequency_t frequency) -{ - p_reg->FREQUENCY = frequency; -} - -__STATIC_INLINE uint32_t nrf_twim_errorsrc_get_and_clear(NRF_TWIM_Type * p_reg) -{ - uint32_t error_source = p_reg->ERRORSRC; - - // [error flags are cleared by writing '1' on their position] - p_reg->ERRORSRC = error_source; - - return error_source; -} - -__STATIC_INLINE void nrf_twim_address_set(NRF_TWIM_Type * p_reg, - uint8_t address) -{ - p_reg->ADDRESS = address; -} - -__STATIC_INLINE void nrf_twim_tx_buffer_set(NRF_TWIM_Type * p_reg, - uint8_t const * p_buffer, - uint8_t length) -{ - p_reg->TXD.PTR = (uint32_t)p_buffer; - p_reg->TXD.MAXCNT = length; -} - -__STATIC_INLINE void nrf_twim_rx_buffer_set(NRF_TWIM_Type * p_reg, - uint8_t * p_buffer, - uint8_t length) -{ - p_reg->RXD.PTR = (uint32_t)p_buffer; - p_reg->RXD.MAXCNT = length; -} - -__STATIC_INLINE void nrf_twim_shorts_set(NRF_TWIM_Type * p_reg, - uint32_t shorts_mask) -{ - p_reg->SHORTS = shorts_mask; -} - -__STATIC_INLINE uint32_t nrf_twim_txd_amount_get(NRF_TWIM_Type * p_reg) -{ - return p_reg->TXD.AMOUNT; -} - -__STATIC_INLINE uint32_t nrf_twim_rxd_amount_get(NRF_TWIM_Type * p_reg) -{ - return p_reg->RXD.AMOUNT; -} - -__STATIC_INLINE void nrf_twim_tx_list_enable(NRF_TWIM_Type * p_reg) -{ - p_reg->TXD.LIST = 1; -} - -__STATIC_INLINE void nrf_twim_tx_list_disable(NRF_TWIM_Type * p_reg) -{ - p_reg->TXD.LIST = 0; -} - -__STATIC_INLINE void nrf_twim_rx_list_enable(NRF_TWIM_Type * p_reg) -{ - p_reg->RXD.LIST = 1; -} - -__STATIC_INLINE void nrf_twim_rx_list_disable(NRF_TWIM_Type * p_reg) -{ - p_reg->RXD.LIST = 0; -} -#endif // SUPPRESS_INLINE_IMPLEMENTATION - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_TWIM_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_twis.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_twis.h deleted file mode 100644 index 3cd56d6ce66..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_twis.h +++ /dev/null @@ -1,706 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @ingroup nrf_twis - * @defgroup nrf_twis_hal TWIS HAL - * @{ - * - * @brief @tagAPI52 Hardware access layer for Two Wire Interface Slave with EasyDMA - * (TWIS) peripheral. - */ -#ifndef NRF_TWIS_H__ -#define NRF_TWIS_H__ - -#include "nrf.h" -#include "sdk_config.h" -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief TWIS tasks - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_TWIS_TASK_STOP = offsetof(NRF_TWIS_Type, TASKS_STOP), /**< Stop TWIS transaction */ - NRF_TWIS_TASK_SUSPEND = offsetof(NRF_TWIS_Type, TASKS_SUSPEND), /**< Suspend TWIS transaction */ - NRF_TWIS_TASK_RESUME = offsetof(NRF_TWIS_Type, TASKS_RESUME), /**< Resume TWIS transaction */ - NRF_TWIS_TASK_PREPARERX = offsetof(NRF_TWIS_Type, TASKS_PREPARERX), /**< Prepare the TWIS slave to respond to a write command */ - NRF_TWIS_TASK_PREPARETX = offsetof(NRF_TWIS_Type, TASKS_PREPARETX) /**< Prepare the TWIS slave to respond to a read command */ - /*lint -restore*/ -} nrf_twis_task_t; - -/** - * @brief TWIS events - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_TWIS_EVENT_STOPPED = offsetof(NRF_TWIS_Type, EVENTS_STOPPED), /**< TWIS stopped */ - NRF_TWIS_EVENT_ERROR = offsetof(NRF_TWIS_Type, EVENTS_ERROR), /**< TWIS error */ - NRF_TWIS_EVENT_RXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_RXSTARTED), /**< Receive sequence started */ - NRF_TWIS_EVENT_TXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_TXSTARTED), /**< Transmit sequence started */ - NRF_TWIS_EVENT_WRITE = offsetof(NRF_TWIS_Type, EVENTS_WRITE), /**< Write command received */ - NRF_TWIS_EVENT_READ = offsetof(NRF_TWIS_Type, EVENTS_READ) /**< Read command received */ - /*lint -restore*/ -} nrf_twis_event_t; - -/** - * @brief TWIS shortcuts - */ -typedef enum -{ - NRF_TWIS_SHORT_WRITE_SUSPEND_MASK = TWIS_SHORTS_WRITE_SUSPEND_Msk, /**< Shortcut between WRITE event and SUSPEND task */ - NRF_TWIS_SHORT_READ_SUSPEND_MASK = TWIS_SHORTS_READ_SUSPEND_Msk, /**< Shortcut between READ event and SUSPEND task */ -} nrf_twis_short_mask_t; - -/** - * @brief TWIS interrupts - */ -typedef enum -{ - NRF_TWIS_INT_STOPPED_MASK = TWIS_INTEN_STOPPED_Msk, /**< Interrupt on STOPPED event */ - NRF_TWIS_INT_ERROR_MASK = TWIS_INTEN_ERROR_Msk, /**< Interrupt on ERROR event */ - NRF_TWIS_INT_RXSTARTED_MASK = TWIS_INTEN_RXSTARTED_Msk, /**< Interrupt on RXSTARTED event */ - NRF_TWIS_INT_TXSTARTED_MASK = TWIS_INTEN_TXSTARTED_Msk, /**< Interrupt on TXSTARTED event */ - NRF_TWIS_INT_WRITE_MASK = TWIS_INTEN_WRITE_Msk, /**< Interrupt on WRITE event */ - NRF_TWIS_INT_READ_MASK = TWIS_INTEN_READ_Msk, /**< Interrupt on READ event */ -} nrf_twis_int_mask_t; - -/** - * @brief TWIS error source - */ -typedef enum -{ - NRF_TWIS_ERROR_OVERFLOW = TWIS_ERRORSRC_OVERFLOW_Msk, /**< RX buffer overflow detected, and prevented */ - NRF_TWIS_ERROR_DATA_NACK = TWIS_ERRORSRC_DNACK_Msk, /**< NACK sent after receiving a data byte */ - NRF_TWIS_ERROR_OVERREAD = TWIS_ERRORSRC_OVERREAD_Msk /**< TX buffer over-read detected, and prevented */ -} nrf_twis_error_t; - -/** - * @brief TWIS address matching configuration - */ -typedef enum -{ - NRF_TWIS_CONFIG_ADDRESS0_MASK = TWIS_CONFIG_ADDRESS0_Msk, /**< Enable or disable address matching on ADDRESS[0] */ - NRF_TWIS_CONFIG_ADDRESS1_MASK = TWIS_CONFIG_ADDRESS1_Msk, /**< Enable or disable address matching on ADDRESS[1] */ - NRF_TWIS_CONFIG_ADDRESS01_MASK = TWIS_CONFIG_ADDRESS0_Msk | TWIS_CONFIG_ADDRESS1_Msk /**< Enable both address matching */ -} nrf_twis_config_addr_mask_t; - -/** - * @brief Variable type to hold amount of data for EasyDMA - * - * Variable of the minimum size that can hold the amount of data to transfer. - * - * @note - * Defined to make it simple to change if EasyDMA would be updated to support more data in - * the future devices to. - */ -typedef uint8_t nrf_twis_amount_t; - -/** - * @brief Smallest variable type to hold TWI address - * - * Variable of the minimum size that can hold single TWI address. - * - * @note - * Defined to make it simple to change if new TWI would support for example - * 10 bit addressing mode. - */ -typedef uint8_t nrf_twis_address_t; - - -/** - * @brief Function for activating a specific TWIS task. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param task Task. - */ -__STATIC_INLINE void nrf_twis_task_trigger(NRF_TWIS_Type * const p_reg, nrf_twis_task_t task); - -/** - * @brief Function for returning the address of a specific TWIS task register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param task Task. - * - * @return Task address. - */ -__STATIC_INLINE uint32_t nrf_twis_task_address_get( - NRF_TWIS_Type const * const p_reg, - nrf_twis_task_t task); - -/** - * @brief Function for clearing a specific event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param event Event. - */ -__STATIC_INLINE void nrf_twis_event_clear( - NRF_TWIS_Type * const p_reg, - nrf_twis_event_t event); -/** - * @brief Function for returning the state of a specific event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param event Event. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_twis_event_check( - NRF_TWIS_Type const * const p_reg, - nrf_twis_event_t event); - - -/** - * @brief Function for getting and clearing the state of specific event - * - * This function checks the state of the event and clears it. - * @param[in,out] p_reg Pointer to the peripheral registers structure. - * @param event Event. - * - * @retval true If the event was set. - * @retval false If the event was not set. - */ -__STATIC_INLINE bool nrf_twis_event_get_and_clear( - NRF_TWIS_Type * const p_reg, - nrf_twis_event_t event); - - -/** - * @brief Function for returning the address of a specific TWIS event register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param event Event. - * - * @return Address. - */ -__STATIC_INLINE uint32_t nrf_twis_event_address_get( - NRF_TWIS_Type const * const p_reg, - nrf_twis_event_t event); - -/** - * @brief Function for setting a shortcut. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param short_mask Shortcuts mask. - */ -__STATIC_INLINE void nrf_twis_shorts_enable(NRF_TWIS_Type * const p_reg, uint32_t short_mask); - -/** - * @brief Function for clearing shortcuts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param short_mask Shortcuts mask. - */ -__STATIC_INLINE void nrf_twis_shorts_disable(NRF_TWIS_Type * const p_reg, uint32_t short_mask); - -/** - * @brief Get the shorts mask - * - * Function returns shorts register. - * @param[in] p_reg Pointer to the peripheral registers structure. - * @return Flags of currently enabled shortcuts - */ -__STATIC_INLINE uint32_t nrf_twis_shorts_get(NRF_TWIS_Type * const p_reg); - -/** - * @brief Function for enabling selected interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param int_mask Interrupts mask. - */ -__STATIC_INLINE void nrf_twis_int_enable(NRF_TWIS_Type * const p_reg, uint32_t int_mask); - -/** - * @brief Function for retrieving the state of selected interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param int_mask Interrupts mask. - * - * @retval true If any of selected interrupts is enabled. - * @retval false If none of selected interrupts is enabled. - */ -__STATIC_INLINE bool nrf_twis_int_enable_check(NRF_TWIS_Type const * const p_reg, uint32_t int_mask); - -/** - * @brief Function for disabling selected interrupts. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param int_mask Interrupts mask. - */ -__STATIC_INLINE void nrf_twis_int_disable(NRF_TWIS_Type * const p_reg, uint32_t int_mask); - -/** - * @brief Function for retrieving and clearing the TWIS error source. - * - * @attention Error sources are cleared after read. - * @param[in] p_reg Pointer to the peripheral registers structure. - * @return Error source mask with values from @ref nrf_twis_error_t. - */ -__STATIC_INLINE uint32_t nrf_twis_error_source_get_and_clear(NRF_TWIS_Type * const p_reg); - -/** - * @brief Get information which of addresses matched - * - * Function returns index in the address table - * that points to the address that already matched. - * @param[in] p_reg Pointer to the peripheral registers structure. - * @return Index of matched address - */ -__STATIC_INLINE uint_fast8_t nrf_twis_match_get(NRF_TWIS_Type const * p_reg); - -/** - * @brief Function for enabling TWIS. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_twis_enable(NRF_TWIS_Type * const p_reg); - -/** - * @brief Function for disabling TWIS. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_twis_disable(NRF_TWIS_Type * const p_reg); - -/** - * @brief Function for configuring TWIS pins. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param scl SCL pin number. - * @param sda SDA pin number. - */ -__STATIC_INLINE void nrf_twis_pins_set(NRF_TWIS_Type * const p_reg, uint32_t scl, uint32_t sda); - -/** - * @brief Function for setting the receive buffer. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param p_buf Pointer to the buffer for received data. - * @param length Maximum number of data bytes to receive. - */ -__STATIC_INLINE void nrf_twis_rx_buffer_set( - NRF_TWIS_Type * const p_reg, - uint8_t * p_buf, - nrf_twis_amount_t length); - -/** - * @brief Function that prepares TWIS for receiving - * - * This function sets receive buffer and then sets NRF_TWIS_TASK_PREPARERX task. - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param p_buf Pointer to the buffer for received data. - * @param length Maximum number of data bytes to receive. - */ -__STATIC_INLINE void nrf_twis_rx_prepare( - NRF_TWIS_Type * const p_reg, - uint8_t * p_buf, - nrf_twis_amount_t length); - -/** - * @brief Function for getting number of bytes received in the last transaction. - * - * @param[in] p_reg TWIS instance. - * @return Amount of bytes received. - * */ -__STATIC_INLINE nrf_twis_amount_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * const p_reg); - -/** - * @brief Function for setting the transmit buffer. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param p_buf Pointer to the buffer with data to send. - * @param length Maximum number of data bytes to transmit. - */ -__STATIC_INLINE void nrf_twis_tx_buffer_set( - NRF_TWIS_Type * const p_reg, - uint8_t const * p_buf, - nrf_twis_amount_t length); - -/** - * @brief Function that prepares TWIS for transmitting - * - * This function sets transmit buffer and then sets NRF_TWIS_TASK_PREPARETX task. - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param p_buf Pointer to the buffer with data to send. - * @param length Maximum number of data bytes to transmit. - */ -__STATIC_INLINE void nrf_twis_tx_prepare( - NRF_TWIS_Type * const p_reg, - uint8_t const * p_buf, - nrf_twis_amount_t length); - -/** - * @brief Function for getting number of bytes transmitted in the last transaction. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @return Amount of bytes transmitted. - */ -__STATIC_INLINE nrf_twis_amount_t nrf_twis_tx_amount_get(NRF_TWIS_Type const * const p_reg); - -/** - * @brief Function for setting slave address - * - * Function sets the selected address for this TWI interface. - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param n Index of address to set - * @param addr Addres to set - * @sa nrf_twis_config_address_set - * @sa nrf_twis_config_address_get - */ -__STATIC_INLINE void nrf_twis_address_set( - NRF_TWIS_Type * const p_reg, - uint_fast8_t n, - nrf_twis_address_t addr); - -/** - * @brief Function for retrieving configured slave address - * - * Function gets the selected address for this TWI interface. - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param n Index of address to get - */ -__STATIC_INLINE nrf_twis_address_t nrf_twis_address_get( - NRF_TWIS_Type const * const p_reg, - uint_fast8_t n); - -/** - * @brief Function for setting the device address configuration. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param addr_mask Mask of address indexes of what device should answer to. - * - * @sa nrf_twis_address_set - */ -__STATIC_INLINE void nrf_twis_config_address_set( - NRF_TWIS_Type * const p_reg, - nrf_twis_config_addr_mask_t addr_mask); - -/** - * @brief Function for retrieving the device address configuration. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @return Mask of address indexes of what device should answer to. - */ -__STATIC_INLINE nrf_twis_config_addr_mask_t nrf_twis_config_address_get( - NRF_TWIS_Type const * const p_reg); - -/** - * @brief Function for setting the over-read character. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] orc Over-read character. Character clocked out in case of - * over-read of the TXD buffer. - */ -__STATIC_INLINE void nrf_twis_orc_set( - NRF_TWIS_Type * const p_reg, - uint8_t orc); - -/** - * @brief Function for setting the over-read character. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @return Over-read character configured for selected instance. - */ -__STATIC_INLINE uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * const p_reg); - - -/** @} */ /* End of nrf_twis_hal */ - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -/* ------------------------------------------------------------------------------------------------ - * Internal functions - */ - -/** - * @internal - * @brief Internal function for getting task/event register address - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @oaram offset Offset of the register from the instance beginning - * - * @attention offset has to be modulo 4 value. In other case we can get hardware fault. - * @return Pointer to the register - */ -__STATIC_INLINE volatile uint32_t* nrf_twis_getRegPtr(NRF_TWIS_Type * const p_reg, uint32_t offset) -{ - return (volatile uint32_t*)((uint8_t *)p_reg + (uint32_t)offset); -} - -/** - * @internal - * @brief Internal function for getting task/event register address - constant version - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @oaram offset Offset of the register from the instance beginning - * - * @attention offset has to be modulo 4 value. In other case we can get hardware fault. - * @return Pointer to the register - */ -__STATIC_INLINE volatile const uint32_t* nrf_twis_getRegPtr_c(NRF_TWIS_Type const * const p_reg, uint32_t offset) -{ - return (volatile const uint32_t*)((uint8_t *)p_reg + (uint32_t)offset); -} - - -/* ------------------------------------------------------------------------------------------------ - * Interface functions definitions - */ - - -void nrf_twis_task_trigger(NRF_TWIS_Type * const p_reg, nrf_twis_task_t task) -{ - *(nrf_twis_getRegPtr(p_reg, (uint32_t)task)) = 1UL; -} - -uint32_t nrf_twis_task_address_get( - NRF_TWIS_Type const * const p_reg, - nrf_twis_task_t task) -{ - return (uint32_t)nrf_twis_getRegPtr_c(p_reg, (uint32_t)task); -} - -void nrf_twis_event_clear( - NRF_TWIS_Type * const p_reg, - nrf_twis_event_t event) -{ - *(nrf_twis_getRegPtr(p_reg, (uint32_t)event)) = 0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)); - (void)dummy; -#endif -} - -bool nrf_twis_event_check( - NRF_TWIS_Type const * const p_reg, - nrf_twis_event_t event) -{ - return (bool)*nrf_twis_getRegPtr_c(p_reg, (uint32_t)event); -} - -bool nrf_twis_event_get_and_clear( - NRF_TWIS_Type * const p_reg, - nrf_twis_event_t event) -{ - bool ret = nrf_twis_event_check(p_reg, event); - if (ret) - { - nrf_twis_event_clear(p_reg, event); - } - return ret; -} - -uint32_t nrf_twis_event_address_get( - NRF_TWIS_Type const * const p_reg, - nrf_twis_event_t event) -{ - return (uint32_t)nrf_twis_getRegPtr_c(p_reg, (uint32_t)event); -} - -void nrf_twis_shorts_enable(NRF_TWIS_Type * const p_reg, uint32_t short_mask) -{ - p_reg->SHORTS |= short_mask; -} - -void nrf_twis_shorts_disable(NRF_TWIS_Type * const p_reg, uint32_t short_mask) -{ - if (~0U == short_mask) - { - /* Optimized version for "disable all" */ - p_reg->SHORTS = 0; - } - else - { - p_reg->SHORTS &= ~short_mask; - } -} - -uint32_t nrf_twis_shorts_get(NRF_TWIS_Type * const p_reg) -{ - return p_reg->SHORTS; -} - -void nrf_twis_int_enable(NRF_TWIS_Type * const p_reg, uint32_t int_mask) -{ - p_reg->INTENSET = int_mask; -} - -bool nrf_twis_int_enable_check(NRF_TWIS_Type const * const p_reg, uint32_t int_mask) -{ - return (bool)(p_reg->INTENSET & int_mask); -} - -void nrf_twis_int_disable(NRF_TWIS_Type * const p_reg, uint32_t int_mask) -{ - p_reg->INTENCLR = int_mask; -} - -uint32_t nrf_twis_error_source_get_and_clear(NRF_TWIS_Type * const p_reg) -{ - uint32_t ret = p_reg->ERRORSRC; - p_reg->ERRORSRC = ret; - return ret; -} - -uint_fast8_t nrf_twis_match_get(NRF_TWIS_Type const * p_reg) -{ - return (uint_fast8_t)p_reg->MATCH; -} - -void nrf_twis_enable(NRF_TWIS_Type * const p_reg) -{ - p_reg->ENABLE = (TWIS_ENABLE_ENABLE_Enabled << TWIS_ENABLE_ENABLE_Pos); -} - -void nrf_twis_disable(NRF_TWIS_Type * const p_reg) -{ - p_reg->ENABLE = (TWIS_ENABLE_ENABLE_Disabled << TWIS_ENABLE_ENABLE_Pos); -} - -void nrf_twis_pins_set(NRF_TWIS_Type * const p_reg, uint32_t scl, uint32_t sda) -{ - p_reg->PSEL.SCL = scl; - p_reg->PSEL.SDA = sda; -} - -void nrf_twis_rx_buffer_set( - NRF_TWIS_Type * const p_reg, - uint8_t * p_buf, - nrf_twis_amount_t length) -{ - p_reg->RXD.PTR = (uint32_t)p_buf; - p_reg->RXD.MAXCNT = length; -} - -__STATIC_INLINE void nrf_twis_rx_prepare( - NRF_TWIS_Type * const p_reg, - uint8_t * p_buf, - nrf_twis_amount_t length) -{ - nrf_twis_rx_buffer_set(p_reg, p_buf, length); - nrf_twis_task_trigger(p_reg, NRF_TWIS_TASK_PREPARERX); -} - -nrf_twis_amount_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * const p_reg) -{ - return (nrf_twis_amount_t)p_reg->RXD.AMOUNT; -} - -void nrf_twis_tx_buffer_set( - NRF_TWIS_Type * const p_reg, - uint8_t const * p_buf, - nrf_twis_amount_t length) -{ - p_reg->TXD.PTR = (uint32_t)p_buf; - p_reg->TXD.MAXCNT = length; -} - -__STATIC_INLINE void nrf_twis_tx_prepare( - NRF_TWIS_Type * const p_reg, - uint8_t const * p_buf, - nrf_twis_amount_t length) -{ - nrf_twis_tx_buffer_set(p_reg, p_buf, length); - nrf_twis_task_trigger(p_reg, NRF_TWIS_TASK_PREPARETX); -} - -nrf_twis_amount_t nrf_twis_tx_amount_get(NRF_TWIS_Type const * const p_reg) -{ - return (nrf_twis_amount_t)p_reg->TXD.AMOUNT; -} - -void nrf_twis_address_set( - NRF_TWIS_Type * const p_reg, - uint_fast8_t n, - nrf_twis_address_t addr) -{ - p_reg->ADDRESS[n] = addr; -} - -nrf_twis_address_t nrf_twis_address_get( - NRF_TWIS_Type const * const p_reg, - uint_fast8_t n) -{ - return (nrf_twis_address_t)p_reg->ADDRESS[n]; -} -void nrf_twis_config_address_set( - NRF_TWIS_Type * const p_reg, - nrf_twis_config_addr_mask_t addr_mask) -{ - /* This is the only configuration in TWIS - just write it without masking */ - p_reg->CONFIG = addr_mask; -} - -nrf_twis_config_addr_mask_t nrf_twis_config_address_get(NRF_TWIS_Type const * const p_reg) -{ - return (nrf_twis_config_addr_mask_t)(p_reg->CONFIG & TWIS_ADDRESS_ADDRESS_Msk); -} - -void nrf_twis_orc_set( - NRF_TWIS_Type * const p_reg, - uint8_t orc) -{ - p_reg->ORC = orc; -} - -uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * const p_reg) -{ - return (uint8_t)p_reg->ORC; -} - -#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_TWIS_H__ */ - diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_uart.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_uart.h deleted file mode 100644 index 5bb1dcd17c5..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_uart.h +++ /dev/null @@ -1,549 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_UART_H__ -#define NRF_UART_H__ - -#include "nrf.h" -#include "nrf_peripherals.h" -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -//Temporary defining legacy UART for instance 1 -#define NRF_UART1 (NRF_UART_Type *)NRF_UARTE1 - -/** - * @defgroup nrf_uart_hal UART HAL - * @{ - * @ingroup nrf_uart - * - * @brief Hardware access layer for accessing the UART peripheral. - */ - -#define NRF_UART_PSEL_DISCONNECTED 0xFFFFFFFF - -/** - * @enum nrf_uart_task_t - * @brief UART tasks. - */ -typedef enum -{ - /*lint -save -e30 -esym(628,__INTADDR__)*/ - NRF_UART_TASK_STARTRX = offsetof(NRF_UART_Type, TASKS_STARTRX), /**< Task for starting reception. */ - NRF_UART_TASK_STOPRX = offsetof(NRF_UART_Type, TASKS_STOPRX), /**< Task for stopping reception. */ - NRF_UART_TASK_STARTTX = offsetof(NRF_UART_Type, TASKS_STARTTX), /**< Task for starting transmission. */ - NRF_UART_TASK_STOPTX = offsetof(NRF_UART_Type, TASKS_STOPTX), /**< Task for stopping transmission. */ - NRF_UART_TASK_SUSPEND = offsetof(NRF_UART_Type, TASKS_SUSPEND), /**< Task for suspending UART. */ - /*lint -restore*/ -} nrf_uart_task_t; - -/** - * @enum nrf_uart_event_t - * @brief UART events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_UART_EVENT_CTS = offsetof(NRF_UART_Type, EVENTS_CTS), /**< Event from CTS line activation. */ - NRF_UART_EVENT_NCTS = offsetof(NRF_UART_Type, EVENTS_NCTS), /**< Event from CTS line deactivation. */ - NRF_UART_EVENT_RXDRDY = offsetof(NRF_UART_Type, EVENTS_RXDRDY),/**< Event from data ready in RXD. */ - NRF_UART_EVENT_TXDRDY = offsetof(NRF_UART_Type, EVENTS_TXDRDY),/**< Event from data sent from TXD. */ - NRF_UART_EVENT_ERROR = offsetof(NRF_UART_Type, EVENTS_ERROR), /**< Event from error detection. */ - NRF_UART_EVENT_RXTO = offsetof(NRF_UART_Type, EVENTS_RXTO) /**< Event from receiver timeout. */ - /*lint -restore*/ -} nrf_uart_event_t; - -/** - * @enum nrf_uart_int_mask_t - * @brief UART interrupts. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_UART_INT_MASK_CTS = UART_INTENCLR_CTS_Msk, /**< CTS line activation interrupt. */ - NRF_UART_INT_MASK_NCTS = UART_INTENCLR_NCTS_Msk, /**< CTS line deactivation interrupt. */ - NRF_UART_INT_MASK_RXDRDY = UART_INTENCLR_RXDRDY_Msk, /**< Data ready in RXD interrupt. */ - NRF_UART_INT_MASK_TXDRDY = UART_INTENCLR_TXDRDY_Msk, /**< Data sent from TXD interrupt. */ - NRF_UART_INT_MASK_ERROR = UART_INTENCLR_ERROR_Msk, /**< Error detection interrupt. */ - NRF_UART_INT_MASK_RXTO = UART_INTENCLR_RXTO_Msk /**< Receiver timeout interrupt. */ - /*lint -restore*/ -} nrf_uart_int_mask_t; - -/** - * @enum nrf_uart_baudrate_t - * @brief Baudrates supported by UART. - */ -typedef enum -{ -#ifdef UARTE_PRESENT - NRF_UART_BAUDRATE_1200 = UARTE_BAUDRATE_BAUDRATE_Baud1200, /**< 1200 baud. */ - NRF_UART_BAUDRATE_2400 = UARTE_BAUDRATE_BAUDRATE_Baud2400, /**< 2400 baud. */ - NRF_UART_BAUDRATE_4800 = UARTE_BAUDRATE_BAUDRATE_Baud4800, /**< 4800 baud. */ - NRF_UART_BAUDRATE_9600 = UARTE_BAUDRATE_BAUDRATE_Baud9600, /**< 9600 baud. */ - NRF_UART_BAUDRATE_14400 = UARTE_BAUDRATE_BAUDRATE_Baud14400, /**< 14400 baud. */ - NRF_UART_BAUDRATE_19200 = UARTE_BAUDRATE_BAUDRATE_Baud19200, /**< 19200 baud. */ - NRF_UART_BAUDRATE_28800 = UARTE_BAUDRATE_BAUDRATE_Baud28800, /**< 28800 baud. */ - NRF_UART_BAUDRATE_38400 = UARTE_BAUDRATE_BAUDRATE_Baud38400, /**< 38400 baud. */ - NRF_UART_BAUDRATE_57600 = UARTE_BAUDRATE_BAUDRATE_Baud57600, /**< 57600 baud. */ - NRF_UART_BAUDRATE_76800 = UARTE_BAUDRATE_BAUDRATE_Baud76800, /**< 76800 baud. */ - NRF_UART_BAUDRATE_115200 = UARTE_BAUDRATE_BAUDRATE_Baud115200, /**< 115200 baud. */ - NRF_UART_BAUDRATE_230400 = UARTE_BAUDRATE_BAUDRATE_Baud230400, /**< 230400 baud. */ - NRF_UART_BAUDRATE_250000 = UARTE_BAUDRATE_BAUDRATE_Baud250000, /**< 250000 baud. */ - NRF_UART_BAUDRATE_460800 = UARTE_BAUDRATE_BAUDRATE_Baud460800, /**< 460800 baud. */ - NRF_UART_BAUDRATE_921600 = UARTE_BAUDRATE_BAUDRATE_Baud921600, /**< 921600 baud. */ - NRF_UART_BAUDRATE_1000000 = UARTE_BAUDRATE_BAUDRATE_Baud1M, /**< 1000000 baud. */ -#else - NRF_UART_BAUDRATE_1200 = UART_BAUDRATE_BAUDRATE_Baud1200, /**< 1200 baud. */ - NRF_UART_BAUDRATE_2400 = UART_BAUDRATE_BAUDRATE_Baud2400, /**< 2400 baud. */ - NRF_UART_BAUDRATE_4800 = UART_BAUDRATE_BAUDRATE_Baud4800, /**< 4800 baud. */ - NRF_UART_BAUDRATE_9600 = UART_BAUDRATE_BAUDRATE_Baud9600, /**< 9600 baud. */ - NRF_UART_BAUDRATE_14400 = UART_BAUDRATE_BAUDRATE_Baud14400, /**< 14400 baud. */ - NRF_UART_BAUDRATE_19200 = UART_BAUDRATE_BAUDRATE_Baud19200, /**< 19200 baud. */ - NRF_UART_BAUDRATE_28800 = UART_BAUDRATE_BAUDRATE_Baud28800, /**< 28800 baud. */ - NRF_UART_BAUDRATE_38400 = UART_BAUDRATE_BAUDRATE_Baud38400, /**< 38400 baud. */ - NRF_UART_BAUDRATE_57600 = UART_BAUDRATE_BAUDRATE_Baud57600, /**< 57600 baud. */ - NRF_UART_BAUDRATE_76800 = UART_BAUDRATE_BAUDRATE_Baud76800, /**< 76800 baud. */ - NRF_UART_BAUDRATE_115200 = UART_BAUDRATE_BAUDRATE_Baud115200, /**< 115200 baud. */ - NRF_UART_BAUDRATE_230400 = UART_BAUDRATE_BAUDRATE_Baud230400, /**< 230400 baud. */ - NRF_UART_BAUDRATE_250000 = UART_BAUDRATE_BAUDRATE_Baud250000, /**< 250000 baud. */ - NRF_UART_BAUDRATE_460800 = UART_BAUDRATE_BAUDRATE_Baud460800, /**< 460800 baud. */ - NRF_UART_BAUDRATE_921600 = UART_BAUDRATE_BAUDRATE_Baud921600, /**< 921600 baud. */ - NRF_UART_BAUDRATE_1000000 = UART_BAUDRATE_BAUDRATE_Baud1M, /**< 1000000 baud. */ -#endif -} nrf_uart_baudrate_t; - -/** - * @enum nrf_uart_error_mask_t - * @brief Types of UART error masks. - */ -typedef enum -{ - NRF_UART_ERROR_OVERRUN_MASK = UART_ERRORSRC_OVERRUN_Msk, /**< Overrun error. */ - NRF_UART_ERROR_PARITY_MASK = UART_ERRORSRC_PARITY_Msk, /**< Parity error. */ - NRF_UART_ERROR_FRAMING_MASK = UART_ERRORSRC_FRAMING_Msk, /**< Framing error. */ - NRF_UART_ERROR_BREAK_MASK = UART_ERRORSRC_BREAK_Msk, /**< Break error. */ -} nrf_uart_error_mask_t; - -/** - * @enum nrf_uart_parity_t - * @brief Types of UART parity modes. - */ -typedef enum -{ - NRF_UART_PARITY_EXCLUDED = UART_CONFIG_PARITY_Excluded << UART_CONFIG_PARITY_Pos, /**< Parity excluded. */ - NRF_UART_PARITY_INCLUDED = UART_CONFIG_PARITY_Included << UART_CONFIG_PARITY_Pos, /**< Parity included. */ -} nrf_uart_parity_t; - -/** - * @enum nrf_uart_hwfc_t - * @brief Types of UART flow control modes. - */ -typedef enum -{ - NRF_UART_HWFC_DISABLED = UART_CONFIG_HWFC_Disabled, /**< HW flow control disabled. */ - NRF_UART_HWFC_ENABLED = UART_CONFIG_HWFC_Enabled, /**< HW flow control enabled. */ -} nrf_uart_hwfc_t; - -/** - * @brief Function for clearing a specific UART event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to clear. - */ -__STATIC_INLINE void nrf_uart_event_clear(NRF_UART_Type * p_reg, nrf_uart_event_t event); - -/** - * @brief Function for checking the state of a specific UART event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to check. - * - * @retval True if event is set, False otherwise. - */ -__STATIC_INLINE bool nrf_uart_event_check(NRF_UART_Type * p_reg, nrf_uart_event_t event); - -/** - * @brief Function for returning the address of a specific UART event register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Desired event. - * - * @retval Address of specified event register. - */ -__STATIC_INLINE uint32_t nrf_uart_event_address_get(NRF_UART_Type * p_reg, - nrf_uart_event_t event); - -/** - * @brief Function for enabling a specific interrupt. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param int_mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_uart_int_enable(NRF_UART_Type * p_reg, uint32_t int_mask); - -/** - * @brief Function for retrieving the state of a given interrupt. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param int_mask Mask of interrupt to check. - * - * @retval true If the interrupt is enabled. - * @retval false If the interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_uart_int_enable_check(NRF_UART_Type * p_reg, uint32_t int_mask); - -/** - * @brief Function for disabling specific interrupts. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param int_mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_uart_int_disable(NRF_UART_Type * p_reg, uint32_t int_mask); - -/** - * @brief Function for getting error source mask. Function is clearing error source flags after reading. - * - * @param p_reg Pointer to the peripheral registers structure. - * @return Mask with error source flags. - */ -__STATIC_INLINE uint32_t nrf_uart_errorsrc_get_and_clear(NRF_UART_Type * p_reg); - -/** - * @brief Function for enabling UART. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_uart_enable(NRF_UART_Type * p_reg); - -/** - * @brief Function for disabling UART. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_uart_disable(NRF_UART_Type * p_reg); - -/** - * @brief Function for configuring TX/RX pins. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param pseltxd TXD pin number. - * @param pselrxd RXD pin number. - */ -__STATIC_INLINE void nrf_uart_txrx_pins_set(NRF_UART_Type * p_reg, uint32_t pseltxd, uint32_t pselrxd); - -/** - * @brief Function for disconnecting TX/RX pins. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_uart_txrx_pins_disconnect(NRF_UART_Type * p_reg); - -/** - * @brief Function for getting TX pin. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE uint32_t nrf_uart_tx_pin_get(NRF_UART_Type * p_reg); - -/** - * @brief Function for getting RX pin. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE uint32_t nrf_uart_rx_pin_get(NRF_UART_Type * p_reg); - -/** - * @brief Function for getting RTS pin. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE uint32_t nrf_uart_rts_pin_get(NRF_UART_Type * p_reg); - -/** - * @brief Function for getting CTS pin. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE uint32_t nrf_uart_cts_pin_get(NRF_UART_Type * p_reg); - - -/** - * @brief Function for configuring flow control pins. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param pselrts RTS pin number. - * @param pselcts CTS pin number. - */ -__STATIC_INLINE void nrf_uart_hwfc_pins_set(NRF_UART_Type * p_reg, - uint32_t pselrts, - uint32_t pselcts); - -/** - * @brief Function for disconnecting flow control pins. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_uart_hwfc_pins_disconnect(NRF_UART_Type * p_reg); - -/** - * @brief Function for reading RX data. - * - * @param p_reg Pointer to the peripheral registers structure. - * @return Received byte. - */ -__STATIC_INLINE uint8_t nrf_uart_rxd_get(NRF_UART_Type * p_reg); - -/** - * @brief Function for setting Tx data. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param txd Byte. - */ -__STATIC_INLINE void nrf_uart_txd_set(NRF_UART_Type * p_reg, uint8_t txd); - -/** - * @brief Function for starting an UART task. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param task Task. - */ -__STATIC_INLINE void nrf_uart_task_trigger(NRF_UART_Type * p_reg, nrf_uart_task_t task); - -/** - * @brief Function for returning the address of a specific task register. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param task Task. - * - * @return Task address. - */ -__STATIC_INLINE uint32_t nrf_uart_task_address_get(NRF_UART_Type * p_reg, nrf_uart_task_t task); - -/** - * @brief Function for configuring UART. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param hwfc Hardware flow control. Enabled if true. - * @param parity Parity. Included if true. - */ -__STATIC_INLINE void nrf_uart_configure(NRF_UART_Type * p_reg, - nrf_uart_parity_t parity, - nrf_uart_hwfc_t hwfc); - -/** - * @brief Function for setting UART baudrate. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param baudrate Baudrate. - */ -__STATIC_INLINE void nrf_uart_baudrate_set(NRF_UART_Type * p_reg, nrf_uart_baudrate_t baudrate); - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION -__STATIC_INLINE void nrf_uart_event_clear(NRF_UART_Type * p_reg, nrf_uart_event_t event) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)); - (void)dummy; -#endif - -} - -__STATIC_INLINE bool nrf_uart_event_check(NRF_UART_Type * p_reg, nrf_uart_event_t event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event); -} - -__STATIC_INLINE uint32_t nrf_uart_event_address_get(NRF_UART_Type * p_reg, - nrf_uart_event_t event) -{ - return (uint32_t)((uint8_t *)p_reg + (uint32_t)event); -} - -__STATIC_INLINE void nrf_uart_int_enable(NRF_UART_Type * p_reg, uint32_t int_mask) -{ - p_reg->INTENSET = int_mask; -} - -__STATIC_INLINE bool nrf_uart_int_enable_check(NRF_UART_Type * p_reg, uint32_t int_mask) -{ - return (bool)(p_reg->INTENSET & int_mask); -} - -__STATIC_INLINE void nrf_uart_int_disable(NRF_UART_Type * p_reg, uint32_t int_mask) -{ - p_reg->INTENCLR = int_mask; -} - -__STATIC_INLINE uint32_t nrf_uart_errorsrc_get_and_clear(NRF_UART_Type * p_reg) -{ - uint32_t errsrc_mask = p_reg->ERRORSRC; - p_reg->ERRORSRC = errsrc_mask; - return errsrc_mask; -} - -__STATIC_INLINE void nrf_uart_enable(NRF_UART_Type * p_reg) -{ - p_reg->ENABLE = UART_ENABLE_ENABLE_Enabled; -} - -__STATIC_INLINE void nrf_uart_disable(NRF_UART_Type * p_reg) -{ - p_reg->ENABLE = UART_ENABLE_ENABLE_Disabled; -} - -__STATIC_INLINE void nrf_uart_txrx_pins_set(NRF_UART_Type * p_reg, uint32_t pseltxd, uint32_t pselrxd) -{ -#if defined(UART_PSEL_RXD_CONNECT_Pos) - p_reg->PSEL.RXD = pselrxd; -#else - p_reg->PSELRXD = pselrxd; -#endif -#if defined(UART_PSEL_TXD_CONNECT_Pos) - p_reg->PSEL.TXD = pseltxd; -#else - p_reg->PSELTXD = pseltxd; -#endif -} - -__STATIC_INLINE void nrf_uart_txrx_pins_disconnect(NRF_UART_Type * p_reg) -{ - nrf_uart_txrx_pins_set(p_reg, NRF_UART_PSEL_DISCONNECTED, NRF_UART_PSEL_DISCONNECTED); -} - -__STATIC_INLINE uint32_t nrf_uart_tx_pin_get(NRF_UART_Type * p_reg) -{ -#if defined(UART_PSEL_TXD_CONNECT_Pos) - return p_reg->PSEL.TXD; -#else - return p_reg->PSELTXD; -#endif -} - -__STATIC_INLINE uint32_t nrf_uart_rx_pin_get(NRF_UART_Type * p_reg) -{ -#if defined(UART_PSEL_RXD_CONNECT_Pos) - return p_reg->PSEL.RXD; -#else - return p_reg->PSELRXD; -#endif -} - -__STATIC_INLINE uint32_t nrf_uart_rts_pin_get(NRF_UART_Type * p_reg) -{ -#if defined(UART_PSEL_RTS_CONNECT_Pos) - return p_reg->PSEL.RTS; -#else - return p_reg->PSELRTS; -#endif -} - -__STATIC_INLINE uint32_t nrf_uart_cts_pin_get(NRF_UART_Type * p_reg) -{ -#if defined(UART_PSEL_RTS_CONNECT_Pos) - return p_reg->PSEL.CTS; -#else - return p_reg->PSELCTS; -#endif -} - -__STATIC_INLINE void nrf_uart_hwfc_pins_set(NRF_UART_Type * p_reg, uint32_t pselrts, uint32_t pselcts) -{ -#if defined(UART_PSEL_RTS_CONNECT_Pos) - p_reg->PSEL.RTS = pselrts; -#else - p_reg->PSELRTS = pselrts; -#endif - -#if defined(UART_PSEL_RTS_CONNECT_Pos) - p_reg->PSEL.CTS = pselcts; -#else - p_reg->PSELCTS = pselcts; -#endif -} - -__STATIC_INLINE void nrf_uart_hwfc_pins_disconnect(NRF_UART_Type * p_reg) -{ - nrf_uart_hwfc_pins_set(p_reg, NRF_UART_PSEL_DISCONNECTED, NRF_UART_PSEL_DISCONNECTED); -} - -__STATIC_INLINE uint8_t nrf_uart_rxd_get(NRF_UART_Type * p_reg) -{ - return p_reg->RXD; -} - -__STATIC_INLINE void nrf_uart_txd_set(NRF_UART_Type * p_reg, uint8_t txd) -{ - p_reg->TXD = txd; -} - -__STATIC_INLINE void nrf_uart_task_trigger(NRF_UART_Type * p_reg, nrf_uart_task_t task) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL; -} - -__STATIC_INLINE uint32_t nrf_uart_task_address_get(NRF_UART_Type * p_reg, nrf_uart_task_t task) -{ - return (uint32_t)p_reg + (uint32_t)task; -} - -__STATIC_INLINE void nrf_uart_configure(NRF_UART_Type * p_reg, - nrf_uart_parity_t parity, - nrf_uart_hwfc_t hwfc) -{ - p_reg->CONFIG = (uint32_t)parity | (uint32_t)hwfc; -} - -__STATIC_INLINE void nrf_uart_baudrate_set(NRF_UART_Type * p_reg, nrf_uart_baudrate_t baudrate) -{ - p_reg->BAUDRATE = baudrate; -} -#endif //SUPPRESS_INLINE_IMPLEMENTATION -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif //NRF_UART_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_uarte.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_uarte.h deleted file mode 100644 index 2576a7770c4..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_uarte.h +++ /dev/null @@ -1,642 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_UARTE_H__ -#define NRF_UARTE_H__ - -#include "nrf.h" -#include "nrf_peripherals.h" -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#define NRF_UARTE_PSEL_DISCONNECTED 0xFFFFFFFF - -/** - * @defgroup nrf_uarte_hal UARTE HAL - * @{ - * @ingroup nrf_uart - * - * @brief Hardware access layer for accessing the UARTE peripheral. - */ - -/** - * @enum nrf_uarte_task_t - * @brief UARTE tasks. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_UARTE_TASK_STARTRX = offsetof(NRF_UARTE_Type, TASKS_STARTRX),///< Start UART receiver. - NRF_UARTE_TASK_STOPRX = offsetof(NRF_UARTE_Type, TASKS_STOPRX), ///< Stop UART receiver. - NRF_UARTE_TASK_STARTTX = offsetof(NRF_UARTE_Type, TASKS_STARTTX),///< Start UART transmitter. - NRF_UARTE_TASK_STOPTX = offsetof(NRF_UARTE_Type, TASKS_STOPTX), ///< Stop UART transmitter. - NRF_UARTE_TASK_FLUSHRX = offsetof(NRF_UARTE_Type, TASKS_FLUSHRX) ///< Flush RX FIFO in RX buffer. - /*lint -restore*/ -} nrf_uarte_task_t; - -/** - * @enum nrf_uarte_event_t - * @brief UARTE events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_UARTE_EVENT_CTS = offsetof(NRF_UARTE_Type, EVENTS_CTS), ///< CTS is activated. - NRF_UARTE_EVENT_NCTS = offsetof(NRF_UARTE_Type, EVENTS_NCTS), ///< CTS is deactivated. - NRF_UARTE_EVENT_ENDRX = offsetof(NRF_UARTE_Type, EVENTS_ENDRX), ///< Receive buffer is filled up. - NRF_UARTE_EVENT_ENDTX = offsetof(NRF_UARTE_Type, EVENTS_ENDTX), ///< Last TX byte transmitted. - NRF_UARTE_EVENT_ERROR = offsetof(NRF_UARTE_Type, EVENTS_ERROR), ///< Error detected. - NRF_UARTE_EVENT_RXTO = offsetof(NRF_UARTE_Type, EVENTS_RXTO), ///< Receiver timeout. - NRF_UARTE_EVENT_RXSTARTED = offsetof(NRF_UARTE_Type, EVENTS_RXSTARTED),///< Receiver has started. - NRF_UARTE_EVENT_TXSTARTED = offsetof(NRF_UARTE_Type, EVENTS_TXSTARTED),///< Transmitter has started. - NRF_UARTE_EVENT_TXSTOPPED = offsetof(NRF_UARTE_Type, EVENTS_TXSTOPPED) ///< Transmitted stopped. - /*lint -restore*/ -} nrf_uarte_event_t; - -/** - * @brief Types of UARTE shortcuts. - */ -typedef enum -{ - NRF_UARTE_SHORT_ENDRX_STARTRX = UARTE_SHORTS_ENDRX_STARTRX_Msk,///< Shortcut between ENDRX event and STARTRX task. - NRF_UARTE_SHORT_ENDRX_STOPRX = UARTE_SHORTS_ENDRX_STOPRX_Msk, ///< Shortcut between ENDRX event and STOPRX task. -} nrf_uarte_short_t; - - -/** - * @enum nrf_uarte_int_mask_t - * @brief UARTE interrupts. - */ -typedef enum -{ - NRF_UARTE_INT_CTS_MASK = UARTE_INTENSET_CTS_Msk, ///< Interrupt on CTS event. - NRF_UARTE_INT_NCTSRX_MASK = UARTE_INTENSET_NCTS_Msk, ///< Interrupt on NCTS event. - NRF_UARTE_INT_ENDRX_MASK = UARTE_INTENSET_ENDRX_Msk, ///< Interrupt on ENDRX event. - NRF_UARTE_INT_ENDTX_MASK = UARTE_INTENSET_ENDTX_Msk, ///< Interrupt on ENDTX event. - NRF_UARTE_INT_ERROR_MASK = UARTE_INTENSET_ERROR_Msk, ///< Interrupt on ERROR event. - NRF_UARTE_INT_RXTO_MASK = UARTE_INTENSET_RXTO_Msk, ///< Interrupt on RXTO event. - NRF_UARTE_INT_RXSTARTED_MASK = UARTE_INTENSET_RXSTARTED_Msk,///< Interrupt on RXSTARTED event. - NRF_UARTE_INT_TXSTARTED_MASK = UARTE_INTENSET_TXSTARTED_Msk,///< Interrupt on TXSTARTED event. - NRF_UARTE_INT_TXSTOPPED_MASK = UARTE_INTENSET_TXSTOPPED_Msk ///< Interrupt on TXSTOPPED event. -} nrf_uarte_int_mask_t; - -/** - * @enum nrf_uarte_baudrate_t - * @brief Baudrates supported by UARTE. - */ -typedef enum -{ - NRF_UARTE_BAUDRATE_1200 = UARTE_BAUDRATE_BAUDRATE_Baud1200, ///< 1200 baud. - NRF_UARTE_BAUDRATE_2400 = UARTE_BAUDRATE_BAUDRATE_Baud2400, ///< 2400 baud. - NRF_UARTE_BAUDRATE_4800 = UARTE_BAUDRATE_BAUDRATE_Baud4800, ///< 4800 baud. - NRF_UARTE_BAUDRATE_9600 = UARTE_BAUDRATE_BAUDRATE_Baud9600, ///< 9600 baud. - NRF_UARTE_BAUDRATE_14400 = UARTE_BAUDRATE_BAUDRATE_Baud14400, ///< 14400 baud. - NRF_UARTE_BAUDRATE_19200 = UARTE_BAUDRATE_BAUDRATE_Baud19200, ///< 19200 baud. - NRF_UARTE_BAUDRATE_28800 = UARTE_BAUDRATE_BAUDRATE_Baud28800, ///< 28800 baud. - NRF_UARTE_BAUDRATE_38400 = UARTE_BAUDRATE_BAUDRATE_Baud38400, ///< 38400 baud. - NRF_UARTE_BAUDRATE_57600 = UARTE_BAUDRATE_BAUDRATE_Baud57600, ///< 57600 baud. - NRF_UARTE_BAUDRATE_76800 = UARTE_BAUDRATE_BAUDRATE_Baud76800, ///< 76800 baud. - NRF_UARTE_BAUDRATE_115200 = UARTE_BAUDRATE_BAUDRATE_Baud115200, ///< 115200 baud. - NRF_UARTE_BAUDRATE_230400 = UARTE_BAUDRATE_BAUDRATE_Baud230400, ///< 230400 baud. - NRF_UARTE_BAUDRATE_250000 = UARTE_BAUDRATE_BAUDRATE_Baud250000, ///< 250000 baud. - NRF_UARTE_BAUDRATE_460800 = UARTE_BAUDRATE_BAUDRATE_Baud460800, ///< 460800 baud. - NRF_UARTE_BAUDRATE_921600 = UARTE_BAUDRATE_BAUDRATE_Baud921600, ///< 921600 baud. - NRF_UARTE_BAUDRATE_1000000 = UARTE_BAUDRATE_BAUDRATE_Baud1M, ///< 1000000 baud. -#ifndef UART_PRESENT - NRF_UART_BAUDRATE_1200 = NRF_UARTE_BAUDRATE_1200, - NRF_UART_BAUDRATE_2400 = NRF_UARTE_BAUDRATE_2400, - NRF_UART_BAUDRATE_4800 = NRF_UARTE_BAUDRATE_4800, - NRF_UART_BAUDRATE_9600 = NRF_UARTE_BAUDRATE_9600, - NRF_UART_BAUDRATE_14400 = NRF_UARTE_BAUDRATE_14400, - NRF_UART_BAUDRATE_19200 = NRF_UARTE_BAUDRATE_19200, - NRF_UART_BAUDRATE_28800 = NRF_UARTE_BAUDRATE_28800, - NRF_UART_BAUDRATE_38400 = NRF_UARTE_BAUDRATE_38400, - NRF_UART_BAUDRATE_57600 = NRF_UARTE_BAUDRATE_57600, - NRF_UART_BAUDRATE_76800 = NRF_UARTE_BAUDRATE_76800, - NRF_UART_BAUDRATE_115200 = NRF_UARTE_BAUDRATE_115200, - NRF_UART_BAUDRATE_230400 = NRF_UARTE_BAUDRATE_230400, - NRF_UART_BAUDRATE_250000 = NRF_UARTE_BAUDRATE_250000, - NRF_UART_BAUDRATE_460800 = NRF_UARTE_BAUDRATE_460800, - NRF_UART_BAUDRATE_921600 = NRF_UARTE_BAUDRATE_921600, - NRF_UART_BAUDRATE_1000000 = NRF_UARTE_BAUDRATE_1000000, -#endif -} nrf_uarte_baudrate_t; - -/** - * @enum nrf_uarte_error_mask_t - * @brief Types of UARTE error masks. - */ -typedef enum -{ - NRF_UARTE_ERROR_OVERRUN_MASK = UARTE_ERRORSRC_OVERRUN_Msk, ///< Overrun error. - NRF_UARTE_ERROR_PARITY_MASK = UARTE_ERRORSRC_PARITY_Msk, ///< Parity error. - NRF_UARTE_ERROR_FRAMING_MASK = UARTE_ERRORSRC_FRAMING_Msk, ///< Framing error. - NRF_UARTE_ERROR_BREAK_MASK = UARTE_ERRORSRC_BREAK_Msk, ///< Break error. -#ifndef UART_PRESENT - NRF_UART_ERROR_OVERRUN_MASK = NRF_UARTE_ERROR_OVERRUN_MASK, - NRF_UART_ERROR_PARITY_MASK = NRF_UARTE_ERROR_PARITY_MASK, - NRF_UART_ERROR_FRAMING_MASK = NRF_UARTE_ERROR_FRAMING_MASK, - NRF_UART_ERROR_BREAK_MASK = NRF_UARTE_ERROR_BREAK_MASK, -#endif -} nrf_uarte_error_mask_t; - -/** - * @enum nrf_uarte_parity_t - * @brief Types of UARTE parity modes. - */ -typedef enum -{ - NRF_UARTE_PARITY_EXCLUDED = UARTE_CONFIG_PARITY_Excluded << UARTE_CONFIG_PARITY_Pos, ///< Parity excluded. - NRF_UARTE_PARITY_INCLUDED = UARTE_CONFIG_PARITY_Included << UARTE_CONFIG_PARITY_Pos, ///< Parity included. -#ifndef UART_PRESENT - NRF_UART_PARITY_EXCLUDED = NRF_UARTE_PARITY_EXCLUDED, - NRF_UART_PARITY_INCLUDED = NRF_UARTE_PARITY_INCLUDED, -#endif -} nrf_uarte_parity_t; - -/** - * @enum nrf_uarte_hwfc_t - * @brief Types of UARTE flow control modes. - */ -typedef enum -{ - NRF_UARTE_HWFC_DISABLED = UARTE_CONFIG_HWFC_Disabled << UARTE_CONFIG_HWFC_Pos, ///< HW flow control disabled. - NRF_UARTE_HWFC_ENABLED = UARTE_CONFIG_HWFC_Enabled << UARTE_CONFIG_HWFC_Pos, ///< HW flow control enabled. -#ifndef UART_PRESENT - NRF_UART_HWFC_DISABLED = NRF_UARTE_HWFC_DISABLED, - NRF_UART_HWFC_ENABLED = NRF_UARTE_HWFC_ENABLED, -#endif -} nrf_uarte_hwfc_t; - - -/** - * @brief Function for clearing a specific UARTE event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to clear. - */ -__STATIC_INLINE void nrf_uarte_event_clear(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event); - -/** - * @brief Function for checking the state of a specific UARTE event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to check. - * - * @retval True if event is set, False otherwise. - */ -__STATIC_INLINE bool nrf_uarte_event_check(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event); - -/** - * @brief Function for checking the state of a specific extra UARTE event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Event to check. - * - * @retval True if event is set, False otherwise. - */ -__STATIC_INLINE bool nrf_uarte_event_extra_check(NRF_UARTE_Type * p_reg, uint32_t event); - -/** - * @brief Function for clearing a specific extra UARTE event. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Extra event to clear. - */ - -__STATIC_INLINE void nrf_uarte_event_extra_clear(NRF_UARTE_Type * p_reg, uint32_t event); - -/** - * @brief Function for returning the address of a specific UARTE event register. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] event Desired event. - * - * @retval Address of specified event register. - */ -__STATIC_INLINE uint32_t nrf_uarte_event_address_get(NRF_UARTE_Type * p_reg, - nrf_uarte_event_t event); - -/** - * @brief Function for enabling UARTE shortcuts. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param shorts_mask Shortcuts to enable. - */ -__STATIC_INLINE void nrf_uarte_shorts_enable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask); - -/** - * @brief Function for disabling UARTE shortcuts. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param shorts_mask Shortcuts to disable. - */ -__STATIC_INLINE void nrf_uarte_shorts_disable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask); - -/** - * @brief Function for enabling UARTE interrupts. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param int_mask Interrupts to enable. - */ -__STATIC_INLINE void nrf_uarte_int_enable(NRF_UARTE_Type * p_reg, uint32_t int_mask); - -/** - * @brief Function for retrieving the state of a given interrupt. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param int_mask Mask of interrupt to check. - * - * @retval true If the interrupt is enabled. - * @retval false If the interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_uarte_int_enable_check(NRF_UARTE_Type * p_reg, nrf_uarte_int_mask_t int_mask); - -/** - * @brief Function for disabling specific interrupts. - * - * @param p_reg Instance. - * @param int_mask Interrupts to disable. - */ -__STATIC_INLINE void nrf_uarte_int_disable(NRF_UARTE_Type * p_reg, uint32_t int_mask); - -/** - * @brief Function for getting error source mask. Function is clearing error source flags after reading. - * - * @param p_reg Pointer to the peripheral registers structure. - * @return Mask with error source flags. - */ -__STATIC_INLINE uint32_t nrf_uarte_errorsrc_get_and_clear(NRF_UARTE_Type * p_reg); - -/** - * @brief Function for enabling UARTE. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_uarte_enable(NRF_UARTE_Type * p_reg); - -/** - * @brief Function for disabling UARTE. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_uarte_disable(NRF_UARTE_Type * p_reg); - -/** - * @brief Function for configuring TX/RX pins. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param pseltxd TXD pin number. - * @param pselrxd RXD pin number. - */ -__STATIC_INLINE void nrf_uarte_txrx_pins_set(NRF_UARTE_Type * p_reg, uint32_t pseltxd, uint32_t pselrxd); - -/** - * @brief Function for disconnecting TX/RX pins. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_uarte_txrx_pins_disconnect(NRF_UARTE_Type * p_reg); - -/** - * @brief Function for getting TX pin. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE uint32_t nrf_uarte_tx_pin_get(NRF_UARTE_Type * p_reg); - -/** - * @brief Function for getting RX pin. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE uint32_t nrf_uarte_rx_pin_get(NRF_UARTE_Type * p_reg); - -/** - * @brief Function for getting RTS pin. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE uint32_t nrf_uarte_rts_pin_get(NRF_UARTE_Type * p_reg); - -/** - * @brief Function for getting CTS pin. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE uint32_t nrf_uarte_cts_pin_get(NRF_UARTE_Type * p_reg); - - -/** - * @brief Function for configuring flow control pins. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param pselrts RTS pin number. - * @param pselcts CTS pin number. - */ -__STATIC_INLINE void nrf_uarte_hwfc_pins_set(NRF_UARTE_Type * p_reg, - uint32_t pselrts, - uint32_t pselcts); - -/** - * @brief Function for disconnecting flow control pins. - * - * @param p_reg Pointer to the peripheral registers structure. - */ -__STATIC_INLINE void nrf_uarte_hwfc_pins_disconnect(NRF_UARTE_Type * p_reg); - -/** - * @brief Function for starting an UARTE task. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param task Task. - */ -__STATIC_INLINE void nrf_uarte_task_trigger(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task); - -/** - * @brief Function for returning the address of a specific task register. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param task Task. - * - * @return Task address. - */ -__STATIC_INLINE uint32_t nrf_uarte_task_address_get(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task); - -/** - * @brief Function for configuring UARTE. - * - * @param p_reg Pointer to the peripheral registers structure. - * @param hwfc Hardware flow control. Enabled if true. - * @param parity Parity. Included if true. - */ -__STATIC_INLINE void nrf_uarte_configure(NRF_UARTE_Type * p_reg, - nrf_uarte_parity_t parity, - nrf_uarte_hwfc_t hwfc); - - -/** - * @brief Function for setting UARTE baudrate. - * - * @param p_reg Instance. - * @param baudrate Baudrate. - */ -__STATIC_INLINE void nrf_uarte_baudrate_set(NRF_UARTE_Type * p_reg, nrf_uarte_baudrate_t baudrate); - -/** - * @brief Function for setting the transmit buffer. - * - * @param[in] p_reg Instance. - * @param[in] p_buffer Pointer to the buffer with data to send. - * @param[in] length Maximum number of data bytes to transmit. - */ -__STATIC_INLINE void nrf_uarte_tx_buffer_set(NRF_UARTE_Type * p_reg, - uint8_t const * p_buffer, - uint8_t length); - -/** - * @brief Function for getting number of bytes transmitted in the last transaction. - * - * @param[in] p_reg Instance. - * - * @retval Amount of bytes transmitted. - */ -__STATIC_INLINE uint32_t nrf_uarte_tx_amount_get(NRF_UARTE_Type * p_reg); - -/** - * @brief Function for setting the receive buffer. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * @param[in] p_buffer Pointer to the buffer for received data. - * @param[in] length Maximum number of data bytes to receive. - */ -__STATIC_INLINE void nrf_uarte_rx_buffer_set(NRF_UARTE_Type * p_reg, - uint8_t * p_buffer, - uint8_t length); - -/** - * @brief Function for getting number of bytes received in the last transaction. - * - * @param[in] p_reg Pointer to the peripheral registers structure. - * - * @retval Amount of bytes received. - */ -__STATIC_INLINE uint32_t nrf_uarte_rx_amount_get(NRF_UARTE_Type * p_reg); - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION -__STATIC_INLINE void nrf_uarte_event_clear(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)); - (void)dummy; -#endif - -} - -__STATIC_INLINE void nrf_uarte_event_extra_clear(NRF_UARTE_Type * p_reg, uint32_t event) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)); - (void)dummy; -#endif - -} -__STATIC_INLINE bool nrf_uarte_event_check(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event); -} - -__STATIC_INLINE bool nrf_uarte_event_extra_check(NRF_UARTE_Type * p_reg, uint32_t event) -{ - return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event); -} - -__STATIC_INLINE uint32_t nrf_uarte_event_address_get(NRF_UARTE_Type * p_reg, - nrf_uarte_event_t event) -{ - return (uint32_t)((uint8_t *)p_reg + (uint32_t)event); -} - -__STATIC_INLINE void nrf_uarte_shorts_enable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask) -{ - p_reg->SHORTS |= shorts_mask; -} - -__STATIC_INLINE void nrf_uarte_shorts_disable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask) -{ - p_reg->SHORTS &= ~(shorts_mask); -} - -__STATIC_INLINE void nrf_uarte_int_enable(NRF_UARTE_Type * p_reg, uint32_t int_mask) -{ - p_reg->INTENSET = int_mask; -} - -__STATIC_INLINE bool nrf_uarte_int_enable_check(NRF_UARTE_Type * p_reg, nrf_uarte_int_mask_t int_mask) -{ - return (bool)(p_reg->INTENSET & int_mask); -} - -__STATIC_INLINE void nrf_uarte_int_disable(NRF_UARTE_Type * p_reg, uint32_t int_mask) -{ - p_reg->INTENCLR = int_mask; -} - -__STATIC_INLINE uint32_t nrf_uarte_errorsrc_get_and_clear(NRF_UARTE_Type * p_reg) -{ - uint32_t errsrc_mask = p_reg->ERRORSRC; - p_reg->ERRORSRC = errsrc_mask; - return errsrc_mask; -} - -__STATIC_INLINE void nrf_uarte_enable(NRF_UARTE_Type * p_reg) -{ - p_reg->ENABLE = UARTE_ENABLE_ENABLE_Enabled; -} - -__STATIC_INLINE void nrf_uarte_disable(NRF_UARTE_Type * p_reg) -{ - p_reg->ENABLE = UARTE_ENABLE_ENABLE_Disabled; -} - -__STATIC_INLINE void nrf_uarte_txrx_pins_set(NRF_UARTE_Type * p_reg, uint32_t pseltxd, uint32_t pselrxd) -{ - p_reg->PSEL.TXD = pseltxd; - p_reg->PSEL.RXD = pselrxd; -} - -__STATIC_INLINE void nrf_uarte_txrx_pins_disconnect(NRF_UARTE_Type * p_reg) -{ - nrf_uarte_txrx_pins_set(p_reg, NRF_UARTE_PSEL_DISCONNECTED, NRF_UARTE_PSEL_DISCONNECTED); -} - -__STATIC_INLINE uint32_t nrf_uarte_tx_pin_get(NRF_UARTE_Type * p_reg) -{ - return p_reg->PSEL.TXD; -} - -__STATIC_INLINE uint32_t nrf_uarte_rx_pin_get(NRF_UARTE_Type * p_reg) -{ - return p_reg->PSEL.RXD; -} - -__STATIC_INLINE uint32_t nrf_uarte_rts_pin_get(NRF_UARTE_Type * p_reg) -{ - return p_reg->PSEL.RTS; -} - -__STATIC_INLINE uint32_t nrf_uarte_cts_pin_get(NRF_UARTE_Type * p_reg) -{ - return p_reg->PSEL.CTS; -} - -__STATIC_INLINE void nrf_uarte_hwfc_pins_set(NRF_UARTE_Type * p_reg, uint32_t pselrts, uint32_t pselcts) -{ - p_reg->PSEL.RTS = pselrts; - p_reg->PSEL.CTS = pselcts; -} - -__STATIC_INLINE void nrf_uarte_hwfc_pins_disconnect(NRF_UARTE_Type * p_reg) -{ - nrf_uarte_hwfc_pins_set(p_reg, NRF_UARTE_PSEL_DISCONNECTED, NRF_UARTE_PSEL_DISCONNECTED); -} - -__STATIC_INLINE void nrf_uarte_task_trigger(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task) -{ - *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL; -} - -__STATIC_INLINE uint32_t nrf_uarte_task_address_get(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task) -{ - return (uint32_t)p_reg + (uint32_t)task; -} - -__STATIC_INLINE void nrf_uarte_configure(NRF_UARTE_Type * p_reg, - nrf_uarte_parity_t parity, - nrf_uarte_hwfc_t hwfc) -{ - p_reg->CONFIG = (uint32_t)parity | (uint32_t)hwfc; -} - -__STATIC_INLINE void nrf_uarte_baudrate_set(NRF_UARTE_Type * p_reg, nrf_uarte_baudrate_t baudrate) -{ - p_reg->BAUDRATE = baudrate; -} - -__STATIC_INLINE void nrf_uarte_tx_buffer_set(NRF_UARTE_Type * p_reg, - uint8_t const * p_buffer, - uint8_t length) -{ - p_reg->TXD.PTR = (uint32_t)p_buffer; - p_reg->TXD.MAXCNT = length; -} - -__STATIC_INLINE uint32_t nrf_uarte_tx_amount_get(NRF_UARTE_Type * p_reg) -{ - return p_reg->TXD.AMOUNT; -} - -__STATIC_INLINE void nrf_uarte_rx_buffer_set(NRF_UARTE_Type * p_reg, - uint8_t * p_buffer, - uint8_t length) -{ - p_reg->RXD.PTR = (uint32_t)p_buffer; - p_reg->RXD.MAXCNT = length; -} - -__STATIC_INLINE uint32_t nrf_uarte_rx_amount_get(NRF_UARTE_Type * p_reg) -{ - return p_reg->RXD.AMOUNT; -} -#endif //SUPPRESS_INLINE_IMPLEMENTATION -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif //NRF_UARTE_H__ - diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_usbd.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_usbd.h deleted file mode 100644 index 8905788db00..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_usbd.h +++ /dev/null @@ -1,1435 +0,0 @@ -/** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef NRF_USBD_H__ -#define NRF_USBD_H__ - -/** - * @ingroup nrf_drivers - * @defgroup nrf_usbd_hal USBD HAL - * @{ - * - * @brief @tagAPI52840 Hardware access layer for Universal Serial Bus Device (USBD) peripheral. - */ - -#include "nrf_peripherals.h" -#include "nrf.h" -#include "nrf_assert.h" -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief USBD tasks - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_USBD_TASK_STARTEPIN0 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[0] ), /**< Captures the EPIN[0].PTR, EPIN[0].MAXCNT and EPIN[0].CONFIG registers values, and enables control endpoint IN 0 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPIN1 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[1] ), /**< Captures the EPIN[1].PTR, EPIN[1].MAXCNT and EPIN[1].CONFIG registers values, and enables data endpoint IN 1 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPIN2 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[2] ), /**< Captures the EPIN[2].PTR, EPIN[2].MAXCNT and EPIN[2].CONFIG registers values, and enables data endpoint IN 2 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPIN3 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[3] ), /**< Captures the EPIN[3].PTR, EPIN[3].MAXCNT and EPIN[3].CONFIG registers values, and enables data endpoint IN 3 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPIN4 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[4] ), /**< Captures the EPIN[4].PTR, EPIN[4].MAXCNT and EPIN[4].CONFIG registers values, and enables data endpoint IN 4 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPIN5 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[5] ), /**< Captures the EPIN[5].PTR, EPIN[5].MAXCNT and EPIN[5].CONFIG registers values, and enables data endpoint IN 5 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPIN6 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[6] ), /**< Captures the EPIN[6].PTR, EPIN[6].MAXCNT and EPIN[6].CONFIG registers values, and enables data endpoint IN 6 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPIN7 = offsetof(NRF_USBD_Type, TASKS_STARTEPIN[7] ), /**< Captures the EPIN[7].PTR, EPIN[7].MAXCNT and EPIN[7].CONFIG registers values, and enables data endpoint IN 7 to respond to traffic from host */ - NRF_USBD_TASK_STARTISOIN = offsetof(NRF_USBD_Type, TASKS_STARTISOIN ), /**< Captures the ISOIN.PTR, ISOIN.MAXCNT and ISOIN.CONFIG registers values, and enables sending data on iso endpoint 8 */ - NRF_USBD_TASK_STARTEPOUT0 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[0]), /**< Captures the EPOUT[0].PTR, EPOUT[0].MAXCNT and EPOUT[0].CONFIG registers values, and enables control endpoint 0 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPOUT1 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[1]), /**< Captures the EPOUT[1].PTR, EPOUT[1].MAXCNT and EPOUT[1].CONFIG registers values, and enables data endpoint 1 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPOUT2 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[2]), /**< Captures the EPOUT[2].PTR, EPOUT[2].MAXCNT and EPOUT[2].CONFIG registers values, and enables data endpoint 2 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPOUT3 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[3]), /**< Captures the EPOUT[3].PTR, EPOUT[3].MAXCNT and EPOUT[3].CONFIG registers values, and enables data endpoint 3 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPOUT4 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[4]), /**< Captures the EPOUT[4].PTR, EPOUT[4].MAXCNT and EPOUT[4].CONFIG registers values, and enables data endpoint 4 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPOUT5 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[5]), /**< Captures the EPOUT[5].PTR, EPOUT[5].MAXCNT and EPOUT[5].CONFIG registers values, and enables data endpoint 5 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPOUT6 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[6]), /**< Captures the EPOUT[6].PTR, EPOUT[6].MAXCNT and EPOUT[6].CONFIG registers values, and enables data endpoint 6 to respond to traffic from host */ - NRF_USBD_TASK_STARTEPOUT7 = offsetof(NRF_USBD_Type, TASKS_STARTEPOUT[7]), /**< Captures the EPOUT[7].PTR, EPOUT[7].MAXCNT and EPOUT[7].CONFIG registers values, and enables data endpoint 7 to respond to traffic from host */ - NRF_USBD_TASK_STARTISOOUT = offsetof(NRF_USBD_Type, TASKS_STARTISOOUT ), /**< Captures the ISOOUT.PTR, ISOOUT.MAXCNT and ISOOUT.CONFIG registers values, and enables receiving of data on iso endpoint 8 */ - NRF_USBD_TASK_EP0RCVOUT = offsetof(NRF_USBD_Type, TASKS_EP0RCVOUT ), /**< Allows OUT data stage on control endpoint 0 */ - NRF_USBD_TASK_EP0STATUS = offsetof(NRF_USBD_Type, TASKS_EP0STATUS ), /**< Allows status stage on control endpoint 0 */ - NRF_USBD_TASK_EP0STALL = offsetof(NRF_USBD_Type, TASKS_EP0STALL ), /**< STALLs data and status stage on control endpoint 0 */ - NRF_USBD_TASK_DRIVEDPDM = offsetof(NRF_USBD_Type, TASKS_DPDMDRIVE ), /**< Forces D+ and D-lines to the state defined in the DPDMVALUE register */ - NRF_USBD_TASK_NODRIVEDPDM = offsetof(NRF_USBD_Type, TASKS_DPDMNODRIVE ), /**< Stops forcing D+ and D- lines to any state (USB engine takes control) */ - /*lint -restore*/ -}nrf_usbd_task_t; - -/** - * @brief USBD events - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_USBD_EVENT_USBRESET = offsetof(NRF_USBD_Type, EVENTS_USBRESET ), /**< Signals that a USB reset condition has been detected on the USB lines */ - NRF_USBD_EVENT_STARTED = offsetof(NRF_USBD_Type, EVENTS_STARTED ), /**< Confirms that the EPIN[n].PTR, EPIN[n].MAXCNT, EPIN[n].CONFIG, or EPOUT[n].PTR, EPOUT[n].MAXCNT and EPOUT[n].CONFIG registers have been captured on all endpoints reported in the EPSTATUS register */ - NRF_USBD_EVENT_ENDEPIN0 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[0] ), /**< The whole EPIN[0] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPIN1 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[1] ), /**< The whole EPIN[1] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPIN2 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[2] ), /**< The whole EPIN[2] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPIN3 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[3] ), /**< The whole EPIN[3] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPIN4 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[4] ), /**< The whole EPIN[4] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPIN5 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[5] ), /**< The whole EPIN[5] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPIN6 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[6] ), /**< The whole EPIN[6] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPIN7 = offsetof(NRF_USBD_Type, EVENTS_ENDEPIN[7] ), /**< The whole EPIN[7] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_EP0DATADONE = offsetof(NRF_USBD_Type, EVENTS_EP0DATADONE), /**< An acknowledged data transfer has taken place on the control endpoint */ - NRF_USBD_EVENT_ENDISOIN0 = offsetof(NRF_USBD_Type, EVENTS_ENDISOIN ), /**< The whole ISOIN buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPOUT0 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[0]), /**< The whole EPOUT[0] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPOUT1 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[1]), /**< The whole EPOUT[1] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPOUT2 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[2]), /**< The whole EPOUT[2] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPOUT3 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[3]), /**< The whole EPOUT[3] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPOUT4 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[4]), /**< The whole EPOUT[4] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPOUT5 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[5]), /**< The whole EPOUT[5] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPOUT6 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[6]), /**< The whole EPOUT[6] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDEPOUT7 = offsetof(NRF_USBD_Type, EVENTS_ENDEPOUT[7]), /**< The whole EPOUT[7] buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_ENDISOOUT0 = offsetof(NRF_USBD_Type, EVENTS_ENDISOOUT ), /**< The whole ISOOUT buffer has been consumed. The RAM buffer can be accessed safely by software. */ - NRF_USBD_EVENT_SOF = offsetof(NRF_USBD_Type, EVENTS_SOF ), /**< Signals that a SOF (start of frame) condition has been detected on the USB lines */ - NRF_USBD_EVENT_USBEVENT = offsetof(NRF_USBD_Type, EVENTS_USBEVENT ), /**< An event or an error not covered by specific events has occurred, check EVENTCAUSE register to find the cause */ - NRF_USBD_EVENT_EP0SETUP = offsetof(NRF_USBD_Type, EVENTS_EP0SETUP ), /**< A valid SETUP token has been received (and acknowledged) on the control endpoint */ - NRF_USBD_EVENT_DATAEP = offsetof(NRF_USBD_Type, EVENTS_EPDATA ), /**< A data transfer has occurred on a data endpoint, indicated by the EPDATASTATUS register */ - NRF_USBD_EVENT_ACCESSFAULT = offsetof(NRF_USBD_Type, EVENTS_ACCESSFAULT), /**< >Access to an unavailable USB register has been attempted (software or EasyDMA) */ - /*lint -restore*/ -}nrf_usbd_event_t; - -/** - * @brief USBD shorts - */ -typedef enum -{ - NRF_USBD_SHORT_EP0DATADONE_STARTEPIN0_MASK = USBD_SHORTS_EP0DATADONE_STARTEPIN0_Msk , /**< Shortcut between EP0DATADONE event and STARTEPIN0 task */ - NRF_USBD_SHORT_EP0DATADONE_STARTEPOUT0_MASK = USBD_SHORTS_EP0DATADONE_STARTEPOUT0_Msk, /**< Shortcut between EP0DATADONE event and STARTEPOUT0 task */ - NRF_USBD_SHORT_EP0DATADONE_EP0STATUS_MASK = USBD_SHORTS_EP0DATADONE_EP0STATUS_Msk , /**< Shortcut between EP0DATADONE event and EP0STATUS task */ - NRF_USBD_SHORT_ENDEPOUT0_EP0STATUS_MASK = USBD_SHORTS_ENDEPOUT0_EP0STATUS_Msk , /**< Shortcut between ENDEPOUT[0] event and EP0STATUS task */ - NRF_USBD_SHORT_ENDEPOUT0_EP0RCVOUT_MASK = USBD_SHORTS_ENDEPOUT0_EP0RCVOUT_Msk , /**< Shortcut between ENDEPOUT[0] event and EP0RCVOUT task */ -}nrf_usbd_short_mask_t; - -/** - * @brief USBD interrupts - */ -typedef enum -{ - NRF_USBD_INT_USBRESET_MASK = USBD_INTEN_USBRESET_Msk , /**< Enable or disable interrupt for USBRESET event */ - NRF_USBD_INT_STARTED_MASK = USBD_INTEN_STARTED_Msk , /**< Enable or disable interrupt for STARTED event */ - NRF_USBD_INT_ENDEPIN0_MASK = USBD_INTEN_ENDEPIN0_Msk , /**< Enable or disable interrupt for ENDEPIN[0] event */ - NRF_USBD_INT_ENDEPIN1_MASK = USBD_INTEN_ENDEPIN1_Msk , /**< Enable or disable interrupt for ENDEPIN[1] event */ - NRF_USBD_INT_ENDEPIN2_MASK = USBD_INTEN_ENDEPIN2_Msk , /**< Enable or disable interrupt for ENDEPIN[2] event */ - NRF_USBD_INT_ENDEPIN3_MASK = USBD_INTEN_ENDEPIN3_Msk , /**< Enable or disable interrupt for ENDEPIN[3] event */ - NRF_USBD_INT_ENDEPIN4_MASK = USBD_INTEN_ENDEPIN4_Msk , /**< Enable or disable interrupt for ENDEPIN[4] event */ - NRF_USBD_INT_ENDEPIN5_MASK = USBD_INTEN_ENDEPIN5_Msk , /**< Enable or disable interrupt for ENDEPIN[5] event */ - NRF_USBD_INT_ENDEPIN6_MASK = USBD_INTEN_ENDEPIN6_Msk , /**< Enable or disable interrupt for ENDEPIN[6] event */ - NRF_USBD_INT_ENDEPIN7_MASK = USBD_INTEN_ENDEPIN7_Msk , /**< Enable or disable interrupt for ENDEPIN[7] event */ - NRF_USBD_INT_EP0DATADONE_MASK = USBD_INTEN_EP0DATADONE_Msk, /**< Enable or disable interrupt for EP0DATADONE event */ - NRF_USBD_INT_ENDISOIN0_MASK = USBD_INTEN_ENDISOIN_Msk , /**< Enable or disable interrupt for ENDISOIN[0] event */ - NRF_USBD_INT_ENDEPOUT0_MASK = USBD_INTEN_ENDEPOUT0_Msk , /**< Enable or disable interrupt for ENDEPOUT[0] event */ - NRF_USBD_INT_ENDEPOUT1_MASK = USBD_INTEN_ENDEPOUT1_Msk , /**< Enable or disable interrupt for ENDEPOUT[1] event */ - NRF_USBD_INT_ENDEPOUT2_MASK = USBD_INTEN_ENDEPOUT2_Msk , /**< Enable or disable interrupt for ENDEPOUT[2] event */ - NRF_USBD_INT_ENDEPOUT3_MASK = USBD_INTEN_ENDEPOUT3_Msk , /**< Enable or disable interrupt for ENDEPOUT[3] event */ - NRF_USBD_INT_ENDEPOUT4_MASK = USBD_INTEN_ENDEPOUT4_Msk , /**< Enable or disable interrupt for ENDEPOUT[4] event */ - NRF_USBD_INT_ENDEPOUT5_MASK = USBD_INTEN_ENDEPOUT5_Msk , /**< Enable or disable interrupt for ENDEPOUT[5] event */ - NRF_USBD_INT_ENDEPOUT6_MASK = USBD_INTEN_ENDEPOUT6_Msk , /**< Enable or disable interrupt for ENDEPOUT[6] event */ - NRF_USBD_INT_ENDEPOUT7_MASK = USBD_INTEN_ENDEPOUT7_Msk , /**< Enable or disable interrupt for ENDEPOUT[7] event */ - NRF_USBD_INT_ENDISOOUT0_MASK = USBD_INTEN_ENDISOOUT_Msk , /**< Enable or disable interrupt for ENDISOOUT[0] event */ - NRF_USBD_INT_SOF_MASK = USBD_INTEN_SOF_Msk , /**< Enable or disable interrupt for SOF event */ - NRF_USBD_INT_USBEVENT_MASK = USBD_INTEN_USBEVENT_Msk , /**< Enable or disable interrupt for USBEVENT event */ - NRF_USBD_INT_EP0SETUP_MASK = USBD_INTEN_EP0SETUP_Msk , /**< Enable or disable interrupt for EP0SETUP event */ - NRF_USBD_INT_DATAEP_MASK = USBD_INTEN_EPDATA_Msk , /**< Enable or disable interrupt for EPDATA event */ - NRF_USBD_INT_ACCESSFAULT_MASK = USBD_INTEN_ACCESSFAULT_Msk, /**< Enable or disable interrupt for ACCESSFAULT event */ -}nrf_usbd_int_mask_t; - - -/** - * @brief Function for activating a specific USBD task. - * - * @param task Task. - */ -__STATIC_INLINE void nrf_usbd_task_trigger(nrf_usbd_task_t task); - -/** - * @brief Function for returning the address of a specific USBD task register. - * - * @param task Task. - * - * @return Task address. - */ -__STATIC_INLINE uint32_t nrf_usbd_task_address_get(nrf_usbd_task_t task); - -/** - * @brief Function for clearing a specific event. - * - * @param event Event. - */ -__STATIC_INLINE void nrf_usbd_event_clear(nrf_usbd_event_t event); - -/** - * @brief Function for returning the state of a specific event. - * - * @param event Event. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_usbd_event_check(nrf_usbd_event_t event); - -/** - * @brief Function for getting and clearing the state of specific event - * - * This function checks the state of the event and clears it. - * - * @param event Event. - * - * @retval true If the event was set. - * @retval false If the event was not set. - */ -__STATIC_INLINE bool nrf_usbd_event_get_and_clear(nrf_usbd_event_t event); - -/** - * @brief Function for returning the address of a specific USBD event register. - * - * @param event Event. - * - * @return Address. - */ -__STATIC_INLINE uint32_t nrf_usbd_event_address_get(nrf_usbd_event_t event); - -/** - * @brief Function for setting a shortcut. - * - * @param short_mask Shortcuts mask. - */ -__STATIC_INLINE void nrf_usbd_shorts_enable(uint32_t short_mask); - -/** - * @brief Function for clearing shortcuts. - * - * @param short_mask Shortcuts mask. - */ -__STATIC_INLINE void nrf_usbd_shorts_disable(uint32_t short_mask); - -/** - * @brief Get the shorts mask - * - * Function returns shorts register. - * - * @return Flags of currently enabled shortcuts - */ -__STATIC_INLINE uint32_t nrf_usbd_shorts_get(void); - -/** - * @brief Function for enabling selected interrupts. - * - * @param int_mask Interrupts mask. - */ -__STATIC_INLINE void nrf_usbd_int_enable(uint32_t int_mask); - -/** - * @brief Function for retrieving the state of selected interrupts. - * - * @param int_mask Interrupts mask. - * - * @retval true If any of selected interrupts is enabled. - * @retval false If none of selected interrupts is enabled. - */ -__STATIC_INLINE bool nrf_usbd_int_enable_check(uint32_t int_mask); - -/** - * @brief Function for retrieving the information about enabled interrupts. - * - * @return The flags of enabled interrupts. - */ -__STATIC_INLINE uint32_t nrf_usbd_int_enable_get(void); - -/** - * @brief Function for disabling selected interrupts. - * - * @param int_mask Interrupts mask. - */ -__STATIC_INLINE void nrf_usbd_int_disable(uint32_t int_mask); - - -/** @} */ /* End of nrf_usbd_hal */ - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -/* ------------------------------------------------------------------------------------------------ - * Internal functions - */ - -/** - * @internal - * @brief Internal function for getting task/event register address - * - * @oaram offset Offset of the register from the instance beginning - * - * @attention offset has to be modulo 4 value. In other case we can get hardware fault. - * @return Pointer to the register - */ -__STATIC_INLINE volatile uint32_t* nrf_usbd_getRegPtr(uint32_t offset) -{ - return (volatile uint32_t*)(((uint8_t *)NRF_USBD) + (uint32_t)offset); -} - -/** - * @internal - * @brief Internal function for getting task/event register address - constant version - * - * @oaram offset Offset of the register from the instance beginning - * - * @attention offset has to be modulo 4 value. In other case we can get hardware fault. - * @return Pointer to the register - */ -__STATIC_INLINE volatile const uint32_t* nrf_usbd_getRegPtr_c(uint32_t offset) -{ - return (volatile const uint32_t*)(((uint8_t *)NRF_USBD) + (uint32_t)offset); -} - -/* ------------------------------------------------------------------------------------------------ - * Interface functions definitions - */ - -void nrf_usbd_task_trigger(nrf_usbd_task_t task) -{ - *(nrf_usbd_getRegPtr((uint32_t)task)) = 1UL; - __ISB(); - __DSB(); -} - -uint32_t nrf_usbd_task_address_get(nrf_usbd_task_t task) -{ - return (uint32_t)nrf_usbd_getRegPtr_c((uint32_t)task); -} - -void nrf_usbd_event_clear(nrf_usbd_event_t event) -{ - *(nrf_usbd_getRegPtr((uint32_t)event)) = 0UL; - __ISB(); - __DSB(); -} - -bool nrf_usbd_event_check(nrf_usbd_event_t event) -{ - return (bool)*nrf_usbd_getRegPtr_c((uint32_t)event); -} - -bool nrf_usbd_event_get_and_clear(nrf_usbd_event_t event) -{ - bool ret = nrf_usbd_event_check(event); - if (ret) - { - nrf_usbd_event_clear(event); - } - return ret; -} - -uint32_t nrf_usbd_event_address_get(nrf_usbd_event_t event) -{ - return (uint32_t)nrf_usbd_getRegPtr_c((uint32_t)event); -} - -void nrf_usbd_shorts_enable(uint32_t short_mask) -{ - NRF_USBD->SHORTS |= short_mask; -} - -void nrf_usbd_shorts_disable(uint32_t short_mask) -{ - if (~0U == short_mask) - { - /* Optimized version for "disable all" */ - NRF_USBD->SHORTS = 0; - } - else - { - NRF_USBD->SHORTS &= ~short_mask; - } -} - -uint32_t nrf_usbd_shorts_get(void) -{ - return NRF_USBD->SHORTS; -} - -void nrf_usbd_int_enable(uint32_t int_mask) -{ - NRF_USBD->INTENSET = int_mask; -} - -bool nrf_usbd_int_enable_check(uint32_t int_mask) -{ - return !!(NRF_USBD->INTENSET & int_mask); -} - -uint32_t nrf_usbd_int_enable_get(void) -{ - return NRF_USBD->INTENSET; -} - -void nrf_usbd_int_disable(uint32_t int_mask) -{ - NRF_USBD->INTENCLR = int_mask; -} - -#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ - -/* ------------------------------------------------------------------------------------------------ - * End of automatically generated part - * ------------------------------------------------------------------------------------------------ - */ -/** - * @addtogroup nrf_usbd_hal - * @{ - */ - -/** - * @brief Frame counter size - * - * The number of counts that can be fitted into frame counter - */ -#define NRF_USBD_FRAMECNTR_SIZE \ - ( (USBD_FRAMECNTR_FRAMECNTR_Msk >> USBD_FRAMECNTR_FRAMECNTR_Pos) + 1UL ) -#ifndef USBD_FRAMECNTR_FRAMECNTR_Msk -#error USBD_FRAMECNTR_FRAMECNTR_Msk should be changed into USBD_FRAMECNTR_FRAMECNTR_Msk -#endif - -/** - * @brief First isochronous endpoint number - * - * The number of the first isochronous endpoint - */ -#define NRF_USBD_EPISO_FIRST 8 - -/** - * @brief Total number of IN endpoints - * - * Total number of IN endpoint (including ISOCHRONOUS). - */ -#define NRF_USBD_EPIN_CNT 9 - -/** - * @brief Total number of OUT endpoints - * - * Total number of OUT endpoint (including ISOCHRONOUS). - */ -#define NRF_USBD_EPOUT_CNT 9 - -/** - * @brief Mask of the direction bit in endpoint number - */ -#define NRF_USBD_EP_DIR_Msk (1U << 7) - -/** - * @brief The value of direction bit for IN endpoint direction - */ -#define NRF_USBD_EP_DIR_IN (1U << 7) - -/** - * @brief The value of direction bit for OUT endpoint direction - */ -#define NRF_USBD_EP_DIR_OUT (0U << 7) - -/** - * @brief Macro for making IN endpoint identifier from endpoint number - * - * Macro that sets direction bit to make IN endpoint - * @param[in] epnr Endpoint number - * @return IN Endpoint identifier - */ -#define NRF_USBD_EPIN(epnr) (((uint8_t)(epnr)) | NRF_USBD_EP_DIR_IN) - -/** - * @brief Macro for making OUT endpoint identifier from endpoint number - * - * Macro that sets direction bit to make OUT endpoint - * @param[in] epnr Endpoint number - * @return OUT Endpoint identifier - */ -#define NRF_USBD_EPOUT(epnr) (((uint8_t)(epnr)) | NRF_USBD_EP_DIR_OUT) - -/** - * @brief Macro for extracting the endpoint number from endpoint identifier - * - * Macro that strips out the information about endpoint direction. - * @param[in] ep Endpoint identifier - * @return Endpoint number - */ -#define NRF_USBD_EP_NR_GET(ep) ((uint8_t)(((uint8_t)(ep)) & 0xFU)) - -/** - * @brief Macro for checking endpoint direction - * - * This macro checks if given endpoint has IN direction - * @param ep Endpoint identifier - * @retval true If the endpoint direction is IN - * @retval false If the endpoint direction is OUT - */ -#define NRF_USBD_EPIN_CHECK(ep) ( (((uint8_t)(ep)) & NRF_USBD_EP_DIR_Msk) == NRF_USBD_EP_DIR_IN ) - -/** - * @brief Macro for checking endpoint direction - * - * This macro checks if given endpoint has OUT direction - * @param ep Endpoint identifier - * @retval true If the endpoint direction is OUT - * @retval false If the endpoint direction is IN - */ -#define NRF_USBD_EPOUT_CHECK(ep) ( (((uint8_t)(ep)) & NRF_USBD_EP_DIR_Msk) == NRF_USBD_EP_DIR_OUT ) - -/** - * @brief Macro for checking if endpoint is isochronous - * - * @param ep It can be endpoint identifier or just endpoint number to check - * @retval true The endpoint is isochronous type - * @retval false The endpoint is bulk of interrupt type - */ -#define NRF_USBD_EPISO_CHECK(ep) (NRF_USBD_EP_NR_GET(ep) >= NRF_USBD_EPISO_FIRST) - -/** - * @brief Macro for checking if given number is valid endpoint number - * - * @param ep Endpoint number to check - * @retval true The endpoint is valid - * @retval false The endpoint is not valid - */ -#define NRF_USBD_EP_VALIDATE(ep) ( \ - (NRF_USBD_EPIN_CHECK(ep) && (NRF_USBD_EP_NR_GET(ep) < NRF_USBD_EPIN_CNT)) \ - || \ - (NRF_USBD_EPOUT_CHECK(ep) && (NRF_USBD_EP_NR_GET(ep) < NRF_USBD_EPOUT_CNT)) \ - ) - -/** - * @brief Not isochronous data frame received - * - * Special value returned by @ref nrf_usbd_episoout_size_get function that means that - * data frame was not received at all. - * This allows differentiate between situations when zero size data comes or no data comes at all - * on isochronous endpoint. - */ -#define NRF_USBD_EPISOOUT_NO_DATA ((size_t)(-1)) - -/** - * @brief EVENTCAUSE register bit masks - */ -typedef enum -{ - NRF_USBD_EVENTCAUSE_ISOOUTCRC_MASK = USBD_EVENTCAUSE_ISOOUTCRC_Msk, /**< CRC error was detected on isochronous OUT endpoint 8. */ - NRF_USBD_EVENTCAUSE_SUSPEND_MASK = USBD_EVENTCAUSE_SUSPEND_Msk , /**< Signals that the USB lines have been seen idle long enough for the device to enter suspend. */ - NRF_USBD_EVENTCAUSE_RESUME_MASK = USBD_EVENTCAUSE_RESUME_Msk , /**< Signals that a RESUME condition (K state or activity restart) has been detected on the USB lines. */ - NRF_USBD_EVENTCAUSE_READY_MASK = USBD_EVENTCAUSE_READY_Msk, /**< MAC is ready for normal operation, rised few us after USBD enabling */ - NRF_USBD_EVENTCAUSE_WUREQ_MASK = (1U << 10) /**< The USBD peripheral has exited Low Power mode */ -}nrf_usbd_eventcause_mask_t; - -/** - * @brief BUSSTATE register bit masks - */ -typedef enum -{ - NRF_USBD_BUSSTATE_DM_MASK = USBD_BUSSTATE_DM_Msk, /**< Negative line mask */ - NRF_USBD_BUSSTATE_DP_MASK = USBD_BUSSTATE_DP_Msk, /**< Positive line mask */ - /** Both lines are low */ - NRF_USBD_BUSSTATE_DPDM_LL = (USBD_BUSSTATE_DM_Low << USBD_BUSSTATE_DM_Pos) | (USBD_BUSSTATE_DP_Low << USBD_BUSSTATE_DP_Pos), - /** Positive line is high, negative line is low */ - NRF_USBD_BUSSTATE_DPDM_HL = (USBD_BUSSTATE_DM_Low << USBD_BUSSTATE_DM_Pos) | (USBD_BUSSTATE_DP_High << USBD_BUSSTATE_DP_Pos), - /** Positive line is low, negative line is high */ - NRF_USBD_BUSSTATE_DPDM_LH = (USBD_BUSSTATE_DM_High << USBD_BUSSTATE_DM_Pos) | (USBD_BUSSTATE_DP_Low << USBD_BUSSTATE_DP_Pos), - /** Both lines are high */ - NRF_USBD_BUSSTATE_DPDM_HH = (USBD_BUSSTATE_DM_High << USBD_BUSSTATE_DM_Pos) | (USBD_BUSSTATE_DP_High << USBD_BUSSTATE_DP_Pos), - /** J state */ - NRF_USBD_BUSSTATE_J = NRF_USBD_BUSSTATE_DPDM_HL, - /** K state */ - NRF_USBD_BUSSTATE_K = NRF_USBD_BUSSTATE_DPDM_LH, - /** Single ended 0 */ - NRF_USBD_BUSSTATE_SE0 = NRF_USBD_BUSSTATE_DPDM_LL, - /** Single ended 1 */ - NRF_USBD_BUSSTATE_SE1 = NRF_USBD_BUSSTATE_DPDM_HH -}nrf_usbd_busstate_t; - -/** - * @brief DPDMVALUE register - */ -typedef enum -{ - /**Generate Resume signal. Signal is generated for 50 us or 5 ms, - * depending on bus state */ - NRF_USBD_DPDMVALUE_RESUME = USBD_DPDMVALUE_STATE_Resume, - /** D+ Forced high, D- forced low (J state) */ - NRF_USBD_DPDMVALUE_J = USBD_DPDMVALUE_STATE_J, - /** D+ Forced low, D- forced high (K state) */ - NRF_USBD_DPMVALUE_K = USBD_DPDMVALUE_STATE_K -}nrf_usbd_dpdmvalue_t; - -/** - * @brief Dtoggle value or operation - */ -typedef enum -{ - NRF_USBD_DTOGGLE_NOP = USBD_DTOGGLE_VALUE_Nop, /**< No operation - do not change current data toggle on selected endpoint */ - NRF_USBD_DTOGGLE_DATA0 = USBD_DTOGGLE_VALUE_Data0,/**< Data toggle is DATA0 on selected endpoint */ - NRF_USBD_DTOGGLE_DATA1 = USBD_DTOGGLE_VALUE_Data1 /**< Data toggle is DATA1 on selected endpoint */ -}nrf_usbd_dtoggle_t; - -/** - * @brief EPSTATUS bit masks - */ -typedef enum -{ - NRF_USBD_EPSTATUS_EPIN0_MASK = USBD_EPSTATUS_EPIN0_Msk, - NRF_USBD_EPSTATUS_EPIN1_MASK = USBD_EPSTATUS_EPIN1_Msk, - NRF_USBD_EPSTATUS_EPIN2_MASK = USBD_EPSTATUS_EPIN2_Msk, - NRF_USBD_EPSTATUS_EPIN3_MASK = USBD_EPSTATUS_EPIN3_Msk, - NRF_USBD_EPSTATUS_EPIN4_MASK = USBD_EPSTATUS_EPIN4_Msk, - NRF_USBD_EPSTATUS_EPIN5_MASK = USBD_EPSTATUS_EPIN5_Msk, - NRF_USBD_EPSTATUS_EPIN6_MASK = USBD_EPSTATUS_EPIN6_Msk, - NRF_USBD_EPSTATUS_EPIN7_MASK = USBD_EPSTATUS_EPIN7_Msk, - - NRF_USBD_EPSTATUS_EPOUT0_MASK = USBD_EPSTATUS_EPOUT0_Msk, - NRF_USBD_EPSTATUS_EPOUT1_MASK = USBD_EPSTATUS_EPOUT1_Msk, - NRF_USBD_EPSTATUS_EPOUT2_MASK = USBD_EPSTATUS_EPOUT2_Msk, - NRF_USBD_EPSTATUS_EPOUT3_MASK = USBD_EPSTATUS_EPOUT3_Msk, - NRF_USBD_EPSTATUS_EPOUT4_MASK = USBD_EPSTATUS_EPOUT4_Msk, - NRF_USBD_EPSTATUS_EPOUT5_MASK = USBD_EPSTATUS_EPOUT5_Msk, - NRF_USBD_EPSTATUS_EPOUT6_MASK = USBD_EPSTATUS_EPOUT6_Msk, - NRF_USBD_EPSTATUS_EPOUT7_MASK = USBD_EPSTATUS_EPOUT7_Msk, -}nrf_usbd_epstatus_mask_t; - -/** - * @brief DATAEPSTATUS bit masks - */ -typedef enum -{ - NRF_USBD_EPDATASTATUS_EPIN1_MASK = USBD_EPDATASTATUS_EPIN1_Msk, - NRF_USBD_EPDATASTATUS_EPIN2_MASK = USBD_EPDATASTATUS_EPIN2_Msk, - NRF_USBD_EPDATASTATUS_EPIN3_MASK = USBD_EPDATASTATUS_EPIN3_Msk, - NRF_USBD_EPDATASTATUS_EPIN4_MASK = USBD_EPDATASTATUS_EPIN4_Msk, - NRF_USBD_EPDATASTATUS_EPIN5_MASK = USBD_EPDATASTATUS_EPIN5_Msk, - NRF_USBD_EPDATASTATUS_EPIN6_MASK = USBD_EPDATASTATUS_EPIN6_Msk, - NRF_USBD_EPDATASTATUS_EPIN7_MASK = USBD_EPDATASTATUS_EPIN7_Msk, - - NRF_USBD_EPDATASTATUS_EPOUT1_MASK = USBD_EPDATASTATUS_EPOUT1_Msk, - NRF_USBD_EPDATASTATUS_EPOUT2_MASK = USBD_EPDATASTATUS_EPOUT2_Msk, - NRF_USBD_EPDATASTATUS_EPOUT3_MASK = USBD_EPDATASTATUS_EPOUT3_Msk, - NRF_USBD_EPDATASTATUS_EPOUT4_MASK = USBD_EPDATASTATUS_EPOUT4_Msk, - NRF_USBD_EPDATASTATUS_EPOUT5_MASK = USBD_EPDATASTATUS_EPOUT5_Msk, - NRF_USBD_EPDATASTATUS_EPOUT6_MASK = USBD_EPDATASTATUS_EPOUT6_Msk, - NRF_USBD_EPDATASTATUS_EPOUT7_MASK = USBD_EPDATASTATUS_EPOUT7_Msk, -}nrf_usbd_dataepstatus_mask_t; - -/** - * @brief ISOSPLIT configurations - */ -typedef enum -{ - NRF_USBD_ISOSPLIT_OneDir = USBD_ISOSPLIT_SPLIT_OneDir, /**< Full buffer dedicated to either iso IN or OUT */ - NRF_USBD_ISOSPLIT_Half = USBD_ISOSPLIT_SPLIT_HalfIN, /**< Buffer divided in half */ -}nrf_usbd_isosplit_t; - -/** - * @brief Function for enabling USBD - */ -__STATIC_INLINE void nrf_usbd_enable(void); - -/** - * @brief Function for disabling USBD - */ -__STATIC_INLINE void nrf_usbd_disable(void); - -/** - * @brief Function for getting EVENTCAUSE register - * - * @return Flag values defined in @ref nrf_usbd_eventcause_mask_t - */ -__STATIC_INLINE uint32_t nrf_usbd_eventcause_get(void); - -/** - * @brief Function for clearing EVENTCAUSE flags - * - * @param flags Flags defined in @ref nrf_usbd_eventcause_mask_t - */ -__STATIC_INLINE void nrf_usbd_eventcause_clear(uint32_t flags); - -/** - * @brief Function for getting EVENTCAUSE register and clear flags that are set - * - * The safest way to return current EVENTCAUSE register. - * All the flags that are returned would be cleared inside EVENTCAUSE register. - * - * @return Flag values defined in @ref nrf_usbd_eventcause_mask_t - */ -__STATIC_INLINE uint32_t nrf_usbd_eventcause_get_and_clear(void); - -/** - * @brief Function for getting BUSSTATE register value - * - * @return The value of BUSSTATE register - */ -__STATIC_INLINE nrf_usbd_busstate_t nrf_usbd_busstate_get(void); - -/** - * @brief Function for getting HALTEDEPIN register value - * - * @param ep Endpoint number with IN/OUT flag - * - * @return The value of HALTEDEPIN or HALTEDOUT register for selected endpoint - * - * @note - * Use this function for the response for GetStatus() request to endpoint. - * To check if endpoint is stalled in the code use @ref nrf_usbd_ep_is_stall. - */ -__STATIC_INLINE uint32_t nrf_usbd_haltedep(uint8_t ep); - -/** - * @brief Function for checking if selected endpoint is stalled - * - * Function to be used as a syntax sweeter for @ref nrf_usbd_haltedep. - * - * Also as the isochronous endpoint cannot be halted - it returns always false - * if isochronous endpoint is checked. - * - * @param ep Endpoint number with IN/OUT flag - * - * @return The information if the enepoint is halted. - */ -__STATIC_INLINE bool nrf_usbd_ep_is_stall(uint8_t ep); - -/** - * @brief Function for getting EPSTATUS register value - * - * @return Flag values defined in @ref nrf_usbd_epstatus_mask_t - */ -__STATIC_INLINE uint32_t nrf_usbd_epstatus_get(void); - -/** - * @brief Function for clearing EPSTATUS register value - * - * @param flags Flags defined in @ref nrf_usbd_epstatus_mask_t - */ -__STATIC_INLINE void nrf_usbd_epstatus_clear(uint32_t flags); - -/** - * @brief Function for getting and clearing EPSTATUS register value - * - * Function clears all flags in register set before returning its value. - * @return Flag values defined in @ref nrf_usbd_epstatus_mask_t - */ -__STATIC_INLINE uint32_t nrf_usbd_epstatus_get_and_clear(void); - -/** - * @brief Function for getting DATAEPSTATUS register value - * - * @return Flag values defined in @ref nrf_usbd_dataepstatus_mask_t - */ -__STATIC_INLINE uint32_t nrf_usbd_epdatastatus_get(void); - -/** - * @brief Function for clearing DATAEPSTATUS register value - * - * @param flags Flags defined in @ref nrf_usbd_dataepstatus_mask_t - */ -__STATIC_INLINE void nrf_usbd_epdatastatus_clear(uint32_t flags); - -/** - * @brief Function for getting and clearing DATAEPSTATUS register value - * - * Function clears all flags in register set before returning its value. - * @return Flag values defined in @ref nrf_usbd_dataepstatus_mask_t - */ -__STATIC_INLINE uint32_t nrf_usbd_epdatastatus_get_and_clear(void); - -/** - * @name Setup command frame functions - * - * Functions for setup command frame parts access - * @{ - */ - /** - * @brief Function for reading BMREQUESTTYPE - part of SETUP packet - * - * @return the value of BREQUESTTYPE on last received SETUP frame - */ - __STATIC_INLINE uint8_t nrf_usbd_setup_bmrequesttype_get(void); - - /** - * @brief Function for reading BMREQUEST - part of SETUP packet - * - * @return the value of BREQUEST on last received SETUP frame - */ - __STATIC_INLINE uint8_t nrf_usbd_setup_brequest_get(void); - - /** - * @brief Function for reading WVALUE - part of SETUP packet - * - * @return the value of WVALUE on last received SETUP frame - */ - __STATIC_INLINE uint16_t nrf_usbd_setup_wvalue_get(void); - - /** - * @brief Function for reading WINDEX - part of SETUP packet - * - * @return the value of WINDEX on last received SETUP frame - */ - __STATIC_INLINE uint16_t nrf_usbd_setup_windex_get(void); - - /** - * @brief Function for reading WLENGTH - part of SETUP packet - * - * @return the value of WLENGTH on last received SETUP frame - */ - __STATIC_INLINE uint16_t nrf_usbd_setup_wlength_get(void); -/** @} */ - -/** - * @brief Function for getting number of received bytes on selected endpoint - * - * @param ep Endpoint identifier. - * - * @return Number of received bytes. - * - * @note This function may be used on Bulk/Interrupt and Isochronous endpoints. - * @note For the function that returns different value for ISOOUT zero transfer or no transfer at all, - * see @ref nrf_usbd_episoout_size_get function. This function would return 0 for both cases. - */ -__STATIC_INLINE size_t nrf_usbd_epout_size_get(uint8_t ep); - -/** - * @brief Function for getting number of received bytes on isochronous endpoint. - * - * @param ep Endpoint identifier, has to be isochronous out endpoint. - * - * @return Number of bytes received or @ref NRF_USBD_EPISOOUT_NO_DATA - */ -__STATIC_INLINE size_t nrf_usbd_episoout_size_get(uint8_t ep); - -/** - * @brief Function for clearing out endpoint to accept any new incoming traffic - * - * @param ep ep Endpoint identifier. Only OUT Interrupt/Bulk endpoints are accepted. - */ -__STATIC_INLINE void nrf_usbd_epout_clear(uint8_t ep); - -/** - * @brief Function for enabling USB pullup - */ -__STATIC_INLINE void nrf_usbd_pullup_enable(void); - -/** - * @brief Function for disabling USB pullup - */ -__STATIC_INLINE void nrf_usbd_pullup_disable(void); - -/** - * @brief Function for returning current USB pullup state - * - * @retval true USB pullup is enabled - * @retval false USB pullup is disabled - */ -__STATIC_INLINE bool nrf_usbd_pullup_check(void); - -/** - * @brief Function for configuring the value to be forced on the bus on DRIVEDPDM task - * - * Selected state would be forced on the bus when @ref NRF_USBD_TASK_DRIVEDPDM is set. - * The state would be removed from the bus on @ref NRF_USBD_TASK_NODRIVEDPDM and - * the control would be returned to the USBD peripheral. - * @param val State to be set - */ -__STATIC_INLINE void nrf_usbd_dpdmvalue_set(nrf_usbd_dpdmvalue_t val); - -/** - * @brief Function for setting data toggle - * - * Configuration of current state of data toggling - * @param ep Endpoint number with the information about its direction - * @param op Operation to execute - */ -__STATIC_INLINE void nrf_usbd_dtoggle_set(uint8_t ep, nrf_usbd_dtoggle_t op); - -/** - * @brief Function for getting data toggle - * - * Get the current state of data toggling - * @param ep Endpoint number to return the information about current data toggling - * @retval NRF_USBD_DTOGGLE_DATA0 Data toggle is DATA0 on selected endpoint - * @retval NRF_USBD_DTOGGLE_DATA1 Data toggle is DATA1 on selected endpoint - */ -__STATIC_INLINE nrf_usbd_dtoggle_t nrf_usbd_dtoggle_get(uint8_t ep); - -/** - * @brief Function for checking if endpoint is enabled - * - * @param ep Endpoint id to check - * - * @retval true Endpoint is enabled - * @retval false Endpoint is disabled - */ -__STATIC_INLINE bool nrf_usbd_ep_enable_check(uint8_t ep); - -/** - * @brief Function for enabling selected endpoint - * - * Enabled endpoint responds for the tokens on the USB bus - * - * @param ep Endpoint id to enable - */ -__STATIC_INLINE void nrf_usbd_ep_enable(uint8_t ep); - -/** - * @brief Function for disabling selected endpoint - * - * Disabled endpoint does not respond for the tokens on the USB bus - * - * @param ep Endpoint id to disable - */ -__STATIC_INLINE void nrf_usbd_ep_disable(uint8_t ep); - -/** - * @brief Function for disabling all endpoints - * - * Auxiliary function to simply disable all aviable endpoints. - * It lefts only EP0 IN and OUT enabled. - */ -__STATIC_INLINE void nrf_usbd_ep_all_disable(void); - -/** - * @brief Function for stalling selected endpoint - * - * @param ep Endpoint identifier - * @note This function cannot be called on isochronous endpoint - */ -__STATIC_INLINE void nrf_usbd_ep_stall(uint8_t ep); - -/** - * @brief Function for unstalling selected endpoint - * - * @param ep Endpoint identifier - * @note This function cannot be called on isochronous endpoint - */ -__STATIC_INLINE void nrf_usbd_ep_unstall(uint8_t ep); - -/** - * @brief Function for configuration of isochronous buffer splitting - * - * Configure isochronous buffer splitting between IN and OUT endpoints. - * - * @param split Required configuration - */ -__STATIC_INLINE void nrf_usbd_isosplit_set(nrf_usbd_isosplit_t split); - -/** - * @brief Function for getting the isochronous buffer splitting configuration - * - * Get the current isochronous buffer splitting configuration. - * - * @return Current configuration - */ -__STATIC_INLINE nrf_usbd_isosplit_t nrf_usbd_isosplit_get(void); - -/** - * @brief Function for getting current frame counter - * - * @return Current frame counter - */ -__STATIC_INLINE uint32_t nrf_usbd_framecntr_get(void); - -/** - * @brief Function for entering into low power mode - * - * After this function is called the clock source from the USBD is disconnected internally. - * After this function is called most of the USBD registers cannot be accessed anymore. - * - * @sa nrf_usbd_lowpower_disable - * @sa nrf_usbd_lowpower_check - */ -__STATIC_INLINE void nrf_usbd_lowpower_enable(void); - -/** - * @brief Function for exiting from low power mode - * - * After this function is called the clock source for the USBD is connected internally. - * The @ref NRF_USBD_EVENTCAUSE_WUREQ_MASK event would be generated and - * then the USBD registers may be accessed. - * - * @sa nrf_usbd_lowpower_enable - * @sa nrf_usbd_lowpower_check - */ -__STATIC_INLINE void nrf_usbd_lowpower_disable(void); - -/** - * @brief Function for checking the state of the low power mode - * - * @retval true USBD is in low power mode - * @retval false USBD is not in low power mode - */ -__STATIC_INLINE bool nrf_usbd_lowpower_check(void); - -/** - * @brief Function for configuring EasyDMA channel - * - * Configures EasyDMA for the transfer. - * - * @param ep Endpoint identifier (with direction) - * @param ptr Pointer to the data - * @param maxcnt Number of bytes to transfer - */ -__STATIC_INLINE void nrf_usbd_ep_easydma_set(uint8_t ep, uint32_t ptr, uint32_t maxcnt); - -/** - * @brief Function for getting number of transferred bytes - * - * Get number of transferred bytes in the last transaction - * - * @param ep Endpoint identifier - * - * @return The content of the AMOUNT register - */ -__STATIC_INLINE uint32_t nrf_usbd_ep_amount_get(uint8_t ep); - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -void nrf_usbd_enable(void) -{ -#ifdef NRF_FPGA_IMPLEMENTATION - *(volatile uint32_t *)0x400005F4 = 3; - __ISB(); - __DSB(); - *(volatile uint32_t *)0x400005F0 = 3; - __ISB(); - __DSB(); -#endif - - NRF_USBD->ENABLE = USBD_ENABLE_ENABLE_Enabled << USBD_ENABLE_ENABLE_Pos; - __ISB(); - __DSB(); -} - -void nrf_usbd_disable(void) -{ - NRF_USBD->ENABLE = USBD_ENABLE_ENABLE_Disabled << USBD_ENABLE_ENABLE_Pos; - __ISB(); - __DSB(); -} - -uint32_t nrf_usbd_eventcause_get(void) -{ - return NRF_USBD->EVENTCAUSE; -} - -void nrf_usbd_eventcause_clear(uint32_t flags) -{ - NRF_USBD->EVENTCAUSE = flags; - __ISB(); - __DSB(); -} - -uint32_t nrf_usbd_eventcause_get_and_clear(void) -{ - uint32_t ret; - ret = nrf_usbd_eventcause_get(); - nrf_usbd_eventcause_clear(ret); - __ISB(); - __DSB(); - return ret; -} - -nrf_usbd_busstate_t nrf_usbd_busstate_get(void) -{ - return (nrf_usbd_busstate_t)(NRF_USBD->BUSSTATE); -} - -uint32_t nrf_usbd_haltedep(uint8_t ep) -{ - uint8_t epnr = NRF_USBD_EP_NR_GET(ep); - if (NRF_USBD_EPIN_CHECK(ep)) - { - ASSERT(epnr < ARRAY_SIZE(NRF_USBD->HALTED.EPIN)); - return NRF_USBD->HALTED.EPIN[epnr]; - } - else - { - ASSERT(epnr < ARRAY_SIZE(NRF_USBD->HALTED.EPOUT)); - return NRF_USBD->HALTED.EPOUT[epnr]; - } -} - -bool nrf_usbd_ep_is_stall(uint8_t ep) -{ - if (NRF_USBD_EPISO_CHECK(ep)) - return false; - return USBD_HALTED_EPOUT_GETSTATUS_Halted == nrf_usbd_haltedep(ep); -} - -uint32_t nrf_usbd_epstatus_get(void) -{ - return NRF_USBD->EPSTATUS; -} - -void nrf_usbd_epstatus_clear(uint32_t flags) -{ - NRF_USBD->EPSTATUS = flags; - __ISB(); - __DSB(); -} - -uint32_t nrf_usbd_epstatus_get_and_clear(void) -{ - uint32_t ret; - ret = nrf_usbd_epstatus_get(); - nrf_usbd_epstatus_clear(ret); - return ret; -} - -uint32_t nrf_usbd_epdatastatus_get(void) -{ - return NRF_USBD->EPDATASTATUS; -} - -void nrf_usbd_epdatastatus_clear(uint32_t flags) -{ - NRF_USBD->EPDATASTATUS = flags; - __ISB(); - __DSB(); -} - -uint32_t nrf_usbd_epdatastatus_get_and_clear(void) -{ - uint32_t ret; - ret = nrf_usbd_epdatastatus_get(); - nrf_usbd_epdatastatus_clear(ret); - __ISB(); - __DSB(); - return ret; -} - -uint8_t nrf_usbd_setup_bmrequesttype_get(void) -{ - return (uint8_t)(NRF_USBD->BMREQUESTTYPE); -} - -uint8_t nrf_usbd_setup_brequest_get(void) -{ - return (uint8_t)(NRF_USBD->BREQUEST); -} - -uint16_t nrf_usbd_setup_wvalue_get(void) -{ - const uint16_t val = NRF_USBD->WVALUEL; - return (uint16_t)(val | ((NRF_USBD->WVALUEH) << 8)); -} - -uint16_t nrf_usbd_setup_windex_get(void) -{ - const uint16_t val = NRF_USBD->WINDEXL; - return (uint16_t)(val | ((NRF_USBD->WINDEXH) << 8)); -} - -uint16_t nrf_usbd_setup_wlength_get(void) -{ - const uint16_t val = NRF_USBD->WLENGTHL; - return (uint16_t)(val | ((NRF_USBD->WLENGTHH) << 8)); -} - -size_t nrf_usbd_epout_size_get(uint8_t ep) -{ - ASSERT(NRF_USBD_EP_VALIDATE(ep)); - ASSERT(NRF_USBD_EPOUT_CHECK(ep)); - if (NRF_USBD_EPISO_CHECK(ep)) - { - size_t size_isoout = NRF_USBD->SIZE.ISOOUT; - if ((size_isoout & USBD_SIZE_ISOOUT_ZERO_Msk) == (USBD_SIZE_ISOOUT_ZERO_ZeroData << USBD_SIZE_ISOOUT_ZERO_Pos)) - { - size_isoout = 0; - } - return size_isoout; - } - - ASSERT(NRF_USBD_EP_NR_GET(ep) < ARRAY_SIZE(NRF_USBD->SIZE.EPOUT)); - return NRF_USBD->SIZE.EPOUT[NRF_USBD_EP_NR_GET(ep)]; -} - -size_t nrf_usbd_episoout_size_get(uint8_t ep) -{ - ASSERT(NRF_USBD_EP_VALIDATE(ep)); - ASSERT(NRF_USBD_EPOUT_CHECK(ep)); - ASSERT(NRF_USBD_EPISO_CHECK(ep)); - - size_t size_isoout = NRF_USBD->SIZE.ISOOUT; - if (size_isoout == 0) - { - size_isoout = NRF_USBD_EPISOOUT_NO_DATA; - } - else if ((size_isoout & USBD_SIZE_ISOOUT_ZERO_Msk) == (USBD_SIZE_ISOOUT_ZERO_ZeroData << USBD_SIZE_ISOOUT_ZERO_Pos)) - { - size_isoout = 0; - } - return size_isoout; -} - -void nrf_usbd_epout_clear(uint8_t ep) -{ - ASSERT(NRF_USBD_EPOUT_CHECK(ep) && (NRF_USBD_EP_NR_GET(ep) < ARRAY_SIZE(NRF_USBD->SIZE.EPOUT))); - NRF_USBD->SIZE.EPOUT[NRF_USBD_EP_NR_GET(ep)] = 0; - __ISB(); - __DSB(); -} - -void nrf_usbd_pullup_enable(void) -{ - NRF_USBD->USBPULLUP = USBD_USBPULLUP_CONNECT_Enabled << USBD_USBPULLUP_CONNECT_Pos; - __ISB(); - __DSB(); -} - -void nrf_usbd_pullup_disable(void) -{ - NRF_USBD->USBPULLUP = USBD_USBPULLUP_CONNECT_Disabled << USBD_USBPULLUP_CONNECT_Pos; - __ISB(); - __DSB(); -} - -bool nrf_usbd_pullup_check(void) -{ - return NRF_USBD->USBPULLUP == (USBD_USBPULLUP_CONNECT_Enabled << USBD_USBPULLUP_CONNECT_Pos); -} - -void nrf_usbd_dpdmvalue_set(nrf_usbd_dpdmvalue_t val) -{ - NRF_USBD->DPDMVALUE = ((uint32_t)val) << USBD_DPDMVALUE_STATE_Pos; -} - -void nrf_usbd_dtoggle_set(uint8_t ep, nrf_usbd_dtoggle_t op) -{ - ASSERT(NRF_USBD_EP_VALIDATE(ep)); - ASSERT(!NRF_USBD_EPISO_CHECK(ep)); - NRF_USBD->DTOGGLE = ep | (NRF_USBD_DTOGGLE_NOP << USBD_DTOGGLE_VALUE_Pos); - __DSB(); - NRF_USBD->DTOGGLE = ep | (op << USBD_DTOGGLE_VALUE_Pos); - __ISB(); - __DSB(); -} - -nrf_usbd_dtoggle_t nrf_usbd_dtoggle_get(uint8_t ep) -{ - uint32_t retval; - /* Select the endpoint to read */ - NRF_USBD->DTOGGLE = ep | (NRF_USBD_DTOGGLE_NOP << USBD_DTOGGLE_VALUE_Pos); - retval = ((NRF_USBD->DTOGGLE) & USBD_DTOGGLE_VALUE_Msk) >> USBD_DTOGGLE_VALUE_Pos; - return (nrf_usbd_dtoggle_t)retval; -} - -bool nrf_usbd_ep_enable_check(uint8_t ep) -{ - ASSERT(NRF_USBD_EP_VALIDATE(ep)); - uint8_t epnr = NRF_USBD_EP_NR_GET(ep); - - if (NRF_USBD_EPIN_CHECK(ep)) - { - return 0 != (NRF_USBD->EPINEN & (1UL << epnr)); - } - else - { - return 0 != (NRF_USBD->EPOUTEN & (1UL << epnr)); - } -} - -void nrf_usbd_ep_enable(uint8_t ep) -{ - ASSERT(NRF_USBD_EP_VALIDATE(ep)); - uint8_t epnr = NRF_USBD_EP_NR_GET(ep); - - if (NRF_USBD_EPIN_CHECK(ep)) - { - NRF_USBD->EPINEN |= 1UL << epnr; - } - else - { - NRF_USBD->EPOUTEN |= 1UL << epnr; - } - __ISB(); - __DSB(); -} - -void nrf_usbd_ep_disable(uint8_t ep) -{ - ASSERT(NRF_USBD_EP_VALIDATE(ep)); - uint8_t epnr = NRF_USBD_EP_NR_GET(ep); - - if (NRF_USBD_EPIN_CHECK(ep)) - { - NRF_USBD->EPINEN &= ~(1UL << epnr); - } - else - { - NRF_USBD->EPOUTEN &= ~(1UL << epnr); - } - __ISB(); - __DSB(); -} - -void nrf_usbd_ep_all_disable(void) -{ - NRF_USBD->EPINEN = USBD_EPINEN_IN0_Enable << USBD_EPINEN_IN0_Pos; - NRF_USBD->EPOUTEN = USBD_EPOUTEN_OUT0_Enable << USBD_EPOUTEN_OUT0_Pos; - __ISB(); - __DSB(); -} - -void nrf_usbd_ep_stall(uint8_t ep) -{ - ASSERT(!NRF_USBD_EPISO_CHECK(ep)); - NRF_USBD->EPSTALL = (USBD_EPSTALL_STALL_Stall << USBD_EPSTALL_STALL_Pos) | ep; - __ISB(); - __DSB(); -} - -void nrf_usbd_ep_unstall(uint8_t ep) -{ - ASSERT(!NRF_USBD_EPISO_CHECK(ep)); - NRF_USBD->EPSTALL = (USBD_EPSTALL_STALL_UnStall << USBD_EPSTALL_STALL_Pos) | ep; - __ISB(); - __DSB(); -} - -void nrf_usbd_isosplit_set(nrf_usbd_isosplit_t split) -{ - NRF_USBD->ISOSPLIT = split << USBD_ISOSPLIT_SPLIT_Pos; -} - -nrf_usbd_isosplit_t nrf_usbd_isosplit_get(void) -{ - return (nrf_usbd_isosplit_t) - (((NRF_USBD->ISOSPLIT) & USBD_ISOSPLIT_SPLIT_Msk) >> USBD_ISOSPLIT_SPLIT_Pos); -} - -uint32_t nrf_usbd_framecntr_get(void) -{ - return NRF_USBD->FRAMECNTR; -} - -void nrf_usbd_lowpower_enable(void) -{ - NRF_USBD->LOWPOWER = USBD_LOWPOWER_LOWPOWER_LowPower << USBD_LOWPOWER_LOWPOWER_Pos; -} - -void nrf_usbd_lowpower_disable(void) -{ - NRF_USBD->LOWPOWER = USBD_LOWPOWER_LOWPOWER_ForceNormal << USBD_LOWPOWER_LOWPOWER_Pos; -} - -bool nrf_usbd_lowpower_check(void) -{ - return (NRF_USBD->LOWPOWER != (USBD_LOWPOWER_LOWPOWER_ForceNormal << USBD_LOWPOWER_LOWPOWER_Pos)); -} - - -void nrf_usbd_ep_easydma_set(uint8_t ep, uint32_t ptr, uint32_t maxcnt) -{ - if (NRF_USBD_EPIN_CHECK(ep)) - { - if (NRF_USBD_EPISO_CHECK(ep)) - { - NRF_USBD->ISOIN.PTR = ptr; - NRF_USBD->ISOIN.MAXCNT = maxcnt; - } - else - { - uint8_t epnr = NRF_USBD_EP_NR_GET(ep); - ASSERT(epnr < ARRAY_SIZE(NRF_USBD->EPIN)); - NRF_USBD->EPIN[epnr].PTR = ptr; - NRF_USBD->EPIN[epnr].MAXCNT = maxcnt; - } - } - else - { - if (NRF_USBD_EPISO_CHECK(ep)) - { - NRF_USBD->ISOOUT.PTR = ptr; - NRF_USBD->ISOOUT.MAXCNT = maxcnt; - } - else - { - uint8_t epnr = NRF_USBD_EP_NR_GET(ep); - ASSERT(epnr < ARRAY_SIZE(NRF_USBD->EPOUT)); - NRF_USBD->EPOUT[epnr].PTR = ptr; - NRF_USBD->EPOUT[epnr].MAXCNT = maxcnt; - } - } -} - -uint32_t nrf_usbd_ep_amount_get(uint8_t ep) -{ - uint32_t ret; - - if (NRF_USBD_EPIN_CHECK(ep)) - { - if (NRF_USBD_EPISO_CHECK(ep)) - { - ret = NRF_USBD->ISOIN.AMOUNT; - } - else - { - uint8_t epnr = NRF_USBD_EP_NR_GET(ep); - ASSERT(epnr < ARRAY_SIZE(NRF_USBD->EPOUT)); - ret = NRF_USBD->EPIN[epnr].AMOUNT; - } - } - else - { - if (NRF_USBD_EPISO_CHECK(ep)) - { - ret = NRF_USBD->ISOOUT.AMOUNT; - } - else - { - uint8_t epnr = NRF_USBD_EP_NR_GET(ep); - ASSERT(epnr < ARRAY_SIZE(NRF_USBD->EPOUT)); - ret = NRF_USBD->EPOUT[epnr].AMOUNT; - } - } - - return ret; -} - -#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ - -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_USBD_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_wdt.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_wdt.h deleted file mode 100644 index d497fc24646..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/hal/nrf_wdt.h +++ /dev/null @@ -1,339 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @defgroup nrf_wdt_hal WDT HAL - * @{ - * @ingroup nrf_wdt - * - * @brief Hardware access layer for accessing the watchdog timer (WDT) peripheral. - */ - -#ifndef NRF_WDT_H__ -#define NRF_WDT_H__ - -#include -#include -#include - -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#define NRF_WDT_CHANNEL_NUMBER 0x8UL -#define NRF_WDT_RR_VALUE 0x6E524635UL /* Fixed value, shouldn't be modified.*/ - -#define NRF_WDT_TASK_SET 1UL -#define NRF_WDT_EVENT_CLEAR 0UL - -/** - * @enum nrf_wdt_task_t - * @brief WDT tasks. - */ -typedef enum -{ - /*lint -save -e30 -esym(628,__INTADDR__)*/ - NRF_WDT_TASK_START = offsetof(NRF_WDT_Type, TASKS_START), /**< Task for starting WDT. */ - /*lint -restore*/ -} nrf_wdt_task_t; - -/** - * @enum nrf_wdt_event_t - * @brief WDT events. - */ -typedef enum -{ - /*lint -save -e30*/ - NRF_WDT_EVENT_TIMEOUT = offsetof(NRF_WDT_Type, EVENTS_TIMEOUT), /**< Event from WDT time-out. */ - /*lint -restore*/ -} nrf_wdt_event_t; - -/** - * @enum nrf_wdt_behaviour_t - * @brief WDT behavior in CPU SLEEP or HALT mode. - */ -typedef enum -{ - NRF_WDT_BEHAVIOUR_RUN_SLEEP = WDT_CONFIG_SLEEP_Msk, /**< WDT will run when CPU is in SLEEP mode. */ - NRF_WDT_BEHAVIOUR_RUN_HALT = WDT_CONFIG_HALT_Msk, /**< WDT will run when CPU is in HALT mode. */ - NRF_WDT_BEHAVIOUR_RUN_SLEEP_HALT = WDT_CONFIG_SLEEP_Msk | WDT_CONFIG_HALT_Msk, /**< WDT will run when CPU is in SLEEP or HALT mode. */ - NRF_WDT_BEHAVIOUR_PAUSE_SLEEP_HALT = 0, /**< WDT will be paused when CPU is in SLEEP or HALT mode. */ -} nrf_wdt_behaviour_t; - -/** - * @enum nrf_wdt_rr_register_t - * @brief WDT reload request registers. - */ -typedef enum -{ - NRF_WDT_RR0 = 0, /**< Reload request register 0. */ - NRF_WDT_RR1, /**< Reload request register 1. */ - NRF_WDT_RR2, /**< Reload request register 2. */ - NRF_WDT_RR3, /**< Reload request register 3. */ - NRF_WDT_RR4, /**< Reload request register 4. */ - NRF_WDT_RR5, /**< Reload request register 5. */ - NRF_WDT_RR6, /**< Reload request register 6. */ - NRF_WDT_RR7 /**< Reload request register 7. */ -} nrf_wdt_rr_register_t; - -/** - * @enum nrf_wdt_int_mask_t - * @brief WDT interrupts. - */ -typedef enum -{ - NRF_WDT_INT_TIMEOUT_MASK = WDT_INTENSET_TIMEOUT_Msk, /**< WDT interrupt from time-out event. */ -} nrf_wdt_int_mask_t; - -/** - * @brief Function for configuring the watchdog behavior when the CPU is sleeping or halted. - * - * @param behaviour Watchdog behavior when CPU is in SLEEP or HALT mode. - */ -__STATIC_INLINE void nrf_wdt_behaviour_set(nrf_wdt_behaviour_t behaviour) -{ - NRF_WDT->CONFIG = behaviour; -} - - -/** - * @brief Function for starting the watchdog. - * - * @param[in] task Task. - */ -__STATIC_INLINE void nrf_wdt_task_trigger(nrf_wdt_task_t task) -{ - *((volatile uint32_t *)((uint8_t *)NRF_WDT + task)) = NRF_WDT_TASK_SET; -} - - -/** - * @brief Function for clearing the WDT event. - * - * @param[in] event Event. - */ -__STATIC_INLINE void nrf_wdt_event_clear(nrf_wdt_event_t event) -{ - *((volatile uint32_t *)((uint8_t *)NRF_WDT + (uint32_t)event)) = NRF_WDT_EVENT_CLEAR; -#if __CORTEX_M == 0x04 - volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_WDT + (uint32_t)event)); - (void)dummy; -#endif -} - - -/** - * @brief Function for retrieving the state of the WDT event. - * - * @param[in] event Event. - * - * @retval true If the event is set. - * @retval false If the event is not set. - */ -__STATIC_INLINE bool nrf_wdt_event_check(nrf_wdt_event_t event) -{ - return (bool)*((volatile uint32_t *)((uint8_t *)NRF_WDT + event)); -} - - -/** - * @brief Function for enabling a specific interrupt. - * - * @param[in] int_mask Interrupt. - */ -__STATIC_INLINE void nrf_wdt_int_enable(uint32_t int_mask) -{ - NRF_WDT->INTENSET = int_mask; -} - - -/** - * @brief Function for retrieving the state of given interrupt. - * - * @param[in] int_mask Interrupt. - * - * @retval true Interrupt is enabled. - * @retval false Interrupt is not enabled. - */ -__STATIC_INLINE bool nrf_wdt_int_enable_check(uint32_t int_mask) -{ - return (bool)(NRF_WDT->INTENSET & int_mask); -} - - -/** - * @brief Function for disabling a specific interrupt. - * - * @param[in] int_mask Interrupt. - */ -__STATIC_INLINE void nrf_wdt_int_disable(uint32_t int_mask) -{ - NRF_WDT->INTENCLR = int_mask; -} - - -/** - * @brief Function for returning the address of a specific WDT task register. - * - * @param[in] task Task. - */ -__STATIC_INLINE uint32_t nrf_wdt_task_address_get(nrf_wdt_task_t task) -{ - return ((uint32_t)NRF_WDT + task); -} - - -/** - * @brief Function for returning the address of a specific WDT event register. - * - * @param[in] event Event. - * - * @retval address of requested event register - */ -__STATIC_INLINE uint32_t nrf_wdt_event_address_get(nrf_wdt_event_t event) -{ - return ((uint32_t)NRF_WDT + event); -} - - -/** - * @brief Function for retrieving the watchdog status. - * - * @retval true If the watchdog is started. - * @retval false If the watchdog is not started. - */ -__STATIC_INLINE bool nrf_wdt_started(void) -{ - return (bool)(NRF_WDT->RUNSTATUS); -} - - -/** - * @brief Function for retrieving the watchdog reload request status. - * - * @param[in] rr_register Reload request register to check. - * - * @retval true If a reload request is running. - * @retval false If no reload request is running. - */ -__STATIC_INLINE bool nrf_wdt_request_status(nrf_wdt_rr_register_t rr_register) -{ - return (bool)(((NRF_WDT->REQSTATUS) >> rr_register) & 0x1UL); -} - - -/** - * @brief Function for setting the watchdog reload value. - * - * @param[in] reload_value Watchdog counter initial value. - */ -__STATIC_INLINE void nrf_wdt_reload_value_set(uint32_t reload_value) -{ - NRF_WDT->CRV = reload_value; -} - - -/** - * @brief Function for retrieving the watchdog reload value. - * - * @retval Reload value. - */ -__STATIC_INLINE uint32_t nrf_wdt_reload_value_get(void) -{ - return (uint32_t)NRF_WDT->CRV; -} - - -/** - * @brief Function for enabling a specific reload request register. - * - * @param[in] rr_register Reload request register to enable. - */ -__STATIC_INLINE void nrf_wdt_reload_request_enable(nrf_wdt_rr_register_t rr_register) -{ - NRF_WDT->RREN |= 0x1UL << rr_register; -} - - -/** - * @brief Function for disabling a specific reload request register. - * - * @param[in] rr_register Reload request register to disable. - */ -__STATIC_INLINE void nrf_wdt_reload_request_disable(nrf_wdt_rr_register_t rr_register) -{ - NRF_WDT->RREN &= ~(0x1UL << rr_register); -} - - -/** - * @brief Function for retrieving the status of a specific reload request register. - * - * @param[in] rr_register Reload request register to check. - * - * @retval true If the reload request register is enabled. - * @retval false If the reload request register is not enabled. - */ -__STATIC_INLINE bool nrf_wdt_reload_request_is_enabled(nrf_wdt_rr_register_t rr_register) -{ - return (bool)(NRF_WDT->RREN & (0x1UL << rr_register)); -} - - -/** - * @brief Function for setting a specific reload request register. - * - * @param[in] rr_register Reload request register to set. - */ -__STATIC_INLINE void nrf_wdt_reload_request_set(nrf_wdt_rr_register_t rr_register) -{ - NRF_WDT->RR[rr_register] = NRF_WDT_RR_VALUE; -} - - - -#ifdef __cplusplus -} -#endif - -#endif - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/i2s/nrf_drv_i2s.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/i2s/nrf_drv_i2s.c deleted file mode 100644 index ba4fe016c50..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/i2s/nrf_drv_i2s.c +++ /dev/null @@ -1,446 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(I2S) -#include "nrf_drv_i2s.h" -#include "nrf_drv_common.h" -#include "nrf_gpio.h" -#include "nrf_assert.h" -#include "app_util_platform.h" - -#define NRF_LOG_MODULE_NAME i2s - -#if I2S_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL I2S_CONFIG_LOG_LEVEL -#define NRF_LOG_INFO_COLOR I2S_CONFIG_INFO_COLOR -#define NRF_LOG_DEBUG_COLOR I2S_CONFIG_DEBUG_COLOR -#define EVT_TO_STR(event) (event == NRF_I2S_EVENT_RXPTRUPD ? "NRF_I2S_EVENT_RXPTRUPD" : \ - (event == NRF_I2S_EVENT_TXPTRUPD ? "NRF_I2S_EVENT_TXPTRUPD" : \ - (event == NRF_I2S_EVENT_STOPPED ? "NRF_I2S_EVENT_STOPPED" : "UNKNOWN EVENT"))) -#else //I2S_CONFIG_LOG_ENABLED -#define EVT_TO_STR(event) "" -#define NRF_LOG_LEVEL 0 -#endif //I2S_CONFIG_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - -#define MODULE_INITIALIZED (m_cb.state == NRF_DRV_STATE_INITIALIZED) /**< Macro designating whether the module has been initialized properly. */ - -// Control block - driver instance local data. -typedef struct -{ - nrf_drv_i2s_data_handler_t handler; - nrf_drv_state_t state; - - bool synchronized_mode : 1; - bool rx_ready : 1; - bool tx_ready : 1; - bool just_started : 1; - uint16_t buffer_half_size; - uint32_t * p_rx_buffer; - uint32_t * p_tx_buffer; -} i2s_control_block_t; -static i2s_control_block_t m_cb; - - -static nrf_drv_i2s_config_t const m_default_config = NRF_DRV_I2S_DEFAULT_CONFIG; - - -static void configure_pins(nrf_drv_i2s_config_t const * p_config) -{ - uint32_t mck_pin, sdout_pin, sdin_pin; - - // Configure pins used by the peripheral: - - // - SCK and LRCK (required) - depending on the mode of operation these - // pins are configured as outputs (in Master mode) or inputs (in Slave - // mode). - if (p_config->mode == NRF_I2S_MODE_MASTER) - { - nrf_gpio_cfg_output(p_config->sck_pin); - nrf_gpio_cfg_output(p_config->lrck_pin); - } - else - { - nrf_gpio_cfg_input(p_config->sck_pin, NRF_GPIO_PIN_NOPULL); - nrf_gpio_cfg_input(p_config->lrck_pin, NRF_GPIO_PIN_NOPULL); - } - - // - MCK (optional) - always output, - if (p_config->mck_pin != NRF_DRV_I2S_PIN_NOT_USED) - { - mck_pin = p_config->mck_pin; - nrf_gpio_cfg_output(mck_pin); - } - else - { - mck_pin = NRF_I2S_PIN_NOT_CONNECTED; - } - - // - SDOUT (optional) - always output, - if (p_config->sdout_pin != NRF_DRV_I2S_PIN_NOT_USED) - { - sdout_pin = p_config->sdout_pin; - nrf_gpio_cfg_output(sdout_pin); - } - else - { - sdout_pin = NRF_I2S_PIN_NOT_CONNECTED; - } - - // - SDIN (optional) - always input. - if (p_config->sdin_pin != NRF_DRV_I2S_PIN_NOT_USED) - { - sdin_pin = p_config->sdin_pin; - nrf_gpio_cfg_input(sdin_pin, NRF_GPIO_PIN_NOPULL); - } - else - { - sdin_pin = NRF_I2S_PIN_NOT_CONNECTED; - } - - nrf_i2s_pins_set(NRF_I2S, p_config->sck_pin, p_config->lrck_pin, - mck_pin, sdout_pin, sdin_pin); -} - - -ret_code_t nrf_drv_i2s_init(nrf_drv_i2s_config_t const * p_config, - nrf_drv_i2s_data_handler_t handler) -{ - ASSERT(handler); - - ret_code_t err_code; - - if (m_cb.state != NRF_DRV_STATE_UNINITIALIZED) - { - err_code = NRF_ERROR_INVALID_STATE; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - if (p_config == NULL) - { - p_config = &m_default_config; - } - - if (!nrf_i2s_configure(NRF_I2S, p_config->mode, - p_config->format, - p_config->alignment, - p_config->sample_width, - p_config->channels, - p_config->mck_setup, - p_config->ratio)) - { - err_code = NRF_ERROR_INVALID_PARAM; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - configure_pins(p_config); - - m_cb.handler = handler; - - nrf_drv_common_irq_enable(I2S_IRQn, p_config->irq_priority); - - m_cb.state = NRF_DRV_STATE_INITIALIZED; - - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", - (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -void nrf_drv_i2s_uninit(void) -{ - ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED); - - nrf_drv_i2s_stop(); - - nrf_drv_common_irq_disable(I2S_IRQn); - - m_cb.state = NRF_DRV_STATE_UNINITIALIZED; - NRF_LOG_INFO("Uninitialized."); -} - - -ret_code_t nrf_drv_i2s_start(uint32_t * p_rx_buffer, - uint32_t * p_tx_buffer, - uint16_t buffer_size, - uint8_t flags) -{ - ASSERT((p_rx_buffer != NULL) || (p_tx_buffer != NULL)); - - uint16_t buffer_half_size = buffer_size / 2; - ASSERT(buffer_half_size != 0); - - VERIFY_MODULE_INITIALIZED(); - - ret_code_t err_code; - - if ((p_rx_buffer != NULL) && !nrf_drv_is_in_RAM(p_rx_buffer)) - { - err_code = NRF_ERROR_INVALID_ADDR; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - if ((p_tx_buffer != NULL) && !nrf_drv_is_in_RAM(p_tx_buffer)) - { - err_code = NRF_ERROR_INVALID_ADDR; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - // Initially we set up the peripheral to use the first half of each buffer, - // then in 'I2S_IRQHandler' we will switch to the second half. - nrf_i2s_transfer_set(NRF_I2S, buffer_half_size, p_rx_buffer, p_tx_buffer); - - m_cb.p_rx_buffer = p_rx_buffer; - m_cb.p_tx_buffer = p_tx_buffer; - m_cb.buffer_half_size = buffer_half_size; - m_cb.just_started = true; - - if ((flags & NRF_DRV_I2S_FLAG_SYNCHRONIZED_MODE) && - // [synchronized mode makes sense only when both RX and TX are enabled] - (m_cb.p_rx_buffer != NULL) && (m_cb.p_tx_buffer != NULL)) - { - m_cb.synchronized_mode = true; - m_cb.rx_ready = false; - m_cb.tx_ready = false; - } - else - { - m_cb.synchronized_mode = false; - } - - nrf_i2s_enable(NRF_I2S); - - m_cb.state = NRF_DRV_STATE_POWERED_ON; - - if (m_cb.p_tx_buffer != NULL) - { - // Get from the application the first portion of data to be sent - we - // need to have it in the transmit buffer before we start the transfer. - // Unless the synchronized mode is active. In this mode we must wait - // with this until the first portion of data is received, so here we - // just make sure that there will be silence on the SDOUT line prior - // to that moment. - if (m_cb.synchronized_mode) - { - memset(m_cb.p_tx_buffer, 0, - m_cb.buffer_half_size * sizeof(uint32_t)); - } - else - { - m_cb.handler(NULL, m_cb.p_tx_buffer, m_cb.buffer_half_size); - } - } - - nrf_i2s_event_clear(NRF_I2S, NRF_I2S_EVENT_RXPTRUPD); - nrf_i2s_event_clear(NRF_I2S, NRF_I2S_EVENT_TXPTRUPD); - nrf_i2s_int_enable(NRF_I2S, - NRF_I2S_INT_RXPTRUPD_MASK | NRF_I2S_INT_TXPTRUPD_MASK); - nrf_i2s_task_trigger(NRF_I2S, NRF_I2S_TASK_START); - - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", - (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -void nrf_drv_i2s_stop(void) -{ - ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED); - - // First disable interrupts, then trigger the STOP task, so no spurious - // RXPTRUPD and TXPTRUPD events (see FTPAN-55) will be processed. - nrf_i2s_int_disable(NRF_I2S, - NRF_I2S_INT_RXPTRUPD_MASK | NRF_I2S_INT_TXPTRUPD_MASK); - - nrf_i2s_task_trigger(NRF_I2S, NRF_I2S_TASK_STOP); - - nrf_i2s_disable(NRF_I2S); - - m_cb.state = NRF_DRV_STATE_INITIALIZED; - - NRF_LOG_INFO("Disabled."); -} - - -void I2S_IRQHandler(void) -{ - uint32_t const * p_data_received = NULL; - uint32_t * p_data_to_send = NULL; - - if (nrf_i2s_event_check(NRF_I2S, NRF_I2S_EVENT_TXPTRUPD)) - { - nrf_i2s_event_clear(NRF_I2S, NRF_I2S_EVENT_TXPTRUPD); - NRF_LOG_DEBUG("Event: %s.", - (uint32_t)EVT_TO_STR(NRF_I2S_EVENT_TXPTRUPD)); - - // If transmission is not enabled, but for some reason the TXPTRUPD - // event has been generated, just ignore it. - if (m_cb.p_tx_buffer != NULL) - { - uint32_t * p_tx_buffer_next; - if (nrf_i2s_tx_buffer_get(NRF_I2S) == m_cb.p_tx_buffer) - { - p_tx_buffer_next = m_cb.p_tx_buffer + m_cb.buffer_half_size; - } - else - { - p_tx_buffer_next = m_cb.p_tx_buffer; - } - nrf_i2s_tx_buffer_set(NRF_I2S, p_tx_buffer_next); - - m_cb.tx_ready = true; - - // Now the part of the buffer that we've configured as "next" should - // be filled by the application with proper data to be sent; - // the peripheral is sending data from the other part of the buffer - // (but it will finish soon...). - p_data_to_send = p_tx_buffer_next; - - } - } - - if (nrf_i2s_event_check(NRF_I2S, NRF_I2S_EVENT_RXPTRUPD)) - { - nrf_i2s_event_clear(NRF_I2S, NRF_I2S_EVENT_RXPTRUPD); - NRF_LOG_DEBUG("Event: %s.", - (uint32_t)EVT_TO_STR(NRF_I2S_EVENT_RXPTRUPD)); - - // If reception is not enabled, but for some reason the RXPTRUPD event - // has been generated, just ignore it. - if (m_cb.p_rx_buffer != NULL) - { - uint32_t * p_rx_buffer_next; - if (nrf_i2s_rx_buffer_get(NRF_I2S) == m_cb.p_rx_buffer) - { - p_rx_buffer_next = m_cb.p_rx_buffer + m_cb.buffer_half_size; - } - else - { - p_rx_buffer_next = m_cb.p_rx_buffer; - } - nrf_i2s_rx_buffer_set(NRF_I2S, p_rx_buffer_next); - - m_cb.rx_ready = true; - - // The RXPTRUPD event is generated for the first time right after - // the transfer is started. Since there is no data received yet at - // this point we only update the buffer pointer (it is done above), - // there is no callback to the application. - // [for synchronized mode this has to be handled differently - - // see below] - if (m_cb.just_started && !m_cb.synchronized_mode) - { - m_cb.just_started = false; - } - else - { - // The RXPTRUPD event indicates that from now on the peripheral - // will be filling the part of the buffer that was pointed at - // the time the event has been generated, hence now we can let - // the application process the data stored in the other part of - // the buffer - the one that we've just set to be filled next. - p_data_received = p_rx_buffer_next; - } - } - } - - // Call the data handler passing received data to the application and/or - // requesting data to be sent. - if (!m_cb.synchronized_mode) - { - if ((p_data_received != NULL) || (p_data_to_send != NULL)) - { - if (p_data_received != NULL) - { - NRF_LOG_DEBUG("Rx data:"); - NRF_LOG_HEXDUMP_DEBUG(p_data_received, - m_cb.buffer_half_size * sizeof(p_data_received[0])); - } - m_cb.handler(p_data_received, p_data_to_send, - m_cb.buffer_half_size); - if (p_data_to_send != NULL) - { - NRF_LOG_DEBUG("Tx data:"); - NRF_LOG_HEXDUMP_DEBUG(p_data_to_send, - m_cb.buffer_half_size * sizeof(p_data_to_send[0])); - } - } - } - // In the synchronized mode wait until the events for both RX and TX occur. - // And ignore the initial occurrences of these events, since they only - // indicate that the transfer has started - no data is received yet at - // that moment, so we have got nothing to pass to the application. - else - { - if (m_cb.rx_ready && m_cb.tx_ready) - { - m_cb.rx_ready = false; - m_cb.tx_ready = false; - - if (m_cb.just_started) - { - m_cb.just_started = false; - } - else - { - NRF_LOG_DEBUG("Rx data:"); - NRF_LOG_HEXDUMP_DEBUG(nrf_i2s_rx_buffer_get(NRF_I2S), - m_cb.buffer_half_size * sizeof(p_data_to_send[0])); - m_cb.handler(nrf_i2s_rx_buffer_get(NRF_I2S), - nrf_i2s_tx_buffer_get(NRF_I2S), - m_cb.buffer_half_size); - NRF_LOG_DEBUG("Tx data:"); - NRF_LOG_HEXDUMP_DEBUG(nrf_i2s_tx_buffer_get(NRF_I2S), - m_cb.buffer_half_size * sizeof(p_data_to_send[0])); - } - } - } -} -#endif //NRF_MODULE_ENABLED(I2S) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/i2s/nrf_drv_i2s.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/i2s/nrf_drv_i2s.h deleted file mode 100644 index 9ed4bf742e5..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/i2s/nrf_drv_i2s.h +++ /dev/null @@ -1,255 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/**@file - * @addtogroup nrf_i2s I2S HAL and driver - * @ingroup nrf_drivers - * @brief @tagAPI52 Inter-IC Sound (I2S) interface APIs. - * - * @defgroup nrf_drv_i2s I2S driver - * @{ - * @ingroup nrf_i2s - * @brief @tagAPI52 Inter-IC Sound (I2S) interface driver. - */ - - -#ifndef NRF_DRV_I2S_H__ -#define NRF_DRV_I2S_H__ - -#include "nordic_common.h" -#include "sdk_config.h" -#include "nrf_i2s.h" -#include "sdk_errors.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -/** - * @brief This value can be provided instead of a pin number for the signals - * SDOUT, SDIN, and MCK to specify that a given signal is not used - * and therefore does not need to be connected to a pin. - */ -#define NRF_DRV_I2S_PIN_NOT_USED 0xFF - -/** - * @brief Flag indicating that calls to the data handler for RX and TX should - * be synchronized, thus always combined into one call. - * - * Use this flag when calling @ref nrf_drv_i2s_start to force a common call - * to the @ref nrf_drv_i2s_data_handler_t "data handler" for RX and TX data. - * This is useful, for example, when received data should be processed and - * then be sent back. Obviously, this flag is only applicable when both - * directions (RX and TX) are enabled. - */ -#define NRF_DRV_I2S_FLAG_SYNCHRONIZED_MODE 0x01 - -/** - * @brief I2S driver configuration structure. - */ -typedef struct -{ - uint8_t sck_pin; ///< SCK pin number. - uint8_t lrck_pin; ///< LRCK pin number. - uint8_t mck_pin; ///< MCK pin number. - /**< Optional. Use @ref NRF_DRV_I2S_PIN_NOT_USED - * if this signal is not needed. */ - uint8_t sdout_pin; ///< SDOUT pin number. - /**< Optional. Use @ref NRF_DRV_I2S_PIN_NOT_USED - * if this signal is not needed. */ - uint8_t sdin_pin; ///< SDIN pin number. - /**< Optional. Use @ref NRF_DRV_I2S_PIN_NOT_USED - * if this signal is not needed. */ - uint8_t irq_priority; ///< Interrupt priority. - - nrf_i2s_mode_t mode; ///< Mode of operation. - nrf_i2s_format_t format; ///< Frame format. - nrf_i2s_align_t alignment; ///< Alignment of sample within a frame. - nrf_i2s_swidth_t sample_width; ///< Sample width. - nrf_i2s_channels_t channels; ///< Enabled channels. - nrf_i2s_mck_t mck_setup; ///< Master clock setup. - nrf_i2s_ratio_t ratio; ///< MCK/LRCK ratio. -} nrf_drv_i2s_config_t; - -/** - * @brief I2S driver default configuration. - */ -#define NRF_DRV_I2S_DEFAULT_CONFIG \ -{ \ - .sck_pin = I2S_CONFIG_SCK_PIN, \ - .lrck_pin = I2S_CONFIG_LRCK_PIN, \ - .mck_pin = I2S_CONFIG_MCK_PIN, \ - .sdout_pin = I2S_CONFIG_SDOUT_PIN, \ - .sdin_pin = I2S_CONFIG_SDIN_PIN, \ - .irq_priority = I2S_CONFIG_IRQ_PRIORITY, \ - .mode = (nrf_i2s_mode_t)I2S_CONFIG_MASTER, \ - .format = (nrf_i2s_format_t)I2S_CONFIG_FORMAT, \ - .alignment = (nrf_i2s_align_t)I2S_CONFIG_ALIGN, \ - .sample_width = (nrf_i2s_swidth_t)I2S_CONFIG_SWIDTH, \ - .channels = (nrf_i2s_channels_t)I2S_CONFIG_CHANNELS, \ - .mck_setup = (nrf_i2s_mck_t)I2S_CONFIG_MCK_SETUP, \ - .ratio = (nrf_i2s_ratio_t)I2S_CONFIG_RATIO, \ -} - -/** - * @brief I2S driver data handler type. - * - * A data handling function of this type must be specified during initialization - * of the driver. The driver will call this function when a new portion of data - * is received or a new portion of data should be prepared for transmission. - * The first case is indicated by a non-NULL value in the @p p_data_received - * parameter (which points to the memory containing the received data). - * Similarly, the second case is indicated by a non-NULL value in the - * @p p_data_to_send parameter (which points to where the data to be transmitted - * should be placed). - * - * @note The two cases mentioned above may be indicated separately or combined - * into one call (depending on the environment in which the driver is - * used). Therefore, both parameters should be checked and handled - * properly in every call. @ref NRF_DRV_I2S_FLAG_SYNCHRONIZED_MODE - * "Synchronized mode" can be used to always combine these indications. - * - * @param[in] p_data_received Pointer to the buffer with received data, - * or NULL if the handler is called to prepare - * transmission only. - * @param[out] p_data_to_send Pointer to the buffer where data to be sent - * should be written, or NULL if the handler is - * called for received data only. - * @param[in] number_of_words Length of data received and/or to be written - * (in 32-bit words). This value is always equal to - * half the size of the buffers set by the call - * to the @ref nrf_drv_i2s_start function. - */ -typedef void (* nrf_drv_i2s_data_handler_t)(uint32_t const * p_data_received, - uint32_t * p_data_to_send, - uint16_t number_of_words); - - -/** - * @brief Function for initializing the I2S driver. - * - * @param[in] p_config Pointer to the structure with initial configuration. - * If NULL, the default configuration is used. - * @param[in] handler Data handler provided by the user. Must not be NULL. - * - * @retval NRF_SUCCESS If initialization was successful. - * @retval NRF_ERROR_INVALID_STATE If the driver was already initialized. - * @retval NRF_ERROR_INVALID_PARAM If the requested combination of configuration - * options is not allowed by the I2S peripheral. - */ -ret_code_t nrf_drv_i2s_init(nrf_drv_i2s_config_t const * p_config, - nrf_drv_i2s_data_handler_t handler); - -/** - * @brief Function for uninitializing the I2S driver. - */ -void nrf_drv_i2s_uninit(void); - -/** - * @brief Function for starting the continuous I2S transfer. - * - * The I2S data transfer can be performed in one of three modes: RX (reception) - * only, TX (transmission) only, or in both directions simultaneously. - * The mode is selected by specifying a proper buffer for a given direction - * in the call to this function or by passing NULL instead if this direction - * should be disabled. - * - * The length of the buffer (which is a common value for RX and TX if both - * directions are enabled) is specified in 32-bit words. One 32-bit memory - * word can either contain four 8-bit samples, two 16-bit samples, or one - * right-aligned 24-bit sample sign-extended to a 32-bit value. - * For a detailed memory mapping for different supported configurations, - * see the @linkProductSpecification52. - * - * The provided buffers are logically divided into two parts of equal size. - * One of them is in use by the peripheral (for storing received data or for - * getting data to be transmitted, respectively). The other part is provided - * to the application via a call to the defined @ref nrf_drv_i2s_data_handler_t - * "data handling function", so that the application can process the received - * data or prepare the next portion of data to be sent. The two parts are - * swapped every time @p buffer_size/2 data words are received or transmitted. - * - * Additional options are provided using the @p flags parameter: - * - @ref NRF_DRV_I2S_FLAG_SYNCHRONIZED_MODE - the calls to data handler should - * be done in a synchronized manner (one common call for TX and RX). - * Applicable only when both RX and TX are enabled. - * - * @attention All data exchange is done in the data handler only. In particular, - * no data should be written to the transmit buffer before calling - * this function (a proper call to the data handler to get the first - * portion of data to be sent will be done before the actual transfer - * starts). - * - * @note Peripherals using EasyDMA (like I2S) require the transfer buffers - * to be placed in the Data RAM region. If this condition is not met, - * this function will fail with the error code NRF_ERROR_INVALID_ADDR. - * - * @param[in] p_rx_buffer Pointer to the receive buffer. - * Pass NULL if reception is not required. - * @param[in] p_tx_buffer Pointer to the transmit buffer. - * Pass NULL if transmission is not required. - * @param[in] buffer_size Size of the buffers (in 32-bit words). - * The size must be an even number greater than 0. - * @param[in] flags Transfer options (0 for default settings). - * - * @retval NRF_SUCCESS If the operation was successful. - * @retval NRF_ERROR_INVALID_STATE If a transfer was already started or - * the driver has not been initialized. - * @retval NRF_ERROR_INVALID_ADDR If the provided buffers are not placed - * in the Data RAM region. - */ -ret_code_t nrf_drv_i2s_start(uint32_t * p_rx_buffer, - uint32_t * p_tx_buffer, - uint16_t buffer_size, - uint8_t flags); - -/** - * @brief Function for stopping the I2S transfer. - */ -void nrf_drv_i2s_stop(void); - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_DRV_I2S_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/lpcomp/nrf_drv_lpcomp.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/lpcomp/nrf_drv_lpcomp.c deleted file mode 100644 index 38be84bce28..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/lpcomp/nrf_drv_lpcomp.c +++ /dev/null @@ -1,205 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(LPCOMP) -#include "nrf_drv_lpcomp.h" -#include "nrf_assert.h" -#include "nrf_error.h" -#include "nrf_soc.h" -#include "nrf_drv_common.h" -#include "app_util_platform.h" -#include -#include -#include - -#define NRF_LOG_MODULE_NAME lpcomp - -#if LPCOMP_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL LPCOMP_CONFIG_LOG_LEVEL -#define NRF_LOG_INFO_COLOR LPCOMP_CONFIG_INFO_COLOR -#define NRF_LOG_DEBUG_COLOR LPCOMP_CONFIG_DEBUG_COLOR -#define EVT_TO_STR(event) (event == NRF_LPCOMP_EVENT_READY ? "NRF_LPCOMP_EVENT_READY" : \ - (event == NRF_LPCOMP_EVENT_DOWN ? "NRF_LPCOMP_EVENT_DOWN" : \ - (event == NRF_LPCOMP_EVENT_UP ? "NRF_LPCOMP_EVENT_UP" : \ - (event == NRF_LPCOMP_EVENT_CROSS ? "NRF_LPCOMP_EVENT_CROSS" : "UNKNOWN EVENT")))) -#else //LPCOMP_CONFIG_LOG_ENABLED -#define EVT_TO_STR(event) "" -#define NRF_LOG_LEVEL 0 -#endif //LPCOMP_CONFIG_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - - -static lpcomp_events_handler_t m_lpcomp_events_handler = NULL; -static nrf_drv_state_t m_state = NRF_DRV_STATE_UNINITIALIZED; - -#if NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - #define IRQ_HANDLER_NAME irq_handler_for_lpcomp - #define IRQ_HANDLER static void IRQ_HANDLER_NAME(void) - - IRQ_HANDLER; -#else - #define IRQ_HANDLER void LPCOMP_IRQHandler(void) -#endif // NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - -static void lpcomp_execute_handler(nrf_lpcomp_event_t event, uint32_t event_mask) -{ - if ( nrf_lpcomp_event_check(event) && nrf_lpcomp_int_enable_check(event_mask) ) - { - nrf_lpcomp_event_clear(event); - NRF_LOG_DEBUG("Event: %s.", (uint32_t)EVT_TO_STR(event)); - - m_lpcomp_events_handler(event); - } -} - - -IRQ_HANDLER -{ - lpcomp_execute_handler(NRF_LPCOMP_EVENT_READY, LPCOMP_INTENSET_READY_Msk); - lpcomp_execute_handler(NRF_LPCOMP_EVENT_DOWN, LPCOMP_INTENSET_DOWN_Msk); - lpcomp_execute_handler(NRF_LPCOMP_EVENT_UP, LPCOMP_INTENSET_UP_Msk); - lpcomp_execute_handler(NRF_LPCOMP_EVENT_CROSS, LPCOMP_INTENSET_CROSS_Msk); -} - - -ret_code_t nrf_drv_lpcomp_init(const nrf_drv_lpcomp_config_t * p_config, - lpcomp_events_handler_t events_handler) -{ - ASSERT(p_config); - ret_code_t err_code; - - if (m_state != NRF_DRV_STATE_UNINITIALIZED) - { // LPCOMP driver is already initialized - err_code = NRF_ERROR_INVALID_STATE; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - -#if NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - if (nrf_drv_common_per_res_acquire(NRF_LPCOMP, IRQ_HANDLER_NAME) != NRF_SUCCESS) - { - err_code = NRF_ERROR_BUSY; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } -#endif - - nrf_lpcomp_configure(&(p_config->hal) ); - - if (events_handler) - { - m_lpcomp_events_handler = events_handler; - } - else - { - err_code = NRF_ERROR_INVALID_PARAM; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - nrf_lpcomp_input_select(p_config->input); - - switch (p_config->hal.detection) - { - case NRF_LPCOMP_DETECT_UP: - nrf_lpcomp_int_enable(LPCOMP_INTENSET_UP_Msk); - break; - - case NRF_LPCOMP_DETECT_DOWN: - nrf_lpcomp_int_enable(LPCOMP_INTENSET_DOWN_Msk); - break; - - case NRF_LPCOMP_DETECT_CROSS: - nrf_lpcomp_int_enable(LPCOMP_INTENSET_CROSS_Msk); - break; - - default: - break; - } - nrf_lpcomp_shorts_enable(NRF_LPCOMP_SHORT_READY_SAMPLE_MASK); - - nrf_drv_common_irq_enable(LPCOMP_IRQn, p_config->interrupt_priority); - - m_state = NRF_DRV_STATE_INITIALIZED; - - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -void nrf_drv_lpcomp_uninit(void) -{ - ASSERT(m_state != NRF_DRV_STATE_UNINITIALIZED); - nrf_drv_common_irq_disable(LPCOMP_IRQn); - nrf_drv_lpcomp_disable(); -#if NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - nrf_drv_common_per_res_release(NRF_LPCOMP); -#endif - m_state = NRF_DRV_STATE_UNINITIALIZED; - m_lpcomp_events_handler = NULL; - NRF_LOG_INFO("Uninitialized."); -} - -void nrf_drv_lpcomp_enable(void) -{ - ASSERT(m_state == NRF_DRV_STATE_INITIALIZED); - nrf_lpcomp_enable(); - nrf_lpcomp_task_trigger(NRF_LPCOMP_TASK_START); - m_state = NRF_DRV_STATE_POWERED_ON; - NRF_LOG_INFO("Enabled."); -} - -void nrf_drv_lpcomp_disable(void) -{ - ASSERT(m_state == NRF_DRV_STATE_POWERED_ON); - nrf_lpcomp_disable(); - nrf_lpcomp_task_trigger(NRF_LPCOMP_TASK_STOP); - m_state = NRF_DRV_STATE_INITIALIZED; - NRF_LOG_INFO("Disabled."); -} - -void nrf_drv_lpcomp_event_handler_register(lpcomp_events_handler_t lpcomp_events_handler) -{ - m_lpcomp_events_handler = lpcomp_events_handler; -} - -#endif //NRF_MODULE_ENABLED(LPCOMP) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/lpcomp/nrf_drv_lpcomp.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/lpcomp/nrf_drv_lpcomp.h deleted file mode 100644 index 7cd18528731..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/lpcomp/nrf_drv_lpcomp.h +++ /dev/null @@ -1,153 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_DRV_LPCOMP_H__ -#define NRF_DRV_LPCOMP_H__ - -#include "nrf_lpcomp.h" -#include "sdk_errors.h" -#include "nrf_drv_common.h" -#include "sdk_config.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @addtogroup nrf_lpcomp LPCOMP HAL and driver - * @ingroup nrf_drivers - * @brief Low Power Comparator (LPCOMP) APIs. - * @details The LPCOMP HAL provides basic APIs for accessing the registers of Low Power Comparator. - * The LPCOMP driver provides APIs on a higher level. - * - * @defgroup nrf_drv_lpcomp LPCOMP driver - * @{ - * @ingroup nrf_lpcomp - * @brief Low Power Comparator (LPCOMP) driver. - */ - -/**@brief LPCOMP event handler function type. - * @param[in] event LPCOMP event. - */ -typedef void (* lpcomp_events_handler_t)(nrf_lpcomp_event_t event); - -/**@brief LPCOMP configuration. - */ -typedef struct -{ - nrf_lpcomp_config_t hal; /**< LPCOMP HAL configuration. */ - nrf_lpcomp_input_t input; /**< Input to be monitored. */ - uint8_t interrupt_priority; /**< LPCOMP interrupt priority. */ -} nrf_drv_lpcomp_config_t; - -/** @brief LPCOMP driver default configuration including the LPCOMP HAL configuration. */ -#ifdef NRF52_SERIES -#define NRF_DRV_LPCOMP_DEFAULT_CONFIG \ - { \ - .hal = {(nrf_lpcomp_ref_t)LPCOMP_CONFIG_REFERENCE , (nrf_lpcomp_detect_t)LPCOMP_CONFIG_DETECTION, \ - (nrf_lpcomp_hysteresis_t)LPCOMP_CONFIG_HYST}, \ - .input = (nrf_lpcomp_input_t)LPCOMP_CONFIG_INPUT, \ - .interrupt_priority = LPCOMP_CONFIG_IRQ_PRIORITY \ - } -#else -#define NRF_DRV_LPCOMP_DEFAULT_CONFIG \ - { \ - .hal = {(nrf_lpcomp_ref_t)LPCOMP_CONFIG_REFERENCE , (nrf_lpcomp_detect_t)LPCOMP_CONFIG_DETECTION}, \ - .input = (nrf_lpcomp_input_t)LPCOMP_CONFIG_INPUT, \ - .interrupt_priority = LPCOMP_CONFIG_IRQ_PRIORITY \ - } -#endif - -/** - * @brief Function for initializing the LPCOMP driver. - * - * This function initializes the LPCOMP driver, but does not enable the peripheral or any interrupts. - * To start the driver, call the function nrf_drv_lpcomp_enable() after initialization. - * - * If no configuration structure is provided, the driver is initialized with the default settings. - * - * @param[in] p_config Initial configuration. If NULL, the default configuration is used. - * @param[in] events_handler Handler function. - * @retval NRF_ERROR_INVALID_PARAM If the configuration is invalid. - * @retval NRF_ERROR_INVALID_STATE If the driver has already been initialized. - */ -ret_code_t nrf_drv_lpcomp_init(const nrf_drv_lpcomp_config_t * p_config, - lpcomp_events_handler_t events_handler); - - -/** - * @brief Function for uninitializing the LCOMP driver. - * - * This function uninitializes the LPCOMP driver. The LPCOMP peripheral and - * its interrupts are disabled, and local variables are cleaned. After this call, you must - * initialize the driver again by calling nrf_drv_lpcomp_init() if you want to use it. - * - * @sa nrf_drv_lpcomp_disable() - * @sa nrf_drv_lpcomp_init() - */ -void nrf_drv_lpcomp_uninit(void); - -/**@brief Function for enabling the LPCOMP peripheral and interrupts. - * - * Before calling this function, the driver must be initialized. This function - * enables the LPCOMP peripheral and its interrupts. - * - * @sa nrf_drv_lpcomp_disable() - */ -void nrf_drv_lpcomp_enable(void); - -/**@brief Function for disabling the LPCOMP peripheral. - * - * Before calling this function, the driver must be initialized. This function disables the LPCOMP - * peripheral and its interrupts. - * - * @sa nrf_drv_lpcomp_enable() - */ -void nrf_drv_lpcomp_disable(void); - -/** - *@} - **/ - - -#ifdef __cplusplus -} -#endif - - #endif /* NRF_DRV_LPCOMP_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/pdm/nrf_drv_pdm.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/pdm/nrf_drv_pdm.c deleted file mode 100644 index 5a7aca44d06..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/pdm/nrf_drv_pdm.c +++ /dev/null @@ -1,365 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(PDM) -#include "nrf_drv_pdm.h" -#include "nrf_assert.h" -#include "nrf_drv_common.h" -#include "nrf_gpio.h" - -#define NRF_LOG_MODULE_NAME pdm - -#if PDM_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL PDM_CONFIG_LOG_LEVEL -#define NRF_LOG_INFO_COLOR PDM_CONFIG_INFO_COLOR -#define NRF_LOG_DEBUG_COLOR PDM_CONFIG_DEBUG_COLOR -#define EVT_TO_STR(event) (event == NRF_PDM_EVENT_STARTED ? "NRF_PDM_EVENT_STARTED" : \ - (event == NRF_PDM_EVENT_STOPPED ? "NRF_PDM_EVENT_STOPPED" : \ - (event == NRF_PDM_EVENT_END ? "NRF_PDM_EVENT_END" : "UNKNOWN EVENT"))) -#else //PDM_CONFIG_LOG_ENABLED -#define EVT_TO_STR(event) "" -#define NRF_LOG_LEVEL 0 -#endif //PDM_CONFIG_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - - -/** @brief PDM interface status. */ -typedef enum -{ - NRF_PDM_STATE_IDLE, - NRF_PDM_STATE_RUNNING, - NRF_PDM_STATE_STARTING, - NRF_PDM_STATE_STOPPING -} nrf_drv_pdm_state_t; - - -/** @brief PDM interface control block.*/ -typedef struct -{ - nrf_drv_pdm_event_handler_t event_handler; ///< Event handler function pointer. - int16_t * buff_address[2]; ///< Sample buffers. - uint16_t buff_length[2]; ///< Length of the sample buffers. - nrf_drv_state_t drv_state; ///< Driver state. - volatile nrf_drv_pdm_state_t op_state; ///< PDM peripheral operation state. - uint8_t active_buffer; ///< Number of currently active buffer. - uint8_t error; ///< Driver error flag. - uint8_t irq_priority; ///< Interrupt priority. - volatile uint8_t irq_buff_request; ///< Request the next buffer in the ISR. -} nrf_drv_pdm_cb_t; - - -static nrf_drv_pdm_cb_t m_cb; - - -void PDM_IRQHandler(void) -{ - if (nrf_pdm_event_check(NRF_PDM_EVENT_STARTED)) - { - nrf_pdm_event_clear(NRF_PDM_EVENT_STARTED); - NRF_LOG_DEBUG("Event: %s.", (uint32_t)EVT_TO_STR(NRF_PDM_EVENT_STARTED)); - - nrf_drv_pdm_evt_t evt; - uint8_t finished_buffer = m_cb.active_buffer; - - // Check if the next buffer was set before. - uint8_t next_buffer = (~m_cb.active_buffer) & 0x01; - if (m_cb.buff_address[next_buffer] || m_cb.op_state == NRF_PDM_STATE_STARTING) - { - evt.error = PDM_NO_ERROR; - m_cb.error = 0; - - // Release the full buffer if ready and request the next one. - if (m_cb.op_state == NRF_PDM_STATE_STARTING) - { - evt.buffer_released = 0; - m_cb.op_state = NRF_PDM_STATE_RUNNING; - } - else - { - evt.buffer_released = m_cb.buff_address[finished_buffer]; - m_cb.buff_address[finished_buffer] = 0; - m_cb.active_buffer = next_buffer; - } - evt.buffer_requested = true; - m_cb.event_handler(&evt); - } - else - { - // No next buffer available. Report an error. - // Do not request the new buffer as it was already done. - if (m_cb.error == 0) - { - evt.error = PDM_ERROR_OVERFLOW; - evt.buffer_released = 0; - evt.buffer_requested = false; - m_cb.error = 1; - m_cb.event_handler(&evt); - } - } - - if (m_cb.op_state == NRF_PDM_STATE_STARTING) - { - m_cb.op_state = NRF_PDM_STATE_RUNNING; - } - } - else if (nrf_pdm_event_check(NRF_PDM_EVENT_STOPPED)) - { - nrf_pdm_event_clear(NRF_PDM_EVENT_STOPPED); - NRF_LOG_DEBUG("Event: %s.", (uint32_t)EVT_TO_STR(NRF_PDM_EVENT_STOPPED)); - nrf_pdm_disable(); - m_cb.op_state = NRF_PDM_STATE_IDLE; - - // Release the buffers. - nrf_drv_pdm_evt_t evt; - evt.error = PDM_NO_ERROR; - evt.buffer_requested = false; - if (m_cb.buff_address[m_cb.active_buffer]) - { - evt.buffer_released = m_cb.buff_address[m_cb.active_buffer]; - m_cb.buff_address[m_cb.active_buffer] = 0; - m_cb.event_handler(&evt); - } - - uint8_t second_buffer = (~m_cb.active_buffer) & 0x01; - if (m_cb.buff_address[second_buffer]) - { - evt.buffer_released = m_cb.buff_address[second_buffer]; - m_cb.buff_address[second_buffer] = 0; - m_cb.event_handler(&evt); - } - m_cb.active_buffer = 0; - - - } - - if (m_cb.irq_buff_request) - { - nrf_drv_pdm_evt_t evt; - evt.buffer_released = 0; - evt.error = PDM_NO_ERROR; - evt.buffer_requested = true; - m_cb.irq_buff_request = 0; - m_cb.event_handler(&evt); - } -} - - -ret_code_t nrf_drv_pdm_init(nrf_drv_pdm_config_t const * p_config, - nrf_drv_pdm_event_handler_t event_handler) -{ - ret_code_t err_code; - - if (m_cb.drv_state != NRF_DRV_STATE_UNINITIALIZED) - { - err_code = NRF_ERROR_INVALID_STATE; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - if ((p_config == NULL) - || (event_handler == NULL)) - { - err_code = NRF_ERROR_INVALID_PARAM; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - if (p_config->gain_l > NRF_PDM_GAIN_MAXIMUM - || p_config->gain_r > NRF_PDM_GAIN_MAXIMUM) - { - err_code = NRF_ERROR_INVALID_PARAM; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - - m_cb.buff_address[0] = 0; - m_cb.buff_address[1] = 0; - m_cb.active_buffer = 0; - m_cb.error = 0; - m_cb.event_handler = event_handler; - m_cb.op_state = NRF_PDM_STATE_IDLE; - - nrf_pdm_clock_set(p_config->clock_freq); - nrf_pdm_mode_set(p_config->mode, p_config->edge); - nrf_pdm_gain_set(p_config->gain_l, p_config->gain_r); - - nrf_gpio_cfg_output(p_config->pin_clk); - nrf_gpio_pin_clear(p_config->pin_clk); - nrf_gpio_cfg_input(p_config->pin_din, NRF_GPIO_PIN_NOPULL); - nrf_pdm_psel_connect(p_config->pin_clk, p_config->pin_din); - - nrf_pdm_event_clear(NRF_PDM_EVENT_STARTED); - nrf_pdm_event_clear(NRF_PDM_EVENT_END); - nrf_pdm_event_clear(NRF_PDM_EVENT_STOPPED); - nrf_pdm_int_enable(NRF_PDM_INT_STARTED | NRF_PDM_INT_STOPPED); - m_cb.irq_priority = p_config->interrupt_priority; - nrf_drv_common_irq_enable(PDM_IRQn, m_cb.irq_priority); - m_cb.drv_state = NRF_DRV_STATE_INITIALIZED; - - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -void nrf_drv_pdm_uninit(void) -{ - nrf_pdm_disable(); - nrf_pdm_psel_disconnect(); - m_cb.drv_state = NRF_DRV_STATE_UNINITIALIZED; - NRF_LOG_INFO("Uninitialized."); -} - -static void pdm_start() -{ - m_cb.drv_state = NRF_DRV_STATE_POWERED_ON; - nrf_pdm_enable(); - nrf_pdm_event_clear(NRF_PDM_EVENT_STARTED); - nrf_pdm_task_trigger(NRF_PDM_TASK_START); -} - -static void pdm_buf_request() -{ - m_cb.irq_buff_request = 1; - NVIC_SetPendingIRQ(PDM_IRQn); -} - -ret_code_t nrf_drv_pdm_start(void) -{ - ASSERT(m_cb.drv_state != NRF_DRV_STATE_UNINITIALIZED); - ret_code_t err_code; - - if (m_cb.op_state != NRF_PDM_STATE_IDLE) - { - if (m_cb.op_state == NRF_PDM_STATE_RUNNING) - { - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - err_code = NRF_ERROR_BUSY; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - m_cb.op_state = NRF_PDM_STATE_STARTING; - pdm_buf_request(); - - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - -ret_code_t nrf_drv_pdm_buffer_set(int16_t * buffer, uint16_t buffer_length) -{ - if (m_cb.drv_state == NRF_DRV_STATE_UNINITIALIZED) - { - return NRF_ERROR_INVALID_STATE; - } - if (m_cb.op_state == NRF_PDM_STATE_STOPPING) - { - return NRF_ERROR_BUSY; - } - if ((!buffer) || (buffer_length > NRF_PDM_MAX_BUFFER_SIZE)) - { - return NRF_ERROR_INVALID_PARAM; - } - - ret_code_t err_code = NRF_SUCCESS; - - // Enter the PDM critical section. - nrf_drv_common_irq_disable(PDM_IRQn); - - uint8_t next_buffer = (~m_cb.active_buffer) & 0x01; - if (m_cb.op_state == NRF_PDM_STATE_STARTING) - { - next_buffer = 0; - } - - if (m_cb.buff_address[next_buffer]) - { - // Buffer already set. - err_code = NRF_ERROR_BUSY; - } - else - { - m_cb.buff_address[next_buffer] = buffer; - m_cb.buff_length[next_buffer] = buffer_length; - nrf_pdm_buffer_set((uint32_t *)buffer, buffer_length); - - if (m_cb.drv_state != NRF_DRV_STATE_POWERED_ON) - { - pdm_start(); - } - } - - nrf_drv_common_irq_enable(PDM_IRQn, m_cb.irq_priority); - return err_code; -} - -ret_code_t nrf_drv_pdm_stop(void) -{ - ASSERT(m_cb.drv_state != NRF_DRV_STATE_UNINITIALIZED); - ret_code_t err_code; - - if (m_cb.op_state != NRF_PDM_STATE_RUNNING) - { - if (m_cb.op_state == NRF_PDM_STATE_IDLE || m_cb.op_state == NRF_PDM_STATE_STARTING) - { - nrf_pdm_disable(); - m_cb.op_state = NRF_PDM_STATE_IDLE; - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - err_code = NRF_ERROR_BUSY; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - m_cb.drv_state = NRF_DRV_STATE_INITIALIZED; - m_cb.op_state = NRF_PDM_STATE_STOPPING; - - nrf_pdm_task_trigger(NRF_PDM_TASK_STOP); - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - -#endif //NRF_MODULE_ENABLED(PDM) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/pdm/nrf_drv_pdm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/pdm/nrf_drv_pdm.h deleted file mode 100644 index 7e718857a6d..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/pdm/nrf_drv_pdm.h +++ /dev/null @@ -1,226 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @addtogroup nrf_pdm PDM HAL and driver - * @ingroup nrf_drivers - * @brief @tagAPI52 Pulse density modulation (PDM) interface APIs. - * - * The PDM HAL provides basic APIs for accessing the registers of the PDM interface peripheral. - * The PDM driver provides APIs on a higher level. - * - * @defgroup nrf_drv_pdm PDM driver - * @{ - * @ingroup nrf_pdm - * - * @brief @tagAPI52 Pulse density modulation (PDM) interface driver. - */ - - -#ifndef NRF_DRV_PDM_H__ -#define NRF_DRV_PDM_H__ - -#include "sdk_config.h" -#include "nrf_pdm.h" -#include "sdk_errors.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -#define NRF_PDM_MAX_BUFFER_SIZE 32767 - - -/** - * @brief PDM error type. - */ -typedef enum -{ - PDM_NO_ERROR = 0, - PDM_ERROR_OVERFLOW = 1 -} nrf_drv_pdm_error_t; - -/** - * @brief PDM event structure. - */ -typedef struct -{ - bool buffer_requested; ///< Buffer request flag. - int16_t * buffer_released; ///< Pointer to the released buffer. Can be NULL. - nrf_drv_pdm_error_t error; ///< Error type. -} nrf_drv_pdm_evt_t; - -/** - * @brief PDM interface driver configuration structure. - */ -typedef struct -{ - nrf_pdm_mode_t mode; ///< Interface operation mode. - nrf_pdm_edge_t edge; ///< Sampling mode. - uint8_t pin_clk; ///< CLK pin. - uint8_t pin_din; ///< DIN pin. - nrf_pdm_freq_t clock_freq; ///< Clock frequency. - nrf_pdm_gain_t gain_l; ///< Left channel gain. - nrf_pdm_gain_t gain_r; ///< Right channel gain. - uint8_t interrupt_priority; ///< Interrupt priority. -} nrf_drv_pdm_config_t; - - -/** - * @brief Macro for setting @ref nrf_drv_pdm_config_t to default settings - * in single ended mode. - * - * @param PIN_CLK CLK output pin. - * @param PIN_DIN DIN input pin. - */ -#define NRF_DRV_PDM_DEFAULT_CONFIG(PIN_CLK, PIN_DIN) \ -{ \ - .mode = (nrf_pdm_mode_t)PDM_CONFIG_MODE, \ - .edge = (nrf_pdm_edge_t)PDM_CONFIG_EDGE, \ - .pin_clk = PIN_CLK, \ - .pin_din = PIN_DIN, \ - .clock_freq = (nrf_pdm_freq_t)PDM_CONFIG_CLOCK_FREQ, \ - .gain_l = NRF_PDM_GAIN_DEFAULT, \ - .gain_r = NRF_PDM_GAIN_DEFAULT, \ - .interrupt_priority = PDM_CONFIG_IRQ_PRIORITY \ -} - - -/** - * @brief Handler for PDM interface ready events. - * - * This event handler is called on buffer request, error or when a buffer is full - * and ready to be processed. - * - * @param[in] evt Pointer to the PDM event structure. - */ -typedef void (*nrf_drv_pdm_event_handler_t)(nrf_drv_pdm_evt_t const * const evt); - - -/** - * @brief Function for initializing the PDM interface. - * - * @param[in] p_config Pointer to a configuration structure. Cannot be NULL. - * @param[in] event_handler Event handler provided by the user. Cannot be NULL. - * - * @retval NRF_SUCCESS If initialization was successful. - * @retval NRF_ERROR_INVALID_STATE If the driver is already initialized. - * @retval NRF_ERROR_INVALID_PARAM If invalid parameters were specified. - */ -ret_code_t nrf_drv_pdm_init(nrf_drv_pdm_config_t const * p_config, - nrf_drv_pdm_event_handler_t event_handler); - - -/** - * @brief Function for uninitializing the PDM interface. - * - * This function stops PDM sampling, if it is in progress. - */ -void nrf_drv_pdm_uninit(void); - - -/** - * @brief Function for getting the address of a PDM interface task. - * - * @param[in] task Task. - * - * @return Task address. - */ -__STATIC_INLINE uint32_t nrf_drv_pdm_task_address_get(nrf_pdm_task_t task) -{ - return nrf_pdm_task_address_get(task); -} - - -/** - * @brief Function for getting the state of the PDM interface. - * - * @retval TRUE If the PDM interface is enabled. - * @retval FALSE If the PDM interface is disabled. - */ -__STATIC_INLINE bool nrf_drv_pdm_enable_check() -{ - return nrf_pdm_enable_check(); -} - - -/** - * @brief Function for starting PDM sampling. - * - * @retval NRF_SUCCESS If sampling was started successfully or was already in progress. - * @retval NRF_ERROR_BUSY If a previous start/stop operation is in progress. - */ -ret_code_t nrf_drv_pdm_start(void); - - -/** - * @brief Function for stopping PDM sampling. - * - * When this function is called, the PDM interface is stopped after finishing - * the current frame. - * The event handler function might be called once more after calling this function. - * - * @retval NRF_SUCCESS If sampling was stopped successfully or was already stopped before. - * @retval NRF_ERROR_BUSY If a previous start/stop operation is in progress. - */ -ret_code_t nrf_drv_pdm_stop(void); - -/** - * @brief Function for supplying the sample buffer. - * - * Call this function after every buffer request event. - * - * @param[in] buffer Pointer to the receive buffer. Cannot be NULL. - * @param[in] buffer_length Length of the receive buffer in 16-bit words. - * - * @retval NRF_SUCCESS If the buffer was applied successfully. - * @retval NRF_ERROR_BUSY If the buffer was already supplied or the peripheral is currently being stopped. - * @retval NRF_ERROR_INVALID_STATE If the driver was not initialized. - * @retval NRF_ERROR_INVALID_PARAM If invalid parameters were provided. - */ -ret_code_t nrf_drv_pdm_buffer_set(int16_t * buffer, uint16_t buffer_length); - -#ifdef __cplusplus -} -#endif - -#endif // NRF_DRV_PDM_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/power/nrf_drv_power.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/power/nrf_drv_power.c deleted file mode 100644 index 3c1f26818c1..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/power/nrf_drv_power.c +++ /dev/null @@ -1,477 +0,0 @@ -/** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(POWER) - -#include "nrf_drv_power.h" -#include "nrf_assert.h" -#include "nordic_common.h" -#include "app_util_platform.h" -#ifdef SOFTDEVICE_PRESENT -#include "nrf_sdm.h" -#include "nrf_soc.h" -#include "nrf_sdh.h" -#include "nrf_sdh_soc.h" -#endif - -/* Validate configuration */ -INTERRUPT_PRIORITY_VALIDATION(POWER_CONFIG_IRQ_PRIORITY); - -/** - * @internal - * @defgroup nrf_drv_power_internals POWER driver internals - * @ingroup nrf_drv_power - * - * Internal variables, auxiliary macros and functions of POWER driver. - * @{ - */ - -/** - * @brief Default configuration - * - * The structure with default configuration data. - * This structure would be used if configuration pointer given - * to the @ref nrf_drv_power_init is set to NULL. - */ -static const nrf_drv_power_config_t m_drv_power_config_default = -{ - .dcdcen = POWER_CONFIG_DEFAULT_DCDCEN, -#if NRF_POWER_HAS_VDDH - .dcdcenhv = POWER_CONFIG_DEFAULT_DCDCENHV, -#endif -}; - -/** - * @brief The initialization flag - */ -static bool m_initialized; - -/** - * @brief The handler of power fail comparator warning event - */ -static nrf_drv_power_pofwarn_event_handler_t m_pofwarn_handler; - -#if NRF_POWER_HAS_SLEEPEVT -/** - * @brief The handler of sleep event handler - */ -static nrf_drv_power_sleep_event_handler_t m_sleepevt_handler; -#endif - -#if NRF_POWER_HAS_USBREG -/** - * @brief The handler of USB power events - */ -static nrf_drv_power_usb_event_handler_t m_usbevt_handler; -#endif - -/** @} */ - -bool nrf_drv_power_init_check(void) -{ - return m_initialized; -} - -ret_code_t nrf_drv_power_init(nrf_drv_power_config_t const * p_config) -{ - nrf_drv_power_config_t const * p_used_config; - if (m_initialized) - { - return NRF_ERROR_MODULE_ALREADY_INITIALIZED; - } -#ifdef SOFTDEVICE_PRESENT - if (nrf_sdh_is_enabled()) - { - return NRF_ERROR_INVALID_STATE; - } -#endif - - p_used_config = (p_config != NULL) ? - p_config : (&m_drv_power_config_default); -#if NRF_POWER_HAS_VDDH - nrf_power_dcdcen_vddh_set(p_used_config->dcdcenhv); -#endif - nrf_power_dcdcen_set(p_used_config->dcdcen); - - nrf_drv_common_power_clock_irq_init(); - - m_initialized = true; - return NRF_SUCCESS; -} - -void nrf_drv_power_uninit(void) -{ - ASSERT(m_initialized); - nrf_drv_power_pof_uninit(); -#if NRF_POWER_HAS_SLEEPEVT - nrf_drv_power_sleepevt_uninit(); -#endif -#if NRF_POWER_HAS_USBREG - nrf_drv_power_usbevt_uninit(); -#endif - m_initialized = false; -} - -ret_code_t nrf_drv_power_pof_init(nrf_drv_power_pofwarn_config_t const * p_config) -{ - ASSERT(p_config != NULL); - - nrf_drv_power_pof_uninit(); - -#ifdef SOFTDEVICE_PRESENT - if (nrf_sdh_is_enabled()) - { - /* Currently when SD is enabled - the configuration can be changed - * in very limited range. - * It is the SoftDevice limitation. - */ -#if NRF_POWER_HAS_VDDH - if (p_config->thrvddh != nrf_power_pofcon_vddh_get()) - { - /* Cannot change THRVDDH with current SD API */ - return NRF_ERROR_INVALID_STATE; - } -#endif - if (p_config->thr != nrf_power_pofcon_get(NULL)) - { - /* Only limited number of THR values are supported and - * the values taken by SD is different than the one in hardware - */ - uint8_t thr; - switch (p_config->thr) - { - case NRF_POWER_POFTHR_V21: - thr = NRF_POWER_THRESHOLD_V21; - break; - case NRF_POWER_POFTHR_V23: - thr = NRF_POWER_THRESHOLD_V23; - break; - case NRF_POWER_POFTHR_V25: - thr = NRF_POWER_THRESHOLD_V25; - break; - case NRF_POWER_POFTHR_V27: - thr = NRF_POWER_THRESHOLD_V27; - break; - default: - /* Cannot configure */ - return NRF_ERROR_INVALID_STATE; - } - ASSERT(sd_power_pof_threshold_set(thr)); - } - } - else -#endif /* SOFTDEVICE_PRESENT */ - { - nrf_power_pofcon_set(true, p_config->thr); -#if NRF_POWER_HAS_VDDH - nrf_power_pofcon_vddh_set(p_config->thrvddh); -#endif - } - - if (p_config->handler != NULL) - { - m_pofwarn_handler = p_config->handler; -#ifdef SOFTDEVICE_PRESENT - if (nrf_sdh_is_enabled()) - { - (void) sd_power_pof_enable(true); - } - else -#endif - { - nrf_power_int_enable(NRF_POWER_INT_POFWARN_MASK); - } - } - return NRF_SUCCESS; -} - -void nrf_drv_power_pof_uninit(void) -{ -#ifdef SOFTDEVICE_PRESENT - if (nrf_sdh_is_enabled()) - { - (void) sd_power_pof_enable(false); - } - else -#endif - { - nrf_power_int_disable(NRF_POWER_INT_POFWARN_MASK); - } - m_pofwarn_handler = NULL; -} - -#if NRF_POWER_HAS_SLEEPEVT -ret_code_t nrf_drv_power_sleepevt_init(nrf_drv_power_sleepevt_config_t const * p_config) -{ - ASSERT(p_config != NULL); - - nrf_drv_power_sleepevt_uninit(); - if (p_config->handler != NULL) - { - uint32_t enmask = 0; - m_sleepevt_handler = p_config->handler; - if (p_config->en_enter) - { - enmask |= NRF_POWER_INT_SLEEPENTER_MASK; - nrf_power_event_clear(NRF_POWER_EVENT_SLEEPENTER); - } - if (p_config->en_exit) - { - enmask |= NRF_POWER_INT_SLEEPEXIT_MASK; - nrf_power_event_clear(NRF_POWER_EVENT_SLEEPEXIT); - } -#ifdef SOFTDEVICE_PRESENT - if (nrf_sdh_is_enabled()) - { - if (enmask != 0) - { - return NRF_ERROR_INVALID_STATE; - } - } - else -#endif - { - nrf_power_int_enable(enmask); - } - } - - return NRF_SUCCESS; -} - -void nrf_drv_power_sleepevt_uninit(void) -{ -#ifdef SOFTDEVICE_PRESENT - if (nrf_sdh_is_enabled()) - { - /* Nothing to do */ - } - else -#endif - { - nrf_power_int_disable( - NRF_POWER_INT_SLEEPENTER_MASK | - NRF_POWER_INT_SLEEPEXIT_MASK); - } - m_sleepevt_handler = NULL; -} -#endif /* NRF_POWER_HAS_SLEEPEVT */ - -#if NRF_POWER_HAS_USBREG -ret_code_t nrf_drv_power_usbevt_init(nrf_drv_power_usbevt_config_t const * p_config) -{ - nrf_drv_power_usbevt_uninit(); - if (p_config->handler != NULL) - { - m_usbevt_handler = p_config->handler; -#ifdef SOFTDEVICE_PRESENT - if (nrf_sdh_is_enabled()) - { - /** @todo Implement USB power events when SD support it */ - return NRF_ERROR_INVALID_STATE; - } - else -#endif - { - nrf_power_int_enable( - NRF_POWER_INT_USBDETECTED_MASK | - NRF_POWER_INT_USBREMOVED_MASK | - NRF_POWER_INT_USBPWRRDY_MASK); - } - } - return NRF_SUCCESS; -} - -void nrf_drv_power_usbevt_uninit(void) -{ -#ifdef SOFTDEVICE_PRESENT - if (nrf_sdh_is_enabled()) - { - /** @todo Implement USB power events when SD support it */ - } - else -#endif - { - nrf_power_int_disable( - NRF_POWER_INT_USBDETECTED_MASK | - NRF_POWER_INT_USBREMOVED_MASK | - NRF_POWER_INT_USBPWRRDY_MASK); - } - m_usbevt_handler = NULL; -} -#endif /* NRF_POWER_HAS_USBREG */ - - -/** - * @ingroup nrf_drv_power_internals - * @brief Interrupt handler - * - * POWER peripheral interrupt handler - */ -#if NRF_DRV_COMMON_POWER_CLOCK_ISR -void nrf_drv_power_onIRQ(void) -#else -void POWER_CLOCK_IRQHandler(void) -#endif -{ - uint32_t enabled = nrf_power_int_enable_get(); - if ((0 != (enabled & NRF_POWER_INT_POFWARN_MASK)) && - nrf_power_event_get_and_clear(NRF_POWER_EVENT_POFWARN)) - { - /* Cannot be null if event is enabled */ - ASSERT(m_pofwarn_handler != NULL); - m_pofwarn_handler(); - } -#if NRF_POWER_HAS_SLEEPEVT - if ((0 != (enabled & NRF_POWER_INT_SLEEPENTER_MASK)) && - nrf_power_event_get_and_clear(NRF_POWER_EVENT_SLEEPENTER)) - { - /* Cannot be null if event is enabled */ - ASSERT(m_sleepevt_handler != NULL); - m_sleepevt_handler(NRF_DRV_POWER_SLEEP_EVT_ENTER); - } - if ((0 != (enabled & NRF_POWER_INT_SLEEPEXIT_MASK)) && - nrf_power_event_get_and_clear(NRF_POWER_EVENT_SLEEPEXIT)) - { - /* Cannot be null if event is enabled */ - ASSERT(m_sleepevt_handler != NULL); - m_sleepevt_handler(NRF_DRV_POWER_SLEEP_EVT_EXIT); - } -#endif -#if NRF_POWER_HAS_USBREG - if ((0 != (enabled & NRF_POWER_INT_USBDETECTED_MASK)) && - nrf_power_event_get_and_clear(NRF_POWER_EVENT_USBDETECTED)) - { - /* Cannot be null if event is enabled */ - ASSERT(m_usbevt_handler != NULL); - m_usbevt_handler(NRF_DRV_POWER_USB_EVT_DETECTED); - } - if ((0 != (enabled & NRF_POWER_INT_USBREMOVED_MASK)) && - nrf_power_event_get_and_clear(NRF_POWER_EVENT_USBREMOVED)) - { - /* Cannot be null if event is enabled */ - ASSERT(m_usbevt_handler != NULL); - m_usbevt_handler(NRF_DRV_POWER_USB_EVT_REMOVED); - } - if ((0 != (enabled & NRF_POWER_INT_USBPWRRDY_MASK)) && - nrf_power_event_get_and_clear(NRF_POWER_EVENT_USBPWRRDY)) - { - /* Cannot be null if event is enabled */ - ASSERT(m_usbevt_handler != NULL); - m_usbevt_handler(NRF_DRV_POWER_USB_EVT_READY); - } -#endif -} - -#ifdef SOFTDEVICE_PRESENT - -static void nrf_drv_power_sdh_soc_evt_handler(uint32_t evt_id, void * p_context); -static void nrf_drv_power_sdh_state_evt_handler(nrf_sdh_state_evt_t state, void * p_context); - -NRF_SDH_SOC_OBSERVER(m_soc_observer, POWER_CONFIG_SOC_OBSERVER_PRIO, - nrf_drv_power_sdh_soc_evt_handler, NULL); - -NRF_SDH_STATE_OBSERVER(m_sd_observer, POWER_CONFIG_STATE_OBSERVER_PRIO) = -{ - .handler = nrf_drv_power_sdh_state_evt_handler, - .p_context = NULL -}; - -static void nrf_drv_power_sdh_soc_evt_handler(uint32_t evt_id, void * p_context) -{ - if (evt_id == NRF_EVT_POWER_FAILURE_WARNING) - { - /* Cannot be null if event is enabled */ - ASSERT(m_pofwarn_handler != NULL); - m_pofwarn_handler(); - } -} - -static void nrf_drv_power_on_sd_enable(void) -{ - ASSERT(m_initialized); /* This module has to be enabled first */ - CRITICAL_REGION_ENTER(); - if (m_pofwarn_handler != NULL) - { - (void) sd_power_pof_enable(true); - } - CRITICAL_REGION_EXIT(); -} - -static void nrf_drv_power_on_sd_disable(void) -{ - /* Reinit interrupts */ - ASSERT(m_initialized); - nrf_drv_common_irq_enable(POWER_CLOCK_IRQn, CLOCK_CONFIG_IRQ_PRIORITY); - if (m_pofwarn_handler != NULL) - { - nrf_power_int_enable(NRF_POWER_INT_POFWARN_MASK); - } -#if NRF_POWER_HAS_USBREG - if (m_usbevt_handler != NULL) - { - nrf_power_int_enable( - NRF_POWER_INT_USBDETECTED_MASK | - NRF_POWER_INT_USBREMOVED_MASK | - NRF_POWER_INT_USBPWRRDY_MASK); - } -#endif -} - -static void nrf_drv_power_sdh_state_evt_handler(nrf_sdh_state_evt_t state, void * p_context) -{ - switch (state) - { - case NRF_SDH_EVT_STATE_ENABLED: - nrf_drv_power_on_sd_enable(); - break; - - case NRF_SDH_EVT_STATE_DISABLED: - nrf_drv_power_on_sd_disable(); - break; - - default: - break; - } -} - -#endif // SOFTDEVICE_PRESENT - -#endif /* NRF_MODULE_ENABLED(POWER) */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/power/nrf_drv_power.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/power/nrf_drv_power.h deleted file mode 100644 index bb645e311fb..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/power/nrf_drv_power.h +++ /dev/null @@ -1,371 +0,0 @@ -/** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef NRF_DRV_POWER_H__ -#define NRF_DRV_POWER_H__ - -#include -#include -#include "nrf_power.h" -#include "sdk_config.h" -#include "nrf_drv_common.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup nrf_power Power HAL and driver - * @ingroup nrf_drivers - * @brief POWER peripheral APIs. - * - * The power peripheral HAL provides basic APIs for accessing - * the registers of the POWER peripheral. - * The POWER driver provides APIs on a higher level. - */ - -/** - * @defgroup nrf_drv_power POWER driver - * @{ - * @ingroup nrf_power - * @brief Driver for managing events and the state of POWER peripheral. - * - */ - -/** - * @brief Power mode possible configurations - */ -typedef enum -{ - NRF_DRV_POWER_MODE_CONSTLAT, /**< Constant latency mode *///!< NRF_DRV_POWER_MODE_CONSTLAT - NRF_DRV_POWER_MODE_LOWPWR /**< Low power mode *///!< NRF_DRV_POWER_MODE_LOWPWR -}nrf_drv_power_mode_t; - -#if NRF_POWER_HAS_SLEEPEVT -/** - * @brief Events from power system - */ -typedef enum -{ - NRF_DRV_POWER_SLEEP_EVT_ENTER, /**< CPU entered WFI/WFE sleep - * - * Keep in mind that if this interrupt is enabled, - * it means that CPU was waken up just after WFI by this interrupt. - */ - NRF_DRV_POWER_SLEEP_EVT_EXIT /**< CPU exited WFI/WFE sleep */ -}nrf_drv_power_sleep_evt_t; -#endif /* NRF_POWER_HAS_SLEEPEVT */ - -#if NRF_POWER_HAS_USBREG -/** - * @brief Events from USB power system - */ -typedef enum -{ - NRF_DRV_POWER_USB_EVT_DETECTED, /**< USB power detected on the connector (plugged in). */ - NRF_DRV_POWER_USB_EVT_REMOVED, /**< USB power removed from the connector. */ - NRF_DRV_POWER_USB_EVT_READY /**< USB power regulator ready. */ -}nrf_drv_power_usb_evt_t; - -/** - * @brief USB power state - * - * The single enumerator that holds all data about current state of USB - * related POWER. - * - * Organized this way that higher power state has higher numeric value - */ -typedef enum -{ - NRF_DRV_POWER_USB_STATE_DISCONNECTED, /**< No power on USB lines detected */ - NRF_DRV_POWER_USB_STATE_CONNECTED, /**< The USB power is detected, but USB power regulator is not ready */ - NRF_DRV_POWER_USB_STATE_READY /**< From the power point of view USB is ready for working */ -}nrf_drv_power_usb_state_t; -#endif /* NRF_POWER_HAS_USBREG */ - -/** - * @name Callback types - * - * Defined types of callback functions - * @{ - */ -/** - * @brief Event handler for power failure warning - */ -typedef void (*nrf_drv_power_pofwarn_event_handler_t)(void); - -#if NRF_POWER_HAS_SLEEPEVT -/** - * @brief Event handler for entering/exiting sleep - * - * @param event Event type - */ -typedef void (*nrf_drv_power_sleep_event_handler_t)(nrf_drv_power_sleep_evt_t event); -#endif - -#if NRF_POWER_HAS_USBREG -/** - * @brief Event handler for USB related power events - * - * @param event Event type - */ -typedef void (*nrf_drv_power_usb_event_handler_t)(nrf_drv_power_usb_evt_t event); -#endif -/** @} */ - -/** - * @brief General power configuration - * - * Parameters required to initialize power driver. - */ -typedef struct -{ - /** - * @brief Enable main DCDC regulator - * - * This bit only informs the driver that elements for DCDC regulator - * are installed and regulator can be used. - * The regulator would be enabled or disabled automatically - * automatically by the hardware, basing on current power requirement. - */ - bool dcdcen:1; - -#if NRF_POWER_HAS_VDDH - /** - * @brief Enable HV DCDC regulator - * - * This bit only informs the driver that elements for DCDC regulator - * are installed and regulator can be used. - * The regulator would be enabled or disabled automatically - * automatically by the hardware, basing on current power requirement. - */ - bool dcdcenhv: 1; -#endif -}nrf_drv_power_config_t; - -/** - * @brief The configuration for power failure comparator - * - * Configuration used to enable and configure power failure comparator - */ -typedef struct -{ - nrf_drv_power_pofwarn_event_handler_t handler; //!< Event handler - nrf_power_pof_thr_t thr; //!< Threshold for power failure detection -#if NRF_POWER_HAS_VDDH - nrf_power_pof_thrvddh_t thrvddh; //!< Threshold for power failure detection on VDDH pin -#endif -}nrf_drv_power_pofwarn_config_t; - -#if NRF_POWER_HAS_SLEEPEVT -/** - * @brief The configuration of sleep event processing - * - * Configuration used to enable and configure sleep event handling - */ -typedef struct -{ - nrf_drv_power_sleep_event_handler_t handler; //!< Event handler - bool en_enter:1; //!< Enable event on sleep entering - bool en_exit :1; //!< Enable event on sleep exiting -}nrf_drv_power_sleepevt_config_t; -#endif - -#if NRF_POWER_HAS_USBREG -/** - * @brief The configuration of USB related power events - * - * Configuration used to enable and configure USB power event handling - */ -typedef struct -{ - nrf_drv_power_usb_event_handler_t handler; //!< Event processing -}nrf_drv_power_usbevt_config_t; -#endif /* NRF_POWER_HAS_USBREG */ - -/** - * @brief Function for checking if driver is already initialized - * - * This function is used to check whatever common POWER_CLOCK common interrupt - * should be disabled or not if @ref nrf_drv_clock tries to disable the interrupt. - * - * @retval true Driver is initialized - * @retval false Driver is uninitialized - * - * @sa nrf_drv_power_uninit - */ -bool nrf_drv_power_init_check(void); - -/** - * @brief Initialize power module driver - * - * Enabled power module driver would process all the interrupts from power system. - * - * @param[in] p_config Driver configuration. Can be NULL - the default configuration - * from @em sdk_config.h file would be used then. - * - * @retval NRF_ERROR_INVALID_STATE Power driver has to be enabled - * before SoftDevice. - * @retval NRF_ERROR_MODULE_ALREADY_INITIALIZED Module is initialized already. - * @retval NRF_SUCCESS Successfully initialized. - */ -ret_code_t nrf_drv_power_init(nrf_drv_power_config_t const * p_config); - -/** - * @brief Unintialize power module driver - * - * Disables all the interrupt handling in the module. - * - * @sa nrf_drv_power_init - */ -void nrf_drv_power_uninit(void); - -/** - * @brief Initialize power failure comparator - * - * Configures and setups the power failure comparator and enables it. - * - * @param[in] p_config Configuration with values and event handler. - * If event handler is set to NULL, interrupt would be disabled. - * - * @retval NRF_ERROR_INVALID_STATE POF is initialized when SD is enabled and - * the configuration differs from the old one and - * is not possible to be set using SD interface. - * @retval NRF_SUCCESS Successfully initialized and configured. - */ -ret_code_t nrf_drv_power_pof_init(nrf_drv_power_pofwarn_config_t const * p_config); - -/** - * @brief Turn off the power failure comparator - * - * Disables and clears the settings of the power failure comparator. - */ -void nrf_drv_power_pof_uninit(void); - -#if NRF_POWER_HAS_SLEEPEVT -/** - * @brief Initialize sleep entering and exiting events processing - * - * Configures and setups the sleep event processing. - * - * @param[in] p_config Configuration with values and event handler. - * - * @sa nrf_drv_power_sleepevt_uninit - * - * @note Sleep events are not available when SoftDevice is enabled. - * @note If sleep event is enabled when SoftDevice is initialized, sleep events - * would be automatically disabled - it is the limitation of the - * SoftDevice itself. - * - * @retval NRF_ERROR_INVALID_STATE This event cannot be initialized - * when SD is enabled. - * @retval NRF_SUCCESS Successfully initialized and configured. - */ -ret_code_t nrf_drv_power_sleepevt_init(nrf_drv_power_sleepevt_config_t const * p_config); - -/** - * @brief Uninitialize sleep entering and exiting events processing - * - * @sa nrf_drv_power_sleepevt_init - */ -void nrf_drv_power_sleepevt_uninit(void); -#endif /* NRF_POWER_HAS_SLEEPEVT */ - -#if NRF_POWER_HAS_USBREG -/** - * @brief Initialize USB power event processing - * - * Configures and setups the USB power event processing. - * - * @param[in] p_config Configuration with values and event handler. - * - * @sa nrf_drv_power_usbevt_uninit - * - * @retval NRF_ERROR_INVALID_STATE This event cannot be initialized - * when SD is enabled and SD does not support - * USB power events. - * @retval NRF_SUCCESS Successfully initialized and configured. - */ -ret_code_t nrf_drv_power_usbevt_init(nrf_drv_power_usbevt_config_t const * p_config); - -/** - * @brief Uninitalize USB power event processing - * - * @sa nrf_drv_power_usbevt_init - */ -void nrf_drv_power_usbevt_uninit(void); - -/** - * @brief Get the status of USB power - * - * @return Current USB power status - */ -__STATIC_INLINE nrf_drv_power_usb_state_t nrf_drv_power_usbstatus_get(void); - -#endif /* NRF_POWER_HAS_USBREG */ - -/** @} */ - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -#if NRF_POWER_HAS_USBREG -__STATIC_INLINE nrf_drv_power_usb_state_t nrf_drv_power_usbstatus_get(void) -{ - uint32_t status = nrf_power_usbregstatus_get(); - if (0 == (status & NRF_POWER_USBREGSTATUS_VBUSDETECT_MASK)) - { - return NRF_DRV_POWER_USB_STATE_DISCONNECTED; - } - if (0 == (status & NRF_POWER_USBREGSTATUS_OUTPUTRDY_MASK)) - { - return NRF_DRV_POWER_USB_STATE_CONNECTED; - } - return NRF_DRV_POWER_USB_STATE_READY; -} -#endif /* NRF_POWER_HAS_USBREG */ - -#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_DRV_POWER_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/ppi/nrf_drv_ppi.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/ppi/nrf_drv_ppi.c deleted file mode 100644 index 54611d809c6..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/ppi/nrf_drv_ppi.c +++ /dev/null @@ -1,540 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(PPI) -#include - -#include "nrf.h" -#include "nrf_drv_ppi.h" -#include "nrf_drv_common.h" -#include "nrf_ppi.h" -#include "app_util_platform.h" - -#define NRF_LOG_MODULE_NAME ppi - -#if PPI_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL PPI_CONFIG_LOG_LEVEL -#define NRF_LOG_INFO_COLOR PPI_CONFIG_INFO_COLOR -#define NRF_LOG_DEBUG_COLOR PPI_CONFIG_DEBUG_COLOR -#else //PPI_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL 0 -#endif //PPI_CONFIG_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - - -static nrf_drv_state_t m_drv_state; /**< Driver state */ -static uint32_t m_channels_allocated; /**< Bitmap representing channels availability. 1 when a channel is allocated, 0 otherwise. */ -static uint8_t m_groups_allocated; /**< Bitmap representing groups availability. 1 when a group is allocated, 0 otherwise.*/ - - -/**@brief Compute a group mask (needed for driver internals, not used for NRF_PPI registers). - * @param[in] group Group number to transform to a mask. - * @retval Group mask. - */ -__STATIC_INLINE uint32_t group_to_mask(nrf_ppi_channel_group_t group) -{ - return (1uL << (uint32_t) group); -} - - -/**@brief Check whether a channel is a programmable channel and can be used by an application. - * @param[in] channel Channel to check. - * @retval true The channel is a programmable application channel. - * false The channel is used by a SoftDevice or is preprogrammed. - */ -__STATIC_INLINE bool is_programmable_app_channel(nrf_ppi_channel_t channel) -{ - return ((NRF_PPI_PROG_APP_CHANNELS_MASK & nrf_drv_ppi_channel_to_mask(channel)) != 0); -} - - -/**@brief Check whether a channels can be used by an application. - * @param[in] channel Channel mask to check. - * @retval true All specified channels can be used by an application. - * false At least one specified channel is used by a SoftDevice. - */ -__STATIC_INLINE bool are_app_channels(uint32_t channel_mask) -{ - //lint -e(587) - return ((~(NRF_PPI_ALL_APP_CHANNELS_MASK) & channel_mask) == 0); -} - - -/**@brief Check whether a channel can be used by an application. - * @param[in] channel Channel to check. - * @retval true The channel can be used by an application. - * false The channel is used by a SoftDevice. - */ -__STATIC_INLINE bool is_app_channel(nrf_ppi_channel_t channel) -{ - return are_app_channels(nrf_drv_ppi_channel_to_mask(channel)); -} - - -/**@brief Check whether a channel group can be used by an application. - * @param[in] group Group to check. - * @retval true The group is an application group. - * false The group is not an application group (this group either does not exist or - * it is used by a SoftDevice). - */ -__STATIC_INLINE bool is_app_group(nrf_ppi_channel_group_t group) -{ - return ((NRF_PPI_ALL_APP_GROUPS_MASK & group_to_mask(group)) != 0); -} - - -/**@brief Check whether a channel is allocated. - * @param[in] channel_num Channel number to check. - * @retval true The channel is allocated. - * false The channel is not allocated. - */ -__STATIC_INLINE bool is_allocated_channel(nrf_ppi_channel_t channel) -{ - return ((m_channels_allocated & nrf_drv_ppi_channel_to_mask(channel)) != 0); -} - - -/**@brief Set channel allocated indication. - * @param[in] channel_num Specifies the channel to set the "allocated" indication. - */ -__STATIC_INLINE void channel_allocated_set(nrf_ppi_channel_t channel) -{ - m_channels_allocated |= nrf_drv_ppi_channel_to_mask(channel); -} - - -/**@brief Clear channel allocated indication. - * @param[in] channel_num Specifies the channel to clear the "allocated" indication. - */ -__STATIC_INLINE void channel_allocated_clr(nrf_ppi_channel_t channel) -{ - m_channels_allocated &= ~nrf_drv_ppi_channel_to_mask(channel); -} - - -/**@brief Clear all allocated channels. - */ -__STATIC_INLINE void channel_allocated_clr_all(void) -{ - m_channels_allocated &= ~NRF_PPI_ALL_APP_CHANNELS_MASK; -} - - -/**@brief Check whether a group is allocated. - * @param[in] group_num Group number to check. - * @retval true The group is allocated. - * false The group is not allocated. - */ -__STATIC_INLINE bool is_allocated_group(nrf_ppi_channel_group_t group) -{ - return ((m_groups_allocated & group_to_mask(group)) != 0); -} - - -/**@brief Set group allocated indication. - * @param[in] group_num Specifies the group to set the "allocated" indication. - */ -__STATIC_INLINE void group_allocated_set(nrf_ppi_channel_group_t group) -{ - m_groups_allocated |= group_to_mask(group); -} - - -/**@brief Clear group allocated indication. - * @param[in] group_num Specifies the group to clear the "allocated" indication. - */ -__STATIC_INLINE void group_allocated_clr(nrf_ppi_channel_group_t group) -{ - m_groups_allocated &= ~group_to_mask(group); -} - - -/**@brief Clear all allocated groups. - */ -__STATIC_INLINE void group_allocated_clr_all() -{ - m_groups_allocated &= ~NRF_PPI_ALL_APP_GROUPS_MASK; -} - - -uint32_t nrf_drv_ppi_init(void) -{ - uint32_t err_code; - - if (m_drv_state == NRF_DRV_STATE_UNINITIALIZED) - { - m_drv_state = NRF_DRV_STATE_INITIALIZED; - err_code = NRF_SUCCESS; - } - else - { - - err_code = NRF_ERROR_MODULE_ALREADY_INITIALIZED; - } - - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -uint32_t nrf_drv_ppi_uninit(void) -{ - ret_code_t err_code = NRF_SUCCESS; - uint32_t mask = NRF_PPI_ALL_APP_GROUPS_MASK; - nrf_ppi_channel_group_t group; - - if (m_drv_state == NRF_DRV_STATE_UNINITIALIZED) - { - err_code = NRF_ERROR_INVALID_STATE; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - m_drv_state = NRF_DRV_STATE_UNINITIALIZED; - - // Disable all channels and groups - nrf_ppi_channels_disable(NRF_PPI_ALL_APP_CHANNELS_MASK); - - for (group = NRF_PPI_CHANNEL_GROUP0; mask != 0; mask &= ~group_to_mask(group), group++) - { - if (mask & group_to_mask(group)) - { - nrf_ppi_channel_group_clear(group); - } - } - channel_allocated_clr_all(); - group_allocated_clr_all(); - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -uint32_t nrf_drv_ppi_channel_alloc(nrf_ppi_channel_t * p_channel) -{ - uint32_t err_code = NRF_SUCCESS; - nrf_ppi_channel_t channel; - uint32_t mask = 0; - - err_code = NRF_ERROR_NO_MEM; - - mask = NRF_PPI_PROG_APP_CHANNELS_MASK; - for (channel = NRF_PPI_CHANNEL0; mask != 0; mask &= ~nrf_drv_ppi_channel_to_mask(channel), channel++) - { - CRITICAL_REGION_ENTER(); - if ((mask & nrf_drv_ppi_channel_to_mask(channel)) && (!is_allocated_channel(channel))) - { - channel_allocated_set(channel); - *p_channel = channel; - err_code = NRF_SUCCESS; - } - CRITICAL_REGION_EXIT(); - if (err_code == NRF_SUCCESS) - { - NRF_LOG_INFO("Allocated channel: %d.", channel); - break; - } - } - - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -uint32_t nrf_drv_ppi_channel_free(nrf_ppi_channel_t channel) -{ - ret_code_t err_code = NRF_SUCCESS; - - if (!is_programmable_app_channel(channel)) - { - err_code = NRF_ERROR_INVALID_PARAM; - } - else - { - // First disable this channel - nrf_ppi_channel_disable(channel); - CRITICAL_REGION_ENTER(); - channel_allocated_clr(channel); - CRITICAL_REGION_EXIT(); - } - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -uint32_t nrf_drv_ppi_channel_assign(nrf_ppi_channel_t channel, uint32_t eep, uint32_t tep) -{ - VERIFY_PARAM_NOT_NULL((uint32_t *)eep); - VERIFY_PARAM_NOT_NULL((uint32_t *)tep); - - ret_code_t err_code = NRF_SUCCESS; - - if (!is_programmable_app_channel(channel)) - { - err_code = NRF_ERROR_INVALID_PARAM; - } - else if (!is_allocated_channel(channel)) - { - err_code = NRF_ERROR_INVALID_STATE; - } - else - { - nrf_ppi_channel_endpoint_setup(channel, eep, tep); - NRF_LOG_INFO("Assigned channel: %d, event end point: %x, task end point: %x.", channel, eep, tep); - } - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - -uint32_t nrf_drv_ppi_channel_fork_assign(nrf_ppi_channel_t channel, uint32_t fork_tep) -{ - ret_code_t err_code = NRF_SUCCESS; -#ifdef PPI_FEATURE_FORKS_PRESENT - if (!is_programmable_app_channel(channel)) - { - err_code = NRF_ERROR_INVALID_PARAM; - } - else if (!is_allocated_channel(channel)) - { - err_code = NRF_ERROR_INVALID_STATE; - } - else - { - nrf_ppi_fork_endpoint_setup(channel, fork_tep); - NRF_LOG_INFO("Fork assigned channel: %d, task end point: %d.", channel, fork_tep); - } - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -#else - err_code = NRF_ERROR_NOT_SUPPORTED; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -#endif -} - -uint32_t nrf_drv_ppi_channel_enable(nrf_ppi_channel_t channel) -{ - ret_code_t err_code = NRF_SUCCESS; - - if (!is_app_channel(channel)) - { - err_code = NRF_ERROR_INVALID_PARAM; - } - else if (is_programmable_app_channel(channel) && !is_allocated_channel(channel)) - { - err_code = NRF_ERROR_INVALID_STATE; - } - else - { - nrf_ppi_channel_enable(channel); - } - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -uint32_t nrf_drv_ppi_channel_disable(nrf_ppi_channel_t channel) -{ - ret_code_t err_code = NRF_SUCCESS; - - if (!is_app_channel(channel)) - { - err_code = NRF_ERROR_INVALID_PARAM; - } - else if (is_programmable_app_channel(channel) && !is_allocated_channel(channel)) - { - err_code = NRF_ERROR_INVALID_STATE; - } - else - { - nrf_ppi_channel_disable(channel); - err_code = NRF_SUCCESS; - } - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -uint32_t nrf_drv_ppi_group_alloc(nrf_ppi_channel_group_t * p_group) -{ - uint32_t err_code; - uint32_t mask = 0; - nrf_ppi_channel_group_t group; - - err_code = NRF_ERROR_NO_MEM; - - mask = NRF_PPI_ALL_APP_GROUPS_MASK; - for (group = NRF_PPI_CHANNEL_GROUP0; mask != 0; mask &= ~group_to_mask(group), group++) - { - CRITICAL_REGION_ENTER(); - if ((mask & group_to_mask(group)) && (!is_allocated_group(group))) - { - group_allocated_set(group); - *p_group = group; - err_code = NRF_SUCCESS; - } - CRITICAL_REGION_EXIT(); - if (err_code == NRF_SUCCESS) - { - NRF_LOG_INFO("Allocated group: %d.", group); - break; - } - } - - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -uint32_t nrf_drv_ppi_group_free(nrf_ppi_channel_group_t group) -{ - ret_code_t err_code = NRF_SUCCESS; - - if (!is_app_group(group)) - { - err_code = NRF_ERROR_INVALID_PARAM; - } - if (!is_allocated_group(group)) - { - err_code = NRF_ERROR_INVALID_STATE; - } - else - { - nrf_ppi_group_disable(group); - CRITICAL_REGION_ENTER(); - group_allocated_clr(group); - CRITICAL_REGION_EXIT(); - } - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -uint32_t nrf_drv_ppi_group_enable(nrf_ppi_channel_group_t group) -{ - ret_code_t err_code = NRF_SUCCESS; - - if (!is_app_group(group)) - { - err_code = NRF_ERROR_INVALID_PARAM; - } - else if (!is_allocated_group(group)) - { - err_code = NRF_ERROR_INVALID_STATE; - } - else - { - nrf_ppi_group_enable(group); - } - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -uint32_t nrf_drv_ppi_group_disable(nrf_ppi_channel_group_t group) -{ - ret_code_t err_code = NRF_SUCCESS; - - if (!is_app_group(group)) - { - err_code = NRF_ERROR_INVALID_PARAM; - } - else - { - nrf_ppi_group_disable(group); - } - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - -uint32_t nrf_drv_ppi_channels_remove_from_group(uint32_t channel_mask, - nrf_ppi_channel_group_t group) -{ - ret_code_t err_code = NRF_SUCCESS; - - if (!is_app_group(group)) - { - err_code = NRF_ERROR_INVALID_PARAM; - } - else if (!is_allocated_group(group)) - { - err_code = NRF_ERROR_INVALID_STATE; - } - else if (!are_app_channels(channel_mask)) - { - err_code = NRF_ERROR_INVALID_PARAM; - } - else - { - CRITICAL_REGION_ENTER(); - nrf_ppi_channels_remove_from_group(channel_mask, group); - CRITICAL_REGION_EXIT(); - } - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - -uint32_t nrf_drv_ppi_channels_include_in_group(uint32_t channel_mask, - nrf_ppi_channel_group_t group) -{ - ret_code_t err_code = NRF_SUCCESS; - - if (!is_app_group(group)) - { - err_code = NRF_ERROR_INVALID_PARAM; - } - else if (!is_allocated_group(group)) - { - err_code = NRF_ERROR_INVALID_STATE; - } - else if (!are_app_channels(channel_mask)) - { - err_code = NRF_ERROR_INVALID_PARAM; - } - else - { - CRITICAL_REGION_ENTER(); - nrf_ppi_channels_include_in_group(channel_mask, group); - CRITICAL_REGION_EXIT(); - } - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} -#endif //NRF_MODULE_ENABLED(PPI) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/ppi/nrf_drv_ppi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/ppi/nrf_drv_ppi.h deleted file mode 100644 index 91fdf96a363..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/ppi/nrf_drv_ppi.h +++ /dev/null @@ -1,316 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_DRV_PPI_H -#define NRF_DRV_PPI_H - -/*lint ++flb "Enter library region" */ -#include "sdk_errors.h" -#include "nrf_ppi.h" -#include -#include - -/** @file - * - * @addtogroup nrf_ppi PPI HAL and driver - * @ingroup nrf_drivers - * @brief Programmable Peripheral Interconnect (PPI) APIs. - * - * @details The PPI HAL provides basic APIs for accessing the registers of the PPI. - * The PPI driver provides APIs on a higher level. - * - * @defgroup nrf_drv_ppi PPI driver - * @{ - * @ingroup nrf_ppi - * - * @brief Programmable Peripheral Interconnect (PPI) driver. - */ - -#include "sdk_resources.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#if PPI_CH_NUM > 16 -#define NRF_PPI_ALL_APP_CHANNELS_MASK ((uint32_t)0xFFFFFFFFuL & ~(NRF_PPI_CHANNELS_USED)) /**< All PPI channels available to the application. */ -#define NRF_PPI_PROG_APP_CHANNELS_MASK ((uint32_t)0x000FFFFFuL & ~(NRF_PPI_CHANNELS_USED)) /**< Programmable PPI channels available to the application. */ -#else -#define NRF_PPI_ALL_APP_CHANNELS_MASK ((uint32_t)0xFFF0FFFFuL & ~(NRF_PPI_CHANNELS_USED)) /**< All PPI channels available to the application. */ -#define NRF_PPI_PROG_APP_CHANNELS_MASK ((uint32_t)0x0000FFFFuL & ~(NRF_PPI_CHANNELS_USED)) /**< Programmable PPI channels available to the application. */ -#endif - -#define NRF_PPI_ALL_APP_GROUPS_MASK (((1uL << PPI_GROUP_NUM) - 1) & ~(NRF_PPI_GROUPS_USED)) /**< All PPI groups available to the application. */ - - -/**@brief Function for initializing PPI module. - * - * @retval NRF_SUCCESS If the module was successfully initialized. - * @retval NRF_ERROR_MODULE_ALREADY_INITIALIZED If the module has already been initialized. - */ -uint32_t nrf_drv_ppi_init(void); - -/**@brief Function for uninitializing the PPI module. - * - * This function also disables all channels and clears the channel groups. - * - * @retval NRF_SUCCESS If the module was successfully uninitialized. - * @retval NRF_ERROR_INVALID_STATE If the module has not been initialized yet. - * @retval NRF_ERROR_INTERNAL If the channels or groups could not be disabled. - */ -uint32_t nrf_drv_ppi_uninit(void); - -/**@brief Function for allocating a PPI channel. - * @details This function allocates the first unused PPI channel. - * - * @param[out] p_channel Pointer to the PPI channel that has been allocated. - * - * @retval NRF_SUCCESS If the channel was successfully allocated. - * @retval NRF_ERROR_NO_MEM If there is no available channel to be used. - */ -uint32_t nrf_drv_ppi_channel_alloc(nrf_ppi_channel_t * p_channel); - -/**@brief Function for freeing a PPI channel. - * @details This function also disables the chosen channel. - * - * @param[in] channel PPI channel to be freed. - * - * @retval NRF_SUCCESS If the channel was successfully freed. - * @retval NRF_ERROR_INVALID_PARAM If the channel is not user-configurable. - */ -uint32_t nrf_drv_ppi_channel_free(nrf_ppi_channel_t channel); - -/**@brief Function for assigning task and event endpoints to the PPI channel. - * - * @param[in] channel PPI channel to be assigned endpoints. - * - * @param[in] eep Event endpoint address. - * - * @param[in] tep Task endpoint address. - * - * @retval NRF_SUCCESS If the channel was successfully assigned. - * @retval NRF_ERROR_INVALID_STATE If the channel is not allocated for the user. - * @retval NRF_ERROR_INVALID_PARAM If the channel is not user-configurable. - */ -uint32_t nrf_drv_ppi_channel_assign(nrf_ppi_channel_t channel, uint32_t eep, uint32_t tep); - -/**@brief Function for assigning or clearing fork endpoint to the PPI channel. - * - * @param[in] channel PPI channel to be assigned endpoints. - * - * @param[in] fork_tep Fork task endpoint address or 0 to clear. - * - * @retval NRF_SUCCESS If the channel was successfully assigned. - * @retval NRF_ERROR_INVALID_STATE If the channel is not allocated for the user. - * @retval NRF_ERROR_INVALID_PARAM If the channel is not user-configurable. - * @retval NRF_ERROR_NOT_SUPPORTED If function is not supported. - */ -uint32_t nrf_drv_ppi_channel_fork_assign(nrf_ppi_channel_t channel, uint32_t fork_tep); - -/**@brief Function for enabling a PPI channel. - * - * @param[in] channel PPI channel to be enabled. - * - * @retval NRF_SUCCESS If the channel was successfully enabled. - * @retval NRF_ERROR_INVALID_STATE If the user-configurable channel is not allocated. - * @retval NRF_ERROR_INVALID_PARAM If the channel cannot be enabled by the user. - */ -uint32_t nrf_drv_ppi_channel_enable(nrf_ppi_channel_t channel); - -/**@brief Function for disabling a PPI channel. - * - * @param[in] channel PPI channel to be disabled. - * - * @retval NRF_SUCCESS If the channel was successfully disabled. - * @retval NRF_ERROR_INVALID_STATE If the user-configurable channel is not allocated. - * @retval NRF_ERROR_INVALID_PARAM If the channel cannot be disabled by the user. - */ -uint32_t nrf_drv_ppi_channel_disable(nrf_ppi_channel_t channel); - -/**@brief Function for allocating a PPI channel group. - * @details This function allocates the first unused PPI group. - * - * @param[out] p_group Pointer to the PPI channel group that has been allocated. - * - * @retval NRF_SUCCESS If the channel group was successfully allocated. - * @retval NRF_ERROR_NO_MEM If there is no available channel group to be used. - */ -uint32_t nrf_drv_ppi_group_alloc(nrf_ppi_channel_group_t * p_group); - -/**@brief Function for freeing a PPI channel group. - * @details This function also disables the chosen group. - * - * @param[in] group PPI channel group to be freed. - * - * @retval NRF_SUCCESS If the channel group was successfully freed. - * @retval NRF_ERROR_INVALID_PARAM If the channel group is not user-configurable. - */ -uint32_t nrf_drv_ppi_group_free(nrf_ppi_channel_group_t group); - -/**@brief Compute a channel mask for NRF_PPI registers. - * - * @param[in] channel Channel number to transform to a mask. - * - * @retval Channel mask. - */ -__STATIC_INLINE uint32_t nrf_drv_ppi_channel_to_mask(nrf_ppi_channel_t channel) -{ - return (1uL << (uint32_t) channel); -} - -/**@brief Function for including multiple PPI channels in a channel group. - * - * @param[in] channel_mask PPI channels to be added. - * @param[in] group Channel group in which to include the channels. - * - * @retval NRF_SUCCESS If the channels was successfully included. - */ -uint32_t nrf_drv_ppi_channels_include_in_group(uint32_t channel_mask, - nrf_ppi_channel_group_t group); - -/**@brief Function for including a PPI channel in a channel group. - * - * @param[in] channel PPI channel to be added. - * @param[in] group Channel group in which to include the channel. - * - * @retval NRF_SUCCESS If the channel was successfully included. - */ -__STATIC_INLINE uint32_t nrf_drv_ppi_channel_include_in_group(nrf_ppi_channel_t channel, - nrf_ppi_channel_group_t group) -{ - return nrf_drv_ppi_channels_include_in_group(nrf_drv_ppi_channel_to_mask(channel), group); -} - -/**@brief Function for removing multiple PPI channels from a channel group. - * - * @param[in] channel_mask PPI channels to be removed. - * @param[in] group Channel group from which to remove the channels. - * - * @retval NRF_SUCCESS If the channel was successfully removed. - */ -uint32_t nrf_drv_ppi_channels_remove_from_group(uint32_t channel_mask, - nrf_ppi_channel_group_t group); - -/**@brief Function for removing a PPI channel from a channel group. - * - * @param[in] channel PPI channel to be removed. - * @param[in] group Channel group from which to remove the channel. - * - * @retval NRF_SUCCESS If the channel was successfully removed. - */ -__STATIC_INLINE uint32_t nrf_drv_ppi_channel_remove_from_group(nrf_ppi_channel_t channel, - nrf_ppi_channel_group_t group) -{ - return nrf_drv_ppi_channels_remove_from_group(nrf_drv_ppi_channel_to_mask(channel), group); -} - -/**@brief Function for clearing a PPI channel group. - * - * @param[in] group Channel group to be cleared. - * - * @retval NRF_SUCCESS If the group was successfully cleared. - */ -__STATIC_INLINE uint32_t nrf_drv_ppi_group_clear(nrf_ppi_channel_group_t group) -{ - return nrf_drv_ppi_channels_remove_from_group(NRF_PPI_ALL_APP_CHANNELS_MASK, group); -} - -/**@brief Function for enabling a PPI channel group. - * - * @param[in] group Channel group to be enabled. - * - * @retval NRF_SUCCESS If the group was successfully enabled. - */ -uint32_t nrf_drv_ppi_group_enable(nrf_ppi_channel_group_t group); - -/**@brief Function for disabling a PPI channel group. - * - * @param[in] group Channel group to be disabled. - * - * @retval NRF_SUCCESS If the group was successfully disabled. - */ -uint32_t nrf_drv_ppi_group_disable(nrf_ppi_channel_group_t group); - -/** - * @brief Function for getting the address of a PPI task. - * - * @param[in] task Task. - * - * @retval Task address. - */ -__STATIC_INLINE uint32_t nrf_drv_ppi_task_addr_get(nrf_ppi_task_t task) -{ - return (uint32_t) nrf_ppi_task_address_get(task); -} - -/** - * @brief Function for getting the address of a PPI group enable task. - * - * @param[in] group PPI channel group - * - * @retval Task address. - */ -__STATIC_INLINE uint32_t nrf_drv_ppi_task_addr_group_enable_get(nrf_ppi_channel_group_t group) -{ - return (uint32_t) nrf_ppi_task_group_enable_address_get(group); -} - -/** - * @brief Function for getting the address of a PPI group enable task. - * - * @param[in] group PPI channel group - * - * @retval Task address. - */ -__STATIC_INLINE uint32_t nrf_drv_ppi_task_addr_group_disable_get(nrf_ppi_channel_group_t group) -{ - return (uint32_t) nrf_ppi_task_group_disable_address_get(group); -} - -/** - *@} - **/ - -/*lint --flb "Leave library region" */ - -#ifdef __cplusplus -} -#endif - -#endif // NRF_DRV_PPI_H diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/pwm/nrf_drv_pwm.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/pwm/nrf_drv_pwm.c deleted file mode 100644 index 7be306d7e66..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/pwm/nrf_drv_pwm.c +++ /dev/null @@ -1,519 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(PWM) -#define ENABLED_PWM_COUNT (PWM0_ENABLED+PWM1_ENABLED+PWM2_ENABLED) -#if ENABLED_PWM_COUNT -#include -#include "nrf_drv_pwm.h" -#include "nrf_drv_common.h" -#include "nrf_gpio.h" -#include "app_util_platform.h" - -#define NRF_LOG_MODULE_NAME pwm - -#if PWM_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL PWM_CONFIG_LOG_LEVEL -#define NRF_LOG_INFO_COLOR PWM_CONFIG_INFO_COLOR -#define NRF_LOG_DEBUG_COLOR PWM_CONFIG_DEBUG_COLOR -#else //PWM_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL 0 -#endif //PWM_CONFIG_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - -#if NRF_MODULE_ENABLED(PWM_NRF52_ANOMALY_109_WORKAROUND) -// The workaround uses interrupts to wake up the CPU and ensure it is active -// when PWM is about to start a DMA transfer. For initial transfer, done when -// a playback is started via PPI, a specific EGU instance is used to generate -// an interrupt. During the playback, the PWM interrupt triggered on SEQEND -// event of a preceding sequence is used to protect the transfer done for -// the next sequence to be played. -#include "nrf_egu.h" -#define USE_DMA_ISSUE_WORKAROUND -#endif -#if defined(USE_DMA_ISSUE_WORKAROUND) -#define EGU_IRQn(i) EGU_IRQn_(i) -#define EGU_IRQn_(i) SWI##i##_EGU##i##_IRQn -#define EGU_IRQHandler(i) EGU_IRQHandler_(i) -#define EGU_IRQHandler_(i) SWI##i##_EGU##i##_IRQHandler -#define DMA_ISSUE_EGU_IDX PWM_NRF52_ANOMALY_109_EGU_INSTANCE -#define DMA_ISSUE_EGU CONCAT_2(NRF_EGU, DMA_ISSUE_EGU_IDX) -#define DMA_ISSUE_EGU_IRQn EGU_IRQn(DMA_ISSUE_EGU_IDX) -#define DMA_ISSUE_EGU_IRQHandler EGU_IRQHandler(DMA_ISSUE_EGU_IDX) -#endif - -// Control block - driver instance local data. -typedef struct -{ -#if defined(USE_DMA_ISSUE_WORKAROUND) - uint32_t starting_task_address; -#endif - nrf_drv_pwm_handler_t handler; - nrf_drv_state_t volatile state; - uint8_t flags; -} pwm_control_block_t; -static pwm_control_block_t m_cb[ENABLED_PWM_COUNT]; - -static void configure_pins(nrf_drv_pwm_t const * const p_instance, - nrf_drv_pwm_config_t const * p_config) -{ - uint32_t out_pins[NRF_PWM_CHANNEL_COUNT]; - uint8_t i; - - for (i = 0; i < NRF_PWM_CHANNEL_COUNT; ++i) - { - uint8_t output_pin = p_config->output_pins[i]; - if (output_pin != NRF_DRV_PWM_PIN_NOT_USED) - { - bool inverted = output_pin & NRF_DRV_PWM_PIN_INVERTED; - out_pins[i] = output_pin & ~NRF_DRV_PWM_PIN_INVERTED; - - if (inverted) - { - nrf_gpio_pin_set(out_pins[i]); - } - else - { - nrf_gpio_pin_clear(out_pins[i]); - } - - nrf_gpio_cfg_output(out_pins[i]); - } - else - { - out_pins[i] = NRF_PWM_PIN_NOT_CONNECTED; - } - } - - nrf_pwm_pins_set(p_instance->p_registers, out_pins); -} - - -ret_code_t nrf_drv_pwm_init(nrf_drv_pwm_t const * const p_instance, - nrf_drv_pwm_config_t const * p_config, - nrf_drv_pwm_handler_t handler) -{ - ASSERT(p_config); - - ret_code_t err_code; - - pwm_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - - if (p_cb->state != NRF_DRV_STATE_UNINITIALIZED) - { - err_code = NRF_ERROR_INVALID_STATE; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - p_cb->handler = handler; - - configure_pins(p_instance, p_config); - - nrf_pwm_enable(p_instance->p_registers); - nrf_pwm_configure(p_instance->p_registers, - p_config->base_clock, p_config->count_mode, p_config->top_value); - nrf_pwm_decoder_set(p_instance->p_registers, - p_config->load_mode, p_config->step_mode); - - nrf_pwm_shorts_set(p_instance->p_registers, 0); - nrf_pwm_int_set(p_instance->p_registers, 0); - nrf_pwm_event_clear(p_instance->p_registers, NRF_PWM_EVENT_LOOPSDONE); - nrf_pwm_event_clear(p_instance->p_registers, NRF_PWM_EVENT_SEQEND0); - nrf_pwm_event_clear(p_instance->p_registers, NRF_PWM_EVENT_SEQEND1); - nrf_pwm_event_clear(p_instance->p_registers, NRF_PWM_EVENT_STOPPED); - - // The workaround for nRF52 Anomaly 109 "protects" DMA transfers by handling - // interrupts generated on SEQEND0 and SEQEND1 events (this ensures that - // the 64 MHz clock is ready when data for the next sequence to be played - // is read). Therefore, the PWM interrupt must be enabled even if the event - // handler is not used. -#if defined(USE_DMA_ISSUE_WORKAROUND) - nrf_drv_common_irq_enable(DMA_ISSUE_EGU_IRQn, p_config->irq_priority); -#else - if (p_cb->handler) -#endif - { - nrf_drv_common_irq_enable(nrf_drv_get_IRQn(p_instance->p_registers), - p_config->irq_priority); - } - - p_cb->state = NRF_DRV_STATE_INITIALIZED; - - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -void nrf_drv_pwm_uninit(nrf_drv_pwm_t const * const p_instance) -{ - pwm_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - ASSERT(p_cb->state != NRF_DRV_STATE_UNINITIALIZED); - - nrf_drv_common_irq_disable(nrf_drv_get_IRQn(p_instance->p_registers)); -#if defined(USE_DMA_ISSUE_WORKAROUND) - nrf_drv_common_irq_disable(DMA_ISSUE_EGU_IRQn); -#endif - - nrf_pwm_disable(p_instance->p_registers); - - p_cb->state = NRF_DRV_STATE_UNINITIALIZED; -} - - -static uint32_t start_playback(nrf_drv_pwm_t const * const p_instance, - pwm_control_block_t * p_cb, - uint8_t flags, - nrf_pwm_task_t starting_task) -{ - p_cb->state = NRF_DRV_STATE_POWERED_ON; - p_cb->flags = flags; - - if (p_cb->handler) - { - // The notification about finished playback is by default enabled, - // but this can be suppressed. - // The notification that the peripheral has stopped is always enabled. - uint32_t int_mask = NRF_PWM_INT_LOOPSDONE_MASK | - NRF_PWM_INT_STOPPED_MASK; - - // The workaround for nRF52 Anomaly 109 "protects" DMA transfers by - // handling interrupts generated on SEQEND0 and SEQEND1 events (see - // 'nrf_drv_pwm_init'), hence these events must be always enabled - // to generate interrupts. - // However, the user handler is called for them only when requested - // (see 'irq_handler'). -#if defined(USE_DMA_ISSUE_WORKAROUND) - int_mask |= NRF_PWM_INT_SEQEND0_MASK | NRF_PWM_INT_SEQEND1_MASK; -#else - if (flags & NRF_DRV_PWM_FLAG_SIGNAL_END_SEQ0) - { - int_mask |= NRF_PWM_INT_SEQEND0_MASK; - } - if (flags & NRF_DRV_PWM_FLAG_SIGNAL_END_SEQ1) - { - int_mask |= NRF_PWM_INT_SEQEND1_MASK; - } -#endif - if (flags & NRF_DRV_PWM_FLAG_NO_EVT_FINISHED) - { - int_mask &= ~NRF_PWM_INT_LOOPSDONE_MASK; - } - - nrf_pwm_int_set(p_instance->p_registers, int_mask); - } -#if defined(USE_DMA_ISSUE_WORKAROUND) - else - { - nrf_pwm_int_set(p_instance->p_registers, - NRF_PWM_INT_SEQEND0_MASK | NRF_PWM_INT_SEQEND1_MASK); - } -#endif - - nrf_pwm_event_clear(p_instance->p_registers, NRF_PWM_EVENT_STOPPED); - - if (flags & NRF_DRV_PWM_FLAG_START_VIA_TASK) - { - uint32_t starting_task_address = - nrf_pwm_task_address_get(p_instance->p_registers, starting_task); - -#if defined(USE_DMA_ISSUE_WORKAROUND) - // To "protect" the initial DMA transfer it is required to start - // the PWM by triggering the proper task from EGU interrupt handler, - // it is not safe to do it directly via PPI. - p_cb->starting_task_address = starting_task_address; - nrf_egu_int_enable(DMA_ISSUE_EGU, - nrf_egu_int_get(DMA_ISSUE_EGU, p_instance->drv_inst_idx)); - return (uint32_t)nrf_egu_task_trigger_address_get(DMA_ISSUE_EGU, - p_instance->drv_inst_idx); -#else - return starting_task_address; -#endif - } - - nrf_pwm_task_trigger(p_instance->p_registers, starting_task); - return 0; -} - - -uint32_t nrf_drv_pwm_simple_playback(nrf_drv_pwm_t const * const p_instance, - nrf_pwm_sequence_t const * p_sequence, - uint16_t playback_count, - uint32_t flags) -{ - pwm_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - ASSERT(p_cb->state != NRF_DRV_STATE_UNINITIALIZED); - ASSERT(playback_count > 0); - ASSERT(nrf_drv_is_in_RAM(p_sequence->values.p_raw)); - - // To take advantage of the looping mechanism, we need to use both sequences - // (single sequence can be played back only once). - nrf_pwm_sequence_set(p_instance->p_registers, 0, p_sequence); - nrf_pwm_sequence_set(p_instance->p_registers, 1, p_sequence); - bool odd = (playback_count & 1); - nrf_pwm_loop_set(p_instance->p_registers, - (playback_count / 2) + (odd ? 1 : 0)); - - uint32_t shorts_mask; - if (flags & NRF_DRV_PWM_FLAG_STOP) - { - shorts_mask = NRF_PWM_SHORT_LOOPSDONE_STOP_MASK; - } - else if (flags & NRF_DRV_PWM_FLAG_LOOP) - { - shorts_mask = odd ? NRF_PWM_SHORT_LOOPSDONE_SEQSTART1_MASK - : NRF_PWM_SHORT_LOOPSDONE_SEQSTART0_MASK; - } - else - { - shorts_mask = 0; - } - nrf_pwm_shorts_set(p_instance->p_registers, shorts_mask); - - NRF_LOG_INFO("Function: %s, sequence length: %d.", - (uint32_t)__func__, - p_sequence->length); - NRF_LOG_DEBUG("Sequence data:"); - NRF_LOG_HEXDUMP_DEBUG((uint8_t *)p_sequence->values.p_raw, - p_sequence->length * sizeof(uint16_t)); - return start_playback(p_instance, p_cb, flags, - odd ? NRF_PWM_TASK_SEQSTART1 : NRF_PWM_TASK_SEQSTART0); -} - - -uint32_t nrf_drv_pwm_complex_playback(nrf_drv_pwm_t const * const p_instance, - nrf_pwm_sequence_t const * p_sequence_0, - nrf_pwm_sequence_t const * p_sequence_1, - uint16_t playback_count, - uint32_t flags) -{ - pwm_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - ASSERT(p_cb->state != NRF_DRV_STATE_UNINITIALIZED); - ASSERT(playback_count > 0); - ASSERT(nrf_drv_is_in_RAM(p_sequence_0->values.p_raw)); - ASSERT(nrf_drv_is_in_RAM(p_sequence_1->values.p_raw)); - - nrf_pwm_sequence_set(p_instance->p_registers, 0, p_sequence_0); - nrf_pwm_sequence_set(p_instance->p_registers, 1, p_sequence_1); - nrf_pwm_loop_set(p_instance->p_registers, playback_count); - - uint32_t shorts_mask; - if (flags & NRF_DRV_PWM_FLAG_STOP) - { - shorts_mask = NRF_PWM_SHORT_LOOPSDONE_STOP_MASK; - } - else if (flags & NRF_DRV_PWM_FLAG_LOOP) - { - shorts_mask = NRF_PWM_SHORT_LOOPSDONE_SEQSTART0_MASK; - } - else - { - shorts_mask = 0; - } - nrf_pwm_shorts_set(p_instance->p_registers, shorts_mask); - - NRF_LOG_INFO("Function: %s, sequence 0 length: %d.", - (uint32_t)__func__, - p_sequence_0->length); - NRF_LOG_INFO("Function: %s, sequence 1 length: %d.", - (uint32_t)__func__, - p_sequence_1->length); - NRF_LOG_DEBUG("Sequence 0 data:"); - NRF_LOG_HEXDUMP_DEBUG((uint8_t *)p_sequence_0->values.p_raw, - p_sequence_0->length * sizeof(uint16_t)); - NRF_LOG_DEBUG("Sequence 1 data:"); - NRF_LOG_HEXDUMP_DEBUG((uint8_t *)p_sequence_1->values.p_raw, - p_sequence_1->length * sizeof(uint16_t)); - return start_playback(p_instance, p_cb, flags, NRF_PWM_TASK_SEQSTART0); -} - - -bool nrf_drv_pwm_stop(nrf_drv_pwm_t const * const p_instance, - bool wait_until_stopped) -{ - ASSERT(m_cb[p_instance->drv_inst_idx].state != NRF_DRV_STATE_UNINITIALIZED); - - bool ret_val = false; - - if (nrf_drv_pwm_is_stopped(p_instance)) - { - ret_val = true; - } - else - { - nrf_pwm_task_trigger(p_instance->p_registers, NRF_PWM_TASK_STOP); - - do { - if (nrf_drv_pwm_is_stopped(p_instance)) - { - ret_val = true; - break; - } - } while (wait_until_stopped); - } - - NRF_LOG_INFO("%s returned %d.", (uint32_t)__func__, ret_val); - return ret_val; -} - - -bool nrf_drv_pwm_is_stopped(nrf_drv_pwm_t const * const p_instance) -{ - pwm_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - ASSERT(p_cb->state != NRF_DRV_STATE_UNINITIALIZED); - - bool ret_val = false; - - // If the event handler is used (interrupts are enabled), the state will - // be changed in interrupt handler when the STOPPED event occurs. - if (p_cb->state != NRF_DRV_STATE_POWERED_ON) - { - ret_val = true; - } - // If interrupts are disabled, we must check the STOPPED event here. - if (nrf_pwm_event_check(p_instance->p_registers, NRF_PWM_EVENT_STOPPED)) - { - p_cb->state = NRF_DRV_STATE_INITIALIZED; - NRF_LOG_INFO("Disabled."); - ret_val = true; - } - - NRF_LOG_INFO("%s returned %d.", (uint32_t)__func__, ret_val); - return ret_val; -} - - -static void irq_handler(NRF_PWM_Type * p_pwm, pwm_control_block_t * p_cb) -{ - // The user handler is called for SEQEND0 and SEQEND1 events only when the - // user asks for it (by setting proper flags when starting the playback). - if (nrf_pwm_event_check(p_pwm, NRF_PWM_EVENT_SEQEND0)) - { - nrf_pwm_event_clear(p_pwm, NRF_PWM_EVENT_SEQEND0); - if ((p_cb->flags & NRF_DRV_PWM_FLAG_SIGNAL_END_SEQ0) && p_cb->handler) - { - p_cb->handler(NRF_DRV_PWM_EVT_END_SEQ0); - } - } - if (nrf_pwm_event_check(p_pwm, NRF_PWM_EVENT_SEQEND1)) - { - nrf_pwm_event_clear(p_pwm, NRF_PWM_EVENT_SEQEND1); - if ((p_cb->flags & NRF_DRV_PWM_FLAG_SIGNAL_END_SEQ1) && p_cb->handler) - { - p_cb->handler(NRF_DRV_PWM_EVT_END_SEQ1); - } - } - // For LOOPSDONE the handler is called by default, but the user can disable - // this (via flags). - if (nrf_pwm_event_check(p_pwm, NRF_PWM_EVENT_LOOPSDONE)) - { - nrf_pwm_event_clear(p_pwm, NRF_PWM_EVENT_LOOPSDONE); - if (!(p_cb->flags & NRF_DRV_PWM_FLAG_NO_EVT_FINISHED) && p_cb->handler) - { - p_cb->handler(NRF_DRV_PWM_EVT_FINISHED); - } - } - - // The STOPPED event is always propagated to the user handler. - if (nrf_pwm_event_check(p_pwm, NRF_PWM_EVENT_STOPPED)) - { - nrf_pwm_event_clear(p_pwm, NRF_PWM_EVENT_STOPPED); - - p_cb->state = NRF_DRV_STATE_INITIALIZED; - if (p_cb->handler) - { - p_cb->handler(NRF_DRV_PWM_EVT_STOPPED); - } - } -} - - -#if defined(USE_DMA_ISSUE_WORKAROUND) -// See 'start_playback' why this is needed. -void DMA_ISSUE_EGU_IRQHandler(void) -{ - int i; - for (i = 0; i < ENABLED_PWM_COUNT; ++i) - { - volatile uint32_t * p_event_reg = - nrf_egu_event_triggered_address_get(DMA_ISSUE_EGU, i); - if (*p_event_reg) - { - *p_event_reg = 0; - *(volatile uint32_t *)(m_cb[i].starting_task_address) = 1; - } - } -} -#endif - -#if NRF_MODULE_ENABLED(PWM0) && defined (PWM0_CH_NUM) -void PWM0_IRQHandler(void) -{ - irq_handler(NRF_PWM0, &m_cb[PWM0_INSTANCE_INDEX]); -} -#endif - -#if NRF_MODULE_ENABLED(PWM1) && defined (PWM1_CH_NUM) -void PWM1_IRQHandler(void) -{ - irq_handler(NRF_PWM1, &m_cb[PWM1_INSTANCE_INDEX]); -} -#endif - -#if NRF_MODULE_ENABLED(PWM2) && defined (PWM2_CH_NUM) -void PWM2_IRQHandler(void) -{ - irq_handler(NRF_PWM2, &m_cb[PWM2_INSTANCE_INDEX]); -} -#endif - -#if PWM3_ENABLED && defined (PWM3_CH_NUM) -void PWM3_IRQHandler(void) -{ - irq_handler(NRF_PWM3, &m_cb[PWM3_INSTANCE_INDEX]); -} -#endif - -#endif //ENABLED_PWM_COUNT -#endif //NRF_MODULE_ENABLED(PWM) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/pwm/nrf_drv_pwm.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/pwm/nrf_drv_pwm.h deleted file mode 100644 index a5cece0c665..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/pwm/nrf_drv_pwm.h +++ /dev/null @@ -1,512 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/**@file - * @addtogroup nrf_pwm PWM HAL and driver - * @ingroup nrf_drivers - * @brief @tagAPI52 Pulse Width Modulation (PWM) module APIs. - * - * @defgroup nrf_drv_pwm PWM driver - * @{ - * @ingroup nrf_pwm - * @brief @tagAPI52 Pulse Width Modulation (PWM) module driver. - */ - - -#ifndef NRF_DRV_PWM_H__ -#define NRF_DRV_PWM_H__ - -#include "nordic_common.h" -#include "sdk_config.h" -#include "nrf_pwm.h" -#include "sdk_errors.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#ifndef PWM0_ENABLED -#define PWM0_ENABLED 0 -#endif -#ifndef PWM1_ENABLED -#define PWM1_ENABLED 0 -#endif -#ifndef PWM2_ENABLED -#define PWM2_ENABLED 0 -#endif -#ifndef PWM3_ENABLED -#define PWM3_ENABLED 0 -#endif -/** - * @brief PWM driver instance data structure. - */ -typedef struct -{ - NRF_PWM_Type * p_registers; ///< Pointer to the structure with PWM peripheral instance registers. - uint8_t drv_inst_idx; ///< Driver instance index. -} nrf_drv_pwm_t; - -#define PWM0_INSTANCE_INDEX 0 -#define PWM1_INSTANCE_INDEX PWM0_INSTANCE_INDEX+PWM0_ENABLED -#define PWM2_INSTANCE_INDEX PWM1_INSTANCE_INDEX+PWM1_ENABLED -#define PWM3_INSTANCE_INDEX PWM2_INSTANCE_INDEX+PWM2_ENABLED - -/** - * @brief Macro for creating a PWM driver instance. - */ -#define NRF_DRV_PWM_INSTANCE(id) \ -{ \ - .p_registers = CONCAT_2(NRF_PWM, id), \ - .drv_inst_idx = CONCAT_3(PWM, id, _INSTANCE_INDEX), \ -} - - -/** - * @brief This value can be provided instead of a pin number for any channel - * to specify that its output is not used and therefore does not need - * to be connected to a pin. - */ -#define NRF_DRV_PWM_PIN_NOT_USED 0xFF - -/** - * @brief This value can be added to a pin number to inverse its polarity - * (set idle state = 1). - */ -#define NRF_DRV_PWM_PIN_INVERTED 0x80 - -/** - * @brief PWM driver configuration structure. - */ -typedef struct -{ - uint8_t output_pins[NRF_PWM_CHANNEL_COUNT]; ///< Pin numbers for individual output channels (optional). - /**< Use @ref NRF_DRV_PWM_PIN_NOT_USED - * if a given output channel is not needed. */ - uint8_t irq_priority; ///< Interrupt priority. - nrf_pwm_clk_t base_clock; ///< Base clock frequency. - nrf_pwm_mode_t count_mode; ///< Operating mode of the pulse generator counter. - uint16_t top_value; ///< Value up to which the pulse generator counter counts. - nrf_pwm_dec_load_t load_mode; ///< Mode of loading sequence data from RAM. - nrf_pwm_dec_step_t step_mode; ///< Mode of advancing the active sequence. -} nrf_drv_pwm_config_t; - -/** - * @brief PWM driver default configuration. - */ -#define NRF_DRV_PWM_DEFAULT_CONFIG \ -{ \ - .output_pins = {PWM_DEFAULT_CONFIG_OUT0_PIN, \ - PWM_DEFAULT_CONFIG_OUT1_PIN, \ - PWM_DEFAULT_CONFIG_OUT2_PIN, \ - PWM_DEFAULT_CONFIG_OUT3_PIN }, \ - .irq_priority = PWM_DEFAULT_CONFIG_IRQ_PRIORITY, \ - .base_clock = (nrf_pwm_clk_t)PWM_DEFAULT_CONFIG_BASE_CLOCK, \ - .count_mode = (nrf_pwm_mode_t)PWM_DEFAULT_CONFIG_COUNT_MODE, \ - .top_value = PWM_DEFAULT_CONFIG_TOP_VALUE, \ - .load_mode = (nrf_pwm_dec_load_t)PWM_DEFAULT_CONFIG_LOAD_MODE, \ - .step_mode = (nrf_pwm_dec_step_t)PWM_DEFAULT_CONFIG_STEP_MODE, \ -} - - -/** - * @brief PWM flags providing additional playback options. - */ -typedef enum -{ - NRF_DRV_PWM_FLAG_STOP = 0x01, /**< When the requested playback is finished, - the peripheral should be stopped. - @note The STOP task is triggered when - the last value of the final sequence is - loaded from RAM, and the peripheral stops - at the end of the current PWM period. - For sequences with configured repeating - of duty cycle values, this might result in - less than the requested number of repeats - of the last value. */ - NRF_DRV_PWM_FLAG_LOOP = 0x02, /**< When the requested playback is finished, - it should be started from the beginning. - This flag is ignored if used together - with @ref NRF_DRV_PWM_FLAG_STOP. - @note The playback restart is done via a - shortcut configured in the PWM peripheral. - This shortcut triggers the proper starting - task when the final value of previous - playback is read from RAM and applied to - the pulse generator counter. - When this mechanism is used together with - the @ref NRF_PWM_STEP_TRIGGERED mode, - the playback restart will occur right - after switching to the final value (this - final value will be played only once). */ - NRF_DRV_PWM_FLAG_SIGNAL_END_SEQ0 = 0x04, /**< The event handler should be - called when the last value - from sequence 0 is loaded. */ - NRF_DRV_PWM_FLAG_SIGNAL_END_SEQ1 = 0x08, /**< The event handler should be - called when the last value - from sequence 1 is loaded. */ - NRF_DRV_PWM_FLAG_NO_EVT_FINISHED = 0x10, /**< The playback finished event - (enabled by default) should be - suppressed. */ - NRF_DRV_PWM_FLAG_START_VIA_TASK = 0x80, /**< The playback should not be - started directly by the called - function. Instead, the function - should only prepare it and - return the address of the task - to be triggered to start the - playback. */ -} nrf_drv_pwm_flag_t; - - -/** - * @brief PWM driver event type. - */ -typedef enum -{ - NRF_DRV_PWM_EVT_FINISHED, ///< Sequence playback finished. - NRF_DRV_PWM_EVT_END_SEQ0, /**< End of sequence 0 reached. Its data can be - safely modified now. */ - NRF_DRV_PWM_EVT_END_SEQ1, /**< End of sequence 1 reached. Its data can be - safely modified now. */ - NRF_DRV_PWM_EVT_STOPPED, ///< The PWM peripheral has been stopped. -} nrf_drv_pwm_evt_type_t; - -/** - * @brief PWM driver event handler type. - */ -typedef void (* nrf_drv_pwm_handler_t)(nrf_drv_pwm_evt_type_t event_type); - - -/** - * @brief Function for initializing the PWM driver. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] p_config Pointer to the structure with initial configuration. - * - * @param[in] handler Event handler provided by the user. If NULL is passed - * instead, event notifications are not done and PWM - * interrupts are disabled. - * - * @retval NRF_SUCCESS If initialization was successful. - * @retval NRF_ERROR_INVALID_STATE If the driver was already initialized. - */ -ret_code_t nrf_drv_pwm_init(nrf_drv_pwm_t const * const p_instance, - nrf_drv_pwm_config_t const * p_config, - nrf_drv_pwm_handler_t handler); - -/** - * @brief Function for uninitializing the PWM driver. - * - * If any sequence playback is in progress, it is stopped immediately. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -void nrf_drv_pwm_uninit(nrf_drv_pwm_t const * const p_instance); - -/** - * @brief Function for starting a single sequence playback. - * - * To take advantage of the looping mechanism in the PWM peripheral, both - * sequences must be used (single sequence can be played back only once by - * the peripheral). Therefore, the provided sequence is internally set and - * played back as both sequence 0 and sequence 1. Consequently, if end of - * sequence notifications are required, events for both sequences should be - * used (that means that both the @ref NRF_DRV_PWM_FLAG_SIGNAL_END_SEQ0 flag - * and the @ref NRF_DRV_PWM_FLAG_SIGNAL_END_SEQ1 flag should be specified and - * the @ref NRF_DRV_PWM_EVT_END_SEQ0 event and the @ref NRF_DRV_PWM_EVT_END_SEQ1 - * event should be handled in the same way). - * - * Use the @ref NRF_DRV_PWM_FLAG_START_VIA_TASK flag if you want the playback - * to be only prepared by this function, and you want to start it later by - * triggering a task (using PPI for instance). The function will then return - * the address of the task to be triggered. - * - * @note The array containing the duty cycle values for the specified sequence - * must be in RAM and cannot be allocated on stack. - * For detailed information, see @ref nrf_pwm_sequence_t. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] p_sequence Sequence to be played back. - * @param[in] playback_count Number of playbacks to be performed (must not be 0). - * @param[in] flags Additional options. Pass any combination of - * @ref nrf_drv_pwm_flag_t "playback flags", or 0 - * for default settings. - * - * @return Address of the task to be triggered to start the playback if the @ref - * NRF_DRV_PWM_FLAG_START_VIA_TASK flag was used, 0 otherwise. - */ -uint32_t nrf_drv_pwm_simple_playback(nrf_drv_pwm_t const * const p_instance, - nrf_pwm_sequence_t const * p_sequence, - uint16_t playback_count, - uint32_t flags); - -/** - * @brief Function for starting a two-sequence playback. - * - * Use the @ref NRF_DRV_PWM_FLAG_START_VIA_TASK flag if you want the playback - * to be only prepared by this function, and you want to start it later by - * triggering a task (using PPI for instance). The function will then return - * the address of the task to be triggered. - * - * @note The array containing the duty cycle values for the specified sequence - * must be in RAM and cannot be allocated on stack. - * For detailed information, see @ref nrf_pwm_sequence_t. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] p_sequence_0 First sequence to be played back. - * @param[in] p_sequence_1 Second sequence to be played back. - * @param[in] playback_count Number of playbacks to be performed (must not be 0). - * @param[in] flags Additional options. Pass any combination of - * @ref nrf_drv_pwm_flag_t "playback flags", or 0 - * for default settings. - * - * @return Address of the task to be triggered to start the playback if the @ref - * NRF_DRV_PWM_FLAG_START_VIA_TASK flag was used, 0 otherwise. - */ -uint32_t nrf_drv_pwm_complex_playback(nrf_drv_pwm_t const * const p_instance, - nrf_pwm_sequence_t const * p_sequence_0, - nrf_pwm_sequence_t const * p_sequence_1, - uint16_t playback_count, - uint32_t flags); - -/** - * @brief Function for advancing the active sequence. - * - * This function only applies to @ref NRF_PWM_STEP_TRIGGERED mode. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -__STATIC_INLINE void nrf_drv_pwm_step(nrf_drv_pwm_t const * const p_instance); - -/** - * @brief Function for stopping the sequence playback. - * - * The playback is stopped at the end of the current PWM period. - * This means that if the active sequence is configured to repeat each duty - * cycle value for a certain number of PWM periods, the last played value - * might appear on the output less times than requested. - * - * @note This function can be instructed to wait until the playback is stopped - * (by setting @p wait_until_stopped to true). Note that, depending on - * the length of the PMW period, this might take a significant amount of - * time. Alternatively, the @ref nrf_drv_pwm_is_stopped function can be - * used to poll the status, or the @ref NRF_DRV_PWM_EVT_STOPPED event can - * be used to get the notification when the playback is stopped, provided - * the event handler is defined. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] wait_until_stopped If true, the function will not return until - * the playback is stopped. - * - * @retval true If the PWM peripheral is stopped. - * @retval false If the PWM peripheral is not stopped. - */ -bool nrf_drv_pwm_stop(nrf_drv_pwm_t const * const p_instance, - bool wait_until_stopped); - -/** - * @brief Function for checking the status of the PWM peripheral. - * - * @param[in] p_instance Pointer to the driver instance structure. - * - * @retval true If the PWM peripheral is stopped. - * @retval false If the PWM peripheral is not stopped. - */ -bool nrf_drv_pwm_is_stopped(nrf_drv_pwm_t const * const p_instance); - -/** - * @brief Function for updating the sequence data during playback. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] seq_id Identifier of the sequence (0 or 1). - * @param[in] p_sequence Pointer to the new sequence definition. - */ -__STATIC_INLINE void nrf_drv_pwm_sequence_update( - nrf_drv_pwm_t const * const p_instance, - uint8_t seq_id, - nrf_pwm_sequence_t const * p_sequence); - -/** - * @brief Function for updating the pointer to the duty cycle values - * in the specified sequence during playback. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] seq_id Identifier of the sequence (0 or 1). - * @param[in] values New pointer to the duty cycle values. - */ -__STATIC_INLINE void nrf_drv_pwm_sequence_values_update( - nrf_drv_pwm_t const * const p_instance, - uint8_t seq_id, - nrf_pwm_values_t values); - -/** - * @brief Function for updating the number of duty cycle values - * in the specified sequence during playback. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] seq_id Identifier of the sequence (0 or 1). - * @param[in] length New number of the duty cycle values. - */ -__STATIC_INLINE void nrf_drv_pwm_sequence_length_update( - nrf_drv_pwm_t const * const p_instance, - uint8_t seq_id, - uint16_t length); - -/** - * @brief Function for updating the number of repeats for duty cycle values - * in specified sequence during playback. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] seq_id Identifier of the sequence (0 or 1). - * @param[in] repeats New number of repeats. - */ -__STATIC_INLINE void nrf_drv_pwm_sequence_repeats_update( - nrf_drv_pwm_t const * const p_instance, - uint8_t seq_id, - uint32_t repeats); - -/** - * @brief Function for updating the additional delay after the specified - * sequence during playback. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] seq_id Identifier of the sequence (0 or 1). - * @param[in] end_delay New end delay value (in PWM periods). - */ -__STATIC_INLINE void nrf_drv_pwm_sequence_end_delay_update( - nrf_drv_pwm_t const * const p_instance, - uint8_t seq_id, - uint32_t end_delay); - -/** - * @brief Function for returning the address of a specified PWM task that can - * be used in PPI module. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] task Requested task. - * - * @return Task address. - */ -__STATIC_INLINE uint32_t nrf_drv_pwm_task_address_get( - nrf_drv_pwm_t const * const p_instance, - nrf_pwm_task_t task); - -/**@brief Function for returning the address of a specified PWM event that can - * be used in PPI module. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] event Requested event. - * - * @return Event address. - */ -__STATIC_INLINE uint32_t nrf_drv_pwm_event_address_get( - nrf_drv_pwm_t const * const p_instance, - nrf_pwm_event_t event); - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_drv_pwm_step(nrf_drv_pwm_t const * const p_instance) -{ - nrf_pwm_task_trigger(p_instance->p_registers, NRF_PWM_TASK_NEXTSTEP); -} - -__STATIC_INLINE void nrf_drv_pwm_sequence_update( - nrf_drv_pwm_t const * const p_instance, - uint8_t seq_id, - nrf_pwm_sequence_t const * p_sequence) -{ - nrf_pwm_sequence_set(p_instance->p_registers, seq_id, p_sequence); -} - -__STATIC_INLINE void nrf_drv_pwm_sequence_values_update( - nrf_drv_pwm_t const * const p_instance, - uint8_t seq_id, - nrf_pwm_values_t values) -{ - nrf_pwm_seq_ptr_set(p_instance->p_registers, seq_id, values.p_raw); -} - -__STATIC_INLINE void nrf_drv_pwm_sequence_length_update( - nrf_drv_pwm_t const * const p_instance, - uint8_t seq_id, - uint16_t length) -{ - nrf_pwm_seq_cnt_set(p_instance->p_registers, seq_id, length); -} - -__STATIC_INLINE void nrf_drv_pwm_sequence_repeats_update( - nrf_drv_pwm_t const * const p_instance, - uint8_t seq_id, - uint32_t repeats) -{ - nrf_pwm_seq_refresh_set(p_instance->p_registers, seq_id, repeats); -} - -__STATIC_INLINE void nrf_drv_pwm_sequence_end_delay_update( - nrf_drv_pwm_t const * const p_instance, - uint8_t seq_id, - uint32_t end_delay) -{ - nrf_pwm_seq_end_delay_set(p_instance->p_registers, seq_id, end_delay); -} - -__STATIC_INLINE uint32_t nrf_drv_pwm_task_address_get( - nrf_drv_pwm_t const * const p_instance, - nrf_pwm_task_t task) -{ - return nrf_pwm_task_address_get(p_instance->p_registers, task); -} - -__STATIC_INLINE uint32_t nrf_drv_pwm_event_address_get( - nrf_drv_pwm_t const * const p_instance, - nrf_pwm_event_t event) -{ - return nrf_pwm_event_address_get(p_instance->p_registers, event); -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_DRV_PWM_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/qdec/nrf_drv_qdec.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/qdec/nrf_drv_qdec.c deleted file mode 100644 index 33fdfafc9db..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/qdec/nrf_drv_qdec.c +++ /dev/null @@ -1,234 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(QDEC) -#include -#include - -#include "nrf.h" -#include "nrf_gpio.h" -#include "nrf_error.h" -#include "nrf_assert.h" -#include "nrf_drv_common.h" -#include "nrf_drv_qdec.h" -#include "app_util_platform.h" -#include "nrf_assert.h" - -#define NRF_LOG_MODULE_NAME qdec - -#if QDEC_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL QDEC_CONFIG_LOG_LEVEL -#define NRF_LOG_INFO_COLOR QDEC_CONFIG_INFO_COLOR -#define NRF_LOG_DEBUG_COLOR QDEC_CONFIG_DEBUG_COLOR -#define EVT_TO_STR(event) (event == NRF_QDEC_EVENT_SAMPLERDY ? "NRF_QDEC_EVENT_SAMPLERDY" : \ - (event == NRF_QDEC_EVENT_REPORTRDY ? "NRF_QDEC_EVENT_REPORTRDY" : \ - (event == NRF_QDEC_EVENT_ACCOF ? "NRF_QDEC_EVENT_ACCOF" : "UNKNOWN EVENT"))) -#else //QDEC_CONFIG_LOG_ENABLED -#define EVT_TO_STR(event) "" -#define NRF_LOG_LEVEL 0 -#endif //QDEC_CONFIG_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - - -static qdec_event_handler_t m_qdec_event_handler = NULL; -static const nrf_drv_qdec_config_t m_default_config = NRF_DRV_QDEC_DEFAULT_CONFIG; -static nrf_drv_state_t m_state = NRF_DRV_STATE_UNINITIALIZED; - -void QDEC_IRQHandler(void) -{ - nrf_drv_qdec_event_t event; - if ( nrf_qdec_event_check(NRF_QDEC_EVENT_SAMPLERDY) && - nrf_qdec_int_enable_check(NRF_QDEC_INT_SAMPLERDY_MASK) ) - { - nrf_qdec_event_clear(NRF_QDEC_EVENT_SAMPLERDY); - NRF_LOG_DEBUG("Event: %s.", (uint32_t)EVT_TO_STR(NRF_QDEC_EVENT_SAMPLERDY)); - - event.type = NRF_QDEC_EVENT_SAMPLERDY; - event.data.sample.value = (int8_t)nrf_qdec_sample_get(); - m_qdec_event_handler(event); - } - - if ( nrf_qdec_event_check(NRF_QDEC_EVENT_REPORTRDY) && - nrf_qdec_int_enable_check(NRF_QDEC_INT_REPORTRDY_MASK) ) - { - nrf_qdec_event_clear(NRF_QDEC_EVENT_REPORTRDY); - NRF_LOG_DEBUG("Event: %s.", (uint32_t)EVT_TO_STR(NRF_QDEC_INT_REPORTRDY_MASK)); - - event.type = NRF_QDEC_EVENT_REPORTRDY; - - event.data.report.acc = (int16_t)nrf_qdec_accread_get(); - event.data.report.accdbl = (uint16_t)nrf_qdec_accdblread_get(); - m_qdec_event_handler(event); - } - - if ( nrf_qdec_event_check(NRF_QDEC_EVENT_ACCOF) && - nrf_qdec_int_enable_check(NRF_QDEC_INT_ACCOF_MASK) ) - { - nrf_qdec_event_clear(NRF_QDEC_EVENT_ACCOF); - NRF_LOG_DEBUG("Event: %s.", (uint32_t)EVT_TO_STR(NRF_QDEC_EVENT_ACCOF)); - - event.type = NRF_QDEC_EVENT_ACCOF; - m_qdec_event_handler(event); - } -} - - -ret_code_t nrf_drv_qdec_init(const nrf_drv_qdec_config_t * p_config, - qdec_event_handler_t event_handler) -{ - ret_code_t err_code; - - if (m_state != NRF_DRV_STATE_UNINITIALIZED) - { - err_code = NRF_ERROR_INVALID_STATE; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - if (p_config == NULL) - { - p_config = &m_default_config; - } - - if (event_handler) - { - m_qdec_event_handler = event_handler; - } - else - { - err_code = NRF_ERROR_INVALID_PARAM; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - nrf_qdec_sampleper_set(p_config->sampleper); - nrf_gpio_cfg_input(p_config->pselled, NRF_GPIO_PIN_NOPULL); - nrf_gpio_cfg_input(p_config->psela, NRF_GPIO_PIN_NOPULL); - nrf_gpio_cfg_input(p_config->pselb, NRF_GPIO_PIN_NOPULL); - nrf_qdec_pio_assign( p_config->psela, p_config->pselb, p_config->pselled); - nrf_qdec_ledpre_set(p_config->ledpre); - nrf_qdec_ledpol_set(p_config->ledpol); - nrf_qdec_shorts_enable(NRF_QDEC_SHORT_REPORTRDY_READCLRACC_MASK); - - if (p_config->dbfen) - { - nrf_qdec_dbfen_enable(); - } - else - { - nrf_qdec_dbfen_disable(); - } - - uint32_t int_mask = NRF_QDEC_INT_ACCOF_MASK; - - if (p_config->reportper != NRF_QDEC_REPORTPER_DISABLED) - { - nrf_qdec_reportper_set(p_config->reportper); - int_mask |= NRF_QDEC_INT_REPORTRDY_MASK; - } - - if (p_config->sample_inten) - { - int_mask |= NRF_QDEC_INT_SAMPLERDY_MASK; - } - - nrf_qdec_int_enable(int_mask); - nrf_drv_common_irq_enable(QDEC_IRQn, p_config->interrupt_priority); - - m_state = NRF_DRV_STATE_INITIALIZED; - - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - -void nrf_drv_qdec_uninit(void) -{ - ASSERT(m_state != NRF_DRV_STATE_UNINITIALIZED); - nrf_drv_qdec_disable(); - nrf_drv_common_irq_disable(QDEC_IRQn); - m_state = NRF_DRV_STATE_UNINITIALIZED; - NRF_LOG_INFO("Uninitialized."); -} - -void nrf_drv_qdec_enable(void) -{ - ASSERT(m_state == NRF_DRV_STATE_INITIALIZED); - nrf_qdec_enable(); - nrf_qdec_task_trigger(NRF_QDEC_TASK_START); - m_state = NRF_DRV_STATE_POWERED_ON; - NRF_LOG_INFO("Enabled."); -} - -void nrf_drv_qdec_disable(void) -{ - ASSERT(m_state == NRF_DRV_STATE_POWERED_ON); - nrf_qdec_task_trigger(NRF_QDEC_TASK_STOP); - nrf_qdec_disable(); - m_state = NRF_DRV_STATE_INITIALIZED; - NRF_LOG_INFO("Disabled."); -} - -void nrf_drv_qdec_accumulators_read(int16_t * p_acc, int16_t * p_accdbl) -{ - ASSERT(m_state == NRF_DRV_STATE_POWERED_ON); - nrf_qdec_task_trigger(NRF_QDEC_TASK_READCLRACC); - - *p_acc = (int16_t)nrf_qdec_accread_get(); - *p_accdbl = (int16_t)nrf_qdec_accdblread_get(); - - NRF_LOG_DEBUG("Accumulators data, ACC register:"); - NRF_LOG_HEXDUMP_DEBUG((uint8_t *)p_acc, sizeof(p_acc[0])); - NRF_LOG_DEBUG("Accumulators data, ACCDBL register:"); - NRF_LOG_HEXDUMP_DEBUG((uint8_t *)p_accdbl, sizeof(p_accdbl[0])); -} - -void nrf_drv_qdec_task_address_get(nrf_qdec_task_t task, uint32_t * p_task) -{ - *p_task = (uint32_t)nrf_qdec_task_address_get(task); -} - -void nrf_drv_qdec_event_address_get(nrf_qdec_event_t event, uint32_t * p_event) -{ - *p_event = (uint32_t)nrf_qdec_event_address_get(event); -} - -#endif //NRF_MODULE_ENABLED(QDEC) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/qdec/nrf_drv_qdec.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/qdec/nrf_drv_qdec.h deleted file mode 100644 index 8327d287b17..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/qdec/nrf_drv_qdec.h +++ /dev/null @@ -1,185 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_DRV_QDEC_H__ -#define NRF_DRV_QDEC_H__ - -#include "nrf_qdec.h" -#include "sdk_config.h" -#include "sdk_errors.h" -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @addtogroup nrf_qdec QDEC HAL and driver - * @ingroup nrf_drivers - * @brief Quadrature decoder (QDEC) APIs. - * @details The QDEC HAL provides basic APIs for accessing the registers of the QDEC. - * The QDEC driver provides APIs on a higher level. - * - * @defgroup nrf_drv_qdec QDEC driver - * @{ - * @ingroup nrf_qdec - * @brief Quadrature decoder (QDEC) driver. - */ - -/**@brief QDEC configuration structure.*/ -typedef struct -{ - nrf_qdec_reportper_t reportper; /**< Report period in samples. */ - nrf_qdec_sampleper_t sampleper; /**< Sampling period in microseconds. */ - uint32_t psela; /**< Pin number for A input. */ - uint32_t pselb; /**< Pin number for B input. */ - uint32_t pselled; /**< Pin number for LED output. */ - uint32_t ledpre; /**< Time (in microseconds) how long LED is switched on before sampling. */ - nrf_qdec_ledpol_t ledpol; /**< Active LED polarity. */ - bool dbfen; /**< State of debouncing filter. */ - bool sample_inten; /**< Enabling sample ready interrupt. */ - uint8_t interrupt_priority; /**< QDEC interrupt priority. */ -} nrf_drv_qdec_config_t; - -/**@brief QDEC default configuration. */ -#define NRF_DRV_QDEC_DEFAULT_CONFIG \ - { \ - .reportper = (nrf_qdec_reportper_t)QDEC_CONFIG_REPORTPER, \ - .sampleper = (nrf_qdec_sampleper_t)QDEC_CONFIG_SAMPLEPER, \ - .psela = QDEC_CONFIG_PIO_A, \ - .pselb = QDEC_CONFIG_PIO_B, \ - .pselled = QDEC_CONFIG_PIO_LED, \ - .ledpre = QDEC_CONFIG_LEDPRE, \ - .ledpol = (nrf_qdec_ledpol_t)QDEC_CONFIG_LEDPOL, \ - .interrupt_priority = QDEC_CONFIG_IRQ_PRIORITY, \ - .dbfen = QDEC_CONFIG_DBFEN, \ - .sample_inten = QDEC_CONFIG_SAMPLE_INTEN \ - } - -/**@brief QDEC sample event data.*/ -typedef struct -{ - int8_t value; /**< Sample value. */ -} nrf_drv_qdec_sample_data_evt_t; - -/**@brief QDEC report event data.*/ -typedef struct -{ - int16_t acc; /**< Accumulated transitions. */ - uint16_t accdbl; /**< Accumulated double transitions. */ -} nrf_drv_qdec_report_data_evt_t; - -/**@brief QDEC event handler structure. */ -typedef struct -{ - nrf_qdec_event_t type; - union - { - nrf_drv_qdec_sample_data_evt_t sample; /**< Sample event data. */ - nrf_drv_qdec_report_data_evt_t report; /**< Report event data. */ - } data; -} nrf_drv_qdec_event_t; - -/**@brief QDEC event handler. - * @param[in] event QDEC event structure. - */ -typedef void (*qdec_event_handler_t)(nrf_drv_qdec_event_t event); - -/**@brief Function for initializing QDEC. - * - * @param[in] p_config Pointer to configuration parameters. - * @param[in] event_handler Event handler function. - * - * @retval NRF_SUCCESS If initialization was successful. - * @retval NRF_ERROR_INVALID_PARAM If invalid parameters were supplied. - * @retval NRF_ERROR_INVALID_STATE If QDEC was already initialized. - */ -ret_code_t nrf_drv_qdec_init(nrf_drv_qdec_config_t const * p_config, - qdec_event_handler_t event_handler); - -/**@brief Function for uninitializing QDEC. - * @note Function asserts if module is uninitialized. - */ -void nrf_drv_qdec_uninit(void); - -/**@brief Function for enabling QDEC. - * @note Function asserts if module is uninitialized or enabled. - */ -void nrf_drv_qdec_enable(void); - -/**@brief Function for disabling QDEC. - * @note Function asserts if module is uninitialized or disabled. - */ -void nrf_drv_qdec_disable(void); - -/**@brief Function for reading accumulated transitions QDEC. - * @note Function asserts if module is not enabled. - * @note Accumulators are cleared after reading. - * - * @param[out] p_acc Pointer to store accumulated transitions. - * @param[out] p_accdbl Pointer to store accumulated double transitions. - */ -void nrf_drv_qdec_accumulators_read(int16_t * p_acc, int16_t * p_accdbl); - -/** - * @brief Function for returning the address of a specific timer task. - * - * @param[in] task QDEC task. - * @param[out] p_task Task address. - */ -void nrf_drv_qdec_task_address_get(nrf_qdec_task_t task, uint32_t * p_task); - -/** - * @brief Function for returning the address of a specific timer event. - * - * @param[in] event QDEC event. - * @param[out] p_event Event address. - */ -void nrf_drv_qdec_event_address_get(nrf_qdec_event_t event, uint32_t * p_event); - -/** - *@} - **/ - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_DRV_QDEC_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/qspi/nrf_drv_qspi.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/qspi/nrf_drv_qspi.c deleted file mode 100644 index 83287313a54..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/qspi/nrf_drv_qspi.c +++ /dev/null @@ -1,308 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_config.h" - -#if QSPI_ENABLED - -#include "nrf_drv_qspi.h" -#include "nrf_drv_common.h" -#include "app_util.h" -#include "nrf_gpio.h" -#include "nrf_assert.h" - -/** - * @brief Command byte used to read status register. - * - */ -#define QSPI_STD_CMD_RDSR 0x05 - -/** - * @brief Byte used to mask status register and retrieve the write-in-progess bit. - * - */ -#define QSPI_MEM_STATUSREG_WIP_Pos 0x01 - -#define QSPI_WAIT_READY() do { \ - while (!nrf_qspi_event_check(NRF_QSPI, NRF_QSPI_EVENT_READY)); \ - } while (0) - -/** - * @brief Control block - driver instance local data. - * - */ -typedef struct -{ - nrf_drv_qspi_handler_t handler; /**< Handler. */ - nrf_drv_state_t state; /**< Driver state. */ - volatile bool interrupt_driven; /**< Information if the current operation is performed and is interrupt-driven. */ - void * p_context; /**< Driver context used in interrupt. */ -} qspi_control_block_t; - -static qspi_control_block_t m_cb; - -static ret_code_t qspi_task_perform(nrf_qspi_task_t task) -{ - // Wait for peripheral - if (m_cb.interrupt_driven) - { - return NRF_ERROR_BUSY; - } - - nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); - - if (m_cb.handler) - { - m_cb.interrupt_driven = true; - nrf_qspi_int_enable(NRF_QSPI, NRF_QSPI_INT_READY_MASK); - } - - nrf_qspi_task_trigger(NRF_QSPI, task); - - if (m_cb.handler == NULL) - { - QSPI_WAIT_READY(); - } - return NRF_SUCCESS; -} - -static bool qspi_pins_configure(nrf_qspi_pins_t const * p_config) -{ - // Check if the user set meaningful values to struct fields. If not, return false. - if ((p_config->sck_pin == NRF_QSPI_PIN_NOT_CONNECTED) || - (p_config->csn_pin == NRF_QSPI_PIN_NOT_CONNECTED) || - (p_config->io0_pin == NRF_QSPI_PIN_NOT_CONNECTED) || - (p_config->io1_pin == NRF_QSPI_PIN_NOT_CONNECTED)) - { - return false; - } - - nrf_qspi_pins_set(NRF_QSPI, p_config); - - return true; -} - -ret_code_t nrf_drv_qspi_init(nrf_drv_qspi_config_t const * p_config, - nrf_drv_qspi_handler_t handler, - void * p_context) -{ - if (m_cb.state != NRF_DRV_STATE_UNINITIALIZED) - { - return NRF_ERROR_INVALID_STATE; - } - - if (!qspi_pins_configure(&p_config->pins)) - { - return NRF_ERROR_INVALID_PARAM; - } - - nrf_qspi_ifconfig0_set(NRF_QSPI, &p_config->prot_if); - nrf_qspi_ifconfig1_set(NRF_QSPI, &p_config->phy_if); - - m_cb.interrupt_driven = false; - m_cb.handler = handler; - m_cb.p_context = p_context; - - /* QSPI interrupt is disabled because the device should be enabled in polling mode (wait for activate - task event ready)*/ - nrf_qspi_int_disable(NRF_QSPI, NRF_QSPI_INT_READY_MASK); - - if (handler) - { - nrf_drv_common_irq_enable(QSPI_IRQn, p_config->irq_priority); - } - - m_cb.state = NRF_DRV_STATE_INITIALIZED; - - nrf_qspi_enable(NRF_QSPI); - - nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); - nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_ACTIVATE); - - // Waiting for the peripheral to activate - QSPI_WAIT_READY(); - - return NRF_SUCCESS; -} - -ret_code_t nrf_drv_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config, - void const * p_tx_buffer, - void * p_rx_buffer) -{ - ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED); - - if (m_cb.interrupt_driven) - { - return NRF_ERROR_BUSY; - } - - nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); - /* In some cases, only opcode should be sent. To prevent execution, set function code is - * surrounded by an if. - */ - if (p_tx_buffer) - { - nrf_qspi_cinstrdata_set(NRF_QSPI, p_config->length, p_tx_buffer); - } - nrf_qspi_int_disable(NRF_QSPI, NRF_QSPI_INT_READY_MASK); - - nrf_qspi_cinstr_transfer_start(NRF_QSPI, p_config); - - QSPI_WAIT_READY(); - nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); - nrf_qspi_int_enable(NRF_QSPI, NRF_QSPI_INT_READY_MASK); - - if (p_rx_buffer) - { - nrf_qspi_cinstrdata_get(NRF_QSPI, p_config->length, p_rx_buffer); - } - - return NRF_SUCCESS; -} - -ret_code_t nrf_drv_qspi_cinstr_quick_send(uint8_t opcode, - nrf_qspi_cinstr_len_t length, - void const * p_tx_buffer) -{ - nrf_qspi_cinstr_conf_t config = NRF_DRV_QSPI_DEFAULT_CINSTR(opcode, length); - return nrf_drv_qspi_cinstr_xfer(&config, p_tx_buffer, NULL); -} - -ret_code_t nrf_drv_qspi_mem_busy_check(void) -{ - ret_code_t ret_code; - uint8_t status_value = 0; - - nrf_qspi_cinstr_conf_t config = NRF_DRV_QSPI_DEFAULT_CINSTR(QSPI_STD_CMD_RDSR, - NRF_QSPI_CINSTR_LEN_2B); - - ret_code = nrf_drv_qspi_cinstr_xfer(&config, &status_value, &status_value); - - if (ret_code != NRF_SUCCESS) - { - return ret_code; - } - - if ((status_value & QSPI_MEM_STATUSREG_WIP_Pos) != 0x00) - { - return NRF_ERROR_BUSY; - } - - return NRF_SUCCESS; -} - -void nrf_drv_qspi_uninit(void) -{ - ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED); - - nrf_qspi_int_disable(NRF_QSPI, NRF_QSPI_INT_READY_MASK); - - nrf_qspi_disable(NRF_QSPI); - - nrf_drv_common_irq_disable(QSPI_IRQn); - - nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); - - m_cb.state = NRF_DRV_STATE_UNINITIALIZED; -} - -ret_code_t nrf_drv_qspi_write(void const * p_tx_buffer, - size_t tx_buffer_length, - uint32_t dst_address) -{ - ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED); - ASSERT(p_tx_buffer != NULL); - /* Checking word alignment. */ - ASSERT(is_word_aligned(p_tx_buffer)); - - if (!nrf_drv_is_in_RAM(p_tx_buffer)) - { - return NRF_ERROR_INVALID_ADDR; - } - - nrf_qspi_write_buffer_set(NRF_QSPI, p_tx_buffer, tx_buffer_length, dst_address); - return qspi_task_perform(NRF_QSPI_TASK_WRITESTART); - -} - -ret_code_t nrf_drv_qspi_read(void * p_rx_buffer, - size_t rx_buffer_length, - uint32_t src_address) -{ - ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED); - ASSERT(p_rx_buffer != NULL); - /* Checking word alignment. */ - ASSERT(is_word_aligned(p_rx_buffer)); - - if (!nrf_drv_is_in_RAM(p_rx_buffer)) - { - return NRF_ERROR_INVALID_ADDR; - } - - nrf_qspi_read_buffer_set(NRF_QSPI, p_rx_buffer, rx_buffer_length, src_address); - return qspi_task_perform(NRF_QSPI_TASK_READSTART); -} - -ret_code_t nrf_drv_qspi_erase(nrf_qspi_erase_len_t length, - uint32_t start_address) -{ - ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED); - /* Checking word alignment. */ - ASSERT(is_word_aligned((void *)start_address)); - nrf_qspi_erase_ptr_set(NRF_QSPI, start_address, length); - return qspi_task_perform(NRF_QSPI_TASK_ERASESTART); -} - -ret_code_t nrf_drv_qspi_chip_erase(void) -{ - return nrf_drv_qspi_erase(NRF_QSPI_ERASE_LEN_ALL, 0); -} - -void QSPI_IRQHandler(void) -{ - // Catch Event ready interrupts - if (nrf_qspi_event_check(NRF_QSPI, NRF_QSPI_EVENT_READY)) - { - m_cb.interrupt_driven = false; - nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); - m_cb.handler(NRF_DRV_QSPI_EVENT_DONE, m_cb.p_context); - } -} - -#endif // QSPI_ENABLED diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/qspi/nrf_drv_qspi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/qspi/nrf_drv_qspi.h deleted file mode 100644 index 1301cacf719..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/qspi/nrf_drv_qspi.h +++ /dev/null @@ -1,313 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/**@file - * @addtogroup nrf_qspi QSPI HAL and driver - * @ingroup nrf_drivers - * @brief @tagAPI52840 Quad serial peripheral interface (QSPI) APIs. - * - * @defgroup nrf_drv_qspi QSPI driver - * @{ - * @ingroup nrf_qspi - * @brief @tagAPI52840 Quad serial peripheral interface (QSPI) driver. - */ - -#ifndef NRF_DRV_QSPI_H__ -#define NRF_DRV_QSPI_H__ - -#include "nordic_common.h" -#include "sdk_config.h" -#include "nrf_qspi.h" -#include "sdk_errors.h" -#include "boards.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief QSPI driver instance configuration structure. - */ -typedef struct -{ - nrf_qspi_pins_t pins; /**< Pins configuration structure. */ - nrf_qspi_prot_conf_t prot_if; /**< Protocol layer interface configuration structure. */ - nrf_qspi_phy_conf_t phy_if; /**< Physical layer interface configuration structure. */ - uint8_t irq_priority; /**< Interrupt priority. */ -} nrf_drv_qspi_config_t; - -#if QSPI_PIN_SCK == NRF_QSPI_PIN_NOT_CONNECTED - #undef QSPI_PIN_SCK - #define QSPI_PIN_SCK BSP_QSPI_SCK_PIN -#endif -#if QSPI_PIN_CSN == NRF_QSPI_PIN_NOT_CONNECTED - #undef QSPI_PIN_CSN - #define QSPI_PIN_CSN BSP_QSPI_CSN_PIN -#endif -#if QSPI_PIN_IO0 == NRF_QSPI_PIN_NOT_CONNECTED - #undef QSPI_PIN_IO0 - #define QSPI_PIN_IO0 BSP_QSPI_IO0_PIN -#endif -#if QSPI_PIN_IO1 == NRF_QSPI_PIN_NOT_CONNECTED - #undef QSPI_PIN_IO1 - #define QSPI_PIN_IO1 BSP_QSPI_IO1_PIN -#endif -#if QSPI_PIN_IO2 == NRF_QSPI_PIN_NOT_CONNECTED - #undef QSPI_PIN_IO2 - #define QSPI_PIN_IO2 BSP_QSPI_IO2_PIN -#endif -#if QSPI_PIN_IO3 == NRF_QSPI_PIN_NOT_CONNECTED - #undef QSPI_PIN_IO3 - #define QSPI_PIN_IO3 BSP_QSPI_IO3_PIN -#endif -/** - * @brief QSPI instance default configuration. - */ -#define NRF_DRV_QSPI_DEFAULT_CONFIG \ -{ \ - .pins = { \ - .sck_pin = QSPI_PIN_SCK, \ - .csn_pin = QSPI_PIN_CSN, \ - .io0_pin = QSPI_PIN_IO0, \ - .io1_pin = QSPI_PIN_IO1, \ - .io2_pin = QSPI_PIN_IO2, \ - .io3_pin = QSPI_PIN_IO3, \ - }, \ - .irq_priority = (uint8_t)QSPI_CONFIG_IRQ_PRIORITY, \ - .prot_if = { \ - .readoc = (nrf_qspi_readoc_t) QSPI_CONFIG_READOC, \ - .writeoc = (nrf_qspi_writeoc_t) QSPI_CONFIG_WRITEOC, \ - .addrmode = (nrf_qspi_addrmode_t) QSPI_CONFIG_ADDRMODE, \ - .dpmconfig = false, \ - }, \ - .phy_if = { \ - .sck_freq = (nrf_qspi_frequency_t) QSPI_CONFIG_FREQUENCY, \ - .sck_delay = (uint8_t) QSPI_CONFIG_SCK_DELAY, \ - .spi_mode = (nrf_qspi_spi_mode_t) QSPI_CONFIG_MODE, \ - .dpmen = false \ - } \ -} - - -/** - * @brief QSPI custom instruction helper with default configuration. - */ -#define NRF_DRV_QSPI_DEFAULT_CINSTR(opc, len) \ -{ \ - .opcode = (opc), \ - .length = (len), \ - .io2_level = false, \ - .io3_level = false, \ - .wipwait = false, \ - .wren = false, \ - .lfen = false, \ - .lfstop = false \ -} - -/** - * @brief QSPI master driver event types, passed to the handler routine provided - * during initialization. - */ -typedef enum -{ - NRF_DRV_QSPI_EVENT_DONE, /**< Transfer done. */ -} nrf_drv_qspi_evt_t; - -/** - * @brief QSPI driver event handler type. - */ -typedef void (*nrf_drv_qspi_handler_t)(nrf_drv_qspi_evt_t event, void * p_context); - -/** - * @brief Function for initializing the QSPI driver instance. - * - * @param[in] p_config Pointer to the structure with the initial configuration. - * @param[in] handler Event handler provided by the user. If NULL, transfers - * will be performed in blocking mode. - * @param[in] p_context Pointer to context. Use in interrupt handler. - * - * - * @retval NRF_SUCCESS If initialization was successful. - * @retval NRF_ERROR_INVALID_STATE If the driver was already initialized. - * @retval NRF_ERROR_INVALID_PARAM If the pin configuration was incorrect. - */ -ret_code_t nrf_drv_qspi_init(nrf_drv_qspi_config_t const * p_config, - nrf_drv_qspi_handler_t handler, - void * p_context); - -/** - * @brief Function for uninitializing the QSPI driver instance. - */ -void nrf_drv_qspi_uninit(void); - -/** - * @brief Function for reading data from QSPI memory. - * - * Write, read, and erase operations check memory device busy state before starting the operation. - * If the memory is busy, the resulting action depends on the mode in which the read operation is used: - * - blocking mode (without handler) - a delay occurs until the last operation still runs and - * until operation data is still being read. - * - interrupt mode (with handler) - event emission occurs after the last operation - * and reading of data are finished. - * - * @param[out] p_rx_buffer Pointer to the receive buffer. - * @param[in] rx_buffer_length Size of the data to read. - * @param[in] src_address Address in memory to read from. - * - * @retval NRF_SUCCESS If the operation was successful (blocking mode) or operation - * was commissioned (handler mode). - * @retval NRF_ERROR_BUSY If the driver currently handles another operation. - * @retval NRF_ERROR_INVALID_ADDR If the provided buffer is not placed in the Data RAM region. - */ -ret_code_t nrf_drv_qspi_read(void * p_rx_buffer, - size_t rx_buffer_length, - uint32_t src_address); - -/** - * @brief Function for writing data to QSPI memory. - * - * Write, read, and erase operations check memory device busy state before starting the operation. - * If the memory is busy, the resulting action depends on the mode in which the write operation is used: - * - blocking mode (without handler) - a delay occurs until the last operation still runs and - * until operation data is still being sent. - * - interrupt mode (with handler) - event emission occurs after the last operation - * and sending of operation data are finished. - * To manually control operation execution in the memory device, use @ref nrf_drv_qspi_mem_busy_check - * after executing the write function. - * Remember that an incoming event signalizes only that data was sent to the memory device and the periheral - * before the write operation checked if memory was busy. - * - * @param[in] p_tx_buffer Pointer to the writing buffer. - * @param[in] tx_buffer_length Size of the data to write. - * @param[in] dst_address Address in memory to write to. - * - * @retval NRF_SUCCESS If the operation was successful (blocking mode) or operation - * was commissioned (handler mode). - * @retval NRF_ERROR_BUSY If the driver currently handles other operation. - * @retval NRF_ERROR_INVALID_ADDR If the provided buffer is not placed in the Data RAM region. - */ -ret_code_t nrf_drv_qspi_write(void const * p_tx_buffer, - size_t tx_buffer_length, - uint32_t dst_address); - -/** - * @brief Function for starting erasing of one memory block - 4KB, 64KB, or the whole chip. - * - * Write, read, and erase operations check memory device busy state before starting the operation. - * If the memory is busy, the resulting action depends on the mode in which the erase operation is used: - * - blocking mode (without handler) - a delay occurs until the last operation still runs and - * until operation data is still being sent. - * - interrupt mode (with handler) - event emission occurs after the last operation - * and sending of operation data are finished. - * To manually control operation execution in the memory device, use @ref nrf_drv_qspi_mem_busy_check - * after executing the erase function. - * Remember that an incoming event signalizes only that data was sent to the memory device and the periheral - * before the erase operation checked if memory was busy. - * - * @param[in] length Size of data to erase. See @ref nrf_qspi_erase_len_t. - * @param[in] start_address Memory address to start erasing. If chip erase is performed, address - * field is ommited. - * - * @retval NRF_SUCCESS If the operation was successful (blocking mode) or operation - * was commissioned (handler mode). - * @retval NRF_ERROR_BUSY If the driver currently handles another operation. - */ -ret_code_t nrf_drv_qspi_erase(nrf_qspi_erase_len_t length, - uint32_t start_address); - -/** - * @brief Function for starting an erase operation of the whole chip. - * - * @retval NRF_SUCCESS If the operation was successful (blocking mode) or operation - * was commissioned (handler mode). - * @retval NRF_ERROR_BUSY If the driver currently handles another operation. - */ -ret_code_t nrf_drv_qspi_chip_erase(void); - -/** - * @brief Function for getting the current driver status and status byte of memory device with - * testing WIP (write in progress) bit. - * - * @retval NRF_SUCCESS If the driver and memory are ready to handle a new operation. - * @retval NRF_ERROR_BUSY If the driver or memory currently handle another operation. - */ -ret_code_t nrf_drv_qspi_mem_busy_check(void); - -/** - * @brief Function for sending operation code, sending data, and receiving data from the memory device. - * - * Use this function to transfer configuration data to memory and to receive data from memory. - * Pointers can be addresses from flash memory. - * This function is a synchronous function and should be used only if necessary. - * See more: @ref hardware_driver_qspi. - * - * @param[in] p_config Pointer to the structure with opcode and transfer configuration. - * @param[in] p_tx_buffer Pointer to the array with data to send. Can be NULL if only opcode is transmitted. - * @param[out] p_rx_buffer Pointer to the array for data to receive. Can be NULL if there is nothing to receive. - * - * @retval NRF_SUCCESS If the operation was successful. - * @retval NRF_ERROR_BUSY If the driver currently handles other operation. - */ -ret_code_t nrf_drv_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config, - void const * p_tx_buffer, - void * p_rx_buffer); -/** - * @brief Function for sending operation code and data to the memory device with simpler configuration. - * - * Use this function to transfer configuration data to memory and to receive data from memory. - * This function is a synchronous function and should be used only if necessary. - * - * @param[in] opcode Operation code. Sending first. - * @param[in] length Length of the data to send and opcode. See @ref nrf_qspi_cinstr_len_t. - * @param[in] p_tx_buffer Pointer to input data array. - * - * @retval NRF_SUCCESS If the operation was successful. - * @retval NRF_ERROR_BUSY If the driver currently handles another operation. - */ -ret_code_t nrf_drv_qspi_cinstr_quick_send(uint8_t opcode, - nrf_qspi_cinstr_len_t length, - void const * p_tx_buffer); - -#ifdef __cplusplus -} -#endif - -#endif // NRF_DRV_QSPI_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/radio_config/radio_config.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/radio_config/radio_config.c deleted file mode 100644 index 5f529a7db7e..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/radio_config/radio_config.c +++ /dev/null @@ -1,188 +0,0 @@ -/** - * Copyright (c) 2009 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** @file -* @addtogroup nrf_dev_radio_rx_example_main nrf_dev_radio_tx_example_main -* @{ -*/ - -#include "radio_config.h" -#include "nrf_delay.h" - -/* These are set to zero as ShockBurst packets don't have corresponding fields. */ -#define PACKET_S1_FIELD_SIZE (0UL) /**< Packet S1 field size in bits. */ -#define PACKET_S0_FIELD_SIZE (0UL) /**< Packet S0 field size in bits. */ -#define PACKET_LENGTH_FIELD_SIZE (0UL) /**< Packet length field size in bits. */ - -/** - * @brief Function for swapping/mirroring bits in a byte. - * - *@verbatim - * output_bit_7 = input_bit_0 - * output_bit_6 = input_bit_1 - * : - * output_bit_0 = input_bit_7 - *@endverbatim - * - * @param[in] inp is the input byte to be swapped. - * - * @return - * Returns the swapped/mirrored input byte. - */ -static uint32_t swap_bits(uint32_t inp); - -/** - * @brief Function for swapping bits in a 32 bit word for each byte individually. - * - * The bits are swapped as follows: - * @verbatim - * output[31:24] = input[24:31] - * output[23:16] = input[16:23] - * output[15:8] = input[8:15] - * output[7:0] = input[0:7] - * @endverbatim - * @param[in] input is the input word to be swapped. - * - * @return - * Returns the swapped input byte. - */ -static uint32_t bytewise_bitswap(uint32_t inp); - -static uint32_t swap_bits(uint32_t inp) -{ - uint32_t i; - uint32_t retval = 0; - - inp = (inp & 0x000000FFUL); - - for (i = 0; i < 8; i++) - { - retval |= ((inp >> i) & 0x01) << (7 - i); - } - - return retval; -} - - -static uint32_t bytewise_bitswap(uint32_t inp) -{ - return (swap_bits(inp >> 24) << 24) - | (swap_bits(inp >> 16) << 16) - | (swap_bits(inp >> 8) << 8) - | (swap_bits(inp)); -} - - -/** - * @brief Function for configuring the radio to operate in ShockBurst compatible mode. - * - * To configure the application running on nRF24L series devices: - * - * @verbatim - * uint8_t tx_address[5] = { 0xC0, 0x01, 0x23, 0x45, 0x67 }; - * hal_nrf_set_rf_channel(7); - * hal_nrf_set_address_width(HAL_NRF_AW_5BYTES); - * hal_nrf_set_address(HAL_NRF_TX, tx_address); - * hal_nrf_set_address(HAL_NRF_PIPE0, tx_address); - * hal_nrf_open_pipe(0, false); - * hal_nrf_set_datarate(HAL_NRF_1MBPS); - * hal_nrf_set_crc_mode(HAL_NRF_CRC_16BIT); - * hal_nrf_setup_dynamic_payload(0xFF); - * hal_nrf_enable_dynamic_payload(false); - * @endverbatim - * - * When transmitting packets with hal_nrf_write_tx_payload(const uint8_t *tx_pload, uint8_t length), - * match the length with PACKET_STATIC_LENGTH. - * hal_nrf_write_tx_payload(payload, PACKET_STATIC_LENGTH); - * -*/ -void radio_configure() -{ - // Radio config - NRF_RADIO->TXPOWER = (RADIO_TXPOWER_TXPOWER_0dBm << RADIO_TXPOWER_TXPOWER_Pos); - NRF_RADIO->FREQUENCY = 7UL; // Frequency bin 7, 2407MHz - NRF_RADIO->MODE = (RADIO_MODE_MODE_Nrf_1Mbit << RADIO_MODE_MODE_Pos); - - // Radio address config - NRF_RADIO->PREFIX0 = - ((uint32_t)swap_bits(0xC3) << 24) // Prefix byte of address 3 converted to nRF24L series format - | ((uint32_t)swap_bits(0xC2) << 16) // Prefix byte of address 2 converted to nRF24L series format - | ((uint32_t)swap_bits(0xC1) << 8) // Prefix byte of address 1 converted to nRF24L series format - | ((uint32_t)swap_bits(0xC0) << 0); // Prefix byte of address 0 converted to nRF24L series format - - NRF_RADIO->PREFIX1 = - ((uint32_t)swap_bits(0xC7) << 24) // Prefix byte of address 7 converted to nRF24L series format - | ((uint32_t)swap_bits(0xC6) << 16) // Prefix byte of address 6 converted to nRF24L series format - | ((uint32_t)swap_bits(0xC4) << 0); // Prefix byte of address 4 converted to nRF24L series format - - NRF_RADIO->BASE0 = bytewise_bitswap(0x01234567UL); // Base address for prefix 0 converted to nRF24L series format - NRF_RADIO->BASE1 = bytewise_bitswap(0x89ABCDEFUL); // Base address for prefix 1-7 converted to nRF24L series format - - NRF_RADIO->TXADDRESS = 0x00UL; // Set device address 0 to use when transmitting - NRF_RADIO->RXADDRESSES = 0x01UL; // Enable device address 0 to use to select which addresses to receive - - // Packet configuration - NRF_RADIO->PCNF0 = (PACKET_S1_FIELD_SIZE << RADIO_PCNF0_S1LEN_Pos) | - (PACKET_S0_FIELD_SIZE << RADIO_PCNF0_S0LEN_Pos) | - (PACKET_LENGTH_FIELD_SIZE << RADIO_PCNF0_LFLEN_Pos); //lint !e845 "The right argument to operator '|' is certain to be 0" - - // Packet configuration - NRF_RADIO->PCNF1 = (RADIO_PCNF1_WHITEEN_Disabled << RADIO_PCNF1_WHITEEN_Pos) | - (RADIO_PCNF1_ENDIAN_Big << RADIO_PCNF1_ENDIAN_Pos) | - (PACKET_BASE_ADDRESS_LENGTH << RADIO_PCNF1_BALEN_Pos) | - (PACKET_STATIC_LENGTH << RADIO_PCNF1_STATLEN_Pos) | - (PACKET_PAYLOAD_MAXSIZE << RADIO_PCNF1_MAXLEN_Pos); //lint !e845 "The right argument to operator '|' is certain to be 0" - - // CRC Config - NRF_RADIO->CRCCNF = (RADIO_CRCCNF_LEN_Two << RADIO_CRCCNF_LEN_Pos); // Number of checksum bits - if ((NRF_RADIO->CRCCNF & RADIO_CRCCNF_LEN_Msk) == (RADIO_CRCCNF_LEN_Two << RADIO_CRCCNF_LEN_Pos)) - { - NRF_RADIO->CRCINIT = 0xFFFFUL; // Initial value - NRF_RADIO->CRCPOLY = 0x11021UL; // CRC poly: x^16 + x^12^x^5 + 1 - } - else if ((NRF_RADIO->CRCCNF & RADIO_CRCCNF_LEN_Msk) == (RADIO_CRCCNF_LEN_One << RADIO_CRCCNF_LEN_Pos)) - { - NRF_RADIO->CRCINIT = 0xFFUL; // Initial value - NRF_RADIO->CRCPOLY = 0x107UL; // CRC poly: x^8 + x^2^x^1 + 1 - } -} - -/** - * @} - */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/radio_config/radio_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/radio_config/radio_config.h deleted file mode 100644 index 2b4cacd106f..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/radio_config/radio_config.h +++ /dev/null @@ -1,58 +0,0 @@ -/** - * Copyright (c) 2009 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef RADIO_CONFIG_H -#define RADIO_CONFIG_H - -#ifdef __cplusplus -extern "C" { -#endif - -#define PACKET_BASE_ADDRESS_LENGTH (4UL) //!< Packet base address length field size in bytes -#define PACKET_STATIC_LENGTH (1UL) //!< Packet static length in bytes -#define PACKET_PAYLOAD_MAXSIZE (PACKET_STATIC_LENGTH) //!< Packet payload maximum size in bytes - -void radio_configure(void); - - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/rng/nrf_drv_rng.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/rng/nrf_drv_rng.c deleted file mode 100644 index 8f02e76ab4a..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/rng/nrf_drv_rng.c +++ /dev/null @@ -1,321 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(RNG) - -#include -#include -#include "nrf_drv_rng.h" -#include "nrf_drv_common.h" -#include "nordic_common.h" -#include "app_util_platform.h" -#include "nrf_assert.h" -#include "nrf_queue.h" - -#ifdef SOFTDEVICE_PRESENT - #include "nrf_sdh.h" -#endif // SOFTDEVICE_PRESENT - -#define NRF_LOG_MODULE_NAME rng - -#if RNG_CONFIG_LOG_ENABLED - #define NRF_LOG_LEVEL RNG_CONFIG_LOG_LEVEL - #define NRF_LOG_INFO_COLOR RNG_CONFIG_INFO_COLOR - #define NRF_LOG_DEBUG_COLOR RNG_CONFIG_DEBUG_COLOR -#else //RNG_CONFIG_LOG_ENABLED - #define NRF_LOG_LEVEL 0 -#endif //RNG_CONFIG_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - -/* Validate configuration */ -INTERRUPT_PRIORITY_VALIDATION(RNG_CONFIG_IRQ_PRIORITY); - -typedef struct -{ - nrf_drv_state_t state; - nrf_drv_rng_config_t config; -} nrf_drv_rng_cb_t; - -static nrf_drv_rng_cb_t m_rng_cb; -NRF_QUEUE_DEF(uint8_t, m_rand_pool, RNG_CONFIG_POOL_SIZE, NRF_QUEUE_MODE_OVERFLOW); -static const nrf_drv_rng_config_t m_default_config = NRF_DRV_RNG_DEFAULT_CONFIG; - -#ifdef SOFTDEVICE_PRESENT -#ifdef S132 - #define SD_RAND_POOL_SIZE (64) -#else - #define SD_RAND_POOL_SIZE (32) -#endif - STATIC_ASSERT(RNG_CONFIG_POOL_SIZE == SD_RAND_POOL_SIZE); - - #define NRF_DRV_RNG_LOCK() CRITICAL_REGION_ENTER() - #define NRF_DRV_RNG_RELEASE() CRITICAL_REGION_EXIT() - #define NRF_DRV_RNG_SD_IS_ENABLED() nrf_sdh_is_enabled() -#else - #define NRF_DRV_RNG_LOCK() do { } while (0) - #define NRF_DRV_RNG_RELEASE() do { } while (0) - #define NRF_DRV_RNG_SD_IS_ENABLED() false -#endif // SOFTDEVICE_PRESENT - - -/** - * @brief Function for starting generation. - */ -static void nrf_drv_rng_start(void) -{ - ASSERT(!NRF_DRV_RNG_SD_IS_ENABLED()); - - nrf_rng_event_clear(NRF_RNG_EVENT_VALRDY); - nrf_rng_int_enable(NRF_RNG_INT_VALRDY_MASK); - nrf_rng_task_trigger(NRF_RNG_TASK_START); -} - -/** - * @brief Function for stoping generation. - */ -static void nrf_drv_rng_stop(void) -{ - ASSERT(!NRF_DRV_RNG_SD_IS_ENABLED()); - - nrf_rng_int_disable(NRF_RNG_INT_VALRDY_MASK); - nrf_rng_task_trigger(NRF_RNG_TASK_STOP); -} - -/** - * @brief Function for setting up RNG hardware. - */ -static void nrf_drv_rng_setup(void) -{ - ASSERT(!NRF_DRV_RNG_SD_IS_ENABLED()); - - if (m_rng_cb.config.error_correction) - { - nrf_rng_error_correction_enable(); - } - nrf_rng_shorts_disable(NRF_RNG_SHORT_VALRDY_STOP_MASK); - nrf_drv_common_irq_enable(RNG_IRQn, m_rng_cb.config.interrupt_priority); -} - -ret_code_t nrf_drv_rng_init(nrf_drv_rng_config_t const * p_config) -{ - if (m_rng_cb.state != NRF_DRV_STATE_UNINITIALIZED) - { - return NRF_ERROR_MODULE_ALREADY_INITIALIZED; - } - - if (p_config == NULL) - { - p_config = &m_default_config; - } - m_rng_cb.config = *p_config; - - NRF_DRV_RNG_LOCK(); - - if (!NRF_DRV_RNG_SD_IS_ENABLED()) - { - nrf_drv_rng_setup(); - nrf_drv_rng_start(); - } - - NRF_DRV_RNG_RELEASE(); - - m_rng_cb.state = NRF_DRV_STATE_INITIALIZED; - - return NRF_SUCCESS; -} - -void nrf_drv_rng_uninit(void) -{ - ASSERT(m_rng_cb.state == NRF_DRV_STATE_INITIALIZED); - - NRF_DRV_RNG_LOCK(); - - if (!NRF_DRV_RNG_SD_IS_ENABLED()) - { - nrf_drv_rng_stop(); - nrf_drv_common_irq_disable(RNG_IRQn); - } - - NRF_DRV_RNG_RELEASE(); - - nrf_queue_reset(&m_rand_pool); - m_rng_cb.state = NRF_DRV_STATE_UNINITIALIZED; - NRF_LOG_INFO("Uninitialized."); -} - -void nrf_drv_rng_bytes_available(uint8_t * p_bytes_available) -{ - ASSERT(m_rng_cb.state == NRF_DRV_STATE_INITIALIZED); - -#ifdef SOFTDEVICE_PRESENT - if (NRF_DRV_RNG_SD_IS_ENABLED()) - { - if (NRF_SUCCESS == sd_rand_application_bytes_available_get(p_bytes_available)) - { - return; - } - } -#endif // SOFTDEVICE_PRESENT - - *p_bytes_available = nrf_queue_utilization_get(&m_rand_pool); - - NRF_LOG_INFO("Function: %s, available bytes: %d.", (uint32_t)__func__, *p_bytes_available); -} - -ret_code_t nrf_drv_rng_rand(uint8_t * p_buff, uint8_t length) -{ - ret_code_t err_code = NRF_SUCCESS; - ASSERT(m_rng_cb.state == NRF_DRV_STATE_INITIALIZED); - -#ifdef SOFTDEVICE_PRESENT - do { - bool sd_is_enabled; - NRF_DRV_RNG_LOCK(); - sd_is_enabled = NRF_DRV_RNG_SD_IS_ENABLED(); - if (!sd_is_enabled) -#endif // SOFTDEVICE_PRESENT - { - err_code = nrf_queue_read(&m_rand_pool, p_buff, (uint32_t)length); - nrf_drv_rng_start(); - } -#ifdef SOFTDEVICE_PRESENT - NRF_DRV_RNG_RELEASE(); - - if (sd_is_enabled) - { - err_code = sd_rand_application_vector_get(p_buff, length); - if (err_code == NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES) - { - err_code = NRF_ERROR_NOT_FOUND; - } - } - } while (err_code == NRF_ERROR_SOFTDEVICE_NOT_ENABLED); -#endif // SOFTDEVICE_PRESENT - ASSERT((err_code == NRF_SUCCESS) || (err_code == NRF_ERROR_NOT_FOUND)); - -#if defined(RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED) && (RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED != 0) - NRF_LOG_DEBUG("Rand buffer data:"); - NRF_LOG_HEXDUMP_DEBUG((uint8_t *)p_buff, length); -#endif // RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - - return err_code; -} - -void nrf_drv_rng_block_rand(uint8_t * p_buff, uint32_t length) -{ - ASSERT(m_rng_cb.state == NRF_DRV_STATE_INITIALIZED); - - while (length) - { - uint32_t len = MIN(length, RNG_CONFIG_POOL_SIZE); - ret_code_t err_code; - - do { - err_code = nrf_drv_rng_rand(p_buff, len); - } while (err_code != NRF_SUCCESS); - - length -= len; - p_buff += len; - } - - NRF_LOG_DEBUG("Rand buffer data:"); - NRF_LOG_HEXDUMP_DEBUG((uint8_t *)p_buff, length); -} - -#ifdef SOFTDEVICE_PRESENT -static void sd_state_evt_handler(nrf_sdh_state_evt_t state, void * p_context) -{ - switch (state) - { - case NRF_SDH_EVT_STATE_ENABLE_PREPARE: - NVIC_DisableIRQ(RNG_IRQn); - break; - - case NRF_SDH_EVT_STATE_DISABLED: - NRF_DRV_RNG_LOCK(); - if (m_rng_cb.state == NRF_DRV_STATE_INITIALIZED) - { - nrf_drv_rng_setup(); - nrf_drv_rng_start(); - } - NRF_DRV_RNG_RELEASE(); - break; - - default: - break; - } -} - -NRF_SDH_STATE_OBSERVER(m_sd_state_observer, RNG_CONFIG_STATE_OBSERVER_PRIO) = -{ - .handler = sd_state_evt_handler, - .p_context = NULL, -}; - -#endif // SOFTDEVICE_PRESENT - -void RNG_IRQHandler(void) -{ - NRF_DRV_RNG_LOCK(); - if ( - !NRF_DRV_RNG_SD_IS_ENABLED() && - nrf_rng_event_get(NRF_RNG_EVENT_VALRDY) && - nrf_rng_int_get(NRF_RNG_INT_VALRDY_MASK)) - { - nrf_rng_event_clear(NRF_RNG_EVENT_VALRDY); - - uint8_t new_value = nrf_rng_random_value_get(); - UNUSED_RETURN_VALUE(nrf_queue_push(&m_rand_pool, &new_value)); - - if (nrf_queue_is_full(&m_rand_pool)) - { - nrf_drv_rng_stop(); - } - - NRF_LOG_DEBUG("Event: NRF_RNG_EVENT_VALRDY."); - } - NRF_DRV_RNG_RELEASE(); -} - -#endif // NRF_MODULE_ENABLED(RNG) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/rng/nrf_drv_rng.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/rng/nrf_drv_rng.h deleted file mode 100644 index 7d242d3049d..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/rng/nrf_drv_rng.h +++ /dev/null @@ -1,135 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_DRV_RNG_H__ -#define NRF_DRV_RNG_H__ - -#include -#include - -#include "nrf_rng.h" -#include "sdk_errors.h" -#include "sdk_config.h" -#include "nrf_drv_common.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @addtogroup nrf_rng RNG HAL and driver - * @ingroup nrf_drivers - * @brief Random number generator (RNG) APIs. - * @details The RNG HAL provides basic APIs for accessing the registers of the random number - * generator. The RNG driver provides APIs on a higher level. - * - * @defgroup nrf_drv_rng RNG driver - * @{ - * @ingroup nrf_rng - * @brief Driver for managing the random number generator (RNG). - */ - -/**@brief Struct for RNG configuration. */ -typedef struct -{ - bool error_correction : 1; /**< Error correction flag. */ - uint8_t interrupt_priority; /**< interrupt priority */ -} nrf_drv_rng_config_t; - -/**@brief RNG default configuration. */ -#define NRF_DRV_RNG_DEFAULT_CONFIG \ - { \ - .error_correction = RNG_CONFIG_ERROR_CORRECTION, \ - .interrupt_priority = RNG_CONFIG_IRQ_PRIORITY, \ - } - -/** - * @brief Function for initializing the nrf_drv_rng module. - * - * @param[in] p_config Initial configuration. - * - * @retval NRF_SUCCESS Driver was successfully initialized. - * @retval NRF_ERROR_MODULE_ALREADY_INITIALIZED Driver was already initialized. - */ -ret_code_t nrf_drv_rng_init(nrf_drv_rng_config_t const * p_config); - -/** - * @brief Function for uninitializing the nrf_drv_rng module. - */ -void nrf_drv_rng_uninit(void); - -/** - * @brief Function for getting the number of currently available random bytes. - * - * @param[out] p_bytes_available The number of bytes currently available in the pool. - */ -void nrf_drv_rng_bytes_available(uint8_t * p_bytes_available); - -/** - * @brief Function for getting the vector of random numbers. - * - * @param[out] p_buff Pointer to uint8_t buffer for storing the bytes. - * @param[in] length Number of bytes to take from the pool and place in p_buff. - * - * @retval NRF_SUCCESS If the requested bytes were written to p_buff. - * @retval NRF_ERROR_NOT_FOUND If no bytes were written to the buffer because there were - * not enough bytes available in the pool. - */ -ret_code_t nrf_drv_rng_rand(uint8_t * p_buff, uint8_t length); - -/** - * @brief Blocking function for getting an arbitrary array of random numbers. - * - * @note This function may execute for a substantial amount of time depending on the length - * of the buffer required and on the state of the current internal pool of random numbers. - * - * @param[out] p_buff Pointer to uint8_t buffer for storing the bytes. - * @param[in] length Number of bytes place in p_buff. - */ -void nrf_drv_rng_block_rand(uint8_t * p_buff, uint32_t length); - -/** - *@} - **/ - -#ifdef __cplusplus -} -#endif - -#endif // NRF_DRV_RNG_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/rtc/nrf_drv_rtc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/rtc/nrf_drv_rtc.c deleted file mode 100644 index 551580f71ef..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/rtc/nrf_drv_rtc.c +++ /dev/null @@ -1,356 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(RTC) -#define ENABLED_RTC_COUNT (RTC0_ENABLED+RTC1_ENABLED+RTC2_ENABLED) -#if ENABLED_RTC_COUNT - -#include "nrf_drv_rtc.h" -#include "nrf_rtc.h" -#include "nrf_assert.h" -#include "app_util_platform.h" - -#define NRF_LOG_MODULE_NAME rtc - -#if RTC_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL RTC_CONFIG_LOG_LEVEL -#define NRF_LOG_INFO_COLOR RTC_CONFIG_INFO_COLOR -#define NRF_LOG_DEBUG_COLOR RTC_CONFIG_DEBUG_COLOR -#define EVT_TO_STR(event) (event == NRF_RTC_EVENT_TICK ? "NRF_RTC_EVENT_TICK" : \ - (event == NRF_RTC_EVENT_OVERFLOW ? "NRF_RTC_EVENT_OVERFLOW" : \ - (event == NRF_RTC_EVENT_COMPARE_0 ? "NRF_RTC_EVENT_COMPARE_0" : \ - (event == NRF_RTC_EVENT_COMPARE_1 ? "NRF_RTC_EVENT_COMPARE_1" : \ - (event == NRF_RTC_EVENT_COMPARE_2 ? "NRF_RTC_EVENT_COMPARE_2" : \ - (event == NRF_RTC_EVENT_COMPARE_3 ? "NRF_RTC_EVENT_COMPARE_3" : "UNKNOWN EVENT") -#else //RTC_CONFIG_LOG_ENABLED -#define EVT_TO_STR(event) "" -#define NRF_LOG_LEVEL 0 -#endif //RTC_CONFIG_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - -/**@brief RTC driver instance control block structure. */ -typedef struct -{ - nrf_drv_state_t state; /**< Instance state. */ - bool reliable; /**< Reliable mode flag. */ - uint8_t tick_latency; /**< Maximum length of interrupt handler in ticks (max 7.7 ms). */ -} nrf_drv_rtc_cb_t; - -// User callbacks local storage. -static nrf_drv_rtc_handler_t m_handlers[ENABLED_RTC_COUNT]; -static nrf_drv_rtc_cb_t m_cb[ENABLED_RTC_COUNT]; - -ret_code_t nrf_drv_rtc_init(nrf_drv_rtc_t const * const p_instance, - nrf_drv_rtc_config_t const * p_config, - nrf_drv_rtc_handler_t handler) -{ - ASSERT(p_config != NULL); - - ret_code_t err_code; - - if (handler) - { - m_handlers[p_instance->instance_id] = handler; - } - else - { - err_code = NRF_ERROR_INVALID_PARAM; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - if (m_cb[p_instance->instance_id].state != NRF_DRV_STATE_UNINITIALIZED) - { - err_code = NRF_ERROR_INVALID_STATE; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - nrf_drv_common_irq_enable(p_instance->irq, p_config->interrupt_priority); - nrf_rtc_prescaler_set(p_instance->p_reg, p_config->prescaler); - m_cb[p_instance->instance_id].reliable = p_config->reliable; - m_cb[p_instance->instance_id].tick_latency = p_config->tick_latency; - m_cb[p_instance->instance_id].state = NRF_DRV_STATE_INITIALIZED; - - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - -void nrf_drv_rtc_uninit(nrf_drv_rtc_t const * const p_instance) -{ - uint32_t mask = NRF_RTC_INT_TICK_MASK | - NRF_RTC_INT_OVERFLOW_MASK | - NRF_RTC_INT_COMPARE0_MASK | - NRF_RTC_INT_COMPARE1_MASK | - NRF_RTC_INT_COMPARE2_MASK | - NRF_RTC_INT_COMPARE3_MASK; - ASSERT(m_cb[p_instance->instance_id].state != NRF_DRV_STATE_UNINITIALIZED); - - nrf_drv_common_irq_disable(p_instance->irq); - - nrf_rtc_task_trigger(p_instance->p_reg, NRF_RTC_TASK_STOP); - nrf_rtc_event_disable(p_instance->p_reg, mask); - nrf_rtc_int_disable(p_instance->p_reg, mask); - - m_cb[p_instance->instance_id].state = NRF_DRV_STATE_UNINITIALIZED; - NRF_LOG_INFO("Uninitialized."); -} - -void nrf_drv_rtc_enable(nrf_drv_rtc_t const * const p_instance) -{ - ASSERT(m_cb[p_instance->instance_id].state == NRF_DRV_STATE_INITIALIZED); - - nrf_rtc_task_trigger(p_instance->p_reg, NRF_RTC_TASK_START); - m_cb[p_instance->instance_id].state = NRF_DRV_STATE_POWERED_ON; - NRF_LOG_INFO("Enabled."); -} - -void nrf_drv_rtc_disable(nrf_drv_rtc_t const * const p_instance) -{ - ASSERT(m_cb[p_instance->instance_id].state != NRF_DRV_STATE_UNINITIALIZED); - - nrf_rtc_task_trigger(p_instance->p_reg, NRF_RTC_TASK_STOP); - m_cb[p_instance->instance_id].state = NRF_DRV_STATE_INITIALIZED; - NRF_LOG_INFO("Disabled."); -} - -ret_code_t nrf_drv_rtc_cc_disable(nrf_drv_rtc_t const * const p_instance, uint32_t channel) -{ - ASSERT(m_cb[p_instance->instance_id].state != NRF_DRV_STATE_UNINITIALIZED); - ASSERT(channelcc_channel_count); - - ret_code_t err_code; - uint32_t int_mask = RTC_CHANNEL_INT_MASK(channel); - nrf_rtc_event_t event = RTC_CHANNEL_EVENT_ADDR(channel); - - nrf_rtc_event_disable(p_instance->p_reg,int_mask); - if (nrf_rtc_int_is_enabled(p_instance->p_reg,int_mask)) - { - nrf_rtc_int_disable(p_instance->p_reg,int_mask); - if (nrf_rtc_event_pending(p_instance->p_reg,event)) - { - nrf_rtc_event_clear(p_instance->p_reg,event); - err_code = NRF_ERROR_TIMEOUT; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - } - NRF_LOG_INFO("RTC id: %d, channel disabled: %d.", p_instance->instance_id, channel); - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - -ret_code_t nrf_drv_rtc_cc_set(nrf_drv_rtc_t const * const p_instance, - uint32_t channel, - uint32_t val, - bool enable_irq) -{ - ASSERT(m_cb[p_instance->instance_id].state != NRF_DRV_STATE_UNINITIALIZED); - ASSERT(channelcc_channel_count); - - ret_code_t err_code; - uint32_t int_mask = RTC_CHANNEL_INT_MASK(channel); - nrf_rtc_event_t event = RTC_CHANNEL_EVENT_ADDR(channel); - - nrf_rtc_event_disable(p_instance->p_reg, int_mask); - nrf_rtc_int_disable(p_instance->p_reg, int_mask); - - val = RTC_WRAP(val); - if (m_cb[p_instance->instance_id].reliable) - { - nrf_rtc_cc_set(p_instance->p_reg,channel,val); - uint32_t cnt = nrf_rtc_counter_get(p_instance->p_reg); - int32_t diff = cnt - val; - if (cnt < val) - { - diff += RTC_COUNTER_COUNTER_Msk; - } - if (diff < m_cb[p_instance->instance_id].tick_latency) - { - err_code = NRF_ERROR_TIMEOUT; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - } - else - { - nrf_rtc_cc_set(p_instance->p_reg,channel,val); - } - - if (enable_irq) - { - nrf_rtc_event_clear(p_instance->p_reg,event); - nrf_rtc_int_enable(p_instance->p_reg, int_mask); - } - nrf_rtc_event_enable(p_instance->p_reg,int_mask); - - NRF_LOG_INFO("RTC id: %d, channel enabled: %d, compare value: %d.", p_instance->instance_id, channel, val); - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - -void nrf_drv_rtc_tick_enable(nrf_drv_rtc_t const * const p_instance, bool enable_irq) -{ - nrf_rtc_event_t event = NRF_RTC_EVENT_TICK; - uint32_t mask = NRF_RTC_INT_TICK_MASK; - - nrf_rtc_event_clear(p_instance->p_reg, event); - nrf_rtc_event_enable(p_instance->p_reg, mask); - if (enable_irq) - { - nrf_rtc_int_enable(p_instance->p_reg, mask); - } - NRF_LOG_INFO("Tick events enabled."); -} - -void nrf_drv_rtc_tick_disable(nrf_drv_rtc_t const * const p_instance) -{ - uint32_t mask = NRF_RTC_INT_TICK_MASK; - - nrf_rtc_event_disable(p_instance->p_reg, mask); - nrf_rtc_int_disable(p_instance->p_reg, mask); - NRF_LOG_INFO("Tick events disabled."); -} - -void nrf_drv_rtc_overflow_enable(nrf_drv_rtc_t const * const p_instance, bool enable_irq) -{ - nrf_rtc_event_t event = NRF_RTC_EVENT_OVERFLOW; - uint32_t mask = NRF_RTC_INT_OVERFLOW_MASK; - - nrf_rtc_event_clear(p_instance->p_reg, event); - nrf_rtc_event_enable(p_instance->p_reg, mask); - if (enable_irq) - { - nrf_rtc_int_enable(p_instance->p_reg, mask); - } -} -void nrf_drv_rtc_overflow_disable(nrf_drv_rtc_t const * const p_instance) -{ - uint32_t mask = NRF_RTC_INT_OVERFLOW_MASK; - nrf_rtc_event_disable(p_instance->p_reg, mask); - nrf_rtc_int_disable(p_instance->p_reg, mask); -} - -uint32_t nrf_drv_rtc_max_ticks_get(nrf_drv_rtc_t const * const p_instance) -{ - uint32_t ticks; - if (m_cb[p_instance->instance_id].reliable) - { - ticks = RTC_COUNTER_COUNTER_Msk - m_cb[p_instance->instance_id].tick_latency; - } - else - { - ticks = RTC_COUNTER_COUNTER_Msk; - } - return ticks; -} - -/**@brief Generic function for handling RTC interrupt - * - * @param[in] p_reg Pointer to instance register structure. - * @param[in] instance_id Index of instance. - */ -__STATIC_INLINE void nrf_drv_rtc_int_handler(NRF_RTC_Type * p_reg, - uint32_t instance_id, - uint32_t channel_count) -{ - uint32_t i; - uint32_t int_mask = (uint32_t)NRF_RTC_INT_COMPARE0_MASK; - nrf_rtc_event_t event = NRF_RTC_EVENT_COMPARE_0; - - for (i = 0; i < channel_count; i++) - { - if (nrf_rtc_int_is_enabled(p_reg,int_mask) && nrf_rtc_event_pending(p_reg,event)) - { - nrf_rtc_event_disable(p_reg,int_mask); - nrf_rtc_int_disable(p_reg,int_mask); - nrf_rtc_event_clear(p_reg,event); - NRF_LOG_DEBUG("Event: %s, instance id: %d.", - (uint32_t)EVT_TO_STR(event), (uint32_t)instance_id); - m_handlers[instance_id]((nrf_drv_rtc_int_type_t)i); - } - int_mask <<= 1; - event = (nrf_rtc_event_t)((uint32_t)event + sizeof(uint32_t)); - } - event = NRF_RTC_EVENT_TICK; - if (nrf_rtc_int_is_enabled(p_reg,NRF_RTC_INT_TICK_MASK) && - nrf_rtc_event_pending(p_reg, event)) - { - nrf_rtc_event_clear(p_reg, event); - NRF_LOG_DEBUG("Event: %s, instance id: %d.", (uint32_t)EVT_TO_STR(event), instance_id); - m_handlers[instance_id](NRF_DRV_RTC_INT_TICK); - } - - event = NRF_RTC_EVENT_OVERFLOW; - if (nrf_rtc_int_is_enabled(p_reg,NRF_RTC_INT_OVERFLOW_MASK) && - nrf_rtc_event_pending(p_reg, event)) - { - nrf_rtc_event_clear(p_reg,event); - NRF_LOG_DEBUG("Event: %s, instance id: %d.", (uint32_t)EVT_TO_STR(event), instance_id); - m_handlers[instance_id](NRF_DRV_RTC_INT_OVERFLOW); - } -} - -#if NRF_MODULE_ENABLED(RTC0) -void RTC0_IRQHandler(void) -{ - nrf_drv_rtc_int_handler(NRF_RTC0,RTC0_INSTANCE_INDEX, NRF_RTC_CC_CHANNEL_COUNT(0)); -} -#endif - -#if NRF_MODULE_ENABLED(RTC1) -void RTC1_IRQHandler(void) -{ - nrf_drv_rtc_int_handler(NRF_RTC1,RTC1_INSTANCE_INDEX, NRF_RTC_CC_CHANNEL_COUNT(1)); -} -#endif - -#if NRF_MODULE_ENABLED(RTC2) -void RTC2_IRQHandler(void) -{ - nrf_drv_rtc_int_handler(NRF_RTC2,RTC2_INSTANCE_INDEX, NRF_RTC_CC_CHANNEL_COUNT(2)); -} -#endif -#endif //ENABLED_RTC_COUNT -#endif //NRF_MODULE_ENABLED(RTC) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/rtc/nrf_drv_rtc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/rtc/nrf_drv_rtc.h deleted file mode 100644 index 8e55c765bf0..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/rtc/nrf_drv_rtc.h +++ /dev/null @@ -1,365 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_DRV_RTC_H -#define NRF_DRV_RTC_H - - -#include "sdk_config.h" -#include "nordic_common.h" -#include "nrf_drv_common.h" -#include "nrf_rtc.h" -#include "sdk_errors.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @addtogroup nrf_rtc RTC HAL and driver - * @ingroup nrf_drivers - * @brief Real timer counter (RTC) APIs. - * @details The RTC HAL provides basic APIs for accessing the registers of the real time counter (RTC). - * The RTC driver provides APIs on a higher level. - * - * @defgroup nrf_drv_rtc RTC driver - * @{ - * @ingroup nrf_rtc - * @brief Real timer counter (RTC) driver. - */ - -/**@brief Macro to convert microseconds into ticks. */ -#define RTC_US_TO_TICKS(us,freq) (((us) * (freq)) / 1000000U) - -/** - * @enum nrf_drv_rtc_int_type_t - * @brief RTC driver interrupt types. - */ -typedef enum -{ - NRF_DRV_RTC_INT_COMPARE0 = 0, /**< Interrupt from COMPARE0 event. */ - NRF_DRV_RTC_INT_COMPARE1 = 1, /**< Interrupt from COMPARE1 event. */ - NRF_DRV_RTC_INT_COMPARE2 = 2, /**< Interrupt from COMPARE2 event. */ - NRF_DRV_RTC_INT_COMPARE3 = 3, /**< Interrupt from COMPARE3 event. */ - NRF_DRV_RTC_INT_TICK = 4, /**< Interrupt from TICK event. */ - NRF_DRV_RTC_INT_OVERFLOW = 5 /**< Interrupt from OVERFLOW event. */ -} nrf_drv_rtc_int_type_t; - -/**@brief RTC driver instance structure. */ -typedef struct -{ - NRF_RTC_Type * p_reg; /**< Pointer to instance register set. */ - IRQn_Type irq; /**< Instance IRQ ID. */ - uint8_t instance_id; /**< Instance index. */ - uint8_t cc_channel_count; /**< Number of capture/compare channels. */ -} nrf_drv_rtc_t; - -#define RTC0_INSTANCE_INDEX 0 -#define RTC1_INSTANCE_INDEX RTC0_INSTANCE_INDEX+RTC0_ENABLED -#define RTC2_INSTANCE_INDEX RTC1_INSTANCE_INDEX+RTC1_ENABLED - -/**@brief Macro for creating RTC driver instance.*/ -#define NRF_DRV_RTC_INSTANCE(id) \ -{ \ - .p_reg = CONCAT_2(NRF_RTC, id), \ - .irq = CONCAT_3(RTC, id, _IRQn), \ - .instance_id = CONCAT_3(RTC, id, _INSTANCE_INDEX),\ - .cc_channel_count = NRF_RTC_CC_CHANNEL_COUNT(id), \ -} - -/**@brief RTC driver instance configuration structure. */ -typedef struct -{ - uint16_t prescaler; /**< Prescaler. */ - uint8_t interrupt_priority; /**< Interrupt priority. */ - uint8_t tick_latency; /**< Maximum length of interrupt handler in ticks (max 7.7 ms). */ - bool reliable; /**< Reliable mode flag. */ -} nrf_drv_rtc_config_t; - -/**@brief RTC instance default configuration. */ -#define NRF_DRV_RTC_DEFAULT_CONFIG \ -{ \ - .prescaler = RTC_FREQ_TO_PRESCALER(RTC_DEFAULT_CONFIG_FREQUENCY), \ - .interrupt_priority = RTC_DEFAULT_CONFIG_IRQ_PRIORITY, \ - .reliable = RTC_DEFAULT_CONFIG_RELIABLE, \ - .tick_latency = RTC_US_TO_TICKS(NRF_MAXIMUM_LATENCY_US, RTC_DEFAULT_CONFIG_FREQUENCY), \ -} - -/**@brief RTC driver instance handler type. */ -typedef void (*nrf_drv_rtc_handler_t)(nrf_drv_rtc_int_type_t int_type); - -/**@brief Function for initializing the RTC driver instance. - * - * After initialization, the instance is in power off state. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] p_config Initial configuration. - * @param[in] handler User's event handler. - * - * @retval NRF_SUCCESS If successfully initialized. - * @retval NRF_ERROR_INVALID_PARAM If no handler was provided. - * @retval NRF_ERROR_INVALID_STATE If the instance is already initialized. - */ -ret_code_t nrf_drv_rtc_init(nrf_drv_rtc_t const * const p_instance, - nrf_drv_rtc_config_t const * p_config, - nrf_drv_rtc_handler_t handler); - -/**@brief Function for uninitializing the RTC driver instance. - * - * After uninitialization, the instance is in idle state. The hardware should return to the state - * before initialization. The function asserts if the instance is in idle state. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -void nrf_drv_rtc_uninit(nrf_drv_rtc_t const * const p_instance); - -/**@brief Function for enabling the RTC driver instance. - * - * @note Function asserts if instance is enabled. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -void nrf_drv_rtc_enable(nrf_drv_rtc_t const * const p_instance); - -/**@brief Function for disabling the RTC driver instance. - * - * @note Function asserts if instance is disabled. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -void nrf_drv_rtc_disable(nrf_drv_rtc_t const * const p_instance); - -/**@brief Function for setting a compare channel. - * - * The function asserts if the instance is not initialized or if the channel parameter is - * wrong. The function powers on the instance if the instance was in power off state. - * - * The driver is not entering a critical section when configuring RTC, which means that it can be - * preempted for a certain amount of time. When the driver was preempted and the value to be set - * is short in time, there is a risk that the driver sets a compare value that is - * behind. If RTCn_CONFIG_RELIABLE is 1 for the given instance, the Reliable mode handles that case. - * However, to detect if the requested value is behind, this mode makes the following assumptions: - * - The maximum preemption time in ticks (8 - bit value) is known and is less than 7.7 ms - * (for prescaler = 0, RTC frequency 32 kHz). - * - The requested absolute compare value is not bigger than (0x00FFFFFF) - tick_latency. It is - * the user's responsibility to ensure that. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] channel One of the instance's channels. - * @param[in] val Absolute value to be set in the compare register. - * @param[in] enable_irq True to enable the interrupt. False to disable the interrupt. - * - * @retval NRF_SUCCESS If the procedure was successful. - * @retval NRF_ERROR_TIMEOUT If the compare was not set because the request value is behind the current counter - * value. This error can only be reported if RTCn_CONFIG_RELIABLE = 1. - */ -ret_code_t nrf_drv_rtc_cc_set(nrf_drv_rtc_t const * const p_instance, - uint32_t channel, - uint32_t val, - bool enable_irq); - -/**@brief Function for disabling a channel. - * - * This function disables channel events and channel interrupts. The function asserts if the instance is not - * initialized or if the channel parameter is wrong. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] channel One of the instance's channels. - * - * @retval NRF_SUCCESS If the procedure was successful. - * @retval NRF_ERROR_TIMEOUT If an interrupt was pending on the requested channel. - */ -ret_code_t nrf_drv_rtc_cc_disable(nrf_drv_rtc_t const * const p_instance, uint32_t channel); - -/**@brief Function for enabling tick. - * - * This function enables the tick event and optionally the interrupt. The function asserts if the instance is not - * powered on. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] enable_irq True to enable the interrupt. False to disable the interrupt. - */ -void nrf_drv_rtc_tick_enable(nrf_drv_rtc_t const * const p_instance, bool enable_irq); - -/**@brief Function for disabling tick. - * - * This function disables the tick event and interrupt. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -void nrf_drv_rtc_tick_disable(nrf_drv_rtc_t const * const p_instance); - -/**@brief Function for enabling overflow. - * - * This function enables the overflow event and optionally the interrupt. The function asserts if the instance is - * not powered on. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] enable_irq True to enable the interrupt. False to disable the interrupt. - */ -void nrf_drv_rtc_overflow_enable(nrf_drv_rtc_t const * const p_instance, bool enable_irq); - -/**@brief Function for disabling overflow. - * - * This function disables the overflow event and interrupt. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -void nrf_drv_rtc_overflow_disable(nrf_drv_rtc_t const * const p_instance); - -/**@brief Function for getting the maximum relative ticks value that can be set in the compare channel. - * - * When a SoftDevice is used, it occupies the highest level interrupt, so that the application code can be - * interrupted at any moment for a certain period of time. If Reliable mode is enabled, the provided - * maximum latency is taken into account and the return value is smaller than the RTC counter - * resolution. If Reliable mode is disabled, the return value equals the counter resolution. - * - * @param[in] p_instance Pointer to the driver instance structure. - * - * @retval ticks Maximum ticks value. - */ -uint32_t nrf_drv_rtc_max_ticks_get(nrf_drv_rtc_t const * const p_instance); - -/**@brief Function for disabling all instance interrupts. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] p_mask Pointer to the location where the mask is filled. - */ -__STATIC_INLINE void nrf_drv_rtc_int_disable(nrf_drv_rtc_t const * const p_instance, - uint32_t * p_mask); - -/**@brief Function for enabling instance interrupts. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] mask Mask of interrupts to enable. - */ -__STATIC_INLINE void nrf_drv_rtc_int_enable(nrf_drv_rtc_t const * const p_instance, uint32_t mask); - -/**@brief Function for retrieving the current counter value. - * - * This function asserts if the instance is not powered on or if p_val is NULL. - * - * @param[in] p_instance Pointer to the driver instance structure. - * - * @retval value Counter value. - */ -__STATIC_INLINE uint32_t nrf_drv_rtc_counter_get(nrf_drv_rtc_t const * const p_instance); - -/**@brief Function for clearing the counter value. - * - * This function asserts if the instance is not powered on. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -__STATIC_INLINE void nrf_drv_rtc_counter_clear(nrf_drv_rtc_t const * const p_instance); - -/**@brief Function for returning a requested task address for the RTC driver instance. - * - * This function asserts if the output pointer is NULL. The task address can be used by the PPI module. - * - * @param[in] p_instance Pointer to the instance. - * @param[in] task One of the peripheral tasks. - * - * @retval Address of task register. - */ -__STATIC_INLINE uint32_t nrf_drv_rtc_task_address_get(nrf_drv_rtc_t const * const p_instance, - nrf_rtc_task_t task); - -/**@brief Function for returning a requested event address for the RTC driver instance. - * - * This function asserts if the output pointer is NULL. The event address can be used by the PPI module. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] event One of the peripheral events. - * - * @retval Address of event register. - */ -__STATIC_INLINE uint32_t nrf_drv_rtc_event_address_get(nrf_drv_rtc_t const * const p_instance, - nrf_rtc_event_t event); -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE void nrf_drv_rtc_int_disable(nrf_drv_rtc_t const * const p_instance, - uint32_t * p_mask) -{ - *p_mask = nrf_rtc_int_get(p_instance->p_reg); - nrf_rtc_int_disable(p_instance->p_reg, NRF_RTC_INT_TICK_MASK | - NRF_RTC_INT_OVERFLOW_MASK | - NRF_RTC_INT_COMPARE0_MASK | - NRF_RTC_INT_COMPARE1_MASK | - NRF_RTC_INT_COMPARE2_MASK | - NRF_RTC_INT_COMPARE3_MASK); -} - -__STATIC_INLINE void nrf_drv_rtc_int_enable(nrf_drv_rtc_t const * const p_instance, uint32_t mask) -{ - nrf_rtc_int_enable(p_instance->p_reg, mask); -} - -__STATIC_INLINE uint32_t nrf_drv_rtc_counter_get(nrf_drv_rtc_t const * const p_instance) -{ - return nrf_rtc_counter_get(p_instance->p_reg); -} - -__STATIC_INLINE void nrf_drv_rtc_counter_clear(nrf_drv_rtc_t const * const p_instance) -{ - nrf_rtc_task_trigger(p_instance->p_reg,NRF_RTC_TASK_CLEAR); -} - -__STATIC_INLINE uint32_t nrf_drv_rtc_task_address_get(nrf_drv_rtc_t const * const p_instance, - nrf_rtc_task_t task) -{ - return nrf_rtc_task_address_get(p_instance->p_reg, task); -} - -__STATIC_INLINE uint32_t nrf_drv_rtc_event_address_get(nrf_drv_rtc_t const * const p_instance, - nrf_rtc_event_t event) -{ - return nrf_rtc_event_address_get(p_instance->p_reg, event); -} -#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ - -/** - *@} - **/ - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_DRV_RTC_H */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/saadc/nrf_drv_saadc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/saadc/nrf_drv_saadc.c deleted file mode 100644 index 804f46ef300..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/saadc/nrf_drv_saadc.c +++ /dev/null @@ -1,647 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(SAADC) -#include "nrf_drv_saadc.h" -#include "nrf_assert.h" -#include "nrf_drv_common.h" -#include "app_util_platform.h" - -#define NRF_LOG_MODULE_NAME saadc - -#if SAADC_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL SAADC_CONFIG_LOG_LEVEL -#define NRF_LOG_INFO_COLOR SAADC_CONFIG_INFO_COLOR -#define NRF_LOG_DEBUG_COLOR SAADC_CONFIG_DEBUG_COLOR -#define EVT_TO_STR(event) (event == NRF_SAADC_EVENT_STARTED ? "NRF_SAADC_EVENT_STARTED" : \ - (event == NRF_SAADC_EVENT_END ? "NRF_SAADC_EVENT_END" : \ - (event == NRF_SAADC_EVENT_DONE ? "NRF_SAADC_EVENT_DONE" : \ - (event == NRF_SAADC_EVENT_RESULTDONE ? "NRF_SAADC_EVENT_RESULTDONE" : \ - (event == NRF_SAADC_EVENT_CALIBRATEDONE ? "NRF_SAADC_EVENT_CALIBRATEDONE" : \ - (event == NRF_SAADC_EVENT_STOPPED ? "NRF_SAADC_EVENT_STOPPED" : "UNKNOWN EVENT")))))) -#else //SAADC_CONFIG_LOG_ENABLED -#define EVT_TO_STR(event) "" -#define NRF_LOG_LEVEL 0 -#endif //SAADC_CONFIG_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - - -typedef enum -{ - NRF_SAADC_STATE_IDLE = 0, - NRF_SAADC_STATE_BUSY = 1, - NRF_SAADC_STATE_CALIBRATION = 2 -} nrf_saadc_state_t; - - -typedef struct -{ - nrf_saadc_input_t pselp; - nrf_saadc_input_t pseln; -} nrf_saadc_psel_buffer; - -static const nrf_drv_saadc_config_t m_default_config = NRF_DRV_SAADC_DEFAULT_CONFIG; - -/** @brief SAADC control block.*/ -typedef struct -{ - nrf_drv_saadc_event_handler_t event_handler; ///< Event handler function pointer. - volatile nrf_saadc_value_t * p_buffer; ///< Sample buffer. - volatile uint16_t buffer_size; ///< Size of the sample buffer. - volatile nrf_saadc_value_t * p_secondary_buffer; ///< Secondary sample buffer. - volatile nrf_saadc_state_t adc_state; ///< State of the SAADC. - uint32_t limits_enabled_flags; ///< Enabled limits flags. - uint16_t secondary_buffer_size; ///< Size of the secondary buffer. - uint16_t buffer_size_left; ///< When low power mode is active indicates how many samples left to convert on current buffer. - nrf_saadc_psel_buffer psel[NRF_SAADC_CHANNEL_COUNT]; ///< Pin configurations of SAADC channels. - nrf_drv_state_t state; ///< Driver initialization state. - uint8_t active_channels; ///< Number of enabled SAADC channels. - bool low_power_mode; ///< Indicates if low power mode is active. - bool conversions_end; ///< When low power mode is active indicates end of conversions on current buffer. -} nrf_drv_saadc_cb_t; - -static nrf_drv_saadc_cb_t m_cb; - -#define LOW_LIMIT_TO_FLAG(channel) ((2 * channel + 1)) -#define HIGH_LIMIT_TO_FLAG(channel) ((2 * channel)) -#define FLAG_IDX_TO_EVENT(idx) ((nrf_saadc_event_t)((uint32_t)NRF_SAADC_EVENT_CH0_LIMITH + \ - 4 * idx)) -#define LIMIT_EVENT_TO_CHANNEL(event) (uint8_t)(((uint32_t)event - \ - (uint32_t)NRF_SAADC_EVENT_CH0_LIMITH) / 8) -#define LIMIT_EVENT_TO_LIMIT_TYPE(event)((((uint32_t)event - (uint32_t)NRF_SAADC_EVENT_CH0_LIMITH) & 4) \ - ? NRF_SAADC_LIMIT_LOW : NRF_SAADC_LIMIT_HIGH) -#define HW_TIMEOUT 10000 - -void SAADC_IRQHandler(void) -{ - if (nrf_saadc_event_check(NRF_SAADC_EVENT_END)) - { - nrf_saadc_event_clear(NRF_SAADC_EVENT_END); - NRF_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_SAADC_EVENT_END)); - - if (!m_cb.low_power_mode || m_cb.conversions_end) - { - nrf_drv_saadc_evt_t evt; - evt.type = NRF_DRV_SAADC_EVT_DONE; - evt.data.done.p_buffer = (nrf_saadc_value_t *)m_cb.p_buffer; - evt.data.done.size = m_cb.buffer_size; - - if (m_cb.p_secondary_buffer == NULL) - { - m_cb.adc_state = NRF_SAADC_STATE_IDLE; - } - else - { - m_cb.buffer_size_left = m_cb.secondary_buffer_size; - m_cb.p_buffer = m_cb.p_secondary_buffer; - m_cb.buffer_size = m_cb.secondary_buffer_size; - m_cb.p_secondary_buffer = NULL; - if (!m_cb.low_power_mode) - { - nrf_saadc_task_trigger(NRF_SAADC_TASK_START); - } - } - m_cb.event_handler(&evt); - m_cb.conversions_end = false; - } - } - if (m_cb.low_power_mode && nrf_saadc_event_check(NRF_SAADC_EVENT_STARTED)) - { - nrf_saadc_event_clear(NRF_SAADC_EVENT_STARTED); - NRF_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_SAADC_EVENT_STARTED)); - - if (m_cb.buffer_size_left > m_cb.active_channels) - { - // More samples to convert than for single event. - m_cb.buffer_size_left -= m_cb.active_channels; - nrf_saadc_buffer_init((nrf_saadc_value_t *)&m_cb.p_buffer[m_cb.buffer_size - - m_cb.buffer_size_left], - m_cb.active_channels); - } - else if ((m_cb.buffer_size_left == m_cb.active_channels) && - - (m_cb.p_secondary_buffer != NULL)) - { - // Samples to convert for one event, prepare next buffer. - m_cb.conversions_end = true; - m_cb.buffer_size_left = 0; - nrf_saadc_buffer_init((nrf_saadc_value_t *)m_cb.p_secondary_buffer, - m_cb.active_channels); - } - else if (m_cb.buffer_size_left == m_cb.active_channels) - { - // Samples to convert for one event, but no second buffer. - m_cb.conversions_end = true; - m_cb.buffer_size_left = 0; - } - nrf_saadc_event_clear(NRF_SAADC_EVENT_END); - nrf_saadc_task_trigger(NRF_SAADC_TASK_SAMPLE); - } - if (nrf_saadc_event_check(NRF_SAADC_EVENT_CALIBRATEDONE)) - { - nrf_saadc_event_clear(NRF_SAADC_EVENT_CALIBRATEDONE); - NRF_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_SAADC_EVENT_CALIBRATEDONE)); - m_cb.adc_state = NRF_SAADC_STATE_IDLE; - - nrf_drv_saadc_evt_t evt; - evt.type = NRF_DRV_SAADC_EVT_CALIBRATEDONE; - m_cb.event_handler(&evt); - } - if (nrf_saadc_event_check(NRF_SAADC_EVENT_STOPPED)) - { - nrf_saadc_event_clear(NRF_SAADC_EVENT_STOPPED); - NRF_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_SAADC_EVENT_STOPPED)); - m_cb.adc_state = NRF_SAADC_STATE_IDLE; - } - else - { - uint32_t limit_flags = m_cb.limits_enabled_flags; - uint32_t flag_idx; - nrf_saadc_event_t event; - - while (limit_flags) - { - flag_idx = __CLZ(limit_flags); - limit_flags &= ~((1UL << 31) >> flag_idx); - event = FLAG_IDX_TO_EVENT(flag_idx); - if (nrf_saadc_event_check(event)) - { - nrf_saadc_event_clear(event); - nrf_drv_saadc_evt_t evt; - evt.type = NRF_DRV_SAADC_EVT_LIMIT; - evt.data.limit.channel = LIMIT_EVENT_TO_CHANNEL(event); - evt.data.limit.limit_type = LIMIT_EVENT_TO_LIMIT_TYPE(event); - NRF_LOG_DEBUG("Event limit, channel: %d, limit type: %d.", - evt.data.limit.channel, - evt.data.limit.limit_type); - m_cb.event_handler(&evt); - } - } - } -} - - -ret_code_t nrf_drv_saadc_init(nrf_drv_saadc_config_t const * p_config, - nrf_drv_saadc_event_handler_t event_handler) -{ - ret_code_t err_code; - - if (m_cb.state != NRF_DRV_STATE_UNINITIALIZED) - { - err_code = NRF_ERROR_INVALID_STATE; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - if (event_handler == NULL) - { - err_code = NRF_ERROR_INVALID_PARAM; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - if (p_config == NULL) - { - p_config = &m_default_config; - } - - m_cb.event_handler = event_handler; - nrf_saadc_resolution_set(p_config->resolution); - nrf_saadc_oversample_set(p_config->oversample); - m_cb.low_power_mode = p_config->low_power_mode; - m_cb.state = NRF_DRV_STATE_INITIALIZED; - m_cb.adc_state = NRF_SAADC_STATE_IDLE; - m_cb.active_channels = 0; - m_cb.limits_enabled_flags = 0; - m_cb.conversions_end = false; - - nrf_saadc_int_disable(NRF_SAADC_INT_ALL); - nrf_saadc_event_clear(NRF_SAADC_EVENT_END); - nrf_saadc_event_clear(NRF_SAADC_EVENT_STARTED); - nrf_drv_common_irq_enable(SAADC_IRQn, p_config->interrupt_priority); - nrf_saadc_int_enable(NRF_SAADC_INT_END); - - if (m_cb.low_power_mode) - { - nrf_saadc_int_enable(NRF_SAADC_INT_STARTED); - } - - nrf_saadc_enable(); - - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - - return err_code; -} - - -void nrf_drv_saadc_uninit(void) -{ - ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED); - - nrf_saadc_int_disable(NRF_SAADC_INT_ALL); - nrf_drv_common_irq_disable(SAADC_IRQn); - nrf_saadc_task_trigger(NRF_SAADC_TASK_STOP); - - // Wait for ADC being stopped. - uint32_t timeout = HW_TIMEOUT; - - while (nrf_saadc_event_check(NRF_SAADC_EVENT_STOPPED) == 0 && timeout > 0) - { - --timeout; - } - ASSERT(timeout > 0); - - nrf_saadc_disable(); - m_cb.adc_state = NRF_SAADC_STATE_IDLE; - - for (uint32_t channel = 0; channel < NRF_SAADC_CHANNEL_COUNT; ++channel) - { - if (m_cb.psel[channel].pselp != NRF_SAADC_INPUT_DISABLED) - { - (void)nrf_drv_saadc_channel_uninit(channel); - } - } - - m_cb.state = NRF_DRV_STATE_UNINITIALIZED; -} - - -ret_code_t nrf_drv_saadc_channel_init(uint8_t channel, - nrf_saadc_channel_config_t const * const p_config) -{ - ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED); - ASSERT(channel < NRF_SAADC_CHANNEL_COUNT); - // Oversampling can be used only with one channel. - ASSERT((nrf_saadc_oversample_get() == NRF_SAADC_OVERSAMPLE_DISABLED) || - (m_cb.active_channels == 0)); - ASSERT((p_config->pin_p <= NRF_SAADC_INPUT_VDD) && - (p_config->pin_p > NRF_SAADC_INPUT_DISABLED)); - ASSERT(p_config->pin_n <= NRF_SAADC_INPUT_VDD); - - ret_code_t err_code; - - // A channel can only be initialized if the driver is in the idle state. - if (m_cb.adc_state != NRF_SAADC_STATE_IDLE) - { - err_code = NRF_ERROR_BUSY; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - -#ifdef NRF52_PAN_74 - if ((p_config->acq_time == NRF_SAADC_ACQTIME_3US) || (p_config->acq_time == NRF_SAADC_ACQTIME_5US)) - { - nrf_saadc_disable(); - } -#endif //NRF52_PAN_74 - - if (!m_cb.psel[channel].pselp) - { - ++m_cb.active_channels; - } - m_cb.psel[channel].pselp = p_config->pin_p; - m_cb.psel[channel].pseln = p_config->pin_n; - nrf_saadc_channel_init(channel, p_config); - nrf_saadc_channel_input_set(channel, p_config->pin_p, p_config->pin_n); - -#ifdef NRF52_PAN_74 - if ((p_config->acq_time == NRF_SAADC_ACQTIME_3US) || (p_config->acq_time == NRF_SAADC_ACQTIME_5US)) - { - nrf_saadc_enable(); - } -#endif //NRF52_PAN_74 - - NRF_LOG_INFO("Channel initialized: %d.", channel); - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -ret_code_t nrf_drv_saadc_channel_uninit(uint8_t channel) -{ - ASSERT(channel < NRF_SAADC_CHANNEL_COUNT) - ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED); - - ret_code_t err_code; - - // A channel can only be uninitialized if the driver is in the idle state. - if (m_cb.adc_state != NRF_SAADC_STATE_IDLE) - { - err_code = NRF_ERROR_BUSY; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - if (m_cb.psel[channel].pselp) - { - --m_cb.active_channels; - } - m_cb.psel[channel].pselp = NRF_SAADC_INPUT_DISABLED; - m_cb.psel[channel].pseln = NRF_SAADC_INPUT_DISABLED; - nrf_saadc_channel_input_set(channel, NRF_SAADC_INPUT_DISABLED, NRF_SAADC_INPUT_DISABLED); - nrf_drv_saadc_limits_set(channel, NRF_DRV_SAADC_LIMITL_DISABLED, NRF_DRV_SAADC_LIMITH_DISABLED); - NRF_LOG_INFO("Channel denitialized: %d.", channel); - - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", - (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -uint32_t nrf_drv_saadc_sample_task_get(void) -{ - return nrf_saadc_task_address_get( - m_cb.low_power_mode ? NRF_SAADC_TASK_START : NRF_SAADC_TASK_SAMPLE); -} - - -ret_code_t nrf_drv_saadc_sample_convert(uint8_t channel, nrf_saadc_value_t * p_value) -{ - ret_code_t err_code; - - if (m_cb.adc_state != NRF_SAADC_STATE_IDLE) - { - err_code = NRF_ERROR_BUSY; - NRF_LOG_WARNING("Function: %s error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - m_cb.adc_state = NRF_SAADC_STATE_BUSY; - nrf_saadc_int_disable(NRF_SAADC_INT_STARTED | NRF_SAADC_INT_END); - nrf_saadc_buffer_init(p_value, 1); - if (m_cb.active_channels > 1) - { - for (uint32_t i = 0; i < NRF_SAADC_CHANNEL_COUNT; ++i) - { - nrf_saadc_channel_input_set(i, NRF_SAADC_INPUT_DISABLED, NRF_SAADC_INPUT_DISABLED); - } - } - nrf_saadc_channel_input_set(channel, - m_cb.psel[channel].pselp, m_cb.psel[channel].pseln); - nrf_saadc_task_trigger(NRF_SAADC_TASK_START); - nrf_saadc_task_trigger(NRF_SAADC_TASK_SAMPLE); - - uint32_t timeout = HW_TIMEOUT; - - while (0 == nrf_saadc_event_check(NRF_SAADC_EVENT_END) && timeout > 0) - { - timeout--; - } - nrf_saadc_event_clear(NRF_SAADC_EVENT_STARTED); - nrf_saadc_event_clear(NRF_SAADC_EVENT_END); - - NRF_LOG_INFO("Conversion value: %d, channel: %d.", *p_value & 0x0000FFFF, channel); - - if (m_cb.active_channels > 1) - { - for (uint32_t i = 0; i < NRF_SAADC_CHANNEL_COUNT; ++i) - { - nrf_saadc_channel_input_set(i, m_cb.psel[i].pselp, m_cb.psel[i].pseln); - } - } - - if (m_cb.low_power_mode) - { - nrf_saadc_int_enable(NRF_SAADC_INT_STARTED | NRF_SAADC_INT_END); - } - else - { - nrf_saadc_int_enable(NRF_SAADC_INT_END); - } - - m_cb.adc_state = NRF_SAADC_STATE_IDLE; - - err_code = NRF_SUCCESS; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -ret_code_t nrf_drv_saadc_buffer_convert(nrf_saadc_value_t * p_buffer, uint16_t size) -{ - ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED); - ASSERT((size % m_cb.active_channels) == 0); - ret_code_t err_code; - - - nrf_saadc_int_disable(NRF_SAADC_INT_END | NRF_SAADC_INT_CALIBRATEDONE); - if (m_cb.adc_state == NRF_SAADC_STATE_CALIBRATION) - { - nrf_saadc_int_enable(NRF_SAADC_INT_END | NRF_SAADC_INT_CALIBRATEDONE); - err_code = NRF_ERROR_BUSY; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - if (m_cb.adc_state == NRF_SAADC_STATE_BUSY) - { - if ( m_cb.p_secondary_buffer) - { - nrf_saadc_int_enable(NRF_SAADC_INT_END); - err_code = NRF_ERROR_BUSY; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - else - { - m_cb.p_secondary_buffer = p_buffer; - m_cb.secondary_buffer_size = size; - if (!m_cb.low_power_mode) - { - while (nrf_saadc_event_check(NRF_SAADC_EVENT_STARTED) == 0); - nrf_saadc_event_clear(NRF_SAADC_EVENT_STARTED); - nrf_saadc_buffer_init(p_buffer, size); - } - nrf_saadc_int_enable(NRF_SAADC_INT_END); - err_code = NRF_SUCCESS; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - } - nrf_saadc_int_enable(NRF_SAADC_INT_END); - m_cb.adc_state = NRF_SAADC_STATE_BUSY; - - m_cb.p_buffer = p_buffer; - m_cb.buffer_size = size; - m_cb.p_secondary_buffer = NULL; - - NRF_LOG_INFO("Function: %d, buffer length: %d, active channels: %d.", - (uint32_t)__func__, size, m_cb.active_channels); - - if (m_cb.low_power_mode) - { - m_cb.buffer_size_left = size; - nrf_saadc_buffer_init(p_buffer, m_cb.active_channels); - } - else - { - nrf_saadc_buffer_init(p_buffer, size); - nrf_saadc_event_clear(NRF_SAADC_EVENT_STARTED); - nrf_saadc_task_trigger(NRF_SAADC_TASK_START); - } - - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -ret_code_t nrf_drv_saadc_sample() -{ - ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED); - - ret_code_t err_code = NRF_SUCCESS; - if (m_cb.adc_state != NRF_SAADC_STATE_BUSY) - { - err_code = NRF_ERROR_INVALID_STATE; - } - else if (m_cb.low_power_mode) - { - nrf_saadc_task_trigger(NRF_SAADC_TASK_START); - } - else - { - nrf_saadc_task_trigger(NRF_SAADC_TASK_SAMPLE); - } - - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -ret_code_t nrf_drv_saadc_calibrate_offset() -{ - ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED); - - ret_code_t err_code; - - if (m_cb.adc_state != NRF_SAADC_STATE_IDLE) - { - err_code = NRF_ERROR_BUSY; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - m_cb.adc_state = NRF_SAADC_STATE_CALIBRATION; - - nrf_saadc_event_clear(NRF_SAADC_EVENT_CALIBRATEDONE); - nrf_saadc_int_enable(NRF_SAADC_INT_CALIBRATEDONE); - nrf_saadc_task_trigger(NRF_SAADC_TASK_CALIBRATEOFFSET); - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -bool nrf_drv_saadc_is_busy(void) -{ - return (m_cb.adc_state != NRF_SAADC_STATE_IDLE); -} - - -void nrf_drv_saadc_abort(void) -{ - if (nrf_drv_saadc_is_busy()) - { - nrf_saadc_event_clear(NRF_SAADC_EVENT_STOPPED); - nrf_saadc_task_trigger(NRF_SAADC_TASK_STOP); - - if (m_cb.adc_state == NRF_SAADC_STATE_CALIBRATION) - { - m_cb.adc_state = NRF_SAADC_STATE_IDLE; - } - else - { - // Wait for ADC being stopped. - uint32_t timeout = HW_TIMEOUT; - - while ((m_cb.adc_state != NRF_SAADC_STATE_IDLE) && (timeout > 0)) - { - --timeout; - } - ASSERT(timeout > 0); - } - - m_cb.p_buffer = 0; - m_cb.p_secondary_buffer = 0; - NRF_LOG_INFO("Conversion aborted."); - } -} - - -void nrf_drv_saadc_limits_set(uint8_t channel, int16_t limit_low, int16_t limit_high) -{ - ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED); - ASSERT(m_cb.event_handler); // only non blocking mode supported - ASSERT(limit_low >= NRF_DRV_SAADC_LIMITL_DISABLED); - ASSERT(limit_high <= NRF_DRV_SAADC_LIMITH_DISABLED); - ASSERT(limit_low < limit_high); - nrf_saadc_channel_limits_set(channel, limit_low, limit_high); - - uint32_t int_mask = nrf_saadc_limit_int_get(channel, NRF_SAADC_LIMIT_LOW); - if (limit_low == NRF_DRV_SAADC_LIMITL_DISABLED) - { - m_cb.limits_enabled_flags &= ~(0x80000000 >> LOW_LIMIT_TO_FLAG(channel)); - nrf_saadc_int_disable(int_mask); - } - else - { - m_cb.limits_enabled_flags |= (0x80000000 >> LOW_LIMIT_TO_FLAG(channel)); - nrf_saadc_int_enable(int_mask); - } - - int_mask = nrf_saadc_limit_int_get(channel, NRF_SAADC_LIMIT_HIGH); - if (limit_high == NRF_DRV_SAADC_LIMITH_DISABLED) - { - m_cb.limits_enabled_flags &= ~(0x80000000 >> HIGH_LIMIT_TO_FLAG(channel)); - nrf_saadc_int_disable(int_mask); - } - else - { - m_cb.limits_enabled_flags |= (0x80000000 >> HIGH_LIMIT_TO_FLAG(channel)); - nrf_saadc_int_enable(int_mask); - } -} -#endif //NRF_MODULE_ENABLED(SAADC) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/saadc/nrf_drv_saadc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/saadc/nrf_drv_saadc.h deleted file mode 100644 index 45b4204e70d..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/saadc/nrf_drv_saadc.h +++ /dev/null @@ -1,326 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @addtogroup nrf_saadc SAADC HAL and driver - * @ingroup nrf_drivers - * @brief @tagAPI52 Successive Approximation Analog-to-Digital Converter (SAADC) APIs. - * @details The SAADC HAL provides basic APIs for accessing the registers of the SAADC peripheral. - * The SAADC driver provides APIs on a higher level. - * - * @defgroup nrf_drv_saadc SAADC driver - * @{ - * @ingroup nrf_saadc - * - * @brief @tagAPI52 Successive Approximation Analog-to-Digital Converter (SAADC) driver. - */ - -#ifndef NRF_DRV_SAADC_H__ -#define NRF_DRV_SAADC_H__ - -#include "sdk_config.h" -#include "nrf_saadc.h" -#include "sdk_errors.h" -#include "nrf_drv_common.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Value that should be set as high limit to disable limit detection. - */ -#define NRF_DRV_SAADC_LIMITH_DISABLED (2047) -/** - * @brief Value that should be set as low limit to disable limit detection. - */ -#define NRF_DRV_SAADC_LIMITL_DISABLED (-2048) - -/** - * @brief Macro for setting @ref nrf_drv_saadc_config_t to default settings. - */ -#define NRF_DRV_SAADC_DEFAULT_CONFIG \ - { \ - .resolution = (nrf_saadc_resolution_t)SAADC_CONFIG_RESOLUTION, \ - .oversample = (nrf_saadc_oversample_t)SAADC_CONFIG_OVERSAMPLE, \ - .interrupt_priority = SAADC_CONFIG_IRQ_PRIORITY, \ - .low_power_mode = SAADC_CONFIG_LP_MODE \ - } - -/** - * @brief Macro for setting @ref nrf_saadc_channel_config_t to default settings - * in single ended mode. - * - * @param PIN_P Analog input. - */ -#define NRF_DRV_SAADC_DEFAULT_CHANNEL_CONFIG_SE(PIN_P) \ - { \ - .resistor_p = NRF_SAADC_RESISTOR_DISABLED, \ - .resistor_n = NRF_SAADC_RESISTOR_DISABLED, \ - .gain = NRF_SAADC_GAIN1_6, \ - .reference = NRF_SAADC_REFERENCE_INTERNAL, \ - .acq_time = NRF_SAADC_ACQTIME_10US, \ - .mode = NRF_SAADC_MODE_SINGLE_ENDED, \ - .burst = NRF_SAADC_BURST_DISABLED, \ - .pin_p = (nrf_saadc_input_t)(PIN_P), \ - .pin_n = NRF_SAADC_INPUT_DISABLED \ - } - -/** - * @brief Macro for setting @ref nrf_saadc_channel_config_t to default settings - * in differential mode. - * - * @param PIN_P Positive analog input. - * @param PIN_N Negative analog input. - */ -#define NRF_DRV_SAADC_DEFAULT_CHANNEL_CONFIG_DIFFERENTIAL(PIN_P, PIN_N) \ - { \ - .resistor_p = NRF_SAADC_RESISTOR_DISABLED, \ - .resistor_n = NRF_SAADC_RESISTOR_DISABLED, \ - .gain = NRF_SAADC_GAIN1_6, \ - .reference = NRF_SAADC_REFERENCE_INTERNAL, \ - .acq_time = NRF_SAADC_ACQTIME_10US, \ - .mode = NRF_SAADC_MODE_DIFFERENTIAL, \ - .pin_p = (nrf_saadc_input_t)(PIN_P), \ - .pin_n = (nrf_saadc_input_t)(PIN_N) \ - } - -/** - * @brief Analog-to-digital converter driver configuration structure. - */ -typedef struct -{ - nrf_saadc_resolution_t resolution; ///< Resolution configuration. - nrf_saadc_oversample_t oversample; ///< Oversampling configuration. - uint8_t interrupt_priority; ///< Interrupt priority. - bool low_power_mode; ///< Indicates if low power mode is active. -} nrf_drv_saadc_config_t; - -/** - * @brief Driver event types. - */ -typedef enum -{ - NRF_DRV_SAADC_EVT_DONE, ///< Event generated when the buffer is filled with samples. - NRF_DRV_SAADC_EVT_LIMIT, ///< Event generated after one of the limits is reached. - NRF_DRV_SAADC_EVT_CALIBRATEDONE ///< Event generated when the calibration is complete. -} nrf_drv_saadc_evt_type_t; - -/** - * @brief Analog-to-digital converter driver done event data. - */ -typedef struct -{ - nrf_saadc_value_t * p_buffer; ///< Pointer to buffer with converted samples. - uint16_t size; ///< Number of samples in the buffer. -} nrf_drv_saadc_done_evt_t; - -/** - * @brief Analog-to-digital converter driver limit event data. - */ -typedef struct -{ - uint8_t channel; ///< Channel on which the limit was detected. - nrf_saadc_limit_t limit_type; ///< Type of limit detected. -} nrf_drv_saadc_limit_evt_t; - -/** - * @brief Analog-to-digital converter driver event structure. - */ -typedef struct -{ - nrf_drv_saadc_evt_type_t type; ///< Event type. - union - { - nrf_drv_saadc_done_evt_t done; ///< Data for @ref NRF_DRV_SAADC_EVT_DONE event. - nrf_drv_saadc_limit_evt_t limit; ///< Data for @ref NRF_DRV_SAADC_EVT_LIMIT event. - } data; -} nrf_drv_saadc_evt_t; - -/** - * @brief ADC event handler. - * - * @param[in] p_event Pointer to an ADC event. The event structure is allocated on - * the stack, so it is valid only within the context of - * the event handler. - */ -typedef void (* nrf_drv_saadc_event_handler_t)(nrf_drv_saadc_evt_t const * p_event); - -/** - * @brief Function for initializing the SAADC. - * - * @param[in] p_config Pointer to a configuration structure. If NULL, the default one is used. - * @param[in] event_handler Event handler provided by the user. - * - * @retval NRF_SUCCESS If initialization was successful. - * @retval NRF_ERROR_INVALID_STATE If the driver is already initialized. - * @retval NRF_ERROR_INVALID_PARAM If event_handler is NULL. - */ -ret_code_t nrf_drv_saadc_init(nrf_drv_saadc_config_t const * p_config, - nrf_drv_saadc_event_handler_t event_handler); - -/** - * @brief Function for uninitializing the SAADC. - * - * This function stops all ongoing conversions and disables all channels. - */ -void nrf_drv_saadc_uninit(void); - - -/** - * @brief Function for getting the address of a SAMPLE SAADC task. - * - * @return Task address. - */ -uint32_t nrf_drv_saadc_sample_task_get(void); - -/** - * @brief Function for initializing an SAADC channel. - * - * This function configures and enables the channel. - * - * @retval NRF_SUCCESS If initialization was successful. - * @retval NRF_ERROR_INVALID_STATE If the ADC was not initialized. - * @retval NRF_ERROR_NO_MEM If the specified channel was already allocated. - */ -ret_code_t nrf_drv_saadc_channel_init(uint8_t channel, - nrf_saadc_channel_config_t const * const p_config); - - -/** - * @brief Function for uninitializing an SAADC channel. - * - * @retval NRF_SUCCESS If uninitialization was successful. - * @retval NRF_ERROR_BUSY If the ADC is busy. - */ -ret_code_t nrf_drv_saadc_channel_uninit(uint8_t channel); - -/** - * @brief Function for starting SAADC sampling. - * - * @retval NRF_SUCCESS If ADC sampling was triggered. - * @retval NRF_ERROR_INVALID_STATE If ADC is in idle state. - */ -ret_code_t nrf_drv_saadc_sample(void); - -/** - * @brief Blocking function for executing a single ADC conversion. - * - * This function selects the desired input, starts a single conversion, - * waits for it to finish, and returns the result. - * - * The function will fail if ADC is busy. - * - * @param[in] channel Channel. - * @param[out] p_value Pointer to the location where the result should be placed. - * - * @retval NRF_SUCCESS If conversion was successful. - * @retval NRF_ERROR_BUSY If the ADC driver is busy. - */ -ret_code_t nrf_drv_saadc_sample_convert(uint8_t channel, nrf_saadc_value_t * p_value); - -/** - * @brief Function for issuing conversion of data to the buffer. - * - * This function is non-blocking. The application is notified about filling the buffer by the event handler. - * Conversion will be done on all enabled channels. If the ADC is in idle state, the function will set up Easy - * DMA for the conversion. The ADC will be ready for sampling and wait for the SAMPLE task. It can be - * triggered manually by the @ref nrf_drv_saadc_sample function or by PPI using the @ref NRF_SAADC_TASK_SAMPLE - * task. If one buffer is already set and the conversion is ongoing, calling this function will - * result in queuing the given buffer. The driver will start filling the issued buffer when the first one is - * completed. If the function is called again before the first buffer is filled or calibration is in progress, - * it will return with error. - * - * @param[in] buffer Result buffer. - * @param[in] size Buffer size in words. - * - * @retval NRF_SUCCESS If conversion was successful. - * @retval NRF_ERROR_BUSY If the driver already has two buffers set or calibration is in progress. - */ -ret_code_t nrf_drv_saadc_buffer_convert(nrf_saadc_value_t * buffer, uint16_t size); - -/** - * @brief Function for triggering the ADC offset calibration. - * - * This function is non-blocking. The application is notified about completion by the event handler. - * Calibration will also trigger DONE and RESULTDONE events. - * - * The function will fail if ADC is busy or calibration is already in progress. - * - * @retval NRF_SUCCESS If calibration was started successfully. - * @retval NRF_ERROR_BUSY If the ADC driver is busy. - */ -ret_code_t nrf_drv_saadc_calibrate_offset(void); - -/** - * @brief Function for retrieving the SAADC state. - * - * @retval true If the ADC is busy. - * @retval false If the ADC is ready. - */ -bool nrf_drv_saadc_is_busy(void); - -/** - * @brief Function for aborting ongoing and buffered conversions. - * @note @ref NRF_DRV_SAADC_EVT_DONE event will be generated if there is a conversion in progress. - * Event will contain number of words in the sample buffer. - */ -void nrf_drv_saadc_abort(void); - -/** - * @brief Function for setting the SAADC channel limits. - * When limits are enabled and the result exceeds the defined bounds, the limit handler function is called. - * - * @param[in] channel SAADC channel number. - * @param[in] limit_low Lower limit (valid values from @ref NRF_DRV_SAADC_LIMITL_DISABLED to - * @ref NRF_DRV_SAADC_LIMITH_DISABLED). Conversion results below this value will trigger - * the handler function. Set to @ref NRF_DRV_SAADC_LIMITL_DISABLED to disable this limit. - * @param[in] limit_high Upper limit (valid values from @ref NRF_DRV_SAADC_LIMITL_DISABLED to - * @ref NRF_DRV_SAADC_LIMITH_DISABLED). Conversion results above this value will trigger - * the handler function. Set to @ref NRF_DRV_SAADC_LIMITH_DISABLED to disable this limit. - */ -void nrf_drv_saadc_limits_set(uint8_t channel, int16_t limit_low, int16_t limit_high); - -#ifdef __cplusplus -} -#endif - -#endif // NRF_DRV_SAADC_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/sdio/config/sdio_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/sdio/config/sdio_config.h deleted file mode 100644 index f59e553c3d5..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/sdio/config/sdio_config.h +++ /dev/null @@ -1,55 +0,0 @@ -/** - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef SDIO_CONFIG_H -#define SDIO_CONFIG_H - -#ifdef __cplusplus -extern "C" { -#endif - -#define SDIO_CONFIG_CLOCK_PIN_NUMBER 24 -#define SDIO_CONFIG_DATA_PIN_NUMBER 25 - - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/sdio/sdio.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/sdio/sdio.c deleted file mode 100644 index 381c77d36a0..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/sdio/sdio.c +++ /dev/null @@ -1,244 +0,0 @@ -/** - * Copyright (c) 2009 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include - -#include "nrf.h" -#include "nrf_delay.h" -#include "sdio.h" -#include "nrf_gpio.h" - -#include "sdio_config.h" - -/*lint ++flb "Enter library region" */ - -/*lint -e717 -save "Suppress do {} while (0) for these macros" */ -#define SDIO_CLOCK_HIGH() do { NRF_GPIO->OUTSET = (1UL << SDIO_CONFIG_CLOCK_PIN_NUMBER); } while (0) /*!< Pulls SCL line high */ -#define SDIO_CLOCK_LOW() do { NRF_GPIO->OUTCLR = (1UL << SDIO_CONFIG_CLOCK_PIN_NUMBER); } while (0) /*!< Pulls SCL line low */ -#define SDIO_DATA_HIGH() do { NRF_GPIO->OUTSET = (1UL << SDIO_CONFIG_DATA_PIN_NUMBER); } while (0) /*!< Pulls SDA line high */ -#define SDIO_DATA_LOW() do { NRF_GPIO->OUTCLR = (1UL << SDIO_CONFIG_DATA_PIN_NUMBER); } while (0) /*!< Pulls SDA line low */ -#define SDIO_DATA_OUTPUT() do { NRF_GPIO->DIRSET = (1UL << SDIO_CONFIG_DATA_PIN_NUMBER); } while (0) /*!< Configures SDA pin as output */ -#define SDIO_CLOCK_OUTPUT() do { NRF_GPIO->DIRSET = (1UL << SDIO_CONFIG_CLOCK_PIN_NUMBER); } while (0) /*!< Configures SCL pin as output */ -/*lint -restore */ - -/*lint -emacro(845,SDIO_DATA_INPUT) // A zero has been given as right argument to operator '|'" */ - -#define SDIO_DATA_INPUT() do { \ - nrf_gpio_cfg_input(25, NRF_GPIO_PIN_NOPULL); \ -} while (0) - -#define SDIO_DATA_READ() ((NRF_GPIO->IN >> SDIO_CONFIG_DATA_PIN_NUMBER) & 0x1UL) /*!< Reads current state of SDA */ -#define SDIO_CLOCK_READ() ((NRF_GPIO->IN >> SDIO_CONFIG_CLOCK_PIN_NUMBER) & 0x1UL) /*!< Reads current state of SCL */ -#define SDIO_DELAY() nrf_delay_us(10) /*!< Time to wait when pin states are changed. For fast-mode the delay can be zero and for standard-mode 4 us delay is sufficient. */ - -void sdio_init(void) -{ - SDIO_CLOCK_HIGH(); - SDIO_DATA_HIGH(); - SDIO_CLOCK_OUTPUT(); - SDIO_DATA_INPUT(); - - // If slave is stuck in the middle of transfer, clock out bits until the slave ACKs the transfer - for (uint_fast8_t i = 16; i--;) - { - SDIO_DELAY(); - SDIO_CLOCK_LOW(); - SDIO_DELAY(); - SDIO_CLOCK_HIGH(); - SDIO_DELAY(); - - if (SDIO_DATA_READ()) - { - break; - } - } - - for (uint_fast8_t i = 5; i--;) - { - SDIO_DELAY(); - SDIO_CLOCK_LOW(); - SDIO_DELAY(); - SDIO_CLOCK_HIGH(); - } - - SDIO_DATA_OUTPUT(); - SDIO_DATA_HIGH(); - - SDIO_DELAY(); -} - -uint8_t sdio_read_byte(uint8_t address) -{ - uint8_t data_byte = 0; - - SDIO_DATA_OUTPUT(); - - for (uint_fast8_t i = 8; i--;) - { - SDIO_DELAY(); - - SDIO_CLOCK_LOW(); - - if (address & (1U << i)) - { - SDIO_DATA_HIGH(); - } - else - { - SDIO_DATA_LOW(); - } - - SDIO_DELAY(); - - SDIO_CLOCK_HIGH(); - } - - nrf_delay_us(20); - - SDIO_DATA_INPUT(); - - for (uint_fast8_t i = 8; i--;) - { - SDIO_CLOCK_LOW(); - SDIO_DELAY(); - SDIO_CLOCK_HIGH(); - SDIO_DELAY(); - data_byte |= (uint8_t)(SDIO_DATA_READ() << i); - } - - SDIO_DATA_HIGH(); - SDIO_DATA_OUTPUT(); - - SDIO_DELAY(); - - return data_byte; -} - -void sdio_read_burst(uint8_t * target_buffer, uint8_t target_buffer_size) -{ - uint_fast8_t address = 0x63; - - SDIO_DATA_OUTPUT(); - - for (uint_fast8_t bit_index=8; bit_index--;) - { - SDIO_CLOCK_LOW(); - - if (address & (1U << bit_index)) - { - SDIO_DATA_HIGH(); - } - else - { - SDIO_DATA_LOW(); - } - - SDIO_CLOCK_HIGH(); - } - - SDIO_DATA_INPUT(); - - for (uint_fast8_t target_buffer_index = 0; target_buffer_index < target_buffer_size; target_buffer_index++) - { - target_buffer[target_buffer_index] = 0; - - for (uint_fast8_t bit_index = 8; bit_index--;) - { - SDIO_CLOCK_LOW(); - SDIO_CLOCK_HIGH(); - target_buffer[target_buffer_index] |= (uint8_t)(SDIO_DATA_READ() << bit_index); - } - } -} - -void sdio_write_byte(uint8_t address, uint8_t data_byte) -{ - // Add write indication bit - address |= 0x80; - - SDIO_DATA_OUTPUT(); - - for (uint_fast8_t i = 8; i--;) - { - SDIO_DELAY(); - - SDIO_CLOCK_LOW(); - - if (address & (1U << i)) - { - SDIO_DATA_HIGH(); - } - else - { - SDIO_DATA_LOW(); - } - - SDIO_DELAY(); - - SDIO_CLOCK_HIGH(); - } - - SDIO_DELAY(); - - for (uint_fast8_t i = 8; i--;) - { - SDIO_CLOCK_LOW(); - - if (data_byte & (1U << i)) - { - SDIO_DATA_HIGH(); - } - else - { - SDIO_DATA_LOW(); - } - - SDIO_DELAY(); - - SDIO_CLOCK_HIGH(); - - SDIO_DELAY(); - } - - SDIO_DATA_HIGH(); - - SDIO_DELAY(); -} - -/*lint --flb "Leave library region" */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/sdio/sdio.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/sdio/sdio.h deleted file mode 100644 index e52e7e9872a..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/sdio/sdio.h +++ /dev/null @@ -1,105 +0,0 @@ -/** - * Copyright (c) 2009 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef SDIO_H -#define SDIO_H - -/*lint ++flb "Enter library region" */ - -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** @file -* @brief 2-wire serial interface driver (compatible with ADNS2080 mouse sensor driver) -* -* -* @defgroup nrf_drivers_sdio SDIO driver -* @{ -* @ingroup nrf_drivers -* @brief 2-wire serial interface driver. -*/ - -/** - * @brief Function for initializing 2-wire serial interface and trying to handle stuck slaves. - * - */ -void sdio_init(void); - -/** - * @brief Function for reading a byte over 2-wire serial interface. - * - * Developer needs to implement this function in a way that suits the hardware. - * @param address Register address to read from - * @return Byte read - */ -uint8_t sdio_read_byte(uint8_t address); - -/** - * @brief Function for reading several bytes over 2-wire serial interface using burst mode. - * - * Developer needs to implement this function in a way that suits the hardware. - * @param target_buffer Buffer location to store read bytes to - * @param target_buffer_size Bytes allocated for target_buffer - */ -void sdio_read_burst(uint8_t *target_buffer, uint8_t target_buffer_size); - -/** - * @brief Function for writing a byte over 2-wire serial interface. - * - * Developer needs to implement this function in a way that suits the hardware. - * @param address Register address to write to - * @param data_byte Data byte to write - */ -void sdio_write_byte(uint8_t address, uint8_t data_byte); - -/** - *@} - **/ - -/*lint --flb "Leave library region" */ - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/spi_master/nrf_drv_spi.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/spi_master/nrf_drv_spi.c deleted file mode 100644 index 5697f5415fa..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/spi_master/nrf_drv_spi.c +++ /dev/null @@ -1,783 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(SPI) -#include "nrf_drv_spi.h" -#if ENABLED_SPI_COUNT -#include "nrf_drv_common.h" -#include "nrf_gpio.h" -#include "nrf_assert.h" -#include "app_util_platform.h" - -#define NRF_LOG_MODULE_NAME spi - - -#if SPI_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL SPI_CONFIG_LOG_LEVEL -#define NRF_LOG_INFO_COLOR SPI_CONFIG_INFO_COLOR -#define NRF_LOG_DEBUG_COLOR SPI_CONFIG_DEBUG_COLOR - -#else //SPI_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL 0 -#endif //SPI_CONFIG_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - - -#define SPIM_ONLY ( defined(SPIM_PRESENT) && !defined(SPI_PRESENT)) -#define SPI_SPIM_PRESENT ( defined(SPIM_PRESENT) && defined(SPI_PRESENT)) -#define SPI_ONLY (!defined(SPIM_PRESENT) && defined(SPI_PRESENT)) - -#define SPI0_WITH_DMA (defined(SPI0_USE_EASY_DMA) && SPI0_USE_EASY_DMA && SPI0_ENABLED) -#define SPI1_WITH_DMA (defined(SPI1_USE_EASY_DMA) && SPI1_USE_EASY_DMA && SPI1_ENABLED) -#define SPI2_WITH_DMA (defined(SPI2_USE_EASY_DMA) && SPI2_USE_EASY_DMA && SPI2_ENABLED) - -#define SPI0_WITHOUT_DMA (defined(SPI0_USE_EASY_DMA) && !SPI0_USE_EASY_DMA && SPI0_ENABLED) -#define SPI1_WITHOUT_DMA (defined(SPI1_USE_EASY_DMA) && !SPI1_USE_EASY_DMA && SPI1_ENABLED) -#define SPI2_WITHOUT_DMA (defined(SPI2_USE_EASY_DMA) && !SPI2_USE_EASY_DMA && SPI2_ENABLED) - -// suppress: non-standard use of 'defined' preprocessor operator -/*lint -save -e491*/ -#if (SPI_ONLY && ENABLED_SPI_COUNT) || ((SPI_SPIM_PRESENT) && \ - (SPI0_WITHOUT_DMA || SPI1_WITHOUT_DMA || SPI2_WITHOUT_DMA)) - #define SPI_IN_USE 1 -#endif - -#if (SPIM_ONLY && ENABLED_SPI_COUNT) || ((SPI_SPIM_PRESENT) && \ - (SPI0_WITH_DMA || SPI1_WITH_DMA || SPI2_WITH_DMA)) - #define SPIM_IN_USE 1 -#endif - - -#if defined(SPIM_IN_USE) && defined(SPI_IN_USE) - // SPIM and SPI combined - #define CODE_FOR_SPIM(code) if (p_instance->use_easy_dma) { code } - #define CODE_FOR_SPI(code) else { code } -#elif defined(SPIM_IN_USE) && !defined(SPI_IN_USE) - // SPIM only - #define CODE_FOR_SPIM(code) { code } - #define CODE_FOR_SPI(code) -#elif !defined(SPIM_IN_USE) && defined(SPI_IN_USE) - // SPI only - #define CODE_FOR_SPIM(code) - #define CODE_FOR_SPI(code) { code } -#else - #error "Wrong configuration." -#endif - -#ifdef SPIM_IN_USE -#define END_INT_MASK NRF_SPIM_INT_END_MASK -#endif - -// Control block - driver instance local data. -typedef struct -{ - nrf_drv_spi_evt_handler_t handler; - void * p_context; - nrf_drv_spi_evt_t evt; // Keep the struct that is ready for event handler. Less memcpy. - nrf_drv_state_t state; - volatile bool transfer_in_progress; - - // [no need for 'volatile' attribute for the following members, as they - // are not concurrently used in IRQ handlers and main line code] - uint8_t ss_pin; - uint8_t orc; - uint8_t bytes_transferred; - -#if NRF_MODULE_ENABLED(SPIM_NRF52_ANOMALY_109_WORKAROUND) - uint8_t tx_length; - uint8_t rx_length; -#endif - - bool tx_done : 1; - bool rx_done : 1; - bool abort : 1; -} spi_control_block_t; -static spi_control_block_t m_cb[ENABLED_SPI_COUNT]; - -#if NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - #define IRQ_HANDLER_NAME(n) irq_handler_for_instance_##n - #define IRQ_HANDLER(n) static void IRQ_HANDLER_NAME(n)(void) - - #if NRF_MODULE_ENABLED(SPI0) - IRQ_HANDLER(0); - #endif - #if NRF_MODULE_ENABLED(SPI1) - IRQ_HANDLER(1); - #endif - #if NRF_MODULE_ENABLED(SPI2) - IRQ_HANDLER(2); - #endif - static nrf_drv_irq_handler_t const m_irq_handlers[ENABLED_SPI_COUNT] = { - #if NRF_MODULE_ENABLED(SPI0) - IRQ_HANDLER_NAME(0), - #endif - #if NRF_MODULE_ENABLED(SPI1) - IRQ_HANDLER_NAME(1), - #endif - #if NRF_MODULE_ENABLED(SPI2) - IRQ_HANDLER_NAME(2), - #endif - }; -#else - #define IRQ_HANDLER(n) void SPI##n##_IRQ_HANDLER(void) -#endif // NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - -ret_code_t nrf_drv_spi_init(nrf_drv_spi_t const * const p_instance, - nrf_drv_spi_config_t const * p_config, - nrf_drv_spi_evt_handler_t handler, - void * p_context) -{ - ASSERT(p_config); - spi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - ret_code_t err_code; - - if (p_cb->state != NRF_DRV_STATE_UNINITIALIZED) - { - err_code = NRF_ERROR_INVALID_STATE; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - -#if NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - if (nrf_drv_common_per_res_acquire(p_instance->p_registers, - m_irq_handlers[p_instance->drv_inst_idx]) != NRF_SUCCESS) - { - err_code = NRF_ERROR_BUSY; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } -#endif - - p_cb->handler = handler; - p_cb->p_context = p_context; - - uint32_t mosi_pin; - uint32_t miso_pin; - // Configure pins used by the peripheral: - // - SCK - output with initial value corresponding with the SPI mode used: - // 0 - for modes 0 and 1 (CPOL = 0), 1 - for modes 2 and 3 (CPOL = 1); - // according to the reference manual guidelines this pin and its input - // buffer must always be connected for the SPI to work. - if (p_config->mode <= NRF_DRV_SPI_MODE_1) - { - nrf_gpio_pin_clear(p_config->sck_pin); - } - else - { - nrf_gpio_pin_set(p_config->sck_pin); - } - nrf_gpio_cfg(p_config->sck_pin, - NRF_GPIO_PIN_DIR_OUTPUT, - NRF_GPIO_PIN_INPUT_CONNECT, - NRF_GPIO_PIN_NOPULL, - NRF_GPIO_PIN_S0S1, - NRF_GPIO_PIN_NOSENSE); - // - MOSI (optional) - output with initial value 0, - if (p_config->mosi_pin != NRF_DRV_SPI_PIN_NOT_USED) - { - mosi_pin = p_config->mosi_pin; - nrf_gpio_pin_clear(mosi_pin); - nrf_gpio_cfg_output(mosi_pin); - } - else - { - mosi_pin = NRF_SPI_PIN_NOT_CONNECTED; - } - // - MISO (optional) - input, - if (p_config->miso_pin != NRF_DRV_SPI_PIN_NOT_USED) - { - miso_pin = p_config->miso_pin; - nrf_gpio_cfg_input(miso_pin, (nrf_gpio_pin_pull_t)NRF_SPI_DRV_MISO_PULLUP_CFG); - } - else - { - miso_pin = NRF_SPI_PIN_NOT_CONNECTED; - } - // - Slave Select (optional) - output with initial value 1 (inactive). - if (p_config->ss_pin != NRF_DRV_SPI_PIN_NOT_USED) - { - nrf_gpio_pin_set(p_config->ss_pin); - nrf_gpio_cfg_output(p_config->ss_pin); - } - m_cb[p_instance->drv_inst_idx].ss_pin = p_config->ss_pin; - - CODE_FOR_SPIM - ( - NRF_SPIM_Type * p_spim = (NRF_SPIM_Type *)p_instance->p_registers; - nrf_spim_pins_set(p_spim, p_config->sck_pin, mosi_pin, miso_pin); - nrf_spim_frequency_set(p_spim, - (nrf_spim_frequency_t)p_config->frequency); - nrf_spim_configure(p_spim, - (nrf_spim_mode_t)p_config->mode, - (nrf_spim_bit_order_t)p_config->bit_order); - - nrf_spim_orc_set(p_spim, p_config->orc); - - if (p_cb->handler) - { - nrf_spim_int_enable(p_spim, END_INT_MASK); - } - - nrf_spim_enable(p_spim); - ) - CODE_FOR_SPI - ( - NRF_SPI_Type * p_spi = p_instance->p_registers; - nrf_spi_pins_set(p_spi, p_config->sck_pin, mosi_pin, miso_pin); - nrf_spi_frequency_set(p_spi, - (nrf_spi_frequency_t)p_config->frequency); - nrf_spi_configure(p_spi, - (nrf_spi_mode_t)p_config->mode, - (nrf_spi_bit_order_t)p_config->bit_order); - - m_cb[p_instance->drv_inst_idx].orc = p_config->orc; - - if (p_cb->handler) - { - nrf_spi_int_enable(p_spi, NRF_SPI_INT_READY_MASK); - } - - nrf_spi_enable(p_spi); - ) - - if (p_cb->handler) - { - nrf_drv_common_irq_enable(p_instance->irq, p_config->irq_priority); - } - - p_cb->transfer_in_progress = false; - p_cb->state = NRF_DRV_STATE_INITIALIZED; - - NRF_LOG_INFO("Init"); - - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - -void nrf_drv_spi_uninit(nrf_drv_spi_t const * const p_instance) -{ - spi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - ASSERT(p_cb->state != NRF_DRV_STATE_UNINITIALIZED); - - if (p_cb->handler) - { - nrf_drv_common_irq_disable(p_instance->irq); - } - - #define DISABLE_ALL 0xFFFFFFFF - - CODE_FOR_SPIM - ( - NRF_SPIM_Type * p_spim = (NRF_SPIM_Type *)p_instance->p_registers; - if (p_cb->handler) - { - nrf_spim_int_disable(p_spim, DISABLE_ALL); - if (p_cb->transfer_in_progress) - { - // Ensure that SPI is not performing any transfer. - nrf_spim_task_trigger(p_spim, NRF_SPIM_TASK_STOP); - while (!nrf_spim_event_check(p_spim, NRF_SPIM_EVENT_STOPPED)) {} - p_cb->transfer_in_progress = false; - } - } - nrf_spim_event_clear(p_spim, NRF_SPIM_EVENT_END); - nrf_spim_disable(p_spim); - ) - CODE_FOR_SPI - ( - NRF_SPI_Type * p_spi = p_instance->p_registers; - if (p_cb->handler) - { - nrf_spi_int_disable(p_spi, DISABLE_ALL); - } - nrf_spi_disable(p_spi); - ) - #undef DISABLE_ALL - -#if NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - nrf_drv_common_per_res_release(p_instance->p_registers); -#endif - - p_cb->state = NRF_DRV_STATE_UNINITIALIZED; -} - -ret_code_t nrf_drv_spi_transfer(nrf_drv_spi_t const * const p_instance, - uint8_t const * p_tx_buffer, - uint8_t tx_buffer_length, - uint8_t * p_rx_buffer, - uint8_t rx_buffer_length) -{ - nrf_drv_spi_xfer_desc_t xfer_desc; - xfer_desc.p_tx_buffer = p_tx_buffer; - xfer_desc.p_rx_buffer = p_rx_buffer; - xfer_desc.tx_length = tx_buffer_length; - xfer_desc.rx_length = rx_buffer_length; - - NRF_LOG_INFO("Transfer tx_len:%d, rx_len:%d.", tx_buffer_length, rx_buffer_length); - NRF_LOG_DEBUG("Tx data:"); - NRF_LOG_HEXDUMP_DEBUG((uint8_t *)p_tx_buffer, tx_buffer_length * sizeof(p_tx_buffer[0])); - return nrf_drv_spi_xfer(p_instance, &xfer_desc, 0); -} - -static void finish_transfer(spi_control_block_t * p_cb) -{ - // If Slave Select signal is used, this is the time to deactivate it. - if (p_cb->ss_pin != NRF_DRV_SPI_PIN_NOT_USED) - { - nrf_gpio_pin_set(p_cb->ss_pin); - } - - // By clearing this flag before calling the handler we allow subsequent - // transfers to be started directly from the handler function. - p_cb->transfer_in_progress = false; - p_cb->evt.type = NRF_DRV_SPI_EVENT_DONE; - NRF_LOG_INFO("Transfer completed rx_len:%d.", p_cb->evt.data.done.rx_length); - NRF_LOG_DEBUG("Rx data:"); - NRF_LOG_HEXDUMP_DEBUG((uint8_t *)p_cb->evt.data.done.p_rx_buffer, - p_cb->evt.data.done.rx_length * - sizeof(p_cb->evt.data.done.p_rx_buffer[0])); - p_cb->handler(&p_cb->evt, p_cb->p_context); -} - -#ifdef SPI_IN_USE -// This function is called from IRQ handler or, in blocking mode, directly -// from the 'nrf_drv_spi_transfer' function. -// It returns true as long as the transfer should be continued, otherwise (when -// there is nothing more to send/receive) it returns false. -static bool transfer_byte(NRF_SPI_Type * p_spi, spi_control_block_t * p_cb) -{ - // Read the data byte received in this transfer and store it in RX buffer, - // if needed. - volatile uint8_t rx_data = nrf_spi_rxd_get(p_spi); - if (p_cb->bytes_transferred < p_cb->evt.data.done.rx_length) - { - p_cb->evt.data.done.p_rx_buffer[p_cb->bytes_transferred] = rx_data; - } - - ++p_cb->bytes_transferred; - - // Check if there are more bytes to send or receive and write proper data - // byte (next one from TX buffer or over-run character) to the TXD register - // when needed. - // NOTE - we've already used 'p_cb->bytes_transferred + 1' bytes from our - // buffers, because we take advantage of double buffering of TXD - // register (so in effect one byte is still being transmitted now); - // see how the transfer is started in the 'nrf_drv_spi_transfer' - // function. - uint16_t bytes_used = p_cb->bytes_transferred + 1; - - if (p_cb->abort) - { - if (bytes_used < p_cb->evt.data.done.tx_length) - { - p_cb->evt.data.done.tx_length = bytes_used; - } - if (bytes_used < p_cb->evt.data.done.rx_length) - { - p_cb->evt.data.done.rx_length = bytes_used; - } - } - - if (bytes_used < p_cb->evt.data.done.tx_length) - { - nrf_spi_txd_set(p_spi, p_cb->evt.data.done.p_tx_buffer[bytes_used]); - return true; - } - else if (bytes_used < p_cb->evt.data.done.rx_length) - { - nrf_spi_txd_set(p_spi, p_cb->orc); - return true; - } - - return (p_cb->bytes_transferred < p_cb->evt.data.done.tx_length || - p_cb->bytes_transferred < p_cb->evt.data.done.rx_length); -} - -static void spi_xfer(NRF_SPI_Type * p_spi, - spi_control_block_t * p_cb, - nrf_drv_spi_xfer_desc_t const * p_xfer_desc) -{ - p_cb->bytes_transferred = 0; - nrf_spi_int_disable(p_spi, NRF_SPI_INT_READY_MASK); - - nrf_spi_event_clear(p_spi, NRF_SPI_EVENT_READY); - - /** - * 4/23/2018 Arm Mbed modification to Nordic SDK 14.2. - * Interrupts must be enabled before transmitting the first byte in asynchronous mode. - */ - if (p_cb->handler) - { - nrf_spi_int_enable(p_spi, NRF_SPI_INT_READY_MASK); - } - - // Start the transfer by writing some byte to the TXD register; - // if TX buffer is not empty, take the first byte from this buffer, - // otherwise - use over-run character. - nrf_spi_txd_set(p_spi, - (p_xfer_desc->tx_length > 0 ? p_xfer_desc->p_tx_buffer[0] : p_cb->orc)); - - // TXD register is double buffered, so next byte to be transmitted can - // be written immediately, if needed, i.e. if TX or RX transfer is to - // be more that 1 byte long. Again - if there is something more in TX - // buffer send it, otherwise use over-run character. - if (p_xfer_desc->tx_length > 1) - { - nrf_spi_txd_set(p_spi, p_xfer_desc->p_tx_buffer[1]); - } - else if (p_xfer_desc->rx_length > 1) - { - nrf_spi_txd_set(p_spi, p_cb->orc); - } - - // For blocking mode (user handler not provided) wait here for READY - // events (indicating that the byte from TXD register was transmitted - // and a new incoming byte was moved to the RXD register) and continue - // transaction until all requested bytes are transferred. - // In non-blocking mode - IRQ service routine will do this stuff. - /** - * 4/23/2018 Arm Mbed modification to Nordic SDK 14.2. - * Interrupts must be enabled before transmitting the first byte in asynchronous mode. - */ - if (p_cb->handler == NULL) - { - do { - while (!nrf_spi_event_check(p_spi, NRF_SPI_EVENT_READY)) {} - nrf_spi_event_clear(p_spi, NRF_SPI_EVENT_READY); - NRF_LOG_DEBUG("SPI: Event: NRF_SPI_EVENT_READY."); - } while (transfer_byte(p_spi, p_cb)); - if (p_cb->ss_pin != NRF_DRV_SPI_PIN_NOT_USED) - { - nrf_gpio_pin_set(p_cb->ss_pin); - } - } -} -#endif // SPI_IN_USE - -#ifdef SPIM_IN_USE -__STATIC_INLINE void spim_int_enable(NRF_SPIM_Type * p_spim, bool enable) -{ - if (!enable) - { - nrf_spim_int_disable(p_spim, END_INT_MASK); - } - else - { - nrf_spim_int_enable(p_spim, END_INT_MASK); - } -} - -__STATIC_INLINE void spim_list_enable_handle(NRF_SPIM_Type * p_spim, uint32_t flags) -{ - if (NRF_DRV_SPI_FLAG_TX_POSTINC & flags) - { - nrf_spim_tx_list_enable(p_spim); - } - else - { - nrf_spim_tx_list_disable(p_spim); - } - - if (NRF_DRV_SPI_FLAG_RX_POSTINC & flags) - { - nrf_spim_rx_list_enable(p_spim); - } - else - { - nrf_spim_rx_list_disable(p_spim); - } -} - -static ret_code_t spim_xfer(NRF_SPIM_Type * p_spim, - spi_control_block_t * p_cb, - nrf_drv_spi_xfer_desc_t const * p_xfer_desc, - uint32_t flags) -{ - ret_code_t err_code; - // EasyDMA requires that transfer buffers are placed in Data RAM region; - // signal error if they are not. - if ((p_xfer_desc->p_tx_buffer != NULL && !nrf_drv_is_in_RAM(p_xfer_desc->p_tx_buffer)) || - (p_xfer_desc->p_rx_buffer != NULL && !nrf_drv_is_in_RAM(p_xfer_desc->p_rx_buffer))) - { - p_cb->transfer_in_progress = false; - err_code = NRF_ERROR_INVALID_ADDR; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - -#if NRF_MODULE_ENABLED(SPIM_NRF52_ANOMALY_109_WORKAROUND) - p_cb->tx_length = 0; - p_cb->rx_length = 0; -#endif - - nrf_spim_tx_buffer_set(p_spim, p_xfer_desc->p_tx_buffer, p_xfer_desc->tx_length); - nrf_spim_rx_buffer_set(p_spim, p_xfer_desc->p_rx_buffer, p_xfer_desc->rx_length); - - nrf_spim_event_clear(p_spim, NRF_SPIM_EVENT_END); - - spim_list_enable_handle(p_spim, flags); - - if (!(flags & NRF_DRV_SPI_FLAG_HOLD_XFER)) - { - nrf_spim_task_trigger(p_spim, NRF_SPIM_TASK_START); - } -#if NRF_MODULE_ENABLED(SPIM_NRF52_ANOMALY_109_WORKAROUND) - if (flags & NRF_DRV_SPI_FLAG_HOLD_XFER) - { - nrf_spim_event_clear(p_spim, NRF_SPIM_EVENT_STARTED); - p_cb->tx_length = p_xfer_desc->tx_length; - p_cb->rx_length = p_xfer_desc->rx_length; - nrf_spim_tx_buffer_set(p_spim, p_xfer_desc->p_tx_buffer, 0); - nrf_spim_rx_buffer_set(p_spim, p_xfer_desc->p_rx_buffer, 0); - nrf_spim_int_enable(p_spim, NRF_SPIM_INT_STARTED_MASK); - } -#endif - - if (!p_cb->handler) - { - while (!nrf_spim_event_check(p_spim, NRF_SPIM_EVENT_END)){} - if (p_cb->ss_pin != NRF_DRV_SPI_PIN_NOT_USED) - { - nrf_gpio_pin_set(p_cb->ss_pin); - } - } - else - { - spim_int_enable(p_spim, !(flags & NRF_DRV_SPI_FLAG_NO_XFER_EVT_HANDLER)); - } - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} -#endif - -ret_code_t nrf_drv_spi_xfer(nrf_drv_spi_t const * const p_instance, - nrf_drv_spi_xfer_desc_t const * p_xfer_desc, - uint32_t flags) -{ - spi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - ASSERT(p_cb->state != NRF_DRV_STATE_UNINITIALIZED); - ASSERT(p_xfer_desc->p_tx_buffer != NULL || p_xfer_desc->tx_length == 0); - ASSERT(p_xfer_desc->p_rx_buffer != NULL || p_xfer_desc->rx_length == 0); - - ret_code_t err_code = NRF_SUCCESS; - - if (p_cb->transfer_in_progress) - { - err_code = NRF_ERROR_BUSY; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - else - { - if (p_cb->handler && !(flags & (NRF_DRV_SPI_FLAG_REPEATED_XFER | - NRF_DRV_SPI_FLAG_NO_XFER_EVT_HANDLER))) - { - p_cb->transfer_in_progress = true; - } - } - - p_cb->evt.data.done = *p_xfer_desc; - p_cb->tx_done = false; - p_cb->rx_done = false; - p_cb->abort = false; - - if (p_cb->ss_pin != NRF_DRV_SPI_PIN_NOT_USED) - { - nrf_gpio_pin_clear(p_cb->ss_pin); - } - CODE_FOR_SPIM - ( - return spim_xfer(p_instance->p_registers, p_cb, p_xfer_desc, flags); - ) - CODE_FOR_SPI - ( - if (flags) - { - p_cb->transfer_in_progress = false; - err_code = NRF_ERROR_NOT_SUPPORTED; - } - else - { - spi_xfer(p_instance->p_registers, p_cb, p_xfer_desc); - } - NRF_LOG_INFO("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - ) -} - - -void nrf_drv_spi_abort(nrf_drv_spi_t const * p_instance) -{ - spi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - ASSERT(p_cb->state != NRF_DRV_STATE_UNINITIALIZED); - - CODE_FOR_SPIM - ( - nrf_spim_task_trigger(p_instance->p_registers, NRF_SPIM_TASK_STOP); - while (!nrf_spim_event_check(p_instance->p_registers, NRF_SPIM_EVENT_STOPPED)) {} - p_cb->transfer_in_progress = false; - ) - CODE_FOR_SPI - ( - p_cb->abort = true; - ) -} - - -#ifdef SPIM_IN_USE -static void irq_handler_spim(NRF_SPIM_Type * p_spim, spi_control_block_t * p_cb) -{ - -#if NRF_MODULE_ENABLED(SPIM_NRF52_ANOMALY_109_WORKAROUND) - if ((nrf_spim_int_enable_check(p_spim, NRF_SPIM_INT_STARTED_MASK)) && - (nrf_spim_event_check(p_spim, NRF_SPIM_EVENT_STARTED)) ) - { - /* Handle first, zero-length, auxiliary transmission. */ - nrf_spim_event_clear(p_spim, NRF_SPIM_EVENT_STARTED); - nrf_spim_event_clear(p_spim, NRF_SPIM_EVENT_END); - - ASSERT(p_spim->TXD.MAXCNT == 0); - p_spim->TXD.MAXCNT = p_cb->tx_length; - - ASSERT(p_spim->RXD.MAXCNT == 0); - p_spim->RXD.MAXCNT = p_cb->rx_length; - - /* Disable STARTED interrupt, used only in auxiliary transmission. */ - nrf_spim_int_disable(p_spim, NRF_SPIM_INT_STARTED_MASK); - - /* Start the actual, glitch-free transmission. */ - nrf_spim_task_trigger(p_spim, NRF_SPIM_TASK_START); - return; - } -#endif - - if (nrf_spim_event_check(p_spim, NRF_SPIM_EVENT_END)) - { - nrf_spim_event_clear(p_spim, NRF_SPIM_EVENT_END); - ASSERT(p_cb->handler); - NRF_LOG_DEBUG("SPIM: Event: NRF_SPIM_EVENT_END."); - finish_transfer(p_cb); - } -} - -uint32_t nrf_drv_spi_start_task_get(nrf_drv_spi_t const * p_instance) -{ - NRF_SPIM_Type * p_spim = (NRF_SPIM_Type *)p_instance->p_registers; - return nrf_spim_task_address_get(p_spim, NRF_SPIM_TASK_START); -} - -uint32_t nrf_drv_spi_end_event_get(nrf_drv_spi_t const * p_instance) -{ - NRF_SPIM_Type * p_spim = (NRF_SPIM_Type *)p_instance->p_registers; - return nrf_spim_event_address_get(p_spim, NRF_SPIM_EVENT_END); -} -#endif // SPIM_IN_USE - -#ifdef SPI_IN_USE -static void irq_handler_spi(NRF_SPI_Type * p_spi, spi_control_block_t * p_cb) -{ - ASSERT(p_cb->handler); - - nrf_spi_event_clear(p_spi, NRF_SPI_EVENT_READY); - NRF_LOG_DEBUG("SPI: Event: NRF_SPI_EVENT_READY."); - - if (!transfer_byte(p_spi, p_cb)) - { - finish_transfer(p_cb); - } -} -#endif // SPI_IN_USE - -#if NRF_MODULE_ENABLED(SPI0) -IRQ_HANDLER(0) -{ - spi_control_block_t * p_cb = &m_cb[SPI0_INSTANCE_INDEX]; - #if (SPI0_WITH_DMA || SPIM_ONLY) - irq_handler_spim(NRF_SPIM0, p_cb); - #else - irq_handler_spi(NRF_SPI0, p_cb); - #endif -} -#endif // NRF_MODULE_ENABLED(SPI0) - -#if NRF_MODULE_ENABLED(SPI1) -IRQ_HANDLER(1) -{ - spi_control_block_t * p_cb = &m_cb[SPI1_INSTANCE_INDEX]; - #if (SPI1_WITH_DMA || SPIM_ONLY) - irq_handler_spim(NRF_SPIM1, p_cb); - #else - irq_handler_spi(NRF_SPI1, p_cb); - #endif -} -#endif // NRF_MODULE_ENABLED(SPI1) - -#if NRF_MODULE_ENABLED(SPI2) -IRQ_HANDLER(2) -{ - spi_control_block_t * p_cb = &m_cb[SPI2_INSTANCE_INDEX]; - #if (SPI2_WITH_DMA || SPIM_ONLY) - irq_handler_spim(NRF_SPIM2, p_cb); - #else - irq_handler_spi(NRF_SPI2, p_cb); - #endif -} -/*lint -restore*/ -#endif // NRF_MODULE_ENABLED(SPI2) -#endif // ENABLED_SPI_COUNT -#endif // NRF_MODULE_ENABLED(SPI) - diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/spi_master/nrf_drv_spi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/spi_master/nrf_drv_spi.h deleted file mode 100644 index 01eb9198be1..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/spi_master/nrf_drv_spi.h +++ /dev/null @@ -1,468 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/**@file - * @addtogroup nrf_spi Serial peripheral interface (SPI/SPIM) - * @ingroup nrf_drivers - * @brief Serial peripheral interface (SPI/SPIM) APIs. - * - */ - -#ifndef NRF_DRV_SPI_H__ -#define NRF_DRV_SPI_H__ - -#include "nordic_common.h" -#include "sdk_config.h" -#include "nrf_peripherals.h" -#include "sdk_errors.h" - -#ifdef SPI0_ENABLED -#define SPI0_INCR SPI0_ENABLED -#else -#define SPI0_INCR 0 -#endif - -#ifdef SPI1_ENABLED -#define SPI1_INCR SPI1_ENABLED -#else -#define SPI1_INCR 0 -#endif - -#ifdef SPI2_ENABLED -#define SPI2_INCR SPI2_ENABLED -#else -#define SPI2_INCR 0 -#endif - -#ifdef SPI3_ENABLED -#define SPI3_INCR SPI3_ENABLED -#else -#define SPI3_INCR 0 -#endif - -#define ENABLED_SPI_COUNT (SPI0_INCR + SPI1_INCR + SPI2_INCR + SPI3_INCR) - -#ifdef SPI_PRESENT -#include "nrf_spi.h" -#endif - -#ifdef SPIM_PRESENT -#include "nrf_spim.h" -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -#if defined(SPIM_PRESENT) && defined(SPI_PRESENT) - #define NRF_DRV_SPI_PERIPHERAL(id) \ - (CONCAT_3(SPI, id, _USE_EASY_DMA) == 1 ? \ - (void *)CONCAT_2(NRF_SPIM, id) \ - : (void *)CONCAT_2(NRF_SPI, id)) - #define SPI2_IRQ SPIM2_SPIS2_SPI2_IRQn - #define SPI2_IRQ_HANDLER SPIM2_SPIS2_SPI2_IRQHandler -#elif defined (SPI_PRESENT) - #define NRF_DRV_SPI_PERIPHERAL(id) (void *)CONCAT_2(NRF_SPI, id) -#elif defined (SPIM_PRESENT) - #define NRF_DRV_SPI_PERIPHERAL(id) (void *)CONCAT_2(NRF_SPIM, id) -#endif - -#ifndef SPI_PRESENT -typedef nrf_spim_frequency_t nrf_spi_frequency_t; -typedef nrf_spim_mode_t nrf_spi_mode_t; -typedef nrf_spim_bit_order_t nrf_spi_bit_order_t; -#define NRF_SPI_PIN_NOT_CONNECTED 0xFFFFFFFF -#endif - -#ifdef NRF52810_XXAA -#define SPI0_IRQ SPIM0_SPIS0_IRQn -#define SPI0_IRQ_HANDLER SPIM0_SPIS0_IRQHandler -#else -#define SPI0_IRQ SPI0_TWI0_IRQn -#define SPI0_IRQ_HANDLER SPI0_TWI0_IRQHandler -#define SPI1_IRQ SPI1_TWI1_IRQn -#define SPI1_IRQ_HANDLER SPI1_TWI1_IRQHandler -#endif -/** - * @defgroup nrf_drv_spi SPI master driver - * @{ - * @ingroup nrf_spi - * - * @brief Multi-instance SPI master driver. - */ - -/** - * @brief SPI master driver instance data structure. - */ -typedef struct -{ - void * p_registers; ///< Pointer to the structure with SPI/SPIM peripheral instance registers. - IRQn_Type irq; ///< SPI/SPIM peripheral instance IRQ number. - uint8_t drv_inst_idx; ///< Driver instance index. - bool use_easy_dma; ///< True if the peripheral with EasyDMA (SPIM) shall be used. -} nrf_drv_spi_t; - -#define SPI0_INSTANCE_INDEX 0 -#define SPI1_INSTANCE_INDEX SPI0_INSTANCE_INDEX+SPI0_ENABLED -#define SPI2_INSTANCE_INDEX SPI1_INSTANCE_INDEX+SPI1_ENABLED - -#if defined(SPIM_PRESENT) && defined(SPI_PRESENT) -#define SPI_N_USE_EASY_DMA(_id) CONCAT_3(SPI, _id, _USE_EASY_DMA) -#elif defined(SPIM_PRESENT) && !defined(SPI_PRESENT) -#define SPI_N_USE_EASY_DMA(_id) true -#else -#define SPI_N_USE_EASY_DMA(_id) false -#endif - -/** - * @brief Macro for creating an SPI master driver instance. - */ -#define NRF_DRV_SPI_INSTANCE(id) \ -{ \ - .p_registers = NRF_DRV_SPI_PERIPHERAL(id), \ - .irq = CONCAT_3(SPI, id, _IRQ), \ - .drv_inst_idx = CONCAT_3(SPI, id, _INSTANCE_INDEX), \ - .use_easy_dma = SPI_N_USE_EASY_DMA(id) \ -} -/** - * @brief This value can be provided instead of a pin number for signals MOSI, - * MISO, and Slave Select to specify that the given signal is not used and - * therefore does not need to be connected to a pin. - */ -#define NRF_DRV_SPI_PIN_NOT_USED 0xFF - -/** - * @brief SPI data rates. - */ -typedef enum -{ - NRF_DRV_SPI_FREQ_125K = NRF_SPI_FREQ_125K, ///< 125 kbps. - NRF_DRV_SPI_FREQ_250K = NRF_SPI_FREQ_250K, ///< 250 kbps. - NRF_DRV_SPI_FREQ_500K = NRF_SPI_FREQ_500K, ///< 500 kbps. - NRF_DRV_SPI_FREQ_1M = NRF_SPI_FREQ_1M, ///< 1 Mbps. - NRF_DRV_SPI_FREQ_2M = NRF_SPI_FREQ_2M, ///< 2 Mbps. - NRF_DRV_SPI_FREQ_4M = NRF_SPI_FREQ_4M, ///< 4 Mbps. - NRF_DRV_SPI_FREQ_8M = NRF_SPI_FREQ_8M ///< 8 Mbps. -} nrf_drv_spi_frequency_t; - -/** - * @brief SPI modes. - */ -typedef enum -{ - NRF_DRV_SPI_MODE_0 = NRF_SPI_MODE_0, ///< SCK active high, sample on leading edge of clock. - NRF_DRV_SPI_MODE_1 = NRF_SPI_MODE_1, ///< SCK active high, sample on trailing edge of clock. - NRF_DRV_SPI_MODE_2 = NRF_SPI_MODE_2, ///< SCK active low, sample on leading edge of clock. - NRF_DRV_SPI_MODE_3 = NRF_SPI_MODE_3 ///< SCK active low, sample on trailing edge of clock. -} nrf_drv_spi_mode_t; - -/** - * @brief SPI bit orders. - */ -typedef enum -{ - NRF_DRV_SPI_BIT_ORDER_MSB_FIRST = NRF_SPI_BIT_ORDER_MSB_FIRST, ///< Most significant bit shifted out first. - NRF_DRV_SPI_BIT_ORDER_LSB_FIRST = NRF_SPI_BIT_ORDER_LSB_FIRST ///< Least significant bit shifted out first. -} nrf_drv_spi_bit_order_t; - -/** - * @brief SPI master driver instance configuration structure. - */ -typedef struct -{ - uint8_t sck_pin; ///< SCK pin number. - uint8_t mosi_pin; ///< MOSI pin number (optional). - /**< Set to @ref NRF_DRV_SPI_PIN_NOT_USED - * if this signal is not needed. */ - uint8_t miso_pin; ///< MISO pin number (optional). - /**< Set to @ref NRF_DRV_SPI_PIN_NOT_USED - * if this signal is not needed. */ - uint8_t ss_pin; ///< Slave Select pin number (optional). - /**< Set to @ref NRF_DRV_SPI_PIN_NOT_USED - * if this signal is not needed. The driver - * supports only active low for this signal. - * If the signal should be active high, - * it must be controlled externally. */ - uint8_t irq_priority; ///< Interrupt priority. - uint8_t orc; ///< Over-run character. - /**< This character is used when all bytes from the TX buffer are sent, - but the transfer continues due to RX. */ - nrf_drv_spi_frequency_t frequency; ///< SPI frequency. - nrf_drv_spi_mode_t mode; ///< SPI mode. - nrf_drv_spi_bit_order_t bit_order; ///< SPI bit order. -} nrf_drv_spi_config_t; - -/** - * @brief SPI master instance default configuration. - */ -#define NRF_DRV_SPI_DEFAULT_CONFIG \ -{ \ - .sck_pin = NRF_DRV_SPI_PIN_NOT_USED, \ - .mosi_pin = NRF_DRV_SPI_PIN_NOT_USED, \ - .miso_pin = NRF_DRV_SPI_PIN_NOT_USED, \ - .ss_pin = NRF_DRV_SPI_PIN_NOT_USED, \ - .irq_priority = SPI_DEFAULT_CONFIG_IRQ_PRIORITY, \ - .orc = 0xFF, \ - .frequency = NRF_DRV_SPI_FREQ_4M, \ - .mode = NRF_DRV_SPI_MODE_0, \ - .bit_order = NRF_DRV_SPI_BIT_ORDER_MSB_FIRST, \ -} - -#define NRF_DRV_SPI_FLAG_TX_POSTINC (1UL << 0) /**< TX buffer address incremented after transfer. */ -#define NRF_DRV_SPI_FLAG_RX_POSTINC (1UL << 1) /**< RX buffer address incremented after transfer. */ -#define NRF_DRV_SPI_FLAG_NO_XFER_EVT_HANDLER (1UL << 2) /**< Interrupt after each transfer is suppressed, and the event handler is not called. */ -#define NRF_DRV_SPI_FLAG_HOLD_XFER (1UL << 3) /**< Set up the transfer but do not start it. */ -#define NRF_DRV_SPI_FLAG_REPEATED_XFER (1UL << 4) /**< Flag indicating that the transfer will be executed multiple times. */ - -/** - * @brief Single transfer descriptor structure. - */ -typedef struct -{ - uint8_t const * p_tx_buffer; ///< Pointer to TX buffer. - uint8_t tx_length; ///< TX buffer length. - uint8_t * p_rx_buffer; ///< Pointer to RX buffer. - uint8_t rx_length; ///< RX buffer length. -}nrf_drv_spi_xfer_desc_t; - -/** - * @brief Macro for setting up single transfer descriptor. - * - * This macro is for internal use only. - */ -#define NRF_DRV_SPI_SINGLE_XFER(p_tx, tx_len, p_rx, rx_len) \ - { \ - .p_tx_buffer = (uint8_t const *)(p_tx), \ - .tx_length = (tx_len), \ - .p_rx_buffer = (p_rx), \ - .rx_length = (rx_len), \ - } - -/** - * @brief Macro for setting duplex TX RX transfer. - */ -#define NRF_DRV_SPI_XFER_TRX(p_tx_buf, tx_length, p_rx_buf, rx_length) \ - NRF_DRV_SPI_SINGLE_XFER(p_tx_buf, tx_length, p_rx_buf, rx_length) - -/** - * @brief Macro for setting TX transfer. - */ -#define NRF_DRV_SPI_XFER_TX(p_buf, length) \ - NRF_DRV_SPI_SINGLE_XFER(p_buf, length, NULL, 0) - -/** - * @brief Macro for setting RX transfer. - */ -#define NRF_DRV_SPI_XFER_RX(p_buf, length) \ - NRF_DRV_SPI_SINGLE_XFER(NULL, 0, p_buf, length) - -/** - * @brief SPI master driver event types, passed to the handler routine provided - * during initialization. - */ -typedef enum -{ - NRF_DRV_SPI_EVENT_DONE, ///< Transfer done. -} nrf_drv_spi_evt_type_t; - -typedef struct -{ - nrf_drv_spi_evt_type_t type; ///< Event type. - union - { - nrf_drv_spi_xfer_desc_t done; ///< Event data for DONE event. - } data; -} nrf_drv_spi_evt_t; - -/** - * @brief SPI master driver event handler type. - */ -typedef void (* nrf_drv_spi_evt_handler_t)(nrf_drv_spi_evt_t const * p_event, - void * p_context); - -/** - * @brief Function for initializing the SPI master driver instance. - * - * This function configures and enables the specified peripheral. - * - * @note MISO pin has pull down enabled. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] p_config Pointer to the structure with the initial configuration. - * - * @param handler Event handler provided by the user. If NULL, transfers - * will be performed in blocking mode. - * @param p_context Context passed to event handler. - * - * @retval NRF_SUCCESS If initialization was successful. - * @retval NRF_ERROR_INVALID_STATE If the driver was already initialized. - * @retval NRF_ERROR_BUSY If some other peripheral with the same - * instance ID is already in use. This is - * possible only if PERIPHERAL_RESOURCE_SHARING_ENABLED - * is set to a value other than zero. - */ -ret_code_t nrf_drv_spi_init(nrf_drv_spi_t const * const p_instance, - nrf_drv_spi_config_t const * p_config, - nrf_drv_spi_evt_handler_t handler, - void * p_context); - -/** - * @brief Function for uninitializing the SPI master driver instance. - * - * @note Configuration of pins is kept. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -void nrf_drv_spi_uninit(nrf_drv_spi_t const * const p_instance); - -/** - * @brief Function for starting the SPI data transfer. - * - * If an event handler was provided in the @ref nrf_drv_spi_init call, this function - * returns immediately and the handler is called when the transfer is done. - * Otherwise, the transfer is performed in blocking mode, which means that this function - * returns when the transfer is finished. - * - * @note Peripherals using EasyDMA (for example, SPIM) require the transfer buffers - * to be placed in the Data RAM region. If they are not and an SPIM instance is - * used, this function will fail with the error code NRF_ERROR_INVALID_ADDR. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] p_tx_buffer Pointer to the transmit buffer. Can be NULL - * if there is nothing to send. - * @param tx_buffer_length Length of the transmit buffer. - * @param[in] p_rx_buffer Pointer to the receive buffer. Can be NULL - * if there is nothing to receive. - * @param rx_buffer_length Length of the receive buffer. - * - * @retval NRF_SUCCESS If the operation was successful. - * @retval NRF_ERROR_BUSY If a previously started transfer has not finished - * yet. - * @retval NRF_ERROR_INVALID_ADDR If the provided buffers are not placed in the Data - * RAM region. - */ -ret_code_t nrf_drv_spi_transfer(nrf_drv_spi_t const * const p_instance, - uint8_t const * p_tx_buffer, - uint8_t tx_buffer_length, - uint8_t * p_rx_buffer, - uint8_t rx_buffer_length); - -/** - * @brief Function for starting the SPI data transfer with additional option flags. - * - * Function enables customizing the transfer by using option flags. - * - * Additional options are provided using the flags parameter: - * - * - @ref NRF_DRV_SPI_FLAG_TX_POSTINC and @ref NRF_DRV_SPI_FLAG_RX_POSTINC: - * Post-incrementation of buffer addresses. Supported only by SPIM. - * - @ref NRF_DRV_SPI_FLAG_HOLD_XFER: Driver is not starting the transfer. Use this - * flag if the transfer is triggered externally by PPI. Supported only by SPIM. Use - * @ref nrf_drv_spi_start_task_get to get the address of the start task. - * - @ref NRF_DRV_SPI_FLAG_NO_XFER_EVT_HANDLER: No user event handler after transfer - * completion. This also means no interrupt at the end of the transfer. Supported only by SPIM. - * If @ref NRF_DRV_SPI_FLAG_NO_XFER_EVT_HANDLER is used, the driver does not set the instance into - * busy state, so you must ensure that the next transfers are set up when SPIM is not active. - * @ref nrf_drv_spi_end_event_get function can be used to detect end of transfer. Option can be used - * together with @ref NRF_DRV_SPI_FLAG_REPEATED_XFER to prepare a sequence of SPI transfers - * without interruptions. - * - @ref NRF_DRV_SPI_FLAG_REPEATED_XFER: Prepare for repeated transfers. You can set - * up a number of transfers that will be triggered externally (for example by PPI). An example is - * a TXRX transfer with the options @ref NRF_DRV_SPI_FLAG_RX_POSTINC, - * @ref NRF_DRV_SPI_FLAG_NO_XFER_EVT_HANDLER, and @ref NRF_DRV_SPI_FLAG_REPEATED_XFER. After the - * transfer is set up, a set of transfers can be triggered by PPI that will read, for example, - * the same register of an external component and put it into a RAM buffer without any interrupts. - * @ref nrf_drv_spi_end_event_get can be used to get the address of the END event, which can be - * used to count the number of transfers. If @ref NRF_DRV_SPI_FLAG_REPEATED_XFER is used, - * the driver does not set the instance into busy state, so you must ensure that the next - * transfers are set up when SPIM is not active. Supported only by SPIM. - * @note Function is intended to be used only in non-blocking mode. - * - * @param p_instance Pointer to the driver instance structure. - * @param p_xfer_desc Pointer to the transfer descriptor. - * @param flags Transfer options (0 for default settings). - * - * @retval NRF_SUCCESS If the procedure was successful. - * @retval NRF_ERROR_BUSY If the driver is not ready for a new transfer. - * @retval NRF_ERROR_NOT_SUPPORTED If the provided parameters are not supported. - * @retval NRF_ERROR_INVALID_ADDR If the provided buffers are not placed in the Data - * RAM region. - */ -ret_code_t nrf_drv_spi_xfer(nrf_drv_spi_t const * const p_instance, - nrf_drv_spi_xfer_desc_t const * p_xfer_desc, - uint32_t flags); - -/** - * @brief Function for returning the address of a SPIM start task. - * - * This function should be used if @ref nrf_drv_spi_xfer was called with the flag @ref NRF_DRV_SPI_FLAG_HOLD_XFER. - * In that case, the transfer is not started by the driver, but it must be started externally by PPI. - * - * @param[in] p_instance Pointer to the driver instance structure. - * - * @return Start task address. - */ -uint32_t nrf_drv_spi_start_task_get(nrf_drv_spi_t const * p_instance); - -/** - * @brief Function for returning the address of a END SPIM event. - * - * A END event can be used to detect the end of a transfer if the @ref NRF_DRV_SPI_FLAG_NO_XFER_EVT_HANDLER - * option is used. - * - * @param[in] p_instance Pointer to the driver instance structure. - * - * @return END event address. - */ -uint32_t nrf_drv_spi_end_event_get(nrf_drv_spi_t const * p_instance); - -/** - * @brief Function for aborting ongoing transfer. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -void nrf_drv_spi_abort(nrf_drv_spi_t const * p_instance); - -#ifdef __cplusplus -} -#endif - -#endif // NRF_DRV_SPI_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/spi_slave/nrf_drv_spis.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/spi_slave/nrf_drv_spis.c deleted file mode 100644 index 9470baf4821..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/spi_slave/nrf_drv_spis.c +++ /dev/null @@ -1,493 +0,0 @@ -/** - * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(SPIS) -#include "nrf_drv_spis.h" -#if ENABLED_SPIS_COUNT -#include -#include -#include "nrf.h" -#include "nrf_gpio.h" -#include "app_error.h" -#include "app_util_platform.h" -#include "nrf_drv_common.h" -#include "nrf_assert.h" - -#define NRF_LOG_MODULE_NAME spis - -#if SPIS_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL SPIS_CONFIG_LOG_LEVEL -#define NRF_LOG_INFO_COLOR SPIS_CONFIG_INFO_COLOR -#define NRF_LOG_DEBUG_COLOR SPIS_CONFIG_DEBUG_COLOR -#define EVT_TO_STR(event) \ - (event == NRF_SPIS_EVENT_ACQUIRED ? "NRF_SPIS_EVENT_ACQUIRED" : \ - (event == NRF_SPIS_EVENT_END ? "NRF_SPIS_EVENT_END" : \ - "UNKNOWN ERROR")) - -#else //SPIS_CONFIG_LOG_ENABLED -#define EVT_TO_STR(event) "" -#define NRF_LOG_LEVEL 0 -#endif //SPIS_CONFIG_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - -#if NRF_MODULE_ENABLED(SPIS_NRF52_ANOMALY_109_WORKAROUND) -#include "nrf_drv_gpiote.h" -#define USE_DMA_ISSUE_WORKAROUND -// This handler is called by the GPIOTE driver when a falling edge is detected -// on the CSN line. There is no need to do anything here. The handling of the -// interrupt itself provides a protection for DMA transfers. -static void csn_event_handler(nrf_drv_gpiote_pin_t pin, - nrf_gpiote_polarity_t action) -{ -} -#endif - - -/**@brief States of the SPI transaction state machine. */ -typedef enum -{ - SPIS_STATE_INIT, /**< Initialization state. In this state the module waits for a call to @ref spi_slave_buffers_set. */ - SPIS_BUFFER_RESOURCE_REQUESTED, /**< State where the configuration of the memory buffers, which are to be used in SPI transaction, has started. */ - SPIS_BUFFER_RESOURCE_CONFIGURED, /**< State where the configuration of the memory buffers, which are to be used in SPI transaction, has completed. */ - SPIS_XFER_COMPLETED /**< State where SPI transaction has been completed. */ -} nrf_drv_spis_state_t; - - -#if NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - #define IRQ_HANDLER_NAME(n) irq_handler_for_instance_##n - #define IRQ_HANDLER(n) static void IRQ_HANDLER_NAME(n)(void) - - #if NRF_MODULE_ENABLED(SPIS0) - IRQ_HANDLER(0); - #endif - #if NRF_MODULE_ENABLED(SPIS1) - IRQ_HANDLER(1); - #endif - #if NRF_MODULE_ENABLED(SPIS2) - IRQ_HANDLER(2); - #endif - static nrf_drv_irq_handler_t const m_irq_handlers[ENABLED_SPIS_COUNT] = { - #if NRF_MODULE_ENABLED(SPIS0) - IRQ_HANDLER_NAME(0), - #endif - #if NRF_MODULE_ENABLED(SPIS1) - IRQ_HANDLER_NAME(1), - #endif - #if NRF_MODULE_ENABLED(SPIS2) - IRQ_HANDLER_NAME(2), - #endif - }; -#else - #define IRQ_HANDLER(n) void SPIS##n##_IRQ_HANDLER(void) -#endif // PERIPHERAL_RESOURCE_SHARING_ENABLED - -#define SPIS_IRQHANDLER_TEMPLATE(NUM) \ - IRQ_HANDLER(NUM) \ - { \ - spis_irq_handler(NRF_SPIS##NUM, &m_cb[SPIS##NUM##_INSTANCE_INDEX]); \ - } - - -/**@brief SPIS control block - driver instance local data. */ -typedef struct -{ - volatile uint32_t tx_buffer_size; //!< SPI slave TX buffer size in bytes. - volatile uint32_t rx_buffer_size; //!< SPI slave RX buffer size in bytes. - nrf_drv_spis_event_handler_t handler; //!< SPI event handler. - volatile const uint8_t * tx_buffer; //!< SPI slave TX buffer. - volatile uint8_t * rx_buffer; //!< SPI slave RX buffer. - nrf_drv_state_t state; //!< driver initialization state. - volatile nrf_drv_spis_state_t spi_state; //!< SPI slave state. -} spis_cb_t; - -static spis_cb_t m_cb[ENABLED_SPIS_COUNT]; - -ret_code_t nrf_drv_spis_init(nrf_drv_spis_t const * const p_instance, - nrf_drv_spis_config_t const * p_config, - nrf_drv_spis_event_handler_t event_handler) -{ - ASSERT(p_config); - spis_cb_t * p_cb = &m_cb[p_instance->instance_id]; - ret_code_t err_code; - - NRF_SPIS_Type * p_spis = p_instance->p_reg; - - if (p_cb->state != NRF_DRV_STATE_UNINITIALIZED) - { - err_code = NRF_ERROR_INVALID_STATE; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - if ((uint32_t)p_config->mode > (uint32_t)NRF_DRV_SPIS_MODE_3) - { - err_code = NRF_ERROR_INVALID_PARAM; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - if (!event_handler) - { - err_code = NRF_ERROR_NULL; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } -#if NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - if (nrf_drv_common_per_res_acquire(p_spis, - m_irq_handlers[p_instance->instance_id]) != NRF_SUCCESS) - { - err_code = NRF_ERROR_BUSY; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } -#endif - - // Configure the SPI pins for input. - uint32_t mosi_pin; - uint32_t miso_pin; - - if (p_config->miso_pin != NRF_DRV_SPIS_PIN_NOT_USED) - { - nrf_gpio_cfg(p_config->miso_pin, - NRF_GPIO_PIN_DIR_INPUT, - NRF_GPIO_PIN_INPUT_CONNECT, - NRF_GPIO_PIN_NOPULL, - p_config->miso_drive, - NRF_GPIO_PIN_NOSENSE); - miso_pin = p_config->miso_pin; - } - else - { - miso_pin = NRF_SPIS_PIN_NOT_CONNECTED; - } - - if (p_config->mosi_pin != NRF_DRV_SPIS_PIN_NOT_USED) - { - nrf_gpio_cfg(p_config->mosi_pin, - NRF_GPIO_PIN_DIR_INPUT, - NRF_GPIO_PIN_INPUT_CONNECT, - NRF_GPIO_PIN_NOPULL, - NRF_GPIO_PIN_S0S1, - NRF_GPIO_PIN_NOSENSE); - mosi_pin = p_config->mosi_pin; - } - else - { - mosi_pin = NRF_SPIS_PIN_NOT_CONNECTED; - } - - nrf_gpio_cfg(p_config->csn_pin, - NRF_GPIO_PIN_DIR_INPUT, - NRF_GPIO_PIN_INPUT_CONNECT, - p_config->csn_pullup, - NRF_GPIO_PIN_S0S1, - NRF_GPIO_PIN_NOSENSE); - - nrf_gpio_cfg(p_config->sck_pin, - NRF_GPIO_PIN_DIR_INPUT, - NRF_GPIO_PIN_INPUT_CONNECT, - NRF_GPIO_PIN_NOPULL, - NRF_GPIO_PIN_S0S1, - NRF_GPIO_PIN_NOSENSE); - - nrf_spis_pins_set(p_spis, p_config->sck_pin, mosi_pin, miso_pin, p_config->csn_pin); - - nrf_spis_rx_buffer_set(p_spis, NULL, 0); - nrf_spis_tx_buffer_set(p_spis, NULL, 0); - - // Configure SPI mode. - nrf_spis_configure(p_spis, (nrf_spis_mode_t) p_config->mode, - (nrf_spis_bit_order_t) p_config->bit_order); - - // Configure DEF and ORC characters. - nrf_spis_def_set(p_spis, p_config->def); - nrf_spis_orc_set(p_spis, p_config->orc); - - // Clear possible pending events. - nrf_spis_event_clear(p_spis, NRF_SPIS_EVENT_END); - nrf_spis_event_clear(p_spis, NRF_SPIS_EVENT_ACQUIRED); - - // Enable END_ACQUIRE shortcut. - nrf_spis_shorts_enable(p_spis, NRF_SPIS_SHORT_END_ACQUIRE); - - m_cb[p_instance->instance_id].spi_state = SPIS_STATE_INIT; - m_cb[p_instance->instance_id].handler = event_handler; - -#if defined(USE_DMA_ISSUE_WORKAROUND) - // Configure a GPIOTE channel to generate interrupts on each falling edge - // on the CSN line. Handling of these interrupts will make the CPU active, - // and thus will protect the DMA transfers started by SPIS right after it - // is selected for communication. - // [the GPIOTE driver may be already initialized at this point (by this - // driver when another SPIS instance is used, or by an application code), - // so just ignore the returned value] - (void)nrf_drv_gpiote_init(); - static nrf_drv_gpiote_in_config_t const csn_gpiote_config = - GPIOTE_CONFIG_IN_SENSE_HITOLO(true); - ret_code_t gpiote_err_code = nrf_drv_gpiote_in_init(p_config->csn_pin, - &csn_gpiote_config, csn_event_handler); - if (gpiote_err_code != NRF_SUCCESS) - { - err_code = NRF_ERROR_INTERNAL; - NRF_LOG_INFO("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - nrf_drv_gpiote_in_event_enable(p_config->csn_pin, true); -#endif - - // Enable IRQ. - nrf_spis_int_enable(p_spis, NRF_SPIS_INT_ACQUIRED_MASK | NRF_SPIS_INT_END_MASK); - nrf_drv_common_irq_enable(p_instance->irq, p_config->irq_priority); - - p_cb->state = NRF_DRV_STATE_INITIALIZED; - - // Enable SPI slave device. - nrf_spis_enable(p_spis); - - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -void nrf_drv_spis_uninit(nrf_drv_spis_t const * const p_instance) -{ - spis_cb_t * p_cb = &m_cb[p_instance->instance_id]; - ASSERT(p_cb->state != NRF_DRV_STATE_UNINITIALIZED); - - NRF_SPIS_Type * p_spis = p_instance->p_reg; - - #define DISABLE_ALL 0xFFFFFFFF - nrf_spis_disable(p_spis); - nrf_drv_common_irq_disable(p_instance->irq); - nrf_spis_int_disable(p_spis, DISABLE_ALL); - #undef DISABLE_ALL - -#if NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - nrf_drv_common_per_res_release(p_spis); -#endif - - p_cb->state = NRF_DRV_STATE_UNINITIALIZED; - NRF_LOG_INFO("Initialized."); -} - - -/**@brief Function for executing the state entry action. */ -static void spis_state_entry_action_execute(NRF_SPIS_Type * p_spis, - spis_cb_t * p_cb) -{ - nrf_drv_spis_event_t event; - - switch (p_cb->spi_state) - { - case SPIS_BUFFER_RESOURCE_REQUESTED: - nrf_spis_task_trigger(p_spis, NRF_SPIS_TASK_ACQUIRE); - break; - - case SPIS_BUFFER_RESOURCE_CONFIGURED: - event.evt_type = NRF_DRV_SPIS_BUFFERS_SET_DONE; - event.rx_amount = 0; - event.tx_amount = 0; - - APP_ERROR_CHECK_BOOL(p_cb->handler != NULL); - p_cb->handler(event); - break; - - case SPIS_XFER_COMPLETED: - event.evt_type = NRF_DRV_SPIS_XFER_DONE; - event.rx_amount = nrf_spis_rx_amount_get(p_spis); - event.tx_amount = nrf_spis_tx_amount_get(p_spis); - NRF_LOG_INFO("Transfer rx_len:%d.", event.rx_amount); - NRF_LOG_DEBUG("Rx data:"); - NRF_LOG_HEXDUMP_DEBUG((uint8_t *)p_cb->rx_buffer, - event.rx_amount * sizeof(p_cb->rx_buffer[0])); - APP_ERROR_CHECK_BOOL(p_cb->handler != NULL); - p_cb->handler(event); - break; - - default: - // No implementation required. - break; - } -} - -/**@brief Function for changing the state of the SPI state machine. - * - * @param[in] p_spis SPIS instance register. - * @param[in] p_cb SPIS instance control block. - * @param[in] new_state State where the state machine transits to. - */ -static void spis_state_change(NRF_SPIS_Type * p_spis, - spis_cb_t * p_cb, - nrf_drv_spis_state_t new_state) -{ - p_cb->spi_state = new_state; - spis_state_entry_action_execute(p_spis, p_cb); -} - - -ret_code_t nrf_drv_spis_buffers_set(nrf_drv_spis_t const * const p_instance, - const uint8_t * p_tx_buffer, - uint8_t tx_buffer_length, - uint8_t * p_rx_buffer, - uint8_t rx_buffer_length) -{ - spis_cb_t * p_cb = &m_cb[p_instance->instance_id]; - uint32_t err_code; - - VERIFY_PARAM_NOT_NULL(p_rx_buffer); - VERIFY_PARAM_NOT_NULL(p_tx_buffer); - - // EasyDMA requires that transfer buffers are placed in Data RAM region; - // signal error if they are not. - if (!nrf_drv_is_in_RAM(p_tx_buffer) || !nrf_drv_is_in_RAM(p_rx_buffer)) - { - err_code = NRF_ERROR_INVALID_ADDR; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - switch (p_cb->spi_state) - { - case SPIS_STATE_INIT: - case SPIS_XFER_COMPLETED: - case SPIS_BUFFER_RESOURCE_CONFIGURED: - p_cb->tx_buffer = p_tx_buffer; - p_cb->rx_buffer = p_rx_buffer; - p_cb->tx_buffer_size = tx_buffer_length; - p_cb->rx_buffer_size = rx_buffer_length; - err_code = NRF_SUCCESS; - - spis_state_change(p_instance->p_reg, p_cb, SPIS_BUFFER_RESOURCE_REQUESTED); - break; - - case SPIS_BUFFER_RESOURCE_REQUESTED: - err_code = NRF_ERROR_INVALID_STATE; - break; - - default: - // @note: execution of this code path would imply internal error in the design. - err_code = NRF_ERROR_INTERNAL; - break; - } - - NRF_LOG_INFO("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - -static void spis_irq_handler(NRF_SPIS_Type * p_spis, spis_cb_t * p_cb) -{ - // @note: as multiple events can be pending for processing, the correct event processing order - // is as follows: - // - SPI semaphore acquired event. - // - SPI transaction complete event. - - // Check for SPI semaphore acquired event. - if (nrf_spis_event_check(p_spis, NRF_SPIS_EVENT_ACQUIRED)) - { - nrf_spis_event_clear(p_spis, NRF_SPIS_EVENT_ACQUIRED); - NRF_LOG_DEBUG("SPIS: Event: %s.", (uint32_t)EVT_TO_STR(NRF_SPIS_EVENT_ACQUIRED)); - - switch (p_cb->spi_state) - { - case SPIS_BUFFER_RESOURCE_REQUESTED: - nrf_spis_tx_buffer_set(p_spis, (uint8_t *)p_cb->tx_buffer, p_cb->tx_buffer_size); - nrf_spis_rx_buffer_set(p_spis, (uint8_t *)p_cb->rx_buffer, p_cb->rx_buffer_size); - - nrf_spis_task_trigger(p_spis, NRF_SPIS_TASK_RELEASE); - - spis_state_change(p_spis, p_cb, SPIS_BUFFER_RESOURCE_CONFIGURED); - break; - - default: - // No implementation required. - break; - } - } - - // Check for SPI transaction complete event. - if (nrf_spis_event_check(p_spis, NRF_SPIS_EVENT_END)) - { - nrf_spis_event_clear(p_spis, NRF_SPIS_EVENT_END); - NRF_LOG_DEBUG("SPIS: Event: %s.", (uint32_t)EVT_TO_STR(NRF_SPIS_EVENT_END)); - - switch (p_cb->spi_state) - { - case SPIS_BUFFER_RESOURCE_CONFIGURED: - spis_state_change(p_spis, p_cb, SPIS_XFER_COMPLETED); - break; - - default: - // No implementation required. - break; - } - } -} - -#if NRF_MODULE_ENABLED(SPIS0) - SPIS_IRQHANDLER_TEMPLATE(0) -#endif - -#if NRF_MODULE_ENABLED(SPIS1) - SPIS_IRQHANDLER_TEMPLATE(1) -#endif - -#if NRF_MODULE_ENABLED(SPIS2) - SPIS_IRQHANDLER_TEMPLATE(2) -#endif - -#endif // SPI_COUNT > 0 -#endif // NRF_MODULE_ENABLED(SPIS) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/spi_slave/nrf_drv_spis.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/spi_slave/nrf_drv_spis.h deleted file mode 100644 index 069773d3b93..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/spi_slave/nrf_drv_spis.h +++ /dev/null @@ -1,286 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/**@file - * @addtogroup nrf_spis SPIS HAL and driver - * @ingroup nrf_drivers - * @brief SPIS APIs. - * - */ - -#ifndef SPI_SLAVE_H__ -#define SPI_SLAVE_H__ - -#include -#include "nrf.h" -#include "nrf_error.h" -#include "sdk_config.h" -#include "nrf_spis.h" -#include "nrf_gpio.h" -#include "sdk_common.h" -#include "app_util_platform.h" -#include "nrf_peripherals.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef SPIS0_ENABLED -#define SPIS0_INCR SPIS0_ENABLED -#else -#define SPIS0_INCR 0 -#endif - -#ifdef SPIS1_ENABLED -#define SPIS1_INCR SPIS1_ENABLED -#else -#define SPIS1_INCR 0 -#endif - -#ifdef SPIS2_ENABLED -#define SPIS2_INCR SPIS2_ENABLED -#else -#define SPIS2_INCR 0 -#endif - -#define ENABLED_SPIS_COUNT (SPIS0_INCR + SPIS1_INCR + SPIS2_INCR) - -#ifdef NRF52810_XXAA - #define SPIS0_IRQ SPIM0_SPIS0_IRQn - #define SPIS0_IRQ_HANDLER SPIM0_SPIS0_IRQHandler -#else - #define SPIS0_IRQ SPI0_TWI0_IRQn - #define SPIS0_IRQ_HANDLER SPI0_TWI0_IRQHandler - #define SPIS1_IRQ SPI1_TWI1_IRQn - #define SPIS1_IRQ_HANDLER SPI1_TWI1_IRQHandler -#if SPIS_COUNT > 2 - #define SPIS2_IRQ SPIM2_SPIS2_SPI2_IRQn - #define SPIS2_IRQ_HANDLER SPIM2_SPIS2_SPI2_IRQHandler -#endif -#endif // NRF52810_XXAA -/** - * @defgroup nrf_drv_spis SPI slave driver - * @{ - * @ingroup nrf_spis - * @brief Multi-instance SPI slave driver. - */ - -#define NRF_DRV_SPIS_DEFAULT_CSN_PULLUP NRF_GPIO_PIN_NOPULL /**< Default pull-up configuration of the SPI CS. */ -#define NRF_DRV_SPIS_DEFAULT_MISO_DRIVE NRF_GPIO_PIN_S0S1 /**< Default drive configuration of the SPI MISO. */ - -/** -* @brief This value can be provided instead of a pin number for the signals MOSI -* and MISO to specify that the given signal is not used and therefore -* does not need to be connected to a pin. -*/ -#define NRF_DRV_SPIS_PIN_NOT_USED 0xFF - -/** @brief SPIS transaction bit order definitions. */ -typedef enum -{ - NRF_DRV_SPIS_BIT_ORDER_LSB_FIRST = NRF_SPIS_BIT_ORDER_LSB_FIRST, /**< Least significant bit shifted out first. */ - NRF_DRV_SPIS_BIT_ORDER_MSB_FIRST = NRF_SPIS_BIT_ORDER_MSB_FIRST /**< Most significant bit shifted out first. */ -} nrf_drv_spis_endian_t; - -/** @brief SPIS mode definitions for clock polarity and phase. */ -typedef enum -{ - NRF_DRV_SPIS_MODE_0 = NRF_SPIS_MODE_0, /**< (CPOL = 0, CPHA = 0). */ - NRF_DRV_SPIS_MODE_1 = NRF_SPIS_MODE_1, /**< (CPOL = 0, CPHA = 1). */ - NRF_DRV_SPIS_MODE_2 = NRF_SPIS_MODE_2, /**< (CPOL = 1, CPHA = 0). */ - NRF_DRV_SPIS_MODE_3 = NRF_SPIS_MODE_3 /**< (CPOL = 1, CPHA = 1). */ -} nrf_drv_spis_mode_t; - -/** @brief Event callback function event definitions. */ -typedef enum -{ - NRF_DRV_SPIS_BUFFERS_SET_DONE, /**< Memory buffer set event. Memory buffers have been set successfully to the SPI slave device, and SPI transactions can be done. */ - NRF_DRV_SPIS_XFER_DONE, /**< SPI transaction event. SPI transaction has been completed. */ - NRF_DRV_SPIS_EVT_TYPE_MAX /**< Enumeration upper bound. */ -} nrf_drv_spis_event_type_t; - -/** @brief Structure containing the event context from the SPI slave driver. */ -typedef struct -{ - nrf_drv_spis_event_type_t evt_type; //!< Type of event. - uint32_t rx_amount; //!< Number of bytes received in last transaction. This parameter is only valid for @ref NRF_DRV_SPIS_XFER_DONE events. - uint32_t tx_amount; //!< Number of bytes transmitted in last transaction. This parameter is only valid for @ref NRF_DRV_SPIS_XFER_DONE events. -} nrf_drv_spis_event_t; - -/** @brief SPI slave driver instance data structure. */ -typedef struct -{ - NRF_SPIS_Type * p_reg; //!< SPIS instance register. - uint8_t instance_id; //!< SPIS instance ID. - IRQn_Type irq; //!< IRQ of the specific instance. -} nrf_drv_spis_t; - -#define SPIS0_INSTANCE_INDEX 0 -#define SPIS1_INSTANCE_INDEX SPIS0_INSTANCE_INDEX+SPIS0_ENABLED -#define SPIS2_INSTANCE_INDEX SPIS1_INSTANCE_INDEX+SPIS1_ENABLED - -/** @brief Macro for creating an SPI slave driver instance. */ -#define NRF_DRV_SPIS_INSTANCE(id) \ -{ \ - .p_reg = CONCAT_2(NRF_SPIS, id), \ - .irq = CONCAT_3(SPIS, id, _IRQ), \ - .instance_id = CONCAT_3(SPIS, id, _INSTANCE_INDEX), \ -} - -/** @brief SPI slave instance default configuration. */ -#define NRF_DRV_SPIS_DEFAULT_CONFIG \ -{ \ - .sck_pin = NRF_DRV_SPIS_PIN_NOT_USED, \ - .mosi_pin = NRF_DRV_SPIS_PIN_NOT_USED, \ - .miso_pin = NRF_DRV_SPIS_PIN_NOT_USED, \ - .csn_pin = NRF_DRV_SPIS_PIN_NOT_USED, \ - .miso_drive = NRF_DRV_SPIS_DEFAULT_MISO_DRIVE, \ - .csn_pullup = NRF_DRV_SPIS_DEFAULT_CSN_PULLUP, \ - .orc = SPIS_DEFAULT_ORC, \ - .def = SPIS_DEFAULT_DEF, \ - .mode = (nrf_drv_spis_mode_t)SPIS_DEFAULT_MODE, \ - .bit_order = (nrf_drv_spis_endian_t)SPIS_DEFAULT_BIT_ORDER, \ - .irq_priority = SPIS_DEFAULT_CONFIG_IRQ_PRIORITY, \ -} - -/** @brief SPI peripheral device configuration data. */ -typedef struct -{ - uint32_t miso_pin; //!< SPI MISO pin (optional). - /**< Set @ref NRF_DRV_SPIS_PIN_NOT_USED - * if this signal is not needed. */ - uint32_t mosi_pin; //!< SPI MOSI pin (optional). - /**< Set @ref NRF_DRV_SPIS_PIN_NOT_USED - * if this signal is not needed. */ - uint32_t sck_pin; //!< SPI SCK pin. - uint32_t csn_pin; //!< SPI CSN pin. - nrf_drv_spis_mode_t mode; //!< SPI mode. - nrf_drv_spis_endian_t bit_order; //!< SPI transaction bit order. - nrf_gpio_pin_pull_t csn_pullup; //!< CSN pin pull-up configuration. - nrf_gpio_pin_drive_t miso_drive; //!< MISO pin drive configuration. - uint8_t def; //!< Character clocked out in case of an ignored transaction. - uint8_t orc; //!< Character clocked out after an over-read of the transmit buffer. - uint8_t irq_priority; //!< Interrupt priority. -} nrf_drv_spis_config_t; - - -/** @brief SPI slave event callback function type. - * - * @param[in] event SPI slave driver event. - */ -typedef void (*nrf_drv_spis_event_handler_t)(nrf_drv_spis_event_t event); - -/** @brief Function for initializing the SPI slave driver instance. - * - * @note When the nRF52 Anomaly 109 workaround for SPIS is enabled, this function - * initializes the GPIOTE driver as well, and uses one of GPIOTE channels - * to detect falling edges on CSN pin. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] p_config Pointer to the structure with the initial configuration. - * If NULL, the default configuration will be used. - * @param[in] event_handler Function to be called by the SPI slave driver upon event. - * - * @retval NRF_SUCCESS If the initialization was successful. - * @retval NRF_ERROR_INVALID_PARAM If an invalid parameter is supplied. - * @retval NRF_ERROR_BUSY If some other peripheral with the same - * instance ID is already in use. This is - * possible only if PERIPHERAL_RESOURCE_SHARING_ENABLED - * is set to a value other than zero. - * @retval NRF_ERROR_INTERNAL GPIOTE channel for detecting falling edges - * on CSN pin cannot be initialized. Possible - * only when using nRF52 Anomaly 109 workaround. - */ -ret_code_t nrf_drv_spis_init(nrf_drv_spis_t const * const p_instance, - nrf_drv_spis_config_t const * p_config, - nrf_drv_spis_event_handler_t event_handler); - -/** - * @brief Function for uninitializing the SPI slave driver instance. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -void nrf_drv_spis_uninit(nrf_drv_spis_t const * const p_instance); - -/** @brief Function for preparing the SPI slave instance for a single SPI transaction. - * - * This function prepares the SPI slave device to be ready for a single SPI transaction. It configures - * the SPI slave device to use the memory supplied with the function call in SPI transactions. - * - * When either the memory buffer configuration or the SPI transaction has been - * completed, the event callback function will be called with the appropriate event - * @ref nrf_drv_spis_event_type_t. Note that the callback function can be called before returning from - * this function, because it is called from the SPI slave interrupt context. - * - * @note This function can be called from the callback function context. - * - * @note Client applications must call this function after every @ref NRF_DRV_SPIS_XFER_DONE event if - * the SPI slave driver should be prepared for a possible new SPI transaction. - * - * @note Peripherals that are using EasyDMA (for example, SPIS) require the transfer buffers - * to be placed in the Data RAM region. Otherwise, this function will fail - * with the error code NRF_ERROR_INVALID_ADDR. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] p_tx_buffer Pointer to the TX buffer. - * @param[in] p_rx_buffer Pointer to the RX buffer. - * @param[in] tx_buffer_length Length of the TX buffer in bytes. - * @param[in] rx_buffer_length Length of the RX buffer in bytes. - * - * @retval NRF_SUCCESS If the operation was successful. - * @retval NRF_ERROR_NULL If the operation failed because a NULL pointer was supplied. - * @retval NRF_ERROR_INVALID_STATE If the operation failed because the SPI slave device is in an incorrect state. - * @retval NRF_ERROR_INVALID_ADDR If the provided buffers are not placed in the Data - * RAM region. - * @retval NRF_ERROR_INTERNAL If the operation failed because of an internal error. - */ -ret_code_t nrf_drv_spis_buffers_set(nrf_drv_spis_t const * const p_instance, - const uint8_t * p_tx_buffer, - uint8_t tx_buffer_length, - uint8_t * p_rx_buffer, - uint8_t rx_buffer_length); - - -#ifdef __cplusplus -} -#endif - -#endif // SPI_SLAVE_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/swi/nrf_drv_swi.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/swi/nrf_drv_swi.c deleted file mode 100644 index 0d1ad30a42f..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/swi/nrf_drv_swi.c +++ /dev/null @@ -1,508 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "nrf_drv_common.h" -#include "nrf_error.h" -#include "nrf_assert.h" -#include -#include -#include -#include "nrf_drv_swi.h" -#include "app_util_platform.h" - -#define NRF_LOG_MODULE_NAME swi - -#if EGU_ENABLED -#if SWI_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL SWI_CONFIG_LOG_LEVEL -#define NRF_LOG_INFO_COLOR SWI_CONFIG_INFO_COLOR -#define NRF_LOG_DEBUG_COLOR SWI_CONFIG_DEBUG_COLOR -#else //SWI_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL 0 -#endif //SWI_CONFIG_LOG_ENABLED -#endif //EGU_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - -STATIC_ASSERT(SWI_COUNT > 0); - -#ifdef SWI_DISABLE0 - #undef SWI_DISABLE0 - #define SWI_DISABLE0 1uL -#else - #if SWI_COUNT > 0 - #define SWI_DISABLE0 0uL - #else - #define SWI_DISABLE0 1uL - #endif -#endif - -#ifdef SWI_DISABLE1 - #undef SWI_DISABLE1 - #define SWI_DISABLE1 1uL -#else - #if SWI_COUNT > 1 - #define SWI_DISABLE1 0uL - #else - #define SWI_DISABLE1 1uL - #endif -#endif - -#ifdef SWI_DISABLE2 - #undef SWI_DISABLE2 - #define SWI_DISABLE2 1uL -#else - #if SWI_COUNT > 2 - #define SWI_DISABLE2 0uL - #else - #define SWI_DISABLE2 1uL - #endif -#endif - -#ifdef SWI_DISABLE3 - #undef SWI_DISABLE3 - #define SWI_DISABLE3 1uL -#else - #if SWI_COUNT > 3 - #define SWI_DISABLE3 0uL - #else - #define SWI_DISABLE3 1uL - #endif -#endif - -#ifdef SWI_DISABLE4 - #undef SWI_DISABLE4 - #define SWI_DISABLE4 1uL -#else - #if SWI_COUNT > 4 - #define SWI_DISABLE4 0uL - #else - #define SWI_DISABLE4 1uL - #endif -#endif - -#ifdef SWI_DISABLE5 - #undef SWI_DISABLE5 - #define SWI_DISABLE5 1uL -#else - #if SWI_COUNT > 5 - #define SWI_DISABLE5 0uL - #else - #define SWI_DISABLE5 1uL - #endif -#endif - -#define SWI_START_NUMBER ( (SWI_DISABLE0) \ - + (SWI_DISABLE0 * SWI_DISABLE1) \ - + (SWI_DISABLE0 * SWI_DISABLE1 * SWI_DISABLE2) \ - + (SWI_DISABLE0 * SWI_DISABLE1 * SWI_DISABLE2 * SWI_DISABLE3) \ - + (SWI_DISABLE0 * SWI_DISABLE1 * SWI_DISABLE2 * SWI_DISABLE3 * SWI_DISABLE4) \ - + (SWI_DISABLE0 * SWI_DISABLE1 * SWI_DISABLE2 * SWI_DISABLE3 * SWI_DISABLE4 \ - * SWI_DISABLE5) ) - -#if (SWI_COUNT <= SWI_START_NUMBER) - #define SWI_ARRAY_SIZE 1 -#else - #define SWI_ARRAY_SIZE (SWI_COUNT - SWI_START_NUMBER) -#endif - -static nrf_drv_state_t m_drv_state = NRF_DRV_STATE_UNINITIALIZED; -static nrf_swi_handler_t m_swi_handlers[SWI_ARRAY_SIZE]; - -#if !EGU_ENABLED - static nrf_swi_flags_t m_swi_flags[SWI_ARRAY_SIZE]; - #define SWI_EGU_MIXED (0) - #define SWI_MAX_FLAGS (16u) -#elif ((SWI_ARRAY_SIZE > EGU_COUNT) && (SWI_COUNT > EGU_COUNT)) - #define SWI_EGU_MIXED (1u) - #define SWI_MAX_FLAGS (16u) - static nrf_swi_flags_t m_swi_flags[SWI_ARRAY_SIZE - EGU_COUNT]; -#else - #define SWI_EGU_MIXED (0) -#endif - -#if NRF_MODULE_ENABLED(EGU) -#define SWI_EGU_CH_DEF(_idx_, _arg_) CONCAT_3(EGU, _idx_, _CH_NUM), -#endif -/**@brief Function for getting max channel number of given SWI. - * - * @param[in] swi SWI number. - * @return number of available channels. - */ -uint32_t swi_channel_number(nrf_swi_t swi) -{ -#if NRF_MODULE_ENABLED(EGU) - static uint8_t const egu_ch_count[] = {MACRO_REPEAT_FOR(EGU_COUNT, SWI_EGU_CH_DEF)}; - - if (swi < EGU_COUNT) - { - return (uint32_t)egu_ch_count[swi]; - } - #if SWI_EGU_MIXED - if (swi < SWI_COUNT) - { - return (uint32_t)SWI_MAX_FLAGS; - } - #endif -#else // only SWI - if (swi < SWI_COUNT) - { - return (uint32_t)SWI_MAX_FLAGS; - } -#endif // NRF_MODULE_ENABLED(EGU) - - return 0; -} - -#if NRF_MODULE_ENABLED(EGU) -/**@brief Get the specific EGU instance. */ -__STATIC_INLINE NRF_EGU_Type * egu_instance_get(nrf_swi_t swi) -{ -#if SWI_EGU_MIXED - if (!(swi < EGU_COUNT)) - { - return NULL; - } -#endif - return (NRF_EGU_Type*) (NRF_EGU0_BASE + - (((uint32_t) swi) * (NRF_EGU1_BASE - NRF_EGU0_BASE))); -} - -/**@brief Software interrupt handler (can be using EGU). */ -static void nrf_drv_swi_process(nrf_swi_t swi, nrf_swi_flags_t flags) -{ - ASSERT(swi < SWI_COUNT); - - ASSERT(m_swi_handlers[swi - SWI_START_NUMBER]); - NRF_EGU_Type * NRF_EGUx = egu_instance_get(swi); - - if (NRF_EGUx != NULL) - { - flags = 0; - for (uint8_t i = 0; i < swi_channel_number(swi); ++i) - { - nrf_egu_event_t egu_event = nrf_egu_event_triggered_get(NRF_EGUx, i); - if (nrf_egu_event_check(NRF_EGUx, egu_event)) - { - flags |= (1u << i); - nrf_egu_event_clear(NRF_EGUx, egu_event); - } - } - } -#if SWI_EGU_MIXED // this code is needed to handle SWI instances without EGU - else - { - m_swi_flags[swi - SWI_START_NUMBER - EGU_COUNT] &= ~flags; - } -#endif - m_swi_handlers[swi - SWI_START_NUMBER](swi, flags); -} - -#else -/**@brief Software interrupt handler (without EGU). */ -static void nrf_drv_swi_process(nrf_swi_t swi, nrf_swi_flags_t flags) -{ - ASSERT(m_swi_handlers[swi - SWI_START_NUMBER]); - m_swi_flags[swi - SWI_START_NUMBER] &= ~flags; - m_swi_handlers[swi - SWI_START_NUMBER](swi, flags); -} -#endif - -#if NRF_MODULE_ENABLED(EGU) - #if SWI_EGU_MIXED - #define SWI_EGU_HANDLER_TEMPLATE(NUM) void SWI##NUM##_EGU##NUM##_IRQHandler(void) \ - { \ - nrf_drv_swi_process(NUM, 0); \ - } - #define SWI_HANDLER_TEMPLATE(NUM) void SWI##NUM##_IRQHandler(void) \ - { \ - nrf_drv_swi_process((NUM), \ - m_swi_flags[(NUM) - SWI_START_NUMBER - EGU_COUNT]);\ - } - #else - #define SWI_HANDLER_TEMPLATE(NUM) void SWI##NUM##_EGU##NUM##_IRQHandler(void) \ - { \ - nrf_drv_swi_process(NUM, 0); \ - } - #endif // SWI_EGU_MIXED -#else - #define SWI_HANDLER_TEMPLATE(NUM) void SWI##NUM##_IRQHandler(void) \ - { \ - nrf_drv_swi_process((NUM), m_swi_flags[(NUM) - SWI_START_NUMBER]); \ - } -#endif // NRF_MODULE_ENABLED(EGU) - - -#if SWI_EGU_MIXED == 0 - #if SWI_DISABLE0 == 0 - SWI_HANDLER_TEMPLATE(0) - #endif - - #if SWI_DISABLE1 == 0 - SWI_HANDLER_TEMPLATE(1) - #endif - - #if SWI_DISABLE2 == 0 - SWI_HANDLER_TEMPLATE(2) - #endif - - #if SWI_DISABLE3 == 0 - SWI_HANDLER_TEMPLATE(3) - #endif - - #if SWI_DISABLE4 == 0 - SWI_HANDLER_TEMPLATE(4) - #endif - - #if SWI_DISABLE5 == 0 - SWI_HANDLER_TEMPLATE(5) - #endif -#else // SWI_EGU_MIXED == 1: SWI and SWI_EGU handlers - #if SWI_DISABLE0 == 0 - SWI_EGU_HANDLER_TEMPLATE(0) - #endif - - #if SWI_DISABLE1 == 0 - SWI_EGU_HANDLER_TEMPLATE(1) // NRF52810_XXAA has 2xSWI-EGU and 4xSWI - #endif - - #if SWI_DISABLE2 == 0 - SWI_HANDLER_TEMPLATE(2) - #endif - - #if SWI_DISABLE3 == 0 - SWI_HANDLER_TEMPLATE(3) - #endif - - #if SWI_DISABLE4 == 0 - SWI_HANDLER_TEMPLATE(4) - #endif - - #if SWI_DISABLE5 == 0 - SWI_HANDLER_TEMPLATE(5) - #endif -#endif // SWI_EGU_MIXED == 0 - -#define AVAILABLE_SWI (0x3FuL & ~( \ - (SWI_DISABLE0 << 0) | (SWI_DISABLE1 << 1) | (SWI_DISABLE2 << 2) \ - | (SWI_DISABLE3 << 3) | (SWI_DISABLE4 << 4) | (SWI_DISABLE5 << 5) \ - )) - -#if (AVAILABLE_SWI == 0) - #warning No available SWIs. -#endif - -/**@brief Function for converting SWI number to system interrupt number. - * - * @param[in] swi SWI number. - * - * @retval IRQ number. - */ -__STATIC_INLINE IRQn_Type nrf_drv_swi_irq_of(nrf_swi_t swi) -{ - return (IRQn_Type)((uint32_t)SWI0_IRQn + (uint32_t)swi); -} - - -/**@brief Function for checking if given SWI is allocated. - * - * @param[in] swi SWI number. - */ -__STATIC_INLINE bool swi_is_allocated(nrf_swi_t swi) -{ - ASSERT(swi < SWI_COUNT); -#if SWI_START_NUMBER > 0 - if (swi < SWI_START_NUMBER) - { - return false; - } -#endif - /*lint -e(661) out of range case handled by assert above*/ - return m_swi_handlers[swi - SWI_START_NUMBER]; -} - -ret_code_t nrf_drv_swi_init(void) -{ - ret_code_t err_code; - - if (m_drv_state == NRF_DRV_STATE_UNINITIALIZED) - { - m_drv_state = NRF_DRV_STATE_INITIALIZED; - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - err_code = NRF_ERROR_MODULE_ALREADY_INITIALIZED; - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -void nrf_drv_swi_uninit(void) -{ - ASSERT(m_drv_state != NRF_DRV_STATE_UNINITIALIZED) - - for (uint32_t i = SWI_START_NUMBER; i < SWI_COUNT; ++i) - { - m_swi_handlers[i - SWI_START_NUMBER] = NULL; - nrf_drv_common_irq_disable(nrf_drv_swi_irq_of((nrf_swi_t) i)); -#if NRF_MODULE_ENABLED(EGU) - NRF_EGU_Type * NRF_EGUx = egu_instance_get(i); - if (NRF_EGUx != NULL) - { - nrf_egu_int_disable(NRF_EGUx, NRF_EGU_INT_ALL); - } -#endif - } - m_drv_state = NRF_DRV_STATE_UNINITIALIZED; - return; -} - - -void nrf_drv_swi_free(nrf_swi_t * p_swi) -{ - ASSERT(swi_is_allocated(*p_swi)); - nrf_drv_common_irq_disable(nrf_drv_swi_irq_of(*p_swi)); - m_swi_handlers[(*p_swi) - SWI_START_NUMBER] = NULL; - *p_swi = NRF_SWI_UNALLOCATED; -} - - -ret_code_t nrf_drv_swi_alloc(nrf_swi_t * p_swi, nrf_swi_handler_t event_handler, uint32_t priority) -{ -#if !NRF_MODULE_ENABLED(EGU) - ASSERT(event_handler); -#endif - uint32_t err_code = NRF_ERROR_NO_MEM; - - for (uint32_t i = SWI_START_NUMBER; i < SWI_COUNT; i++) - { - CRITICAL_REGION_ENTER(); - if ((!swi_is_allocated(i)) && (AVAILABLE_SWI & (1 << i))) - { - m_swi_handlers[i - SWI_START_NUMBER] = event_handler; - *p_swi = (nrf_swi_t) i; - nrf_drv_common_irq_enable(nrf_drv_swi_irq_of(*p_swi), priority); -#if NRF_MODULE_ENABLED(EGU) - if ((event_handler != NULL) && (i < EGU_COUNT)) - { - NRF_EGU_Type * NRF_EGUx = egu_instance_get(i); - if (NRF_EGUx != NULL) - { - nrf_egu_int_enable(NRF_EGUx, NRF_EGU_INT_ALL); - } - } - #if SWI_EGU_MIXED - if (i >= EGU_COUNT) - { - ASSERT(event_handler); - } - #endif -#endif // NRF_MODULE_ENABLED(EGU) - err_code = NRF_SUCCESS; - } - CRITICAL_REGION_EXIT(); - if (err_code == NRF_SUCCESS) - { - NRF_LOG_INFO("SWI channel allocated: %d.", (*p_swi)); - break; - } - } - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -void nrf_drv_swi_trigger(nrf_swi_t swi, uint8_t flag_number) -{ - ASSERT(swi_is_allocated((uint32_t) swi)); - ASSERT(flag_number < swi_channel_number(swi)); -#if NRF_MODULE_ENABLED(EGU) - NRF_EGU_Type * NRF_EGUx = egu_instance_get(swi); - if (NRF_EGUx != NULL) - { - nrf_egu_task_trigger(NRF_EGUx, nrf_egu_task_trigger_get(NRF_EGUx, flag_number)); - } -#if SWI_EGU_MIXED - else - { - if (swi < SWI_COUNT) - { - /* for swi < EGU_COUNT above code will be executed */ - m_swi_flags[swi - SWI_START_NUMBER - EGU_COUNT] |= (1 << flag_number); - NVIC_SetPendingIRQ(nrf_drv_swi_irq_of(swi)); - } - } -#endif // SWI_EGU_MIXED -#else - m_swi_flags[swi - SWI_START_NUMBER] |= (1 << flag_number); - NVIC_SetPendingIRQ(nrf_drv_swi_irq_of(swi)); -#endif // NRF_MODULE_ENABLED(EGU) -} - - -#if NRF_MODULE_ENABLED(EGU) - -uint32_t nrf_drv_swi_task_trigger_address_get(nrf_swi_t swi, uint8_t channel) -{ - NRF_EGU_Type * NRF_EGUx = egu_instance_get(swi); - if (NRF_EGUx != NULL) - { - return (uint32_t)nrf_egu_task_trigger_address_get(NRF_EGUx, channel); - } - else - { - return 0; - } -} - -uint32_t nrf_drv_swi_event_triggered_address_get(nrf_swi_t swi, uint8_t channel) -{ - NRF_EGU_Type * NRF_EGUx = egu_instance_get(swi); - if (NRF_EGUx != NULL) - { - return (uint32_t)nrf_egu_event_triggered_address_get(NRF_EGUx, channel); - } - else - { - return 0; - } -} - -#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/swi/nrf_drv_swi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/swi/nrf_drv_swi.h deleted file mode 100644 index a3a4a0e0433..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/swi/nrf_drv_swi.h +++ /dev/null @@ -1,212 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/**@file - * - * @defgroup nrf_drv_swi SWI driver - * @{ - * @ingroup nrf_drivers - * - * @brief Driver for software interrupts (SWI). - * @details The SWI driver allows the user to allocate SWIs and pass extra flags to interrupt handler functions. - */ - -#ifndef NRF_DRV_SWI_H__ -#define NRF_DRV_SWI_H__ - -#include -#include -#include "sdk_config.h" -#include "app_util.h" -#include "app_util_platform.h" -#include "sdk_common.h" -#include "sdk_errors.h" -#include "nrf_peripherals.h" - -#ifndef EGU_ENABLED - #define EGU_ENABLED 0 -#endif - -#if NRF_MODULE_ENABLED(EGU) -#include "nrf_egu.h" -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -typedef uint8_t nrf_swi_t; ///< @brief SWI channel (unsigned integer). - -/** @brief SWI user flags (unsigned integer). - * - * User flags are set during the SWI trigger and passed to the callback function as an argument. - */ -typedef uint16_t nrf_swi_flags_t; - -/** @brief Unallocated channel value. */ -#define NRF_SWI_UNALLOCATED ((nrf_swi_t) 0xFFFFFFFFuL) - -/** @brief SWI handler function. - * - * Takes two arguments: SWI number (nrf_swi_t) and flags (nrf_swi_flags_t). - */ -typedef void (* nrf_swi_handler_t)(nrf_swi_t, nrf_swi_flags_t); - -#ifdef SOFTDEVICE_PRESENT - #if SWI_COUNT > 2 - #undef SWI_COUNT - #ifdef NRF52810_XXAA - #define SWI_COUNT 3 // SoftDevice for NRF52810_XXAA utilizes 3 SWIs - #else - #define SWI_COUNT 2 // usually, SoftDevice utilizes 4 SWIs - #endif - #endif -#else - #ifdef SVCALL_AS_NORMAL_FUNCTION - // Serialization is enabled. - #if SWI_COUNT > 2 - #undef SWI_COUNT - #ifdef NRF52810_XXAA - #define SWI_COUNT 3 // SoftDevice for NRF52810_XXAA will utilize 3 SWIs - #else - #define SWI_COUNT 2 // usually, SoftDevice utilizes 4 SWIs - #endif - #endif - #endif -#endif - -#if NRF_MODULE_ENABLED(PWM_NRF52_ANOMALY_109_WORKAROUND) - #if (PWM_NRF52_ANOMALY_109_EGU_INSTANCE == 0) - #define SWI_DISABLE0 - #elif (PWM_NRF52_ANOMALY_109_EGU_INSTANCE == 1) - #define SWI_DISABLE1 - #elif (PWM_NRF52_ANOMALY_109_EGU_INSTANCE == 2) - #define SWI_DISABLE2 - #elif (PWM_NRF52_ANOMALY_109_EGU_INSTANCE == 3) - #define SWI_DISABLE3 - #elif (PWM_NRF52_ANOMALY_109_EGU_INSTANCE == 4) - #define SWI_DISABLE4 - #elif (PWM_NRF52_ANOMALY_109_EGU_INSTANCE == 5) - #define SWI_DISABLE5 - #endif -#endif - -/**@brief Default SWI priority. */ -#define SWI_DEFAULT_PRIORITY APP_IRQ_PRIORITY_LOWEST - - -/**@brief Function for initializing the SWI module. - * - * @retval NRF_SUCCESS If the module was successfully initialized. - * @retval NRF_ERROR_MODULE_ALREADY_INITIALIZED If the module has already been initialized. - */ -ret_code_t nrf_drv_swi_init(void); - - -/**@brief Function for uninitializing the SWI module. - * - * This function also disables all SWIs. - */ -void nrf_drv_swi_uninit(void); - - -/**@brief Function for allocating a first unused SWI instance and setting a handler. - * @details The event handler function returns void and takes one uint32_t argument (SWI number). - * - * @param[out] p_swi Pointer to the SWI that has been allocated. - * @param[in] event_handler Event handler function. - * If NULL, no interrupt will be enabled (can be NULL only if the EGU - driver is enabled and available. For some microcontrollers, it is - possible that number of EGUs and SWIs differ). - * For classic SWI, must be a valid handler pointer. - * @param[in] priority Interrupt priority. - * - * @retval NRF_SUCCESS If the SWI was successfully allocated. - * @retval NRF_ERROR_NO_MEM If there is no available SWI to be used. - */ -ret_code_t nrf_drv_swi_alloc(nrf_swi_t * p_swi, nrf_swi_handler_t event_handler, uint32_t priority); - - -/**@brief Function for freeing a previously allocated SWI. - * - * @param[in,out] p_swi SWI to free. The value is changed to NRF_SWI_UNALLOCATED on success. - */ -void nrf_drv_swi_free(nrf_swi_t * p_swi); - - -/**@brief Function for triggering the SWI. - * - * @param[in] swi SWI to trigger. - * @param[in] flag_number Number of user flag to trigger. - */ -void nrf_drv_swi_trigger(nrf_swi_t swi, uint8_t flag_number); - - -#if (EGU_ENABLED > 0) || defined(__SDK_DOXYGEN__) - - -/**@brief Function for returning the EGU trigger task address. - * - * @param[in] swi SWI instance. - * @param[in] channel Number of the EGU channel. - * - * @returns EGU trigger task address. - */ -uint32_t nrf_drv_swi_task_trigger_address_get(nrf_swi_t swi, uint8_t channel); - -/**@brief Function for returning the EGU triggered event address. - * - * @param[in] swi SWI instance. - * @param[in] channel Number of the EGU channel. - * - * @returns EGU triggered event address. - */ -uint32_t nrf_drv_swi_event_triggered_address_get(nrf_swi_t swi, uint8_t channel); - -#endif // NRF_MODULE_ENABLED(EGU) - - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_DRV_SWI_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/systick/nrf_drv_systick.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/systick/nrf_drv_systick.c deleted file mode 100644 index 041c41f1dcd..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/systick/nrf_drv_systick.c +++ /dev/null @@ -1,172 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(SYSTICK) -#include "nrf_drv_systick.h" -#include "nrf_systick.h" -#include "nrf.h" -#include "nrf_assert.h" - -/** - * @brief Maximum number of ticks to delay - * - * The maximum number of ticks should be much lower than - * Physical maximum count of the SysTick timer. - * It is dictated by the fact that it would be impossible to detect delay - * properly when the timer value warps around the starting point. - */ -#define NRF_DRV_SYSTICK_TICKS_MAX (NRF_SYSTICK_VAL_MASK / 2UL) - -/** - * @brief Number of milliseconds in a second - */ -#define NRF_DRV_SYSTICK_MS (1000UL) - -/** - * @brief Number of microseconds in a second - */ -#define NRF_DRV_SYSTICK_US (1000UL * NRF_DRV_SYSTICK_MS) - -/** - * @brief Number of milliseconds to wait in single loop - * - * Constant used by @ref nrd_drv_systick_delay_ms function - * to split waiting into loops and rest. - * - * It describes the number of milliseconds to wait in single loop. - * - * See @ref nrf_drv_systick_delay_ms source code for details. - */ -#define NRF_DRV_SYSTICK_MS_STEP (64U) - -/** - * @brief Checks if the given time is in correct range - * - * Function tests given time is not to big for this library. - * Assertion is used for testing. - * - * @param us Time in microseconds to check - */ -#define NRF_DRV_SYSTICK_ASSERT_TIMEOUT(us) \ - ASSERT(us <= (NRF_DRV_SYSTICK_TICKS_MAX / ((SystemCoreClock) / NRF_DRV_SYSTICK_US))); - -/** - * @brief Function that converts microseconds to ticks - * - * Function converts from microseconds to CPU ticks. - * - * @param us Number of microseconds - * - * @return Number of ticks - * - * @sa nrf_drv_systick_ms_tick - */ -static inline uint32_t nrf_drv_systick_us_tick(uint32_t us) -{ - return us * ((SystemCoreClock) / NRF_DRV_SYSTICK_US); -} - -/** - * @brief Function that converts milliseconds to ticks - * - * Function converts from milliseconds to CPU ticks. - * - * @param us Number of milliseconds - * - * @return Number of ticks - * - * @sa nrf_drv_systick_us_tick - */ -static inline uint32_t nrf_drv_systick_ms_tick(uint32_t ms) -{ - return ms * ((SystemCoreClock) / NRF_DRV_SYSTICK_MS); -} - -void nrf_drv_systick_init(void) -{ - nrf_systick_load_set(NRF_SYSTICK_VAL_MASK); - nrf_systick_csr_set( - NRF_SYSTICK_CSR_CLKSOURCE_CPU | - NRF_SYSTICK_CSR_TICKINT_DISABLE | - NRF_SYSTICK_CSR_ENABLE); -} - -void nrf_drv_systick_get(nrf_drv_systick_state_t * p_state) -{ - p_state->time = nrf_systick_val_get(); -} - -bool nrf_drv_systick_test(nrf_drv_systick_state_t const * p_state, uint32_t us) -{ - NRF_DRV_SYSTICK_ASSERT_TIMEOUT(us); - - const uint32_t diff = NRF_SYSTICK_VAL_MASK & ((p_state->time) - nrf_systick_val_get()); - return (diff >= nrf_drv_systick_us_tick(us)); -} - -void nrf_drv_systick_delay_ticks(uint32_t ticks) -{ - ASSERT(ticks <= NRF_DRV_SYSTICK_TICKS_MAX) - - const uint32_t start = nrf_systick_val_get(); - while ((NRF_SYSTICK_VAL_MASK & (start - nrf_systick_val_get())) < ticks) - { - /* Nothing to do */ - } -} - -void nrf_drv_systick_delay_us(uint32_t us) -{ - NRF_DRV_SYSTICK_ASSERT_TIMEOUT(us); - nrf_drv_systick_delay_ticks(nrf_drv_systick_us_tick(us)); -} - -void nrf_drv_systick_delay_ms(uint32_t ms) -{ - uint32_t n = ms / NRF_DRV_SYSTICK_MS_STEP; - uint32_t r = ms % NRF_DRV_SYSTICK_MS_STEP; - while (0 != (n--)) - { - nrf_drv_systick_delay_ticks(nrf_drv_systick_ms_tick(NRF_DRV_SYSTICK_MS_STEP)); - } - nrf_drv_systick_delay_ticks(nrf_drv_systick_ms_tick(r)); -} - -#endif // NRF_MODULE_ENABLED(SYSTICK) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/systick/nrf_drv_systick.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/systick/nrf_drv_systick.h deleted file mode 100644 index 34492af2a12..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/systick/nrf_drv_systick.h +++ /dev/null @@ -1,133 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_DRV_SYSTICK_H__ -#define NRF_DRV_SYSTICK_H__ -#include -#include - - -/** - * @addtogroup nrf_systick SysTick HAL and driver - * @ingroup nrf_drivers - * @brief System Timer (SysTick) APIs - * - * The SysTick HAL provides basic APIs for accessing the registers of the system timer (SysTick). - * The SysTick driver provides APIs on a higher level. - */ - -/** - * @defgroup nrf_drv_systick SysTick driver - * @{ - * @ingroup nrf_systick - * - * This library configures SysTick as a free-running timer. - * This timer is used to generate delays and pool for timeouts. - * Only relatively short timeouts are supported. - * The SysTick works on 64MHz and is 24-bits wide. - * It means that it overflows around 4 times per second and around 250 ms - * would be the highest supported time in the library. - * But it would be really hard to detect if overflow was generated without - * using interrupts. For safely we would limit the maximum delay range by half. - */ - -/** - * @brief The value type that holds the SysTick state - * - * This variable is used to count the requested timeout. - * @sa nrf_drv_systick_get - */ -typedef struct { - uint32_t time; //!< Registered time value -}nrf_drv_systick_state_t; - -/** - * @brief Configure and start the timer - * - * Function configures SysTick as a free-running timer without interrupt. - */ -void nrf_drv_systick_init(void); - -/** - * @brief Get current SysTick state - * - * Function gets current state of the SysTick timer. - * It can be used to check time-out by @ref nrf_drv_systick_test. - * - * @param[out] p_state The pointer to the state variable to be filled - */ -void nrf_drv_systick_get(nrf_drv_systick_state_t * p_state); - -/** - * @brief Test if specified time is up in relation to remembered state - * - * @param[in] p_state Remembered state set by @ref nrf_drv_systick_get - * @param[in] us Required time-out. - * - * @retval true If current time is higher than specified state plus given time-out. - * @retval false If current time is lower than specified state plus given time-out - */ -bool nrf_drv_systick_test(nrf_drv_systick_state_t const * p_state, uint32_t us); - -/** - * @brief Blocking delay in CPU ticks - * - * @param[in] ticks Number of CPU ticks to delay. - */ -void nrf_drv_systick_delay_ticks(uint32_t ticks); - -/** - * @brief Blocking delay in us - * - * @param[in] us Number of microseconds to delay. - */ -void nrf_drv_systick_delay_us(uint32_t us); - -/** - * @brief Blocking delay in ms - * - * This delay function removes the limits of the highest possible delay value. - * - * @param[in] ms Number of milliseconds to delay. - */ -void nrf_drv_systick_delay_ms(uint32_t ms); - - -/** @} */ -#endif /* NRF_DRV_SYSTICK_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/timer/nrf_drv_timer.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/timer/nrf_drv_timer.c deleted file mode 100644 index 5aa048b48c2..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/timer/nrf_drv_timer.c +++ /dev/null @@ -1,339 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(TIMER) -#define ENABLED_TIMER_COUNT (TIMER0_ENABLED+TIMER1_ENABLED+TIMER2_ENABLED+TIMER3_ENABLED+TIMER4_ENABLED) -#if ENABLED_TIMER_COUNT -#include "nrf_drv_timer.h" -#include "nrf_drv_common.h" -#include "app_util_platform.h" - -#define NRF_LOG_MODULE_NAME timer - -#if TIMER_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL TIMER_CONFIG_LOG_LEVEL -#define NRF_LOG_INFO_COLOR TIMER_CONFIG_INFO_COLOR -#define NRF_LOG_DEBUG_COLOR TIMER_CONFIG_DEBUG_COLOR -#else //TIMER_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL 0 -#endif //TIMER_CONFIG_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - -/**@brief Timer control block. */ -typedef struct -{ - nrf_timer_event_handler_t handler; - void * context; - nrf_drv_state_t state; -} timer_control_block_t; - -static timer_control_block_t m_cb[ENABLED_TIMER_COUNT]; - -ret_code_t nrf_drv_timer_init(nrf_drv_timer_t const * const p_instance, - nrf_drv_timer_config_t const * p_config, - nrf_timer_event_handler_t timer_event_handler) -{ - timer_control_block_t * p_cb = &m_cb[p_instance->instance_id]; - ASSERT(((p_instance->p_reg == NRF_TIMER0) && TIMER0_ENABLED) || (p_instance->p_reg != NRF_TIMER0)); - ASSERT(((p_instance->p_reg == NRF_TIMER1) && TIMER1_ENABLED) || (p_instance->p_reg != NRF_TIMER1)); - ASSERT(((p_instance->p_reg == NRF_TIMER2) && TIMER2_ENABLED) || (p_instance->p_reg != NRF_TIMER2)); -#if defined (NRF_TIMER3) - ASSERT(((p_instance->p_reg == NRF_TIMER3) && TIMER3_ENABLED) || (p_instance->p_reg != NRF_TIMER3)); -#endif -#if defined (NRF_TIMER4) - ASSERT(((p_instance->p_reg == NRF_TIMER4) && TIMER4_ENABLED) || (p_instance->p_reg != NRF_TIMER4)); -#endif -#ifdef SOFTDEVICE_PRESENT - ASSERT(p_instance->p_reg != NRF_TIMER0); -#endif - ASSERT(p_config); - - ret_code_t err_code; - - if (p_cb->state != NRF_DRV_STATE_UNINITIALIZED) - { - err_code = NRF_ERROR_INVALID_STATE; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - if (timer_event_handler == NULL) - { - err_code = NRF_ERROR_INVALID_PARAM; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - /* Warning 685: Relational operator '<=' always evaluates to 'true'" - * Warning in NRF_TIMER_IS_BIT_WIDTH_VALID macro. Macro validate timers resolution. - * Not necessary in nRF52 based systems. Obligatory in nRF51 based systems. - */ - - /*lint -save -e685 */ - - ASSERT(NRF_TIMER_IS_BIT_WIDTH_VALID(p_instance->p_reg, p_config->bit_width)); - - //lint -restore - - p_cb->handler = timer_event_handler; - p_cb->context = p_config->p_context; - - uint8_t i; - for (i = 0; i < p_instance->cc_channel_count; ++i) - { - nrf_timer_event_clear(p_instance->p_reg, - nrf_timer_compare_event_get(i)); - } - - nrf_drv_common_irq_enable(nrf_drv_get_IRQn(p_instance->p_reg), - p_config->interrupt_priority); - - nrf_timer_mode_set(p_instance->p_reg, p_config->mode); - nrf_timer_bit_width_set(p_instance->p_reg, p_config->bit_width); - nrf_timer_frequency_set(p_instance->p_reg, p_config->frequency); - - p_cb->state = NRF_DRV_STATE_INITIALIZED; - - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - -void nrf_drv_timer_uninit(nrf_drv_timer_t const * const p_instance) -{ - nrf_drv_common_irq_disable(nrf_drv_get_IRQn(p_instance->p_reg)); - - #define DISABLE_ALL UINT32_MAX - nrf_timer_shorts_disable(p_instance->p_reg, DISABLE_ALL); - nrf_timer_int_disable(p_instance->p_reg, DISABLE_ALL); - #undef DISABLE_ALL - - if (m_cb[p_instance->instance_id].state == NRF_DRV_STATE_POWERED_ON) - { - nrf_drv_timer_disable(p_instance); - } - - m_cb[p_instance->instance_id].state = NRF_DRV_STATE_UNINITIALIZED; - NRF_LOG_INFO("Uninitialized instance: %d.", p_instance->instance_id); -} - -void nrf_drv_timer_enable(nrf_drv_timer_t const * const p_instance) -{ - ASSERT(m_cb[p_instance->instance_id].state == NRF_DRV_STATE_INITIALIZED); - nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_START); - m_cb[p_instance->instance_id].state = NRF_DRV_STATE_POWERED_ON; - NRF_LOG_INFO("Enabled instance: %d.", p_instance->instance_id); -} - -void nrf_drv_timer_disable(nrf_drv_timer_t const * const p_instance) -{ - ASSERT(m_cb[p_instance->instance_id].state == NRF_DRV_STATE_POWERED_ON); - nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_SHUTDOWN); - m_cb[p_instance->instance_id].state = NRF_DRV_STATE_INITIALIZED; - NRF_LOG_INFO("Disabled instance: %d.", p_instance->instance_id); -} - -void nrf_drv_timer_resume(nrf_drv_timer_t const * const p_instance) -{ - ASSERT(m_cb[p_instance->instance_id].state == NRF_DRV_STATE_POWERED_ON); - nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_START); - NRF_LOG_INFO("Resumed instance: %d.", p_instance->instance_id); -} - -void nrf_drv_timer_pause(nrf_drv_timer_t const * const p_instance) -{ - ASSERT(m_cb[p_instance->instance_id].state == NRF_DRV_STATE_POWERED_ON); - nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_STOP); - NRF_LOG_INFO("Paused instance: %d.", p_instance->instance_id); -} - -void nrf_drv_timer_clear(nrf_drv_timer_t const * const p_instance) -{ - ASSERT(m_cb[p_instance->instance_id].state != NRF_DRV_STATE_UNINITIALIZED); - nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_CLEAR); -} - -void nrf_drv_timer_increment(nrf_drv_timer_t const * const p_instance) -{ - ASSERT(m_cb[p_instance->instance_id].state == NRF_DRV_STATE_POWERED_ON); - ASSERT(nrf_timer_mode_get(p_instance->p_reg) != NRF_TIMER_MODE_TIMER); - - nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_COUNT); -} - -uint32_t nrf_drv_timer_capture(nrf_drv_timer_t const * const p_instance, - nrf_timer_cc_channel_t cc_channel) -{ - ASSERT(m_cb[p_instance->instance_id].state != NRF_DRV_STATE_UNINITIALIZED); - ASSERT(cc_channel < p_instance->cc_channel_count); - - nrf_timer_task_trigger(p_instance->p_reg, - nrf_timer_capture_task_get(cc_channel)); - return nrf_timer_cc_read(p_instance->p_reg, cc_channel); -} - -void nrf_drv_timer_compare(nrf_drv_timer_t const * const p_instance, - nrf_timer_cc_channel_t cc_channel, - uint32_t cc_value, - bool enable_int) -{ - nrf_timer_int_mask_t timer_int = nrf_timer_compare_int_get(cc_channel); - - if (enable_int) - { - nrf_timer_int_enable(p_instance->p_reg, timer_int); - } - else - { - nrf_timer_int_disable(p_instance->p_reg, timer_int); - } - - nrf_timer_cc_write(p_instance->p_reg, cc_channel, cc_value); - NRF_LOG_INFO("Timer id: %d, capture value set: %d, channel: %d.", p_instance->instance_id, cc_value, cc_channel); -} - -void nrf_drv_timer_extended_compare(nrf_drv_timer_t const * const p_instance, - nrf_timer_cc_channel_t cc_channel, - uint32_t cc_value, - nrf_timer_short_mask_t timer_short_mask, - bool enable_int) -{ - nrf_timer_shorts_disable(p_instance->p_reg, - (TIMER_SHORTS_COMPARE0_STOP_Msk << cc_channel) | - (TIMER_SHORTS_COMPARE0_CLEAR_Msk << cc_channel)); - - nrf_timer_shorts_enable(p_instance->p_reg, timer_short_mask); - - (void)nrf_drv_timer_compare(p_instance, - cc_channel, - cc_value, - enable_int); - NRF_LOG_INFO("Timer id: %d, capture value set: %d, channel: %d.", p_instance->instance_id, cc_value, cc_channel); -} - -void nrf_drv_timer_compare_int_enable(nrf_drv_timer_t const * const p_instance, - uint32_t channel) -{ - ASSERT(m_cb[p_instance->instance_id].state != NRF_DRV_STATE_UNINITIALIZED); - ASSERT(channel < p_instance->cc_channel_count); - - nrf_timer_event_clear(p_instance->p_reg, - nrf_timer_compare_event_get(channel)); - nrf_timer_int_enable(p_instance->p_reg, - nrf_timer_compare_int_get(channel)); -} - -void nrf_drv_timer_compare_int_disable(nrf_drv_timer_t const * const p_instance, - uint32_t channel) -{ - ASSERT(m_cb[p_instance->instance_id].state != NRF_DRV_STATE_UNINITIALIZED); - ASSERT(channel < p_instance->cc_channel_count); - - nrf_timer_int_disable(p_instance->p_reg, - nrf_timer_compare_int_get(channel)); -} - -static void irq_handler(NRF_TIMER_Type * p_reg, - timer_control_block_t * p_cb, - uint8_t channel_count) -{ - uint8_t i; - for (i = 0; i < channel_count; ++i) - { - nrf_timer_event_t event = nrf_timer_compare_event_get(i); - nrf_timer_int_mask_t int_mask = nrf_timer_compare_int_get(i); - - if (nrf_timer_event_check(p_reg, event) && - nrf_timer_int_enable_check(p_reg, int_mask)) - { - nrf_timer_event_clear(p_reg, event); - NRF_LOG_DEBUG("Compare event, channel: %d.", i); - p_cb->handler(event, p_cb->context); - } - } -} - -#if NRF_MODULE_ENABLED(TIMER0) -void TIMER0_IRQHandler(void) -{ - irq_handler(NRF_TIMER0, &m_cb[TIMER0_INSTANCE_INDEX], - NRF_TIMER_CC_CHANNEL_COUNT(0)); -} -#endif - -#if NRF_MODULE_ENABLED(TIMER1) -void TIMER1_IRQHandler(void) -{ - irq_handler(NRF_TIMER1, &m_cb[TIMER1_INSTANCE_INDEX], - NRF_TIMER_CC_CHANNEL_COUNT(1)); -} -#endif - -#if NRF_MODULE_ENABLED(TIMER2) -void TIMER2_IRQHandler(void) -{ - irq_handler(NRF_TIMER2, &m_cb[TIMER2_INSTANCE_INDEX], - NRF_TIMER_CC_CHANNEL_COUNT(2)); -} -#endif - -#if defined (NRF_TIMER3) -#if NRF_MODULE_ENABLED(TIMER3) -void TIMER3_IRQHandler(void) -{ - irq_handler(NRF_TIMER3, &m_cb[TIMER3_INSTANCE_INDEX], - NRF_TIMER_CC_CHANNEL_COUNT(3)); -} -#endif -#endif - -#if defined (NRF_TIMER4) -#if NRF_MODULE_ENABLED(TIMER4) -void TIMER4_IRQHandler(void) -{ - irq_handler(NRF_TIMER4, &m_cb[TIMER4_INSTANCE_INDEX], - NRF_TIMER_CC_CHANNEL_COUNT(4)); -} -#endif -#endif - -#endif // ENABLED_TIMER_COUNT -#endif // NRF_MODULE_ENABLED(TIMER) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/timer/nrf_drv_timer.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/timer/nrf_drv_timer.h deleted file mode 100644 index 8d8cba05435..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/timer/nrf_drv_timer.h +++ /dev/null @@ -1,410 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/**@file - * @addtogroup nrf_timer Timer HAL and driver - * @ingroup nrf_drivers - * @brief Timer APIs. - * @details The timer HAL provides basic APIs for accessing the registers - * of the timer. The timer driver provides APIs on a higher level. - * - * @defgroup nrf_drv_timer Timer driver - * @{ - * @ingroup nrf_timer - * @brief Multi-instance timer driver. - */ - -#ifndef NRF_DRV_TIMER_H__ -#define NRF_DRV_TIMER_H__ - -#include "nordic_common.h" -#include "sdk_config.h" -#include "nrf_timer.h" -#include "sdk_errors.h" -#include "nrf_assert.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Timer driver instance data structure. - */ -typedef struct -{ - NRF_TIMER_Type * p_reg; ///< Pointer to the structure with TIMER peripheral instance registers. - uint8_t instance_id; ///< Driver instance index. - uint8_t cc_channel_count; ///< Number of capture/compare channels. -} nrf_drv_timer_t; - -#define ENABLED_TIMER_COUNT (TIMER0_ENABLED+TIMER1_ENABLED+TIMER2_ENABLED+TIMER3_ENABLED+TIMER4_ENABLED) - -#define TIMER0_INSTANCE_INDEX 0 -#define TIMER1_INSTANCE_INDEX TIMER0_INSTANCE_INDEX+TIMER0_ENABLED -#define TIMER2_INSTANCE_INDEX TIMER1_INSTANCE_INDEX+TIMER1_ENABLED -#define TIMER3_INSTANCE_INDEX TIMER2_INSTANCE_INDEX+TIMER2_ENABLED -#define TIMER4_INSTANCE_INDEX TIMER3_INSTANCE_INDEX+TIMER3_ENABLED - -/** - * @brief Macro for creating a timer driver instance. - */ -#define NRF_DRV_TIMER_INSTANCE(id) \ -{ \ - .p_reg = CONCAT_2(NRF_TIMER, id), \ - .instance_id = CONCAT_3(TIMER, id, _INSTANCE_INDEX), \ - .cc_channel_count = NRF_TIMER_CC_CHANNEL_COUNT(id), \ -} - -/** - * @brief Timer driver instance configuration structure. - */ -typedef struct -{ - nrf_timer_frequency_t frequency; ///< Frequency. - nrf_timer_mode_t mode; ///< Mode of operation. - nrf_timer_bit_width_t bit_width; ///< Bit width. - uint8_t interrupt_priority; ///< Interrupt priority. - void * p_context; ///< Context passed to interrupt handler. -} nrf_drv_timer_config_t; - -/** - * @brief Timer driver instance default configuration. - */ -#define NRF_DRV_TIMER_DEFAULT_CONFIG \ -{ \ - .frequency = (nrf_timer_frequency_t)TIMER_DEFAULT_CONFIG_FREQUENCY,\ - .mode = (nrf_timer_mode_t)TIMER_DEFAULT_CONFIG_MODE, \ - .bit_width = (nrf_timer_bit_width_t)TIMER_DEFAULT_CONFIG_BIT_WIDTH,\ - .interrupt_priority = TIMER_DEFAULT_CONFIG_IRQ_PRIORITY, \ - .p_context = NULL \ -} - -/** - * @brief Timer driver event handler type. - * - * @param[in] event_type Timer event. - * @param[in] p_context General purpose parameter set during initialization of - * the timer. This parameter can be used to pass - * additional information to the handler function, for - * example, the timer ID. - */ -typedef void (* nrf_timer_event_handler_t)(nrf_timer_event_t event_type, - void * p_context); - -/** - * @brief Function for initializing the timer. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] p_config Initial configuration. Must not be NULL. - * @param[in] timer_event_handler Event handler provided by the user. - * Must not be NULL. - * - * @retval NRF_SUCCESS If initialization was successful. - * @retval NRF_ERROR_INVALID_STATE If the instance is already initialized. - * @retval NRF_ERROR_INVALID_PARAM If no handler was provided. - */ -ret_code_t nrf_drv_timer_init(nrf_drv_timer_t const * const p_instance, - nrf_drv_timer_config_t const * p_config, - nrf_timer_event_handler_t timer_event_handler); - -/** - * @brief Function for uninitializing the timer. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -void nrf_drv_timer_uninit(nrf_drv_timer_t const * const p_instance); - -/** - * @brief Function for turning on the timer. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -void nrf_drv_timer_enable(nrf_drv_timer_t const * const p_instance); - -/** - * @brief Function for turning off the timer. - * - * Note that the timer will allow to enter the lowest possible SYSTEM_ON state - * only after this function is called. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -void nrf_drv_timer_disable(nrf_drv_timer_t const * const p_instance); - -/** - * @brief Function for pausing the timer. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -void nrf_drv_timer_pause(nrf_drv_timer_t const * const p_instance); - -/** - * @brief Function for resuming the timer. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -void nrf_drv_timer_resume(nrf_drv_timer_t const * const p_instance); - -/** - * @brief Function for clearing the timer. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -void nrf_drv_timer_clear(nrf_drv_timer_t const * const p_instance); - -/** - * @brief Function for incrementing the timer. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -void nrf_drv_timer_increment(nrf_drv_timer_t const * const p_instance); - -/** - * @brief Function for returning the address of a specific timer task. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] timer_task Timer task. - * - * @return Task address. - */ -__STATIC_INLINE uint32_t nrf_drv_timer_task_address_get( - nrf_drv_timer_t const * const p_instance, - nrf_timer_task_t timer_task); - -/** - * @brief Function for returning the address of a specific timer capture task. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] channel Capture channel number. - * - * @return Task address. - */ -__STATIC_INLINE uint32_t nrf_drv_timer_capture_task_address_get( - nrf_drv_timer_t const * const p_instance, - uint32_t channel); - -/** - * @brief Function for returning the address of a specific timer event. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] timer_event Timer event. - * - * @return Event address. - */ -__STATIC_INLINE uint32_t nrf_drv_timer_event_address_get( - nrf_drv_timer_t const * const p_instance, - nrf_timer_event_t timer_event); - -/** - * @brief Function for returning the address of a specific timer compare event. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] channel Compare channel number. - * - * @return Event address. - */ -__STATIC_INLINE uint32_t nrf_drv_timer_compare_event_address_get( - nrf_drv_timer_t const * const p_instance, - uint32_t channel); - -/** - * @brief Function for capturing the timer value. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] cc_channel Capture channel number. - * - * @return Captured value. - */ -uint32_t nrf_drv_timer_capture(nrf_drv_timer_t const * const p_instance, - nrf_timer_cc_channel_t cc_channel); - -/** - * @brief Function for returning the capture value from a specific channel. - * - * Use this function to read channel values when PPI is used for capturing. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] cc_channel Capture channel number. - * - * @return Captured value. - */ -__STATIC_INLINE uint32_t nrf_drv_timer_capture_get( - nrf_drv_timer_t const * const p_instance, - nrf_timer_cc_channel_t cc_channel); - -/** - * @brief Function for setting the timer channel in compare mode. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] cc_channel Compare channel number. - * @param[in] cc_value Compare value. - * @param[in] enable_int Enable or disable the interrupt for the compare channel. - */ -void nrf_drv_timer_compare(nrf_drv_timer_t const * const p_instance, - nrf_timer_cc_channel_t cc_channel, - uint32_t cc_value, - bool enable_int); - -/** - * @brief Function for setting the timer channel in extended compare mode. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] cc_channel Compare channel number. - * @param[in] cc_value Compare value. - * @param[in] timer_short_mask Shortcut between the compare event on the channel - * and the timer task (STOP or CLEAR). - * @param[in] enable_int Enable or disable the interrupt for the compare - * channel. - */ -void nrf_drv_timer_extended_compare(nrf_drv_timer_t const * const p_instance, - nrf_timer_cc_channel_t cc_channel, - uint32_t cc_value, - nrf_timer_short_mask_t timer_short_mask, - bool enable_int); - -/** - * @brief Function for converting time in microseconds to timer ticks. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] time_us Time in microseconds. - * - * @return Number of ticks. - */ -__STATIC_INLINE uint32_t nrf_drv_timer_us_to_ticks( - nrf_drv_timer_t const * const p_instance, - uint32_t time_us); - -/** - * @brief Function for converting time in milliseconds to timer ticks. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] time_ms Time in milliseconds. - * - * @return Number of ticks. - */ -__STATIC_INLINE uint32_t nrf_drv_timer_ms_to_ticks( - nrf_drv_timer_t const * const p_instance, - uint32_t time_ms); - -/** - * @brief Function for enabling timer compare interrupt. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] channel Compare channel. - */ -void nrf_drv_timer_compare_int_enable(nrf_drv_timer_t const * const p_instance, - uint32_t channel); - -/** - * @brief Function for disabling timer compare interrupt. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] channel Compare channel. - */ -void nrf_drv_timer_compare_int_disable(nrf_drv_timer_t const * const p_instance, - uint32_t channel); - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -__STATIC_INLINE uint32_t nrf_drv_timer_task_address_get( - nrf_drv_timer_t const * const p_instance, - nrf_timer_task_t timer_task) -{ - return (uint32_t)nrf_timer_task_address_get(p_instance->p_reg, timer_task); -} - -__STATIC_INLINE uint32_t nrf_drv_timer_capture_task_address_get( - nrf_drv_timer_t const * const p_instance, - uint32_t channel) -{ - ASSERT(channel < p_instance->cc_channel_count); - return (uint32_t)nrf_timer_task_address_get(p_instance->p_reg, - nrf_timer_capture_task_get(channel)); -} - -__STATIC_INLINE uint32_t nrf_drv_timer_event_address_get( - nrf_drv_timer_t const * const p_instance, - nrf_timer_event_t timer_event) -{ - return (uint32_t)nrf_timer_event_address_get(p_instance->p_reg, timer_event); -} - -__STATIC_INLINE uint32_t nrf_drv_timer_compare_event_address_get( - nrf_drv_timer_t const * const p_instance, - uint32_t channel) -{ - ASSERT(channel < p_instance->cc_channel_count); - return (uint32_t)nrf_timer_event_address_get(p_instance->p_reg, - nrf_timer_compare_event_get(channel)); -} - -__STATIC_INLINE uint32_t nrf_drv_timer_capture_get( - nrf_drv_timer_t const * const p_instance, - nrf_timer_cc_channel_t cc_channel) -{ - return nrf_timer_cc_read(p_instance->p_reg, cc_channel); -} - -__STATIC_INLINE uint32_t nrf_drv_timer_us_to_ticks( - nrf_drv_timer_t const * const p_instance, - uint32_t timer_us) -{ - return nrf_timer_us_to_ticks(timer_us, - nrf_timer_frequency_get(p_instance->p_reg)); -} - -__STATIC_INLINE uint32_t nrf_drv_timer_ms_to_ticks( - nrf_drv_timer_t const * const p_instance, - uint32_t timer_ms) -{ - return nrf_timer_ms_to_ticks(timer_ms, - nrf_timer_frequency_get(p_instance->p_reg)); -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_DRV_TIMER_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/twi_master/nrf_drv_twi.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/twi_master/nrf_drv_twi.c deleted file mode 100644 index 1bf33a2160c..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/twi_master/nrf_drv_twi.c +++ /dev/null @@ -1,1285 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(TWI) -#include "nrf_drv_twi.h" -#if ENABLED_TWI_COUNT -#include "nrf_drv_common.h" -#include "nrf_gpio.h" -#include "nrf_assert.h" -#include "app_util_platform.h" -#include "nrf_delay.h" - -#include - -#define NRF_LOG_MODULE_NAME twi - -/*lint -save -e491*/ - -#if TWI_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL TWI_CONFIG_LOG_LEVEL -#define NRF_LOG_INFO_COLOR TWI_CONFIG_INFO_COLOR -#define NRF_LOG_DEBUG_COLOR TWI_CONFIG_DEBUG_COLOR -#define EVT_TO_STR(event) (event == NRF_DRV_TWI_EVT_DONE ? "EVT_DONE" : \ - (event == NRF_DRV_TWI_EVT_ADDRESS_NACK ? "EVT_ADDRESS_NACK" : \ - (event == NRF_DRV_TWI_EVT_DATA_NACK ? "EVT_DATA_NACK" : "UNKNOWN ERROR"))) -#define EVT_TO_STR_TWI(event) (event == NRF_TWI_EVENT_STOPPED ? "NRF_TWI_EVENT_STOPPED" : \ - (event == NRF_TWI_EVENT_RXDREADY ? "NRF_TWI_EVENT_RXDREADY" : \ - (event == NRF_TWI_EVENT_TXDSENT ? "NRF_TWI_EVENT_TXDSENT" : \ - (event == NRF_TWI_EVENT_ERROR ? "NRF_TWI_EVENT_ERROR" : \ - (event == NRF_TWI_EVENT_BB ? "NRF_TWI_EVENT_BB" : \ - (event == NRF_TWI_EVENT_SUSPENDED ? "NRF_TWI_EVENT_SUSPENDED" : "UNKNOWN ERROR")))))) -#define EVT_TO_STR_TWIM(event) (event == NRF_TWIM_EVENT_STOPPED ? "NRF_TWIM_EVENT_STOPPED" : \ - (event == NRF_TWIM_EVENT_ERROR ? "NRF_TWIM_EVENT_ERROR" : \ - (event == NRF_TWIM_EVENT_SUSPENDED ? "NRF_TWIM_EVENT_SUSPENDED" : \ - (event == NRF_TWIM_EVENT_RXSTARTED ? "NRF_TWIM_EVENT_RXSTARTED" : \ - (event == NRF_TWIM_EVENT_TXSTARTED ? "NRF_TWIM_EVENT_TXSTARTED" : \ - (event == NRF_TWIM_EVENT_LASTRX ? "NRF_TWIM_EVENT_LASTRX" : \ - (event == NRF_TWIM_EVENT_LASTTX ? "NRF_TWIM_EVENT_LASTTX" : "UNKNOWN ERROR"))))))) -#define TRANSFER_TO_STR(type) (type == NRF_DRV_TWI_XFER_TX ? "XFER_TX" : \ - (type == NRF_DRV_TWI_XFER_RX ? "XFER_RX" : \ - (type == NRF_DRV_TWI_XFER_TXRX ? "XFER_TXRX" : \ - (type == NRF_DRV_TWI_XFER_TXTX ? "XFER_TXTX" : "UNKNOWN TRANSFER TYPE")))) -#else //TWI_CONFIG_LOG_ENABLED -#define EVT_TO_STR(event) "" -#define EVT_TO_STR_TWI(event) "" -#define EVT_TO_STR_TWIM(event) "" -#define TRANSFER_TO_STR(event) "" -#define NRF_LOG_LEVEL 0 -#endif //TWI_CONFIG_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - -#if (defined(TWIM_IN_USE) && defined(TWI_IN_USE)) - // TWIM and TWI combined - #define CODE_FOR_TWIM(code) if (p_instance->use_easy_dma) { code } - #define CODE_FOR_TWI(code) else { code } -#elif (defined(TWIM_IN_USE) && !defined(TWI_IN_USE)) - // TWIM only - #define CODE_FOR_TWIM(code) { code } - #define CODE_FOR_TWI(code) -#elif (!defined(TWIM_IN_USE) && defined(TWI_IN_USE)) - // TWI only - #define CODE_FOR_TWIM(code) - #define CODE_FOR_TWI(code) { code } -#else - #error "Wrong configuration." -#endif - -// All interrupt flags -#define DISABLE_ALL_INT_SHORT 0xFFFFFFFF - -#define SCL_PIN_INIT_CONF ( (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) \ - | (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) \ - | (GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos) \ - | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) \ - | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)) -#define SDA_PIN_INIT_CONF SCL_PIN_INIT_CONF - -#define SDA_PIN_UNINIT_CONF ( (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) \ - | (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) \ - | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) \ - | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) \ - | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)) -#define SCL_PIN_UNINIT_CONF SDA_PIN_UNINIT_CONF - -#define SCL_PIN_INIT_CONF_CLR ( (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) \ - | (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) \ - | (GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos) \ - | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) \ - | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos)) -#define SDA_PIN_INIT_CONF_CLR SCL_PIN_INIT_CONF_CLR - -#define HW_TIMEOUT 10000 - -// Control block - driver instance local data. -typedef struct -{ - nrf_drv_twi_evt_handler_t handler; - void * p_context; - volatile uint32_t int_mask; - nrf_drv_twi_xfer_desc_t xfer_desc; - uint32_t flags; - uint8_t * p_curr_buf; - uint8_t curr_length; - bool curr_no_stop; - nrf_drv_state_t state; - bool error; - volatile bool busy; - bool repeated; - uint8_t bytes_transferred; - bool hold_bus_uninit; -#if NRF_MODULE_ENABLED(TWIM_NRF52_ANOMALY_109_WORKAROUND) - nrf_twim_frequency_t bus_frequency; -#endif -} twi_control_block_t; - -static twi_control_block_t m_cb[ENABLED_TWI_COUNT]; - -#if NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - #define IRQ_HANDLER_NAME(n) irq_handler_for_instance_##n - #define IRQ_HANDLER(n) static void IRQ_HANDLER_NAME(n)(void) - - #if NRF_MODULE_ENABLED(TWI0) - IRQ_HANDLER(0); - #endif - #if NRF_MODULE_ENABLED(TWI1) - IRQ_HANDLER(1); - #endif - static nrf_drv_irq_handler_t const m_irq_handlers[ENABLED_TWI_COUNT] = { - #if NRF_MODULE_ENABLED(TWI0) - IRQ_HANDLER_NAME(0), - #endif - #if NRF_MODULE_ENABLED(TWI1) - IRQ_HANDLER_NAME(1), - #endif - }; -#else - #if defined (NRF52810_XXAA) - #define IRQ_HANDLER(n) void TWIM##n##_TWIS##n##_IRQHandler(void) - #else - #define IRQ_HANDLER(n) void SPI##n##_TWI##n##_IRQHandler(void) - #endif -#endif // NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - -static ret_code_t twi_process_error(uint32_t errorsrc) -{ - ret_code_t ret = NRF_ERROR_INTERNAL; -#ifdef TWI_IN_USE - if (errorsrc & NRF_TWI_ERROR_OVERRUN) - { - ret = NRF_ERROR_DRV_TWI_ERR_OVERRUN; - } -#endif - if (errorsrc & NRF_TWI_ERROR_ADDRESS_NACK) - { - ret = NRF_ERROR_DRV_TWI_ERR_ANACK; - } - - if (errorsrc & NRF_TWI_ERROR_DATA_NACK) - { - ret = NRF_ERROR_DRV_TWI_ERR_DNACK; - } - - return ret; -} - -static void twi_clear_bus(nrf_drv_twi_config_t const * p_config) -{ - NRF_GPIO->PIN_CNF[p_config->scl] = SCL_PIN_INIT_CONF; - NRF_GPIO->PIN_CNF[p_config->sda] = SDA_PIN_INIT_CONF; - - nrf_gpio_pin_set(p_config->scl); - nrf_gpio_pin_set(p_config->sda); - - NRF_GPIO->PIN_CNF[p_config->scl] = SCL_PIN_INIT_CONF_CLR; - NRF_GPIO->PIN_CNF[p_config->sda] = SDA_PIN_INIT_CONF_CLR; - - nrf_delay_us(4); - - for (int i = 0; i < 9; i++) - { - if (nrf_gpio_pin_read(p_config->sda)) - { - if (i == 0) - { - return; - } - else - { - break; - } - } - nrf_gpio_pin_clear(p_config->scl); - nrf_delay_us(4); - nrf_gpio_pin_set(p_config->scl); - nrf_delay_us(4); - } - nrf_gpio_pin_clear(p_config->sda); - nrf_delay_us(4); - nrf_gpio_pin_set(p_config->sda); -} - -ret_code_t nrf_drv_twi_init(nrf_drv_twi_t const * p_instance, - nrf_drv_twi_config_t const * p_config, - nrf_drv_twi_evt_handler_t event_handler, - void * p_context) -{ - ASSERT(p_config); - ASSERT(p_config->scl != p_config->sda); - twi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - ret_code_t err_code; - - if (p_cb->state != NRF_DRV_STATE_UNINITIALIZED) - { - err_code = NRF_ERROR_INVALID_STATE; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - -#if NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - if (nrf_drv_common_per_res_acquire(p_instance->reg.p_regs, - m_irq_handlers[p_instance->drv_inst_idx]) != NRF_SUCCESS) - { - err_code = NRF_ERROR_BUSY; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } -#endif // NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - - p_cb->handler = event_handler; - p_cb->p_context = p_context; - p_cb->int_mask = 0; - p_cb->repeated = false; - p_cb->busy = false; - p_cb->hold_bus_uninit = p_config->hold_bus_uninit; -#if NRF_MODULE_ENABLED(TWIM_NRF52_ANOMALY_109_WORKAROUND) - p_cb->bus_frequency = (nrf_twim_frequency_t)p_config->frequency; -#endif - - if (p_config->clear_bus_init) - { - /* Send clocks (max 9) until slave device back from stuck mode */ - twi_clear_bus(p_config); - } - - /* To secure correct signal levels on the pins used by the TWI - master when the system is in OFF mode, and when the TWI master is - disabled, these pins must be configured in the GPIO peripheral. - */ - NRF_GPIO->PIN_CNF[p_config->scl] = SCL_PIN_INIT_CONF; - NRF_GPIO->PIN_CNF[p_config->sda] = SDA_PIN_INIT_CONF; - - CODE_FOR_TWIM - ( - NRF_TWIM_Type * p_twim = p_instance->reg.p_twim; - nrf_twim_pins_set(p_twim, p_config->scl, p_config->sda); - nrf_twim_frequency_set(p_twim, - (nrf_twim_frequency_t)p_config->frequency); - ) - CODE_FOR_TWI - ( - NRF_TWI_Type * p_twi = p_instance->reg.p_twi; - nrf_twi_pins_set(p_twi, p_config->scl, p_config->sda); - nrf_twi_frequency_set(p_twi, - (nrf_twi_frequency_t)p_config->frequency); - ) - - if (p_cb->handler) - { - CODE_FOR_TWIM - ( - nrf_drv_common_irq_enable(nrf_drv_get_IRQn((void *)p_instance->reg.p_twim), - p_config->interrupt_priority); - ) - CODE_FOR_TWI - ( - nrf_drv_common_irq_enable(nrf_drv_get_IRQn((void *)p_instance->reg.p_twi), - p_config->interrupt_priority); - ) - } - - p_cb->state = NRF_DRV_STATE_INITIALIZED; - - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - -void nrf_drv_twi_uninit(nrf_drv_twi_t const * p_instance) -{ - twi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - ASSERT(p_cb->state != NRF_DRV_STATE_UNINITIALIZED); - - if (p_cb->handler) - { - CODE_FOR_TWIM - ( - nrf_drv_common_irq_disable(nrf_drv_get_IRQn((void *)p_instance->reg.p_twim)); - ) - CODE_FOR_TWI - ( - nrf_drv_common_irq_disable(nrf_drv_get_IRQn((void *)p_instance->reg.p_twi)); - ) - } - -#if NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - nrf_drv_common_per_res_release(p_instance->reg.p_regs); -#endif - - if (!p_cb->hold_bus_uninit) - { - CODE_FOR_TWIM - ( - NRF_GPIO->PIN_CNF[p_instance->reg.p_twim->PSEL.SCL] = SCL_PIN_UNINIT_CONF; - NRF_GPIO->PIN_CNF[p_instance->reg.p_twim->PSEL.SDA] = SDA_PIN_UNINIT_CONF; - ) - CODE_FOR_TWI - ( - NRF_GPIO->PIN_CNF[p_instance->reg.p_twi->PSELSCL] = SCL_PIN_UNINIT_CONF; - NRF_GPIO->PIN_CNF[p_instance->reg.p_twi->PSELSDA] = SDA_PIN_UNINIT_CONF; - ) - } - - p_cb->state = NRF_DRV_STATE_UNINITIALIZED; - NRF_LOG_INFO("Instance uninitialized: %d.", p_instance->drv_inst_idx); -} - -void nrf_drv_twi_enable(nrf_drv_twi_t const * p_instance) -{ - twi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - ASSERT(p_cb->state == NRF_DRV_STATE_INITIALIZED); - - CODE_FOR_TWIM - ( - NRF_TWIM_Type * p_twim = p_instance->reg.p_twim; - - nrf_twim_enable(p_twim); - ) - CODE_FOR_TWI - ( - NRF_TWI_Type * p_twi = p_instance->reg.p_twi; - - nrf_twi_enable(p_twi); - ) - - p_cb->state = NRF_DRV_STATE_POWERED_ON; - NRF_LOG_INFO("Instance enabled: %d.", p_instance->drv_inst_idx); -} - -void nrf_drv_twi_disable(nrf_drv_twi_t const * p_instance) -{ - twi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - ASSERT(p_cb->state != NRF_DRV_STATE_UNINITIALIZED); - - CODE_FOR_TWIM - ( - NRF_TWIM_Type * p_twim = p_instance->reg.p_twim; - p_cb->int_mask = 0; - nrf_twim_int_disable(p_twim, DISABLE_ALL_INT_SHORT); - nrf_twim_shorts_disable(p_twim, DISABLE_ALL_INT_SHORT); - nrf_twim_disable(p_twim); - ) - CODE_FOR_TWI - ( - NRF_TWI_Type * p_twi = p_instance->reg.p_twi; - nrf_twi_int_disable(p_twi, DISABLE_ALL_INT_SHORT); - nrf_twi_shorts_disable(p_twi, DISABLE_ALL_INT_SHORT); - nrf_twi_disable(p_twi); - ) - - p_cb->state = NRF_DRV_STATE_INITIALIZED; - NRF_LOG_INFO("Instance disabled: %d.", p_instance->drv_inst_idx); -} - -#ifdef TWI_IN_USE -static bool twi_send_byte(NRF_TWI_Type * p_twi, - uint8_t const * p_data, - uint8_t length, - uint8_t * p_bytes_transferred, - bool no_stop) -{ - if (*p_bytes_transferred < length) - { - nrf_twi_txd_set(p_twi, p_data[*p_bytes_transferred]); - ++(*p_bytes_transferred); - } - else - { - if (no_stop) - { - nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_SUSPEND); - return false; - } - else - { - nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STOP); - } - } - return true; -} - -static void twi_receive_byte(NRF_TWI_Type * p_twi, - uint8_t * p_data, - uint8_t length, - uint8_t * p_bytes_transferred) -{ - if (*p_bytes_transferred < length) - { - p_data[*p_bytes_transferred] = nrf_twi_rxd_get(p_twi); - - ++(*p_bytes_transferred); - - if (*p_bytes_transferred == length - 1) - { - nrf_twi_shorts_set(p_twi, NRF_TWI_SHORT_BB_STOP_MASK); - } - else if (*p_bytes_transferred == length) - { - return; - } - - nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_RESUME); - } -} - -static bool twi_transfer(NRF_TWI_Type * p_twi, - bool * p_error, - uint8_t * p_bytes_transferred, - uint8_t * p_data, - uint8_t length, - bool no_stop) -{ - bool do_stop_check = ((*p_error) || ((*p_bytes_transferred) == length)); - - if (*p_error) - { - nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_ERROR); - nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_TXDSENT); - nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_RXDREADY); - } - else if (nrf_twi_event_check(p_twi, NRF_TWI_EVENT_ERROR)) - { - nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_ERROR); - NRF_LOG_DEBUG("TWI: Event: %s.", (uint32_t)EVT_TO_STR_TWI(NRF_TWI_EVENT_ERROR)); - nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STOP); - *p_error = true; - } - else - { - if (nrf_twi_event_check(p_twi, NRF_TWI_EVENT_TXDSENT)) - { - nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_TXDSENT); - NRF_LOG_DEBUG("TWI: Event: %s.", (uint32_t)EVT_TO_STR_TWI(NRF_TWI_EVENT_TXDSENT)); - if (nrf_twi_event_check(p_twi, NRF_TWI_EVENT_ERROR)) - { - nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_ERROR); - NRF_LOG_DEBUG("TWI: Event: %s.", (uint32_t)EVT_TO_STR_TWI(NRF_TWI_EVENT_ERROR)); - nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STOP); - *p_error = true; - } - else - { - if (!twi_send_byte(p_twi, p_data, length, p_bytes_transferred, no_stop)) - { - return false; - } - } - } - else if (nrf_twi_event_check(p_twi, NRF_TWI_EVENT_RXDREADY)) - { - nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_RXDREADY); - NRF_LOG_DEBUG("TWI: Event: %s.", (uint32_t)EVT_TO_STR_TWI(NRF_TWI_EVENT_RXDREADY)); - if (nrf_twi_event_check(p_twi, NRF_TWI_EVENT_ERROR)) - { - NRF_LOG_DEBUG("TWI: Event: %s.", (uint32_t)EVT_TO_STR_TWI(NRF_TWI_EVENT_ERROR)); - nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_ERROR); - nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STOP); - *p_error = true; - } - else - { - twi_receive_byte(p_twi, p_data, length, p_bytes_transferred); - } - } - } - - if (do_stop_check && nrf_twi_event_check(p_twi, NRF_TWI_EVENT_STOPPED)) - { - nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_STOPPED); - NRF_LOG_DEBUG("TWI: Event: %s.", (uint32_t)EVT_TO_STR_TWI(NRF_TWI_EVENT_STOPPED)); - return false; - } - - return true; -} - -static ret_code_t twi_tx_start_transfer(twi_control_block_t * p_cb, - NRF_TWI_Type * p_twi, - uint8_t const * p_data, - uint8_t length, - bool no_stop) -{ - ret_code_t ret_code = NRF_SUCCESS; - volatile int32_t hw_timeout; - - hw_timeout = HW_TIMEOUT; - - nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_STOPPED); - nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_ERROR); - nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_TXDSENT); - nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_RXDREADY); - nrf_twi_shorts_set(p_twi, 0); - - p_cb->bytes_transferred = 0; - p_cb->error = false; - - /** - * 4/23/2018 Arm Mbed modification to Nordic SDK 14.2. - * Interrupts must be enabled before transmitting the first byte in asynchronous mode. - */ - if (p_cb->handler) - { - p_cb->int_mask = NRF_TWI_INT_STOPPED_MASK | - NRF_TWI_INT_ERROR_MASK | - NRF_TWI_INT_TXDSENT_MASK | - NRF_TWI_INT_RXDREADY_MASK; - nrf_twi_int_enable(p_twi, p_cb->int_mask); - } - - // In case TWI is suspended resume its operation. - nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_RESUME); - nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STARTTX); - - (void)twi_send_byte(p_twi, p_data, length, &p_cb->bytes_transferred, no_stop); - - /** - * 4/23/2018 Arm Mbed modification to Nordic SDK 14.2. - * Interrupts must be enabled before transmitting the first byte in asynchronous mode. - */ - if (p_cb->handler == NULL) - { - while ((hw_timeout > 0) && - twi_transfer(p_twi, - &p_cb->error, - &p_cb->bytes_transferred, - (uint8_t *)p_data, - length, - no_stop)) - { - hw_timeout--; - } - - if (p_cb->error) - { - uint32_t errorsrc = nrf_twi_errorsrc_get_and_clear(p_twi); - - if (errorsrc) - { - ret_code = twi_process_error(errorsrc); - } - } - - if (hw_timeout <= 0) - { - nrf_twi_disable(p_twi); - nrf_twi_enable(p_twi); - ret_code = NRF_ERROR_INTERNAL; - } - - } - return ret_code; -} - -static ret_code_t twi_rx_start_transfer(twi_control_block_t * p_cb, - NRF_TWI_Type * p_twi, - uint8_t const * p_data, - uint8_t length) -{ - ret_code_t ret_code = NRF_SUCCESS; - volatile int32_t hw_timeout; - - hw_timeout = HW_TIMEOUT; - - nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_STOPPED); - nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_ERROR); - nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_TXDSENT); - nrf_twi_event_clear(p_twi, NRF_TWI_EVENT_RXDREADY); - - p_cb->bytes_transferred = 0; - p_cb->error = false; - - if (length == 1) - { - nrf_twi_shorts_set(p_twi, NRF_TWI_SHORT_BB_STOP_MASK); - } - else - { - nrf_twi_shorts_set(p_twi, NRF_TWI_SHORT_BB_SUSPEND_MASK); - } - - /** - * 4/23/2018 Arm Mbed modification to Nordic SDK 14.2. - * Interrupts must be enabled before transmitting the first byte in asynchronous mode. - */ - if (p_cb->handler) - { - p_cb->int_mask = NRF_TWI_INT_STOPPED_MASK | - NRF_TWI_INT_ERROR_MASK | - NRF_TWI_INT_TXDSENT_MASK | - NRF_TWI_INT_RXDREADY_MASK; - nrf_twi_int_enable(p_twi, p_cb->int_mask); - } - - // In case TWI is suspended resume its operation. - nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_RESUME); - nrf_twi_task_trigger(p_twi, NRF_TWI_TASK_STARTRX); - - /** - * 4/23/2018 Arm Mbed modification to Nordic SDK 14.2. - * Interrupts must be enabled before transmitting the first byte in asynchronous mode. - */ - if (p_cb->handler == NULL) - { - while ((hw_timeout > 0) && - twi_transfer(p_twi, - &p_cb->error, - &p_cb->bytes_transferred, - (uint8_t*)p_data, - length, - false)) - { - hw_timeout--; - } - - if (p_cb->error) - { - uint32_t errorsrc = nrf_twi_errorsrc_get_and_clear(p_twi); - - if (errorsrc) - { - ret_code = twi_process_error(errorsrc); - } - } - if (hw_timeout <= 0) - { - nrf_twi_disable(p_twi); - nrf_twi_enable(p_twi); - ret_code = NRF_ERROR_INTERNAL; - } - } - return ret_code; -} - -__STATIC_INLINE ret_code_t twi_xfer(twi_control_block_t * p_cb, - NRF_TWI_Type * p_twi, - nrf_drv_twi_xfer_desc_t const * p_xfer_desc, - uint32_t flags) -{ - - ret_code_t err_code = NRF_SUCCESS; - - /* Block TWI interrupts to ensure that function is not interrupted by TWI interrupt. */ - nrf_twi_int_disable(p_twi, DISABLE_ALL_INT_SHORT); - - if (p_cb->busy) - { - nrf_twi_int_enable(p_twi, p_cb->int_mask); - err_code = NRF_ERROR_BUSY; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - else - { - p_cb->busy = (NRF_DRV_TWI_FLAG_NO_XFER_EVT_HANDLER & flags) ? false : true; - } - - if (flags & NRF_DRV_TWI_FLAG_HOLD_XFER) - { - err_code = NRF_ERROR_NOT_SUPPORTED; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - p_cb->flags = flags; - p_cb->xfer_desc = *p_xfer_desc; - p_cb->curr_length = p_xfer_desc->primary_length; - p_cb->p_curr_buf = p_xfer_desc->p_primary_buf; - nrf_twi_address_set(p_twi, p_xfer_desc->address); - - if (p_xfer_desc->type != NRF_DRV_TWI_XFER_RX) - { - p_cb->curr_no_stop = ((p_xfer_desc->type == NRF_DRV_TWI_XFER_TX) && - !(flags & NRF_DRV_TWI_FLAG_TX_NO_STOP)) ? false : true; - - err_code = twi_tx_start_transfer(p_cb, - p_twi, - p_xfer_desc->p_primary_buf, - p_xfer_desc->primary_length, - p_cb->curr_no_stop); - } - else - { - p_cb->curr_no_stop = false; - - err_code = twi_rx_start_transfer(p_cb, - p_twi, - p_xfer_desc->p_primary_buf, - p_xfer_desc->primary_length); - } - if (p_cb->handler == NULL) - { - p_cb->busy = false; - } - return err_code; -} -#endif - - -bool nrf_drv_twi_is_busy(nrf_drv_twi_t const * p_instance) -{ - twi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - return p_cb->busy; -} - - -#ifdef TWIM_IN_USE -__STATIC_INLINE void twim_list_enable_handle(NRF_TWIM_Type * p_twim, uint32_t flags) -{ - if (NRF_DRV_TWI_FLAG_TX_POSTINC & flags) - { - nrf_twim_tx_list_enable(p_twim); - } - else - { - nrf_twim_tx_list_disable(p_twim); - } - - if (NRF_DRV_TWI_FLAG_RX_POSTINC & flags) - { - nrf_twim_rx_list_enable(p_twim); - } - else - { - nrf_twim_rx_list_disable(p_twim); - } -} -__STATIC_INLINE ret_code_t twim_xfer(twi_control_block_t * p_cb, - NRF_TWIM_Type * p_twim, - nrf_drv_twi_xfer_desc_t const * p_xfer_desc, - uint32_t flags) -{ - ret_code_t err_code = NRF_SUCCESS; - nrf_twim_task_t start_task = NRF_TWIM_TASK_STARTTX; - nrf_twim_event_t evt_to_wait = NRF_TWIM_EVENT_STOPPED; - - if (!nrf_drv_is_in_RAM(p_xfer_desc->p_primary_buf)) - { - err_code = NRF_ERROR_INVALID_ADDR; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - /* Block TWI interrupts to ensure that function is not interrupted by TWI interrupt. */ - nrf_twim_int_disable(p_twim, DISABLE_ALL_INT_SHORT); - if (p_cb->busy) - { - nrf_twim_int_enable(p_twim, p_cb->int_mask); - err_code = NRF_ERROR_BUSY; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - else - { - p_cb->busy = ((NRF_DRV_TWI_FLAG_NO_XFER_EVT_HANDLER & flags) || - (NRF_DRV_TWI_FLAG_REPEATED_XFER & flags)) ? false: true; - } - - p_cb->xfer_desc = *p_xfer_desc; - p_cb->repeated = (flags & NRF_DRV_TWI_FLAG_REPEATED_XFER) ? true : false; - nrf_twim_address_set(p_twim, p_xfer_desc->address); - - nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_STOPPED); - nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_ERROR); - - twim_list_enable_handle(p_twim, flags); - switch (p_xfer_desc->type) - { - case NRF_DRV_TWI_XFER_TXTX: - ASSERT(!(flags & NRF_DRV_TWI_FLAG_REPEATED_XFER)); - ASSERT(!(flags & NRF_DRV_TWI_FLAG_HOLD_XFER)); - ASSERT(!(flags & NRF_DRV_TWI_FLAG_NO_XFER_EVT_HANDLER)); - if (!nrf_drv_is_in_RAM(p_xfer_desc->p_secondary_buf)) - { - err_code = NRF_ERROR_INVALID_ADDR; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - nrf_twim_shorts_set(p_twim, NRF_TWIM_SHORT_LASTTX_SUSPEND_MASK); - nrf_twim_tx_buffer_set(p_twim, p_xfer_desc->p_primary_buf, p_xfer_desc->primary_length); - nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_TXSTARTED); - nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_LASTTX); - nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_SUSPENDED); - nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_RESUME); - nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_STARTTX); - while (!nrf_twim_event_check(p_twim, NRF_TWIM_EVENT_TXSTARTED)) - {} - NRF_LOG_DEBUG("TWIM: Event: %s.", (uint32_t)EVT_TO_STR_TWIM(NRF_TWIM_EVENT_TXSTARTED)); - nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_TXSTARTED); - nrf_twim_tx_buffer_set(p_twim, p_xfer_desc->p_secondary_buf, p_xfer_desc->secondary_length); - p_cb->int_mask = NRF_TWIM_INT_SUSPENDED_MASK | NRF_TWIM_INT_ERROR_MASK; - break; - case NRF_DRV_TWI_XFER_TXRX: - nrf_twim_tx_buffer_set(p_twim, p_xfer_desc->p_primary_buf, p_xfer_desc->primary_length); - if (!nrf_drv_is_in_RAM(p_xfer_desc->p_secondary_buf)) - { - err_code = NRF_ERROR_INVALID_ADDR; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - nrf_twim_rx_buffer_set(p_twim, p_xfer_desc->p_secondary_buf, p_xfer_desc->secondary_length); - nrf_twim_shorts_set(p_twim, NRF_TWIM_SHORT_LASTTX_STARTRX_MASK | - NRF_TWIM_SHORT_LASTRX_STOP_MASK); - p_cb->int_mask = NRF_TWIM_INT_STOPPED_MASK | NRF_TWIM_INT_ERROR_MASK; - break; - case NRF_DRV_TWI_XFER_TX: - nrf_twim_tx_buffer_set(p_twim, p_xfer_desc->p_primary_buf, p_xfer_desc->primary_length); - if (NRF_DRV_TWI_FLAG_TX_NO_STOP & flags) - { - nrf_twim_shorts_set(p_twim, NRF_TWIM_SHORT_LASTTX_SUSPEND_MASK); - p_cb->int_mask = NRF_TWIM_INT_SUSPENDED_MASK | NRF_TWIM_INT_ERROR_MASK; - nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_SUSPENDED); - evt_to_wait = NRF_TWIM_EVENT_SUSPENDED; - } - else - { - nrf_twim_shorts_set(p_twim, NRF_TWIM_SHORT_LASTTX_STOP_MASK); - p_cb->int_mask = NRF_TWIM_INT_STOPPED_MASK | NRF_TWIM_INT_ERROR_MASK; - } - nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_RESUME); - break; - case NRF_DRV_TWI_XFER_RX: - nrf_twim_rx_buffer_set(p_twim, p_xfer_desc->p_primary_buf, p_xfer_desc->primary_length); - nrf_twim_shorts_set(p_twim, NRF_TWIM_SHORT_LASTRX_STOP_MASK); - p_cb->int_mask = NRF_TWIM_INT_STOPPED_MASK | NRF_TWIM_INT_ERROR_MASK; - start_task = NRF_TWIM_TASK_STARTRX; - nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_RESUME); - break; - default: - err_code = NRF_ERROR_INVALID_PARAM; - break; - } - - if (!(flags & NRF_DRV_TWI_FLAG_HOLD_XFER) && (p_xfer_desc->type != NRF_DRV_TWI_XFER_TXTX)) - { - nrf_twim_task_trigger(p_twim, start_task); - } - - if (p_cb->handler) - { - if (flags & NRF_DRV_TWI_FLAG_NO_XFER_EVT_HANDLER) - { - p_cb->int_mask = NRF_TWIM_INT_ERROR_MASK; - } - nrf_twim_int_enable(p_twim, p_cb->int_mask); - -#if NRF_MODULE_ENABLED(TWIM_NRF52_ANOMALY_109_WORKAROUND) - if ((flags & NRF_DRV_TWI_FLAG_HOLD_XFER) && ((p_xfer_desc->type == NRF_DRV_TWI_XFER_TX) || - (p_xfer_desc->type == NRF_DRV_TWI_XFER_TXRX))) - { - p_cb->flags = flags; - twim_list_enable_handle(p_twim, 0); - p_twim->FREQUENCY = 0; - nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_TXSTARTED); - nrf_twim_int_enable(p_twim, NRF_TWIM_INT_TXSTARTED_MASK); - } -#endif - } - else - { - while (!nrf_twim_event_check(p_twim, evt_to_wait)) - { - if (nrf_twim_event_check(p_twim, NRF_TWIM_EVENT_ERROR)) - { - NRF_LOG_DEBUG("TWIM: Event: %s.", - (uint32_t)EVT_TO_STR_TWIM(NRF_TWIM_EVENT_ERROR)); - nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_ERROR); - nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_RESUME); - nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_STOP); - evt_to_wait = NRF_TWIM_EVENT_STOPPED; - } - } - - uint32_t errorsrc = nrf_twim_errorsrc_get_and_clear(p_twim); - - p_cb->busy = false; - - if (errorsrc) - { - err_code = twi_process_error(errorsrc); - } - } - return err_code; -} -#endif - -ret_code_t nrf_drv_twi_xfer(nrf_drv_twi_t const * p_instance, - nrf_drv_twi_xfer_desc_t const * p_xfer_desc, - uint32_t flags) -{ - - ret_code_t err_code = NRF_SUCCESS; - twi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - - // TXRX and TXTX transfers are support only in non-blocking mode. - ASSERT( !((p_cb->handler == NULL) && (p_xfer_desc->type == NRF_DRV_TWI_XFER_TXRX))); - ASSERT( !((p_cb->handler == NULL) && (p_xfer_desc->type == NRF_DRV_TWI_XFER_TXTX))); - - NRF_LOG_INFO("Transfer type: %s.", (uint32_t)TRANSFER_TO_STR(p_xfer_desc->type)); - NRF_LOG_INFO("Transfer buffers length: primary: %d, secondary: %d.", - p_xfer_desc->primary_length, p_xfer_desc->secondary_length); - NRF_LOG_DEBUG("Primary buffer data:"); - NRF_LOG_HEXDUMP_DEBUG((uint8_t *)p_xfer_desc->p_primary_buf, - p_xfer_desc->primary_length * sizeof(p_xfer_desc->p_primary_buf[0])); - NRF_LOG_DEBUG("Secondary buffer data:"); - NRF_LOG_HEXDUMP_DEBUG((uint8_t *)p_xfer_desc->p_secondary_buf, - p_xfer_desc->secondary_length * sizeof(p_xfer_desc->p_secondary_buf[0])); - - CODE_FOR_TWIM - ( - - err_code = twim_xfer(p_cb, (NRF_TWIM_Type *)p_instance->reg.p_twim, p_xfer_desc, flags); - ) - CODE_FOR_TWI - ( - if ( (NRF_DRV_TWI_FLAG_TX_POSTINC | NRF_DRV_TWI_FLAG_RX_POSTINC) & flags) - { - err_code = NRF_ERROR_NOT_SUPPORTED; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - err_code = twi_xfer(p_cb, (NRF_TWI_Type *)p_instance->reg.p_twi, p_xfer_desc, flags); - ) - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - -ret_code_t nrf_drv_twi_tx(nrf_drv_twi_t const * p_instance, - uint8_t address, - uint8_t const * p_data, - uint8_t length, - bool no_stop) -{ - nrf_drv_twi_xfer_desc_t xfer = NRF_DRV_TWI_XFER_DESC_TX(address, (uint8_t*)p_data, length); - - return nrf_drv_twi_xfer(p_instance, &xfer, no_stop ? NRF_DRV_TWI_FLAG_TX_NO_STOP : 0); -} - -ret_code_t nrf_drv_twi_rx(nrf_drv_twi_t const * p_instance, - uint8_t address, - uint8_t * p_data, - uint8_t length) -{ - nrf_drv_twi_xfer_desc_t xfer = NRF_DRV_TWI_XFER_DESC_RX(address, p_data, length); - return nrf_drv_twi_xfer(p_instance, &xfer, 0); -} - -uint32_t nrf_drv_twi_data_count_get(nrf_drv_twi_t const * const p_instance) -{ - CODE_FOR_TWIM - ( - ASSERT(false); - return 0; - ) - CODE_FOR_TWI - ( - return m_cb[p_instance->drv_inst_idx].bytes_transferred; - ) -} - -uint32_t nrf_drv_twi_start_task_get(nrf_drv_twi_t const * p_instance, - nrf_drv_twi_xfer_type_t xfer_type) -{ - CODE_FOR_TWIM - ( - return (uint32_t)nrf_twim_task_address_get(p_instance->reg.p_twim, - (xfer_type != NRF_DRV_TWI_XFER_RX) ? NRF_TWIM_TASK_STARTTX : NRF_TWIM_TASK_STARTRX); - ) - CODE_FOR_TWI - ( - return (uint32_t)nrf_twi_task_address_get(p_instance->reg.p_twi, - (xfer_type != NRF_DRV_TWI_XFER_RX) ? NRF_TWI_TASK_STARTTX : NRF_TWI_TASK_STARTRX); - ) -} - -uint32_t nrf_drv_twi_stopped_event_get(nrf_drv_twi_t const * p_instance) -{ - CODE_FOR_TWIM - ( - return (uint32_t)nrf_twim_event_address_get(p_instance->reg.p_twim, NRF_TWIM_EVENT_STOPPED); - ) - CODE_FOR_TWI - ( - return (uint32_t)nrf_twi_event_address_get(p_instance->reg.p_twi, NRF_TWI_EVENT_STOPPED); - ) -} - -#ifdef TWIM_IN_USE -static void irq_handler_twim(NRF_TWIM_Type * p_twim, twi_control_block_t * p_cb) -{ - -#if NRF_MODULE_ENABLED(TWIM_NRF52_ANOMALY_109_WORKAROUND) - /* Handle only workaround case. Can be used without TWIM handler in IRQs. */ - if (nrf_twim_event_check(p_twim, NRF_TWIM_EVENT_TXSTARTED)) - { - nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_TXSTARTED); - nrf_twim_int_disable(p_twim, NRF_TWIM_INT_TXSTARTED_MASK); - if (p_twim->FREQUENCY == 0) - { - // Set enable to zero to reset TWIM internal state. - nrf_twim_disable(p_twim); - nrf_twim_enable(p_twim); - - // Set proper frequency. - nrf_twim_frequency_set(p_twim, p_cb->bus_frequency); - twim_list_enable_handle(p_twim, p_cb->flags); - - // Start proper transmission. - nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_STARTTX); - return; - } - } -#endif - - ASSERT(p_cb->handler); - - if (nrf_twim_event_check(p_twim, NRF_TWIM_EVENT_ERROR)) - { - nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_ERROR); - NRF_LOG_DEBUG("TWIM: Event: %s.", (uint32_t)EVT_TO_STR_TWIM(NRF_TWIM_EVENT_ERROR)); - if (!nrf_twim_event_check(p_twim, NRF_TWIM_EVENT_STOPPED)) - { - nrf_twim_int_disable(p_twim, p_cb->int_mask); - p_cb->int_mask = NRF_TWIM_INT_STOPPED_MASK; - nrf_twim_int_enable(p_twim, p_cb->int_mask); - - nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_RESUME); - nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_STOP); - return; - } - } - - nrf_drv_twi_evt_t event; - - if (nrf_twim_event_check(p_twim, NRF_TWIM_EVENT_STOPPED)) - { - NRF_LOG_DEBUG("TWIM: Event: %s.", (uint32_t)EVT_TO_STR_TWIM(NRF_TWIM_EVENT_STOPPED)); - nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_STOPPED); - event.xfer_desc = p_cb->xfer_desc; - if (p_cb->error) - { - - event.xfer_desc.primary_length = (p_cb->xfer_desc.type == NRF_DRV_TWI_XFER_RX) ? - (uint8_t)nrf_twim_rxd_amount_get(p_twim) : (uint8_t)nrf_twim_txd_amount_get(p_twim); - event.xfer_desc.secondary_length = (p_cb->xfer_desc.type == NRF_DRV_TWI_XFER_TXRX) ? - (uint8_t)nrf_twim_rxd_amount_get(p_twim) : (uint8_t)nrf_twim_txd_amount_get(p_twim); - - } - nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_LASTTX); - nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_LASTRX); - if (!p_cb->repeated || p_cb->error) - { - nrf_twim_shorts_set(p_twim, 0); - p_cb->int_mask = 0; - nrf_twim_int_disable(p_twim, DISABLE_ALL_INT_SHORT); - } - } - else - { - nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_SUSPENDED); - NRF_LOG_DEBUG("TWIM: Event: %s.", (uint32_t)EVT_TO_STR_TWIM(NRF_TWIM_EVENT_SUSPENDED)); - if (p_cb->xfer_desc.type == NRF_DRV_TWI_XFER_TX) - { - event.xfer_desc = p_cb->xfer_desc; - if (!p_cb->repeated) - { - nrf_twim_shorts_set(p_twim, 0); - p_cb->int_mask = 0; - nrf_twim_int_disable(p_twim, DISABLE_ALL_INT_SHORT); - } - } - else - { - nrf_twim_shorts_set(p_twim, NRF_TWIM_SHORT_LASTTX_STOP_MASK); - p_cb->int_mask = NRF_TWIM_INT_STOPPED_MASK | NRF_TWIM_INT_ERROR_MASK; - nrf_twim_int_disable(p_twim, DISABLE_ALL_INT_SHORT); - nrf_twim_int_enable(p_twim, p_cb->int_mask); - nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_STARTTX); - nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_RESUME); - return; - } - } - - uint32_t errorsrc = nrf_twim_errorsrc_get_and_clear(p_twim); - if (errorsrc & NRF_TWIM_ERROR_ADDRESS_NACK) - { - event.type = NRF_DRV_TWI_EVT_ADDRESS_NACK; - NRF_LOG_DEBUG("Event: %s.", (uint32_t)EVT_TO_STR(NRF_DRV_TWI_EVT_ADDRESS_NACK)); - } - else if (errorsrc & NRF_TWIM_ERROR_DATA_NACK) - { - event.type = NRF_DRV_TWI_EVT_DATA_NACK; - NRF_LOG_DEBUG("Event: %s.", (uint32_t)EVT_TO_STR(NRF_DRV_TWI_EVT_DATA_NACK)); - } - else - { - event.type = NRF_DRV_TWI_EVT_DONE; - NRF_LOG_DEBUG("Event: %s.", (uint32_t)EVT_TO_STR(NRF_DRV_TWI_EVT_DONE)); - } - - if (!p_cb->repeated) - { - p_cb->busy = false; - } - p_cb->handler(&event, p_cb->p_context); -} -#endif // TWIM_IN_USE - -#ifdef TWI_IN_USE -static void irq_handler_twi(NRF_TWI_Type * p_twi, twi_control_block_t * p_cb) -{ - ASSERT(p_cb->handler); - - if (twi_transfer(p_twi, - &p_cb->error, - &p_cb->bytes_transferred, - p_cb->p_curr_buf, - p_cb->curr_length, - p_cb->curr_no_stop )) - { - return; - } - - if (!p_cb->error && - ((p_cb->xfer_desc.type == NRF_DRV_TWI_XFER_TXRX) || - (p_cb->xfer_desc.type == NRF_DRV_TWI_XFER_TXTX)) && - p_cb->p_curr_buf == p_cb->xfer_desc.p_primary_buf) - { - p_cb->p_curr_buf = p_cb->xfer_desc.p_secondary_buf; - p_cb->curr_length = p_cb->xfer_desc.secondary_length; - p_cb->curr_no_stop = (p_cb->flags & NRF_DRV_TWI_FLAG_TX_NO_STOP); - - if (p_cb->xfer_desc.type == NRF_DRV_TWI_XFER_TXTX) - { - (void)twi_tx_start_transfer(p_cb, - p_twi, - p_cb->p_curr_buf, - p_cb->curr_length, - p_cb->curr_no_stop); - } - else - { - (void)twi_rx_start_transfer(p_cb, p_twi, p_cb->p_curr_buf, p_cb->curr_length); - } - } - else - { - nrf_drv_twi_evt_t event; - event.xfer_desc = p_cb->xfer_desc; - - if (p_cb->error) - { - uint32_t errorsrc = nrf_twi_errorsrc_get_and_clear(p_twi); - if (errorsrc & NRF_TWI_ERROR_ADDRESS_NACK) - { - event.type = NRF_DRV_TWI_EVT_ADDRESS_NACK; - NRF_LOG_DEBUG("Event: %s.", (uint32_t)EVT_TO_STR(NRF_DRV_TWI_EVT_ADDRESS_NACK)); - } - else if (errorsrc & NRF_TWI_ERROR_DATA_NACK) - { - event.type = NRF_DRV_TWI_EVT_DATA_NACK; - NRF_LOG_DEBUG("Event: %s.", (uint32_t)EVT_TO_STR(NRF_DRV_TWI_EVT_DATA_NACK)); - } - } - else - { - event.type = NRF_DRV_TWI_EVT_DONE; - NRF_LOG_DEBUG("Event: %s.", (uint32_t)EVT_TO_STR(NRF_DRV_TWI_EVT_DONE)); - } - - p_cb->busy = false; - - if (!(NRF_DRV_TWI_FLAG_NO_XFER_EVT_HANDLER & p_cb->flags)) - { - p_cb->handler(&event, p_cb->p_context); - } - } - -} -#endif // TWI_IN_USE - -#if NRF_MODULE_ENABLED(TWI0) -IRQ_HANDLER(0) -{ - #if (TWIM_ONLY || TWI0_WITH_DMA) - irq_handler_twim(NRF_TWIM0, - #else - irq_handler_twi(NRF_TWI0, - #endif - &m_cb[TWI0_INSTANCE_INDEX]); -} -#endif // NRF_MODULE_ENABLED(TWI0) - -#if NRF_MODULE_ENABLED(TWI1) -IRQ_HANDLER(1) -{ - #if (TWIM_ONLY || TWI1_WITH_DMA) - irq_handler_twim(NRF_TWIM1, - #else - irq_handler_twi(NRF_TWI1, - #endif - &m_cb[TWI1_INSTANCE_INDEX]); -} -#endif // NRF_MODULE_ENABLED(TWI1) -#endif // TWI_COUNT -/*lint -restore*/ -#endif // NRF_MODULE_ENABLED(TWI) - diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/twi_master/nrf_drv_twi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/twi_master/nrf_drv_twi.h deleted file mode 100644 index 0a73c88d96d..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/twi_master/nrf_drv_twi.h +++ /dev/null @@ -1,497 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/**@file - * @addtogroup nrf_twi Two Wire master interface (TWI/TWIM) - * @ingroup nrf_drivers - * @brief Two Wire master interface (TWI/TWIM) APIs. - * - * - * @defgroup nrf_drv_twi TWI driver - * @{ - * @ingroup nrf_twi - * @brief TWI master APIs. - */ -#ifndef NRF_DRV_TWI_H__ -#define NRF_DRV_TWI_H__ - -#include "sdk_common.h" -#include "nrf_peripherals.h" - -#ifdef TWI0_ENABLED -#define TWI0_INCR TWI0_ENABLED -#else -#define TWI0_INCR 0 -#endif - -#ifdef TWI1_ENABLED -#define TWI1_INCR TWI1_ENABLED -#else -#define TWI1_INCR 0 -#endif - -#define ENABLED_TWI_COUNT (TWI0_INCR + TWI1_INCR) - -#define TWIM_ONLY ( defined(TWIM_PRESENT) && !defined(TWI_PRESENT)) -#define TWI_TWIM_PRESENT ( defined(TWIM_PRESENT) && defined(TWI_PRESENT)) -#define TWI_ONLY (!defined(TWIM_PRESENT) && defined(TWI_PRESENT)) - -#define TWI0_WITH_DMA (defined(TWI0_USE_EASY_DMA) && TWI0_USE_EASY_DMA && TWI0_ENABLED) -#define TWI1_WITH_DMA (defined(TWI1_USE_EASY_DMA) && TWI1_USE_EASY_DMA && TWI1_ENABLED) - -#define TWI0_WITHOUT_DMA (defined(TWI0_USE_EASY_DMA) && !TWI0_USE_EASY_DMA && TWI0_ENABLED) -#define TWI1_WITHOUT_DMA (defined(TWI1_USE_EASY_DMA) && !TWI1_USE_EASY_DMA && TWI1_ENABLED) - -// suppress: non-standard use of 'defined' preprocessor operator -/*lint -save -e491*/ -// Too complex macros for Doxygen -// This set of macros makes it possible to exclude parts of code when one type -// of supported peripherals is not used. -#ifndef DOXYGEN - -#if (TWI_ONLY && ENABLED_TWI_COUNT) || \ - ((TWI_TWIM_PRESENT) && (TWI0_WITHOUT_DMA || TWI1_WITHOUT_DMA)) -#define TWI_IN_USE 1 -#endif - -#if (TWIM_ONLY && ENABLED_TWI_COUNT) || \ - ((TWI_TWIM_PRESENT) && (TWI0_WITH_DMA || TWI1_WITH_DMA)) -#define TWIM_IN_USE 1 -#endif - -#endif // DOXYGEN - -#ifdef TWI_PRESENT - #include "nrf_twi.h" -#endif - -#ifdef TWIM_PRESENT - #include "nrf_twim.h" -#endif - -#include "sdk_errors.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#if defined(TWIM_IN_USE) && defined(TWI_IN_USE) - #define NRF_DRV_TWI_PERIPHERAL(id) \ - (CONCAT_3(TWI, id, _USE_EASY_DMA) == 1 ? \ - (void *)CONCAT_2(NRF_TWIM, id) \ - : (void *)CONCAT_2(NRF_TWI, id)) -#elif defined(TWIM_IN_USE) && !defined(TWI_IN_USE) - #define NRF_DRV_TWI_PERIPHERAL(id) (void *)CONCAT_2(NRF_TWIM, id) -#else - #define NRF_DRV_TWI_PERIPHERAL(id) (void *)CONCAT_2(NRF_TWI, id) -#endif - -#ifndef TWI_PRESENT -typedef nrf_twim_frequency_t nrf_twi_frequency_t; -typedef nrf_twim_error_t nrf_twi_error_t; -#endif - -/** - * @brief Structure for the TWI master driver instance. - */ -typedef struct -{ - union - { -#ifdef TWIM_IN_USE - NRF_TWIM_Type * p_twim; ///< Pointer to a structure with TWIM registers. -#endif -#ifdef TWI_IN_USE - NRF_TWI_Type * p_twi; ///< Pointer to a structure with TWI registers. -#endif - void * p_regs; - } reg; - uint8_t drv_inst_idx; ///< Driver instance index. - bool use_easy_dma; ///< True if the peripheral with EasyDMA (TWIM) shall be used. -} nrf_drv_twi_t; - -#define TWI0_INSTANCE_INDEX 0 -#define TWI1_INSTANCE_INDEX TWI0_INSTANCE_INDEX+TWI0_INCR - -#ifndef DOXYGEN -#if defined(TWIM_IN_USE) - #if TWIM_ONLY - #define TWI_USE_EASY_DMA(_id) true - #else - #define TWI_USE_EASY_DMA(_id) CONCAT_3(TWI, _id, _USE_EASY_DMA) - #endif -#else - #define TWI_USE_EASY_DMA(_id) false -#endif -#endif // DOXYGEN - -/** - * @brief Macro for creating a TWI master driver instance. - */ -#define NRF_DRV_TWI_INSTANCE(id) \ -{ \ - .reg = {NRF_DRV_TWI_PERIPHERAL(id)}, \ - .drv_inst_idx = CONCAT_3(TWI, id, _INSTANCE_INDEX), \ - .use_easy_dma = TWI_USE_EASY_DMA(id) \ -} - -/** - * @brief Structure for the TWI master driver instance configuration. - */ -typedef struct -{ - uint32_t scl; ///< SCL pin number. - uint32_t sda; ///< SDA pin number. - nrf_twi_frequency_t frequency; ///< TWI frequency. - uint8_t interrupt_priority; ///< Interrupt priority. - bool clear_bus_init; ///< Clear bus during init. - bool hold_bus_uninit; ///< Hold pull up state on gpio pins after uninit. -} nrf_drv_twi_config_t; - -/** - * @brief TWI master driver instance default configuration. - */ -#define NRF_DRV_TWI_DEFAULT_CONFIG \ -{ \ - .frequency = (nrf_twi_frequency_t)TWI_DEFAULT_CONFIG_FREQUENCY, \ - .scl = 31, \ - .sda = 31, \ - .interrupt_priority = TWI_DEFAULT_CONFIG_IRQ_PRIORITY, \ - .clear_bus_init = TWI_DEFAULT_CONFIG_CLR_BUS_INIT, \ - .hold_bus_uninit = TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT, \ -} - -#define NRF_DRV_TWI_FLAG_TX_POSTINC (1UL << 0) /**< TX buffer address incremented after transfer. */ -#define NRF_DRV_TWI_FLAG_RX_POSTINC (1UL << 1) /**< RX buffer address incremented after transfer. */ -#define NRF_DRV_TWI_FLAG_NO_XFER_EVT_HANDLER (1UL << 2) /**< Interrupt after each transfer is suppressed, and the event handler is not called. */ -#define NRF_DRV_TWI_FLAG_HOLD_XFER (1UL << 3) /**< Set up the transfer but do not start it. */ -#define NRF_DRV_TWI_FLAG_REPEATED_XFER (1UL << 4) /**< Flag indicating that the transfer will be executed multiple times. */ -#define NRF_DRV_TWI_FLAG_TX_NO_STOP (1UL << 5) /**< Flag indicating that the TX transfer will not end with a stop condition. */ - -/** - * @brief TWI master driver event types. - */ -typedef enum -{ - NRF_DRV_TWI_EVT_DONE, ///< Transfer completed event. - NRF_DRV_TWI_EVT_ADDRESS_NACK, ///< Error event: NACK received after sending the address. - NRF_DRV_TWI_EVT_DATA_NACK ///< Error event: NACK received after sending a data byte. -} nrf_drv_twi_evt_type_t; - -/** - * @brief TWI master driver transfer types. - */ -typedef enum -{ - NRF_DRV_TWI_XFER_TX, ///< TX transfer. - NRF_DRV_TWI_XFER_RX, ///< RX transfer. - NRF_DRV_TWI_XFER_TXRX, ///< TX transfer followed by RX transfer with repeated start. - NRF_DRV_TWI_XFER_TXTX ///< TX transfer followed by TX transfer with repeated start. -} nrf_drv_twi_xfer_type_t; - -/** - * @brief Structure for a TWI transfer descriptor. - */ -typedef struct -{ - nrf_drv_twi_xfer_type_t type; ///< Type of transfer. - uint8_t address; ///< Slave address. - uint8_t primary_length; ///< Number of bytes transferred. - uint8_t secondary_length; ///< Number of bytes transferred. - uint8_t * p_primary_buf; ///< Pointer to transferred data. - uint8_t * p_secondary_buf; ///< Pointer to transferred data. -} nrf_drv_twi_xfer_desc_t; - - -/**@brief Macro for setting the TX transfer descriptor. */ -#define NRF_DRV_TWI_XFER_DESC_TX(addr, p_data, length) \ - { \ - .type = NRF_DRV_TWI_XFER_TX, \ - .address = addr, \ - .primary_length = length, \ - .p_primary_buf = p_data, \ - } - -/**@brief Macro for setting the RX transfer descriptor. */ -#define NRF_DRV_TWI_XFER_DESC_RX(addr, p_data, length) \ - { \ - .type = NRF_DRV_TWI_XFER_RX, \ - .address = addr, \ - .primary_length = length, \ - .p_primary_buf = p_data, \ - } - -/**@brief Macro for setting the TXRX transfer descriptor. */ -#define NRF_DRV_TWI_XFER_DESC_TXRX(addr, p_tx, tx_len, p_rx, rx_len) \ - { \ - .type = NRF_DRV_TWI_XFER_TXRX, \ - .address = addr, \ - .primary_length = tx_len, \ - .secondary_length = rx_len, \ - .p_primary_buf = p_tx, \ - .p_secondary_buf = p_rx, \ - } - -/**@brief Macro for setting the TXTX transfer descriptor. */ -#define NRF_DRV_TWI_XFER_DESC_TXTX(addr, p_tx, tx_len, p_tx2, tx_len2) \ - { \ - .type = NRF_DRV_TWI_XFER_TXTX, \ - .address = addr, \ - .primary_length = tx_len, \ - .secondary_length = tx_len2, \ - .p_primary_buf = p_tx, \ - .p_secondary_buf = p_tx2, \ - } - -/** - * @brief Structure for a TWI event. - */ -typedef struct -{ - nrf_drv_twi_evt_type_t type; ///< Event type. - nrf_drv_twi_xfer_desc_t xfer_desc; ///< Transfer details. -} nrf_drv_twi_evt_t; - -/** - * @brief TWI event handler prototype. - */ -typedef void (* nrf_drv_twi_evt_handler_t)(nrf_drv_twi_evt_t const * p_event, - void * p_context); - -/** - * @brief Function for initializing the TWI driver instance. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] p_config Initial configuration. - * @param[in] event_handler Event handler provided by the user. If NULL, blocking mode is enabled. - * @param[in] p_context Context passed to event handler. - * - * @retval NRF_SUCCESS If initialization was successful. - * @retval NRF_ERROR_INVALID_STATE If the driver is in invalid state. - * @retval NRF_ERROR_BUSY If some other peripheral with the same - * instance ID is already in use. This is - * possible only if PERIPHERAL_RESOURCE_SHARING_ENABLED - * is set to a value other than zero. - */ -ret_code_t nrf_drv_twi_init(nrf_drv_twi_t const * p_instance, - nrf_drv_twi_config_t const * p_config, - nrf_drv_twi_evt_handler_t event_handler, - void * p_context); - -/** - * @brief Function for uninitializing the TWI instance. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -void nrf_drv_twi_uninit(nrf_drv_twi_t const * p_instance); - -/** - * @brief Function for enabling the TWI instance. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -void nrf_drv_twi_enable(nrf_drv_twi_t const * p_instance); - -/** - * @brief Function for disabling the TWI instance. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -void nrf_drv_twi_disable(nrf_drv_twi_t const * p_instance); - -/** - * @brief Function for sending data to a TWI slave. - * - * The transmission will be stopped when an error occurs. If a transfer is ongoing, - * the function returns the error code @ref NRF_ERROR_BUSY. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] address Address of a specific slave device (only 7 LSB). - * @param[in] p_data Pointer to a transmit buffer. - * @param[in] length Number of bytes to send. - * @param[in] no_stop If set, the stop condition is not generated on the bus - * after the transfer has completed successfully (allowing - * for a repeated start in the next transfer). - * - * @retval NRF_SUCCESS If the procedure was successful. - * @retval NRF_ERROR_BUSY If the driver is not ready for a new transfer. - * @retval NRF_ERROR_INTERNAL If an error was detected by hardware. - * @retval NRF_ERROR_INVALID_ADDR If the EasyDMA is used and memory adress in not in RAM. - * @retval NRF_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address in polling mode. - * @retval NRF_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte in polling mode. - */ -ret_code_t nrf_drv_twi_tx(nrf_drv_twi_t const * p_instance, - uint8_t address, - uint8_t const * p_data, - uint8_t length, - bool no_stop); - -/** - * @brief Function for reading data from a TWI slave. - * - * The transmission will be stopped when an error occurs. If a transfer is ongoing, - * the function returns the error code @ref NRF_ERROR_BUSY. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] address Address of a specific slave device (only 7 LSB). - * @param[in] p_data Pointer to a receive buffer. - * @param[in] length Number of bytes to be received. - * - * @retval NRF_SUCCESS If the procedure was successful. - * @retval NRF_ERROR_BUSY If the driver is not ready for a new transfer. - * @retval NRF_ERROR_INTERNAL If an error was detected by hardware. - * @retval NRF_ERROR_DRV_TWI_ERR_OVERRUN If the unread data was replaced by new data - * @retval NRF_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address in polling mode. - * @retval NRF_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte in polling mode. - */ -ret_code_t nrf_drv_twi_rx(nrf_drv_twi_t const * p_instance, - uint8_t address, - uint8_t * p_data, - uint8_t length); - -/** - * @brief Function for preparing a TWI transfer. - * - * The following transfer types can be configured (@ref nrf_drv_twi_xfer_desc_t::type): - * - @ref NRF_DRV_TWI_XFER_TXRX: Write operation followed by a read operation (without STOP condition in between). - * - @ref NRF_DRV_TWI_XFER_TXTX: Write operation followed by a write operation (without STOP condition in between). - * - @ref NRF_DRV_TWI_XFER_TX: Write operation (with or without STOP condition). - * - @ref NRF_DRV_TWI_XFER_RX: Read operation (with STOP condition). - * - * Additional options are provided using the flags parameter: - * - @ref NRF_DRV_TWI_FLAG_TX_POSTINC and @ref NRF_DRV_TWI_FLAG_RX_POSTINC: Post-incrementation of buffer addresses. Supported only by TWIM. - * - @ref NRF_DRV_TWI_FLAG_NO_XFER_EVT_HANDLER: No user event handler after transfer completion. In most cases, this also means no interrupt at the end of the transfer. - * - @ref NRF_DRV_TWI_FLAG_HOLD_XFER: Driver is not starting the transfer. Use this flag if the transfer is triggered externally by PPI. Supported only by TWIM. - * Use @ref nrf_drv_twi_start_task_get to get the address of the start task. - * - @ref NRF_DRV_TWI_FLAG_REPEATED_XFER: Prepare for repeated transfers. You can set up a number of transfers that will be triggered externally (for example by PPI). - * An example is a TXRX transfer with the options @ref NRF_DRV_TWI_FLAG_RX_POSTINC, @ref NRF_DRV_TWI_FLAG_NO_XFER_EVT_HANDLER, and @ref NRF_DRV_TWI_FLAG_REPEATED_XFER. - * After the transfer is set up, a set of transfers can be triggered by PPI that will read, for example, the same register of an - * external component and put it into a RAM buffer without any interrupts. @ref nrf_drv_twi_stopped_event_get can be used to get the - * address of the STOPPED event, which can be used to count the number of transfers. If @ref NRF_DRV_TWI_FLAG_REPEATED_XFER is used, - * the driver does not set the driver instance into busy state, so you must ensure that the next transfers are set up - * when TWIM is not active. Supported only by TWIM. - * - @ref NRF_DRV_TWI_FLAG_TX_NO_STOP: No stop condition after TX transfer. - * - * @note - * Some flag combinations are invalid: - * - @ref NRF_DRV_TWI_FLAG_TX_NO_STOP with @ref nrf_drv_twi_xfer_desc_t::type different than @ref NRF_DRV_TWI_XFER_TX - * - @ref NRF_DRV_TWI_FLAG_REPEATED_XFER with @ref nrf_drv_twi_xfer_desc_t::type set to @ref NRF_DRV_TWI_XFER_TXTX - * - * If @ref nrf_drv_twi_xfer_desc_t::type is set to @ref NRF_DRV_TWI_XFER_TX and the @ref NRF_DRV_TWI_FLAG_TX_NO_STOP and @ref NRF_DRV_TWI_FLAG_REPEATED_XFER - * flags are set, two tasks must be used to trigger a transfer: TASKS_RESUME followed by TASKS_STARTTX. If no stop condition is generated, - * TWIM is in SUSPENDED state. Therefore, it must be resumed before the transfer can be started. - * - * @note - * This function should be used only if the instance is configured to work in non-blocking mode. If the function is used in blocking mode, the driver asserts. - * @note If you are using this function with TWI, the only supported flag is @ref NRF_DRV_TWI_FLAG_TX_NO_STOP. All other flags require TWIM. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] p_xfer_desc Pointer to the transfer descriptor. - * @param[in] flags Transfer options (0 for default settings). - * - * @retval NRF_SUCCESS If the procedure was successful. - * @retval NRF_ERROR_BUSY If the driver is not ready for a new transfer. - * @retval NRF_ERROR_NOT_SUPPORTED If the provided parameters are not supported. - * @retval NRF_ERROR_INTERNAL If an error was detected by hardware. - * @retval NRF_ERROR_INVALID_ADDR If the EasyDMA is used and memory adress in not in RAM - * @retval NRF_ERROR_DRV_TWI_ERR_OVERRUN If the unread data was replaced by new data (TXRX and RX) - * @retval NRF_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address. - * @retval NRF_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte. - */ -ret_code_t nrf_drv_twi_xfer(nrf_drv_twi_t const * p_instance, - nrf_drv_twi_xfer_desc_t const * p_xfer_desc, - uint32_t flags); - -/** - * @brief Function for checking the TWI driver state. - * - * @param[in] p_instance TWI instance. - * - * @retval true If the TWI driver is currently busy performing a transfer. - * @retval false If the TWI driver is ready for a new transfer. - */ -bool nrf_drv_twi_is_busy(nrf_drv_twi_t const * p_instance); - -/** - * @brief Function for getting the transferred data count. - * - * This function provides valid results only in legacy mode. - * - * @param[in] p_instance Pointer to the driver instance structure. - * - * @return Data count. - */ -uint32_t nrf_drv_twi_data_count_get(nrf_drv_twi_t const * const p_instance); - -/** - * @brief Function for returning the address of a TWI/TWIM start task. - * - * This function should be used if @ref nrf_drv_twi_xfer was called with the flag @ref NRF_DRV_TWI_FLAG_HOLD_XFER. - * In that case, the transfer is not started by the driver, but it must be started externally by PPI. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] xfer_type Transfer type used in the last call of the @ref nrf_drv_twi_xfer function. - * - * @return Start task address (TX or RX) depending on the value of xfer_type. - */ -uint32_t nrf_drv_twi_start_task_get(nrf_drv_twi_t const * p_instance, nrf_drv_twi_xfer_type_t xfer_type); - -/** - * @brief Function for returning the address of a STOPPED TWI/TWIM event. - * - * A STOPPED event can be used to detect the end of a transfer if the @ref NRF_DRV_TWI_FLAG_NO_XFER_EVT_HANDLER - * option is used. - * - * @param[in] p_instance Pointer to the driver instance structure. - * - * @return STOPPED event address. - */ -uint32_t nrf_drv_twi_stopped_event_get(nrf_drv_twi_t const * p_instance); -/** - *@} - **/ - -/*lint -restore*/ - -#ifdef __cplusplus -} -#endif - -#endif // NRF_DRV_TWI_H__ - diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/twis_slave/nrf_drv_twis.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/twis_slave/nrf_drv_twis.c deleted file mode 100644 index d06dec9bcd8..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/twis_slave/nrf_drv_twis.c +++ /dev/null @@ -1,977 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(TWIS) -#include "nrf_drv_twis.h" -#if ENABLED_TWIS_COUNT -#include "nrf_assert.h" -#include "app_util_platform.h" -#include "compiler_abstraction.h" - -#define NRF_LOG_MODULE_NAME twis - -#if TWIS_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL TWIS_CONFIG_LOG_LEVEL -#define NRF_LOG_INFO_COLOR TWIS_CONFIG_INFO_COLOR -#define NRF_LOG_DEBUG_COLOR TWIS_CONFIG_DEBUG_COLOR -#define EVT_TO_STR(event) (event == NRF_TWIS_EVENT_STOPPED ? "NRF_TWIS_EVENT_STOPPED" : \ - (event == NRF_TWIS_EVENT_ERROR ? "NRF_TWIS_EVENT_ERROR" : \ - (event == NRF_TWIS_EVENT_RXSTARTED ? "NRF_TWIS_EVENT_RXSTARTED" : \ - (event == NRF_TWIS_EVENT_TXSTARTED ? "NRF_TWIS_EVENT_TXSTARTED" : \ - (event == NRF_TWIS_EVENT_WRITE ? "NRF_TWIS_EVENT_WRITE" : \ - (event == NRF_TWIS_EVENT_READ ? "NRF_TWIS_EVENT_READ" : "UNKNOWN EVENT")))))) -#else //TWIS_CONFIG_LOG_ENABLED -#define EVT_TO_STR(event) "" -#define NRF_LOG_LEVEL 0 -#endif //TWIS_CONFIG_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - -/** - * @internal - * @ingroup lib_twis_drv - * @defgroup lib_twis_drv_ivars Software controlled TWI Slave internal variables - * - * Internal variables for TWIS. - * @{ - */ - -/** - * @brief Actual state of internal state machine - * - * Current substate of powered on state. - */ -typedef enum -{ - NRF_DRV_TWIS_SUBSTATE_IDLE, ///< No ongoing transmission - NRF_DRV_TWIS_SUBSTATE_READ_WAITING, ///< Read request received, waiting for data - NRF_DRV_TWIS_SUBSTATE_READ_PENDING, ///< Reading is actually pending (data sending) - NRF_DRV_TWIS_SUBSTATE_WRITE_WAITING, ///< Write request received, waiting for data buffer - NRF_DRV_TWIS_SUBSTATE_WRITE_PENDING, ///< Writing is actually pending (data receiving) -}nrf_drv_twis_substate_t; - -/** - * @brief Constant instance part - * - * Instance data that have not to change. - * It may be placed in FLASH memory. - */ -typedef struct -{ - NRF_TWIS_Type * const p_reg; ///< Peripheral registry address -} nrf_drv_twis_const_inst_t; - -/** - * @brief Variable instance part - * - * There are all informations for the instance that may change. - */ -typedef struct -{ - nrf_drv_state_t state; ///< Actual driver state - volatile nrf_drv_twis_substate_t substate; ///< Actual driver substate - nrf_drv_twis_event_handler_t ev_handler; ///< Event handler functiomn - volatile uint32_t error; ///< Internal error flags - /**< Internal copy of hardware errors flags merged - * with specific internal driver errors flags. - * - * @note This value can be changed in the interrupt - * and cleared in the main program. - * Always use Atomic load-store when updating - * this value in main loop. - */ -}nrf_drv_twis_var_inst_t; - - -/** The constant instance part implementation */ -static const nrf_drv_twis_const_inst_t m_const_inst[ENABLED_TWIS_COUNT] = -{ - #define X(n) { .p_reg = NRF_TWIS##n }, - #include "nrf_drv_twis_inst.def" -}; - -/** The variable instance part implementation */ -static nrf_drv_twis_var_inst_t m_var_inst[ENABLED_TWIS_COUNT] = -{ - #define X(n) { .state = NRF_DRV_STATE_UNINITIALIZED, \ - .substate = NRF_DRV_TWIS_SUBSTATE_IDLE, \ - .ev_handler = NULL, \ - .error = 0 }, - #include "nrf_drv_twis_inst.def" -}; - -#if NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - #define IRQ_HANDLER_NAME(n) irq_handler_for_instance_##n - #define IRQ_HANDLER(n) static void IRQ_HANDLER_NAME(n)(void) - - #if NRF_MODULE_ENABLED(TWIS0) - IRQ_HANDLER(0); - #endif - #if NRF_MODULE_ENABLED(TWIS1) - IRQ_HANDLER(1); - #endif - static nrf_drv_irq_handler_t const m_irq_handlers[ENABLED_TWIS_COUNT] = { - #if NRF_MODULE_ENABLED(TWIS0) - IRQ_HANDLER_NAME(0), - #endif - #if NRF_MODULE_ENABLED(TWIS1) - IRQ_HANDLER_NAME(1), - #endif - }; -#else - #if defined (NRF52810_XXAA) - #define IRQ_HANDLER(n) void TWIM##n##_TWIS##n##_IRQHandler(void) - #else - #define IRQ_HANDLER(n) \ - void SPIM##n##_SPIS##n##_TWIM##n##_TWIS##n##_SPI##n##_TWI##n##_IRQHandler(void) - #endif -#endif // NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - -/** - * @brief State processing semaphore - * - * There are semaphores used when when working in synchronous mode (without interrupts activated). - * @note - * In synchronous mode before every state checking the state machine is executed. - * But the situation where state checking function is called from main task and in the same from - * interrupt task has to be considered. - * In such a situation the @ref nrf_drv_twis_state_machine function may be interrupted by second - * call to the same function. - * If in this second call any event will be detected it may be lost because new substate would be - * overwritten when interrupted function finishes. - * In the same time information about event would be lost because it is cleared in interrupting - * function. - * @note - * To make situation described above safe, simple semaphore is implemented. - * It is just a binary flag that informs that state machine is actually executing and should not - * be processed in any interrupting function. - * Because of how it is used no atomic instructions are required to support this kind of semaphore. - * It is not waitable semaphore - function executed or not depending of its state. - */ -static uint8_t m_sm_semaphore[ENABLED_TWIS_COUNT]; - -/** - * @brief Used interrupts mask - * - * Mask for all interrupts used by this library - */ -static const uint32_t m_used_ints_mask = - NRF_TWIS_INT_STOPPED_MASK | - NRF_TWIS_INT_ERROR_MASK | - NRF_TWIS_INT_RXSTARTED_MASK | - NRF_TWIS_INT_TXSTARTED_MASK | - NRF_TWIS_INT_WRITE_MASK | - NRF_TWIS_INT_READ_MASK; - - -/** @} */ /* End of lib_driver_twis_slave_ivars */ - -/** - * @internal - * @ingroup lib_twis_drv - * @defgroup lib_twis_drv_ifunc Software controlled TWI Slave auxiliary internal functions - * - * Internal variables for TWIS. - * @{ - */ - -/** - * @brief Clear all events - * - * Function clears all actually pending events - */ -static void nrf_drv_twis_clear_all_events(NRF_TWIS_Type * const p_reg) -{ - /* Clear all events */ - nrf_twis_event_clear(p_reg, NRF_TWIS_EVENT_STOPPED); - nrf_twis_event_clear(p_reg, NRF_TWIS_EVENT_ERROR); - nrf_twis_event_clear(p_reg, NRF_TWIS_EVENT_RXSTARTED); - nrf_twis_event_clear(p_reg, NRF_TWIS_EVENT_TXSTARTED); - nrf_twis_event_clear(p_reg, NRF_TWIS_EVENT_WRITE); - nrf_twis_event_clear(p_reg, NRF_TWIS_EVENT_READ); -} - -/** - * @brief Reset all the registers to known state - * - * This function clears all registers that requires it to known state. - * TWIS is left disabled after this function. - * All events are cleared. - * @param[out] p_reg TWIS to reset register address - */ -static inline void nrf_drv_twis_swreset(NRF_TWIS_Type * const p_reg) -{ - /* Disable TWIS */ - nrf_twis_disable(p_reg); - - /* Disconnect pins */ - nrf_twis_pins_set(p_reg, ~0U, ~0U); - - /* Disable interrupt global for the instance */ - nrf_drv_common_irq_disable(nrf_drv_get_IRQn(p_reg)); - - /* Disable interrupts */ - nrf_twis_int_disable(p_reg, ~0U); -} - -/** - * @brief Configure pin - * - * Function configures selected for work as SDA or SCL. - * @param pin Pin number to configure - */ -static inline void nrf_drv_twis_config_pin(uint32_t pin, nrf_gpio_pin_pull_t pull) -{ - nrf_gpio_cfg(pin, - NRF_GPIO_PIN_DIR_INPUT, - NRF_GPIO_PIN_INPUT_DISCONNECT, - pull, - NRF_GPIO_PIN_S0D1, - NRF_GPIO_PIN_NOSENSE); -} - -/** - * @brief Call event handler - * - * Function that calls event handler. - * The event handler would be only called if its value is != NULL. - * @param instNr Driver instance number that has called this runtime. - * @param[in] pev Event structure to pass to event handler - * @note - * Remember about possible multithreading. - * It is acceptable to call old event function if it was already disabled. - * What is unacceptable is jump into NULL pointer. - */ -static void nrf_drv_call_event_handler(uint8_t instNr, nrf_drv_twis_evt_t const * const pev) -{ - nrf_drv_twis_event_handler_t evh = m_var_inst[instNr].ev_handler; - if (NULL != evh) - { - evh(pev); - } -} - -/** - * @brief Auxiliary function for getting event state on right bit possition - * - * This function calls @ref nrf_twis_event_get function but the the result - * is shifted to match INTEN register scheme. - * - * @param[in,out] p_reg TWIS to read event from - * @param ev Event code - * - * @return Selected event state shifted by @ref nrf_drv_event_to_bitpos - * - * @sa nrf_twis_event_get - * @sa nrf_drv_event_to_bitpos - */ -static inline uint32_t nrf_drv_twis_event_bit_get(NRF_TWIS_Type * const p_reg, nrf_twis_event_t ev) -{ - return (uint32_t)nrf_twis_event_get_and_clear(p_reg, ev) << nrf_drv_event_to_bitpos(ev); -} - -/** - * @brief Auxiliary function for checking event bit inside given flags value - * - * Function used here to check presence of the event inside given flags value. - * It transforms given event to bit possition and then checks if in given variable it is cleared. - * - * @param flags Flags to test - * @param ev Event code - * - * @retval true Flag for selected event is set - * @retval false Flag for selected event is cleared - */ -static inline bool nrf_drv_twis_check_bit(uint32_t flags, nrf_twis_event_t ev) -{ - return 0 != (flags & (1U<TXD.PTR, - evdata.data.tx_amount * sizeof(uint8_t)); - nrf_drv_call_event_handler(instNr, &evdata); - /* Go to idle and repeat the state machine if READ or WRITE events detected. - * This time READ or WRITE would be started */ - substate = NRF_DRV_TWIS_SUBSTATE_IDLE; - ev = nrf_drv_twis_clear_bit(ev, NRF_TWIS_EVENT_STOPPED); - } - else - { - nrf_drv_twis_process_error(instNr, - TWIS_EVT_READ_ERROR, - nrf_twis_error_source_get_and_clear(p_reg)); - substate = NRF_DRV_TWIS_SUBSTATE_IDLE; - ev = 0; - } - break; - case NRF_DRV_TWIS_SUBSTATE_WRITE_WAITING: - if (nrf_drv_twis_check_bit(ev, NRF_TWIS_EVENT_RXSTARTED) || - nrf_drv_twis_check_bit(ev, NRF_TWIS_EVENT_WRITE) || - nrf_drv_twis_check_bit(ev, NRF_TWIS_EVENT_READ) || - nrf_drv_twis_check_bit(ev, NRF_TWIS_EVENT_STOPPED)) - { - substate = NRF_DRV_TWIS_SUBSTATE_WRITE_PENDING; - /* Any other bits requires further processing in PENDING substate */ - ev = nrf_drv_twis_clear_bit(ev, NRF_TWIS_EVENT_RXSTARTED); - } - else - { - nrf_drv_twis_process_error(instNr, - TWIS_EVT_WRITE_ERROR, - nrf_twis_error_source_get_and_clear(p_reg)); - substate = NRF_DRV_TWIS_SUBSTATE_IDLE; - ev = 0; - } - break; - case NRF_DRV_TWIS_SUBSTATE_WRITE_PENDING: - if (nrf_drv_twis_check_bit(ev, NRF_TWIS_EVENT_WRITE) || - nrf_drv_twis_check_bit(ev, NRF_TWIS_EVENT_READ) || - nrf_drv_twis_check_bit(ev, NRF_TWIS_EVENT_STOPPED)) - { - evdata.type = TWIS_EVT_WRITE_DONE; - evdata.data.rx_amount = nrf_twis_rx_amount_get(p_reg); - nrf_drv_call_event_handler(instNr, &evdata); - /* Go to idle and repeat the state machine if READ or WRITE events detected. - * This time READ or WRITE would be started */ - substate = NRF_DRV_TWIS_SUBSTATE_IDLE; - ev = nrf_drv_twis_clear_bit(ev, NRF_TWIS_EVENT_STOPPED); - } - else - { - nrf_drv_twis_process_error(instNr, - TWIS_EVT_WRITE_ERROR, - nrf_twis_error_source_get_and_clear(p_reg)); - substate = NRF_DRV_TWIS_SUBSTATE_IDLE; - ev = 0; - } - break; - default: - substate = NRF_DRV_TWIS_SUBSTATE_IDLE; - /* Do not clear any events and repeat the machine */ - break; - } - } - - m_var_inst[instNr].substate = substate; - if (!TWIS_NO_SYNC_MODE) - { - m_sm_semaphore[instNr] = 0; - } -} - -/** - * @brief This function - */ -static inline void nrf_drv_twis_preprocess_status(uint8_t instNr) -{ - if (!TWIS_NO_SYNC_MODE) - { - if (NULL == m_var_inst[instNr].ev_handler) - { - nrf_drv_twis_state_machine(instNr); - } - } -} - -/** - * @brief Interrupt service - * - * This function is called by all interrupts runtime for instances enabled in this library. - * @param instNr Driver instance number that has called this runtime. - */ -static inline void nrf_drv_twis_on_ISR(uint8_t instNr) -{ - nrf_drv_twis_state_machine(instNr); -} - -/** @} */ /* End of lib_driver_twis_slave_ifunc */ - - -/* ------------------------------------------------------------------------- - * Implementation of IRQ Handlers - */ -#define X(n) \ - IRQ_HANDLER(n) \ - { \ - nrf_drv_twis_on_ISR(TWIS##n##_INSTANCE_INDEX); \ - } -#include "nrf_drv_twis_inst.def" - -/* ------------------------------------------------------------------------- - * Implementation of interface functions - * - */ - - -ret_code_t nrf_drv_twis_init( - nrf_drv_twis_t const * const p_instance, - nrf_drv_twis_config_t const * p_config, - nrf_drv_twis_event_handler_t const event_handler) -{ - ASSERT(p_config); - ASSERT(p_config->scl != p_config->sda); - uint8_t instNr = p_instance->instNr; - NRF_TWIS_Type * const p_reg = m_const_inst[instNr].p_reg; - nrf_twis_config_addr_mask_t addr_mask = (nrf_twis_config_addr_mask_t)0; - ret_code_t err_code; - - if (m_var_inst[instNr].state != NRF_DRV_STATE_UNINITIALIZED) - { - err_code = NRF_ERROR_INVALID_STATE; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - -#if NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - if (nrf_drv_common_per_res_acquire(p_reg, m_irq_handlers[instNr]) != NRF_SUCCESS) - { - err_code = NRF_ERROR_BUSY; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } -#endif - - if (!TWIS_ASSUME_INIT_AFTER_RESET_ONLY) - { - nrf_drv_twis_swreset(p_reg); - } - - nrf_drv_twis_config_pin(p_config->scl, p_config->scl_pull); - nrf_drv_twis_config_pin(p_config->sda, p_config->sda_pull); - - if (0 == (p_config->addr[0] | p_config->addr[1])) - addr_mask = NRF_TWIS_CONFIG_ADDRESS0_MASK; - else - { - if (0 != p_config->addr[0]) - { - addr_mask |= NRF_TWIS_CONFIG_ADDRESS0_MASK; - } - if (0 != p_config->addr[1]) - { - addr_mask |= NRF_TWIS_CONFIG_ADDRESS1_MASK; - } - } - - /* Peripheral interrupt configure - * (note - interrupts still needs to be configured in INTEN register. - * This is done in enable function) */ - nrf_drv_common_irq_enable(nrf_drv_get_IRQn(p_reg), p_config->interrupt_priority); - - /* Configure */ - nrf_twis_pins_set (p_reg, p_config->scl, p_config->sda); - nrf_twis_address_set (p_reg, 0, p_config->addr[0]); - nrf_twis_address_set (p_reg, 1, p_config->addr[1]); - nrf_twis_config_address_set(p_reg, addr_mask); - - /* Clear semaphore */ - if (!TWIS_NO_SYNC_MODE) - { - m_sm_semaphore[instNr] = 0; - } - /* Set internal instance variables */ - m_var_inst[instNr].substate = NRF_DRV_TWIS_SUBSTATE_IDLE; - m_var_inst[instNr].ev_handler = event_handler; - m_var_inst[instNr].state = NRF_DRV_STATE_INITIALIZED; - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -void nrf_drv_twis_uninit(nrf_drv_twis_t const * const p_instance) -{ - uint8_t instNr = p_instance->instNr; - NRF_TWIS_Type * const p_reg = m_const_inst[instNr].p_reg; - TWIS_PSEL_Type psel = p_reg->PSEL; - - ASSERT(m_var_inst[instNr].state != NRF_DRV_STATE_UNINITIALIZED); - - nrf_drv_twis_swreset(p_reg); - - /* Clear pins state if */ - if (!(TWIS_PSEL_SCL_CONNECT_Msk & psel.SCL)) - { - nrf_gpio_cfg_default(psel.SCL); - } - if (!(TWIS_PSEL_SDA_CONNECT_Msk & psel.SDA)) - { - nrf_gpio_cfg_default(psel.SDA); - } - -#if NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING) - nrf_drv_common_per_res_release(p_reg); -#endif - - /* Clear variables */ - m_var_inst[instNr].ev_handler = NULL; - m_var_inst[instNr].state = NRF_DRV_STATE_UNINITIALIZED; -} - - -void nrf_drv_twis_enable(nrf_drv_twis_t const * const p_instance) -{ - uint8_t instNr = p_instance->instNr; - NRF_TWIS_Type * const p_reg = m_const_inst[instNr].p_reg; - nrf_drv_twis_var_inst_t * const p_var_inst = &m_var_inst[instNr]; - - ASSERT(m_var_inst[instNr].state == NRF_DRV_STATE_INITIALIZED); - - nrf_drv_twis_clear_all_events(p_reg); - - /* Enable interrupts */ - if (NULL != p_var_inst->ev_handler) - { - nrf_twis_int_enable(p_reg, m_used_ints_mask); - } - - nrf_twis_enable(p_reg); - p_var_inst->error = 0; - p_var_inst->state = NRF_DRV_STATE_POWERED_ON; - p_var_inst->substate = NRF_DRV_TWIS_SUBSTATE_IDLE; -} - - -void nrf_drv_twis_disable(nrf_drv_twis_t const * const p_instance) -{ - uint8_t instNr = p_instance->instNr; - NRF_TWIS_Type * const p_reg = m_const_inst[instNr].p_reg; - - ASSERT(m_var_inst[instNr].state != NRF_DRV_STATE_UNINITIALIZED); - - nrf_twis_int_disable(p_reg, m_used_ints_mask); - - nrf_twis_disable(p_reg); - m_var_inst[instNr].state = NRF_DRV_STATE_INITIALIZED; -} - -/* ARM recommends not using the LDREX and STREX instructions in C code. - * This is because the compiler might generate loads and stores between - * LDREX and STREX, potentially clearing the exclusive monitor set by LDREX. - * This recommendation also applies to the byte, halfword, and doubleword - * variants LDREXB, STREXB, LDREXH, STREXH, LDREXD, and STREXD. - * - * This is the reason for the function below to be implemented in assembly. - */ -//lint -save -e578 -#if defined (__CC_ARM ) -static __ASM uint32_t nrf_drv_twis_error_get_and_clear_internal(uint32_t volatile * const perror) -{ - mov r3, r0 - mov r1, #0 -nrf_drv_twis_error_get_and_clear_internal_try - ldrex r0, [r3] - strex r2, r1, [r3] - cmp r2, r1 /* did this succeed? */ - bne nrf_drv_twis_error_get_and_clear_internal_try /* no – try again */ - bx lr -} -#elif defined ( __GNUC__ ) -static uint32_t nrf_drv_twis_error_get_and_clear_internal(uint32_t volatile * const perror) -{ - uint32_t ret; - uint32_t temp; - __ASM volatile( - " .syntax unified \n" - "nrf_drv_twis_error_get_and_clear_internal_try: \n" - " ldrex %[ret], [%[perror]] \n" - " strex %[temp], %[zero], [%[perror]] \n" - " cmp %[temp], %[zero] \n" - " bne nrf_drv_twis_error_get_and_clear_internal_try \n" - : /* Output */ - [ret]"=&l"(ret), - [temp]"=&l"(temp) - : /* Input */ - [zero]"l"(0), - [perror]"l"(perror) - ); - UNUSED_VARIABLE(temp); - return ret; -} -#elif defined ( __ICCARM__ ) -static uint32_t nrf_drv_twis_error_get_and_clear_internal(uint32_t volatile * const perror) -{ - uint32_t ret; - uint32_t temp; - __ASM volatile( - "1: \n" - " ldrex %[ret], [%[perror]] \n" - " strex %[temp], %[zero], [%[perror]] \n" - " cmp %[temp], %[zero] \n" - " bne.n 1b \n" - : /* Output */ - [ret]"=&l"(ret), - [temp]"=&l"(temp) - : /* Input */ - [zero]"l"(0), - [perror]"l"(perror) - ); - UNUSED_VARIABLE(temp); - return ret; -} -#else - #error Unknown compiler -#endif -//lint -restore - -uint32_t nrf_drv_twis_error_get_and_clear(nrf_drv_twis_t const * const p_instance) -{ - nrf_drv_twis_var_inst_t * const p_var_inst = &m_var_inst[p_instance->instNr]; - nrf_drv_twis_preprocess_status(p_instance->instNr); - /* Make sure that access to error member is atomic - * so there is no bit that is cleared if it is not copied to local variable already. */ - return nrf_drv_twis_error_get_and_clear_internal(&p_var_inst->error); -} - - -ret_code_t nrf_drv_twis_tx_prepare( - nrf_drv_twis_t const * const p_instance, - void const * const p_buf, - size_t size) -{ - ret_code_t err_code = NRF_SUCCESS; - uint8_t instNr = p_instance->instNr; - NRF_TWIS_Type * const p_reg = m_const_inst[instNr].p_reg; - nrf_drv_twis_var_inst_t * const p_var_inst = &m_var_inst[instNr]; - - /* Check power state*/ - if (p_var_inst->state != NRF_DRV_STATE_POWERED_ON) - { - err_code = NRF_ERROR_INVALID_STATE; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - /* Check data address */ - if (!nrf_drv_is_in_RAM(p_buf)) - { - err_code = NRF_ERROR_INVALID_ADDR; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - /* Check data size */ - if ((size & TWIS_TXD_MAXCNT_MAXCNT_Msk) != size) - { - err_code = NRF_ERROR_INVALID_LENGTH; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - nrf_twis_tx_prepare(p_reg, (uint8_t const *)p_buf, (nrf_twis_amount_t)size); - NRF_LOG_INFO("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - -} - - -size_t nrf_drv_twis_tx_amount(nrf_drv_twis_t const * const p_instance) -{ - uint8_t instNr = p_instance->instNr; - NRF_TWIS_Type const * const p_reg = m_const_inst[instNr].p_reg; - - return nrf_twis_tx_amount_get(p_reg); -} - - -ret_code_t nrf_drv_twis_rx_prepare( - nrf_drv_twis_t const * const p_instance, - void * const p_buf, - size_t size) -{ - ret_code_t err_code; - uint8_t instNr = p_instance->instNr; - NRF_TWIS_Type * const p_reg = m_const_inst[instNr].p_reg; - nrf_drv_twis_var_inst_t * const p_var_inst = &m_var_inst[instNr]; - - /* Check power state*/ - if (p_var_inst->state != NRF_DRV_STATE_POWERED_ON) - { - err_code = NRF_ERROR_INVALID_STATE; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - /* Check data address */ - if (!nrf_drv_is_in_RAM(p_buf)) - { - err_code = NRF_ERROR_INVALID_ADDR; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - /* Check data size */ - if ((size & TWIS_RXD_MAXCNT_MAXCNT_Msk) != size) - { - err_code = NRF_ERROR_INVALID_LENGTH; - NRF_LOG_WARNING("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - nrf_twis_rx_prepare(p_reg, (uint8_t *)p_buf, (nrf_twis_amount_t)size); - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", - (uint32_t)__func__, - (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -size_t nrf_drv_twis_rx_amount(nrf_drv_twis_t const * const p_instance) -{ - uint8_t instNr = p_instance->instNr; - NRF_TWIS_Type const * const p_reg = m_const_inst[instNr].p_reg; - - return nrf_twis_rx_amount_get(p_reg); -} - - -bool nrf_drv_twis_is_busy(nrf_drv_twis_t const * const p_instance) -{ - nrf_drv_twis_preprocess_status(p_instance->instNr); - return NRF_DRV_TWIS_SUBSTATE_IDLE != m_var_inst[(p_instance->instNr)].substate; -} - -bool nrf_drv_twis_is_waiting_tx_buff(nrf_drv_twis_t const * const p_instance) -{ - nrf_drv_twis_preprocess_status(p_instance->instNr); - return NRF_DRV_TWIS_SUBSTATE_READ_WAITING == m_var_inst[(p_instance->instNr)].substate; -} - -bool nrf_drv_twis_is_waiting_rx_buff(nrf_drv_twis_t const * const p_instance) -{ - nrf_drv_twis_preprocess_status(p_instance->instNr); - return NRF_DRV_TWIS_SUBSTATE_WRITE_WAITING == m_var_inst[(p_instance->instNr)].substate; -} - -bool nrf_drv_twis_is_pending_tx(nrf_drv_twis_t const * const p_instance) -{ - nrf_drv_twis_preprocess_status(p_instance->instNr); - return NRF_DRV_TWIS_SUBSTATE_READ_PENDING == m_var_inst[(p_instance->instNr)].substate; -} - -bool nrf_drv_twis_is_pending_rx(nrf_drv_twis_t const * const p_instance) -{ - nrf_drv_twis_preprocess_status(p_instance->instNr); - return NRF_DRV_TWIS_SUBSTATE_WRITE_PENDING == m_var_inst[(p_instance->instNr)].substate; -} -#endif // TWIS_COUNT -#endif // NRF_MODULE_ENABLED(TWIS) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/twis_slave/nrf_drv_twis.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/twis_slave/nrf_drv_twis.h deleted file mode 100644 index aa70da2a2eb..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/twis_slave/nrf_drv_twis.h +++ /dev/null @@ -1,409 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_DRV_TWIS_H__ -#define NRF_DRV_TWIS_H__ - -#include "sdk_config.h" -#include "nrf_drv_common.h" -#include "nrf_gpio.h" -#include "sdk_errors.h" -#include "nrf_twis.h" -#include -#include "app_util.h" - -#ifdef __cplusplus -extern "C" { -#endif -/**@file - * @addtogroup nrf_twis Two Wire slave interface (TWIS) - * @ingroup nrf_drivers - * @brief Two Wire slave interface (TWIS) APIs. - * - * - * @defgroup nrf_drv_twis TWIS driver - * @{ - * @ingroup nrf_twis - * @brief TWI slave APIs. - */ - -#ifdef TWIS0_ENABLED -#define TWIS0_INCR TWIS0_ENABLED -#else -#define TWIS0_INCR 0 -#endif - -#ifdef TWIS1_ENABLED -#define TWIS1_INCR TWIS1_ENABLED -#else -#define TWIS1_INCR 0 -#endif - -#define ENABLED_TWIS_COUNT (TWIS0_INCR + TWIS1_INCR) -/** - * @brief Event callback function event definitions. - */ -typedef enum -{ - TWIS_EVT_READ_REQ, ///< Read request detected - /**< If there is no buffer prepared, buf_req flag in the even will be set. - Call then @ref nrf_drv_twis_tx_prepare to give parameters for buffer. - */ - TWIS_EVT_READ_DONE, ///< Read request has finished - free any data - TWIS_EVT_READ_ERROR, ///< Read request finished with error - TWIS_EVT_WRITE_REQ, ///< Write request detected - /**< If there is no buffer prepared, buf_req flag in the even will be set. - Call then @ref nrf_drv_twis_rx_prepare to give parameters for buffer. - */ - TWIS_EVT_WRITE_DONE, ///< Write request has finished - process data - TWIS_EVT_WRITE_ERROR, ///< Write request finished with error - TWIS_EVT_GENERAL_ERROR ///< Error that happens not inside WRITE or READ transaction -} nrf_drv_twis_evt_type_t; - -/** - * @brief TWIS driver instance structure - * - * @note We only need instance number here so we could really use just a number - * that would be send to every driver function. - * But for compatibility reason this number is inserted into the structure. - */ -typedef struct -{ - uint8_t instNr; /**< Instance number */ -}nrf_drv_twis_t; - -/** - * @brief TWIS driver event structure - */ -typedef struct -{ - nrf_drv_twis_evt_type_t type; ///< Event type - union - { - bool buf_req; ///< Flag for @ref TWIS_EVT_READ_REQ and @ref TWIS_EVT_WRITE_REQ - /**< Information if transmission buffer requires to be prepared */ - uint32_t tx_amount; ///< Data for @ref TWIS_EVT_READ_DONE - uint32_t rx_amount; ///< Data for @ref TWIS_EVT_WRITE_DONE - uint32_t error; ///< Data for @ref TWIS_EVT_GENERAL_ERROR - }data; -}nrf_drv_twis_evt_t; - -/** - * @brief TWI slave event callback function type. - * - * @param[in] p_event Event information structure. - */ -typedef void (*nrf_drv_twis_event_handler_t)(nrf_drv_twis_evt_t const * const p_event); - -/** - * @brief Structure for TWIS configuration - */ -typedef struct -{ - uint32_t addr[2]; //!< Set addresses that this slave should respond. Set 0 to disable. - uint32_t scl; //!< SCL pin number - nrf_gpio_pin_pull_t scl_pull; //!< SCL pin pull - uint32_t sda; //!< SDA pin number - nrf_gpio_pin_pull_t sda_pull; //!< SDA pin pull - uint8_t interrupt_priority; //!< The priority of interrupt for the module to set -}nrf_drv_twis_config_t; - -/** - * @brief Possible error sources - * - * This is flag enum - values from this enum can be connected using logical or operator. - * @note - * We could use directly @ref nrf_twis_error_t. Error type enum is redefined here becouse - * of possible future extension (eg. supporting timeouts and synchronous mode). - */ -typedef enum -{ - NRF_DRV_TWIS_ERROR_OVERFLOW = NRF_TWIS_ERROR_OVERFLOW, /**< RX buffer overflow detected, and prevented */ - NRF_DRV_TWIS_ERROR_DATA_NACK = NRF_TWIS_ERROR_DATA_NACK, /**< NACK sent after receiving a data byte */ - NRF_DRV_TWIS_ERROR_OVERREAD = NRF_TWIS_ERROR_OVERREAD, /**< TX buffer over-read detected, and prevented */ - NRF_DRV_TWIS_ERROR_UNEXPECTED_EVENT = 1 << 8 /**< Unexpected event detected by state machine */ -}nrf_drv_twis_error_t; - -/** - * @internal - * @brief Internal macro for creating TWIS driver instance - * - * Second level of indirection in creating the instance. - * Do not use this macro directly. - * Use @ref NRF_DRV_TWIS_INSTANCE instead. - */ -#define NRF_DRV_TWIS_INSTANCE_x(id) \ - { \ - TWIS##id##_INSTANCE_INDEX \ - } - -/** - * @brief Macro for creating TWIS driver instance - * - * @param[in] id Instance index. Use 0 for TWIS0 and 1 for TWIS1 - */ -#define NRF_DRV_TWIS_INSTANCE(id) NRF_DRV_TWIS_INSTANCE_x(id) - -#define TWIS0_INSTANCE_INDEX 0 -#define TWIS1_INSTANCE_INDEX TWIS0_INSTANCE_INDEX+TWIS0_ENABLED - -/** - * @brief Generate default configuration for TWIS driver instance - */ -#define NRF_DRV_TWIS_DEFAULT_CONFIG \ -{ \ - .addr = { TWIS_DEFAULT_CONFIG_ADDR0, TWIS_DEFAULT_CONFIG_ADDR1 }, \ - .scl = 31, \ - .scl_pull = (nrf_gpio_pin_pull_t)TWIS_DEFAULT_CONFIG_SCL_PULL, \ - .sda = 31, \ - .sda_pull = (nrf_gpio_pin_pull_t)TWIS_DEFAULT_CONFIG_SDA_PULL, \ - .interrupt_priority = TWIS_DEFAULT_CONFIG_IRQ_PRIORITY \ -} - -/** - * @brief Function for initializing the TWIS driver instance. - * - * Function initializes and enables TWIS driver. - * @attention After driver initialization enable it by @ref nrf_drv_twis_enable - * - * @param[in] p_instance Pointer to the driver instance structure. - * @attention @em p_instance has to be global object. - * It would be used by interrupts so make it sure that object - * would not be destroyed when function is leaving. - * @param[in] p_config Initial configuration. - * @param[in] event_handler Event handler provided by the user. - * - * @retval NRF_SUCCESS If initialization was successful. - * @retval NRF_ERROR_INVALID_STATE If the driver is already initialized. - * @retval NRF_ERROR_BUSY If some other peripheral with the same - * instance ID is already in use. This is - * possible only if PERIPHERAL_RESOURCE_SHARING_ENABLED - * is set to a value other than zero. - */ -ret_code_t nrf_drv_twis_init( - nrf_drv_twis_t const * const p_instance, - nrf_drv_twis_config_t const * p_config, - nrf_drv_twis_event_handler_t const event_handler); - -/** - * @brief Function for uninitializing the TWIS driver instance. - * - * Function initializes the peripheral and resets all registers to default values. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @note - * It is safe to call nrf_drv_twis_uninit even before initialization. - * Actually @ref nrf_drv_twis_init function calls this function to - * make sure that TWIS state is known. - * @note - * If TWIS driver was in uninitialized state before calling this function, - * selected pins would not be reset to default configuration. - */ -void nrf_drv_twis_uninit(nrf_drv_twis_t const * const p_instance); - -/** - * @brief Enable TWIS instance - * - * This function enables TWIS instance. - * Function defined if there is needs for dynamically enabling and disabling the peripheral. - * Use @ref nrf_drv_twis_enable and @ref nrf_drv_twis_disable functions. - * They do not change any configuration registers. - * - * @param p_instance Pointer to the driver instance structure. - */ -void nrf_drv_twis_enable(nrf_drv_twis_t const * const p_instance); - -/** - * @brief Disable TWIS instance - * - * Disabling TWIS instance gives possibility to turn off the TWIS while - * holding configuration done by @ref nrf_drv_twis_init - * - * @param p_instance Pointer to the driver instance structure. - */ -void nrf_drv_twis_disable(nrf_drv_twis_t const * const p_instance); - -/** - * @brief Get and clear last error flags - * - * Function gets information about errors. - * This is also the only possibility to exit from error substate of the internal state machine. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @return Error flags defined in @ref nrf_drv_twis_error_t - * @attention - * This function clears error state and flags. - */ -uint32_t nrf_drv_twis_error_get_and_clear(nrf_drv_twis_t const * const p_instance); - - -/** - * @brief Prepare data for sending - * - * This function should be used in response for @ref TWIS_EVT_READ_REQ event. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] p_buf Transmission buffer - * @attention Transmission buffer has to be placed in RAM. - * @param size Maximum number of bytes that master may read from buffer given. - * - * @retval NRF_SUCCESS Preparation finished properly - * @retval NRF_ERROR_INVALID_ADDR Given @em p_buf is not placed inside the RAM - * @retval NRF_ERROR_INVALID_LENGTH Wrong value in @em size parameter - * @retval NRF_ERROR_INVALID_STATE Module not initialized or not enabled - */ -ret_code_t nrf_drv_twis_tx_prepare( - nrf_drv_twis_t const * const p_instance, - void const * const p_buf, - size_t size); - -/** - * @brief Get number of transmitted bytes - * - * Function returns number of bytes sent. - * This function may be called after @ref TWIS_EVT_READ_DONE or @ref TWIS_EVT_READ_ERROR events. - * - * @param[in] p_instance Pointer to the driver instance structure. - * - * @return Number of bytes sent. - */ -size_t nrf_drv_twis_tx_amount(nrf_drv_twis_t const * const p_instance); - -/** - * @brief Prepare data for receiving - * - * This function should be used in response for @ref TWIS_EVT_WRITE_REQ event. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] p_buf Buffer that would be filled with received data - * @attention Receiving buffer has to be placed in RAM. - * @param size Size of the buffer (maximum amount of data to receive) - * - * @retval NRF_SUCCESS Preparation finished properly - * @retval NRF_ERROR_INVALID_ADDR Given @em p_buf is not placed inside the RAM - * @retval NRF_ERROR_INVALID_LENGTH Wrong value in @em size parameter - * @retval NRF_ERROR_INVALID_STATE Module not initialized or not enabled - */ -ret_code_t nrf_drv_twis_rx_prepare( - nrf_drv_twis_t const * const p_instance, - void * const p_buf, - size_t size); - -/** - * @brief Get number of received bytes - * - * Function returns number of bytes received. - * This function may be called after @ref TWIS_EVT_WRITE_DONE or @ref TWIS_EVT_WRITE_ERROR events. - * - * @param[in] p_instance Pointer to the driver instance structure. - * - * @return Number of bytes received. - */ -size_t nrf_drv_twis_rx_amount(nrf_drv_twis_t const * const p_instance); - -/** - * @brief Function checks if driver is busy right now - * - * Actual driver substate is tested. - * If driver is in any other state than IDLE or ERROR this function returns true. - * - * @param[in] p_instance Pointer to the driver instance structure. - * - * @retval true Driver is in state other than ERROR or IDLE - * @retval false There is no transmission pending. - */ -bool nrf_drv_twis_is_busy(nrf_drv_twis_t const * const p_instance); - -/** - * @brief Function checks if driver is waiting for tx buffer - * - * If this function returns true, it means that driver is stalled expecting - * of the @ref nrf_drv_twis_tx_prepare function call. - * - * @param[in] p_instance Pointer to the driver instance structure. - * - * @retval true Driver waits for @ref nrf_drv_twis_tx_prepare - * @retval false Driver is not in the state where it waits for preparing tx buffer. - */ -bool nrf_drv_twis_is_waiting_tx_buff(nrf_drv_twis_t const * const p_instance); - -/** - * @brief Function checks if driver is waiting for rx buffer - * - * If this function returns true, it means that driver is staled expecting - * of the @ref nrf_drv_twis_rx_prepare function call. - * - * @param[in] p_instance Pointer to the driver instance structure. - * - * @retval true Driver waits for @ref nrf_drv_twis_rx_prepare - * @retval false Driver is not in the state where it waits for preparing rx buffer. - */ -bool nrf_drv_twis_is_waiting_rx_buff(nrf_drv_twis_t const * const p_instance); - -/** - * @brief Check if driver is sending data - * - * If this function returns true, it means that there is ongoing output transmission. - * - * @param[in] p_instance Pointer to the driver instance structure. - * - * @retval true There is ongoing output transmission. - * @retval false Driver is in other state. - */ -bool nrf_drv_twis_is_pending_tx(nrf_drv_twis_t const * const p_instance); - -/** - * @brief Check if driver is receiving data - * - * If this function returns true, it means that there is ongoing input transmission. - * - * @param[in] p_instance Pointer to the driver instance structure. - * - * @retval true There is ongoing input transmission. - * @retval false Driver is in other state. - */ -bool nrf_drv_twis_is_pending_rx(nrf_drv_twis_t const * const p_instance); - -/** @} */ /* End of lib_twis_drv group */ - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_DRV_TWIS_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/twis_slave/nrf_drv_twis_inst.def b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/twis_slave/nrf_drv_twis_inst.def deleted file mode 100644 index 419b23f68c5..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/twis_slave/nrf_drv_twis_inst.def +++ /dev/null @@ -1,20 +0,0 @@ -/** - * @file - * @brief Xmacro file with contains enumeration of TWIS instances to implement - * - * Use this file everywhere where anything has to be generated for all active TWIS instances. - * Xmacro format: - * - * @code - X(n) - * @endcode - * - * Where @em n is number of the instance itself (0 for NRF_TWIS0). - */ -#if (TWIS0_ENABLED == 1) - X(0) -#endif -#if (TWIS1_ENABLED == 1) - X(1) -#endif -#undef X diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/uart/nrf_drv_uart.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/uart/nrf_drv_uart.c deleted file mode 100644 index 495a92b22cf..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/uart/nrf_drv_uart.c +++ /dev/null @@ -1,990 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(UART) -#include "nrf_drv_uart.h" -#include "nrf_assert.h" -#include "nrf_drv_common.h" -#include "nrf_gpio.h" -#include "app_util_platform.h" - -#define NRF_LOG_MODULE_NAME uart - -#if UART_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL UART_CONFIG_LOG_LEVEL -#define NRF_LOG_INFO_COLOR UART_CONFIG_INFO_COLOR -#define NRF_LOG_DEBUG_COLOR UART_CONFIG_DEBUG_COLOR -#define EVT_TO_STR(event) (event == NRF_UART_EVENT_ERROR ? "NRF_UART_EVENT_ERROR" : "UNKNOWN EVENT") -#else //UART_CONFIG_LOG_ENABLED -#define EVT_TO_STR(event) "" -#define NRF_LOG_LEVEL 0 -#endif //UART_CONFIG_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - -#if (defined(UARTE_IN_USE) && defined(UART_IN_USE)) - // UARTE and UART combined - #define CODE_FOR_UARTE(code) if (m_cb[p_instance->drv_inst_idx].use_easy_dma) { code } - #define CODE_FOR_UARTE_INT(idx, code) if (m_cb[idx].use_easy_dma) { code } - #define CODE_FOR_UART(code) else { code } -#elif (defined(UARTE_IN_USE) && !defined(UART_IN_USE)) - // UARTE only - #define CODE_FOR_UARTE(code) { code } - #define CODE_FOR_UARTE_INT(idx, code) { code } - #define CODE_FOR_UART(code) -#elif (!defined(UARTE_IN_USE) && defined(UART_IN_USE)) - // UART only - #define CODE_FOR_UARTE(code) - #define CODE_FOR_UARTE_INT(idx, code) - #define CODE_FOR_UART(code) { code } -#else - #error "Wrong configuration." -#endif - -#define TX_COUNTER_ABORT_REQ_VALUE 256 - -typedef struct -{ - void * p_context; - nrf_uart_event_handler_t handler; - uint8_t const * p_tx_buffer; - uint8_t * p_rx_buffer; - uint8_t * p_rx_secondary_buffer; - volatile uint16_t tx_counter; - uint8_t tx_buffer_length; - uint8_t rx_buffer_length; - uint8_t rx_secondary_buffer_length; - volatile uint8_t rx_counter; - bool rx_enabled; - nrf_drv_state_t state; -#if (defined(UARTE_IN_USE) && defined(UART_IN_USE)) - bool use_easy_dma; -#endif -} uart_control_block_t; - -static uart_control_block_t m_cb[UART_ENABLED_COUNT]; - -#ifdef NRF52810_XXAA - #define IRQ_HANDLER(n) void UARTE##n##_IRQHandler(void) -#else - #define IRQ_HANDLER(n) void UART##n##_IRQHandler(void) -#endif - -__STATIC_INLINE void apply_config(nrf_drv_uart_t const * p_instance, nrf_drv_uart_config_t const * p_config) -{ - if (p_config->pseltxd != NRF_UART_PSEL_DISCONNECTED) - { - nrf_gpio_pin_set(p_config->pseltxd); - nrf_gpio_cfg_output(p_config->pseltxd); - } - if (p_config->pselrxd != NRF_UART_PSEL_DISCONNECTED) - { - nrf_gpio_cfg_input(p_config->pselrxd, NRF_GPIO_PIN_NOPULL); - } - - CODE_FOR_UARTE - ( - nrf_uarte_baudrate_set(p_instance->reg.p_uarte, (nrf_uarte_baudrate_t)p_config->baudrate); - nrf_uarte_configure(p_instance->reg.p_uarte, (nrf_uarte_parity_t)p_config->parity, - (nrf_uarte_hwfc_t)p_config->hwfc); - nrf_uarte_txrx_pins_set(p_instance->reg.p_uarte, p_config->pseltxd, p_config->pselrxd); - if (p_config->hwfc == NRF_UART_HWFC_ENABLED) - { - if (p_config->pselcts != NRF_UART_PSEL_DISCONNECTED) - { - nrf_gpio_cfg_input(p_config->pselcts, NRF_GPIO_PIN_NOPULL); - } - if (p_config->pselrts != NRF_UART_PSEL_DISCONNECTED) - { - nrf_gpio_pin_set(p_config->pselrts); - nrf_gpio_cfg_output(p_config->pselrts); - } - nrf_uarte_hwfc_pins_set(p_instance->reg.p_uarte, p_config->pselrts, p_config->pselcts); - } - ) - CODE_FOR_UART - ( - nrf_uart_baudrate_set(p_instance->reg.p_uart, p_config->baudrate); - nrf_uart_configure(p_instance->reg.p_uart, p_config->parity, p_config->hwfc); - nrf_uart_txrx_pins_set(p_instance->reg.p_uart, p_config->pseltxd, p_config->pselrxd); - if (p_config->hwfc == NRF_UART_HWFC_ENABLED) - { - if (p_config->pselcts != NRF_UART_PSEL_DISCONNECTED) - { - nrf_gpio_cfg_input(p_config->pselcts, NRF_GPIO_PIN_NOPULL); - } - if (p_config->pselrts != NRF_UART_PSEL_DISCONNECTED) - { - nrf_gpio_pin_set(p_config->pselrts); - nrf_gpio_cfg_output(p_config->pselrts); - } - nrf_uart_hwfc_pins_set(p_instance->reg.p_uart, p_config->pselrts, p_config->pselcts); - } - ) -} - -__STATIC_INLINE void interrupts_enable(const nrf_drv_uart_t * p_instance, uint8_t interrupt_priority) -{ - CODE_FOR_UARTE - ( - nrf_uarte_event_clear(p_instance->reg.p_uarte, NRF_UARTE_EVENT_ENDRX); - nrf_uarte_event_clear(p_instance->reg.p_uarte, NRF_UARTE_EVENT_ENDTX); - nrf_uarte_event_clear(p_instance->reg.p_uarte, NRF_UARTE_EVENT_ERROR); - nrf_uarte_event_clear(p_instance->reg.p_uarte, NRF_UARTE_EVENT_RXTO); - nrf_uarte_int_enable(p_instance->reg.p_uarte, NRF_UARTE_INT_ENDRX_MASK | - NRF_UARTE_INT_ENDTX_MASK | - NRF_UARTE_INT_ERROR_MASK | - NRF_UARTE_INT_RXTO_MASK); - nrf_drv_common_irq_enable(nrf_drv_get_IRQn((void *)p_instance->reg.p_uarte), interrupt_priority); - ) - CODE_FOR_UART - ( - nrf_uart_event_clear(p_instance->reg.p_uart, NRF_UART_EVENT_TXDRDY); - nrf_uart_event_clear(p_instance->reg.p_uart, NRF_UART_EVENT_RXTO); - nrf_uart_int_enable(p_instance->reg.p_uart, NRF_UART_INT_MASK_TXDRDY | - NRF_UART_INT_MASK_RXTO); - nrf_drv_common_irq_enable(nrf_drv_get_IRQn((void *)p_instance->reg.p_uart), interrupt_priority); - ) -} - -__STATIC_INLINE void interrupts_disable(const nrf_drv_uart_t * p_instance) -{ - CODE_FOR_UARTE - ( - nrf_uarte_int_disable(p_instance->reg.p_uarte, NRF_UARTE_INT_ENDRX_MASK | - NRF_UARTE_INT_ENDTX_MASK | - NRF_UARTE_INT_ERROR_MASK | - NRF_UARTE_INT_RXTO_MASK); - nrf_drv_common_irq_disable(nrf_drv_get_IRQn((void *)p_instance->reg.p_uarte)); - ) - CODE_FOR_UART - ( - nrf_uart_int_disable(p_instance->reg.p_uart, NRF_UART_INT_MASK_RXDRDY | - NRF_UART_INT_MASK_TXDRDY | - NRF_UART_INT_MASK_ERROR | - NRF_UART_INT_MASK_RXTO); - nrf_drv_common_irq_disable(nrf_drv_get_IRQn((void *)p_instance->reg.p_uart)); - ) - -} - -__STATIC_INLINE void pins_to_default(const nrf_drv_uart_t * p_instance) -{ - /* Reset pins to default states */ - uint32_t txd; - uint32_t rxd; - uint32_t rts; - uint32_t cts; - - CODE_FOR_UARTE - ( - txd = nrf_uarte_tx_pin_get(p_instance->reg.p_uarte); - rxd = nrf_uarte_rx_pin_get(p_instance->reg.p_uarte); - rts = nrf_uarte_rts_pin_get(p_instance->reg.p_uarte); - cts = nrf_uarte_cts_pin_get(p_instance->reg.p_uarte); - nrf_uarte_txrx_pins_disconnect(p_instance->reg.p_uarte); - nrf_uarte_hwfc_pins_disconnect(p_instance->reg.p_uarte); - ) - CODE_FOR_UART - ( - txd = nrf_uart_tx_pin_get(p_instance->reg.p_uart); - rxd = nrf_uart_rx_pin_get(p_instance->reg.p_uart); - rts = nrf_uart_rts_pin_get(p_instance->reg.p_uart); - cts = nrf_uart_cts_pin_get(p_instance->reg.p_uart); - nrf_uart_txrx_pins_disconnect(p_instance->reg.p_uart); - nrf_uart_hwfc_pins_disconnect(p_instance->reg.p_uart); - ) - - if (txd != NRF_UART_PSEL_DISCONNECTED) - { - nrf_gpio_cfg_default(txd); - } - - if (rxd != NRF_UART_PSEL_DISCONNECTED) - { - nrf_gpio_cfg_default(rxd); - } - - if (cts != NRF_UART_PSEL_DISCONNECTED) - { - nrf_gpio_cfg_default(cts); - } - - if (rts != NRF_UART_PSEL_DISCONNECTED) - { - nrf_gpio_cfg_default(rts); - } - -} - -__STATIC_INLINE void uart_enable(const nrf_drv_uart_t * p_instance) -{ - CODE_FOR_UARTE(nrf_uarte_enable(p_instance->reg.p_uarte);) - CODE_FOR_UART(nrf_uart_enable(p_instance->reg.p_uart);); -} - -__STATIC_INLINE void uart_disable(const nrf_drv_uart_t * p_instance) -{ - CODE_FOR_UARTE(nrf_uarte_disable(p_instance->reg.p_uarte);) - CODE_FOR_UART(nrf_uart_disable(p_instance->reg.p_uart);); -} - -ret_code_t nrf_drv_uart_init(const nrf_drv_uart_t * p_instance, nrf_drv_uart_config_t const * p_config, - nrf_uart_event_handler_t event_handler) -{ - ASSERT(p_config); - uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - ret_code_t err_code = NRF_SUCCESS; - - if (p_cb->state != NRF_DRV_STATE_UNINITIALIZED) - { - err_code = NRF_ERROR_INVALID_STATE; - NRF_LOG_ERROR("Init failed. id:%d in wrong state", nrf_drv_get_IRQn((void *)p_instance->reg.p_reg)); - return err_code; - } - -#if (defined(UARTE_IN_USE) && defined(UART_IN_USE)) - p_cb->use_easy_dma = p_config->use_easy_dma; -#endif - apply_config(p_instance, p_config); - - p_cb->handler = event_handler; - p_cb->p_context = p_config->p_context; - - if (p_cb->handler) - { - interrupts_enable(p_instance, p_config->interrupt_priority); - } - - uart_enable(p_instance); - p_cb->rx_buffer_length = 0; - p_cb->rx_secondary_buffer_length = 0; - p_cb->tx_buffer_length = 0; - p_cb->state = NRF_DRV_STATE_INITIALIZED; - p_cb->rx_enabled = false; - return err_code; -} - -void nrf_drv_uart_uninit(const nrf_drv_uart_t * p_instance) -{ - uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - - uart_disable(p_instance); - - if (p_cb->handler) - { - interrupts_disable(p_instance); - } - - pins_to_default(p_instance); - - p_cb->state = NRF_DRV_STATE_UNINITIALIZED; - p_cb->handler = NULL; - NRF_LOG_INFO("Uninit id: %d.", nrf_drv_get_IRQn((void *)p_instance->reg.p_reg)); -} - -#if defined(UART_IN_USE) -__STATIC_INLINE void tx_byte(NRF_UART_Type * p_uart, uart_control_block_t * p_cb) -{ - nrf_uart_event_clear(p_uart, NRF_UART_EVENT_TXDRDY); - uint8_t txd = p_cb->p_tx_buffer[p_cb->tx_counter]; - p_cb->tx_counter++; - nrf_uart_txd_set(p_uart, txd); -} - -__STATIC_INLINE ret_code_t nrf_drv_uart_tx_for_uart(const nrf_drv_uart_t * p_instance) -{ - uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - ret_code_t err_code = NRF_SUCCESS; - - nrf_uart_event_clear(p_instance->reg.p_uart, NRF_UART_EVENT_TXDRDY); - nrf_uart_task_trigger(p_instance->reg.p_uart, NRF_UART_TASK_STARTTX); - - tx_byte(p_instance->reg.p_uart, p_cb); - - if (p_cb->handler == NULL) - { - while (p_cb->tx_counter < (uint16_t) p_cb->tx_buffer_length) - { - while (!nrf_uart_event_check(p_instance->reg.p_uart, NRF_UART_EVENT_TXDRDY) && - p_cb->tx_counter != TX_COUNTER_ABORT_REQ_VALUE) - { - } - if (p_cb->tx_counter != TX_COUNTER_ABORT_REQ_VALUE) - { - tx_byte(p_instance->reg.p_uart, p_cb); - } - } - - if (p_cb->tx_counter == TX_COUNTER_ABORT_REQ_VALUE) - { - err_code = NRF_ERROR_FORBIDDEN; - } - else - { - while (!nrf_uart_event_check(p_instance->reg.p_uart, NRF_UART_EVENT_TXDRDY)) - { - } - nrf_uart_task_trigger(p_instance->reg.p_uart, NRF_UART_TASK_STOPTX); - } - p_cb->tx_buffer_length = 0; - } - return err_code; -} -#endif - -#if defined(UARTE_IN_USE) -__STATIC_INLINE ret_code_t nrf_drv_uart_tx_for_uarte(const nrf_drv_uart_t * p_instance) -{ - uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - ret_code_t err_code = NRF_SUCCESS; - - nrf_uarte_event_clear(p_instance->reg.p_uarte, NRF_UARTE_EVENT_ENDTX); - nrf_uarte_event_clear(p_instance->reg.p_uarte, NRF_UARTE_EVENT_TXSTOPPED); - nrf_uarte_tx_buffer_set(p_instance->reg.p_uarte, p_cb->p_tx_buffer, p_cb->tx_buffer_length); - nrf_uarte_task_trigger(p_instance->reg.p_uarte, NRF_UARTE_TASK_STARTTX); - - if (p_cb->handler == NULL) - { - bool endtx; - bool txstopped; - do - { - endtx = nrf_uarte_event_check(p_instance->reg.p_uarte, NRF_UARTE_EVENT_ENDTX); - txstopped = nrf_uarte_event_check(p_instance->reg.p_uarte, NRF_UARTE_EVENT_TXSTOPPED); - } - while ((!endtx) && (!txstopped)); - - if (txstopped) - { - err_code = NRF_ERROR_FORBIDDEN; - } - p_cb->tx_buffer_length = 0; - } - return err_code; -} -#endif - -ret_code_t nrf_drv_uart_tx(const nrf_drv_uart_t * p_instance, uint8_t const * const p_data, uint8_t length) -{ - uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - ASSERT(p_cb->state == NRF_DRV_STATE_INITIALIZED); - ASSERT(length>0); - ASSERT(p_data); - - ret_code_t err_code; - - CODE_FOR_UARTE - ( - // EasyDMA requires that transfer buffers are placed in DataRAM, - // signal error if the are not. - if (!nrf_drv_is_in_RAM(p_data)) - { - err_code = NRF_ERROR_INVALID_ADDR; - NRF_LOG_ERROR("Id:%d, Easy-DMA buffer not in RAM: %08x", - nrf_drv_get_IRQn((void *)p_instance->reg.p_reg), p_data); - return err_code; - } - ) - - if (nrf_drv_uart_tx_in_progress(p_instance)) - { - err_code = NRF_ERROR_BUSY; - NRF_LOG_WARNING("Id:%d busy",nrf_drv_get_IRQn((void *)p_instance->reg.p_reg)); - return err_code; - } - p_cb->tx_buffer_length = length; - p_cb->p_tx_buffer = p_data; - p_cb->tx_counter = 0; - - NRF_LOG_INFO("TX req id:%d length: %d.", - nrf_drv_get_IRQn((void *)p_instance->reg.p_reg), - p_cb->tx_buffer_length); - NRF_LOG_DEBUG("Tx data:"); - NRF_LOG_HEXDUMP_DEBUG((uint8_t *)p_cb->p_tx_buffer, - p_cb->tx_buffer_length * sizeof(p_cb->p_tx_buffer[0])); - - CODE_FOR_UARTE - ( - return nrf_drv_uart_tx_for_uarte(p_instance); - ) - CODE_FOR_UART - ( - return nrf_drv_uart_tx_for_uart(p_instance); - ) -} - -bool nrf_drv_uart_tx_in_progress(const nrf_drv_uart_t * p_instance) -{ - return (m_cb[p_instance->drv_inst_idx].tx_buffer_length != 0); -} - -#if defined(UART_IN_USE) -__STATIC_INLINE void rx_enable(const nrf_drv_uart_t * p_instance) -{ - nrf_uart_event_clear(p_instance->reg.p_uart, NRF_UART_EVENT_ERROR); - nrf_uart_event_clear(p_instance->reg.p_uart, NRF_UART_EVENT_RXDRDY); - nrf_uart_task_trigger(p_instance->reg.p_uart, NRF_UART_TASK_STARTRX); -} - -__STATIC_INLINE void rx_byte(NRF_UART_Type * p_uart, uart_control_block_t * p_cb) -{ - if (!p_cb->rx_buffer_length) - { - nrf_uart_event_clear(p_uart, NRF_UART_EVENT_RXDRDY); - // Byte received when buffer is not set - data lost. - (void) nrf_uart_rxd_get(p_uart); - return; - } - nrf_uart_event_clear(p_uart, NRF_UART_EVENT_RXDRDY); - p_cb->p_rx_buffer[p_cb->rx_counter] = nrf_uart_rxd_get(p_uart); - p_cb->rx_counter++; -} - -__STATIC_INLINE ret_code_t nrf_drv_uart_rx_for_uart(const nrf_drv_uart_t * p_instance, uint8_t * p_data, uint8_t length, bool second_buffer) -{ - ret_code_t err_code; - - uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - - if ((!p_cb->rx_enabled) && (!second_buffer)) - { - rx_enable(p_instance); - } - - if (p_cb->handler == NULL) - { - nrf_uart_event_clear(p_instance->reg.p_uart, NRF_UART_EVENT_RXTO); - - bool rxrdy; - bool rxto; - bool error; - do - { - do - { - error = nrf_uart_event_check(p_instance->reg.p_uart, NRF_UART_EVENT_ERROR); - rxrdy = nrf_uart_event_check(p_instance->reg.p_uart, NRF_UART_EVENT_RXDRDY); - rxto = nrf_uart_event_check(p_instance->reg.p_uart, NRF_UART_EVENT_RXTO); - } while ((!rxrdy) && (!rxto) && (!error)); - - if (error || rxto) - { - break; - } - rx_byte(p_instance->reg.p_uart, p_cb); - } while (p_cb->rx_buffer_length > p_cb->rx_counter); - - p_cb->rx_buffer_length = 0; - if (error) - { - err_code = NRF_ERROR_INTERNAL; - NRF_LOG_WARNING("RX Id: %d, transfer error.", nrf_drv_get_IRQn((void *)p_instance->reg.p_reg)); - return err_code; - } - - if (rxto) - { - NRF_LOG_WARNING("RX Id: %d, aborted.", nrf_drv_get_IRQn((void *)p_instance->reg.p_reg)); - err_code = NRF_ERROR_FORBIDDEN; - return err_code; - } - - if (p_cb->rx_enabled) - { - nrf_uart_task_trigger(p_instance->reg.p_uart, NRF_UART_TASK_STARTRX); - } - else - { - // Skip stopping RX if driver is forced to be enabled. - nrf_uart_task_trigger(p_instance->reg.p_uart, NRF_UART_TASK_STOPRX); - } - } - else - { - nrf_uart_int_enable(p_instance->reg.p_uart, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR); - } - err_code = NRF_SUCCESS; - return err_code; -} -#endif - -#if defined(UARTE_IN_USE) -__STATIC_INLINE ret_code_t nrf_drv_uart_rx_for_uarte(const nrf_drv_uart_t * p_instance, uint8_t * p_data, uint8_t length, bool second_buffer) -{ - ret_code_t err_code = NRF_SUCCESS; - nrf_uarte_event_clear(p_instance->reg.p_uarte, NRF_UARTE_EVENT_ENDRX); - nrf_uarte_event_clear(p_instance->reg.p_uarte, NRF_UARTE_EVENT_RXTO); - nrf_uarte_rx_buffer_set(p_instance->reg.p_uarte, p_data, length); - if (!second_buffer) - { - nrf_uarte_task_trigger(p_instance->reg.p_uarte, NRF_UARTE_TASK_STARTRX); - } - else - { - nrf_uarte_shorts_enable(p_instance->reg.p_uarte, NRF_UARTE_SHORT_ENDRX_STARTRX); - } - - if (m_cb[p_instance->drv_inst_idx].handler == NULL) - { - bool endrx; - bool rxto; - bool error; - do { - endrx = nrf_uarte_event_check(p_instance->reg.p_uarte, NRF_UARTE_EVENT_ENDRX); - rxto = nrf_uarte_event_check(p_instance->reg.p_uarte, NRF_UARTE_EVENT_RXTO); - error = nrf_uarte_event_check(p_instance->reg.p_uarte, NRF_UARTE_EVENT_ERROR); - }while ((!endrx) && (!rxto) && (!error)); - - m_cb[p_instance->drv_inst_idx].rx_buffer_length = 0; - - if (error) - { - err_code = NRF_ERROR_INTERNAL; - } - - if (rxto) - { - err_code = NRF_ERROR_FORBIDDEN; - } - } - else - { - nrf_uarte_int_enable(p_instance->reg.p_uarte, NRF_UARTE_INT_ERROR_MASK | NRF_UARTE_INT_ENDRX_MASK); - } - return err_code; -} -#endif - -ret_code_t nrf_drv_uart_rx(const nrf_drv_uart_t * p_instance, uint8_t * p_data, uint8_t length) -{ - uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - - ASSERT(m_cb[p_instance->drv_inst_idx].state == NRF_DRV_STATE_INITIALIZED); - ASSERT(length>0); - - ret_code_t err_code; - - CODE_FOR_UARTE - ( - // EasyDMA requires that transfer buffers are placed in DataRAM, - // signal error if the are not. - if (!nrf_drv_is_in_RAM(p_data)) - { - err_code = NRF_ERROR_INVALID_ADDR; - NRF_LOG_ERROR("Id:%d, Easy-DMA buffer not in RAM: %08x", - nrf_drv_get_IRQn((void *)p_instance->reg.p_reg), p_data); - return err_code; - } - ) - - bool second_buffer = false; - - if (p_cb->handler) - { - CODE_FOR_UARTE - ( - nrf_uarte_int_disable(p_instance->reg.p_uarte, NRF_UARTE_INT_ERROR_MASK | NRF_UARTE_INT_ENDRX_MASK); - ) - CODE_FOR_UART - ( - nrf_uart_int_disable(p_instance->reg.p_uart, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR); - ) - } - if (p_cb->rx_buffer_length != 0) - { - if (p_cb->rx_secondary_buffer_length != 0) - { - if (p_cb->handler) - { - CODE_FOR_UARTE - ( - nrf_uarte_int_enable(p_instance->reg.p_uarte, NRF_UARTE_INT_ERROR_MASK | NRF_UARTE_INT_ENDRX_MASK); - ) - CODE_FOR_UART - ( - nrf_uart_int_enable(p_instance->reg.p_uart, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR); - ) - } - err_code = NRF_ERROR_BUSY; - NRF_LOG_WARNING("RX Id:%d, busy", nrf_drv_get_IRQn((void *)p_instance->reg.p_reg)); - return err_code; - } - second_buffer = true; - } - - if (!second_buffer) - { - p_cb->rx_buffer_length = length; - p_cb->p_rx_buffer = p_data; - p_cb->rx_counter = 0; - p_cb->rx_secondary_buffer_length = 0; - } - else - { - p_cb->p_rx_secondary_buffer = p_data; - p_cb->rx_secondary_buffer_length = length; - } - - NRF_LOG_INFO("RX Id:%d len:%d", nrf_drv_get_IRQn((void *)p_instance->reg.p_reg), length); - - CODE_FOR_UARTE - ( - return nrf_drv_uart_rx_for_uarte(p_instance, p_data, length, second_buffer); - ) - CODE_FOR_UART - ( - return nrf_drv_uart_rx_for_uart(p_instance, p_data, length, second_buffer); - ) -} - -bool nrf_drv_uart_rx_ready(nrf_drv_uart_t const * p_instance) -{ - CODE_FOR_UARTE - ( - return nrf_uarte_event_check(p_instance->reg.p_uarte, NRF_UARTE_EVENT_ENDRX); - ) - CODE_FOR_UART - ( - return nrf_uart_event_check(p_instance->reg.p_uart, NRF_UART_EVENT_RXDRDY); - ) -} - -void nrf_drv_uart_rx_enable(const nrf_drv_uart_t * p_instance) -{ - //Easy dma mode does not support enabling receiver without setting up buffer. - CODE_FOR_UARTE - ( - ASSERT(false); - ) - CODE_FOR_UART - ( - if (!m_cb[p_instance->drv_inst_idx].rx_enabled) - { - rx_enable(p_instance); - m_cb[p_instance->drv_inst_idx].rx_enabled = true; - } - ) -} - -void nrf_drv_uart_rx_disable(const nrf_drv_uart_t * p_instance) -{ - //Easy dma mode does not support enabling receiver without setting up buffer. - CODE_FOR_UARTE - ( - ASSERT(false); - ) - CODE_FOR_UART - ( - nrf_uart_task_trigger(p_instance->reg.p_uart, NRF_UART_TASK_STOPRX); - m_cb[p_instance->drv_inst_idx].rx_enabled = false; - ) -} - -uint32_t nrf_drv_uart_errorsrc_get(const nrf_drv_uart_t * p_instance) -{ - uint32_t errsrc; - CODE_FOR_UARTE - ( - nrf_uarte_event_clear(p_instance->reg.p_uarte, NRF_UARTE_EVENT_ERROR); - errsrc = nrf_uarte_errorsrc_get_and_clear(p_instance->reg.p_uarte); - ) - CODE_FOR_UART - ( - nrf_uart_event_clear(p_instance->reg.p_uart, NRF_UART_EVENT_ERROR); - errsrc = nrf_uart_errorsrc_get_and_clear(p_instance->reg.p_uart); - ) - return errsrc; -} - -__STATIC_INLINE void rx_done_event(uart_control_block_t * p_cb, uint8_t bytes, uint8_t * p_data) -{ - nrf_drv_uart_event_t event; - - event.type = NRF_DRV_UART_EVT_RX_DONE; - event.data.rxtx.bytes = bytes; - event.data.rxtx.p_data = p_data; - - p_cb->handler(&event, p_cb->p_context); -} - -__STATIC_INLINE void tx_done_event(uart_control_block_t * p_cb, uint8_t bytes) -{ - nrf_drv_uart_event_t event; - - event.type = NRF_DRV_UART_EVT_TX_DONE; - event.data.rxtx.bytes = bytes; - event.data.rxtx.p_data = (uint8_t *)p_cb->p_tx_buffer; - - p_cb->tx_buffer_length = 0; - - NRF_LOG_INFO("TX done len:%d", bytes); - p_cb->handler(&event, p_cb->p_context); -} - -void nrf_drv_uart_tx_abort(const nrf_drv_uart_t * p_instance) -{ - uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - - CODE_FOR_UARTE - ( - nrf_uarte_event_clear(p_instance->reg.p_uarte, NRF_UARTE_EVENT_TXSTOPPED); - nrf_uarte_task_trigger(p_instance->reg.p_uarte, NRF_UARTE_TASK_STOPTX); - if (p_cb->handler == NULL) - { - while (!nrf_uarte_event_check(p_instance->reg.p_uarte, NRF_UARTE_EVENT_TXSTOPPED)); - } - ) - CODE_FOR_UART - ( - nrf_uart_task_trigger(p_instance->reg.p_uart, NRF_UART_TASK_STOPTX); - if (p_cb->handler) - { - tx_done_event(p_cb, p_cb->tx_counter); - } - else - { - p_cb->tx_counter = TX_COUNTER_ABORT_REQ_VALUE; - } - ) - NRF_LOG_INFO("TX abort Id:%d", nrf_drv_get_IRQn((void *)p_instance->reg.p_reg)); -} - -void nrf_drv_uart_rx_abort(const nrf_drv_uart_t * p_instance) -{ - CODE_FOR_UARTE - ( - nrf_uarte_task_trigger(p_instance->reg.p_uarte, NRF_UARTE_TASK_STOPRX); - ) - CODE_FOR_UART - ( - nrf_uart_int_disable(p_instance->reg.p_uart, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR); - nrf_uart_task_trigger(p_instance->reg.p_uart, NRF_UART_TASK_STOPRX); - ) - NRF_LOG_INFO("RX abort Id:%d", nrf_drv_get_IRQn((void *)p_instance->reg.p_reg)); -} - - -#if defined(UART_IN_USE) -__STATIC_INLINE void uart_irq_handler(NRF_UART_Type * p_uart, uart_control_block_t * p_cb) -{ - if (nrf_uart_int_enable_check(p_uart, NRF_UART_INT_MASK_ERROR) && - nrf_uart_event_check(p_uart, NRF_UART_EVENT_ERROR)) - { - nrf_drv_uart_event_t event; - nrf_uart_event_clear(p_uart, NRF_UART_EVENT_ERROR); - nrf_uart_int_disable(p_uart, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR); - if (!p_cb->rx_enabled) - { - nrf_uart_task_trigger(p_uart, NRF_UART_TASK_STOPRX); - } - event.type = NRF_DRV_UART_EVT_ERROR; - event.data.error.error_mask = nrf_uart_errorsrc_get_and_clear(p_uart); - event.data.error.rxtx.bytes = p_cb->rx_buffer_length; - event.data.error.rxtx.p_data = p_cb->p_rx_buffer; - - //abort transfer - p_cb->rx_buffer_length = 0; - p_cb->rx_secondary_buffer_length = 0; - - p_cb->handler(&event,p_cb->p_context); - } - else if (nrf_uart_int_enable_check(p_uart, NRF_UART_INT_MASK_RXDRDY) && - nrf_uart_event_check(p_uart, NRF_UART_EVENT_RXDRDY)) - { - rx_byte(p_uart, p_cb); - if (p_cb->rx_buffer_length == p_cb->rx_counter) - { - if (p_cb->rx_secondary_buffer_length) - { - uint8_t * p_data = p_cb->p_rx_buffer; - uint8_t rx_counter = p_cb->rx_counter; - - //Switch to secondary buffer. - p_cb->rx_buffer_length = p_cb->rx_secondary_buffer_length; - p_cb->p_rx_buffer = p_cb->p_rx_secondary_buffer; - p_cb->rx_secondary_buffer_length = 0; - p_cb->rx_counter = 0; - rx_done_event(p_cb, rx_counter, p_data); - } - else - { - if (!p_cb->rx_enabled) - { - nrf_uart_task_trigger(p_uart, NRF_UART_TASK_STOPRX); - } - nrf_uart_int_disable(p_uart, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR); - p_cb->rx_buffer_length = 0; - rx_done_event(p_cb, p_cb->rx_counter, p_cb->p_rx_buffer); - } - } - } - - if (nrf_uart_event_check(p_uart, NRF_UART_EVENT_TXDRDY)) - { - if (p_cb->tx_counter < (uint16_t) p_cb->tx_buffer_length) - { - tx_byte(p_uart, p_cb); - } - else - { - nrf_uart_event_clear(p_uart, NRF_UART_EVENT_TXDRDY); - if (p_cb->tx_buffer_length) - { - tx_done_event(p_cb, p_cb->tx_buffer_length); - } - } - } - - if (nrf_uart_event_check(p_uart, NRF_UART_EVENT_RXTO)) - { - nrf_uart_event_clear(p_uart, NRF_UART_EVENT_RXTO); - - // RXTO event may be triggered as a result of abort call. In th - if (p_cb->rx_enabled) - { - nrf_uart_task_trigger(p_uart, NRF_UART_TASK_STARTRX); - } - if (p_cb->rx_buffer_length) - { - p_cb->rx_buffer_length = 0; - rx_done_event(p_cb, p_cb->rx_counter, p_cb->p_rx_buffer); - } - } -} -#endif - -#if defined(UARTE_IN_USE) -__STATIC_INLINE void uarte_irq_handler(NRF_UARTE_Type * p_uarte, uart_control_block_t * p_cb) -{ - if (nrf_uarte_event_check(p_uarte, NRF_UARTE_EVENT_ERROR)) - { - nrf_drv_uart_event_t event; - - nrf_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_ERROR); - - event.type = NRF_DRV_UART_EVT_ERROR; - event.data.error.error_mask = nrf_uarte_errorsrc_get_and_clear(p_uarte); - event.data.error.rxtx.bytes = nrf_uarte_rx_amount_get(p_uarte); - event.data.error.rxtx.p_data = p_cb->p_rx_buffer; - - //abort transfer - p_cb->rx_buffer_length = 0; - p_cb->rx_secondary_buffer_length = 0; - - p_cb->handler(&event, p_cb->p_context); - } - else if (nrf_uarte_event_check(p_uarte, NRF_UARTE_EVENT_ENDRX)) - { - nrf_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_ENDRX); - uint8_t amount = nrf_uarte_rx_amount_get(p_uarte); - // If the transfer was stopped before completion, amount of transfered bytes - // will not be equal to the buffer length. Interrupted trunsfer is ignored. - if (amount == p_cb->rx_buffer_length) - { - if (p_cb->rx_secondary_buffer_length) - { - uint8_t * p_data = p_cb->p_rx_buffer; - nrf_uarte_shorts_disable(p_uarte, NRF_UARTE_SHORT_ENDRX_STARTRX); - p_cb->rx_buffer_length = p_cb->rx_secondary_buffer_length; - p_cb->p_rx_buffer = p_cb->p_rx_secondary_buffer; - p_cb->rx_secondary_buffer_length = 0; - rx_done_event(p_cb, amount, p_data); - } - else - { - p_cb->rx_buffer_length = 0; - rx_done_event(p_cb, amount, p_cb->p_rx_buffer); - } - } - } - - if (nrf_uarte_event_check(p_uarte, NRF_UARTE_EVENT_RXTO)) - { - nrf_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_RXTO); - if (p_cb->rx_buffer_length) - { - p_cb->rx_buffer_length = 0; - rx_done_event(p_cb, nrf_uarte_rx_amount_get(p_uarte), p_cb->p_rx_buffer); - } - } - - if (nrf_uarte_event_check(p_uarte, NRF_UARTE_EVENT_ENDTX)) - { - nrf_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_ENDTX); - if (p_cb->tx_buffer_length) - { - tx_done_event(p_cb, nrf_uarte_tx_amount_get(p_uarte)); - } - } -} -#endif - -#if UART0_ENABLED -IRQ_HANDLER(0) -{ - CODE_FOR_UARTE_INT - ( - UART0_INSTANCE_INDEX, - uarte_irq_handler(NRF_UARTE0, &m_cb[UART0_INSTANCE_INDEX]); - ) - CODE_FOR_UART - ( - uart_irq_handler(NRF_UART0, &m_cb[UART0_INSTANCE_INDEX]); - ) -} -#endif - -#if UART1_ENABLED -void UARTE1_IRQHandler(void) -{ - CODE_FOR_UARTE_INT - ( - UART1_INSTANCE_INDEX, - uarte_irq_handler(NRF_UARTE1, &m_cb[UART1_INSTANCE_INDEX]); - ) - CODE_FOR_UART - ( - uart_irq_handler(NRF_UART1, &m_cb[UART1_INSTANCE_INDEX]); - ) -} -#endif -#endif //NRF_MODULE_ENABLED(UART) - diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/uart/nrf_drv_uart.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/uart/nrf_drv_uart.h deleted file mode 100644 index 3821922178f..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/uart/nrf_drv_uart.h +++ /dev/null @@ -1,465 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/**@file - * @addtogroup nrf_uart UART driver and HAL - * @ingroup nrf_drivers - * @brief UART API. - * @details The UART driver provides APIs for utilizing the UART peripheral. - * - * @defgroup nrf_drv_uart UART driver - * @{ - * @ingroup nrf_uart - * - * @brief UART driver. - */ - -#ifndef NRF_DRV_UART_H -#define NRF_DRV_UART_H - -#include "nrf_peripherals.h" - -#ifdef UART_PRESENT -#include "nrf_uart.h" -#endif - -#ifdef UARTE_PRESENT -#include "nrf_uarte.h" -#endif - -#include "sdk_errors.h" -#include "sdk_config.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#ifndef UART1_ENABLED -#define UART1_ENABLED 0 -#endif - -#ifndef UART0_ENABLED -#define UART0_ENABLED 0 -#endif - -#define UART0_INSTANCE_INDEX 0 -#define UART1_INSTANCE_INDEX UART0_ENABLED -#define UART_ENABLED_COUNT UART0_ENABLED + UART1_ENABLED - -#if defined(UARTE_PRESENT) && defined(UART_PRESENT) - #define NRF_DRV_UART_PERIPHERAL(id) \ - (CONCAT_3(UART, id, _CONFIG_USE_EASY_DMA) == 1 ? \ - (void *)CONCAT_2(NRF_UARTE, id) \ - : (void *)CONCAT_2(NRF_UART, id)) -#elif defined(UART_PRESENT) - #define NRF_DRV_UART_PERIPHERAL(id) (void *)CONCAT_2(NRF_UART, id) -#else //UARTE_PRESENT !UART_PRESENT - #define NRF_DRV_UART_PERIPHERAL(id) (void *)CONCAT_2(NRF_UARTE, id) -#endif - -// This set of macros makes it possible to exclude parts of code, when one type -// of supported peripherals is not used. - -#if defined(UARTE_PRESENT) && defined(UART_PRESENT) - -#if (UART_EASY_DMA_SUPPORT == 1) -#define UARTE_IN_USE -#endif - -#if (UART_LEGACY_SUPPORT == 1) -#define UART_IN_USE -#endif - -#if (UART_ENABLED == 1) && ((!defined(UARTE_IN_USE) && !defined(UART_IN_USE)) || ((UART_EASY_DMA_SUPPORT == 0) && (UART_LEGACY_SUPPORT == 0))) -#error "Illegal settings in uart module!" -#endif - -#elif defined(UART_PRESENT) -#define UART_IN_USE -#elif defined(UARTE_PRESENT) -#define UARTE_IN_USE -#endif - -#if defined(UARTE_PRESENT) && !defined(UART_PRESENT) -typedef nrf_uarte_hwfc_t nrf_uart_hwfc_t; -typedef nrf_uarte_parity_t nrf_uart_parity_t; -typedef nrf_uarte_baudrate_t nrf_uart_baudrate_t; -typedef nrf_uarte_error_mask_t nrf_uart_error_mask_t; -typedef nrf_uarte_task_t nrf_uart_task_t; -typedef nrf_uarte_event_t nrf_uart_event_t; -#ifndef NRF_UART_PSEL_DISCONNECTED -#define NRF_UART_PSEL_DISCONNECTED 0xFFFFFFFF -#endif -#endif - -/** - * @brief Structure for the UART driver instance. - */ -typedef struct -{ - union - { -#if (defined(UARTE_IN_USE)) - NRF_UARTE_Type * p_uarte; ///< Pointer to a structure with UARTE registers. -#endif -#if (defined(UART_IN_USE) || (UART_ENABLED == 0)) - NRF_UART_Type * p_uart; ///< Pointer to a structure with UART registers. -#endif - void * p_reg; - } reg; - uint8_t drv_inst_idx; ///< Driver instance index. -} nrf_drv_uart_t; - -/** - * @brief Macro for creating an UART driver instance. - */ -#define NRF_DRV_UART_INSTANCE(id) \ -{ \ - .reg = {NRF_DRV_UART_PERIPHERAL(id)}, \ - .drv_inst_idx = CONCAT_3(UART, id, _INSTANCE_INDEX),\ -} - -/** - * @brief Types of UART driver events. - */ -typedef enum -{ - NRF_DRV_UART_EVT_TX_DONE, ///< Requested TX transfer completed. - NRF_DRV_UART_EVT_RX_DONE, ///< Requested RX transfer completed. - NRF_DRV_UART_EVT_ERROR, ///< Error reported by UART peripheral. -} nrf_drv_uart_evt_type_t; - -/**@brief Structure for UART configuration. */ -typedef struct -{ - uint32_t pseltxd; ///< TXD pin number. - uint32_t pselrxd; ///< RXD pin number. - uint32_t pselcts; ///< CTS pin number. - uint32_t pselrts; ///< RTS pin number. - void * p_context; ///< Context passed to interrupt handler. - nrf_uart_hwfc_t hwfc; ///< Flow control configuration. - nrf_uart_parity_t parity; ///< Parity configuration. - nrf_uart_baudrate_t baudrate; ///< Baudrate. - uint8_t interrupt_priority; ///< Interrupt priority. -#ifdef UARTE_PRESENT - bool use_easy_dma; -#endif -} nrf_drv_uart_config_t; - -/**@brief UART default configuration. */ -#ifdef UARTE_PRESENT -#if !UART_LEGACY_SUPPORT -#define DEFAULT_CONFIG_USE_EASY_DMA true -#elif !UART_EASY_DMA_SUPPORT -#define DEFAULT_CONFIG_USE_EASY_DMA false -#else -#define DEFAULT_CONFIG_USE_EASY_DMA UART0_USE_EASY_DMA -#endif -#define NRF_DRV_UART_DEFAULT_CONFIG \ - { \ - .pseltxd = NRF_UART_PSEL_DISCONNECTED, \ - .pselrxd = NRF_UART_PSEL_DISCONNECTED, \ - .pselcts = NRF_UART_PSEL_DISCONNECTED, \ - .pselrts = NRF_UART_PSEL_DISCONNECTED, \ - .p_context = NULL, \ - .hwfc = (nrf_uart_hwfc_t)UART_DEFAULT_CONFIG_HWFC, \ - .parity = (nrf_uart_parity_t)UART_DEFAULT_CONFIG_PARITY, \ - .baudrate = (nrf_uart_baudrate_t)UART_DEFAULT_CONFIG_BAUDRATE, \ - .interrupt_priority = UART_DEFAULT_CONFIG_IRQ_PRIORITY, \ - .use_easy_dma = true \ - } -#else -#define NRF_DRV_UART_DEFAULT_CONFIG \ - { \ - .pseltxd = NRF_UART_PSEL_DISCONNECTED, \ - .pselrxd = NRF_UART_PSEL_DISCONNECTED, \ - .pselcts = NRF_UART_PSEL_DISCONNECTED, \ - .pselrts = NRF_UART_PSEL_DISCONNECTED, \ - .p_context = NULL, \ - .hwfc = (nrf_uart_hwfc_t)UART_DEFAULT_CONFIG_HWFC, \ - .parity = (nrf_uart_parity_t)UART_DEFAULT_CONFIG_PARITY, \ - .baudrate = (nrf_uart_baudrate_t)UART_DEFAULT_CONFIG_BAUDRATE, \ - .interrupt_priority = UART_DEFAULT_CONFIG_IRQ_PRIORITY, \ - } -#endif - -/**@brief Structure for UART transfer completion event. */ -typedef struct -{ - uint8_t * p_data; ///< Pointer to memory used for transfer. - uint8_t bytes; ///< Number of bytes transfered. -} nrf_drv_uart_xfer_evt_t; - -/**@brief Structure for UART error event. */ -typedef struct -{ - nrf_drv_uart_xfer_evt_t rxtx; ///< Transfer details includes number of bytes transfered. - uint32_t error_mask;///< Mask of error flags that generated the event. -} nrf_drv_uart_error_evt_t; - -/**@brief Structure for UART event. */ -typedef struct -{ - nrf_drv_uart_evt_type_t type; ///< Event type. - union - { - nrf_drv_uart_xfer_evt_t rxtx; ///< Data provided for transfer completion events. - nrf_drv_uart_error_evt_t error;///< Data provided for error event. - } data; -} nrf_drv_uart_event_t; - -/** - * @brief UART interrupt event handler. - * - * @param[in] p_event Pointer to event structure. Event is allocated on the stack so it is available - * only within the context of the event handler. - * @param[in] p_context Context passed to interrupt handler, set on initialization. - */ -typedef void (*nrf_uart_event_handler_t)(nrf_drv_uart_event_t * p_event, void * p_context); - -/** - * @brief Function for initializing the UART driver. - * - * This function configures and enables UART. After this function GPIO pins are controlled by UART. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] p_config Initial configuration. - * @param[in] event_handler Event handler provided by the user. If not provided driver works in - * blocking mode. - * - * @retval NRF_SUCCESS If initialization was successful. - * @retval NRF_ERROR_INVALID_STATE If driver is already initialized. - */ -ret_code_t nrf_drv_uart_init(nrf_drv_uart_t const * p_instance, - nrf_drv_uart_config_t const * p_config, - nrf_uart_event_handler_t event_handler); - -/** - * @brief Function for uninitializing the UART driver. - * @param[in] p_instance Pointer to the driver instance structure. - */ -void nrf_drv_uart_uninit(nrf_drv_uart_t const * p_instance); - -/** - * @brief Function for getting the address of a specific UART task. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] task Task. - * - * @return Task address. - */ -__STATIC_INLINE uint32_t nrf_drv_uart_task_address_get(nrf_drv_uart_t const * p_instance, - nrf_uart_task_t task); - -/** - * @brief Function for getting the address of a specific UART event. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] event Event. - * - * @return Event address. - */ -__STATIC_INLINE uint32_t nrf_drv_uart_event_address_get(nrf_drv_uart_t const * p_instance, - nrf_uart_event_t event); - -/** - * @brief Function for sending data over UART. - * - * If an event handler was provided in nrf_drv_uart_init() call, this function - * returns immediately and the handler is called when the transfer is done. - * Otherwise, the transfer is performed in blocking mode, i.e. this function - * returns when the transfer is finished. Blocking mode is not using interrupt so - * there is no context switching inside the function. - * - * @note Peripherals using EasyDMA (i.e. UARTE) require that the transfer buffers - * are placed in the Data RAM region. If they are not and UARTE instance is - * used, this function will fail with error code NRF_ERROR_INVALID_ADDR. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] p_data Pointer to data. - * @param[in] length Number of bytes to send. - * - * @retval NRF_SUCCESS If initialization was successful. - * @retval NRF_ERROR_BUSY If driver is already transferring. - * @retval NRF_ERROR_FORBIDDEN If the transfer was aborted from a different context - * (blocking mode only, also see @ref nrf_drv_uart_rx_disable). - * @retval NRF_ERROR_INVALID_ADDR If p_data does not point to RAM buffer (UARTE only). - */ -ret_code_t nrf_drv_uart_tx(nrf_drv_uart_t const * p_instance, - uint8_t const * const p_data, uint8_t length); - -/** - * @brief Function for checking if UART is currently transmitting. - * - * @param[in] p_instance Pointer to the driver instance structure. - * - * @retval true If UART is transmitting. - * @retval false If UART is not transmitting. - */ -bool nrf_drv_uart_tx_in_progress(nrf_drv_uart_t const * p_instance); - -/** - * @brief Function for aborting any ongoing transmission. - * @note @ref NRF_DRV_UART_EVT_TX_DONE event will be generated in non-blocking mode. Event will - * contain number of bytes sent until abort was called. If Easy DMA is not used event will be - * called from the function context. If Easy DMA is used it will be called from UART interrupt - * context. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -void nrf_drv_uart_tx_abort(nrf_drv_uart_t const * p_instance); - -/** - * @brief Function for receiving data over UART. - * - * If an event handler was provided in the nrf_drv_uart_init() call, this function - * returns immediately and the handler is called when the transfer is done. - * Otherwise, the transfer is performed in blocking mode, i.e. this function - * returns when the transfer is finished. Blocking mode is not using interrupt so - * there is no context switching inside the function. - * The receive buffer pointer is double buffered in non-blocking mode. The secondary - * buffer can be set immediately after starting the transfer and will be filled - * when the primary buffer is full. The double buffering feature allows - * receiving data continuously. - * - * @note Peripherals using EasyDMA (i.e. UARTE) require that the transfer buffers - * are placed in the Data RAM region. If they are not and UARTE driver instance - * is used, this function will fail with error code NRF_ERROR_INVALID_ADDR. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] p_data Pointer to data. - * @param[in] length Number of bytes to receive. - * - * @retval NRF_SUCCESS If initialization was successful. - * @retval NRF_ERROR_BUSY If the driver is already receiving - * (and the secondary buffer has already been set - * in non-blocking mode). - * @retval NRF_ERROR_FORBIDDEN If the transfer was aborted from a different context - * (blocking mode only, also see @ref nrf_drv_uart_rx_disable). - * @retval NRF_ERROR_INTERNAL If UART peripheral reported an error. - * @retval NRF_ERROR_INVALID_ADDR If p_data does not point to RAM buffer (UARTE only). - */ -ret_code_t nrf_drv_uart_rx(nrf_drv_uart_t const * p_instance, - uint8_t * p_data, uint8_t length); - - - -/** - * @brief Function for testing the receiver state in blocking mode. - * - * @param[in] p_instance Pointer to the driver instance structure. - * - * @retval true If the receiver has at least one byte of data to get. - * @retval false If the receiver is empty. - */ -bool nrf_drv_uart_rx_ready(nrf_drv_uart_t const * p_instance); - -/** - * @brief Function for enabling the receiver. - * - * UART has a 6-byte-long RX FIFO and it is used to store incoming data. If a user does not call the - * UART receive function before the FIFO is filled, an overrun error will appear. Enabling the receiver - * without specifying an RX buffer is supported only in UART mode (without Easy DMA). The receiver must be - * explicitly closed by the user @sa nrf_drv_uart_rx_disable. This function asserts if the mode is wrong. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -void nrf_drv_uart_rx_enable(nrf_drv_uart_t const * p_instance); - -/** - * @brief Function for disabling the receiver. - * - * This function must be called to close the receiver after it has been explicitly enabled by - * @sa nrf_drv_uart_rx_enable. The feature is supported only in UART mode (without Easy DMA). The function - * asserts if mode is wrong. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -void nrf_drv_uart_rx_disable(nrf_drv_uart_t const * p_instance); - -/** - * @brief Function for aborting any ongoing reception. - * @note @ref NRF_DRV_UART_EVT_RX_DONE event will be generated in non-blocking mode. The event will - * contain the number of bytes received until abort was called. The event is called from UART interrupt - * context. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -void nrf_drv_uart_rx_abort(nrf_drv_uart_t const * p_instance); - -/** - * @brief Function for reading error source mask. Mask contains values from @ref nrf_uart_error_mask_t. - * @note Function should be used in blocking mode only. In case of non-blocking mode, an error event is - * generated. Function clears error sources after reading. - * - * @param[in] p_instance Pointer to the driver instance structure. - * - * @retval Mask of reported errors. - */ -uint32_t nrf_drv_uart_errorsrc_get(nrf_drv_uart_t const * p_instance); - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION -__STATIC_INLINE uint32_t nrf_drv_uart_task_address_get(nrf_drv_uart_t const * p_instance, - nrf_uart_task_t task) -{ -#ifdef UART_IN_USE - return nrf_uart_task_address_get(p_instance->reg.p_uart, task); -#else - return nrf_uarte_task_address_get(p_instance->reg.p_uarte, (nrf_uarte_task_t)task); -#endif -} - -__STATIC_INLINE uint32_t nrf_drv_uart_event_address_get(nrf_drv_uart_t const * p_instance, - nrf_uart_event_t event) -{ -#ifdef UART_IN_USE - return nrf_uart_event_address_get(p_instance->reg.p_uart, event); -#else - return nrf_uarte_event_address_get(p_instance->reg.p_uarte, (nrf_uarte_event_t)event); -#endif -} -#endif //SUPPRESS_INLINE_IMPLEMENTATION - -#ifdef __cplusplus -} -#endif - -#endif //NRF_DRV_UART_H -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c deleted file mode 100644 index 3b6a151d7a1..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c +++ /dev/null @@ -1,2220 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "sdk_config.h" -#if USBD_ENABLED -#include "nrf_drv_usbd.h" -#include "nrf.h" -#include "nordic_common.h" -#include "nrf_drv_common.h" -#include "nrf_atomic.h" -#include "nrf_delay.h" -#include "app_util_platform.h" -#include "nrf_drv_systick.h" /* Marker to delete when not required anymore: >> NRF_DRV_USBD_ERRATA_ENABLE << */ - -#include -#include - -#define NRF_LOG_MODULE_NAME USBD - -#if USBD_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL USBD_CONFIG_LOG_LEVEL -#define NRF_LOG_INFO_COLOR USBD_CONFIG_INFO_COLOR -#define NRF_LOG_DEBUG_COLOR USBD_CONFIG_DEBUG_COLOR -#else //USBD_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL 0 -#endif //USBD_CONFIG_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - -#ifndef NRF_DRV_USBD_EARLY_DMA_PROCESS -/* Try to process DMA request when endpoint transmission has been detected - * and just after last EasyDMA has been processed. - * It speeds up the transmission a little (about 10% measured) - * with a cost of more CPU power used. - */ -#define NRF_DRV_USBD_EARLY_DMA_PROCESS 1 -#endif - -#ifndef NRF_DRV_USBD_PROTO1_FIX_DEBUG -/* Debug information when events are fixed*/ -#define NRF_DRV_USBD_PROTO1_FIX_DEBUG 1 -#endif - -#define NRF_DRV_USBD_LOG_PROTO1_FIX_PRINTF(...) \ - do{ \ - if (NRF_DRV_USBD_PROTO1_FIX_DEBUG){ NRF_LOG_DEBUG(__VA_ARGS__); }\ - } while (0) - -#ifndef NRF_DRV_USBD_STARTED_EV_ENABLE -#define NRF_DRV_USBD_STARTED_EV_ENABLE 1 -#endif - -#ifndef NRF_USBD_ISO_DEBUG -/* Also generate information about ISOCHRONOUS events and transfers. - * Turn this off if no ISOCHRONOUS transfers are going to be debugged and this - * option generates a lot of useless messages. */ -#define NRF_USBD_ISO_DEBUG 1 -#endif - -#ifndef NRF_USBD_FAILED_TRANSFERS_DEBUG -/* Also generate debug information for failed transfers. - * It might be useful but may generate a lot of useless debug messages - * in some library usages (for example when transfer is generated and the - * result is used to check whatever endpoint was busy. */ -#define NRF_USBD_FAILED_TRANSFERS_DEBUG 1 -#endif - -#ifndef NRF_USBD_DMAREQ_PROCESS_DEBUG -/* Generate additional messages that mark the status inside - * @ref usbd_dmareq_process. - * It is useful to debug library internals but may generate a lot of - * useless debug messages. */ -#define NRF_USBD_DMAREQ_PROCESS_DEBUG 1 -#endif - - -/** - * @defgroup nrf_drv_usbd_int USB Device driver internal part - * @internal - * @ingroup nrf_drv_usbd - * - * This part contains auxiliary internal macros, variables and functions. - * @{ - */ - -/** - * @brief Assert endpoint number validity - * - * Internal macro to be used during program creation in debug mode. - * Generates assertion if endpoint number is not valid. - * - * @param ep Endpoint number to validity check - */ -#define USBD_ASSERT_EP_VALID(ep) ASSERT( \ - ((NRF_USBD_EPIN_CHECK(ep) && (NRF_USBD_EP_NR_GET(ep) < NRF_USBD_EPIN_CNT )) \ - || \ - (NRF_USBD_EPOUT_CHECK(ep) && (NRF_USBD_EP_NR_GET(ep) < NRF_USBD_EPOUT_CNT))) \ -); - -/** - * @brief Lowest position of bit for IN endpoint - * - * The first bit position corresponding to IN endpoint. - * @sa ep2bit bit2ep - */ -#define USBD_EPIN_BITPOS_0 0 - -/** - * @brief Lowest position of bit for OUT endpoint - * - * The first bit position corresponding to OUT endpoint - * @sa ep2bit bit2ep - */ -#define USBD_EPOUT_BITPOS_0 16 - -/** - * @brief Input endpoint bits mask - */ -#define USBD_EPIN_BIT_MASK (0xFFFFU << USBD_EPIN_BITPOS_0) - -/** - * @brief Output endpoint bits mask - */ -#define USBD_EPOUT_BIT_MASK (0xFFFFU << USBD_EPOUT_BITPOS_0) - -/** - * @brief Auxiliary macro to change EP number into bit position - * - * This macro is used by @ref ep2bit function but also for statically check - * the bitpos values integrity during compilation. - * - * @param[in] ep Endpoint number. - * @return Endpoint bit position. - */ -#define USBD_EP_BITPOS(ep) \ - ((NRF_USBD_EPIN_CHECK(ep) ? USBD_EPIN_BITPOS_0 : USBD_EPOUT_BITPOS_0) + NRF_USBD_EP_NR_GET(ep)) - -/** - * @brief Helper macro for creating an endpoint transfer event. - * - * @param[in] name Name of the created transfer event variable. - * @param[in] endpoint Endpoint number. - * @param[in] ep_stat Endpoint state to report. - * - * @return Initialized event constant variable. - */ -#define NRF_DRV_USBD_EP_TRANSFER_EVENT(name, endpont, ep_stat) \ - const nrf_drv_usbd_evt_t name = { \ - NRF_DRV_USBD_EVT_EPTRANSFER, \ - .data = { \ - .eptransfer = { \ - .ep = endpont, \ - .status = ep_stat \ - } \ - } \ - } - -/* Check it the bit positions values match defined DATAEPSTATUS bit positions */ -STATIC_ASSERT(USBD_EP_BITPOS(NRF_DRV_USBD_EPIN1) == USBD_EPDATASTATUS_EPIN1_Pos ); -STATIC_ASSERT(USBD_EP_BITPOS(NRF_DRV_USBD_EPIN2) == USBD_EPDATASTATUS_EPIN2_Pos ); -STATIC_ASSERT(USBD_EP_BITPOS(NRF_DRV_USBD_EPIN3) == USBD_EPDATASTATUS_EPIN3_Pos ); -STATIC_ASSERT(USBD_EP_BITPOS(NRF_DRV_USBD_EPIN4) == USBD_EPDATASTATUS_EPIN4_Pos ); -STATIC_ASSERT(USBD_EP_BITPOS(NRF_DRV_USBD_EPIN5) == USBD_EPDATASTATUS_EPIN5_Pos ); -STATIC_ASSERT(USBD_EP_BITPOS(NRF_DRV_USBD_EPIN6) == USBD_EPDATASTATUS_EPIN6_Pos ); -STATIC_ASSERT(USBD_EP_BITPOS(NRF_DRV_USBD_EPIN7) == USBD_EPDATASTATUS_EPIN7_Pos ); -STATIC_ASSERT(USBD_EP_BITPOS(NRF_DRV_USBD_EPOUT1) == USBD_EPDATASTATUS_EPOUT1_Pos); -STATIC_ASSERT(USBD_EP_BITPOS(NRF_DRV_USBD_EPOUT2) == USBD_EPDATASTATUS_EPOUT2_Pos); -STATIC_ASSERT(USBD_EP_BITPOS(NRF_DRV_USBD_EPOUT3) == USBD_EPDATASTATUS_EPOUT3_Pos); -STATIC_ASSERT(USBD_EP_BITPOS(NRF_DRV_USBD_EPOUT4) == USBD_EPDATASTATUS_EPOUT4_Pos); -STATIC_ASSERT(USBD_EP_BITPOS(NRF_DRV_USBD_EPOUT5) == USBD_EPDATASTATUS_EPOUT5_Pos); -STATIC_ASSERT(USBD_EP_BITPOS(NRF_DRV_USBD_EPOUT6) == USBD_EPDATASTATUS_EPOUT6_Pos); -STATIC_ASSERT(USBD_EP_BITPOS(NRF_DRV_USBD_EPOUT7) == USBD_EPDATASTATUS_EPOUT7_Pos); - - -/** - * @name Internal auxiliary definitions for SETUP packet - * - * Definitions used to take out the information about last SETUP packet direction - * from @c bmRequestType. - * @{ - */ -/** The position of DIR bit in bmRequestType inside SETUP packet */ -#define USBD_DRV_REQUESTTYPE_DIR_BITPOS 7 -/** The mask of DIR bit in bmRequestType inside SETUP packet */ -#define USBD_DRV_REQUESTTYPE_DIR_MASK (1U << USBD_DRV_REQUESTTYPE_DIR_BITPOS) -/** The value of DIR bit for OUT direction (Host -> Device) */ -#define USBD_DRV_REQUESTTYPE_DIR_OUT (0U << USBD_DRV_REQUESTTYPE_DIR_BITPOS) -/** The value of DIR bit for IN direction (Device -> Host) */ -#define USBD_DRV_REQUESTTYPE_DIR_IN (1U << USBD_DRV_REQUESTTYPE_DIR_BITPOS) -/** @} */ - -/** - * @brief Current driver state - */ -static nrf_drv_state_t m_drv_state = NRF_DRV_STATE_UNINITIALIZED; - -/** - * @brief Event handler for the library - * - * Event handler that would be called on events. - * - * @note Currently it cannot be null if any interrupt is activated. - */ -static nrf_drv_usbd_event_handler_t m_event_handler; - -/** - * @brief Detected state of the bus - * - * Internal state changed in interrupts handling when - * RESUME or SUSPEND event is processed. - * - * Values: - * - true - bus suspended - * - false - ongoing normal communication on the bus - * - * @note This is only the bus state and does not mean that the peripheral is in suspend state. - */ -static volatile bool m_bus_suspend; - -/** - * @brief Internal constant that contains interrupts disabled in suspend state - * - * Internal constant used in @ref nrf_drv_usbd_suspend_irq_config and @ref nrf_drv_usbd_active_irq_config - * functions. - */ -static const uint32_t m_irq_disabled_in_suspend = - NRF_USBD_INT_ENDEPIN0_MASK | - NRF_USBD_INT_EP0DATADONE_MASK | - NRF_USBD_INT_ENDEPOUT0_MASK | - NRF_USBD_INT_EP0SETUP_MASK | - NRF_USBD_INT_DATAEP_MASK; - -/** - * @brief Direction of last received Setup transfer - * - * This variable is used to redirect internal setup data event - * into selected endpoint (IN or OUT). - */ -static nrf_drv_usbd_ep_t m_last_setup_dir; - -/** - * @brief Mark endpoint readiness for DMA transfer - * - * Bits in this variable are cleared and set in interrupts. - * 1 means that endpoint is ready for DMA transfer. - * 0 means that DMA transfer cannot be performed on selected endpoint. - */ -static uint32_t m_ep_ready; - -/** - * @brief Mark endpoint with prepared data to transfer by DMA - * - * This variable can be from any place in the code (interrupt or main thread). - * It would be cleared only from USBD interrupt. - * - * Mask prepared USBD data for transmission. - * It is cleared when no more data to transmit left. - */ -static uint32_t m_ep_dma_waiting; - -/** - * @brief Current EasyDMA state - * - * Single flag, updated only inside interrupts, that marks current EasyDMA state. - * In USBD there is only one DMA channel working in background, and new transfer - * cannot be started when there is ongoing transfer on any other channel. - */ -static uint8_t m_dma_pending; - -/** - * @brief Simulated data EP status bits required for errata 104 - * - * Marker to delete when not required anymore: >> NRF_DRV_USBD_ERRATA_ENABLE << - */ -static uint32_t m_simulated_dataepstatus; - -/** - * @brief The structure that would hold transfer configuration to every endpoint - * - * The structure that holds all the data required by the endpoint to proceed - * with LIST functionality and generate quick callback directly when data - * buffer is ready. - */ -typedef struct -{ - nrf_drv_usbd_handler_t handler; //!< Handler for current transfer, function pointer - void * p_context; //!< Context for transfer handler - size_t transfer_cnt; //!< Number of transferred bytes in the current transfer - uint16_t max_packet_size; //!< Configured endpoint size - nrf_drv_usbd_ep_status_t status; //!< NRF_SUCCESS or error code, never NRF_ERROR_BUSY - this one is calculated -}usbd_drv_ep_state_t; - -/** - * @brief The array of transfer configurations for the endpoints. - * - * The status of the transfer on each endpoint. - */ -static struct -{ - usbd_drv_ep_state_t ep_out[NRF_USBD_EPOUT_CNT]; //!< Status for OUT endpoints. - usbd_drv_ep_state_t ep_in [NRF_USBD_EPIN_CNT ]; //!< Status for IN endpoints. -}m_ep_state; - -/** - * @brief Status variables for integrated feeders. - * - * Current status for integrated feeders (IN transfers). - * Integrated feeders are used for default transfers: - * 1. Simple RAM transfer - * 2. Simple flash transfer - * 3. RAM transfer with automatic ZLP - * 4. Flash transfer with automatic ZLP - */ -nrf_drv_usbd_transfer_t m_ep_feeder_state[NRF_USBD_EPIN_CNT]; - -/** - * @brief Status variables for integrated consumers - * - * Current status for integrated consumers - * Currently one type of transfer is supported: - * 1. Transfer to RAM - * - * Transfer is finished automatically when received data block is smaller - * than the endpoint buffer or all the required data is received. - */ -nrf_drv_usbd_transfer_t m_ep_consumer_state[NRF_USBD_EPOUT_CNT]; - - -/** - * @brief Buffer used to send data directly from FLASH - * - * This is internal buffer that would be used to emulate the possibility - * to transfer data directly from FLASH. - * We do not have to care about the source of data when calling transfer functions. - * - * We do not need more buffers that one, because only one transfer can be pending - * at once. - */ -static uint32_t m_tx_buffer[CEIL_DIV( - NRF_DRV_USBD_FEEDER_BUFFER_SIZE, sizeof(uint32_t))]; - - -/* Early declaration. Documentation above definition. */ -static void usbd_dmareq_process(void); - - -/** - * @brief Change endpoint number to endpoint event code - * - * @param ep Endpoint number - * - * @return Connected endpoint event code. - * - * Marker to delete when not required anymore: >> NRF_DRV_USBD_ERRATA_ENABLE << - */ -static inline nrf_usbd_event_t nrf_drv_usbd_ep_to_endevent(nrf_drv_usbd_ep_t ep) -{ - USBD_ASSERT_EP_VALID(ep); - - static const nrf_usbd_event_t epin_endev[] = - { - NRF_USBD_EVENT_ENDEPIN0, - NRF_USBD_EVENT_ENDEPIN1, - NRF_USBD_EVENT_ENDEPIN2, - NRF_USBD_EVENT_ENDEPIN3, - NRF_USBD_EVENT_ENDEPIN4, - NRF_USBD_EVENT_ENDEPIN5, - NRF_USBD_EVENT_ENDEPIN6, - NRF_USBD_EVENT_ENDEPIN7, - NRF_USBD_EVENT_ENDISOIN0 - }; - static const nrf_usbd_event_t epout_endev[] = - { - NRF_USBD_EVENT_ENDEPOUT0, - NRF_USBD_EVENT_ENDEPOUT1, - NRF_USBD_EVENT_ENDEPOUT2, - NRF_USBD_EVENT_ENDEPOUT3, - NRF_USBD_EVENT_ENDEPOUT4, - NRF_USBD_EVENT_ENDEPOUT5, - NRF_USBD_EVENT_ENDEPOUT6, - NRF_USBD_EVENT_ENDEPOUT7, - NRF_USBD_EVENT_ENDISOOUT0 - }; - - return (NRF_USBD_EPIN_CHECK(ep) ? epin_endev : epout_endev)[NRF_USBD_EP_NR_GET(ep)]; -} - - -/** - * @brief Get interrupt mask for selected endpoint - * - * @param[in] ep Endpoint number - * - * @return Interrupt mask related to the EasyDMA transfer end for the - * chosen endpoint. - */ -static inline uint32_t nrf_drv_usbd_ep_to_int(nrf_drv_usbd_ep_t ep) -{ - USBD_ASSERT_EP_VALID(ep); - - static const uint8_t epin_bitpos[] = - { - USBD_INTEN_ENDEPIN0_Pos, - USBD_INTEN_ENDEPIN1_Pos, - USBD_INTEN_ENDEPIN2_Pos, - USBD_INTEN_ENDEPIN3_Pos, - USBD_INTEN_ENDEPIN4_Pos, - USBD_INTEN_ENDEPIN5_Pos, - USBD_INTEN_ENDEPIN6_Pos, - USBD_INTEN_ENDEPIN7_Pos, - USBD_INTEN_ENDISOIN_Pos - }; - static const uint8_t epout_bitpos[] = - { - USBD_INTEN_ENDEPOUT0_Pos, - USBD_INTEN_ENDEPOUT1_Pos, - USBD_INTEN_ENDEPOUT2_Pos, - USBD_INTEN_ENDEPOUT3_Pos, - USBD_INTEN_ENDEPOUT4_Pos, - USBD_INTEN_ENDEPOUT5_Pos, - USBD_INTEN_ENDEPOUT6_Pos, - USBD_INTEN_ENDEPOUT7_Pos, - USBD_INTEN_ENDISOOUT_Pos - }; - - return 1UL << (NRF_USBD_EPIN_CHECK(ep) ? epin_bitpos : epout_bitpos)[NRF_USBD_EP_NR_GET(ep)]; -} - -/** - * @name Integrated feeders and consumers - * - * Internal, default functions for transfer processing. - * @{ - */ - -/** - * @brief Integrated consumer to RAM buffer. - * - * @param p_next See @ref nrf_drv_usbd_consumer_t documentation. - * @param p_context See @ref nrf_drv_usbd_consumer_t documentation. - * @param ep_size See @ref nrf_drv_usbd_consumer_t documentation. - * @param data_size See @ref nrf_drv_usbd_consumer_t documentation. - * - * @retval true Continue transfer. - * @retval false This was the last transfer. - */ -bool nrf_drv_usbd_consumer( - nrf_drv_usbd_ep_transfer_t * p_next, - void * p_context, - size_t ep_size, - size_t data_size) -{ - nrf_drv_usbd_transfer_t * p_transfer = p_context; - ASSERT(ep_size >= data_size); - ASSERT((p_transfer->p_data.rx == NULL) || - nrf_drv_is_in_RAM((const void*)(p_transfer->p_data.ptr))); - - size_t size = p_transfer->size; - if (size < data_size) - { - NRF_LOG_DEBUG("consumer: buffer too small: r: %u, l: %u", data_size, size); - /* Buffer size to small */ - p_next->size = 0; - p_next->p_data = p_transfer->p_data; - } - else - { - p_next->size = data_size; - p_next->p_data = p_transfer->p_data; - size -= data_size; - p_transfer->size = size; - p_transfer->p_data.ptr += data_size; - } - return (ep_size == data_size) && (size != 0); -} - -/** - * @brief Integrated feeder from RAM source. - * - * @param[out] p_next See @ref nrf_drv_usbd_feeder_t documentation. - * @param[in,out] p_context See @ref nrf_drv_usbd_feeder_t documentation. - * @param[in] ep_size See @ref nrf_drv_usbd_feeder_t documentation. - * - * @retval true Continue transfer. - * @retval false This was the last transfer. - */ -bool nrf_drv_usbd_feeder_ram( - nrf_drv_usbd_ep_transfer_t * p_next, - void * p_context, - size_t ep_size) -{ - nrf_drv_usbd_transfer_t * p_transfer = p_context; - ASSERT(nrf_drv_is_in_RAM((const void*)(p_transfer->p_data.ptr))); - - size_t tx_size = p_transfer->size; - if (tx_size > ep_size) - { - tx_size = ep_size; - } - - p_next->p_data = p_transfer->p_data; - p_next->size = tx_size; - - p_transfer->size -= tx_size; - p_transfer->p_data.ptr += tx_size; - - return (p_transfer->size != 0); -} - -/** - * @brief Integrated feeder from RAM source with ZLP. - * - * @param[out] p_next See @ref nrf_drv_usbd_feeder_t documentation. - * @param[in,out] p_context See @ref nrf_drv_usbd_feeder_t documentation. - * @param[in] ep_size See @ref nrf_drv_usbd_feeder_t documentation. - * - * @retval true Continue transfer. - * @retval false This was the last transfer. - */ -bool nrf_drv_usbd_feeder_ram_zlp( - nrf_drv_usbd_ep_transfer_t * p_next, - void * p_context, - size_t ep_size) -{ - nrf_drv_usbd_transfer_t * p_transfer = p_context; - ASSERT(nrf_drv_is_in_RAM((const void*)(p_transfer->p_data.ptr))); - - size_t tx_size = p_transfer->size; - if (tx_size > ep_size) - { - tx_size = ep_size; - } - - p_next->p_data.tx = (tx_size == 0) ? NULL : p_transfer->p_data.tx; - p_next->size = tx_size; - - p_transfer->size -= tx_size; - p_transfer->p_data.ptr += tx_size; - - return (tx_size != 0); -} - -/** - * @brief Integrated feeder from a flash source. - * - * @param[out] p_next See @ref nrf_drv_usbd_feeder_t documentation. - * @param[in,out] p_context See @ref nrf_drv_usbd_feeder_t documentation. - * @param[in] ep_size See @ref nrf_drv_usbd_feeder_t documentation. - * - * @retval true Continue transfer. - * @retval false This was the last transfer. - */ -bool nrf_drv_usbd_feeder_flash( - nrf_drv_usbd_ep_transfer_t * p_next, - void * p_context, - size_t ep_size) -{ - nrf_drv_usbd_transfer_t * p_transfer = p_context; - ASSERT(!nrf_drv_is_in_RAM((const void*)(p_transfer->p_data.ptr))); - - size_t tx_size = p_transfer->size; - void * p_buffer = nrf_drv_usbd_feeder_buffer_get(); - - if (tx_size > ep_size) - { - tx_size = ep_size; - } - - ASSERT(tx_size <= NRF_DRV_USBD_FEEDER_BUFFER_SIZE); - memcpy(p_buffer, (p_transfer->p_data.tx), tx_size); - - p_next->p_data.tx = p_buffer; - p_next->size = tx_size; - - p_transfer->size -= tx_size; - p_transfer->p_data.ptr += tx_size; - - return (p_transfer->size != 0); -} - -/** - * @brief Integrated feeder from a flash source with ZLP. - * - * @param[out] p_next See @ref nrf_drv_usbd_feeder_t documentation. - * @param[in,out] p_context See @ref nrf_drv_usbd_feeder_t documentation. - * @param[in] ep_size See @ref nrf_drv_usbd_feeder_t documentation. - * - * @retval true Continue transfer. - * @retval false This was the last transfer. - */ -bool nrf_drv_usbd_feeder_flash_zlp( - nrf_drv_usbd_ep_transfer_t * p_next, - void * p_context, - size_t ep_size) -{ - nrf_drv_usbd_transfer_t * p_transfer = p_context; - ASSERT(!nrf_drv_is_in_RAM((const void*)(p_transfer->p_data.ptr))); - - size_t tx_size = p_transfer->size; - void * p_buffer = nrf_drv_usbd_feeder_buffer_get(); - - if (tx_size > ep_size) - { - tx_size = ep_size; - } - - ASSERT(tx_size <= NRF_DRV_USBD_FEEDER_BUFFER_SIZE); - - if (tx_size != 0) - { - memcpy(p_buffer, (p_transfer->p_data.tx), tx_size); - p_next->p_data.tx = p_buffer; - } - else - { - p_next->p_data.tx = NULL; - } - p_next->size = tx_size; - - p_transfer->size -= tx_size; - p_transfer->p_data.ptr += tx_size; - - return (tx_size != 0); -} - -/** @} */ - -/** - * @brief Change Driver endpoint number to HAL endpoint number - * - * @param ep Driver endpoint identifier - * - * @return Endpoint identifier in HAL - * - * @sa nrf_drv_usbd_ep_from_hal - */ -static inline uint8_t ep_to_hal(nrf_drv_usbd_ep_t ep) -{ - USBD_ASSERT_EP_VALID(ep); - return (uint8_t)ep; -} - -/** - * @brief Generate start task number for selected endpoint index - * - * @param ep Endpoint number - * - * @return Task for starting EasyDMA transfer on selected endpoint. - */ -static inline nrf_usbd_task_t task_start_ep(nrf_drv_usbd_ep_t ep) -{ - USBD_ASSERT_EP_VALID(ep); - return (nrf_usbd_task_t)( - (NRF_USBD_EPIN_CHECK(ep) ? NRF_USBD_TASK_STARTEPIN0 : NRF_USBD_TASK_STARTEPOUT0) + - (NRF_USBD_EP_NR_GET(ep) * sizeof(uint32_t))); -} - -/** - * @brief Access selected endpoint state structure - * - * Function used to change or just read the state of selected endpoint. - * It is used for internal transmission state. - * - * @param ep Endpoint number - */ -static inline usbd_drv_ep_state_t* ep_state_access(nrf_drv_usbd_ep_t ep) -{ - USBD_ASSERT_EP_VALID(ep); - return ((NRF_USBD_EPIN_CHECK(ep) ? m_ep_state.ep_in : m_ep_state.ep_out) + - NRF_USBD_EP_NR_GET(ep)); -} - -/** - * @brief Change endpoint number to bit position - * - * Bit positions are defined the same way as they are placed in DATAEPSTATUS register, - * but bits for endpoint 0 are included. - * - * @param ep Endpoint number - * - * @return Bit position related to the given endpoint number - * - * @sa bit2ep - */ -static inline uint8_t ep2bit(nrf_drv_usbd_ep_t ep) -{ - USBD_ASSERT_EP_VALID(ep); - return USBD_EP_BITPOS(ep); -} - -/** - * @brief Change bit position to endpoint number - * - * @param bitpos Bit position - * - * @return Endpoint number corresponding to given bit position. - * - * @sa ep2bit - */ -static inline nrf_drv_usbd_ep_t bit2ep(uint8_t bitpos) -{ - STATIC_ASSERT(USBD_EPOUT_BITPOS_0 > USBD_EPIN_BITPOS_0); - return (nrf_drv_usbd_ep_t)((bitpos >= USBD_EPOUT_BITPOS_0) ? - NRF_USBD_EPOUT(bitpos - USBD_EPOUT_BITPOS_0) : NRF_USBD_EPIN(bitpos)); -} - -/** - * @brief Start selected EasyDMA transmission - * - * This is internal auxiliary function. - * No checking is made if EasyDMA is ready for new transmission. - * - * @param[in] ep Number of endpoint for transmission. - * If it is OUT endpoint transmission would be directed from endpoint to RAM. - * If it is in endpoint transmission would be directed from RAM to endpoint. - */ -static inline void usbd_dma_start(nrf_drv_usbd_ep_t ep) -{ - nrf_usbd_task_trigger(task_start_ep(ep)); -} - -/** - * @brief Abort pending transfer on selected endpoint - * - * @param ep Endpoint number. - * - * @note - * This function locks interrupts that may be costly. - * It is good idea to test if the endpoint is still busy before calling this function: - * @code - (m_ep_dma_waiting & (1U << ep2bit(ep))) - * @endcode - * This function would check it again, but it makes it inside critical section. - */ -static inline void usbd_ep_abort(nrf_drv_usbd_ep_t ep) -{ - CRITICAL_REGION_ENTER(); - - usbd_drv_ep_state_t * p_state = ep_state_access(ep); - - if (NRF_USBD_EPOUT_CHECK(ep)) - { - /* Host -> Device */ - if ((~m_ep_dma_waiting) & (1U << ep2bit(ep))) - { - /* If the bit in m_ep_dma_waiting in cleared - nothing would be - * processed inside transfer processing */ - nrf_drv_usbd_transfer_out_drop(ep); - } - else - { - p_state->handler.consumer = NULL; - m_ep_dma_waiting &= ~(1U << ep2bit(ep)); - m_ep_ready &= ~(1U << ep2bit(ep)); - } - /* Aborted */ - p_state->status = NRF_USBD_EP_ABORTED; - } - else - { - if ((m_ep_dma_waiting | (~m_ep_ready)) & (1U << ep2bit(ep))) - { - /* Device -> Host */ - m_ep_dma_waiting &= ~(1U << ep2bit(ep)); - m_ep_ready |= 1U << ep2bit(ep) ; - - p_state->handler.feeder = NULL; - p_state->status = NRF_USBD_EP_ABORTED; - NRF_DRV_USBD_EP_TRANSFER_EVENT(evt, ep, NRF_USBD_EP_ABORTED); - m_event_handler(&evt); - } - } - CRITICAL_REGION_EXIT(); -} - -void nrf_drv_usbd_ep_abort(nrf_drv_usbd_ep_t ep) -{ - usbd_ep_abort(ep); -} - - -/** - * @brief Abort all pending endpoints - * - * Function aborts all pending endpoint transfers. - */ -static void usbd_ep_abort_all(void) -{ - uint32_t ep_waiting = m_ep_dma_waiting | (m_ep_ready & USBD_EPOUT_BIT_MASK); - while (0 != ep_waiting) - { - uint8_t bitpos = __CLZ(__RBIT(ep_waiting)); - usbd_ep_abort(bit2ep(bitpos)); - ep_waiting &= ~(1U << bitpos); - } - - m_ep_ready = (((1U << NRF_USBD_EPIN_CNT) - 1U) << USBD_EPIN_BITPOS_0); -} - -/** - * @brief Force the USBD interrupt into pending state - * - * This function is used to force USBD interrupt to be processed right now. - * It makes it possible to process all EasyDMA access on one thread priority level. - */ -static inline void usbd_int_rise(void) -{ - NVIC_SetPendingIRQ(USBD_IRQn); -} - -/** - * @name USBD interrupt runtimes - * - * Interrupt runtimes that would be vectorized using @ref m_ivec_isr - * @{ - */ - -static void ev_usbreset_handler(void) -{ - m_bus_suspend = false; - m_last_setup_dir = NRF_DRV_USBD_EPOUT0; - - const nrf_drv_usbd_evt_t evt = { - .type = NRF_DRV_USBD_EVT_RESET - }; - - m_event_handler(&evt); -} - -static void ev_started_handler(void) -{ -#if NRF_DRV_USBD_STARTED_EV_ENABLE - uint32_t epstatus = nrf_usbd_epstatus_get_and_clear(); - - /* All finished endpoint have to be marked as busy */ - // #warning Check this one - // ASSERT(epstatus == ((~m_ep_ready) & epstatus)); - while (epstatus) - { - uint8_t bitpos = __CLZ(__RBIT(epstatus)); - nrf_drv_usbd_ep_t ep = bit2ep(bitpos); - epstatus &= ~(1UL << bitpos); - - UNUSED_VARIABLE(ep); - } -#endif -} - -/** - * @brief Handler for EasyDMA event without endpoint clearing. - * - * This handler would be called when EasyDMA transfer for endpoints that does not require clearing. - * All in endpoints are cleared automatically when new EasyDMA transfer is initialized. - * For endpoint 0 see @ref nrf_usbd_ep0out_dma_handler - * - * @param[in] ep Endpoint number - */ -static inline void nrf_usbd_ep0in_dma_handler(void) -{ - const nrf_drv_usbd_ep_t ep = NRF_DRV_USBD_EPIN0; - NRF_LOG_DEBUG("USB event: DMA ready IN0"); - m_dma_pending = 0; - - usbd_drv_ep_state_t * p_state = ep_state_access(ep); - if (NRF_USBD_EP_ABORTED == p_state->status) - { - /* Clear transfer information just in case */ - UNUSED_RETURN_VALUE(nrf_atomic_u32_and(&m_ep_dma_waiting, ~(1U << ep2bit(ep)))); - } - else if (p_state->handler.feeder == NULL) - { - UNUSED_RETURN_VALUE(nrf_atomic_u32_and(&m_ep_dma_waiting, ~(1U << ep2bit(ep)))); - } - else - { - /* Nothing to do */ - } -} - -/** - * @brief Handler for EasyDMA event without endpoint clearing. - * - * This handler would be called when EasyDMA transfer for endpoints that does not require clearing. - * All in endpoints are cleared automatically when new EasyDMA transfer is initialized. - * For endpoint 0 see @ref nrf_usbd_ep0out_dma_handler - * - * @param[in] ep Endpoint number - */ -static inline void nrf_usbd_epin_dma_handler(nrf_drv_usbd_ep_t ep) -{ - - NRF_LOG_DEBUG("USB event: DMA ready IN: %x", ep); - ASSERT(NRF_USBD_EPIN_CHECK(ep)); - ASSERT(!NRF_USBD_EPISO_CHECK(ep)); - ASSERT(NRF_USBD_EP_NR_GET(ep) > 0); - m_dma_pending = 0; - - usbd_drv_ep_state_t * p_state = ep_state_access(ep); - if (NRF_USBD_EP_ABORTED == p_state->status) - { - /* Clear transfer information just in case */ - UNUSED_RETURN_VALUE(nrf_atomic_u32_and(&m_ep_dma_waiting, ~(1U << ep2bit(ep)))); - } - else if (p_state->handler.feeder == NULL) - { - UNUSED_RETURN_VALUE(nrf_atomic_u32_and(&m_ep_dma_waiting, ~(1U << ep2bit(ep)))); - } - else - { - /* Nothing to do */ - } -} - -/** - * @brief Handler for EasyDMA event from in isochronous endpoint - * - * @todo RK documentation - */ -static inline void nrf_usbd_epiniso_dma_handler(nrf_drv_usbd_ep_t ep) -{ - if (NRF_USBD_ISO_DEBUG) - { - NRF_LOG_DEBUG("USB event: DMA ready ISOIN: %x", ep); - } - ASSERT(NRF_USBD_EPIN_CHECK(ep)); - ASSERT(NRF_USBD_EPISO_CHECK(ep)); - m_dma_pending = 0; - - usbd_drv_ep_state_t * p_state = ep_state_access(ep); - if (NRF_USBD_EP_ABORTED == p_state->status) - { - /* Clear transfer information just in case */ - UNUSED_RETURN_VALUE(nrf_atomic_u32_and(&m_ep_dma_waiting, ~(1U << ep2bit(ep)))); - } - else if (p_state->handler.feeder == NULL) - { - UNUSED_RETURN_VALUE(nrf_atomic_u32_and(&m_ep_dma_waiting, ~(1U << ep2bit(ep)))); - /* Send event to the user - for an ISO IN endpoint, the whole transfer is finished in this moment */ - NRF_DRV_USBD_EP_TRANSFER_EVENT(evt, ep, NRF_USBD_EP_OK); - m_event_handler(&evt); - } - else - { - /* Nothing to do */ - } -} - -/** - * @brief Handler for EasyDMA event for OUT endpoint 0. - * - * EP0 OUT have to be cleared automatically in special way - only in the middle of the transfer. - * It cannot be cleared when required transfer is finished because it means the same that accepting the comment. - */ -static inline void nrf_usbd_ep0out_dma_handler(void) -{ - const nrf_drv_usbd_ep_t ep = NRF_DRV_USBD_EPOUT0; - NRF_LOG_DEBUG("USB event: DMA ready OUT0"); - m_dma_pending = 0; - - usbd_drv_ep_state_t * p_state = ep_state_access(ep); - if (NRF_USBD_EP_ABORTED == p_state->status) - { - /* Clear transfer information just in case */ - UNUSED_RETURN_VALUE(nrf_atomic_u32_and(&m_ep_dma_waiting, ~(1U << ep2bit(ep)))); - } - else if (p_state->handler.consumer == NULL) - { - UNUSED_RETURN_VALUE(nrf_atomic_u32_and(&m_ep_dma_waiting, ~(1U << ep2bit(ep)))); - /* Send event to the user - for an OUT endpoint, the whole transfer is finished in this moment */ - NRF_DRV_USBD_EP_TRANSFER_EVENT(evt, ep, NRF_USBD_EP_OK); - m_event_handler(&evt); - return; - } - else - { - /* Nothing to do */ - } - - nrf_drv_usbd_setup_data_clear(); -} - -/** - * @brief Handler for EasyDMA event from endpoinpoint that requires clearing. - * - * This handler would be called when EasyDMA transfer for OUT endpoint has been finished. - * - * @param[in] ep Endpoint number - * - */ -static inline void nrf_usbd_epout_dma_handler(nrf_drv_usbd_ep_t ep) -{ - NRF_LOG_DEBUG("USB drv: DMA ready OUT: %x", ep); - ASSERT(NRF_USBD_EPOUT_CHECK(ep)); - ASSERT(!NRF_USBD_EPISO_CHECK(ep)); - ASSERT(NRF_USBD_EP_NR_GET(ep) > 0); - m_dma_pending = 0; - - usbd_drv_ep_state_t * p_state = ep_state_access(ep); - if (NRF_USBD_EP_ABORTED == p_state->status) - { - /* Clear transfer information just in case */ - UNUSED_RETURN_VALUE(nrf_atomic_u32_and(&m_ep_dma_waiting, ~(1U << ep2bit(ep)))); - } - else if (p_state->handler.consumer == NULL) - { - UNUSED_RETURN_VALUE(nrf_atomic_u32_and(&m_ep_dma_waiting, ~(1U << ep2bit(ep)))); - /* Send event to the user - for an OUT endpoint, the whole transfer is finished in this moment */ - NRF_DRV_USBD_EP_TRANSFER_EVENT(evt, ep, NRF_USBD_EP_OK); - m_event_handler(&evt); - } - else - { - /* Nothing to do */ - } - -#if NRF_DRV_USBD_EARLY_DMA_PROCESS - /* Speed up */ - usbd_dmareq_process(); -#endif -} - -/** - * @brief Handler for EasyDMA event from out isochronous endpoint - * - * @todo RK documentation - */ - -static inline void nrf_usbd_epoutiso_dma_handler(nrf_drv_usbd_ep_t ep) -{ - if (NRF_USBD_ISO_DEBUG) - { - NRF_LOG_DEBUG("USB drv: DMA ready ISOOUT: %x", ep); - } - ASSERT(NRF_USBD_EPISO_CHECK(ep)); - - m_dma_pending = 0; - - usbd_drv_ep_state_t * p_state = ep_state_access(ep); - if (NRF_USBD_EP_ABORTED == p_state->status) - { - /* Nothing to do - just ignore */ - } - else if (p_state->handler.consumer == NULL) - { - UNUSED_RETURN_VALUE(nrf_atomic_u32_and(&m_ep_dma_waiting, ~(1U << ep2bit(ep)))); - /* Send event to the user - for an OUT endpoint, the whole transfer is finished in this moment */ - NRF_DRV_USBD_EP_TRANSFER_EVENT(evt, ep, NRF_USBD_EP_OK); - m_event_handler(&evt); - } - else - { - /* Nothing to do */ - } -} - - -static void ev_dma_epin0_handler(void) { nrf_usbd_ep0in_dma_handler(); } -static void ev_dma_epin1_handler(void) { nrf_usbd_epin_dma_handler(NRF_DRV_USBD_EPIN1 ); } -static void ev_dma_epin2_handler(void) { nrf_usbd_epin_dma_handler(NRF_DRV_USBD_EPIN2 ); } -static void ev_dma_epin3_handler(void) { nrf_usbd_epin_dma_handler(NRF_DRV_USBD_EPIN3 ); } -static void ev_dma_epin4_handler(void) { nrf_usbd_epin_dma_handler(NRF_DRV_USBD_EPIN4 ); } -static void ev_dma_epin5_handler(void) { nrf_usbd_epin_dma_handler(NRF_DRV_USBD_EPIN5 ); } -static void ev_dma_epin6_handler(void) { nrf_usbd_epin_dma_handler(NRF_DRV_USBD_EPIN6 ); } -static void ev_dma_epin7_handler(void) { nrf_usbd_epin_dma_handler(NRF_DRV_USBD_EPIN7 ); } -static void ev_dma_epin8_handler(void) { nrf_usbd_epiniso_dma_handler(NRF_DRV_USBD_EPIN8 ); } - -static void ev_dma_epout0_handler(void) { nrf_usbd_ep0out_dma_handler(); } -static void ev_dma_epout1_handler(void) { nrf_usbd_epout_dma_handler(NRF_DRV_USBD_EPOUT1); } -static void ev_dma_epout2_handler(void) { nrf_usbd_epout_dma_handler(NRF_DRV_USBD_EPOUT2); } -static void ev_dma_epout3_handler(void) { nrf_usbd_epout_dma_handler(NRF_DRV_USBD_EPOUT3); } -static void ev_dma_epout4_handler(void) { nrf_usbd_epout_dma_handler(NRF_DRV_USBD_EPOUT4); } -static void ev_dma_epout5_handler(void) { nrf_usbd_epout_dma_handler(NRF_DRV_USBD_EPOUT5); } -static void ev_dma_epout6_handler(void) { nrf_usbd_epout_dma_handler(NRF_DRV_USBD_EPOUT6); } -static void ev_dma_epout7_handler(void) { nrf_usbd_epout_dma_handler(NRF_DRV_USBD_EPOUT7); } -static void ev_dma_epout8_handler(void) { nrf_usbd_epoutiso_dma_handler(NRF_DRV_USBD_EPOUT8); } - -static void ev_sof_handler(void) -{ - nrf_drv_usbd_evt_t evt = { - NRF_DRV_USBD_EVT_SOF, - .data = { .sof = { .framecnt = nrf_usbd_framecntr_get() }} - }; - - /* Process isochronous endpoints */ - m_ep_ready |= - (1U << ep2bit(NRF_DRV_USBD_EPIN8 )) | - (1U << ep2bit(NRF_DRV_USBD_EPOUT8)); - - m_event_handler(&evt); -} - -/** - * @brief React on data transfer finished - * - * Auxiliary internal function. - * @param ep Endpoint number - * @param bitpos Bit position for selected endpoint number - */ -static void usbd_ep_data_handler(nrf_drv_usbd_ep_t ep, uint8_t bitpos) -{ - NRF_LOG_DEBUG("USBD event: EndpointData: %x", ep); - /* Mark endpoint ready for next DMA access */ - m_ep_ready |= (1U << bitpos); - - if (NRF_USBD_EPIN_CHECK(ep)) - { - /* IN endpoint (Device -> Host) */ - if (0 == (m_ep_dma_waiting & (1U << bitpos))) - { - NRF_LOG_DEBUG("USBD event: EndpointData: In finished"); - /* No more data to be send - transmission finished */ - NRF_DRV_USBD_EP_TRANSFER_EVENT(evt, ep, NRF_USBD_EP_OK); - m_event_handler(&evt); - } - } - else - { - /* OUT endpoint (Host -> Device) */ - if (0 == (m_ep_dma_waiting & (1U << bitpos))) - { - NRF_LOG_DEBUG("USBD event: EndpointData: Out waiting"); - /* No buffer prepared - send event to the application */ - NRF_DRV_USBD_EP_TRANSFER_EVENT(evt, ep, NRF_USBD_EP_WAITING); - m_event_handler(&evt); - } - } -} - -static void ev_setup_data_handler(void) -{ - usbd_ep_data_handler(m_last_setup_dir, ep2bit(m_last_setup_dir)); -} - -static void ev_setup_handler(void) -{ - nrf_usbd_shorts_disable(NRF_USBD_SHORT_EP0DATADONE_EP0STATUS_MASK); - NRF_LOG_DEBUG("USBD event: Setup (rt:%.2x r:%.2x v:%.4x i:%.4x l:%u )", - nrf_usbd_setup_bmrequesttype_get(), - nrf_usbd_setup_brequest_get(), - nrf_usbd_setup_wvalue_get(), - nrf_usbd_setup_windex_get(), - nrf_usbd_setup_wlength_get()); - uint8_t bmRequestType = nrf_usbd_setup_bmrequesttype_get(); - - - if ((m_ep_dma_waiting | ((~m_ep_ready) & USBD_EPIN_BIT_MASK)) & (1U <handler.feeder) != NULL); - - if (NRF_USBD_EPIN_CHECK(ep)) - { - /* Device -> Host */ - continue_transfer = p_state->handler.feeder( - &transfer, - p_state->p_context, - p_state->max_packet_size); - - if (!continue_transfer) - { - p_state->handler.feeder = NULL; - if (ep == NRF_DRV_USBD_EPIN0) - { - /** Configure short right now - now if the last data is transferred, - * when host tries another data transfer, the endpoint will stall. */ - NRF_LOG_DEBUG("USB DMA process: Enable status short"); - nrf_usbd_shorts_enable(NRF_USBD_SHORT_EP0DATADONE_EP0STATUS_MASK); - } - } - } - else - { - /* Host -> Device */ - const size_t rx_size = nrf_drv_usbd_epout_size_get(ep); - continue_transfer = p_state->handler.consumer( - &transfer, - p_state->p_context, - p_state->max_packet_size, - rx_size); - - if (transfer.p_data.rx == NULL) - { - /* Dropping transfer - allow processing */ - ASSERT(transfer.size == 0); - } - else if (transfer.size < rx_size) - { - NRF_LOG_DEBUG("Endpoint %x overload (r: %u, e: %u)", ep, rx_size, transfer.size); - p_state->status = NRF_USBD_EP_OVERLOAD; - UNUSED_RETURN_VALUE(nrf_atomic_u32_and(&m_ep_dma_waiting, ~(1U << pos))); - NRF_DRV_USBD_EP_TRANSFER_EVENT(evt, ep, NRF_USBD_EP_OVERLOAD); - m_event_handler(&evt); - /* This endpoint will not be transmitted now, repeat the loop */ - continue; - } - else - { - /* Nothing to do - only check integrity if assertions are enabled */ - ASSERT(transfer.size == rx_size); - } - - if (!continue_transfer) - { - p_state->handler.consumer = NULL; - } - } - - m_dma_pending = 1; - m_ep_ready &= ~(1U << pos); - if (NRF_USBD_ISO_DEBUG || (!NRF_USBD_EPISO_CHECK(ep))) - { - NRF_LOG_DEBUG( - "USB DMA process: Starting transfer on EP: %x, size: %u", - ep, - transfer.size); - } - /* Update number of currently transferred bytes */ - p_state->transfer_cnt += transfer.size; - /* Start transfer to the endpoint buffer */ - nrf_usbd_ep_easydma_set(ep, transfer.p_data.ptr, (uint32_t)transfer.size); - - if (nrf_drv_usbd_errata_104()) - { - uint32_t cnt_end = (uint32_t)(-1); - do - { - uint32_t cnt = (uint32_t)(-1); - do - { - nrf_usbd_event_clear(NRF_USBD_EVENT_STARTED); - usbd_dma_start(ep); - nrf_drv_systick_delay_us(2); - ++cnt; - }while (!nrf_usbd_event_check(NRF_USBD_EVENT_STARTED)); - if (cnt) - { - NRF_DRV_USBD_LOG_PROTO1_FIX_PRINTF(" DMA restarted: %u times", cnt); - } - - nrf_drv_systick_delay_us(30); - while (0 == (0x20 & *((volatile uint32_t *)(NRF_USBD_BASE + 0x474)))) - { - nrf_drv_systick_delay_us(2); - } - nrf_drv_systick_delay_us(1); - - ++cnt_end; - } while (!nrf_usbd_event_check(nrf_drv_usbd_ep_to_endevent(ep))); - if (cnt_end) - { - NRF_DRV_USBD_LOG_PROTO1_FIX_PRINTF(" DMA fully restarted: %u times", cnt_end); - } - } - else - { - usbd_dma_start(ep); - } - - if (NRF_USBD_DMAREQ_PROCESS_DEBUG) - { - NRF_LOG_DEBUG("USB DMA process - finishing"); - } - /* Transfer started - exit the loop */ - break; - } - } - else - { - if (NRF_USBD_DMAREQ_PROCESS_DEBUG) - { - NRF_LOG_DEBUG("USB DMA process - EasyDMA busy"); - } - } -} -/** @} */ - -typedef void (*nrf_drv_usbd_isr_t)(void); - -/** - * @brief USBD interrupt service runtimes - * - */ -static const nrf_drv_usbd_isr_t m_isr[] = -{ - [USBD_INTEN_USBRESET_Pos ] = ev_usbreset_handler, - [USBD_INTEN_STARTED_Pos ] = ev_started_handler, - [USBD_INTEN_ENDEPIN0_Pos ] = ev_dma_epin0_handler, - [USBD_INTEN_ENDEPIN1_Pos ] = ev_dma_epin1_handler, - [USBD_INTEN_ENDEPIN2_Pos ] = ev_dma_epin2_handler, - [USBD_INTEN_ENDEPIN3_Pos ] = ev_dma_epin3_handler, - [USBD_INTEN_ENDEPIN4_Pos ] = ev_dma_epin4_handler, - [USBD_INTEN_ENDEPIN5_Pos ] = ev_dma_epin5_handler, - [USBD_INTEN_ENDEPIN6_Pos ] = ev_dma_epin6_handler, - [USBD_INTEN_ENDEPIN7_Pos ] = ev_dma_epin7_handler, - [USBD_INTEN_EP0DATADONE_Pos] = ev_setup_data_handler, - [USBD_INTEN_ENDISOIN_Pos ] = ev_dma_epin8_handler, - [USBD_INTEN_ENDEPOUT0_Pos ] = ev_dma_epout0_handler, - [USBD_INTEN_ENDEPOUT1_Pos ] = ev_dma_epout1_handler, - [USBD_INTEN_ENDEPOUT2_Pos ] = ev_dma_epout2_handler, - [USBD_INTEN_ENDEPOUT3_Pos ] = ev_dma_epout3_handler, - [USBD_INTEN_ENDEPOUT4_Pos ] = ev_dma_epout4_handler, - [USBD_INTEN_ENDEPOUT5_Pos ] = ev_dma_epout5_handler, - [USBD_INTEN_ENDEPOUT6_Pos ] = ev_dma_epout6_handler, - [USBD_INTEN_ENDEPOUT7_Pos ] = ev_dma_epout7_handler, - [USBD_INTEN_ENDISOOUT_Pos ] = ev_dma_epout8_handler, - [USBD_INTEN_SOF_Pos ] = ev_sof_handler, - [USBD_INTEN_USBEVENT_Pos ] = ev_usbevent_handler, - [USBD_INTEN_EP0SETUP_Pos ] = ev_setup_handler, - [USBD_INTEN_EPDATA_Pos ] = ev_epdata_handler, - [USBD_INTEN_ACCESSFAULT_Pos] = ev_accessfault_handler -}; - -/** - * @name Interrupt handlers - * - * @{ - */ -void USBD_IRQHandler(void) -{ - const uint32_t enabled = nrf_usbd_int_enable_get(); - uint32_t to_process = enabled; - uint32_t active = 0; - - /* Check all enabled interrupts */ - while (to_process) - { - uint8_t event_nr = __CLZ(__RBIT(to_process)); - if (nrf_usbd_event_get_and_clear((nrf_usbd_event_t)nrf_drv_bitpos_to_event(event_nr))) - { - active |= 1UL << event_nr; - } - to_process &= ~(1UL << event_nr); - } - - if (nrf_drv_usbd_errata_104()) - { - /* Event correcting */ - if ((0 == m_dma_pending) && (0 != (active & (USBD_INTEN_SOF_Msk)))) - { - uint8_t usbi, uoi, uii; - /* Testing */ - *((volatile uint32_t *)(NRF_USBD_BASE + 0x800)) = 0x7A9; - uii = (uint8_t)(*((volatile uint32_t *)(NRF_USBD_BASE + 0x804))); - if (0 != uii) - { - uii &= (uint8_t)(*((volatile uint32_t *)(NRF_USBD_BASE + 0x804))); - } - - *((volatile uint32_t *)(NRF_USBD_BASE + 0x800)) = 0x7AA; - uoi = (uint8_t)(*((volatile uint32_t *)(NRF_USBD_BASE + 0x804))); - if (0 != uoi) - { - uoi &= (uint8_t)(*((volatile uint32_t *)(NRF_USBD_BASE + 0x804))); - } - *((volatile uint32_t *)(NRF_USBD_BASE + 0x800)) = 0x7AB; - usbi = (uint8_t)(*((volatile uint32_t *)(NRF_USBD_BASE + 0x804))); - if (0 != usbi) - { - usbi &= (uint8_t)(*((volatile uint32_t *)(NRF_USBD_BASE + 0x804))); - } - /* Processing */ - *((volatile uint32_t *)(NRF_USBD_BASE + 0x800)) = 0x7AC; - uii &= (uint8_t)*((volatile uint32_t *)(NRF_USBD_BASE + 0x804)); - if (0 != uii) - { - uint8_t rb; - m_simulated_dataepstatus |= ((uint32_t)uii) << USBD_EPIN_BITPOS_0; - *((volatile uint32_t *)(NRF_USBD_BASE + 0x800)) = 0x7A9; - *((volatile uint32_t *)(NRF_USBD_BASE + 0x804)) = uii; - rb = (uint8_t)*((volatile uint32_t *)(NRF_USBD_BASE + 0x804)); - NRF_DRV_USBD_LOG_PROTO1_FIX_PRINTF(" uii: 0x%.2x (0x%.2x)", uii, rb); - } - - *((volatile uint32_t *)(NRF_USBD_BASE + 0x800)) = 0x7AD; - uoi &= (uint8_t)*((volatile uint32_t *)(NRF_USBD_BASE + 0x804)); - if (0 != uoi) - { - uint8_t rb; - m_simulated_dataepstatus |= ((uint32_t)uoi) << USBD_EPOUT_BITPOS_0; - *((volatile uint32_t *)(NRF_USBD_BASE + 0x800)) = 0x7AA; - *((volatile uint32_t *)(NRF_USBD_BASE + 0x804)) = uoi; - rb = (uint8_t)*((volatile uint32_t *)(NRF_USBD_BASE + 0x804)); - NRF_DRV_USBD_LOG_PROTO1_FIX_PRINTF(" uoi: 0x%.2u (0x%.2x)", uoi, rb); - } - - *((volatile uint32_t *)(NRF_USBD_BASE + 0x800)) = 0x7AE; - usbi &= (uint8_t)*((volatile uint32_t *)(NRF_USBD_BASE + 0x804)); - if (0 != usbi) - { - uint8_t rb; - if (usbi & 0x01) - { - active |= USBD_INTEN_EP0SETUP_Msk; - } - if (usbi & 0x10) - { - active |= USBD_INTEN_USBRESET_Msk; - } - *((volatile uint32_t *)(NRF_USBD_BASE + 0x800)) = 0x7AB; - *((volatile uint32_t *)(NRF_USBD_BASE + 0x804)) = usbi; - rb = (uint8_t)*((volatile uint32_t *)(NRF_USBD_BASE + 0x804)); - NRF_DRV_USBD_LOG_PROTO1_FIX_PRINTF(" usbi: 0x%.2u (0x%.2x)", usbi, rb); - } - - if (0 != (m_simulated_dataepstatus & - ~((1U << USBD_EPOUT_BITPOS_0) | (1U << USBD_EPIN_BITPOS_0)))) - { - active |= enabled & NRF_USBD_INT_DATAEP_MASK; - } - if (0 != (m_simulated_dataepstatus & - ((1U << USBD_EPOUT_BITPOS_0) | (1U << USBD_EPIN_BITPOS_0)))) - { - if (0 != (enabled & NRF_USBD_INT_EP0DATADONE_MASK)) - { - m_simulated_dataepstatus &= - ~((1U << USBD_EPOUT_BITPOS_0) | (1U << USBD_EPIN_BITPOS_0)); - active |= NRF_USBD_INT_EP0DATADONE_MASK; - } - } - } - } - - /* Process the active interrupts */ - bool setup_active = 0 != (active & NRF_USBD_INT_EP0SETUP_MASK); - active &= ~NRF_USBD_INT_EP0SETUP_MASK; - - while (active) - { - uint8_t event_nr = __CLZ(__RBIT(active)); - m_isr[event_nr](); - active &= ~(1UL << event_nr); - } - usbd_dmareq_process(); - - if (setup_active) - { - m_isr[USBD_INTEN_EP0SETUP_Pos](); - } -} - -/** @} */ -/** @} */ - -ret_code_t nrf_drv_usbd_init(nrf_drv_usbd_event_handler_t const event_handler) -{ - if (nrf_drv_usbd_errata_104()) - { - nrf_drv_systick_init(); - } - if (NULL == event_handler) - { - return NRF_ERROR_INVALID_PARAM; - } - if ( m_drv_state != NRF_DRV_STATE_UNINITIALIZED) - { - return NRF_ERROR_INVALID_STATE; - } - - m_event_handler = event_handler; - m_drv_state = NRF_DRV_STATE_INITIALIZED; - - uint8_t n; - for (n=0; nstatus = NRF_USBD_EP_OK; - p_state->handler.feeder = NULL; - p_state->transfer_cnt = 0; - } - for (n=0; nstatus = NRF_USBD_EP_OK; - p_state->handler.consumer = NULL; - p_state->transfer_cnt = 0; - } - - return NRF_SUCCESS; -} - -ret_code_t nrf_drv_usbd_uninit(void) -{ - if (m_drv_state != NRF_DRV_STATE_INITIALIZED) - { - return NRF_ERROR_INVALID_STATE; - } - - m_event_handler = NULL; - m_drv_state = NRF_DRV_STATE_UNINITIALIZED; - return NRF_SUCCESS; -} - -void nrf_drv_usbd_enable(void) -{ - ASSERT(m_drv_state == NRF_DRV_STATE_INITIALIZED); - - /* Prepare for READY event receiving */ - nrf_usbd_eventcause_clear(NRF_USBD_EVENTCAUSE_READY_MASK); - /* Enable the peripheral */ - nrf_usbd_enable(); - /* Waiting for peripheral to enable, this should take a few us */ - while (0 == (NRF_USBD_EVENTCAUSE_READY_MASK & nrf_usbd_eventcause_get())) - { - /* Empty loop */ - } - nrf_usbd_eventcause_clear(NRF_USBD_EVENTCAUSE_READY_MASK); - - if (nrf_drv_usbd_errata_166()) - { - *((volatile uint32_t *)(NRF_USBD_BASE + 0x800)) = 0x7E3; - *((volatile uint32_t *)(NRF_USBD_BASE + 0x804)) = 0x40; - __ISB(); - __DSB(); - } - - nrf_usbd_isosplit_set(NRF_USBD_ISOSPLIT_Half); - - m_ep_ready = (((1U << NRF_USBD_EPIN_CNT) - 1U) << USBD_EPIN_BITPOS_0); - m_ep_dma_waiting = 0; - m_dma_pending = 0; - m_last_setup_dir = NRF_DRV_USBD_EPOUT0; - - m_drv_state = NRF_DRV_STATE_POWERED_ON; -} - -void nrf_drv_usbd_disable(void) -{ - ASSERT(m_drv_state != NRF_DRV_STATE_UNINITIALIZED); - - /* Stop just in case */ - nrf_drv_usbd_stop(); - - /* Disable all parts */ - nrf_usbd_int_disable(nrf_usbd_int_enable_get()); - nrf_usbd_disable(); - m_dma_pending = 0; - m_drv_state = NRF_DRV_STATE_INITIALIZED; -} - -void nrf_drv_usbd_start(bool enable_sof) -{ - ASSERT(m_drv_state == NRF_DRV_STATE_POWERED_ON); - m_bus_suspend = false; - - uint32_t ints_to_enable = - NRF_USBD_INT_USBRESET_MASK | - NRF_USBD_INT_STARTED_MASK | - NRF_USBD_INT_ENDEPIN0_MASK | - NRF_USBD_INT_EP0DATADONE_MASK | - NRF_USBD_INT_ENDEPOUT0_MASK | - NRF_USBD_INT_USBEVENT_MASK | - NRF_USBD_INT_EP0SETUP_MASK | - NRF_USBD_INT_DATAEP_MASK | - NRF_USBD_INT_ACCESSFAULT_MASK; - - if (enable_sof || nrf_drv_usbd_errata_104()) - { - ints_to_enable |= NRF_USBD_INT_SOF_MASK; - } - - /* Enable all required interrupts */ - nrf_usbd_int_enable(ints_to_enable); - - /* Enable interrupt globally */ - nrf_drv_common_irq_enable(USBD_IRQn, USBD_CONFIG_IRQ_PRIORITY); - - /* Enable pullups */ - nrf_usbd_pullup_enable(); -} - -void nrf_drv_usbd_stop(void) -{ - ASSERT(m_drv_state == NRF_DRV_STATE_POWERED_ON); - - if (nrf_drv_common_irq_enable_check(USBD_IRQn)) - { - /* Abort transfers */ - usbd_ep_abort_all(); - - /* Disable pullups */ - nrf_usbd_pullup_disable(); - - /* Disable interrupt globally */ - nrf_drv_common_irq_disable(USBD_IRQn); - - /* Disable all interrupts */ - nrf_usbd_int_disable(~0U); - } -} - -bool nrf_drv_usbd_is_initialized(void) -{ - return (m_drv_state >= NRF_DRV_STATE_INITIALIZED); -} - -bool nrf_drv_usbd_is_enabled(void) -{ - return (m_drv_state >= NRF_DRV_STATE_POWERED_ON); -} - -bool nrf_drv_usbd_is_started(void) -{ - return (nrf_drv_usbd_is_enabled() && nrf_drv_common_irq_enable_check(USBD_IRQn)); -} - -bool nrf_drv_usbd_suspend(void) -{ - bool suspended = false; - - CRITICAL_REGION_ENTER(); - if (m_bus_suspend) - { - usbd_ep_abort_all(); - - if (!(nrf_usbd_eventcause_get() & NRF_USBD_EVENTCAUSE_RESUME_MASK)) - { - nrf_usbd_lowpower_enable(); - if (nrf_usbd_eventcause_get() & NRF_USBD_EVENTCAUSE_RESUME_MASK) - { - nrf_usbd_lowpower_disable(); - } - else - { - suspended = true; - } - } - } - CRITICAL_REGION_EXIT(); - - return suspended; -} - -bool nrf_drv_usbd_wakeup_req(void) -{ - bool started = false; - - CRITICAL_REGION_ENTER(); - if (m_bus_suspend && nrf_usbd_lowpower_check()) - { - nrf_usbd_lowpower_disable(); - started = true; - } - CRITICAL_REGION_EXIT(); - - return started; -} - -bool nrf_drv_usbd_suspend_check(void) -{ - return nrf_usbd_lowpower_check(); -} - -void nrf_drv_usbd_suspend_irq_config(void) -{ - nrf_usbd_int_disable(m_irq_disabled_in_suspend); -} - -void nrf_drv_usbd_active_irq_config(void) -{ - nrf_usbd_int_enable(m_irq_disabled_in_suspend); -} - -bool nrf_drv_usbd_bus_suspend_check(void) -{ - return m_bus_suspend; -} - -void nrf_drv_usbd_ep_max_packet_size_set(nrf_drv_usbd_ep_t ep, uint16_t size) -{ - /* Only power of 2 size allowed */ - ASSERT((size != 0) && (size & (size - 1)) == 0); - /* Packet size cannot be higher than maximum buffer size */ - ASSERT( ( NRF_USBD_EPISO_CHECK(ep) && (size <= usbd_ep_iso_capacity(ep))) - || - ((!NRF_USBD_EPISO_CHECK(ep)) && (size <= NRF_DRV_USBD_EPSIZE))); - - usbd_drv_ep_state_t * p_state = ep_state_access(ep); - p_state->max_packet_size = size; -} - -uint16_t nrf_drv_usbd_ep_max_packet_size_get(nrf_drv_usbd_ep_t ep) -{ - usbd_drv_ep_state_t const * p_state = ep_state_access(ep); - return p_state->max_packet_size; -} - -bool nrf_drv_usbd_ep_enable_check(nrf_drv_usbd_ep_t ep) -{ - return nrf_usbd_ep_enable_check(ep_to_hal(ep)); -} - -void nrf_drv_usbd_ep_enable(nrf_drv_usbd_ep_t ep) -{ - nrf_usbd_int_enable(nrf_drv_usbd_ep_to_int(ep)); - - if(nrf_usbd_ep_enable_check(ep)) - { - return; - } - nrf_usbd_ep_enable(ep_to_hal(ep)); - if ((NRF_USBD_EP_NR_GET(ep) != 0) && NRF_USBD_EPOUT_CHECK(ep) && (!NRF_USBD_EPISO_CHECK(ep))) - { - CRITICAL_REGION_ENTER(); - nrf_drv_usbd_transfer_out_drop(ep); - m_ep_dma_waiting &= ~(1U << ep2bit(ep)); - CRITICAL_REGION_EXIT(); - } -} - -void nrf_drv_usbd_ep_disable(nrf_drv_usbd_ep_t ep) -{ - usbd_ep_abort(ep); - nrf_usbd_ep_disable(ep_to_hal(ep)); - nrf_usbd_int_disable(nrf_drv_usbd_ep_to_int(ep)); -} - -void nrf_drv_usbd_ep_default_config(void) -{ - nrf_usbd_int_disable( - NRF_USBD_INT_ENDEPIN1_MASK | - NRF_USBD_INT_ENDEPIN2_MASK | - NRF_USBD_INT_ENDEPIN3_MASK | - NRF_USBD_INT_ENDEPIN4_MASK | - NRF_USBD_INT_ENDEPIN5_MASK | - NRF_USBD_INT_ENDEPIN6_MASK | - NRF_USBD_INT_ENDEPIN7_MASK | - NRF_USBD_INT_ENDISOIN0_MASK | - NRF_USBD_INT_ENDEPOUT1_MASK | - NRF_USBD_INT_ENDEPOUT2_MASK | - NRF_USBD_INT_ENDEPOUT3_MASK | - NRF_USBD_INT_ENDEPOUT4_MASK | - NRF_USBD_INT_ENDEPOUT5_MASK | - NRF_USBD_INT_ENDEPOUT6_MASK | - NRF_USBD_INT_ENDEPOUT7_MASK | - NRF_USBD_INT_ENDISOOUT0_MASK - ); - nrf_usbd_int_enable(NRF_USBD_INT_ENDEPIN0_MASK | NRF_USBD_INT_ENDEPOUT0_MASK); - nrf_usbd_ep_all_disable(); -} - -ret_code_t nrf_drv_usbd_ep_transfer( - nrf_drv_usbd_ep_t ep, - nrf_drv_usbd_transfer_t const * const p_transfer) -{ - ret_code_t ret; - const uint8_t ep_bitpos = ep2bit(ep); - ASSERT(NULL != p_transfer); - - CRITICAL_REGION_ENTER(); - /* Setup data transaction can go only in one direction at a time */ - if ((NRF_USBD_EP_NR_GET(ep) == 0) && (ep != m_last_setup_dir)) - { - ret = NRF_ERROR_INVALID_ADDR; - if (NRF_USBD_FAILED_TRANSFERS_DEBUG && (NRF_USBD_ISO_DEBUG || (!NRF_USBD_EPISO_CHECK(ep)))) - { - NRF_LOG_DEBUG("USB driver: Transfer failed: Invalid EPr\n"); - } - } - else if ((m_ep_dma_waiting | ((~m_ep_ready) & USBD_EPIN_BIT_MASK)) & (1U << ep_bitpos)) - { - /* IN (Device -> Host) transfer has to be transmitted out to allow new transmission */ - ret = NRF_ERROR_BUSY; - if (NRF_USBD_FAILED_TRANSFERS_DEBUG) - { - NRF_LOG_DEBUG("USB driver: Transfer failed: EP is busy"); - } - } - else - { - usbd_drv_ep_state_t * p_state = ep_state_access(ep); - /* Prepare transfer context and handler description */ - nrf_drv_usbd_transfer_t * p_context; - if (NRF_USBD_EPIN_CHECK(ep)) - { - p_context = m_ep_feeder_state + NRF_USBD_EP_NR_GET(ep); - if (nrf_drv_is_in_RAM(p_transfer->p_data.tx)) - { - /* RAM */ - if (0 == (p_transfer->flags & NRF_DRV_USBD_TRANSFER_ZLP_FLAG)) - { - p_state->handler.feeder = nrf_drv_usbd_feeder_ram; - if (NRF_USBD_ISO_DEBUG || (!NRF_USBD_EPISO_CHECK(ep))) - { - NRF_LOG_DEBUG( - "USB driver: Transfer called on endpoint %x, size: %u, mode: " - "RAM", - ep, - p_transfer->size); - } - } - else - { - p_state->handler.feeder = nrf_drv_usbd_feeder_ram_zlp; - if (NRF_USBD_ISO_DEBUG || (!NRF_USBD_EPISO_CHECK(ep))) - { - NRF_LOG_DEBUG( - "USB driver: Transfer called on endpoint %x, size: %u, mode: " - "RAM_ZLP", - ep, - p_transfer->size); - } - } - } - else - { - /* Flash */ - if (0 == (p_transfer->flags & NRF_DRV_USBD_TRANSFER_ZLP_FLAG)) - { - p_state->handler.feeder = nrf_drv_usbd_feeder_flash; - if (NRF_USBD_ISO_DEBUG || (!NRF_USBD_EPISO_CHECK(ep))) - { - NRF_LOG_DEBUG( - "USB driver: Transfer called on endpoint %x, size: %u, mode: " - "FLASH", - ep, - p_transfer->size); - } - } - else - { - p_state->handler.feeder = nrf_drv_usbd_feeder_flash_zlp; - if (NRF_USBD_ISO_DEBUG || (!NRF_USBD_EPISO_CHECK(ep))) - { - NRF_LOG_DEBUG( - "USB driver: Transfer called on endpoint %x, size: %u, mode: " - "FLASH_ZLP", - ep, - p_transfer->size); - } - } - } - } - else - { - p_context = m_ep_consumer_state + NRF_USBD_EP_NR_GET(ep); - ASSERT((p_transfer->p_data.rx == NULL) || (nrf_drv_is_in_RAM(p_transfer->p_data.rx))); - p_state->handler.consumer = nrf_drv_usbd_consumer; - } - *p_context = *p_transfer; - p_state->p_context = p_context; - - p_state->transfer_cnt = 0; - p_state->status = NRF_USBD_EP_OK; - m_ep_dma_waiting |= 1U << ep_bitpos; - ret = NRF_SUCCESS; - usbd_int_rise(); - } - CRITICAL_REGION_EXIT(); - return ret; -} - -ret_code_t nrf_drv_usbd_ep_handled_transfer( - nrf_drv_usbd_ep_t ep, - nrf_drv_usbd_handler_desc_t const * const p_handler) -{ - ret_code_t ret; - const uint8_t ep_bitpos = ep2bit(ep); - ASSERT(NULL != p_handler); - - CRITICAL_REGION_ENTER(); - /* Setup data transaction can go only in one direction at a time */ - if ((NRF_USBD_EP_NR_GET(ep) == 0) && (ep != m_last_setup_dir)) - { - ret = NRF_ERROR_INVALID_ADDR; - if (NRF_USBD_FAILED_TRANSFERS_DEBUG && (NRF_USBD_ISO_DEBUG || (!NRF_USBD_EPISO_CHECK(ep)))) - { - NRF_LOG_DEBUG("USB driver: Transfer failed: Invalid EP"); - } - } - else if ((m_ep_dma_waiting | ((~m_ep_ready) & USBD_EPIN_BIT_MASK)) & (1U << ep_bitpos)) - { - /* IN (Device -> Host) transfer has to be transmitted out to allow a new transmission */ - ret = NRF_ERROR_BUSY; - if (NRF_USBD_FAILED_TRANSFERS_DEBUG && (NRF_USBD_ISO_DEBUG || (!NRF_USBD_EPISO_CHECK(ep)))) - { - NRF_LOG_DEBUG("USB driver: Transfer failed: EP is busy");\ - } - } - else - { - /* Transfer can be configured now */ - usbd_drv_ep_state_t * p_state = ep_state_access(ep); - - p_state->transfer_cnt = 0; - p_state->handler = p_handler->handler; - p_state->p_context = p_handler->p_context; - p_state->status = NRF_USBD_EP_OK; - m_ep_dma_waiting |= 1U << ep_bitpos; - - ret = NRF_SUCCESS; - if (NRF_USBD_ISO_DEBUG || (!NRF_USBD_EPISO_CHECK(ep))) - { - NRF_LOG_DEBUG("USB driver: Transfer called on endpoint %x, mode: Handler", ep); - } - usbd_int_rise(); - } - CRITICAL_REGION_EXIT(); - return ret; -} - -void * nrf_drv_usbd_feeder_buffer_get(void) -{ - return m_tx_buffer; -} - -ret_code_t nrf_drv_usbd_ep_status_get(nrf_drv_usbd_ep_t ep, size_t * p_size) -{ - ret_code_t ret; - - usbd_drv_ep_state_t const * p_state = ep_state_access(ep); - CRITICAL_REGION_ENTER(); - *p_size = p_state->transfer_cnt; - ret = (p_state->handler.consumer == NULL) ? p_state->status : NRF_ERROR_BUSY; - CRITICAL_REGION_EXIT(); - return ret; -} - -size_t nrf_drv_usbd_epout_size_get(nrf_drv_usbd_ep_t ep) -{ - return nrf_usbd_epout_size_get(ep_to_hal(ep)); -} - -bool nrf_drv_usbd_ep_is_busy(nrf_drv_usbd_ep_t ep) -{ - return (0 != (m_ep_dma_waiting & (1UL << ep2bit(ep)))); -} - -void nrf_drv_usbd_ep_stall(nrf_drv_usbd_ep_t ep) -{ - NRF_LOG_DEBUG("USB: EP %x stalled.", ep); - nrf_usbd_ep_stall(ep_to_hal(ep)); -} - -void nrf_drv_usbd_ep_stall_clear(nrf_drv_usbd_ep_t ep) -{ - nrf_usbd_ep_unstall(ep_to_hal(ep)); -} - -bool nrf_drv_usbd_ep_stall_check(nrf_drv_usbd_ep_t ep) -{ - return nrf_usbd_ep_is_stall(ep_to_hal(ep)); -} - -void nrf_drv_usbd_ep_dtoggle_clear(nrf_drv_usbd_ep_t ep) -{ - nrf_usbd_dtoggle_set(ep, NRF_USBD_DTOGGLE_DATA0); -} - -void nrf_drv_usbd_setup_get(nrf_drv_usbd_setup_t * const p_setup) -{ - memset(p_setup, 0, sizeof(nrf_drv_usbd_setup_t)); - p_setup->bmRequestType = nrf_usbd_setup_bmrequesttype_get(); - p_setup->bmRequest = nrf_usbd_setup_brequest_get(); - p_setup->wValue = nrf_usbd_setup_wvalue_get(); - p_setup->wIndex = nrf_usbd_setup_windex_get(); - p_setup->wLength = nrf_usbd_setup_wlength_get(); -} - -void nrf_drv_usbd_setup_data_clear(void) -{ - if (nrf_drv_usbd_errata_104()) - { - /* For this fix to work properly, it must be ensured that the task is - * executed twice one after another - blocking ISR. This is however a temporary - * solution to be used only before production version of the chip. */ - uint32_t primask_copy = __get_PRIMASK(); - __disable_irq(); - nrf_usbd_task_trigger(NRF_USBD_TASK_EP0RCVOUT); - nrf_usbd_task_trigger(NRF_USBD_TASK_EP0RCVOUT); - __set_PRIMASK(primask_copy); - } - else - { - nrf_usbd_task_trigger(NRF_USBD_TASK_EP0RCVOUT); - } -} - -void nrf_drv_usbd_setup_clear(void) -{ - nrf_usbd_task_trigger(NRF_USBD_TASK_EP0STATUS); -} - -void nrf_drv_usbd_setup_stall(void) -{ - NRF_LOG_DEBUG("Setup stalled."); - nrf_usbd_task_trigger(NRF_USBD_TASK_EP0STALL); -} - -nrf_drv_usbd_ep_t nrf_drv_usbd_last_setup_dir_get(void) -{ - return m_last_setup_dir; -} - -void nrf_drv_usbd_transfer_out_drop(nrf_drv_usbd_ep_t ep) -{ - ASSERT(NRF_USBD_EPOUT_CHECK(ep)); - - if (nrf_drv_usbd_errata_sizeepout_rw()) - { - CRITICAL_REGION_ENTER(); - m_ep_ready &= ~(1U << ep2bit(ep)); - *((volatile uint32_t *)(NRF_USBD_BASE + 0x800)) = 0x7C5 + (2u * NRF_USBD_EP_NR_GET(ep)); - *((volatile uint32_t *)(NRF_USBD_BASE + 0x804)) = 0; - UNUSED_VARIABLE(((volatile uint32_t *)(NRF_USBD_BASE + 0x804))); - CRITICAL_REGION_EXIT(); - } - else - { - CRITICAL_REGION_ENTER(); - m_ep_ready &= ~(1U << ep2bit(ep)); - nrf_usbd_epout_clear(ep); - CRITICAL_REGION_EXIT(); - } -} - -#endif // USBD_ENABLED diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.h deleted file mode 100644 index 25d7b342534..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.h +++ /dev/null @@ -1,947 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef NRF_DRV_USBD_H__ -#define NRF_DRV_USBD_H__ - -#include "nrf_drv_common.h" -#include "sdk_errors.h" -#include "nrf_usbd.h" -#include -#include -#include "app_util.h" -#include "nrf_drv_usbd_errata.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup nrf_drv_usbd USB Device HAL and driver - * @ingroup nrf_drivers - * @brief @tagAPI52840 USB Device APIs. - * @details The USB Device HAL provides basic APIs for accessing - * the registers of the USBD. - * The USB Device driver provides APIs on a higher level. - * - * @{ - */ - -/** - * @name Possible schemes of DMA scheduling - * - * Definition of available configuration constants used by DMA scheduler - * @{ - */ - /** - * @brief Highly prioritized access - * - * Endpoint with lower number has always higher priority and its data would - * be transfered first. - * OUT endpoints ale processed before IN endpoints - */ - #define NRF_DRV_USBD_DMASCHEDULER_PRIORITIZED 0 - - /** - * @brief Round robin scheme - * - * All endpoints are processed in round-robin scheme. - * It means that when one endpoint is processed next in order would be - * the nearest with lower number. - * When no endpoints with lower number requires processing - then - * all endpoints from 0 are tested. - */ - #define NRF_DRV_USBD_DMASCHEDULER_ROUNDROBIN 1 - -/** @} */ - -/** - * @brief Number of bytes in the endpoint - * - * Constant that informs about endpoint size - */ -#define NRF_DRV_USBD_EPSIZE 64 - -/** - * @brief Number of bytes for isochronous endpoints - * - * Number of bytes for isochronous endpoints in total. - * This number would be shared between IN and OUT endpoint. - * It may be also assigned totaly to one endpoint. - * @sa nrf_usbd_isosplit_set - * @sa nrf_usbd_isosplit_get - */ -#define NRF_DRV_USBD_ISOSIZE 1024 - -/** - * @brief The size of internal feeder buffer. - * - * @sa nrf_drv_usbd_feeder_buffer_get - */ -#define NRF_DRV_USBD_FEEDER_BUFFER_SIZE NRF_DRV_USBD_EPSIZE - -/** - * @name Macros for creating endpoint identifiers - * - * Auxiliary macros to be used to create Endpoint identifier that is compatible - * with USB specification. - * @{ - */ - - /** - * @brief Create identifier for IN endpoint - * - * Simple macro to create IN endpoint identifier for given endpoint number. - * - * @param[in] n Endpoint number. - * - * @return Endpoint identifier that connects endpoint number and endpoint direction. - */ - #define NRF_DRV_USBD_EPIN(n) ((nrf_drv_usbd_ep_t)NRF_USBD_EPIN(n)) - /** - * @brief Create identifier for OUT endpoint - * - * Simple macro to create OUT endpoint identifier for given endpoint number. - * - * @param[in] n Endpoint number. - * - * @return Endpoint identifier that connects endpoint number and endpoint direction. - */ - #define NRF_DRV_USBD_EPOUT(n) ((nrf_drv_usbd_ep_t)NRF_USBD_EPOUT(n)) - -/** @} */ - -/** - * @brief Endpoint identifier - * - * Endpoint identifier used in the driver. - * This endpoint number is consistent with USB 2.0 specification. - */ -typedef enum -{ - NRF_DRV_USBD_EPOUT0 = NRF_USBD_EPOUT(0), /**< Endpoint OUT 0 */ - NRF_DRV_USBD_EPOUT1 = NRF_USBD_EPOUT(1), /**< Endpoint OUT 1 */ - NRF_DRV_USBD_EPOUT2 = NRF_USBD_EPOUT(2), /**< Endpoint OUT 2 */ - NRF_DRV_USBD_EPOUT3 = NRF_USBD_EPOUT(3), /**< Endpoint OUT 3 */ - NRF_DRV_USBD_EPOUT4 = NRF_USBD_EPOUT(4), /**< Endpoint OUT 4 */ - NRF_DRV_USBD_EPOUT5 = NRF_USBD_EPOUT(5), /**< Endpoint OUT 5 */ - NRF_DRV_USBD_EPOUT6 = NRF_USBD_EPOUT(6), /**< Endpoint OUT 6 */ - NRF_DRV_USBD_EPOUT7 = NRF_USBD_EPOUT(7), /**< Endpoint OUT 7 */ - NRF_DRV_USBD_EPOUT8 = NRF_USBD_EPOUT(8), /**< Endpoint OUT 8 */ - - NRF_DRV_USBD_EPIN0 = NRF_USBD_EPIN(0), /**< Endpoint IN 0 */ - NRF_DRV_USBD_EPIN1 = NRF_USBD_EPIN(1), /**< Endpoint IN 1 */ - NRF_DRV_USBD_EPIN2 = NRF_USBD_EPIN(2), /**< Endpoint IN 2 */ - NRF_DRV_USBD_EPIN3 = NRF_USBD_EPIN(3), /**< Endpoint IN 3 */ - NRF_DRV_USBD_EPIN4 = NRF_USBD_EPIN(4), /**< Endpoint IN 4 */ - NRF_DRV_USBD_EPIN5 = NRF_USBD_EPIN(5), /**< Endpoint IN 5 */ - NRF_DRV_USBD_EPIN6 = NRF_USBD_EPIN(6), /**< Endpoint IN 6 */ - NRF_DRV_USBD_EPIN7 = NRF_USBD_EPIN(7), /**< Endpoint IN 7 */ - NRF_DRV_USBD_EPIN8 = NRF_USBD_EPIN(8), /**< Endpoint IN 8 */ -}nrf_drv_usbd_ep_t; - -/** - * @brief Events generated by the library - * - * Enumeration of possible events that may be generated by the library. - */ -typedef enum -{ - NRF_DRV_USBD_EVT_SOF, /**< Start Of Frame event on USB bus detected */ - NRF_DRV_USBD_EVT_RESET, /**< Reset condition on USB bus detected */ - NRF_DRV_USBD_EVT_SUSPEND, /**< This device should go to suspend mode now */ - NRF_DRV_USBD_EVT_RESUME, /**< This device should resume from suspend now */ - NRF_DRV_USBD_EVT_WUREQ, /**< Wakeup request - the USBD peripheral is ready to generate WAKEUP signal after exiting low power mode. */ - NRF_DRV_USBD_EVT_SETUP, /**< Setup frame received and decoded */ - NRF_DRV_USBD_EVT_EPTRANSFER, /**< - * For Rx (OUT: Host->Device): - * 1. The packet has been received but there is no buffer prepared for transfer already. - * 2. Whole transfer has been finished - * - * For Tx (IN: Device->Host): - * The last packet from requested transfer has been transfered over USB bus and acknowledged - */ - NRF_DRV_USBD_EVT_CNT /**< Number of defined events */ -}nrf_drv_usbd_event_type_t; - -/** - * @brief Possible endpoint error codes - * - * Error codes that may be returned with @ref NRF_DRV_USBD_EVT_EPTRANSFER - */ -typedef enum -{ - NRF_USBD_EP_OK, /**< No error */ - NRF_USBD_EP_WAITING, /**< Data received, no buffer prepared already - waiting for configured transfer */ - NRF_USBD_EP_OVERLOAD, /**< Received number of bytes cannot fit given buffer - * This error would also be returned when next_transfer function has been defined - * but currently received data cannot fit completely in current buffer. - * No data split from single endpoint transmission is supported. - * - * When this error is reported - data is left inside endpoint buffer. - * Clear endpoint or prepare new buffer and read it. - */ - NRF_USBD_EP_ABORTED, /**< EP0 transfer can be aborted when new setup comes. - * Any other transfer can be aborted by USB reset or library stopping. - */ -}nrf_drv_usbd_ep_status_t; - - -/** - * @brief Event structure - * - * Structure passed to event handler - */ -typedef struct -{ - nrf_drv_usbd_event_type_t type; - union - { - struct{ - uint16_t framecnt; //!< Current value of frame counter - }sof; //!< Data aviable for @ref NRF_DRV_USBD_EVT_SOF - struct{ - nrf_drv_usbd_ep_t ep; //!< Endpoint number - }isocrc; - struct{ - nrf_drv_usbd_ep_t ep; //!< Endpoint number - nrf_drv_usbd_ep_status_t status; //!< Status for the endpoint - }eptransfer; - }data; -}nrf_drv_usbd_evt_t; - -/** - * @brief USBD event callback function type. - * - * @param[in] p_event Event information structure. - */ -typedef void (*nrf_drv_usbd_event_handler_t)(nrf_drv_usbd_evt_t const * const p_event); - -/** - * @brief Universal data pointer. - * - * Universal data pointer that can be used for any type of transfer. - */ -typedef union -{ - void const * tx; //!< Constant TX buffer pointer. - void * rx; //!< Writable RX buffer pointer. - uint32_t ptr; //!< Numeric value used internally by the library. -}nrf_drv_usbd_data_ptr_t; - -/** - * @brief Structure to be filled with information about the next transfer. - * - * This is used mainly for transfer feeders and consumers. - * It describes a single endpoint transfer and therefore the size of the buffer - * can never be higher than the endpoint size. - */ -typedef struct -{ - nrf_drv_usbd_data_ptr_t p_data; //!< Union with available data pointers used by the library. - size_t size; //!< Size of the requested transfer. -}nrf_drv_usbd_ep_transfer_t; - -/** - * @brief Flags for the current transfer. - * - * Flags configured for the transfer that can be merged using the bitwise 'or' operator (|). - */ -typedef enum -{ - NRF_DRV_USBD_TRANSFER_ZLP_FLAG = 1U << 0, //!< Add a zero-length packet. -}nrf_drv_usbd_transfer_flags_t; - -/** - * @brief Total transfer configuration. - * - * This structure is used to configure total transfer information. - * It is used by internal built-in feeders and consumers. - */ -typedef struct -{ - nrf_drv_usbd_data_ptr_t p_data; //!< Union with available data pointers used by the library. - size_t size; //!< Total size of the requested transfer. - uint32_t flags; //!< Transfer flags. - /**< Use the @ref nrf_drv_usbd_transfer_flags_t values. */ -}nrf_drv_usbd_transfer_t; - - -/** - * @brief Auxiliary macro for declaring IN transfer description with flags. - * - * The base macro for creating transfers with any configuration option. - * - * @param name Instance name. - * @param tx_buff Buffer to transfer. - * @param tx_size Transfer size. - * @param tx_flags Flags for the transfer (see @ref nrf_drv_usbd_transfer_flags_t). - * - * @return Configured variable with total transfer description. - */ -#define NRF_DRV_USBD_TRANSFER_IN_FLAGS(name, tx_buff, tx_size, tx_flags) \ - const nrf_drv_usbd_transfer_t name = { \ - .p_data = { .tx = (tx_buff) }, \ - .size = (tx_size), \ - .flags = (tx_flags) \ - } - -/** - * @brief Helper macro for declaring IN transfer description - * - * Normal transfer mode, no ZLP would be automatically generated. - * - * @sa nrf_drv_usbd_transfer_t - * @sa NRF_DRV_USBD_TRANSFER_IN_ZLP - * - * @param name Instance name - * @param tx_buff Buffer to transfer - * @param tx_size Transfer size - * - * @return Configured variable with total transfer description - * - */ -#define NRF_DRV_USBD_TRANSFER_IN(name, tx_buff, tx_size) \ - NRF_DRV_USBD_TRANSFER_IN_FLAGS(name, tx_buff, tx_size, 0) - -/** - * @brief Helper macro for declaring IN transfer description - * - * ZLP mode - Zero Length Packet would be generated on the end of the transfer - * (always!). - * - * @sa nrf_drv_usbd_transfer_t - * @sa NRF_DRV_USBD_TRANSFER_IN - * - * @param name Instance name - * @param tx_buff Buffer to transfer - * @param tx_size Transfer size - * - * @return Configured variable with total transfer description - */ -#define NRF_DRV_USBD_TRANSFER_IN_ZLP(name, tx_buff, tx_size) \ - NRF_DRV_USBD_TRANSFER_IN_FLAGS( \ - name, \ - tx_buff, \ - tx_size, \ - NRF_DRV_USBD_TRANSFER_ZLP_FLAG) - -/** - * @brief Helper macro for declaring OUT transfer item (@ref nrf_drv_usbd_transfer_t) - * - * @param name Instance name - * @param rx_buff Buffer to transfer - * @param rx_size Transfer size - * */ -#define NRF_DRV_USBD_TRANSFER_OUT(name, rx_buff, rx_size) \ - const nrf_drv_usbd_transfer_t name = { \ - .p_data = { .rx = (rx_buff) }, \ - .size = (rx_size), \ - .flags = 0 \ - } - -/** - * @brief USBD transfer feeder. - * - * Pointer for a transfer feeder. - * Transfer feeder is a feedback function used to prepare a single - * TX (Device->Host) endpoint transfer. - * - * The transfers provided by the feeder must be simple: - * - The size of the transfer provided by this function is limited to a single endpoint buffer. - * Bigger transfers are not handled automatically in this case. - * - Flash transfers are not automatically supported- you must copy them to the RAM buffer before. - * - * @note - * This function may use @ref nrf_drv_usbd_feeder_buffer_get to gain a temporary buffer - * that can be used to prepare transfer. - * - * @param[out] p_next Structure with the data for the next transfer to be filled. - * Required only if the function returns true. - * @param[in,out] p_context Context variable configured with the transfer. - * @param[in] ep_size The endpoint size. - * - * @retval false The current transfer is the last one - you do not need to call - * the function again. - * @retval true There is more data to be prepared and when the current transfer - * finishes, the feeder function is expected to be called again. - */ -typedef bool (*nrf_drv_usbd_feeder_t)( - nrf_drv_usbd_ep_transfer_t * p_next, - void * p_context, - size_t ep_size); - -/** - * @brief USBD transfer consumer. - * - * Pointer for a transfer consumer. - * Transfer consumer is a feedback function used to prepare a single - * RX (Host->Device) endpoint transfer. - * - * The transfer must provide a buffer big enough to fit the whole data from the endpoint. - * Otherwise, the NRF_USBD_EP_OVERLOAD event is generated. - * - * @param[out] p_next Structure with the data for the next transfer to be filled. - * Required only if the function returns true. - * @param[in,out] p_context Context variable configured with the transfer. - * @param[in] ep_size The endpoint size. - * @param[in] data_size Number of received bytes in the endpoint buffer. - * - * @retval false Current transfer is the last one - you do not need to call - * the function again. - * @retval true There is more data to be prepared and when current transfer - * finishes, the feeder function is expected to be called again. - */ -typedef bool (*nrf_drv_usbd_consumer_t)( - nrf_drv_usbd_ep_transfer_t * p_next, - void * p_context, - size_t ep_size, - size_t data_size); - -/** - * @brief Universal transfer handler. - * - * Union with feeder and consumer function pointer. - */ -typedef union -{ - nrf_drv_usbd_feeder_t feeder; //!< Feeder function pointer. - nrf_drv_usbd_consumer_t consumer; //!< Consumer function pointer. -}nrf_drv_usbd_handler_t; - -/** - * @brief USBD transfer descriptor. - * - * Universal structure that may hold the setup for callback configuration for - * IN or OUT type of the transfer. - */ -typedef struct -{ - nrf_drv_usbd_handler_t handler; //!< Handler for the current transfer, function pointer. - void * p_context; //!< Context for the transfer handler. -}nrf_drv_usbd_handler_desc_t; - -/** - * @brief Setup packet structure - * - * Structure that contains interpreted SETUP packet. - */ -typedef struct -{ - uint8_t bmRequestType; //!< byte 0 - uint8_t bmRequest; //!< byte 1 - uint16_t wValue; //!< byte 2 - uint16_t wIndex; //!< byte 4, 5 - uint16_t wLength; //!< byte 6, 7 -}nrf_drv_usbd_setup_t; - -/** - * @brief Library initialization - * - * @param[in] event_handler Event handler provided by the user. - */ -ret_code_t nrf_drv_usbd_init(nrf_drv_usbd_event_handler_t const event_handler); - -/** - * @brief Library deinitialization - */ -ret_code_t nrf_drv_usbd_uninit(void); - -/** - * @brief Enable the USBD port - * - * After calling this function USBD peripheral would be enabled. - * The USB LDO would be enabled. - * Enabled USBD peripheral would request HFCLK. - * This function does not enable external oscillator, so if it is not enabled by other part of the - * program after enabling USBD driver HFINT would be used for the USBD peripheral. - * It is perfectly fine until USBD is started. See @ref nrf_drv_usbd_start. - * - * In normal situation this function should be called in reaction to USBDETECTED - * event from POWER peripheral. - * - * Interrupts and USB pins pull-up would stay disabled until @ref nrf_drv_usbd_start - * function is called. - */ -void nrf_drv_usbd_enable(void); - -/** - * @brief Disable the USBD port - * - * After calling this function USBD peripheral would be disabled. - * No events would be detected or processed by the library. - * Clock for the peripheral would be disconnected. - */ -void nrf_drv_usbd_disable(void); - -/** - * @brief Start USB functionality - * - * After calling this function USBD peripheral should be fully functional - * and all new incoming events / interrupts would be processed by the library. - * - * Also only after calling this function host sees new connected device. - * - * Call this function when USBD power LDO regulator is ready - on USBPWRRDY event - * from POWER peripheral. - * - * Before USBD interrupts are enabled, external HFXO is requested. - * - * @param enable_sof The flag that is used to enable SOF processing. - * If it is false, SOF interrupt is left disabled and will not be generated. - * This improves power saving if SOF is not required. - * - * @note If the isochronous endpoints are going to be used, - * it is required to enable the SOF. - * In other case any isochronous endpoint would stay busy - * after first transmission. - */ -void nrf_drv_usbd_start(bool enable_sof); - -/** - * @brief Stop USB functionality - * - * This function disables USBD pull-up and interrupts. - * - * The HFXO request is released in this function. - * - * @note - * This function can also be used to logically disconnect USB from the HOST that - * would force it to enumerate device after calling @ref nrf_drv_usbd_start. - */ -void nrf_drv_usbd_stop(void); - -/** - * @brief Check if driver is initialized - * - * @retval false Driver is not initialized - * @retval true Driver is initialized - */ -bool nrf_drv_usbd_is_initialized(void); - -/** - * @brief Check if driver is enabled - * - * @retval false Driver is disabled - * @retval true Driver is enabled - */ -bool nrf_drv_usbd_is_enabled(void); - -/** - * @brief Check if driver is started - * - * @retval false Driver is not started - * @retval true Driver is started (fully functional) - * @note The USBD peripheral interrupt state is checked - */ -bool nrf_drv_usbd_is_started(void); - -/** - * @brief Suspend USBD operation - * - * The USBD peripheral is forced to go into the low power mode. - * The function has to be called in the reaction to @ref NRF_DRV_USBD_EVT_SUSPEND event - * when the firmware is ready. - * - * After successful call of this function most of the USBD registers would be unavailable. - * - * @note Check returned value for the feedback if suspending was successful. - * - * @retval true USBD peripheral successfully suspended - * @retval false USBD peripheral was not suspended due to resume detection. - * - */ -bool nrf_drv_usbd_suspend(void); - -/** - * @brief Start wake up procedure - * - * The USBD peripheral is forced to quit the low power mode. - * After calling this function all the USBD registers would be available. - * - * The hardware starts measuring time when wake up is possible. - * This may take 0-5 ms depending on how long the SUSPEND state was kept on the USB line. - - * When NRF_DRV_USBD_EVT_WUREQ event is generated it means that Wake Up signaling has just been - * started on the USB lines. - * - * @note Do not expect only @ref NRF_DRV_USBD_EVT_WUREQ event. - * There always may appear @ref NRF_DRV_USBD_EVT_RESUME event. - * @note NRF_DRV_USBD_EVT_WUREQ event means that Remote WakeUp signal - * has just begun to be generated. - * This may take up to 20 ms for the bus to become active. - * - * @retval true WakeUp procedure started. - * @retval false No WakeUp procedure started - bus is already active. - */ -bool nrf_drv_usbd_wakeup_req(void); - -/** - * @brief Check if USBD is in SUSPEND mode - * - * @note This is the information about peripheral itself, not about the bus state. - * - * @retval true USBD peripheral is suspended - * @retval false USBD peripheral is active - */ -bool nrf_drv_usbd_suspend_check(void); - -/** - * @brief Enable only interrupts that should be processed in SUSPEND mode - * - * Auxiliary function to help with SUSPEND mode integration. - * It enables only the interrupts that can be properly processed without stable HFCLK. - * - * Normally all the interrupts are enabled. - * Use this function to suspend interrupt processing that may require stable HFCLK until the - * clock is enabled. - * - * @sa nrf_drv_usbd_active_irq_config - */ -void nrf_drv_usbd_suspend_irq_config(void); - -/** - * @brief Default active interrupt configuration - * - * Default interrupt configuration. - * Use in a pair with @ref nrf_drv_usbd_active_irq_config. - * - * @sa nrf_drv_usbd_suspend_irq_config - */ -void nrf_drv_usbd_active_irq_config(void); - -/** - * @brief Check the bus state - * - * This function checks if the bus state is suspended - * - * @note The value returned by this function changes on SUSPEND and RESUME event processing. - * - * @retval true USBD bus is suspended - * @retval false USBD bus is active - */ -bool nrf_drv_usbd_bus_suspend_check(void); - -/** - * @brief Configure packet size that should be supported by the endpoint - * - * The real endpoint buffer size is always the same. - * This value sets max packet size that would be transmitted over the endpoint. - * This is required by the library - * - * @param[in] ep Endpoint number - * @param[in] size Required maximum packet size - * - * @note Endpoint size is always set to @ref NRF_DRV_USBD_EPSIZE or @ref NRF_DRV_USBD_ISOSIZE / 2 - * when @ref nrf_drv_usbd_ep_enable function is called. - */ -void nrf_drv_usbd_ep_max_packet_size_set(nrf_drv_usbd_ep_t ep, uint16_t size); - -/** - * @brief Get configured endpoint packet size - * - * Function to get configured endpoint size on the buffer. - * - * @param[in] ep Endpoint number - * - * @return Maximum pocket size configured on selected endpoint - */ -uint16_t nrf_drv_usbd_ep_max_packet_size_get(nrf_drv_usbd_ep_t ep); - -/** - * @brief Check if the selected endpoint is enabled. - * - * @param ep Endpoint number to check. - * - * @retval true Endpoint is enabled. - * @retval false Endpoint is disabled. - */ -bool nrf_drv_usbd_ep_enable_check(nrf_drv_usbd_ep_t ep); - -/** - * @brief Enable selected endpoint - * - * This function enables endpoint itself and its interrupts. - * @param ep Endpoint number to enable - * - * @note - * Max packet size is set to endpoint default maximum value. - * - * @sa nrf_drv_usbd_ep_max_packet_size_set - */ -void nrf_drv_usbd_ep_enable(nrf_drv_usbd_ep_t ep); - -/** - * @brief Disable selected endpoint - * - * This function disables endpoint itself and its interrupts. - * @param ep Endpoint number to disable - */ -void nrf_drv_usbd_ep_disable(nrf_drv_usbd_ep_t ep); - -/** - * @brief Disable all endpoints except for EP0 - * - * Disable all endpoints that can be disabled in USB device while it is still active. - */ -void nrf_drv_usbd_ep_default_config(void); - -/** - * @brief Start sending data over endpoint - * - * Function initializes endpoint transmission. - * This is asynchronous function - it finishes immediately after configuration - * for transmission is prepared. - * - * @note Data buffer pointed by p_data have to be kept active till - * @ref NRF_DRV_USBD_EVT_EPTRANSFER event is generated. - * - * @param[in] ep Endpoint number. - * For IN endpoint sending would be initiated. - * For OUT endpoint receiving would be initiated. - * @param[in] p_transfer - * - * @retval NRF_ERROR_BUSY Selected endpoint is pending. - * @retval NRF_ERROR_INVALID_ADDR Unexpected transfer on EPIN0 or EPOUT0. - * @retval NRF_ERROR_FORBIDDEN Endpoint stalled. - * @retval NRF_SUCCESS Transfer queued or started. - */ -ret_code_t nrf_drv_usbd_ep_transfer( - nrf_drv_usbd_ep_t ep, - nrf_drv_usbd_transfer_t const * const p_transfer); - -/** - * @brief Start sending data over the endpoint using the transfer handler function. - * - * This function initializes an endpoint transmission. - * Just before data is transmitted, the transfer handler - * is called and it prepares a data chunk. - * - * @param[in] ep Endpoint number. - * For an IN endpoint, sending is initiated. - * For an OUT endpoint, receiving is initiated. - * @param p_handler Transfer handler - feeder for IN direction and consumer for - * OUT direction. - * - * @retval NRF_ERROR_BUSY Selected endpoint is pending. - * @retval NRF_ERROR_INVALID_ADDR Unexpected transfer on EPIN0 or EPOUT0. - * @retval NRF_ERROR_FORBIDDEN Endpoint stalled. - * @retval NRF_SUCCESS Transfer queued or started. - */ -ret_code_t nrf_drv_usbd_ep_handled_transfer( - nrf_drv_usbd_ep_t ep, - nrf_drv_usbd_handler_desc_t const * const p_handler); - -/** - * @brief Get the temporary buffer to be used by the feeder. - * - * This buffer is used for TX transfers and it can be reused automatically - * when the transfer is finished. - * Use it for transfer preparation. - * - * May be used inside the feeder configured in @ref nrf_drv_usbd_ep_handled_transfer. - * - * @return Pointer to the buffer that can be used temporarily. - * - * @sa NRF_DRV_USBD_FEEDER_BUFFER_SIZE - */ -void * nrf_drv_usbd_feeder_buffer_get(void); - -/** - * @brief Get the information about last finished or current transfer - * - * Function returns the status of the last buffer set for transfer on selected endpoint. - * The status considers last buffer set by @ref nrf_drv_usbd_ep_transfer function or - * by transfer callback function. - * - * @param[in] ep Endpoint number. - * @param[out] p_size Information about the current/last transfer size. - * - * @retval NRF_SUCCESS Transfer already finished - * @retval NRF_ERROR_BUSY Ongoing transfer - * @retval NRF_ERROR_DATA_SIZE Too much of data received that cannot fit into buffer and cannot be splited into chunks. - * This may happen if buffer size is not a multiplication of endpoint buffer size. - */ -ret_code_t nrf_drv_usbd_ep_status_get(nrf_drv_usbd_ep_t ep, size_t * p_size); - -/** - * @brief Get number of received bytes - * - * Get the number of received bytes. - * The function behavior is undefined when called on IN endpoint. - * - * @param ep Endpoint number. - * - * @return Number of received bytes - */ -size_t nrf_drv_usbd_epout_size_get(nrf_drv_usbd_ep_t ep); - -/** - * @brief Check if endpoint buffer is ready or is under USB IP control - * - * Function to test if endpoint is busy. - * Endpoint that is busy cannot be accessed by MCU. - * It means that: - * - OUT (TX) endpoint: Last uploaded data is still in endpoint and is waiting - * to be received by the host. - * - IN (RX) endpoint: Endpoint is ready to receive data from the host - * and the endpoint does not have any data. - * When endpoint is not busy: - * - OUT (TX) endpoint: New data can be uploaded. - * - IN (RX) endpoint: New data can be downloaded using @ref nrf_drv_usbd_ep_transfer - * function. - */ -bool nrf_drv_usbd_ep_is_busy(nrf_drv_usbd_ep_t ep); - -/** - * @brief Stall endpoint - * - * Stall endpoit to send error information during next transfer request from - * the host. - * - * @note To stall endpoint it is safer to use @ref nrf_drv_usbd_setup_stall - * @note Stalled endpoint would not be cleared when DMA transfer finishes. - * - * @param ep Endpoint number to stall - * - */ -void nrf_drv_usbd_ep_stall(nrf_drv_usbd_ep_t ep); - -/** - * @brief Clear stall flag on endpoint - * - * This function clears endpoint that is stalled. - * @note - * If it is OUT endpoint (receiving) it would be also prepared for reception. - * It means that busy flag would be set. - * @note - * In endpoint (transmitting) would not be cleared - it gives possibility to - * write new data before transmitting. - */ -void nrf_drv_usbd_ep_stall_clear(nrf_drv_usbd_ep_t ep); - -/** - * @brief Check if endpoint is stalled - * - * This function gets stall state of selected endpoint - * - * @param ep Endpoint number to check - */ -bool nrf_drv_usbd_ep_stall_check(nrf_drv_usbd_ep_t ep); - -/** - * @brief Clear current endpoint data toggle - * - * @param ep Endpoint number to clear - */ -void nrf_drv_usbd_ep_dtoggle_clear(nrf_drv_usbd_ep_t ep); - -/** - * @brief Get parsed setup data - * - * Function fills the parsed setup data structure. - * - * @param[out] p_setup Pointer to data structure that would be filled by - * parsed data. - */ -void nrf_drv_usbd_setup_get(nrf_drv_usbd_setup_t * const p_setup); - -/** - * @brief Clear only for data transmission on setup endpoint - * - * This function may be called if any more data in control write transfer is expected. - * Clears only OUT endpoint to be able to take another OUT data token. - * It does not allow STATUS stage. - * @sa nrf_drv_usbd_setup_clear - */ -void nrf_drv_usbd_setup_data_clear(void); - -/** - * @brief Clear setup endpoint - * - * This function acknowledges setup when SETUP command was received and processed. - * It has to be called if no data respond for the SETUP command is sent. - * - * When there is any data transmission after SETUP command the data transmission - * itself would clear the endpoint. - */ -void nrf_drv_usbd_setup_clear(void); - -/** - * @brief Stall setup endpoint - * - * Mark and error on setup endpoint. - */ -void nrf_drv_usbd_setup_stall(void); - -/** -* @note -* This function locks interrupts that may be costly. -* It is good idea to test if the endpoint is still busy before calling this function: -* @code - (m_ep_dma_waiting & (1U << ep2bit(ep))) -* @endcode -* This function would check it again, but it makes it inside critical section. -*/ -void nrf_drv_usbd_ep_abort(nrf_drv_usbd_ep_t ep); - -/** - * @brief Get the information about expected transfer SETUP data direction - * - * Function returns the information about last expected transfer direction. - * - * @retval NRF_DRV_USBD_EPOUT0 Expecting OUT (Host->Device) direction or no data - * @retval NRF_DRV_USBD_EPIN0 Expecting IN (Device->Host) direction - */ -nrf_drv_usbd_ep_t nrf_drv_usbd_last_setup_dir_get(void); - -/** - * @brief Drop transfer on OUT endpoint - * - * @param[in] ep OUT endpoint ID - */ -void nrf_drv_usbd_transfer_out_drop(nrf_drv_usbd_ep_t ep); - -#ifdef __cplusplus -} -#endif - -/** @} */ -#endif /* NRF_DRV_USBD_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd_errata.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd_errata.h deleted file mode 100644 index 00371e96729..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd_errata.h +++ /dev/null @@ -1,141 +0,0 @@ -/** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef NRF_DRV_USBD_ERRATA_H__ -#define NRF_DRV_USBD_ERRATA_H__ - -#include -/** - * @defgroup nrf_drv_usbd_errata Functions to check if selected PAN is present in current chip - * @{ - * @ingroup nrf_drv_usbd - * - * Functions here are checking the presence of an error in current chip. - * The checking is done at runtime based on the microcontroller version. - * This file is subject to removal when nRF51840 prototype support is removed. - */ - -#ifndef NRF_DRV_USBD_ERRATA_ENABLE -/** - * @brief The constant that informs if errata should be enabled at all - * - * If this constant is set to 0, all the Errata bug fixes will be automatically disabled. - */ -#define NRF_DRV_USBD_ERRATA_ENABLE 1 -#endif - -/** - * @brief Internal auxiliary function to check if the program is running on NRF52840 chip - * @retval true It is NRF52480 chip - * @retval false It is other chip - */ -static inline bool nrf_drv_usbd_errata_type_52840(void) -{ - return ((((*(uint32_t *)0xF0000FE0) & 0xFF) == 0x08) && - (((*(uint32_t *)0xF0000FE4) & 0x0F) == 0x0)); -} - -/** - * @brief Internal auxiliary function to check if the program is running on first sample of - * NRF52840 chip - * @retval true It is NRF52480 chip and it is first sample version - * @retval false It is other chip - */ -static inline bool nrf_drv_usbd_errata_type_52840_proto1(void) -{ - return ( nrf_drv_usbd_errata_type_52840() && - ( ((*(uint32_t *)0xF0000FE8) & 0xF0) == 0x00 ) && - ( ((*(uint32_t *)0xF0000FEC) & 0xF0) == 0x00 ) ); -} - -/** - * @brief Function to check if chip requires errata 104 - * - * Errata: USBD: EPDATA event is not always generated. - * - * @retval true Errata should be implemented - * @retval false Errata should not be implemented - */ -static inline bool nrf_drv_usbd_errata_104(void) -{ - return NRF_DRV_USBD_ERRATA_ENABLE && nrf_drv_usbd_errata_type_52840_proto1(); -} - -/** - * @brief Function to check if chip requires errata 154 - * - * Errata: During setup read/write transfer USBD acknowledges setup stage without SETUP task. - * - * @retval true Errata should be implemented - * @retval false Errata should not be implemented - */ -static inline bool nrf_drv_usbd_errata_154(void) -{ - return NRF_DRV_USBD_ERRATA_ENABLE && nrf_drv_usbd_errata_type_52840_proto1(); -} - -/** - * @brief Function to check if chip requires errata 166 - * - * Errata: ISO double buffering not functional - * - * @retval true Errata should be implemented - * @retval false Errata should not be implemented - */ -static inline bool nrf_drv_usbd_errata_166(void) -{ - return NRF_DRV_USBD_ERRATA_ENABLE && true; -} - -/** - * @brief Function to check if chip requires errata ??? - * - * Errata: SIZE.EPOUT not writable - * - * @retval true Errata should be implemented - * @retval false Errata should not be implemented - */ -static inline bool nrf_drv_usbd_errata_sizeepout_rw(void) -{ - return NRF_DRV_USBD_ERRATA_ENABLE && nrf_drv_usbd_errata_type_52840_proto1(); -} - -/** @} */ -#endif /* NRF_DRV_USBD_ERRATA_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/wdt/nrf_drv_wdt.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/wdt/nrf_drv_wdt.c deleted file mode 100644 index 7a2f92d90df..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/wdt/nrf_drv_wdt.c +++ /dev/null @@ -1,173 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(WDT) -#include "nrf_drv_wdt.h" -#include "nrf_drv_common.h" -#include "nrf_error.h" -#include "nrf_assert.h" -#include "nrf_wdt.h" -#include "app_util_platform.h" -#include -#include - -#define NRF_LOG_MODULE_NAME wdt - -#if WDT_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL WDT_CONFIG_LOG_LEVEL -#define NRF_LOG_INFO_COLOR WDT_CONFIG_INFO_COLOR -#define NRF_LOG_DEBUG_COLOR WDT_CONFIG_DEBUG_COLOR -#else //WDT_CONFIG_LOG_ENABLED -#define NRF_LOG_LEVEL 0 -#endif //WDT_CONFIG_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - - -/**@brief WDT event handler. */ -static nrf_wdt_event_handler_t m_wdt_event_handler; - -/**@brief WDT state. */ -static nrf_drv_state_t m_state; - -/**@brief WDT alloc table. */ -static uint32_t m_alloc_index; - -static const nrf_drv_wdt_config_t m_default_config = NRF_DRV_WDT_DEAFULT_CONFIG; - -/**@brief WDT interrupt handler. */ -void WDT_IRQHandler(void) -{ - if (nrf_wdt_int_enable_check(NRF_WDT_INT_TIMEOUT_MASK) == true) - { - nrf_wdt_event_clear(NRF_WDT_EVENT_TIMEOUT); - m_wdt_event_handler(); - } -} - - -ret_code_t nrf_drv_wdt_init(nrf_drv_wdt_config_t const * p_config, - nrf_wdt_event_handler_t wdt_event_handler) -{ - ASSERT(wdt_event_handler != NULL); - ret_code_t err_code; - m_wdt_event_handler = wdt_event_handler; - - if (m_state == NRF_DRV_STATE_UNINITIALIZED) - { - m_state = NRF_DRV_STATE_INITIALIZED; - } - else - { - err_code = NRF_ERROR_INVALID_STATE; - NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; - } - - if (p_config == NULL) - { - p_config = &m_default_config; - } - - nrf_wdt_behaviour_set(p_config->behaviour); - - if ((((uint64_t) p_config->reload_value * 32768) / 1000) > UINT32_MAX) // Check for overflow - { - return NRF_ERROR_INVALID_PARAM; - } - nrf_wdt_reload_value_set(((uint64_t) p_config->reload_value * 32768) / 1000); - - nrf_drv_common_irq_enable(WDT_IRQn, p_config->interrupt_priority); - - err_code = NRF_SUCCESS; - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code)); - return err_code; -} - - -void nrf_drv_wdt_enable(void) -{ - ASSERT(m_alloc_index != 0); - ASSERT(m_state == NRF_DRV_STATE_INITIALIZED); - nrf_wdt_int_enable(NRF_WDT_INT_TIMEOUT_MASK); - nrf_wdt_task_trigger(NRF_WDT_TASK_START); - m_state = NRF_DRV_STATE_POWERED_ON; - NRF_LOG_INFO("Enabled."); -} - - -void nrf_drv_wdt_feed(void) -{ - ASSERT(m_state == NRF_DRV_STATE_POWERED_ON); - for (uint32_t i = 0; i < m_alloc_index; i++) - { - nrf_wdt_reload_request_set((nrf_wdt_rr_register_t)(NRF_WDT_RR0 + i)); - } -} - -ret_code_t nrf_drv_wdt_channel_alloc(nrf_drv_wdt_channel_id * p_channel_id) -{ - ret_code_t result; - ASSERT(p_channel_id); - ASSERT(m_state == NRF_DRV_STATE_INITIALIZED); - - CRITICAL_REGION_ENTER(); - if (m_alloc_index < NRF_WDT_CHANNEL_NUMBER) - { - *p_channel_id = (nrf_drv_wdt_channel_id)(NRF_WDT_RR0 + m_alloc_index); - m_alloc_index++; - nrf_wdt_reload_request_enable(*p_channel_id); - result = NRF_SUCCESS; - } - else - { - result = NRF_ERROR_NO_MEM; - } - CRITICAL_REGION_EXIT(); - NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(result)); - return result; -} - -void nrf_drv_wdt_channel_feed(nrf_drv_wdt_channel_id channel_id) -{ - ASSERT(m_state == NRF_DRV_STATE_POWERED_ON); - nrf_wdt_reload_request_set(channel_id); -} -#endif //NRF_MODULE_ENABLED(WDT) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/wdt/nrf_drv_wdt.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/wdt/nrf_drv_wdt.h deleted file mode 100644 index 4fdd1d9cbbd..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/wdt/nrf_drv_wdt.h +++ /dev/null @@ -1,160 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/**@file - * @addtogroup nrf_wdt WDT HAL and driver - * @ingroup nrf_drivers - * @brief Watchdog timer (WDT) APIs. - * @details The WDT HAL provides basic APIs for accessing the registers of the watchdog timer. - * The WDT driver provides APIs on a higher level. - * @defgroup nrf_drv_wdt WDT driver - * @{ - * @ingroup nrf_wdt - * - * @brief Driver for managing the watchdog timer (WDT). - */ - -#ifndef NRF_DRV_WDT_H__ -#define NRF_DRV_WDT_H__ - -#include -#include -#include "sdk_errors.h" -#include "nrf_wdt.h" -#include "sdk_config.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@brief Struct for WDT initialization. */ -typedef struct -{ - nrf_wdt_behaviour_t behaviour; /**< WDT behaviour when CPU in sleep/halt mode. */ - uint32_t reload_value; /**< WDT reload value in ms. */ - uint8_t interrupt_priority; /**< WDT interrupt priority */ -} nrf_drv_wdt_config_t; - -/**@brief WDT event handler function type. */ -typedef void (*nrf_wdt_event_handler_t)(void); - -/**@brief WDT channel id type. */ -typedef nrf_wdt_rr_register_t nrf_drv_wdt_channel_id; - -#define NRF_DRV_WDT_DEAFULT_CONFIG \ - { \ - .behaviour = (nrf_wdt_behaviour_t)WDT_CONFIG_BEHAVIOUR, \ - .reload_value = WDT_CONFIG_RELOAD_VALUE, \ - .interrupt_priority = WDT_CONFIG_IRQ_PRIORITY, \ - } -/** - * @brief This function initializes watchdog. - * - * @param[in] p_config Initial configuration. Default configuration used if NULL. - * @param[in] wdt_event_handler specifies event handler provided by user. - * - * @note Function asserts if wdt_event_handler is NULL. - * - * @return NRF_SUCCESS on success, otherwise an error code. - */ -ret_code_t nrf_drv_wdt_init(nrf_drv_wdt_config_t const * p_config, - nrf_wdt_event_handler_t wdt_event_handler); - -/** - * @brief This function allocate watchdog channel. - * - * @note This function can not be called after nrf_drv_wdt_start(void). - * - * @param[out] p_channel_id ID of granted channel. - * - * @return NRF_SUCCESS on success, otherwise an error code. - */ -ret_code_t nrf_drv_wdt_channel_alloc(nrf_drv_wdt_channel_id * p_channel_id); - -/** - * @brief This function starts watchdog. - * - * @note After calling this function the watchdog is started, so the user needs to feed all allocated - * watchdog channels to avoid reset. At least one watchdog channel has to be allocated. - */ -void nrf_drv_wdt_enable(void); - -/** - * @brief This function feeds the watchdog. - * - * @details Function feeds all allocated watchdog channels. - */ -void nrf_drv_wdt_feed(void); - -/** - * @brief This function feeds the invidual watchdog channel. - * - * @param[in] channel_id ID of watchdog channel. - */ -void nrf_drv_wdt_channel_feed(nrf_drv_wdt_channel_id channel_id); - -/**@brief Function for returning a requested task address for the wdt driver module. - * - * @param[in] task One of the peripheral tasks. - * - * @retval Task address. - */ -__STATIC_INLINE uint32_t nrf_drv_wdt_ppi_task_addr(nrf_wdt_task_t task) -{ - return nrf_wdt_task_address_get(task); -} - -/**@brief Function for returning a requested event address for the wdt driver module. - * - * @param[in] event One of the peripheral events. - * - * @retval Event address - */ -__STATIC_INLINE uint32_t nrf_drv_wdt_ppi_event_addr(nrf_wdt_event_t event) -{ - return nrf_wdt_event_address_get(event); -} - -#ifdef __cplusplus -} -#endif - -#endif - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/README.md b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/README.md deleted file mode 100644 index 0c6f23f19b4..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/README.md +++ /dev/null @@ -1,51 +0,0 @@ -# Folder origin - -components/libraries - -# Modifications - -Only essential folders have been copied over. - -Removed: - * block_dev/ - * bootloader/ - * bsp/ - * button/ - * cli/ - * crc16/ - * crc32/ - * crypto/ - * csense/ - * csense_drv/ - * ecc/ - * eddystone/ - * experimental_mpu/ - * experimental_ringbuf/ - * experimental_stack_guard/ - * experimental_task_manager/ - * fifo/ - * gfx/ - * gpiote/ - * hardfault/ - * hci/ - * led_softblink/ - * low_power_pwm/ - * mem_manager/ - * mutex/ - * pwm/ - * pwr_mgmt/ - * scheduler/ - * sdcard/ - * sensorsim/ - * serial/ - * sha256/ - * simple_timer/ - * slip/ - * sortlist/ - * spi_mngr/ - * svc/ - * timer/ - * twi/ - * twi_mngr/ - * uart/ - * usbd/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/atomic/nrf_atomic.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/atomic/nrf_atomic.h deleted file mode 100644 index 32ae3462fe5..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/atomic/nrf_atomic.h +++ /dev/null @@ -1,495 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/**@file - * - * @defgroup nrf_atomic Atomic operations API - * @ingroup nrf_atfifo - * @{ - * - * @brief @tagAPI52 This module implements C11 stdatomic.h simplified API. - At this point only Cortex-M3/M4 cores are supported (LDREX/STREX instructions). - * Atomic types are limited to @ref nrf_atomic_u32_t and @ref nrf_atomic_flag_t. - */ - -#ifndef NRF_ATOMIC_H__ -#define NRF_ATOMIC_H__ - -#include "sdk_common.h" - - -#ifndef NRF_ATOMIC_USE_BUILD_IN -#if (defined(__GNUC__) && defined(WIN32)) - #define NRF_ATOMIC_USE_BUILD_IN 1 -#else - #define NRF_ATOMIC_USE_BUILD_IN 0 -#endif -#endif // NRF_ATOMIC_USE_BUILD_IN - -#if ((__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)) -#define STREX_LDREX_PRESENT -#else -#include "app_util_platform.h" -#endif - -/** - * @brief Atomic 32 bit unsigned type - * */ -typedef volatile uint32_t nrf_atomic_u32_t; - -/** - * @brief Atomic 1 bit flag type (technically 32 bit) - * */ -typedef volatile uint32_t nrf_atomic_flag_t; - -#if (NRF_ATOMIC_USE_BUILD_IN == 0) && defined(STREX_LDREX_PRESENT) -#include "nrf_atomic_internal.h" -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Stores value to an atomic object - * - * @param[in] p_data Atomic memory pointer - * @param[in] value Value to store - * - * @return Old value stored into atomic object - * */ -static inline uint32_t nrf_atomic_u32_fetch_store(nrf_atomic_u32_t * p_data, uint32_t value) -{ -#if NRF_ATOMIC_USE_BUILD_IN - return __atomic_exchange_n(p_data, value, __ATOMIC_SEQ_CST); - -#elif defined(STREX_LDREX_PRESENT) - uint32_t old_val; - uint32_t new_val; - NRF_ATOMIC_OP(mov, old_val, new_val, p_data, value); - - UNUSED_PARAMETER(old_val); - UNUSED_PARAMETER(new_val); - return old_val; -#else - CRITICAL_REGION_ENTER(); - uint32_t old_val = *p_data; - *p_data = value; - CRITICAL_REGION_EXIT(); - return old_val; -#endif //NRF_ATOMIC_USE_BUILD_IN -} - -/** - * @brief Stores value to an atomic object - * - * @param[in] p_data Atomic memory pointer - * @param[in] value Value to store - * - * @return New value stored into atomic object - * */ -static inline uint32_t nrf_atomic_u32_store(nrf_atomic_u32_t * p_data, uint32_t value) -{ -#if NRF_ATOMIC_USE_BUILD_IN - __atomic_store_n(p_data, value, __ATOMIC_SEQ_CST); - return value; -#elif defined(STREX_LDREX_PRESENT) - uint32_t old_val; - uint32_t new_val; - - NRF_ATOMIC_OP(mov, old_val, new_val, p_data, value); - - UNUSED_PARAMETER(old_val); - UNUSED_PARAMETER(new_val); - return new_val; -#else - CRITICAL_REGION_ENTER(); - *p_data = value; - CRITICAL_REGION_EXIT(); - return value; -#endif //NRF_ATOMIC_USE_BUILD_IN -} - -/** - * @brief Logical OR operation on an atomic object - * - * @param[in] p_data Atomic memory pointer - * @param[in] value Value of second operand OR operation - * - * @return Old value stored into atomic object - * */ -static inline uint32_t nrf_atomic_u32_fetch_or(nrf_atomic_u32_t * p_data, uint32_t value) -{ -#if NRF_ATOMIC_USE_BUILD_IN - return __atomic_fetch_or(p_data, value, __ATOMIC_SEQ_CST); -#elif defined(STREX_LDREX_PRESENT) - uint32_t old_val; - uint32_t new_val; - - NRF_ATOMIC_OP(orr, old_val, new_val, p_data, value); - UNUSED_PARAMETER(old_val); - UNUSED_PARAMETER(new_val); - return old_val; -#else - CRITICAL_REGION_ENTER(); - uint32_t old_val = *p_data; - *p_data |= value; - CRITICAL_REGION_EXIT(); - return old_val; -#endif //NRF_ATOMIC_USE_BUILD_IN -} - -/** - * @brief Logical OR operation on an atomic object - * - * @param[in] p_data Atomic memory pointer - * @param[in] value Value of second operand OR operation - * - * @return New value stored into atomic object - * */ -static inline uint32_t nrf_atomic_u32_or(nrf_atomic_u32_t * p_data, uint32_t value) -{ -#if NRF_ATOMIC_USE_BUILD_IN - return __atomic_or_fetch(p_data, value, __ATOMIC_SEQ_CST); -#elif defined(STREX_LDREX_PRESENT) - uint32_t old_val; - uint32_t new_val; - - NRF_ATOMIC_OP(orr, old_val, new_val, p_data, value); - UNUSED_PARAMETER(old_val); - UNUSED_PARAMETER(new_val); - return new_val; -#else - CRITICAL_REGION_ENTER(); - *p_data |= value; - uint32_t new_value = *p_data; - CRITICAL_REGION_EXIT(); - return new_value; -#endif //NRF_ATOMIC_USE_BUILD_IN -} - -/** - * @brief Logical AND operation on an atomic object - * - * @param[in] p_data Atomic memory pointer - * @param[in] value Value of second operand AND operation - * - * @return Old value stored into atomic object - * */ -static inline uint32_t nrf_atomic_u32_fetch_and(nrf_atomic_u32_t * p_data, uint32_t value) -{ -#if NRF_ATOMIC_USE_BUILD_IN - return __atomic_fetch_and(p_data, value, __ATOMIC_SEQ_CST); -#elif defined(STREX_LDREX_PRESENT) - uint32_t old_val; - uint32_t new_val; - - NRF_ATOMIC_OP(and, old_val, new_val, p_data, value); - UNUSED_PARAMETER(old_val); - UNUSED_PARAMETER(new_val); - return old_val; -#else - CRITICAL_REGION_ENTER(); - uint32_t old_val = *p_data; - *p_data &= value; - CRITICAL_REGION_EXIT(); - return old_val; -#endif //NRF_ATOMIC_USE_BUILD_IN -} - -/** - * @brief Logical AND operation on an atomic object - * - * @param[in] p_data Atomic memory pointer - * @param[in] value Value of second operand AND operation - * - * @return New value stored into atomic object - * */ -static inline uint32_t nrf_atomic_u32_and(nrf_atomic_u32_t * p_data, uint32_t value) -{ -#if NRF_ATOMIC_USE_BUILD_IN - return __atomic_and_fetch(p_data, value, __ATOMIC_SEQ_CST); -#elif defined(STREX_LDREX_PRESENT) - uint32_t old_val; - uint32_t new_val; - - NRF_ATOMIC_OP(and, old_val, new_val, p_data, value); - UNUSED_PARAMETER(old_val); - UNUSED_PARAMETER(new_val); - return new_val; -#else - CRITICAL_REGION_ENTER(); - *p_data &= value; - uint32_t new_value = *p_data; - CRITICAL_REGION_EXIT(); - return new_value; -#endif //NRF_ATOMIC_USE_BUILD_IN -} - -/** - * @brief Logical XOR operation on an atomic object - * - * @param[in] p_data Atomic memory pointer - * @param[in] value Value of second operand XOR operation - * - * @return Old value stored into atomic object - * */ -static inline uint32_t nrf_atomic_u32_fetch_xor(nrf_atomic_u32_t * p_data, uint32_t value) -{ -#if NRF_ATOMIC_USE_BUILD_IN - return __atomic_fetch_xor(p_data, value, __ATOMIC_SEQ_CST); -#elif defined(STREX_LDREX_PRESENT) - uint32_t old_val; - uint32_t new_val; - - NRF_ATOMIC_OP(eor, old_val, new_val, p_data, value); - UNUSED_PARAMETER(old_val); - UNUSED_PARAMETER(new_val); - return old_val; -#else - CRITICAL_REGION_ENTER(); - uint32_t old_val = *p_data; - *p_data ^= value; - CRITICAL_REGION_EXIT(); - return old_val; -#endif //NRF_ATOMIC_USE_BUILD_IN -} - -/** - * @brief Logical XOR operation on an atomic object - * - * @param[in] p_data Atomic memory pointer - * @param[in] value Value of second operand XOR operation - * - * @return New value stored into atomic object - * */ -static inline uint32_t nrf_atomic_u32_xor(nrf_atomic_u32_t * p_data, uint32_t value) -{ -#if NRF_ATOMIC_USE_BUILD_IN - return __atomic_xor_fetch(p_data, value, __ATOMIC_SEQ_CST); -#elif defined(STREX_LDREX_PRESENT) - uint32_t old_val; - uint32_t new_val; - - NRF_ATOMIC_OP(eor, old_val, new_val, p_data, value); - UNUSED_PARAMETER(old_val); - UNUSED_PARAMETER(new_val); - return new_val; -#else - CRITICAL_REGION_ENTER(); - *p_data ^= value; - uint32_t new_value = *p_data; - CRITICAL_REGION_EXIT(); - return new_value; -#endif //NRF_ATOMIC_USE_BUILD_IN -} - -/** - * @brief Arithmetic ADD operation on an atomic object - * - * @param[in] p_data Atomic memory pointer - * @param[in] value Value of second operand ADD operation - * - * @return Old value stored into atomic object - * */ -static inline uint32_t nrf_atomic_u32_fetch_add(nrf_atomic_u32_t * p_data, uint32_t value) -{ -#if NRF_ATOMIC_USE_BUILD_IN - return __atomic_fetch_add(p_data, value, __ATOMIC_SEQ_CST); -#elif defined(STREX_LDREX_PRESENT) - uint32_t old_val; - uint32_t new_val; - - NRF_ATOMIC_OP(add, old_val, new_val, p_data, value); - UNUSED_PARAMETER(old_val); - UNUSED_PARAMETER(new_val); - return old_val; -#else - CRITICAL_REGION_ENTER(); - uint32_t old_val = *p_data; - *p_data += value; - CRITICAL_REGION_EXIT(); - return old_val; -#endif //NRF_ATOMIC_USE_BUILD_IN -} - -/** - * @brief Arithmetic ADD operation on an atomic object - * - * @param[in] p_data Atomic memory pointer - * @param[in] value Value of second operand ADD operation - * - * @return New value stored into atomic object - * */ -static inline uint32_t nrf_atomic_u32_add(nrf_atomic_u32_t * p_data, uint32_t value) -{ -#if NRF_ATOMIC_USE_BUILD_IN - return __atomic_add_fetch(p_data, value, __ATOMIC_SEQ_CST); -#elif defined(STREX_LDREX_PRESENT) - uint32_t old_val; - uint32_t new_val; - - NRF_ATOMIC_OP(add, old_val, new_val, p_data, value); - UNUSED_PARAMETER(old_val); - UNUSED_PARAMETER(new_val); - return new_val; -#else - CRITICAL_REGION_ENTER(); - *p_data += value; - uint32_t new_value = *p_data; - CRITICAL_REGION_EXIT(); - return new_value; -#endif //NRF_ATOMIC_USE_BUILD_IN -} - -/** - * @brief Arithmetic SUB operation on an atomic object - * - * @param[in] p_data Atomic memory pointer - * @param[in] value Value of second operand SUB operation - * - * @return Old value stored into atomic object - * */ -static inline uint32_t nrf_atomic_u32_fetch_sub(nrf_atomic_u32_t * p_data, uint32_t value) -{ -#if NRF_ATOMIC_USE_BUILD_IN - return __atomic_fetch_sub(p_data, value, __ATOMIC_SEQ_CST); -#elif defined(STREX_LDREX_PRESENT) - uint32_t old_val; - uint32_t new_val; - - NRF_ATOMIC_OP(sub, old_val, new_val, p_data, value); - UNUSED_PARAMETER(old_val); - UNUSED_PARAMETER(new_val); - return old_val; -#else - CRITICAL_REGION_ENTER(); - uint32_t old_val = *p_data; - *p_data -= value; - CRITICAL_REGION_EXIT(); - return old_val; -#endif //NRF_ATOMIC_USE_BUILD_IN -} - -/** - * @brief Arithmetic SUB operation on an atomic object - * - * @param[in] p_data Atomic memory pointer - * @param[in] value Value of second operand SUB operation - * - * @return New value stored into atomic object - * */ -static inline uint32_t nrf_atomic_u32_sub(nrf_atomic_u32_t * p_data, uint32_t value) -{ -#if NRF_ATOMIC_USE_BUILD_IN - return __atomic_sub_fetch(p_data, value, __ATOMIC_SEQ_CST); -#elif defined(STREX_LDREX_PRESENT) - uint32_t old_val; - uint32_t new_val; - - NRF_ATOMIC_OP(sub, old_val, new_val, p_data, value); - UNUSED_PARAMETER(old_val); - UNUSED_PARAMETER(new_val); - return new_val; -#else - CRITICAL_REGION_ENTER(); - *p_data -= value; - uint32_t new_value = *p_data; - CRITICAL_REGION_EXIT(); - return new_value; -#endif //NRF_ATOMIC_USE_BUILD_IN -} - -/**************************************************************************************************/ - -/** - * @brief Logic one bit flag set operation on an atomic object - * - * @param[in] p_data Atomic flag memory pointer - * - * @return Old flag value - * */ -static inline uint32_t nrf_atomic_flag_set_fetch(nrf_atomic_flag_t * p_data) -{ - return nrf_atomic_u32_fetch_or(p_data, 1); -} - -/** - * @brief Logic one bit flag set operation on an atomic object - * - * @param[in] p_data Atomic flag memory pointer - * - * @return New flag value - * */ -static inline uint32_t nrf_atomic_flag_set(nrf_atomic_flag_t * p_data) -{ - return nrf_atomic_u32_or(p_data, 1); -} - -/** - * @brief Logic one bit flag clear operation on an atomic object - * - * @param[in] p_data Atomic flag memory pointer - * - * @return Old flag value - * */ -static inline uint32_t nrf_atomic_flag_clear_fetch(nrf_atomic_flag_t * p_data) -{ - return nrf_atomic_u32_fetch_and(p_data, 0); -} - -/** - * @brief Logic one bit flag clear operation on an atomic object - * - * @param[in] p_data Atomic flag memory pointer - * - * @return New flag value - * */ -static inline uint32_t nrf_atomic_flag_clear(nrf_atomic_flag_t * p_data) -{ - return nrf_atomic_u32_and(p_data, 0); -} - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_ATOMIC_H__ */ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/atomic/nrf_atomic_internal.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/atomic/nrf_atomic_internal.h deleted file mode 100644 index ada00c67108..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/atomic/nrf_atomic_internal.h +++ /dev/null @@ -1,234 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_ATOMIC_INTERNAL_H__ -#define NRF_ATOMIC_INTERNAL_H__ - -#include "sdk_common.h" -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * - * @defgroup nrf_atomic_internal Atomic operations internals - * @ingroup nrf_atomic - * @{ - * - */ - -/* Only Cortex M cores > 3 support LDREX/STREX instructions*/ -#if ((__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)) == 0 -#error "Unsupported core version" -#endif - -#if defined ( __CC_ARM ) -static __asm uint32_t nrf_atomic_internal_mov(nrf_atomic_u32_t * p_ptr, - uint32_t value, - uint32_t * p_new) -{ - /* The base standard provides for passing arguments in core registers (r0-r3) and on the stack. - * Registers r4 and r5 have to be saved on stack. Note that only even number of register push are - * allowed. This is a requirement of the Procedure Call Standard for the ARM Architecture [AAPCS]. - * */ - push {r4, r5} - mov r4, r0 - -loop_mov - ldrex r0, [r4] - mov r5, r1 - strex r3, r5, [r4] - cmp r3, #0 - bne loop_mov - - str r5, [r2] - pop {r4, r5} - bx lr -} - - -static __asm uint32_t nrf_atomic_internal_orr(nrf_atomic_u32_t * p_ptr, - uint32_t value, - uint32_t * p_new) -{ - push {r4, r5} - mov r4, r0 - -loop_orr - ldrex r0, [r4] - orr r5, r0, r1 - strex r3, r5, [r4] - cmp r3, #0 - bne loop_orr - - str r5, [r2] - pop {r4, r5} - bx lr -} - -static __asm uint32_t nrf_atomic_internal_and(nrf_atomic_u32_t * p_ptr, - uint32_t value, - uint32_t * p_new) -{ - push {r4, r5} - mov r4, r0 - -loop_and - ldrex r0, [r4] - and r5, r0, r1 - strex r3, r5, [r4] - cmp r3, #0 - bne loop_and - - str r5, [r2] - pop {r4, r5} - bx lr -} - -static __asm uint32_t nrf_atomic_internal_eor(nrf_atomic_u32_t * p_ptr, - uint32_t value, - uint32_t * p_new) -{ - push {r4, r5} - mov r4, r0 - -loop_eor - ldrex r0, [r4] - eor r5, r0, r1 - strex r3, r5, [r4] - cmp r3, #0 - bne loop_eor - - str r5, [r2] - pop {r4, r5} - bx lr -} - -static __asm uint32_t nrf_atomic_internal_add(nrf_atomic_u32_t * p_ptr, - uint32_t value, - uint32_t * p_new) -{ - push {r4, r5} - mov r4, r0 - -loop_add - ldrex r0, [r4] - add r5, r0, r1 - strex r3, r5, [r4] - cmp r3, #0 - bne loop_add - - str r5, [r2] - pop {r4, r5} - bx lr -} - -static __asm uint32_t nrf_atomic_internal_sub(nrf_atomic_u32_t * p_ptr, - uint32_t value, - uint32_t * p_new) -{ - push {r4, r5} - mov r4, r0 - -loop_sub - ldrex r0, [r4] - sub r5, r0, r1 - strex r3, r5, [r4] - cmp r3, #0 - bne loop_sub - - str r5, [r2] - pop {r4, r5} - bx lr -} - - -#define NRF_ATOMIC_OP(asm_op, old_val, new_val, ptr, value) \ - old_val = nrf_atomic_internal_##asm_op(ptr, value, &new_val) - -#elif defined ( __ICCARM__ ) || defined ( __GNUC__ ) - -/** - * @brief Atomic operation generic macro - * @param[in] asm_op operation: mov, orr, and, eor, add, sub - * @param[out] old_val atomic object output (uint32_t), value before operation - * @param[out] new_val atomic object output (uint32_t), value after operation - * @param[in] value atomic operation operand - * */ -#define NRF_ATOMIC_OP(asm_op, old_val, new_val, ptr, value) \ -{ \ - uint32_t str_res; \ - __ASM volatile( \ - "1: ldrex %["#old_val"], [%["#ptr"]]\n" \ - NRF_ATOMIC_OP_##asm_op(new_val, old_val, value) \ - " strex %[str_res], %["#new_val"], [%["#ptr"]]\n" \ - " teq %[str_res], #0\n" \ - " bne.n 1b" \ - : \ - [old_val]"=&r" (old_val), \ - [new_val]"=&r" (new_val), \ - [str_res]"=&r" (str_res) \ - : \ - [ptr]"r" (ptr), \ - [value]"r" (value) \ - : "cc"); \ - UNUSED_PARAMETER(str_res); \ -} - -#define NRF_ATOMIC_OP_mov(new_val, old_val, value) "mov %["#new_val"], %["#value"]\n" -#define NRF_ATOMIC_OP_orr(new_val, old_val, value) "orr %["#new_val"], %["#old_val"], %["#value"]\n" -#define NRF_ATOMIC_OP_and(new_val, old_val, value) "and %["#new_val"], %["#old_val"], %["#value"]\n" -#define NRF_ATOMIC_OP_eor(new_val, old_val, value) "eor %["#new_val"], %["#old_val"], %["#value"]\n" -#define NRF_ATOMIC_OP_add(new_val, old_val, value) "add %["#new_val"], %["#old_val"], %["#value"]\n" -#define NRF_ATOMIC_OP_sub(new_val, old_val, value) "sub %["#new_val"], %["#old_val"], %["#value"]\n" - -#else -#error "Unsupported compiler" -#endif - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_ATOMIC_INTERNAL_H__ */ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/atomic/nrf_atomic_sanity_check.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/atomic/nrf_atomic_sanity_check.h deleted file mode 100644 index f07006cf7cb..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/atomic/nrf_atomic_sanity_check.h +++ /dev/null @@ -1,153 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_ATOMIC_SANITY_CHECK_H__ -#define NRF_ATOMIC_SANITY_CHECK_H__ - -#include "nrf_atomic.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Quick sanity check of nrf_atomic API - * */ -static inline void nrf_atomic_sanity_check(void) -{ -#if defined(DEBUG_NRF) || defined(DEBUG_NRF_USER) - nrf_atomic_u32_t val; - nrf_atomic_u32_t flag; - - /*Fetch version tests*/ - val = 0; - ASSERT(nrf_atomic_u32_store_fetch(&val, 10) == 0); - ASSERT(nrf_atomic_u32_store_fetch(&val, 0) == 10); - - val = 0; - ASSERT(nrf_atomic_u32_or_fetch(&val, 1 << 16) == 0); - ASSERT(nrf_atomic_u32_or_fetch(&val, 1 << 5) == ((1 << 16))); - ASSERT(nrf_atomic_u32_or_fetch(&val, 1 << 5) == ((1 << 16) | (1 << 5))); - ASSERT(nrf_atomic_u32_or_fetch(&val, 0) == ((1 << 16) | (1 << 5))); - ASSERT(nrf_atomic_u32_or_fetch(&val, 0xFFFFFFFF) == ((1 << 16) | (1 << 5))); - ASSERT(nrf_atomic_u32_or_fetch(&val, 0xFFFFFFFF) == (0xFFFFFFFF)); - - val = 0xFFFFFFFF; - ASSERT(nrf_atomic_u32_and_fetch(&val, ~(1 << 16)) == 0xFFFFFFFF); - ASSERT(nrf_atomic_u32_and_fetch(&val, ~(1 << 5)) == (0xFFFFFFFF & ~((1 << 16)))); - ASSERT(nrf_atomic_u32_and_fetch(&val, 0) == (0xFFFFFFFF & ~(((1 << 16) | (1 << 5))))); - ASSERT(nrf_atomic_u32_and_fetch(&val, 0xFFFFFFFF) == (0)); - - val = 0; - ASSERT(nrf_atomic_u32_xor_fetch(&val, (1 << 16)) == 0); - ASSERT(nrf_atomic_u32_xor_fetch(&val, (1 << 5)) == ((1 << 16))); - ASSERT(nrf_atomic_u32_xor_fetch(&val, 0) == ((1 << 16) | (1 << 5))); - ASSERT(nrf_atomic_u32_xor_fetch(&val, (1 << 16) | (1 << 5)) == ((1 << 16) | (1 << 5))); - ASSERT(nrf_atomic_u32_xor_fetch(&val, 0) == (0)); - - val = 0; - ASSERT(nrf_atomic_u32_add_fetch(&val, 100) == 0); - ASSERT(nrf_atomic_u32_add_fetch(&val, 100) == 100); - ASSERT(nrf_atomic_u32_add_fetch(&val, 1 << 24) == 200); - ASSERT(nrf_atomic_u32_add_fetch(&val, 0) == (200 + (1 << 24))); - ASSERT(nrf_atomic_u32_add_fetch(&val, 0xFFFFFFFF) == (200 + (1 << 24))); - ASSERT(nrf_atomic_u32_add_fetch(&val, 0) == (200 - 1 + (1 << 24))); - - val = 1000; - ASSERT(nrf_atomic_u32_sub_fetch(&val, 100) == 1000); - ASSERT(nrf_atomic_u32_sub_fetch(&val, 100) == 900); - ASSERT(nrf_atomic_u32_sub_fetch(&val, 0) == 800); - ASSERT(nrf_atomic_u32_sub_fetch(&val, 0xFFFFFFFF) == 800); - ASSERT(nrf_atomic_u32_sub_fetch(&val, 0) == 801); - - flag = 0; - ASSERT(nrf_atomic_flag_set_fetch(&flag) == 0); - ASSERT(nrf_atomic_flag_set_fetch(&flag) == 1); - ASSERT(nrf_atomic_flag_clear_fetch(&flag) == 1); - ASSERT(nrf_atomic_flag_clear_fetch(&flag) == 0); - - /*No fetch version tests*/ - val = 0; - ASSERT(nrf_atomic_u32_store(&val, 10) == 10); - ASSERT(nrf_atomic_u32_store(&val, 0) == 0); - - val = 0; - ASSERT(nrf_atomic_u32_or(&val, 1 << 16) == 1 << 16); - ASSERT(nrf_atomic_u32_or(&val, 1 << 5) == ((1 << 16) | (1 << 5))); - ASSERT(nrf_atomic_u32_or(&val, 1 << 5) == ((1 << 16) | (1 << 5))); - ASSERT(nrf_atomic_u32_or(&val, 0) == ((1 << 16) | (1 << 5))); - ASSERT(nrf_atomic_u32_or(&val, 0xFFFFFFFF) == 0xFFFFFFFF); - - val = 0xFFFFFFFF; - ASSERT(nrf_atomic_u32_and(&val, ~(1 << 16)) == (0xFFFFFFFF & ~((1 << 16)))); - ASSERT(nrf_atomic_u32_and(&val, ~(1 << 5)) == (0xFFFFFFFF & ~(((1 << 16) | (1 << 5))))); - ASSERT(nrf_atomic_u32_and(&val, 0) == 0); - - val = 0; - ASSERT(nrf_atomic_u32_xor(&val, (1 << 16)) == ((1 << 16))); - ASSERT(nrf_atomic_u32_xor(&val, (1 << 5)) == ((1 << 16) | (1 << 5))); - ASSERT(nrf_atomic_u32_xor(&val, 0) == ((1 << 16) | (1 << 5))); - ASSERT(nrf_atomic_u32_xor(&val, (1 << 16) | (1 << 5)) == 0); - - val = 0; - ASSERT(nrf_atomic_u32_add(&val, 100) == 100); - ASSERT(nrf_atomic_u32_add(&val, 100) == 200); - ASSERT(nrf_atomic_u32_add(&val, 1 << 24) == (200 + (1 << 24))); - ASSERT(nrf_atomic_u32_add(&val, 0) == (200 + (1 << 24))); - ASSERT(nrf_atomic_u32_add(&val, 0xFFFFFFFF) == (200 - 1 + (1 << 24))); - - val = 1000; - ASSERT(nrf_atomic_u32_sub(&val, 100) == 900); - ASSERT(nrf_atomic_u32_sub(&val, 100) == 800); - ASSERT(nrf_atomic_u32_sub(&val, 0) == 800); - ASSERT(nrf_atomic_u32_sub(&val, 0xFFFFFFFF) == 801); - - flag = 0; - ASSERT(nrf_atomic_flag_set(&flag) == 1); - ASSERT(nrf_atomic_flag_set(&flag) == 1); - ASSERT(nrf_atomic_flag_clear(&flag) == 0); - ASSERT(nrf_atomic_flag_clear(&flag) == 0); -#endif -} - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_ATOMIC_SANITY_CHECK_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/atomic_fifo/nrf_atfifo.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/atomic_fifo/nrf_atfifo.c deleted file mode 100644 index 179fbfc8de3..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/atomic_fifo/nrf_atfifo.c +++ /dev/null @@ -1,160 +0,0 @@ -/** - * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include -#include "app_util.h" -#include "nrf_atfifo.h" -#include "nrf_atfifo_internal.h" - - -/* Unions testing */ -STATIC_ASSERT(sizeof(nrf_atfifo_postag_t) == sizeof(uint32_t)); - - -ret_code_t nrf_atfifo_init(nrf_atfifo_t * const p_fifo, void * p_buf, uint16_t buf_size, uint16_t item_size) -{ - if (NULL == p_buf) - { - return NRF_ERROR_NULL; - } - if (0 != (buf_size % item_size)) - { - return NRF_ERROR_INVALID_LENGTH; - } - - p_fifo->p_buf = p_buf; - p_fifo->tail.tag = 0; - p_fifo->head.tag = 0; - p_fifo->buf_size = buf_size; - p_fifo->item_size = item_size; - - return NRF_SUCCESS; -} - - -ret_code_t nrf_atfifo_clear(nrf_atfifo_t * const p_fifo) -{ - bool released = nrf_atfifo_space_clear(p_fifo); - return released ? NRF_SUCCESS : NRF_ERROR_BUSY; -} - - -ret_code_t nrf_atfifo_alloc_put(nrf_atfifo_t * const p_fifo, void const * p_var, size_t size, bool * const p_visible) -{ - nrf_atfifo_item_put_t context; - bool visible; - void * p_data = nrf_atfifo_item_alloc(p_fifo, &context); - if (NULL == p_data) - { - return NRF_ERROR_NO_MEM; - } - - memcpy(p_data, p_var, size); - - visible = nrf_atfifo_item_put(p_fifo, &context); - if (NULL != p_visible) - { - *p_visible = visible; - } - return NRF_SUCCESS; -} - - -void * nrf_atfifo_item_alloc(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_put_t * p_context) -{ - if (nrf_atfifo_wspace_req(p_fifo, &(p_context->last_tail))) - { - return ((uint8_t*)(p_fifo->p_buf)) + p_context->last_tail.pos.wr; - } - return NULL; -} - - -bool nrf_atfifo_item_put(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_put_t * p_context) -{ - if ((p_context->last_tail.pos.wr) == (p_context->last_tail.pos.rd)) - { - nrf_atfifo_wspace_close(p_fifo); - return true; - } - return false; -} - - -ret_code_t nrf_atfifo_get_free(nrf_atfifo_t * const p_fifo, void * const p_var, size_t size, bool * p_released) -{ - nrf_atfifo_item_get_t context; - bool released; - void const * p_s = nrf_atfifo_item_get(p_fifo, &context); - if (NULL == p_s) - { - return NRF_ERROR_NOT_FOUND; - } - - memcpy(p_var, p_s, size); - - released = nrf_atfifo_item_free(p_fifo, &context); - if (NULL != p_released) - { - *p_released = released; - } - return NRF_SUCCESS; -} - - -void * nrf_atfifo_item_get(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_get_t * p_context) -{ - if (nrf_atfifo_rspace_req(p_fifo, &(p_context->last_head))) - { - return ((uint8_t*)(p_fifo->p_buf)) + p_context->last_head.pos.rd; - } - return NULL; -} - - -bool nrf_atfifo_item_free(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_get_t * p_context) -{ - if ((p_context->last_head.pos.wr) == (p_context->last_head.pos.rd)) - { - nrf_atfifo_rspace_close(p_fifo); - return true; - } - return false; -} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/atomic_fifo/nrf_atfifo.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/atomic_fifo/nrf_atfifo.h deleted file mode 100644 index 2472d458b53..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/atomic_fifo/nrf_atfifo.h +++ /dev/null @@ -1,407 +0,0 @@ -/** - * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_ATFIFO_H__ -#define NRF_ATFIFO_H__ - -#include -#include "nordic_common.h" -#include "nrf_assert.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup nrf_atfifo Atomic FIFO - * @ingroup app_common - * - * @brief @tagAPI52 FIFO implementation that allows for making atomic transactions without - * locking interrupts. - * - * @details There are two types of functions to prepare the FIFO writing: - * - Single function for simple access: - * @code - * if (NRF_SUCCESS != nrf_atfifo_simple_put(my_fifo, &data, NULL)) - * { - * // Error handling - * } - * @endcode - * - Function pair to limit data copying: - * @code - * struct point3d - * { - * int x, y, z; - * }point3d_t; - * nrf_atfifo_context_t context; - * point3d_t * point; - * - * if (NULL != (point = nrf_atfifo_item_alloc(my_fifo, &context))) - * { - * point->x = a; - * point->y = b; - * point->z = c; - * if (nrf_atfifo_item_put(my_fifo, &context)) - * { - * // Send information to the rest of the system - * // that there is new data in the FIFO available for reading. - * } - * } - * else - * { - * // Error handling - * } - * - * @endcode - * @note - * This atomic FIFO implementation requires that the operation that is - * opened last is finished (committed/flushed) first. - * This is typical for operations performed from the interrupt runtime - * when the other operation is performed from the main thread. - * - * This implementation does not support typical multithreading operating system - * access where operations can be started and finished in totally unrelated order. - * - * @{ - */ - -/** - * @brief Read and write position structure. - * - * A structure that holds the read and write position used by the FIFO head and tail. - */ -typedef struct nrf_atfifo_postag_pos_s -{ - uint16_t wr; //!< First free space to write the data - uint16_t rd; //!< A place after the last data to read -}nrf_atfifo_postag_pos_t; - -/** - * @brief End data index tag. - * - * A tag used to mark the end of data. - * To properly realize atomic data committing, the whole variable has to be - * accessed atomically. - */ -typedef union nrf_atfifo_postag_u -{ - uint32_t tag; //!< Whole tag, used for atomic, 32-bit access - nrf_atfifo_postag_pos_t pos; //!< Structure that holds reading and writing position separately -}nrf_atfifo_postag_t; - -/** - * @brief The FIFO instance. - * - * The instance of atomic FIFO. - * Used with all FIFO functions. - */ -typedef struct nrf_atfifo_s -{ - void * p_buf; //!< Pointer to the data buffer - nrf_atfifo_postag_t tail; //!< Read and write tail position tag - nrf_atfifo_postag_t head; //!< Read and write head position tag - uint16_t buf_size; //!< FIFO size in number of bytes (has to be divisible by @c item_size) - uint16_t item_size; //!< Size of a single FIFO item -}nrf_atfifo_t; - -/** - * @brief FIFO write operation item context. - * - * Context structure used to mark an allocated space in FIFO that is ready for put. - * All the data required to properly put allocated and written data. - */ -typedef struct nrf_atfifo_item_put_s -{ - nrf_atfifo_postag_t last_tail; //!< Tail tag value that was here when opening the FIFO to write -}nrf_atfifo_item_put_t; - - -/** - * @brief FIFO read operation item context. - * - * Context structure used to mark an opened get operation to properly free an item after reading. - */ -typedef struct nrf_atfifo_rcontext_s -{ - nrf_atfifo_postag_t last_head; //!< Head tag value that was here when opening the FIFO to read -}nrf_atfifo_item_get_t; - - -/** - * @defgroup nrf_atfifo_instmacros FIFO instance macros - * - * A group of macros helpful for FIFO instance creation and initialization. - * They may be used to create and initialize instances for most use cases. - * - * FIFO may also be created and initialized directly using - * @ref nrf_atfifo_init function. - * @{ - */ - /** - * @brief Macro for generating the name for a data buffer. - * - * The name of the data buffer that would be created by - * @ref NRF_ATFIFO_DEF macro. - * - * @param[in] fifo_id Identifier of the FIFO object. - * - * @return Name of the buffer variable. - * - * @note This is auxiliary internal macro and in normal usage - * it should not be called. - */ - #define NRF_ATFIFO_BUF_NAME(fifo_id) CONCAT_2(fifo_id, _data) - - /** - * @brief Macro for generating the name for a FIFO instance. - * - * The name of the instance variable that will be created by the - * @ref NRF_ATFIFO_DEF macro. - * - * @param[in] fifo_id Identifier of the FIFO object. - * - * @return Name of the instance variable. - * - * @note This is auxiliary internal macro and in normal usage - * it should not be called. - */ - #define NRF_ATFIFO_INST_NAME(fifo_id) CONCAT_2(fifo_id, _inst) - - /** - * @brief Macro for creating an instance. - * - * Creates the FIFO object variable itself. - * - * Usage example: - * @code - * NRF_ATFIFO_DEF(my_fifo, uint16_t, 12); - * NRF_ATFIFO_INIT(my_fifo); - * - * uint16_t some_val = 45; - * nrf_atfifo_item_put(my_fifo, &some_val, sizeof(some_val), NULL); - * nrf_atfifo_item_get(my_fifo, &some_val, sizeof(some_val), NULL); - * @endcode - * - * @param[in] fifo_id Identifier of a FIFO object. - * This identifier will be a pointer to the instance. - * It makes it possible to use this directly for the functions - * that operate on the FIFO. - * Because it is a static const object, it should be optimized by the compiler. - * @param[in] storage_type Type of data that will be stored in the FIFO. - * @param[in] item_cnt Capacity of the created FIFO in maximum number of items that may be stored. - * The phisical size of the buffer will be 1 element bigger. - */ - #define NRF_ATFIFO_DEF(fifo_id, storage_type, item_cnt) \ - static storage_type NRF_ATFIFO_BUF_NAME(fifo_id)[(item_cnt)+1]; \ - static nrf_atfifo_t NRF_ATFIFO_INST_NAME(fifo_id); \ - static nrf_atfifo_t * const fifo_id = &NRF_ATFIFO_INST_NAME(fifo_id) - - /** - * @brief Macro for initializing the FIFO that was previously declared by the macro. - * - * Use this macro to simplify FIFO initialization. - * - * @note - * This macro can be only used on a FIFO object defined by @ref NRF_ATFIFO_DEF macro. - * - * @param[in] fifo_id Identifier of the FIFO object. - * - * @return Value from the @ref nrf_atfifo_init function. - */ - #define NRF_ATFIFO_INIT(fifo_id) \ - nrf_atfifo_init( \ - fifo_id, \ - NRF_ATFIFO_BUF_NAME(fifo_id), \ - sizeof(NRF_ATFIFO_BUF_NAME(fifo_id)), \ - sizeof(NRF_ATFIFO_BUF_NAME(fifo_id)[0]) \ - ) - -/** @} */ - -/** - * @brief Function for initializing the FIFO. - * - * Preparing the FIFO instance to work. - * - * @param[out] p_fifo FIFO object to initialize. - * @param[in,out] p_buf FIFO buffer for storing data. - * @param[in] buf_size Total buffer size (has to be divisible by @c item_size). - * @param[in] item_size Size of a single item held inside the FIFO. - * - * @retval NRF_SUCCESS If initialization was successful. - * @retval NRF_ERROR_NULL If a NULL pointer is provided as the buffer. - * @retval NRF_ERROR_INVALID_LENGTH If size of the buffer provided is not divisible by @c item_size. - * - * @note - * Buffer size must be able to hold one element more than the designed FIFO capacity. - * This one, empty element is used for overflow checking. - */ -ret_code_t nrf_atfifo_init(nrf_atfifo_t * const p_fifo, void * p_buf, uint16_t buf_size, uint16_t item_size); - -/** - * @brief Function for clearing the FIFO. - * - * Function for clearing the FIFO. - * - * If this function is called during an opened and uncommitted write operation, - * the FIFO is cleared up to the currently ongoing commit. - * There is no possibility to cancel an ongoing commit. - * - * If this function is called during an opened and unflushed read operation, - * the read position in the head is set, but copying it into the write head position - * is left to read closing operation. - * - * This way, there is no more data to read, but the memory is released - * in the moment when it is safe. - * - * @param[in,out] p_fifo FIFO object. - * - * @retval NRF_SUCCESS FIFO totally cleared. - * @retval NRF_ERROR_BUSY Function called in the middle of writing or reading operation. - * If it is called in the middle of writing operation, - * FIFO was cleared up to the already started and uncommitted write. - * If it is called in the middle of reading operation, - * write head was only moved. It will be copied into read tail when the reading operation - * is flushed. - */ -ret_code_t nrf_atfifo_clear(nrf_atfifo_t * const p_fifo); - -/** - * @brief Function for atomically putting data into the FIFO. - * - * It uses memcpy function inside and in most situations, it is more suitable to - * use @ref nrf_atfifo_item_alloc, write the data, and @ref nrf_atfifo_item_put to store a new value - * in a FIFO. - * - * @param[in,out] p_fifo FIFO object. - * @param[in] p_var Variable to copy. - * @param[in] size Size of the variable to copy. - * Can be smaller or equal to the FIFO item size. - * @param[out] p_visible See value returned by @ref nrf_atfifo_item_put. - * It may be NULL if the caller does not require the current operation status. - * - * @retval NRF_SUCCESS If an element has been successfully added to the FIFO. - * @retval NRF_ERROR_NO_MEM If the FIFO is full. - * - * @note - * To avoid data copying, you can use the @ref nrf_atfifo_item_alloc and @ref nrf_atfifo_item_put - * functions pair. - */ -ret_code_t nrf_atfifo_alloc_put(nrf_atfifo_t * const p_fifo, void const * const p_var, size_t size, bool * const p_visible); - -/** - * @brief Function for opening the FIFO for writing. - * - * Function called to start the FIFO write operation and access the given FIFO buffer directly. - * - * @param[in,out] p_fifo FIFO object. - * @param[out] p_context Operation context, required by @ref nrf_atfifo_item_put. - * - * @return Pointer to the space where variable data can be stored. - * NULL if there is no space in the buffer. - */ -void * nrf_atfifo_item_alloc(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_put_t * p_context); - -/** - * @brief Function for closing the writing operation. - * - * Puts a previously allocated context into FIFO. - * This function must be called to commit an opened write operation. - * It sets all the buffers and marks the data, so that it is visible to read. - * - * @param[in,out] p_fifo FIFO object. - * @param[in] p_context Operation context, filled by the @ref nrf_atfifo_item_alloc function. - * - * @retval true Data is currently ready and will be visible to read. - * @retval false The internal commit was marked, but the writing operation interrupted another writing operation. - * The data will be available to read when the interrupted operation is committed. - */ -bool nrf_atfifo_item_put(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_put_t * p_context); - -/** - * @brief Function for getting a single value from the FIFO. - * - * This function gets the value from the top of the FIFO. - * The value is removed from the FIFO memory. - * - * @param[in,out] p_fifo FIFO object. - * @param[out] p_var Pointer to the variable to store the data. - * @param[in] size Size of the data to be loaded. - * @param[out] p_released See the values returned by @ref nrf_atfifo_item_free. - * - * @retval NRF_SUCCESS Element was successfully copied from the FIFO memory. - * @retval NRF_ERROR_NOT_FOUND No data in the FIFO. - */ -ret_code_t nrf_atfifo_get_free(nrf_atfifo_t * const p_fifo, void * const p_var, size_t size, bool * p_released); - -/** - * @brief Function for opening the FIFO for reading. - * - * Function called to start the FIFO read operation and access the given FIFO buffer directly. - * - * @param[in,out] p_fifo FIFO object. - * @param[out] p_context The operation context, required by @ref nrf_atfifo_item_free - * - * @return Pointer to data buffer or NULL if there is no data in the FIFO. - */ -void * nrf_atfifo_item_get(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_get_t * p_context); - -/** - * @brief Function for closing the reading operation. - * - * Function used to finish the reading operation. - * If this reading operation does not interrupt another reading operation, the head write buffer is moved. - * If this reading operation is placed in the middle of another reading, only the new read pointer is written. - * - * @param[in,out] p_fifo FIFO object. - * @param[in] p_context Context of the reading operation to be closed. - * - * @retval true This operation is not generated in the middle of another read operation and the write head will be updated to the read head (space is released). - * @retval false This operation was performed in the middle of another read operation and the write buffer head was not moved (no space is released). - */ -bool nrf_atfifo_item_free(nrf_atfifo_t * const p_fifo, nrf_atfifo_item_get_t * p_context); - - -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_ATFIFO_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/atomic_fifo/nrf_atfifo_internal.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/atomic_fifo/nrf_atfifo_internal.h deleted file mode 100644 index 477b91ff2f4..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/atomic_fifo/nrf_atfifo_internal.h +++ /dev/null @@ -1,577 +0,0 @@ -/** - * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - * @file - * @brief Atomic FIFO internal file - * - * This file should be included only by nrf_atfifo internally. - * Needs nrf_atfifo.h included first. - */ -#ifndef NRF_ATFIFO_H__ -#error This is internal file. Do not include this file in your program. -#endif - -#ifndef NRF_ATFIFO_INTERNAL_H__ -#define NRF_ATFIFO_INTERNAL_H__ -#include -#include "nrf.h" -#include "app_util.h" -#include "nordic_common.h" - -#if ((__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)) == 0 -#error Unsupported core version -#endif - -/* - * Make sure that rd and wr pos in a tag are aligned like expected - * Changing this would require changes inside assembly code! - */ -STATIC_ASSERT(offsetof(nrf_atfifo_postag_pos_t, wr) == 0); -STATIC_ASSERT(offsetof(nrf_atfifo_postag_pos_t, rd) == 2); - -/** - * @brief Atomically reserve space for a new write. - * - * @param[in,out] p_fifo FIFO object. - * @param[out] old_tail Tail position tag before new space is reserved. - * - * @retval true Space available. - * @retval false Memory full. - * - * @sa nrf_atfifo_wspace_close - */ -static bool nrf_atfifo_wspace_req(nrf_atfifo_t * const p_fifo, nrf_atfifo_postag_t * const p_old_tail); - -/** - * @brief Atomically mark all written data available. - * - * This function marks all data available for reading. - * This marking is done by copying tail.pos.wr into tail.pos.rd. - * - * It must be called only when closing the first write. - * It cannot be called if any write access was interrupted. - * See the code below: - * @code - * if (old_tail.pos.wr == old_tail.pos.rd) - * { - * nrf_atfifo_wspace_close(my_fifo); - * return true; - * } - * return false; - * @endcode - * - * @param[in,out] p_fifo FIFO object. - * - * @sa nrf_atfifo_wspace_req - */ -static void nrf_atfifo_wspace_close(nrf_atfifo_t * const p_fifo); - -/** - * @brief Atomically get a part of a buffer to read data. - * - * @param[in,out] p_fifo FIFO object. - * @param[out] old_head Head position tag before the data buffer is read. - * - * @retval true Data available for reading. - * @retval false No data in the buffer. - * - * @sa nrf_atfifo_rspace_close - */ -static bool nrf_atfifo_rspace_req(nrf_atfifo_t * const p_fifo, nrf_atfifo_postag_t * const p_old_head); - -/** - * @brief Atomically release all read data. - * - * This function marks all data that was read as free space, - * which is available for writing. - * This marking is done by copying head.pos.rd into head.pos.wr. - * - * It must be called only when closing the first read. - * It cannot be called when the current read access interrupted any other read access. - * See code below: - * @code - * if (old_head.pos.wr == old_head.pos.rd) - * { - * nrf_atfifo_rspace_close(my_fifo); - * return true; - * } - * return false; - * @endcode - * - * @param[in,out] p_fifo FIFO object. - * - * @sa nrf_atfifo_rspace_req - */ -static void nrf_atfifo_rspace_close(nrf_atfifo_t * const p_fifo); - -/** - * @brief Safely clear the FIFO, internal function. - * - * This function realizes the functionality required by @ref nrf_atfifo_clear. - * - * @param[in,out] p_fifo FIFO object. - * - * @retval true All the data was released. - * @retval false All the data available for releasing was released, but there is some pending transfer. - */ -static bool nrf_atfifo_space_clear(nrf_atfifo_t * const p_fifo); - - -/* --------------------------------------------------------------------------- - * Implementation starts here - */ - -#if defined ( __CC_ARM ) - - -__ASM bool nrf_atfifo_wspace_req(nrf_atfifo_t * const p_fifo, nrf_atfifo_postag_t * const p_old_tail) -{ - /* Registry usage: - * R0 - p_fifo - * R1 - p_old_tail - * R2 - internal variable old_tail (saved by caller) - * R3 - internal variable new_tail (saved by caller) - * R4 - internal temporary register (saved by this function) - * R5 - not used stored to keep the stack aligned to 8 bytes - * Returned value: - * R0 (bool - 32 bits) - */ - push {r4, r5} -nrf_atfifo_wspace_req_repeat - /* Load tail tag and set memory monitor !!! R2 - old tail !!! */ - ldrex r2, [r0, #__cpp(offsetof(nrf_atfifo_t, tail))] - /* Extract write position !!! R3 !!! */ - uxth r3, r2 - /* Increment address with overload support !!! R4 used temporary !!! */ - ldrh r4, [r0, #__cpp(offsetof(nrf_atfifo_t, item_size))] - add r3, r4 - ldrh r4, [r0, #__cpp(offsetof(nrf_atfifo_t, buf_size))] - cmp r3, r4 - it hs - subhs r3, r3, r4 - - /* Check if FIFO would overload after making this increment !!! R4 used temporary !!! */ - ldrh r4, [r0, #__cpp(offsetof(nrf_atfifo_t, head) + offsetof(nrf_atfifo_postag_pos_t, wr))] - cmp r3, r4 - ittt eq - clrexeq - moveq r0, #__cpp(false) - beq nrf_atfifo_wspace_req_exit - - /* Pack everything back !!! R3 - new tail !!! */ - /* Copy lower byte from new_tail, and higher byte is a value from the top of old_tail */ - pkhbt r3, r3, r2 - - /* Store new value clearing memory monitor !!! R4 used temporary !!! */ - strex r4, r3, [r0, #__cpp(offsetof(nrf_atfifo_t, tail))] - cmp r4, #0 - bne nrf_atfifo_wspace_req_repeat - - /* Return true */ - mov r0, #__cpp(true) -nrf_atfifo_wspace_req_exit - /* Save old tail */ - str r2, [r1] - pop {r4, r5} - bx lr -} - - -__ASM void nrf_atfifo_wspace_close(nrf_atfifo_t * const p_fifo) -{ - /* Registry usage: - * R0 - p_fifo - * R1 - internal temporary register - * R2 - new_tail - */ -nrf_atfifo_wspace_close_repeat - ldrex r2, [r0, #__cpp(offsetof(nrf_atfifo_t, tail))] - /* Copy from lower byte to higher */ - pkhbt r2, r2, r2, lsl #16 - - strex r1, r2, [r0, #__cpp(offsetof(nrf_atfifo_t, tail))] - cmp r1, #0 - bne nrf_atfifo_wspace_close_repeat - bx lr -} - - -__ASM bool nrf_atfifo_rspace_req(nrf_atfifo_t * const p_fifo, nrf_atfifo_postag_t * const p_old_head) -{ - /* Registry usage: - * R0 - p_fifo - * R1 - p_old_head - * R2 - internal variable old_head (saved by caller) - * R3 - internal variable new_head (saved by caller) - * R4 - internal temporary register (saved by this function) - * R5 - not used stored to keep the stack aligned to 8 bytes - * Returned value: - * R0 (bool - 32 bits) - */ - push {r4, r5} -nrf_atfifo_rspace_req_repeat - /* Load tail tag and set memory monitor !!! R2 - old tail !!! */ - ldrex r2, [r0, #__cpp(offsetof(nrf_atfifo_t, head))] - /* Extract read position !!! R3 !!! */ - uxth r3, r2, ror #16 - - /* Check if we have any data !!! R4 used temporary !!! */ - ldrh r4, [r0, #__cpp(offsetof(nrf_atfifo_t, tail) + offsetof(nrf_atfifo_postag_pos_t, rd))] - cmp r3, r4 - ittt eq - clrexeq - moveq r0, #__cpp(false) - beq nrf_atfifo_rspace_req_exit - - /* Increment address with overload support !!! R4 used temporary !!! */ - ldrh r4, [r0, #__cpp(offsetof(nrf_atfifo_t, item_size))] - add r3, r4 - ldrh r4, [r0, #__cpp(offsetof(nrf_atfifo_t, buf_size))] - cmp r3, r4 - it hs - subhs r3, r3, r4 - - /* Pack everything back !!! R3 - new tail !!! */ - /* Copy lower byte from old_head, and higher byte is a value from write_pos */ - pkhbt r3, r2, r3, lsl #16 - - /* Store new value clearing memory monitor !!! R4 used temporary !!! */ - strex r4, r3, [r0, #__cpp(offsetof(nrf_atfifo_t, head))] - cmp r4, #0 - bne nrf_atfifo_rspace_req_repeat - - /* Return true */ - mov r0, #__cpp(true) -nrf_atfifo_rspace_req_exit - /* Save old head */ - str r2, [r1] - pop {r4, r5} - bx lr -} - - -__ASM void nrf_atfifo_rspace_close(nrf_atfifo_t * const p_fifo) -{ - /* Registry usage: - * R0 - p_fifo - * R1 - internal temporary register - * R2 - new_tail - */ -nrf_atfifo_rspace_close_repeat - ldrex r2, [r0, #__cpp(offsetof(nrf_atfifo_t, head))] - /* Copy from higher byte to lower */ - pkhtb r2, r2, r2, asr #16 - - strex r1, r2, [r0, #__cpp(offsetof(nrf_atfifo_t, head))] - cmp r1, #0 - bne nrf_atfifo_rspace_close_repeat - bx lr -} - - -__ASM bool nrf_atfifo_space_clear(nrf_atfifo_t * const p_fifo) -{ - /* Registry usage: - * R0 - p_fifo as input, bool output after - * R1 - tail, rd pointer, new_head - * R2 - head_old, destroyed when creating new_head - * R3 - p_fifo - copy - */ - mov r3, r0 -nrf_atfifo_space_clear_repeat - /* Load old head in !!! R2 register !!! and read pointer of tail in !!! R1 register !!! */ - ldrex r2, [r3, #__cpp(offsetof(nrf_atfifo_t, head))] - ldrh r1, [r3, #__cpp(offsetof(nrf_atfifo_t, tail) + offsetof(nrf_atfifo_postag_pos_t, rd))] - cmp r2, r2, ror #16 - /* Return false as default */ - mov r0, #__cpp(false) - /* Create new head in !!! R1 register !!! Data in !!! R2 register broken !!! */ - itett ne - uxthne r2, r2 - orreq r1, r1, r1, lsl #16 - orrne r1, r2, r1, lsl #16 - - /* Skip header test */ - bne nrf_atfifo_space_clear_head_test_skip - - /* Load whole tail and test it !!! R2 used !!! */ - ldr r2, [r3, #__cpp(offsetof(nrf_atfifo_t, tail))] - cmp r2, r2, ror #16 - /* Return true if equal */ - it eq - moveq r0, #__cpp(true) - -nrf_atfifo_space_clear_head_test_skip - /* Store and test if success !!! R2 used temporary !!! */ - strex r2, r1, [r3, #__cpp(offsetof(nrf_atfifo_t, head))] - cmp r2, #0 - bne nrf_atfifo_space_clear_repeat - bx lr -} - -#elif defined ( __ICCARM__ ) || defined ( __GNUC__ ) - -bool nrf_atfifo_wspace_req(nrf_atfifo_t * const p_fifo, nrf_atfifo_postag_t * const p_old_tail) -{ - volatile bool ret; - volatile uint32_t old_tail; - uint32_t new_tail; - uint32_t temp; - - __ASM volatile( - /* For more comments see Keil version above */ - "1: \n" - " ldrex %[old_tail], [%[p_fifo], %[offset_tail]] \n" - " uxth %[new_tail], %[old_tail] \n" - " \n" - " ldrh %[temp], [%[p_fifo], %[offset_item_size]] \n" - " add %[new_tail], %[temp] \n" - " ldrh %[temp], [%[p_fifo], %[offset_buf_size]] \n" - " cmp %[new_tail], %[temp] \n" - " it hs \n" - " subhs %[new_tail], %[new_tail], %[temp] \n" - " \n" - " ldrh %[temp], [%[p_fifo], %[offset_head_wr]] \n" - " cmp %[new_tail], %[temp] \n" - " ittt eq \n" - " clrexeq \n" - " moveq %[ret], %[false_val] \n" - " beq.n 2f \n" - " \n" - " pkhbt %[new_tail], %[new_tail], %[old_tail] \n" - " \n" - " strex %[temp], %[new_tail], [%[p_fifo], %[offset_tail]] \n" - " cmp %[temp], #0 \n" - " bne.n 1b \n" - " \n" - " mov %[ret], %[true_val] \n" - "2: \n" - : /* Output operands */ - [ret] "=r"(ret), - [temp] "=&r"(temp), - [old_tail]"=&r"(old_tail), - [new_tail]"=&r"(new_tail) - : /* Input operands */ - [p_fifo] "r"(p_fifo), - [offset_tail] "J"(offsetof(nrf_atfifo_t, tail)), - [offset_head_wr] "J"(offsetof(nrf_atfifo_t, head) + offsetof(nrf_atfifo_postag_pos_t, wr)), - [offset_item_size]"J"(offsetof(nrf_atfifo_t, item_size)), - [offset_buf_size] "J"(offsetof(nrf_atfifo_t, buf_size)), - [true_val] "I"(true), - [false_val] "I"(false) - : /* Clobbers */ - "cc"); - - p_old_tail->tag = old_tail; - UNUSED_VARIABLE(new_tail); - UNUSED_VARIABLE(temp); - return ret; -} - - -void nrf_atfifo_wspace_close(nrf_atfifo_t * const p_fifo) -{ - uint32_t temp; - uint32_t new_tail; - - __ASM volatile( - /* For more comments see Keil version above */ - "1: \n" - " ldrex %[new_tail], [%[p_fifo], %[offset_tail]] \n" - " pkhbt %[new_tail],%[new_tail], %[new_tail], lsl #16 \n" - " \n" - " strex %[temp], %[new_tail], [%[p_fifo], %[offset_tail]] \n" - " cmp %[temp], #0 \n" - " bne.n 1b \n" - : /* Output operands */ - [temp] "=&r"(temp), - [new_tail] "=&r"(new_tail) - : /* Input operands */ - [p_fifo] "r"(p_fifo), - [offset_tail] "J"(offsetof(nrf_atfifo_t, tail)) - : /* Clobbers */ - "cc"); - - UNUSED_VARIABLE(temp); - UNUSED_VARIABLE(new_tail); -} - - -bool nrf_atfifo_rspace_req(nrf_atfifo_t * const p_fifo, nrf_atfifo_postag_t * const p_old_head) -{ - volatile bool ret; - volatile uint32_t old_head; - uint32_t new_head; - uint32_t temp; - - __ASM volatile( - /* For more comments see Keil version above */ - "1: \n" - " ldrex %[old_head], [%[p_fifo], %[offset_head]] \n" - " uxth %[new_head], %[old_head], ror #16 \n" - " \n" - " ldrh %[temp], [%[p_fifo], %[offset_tail_rd]] \n" - " cmp %[new_head], %[temp] \n" - " ittt eq \n" - " clrexeq \n" - " moveq %[ret], %[false_val] \n" - " beq.n 2f \n" - " \n" - " ldrh %[temp], [%[p_fifo], %[offset_item_size]] \n" - " add %[new_head], %[temp] \n" - " ldrh %[temp], [%[p_fifo], %[offset_buf_size]] \n" - " cmp %[new_head], %[temp] \n" - " it hs \n" - " subhs %[new_head], %[new_head], %[temp] \n" - " \n" - " pkhbt %[new_head], %[old_head], %[new_head], lsl #16 \n" - " \n" - " strex %[temp], %[new_head], [%[p_fifo], %[offset_head]] \n" - " cmp %[temp], #0 \n" - " bne.n 1b \n" - " \n" - " mov %[ret], %[true_val] \n" - "2: \n" - : /* Output operands */ - [ret] "=r"(ret), - [temp] "=&r"(temp), - [old_head]"=&r"(old_head), - [new_head]"=&r"(new_head) - : /* Input operands */ - [p_fifo] "r"(p_fifo), - [offset_head] "J"(offsetof(nrf_atfifo_t, head)), - [offset_tail_rd] "J"(offsetof(nrf_atfifo_t, tail) + offsetof(nrf_atfifo_postag_pos_t, rd)), - [offset_item_size]"J"(offsetof(nrf_atfifo_t, item_size)), - [offset_buf_size] "J"(offsetof(nrf_atfifo_t, buf_size)), - [true_val] "I"(true), - [false_val] "I"(false) - : /* Clobbers */ - "cc"); - - p_old_head->tag = old_head; - UNUSED_VARIABLE(new_head); - UNUSED_VARIABLE(temp); - return ret; -} - - -void nrf_atfifo_rspace_close(nrf_atfifo_t * const p_fifo) -{ - uint32_t temp; - uint32_t new_head; - - __ASM volatile( - /* For more comments see Keil version above */ - "1: \n" - " ldrex %[new_head], [%[p_fifo], %[offset_head]] \n" - " pkhtb %[new_head],%[new_head], %[new_head], asr #16 \n" - " \n" - " strex %[temp], %[new_head], [%[p_fifo], %[offset_head]] \n" - " cmp %[temp], #0 \n" - " bne.n 1b \n" - : /* Output operands */ - [temp] "=&r"(temp), - [new_head] "=&r"(new_head) - : /* Input operands */ - [p_fifo] "r"(p_fifo), - [offset_head] "J"(offsetof(nrf_atfifo_t, head)) - : /* Clobbers */ - "cc"); - - UNUSED_VARIABLE(temp); - UNUSED_VARIABLE(new_head); -} - - -bool nrf_atfifo_space_clear(nrf_atfifo_t * const p_fifo) -{ - volatile bool ret; - uint32_t old_head; /* This variable is left broken after assembly code finishes */ - uint32_t new_head; - - __ASM volatile( - "1: \n" - " ldrex %[old_head], [%[p_fifo], %[offset_head]] \n" - " ldrh %[new_head], [%[p_fifo], %[offset_tail_rd]] \n" - " cmp %[old_head], %[old_head], ror #16 \n" - " \n" - " mov %[ret], %[false_val] \n" - " \n" - " itett ne \n" - " uxthne %[old_head], %[old_head] \n" - " orreq %[new_head], %[new_head], %[new_head], lsl #16 \n" - " orrne %[new_head], %[old_head], %[new_head], lsl #16 \n" - " \n" - " bne.n 2f \n" - " \n" - " ldr %[old_head], [%[p_fifo], %[offset_tail]] \n" - " cmp %[old_head], %[old_head], ror #16 \n" - " it eq \n" - " moveq %[ret], %[true_val] \n" - " \n" - "2: \n" - " strex %[old_head], %[new_head], [%[p_fifo], %[offset_head]] \n" - " cmp %[old_head], #0 \n" - " bne.n 1b \n" - : /* Output operands */ - [ret] "=&r"(ret), - [old_head] "=&r"(old_head), - [new_head] "=&r"(new_head) - : /* Input operands */ - [p_fifo] "r"(p_fifo), - [offset_head] "J"(offsetof(nrf_atfifo_t, head)), - [offset_tail] "J"(offsetof(nrf_atfifo_t, tail)), - [offset_tail_rd] "J"(offsetof(nrf_atfifo_t, tail) + offsetof(nrf_atfifo_postag_pos_t, rd)), - [true_val] "I"(true), - [false_val] "I"(false) - : /* Clobbers */ - "cc"); - - UNUSED_VARIABLE(old_head); - UNUSED_VARIABLE(new_head); - return ret; -} - -#else -#error Unsupported compiler -#endif - -#endif /* NRF_ATFIFO_INTERNAL_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/balloc/nrf_balloc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/balloc/nrf_balloc.c deleted file mode 100644 index b2eb43d0919..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/balloc/nrf_balloc.c +++ /dev/null @@ -1,343 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" - #if NRF_MODULE_ENABLED(NRF_BALLOC) - -#include "nrf_balloc.h" -#include "app_util_platform.h" - -#define NRF_LOG_MODULE_NAME balloc -#if NRF_BALLOC_CONFIG_LOG_ENABLED - #define NRF_LOG_LEVEL NRF_BALLOC_CONFIG_LOG_LEVEL - #define NRF_LOG_INFO_COLOR NRF_BALLOC_CONFIG_INFO_COLOR - #define NRF_LOG_DEBUG_COLOR NRF_BALLOC_CONFIG_DEBUG_COLOR -#else - #define NRF_LOG_LEVEL 0 -#endif // NRF_BALLOC_CONFIG_LOG_ENABLED -#include "nrf_log.h" -NRF_LOG_MODULE_REGISTER(); - -#define HEAD_GUARD_FILL 0xBAADF00D /**< Magic number used to mark head guard.*/ -#define TAIL_GUARD_FILL 0xBAADCAFE /**< Magic number used to mark tail guard.*/ -#define FREE_MEM_FILL 0xBAADBAAD /**< Magic number used to mark free memory.*/ - -#if NRF_BALLOC_CONFIG_DEBUG_ENABLED -#define POOL_ID(_p_pool) _p_pool->p_name -#define POOL_MARKER "%s" -#else -#define POOL_ID(_p_pool) _p_pool -#define POOL_MARKER "0x%08X" -#endif - -#if NRF_BALLOC_CONFIG_DEBUG_ENABLED - -/**@brief Validate block memory, prepare block guards, and calculate pointer to the element. - * - * @param[in] p_pool Pointer to the memory pool. - * @param[in] p_head Pointer to the beginning of the block. - * - * @return Pointer to the element. - */ -__STATIC_INLINE void * nrf_balloc_block_unwrap(nrf_balloc_t const * p_pool, void * p_head) -{ - ASSERT((p_pool != NULL) && ((p_pool->block_size % sizeof(uint32_t)) == 0)); - ASSERT((p_head != NULL) && (((uint32_t)(p_head) % sizeof(uint32_t)) == 0)); - - uint32_t head_words = NRF_BALLOC_DEBUG_HEAD_GUARD_WORDS_GET(p_pool->debug_flags); - uint32_t tail_words = NRF_BALLOC_DEBUG_TAIL_GUARD_WORDS_GET(p_pool->debug_flags); - - uint32_t * p_tail = (uint32_t *)((size_t)(p_head) + p_pool->block_size); - uint32_t * p_element = (uint32_t *)p_head + head_words; - - if (NRF_BALLOC_DEBUG_DATA_TRASHING_CHECK_GET(p_pool->debug_flags)) - { - for (uint32_t * ptr = p_head; ptr < p_tail; ptr++) - { - if (*ptr != FREE_MEM_FILL) - { - NRF_LOG_ERROR("Detected free memory corruption at 0x%08X (0x%08X != 0x%08X, pool: '" POOL_MARKER "')", - ptr, *ptr, FREE_MEM_FILL, POOL_ID(p_pool)); - APP_ERROR_CHECK_BOOL(false); - } - } - } - - for (uint32_t * ptr = p_head; ptr < p_element; ptr++) - { - *ptr = HEAD_GUARD_FILL; - } - - for (uint32_t * ptr = ( p_tail - tail_words); ptr < p_tail; ptr++) - { - *ptr = TAIL_GUARD_FILL; - } - - return p_element; -} - -/**@brief Calculate pointer to the block, validate block guards, and mark block memory as free. - * - * @param[in] p_pool Pointer to the memory pool. - * @param[in] p_element Pointer to the element. - * - * @return Pointer to the beginning of the block. - */ -__STATIC_INLINE void * nrf_balloc_element_wrap(nrf_balloc_t const * p_pool, void * p_element) -{ - ASSERT((p_pool != NULL) && ((p_pool->block_size % sizeof(uint32_t)) == 0)); - ASSERT((p_element != NULL) && (((uint32_t)(p_element) % sizeof(uint32_t)) == 0)); - - uint32_t head_words = NRF_BALLOC_DEBUG_HEAD_GUARD_WORDS_GET(p_pool->debug_flags); - uint32_t tail_words = NRF_BALLOC_DEBUG_TAIL_GUARD_WORDS_GET(p_pool->debug_flags); - - uint32_t * p_head = (uint32_t *)p_element - head_words; - uint32_t * p_tail = (uint32_t *)((size_t)(p_head) + p_pool->block_size); - - for (uint32_t * ptr = p_head; ptr < (uint32_t *)p_element; ptr++) - { - if (*ptr != HEAD_GUARD_FILL) - { - NRF_LOG_ERROR("Detected Head Guard corruption at 0x%08X (0x%08X != 0x%08X, pool: '" POOL_MARKER "')", - ptr, *ptr, HEAD_GUARD_FILL, POOL_ID(p_pool)); - APP_ERROR_CHECK_BOOL(false); - } - } - - for (uint32_t * ptr = ( p_tail - tail_words); ptr < p_tail; ptr++) - { - if (*ptr != TAIL_GUARD_FILL) - { - NRF_LOG_ERROR("Detected Tail Guard corruption at 0x%08X (0x%08X != 0x%08X, pool: '" POOL_MARKER "')", - ptr, *ptr, TAIL_GUARD_FILL, POOL_ID(p_pool)); - APP_ERROR_CHECK_BOOL(false); - } - } - - if (NRF_BALLOC_DEBUG_DATA_TRASHING_CHECK_GET(p_pool->debug_flags)) - { - for (uint32_t * ptr = p_head; ptr < p_tail; ptr++) - { - *ptr = FREE_MEM_FILL; - } - } - - return p_head; -} - -#endif // NRF_BALLOC_CONFIG_DEBUG_ENABLED - -/**@brief Convert block index to a pointer. - * - * @param[in] p_pool Pointer to the memory pool. - * @param[in] idx Index of the block. - * - * @return Pointer to the beginning of the block. - */ -static void * nrf_balloc_idx2block(nrf_balloc_t const * p_pool, uint8_t idx) -{ - ASSERT(p_pool != NULL); - return (uint8_t *)(p_pool->p_memory_begin) + ((size_t)(idx) * p_pool->block_size); -} - -/**@brief Convert block pointer to index. - * - * @param[in] p_pool Pointer to the memory pool. - * @param[in] p_block Pointer to the beginning of the block. - * - * @return Index of the block. - */ -static uint8_t nrf_balloc_block2idx(nrf_balloc_t const * p_pool, void const * p_block) -{ - ASSERT(p_pool != NULL); - return ((size_t)(p_block) - (size_t)(p_pool->p_memory_begin)) / p_pool->block_size; -} - -ret_code_t nrf_balloc_init(nrf_balloc_t const * p_pool) -{ - uint8_t pool_size; - - VERIFY_PARAM_NOT_NULL(p_pool); - - ASSERT(p_pool->p_cb); - ASSERT(p_pool->p_stack_base); - ASSERT(p_pool->p_stack_limit); - ASSERT(p_pool->p_memory_begin); - ASSERT(p_pool->block_size); - - pool_size = p_pool->p_stack_limit - p_pool->p_stack_base; - -#if NRF_BALLOC_CONFIG_DEBUG_ENABLED - void *p_memory_end = (uint8_t *)(p_pool->p_memory_begin) + (pool_size * p_pool->block_size); - if (NRF_BALLOC_DEBUG_DATA_TRASHING_CHECK_GET(p_pool->debug_flags)) - { - for (uint32_t * ptr = p_pool->p_memory_begin; ptr < (uint32_t *)(p_memory_end); ptr++) - { - *ptr = FREE_MEM_FILL; - } - } -#endif - - NRF_LOG_INFO("Pool '" POOL_MARKER "' initialized (size: %u x %u = %u bytes)", - POOL_ID(p_pool), - pool_size, - p_pool->block_size, - pool_size * p_pool->block_size); - - p_pool->p_cb->p_stack_pointer = p_pool->p_stack_base; - while (pool_size--) - { - *(p_pool->p_cb->p_stack_pointer)++ = pool_size; - } - - p_pool->p_cb->max_utilization = 0; - - return NRF_SUCCESS; -} - -void * nrf_balloc_alloc(nrf_balloc_t const * p_pool) -{ - ASSERT(p_pool != NULL); - - void * p_block = NULL; - - CRITICAL_REGION_ENTER(); - - if (p_pool->p_cb->p_stack_pointer > p_pool->p_stack_base) - { - // Allocate block. - p_block = nrf_balloc_idx2block(p_pool, *--(p_pool->p_cb->p_stack_pointer)); - - // Update utilization statistics. - uint8_t utilization = p_pool->p_stack_limit - p_pool->p_cb->p_stack_pointer; - if (p_pool->p_cb->max_utilization < utilization) - { - p_pool->p_cb->max_utilization = utilization; - } - } - - CRITICAL_REGION_EXIT(); - -#if NRF_BALLOC_CONFIG_DEBUG_ENABLED - if (p_block != NULL) - { - p_block = nrf_balloc_block_unwrap(p_pool, p_block); - } -#endif - - NRF_LOG_DEBUG("nrf_balloc_alloc(pool: '" POOL_MARKER "', element: 0x%08X)", - POOL_ID(p_pool), p_block); - - return p_block; -} - -void nrf_balloc_free(nrf_balloc_t const * p_pool, void * p_element) -{ - ASSERT(p_pool != NULL); - ASSERT(p_element != NULL) - - NRF_LOG_DEBUG("nrf_balloc_free(pool: '" POOL_MARKER "', element: 0x%08X)", - POOL_ID(p_pool), p_element); - -#if NRF_BALLOC_CONFIG_DEBUG_ENABLED - void * p_block = nrf_balloc_element_wrap(p_pool, p_element); - - // These checks could be done outside critical region as they use only pool configuration data. - if (NRF_BALLOC_DEBUG_BASIC_CHECKS_GET(p_pool->debug_flags)) - { - uint8_t pool_size = p_pool->p_stack_limit - p_pool->p_stack_base; - void *p_memory_end = (uint8_t *)(p_pool->p_memory_begin) + (pool_size * p_pool->block_size); - - // Check if the element belongs to this pool. - if ((p_block < p_pool->p_memory_begin) || (p_block >= p_memory_end)) - { - NRF_LOG_ERROR("Attempted to free element that does belong to the pool (pool: '" POOL_MARKER "', element: 0x%08X)", - POOL_ID(p_pool), p_element); - APP_ERROR_CHECK_BOOL(false); - } - - // Check if the pointer is valid. - if ((((size_t)(p_block) - (size_t)(p_pool->p_memory_begin)) % p_pool->block_size) != 0) - { - NRF_LOG_ERROR("Atempted to free corrupted element address (pool: '" POOL_MARKER "', element: 0x%08X)", - POOL_ID(p_pool), p_element); - APP_ERROR_CHECK_BOOL(false); - } - } -#else - void * p_block = p_element; -#endif // NRF_BALLOC_CONFIG_DEBUG_ENABLED - - CRITICAL_REGION_ENTER(); - -#if NRF_BALLOC_CONFIG_DEBUG_ENABLED - // These checks have to be done in critical region as they use p_pool->p_stack_pointer. - if (NRF_BALLOC_DEBUG_BASIC_CHECKS_GET(p_pool->debug_flags)) - { - // Check for allocated/free ballance. - if (p_pool->p_cb->p_stack_pointer >= p_pool->p_stack_limit) - { - NRF_LOG_ERROR("Attempted to free an element while the pool is full (pool: '" POOL_MARKER "', element: 0x%08X)", - POOL_ID(p_pool), p_element); - APP_ERROR_CHECK_BOOL(false); - } - } - - if (NRF_BALLOC_DEBUG_DOUBLE_FREE_CHECK_GET(p_pool->debug_flags)) - { - // Check for double free. - for (uint8_t * p_idx = p_pool->p_stack_base; p_idx < p_pool->p_cb->p_stack_pointer; p_idx++) - { - if (nrf_balloc_idx2block(p_pool, *p_idx) == p_block) - { - NRF_LOG_ERROR("Attempted to double-free an element (pool: '" POOL_MARKER "', element: 0x%08X)", - POOL_ID(p_pool), p_element); - APP_ERROR_CHECK_BOOL(false); - } - } - } -#endif // NRF_BALLOC_CONFIG_DEBUG_ENABLED - - // Free the element. - *(p_pool->p_cb->p_stack_pointer)++ = nrf_balloc_block2idx(p_pool, p_block); - - CRITICAL_REGION_EXIT(); -} - -#endif // NRF_MODULE_ENABLED(NRF_BALLOC) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/balloc/nrf_balloc.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/balloc/nrf_balloc.h deleted file mode 100644 index 20c2c35e3bd..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/balloc/nrf_balloc.h +++ /dev/null @@ -1,309 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** - * @defgroup nrf_balloc Block memory allocator - * @{ - * @ingroup app_common - * @brief This module handles block memory allocator features. - */ - - -#ifndef NRF_BALLOC_H__ -#define NRF_BALLOC_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#include "sdk_errors.h" -#include "sdk_config.h" -#include "app_util_platform.h" -#include "app_util.h" -/**@defgroup NRF_BALLOC_DEBUG Macros for preparing debug flags for block allocator module. - * @{ */ -#define NRF_BALLOC_DEBUG_HEAD_GUARD_WORDS_SET(words) (((words) & 0xFF) << 0) -#define NRF_BALLOC_DEBUG_HEAD_GUARD_WORDS_GET(flags) (((flags) >> 0) & 0xFF) -#define NRF_BALLOC_DEBUG_TAIL_GUARD_WORDS_SET(words) (((words) & 0xFF) << 8) -#define NRF_BALLOC_DEBUG_TAIL_GUARD_WORDS_GET(flags) (((flags) >> 8) & 0xFF) - -#define NRF_BALLOC_DEBUG_BASIC_CHECKS_SET(enable) (!!(enable) << 16) -#define NRF_BALLOC_DEBUG_BASIC_CHECKS_GET(flags) (flags & (1 << 16)) -#define NRF_BALLOC_DEBUG_DOUBLE_FREE_CHECK_SET(enable) (!!(enable) << 17) -#define NRF_BALLOC_DEBUG_DOUBLE_FREE_CHECK_GET(flags) (flags & (1 << 17)) -#define NRF_BALLOC_DEBUG_DATA_TRASHING_CHECK_SET(enable) (!!(enable) << 18) -#define NRF_BALLOC_DEBUG_DATA_TRASHING_CHECK_GET(flags) (flags & (1 << 18)) -/**@} */ - -/**@brief Default debug flags for @ref nrf_balloc. This is used by the @ref NRF_BALLOC_DEF macro. - * Flags can be changed in @ref sdk_config. - */ -#if NRF_BALLOC_CONFIG_DEBUG_ENABLED - #define NRF_BALLOC_DEFAULT_DEBUG_FLAGS \ - ( \ - NRF_BALLOC_DEBUG_HEAD_GUARD_WORDS_SET(NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS) | \ - NRF_BALLOC_DEBUG_TAIL_GUARD_WORDS_SET(NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS) | \ - NRF_BALLOC_DEBUG_BASIC_CHECKS_SET(NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED) | \ - NRF_BALLOC_DEBUG_DOUBLE_FREE_CHECK_SET(NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED) | \ - NRF_BALLOC_DEBUG_DATA_TRASHING_CHECK_SET(NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED) \ - ) -#else - #define NRF_BALLOC_DEFAULT_DEBUG_FLAGS 0 -#endif // NRF_BALLOC_CONFIG_DEBUG_ENABLED - -/**@brief Block memory allocator control block.*/ -typedef struct -{ - uint8_t * p_stack_pointer; //!< Current allocation stack pointer. - uint8_t max_utilization; //!< Maximum utilization of the memory pool. -} nrf_balloc_cb_t; - -/**@brief Block memory allocator pool instance. The pool is made of elements of the same size. */ -typedef struct -{ - nrf_balloc_cb_t * p_cb; //!< Pointer to the instance control block. - uint8_t * p_stack_base; //!< Base of the allocation stack. - /**< - * Stack is used to store handlers to not allocated elements. - */ - uint8_t * p_stack_limit; //!< Maximum possible value of the allocation stack pointer. - void * p_memory_begin; //!< Pointer to the start of the memory pool. - /**< - * Memory is used as a heap for blocks. - */ - -#if NRF_BALLOC_CONFIG_DEBUG_ENABLED - const char * p_name; //!< Pointer to string with pool name. - uint32_t debug_flags; //!< Debugging settings. - /**< - * Debug flag should be created by @ref NRF_BALLOC_DEBUG. - */ -#endif // NRF_BALLOC_CONFIG_DEBUG_ENABLED - uint16_t block_size; //!< Size of the allocated block (including debug overhead). - /**< - * Single block contains user element with header and tail - * words. - */ -} nrf_balloc_t; - -/**@brief Get total memory consumed by single block (element size with overhead caused by debug - * flags). - * - * @param[in] _element_size Size of an element. - * @param[in] _debug_flags Debug flags. - */ -#if NRF_BALLOC_CONFIG_DEBUG_ENABLED - #define NRF_BALLOC_BLOCK_SIZE(_element_size, _debug_flags) \ - ( \ - (sizeof(uint32_t) * NRF_BALLOC_DEBUG_HEAD_GUARD_WORDS_GET(_debug_flags)) + \ - ALIGN_NUM(sizeof(uint32_t), (_element_size)) + \ - (sizeof(uint32_t) * NRF_BALLOC_DEBUG_TAIL_GUARD_WORDS_GET(_debug_flags)) \ - ) -#else - #define NRF_BALLOC_BLOCK_SIZE(_element_size, _debug_flags) \ - ALIGN_NUM(sizeof(uint32_t), (_element_size)) -#endif // NRF_BALLOC_CONFIG_DEBUG_ENABLED - - -/**@brief Get element size ( excluding debugging overhead is present) - * flags). - * - * @param[in] _p_balloc Pointer to balloc instance. - */ -#if NRF_BALLOC_CONFIG_DEBUG_ENABLED -#define NRF_BALLOC_ELEMENT_SIZE(_p_balloc) \ - (ALIGN_NUM(sizeof(uint32_t), (_p_balloc)->block_size) - \ - ((sizeof(uint32_t) * NRF_BALLOC_DEBUG_HEAD_GUARD_WORDS_GET((_p_balloc)->debug_flags)) + \ - (sizeof(uint32_t) * NRF_BALLOC_DEBUG_TAIL_GUARD_WORDS_GET((_p_balloc)->debug_flags)))) -#else -#define NRF_BALLOC_ELEMENT_SIZE(_p_balloc) \ - (_p_balloc)->block_size -#endif // NRF_BALLOC_CONFIG_DEBUG_ENABLED - -#if NRF_BALLOC_CONFIG_DEBUG_ENABLED -#define __NRF_BALLOC_ASSIGN_POOL_NAME(_name) .p_name = STRINGIFY(_name), -#define __NRF_BALLOC_ASSIGN_DEBUG_FLAGS(_debug_flags) .debug_flags = (_debug_flags), -#else -#define __NRF_BALLOC_ASSIGN_DEBUG_FLAGS(_debug_flags) -#define __NRF_BALLOC_ASSIGN_POOL_NAME(_name) -#endif - - -/**@brief Create a block allocator instance with custom debug flags. - * - * @note This macro reserves memory for the given block allocator instance. - * - * @param[in] _name Name of the allocator. - * @param[in] _element_size Size of one element. - * @param[in] _pool_size Size of the pool. - * @param[in] _debug_flags Debug flags (@ref NRF_BALLOC_DEBUG). - */ -#define NRF_BALLOC_DBG_DEF(_name, _element_size, _pool_size, _debug_flags) \ - STATIC_ASSERT((_pool_size) <= UINT8_MAX); \ - static uint8_t CONCAT_2(_name, _nrf_balloc_pool_stack)[(_pool_size)]; \ - static uint32_t CONCAT_2(_name,_nrf_balloc_pool_mem) \ - [NRF_BALLOC_BLOCK_SIZE(_element_size, _debug_flags) * (_pool_size) / sizeof(uint32_t)]; \ - static nrf_balloc_cb_t CONCAT_2(_name,_nrf_balloc_cb); \ - static const nrf_balloc_t _name = \ - { \ - .p_cb = &CONCAT_2(_name,_nrf_balloc_cb), \ - .p_stack_base = CONCAT_2(_name,_nrf_balloc_pool_stack), \ - .p_stack_limit = CONCAT_2(_name,_nrf_balloc_pool_stack) + (_pool_size), \ - .p_memory_begin = CONCAT_2(_name,_nrf_balloc_pool_mem), \ - .block_size = NRF_BALLOC_BLOCK_SIZE(_element_size, _debug_flags), \ - \ - __NRF_BALLOC_ASSIGN_POOL_NAME(_name) \ - __NRF_BALLOC_ASSIGN_DEBUG_FLAGS(_debug_flags) \ - } - -/**@brief Create a block allocator instance. - * - * @note This macro reserves memory for the given block allocator instance. - * - * @param[in] _name Name of the allocator. - * @param[in] _element_size Size of one element. - * @param[in] _pool_size Size of the pool. - */ -#define NRF_BALLOC_DEF(_name, _element_size, _pool_size) \ - NRF_BALLOC_DBG_DEF(_name, _element_size, _pool_size, NRF_BALLOC_DEFAULT_DEBUG_FLAGS) - -/**@brief Create a block allocator interface. - * - * @param[in] _type Type which is allocated. - * @param[in] _name Name of the allocator. - */ -#define NRF_BALLOC_INTERFACE_DEC(_type, _name) \ - _type * CONCAT_2(_name,_alloc)(void); \ - void CONCAT_2(_name,_free)(_type * p_element) - -/**@brief Define a custom block allocator interface. - * - * @param[in] _attr Function attribute that will be added to allocator function definition. - * @param[in] _type Type which is allocated. - * @param[in] _name Name of the allocator. - * @param[in] _p_pool Pool from which data will be allocated. - */ -#define NRF_BALLOC_INTERFACE_CUSTOM_DEF(_attr, _type, _name, _p_pool) \ - _attr _type * CONCAT_2(_name,_alloc)(void) \ - { \ - GCC_PRAGMA("GCC diagnostic push") \ - GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ - ASSERT((_p_pool) != NULL); \ - ASSERT((_p_pool)->block_size >= \ - NRF_BALLOC_BLOCK_SIZE(sizeof(_type), (_p_pool)->debug_flags)); \ - GCC_PRAGMA("GCC diagnostic pop") \ - return (_type *)(nrf_balloc_alloc(_p_pool)); \ - } \ - \ - _attr void CONCAT_2(_name,_free)(_type * p_element) \ - { \ - GCC_PRAGMA("GCC diagnostic push") \ - GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ - ASSERT((_p_pool) != NULL); \ - ASSERT((_p_pool)->block_size >= \ - NRF_BALLOC_BLOCK_SIZE(sizeof(_type), (_p_pool)->debug_flags)); \ - GCC_PRAGMA("GCC diagnostic pop") \ - nrf_balloc_free((_p_pool), p_element); \ - } - -/**@brief Define block allocator interface. - * - * @param[in] _type Type which is allocated. - * @param[in] _name Name of the allocator. - * @param[in] _p_pool Pool from which data will be allocated. - */ -#define NRF_BALLOC_INTERFACE_DEF(_type, _name, _p_pool) \ - NRF_BALLOC_INTERFACE_CUSTOM_DEF(/* empty */, _type, _name, _p_pool) - -/**@brief Define a local block allocator interface. - * - * @param[in] _type Type which is allocated. - * @param[in] _name Name of the allocator. - * @param[in] _p_pool Pool from which data will be allocated. - */ -#define NRF_BALLOC_INTERFACE_LOCAL_DEF(_type, _name, _p_pool) \ - NRF_BALLOC_INTERFACE_CUSTOM_DEF(static, _type, _name, _p_pool) - -/**@brief Function for initializing a block memory allocator pool. - * - * @param[out] p_pool Pointer to the pool that is to be initialized. - * - * @return NRF_SUCCESS on success, otherwise error code. - */ -ret_code_t nrf_balloc_init(nrf_balloc_t const * p_pool); - -/**@brief Function for allocating an element from the pool. - * - * @note This module guarantees that the returned memory is aligned to 4. - * - * @param[in] p_pool Pointer to the memory pool from which the element will be allocated. - * - * @return Allocated element or NULL if the specified pool is empty. - */ -void * nrf_balloc_alloc(nrf_balloc_t const * p_pool); - -/**@brief Function for freeing an element back to the pool. - * - * @param[in] p_pool Pointer to the memory pool. - * @param[in] p_element Element to be freed. - */ -void nrf_balloc_free(nrf_balloc_t const * p_pool, void * p_element); - -/**@brief Function for getting maximum memory pool utilization. - * - * @param[in] p_pool Pointer to the memory pool instance. - * - * @return Maximum number of elements allocated from the pool. - */ -__STATIC_INLINE uint8_t nrf_balloc_max_utilization_get(nrf_balloc_t const * p_pool); - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION -__STATIC_INLINE uint8_t nrf_balloc_max_utilization_get(nrf_balloc_t const * p_pool) -{ - ASSERT(p_pool != NULL); - return p_pool->p_cb->max_utilization; -} -#endif //SUPPRESS_INLINE_IMPLEMENTATION - -#ifdef __cplusplus -} -#endif - -#endif // NRF_BALLOC_H__ -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/nrf_log.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/nrf_log.h deleted file mode 100644 index 967bc1a28a6..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/nrf_log.h +++ /dev/null @@ -1,234 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/**@file - * - * @defgroup nrf_log Logger module - * @{ - * @ingroup app_common - * - * @brief The nrf_log module interface. - */ - -#ifndef NRF_LOG_H_ -#define NRF_LOG_H_ - -#include "sdk_common.h" -#include "nrf_section.h" -#if NRF_MODULE_ENABLED(NRF_LOG) -#include "nrf_strerror.h" -#define NRF_LOG_ERROR_STRING_GET(code) nrf_strerror_get(code) -#else -#define NRF_LOG_ERROR_STRING_GET(code) "" -#endif - - -#ifdef __cplusplus -extern "C" { -#endif - -/** @brief Severity level for the module. - * - * The severity level can be defined in a module to override the default. - */ -#ifndef NRF_LOG_LEVEL - #define NRF_LOG_LEVEL NRF_LOG_DEFAULT_LEVEL -#endif - - -#include "nrf_log_internal.h" - -/** @def NRF_LOG_ERROR - * @brief Macro for logging error messages. It takes a printf-like, formatted - * string with up to seven arguments. - * - * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes error logs. - */ - -/** @def NRF_LOG_WARNING - * @brief Macro for logging error messages. It takes a printf-like, formatted - * string with up to seven arguments. - * - * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes warning logs. - */ - -/** @def NRF_LOG_INFO - * @brief Macro for logging error messages. It takes a printf-like, formatted - * string with up to seven arguments. - * - * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes info logs. - */ - -/** @def NRF_LOG_DEBUG - * @brief Macro for logging error messages. It takes a printf-like, formatted - * string with up to seven arguments. - * - * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes debug logs. - */ - -#define NRF_LOG_ERROR(...) NRF_LOG_INTERNAL_ERROR(__VA_ARGS__) -#define NRF_LOG_WARNING(...) NRF_LOG_INTERNAL_WARNING( __VA_ARGS__) -#define NRF_LOG_INFO(...) NRF_LOG_INTERNAL_INFO( __VA_ARGS__) -#define NRF_LOG_DEBUG(...) NRF_LOG_INTERNAL_DEBUG( __VA_ARGS__) - -/** - * @brief A macro for logging a formatted string without any prefix or timestamp. - */ -#define NRF_LOG_RAW_INFO(...) NRF_LOG_INTERNAL_RAW_INFO( __VA_ARGS__) - -/** @def NRF_LOG_HEXDUMP_ERROR - * @brief Macro for logging raw bytes. - * @details It is compiled in only if @ref NRF_LOG_LEVEL includes error logs. - * - * @param p_data Pointer to data. - * @param len Data length in bytes. - */ -/** @def NRF_LOG_HEXDUMP_WARNING - * @brief Macro for logging raw bytes. - * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes warning logs. - * - * @param p_data Pointer to data. - * @param len Data length in bytes. - */ -/** @def NRF_LOG_HEXDUMP_INFO - * @brief Macro for logging raw bytes. - * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes info logs. - * - * @param p_data Pointer to data. - * @param len Data length in bytes. - */ -/** @def NRF_LOG_HEXDUMP_DEBUG - * @brief Macro for logging raw bytes. - * @details This macro is compiled only if @ref NRF_LOG_LEVEL includes debug logs. - * - * @param p_data Pointer to data. - * @param len Data length in bytes. - */ -#define NRF_LOG_HEXDUMP_ERROR(p_data, len) NRF_LOG_INTERNAL_HEXDUMP_ERROR(p_data, len) -#define NRF_LOG_HEXDUMP_WARNING(p_data, len) NRF_LOG_INTERNAL_HEXDUMP_WARNING(p_data, len) -#define NRF_LOG_HEXDUMP_INFO(p_data, len) NRF_LOG_INTERNAL_HEXDUMP_INFO(p_data, len) -#define NRF_LOG_HEXDUMP_DEBUG(p_data, len) NRF_LOG_INTERNAL_HEXDUMP_DEBUG(p_data, len) - -/** - * @brief Macro for logging hexdump without any prefix or timestamp. - */ -#define NRF_LOG_RAW_HEXDUMP_INFO(p_data, len) NRF_LOG_INTERNAL_RAW_HEXDUMP_INFO(p_data, len) - -/** - * @brief A macro for blocking reading from bidirectional backend used for logging. - * - * Macro call is blocking and returns when single byte is received. - */ -#define NRF_LOG_GETCHAR() NRF_LOG_INTERNAL_GETCHAR() - -/** - * @brief A macro for copying a string to internal logger buffer if logs are deferred. - * - * @param _str String. - */ -#define NRF_LOG_PUSH(_str) NRF_LOG_INTERNAL_LOG_PUSH(_str) - -/** - * @brief Function for copying a string to the internal logger buffer if logs are deferred. - * - * Use this function to store a string that is volatile (for example allocated - * on stack) or that may change before the deferred logs are processed. Such string is copied - * into the internal logger buffer and is persistent until the log is processed. - * - * @note If the logs are not deferred, then this function returns the input parameter. - * - * @param p_str Pointer to the user string. - * - * @return Address to the location where the string is stored in the internal logger buffer. - */ -uint32_t nrf_log_push(char * const p_str); - -/** - * @brief Macro to be used in a formatted string to a pass float number to the log. - * - * Macro should be used in formatted string instead of the %f specifier together with - * @ref NRF_LOG_FLOAT macro. - * Example: NRF_LOG_INFO("My float number" NRF_LOG_FLOAT_MARKER "\r\n", NRF_LOG_FLOAT(f))) - */ -#define NRF_LOG_FLOAT_MARKER "%s%d.%02d" - -/** - * @brief Macro for dissecting a float number into two numbers (integer and residuum). - */ -#define NRF_LOG_FLOAT(val) (uint32_t)(((val) < 0 && (val) > -1.0) ? "-" : ""), \ - (int32_t)(val), \ - (int32_t)((((val) > 0) ? (val) - (int32_t)(val) \ - : (int32_t)(val) - (val))*100) - - - -/** - * @def NRF_LOG_MODULE_REGISTER - * @brief Macro for registering an independent module. - */ -#if NRF_LOG_ENABLED - -#ifdef UNIT_TEST -#define _CONST -#define COMPILED_LOG_LEVEL 4 -#else -#define _CONST const -#define COMPILED_LOG_LEVEL NRF_LOG_LEVEL -#endif -#define NRF_LOG_MODULE_REGISTER() \ - NRF_SECTION_ITEM_REGISTER(NRF_LOG_CONST_SECTION_NAME(NRF_LOG_MODULE_NAME), \ - _CONST nrf_log_module_const_data_t NRF_LOG_MODULE_DATA_CONST) = { \ - .p_module_name = STRINGIFY(NRF_LOG_MODULE_NAME), \ - .info_color_id = NRF_LOG_INFO_COLOR, \ - .debug_color_id = NRF_LOG_DEBUG_COLOR, \ - .compiled_lvl = COMPILED_LOG_LEVEL, \ - }; \ - NRF_SECTION_ITEM_REGISTER(NRF_LOG_DYNAMIC_SECTION_NAME(NRF_LOG_MODULE_NAME), \ - nrf_log_module_dynamic_data_t NRF_LOG_MODULE_DATA_DYNAMIC) -#else -#define NRF_LOG_MODULE_REGISTER() /*lint -save -e19*/ /*lint -restore*/ -#endif - -#ifdef __cplusplus -} -#endif - -#endif // NRF_LOG_H_ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/nrf_log_backend_interface.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/nrf_log_backend_interface.h deleted file mode 100644 index e5b965f44dc..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/nrf_log_backend_interface.h +++ /dev/null @@ -1,218 +0,0 @@ -/** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_LOG_BACKEND_INTERFACE_H -#define NRF_LOG_BACKEND_INTERFACE_H - -/**@file - * @addtogroup nrf_log Logger module - * @ingroup app_common - * - * @defgroup nrf_log_backend_interface Logger backend interface - * @{ - * @ingroup nrf_log - * @brief The nrf_log backend interface. - */ - -#include "nrf_memobj.h" -#include - -#ifdef __cplusplus -extern "C" { -#endif - - -/** - * @brief nrf_log entry. - */ -typedef nrf_memobj_t nrf_log_entry_t; - -/* Forward declaration of the nrf_log_backend_t type. */ -typedef struct nrf_log_backend_s nrf_log_backend_t; - -/** - * @brief Logger backend API. - */ -typedef struct -{ - /** - * @brief @ref nrf_log_backend_put - */ - void (*put)(nrf_log_backend_t const * p_backend, nrf_log_entry_t * p_entry); - - /** - * @brief @ref nrf_log_backend_panic_set - */ - void (*panic_set)(nrf_log_backend_t const * p_backend); - - /** - * @brief @ref nrf_log_backend_flush - */ - void (*flush)(nrf_log_backend_t const * p_backend); -} nrf_log_backend_api_t; - -/** - * @brief Logger backend structure. - */ -struct nrf_log_backend_s -{ - nrf_log_backend_api_t const * p_api; //!< Pointer to interface. - nrf_log_backend_t * p_next; //!< Pointer to next backend added to the logger. - uint8_t id; //!< Backend id. - bool enabled;//!< Flag indicating backend status. -}; - -/** - * @brief Function for putting message with log entry to the backend. - * - * @param[in] p_backend Pointer to the backend instance. - * @param[in] p_msg Pointer to message with log entry. - */ -__STATIC_INLINE void nrf_log_backend_put(nrf_log_backend_t const * p_backend, - nrf_log_entry_t * p_msg); - -/** - * @brief Function for reconfiguring backend to panic mode. - * - * @param[in] p_backend Pointer to the backend instance. - */ -__STATIC_INLINE void nrf_log_backend_panic_set(nrf_log_backend_t const * p_backend); - -/** - * @brief Function for flushing backend. - * - * @param[in] p_backend Pointer to the backend instance. - */ -__STATIC_INLINE void nrf_log_backend_flush(nrf_log_backend_t const * p_backend); - - -/** - * @brief Function for setting backend id. - * - * @note It is used internally by the logger. - * - * @param[in] p_backend Pointer to the backend instance. - * @param[in] id Id. - */ -__STATIC_INLINE void nrf_log_backend_id_set(nrf_log_backend_t * p_backend, uint8_t id); - -/** - * @brief Function for getting backend id. - * - * @note It is used internally by the logger. - * - * @param[in] p_backend Pointer to the backend instance. - * @return Id. - */ -__STATIC_INLINE uint8_t nrf_log_backend_id_get(nrf_log_backend_t const * p_backend); - -/** - * @brief Function for enabling backend. - * - * @param[in] p_backend Pointer to the backend instance. - */ -__STATIC_INLINE void nrf_log_backend_enable(nrf_log_backend_t * p_backend); - -/** - * @brief Function for disabling backend. - * - * @param[in] p_backend Pointer to the backend instance. - */ -__STATIC_INLINE void nrf_log_backend_disable(nrf_log_backend_t * p_backend); - -/** - * @brief Function for checking state of the backend. - * - * @param[in] p_backend Pointer to the backend instance. - * - * @return True if backend is enabled, false otherwise. - */ -__STATIC_INLINE bool nrf_log_backend_is_enabled(nrf_log_backend_t const * p_backend); - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION -__STATIC_INLINE void nrf_log_backend_put(nrf_log_backend_t const * p_backend, - nrf_log_entry_t * p_msg) -{ - p_backend->p_api->put(p_backend, p_msg); -} - -__STATIC_INLINE void nrf_log_backend_panic_set(nrf_log_backend_t const * p_backend) -{ - p_backend->p_api->panic_set(p_backend); -} - -__STATIC_INLINE void nrf_log_backend_flush(nrf_log_backend_t const * p_backend) -{ - p_backend->p_api->panic_set(p_backend); -} - -__STATIC_INLINE void nrf_log_backend_id_set(nrf_log_backend_t * p_backend, uint8_t id) -{ - p_backend->id = id; -} - -__STATIC_INLINE uint8_t nrf_log_backend_id_get(nrf_log_backend_t const * p_backend) -{ - return p_backend->id; -} - -__STATIC_INLINE void nrf_log_backend_enable(nrf_log_backend_t * p_backend) -{ - p_backend->enabled = true; -} - -__STATIC_INLINE void nrf_log_backend_disable(nrf_log_backend_t * p_backend) -{ - p_backend->enabled = false; -} - -__STATIC_INLINE bool nrf_log_backend_is_enabled(nrf_log_backend_t const * p_backend) -{ - return p_backend->enabled; -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - -#ifdef __cplusplus -} -#endif - -#endif //NRF_LOG_BACKEND_INTERFACE_H - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/nrf_log_backend_rtt.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/nrf_log_backend_rtt.h deleted file mode 100644 index 66eeeb65453..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/nrf_log_backend_rtt.h +++ /dev/null @@ -1,73 +0,0 @@ -/** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - - /**@file - * - * @defgroup nrf_log_backend_rtt Log RTT backend - * @{ - * @ingroup nrf_log - * @brief Log RTT backend. - */ - -#ifndef NRF_LOG_BACKEND_RTT_H -#define NRF_LOG_BACKEND_RTT_H - -#include "nrf_log_backend_interface.h" - -extern const nrf_log_backend_api_t nrf_log_backend_rtt_api; - -typedef struct { - nrf_log_backend_t backend; -} nrf_log_backend_rtt_t; - -/** - * @brief RTT backend definition - * - * @param _name Name of the instance. - */ -#define NRF_LOG_BACKEND_RTT_DEF(_name) \ - static nrf_log_backend_rtt_t _name = { \ - .backend = {.p_api = &nrf_log_backend_rtt_api}, \ - } - -void nrf_log_backend_rtt_init(void); -#endif //NRF_LOG_BACKEND_RTT_H - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/nrf_log_backend_uart.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/nrf_log_backend_uart.h deleted file mode 100644 index 4f9ce12900e..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/nrf_log_backend_uart.h +++ /dev/null @@ -1,68 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - - /**@file - * - * @defgroup nrf_log_backend_uart Log UART backend - * @{ - * @ingroup nrf_log - * @brief Log UART backend. - */ - -#ifndef NRF_LOG_BACKEND_UART_H -#define NRF_LOG_BACKEND_UART_H - -#include "nrf_log_backend_interface.h" - -extern const nrf_log_backend_api_t nrf_log_backend_uart_api; - -typedef struct { - nrf_log_backend_t backend; -} nrf_log_backend_uart_t; - -#define NRF_LOG_BACKEND_UART_DEF(name) \ - static nrf_log_backend_uart_t name = { \ - .backend = {.p_api = &nrf_log_backend_uart_api}, \ - } - -void nrf_log_backend_uart_init(void); -#endif //NRF_LOG_BACKEND_UART_H - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/nrf_log_ctrl.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/nrf_log_ctrl.h deleted file mode 100644 index 0fbce415fdc..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/nrf_log_ctrl.h +++ /dev/null @@ -1,233 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_LOG_CTRL_H -#define NRF_LOG_CTRL_H - -/**@file - * @addtogroup nrf_log Logger module - * @ingroup app_common - * - * @defgroup nrf_log_ctrl Functions for controlling nrf_log - * @{ - * @ingroup nrf_log - * @brief The nrf_log control interface. - */ - -#include "sdk_config.h" -#include "sdk_errors.h" -#include -#include -#include "nrf_log_ctrl_internal.h" -#include "nrf_log_backend_interface.h" -#ifdef __cplusplus -extern "C" { -#endif - -typedef enum -{ - NRF_LOG_SEVERITY_NONE, - NRF_LOG_SEVERITY_ERROR, - NRF_LOG_SEVERITY_WARNING, - NRF_LOG_SEVERITY_INFO, - NRF_LOG_SEVERITY_DEBUG, -} nrf_log_severity_t; - -/** - * @brief Timestamp function prototype. - * - * @return Timestamp value. - */ -typedef uint32_t (*nrf_log_timestamp_func_t)(void); - -/**@brief Macro for initializing the logs. - * - * @note If timestamps are disabled in the configuration, then the provided pointer - * can be NULL. Otherwise, it is expected that timestamp_getter is not NULL. - * - * @param timestamp_func Function that returns the timestamp. - * - * @return NRF_SUCCESS after successful initialization, otherwise an error code. - */ -#define NRF_LOG_INIT(timestamp_func) NRF_LOG_INTERNAL_INIT(timestamp_func) - - -/**@brief Macro for processing a single log entry from a queue of deferred logs. - * - * You can call this macro from the main context or from the error handler to process - * log entries one by one. - * - * @note If logs are not deferred, this call has no use and is defined as 'false'. - * - * @retval true There are more logs to process in the buffer. - * @retval false No more logs in the buffer. - */ -#define NRF_LOG_PROCESS() NRF_LOG_INTERNAL_PROCESS() - -/** @brief Macro for processing all log entries from the buffer. - * It blocks until all buffered entries are processed by the backend. - * - * @note If logs are not deferred, this call has no use and is empty. - */ -#define NRF_LOG_FLUSH() NRF_LOG_INTERNAL_FLUSH() - -/** @brief Macro for flushing log data before reset. - * - * @note If logs are not deferred, this call has no use and is empty. - * - * @note If RTT is used, then a breakpoint is hit once flushed. - */ -#define NRF_LOG_FINAL_FLUSH() NRF_LOG_INTERNAL_FINAL_FLUSH() - -/** - * @brief Function for initializing the frontend and the default backend. - * - * @ref NRF_LOG_INIT calls this function to initialize the frontend and the backend. - * If custom backend is used, then @ref NRF_LOG_INIT should not be called. - * Instead, frontend and user backend should be verbosely initialized. - * - * @param timestamp_func Function for getting a 32-bit timestamp. - * - * @return Error status. - * - */ -ret_code_t nrf_log_init(nrf_log_timestamp_func_t timestamp_func); - -/** - * @brief Function for adding new backend interface to the logger. - * - * @param p_backend Pointer to the backend interface. - * @param severity Initial value of severity level for each module forwarded to the backend. This - * option is only applicable if @ref NRF_LOG_FILTERS_ENABLED is set. - * @return -1 if backend cannot be added or positive number (backend ID). - */ -int32_t nrf_log_backend_add(nrf_log_backend_t * p_backend, nrf_log_severity_t severity); - -/** - * @brief Function for removing backend from the logger. - * - * @param p_backend Pointer to the backend interface. - * - */ -void nrf_log_backend_remove(nrf_log_backend_t * p_backend); - -/** - * @brief Function for setting logger backends into panic mode. - * - * When this function is called all attached backends are informed about panic state of the system. - * It is up to the backend to react properly (hold or process logs in blocking mode, etc.) - */ -void nrf_log_panic(void); - -/** - * @brief Function for handling a single log entry. - * - * Use this function only if the logs are buffered. It takes a single entry from the - * buffer and attempts to process it. - * - * @retval true If there are more entries to process. - * @retval false If there are no more entries to process. - */ -bool nrf_log_frontend_dequeue(void); - -/** - * @brief Function for getting number of independent log modules registered into the logger. - * - * @return Number of registered modules. - */ -uint32_t nrf_log_module_cnt_get(void); - -/** - * @brief Function for getting module name. - * - * @param module_id Module ID. - * @param is_ordered_idx Module ID is given is index in alphabetically sorted list of modules. - * @return Pointer to string with module name. - */ -const char * nrf_log_module_name_get(uint32_t module_id, bool is_ordered_idx); - -/** - * @brief Function for getting coloring of specific logs. - * - * @param module_id Module ID. - * @param severity Log severity. - * - * @return ID of the color. - */ -uint8_t nrf_log_color_id_get(uint32_t module_id, nrf_log_severity_t severity); - -/** - * @brief Function for configuring filtering ofs logs in the module. - * - * Filtering of logs in modules is independent for each backend. - * - * @param backend_id Backend ID which want to chenge its configuration. - * @param module_id Module ID which logs will be reconfigured. - * @param severity New severity filter. - */ -void nrf_log_module_filter_set(uint32_t backend_id, - uint32_t module_id, - nrf_log_severity_t severity); - -/** - * @brief Function for getting module severity level. - * - * @param backend_id Backend ID. - * @param module_id Module ID. - * @param is_ordered_idx Module ID is given is index in alphabetically sorted list of modules. - * @param dynamic It true current filter for given backend is returned. If false then - * compiled-in level is returned (maximum available). If this parameter is - * false then backend_id parameter is not used. - * - * @return Severity. - */ -nrf_log_severity_t nrf_log_module_filter_get(uint32_t backend_id, - uint32_t module_id, - bool is_ordered_idx, - bool dynamic); - -#ifdef __cplusplus -} -#endif - -#endif // NRF_LOG_CTRL_H - -/** - *@} - **/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/nrf_log_default_backends.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/nrf_log_default_backends.h deleted file mode 100644 index 982f3b1b5e3..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/nrf_log_default_backends.h +++ /dev/null @@ -1,81 +0,0 @@ -/** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_LOG_DEFAULT_BACKENDS_H__ -#define NRF_LOG_DEFAULT_BACKENDS_H__ - -/**@file - * @addtogroup nrf_log Logger module - * @ingroup app_common - * - * @defgroup nrf_log_default_backends Functions for initializing and adding default backends - * @{ - * @ingroup nrf_log - * @brief The nrf_log default backends. - */ - -#include "sdk_config.h" -#include "sdk_errors.h" -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @def NRF_LOG_DEFAULT_BACKENDS_INIT - * @brief Macro for initializing default backends. - * - * Each backend enabled in configuration is initialized and added as a backend to the logger. - */ -#if NRF_LOG_ENABLED -#define NRF_LOG_DEFAULT_BACKENDS_INIT() nrf_log_default_backends_init() -#else -#define NRF_LOG_DEFAULT_BACKENDS_INIT() -#endif - -void nrf_log_default_backends_init(void); - -#ifdef __cplusplus -} -#endif - -/** @} */ - -#endif // NRF_LOG_DEFAULT_BACKENDS_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/nrf_log_str_formatter.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/nrf_log_str_formatter.h deleted file mode 100644 index 134812d4cc0..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/nrf_log_str_formatter.h +++ /dev/null @@ -1,67 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_LOG_STR_FORMATTER_H -#define NRF_LOG_STR_FORMATTER_H - -#include -#include "nrf_fprintf.h" -#include "nrf_log_ctrl.h" - -typedef struct -{ - uint32_t timestamp; - uint16_t module_id; - nrf_log_severity_t severity; - bool raw; - uint8_t use_colors; -} nrf_log_str_formatter_entry_params_t; - -void nrf_log_std_entry_process(char const * p_str, - uint32_t const * p_args, - uint32_t nargs, - nrf_log_str_formatter_entry_params_t * p_params, - nrf_fprintf_ctx_t * p_ctx); - -void nrf_log_hexdump_entry_process(uint8_t * p_data, - uint32_t data_len, - nrf_log_str_formatter_entry_params_t * p_params, - nrf_fprintf_ctx_t * p_ctx); - -#endif //NRF_LOG_STR_FORMATTER_H diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_backend_rtt.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_backend_rtt.c deleted file mode 100644 index 03c32ca670f..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_backend_rtt.c +++ /dev/null @@ -1,101 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(NRF_LOG) && NRF_MODULE_ENABLED(NRF_LOG_BACKEND_RTT) -#include "nrf_log_backend_rtt.h" -#include "nrf_log_backend_serial.h" -#include "nrf_log_str_formatter.h" -#include "nrf_log_internal.h" -#include -#include - -static uint8_t m_string_buff[NRF_LOG_BACKEND_RTT_TEMP_BUFFER_SIZE]; - -void nrf_log_backend_rtt_init(void) -{ - SEGGER_RTT_Init(); -} - -static void serial_tx(void const * p_context, char const * buffer, size_t len) -{ - if (len) - { - uint32_t idx = 0; - uint32_t processed; - uint32_t watchdog_counter = 10; - do - { - processed = SEGGER_RTT_WriteNoLock(0, &buffer[idx], len); - idx += processed; - len -= processed; - if (processed == 0) - { - // If RTT is not connected then ensure that logger does not block - watchdog_counter--; - if (watchdog_counter == 0) - { - break; - } - } - } while (len); - } -} -static void nrf_log_backend_rtt_put(nrf_log_backend_t const * p_backend, - nrf_log_entry_t * p_msg) -{ - nrf_log_backend_serial_put(p_backend, p_msg, m_string_buff, NRF_LOG_BACKEND_RTT_TEMP_BUFFER_SIZE, serial_tx); -} - -static void nrf_log_backend_rtt_flush(nrf_log_backend_t const * p_backend) -{ - -} - -static void nrf_log_backend_rtt_panic_set(nrf_log_backend_t const * p_backend) -{ - -} - -const nrf_log_backend_api_t nrf_log_backend_rtt_api = { - .put = nrf_log_backend_rtt_put, - .flush = nrf_log_backend_rtt_flush, - .panic_set = nrf_log_backend_rtt_panic_set, -}; -#endif //NRF_MODULE_ENABLED(NRF_LOG) && NRF_MODULE_ENABLED(NRF_LOG_BACKEND_RTT) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_backend_serial.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_backend_serial.c deleted file mode 100644 index 194b9a7b5b0..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_backend_serial.c +++ /dev/null @@ -1,116 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(NRF_LOG) -#include "nrf_log_backend_serial.h" -#include "nrf_log_str_formatter.h" -#include "nrf_log_internal.h" - -void nrf_log_backend_serial_put(nrf_log_backend_t const * p_backend, - nrf_log_entry_t * p_msg, - uint8_t * p_buffer, - uint32_t length, - nrf_fprintf_fwrite tx_func) -{ - nrf_memobj_get(p_msg); - - nrf_fprintf_ctx_t fprintf_ctx = { - .p_io_buffer = (char *)p_buffer, - .io_buffer_size = length, - .io_buffer_cnt = 0, - .auto_flush = false, - .p_user_ctx = NULL, - .fwrite = tx_func - }; - - nrf_log_str_formatter_entry_params_t params; - - nrf_log_header_t header; - uint32_t memobj_offset = 0; - nrf_memobj_read(p_msg, &header, HEADER_SIZE*sizeof(uint32_t), memobj_offset); - memobj_offset = HEADER_SIZE*sizeof(uint32_t); - - params.timestamp = header.timestamp; - params.module_id = header.module_id; - params.use_colors = NRF_LOG_USES_COLORS; - - /*lint -save -e438*/ - if (header.base.generic.type == HEADER_TYPE_STD) - { - char const * p_log_str = (char const *)((uint32_t)header.base.std.addr); - params.severity = (nrf_log_severity_t)header.base.std.severity; - params.raw = header.base.std.raw; - uint32_t nargs = header.base.std.nargs; - uint32_t args[NRF_LOG_MAX_NUM_OF_ARGS]; - - nrf_memobj_read(p_msg, args, nargs*sizeof(uint32_t), memobj_offset); - memobj_offset += (nargs*sizeof(uint32_t)); - - nrf_log_std_entry_process(p_log_str, - args, - nargs, - ¶ms, - &fprintf_ctx); - - } - else if (header.base.generic.type == HEADER_TYPE_HEXDUMP) - { - uint32_t data_len = header.base.hexdump.len; - params.severity = (nrf_log_severity_t)header.base.hexdump.severity; - params.raw = header.base.hexdump.raw; - uint8_t data_buf[8]; - uint32_t chunk_len; - do - { - chunk_len = sizeof(data_buf) > data_len ? data_len : sizeof(data_buf); - nrf_memobj_read(p_msg, data_buf, chunk_len, memobj_offset); - memobj_offset += chunk_len; - data_len -= chunk_len; - - nrf_log_hexdump_entry_process(data_buf, - chunk_len, - ¶ms, - &fprintf_ctx); - } while (data_len > 0); - } - nrf_memobj_put(p_msg); - /*lint -restore*/ -} -#endif //NRF_LOG_ENABLED diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_backend_serial.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_backend_serial.h deleted file mode 100644 index 583bc72945e..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_backend_serial.h +++ /dev/null @@ -1,77 +0,0 @@ -/** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_LOG_BACKEND_SERIAL_H -#define NRF_LOG_BACKEND_SERIAL_H -/**@file - * @addtogroup nrf_log Logger module - * @ingroup app_common - * - * @defgroup nrf_log_backend_serial Common part of serial backends - * @{ - * @ingroup nrf_log - * @brief The nrf_log serial backend common put function. - */ - - -#include "nrf_log_backend_interface.h" -#include "nrf_fprintf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief A function for processing logger entry with simple serial interface as output. - * - * - */ -void nrf_log_backend_serial_put(nrf_log_backend_t const * p_backend, - nrf_log_entry_t * p_msg, - uint8_t * p_buffer, - uint32_t length, - nrf_fprintf_fwrite tx_func); - -#endif //NRF_LOG_BACKEND_SERIAL_H - -#ifdef __cplusplus -} -#endif - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_backend_uart.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_backend_uart.c deleted file mode 100644 index f81018c0daf..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_backend_uart.c +++ /dev/null @@ -1,116 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(NRF_LOG) && NRF_MODULE_ENABLED(NRF_LOG_BACKEND_UART) -#include "nrf_log_backend_uart.h" -#include "nrf_log_backend_serial.h" -#include "nrf_log_internal.h" -#include "nrf_drv_uart.h" -#include "app_error.h" - -nrf_drv_uart_t m_uart = NRF_DRV_UART_INSTANCE(0); - -static uint8_t m_string_buff[NRF_LOG_BACKEND_UART_TEMP_BUFFER_SIZE]; -static volatile bool m_xfer_done; -static bool m_async_mode; -static void uart_evt_handler(nrf_drv_uart_event_t * p_event, void * p_context) -{ - m_xfer_done = true; -} - -static void uart_init(bool async_mode) -{ - nrf_drv_uart_config_t config = NRF_DRV_UART_DEFAULT_CONFIG; - config.pseltxd = NRF_LOG_BACKEND_UART_TX_PIN; - config.pselrxd = NRF_UART_PSEL_DISCONNECTED; - config.pselcts = NRF_UART_PSEL_DISCONNECTED; - config.pselrts = NRF_UART_PSEL_DISCONNECTED; - config.baudrate = (nrf_uart_baudrate_t)NRF_LOG_BACKEND_UART_BAUDRATE; - ret_code_t err_code = nrf_drv_uart_init(&m_uart, &config, async_mode ? uart_evt_handler : NULL); - APP_ERROR_CHECK(err_code); - - m_async_mode = async_mode; -} - -void nrf_log_backend_uart_init(void) -{ - bool async_mode = NRF_LOG_DEFERRED ? true : false; - uart_init(async_mode); -} - -static void serial_tx(void const * p_context, char const * p_buffer, size_t len) -{ - uint8_t len8 = (uint8_t)(len & 0x000000FF); - m_xfer_done = false; - ret_code_t err_code = nrf_drv_uart_tx(&m_uart, (uint8_t *)p_buffer, len8); - APP_ERROR_CHECK(err_code); - /* wait for completion since buffer is reused*/ - while (m_async_mode && (m_xfer_done == false)) - { - - } - -} - -static void nrf_log_backend_uart_put(nrf_log_backend_t const * p_backend, - nrf_log_entry_t * p_msg) -{ - nrf_log_backend_serial_put(p_backend, p_msg, m_string_buff, - NRF_LOG_BACKEND_UART_TEMP_BUFFER_SIZE, serial_tx); -} - -static void nrf_log_backend_uart_flush(nrf_log_backend_t const * p_backend) -{ - -} - -static void nrf_log_backend_uart_panic_set(nrf_log_backend_t const * p_backend) -{ - nrf_drv_uart_uninit(&m_uart); - - uart_init(false); -} - -const nrf_log_backend_api_t nrf_log_backend_uart_api = { - .put = nrf_log_backend_uart_put, - .flush = nrf_log_backend_uart_flush, - .panic_set = nrf_log_backend_uart_panic_set, -}; -#endif //NRF_MODULE_ENABLED(NRF_LOG) && NRF_MODULE_ENABLED(NRF_LOG_BACKEND_UART) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_ctrl_internal.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_ctrl_internal.h deleted file mode 100644 index fbe36cb9676..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_ctrl_internal.h +++ /dev/null @@ -1,80 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_LOG_CTRL_INTERNAL_H -#define NRF_LOG_CTRL_INTERNAL_H -/** - * @cond (NODOX) - * @defgroup nrf_log_ctrl_internal Auxiliary internal types declarations - * @{ - * @internal - */ - -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(NRF_LOG) - -#define NRF_LOG_INTERNAL_INIT(timestamp_func) \ - nrf_log_init(timestamp_func) - -#define NRF_LOG_INTERNAL_PROCESS() nrf_log_frontend_dequeue() -#define NRF_LOG_INTERNAL_FLUSH() \ - do { \ - while (NRF_LOG_INTERNAL_PROCESS()); \ - } while (0) - -#define NRF_LOG_INTERNAL_FINAL_FLUSH() \ - do { \ - nrf_log_panic(); \ - NRF_LOG_INTERNAL_FLUSH(); \ - } while (0) - - -#else // NRF_MODULE_ENABLED(NRF_LOG) -#define NRF_LOG_INTERNAL_PROCESS() false -#define NRF_LOG_INTERNAL_FLUSH() -#define NRF_LOG_INTERNAL_INIT(timestamp_func) NRF_SUCCESS -#define NRF_LOG_INTERNAL_HANDLERS_SET(default_handler, bytes_handler) \ - UNUSED_PARAMETER(default_handler); UNUSED_PARAMETER(bytes_handler) -#define NRF_LOG_INTERNAL_FINAL_FLUSH() -#endif // NRF_MODULE_ENABLED(NRF_LOG) - -/** @} - * @endcond - */ -#endif // NRF_LOG_CTRL_INTERNAL_H diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_default_backends.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_default_backends.c deleted file mode 100644 index 039bf64590f..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_default_backends.c +++ /dev/null @@ -1,76 +0,0 @@ -/** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(NRF_LOG) -#include "nrf_log_default_backends.h" -#include "nrf_log_ctrl.h" -#include "nrf_log_internal.h" -#include "nrf_assert.h" - -#if defined(NRF_LOG_BACKEND_RTT_ENABLED) && NRF_LOG_BACKEND_RTT_ENABLED -#include "nrf_log_backend_rtt.h" -NRF_LOG_BACKEND_RTT_DEF(rtt_log_backend); -#endif - -#if defined(NRF_LOG_BACKEND_UART_ENABLED) && NRF_LOG_BACKEND_UART_ENABLED -#include "nrf_log_backend_uart.h" -NRF_LOG_BACKEND_UART_DEF(uart_log_backend); -#endif - -void nrf_log_default_backends_init(void) -{ - int32_t backend_id = -1; - (void)backend_id; -#if defined(NRF_LOG_BACKEND_RTT_ENABLED) && NRF_LOG_BACKEND_RTT_ENABLED - nrf_log_backend_rtt_init(); - backend_id = nrf_log_backend_add(&rtt_log_backend.backend, NRF_LOG_SEVERITY_DEBUG); - ASSERT(backend_id >= 0); - nrf_log_backend_enable(&rtt_log_backend.backend); -#endif - -#if defined(NRF_LOG_BACKEND_UART_ENABLED) && NRF_LOG_BACKEND_UART_ENABLED - nrf_log_backend_uart_init(); - backend_id = nrf_log_backend_add(&uart_log_backend.backend, NRF_LOG_SEVERITY_DEBUG); - ASSERT(backend_id >= 0); - nrf_log_backend_enable(&uart_log_backend.backend); -#endif -} -#endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_frontend.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_frontend.c deleted file mode 100644 index 459dc3e0b4d..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_frontend.c +++ /dev/null @@ -1,1146 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(NRF_LOG) -#include "app_util.h" -#include "app_util_platform.h" -#include "nrf_log.h" -#include "nrf_log_internal.h" -#include "nrf_log_ctrl.h" -#include "nrf_section.h" -#include "nrf_memobj.h" -#include "nrf_atomic.h" -#include - -STATIC_ASSERT((NRF_LOG_BUFSIZE % 4) == 0); -STATIC_ASSERT(IS_POWER_OF_TWO(NRF_LOG_BUFSIZE)); - -#define NRF_LOG_BUF_WORDS (NRF_LOG_BUFSIZE/4) - -#if NRF_LOG_BUF_WORDS < 32 -#warning "NRF_LOG_BUFSIZE too small, significant number of logs may be lost." -#endif - -NRF_MEMOBJ_POOL_DEF(mempool, NRF_LOG_MSGPOOL_ELEMENT_SIZE, NRF_LOG_MSGPOOL_ELEMENT_COUNT); - -#define NRF_LOG_BACKENDS_FULL 0xFF -#define NRF_LOG_FILTER_BITS_PER_BACKEND 3 -#define NRF_LOG_MAX_BACKENDS (32/NRF_LOG_FILTER_BITS_PER_BACKEND) -#define NRF_LOG_MAX_HEXDUMP (NRF_LOG_MSGPOOL_ELEMENT_SIZE*NRF_LOG_MSGPOOL_ELEMENT_COUNT/2) - -/** - * brief An internal control block of the logger - * - * @note Circular buffer is using never cleared indexes and a mask. It means - * that logger may break when indexes overflows. However, it is quite unlikely. - * With rate of 1000 log entries with 2 parameters per second such situation - * would happen after 12 days. - */ -typedef struct -{ - uint32_t wr_idx; // Current write index (never reset) - uint32_t rd_idx; // Current read index (never_reset) - uint32_t mask; // Size of buffer (must be power of 2) presented as mask - uint32_t buffer[NRF_LOG_BUF_WORDS]; - nrf_log_timestamp_func_t timestamp_func; // A pointer to function that returns timestamp - nrf_log_backend_t * p_backend_head; - nrf_atomic_flag_t log_skipping; - nrf_atomic_flag_t log_skipped; - bool autoflush; -} log_data_t; - -static log_data_t m_log_data; -static const char * m_overflow_info = "Overflow"; -/*lint -save -esym(526,log_const_data*) -esym(526,log_dynamic_data*)*/ -NRF_SECTION_DEF(log_dynamic_data, nrf_log_module_dynamic_data_t); -NRF_SECTION_DEF(log_const_data, nrf_log_module_const_data_t); -/*lint -restore*/ -NRF_LOG_MODULE_REGISTER(); -// Helper macros for section variables. -#define NRF_LOG_DYNAMIC_SECTION_VARS_GET(i) NRF_SECTION_ITEM_GET(log_dynamic_data, nrf_log_module_dynamic_data_t, (i)) - -#define NRF_LOG_CONST_SECTION_VARS_GET(i) NRF_SECTION_ITEM_GET(log_const_data, nrf_log_module_const_data_t, (i)) -#define NRF_LOG_CONST_SECTION_VARS_COUNT NRF_SECTION_ITEM_COUNT(log_const_data, nrf_log_module_const_data_t) - -#define PUSHED_HEADER_FILL(P_HDR, OFFSET, LENGTH) \ - (P_HDR)->base.pushed.type = HEADER_TYPE_PUSHED; \ - (P_HDR)->base.pushed.offset = OFFSET; \ - (P_HDR)->base.pushed.len = LENGTH - - -ret_code_t nrf_log_init(nrf_log_timestamp_func_t timestamp_func) -{ - if (NRF_LOG_USES_TIMESTAMP && (timestamp_func == NULL)) - { - return NRF_ERROR_INVALID_PARAM; - } - - m_log_data.mask = NRF_LOG_BUF_WORDS - 1; - m_log_data.wr_idx = 0; - m_log_data.rd_idx = 0; - m_log_data.log_skipped = 0; - m_log_data.log_skipping = 0; - m_log_data.autoflush = NRF_LOG_DEFERRED ? false : true; - if (NRF_LOG_USES_TIMESTAMP) - { - m_log_data.timestamp_func = timestamp_func; - } - - ret_code_t err_code = nrf_memobj_pool_init(&mempool); - if (err_code != NRF_SUCCESS) - { - return err_code; - } - - uint32_t modules_cnt = NRF_LOG_CONST_SECTION_VARS_COUNT; - uint32_t i; - if (NRF_LOG_FILTERS_ENABLED) - { - uint32_t j; - //sort modules by name - for (i = 0; i < modules_cnt; i++) - { - uint32_t idx = 0; - - for (j = 0; j < modules_cnt; j++) - { - if (i != j) - { - char const * p_name0 = NRF_LOG_CONST_SECTION_VARS_GET(i)->p_module_name; - char const * p_name1 = NRF_LOG_CONST_SECTION_VARS_GET(j)->p_module_name; - if (strncmp(p_name0, p_name1, 20) > 0) - { - idx++; - } - } - - } - nrf_log_module_dynamic_data_t * p_module_ddata = NRF_LOG_DYNAMIC_SECTION_VARS_GET(i); - p_module_ddata->filter = 0; - p_module_ddata->module_id = i; - p_module_ddata->order_idx = idx; - } - } - else - { - for(i = 0; i < modules_cnt; i++) - { - nrf_log_module_dynamic_data_t * p_module_ddata = NRF_LOG_DYNAMIC_SECTION_VARS_GET(i); - p_module_ddata->module_id = i; - } - } - - return NRF_SUCCESS; -} - -uint32_t nrf_log_module_cnt_get(void) -{ - return NRF_LOG_CONST_SECTION_VARS_COUNT; -} - -static ret_code_t module_idx_get(uint32_t * p_idx, bool ordered_idx) -{ - if (ordered_idx) - { - uint32_t module_cnt = nrf_log_module_cnt_get(); - uint32_t i; - for (i = 0; i < module_cnt; i++) - { - nrf_log_module_dynamic_data_t * p_module_data = NRF_LOG_DYNAMIC_SECTION_VARS_GET(i); - if (p_module_data->order_idx == *p_idx) - { - *p_idx = i; - return NRF_SUCCESS; - } - } - return NRF_ERROR_NOT_FOUND; - } - else - { - return NRF_SUCCESS; - } -} -const char * nrf_log_module_name_get(uint32_t module_id, bool ordered_idx) -{ - if (module_idx_get(&module_id, ordered_idx) == NRF_SUCCESS) - { - nrf_log_module_const_data_t * p_module_data = NRF_LOG_CONST_SECTION_VARS_GET(module_id); - return p_module_data->p_module_name; - } - else - { - return NULL; - } -} - -uint8_t nrf_log_color_id_get(uint32_t module_id, nrf_log_severity_t severity) -{ - nrf_log_module_const_data_t * p_module_data = NRF_LOG_CONST_SECTION_VARS_GET(module_id); - uint8_t color_id; - switch (severity) - { - case NRF_LOG_SEVERITY_ERROR: - color_id = NRF_LOG_ERROR_COLOR; - break; - case NRF_LOG_SEVERITY_WARNING: - color_id = NRF_LOG_WARNING_COLOR; - break; - case NRF_LOG_SEVERITY_INFO: - color_id = p_module_data->info_color_id; - break; - case NRF_LOG_SEVERITY_DEBUG: - color_id = p_module_data->debug_color_id; - break; - default: - color_id = 0; - break; - } - return color_id; -} - -static uint32_t higher_lvl_get(uint32_t lvls) -{ - uint32_t top_lvl = 0; - uint32_t tmp_lvl; - uint32_t i; - - //Find highest level enabled by backends - for (i = 0; i < (32/NRF_LOG_LEVEL_BITS); i+=NRF_LOG_LEVEL_BITS) - { - tmp_lvl = BF_GET(lvls,NRF_LOG_LEVEL_BITS, i); - if (tmp_lvl > top_lvl) - { - top_lvl = tmp_lvl; - } - } - return top_lvl; -} - -void nrf_log_module_filter_set(uint32_t backend_id, uint32_t module_id, nrf_log_severity_t severity) -{ - if (NRF_LOG_FILTERS_ENABLED) - { - nrf_log_module_dynamic_data_t * p_module_filter = NRF_LOG_DYNAMIC_SECTION_VARS_GET(module_id); - p_module_filter->filter_lvls &= ~(NRF_LOG_LEVEL_MASK << (NRF_LOG_LEVEL_BITS * backend_id)); - p_module_filter->filter_lvls |= (severity & NRF_LOG_LEVEL_MASK) << (NRF_LOG_LEVEL_BITS * backend_id); - p_module_filter->filter = higher_lvl_get(p_module_filter->filter_lvls); - } -} - -nrf_log_severity_t nrf_log_module_filter_get(uint32_t backend_id, - uint32_t module_id, - bool ordered_idx, - bool dynamic) -{ - nrf_log_severity_t severity = NRF_LOG_SEVERITY_NONE; - if (NRF_LOG_FILTERS_ENABLED && dynamic) - { - if (module_idx_get(&module_id, ordered_idx) == NRF_SUCCESS) - { - nrf_log_module_dynamic_data_t * p_module_filter = - NRF_LOG_DYNAMIC_SECTION_VARS_GET(module_id); - severity = (nrf_log_severity_t)((p_module_filter->filter_lvls >> (NRF_LOG_LEVEL_BITS * backend_id)) & - NRF_LOG_LEVEL_MASK); - } - } - else if (!dynamic) - { - if (module_idx_get(&module_id, ordered_idx) == NRF_SUCCESS) - { - nrf_log_module_const_data_t * p_module_data = - NRF_LOG_CONST_SECTION_VARS_GET(module_id); - severity = (nrf_log_severity_t)p_module_data->compiled_lvl; - } - } - return severity; -} - -/** - * @brief Skips the oldest, not pushed logs to make space for new logs. - * @details This function moves forward read index to prepare space for new logs. - */ - -static void log_skip(void) -{ - (void)nrf_atomic_flag_set(&m_log_data.log_skipped); - (void)nrf_atomic_flag_set(&m_log_data.log_skipping); - - uint32_t rd_idx = m_log_data.rd_idx; - uint32_t mask = m_log_data.mask; - nrf_log_header_t * p_header = (nrf_log_header_t *)&m_log_data.buffer[rd_idx & mask]; - nrf_log_header_t header; - - // Skip any string that is pushed to the circular buffer. - while (p_header->base.generic.type == HEADER_TYPE_PUSHED) - { - rd_idx += PUSHED_HEADER_SIZE; - rd_idx += (p_header->base.pushed.len + p_header->base.pushed.offset); - p_header = (nrf_log_header_t *)&m_log_data.buffer[rd_idx & mask]; - } - - uint32_t i; - for (i = 0; i < HEADER_SIZE; i++) - { - ((uint32_t*)&header)[i] = m_log_data.buffer[rd_idx++ & mask]; - } - - switch (header.base.generic.type) - { - case HEADER_TYPE_HEXDUMP: - rd_idx += CEIL_DIV(header.base.hexdump.len, sizeof(uint32_t)); - break; - case HEADER_TYPE_STD: - rd_idx += header.base.std.nargs; - break; - default: - ASSERT(false); - break; - } - - uint32_t log_skipping_tmp = nrf_atomic_flag_clear_fetch(&m_log_data.log_skipping); - //update read index only if log_skip was not interrupted by another log skip - if (log_skipping_tmp) - { - m_log_data.rd_idx = rd_idx; - } -} - - -static inline void std_header_set(uint32_t severity_mid, - char const * const p_str, - uint32_t nargs, - uint32_t wr_idx, - uint32_t mask) -{ - - - //Prepare header - in reverse order to ensure that packet type is validated (set to STD as last action) - uint16_t module_id = severity_mid >> NRF_LOG_MODULE_ID_POS; - ASSERT(module_id < nrf_log_module_cnt_get()); - m_log_data.buffer[(wr_idx + 1) & mask] = module_id; - - if (NRF_LOG_USES_TIMESTAMP) - { - m_log_data.buffer[(wr_idx + 2) & mask] = m_log_data.timestamp_func(); - } - - nrf_log_header_t * p_header = (nrf_log_header_t *)&m_log_data.buffer[wr_idx & mask]; - p_header->base.std.raw = (severity_mid & NRF_LOG_RAW) ? 1 : 0; - p_header->base.std.severity = severity_mid & NRF_LOG_LEVEL_MASK; - p_header->base.std.nargs = nargs; - p_header->base.std.addr = ((uint32_t)(p_str) & STD_ADDR_MASK); - p_header->base.std.type = HEADER_TYPE_STD; -} - -/** - * @brief Allocates chunk in a buffer for one entry and injects overflow if - * there is no room for requested entry. - * - * @param content_len Number of 32bit arguments. In case of allocating for hex dump it - * is the size of the buffer in 32bit words (ceiled). - * @param p_wr_idx Pointer to write index. - * - * @return True if successful allocation, false otherwise. - * - */ -static inline bool buf_prealloc(uint32_t content_len, uint32_t * p_wr_idx) -{ - uint32_t req_len = content_len + HEADER_SIZE; - uint32_t ovflw_tag_size = HEADER_SIZE; - bool ret = true; - CRITICAL_REGION_ENTER(); - *p_wr_idx = m_log_data.wr_idx; - uint32_t available_words = (m_log_data.mask + 1) - (m_log_data.wr_idx - m_log_data.rd_idx); - uint32_t required_words = req_len + ovflw_tag_size; // room for current entry and overflow - while (required_words > available_words) - { - if (NRF_LOG_ALLOW_OVERFLOW) - { - log_skip(); - available_words = (m_log_data.mask + 1) - (m_log_data.wr_idx - m_log_data.rd_idx); - } - else - { - if (available_words >= HEADER_SIZE) - { - // Overflow entry is injected - std_header_set(NRF_LOG_LEVEL_WARNING, m_overflow_info, 0, m_log_data.wr_idx, m_log_data.mask); - req_len = HEADER_SIZE; - } - else - { - // No more room for any logs. - req_len = 0; - } - ret = false; - break; - } - - } - /* Mark header as invalid.*/ - nrf_log_generic_header_t * p_header = (nrf_log_generic_header_t *)&m_log_data.buffer[m_log_data.wr_idx & m_log_data.mask]; - p_header->type = HEADER_TYPE_INVALID; - - m_log_data.wr_idx += req_len; - - CRITICAL_REGION_EXIT(); - return ret; -} - - -/** - * @brief Function for preallocating a continuous chunk of memory from circular buffer. - * - * If buffer does not fit starting from current position it will be allocated at - * the beginning of the circular buffer and offset will be returned indicating - * how much memory has been ommited at the end of the buffer. Function is - * using critical section. - * - * @param len32 Length of buffer to allocate. Given in words. - * @param p_offset Offset of the buffer. - * @param p_wr_idx Pointer to write index. - * - * @return A pointer to the allocated buffer. NULL if allocation failed. - */ -static inline uint32_t * cont_buf_prealloc(uint32_t len32, - uint32_t * p_offset, - uint32_t * p_wr_idx) -{ - uint32_t * p_buf = NULL; - - len32 += PUSHED_HEADER_SIZE; // Increment because 32bit header is needed to be stored. - - CRITICAL_REGION_ENTER(); - *p_wr_idx = m_log_data.wr_idx; - uint32_t available_words = (m_log_data.mask + 1) - - (m_log_data.wr_idx - m_log_data.rd_idx); - if (len32 <= available_words) - { - // buffer will fit as is - p_buf = &m_log_data.buffer[(m_log_data.wr_idx + 1) & m_log_data.mask]; - m_log_data.wr_idx += len32; - *p_offset = 0; - } - else if (len32 < (m_log_data.rd_idx & m_log_data.mask)) - { - // wraping to the begining of the buffer - m_log_data.wr_idx += (len32 + available_words - 1); - *p_offset = available_words - 1; - p_buf = m_log_data.buffer; - } - available_words = (m_log_data.mask + 1) - (m_log_data.wr_idx - m_log_data.rd_idx); - // If there is no more room for even overflow tag indicate failed allocation. - if (available_words < HEADER_SIZE) - { - p_buf = NULL; - } - CRITICAL_REGION_EXIT(); - - return p_buf; -} - - -uint32_t nrf_log_push(char * const p_str) -{ - if ((m_log_data.autoflush) || (p_str == NULL)) - { - return (uint32_t)p_str; - } - - uint32_t mask = m_log_data.mask; - uint32_t slen = strlen(p_str) + 1; - uint32_t buflen = CEIL_DIV(slen, sizeof(uint32_t)); - uint32_t offset = 0; - uint32_t wr_idx; - char * p_dst_str = (char *)cont_buf_prealloc(buflen, &offset, &wr_idx); - if (p_dst_str) - { - nrf_log_header_t * p_header = (nrf_log_header_t *)&m_log_data.buffer[wr_idx & mask]; - PUSHED_HEADER_FILL(p_header, offset, buflen); - memcpy(p_dst_str, p_str, slen); - } - return (uint32_t)p_dst_str; -} - -static inline void std_n(uint32_t severity_mid, char const * const p_str, uint32_t const * args, uint32_t nargs) -{ - uint32_t mask = m_log_data.mask; - uint32_t wr_idx; - - if (buf_prealloc(nargs, &wr_idx)) - { - // Proceed only if buffer was successfully preallocated. - - uint32_t data_idx = wr_idx + HEADER_SIZE; - uint32_t i; - for (i = 0; i < nargs; i++) - { - m_log_data.buffer[data_idx++ & mask] =args[i]; - } - std_header_set(severity_mid, p_str, nargs, wr_idx, mask); - } - if (m_log_data.autoflush) - { - NRF_LOG_FLUSH(); - } - -} - -void nrf_log_frontend_std_0(uint32_t severity_mid, char const * const p_str) -{ - std_n(severity_mid, p_str, NULL, 0); -} - - -void nrf_log_frontend_std_1(uint32_t severity_mid, - char const * const p_str, - uint32_t val0) -{ - uint32_t args[] = {val0}; - std_n(severity_mid, p_str, args, ARRAY_SIZE(args)); -} - - -void nrf_log_frontend_std_2(uint32_t severity_mid, - char const * const p_str, - uint32_t val0, - uint32_t val1) -{ - uint32_t args[] = {val0, val1}; - std_n(severity_mid, p_str, args, ARRAY_SIZE(args)); -} - - -void nrf_log_frontend_std_3(uint32_t severity_mid, - char const * const p_str, - uint32_t val0, - uint32_t val1, - uint32_t val2) -{ - uint32_t args[] = {val0, val1, val2}; - std_n(severity_mid, p_str, args, ARRAY_SIZE(args)); -} - - -void nrf_log_frontend_std_4(uint32_t severity_mid, - char const * const p_str, - uint32_t val0, - uint32_t val1, - uint32_t val2, - uint32_t val3) -{ - uint32_t args[] = {val0, val1, val2, val3}; - std_n(severity_mid, p_str, args, ARRAY_SIZE(args)); -} - - -void nrf_log_frontend_std_5(uint32_t severity_mid, - char const * const p_str, - uint32_t val0, - uint32_t val1, - uint32_t val2, - uint32_t val3, - uint32_t val4) -{ - uint32_t args[] = {val0, val1, val2, val3, val4}; - std_n(severity_mid, p_str, args, ARRAY_SIZE(args)); -} - - -void nrf_log_frontend_std_6(uint32_t severity_mid, - char const * const p_str, - uint32_t val0, - uint32_t val1, - uint32_t val2, - uint32_t val3, - uint32_t val4, - uint32_t val5) -{ - uint32_t args[] = {val0, val1, val2, val3, val4, val5}; - std_n(severity_mid, p_str, args, ARRAY_SIZE(args)); -} - - -void nrf_log_frontend_hexdump(uint32_t severity_mid, - const void * const p_data, - uint16_t length) -{ - uint32_t mask = m_log_data.mask; - - uint32_t wr_idx; - if (buf_prealloc(CEIL_DIV(length, sizeof(uint32_t)), &wr_idx)) - { - uint32_t header_wr_idx = wr_idx; - wr_idx += HEADER_SIZE; - - uint32_t space0 = sizeof(uint32_t) * (m_log_data.mask + 1 - (wr_idx & mask)); - if (length <= space0) - { - memcpy(&m_log_data.buffer[wr_idx & mask], p_data, length); - } - else - { - memcpy(&m_log_data.buffer[wr_idx & mask], p_data, space0); - length -= space0; - memcpy(&m_log_data.buffer[0], &((uint8_t *)p_data)[space0], length); - } - - //Prepare header - in reverse order to ensure that packet type is validated (set to HEXDUMP as last action) - if (NRF_LOG_USES_TIMESTAMP) - { - m_log_data.buffer[(header_wr_idx + 2) & mask] = m_log_data.timestamp_func(); - } - - m_log_data.buffer[(header_wr_idx + 1) & mask] = severity_mid >> NRF_LOG_MODULE_ID_POS; - //Header prepare - nrf_log_header_t * p_header = (nrf_log_header_t *)&m_log_data.buffer[header_wr_idx & mask]; - p_header->base.hexdump.raw = (severity_mid & NRF_LOG_RAW) ? 1 : 0; - p_header->base.hexdump.severity = severity_mid & NRF_LOG_LEVEL_MASK; - p_header->base.hexdump.offset = 0; - p_header->base.hexdump.len = length; - p_header->base.hexdump.type = HEADER_TYPE_HEXDUMP; - - - - } - - if (m_log_data.autoflush) - { - NRF_LOG_FLUSH(); - } -} - - -bool buffer_is_empty(void) -{ - return (m_log_data.rd_idx == m_log_data.wr_idx); -} - - -bool nrf_log_frontend_dequeue(void) -{ - if (buffer_is_empty()) - { - return false; - } - m_log_data.log_skipped = 0; - //It has to be ensured that reading rd_idx occurs after skipped flag is cleared. - __DSB(); - uint32_t rd_idx = m_log_data.rd_idx; - uint32_t mask = m_log_data.mask; - nrf_log_header_t * p_header = (nrf_log_header_t *)&m_log_data.buffer[rd_idx & mask]; - nrf_log_header_t header; - nrf_memobj_t * p_msg_buf = NULL; - uint32_t memobj_offset = 0; - uint32_t severity = 0; - - // Skip any string that is pushed to the circular buffer. - while (p_header->base.generic.type == HEADER_TYPE_PUSHED) - { - rd_idx += PUSHED_HEADER_SIZE; - rd_idx += (p_header->base.pushed.len + p_header->base.pushed.offset); - p_header = (nrf_log_header_t *)&m_log_data.buffer[rd_idx & mask]; - } - - uint32_t i; - for (i = 0; i < HEADER_SIZE; i++) - { - ((uint32_t*)&header)[i] = m_log_data.buffer[rd_idx++ & mask]; - } - - if (header.base.generic.type == HEADER_TYPE_HEXDUMP) - { - uint32_t orig_data_len = header.base.hexdump.len; - uint32_t data_len = MIN(header.base.hexdump.len, NRF_LOG_MAX_HEXDUMP); //limit the data - header.base.hexdump.len = data_len; - uint32_t msg_buf_size8 = sizeof(uint32_t)*HEADER_SIZE + data_len; - severity = header.base.hexdump.severity; - p_msg_buf = nrf_memobj_alloc(&mempool, msg_buf_size8); - - if (p_msg_buf) - { - nrf_memobj_get(p_msg_buf); - nrf_memobj_write(p_msg_buf, &header, HEADER_SIZE*sizeof(uint32_t), memobj_offset); - memobj_offset += HEADER_SIZE*sizeof(uint32_t); - - uint32_t space0 = sizeof(uint32_t) * (mask + 1 - (rd_idx & mask)); - if (data_len > space0) - { - uint8_t * ptr0 = space0 ? - (uint8_t *)&m_log_data.buffer[rd_idx & mask] : - (uint8_t *)&m_log_data.buffer[0]; - uint8_t len0 = space0 ? space0 : data_len; - uint8_t * ptr1 = space0 ? - (uint8_t *)&m_log_data.buffer[0] : NULL; - uint8_t len1 = space0 ? data_len - space0 : 0; - - nrf_memobj_write(p_msg_buf, ptr0, len0, memobj_offset); - memobj_offset += len0; - if (ptr1) - { - nrf_memobj_write(p_msg_buf, ptr1, len1, memobj_offset); - } - } - else - { - uint8_t * p_data = (uint8_t *)&m_log_data.buffer[rd_idx & mask]; - nrf_memobj_write(p_msg_buf, p_data, data_len, memobj_offset); - } - rd_idx += CEIL_DIV(orig_data_len, 4); - } - } - else if (header.base.generic.type == HEADER_TYPE_STD) // standard entry - { - header.base.std.nargs = MIN(header.base.std.nargs, NRF_LOG_MAX_NUM_OF_ARGS); - uint32_t msg_buf_size32 = HEADER_SIZE + header.base.std.nargs; - severity = header.base.std.severity; - - p_msg_buf = nrf_memobj_alloc(&mempool, msg_buf_size32*sizeof(uint32_t)); - - if (p_msg_buf) - { - nrf_memobj_get(p_msg_buf); - nrf_memobj_write(p_msg_buf, &header, HEADER_SIZE*sizeof(uint32_t), memobj_offset); - memobj_offset += HEADER_SIZE*sizeof(uint32_t); - - for (i = 0; i < header.base.std.nargs; i++) - { - nrf_memobj_write(p_msg_buf, &m_log_data.buffer[rd_idx++ & mask], - sizeof(uint32_t), memobj_offset); - memobj_offset += sizeof(uint32_t); - } - } - } - else if (header.base.generic.type == HEADER_TYPE_INVALID && (m_log_data.log_skipped == 0)) - { - //invalid type can only occur if log entry was interrupted by log_process. It is likly final flush - // and finding invalid type means that last entry in the buffer was reached (the one that was interrupted). - // Stop processing immediately. - return false; - } - else - { - //Do nothing. In case of log overflow buffer can contain corrupted data. - } - - if (p_msg_buf) - { - nrf_log_backend_t * p_backend = m_log_data.p_backend_head; - if (NRF_LOG_ALLOW_OVERFLOW && m_log_data.log_skipped) - { - // Check if any log was skipped during log processing. Do not forward log if skipping - // occured because data may be invalid. - nrf_memobj_put(p_msg_buf); - } - else - { - while (p_backend) - { - bool entry_accepted = false; - if (nrf_log_backend_is_enabled(p_backend) == true) - { - if (NRF_LOG_FILTERS_ENABLED) - { - uint8_t backend_id = nrf_log_backend_id_get(p_backend); - uint32_t filter_lvls = NRF_LOG_DYNAMIC_SECTION_VARS_GET(header.module_id)->filter_lvls; - uint32_t backend_lvl = (filter_lvls >> (backend_id*NRF_LOG_LEVEL_BITS)) - & NRF_LOG_LEVEL_MASK; - if (backend_lvl >= severity) - { - entry_accepted = true; - } - } - else - { - (void)severity; - entry_accepted = true; - } - } - if (entry_accepted) - { - nrf_log_backend_put(p_backend, p_msg_buf); - } - p_backend = p_backend->p_next; - } - - nrf_memobj_put(p_msg_buf); - - if (NRF_LOG_ALLOW_OVERFLOW) - { - // Read index can be moved forward only if dequeueing process was not interrupt by - // skipping procedure. If NRF_LOG_ALLOW_OVERFLOW is set then in case of buffer gets full - // and new logger entry occurs, oldest entry is removed. In that case read index is - // changed and updating it here would corrupt the internal circular buffer. - CRITICAL_REGION_ENTER(); - if (m_log_data.log_skipped == 0) - { - m_log_data.rd_idx = rd_idx; - } - CRITICAL_REGION_EXIT(); - } - else - { - m_log_data.rd_idx = rd_idx; - } - } - } - - return buffer_is_empty() ? false : true; -} - -static int32_t backend_id_assign(void) -{ - int32_t candidate_id; - nrf_log_backend_t * p_backend; - bool id_available; - for (candidate_id = 0; candidate_id < NRF_LOG_MAX_BACKENDS; candidate_id++) - { - p_backend = m_log_data.p_backend_head; - id_available = true; - while (p_backend) - { - if (nrf_log_backend_id_get(p_backend) == candidate_id) - { - id_available = false; - break; - } - p_backend = p_backend->p_next; - } - if (id_available) - { - return candidate_id; - } - } - return -1; -} - -int32_t nrf_log_backend_add(nrf_log_backend_t * p_backend, nrf_log_severity_t severity) -{ - int32_t id = backend_id_assign(); - if (id == -1) - { - return id; - } - - nrf_log_backend_id_set(p_backend, id); - //add to list - if (m_log_data.p_backend_head == NULL) - { - m_log_data.p_backend_head = p_backend; - p_backend->p_next = NULL; - } - else - { - p_backend->p_next = m_log_data.p_backend_head->p_next; - m_log_data.p_backend_head->p_next = p_backend; - } - - if (NRF_LOG_FILTERS_ENABLED) - { - uint32_t i; - for (i = 0; i < nrf_log_module_cnt_get(); i++) - { - nrf_log_severity_t buildin_lvl = nrf_log_module_filter_get(id, i, false, false); - nrf_log_severity_t actual_severity = MIN(buildin_lvl, severity); - nrf_log_module_filter_set(nrf_log_backend_id_get(p_backend), i, actual_severity); - } - } - - return id; -} - -void nrf_log_backend_remove(nrf_log_backend_t * p_backend) -{ - nrf_log_backend_t * p_curr = m_log_data.p_backend_head; - nrf_log_backend_t * p_prev = NULL; - while (p_curr != p_backend) - { - p_prev = p_curr; - p_curr = p_curr->p_next; - } - - if (p_prev) - { - p_prev->p_next = p_backend->p_next; - } - else - { - m_log_data.p_backend_head = NULL; - } -} - -void nrf_log_panic(void) -{ - nrf_log_backend_t * p_backend = m_log_data.p_backend_head; - m_log_data.autoflush = true; - while (p_backend) - { - nrf_log_backend_enable(p_backend); - nrf_log_backend_panic_set(p_backend); - p_backend = p_backend->p_next; - } -} - -#if NRF_LOG_CLI_CMDS -#include "nrf_cli.h" - -static const char * m_severity_lvls[] = { - "none", - "error", - "warning", - "info", - "debug", -}; - -static const char * m_severity_lvls_sorted[] = { - "debug", - "error", - "info", - "none", - "warning", -}; - -static void log_status(nrf_cli_t const * p_cli, size_t argc, char **argv) -{ - uint32_t modules_cnt = nrf_log_module_cnt_get(); - uint32_t backend_id = p_cli->p_log_backend->backend.id; - uint32_t i; - - if (!nrf_log_backend_is_enabled(&p_cli->p_log_backend->backend)) - { - nrf_cli_fprintf(p_cli, NRF_CLI_ERROR, "Logs are halted!\r\n"); - } - nrf_cli_fprintf(p_cli, NRF_CLI_NORMAL, "%-24s | current | buildin \r\n", "module_name"); - nrf_cli_fprintf(p_cli, NRF_CLI_NORMAL, "------------------------------------------\r\n"); - for (i = 0; i < modules_cnt; i++) - { - nrf_log_severity_t module_dynamic_lvl = nrf_log_module_filter_get(backend_id, i, true, true); - nrf_log_severity_t module_compiled_lvl = nrf_log_module_filter_get(backend_id, i, true, false); - nrf_log_severity_t actual_compiled_lvl = MIN(module_compiled_lvl, (nrf_log_severity_t)NRF_LOG_DEFAULT_LEVEL); - nrf_cli_fprintf(p_cli, NRF_CLI_NORMAL, "%-24s | %-7s | %s%s\r\n", - nrf_log_module_name_get(i, true), - m_severity_lvls[module_dynamic_lvl], - m_severity_lvls[actual_compiled_lvl], - actual_compiled_lvl < module_compiled_lvl ? "*" : ""); - } -} - -static bool module_id_get(const char * p_name, uint32_t * p_id) -{ - uint32_t modules_cnt = nrf_log_module_cnt_get(); - const char * p_tmp_name; - uint32_t j; - for (j = 0; j < modules_cnt; j++) - { - p_tmp_name = nrf_log_module_name_get(j, false); - if (strncmp(p_tmp_name, p_name, 32) == 0) - { - *p_id = j; - break; - } - } - return (j != modules_cnt); -} - -static bool module_id_filter_set(uint32_t backend_id, - uint32_t module_id, - nrf_log_severity_t lvl) -{ - nrf_log_severity_t buildin_lvl = nrf_log_module_filter_get(backend_id, module_id, false, false); - if (lvl > buildin_lvl) - { - return false; - } - else - { - nrf_log_module_filter_set(backend_id, module_id, lvl); - return true; - } -} - -static void log_ctrl(nrf_cli_t const * p_cli, size_t argc, char **argv) -{ - uint32_t backend_id = p_cli->p_log_backend->backend.id; - nrf_log_severity_t lvl; - uint32_t first_m_name_idx; - uint32_t i; - bool all_modules = false; - - if (argc > 0) - { - if (strncmp(argv[0], "enable", 7) == 0) - { - if (argc == 1) - { - nrf_cli_fprintf(p_cli, NRF_CLI_ERROR, "Bad parameter count.\r\n"); - return; - } - - if (argc == 2) - { - all_modules = true; - } - - for (i = 0; i < ARRAY_SIZE(m_severity_lvls); i++) - { - if (strncmp(argv[1], m_severity_lvls[i], 10) == 0) - { - break; - } - } - - if (i == ARRAY_SIZE(m_severity_lvls)) - { - nrf_cli_fprintf(p_cli, NRF_CLI_ERROR, "Unknown severity level: %s\r\n", argv[1]); - return; - } - - lvl = (nrf_log_severity_t)i; - first_m_name_idx = 2; - - } - else if (strncmp(argv[0], "disable", 8) == 0) - { - if (argc == 1) - { - all_modules = true; - } - lvl = NRF_LOG_SEVERITY_NONE; - first_m_name_idx = 1; - } - else - { - nrf_cli_fprintf(p_cli, NRF_CLI_ERROR, "Unknown option: %s\r\n", argv[0]); - return; - } - - if (all_modules) - { - for (i = 0; i < nrf_log_module_cnt_get(); i++) - { - if (module_id_filter_set(backend_id, i, lvl) == false) - { - nrf_cli_fprintf(p_cli, NRF_CLI_ERROR, "Level unavailable for module: %s\r\n", nrf_log_module_name_get(i, false)); - } - } - } - else - { - for (i = first_m_name_idx; i < argc; i++) - { - uint32_t module_id = 0; - if (module_id_get(argv[i], &module_id) == false) - { - nrf_cli_fprintf(p_cli, NRF_CLI_ERROR, "Unknown module:%s\r\n", argv[i]); - } - - if (module_id_filter_set(backend_id, module_id, lvl) == false) - { - nrf_cli_fprintf(p_cli, NRF_CLI_ERROR, "Level unavailable for module: %s\r\n", nrf_log_module_name_get(module_id, false)); - } - } - } - } -} -static void module_name_get(size_t idx, nrf_cli_static_entry_t * p_static); - -NRF_CLI_CREATE_DYNAMIC_CMD(m_module_name, module_name_get); - -static void module_name_get(size_t idx, nrf_cli_static_entry_t * p_static) -{ - p_static->handler = NULL; - p_static->p_help = NULL; - p_static->p_subcmd = &m_module_name; - p_static->p_syntax = nrf_log_module_name_get(idx, true); -} - -static void severity_lvl_get(size_t idx, nrf_cli_static_entry_t * p_static) -{ - p_static->handler = NULL; - p_static->p_help = NULL; - p_static->p_subcmd = &m_module_name; - p_static->p_syntax = (idx < ARRAY_SIZE(m_severity_lvls_sorted)) ? - m_severity_lvls_sorted[idx] : NULL; -} - -NRF_CLI_CREATE_DYNAMIC_CMD(m_severity_lvl, severity_lvl_get); - -static void log_halt(nrf_cli_t const * p_cli, size_t argc, char **argv) -{ - nrf_log_backend_disable(&p_cli->p_log_backend->backend); -} - -static void log_go(nrf_cli_t const * p_cli, size_t argc, char **argv) -{ - nrf_log_backend_enable(&p_cli->p_log_backend->backend); -} - -NRF_CLI_CREATE_STATIC_SUBCMD_SET(m_sub_log_stat) -{ - NRF_CLI_CMD(disable, &m_module_name, - "'log disable .. ' disables logs in specified " - "modules (all if no modules specified).", - log_ctrl), - NRF_CLI_CMD(enable, &m_severity_lvl, - "'log enable ... ' enables logs up to given level in " - "specified modules (all if no modules specified).", - log_ctrl), - NRF_CLI_CMD(go, NULL, "Resume logging", log_go), - NRF_CLI_CMD(halt, NULL, "Halt logging", log_halt), - NRF_CLI_CMD(status, NULL, "Logger status", log_status), - NRF_CLI_SUBCMD_SET_END -}; - -static void log_cmd(nrf_cli_t const * p_cli, size_t argc, char **argv) -{ - if ((argc == 1) || nrf_cli_help_requested(p_cli)) - { - nrf_cli_help_print(p_cli, NULL, 0); - return; - } - - nrf_cli_fprintf(p_cli, NRF_CLI_ERROR, "%s:%s%s\r\n", argv[0], " unknown parameter: ", argv[1]); -} - -NRF_CLI_CMD_REGISTER(log, &m_sub_log_stat, "Commands for controlling logger", log_cmd); - -#endif //NRF_LOG_CLI_CMDS - -#endif // NRF_MODULE_ENABLED(NRF_LOG) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_internal.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_internal.h deleted file mode 100644 index 3cf7b0600c6..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_internal.h +++ /dev/null @@ -1,548 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_LOG_INTERNAL_H__ -#define NRF_LOG_INTERNAL_H__ -#include "sdk_common.h" -#include "nrf.h" -#include "nrf_error.h" -#include "app_util.h" -#include -#include - -#ifndef NRF_LOG_ERROR_COLOR - #define NRF_LOG_ERROR_COLOR NRF_LOG_COLOR_DEFAULT -#endif - -#ifndef NRF_LOG_WARNING_COLOR - #define NRF_LOG_WARNING_COLOR NRF_LOG_COLOR_DEFAULT -#endif - -#ifndef NRF_LOG_INFO_COLOR - #define NRF_LOG_INFO_COLOR NRF_LOG_COLOR_DEFAULT -#endif - -#ifndef NRF_LOG_DEBUG_COLOR - #define NRF_LOG_DEBUG_COLOR NRF_LOG_COLOR_DEFAULT -#endif - - -#ifndef NRF_LOG_COLOR_DEFAULT -#define NRF_LOG_COLOR_DEFAULT 0 -#endif - -#ifndef NRF_LOG_DEFAULT_LEVEL -#define NRF_LOG_DEFAULT_LEVEL 0 -#endif - -#ifndef NRF_LOG_USES_COLORS -#define NRF_LOG_USES_COLORS 0 -#endif - -#ifndef NRF_LOG_USES_TIMESTAMP -#define NRF_LOG_USES_TIMESTAMP 0 -#endif - -#ifndef NRF_LOG_FILTERS_ENABLED -#define NRF_LOG_FILTERS_ENABLED 0 -#endif - -#ifndef NRF_LOG_MODULE_NAME - #define NRF_LOG_MODULE_NAME app -#endif - -#define NRF_LOG_LEVEL_ERROR 1UL -#define NRF_LOG_LEVEL_WARNING 2UL -#define NRF_LOG_LEVEL_INFO 3UL -#define NRF_LOG_LEVEL_DEBUG 4UL -#define NRF_LOG_LEVEL_INTERNAL 5UL -#define NRF_LOG_LEVEL_BITS 3 -#define NRF_LOG_LEVEL_MASK ((1UL << NRF_LOG_LEVEL_BITS) - 1) -#define NRF_LOG_RAW_POS 4U -#define NRF_LOG_RAW (1UL << NRF_LOG_RAW_POS) -#define NRF_LOG_MODULE_ID_BITS 16 -#define NRF_LOG_MODULE_ID_POS 16 -#define NRF_LOG_LEVEL_INFO_RAW (NRF_LOG_RAW | NRF_LOG_LEVEL_INFO) - -#define NRF_LOG_MAX_NUM_OF_ARGS 6 - -/* - * For GCC sections are sorted in the group by the linker. For IAR and KEIL it is assumed that linker will sort - * dynamic and const section in the same order (but in different locations). Proper message formatting - * is based on that assumption. - */ -#if defined(__GNUC__) -#define NRF_LOG_DYNAMIC_SECTION_NAME(_module_name) CONCAT_2(log_dynamic_data_,_module_name) -#define NRF_LOG_CONST_SECTION_NAME(_module_name) CONCAT_2(log_const_data_,_module_name) -#else -#define NRF_LOG_DYNAMIC_SECTION_NAME(_module_name) log_dynamic_data -#define NRF_LOG_CONST_SECTION_NAME(_module_name) log_const_data -#endif - -#define NRF_LOG_MODULE_DATA CONCAT_3(m_nrf_log_,NRF_LOG_MODULE_NAME,_logs_data) -#define NRF_LOG_MODULE_DATA_DYNAMIC CONCAT_2(NRF_LOG_MODULE_DATA,_dynamic) -#define NRF_LOG_MODULE_DATA_CONST CONCAT_2(NRF_LOG_MODULE_DATA,_const) - -#if NRF_LOG_FILTERS_ENABLED && NRF_LOG_ENABLED - #define NRF_LOG_FILTER NRF_LOG_MODULE_DATA_DYNAMIC.filter -#else - #undef NRF_LOG_FILTER - #define NRF_LOG_FILTER NRF_LOG_LEVEL_DEBUG -#endif - -#if NRF_LOG_ENABLED -#define NRF_LOG_MODULE_ID NRF_LOG_MODULE_DATA_DYNAMIC.module_id -#else -#define NRF_LOG_MODULE_ID 0 -#endif - - -#define LOG_INTERNAL_X(N, ...) CONCAT_2(LOG_INTERNAL_, N) (__VA_ARGS__) -#define LOG_INTERNAL(type, ...) LOG_INTERNAL_X(NUM_VA_ARGS_LESS_1( \ - __VA_ARGS__), type, __VA_ARGS__) -#if NRF_LOG_ENABLED -#define NRF_LOG_INTERNAL_LOG_PUSH(_str) nrf_log_push(_str) -#define LOG_INTERNAL_0(type, str) \ - nrf_log_frontend_std_0(type, str) -#define LOG_INTERNAL_1(type, str, arg0) \ - /*lint -save -e571*/nrf_log_frontend_std_1(type, str, (uint32_t)(arg0))/*lint -restore*/ -#define LOG_INTERNAL_2(type, str, arg0, arg1) \ - /*lint -save -e571*/nrf_log_frontend_std_2(type, str, (uint32_t)(arg0), \ - (uint32_t)(arg1))/*lint -restore*/ -#define LOG_INTERNAL_3(type, str, arg0, arg1, arg2) \ - /*lint -save -e571*/nrf_log_frontend_std_3(type, str, (uint32_t)(arg0), \ - (uint32_t)(arg1), (uint32_t)(arg2))/*lint -restore*/ -#define LOG_INTERNAL_4(type, str, arg0, arg1, arg2, arg3) \ - /*lint -save -e571*/nrf_log_frontend_std_4(type, str, (uint32_t)(arg0), \ - (uint32_t)(arg1), (uint32_t)(arg2), (uint32_t)(arg3))/*lint -restore*/ -#define LOG_INTERNAL_5(type, str, arg0, arg1, arg2, arg3, arg4) \ - /*lint -save -e571*/nrf_log_frontend_std_5(type, str, (uint32_t)(arg0), \ - (uint32_t)(arg1), (uint32_t)(arg2), (uint32_t)(arg3), (uint32_t)(arg4))/*lint -restore*/ -#define LOG_INTERNAL_6(type, str, arg0, arg1, arg2, arg3, arg4, arg5) \ - /*lint -save -e571*/nrf_log_frontend_std_6(type, str, (uint32_t)(arg0), \ - (uint32_t)(arg1), (uint32_t)(arg2), (uint32_t)(arg3), (uint32_t)(arg4), (uint32_t)(arg5))/*lint -restore*/ - - -#else //NRF_LOG_ENABLED -#define NRF_LOG_INTERNAL_LOG_PUSH(_str) (void)(_str) -#define LOG_INTERNAL_0(_type, _str) \ - (void)(_type); (void)(_str) -#define LOG_INTERNAL_1(_type, _str, _arg0) \ - (void)(_type); (void)(_str); (void)(_arg0) -#define LOG_INTERNAL_2(_type, _str, _arg0, _arg1) \ - (void)(_type); (void)(_str); (void)(_arg0); (void)(_arg1) -#define LOG_INTERNAL_3(_type, _str, _arg0, _arg1, _arg2) \ - (void)(_type); (void)(_str); (void)(_arg0); (void)(_arg1); (void)(_arg2) -#define LOG_INTERNAL_4(_type, _str, _arg0, _arg1, _arg2, _arg3) \ - (void)(_type); (void)(_str); (void)(_arg0); (void)(_arg1); (void)(_arg2); (void)(_arg3) -#define LOG_INTERNAL_5(_type, _str, _arg0, _arg1, _arg2, _arg3, _arg4) \ - (void)(_type); (void)(_str); (void)(_arg0); (void)(_arg1); (void)(_arg2); (void)(_arg3); (void)(_arg4) -#define LOG_INTERNAL_6(_type, _str, _arg0, _arg1, _arg2, _arg3, _arg4, _arg5) \ - (void)(_type); (void)(_str); (void)(_arg0); (void)(_arg1); (void)(_arg2); (void)(_arg3); (void)(_arg4); (void)(_arg5) -#endif //NRF_LOG_ENABLED && (NRF_LOG_DEFAULT_LEVEL >= NRF_LOG_LEVEL_ERROR) - -#define LOG_SEVERITY_MOD_ID(severity) ((severity) | NRF_LOG_MODULE_ID << NRF_LOG_MODULE_ID_POS) - -#if NRF_LOG_ENABLED -#define LOG_HEXDUMP(_severity, _p_data, _length) \ - nrf_log_frontend_hexdump((_severity), (_p_data), (_length)) -#else -#define LOG_HEXDUMP(_severity, _p_data, _length) \ - (void)(_severity); (void)(_p_data); (void)_length -#endif - -#define NRF_LOG_INTERNAL_ERROR(...) \ - if (NRF_LOG_ENABLED && (NRF_LOG_LEVEL >= NRF_LOG_LEVEL_ERROR) && \ - (NRF_LOG_LEVEL_ERROR <= NRF_LOG_DEFAULT_LEVEL)) \ - { \ - if (NRF_LOG_FILTER >= NRF_LOG_LEVEL_ERROR) \ - { \ - LOG_INTERNAL(LOG_SEVERITY_MOD_ID(NRF_LOG_LEVEL_ERROR), __VA_ARGS__); \ - } \ - } -#define NRF_LOG_INTERNAL_HEXDUMP_ERROR(p_data, len) \ - if (NRF_LOG_ENABLED && (NRF_LOG_LEVEL >= NRF_LOG_LEVEL_ERROR) && \ - (NRF_LOG_LEVEL_ERROR <= NRF_LOG_DEFAULT_LEVEL)) \ - { \ - if (NRF_LOG_FILTER >= NRF_LOG_LEVEL_ERROR) \ - { \ - LOG_HEXDUMP(LOG_SEVERITY_MOD_ID(NRF_LOG_LEVEL_ERROR), \ - (p_data), (len)); \ - } \ - } - -#define NRF_LOG_INTERNAL_WARNING(...) \ - if (NRF_LOG_ENABLED && (NRF_LOG_LEVEL >= NRF_LOG_LEVEL_WARNING) && \ - (NRF_LOG_LEVEL_WARNING <= NRF_LOG_DEFAULT_LEVEL)) \ - { \ - if (NRF_LOG_FILTER >= NRF_LOG_LEVEL_WARNING) \ - { \ - LOG_INTERNAL(LOG_SEVERITY_MOD_ID(NRF_LOG_LEVEL_WARNING), __VA_ARGS__); \ - } \ - } -#define NRF_LOG_INTERNAL_HEXDUMP_WARNING(p_data, len) \ - if (NRF_LOG_ENABLED && (NRF_LOG_LEVEL >= NRF_LOG_LEVEL_WARNING) && \ - (NRF_LOG_LEVEL_WARNING <= NRF_LOG_DEFAULT_LEVEL)) \ - { \ - if (NRF_LOG_FILTER >= NRF_LOG_LEVEL_WARNING) \ - { \ - LOG_HEXDUMP(LOG_SEVERITY_MOD_ID(NRF_LOG_LEVEL_WARNING, \ - (p_data), (len)); \ - } \ - } - -#define NRF_LOG_INTERNAL_INFO(...) \ - if (NRF_LOG_ENABLED && (NRF_LOG_LEVEL >= NRF_LOG_LEVEL_INFO) && \ - (NRF_LOG_LEVEL_INFO <= NRF_LOG_DEFAULT_LEVEL)) \ - { \ - if (NRF_LOG_FILTER >= NRF_LOG_LEVEL_INFO) \ - { \ - LOG_INTERNAL(LOG_SEVERITY_MOD_ID(NRF_LOG_LEVEL_INFO), __VA_ARGS__); \ - } \ - } - -#define NRF_LOG_INTERNAL_RAW_INFO(...) \ - if (NRF_LOG_ENABLED && (NRF_LOG_LEVEL >= NRF_LOG_LEVEL_INFO) && \ - (NRF_LOG_LEVEL_INFO <= NRF_LOG_DEFAULT_LEVEL)) \ - { \ - if (NRF_LOG_FILTER >= NRF_LOG_LEVEL_INFO) \ - { \ - LOG_INTERNAL(LOG_SEVERITY_MOD_ID(NRF_LOG_LEVEL_INFO | NRF_LOG_RAW), \ - __VA_ARGS__); \ - } \ - } - -#define NRF_LOG_INTERNAL_HEXDUMP_INFO(p_data, len) \ - if (NRF_LOG_ENABLED && (NRF_LOG_LEVEL >= NRF_LOG_LEVEL_INFO) && \ - (NRF_LOG_LEVEL_INFO <= NRF_LOG_DEFAULT_LEVEL)) \ - { \ - if (NRF_LOG_FILTER >= NRF_LOG_LEVEL_INFO) \ - { \ - LOG_HEXDUMP(LOG_SEVERITY_MOD_ID(NRF_LOG_LEVEL_INFO), \ - (p_data), (len)); \ - } \ - } - -#define NRF_LOG_INTERNAL_RAW_HEXDUMP_INFO(p_data, len) \ - if (NRF_LOG_ENABLED && (NRF_LOG_LEVEL >= NRF_LOG_LEVEL_INFO) && \ - (NRF_LOG_LEVEL_INFO <= NRF_LOG_DEFAULT_LEVEL)) \ - { \ - if (NRF_LOG_FILTER >= NRF_LOG_LEVEL_INFO) \ - { \ - LOG_HEXDUMP(LOG_SEVERITY_MOD_ID(NRF_LOG_LEVEL_INFO_RAW), \ - (p_data), (len)); \ - } \ - } - -#define NRF_LOG_INTERNAL_DEBUG(...) \ - if (NRF_LOG_ENABLED && (NRF_LOG_LEVEL >= NRF_LOG_LEVEL_DEBUG) && \ - (NRF_LOG_LEVEL_DEBUG <= NRF_LOG_DEFAULT_LEVEL)) \ - { \ - if (NRF_LOG_FILTER >= NRF_LOG_LEVEL_DEBUG) \ - { \ - LOG_INTERNAL(LOG_SEVERITY_MOD_ID(NRF_LOG_LEVEL_DEBUG), __VA_ARGS__); \ - } \ - } -#define NRF_LOG_INTERNAL_HEXDUMP_DEBUG(p_data, len) \ - if (NRF_LOG_ENABLED && (NRF_LOG_LEVEL >= NRF_LOG_LEVEL_DEBUG) && \ - (NRF_LOG_LEVEL_DEBUG <= NRF_LOG_DEFAULT_LEVEL)) \ - { \ - if (NRF_LOG_FILTER >= NRF_LOG_LEVEL_DEBUG) \ - { \ - LOG_HEXDUMP(LOG_SEVERITY_MOD_ID(NRF_LOG_LEVEL_DEBUG), \ - (p_data), (len)); \ - } \ - } - -#if NRF_MODULE_ENABLED(NRF_LOG) -#define NRF_LOG_INTERNAL_GETCHAR() nrf_log_getchar() -#else -#define NRF_LOG_INTERNAL_GETCHAR() (void) -#endif - -typedef struct -{ - uint16_t module_id; - uint16_t order_idx; - uint32_t filter; - uint32_t filter_lvls; -} nrf_log_module_dynamic_data_t; - -typedef struct -{ - const char * p_module_name; - uint8_t info_color_id; - uint8_t debug_color_id; - uint8_t compiled_lvl; -} nrf_log_module_const_data_t; - -extern nrf_log_module_dynamic_data_t NRF_LOG_MODULE_DATA_DYNAMIC; - -/** - * Set of macros for encoding and decoding header for log entries. - * There are 3 types of entries: - * 1. Standard entry (STD) - * An entry consists of header, pointer to string and values. Header contains - * severity leveland determines number of arguments and thus size of the entry. - * Since flash address space starts from 0x00000000 and is limited to kB rather - * than MB 22 bits are used to store the address (4MB). It is used that way to - * save one RAM memory. - * - * -------------------------------- - * |TYPE|SEVERITY|NARGS| P_STR | - * |------------------------------| - * | Module_ID (optional) | - * |------------------------------| - * | TIMESTAMP (optional) | - * |------------------------------| - * | ARG0 | - * |------------------------------| - * | .... | - * |------------------------------| - * | ARG(nargs-1) | - * -------------------------------- - * - * 2. Hexdump entry (HEXDUMP) is used for dumping raw data. An entry consists of - * header, optional timestamp, pointer to string and data. A header contains - * length (10bit) and offset which is updated after backend processes part of - * data. - * - * -------------------------------- - * |TYPE|SEVERITY|NARGS|OFFSET|LEN| - * |------------------------------| - * | Module_ID (optional) | - * |------------------------------| - * | TIMESTAMP (optional) | - * |------------------------------| - * | P_STR | - * |------------------------------| - * | data | - * |------------------------------| - * | data | dummy | - * -------------------------------- - * - * 3. Pushed string. If string is pushed into the logger internal buffer it is - * stored as PUSHED entry. It consists of header, unused data (optional) and - * string. Unused data is present if string does not not fit into a buffer - * without wrapping (and string cannot be wrapped). In that case header - * contains information about offset. - * - * -------------------------------- - * |TYPE| OFFSET | LEN | - * |------------------------------| - * | OFFSET | - * |------------------------------| - * end| OFFSET | - * 0|------------------------------| - * | STRING | - * |------------------------------| - * | STRING | dummy | - * -------------------------------- - */ - -#define STD_ADDR_MASK ((uint32_t)(1U << 22) - 1U) -#define HEADER_TYPE_STD 1U -#define HEADER_TYPE_HEXDUMP 2U -#define HEADER_TYPE_PUSHED 0U -#define HEADER_TYPE_INVALID 3U - -typedef struct -{ - uint32_t type : 2; - uint32_t raw : 1; - uint32_t data : 29; -} nrf_log_generic_header_t; - -typedef struct -{ - uint32_t type : 2; - uint32_t raw : 1; - uint32_t severity : 3; - uint32_t nargs : 4; - uint32_t addr : 22; -} nrf_log_std_header_t; - -typedef struct -{ - uint32_t type : 2; - uint32_t raw : 1; - uint32_t severity : 3; - uint32_t offset : 10; - uint32_t reserved : 6; - uint32_t len : 10; -} nrf_log_hexdump_header_t; - -typedef struct -{ - uint32_t type : 2; - uint32_t reserved0 : 4; - uint32_t offset : 10; - uint32_t reserved1 : 6; - uint32_t len : 10; -} nrf_log_pushed_header_t; - -typedef struct -{ - union { - nrf_log_generic_header_t generic; - nrf_log_std_header_t std; - nrf_log_hexdump_header_t hexdump; - nrf_log_pushed_header_t pushed; - uint32_t raw; - } base; - uint32_t module_id; - uint32_t timestamp; -} nrf_log_header_t; - -#define HEADER_SIZE (sizeof(nrf_log_header_t)/sizeof(uint32_t) - \ - (NRF_LOG_USES_TIMESTAMP ? 0 : 1)) - -#define PUSHED_HEADER_SIZE (sizeof(nrf_log_pushed_header_t)/sizeof(uint32_t)) - -//Implementation assumes that pushed header has one word. -STATIC_ASSERT(PUSHED_HEADER_SIZE == 1); -/** - * @brief A function for logging raw string. - * - * @param severity_mid Severity. - * @param p_str A pointer to a string. - */ -void nrf_log_frontend_std_0(uint32_t severity_mid, char const * const p_str); - -/** - * @brief A function for logging a formatted string with one argument. - * - * @param severity_mid Severity. - * @param p_str A pointer to a formatted string. - * @param val0 An argument. - */ -void nrf_log_frontend_std_1(uint32_t severity_mid, - char const * const p_str, - uint32_t val0); - -/** - * @brief A function for logging a formatted string with 2 arguments. - * - * @param severity_mid Severity. - * @param p_str A pointer to a formatted string. - * @param val0, val1 Arguments for formatting string. - */ -void nrf_log_frontend_std_2(uint32_t severity_mid, - char const * const p_str, - uint32_t val0, - uint32_t val1); - -/** - * @brief A function for logging a formatted string with 3 arguments. - * - * @param severity_mid Severity. - * @param p_str A pointer to a formatted string. - * @param val0, val1, val2 Arguments for formatting string. - */ -void nrf_log_frontend_std_3(uint32_t severity_mid, - char const * const p_str, - uint32_t val0, - uint32_t val1, - uint32_t val2); - -/** - * @brief A function for logging a formatted string with 4 arguments. - * - * @param severity_mid Severity. - * @param p_str A pointer to a formatted string. - * @param val0, val1, val2, val3 Arguments for formatting string. - */ -void nrf_log_frontend_std_4(uint32_t severity_mid, - char const * const p_str, - uint32_t val0, - uint32_t val1, - uint32_t val2, - uint32_t val3); - -/** - * @brief A function for logging a formatted string with 5 arguments. - * - * @param severity_mid Severity. - * @param p_str A pointer to a formatted string. - * @param val0, val1, val2, val3, val4 Arguments for formatting string. - */ -void nrf_log_frontend_std_5(uint32_t severity_mid, - char const * const p_str, - uint32_t val0, - uint32_t val1, - uint32_t val2, - uint32_t val3, - uint32_t val4); - -/** - * @brief A function for logging a formatted string with 6 arguments. - * - * @param severity_mid Severity. - * @param p_str A pointer to a formatted string. - * @param val0, val1, val2, val3, val4, val5 Arguments for formatting string. - */ -void nrf_log_frontend_std_6(uint32_t severity_mid, - char const * const p_str, - uint32_t val0, - uint32_t val1, - uint32_t val2, - uint32_t val3, - uint32_t val4, - uint32_t val5); - -/** - * @brief A function for logging raw data. - * - * @param severity_mid Severity. - * @param p_str A pointer to a string which is prefixing the data. - * @param p_data A pointer to data to be dumped. - * @param length Length of data (in bytes). - * - */ -void nrf_log_frontend_hexdump(uint32_t severity_mid, - const void * const p_data, - uint16_t length); - -/** - * @brief A function for reading a byte from log backend. - * - * @return Byte. - */ -uint8_t nrf_log_getchar(void); -#endif // NRF_LOG_INTERNAL_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_str_formatter.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_str_formatter.c deleted file mode 100644 index accdf224fc7..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_log/src/nrf_log_str_formatter.c +++ /dev/null @@ -1,209 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(NRF_LOG) -#include "nrf_log_str_formatter.h" -#include "nrf_log_internal.h" -#include "nrf_log_ctrl.h" -#include "nrf_fprintf.h" -#include - -#define NRF_LOG_COLOR_CODE_DEFAULT "\x1B[0m" -#define NRF_LOG_COLOR_CODE_BLACK "\x1B[1;30m" -#define NRF_LOG_COLOR_CODE_RED "\x1B[1;31m" -#define NRF_LOG_COLOR_CODE_GREEN "\x1B[1;32m" -#define NRF_LOG_COLOR_CODE_YELLOW "\x1B[1;33m" -#define NRF_LOG_COLOR_CODE_BLUE "\x1B[1;34m" -#define NRF_LOG_COLOR_CODE_MAGENTA "\x1B[1;35m" -#define NRF_LOG_COLOR_CODE_CYAN "\x1B[1;36m" -#define NRF_LOG_COLOR_CODE_WHITE "\x1B[1;37m" - -static const char * severity_names[] = { - NULL, - "error", - "warning", - "info", - "debug" -}; - -static const char * m_colors[] = { - NRF_LOG_COLOR_CODE_DEFAULT, - NRF_LOG_COLOR_CODE_BLACK, - NRF_LOG_COLOR_CODE_RED, - NRF_LOG_COLOR_CODE_GREEN, - NRF_LOG_COLOR_CODE_YELLOW, - NRF_LOG_COLOR_CODE_BLUE, - NRF_LOG_COLOR_CODE_MAGENTA, - NRF_LOG_COLOR_CODE_CYAN, - NRF_LOG_COLOR_CODE_WHITE, -}; - -static void prefix_process(nrf_log_str_formatter_entry_params_t * p_params, - nrf_fprintf_ctx_t * p_ctx) -{ - if (!(p_params->raw)) - { - if (p_params->use_colors) - { - nrf_fprintf(p_ctx, "%s", - m_colors[nrf_log_color_id_get( p_params->module_id, p_params->severity)]); - } - - if (NRF_LOG_USES_TIMESTAMP) - { - nrf_fprintf(p_ctx, "[%08lu] ", p_params->timestamp); - } - - nrf_fprintf(p_ctx, "<%s> %s: ", - severity_names[p_params->severity], nrf_log_module_name_get(p_params->module_id, false)); - } -} - -static void postfix_process(nrf_log_str_formatter_entry_params_t * p_params, - nrf_fprintf_ctx_t * p_ctx, - bool newline) -{ - if (!p_params->raw) - { - if (p_params->use_colors) - { - nrf_fprintf(p_ctx, "%s", m_colors[0]); - } - nrf_fprintf(p_ctx, "\r\n"); - } - else if (newline) - { - nrf_fprintf(p_ctx, "\r\n"); - } - nrf_fprintf_buffer_flush(p_ctx); -} - -void nrf_log_std_entry_process(char const * p_str, - uint32_t const * p_args, - uint32_t nargs, - nrf_log_str_formatter_entry_params_t * p_params, - nrf_fprintf_ctx_t * p_ctx) -{ - bool auto_flush = p_ctx->auto_flush; - p_ctx->auto_flush = false; - - prefix_process(p_params, p_ctx); - - switch (nargs) - { - case 0: - nrf_fprintf(p_ctx, p_str); - break; - case 1: - nrf_fprintf(p_ctx, p_str, p_args[0]); - break; - case 2: - nrf_fprintf(p_ctx, p_str, p_args[0], p_args[1]); - break; - case 3: - nrf_fprintf(p_ctx, p_str, p_args[0], p_args[1], p_args[2]); - break; - case 4: - nrf_fprintf(p_ctx, p_str, p_args[0], p_args[1], p_args[2], p_args[3]); - break; - case 5: - nrf_fprintf(p_ctx, p_str, p_args[0], p_args[1], p_args[2], p_args[3], p_args[4]); - break; - case 6: - nrf_fprintf(p_ctx, p_str, p_args[0], p_args[1], p_args[2], p_args[3], p_args[4], p_args[5]); - break; - - default: - break; - } - - postfix_process(p_params, p_ctx, false); - p_ctx->auto_flush = auto_flush; -} - -#define HEXDUMP_BYTES_IN_LINE 8 - -void nrf_log_hexdump_entry_process(uint8_t * p_data, - uint32_t data_len, - nrf_log_str_formatter_entry_params_t * p_params, - nrf_fprintf_ctx_t * p_ctx) -{ - if (data_len > HEXDUMP_BYTES_IN_LINE) - { - return; - } - bool auto_flush = p_ctx->auto_flush; - p_ctx->auto_flush = false; - - prefix_process(p_params, p_ctx); - - uint32_t i; - - for (i = 0; i < HEXDUMP_BYTES_IN_LINE; i++) - { - if (i < data_len) - { - nrf_fprintf(p_ctx, " %02x", p_data[i]); - } - else - { - nrf_fprintf(p_ctx, " "); - } - } - nrf_fprintf(p_ctx, "|"); - - for (i = 0; i < HEXDUMP_BYTES_IN_LINE; i++) - { - if (i < data_len) - { - char c = (char)p_data[i]; - nrf_fprintf(p_ctx, "%c", isprint((int)c) ? c :'.'); - } - else - { - nrf_fprintf(p_ctx, " "); - } - } - - postfix_process(p_params, p_ctx, true); - - p_ctx->auto_flush = auto_flush; -} -#endif //NRF_LOG_ENABLED diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_memobj/nrf_memobj.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_memobj/nrf_memobj.c deleted file mode 100644 index 4d7deef0850..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_memobj/nrf_memobj.c +++ /dev/null @@ -1,231 +0,0 @@ -/** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "nrf_memobj.h" -#include "nrf_atomic.h" -#include "nrf_assert.h" - -typedef struct memobj_elem_s memobj_elem_t; - -typedef struct -{ - memobj_elem_t * p_next; -} memobj_header_t; - -typedef struct -{ - uint8_t user_cnt; - uint8_t chunk_cnt; - uint16_t chunk_size; -} memobj_head_header_fields_t; - -typedef struct -{ - union - { - nrf_atomic_u32_t atomic_user_cnt; - memobj_head_header_fields_t fields; - } data; -} memobj_head_header_t; - -typedef struct -{ - memobj_header_t header; - memobj_head_header_t head_header; - uint8_t data[1]; -} memobj_head_t; - -STATIC_ASSERT(sizeof(memobj_header_t) == NRF_MEMOBJ_STD_HEADER_SIZE); - -struct memobj_elem_s -{ - memobj_header_t header; - uint8_t data[1]; -}; - -ret_code_t nrf_memobj_pool_init(nrf_memobj_pool_t const * p_pool) -{ - return nrf_balloc_init((nrf_balloc_t const *)p_pool); -} - -nrf_memobj_t * nrf_memobj_alloc(nrf_memobj_pool_t const * p_pool, - size_t size) -{ - uint32_t bsize = (uint32_t)NRF_BALLOC_ELEMENT_SIZE((nrf_balloc_t const *)p_pool) - sizeof(memobj_header_t); - uint8_t num_of_chunks = (uint8_t)CEIL_DIV(size + sizeof(memobj_head_header_t), bsize); - - memobj_head_t * p_head = nrf_balloc_alloc((nrf_balloc_t const *)p_pool); - if (p_head == NULL) - { - return NULL; - } - p_head->head_header.data.fields.user_cnt = 0; - p_head->head_header.data.fields.chunk_cnt = 1; - p_head->head_header.data.fields.chunk_size = bsize; - - memobj_header_t * p_prev = (memobj_header_t *)p_head; - memobj_header_t * p_curr; - uint32_t i; - uint32_t chunk_less1 = (uint32_t)num_of_chunks - 1; - - p_prev->p_next = (memobj_elem_t *)p_pool; - for (i = 0; i < chunk_less1; i++) - { - p_curr = (memobj_header_t *)nrf_balloc_alloc((nrf_balloc_t const *)p_pool); - if (p_curr) - { - (p_head->head_header.data.fields.chunk_cnt)++; - p_prev->p_next = (memobj_elem_t *)p_curr; - p_curr->p_next = (memobj_elem_t *)p_pool; - p_prev = p_curr; - } - else - { - //Couldn't allocate all requested buffers - nrf_memobj_free((nrf_memobj_t *)p_head); - return NULL; - } - } - return (nrf_memobj_t *)p_head; -} - -void nrf_memobj_free(nrf_memobj_t * p_obj) -{ - memobj_head_t * p_head = (memobj_head_t *)p_obj; - uint8_t chunk_cnt = p_head->head_header.data.fields.chunk_cnt; - uint32_t i; - memobj_header_t * p_curr = (memobj_header_t *)p_obj; - memobj_header_t * p_next; - uint32_t chunk_less1 = (uint32_t)chunk_cnt - 1; - - for (i = 0; i < chunk_less1; i++) - { - p_curr = (memobj_header_t *)p_curr->p_next; - } - nrf_balloc_t const * p_pool2 = (nrf_balloc_t const *)p_curr->p_next; - - p_curr = (memobj_header_t *)p_obj; - for (i = 0; i < chunk_cnt; i++) - { - p_next = (memobj_header_t *)p_curr->p_next; - nrf_balloc_free(p_pool2, p_curr); - p_curr = p_next; - } -} - -void nrf_memobj_get(nrf_memobj_t const * p_obj) -{ - memobj_head_t * p_head = (memobj_head_t *)p_obj; - (void)nrf_atomic_u32_add(&p_head->head_header.data.atomic_user_cnt, 1); -} - -void nrf_memobj_put(nrf_memobj_t * p_obj) -{ - memobj_head_t * p_head = (memobj_head_t *)p_obj; - uint32_t user_cnt = nrf_atomic_u32_sub(&p_head->head_header.data.atomic_user_cnt, 1); - memobj_head_header_fields_t * p_fields = (memobj_head_header_fields_t *)&user_cnt; - if (p_fields->user_cnt == 0) - { - nrf_memobj_free(p_obj); - } -} - -static void memobj_op(nrf_memobj_t * p_obj, - void * p_data, - uint32_t len, - uint32_t offset, - bool read) -{ - - memobj_head_t * p_head = (memobj_head_t *)p_obj; - uint32_t space_in_chunk = p_head->head_header.data.fields.chunk_size; - memobj_elem_t * p_curr_chunk = (memobj_elem_t *)p_obj; - uint32_t chunk_idx = (offset + sizeof(memobj_head_header_fields_t))/space_in_chunk; - uint32_t chunk_offset = (offset + sizeof(memobj_head_header_fields_t)) % space_in_chunk; - - uint8_t chunks_expected = CEIL_DIV((offset + sizeof(memobj_head_header_fields_t) + len), - space_in_chunk); - UNUSED_VARIABLE(chunks_expected); - ASSERT(p_head->head_header.data.fields.chunk_cnt >= chunks_expected); - - while (chunk_idx > 0) - { - p_curr_chunk = p_curr_chunk->header.p_next; - chunk_idx--; - } - - uint32_t src_offset = 0; - uint32_t curr_cpy_size = space_in_chunk-chunk_offset; - curr_cpy_size = curr_cpy_size > len ? len : curr_cpy_size; - - while (len) - { - if (read) - { - memcpy(&((uint8_t *)p_data)[src_offset], &p_curr_chunk->data[chunk_offset], curr_cpy_size); - } - else - { - memcpy(&p_curr_chunk->data[chunk_offset], &((uint8_t *)p_data)[src_offset], curr_cpy_size); - } - chunk_offset = 0; - p_curr_chunk = p_curr_chunk->header.p_next; - len -= curr_cpy_size; - src_offset += curr_cpy_size; - curr_cpy_size = (space_in_chunk > len) ? len : space_in_chunk; - } -} - -void nrf_memobj_write(nrf_memobj_t * p_obj, - void * p_data, - uint32_t len, - uint32_t offset) -{ - - memobj_op(p_obj, p_data, len, offset, false); -} - -void nrf_memobj_read(nrf_memobj_t * p_obj, - void * p_data, - uint32_t len, - uint32_t offset) -{ - memobj_op(p_obj, p_data, len, offset, true); -} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_memobj/nrf_memobj.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_memobj/nrf_memobj.h deleted file mode 100644 index d3188d3bcf1..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_memobj/nrf_memobj.h +++ /dev/null @@ -1,198 +0,0 @@ -/** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef NRF_MEMOBJ_H -#define NRF_MEMOBJ_H - -/** -* @defgroup nrf_memobj Memory Object module -* @{ -* @ingroup app_common -* @brief Functions for controlling memory object -*/ -#include -#include -#include "sdk_errors.h" -#include "nrf_balloc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * Memory object can consist of multiple object with the same size. Each object has header and data - * part. First element in memory object is memory object head which has special header, remaining objects - * has the same header. Model of memory object is presented below. - * - * |---------------------| |---------------------| |---------------------| - * | head header (u32): | --->| std header - p_next |------->| p_memobj_pool | - * | num_of_chunks, | | |---------------------| |---------------------| - * | ref counter | | | | | | - * |---------------------| | | | | | - * | std header - p_next |-| | | .... | | - * |---------------------| | data | | data | - * | | | | | | - * | data | | | | | - * | | | | | | - * |---------------------| |---------------------| |---------------------| - * head mid_element last_element - * - * - */ -#define NRF_MEMOBJ_STD_HEADER_SIZE sizeof(uint32_t) - -/** - * @brief Macro for creating a nrf_memobj pool. - * - * Macro declares nrf_balloc object. Element in the pool contains user defined data part and - * memobj header. - */ -#define NRF_MEMOBJ_POOL_DEF(_name, _element_size, _pool_size) \ - NRF_BALLOC_DEF(_name, ((_element_size)+NRF_MEMOBJ_STD_HEADER_SIZE), (_pool_size)) - -/** - * @brief Pool of memobj. - */ -typedef nrf_balloc_t nrf_memobj_pool_t; - -/** - * @brief Memobj handle. - */ -typedef void * nrf_memobj_t; - -/** - * @brief Function for initializing the memobj pool instance. - * - * This function initializes the pool. - * - * @param[in] p_pool Pointer to the memobj pool instance structure. - * - * @return NRF_SUCCESS on success, otherwise error code. - */ -ret_code_t nrf_memobj_pool_init(nrf_memobj_pool_t const * p_pool); - -/** - * @brief Function for allocating memobj with requested size. - * - * Fixed length elements in the pool are linked together to provide amount of memory requested by - * the user. If memory object is successfully allocated then user can use memory however it is - * fragmented into multiple object so it has to be access through the API: @ref nrf_memobj_write, - * @ref nrf_memobj_read. - * - * This function initializes the pool. - * - * @param[in] p_pool Pointer to the memobj pool instance structure. - * @param[in] size Data size of requested object. - * - * @return Pointer to memory object or NULL if requested size cannot be allocated. - */ -nrf_memobj_t * nrf_memobj_alloc(nrf_memobj_pool_t const * p_pool, - size_t size); - -/** - * @brief Function for indicating that memory object is used and cannot be freed. - * - * Memory object can be shared and reused between multiple modules and this mechanism ensures that - * object is freed when no longer used by any module. Memory object has a counter which is incremented - * whenever this function is called. @ref nrf_memobj_put function decrements the counter. - * - * @param[in] p_obj Pointer to memory object. - */ -void nrf_memobj_get(nrf_memobj_t const * p_obj); - - -/** - * @brief Function for indicated that memory object is no longer used by the module and can be freed - * if no other module is using it. - * - * Memory object is returned to the pool if internal counter reaches 0 after decrementing. It means - * that no other module is needing it anymore. - * - * @note Memory object holds pointer to the pool which was used to allocate it so it does not have - * to be provided explicitly to this function. - * - * @param[in] p_obj Pointer to memory object. - */ -void nrf_memobj_put(nrf_memobj_t * p_obj); - - -/** - * @brief Function for forcing freeing of the memory object. - * - * @note This function should be use with caution because it can lead to undefined behavior of the - * modules since modules using the memory object are not aware that it has been freed. - * - * @param[in] p_obj Pointer to memory object. - */ -void nrf_memobj_free(nrf_memobj_t * p_obj); - -/** - * @brief Function for writing data to the memory object. - * - * @param[in] p_obj Pointer to memory object. - * @param[in] p_data Pointer to data to be written to the memory object. - * @param[in] len Amount of data to be written to the memory object. - * @param[in] offset Offset. - */ -void nrf_memobj_write(nrf_memobj_t * p_obj, - void * p_data, - uint32_t len, - uint32_t offset); - -/** - * @brief Function for reading data from the memory object. - * - * @param[in] p_obj Pointer to memory object. - * @param[in] p_data Pointer to the destination buffer. - * @param[in] len Amount of data to be read from the memory object. - * @param[in] offset Offset. - */ -void nrf_memobj_read(nrf_memobj_t * p_obj, - void * p_data, - uint32_t len, - uint32_t offset); - -#ifdef __cplusplus -} -#endif - -#endif //NRF_MEMOBJ_H - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_section_vars/nrf_section.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_section_vars/nrf_section.h deleted file mode 100644 index 83753e7ea6e..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_section_vars/nrf_section.h +++ /dev/null @@ -1,191 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_SECTION_H__ -#define NRF_SECTION_H__ - -#include "nordic_common.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup section_vars Section variables - * @ingroup app_common - * @{ - * - * @brief Section variables. - */ - -//lint -save -e27 -esym(526,*) - -#if defined(__ICCARM__) -// Enable IAR language extensions -#pragma language=extended -#endif - -/**@brief Macro for obtaining the address of the beginning of a section. - * - * param[in] section_name Name of the section. - * @hideinitializer - */ -#if defined(__ARMCC_VERSION) -#define NRF_SECTION_START_ADDR(section_name) &CONCAT_2(section_name, $$Base) - -#elif defined(__GNUC__) -#define NRF_SECTION_START_ADDR(section_name) &CONCAT_2(__start_, section_name) - -#elif defined(__ICCARM__) -#define NRF_SECTION_START_ADDR(section_name) __section_begin(STRINGIFY(section_name)) -#endif - - -/**@brief Macro for obtaining the address of the end of a section. - * - * @param[in] section_name Name of the section. - * @hideinitializer - */ -#if defined(__ARMCC_VERSION) -#define NRF_SECTION_END_ADDR(section_name) &CONCAT_2(section_name, $$Limit) - -#elif defined(__GNUC__) -#define NRF_SECTION_END_ADDR(section_name) &CONCAT_2(__stop_, section_name) - -#elif defined(__ICCARM__) -#define NRF_SECTION_END_ADDR(section_name) __section_end(STRINGIFY(section_name)) -#endif - - -/**@brief Macro for retrieving the length of a given section, in bytes. - * - * @param[in] section_name Name of the section. - * @hideinitializer - */ -#define NRF_SECTION_LENGTH(section_name) \ - ((size_t)NRF_SECTION_END_ADDR(section_name) - \ - (size_t)NRF_SECTION_START_ADDR(section_name)) - - -/**@brief Macro for creating a section. - * - * @param[in] section_name Name of the section. - * @param[in] data_type Data type of the variables to be registered in the section. - * - * @warning Data type must be word aligned to prevent padding. - * @hideinitializer - */ -#if defined(__ARMCC_VERSION) -#define NRF_SECTION_DEF(section_name, data_type) \ - extern data_type * CONCAT_2(section_name, $$Base); \ - extern void * CONCAT_2(section_name, $$Limit) - -#elif defined(__GNUC__) -#define NRF_SECTION_DEF(section_name, data_type) \ - extern data_type * CONCAT_2(__start_, section_name); \ - extern void * CONCAT_2(__stop_, section_name) - -#elif defined(__ICCARM__) -#define NRF_SECTION_DEF(section_name, data_type) \ - _Pragma(STRINGIFY(section = STRINGIFY(section_name))); - -#endif - - -/**@brief Macro for declaring a variable and registering it in a section. - * - * @details Declares a variable and registers it in a named section. This macro ensures that the - * variable is not stripped away when using optimizations. - * - * @note The order in which variables are placed in a section is dependent on the order in - * which the linker script encounters the variables during linking. - * - * @param[in] section_name Name of the section. - * @param[in] section_var Variable to register in the given section. - * @hideinitializer - */ -#if defined(__ARMCC_VERSION) -#define NRF_SECTION_ITEM_REGISTER(section_name, section_var) \ - section_var __attribute__ ((section(STRINGIFY(section_name)))) __attribute__((used)) - -#elif defined(__GNUC__) -#define NRF_SECTION_ITEM_REGISTER(section_name, section_var) \ - section_var __attribute__ ((section("." STRINGIFY(section_name)))) __attribute__((used)) - -#elif defined(__ICCARM__) -#define NRF_SECTION_ITEM_REGISTER(section_name, section_var) \ - __root section_var @ STRINGIFY(section_name) -#endif - - -/**@brief Macro for retrieving a variable from a section. - * - * @warning The stored symbol can only be resolved using this macro if the - * type of the data is word aligned. The operation of acquiring - * the stored symbol relies on the size of the stored type. No - * padding can exist in the named section in between individual - * stored items or this macro will fail. - * - * @param[in] section_name Name of the section. - * @param[in] data_type Data type of the variable. - * @param[in] i Index of the variable in section. - * @hideinitializer - */ -#define NRF_SECTION_ITEM_GET(section_name, data_type, i) \ - ((data_type*)NRF_SECTION_START_ADDR(section_name) + (i)) - - -/**@brief Macro for getting the number of variables in a section. - * - * @param[in] section_name Name of the section. - * @param[in] data_type Data type of the variables in the section. - * @hideinitializer - */ -#define NRF_SECTION_ITEM_COUNT(section_name, data_type) \ - NRF_SECTION_LENGTH(section_name) / sizeof(data_type) - -/** @} */ - -//lint -restore - -#ifdef __cplusplus -} -#endif - -#endif // NRF_SECTION_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_section_vars/nrf_section_iter.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_section_vars/nrf_section_iter.c deleted file mode 100644 index e54535cc699..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_section_vars/nrf_section_iter.c +++ /dev/null @@ -1,125 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "sdk_common.h" - -#if NRF_MODULE_ENABLED(NRF_SECTION_ITER) - -#include "nrf_section_iter.h" - - -#if !defined(__GNUC__) || defined(__CC_ARM) -static void nrf_section_iter_item_set(nrf_section_iter_t * p_iter) -{ - ASSERT(p_iter != NULL); - ASSERT(p_iter->p_set != NULL); - ASSERT(p_iter->p_section != NULL); - - while (true) - { - if (p_iter->p_section == p_iter->p_set->p_last) - { - // End of the section set. - p_iter->p_item = NULL; - return; - } - - if (p_iter->p_section->p_start != p_iter->p_section->p_end) - { - // Not empty section. - p_iter->p_item = p_iter->p_section->p_start; - return; - } - - // Next section. - p_iter->p_section++; - } -} -#endif - - -void nrf_section_iter_init(nrf_section_iter_t * p_iter, nrf_section_set_t const * p_set) -{ - ASSERT(p_iter != NULL); - ASSERT(p_set != NULL); - - p_iter->p_set = p_set; - -#if defined(__GNUC__) && !defined(__CC_ARM) - p_iter->p_item = p_iter->p_set->section.p_start; - if (p_iter->p_item == p_iter->p_set->section.p_end) - { - p_iter->p_item = NULL; - } -#else - p_iter->p_section = p_set->p_first; - nrf_section_iter_item_set(p_iter); -#endif -} - -void nrf_section_iter_next(nrf_section_iter_t * p_iter) -{ - ASSERT(p_iter != NULL); - ASSERT(p_iter->p_set != NULL); - - if (p_iter->p_item == NULL) - { - return; - } - - p_iter->p_item = (void *)((size_t)(p_iter->p_item) + p_iter->p_set->item_size); - -#if defined(__GNUC__) && !defined(__CC_ARM) - if (p_iter->p_item == p_iter->p_set->section.p_end) - { - p_iter->p_item = NULL; - } -#else - ASSERT(p_iter->p_section != NULL); - // End of current section reached? - if (p_iter->p_item == p_iter->p_section->p_end) - { - p_iter->p_section++; - nrf_section_iter_item_set(p_iter); - } -#endif -} - -#endif // NRF_MODULE_ENABLED(NRF_SECTION_ITER) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_section_vars/nrf_section_iter.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_section_vars/nrf_section_iter.h deleted file mode 100644 index 60cf0f6669b..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/experimental_section_vars/nrf_section_iter.h +++ /dev/null @@ -1,206 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef NRF_SECTION_ITER_H__ -#define NRF_SECTION_ITER_H__ - -#include -#include "nrf_section.h" -#include "nrf_assert.h" -#include "app_util.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -/** - * @defgroup nrf_section_iter Section variables iterator - * @ingroup app_common - * @{ - */ - -/**@brief Single section description structure. */ -typedef struct -{ - void * p_start; //!< Pointer to the start of section. - void * p_end; //!< Pointer to the end of section. -} nrf_section_t; - - -/**@brief Set of the sections description structure. */ -typedef struct -{ -#if defined(__GNUC__) && !defined(__CC_ARM) - nrf_section_t section; //!< Description of the set of sections. - /**< - * In case of GCC all sections in the set are sorted and - * placed in contiguous area, because they are treated as - * one section. - */ -#else - nrf_section_t const * p_first; //!< Pointer to the first section in the set. - nrf_section_t const * p_last; //!< Pointer to the last section in the set. -#endif - size_t item_size; //!< Size of the single item in the section. -} nrf_section_set_t; - - -/**@brief Section iterator structure. */ -typedef struct -{ - nrf_section_set_t const * p_set; //!< Pointer to the appropriate section set. -#if !defined(__GNUC__) || defined(__ARMCC_VERSION) - nrf_section_t const * p_section; //!< Pointer to the selected section. - /**< - * In case of GCC all sections in the set are sorted and - * placed in contiguous area, because they are treated - * as one section. - */ -#endif - void * p_item; //!< Pointer to the selected item in the section. -} nrf_section_iter_t; - - -/**@brief Create a set of sections. - * - * @note This macro reserves memory for the given set of sections. - * - * @details A set of sections, is an ordered collections of sections. - * - * @param[in] _name Name of the set. - * @param[in] _type Type of the elements stored in the sections. - * @param[in] _count Number of the sections in the set. This parameter is ignored in case of GCC. - * @hideinitializer - */ -#if defined(__GNUC__) && !defined(__CC_ARM) - -#define NRF_SECTION_SET_DEF(_name, _type, _count) \ - \ - NRF_SECTION_DEF(_name, _type); \ - static nrf_section_set_t const _name = \ - { \ - .section = \ - { \ - .p_start = NRF_SECTION_START_ADDR(_name), \ - .p_end = NRF_SECTION_END_ADDR(_name), \ - }, \ - .item_size = sizeof(_type), \ - } - -#else - -#define NRF_SECTION_SET_DEF(_name, _type, _count) \ -/*lint -save -emacro(14, MACRO_REPEAT_FOR*) */ \ -MACRO_REPEAT_FOR(_count, NRF_SECTION_DEF_, _name, _type) \ -static nrf_section_t const CONCAT_2(_name, _array)[] = \ -{ \ - MACRO_REPEAT_FOR(_count, NRF_SECTION_SET_DEF_, _name) \ -}; \ -/*lint -restore */ \ -static nrf_section_set_t const _name = \ -{ \ - .p_first = CONCAT_2(_name, _array), \ - .p_last = CONCAT_2(_name, _array) + ARRAY_SIZE(CONCAT_2(_name, _array)), \ - .item_size = sizeof(_type), \ -} - -#ifndef DOXYGEN -#define NRF_SECTION_DEF_(_priority, _name, _type) \ -NRF_SECTION_DEF(CONCAT_2(_name, _priority), _type); - -#define NRF_SECTION_SET_DEF_(_priority, _name) \ -{ \ - .p_start = NRF_SECTION_START_ADDR(CONCAT_2(_name, _priority)), \ - .p_end = NRF_SECTION_END_ADDR(CONCAT_2(_name, _priority)), \ -}, -#endif // DOXYGEN -#endif // __GNUC__ - - -/**@brief Macro to declare a variable and register it in the section set. - * - * @note The order of the section in the set is based on the priority. The order with which - * variables are placed in a section is dependant on the order with which the linker - * encouters the variables during linking. - * - * @param[in] _name Name of the section set. - * @param[in] _priority Priority of the desired section. - * @param[in] _var The variable to register in the given section. - * @hideinitializer - */ -#define NRF_SECTION_SET_ITEM_REGISTER(_name, _priority, _var) \ - NRF_SECTION_ITEM_REGISTER(CONCAT_2(_name, _priority), _var) - - -/**@brief Function for initializing the section set iterator. - * - * @param[in] p_iter Pointer to the iterator. - * @param[in] p_set Pointer to the sections set. - */ -void nrf_section_iter_init(nrf_section_iter_t * p_iter, nrf_section_set_t const * p_set); - - -/**@brief Function for incrementing iterator. - * - * @param[in] p_iter Pointer to the iterator. - */ -void nrf_section_iter_next(nrf_section_iter_t * p_iter); - - -/**@brief Function for getting the element pointed to by the iterator. - * - * @param[in] p_iter Pointer to the iterator. - * - * @retval Pointer to the element or NULL if iterator points end of the set. - */ -static inline void * nrf_section_iter_get(nrf_section_iter_t const * p_iter) -{ - ASSERT(p_iter); - return p_iter->p_item; -} - -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif // NRF_SECTION_ITER_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/fds/fds.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/fds/fds.c deleted file mode 100644 index 995af78fa88..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/fds/fds.c +++ /dev/null @@ -1,2159 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(FDS) -#include "fds.h" -#include "fds_internal_defs.h" - -#include -#include -#include -#include "nrf_error.h" -#include "nrf_atomic.h" -#include "nrf_atfifo.h" - -#include "nrf_fstorage.h" -#if (FDS_BACKEND == NRF_FSTORAGE_SD) -#include "nrf_fstorage_sd.h" -#elif (FDS_BACKEND == NRF_FSTORAGE_NVMC) -#include "nrf_fstorage_nvmc.h" -#else -#error Invalid FDS backend. -#endif - -#if (FDS_CRC_CHECK_ON_READ) -#include "crc16.h" -#endif - - -static void fs_event_handler(nrf_fstorage_evt_t * evt); - -NRF_FSTORAGE_DEF(nrf_fstorage_t m_fs) = -{ - // The flash area boundaries are set in fds_init(). - .evt_handler = fs_event_handler, -}; - -// Internal status flags. -static struct -{ - bool volatile initialized; - nrf_atomic_flag_t initializing; -} m_flags; - -// The number of queued operations. -// Incremented by queue_start() and decremented by queue_has_next(). -static nrf_atomic_u32_t m_queued_op_cnt; - -// The number of registered users and their callback functions. -static nrf_atomic_u32_t m_users; -static fds_cb_t m_cb_table[FDS_MAX_USERS]; - -// The latest (largest) record ID written so far. -static nrf_atomic_u32_t m_latest_rec_id; - -// Queue of fds operations. -NRF_ATFIFO_DEF(m_queue, fds_op_t, FDS_OP_QUEUE_SIZE); - -// Structures used to hold informations about virtual pages. -static fds_page_t m_pages[FDS_DATA_PAGES]; -static fds_swap_page_t m_swap_page; - -// Garbage collection data. -static fds_gc_data_t m_gc; - - -static void event_send(fds_evt_t const * const p_evt) -{ - for (uint32_t user = 0; user < FDS_MAX_USERS; user++) - { - if (m_cb_table[user] != NULL) - { - m_cb_table[user](p_evt); - } - } -} - - -static void event_prepare(fds_op_t const * const p_op, fds_evt_t * const p_evt) -{ - switch (p_op->op_code) - { - case FDS_OP_INIT: - p_evt->id = FDS_EVT_INIT; - break; - - case FDS_OP_WRITE: - p_evt->id = FDS_EVT_WRITE; - p_evt->write.file_id = p_op->write.header.file_id; - p_evt->write.record_key = p_op->write.header.record_key; - p_evt->write.record_id = p_op->write.header.record_id; - p_evt->write.is_record_updated = 0; - break; - - case FDS_OP_UPDATE: - p_evt->id = FDS_EVT_UPDATE; - p_evt->write.file_id = p_op->write.header.file_id; - p_evt->write.record_key = p_op->write.header.record_key; - p_evt->write.record_id = p_op->write.header.record_id; - p_evt->write.is_record_updated = (p_op->write.step == FDS_OP_WRITE_DONE); - break; - - case FDS_OP_DEL_RECORD: - p_evt->id = FDS_EVT_DEL_RECORD; - p_evt->del.file_id = p_op->del.file_id; - p_evt->del.record_key = p_op->del.record_key; - p_evt->del.record_id = p_op->del.record_to_delete; - break; - - case FDS_OP_DEL_FILE: - p_evt->id = FDS_EVT_DEL_FILE; - p_evt->del.file_id = p_op->del.file_id; - p_evt->del.record_key = FDS_RECORD_KEY_DIRTY; - p_evt->del.record_id = 0; - break; - - case FDS_OP_GC: - p_evt->id = FDS_EVT_GC; - break; - - default: - // Should not happen. - break; - } -} - - -static bool header_has_next(fds_header_t const * p_hdr, uint32_t const * p_page_end) -{ - uint32_t const * const p_hdr32 = (uint32_t*)p_hdr; - return ( ( p_hdr32 < p_page_end) - && (*p_hdr32 != FDS_ERASED_WORD)); // Check last to be on the safe side (dereference) -} - - -// Jump to the next header. -static fds_header_t const * header_jump(fds_header_t const * const p_hdr) -{ - return (fds_header_t*)((uint32_t*)p_hdr + FDS_HEADER_SIZE + p_hdr->length_words); -} - - -static fds_header_status_t header_check(fds_header_t const * p_hdr, uint32_t const * p_page_end) -{ - if (((uint32_t*)header_jump(p_hdr) > p_page_end)) - { - // The length field would jump across the page boundary. - // FDS won't allow writing such a header, therefore it has been corrupted. - return FDS_HEADER_CORRUPT; - } - - if ( (p_hdr->file_id == FDS_FILE_ID_INVALID) - || (p_hdr->record_key == FDS_RECORD_KEY_DIRTY)) - { - return FDS_HEADER_DIRTY; - } - - return FDS_HEADER_VALID; -} - - -static bool address_is_valid(uint32_t const * const p_addr) -{ - return ((p_addr != NULL) && - (p_addr >= (uint32_t*)m_fs.start_addr) && - (p_addr <= (uint32_t*)m_fs.end_addr) && - (is_word_aligned(p_addr))); -} - - -// Reads a page tag, and determines if the page is used to store data or as swap. -static fds_page_type_t page_identify(uint32_t const * const p_page_addr) -{ - if ( (p_page_addr == NULL) // Should never happen. - || (p_page_addr[FDS_PAGE_TAG_WORD_0] != FDS_PAGE_TAG_MAGIC)) - { - return FDS_PAGE_UNDEFINED; - } - - switch (p_page_addr[FDS_PAGE_TAG_WORD_1]) - { - case FDS_PAGE_TAG_SWAP: - return FDS_PAGE_SWAP; - - case FDS_PAGE_TAG_DATA: - return FDS_PAGE_DATA; - - default: - return FDS_PAGE_UNDEFINED; - } -} - - -static bool page_is_erased(uint32_t const * const p_page_addr) -{ - for (uint32_t i = 0; i < FDS_PAGE_SIZE; i++) - { - if (*(p_page_addr + i) != FDS_ERASED_WORD) - { - return false; - } - } - - return true; -} - - -// NOTE: Must be called from within a critical section. -static bool page_has_space(uint16_t page, uint16_t length_words) -{ - length_words += m_pages[page].write_offset; - length_words += m_pages[page].words_reserved; - return (length_words < FDS_PAGE_SIZE); -} - - -// Given a pointer to a record, find the index of the page on which it is stored. -// Returns FDS_SUCCESS if the page is found, FDS_ERR_NOT_FOUND otherwise. -static ret_code_t page_from_record(uint16_t * const p_page, uint32_t const * const p_rec) -{ - ret_code_t ret = FDS_ERR_NOT_FOUND; - - CRITICAL_SECTION_ENTER(); - for (uint16_t i = 0; i < FDS_DATA_PAGES; i++) - { - if ((p_rec > m_pages[i].p_addr) && - (p_rec < m_pages[i].p_addr + FDS_PAGE_SIZE)) - { - ret = FDS_SUCCESS; - *p_page = i; - break; - } - } - CRITICAL_SECTION_EXIT(); - - return ret; -} - - -// Scan a page to determine how many words have been written to it. -// This information is used to set the page write offset during initialization. -// Additionally, this function updates the latest record ID as it proceeds. -// If an invalid record header is found, the can_gc argument is set to true. -static void page_scan(uint32_t const * p_addr, - uint16_t * const words_written, - bool * const can_gc) -{ - uint32_t const * const p_page_end = p_addr + FDS_PAGE_SIZE; - - p_addr += FDS_PAGE_TAG_SIZE; - *words_written = FDS_PAGE_TAG_SIZE; - - fds_header_t const * p_header = (fds_header_t*)p_addr; - - while (header_has_next(p_header, p_page_end)) - { - fds_header_status_t hdr = header_check(p_header, p_page_end); - - if (hdr == FDS_HEADER_VALID) - { - // Update the latest (largest) record ID. - if (p_header->record_id > m_latest_rec_id) - { - m_latest_rec_id = p_header->record_id; - } - } - else - { - if (can_gc != NULL) - { - *can_gc = true; - } - - if (hdr == FDS_HEADER_CORRUPT) - { - // It could happen that a record has a corrupt header which would set a - // wrong offset for this page. In such cases, update this value to its maximum, - // to ensure that no new records will be written to this page and to enable - // correct statistics reporting by fds_stat(). - *words_written = FDS_PAGE_SIZE; - - // We can't continue to scan this page. - return; - } - } - - *words_written += (FDS_HEADER_SIZE + p_header->length_words); - p_header = header_jump(p_header); - } -} - - -static void page_offsets_update(fds_page_t * const p_page, uint16_t length_words) -{ - p_page->write_offset += (FDS_HEADER_SIZE + length_words); - p_page->words_reserved -= (FDS_HEADER_SIZE + length_words); -} - - -// Tags a page as swap, i.e., reserved for GC. -static ret_code_t page_tag_write_swap(void) -{ - // The tag needs to be statically allocated since it is not buffered by fstorage. - static uint32_t const page_tag_swap[] = {FDS_PAGE_TAG_MAGIC, FDS_PAGE_TAG_SWAP}; - return nrf_fstorage_write(&m_fs, (uint32_t)m_swap_page.p_addr, page_tag_swap, FDS_PAGE_TAG_SIZE * sizeof(uint32_t), NULL); -} - - -// Tags a page as data, i.e, ready for storage. -static ret_code_t page_tag_write_data(uint32_t const * const p_page_addr) -{ - // The tag needs to be statically allocated since it is not buffered by fstorage. - static uint32_t const page_tag_data[] = {FDS_PAGE_TAG_MAGIC, FDS_PAGE_TAG_DATA}; - return nrf_fstorage_write(&m_fs, (uint32_t)p_page_addr, page_tag_data, FDS_PAGE_TAG_SIZE * sizeof(uint32_t), NULL); -} - - -// Reserve space on a page. -// NOTE: this function takes into the account the space required for the record header. -static ret_code_t write_space_reserve(uint16_t length_words, uint16_t * p_page) -{ - bool space_reserved = false; - uint16_t const total_len_words = length_words + FDS_HEADER_SIZE; - - if (total_len_words >= FDS_PAGE_SIZE - FDS_PAGE_TAG_SIZE) - { - return FDS_ERR_RECORD_TOO_LARGE; - } - - CRITICAL_SECTION_ENTER(); - for (uint16_t page = 0; page < FDS_DATA_PAGES; page++) - { - if ((m_pages[page].page_type == FDS_PAGE_DATA) && - (page_has_space(page, total_len_words))) - { - space_reserved = true; - *p_page = page; - - m_pages[page].words_reserved += total_len_words; - break; - } - } - CRITICAL_SECTION_EXIT(); - - return (space_reserved) ? FDS_SUCCESS : FDS_ERR_NO_SPACE_IN_FLASH; -} - - -// Undo a write_space_reserve() call. -// NOTE: Must be called within a critical section. -static void write_space_free(uint16_t length_words, uint16_t page) -{ - m_pages[page].words_reserved -= (length_words + FDS_HEADER_SIZE); -} - - -static uint32_t record_id_new(void) -{ - return nrf_atomic_u32_add(&m_latest_rec_id, 1); -} - - -// Given a page and a record, find the next valid record on that page. -// If p_record is NULL, search from the beginning of the page, -// otherwise, resume searching from p_record. -// Return true if a record is found, false otherwise. -// If no record is found, p_record is unchanged. -static bool record_find_next(uint16_t page, uint32_t const ** p_record) -{ - uint32_t const * p_page_end = (m_pages[page].p_addr + FDS_PAGE_SIZE); - - // If this is the first call on this page, start searching from its beginning. - // Otherwise, jump to the next record. - fds_header_t const * p_header = (fds_header_t*)(*p_record); - - if (p_header != NULL) - { - p_header = header_jump(p_header); - } - else - { - p_header = (fds_header_t*)(m_pages[page].p_addr + FDS_PAGE_TAG_SIZE); - } - - // Read records from the page until: - // - a valid record is found or - // - the last record on a page is found - - while (header_has_next(p_header, p_page_end)) - { - switch (header_check(p_header, p_page_end)) - { - case FDS_HEADER_VALID: - *p_record = (uint32_t*)p_header; - return true; - - case FDS_HEADER_DIRTY: - p_header = header_jump(p_header); - break; - - case FDS_HEADER_CORRUPT: - // We can't reliably jump over this record. - // There is nothing more we can do on this page. - return false; - } - } - - // No more valid records on this page. - return false; -} - - -// Find a record given its descriptor and retrive the page in which the record is stored. -// NOTE: Do not pass NULL as an argument for p_page. -static bool record_find_by_desc(fds_record_desc_t * const p_desc, uint16_t * const p_page) -{ - // If the gc_run_count field in the descriptor matches our counter, then the record has - // not been moved. If the address is valid, and the record ID matches, there is no need - // to find the record again. Only lookup the page in which the record is stored. - - if ((address_is_valid(p_desc->p_record)) && - (p_desc->gc_run_count == m_gc.run_count) && - (p_desc->record_id == ((fds_header_t*)p_desc->p_record)->record_id)) - { - return (page_from_record(p_page, p_desc->p_record) == FDS_SUCCESS); - } - - // Otherwise, find the record in flash. - for (*p_page = 0; *p_page < FDS_DATA_PAGES; (*p_page)++) - { - // Set p_record to NULL to make record_find_next() search from the beginning of the page. - uint32_t const * p_record = NULL; - - while (record_find_next(*p_page, &p_record)) - { - fds_header_t const * const p_header = (fds_header_t*)p_record; - if (p_header->record_id == p_desc->record_id) - { - p_desc->p_record = p_record; - p_desc->gc_run_count = m_gc.run_count; - return true; - } - } - } - - return false; -} - - -// Search for a record and return its descriptor. -// If p_file_id is NULL, only the record key will be used for matching. -// If p_record_key is NULL, only the file ID will be used for matching. -// If both are NULL, it will iterate through all records. -static ret_code_t record_find(uint16_t const * p_file_id, - uint16_t const * p_record_key, - fds_record_desc_t * p_desc, - fds_find_token_t * p_token) -{ - if (!m_flags.initialized) - { - return FDS_ERR_NOT_INITIALIZED; - } - - if (p_desc == NULL || p_token == NULL) - { - return FDS_ERR_NULL_ARG; - } - - // Begin (or resume) searching for a record. - for (; p_token->page < FDS_DATA_PAGES; p_token->page++) - { - if (m_pages[p_token->page].page_type != FDS_PAGE_DATA) - { - // It might be that the page is FDS_PAGE_UNDEFINED. - // Skip this page. - continue; - } - - while (record_find_next(p_token->page, &p_token->p_addr)) - { - fds_header_t const * p_header = (fds_header_t*)p_token->p_addr; - - // A valid record was found, check its header for a match. - if ((p_file_id != NULL) && - (p_header->file_id != *p_file_id)) - { - continue; - } - - if ((p_record_key != NULL) && - (p_header->record_key != *p_record_key)) - { - continue; - } - - // Record found; update the descriptor. - p_desc->record_id = p_header->record_id; - p_desc->p_record = p_token->p_addr; - p_desc->gc_run_count = m_gc.run_count; - - return FDS_SUCCESS; - } - - // We have scanned an entire page. Set the address in the token to NULL - // so that it will be updated in the next iteration. - p_token->p_addr = NULL; - } - - return FDS_ERR_NOT_FOUND; -} - - -// Retrieve statistics about dirty records on a page. -static void records_stat(uint16_t page, - uint16_t * p_valid_records, - uint16_t * p_dirty_records, - uint16_t * p_freeable_words, - bool * p_corruption) -{ - fds_header_t const * p_header = (fds_header_t*)(m_pages[page].p_addr + FDS_PAGE_TAG_SIZE); - uint32_t const * const p_page_end = (m_pages[page].p_addr + FDS_PAGE_SIZE); - - while (header_has_next(p_header, p_page_end)) - { - switch (header_check(p_header, p_page_end)) - { - case FDS_HEADER_DIRTY: - *p_dirty_records += 1; - *p_freeable_words += FDS_HEADER_SIZE + p_header->length_words; - p_header = header_jump(p_header); - break; - - case FDS_HEADER_VALID: - *p_valid_records += 1; - p_header = header_jump(p_header); - break; - - case FDS_HEADER_CORRUPT: - { - *p_dirty_records += 1; - *p_freeable_words += (p_page_end - (uint32_t*)p_header); - *p_corruption = true; - // We can't continue on this page. - return; - } - - default: - break; - } - } -} - - -// Get a buffer on the queue of operations. -static fds_op_t * queue_buf_get(nrf_atfifo_item_put_t * p_iput_ctx) -{ - fds_op_t * const p_op = (fds_op_t*) nrf_atfifo_item_alloc(m_queue, p_iput_ctx); - - memset(p_op, 0x00, sizeof(fds_op_t)); - return p_op; -} - - -// Commit a buffer to the queue of operations. -static void queue_buf_store(nrf_atfifo_item_put_t * p_iput_ctx) -{ - (void) nrf_atfifo_item_put(m_queue, p_iput_ctx); -} - - -// Load the next operation from the queue. -static fds_op_t * queue_load(nrf_atfifo_item_get_t * p_iget_ctx) -{ - return (fds_op_t*) nrf_atfifo_item_get(m_queue, p_iget_ctx); -} - - -// Free the currently loaded operation. -static void queue_free(nrf_atfifo_item_get_t * p_iget_ctx) -{ - // Free the current queue element. - (void) nrf_atfifo_item_free(m_queue, p_iget_ctx); -} - - -static bool queue_has_next(void) -{ - // Decrement the number of queued operations. - ASSERT(m_queued_op_cnt != 0); - return nrf_atomic_u32_sub(&m_queued_op_cnt, 1); -} - - -// This function is called during initialization to setup the page structure (m_pages) and -// provide additional information regarding eventual further initialization steps. -static fds_init_opts_t pages_init(void) -{ - uint32_t ret = NO_PAGES; - uint16_t page = 0; - uint16_t total_pages_available = FDS_VIRTUAL_PAGES; - bool swap_set_but_not_found = false; - - for (uint16_t i = 0; i < FDS_VIRTUAL_PAGES; i++) - { - uint32_t const * const p_page_addr = (uint32_t*)m_fs.start_addr + (i * FDS_PAGE_SIZE); - fds_page_type_t const page_type = page_identify(p_page_addr); - - switch (page_type) - { - case FDS_PAGE_UNDEFINED: - { - if (page_is_erased(p_page_addr)) - { - if (m_swap_page.p_addr != NULL) - { - // If a swap page is already set, flag the page as erased (in m_pages) - // and try to tag it as data (in flash) later on during initialization. - m_pages[page].page_type = FDS_PAGE_ERASED; - m_pages[page].p_addr = p_page_addr; - m_pages[page].write_offset = FDS_PAGE_TAG_SIZE; - - // This is a candidate for a potential new swap page, in case the - // current swap is going to be promoted to complete a GC instance. - m_gc.cur_page = page; - page++; - } - else - { - // If there is no swap page yet, use this one. - m_swap_page.p_addr = p_page_addr; - m_swap_page.write_offset = FDS_PAGE_TAG_SIZE; - swap_set_but_not_found = true; - } - - ret |= PAGE_ERASED; - } - else - { - // The page contains non-FDS data. - // Do not initialize or use this page. - total_pages_available--; - m_pages[page].p_addr = p_page_addr; - m_pages[page].page_type = FDS_PAGE_UNDEFINED; - page++; - } - } break; - - case FDS_PAGE_DATA: - { - m_pages[page].page_type = FDS_PAGE_DATA; - m_pages[page].p_addr = p_page_addr; - - // Scan the page to compute its write offset and determine whether or not the page - // can be garbage collected. Additionally, update the latest kwown record ID. - page_scan(p_page_addr, &m_pages[page].write_offset, &m_pages[page].can_gc); - - ret |= PAGE_DATA; - page++; - } break; - - case FDS_PAGE_SWAP: - { - if (swap_set_but_not_found) - { - m_pages[page].page_type = FDS_PAGE_ERASED; - m_pages[page].p_addr = m_swap_page.p_addr; - m_pages[page].write_offset = FDS_PAGE_TAG_SIZE; - - page++; - } - - m_swap_page.p_addr = p_page_addr; - // If the swap is promoted, this offset should be kept, otherwise, - // it should be set to FDS_PAGE_TAG_SIZE. - page_scan(p_page_addr, &m_swap_page.write_offset, NULL); - - ret |= (m_swap_page.write_offset == FDS_PAGE_TAG_SIZE) ? - PAGE_SWAP_CLEAN : PAGE_SWAP_DIRTY; - } break; - - default: - // Shouldn't happen. - break; - } - } - - if (total_pages_available < 2) - { - ret &= NO_PAGES; - } - - return (fds_init_opts_t)ret; -} - - -// Write the first part of a record header (the key and length). -static ret_code_t record_header_write_begin(fds_op_t * const p_op, uint32_t * const p_addr) -{ - ret_code_t ret; - - // Write the record ID next. - p_op->write.step = FDS_OP_WRITE_RECORD_ID; - - ret = nrf_fstorage_write(&m_fs, (uint32_t)(p_addr + FDS_OFFSET_TL), - &p_op->write.header.record_key, FDS_HEADER_SIZE_TL * sizeof(uint32_t), NULL); - - return (ret == NRF_SUCCESS) ? FDS_SUCCESS : FDS_ERR_BUSY; -} - - -static ret_code_t record_header_write_id(fds_op_t * const p_op, uint32_t * const p_addr) -{ - ret_code_t ret; - - // If this record has no data, write the last part of the header directly. - // Otherwise, write the record data next. - p_op->write.step = (p_op->write.p_data != NULL) ? - FDS_OP_WRITE_DATA : FDS_OP_WRITE_HEADER_FINALIZE; - - ret = nrf_fstorage_write(&m_fs, (uint32_t)(p_addr + FDS_OFFSET_ID), - &p_op->write.header.record_id, FDS_HEADER_SIZE_ID * sizeof(uint32_t), NULL); - - return (ret == NRF_SUCCESS) ? FDS_SUCCESS : FDS_ERR_BUSY; -} - - -static ret_code_t record_header_write_finalize(fds_op_t * const p_op, uint32_t * const p_addr) -{ - ret_code_t ret; - - // If this is a simple write operation, then this is the last step. - // If this is an update instead, delete the old record next. - p_op->write.step = (p_op->op_code == FDS_OP_UPDATE) ? - FDS_OP_WRITE_FLAG_DIRTY : FDS_OP_WRITE_DONE; - - ret = nrf_fstorage_write(&m_fs, (uint32_t)(p_addr + FDS_OFFSET_IC), - &p_op->write.header.file_id, FDS_HEADER_SIZE_IC * sizeof(uint32_t), NULL); - - return (ret == NRF_SUCCESS) ? FDS_SUCCESS : FDS_ERR_BUSY; -} - - -static ret_code_t record_header_flag_dirty(uint32_t * const p_record, uint16_t page_to_gc) -{ - // Used to flag a record as dirty, i.e. ready for garbage collection. - // Must be statically allocated since it will be written to flash. - __ALIGN(4) static uint32_t const dirty_header = {0xFFFF0000}; - - // Flag the record as dirty. - ret_code_t ret; - - ret = nrf_fstorage_write(&m_fs, (uint32_t)p_record, - &dirty_header, FDS_HEADER_SIZE_TL * sizeof(uint32_t), NULL); - - if (ret != NRF_SUCCESS) - { - return FDS_ERR_BUSY; - } - - m_pages[page_to_gc].can_gc = true; - - return FDS_SUCCESS; -} - - -static ret_code_t record_find_and_delete(fds_op_t * const p_op) -{ - ret_code_t ret; - uint16_t page; - fds_record_desc_t desc = {0}; - - desc.record_id = p_op->del.record_to_delete; - - if (record_find_by_desc(&desc, &page)) - { - fds_header_t const * const p_header = (fds_header_t const *)desc.p_record; - - // Copy the record key and file ID, so that they can be returned in the event. - // In case this function is run as part of an update, there is no need to copy - // the file ID and record key since they are present in the header stored - // in the queue element. - - p_op->del.file_id = p_header->file_id; - p_op->del.record_key = p_header->record_key; - - // Flag the record as dirty. - ret = record_header_flag_dirty((uint32_t*)desc.p_record, page); - } - else - { - // The record never existed, or it has already been deleted. - ret = FDS_ERR_NOT_FOUND; - } - - return ret; -} - - -// Finds a record within a file and flags it as dirty. -static ret_code_t file_find_and_delete(fds_op_t * const p_op) -{ - ret_code_t ret; - fds_record_desc_t desc; - - // This token must persist across calls. - static fds_find_token_t tok = {0}; - - // Pass NULL to ignore the record key. - ret = record_find(&p_op->del.file_id, NULL, &desc, &tok); - - if (ret == FDS_SUCCESS) - { - // A record was found: flag it as dirty. - ret = record_header_flag_dirty((uint32_t*)desc.p_record, tok.page); - } - else // FDS_ERR_NOT_FOUND - { - // No more records were found. Zero the token, so that it can be reused. - memset(&tok, 0x00, sizeof(fds_find_token_t)); - } - - return ret; -} - - -// Writes record data to flash. -static ret_code_t record_write_data(fds_op_t * const p_op, uint32_t * const p_addr) -{ - ret_code_t ret; - - p_op->write.step = FDS_OP_WRITE_HEADER_FINALIZE; - - ret = nrf_fstorage_write(&m_fs, (uint32_t)(p_addr + FDS_OFFSET_DATA), - p_op->write.p_data, p_op->write.header.length_words * sizeof(uint32_t), NULL); - - return (ret == NRF_SUCCESS) ? FDS_SUCCESS : FDS_ERR_BUSY; -} - - -#if (FDS_CRC_CHECK_ON_READ) -static bool crc_verify_success(uint16_t crc, uint16_t len_words, uint32_t const * const p_data) -{ - uint16_t computed_crc; - - // The CRC is computed on the entire record, except the CRC field itself. - // The record header is 12 bytes, out of these we have to skip bytes 6 to 8 where the - // CRC itself is stored. Then we compute the CRC for the rest of the record, from byte 8 of - // the header (where the record ID begins) to the end of the record data. - computed_crc = crc16_compute((uint8_t const *)p_data, 6, NULL); - computed_crc = crc16_compute((uint8_t const *)p_data + 8, - (FDS_HEADER_SIZE_ID + len_words) * sizeof(uint32_t), - &computed_crc); - - return (computed_crc == crc); -} -#endif - - -static void gc_init(void) -{ - m_gc.run_count++; - m_gc.cur_page = 0; - m_gc.resume = false; - - // Setup which pages to GC. Defer checking for open records and the can_gc flag, - // as other operations might change those while GC is running. - for (uint16_t i = 0; i < FDS_DATA_PAGES; i++) - { - m_gc.do_gc_page[i] = (m_pages[i].page_type == FDS_PAGE_DATA); - } -} - - -// Obtain the next page to be garbage collected. -// Returns true if there are pages left to garbage collect, returns false otherwise. -static bool gc_page_next(uint16_t * const p_next_page) -{ - bool ret = false; - - for (uint16_t i = 0; i < FDS_DATA_PAGES; i++) - { - if (m_gc.do_gc_page[i]) - { - // Do not attempt to GC this page again. - m_gc.do_gc_page[i] = false; - - // Only GC pages with no open records and with some records which have been deleted. - if ((m_pages[i].records_open == 0) && (m_pages[i].can_gc == true)) - { - *p_next_page = i; - ret = true; - break; - } - } - } - - return ret; -} - - -static ret_code_t gc_swap_erase(void) -{ - m_gc.state = GC_DISCARD_SWAP; - m_swap_page.write_offset = FDS_PAGE_TAG_SIZE; - - return nrf_fstorage_erase(&m_fs, (uint32_t)m_swap_page.p_addr, FDS_PHY_PAGES_IN_VPAGE, NULL); -} - - -// Erase the page being garbage collected, or erase the swap in case there are any open -// records on the page being garbage collected. -static ret_code_t gc_page_erase(void) -{ - uint32_t ret; - uint16_t const gc = m_gc.cur_page; - - if (m_pages[gc].records_open == 0) - { - m_gc.state = GC_ERASE_PAGE; - - ret = nrf_fstorage_erase(&m_fs, (uint32_t)m_pages[gc].p_addr, FDS_PHY_PAGES_IN_VPAGE, NULL); - } - else - { - // If there are open records, stop garbage collection on this page. - // Discard the swap and try to garbage collect another page. - ret = gc_swap_erase(); - } - - return ret; -} - - -// Copy the current record to swap. -static ret_code_t gc_record_copy(void) -{ - fds_header_t const * const p_header = (fds_header_t*)m_gc.p_record_src; - uint32_t const * const p_dest = m_swap_page.p_addr + m_swap_page.write_offset; - uint16_t const record_len = FDS_HEADER_SIZE + p_header->length_words; - - m_gc.state = GC_COPY_RECORD; - - // Copy the record to swap; it is guaranteed to fit in the destination page, - // so there is no need to check its size. This will either succeed or timeout. - return nrf_fstorage_write(&m_fs, (uint32_t)p_dest, m_gc.p_record_src, - record_len * sizeof(uint32_t), - NULL); -} - - -static ret_code_t gc_record_find_next(void) -{ - ret_code_t ret; - - // Find the next valid record to copy. - if (record_find_next(m_gc.cur_page, &m_gc.p_record_src)) - { - ret = gc_record_copy(); - } - else - { - // No more records left to copy on this page; swap pages. - ret = gc_page_erase(); - } - - return ret; -} - - -// Promote the swap by tagging it as a data page. -static ret_code_t gc_swap_promote(void) -{ - m_gc.state = GC_PROMOTE_SWAP; - return page_tag_write_data(m_pages[m_gc.cur_page].p_addr); -} - - -// Tag the page just garbage collected as swap. -static ret_code_t gc_tag_new_swap(void) -{ - m_gc.state = GC_TAG_NEW_SWAP; - m_gc.p_record_src = NULL; - return page_tag_write_swap(); -} - - -static ret_code_t gc_next_page(void) -{ - if (!gc_page_next(&m_gc.cur_page)) - { - // No pages left to GC; GC has terminated. Reset the state. - m_gc.state = GC_BEGIN; - m_gc.cur_page = 0; - m_gc.p_record_src = NULL; - - return FDS_OP_COMPLETED; - } - - return gc_record_find_next(); -} - - -// Update the swap page offeset after a record has been successfully copied to it. -static void gc_update_swap_offset(void) -{ - fds_header_t const * const p_header = (fds_header_t*)m_gc.p_record_src; - uint16_t const record_len = FDS_HEADER_SIZE + p_header->length_words; - - m_swap_page.write_offset += record_len; -} - - -static void gc_swap_pages(void) -{ - // The page being garbage collected will be the new swap page, - // and the current swap will be used as a data page (promoted). - uint32_t const * const p_addr = m_swap_page.p_addr; - - m_swap_page.p_addr = m_pages[m_gc.cur_page].p_addr; - m_pages[m_gc.cur_page].p_addr = p_addr; - - // Keep the offset for this page, but reset it for the swap. - m_pages[m_gc.cur_page].write_offset = m_swap_page.write_offset; - m_swap_page.write_offset = FDS_PAGE_TAG_SIZE; -} - - -static void gc_state_advance(void) -{ - switch (m_gc.state) - { - case GC_BEGIN: - gc_init(); - m_gc.state = GC_NEXT_PAGE; - break; - - // A record was successfully copied. - case GC_COPY_RECORD: - gc_update_swap_offset(); - m_gc.state = GC_FIND_NEXT_RECORD; - break; - - // A page was successfully erased. Prepare to promote the swap. - case GC_ERASE_PAGE: - gc_swap_pages(); - m_gc.state = GC_PROMOTE_SWAP; - break; - - // Swap was discarded because the page being GC'ed had open records. - case GC_DISCARD_SWAP: - // Swap was successfully promoted. - case GC_PROMOTE_SWAP: - // Prepare to tag the page just GC'ed as swap. - m_gc.state = GC_TAG_NEW_SWAP; - break; - - case GC_TAG_NEW_SWAP: - m_gc.state = GC_NEXT_PAGE; - break; - - default: - // Should not happen. - break; - } -} - - -// Initialize the filesystem. -static ret_code_t init_execute(uint32_t prev_ret, fds_op_t * const p_op) -{ - ret_code_t ret = FDS_ERR_INTERNAL; - - if (prev_ret != NRF_SUCCESS) - { - // A previous operation has timed out. - m_flags.initializing = false; - return FDS_ERR_OPERATION_TIMEOUT; - } - - switch (p_op->init.step) - { - case FDS_OP_INIT_TAG_SWAP: - { - // The page write offset was determined previously by pages_init(). - p_op->init.step = FDS_OP_INIT_TAG_DATA; - ret = page_tag_write_swap(); - } break; - - case FDS_OP_INIT_TAG_DATA: - { - // Tag remaining erased pages as data. - bool write_reqd = false; - for (uint16_t i = 0; i < FDS_DATA_PAGES; i++) - { - if (m_pages[i].page_type == FDS_PAGE_ERASED) - { - m_pages[i].page_type = FDS_PAGE_DATA; - write_reqd = true; - ret = page_tag_write_data(m_pages[i].p_addr); - break; - } - } - if (!write_reqd) - { - m_flags.initialized = true; - m_flags.initializing = false; - return FDS_OP_COMPLETED; - } - } break; - - case FDS_OP_INIT_ERASE_SWAP: - { - // If the swap is going to be discarded then reset its write_offset. - p_op->init.step = FDS_OP_INIT_TAG_SWAP; - m_swap_page.write_offset = FDS_PAGE_TAG_SIZE; - - ret = nrf_fstorage_erase(&m_fs, (uint32_t)m_swap_page.p_addr, FDS_PHY_PAGES_IN_VPAGE, NULL); - } break; - - case FDS_OP_INIT_PROMOTE_SWAP: - { - p_op->init.step = FDS_OP_INIT_TAG_SWAP; - - // When promoting the swap, keep the write_offset set by pages_init(). - ret = page_tag_write_data(m_swap_page.p_addr); - - uint16_t const gc = m_gc.cur_page; - uint32_t const * const p_old_swap = m_swap_page.p_addr; - - // Execute the swap. - m_swap_page.p_addr = m_pages[gc].p_addr; - m_pages[gc].p_addr = p_old_swap; - - // Copy the offset from the swap to the new page. - m_pages[gc].write_offset = m_swap_page.write_offset; - m_swap_page.write_offset = FDS_PAGE_TAG_SIZE; - - m_pages[gc].page_type = FDS_PAGE_DATA; - } break; - - default: - // Should not happen. - break; - } - - if (ret != FDS_SUCCESS) - { - // fstorage queue was full. - m_flags.initializing = false; - return FDS_ERR_BUSY; - } - - return FDS_OP_EXECUTING; -} - - -// Executes write and update operations. -static ret_code_t write_execute(uint32_t prev_ret, fds_op_t * const p_op) -{ - ret_code_t ret; - uint32_t * p_write_addr; - fds_page_t * const p_page = &m_pages[p_op->write.page]; - - // This must persist across calls. - static fds_record_desc_t desc = {0}; - // When a record is updated, this variable will hold the page where the old - // copy was stored. This will be used to set the can_gc flag when the header is - // invalidated (FDS_OP_WRITE_FLAG_DIRTY). - static uint16_t page; - - if (prev_ret != NRF_SUCCESS) - { - // The previous operation has timed out, update offsets. - page_offsets_update(p_page, p_op->write.header.length_words); - return FDS_ERR_OPERATION_TIMEOUT; - } - - // Compute the address where to write data. - p_write_addr = (uint32_t*)(p_page->p_addr + p_page->write_offset); - - // Execute the current step of the operation, and set one to be executed next. - switch (p_op->write.step) - { - case FDS_OP_WRITE_FIND_RECORD: - { - // The first step of updating a record constists of locating the copy to be deleted. - // If the old copy couldn't be found for any reason then the update should fail. - // This prevents duplicates when queuing multiple updates of the same record. - desc.p_record = NULL; - desc.record_id = p_op->write.record_to_delete; - - if (!record_find_by_desc(&desc, &page)) - { - return FDS_ERR_NOT_FOUND; - } - // Setting the step is redundant since we are falling through. - } - // Fallthrough to FDS_OP_WRITE_HEADER_BEGIN. - - case FDS_OP_WRITE_HEADER_BEGIN: - ret = record_header_write_begin(p_op, p_write_addr); - break; - - case FDS_OP_WRITE_RECORD_ID: - ret = record_header_write_id(p_op, p_write_addr); - break; - - case FDS_OP_WRITE_DATA: - ret = record_write_data(p_op, p_write_addr); - break; - - case FDS_OP_WRITE_HEADER_FINALIZE: - ret = record_header_write_finalize(p_op, p_write_addr); - break; - - case FDS_OP_WRITE_FLAG_DIRTY: - p_op->write.step = FDS_OP_WRITE_DONE; - ret = record_header_flag_dirty((uint32_t*)desc.p_record, page); - break; - - case FDS_OP_WRITE_DONE: - ret = FDS_OP_COMPLETED; - -#if (FDS_CRC_CHECK_ON_WRITE) - if (!crc_verify_success(p_op->write.header.crc16, - p_op->write.header.length_words, - p_write_addr)) - { - ret = FDS_ERR_CRC_CHECK_FAILED; - } -#endif - break; - - default: - ret = FDS_ERR_INTERNAL; - break; - } - - // An operation has either completed or failed. It may have failed because fstorage - // ran out of memory, or because the user tried to delete a record which did not exist. - if (ret != FDS_OP_EXECUTING) - { - // There won't be another callback for this operation, so update the page offset now. - page_offsets_update(p_page, p_op->write.header.length_words); - } - - return ret; -} - - -static ret_code_t delete_execute(uint32_t prev_ret, fds_op_t * const p_op) -{ - ret_code_t ret; - - if (prev_ret != NRF_SUCCESS) - { - return FDS_ERR_OPERATION_TIMEOUT; - } - - switch (p_op->del.step) - { - case FDS_OP_DEL_RECORD_FLAG_DIRTY: - p_op->del.step = FDS_OP_DEL_DONE; - ret = record_find_and_delete(p_op); - break; - - case FDS_OP_DEL_FILE_FLAG_DIRTY: - ret = file_find_and_delete(p_op); - if (ret == FDS_ERR_NOT_FOUND) - { - // No more records could be found. - // There won't be another callback for this operation, so return now. - ret = FDS_OP_COMPLETED; - } - break; - - case FDS_OP_DEL_DONE: - ret = FDS_OP_COMPLETED; - break; - - default: - ret = FDS_ERR_INTERNAL; - break; - } - - return ret; -} - - -static ret_code_t gc_execute(uint32_t prev_ret) -{ - ret_code_t ret; - - if (prev_ret != NRF_SUCCESS) - { - return FDS_ERR_OPERATION_TIMEOUT; - } - - if (m_gc.resume) - { - m_gc.resume = false; - } - else - { - gc_state_advance(); - } - - switch (m_gc.state) - { - case GC_NEXT_PAGE: - ret = gc_next_page(); - break; - - case GC_FIND_NEXT_RECORD: - ret = gc_record_find_next(); - break; - - case GC_COPY_RECORD: - ret = gc_record_copy(); - break; - - case GC_ERASE_PAGE: - ret = gc_page_erase(); - break; - - case GC_PROMOTE_SWAP: - ret = gc_swap_promote(); - break; - - case GC_TAG_NEW_SWAP: - ret = gc_tag_new_swap(); - break; - - default: - // Should not happen. - ret = FDS_ERR_INTERNAL; - break; - } - - // Either FDS_OP_EXECUTING, FDS_OP_COMPLETED, FDS_ERR_BUSY or FDS_ERR_INTERNAL. - return ret; -} - - -static void queue_process(ret_code_t result) -{ - static fds_op_t * m_p_cur_op; // Current fds operation. - static nrf_atfifo_item_get_t m_iget_ctx; // Queue context for the current operation. - - while (true) - { - if (m_p_cur_op == NULL) - { - // Load the next from the queue if no operation is being executed. - m_p_cur_op = queue_load(&m_iget_ctx); - } - - /* We can reach here in three ways: - * from queue_start(): something was just queued - * from the fstorage event handler: an operation is being executed - * looping: we only loop if there are operations still in the queue - * - * In all these three cases, m_p_cur_op != NULL. - */ - ASSERT(m_p_cur_op != NULL); - - switch (m_p_cur_op->op_code) - { - case FDS_OP_INIT: - result = init_execute(result, m_p_cur_op); - break; - - case FDS_OP_WRITE: - case FDS_OP_UPDATE: - result = write_execute(result, m_p_cur_op); - break; - - case FDS_OP_DEL_RECORD: - case FDS_OP_DEL_FILE: - result = delete_execute(result, m_p_cur_op); - break; - - case FDS_OP_GC: - result = gc_execute(result); - break; - - default: - result = FDS_ERR_INTERNAL; - break; - } - - if (result == FDS_OP_EXECUTING) - { - // The operation has not completed yet. Wait for the next system event. - break; - } - - // The operation has completed (either successfully or with an error). - // - send an event to the user - // - free the operation buffer - // - execute any other queued operations - - fds_evt_t evt; - memset(&evt, 0x00, sizeof(evt)); - - if (result == FDS_OP_COMPLETED) - { - evt.result = FDS_SUCCESS; - result = NRF_SUCCESS; - } - else - { - // The operation failed for one of the following reasons: - // FDS_ERR_BUSY - flash subsystem can't accept the operation - // FDS_ERR_OPERATION_TIMEOUT - flash subsystem timed out - // FDS_ERR_CRC_CHECK_FAILED - a CRC check failed - // FDS_ERR_NOT_FOUND - no record found (delete/update) - evt.result = result; - } - - event_prepare(m_p_cur_op, &evt); - event_send(&evt); - - // Zero the pointer to the current operation so that this function - // will fetch a new one from the queue next time it is run. - m_p_cur_op = NULL; - - // Free the queue element used by the current operation. - queue_free(&m_iget_ctx); - - if (!queue_has_next()) - { - // No more elements left. Nothing to do. - break; - } - } -} - - -static void queue_start(void) -{ - if (!nrf_atomic_u32_fetch_add(&m_queued_op_cnt, 1)) - { - queue_process(NRF_SUCCESS); - } -} - - -static void fs_event_handler(nrf_fstorage_evt_t * p_evt) -{ - queue_process(p_evt->result); -} - - -// Enqueues write and update operations. -static ret_code_t write_enqueue(fds_record_desc_t * const p_desc, - fds_record_t const * const p_record, - fds_reserve_token_t const * const p_tok, - fds_op_code_t op_code) -{ - ret_code_t ret; - uint16_t page; - uint16_t crc = 0; - uint16_t length_words = 0; - fds_op_t * p_op; - nrf_atfifo_item_put_t iput_ctx; - - if (!m_flags.initialized) - { - return FDS_ERR_NOT_INITIALIZED; - } - - if (p_record == NULL) - { - return FDS_ERR_NULL_ARG; - } - - if ((p_record->file_id == FDS_FILE_ID_INVALID) || - (p_record->key == FDS_RECORD_KEY_DIRTY)) - { - return FDS_ERR_INVALID_ARG; - } - - if (!is_word_aligned(p_record->data.p_data)) - { - return FDS_ERR_UNALIGNED_ADDR; - } - - // No space was previously reserved in flash for this operation. - if (p_tok == NULL) - { - // Find a page where to write data. - length_words = p_record->data.length_words; - ret = write_space_reserve(length_words, &page); - - if (ret != FDS_SUCCESS) - { - // There is either not enough space in flash (FDS_ERR_NO_SPACE_IN_FLASH) or - // the record exceeds the size of virtual page (FDS_ERR_RECORD_TOO_LARGE). - return ret; - } - } - else - { - page = p_tok->page; - length_words = p_tok->length_words; - } - - // Get a buffer on the queue of operations. - p_op = queue_buf_get(&iput_ctx); - if (p_op == NULL) - { - CRITICAL_SECTION_ENTER(); - write_space_free(length_words, page); - CRITICAL_SECTION_EXIT(); - return FDS_ERR_NO_SPACE_IN_QUEUES; - } - - // Initialize the operation. - p_op->op_code = op_code; - p_op->write.step = FDS_OP_WRITE_HEADER_BEGIN; - p_op->write.page = page; - p_op->write.p_data = p_record->data.p_data; - p_op->write.header.record_id = record_id_new(); - p_op->write.header.file_id = p_record->file_id; - p_op->write.header.record_key = p_record->key; - p_op->write.header.length_words = length_words; - - if (op_code == FDS_OP_UPDATE) - { - p_op->write.step = FDS_OP_WRITE_FIND_RECORD; - // Save the record ID of the record to be updated. - p_op->write.record_to_delete = p_desc->record_id; - } - -#if (FDS_CRC_CHECK_ON_READ) - // First, compute the CRC for the first 6 bytes of the header which contain the - // record key, length and file ID, then, compute the CRC of the record ID (4 bytes). - crc = crc16_compute((uint8_t*)&p_op->write.header, 6, NULL); - crc = crc16_compute((uint8_t*)&p_op->write.header.record_id, 4, &crc); - - // Compute the CRC for the record data. - crc = crc16_compute((uint8_t*)p_record->data.p_data, - p_record->data.length_words * sizeof(uint32_t), &crc); -#endif - - p_op->write.header.crc16 = crc; - - queue_buf_store(&iput_ctx); - - // Initialize the record descriptor, if provided. - if (p_desc != NULL) - { - p_desc->p_record = NULL; - // Don't invoke record_id_new() again ! - p_desc->record_id = p_op->write.header.record_id; - p_desc->record_is_open = false; - p_desc->gc_run_count = m_gc.run_count; - } - - // Start processing the queue, if necessary. - queue_start(); - - return FDS_SUCCESS; -} - - -ret_code_t fds_register(fds_cb_t cb) -{ - ret_code_t ret; - - if (m_users == FDS_MAX_USERS) - { - ret = FDS_ERR_USER_LIMIT_REACHED; - } - else - { - m_cb_table[m_users] = cb; - (void) nrf_atomic_u32_add(&m_users, 1); - - ret = FDS_SUCCESS; - } - - return ret; -} - - -static uint32_t flash_end_addr(void) -{ - uint32_t const bootloader_addr = NRF_UICR->NRFFW[0]; - uint32_t const page_sz = NRF_FICR->CODEPAGESIZE; -#ifndef NRF52810_XXAA - uint32_t const code_sz = NRF_FICR->CODESIZE; -#else - // Number of flash pages, necessary to emulate the NRF52810 on NRF52832. - uint32_t const code_sz = 48; -#endif - - return (bootloader_addr != 0xFFFFFFFF) ? bootloader_addr : (code_sz * page_sz); -} - - -static void flash_bounds_set(void) -{ - uint32_t flash_size = (FDS_PHY_PAGES * FDS_PHY_PAGE_SIZE * sizeof(uint32_t)); - m_fs.end_addr = flash_end_addr(); - m_fs.start_addr = m_fs.end_addr - flash_size; -} - - -static ret_code_t flash_subsystem_init(void) -{ - flash_bounds_set(); - - #if (FDS_BACKEND == NRF_FSTORAGE_SD) - return nrf_fstorage_init(&m_fs, &nrf_fstorage_sd, NULL); - #elif (FDS_BACKEND == NRF_FSTORAGE_NVMC) - return nrf_fstorage_init(&m_fs, &nrf_fstorage_nvmc, NULL); - #else - #error Invalid FDS_BACKEND. - #endif -} - - -static void queue_init(void) -{ - (void) NRF_ATFIFO_INIT(m_queue); -} - - -ret_code_t fds_init(void) -{ - ret_code_t ret; - fds_evt_t const evt_success = - { - .id = FDS_EVT_INIT, - .result = FDS_SUCCESS, - }; - - if (m_flags.initialized) - { - // No initialization is necessary. Notify the application immediately. - event_send(&evt_success); - return FDS_SUCCESS; - } - - if (nrf_atomic_flag_set_fetch(&m_flags.initializing)) - { - // If we were already initializing, return. - return FDS_SUCCESS; - } - - // Otherwise, the flag is set and we proceed to initialization. - - ret = flash_subsystem_init(); - if (ret != NRF_SUCCESS) - { - return ret; - } - - queue_init(); - - // Initialize the page structure (m_pages), and determine which - // initialization steps are required given the current state of the filesystem. - - fds_init_opts_t init_opts = pages_init(); - - switch (init_opts) - { - case NO_PAGES: - case NO_SWAP: - return FDS_ERR_NO_PAGES; - - case ALREADY_INSTALLED: - { - // No initialization is necessary. Notify the application immediately. - m_flags.initialized = true; - m_flags.initializing = false; - event_send(&evt_success); - return FDS_SUCCESS; - } - - default: - break; - } - - // A write operation is necessary to initialize the fileystem. - - nrf_atfifo_item_put_t iput_ctx; - - fds_op_t * p_op = queue_buf_get(&iput_ctx); - if (p_op == NULL) - { - return FDS_ERR_NO_SPACE_IN_QUEUES; - } - - p_op->op_code = FDS_OP_INIT; - - switch (init_opts) - { - case FRESH_INSTALL: - case TAG_SWAP: - p_op->init.step = FDS_OP_INIT_TAG_SWAP; - break; - - case PROMOTE_SWAP: - case PROMOTE_SWAP_INST: - p_op->init.step = FDS_OP_INIT_PROMOTE_SWAP; - break; - - case DISCARD_SWAP: - p_op->init.step = FDS_OP_INIT_ERASE_SWAP; - break; - - case TAG_DATA: - case TAG_DATA_INST: - p_op->init.step = FDS_OP_INIT_TAG_DATA; - break; - - default: - // Should not happen. - break; - } - - queue_buf_store(&iput_ctx); - queue_start(); - - return FDS_SUCCESS; -} - - -ret_code_t fds_record_open(fds_record_desc_t * const p_desc, - fds_flash_record_t * const p_flash_rec) -{ - uint16_t page; - - if ((p_desc == NULL) || (p_flash_rec == NULL)) - { - return FDS_ERR_NULL_ARG; - } - - // Find the record if necessary. - if (record_find_by_desc(p_desc, &page)) - { - fds_header_t const * const p_header = (fds_header_t*)p_desc->p_record; - -#if (FDS_CRC_CHECK_ON_READ) - if (!crc_verify_success(p_header->crc16, - p_header->length_words, - p_desc->p_record)) - { - return FDS_ERR_CRC_CHECK_FAILED; - } -#endif - - (void) nrf_atomic_u32_add(&m_pages[page].records_open, 1); - - // Initialize p_flash_rec. - p_flash_rec->p_header = p_header; - p_flash_rec->p_data = (p_desc->p_record + FDS_HEADER_SIZE); - - // Set the record as open in the descriptor. - p_desc->record_is_open = true; - - return FDS_SUCCESS; - } - - // The record could not be found. - // It either never existed or it has been deleted. - return FDS_ERR_NOT_FOUND; -} - - -ret_code_t fds_record_close(fds_record_desc_t * const p_desc) -{ - ret_code_t ret; - uint16_t page; - - if (p_desc == NULL) - { - return FDS_ERR_NULL_ARG; - } - - if (record_find_by_desc((fds_record_desc_t*)p_desc, &page)) - { - CRITICAL_SECTION_ENTER(); - if ((m_pages[page].records_open > 0) && (p_desc->record_is_open)) - { - - m_pages[page].records_open--; - p_desc->record_is_open = false; - - ret = FDS_SUCCESS; - } - else - { - ret = FDS_ERR_NO_OPEN_RECORDS; - } - CRITICAL_SECTION_EXIT(); - } - else - { - ret = FDS_ERR_NOT_FOUND; - } - - return ret; -} - - -ret_code_t fds_reserve(fds_reserve_token_t * const p_tok, uint16_t length_words) -{ - ret_code_t ret; - uint16_t page; - - if (!m_flags.initialized) - { - return FDS_ERR_NOT_INITIALIZED; - } - - if (p_tok == NULL) - { - return FDS_ERR_NULL_ARG; - } - - ret = write_space_reserve(length_words, &page); - - if (ret == FDS_SUCCESS) - { - p_tok->page = page; - p_tok->length_words = length_words; - } - - return ret; -} - - -ret_code_t fds_reserve_cancel(fds_reserve_token_t * const p_tok) -{ - ret_code_t ret; - - if (!m_flags.initialized) - { - return FDS_ERR_NOT_INITIALIZED; - } - - if (p_tok == NULL) - { - return FDS_ERR_NULL_ARG; - } - - if (p_tok->page > FDS_DATA_PAGES) - { - // The page does not exist. This shouldn't happen. - return FDS_ERR_INVALID_ARG; - } - - fds_page_t const * const p_page = &m_pages[p_tok->page]; - - CRITICAL_SECTION_ENTER(); - if ((FDS_HEADER_SIZE + p_tok->length_words) <= p_page->words_reserved) - { - // Free reserved space. - write_space_free(p_tok->length_words, p_tok->page); - - // Clean the token. - p_tok->page = 0; - p_tok->length_words = 0; - ret = FDS_SUCCESS; - } - else - { - // We are trying to cancel a reservation of more words than how many are - // currently reserved on the page. Clearly, this shouldn't happen. - ret = FDS_ERR_INVALID_ARG; - } - CRITICAL_SECTION_EXIT(); - - return ret; -} - - -ret_code_t fds_record_write(fds_record_desc_t * const p_desc, - fds_record_t const * const p_record) -{ - return write_enqueue(p_desc, p_record, NULL, FDS_OP_WRITE); -} - - -ret_code_t fds_record_write_reserved(fds_record_desc_t * const p_desc, - fds_record_t const * const p_record, - fds_reserve_token_t const * const p_tok) -{ - // A NULL token is not allowed when writing to a reserved space. - if (p_tok == NULL) - { - return FDS_ERR_NULL_ARG; - } - - return write_enqueue(p_desc, p_record, p_tok, FDS_OP_WRITE); -} - - -ret_code_t fds_record_update(fds_record_desc_t * const p_desc, - fds_record_t const * const p_record) -{ - // A NULL descriptor is not allowed when updating a record. - if (p_desc == NULL) - { - return FDS_ERR_NULL_ARG; - } - - return write_enqueue(p_desc, p_record, NULL, FDS_OP_UPDATE); -} - - -ret_code_t fds_record_delete(fds_record_desc_t * const p_desc) -{ - fds_op_t * p_op; - nrf_atfifo_item_put_t iput_ctx; - - if (!m_flags.initialized) - { - return FDS_ERR_NOT_INITIALIZED; - } - - if (p_desc == NULL) - { - return FDS_ERR_NULL_ARG; - } - - p_op = queue_buf_get(&iput_ctx); - if (p_op == NULL) - { - return FDS_ERR_NO_SPACE_IN_QUEUES; - } - - p_op->op_code = FDS_OP_DEL_RECORD; - p_op->del.step = FDS_OP_DEL_RECORD_FLAG_DIRTY; - p_op->del.record_to_delete = p_desc->record_id; - - queue_buf_store(&iput_ctx); - queue_start(); - - return FDS_SUCCESS; -} - - -ret_code_t fds_file_delete(uint16_t file_id) -{ - fds_op_t * p_op; - nrf_atfifo_item_put_t iput_ctx; - - if (!m_flags.initialized) - { - return FDS_ERR_NOT_INITIALIZED; - } - - if (file_id == FDS_FILE_ID_INVALID) - { - return FDS_ERR_INVALID_ARG; - } - - p_op = queue_buf_get(&iput_ctx); - if (p_op == NULL) - { - return FDS_ERR_NO_SPACE_IN_QUEUES; - } - - p_op->op_code = FDS_OP_DEL_FILE; - p_op->del.step = FDS_OP_DEL_FILE_FLAG_DIRTY; - p_op->del.file_id = file_id; - - queue_buf_store(&iput_ctx); - queue_start(); - - return FDS_SUCCESS; -} - - -ret_code_t fds_gc(void) -{ - fds_op_t * p_op; - nrf_atfifo_item_put_t iput_ctx; - - if (!m_flags.initialized) - { - return FDS_ERR_NOT_INITIALIZED; - } - - p_op = queue_buf_get(&iput_ctx); - if (p_op == NULL) - { - return FDS_ERR_NO_SPACE_IN_QUEUES; - } - - p_op->op_code = FDS_OP_GC; - - queue_buf_store(&iput_ctx); - - if (m_gc.state != GC_BEGIN) - { - // Resume GC by retrying the last step. - m_gc.resume = true; - } - - queue_start(); - - return FDS_SUCCESS; -} - - -ret_code_t fds_record_iterate(fds_record_desc_t * const p_desc, - fds_find_token_t * const p_token) -{ - return record_find(NULL, NULL, p_desc, p_token); -} - - -ret_code_t fds_record_find(uint16_t file_id, - uint16_t record_key, - fds_record_desc_t * const p_desc, - fds_find_token_t * const p_token) -{ - return record_find(&file_id, &record_key, p_desc, p_token); -} - - -ret_code_t fds_record_find_by_key(uint16_t record_key, - fds_record_desc_t * const p_desc, - fds_find_token_t * const p_token) -{ - return record_find(NULL, &record_key, p_desc, p_token); -} - - -ret_code_t fds_record_find_in_file(uint16_t file_id, - fds_record_desc_t * const p_desc, - fds_find_token_t * const p_token) -{ - return record_find(&file_id, NULL, p_desc, p_token); -} - - -ret_code_t fds_descriptor_from_rec_id(fds_record_desc_t * const p_desc, - uint32_t record_id) -{ - if (p_desc == NULL) - { - return FDS_ERR_NULL_ARG; - } - - // Zero the descriptor and set the record_id field. - memset(p_desc, 0x00, sizeof(fds_record_desc_t)); - p_desc->record_id = record_id; - - return FDS_SUCCESS; -} - - -ret_code_t fds_record_id_from_desc(fds_record_desc_t const * const p_desc, - uint32_t * const p_record_id) -{ - if ((p_desc == NULL) || (p_record_id == NULL)) - { - return FDS_ERR_NULL_ARG; - } - - *p_record_id = p_desc->record_id; - - return FDS_SUCCESS; -} - - -ret_code_t fds_stat(fds_stat_t * const p_stat) -{ - uint16_t const words_in_page = FDS_PAGE_SIZE; - // The largest number of free contiguous words on any page. - uint16_t contig_words = 0; - - if (!m_flags.initialized) - { - return FDS_ERR_NOT_INITIALIZED; - } - - if (p_stat == NULL) - { - return FDS_ERR_NULL_ARG; - } - - memset(p_stat, 0x00, sizeof(fds_stat_t)); - - p_stat->pages_available = FDS_VIRTUAL_PAGES; - - for (uint16_t page = 0; page < FDS_DATA_PAGES; page++) - { - uint16_t const words_used = m_pages[page].write_offset + m_pages[page].words_reserved; - - if (page_identify(m_pages[page].p_addr) == FDS_PAGE_UNDEFINED) - { - p_stat->pages_available--; - } - - p_stat->open_records += m_pages[page].records_open; - p_stat->words_reserved += m_pages[page].words_reserved; - p_stat->words_used += words_used; - - contig_words = (words_in_page - words_used); - if (contig_words > p_stat->largest_contig) - { - p_stat->largest_contig = contig_words; - } - - records_stat(page, - &p_stat->valid_records, - &p_stat->dirty_records, - &p_stat->freeable_words, - &p_stat->corruption); - } - - return FDS_SUCCESS; -} - -#endif //NRF_MODULE_ENABLED(FDS) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/fds/fds.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/fds/fds.h deleted file mode 100644 index 3d5986b497e..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/fds/fds.h +++ /dev/null @@ -1,700 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef FDS_H__ -#define FDS_H__ - -/** - * @defgroup fds Flash Data Storage - * @ingroup app_common - * @{ - * - * @brief Flash Data Storage (FDS). - * - * @details Flash Data Storage is a minimalistic, record-oriented file system for the on-chip - * flash. Files are stored as a collection of records of variable length. FDS supports - * synchronous read operations and asynchronous write operations (write, update, - * and delete). FDS can be used from multiple threads. - */ - -#include -#include -#include "sdk_errors.h" -#include "app_util_platform.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -/**@brief Invalid file ID. - * - * This value must not be used as a file ID by the application. - */ -#define FDS_FILE_ID_INVALID (0xFFFF) - - -/**@brief Record key for deleted records. - * - * This key is used to flag a record as "dirty", which means that it should be removed during - * the next garbage collection. This value must not be used as a record key by the application. - */ -#define FDS_RECORD_KEY_DIRTY (0x0000) - - -/**@brief FDS return values. - */ -enum -{ - FDS_SUCCESS = NRF_SUCCESS, //!< The operation completed successfully. - FDS_ERR_OPERATION_TIMEOUT, //!< Error. The operation timed out. - FDS_ERR_NOT_INITIALIZED, //!< Error. The module has not been initialized. - FDS_ERR_UNALIGNED_ADDR, //!< Error. The input data is not aligned to a word boundary. - FDS_ERR_INVALID_ARG, //!< Error. The parameter contains invalid data. - FDS_ERR_NULL_ARG, //!< Error. The parameter is NULL. - FDS_ERR_NO_OPEN_RECORDS, //!< Error. The record is not open, so it cannot be closed. - FDS_ERR_NO_SPACE_IN_FLASH, //!< Error. There is no space in flash memory. - FDS_ERR_NO_SPACE_IN_QUEUES, //!< Error. There is no space in the internal queues. - FDS_ERR_RECORD_TOO_LARGE, //!< Error. The record exceeds the maximum allowed size. - FDS_ERR_NOT_FOUND, //!< Error. The record was not found. - FDS_ERR_NO_PAGES, //!< Error. No flash pages are available. - FDS_ERR_USER_LIMIT_REACHED, //!< Error. The maximum number of users has been reached. - FDS_ERR_CRC_CHECK_FAILED, //!< Error. The CRC check failed. - FDS_ERR_BUSY, //!< Error. The underlying flash subsystem was busy. - FDS_ERR_INTERNAL, //!< Error. An internal error occurred. -}; - - -/**@brief The record metadata as stored in flash. - * @warning Do not edit or reorder the fields in this structure. - */ -typedef struct -{ - uint16_t record_key; //!< The record key. - uint16_t length_words; //!< The length of the record data (in 4-byte words). - uint16_t file_id; //!< The ID of the file that the record belongs to. - uint16_t crc16; //!< CRC16-CCITT check value. - /* The CRC is calculated over the entire record as stored in flash, - * including the record metadata except the CRC field itself. - */ - uint32_t record_id; //!< The unique record ID (32 bits). -} fds_header_t; - - -/**@brief The record descriptor structure that is used to manipulate records. - * - * This structure is used by the FDS module. You must provide the descriptor to the module when - * you manipulate existing records. However, you should never modify it or use any of its fields. - * - * @note Never reuse the same descriptor for different records. - */ -typedef struct -{ - uint32_t record_id; //!< The unique record ID. - uint32_t const * p_record; //!< The last known location of the record in flash. - uint16_t gc_run_count; //!< Number of times garbage collection has been run. - bool record_is_open; //!< Whether the record is currently open. -} fds_record_desc_t; - - -/**@brief Structure that can be used to read the contents of a record stored in flash. - * - * This structure does not reflect the physical layout of a record in flash, but it points - * to the locations where the record header (metadata) and the record data are stored. - */ -typedef struct -{ - fds_header_t const * p_header; //!< Location of the record header in flash. - void const * p_data; //!< Location of the record data in flash. -} fds_flash_record_t; - - -/**@brief A record to be written to flash. */ -typedef struct -{ - uint16_t file_id; //!< The ID of the file that the record belongs to. - uint16_t key; //!< The record key. - struct - { - void const * p_data; - uint32_t length_words; - } data; -} fds_record_t; - - -/**@brief A token to a reserved space in flash, created by @ref fds_reserve. - * - * This token can be used to write the record in the reserved space (@ref fds_record_write_reserved) - * or to cancel the reservation (@ref fds_reserve_cancel). - */ -typedef struct -{ - uint16_t page; //!< The logical ID of the page where space was reserved. - uint16_t length_words; //!< The amount of space reserved (in 4-byte words). -} fds_reserve_token_t; - - -/**@brief A token to keep information about the progress of @ref fds_record_find, - * @ref fds_record_find_by_key, and @ref fds_record_find_in_file. - * - * @note Always zero-initialize the token before using it for the first time. - * @note Never reuse the same token to search for different records. - */ -typedef struct -{ - uint32_t const * p_addr; - uint16_t page; -} fds_find_token_t; - - -/**@brief FDS event IDs. - */ -typedef enum -{ - FDS_EVT_INIT, //!< Event for @ref fds_init. - FDS_EVT_WRITE, //!< Event for @ref fds_record_write and @ref fds_record_write_reserved. - FDS_EVT_UPDATE, //!< Event for @ref fds_record_update. - FDS_EVT_DEL_RECORD, //!< Event for @ref fds_record_delete. - FDS_EVT_DEL_FILE, //!< Event for @ref fds_file_delete. - FDS_EVT_GC //!< Event for @ref fds_gc. -} fds_evt_id_t; - - -ANON_UNIONS_ENABLE - -/**@brief An FDS event. */ -typedef struct -{ - fds_evt_id_t id; //!< The event ID. See @ref fds_evt_id_t. - ret_code_t result; //!< The result of the operation related to this event. - union - { - struct - { - uint32_t record_id; - uint16_t file_id; - uint16_t record_key; - bool is_record_updated; - } write; //!< Information for @ref FDS_EVT_WRITE and @ref FDS_EVT_UPDATE events. - struct - { - uint32_t record_id; - uint16_t file_id; - uint16_t record_key; - } del; //!< Information for @ref FDS_EVT_DEL_RECORD and @ref FDS_EVT_DEL_FILE events. - }; -} fds_evt_t; - -ANON_UNIONS_DISABLE - - -/**@brief File system statistics. */ -typedef struct -{ - uint16_t pages_available; //!< The number of pages available. - uint16_t open_records; //!< The number of open records. - uint16_t valid_records; //!< The number of valid records. - uint16_t dirty_records; //!< The number of deleted ("dirty") records. - uint16_t words_reserved; //!< The number of words reserved by @ref fds_reserve(). - - /**@brief The number of words written to flash, including those reserved for future writes. */ - uint16_t words_used; - - /**@brief The largest number of free contiguous words in the file system. - * - * This number indicates the largest record that can be stored by FDS. - * It takes into account all reservations for future writes. - */ - uint16_t largest_contig; - - /**@brief The largest number of words that can be reclaimed by garbage collection. - * - * The actual amount of space freed by garbage collection might be less than this value if - * records are open while garbage collection is run. - */ - uint16_t freeable_words; - - /**@brief Filesystem corruption has been detected. - * - * One or more corrupted records were detected. FDS will heal the filesystem automatically - * next time garbage collection is run, but some data may be lost. - * - * @note: This flag is unrelated to CRC failures. - */ - bool corruption; -} fds_stat_t; - - -/**@brief FDS event handler function prototype. - * - * @param p_evt The event. - */ -typedef void (*fds_cb_t)(fds_evt_t const * p_evt); - - -/**@brief Function for registering an FDS event handler. - * - * The maximum amount of handlers that can be registered can be configured by changing the value - * of @ref FDS_MAX_USERS in fds_config.h. - * - * @param[in] cb The event handler function. - * - * @retval FDS_SUCCESS If the event handler was registered successfully. - * @retval FDS_ERR_USER_LIMIT_REACHED If the maximum number of registered callbacks is reached. - */ -ret_code_t fds_register(fds_cb_t cb); - - -/**@brief Function for initializing the module. - * - * This function initializes the module and installs the file system (unless it is installed - * already). - * - * This function is asynchronous. Completion is reported through an event. Make sure to call - * @ref fds_register before calling @ref fds_init so that you receive the completion event. - * - * @retval FDS_SUCCESS If the operation was queued successfully. - * @retval FDS_ERR_NO_PAGES If there is no space available in flash memory to install the - * file system. - */ -ret_code_t fds_init(void); - - -/**@brief Function for writing a record to flash. - * - * There are no restrictions on the file ID and the record key, except that the record key must be - * different from @ref FDS_RECORD_KEY_DIRTY and the file ID must be different from - * @ref FDS_FILE_ID_INVALID. In particular, no restrictions are made regarding the uniqueness of - * the file ID or the record key. All records with the same file ID are grouped into one file. - * If no file with the specified ID exists, it is created. There can be multiple records with the - * same record key in a file. - * - * Some modules need exclusive use of certain file IDs and record keys. - * See @ref lib_fds_functionality_keys for details. - * - * Record data can consist of multiple chunks. The data must be aligned to a 4 byte boundary, and - * because it is not buffered internally, it must be kept in memory until the callback for the - * operation has been received. The length of the data must not exceed @ref FDS_VIRTUAL_PAGE_SIZE - * words minus 14 bytes. - * - * This function is asynchronous. Completion is reported through an event that is sent to - * the registered event handler function. - * - * @param[out] p_desc The descriptor of the record that was written. Pass NULL if you do not - * need the descriptor. - * @param[in] p_record The record to be written to flash. - * - * @retval FDS_SUCCESS If the operation was queued successfully. - * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. - * @retval FDS_ERR_NULL_ARG If @p p_record is NULL. - * @retval FDS_ERR_INVALID_ARG If the file ID or the record key is invalid. - * @retval FDS_ERR_UNALIGNED_ADDR If the record data is not aligned to a 4 byte boundary. - * @retval FDS_ERR_RECORD_TOO_LARGE If the record data exceeds the maximum length. - * @retval FDS_ERR_NO_SPACE_IN_QUEUES If the operation queue is full or there are more record - * chunks than can be buffered. - * @retval FDS_ERR_NO_SPACE_IN_FLASH If there is not enough free space in flash to store the - * record. - */ -ret_code_t fds_record_write(fds_record_desc_t * p_desc, - fds_record_t const * p_record); - - -/**@brief Function for reserving space in flash. - * - * This function can be used to reserve space in flash memory. To write a record into the reserved - * space, use @ref fds_record_write_reserved. Alternatively, use @ref fds_reserve_cancel to cancel - * a reservation. - * - * Note that this function does not write any data to flash. - * - * @param[out] p_token A token that can be used to write a record in the reserved space or - * cancel the reservation. - * @param[in] length_words The length of the record data (in 4-byte words). - * - * @retval FDS_SUCCESS If the flash space was reserved successfully. - * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. - * @retval FDS_ERR_NULL_ARG If @p p_token is NULL instead of a valid token address. - * @retval FDS_ERR_RECORD_TOO_LARGE If the record length exceeds the maximum length. - * @retval FDS_ERR_NO_SPACE_IN_FLASH If there is not enough free space in flash to store the - * record. - */ -ret_code_t fds_reserve(fds_reserve_token_t * p_token, uint16_t length_words); - - -/**@brief Function for canceling an @ref fds_reserve operation. - * - * @param[in] p_token The token that identifies the reservation, produced by @ref fds_reserve. - * - * @retval FDS_SUCCESS If the reservation was canceled. - * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. - * @retval FDS_ERR_NULL_ARG If @p p_token is NULL instead of a valid token address. - * @retval FDS_ERR_INVALID_ARG If @p p_token contains invalid data. - */ -ret_code_t fds_reserve_cancel(fds_reserve_token_t * p_token); - - -/**@brief Function for writing a record to a space in flash that was reserved using - * @ref fds_reserve. - * - * There are no restrictions on the file ID and the record key, except that the record key must be - * different from @ref FDS_RECORD_KEY_DIRTY and the file ID must be different from - * @ref FDS_FILE_ID_INVALID. In particular, no restrictions are made regarding the uniqueness of - * the file ID or the record key. All records with the same file ID are grouped into one file. - * If no file with the specified ID exists, it is created. There can be multiple records with the - * same record key in a file. - * - * Record data can consist of multiple chunks. The data must be aligned to a 4 byte boundary, and - * because it is not buffered internally, it must be kept in memory until the callback for the - * operation has been received. The length of the data must not exceed @ref FDS_VIRTUAL_PAGE_SIZE - * words minus 14 bytes. - * - * This function is asynchronous. Completion is reported through an event that is sent to the - * registered event handler function. - * - * @note - * This function behaves similarly to @ref fds_record_write, with the exception that it never - * fails with the error @ref FDS_ERR_NO_SPACE_IN_FLASH. - * - * @param[out] p_desc The descriptor of the record that was written. Pass NULL if you do not - * need the descriptor. - * @param[in] p_record The record to be written to flash. - * @param[in] p_token The token that identifies the space reserved in flash. - * - * @retval FDS_SUCCESS If the operation was queued successfully. - * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. - * @retval FDS_ERR_NULL_ARG If @p p_token is NULL instead of a valid token address. - * @retval FDS_ERR_INVALID_ARG If the file ID or the record key is invalid. - * @retval FDS_ERR_UNALIGNED_ADDR If the record data is not aligned to a 4 byte boundary. - * @retval FDS_ERR_RECORD_TOO_LARGE If the record data exceeds the maximum length. - * @retval FDS_ERR_NO_SPACE_IN_QUEUES If the operation queue is full or there are more record - * chunks than can be buffered. - */ -ret_code_t fds_record_write_reserved(fds_record_desc_t * p_desc, - fds_record_t const * p_record, - fds_reserve_token_t const * p_token); - - -/**@brief Function for deleting a record. - * - * Deleted records cannot be located using @ref fds_record_find, @ref fds_record_find_by_key, or - * @ref fds_record_find_in_file. Additionally, they can no longer be opened using - * @ref fds_record_open. - * - * Note that deleting a record does not free the space it occupies in flash memory. - * To reclaim flash space used by deleted records, call @ref fds_gc to run garbage collection. - * - * This function is asynchronous. Completion is reported through an event that is sent to the - * registered event handler function. - * - * @param[in] p_desc The descriptor of the record that should be deleted. - * - * @retval FDS_SUCCESS If the operation was queued successfully. - * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. - * @retval FDS_ERR_NULL_ARG If the specified record descriptor @p p_desc is NULL. - * @retval FDS_ERR_NO_SPACE_IN_QUEUES If the operation queue is full. - */ -ret_code_t fds_record_delete(fds_record_desc_t * p_desc); - - -/**@brief Function for deleting all records in a file. - * - * This function deletes a file, including all its records. Deleted records cannot be located - * using @ref fds_record_find, @ref fds_record_find_by_key, or @ref fds_record_find_in_file. - * Additionally, they can no longer be opened using @ref fds_record_open. - * - * Note that deleting records does not free the space they occupy in flash memory. - * To reclaim flash space used by deleted records, call @ref fds_gc to run garbage collection. - * - * This function is asynchronous. Completion is reported through an event that is sent to the - * registered event handler function. - * - * @param[in] file_id The ID of the file to be deleted. - * - * @retval FDS_SUCCESS If the operation was queued successfully. - * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. - * @retval FDS_ERR_INVALID_ARG If the specified @p file_id is invalid. - * @retval FDS_ERR_NO_SPACE_IN_QUEUES If the operation queue is full. - */ -ret_code_t fds_file_delete(uint16_t file_id); - - -/**@brief Function for updating a record. - * - * Updating a record first writes a new record (@p p_record) to flash and then deletes the - * old record (identified by @p p_desc). - * - * There are no restrictions on the file ID and the record key, except that the record key must be - * different from @ref FDS_RECORD_KEY_DIRTY and the file ID must be different from - * @ref FDS_FILE_ID_INVALID. In particular, no restrictions are made regarding the uniqueness of - * the file ID or the record key. All records with the same file ID are grouped into one file. - * If no file with the specified ID exists, it is created. There can be multiple records with the - * same record key in a file. - * - * Record data can consist of multiple chunks. The data must be aligned to a 4 byte boundary, and - * because it is not buffered internally, it must be kept in memory until the callback for the - * operation has been received. The length of the data must not exceed @ref FDS_VIRTUAL_PAGE_SIZE - * words minus 14 bytes. - * - * This function is asynchronous. Completion is reported through an event that is sent to the - * registered event handler function. - * - * @param[in, out] p_desc The descriptor of the record to update. When the function - * returns with FDS_SUCCESS, this parameter contains the - * descriptor of the newly written record. - * @param[in] p_record The updated record to be written to flash. - * - * @retval FDS_SUCCESS If the operation was queued successfully. - * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. - * @retval FDS_ERR_INVALID_ARG If the file ID or the record key is invalid. - * @retval FDS_ERR_UNALIGNED_ADDR If the record data is not aligned to a 4 byte boundary. - * @retval FDS_ERR_RECORD_TOO_LARGE If the record data exceeds the maximum length. - * @retval FDS_ERR_NO_SPACE_IN_QUEUES If the operation queue is full or there are more record - * chunks than can be buffered. - * @retval FDS_ERR_NO_SPACE_IN_FLASH If there is not enough free space in flash to store the - * updated record. - */ -ret_code_t fds_record_update(fds_record_desc_t * p_desc, - fds_record_t const * p_record); - - -/**@brief Function for iterating through all records in flash. - * - * To search for the next record, call the function again and supply the same @ref fds_find_token_t - * structure to resume searching from the last record that was found. - * - * Note that the order with which records are iterated is not defined. - * - * @param[out] p_desc The descriptor of the record that was found. - * @param[out] p_token A token containing information about the progress of the operation. - * - * @retval FDS_SUCCESS If a record was found. - * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. - * @retval FDS_ERR_NULL_ARG If @p p_desc or @p p_token is NULL. - * @retval FDS_ERR_NOT_FOUND If no matching record was found. - */ -ret_code_t fds_record_iterate(fds_record_desc_t * p_desc, - fds_find_token_t * p_token); - - -/**@brief Function for searching for records with a given record key in a file. - * - * This function finds the first record in a file that has the given record key. To search for the - * next record with the same key in the file, call the function again and supply the same - * @ref fds_find_token_t structure to resume searching from the last record that was found. - * - * @param[in] file_id The file ID. - * @param[in] record_key The record key. - * @param[out] p_desc The descriptor of the record that was found. - * @param[out] p_token A token containing information about the progress of the operation. - * - * @retval FDS_SUCCESS If a record was found. - * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. - * @retval FDS_ERR_NULL_ARG If @p p_desc or @p p_token is NULL. - * @retval FDS_ERR_NOT_FOUND If no matching record was found. - */ -ret_code_t fds_record_find(uint16_t file_id, - uint16_t record_key, - fds_record_desc_t * p_desc, - fds_find_token_t * p_token); - - -/**@brief Function for searching for records with a given record key. - * - * This function finds the first record with a given record key, independent of the file it - * belongs to. To search for the next record with the same key, call the function again and supply - * the same @ref fds_find_token_t structure to resume searching from the last record that was found. - * - * @param[in] record_key The record key. - * @param[out] p_desc The descriptor of the record that was found. - * @param[out] p_token A token containing information about the progress of the operation. - * - * @retval FDS_SUCCESS If a record was found. - * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. - * @retval FDS_ERR_NULL_ARG If @p p_desc or @p p_token is NULL. - * @retval FDS_ERR_NOT_FOUND If no record with the given key was found. - */ -ret_code_t fds_record_find_by_key(uint16_t record_key, - fds_record_desc_t * p_desc, - fds_find_token_t * p_token); - - -/**@brief Function for searching for any record in a file. - * - * This function finds the first record in a file, independent of its record key. - * To search for the next record in the same file, call the function again and supply the same - * @ref fds_find_token_t structure to resume searching from the last record that was found. - * - * @param[in] file_id The file ID. - * @param[out] p_desc The descriptor of the record that was found. - * @param[out] p_token A token containing information about the progress of the operation. - * - * @retval FDS_SUCCESS If a record was found. - * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. - * @retval FDS_ERR_NULL_ARG If @p p_desc or @p p_token is NULL. - * @retval FDS_ERR_NOT_FOUND If no matching record was found. - */ -ret_code_t fds_record_find_in_file(uint16_t file_id, - fds_record_desc_t * p_desc, - fds_find_token_t * p_token); - - -/**@brief Function for opening a record for reading. - * - * This function opens a record that is stored in flash, so that it can be read. The function - * initializes an @ref fds_flash_record_t structure, which can be used to access the record data as - * well as its associated metadata. The pointers provided in the @ref fds_flash_record_t structure - * are pointers to flash memory. - * - * Opening a record with @ref fds_record_open prevents garbage collection to run on the virtual - * flash page in which record is stored, so that the contents of the memory pointed by fields in - * @ref fds_flash_record_t are guaranteed to remain unmodified as long as the record is kept open. - * - * When you are done reading a record, call @ref fds_record_close to close it. Garbage collection - * can then reclaim space on the virtual page where the record is stored. Note that you must - * provide the same descriptor for @ref fds_record_close as you did for this function. - * - * @param[in] p_desc The descriptor of the record to open. - * @param[out] p_flash_record The record, as stored in flash. - * - * @retval FDS_SUCCESS If the record was opened successfully. - * @retval FDS_ERR_NULL_ARG If @p p_desc or @p p_flash_record is NULL. - * @retval FDS_ERR_NOT_FOUND If the record was not found. It might have been deleted, or - * it might not have been written yet. - * @retval FDS_ERR_CRC_CHECK_FAILED If the CRC check for the record failed. - */ -ret_code_t fds_record_open(fds_record_desc_t * p_desc, - fds_flash_record_t * p_flash_record); - - -/**@brief Function for closing a record. - * - * Closing a record allows garbage collection to run on the virtual page in which the record is - * stored (if no other records remain open on that page). The descriptor passed as an argument - * must be the same as the one used to open the record using @ref fds_record_open. - * - * Note that closing a record does not invalidate its descriptor. You can still supply the - * descriptor to all functions that accept a record descriptor as a parameter. - * - * @param[in] p_desc The descriptor of the record to close. - * - * @retval FDS_SUCCESS If the record was closed successfully. - * @retval FDS_ERR_NULL_ARG If @p p_desc is NULL. - * @retval FDS_ERR_NO_OPEN_RECORDS If the record is not open. - * @retval FDS_ERR_NOT_FOUND If the record could not be found. - */ -ret_code_t fds_record_close(fds_record_desc_t * p_desc); - - -/**@brief Function for running garbage collection. - * - * Garbage collection reclaims the flash space that is occupied by records that have been deleted, - * or that failed to be completely written due to, for example, a power loss. - * - * This function is asynchronous. Completion is reported through an event that is sent to the - * registered event handler function. - * - * @retval FDS_SUCCESS If the operation was queued successfully. - * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. - * @retval FDS_ERR_NO_SPACE_IN_QUEUES If the operation queue is full. - */ -ret_code_t fds_gc(void); - - -/**@brief Function for obtaining a descriptor from a record ID. - * - * This function can be used to reconstruct a descriptor from a record ID, like the one that is - * passed to the callback function. - * - * @note - * This function does not check whether a record with the given record ID exists. - * If a non-existing record ID is supplied, the resulting descriptor is invalid and will cause - * other functions to fail when it is supplied as parameter. - * - * @param[out] p_desc The descriptor of the record with the given record ID. - * @param[in] record_id The record ID for which a descriptor should be returned. - * - * @retval FDS_SUCCESS If a descriptor was returned. - * @retval FDS_ERR_NULL_ARG If @p p_desc is NULL. - */ -ret_code_t fds_descriptor_from_rec_id(fds_record_desc_t * p_desc, - uint32_t record_id); - - -/**@brief Function for obtaining a record ID from a record descriptor. - * - * This function can be used to extract a record ID from a descriptor. For example, you could use - * it in the callback function to compare the record ID of an event to the record IDs of the - * records for which you have a descriptor. - * - * @warning - * This function does not check whether the record descriptor is valid. If the descriptor is not - * initialized or has been tampered with, the resulting record ID might be invalid. - * - * @param[in] p_desc The descriptor from which the record ID should be extracted. - * @param[out] p_record_id The record ID that is contained in the given descriptor. - * - * @retval FDS_SUCCESS If a record ID was returned. - * @retval FDS_ERR_NULL_ARG If @p p_desc or @p p_record_id is NULL. - */ -ret_code_t fds_record_id_from_desc(fds_record_desc_t const * p_desc, - uint32_t * p_record_id); - - -/**@brief Function for retrieving file system statistics. - * - * This function retrieves file system statistics, such as the number of open records, the space - * that can be reclaimed by garbage collection, and others. - * - * @param[out] p_stat File system statistics. - * - * @retval FDS_SUCCESS If the statistics were returned successfully. - * @retval FDS_ERR_NOT_INITIALIZED If the module is not initialized. - * @retval FDS_ERR_NULL_ARG If @p p_stat is NULL. - */ -ret_code_t fds_stat(fds_stat_t * p_stat); - - -/** @} */ - - -#ifdef __cplusplus -} -#endif - -#endif // FDS_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/fds/fds_internal_defs.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/fds/fds_internal_defs.h deleted file mode 100644 index 0d490cac861..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/fds/fds_internal_defs.h +++ /dev/null @@ -1,327 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef FDS_INTERNAL_DEFS_H__ -#define FDS_INTERNAL_DEFS_H__ -#include "sdk_config.h" -#include -#include - -#if defined (FDS_THREADS) - #include "nrf_soc.h" - #include "app_util_platform.h" -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -#define FDS_PAGE_TAG_SIZE (2) // Page tag size, in 4-byte words. -#define FDS_PAGE_TAG_WORD_0 (0) // Offset of the first word in the page tag from the page address. -#define FDS_PAGE_TAG_WORD_1 (1) // Offset of the second word in the page tag from the page address. - -// Page tag constants -#define FDS_PAGE_TAG_MAGIC (0xDEADC0DE) -#define FDS_PAGE_TAG_SWAP (0xF11E01FF) -#define FDS_PAGE_TAG_DATA (0xF11E01FE) - -#define FDS_ERASED_WORD (0xFFFFFFFF) - -#define FDS_OFFSET_TL (0) // Offset of TL from the record base address, in 4-byte words. -#define FDS_OFFSET_IC (1) // Offset of IC from the record base address, in 4-byte words. -#define FDS_OFFSET_ID (2) // Offset of ID from the record base address, in 4-byte words. -#define FDS_OFFSET_DATA (3) // Offset of the data from the record base address, in 4-byte words. - -#define FDS_HEADER_SIZE_TL (1) // Size of the TL part of the header, in 4-byte words. -#define FDS_HEADER_SIZE_IC (1) // Size of the IC part of the header, in 4-byte words. -#define FDS_HEADER_SIZE_ID (1) // Size of the record ID in the header, in 4-byte words. -#define FDS_HEADER_SIZE (3) // Size of the whole header, in 4-byte words. - -#define FDS_OP_EXECUTING (NRF_SUCCESS) -#define FDS_OP_COMPLETED (0x1D1D) - -#define NRF_FSTORAGE_NVMC 1 -#define NRF_FSTORAGE_SD 2 - -// The size of a physical page, in 4-byte words. -#if defined(NRF51) - #define FDS_PHY_PAGE_SIZE (256) - #elif defined(NRF52_SERIES) - #define FDS_PHY_PAGE_SIZE (1024) -#endif - -// The number of physical pages to be used. This value is configured indirectly. -#define FDS_PHY_PAGES ((FDS_VIRTUAL_PAGES * FDS_VIRTUAL_PAGE_SIZE) / FDS_PHY_PAGE_SIZE) - -// The size of a virtual page, in number of physical pages. -#define FDS_PHY_PAGES_IN_VPAGE (FDS_VIRTUAL_PAGE_SIZE / FDS_PHY_PAGE_SIZE) - -// The number of pages available to store data; which is the total minus one (the swap). -#define FDS_DATA_PAGES (FDS_VIRTUAL_PAGES - 1) - - // Just a shorter name for the size, in words, of a virtual page. -#define FDS_PAGE_SIZE (FDS_VIRTUAL_PAGE_SIZE) - - -#if (FDS_VIRTUAL_PAGE_SIZE % FDS_PHY_PAGE_SIZE != 0) - #error "FDS_VIRTUAL_PAGE_SIZE must be a multiple of the size of a physical page." -#endif - -#if (FDS_VIRTUAL_PAGES < 2) - #error "FDS requires at least two virtual pages." -#endif - - -// Page types. -typedef enum -{ - FDS_PAGE_DATA, // Page is ready for storage. - FDS_PAGE_SWAP, // Page is reserved for garbage collection. - FDS_PAGE_ERASED, // Page is erased. - FDS_PAGE_UNDEFINED, // Undefined page type. -} fds_page_type_t; - - -typedef enum -{ - FDS_HEADER_VALID, // Valid header. - FDS_HEADER_DIRTY, // Header is incomplete, or record has been deleted. - FDS_HEADER_CORRUPT // Header contains corrupt information, not related to CRC. -} fds_header_status_t; - - -typedef struct -{ - fds_page_type_t page_type; // The page type. - uint32_t const * p_addr; // The address of the page. - uint16_t write_offset; // The page write offset, in 4-byte words. - uint16_t words_reserved; // The amount of words reserved. - uint32_t volatile records_open; // The number of open records. - bool can_gc; // Indicates that there are some records that have been deleted. -} fds_page_t; - - -typedef struct -{ - uint32_t const * p_addr; - uint16_t write_offset; -} fds_swap_page_t; - - -// FDS op-codes. -typedef enum -{ - FDS_OP_NONE, - FDS_OP_INIT, // Initialize the module. - FDS_OP_WRITE, // Write a record to flash. - FDS_OP_UPDATE, // Update a record. - FDS_OP_DEL_RECORD, // Delete a record. - FDS_OP_DEL_FILE, // Delete a file. - FDS_OP_GC // Run garbage collection. -} fds_op_code_t; - - -typedef enum -{ - FDS_OP_INIT_TAG_SWAP, - FDS_OP_INIT_TAG_DATA, - FDS_OP_INIT_ERASE_SWAP, - FDS_OP_INIT_PROMOTE_SWAP, -} fds_init_step_t; - - -typedef enum -{ - FDS_OP_WRITE_HEADER_BEGIN, // Write the record key and length. - FDS_OP_WRITE_HEADER_FINALIZE, // Write the file ID and CRC. - FDS_OP_WRITE_RECORD_ID, // Write the record ID. - FDS_OP_WRITE_DATA, // Write the record data. - FDS_OP_WRITE_FIND_RECORD, - FDS_OP_WRITE_FLAG_DIRTY, // Flag a record as dirty (as part of an update operation). - FDS_OP_WRITE_DONE, -} fds_write_step_t; - - -typedef enum -{ - FDS_OP_DEL_RECORD_FLAG_DIRTY, // Flag a record as dirty. - FDS_OP_DEL_FILE_FLAG_DIRTY, // Flag multiple records as dirty. - FDS_OP_DEL_DONE, -} fds_delete_step_t; - - -#if defined(__CC_ARM) - #pragma push - #pragma anon_unions -#elif defined(__ICCARM__) - #pragma language=extended -#elif defined(__GNUC__) - // anonymous unions are enabled by default -#endif - -typedef struct -{ - fds_op_code_t op_code; // The opcode for the operation. - union - { - struct - { - fds_init_step_t step; // The current step the operation is at. - } init; - struct - { - fds_header_t header; - void const * p_data; - uint16_t page; // The page the flash space for this command was reserved. - fds_write_step_t step; // The current step the operation is at. - uint32_t record_to_delete; // The record to delete in case this is an update. - } write; - struct - { - fds_delete_step_t step; - uint16_t file_id; - uint16_t record_key; - uint32_t record_to_delete; - } del; - }; -} fds_op_t; - -#if defined(__CC_ARM) - #pragma pop -#elif defined(__ICCARM__) - // leave anonymous unions enabled -#elif defined(__GNUC__) - // anonymous unions are enabled by default -#endif - - -enum -{ - PAGE_ERASED = 0x1, // One or more erased pages found. - PAGE_DATA = 0x2, // One or more data pages found. - PAGE_SWAP_CLEAN = 0x4, // A clean (empty) swap page was found. - PAGE_SWAP_DIRTY = 0x8, // A dirty (non-empty) swap page was found. -}; - - -typedef enum -{ - // No erased pages or FDS pages found. - // This is a fatal error. - NO_PAGES, - - // The filesystem can not be garbage collected. - // This is a fatal error. - NO_SWAP = (PAGE_DATA), - - // Perform a fresh installation. - FRESH_INSTALL = (PAGE_ERASED), - - // Tag an erased page as swap. - TAG_SWAP = (PAGE_ERASED | PAGE_DATA), - - // Tag all erased pages as data. - TAG_DATA = (PAGE_ERASED | PAGE_SWAP_CLEAN), - - // Tag all remaining erased pages as data. - TAG_DATA_INST = (PAGE_ERASED | PAGE_DATA | PAGE_SWAP_CLEAN), - - // The swap is dirty, likely because the device powered off during GC. - // Because there is also an erased page, assume that that page has been garbage collected. - // Hence, tag the swap as data (promote), an erased page as swap and remaining pages as data. - PROMOTE_SWAP = (PAGE_ERASED | PAGE_SWAP_DIRTY), - - // Tag the swap as data (promote), an erased page as swap and remaining pages as data. - PROMOTE_SWAP_INST = (PAGE_ERASED | PAGE_DATA | PAGE_SWAP_DIRTY), - - // The swap is dirty (written) and there are no erased pages. It is likely that the device - // powered off during GC. It is safe to discard (erase) the swap, since data that was - // swapped out still lies in one of the valid pages. - DISCARD_SWAP = (PAGE_DATA | PAGE_SWAP_DIRTY), - - // Do nothing. - ALREADY_INSTALLED = (PAGE_DATA | PAGE_SWAP_CLEAN), - -} fds_init_opts_t; - - -typedef enum -{ - GC_BEGIN, // Begin GC. - GC_NEXT_PAGE, // GC a page. - GC_FIND_NEXT_RECORD, // Find a valid record to copy. - GC_COPY_RECORD, // Copy a valid record to swap. - GC_ERASE_PAGE, // Erase the page being garbage collected. - GC_DISCARD_SWAP, // Erase (discard) the swap page. - GC_PROMOTE_SWAP, // Tag the swap as valid. - GC_TAG_NEW_SWAP // Tag a freshly erased (GCed) page as swap. -} fds_gc_state_t; - - -// Holds garbage collection status and related data. -typedef struct -{ - fds_gc_state_t state; // The current GC step. - uint16_t cur_page; // The current page being garbage collected. - uint32_t const * p_record_src; // The current record being copied to swap. - uint16_t run_count; // Total number of times GC was run. - bool do_gc_page[FDS_DATA_PAGES]; // Controls which pages to garbage collect. - bool resume; // Whether or not GC should be resumed. -} fds_gc_data_t; - - -// Macros to enable and disable application interrupts. -#if defined (FDS_THREADS) - - #define CRITICAL_SECTION_ENTER() CRITICAL_REGION_ENTER() - #define CRITICAL_SECTION_EXIT() CRITICAL_REGION_EXIT() - -#else - - #define CRITICAL_SECTION_ENTER() - #define CRITICAL_SECTION_EXIT() - -#endif - - -#ifdef __cplusplus -} -#endif - -#endif // FDS_INTERNAL_DEFS_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/fstorage/nrf_fstorage.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/fstorage/nrf_fstorage.c deleted file mode 100644 index b0d013a6eca..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/fstorage/nrf_fstorage.c +++ /dev/null @@ -1,257 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_config.h" - -#if NRF_FSTORAGE_ENABLED - -#include "nrf_fstorage.h" -#include -#include -#include "sdk_errors.h" -#include "nrf_section.h" - - -/* Create the section "fs_data". */ -NRF_SECTION_DEF(fs_data, nrf_fstorage_t); - -static bool addr_within_bounds(nrf_fstorage_t const * p_fs, uint32_t addr, uint32_t len); -static bool addr_is_aligned32(uint32_t addr); - - -ret_code_t nrf_fstorage_init(nrf_fstorage_t * p_fs, - nrf_fstorage_api_t * p_api, - void * p_param) -{ - if ((p_fs == NULL) || (p_api == NULL)) - { - return NRF_ERROR_NULL; - } - - p_fs->p_api = p_api; - - return (p_fs->p_api)->init(p_fs, p_param); -} - - -ret_code_t nrf_fstorage_uninit(nrf_fstorage_t * p_fs, - void * p_param) -{ - ret_code_t rc; - - if (p_fs == NULL) - { - return NRF_ERROR_NULL; - } - - if (p_fs->p_api == NULL) - { - return NRF_ERROR_INVALID_STATE; - } - - rc = (p_fs->p_api)->uninit(p_fs, p_param); - - /* Uninitialize the API. */ - p_fs->p_api = NULL; - p_fs->p_flash_info = NULL; - - return rc; -} - - -ret_code_t nrf_fstorage_read(nrf_fstorage_t const * p_fs, - uint32_t src, - void * p_dest, - uint32_t len) -{ - if ((p_fs == NULL) || (p_dest == NULL)) - { - return NRF_ERROR_NULL; - } - - if (p_fs->p_api == NULL) - { - return NRF_ERROR_INVALID_STATE; - } - - if (len == 0) - { - return NRF_ERROR_INVALID_LENGTH; - } - - /* Source addres must be word-aligned. */ - if ( !addr_is_aligned32(src) - || !addr_within_bounds(p_fs, src, len)) - { - return NRF_ERROR_INVALID_ADDR; - } - - return (p_fs->p_api)->read(p_fs, src, p_dest, len); -} - - -ret_code_t nrf_fstorage_write(nrf_fstorage_t const * p_fs, - uint32_t dest, - void const * p_src, - uint32_t len, - void * p_context) -{ - if ((p_fs == NULL) || (p_src == NULL)) - { - return NRF_ERROR_NULL; - } - - if (p_fs->p_api == NULL) - { - return NRF_ERROR_INVALID_STATE; - } - - /* Length must be a multiple of the program unit. */ - if ((len == 0) || ((len % p_fs->p_flash_info->program_unit) != 0)) - { - return NRF_ERROR_INVALID_LENGTH; - } - - /* Source and destination addresses must be word-aligned. */ - if ( !addr_is_aligned32(dest) - || !addr_is_aligned32((uint32_t)p_src) - || !addr_within_bounds(p_fs, dest, len)) - { - return NRF_ERROR_INVALID_ADDR; - } - - return (p_fs->p_api)->write(p_fs, dest, p_src, len, p_context); -} - - -ret_code_t nrf_fstorage_erase(nrf_fstorage_t const * p_fs, - uint32_t page_addr, - uint32_t len, - void * p_context) -{ - if (p_fs == NULL) - { - return NRF_ERROR_NULL; - } - - if (p_fs->p_api == NULL) - { - return NRF_ERROR_INVALID_STATE; - } - - if (len == 0) - { - return NRF_ERROR_INVALID_LENGTH; - } - - /* Address must be aligned to a page boundary. */ - if ( ((page_addr & (p_fs->p_flash_info->erase_unit - 1)) != 0) - || !addr_within_bounds(p_fs, page_addr, (len * p_fs->p_flash_info->erase_unit))) - { - return NRF_ERROR_INVALID_ADDR; - } - - return (p_fs->p_api)->erase(p_fs, page_addr, len, p_context); -} - - -uint8_t const * nrf_fstorage_rmap(nrf_fstorage_t const * p_fs, uint32_t addr) -{ - if (p_fs == NULL) - { - return NULL; - } - - return (p_fs->p_api)->rmap(p_fs, addr); -} - - -uint8_t * nrf_fstorage_wmap(nrf_fstorage_t const * p_fs, uint32_t addr) -{ - if (p_fs == NULL) - { - return NULL; - } - - return (p_fs->p_api)->wmap(p_fs, addr); -} - - -bool nrf_fstorage_is_busy(nrf_fstorage_t const * p_fs) -{ - /* If a NULL instance is provided, return true if any instance is busy. - * Uninitialized instances are considered not busy. */ - if ((p_fs == NULL) || (p_fs->p_api == NULL)) - { - for (uint32_t i = 0; i < NRF_FSTORAGE_INSTANCE_CNT; i++) - { - p_fs = NRF_FSTORAGE_INSTANCE_GET(i); /* cannot be NULL. */ - if (p_fs->p_api != NULL) - { - /* p_api->is_busy() cannot be NULL. */ - if (p_fs->p_api->is_busy(p_fs)) - { - return true; - } - } - } - - return false; - } - - return p_fs->p_api->is_busy(p_fs); -} - - -static bool addr_within_bounds(nrf_fstorage_t const * p_fs, - uint32_t addr, - uint32_t len) -{ - return ((addr >= p_fs->start_addr) && - (addr + len - 1 <= p_fs->end_addr)); -} - - -static bool addr_is_aligned32(uint32_t addr) -{ - return !(addr & 0x03); -} - - -#endif // NRF_FSTORAGE_ENABLED diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/fstorage/nrf_fstorage.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/fstorage/nrf_fstorage.h deleted file mode 100644 index 118753f4790..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/fstorage/nrf_fstorage.h +++ /dev/null @@ -1,340 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_FSTORAGE_H__ -#define NRF_FSTORAGE_H__ - -/** - * @file - * - * @defgroup nrf_fstorage Flash storage (fstorage) - * @ingroup app_common - * @{ - * - * @brief Flash abstraction library that provides basic read, write, and erase operations. - * - * @details The fstorage library can be implemented in different ways. Two implementations are provided: - * - The @ref nrf_fstorage_sd implements flash access through the SoftDevice. - * - The @ref nrf_fstorage_nvmc implements flash access through the non-volatile memory controller. - * - * You can select the implementation that should be used independently for each instance of fstorage. - */ - -#include -#include -#include "sdk_errors.h" -#include "nrf_section.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -/**@brief Macro for defining an fstorage instance. - * - * Users of fstorage must define an instance variable by using this macro. - * Each instance is tied to an API implementation and contains information such - * as the program and erase units for the target flash peripheral. - * Instance variables are placed in the "fs_data" section of the binary. - * - * @param[in] inst A definition of an @ref nrf_fstorage_t variable. - */ -#define NRF_FSTORAGE_DEF(inst) NRF_SECTION_ITEM_REGISTER(fs_data, inst) - -/**@brief Macro for retrieving an fstorage instance. */ -#define NRF_FSTORAGE_INSTANCE_GET(i) NRF_SECTION_ITEM_GET(fs_data, nrf_fstorage_t, (i)) - -/**@brief Macro for retrieving the total number of fstorage instances. */ -#define NRF_FSTORAGE_INSTANCE_CNT NRF_SECTION_ITEM_COUNT(fs_data, nrf_fstorage_t) - - -/**@brief Event IDs. */ -typedef enum -{ - NRF_FSTORAGE_EVT_READ_RESULT, - NRF_FSTORAGE_EVT_WRITE_RESULT, //!< Event for @ref nrf_fstorage_write. - NRF_FSTORAGE_EVT_ERASE_RESULT //!< Event for @ref nrf_fstorage_erase. -} nrf_fstorage_evt_id_t; - - -/**@brief An fstorage event. */ -typedef struct -{ - nrf_fstorage_evt_id_t id; //!< The event ID. - ret_code_t result; //!< Result of the operation. - uint32_t addr; //!< Address at which the operation was performed. - uint32_t len; //!< Length of the operation. - void * p_param; //!< User-defined parameter passed to the event handler. -} nrf_fstorage_evt_t; - - -/**@brief Event handler function prototype. - * - * @param[in] p_evt The event. - */ -typedef void (*nrf_fstorage_evt_handler_t)(nrf_fstorage_evt_t * p_evt); - - -/**@brief Information about the implementation and the flash peripheral. */ -typedef struct -{ - uint32_t erase_unit; //!< Size of a flash page (in bytes). A flash page is the smallest unit that can be erased. - uint32_t program_unit; //!< Size of the smallest programmable unit (in bytes). - bool rmap; //!< The device address space is memory mapped to the MCU address space. - bool wmap; //!< The device address space is memory mapped to a writable MCU address space. -} const nrf_fstorage_info_t; - - -/* Necessary forward declaration. */ -struct nrf_fstorage_api_s; - - -/**@brief An fstorage instance. - * - * @details Use the @ref NRF_FSTORAGE_DEF macro to define an fstorage instance. - * - * An instance is tied to an API implementation and contains information about the flash device, - * such as the program and erase units as well and implementation-specific functionality. - */ -typedef struct -{ - /**@brief The API implementation used by this instance. */ - struct nrf_fstorage_api_s const * p_api; - - /**@brief Information about the implementation functionality and the flash peripheral. */ - nrf_fstorage_info_t * p_flash_info; - - /**@brief The event handler function. - * - * If set to NULL, no events will be sent. - */ - nrf_fstorage_evt_handler_t evt_handler; - - /**@brief The beginning of the flash space on which this fstorage instance should operate. - * All flash operations must be within the address specified in - * this field and @ref end_addr. - * - * This field must be set manually. - */ - uint32_t start_addr; - - /**@brief The last address (exclusive) of flash on which this fstorage instance should operate. - * All flash operations must be within the address specified in - * this field and @ref start_addr. - * - * This field must be set manually. - */ - uint32_t end_addr; -} nrf_fstorage_t; - - -/**@brief Functions provided by the API implementation. */ -typedef struct nrf_fstorage_api_s -{ - /**@brief Initialize the flash peripheral. */ - ret_code_t (*init)(nrf_fstorage_t * p_fs, void * p_param); - /**@brief Uninitialize the flash peripheral. */ - ret_code_t (*uninit)(nrf_fstorage_t * p_fs, void * p_param); - /**@brief Read data from flash. */ - ret_code_t (*read)(nrf_fstorage_t const * p_fs, uint32_t src, void * p_dest, uint32_t len); - /**@brief Write bytes to flash. */ - ret_code_t (*write)(nrf_fstorage_t const * p_fs, uint32_t dest, void const * p_src, uint32_t len, void * p_param); - /**@brief Erase flash pages. */ - ret_code_t (*erase)(nrf_fstorage_t const * p_fs, uint32_t addr, uint32_t len, void * p_param); - /**@brief Map a device address to a readable address within the MCU address space. */ - uint8_t const * (*rmap)(nrf_fstorage_t const * p_fs, uint32_t addr); - /**@brief Map a device address to a writable address within the MCU address space. */ - uint8_t * (*wmap)(nrf_fstorage_t const * p_fs, uint32_t addr); - /**@brief Check if there are any pending flash operations. */ - bool (*is_busy)(nrf_fstorage_t const * p_fs); -} const nrf_fstorage_api_t; - - -/**@brief Function for initializing fstorage. - * - * @param[in] p_fs The fstorage instance to initialize. - * @param[in] p_api The API implementation to use. - * @param[in] p_param An optional parameter to pass to the implementation-specific API call. - * - * @retval NRF_SUCCESS If initialization was successful. - * @retval NRF_ERROR_NULL If @p p_fs or @p p_api field in @p p_fs is NULL. - * @retval NRF_ERROR_INTERNAL If another error occurred. - */ -ret_code_t nrf_fstorage_init(nrf_fstorage_t * p_fs, - nrf_fstorage_api_t * p_api, - void * p_param); - - -/**@brief Function for uninitializing an fstorage instance. - * - * @param[in] p_fs The fstorage instance to uninitialize. - * @param[in] p_param An optional parameter to pass to the implementation-specific API call. - * - * @retval NRF_SUCCESS If uninitialization was successful. - * @retval NRF_ERROR_NULL If @p p_fs is NULL. - * @retval NRF_ERROR_INVALID_STATE If the module is not initialized. - * @retval NRF_ERROR_INTERNAL If another error occurred. - */ -ret_code_t nrf_fstorage_uninit(nrf_fstorage_t * p_fs, void * p_param); - - -/**@brief Function for reading data from flash. - * - * Copy @p len bytes from @p addr to @p p_dest. - * - * @param[in] p_fs The fstorage instance. - * @param[in] addr Address in flash where to read from. - * @param[in] p_dest Buffer where the data should be copied. - * @param[in] len Length of the data to be copied (in bytes). - * - * @retval NRF_SUCCESS If the operation was successful. - * @retval NRF_ERROR_NULL If @p p_fs or @p p_dest is NULL. - * @retval NRF_ERROR_INVALID_STATE If the module is not initialized. - * @retval NRF_ERROR_INVALID_LENGTH If @p len is zero or otherwise invalid. - * @retval NRF_ERROR_INVALID_ADDR If the address @p addr is outside the flash memory - * boundaries specified in @p p_fs, or if it is unaligned. - */ -ret_code_t nrf_fstorage_read(nrf_fstorage_t const * p_fs, - uint32_t addr, - void * p_dest, - uint32_t len); - - -/**@brief Function for writing data to flash. - * - * Write @p len bytes from @p p_src to @p dest. - * - * When using @ref nrf_fstorage_sd, the data is written by several calls to @ref sd_flash_write if - * the length of the data exceeds @ref NRF_FSTORAGE_SD_MAX_WRITE_SIZE bytes. - * Only one event is sent upon completion. - * - * @note The data to be written to flash must be kept in memory until the operation has - * terminated and an event is received. - * - * @param[in] p_fs The fstorage instance. - * @param[in] dest Address in flash memory where to write the data. - * @param[in] p_src Data to be written. - * @param[in] len Length of the data (in bytes). - * @param[in] p_param User-defined parameter passed to the event handler (may be NULL). - * - * @retval NRF_SUCCESS If the operation was accepted. - * @retval NRF_ERROR_NULL If @p p_fs or @p p_src is NULL. - * @retval NRF_ERROR_INVALID_STATE If the module is not initialized. - * @retval NRF_ERROR_INVALID_LENGTH If @p len is zero or not a multiple of the program unit, - * or if it is otherwise invalid. - * @retval NRF_ERROR_INVALID_ADDR If the address @p dest is outside the flash memory - * boundaries specified in @p p_fs, or if it is unaligned. - * @retval NRF_ERROR_NO_MEM If no memory is available to accept the operation. - * When using the @ref nrf_fstorage_sd, this error - * indicates that the internal queue of operations is full. - */ -ret_code_t nrf_fstorage_write(nrf_fstorage_t const * p_fs, - uint32_t dest, - void const * p_src, - uint32_t len, - void * p_param); - - -/**@brief Function for erasing flash pages. - * - * @details This function erases @p len pages starting from the page at address @p page_addr. - * The erase operation must be initiated on a page boundary. - * - * @param[in] p_fs The fstorage instance. - * @param[in] page_addr Address of the page to erase. - * @param[in] len Number of pages to erase. - * @param[in] p_param User-defined parameter passed to the event handler (may be NULL). - * - * @retval NRF_SUCCESS If the operation was accepted. - * @retval NRF_ERROR_NULL If @p p_fs is NULL. - * @retval NRF_ERROR_INVALID_STATE If the module is not initialized. - * @retval NRF_ERROR_INVALID_LENGTH If @p len is zero. - * @retval NRF_ERROR_INVALID_ADDR If the address @p page_addr is outside the flash memory - * boundaries specified in @p p_fs, or if it is unaligned. - * @retval NRF_ERROR_NO_MEM If no memory is available to accept the operation. - * When using the @ref nrf_fstorage_sd, this error - * indicates that the internal queue of operations is full. - */ -ret_code_t nrf_fstorage_erase(nrf_fstorage_t const * p_fs, - uint32_t page_addr, - uint32_t len, - void * p_param); - - -/**@brief Map a flash address to a pointer in the MCU address space that can be dereferenced. - * - * @param p_fs The fstorage instance. - * @param addr The address to map. - * - * @retval A pointer to the specified address, - * or @c NULL if the address cannot be mapped or if @p p_fs is @c NULL. - */ -uint8_t const * nrf_fstorage_rmap(nrf_fstorage_t const * p_fs, uint32_t addr); - - -/**@brief Map a flash address to a pointer in the MCU address space that can be written to. - * - * @param p_fs The fstorage instance. - * @param addr The address to map. - * - * @retval A pointer to the specified address, - * or @c NULL if the address cannot be mapped or if @p p_fs is @c NULL. - */ -uint8_t * nrf_fstorage_wmap(nrf_fstorage_t const * p_fs, uint32_t addr); - - -/**@brief Function for querying the status of fstorage. - * - * @details An uninitialized instance of fstorage is treated as not busy. - * - * @param[in] p_fs The fstorage instance. Pass NULL to query all instances. - * - * @returns If @p p_fs is @c NULL, this function returns true if any fstorage instance is busy or false otherwise. - * @returns If @p p_fs is not @c NULL, this function returns true if the fstorage instance is busy or false otherwise. - */ - bool nrf_fstorage_is_busy(nrf_fstorage_t const * p_fs); - -/** @} */ - - -#ifdef __cplusplus -} -#endif - -#endif // NRF_FSTORAGE_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/queue/nrf_queue.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/queue/nrf_queue.c deleted file mode 100644 index 62b7a8ba5a7..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/queue/nrf_queue.c +++ /dev/null @@ -1,464 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(NRF_QUEUE) -#include "nrf_queue.h" -#include "app_util_platform.h" - -/**@brief Get next element index. - * - * @param[in] p_queue Pointer to the queue instance. - * @param[in] idx Current index. - * - * @return Next element index. - */ -__STATIC_INLINE size_t nrf_queue_next_idx(nrf_queue_t const * p_queue, size_t idx) -{ - ASSERT(p_queue != NULL); - return (idx < p_queue->size) ? (idx + 1) : 0; -} - -/**@brief Get current queue utilization. This function assumes that this process will not be interrupted. - * - * @param[in] p_queue Pointer to the queue instance. - * - * @return Current queue utilization. - */ -__STATIC_INLINE size_t queue_utilization_get(nrf_queue_t const * p_queue) -{ - size_t front = p_queue->p_cb->front; - size_t back = p_queue->p_cb->back; - return (back >= front) ? (back - front) : (p_queue->size + 1 - front + back); -} - -bool nrf_queue_is_full(nrf_queue_t const * p_queue) -{ - ASSERT(p_queue != NULL); - size_t front = p_queue->p_cb->front; - size_t back = p_queue->p_cb->back; - - return (nrf_queue_next_idx(p_queue, back) == front); -} - -ret_code_t nrf_queue_push(nrf_queue_t const * p_queue, void const * p_element) -{ - ret_code_t status = NRF_SUCCESS; - - ASSERT(p_queue != NULL); - ASSERT(p_element != NULL); - - CRITICAL_REGION_ENTER(); - bool is_full = nrf_queue_is_full(p_queue); - - if (!is_full || (p_queue->mode == NRF_QUEUE_MODE_OVERFLOW)) - { - // Get write position. - size_t write_pos = p_queue->p_cb->back; - p_queue->p_cb->back = nrf_queue_next_idx(p_queue, p_queue->p_cb->back); - if (is_full) - { - // Overwrite the oldest element. - p_queue->p_cb->front = nrf_queue_next_idx(p_queue, p_queue->p_cb->front); - } - - // Write a new element. - switch (p_queue->element_size) - { - case sizeof(uint8_t): - ((uint8_t *)p_queue->p_buffer)[write_pos] = *((uint8_t *)p_element); - break; - - case sizeof(uint16_t): - ((uint16_t *)p_queue->p_buffer)[write_pos] = *((uint16_t *)p_element); - break; - - case sizeof(uint32_t): - ((uint32_t *)p_queue->p_buffer)[write_pos] = *((uint32_t *)p_element); - break; - - case sizeof(uint64_t): - ((uint64_t *)p_queue->p_buffer)[write_pos] = *((uint64_t *)p_element); - break; - - default: - memcpy((void *)((size_t)p_queue->p_buffer + write_pos * p_queue->element_size), - p_element, - p_queue->element_size); - break; - } - - // Update utilization. - size_t utilization = queue_utilization_get(p_queue); - if (p_queue->p_cb->max_utilization < utilization) - { - p_queue->p_cb->max_utilization = utilization; - } - } - else - { - status = NRF_ERROR_NO_MEM; - } - - CRITICAL_REGION_EXIT(); - - return status; -} - -ret_code_t nrf_queue_generic_pop(nrf_queue_t const * p_queue, - void * p_element, - bool just_peek) -{ - ret_code_t status = NRF_SUCCESS; - - ASSERT(p_queue != NULL); - ASSERT(p_element != NULL); - - CRITICAL_REGION_ENTER(); - - if (!nrf_queue_is_empty(p_queue)) - { - // Get read position. - size_t read_pos = p_queue->p_cb->front; - - // Update next read position. - if (!just_peek) - { - p_queue->p_cb->front = nrf_queue_next_idx(p_queue, p_queue->p_cb->front); - } - - // Read element. - switch (p_queue->element_size) - { - case sizeof(uint8_t): - *((uint8_t *)p_element) = ((uint8_t *)p_queue->p_buffer)[read_pos]; - break; - - case sizeof(uint16_t): - *((uint16_t *)p_element) = ((uint16_t *)p_queue->p_buffer)[read_pos]; - break; - - case sizeof(uint32_t): - *((uint32_t *)p_element) = ((uint32_t *)p_queue->p_buffer)[read_pos]; - break; - - case sizeof(uint64_t): - *((uint64_t *)p_element) = ((uint64_t *)p_queue->p_buffer)[read_pos]; - break; - - default: - memcpy(p_element, - (void const *)((size_t)p_queue->p_buffer + read_pos * p_queue->element_size), - p_queue->element_size); - break; - } - } - else - { - status = NRF_ERROR_NOT_FOUND; - } - - CRITICAL_REGION_EXIT(); - - return status; -} - -/**@brief Write elements to the queue. This function assumes that there is enough room in the queue - * to write the requested number of elements and that this process will not be interrupted. - * - * @param[in] p_queue Pointer to the nrf_queue_t instance. - * @param[in] p_data Pointer to the buffer with elements to write. - * @param[in] element_count Number of elements to write. - */ -static void queue_write(nrf_queue_t const * p_queue, void const * p_data, uint32_t element_count) -{ - size_t prev_available = nrf_queue_available_get(p_queue); - size_t continuous = p_queue->size + 1 - p_queue->p_cb->back; - void * p_write_ptr = (void *)((size_t)p_queue->p_buffer - + p_queue->p_cb->back * p_queue->element_size); - if (element_count <= continuous) - { - memcpy(p_write_ptr, - p_data, - element_count * p_queue->element_size); - - p_queue->p_cb->back = ((p_queue->p_cb->back + element_count) <= p_queue->size) - ? (p_queue->p_cb->back + element_count) - : 0; - } - else - { - size_t first_write_length = continuous * p_queue->element_size; - memcpy(p_write_ptr, - p_data, - first_write_length); - - size_t elements_left = element_count - continuous; - memcpy(p_queue->p_buffer, - (void const *)((size_t)p_data + first_write_length), - elements_left * p_queue->element_size); - - p_queue->p_cb->back = elements_left; - if (prev_available < element_count) - { - // Overwrite the oldest elements. - p_queue->p_cb->front = nrf_queue_next_idx(p_queue, p_queue->p_cb->back); - } - } - - // Update utilization. - size_t utilization = queue_utilization_get(p_queue); - if (p_queue->p_cb->max_utilization < utilization) - { - p_queue->p_cb->max_utilization = utilization; - } -} - -ret_code_t nrf_queue_write(nrf_queue_t const * p_queue, - void const * p_data, - size_t element_count) -{ - ret_code_t status = NRF_SUCCESS; - - ASSERT(p_queue != NULL); - ASSERT(p_data != NULL); - ASSERT(element_count <= p_queue->size); - - if (element_count == 0) - { - return NRF_SUCCESS; - } - - CRITICAL_REGION_ENTER(); - - if ((nrf_queue_available_get(p_queue) >= element_count) - || (p_queue->mode == NRF_QUEUE_MODE_OVERFLOW)) - { - queue_write(p_queue, p_data, element_count); - } - else - { - status = NRF_ERROR_NO_MEM; - } - - CRITICAL_REGION_EXIT(); - - return status; -} - - -size_t nrf_queue_in(nrf_queue_t const * p_queue, - void const * p_data, - size_t element_count) -{ - ASSERT(p_queue != NULL); - ASSERT(p_data != NULL); - - if (element_count == 0) - { - return 0; - } - - CRITICAL_REGION_ENTER(); - - if (p_queue->mode == NRF_QUEUE_MODE_OVERFLOW) - { - element_count = MIN(element_count, p_queue->size); - } - else - { - size_t available = nrf_queue_available_get(p_queue); - element_count = MIN(element_count, available); - } - - queue_write(p_queue, p_data, element_count); - - CRITICAL_REGION_EXIT(); - - return element_count; -} - -/**@brief Read elements from the queue. This function assumes that there are enough elements - * in the queue to read and that this process will not be interrupted. - * - * @param[in] p_queue Pointer to the nrf_queue_t instance. - * @param[out] p_data Pointer to the buffer where elements will be copied. - * @param[in] element_count Number of elements to read. - */ -static void queue_read(nrf_queue_t const * p_queue, void * p_data, uint32_t element_count) -{ - size_t front = p_queue->p_cb->front; - size_t back = p_queue->p_cb->back; - size_t continuous = (front <= back) ? (back - front) : (p_queue->size + 1 - front); - void const * p_read_ptr = (void const *)((size_t)p_queue->p_buffer - + front * p_queue->element_size); - - if (element_count <= continuous) - { - memcpy(p_data, - p_read_ptr, - element_count * p_queue->element_size); - - p_queue->p_cb->front = ((front + element_count) <= p_queue->size) - ? (front + element_count) - : 0; - } - else - { - size_t first_read_length = continuous * p_queue->element_size; - memcpy(p_data, - p_read_ptr, - first_read_length); - - size_t elements_left = element_count - continuous; - memcpy((void *)((size_t)p_data + first_read_length), - p_queue->p_buffer, - elements_left * p_queue->element_size); - - p_queue->p_cb->front = elements_left; - } -} - -ret_code_t nrf_queue_read(nrf_queue_t const * p_queue, - void * p_data, - size_t element_count) -{ - ret_code_t status = NRF_SUCCESS; - - ASSERT(p_queue != NULL); - ASSERT(p_data != NULL); - - if (element_count == 0) - { - return NRF_SUCCESS; - } - - CRITICAL_REGION_ENTER(); - - if (element_count <= queue_utilization_get(p_queue)) - { - queue_read(p_queue, p_data, element_count); - } - else - { - status = NRF_ERROR_NOT_FOUND; - } - - CRITICAL_REGION_EXIT(); - - return status; -} - -size_t nrf_queue_out(nrf_queue_t const * p_queue, - void * p_data, - size_t element_count) -{ - ASSERT(p_queue != NULL); - ASSERT(p_data != NULL); - - if (element_count == 0) - { - return 0; - } - - CRITICAL_REGION_ENTER(); - - size_t utilization = queue_utilization_get(p_queue); - element_count = MIN(element_count, utilization); - - queue_read(p_queue, p_data, element_count); - - CRITICAL_REGION_EXIT(); - - return element_count; -} - -void nrf_queue_reset(nrf_queue_t const * p_queue) -{ - ASSERT(p_queue != NULL); - - CRITICAL_REGION_ENTER(); - - memset(p_queue->p_cb, 0, sizeof(nrf_queue_cb_t)); - - CRITICAL_REGION_EXIT(); -} - -size_t nrf_queue_utilization_get(nrf_queue_t const * p_queue) -{ - size_t utilization; - ASSERT(p_queue != NULL); - - CRITICAL_REGION_ENTER(); - - utilization = queue_utilization_get(p_queue); - - CRITICAL_REGION_EXIT(); - - return utilization; -} - -bool nrf_queue_is_empty(nrf_queue_t const * p_queue) -{ - ASSERT(p_queue != NULL); - size_t front = p_queue->p_cb->front; - size_t back = p_queue->p_cb->back; - return (front == back); -} - -size_t nrf_queue_available_get(nrf_queue_t const * p_queue) -{ - ASSERT(p_queue != NULL); - return p_queue->size - nrf_queue_utilization_get(p_queue); -} - -size_t nrf_queue_max_utilization_get(nrf_queue_t const * p_queue) -{ - ASSERT(p_queue != NULL); - return p_queue->p_cb->max_utilization; -} - -void nrf_queue_max_utilization_reset(nrf_queue_t const * p_queue) -{ - ASSERT(p_queue != NULL); - p_queue->p_cb->max_utilization = 0; -} - - -#endif // NRF_MODULE_ENABLED(NRF_QUEUE) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/queue/nrf_queue.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/queue/nrf_queue.h deleted file mode 100644 index c5884f85d5e..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/queue/nrf_queue.h +++ /dev/null @@ -1,406 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** -* @defgroup nrf_queue Queue module -* @{ -* @ingroup app_common -* @brief Functions that handle the queue instances. -*/ - -#ifndef NRF_QUEUE_H__ -#define NRF_QUEUE_H__ - -#include -#include -#include -#include "nrf_assert.h" -#include "sdk_errors.h" -#include "app_util.h" -#include "app_util_platform.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/**@brief Queue control block. */ -typedef struct -{ - volatile size_t front; //!< Queue front index. - volatile size_t back; //!< Queue back index. - size_t max_utilization; //!< Maximum utilization of the queue. -} nrf_queue_cb_t; - -/**@brief Supported queue modes. */ -typedef enum -{ - NRF_QUEUE_MODE_OVERFLOW, //!< If the queue is full, new element will overwrite the oldest. - NRF_QUEUE_MODE_NO_OVERFLOW, //!< If the queue is full, new element will not be accepted. -} nrf_queue_mode_t; - -/**@brief Instance of the queue. */ -typedef struct -{ - nrf_queue_cb_t * p_cb; //!< Pointer to the instance control block. - void * p_buffer; //!< Pointer to the memory that is used as storage. - size_t size; //!< Size of the queue. - size_t element_size; //!< Size of one element. - nrf_queue_mode_t mode; //!< Mode of the queue. -} nrf_queue_t; - -/**@brief Create a queue instance. - * - * @note This macro reserves memory for the given queue instance. - * - * @param[in] _type Type which is stored. - * @param[in] _name Name of the queue. - * @param[in] _size Size of the queue. - * @param[in] _mode Mode of the queue. - */ -#define NRF_QUEUE_DEF(_type, _name, _size, _mode) \ - static _type CONCAT_2(_name, _nrf_queue_buffer[(_size) + 1]); \ - static nrf_queue_cb_t CONCAT_2(_name, _nrf_queue_cb); \ - static const nrf_queue_t _name = \ - { \ - .p_cb = &CONCAT_2(_name, _nrf_queue_cb), \ - .p_buffer = CONCAT_2(_name,_nrf_queue_buffer), \ - .size = (_size), \ - .element_size = sizeof(_type), \ - .mode = _mode, \ - } - -/**@brief Declare a queue interface. - * - * @param[in] _type Type which is stored. - * @param[in] _name Name of the queue. - */ -#define NRF_QUEUE_INTERFACE_DEC(_type, _name) \ - ret_code_t _name##_push(_type const * p_element); \ - ret_code_t _name##_pop(_type * p_element); \ - ret_code_t _name##_peek(_type * p_element); \ - ret_code_t _name##_write(_type const * p_data, \ - size_t element_count); \ - ret_code_t _name##_read(_type * p_data, \ - size_t element_count); \ - size_t _name##_out(_type * p_data, \ - size_t element_count); \ - size_t _name##_in(_type const * p_data, \ - size_t element_count); \ - bool _name##_is_full(void); \ - bool _name##_is_empty(void); \ - size_t _name##_utilization_get(void); \ - size_t _name##_available_get(void); \ - size_t _name##_max_utilization_get(void); \ - void _name##_reset(void) - -/**@brief Define a queue interface. - * - * @param[in] _type Type which is stored. - * @param[in] _name Name of the queue. - * @param[in] _p_queue Queue instance. - */ -#define NRF_QUEUE_INTERFACE_DEF(_type, _name, _p_queue) \ - ret_code_t _name##_push(_type const * p_element) \ - { \ - GCC_PRAGMA("GCC diagnostic push") \ - GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ - ASSERT((_p_queue) != NULL); \ - ASSERT((_p_queue)->element_size == sizeof(_type)); \ - GCC_PRAGMA("GCC diagnostic pop") \ - return nrf_queue_push((_p_queue), p_element); \ - } \ - ret_code_t _name##_pop(_type * p_element) \ - { \ - GCC_PRAGMA("GCC diagnostic push") \ - GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ - ASSERT((_p_queue) != NULL); \ - ASSERT((_p_queue)->element_size == sizeof(_type)); \ - GCC_PRAGMA("GCC diagnostic pop") \ - return nrf_queue_pop((_p_queue), p_element); \ - } \ - ret_code_t _name##_peek(_type * p_element) \ - { \ - GCC_PRAGMA("GCC diagnostic push") \ - GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ - ASSERT((_p_queue) != NULL); \ - ASSERT((_p_queue)->element_size == sizeof(_type)); \ - GCC_PRAGMA("GCC diagnostic pop") \ - return nrf_queue_peek((_p_queue), p_element); \ - } \ - ret_code_t _name##_write(_type const * p_data, \ - size_t element_count) \ - { \ - GCC_PRAGMA("GCC diagnostic push") \ - GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ - ASSERT((_p_queue) != NULL); \ - ASSERT((_p_queue)->element_size == sizeof(_type)); \ - GCC_PRAGMA("GCC diagnostic pop") \ - return nrf_queue_write((_p_queue), p_data, element_count); \ - } \ - ret_code_t _name##_read(_type * p_data, \ - size_t element_count) \ - { \ - GCC_PRAGMA("GCC diagnostic push") \ - GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ - ASSERT((_p_queue) != NULL); \ - ASSERT((_p_queue)->element_size == sizeof(_type)); \ - GCC_PRAGMA("GCC diagnostic pop") \ - return nrf_queue_read((_p_queue), p_data, element_count); \ - } \ - size_t _name##_in(_type const * p_data, \ - size_t element_count) \ - { \ - GCC_PRAGMA("GCC diagnostic push") \ - GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ - ASSERT((_p_queue) != NULL); \ - ASSERT((_p_queue)->element_size == sizeof(_type)); \ - GCC_PRAGMA("GCC diagnostic pop") \ - return nrf_queue_in((_p_queue), p_data, element_count); \ - } \ - size_t _name##_out(_type * p_data, \ - size_t element_count) \ - { \ - GCC_PRAGMA("GCC diagnostic push") \ - GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ - ASSERT((_p_queue) != NULL); \ - ASSERT((_p_queue)->element_size == sizeof(_type)); \ - GCC_PRAGMA("GCC diagnostic pop") \ - return nrf_queue_out((_p_queue), p_data, element_count); \ - } \ - bool _name##_is_full(void) \ - { \ - GCC_PRAGMA("GCC diagnostic push") \ - GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ - ASSERT((_p_queue) != NULL); \ - return nrf_queue_is_full(_p_queue); \ - GCC_PRAGMA("GCC diagnostic pop") \ - } \ - bool _name##_is_empty(void) \ - { \ - GCC_PRAGMA("GCC diagnostic push") \ - GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ - ASSERT((_p_queue) != NULL); \ - GCC_PRAGMA("GCC diagnostic pop") \ - return nrf_queue_is_empty(_p_queue); \ - } \ - size_t _name##_utilization_get(void) \ - { \ - GCC_PRAGMA("GCC diagnostic push") \ - GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ - ASSERT((_p_queue) != NULL); \ - GCC_PRAGMA("GCC diagnostic pop") \ - return nrf_queue_utilization_get(_p_queue); \ - } \ - size_t _name##_available_get(void) \ - { \ - GCC_PRAGMA("GCC diagnostic push") \ - GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ - ASSERT((_p_queue) != NULL); \ - GCC_PRAGMA("GCC diagnostic pop") \ - return nrf_queue_available_get(_p_queue); \ - } \ - size_t _name##_max_utilization_get(void) \ - { \ - GCC_PRAGMA("GCC diagnostic push") \ - GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ - ASSERT((_p_queue) != NULL); \ - GCC_PRAGMA("GCC diagnostic pop") \ - return nrf_queue_max_utilization_get(_p_queue); \ - } \ - void _name##_reset(void) \ - { \ - GCC_PRAGMA("GCC diagnostic push") \ - GCC_PRAGMA("GCC diagnostic ignored \"-Waddress\"") \ - ASSERT((_p_queue) != NULL); \ - GCC_PRAGMA("GCC diagnostic pop") \ - nrf_queue_reset(_p_queue); \ - } - -/**@brief Function for pushing an element to the end of queue. - * - * @param[in] p_queue Pointer to the nrf_queue_t instance. - * @param[in] p_element Pointer to the element that will be stored in the queue. - * - * @return NRF_SUCCESS If an element has been successfully added. - * @return NRF_ERROR_NO_MEM If the queue is full (only in @ref NRF_QUEUE_MODE_NO_OVERFLOW). - */ -ret_code_t nrf_queue_push(nrf_queue_t const * p_queue, void const * p_element); - -/**@brief Generic pop implementation. - * - * @param[in] p_queue Pointer to the nrf_queue_t instance. - * @param[out] p_element Pointer where the element will be copied. - * @param[out] just_peek If true, the returned element will not be removed from queue. - * - * @return NRF_SUCCESS If an element was returned. - * @return NRF_ERROR_NOT_FOUND If there are no more elements in the queue. - */ -ret_code_t nrf_queue_generic_pop(nrf_queue_t const * p_queue, - void * p_element, - bool just_peek); - -/**@brief Pop element from the front of the queue. - * - * @param[in] _p_queue Pointer to the nrf_queue_t instance. - * @param[out] _p_element Pointer where the element will be copied. - * - * @return NRF_SUCCESS If an element was returned. - * @return NRF_ERROR_NOT_FOUND If there are no more elements in the queue. - */ -#define nrf_queue_pop(_p_queue, _p_element) nrf_queue_generic_pop((_p_queue), (_p_element), false) - -/**@brief Peek element from the front of the queue. - * - * @param[in] _p_queue Pointer to the nrf_queue_t instance. - * @param[out] _p_element Pointer where the element will be copied. - * - * @return NRF_SUCCESS If an element was returned. - * @return NRF_ERROR_NOT_FOUND If there are no more elements in the queue. - */ -#define nrf_queue_peek(_p_queue, _p_element) nrf_queue_generic_pop((_p_queue), (_p_element), true) - -/**@brief Function for writing elements to the queue. - * - * @param[in] p_queue Pointer to the nrf_queue_t instance. - * @param[in] p_data Pointer to the buffer with elements to write. - * @param[in] element_count Number of elements to write. - * - * @return NRF_SUCCESS If an element was written. - * @return NRF_ERROR_NO_MEM There is not enough space in the queue. No element was written. - */ -ret_code_t nrf_queue_write(nrf_queue_t const * p_queue, - void const * p_data, - size_t element_count); - -/**@brief Function for writing a portion of elements to the queue. - * - * @param[in] p_queue Pointer to the nrf_queue_t instance. - * @param[in] p_data Pointer to the buffer with elements to write. - * @param[in] element_count Number of elements to write. - * - * @return The number of added elements. - */ -size_t nrf_queue_in(nrf_queue_t const * p_queue, - void const * p_data, - size_t element_count); - -/**@brief Function for reading elements from the queue. - * - * @param[in] p_queue Pointer to the nrf_queue_t instance. - * @param[out] p_data Pointer to the buffer where elements will be copied. - * @param[in] element_count Number of elements to read. - * - * @return NRF_SUCCESS If an element was returned. - * @return NRF_ERROR_NOT_FOUND There is not enough elements in the queue. - */ -ret_code_t nrf_queue_read(nrf_queue_t const * p_queue, - void * p_data, - size_t element_count); - -/**@brief Function for reading a portion of elements from the queue. - * - * @param[in] p_queue Pointer to the nrf_queue_t instance. - * @param[out] p_data Pointer to the buffer where elements will be copied. - * @param[in] element_count Number of elements to read. - * - * @return The number of read elements. - */ -size_t nrf_queue_out(nrf_queue_t const * p_queue, - void * p_data, - size_t element_count); - -/**@brief Function for checking if the queue is full. - * - * @param[in] p_queue Pointer to the queue instance. - * - * @return True if the queue is full. - */ -bool nrf_queue_is_full(nrf_queue_t const * p_queue); - -/**@brief Function for checking if the queue is empty. - * - * @param[in] p_queue Pointer to the queue instance. - * - * @return True if the queue is empty. - */ -bool nrf_queue_is_empty(nrf_queue_t const * p_queue); - -/**@brief Function for getting the current queue utilization. - * - * @param[in] p_queue Pointer to the queue instance. - * - * @return Current queue utilization. - */ -size_t nrf_queue_utilization_get(nrf_queue_t const * p_queue); - -/**@brief Function for getting the size of available space. - * - * @param[in] p_queue Pointer to the queue instance. - * - * @return Size of available space. - */ -size_t nrf_queue_available_get(nrf_queue_t const * p_queue); - -/**@brief Function for getting the maximal queue utilization. - * - * @param[in] p_queue Pointer to the queue instance. - * - * @return Maximal queue utilization. - */ -size_t nrf_queue_max_utilization_get(nrf_queue_t const * p_queue); - -/**@brief Function for resetting the maximal queue utilization. - * - * @param[in] p_queue Pointer to the queue instance. - * - */ -void nrf_queue_max_utilization_reset(nrf_queue_t const * p_queue); - -/**@brief Function for resetting the queue state. - * - * @param[in] p_queue Pointer to the queue instance. - */ -void nrf_queue_reset(nrf_queue_t const * p_queue); - -#ifdef __cplusplus -} -#endif - -#endif // NRF_QUEUE_H__ -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/strerror/nrf_strerror.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/strerror/nrf_strerror.c deleted file mode 100644 index 09e3fb0f206..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/strerror/nrf_strerror.c +++ /dev/null @@ -1,148 +0,0 @@ -/** - * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "sdk_common.h" -#if NRF_MODULE_ENABLED(NRF_STRERROR) -#include "nrf_strerror.h" - -/** - * @brief Macro for adding an entity to the description array. - * - * Macro that helps to create a single entity in the description array. - */ -#define NRF_STRERROR_ENTITY(mnemonic) {.code = mnemonic, .name = #mnemonic} - -/** - * @brief Array entity element that describes an error. - */ -typedef struct -{ - ret_code_t code; /**< Error code. */ - char const * name; /**< Descriptive name (the same as the internal error mnemonic). */ -}nrf_strerror_desc_t; - -/** - * @brief Unknown error code. - * - * The constant string used by @ref nrf_strerror_get when the error description was not found. - */ -static char const m_unknown_str[] = "Unknown error code"; - -/** - * @brief Array with error codes. - * - * Array that describes error codes. - * - * @note It is required for this array to have error codes placed in ascending order. - * This condition is checked in automatic unit test before the release. - */ -static nrf_strerror_desc_t const nrf_strerror_array[] = -{ - NRF_STRERROR_ENTITY(NRF_SUCCESS), - NRF_STRERROR_ENTITY(NRF_ERROR_SVC_HANDLER_MISSING), - NRF_STRERROR_ENTITY(NRF_ERROR_SOFTDEVICE_NOT_ENABLED), - NRF_STRERROR_ENTITY(NRF_ERROR_INTERNAL), - NRF_STRERROR_ENTITY(NRF_ERROR_NO_MEM), - NRF_STRERROR_ENTITY(NRF_ERROR_NOT_FOUND), - NRF_STRERROR_ENTITY(NRF_ERROR_NOT_SUPPORTED), - NRF_STRERROR_ENTITY(NRF_ERROR_INVALID_PARAM), - NRF_STRERROR_ENTITY(NRF_ERROR_INVALID_STATE), - NRF_STRERROR_ENTITY(NRF_ERROR_INVALID_LENGTH), - NRF_STRERROR_ENTITY(NRF_ERROR_INVALID_FLAGS), - NRF_STRERROR_ENTITY(NRF_ERROR_INVALID_DATA), - NRF_STRERROR_ENTITY(NRF_ERROR_DATA_SIZE), - NRF_STRERROR_ENTITY(NRF_ERROR_TIMEOUT), - NRF_STRERROR_ENTITY(NRF_ERROR_NULL), - NRF_STRERROR_ENTITY(NRF_ERROR_FORBIDDEN), - NRF_STRERROR_ENTITY(NRF_ERROR_INVALID_ADDR), - NRF_STRERROR_ENTITY(NRF_ERROR_BUSY), - - /* SDK Common errors */ - NRF_STRERROR_ENTITY(NRF_ERROR_MODULE_NOT_INITIALZED), - NRF_STRERROR_ENTITY(NRF_ERROR_MUTEX_INIT_FAILED), - NRF_STRERROR_ENTITY(NRF_ERROR_MUTEX_LOCK_FAILED), - NRF_STRERROR_ENTITY(NRF_ERROR_MUTEX_UNLOCK_FAILED), - NRF_STRERROR_ENTITY(NRF_ERROR_MUTEX_COND_INIT_FAILED), - NRF_STRERROR_ENTITY(NRF_ERROR_MODULE_ALREADY_INITIALIZED), - NRF_STRERROR_ENTITY(NRF_ERROR_STORAGE_FULL), - NRF_STRERROR_ENTITY(NRF_ERROR_API_NOT_IMPLEMENTED), - NRF_STRERROR_ENTITY(NRF_ERROR_FEATURE_NOT_ENABLED), - - /* TWI error codes */ - NRF_STRERROR_ENTITY(NRF_ERROR_DRV_TWI_ERR_OVERRUN), - NRF_STRERROR_ENTITY(NRF_ERROR_DRV_TWI_ERR_ANACK), - NRF_STRERROR_ENTITY(NRF_ERROR_DRV_TWI_ERR_DNACK) -}; - - -char const * nrf_strerror_get(ret_code_t code) -{ - char const * p_ret = nrf_strerror_find(code); - return (p_ret == NULL) ? m_unknown_str : p_ret; -} - -char const * nrf_strerror_find(ret_code_t code) -{ - nrf_strerror_desc_t const * p_start; - nrf_strerror_desc_t const * p_end; - p_start = nrf_strerror_array; - p_end = nrf_strerror_array + ARRAY_SIZE(nrf_strerror_array); - - while (p_start < p_end) - { - nrf_strerror_desc_t const * p_mid = p_start + ((p_end - p_start) / 2); - ret_code_t mid_c = p_mid->code; - if (mid_c > code) - { - p_end = p_mid; - } - else if (mid_c < code) - { - p_start = p_mid + 1; - } - else - { - return p_mid->name; - } - } - return NULL; -} - -#endif /* NRF_STRERROR enabled */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/strerror/nrf_strerror.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/strerror/nrf_strerror.h deleted file mode 100644 index f0de77d8448..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/strerror/nrf_strerror.h +++ /dev/null @@ -1,89 +0,0 @@ -/** - * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -/** - * @defgroup nrf_strerror Error code to string converter - * @ingroup app_common - * - * @brief Module for converting error code into a printable string. - * @{ - */ -#ifndef NRF_STRERROR_H__ -#define NRF_STRERROR_H__ - -#include "sdk_errors.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Function for getting a printable error string. - * - * @param code Error code to convert. - * - * @note This function cannot fail. - * For the function that may fail with error translation, see @ref nrf_strerror_find. - * - * @return Pointer to the printable string. - * If the string is not found, - * it returns a simple string that says that the error is unknown. - */ -char const * nrf_strerror_get(ret_code_t code); - -/** - * @brief Function for finding a printable error string. - * - * This function gets the error string in the same way as @ref nrf_strerror_get, - * but if the string is not found, it returns NULL. - * - * @param code Error code to convert. - * @return Pointer to the printable string. - * If the string is not found, NULL is returned. - */ -char const * nrf_strerror_find(ret_code_t code); - -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_STRERROR_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/app_error.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/app_error.c deleted file mode 100644 index e50e57d2236..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/app_error.c +++ /dev/null @@ -1,143 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** @file - * - * @defgroup app_error Common application error handler - * @{ - * @ingroup app_common - * - * @brief Common application error handler. - */ - -#include "nrf.h" -#include -#include "app_error.h" -#include "nordic_common.h" -#include "sdk_errors.h" -/**@brief Function for error handling, which is called when an error has occurred. - * - * @warning This handler is an example only and does not fit a final product. You need to analyze - * how your product is supposed to react in case of error. - * - * @param[in] error_code Error code supplied to the handler. - * @param[in] line_num Line number where the handler is called. - * @param[in] p_file_name Pointer to the file name. - */ - -/*lint -save -e14 */ -void app_error_handler(ret_code_t error_code, uint32_t line_num, const uint8_t * p_file_name) -{ - error_info_t error_info = - { - .line_num = line_num, - .p_file_name = p_file_name, - .err_code = error_code, - }; - app_error_fault_handler(NRF_FAULT_ID_SDK_ERROR, 0, (uint32_t)(&error_info)); - - UNUSED_VARIABLE(error_info); -} - -/*lint -save -e14 */ -void app_error_handler_bare(ret_code_t error_code) -{ - error_info_t error_info = - { - .line_num = 0, - .p_file_name = NULL, - .err_code = error_code, - }; - - app_error_fault_handler(NRF_FAULT_ID_SDK_ERROR, 0, (uint32_t)(&error_info)); - - UNUSED_VARIABLE(error_info); -} - - -void app_error_save_and_stop(uint32_t id, uint32_t pc, uint32_t info) -{ - /* static error variables - in order to prevent removal by optimizers */ - static volatile struct - { - uint32_t fault_id; - uint32_t pc; - uint32_t error_info; - assert_info_t * p_assert_info; - error_info_t * p_error_info; - ret_code_t err_code; - uint32_t line_num; - const uint8_t * p_file_name; - } m_error_data = {0}; - - // The following variable helps Keil keep the call stack visible, in addition, it can be set to - // 0 in the debugger to continue executing code after the error check. - volatile bool loop = true; - UNUSED_VARIABLE(loop); - - m_error_data.fault_id = id; - m_error_data.pc = pc; - m_error_data.error_info = info; - - switch (id) - { - case NRF_FAULT_ID_SDK_ASSERT: - m_error_data.p_assert_info = (assert_info_t *)info; - m_error_data.line_num = m_error_data.p_assert_info->line_num; - m_error_data.p_file_name = m_error_data.p_assert_info->p_file_name; - break; - - case NRF_FAULT_ID_SDK_ERROR: - m_error_data.p_error_info = (error_info_t *)info; - m_error_data.err_code = m_error_data.p_error_info->err_code; - m_error_data.line_num = m_error_data.p_error_info->line_num; - m_error_data.p_file_name = m_error_data.p_error_info->p_file_name; - break; - } - - UNUSED_VARIABLE(m_error_data); - - // If printing is disrupted, remove the irq calls, or set the loop variable to 0 in the debugger. - __disable_irq(); - while (loop); - - __enable_irq(); -} - -/*lint -restore */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/app_error.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/app_error.h deleted file mode 100644 index c8c37586600..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/app_error.h +++ /dev/null @@ -1,172 +0,0 @@ -/** - * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** @file - * - * @defgroup app_error Common application error handler - * @{ - * @ingroup app_common - * - * @brief Common application error handler and macros for utilizing a common error handler. - */ - -#ifndef APP_ERROR_H__ -#define APP_ERROR_H__ - - -#include -#include -#include -#include "nrf.h" -#include "sdk_errors.h" -#include "nordic_common.h" -#include "app_error_weak.h" -#ifdef ANT_STACK_SUPPORT_REQD -#include "ant_error.h" -#endif // ANT_STACK_SUPPORT_REQD - - - -#ifdef __cplusplus -extern "C" { -#endif - -#define NRF_FAULT_ID_SDK_RANGE_START 0x00004000 /**< The start of the range of error IDs defined in the SDK. */ - -/**@defgroup APP_ERROR_FAULT_IDS Fault ID types - * @{ */ -#define NRF_FAULT_ID_SDK_ERROR NRF_FAULT_ID_SDK_RANGE_START + 1 /**< An error stemming from a call to @ref APP_ERROR_CHECK or @ref APP_ERROR_CHECK_BOOL. The info parameter is a pointer to an @ref error_info_t variable. */ -#define NRF_FAULT_ID_SDK_ASSERT NRF_FAULT_ID_SDK_RANGE_START + 2 /**< An error stemming from a call to ASSERT (nrf_assert.h). The info parameter is a pointer to an @ref assert_info_t variable. */ -/**@} */ - -/**@brief Structure containing info about an error of the type @ref NRF_FAULT_ID_SDK_ERROR. - */ -typedef struct -{ - uint16_t line_num; /**< The line number where the error occurred. */ - uint8_t const * p_file_name; /**< The file in which the error occurred. */ - uint32_t err_code; /**< The error code representing the error that occurred. */ -} error_info_t; - -/**@brief Structure containing info about an error of the type @ref NRF_FAULT_ID_SDK_ASSERT. - */ -typedef struct -{ - uint16_t line_num; /**< The line number where the error occurred. */ - uint8_t const * p_file_name; /**< The file in which the error occurred. */ -} assert_info_t; - -/**@brief Function for error handling, which is called when an error has occurred. - * - * @param[in] error_code Error code supplied to the handler. - * @param[in] line_num Line number where the handler is called. - * @param[in] p_file_name Pointer to the file name. - */ -void app_error_handler(uint32_t error_code, uint32_t line_num, const uint8_t * p_file_name); - -/**@brief Function for error handling, which is called when an error has occurred. - * - * @param[in] error_code Error code supplied to the handler. - */ -void app_error_handler_bare(ret_code_t error_code); - -/**@brief Function for saving the parameters and entering an eternal loop, for debug purposes. - * - * @param[in] id Fault identifier. See @ref NRF_FAULT_IDS. - * @param[in] pc The program counter of the instruction that triggered the fault, or 0 if - * unavailable. - * @param[in] info Optional additional information regarding the fault. Refer to each fault - * identifier for details. - */ -void app_error_save_and_stop(uint32_t id, uint32_t pc, uint32_t info); - - -/**@brief Macro for calling error handler function. - * - * @param[in] ERR_CODE Error code supplied to the error handler. - */ -#ifdef DEBUG -#define APP_ERROR_HANDLER(ERR_CODE) \ - do \ - { \ - app_error_handler((ERR_CODE), __LINE__, (uint8_t*) __FILE__); \ - } while (0) -#else -#define APP_ERROR_HANDLER(ERR_CODE) \ - do \ - { \ - app_error_handler_bare((ERR_CODE)); \ - } while (0) -#endif -/**@brief Macro for calling error handler function if supplied error code any other than NRF_SUCCESS. - * - * @param[in] ERR_CODE Error code supplied to the error handler. - */ -#define APP_ERROR_CHECK(ERR_CODE) \ - do \ - { \ - const uint32_t LOCAL_ERR_CODE = (ERR_CODE); \ - if (LOCAL_ERR_CODE != NRF_SUCCESS) \ - { \ - APP_ERROR_HANDLER(LOCAL_ERR_CODE); \ - } \ - } while (0) - -/**@brief Macro for calling error handler function if supplied boolean value is false. - * - * @param[in] BOOLEAN_VALUE Boolean value to be evaluated. - */ -#define APP_ERROR_CHECK_BOOL(BOOLEAN_VALUE) \ - do \ - { \ - const uint32_t LOCAL_BOOLEAN_VALUE = (BOOLEAN_VALUE); \ - if (!LOCAL_BOOLEAN_VALUE) \ - { \ - APP_ERROR_HANDLER(0); \ - } \ - } while (0) - - -#ifdef __cplusplus -} -#endif - -#endif // APP_ERROR_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/app_error_weak.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/app_error_weak.c deleted file mode 100644 index f00b36f7169..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/app_error_weak.c +++ /dev/null @@ -1,109 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "app_error.h" - -#include "nrf_log.h" -#include "nrf_log_ctrl.h" -#include "nrf_strerror.h" - -#if defined(SOFTDEVICE_PRESENT) && SOFTDEVICE_PRESENT -#include "nrf_sdm.h" -#endif - -/*lint -save -e14 */ - -/** - * Function is implemented as weak so that it can be overwritten by custom application error handler - * when needed. - */ -__WEAK void app_error_fault_handler(uint32_t id, uint32_t pc, uint32_t info) -{ - NRF_LOG_FINAL_FLUSH(); - -#ifndef DEBUG - NRF_LOG_ERROR("Fatal error"); -#else - switch (id) - { -#if defined(SOFTDEVICE_PRESENT) && SOFTDEVICE_PRESENT - case NRF_FAULT_ID_SD_ASSERT: - NRF_LOG_ERROR("SOFTDEVICE: ASSERTION FAILED"); - break; - case NRF_FAULT_ID_APP_MEMACC: - NRF_LOG_ERROR("SOFTDEVICE: INVALID MEMORY ACCESS"); - break; -#endif - case NRF_FAULT_ID_SDK_ASSERT: - { - assert_info_t * p_info = (assert_info_t *)info; - NRF_LOG_ERROR("ASSERTION FAILED at %s:%u", - p_info->p_file_name, - p_info->line_num); - break; - } - case NRF_FAULT_ID_SDK_ERROR: - { - error_info_t * p_info = (error_info_t *)info; - NRF_LOG_ERROR("ERROR %u [%s] at %s:%u", - p_info->err_code, - nrf_strerror_get(p_info->err_code), - p_info->p_file_name, - p_info->line_num); - break; - } - default: - NRF_LOG_ERROR("UNKNOWN FAULT at 0x%08X", pc); - break; - } -#endif - - NRF_BREAKPOINT_COND; - // On assert, the system can only recover with a reset. - -#ifndef DEBUG - NRF_LOG_WARNING("System reset"); - NVIC_SystemReset(); -#else - app_error_save_and_stop(id, pc, info); -#endif // DEBUG -} - -/*lint -restore */ - diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/app_error_weak.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/app_error_weak.h deleted file mode 100644 index fa49dc3f014..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/app_error_weak.h +++ /dev/null @@ -1,85 +0,0 @@ -/** - * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef APP_ERROR_WEAK_H__ -#define APP_ERROR_WEAK_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/** @file - * - * @defgroup app_error Common application error handler - * @{ - * @ingroup app_common - * - * @brief Common application error handler. - */ - -/**@brief Callback function for errors, asserts, and faults. - * - * @details This function is called every time an error is raised in app_error, nrf_assert, or - * in the SoftDevice. Information about the error can be found in the @p info - * parameter. - * - * See also @ref nrf_fault_handler_t for more details. - * - * @note The function is implemented as weak so that it can be redefined by a custom error - * handler when needed. - * - * @param[in] id Fault identifier. See @ref NRF_FAULT_IDS. - * @param[in] pc The program counter of the instruction that triggered the fault, or 0 if - * unavailable. - * @param[in] info Optional additional information regarding the fault. The value of the @p id - * parameter dictates how to interpret this parameter. Refer to the documentation - * for each fault identifier (@ref NRF_FAULT_IDS and @ref APP_ERROR_FAULT_IDS) for - * details about interpreting @p info. - */ -void app_error_fault_handler(uint32_t id, uint32_t pc, uint32_t info); - - -/** @} */ - - -#ifdef __cplusplus -} -#endif - -#endif // APP_ERROR_WEAK_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/app_util.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/app_util.h deleted file mode 100644 index a8ffba29fe7..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/app_util.h +++ /dev/null @@ -1,1082 +0,0 @@ -/** - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** @file - * - * @defgroup app_util Utility Functions and Definitions - * @{ - * @ingroup app_common - * - * @brief Various types and definitions available to all applications. - */ - -#ifndef APP_UTIL_H__ -#define APP_UTIL_H__ - -#include -#include -#include -#include "compiler_abstraction.h" -#include "nordic_common.h" -#include "nrf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -//lint -save -e27 -e10 -e19 -#if defined ( __CC_ARM ) && !defined (__LINT__) -extern char STACK$$Base; -extern char STACK$$Length; -#define STACK_BASE &STACK$$Base -#define STACK_TOP ((void*)((uint32_t)STACK_BASE + (uint32_t)&STACK$$Length)) -#elif defined ( __ICCARM__ ) -extern char CSTACK$$Base; -extern char CSTACK$$Length; -#define STACK_BASE &CSTACK$$Base -#define STACK_TOP ((void*)((uint32_t)STACK_BASE + (uint32_t)&CSTACK$$Length)) -#elif defined ( __GNUC__ ) -extern uint32_t __StackTop; -extern uint32_t __StackLimit; -#define STACK_BASE &__StackLimit -#define STACK_TOP &__StackTop -#endif -//lint -restore - -enum -{ - UNIT_0_625_MS = 625, /**< Number of microseconds in 0.625 milliseconds. */ - UNIT_1_25_MS = 1250, /**< Number of microseconds in 1.25 milliseconds. */ - UNIT_10_MS = 10000 /**< Number of microseconds in 10 milliseconds. */ -}; - - -/*Segger embedded studio originally has offsetof macro which cannot be used in macros (like STATIC_ASSERT). - This redefinition is to allow using that. */ -#if defined(__SES_ARM) && defined(__GNUC__) -#undef offsetof -#define offsetof(TYPE, MEMBER) __builtin_offsetof (TYPE, MEMBER) -#endif - -/**@brief Implementation specific macro for delayed macro expansion used in string concatenation -* -* @param[in] lhs Left hand side in concatenation -* @param[in] rhs Right hand side in concatenation -*/ -#define STRING_CONCATENATE_IMPL(lhs, rhs) lhs ## rhs - - -/**@brief Macro used to concatenate string using delayed macro expansion -* -* @note This macro will delay concatenation until the expressions have been resolved -* -* @param[in] lhs Left hand side in concatenation -* @param[in] rhs Right hand side in concatenation -*/ -#define STRING_CONCATENATE(lhs, rhs) STRING_CONCATENATE_IMPL(lhs, rhs) - - -#ifndef __LINT__ - -#ifdef __GNUC__ -#define STATIC_ASSERT_SIMPLE(EXPR) _Static_assert(EXPR, "unspecified message") -#define STATIC_ASSERT_MSG(EXPR, MSG) _Static_assert(EXPR, MSG) -#endif - -#ifdef __CC_ARM -#define STATIC_ASSERT_SIMPLE(EXPR) extern char (*_do_assert(void)) [sizeof(char[1 - 2*!(EXPR)])] -#define STATIC_ASSERT_MSG(EXPR, MSG) extern char (*_do_assert(void)) [sizeof(char[1 - 2*!(EXPR)])] -#endif - -#ifdef __ICCARM__ -#define STATIC_ASSERT_SIMPLE(EXPR) static_assert(EXPR, "unspecified message") -#define STATIC_ASSERT_MSG(EXPR, MSG) static_assert(EXPR, MSG) -#endif - -#else // __LINT__ - -#define STATIC_ASSERT_SIMPLE(EXPR) extern char (*_ignore(void)) -#define STATIC_ASSERT_MSG(EXPR, MSG) extern char (*_ignore(void)) - -#endif - - -#define _SELECT_ASSERT_FUNC(x, EXPR, MSG, ASSERT_MACRO, ...) ASSERT_MACRO - -/** - * @brief Static (i.e. compile time) assert macro. - * - * @note The output of STATIC_ASSERT can be different across compilers. - * - * Usage: - * STATIC_ASSERT(expression); - * STATIC_ASSERT(expression, message); - * - * @hideinitializer - */ -//lint -save -esym(???, STATIC_ASSERT) -#define STATIC_ASSERT(...) \ - _SELECT_ASSERT_FUNC(x, ##__VA_ARGS__, \ - STATIC_ASSERT_MSG(__VA_ARGS__), \ - STATIC_ASSERT_SIMPLE(__VA_ARGS__)) -//lint -restore - - -/**@brief Implementation details for NUM_VAR_ARGS */ -#define NUM_VA_ARGS_IMPL( \ - _0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, \ - _11, _12, _13, _14, _15, _16, _17, _18, _19, _20, \ - _21, _22, _23, _24, _25, _26, _27, _28, _29, _30, \ - _31, _32, _33, _34, _35, _36, _37, _38, _39, _40, \ - _41, _42, _43, _44, _45, _46, _47, _48, _49, _50, \ - _51, _52, _53, _54, _55, _56, _57, _58, _59, _60, \ - _61, _62, N, ...) N - - -/**@brief Macro to get the number of arguments in a call variadic macro call - * - * param[in] ... List of arguments - * - * @retval Number of variadic arguments in the argument list - */ -#define NUM_VA_ARGS(...) NUM_VA_ARGS_IMPL(__VA_ARGS__, 63, 62, 61, \ - 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \ - 50, 49, 48, 47, 46, 45, 44, 43, 42, 41, \ - 40, 39, 38, 37, 36, 35, 34, 33, 32, 31, \ - 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, \ - 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, \ - 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0) - -/**@brief Implementation details for NUM_VAR_ARGS */ -#define NUM_VA_ARGS_LESS_1_IMPL( \ - _ignored, \ - _0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, \ - _11, _12, _13, _14, _15, _16, _17, _18, _19, _20, \ - _21, _22, _23, _24, _25, _26, _27, _28, _29, _30, \ - _31, _32, _33, _34, _35, _36, _37, _38, _39, _40, \ - _41, _42, _43, _44, _45, _46, _47, _48, _49, _50, \ - _51, _52, _53, _54, _55, _56, _57, _58, _59, _60, \ - _61, _62, N, ...) N - -/**@brief Macro to get the number of arguments in a call variadic macro call. - * First argument is not counted. - * - * param[in] ... List of arguments - * - * @retval Number of variadic arguments in the argument list - */ -#define NUM_VA_ARGS_LESS_1(...) NUM_VA_ARGS_LESS_1_IMPL(__VA_ARGS__, 63, 62, 61, \ - 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \ - 50, 49, 48, 47, 46, 45, 44, 43, 42, 41, \ - 40, 39, 38, 37, 36, 35, 34, 33, 32, 31, \ - 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, \ - 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, \ - 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, ~) - - -/**@brief type for holding an encoded (i.e. little endian) 16 bit unsigned integer. */ -typedef uint8_t uint16_le_t[2]; - -/**@brief Type for holding an encoded (i.e. little endian) 32 bit unsigned integer. */ -typedef uint8_t uint32_le_t[4]; - -/**@brief Byte array type. */ -typedef struct -{ - uint16_t size; /**< Number of array entries. */ - uint8_t * p_data; /**< Pointer to array entries. */ -} uint8_array_t; - - -/**@brief Macro for performing rounded integer division (as opposed to truncating the result). - * - * @param[in] A Numerator. - * @param[in] B Denominator. - * - * @return Rounded (integer) result of dividing A by B. - */ -#define ROUNDED_DIV(A, B) (((A) + ((B) / 2)) / (B)) - - -/**@brief Macro for checking if an integer is a power of two. - * - * @param[in] A Number to be tested. - * - * @return true if value is power of two. - * @return false if value not power of two. - */ -#define IS_POWER_OF_TWO(A) ( ((A) != 0) && ((((A) - 1) & (A)) == 0) ) - - -/**@brief Macro for converting milliseconds to ticks. - * - * @param[in] TIME Number of milliseconds to convert. - * @param[in] RESOLUTION Unit to be converted to in [us/ticks]. - */ -#define MSEC_TO_UNITS(TIME, RESOLUTION) (((TIME) * 1000) / (RESOLUTION)) - - -/**@brief Macro for performing integer division, making sure the result is rounded up. - * - * @details One typical use for this is to compute the number of objects with size B is needed to - * hold A number of bytes. - * - * @param[in] A Numerator. - * @param[in] B Denominator. - * - * @return Integer result of dividing A by B, rounded up. - */ -#define CEIL_DIV(A, B) \ - (((A) + (B) - 1) / (B)) - - -/**@brief Macro for creating a buffer aligned to 4 bytes. - * - * @param[in] NAME Name of the buffor. - * @param[in] MIN_SIZE Size of this buffor (it will be rounded up to multiples of 4 bytes). - */ -#define WORD_ALIGNED_MEM_BUFF(NAME, MIN_SIZE) static uint32_t NAME[CEIL_DIV(MIN_SIZE, sizeof(uint32_t))] - - -/**@brief Macro for calculating the number of words that are needed to hold a number of bytes. - * - * @details Adds 3 and divides by 4. - * - * @param[in] n_bytes The number of bytes. - * - * @return The number of words that @p n_bytes take up (rounded up). - */ -#define BYTES_TO_WORDS(n_bytes) (((n_bytes) + 3) >> 2) - - -/**@brief The number of bytes in a word. - */ -#define BYTES_PER_WORD (4) - - -/**@brief Macro for increasing a number to the nearest (larger) multiple of another number. - * - * @param[in] alignment The number to align to. - * @param[in] number The number to align (increase). - * - * @return The aligned (increased) @p number. - */ -#define ALIGN_NUM(alignment, number) ((number - 1) + alignment - ((number - 1) % alignment)) - -/**@brief Macro for getting first of 2 parameters. - * - * @param[in] a1 First parameter. - * @param[in] a2 Second parameter. - */ -#define GET_ARG_1(a1, a2) a1 - -/**@brief Macro for getting second of 2 parameters. - * - * @param[in] a1 First parameter. - * @param[in] a2 Second parameter. - */ -#define GET_ARG_2(a1, a2) a2 - - -/**@brief Container of macro (borrowed from Linux kernel). - * - * This macro returns parent structure address basing on child member address. - * - * @param ptr Address of child type. - * @param type Type of parent structure. - * @param member Name of child field in parent structure. - * - * @return Parent structure address. - * */ -#define CONTAINER_OF(ptr, type, member) \ - (type *)((char *)ptr - offsetof(type, member)) - - -/** - * @brief Define Bit-field mask - * - * Macro that defined the mask with selected number of bits set, starting from - * provided bit number. - * - * @param[in] bcnt Number of bits in the bit-field - * @param[in] boff Lowest bit number - */ -#define BF_MASK(bcnt, boff) ( ((1U << (bcnt)) - 1U) << (boff) ) - -/** - * @brief Get bit-field - * - * Macro that extracts selected bit-field from provided value - * - * @param[in] val Value from witch selected bit-field would be extracted - * @param[in] bcnt Number of bits in the bit-field - * @param[in] boff Lowest bit number - * - * @return Value of the selected bits - */ -#define BF_GET(val, bcnt, boff) ( ( (val) & BF_MASK((bcnt), (boff)) ) >> (boff) ) - -/** - * @brief Create bit-field value - * - * Value is masked and shifted to match given bit-field - * - * @param[in] val Value to set on bit-field - * @param[in] bcnt Number of bits for bit-field - * @param[in] boff Offset of bit-field - * - * @return Value positioned of given bit-field. - */ -#define BF_VAL(val, bcnt, boff) ( (((uint32_t)(val)) << (boff)) & BF_MASK(bcnt, boff) ) - -/** - * @name Configuration of complex bit-field - * - * @sa BF_CX - * @{ - */ -/** @brief Position of bit count in complex bit-field value */ -#define BF_CX_BCNT_POS 0U -/** @brief Mask of bit count in complex bit-field value */ -#define BF_CX_BCNT_MASK (0xffU << BF_CX_BCNT_POS) -/** @brief Position of bit position in complex bit-field value */ -#define BF_CX_BOFF_POS 8U -/** @brief Mask of bit position in complex bit-field value */ -#define BF_CX_BOFF_MASK (0xffU << BF_CX_BOFF_POS) -/** @} */ - -/** - * @brief Define complex bit-field - * - * Complex bit-field would contain its position and size in one number. - * @sa BF_CX_MASK - * @sa BF_CX_POS - * @sa BF_CX_GET - * - * @param[in] bcnt Number of bits in the bit-field - * @param[in] boff Lowest bit number - * - * @return The single number that describes the bit-field completely. - */ -#define BF_CX(bcnt, boff) ( ((((uint32_t)(bcnt)) << BF_CX_BCNT_POS) & BF_CX_BCNT_MASK) | ((((uint32_t)(boff)) << BF_CX_BOFF_POS) & BF_CX_BOFF_MASK) ) - -/** - * @brief Get number of bits in bit-field - * - * @sa BF_CX - * - * @param bf_cx Complex bit-field - * - * @return Number of bits in given bit-field - */ -#define BF_CX_BCNT(bf_cx) ( ((bf_cx) & BF_CX_BCNT_MASK) >> BF_CX_BCNT_POS ) - -/** - * @brief Get lowest bit number in the field - * - * @sa BF_CX - * - * @param[in] bf_cx Complex bit-field - * - * @return Lowest bit number in given bit-field - */ -#define BF_CX_BOFF(bf_cx) ( ((bf_cx) & BF_CX_BOFF_MASK) >> BF_CX_BOFF_POS ) - -/** - * @brief Get bit mask of the selected field - * - * @sa BF_CX - * - * @param[in] bf_cx Complex bit-field - * - * @return Mask of given bit-field - */ -#define BF_CX_MASK(bf_cx) BF_MASK(BF_CX_BCNT(bf_cx), BF_CX_BOFF(bf_cx)) - -/** - * @brief Get bit-field - * - * Macro that extracts selected bit-field from provided value. - * Bit-field is given as a complex value. - * - * @sa BF_CX - * @sa BF_GET - * - * @param[in] val Value from witch selected bit-field would be extracted - * @param[in] bf_cx Complex bit-field - * - * @return Value of the selected bits. - */ -#define BF_CX_GET(val, bf_cx) BF_GET(val, BF_CX_BCNT(bf_cx), BF_CX_BOFF(bf_cx)) - -/** - * @brief Create bit-field value - * - * Value is masked and shifted to match given bit-field. - * - * @param[in] val Value to set on bit-field - * @param[in] bf_cx Complex bit-field - * - * @return Value positioned of given bit-field. - */ -#define BF_CX_VAL(val, bf_cx) BF_VAL(val, BF_CX_BCNT(bf_cx), BF_CX_BOFF(bf_cx)) - -/** - * @brief Extracting data from the brackets - * - * This macro get rid of brackets around the argument. - * It can be used to pass multiple arguments in logical one argument to a macro. - * Call it with arguments inside brackets: - * @code - * #define ARGUMENTS (a, b, c) - * BRACKET_EXTRACT(ARGUMENTS) - * @endcode - * It would produce: - * @code - * a, b, c - * @endcode - * - * @param a Argument with anything inside brackets - * @return Anything that appears inside the brackets of the argument - * - * @note - * The argument of the macro have to be inside brackets. - * In other case the compilation would fail. - */ -#define BRACKET_EXTRACT(a) BRACKET_EXTRACT_(a) -#define BRACKET_EXTRACT_(a) BRACKET_EXTRACT__ a -#define BRACKET_EXTRACT__(...) __VA_ARGS__ - - -/** - * @brief Check if number of parameters is more than 1 - * - * @param ... Arguments to count - * - * @return 0 If argument count is <= 1 - * @return 1 If argument count is > 1 - * - * @sa NUM_VA_ARGS - * @sa NUM_IS_MORE_THAN_1 - */ -#define NUM_VA_ARGS_IS_MORE_THAN_1(...) NUM_IS_MORE_THAN_1(NUM_VA_ARGS(__VA_ARGS__)) - -/** - * @brief Check if given numeric value is bigger than 1 - * - * This macro accepts numeric value, that may be the result of argument expansion. - * This numeric value is then converted to 0 if it is lover than 1 or to 1 if - * its value is higher than 1. - * The generated result can be used to glue it into other macro mnemonic name. - * - * @param N Numeric value to check - * - * @return 0 If argument is <= 1 - * @return 1 If argument is > 1 - * - * @note Any existing definition of a form NUM_IS_MORE_THAN_1_PROBE_[N] can - * broke the result of this macro - */ -#define NUM_IS_MORE_THAN_1(N) NUM_IS_MORE_THAN_1_(N) -#define NUM_IS_MORE_THAN_1_(N) NUM_IS_MORE_THAN_1_PROBE_(NUM_IS_MORE_THAN_1_PROBE_ ## N, 1) -#define NUM_IS_MORE_THAN_1_PROBE_(...) GET_VA_ARG_1(GET_ARGS_AFTER_1(__VA_ARGS__)) -#define NUM_IS_MORE_THAN_1_PROBE_0 ~, 0 -#define NUM_IS_MORE_THAN_1_PROBE_1 ~, 0 - -/** - * @brief Get the first argument - * - * @param ... Arguments to select - * - * @return First argument or empty if no arguments are provided - */ -#define GET_VA_ARG_1(...) GET_VA_ARG_1_(__VA_ARGS__, ) // Make sure that also for 1 argument it works -#define GET_VA_ARG_1_(a1, ...) a1 - -/** - * @brief Get all the arguments but the first one - * - * @param ... Arguments to select - * - * @return All arguments after the first one or empty if less than 2 arguments are provided - */ -#define GET_ARGS_AFTER_1(...) GET_ARGS_AFTER_1_(__VA_ARGS__, ) // Make sure that also for 1 argument it works -#define GET_ARGS_AFTER_1_(a1, ...) __VA_ARGS__ - -/** - * @brief Size of a field in declared structure - * - * Macro that returns the size of the structure field. - * @param struct_type Variable type to get the field size from - * @param field Field name to analyze. It can be even field inside field (field.somethingelse.and_another). - * - * @return Size of the field - */ -#define FIELD_SIZE(struct_type, field) sizeof(((struct struct_type*)NULL)->field) - -/** - * @brief Number of elements in field array in declared structure - * - * Macro that returns number of elementy in structure field. - * @param struct_type Variable type to get the field size from - * @param field Field name to analyze. - * - * @return Number of elements in field array - * - * @sa FIELD_SIZE - */ -#define FIELD_ARRAY_SIZE(struct_type, field) (FIELD_SIZE(struct_type, field) / FIELD_SIZE(struct_type, field[0])) - -/** - * @brief Mapping macro - * - * Macro that process all arguments using given macro - * - * @param ... Macro name to be used for argument processing followed by arguments to process. - * Macro should have following form: MACRO(argument) - * - * @return All arguments processed by given macro - */ -#define MACRO_MAP(...) MACRO_MAP_(__VA_ARGS__) -#define MACRO_MAP_(...) MACRO_MAP_N(NUM_VA_ARGS_LESS_1(__VA_ARGS__), __VA_ARGS__) // To make sure it works also for 2 arguments in total - -/** - * @brief Mapping macro, recursive version - * - * Can be used in @ref MACRO_MAP macro - */ -#define MACRO_MAP_REC(...) MACRO_MAP_REC_(__VA_ARGS__) -#define MACRO_MAP_REC_(...) MACRO_MAP_REC_N(NUM_VA_ARGS_LESS_1(__VA_ARGS__), __VA_ARGS__) // To make sure it works also for 2 arguments in total -/** - * @brief Mapping N arguments macro - * - * Macro similar to @ref MACRO_MAP but maps exact number of arguments. - * If there is more arguments given, the rest would be ignored. - * - * @param N Number of arguments to map - * @param ... Macro name to be used for argument processing followed by arguments to process. - * Macro should have following form: MACRO(argument) - * - * @return Selected number of arguments processed by given macro - */ -#define MACRO_MAP_N(N, ...) MACRO_MAP_N_(N, __VA_ARGS__) -#define MACRO_MAP_N_(N, ...) CONCAT_2(MACRO_MAP_, N)(__VA_ARGS__, ) - -/** - * @brief Mapping N arguments macro, recursive version - * - * Can be used in @ref MACRO_MAP_N macro - */ -#define MACRO_MAP_REC_N(N, ...) MACRO_MAP_REC_N_(N, __VA_ARGS__) -#define MACRO_MAP_REC_N_(N, ...) CONCAT_2(MACRO_MAP_REC_, N)(__VA_ARGS__, ) - -#define MACRO_MAP_0( ...) -#define MACRO_MAP_1( macro, a, ...) macro(a) -#define MACRO_MAP_2( macro, a, ...) macro(a) MACRO_MAP_1 (macro, __VA_ARGS__, ) -#define MACRO_MAP_3( macro, a, ...) macro(a) MACRO_MAP_2 (macro, __VA_ARGS__, ) -#define MACRO_MAP_4( macro, a, ...) macro(a) MACRO_MAP_3 (macro, __VA_ARGS__, ) -#define MACRO_MAP_5( macro, a, ...) macro(a) MACRO_MAP_4 (macro, __VA_ARGS__, ) -#define MACRO_MAP_6( macro, a, ...) macro(a) MACRO_MAP_5 (macro, __VA_ARGS__, ) -#define MACRO_MAP_7( macro, a, ...) macro(a) MACRO_MAP_6 (macro, __VA_ARGS__, ) -#define MACRO_MAP_8( macro, a, ...) macro(a) MACRO_MAP_7 (macro, __VA_ARGS__, ) -#define MACRO_MAP_9( macro, a, ...) macro(a) MACRO_MAP_8 (macro, __VA_ARGS__, ) -#define MACRO_MAP_10(macro, a, ...) macro(a) MACRO_MAP_9 (macro, __VA_ARGS__, ) -#define MACRO_MAP_11(macro, a, ...) macro(a) MACRO_MAP_10(macro, __VA_ARGS__, ) -#define MACRO_MAP_12(macro, a, ...) macro(a) MACRO_MAP_11(macro, __VA_ARGS__, ) -#define MACRO_MAP_13(macro, a, ...) macro(a) MACRO_MAP_12(macro, __VA_ARGS__, ) -#define MACRO_MAP_14(macro, a, ...) macro(a) MACRO_MAP_13(macro, __VA_ARGS__, ) -#define MACRO_MAP_15(macro, a, ...) macro(a) MACRO_MAP_14(macro, __VA_ARGS__, ) - -#define MACRO_MAP_REC_0( ...) -#define MACRO_MAP_REC_1( macro, a, ...) macro(a) -#define MACRO_MAP_REC_2( macro, a, ...) macro(a) MACRO_MAP_REC_1 (macro, __VA_ARGS__, ) -#define MACRO_MAP_REC_3( macro, a, ...) macro(a) MACRO_MAP_REC_2 (macro, __VA_ARGS__, ) -#define MACRO_MAP_REC_4( macro, a, ...) macro(a) MACRO_MAP_REC_3 (macro, __VA_ARGS__, ) -#define MACRO_MAP_REC_5( macro, a, ...) macro(a) MACRO_MAP_REC_4 (macro, __VA_ARGS__, ) -#define MACRO_MAP_REC_6( macro, a, ...) macro(a) MACRO_MAP_REC_5 (macro, __VA_ARGS__, ) -#define MACRO_MAP_REC_7( macro, a, ...) macro(a) MACRO_MAP_REC_6 (macro, __VA_ARGS__, ) -#define MACRO_MAP_REC_8( macro, a, ...) macro(a) MACRO_MAP_REC_7 (macro, __VA_ARGS__, ) -#define MACRO_MAP_REC_9( macro, a, ...) macro(a) MACRO_MAP_REC_8 (macro, __VA_ARGS__, ) -#define MACRO_MAP_REC_10(macro, a, ...) macro(a) MACRO_MAP_REC_9 (macro, __VA_ARGS__, ) -#define MACRO_MAP_REC_11(macro, a, ...) macro(a) MACRO_MAP_REC_10(macro, __VA_ARGS__, ) -#define MACRO_MAP_REC_12(macro, a, ...) macro(a) MACRO_MAP_REC_11(macro, __VA_ARGS__, ) -#define MACRO_MAP_REC_13(macro, a, ...) macro(a) MACRO_MAP_REC_12(macro, __VA_ARGS__, ) -#define MACRO_MAP_REC_14(macro, a, ...) macro(a) MACRO_MAP_REC_13(macro, __VA_ARGS__, ) -#define MACRO_MAP_REC_15(macro, a, ...) macro(a) MACRO_MAP_REC_14(macro, __VA_ARGS__, ) - -/** - * @brief Mapping macro with current index - * - * Basically macro similar to @ref MACRO_MAP, but the processing function would get an argument - * and current argument index (beginning from 0). - * - * @param ... Macro name to be used for argument processing followed by arguments to process. - * Macro should have following form: MACRO(argument, index) - * @return All arguments processed by given macro - */ -#define MACRO_MAP_FOR(...) MACRO_MAP_FOR_(__VA_ARGS__) -#define MACRO_MAP_FOR_N_LIST 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 -#define MACRO_MAP_FOR_(...) MACRO_MAP_FOR_N(NUM_VA_ARGS_LESS_1(__VA_ARGS__), __VA_ARGS__) - -/** - * @brief Mapping N arguments macro with current index - * - * Macro is similar to @ref MACRO_MAP_FOR but maps exact number of arguments. - * If there is more arguments given, the rest would be ignored. - * - * @param N Number of arguments to map - * @param ... Macro name to be used for argument processing followed by arguments to process. - * Macro should have following form: MACRO(argument, index) - * - * @return Selected number of arguments processed by given macro - */ -#define MACRO_MAP_FOR_N(N, ...) MACRO_MAP_FOR_N_(N, __VA_ARGS__) -#define MACRO_MAP_FOR_N_(N, ...) CONCAT_2(MACRO_MAP_FOR_, N)((MACRO_MAP_FOR_N_LIST), __VA_ARGS__, ) - -#define MACRO_MAP_FOR_0( n_list, ...) -#define MACRO_MAP_FOR_1( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) -#define MACRO_MAP_FOR_2( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_1 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_3( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_2 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_4( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_3 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_5( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_4 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_6( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_5 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_7( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_6 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_8( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_7 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_9( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_8 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_10(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_9 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_11(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_10((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_12(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_11((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_13(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_12((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_14(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_13((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_15(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_14((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, ) - - -/** - * @brief Mapping macro with current index and parameter - * - * Version of @ref MACRO_MAP_FOR that passes also the same parameter to all macros. - * - * @param param Parameter that would be passed to each macro call during mapping. - * @param ... Macro name to be used for argument processing followed by arguments to process. - * Macro should have following form: MACRO(argument, index, param) - * - * @return All arguments processed by given macro - */ -#define MACRO_MAP_FOR_PARAM(param, ...) MACRO_MAP_FOR_PARAM_(param, __VA_ARGS__) -#define MACRO_MAP_FOR_PARAM_(param, ...) MACRO_MAP_FOR_PARAM_N(NUM_VA_ARGS_LESS_1(__VA_ARGS__), param, __VA_ARGS__) - -/** - * @brief Mapping N arguments macro with with current index and parameter - * - * @param N Number of arguments to map - * @param param Parameter that would be passed to each macro call during mapping. - * @param ... Macro name to be used for argument processing followed by arguments to process. - * Macro should have following form: MACRO(argument, index, param) - * - * @return All arguments processed by given macro - */ -#define MACRO_MAP_FOR_PARAM_N(N, param, ...) MACRO_MAP_FOR_PARAM_N_(N, param, __VA_ARGS__) -#define MACRO_MAP_FOR_PARAM_N_(N, param, ...) CONCAT_2(MACRO_MAP_FOR_PARAM_, N)((MACRO_MAP_FOR_N_LIST), param, __VA_ARGS__, ) - - -#define MACRO_MAP_FOR_PARAM_0( n_list, param, ...) -#define MACRO_MAP_FOR_PARAM_1( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) -#define MACRO_MAP_FOR_PARAM_2( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_1 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_PARAM_3( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_2 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_PARAM_4( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_3 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_PARAM_5( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_4 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_PARAM_6( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_5 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_PARAM_7( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_6 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_PARAM_8( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_7 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_PARAM_9( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_8 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_PARAM_10(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_9 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_PARAM_11(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_10((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_PARAM_12(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_11((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_PARAM_13(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_12((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_PARAM_14(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_13((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) -#define MACRO_MAP_FOR_PARAM_15(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_14((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, ) - - -/** - * @brief Repeating macro. - * - * @param count Count of repeats. - * @param macro Macro must have the following form: MACRO(arguments). - * @param ... Arguments passed to the macro. - * - * @return All arguments processed by the given macro. - */ -#define MACRO_REPEAT(count, macro, ...) MACRO_REPEAT_(count, macro, __VA_ARGS__) -#define MACRO_REPEAT_(count, macro, ...) CONCAT_2(MACRO_REPEAT_, count)(macro, __VA_ARGS__) - -#define MACRO_REPEAT_0(macro, ...) -#define MACRO_REPEAT_1(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_0(macro, __VA_ARGS__) -#define MACRO_REPEAT_2(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_1(macro, __VA_ARGS__) -#define MACRO_REPEAT_3(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_2(macro, __VA_ARGS__) -#define MACRO_REPEAT_4(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_3(macro, __VA_ARGS__) -#define MACRO_REPEAT_5(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_4(macro, __VA_ARGS__) -#define MACRO_REPEAT_6(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_5(macro, __VA_ARGS__) -#define MACRO_REPEAT_7(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_6(macro, __VA_ARGS__) -#define MACRO_REPEAT_8(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_7(macro, __VA_ARGS__) -#define MACRO_REPEAT_9(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_8(macro, __VA_ARGS__) -#define MACRO_REPEAT_10(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_9(macro, __VA_ARGS__) -#define MACRO_REPEAT_11(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_10(macro, __VA_ARGS__) -#define MACRO_REPEAT_12(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_11(macro, __VA_ARGS__) -#define MACRO_REPEAT_13(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_12(macro, __VA_ARGS__) -#define MACRO_REPEAT_14(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_13(macro, __VA_ARGS__) -#define MACRO_REPEAT_15(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_14(macro, __VA_ARGS__) - - -/** - * @brief Repeating macro with current index. - * - * Macro similar to @ref MACRO_REPEAT but the processing function gets the arguments - * and the current argument index (beginning from 0). - - * @param count Count of repeats. - * @param macro Macro must have the following form: MACRO(index, arguments). - * @param ... Arguments passed to the macro. - * - * @return All arguments processed by the given macro. - */ -#define MACRO_REPEAT_FOR(count, macro, ...) MACRO_REPEAT_FOR_(count, macro, __VA_ARGS__) -#define MACRO_REPEAT_FOR_(count, macro, ...) CONCAT_2(MACRO_REPEAT_FOR_, count)((MACRO_MAP_FOR_N_LIST), macro, __VA_ARGS__) - -#define MACRO_REPEAT_FOR_0(n_list, macro, ...) -#define MACRO_REPEAT_FOR_1(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_0((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) -#define MACRO_REPEAT_FOR_2(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_1((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) -#define MACRO_REPEAT_FOR_3(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_2((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) -#define MACRO_REPEAT_FOR_4(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_3((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) -#define MACRO_REPEAT_FOR_5(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_4((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) -#define MACRO_REPEAT_FOR_6(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_5((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) -#define MACRO_REPEAT_FOR_7(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_6((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) -#define MACRO_REPEAT_FOR_8(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_7((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) -#define MACRO_REPEAT_FOR_9(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_8((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) -#define MACRO_REPEAT_FOR_10(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_9((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) -#define MACRO_REPEAT_FOR_11(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_10((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) -#define MACRO_REPEAT_FOR_12(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_11((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) -#define MACRO_REPEAT_FOR_13(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_12((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) -#define MACRO_REPEAT_FOR_14(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_13((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) -#define MACRO_REPEAT_FOR_15(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_14((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__) - -/**@brief Adding curly brace to the macro parameter. - * - * Useful in array of structures initialization. - * - * @param p Parameter to put into the curly brace. */ -#define PARAM_CBRACE(p) { p }, - - -/**@brief Function for changing the value unit. - * - * @param[in] value Value to be rescaled. - * @param[in] old_unit_reversal Reversal of the incoming unit. - * @param[in] new_unit_reversal Reversal of the desired unit. - * - * @return Number of bytes written. - */ -static __INLINE uint64_t value_rescale(uint32_t value, uint32_t old_unit_reversal, uint16_t new_unit_reversal) -{ - return (uint64_t)ROUNDED_DIV((uint64_t)value * new_unit_reversal, old_unit_reversal); -} - -/**@brief Function for encoding a uint16 value. - * - * @param[in] value Value to be encoded. - * @param[out] p_encoded_data Buffer where the encoded data is to be written. - * - * @return Number of bytes written. - */ -static __INLINE uint8_t uint16_encode(uint16_t value, uint8_t * p_encoded_data) -{ - p_encoded_data[0] = (uint8_t) ((value & 0x00FF) >> 0); - p_encoded_data[1] = (uint8_t) ((value & 0xFF00) >> 8); - return sizeof(uint16_t); -} - -/**@brief Function for encoding a three-byte value. - * - * @param[in] value Value to be encoded. - * @param[out] p_encoded_data Buffer where the encoded data is to be written. - * - * @return Number of bytes written. - */ -static __INLINE uint8_t uint24_encode(uint32_t value, uint8_t * p_encoded_data) -{ - p_encoded_data[0] = (uint8_t) ((value & 0x000000FF) >> 0); - p_encoded_data[1] = (uint8_t) ((value & 0x0000FF00) >> 8); - p_encoded_data[2] = (uint8_t) ((value & 0x00FF0000) >> 16); - return 3; -} - -/**@brief Function for encoding a uint32 value. - * - * @param[in] value Value to be encoded. - * @param[out] p_encoded_data Buffer where the encoded data is to be written. - * - * @return Number of bytes written. - */ -static __INLINE uint8_t uint32_encode(uint32_t value, uint8_t * p_encoded_data) -{ - p_encoded_data[0] = (uint8_t) ((value & 0x000000FF) >> 0); - p_encoded_data[1] = (uint8_t) ((value & 0x0000FF00) >> 8); - p_encoded_data[2] = (uint8_t) ((value & 0x00FF0000) >> 16); - p_encoded_data[3] = (uint8_t) ((value & 0xFF000000) >> 24); - return sizeof(uint32_t); -} - -/**@brief Function for encoding a uint48 value. - * - * @param[in] value Value to be encoded. - * @param[out] p_encoded_data Buffer where the encoded data is to be written. - * - * @return Number of bytes written. - */ -static __INLINE uint8_t uint48_encode(uint64_t value, uint8_t * p_encoded_data) -{ - p_encoded_data[0] = (uint8_t) ((value & 0x0000000000FF) >> 0); - p_encoded_data[1] = (uint8_t) ((value & 0x00000000FF00) >> 8); - p_encoded_data[2] = (uint8_t) ((value & 0x000000FF0000) >> 16); - p_encoded_data[3] = (uint8_t) ((value & 0x0000FF000000) >> 24); - p_encoded_data[4] = (uint8_t) ((value & 0x00FF00000000) >> 32); - p_encoded_data[5] = (uint8_t) ((value & 0xFF0000000000) >> 40); - return 6; -} - -/**@brief Function for decoding a uint16 value. - * - * @param[in] p_encoded_data Buffer where the encoded data is stored. - * - * @return Decoded value. - */ -static __INLINE uint16_t uint16_decode(const uint8_t * p_encoded_data) -{ - return ( (((uint16_t)((uint8_t *)p_encoded_data)[0])) | - (((uint16_t)((uint8_t *)p_encoded_data)[1]) << 8 )); -} - -/**@brief Function for decoding a uint16 value in big-endian format. - * - * @param[in] p_encoded_data Buffer where the encoded data is stored. - * - * @return Decoded value. - */ -static __INLINE uint16_t uint16_big_decode(const uint8_t * p_encoded_data) -{ - return ( (((uint16_t)((uint8_t *)p_encoded_data)[0]) << 8 ) | - (((uint16_t)((uint8_t *)p_encoded_data)[1])) ); -} - -/**@brief Function for decoding a three-byte value. - * - * @param[in] p_encoded_data Buffer where the encoded data is stored. - * - * @return Decoded value (uint32_t). - */ -static __INLINE uint32_t uint24_decode(const uint8_t * p_encoded_data) -{ - return ( (((uint32_t)((uint8_t *)p_encoded_data)[0]) << 0) | - (((uint32_t)((uint8_t *)p_encoded_data)[1]) << 8) | - (((uint32_t)((uint8_t *)p_encoded_data)[2]) << 16)); -} - -/**@brief Function for decoding a uint32 value. - * - * @param[in] p_encoded_data Buffer where the encoded data is stored. - * - * @return Decoded value. - */ -static __INLINE uint32_t uint32_decode(const uint8_t * p_encoded_data) -{ - return ( (((uint32_t)((uint8_t *)p_encoded_data)[0]) << 0) | - (((uint32_t)((uint8_t *)p_encoded_data)[1]) << 8) | - (((uint32_t)((uint8_t *)p_encoded_data)[2]) << 16) | - (((uint32_t)((uint8_t *)p_encoded_data)[3]) << 24 )); -} - -/**@brief Function for decoding a uint32 value in big-endian format. - * - * @param[in] p_encoded_data Buffer where the encoded data is stored. - * - * @return Decoded value. - */ -static __INLINE uint32_t uint32_big_decode(const uint8_t * p_encoded_data) -{ - return ( (((uint32_t)((uint8_t *)p_encoded_data)[0]) << 24) | - (((uint32_t)((uint8_t *)p_encoded_data)[1]) << 16) | - (((uint32_t)((uint8_t *)p_encoded_data)[2]) << 8) | - (((uint32_t)((uint8_t *)p_encoded_data)[3]) << 0) ); -} - -/** - * @brief Function for encoding an uint16 value in big-endian format. - * - * @param[in] value Value to be encoded. - * @param[out] p_encoded_data Buffer where the encoded data will be written. - * - * @return Number of bytes written. - */ -static __INLINE uint8_t uint16_big_encode(uint16_t value, uint8_t * p_encoded_data) -{ - p_encoded_data[0] = (uint8_t) (value >> 8); - p_encoded_data[1] = (uint8_t) (value & 0xFF); - - return sizeof(uint16_t); -} - -/**@brief Function for encoding a uint32 value in big-endian format. - * - * @param[in] value Value to be encoded. - * @param[out] p_encoded_data Buffer where the encoded data will be written. - * - * @return Number of bytes written. - */ -static __INLINE uint8_t uint32_big_encode(uint32_t value, uint8_t * p_encoded_data) -{ - *(uint32_t *)p_encoded_data = __REV(value); - return sizeof(uint32_t); -} - -/**@brief Function for decoding a uint48 value. - * - * @param[in] p_encoded_data Buffer where the encoded data is stored. - * - * @return Decoded value. (uint64_t) - */ -static __INLINE uint64_t uint48_decode(const uint8_t * p_encoded_data) -{ - return ( (((uint64_t)((uint8_t *)p_encoded_data)[0]) << 0) | - (((uint64_t)((uint8_t *)p_encoded_data)[1]) << 8) | - (((uint64_t)((uint8_t *)p_encoded_data)[2]) << 16) | - (((uint64_t)((uint8_t *)p_encoded_data)[3]) << 24) | - (((uint64_t)((uint8_t *)p_encoded_data)[4]) << 32) | - (((uint64_t)((uint8_t *)p_encoded_data)[5]) << 40 )); -} - -/** @brief Function for converting the input voltage (in milli volts) into percentage of 3.0 Volts. - * - * @details The calculation is based on a linearized version of the battery's discharge - * curve. 3.0V returns 100% battery level. The limit for power failure is 2.1V and - * is considered to be the lower boundary. - * - * The discharge curve for CR2032 is non-linear. In this model it is split into - * 4 linear sections: - * - Section 1: 3.0V - 2.9V = 100% - 42% (58% drop on 100 mV) - * - Section 2: 2.9V - 2.74V = 42% - 18% (24% drop on 160 mV) - * - Section 3: 2.74V - 2.44V = 18% - 6% (12% drop on 300 mV) - * - Section 4: 2.44V - 2.1V = 6% - 0% (6% drop on 340 mV) - * - * These numbers are by no means accurate. Temperature and - * load in the actual application is not accounted for! - * - * @param[in] mvolts The voltage in mV - * - * @return Battery level in percent. -*/ -static __INLINE uint8_t battery_level_in_percent(const uint16_t mvolts) -{ - uint8_t battery_level; - - if (mvolts >= 3000) - { - battery_level = 100; - } - else if (mvolts > 2900) - { - battery_level = 100 - ((3000 - mvolts) * 58) / 100; - } - else if (mvolts > 2740) - { - battery_level = 42 - ((2900 - mvolts) * 24) / 160; - } - else if (mvolts > 2440) - { - battery_level = 18 - ((2740 - mvolts) * 12) / 300; - } - else if (mvolts > 2100) - { - battery_level = 6 - ((2440 - mvolts) * 6) / 340; - } - else - { - battery_level = 0; - } - - return battery_level; -} - -/**@brief Function for checking if a pointer value is aligned to a 4 byte boundary. - * - * @param[in] p Pointer value to be checked. - * - * @return TRUE if pointer is aligned to a 4 byte boundary, FALSE otherwise. - */ -static __INLINE bool is_word_aligned(void const* p) -{ - return (((uintptr_t)p & 0x03) == 0); -} - -/** - * @brief Function for checking if provided address is located in stack space. - * - * @param[in] ptr Pointer to be checked. - * - * @return true if address is in stack space, false otherwise. - */ -static __INLINE bool is_address_from_stack(void * ptr) -{ - if (((uint32_t)ptr >= (uint32_t)STACK_BASE) && - ((uint32_t)ptr < (uint32_t)STACK_TOP) ) - { - return true; - } - else - { - return false; - } -} - - -#ifdef __cplusplus -} -#endif - -#endif // APP_UTIL_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/app_util_bds.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/app_util_bds.h deleted file mode 100644 index e88069322f5..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/app_util_bds.h +++ /dev/null @@ -1,449 +0,0 @@ -/** - * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** @file - * - * @defgroup app_util Utility Functions and Definitions - * @{ - * @ingroup app_common - * - * @brief Various types and definitions available to all applications. - */ - -#ifndef APP_UTIL_BDS_H__ -#define APP_UTIL_BDS_H__ - -#include -#include -#include -#include "compiler_abstraction.h" -#include "app_util.h" -#include "ble_srv_common.h" -#include "nordic_common.h" - -#ifdef __cplusplus -extern "C" { -#endif - -typedef uint8_t nibble_t; -typedef uint32_t uint24_t; -typedef uint64_t uint40_t; - -/**@brief IEEE 11073-20601 Regulatory Certification Data List Structure */ -typedef struct -{ - uint8_t * p_list; /**< Pointer the byte array containing the encoded opaque structure based on IEEE 11073-20601 specification. */ - uint8_t list_len; /**< Length of the byte array. */ -} regcertdatalist_t; - -/**@brief SFLOAT format (IEEE-11073 16-bit FLOAT, meaning 4 bits for exponent (base 10) and 12 bits mantissa) */ -typedef struct -{ - int8_t exponent; /**< Base 10 exponent, should be using only 4 bits */ - int16_t mantissa; /**< Mantissa, should be using only 12 bits */ -} sfloat_t; - -/**@brief Date and Time structure. */ -typedef struct -{ - uint16_t year; - uint8_t month; - uint8_t day; - uint8_t hours; - uint8_t minutes; - uint8_t seconds; -} ble_date_time_t; - - -/**@brief Function for encoding a uint16 value. - * - * @param[in] p_value Value to be encoded. - * @param[out] p_encoded_data Buffer where the encoded data is to be written. - * - * @return Number of bytes written. - */ -static __INLINE uint8_t bds_uint16_encode(const uint16_t * p_value, uint8_t * p_encoded_data) -{ - p_encoded_data[0] = (uint8_t) ((*p_value & 0x00FF) >> 0); - p_encoded_data[1] = (uint8_t) ((*p_value & 0xFF00) >> 8); - return sizeof(uint16_t); -} - -static __INLINE uint8_t bds_int16_encode(const int16_t * p_value, uint8_t * p_encoded_data) -{ - uint16_t tmp = *p_value; - return bds_uint16_encode(&tmp, p_encoded_data); -} - -/**@brief Function for encoding a uint24 value. - * - * @param[in] p_value Value to be encoded. - * @param[out] p_encoded_data Buffer where the encoded data is to be written. - * - * @return Number of bytes written. - */ -static __INLINE uint8_t bds_uint24_encode(const uint32_t * p_value, uint8_t * p_encoded_data) -{ - p_encoded_data[0] = (uint8_t) ((*p_value & 0x000000FF) >> 0); - p_encoded_data[1] = (uint8_t) ((*p_value & 0x0000FF00) >> 8); - p_encoded_data[2] = (uint8_t) ((*p_value & 0x00FF0000) >> 16); - return (3); -} - - -/**@brief Function for encoding a uint32 value. - * - * @param[in] p_value Value to be encoded. - * @param[out] p_encoded_data Buffer where the encoded data is to be written. - * - * @return Number of bytes written. - */ -static __INLINE uint8_t bds_uint32_encode(const uint32_t * p_value, uint8_t * p_encoded_data) -{ - p_encoded_data[0] = (uint8_t) ((*p_value & 0x000000FF) >> 0); - p_encoded_data[1] = (uint8_t) ((*p_value & 0x0000FF00) >> 8); - p_encoded_data[2] = (uint8_t) ((*p_value & 0x00FF0000) >> 16); - p_encoded_data[3] = (uint8_t) ((*p_value & 0xFF000000) >> 24); - return sizeof(uint32_t); -} - - -/**@brief Function for encoding a uint40 value. - * - * @param[in] p_value Value to be encoded. - * @param[out] p_encoded_data Buffer where the encoded data is to be written. - * - * @return Number of bytes written. - */ -static __INLINE uint8_t bds_uint40_encode(const uint64_t * p_value, uint8_t * p_encoded_data) -{ - p_encoded_data[0] = (uint8_t) ((*p_value & 0x00000000000000FF) >> 0); - p_encoded_data[1] = (uint8_t) ((*p_value & 0x000000000000FF00) >> 8); - p_encoded_data[2] = (uint8_t) ((*p_value & 0x0000000000FF0000) >> 16); - p_encoded_data[3] = (uint8_t) ((*p_value & 0x00000000FF000000) >> 24); - p_encoded_data[4] = (uint8_t) ((*p_value & 0x000000FF00000000) >> 32); - return 5; -} - -/**@brief Function for encoding a sfloat value. - * - * @param[in] p_value Value to be encoded. - * @param[out] p_encoded_data Buffer where the encoded data is to be written. - * - * @return Number of bytes written. - */ -static __INLINE uint8_t bds_sfloat_encode(const sfloat_t * p_value, uint8_t * p_encoded_data) -{ - uint16_t encoded_val; - - encoded_val = ((p_value->exponent << 12) & 0xF000) | - ((p_value->mantissa << 0) & 0x0FFF); - - return(bds_uint16_encode(&encoded_val, p_encoded_data)); -} - - -/**@brief Function for encoding a uint8_array value. - * - * @param[in] p_value Value to be encoded. - * @param[out] p_encoded_data Buffer where the encoded data is to be written. - */ -static __INLINE uint8_t bds_uint8_array_encode(const uint8_array_t * p_value, - uint8_t * p_encoded_data) -{ - memcpy(p_encoded_data, p_value->p_data, p_value->size); - return p_value->size; -} - - -/**@brief Function for encoding a utf8_str value. - * - * @param[in] p_value Value to be encoded. - * @param[out] p_encoded_data Buffer where the encoded data is to be written. - - */ -static __INLINE uint8_t bds_ble_srv_utf8_str_encode(const ble_srv_utf8_str_t * p_value, - uint8_t * p_encoded_data) -{ - memcpy(p_encoded_data, p_value->p_str, p_value->length); - return p_value->length; -} - -/**@brief Function for encoding a regcertdatalist value. - * - * @param[in] p_value Value to be encoded. - * @param[out] p_encoded_data Buffer where the encoded data is to be written. - - */ -static __INLINE uint8_t bds_regcertdatalist_encode(const regcertdatalist_t * p_value, - uint8_t * p_encoded_data) -{ - memcpy(p_encoded_data, p_value->p_list, p_value->list_len); - return p_value->list_len; -} - - -/**@brief Function for decoding a date_time value. - * - * @param[in] p_date_time pointer to the date_time structure to encode. - * @param[in] p_encoded_data pointer to the encoded data - * @return length of the encoded field. - */ -static __INLINE uint8_t bds_ble_date_time_encode(const ble_date_time_t * p_date_time, - uint8_t * p_encoded_data) -{ - uint8_t len = bds_uint16_encode(&p_date_time->year, &p_encoded_data[0]); - - p_encoded_data[len++] = p_date_time->month; - p_encoded_data[len++] = p_date_time->day; - p_encoded_data[len++] = p_date_time->hours; - p_encoded_data[len++] = p_date_time->minutes; - p_encoded_data[len++] = p_date_time->seconds; - - return len; -} - - -/**@brief Function for decoding a uint16 value. - * - * @param[in] len length of the field to be decoded. - * @param[in] p_encoded_data Buffer where the encoded data is stored. - * @param[in] p_decoded_val pointer to the decoded value - * @return length of the decoded field. - */ -static __INLINE uint8_t bds_uint16_decode(const uint8_t len, - const uint8_t * p_encoded_data, - uint16_t * p_decoded_val) -{ - UNUSED_VARIABLE(len); - *p_decoded_val = (((uint16_t)((uint8_t *)p_encoded_data)[0])) | - (((uint16_t)((uint8_t *)p_encoded_data)[1]) << 8 ); - return (sizeof(uint16_t)); -} - - -/**@brief Function for decoding a int16 value. - * - * @param[in] len length of the field to be decoded. - * @param[in] p_encoded_data Buffer where the encoded data is stored. - * @param[in] p_decoded_val pointer to the decoded value - * @return length of the decoded field. - */ -static __INLINE uint8_t bds_int16_decode(const uint8_t len, - const uint8_t * p_encoded_data, - int16_t * p_decoded_val) -{ - UNUSED_VARIABLE(len); - uint16_t tmp = 0; - uint8_t retval = bds_uint16_decode(len, p_encoded_data, &tmp); - *p_decoded_val = (int16_t)tmp; - return retval; -} - - -/**@brief Function for decoding a uint24 value. - * - * @param[in] len length of the field to be decoded. - * @param[in] p_encoded_data Buffer where the encoded data is stored. - * @param[in] p_decoded_val pointer to the decoded value - * - * @return length of the decoded field. - */ -static __INLINE uint8_t bds_uint24_decode(const uint8_t len, - const uint8_t * p_encoded_data, - uint32_t * p_decoded_val) -{ - UNUSED_VARIABLE(len); - *p_decoded_val = (((uint32_t)((uint8_t *)p_encoded_data)[0]) << 0) | - (((uint32_t)((uint8_t *)p_encoded_data)[1]) << 8) | - (((uint32_t)((uint8_t *)p_encoded_data)[2]) << 16); - return (3); -} - - -/**@brief Function for decoding a uint32 value. - * - * @param[in] len length of the field to be decoded. - * @param[in] p_encoded_data Buffer where the encoded data is stored. - * @param[in] p_decoded_val pointer to the decoded value - * - * @return length of the decoded field. - */ -static __INLINE uint8_t bds_uint32_decode(const uint8_t len, - const uint8_t * p_encoded_data, - uint32_t * p_decoded_val) -{ - UNUSED_VARIABLE(len); - *p_decoded_val = (((uint32_t)((uint8_t *)p_encoded_data)[0]) << 0) | - (((uint32_t)((uint8_t *)p_encoded_data)[1]) << 8) | - (((uint32_t)((uint8_t *)p_encoded_data)[2]) << 16) | - (((uint32_t)((uint8_t *)p_encoded_data)[3]) << 24 ); - return (sizeof(uint32_t)); -} - - -/**@brief Function for decoding a uint40 value. - * - * @param[in] len length of the field to be decoded. - * @param[in] p_encoded_data Buffer where the encoded data is stored. - * @param[in] p_decoded_val pointer to the decoded value - * - * @return length of the decoded field. - */ -static __INLINE uint8_t bds_uint40_decode(const uint8_t len, - const uint8_t * p_encoded_data, - uint64_t * p_decoded_val) -{ - UNUSED_VARIABLE(len); - *p_decoded_val = (((uint64_t)((uint8_t *)p_encoded_data)[0]) << 0) | - (((uint64_t)((uint8_t *)p_encoded_data)[1]) << 8) | - (((uint64_t)((uint8_t *)p_encoded_data)[2]) << 16) | - (((uint64_t)((uint8_t *)p_encoded_data)[3]) << 24 )| - (((uint64_t)((uint8_t *)p_encoded_data)[4]) << 32 ); - return (40); -} - - -/**@brief Function for decoding a sfloat value. - * - * @param[in] len length of the field to be decoded. - * @param[in] p_encoded_data Buffer where the encoded data is stored. - * @param[in] p_decoded_val pointer to the decoded value - * - * @return length of the decoded field. - - */ -static __INLINE uint8_t bds_sfloat_decode(const uint8_t len, - const uint8_t * p_encoded_data, - sfloat_t * p_decoded_val) -{ - - p_decoded_val->exponent = 0; - bds_uint16_decode(len, p_encoded_data, (uint16_t*)&p_decoded_val->mantissa); - p_decoded_val->exponent = (uint8_t)((p_decoded_val->mantissa & 0xF000) >> 12); - p_decoded_val->mantissa &= 0x0FFF; - return len; -} - - -/**@brief Function for decoding a uint8_array value. - * - * @param[in] len length of the field to be decoded. - * @param[in] p_encoded_data Buffer where the encoded data is stored. - * @param[in] p_decoded_val pointer to the decoded value - * - * @return length of the decoded field. - */ -static __INLINE uint8_t bds_uint8_array_decode(const uint8_t len, - const uint8_t * p_encoded_data, - uint8_array_t * p_decoded_val) -{ - memcpy(p_decoded_val->p_data, p_encoded_data, len); - p_decoded_val->size = len; - return p_decoded_val->size; -} - - -/**@brief Function for decoding a utf8_str value. - * - * @param[in] len length of the field to be decoded. - * @param[in] p_encoded_data Buffer where the encoded data is stored. - * @param[in] p_decoded_val pointer to the decoded value - * - * @return length of the decoded field. - */ -static __INLINE uint8_t bds_ble_srv_utf8_str_decode(const uint8_t len, - const uint8_t * p_encoded_data, - ble_srv_utf8_str_t * p_decoded_val) -{ - p_decoded_val->p_str = (uint8_t*)p_encoded_data; - p_decoded_val->length = len; - return p_decoded_val->length; -} - - -/**@brief Function for decoding a regcertdatalist value. - * - * @param[in] len length of the field to be decoded. - * @param[in] p_encoded_data Buffer where the encoded data is stored. - * @param[in] p_decoded_val pointer to the decoded value - * - * @return length of the decoded field. - */ -static __INLINE uint8_t bds_regcertdatalist_decode(const uint8_t len, - const uint8_t * p_encoded_data, - regcertdatalist_t * p_decoded_val) -{ - memcpy(p_decoded_val->p_list, p_encoded_data, len); - p_decoded_val->list_len = len; - return p_decoded_val->list_len; -} - - -/**@brief Function for decoding a date_time value. - * - * @param[in] len length of the field to be decoded. - * @param[in] p_encoded_data Buffer where the encoded data is stored. - * @param[in] p_date_time pointer to the decoded value - * - * @return length of the decoded field. - */ -static __INLINE uint8_t bds_ble_date_time_decode(const uint8_t len, - const uint8_t * p_encoded_data, - ble_date_time_t * p_date_time) -{ - UNUSED_VARIABLE(len); - uint8_t pos = bds_uint16_decode(len, &p_encoded_data[0], &p_date_time->year); - p_date_time->month = p_encoded_data[pos++]; - p_date_time->day = p_encoded_data[pos++]; - p_date_time->hours = p_encoded_data[pos++]; - p_date_time->minutes = p_encoded_data[pos++]; - p_date_time->seconds = p_encoded_data[pos++]; - - return pos; -} - - -#ifdef __cplusplus -} -#endif - -#endif // APP_UTIL_BDS_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/app_util_platform.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/app_util_platform.c deleted file mode 100644 index 740d42233b3..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/app_util_platform.c +++ /dev/null @@ -1,127 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "app_util_platform.h" - -#ifdef SOFTDEVICE_PRESENT -/* Global nvic state instance, required by nrf_nvic.h */ -nrf_nvic_state_t nrf_nvic_state; -#endif - -static uint32_t m_in_critical_region = 0; - -void app_util_disable_irq(void) -{ - __disable_irq(); - m_in_critical_region++; -} - -void app_util_enable_irq(void) -{ - m_in_critical_region--; - if (m_in_critical_region == 0) - { - __enable_irq(); - } -} - -void app_util_critical_region_enter(uint8_t *p_nested) -{ -#if __CORTEX_M == (0x04U) - ASSERT(APP_LEVEL_PRIVILEGED == privilege_level_get()) -#endif - -#if defined(SOFTDEVICE_PRESENT) - /* return value can be safely ignored */ - (void) sd_nvic_critical_region_enter(p_nested); -#else - app_util_disable_irq(); -#endif -} - -void app_util_critical_region_exit(uint8_t nested) -{ -#if __CORTEX_M == (0x04U) - ASSERT(APP_LEVEL_PRIVILEGED == privilege_level_get()) -#endif - -#if defined(SOFTDEVICE_PRESENT) - /* return value can be safely ignored */ - (void) sd_nvic_critical_region_exit(nested); -#else - app_util_enable_irq(); -#endif -} - - -uint8_t privilege_level_get(void) -{ -#if __CORTEX_M == (0x00U) || defined(_WIN32) || defined(__unix) || defined(__APPLE__) - /* the Cortex-M0 has no concept of privilege */ - return APP_LEVEL_PRIVILEGED; -#elif __CORTEX_M == (0x04U) - uint32_t isr_vector_num = __get_IPSR() & IPSR_ISR_Msk ; - if (0 == isr_vector_num) - { - /* Thread Mode, check nPRIV */ - int32_t control = __get_CONTROL(); - return control & CONTROL_nPRIV_Msk ? APP_LEVEL_UNPRIVILEGED : APP_LEVEL_PRIVILEGED; - } - else - { - /* Handler Mode, always privileged */ - return APP_LEVEL_PRIVILEGED; - } -#endif -} - - -uint8_t current_int_priority_get(void) -{ - uint32_t isr_vector_num = __get_IPSR() & IPSR_ISR_Msk ; - if (isr_vector_num > 0) - { - int32_t irq_type = ((int32_t)isr_vector_num - EXTERNAL_INT_VECTOR_OFFSET); - return (NVIC_GetPriority((IRQn_Type)irq_type) & 0xFF); - } - else - { - return APP_IRQ_PRIORITY_THREAD; - } -} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/app_util_platform.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/app_util_platform.h deleted file mode 100644 index 141c3394bcb..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/app_util_platform.h +++ /dev/null @@ -1,262 +0,0 @@ -/** - * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/**@file - * - * @defgroup app_util_platform Utility Functions and Definitions (Platform) - * @{ - * @ingroup app_common - * - * @brief Various types and definitions available to all applications when using SoftDevice. - */ - -#ifndef APP_UTIL_PLATFORM_H__ -#define APP_UTIL_PLATFORM_H__ - -#include -#include "compiler_abstraction.h" -#include "nrf.h" -#ifdef SOFTDEVICE_PRESENT -#include "nrf_soc.h" -#include "nrf_nvic.h" -#endif -#include "nrf_assert.h" -#include "app_error.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#if __CORTEX_M == (0x00U) -#define _PRIO_SD_HIGH 0 -#define _PRIO_APP_HIGH 1 -#define _PRIO_APP_MID 1 -#define _PRIO_SD_LOW 2 -#define _PRIO_APP_LOW 3 -#define _PRIO_APP_LOWEST 3 -#define _PRIO_THREAD 4 -#elif __CORTEX_M == (0x04U) -#define _PRIO_SD_HIGH 0 -#define _PRIO_SD_MID 1 -#define _PRIO_APP_HIGH 2 -#define _PRIO_APP_MID 3 -#define _PRIO_SD_LOW 4 -#define _PRIO_SD_LOWEST 5 -#define _PRIO_APP_LOW 6 -#define _PRIO_APP_LOWEST 7 -#define _PRIO_THREAD 15 -#else - #error "No platform defined" -#endif - - -//lint -save -e113 -e452 -/**@brief The interrupt priorities available to the application while the SoftDevice is active. */ -typedef enum -{ -#ifndef SOFTDEVICE_PRESENT - APP_IRQ_PRIORITY_HIGHEST = _PRIO_SD_HIGH, -#else - APP_IRQ_PRIORITY_HIGHEST = _PRIO_APP_HIGH, -#endif - APP_IRQ_PRIORITY_HIGH = _PRIO_APP_HIGH, -#ifndef SOFTDEVICE_PRESENT - APP_IRQ_PRIORITY_MID = _PRIO_SD_LOW, -#else - APP_IRQ_PRIORITY_MID = _PRIO_APP_MID, -#endif - APP_IRQ_PRIORITY_LOW = _PRIO_APP_LOW, - APP_IRQ_PRIORITY_LOWEST = _PRIO_APP_LOWEST, - APP_IRQ_PRIORITY_THREAD = _PRIO_THREAD /**< "Interrupt level" when running in Thread Mode. */ -} app_irq_priority_t; -//lint -restore - - -/*@brief The privilege levels available to applications in Thread Mode */ -typedef enum -{ - APP_LEVEL_UNPRIVILEGED, - APP_LEVEL_PRIVILEGED -} app_level_t; - -/**@cond NO_DOXYGEN */ -#define EXTERNAL_INT_VECTOR_OFFSET 16 -/**@endcond */ - -/**@brief Macro for setting a breakpoint. - */ -#if defined(__GNUC__) -#define NRF_BREAKPOINT __builtin_trap() -#else -#define NRF_BREAKPOINT __BKPT(0) -#endif - -/** @brief Macro for setting a breakpoint. - * - * If it is possible to detect debugger presence then it is set only in that case. - * - */ -#if __CORTEX_M == 0x04 -#define NRF_BREAKPOINT_COND do { \ - /* C_DEBUGEN == 1 -> Debugger Connected */ \ - if (CoreDebug->DHCSR & CoreDebug_DHCSR_C_DEBUGEN_Msk) \ - { \ - /* Generate breakpoint if debugger is connected */ \ - NRF_BREAKPOINT; \ - } \ - }while (0) -#else -#define NRF_BREAKPOINT_COND NRF_BREAKPOINT -#endif // __CORTEX_M == 0x04 - -#if defined ( __CC_ARM ) -#define PACKED(TYPE) __packed TYPE -#define PACKED_STRUCT PACKED(struct) -#elif defined ( __GNUC__ ) -#define PACKED __attribute__((packed)) -#define PACKED_STRUCT struct PACKED -#elif defined (__ICCARM__) -#define PACKED_STRUCT __packed struct -#endif - -void app_util_critical_region_enter (uint8_t *p_nested); -void app_util_critical_region_exit (uint8_t nested); - -/**@brief Macro for entering a critical region. - * - * @note Due to implementation details, there must exist one and only one call to - * CRITICAL_REGION_EXIT() for each call to CRITICAL_REGION_ENTER(), and they must be located - * in the same scope. - */ -#ifdef SOFTDEVICE_PRESENT -#define CRITICAL_REGION_ENTER() \ - { \ - uint8_t __CR_NESTED = 0; \ - app_util_critical_region_enter(&__CR_NESTED); -#else -#define CRITICAL_REGION_ENTER() app_util_critical_region_enter(NULL) -#endif - -/**@brief Macro for leaving a critical region. - * - * @note Due to implementation details, there must exist one and only one call to - * CRITICAL_REGION_EXIT() for each call to CRITICAL_REGION_ENTER(), and they must be located - * in the same scope. - */ -#ifdef SOFTDEVICE_PRESENT -#define CRITICAL_REGION_EXIT() \ - app_util_critical_region_exit(__CR_NESTED); \ - } -#else -#define CRITICAL_REGION_EXIT() app_util_critical_region_exit(0) -#endif - -/* Workaround for Keil 4 */ -#ifndef IPSR_ISR_Msk -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ -#endif - - - -/**@brief Macro to enable anonymous unions from a certain point in the code. - */ -#if defined(__CC_ARM) - #define ANON_UNIONS_ENABLE _Pragma("push") \ - _Pragma("anon_unions") -#elif defined(__ICCARM__) - #define ANON_UNIONS_ENABLE _Pragma("language=extended") -#else - #define ANON_UNIONS_ENABLE - // No action will be taken. - // For GCC anonymous unions are enabled by default. -#endif - -/**@brief Macro to disable anonymous unions from a certain point in the code. - * @note Call only after first calling @ref ANON_UNIONS_ENABLE. - */ -#if defined(__CC_ARM) - #define ANON_UNIONS_DISABLE _Pragma("pop") -#elif defined(__ICCARM__) - #define ANON_UNIONS_DISABLE - // for IAR leave anonymous unions enabled -#else - #define ANON_UNIONS_DISABLE - // No action will be taken. - // For GCC anonymous unions are enabled by default. -#endif - -/**@brief Macro for adding pragma directive only for GCC. - */ -#ifdef __GNUC__ -#define GCC_PRAGMA(v) _Pragma(v) -#else -#define GCC_PRAGMA(v) -#endif - -/* Workaround for Keil 4 */ -#ifndef CONTROL_nPRIV_Msk -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ -#endif - -/**@brief Function for finding the current interrupt level. - * - * @return Current interrupt level. - * @retval APP_IRQ_PRIORITY_HIGH We are running in Application High interrupt level. - * @retval APP_IRQ_PRIORITY_LOW We are running in Application Low interrupt level. - * @retval APP_IRQ_PRIORITY_THREAD We are running in Thread Mode. - */ -uint8_t current_int_priority_get(void); - - -/**@brief Function for finding out the current privilege level. - * - * @return Current privilege level. - * @retval APP_LEVEL_UNPRIVILEGED We are running in unprivileged level. - * @retval APP_LEVEL_PRIVILEGED We are running in privileged level. - */ -uint8_t privilege_level_get(void); - - -#ifdef __cplusplus -} -#endif - -#endif // APP_UTIL_PLATFORM_H__ - -/** @} */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/nordic_common.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/nordic_common.h deleted file mode 100644 index e7f63b12906..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/nordic_common.h +++ /dev/null @@ -1,211 +0,0 @@ -/** - * Copyright (c) 2008 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** @file - * @brief Common defines and macros for firmware developed by Nordic Semiconductor. - */ - -#ifndef NORDIC_COMMON_H__ -#define NORDIC_COMMON_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Check if selected module is enabled - * - * This is save function for driver enable checking. - * Correct from Lint point of view (not using default of undefined value). - * - * Usage: - * @code - #if NRF_MODULE_ENABLED(UART) - ... - #endif - * @endcode - * - * @param module The module name. - * - * @retval 1 The macro _ENABLE is defined and is non-zero. - * @retval 0 The macro _ENABLE is not defined or it equals zero. - * - * @note - * This macro intentionally does not implement second expansion level. - * The name of the module to be checked has to be given directly as a parameter. - * And given parameter would be connected with @c _ENABLED postfix directly - * without evaluating its value. - */ -//lint -emacro(491,NRF_MODULE_ENABLED) // Suppers warning 491 "non-standard use of 'defined' preprocessor operator" -#define NRF_MODULE_ENABLED(module) \ - ((defined(module ## _ENABLED) && (module ## _ENABLED)) ? 1 : 0) - -/** The upper 8 bits of a 32 bit value */ -//lint -emacro(572,MSB_32) // Suppress warning 572 "Excessive shift value" -#define MSB_32(a) (((a) & 0xFF000000) >> 24) -/** The lower 8 bits (of a 32 bit value) */ -#define LSB_32(a) ((a) & 0x000000FF) - -/** The upper 8 bits of a 16 bit value */ -//lint -emacro(572,MSB_16) // Suppress warning 572 "Excessive shift value" -#define MSB_16(a) (((a) & 0xFF00) >> 8) -/** The lower 8 bits (of a 16 bit value) */ -#define LSB_16(a) ((a) & 0x00FF) - -/** Leaves the minimum of the two 32-bit arguments */ -/*lint -emacro(506, MIN) */ /* Suppress "Constant value Boolean */ -#define MIN(a, b) ((a) < (b) ? (a) : (b)) -/** Leaves the maximum of the two 32-bit arguments */ -/*lint -emacro(506, MAX) */ /* Suppress "Constant value Boolean */ -#define MAX(a, b) ((a) < (b) ? (b) : (a)) - -/**@brief Concatenates two parameters. - * - * It realizes two level expansion to make it sure that all the parameters - * are actually expanded before gluing them together. - * - * @param p1 First parameter to concatenating - * @param p2 Second parameter to concatenating - * - * @return Two parameters glued together. - * They have to create correct C mnemonic in other case - * preprocessor error would be generated. - * - * @sa CONCAT_3 - */ -#define CONCAT_2(p1, p2) CONCAT_2_(p1, p2) -/** Auxiliary macro used by @ref CONCAT_2 */ -#define CONCAT_2_(p1, p2) p1##p2 - -/**@brief Concatenates three parameters. - * - * It realizes two level expansion to make it sure that all the parameters - * are actually expanded before gluing them together. - * - * @param p1 First parameter to concatenating - * @param p2 Second parameter to concatenating - * @param p3 Third parameter to concatenating - * - * @return Three parameters glued together. - * They have to create correct C mnemonic in other case - * preprocessor error would be generated. - * - * @sa CONCAT_2 - */ -#define CONCAT_3(p1, p2, p3) CONCAT_3_(p1, p2, p3) -/** Auxiliary macro used by @ref CONCAT_3 */ -#define CONCAT_3_(p1, p2, p3) p1##p2##p3 - -#define STRINGIFY_(val) #val -/** Converts a macro argument into a character constant. - */ -#define STRINGIFY(val) STRINGIFY_(val) - -/** Counts number of elements inside the array - */ -#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) - -/**@brief Set a bit in the uint32 word. - * - * @param[in] W Word whose bit is being set. - * @param[in] B Bit number in the word to be set. - */ -#define SET_BIT(W, B) ((W) |= (uint32_t)(1U << (B))) - - -/**@brief Clears a bit in the uint32 word. - * - * @param[in] W Word whose bit is to be cleared. - * @param[in] B Bit number in the word to be cleared. - */ -#define CLR_BIT(W, B) ((W) &= (~(uint32_t)(1U << (B)))) - - -/**@brief Checks if a bit is set. - * - * @param[in] W Word whose bit is to be checked. - * @param[in] B Bit number in the word to be checked. - * - * @retval 1 if bit is set. - * @retval 0 if bit is not set. - */ -#define IS_SET(W, B) (((W) >> (B)) & 1) - -#define BIT_0 0x01 /**< The value of bit 0 */ -#define BIT_1 0x02 /**< The value of bit 1 */ -#define BIT_2 0x04 /**< The value of bit 2 */ -#define BIT_3 0x08 /**< The value of bit 3 */ -#define BIT_4 0x10 /**< The value of bit 4 */ -#define BIT_5 0x20 /**< The value of bit 5 */ -#define BIT_6 0x40 /**< The value of bit 6 */ -#define BIT_7 0x80 /**< The value of bit 7 */ -#define BIT_8 0x0100 /**< The value of bit 8 */ -#define BIT_9 0x0200 /**< The value of bit 9 */ -#define BIT_10 0x0400 /**< The value of bit 10 */ -#define BIT_11 0x0800 /**< The value of bit 11 */ -#define BIT_12 0x1000 /**< The value of bit 12 */ -#define BIT_13 0x2000 /**< The value of bit 13 */ -#define BIT_14 0x4000 /**< The value of bit 14 */ -#define BIT_15 0x8000 /**< The value of bit 15 */ -#define BIT_16 0x00010000 /**< The value of bit 16 */ -#define BIT_17 0x00020000 /**< The value of bit 17 */ -#define BIT_18 0x00040000 /**< The value of bit 18 */ -#define BIT_19 0x00080000 /**< The value of bit 19 */ -#define BIT_20 0x00100000 /**< The value of bit 20 */ -#define BIT_21 0x00200000 /**< The value of bit 21 */ -#define BIT_22 0x00400000 /**< The value of bit 22 */ -#define BIT_23 0x00800000 /**< The value of bit 23 */ -#define BIT_24 0x01000000 /**< The value of bit 24 */ -#define BIT_25 0x02000000 /**< The value of bit 25 */ -#define BIT_26 0x04000000 /**< The value of bit 26 */ -#define BIT_27 0x08000000 /**< The value of bit 27 */ -#define BIT_28 0x10000000 /**< The value of bit 28 */ -#define BIT_29 0x20000000 /**< The value of bit 29 */ -#define BIT_30 0x40000000 /**< The value of bit 30 */ -#define BIT_31 0x80000000 /**< The value of bit 31 */ - -#define UNUSED_VARIABLE(X) ((void)(X)) -#define UNUSED_PARAMETER(X) UNUSED_VARIABLE(X) -#define UNUSED_RETURN_VALUE(X) UNUSED_VARIABLE(X) - -#ifdef __cplusplus -} -#endif - -#endif // NORDIC_COMMON_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/nrf_assert.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/nrf_assert.c deleted file mode 100644 index 6255ba920cf..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/nrf_assert.c +++ /dev/null @@ -1,54 +0,0 @@ -/** - * Copyright (c) 2006 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "nrf_assert.h" -#include "app_error.h" -#include "nordic_common.h" - -__WEAK void assert_nrf_callback(uint16_t line_num, const uint8_t * file_name) -{ - assert_info_t assert_info = - { - .line_num = line_num, - .p_file_name = file_name, - }; - app_error_fault_handler(NRF_FAULT_ID_SDK_ASSERT, 0, (uint32_t)(&assert_info)); - - UNUSED_VARIABLE(assert_info); -} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/nrf_assert.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/nrf_assert.h deleted file mode 100644 index 2ec647c87b7..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/nrf_assert.h +++ /dev/null @@ -1,123 +0,0 @@ -/** - * Copyright (c) 2006 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** @file - * @brief Utilities for verifying program logic - */ - -#ifndef NRF_ASSERT_H_ -#define NRF_ASSERT_H_ - -#include -#include "nrf.h" -#include "app_error.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** @brief Function for handling assertions. - * - * - * @note - * This function is called when an assertion has triggered. - * - * @note - * This function is deprecated and will be removed in future releases. - * Use app_error_fault_handler instead. - * - * - * @post - * All hardware is put into an idle non-emitting state (in particular the radio is highly - * important to switch off since the radio might be in a state that makes it send - * packets continiously while a typical final infinit ASSERT loop is executing). - * - * - * @param line_num The line number where the assertion is called - * @param file_name Pointer to the file name - */ -//lint -save -esym(14, assert_nrf_callback) -void assert_nrf_callback(uint16_t line_num, const uint8_t *file_name); -//lint -restore - -#if (defined(DEBUG_NRF) || defined(DEBUG_NRF_USER)) -#define NRF_ASSERT_PRESENT 1 -#else -#define NRF_ASSERT_PRESENT 0 -#endif - -//#if defined(DEBUG_NRF) || defined(DEBUG_NRF_USER) - -/*lint -emacro(506, ASSERT) */ /* Suppress "Constant value Boolean */ -/*lint -emacro(774, ASSERT) */ /* Suppress "Boolean within 'if' always evaluates to True" */ \ - -/** @brief Function for checking intended for production code. - * - * Check passes if "expr" evaluates to true. */ - -#ifdef _lint -#define ASSERT(expr) \ -if (expr) \ -{ \ -} \ -else \ -{ \ - while (1); \ -} -#else //_lint -#define ASSERT(expr) \ -if (NRF_ASSERT_PRESENT) \ -{ \ - if (expr) \ - { \ - } \ - else \ - { \ - assert_nrf_callback((uint16_t)__LINE__, (uint8_t *)__FILE__); \ - } \ -} - -#endif - - -#ifdef __cplusplus -} -#endif - -#endif /* NRF_ASSERT_H_ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/nrf_bitmask.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/nrf_bitmask.h deleted file mode 100644 index 72f531f1a7e..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/nrf_bitmask.h +++ /dev/null @@ -1,147 +0,0 @@ -/** - * Copyright (c) 2006 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_BITMASK_H -#define NRF_BITMASK_H - -#include "compiler_abstraction.h" -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#define BITMASK_BYTE_GET(abs_bit) ((abs_bit)/8) -#define BITMASK_RELBIT_GET(abs_bit) ((abs_bit) & 0x00000007) - -/** - * Function for checking if bit in the multi-byte bit mask is set. - * - * @param bit Bit index. - * @param p_mask A pointer to mask with bit fields. - * - * @return 0 if bit is not set, positive value otherwise. - */ -__STATIC_INLINE uint32_t nrf_bitmask_bit_is_set(uint32_t bit, void const * p_mask) -{ - uint8_t const * p_mask8 = (uint8_t const *)p_mask; - uint32_t byte_idx = BITMASK_BYTE_GET(bit); - bit = BITMASK_RELBIT_GET(bit); - return (1 << bit) & p_mask8[byte_idx]; -} - -/** - * Function for setting a bit in the multi-byte bit mask. - * - * @param bit Bit index. - * @param p_mask A pointer to mask with bit fields. - */ -__STATIC_INLINE void nrf_bitmask_bit_set(uint32_t bit, void * p_mask) -{ - uint8_t * p_mask8 = (uint8_t *)p_mask; - uint32_t byte_idx = BITMASK_BYTE_GET(bit); - bit = BITMASK_RELBIT_GET(bit); - p_mask8[byte_idx] |= (1 << bit); -} - -/** - * Function for clearing a bit in the multi-byte bit mask. - * - * @param bit Bit index. - * @param p_mask A pointer to mask with bit fields. - */ -__STATIC_INLINE void nrf_bitmask_bit_clear(uint32_t bit, void * p_mask) -{ - uint8_t * p_mask8 = (uint8_t *)p_mask; - uint32_t byte_idx = BITMASK_BYTE_GET(bit); - bit = BITMASK_RELBIT_GET(bit); - p_mask8[byte_idx] &= ~(1 << bit); -} - -/** - * Function for performing bitwise OR operation on two multi-byte bit masks. - * - * @param p_mask1 A pointer to the first bit mask. - * @param p_mask2 A pointer to the second bit mask. - * @param p_mask_out A pointer to the output bit mask. - * @param length Length of output mask in bytes. - */ -__STATIC_INLINE void nrf_bitmask_masks_or(void const * p_mask1, - void const * p_mask2, - void * p_out_mask, - uint32_t length) -{ - uint8_t const * p_mask8_1 = (uint8_t const *)p_mask1; - uint8_t const * p_mask8_2 = (uint8_t const *)p_mask2; - uint8_t * p_mask8_out = (uint8_t *)p_out_mask; - uint32_t i; - for (i = 0; i < length; i++) - { - p_mask8_out[i] = p_mask8_1[i] | p_mask8_2[i]; - } -} - -/** - * Function for performing bitwise AND operation on two multi-byte bit masks. - * - * @param p_mask1 A pointer to the first bit mask. - * @param p_mask2 A pointer to the second bit mask. - * @param p_mask_out A pointer to the output bit mask. - * @param length Length of output mask in bytes. - */ -__STATIC_INLINE void nrf_bitmask_masks_and(void const * p_mask1, - void const * p_mask2, - void * p_out_mask, - uint32_t length) -{ - uint8_t const * p_mask8_1 = (uint8_t const *)p_mask1; - uint8_t const * p_mask8_2 = (uint8_t const *)p_mask2; - uint8_t * p_mask8_out = (uint8_t *)p_out_mask; - uint32_t i; - for (i = 0; i < length; i++) - { - p_mask8_out[i] = p_mask8_1[i] & p_mask8_2[i]; - } -} - -#ifdef __cplusplus -} -#endif - -#endif //NRF_BITMASK_H diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_common.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_common.h deleted file mode 100644 index 54ef51c4f1e..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_common.h +++ /dev/null @@ -1,77 +0,0 @@ -/** - * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** @cond */ -/**@file - * - * @ingroup experimental_api - * @defgroup sdk_common SDK Common Header - * @brief All common headers needed for SDK examples will be included here so that application - * developer does not have to include headers on him/herself. - * @{ - */ - -#ifndef SDK_COMMON_H__ -#define SDK_COMMON_H__ - -#include -#include -#include -#include "sdk_config.h" -#include "nordic_common.h" -#include "compiler_abstraction.h" -#include "sdk_os.h" -#include "sdk_errors.h" -#include "app_util.h" -#include "sdk_macros.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -/** @} */ -/** @endcond */ - -#ifdef __cplusplus -} -#endif - -#endif // SDK_COMMON_H__ - diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_errors.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_errors.h deleted file mode 100644 index 96920fc617d..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_errors.h +++ /dev/null @@ -1,166 +0,0 @@ -/** - * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/**@file - * - * @defgroup sdk_error SDK Error codes - * @{ - * @ingroup app_common - * @{ - * @details Error codes are 32-bit unsigned integers with the most significant 16-bit reserved for - * identifying the module where the error occurred while the least least significant LSB - * are used to provide the cause or nature of error. Each module is assigned a 16-bit - * unsigned integer. Which it will use to identify all errors that occurred in it. 16-bit - * LSB range is with module id as the MSB in the 32-bit error code is reserved for the - * module. As an example, if 0x8800 identifies a certain SDK module, all values from - * 0x88000000 - 0x8800FFFF are reserved for this module. - * It should be noted that common error reasons have been assigned values to make it - * possible to decode error reason easily. As an example, lets module uninitialized has - * been assigned an error code 0x000A0. Then, if application encounters an error code - * 0xZZZZ00A0, it knows that it accessing a certain module without initializing it. - * Apart from this, each module is allowed to define error codes that are not covered by - * the common ones, however, these values are defined in a range that does not conflict - * with common error values. For module, specific error however, it is possible that the - * same error value is used by two different modules to indicated errors of very different - * nature. If error is already defined by the NRF common error codes, these are reused. - * A range is reserved for application as well, it can use this range for defining - * application specific errors. - * - * @note Success code, NRF_SUCCESS, does not include any module identifier. - - */ - -#ifndef SDK_ERRORS_H__ -#define SDK_ERRORS_H__ - -#include -#include "nrf_error.h" -#include "sdk_config.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup sdk_err_base Base defined for SDK Modules - * @{ - */ -#define NRF_ERROR_SDK_ERROR_BASE (NRF_ERROR_BASE_NUM + 0x8000) /**< Base value defined for SDK module identifiers. */ -#define NRF_ERROR_SDK_COMMON_ERROR_BASE (NRF_ERROR_BASE_NUM + 0x0080) /**< Base error value to be used for SDK error values. */ -/** @} */ - -/** - * @defgroup sdk_module_codes Codes reserved as identification for module where the error occurred. - * @{ - */ -#define NRF_ERROR_MEMORY_MANAGER_ERR_BASE (0x8100) -#define NRF_ERROR_PERIPH_DRIVERS_ERR_BASE (0x8200) -#define NRF_ERROR_GAZELLE_ERR_BASE (0x8300) -#define NRF_ERROR_BLE_IPSP_ERR_BASE (0x8400) -/** @} */ - - -/** - * @defgroup sdk_iot_errors Codes reserved as identification for IoT errors. - * @{ - */ -#define NRF_ERROR_IOT_ERR_BASE_START (0xA000) -#define NRF_ERROR_IOT_ERR_BASE_STOP (0xAFFF) -/** @} */ - - -/** - * @defgroup sdk_common_errors Codes reserved as identification for common errors. - * @{ - */ -#define NRF_ERROR_MODULE_NOT_INITIALZED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0000) -#define NRF_ERROR_MUTEX_INIT_FAILED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0001) -#define NRF_ERROR_MUTEX_LOCK_FAILED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0002) -#define NRF_ERROR_MUTEX_UNLOCK_FAILED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0003) -#define NRF_ERROR_MUTEX_COND_INIT_FAILED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0004) -#define NRF_ERROR_MODULE_ALREADY_INITIALIZED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0005) -#define NRF_ERROR_STORAGE_FULL (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0006) -#define NRF_ERROR_API_NOT_IMPLEMENTED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0010) -#define NRF_ERROR_FEATURE_NOT_ENABLED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0011) -/** @} */ - - -/** - * @defgroup drv_specific_errors Error / status codes specific to drivers. - * @{ - */ -#define NRF_ERROR_DRV_TWI_ERR_OVERRUN (NRF_ERROR_PERIPH_DRIVERS_ERR_BASE + 0x0000) -#define NRF_ERROR_DRV_TWI_ERR_ANACK (NRF_ERROR_PERIPH_DRIVERS_ERR_BASE + 0x0001) -#define NRF_ERROR_DRV_TWI_ERR_DNACK (NRF_ERROR_PERIPH_DRIVERS_ERR_BASE + 0x0002) -/** @} */ - - -/** - * @defgroup ble_ipsp_errors IPSP codes - * @brief Error and status codes specific to IPSP. - * @{ - */ -#define NRF_ERROR_BLE_IPSP_RX_PKT_TRUNCATED (NRF_ERROR_BLE_IPSP_ERR_BASE + 0x0000) -#define NRF_ERROR_BLE_IPSP_CHANNEL_ALREADY_EXISTS (NRF_ERROR_BLE_IPSP_ERR_BASE + 0x0001) -#define NRF_ERROR_BLE_IPSP_LINK_DISCONNECTED (NRF_ERROR_BLE_IPSP_ERR_BASE + 0x0002) -#define NRF_ERROR_BLE_IPSP_PEER_REJECTED (NRF_ERROR_BLE_IPSP_ERR_BASE + 0x0003) -/* @} */ - - -/** - * @brief API Result. - * - * @details Indicates success or failure of an API procedure. In case of failure, a comprehensive - * error code indicating cause or reason for failure is provided. - * - * Though called an API result, it could used in Asynchronous notifications callback along - * with asynchronous callback as event result. This mechanism is employed when an event - * marks the end of procedure initiated using API. API result, in this case, will only be - * an indicative of whether the procedure has been requested successfully. - */ -typedef uint32_t ret_code_t; - -/** @} */ -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif // SDK_ERRORS_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_macros.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_macros.h deleted file mode 100644 index 01dcdf5d4c0..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_macros.h +++ /dev/null @@ -1,191 +0,0 @@ -/** - * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/**@file - * - - * @defgroup sdk_common_macros SDK Common Header - * @ingroup app_common - * @brief Macros for parameter checking and similar tasks - * @{ - */ - -#ifndef SDK_MACROS_H__ -#define SDK_MACROS_H__ - -#ifdef __cplusplus -extern "C" { -#endif - - -/**@brief Macro for verifying statement to be true. It will cause the exterior function to return - * err_code if the statement is not true. - * - * @param[in] statement Statement to test. - * @param[in] err_code Error value to return if test was invalid. - * - * @retval nothing, but will cause the exterior function to return @p err_code if @p statement - * is false. - */ -#define VERIFY_TRUE(statement, err_code) \ -do \ -{ \ - if (!(statement)) \ - { \ - return err_code; \ - } \ -} while (0) - - -/**@brief Macro for verifying statement to be true. It will cause the exterior function to return - * if the statement is not true. - * - * @param[in] statement Statement to test. - */ -#define VERIFY_TRUE_VOID(statement) VERIFY_TRUE((statement), ) - - -/**@brief Macro for verifying statement to be false. It will cause the exterior function to return - * err_code if the statement is not false. - * - * @param[in] statement Statement to test. - * @param[in] err_code Error value to return if test was invalid. - * - * @retval nothing, but will cause the exterior function to return @p err_code if @p statement - * is true. - */ -#define VERIFY_FALSE(statement, err_code) \ -do \ -{ \ - if ((statement)) \ - { \ - return err_code; \ - } \ -} while (0) - - -/**@brief Macro for verifying statement to be false. It will cause the exterior function to return - * if the statement is not false. - * - * @param[in] statement Statement to test. - */ -#define VERIFY_FALSE_VOID(statement) VERIFY_FALSE((statement), ) - - -/**@brief Macro for verifying that a function returned NRF_SUCCESS. It will cause the exterior - * function to return err_code if the err_code is not @ref NRF_SUCCESS. - * - * @param[in] err_code The error code to check. - */ -#ifdef DISABLE_PARAM_CHECK -#define VERIFY_SUCCESS() -#else -#define VERIFY_SUCCESS(err_code) VERIFY_TRUE((err_code) == NRF_SUCCESS, (err_code)) -#endif /* DISABLE_PARAM_CHECK */ - - -/**@brief Macro for verifying that a function returned NRF_SUCCESS. It will cause the exterior - * function to return if the err_code is not @ref NRF_SUCCESS. - * - * @param[in] err_code The error code to check. - */ -#ifdef DISABLE_PARAM_CHECK -#define VERIFY_SUCCESS_VOID() -#else -#define VERIFY_SUCCESS_VOID(err_code) VERIFY_TRUE_VOID((err_code) == NRF_SUCCESS) -#endif /* DISABLE_PARAM_CHECK */ - - -/**@brief Macro for verifying that the module is initialized. It will cause the exterior function to - * return @ref NRF_ERROR_INVALID_STATE if not. - * - * @note MODULE_INITIALIZED must be defined in each module using this macro. MODULE_INITIALIZED - * should be true if the module is initialized, false if not. - */ -#ifdef DISABLE_PARAM_CHECK -#define VERIFY_MODULE_INITIALIZED() -#else -#define VERIFY_MODULE_INITIALIZED() VERIFY_TRUE((MODULE_INITIALIZED), NRF_ERROR_INVALID_STATE) -#endif /* DISABLE_PARAM_CHECK */ - - -/**@brief Macro for verifying that the module is initialized. It will cause the exterior function to - * return if not. - * - * @note MODULE_INITIALIZED must be defined in each module using this macro. MODULE_INITIALIZED - * should be true if the module is initialized, false if not. - */ -#ifdef DISABLE_PARAM_CHECK -#define VERIFY_MODULE_INITIALIZED_VOID() -#else -#define VERIFY_MODULE_INITIALIZED_VOID() VERIFY_TRUE_VOID((MODULE_INITIALIZED)) -#endif /* DISABLE_PARAM_CHECK */ - - -/**@brief Macro for verifying that the module is initialized. It will cause the exterior function to - * return if not. - * - * @param[in] param The variable to check if is NULL. - */ -#ifdef DISABLE_PARAM_CHECK -#define VERIFY_PARAM_NOT_NULL() -#else -#define VERIFY_PARAM_NOT_NULL(param) VERIFY_FALSE(((param) == NULL), NRF_ERROR_NULL) -#endif /* DISABLE_PARAM_CHECK */ - - -/**@brief Macro for verifying that the module is initialized. It will cause the exterior function to - * return if not. - * - * @param[in] param The variable to check if is NULL. - */ -#ifdef DISABLE_PARAM_CHECK -#define VERIFY_PARAM_NOT_NULL_VOID() -#else -#define VERIFY_PARAM_NOT_NULL_VOID(param) VERIFY_FALSE_VOID(((param) == NULL)) -#endif /* DISABLE_PARAM_CHECK */ - -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif // SDK_MACROS_H__ - diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_mapped_flags.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_mapped_flags.c deleted file mode 100644 index 1a99ac382f4..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_mapped_flags.c +++ /dev/null @@ -1,220 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#include "sdk_mapped_flags.h" -#include -#include -#include -#include "compiler_abstraction.h" - - -// Test whether the flag collection type is large enough to hold all the flags. If this fails, -// reduce SDK_MAPPED_FLAGS_N_KEYS or increase the size of sdk_mapped_flags_t. -STATIC_ASSERT((sizeof(sdk_mapped_flags_t) * SDK_MAPPED_FLAGS_N_KEYS_PER_BYTE) >= SDK_MAPPED_FLAGS_N_KEYS); - - -/**@brief Function for setting the state of a flag to true. - * - * @note This function does not check whether the index is valid. - * - * @param[in] p_flags The collection of flags to modify. - * @param[in] index The index of the flag to modify. - */ -static __INLINE void sdk_mapped_flags_set_by_index(sdk_mapped_flags_t * p_flags, uint16_t index) -{ - *p_flags |= (1U << index); -} - - -/**@brief Function for setting the state of a flag to false. - * - * @note This function does not check whether the index is valid. - * - * @param[in] p_flags The collection of flags to modify. - * @param[in] index The index of the flag to modify. - */ -static __INLINE void sdk_mapped_flags_clear_by_index(sdk_mapped_flags_t * p_flags, uint16_t index) -{ - *p_flags &= ~(1U << index); -} - - -/**@brief Function for getting the state of a flag. - * - * @note This function does not check whether the index is valid. - * - * @param[in] p_flags The collection of flags to read. - * @param[in] index The index of the flag to get. - */ -static __INLINE bool sdk_mapped_flags_get_by_index(sdk_mapped_flags_t flags, uint16_t index) -{ - return ((flags & (1 << index)) != 0); -} - - - -uint16_t sdk_mapped_flags_first_key_index_get(sdk_mapped_flags_t flags) -{ - for (uint16_t i = 0; i < SDK_MAPPED_FLAGS_N_KEYS; i++) - { - if (sdk_mapped_flags_get_by_index(flags, i)) - { - return i; - } - } - return SDK_MAPPED_FLAGS_INVALID_INDEX; -} - - -void sdk_mapped_flags_update_by_key(uint16_t * p_keys, - sdk_mapped_flags_t * p_flags, - uint16_t key, - bool value) -{ - sdk_mapped_flags_bulk_update_by_key(p_keys, p_flags, 1, key, value); -} - - -void sdk_mapped_flags_bulk_update_by_key(uint16_t * p_keys, - sdk_mapped_flags_t * p_flags, - uint32_t n_flag_collections, - uint16_t key, - bool value) -{ - if ((p_keys != NULL) && (p_flags != NULL) && (n_flag_collections > 0)) - { - for (uint32_t i = 0; i < SDK_MAPPED_FLAGS_N_KEYS; i++) - { - if (p_keys[i] == key) - { - for (uint32_t j = 0; j < n_flag_collections; j++) - { - if (value) - { - sdk_mapped_flags_set_by_index(&p_flags[j], i); - } - else - { - sdk_mapped_flags_clear_by_index(&p_flags[j], i); - } - } - return; - } - } - } -} - - -bool sdk_mapped_flags_get_by_key_w_idx(uint16_t * p_keys, - sdk_mapped_flags_t flags, - uint16_t key, - uint8_t * p_index) -{ - if (p_keys != NULL) - { - for (uint32_t i = 0; i < SDK_MAPPED_FLAGS_N_KEYS; i++) - { - if (p_keys[i] == key) - { - if (p_index != NULL) - { - *p_index = i; - } - return sdk_mapped_flags_get_by_index(flags, i); - } - } - } - if (p_index != NULL) - { - *p_index = SDK_MAPPED_FLAGS_N_KEYS; - } - return false; -} - - -bool sdk_mapped_flags_get_by_key(uint16_t * p_keys, sdk_mapped_flags_t flags, uint16_t key) -{ - if (p_keys != NULL) - { - for (uint32_t i = 0; i < SDK_MAPPED_FLAGS_N_KEYS; i++) - { - if (p_keys[i] == key) - { - return sdk_mapped_flags_get_by_index(flags, i); - } - } - } - return false; -} - - -sdk_mapped_flags_key_list_t sdk_mapped_flags_key_list_get(uint16_t * p_keys, - sdk_mapped_flags_t flags) -{ - sdk_mapped_flags_key_list_t key_list; - key_list.len = 0; - - if (p_keys != NULL) - { - for (uint32_t i = 0; i < SDK_MAPPED_FLAGS_N_KEYS; i++) - { - if (sdk_mapped_flags_get_by_index(flags, i)) - { - key_list.flag_keys[key_list.len++] = p_keys[i]; - } - } - } - - return key_list; -} - - -uint32_t sdk_mapped_flags_n_flags_set(sdk_mapped_flags_t flags) -{ - uint32_t n_flags_set = 0; - - for (uint32_t i = 0; i < SDK_MAPPED_FLAGS_N_KEYS; i++) - { - if (sdk_mapped_flags_get_by_index(flags, i)) - { - n_flags_set += 1; - } - } - return n_flags_set; -} diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_mapped_flags.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_mapped_flags.h deleted file mode 100644 index 1f9033909ae..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_mapped_flags.h +++ /dev/null @@ -1,199 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef SDK_MAPPED_FLAGS_H__ -#define SDK_MAPPED_FLAGS_H__ - -#include -#include -#include "app_util.h" -#include "compiler_abstraction.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @file - * @defgroup sdk_mapped_flags Mapped flags - * @ingroup app_common - * @{ - * @brief Module for writing and reading flags that are associated - * with keys. - * - * @details The flags are represented as bits in a bitmap called a flag collection. The keys - * are uint16_t. Each flag collection contains all flags of the same type, one flag for - * each key. - * - * The mapped flags module does not keep the flag states, nor the list of keys. These are - * provided in the API calls. A key's index in the key list determines which bit in the - * flag collection is associated with it. This module does not ever edit the key list, and - * does not edit flags except in function calls that take the flag collection as a pointer. - * - */ - -#define SDK_MAPPED_FLAGS_N_KEYS 32 /**< The number of keys to keep flags for. This is also the number of flags in a flag collection. If changing this value, you might also need change the width of the sdk_mapped_flags_t type. */ -#define SDK_MAPPED_FLAGS_N_KEYS_PER_BYTE 8 /**< The number of flags that fit in one byte. */ -#define SDK_MAPPED_FLAGS_INVALID_INDEX 0xFFFF /**< A flag index guaranteed to be invalid. */ - -typedef uint32_t sdk_mapped_flags_t; /**< The bitmap to hold flags. Each flag is one bit, and each bit represents the flag state associated with one key. */ - - -/**@brief Type used to present a subset of the registered keys. - */ -typedef struct -{ - uint32_t len; /**< The length of the list. */ - uint16_t flag_keys[SDK_MAPPED_FLAGS_N_KEYS]; /**< The list of keys. */ -} sdk_mapped_flags_key_list_t; - - -/**@brief Function for getting the first index at which the flag is true in the provided - * collection. - * - * @param[in] flags The flag collection to search for a flag set to true. - * - * @return The first index that has its flag set to true. If none were found, the - * function returns @ref SDK_MAPPED_FLAGS_INVALID_INDEX. - */ -uint16_t sdk_mapped_flags_first_key_index_get(sdk_mapped_flags_t flags); - - -/**@brief Function for updating the state of a flag. - * - * @param[in] p_keys The list of associated keys (assumed to have a length of - * @ref SDK_MAPPED_FLAGS_N_KEYS). - * @param[out] p_flags The flag collection to modify. - * @param[in] key The key to modify the flag of. - * @param[in] value The state to set the flag to. - */ -void sdk_mapped_flags_update_by_key(uint16_t * p_keys, - sdk_mapped_flags_t * p_flags, - uint16_t key, - bool value); - - -/**@brief Function for updating the state of the same flag in multiple flag collections. - * - * @details The key and value are the same for all flag collections in the p_flags array. - * - * @param[in] p_keys The list of associated keys (assumed to have a length of - * @ref SDK_MAPPED_FLAGS_N_KEYS). - * @param[out] p_flags The flag collections to modify. - * @param[out] n_flag_collections The number of flag collections in p_flags. - * @param[in] key The key to modify the flag of. - * @param[in] value The state to set the flag to. - */ -void sdk_mapped_flags_bulk_update_by_key(uint16_t * p_keys, - sdk_mapped_flags_t * p_flags, - uint32_t n_flag_collections, - uint16_t key, - bool value); - - -/**@brief Function for getting the state of a specific flag. - * - * @param[in] p_keys The list of associated keys (assumed to have a length of - * @ref SDK_MAPPED_FLAGS_N_KEYS). - * @param[in] flags The flag collection to read from. - * @param[in] key The key to get the flag for. - * - * @return The state of the flag. - */ -bool sdk_mapped_flags_get_by_key(uint16_t * p_keys, sdk_mapped_flags_t flags, uint16_t key); - - -/**@brief Function for getting the state of a specific flag. - * - * @param[in] p_keys The list of associated keys (assumed to have a length of - * @ref SDK_MAPPED_FLAGS_N_KEYS). - * @param[in] flags The flag collection from which to read. - * @param[in] key The key for which to get the flag. - * @param[out] p_index If not NULL, the index of the key. - * - * @return The state of the flag. - */ -bool sdk_mapped_flags_get_by_key_w_idx(uint16_t * p_keys, - sdk_mapped_flags_t flags, - uint16_t key, - uint8_t * p_index); - - -/**@brief Function for getting a list of all keys that have a specific flag set to true. - * - * @param[in] p_keys The list of associated keys (assumed to have a length of - * @ref SDK_MAPPED_FLAGS_N_KEYS). - * @param[in] flags The flag collection to search. - * - * @return The list of keys. - */ -sdk_mapped_flags_key_list_t sdk_mapped_flags_key_list_get(uint16_t * p_keys, - sdk_mapped_flags_t flags); - - -/**@brief Function for getting the number of keys that have a specific flag set to true. - * - * @param[in] flags The flag collection to search. - * - * @return The number of keys. - */ -uint32_t sdk_mapped_flags_n_flags_set(sdk_mapped_flags_t flags); - - -/**@brief Function for querying whether any flags in the collection are set. - * - * @param[in] flags The flag collection to query. - * - * @retval true If one or more flags are set to true. - * @retval false Otherwise. - */ -static __INLINE bool sdk_mapped_flags_any_set(sdk_mapped_flags_t flags) -{ - return (flags != 0); -} - - -/** @} */ - - -#ifdef __cplusplus -} -#endif - -#endif /* SDK_MAPPED_FLAGS_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_os.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_os.h deleted file mode 100644 index c1660070b95..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_os.h +++ /dev/null @@ -1,76 +0,0 @@ -/** - * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** @cond */ -/**@file - * - * @defgroup sdk_os SDK OS Abstraction - * @ingroup experimental_api - * @details In order to made SDK modules independent of use of an embedded OS, and permit - * application with varied task architecture, SDK abstracts the OS specific - * elements here in order to make all other modules agnostic to the OS or task - * architecture. - * @{ - */ - -#ifndef SDK_OS_H__ -#define SDK_OS_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#define SDK_MUTEX_DEFINE(X) -#define SDK_MUTEX_INIT(X) -#define SDK_MUTEX_LOCK(X) -#define SDK_MUTEX_UNLOCK(X) - -/** - * @defgroup os_data_type Data types. - */ - -/** @} */ -/** @endcond */ - -#ifdef __cplusplus -} -#endif - -#endif // SDK_OS_H__ - diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_resources.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_resources.h deleted file mode 100644 index 91d2af1294c..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/libraries/util/sdk_resources.h +++ /dev/null @@ -1,86 +0,0 @@ -/** - * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -/** @file - * @brief Definition file for resource usage by SoftDevice, ESB and Gazell. - */ - -#ifndef APP_RESOURCES_H__ -#define APP_RESOURCES_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef SOFTDEVICE_PRESENT - #include "nrf_sd_def.h" -#else - #define SD_PPI_RESTRICTED 0uL /**< 1 if PPI peripheral is restricted, 0 otherwise. */ - #define SD_PPI_CHANNELS_USED 0uL /**< PPI channels utilized by SotfDevice (not available to th spplication). */ - #define SD_PPI_GROUPS_USED 0uL /**< PPI groups utilized by SotfDevice (not available to th spplication). */ - #define SD_TIMERS_USED 0uL /**< Timers used by SoftDevice. */ - #define SD_SWI_USED 0uL /**< Software interrupts used by SoftDevice. */ -#endif - -#ifdef GAZELL_PRESENT - #include "nrf_gzll_resources.h" -#else - #define GZLL_PPI_CHANNELS_USED 0uL /**< PPI channels utilized by Gazell (not available to th spplication). */ - #define GZLL_TIMERS_USED 0uL /**< Timers used by Gazell. */ - #define GZLL_SWI_USED 0uL /**< Software interrupts used by Gazell */ -#endif - -#ifdef ESB_PRESENT - #include "nrf_esb_resources.h" -#else - #define ESB_PPI_CHANNELS_USED 0uL /**< PPI channels utilized by ESB (not available to th spplication). */ - #define ESB_TIMERS_USED 0uL /**< Timers used by ESB. */ - #define ESB_SWI_USED 0uL /**< Software interrupts used by ESB */ -#endif - -#define NRF_PPI_CHANNELS_USED (SD_PPI_CHANNELS_USED | GZLL_PPI_CHANNELS_USED | ESB_PPI_CHANNELS_USED) -#define NRF_PPI_GROUPS_USED (SD_PPI_GROUPS_USED) -#define NRF_SWI_USED (SD_SWI_USED | GZLL_SWI_USED | ESB_SWI_USED) -#define NRF_TIMERS_USED (SD_TIMERS_USED | GZLL_TIMERS_USED | ESB_TIMERS_USED) - -#ifdef __cplusplus -} -#endif - -#endif // APP_RESOURCES_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/qspi_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/qspi_api.c index 1a33203c4e0..93856ea48aa 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/qspi_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/qspi_api.c @@ -40,6 +40,7 @@ #if DEVICE_QSPI +#include #include "nrf_drv_common.h" #include "PeripheralPins.h" #include "nrfx_qspi.h" From 3fa7686c38e73e722e181cdb29d0101058af4423 Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Wed, 6 Mar 2019 10:39:15 -0600 Subject: [PATCH 472/488] Fix preprocessor conditionals for AC6 build --- .../libraries/experimental_section_vars/nrf_section.h | 8 ++++---- .../experimental_section_vars/nrf_section_iter.h | 2 +- .../components/libraries/util/app_error_handler_gcc.c | 2 +- .../modules/softdevice/common/nrf_sdh_ble.c | 2 +- 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section.h index 62eda6448f2..7f0e3bee4f3 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section.h @@ -66,7 +66,7 @@ extern "C" { * param[in] section_name Name of the section. * @hideinitializer */ -#if defined(__CC_ARM) +#if defined(__ARMCC_VERSION) #define NRF_SECTION_START_ADDR(section_name) &CONCAT_2(section_name, $$Base) #elif defined(__GNUC__) @@ -82,7 +82,7 @@ extern "C" { * @param[in] section_name Name of the section. * @hideinitializer */ -#if defined(__CC_ARM) +#if defined(__ARMCC_VERSION) #define NRF_SECTION_END_ADDR(section_name) &CONCAT_2(section_name, $$Limit) #elif defined(__GNUC__) @@ -111,7 +111,7 @@ extern "C" { * @warning Data type must be word aligned to prevent padding. * @hideinitializer */ -#if defined(__CC_ARM) +#if defined(__ARMCC_VERSION) #define NRF_SECTION_DEF(section_name, data_type) \ extern data_type * CONCAT_2(section_name, $$Base); \ extern void * CONCAT_2(section_name, $$Limit) @@ -140,7 +140,7 @@ extern "C" { * @param[in] section_var Variable to register in the given section. * @hideinitializer */ -#if defined(__CC_ARM) +#if defined(__ARMCC_VERSION) #define NRF_SECTION_ITEM_REGISTER(section_name, section_var) \ section_var __attribute__ ((section(STRINGIFY(section_name)))) __attribute__((used)) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section_iter.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section_iter.h index 014c21f7020..c03ed6cc62e 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section_iter.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/experimental_section_vars/nrf_section_iter.h @@ -87,7 +87,7 @@ typedef struct typedef struct { nrf_section_set_t const * p_set; //!< Pointer to the appropriate section set. -#if !defined(__GNUC__) || defined(__CC_ARM) +#if !defined(__GNUC__) || defined(__ARMCC_VERSION) nrf_section_t const * p_section; //!< Pointer to the selected section. /**< * In case of GCC all sections in the set are sorted and diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error_handler_gcc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error_handler_gcc.c index 96f90f56379..5391672c804 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error_handler_gcc.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_error_handler_gcc.c @@ -42,7 +42,7 @@ #include "app_error.h" // only compile this if we are using GCC -#if defined (__GNUC__) && !defined (__CC_ARM) +#if defined (__GNUC__) && !defined (__ARMCC_VERSION) #if defined (__CORTEX_M) && (__CORTEX_M == 0x04) void app_error_handler(ret_code_t error_code, uint32_t line_num, const uint8_t * p_file_name) __attribute__(( naked )); diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/softdevice/common/nrf_sdh_ble.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/softdevice/common/nrf_sdh_ble.c index ed882dc88e2..bf036bda800 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/softdevice/common/nrf_sdh_ble.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/softdevice/common/nrf_sdh_ble.c @@ -65,7 +65,7 @@ NRF_SECTION_SET_DEF(sdh_ble_observers, nrf_sdh_ble_evt_observer_t, NRF_SDH_BLE_O //lint -save -e10 -e19 -e40 -e27 Illegal character (0x24) -#if defined(__CC_ARM) +#if defined(__ARMCC_VERSION) extern uint32_t Image$$RW_IRAM1$$Base; uint32_t const * const m_ram_start = &Image$$RW_IRAM1$$Base; #elif defined(__ICCARM__) From dce14f33e039914955d250274ec425bb52c7b355 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Thu, 7 Mar 2019 00:38:06 -0500 Subject: [PATCH 473/488] Created round-robin style dma scheduling algorithm to ensure all endpoints are serviced with equal priority --- .../drivers_nrf/usbd/nrf_drv_usbd.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c index 72cb5646f96..e6fe0d98384 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c @@ -318,6 +318,12 @@ static uint8_t m_dma_pending; */ static uint32_t m_simulated_dataepstatus; +/** + * Mbed modification to support round-robin dma scheduler + * Stores last endpoint that was serviced by DMA + */ +static nrf_drv_usbd_ep_t m_last_dma_client; + /** * @brief The structure that would hold transfer configuration to every endpoint * @@ -1365,8 +1371,16 @@ static void ev_accessfault_handler(void) */ static uint8_t usbd_dma_scheduler_algorithm(uint32_t req) { + // Mbed modification -- use round-robin style + // DMA scheduler algorithm to ensure each + // endpoint is serviced with equal priority + uint8_t last_index = __CLZ(__RBIT(ep2bit(m_last_dma_client))); + return ((__CLZ(__RBIT(__ROR(req, last_index))) + last_index) & 0x1F); + + // Original implementation /** @todo RK This is just simple algorithm for testing and should be updated */ - return __CLZ(__RBIT(req)); + //return __CLZ(__RBIT(req)); + } /** @@ -1852,6 +1866,7 @@ void nrf_drv_usbd_enable(void) m_ep_dma_waiting = 0; usbd_dma_pending_clear(); m_last_setup_dir = NRF_DRV_USBD_EPOUT0; + m_last_dma_client = NRF_DRV_USBD_EPOUT0; m_drv_state = NRF_DRV_STATE_POWERED_ON; From 778feec65bfbfb6ac0bf8f0b93be5d7c7442689d Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Thu, 7 Mar 2019 13:25:06 -0600 Subject: [PATCH 474/488] Fix dangling #endif from rebase --- .../TARGET_NORDIC_SOFTDEVICE/TARGET_NRF52/source/btle/btle.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_NORDIC_SOFTDEVICE/TARGET_NRF52/source/btle/btle.cpp b/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_NORDIC_SOFTDEVICE/TARGET_NRF52/source/btle/btle.cpp index 0a870ab9b17..5f755464177 100644 --- a/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_NORDIC_SOFTDEVICE/TARGET_NRF52/source/btle/btle.cpp +++ b/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_NORDIC_SOFTDEVICE/TARGET_NRF52/source/btle/btle.cpp @@ -427,7 +427,7 @@ void btle_handler(const ble_evt_t *p_ble_evt) } break; } -#endif + case BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST: { Gap::Handle_t connection = p_ble_evt->evt.gap_evt.conn_handle; const ble_gap_evt_conn_param_update_request_t *update_request = From 37d904d6eaa4b456acd86c4f7f8961b77865875a Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Tue, 12 Mar 2019 15:50:45 -0400 Subject: [PATCH 475/488] Removed unnecessary logic and changed round robin DMA scheduling --- .../drivers_nrf/usbd/nrf_drv_usbd.c | 4 +- .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 61 +++---------------- 2 files changed, 13 insertions(+), 52 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c index e6fe0d98384..4351645d3e7 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_14_2/drivers_nrf/usbd/nrf_drv_usbd.c @@ -1375,7 +1375,9 @@ static uint8_t usbd_dma_scheduler_algorithm(uint32_t req) // DMA scheduler algorithm to ensure each // endpoint is serviced with equal priority uint8_t last_index = __CLZ(__RBIT(ep2bit(m_last_dma_client))); - return ((__CLZ(__RBIT(__ROR(req, last_index))) + last_index) & 0x1F); + uint8_t next_dma_client = ((__CLZ(__RBIT(__ROR(req, last_index))) + last_index) & 0x1F); + m_last_dma_client = bit2ep(next_dma_client); + return next_dma_client; // Original implementation /** @todo RK This is just simple algorithm for testing and should be updated */ diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index b82d2552cc7..bea23e0e88b 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -21,27 +21,6 @@ #include "nrf_clock.h" -/* - * TODO list for nRF52840 USBD driver - * - * 1.) Properly enable/disable start-of-frame interrupt. - * - * Description: Currently, start-of-frame interrupts are masked by a flag at this layer - * but still cause the processor to be interrupted for no purpose. - * - * The Nordic driver requires you to call nrf_drv_start(bool) - * with a boolean flag indicating whether it should enable start-of-frame - * interrupts or not. From the datasheet it seems to be possible to - * enable/disable SoF interrupts on the fly, but the fact that they - * force you to make the SoF decision during "start" makes me suspicious - * the underlying driver may manage/use the SoF flag in other ways. - * - * Next steps: Investigate how the SoF flag is used during "nrf_drv_start" and - * determine if enabling/disabling this interrupt would cause internal problems - * with the Nordic USBD driver - * - * - */ #define MAX_PACKET_SIZE_SETUP NRF_DRV_USBD_EPSIZE #define MAX_PACKET_NON_ISO NRF_DRV_USBD_EPSIZE #define MAX_PACKET_ISO NRF_DRV_USBD_ISOSIZE @@ -67,19 +46,10 @@ void USBD_HAL_IRQHandler(void); static USBPhyHw *instance = 0; static volatile bool virtual_status_xfer_event; -static volatile bool irq_already_pending; static void usbd_event_handler(nrf_drv_usbd_evt_t const * const p_event); static void power_usb_event_handler(nrf_drv_power_usb_evt_t event); -#if USBD_DEBUG - -// Static array of saved events to track what happens -static nrf_drv_usbd_evt_t debug_events[32]; -static uint8_t debug_evt_index = 0; - -#endif - USBPhy *get_usb_phy() { static USBPhyHw usbphy; return &usbphy; @@ -127,22 +97,15 @@ void USBPhyHw::init(USBPhyEvents *events) { instance = this; virtual_status_xfer_event = false; - irq_already_pending = false; /* - * TODO - Configure ISOIN endpoint to respond with ZLP when + * Configure ISOIN endpoint to respond with ZLP when * no data is ready to be sent - * - * This is a feature available in the Nordic SDK15.2 - * For now we just configure the appropriate register on initialization */ NRF_USBD->ISOINCONFIG |= 0x01; // set RESPONSE to 1 (respond with ZLP) // Enable IRQ - //NVIC_SetVector(USBD_IRQn, (uint32_t)USBD_IRQHandler); NVIC_SetVector(USBD_IRQn, (uint32_t)USBD_HAL_IRQHandler); - //NVIC_SetPriority(USBD_IRQn, 7); - //NVIC_EnableIRQ(USBD_IRQn); // This is handled by the Nordic driver } void USBPhyHw::deinit() { @@ -214,6 +177,7 @@ void USBPhyHw::sof_enable() { // TODO - Enable SOF interrupt // Can this safely be done if // nrf_drv_usbd_start is called with SoF enabled? + // For now just mask the interrupt with a boolean flag sof_enabled = true; } @@ -304,8 +268,6 @@ void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) { virtual_status_xfer_event = true; - irq_already_pending = NVIC_GetPendingIRQ(USBD_IRQn); - // Trigger an interrupt to process the virtual status event NVIC_SetPendingIRQ(USBD_IRQn); @@ -349,8 +311,6 @@ void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) { virtual_status_xfer_event = true; - irq_already_pending = NVIC_GetPendingIRQ(USBD_IRQn); - // Trigger an interrupt to process the virtual status event NVIC_SetPendingIRQ(USBD_IRQn); @@ -429,10 +389,7 @@ bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) { } void USBPhyHw::endpoint_abort(usb_ep_t endpoint) { - nrf_drv_usbd_ep_t nrf_ep = get_nordic_endpoint(endpoint); - // Don't call abort on ISO endpoints -- this will cause an ASSERT in the Nordic driver - //if(nrf_ep != NRF_DRV_USBD_EPOUT8 && nrf_ep != NRF_DRV_USBD_EPIN8) - nrf_drv_usbd_ep_abort(nrf_ep); + nrf_drv_usbd_ep_abort(get_nordic_endpoint(endpoint)); } void USBPhyHw::process() { @@ -604,7 +561,9 @@ void USBPhyHw::_reset(void) usb_event_type = USB_HW_EVENT_NONE; - // TODO - Clear all endpoint interrupts? + // Clear all endpoint interrupts + NVIC_ClearPendingIRQ(USBD_IRQn); + nrf_usbd_event_clear((nrf_usbd_event_t)0x01FFFFFF); } void USBPhyHw::enable_usb_interrupts(void) { @@ -643,15 +602,15 @@ void USBD_HAL_IRQHandler(void) if(virtual_status_xfer_event) { if(instance) { + //if(!irq_already_pending) + // return; + + //irq_already_pending = false; instance->_usb_virtual_status_event_handler(); } virtual_status_xfer_event = false; - if(!irq_already_pending) - return; - - irq_already_pending = false; } // Call Nordic driver IRQ handler USBD_IRQHandler(); From c700610895ce4a1871a11fd54b2a58e615201927 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Thu, 14 Mar 2019 16:10:34 -0400 Subject: [PATCH 476/488] Added workaround for "unloading" IN endpoints after unstalling. Disable and then reenable when USBPhyHw::endpoint_unhalt() is called. --- .../TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index b82d2552cc7..bf9da4b3a38 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -396,7 +396,10 @@ void USBPhyHw::endpoint_stall(usb_ep_t endpoint) { } void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) { - nrf_drv_usbd_ep_stall_clear(get_nordic_endpoint(endpoint)); + nrf_drv_usbd_ep_t ep = get_nordic_endpoint(endpoint); + nrf_drv_usbd_ep_stall_clear(ep); + nrf_drv_usbd_ep_disable(ep); + nrf_drv_usbd_ep_enable(ep); } bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) { @@ -430,8 +433,6 @@ bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) { void USBPhyHw::endpoint_abort(usb_ep_t endpoint) { nrf_drv_usbd_ep_t nrf_ep = get_nordic_endpoint(endpoint); - // Don't call abort on ISO endpoints -- this will cause an ASSERT in the Nordic driver - //if(nrf_ep != NRF_DRV_USBD_EPOUT8 && nrf_ep != NRF_DRV_USBD_EPIN8) nrf_drv_usbd_ep_abort(nrf_ep); } From 797921ce5ddb8ae47b5eb086d2f3e27ef0ddf55d Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Thu, 14 Mar 2019 16:39:44 -0400 Subject: [PATCH 477/488] Removed redundant virtual status transfer notifications. --- .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 24 ------------------- 1 file changed, 24 deletions(-) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index bf9da4b3a38..cd8764c5737 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -466,36 +466,14 @@ void USBPhyHw::process() { if(IS_IN_EP(usb_event.data.eptransfer.ep)) { if((usb_event.data.eptransfer.ep & 0x7F) == 0) - { events->ep0_in(); - // Check for pending virtual status transfer - if(virtual_status_xfer_event) - { - // Notify the upper stack that the status transfer is done - // as well at this point - virtual_status_xfer_event = false; - events->ep0_out(); - - } - } else events->in((usb_ep_t) usb_event.data.eptransfer.ep); } else { if((usb_event.data.eptransfer.ep & 0x7F) == 0) - { events->ep0_out(); - - // Check for pending virtual status transfer - if(virtual_status_xfer_event) - { - // Notify the upper stack that the status transfer is done - // as well at this point - virtual_status_xfer_event = false; - events->ep0_in(); - } - } else events->out((usb_ep_t) usb_event.data.eptransfer.ep); } @@ -591,8 +569,6 @@ nrf_drv_usbd_transfer_t* USBPhyHw::get_transfer_buffer(usb_ep_t endpoint) { nrf_drv_usbd_ep_t USBPhyHw::get_nordic_endpoint(usb_ep_t endpoint) { // Clear the most-significant-bit (input endpoint flag) uint8_t endpoint_num = (endpoint & ~(0x80)); - // Make sure it's within the valid endpoint range - ASSERT(((0 <= endpoint_num) && (endpoint_num <= 8))); return (nrf_drv_usbd_ep_t) endpoint; } From ba374a1244fdd79245cdd2e6d8e38cfb8c254ed5 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Thu, 14 Mar 2019 17:44:18 -0400 Subject: [PATCH 478/488] Added in power driver and moved usbd driver out of subdirectory --- .../integration/nrfx/legacy/nrf_drv_power.c | 477 ++++++++++++++++++ .../integration/nrfx/legacy/nrf_drv_power.h | 371 ++++++++++++++ .../nrfx/legacy/{usbd => }/nrf_drv_usbd.c | 11 +- .../nrfx/legacy/{usbd => }/nrf_drv_usbd.h | 0 .../legacy/{usbd => }/nrf_drv_usbd_errata.h | 0 5 files changed, 853 insertions(+), 6 deletions(-) create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_power.c create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_power.h rename targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/{usbd => }/nrf_drv_usbd.c (99%) rename targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/{usbd => }/nrf_drv_usbd.h (100%) rename targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/{usbd => }/nrf_drv_usbd_errata.h (100%) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_power.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_power.c new file mode 100644 index 00000000000..3c1f26818c1 --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_power.c @@ -0,0 +1,477 @@ +/** + * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "sdk_common.h" +#if NRF_MODULE_ENABLED(POWER) + +#include "nrf_drv_power.h" +#include "nrf_assert.h" +#include "nordic_common.h" +#include "app_util_platform.h" +#ifdef SOFTDEVICE_PRESENT +#include "nrf_sdm.h" +#include "nrf_soc.h" +#include "nrf_sdh.h" +#include "nrf_sdh_soc.h" +#endif + +/* Validate configuration */ +INTERRUPT_PRIORITY_VALIDATION(POWER_CONFIG_IRQ_PRIORITY); + +/** + * @internal + * @defgroup nrf_drv_power_internals POWER driver internals + * @ingroup nrf_drv_power + * + * Internal variables, auxiliary macros and functions of POWER driver. + * @{ + */ + +/** + * @brief Default configuration + * + * The structure with default configuration data. + * This structure would be used if configuration pointer given + * to the @ref nrf_drv_power_init is set to NULL. + */ +static const nrf_drv_power_config_t m_drv_power_config_default = +{ + .dcdcen = POWER_CONFIG_DEFAULT_DCDCEN, +#if NRF_POWER_HAS_VDDH + .dcdcenhv = POWER_CONFIG_DEFAULT_DCDCENHV, +#endif +}; + +/** + * @brief The initialization flag + */ +static bool m_initialized; + +/** + * @brief The handler of power fail comparator warning event + */ +static nrf_drv_power_pofwarn_event_handler_t m_pofwarn_handler; + +#if NRF_POWER_HAS_SLEEPEVT +/** + * @brief The handler of sleep event handler + */ +static nrf_drv_power_sleep_event_handler_t m_sleepevt_handler; +#endif + +#if NRF_POWER_HAS_USBREG +/** + * @brief The handler of USB power events + */ +static nrf_drv_power_usb_event_handler_t m_usbevt_handler; +#endif + +/** @} */ + +bool nrf_drv_power_init_check(void) +{ + return m_initialized; +} + +ret_code_t nrf_drv_power_init(nrf_drv_power_config_t const * p_config) +{ + nrf_drv_power_config_t const * p_used_config; + if (m_initialized) + { + return NRF_ERROR_MODULE_ALREADY_INITIALIZED; + } +#ifdef SOFTDEVICE_PRESENT + if (nrf_sdh_is_enabled()) + { + return NRF_ERROR_INVALID_STATE; + } +#endif + + p_used_config = (p_config != NULL) ? + p_config : (&m_drv_power_config_default); +#if NRF_POWER_HAS_VDDH + nrf_power_dcdcen_vddh_set(p_used_config->dcdcenhv); +#endif + nrf_power_dcdcen_set(p_used_config->dcdcen); + + nrf_drv_common_power_clock_irq_init(); + + m_initialized = true; + return NRF_SUCCESS; +} + +void nrf_drv_power_uninit(void) +{ + ASSERT(m_initialized); + nrf_drv_power_pof_uninit(); +#if NRF_POWER_HAS_SLEEPEVT + nrf_drv_power_sleepevt_uninit(); +#endif +#if NRF_POWER_HAS_USBREG + nrf_drv_power_usbevt_uninit(); +#endif + m_initialized = false; +} + +ret_code_t nrf_drv_power_pof_init(nrf_drv_power_pofwarn_config_t const * p_config) +{ + ASSERT(p_config != NULL); + + nrf_drv_power_pof_uninit(); + +#ifdef SOFTDEVICE_PRESENT + if (nrf_sdh_is_enabled()) + { + /* Currently when SD is enabled - the configuration can be changed + * in very limited range. + * It is the SoftDevice limitation. + */ +#if NRF_POWER_HAS_VDDH + if (p_config->thrvddh != nrf_power_pofcon_vddh_get()) + { + /* Cannot change THRVDDH with current SD API */ + return NRF_ERROR_INVALID_STATE; + } +#endif + if (p_config->thr != nrf_power_pofcon_get(NULL)) + { + /* Only limited number of THR values are supported and + * the values taken by SD is different than the one in hardware + */ + uint8_t thr; + switch (p_config->thr) + { + case NRF_POWER_POFTHR_V21: + thr = NRF_POWER_THRESHOLD_V21; + break; + case NRF_POWER_POFTHR_V23: + thr = NRF_POWER_THRESHOLD_V23; + break; + case NRF_POWER_POFTHR_V25: + thr = NRF_POWER_THRESHOLD_V25; + break; + case NRF_POWER_POFTHR_V27: + thr = NRF_POWER_THRESHOLD_V27; + break; + default: + /* Cannot configure */ + return NRF_ERROR_INVALID_STATE; + } + ASSERT(sd_power_pof_threshold_set(thr)); + } + } + else +#endif /* SOFTDEVICE_PRESENT */ + { + nrf_power_pofcon_set(true, p_config->thr); +#if NRF_POWER_HAS_VDDH + nrf_power_pofcon_vddh_set(p_config->thrvddh); +#endif + } + + if (p_config->handler != NULL) + { + m_pofwarn_handler = p_config->handler; +#ifdef SOFTDEVICE_PRESENT + if (nrf_sdh_is_enabled()) + { + (void) sd_power_pof_enable(true); + } + else +#endif + { + nrf_power_int_enable(NRF_POWER_INT_POFWARN_MASK); + } + } + return NRF_SUCCESS; +} + +void nrf_drv_power_pof_uninit(void) +{ +#ifdef SOFTDEVICE_PRESENT + if (nrf_sdh_is_enabled()) + { + (void) sd_power_pof_enable(false); + } + else +#endif + { + nrf_power_int_disable(NRF_POWER_INT_POFWARN_MASK); + } + m_pofwarn_handler = NULL; +} + +#if NRF_POWER_HAS_SLEEPEVT +ret_code_t nrf_drv_power_sleepevt_init(nrf_drv_power_sleepevt_config_t const * p_config) +{ + ASSERT(p_config != NULL); + + nrf_drv_power_sleepevt_uninit(); + if (p_config->handler != NULL) + { + uint32_t enmask = 0; + m_sleepevt_handler = p_config->handler; + if (p_config->en_enter) + { + enmask |= NRF_POWER_INT_SLEEPENTER_MASK; + nrf_power_event_clear(NRF_POWER_EVENT_SLEEPENTER); + } + if (p_config->en_exit) + { + enmask |= NRF_POWER_INT_SLEEPEXIT_MASK; + nrf_power_event_clear(NRF_POWER_EVENT_SLEEPEXIT); + } +#ifdef SOFTDEVICE_PRESENT + if (nrf_sdh_is_enabled()) + { + if (enmask != 0) + { + return NRF_ERROR_INVALID_STATE; + } + } + else +#endif + { + nrf_power_int_enable(enmask); + } + } + + return NRF_SUCCESS; +} + +void nrf_drv_power_sleepevt_uninit(void) +{ +#ifdef SOFTDEVICE_PRESENT + if (nrf_sdh_is_enabled()) + { + /* Nothing to do */ + } + else +#endif + { + nrf_power_int_disable( + NRF_POWER_INT_SLEEPENTER_MASK | + NRF_POWER_INT_SLEEPEXIT_MASK); + } + m_sleepevt_handler = NULL; +} +#endif /* NRF_POWER_HAS_SLEEPEVT */ + +#if NRF_POWER_HAS_USBREG +ret_code_t nrf_drv_power_usbevt_init(nrf_drv_power_usbevt_config_t const * p_config) +{ + nrf_drv_power_usbevt_uninit(); + if (p_config->handler != NULL) + { + m_usbevt_handler = p_config->handler; +#ifdef SOFTDEVICE_PRESENT + if (nrf_sdh_is_enabled()) + { + /** @todo Implement USB power events when SD support it */ + return NRF_ERROR_INVALID_STATE; + } + else +#endif + { + nrf_power_int_enable( + NRF_POWER_INT_USBDETECTED_MASK | + NRF_POWER_INT_USBREMOVED_MASK | + NRF_POWER_INT_USBPWRRDY_MASK); + } + } + return NRF_SUCCESS; +} + +void nrf_drv_power_usbevt_uninit(void) +{ +#ifdef SOFTDEVICE_PRESENT + if (nrf_sdh_is_enabled()) + { + /** @todo Implement USB power events when SD support it */ + } + else +#endif + { + nrf_power_int_disable( + NRF_POWER_INT_USBDETECTED_MASK | + NRF_POWER_INT_USBREMOVED_MASK | + NRF_POWER_INT_USBPWRRDY_MASK); + } + m_usbevt_handler = NULL; +} +#endif /* NRF_POWER_HAS_USBREG */ + + +/** + * @ingroup nrf_drv_power_internals + * @brief Interrupt handler + * + * POWER peripheral interrupt handler + */ +#if NRF_DRV_COMMON_POWER_CLOCK_ISR +void nrf_drv_power_onIRQ(void) +#else +void POWER_CLOCK_IRQHandler(void) +#endif +{ + uint32_t enabled = nrf_power_int_enable_get(); + if ((0 != (enabled & NRF_POWER_INT_POFWARN_MASK)) && + nrf_power_event_get_and_clear(NRF_POWER_EVENT_POFWARN)) + { + /* Cannot be null if event is enabled */ + ASSERT(m_pofwarn_handler != NULL); + m_pofwarn_handler(); + } +#if NRF_POWER_HAS_SLEEPEVT + if ((0 != (enabled & NRF_POWER_INT_SLEEPENTER_MASK)) && + nrf_power_event_get_and_clear(NRF_POWER_EVENT_SLEEPENTER)) + { + /* Cannot be null if event is enabled */ + ASSERT(m_sleepevt_handler != NULL); + m_sleepevt_handler(NRF_DRV_POWER_SLEEP_EVT_ENTER); + } + if ((0 != (enabled & NRF_POWER_INT_SLEEPEXIT_MASK)) && + nrf_power_event_get_and_clear(NRF_POWER_EVENT_SLEEPEXIT)) + { + /* Cannot be null if event is enabled */ + ASSERT(m_sleepevt_handler != NULL); + m_sleepevt_handler(NRF_DRV_POWER_SLEEP_EVT_EXIT); + } +#endif +#if NRF_POWER_HAS_USBREG + if ((0 != (enabled & NRF_POWER_INT_USBDETECTED_MASK)) && + nrf_power_event_get_and_clear(NRF_POWER_EVENT_USBDETECTED)) + { + /* Cannot be null if event is enabled */ + ASSERT(m_usbevt_handler != NULL); + m_usbevt_handler(NRF_DRV_POWER_USB_EVT_DETECTED); + } + if ((0 != (enabled & NRF_POWER_INT_USBREMOVED_MASK)) && + nrf_power_event_get_and_clear(NRF_POWER_EVENT_USBREMOVED)) + { + /* Cannot be null if event is enabled */ + ASSERT(m_usbevt_handler != NULL); + m_usbevt_handler(NRF_DRV_POWER_USB_EVT_REMOVED); + } + if ((0 != (enabled & NRF_POWER_INT_USBPWRRDY_MASK)) && + nrf_power_event_get_and_clear(NRF_POWER_EVENT_USBPWRRDY)) + { + /* Cannot be null if event is enabled */ + ASSERT(m_usbevt_handler != NULL); + m_usbevt_handler(NRF_DRV_POWER_USB_EVT_READY); + } +#endif +} + +#ifdef SOFTDEVICE_PRESENT + +static void nrf_drv_power_sdh_soc_evt_handler(uint32_t evt_id, void * p_context); +static void nrf_drv_power_sdh_state_evt_handler(nrf_sdh_state_evt_t state, void * p_context); + +NRF_SDH_SOC_OBSERVER(m_soc_observer, POWER_CONFIG_SOC_OBSERVER_PRIO, + nrf_drv_power_sdh_soc_evt_handler, NULL); + +NRF_SDH_STATE_OBSERVER(m_sd_observer, POWER_CONFIG_STATE_OBSERVER_PRIO) = +{ + .handler = nrf_drv_power_sdh_state_evt_handler, + .p_context = NULL +}; + +static void nrf_drv_power_sdh_soc_evt_handler(uint32_t evt_id, void * p_context) +{ + if (evt_id == NRF_EVT_POWER_FAILURE_WARNING) + { + /* Cannot be null if event is enabled */ + ASSERT(m_pofwarn_handler != NULL); + m_pofwarn_handler(); + } +} + +static void nrf_drv_power_on_sd_enable(void) +{ + ASSERT(m_initialized); /* This module has to be enabled first */ + CRITICAL_REGION_ENTER(); + if (m_pofwarn_handler != NULL) + { + (void) sd_power_pof_enable(true); + } + CRITICAL_REGION_EXIT(); +} + +static void nrf_drv_power_on_sd_disable(void) +{ + /* Reinit interrupts */ + ASSERT(m_initialized); + nrf_drv_common_irq_enable(POWER_CLOCK_IRQn, CLOCK_CONFIG_IRQ_PRIORITY); + if (m_pofwarn_handler != NULL) + { + nrf_power_int_enable(NRF_POWER_INT_POFWARN_MASK); + } +#if NRF_POWER_HAS_USBREG + if (m_usbevt_handler != NULL) + { + nrf_power_int_enable( + NRF_POWER_INT_USBDETECTED_MASK | + NRF_POWER_INT_USBREMOVED_MASK | + NRF_POWER_INT_USBPWRRDY_MASK); + } +#endif +} + +static void nrf_drv_power_sdh_state_evt_handler(nrf_sdh_state_evt_t state, void * p_context) +{ + switch (state) + { + case NRF_SDH_EVT_STATE_ENABLED: + nrf_drv_power_on_sd_enable(); + break; + + case NRF_SDH_EVT_STATE_DISABLED: + nrf_drv_power_on_sd_disable(); + break; + + default: + break; + } +} + +#endif // SOFTDEVICE_PRESENT + +#endif /* NRF_MODULE_ENABLED(POWER) */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_power.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_power.h new file mode 100644 index 00000000000..bb645e311fb --- /dev/null +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_power.h @@ -0,0 +1,371 @@ +/** + * Copyright (c) 2017 - 2017, Nordic Semiconductor ASA + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic + * Semiconductor ASA integrated circuit in a product or a software update for + * such product, must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef NRF_DRV_POWER_H__ +#define NRF_DRV_POWER_H__ + +#include +#include +#include "nrf_power.h" +#include "sdk_config.h" +#include "nrf_drv_common.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrf_power Power HAL and driver + * @ingroup nrf_drivers + * @brief POWER peripheral APIs. + * + * The power peripheral HAL provides basic APIs for accessing + * the registers of the POWER peripheral. + * The POWER driver provides APIs on a higher level. + */ + +/** + * @defgroup nrf_drv_power POWER driver + * @{ + * @ingroup nrf_power + * @brief Driver for managing events and the state of POWER peripheral. + * + */ + +/** + * @brief Power mode possible configurations + */ +typedef enum +{ + NRF_DRV_POWER_MODE_CONSTLAT, /**< Constant latency mode *///!< NRF_DRV_POWER_MODE_CONSTLAT + NRF_DRV_POWER_MODE_LOWPWR /**< Low power mode *///!< NRF_DRV_POWER_MODE_LOWPWR +}nrf_drv_power_mode_t; + +#if NRF_POWER_HAS_SLEEPEVT +/** + * @brief Events from power system + */ +typedef enum +{ + NRF_DRV_POWER_SLEEP_EVT_ENTER, /**< CPU entered WFI/WFE sleep + * + * Keep in mind that if this interrupt is enabled, + * it means that CPU was waken up just after WFI by this interrupt. + */ + NRF_DRV_POWER_SLEEP_EVT_EXIT /**< CPU exited WFI/WFE sleep */ +}nrf_drv_power_sleep_evt_t; +#endif /* NRF_POWER_HAS_SLEEPEVT */ + +#if NRF_POWER_HAS_USBREG +/** + * @brief Events from USB power system + */ +typedef enum +{ + NRF_DRV_POWER_USB_EVT_DETECTED, /**< USB power detected on the connector (plugged in). */ + NRF_DRV_POWER_USB_EVT_REMOVED, /**< USB power removed from the connector. */ + NRF_DRV_POWER_USB_EVT_READY /**< USB power regulator ready. */ +}nrf_drv_power_usb_evt_t; + +/** + * @brief USB power state + * + * The single enumerator that holds all data about current state of USB + * related POWER. + * + * Organized this way that higher power state has higher numeric value + */ +typedef enum +{ + NRF_DRV_POWER_USB_STATE_DISCONNECTED, /**< No power on USB lines detected */ + NRF_DRV_POWER_USB_STATE_CONNECTED, /**< The USB power is detected, but USB power regulator is not ready */ + NRF_DRV_POWER_USB_STATE_READY /**< From the power point of view USB is ready for working */ +}nrf_drv_power_usb_state_t; +#endif /* NRF_POWER_HAS_USBREG */ + +/** + * @name Callback types + * + * Defined types of callback functions + * @{ + */ +/** + * @brief Event handler for power failure warning + */ +typedef void (*nrf_drv_power_pofwarn_event_handler_t)(void); + +#if NRF_POWER_HAS_SLEEPEVT +/** + * @brief Event handler for entering/exiting sleep + * + * @param event Event type + */ +typedef void (*nrf_drv_power_sleep_event_handler_t)(nrf_drv_power_sleep_evt_t event); +#endif + +#if NRF_POWER_HAS_USBREG +/** + * @brief Event handler for USB related power events + * + * @param event Event type + */ +typedef void (*nrf_drv_power_usb_event_handler_t)(nrf_drv_power_usb_evt_t event); +#endif +/** @} */ + +/** + * @brief General power configuration + * + * Parameters required to initialize power driver. + */ +typedef struct +{ + /** + * @brief Enable main DCDC regulator + * + * This bit only informs the driver that elements for DCDC regulator + * are installed and regulator can be used. + * The regulator would be enabled or disabled automatically + * automatically by the hardware, basing on current power requirement. + */ + bool dcdcen:1; + +#if NRF_POWER_HAS_VDDH + /** + * @brief Enable HV DCDC regulator + * + * This bit only informs the driver that elements for DCDC regulator + * are installed and regulator can be used. + * The regulator would be enabled or disabled automatically + * automatically by the hardware, basing on current power requirement. + */ + bool dcdcenhv: 1; +#endif +}nrf_drv_power_config_t; + +/** + * @brief The configuration for power failure comparator + * + * Configuration used to enable and configure power failure comparator + */ +typedef struct +{ + nrf_drv_power_pofwarn_event_handler_t handler; //!< Event handler + nrf_power_pof_thr_t thr; //!< Threshold for power failure detection +#if NRF_POWER_HAS_VDDH + nrf_power_pof_thrvddh_t thrvddh; //!< Threshold for power failure detection on VDDH pin +#endif +}nrf_drv_power_pofwarn_config_t; + +#if NRF_POWER_HAS_SLEEPEVT +/** + * @brief The configuration of sleep event processing + * + * Configuration used to enable and configure sleep event handling + */ +typedef struct +{ + nrf_drv_power_sleep_event_handler_t handler; //!< Event handler + bool en_enter:1; //!< Enable event on sleep entering + bool en_exit :1; //!< Enable event on sleep exiting +}nrf_drv_power_sleepevt_config_t; +#endif + +#if NRF_POWER_HAS_USBREG +/** + * @brief The configuration of USB related power events + * + * Configuration used to enable and configure USB power event handling + */ +typedef struct +{ + nrf_drv_power_usb_event_handler_t handler; //!< Event processing +}nrf_drv_power_usbevt_config_t; +#endif /* NRF_POWER_HAS_USBREG */ + +/** + * @brief Function for checking if driver is already initialized + * + * This function is used to check whatever common POWER_CLOCK common interrupt + * should be disabled or not if @ref nrf_drv_clock tries to disable the interrupt. + * + * @retval true Driver is initialized + * @retval false Driver is uninitialized + * + * @sa nrf_drv_power_uninit + */ +bool nrf_drv_power_init_check(void); + +/** + * @brief Initialize power module driver + * + * Enabled power module driver would process all the interrupts from power system. + * + * @param[in] p_config Driver configuration. Can be NULL - the default configuration + * from @em sdk_config.h file would be used then. + * + * @retval NRF_ERROR_INVALID_STATE Power driver has to be enabled + * before SoftDevice. + * @retval NRF_ERROR_MODULE_ALREADY_INITIALIZED Module is initialized already. + * @retval NRF_SUCCESS Successfully initialized. + */ +ret_code_t nrf_drv_power_init(nrf_drv_power_config_t const * p_config); + +/** + * @brief Unintialize power module driver + * + * Disables all the interrupt handling in the module. + * + * @sa nrf_drv_power_init + */ +void nrf_drv_power_uninit(void); + +/** + * @brief Initialize power failure comparator + * + * Configures and setups the power failure comparator and enables it. + * + * @param[in] p_config Configuration with values and event handler. + * If event handler is set to NULL, interrupt would be disabled. + * + * @retval NRF_ERROR_INVALID_STATE POF is initialized when SD is enabled and + * the configuration differs from the old one and + * is not possible to be set using SD interface. + * @retval NRF_SUCCESS Successfully initialized and configured. + */ +ret_code_t nrf_drv_power_pof_init(nrf_drv_power_pofwarn_config_t const * p_config); + +/** + * @brief Turn off the power failure comparator + * + * Disables and clears the settings of the power failure comparator. + */ +void nrf_drv_power_pof_uninit(void); + +#if NRF_POWER_HAS_SLEEPEVT +/** + * @brief Initialize sleep entering and exiting events processing + * + * Configures and setups the sleep event processing. + * + * @param[in] p_config Configuration with values and event handler. + * + * @sa nrf_drv_power_sleepevt_uninit + * + * @note Sleep events are not available when SoftDevice is enabled. + * @note If sleep event is enabled when SoftDevice is initialized, sleep events + * would be automatically disabled - it is the limitation of the + * SoftDevice itself. + * + * @retval NRF_ERROR_INVALID_STATE This event cannot be initialized + * when SD is enabled. + * @retval NRF_SUCCESS Successfully initialized and configured. + */ +ret_code_t nrf_drv_power_sleepevt_init(nrf_drv_power_sleepevt_config_t const * p_config); + +/** + * @brief Uninitialize sleep entering and exiting events processing + * + * @sa nrf_drv_power_sleepevt_init + */ +void nrf_drv_power_sleepevt_uninit(void); +#endif /* NRF_POWER_HAS_SLEEPEVT */ + +#if NRF_POWER_HAS_USBREG +/** + * @brief Initialize USB power event processing + * + * Configures and setups the USB power event processing. + * + * @param[in] p_config Configuration with values and event handler. + * + * @sa nrf_drv_power_usbevt_uninit + * + * @retval NRF_ERROR_INVALID_STATE This event cannot be initialized + * when SD is enabled and SD does not support + * USB power events. + * @retval NRF_SUCCESS Successfully initialized and configured. + */ +ret_code_t nrf_drv_power_usbevt_init(nrf_drv_power_usbevt_config_t const * p_config); + +/** + * @brief Uninitalize USB power event processing + * + * @sa nrf_drv_power_usbevt_init + */ +void nrf_drv_power_usbevt_uninit(void); + +/** + * @brief Get the status of USB power + * + * @return Current USB power status + */ +__STATIC_INLINE nrf_drv_power_usb_state_t nrf_drv_power_usbstatus_get(void); + +#endif /* NRF_POWER_HAS_USBREG */ + +/** @} */ + +#ifndef SUPPRESS_INLINE_IMPLEMENTATION + +#if NRF_POWER_HAS_USBREG +__STATIC_INLINE nrf_drv_power_usb_state_t nrf_drv_power_usbstatus_get(void) +{ + uint32_t status = nrf_power_usbregstatus_get(); + if (0 == (status & NRF_POWER_USBREGSTATUS_VBUSDETECT_MASK)) + { + return NRF_DRV_POWER_USB_STATE_DISCONNECTED; + } + if (0 == (status & NRF_POWER_USBREGSTATUS_OUTPUTRDY_MASK)) + { + return NRF_DRV_POWER_USB_STATE_CONNECTED; + } + return NRF_DRV_POWER_USB_STATE_READY; +} +#endif /* NRF_POWER_HAS_USBREG */ + +#endif /* SUPPRESS_INLINE_IMPLEMENTATION */ + + +#ifdef __cplusplus +} +#endif + +#endif /* NRF_DRV_POWER_H__ */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/usbd/nrf_drv_usbd.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_usbd.c similarity index 99% rename from targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/usbd/nrf_drv_usbd.c rename to targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_usbd.c index 72cb5646f96..75b85fe5718 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/usbd/nrf_drv_usbd.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_usbd.c @@ -47,7 +47,6 @@ #include "nrf_atomic.h" #include "nrf_delay.h" #include "app_util_platform.h" -#include "nrf_drv_systick.h" /* Marker to delete when not required anymore: >> NRF_DRV_USBD_ERRATA_ENABLE << */ #include #include @@ -1489,7 +1488,7 @@ static void usbd_dmareq_process(void) /* Start transfer to the endpoint buffer */ nrf_usbd_ep_easydma_set(ep, transfer.p_data.ptr, (uint32_t)transfer.size); - if (nrf_drv_usbd_errata_104()) + /*if (nrf_drv_usbd_errata_104()) { uint32_t cnt_end = (uint32_t)(-1); do @@ -1520,8 +1519,8 @@ static void usbd_dmareq_process(void) { NRF_DRV_USBD_LOG_PROTO1_FIX_PRINTF(" DMA fully restarted: %u times", cnt_end); } - } - else + } + else*/ { usbd_dma_start(ep); /* There is a lot of USBD registers that cannot be accessed during EasyDMA transfer. @@ -1720,10 +1719,10 @@ void USBD_IRQHandler(void) ret_code_t nrf_drv_usbd_init(nrf_drv_usbd_event_handler_t const event_handler) { - if (nrf_drv_usbd_errata_104()) + /*if (nrf_drv_usbd_errata_104()) { nrf_drv_systick_init(); - } + }*/ if (NULL == event_handler) { return NRF_ERROR_INVALID_PARAM; diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/usbd/nrf_drv_usbd.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_usbd.h similarity index 100% rename from targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/usbd/nrf_drv_usbd.h rename to targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_usbd.h diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/usbd/nrf_drv_usbd_errata.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_usbd_errata.h similarity index 100% rename from targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/usbd/nrf_drv_usbd_errata.h rename to targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_usbd_errata.h From 833ed6392892b924ec9d3d6b8f7aae0a43746b56 Mon Sep 17 00:00:00 2001 From: RFulchiero Date: Thu, 14 Mar 2019 17:39:35 -0500 Subject: [PATCH 479/488] Remove redundant legacy files and definition of PACKED * The following v14.2 files are removed from nrfx/legacy: nrf_drv_clock.h nrf_drv_common.h nrf_drv_gpiote.h nrf_drv_spi.h nrf_drv_twi.h nrf_drv_uarth.h * Remove unneeded references to "nrfx_glue.h" and "nrf_drv_common.h" * Remove the definition of PACKED from app_util_platform.h (already defined in mbed_toolchain.h) --- .../TARGET_NRF5x/TARGET_NRF52/common_rtc.c | 4 +- .../TARGET_NRF5x/TARGET_NRF52/serial_api.c | 1 - .../TARGET_NRF5x/TARGET_NRF52/us_ticker.c | 1 - .../libraries/util/app_util_platform.h | 2 - .../integration/nrfx/legacy/nrf_drv_clock.h | 297 -------- .../integration/nrfx/legacy/nrf_drv_common.h | 63 -- .../integration/nrfx/legacy/nrf_drv_gpiote.h | 139 ---- .../integration/nrfx/legacy/nrf_drv_spi.h | 644 ---------------- .../integration/nrfx/legacy/nrf_drv_twi.h | 708 ------------------ .../integration/nrfx/legacy/nrf_drv_uart.h | 671 ----------------- targets/TARGET_NORDIC/TARGET_NRF5x/qspi_api.c | 1 - 11 files changed, 1 insertion(+), 2530 deletions(-) delete mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_clock.h delete mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_common.h delete mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_gpiote.h delete mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_spi.h delete mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_twi.h delete mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_uart.h diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/common_rtc.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/common_rtc.c index c5600ab5e5e..8d3ad4ba56f 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/common_rtc.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/common_rtc.c @@ -39,10 +39,8 @@ #include "us_ticker_api.h" #include "common_rtc.h" #include "app_util.h" -#include "nrf_drv_common.h" #include "lp_ticker_api.h" #include "mbed_critical.h" -#include "nrfx_glue.h" #if defined(NRF52_PAN_20) /* Macro for testing if the SoftDevice is active, regardless of whether the @@ -186,7 +184,7 @@ void common_rtc_free() { nrf_rtc_task_trigger(COMMON_RTC_INSTANCE, NRF_RTC_TASK_STOP); nrf_rtc_int_disable(COMMON_RTC_INSTANCE, LP_TICKER_INT_MASK); - NVIC_DisableIRQ(nrf_drv_get_IRQn(COMMON_RTC_INSTANCE)); + NVIC_DisableIRQ(nrfx_get_irq_number(COMMON_RTC_INSTANCE)); m_common_rtc_enabled = false; } diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c index 823c651bc94..d5b98128e17 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/serial_api.c @@ -45,7 +45,6 @@ #include "nrf_atfifo.h" #include "app_util_platform.h" #include "pinmap_ex.h" -#include "nrfx_glue.h" #include "nrfx_gpiote.h" #include "nrfx_ppi.h" #include "PeripheralPins.h" diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/us_ticker.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/us_ticker.c index 859873f2bfd..5b03a141b88 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/us_ticker.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/us_ticker.c @@ -43,7 +43,6 @@ #include "app_util_platform.h" #include "nrfx_common.h" #include "mbed_critical.h" -#include "nrfx_glue.h" bool us_ticker_initialized = false; diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_util_platform.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_util_platform.h index ed478f39839..ceb892d375e 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_util_platform.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/components/libraries/util/app_util_platform.h @@ -146,10 +146,8 @@ typedef enum #endif // __CORTEX_M == 0x04 #if defined ( __CC_ARM ) -#define PACKED(TYPE) __packed TYPE #define PACKED_STRUCT PACKED(struct) #elif defined ( __GNUC__ ) -#define PACKED __attribute__((packed)) #define PACKED_STRUCT struct PACKED #elif defined (__ICCARM__) #define PACKED_STRUCT __packed struct diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_clock.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_clock.h deleted file mode 100644 index 5873bf21229..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_clock.h +++ /dev/null @@ -1,297 +0,0 @@ -/** - * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_DRV_CLOCK_H__ -#define NRF_DRV_CLOCK_H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup nrf_drv_clock Clock driver - legacy layer - * @{ - * @ingroup nrf_clock - * - * @brief Layer providing compatibility with the former API. - */ - -/** - * @brief Clock events. - */ -typedef enum -{ - NRF_DRV_CLOCK_EVT_HFCLK_STARTED, ///< HFCLK has been started. - NRF_DRV_CLOCK_EVT_LFCLK_STARTED, ///< LFCLK has been started. - NRF_DRV_CLOCK_EVT_CAL_DONE, ///< Calibration is done. - NRF_DRV_CLOCK_EVT_CAL_ABORTED, ///< Calibration has been aborted. -} nrf_drv_clock_evt_type_t; - -/** - * @brief Clock event handler. - * - * @param[in] event Event. - */ -typedef void (*nrf_drv_clock_event_handler_t)(nrf_drv_clock_evt_type_t event); - -// Forward declaration of the nrf_drv_clock_handler_item_t type. -typedef struct nrf_drv_clock_handler_item_s nrf_drv_clock_handler_item_t; - -struct nrf_drv_clock_handler_item_s -{ - nrf_drv_clock_handler_item_t * p_next; ///< A pointer to the next handler that should be called when the clock is started. - nrf_drv_clock_event_handler_t event_handler; ///< Function to be called when the clock is started. -}; - -/** - * @brief Function for checking if driver is already initialized - * - * @retval true Driver is initialized - * @retval false Driver is uninitialized - */ -bool nrf_drv_clock_init_check(void); - -/** - * @brief Function for initializing the nrf_drv_clock module. - * - * After initialization, the module is in power off state (clocks are not requested). - * - * @retval NRF_SUCCESS If the procedure was successful. - * @retval NRF_ERROR_MODULE_ALREADY_INITIALIZED If the driver was already initialized. - */ -ret_code_t nrf_drv_clock_init(void); - -/** - * @brief Function for uninitializing the clock module. - * - */ -void nrf_drv_clock_uninit(void); - -/** - * @brief Function for requesting the LFCLK. - * - * The low-frequency clock can be requested by different modules - * or contexts. The driver ensures that the clock will be started only when it is requested - * the first time. If the clock is not ready but it was already started, the handler item that is - * provided as an input parameter is added to the list of handlers that will be notified - * when the clock is started. If the clock is already enabled, user callback is called from the - * current context. - * - * The first request will start the selected LFCLK source. If an event handler is - * provided, it will be called once the LFCLK is started. If the LFCLK was already started at this - * time, the event handler will be called from the context of this function. Additionally, - * the @ref nrf_drv_clock_lfclk_is_running function can be polled to check if the clock has started. - * - * @note When a SoftDevice is enabled, the LFCLK is always running and the driver cannot control it. - * - * @note The handler item provided by the user cannot be an automatic variable. - * - * @param[in] p_handler_item A pointer to the event handler structure. - */ -void nrf_drv_clock_lfclk_request(nrf_drv_clock_handler_item_t * p_handler_item); - -/** - * @brief Function for releasing the LFCLK. - * - * If there are no more requests, the LFCLK source will be stopped. - * - * @note When a SoftDevice is enabled, the LFCLK is always running. - */ -void nrf_drv_clock_lfclk_release(void); - -/** - * @brief Function for checking the LFCLK state. - * - * @retval true If the LFCLK is running. - * @retval false If the LFCLK is not running. - */ -bool nrf_drv_clock_lfclk_is_running(void); - -/** - * @brief Function for requesting the high-accuracy source HFCLK. - * - * The high-accuracy source - * can be requested by different modules or contexts. The driver ensures that the high-accuracy - * clock will be started only when it is requested the first time. If the clock is not ready - * but it was already started, the handler item that is provided as an input parameter is added - * to the list of handlers that will be notified when the clock is started. - * - * If an event handler is provided, it will be called once the clock is started. If the clock was already - * started at this time, the event handler will be called from the context of this function. Additionally, - * the @ref nrf_drv_clock_hfclk_is_running function can be polled to check if the clock has started. - * - * @note If a SoftDevice is running, the clock is managed by the SoftDevice and all requests are handled by - * the SoftDevice. This function cannot be called from all interrupt priority levels in that case. - * @note The handler item provided by the user cannot be an automatic variable. - * - * @param[in] p_handler_item A pointer to the event handler structure. - */ -void nrf_drv_clock_hfclk_request(nrf_drv_clock_handler_item_t * p_handler_item); - -/** - * @brief Function for releasing the high-accuracy source HFCLK. - * - * If there are no more requests, the high-accuracy source will be released. - */ -void nrf_drv_clock_hfclk_release(void); - -/** - * @brief Function for checking the HFCLK state. - * - * @retval true If the HFCLK is running (for \nRFXX XTAL source). - * @retval false If the HFCLK is not running. - */ -bool nrf_drv_clock_hfclk_is_running(void); - -/** - * @brief Function for starting a single calibration process. - * - * This function can also delay the start of calibration by a user-specified value. The delay will use - * a low-power timer that is part of the CLOCK module. @ref nrf_drv_clock_is_calibrating can be called to - * check if calibration is still in progress. If a handler is provided, the user can be notified when - * calibration is completed. The ext calibration can be started from the handler context. - * - * The calibration process consists of three phases: - * - Delay (optional) - * - Requesting the high-accuracy HFCLK - * - Hardware-supported calibration - * - * @param[in] delay Time after which the calibration will be started (in 0.25 s units). - * @param[in] handler NULL or user function to be called when calibration is completed or aborted. - * - * @retval NRF_SUCCESS If the procedure was successful. - * @retval NRF_ERROR_FORBIDDEN If a SoftDevice is present or the selected LFCLK source is not an RC oscillator. - * @retval NRF_ERROR_INVALID_STATE If the low-frequency clock is off. - * @retval NRF_ERROR_BUSY If calibration is in progress. - */ -ret_code_t nrf_drv_clock_calibration_start(uint8_t delay, nrf_drv_clock_event_handler_t handler); - -/** - * @brief Function for aborting calibration. - * - * This function aborts on-going calibration. If calibration was started, it cannot be stopped. If a handler - * was provided by @ref nrf_drv_clock_calibration_start, this handler will be called once - * aborted calibration is completed. @ref nrf_drv_clock_is_calibrating can also be used to check - * if the system is calibrating. - * - * @retval NRF_SUCCESS If the procedure was successful. - * @retval NRF_ERROR_FORBIDDEN If a SoftDevice is present or the selected LFCLK source is not an RC oscillator. - */ -ret_code_t nrf_drv_clock_calibration_abort(void); - -/** - * @brief Function for checking if calibration is in progress. - * - * This function indicates that the system is - * in calibration if it is in any of the calibration process phases (see @ref nrf_drv_clock_calibration_start). - * - * @param[out] p_is_calibrating True if calibration is in progress, false if not. - * - * @retval NRF_SUCCESS If the procedure was successful. - * @retval NRF_ERROR_FORBIDDEN If a SoftDevice is present or the selected LFCLK source is not an RC oscillator. - */ -ret_code_t nrf_drv_clock_is_calibrating(bool * p_is_calibrating); - -/**@brief Function for returning a requested task address for the clock driver module. - * - * @param[in] task One of the peripheral tasks. - * - * @return Task address. - */ -__STATIC_INLINE uint32_t nrf_drv_clock_ppi_task_addr(nrf_clock_task_t task); - -/**@brief Function for returning a requested event address for the clock driver module. - * - * @param[in] event One of the peripheral events. - * - * @return Event address. - */ -__STATIC_INLINE uint32_t nrf_drv_clock_ppi_event_addr(nrf_clock_event_t event); - - -#ifdef SOFTDEVICE_PRESENT -/** - * @brief Function called by the SoftDevice handler if an @ref NRF_SOC_EVTS event is received from the SoftDevice. - * - * @param[in] evt_id One of NRF_SOC_EVTS values. - */ -void nrf_drv_clock_on_soc_event(uint32_t evt_id); - -/** - * @brief Function called by the SoftDevice handler when the SoftDevice has been enabled. - * - * This function is called just after the SoftDevice has been properly enabled. - * Its main purpose is to mark that LFCLK has been requested by SD. - */ -void nrf_drv_clock_on_sd_enable(void); - -/** - * @brief Function called by the SoftDevice handler when the SoftDevice has been disabled. - * - * This function is called just after the SoftDevice has been properly disabled. - * It has two purposes: - * 1. Releases the LFCLK from the SD. - * 2. Reinitializes an interrupt after the SD releases POWER_CLOCK_IRQ. - */ -void nrf_drv_clock_on_sd_disable(void); - -#endif -/** - *@} - **/ - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION -__STATIC_INLINE uint32_t nrf_drv_clock_ppi_task_addr(nrf_clock_task_t task) -{ - return nrf_clock_task_address_get(task); -} - -__STATIC_INLINE uint32_t nrf_drv_clock_ppi_event_addr(nrf_clock_event_t event) -{ - return nrf_clock_event_address_get(event); -} -#endif //SUPPRESS_INLINE_IMPLEMENTATION - -#ifdef __cplusplus -} -#endif - -#endif // NRF_DRV_CLOCK_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_common.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_common.h deleted file mode 100644 index 66439a3b130..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_common.h +++ /dev/null @@ -1,63 +0,0 @@ -/** - * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef NRF_DRV_COMMON_H__ -#define NRF_DRV_COMMON_H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#define INTERRUPT_PRIORITY_VALIDATION(pri) STATIC_ASSERT(INTERRUPT_PRIORITY_IS_VALID((pri))) -#define INTERRUPT_PRIORITY_ASSERT(pri) ASSERT(INTERRUPT_PRIORITY_IS_VALID((pri))) - -#define nrf_drv_irq_handler_t nrfx_irq_handler_t -#define nrf_drv_bitpos_to_event nrfx_bitpos_to_event -#define nrf_drv_event_to_bitpos nrfx_event_to_bitpos -#define nrf_drv_get_IRQn nrfx_get_irq_number -#define nrf_drv_is_in_RAM nrfx_is_in_ram - -#ifdef __cplusplus -} -#endif - -#endif // NRF_DRV_COMMON_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_gpiote.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_gpiote.h deleted file mode 100644 index 31bccb093b6..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_gpiote.h +++ /dev/null @@ -1,139 +0,0 @@ -/** - * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ -#ifndef NRF_DRV_GPIOTE_H__ -#define NRF_DRV_GPIOTE_H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup nrf_drv_gpiote GPIOTE driver - legacy layer - * @{ - * @ingroup nrf_gpiote - * @brief Layer providing compatibility with the former API. - */ - -/** @brief Type definition for forwarding the new implementation. */ -typedef nrfx_gpiote_in_config_t nrf_drv_gpiote_in_config_t; -/** @brief Type definition for forwarding the new implementation. */ -typedef nrfx_gpiote_pin_t nrf_drv_gpiote_pin_t; -/** @brief Type definition for forwarding the new implementation. */ -typedef nrfx_gpiote_out_config_t nrf_drv_gpiote_out_config_t; -/** @brief Type definition for forwarding the new implementation. */ -typedef nrfx_gpiote_evt_handler_t nrf_drv_gpiote_evt_handler_t; - -/** @brief Macro for forwarding the new implementation. */ -#define GPIOTE_CONFIG_IN_SENSE_LOTOHI NRFX_GPIOTE_CONFIG_IN_SENSE_LOTOHI -/** @brief Macro for forwarding the new implementation. */ -#define GPIOTE_CONFIG_IN_SENSE_HITOLO NRFX_GPIOTE_CONFIG_IN_SENSE_HITOLO -/** @brief Macro for forwarding the new implementation. */ -#define GPIOTE_CONFIG_IN_SENSE_TOGGLE NRFX_GPIOTE_CONFIG_IN_SENSE_TOGGLE -/** @brief Macro for forwarding the new implementation. */ -#define GPIOTE_RAW_CONFIG_IN_SENSE_LOTOHI NRFX_GPIOTE_RAW_CONFIG_IN_SENSE_LOTOHI -/** @brief Macro for forwarding the new implementation. */ -#define GPIOTE_RAW_CONFIG_IN_SENSE_HITOLO NRFX_GPIOTE_RAW_CONFIG_IN_SENSE_HITOLO -/** @brief Macro for forwarding the new implementation. */ -#define GPIOTE_RAW_CONFIG_IN_SENSE_TOGGLE NRFX_GPIOTE_RAW_CONFIG_IN_SENSE_TOGGLE -/** @brief Macro for forwarding the new implementation. */ -#define GPIOTE_CONFIG_OUT_SIMPLE NRFX_GPIOTE_CONFIG_OUT_SIMPLE -/** @brief Macro for forwarding the new implementation. */ -#define GPIOTE_CONFIG_OUT_TASK_LOW NRFX_GPIOTE_CONFIG_OUT_TASK_LOW -/** @brief Macro for forwarding the new implementation. */ -#define GPIOTE_CONFIG_OUT_TASK_HIGH NRFX_GPIOTE_CONFIG_OUT_TASK_HIGH -/** @brief Macro for forwarding the new implementation. */ -#define GPIOTE_CONFIG_OUT_TASK_TOGGLE NRFX_GPIOTE_CONFIG_OUT_TASK_TOGGLE - -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_gpiote_init nrfx_gpiote_init -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_gpiote_is_init nrfx_gpiote_is_init -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_gpiote_uninit nrfx_gpiote_uninit -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_gpiote_out_init nrfx_gpiote_out_init -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_gpiote_out_uninit nrfx_gpiote_out_uninit -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_gpiote_out_set nrfx_gpiote_out_set -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_gpiote_out_clear nrfx_gpiote_out_clear -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_gpiote_out_toggle nrfx_gpiote_out_toggle -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_gpiote_out_task_enable nrfx_gpiote_out_task_enable -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_gpiote_out_task_disable nrfx_gpiote_out_task_disable -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_gpiote_out_task_addr_get nrfx_gpiote_out_task_addr_get -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_gpiote_in_init nrfx_gpiote_in_init -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_gpiote_in_uninit nrfx_gpiote_in_uninit -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_gpiote_in_event_enable nrfx_gpiote_in_event_enable -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_gpiote_in_event_disable nrfx_gpiote_in_event_disable -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_gpiote_in_is_set nrfx_gpiote_in_is_set -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_gpiote_in_event_addr_get nrfx_gpiote_in_event_addr_get -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_gpiote_set_task_addr_get nrfx_gpiote_set_task_addr_get -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_gpiote_clr_task_addr_get nrfx_gpiote_clr_task_addr_get -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_gpiote_out_task_force nrfx_gpiote_out_task_force -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_gpiote_out_task_trigger nrfx_gpiote_out_task_trigger -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_gpiote_set_task_trigger nrfx_gpiote_set_task_trigger -/** @brief Macro for forwarding the new implementation. */ -#define nrf_drv_gpiote_clr_task_trigger nrfx_gpiote_clr_task_trigger - -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif //NRF_DRV_GPIOTE_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_spi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_spi.h deleted file mode 100644 index dd746117a83..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_spi.h +++ /dev/null @@ -1,644 +0,0 @@ -/** - * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef NRF_DRV_SPI_H__ -#define NRF_DRV_SPI_H__ - -#include - -// Needed for Mbed -#ifdef SPI0_ENABLED -#define SPI0_INCR SPI0_ENABLED -#else -#define SPI0_INCR 0 -#endif - -#ifdef SPI1_ENABLED -#define SPI1_INCR SPI1_ENABLED -#else -#define SPI1_INCR 0 -#endif - -#ifdef SPI2_ENABLED -#define SPI2_INCR SPI2_ENABLED -#else -#define SPI2_INCR 0 -#endif - -#ifdef SPI3_ENABLED -#define SPI3_INCR SPI3_ENABLED -#else -#define SPI3_INCR 0 -#endif - -#define ENABLED_SPI_COUNT (SPI0_INCR + SPI1_INCR + SPI2_INCR + SPI3_INCR) - -#ifdef SPIM_PRESENT - #include -#else - // Compilers (at least the smart ones) will remove the SPIM related code - // (blocks starting with "if (NRF_DRV_SPI_USE_SPIM)") when it is not used, - // but to perform the compilation they need the following definitions. - #define nrfx_spim_init(...) 0 - #define nrfx_spim_uninit(...) - #define nrfx_spim_start_task_get(...) 0 - #define nrfx_spim_end_event_get(...) 0 - #define nrfx_spim_abort(...) -#endif - -#ifdef SPI_PRESENT - #include -#else - // Compilers (at least the smart ones) will remove the SPI related code - // (blocks starting with "if (NRF_DRV_SPI_USE_SPI)") when it is not used, - // but to perform the compilation they need the following definitions. - #define nrfx_spi_init(...) 0 - #define nrfx_spi_uninit(...) - #define nrfx_spi_start_task_get(...) 0 - #define nrfx_spi_end_event_get(...) 0 - #define nrfx_spi_abort(...) - - // This part is for old modules that use directly SPI HAL definitions - // (to make them compilable for chips that have only SPIM). - #define NRF_SPI_FREQ_125K NRF_SPIM_FREQ_125K - #define NRF_SPI_FREQ_250K NRF_SPIM_FREQ_250K - #define NRF_SPI_FREQ_500K NRF_SPIM_FREQ_500K - #define NRF_SPI_FREQ_1M NRF_SPIM_FREQ_1M - #define NRF_SPI_FREQ_2M NRF_SPIM_FREQ_2M - #define NRF_SPI_FREQ_4M NRF_SPIM_FREQ_4M - #define NRF_SPI_FREQ_8M NRF_SPIM_FREQ_8M - #define NRF_SPI_MODE_0 NRF_SPIM_MODE_0 - #define NRF_SPI_MODE_1 NRF_SPIM_MODE_1 - #define NRF_SPI_MODE_2 NRF_SPIM_MODE_2 - #define NRF_SPI_MODE_3 NRF_SPIM_MODE_3 - #define NRF_SPI_BIT_ORDER_MSB_FIRST NRF_SPIM_BIT_ORDER_MSB_FIRST - #define NRF_SPI_BIT_ORDER_LSB_FIRST NRF_SPIM_BIT_ORDER_LSB_FIRST -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup nrf_drv_spi SPI master driver - * @{ - * @ingroup nrf_spi - * @brief Layer providing compatibility with the former API. - */ - -/** - * @brief SPI master driver instance data structure. - */ -typedef struct -{ - uint8_t inst_idx; - union - { -#ifdef SPIM_PRESENT - nrfx_spim_t spim; -#endif -#ifdef SPI_PRESENT - nrfx_spi_t spi; -#endif - } u; - bool use_easy_dma; -} nrf_drv_spi_t; - -/** - * @brief Macro for creating an SPI master driver instance. - */ -#define NRF_DRV_SPI_INSTANCE(id) NRF_DRV_SPI_INSTANCE_(id) -#define NRF_DRV_SPI_INSTANCE_(id) NRF_DRV_SPI_INSTANCE_ ## id - -#if NRFX_CHECK(NRFX_SPIM0_ENABLED) - #define NRF_DRV_SPI_INSTANCE_0 \ - { 0, { .spim = NRFX_SPIM_INSTANCE(0) }, true } -#elif NRFX_CHECK(NRFX_SPI0_ENABLED) - #define NRF_DRV_SPI_INSTANCE_0 \ - { 0, { .spi = NRFX_SPI_INSTANCE(0) }, false } -#endif -#if NRFX_CHECK(NRFX_SPIM1_ENABLED) - #define NRF_DRV_SPI_INSTANCE_1 \ - { 1, { .spim = NRFX_SPIM_INSTANCE(1) }, true } -#elif NRFX_CHECK(NRFX_SPI1_ENABLED) - #define NRF_DRV_SPI_INSTANCE_1 \ - { 1, { .spi = NRFX_SPI_INSTANCE(1) }, false } -#endif -#if NRFX_CHECK(NRFX_SPIM2_ENABLED) - #define NRF_DRV_SPI_INSTANCE_2 \ - { 2, { .spim = NRFX_SPIM_INSTANCE(2) }, true } -#elif NRFX_CHECK(NRFX_SPI2_ENABLED) - #define NRF_DRV_SPI_INSTANCE_2 \ - { 2, { .spi = NRFX_SPI_INSTANCE(2) }, false } -#endif - -/** - * @brief This value can be provided instead of a pin number for signals MOSI, - * MISO, and Slave Select to specify that the given signal is not used and - * therefore does not need to be connected to a pin. - */ -#define NRF_DRV_SPI_PIN_NOT_USED 0xFF - -/** - * @brief SPI data rates. - */ -typedef enum -{ - NRF_DRV_SPI_FREQ_125K = NRF_SPI_FREQ_125K, ///< 125 kbps. - NRF_DRV_SPI_FREQ_250K = NRF_SPI_FREQ_250K, ///< 250 kbps. - NRF_DRV_SPI_FREQ_500K = NRF_SPI_FREQ_500K, ///< 500 kbps. - NRF_DRV_SPI_FREQ_1M = NRF_SPI_FREQ_1M, ///< 1 Mbps. - NRF_DRV_SPI_FREQ_2M = NRF_SPI_FREQ_2M, ///< 2 Mbps. - NRF_DRV_SPI_FREQ_4M = NRF_SPI_FREQ_4M, ///< 4 Mbps. - NRF_DRV_SPI_FREQ_8M = NRF_SPI_FREQ_8M ///< 8 Mbps. -} nrf_drv_spi_frequency_t; - -/** - * @brief SPI modes. - */ -typedef enum -{ - NRF_DRV_SPI_MODE_0 = NRF_SPI_MODE_0, ///< SCK active high, sample on leading edge of clock. - NRF_DRV_SPI_MODE_1 = NRF_SPI_MODE_1, ///< SCK active high, sample on trailing edge of clock. - NRF_DRV_SPI_MODE_2 = NRF_SPI_MODE_2, ///< SCK active low, sample on leading edge of clock. - NRF_DRV_SPI_MODE_3 = NRF_SPI_MODE_3 ///< SCK active low, sample on trailing edge of clock. -} nrf_drv_spi_mode_t; - -/** - * @brief SPI bit orders. - */ -typedef enum -{ - NRF_DRV_SPI_BIT_ORDER_MSB_FIRST = NRF_SPI_BIT_ORDER_MSB_FIRST, ///< Most significant bit shifted out first. - NRF_DRV_SPI_BIT_ORDER_LSB_FIRST = NRF_SPI_BIT_ORDER_LSB_FIRST ///< Least significant bit shifted out first. -} nrf_drv_spi_bit_order_t; - -/** - * @brief SPI master driver instance configuration structure. - */ -typedef struct -{ - uint8_t sck_pin; ///< SCK pin number. - uint8_t mosi_pin; ///< MOSI pin number (optional). - /**< Set to @ref NRF_DRV_SPI_PIN_NOT_USED - * if this signal is not needed. */ - uint8_t miso_pin; ///< MISO pin number (optional). - /**< Set to @ref NRF_DRV_SPI_PIN_NOT_USED - * if this signal is not needed. */ - uint8_t ss_pin; ///< Slave Select pin number (optional). - /**< Set to @ref NRF_DRV_SPI_PIN_NOT_USED - * if this signal is not needed. The driver - * supports only active low for this signal. - * If the signal should be active high, - * it must be controlled externally. */ - uint8_t irq_priority; ///< Interrupt priority. - uint8_t orc; ///< Over-run character. - /**< This character is used when all bytes from the TX buffer are sent, - but the transfer continues due to RX. */ - nrf_drv_spi_frequency_t frequency; ///< SPI frequency. - nrf_drv_spi_mode_t mode; ///< SPI mode. - nrf_drv_spi_bit_order_t bit_order; ///< SPI bit order. -} nrf_drv_spi_config_t; - -/** - * @brief SPI master instance default configuration. - */ -#define NRF_DRV_SPI_DEFAULT_CONFIG \ -{ \ - .sck_pin = NRF_DRV_SPI_PIN_NOT_USED, \ - .mosi_pin = NRF_DRV_SPI_PIN_NOT_USED, \ - .miso_pin = NRF_DRV_SPI_PIN_NOT_USED, \ - .ss_pin = NRF_DRV_SPI_PIN_NOT_USED, \ - .irq_priority = SPI_DEFAULT_CONFIG_IRQ_PRIORITY, \ - .orc = 0xFF, \ - .frequency = NRF_DRV_SPI_FREQ_4M, \ - .mode = NRF_DRV_SPI_MODE_0, \ - .bit_order = NRF_DRV_SPI_BIT_ORDER_MSB_FIRST, \ -} - -#define NRF_DRV_SPI_FLAG_TX_POSTINC (1UL << 0) /**< TX buffer address incremented after transfer. */ -#define NRF_DRV_SPI_FLAG_RX_POSTINC (1UL << 1) /**< RX buffer address incremented after transfer. */ -#define NRF_DRV_SPI_FLAG_NO_XFER_EVT_HANDLER (1UL << 2) /**< Interrupt after each transfer is suppressed, and the event handler is not called. */ -#define NRF_DRV_SPI_FLAG_HOLD_XFER (1UL << 3) /**< Set up the transfer but do not start it. */ -#define NRF_DRV_SPI_FLAG_REPEATED_XFER (1UL << 4) /**< Flag indicating that the transfer will be executed multiple times. */ - -/** - * @brief Single transfer descriptor structure. - */ -typedef struct -{ - uint8_t const * p_tx_buffer; ///< Pointer to TX buffer. - uint8_t tx_length; ///< TX buffer length. - uint8_t * p_rx_buffer; ///< Pointer to RX buffer. - uint8_t rx_length; ///< RX buffer length. -}nrf_drv_spi_xfer_desc_t; - -/** - * @brief Macro for setting up single transfer descriptor. - * - * This macro is for internal use only. - */ -#define NRF_DRV_SPI_SINGLE_XFER(p_tx, tx_len, p_rx, rx_len) \ - { \ - .p_tx_buffer = (uint8_t const *)(p_tx), \ - .tx_length = (tx_len), \ - .p_rx_buffer = (p_rx), \ - .rx_length = (rx_len), \ - } - -/** - * @brief Macro for setting duplex TX RX transfer. - */ -#define NRF_DRV_SPI_XFER_TRX(p_tx_buf, tx_length, p_rx_buf, rx_length) \ - NRF_DRV_SPI_SINGLE_XFER(p_tx_buf, tx_length, p_rx_buf, rx_length) - -/** - * @brief Macro for setting TX transfer. - */ -#define NRF_DRV_SPI_XFER_TX(p_buf, length) \ - NRF_DRV_SPI_SINGLE_XFER(p_buf, length, NULL, 0) - -/** - * @brief Macro for setting RX transfer. - */ -#define NRF_DRV_SPI_XFER_RX(p_buf, length) \ - NRF_DRV_SPI_SINGLE_XFER(NULL, 0, p_buf, length) - -/** - * @brief SPI master driver event types, passed to the handler routine provided - * during initialization. - */ -typedef enum -{ - NRF_DRV_SPI_EVENT_DONE, ///< Transfer done. -} nrf_drv_spi_evt_type_t; - -typedef struct -{ - nrf_drv_spi_evt_type_t type; ///< Event type. - union - { - nrf_drv_spi_xfer_desc_t done; ///< Event data for DONE event. - } data; -} nrf_drv_spi_evt_t; - -/** - * @brief SPI master driver event handler type. - */ -typedef void (* nrf_drv_spi_evt_handler_t)(nrf_drv_spi_evt_t const * p_event, - void * p_context); - - -/** - * @brief Function for initializing the SPI master driver instance. - * - * This function configures and enables the specified peripheral. - * - * @note MISO pin has pull down enabled. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] p_config Pointer to the structure with the initial configuration. - * - * @param handler Event handler provided by the user. If NULL, transfers - * will be performed in blocking mode. - * @param p_context Context passed to event handler. - * - * @retval NRF_SUCCESS If initialization was successful. - * @retval NRF_ERROR_INVALID_STATE If the driver was already initialized. - * @retval NRF_ERROR_BUSY If some other peripheral with the same - * instance ID is already in use. This is - * possible only if PERIPHERAL_RESOURCE_SHARING_ENABLED - * is set to a value other than zero. - */ -ret_code_t nrf_drv_spi_init(nrf_drv_spi_t const * const p_instance, - nrf_drv_spi_config_t const * p_config, - nrf_drv_spi_evt_handler_t handler, - void * p_context); - -/** - * @brief Function for uninitializing the SPI master driver instance. - * - * @note Configuration of pins is kept. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -__STATIC_INLINE -void nrf_drv_spi_uninit(nrf_drv_spi_t const * const p_instance); - -/** - * @brief Function for starting the SPI data transfer. - * - * If an event handler was provided in the @ref nrf_drv_spi_init call, this function - * returns immediately and the handler is called when the transfer is done. - * Otherwise, the transfer is performed in blocking mode, which means that this function - * returns when the transfer is finished. - * - * @note Peripherals using EasyDMA (for example, SPIM) require the transfer buffers - * to be placed in the Data RAM region. If they are not and an SPIM instance is - * used, this function will fail with the error code NRF_ERROR_INVALID_ADDR. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] p_tx_buffer Pointer to the transmit buffer. Can be NULL - * if there is nothing to send. - * @param tx_buffer_length Length of the transmit buffer. - * @param[in] p_rx_buffer Pointer to the receive buffer. Can be NULL - * if there is nothing to receive. - * @param rx_buffer_length Length of the receive buffer. - * - * @retval NRF_SUCCESS If the operation was successful. - * @retval NRF_ERROR_BUSY If a previously started transfer has not finished - * yet. - * @retval NRF_ERROR_INVALID_ADDR If the provided buffers are not placed in the Data - * RAM region. - */ -__STATIC_INLINE -ret_code_t nrf_drv_spi_transfer(nrf_drv_spi_t const * const p_instance, - uint8_t const * p_tx_buffer, - uint8_t tx_buffer_length, - uint8_t * p_rx_buffer, - uint8_t rx_buffer_length); - -/** - * @brief Function for starting the SPI data transfer with additional option flags. - * - * Function enables customizing the transfer by using option flags. - * - * Additional options are provided using the flags parameter: - * - * - @ref NRF_DRV_SPI_FLAG_TX_POSTINC and @ref NRF_DRV_SPI_FLAG_RX_POSTINC: - * Post-incrementation of buffer addresses. Supported only by SPIM. - * - @ref NRF_DRV_SPI_FLAG_HOLD_XFER: Driver is not starting the transfer. Use this - * flag if the transfer is triggered externally by PPI. Supported only by SPIM. Use - * @ref nrf_drv_spi_start_task_get to get the address of the start task. - * - @ref NRF_DRV_SPI_FLAG_NO_XFER_EVT_HANDLER: No user event handler after transfer - * completion. This also means no interrupt at the end of the transfer. Supported only by SPIM. - * If @ref NRF_DRV_SPI_FLAG_NO_XFER_EVT_HANDLER is used, the driver does not set the instance into - * busy state, so you must ensure that the next transfers are set up when SPIM is not active. - * @ref nrf_drv_spi_end_event_get function can be used to detect end of transfer. Option can be used - * together with @ref NRF_DRV_SPI_FLAG_REPEATED_XFER to prepare a sequence of SPI transfers - * without interruptions. - * - @ref NRF_DRV_SPI_FLAG_REPEATED_XFER: Prepare for repeated transfers. You can set - * up a number of transfers that will be triggered externally (for example by PPI). An example is - * a TXRX transfer with the options @ref NRF_DRV_SPI_FLAG_RX_POSTINC, - * @ref NRF_DRV_SPI_FLAG_NO_XFER_EVT_HANDLER, and @ref NRF_DRV_SPI_FLAG_REPEATED_XFER. After the - * transfer is set up, a set of transfers can be triggered by PPI that will read, for example, - * the same register of an external component and put it into a RAM buffer without any interrupts. - * @ref nrf_drv_spi_end_event_get can be used to get the address of the END event, which can be - * used to count the number of transfers. If @ref NRF_DRV_SPI_FLAG_REPEATED_XFER is used, - * the driver does not set the instance into busy state, so you must ensure that the next - * transfers are set up when SPIM is not active. Supported only by SPIM. - * @note Function is intended to be used only in non-blocking mode. - * - * @param p_instance Pointer to the driver instance structure. - * @param p_xfer_desc Pointer to the transfer descriptor. - * @param flags Transfer options (0 for default settings). - * - * @retval NRF_SUCCESS If the procedure was successful. - * @retval NRF_ERROR_BUSY If the driver is not ready for a new transfer. - * @retval NRF_ERROR_NOT_SUPPORTED If the provided parameters are not supported. - * @retval NRF_ERROR_INVALID_ADDR If the provided buffers are not placed in the Data - * RAM region. - */ -__STATIC_INLINE -ret_code_t nrf_drv_spi_xfer(nrf_drv_spi_t const * const p_instance, - nrf_drv_spi_xfer_desc_t const * p_xfer_desc, - uint32_t flags); - -/** - * @brief Function for returning the address of a SPIM start task. - * - * This function should be used if @ref nrf_drv_spi_xfer was called with the flag @ref NRF_DRV_SPI_FLAG_HOLD_XFER. - * In that case, the transfer is not started by the driver, but it must be started externally by PPI. - * - * @param[in] p_instance Pointer to the driver instance structure. - * - * @return Start task address. - */ -__STATIC_INLINE -uint32_t nrf_drv_spi_start_task_get(nrf_drv_spi_t const * p_instance); - -/** - * @brief Function for returning the address of a END SPIM event. - * - * A END event can be used to detect the end of a transfer if the @ref NRF_DRV_SPI_FLAG_NO_XFER_EVT_HANDLER - * option is used. - * - * @param[in] p_instance Pointer to the driver instance structure. - * - * @return END event address. - */ -__STATIC_INLINE -uint32_t nrf_drv_spi_end_event_get(nrf_drv_spi_t const * p_instance); - -/** - * @brief Function for aborting ongoing transfer. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -__STATIC_INLINE -void nrf_drv_spi_abort(nrf_drv_spi_t const * p_instance); - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -#if defined(SPI_PRESENT) && !defined(SPIM_PRESENT) -#define NRF_DRV_SPI_WITH_SPI -#elif !defined(SPI_PRESENT) && defined(SPIM_PRESENT) -#define NRF_DRV_SPI_WITH_SPIM -#else -#if (NRFX_CHECK(SPI0_ENABLED) && NRFX_CHECK(SPI0_USE_EASY_DMA)) || \ - (NRFX_CHECK(SPI1_ENABLED) && NRFX_CHECK(SPI1_USE_EASY_DMA)) || \ - (NRFX_CHECK(SPI2_ENABLED) && NRFX_CHECK(SPI2_USE_EASY_DMA)) - #define NRF_DRV_SPI_WITH_SPIM -#endif -#if (NRFX_CHECK(SPI0_ENABLED) && !NRFX_CHECK(SPI0_USE_EASY_DMA)) || \ - (NRFX_CHECK(SPI1_ENABLED) && !NRFX_CHECK(SPI1_USE_EASY_DMA)) || \ - (NRFX_CHECK(SPI2_ENABLED) && !NRFX_CHECK(SPI2_USE_EASY_DMA)) - #define NRF_DRV_SPI_WITH_SPI -#endif -#endif -#if defined(NRF_DRV_SPI_WITH_SPIM) && defined(NRF_DRV_SPI_WITH_SPI) - #define NRF_DRV_SPI_USE_SPIM (p_instance->use_easy_dma) -#elif defined(NRF_DRV_SPI_WITH_SPIM) - #define NRF_DRV_SPI_USE_SPIM true -#else - #define NRF_DRV_SPI_USE_SPIM false -#endif -#define NRF_DRV_SPI_USE_SPI (!NRF_DRV_SPI_USE_SPIM) - -__STATIC_INLINE -void nrf_drv_spi_uninit(nrf_drv_spi_t const * p_instance) -{ - if (NRF_DRV_SPI_USE_SPIM) - { - nrfx_spim_uninit(&p_instance->u.spim); - } - else if (NRF_DRV_SPI_USE_SPI) - { - nrfx_spi_uninit(&p_instance->u.spi); - } -} - -__STATIC_INLINE -ret_code_t nrf_drv_spi_transfer(nrf_drv_spi_t const * const p_instance, - uint8_t const * p_tx_buffer, - uint8_t tx_buffer_length, - uint8_t * p_rx_buffer, - uint8_t rx_buffer_length) -{ - ret_code_t result = 0; - if (NRF_DRV_SPI_USE_SPIM) - { - #ifdef SPIM_PRESENT - nrfx_spim_xfer_desc_t const spim_xfer_desc = - { - .p_tx_buffer = p_tx_buffer, - .tx_length = tx_buffer_length, - .p_rx_buffer = p_rx_buffer, - .rx_length = rx_buffer_length, - }; - result = nrfx_spim_xfer(&p_instance->u.spim, &spim_xfer_desc, 0); - #endif - } - else if (NRF_DRV_SPI_USE_SPI) - { - #ifdef SPI_PRESENT - nrfx_spi_xfer_desc_t const spi_xfer_desc = - { - .p_tx_buffer = p_tx_buffer, - .tx_length = tx_buffer_length, - .p_rx_buffer = p_rx_buffer, - .rx_length = rx_buffer_length, - }; - result = nrfx_spi_xfer(&p_instance->u.spi, &spi_xfer_desc, 0); - #endif - } - return result; -} - -__STATIC_INLINE -ret_code_t nrf_drv_spi_xfer(nrf_drv_spi_t const * const p_instance, - nrf_drv_spi_xfer_desc_t const * p_xfer_desc, - uint32_t flags) -{ - ret_code_t result = 0; - if (NRF_DRV_SPI_USE_SPIM) - { - #ifdef SPIM_PRESENT - nrfx_spim_xfer_desc_t const spim_xfer_desc = - { - .p_tx_buffer = p_xfer_desc->p_tx_buffer, - .tx_length = p_xfer_desc->tx_length, - .p_rx_buffer = p_xfer_desc->p_rx_buffer, - .rx_length = p_xfer_desc->rx_length, - }; - result = nrfx_spim_xfer(&p_instance->u.spim, &spim_xfer_desc, flags); - #endif - } - else if (NRF_DRV_SPI_USE_SPI) - { - #ifdef SPI_PRESENT - nrfx_spi_xfer_desc_t const spi_xfer_desc = - { - .p_tx_buffer = p_xfer_desc->p_tx_buffer, - .tx_length = p_xfer_desc->tx_length, - .p_rx_buffer = p_xfer_desc->p_rx_buffer, - .rx_length = p_xfer_desc->rx_length, - }; - result = nrfx_spi_xfer(&p_instance->u.spi, &spi_xfer_desc, flags); - #endif - } - return result; -} - -__STATIC_INLINE -uint32_t nrf_drv_spi_start_task_get(nrf_drv_spi_t const * p_instance) -{ - uint32_t result = 0; - if (NRF_DRV_SPI_USE_SPIM) - { - result = nrfx_spim_start_task_get(&p_instance->u.spim); - } - else if (NRF_DRV_SPI_USE_SPI) - { - NRFX_ASSERT(false); // not supported - result = 0; - } - return result; -} - -__STATIC_INLINE -uint32_t nrf_drv_spi_end_event_get(nrf_drv_spi_t const * p_instance) -{ - uint32_t result = 0; - if (NRF_DRV_SPI_USE_SPIM) - { - result = nrfx_spim_end_event_get(&p_instance->u.spim); - } - else if (NRF_DRV_SPI_USE_SPI) - { - NRFX_ASSERT(false); // not supported - result = 0; - } - return result; -} - -__STATIC_INLINE -void nrf_drv_spi_abort(nrf_drv_spi_t const * p_instance) -{ - if (NRF_DRV_SPI_USE_SPIM) - { - nrfx_spim_abort(&p_instance->u.spim); - } - else if (NRF_DRV_SPI_USE_SPI) - { - nrfx_spi_abort(&p_instance->u.spi); - } -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif // NRF_DRV_SPI_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_twi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_twi.h deleted file mode 100644 index b0a2cd89466..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_twi.h +++ /dev/null @@ -1,708 +0,0 @@ -/** - * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef NRF_DRV_TWI_H__ -#define NRF_DRV_TWI_H__ - -#include - -// needed for Mbed -#ifdef TWI0_ENABLED -#define TWI0_INCR TWI0_ENABLED -#else -#define TWI0_INCR 0 -#endif - -#ifdef TWI1_ENABLED -#define TWI1_INCR TWI1_ENABLED -#else -#define TWI1_INCR 0 -#endif - -#define ENABLED_TWI_COUNT (TWI0_INCR + TWI1_INCR) -// end needed for Mbed - -#ifdef TWIM_PRESENT - #include -#else - // Compilers (at least the smart ones) will remove the TWIM related code - // (blocks starting with "if (NRF_DRV_TWI_USE_TWIM)") when it is not used, - // but to perform the compilation they need the following definitions. - #define nrfx_twim_init(...) 0 - #define nrfx_twim_uninit(...) - #define nrfx_twim_enable(...) - #define nrfx_twim_disable(...) - #define nrfx_twim_tx(...) 0 - #define nrfx_twim_rx(...) 0 - #define nrfx_twim_is_busy(...) 0 - #define nrfx_twim_start_task_get(...) 0 - #define nrfx_twim_stopped_event_get(...) 0 -#endif - -#ifdef TWI_PRESENT - #include -#else - // Compilers (at least the smart ones) will remove the TWI related code - // (blocks starting with "if (NRF_DRV_TWI_USE_TWI)") when it is not used, - // but to perform the compilation they need the following definitions. - #define nrfx_twi_init(...) 0 - #define nrfx_twi_uninit(...) - #define nrfx_twi_enable(...) - #define nrfx_twi_disable(...) - #define nrfx_twi_tx(...) 0 - #define nrfx_twi_rx(...) 0 - #define nrfx_twi_is_busy(...) 0 - #define nrfx_twi_data_count_get(...) 0 - #define nrfx_twi_stopped_event_get(...) 0 - - // This part is for old modules that use directly TWI HAL definitions - // (to make them compilable for chips that have only TWIM). - #define NRF_TWI_ERROR_ADDRESS_NACK NRF_TWIM_ERROR_ADDRESS_NACK - #define NRF_TWI_ERROR_DATA_NACK NRF_TWIM_ERROR_DATA_NACK - #define NRF_TWI_FREQ_100K NRF_TWIM_FREQ_100K - #define NRF_TWI_FREQ_250K NRF_TWIM_FREQ_250K - #define NRF_TWI_FREQ_400K NRF_TWIM_FREQ_400K -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup nrf_drv_twi TWI driver - legacy layer - * @{ - * @ingroup nrf_twi - * @brief Layer providing compatibility with the former API. - */ - -/** - * @brief Structure for the TWI master driver instance. - */ -typedef struct -{ - uint8_t inst_idx; - union - { -#ifdef TWIM_PRESENT - nrfx_twim_t twim; -#endif -#ifdef TWI_PRESENT - nrfx_twi_t twi; -#endif - } u; - bool use_easy_dma; -} nrf_drv_twi_t; - - -/** - * @brief Macro for creating a TWI master driver instance. - */ -// Mbed - need these -//#define NRF_TWIM0_ENABLED 1 -//#define NRF_TWIM1_ENABLED 1 - -#define NRF_DRV_TWI_INSTANCE(id) NRF_DRV_TWI_INSTANCE_(id) -#define NRF_DRV_TWI_INSTANCE_(id) NRF_DRV_TWI_INSTANCE_ ## id -#if NRFX_CHECK(NRFX_TWIM0_ENABLED) - #define NRF_DRV_TWI_INSTANCE_0 \ - { 0, { .twim = NRFX_TWIM_INSTANCE(0) }, true } -#elif NRFX_CHECK(NRFX_TWI0_ENABLED) - #define NRF_DRV_TWI_INSTANCE_0 \ - { 0, { .twi = NRFX_TWI_INSTANCE(0) }, false } -#endif -#if NRFX_CHECK(NRFX_TWIM1_ENABLED) - #define NRF_DRV_TWI_INSTANCE_1 \ - { 1, { .twim = NRFX_TWIM_INSTANCE(1) }, true } -#elif NRFX_CHECK(NRFX_TWI1_ENABLED) - #define NRF_DRV_TWI_INSTANCE_1 \ - { 1, { .twi = NRFX_TWI_INSTANCE(1) }, false } -#endif - -/** - * @brief TWI master clock frequency. - */ -typedef enum -{ - NRF_DRV_TWI_FREQ_100K = NRF_TWI_FREQ_100K , ///< 100 kbps. - NRF_DRV_TWI_FREQ_250K = NRF_TWI_FREQ_250K , ///< 250 kbps. - NRF_DRV_TWI_FREQ_400K = NRF_TWI_FREQ_400K ///< 400 kbps. -} nrf_drv_twi_frequency_t; - -/** - * @brief Structure for the TWI master driver instance configuration. - */ -typedef struct -{ - uint32_t scl; ///< SCL pin number. - uint32_t sda; ///< SDA pin number. - nrf_drv_twi_frequency_t frequency; ///< TWI frequency. - uint8_t interrupt_priority; ///< Interrupt priority. - bool clear_bus_init; ///< Clear bus during init. - bool hold_bus_uninit; ///< Hold pull up state on gpio pins after uninit. -} nrf_drv_twi_config_t; - -/** - * @brief TWI master driver instance default configuration. - */ -#define NRF_DRV_TWI_DEFAULT_CONFIG \ -{ \ - .frequency = (nrf_drv_twi_frequency_t)TWI_DEFAULT_CONFIG_FREQUENCY, \ - .scl = 31, \ - .sda = 31, \ - .interrupt_priority = TWI_DEFAULT_CONFIG_IRQ_PRIORITY, \ - .clear_bus_init = TWI_DEFAULT_CONFIG_CLR_BUS_INIT, \ - .hold_bus_uninit = TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT, \ -} - -#define NRF_DRV_TWI_FLAG_TX_POSTINC (1UL << 0) /**< TX buffer address incremented after transfer. */ -#define NRF_DRV_TWI_FLAG_RX_POSTINC (1UL << 1) /**< RX buffer address incremented after transfer. */ -#define NRF_DRV_TWI_FLAG_NO_XFER_EVT_HANDLER (1UL << 2) /**< Interrupt after each transfer is suppressed, and the event handler is not called. */ -#define NRF_DRV_TWI_FLAG_HOLD_XFER (1UL << 3) /**< Set up the transfer but do not start it. */ -#define NRF_DRV_TWI_FLAG_REPEATED_XFER (1UL << 4) /**< Flag indicating that the transfer will be executed multiple times. */ -#define NRF_DRV_TWI_FLAG_TX_NO_STOP (1UL << 5) /**< Flag indicating that the TX transfer will not end with a stop condition. */ - -/** - * @brief TWI master driver event types. - */ -typedef enum -{ - NRF_DRV_TWI_EVT_DONE, ///< Transfer completed event. - NRF_DRV_TWI_EVT_ADDRESS_NACK, ///< Error event: NACK received after sending the address. - NRF_DRV_TWI_EVT_DATA_NACK ///< Error event: NACK received after sending a data byte. -} nrf_drv_twi_evt_type_t; - -/** - * @brief TWI master driver transfer types. - */ -typedef enum -{ - NRF_DRV_TWI_XFER_TX, ///< TX transfer. - NRF_DRV_TWI_XFER_RX, ///< RX transfer. - NRF_DRV_TWI_XFER_TXRX, ///< TX transfer followed by RX transfer with repeated start. - NRF_DRV_TWI_XFER_TXTX ///< TX transfer followed by TX transfer with repeated start. -} nrf_drv_twi_xfer_type_t; - -/** - * @brief Structure for a TWI transfer descriptor. - */ -typedef struct -{ - nrf_drv_twi_xfer_type_t type; ///< Type of transfer. - uint8_t address; ///< Slave address. - uint8_t primary_length; ///< Number of bytes transferred. - uint8_t secondary_length; ///< Number of bytes transferred. - uint8_t * p_primary_buf; ///< Pointer to transferred data. - uint8_t * p_secondary_buf; ///< Pointer to transferred data. -} nrf_drv_twi_xfer_desc_t; - - -/**@brief Macro for setting the TX transfer descriptor. */ -#define NRF_DRV_TWI_XFER_DESC_TX(addr, p_data, length) \ - { \ - .type = NRF_DRV_TWI_XFER_TX, \ - .address = addr, \ - .primary_length = length, \ - .p_primary_buf = p_data, \ - } - -/**@brief Macro for setting the RX transfer descriptor. */ -#define NRF_DRV_TWI_XFER_DESC_RX(addr, p_data, length) \ - { \ - .type = NRF_DRV_TWI_XFER_RX, \ - .address = addr, \ - .primary_length = length, \ - .p_primary_buf = p_data, \ - } - -/**@brief Macro for setting the TXRX transfer descriptor. */ -#define NRF_DRV_TWI_XFER_DESC_TXRX(addr, p_tx, tx_len, p_rx, rx_len) \ - { \ - .type = NRF_DRV_TWI_XFER_TXRX, \ - .address = addr, \ - .primary_length = tx_len, \ - .secondary_length = rx_len, \ - .p_primary_buf = p_tx, \ - .p_secondary_buf = p_rx, \ - } - -/**@brief Macro for setting the TXTX transfer descriptor. */ -#define NRF_DRV_TWI_XFER_DESC_TXTX(addr, p_tx, tx_len, p_tx2, tx_len2) \ - { \ - .type = NRF_DRV_TWI_XFER_TXTX, \ - .address = addr, \ - .primary_length = tx_len, \ - .secondary_length = tx_len2, \ - .p_primary_buf = p_tx, \ - .p_secondary_buf = p_tx2, \ - } - -/** - * @brief Structure for a TWI event. - */ -typedef struct -{ - nrf_drv_twi_evt_type_t type; ///< Event type. - nrf_drv_twi_xfer_desc_t xfer_desc; ///< Transfer details. -} nrf_drv_twi_evt_t; - -/** - * @brief TWI event handler prototype. - */ -typedef void (* nrf_drv_twi_evt_handler_t)(nrf_drv_twi_evt_t const * p_event, - void * p_context); - -/** - * @brief Function for initializing the TWI driver instance. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] p_config Initial configuration. - * @param[in] event_handler Event handler provided by the user. If NULL, blocking mode is enabled. - * @param[in] p_context Context passed to event handler. - * - * @retval NRF_SUCCESS If initialization was successful. - * @retval NRF_ERROR_INVALID_STATE If the driver is in invalid state. - * @retval NRF_ERROR_BUSY If some other peripheral with the same - * instance ID is already in use. This is - * possible only if PERIPHERAL_RESOURCE_SHARING_ENABLED - * is set to a value other than zero. - */ -ret_code_t nrf_drv_twi_init(nrf_drv_twi_t const * p_instance, - nrf_drv_twi_config_t const * p_config, - nrf_drv_twi_evt_handler_t event_handler, - void * p_context); - -/** - * @brief Function for uninitializing the TWI instance. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -__STATIC_INLINE -void nrf_drv_twi_uninit(nrf_drv_twi_t const * p_instance); - -/** - * @brief Function for enabling the TWI instance. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -__STATIC_INLINE -void nrf_drv_twi_enable(nrf_drv_twi_t const * p_instance); - -/** - * @brief Function for disabling the TWI instance. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -__STATIC_INLINE -void nrf_drv_twi_disable(nrf_drv_twi_t const * p_instance); - -/** - * @brief Function for sending data to a TWI slave. - * - * The transmission will be stopped when an error occurs. If a transfer is ongoing, - * the function returns the error code @ref NRF_ERROR_BUSY. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] address Address of a specific slave device (only 7 LSB). - * @param[in] p_data Pointer to a transmit buffer. - * @param[in] length Number of bytes to send. - * @param[in] no_stop If set, the stop condition is not generated on the bus - * after the transfer has completed successfully (allowing - * for a repeated start in the next transfer). - * - * @retval NRF_SUCCESS If the procedure was successful. - * @retval NRF_ERROR_BUSY If the driver is not ready for a new transfer. - * @retval NRF_ERROR_INTERNAL If an error was detected by hardware. - * @retval NRF_ERROR_INVALID_ADDR If the EasyDMA is used and memory adress in not in RAM. - * @retval NRF_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address in polling mode. - * @retval NRF_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte in polling mode. - */ -__STATIC_INLINE -ret_code_t nrf_drv_twi_tx(nrf_drv_twi_t const * p_instance, - uint8_t address, - uint8_t const * p_data, - uint8_t length, - bool no_stop); - -/** - * @brief Function for reading data from a TWI slave. - * - * The transmission will be stopped when an error occurs. If a transfer is ongoing, - * the function returns the error code @ref NRF_ERROR_BUSY. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] address Address of a specific slave device (only 7 LSB). - * @param[in] p_data Pointer to a receive buffer. - * @param[in] length Number of bytes to be received. - * - * @retval NRF_SUCCESS If the procedure was successful. - * @retval NRF_ERROR_BUSY If the driver is not ready for a new transfer. - * @retval NRF_ERROR_INTERNAL If an error was detected by hardware. - * @retval NRF_ERROR_DRV_TWI_ERR_OVERRUN If the unread data was replaced by new data - * @retval NRF_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address in polling mode. - * @retval NRF_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte in polling mode. - */ -__STATIC_INLINE -ret_code_t nrf_drv_twi_rx(nrf_drv_twi_t const * p_instance, - uint8_t address, - uint8_t * p_data, - uint8_t length); - -/** - * @brief Function for preparing a TWI transfer. - * - * The following transfer types can be configured (@ref nrf_drv_twi_xfer_desc_t::type): - * - @ref NRF_DRV_TWI_XFER_TXRX: Write operation followed by a read operation (without STOP condition in between). - * - @ref NRF_DRV_TWI_XFER_TXTX: Write operation followed by a write operation (without STOP condition in between). - * - @ref NRF_DRV_TWI_XFER_TX: Write operation (with or without STOP condition). - * - @ref NRF_DRV_TWI_XFER_RX: Read operation (with STOP condition). - * - * Additional options are provided using the flags parameter: - * - @ref NRF_DRV_TWI_FLAG_TX_POSTINC and @ref NRF_DRV_TWI_FLAG_RX_POSTINC: Post-incrementation of buffer addresses. Supported only by TWIM. - * - @ref NRF_DRV_TWI_FLAG_NO_XFER_EVT_HANDLER: No user event handler after transfer completion. In most cases, this also means no interrupt at the end of the transfer. - * - @ref NRF_DRV_TWI_FLAG_HOLD_XFER: Driver is not starting the transfer. Use this flag if the transfer is triggered externally by PPI. Supported only by TWIM. - * Use @ref nrf_drv_twi_start_task_get to get the address of the start task. - * - @ref NRF_DRV_TWI_FLAG_REPEATED_XFER: Prepare for repeated transfers. You can set up a number of transfers that will be triggered externally (for example by PPI). - * An example is a TXRX transfer with the options @ref NRF_DRV_TWI_FLAG_RX_POSTINC, @ref NRF_DRV_TWI_FLAG_NO_XFER_EVT_HANDLER, and @ref NRF_DRV_TWI_FLAG_REPEATED_XFER. - * After the transfer is set up, a set of transfers can be triggered by PPI that will read, for example, the same register of an - * external component and put it into a RAM buffer without any interrupts. @ref nrf_drv_twi_stopped_event_get can be used to get the - * address of the STOPPED event, which can be used to count the number of transfers. If @ref NRF_DRV_TWI_FLAG_REPEATED_XFER is used, - * the driver does not set the driver instance into busy state, so you must ensure that the next transfers are set up - * when TWIM is not active. Supported only by TWIM. - * - @ref NRF_DRV_TWI_FLAG_TX_NO_STOP: No stop condition after TX transfer. - * - * @note - * Some flag combinations are invalid: - * - @ref NRF_DRV_TWI_FLAG_TX_NO_STOP with @ref nrf_drv_twi_xfer_desc_t::type different than @ref NRF_DRV_TWI_XFER_TX - * - @ref NRF_DRV_TWI_FLAG_REPEATED_XFER with @ref nrf_drv_twi_xfer_desc_t::type set to @ref NRF_DRV_TWI_XFER_TXTX - * - * If @ref nrf_drv_twi_xfer_desc_t::type is set to @ref NRF_DRV_TWI_XFER_TX and the @ref NRF_DRV_TWI_FLAG_TX_NO_STOP and @ref NRF_DRV_TWI_FLAG_REPEATED_XFER - * flags are set, two tasks must be used to trigger a transfer: TASKS_RESUME followed by TASKS_STARTTX. If no stop condition is generated, - * TWIM is in SUSPENDED state. Therefore, it must be resumed before the transfer can be started. - * - * @note - * This function should be used only if the instance is configured to work in non-blocking mode. If the function is used in blocking mode, the driver asserts. - * @note If you are using this function with TWI, the only supported flag is @ref NRF_DRV_TWI_FLAG_TX_NO_STOP. All other flags require TWIM. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] p_xfer_desc Pointer to the transfer descriptor. - * @param[in] flags Transfer options (0 for default settings). - * - * @retval NRF_SUCCESS If the procedure was successful. - * @retval NRF_ERROR_BUSY If the driver is not ready for a new transfer. - * @retval NRF_ERROR_NOT_SUPPORTED If the provided parameters are not supported. - * @retval NRF_ERROR_INTERNAL If an error was detected by hardware. - * @retval NRF_ERROR_INVALID_ADDR If the EasyDMA is used and memory adress in not in RAM - * @retval NRF_ERROR_DRV_TWI_ERR_OVERRUN If the unread data was replaced by new data (TXRX and RX) - * @retval NRF_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address. - * @retval NRF_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte. - */ -__STATIC_INLINE -ret_code_t nrf_drv_twi_xfer(nrf_drv_twi_t const * p_instance, - nrf_drv_twi_xfer_desc_t const * p_xfer_desc, - uint32_t flags); - -/** - * @brief Function for checking the TWI driver state. - * - * @param[in] p_instance TWI instance. - * - * @retval true If the TWI driver is currently busy performing a transfer. - * @retval false If the TWI driver is ready for a new transfer. - */ -__STATIC_INLINE -bool nrf_drv_twi_is_busy(nrf_drv_twi_t const * p_instance); - -/** - * @brief Function for getting the transferred data count. - * - * This function provides valid results only in legacy mode. - * - * @param[in] p_instance Pointer to the driver instance structure. - * - * @return Data count. - */ -__STATIC_INLINE -uint32_t nrf_drv_twi_data_count_get(nrf_drv_twi_t const * const p_instance); - -/** - * @brief Function for returning the address of a TWI/TWIM start task. - * - * This function should be used if @ref nrf_drv_twi_xfer was called with the flag @ref NRF_DRV_TWI_FLAG_HOLD_XFER. - * In that case, the transfer is not started by the driver, but it must be started externally by PPI. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] xfer_type Transfer type used in the last call of the @ref nrf_drv_twi_xfer function. - * - * @return Start task address (TX or RX) depending on the value of xfer_type. - */ -__STATIC_INLINE -uint32_t nrf_drv_twi_start_task_get(nrf_drv_twi_t const * p_instance, nrf_drv_twi_xfer_type_t xfer_type); - -/** - * @brief Function for returning the address of a STOPPED TWI/TWIM event. - * - * A STOPPED event can be used to detect the end of a transfer if the @ref NRF_DRV_TWI_FLAG_NO_XFER_EVT_HANDLER - * option is used. - * - * @param[in] p_instance Pointer to the driver instance structure. - * - * @return STOPPED event address. - */ -__STATIC_INLINE -uint32_t nrf_drv_twi_stopped_event_get(nrf_drv_twi_t const * p_instance); - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -#if defined(TWI_PRESENT) && !defined(TWIM_PRESENT) -#define NRF_DRV_TWI_WITH_TWI -#elif !defined(TWI_PRESENT) && defined(TWIM_PRESENT) -#define NRF_DRV_TWI_WITH_TWIM -#else -#if (NRFX_CHECK(TWI0_ENABLED) && NRFX_CHECK(TWI0_USE_EASY_DMA)) || \ - (NRFX_CHECK(TWI1_ENABLED) && NRFX_CHECK(TWI1_USE_EASY_DMA)) - #define NRF_DRV_TWI_WITH_TWIM -#endif -#if (NRFX_CHECK(TWI0_ENABLED) && !NRFX_CHECK(TWI0_USE_EASY_DMA)) || \ - (NRFX_CHECK(TWI1_ENABLED) && !NRFX_CHECK(TWI1_USE_EASY_DMA)) - #define NRF_DRV_TWI_WITH_TWI -#endif -#endif -#if defined(NRF_DRV_TWI_WITH_TWIM) && defined(NRF_DRV_TWI_WITH_TWI) - #define NRF_DRV_TWI_USE_TWIM (p_instance->use_easy_dma) -#elif defined(NRF_DRV_TWI_WITH_TWIM) - #define NRF_DRV_TWI_USE_TWIM true -#else - #define NRF_DRV_TWI_USE_TWIM false -#endif -#define NRF_DRV_TWI_USE_TWI (!NRF_DRV_TWI_USE_TWIM) - -__STATIC_INLINE -void nrf_drv_twi_uninit(nrf_drv_twi_t const * p_instance) -{ - if (NRF_DRV_TWI_USE_TWIM) - { - nrfx_twim_uninit(&p_instance->u.twim); - } - else if (NRF_DRV_TWI_USE_TWI) - { - nrfx_twi_uninit(&p_instance->u.twi); - } -} - -__STATIC_INLINE -void nrf_drv_twi_enable(nrf_drv_twi_t const * p_instance) -{ - if (NRF_DRV_TWI_USE_TWIM) - { - nrfx_twim_enable(&p_instance->u.twim); - } - else if (NRF_DRV_TWI_USE_TWI) - { - nrfx_twi_enable(&p_instance->u.twi); - } -} - -__STATIC_INLINE -void nrf_drv_twi_disable(nrf_drv_twi_t const * p_instance) -{ - if (NRF_DRV_TWI_USE_TWIM) - { - nrfx_twim_disable(&p_instance->u.twim); - } - else if (NRF_DRV_TWI_USE_TWI) - { - nrfx_twi_disable(&p_instance->u.twi); - } -} - -__STATIC_INLINE -ret_code_t nrf_drv_twi_tx(nrf_drv_twi_t const * p_instance, - uint8_t address, - uint8_t const * p_data, - uint8_t length, - bool no_stop) -{ - ret_code_t result = 0; - if (NRF_DRV_TWI_USE_TWIM) - { - result = nrfx_twim_tx(&p_instance->u.twim, - address, p_data, length, no_stop); - } - else if (NRF_DRV_TWI_USE_TWI) - { - result = nrfx_twi_tx(&p_instance->u.twi, - address, p_data, length, no_stop); - } - return result; -} - -__STATIC_INLINE -ret_code_t nrf_drv_twi_rx(nrf_drv_twi_t const * p_instance, - uint8_t address, - uint8_t * p_data, - uint8_t length) -{ - ret_code_t result = 0; - if (NRF_DRV_TWI_USE_TWIM) - { - result = nrfx_twim_rx(&p_instance->u.twim, - address, p_data, length); - } - else if (NRF_DRV_TWI_USE_TWI) - { - result = nrfx_twi_rx(&p_instance->u.twi, - address, p_data, length); - } - return result; -} - -__STATIC_INLINE -ret_code_t nrf_drv_twi_xfer(nrf_drv_twi_t const * p_instance, - nrf_drv_twi_xfer_desc_t const * p_xfer_desc, - uint32_t flags) -{ - ret_code_t result = 0; - if (NRF_DRV_TWI_USE_TWIM) - { - #ifdef TWIM_PRESENT - nrfx_twim_xfer_desc_t const twim_xfer_desc = - { - .type = (nrfx_twim_xfer_type_t)p_xfer_desc->type, - .address = p_xfer_desc->address, - .primary_length = p_xfer_desc->primary_length, - .secondary_length = p_xfer_desc->secondary_length, - .p_primary_buf = p_xfer_desc->p_primary_buf, - .p_secondary_buf = p_xfer_desc->p_secondary_buf, - }; - result = nrfx_twim_xfer(&p_instance->u.twim, &twim_xfer_desc, flags); - #endif - } - else if (NRF_DRV_TWI_USE_TWI) - { - #ifdef TWI_PRESENT - nrfx_twi_xfer_desc_t const twi_xfer_desc = - { - .type = (nrfx_twi_xfer_type_t)p_xfer_desc->type, - .address = p_xfer_desc->address, - .primary_length = p_xfer_desc->primary_length, - .secondary_length = p_xfer_desc->secondary_length, - .p_primary_buf = p_xfer_desc->p_primary_buf, - .p_secondary_buf = p_xfer_desc->p_secondary_buf, - }; - result = nrfx_twi_xfer(&p_instance->u.twi, &twi_xfer_desc, flags); - #endif - } - return result; -} - -__STATIC_INLINE -bool nrf_drv_twi_is_busy(nrf_drv_twi_t const * p_instance) -{ - bool result = 0; - if (NRF_DRV_TWI_USE_TWIM) - { - result = nrfx_twim_is_busy(&p_instance->u.twim); - } - else if (NRF_DRV_TWI_USE_TWI) - { - result = nrfx_twi_is_busy(&p_instance->u.twi); - } - return result; -} - -__STATIC_INLINE -uint32_t nrf_drv_twi_data_count_get(nrf_drv_twi_t const * const p_instance) -{ - uint32_t result = 0; - if (NRF_DRV_TWI_USE_TWIM) - { - NRFX_ASSERT(false); // not supported - result = 0; - } - else if (NRF_DRV_TWI_USE_TWI) - { - result = nrfx_twi_data_count_get(&p_instance->u.twi); - } - return result; -} - -__STATIC_INLINE -uint32_t nrf_drv_twi_start_task_get(nrf_drv_twi_t const * p_instance, - nrf_drv_twi_xfer_type_t xfer_type) -{ - uint32_t result = 0; - if (NRF_DRV_TWI_USE_TWIM) - { - result = nrfx_twim_start_task_get(&p_instance->u.twim, - (nrfx_twim_xfer_type_t)xfer_type); - } - else if (NRF_DRV_TWI_USE_TWI) - { - NRFX_ASSERT(false); // not supported - result = 0; - } - return result; -} - -__STATIC_INLINE -uint32_t nrf_drv_twi_stopped_event_get(nrf_drv_twi_t const * p_instance) -{ - uint32_t result = 0; - if (NRF_DRV_TWI_USE_TWIM) - { - result = nrfx_twim_stopped_event_get(&p_instance->u.twim); - } - else if (NRF_DRV_TWI_USE_TWI) - { - result = nrfx_twi_stopped_event_get(&p_instance->u.twi); - } - return result; -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif // NRF_DRV_TWI_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_uart.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_uart.h deleted file mode 100644 index c938ffc1314..00000000000 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_uart.h +++ /dev/null @@ -1,671 +0,0 @@ -/** - * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form, except as embedded into a Nordic - * Semiconductor ASA integrated circuit in a product or a software update for - * such product, must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * 3. Neither the name of Nordic Semiconductor ASA nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * 4. This software, with or without modification, must only be used with a - * Nordic Semiconductor ASA integrated circuit. - * - * 5. Any software provided in binary form under this license must not be reverse - * engineered, decompiled, modified and/or disassembled. - * - * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef NRF_DRV_UART_H__ -#define NRF_DRV_UART_H__ - -#include - -// Needed for Mbed -#ifndef UART1_ENABLED -#define UART1_ENABLED 0 -#endif - -#ifndef UART0_ENABLED -#define UART0_ENABLED 0 -#endif - -#define UART0_INSTANCE_INDEX 0 -#define UART1_INSTANCE_INDEX UART0_ENABLED -#define UART_ENABLED_COUNT UART0_ENABLED + UART1_ENABLED - - -#if defined(UARTE_PRESENT) && NRFX_CHECK(NRFX_UARTE_ENABLED) - #define NRF_DRV_UART_WITH_UARTE -#endif -#if defined(UART_PRESENT) && NRFX_CHECK(NRFX_UART_ENABLED) - #define NRF_DRV_UART_WITH_UART -#endif - - -#if defined(NRF_DRV_UART_WITH_UARTE) - #include - #define NRF_DRV_UART_CREATE_UARTE(id) \ - .uarte = NRFX_UARTE_INSTANCE(id), -#else - // Compilers (at least the smart ones) will remove the UARTE related code - // (blocks starting with "if (NRF_DRV_UART_USE_UARTE)") when it is not used, - // but to perform the compilation they need the following definitions. - #define nrfx_uarte_init(...) 0 - #define nrfx_uarte_uninit(...) - #define nrfx_uarte_task_address_get(...) 0 - #define nrfx_uarte_event_address_get(...) 0 - #define nrfx_uarte_tx(...) 0 - #define nrfx_uarte_tx_in_progress(...) 0 - #define nrfx_uarte_tx_abort(...) - #define nrfx_uarte_rx(...) 0 - #define nrfx_uarte_rx_ready(...) 0 - #define nrfx_uarte_rx_abort(...) - #define nrfx_uarte_errorsrc_get(...) 0 - #define NRF_DRV_UART_CREATE_UARTE(id) -#endif - -// Mbed - needed to build -#define NRF_DRV_UART_WITH_UART -#if defined(NRF_DRV_UART_WITH_UART) - #include - #define NRF_DRV_UART_CREATE_UART(id) \ - .uart = NRFX_UART_INSTANCE(id), -#else - // Compilers (at least the smart ones) will remove the UART related code - // (blocks starting with "if (NRF_DRV_UART_USE_UART)") when it is not used, - // but to perform the compilation they need the following definitions. - #define nrfx_uart_init(...) 0 - #define nrfx_uart_uninit(...) - #define nrfx_uart_task_address_get(...) 0 - #define nrfx_uart_event_address_get(...) 0 - #define nrfx_uart_tx(...) 0 - #define nrfx_uart_tx_in_progress(...) 0 - #define nrfx_uart_tx_abort(...) - #define nrfx_uart_rx(...) 0 - #define nrfx_uart_rx_enable(...) - #define nrfx_uart_rx_disable(...) - #define nrfx_uart_rx_ready(...) 0 - #define nrfx_uart_rx_abort(...) - #define nrfx_uart_errorsrc_get(...) 0 - #define NRF_DRV_UART_CREATE_UART(id) - - // This part is for old modules that use directly UART HAL definitions - // (to make them compilable for chips that have only UARTE). - #define NRF_UART_BAUDRATE_1200 NRF_UARTE_BAUDRATE_1200 - #define NRF_UART_BAUDRATE_2400 NRF_UARTE_BAUDRATE_2400 - #define NRF_UART_BAUDRATE_4800 NRF_UARTE_BAUDRATE_4800 - #define NRF_UART_BAUDRATE_9600 NRF_UARTE_BAUDRATE_9600 - #define NRF_UART_BAUDRATE_14400 NRF_UARTE_BAUDRATE_14400 - #define NRF_UART_BAUDRATE_19200 NRF_UARTE_BAUDRATE_19200 - #define NRF_UART_BAUDRATE_28800 NRF_UARTE_BAUDRATE_28800 - #define NRF_UART_BAUDRATE_38400 NRF_UARTE_BAUDRATE_38400 - #define NRF_UART_BAUDRATE_57600 NRF_UARTE_BAUDRATE_57600 - #define NRF_UART_BAUDRATE_76800 NRF_UARTE_BAUDRATE_76800 - #define NRF_UART_BAUDRATE_115200 NRF_UARTE_BAUDRATE_115200 - #define NRF_UART_BAUDRATE_230400 NRF_UARTE_BAUDRATE_230400 - #define NRF_UART_BAUDRATE_250000 NRF_UARTE_BAUDRATE_250000 - #define NRF_UART_BAUDRATE_460800 NRF_UARTE_BAUDRATE_460800 - #define NRF_UART_BAUDRATE_921600 NRF_UARTE_BAUDRATE_921600 - #define NRF_UART_BAUDRATE_1000000 NRF_UARTE_BAUDRATE_1000000 - typedef nrf_uarte_baudrate_t nrf_uart_baudrate_t; - #define NRF_UART_ERROR_OVERRUN_MASK NRF_UARTE_ERROR_OVERRUN_MASK - #define NRF_UART_ERROR_PARITY_MASK NRF_UARTE_ERROR_PARITY_MASK - #define NRF_UART_ERROR_FRAMING_MASK NRF_UARTE_ERROR_PARITY_MASK - #define NRF_UART_ERROR_BREAK_MASK NRF_UARTE_ERROR_BREAK_MASK - typedef nrf_uarte_error_mask_t nrf_uart_error_mask_t; - #define NRF_UART_HWFC_DISABLED NRF_UARTE_HWFC_DISABLED - #define NRF_UART_HWFC_ENABLED NRF_UARTE_HWFC_ENABLED - typedef nrf_uarte_hwfc_t nrf_uart_hwfc_t; - #define NRF_UART_PARITY_EXCLUDED NRF_UARTE_PARITY_EXCLUDED - #define NRF_UART_PARITY_INCLUDED NRF_UARTE_PARITY_INCLUDED - typedef nrf_uarte_parity_t nrf_uart_parity_t; - typedef nrf_uarte_task_t nrf_uart_task_t; - typedef nrf_uarte_event_t nrf_uart_event_t; - #define NRF_UART_PSEL_DISCONNECTED NRF_UARTE_PSEL_DISCONNECTED - #define nrf_uart_event_clear(...) -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup nrf_drv_uart UART driver - legacy layer - * @{ - * @ingroup nrf_uart - * @brief Layer providing compatibility with the former API. - */ - -/** - * @brief Structure for the UART driver instance. - */ -typedef struct -{ - uint8_t inst_idx; -#if defined(NRF_DRV_UART_WITH_UARTE) - nrfx_uarte_t uarte; -#endif -#if defined(NRF_DRV_UART_WITH_UART) - nrfx_uart_t uart; -#endif -} nrf_drv_uart_t; - -/** - * @brief Macro for creating an UART driver instance. - */ -#define NRF_DRV_UART_INSTANCE(id) \ -{ \ - .inst_idx = id, \ - NRF_DRV_UART_CREATE_UARTE(id) \ - NRF_DRV_UART_CREATE_UART(id) \ -} - -/** - * @brief Types of UART driver events. - */ -typedef enum -{ - NRF_DRV_UART_EVT_TX_DONE, ///< Requested TX transfer completed. - NRF_DRV_UART_EVT_RX_DONE, ///< Requested RX transfer completed. - NRF_DRV_UART_EVT_ERROR, ///< Error reported by UART peripheral. -} nrf_drv_uart_evt_type_t; - -/**@brief Structure for UART configuration. */ -typedef struct -{ - uint32_t pseltxd; ///< TXD pin number. - uint32_t pselrxd; ///< RXD pin number. - uint32_t pselcts; ///< CTS pin number. - uint32_t pselrts; ///< RTS pin number. - void * p_context; ///< Context passed to interrupt handler. - nrf_uart_hwfc_t hwfc; ///< Flow control configuration. - nrf_uart_parity_t parity; ///< Parity configuration. - nrf_uart_baudrate_t baudrate; ///< Baudrate. - uint8_t interrupt_priority; ///< Interrupt priority. -#if defined(NRF_DRV_UART_WITH_UARTE) && defined(NRF_DRV_UART_WITH_UART) - bool use_easy_dma; -#endif -} nrf_drv_uart_config_t; - -#if defined(NRF_DRV_UART_WITH_UARTE) && defined(NRF_DRV_UART_WITH_UART) -extern uint8_t nrf_drv_uart_use_easy_dma[]; -#define NRF_DRV_UART_DEFAULT_CONFIG_USE_EASY_DMA .use_easy_dma = true, -#else -#define NRF_DRV_UART_DEFAULT_CONFIG_USE_EASY_DMA -#endif - -/**@brief UART default configuration. */ -#define NRF_DRV_UART_DEFAULT_CONFIG \ -{ \ - .pseltxd = NRF_UART_PSEL_DISCONNECTED, \ - .pselrxd = NRF_UART_PSEL_DISCONNECTED, \ - .pselcts = NRF_UART_PSEL_DISCONNECTED, \ - .pselrts = NRF_UART_PSEL_DISCONNECTED, \ - .p_context = NULL, \ - .hwfc = (nrf_uart_hwfc_t)UART_DEFAULT_CONFIG_HWFC, \ - .parity = (nrf_uart_parity_t)UART_DEFAULT_CONFIG_PARITY, \ - .baudrate = (nrf_uart_baudrate_t)UART_DEFAULT_CONFIG_BAUDRATE, \ - .interrupt_priority = UART_DEFAULT_CONFIG_IRQ_PRIORITY, \ - NRF_DRV_UART_DEFAULT_CONFIG_USE_EASY_DMA \ -} - -/**@brief Structure for UART transfer completion event. */ -typedef struct -{ - uint8_t * p_data; ///< Pointer to memory used for transfer. - uint8_t bytes; ///< Number of bytes transfered. -} nrf_drv_uart_xfer_evt_t; - -/**@brief Structure for UART error event. */ -typedef struct -{ - nrf_drv_uart_xfer_evt_t rxtx; ///< Transfer details includes number of bytes transfered. - uint32_t error_mask;///< Mask of error flags that generated the event. -} nrf_drv_uart_error_evt_t; - -/**@brief Structure for UART event. */ -typedef struct -{ - nrf_drv_uart_evt_type_t type; ///< Event type. - union - { - nrf_drv_uart_xfer_evt_t rxtx; ///< Data provided for transfer completion events. - nrf_drv_uart_error_evt_t error;///< Data provided for error event. - } data; -} nrf_drv_uart_event_t; - -/** - * @brief UART interrupt event handler. - * - * @param[in] p_event Pointer to event structure. Event is allocated on the stack so it is available - * only within the context of the event handler. - * @param[in] p_context Context passed to interrupt handler, set on initialization. - */ -typedef void (*nrf_uart_event_handler_t)(nrf_drv_uart_event_t * p_event, void * p_context); - -/** - * @brief Function for initializing the UART driver. - * - * This function configures and enables UART. After this function GPIO pins are controlled by UART. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] p_config Initial configuration. - * @param[in] event_handler Event handler provided by the user. If not provided driver works in - * blocking mode. - * - * @retval NRFX_SUCCESS If initialization was successful. - * @retval NRFX_ERROR_INVALID_STATE If driver is already initialized. - */ -ret_code_t nrf_drv_uart_init(nrf_drv_uart_t const * p_instance, - nrf_drv_uart_config_t const * p_config, - nrf_uart_event_handler_t event_handler); - -/** - * @brief Function for uninitializing the UART driver. - * @param[in] p_instance Pointer to the driver instance structure. - */ -__STATIC_INLINE -void nrf_drv_uart_uninit(nrf_drv_uart_t const * p_instance); - -/** - * @brief Function for getting the address of a specific UART task. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] task Task. - * - * @return Task address. - */ -__STATIC_INLINE -uint32_t nrf_drv_uart_task_address_get(nrf_drv_uart_t const * p_instance, - nrf_uart_task_t task); - -/** - * @brief Function for getting the address of a specific UART event. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] event Event. - * - * @return Event address. - */ -__STATIC_INLINE -uint32_t nrf_drv_uart_event_address_get(nrf_drv_uart_t const * p_instance, - nrf_uart_event_t event); - -/** - * @brief Function for sending data over UART. - * - * If an event handler was provided in nrf_drv_uart_init() call, this function - * returns immediately and the handler is called when the transfer is done. - * Otherwise, the transfer is performed in blocking mode, i.e. this function - * returns when the transfer is finished. Blocking mode is not using interrupt so - * there is no context switching inside the function. - * - * @note Peripherals using EasyDMA (i.e. UARTE) require that the transfer buffers - * are placed in the Data RAM region. If they are not and UARTE instance is - * used, this function will fail with error code NRFX_ERROR_INVALID_ADDR. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] p_data Pointer to data. - * @param[in] length Number of bytes to send. - * - * @retval NRFX_SUCCESS If initialization was successful. - * @retval NRFX_ERROR_BUSY If driver is already transferring. - * @retval NRFX_ERROR_FORBIDDEN If the transfer was aborted from a different context - * (blocking mode only, also see @ref nrf_drv_uart_rx_disable). - * @retval NRFX_ERROR_INVALID_ADDR If p_data does not point to RAM buffer (UARTE only). - */ -__STATIC_INLINE -ret_code_t nrf_drv_uart_tx(nrf_drv_uart_t const * p_instance, - uint8_t const * const p_data, - uint8_t length); - -/** - * @brief Function for checking if UART is currently transmitting. - * - * @param[in] p_instance Pointer to the driver instance structure. - * - * @retval true If UART is transmitting. - * @retval false If UART is not transmitting. - */ -__STATIC_INLINE -bool nrf_drv_uart_tx_in_progress(nrf_drv_uart_t const * p_instance); - -/** - * @brief Function for aborting any ongoing transmission. - * @note @ref NRF_DRV_UART_EVT_TX_DONE event will be generated in non-blocking mode. Event will - * contain number of bytes sent until abort was called. If Easy DMA is not used event will be - * called from the function context. If Easy DMA is used it will be called from UART interrupt - * context. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -__STATIC_INLINE -void nrf_drv_uart_tx_abort(nrf_drv_uart_t const * p_instance); - -/** - * @brief Function for receiving data over UART. - * - * If an event handler was provided in the nrf_drv_uart_init() call, this function - * returns immediately and the handler is called when the transfer is done. - * Otherwise, the transfer is performed in blocking mode, i.e. this function - * returns when the transfer is finished. Blocking mode is not using interrupt so - * there is no context switching inside the function. - * The receive buffer pointer is double buffered in non-blocking mode. The secondary - * buffer can be set immediately after starting the transfer and will be filled - * when the primary buffer is full. The double buffering feature allows - * receiving data continuously. - * - * @note Peripherals using EasyDMA (i.e. UARTE) require that the transfer buffers - * are placed in the Data RAM region. If they are not and UARTE driver instance - * is used, this function will fail with error code NRFX_ERROR_INVALID_ADDR. - * - * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] p_data Pointer to data. - * @param[in] length Number of bytes to receive. - * - * @retval NRFX_SUCCESS If initialization was successful. - * @retval NRFX_ERROR_BUSY If the driver is already receiving - * (and the secondary buffer has already been set - * in non-blocking mode). - * @retval NRFX_ERROR_FORBIDDEN If the transfer was aborted from a different context - * (blocking mode only, also see @ref nrf_drv_uart_rx_disable). - * @retval NRFX_ERROR_INTERNAL If UART peripheral reported an error. - * @retval NRFX_ERROR_INVALID_ADDR If p_data does not point to RAM buffer (UARTE only). - */ -__STATIC_INLINE -ret_code_t nrf_drv_uart_rx(nrf_drv_uart_t const * p_instance, - uint8_t * p_data, - uint8_t length); - - - -/** - * @brief Function for testing the receiver state in blocking mode. - * - * @param[in] p_instance Pointer to the driver instance structure. - * - * @retval true If the receiver has at least one byte of data to get. - * @retval false If the receiver is empty. - */ -__STATIC_INLINE -bool nrf_drv_uart_rx_ready(nrf_drv_uart_t const * p_instance); - -/** - * @brief Function for enabling the receiver. - * - * UART has a 6-byte-long RX FIFO and it is used to store incoming data. If a user does not call the - * UART receive function before the FIFO is filled, an overrun error will appear. Enabling the receiver - * without specifying an RX buffer is supported only in UART mode (without Easy DMA). The receiver must be - * explicitly closed by the user @sa nrf_drv_uart_rx_disable. This function asserts if the mode is wrong. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -__STATIC_INLINE -void nrf_drv_uart_rx_enable(nrf_drv_uart_t const * p_instance); - -/** - * @brief Function for disabling the receiver. - * - * This function must be called to close the receiver after it has been explicitly enabled by - * @sa nrf_drv_uart_rx_enable. The feature is supported only in UART mode (without Easy DMA). The function - * asserts if mode is wrong. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -__STATIC_INLINE -void nrf_drv_uart_rx_disable(nrf_drv_uart_t const * p_instance); - -/** - * @brief Function for aborting any ongoing reception. - * @note @ref NRF_DRV_UART_EVT_RX_DONE event will be generated in non-blocking mode. The event will - * contain the number of bytes received until abort was called. The event is called from UART interrupt - * context. - * - * @param[in] p_instance Pointer to the driver instance structure. - */ -__STATIC_INLINE -void nrf_drv_uart_rx_abort(nrf_drv_uart_t const * p_instance); - -/** - * @brief Function for reading error source mask. Mask contains values from @ref nrf_uart_error_mask_t. - * @note Function should be used in blocking mode only. In case of non-blocking mode, an error event is - * generated. Function clears error sources after reading. - * - * @param[in] p_instance Pointer to the driver instance structure. - * - * @retval Mask of reported errors. - */ -__STATIC_INLINE -uint32_t nrf_drv_uart_errorsrc_get(nrf_drv_uart_t const * p_instance); - - -#ifndef SUPPRESS_INLINE_IMPLEMENTATION - -#if defined(NRF_DRV_UART_WITH_UARTE) && defined(NRF_DRV_UART_WITH_UART) - #define NRF_DRV_UART_USE_UARTE (nrf_drv_uart_use_easy_dma[p_instance->inst_idx]) -#elif defined(NRF_DRV_UART_WITH_UARTE) - #define NRF_DRV_UART_USE_UARTE true -#else - #define NRF_DRV_UART_USE_UARTE false -#endif -#define NRF_DRV_UART_USE_UART (!NRF_DRV_UART_USE_UARTE) - -__STATIC_INLINE -void nrf_drv_uart_uninit(nrf_drv_uart_t const * p_instance) -{ - if (NRF_DRV_UART_USE_UARTE) - { - nrfx_uarte_uninit(&p_instance->uarte); - } - else if (NRF_DRV_UART_USE_UART) - { - nrfx_uart_uninit(&p_instance->uart); - } -} - -__STATIC_INLINE -uint32_t nrf_drv_uart_task_address_get(nrf_drv_uart_t const * p_instance, - nrf_uart_task_t task) -{ - uint32_t result = 0; - if (NRF_DRV_UART_USE_UARTE) - { - result = nrfx_uarte_task_address_get(&p_instance->uarte, - (nrf_uarte_task_t)task); - } - else if (NRF_DRV_UART_USE_UART) - { - result = nrfx_uart_task_address_get(&p_instance->uart, task); - } - return result; -} - -__STATIC_INLINE -uint32_t nrf_drv_uart_event_address_get(nrf_drv_uart_t const * p_instance, - nrf_uart_event_t event) -{ - uint32_t result = 0; - if (NRF_DRV_UART_USE_UARTE) - { - result = nrfx_uarte_event_address_get(&p_instance->uarte, - (nrf_uarte_event_t)event); - } - else if (NRF_DRV_UART_USE_UART) - { - result = nrfx_uart_event_address_get(&p_instance->uart, event); - } - return result; -} - -__STATIC_INLINE -ret_code_t nrf_drv_uart_tx(nrf_drv_uart_t const * p_instance, - uint8_t const * p_data, - uint8_t length) -{ - uint32_t result = 0; - if (NRF_DRV_UART_USE_UARTE) - { - result = nrfx_uarte_tx(&p_instance->uarte, - p_data, - length); - } - else if (NRF_DRV_UART_USE_UART) - { - result = nrfx_uart_tx(&p_instance->uart, - p_data, - length); - } - return result; -} - -__STATIC_INLINE -bool nrf_drv_uart_tx_in_progress(nrf_drv_uart_t const * p_instance) -{ - bool result = 0; - if (NRF_DRV_UART_USE_UARTE) - { - result = nrfx_uarte_tx_in_progress(&p_instance->uarte); - } - else if (NRF_DRV_UART_USE_UART) - { - result = nrfx_uart_tx_in_progress(&p_instance->uart); - } - return result; -} - -__STATIC_INLINE -void nrf_drv_uart_tx_abort(nrf_drv_uart_t const * p_instance) -{ - if (NRF_DRV_UART_USE_UARTE) - { - nrfx_uarte_tx_abort(&p_instance->uarte); - } - else if (NRF_DRV_UART_USE_UART) - { - nrfx_uart_tx_abort(&p_instance->uart); - } -} - -__STATIC_INLINE -ret_code_t nrf_drv_uart_rx(nrf_drv_uart_t const * p_instance, - uint8_t * p_data, - uint8_t length) -{ - uint32_t result = 0; - if (NRF_DRV_UART_USE_UARTE) - { - result = nrfx_uarte_rx(&p_instance->uarte, - p_data, - length); - } - else if (NRF_DRV_UART_USE_UART) - { - result = nrfx_uart_rx(&p_instance->uart, - p_data, - length); - } - return result; -} - -__STATIC_INLINE -bool nrf_drv_uart_rx_ready(nrf_drv_uart_t const * p_instance) -{ - bool result = 0; - if (NRF_DRV_UART_USE_UARTE) - { - result = nrfx_uarte_rx_ready(&p_instance->uarte); - } - else if (NRF_DRV_UART_USE_UART) - { - result = nrfx_uart_rx_ready(&p_instance->uart); - } - return result; -} - -__STATIC_INLINE -void nrf_drv_uart_rx_enable(nrf_drv_uart_t const * p_instance) -{ - if (NRF_DRV_UART_USE_UARTE) - { - NRFX_ASSERT(false); // not supported - } - else if (NRF_DRV_UART_USE_UART) - { - nrfx_uart_rx_enable(&p_instance->uart); - } -} - -__STATIC_INLINE -void nrf_drv_uart_rx_disable(nrf_drv_uart_t const * p_instance) -{ - if (NRF_DRV_UART_USE_UARTE) - { - NRFX_ASSERT(false); // not supported - } - else if (NRF_DRV_UART_USE_UART) - { - nrfx_uart_rx_disable(&p_instance->uart); - } -} - -__STATIC_INLINE -void nrf_drv_uart_rx_abort(nrf_drv_uart_t const * p_instance) -{ - if (NRF_DRV_UART_USE_UARTE) - { - nrfx_uarte_rx_abort(&p_instance->uarte); - } - else if (NRF_DRV_UART_USE_UART) - { - nrfx_uart_rx_abort(&p_instance->uart); - } -} - -__STATIC_INLINE -uint32_t nrf_drv_uart_errorsrc_get(nrf_drv_uart_t const * p_instance) -{ - uint32_t result = 0; - if (NRF_DRV_UART_USE_UARTE) - { - result = nrfx_uarte_errorsrc_get(&p_instance->uarte); - } - else if (NRF_DRV_UART_USE_UART) - { - nrf_uart_event_clear(p_instance->uart.p_reg, NRF_UART_EVENT_ERROR); - result = nrfx_uart_errorsrc_get(&p_instance->uart); - } - return result; -} - -#endif // SUPPRESS_INLINE_IMPLEMENTATION - -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif // NRF_DRV_UART_H__ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/qspi_api.c b/targets/TARGET_NORDIC/TARGET_NRF5x/qspi_api.c index 93856ea48aa..7ea96ef4784 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/qspi_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/qspi_api.c @@ -41,7 +41,6 @@ #if DEVICE_QSPI #include -#include "nrf_drv_common.h" #include "PeripheralPins.h" #include "nrfx_qspi.h" From b752f51bb573529d8c2ac6b5492c5d3f227de922 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Thu, 14 Mar 2019 20:45:05 -0400 Subject: [PATCH 480/488] Fixing compatibilities with new nrfx drivers --- .../integration/nrfx/legacy/nrf_drv_common.h | 10 ++++++ .../integration/nrfx/legacy/nrf_drv_power.c | 3 +- .../integration/nrfx/legacy/nrf_drv_usbd.c | 36 +++++-------------- .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 2 -- 4 files changed, 21 insertions(+), 30 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_common.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_common.h index 66439a3b130..dc16ec91116 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_common.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_common.h @@ -56,6 +56,16 @@ extern "C" { #define nrf_drv_get_IRQn nrfx_get_irq_number #define nrf_drv_is_in_RAM nrfx_is_in_ram +/** + * @brief Driver state. + */ +typedef enum +{ + NRF_DRV_STATE_UNINITIALIZED, /**< Uninitialized. */ + NRF_DRV_STATE_INITIALIZED, /**< Initialized but powered off. */ + NRF_DRV_STATE_POWERED_ON +} nrf_drv_state_t; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_power.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_power.c index 3c1f26818c1..9cf85802138 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_power.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_power.c @@ -439,7 +439,8 @@ static void nrf_drv_power_on_sd_disable(void) { /* Reinit interrupts */ ASSERT(m_initialized); - nrf_drv_common_irq_enable(POWER_CLOCK_IRQn, CLOCK_CONFIG_IRQ_PRIORITY); + NRFX_IRQ_SET_PRIORITY(POWER_CLOCK_IRQn, CLOCK_CONFIG_IRQ_PRIORITY); + NRFX_IRQ_ENABLE(POWER_CLOCK_IRQn); if (m_pofwarn_handler != NULL) { nrf_power_int_enable(NRF_POWER_INT_POFWARN_MASK); diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_usbd.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_usbd.c index 75b85fe5718..f71d7c525bb 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_usbd.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_usbd.c @@ -792,16 +792,6 @@ static inline void usbd_dma_start(nrf_drv_usbd_ep_t ep) nrf_usbd_task_trigger(task_start_ep(ep)); } -void nrf_drv_usbd_isoinconfig_set(nrf_drv_usbd_isoinconfig_t config) -{ - nrf_usbd_isoinconfig_set(config); -} - -nrf_drv_usbd_isoinconfig_t nrf_drv_usbd_isoinconfig_get(void) -{ - return nrf_usbd_isoinconfig_get(); -} - /** * @brief Abort pending transfer on selected endpoint * @@ -911,7 +901,7 @@ static void usbd_ep_abort_all(void) */ static inline void usbd_int_rise(void) { - NVIC_SetPendingIRQ(USBD_IRQn); + NRFX_IRQ_PENDING_SET(USBD_IRQn); } /** @@ -1342,13 +1332,6 @@ static void ev_epdata_handler(void) } } -static void ev_accessfault_handler(void) -{ - /** @todo RK Currently do nothing about it. - * Implement it when accessfault would be better documented */ - // ASSERT(0); -} - /** * @brief Function to select the endpoint to start * @@ -1582,8 +1565,7 @@ static const nrf_drv_usbd_isr_t m_isr[] = [USBD_INTEN_SOF_Pos ] = ev_sof_handler, [USBD_INTEN_USBEVENT_Pos ] = ev_usbevent_handler, [USBD_INTEN_EP0SETUP_Pos ] = ev_setup_handler, - [USBD_INTEN_EPDATA_Pos ] = ev_epdata_handler, - [USBD_INTEN_ACCESSFAULT_Pos] = ev_accessfault_handler + [USBD_INTEN_EPDATA_Pos ] = ev_epdata_handler }; /** @@ -1898,8 +1880,7 @@ void nrf_drv_usbd_start(bool enable_sof) NRF_USBD_INT_ENDEPOUT0_MASK | NRF_USBD_INT_USBEVENT_MASK | NRF_USBD_INT_EP0SETUP_MASK | - NRF_USBD_INT_DATAEP_MASK | - NRF_USBD_INT_ACCESSFAULT_MASK; + NRF_USBD_INT_DATAEP_MASK; if (enable_sof || nrf_drv_usbd_errata_104()) { @@ -1910,7 +1891,8 @@ void nrf_drv_usbd_start(bool enable_sof) nrf_usbd_int_enable(ints_to_enable); /* Enable interrupt globally */ - nrf_drv_common_irq_enable(USBD_IRQn, USBD_CONFIG_IRQ_PRIORITY); + NRFX_IRQ_PRIORITY_SET(USBD_IRQn, USBD_CONFIG_IRQ_PRIORITY); + NRFX_IRQ_ENABLE(USBD_IRQn); /* Enable pullups */ nrf_usbd_pullup_enable(); @@ -1921,9 +1903,9 @@ void nrf_drv_usbd_stop(void) ASSERT(m_drv_state == NRF_DRV_STATE_POWERED_ON); /* Clear interrupt */ - NVIC_ClearPendingIRQ(USBD_IRQn); + NRFX_IRQ_PENDING_CLEAR(USBD_IRQn); - if (nrf_drv_common_irq_enable_check(USBD_IRQn)) + if (NRFX_IRQ_IS_ENABLED(USBD_IRQn)) { /* Abort transfers */ usbd_ep_abort_all(); @@ -1932,7 +1914,7 @@ void nrf_drv_usbd_stop(void) nrf_usbd_pullup_disable(); /* Disable interrupt globally */ - nrf_drv_common_irq_disable(USBD_IRQn); + NRFX_IRQ_DISABLE(USBD_IRQn); /* Disable all interrupts */ nrf_usbd_int_disable(~0U); @@ -1951,7 +1933,7 @@ bool nrf_drv_usbd_is_enabled(void) bool nrf_drv_usbd_is_started(void) { - return (nrf_drv_usbd_is_enabled() && nrf_drv_common_irq_enable_check(USBD_IRQn)); + return (nrf_drv_usbd_is_enabled() && NRFX_IRQ_IS_ENABLED(USBD_IRQn)); } bool nrf_drv_usbd_suspend(void) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index 7317897acdf..c8b66ff082b 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -19,8 +19,6 @@ #include "platform/mbed_critical.h" #include "platform/mbed_assert.h" -#include "nrf_clock.h" - #define MAX_PACKET_SIZE_SETUP NRF_DRV_USBD_EPSIZE #define MAX_PACKET_NON_ISO NRF_DRV_USBD_EPSIZE #define MAX_PACKET_ISO NRF_DRV_USBD_ISOSIZE From b7487936a9d963ae8b91751d3c3768f24f030f06 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Thu, 14 Mar 2019 21:24:57 -0400 Subject: [PATCH 481/488] Finished compatibility changes for nrfx renaming --- .../TARGET_MCU_NRF52840/config/sdk_config.h | 2 +- .../integration/nrfx/legacy/nrf_drv_usbd.c | 43 +++++++++---------- .../integration/nrfx/legacy/nrf_drv_usbd.h | 1 - .../TARGET_MCU_NRF52840/USBPhyHw.h | 6 +-- .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 42 +++++++++--------- 5 files changed, 45 insertions(+), 49 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h index c52b8b244df..a6a8ef9d369 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h @@ -2370,7 +2370,7 @@ // NRFX_POWER_ENABLED - nrfx_power - POWER peripheral driver //========================================================== #ifndef NRFX_POWER_ENABLED -#define NRFX_POWER_ENABLED 0 +#define NRFX_POWER_ENABLED 1 #endif // NRFX_POWER_CONFIG_IRQ_PRIORITY - Interrupt priority diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_usbd.c b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_usbd.c index f71d7c525bb..82f6b9182a9 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_usbd.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_usbd.c @@ -43,7 +43,6 @@ #include "nrf_drv_usbd.h" #include "nrf.h" #include "nordic_common.h" -#include "nrf_drv_common.h" #include "nrf_atomic.h" #include "nrf_delay.h" #include "app_util_platform.h" @@ -235,7 +234,7 @@ STATIC_ASSERT(USBD_EP_BITPOS(NRF_DRV_USBD_EPOUT7) == USBD_EPDATASTATUS_EPOUT7_Po /** * @brief Current driver state */ -static nrf_drv_state_t m_drv_state = NRF_DRV_STATE_UNINITIALIZED; +static nrfx_drv_state_t m_drv_state = NRFX_DRV_STATE_UNINITIALIZED; /** * @brief Event handler for the library @@ -496,7 +495,7 @@ bool nrf_drv_usbd_consumer( nrf_drv_usbd_transfer_t * p_transfer = p_context; ASSERT(ep_size >= data_size); ASSERT((p_transfer->p_data.rx == NULL) || - nrf_drv_is_in_RAM((const void*)(p_transfer->p_data.ptr))); + nrfx_is_in_ram((const void*)(p_transfer->p_data.ptr))); size_t size = p_transfer->size; if (size < data_size) @@ -533,7 +532,7 @@ bool nrf_drv_usbd_feeder_ram( size_t ep_size) { nrf_drv_usbd_transfer_t * p_transfer = p_context; - ASSERT(nrf_drv_is_in_RAM((const void*)(p_transfer->p_data.ptr))); + ASSERT(nrfx_is_in_ram((const void*)(p_transfer->p_data.ptr))); size_t tx_size = p_transfer->size; if (tx_size > ep_size) @@ -566,7 +565,7 @@ bool nrf_drv_usbd_feeder_ram_zlp( size_t ep_size) { nrf_drv_usbd_transfer_t * p_transfer = p_context; - ASSERT(nrf_drv_is_in_RAM((const void*)(p_transfer->p_data.ptr))); + ASSERT(nrfx_is_in_ram((const void*)(p_transfer->p_data.ptr))); size_t tx_size = p_transfer->size; if (tx_size > ep_size) @@ -599,7 +598,7 @@ bool nrf_drv_usbd_feeder_flash( size_t ep_size) { nrf_drv_usbd_transfer_t * p_transfer = p_context; - ASSERT(!nrf_drv_is_in_RAM((const void*)(p_transfer->p_data.ptr))); + ASSERT(!nrfx_is_in_ram((const void*)(p_transfer->p_data.ptr))); size_t tx_size = p_transfer->size; void * p_buffer = nrf_drv_usbd_feeder_buffer_get(); @@ -637,7 +636,7 @@ bool nrf_drv_usbd_feeder_flash_zlp( size_t ep_size) { nrf_drv_usbd_transfer_t * p_transfer = p_context; - ASSERT(!nrf_drv_is_in_RAM((const void*)(p_transfer->p_data.ptr))); + ASSERT(!nrfx_is_in_ram((const void*)(p_transfer->p_data.ptr))); size_t tx_size = p_transfer->size; void * p_buffer = nrf_drv_usbd_feeder_buffer_get(); @@ -1583,7 +1582,7 @@ void USBD_IRQHandler(void) while (to_process) { uint8_t event_nr = __CLZ(__RBIT(to_process)); - if (nrf_usbd_event_get_and_clear((nrf_usbd_event_t)nrf_drv_bitpos_to_event(event_nr))) + if (nrf_usbd_event_get_and_clear((nrf_usbd_event_t)nrfx_bitpos_to_event(event_nr))) { active |= 1UL << event_nr; } @@ -1709,13 +1708,13 @@ ret_code_t nrf_drv_usbd_init(nrf_drv_usbd_event_handler_t const event_handler) { return NRF_ERROR_INVALID_PARAM; } - if ( m_drv_state != NRF_DRV_STATE_UNINITIALIZED) + if ( m_drv_state != NRFX_DRV_STATE_UNINITIALIZED) { return NRF_ERROR_INVALID_STATE; } m_event_handler = event_handler; - m_drv_state = NRF_DRV_STATE_INITIALIZED; + m_drv_state = NRFX_DRV_STATE_INITIALIZED; uint8_t n; for (n = 0; n < NRF_USBD_EPIN_CNT; ++n) @@ -1744,19 +1743,19 @@ ret_code_t nrf_drv_usbd_init(nrf_drv_usbd_event_handler_t const event_handler) ret_code_t nrf_drv_usbd_uninit(void) { - if (m_drv_state != NRF_DRV_STATE_INITIALIZED) + if (m_drv_state != NRFX_DRV_STATE_INITIALIZED) { return NRF_ERROR_INVALID_STATE; } m_event_handler = NULL; - m_drv_state = NRF_DRV_STATE_UNINITIALIZED; + m_drv_state = NRFX_DRV_STATE_UNINITIALIZED; return NRF_SUCCESS; } void nrf_drv_usbd_enable(void) { - ASSERT(m_drv_state == NRF_DRV_STATE_INITIALIZED); + ASSERT(m_drv_state == NRFX_DRV_STATE_INITIALIZED); /* Prepare for READY event receiving */ nrf_usbd_eventcause_clear(NRF_USBD_EVENTCAUSE_READY_MASK); @@ -1834,7 +1833,7 @@ void nrf_drv_usbd_enable(void) usbd_dma_pending_clear(); m_last_setup_dir = NRF_DRV_USBD_EPOUT0; - m_drv_state = NRF_DRV_STATE_POWERED_ON; + m_drv_state = NRFX_DRV_STATE_POWERED_ON; if (nrf_drv_usbd_errata_187()) { @@ -1855,7 +1854,7 @@ void nrf_drv_usbd_enable(void) void nrf_drv_usbd_disable(void) { - ASSERT(m_drv_state != NRF_DRV_STATE_UNINITIALIZED); + ASSERT(m_drv_state != NRFX_DRV_STATE_UNINITIALIZED); /* Stop just in case */ nrf_drv_usbd_stop(); @@ -1864,12 +1863,12 @@ void nrf_drv_usbd_disable(void) nrf_usbd_int_disable(nrf_usbd_int_enable_get()); nrf_usbd_disable(); usbd_dma_pending_clear(); - m_drv_state = NRF_DRV_STATE_INITIALIZED; + m_drv_state = NRFX_DRV_STATE_INITIALIZED; } void nrf_drv_usbd_start(bool enable_sof) { - ASSERT(m_drv_state == NRF_DRV_STATE_POWERED_ON); + ASSERT(m_drv_state == NRFX_DRV_STATE_POWERED_ON); m_bus_suspend = false; uint32_t ints_to_enable = @@ -1900,7 +1899,7 @@ void nrf_drv_usbd_start(bool enable_sof) void nrf_drv_usbd_stop(void) { - ASSERT(m_drv_state == NRF_DRV_STATE_POWERED_ON); + ASSERT(m_drv_state == NRFX_DRV_STATE_POWERED_ON); /* Clear interrupt */ NRFX_IRQ_PENDING_CLEAR(USBD_IRQn); @@ -1923,12 +1922,12 @@ void nrf_drv_usbd_stop(void) bool nrf_drv_usbd_is_initialized(void) { - return (m_drv_state >= NRF_DRV_STATE_INITIALIZED); + return (m_drv_state >= NRFX_DRV_STATE_INITIALIZED); } bool nrf_drv_usbd_is_enabled(void) { - return (m_drv_state >= NRF_DRV_STATE_POWERED_ON); + return (m_drv_state >= NRFX_DRV_STATE_POWERED_ON); } bool nrf_drv_usbd_is_started(void) @@ -2127,7 +2126,7 @@ ret_code_t nrf_drv_usbd_ep_transfer( if (NRF_USBD_EPIN_CHECK(ep)) { p_context = m_ep_feeder_state + NRF_USBD_EP_NR_GET(ep); - if (nrf_drv_is_in_RAM(p_transfer->p_data.tx)) + if (nrfx_is_in_ram(p_transfer->p_data.tx)) { /* RAM */ if (0 == (p_transfer->flags & NRF_DRV_USBD_TRANSFER_ZLP_FLAG)) @@ -2187,7 +2186,7 @@ ret_code_t nrf_drv_usbd_ep_transfer( else { p_context = m_ep_consumer_state + NRF_USBD_EP_NR_GET(ep); - ASSERT((p_transfer->p_data.rx == NULL) || (nrf_drv_is_in_RAM(p_transfer->p_data.rx))); + ASSERT((p_transfer->p_data.rx == NULL) || (nrfx_is_in_ram(p_transfer->p_data.rx))); p_state->handler.consumer = nrf_drv_usbd_consumer; } *p_context = *p_transfer; diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_usbd.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_usbd.h index 25d7b342534..cceaf4009a4 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_usbd.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/integration/nrfx/legacy/nrf_drv_usbd.h @@ -41,7 +41,6 @@ #ifndef NRF_DRV_USBD_H__ #define NRF_DRV_USBD_H__ -#include "nrf_drv_common.h" #include "sdk_errors.h" #include "nrf_usbd.h" #include diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h index a6d2ff9473a..918688e38e9 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h @@ -22,7 +22,7 @@ extern "C" { #include "nrf_drv_usbd.h" - #include "nrf_drv_power.h" + #include "nrfx_power.h" } class USBPhyHw : public USBPhy { @@ -63,7 +63,7 @@ class USBPhyHw : public USBPhy { virtual void process(); static void _usb_event_handler(nrf_drv_usbd_evt_t const * const p_event); - static void _usb_power_event_handler(nrf_drv_power_usb_evt_t event); + static void _usb_power_event_handler(nrfx_power_usb_evt_t event); static void _usb_virtual_status_event_handler(void); private: @@ -86,7 +86,7 @@ class USBPhyHw : public USBPhy { nrf_drv_usbd_evt_t usb_event; // USB power event buffer - nrf_drv_power_usb_evt_t usb_power_event; + nrfx_power_usb_evt_t usb_power_event; // Buffer to hold setup packet nrf_drv_usbd_setup_t setup_buf; diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index c8b66ff082b..0ad249149cf 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -46,7 +46,7 @@ static USBPhyHw *instance = 0; static volatile bool virtual_status_xfer_event; static void usbd_event_handler(nrf_drv_usbd_evt_t const * const p_event); -static void power_usb_event_handler(nrf_drv_power_usb_evt_t event); +static void power_usb_event_handler(nrfx_power_usb_evt_t event); USBPhy *get_usb_phy() { static USBPhyHw usbphy; @@ -56,7 +56,7 @@ USBPhy *get_usb_phy() { USBPhyHw::USBPhyHw() : events(NULL), sof_enabled(false), connect_enabled(false), usb_event_type(USB_HW_EVENT_NONE), - usb_power_event(NRF_DRV_POWER_USB_EVT_REMOVED) { + usb_power_event(NRFX_POWER_USB_EVT_REMOVED) { } @@ -73,15 +73,14 @@ void USBPhyHw::init(USBPhyEvents *events) { ret_code_t ret; // Initialize power module to track USB Power events - ret = nrf_drv_power_init(NULL); + ret = nrfx_power_init(NULL); MBED_ASSERT(ret == NRF_SUCCESS); // Register callback for USB Power events - static const nrf_drv_power_usbevt_config_t config = { .handler = + static const nrfx_power_usbevt_config_t config = { .handler = power_usb_event_handler }; - ret = nrf_drv_power_usbevt_init(&config); - MBED_ASSERT(ret == NRF_SUCCESS); + nrfx_power_usbevt_init(&config); // Initialize USB Device driver ret = nrf_drv_usbd_init(usbd_event_handler); @@ -115,15 +114,15 @@ void USBPhyHw::deinit() { //NVIC_DisableIRQ(USBD_IRQn); // This is handled by the Nordic driver // Disable the power peripheral driver - nrf_drv_power_uninit(); + nrfx_power_uninit(); // Clear the instance pointer instance = 0; } bool USBPhyHw::powered() { - if (nrf_drv_power_usbstatus_get() == NRF_DRV_POWER_USB_STATE_CONNECTED - || nrf_drv_power_usbstatus_get() == NRF_DRV_POWER_USB_STATE_READY) + if (nrfx_power_usbstatus_get() == NRFX_POWER_USB_STATE_CONNECTED + || nrfx_power_usbstatus_get() == NRFX_POWER_USB_STATE_READY) return true; else return false; @@ -138,7 +137,7 @@ void USBPhyHw::connect() { this->connect_enabled = true; // If VBUS is already available, enable immediately - if(nrf_drv_power_usbstatus_get() == NRF_DRV_POWER_USB_STATE_CONNECTED) + if(nrfx_power_usbstatus_get() == NRFX_POWER_USB_STATE_CONNECTED) { // Enabling USB will cause NRF_DRV_POWER_USB_EVT_READY // to occur, which will start the USBD peripheral @@ -146,7 +145,7 @@ void USBPhyHw::connect() { if(!nrf_drv_usbd_is_enabled()) nrf_drv_usbd_enable(); - if(nrf_drv_power_usbstatus_get() == NRF_DRV_POWER_USB_STATE_READY + if(nrfx_power_usbstatus_get() == NRFX_POWER_USB_STATE_READY && !nrf_drv_usbd_is_started()) nrf_drv_usbd_start(true); } @@ -267,7 +266,7 @@ void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) { virtual_status_xfer_event = true; // Trigger an interrupt to process the virtual status event - NVIC_SetPendingIRQ(USBD_IRQn); + NRFX_IRQ_PENDING_SET(USBD_IRQn); return; } @@ -310,7 +309,7 @@ void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) { virtual_status_xfer_event = true; // Trigger an interrupt to process the virtual status event - NVIC_SetPendingIRQ(USBD_IRQn); + NRFX_IRQ_PENDING_SET(USBD_IRQn); return; } @@ -457,17 +456,17 @@ void USBPhyHw::process() { { // Process USB power-related events switch (usb_power_event) { - case NRF_DRV_POWER_USB_EVT_DETECTED: + case NRFX_POWER_USB_EVT_DETECTED: if(this->connect_enabled) { if(!nrf_drv_usbd_is_enabled()) nrf_drv_usbd_enable(); events->power(true); } break; - case NRF_DRV_POWER_USB_EVT_REMOVED: + case NRFX_POWER_USB_EVT_REMOVED: events->power(false); break; - case NRF_DRV_POWER_USB_EVT_READY: + case NRFX_POWER_USB_EVT_READY: if(!nrf_drv_usbd_is_started()) nrf_drv_usbd_start(true); break; @@ -501,7 +500,7 @@ void USBPhyHw::_usb_event_handler( instance->events->start_process(); } -void USBPhyHw::_usb_power_event_handler(nrf_drv_power_usb_evt_t event) { +void USBPhyHw::_usb_power_event_handler(nrfx_power_usb_evt_t event) { disable_usb_interrupts(); // Copy the event data into internal memory instance->usb_power_event = event; @@ -525,7 +524,6 @@ nrf_drv_usbd_transfer_t* USBPhyHw::get_transfer_buffer(usb_ep_t endpoint) { nrf_drv_usbd_ep_t USBPhyHw::get_nordic_endpoint(usb_ep_t endpoint) { // Clear the most-significant-bit (input endpoint flag) - uint8_t endpoint_num = (endpoint & ~(0x80)); return (nrf_drv_usbd_ep_t) endpoint; } @@ -539,13 +537,13 @@ void USBPhyHw::_reset(void) usb_event_type = USB_HW_EVENT_NONE; // Clear all endpoint interrupts - NVIC_ClearPendingIRQ(USBD_IRQn); + NRFX_IRQ_PENDING_CLEAR(USBD_IRQn); nrf_usbd_event_clear((nrf_usbd_event_t)0x01FFFFFF); } void USBPhyHw::enable_usb_interrupts(void) { // Enable USB and USB-related power interrupts - NVIC_EnableIRQ(USBD_IRQn); + NRFX_IRQ_ENABLE(USBD_IRQn); nrf_power_int_enable(NRF_POWER_INT_USBDETECTED_MASK | NRF_POWER_INT_USBREMOVED_MASK | NRF_POWER_INT_USBPWRRDY_MASK); @@ -553,13 +551,13 @@ void USBPhyHw::enable_usb_interrupts(void) { void USBPhyHw::disable_usb_interrupts(void) { // Disable USB and USB-related power interrupts - NVIC_DisableIRQ(USBD_IRQn); + NRFX_IRQ_ENABLE(USBD_IRQn); nrf_power_int_disable(NRF_POWER_INT_USBDETECTED_MASK | NRF_POWER_INT_USBREMOVED_MASK | NRF_POWER_INT_USBPWRRDY_MASK); } -static void power_usb_event_handler(nrf_drv_power_usb_evt_t event) { +static void power_usb_event_handler(nrfx_power_usb_evt_t event) { if(instance) { // Pass the event on to the USBPhyHW instance instance->_usb_power_event_handler(event); From 75ebaee07e4c805a85535b7e2d6eb2aa5fdd4cda Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Thu, 14 Mar 2019 22:00:40 -0400 Subject: [PATCH 482/488] Fixed IRQ_ENABLE call to IRQ_DISABLE (oops). --- .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index 0ad249149cf..b646f644f28 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -65,8 +65,6 @@ USBPhyHw::~USBPhyHw() { } void USBPhyHw::init(USBPhyEvents *events) { - // Disable IRQ - //NVIC_DisableIRQ(USBD_IRQn); this->events = events; @@ -101,8 +99,12 @@ void USBPhyHw::init(USBPhyEvents *events) { */ NRF_USBD->ISOINCONFIG |= 0x01; // set RESPONSE to 1 (respond with ZLP) - // Enable IRQ + // Set up the IRQ handler NVIC_SetVector(USBD_IRQn, (uint32_t)USBD_HAL_IRQHandler); + + // Enable the power events + nrfx_power_usbevt_enable(); + } void USBPhyHw::deinit() { @@ -544,17 +546,13 @@ void USBPhyHw::_reset(void) void USBPhyHw::enable_usb_interrupts(void) { // Enable USB and USB-related power interrupts NRFX_IRQ_ENABLE(USBD_IRQn); - nrf_power_int_enable(NRF_POWER_INT_USBDETECTED_MASK | - NRF_POWER_INT_USBREMOVED_MASK | - NRF_POWER_INT_USBPWRRDY_MASK); + nrfx_power_usbevt_enable(); } void USBPhyHw::disable_usb_interrupts(void) { // Disable USB and USB-related power interrupts - NRFX_IRQ_ENABLE(USBD_IRQn); - nrf_power_int_disable(NRF_POWER_INT_USBDETECTED_MASK | - NRF_POWER_INT_USBREMOVED_MASK | - NRF_POWER_INT_USBPWRRDY_MASK); + NRFX_IRQ_DISABLE(USBD_IRQn); + nrfx_power_usbevt_disable(); } static void power_usb_event_handler(nrfx_power_usb_evt_t event) { From 9ca46036edb6e6734c58171dc60bbc17f3be1e72 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Thu, 14 Mar 2019 22:08:29 -0400 Subject: [PATCH 483/488] Fixed some comments --- .../targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h | 2 +- .../TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 7 +++++++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h index 918688e38e9..3cf7ebf89b5 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h @@ -94,7 +94,7 @@ class USBPhyHw : public USBPhy { // Nordic transfer structures for each in/out endpoint nrf_drv_usbd_transfer_t transfer_buf[18]; - // Returns the appropraite transfer structure buffer for the given endpoint + // Returns the appropriate transfer structure buffer for the given endpoint nrf_drv_usbd_transfer_t* get_transfer_buffer(usb_ep_t endpoint); // Returns the corresponding enumeration given an mbed endpoint number diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index b646f644f28..8a022674df3 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -357,6 +357,13 @@ void USBPhyHw::endpoint_stall(usb_ep_t endpoint) { void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) { nrf_drv_usbd_ep_t ep = get_nordic_endpoint(endpoint); nrf_drv_usbd_ep_stall_clear(ep); + + /* + * This is a somewhat hacky fix to fully "unload" + * an IN endpoint after a buffer has been + * transferred via EasyDMA... + */ + nrf_drv_usbd_ep_disable(ep); nrf_drv_usbd_ep_enable(ep); } From 20a3151c5210b3fe1818d2158bae1492420dae1a Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Thu, 14 Mar 2019 22:15:09 -0400 Subject: [PATCH 484/488] Reverting some changes that shouldn't make it into master --- .../TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h | 4 ++-- targets/targets.json | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h index a6a8ef9d369..b8599c5d239 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/config/sdk_config.h @@ -50,7 +50,7 @@ // SYSTICK_ENABLED #ifndef SYSTICK_ENABLED -#define SYSTICK_ENABLED 1 +#define SYSTICK_ENABLED 0 #endif //========================================================== @@ -4547,7 +4547,7 @@ // POWER_ENABLED - nrf_drv_power - POWER peripheral driver - legacy layer //========================================================== #ifndef POWER_ENABLED -#define POWER_ENABLED 1 +#define POWER_ENABLED 0 #endif // POWER_CONFIG_IRQ_PRIORITY - Interrupt priority diff --git a/targets/targets.json b/targets/targets.json index 66668867431..2bbf5f16bde 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -3625,7 +3625,7 @@ }, "macros_add": ["USB_STM_HAL"], "overrides": { "lse_available": 0 }, - "device_has_add": ["ANALOGOUT", "TRNG", "FLASH", "MPU", "USBDEVICE"], + "device_has_add": ["ANALOGOUT", "TRNG", "FLASH", "MPU"], "release_versions": ["2", "5"], "device_name": "STM32F407VG" }, From 1127b17901bcd64b6545fc45b106bcc4cb2633f9 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Thu, 14 Mar 2019 22:23:19 -0400 Subject: [PATCH 485/488] Autoformatted with astyle --- .../TARGET_MCU_NRF52840/USBPhyHw.h | 18 +- .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 878 +++++++++--------- 2 files changed, 469 insertions(+), 427 deletions(-) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h index 3cf7ebf89b5..99e0b19814e 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhyHw.h @@ -21,8 +21,8 @@ #include "USBPhy.h" extern "C" { - #include "nrf_drv_usbd.h" - #include "nrfx_power.h" +#include "nrf_drv_usbd.h" +#include "nrfx_power.h" } class USBPhyHw : public USBPhy { @@ -41,7 +41,7 @@ class USBPhyHw : public USBPhy { virtual void sof_disable(); virtual void set_address(uint8_t address); virtual void remote_wakeup(); - virtual const usb_ep_table_t* endpoint_table(); + virtual const usb_ep_table_t *endpoint_table(); virtual uint32_t ep0_set_max_packet(uint32_t max_packet); virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size); @@ -62,7 +62,7 @@ class USBPhyHw : public USBPhy { virtual void process(); - static void _usb_event_handler(nrf_drv_usbd_evt_t const * const p_event); + static void _usb_event_handler(nrf_drv_usbd_evt_t const *const p_event); static void _usb_power_event_handler(nrfx_power_usb_evt_t event); static void _usb_virtual_status_event_handler(void); @@ -73,10 +73,10 @@ class USBPhyHw : public USBPhy { bool connect_enabled; typedef enum usb_hw_event_type_t { - USB_HW_EVENT_NONE = 0, - USB_HW_EVENT_USBD = 1, - USB_HW_EVENT_POWER = 2, - USB_HW_EVENT_VIRTUAL_STATUS = 3 + USB_HW_EVENT_NONE = 0, + USB_HW_EVENT_USBD = 1, + USB_HW_EVENT_POWER = 2, + USB_HW_EVENT_VIRTUAL_STATUS = 3 } usb_hw_event_type_t; // Event type to process @@ -95,7 +95,7 @@ class USBPhyHw : public USBPhy { nrf_drv_usbd_transfer_t transfer_buf[18]; // Returns the appropriate transfer structure buffer for the given endpoint - nrf_drv_usbd_transfer_t* get_transfer_buffer(usb_ep_t endpoint); + nrf_drv_usbd_transfer_t *get_transfer_buffer(usb_ep_t endpoint); // Returns the corresponding enumeration given an mbed endpoint number static nrf_drv_usbd_ep_t get_nordic_endpoint(usb_ep_t endpoint); diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index 8a022674df3..4771087bf2b 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -24,8 +24,8 @@ #define MAX_PACKET_ISO NRF_DRV_USBD_ISOSIZE #define ENDPOINT_NON_ISO (USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_ALLOW_INT) -#define IS_IN_EP(ep) (ep & 0x80) // Checks if the given endpoint is an IN endpoint (MSB set) -#define IS_OUT_EP(ep) (ep & ~0x80) // Checks if the given endpoint is an OUT endpoint (MSB clear) +#define IS_IN_EP(ep) (ep & 0x80) // Checks if the given endpoint is an IN endpoint (MSB set) +#define IS_OUT_EP(ep) (ep & ~0x80) // Checks if the given endpoint is an OUT endpoint (MSB clear) // If this bit is set in setup.bmRequestType, the setup transfer // is DEVICE->HOST (IN transfer) @@ -45,549 +45,591 @@ static USBPhyHw *instance = 0; static volatile bool virtual_status_xfer_event; -static void usbd_event_handler(nrf_drv_usbd_evt_t const * const p_event); +static void usbd_event_handler(nrf_drv_usbd_evt_t const *const p_event); static void power_usb_event_handler(nrfx_power_usb_evt_t event); -USBPhy *get_usb_phy() { - static USBPhyHw usbphy; - return &usbphy; +USBPhy *get_usb_phy() +{ + static USBPhyHw usbphy; + return &usbphy; } USBPhyHw::USBPhyHw() : - events(NULL), sof_enabled(false), connect_enabled(false), - usb_event_type(USB_HW_EVENT_NONE), - usb_power_event(NRFX_POWER_USB_EVT_REMOVED) { + events(NULL), sof_enabled(false), connect_enabled(false), + usb_event_type(USB_HW_EVENT_NONE), + usb_power_event(NRFX_POWER_USB_EVT_REMOVED) +{ } -USBPhyHw::~USBPhyHw() { +USBPhyHw::~USBPhyHw() +{ } -void USBPhyHw::init(USBPhyEvents *events) { +void USBPhyHw::init(USBPhyEvents *events) +{ + + this->events = events; - this->events = events; + ret_code_t ret; - ret_code_t ret; + // Initialize power module to track USB Power events + ret = nrfx_power_init(NULL); + MBED_ASSERT(ret == NRF_SUCCESS); - // Initialize power module to track USB Power events - ret = nrfx_power_init(NULL); - MBED_ASSERT(ret == NRF_SUCCESS); + // Register callback for USB Power events + static const nrfx_power_usbevt_config_t config = { + .handler = power_usb_event_handler + }; - // Register callback for USB Power events - static const nrfx_power_usbevt_config_t config = { .handler = - power_usb_event_handler }; - nrfx_power_usbevt_init(&config); + nrfx_power_usbevt_init(&config); - // Initialize USB Device driver - ret = nrf_drv_usbd_init(usbd_event_handler); - MBED_ASSERT(ret == NRF_SUCCESS); + // Initialize USB Device driver + ret = nrf_drv_usbd_init(usbd_event_handler); + MBED_ASSERT(ret == NRF_SUCCESS); - /* Configure selected size of the packed on EP0 */ - nrf_drv_usbd_ep_max_packet_size_set(NRF_DRV_USBD_EPOUT0, MAX_PACKET_SIZE_SETUP); - nrf_drv_usbd_ep_max_packet_size_set(NRF_DRV_USBD_EPIN0, MAX_PACKET_SIZE_SETUP); + /* Configure selected size of the packed on EP0 */ + nrf_drv_usbd_ep_max_packet_size_set(NRF_DRV_USBD_EPOUT0, MAX_PACKET_SIZE_SETUP); + nrf_drv_usbd_ep_max_packet_size_set(NRF_DRV_USBD_EPIN0, MAX_PACKET_SIZE_SETUP); - // Store a reference to this instance - instance = this; + // Store a reference to this instance + instance = this; - virtual_status_xfer_event = false; + virtual_status_xfer_event = false; - /* - * Configure ISOIN endpoint to respond with ZLP when - * no data is ready to be sent - */ - NRF_USBD->ISOINCONFIG |= 0x01; // set RESPONSE to 1 (respond with ZLP) + /* + * Configure ISOIN endpoint to respond with ZLP when + * no data is ready to be sent + */ + NRF_USBD->ISOINCONFIG |= 0x01; // set RESPONSE to 1 (respond with ZLP) - // Set up the IRQ handler - NVIC_SetVector(USBD_IRQn, (uint32_t)USBD_HAL_IRQHandler); + // Set up the IRQ handler + NVIC_SetVector(USBD_IRQn, (uint32_t)USBD_HAL_IRQHandler); - // Enable the power events - nrfx_power_usbevt_enable(); + // Enable the power events + nrfx_power_usbevt_enable(); } -void USBPhyHw::deinit() { - // Disconnect and disable interrupt - disconnect(); - // Disable the USB Device driver - ret_code_t ret = nrf_drv_usbd_uninit(); - MBED_ASSERT(ret == NRF_SUCCESS); - //NVIC_DisableIRQ(USBD_IRQn); // This is handled by the Nordic driver +void USBPhyHw::deinit() +{ + // Disconnect and disable interrupt + disconnect(); + + // Disable the USB Device driver + ret_code_t ret = nrf_drv_usbd_uninit(); + MBED_ASSERT(ret == NRF_SUCCESS); - // Disable the power peripheral driver - nrfx_power_uninit(); + // Disable the power peripheral driver + nrfx_power_uninit(); - // Clear the instance pointer - instance = 0; + // Clear the instance pointer + instance = 0; } -bool USBPhyHw::powered() { - if (nrfx_power_usbstatus_get() == NRFX_POWER_USB_STATE_CONNECTED - || nrfx_power_usbstatus_get() == NRFX_POWER_USB_STATE_READY) - return true; - else - return false; +bool USBPhyHw::powered() +{ + if (nrfx_power_usbstatus_get() == NRFX_POWER_USB_STATE_CONNECTED + || nrfx_power_usbstatus_get() == NRFX_POWER_USB_STATE_READY) { + return true; + } else { + return false; + } } -void USBPhyHw::connect() { +void USBPhyHw::connect() +{ - // To save power, we only enable the USBD peripheral - // when there's actually VBUS detected + // To save power, we only enable the USBD peripheral + // when there's actually VBUS detected - // So flag that the USB stack is ready to connect - this->connect_enabled = true; + // So flag that the USB stack is ready to connect + this->connect_enabled = true; - // If VBUS is already available, enable immediately - if(nrfx_power_usbstatus_get() == NRFX_POWER_USB_STATE_CONNECTED) - { - // Enabling USB will cause NRF_DRV_POWER_USB_EVT_READY - // to occur, which will start the USBD peripheral - // when the internal regulator has settled - if(!nrf_drv_usbd_is_enabled()) - nrf_drv_usbd_enable(); + // If VBUS is already available, enable immediately + if (nrfx_power_usbstatus_get() == NRFX_POWER_USB_STATE_CONNECTED) { + // Enabling USB will cause NRF_DRV_POWER_USB_EVT_READY + // to occur, which will start the USBD peripheral + // when the internal regulator has settled + if (!nrf_drv_usbd_is_enabled()) { + nrf_drv_usbd_enable(); + } - if(nrfx_power_usbstatus_get() == NRFX_POWER_USB_STATE_READY - && !nrf_drv_usbd_is_started()) - nrf_drv_usbd_start(true); - } + if (nrfx_power_usbstatus_get() == NRFX_POWER_USB_STATE_READY + && !nrf_drv_usbd_is_started()) { + nrf_drv_usbd_start(true); + } + } } -void USBPhyHw::disconnect() { +void USBPhyHw::disconnect() +{ - this->connect_enabled = false; + this->connect_enabled = false; - if(nrf_drv_usbd_is_started()) - nrf_drv_usbd_stop(); - if(nrf_drv_usbd_is_enabled()) - nrf_drv_usbd_disable(); + if (nrf_drv_usbd_is_started()) { + nrf_drv_usbd_stop(); + } + if (nrf_drv_usbd_is_enabled()) { + nrf_drv_usbd_disable(); + } } -void USBPhyHw::configure() { - // Not needed +void USBPhyHw::configure() +{ + // Not needed } -void USBPhyHw::unconfigure() { - // Remove all endpoints (except control, obviously) - nrf_drv_usbd_ep_default_config(); +void USBPhyHw::unconfigure() +{ + // Remove all endpoints (except control, obviously) + nrf_drv_usbd_ep_default_config(); } -void USBPhyHw::sof_enable() { - // TODO - Enable SOF interrupt - // Can this safely be done if - // nrf_drv_usbd_start is called with SoF enabled? - // For now just mask the interrupt with a boolean flag - sof_enabled = true; +void USBPhyHw::sof_enable() +{ + // TODO - Enable SOF interrupt + // Can this safely be done if + // nrf_drv_usbd_start is called with SoF enabled? + // For now just mask the interrupt with a boolean flag + sof_enabled = true; } -void USBPhyHw::sof_disable() { - // TODO - Disable SOF interrupt - // Can this safely be done if - // nrf_drv_usbd_start is called with SoF enabled? - sof_enabled = false; +void USBPhyHw::sof_disable() +{ + // TODO - Disable SOF interrupt + // Can this safely be done if + // nrf_drv_usbd_start is called with SoF enabled? + sof_enabled = false; } -void USBPhyHw::set_address(uint8_t address) { - // nothing to do, handled by hardware; but don't STALL +void USBPhyHw::set_address(uint8_t address) +{ + // nothing to do, handled by hardware; but don't STALL } -void USBPhyHw::remote_wakeup() { - // Not supported(?) +void USBPhyHw::remote_wakeup() +{ + // Not supported(?) } -const usb_ep_table_t *USBPhyHw::endpoint_table() { - - static const usb_ep_table_t template_table = - { - 1536, // 64 bytes per bulk/int endpoint pair (8), 1023 bytes for iso endpoint pair (1) - { - { USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, - { ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, - { ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, - { ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, - { ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, - { ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, - { ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, - { ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, - { USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, - { 0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, - { 0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, - { 0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, - { 0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, - { 0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, - { 0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, - { 0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, - } - }; - return &template_table; -} +const usb_ep_table_t *USBPhyHw::endpoint_table() +{ -uint32_t USBPhyHw::ep0_set_max_packet(uint32_t max_packet) { - disable_usb_interrupts(); + static const usb_ep_table_t template_table = { + 1536, // 64 bytes per bulk/int endpoint pair (8), 1023 bytes for iso endpoint pair (1) + { + { USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { 0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { 0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { 0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { 0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { 0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { 0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + { 0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0 }, + } + }; + return &template_table; +} + +uint32_t USBPhyHw::ep0_set_max_packet(uint32_t max_packet) +{ + disable_usb_interrupts(); - if (max_packet > MAX_PACKET_SIZE_SETUP) - max_packet = MAX_PACKET_SIZE_SETUP; + if (max_packet > MAX_PACKET_SIZE_SETUP) { + max_packet = MAX_PACKET_SIZE_SETUP; + } - nrf_drv_usbd_ep_max_packet_size_set(NRF_DRV_USBD_EPOUT0, max_packet); - nrf_drv_usbd_ep_max_packet_size_set(NRF_DRV_USBD_EPIN0, max_packet); + nrf_drv_usbd_ep_max_packet_size_set(NRF_DRV_USBD_EPOUT0, max_packet); + nrf_drv_usbd_ep_max_packet_size_set(NRF_DRV_USBD_EPIN0, max_packet); - enable_usb_interrupts(); + enable_usb_interrupts(); - return max_packet; + return max_packet; } // read setup packet -void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) { +void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) +{ - disable_usb_interrupts(); + disable_usb_interrupts(); - if (size > sizeof(this->setup_buf)) { - size = sizeof(this->setup_buf); - } - memcpy(buffer, &this->setup_buf, size); + if (size > sizeof(this->setup_buf)) { + size = sizeof(this->setup_buf); + } + memcpy(buffer, &this->setup_buf, size); - enable_usb_interrupts(); + enable_usb_interrupts(); } -void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) { +void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) +{ - // Check for status stage - if(data == NULL && size == 0) - { - // If the data stage transfer direction was OUT - if(setup_buf.bmRequestType & SETUP_TRANSFER_DIR_MASK) - { - // This is the status stage -- trigger the status task and notify the Mbed stack - // Don't trigger status stage unless endpoint is not busy! - // (Causes an undocumented hardware-initiated stall on the control endpoint) - if(nrf_drv_usbd_ep_is_busy(NRF_DRV_USBD_EPIN0)) - nrf_usbd_shorts_enable(NRF_USBD_SHORT_EP0DATADONE_EP0STATUS_MASK); - else - nrf_usbd_task_trigger(NRF_USBD_TASK_EP0STATUS); + // Check for status stage + if (data == NULL && size == 0) { + // If the data stage transfer direction was OUT + if (setup_buf.bmRequestType & SETUP_TRANSFER_DIR_MASK) { + // This is the status stage -- trigger the status task and notify the Mbed stack + // Don't trigger status stage unless endpoint is not busy! + // (Causes an undocumented hardware-initiated stall on the control endpoint) + if (nrf_drv_usbd_ep_is_busy(NRF_DRV_USBD_EPIN0)) { + nrf_usbd_shorts_enable(NRF_USBD_SHORT_EP0DATADONE_EP0STATUS_MASK); + } else { + nrf_usbd_task_trigger(NRF_USBD_TASK_EP0STATUS); + } - virtual_status_xfer_event = true; + virtual_status_xfer_event = true; - // Trigger an interrupt to process the virtual status event - NRFX_IRQ_PENDING_SET(USBD_IRQn); + // Trigger an interrupt to process the virtual status event + NRFX_IRQ_PENDING_SET(USBD_IRQn); - return; - } - } + return; + } + } - nrf_drv_usbd_transfer_t* transfer = get_transfer_buffer((usb_ep_t)(NRF_DRV_USBD_EPOUT0)); - memset(transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); - transfer->p_data.rx = data; - transfer->size = size; + nrf_drv_usbd_transfer_t *transfer = get_transfer_buffer((usb_ep_t)(NRF_DRV_USBD_EPOUT0)); + memset(transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); + transfer->p_data.rx = data; + transfer->size = size; - nrf_drv_usbd_setup_data_clear(); // tell the hardware to receive another OUT packet + nrf_drv_usbd_setup_data_clear(); // tell the hardware to receive another OUT packet - ret_code_t ret = nrf_drv_usbd_ep_transfer(NRF_DRV_USBD_EPOUT0, transfer); - MBED_ASSERT(ret == NRF_SUCCESS); + ret_code_t ret = nrf_drv_usbd_ep_transfer(NRF_DRV_USBD_EPOUT0, transfer); + MBED_ASSERT(ret == NRF_SUCCESS); } -uint32_t USBPhyHw::ep0_read_result() { - return nrf_drv_usbd_epout_size_get(NRF_DRV_USBD_EPOUT0); +uint32_t USBPhyHw::ep0_read_result() +{ + return nrf_drv_usbd_epout_size_get(NRF_DRV_USBD_EPOUT0); } -void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) { +void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) +{ - // Check for status stage - if(buffer == NULL && size == 0) - { - // If the requested size was 0 OR the data stage transfer direction was OUT - if(setup_buf.wLength == 0 - || ((setup_buf.bmRequestType & SETUP_TRANSFER_DIR_MASK) == 0)) - { + // Check for status stage + if (buffer == NULL && size == 0) { + // If the requested size was 0 OR the data stage transfer direction was OUT + if (setup_buf.wLength == 0 + || ((setup_buf.bmRequestType & SETUP_TRANSFER_DIR_MASK) == 0)) { - // This is the status stage -- trigger the status task and notify the Mbed stack + // This is the status stage -- trigger the status task and notify the Mbed stack - // Don't trigger status stage unless endpoint is not busy! - // (Causes an undocumented hardware-initiated stall on the control endpoint) - if(nrf_drv_usbd_ep_is_busy(NRF_DRV_USBD_EPOUT0)) - nrf_usbd_shorts_enable(NRF_USBD_SHORT_EP0DATADONE_EP0STATUS_MASK); - else - nrf_usbd_task_trigger(NRF_USBD_TASK_EP0STATUS); + // Don't trigger status stage unless endpoint is not busy! + // (Causes an undocumented hardware-initiated stall on the control endpoint) + if (nrf_drv_usbd_ep_is_busy(NRF_DRV_USBD_EPOUT0)) { + nrf_usbd_shorts_enable(NRF_USBD_SHORT_EP0DATADONE_EP0STATUS_MASK); + } else { + nrf_usbd_task_trigger(NRF_USBD_TASK_EP0STATUS); + } - virtual_status_xfer_event = true; + virtual_status_xfer_event = true; - // Trigger an interrupt to process the virtual status event - NRFX_IRQ_PENDING_SET(USBD_IRQn); + // Trigger an interrupt to process the virtual status event + NRFX_IRQ_PENDING_SET(USBD_IRQn); - return; - } - } + return; + } + } - nrf_drv_usbd_transfer_t* transfer = get_transfer_buffer(NRF_DRV_USBD_EPIN0); - memset(transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); - transfer->p_data.tx = buffer; - transfer->size = size; + nrf_drv_usbd_transfer_t *transfer = get_transfer_buffer(NRF_DRV_USBD_EPIN0); + memset(transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); + transfer->p_data.tx = buffer; + transfer->size = size; - if(size == 0) - transfer->flags |= NRF_DRV_USBD_TRANSFER_ZLP_FLAG; + if (size == 0) { + transfer->flags |= NRF_DRV_USBD_TRANSFER_ZLP_FLAG; + } - ret_code_t ret = nrf_drv_usbd_ep_transfer(NRF_DRV_USBD_EPIN0, transfer); - MBED_ASSERT(ret == NRF_SUCCESS); + ret_code_t ret = nrf_drv_usbd_ep_transfer(NRF_DRV_USBD_EPIN0, transfer); + MBED_ASSERT(ret == NRF_SUCCESS); } -void USBPhyHw::ep0_stall() { - // Note: This stall must be automatically cleared by the next setup packet - nrf_drv_usbd_setup_stall(); +void USBPhyHw::ep0_stall() +{ + // Note: This stall must be automatically cleared by the next setup packet + nrf_drv_usbd_setup_stall(); } -bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type) { - nrf_drv_usbd_ep_t nrf_ep = get_nordic_endpoint(endpoint); - nrf_drv_usbd_ep_enable(nrf_ep); - nrf_drv_usbd_ep_max_packet_size_set(nrf_ep, max_packet); - return nrf_drv_usbd_ep_enable_check(nrf_ep); +bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type) +{ + nrf_drv_usbd_ep_t nrf_ep = get_nordic_endpoint(endpoint); + nrf_drv_usbd_ep_enable(nrf_ep); + nrf_drv_usbd_ep_max_packet_size_set(nrf_ep, max_packet); + return nrf_drv_usbd_ep_enable_check(nrf_ep); } -void USBPhyHw::endpoint_remove(usb_ep_t endpoint) { - nrf_drv_usbd_ep_t nrf_ep = get_nordic_endpoint(endpoint); - // Reset data toggle for bulk/interrupt endpoints - if(nrf_ep != NRF_DRV_USBD_EPOUT8 && nrf_ep != NRF_DRV_USBD_EPIN8) - nrf_drv_usbd_ep_dtoggle_clear(nrf_ep); +void USBPhyHw::endpoint_remove(usb_ep_t endpoint) +{ + nrf_drv_usbd_ep_t nrf_ep = get_nordic_endpoint(endpoint); + // Reset data toggle for bulk/interrupt endpoints + if (nrf_ep != NRF_DRV_USBD_EPOUT8 && nrf_ep != NRF_DRV_USBD_EPIN8) { + nrf_drv_usbd_ep_dtoggle_clear(nrf_ep); + } - nrf_drv_usbd_ep_disable(nrf_ep); + nrf_drv_usbd_ep_disable(nrf_ep); } -void USBPhyHw::endpoint_stall(usb_ep_t endpoint) { - nrf_drv_usbd_ep_stall(get_nordic_endpoint(endpoint)); -} - -void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) { - nrf_drv_usbd_ep_t ep = get_nordic_endpoint(endpoint); - nrf_drv_usbd_ep_stall_clear(ep); - - /* - * This is a somewhat hacky fix to fully "unload" - * an IN endpoint after a buffer has been - * transferred via EasyDMA... - */ - - nrf_drv_usbd_ep_disable(ep); - nrf_drv_usbd_ep_enable(ep); -} - -bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) { - nrf_drv_usbd_transfer_t* transfer = get_transfer_buffer(endpoint); - memset(transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); - transfer->p_data.rx = data; - transfer->size = size; - - ret_code_t ret = nrf_drv_usbd_ep_transfer(get_nordic_endpoint(endpoint), transfer); - return (ret == NRF_SUCCESS); -} - -uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) { - return nrf_drv_usbd_epout_size_get(get_nordic_endpoint(endpoint)); -} - -bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) { - nrf_drv_usbd_transfer_t* transfer = get_transfer_buffer(endpoint); - memset(transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); - transfer->p_data.tx = data; - transfer->size = size; - - // If this is a zero-length-packet (ZLP) - // Set the ZLP flag - if(size == 0) - transfer->flags |= NRF_DRV_USBD_TRANSFER_ZLP_FLAG; - - ret_code_t ret = nrf_drv_usbd_ep_transfer(get_nordic_endpoint(endpoint), transfer); - return (ret == NRF_SUCCESS); -} - -void USBPhyHw::endpoint_abort(usb_ep_t endpoint) { - nrf_drv_usbd_ep_abort(get_nordic_endpoint(endpoint)); -} - -void USBPhyHw::process() { - - if (usb_event_type == USB_HW_EVENT_USBD) { - - // Process regular USBD events - switch (usb_event.type) { - case NRF_DRV_USBD_EVT_SUSPEND: - events->suspend(true); - break; - case NRF_DRV_USBD_EVT_RESUME: - events->suspend(false); - break; - case NRF_DRV_USBD_EVT_WUREQ: - break; - case NRF_DRV_USBD_EVT_RESET: - this->_reset(); - events->reset(); - break; - case NRF_DRV_USBD_EVT_SOF: - if(sof_enabled) - events->sof(usb_event.data.sof.framecnt); - break; - case NRF_DRV_USBD_EVT_EPTRANSFER: - if(usb_event.data.eptransfer.status == NRF_USBD_EP_OK) - { - if(!nrf_drv_usbd_ep_stall_check(usb_event.data.eptransfer.ep)) - { - if(IS_IN_EP(usb_event.data.eptransfer.ep)) - { - if((usb_event.data.eptransfer.ep & 0x7F) == 0) - events->ep0_in(); - else - events->in((usb_ep_t) usb_event.data.eptransfer.ep); - } - else - { - if((usb_event.data.eptransfer.ep & 0x7F) == 0) - events->ep0_out(); - else - events->out((usb_ep_t) usb_event.data.eptransfer.ep); - } - } - } - break; - case NRF_DRV_USBD_EVT_SETUP: { - nrf_drv_usbd_ep_stall_clear(NRF_DRV_USBD_EPIN0); - nrf_drv_usbd_ep_stall_clear(NRF_DRV_USBD_EPOUT0); - - // Copy the setup packet into the internal buffer - nrf_drv_usbd_setup_get(&setup_buf); - - // Notify the Mbed stack - events->ep0_setup(); - } - break; - default: - break; - - } - } - else if (usb_event_type == USB_HW_EVENT_POWER) - { - // Process USB power-related events - switch (usb_power_event) { - case NRFX_POWER_USB_EVT_DETECTED: - if(this->connect_enabled) { - if(!nrf_drv_usbd_is_enabled()) - nrf_drv_usbd_enable(); - events->power(true); - } - break; - case NRFX_POWER_USB_EVT_REMOVED: - events->power(false); - break; - case NRFX_POWER_USB_EVT_READY: - if(!nrf_drv_usbd_is_started()) - nrf_drv_usbd_start(true); - break; - default: - ASSERT(false); - } - } - else if (usb_event_type == USB_HW_EVENT_VIRTUAL_STATUS) - { - // Notify Mbed stack of status stage transfer completion - if(setup_buf.bmRequestType & SETUP_TRANSFER_DIR_MASK) // DATA IN transfer, Status OUT transfer - events->ep0_out(); - else // DATA OUT transfer, Status IN transfer - events->ep0_in(); - } - - // Unflag the event type - usb_event_type = USB_HW_EVENT_NONE; - - // Re-enable interrupt - enable_usb_interrupts(); +void USBPhyHw::endpoint_stall(usb_ep_t endpoint) +{ + nrf_drv_usbd_ep_stall(get_nordic_endpoint(endpoint)); +} + +void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) +{ + nrf_drv_usbd_ep_t ep = get_nordic_endpoint(endpoint); + nrf_drv_usbd_ep_stall_clear(ep); + + /* + * This is a somewhat hacky fix to fully "unload" + * an IN endpoint after a buffer has been + * transferred via EasyDMA... + */ + + nrf_drv_usbd_ep_disable(ep); + nrf_drv_usbd_ep_enable(ep); +} + +bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ + nrf_drv_usbd_transfer_t *transfer = get_transfer_buffer(endpoint); + memset(transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); + transfer->p_data.rx = data; + transfer->size = size; + + ret_code_t ret = nrf_drv_usbd_ep_transfer(get_nordic_endpoint(endpoint), transfer); + return (ret == NRF_SUCCESS); +} + +uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint) +{ + return nrf_drv_usbd_epout_size_get(get_nordic_endpoint(endpoint)); +} + +bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) +{ + nrf_drv_usbd_transfer_t *transfer = get_transfer_buffer(endpoint); + memset(transfer, 0, sizeof(nrf_drv_usbd_transfer_t)); + transfer->p_data.tx = data; + transfer->size = size; + + // If this is a zero-length-packet (ZLP) + // Set the ZLP flag + if (size == 0) { + transfer->flags |= NRF_DRV_USBD_TRANSFER_ZLP_FLAG; + } + + ret_code_t ret = nrf_drv_usbd_ep_transfer(get_nordic_endpoint(endpoint), transfer); + return (ret == NRF_SUCCESS); +} + +void USBPhyHw::endpoint_abort(usb_ep_t endpoint) +{ + nrf_drv_usbd_ep_abort(get_nordic_endpoint(endpoint)); +} + +void USBPhyHw::process() +{ + + if (usb_event_type == USB_HW_EVENT_USBD) { + + // Process regular USBD events + switch (usb_event.type) { + case NRF_DRV_USBD_EVT_SUSPEND: + events->suspend(true); + break; + case NRF_DRV_USBD_EVT_RESUME: + events->suspend(false); + break; + case NRF_DRV_USBD_EVT_WUREQ: + break; + case NRF_DRV_USBD_EVT_RESET: + this->_reset(); + events->reset(); + break; + case NRF_DRV_USBD_EVT_SOF: + if (sof_enabled) { + events->sof(usb_event.data.sof.framecnt); + } + break; + case NRF_DRV_USBD_EVT_EPTRANSFER: + if (usb_event.data.eptransfer.status == NRF_USBD_EP_OK) { + if (!nrf_drv_usbd_ep_stall_check(usb_event.data.eptransfer.ep)) { + if (IS_IN_EP(usb_event.data.eptransfer.ep)) { + if ((usb_event.data.eptransfer.ep & 0x7F) == 0) { + events->ep0_in(); + } else { + events->in((usb_ep_t) usb_event.data.eptransfer.ep); + } + } else { + if ((usb_event.data.eptransfer.ep & 0x7F) == 0) { + events->ep0_out(); + } else { + events->out((usb_ep_t) usb_event.data.eptransfer.ep); + } + } + } + } + break; + case NRF_DRV_USBD_EVT_SETUP: { + nrf_drv_usbd_ep_stall_clear(NRF_DRV_USBD_EPIN0); + nrf_drv_usbd_ep_stall_clear(NRF_DRV_USBD_EPOUT0); + + // Copy the setup packet into the internal buffer + nrf_drv_usbd_setup_get(&setup_buf); + + // Notify the Mbed stack + events->ep0_setup(); + } + break; + default: + break; + + } + } else if (usb_event_type == USB_HW_EVENT_POWER) { + // Process USB power-related events + switch (usb_power_event) { + case NRFX_POWER_USB_EVT_DETECTED: + if (this->connect_enabled) { + if (!nrf_drv_usbd_is_enabled()) { + nrf_drv_usbd_enable(); + } + events->power(true); + } + break; + case NRFX_POWER_USB_EVT_REMOVED: + events->power(false); + break; + case NRFX_POWER_USB_EVT_READY: + if (!nrf_drv_usbd_is_started()) { + nrf_drv_usbd_start(true); + } + break; + default: + ASSERT(false); + } + } else if (usb_event_type == USB_HW_EVENT_VIRTUAL_STATUS) { + // Notify Mbed stack of status stage transfer completion + if (setup_buf.bmRequestType & SETUP_TRANSFER_DIR_MASK) { // DATA IN transfer, Status OUT transfer + events->ep0_out(); + } else { // DATA OUT transfer, Status IN transfer + events->ep0_in(); + } + } + + // Unflag the event type + usb_event_type = USB_HW_EVENT_NONE; + + // Re-enable interrupt + enable_usb_interrupts(); } void USBPhyHw::_usb_event_handler( - nrf_drv_usbd_evt_t const * const p_event) { - disable_usb_interrupts(); - // Copy the event data into internal memory - memcpy(&instance->usb_event, p_event, sizeof(instance->usb_event)); - // Tell the upper layers of the stack to process the event - instance->usb_event_type = USB_HW_EVENT_USBD; - instance->events->start_process(); + nrf_drv_usbd_evt_t const *const p_event) +{ + disable_usb_interrupts(); + // Copy the event data into internal memory + memcpy(&instance->usb_event, p_event, sizeof(instance->usb_event)); + // Tell the upper layers of the stack to process the event + instance->usb_event_type = USB_HW_EVENT_USBD; + instance->events->start_process(); } -void USBPhyHw::_usb_power_event_handler(nrfx_power_usb_evt_t event) { - disable_usb_interrupts(); - // Copy the event data into internal memory - instance->usb_power_event = event; - // Tell the upper layers of the stack to process the event - instance->usb_event_type = USB_HW_EVENT_POWER; - instance->events->start_process(); +void USBPhyHw::_usb_power_event_handler(nrfx_power_usb_evt_t event) +{ + disable_usb_interrupts(); + // Copy the event data into internal memory + instance->usb_power_event = event; + // Tell the upper layers of the stack to process the event + instance->usb_event_type = USB_HW_EVENT_POWER; + instance->events->start_process(); } -void USBPhyHw::_usb_virtual_status_event_handler(void) { - disable_usb_interrupts(); +void USBPhyHw::_usb_virtual_status_event_handler(void) +{ + disable_usb_interrupts(); - // Tell the upper layers of the stack to process the event - instance->usb_event_type = USB_HW_EVENT_VIRTUAL_STATUS; - instance->events->start_process(); + // Tell the upper layers of the stack to process the event + instance->usb_event_type = USB_HW_EVENT_VIRTUAL_STATUS; + instance->events->start_process(); } -nrf_drv_usbd_transfer_t* USBPhyHw::get_transfer_buffer(usb_ep_t endpoint) { - // Index is base endpoint number * 2 (output), add 1 for input endpoints - return &transfer_buf[(((endpoint & 0x7F) << 1) + ((endpoint & 0x80) >> 7))]; +nrf_drv_usbd_transfer_t *USBPhyHw::get_transfer_buffer(usb_ep_t endpoint) +{ + // Index is base endpoint number * 2 (output), add 1 for input endpoints + return &transfer_buf[(((endpoint & 0x7F) << 1) + ((endpoint & 0x80) >> 7))]; } -nrf_drv_usbd_ep_t USBPhyHw::get_nordic_endpoint(usb_ep_t endpoint) { - // Clear the most-significant-bit (input endpoint flag) - return (nrf_drv_usbd_ep_t) endpoint; +nrf_drv_usbd_ep_t USBPhyHw::get_nordic_endpoint(usb_ep_t endpoint) +{ + // Clear the most-significant-bit (input endpoint flag) + return (nrf_drv_usbd_ep_t) endpoint; } void USBPhyHw::_reset(void) { - // Disable all endpoints except for control endpoints - nrf_drv_usbd_ep_default_config(); + // Disable all endpoints except for control endpoints + nrf_drv_usbd_ep_default_config(); - nrf_drv_usbd_setup_clear(); + nrf_drv_usbd_setup_clear(); - usb_event_type = USB_HW_EVENT_NONE; + usb_event_type = USB_HW_EVENT_NONE; - // Clear all endpoint interrupts - NRFX_IRQ_PENDING_CLEAR(USBD_IRQn); - nrf_usbd_event_clear((nrf_usbd_event_t)0x01FFFFFF); + // Clear all endpoint interrupts + NRFX_IRQ_PENDING_CLEAR(USBD_IRQn); + nrf_usbd_event_clear((nrf_usbd_event_t)0x01FFFFFF); } -void USBPhyHw::enable_usb_interrupts(void) { - // Enable USB and USB-related power interrupts - NRFX_IRQ_ENABLE(USBD_IRQn); - nrfx_power_usbevt_enable(); +void USBPhyHw::enable_usb_interrupts(void) +{ + // Enable USB and USB-related power interrupts + NRFX_IRQ_ENABLE(USBD_IRQn); + nrfx_power_usbevt_enable(); } -void USBPhyHw::disable_usb_interrupts(void) { - // Disable USB and USB-related power interrupts - NRFX_IRQ_DISABLE(USBD_IRQn); - nrfx_power_usbevt_disable(); +void USBPhyHw::disable_usb_interrupts(void) +{ + // Disable USB and USB-related power interrupts + NRFX_IRQ_DISABLE(USBD_IRQn); + nrfx_power_usbevt_disable(); } -static void power_usb_event_handler(nrfx_power_usb_evt_t event) { - if(instance) { - // Pass the event on to the USBPhyHW instance - instance->_usb_power_event_handler(event); - } +static void power_usb_event_handler(nrfx_power_usb_evt_t event) +{ + if (instance) { + // Pass the event on to the USBPhyHW instance + instance->_usb_power_event_handler(event); + } } -static void usbd_event_handler(nrf_drv_usbd_evt_t const * const p_event) { - if(instance) { - // Pass the event on to the USBPhyHW instance - instance->_usb_event_handler(p_event); - } +static void usbd_event_handler(nrf_drv_usbd_evt_t const *const p_event) +{ + if (instance) { + // Pass the event on to the USBPhyHW instance + instance->_usb_event_handler(p_event); + } } void USBD_HAL_IRQHandler(void) { - // Process the virtual status stage transfer event - if(virtual_status_xfer_event) - { - if(instance) { - instance->_usb_virtual_status_event_handler(); - } + // Process the virtual status stage transfer event + if (virtual_status_xfer_event) { + if (instance) { + instance->_usb_virtual_status_event_handler(); + } - virtual_status_xfer_event = false; + virtual_status_xfer_event = false; - } - // Call Nordic driver IRQ handler - USBD_IRQHandler(); + } + // Call Nordic driver IRQ handler + USBD_IRQHandler(); } From 77bc8d336c90405cd10e2b187aa1f2e840dad569 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Fri, 15 Mar 2019 11:10:33 -0400 Subject: [PATCH 486/488] Lock sleep when USB is initialized Added logic to lock deep sleep when USB is initialized to prevent malfunctioning. This is consistent with the other drivers. See PR ARMmbed/mbed-os#9879 --- .../TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index 4771087bf2b..1a459d0f08f 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -70,6 +70,14 @@ USBPhyHw::~USBPhyHw() void USBPhyHw::init(USBPhyEvents *events) { + // Disable the USBD interrupts + // Interrupts will be reenabled by the Nordic driver + NRFX_IRQ_DISABLE(USBD_IRQn); + + if(this->events == NULL) { + sleep_manager_lock_deep_sleep(); + } + this->events = events; ret_code_t ret; @@ -125,6 +133,10 @@ void USBPhyHw::deinit() // Disable the power peripheral driver nrfx_power_uninit(); + if(this->events != NULL) { + sleep_manager_unlock_deep_sleep(); + } + // Clear the instance pointer instance = 0; } From a42f62aa3142f5454a05091c1d60c7d0bf16f872 Mon Sep 17 00:00:00 2001 From: George Beckstein Date: Fri, 15 Mar 2019 21:23:18 -0400 Subject: [PATCH 487/488] Added in code to fix deepsleep underflow. Nullify event handler member variable. --- .../targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index 1a459d0f08f..d522bec9132 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -137,6 +137,8 @@ void USBPhyHw::deinit() sleep_manager_unlock_deep_sleep(); } + this->events = NULL; + // Clear the instance pointer instance = 0; } From 83ead9449ed4c447f6d0ca57269400967ea609fe Mon Sep 17 00:00:00 2001 From: aglass0fmilk Date: Wed, 27 Mar 2019 11:46:11 -0400 Subject: [PATCH 488/488] Fixed failure on endpoint test data toggle reset (under Windows): "Data toggle not reset when calling ClearFeature(ENDPOINT_HALT) on an endpoint that has not been halted." --- .../TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp index d522bec9132..a6a26eba248 100644 --- a/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp +++ b/usb/device/targets/TARGET_NORDIC/TARGET_MCU_NRF52840/USBPhy_Nordic.cpp @@ -402,6 +402,9 @@ void USBPhyHw::endpoint_unstall(usb_ep_t endpoint) { nrf_drv_usbd_ep_t ep = get_nordic_endpoint(endpoint); nrf_drv_usbd_ep_stall_clear(ep); + + // Clear data toggle + nrf_drv_usbd_ep_dtoggle_clear(ep); /* * This is a somewhat hacky fix to fully "unload"